iLLD_TC26B: IFX Low Level Drivers

iLLD User Documentation
Device:TC26B Version: 1.0.1.12.0
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IFX Low Level Drivers

Introduction

The aim of the IFX Low Level Driver library (iLLD) is to provide access and configuration functions for the integrated peripherals of Infineon microcontrollers - from a simple timer register access up to 3 phases PWM driver for inverter applications. Together with SFR header files they are a fundamental part of the infrastructure for tests and applications which are developed by several teams at IFX ATV.

All drivers follow the same coding style to ensure a common "Look&Feel". The application interfaces (APIs) are defined and implemented by Hardware/Software experts, already tested pre-silicon with a virtual prototype or in RTL simulations, and then shared by all teams which are involved in programming software:

iLLD Usage at Infineon

This cross usage model should not only help to reduce development efforts, but also improve the quality/reliability of the drivers.

The strict iLLD coding guidelines allow layering of drivers for multi-dimensional system scenarios. There is no dependency between the peripheral drivers. Optionally they can be isolated from the library and provided as a separate package (e.g. for application notes delivered to customers).

iLLDs are currently planned for Aurix and Aurix 2G derivatives.

Each derivative has its own set of iLLD sources, which are located in GIT. Versionized packages are also distributed via MyICP.

Table Of Contents

  • General Structure of iLLDs
  • iLLD APIs
  • Naming Conventions
  • Coding rules
  • Doxygen rules
  • Files and Configuration
  • Package versioning
  • Do's and don't

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iLLD User Manual
Release
Copyright © Infineon Technologies AG 2020
www.infineon.com
Version 1.0.1.12.0
2020


iLLD_TC26B: General Structure of iLLDs

General Structure of iLLDs

We can basically differ between two types of iLLDs:

Unifunctional Peripheral Drivers

Unifunctional peripheral drivers are simple modules where the target peripheral is able to carry out one type of functionality.

Example: VADC peripheral for analog-to-digital conversion. Multican for CAN protocol communication, DMA for DMA functionality, etc.

Unifunctional Peripheral Driver

Multifunctional Peripheral Drivers

These kind of peripheral drivers are complex to handle, and here the target peripheral can carry out multiple functionalities ("use cases").

Example: AscLin peripheral can be configured as a common UART, but also as a LIN or even a SPI.
GTM TOM/ATOM can be used as PWM generator, complex waveform generator and any generic timer, etc.

Multifunctional Peripheral Driver

Content of Peripheral Drivers

iLLDs consist of following components:

  • Peripheral Register Memory Map (SFR header file)
  • a Standard Layer with (verbose) access functions to SFRs which are changed during application runtime
  • an Interface Layer with configuration and handling functions
    Multiple Interface Layers could be available if the peripheral is used for different purposes.
  • Pinmaps to configure I/O multiplexers

Configuration Data Structures

A configuration structure, which is part of an interface layer, holds the parameters to configure the driver. Depending on the iLLD and its associated peripheral there could be multiple levels of configuration data structures. As in case of VADC there could be data structure to configure the VADC module, a structure for the configuring the group and another for the channels.

The data structure shall be defined in a memory optimised way considering the structures are non-packed in the memory map. All the structure elements shall be organised in a way that they are ordered in the descending order of their physical memory size.

Usage: In normal cases configuration data structures are locally stored (on the stack) inside specific initialization routines. They can also be placed in the flash/ROM

Example for a configuration struct:

typedef struct
{
const IfxVadc_Adc *module; /**< \brief Specifies pointer to the IfxVadc_Adc module handle */
IfxVadc_GroupId groupId; /**< \brief Specifies the group/kernel id */
IfxVadc_GroupId master; /**< \brief Specifies the master group if own group is different master slave is configured */
IfxVadc_Adc_ArbiterConfig arbiter; /**< \brief Specifies arbiter configuration */
IfxVadc_Adc_ClassConfig inputClass[IFXVADC_NUMBER_OF_INPUTCLASS]; /**< \brief Specifies conversion settings one and two */
IfxVadc_Adc_ScanConfig scanRequest; /**< \brief Specifies scan mode configuration */
IfxVadc_Adc_QueueConfig queueRequest; /**< \brief Specifies queued mode configuration */
IfxVadc_Adc_ScanConfig backgroundScanReq; /**< \brief Specifies back ground scan configuration */
boolean disablePostCalibration; /**< \brief Specifies if calibration after conversion (post calibration) should be disabled */
} IfxVadc_Adc_GroupConfig;

Runtime Variables (Handles)

Runtime variables are usually stored in so called "handles". This structure is separated from the configuration structure mentioned above (because such structures are only needed during initialization phase).

Handles are used to reference resources of a peripheral by interface functions without unnecessary calculation or parameter passing overhead. A handle struct contains at least a pointer to the base address of the peripheral which should be accessed, pointers to peripheral subcomponents where required, and/or indices (such as a channel or timer number).

Handles are to be instantiated per instance of the used peripheral. Higher SW layers store knows number of instances required for the intended application and it reserves the memory for these many data structures.

The data structure must be made to be available in the DMI RAM of the Cpu from which lld API calls are more frequently done.

Example for an handle:

typedef struct
{
IfxVadc_Adc module; /**< \brief The VADC handle structure */
Ifx_VADC_G *group; /**< \brief Pointer to the group registers */
IfxVadc_GroupId groupId; /**< \brief Specifies the group index */
} IfxVadc_Adc_Group;

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iLLD User Manual


iLLD_TC26B: iLLD APIs

iLLD APIs

This section provides the generic overview of APIs required for a iLLD

iLLD Init APIs

iLLDs which need the user configuration data, shall declare the data type for configuration. These data structures are instantiated by the higher level software. Following are the requirements for the driver.

Initialization of configuration data structure

Any driver which uses the configuration data structure shall provide an interface to initialize these data structure elements to their default values. Main used case of such implementation is, when a driver is upgraded with an additional configuration parameter, such initialization would provide correct value to the variable so that the driver works correctly when used with legacy application software which used the previous version of the driver. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals.

Data structure shall be instantiated per HW instance for which the driver is targeted

The generic prototype shall be as
<Driver Prefix>_initConfig(<Driver Prefix>_Config *cfg);
where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.

Driver Initialization

The iLLD shall provide an API to initialize the driver peripheral based on the user configuration. Configuration data shall be previously initialized to default values with init config interface. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals.

The driver initialization API shall initialize the peripheral registers to make the peripheral to work as drivers functionality. This API shall also initialize the driver internal data structure to their required init values.

The generic prototype shall be as
<Driver Prefix>_init(<Driver Prefix>_Handle *handle, <Driver Prefix>_Config *cfg);
where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.

Driver De-Initialization

iLLD may provide an API to reset the driver to default reset state and to make to consume least power. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals. The generic prototype shall be as
<Driver Prefix>_deInit(<Driver Prefix>_Handle *handle);
where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.

iLLD functional APIs

iLLD shall provide API for each of the needed functionality the user may use. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals. For each of the peripherals instances the parameter passed will be deferring.

The generic prototype shall be as
<Driver Prefix>_<functionality>(<Driver Prefix>_Handle *handle); where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.

iLLD internal methods

For better modularisation readability reasons the driver implementations shall use the internal static functions. In such cases the function definitions shall be defined in the similar way as iLLD functional APIs

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iLLD_TC26B: Naming Conventions

Naming Conventions

This section provides the naming convention to be followed during development.

As general rule all the "exported" types/definitions/class/objects (i.e. Function, enum, typedef, constant, variable, ...) should start with the filename + underscore "_".

Example: in file IfxScuWdt.c/h the function shall be:

  • IfxScuWdt_enableEndinit()
  • IfxScuWdt_disableEndinit()

iLLD Files

Ifx<HW Module name>[<HW Sub module name>][_SW Driver if special][sub SW module name].c/h

Example:

  • 1) With HW module only without sub-module: IfxPort.c/.h
  • 2) With HW module and sub-module: IfxScuWdt.c/.h
  • 3) With HW module sub-module and SW driver: IfxGtmTom_Pwm.c/.h
  • 4) With HW module sub-module and SW driver + SW sub module: IfxGtmTom_PwmHl.c/.h (only if it makes sense to split the 10:files to make it modular)

Important things to check during review/ or with static code check tools:

  • 1) Prefix: Ifx (in title case)
  • 2) <module name>[<HW Sub module name>] (in camel case)
  • 3) [_SW Driver if special] (an underscore to separate and title case SW driver name)
  • 4) .c and .h in the small case

Data Types

typedef <standard type> Ifx<HW Module name>[<HW Sub module name>][SW Driver if special]<user type name>;

<Standard type> structure/union/enum definitions with its elements, and other C data types

Example:

typedef struct
{
uint32 pllFreqInHz;
uint32 stepFreqInHz;
uint8 stepPerIn_uSec;
uint8 pDivider;
uint8 nDivider;
uint8 k2Divider;
} IfxScu_Pll_Config;

Important things to check:

  • 1) Points 1 to 3 for filenames
  • 2) _<user type name >: an underscore to separate with the rest and Camel case letters (first letter also capital).

Structures

To define structure types the convention shall be followed as in type defines above.

For structure elements simple name with camel case letters with first letter small shall be used.

Refer to the example for naming convention for type defines

Enum

To define enum types the convention shall be followed as in type defines above.

For enum elements following naming convention to be followed:
Ifx<HW Module name>[<HW Sub module name>][SW Driver if special]<Enum Name>_<Enum element>

<Enum element> camel case letter <Enum Name> Camel case letter

Example:

typedef enum {
IfxDma_ChannelPriority_low = 0,
IfxDma_ChannelPriority_medium,
IfxDma_ChannelPriority_high
} IfxDma_ChannelPriority;

Important things to check:

  • 1) Points 1 to 3 for filenames
  • 2) _<Enum Element>: an underscore to separate with the rest and Camel case letters (first letter lower case).

#define Constants or Macros

#define IFX<MODULE>[<HW SUB MODULE NAME>][SW DRIVER]<FUNCTIONALITY NAME>

<FUNCTIONALITY NAME>: Meaningful name to represent the functionality. With "_" to separate words

Example:

#define IFXSCUCCU_PLL_FREE_RUNNING_FREQ (100000000U)

Important things to check:

  • 1) all capital letters

Functions

All exported functions: Ifx<HW Module name>[<HW Sub module name>][SW Driver if special]<Functionality>

Example:

IfxGtmTom_Pwm_setDutyCycle(..)

Important things to check:

  • 1) Points 1 to 3 for filenames
  • 2)_<Functionality>: an underscore to separate and Camel case letters with first letter small. (Convention used with object oriented programming). Functionality shall start with the main action (verb) to be fulfilled with the interface.

For example:

  • An interface to set pin level high, the function name is setPinHigh.
  • An interface to read the result of ADC conversion is readResult
  • An interface to send the data byte over communication peripheral sendByte

Function's parameter & struct members

Function parameter are not doing an action done but does set values for confiuguration, then there is no verb in the name.

Examples:

typedef struct
{
boolean hardwareRequestEnabled; // \brief Enabling the hardware channel request
} IfxDma_Dma_ChannelConfig;

Inline Functions

All inline functions as:
IFX_INLINE <function definition>

Shall follow the naming conventions as in Functions

Infineon definitions for Standard Data Types

Located in Cpu/Std/Platform_Types.h

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iLLD_TC26B: Coding rules

Coding rules
  1. Code formating
  2. General rules
  3. Code checking
  4. APIs common to many module drivers

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iLLD_TC26B: Code formating

Code formating

Auto-formating

Only use the code formating as defined by following script: $VERIF_LLD/bin/indent_rec

Ignore auto-formating

In case the source code shall not be formated by the formating tool the following command can be used:

// *INDENT-OFF* Note: this file was indented manually by the author.
... place here code that shall not be formated by the tool
// *INDENT-ON*

File structure

The source code in a file should be grouped using doxygen groups. Groups should be sorted in the file by alphabetical order of the group name. Inside a group, code shall be sorted by alphabetical order of the API names.

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iLLD_TC26B: General rules

General rules

Always use curly braces for if, for, while, do, ...

Correct:
static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
{
...
if( config->shadowControl != 0)
{
channel->SHADR.U = config->shadowAddress;
}
}

Wrong:

static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
{
...
if( config->shadowControl != 0)
channel->SHADR.U = config->shadowAddress;
}

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iLLD_TC26B: Code checking

Code checking

Parameter check

In case the parameter can not be checked by the compiler for valid values, it shall be checked using the assertion function.

Example:

IFX_INLINE void IfxDma_setChannelTransaction(Ifx_DMA* dma,IfxDma_ChannelId channelId, uint32 transferCount)
{
IFX_ASSERT(VERBOSE_LEVEL_ERROR,transferCount < 32);
}

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iLLD_TC26B: APIs common to many module drivers

APIs common to many module drivers

<modue>_get<Interrupt>Src()

For each interrupt service request control register, an API that returns the register address shall be available. The API syntax is as follow: volatile Ifx_SRC_SRCR* <driverName>_get<Interrupt>Src(<ModuleType>*module);

Example: The transmit interrupt of the QSPI driver has the following API:

volatile Ifx_SRC_SRCR* IfxQspi_getTransmitSrc(Ifx_QSPI* module);

<modue>_getIndex()

The API Ifx<Module>_getIndex(Ifx_<MODULE>* module) shall be implemented in the file Ifx<Module>.c/h and use an array define in Ifx<Module>_cfg.c/h;

Example:

In file Ifxcpu.h

IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu);

In file Ifxcpu.c

// brief Return cpu index
//
// \param cpu Specifies cpu module
//
// \return Return cpu index.
//
IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu)
{
IfxCpu_ResourceCpu result = IfxCpu_ResourceCpu_none, index;
for (index = 0; index < IFXCPU_COUNT; index++)
{
if (IfxCpu_cfg_indexMap[index].module == cpu)
{
result = IfxCpu_cfg_indexMap[index].index;
break;
}
}
return result;
}

In file Ifxcpu_cfg.h

// List of the available CPU resources
typedef enum
{
IfxCpu_ResourceCpu_0 = 0, // CPU 0
IfxCpu_ResourceCpu_1, // CPU 1
IfxCpu_ResourceCpu_2, // CPU 2
IfxCpu_ResourceCpu_none // None of the CPU
} IfxCpu_ResourceCpu;
IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu);

In file Ifxcpu_cfg.c

const IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_COUNT] =
{
{&MODULE_CPU0, IfxCpu_ResourceCpu_0},
{&MODULE_CPU1, IfxCpu_ResourceCpu_1},
{&MODULE_CPU2, IfxCpu_ResourceCpu_2},
};

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iLLD_TC26B: Doxygen rules

Doxygen rules

Microcontroller root group

The microcontroller documentation root group is IfxLld. The group is defined in the file info.dox located in the microcontroller derivative root directory.

Example:

\defgroup IfxLld TC27x B-Step Microcontroller

Modules group

Module's group names have the follwing syntax: '\defgroup IfxLld_<Module>'. The group is direct child of the Microcontroller root group.

v <Module> is the module short name in with the 1st letter upper case and then lower case. The group name is defined in the Ifx<Module>_regdef.h file. Example:

\defgroup IfxLld_Dma DMA
\ingroup IfxLld

The following groups are also defined in the Ifx<Module>_regdef.h file for each modules:

  • IfxLld_<Module>_Bitfields : Bitfield macro definition
  • IfxLld_<Module>_Union : module union types
  • IfxLld_<Module>_Struct : module struct types

Module standard driver group

Module's standard driver group have the follwing syntax: '\defgroup IfxLld_<Module>_Std'. The group is direct child of the Modules group.

Example:

\defgroup IfxLld_Asclin_Std Basic functionality
\ingroup IfxLld_Asclin

Module interface driver group

Module's interface driver group have the follwing syntax: '\defgroup IfxLld_<Module>_<Interface>'. The group is direct child of the Modules group.

<Interface> is the interface driver name.

Example:

\defgroup IfxLld_Asclin_AscIf ASC interface driver
Implements the standard ASC interface
\ingroup IfxLld_Asclin

General rules

  • As group name are global names, a group name shall start with the parent group name.
  • Group names are 1st letter upper case, then camel case, group levels are separated by underscore

Example:

  • |–IfxLld
  • | |–IfxLld_Dma
  • | | |–IfxLld_Dma_Std
  • | | |–IfxLld_Dma_Std_ChannelTransaction
  • | | |–IfxLld_Dma_Dma

Documentation of return values

The return value shall be documented using \return when docuementation is provided for a single case.

The return value shall be documented using \retval when docuementation is provided for a multiple case.

Example (single case):

\return Return the raw converted analog value.

Output:

Returns
Return the raw converted analog value.

Example (multiple case):

\retval TRUE in case of success
\retval FALSE in case of error

Output:

Return values
TRUE | in case of success
FALSE | in case of error

parameterDocumentation

Documentation shall provide range for parameters when not entirely defined.

Example:

// \param transferCount Number of transaction, Range=[0,32]
IFX_INLINE void IfxDma_setChannelTransaction(Ifx_DMA* dma,IfxDma_ChannelId channelId, uint32 transferCount)
{ ... }

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iLLD_TC26B: Files and Configuration

Files and Configuration

Folder structure

Starting from Src/BaseSw/: iLLD contains the iLLD files for all derivatives

  1. Inside Src/BaseSw/iLLD/<DUT>/Tricore:
  2. _Build contains the set of files to be included to build the specific driver. Mostly used by internal tools
  3. _Impl contains derivative specific configuration which could also be adapted by the user
  4. _PinMap contains I/O configurations in pin tables
  5. _Lib contains derivative dependent library functions
  6. <module> contains the actual peripheral driver

Infra contains the header files for all derivatives, compiler specific files and application start-up software files for Aurix2G derivatives

  1. Inside Src/BaseSw/Infra/Platform/Tricore/Compilers contains the compiler specific files
  2. Inside Src/BaseSw/Infra/Sfr/<DUT> contains the header files
  3. Inside Src/BaseSw/Infra/Ssw/<DUT>/Tricore contains the application start-up software files

Service contains derivative independent service software sources

VERIF_DUT stands for the derivative which should be selected

Ifx_Cfg.h

Please create a configuration file with the name "Ifx_Cfg.h" in your application to configure the iLLD library components.

Currently it only requires to select the external oscillator frequency (XTAL) and the desired system frequency.

In addition, this file allows you to specify how assertions should be print out.

Minimal Ifx_Cfg.h file:

#ifndef IFX_CFG_H
#define IFX_CFG_H
// XTAL/PLL frequency
#define IFX_CFG_SCU_XTAL_FREQUENCY (20000000)
#define IFX_CFG_SCU_PLL_FREQUENCY (200000000)
// Assertions
#define IFX_ASSERT(level, expr)
#endif /* IFX_CFG_H */

The configuration macros mentioned below can be overridden in Ifx_Cfg.h:

  • IFX_CFG_DISABLE_DEFAULT_INTRINSICS - IFX_CFG_DISABLE_DEFAULT_INTRINSICS shall be defined in Ifx_Cfg.h to disable the default intrinsics provided For Ex. NOP,CRC
  • IFX_CFG_USE_COMPILER_DEFAULT_LINKER - IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h to use the default compiler provided linker varaibles and startup
  • IFX_USE_SW_MANAGED_INT - IFX_USE_SW_MANAGED_INT shall be defined in Ifx_Cfg.h to use the software based interrupts SCU related Macros:
  • IFX_CFG_SCU_XTAL_FREQUENCY - IFX_CFG_SCU_XTAL_FREQUENCY shall be defined to respective XTAL frequency in Ifx_Cfg.h
  • IFX_CFG_SCU_PLL_FREQUENCY - IFX_CFG_SCU_PLL_FREQUENCY shall be defined to desired PLL frequency in Ifx_Cfg.h
  • IFX_CFG_SCU_PLL1_FREQUENCY - IFX_CFG_SCU_PLL1_FREQUENCY shall be defined to desired PLL1 frequency in Ifx_Cfg.h
  • IFX_CFG_SCU_PLL2_FREQUENCY - IFX_CFG_SCU_PLL2_FREQUENCY shall be defined to desired PLL2 frequency in Ifx_Cfg.h
  • Applicable for only Aurix2G devices:
  • Application Start-up related Macros:
  • IFX_CFG_SSW_ENABLE_TRICOREx (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx shall be defined to 0 in Ifx_Cfg.h to disable the CPUx.
  • IFX_CFG_SSW_ENABLE_TRICOREx_PCACHE (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx_PCACHE shall be defined to 0 in Ifx_Cfg.h to disable the PCACHE of CPUx
  • IFX_CFG_SSW_ENABLE_TRICOREx_DCACHE (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx_DCACHE shall be defined to 0 in Ifx_Cfg.h to disable the DCACHE of CPUx

Example for Assertion output via printf:

#ifdef __cplusplus
extern "C" {
#endif
// defined in main.c
extern const char* verboseLevelStr[6];
#define IFX_ASSERT(level, expr) (((expr) || (level > IFX_VERBOSE_LEVEL_ERROR)) ? ((void)0) : (void)printf("[ASSERT:%s] '%s' in %s:%d (function '%s')\n", verboseLevelStr[level], #expr, __FILE__, __LINE__, __func__))
#endif

And in your main.c file (or somewhere else):

//! this global array is used by IFX_ASSERT of iLLDs
const char* verboseLevelStr[6] = {
"OFF",
"FAILURE",
"ERROR",
"WARNING",
"INFO",
"DEBUG"
};

Minimal Set of Driver sources

If you prefer to use (resp. compile) only a minimal set of drivers for your application, please add at least following "infrastructural resources":

  • Src/BaseSw/Infra/Sfr/<DUT>/_Reg directory
  • Src/BaseSw/iLLD/<DUT>/Tricore/_Lib directory
  • Src/BaseSw/Service directory
  • CPU driver: Src/BaseSw/iLLD/<DUT>/Tricore/Cpu and Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxCpu_cfg.*
  • DMA driver: Src/BaseSw/iLLD/<DUT>/Tricore/Dma and Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxDma_cfg.*
  • Port driver: Src/BaseSw/iLLD/<DUT>/Tricore/Port, Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxPort_cfg.* and src/ifx/$(VERIF_DUT)/_PinMap/IfxPort_PinMap.*
  • SCU driver: Src/BaseSw/iLLD/<DUT>/Tricore/Scu and Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxScu_cfg.*
  • Src driver: Src/BaseSw/iLLD/<DUT>/Tricore/Src and Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxSrc_cfg.*
  • Stm driver: Src/BaseSw/iLLD/<DUT>/Tricore/Stm and Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxStm_cfg.*

Whenever additional drivers should be added, you typically have to copy following files/directories:

  • Src/BaseSw/iLLD/<DUT>/Tricore/<driver>
  • Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/<driver>_cfg.*
  • Src/BaseSw/iLLD/<DUT>/Tricore/_PinMap/<driver>_cfg.*
  • For more information you can refer the BIFACES User Manual.

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iLLD_TC26B: Package versioning

Package versioning

Package version number

Each released package is assigned a unique identifier that consists of four numbers that represent the major and the minor version numbers separated by underscores '_'.

For example: version 1_0_0_0_0

With each new release:

  • either the minor version is incremented
  • or the major version number is incremented and the minor and "major update" version number reset

the increment step for the minor and major number is >= 1.

Note
The package version number is independent from the clearcase file version numbers

The version number is available in the IfxLldVersion.h header file, so that it can be referenced (and compared) by application software. The content:

#define IFX_LLD_VERSION_GENERATION 1 /**< \brief Indicates the driver generation */
#define IFX_LLD_VERSION_MAJOR 0 /**< \brief Informs about changes which could lead to incompatibilities */
#define IFX_LLD_VERSION_MAJOR_UPDATE 0 /**< \brief Informs about a release for a new derivative without further API changes */
#define IFX_LLD_VERSION_MINOR 0 /**< \brief Informs about new additions to the library */
#define IFX_LLD_VERSION_REVISION 0 /**< \brief Informs about patches and/or documentation changes */

Change significance

Change in the major version number

Change in the major version number indicates that the version may not be fully compatible with other major version numbers. The reason for the incompatibility could be:

  • changes in the API names, parameters...

Change in the "major update" version number

This part of the version number indicates that the library has been released for a new derivative without further API changes.

Change in the minor version number

Change in the minor version number indicates that the version is backward compatible with smaller minor version number with identical major version number. The difference between minor version number are:

  • new feature introduced
  • bug fix
  • update of documentation

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iLLD_TC26B: Do's and don't

Do's and don't
  1. Naming convention
  2. Coding rules
  3. Documentation
  4. Optimisation
  5. Usage of enums

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iLLD_TC26B: Naming convention

Naming convention

Enum

[link: Enum]

   Enumeration items must be prefixed with the enumeration type.

   Correct:
typedef enum
{
IfxDma_ChannelPriority_low = 0,
IfxDma_ChannelPriority_medium,
IfxDma_ChannelPriority_high
} IfxDma_ChannelPriority;

Wrong (IfxDma_ChannelPrioritySelect):

typedef enum
{
IfxDma_ChannelPriority_low = 0,
IfxDma_ChannelPriority_medium,
IfxDma_ChannelPriority_high
} IfxDma_ChannelPrioritySelect;

Directory name

[link: Directory name]

   Dirtectory shall have the same name as the driver name without the Ifx prefix.

       Correct:
       - Dma
           - Dma
               - IfxDma.c
               - IfxDma.h

       Wrong:
       - Dma
           - <SPAN style="color:red">Interface</SPAN>
               - IfxDma.c
               - IfxDma.h

Function's parameter & struct members

[link: Function's parameter & struct members]

Function parameter are not doing an action done but does set values for confiuguration, then there is no verb in the name.

Correct:

typedef struct
{
boolean hardwareRequestEnabled; // \brief Enabling the hardware channel request
} IfxDma_Dma_ChannelConfig;

Wrong(enableHardwareRequest):

typedef struct
{
boolean enableHardwareRequest; // \brief Enabling the hardware channel request
} IfxDma_Dma_ChannelConfig;

Static function names shall also be prefixed

[link: Static function names shall also be prefixed]

Correct:
static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)

Wrong:

static void configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)

Do not explicitely use 'handle' in the parameter name

[link: Do not explicitely use 'handle' in the parameter name]

Remove the name ‘handle’ from the parameter’s name, even we hnow that it is an handle. It does not add information but increase the source code length.

Correct:

IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig* config, IfxDma_Dma* dma);

Wrong(dmaHandle):

IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig* config, IfxDma_Dma* dmaHandle);

[Previous page] [Next page]


iLLD_TC26B: Coding rules

Coding rules

Type assumption

[link: Type assumption]

Bitfield values should not be assumed as Boolean.

Correct:

IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA* dma,IfxDma_ChannelId channelId)
{
return dma->CH[channelId].CHCSR.B.LXO != 0;
}

Wrong:

IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA* dma,IfxDma_ChannelId channelId)
{
return dma->CH[channelId].CHCSR.B.LXO;
}

Variable names

[link: Variable names]

   Use explicit names for variable.
   Example:
   With
Ifx_DMA* dma;
dma->source = 0x123;

the code can be easier understand than with

Ifx_DMA* baseAddr;
baseAddr->source = 0x123;

Avoid numbers, use constant instead

[link: Avoid numbers, use constant instead]

Correct:
#define IFXDMA_DMA_ENABLE_SHADOW_ADDRESS (2) // Position of the shadow address enable bit
static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
{
...
if( config->shadowControl & (1 << IFXDMA_DMA_ENABLE_SHADOW_ADDRESS) )
{
channel->SHADR.U = config->shadowAddress;
}
}

Wrong:

static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
{
...
if( config->shadowControl & (1 << 2) )
{
channel->SHADR.U = config->shadowAddress;
}
}

. Example(1 << 2) below

[Previous page] [Next page]


iLLD_TC26B: Documentation

Documentation

Avoid 'the same' in documentation

[link: Avoid 'the same' in documentation]

Correct:

boolean channelInterrupt; // \brief Determines the setting of the channel transfer interrupt flag and interrupt service request

Wrong(for the same):

boolean channelInterrupt; // \brief Determines the setting of the channel transfer interrupt flag and interrupt service request for the same

[Previous page] [Next page]


iLLD_TC26B: Optimisation

Optimisation

Module register access (array)

[link: Module register access (array)]

   Code should be optimised by using array index instead of if..else.

   Correct:
dma->BLK[index]. ...

Wrong:

if( moveEngine == IfxDma_MoveEngine_1 )
{
dma->BLK1. ...
}
else
{
dma->BLK0. ...
}

In case the array is not available in the module structure definition, please request for implementation. The reasons could be:

  • it has been forgotten to build the array during the register header file generation
  • the module address map does not currently supports the array access

Module register access (read modify write)

[link: Module register access (read modify write)]

   Runtime optimisation should be done by utilizing a local variable when more than one bitfield of a register is to be modified.

   Correct:
IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA* dma,IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
{
Ifx_DMA_BLK_ME_ADICR adicr;
adicr.U = dma->CH[channelId].ADICR.U;
adicr.B.SMF = incStep;
adicr.B.INCS = direction;
adicr.B.CBLS = size;
dma->CH[channelId].ADICR.U = adicr.U;
}

Wrong:

IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA* dma,IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
{
dma->CH[channelId].ADICR.B.SMF = incStep;
dma->CH[channelId].ADICR.B.INCS = direction;
dma->CH[channelId].ADICR.B.CBLS = size;
}

[Previous page] [Next page]


iLLD_TC26B: Usage of enums

Usage of enums

enum convention in microcontroller /Std drivers

[link: enum convention in microcontroller /Std drivers]

    In case an enum represents a register bitfield value, then the following rules apply:
    - The enum type shall have an explicit name. The name shall not include register or bitfield short names. This is to abstract the setting when passed as a parameter to a function in the same way the function APIs names does.
    - Each enum member shall define explicitly an enum value with '='.
    - The enum documentation shall state for which register bitfield the enum has been defined with "Definition for <ModuleType>.<REGISTER NAME>.B.<BITFIELDNAME>", this to avoid misuse of the enum.
    - Each of the member shall have a documentation, that explain to users what is the enum for without reading the user manual.
    - Only enum defined in the current Std or base drivers shall be used.

    Correct:
// File Std/IfxQspi.h
// QSPI controller mode
// Definition for Ifx_QSPI.GLOBALCON.B.MS
typedef enum
{
IfxQspi_Mode_master = 0, // QSPI in "master" mode
IfxQspi_Mode_pwmOverSpi = 1, // QSPI in "PWM over SPI" mode
IfxQspi_Mode_slave = 2 // QSPI in "slave" mode
} IfxQspi_Mode;
void IfxQspi_foo(IfxQSPI* module)
{
if (module->GLOBALCON.B.MS != IfxQspi_Mode_slave)
{ //...
}
else
{ // ...
}
}

Wrong:

// File 1_SrvSw/If/SscIf.h
// SSC operation modes
typedef enum
{
SscIf_Mode_master, // Master mode
SscIf_Mode_slave, // Slave mode
SscIf_Mode_undefined // Undefined mode
} SscIf_Mode;
// File Std/IfxQspi.h
// QSPI controller mode
typedef enum
{
IfxQspi_GLOBALCON_MS_master = 0, // Corresponds with GLOBALCON.B.MS == 0
IfxQspi_GLOBALCON_MS_pwmOverSpi, // Corresponds with GLOBALCON.B.MS == 1
IfxQspi_GLOBALCON_MS_slave // Corresponds with GLOBALCON.B.MS == 2
} IfxQspi_GLOBALCON_MS;
void IfxQspi_foo(IfxQSPI* module)
{
if (module->GLOBALCON.B.MS != SscIf_Mode_slave)
{ //...
}
else
{ // ...
}
}

Usage of enums in microcontroller interface drivers

[link: Usage of enums in microcontroller interface drivers]

    The code dependencies shall be limited to the microcontroller HAL and service software interface /1_SrvSw/If, therefore only enums from this files can be used.
// File 1_SrvSw/If/SscIf.h
// SSC operation modes
typedef enum
{
SscIf_Mode_master, // Master mode
SscIf_Mode_slave, // Slave mode
SscIf_Mode_undefined // Undefined mode
} SscIf_Mode;
// File Ssc/IfxQspi_Ssc.h
// QSPI controller mode
// Definition for Ifx_QSPI.GLOBALCON.B.MS
typedef enum
{
IfxQspi_Mode_master = 0, // QSPI in "master" mode
IfxQspi_Mode_pwmOverSpi = 1, // QSPI in "PWM over SPI" mode
IfxQspi_Mode_slave = 2 // QSPI in "slave" mode
} IfxQspi_Mode;
SscIf_Mode IfxQspi_Ssc_foo(void)
{
SscIf_Mode mode;
switch ( IfxQspi_getMode(&MODULE_QSPI0))
{
case IfxQspi_Mode_master:
mode = SscIf_Mode_master;
break;
case IfxQspi_Mode_slave:
mode = IfxQspi_Mode_slave;
break;
default:
mode = SscIf_Mode_undefined;
break;
}
}

Enum name with index

[link: Enum name with index]

Do not use left zero padding for enum names, because the highest index number can not be assumed to be fixed.

Correct:

typedef enum
{
Dma_Channel_0 = 0,
Dma_Channel_1 = 1,
Dma_Channel_2 = 2,
Dma_Channel_3 = 3
} IfxQspi_Mode;

Wrong:

typedef enum
{
Dma_Channel_00 = 0,
Dma_Channel_01 = 1,
Dma_Channel_02 = 2,
Dma_Channel_03 = 3
} IfxQspi_Mode;

Enum members shall be prefixed with the enum type

[link: Enum members shall be prefixed with the enum type]

Correct:
typedef enum
{
IfxDma_Channel_0 = 0,
} IfxDma_Channel;

Wrong(IfxDma_ChannelId):

typedef enum
{
Dma_Channel_0 = 0,
} IfxDma_ChannelId;

[Previous page]


iLLD_TC26B: Resolver-to-digital Converter with DSADC

Resolver-to-digital Converter with DSADC

Table of Contents

  • Carrier generation
  • Signal acquisition and carrier cancellation
  • Timestamp acquisition
  • Angle tracking observer
    • Group delay estimation
  • Fault detection

One of the popular rotor positioning sensor used by electric motor drive is resolver. A resolver device modulates carrier signal R1-R2 by the SINE and COSINE function of actual angle and feeds it back into the controller unit (S1-S3, S2-S6).

AURIX family provides support for resolver-to-digital converter (RDC) by providing the following functionalities:

  • Carrier generation (DSADC hardware)
  • Signal acquisition and carrier cancellation (DSADC hardware)
  • Timestamp acquisition (GTM TIM hardware)

Additionally, the following functionalities are provided by software:

  • Angle tracking observer function
  • Fault detection

This page contains concept documentation of the driver software (DSADC RDC), especially implemented in files: IfxDsadc_Rdc.h and IfxDsadc_Rdc.c

Carrier generation

DSADC hardware supports the generation of resolver excitation carrier by providing PWM pin outputs which can be simply filtered by low-pass filter circuit to obtain a pair of differential signal.

Common configuration of the positive and negative signals are:

  • carrier signal frequency
  • bit-reversed PWM (optional, but recommended)
  • waveform mode: square, triangle, or sinusoidal

Those configuration are set by IfxDsadc_initCarrierGen() function which is called in the context of IfxDsadc_Rdc_init() function. Therefore, user only needs to call IfxDsadc_Rdc_init().

For each pin output (positive and negative), a low-pass filter and amplifier circuitry is required to drive a resolver device. Example of such circuitry can be seen in the figure below.

TODO: add picture

Signal acquisition and carrier cancellation

Two differential signals are generated from a resolver device (Sin+, Sin-, Cos+, Cos- or some write also as S1-S3, S2-S6). These signals basically can be connected directly into the two channels of DSADC, where each DSADC channel has P and N inputs.

Single DSADC channel and carrier cancelation configuration is done by function IfxDsadc_initChannel() which is called in the context of IfxDsadc_Rdc_init() function. Therefore, user only needs to call IfxDsadc_Rdc_init().

Common configuration items for each DSADC channel are:

  • modulator frequency (default: 10MHz)
  • CIC filter type (default: COMB3)
  • CIC decimation factor (default: 32)
  • FIR0 and FIR1 blocks (default: disabled)

Common configuration items of the carrier cancelation in each DSADC channel are:

  • offset compensation block (default: enabled)
  • integration count (default: 32)

With above default values (modulator frequency 10MHz, CIC decimation factor = 32, both FIRs disabled and integration count = 32), the output sample rate is: 10MHz / (32 * 32) = ~9.7kHz

In each acquired sample, interrupt service is requested by the first DSADC channel initialised by IfxDsadc_Rdc_init(). User's application shall provide an interrupt service routine (ISR) to handle this request. In the ISR, or an OS task which is synchronised to the event, user shall call IfxDsadc_Rdc_onEventA() function in order to update all necessary driver data related to this event.

Timestamp acquisition

Typically, user's application run at different sampling rate than DSADC output sampling rate. For example, motor control PWM interrupt occurs with 10 kHz sampling whereas the DSADC interrupt runs with ~9.7 kHz. This condition creates situation where the sampled resolver position is already aged with a few timer ticks, but can be significant to the motor control algorithm.

Therefore, timestamp which indicates the elapsed time since last DSADC channel sampling is required for compensating or computing the missing rotor position. In addition, this timestamp is also used for compensating the group delay which is inherent property of DSADC.

The implementation of timestamp acquisition uses following hardware resources:

  • one timebase unit or global timer (free-running), i.e. GTM TBU
  • first timer capture unit, to capture the time at the DSADC sample output event, i.e. using GTM TIM channel
  • second timer capture unit, to capture the time at the application sample point (e.g. PWM event), i.e. using GTM TIM channel.

Those resources are initialised by IfxDsadc_Rdc_initHwTimestamp() function which is called in the context of IfxDsadc_Rdc_init() function. Therefore, user doesn't need to call IfxDsadc_Rdc_initHwTimestamp() separately.

The user shall call IfxDsadc_Rdc_update() function in order to execute:

  • timestamp and group delay compensation
  • angle tracking observer
  • fault-detection

Angle tracking observer

Output samples acquired by DSADC channel and carrier cancelation are the envelope of SINE and COSINE resolver signals. In principle, ATAN2 function can be used to calculate the rotor position (angle), but in this driver a Ifx_AngleTrkF32 module is used.

When user's application calls function IfxDsadc_Rdc_update(), function Ifx_AngleTrkF32_step() is also called which contains implementation of:

  • ATAN2,
  • 3rd order angle tracking observer

The following figure shows the idea:

TODO: add picture

ATAN2 function computes the initial angle for the observer. Additional phase is computed from the timestamp and group delay to compensate 'missing' rotor position (angle). The combined initial angle and phase are used as reference for the first integrator for estimating acceleration. The second integrator estimates speed. The final integrator estimates the output angle.

The output angle is normally more 'smooth' in steady-state than the angle from ATAN2 function, albeit some settling time and overshoot which occur during transient. The dynamic performance depends on the gain constants set in the integrators. By default, the constants are calculated using formula from proceeding's paper Design of advanced resolver-to-digital converters, by Auger, et.al, in Electrimacs 2011, CergyPontoise (France), 6-8 june 2011.

Group delay estimation

It is shown in previous figure that group delay is required to estimate the actual position based on the angular speed and measured position.

The group delay of itself is estimated to be the sum of group delay of components of the DSADC channel used for acquisition such as CIC filter, FIR0, FIR1, and Integrator blocks.

The following formulas are used to estimate the group delays:

CIC group delay:
FIR0 group delay:
FIR1 group delay:
Integrator group delay:

The function IfxDsadc_getMainGroupDelay() implements those formulas, invoked by IfxDsadc_Rdc_update().

Fault detection

When application calls function IfxDsadc_Rdc_update(), fault detection implemented in Ifx_AngleTrkF32 module is also executed. The fault-detection is based on simple trigonometry equation:

With some tolerance, whenever the amplitude of one of SINE or COSINE signal is outside the allowed band, then fault flag is set. "SignalLoss" flag is set when the amplitude is below lower boundary. "SignalDegradation" flag is set when the amplitude is higher than upper boundary.

In addition, the flag "TrackingLoss" is set when the internal error value of the angle tracking observer is above a threshold.

Functions IfxDsadc_Rdc_getFault() can be used to check the error flags.

Configuration of the fault-detection (tolerance) boundary values and threshold are done by user's call to IfxDsadc_Rdc_init().


iLLD_TC26B: Modules

Modules
Here is a list of all modules:
[detail level 123456]
▼ iLLD |
▼ ASCLIN |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Operative Functions |
Utility Functions |
Configuration Functions |
External Functions |
IO Pin Configuration Functions |
ASCLIN Pin Mapping |
How to use the ASCLIN ASC Interface driver? |
▼ ASC |
Data Structures |
Interrupt Functions |
Simple Communication |
Stream based Communication (STDIO) |
Module Functions |
How to use the ASCLIN LIN Interface driver? |
▼ LIN |
Data Structures |
Elementary Transactions |
Module Functions |
Error Handling Functions |
Interrupt Functions |
Enumerations |
How to use the ASCLIN SPI Interface driver? |
▼ SPI |
Data Structures |
Module Functions |
Interrupt Functions |
Communication Functions |
▼ CCU6 |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Operative Functions |
Utility Functions |
Configuration Functions |
IO Pin Configuration Functions |
CCU6 Pin Mapping |
▼ ICU Interface driver |
How to use the CCU6 ICU Interface driver? |
Data Structures |
Module Initialize Functions |
Capture Control Functions |
Channel Initialize Functions |
▼ PWMBC Interface driver |
How to use the CCU6 PWMBC Interface driver? |
Data Structures |
Module Initialize Functions |
Modulation Control Functions |
Hall Pattern Functions |
▼ PWM Interface Driver |
How to use the CCU6 PWM Driver |
Data Structures |
PwmHl Functions |
StdIf Functions |
▼ TIMER Interface driver |
How to use the CCU6 TIMER Interface driver? |
Data Structures |
Module Initialize Functions |
Timer Control Functions |
▼ TimerWithTrigger Interface driver |
How to use the CCU6 TimerWithTrigger Interface driver? |
Data Structures |
Timer StdIf Functions |
Timer Functions |
▼ TPWM Interface driver |
How to use the CCU6 TPWM Interface driver? |
Data Structures |
Module Initialize Functions |
Modultion Control Functions |
▼ CIF |
Implementation |
▼ Standard Driver |
Standard Enumerations |
ISP Enumerations |
Standard Functions |
ISP Functions |
Linear Downscaler Functions |
Linear Downscaler Enumerations |
Memory Interface Functions |
Memory Interface Enumerations |
JPEG Encoder Functions |
JPEG Encoder Enumerations |
Security Watchdog Functions |
Security Watchdog Enumerations |
ISP Image Stabilization Functions |
ISP Image Stabilization Enumerations |
Extra Path Functions |
Extra Path Enumerations |
Debug Path Functions |
Debug Path Enumerations |
CIF Pin Mapping |
▼ CAM |
Camera Enumerations |
Camera Functions |
Camera Structures |
▼ CPU |
Implementation |
▼ Standard Driver |
Cpu Core Functions |
Interrupt Utility Functions |
Cache Management Functions |
Performance Counter Functions |
Synchronization Functions |
Cpu Utility Functions |
Enumerations |
Data Structures |
▼ Intrinsics |
▼ intrinsics for DCC compiler |
Minimum and Maximum of (Short) Integers |
Cross type arithmetic operation |
Floating point operation |
Fractional Arithmetic Support |
Insert / Extract Bit-fields and Bits |
Interrupt Handling |
Miscellaneous Intrinsic Functions |
Packed Data Type Support |
Register Handling |
Saturation Arithmetic Support |
Insert Single Assembly Instruction |
▼ Intrinsics for GNU compiler |
Cross type arithmetic operation |
Signed integer operation |
Unsigned integer operation |
Floating point operation |
Fractional Arithmetic Support |
Insert / Extract Bit-fields and Bits |
Interrupt Handling |
Miscellaneous Intrinsic Functions |
Packed Data Type Support |
Insert Single Assembly Instruction |
▼ Intrinsics for GNU compiler |
Cross type arithmetic operation |
Signed integer operation |
Unsigned integer operation |
Minimum and Maximum of (sint16) Integers |
Floating point operation |
Fractional Arithmetic Support |
Insert / Extract Bit-fields and Bits |
Interrupt Handling |
Miscellaneous Intrinsic Functions |
Packed Data Type Support |
Register Handling |
Saturation Arithmetic Support |
Insert Single Assembly Instruction |
▼ Intrinsics for TASKING compiler |
Cross type arithmetic operation |
Signed integer operation |
Unsigned integer operation |
Floating point operation |
Fractional Arithmetic Support |
Insert / Extract Bit-fields and Bits |
Interrupt Handling |
Miscellaneous Intrinsic Functions |
Packed Data Type Support |
Register Handling |
Saturation Arithmetic Support |
Insert Single Assembly Instruction |
▼ Core Startup Functions |
Startup Sequence |
How to enable cache during startup? |
How to enable CPUs during startup? |
▼ Interrupt Functions |
How to define Interrupts? |
Functions |
▼ Trap Functions |
Trap Function Hooks |
How to use the Trap Function Hooks? | Macro to define the trap vector table. This macro is provided to define the trap vector table in the frameowrk. User shall not use this macro. Refer to the documentation to extend the trap with hook functions. How to use the Trap Function Hooks?
▼ DMA |
Implementation |
▼ Standard Driver |
Enumerations |
Reset Functions |
Channel Transaction Functions |
Move Engine functions |
Channel configuration Functions |
Channel Halt Functions |
Double Buffer functions |
Interrupt functions |
How to use the DMA Interface driver? |
▼ DMA |
Data Structures |
Module Initialization |
Channel Initialization |
Linked Lists |
Channel Transactions |
▼ DSADC |
Implementation |
▼ Standard Driver |
Enumerations |
Operative Functions |
Support Functions |
Interrupt Functions |
IO Pin Configuration Functions |
DSADC Pin Mapping |
How to use the DSADC Interface driver? |
▼ DSADC |
Data Structures |
Module Functions |
Channel Functions |
Operative Functions |
Result Functions |
Interrupt Functions |
▼ RDC |
Variables |
Configuration Functions |
StdIf Functions |
▼ Structures |
Configuration Functions |
StdIf Functions |
Utility Functions |
Utility Functions |
▼ DTS |
Implementation |
▼ Standard Driver |
Control functions |
Status functions |
How to use the DTS Interface driver? |
▼ DTS |
Data Structures |
Module Initialisation functions |
Sensor Functions |
Conversion Functions |
▼ EMEM |
Implementation |
▼ Standard Driver |
Enumerations |
Module Functions |
▼ ERAY |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Interrupt Functions |
IO Pin Configuration Functions |
Module Functions |
Status Functions |
Configuration Functions |
Data Structures |
Operative Functions |
ERAY Pin Mapping |
How to use the ERAY Interface driver? |
▼ ERAY |
Data Structures |
Module Initialisation Functions |
Node Initialisation Functions |
Operative Functions |
Status Functions |
Interrupt Functions |
▼ ETH |
Implementation |
▼ Standard Driver |
Data Structures |
Unions |
Configuration Functions |
Utility Functions |
Initialisation Functions |
Enumerations |
ETH Pin Mapping |
▼ PHY_PEF7071 |
Functions |
▼ FCE |
Implementation |
▼ Standard Driver |
Enumerations |
Module Functions |
Support Function |
Interrupt Status Functions |
How to use the FCE CRC Interface driver? |
▼ CRC |
Data Structures |
Module Initialise Functions |
CRC Operation Functions |
Interrupt Status Function |
▼ FFT |
Implementation |
▼ Standard Driver |
Enumerations |
Utility Functions |
How to use the FFT driver? |
▼ FFT |
Data Structures |
Module Functions |
Interrupt Functions |
Transform Funtions |
▼ FLASH |
Implementation |
▼ Standard Driver |
Enumerations |
CommandSequence Functions |
Error Tracking Functions |
Global Definitions |
▼ GPT12 |
Implementation |
▼ Standard Driver |
Enumerations |
Interrupt Functions |
Configuration Functions |
Utility Functions |
Operative Functions |
GPT12 Pin Mapping |
▼ INCRENC |
How to use the GPT12 Incremental Encoder Driver |
Data structures |
Functions |
StdIf Functions |
▼ GTM |
▼ Implementation |
Enumerations |
Data Structures |
▼ Standard Driver |
Basic Functions |
Enumerations |
▼ Atom Basic Functionality |
ATOM Enumerations |
ATOM Channel Functions |
ATOM AGC Functions |
▼ Cmu Basic Functionality |
CMU Enumerations |
CMU Basic Functions |
▼ Dpll Basic Functionality |
DPLL Basic Functions |
▼ Tbu Basic Functionality |
TBU Enumerations |
TBU Basic Functions |
▼ Tim Basic Functionality |
TIM Enumerations |
TIM Channel Functions |
▼ Tom Basic Functionality |
TOM Enumerations |
TOM Channel Functions |
TOM TGC Functions |
▼ Atom Interface Drivers |
▼ ATOM PWM Interface Driver |
How to use the GTM ATOM PWM Driver |
ATOM PWM DataStructures |
Pwm Functions |
▼ ATOM PWM HL Interface Driver |
How to use the GTM ATOM PWM Driver |
Data Structures |
PwmHl Functions |
PwmHl StdIf Functions |
▼ ATOM Timer Interface Driver |
How to use the GTM ATOM Timer Driver |
Timer StdIf Functions |
Timer Functions |
Data Structures |
▼ TOM Interface Drivers |
▼ TOM PWM Interface Driver |
How to use the GTM TOM PWM Driver |
TOM PWM DataStructures |
Pwm Functions |
▼ TOM PWM HL Interface Driver |
How to use the GTM TOM PWM Driver |
Data Structures |
PwmHl Functions |
PwmHl StdIf Functions |
▼ TOM Timer Interface Driver |
How to use the GTM TOM Timer Driver |
Data Structures |
Timer Functions |
Timer StdIf Functions |
▼ Tim Interface Drivers |
▼ TIM Input Interface |
Data Structures |
Enumerations |
Funtions |
GTM Pin Mapping |
▼ GTM Trigger Configuration |
Enumerations |
Data Structures |
Trigger Functions |
▼ HSSL |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Hsct Functions |
Data Structures |
Hssl Functions |
How to use the HSSL Interface driver? |
▼ HSSL |
Data Structures |
Enumerations |
Module Functions |
Channel Functions |
Simple Communication |
Error Handling |
Streaming Communication |
▼ I2C |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Functions |
Data Structures |
I2C Pin Mapping |
How to use the I2c driver? |
▼ I2C |
Module Functions |
Enumerations |
Data Structures |
▼ IOM |
▼ Implementation |
Enum input signals |
Enumeration inputs |
▼ Standard Driver |
Enumeration |
Utility Functions |
Enumeration Obsolete (NOt recommended for use) |
Module Functions Obsolete (NOt recommended for use) |
▼ IOM Driver |
Driver Functions |
Structures |
▼ MSC |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Configure Flags |
Set Command Target |
Set Data |
Get Data |
Enable Module |
Reset Module |
Baud Calculator |
IO Pin Configuration Functions |
Module Functions |
MSC Pin Mapping |
How to use the MSC Interface driver? |
▼ MSC |
Enumerations |
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iLLD_TC26B: iLLD

Modules | Files
iLLD
Collaboration diagram for iLLD:

Modules

ASCLIN
CCU6
CIF
CPU
DMA
DSADC
DTS
EMEM
ERAY
ETH
FCE
FFT
FLASH
Global Definitions
GPT12
GTM
HSSL
I2C
IOM
MSC
MTU
MULTICAN
PORTS
PSI5
PSI5S
QSPI
SCU
SENT
SMU
SRC
STM
VADC
General functionalities

Files

file IfxStdIf.h
Standard interface types.

Detailed Description


iLLD_TC26B: ASCLIN

Modules | Files
ASCLIN
iLLD
Collaboration diagram for ASCLIN:

Modules

Implementation
Standard Driver
ASCLIN Pin Mapping
How to use the ASCLIN ASC Interface driver?
ASC
How to use the ASCLIN LIN Interface driver?
LIN
How to use the ASCLIN SPI Interface driver?
SPI

Files

file | IfxAsclin_cfg.h
ASCLIN on-chip implementation data.
file | IfxAsclin_PinMap.c
ASCLIN I/O map.
file | IfxAsclin_PinMap.h
ASCLIN I/O map.
file | IfxAsclin_Asc.h
ASCLIN ASC details.
file | IfxAsclin_Lin.h
ASCLIN LIN details.
file | IfxAsclin_Spi.h
ASCLIN SPI details.
file | IfxAsclin.h
ASCLIN basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » ASCLIN
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » ASCLIN » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxAsclin_Index {
IfxAsclin_Index_none = -1,
IfxAsclin_Index_0 = 0,
IfxAsclin_Index_1,
IfxAsclin_Index_2,
IfxAsclin_Index_3
}
List of the available Asclin resources. More...

Detailed Description

Enumeration Type Documentation

◆ IfxAsclin_Index

enum IfxAsclin_Index

List of the available Asclin resources.

Enumerator
IfxAsclin_Index_none | Not Selected.
IfxAsclin_Index_0 | ASCLIN Index 0.
IfxAsclin_Index_1 | ASCLIN Index 1.
IfxAsclin_Index_2 | ASCLIN Index 2.
IfxAsclin_Index_3 | ASCLIN Index 3.

Definition at line 77 of file IfxAsclin_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » ASCLIN
Collaboration diagram for Standard Driver:

Modules

Enumerations
Operative Functions
Utility Functions
Configuration Functions
External Functions
IO Pin Configuration Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » ASCLIN » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxAsclin_Checksum {
IfxAsclin_Checksum_classic = 0,
IfxAsclin_Checksum_enhanced = 1
}
Defines if the classic or the enhanced checksum will be calculated by the checksum block.
Definition in Ifx_ASCLIN.DATCON.B.CSM. More...
enum IfxAsclin_ChecksumInjection {
IfxAsclin_ChecksumInjection_notWritten = 0,
IfxAsclin_ChecksumInjection_written = 1
}
Defines if the received checksum byte is written into the RXFifo or not.
Definition in Ifx_ASCLIN.LIN.CON.B.CSI. More...
enum IfxAsclin_ClockPolarity {
IfxAsclin_ClockPolarity_idleLow = 0,
IfxAsclin_ClockPolarity_idleHigh = 1
}
CPOL defines the idle level of the clock signal in the SPI mode.
Idle level is the level outside the data transmission time intervals.
Definition in Ifx_ASCLIN.IOCR.B.CPOL. More...
enum IfxAsclin_ClockSource {
IfxAsclin_ClockSource_noClock = 0,
IfxAsclin_ClockSource_kernelClock = 1,
IfxAsclin_ClockSource_oscillatorClock = 2,
IfxAsclin_ClockSource_flexRayClock = 4,
IfxAsclin_ClockSource_ascFastClock = 8,
IfxAsclin_ClockSource_ascSlowClock = 16
}
Selection of clock source
Definition in Ifx_ASCLIN.CSR.B.CLKSEL. More...
enum IfxAsclin_CtsInputSelect {
IfxAsclin_CtsInputSelect_0,
IfxAsclin_CtsInputSelect_1,
IfxAsclin_CtsInputSelect_2,
IfxAsclin_CtsInputSelect_3
}
CTS input pin selection
Definition in Ifx_ASCLIN.IOCR.B.CTS. More...
enum IfxAsclin_DataLength {
IfxAsclin_DataLength_1 = 0,
IfxAsclin_DataLength_2,
IfxAsclin_DataLength_3,
IfxAsclin_DataLength_4,
IfxAsclin_DataLength_5,
IfxAsclin_DataLength_6,
IfxAsclin_DataLength_7,
IfxAsclin_DataLength_8,
IfxAsclin_DataLength_9,
IfxAsclin_DataLength_10,
IfxAsclin_DataLength_11,
IfxAsclin_DataLength_12,
IfxAsclin_DataLength_13,
IfxAsclin_DataLength_14,
IfxAsclin_DataLength_15,
IfxAsclin_DataLength_16
}
Number of bits per transfer
Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN. More...
enum IfxAsclin_FrameMode {
IfxAsclin_FrameMode_initialise = 0,
IfxAsclin_FrameMode_asc = 1,
IfxAsclin_FrameMode_spi = 2,
IfxAsclin_FrameMode_lin = 3
}
Defines the basic operating mode of the module. Changing the mode must be done by switching first to initialize mode, and then to the other mode.
Definition in Ifx_ASCLIN.FRAMECON.B.MODE. More...
enum IfxAsclin_HeaderResponseSelect {
IfxAsclin_HeaderResponseSelect_headerAndResponse = 0,
IfxAsclin_HeaderResponseSelect_headerOnly = 1
}
Defines if LIN frame shall consist of a header and response or of a header only.
Definition in Ifx_ASCLIN.DATCON.B.HO. More...
enum IfxAsclin_IdleDelay {
IfxAsclin_IdleDelay_0,
IfxAsclin_IdleDelay_1,
IfxAsclin_IdleDelay_2,
IfxAsclin_IdleDelay_3,
IfxAsclin_IdleDelay_4,
IfxAsclin_IdleDelay_5,
IfxAsclin_IdleDelay_6,
IfxAsclin_IdleDelay_7
}
Defines the duration of the IDLE delay in bit times.
SPI mode: this is the idle time between the frames.
ASC and LIN mode: this is the pause inserted between transmission of bytes.
Definition in Ifx_ASCLIN.FRAMECON.B.IDLE. More...
enum IfxAsclin_LeadDelay {
IfxAsclin_LeadDelay_0,
IfxAsclin_LeadDelay_1,
IfxAsclin_LeadDelay_2,
IfxAsclin_LeadDelay_3,
IfxAsclin_LeadDelay_4,
IfxAsclin_LeadDelay_5,
IfxAsclin_LeadDelay_6,
IfxAsclin_LeadDelay_7
}
Defines the leading delay in bit times in SPI mode. ASC mode: not applicable.
LIN mode: delay between the end of the break and the start of the sync character.
Definition in Ifx_ASCLIN.FRAMECON.B.LEAD. More...
enum IfxAsclin_LinMode {
IfxAsclin_LinMode_slave = 0,
IfxAsclin_LinMode_master = 1
}
Configures if the module in LIN mode operates as master or slave
Definition in Ifx_ASCLIN.LIN.CON.B.MS. More...
enum IfxAsclin_LinResponseTimeoutMode {
IfxAsclin_LinResponseTimeoutMode_frameTimeout = 0,
IfxAsclin_LinResponseTimeoutMode_responseTimeout = 1
}
Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout.
Definition in Ifx_ASCLIN.DATCON.B.RM. More...
enum IfxAsclin_OversamplingFactor {
IfxAsclin_OversamplingFactor_4 = 3,
IfxAsclin_OversamplingFactor_5 = 4,
IfxAsclin_OversamplingFactor_6 = 5,
IfxAsclin_OversamplingFactor_7 = 6,
IfxAsclin_OversamplingFactor_8 = 7,
IfxAsclin_OversamplingFactor_9 = 8,
IfxAsclin_OversamplingFactor_10 = 9,
IfxAsclin_OversamplingFactor_11 = 10,
IfxAsclin_OversamplingFactor_12 = 11,
IfxAsclin_OversamplingFactor_13 = 12,
IfxAsclin_OversamplingFactor_14 = 13,
IfxAsclin_OversamplingFactor_15 = 14,
IfxAsclin_OversamplingFactor_16 = 15
}
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed
Definition in Ifx_ASCLIN.BITCON.B.OVERSAMPLING. More...
enum IfxAsclin_ParityType {
IfxAsclin_ParityType_even = 0,
IfxAsclin_ParityType_odd = 1
}
Type of parity bit attached to data bits
Definition in Ifx_ASCLIN.FRAMECON.B.ODD. More...
enum IfxAsclin_ReceiveBufferMode {
IfxAsclin_ReceiveBufferMode_rxFifo = 0,
IfxAsclin_ReceiveBufferMode_rxBuffer = 1
}
Receive buffer mode
Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF. More...
enum IfxAsclin_RtsCtsPolarity {
IfxAsclin_RtsCtsPolarity_activeHigh = 0,
IfxAsclin_RtsCtsPolarity_activeLow = 1
}
Polarity of the RTS and CTS signals
Definition in Ifx_ASCLIN.IOCR.B.RCPOL. More...
enum IfxAsclin_RxFifoInterruptLevel {
IfxAsclin_RxFifoInterruptLevel_1,
IfxAsclin_RxFifoInterruptLevel_2,
IfxAsclin_RxFifoInterruptLevel_3,
IfxAsclin_RxFifoInterruptLevel_4,
IfxAsclin_RxFifoInterruptLevel_5,
IfxAsclin_RxFifoInterruptLevel_6,
IfxAsclin_RxFifoInterruptLevel_7,
IfxAsclin_RxFifoInterruptLevel_8,
IfxAsclin_RxFifoInterruptLevel_9,
IfxAsclin_RxFifoInterruptLevel_10,
IfxAsclin_RxFifoInterruptLevel_11,
IfxAsclin_RxFifoInterruptLevel_12,
IfxAsclin_RxFifoInterruptLevel_13,
IfxAsclin_RxFifoInterruptLevel_14,
IfxAsclin_RxFifoInterruptLevel_15,
IfxAsclin_RxFifoInterruptLevel_16
}
Defines the filling level that triggers a drain (RX) interrupt or DMA access
Definition in Ifx_ASCLIN.RXFIFOCON.B.INTLEVEL. More...
enum IfxAsclin_RxFifoOutletWidth {
IfxAsclin_RxFifoOutletWidth_0,
IfxAsclin_RxFifoOutletWidth_1,
IfxAsclin_RxFifoOutletWidth_2,
IfxAsclin_RxFifoOutletWidth_3
}
Defines the number of bytes read from the Rx FIFO with one FPI bus read
Definition in Ifx_ASCLIN.RXFIFOCON.B.OUTW. More...
enum IfxAsclin_RxInputSelect {
IfxAsclin_RxInputSelect_0,
IfxAsclin_RxInputSelect_1,
IfxAsclin_RxInputSelect_2,
IfxAsclin_RxInputSelect_3,
IfxAsclin_RxInputSelect_4,
IfxAsclin_RxInputSelect_5,
IfxAsclin_RxInputSelect_6,
IfxAsclin_RxInputSelect_7
}
Alternate input selection for Rx signal.
Definition in Ifx_ASCLIN.IOCR.B.ALTI. More...
enum IfxAsclin_SamplePointPosition {
IfxAsclin_SamplePointPosition_1 = 1,
IfxAsclin_SamplePointPosition_2 = 2,
IfxAsclin_SamplePointPosition_3 = 3,
IfxAsclin_SamplePointPosition_4 = 4,
IfxAsclin_SamplePointPosition_5 = 5,
IfxAsclin_SamplePointPosition_6 = 6,
IfxAsclin_SamplePointPosition_7 = 7,
IfxAsclin_SamplePointPosition_8 = 8,
IfxAsclin_SamplePointPosition_9 = 9,
IfxAsclin_SamplePointPosition_10 = 10,
IfxAsclin_SamplePointPosition_11 = 11,
IfxAsclin_SamplePointPosition_12 = 12,
IfxAsclin_SamplePointPosition_13 = 13,
IfxAsclin_SamplePointPosition_14 = 14,
IfxAsclin_SamplePointPosition_15 = 15
}
Sample point position
Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT. More...
enum IfxAsclin_SamplesPerBit {
IfxAsclin_SamplesPerBit_one = 0,
IfxAsclin_SamplesPerBit_three = 1
}
Number of samples per bit, sample mode/medianfilter
Definition in Ifx_ASCLIN.BITCON.B.SM. More...
enum IfxAsclin_ShiftDirection {
IfxAsclin_ShiftDirection_lsbFirst = 0,
IfxAsclin_ShiftDirection_msbFirst = 1
}
SPI mode: defines the shift direction of the shift register.
ASC and LIN mode: should be set to 0.
Definition in Ifx_ASCLIN.FRAMECON.B.MSB. More...
enum IfxAsclin_SlavePolarity {
IfxAsclin_SlavePolarity_idleLow = 0,
IfxAsclin_SlavePolarity_idlehigh = 1
}
Defines the idle level of the SLSO signal, which is the level.
Outside the data transmission, leading and trailing time intervals.
Definition in Ifx_ASCLIN.IOCR.B.SPOL. More...
enum IfxAsclin_SleepMode {
IfxAsclin_SleepMode_enable = 0,
IfxAsclin_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ASCLIN.CLC.B.EDIS. More...
enum IfxAsclin_Status {
IfxAsclin_Status_configurationError = 0,
IfxAsclin_Status_noError = 1
}
Error status. More...
enum IfxAsclin_StopBit {
IfxAsclin_StopBit_0,
IfxAsclin_StopBit_1,
IfxAsclin_StopBit_2,
IfxAsclin_StopBit_3,
IfxAsclin_StopBit_4,
IfxAsclin_StopBit_5,
IfxAsclin_StopBit_6,
IfxAsclin_StopBit_7
}
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay.
Definition in Ifx_ASCLIN.FRAMECON.B.STOP. More...
enum IfxAsclin_SuspendMode {
IfxAsclin_SuspendMode_none = 0,
IfxAsclin_SuspendMode_hard = 1,
IfxAsclin_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxAsclin_TxFifoInletWidth {
IfxAsclin_TxFifoInletWidth_0,
IfxAsclin_TxFifoInletWidth_1,
IfxAsclin_TxFifoInletWidth_2,
IfxAsclin_TxFifoInletWidth_3
}
Defines the number of bytes written to the Tx FIFO with one FPI bus write
Definition in Ifx_ASCLIN.TXFIFOCON.B.INW. More...
enum IfxAsclin_TxFifoInterruptLevel {
IfxAsclin_TxFifoInterruptLevel_0,
IfxAsclin_TxFifoInterruptLevel_1,
IfxAsclin_TxFifoInterruptLevel_2,
IfxAsclin_TxFifoInterruptLevel_3,
IfxAsclin_TxFifoInterruptLevel_4,
IfxAsclin_TxFifoInterruptLevel_5,
IfxAsclin_TxFifoInterruptLevel_6,
IfxAsclin_TxFifoInterruptLevel_7,
IfxAsclin_TxFifoInterruptLevel_8,
IfxAsclin_TxFifoInterruptLevel_9,
IfxAsclin_TxFifoInterruptLevel_10,
IfxAsclin_TxFifoInterruptLevel_11,
IfxAsclin_TxFifoInterruptLevel_12,
IfxAsclin_TxFifoInterruptLevel_13,
IfxAsclin_TxFifoInterruptLevel_14,
IfxAsclin_TxFifoInterruptLevel_15
}
Defines the filling level that triggers a refill (TX) interrupt or DMA access
Definition in Ifx_ASCLIN.TXFIFOCON.B.INTLEVEL. More...

Detailed Description

Enumeration Type Documentation

◆ IfxAsclin_Checksum

enum IfxAsclin_Checksum

Defines if the classic or the enhanced checksum will be calculated by the checksum block.
Definition in Ifx_ASCLIN.DATCON.B.CSM.

Enumerator
IfxAsclin_Checksum_classic | classic checksum
IfxAsclin_Checksum_enhanced | enhanced checksum

Definition at line 81 of file IfxAsclin.h.

◆ IfxAsclin_ChecksumInjection

enum IfxAsclin_ChecksumInjection

Defines if the received checksum byte is written into the RXFifo or not.
Definition in Ifx_ASCLIN.LIN.CON.B.CSI.

Enumerator
IfxAsclin_ChecksumInjection_notWritten | checksum byte is not written
IfxAsclin_ChecksumInjection_written | checksum byte is written

Definition at line 90 of file IfxAsclin.h.

◆ IfxAsclin_ClockPolarity

enum IfxAsclin_ClockPolarity

CPOL defines the idle level of the clock signal in the SPI mode.
Idle level is the level outside the data transmission time intervals.
Definition in Ifx_ASCLIN.IOCR.B.CPOL.

Enumerator
IfxAsclin_ClockPolarity_idleLow | idle low
IfxAsclin_ClockPolarity_idleHigh | idle high

Definition at line 100 of file IfxAsclin.h.

◆ IfxAsclin_ClockSource

enum IfxAsclin_ClockSource

Selection of clock source
Definition in Ifx_ASCLIN.CSR.B.CLKSEL.

Enumerator
IfxAsclin_ClockSource_noClock | no clock will be supplied
IfxAsclin_ClockSource_kernelClock | f clc will be supplied
IfxAsclin_ClockSource_oscillatorClock | XTAL oscillator clock foso0 will be supplied.
IfxAsclin_ClockSource_flexRayClock | f eray will be supplied
IfxAsclin_ClockSource_ascFastClock | f asclinf wiil be supplied
IfxAsclin_ClockSource_ascSlowClock | f asclins will be supplied

Definition at line 109 of file IfxAsclin.h.

◆ IfxAsclin_CtsInputSelect

enum IfxAsclin_CtsInputSelect

CTS input pin selection
Definition in Ifx_ASCLIN.IOCR.B.CTS.

Enumerator
IfxAsclin_CtsInputSelect_0 | CTS input pin 0.
IfxAsclin_CtsInputSelect_1 | CTS input pin 1.
IfxAsclin_CtsInputSelect_2 | CTS input pin 2.
IfxAsclin_CtsInputSelect_3 | CTS input pin 3.

Definition at line 122 of file IfxAsclin.h.

◆ IfxAsclin_DataLength

enum IfxAsclin_DataLength

Number of bits per transfer
Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.

Enumerator
IfxAsclin_DataLength_1 | number of bits per transfer 0
IfxAsclin_DataLength_2 | number of bits per transfer 1
IfxAsclin_DataLength_3 | number of bits per transfer 2
IfxAsclin_DataLength_4 | number of bits per transfer 3
IfxAsclin_DataLength_5 | number of bits per transfer 4
IfxAsclin_DataLength_6 | number of bits per transfer 5
IfxAsclin_DataLength_7 | number of bits per transfer 6
IfxAsclin_DataLength_8 | number of bits per transfer 7
IfxAsclin_DataLength_9 | number of bits per transfer 8
IfxAsclin_DataLength_10 | number of bits per transfer 9
IfxAsclin_DataLength_11 | number of bits per transfer 10
IfxAsclin_DataLength_12 | number of bits per transfer 11
IfxAsclin_DataLength_13 | number of bits per transfer 12
IfxAsclin_DataLength_14 | number of bits per transfer 13
IfxAsclin_DataLength_15 | number of bits per transfer 14
IfxAsclin_DataLength_16 | number of bits per transfer 15

Definition at line 133 of file IfxAsclin.h.

◆ IfxAsclin_FrameMode

enum IfxAsclin_FrameMode

Defines the basic operating mode of the module. Changing the mode must be done by switching first to initialize mode, and then to the other mode.
Definition in Ifx_ASCLIN.FRAMECON.B.MODE.

Enumerator
IfxAsclin_FrameMode_initialise | initialise mode
IfxAsclin_FrameMode_asc | asc mode
IfxAsclin_FrameMode_spi | spi mode
IfxAsclin_FrameMode_lin | lin mode

Definition at line 156 of file IfxAsclin.h.

◆ IfxAsclin_HeaderResponseSelect

enum IfxAsclin_HeaderResponseSelect

Defines if LIN frame shall consist of a header and response or of a header only.
Definition in Ifx_ASCLIN.DATCON.B.HO.

Enumerator
IfxAsclin_HeaderResponseSelect_headerAndResponse | header and response expected
IfxAsclin_HeaderResponseSelect_headerOnly | header only expected

Definition at line 167 of file IfxAsclin.h.

◆ IfxAsclin_IdleDelay

enum IfxAsclin_IdleDelay

Defines the duration of the IDLE delay in bit times.
SPI mode: this is the idle time between the frames.
ASC and LIN mode: this is the pause inserted between transmission of bytes.
Definition in Ifx_ASCLIN.FRAMECON.B.IDLE.

Enumerator
IfxAsclin_IdleDelay_0 | idle delay in 0 bit times
IfxAsclin_IdleDelay_1 | idle delay in 1 bit times
IfxAsclin_IdleDelay_2 | idle delay in 2 bit times
IfxAsclin_IdleDelay_3 | idle delay in 3 bit times
IfxAsclin_IdleDelay_4 | idle delay in 4 bit times
IfxAsclin_IdleDelay_5 | idle delay in 5 bit times
IfxAsclin_IdleDelay_6 | idle delay in 6 bit times
IfxAsclin_IdleDelay_7 | idle delay in 7 bit times

Definition at line 178 of file IfxAsclin.h.

◆ IfxAsclin_LeadDelay

enum IfxAsclin_LeadDelay

Defines the leading delay in bit times in SPI mode. ASC mode: not applicable.
LIN mode: delay between the end of the break and the start of the sync character.
Definition in Ifx_ASCLIN.FRAMECON.B.LEAD.

Enumerator
IfxAsclin_LeadDelay_0 | lead delay in 0 bit times
IfxAsclin_LeadDelay_1 | lead delay in 1 bit times
IfxAsclin_LeadDelay_2 | lead delay in 2 bit times
IfxAsclin_LeadDelay_3 | lead delay in 3 bit times
IfxAsclin_LeadDelay_4 | lead delay in 4 bit times
IfxAsclin_LeadDelay_5 | lead delay in 5 bit times
IfxAsclin_LeadDelay_6 | lead delay in 6 bit times
IfxAsclin_LeadDelay_7 | lead delay in 7 bit times

Definition at line 194 of file IfxAsclin.h.

◆ IfxAsclin_LinMode

enum IfxAsclin_LinMode

Configures if the module in LIN mode operates as master or slave
Definition in Ifx_ASCLIN.LIN.CON.B.MS.

Enumerator
IfxAsclin_LinMode_slave | operates in slave mode
IfxAsclin_LinMode_master | operates in master mode

Definition at line 209 of file IfxAsclin.h.

◆ IfxAsclin_LinResponseTimeoutMode

enum IfxAsclin_LinResponseTimeoutMode

Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout.
Definition in Ifx_ASCLIN.DATCON.B.RM.

Enumerator
IfxAsclin_LinResponseTimeoutMode_frameTimeout | timeout threshold is for frame
IfxAsclin_LinResponseTimeoutMode_responseTimeout | timeout threshold is for reponse

Definition at line 218 of file IfxAsclin.h.

◆ IfxAsclin_OversamplingFactor

enum IfxAsclin_OversamplingFactor

Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed
Definition in Ifx_ASCLIN.BITCON.B.OVERSAMPLING.

Enumerator
IfxAsclin_OversamplingFactor_4 | oversampling factor 4
IfxAsclin_OversamplingFactor_5 | oversampling factor 5
IfxAsclin_OversamplingFactor_6 | oversampling factor 6
IfxAsclin_OversamplingFactor_7 | oversampling factor 7
IfxAsclin_OversamplingFactor_8 | oversampling factor 8
IfxAsclin_OversamplingFactor_9 | oversampling factor 9
IfxAsclin_OversamplingFactor_10 | oversampling factor 10
IfxAsclin_OversamplingFactor_11 | oversampling factor 11
IfxAsclin_OversamplingFactor_12 | oversampling factor 12
IfxAsclin_OversamplingFactor_13 | oversampling factor 13
IfxAsclin_OversamplingFactor_14 | oversampling factor 14
IfxAsclin_OversamplingFactor_15 | oversampling factor 15
IfxAsclin_OversamplingFactor_16 | oversampling factor 16

Definition at line 227 of file IfxAsclin.h.

◆ IfxAsclin_ParityType

enum IfxAsclin_ParityType

Type of parity bit attached to data bits
Definition in Ifx_ASCLIN.FRAMECON.B.ODD.

Enumerator
IfxAsclin_ParityType_even | even parity
IfxAsclin_ParityType_odd | odd parity

Definition at line 247 of file IfxAsclin.h.

◆ IfxAsclin_ReceiveBufferMode

enum IfxAsclin_ReceiveBufferMode

Receive buffer mode
Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF.

Enumerator
IfxAsclin_ReceiveBufferMode_rxFifo | RxFIFO mode.
IfxAsclin_ReceiveBufferMode_rxBuffer | single stage Rx buffer

Definition at line 256 of file IfxAsclin.h.

◆ IfxAsclin_RtsCtsPolarity

enum IfxAsclin_RtsCtsPolarity

Polarity of the RTS and CTS signals
Definition in Ifx_ASCLIN.IOCR.B.RCPOL.

Enumerator
IfxAsclin_RtsCtsPolarity_activeHigh | ready/clear are active-high
IfxAsclin_RtsCtsPolarity_activeLow | ready/clear are active-low

Definition at line 265 of file IfxAsclin.h.

◆ IfxAsclin_RxFifoInterruptLevel

enum IfxAsclin_RxFifoInterruptLevel

Defines the filling level that triggers a drain (RX) interrupt or DMA access
Definition in Ifx_ASCLIN.RXFIFOCON.B.INTLEVEL.

Enumerator
IfxAsclin_RxFifoInterruptLevel_1 | RX FIFO level 1.
IfxAsclin_RxFifoInterruptLevel_2 | RX FIFO level 2.
IfxAsclin_RxFifoInterruptLevel_3 | RX FIFO level 3.
IfxAsclin_RxFifoInterruptLevel_4 | RX FIFO level 4.
IfxAsclin_RxFifoInterruptLevel_5 | RX FIFO level 5.
IfxAsclin_RxFifoInterruptLevel_6 | RX FIFO level 6.
IfxAsclin_RxFifoInterruptLevel_7 | RX FIFO level 7.
IfxAsclin_RxFifoInterruptLevel_8 | RX FIFO level 8.
IfxAsclin_RxFifoInterruptLevel_9 | RX FIFO level 9.
IfxAsclin_RxFifoInterruptLevel_10 | RX FIFO level 10.
IfxAsclin_RxFifoInterruptLevel_11 | RX FIFO level 11.
IfxAsclin_RxFifoInterruptLevel_12 | RX FIFO level 12.
IfxAsclin_RxFifoInterruptLevel_13 | RX FIFO level 13.
IfxAsclin_RxFifoInterruptLevel_14 | RX FIFO level 14.
IfxAsclin_RxFifoInterruptLevel_15 | RX FIFO level 15.
IfxAsclin_RxFifoInterruptLevel_16 | RX FIFO level 16.

Definition at line 274 of file IfxAsclin.h.

◆ IfxAsclin_RxFifoOutletWidth

enum IfxAsclin_RxFifoOutletWidth

Defines the number of bytes read from the Rx FIFO with one FPI bus read
Definition in Ifx_ASCLIN.RXFIFOCON.B.OUTW.

Enumerator
IfxAsclin_RxFifoOutletWidth_0 | number of bytes 0
IfxAsclin_RxFifoOutletWidth_1 | number of bytes 1
IfxAsclin_RxFifoOutletWidth_2 | number of bytes 2
IfxAsclin_RxFifoOutletWidth_3 | number of bytes 3

Definition at line 297 of file IfxAsclin.h.

◆ IfxAsclin_RxInputSelect

enum IfxAsclin_RxInputSelect

Alternate input selection for Rx signal.
Definition in Ifx_ASCLIN.IOCR.B.ALTI.

Enumerator
IfxAsclin_RxInputSelect_0 | alternate input selection 0
IfxAsclin_RxInputSelect_1 | alternate input selection 1
IfxAsclin_RxInputSelect_2 | alternate input selection 2
IfxAsclin_RxInputSelect_3 | alternate input selection 3
IfxAsclin_RxInputSelect_4 | alternate input selection 4
IfxAsclin_RxInputSelect_5 | alternate input selection 5
IfxAsclin_RxInputSelect_6 | alternate input selection 6
IfxAsclin_RxInputSelect_7 | alternate input selection 7

Definition at line 308 of file IfxAsclin.h.

◆ IfxAsclin_SamplePointPosition

enum IfxAsclin_SamplePointPosition

Sample point position
Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.

Enumerator
IfxAsclin_SamplePointPosition_1 | sample point position at 1
IfxAsclin_SamplePointPosition_2 | sample point position at 2
IfxAsclin_SamplePointPosition_3 | sample point position at 3
IfxAsclin_SamplePointPosition_4 | sample point position at 4
IfxAsclin_SamplePointPosition_5 | sample point position at 5
IfxAsclin_SamplePointPosition_6 | sample point position at 6
IfxAsclin_SamplePointPosition_7 | sample point position at 7
IfxAsclin_SamplePointPosition_8 | sample point position at 8
IfxAsclin_SamplePointPosition_9 | sample point position at 9
IfxAsclin_SamplePointPosition_10 | sample point position at 10
IfxAsclin_SamplePointPosition_11 | sample point position at 11
IfxAsclin_SamplePointPosition_12 | sample point position at 12
IfxAsclin_SamplePointPosition_13 | sample point position at 13
IfxAsclin_SamplePointPosition_14 | sample point position at 14
IfxAsclin_SamplePointPosition_15 | sample point position at 15

Definition at line 323 of file IfxAsclin.h.

◆ IfxAsclin_SamplesPerBit

enum IfxAsclin_SamplesPerBit

Number of samples per bit, sample mode/medianfilter
Definition in Ifx_ASCLIN.BITCON.B.SM.

Enumerator
IfxAsclin_SamplesPerBit_one | one sample per bit
IfxAsclin_SamplesPerBit_three | three samples per bit

Definition at line 345 of file IfxAsclin.h.

◆ IfxAsclin_ShiftDirection

enum IfxAsclin_ShiftDirection

SPI mode: defines the shift direction of the shift register.
ASC and LIN mode: should be set to 0.
Definition in Ifx_ASCLIN.FRAMECON.B.MSB.

Enumerator
IfxAsclin_ShiftDirection_lsbFirst | LSB first.
IfxAsclin_ShiftDirection_msbFirst | MSB first.

Definition at line 355 of file IfxAsclin.h.

◆ IfxAsclin_SlavePolarity

enum IfxAsclin_SlavePolarity

Defines the idle level of the SLSO signal, which is the level.
Outside the data transmission, leading and trailing time intervals.
Definition in Ifx_ASCLIN.IOCR.B.SPOL.

Enumerator
IfxAsclin_SlavePolarity_idleLow | idle low
IfxAsclin_SlavePolarity_idlehigh | idle high

Definition at line 365 of file IfxAsclin.h.

◆ IfxAsclin_SleepMode

enum IfxAsclin_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ASCLIN.CLC.B.EDIS.

Enumerator
IfxAsclin_SleepMode_enable | enables sleep mode
IfxAsclin_SleepMode_disable | disables sleep mode

Definition at line 374 of file IfxAsclin.h.

◆ IfxAsclin_Status

enum IfxAsclin_Status

Error status.

Enumerator
IfxAsclin_Status_configurationError | Configuration error.
IfxAsclin_Status_noError | No error.

Definition at line 382 of file IfxAsclin.h.

◆ IfxAsclin_StopBit

enum IfxAsclin_StopBit

ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay.
Definition in Ifx_ASCLIN.FRAMECON.B.STOP.

Enumerator
IfxAsclin_StopBit_0 | number of stop bits 0
IfxAsclin_StopBit_1 | number of stop bits 1
IfxAsclin_StopBit_2 | number of stop bits 2
IfxAsclin_StopBit_3 | number of stop bits 3
IfxAsclin_StopBit_4 | number of stop bits 4
IfxAsclin_StopBit_5 | number of stop bits 5
IfxAsclin_StopBit_6 | number of stop bits 6
IfxAsclin_StopBit_7 | number of stop bits 7

Definition at line 391 of file IfxAsclin.h.

◆ IfxAsclin_SuspendMode

enum IfxAsclin_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxAsclin_SuspendMode_none | No suspend.
IfxAsclin_SuspendMode_hard | Hard Suspend.
IfxAsclin_SuspendMode_soft | Soft Suspend.

Definition at line 405 of file IfxAsclin.h.

◆ IfxAsclin_TxFifoInletWidth

enum IfxAsclin_TxFifoInletWidth

Defines the number of bytes written to the Tx FIFO with one FPI bus write
Definition in Ifx_ASCLIN.TXFIFOCON.B.INW.

Enumerator
IfxAsclin_TxFifoInletWidth_0 | number of bytes 0
IfxAsclin_TxFifoInletWidth_1 | number of bytes 1
IfxAsclin_TxFifoInletWidth_2 | number of bytes 2
IfxAsclin_TxFifoInletWidth_3 | number of bytes 3

Definition at line 415 of file IfxAsclin.h.

◆ IfxAsclin_TxFifoInterruptLevel

enum IfxAsclin_TxFifoInterruptLevel

Defines the filling level that triggers a refill (TX) interrupt or DMA access
Definition in Ifx_ASCLIN.TXFIFOCON.B.INTLEVEL.

Enumerator
IfxAsclin_TxFifoInterruptLevel_0 | TX FIFO level 0.
IfxAsclin_TxFifoInterruptLevel_1 | TX FIFO level 1.
IfxAsclin_TxFifoInterruptLevel_2 | TX FIFO level 2.
IfxAsclin_TxFifoInterruptLevel_3 | TX FIFO level 3.
IfxAsclin_TxFifoInterruptLevel_4 | TX FIFO level 4.
IfxAsclin_TxFifoInterruptLevel_5 | TX FIFO level 5.
IfxAsclin_TxFifoInterruptLevel_6 | TX FIFO level 6.
IfxAsclin_TxFifoInterruptLevel_7 | TX FIFO level 7.
IfxAsclin_TxFifoInterruptLevel_8 | TX FIFO level 8.
IfxAsclin_TxFifoInterruptLevel_9 | TX FIFO level 9.
IfxAsclin_TxFifoInterruptLevel_10 | TX FIFO level 10.
IfxAsclin_TxFifoInterruptLevel_11 | TX FIFO level 11.
IfxAsclin_TxFifoInterruptLevel_12 | TX FIFO level 12.
IfxAsclin_TxFifoInterruptLevel_13 | TX FIFO level 13.
IfxAsclin_TxFifoInterruptLevel_14 | TX FIFO level 14.
IfxAsclin_TxFifoInterruptLevel_15 | TX FIFO level 15.

Definition at line 426 of file IfxAsclin.h.


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » ASCLIN » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxAsclin_clearAllFlags (Ifx_ASCLIN *asclin)
clears all the flags More...
IFX_INLINE void | IfxAsclin_clearBreakDetectedFlag (Ifx_ASCLIN *asclin)
Clears the break detected flag. More...
IFX_INLINE void | IfxAsclin_clearCollisionDetectionErrorFlag (Ifx_ASCLIN *asclin)
Clears the collision detection error flag. More...
IFX_INLINE void | IfxAsclin_clearFallingEdgeDetectedFlag (Ifx_ASCLIN *asclin)
Clears the falling edge detected flag. More...
IFX_INLINE void | IfxAsclin_clearFrameErrorFlag (Ifx_ASCLIN *asclin)
Clears the frame error flag. More...
IFX_INLINE void | IfxAsclin_clearHeaderTimeoutFlag (Ifx_ASCLIN *asclin)
Clears the header timeout flag. More...
IFX_INLINE void | IfxAsclin_clearKernelResetStatus (Ifx_ASCLIN *asclin)
Clears the kernel reset status. More...
IFX_INLINE void | IfxAsclin_clearLinAutoBaudDetectionErrorFlag (Ifx_ASCLIN *asclin)
Clears the auto baudrate detection error flag. More...
IFX_INLINE void | IfxAsclin_clearLinChecksumErrorFlag (Ifx_ASCLIN *asclin)
Clears the LIN checksum error flag. More...
IFX_INLINE void | IfxAsclin_clearLinParityErrorFlag (Ifx_ASCLIN *asclin)
Clears the LIN parity error flag. More...
IFX_INLINE void | IfxAsclin_clearParityErrorFlag (Ifx_ASCLIN *asclin)
Clears the parity error flag. More...
IFX_INLINE void | IfxAsclin_clearRaisingEdgeDetectedFlag (Ifx_ASCLIN *asclin)
Clears the raising edge detected flag. More...
IFX_INLINE void | IfxAsclin_clearResponseTimeoutFlag (Ifx_ASCLIN *asclin)
Clears the response timeout flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoFillLevelFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoOverflowFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoUnderflowFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO underflow flag. More...
IFX_INLINE void | IfxAsclin_clearRxHeaderEndFlag (Ifx_ASCLIN *asclin)
Clears the receive header end flag. More...
IFX_INLINE void | IfxAsclin_clearRxResponseEndFlag (Ifx_ASCLIN *asclin)
Clears the receive response end flag. More...
IFX_INLINE void | IfxAsclin_clearTransmissionCompletedFlag (Ifx_ASCLIN *asclin)
Clears the transmission pending flag. More...
IFX_INLINE void | IfxAsclin_clearTxFifoFillLevelFlag (Ifx_ASCLIN *asclin)
Clears the Tx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_clearTxFifoOverflowFlag (Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_clearTxHeaderEndFlag (Ifx_ASCLIN *asclin)
Clears the transmit header end flag. More...
IFX_INLINE void | IfxAsclin_clearTxResponseEndFlag (Ifx_ASCLIN *asclin)
Clears the transmit response end flag. More...
IFX_INLINE void | IfxAsclin_flushRxFifo (Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO. More...
IFX_INLINE void | IfxAsclin_flushTxFifo (Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO. More...
IFX_INLINE void | IfxAsclin_setBrdLowerlimt (Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection's lower limit. More...
IFX_INLINE void | IfxAsclin_setBrdUpperlimt (Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection's upper limit. More...
IFX_INLINE void | IfxAsclin_setChecksumInjection (Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi)
Sets the checksum injection. More...
IFX_INLINE void | IfxAsclin_setChecksumMode (Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode)
Sets the checksum mode. More...
IFX_INLINE void | IfxAsclin_setDataLength (Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer) More...
IFX_INLINE void | IfxAsclin_setDenominator (Ifx_ASCLIN *asclin, uint16 denominator)
Sets the denominator of the fractional divider. More...
IFX_INLINE void | IfxAsclin_setDisableModuleRequest (Ifx_ASCLIN *asclin)
Sets the disable module request. More...
IFX_INLINE void | IfxAsclin_setEnableModuleRequest (Ifx_ASCLIN *asclin)
Sets the enable module request. More...
IFX_INLINE void | IfxAsclin_setFilterDepth (Ifx_ASCLIN *asclin, uint8 depth)
Sets digital glitch filter depth. More...
IFX_INLINE void | IfxAsclin_setHeaderResponseSelect (Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type)
Sets the header response selection. More...
IFX_INLINE void | IfxAsclin_setIdleDelay (Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay. More...
IFX_INLINE void | IfxAsclin_setKernelResetOne (Ifx_ASCLIN *asclin)
Sets the kernal reset of the KRST1. More...
IFX_INLINE void | IfxAsclin_setKernelResetZero (Ifx_ASCLIN *asclin)
Sets the kernel reset of the KRST0. More...
IFX_INLINE void | IfxAsclin_setLeadDelay (Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
Sets the lead delay. More...
IFX_INLINE void | IfxAsclin_setLinBreakLength (Ifx_ASCLIN *asclin, uint8 length)
Sets the LIN break length. More...
IFX_INLINE void | IfxAsclin_setLinHeaderTimeout (Ifx_ASCLIN *asclin, uint8 timeout)
Sets the LIN header timeout. More...
IFX_INLINE void | IfxAsclin_setLinMode (Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode)
Sets the LIN mode of operation. More...
IFX_INLINE void | IfxAsclin_setLinResponseTimeoutMode (Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode)
Sets the LIN response timeout mode. More...
IFX_INLINE void | IfxAsclin_setLinResponseTimeoutThreshold (Ifx_ASCLIN *asclin, uint16 threshold)
Sets the LIN response timeout threshold. More...
IFX_INLINE void | IfxAsclin_setNumerator (Ifx_ASCLIN *asclin, uint16 numerator)
Sets the numerator of the fractional divider. More...
IFX_INLINE void | IfxAsclin_setOversampling (Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor)
Sets the division ratio of the baudrate post divider. More...
IFX_INLINE void | IfxAsclin_setParityType (Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
Sets the parity type. More...
IFX_INLINE void | IfxAsclin_setPrescaler (Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler) More...
IFX_INLINE void | IfxAsclin_setRxBufferMode (Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
Sets the receive buffer mode. More...
IFX_INLINE void | IfxAsclin_setRxFifoInterruptLevel (Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level. More...
IFX_INLINE void | IfxAsclin_setRxFifoOutletWidth (Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width. More...
IFX_INLINE void | IfxAsclin_setSampleMode (Ifx_ASCLIN *asclin, IfxAsclin_SamplesPerBit medianFilter)
Sets the sample mode (number of samples per bit / median filter) More...
IFX_INLINE void | IfxAsclin_setSamplePointPosition (Ifx_ASCLIN *asclin, IfxAsclin_SamplePointPosition spPosition)
Sets the sampling point position. More...
IFX_INLINE void | IfxAsclin_setShiftDirection (Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction. More...
IFX_INLINE void | IfxAsclin_setStopBit (Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits. More...
IFX_INLINE void | IfxAsclin_setTransmitHeaderRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmit header request flag. More...
IFX_INLINE void | IfxAsclin_setTransmitResponseRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmit response request flag. More...
IFX_INLINE void | IfxAsclin_setTransmitWakeRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmission wake request flag. More...
IFX_INLINE void | IfxAsclin_setTxFifoInletWidth (Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width. More...
IFX_INLINE void | IfxAsclin_setTxFifoInterruptLevel (Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level. More...

Detailed Description

Function Documentation

◆ IfxAsclin_clearAllFlags()

IFX_INLINE void IfxAsclin_clearAllFlags ( Ifx_ASCLIN * asclin )

clears all the flags

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1595 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_ignoreHeader(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_clearBreakDetectedFlag()

IFX_INLINE void IfxAsclin_clearBreakDetectedFlag ( Ifx_ASCLIN * asclin )

Clears the break detected flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1601 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearCollisionDetectionErrorFlag()

IFX_INLINE void IfxAsclin_clearCollisionDetectionErrorFlag ( Ifx_ASCLIN * asclin )

Clears the collision detection error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1607 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearFallingEdgeDetectedFlag()

IFX_INLINE void IfxAsclin_clearFallingEdgeDetectedFlag ( Ifx_ASCLIN * asclin )

Clears the falling edge detected flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1613 of file IfxAsclin.h.

◆ IfxAsclin_clearFrameErrorFlag()

IFX_INLINE void IfxAsclin_clearFrameErrorFlag ( Ifx_ASCLIN * asclin )

Clears the frame error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1619 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_clearHeaderTimeoutFlag()

IFX_INLINE void IfxAsclin_clearHeaderTimeoutFlag ( Ifx_ASCLIN * asclin )

Clears the header timeout flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1625 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearKernelResetStatus()

IFX_INLINE void IfxAsclin_clearKernelResetStatus ( Ifx_ASCLIN * asclin )

Clears the kernel reset status.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1631 of file IfxAsclin.h.

◆ IfxAsclin_clearLinAutoBaudDetectionErrorFlag()

IFX_INLINE void IfxAsclin_clearLinAutoBaudDetectionErrorFlag ( Ifx_ASCLIN * asclin )

Clears the auto baudrate detection error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1637 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearLinChecksumErrorFlag()

IFX_INLINE void IfxAsclin_clearLinChecksumErrorFlag ( Ifx_ASCLIN * asclin )

Clears the LIN checksum error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1643 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearLinParityErrorFlag()

IFX_INLINE void IfxAsclin_clearLinParityErrorFlag ( Ifx_ASCLIN * asclin )

Clears the LIN parity error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1649 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearParityErrorFlag()

IFX_INLINE void IfxAsclin_clearParityErrorFlag ( Ifx_ASCLIN * asclin )

Clears the parity error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1655 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError().

◆ IfxAsclin_clearRaisingEdgeDetectedFlag()

IFX_INLINE void IfxAsclin_clearRaisingEdgeDetectedFlag ( Ifx_ASCLIN * asclin )

Clears the raising edge detected flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1661 of file IfxAsclin.h.

◆ IfxAsclin_clearResponseTimeoutFlag()

IFX_INLINE void IfxAsclin_clearResponseTimeoutFlag ( Ifx_ASCLIN * asclin )

Clears the response timeout flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1667 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearRxFifoFillLevelFlag()

IFX_INLINE void IfxAsclin_clearRxFifoFillLevelFlag ( Ifx_ASCLIN * asclin )

Clears the Rx FIFO level flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1673 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_isrReceive().

◆ IfxAsclin_clearRxFifoOverflowFlag()

IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag ( Ifx_ASCLIN * asclin )

Clears the Rx FIFO overflow flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1679 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_clearRxFifoUnderflowFlag()

IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag ( Ifx_ASCLIN * asclin )

Clears the Rx FIFO underflow flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1685 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_clearRxHeaderEndFlag()

IFX_INLINE void IfxAsclin_clearRxHeaderEndFlag ( Ifx_ASCLIN * asclin )

Clears the receive header end flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1691 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), and IfxAsclin_Lin_isrReceive().

◆ IfxAsclin_clearRxResponseEndFlag()

IFX_INLINE void IfxAsclin_clearRxResponseEndFlag ( Ifx_ASCLIN * asclin )

Clears the receive response end flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1697 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), and IfxAsclin_Lin_isrReceive().

◆ IfxAsclin_clearTransmissionCompletedFlag()

IFX_INLINE void IfxAsclin_clearTransmissionCompletedFlag ( Ifx_ASCLIN * asclin )

Clears the transmission pending flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1703 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearTxFifoFillLevelFlag()

IFX_INLINE void IfxAsclin_clearTxFifoFillLevelFlag ( Ifx_ASCLIN * asclin )

Clears the Tx FIFO level flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1709 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_isrTransmit().

◆ IfxAsclin_clearTxFifoOverflowFlag()

IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag ( Ifx_ASCLIN * asclin )

Clears the Tx FIFO overflow flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1715 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_clearTxHeaderEndFlag()

IFX_INLINE void IfxAsclin_clearTxHeaderEndFlag ( Ifx_ASCLIN * asclin )

Clears the transmit header end flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1721 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrTransmit().

◆ IfxAsclin_clearTxResponseEndFlag()

IFX_INLINE void IfxAsclin_clearTxResponseEndFlag ( Ifx_ASCLIN * asclin )

Clears the transmit response end flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1727 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrTransmit().

◆ IfxAsclin_flushRxFifo()

IFX_INLINE void IfxAsclin_flushRxFifo ( Ifx_ASCLIN * asclin )

Flushes (empties) the Rx FIFO.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1913 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_clearRx(), IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendHeader(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_flushTxFifo()

IFX_INLINE void IfxAsclin_flushTxFifo ( Ifx_ASCLIN * asclin )

Flushes (empties) the Tx FIFO.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1919 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_clearTx(), IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setBrdLowerlimt()

IFX_INLINE void IfxAsclin_setBrdLowerlimt | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 | limit
 | ) |  |

Sets the baudrate detection's lower limit.

Parameters
asclin | pointer to ASCLIN registers
limit | value of the lower limit
Returns
None

Definition at line 2186 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setBrdUpperlimt()

IFX_INLINE void IfxAsclin_setBrdUpperlimt | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 | limit
 | ) |  |

Sets the baudrate detection's upper limit.

Parameters
asclin | pointer to ASCLIN registers
limit | value of the upper limit
Returns
None

Definition at line 2192 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setChecksumInjection()

IFX_INLINE void IfxAsclin_setChecksumInjection | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ChecksumInjection | csi
 | ) |  |

Sets the checksum injection.

Parameters
asclin | pointer to ASCLIN registers
csi | checksum injection selection (not written / written)
Returns
None

Definition at line 2198 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setChecksumMode()

IFX_INLINE void IfxAsclin_setChecksumMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_Checksum | mode
 | ) |  |

Sets the checksum mode.

Parameters
asclin | pointer to ASCLIN registers
mode | checksum mode selection (classic / enhanced)
Returns
None

Definition at line 2204 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule(), and IfxAsclin_Lin_sendFrame().

◆ IfxAsclin_setDataLength()

IFX_INLINE void IfxAsclin_setDataLength | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_DataLength | length
 | ) |  |

Sets the data length (number of bits per transfer)

Parameters
asclin | pointer to ASCLIN registers
length | data length selection
Returns
None

Definition at line 2222 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setDenominator()

IFX_INLINE void IfxAsclin_setDenominator | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 | denominator
 | ) |  |

Sets the denominator of the fractional divider.

Parameters
asclin | pointer to ASCLIN registers
denominator | value of the denominator
Returns
None

Definition at line 2228 of file IfxAsclin.h.

Referenced by IfxAsclin_setBaudrateBitFields().

◆ IfxAsclin_setDisableModuleRequest()

IFX_INLINE void IfxAsclin_setDisableModuleRequest ( Ifx_ASCLIN * asclin )

Sets the disable module request.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2234 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_disableModule(), IfxAsclin_disableModule(), IfxAsclin_Lin_disableModule(), and IfxAsclin_Spi_disableModule().

◆ IfxAsclin_setEnableModuleRequest()

IFX_INLINE void IfxAsclin_setEnableModuleRequest ( Ifx_ASCLIN * asclin )

Sets the enable module request.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2240 of file IfxAsclin.h.

Referenced by IfxAsclin_enableModule().

◆ IfxAsclin_setFilterDepth()

IFX_INLINE void IfxAsclin_setFilterDepth | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 | depth
 | ) |  |

Sets digital glitch filter depth.

Parameters
asclin | pointer to ASCLIN registers
depth | digital glitch filter depth selection (1 to 63)
Returns
None

Definition at line 2246 of file IfxAsclin.h.

◆ IfxAsclin_setHeaderResponseSelect()

IFX_INLINE void IfxAsclin_setHeaderResponseSelect | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_HeaderResponseSelect | type
 | ) |  |

Sets the header response selection.

Parameters
asclin | pointer to ASCLIN registers
type | type of selection (header and response or header only)
Returns
None

Definition at line 2258 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_ignoreHeader(), and IfxAsclin_Lin_initModule().

◆ IfxAsclin_setIdleDelay()

IFX_INLINE void IfxAsclin_setIdleDelay | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_IdleDelay | delay
 | ) |  |

Sets the idle delay.

Parameters
asclin | pointer to ASCLIN registers
delay | idle delay selection
Returns
None

Definition at line 2264 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setKernelResetOne()

IFX_INLINE void IfxAsclin_setKernelResetOne ( Ifx_ASCLIN * asclin )

Sets the kernal reset of the KRST1.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2270 of file IfxAsclin.h.

◆ IfxAsclin_setKernelResetZero()

IFX_INLINE void IfxAsclin_setKernelResetZero ( Ifx_ASCLIN * asclin )

Sets the kernel reset of the KRST0.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2276 of file IfxAsclin.h.

◆ IfxAsclin_setLeadDelay()

IFX_INLINE void IfxAsclin_setLeadDelay | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_LeadDelay | delay
 | ) |  |

Sets the lead delay.

Parameters
asclin | pointer to ASCLIN registers
delay | lead delay selection
Returns
None

Definition at line 2282 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setLinBreakLength()

IFX_INLINE void IfxAsclin_setLinBreakLength | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 | length
 | ) |  |

Sets the LIN break length.

Parameters
asclin | pointer to ASCLIN registers
length | value of the break length
Returns
None

Definition at line 2288 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setLinHeaderTimeout()

IFX_INLINE void IfxAsclin_setLinHeaderTimeout | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 | timeout
 | ) |  |

Sets the LIN header timeout.

Parameters
asclin | pointer to ASCLIN registers
timeout | value of the header timeout
Returns
None

Definition at line 2294 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setLinMode()

IFX_INLINE void IfxAsclin_setLinMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_LinMode | mode
 | ) |  |

Sets the LIN mode of operation.

Parameters
asclin | pointer to ASCLIN registers
mode | mode selection (slave / master)
Returns
None

Definition at line 2300 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setLinResponseTimeoutMode()

IFX_INLINE void IfxAsclin_setLinResponseTimeoutMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_LinResponseTimeoutMode | mode
 | ) |  |

Sets the LIN response timeout mode.

Parameters
asclin | pointer to ASCLIN registers
mode | LIN response timeout mode selection
Returns
None

Definition at line 2306 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setLinResponseTimeoutThreshold()

IFX_INLINE void IfxAsclin_setLinResponseTimeoutThreshold | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 | threshold
 | ) |  |

Sets the LIN response timeout threshold.

Parameters
asclin | pointer to ASCLIN registers
threshold | value of the tomeout threshold (1 to 256 bit times)
Returns
None

Definition at line 2312 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setNumerator()

IFX_INLINE void IfxAsclin_setNumerator | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 | numerator
 | ) |  |

Sets the numerator of the fractional divider.

Parameters
asclin | pointer to ASCLIN registers
numerator | value of the numerator
Returns
None

Definition at line 2318 of file IfxAsclin.h.

Referenced by IfxAsclin_setBaudrateBitFields().

◆ IfxAsclin_setOversampling()

IFX_INLINE void IfxAsclin_setOversampling | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_OversamplingFactor | ovsFactor
 | ) |  |

Sets the division ratio of the baudrate post divider.

Parameters
asclin | pointer to ASCLIN registers
ovsFactor | value of oversampling factor
Returns
None

Definition at line 2324 of file IfxAsclin.h.

Referenced by IfxAsclin_setBaudrateBitFields().

◆ IfxAsclin_setParityType()

IFX_INLINE void IfxAsclin_setParityType | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ParityType | type
 | ) |  |

Sets the parity type.

Parameters
asclin | pointer to ASCLIN registers
type | parity type selction (even / odd)
Returns
None

Definition at line 2330 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Lin_initModule().

◆ IfxAsclin_setPrescaler()

IFX_INLINE void IfxAsclin_setPrescaler | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 | prescaler
 | ) |  |

Sets the division ratio of the predivider (prescaler)

Parameters
asclin | pointer to ASCLIN registers
prescaler | value of prescaler
Returns
None

Definition at line 2336 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_setBaudrateBitFields(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setRxBufferMode()

IFX_INLINE void IfxAsclin_setRxBufferMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ReceiveBufferMode | mode
 | ) |  |

Sets the receive buffer mode.

Parameters
asclin | pointer to ASCLIN registers
mode | receive buffer mode selection (Rx FIFO or single stage Rx buffer)
Returns
None

Definition at line 2348 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setRxFifoInterruptLevel()

IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_RxFifoInterruptLevel | level
 | ) |  |

Sets the Tx FIFO interrupt level.

Parameters
asclin | pointer to ASCLIN registers
level | interrupt level selection
Returns
None

Definition at line 2354 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setRxFifoOutletWidth()

IFX_INLINE void IfxAsclin_setRxFifoOutletWidth | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_RxFifoOutletWidth | width
 | ) |  |

Sets the receive FIFO outlet width.

Parameters
asclin | pointer to ASCLIN registers
width | number of bytes read to the Rx FIFO with one FPI bus read
Returns
None

Definition at line 2360 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setSampleMode()

IFX_INLINE void IfxAsclin_setSampleMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_SamplesPerBit | medianFilter
 | ) |  |

Sets the sample mode (number of samples per bit / median filter)

Parameters
asclin | pointer to ASCLIN registers
medianFilter | value of the median filter
Returns
None

Definition at line 2372 of file IfxAsclin.h.

◆ IfxAsclin_setSamplePointPosition()

IFX_INLINE void IfxAsclin_setSamplePointPosition | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_SamplePointPosition | spPosition
 | ) |  |

Sets the sampling point position.

Parameters
asclin | pointer to ASCLIN registers
spPosition | sample point position selection
Returns
None

Definition at line 2378 of file IfxAsclin.h.

◆ IfxAsclin_setShiftDirection()

IFX_INLINE void IfxAsclin_setShiftDirection | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ShiftDirection | dir
 | ) |  |

Sets the shift direction.

Parameters
asclin | pointer to ASCLIN registers
dir | shift direction selection (LSB / MSB first)
Returns
None

Definition at line 2384 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setStopBit()

IFX_INLINE void IfxAsclin_setStopBit | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_StopBit | stopBit
 | ) |  |

Sets the number of stop bits.

Parameters
asclin | pointer to ASCLIN registers
stopBit | number of stop bits selection
Returns
None

Definition at line 2405 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setTransmitHeaderRequestFlag()

IFX_INLINE void IfxAsclin_setTransmitHeaderRequestFlag ( Ifx_ASCLIN * asclin )

Sets the transmit header request flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2422 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_sendHeader().

◆ IfxAsclin_setTransmitResponseRequestFlag()

IFX_INLINE void IfxAsclin_setTransmitResponseRequestFlag ( Ifx_ASCLIN * asclin )

Sets the transmit response request flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2428 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_sendResponse().

◆ IfxAsclin_setTransmitWakeRequestFlag()

IFX_INLINE void IfxAsclin_setTransmitWakeRequestFlag ( Ifx_ASCLIN * asclin )

Sets the transmission wake request flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2434 of file IfxAsclin.h.

◆ IfxAsclin_setTxFifoInletWidth()

IFX_INLINE void IfxAsclin_setTxFifoInletWidth | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_TxFifoInletWidth | width
 | ) |  |

Sets the transmit FIFO inlet width.

Parameters
asclin | pointer to ASCLIN registers
width | number of bytes written to the Tx FIFO with one FPI bus write
Returns
None

Definition at line 2440 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setTxFifoInterruptLevel()

IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_TxFifoInterruptLevel | level
 | ) |  |

Sets the Tx FIFO interrupt level.

Parameters
asclin | pointer to ASCLIN registers
level | interrupt level selection
Returns
None

Definition at line 2446 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » ASCLIN » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE boolean | IfxAsclin_getBreakDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the break detected flag status. More...
IFX_INLINE uint8 | IfxAsclin_getClockSource (Ifx_ASCLIN *asclin)
Returns the clock source. More...
IFX_INLINE boolean | IfxAsclin_getClockStatus (Ifx_ASCLIN *asclin)
Returns the clock status. More...
IFX_INLINE boolean | IfxAsclin_getCollisionDetectionErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the collision detection error flag status. More...
IFX_INLINE boolean | IfxAsclin_getFallingEdgeDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the falling edge detected flag status. More...
IFX_INLINE boolean | IfxAsclin_getFrameErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the frame error flag status. More...
IFX_INLINE boolean | IfxAsclin_getHeaderTimeoutFlagStatus (Ifx_ASCLIN *asclin)
Returns the header timeout flag status. More...
IFX_INLINE boolean | IfxAsclin_getKernelResetStatus (Ifx_ASCLIN *asclin)
Returns the kernel reset status. More...
IFX_INLINE boolean | IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN auto baudrate detection error flag status. More...
IFX_INLINE boolean | IfxAsclin_getLinChecksumErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN checksum error flag status. More...
IFX_INLINE boolean | IfxAsclin_getLinParityErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN parity error flag status. More...
IFX_INLINE boolean | IfxAsclin_getModuleStatus (Ifx_ASCLIN *asclin)
Returns the module status. More...
IFX_INLINE boolean | IfxAsclin_getParityErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the parity error flag status. More...
IFX_INLINE uint16 | IfxAsclin_getPrescaler (Ifx_ASCLIN *asclin)
Returns the division ratio of the predivider (prescaler) More...
IFX_INLINE boolean | IfxAsclin_getRaisingEdgeDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the raising edge detected flag status. More...
IFX_INLINE boolean | IfxAsclin_getReceiveSignalStatus (Ifx_ASCLIN *asclin)
Returns the received signal status. More...
IFX_INLINE boolean | IfxAsclin_getResponseTimeoutFlagStatus (Ifx_ASCLIN *asclin)
Returns the response timeout flag status. More...
IFX_INLINE uint8 | IfxAsclin_getRxFifoFillLevel (Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoFillLevelFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO level flag status. More...
IFX_INLINE uint8 | IfxAsclin_getRxFifoOutletWidth (Ifx_ASCLIN *asclin)
Returns the receive FIFO inlet width. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoOverflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoUnderflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO underflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxHeaderEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the receive header end flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxResponseEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the receive response end flag status. More...
IFX_INLINE boolean | IfxAsclin_getTransmissionCompletedFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmission pending flag status. More...
IFX_INLINE boolean | IfxAsclin_getTransmitSignalStatus (Ifx_ASCLIN *asclin)
Returns the transmit signal status. More...
IFX_INLINE uint8 | IfxAsclin_getTxFifoFillLevel (Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO. More...
IFX_INLINE boolean | IfxAsclin_getTxFifoFillLevelFlagStatus (Ifx_ASCLIN *asclin)
Returns the Tx FIFO level flag status. More...
IFX_INLINE uint8 | IfxAsclin_getTxFifoInletWidth (Ifx_ASCLIN *asclin)
Returns the transmit FIFO inlet width. More...
IFX_INLINE boolean | IfxAsclin_getTxFifoOverflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getTxHeaderEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmit header end flag status. More...
IFX_INLINE boolean | IfxAsclin_getTxResponseEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmit response end flag status. More...
IFX_INLINE void | IfxAsclin_setSleepMode (Ifx_ASCLIN *asclin, IfxAsclin_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN Ifx_ASCLIN * | IfxAsclin_getAddress (IfxAsclin_Index asclin)
API to get the address for ASCLIN HW module register memory map. More...
IFX_EXTERN float32 | IfxAsclin_getFaFrequency (Ifx_ASCLIN *asclin)
Returns the ASCLIN module FA frequency in Hz. More...
IFX_EXTERN IfxAsclin_Index | IfxAsclin_getIndex (Ifx_ASCLIN *asclin)
API to get the resource index of the ASCLIN specified. More...
IFX_EXTERN float32 | IfxAsclin_getOvsFrequency (Ifx_ASCLIN *asclin)
Returns the OVS frequency. More...
IFX_EXTERN float32 | IfxAsclin_getPdFrequency (Ifx_ASCLIN *asclin)
Returns the PD frequency. More...
IFX_EXTERN float32 | IfxAsclin_getShiftFrequency (Ifx_ASCLIN *asclin)
Returns the SHIFT frequency. More...
IFX_EXTERN void | IfxAsclin_resetModule (Ifx_ASCLIN *asclin)
resets Asclin kernel More...

Detailed Description

Function Documentation

◆ IfxAsclin_getAddress()

IFX_EXTERN Ifx_ASCLIN* IfxAsclin_getAddress ( IfxAsclin_Index asclin )

API to get the address for ASCLIN HW module register memory map.

Parameters
asclin Resource index of the ASCLIN
Returns
ASCLIN module register address

Definition at line 79 of file IfxAsclin.c.

◆ IfxAsclin_getBreakDetectedFlagStatus()

IFX_INLINE boolean IfxAsclin_getBreakDetectedFlagStatus ( Ifx_ASCLIN * asclin )

Returns the break detected flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
break detected flag status

Definition at line 1925 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getClockSource()

IFX_INLINE uint8 IfxAsclin_getClockSource ( Ifx_ASCLIN * asclin )

Returns the clock source.

Parameters
asclin pointer to ASCLIN registers
Returns
clock source

Definition at line 1931 of file IfxAsclin.h.

Referenced by IfxAsclin_getFaFrequency(), IfxAsclin_setBaudrateBitFields(), and IfxAsclin_setBitTiming().

◆ IfxAsclin_getClockStatus()

IFX_INLINE boolean IfxAsclin_getClockStatus ( Ifx_ASCLIN * asclin )

Returns the clock status.

Parameters
asclin pointer to ASCLIN registers
Returns
clock status (off / on)

Definition at line 1937 of file IfxAsclin.h.

Referenced by IfxAsclin_setClockSource().

◆ IfxAsclin_getCollisionDetectionErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getCollisionDetectionErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the collision detection error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
collision detection error flag status

Definition at line 1943 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getFaFrequency()

IFX_EXTERN float32 IfxAsclin_getFaFrequency ( Ifx_ASCLIN * asclin )

Returns the ASCLIN module FA frequency in Hz.

Parameters
asclin pointer to ASCLIN registers
Returns
Returns the ASCLIN module FA frequency in Hz

Definition at line 96 of file IfxAsclin.c.

Referenced by IfxAsclin_getPdFrequency().

◆ IfxAsclin_getFallingEdgeDetectedFlagStatus()

IFX_INLINE boolean IfxAsclin_getFallingEdgeDetectedFlagStatus ( Ifx_ASCLIN * asclin )

Returns the falling edge detected flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
falling edge detected flag status

Definition at line 1949 of file IfxAsclin.h.

◆ IfxAsclin_getFrameErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the frame error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
frame error flag status

Definition at line 1955 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_getHeaderTimeoutFlagStatus()

IFX_INLINE boolean IfxAsclin_getHeaderTimeoutFlagStatus ( Ifx_ASCLIN * asclin )

Returns the header timeout flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
header timeout flag status

Definition at line 1961 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getIndex()

IFX_EXTERN IfxAsclin_Index IfxAsclin_getIndex ( Ifx_ASCLIN * asclin )

API to get the resource index of the ASCLIN specified.

Returns
asclin resource index

Definition at line 130 of file IfxAsclin.c.

Referenced by IfxAsclin_getSrcPointerEr(), IfxAsclin_getSrcPointerRx(), and IfxAsclin_getSrcPointerTx().

◆ IfxAsclin_getKernelResetStatus()

IFX_INLINE boolean IfxAsclin_getKernelResetStatus ( Ifx_ASCLIN * asclin )

Returns the kernel reset status.

Parameters
asclin pointer to ASCLIN registers
Returns
kernel reset status

Definition at line 1967 of file IfxAsclin.h.

◆ IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the LIN auto baudrate detection error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
LIN auto baudrate detection error flag status

Definition at line 1973 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getLinChecksumErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getLinChecksumErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the LIN checksum error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
LIN checksum error flag status

Definition at line 1979 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getLinParityErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getLinParityErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the LIN parity error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
LIN parity error flag status

Definition at line 1985 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getModuleStatus()

IFX_INLINE boolean IfxAsclin_getModuleStatus ( Ifx_ASCLIN * asclin )

Returns the module status.

Parameters
asclin pointer to ASCLIN registers
Returns
module status (enabled / disabled)

Definition at line 1991 of file IfxAsclin.h.

◆ IfxAsclin_getOvsFrequency()

IFX_EXTERN float32 IfxAsclin_getOvsFrequency ( Ifx_ASCLIN * asclin )

Returns the OVS frequency.

Parameters
asclin pointer to ASCLIN registers
Returns
Returns the ASCLIN module OVS frequency in Hz

Definition at line 150 of file IfxAsclin.c.

Referenced by IfxAsclin_getShiftFrequency().

◆ IfxAsclin_getParityErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getParityErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the parity error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
parity error flag status

Definition at line 1997 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError().

◆ IfxAsclin_getPdFrequency()

IFX_EXTERN float32 IfxAsclin_getPdFrequency ( Ifx_ASCLIN * asclin )

Returns the PD frequency.

Parameters
asclin pointer to ASCLIN registers
Returns
Returns the ASCLIN module PD frequency in Hz

Definition at line 156 of file IfxAsclin.c.

Referenced by IfxAsclin_getOvsFrequency(), and IfxAsclin_setBitTiming().

◆ IfxAsclin_getPrescaler()

IFX_INLINE uint16 IfxAsclin_getPrescaler ( Ifx_ASCLIN * asclin )

Returns the division ratio of the predivider (prescaler)

Parameters
asclin pointer to ASCLIN registers
Returns
value of prescaler

Definition at line 2003 of file IfxAsclin.h.

◆ IfxAsclin_getRaisingEdgeDetectedFlagStatus()

IFX_INLINE boolean IfxAsclin_getRaisingEdgeDetectedFlagStatus ( Ifx_ASCLIN * asclin )

Returns the raising edge detected flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
raising edge detected flag status

Definition at line 2009 of file IfxAsclin.h.

◆ IfxAsclin_getReceiveSignalStatus()

IFX_INLINE boolean IfxAsclin_getReceiveSignalStatus ( Ifx_ASCLIN * asclin )

Returns the received signal status.

Parameters
asclin pointer to ASCLIN registers
Returns
received signal status (0 is low & 1 is high)

Definition at line 2015 of file IfxAsclin.h.

◆ IfxAsclin_getResponseTimeoutFlagStatus()

IFX_INLINE boolean IfxAsclin_getResponseTimeoutFlagStatus ( Ifx_ASCLIN * asclin )

Returns the response timeout flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
response timeout flag status

Definition at line 2021 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getRxFifoFillLevel()

IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel ( Ifx_ASCLIN * asclin )

Returns the current filling level of Tx FIFO.

Parameters
asclin pointer to ASCLIN registers
Returns
current filling level of Rx FIFO

Definition at line 2027 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrReceive(), and IfxAsclin_Spi_read().

◆ IfxAsclin_getRxFifoFillLevelFlagStatus()

IFX_INLINE boolean IfxAsclin_getRxFifoFillLevelFlagStatus ( Ifx_ASCLIN * asclin )

Returns the Rx FIFO level flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
Rx FIFO level flag status

Definition at line 2033 of file IfxAsclin.h.

◆ IfxAsclin_getRxFifoOutletWidth()

IFX_INLINE uint8 IfxAsclin_getRxFifoOutletWidth ( Ifx_ASCLIN * asclin )

Returns the receive FIFO inlet width.

Parameters
asclin pointer to ASCLIN registers
Returns
number of bytes read to the Rx FIFO with one FPI bus read

Definition at line 2039 of file IfxAsclin.h.

◆ IfxAsclin_getRxFifoOverflowFlagStatus()

IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus ( Ifx_ASCLIN * asclin )

Returns the Rx FIFO overflow flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
Rx FIFO overflow flag status

Definition at line 2045 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_getRxFifoUnderflowFlagStatus()

IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus ( Ifx_ASCLIN * asclin )

Returns the Rx FIFO underflow flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
Rx FIFO underflow flag status

Definition at line 2051 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_getRxHeaderEndFlagStatus()

IFX_INLINE boolean IfxAsclin_getRxHeaderEndFlagStatus ( Ifx_ASCLIN * asclin )

Returns the receive header end flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
receive header end flag status

Definition at line 2057 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), and IfxAsclin_Lin_isrReceive().

◆ IfxAsclin_getRxResponseEndFlagStatus()

IFX_INLINE boolean IfxAsclin_getRxResponseEndFlagStatus ( Ifx_ASCLIN * asclin )

Returns the receive response end flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
receive response end flag status

Definition at line 2063 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), and IfxAsclin_Lin_isrReceive().

◆ IfxAsclin_getShiftFrequency()

IFX_EXTERN float32 IfxAsclin_getShiftFrequency ( Ifx_ASCLIN * asclin )

Returns the SHIFT frequency.

Parameters
asclin pointer to ASCLIN registers
Returns
Returns the ASCLIN module SHIFT frequency in Hz

Definition at line 162 of file IfxAsclin.c.

◆ IfxAsclin_getTransmissionCompletedFlagStatus()

IFX_INLINE boolean IfxAsclin_getTransmissionCompletedFlagStatus ( Ifx_ASCLIN * asclin )

Returns the transmission pending flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
transmission pending flag status

Definition at line 2069 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_isrError().

◆ IfxAsclin_getTransmitSignalStatus()

IFX_INLINE boolean IfxAsclin_getTransmitSignalStatus ( Ifx_ASCLIN * asclin )

Returns the transmit signal status.

Parameters
asclin pointer to ASCLIN registers
Returns
transmit signal status (0 is low & 1 is high)

Definition at line 2075 of file IfxAsclin.h.

◆ IfxAsclin_getTxFifoFillLevel()

IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel ( Ifx_ASCLIN * asclin )

Returns the current filling level of Tx FIFO.

Parameters
asclin pointer to ASCLIN registers
Returns
current filling level of Tx FIFO

Definition at line 2081 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_flushTx(), IfxAsclin_Asc_isrTransmit(), and IfxAsclin_Spi_write().

◆ IfxAsclin_getTxFifoFillLevelFlagStatus()

IFX_INLINE boolean IfxAsclin_getTxFifoFillLevelFlagStatus ( Ifx_ASCLIN * asclin )

Returns the Tx FIFO level flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
Tx FIFO level flag status

Definition at line 2087 of file IfxAsclin.h.

◆ IfxAsclin_getTxFifoInletWidth()

IFX_INLINE uint8 IfxAsclin_getTxFifoInletWidth ( Ifx_ASCLIN * asclin )

Returns the transmit FIFO inlet width.

Parameters
asclin pointer to ASCLIN registers
Returns
number of bytes written to the Tx FIFO with one FPI bus write

Definition at line 2093 of file IfxAsclin.h.

◆ IfxAsclin_getTxFifoOverflowFlagStatus()

IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus ( Ifx_ASCLIN * asclin )

Returns the Tx FIFO overflow flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
Tx FIFO overflow flag status

Definition at line 2099 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_getTxHeaderEndFlagStatus()

IFX_INLINE boolean IfxAsclin_getTxHeaderEndFlagStatus ( Ifx_ASCLIN * asclin )

Returns the transmit header end flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
transmit header end flag status

Definition at line 2105 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrTransmit().

◆ IfxAsclin_getTxResponseEndFlagStatus()

IFX_INLINE boolean IfxAsclin_getTxResponseEndFlagStatus ( Ifx_ASCLIN * asclin )

Returns the transmit response end flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
transmit response end flag status

Definition at line 2111 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrTransmit().

◆ IfxAsclin_resetModule()

IFX_EXTERN void IfxAsclin_resetModule ( Ifx_ASCLIN * asclin )

resets Asclin kernel

Parameters
asclin pointer to ASCLIN resgisters
Returns
None

Definition at line 228 of file IfxAsclin.c.

◆ IfxAsclin_setSleepMode()

IFX_INLINE void IfxAsclin_setSleepMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
asclin | pointer to ASCLIN registers
mode | mode selection (enable / disable)
Returns
None

Definition at line 2396 of file IfxAsclin.h.


iLLD_TC26B: Configuration Functions

Functions
Configuration Functions
iLLD » ASCLIN » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxAsclin_disableAllFlags (Ifx_ASCLIN *asclin)
disables all flags More...
IFX_INLINE void | IfxAsclin_enableAutoBaudrateDetection (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the auto baudrate detection. More...
IFX_INLINE void | IfxAsclin_enableBreakDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables break detected flag. More...
IFX_INLINE void | IfxAsclin_enableCollisionDetection (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the collision detection. More...
IFX_INLINE void | IfxAsclin_enableCollisionDetectionErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN collision detection error flag. More...
IFX_INLINE void | IfxAsclin_enableCts (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables CTS. More...
IFX_INLINE void | IfxAsclin_enableFallingEdgeDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables falling edge detected flag. More...
IFX_INLINE void | IfxAsclin_enableFrameErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables frame error flag. More...
IFX_INLINE void | IfxAsclin_enableHardwareChecksum (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the hardware checksum. More...
IFX_INLINE void | IfxAsclin_enableHeaderTimeoutFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables header timeout flag. More...
IFX_INLINE void | IfxAsclin_enableLinAutoBaudDetectionErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN auto baudrate detection error flag. More...
IFX_INLINE void | IfxAsclin_enableLinChecksumErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN checksum error flag. More...
IFX_INLINE void | IfxAsclin_enableLinParityErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN parity error flag. More...
IFX_INLINE void | IfxAsclin_enableLoopBackMode (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the loop back mode. More...
IFX_INLINE void | IfxAsclin_enableParity (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits. More...
IFX_INLINE void | IfxAsclin_enableParityErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables parity error flag. More...
IFX_INLINE void | IfxAsclin_enableRaisingEdgeDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables raising edge detected flag. More...
IFX_INLINE void | IfxAsclin_enableResponseTimeoutFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables response timeout flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoFillLevelFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoInlet (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register. More...
IFX_INLINE void | IfxAsclin_enableRxFifoOverflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoUnderflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO underflow flag. More...
IFX_INLINE void | IfxAsclin_enableRxHeaderEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive header end flag. More...
IFX_INLINE void | IfxAsclin_enableRxResponseEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive response end flag. More...
IFX_INLINE void | IfxAsclin_enableTransmissionCompletedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmission completed flag. More...
IFX_INLINE void | IfxAsclin_enableTxFifoFillLevelFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_enableTxFifoOutlet (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission. More...
IFX_INLINE void | IfxAsclin_enableTxFifoOverflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_enableTxHeaderEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit header end flag. More...
IFX_INLINE void | IfxAsclin_enableTxResponseEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit response end flag. More...
IFX_INLINE boolean | IfxAsclin_isModuleSuspended (Ifx_ASCLIN *asclin)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxAsclin_setClockPolarity (Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol)
Selects the clock polarity. More...
IFX_INLINE void | IfxAsclin_setCtsInput (Ifx_ASCLIN *asclin, IfxAsclin_CtsInputSelect ctsi)
Selects the CTS input pin. More...
IFX_INLINE void | IfxAsclin_setFrameMode (Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module's mode of operation. More...
IFX_INLINE void | IfxAsclin_setRtsCtsPolarity (Ifx_ASCLIN *asclin, IfxAsclin_RtsCtsPolarity rcpol)
Selects the RTS/CTS polarity. More...
IFX_INLINE void | IfxAsclin_setRxInput (Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
Selects the alternate input for Rx signal. More...
IFX_INLINE void | IfxAsclin_setSlavePolarity (Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol)
Selects the slave polarity. More...
IFX_INLINE void | IfxAsclin_setSuspendMode (Ifx_ASCLIN *asclin, IfxAsclin_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN boolean | IfxAsclin_setBitTiming (Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing. More...

Detailed Description

Function Documentation

◆ IfxAsclin_disableAllFlags()

IFX_INLINE void IfxAsclin_disableAllFlags ( Ifx_ASCLIN * asclin )

disables all flags

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1733 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableAutoBaudrateDetection()

IFX_INLINE void IfxAsclin_enableAutoBaudrateDetection | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the auto baudrate detection.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1739 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_enableBreakDetectedFlag()

IFX_INLINE void IfxAsclin_enableBreakDetectedFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables break detected flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1745 of file IfxAsclin.h.

◆ IfxAsclin_enableCollisionDetection()

IFX_INLINE void IfxAsclin_enableCollisionDetection | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the collision detection.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1751 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_enableCollisionDetectionErrorFlag()

IFX_INLINE void IfxAsclin_enableCollisionDetectionErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables LIN collision detection error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1757 of file IfxAsclin.h.

◆ IfxAsclin_enableCts()

IFX_INLINE void IfxAsclin_enableCts | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables CTS.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1763 of file IfxAsclin.h.

Referenced by IfxAsclin_initCtsPin().

◆ IfxAsclin_enableFallingEdgeDetectedFlag()

IFX_INLINE void IfxAsclin_enableFallingEdgeDetectedFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables falling edge detected flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1769 of file IfxAsclin.h.

◆ IfxAsclin_enableFrameErrorFlag()

IFX_INLINE void IfxAsclin_enableFrameErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables frame error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1775 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableHardwareChecksum()

IFX_INLINE void IfxAsclin_enableHardwareChecksum | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the hardware checksum.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1781 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_enableHeaderTimeoutFlag()

IFX_INLINE void IfxAsclin_enableHeaderTimeoutFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables header timeout flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1787 of file IfxAsclin.h.

◆ IfxAsclin_enableLinAutoBaudDetectionErrorFlag()

IFX_INLINE void IfxAsclin_enableLinAutoBaudDetectionErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables LIN auto baudrate detection error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1793 of file IfxAsclin.h.

◆ IfxAsclin_enableLinChecksumErrorFlag()

IFX_INLINE void IfxAsclin_enableLinChecksumErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables LIN checksum error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1799 of file IfxAsclin.h.

◆ IfxAsclin_enableLinParityErrorFlag()

IFX_INLINE void IfxAsclin_enableLinParityErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables LIN parity error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1805 of file IfxAsclin.h.

◆ IfxAsclin_enableLoopBackMode()

IFX_INLINE void IfxAsclin_enableLoopBackMode | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the loop back mode.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1811 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableParity()

IFX_INLINE void IfxAsclin_enableParity | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the parity bit attachment to tha data bits.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1817 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableParityErrorFlag()

IFX_INLINE void IfxAsclin_enableParityErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables parity error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1823 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_enableAscErrorFlags().

◆ IfxAsclin_enableRaisingEdgeDetectedFlag()

IFX_INLINE void IfxAsclin_enableRaisingEdgeDetectedFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables raising edge detected flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1829 of file IfxAsclin.h.

◆ IfxAsclin_enableResponseTimeoutFlag()

IFX_INLINE void IfxAsclin_enableResponseTimeoutFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables response timeout flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1835 of file IfxAsclin.h.

◆ IfxAsclin_enableRxFifoFillLevelFlag()

IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables Rx FIFO level flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1841 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableRxFifoInlet()

IFX_INLINE void IfxAsclin_enableRxFifoInlet | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1847 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_ignoreHeader(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableRxFifoOverflowFlag()

IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables Rx FIFO overflow flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1853 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_enableAscErrorFlags().

◆ IfxAsclin_enableRxFifoUnderflowFlag()

IFX_INLINE void IfxAsclin_enableRxFifoUnderflowFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables Rx FIFO underflow flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1859 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule().

◆ IfxAsclin_enableRxHeaderEndFlag()

IFX_INLINE void IfxAsclin_enableRxHeaderEndFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables receive header end flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1865 of file IfxAsclin.h.

◆ IfxAsclin_enableRxResponseEndFlag()

IFX_INLINE void IfxAsclin_enableRxResponseEndFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables receive response end flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1871 of file IfxAsclin.h.

◆ IfxAsclin_enableTransmissionCompletedFlag()

IFX_INLINE void IfxAsclin_enableTransmissionCompletedFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables transmission completed flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1877 of file IfxAsclin.h.

◆ IfxAsclin_enableTxFifoFillLevelFlag()

IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables Tx FIFO level flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1883 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableTxFifoOutlet()

IFX_INLINE void IfxAsclin_enableTxFifoOutlet | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the transmit FIFO outlet to allow transmission.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1889 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableTxFifoOverflowFlag()

IFX_INLINE void IfxAsclin_enableTxFifoOverflowFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables Tx FIFO overflow flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1895 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule().

◆ IfxAsclin_enableTxHeaderEndFlag()

IFX_INLINE void IfxAsclin_enableTxHeaderEndFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables transmit header end flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1901 of file IfxAsclin.h.

◆ IfxAsclin_enableTxResponseEndFlag()

IFX_INLINE void IfxAsclin_enableTxResponseEndFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables transmit response end flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1907 of file IfxAsclin.h.

◆ IfxAsclin_isModuleSuspended()

IFX_INLINE boolean IfxAsclin_isModuleSuspended ( Ifx_ASCLIN * asclin )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
asclin Pointer to ASCLIN module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 2168 of file IfxAsclin.h.

◆ IfxAsclin_setBitTiming()

IFX_EXTERN boolean IfxAsclin_setBitTiming | ( | Ifx_ASCLIN * | asclin,
 |  | float32 | baudrate,
 |  | IfxAsclin_OversamplingFactor | oversampling,
 |  | IfxAsclin_SamplePointPosition | samplepoint,
 |  | IfxAsclin_SamplesPerBit | medianFilter
 | ) |  |

Set the bit timing.

Note
this function required FA source and the PD frequency to be set to their final values
Parameters
asclin | pointer to ASCLIN registers
baudrate | Required baudrate
oversampling | The oversampling factor
samplepoint | The sample point position
medianFilter | Number of samples per bit (median filter)
Returns
TRUE if configuration was successfull

Definition at line 259 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setClockPolarity()

IFX_INLINE void IfxAsclin_setClockPolarity | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ClockPolarity | cpol
 | ) |  |

Selects the clock polarity.

Parameters
asclin | pointer to ASCLIN registers
cpol | CPOL selection
Returns
None

Definition at line 2210 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_initModule().

◆ IfxAsclin_setCtsInput()

IFX_INLINE void IfxAsclin_setCtsInput | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_CtsInputSelect | ctsi
 | ) |  |

Selects the CTS input pin.

Parameters
asclin | pointer to ASCLIN registers
ctsi | CTS input pin selection
Returns
None

Definition at line 2216 of file IfxAsclin.h.

Referenced by IfxAsclin_initCtsPin().

◆ IfxAsclin_setFrameMode()

IFX_INLINE void IfxAsclin_setFrameMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_FrameMode | mode
 | ) |  |

Selects the module's mode of operation.

Parameters
asclin | pointer to ASCLIN registers
mode | mode selction
Returns
None

Definition at line 2252 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setRtsCtsPolarity()

IFX_INLINE void IfxAsclin_setRtsCtsPolarity | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_RtsCtsPolarity | rcpol
 | ) |  |

Selects the RTS/CTS polarity.

Parameters
asclin | pointer to ASCLIN registers
rcpol | RCPOL selection
Returns
None

Definition at line 2342 of file IfxAsclin.h.

◆ IfxAsclin_setRxInput()

IFX_INLINE void IfxAsclin_setRxInput | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_RxInputSelect | alti
 | ) |  |

Selects the alternate input for Rx signal.

Parameters
asclin | pointer to ASCLIN registers
alti | alternate input selection of Rx signal
Returns
None

Definition at line 2366 of file IfxAsclin.h.

Referenced by IfxAsclin_initRxPin(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setSlavePolarity()

IFX_INLINE void IfxAsclin_setSlavePolarity | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_SlavePolarity | spol
 | ) |  |

Selects the slave polarity.

Parameters
asclin | pointer to ASCLIN registers
spol | SPOL selection
Returns
None

Definition at line 2390 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_initModule().

◆ IfxAsclin_setSuspendMode()

IFX_INLINE void IfxAsclin_setSuspendMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
asclin | Pointer to ASCLIN module registers
mode | Module suspend mode
Returns
None

Definition at line 2411 of file IfxAsclin.h.


iLLD_TC26B: External Functions

Functions
External Functions
iLLD » ASCLIN » Standard Driver
Collaboration diagram for External Functions:

Functions

IFX_EXTERN void | IfxAsclin_disableModule (Ifx_ASCLIN *asclin)
Disables the module. More...
IFX_EXTERN void | IfxAsclin_enableAscErrorFlags (Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
Enables the ASC error interrupt Flags. More...
IFX_EXTERN void | IfxAsclin_enableModule (Ifx_ASCLIN *asclin)
Enables the module. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerEr (Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerRx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerTx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx. More...
IFX_EXTERN uint32 | IfxAsclin_read16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits. More...
IFX_EXTERN uint32 | IfxAsclin_read32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Reads data up to 32 bits. More...
IFX_EXTERN uint32 | IfxAsclin_read8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits. More...
IFX_EXTERN void | IfxAsclin_setBaudrateBitFields (Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
Sets the baudrate bit fields. More...
IFX_EXTERN void | IfxAsclin_setClockSource (Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source. More...
IFX_EXTERN uint32 | IfxAsclin_write16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits. More...
IFX_EXTERN uint32 | IfxAsclin_write32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Writes data up to 32 bits. More...
IFX_EXTERN uint32 | IfxAsclin_write8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits. More...

Detailed Description

Function Documentation

◆ IfxAsclin_disableModule()

IFX_EXTERN void IfxAsclin_disableModule ( Ifx_ASCLIN * asclin )

Disables the module.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 54 of file IfxAsclin.c.

◆ IfxAsclin_enableAscErrorFlags()

IFX_EXTERN void IfxAsclin_enableAscErrorFlags | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | parEnable,
 |  | boolean | rfoEnable
 | ) |  |

Enables the ASC error interrupt Flags.

Parameters
asclin | pointer to ASCLIN registers
parEnable | parity error
rfoEnable | Rx FIFO overflow error
Returns
None

Definition at line 63 of file IfxAsclin.c.

◆ IfxAsclin_enableModule()

IFX_EXTERN void IfxAsclin_enableModule ( Ifx_ASCLIN * asclin )

Enables the module.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 70 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_getSrcPointerEr()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxAsclin_getSrcPointerEr ( Ifx_ASCLIN * asclin )

Returns the SRC pointer for ERR.

Parameters
asclin pointer to ASCLIN registers

Definition at line 168 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_getSrcPointerRx()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxAsclin_getSrcPointerRx ( Ifx_ASCLIN * asclin )

Returns the SRC pointer for Rx.

Parameters
asclin pointer to ASCLIN registers

Definition at line 174 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_getSrcPointerTx()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxAsclin_getSrcPointerTx ( Ifx_ASCLIN * asclin )

Returns the SRC pointer for Tx.

Parameters
asclin pointer to ASCLIN registers

Definition at line 180 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_read16()

IFX_EXTERN uint32 IfxAsclin_read16 | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 * | data,
 |  | uint32 | count
 | ) |  |

Reads data up to 16 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array where the read data shall be stored
count | number of items to read
Returns
number of items that could not be read

Definition at line 186 of file IfxAsclin.c.

Referenced by IfxAsclin_Spi_read().

◆ IfxAsclin_read32()

IFX_EXTERN uint32 IfxAsclin_read32 | ( | Ifx_ASCLIN * | asclin,
 |  | uint32 * | data,
 |  | uint32 | count
 | ) |  |

Reads data up to 32 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array where the read data shall be stored
count | number of items to read
Returns
number of items that could not be read

Definition at line 200 of file IfxAsclin.c.

◆ IfxAsclin_read8()

IFX_EXTERN uint32 IfxAsclin_read8 | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 * | data,
 |  | uint32 | count
 | ) |  |

Reads data up to 8 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array where the read data shall be stored
count | number of items to read
Returns
number of items that could not be read

Definition at line 214 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_isrReceive(), IfxAsclin_Lin_readHeader(), IfxAsclin_Lin_readResponse(), and IfxAsclin_Spi_read().

◆ IfxAsclin_setBaudrateBitFields()

IFX_EXTERN void IfxAsclin_setBaudrateBitFields | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 | prescaler,
 |  | uint16 | numerator,
 |  | uint16 | denominator,
 |  | IfxAsclin_OversamplingFactor | oversampling
 | ) |  |

Sets the baudrate bit fields.

Parameters
asclin | pointer to ASCLIN registers
prescaler | division ratio of the predivider
numerator | numerator of the fractional divider
denominator | denominator of the fractional divider
oversampling | division ratio of the baudrate postdivider
Returns
None

Definition at line 247 of file IfxAsclin.c.

◆ IfxAsclin_setClockSource()

IFX_EXTERN void IfxAsclin_setClockSource | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ClockSource | clockSource
 | ) |  |

Sets the clock source.

Parameters
asclin | pointer to ASCLIN registers
clockSource | clock source selection
Returns
None

Definition at line 358 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_setBaudrateBitFields(), IfxAsclin_setBitTiming(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_write16()

IFX_EXTERN uint32 IfxAsclin_write16 | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 * | data,
 |  | uint32 | count
 | ) |  |

Writes data up to 16 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array of data to be send
count | number of items to be send
Returns
the number of items that could not be send

Definition at line 376 of file IfxAsclin.c.

Referenced by IfxAsclin_Spi_write().

◆ IfxAsclin_write32()

IFX_EXTERN uint32 IfxAsclin_write32 | ( | Ifx_ASCLIN * | asclin,
 |  | uint32 * | data,
 |  | uint32 | count
 | ) |  |

Writes data up to 32 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array of data to be send
count | number of items to be send
Returns
the number of items that could not be send

Definition at line 390 of file IfxAsclin.c.

◆ IfxAsclin_write8()

IFX_EXTERN uint32 IfxAsclin_write8 | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 * | data,
 |  | uint32 | count
 | ) |  |

Writes data up to 8 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array of data to be send
count | number of items to be send
Returns
the number of items that could not be send

Definition at line 404 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initiateTransmission(), IfxAsclin_Asc_isrTransmit(), IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_write().


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » ASCLIN » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxAsclin_initCtsPin (const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a CTS input. More...
IFX_INLINE void | IfxAsclin_initRtsPin (const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a RTS output. More...
IFX_INLINE void | IfxAsclin_initRxPin (const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxAsclin_initSclkPin (const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output. More...
IFX_INLINE void | IfxAsclin_initSlsoPin (const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output. More...
IFX_INLINE void | IfxAsclin_initTxPin (const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...

Detailed Description

Function Documentation

◆ IfxAsclin_initCtsPin()

IFX_INLINE void IfxAsclin_initCtsPin | ( | const IfxAsclin_Cts_In * | cts,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a CTS input.

Attention: the kernel clock has to be disabled whenever the input multiplexer is changed.

This can be done with IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock);

After the function call, the current clock can be enabled again.

Parameters
cts | the CTS Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2117 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule().

◆ IfxAsclin_initRtsPin()

IFX_INLINE void IfxAsclin_initRtsPin | ( | const IfxAsclin_Rts_Out * | rts,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a RTS output.

Parameters
rts | the RTS Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2129 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule().

◆ IfxAsclin_initRxPin()

IFX_INLINE void IfxAsclin_initRxPin | ( | const IfxAsclin_Rx_In * | rx,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a RX input.

Attention: the kernel clock has to be disabled whenever the input multiplexer is changed.

This can be done with IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock);

After the function call, the current clock can be enabled again.

Parameters
rx | the RX Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2136 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_initSclkPin()

IFX_INLINE void IfxAsclin_initSclkPin | ( | const IfxAsclin_Sclk_Out * | sclk,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SCLK output.

Parameters
sclk | the SCLK Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2147 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_initModule().

◆ IfxAsclin_initSlsoPin()

IFX_INLINE void IfxAsclin_initSlsoPin | ( | const IfxAsclin_Slso_Out * | slso,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SLSO output.

Parameters
slso | the SLSO Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2154 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_initModule().

◆ IfxAsclin_initTxPin()

IFX_INLINE void IfxAsclin_initTxPin | ( | const IfxAsclin_Tx_Out * | tx,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a TX output.

Parameters
tx | the TX Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2161 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().


iLLD_TC26B: ASCLIN Pin Mapping

Data Structures | Macros | Variables
ASCLIN Pin Mapping
iLLD » ASCLIN
Collaboration diagram for ASCLIN Pin Mapping:

Data Structures

struct | IfxAsclin_Cts_In
CTS pin mapping structure. More...
struct | IfxAsclin_Rx_In
RX pin mapping structure. More...
struct | IfxAsclin_Rts_Out
RTS pin mapping structure. More...
struct | IfxAsclin_Sclk_Out
SCLK pin mapping structure. More...
struct | IfxAsclin_Slso_Out
SLSO pin mapping structure. More...
struct | IfxAsclin_Tx_Out
TX pin mapping structure. More...

Macros

#define | IFXASCLIN_PINMAP_NUM_MODULES 4
Table dimensions. More...
#define | IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS 2
#define | IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS 2
#define | IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS 7
#define | IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS 9
#define | IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS 5
#define | IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS 10

Variables

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN
ASCLIN0_CTSA: ASCLIN0 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN
ASCLIN1_CTSA: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN
ASCLIN1_CTSB: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN
ASCLIN2_CTSA: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN
ASCLIN2_CTSB: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN
ASCLIN3_CTSA: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT
ASCLIN0_RTS: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT
ASCLIN1_RTS: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT
ASCLIN1_RTS: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT
ASCLIN2_RTS: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT
ASCLIN2_RTS: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT
ASCLIN3_RTS: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN
ASCLIN0_RXA: ASCLIN0 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN
ASCLIN0_RXB: ASCLIN0 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN
ASCLIN1_RXA: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN
ASCLIN1_RXB: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN
ASCLIN1_RXC: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN
ASCLIN1_RXD: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN
ASCLIN1_RXE: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN
ASCLIN1_RXF: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN
ASCLIN1_RXG: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN
ASCLIN2_RXA: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN
ASCLIN2_RXB: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN
ASCLIN2_RXD: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN
ASCLIN2_RXE: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN
ASCLIN2_RXG: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN
ASCLIN3_RXA: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN
ASCLIN3_RXC: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN
ASCLIN3_RXD: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN
ASCLIN3_RXE: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN
ASCLIN3_RXF: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT
ASCLIN0_SCLK: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT
ASCLIN0_SCLK: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT
ASCLIN1_SCLK: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT
ASCLIN1_SCLK: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT
ASCLIN1_SCLK: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT
ASCLIN1_SCLK: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT
ASCLIN1_SLSO: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT
ASCLIN1_SLSO: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT
ASCLIN1_SLSO: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT
ASCLIN2_SLSO: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT
ASCLIN2_SLSO: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT
ASCLIN2_SLSO: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT
ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT
ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT
ASCLIN0_TX: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT
ASCLIN0_TX: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN const IfxAsclin_Cts_In * | IfxAsclin_Cts_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]
IfxAsclin_Cts_In table. More...
IFX_EXTERN const IfxAsclin_Rts_Out * | IfxAsclin_Rts_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]
IfxAsclin_Rts_Out table. More...
IFX_EXTERN const IfxAsclin_Rx_In * | IfxAsclin_Rx_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]
IfxAsclin_Rx_In table. More...
IFX_EXTERN const IfxAsclin_Sclk_Out * | IfxAsclin_Sclk_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxAsclin_Sclk_Out table. More...
IFX_EXTERN const IfxAsclin_Slso_Out * | IfxAsclin_Slso_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxAsclin_Slso_Out table. More...
IFX_EXTERN const IfxAsclin_Tx_Out * | IfxAsclin_Tx_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]
IfxAsclin_Tx_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxAsclin_Cts_In

struct IfxAsclin_Cts_In

CTS pin mapping structure.

Definition at line 56 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Cts_In:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxAsclin_Rx_In

struct IfxAsclin_Rx_In

RX pin mapping structure.

Definition at line 64 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Rx_In:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxAsclin_Rts_Out

struct IfxAsclin_Rts_Out

RTS pin mapping structure.

Definition at line 72 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Rts_Out:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxAsclin_Sclk_Out

struct IfxAsclin_Sclk_Out

SCLK pin mapping structure.

Definition at line 80 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Sclk_Out:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxAsclin_Slso_Out

struct IfxAsclin_Slso_Out

SLSO pin mapping structure.

Definition at line 88 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Slso_Out:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxAsclin_Tx_Out

struct IfxAsclin_Tx_Out

TX pin mapping structure.

Definition at line 96 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Tx_Out:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS

#define IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS 2

Definition at line 197 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_NUM_MODULES

#define IFXASCLIN_PINMAP_NUM_MODULES 4

Table dimensions.

Definition at line 196 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS

#define IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS 2

Definition at line 198 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS

#define IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS 7

Definition at line 199 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS

#define IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS 9

Definition at line 200 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS

#define IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS 5

Definition at line 201 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS

#define IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS 10

Definition at line 202 of file IfxAsclin_PinMap.h.

Variable Documentation

◆ IfxAsclin0_CTSA_P14_9_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN

ASCLIN0_CTSA: ASCLIN0 input.

Definition at line 103 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_RTS_P14_7_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT

ASCLIN0_RTS: ASCLIN0 output.

Definition at line 109 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_RXA_P14_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN

ASCLIN0_RXA: ASCLIN0 input.

Definition at line 115 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_RXB_P15_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN

ASCLIN0_RXB: ASCLIN0 input.

Definition at line 116 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_SCLK_P14_0_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT

ASCLIN0_SCLK: ASCLIN0 output.

Definition at line 134 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_SCLK_P15_2_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT

ASCLIN0_SCLK: ASCLIN0 output.

Definition at line 135 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_TX_P14_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT

ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin.

Definition at line 165 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_TX_P14_1_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT

ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin.

Definition at line 166 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_TX_P15_2_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT

ASCLIN0_TX: ASCLIN0 output.

Definition at line 167 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_TX_P15_3_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT

ASCLIN0_TX: ASCLIN0 output.

Definition at line 168 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_CTSA_P20_7_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN

ASCLIN1_CTSA: ASCLIN1 input.

Definition at line 104 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_CTSB_P32_4_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN

ASCLIN1_CTSB: ASCLIN1 input.

Definition at line 105 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RTS_P20_6_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT

ASCLIN1_RTS: ASCLIN1 output.

Definition at line 110 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RTS_P23_1_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT

ASCLIN1_RTS: ASCLIN1 output.

Definition at line 111 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXA_P15_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN

ASCLIN1_RXA: ASCLIN1 input.

Definition at line 117 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXB_P15_5_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN

ASCLIN1_RXB: ASCLIN1 input.

Definition at line 118 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXC_P20_9_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN

ASCLIN1_RXC: ASCLIN1 input.

Definition at line 119 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXD_P14_8_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN

ASCLIN1_RXD: ASCLIN1 input.

Definition at line 120 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXE_P11_10_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN

ASCLIN1_RXE: ASCLIN1 input.

Definition at line 121 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXF_P33_13_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN

ASCLIN1_RXF: ASCLIN1 input.

Definition at line 122 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXG_P02_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN

ASCLIN1_RXG: ASCLIN1 input.

Definition at line 123 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SCLK_P15_0_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT

ASCLIN1_SCLK: ASCLIN1 output.

Definition at line 136 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SCLK_P20_10_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT

ASCLIN1_SCLK: ASCLIN1 output.

Definition at line 137 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SCLK_P33_11_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT

ASCLIN1_SCLK: ASCLIN1 output.

Definition at line 138 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SCLK_P33_12_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT

ASCLIN1_SCLK: ASCLIN1 output.

Definition at line 139 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SLSO_P14_3_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT

ASCLIN1_SLSO: ASCLIN1 output.

Definition at line 154 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SLSO_P20_8_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT

ASCLIN1_SLSO: ASCLIN1 output.

Definition at line 155 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SLSO_P33_10_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT

ASCLIN1_SLSO: ASCLIN1 output.

Definition at line 156 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P02_2_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 169 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P11_12_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 170 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P14_10_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 171 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P15_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 172 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P15_1_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 173 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P15_4_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 174 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P15_5_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 175 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P20_10_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 176 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P33_12_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 177 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P33_13_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 178 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_CTSA_P10_7_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN

ASCLIN2_CTSA: ASCLIN2 input.

Definition at line 106 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_CTSB_P33_5_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN

ASCLIN2_CTSB: ASCLIN2 input.

Definition at line 107 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RTS_P10_8_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT

ASCLIN2_RTS: ASCLIN2 output.

Definition at line 112 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RTS_P33_4_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT

ASCLIN2_RTS: ASCLIN2 output.

Definition at line 113 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RXA_P14_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN

ASCLIN2_RXA: ASCLIN2 input.

Definition at line 124 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RXB_P02_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN

ASCLIN2_RXB: ASCLIN2 input.

Definition at line 125 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RXD_P10_6_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN

ASCLIN2_RXD: ASCLIN2 input.

Definition at line 126 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RXE_P33_8_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN

ASCLIN2_RXE: ASCLIN2 input.

Definition at line 127 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RXG_P02_0_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN

ASCLIN2_RXG: ASCLIN2 input.

Definition at line 128 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SCLK_P02_4_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT

ASCLIN2_SCLK: ASCLIN2 output.

Definition at line 140 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SCLK_P10_6_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT

ASCLIN2_SCLK: ASCLIN2 output.

Definition at line 141 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SCLK_P14_2_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT

ASCLIN2_SCLK: ASCLIN2 output.

Definition at line 142 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SCLK_P33_7_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT

ASCLIN2_SCLK: ASCLIN2 output.

Definition at line 143 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SCLK_P33_9_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT

ASCLIN2_SCLK: ASCLIN2 output.

Definition at line 144 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SLSO_P02_3_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT

ASCLIN2_SLSO: ASCLIN2 output.

Definition at line 157 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SLSO_P10_5_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT

ASCLIN2_SLSO: ASCLIN2 output.

Definition at line 158 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SLSO_P33_6_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT

ASCLIN2_SLSO: ASCLIN2 output.

Definition at line 159 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P02_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT

ASCLIN2_TX: ASCLIN2 output.

Definition at line 179 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P10_5_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT

ASCLIN2_TX: ASCLIN2 output.

Definition at line 180 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P14_2_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT

ASCLIN2_TX: ASCLIN2 output.

Definition at line 181 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P14_3_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT

ASCLIN2_TX: ASCLIN2 output.

Definition at line 182 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P33_8_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT

ASCLIN2_TX: ASCLIN2 output.

Definition at line 183 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P33_9_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT

ASCLIN2_TX: ASCLIN2 output.

Definition at line 184 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_CTSA_P00_12_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN

ASCLIN3_CTSA: ASCLIN3 input.

Definition at line 108 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RTS_P00_9_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT

ASCLIN3_RTS: ASCLIN3 output.

Definition at line 114 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXA_P15_7_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN

ASCLIN3_RXA: ASCLIN3 input.

Definition at line 129 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXC_P20_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN

ASCLIN3_RXC: ASCLIN3 input.

Definition at line 130 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXD_P32_2_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN

ASCLIN3_RXD: ASCLIN3 input.

Definition at line 131 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXE_P00_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN

ASCLIN3_RXE: ASCLIN3 input.

Definition at line 132 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXF_P21_6_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN

ASCLIN3_RXF: ASCLIN3 input.

Definition at line 133 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P00_0_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 145 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P00_2_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 146 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P15_6_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 147 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P15_8_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 148 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P20_0_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 149 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P21_5_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 150 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P21_7_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 151 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P32_3_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 152 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P33_2_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 153 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SLSO_P00_3_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT

ASCLIN3_SLSO: ASCLIN3 output.

Definition at line 160 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SLSO_P14_3_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT

ASCLIN3_SLSO: ASCLIN3 output.

Definition at line 161 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SLSO_P21_2_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT

ASCLIN3_SLSO: ASCLIN3 output.

Definition at line 162 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SLSO_P21_6_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT

ASCLIN3_SLSO: ASCLIN3 output.

Definition at line 163 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SLSO_P33_1_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT

ASCLIN3_SLSO: ASCLIN3 output.

Definition at line 164 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P00_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 185 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P00_1_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 186 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P15_6_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 187 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P15_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 188 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P20_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 189 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P20_3_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 190 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P21_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 191 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P32_2_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 192 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P32_3_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 193 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Cts_In_pinTable

IFX_EXTERN const IfxAsclin_Cts_In* IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]

IfxAsclin_Cts_In table.

Definition at line 206 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Rts_Out_pinTable

IFX_EXTERN const IfxAsclin_Rts_Out* IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]

IfxAsclin_Rts_Out table.

Definition at line 209 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Rx_In_pinTable

IFX_EXTERN const IfxAsclin_Rx_In* IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]

IfxAsclin_Rx_In table.

Definition at line 212 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Sclk_Out_pinTable

IFX_EXTERN const IfxAsclin_Sclk_Out* IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]

IfxAsclin_Sclk_Out table.

Definition at line 215 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Slso_Out_pinTable

IFX_EXTERN const IfxAsclin_Slso_Out* IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]

IfxAsclin_Slso_Out table.

Definition at line 218 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Tx_Out_pinTable

IFX_EXTERN const IfxAsclin_Tx_Out* IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]

IfxAsclin_Tx_Out table.

Definition at line 221 of file IfxAsclin_PinMap.h.


iLLD_TC26B: How to use the ASCLIN ASC Interface driver?

How to use the ASCLIN ASC Interface driver?
iLLD » ASCLIN
Collaboration diagram for How to use the ASCLIN ASC Interface driver?:

The ASC interface driver provides a default ASCLIN configuration for asynchronous serial communication in 8bit mode, and a set of data transfer routines.

Data transfers are buffered by the hardware based FIFOs, and in addition by software based FIFOs with a configurable size. Incoming and outgoing data is transfered in background from/to the ASCLIN peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Asclin/Asc/IfxAsclin_Asc.h>

Variables

Declare the ASC handle and the FIFOs as global variables in your C code:

// used globally
static IfxAsclin_Asc asc;
#define ASC_TX_BUFFER_SIZE 64
static uint8 ascTxBuffer[ASC_TX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
#define ASC_RX_BUFFER_SIZE 64
static uint8 ascRxBuffer[ASC_RX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];

As you can see above, the transfer buffers allocate not only memory for the data itself, but also for FIFO runtime variables. 8 bytes have to be added to ensure a proper circular buffer handling independent from the address to which the buffers have been located.

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_ASCLIN0_TX 1
#define IFX_INTPRIO_ASCLIN0_RX 2
#define IFX_INTPRIO_ASCLIN0_ER 3

Add the interrupt service routines to your C code. They have to call the ASC interrupt handlers by passing the asc handle:

IFX_INTERRUPT(asclin0TxISR, 0, IFX_INTPRIO_ASCLIN0_TX)
{
IfxAsclin_Asc_isrTransmit(&asc);
}
IFX_INTERRUPT(asclin0RxISR, 0, IFX_INTPRIO_ASCLIN0_RX)
{
IfxAsclin_Asc_isrReceive(&asc);
}
IFX_INTERRUPT(asclin0ErISR, 0, IFX_INTPRIO_ASCLIN0_ER)
{
IfxAsclin_Asc_isrError(&asc);
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&asclin0TxISR, IFX_INTPRIO_ASCLIN0_TX);
IfxCpu_Irq_installInterruptHandler(&asclin0RxISR, IFX_INTPRIO_ASCLIN0_RX);
IfxCpu_Irq_installInterruptHandler(&asclin0ErISR, IFX_INTPRIO_ASCLIN0_ER);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create module config
IfxAsclin_Asc_Config ascConfig;
IfxAsclin_Asc_initModuleConfig(&ascConfig, &MODULE_ASCLIN0);
// set the desired baudrate
ascConfig.baudrate.prescaler = 1;
ascConfig.baudrate.baudrate = 1000000; // FDR values will be calculated in initModule
// ISR priorities and interrupt target
ascConfig.interrupt.txPriority = IFX_INTPRIO_ASCLIN0_TX;
ascConfig.interrupt.rxPriority = IFX_INTPRIO_ASCLIN0_RX;
ascConfig.interrupt.erPriority = IFX_INTPRIO_ASCLIN0_ER;
ascConfig.interrupt.typeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
// FIFO configuration
ascConfig.txBuffer = &ascTxBuffer;
ascConfig.txBufferSize = ASC_TX_BUFFER_SIZE;
ascConfig.rxBuffer = &ascRxBuffer;
ascConfig.rxBufferSize = ASC_RX_BUFFER_SIZE;
// pin configuration
const IfxAsclin_Asc_Pins pins = {
NULL, IfxPort_InputMode_pullUp, // CTS pin not used
&IfxAsclin0_RXA_P14_1_IN, IfxPort_InputMode_pullUp, // Rx pin
NULL, IfxPort_OutputMode_pushPull, // RTS pin not used
&IfxAsclin0_TX_P14_0_OUT, IfxPort_OutputMode_pushPull, // Tx pin
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
ascConfig.pins = &pins;
// initialize module
//IfxAsclin_Asc asc; // defined globally
IfxAsclin_Asc_initModule(&asc, &ascConfig);

The ASC is ready for use now!

Data Transfers

Simple Transfers

The ASC driver provides simple to use transfer functions, which are blocking.

This means: you can send as much data as you want without taking care for the fill state of the FIFO. If the FIFO is full, the blocking function will wait until the next byte has been transfered to ASCLIN before putting the new byte into the FIFO:

// send 3 bytes
IfxAsclin_Asc_blockingWrite(&asc, 0x01);
IfxAsclin_Asc_blockingWrite(&asc, 0x02);
IfxAsclin_Asc_blockingWrite(&asc, 0x03);

A simple to use receive function is available as well. If no data is in the receive FIFO, it will wait until the next byte has been received:

// receive a byte
uint8 data = IfxAsclin_Asc_blockingRead(&asc);

Streamed Transfers

Streamed transfers are handled faster by the ASC driver and therefore they are recommended whenever a large bulk of data should be sent. Here an example:

uint8 txData[9] = { 0x49, 0x6e, 0x66, 0x69, 0x6e, 0x65, 0x6f, 0x6e, 0x0a };
{
Ifx_SizeT count = 9;
IfxAsclin_Asc_write(&asc, txData, &count, TIME_INFINITE);
}

Data can be received the following way:

uint8 rxData[5];
{
// wait until 5 bytes have been received
Ifx_SizeT count = 5;
IfxAsclin_Asc_read(&asc, rxData, &count, TIME_INFINITE);
}

Or alternatively with:

uint8 rxData[5];
{
// how many bytes have been received?
Ifx_SizeT count = IfxAsclin_Asc_getReadCount(&asc);
// limit to our buffer size
count = count < 5 ? count : 5;
// transfer received data into buffer
IfxAsclin_Asc_read(&asc, rxData, &count, TIME_INFINITE);
}


iLLD_TC26B: ASC

Modules
ASC
iLLD » ASCLIN
Collaboration diagram for ASC:

Modules

Data Structures
Interrupt Functions
Simple Communication
Stream based Communication (STDIO)
Module Functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » ASCLIN » ASC
Collaboration diagram for Data Structures:

Data Structures

struct | IfxAsclin_Asc_BaudRate
Structure for baudrate. More...
struct | IfxAsclin_Asc_BitTimingControl
Structure for bit timings. More...
struct | IfxAsclin_Asc_FifoControl
Structure for FIFO control. More...
struct | IfxAsclin_Asc_FrameControl
Structure for frame control. More...
struct | IfxAsclin_Asc_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxAsclin_Asc_Pins
Structure for ASC pin configuration. More...
struct | IfxAsclin_Asc
Module Handle. More...
struct | IfxAsclin_Asc_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxAsclin_Asc_BaudRate

struct IfxAsclin_Asc_BaudRate

Structure for baudrate.

Definition at line 262 of file IfxAsclin_Asc.h.

Data Fields
float32 | baudrate | value of the required baudrate
IfxAsclin_OversamplingFactor | oversampling | BITCON.OVERSAMPLING, division ratio of the baudrate post devider.
uint16 | prescaler | BITCON.PRESCALER, the division ratio of the predevider.

◆ IfxAsclin_Asc_BitTimingControl

struct IfxAsclin_Asc_BitTimingControl

Structure for bit timings.

Definition at line 271 of file IfxAsclin_Asc.h.

Data Fields
IfxAsclin_SamplesPerBit | medianFilter | BITCON.SM, number of samples per bit (1 or 3), sample mode/median filter.
IfxAsclin_SamplePointPosition | samplePointPosition | BITCON.SAMPLEPOINT, sample point position.

◆ IfxAsclin_Asc_FifoControl

struct IfxAsclin_Asc_FifoControl

Structure for FIFO control.

Definition at line 279 of file IfxAsclin_Asc.h.

Data Fields
IfxAsclin_ReceiveBufferMode | buffMode | RXFIFOCON.BUFF, receive buffer mode (Rx FIFO or Rx buffer)
IfxAsclin_TxFifoInletWidth | inWidth | TXFIFOCON.INW, transmit FIFO inlet width.
IfxAsclin_RxFifoOutletWidth | outWidth | RXFIFOCON.OTW, receive FIFO oulet width.
IfxAsclin_RxFifoInterruptLevel | rxFifoInterruptLevel | RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
IfxAsclin_TxFifoInterruptLevel | txFifoInterruptLevel | TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.

◆ IfxAsclin_Asc_FrameControl

struct IfxAsclin_Asc_FrameControl

Structure for frame control.

Definition at line 290 of file IfxAsclin_Asc.h.

Data Fields
IfxAsclin_DataLength | dataLength | DATCON.DATALENGTH, data length, number of bits per transfer.
IfxAsclin_FrameMode | frameMode | FRAMECON.MODE, mode of operation of the module.
IfxAsclin_IdleDelay | idleDelay | FRAMECON.IDLE, idle delay.
boolean | parityBit | FRAMECON.PEN, parity enable.
IfxAsclin_ParityType | parityType | FRAMECON.ODD, parity type (even or odd)
IfxAsclin_ShiftDirection | shiftDir | FRAMECON.MSB, shift direction.
IfxAsclin_StopBit | stopBit | FRAMECON.STOP, number of stop bits.

◆ IfxAsclin_Asc_InterruptConfig

struct IfxAsclin_Asc_InterruptConfig

Structure for interrupt configuration.

Definition at line 303 of file IfxAsclin_Asc.h.

Data Fields
uint16 | erPriority | error interrupt priority
uint16 | rxPriority | receive interrupt priority
uint16 | txPriority | transmit interrupt priority
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxAsclin_Asc_Pins

struct IfxAsclin_Asc_Pins

Structure for ASC pin configuration.

Definition at line 313 of file IfxAsclin_Asc.h.

Collaboration diagram for IfxAsclin_Asc_Pins:
[legend]
Data Fields
IFX_CONST IfxAsclin_Cts_In * | cts | ASC clear to send (CTS) pin.
IfxPort_InputMode | ctsMode | Cts pin as input.
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxAsclin_Rts_Out * | rts | ASC (request to send) RTS pin.
IfxPort_OutputMode | rtsMode | Rts as output.
IFX_CONST IfxAsclin_Rx_In * | rx | ASC Rx pin.
IfxPort_InputMode | rxMode | Rx pin as input.
IFX_CONST IfxAsclin_Tx_Out * | tx | ASC Tx pin.
IfxPort_OutputMode | txMode | Tx as output.

◆ IfxAsclin_Asc

struct IfxAsclin_Asc

Module Handle.

Definition at line 340 of file IfxAsclin_Asc.h.

Collaboration diagram for IfxAsclin_Asc:
[legend]
Data Fields
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
Ifx_DataBufferMode | dataBufferMode | Rx buffer mode.
IfxAsclin_Asc_ErrorFlagsUnion | errorFlags | error reported by ASCLIN during runtime (written by IfxAsclin_Asc_isrError)
Ifx_Fifo * | rx | Receive FIFO buffer.
volatile boolean | rxSwFifoOverflow | Will be set by IfxAsclin_Asc_isrReceive if the SW Fifo overflowed.
volatile uint32 | sendCount | Number of byte that are send out, this value is reset with the function Asc_If_resetSendCount()
Ifx_Fifo * | tx | Transmit FIFO buffer.
volatile boolean | txInProgress | Ongoing transfer. Will be set by IfxAsclin_Asc_initiateTransmission, and cleared by IfxAsclin_Asc_isrTransmit.
volatile Ifx_TickTime | txTimestamp | Time stamp of the latest send byte.

◆ IfxAsclin_Asc_Config

struct IfxAsclin_Asc_Config

Configuration structure of the module.

Definition at line 355 of file IfxAsclin_Asc.h.

Collaboration diagram for IfxAsclin_Asc_Config:
[legend]
Data Fields
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
IfxAsclin_Asc_BaudRate | baudrate | structure for baudrate
IfxAsclin_Asc_BitTimingControl | bitTiming | structure for bit timings
IfxAsclin_ClockSource | clockSource | CSR.CLKSEL, clock source selection.
Ifx_DataBufferMode | dataBufferMode | Rx buffer mode.
IfxAsclin_Asc_ErrorFlagsUnion | errorFlags | structure for error flags
IfxAsclin_Asc_FifoControl | fifo | structure for FIFO control
IfxAsclin_Asc_FrameControl | frame | structure for frame control
IfxAsclin_Asc_InterruptConfig | interrupt | structure for interrupt configuration
boolean | loopBack | IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
IFX_CONST IfxAsclin_Asc_Pins * | pins | structure for ASC pins
void * | rxBuffer | The buffer parameter must point on a free memory location where the buffer object will be Initialised. The Size of this area must be at least equals to "rxBufferSize + sizeof(Ifx_Fifo) + 8". Not tacking this in account may result in unpredictable behavior. If set to NULL, the buffer will be allocated dynamically according to rxBufferSize
Ifx_SizeT | rxBufferSize | Size of the rx buffer.
void * | txBuffer | The buffer parameter must point on a free memory location where the buffer object will be Initialised. The Size of this area must be at least equals to "txBufferSize + sizeof(Ifx_Fifo) + 8". Not tacking this in account may result in unpredictable behavior. If set to NULL_PTR, the buffer will be allocated dynamically according to txBufferSize
Ifx_SizeT | txBufferSize | Size of the tx buffer.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » ASCLIN » ASC
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN void | IfxAsclin_Asc_isrError (IfxAsclin_Asc *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Asc_isrReceive (IfxAsclin_Asc *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Asc_isrTransmit (IfxAsclin_Asc *asclin)
ISR transmit routine. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Asc_isrError()

IFX_EXTERN void IfxAsclin_Asc_isrError ( IfxAsclin_Asc * asclin )

ISR error routine.

See also
IfxSdtIf_DPipe_OnError

Currently it only stores error flags in the handle (asclin->errorFlags) whenever an error happened. The user software could react on these flags, e.g. it could re-initialize the module.

Parameters
asclin module handler
Returns
None

Definition at line 433 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_isrReceive()

IFX_EXTERN void IfxAsclin_Asc_isrReceive ( IfxAsclin_Asc * asclin )

ISR receive routine.

See also
IfxSdtIf_DPipe_OnReceive
Parameters
asclin module handler
Returns
None

Definition at line 470 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_isrTransmit()

IFX_EXTERN void IfxAsclin_Asc_isrTransmit ( IfxAsclin_Asc * asclin )

ISR transmit routine.

See also
IfxSdtIf_DPipe_OnTransmit
Parameters
asclin module handler
Returns
None

Definition at line 512 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().


iLLD_TC26B: Simple Communication

Functions
Simple Communication
iLLD » ASCLIN » ASC
Collaboration diagram for Simple Communication:

Functions

IFX_EXTERN uint8 | IfxAsclin_Asc_blockingRead (IfxAsclin_Asc *asclin)
Reads data from the Rx FIFO. More...
IFX_EXTERN boolean | IfxAsclin_Asc_blockingWrite (IfxAsclin_Asc *asclin, uint8 data)
Writes data into the Tx FIFO. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Asc_blockingRead()

IFX_EXTERN uint8 IfxAsclin_Asc_blockingRead ( IfxAsclin_Asc * asclin )

Reads data from the Rx FIFO.

Parameters
asclin module handle
Returns
number of received data words

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 53 of file IfxAsclin_Asc.c.

◆ IfxAsclin_Asc_blockingWrite()

IFX_EXTERN boolean IfxAsclin_Asc_blockingWrite | ( | IfxAsclin_Asc * | asclin,
 |  | uint8 | data
 | ) |  |

Writes data into the Tx FIFO.

Parameters
asclin | module handle
data | the data byte which should be sent
Returns
Returns TRUE if data could be written

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 65 of file IfxAsclin_Asc.c.


iLLD_TC26B: Stream based Communication (STDIO)

Functions
Stream based Communication (STDIO)
iLLD » ASCLIN » ASC
Collaboration diagram for Stream based Communication (STDIO):

Functions

IFX_EXTERN boolean | IfxAsclin_Asc_canReadCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
IFX_EXTERN boolean | IfxAsclin_Asc_canWriteCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
IFX_EXTERN void | IfxAsclin_Asc_clearRx (IfxAsclin_Asc *asclin)
IFX_EXTERN void | IfxAsclin_Asc_clearTx (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_flushTx (IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
IFX_EXTERN sint32 | IfxAsclin_Asc_getReadCount (IfxAsclin_Asc *asclin)
IFX_EXTERN IfxStdIf_DPipe_ReadEvent | IfxAsclin_Asc_getReadEvent (IfxAsclin_Asc *asclin)
IFX_EXTERN uint32 | IfxAsclin_Asc_getSendCount (IfxAsclin_Asc *asclin)
IFX_EXTERN Ifx_TickTime | IfxAsclin_Asc_getTxTimeStamp (IfxAsclin_Asc *asclin)
IFX_EXTERN sint32 | IfxAsclin_Asc_getWriteCount (IfxAsclin_Asc *asclin)
IFX_EXTERN IfxStdIf_DPipe_WriteEvent | IfxAsclin_Asc_getWriteEvent (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_read (IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
IFX_EXTERN void | IfxAsclin_Asc_resetSendCount (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_write (IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)

Detailed Description

Function Documentation

◆ IfxAsclin_Asc_canReadCount()

IFX_EXTERN boolean IfxAsclin_Asc_canReadCount | ( | IfxAsclin_Asc * | asclin,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |
See also
IfxStdIf_DPipe_CanReadCount
Parameters
asclin | module handle
count | Count of data which should be checked (in bytes)
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes are available for read in the rx buffer, if not the Event is armed to be set when the buffer count is bigger or equal to the requested count.

Definition at line 73 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_canWriteCount()

IFX_EXTERN boolean IfxAsclin_Asc_canWriteCount | ( | IfxAsclin_Asc * | asclin,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |
See also
IfxStdIf_DPipe_CanWriteCount
Parameters
asclin | module handle
count | Count of data which should be checked (in bytes)
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes can be written to the tx buffer, if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count

Definition at line 79 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_clearRx()

IFX_EXTERN void IfxAsclin_Asc_clearRx ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_ClearRx
Parameters
asclin module handle
Returns
None

Definition at line 85 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_clearTx()

IFX_EXTERN void IfxAsclin_Asc_clearTx ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_ClearTx
Parameters
asclin module handle
Returns
None

Definition at line 92 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_flushTx()

IFX_EXTERN boolean IfxAsclin_Asc_flushTx | ( | IfxAsclin_Asc * | asclin,
 |  | Ifx_TickTime | timeout
 | ) |  |
See also
IfxStdIf_DPipe_FlushTx
Parameters
asclin | module handle
timeout | in system timer ticks
Returns
Returns TRUE if the FIFO is empty

Definition at line 109 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getReadCount()

IFX_EXTERN sint32 IfxAsclin_Asc_getReadCount ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_GetReadCount
Parameters
asclin module handle
Returns
The number of bytes in the rx buffer

Definition at line 130 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getReadEvent()

IFX_EXTERN IfxStdIf_DPipe_ReadEvent IfxAsclin_Asc_getReadEvent ( IfxAsclin_Asc * asclin )
See also
IIfxStdIf_DPipe_GetReadEvent
Parameters
asclin module handle
Returns
Read event object

Definition at line 136 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getSendCount()

IFX_EXTERN uint32 IfxAsclin_Asc_getSendCount ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_GetSendCount
Parameters
asclin module handle
Returns
number of bytes send

Definition at line 142 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getTxTimeStamp()

IFX_EXTERN Ifx_TickTime IfxAsclin_Asc_getTxTimeStamp ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_GetTxTimeStamp
Parameters
asclin module handle
Returns
Time in ticks

Definition at line 148 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getWriteCount()

IFX_EXTERN sint32 IfxAsclin_Asc_getWriteCount ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_GetWriteCount
Parameters
asclin module handle
Returns
The number of free bytes in the tx buffer

Definition at line 154 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getWriteEvent()

IFX_EXTERN IfxStdIf_DPipe_WriteEvent IfxAsclin_Asc_getWriteEvent ( IfxAsclin_Asc * asclin )
See also
IIfxStdIf_DPipe_GetWriteEvent
Parameters
asclin module handle
Returns
Write event object

Definition at line 160 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_read()

IFX_EXTERN boolean IfxAsclin_Asc_read | ( | IfxAsclin_Asc * | asclin,
 |  | void * | data,
 |  | Ifx_SizeT * | count,
 |  | Ifx_TickTime | timeout
 | ) |  |
See also
IfxStdIf_DPipe_Read
Parameters
asclin | module handle
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if all items could be read
Returns FALSE if not all the items could be read

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 564 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_blockingRead(), and IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_resetSendCount()

IFX_EXTERN void IfxAsclin_Asc_resetSendCount ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_ResetSendCount
Parameters
asclin module handle
Returns
None

Definition at line 574 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_write()

IFX_EXTERN boolean IfxAsclin_Asc_write | ( | IfxAsclin_Asc * | asclin,
 |  | const void * | data,
 |  | Ifx_SizeT * | count,
 |  | Ifx_TickTime | timeout
 | ) |  |
See also
IfxStdIf_DPipe_Write
Parameters
asclin | module handle
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if all items could be written
Returns FALSE if not all the items could be written

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 609 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_blockingWrite(), and IfxAsclin_Asc_stdIfDPipeInit().


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » ASCLIN » ASC
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxAsclin_Asc_disableModule (IfxAsclin_Asc *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Asc_initModule (IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Asc_initModuleConfig (IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Asc_disableModule()

IFX_EXTERN void IfxAsclin_Asc_disableModule ( IfxAsclin_Asc * asclin )

Disables the module.

Parameters
asclin module handle
Returns
None

Definition at line 99 of file IfxAsclin_Asc.c.

◆ IfxAsclin_Asc_initModule()

IFX_EXTERN IfxAsclin_Status IfxAsclin_Asc_initModule | ( | IfxAsclin_Asc * | asclin,
 |  | const IfxAsclin_Asc_Config * | config
 | ) |  |

Initialises the module.

Parameters
asclin | module handle
config | predefined configuration structure of the module
Returns
Status

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 166 of file IfxAsclin_Asc.c.

◆ IfxAsclin_Asc_initModuleConfig()

IFX_EXTERN void IfxAsclin_Asc_initModuleConfig | ( | IfxAsclin_Asc_Config * | config,
 |  | Ifx_ASCLIN * | asclin
 | ) |  |

Fills the config structure with default values.

Parameters
config | configuration structure of the module
asclin | pointer to ASCLIN registers
Returns
None

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 349 of file IfxAsclin_Asc.c.


iLLD_TC26B: How to use the ASCLIN LIN Interface driver?

How to use the ASCLIN LIN Interface driver?
iLLD » ASCLIN
Collaboration diagram for How to use the ASCLIN LIN Interface driver?:

The LIN interface driver provides a default ASCLIN configuration for asynchronous serial communication in 8bit mode, and a set of data transfer routines. It supports all four elementary LIN transactions in polling mode. TxH - Transmission of Header TxR - Transmission of Response RxH - Reception of Header RxR - Reception of Response

The driver also provides a LIN Master to be configured in Interrupt mode. In interrupt mode, following Lin frame transactions are provided. 1.Transmit Header only. 2.Transmit both Header and Response. 3.Transmit Header and Receive Response.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Asclin/Lin/IfxAsclin_Lin.h>

Variables

Declare the LIN handle as global variable in your C code:

// used globally
static IfxAsclin_Lin linMaster;
static IfxAsclin_Lin linSlave;

Interrupt Handler Installation

Define priorities for the Interrrupt handlers.

#define IFX_INTPRIO_ASCLIN1_RX 4 // Define the LIN1 receive interrupt priority.
#define IFX_INTPRIO_ASCLIN1_TX 8 // Define the LIN1 transmit interrupt priority.
#define IFX_INTPRIO_ASCLIN1_EX 12 // Define the LIN1 error interrupt priority.

Add the interrupt service routines to your C code. They have to call the LIN interrupt handlers by passing the lin handle:

IFX_INTERRUPT(ISR_Lin1_rx, 0, IFX_INTPRIO_ASCLIN1_RX);
IFX_INTERRUPT(ISR_Lin1_tx, 0, IFX_INTPRIO_ASCLIN1_TX);
IFX_INTERRUPT(ISR_Lin1_ex, 0, IFX_INTPRIO_ASCLIN1_EX);
void ISR_Lin1_rx(void)
{
IfxAsclin_Lin_isrReceive(&linMaster);
}
void ISR_Lin1_tx(void)
{
IfxAsclin_Lin_isrTransmit(&linMaster);
}
void ISR_Lin1_ex(void)
{
IfxAsclin_Lin_isrError(&linMaster);
}

Module Initialisation

The module can be initialised as either Master or Slave. Here an example:

Module Initialisation as Master

// create module config
IfxAsclin_Lin_Config linMasterConfig;
IfxAsclin_Lin_initModuleConfig(&linMasterConfig, &MODULE_ASCLIN1);
// set the lin mode of operation
linMasterConfig.linMode = IfxAsclin_LinMode_master;
// set the desired baudrate
linMasterConfig.btc.prescaler = 4;
linMasterConfig.brg.baudrate = 19200; // FDR values will be calculated in initModule
// pin configuration
const IfxAsclin_Lin_Pins pins = {
&IfxAsclin1_RXB_P15_5_IN, IfxPort_InputMode_pullUp, // Rx pin
&IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
linMasterConfig.pins = &pins;
//Lin Master Interrupt Config. Only needed for interrupt mode.
linConfig.isInterruptMode = TRUE;
linConfig.interrupt.rxPriority = ISR_PRIORITY(INTERRUPT_LIN1_RX);
linConfig.interrupt.txPriority = ISR_PRIORITY(INTERRUPT_LIN1_TX);
linConfig.interrupt.exPriority = ISR_PRIORITY(INTERRUPT_LIN1_EX);
//Optionally, if any interrupt has to be enabled during initialisation it can be done as follows.
//Otherwise the driver will enable required interrupts during run time.
linConfig.interrupt.enabledInterrupt.exCollisionDetectionError = TRUE; //This is optional example.
linConfig.lin.csi = FALSE;//checksum injection not written into RxFIFO
// initialize module
IfxAsclin_Lin_initModule(&linMaster, &linMasterConfig);

Module Initialisation as Slave

// create module config
IfxAsclin_Lin_Config linSlaveConfig;
IfxAsclin_Lin_initModuleConfig(&linSlaveConfig, &MODULE_ASCLIN1);
// set the lin mode of operation
linSlaveConfig.linMode = IfxAsclin_LinMode_slave;
// set the desired baudrate
linSlaveConfig.btc.prescaler = 4;
linSlaveConfig.brg.baudrate = 19200; // FDR values will be calculated in initModule
// choose the auto baudrate detection configuration
linSlaveConfig.brd.abd = FALSE;
linSlaveConfig.brd.lowerLimit = 0x4;
linSlaveConfig.brd.upperLimit = 0xF0;
// pin configuration
const IfxAsclin_Lin_Pins pins = {
&IfxAsclin1_RXB_P15_5_IN, IfxPort_InputMode_pullUp, // Rx pin
&IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
linSlaveConfig.pins = &pins;
// initialize module
//IfxAsclin_Lin linSlave; // defined globally
IfxAsclin_Lin_initModule(&linSlave, &linSlaveConfig);

The LIN is ready for use now!

Data Transfers

Master Transfers

The LIN driver provides all three master elementary transfers.

This means: you can send a header and based on the id byte, after transmission of header you can send or receive response and also can ignore the header based on the id:

// set the id bytes
uint8 txId = 0x80; // for sending respose after header
uint8 rxId = 0xC1; // for receiving respose after header
// prepare transmit bytes incase of sending response
uint8 txData[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
// prepare receive buffer incase of receiving response
uint8 rxData[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
uint32 size = 8;
//Polling mode APIs
//send response case
IfxAsclin_Lin_sendHeader(&linMaster, &txId);
if (lin.acknowledgmentFlags.txHeaderEnd == 1) // if the header is been transmitted succesfully
{
IfxAsclin_Lin_sendResponse(&linMaster, txData, size);
}
//receive response case
IfxAsclin_Lin_sendHeader(&linMaster, &rxId);
if (lin.acknowledgmentFlags.txHeaderEnd == 1) // if the header is been transmitted succesfully
{
IfxAsclin_Lin_receiveResponse(&linMaster, rxData, size);
}
//Interrupt mode APIs
IfxAsclin_Lin_PduType pdu;
pdu.pid = 0x42;
pdu.checksumMode = IfxAsclin_Checksum_enhanced;
pdu.dataLength = 8;
pdu.direction = IfxAsclin_Lin_Direction_TransmitHeaderAndResponse; //Transmits both Header and Response
pdu.dataPtr = &txData[0];
IfxAsclin_Lin_sendFrame(&linMaster,&pdu);
//Here Poll for linMaster.acknowledgmentFlags.txResponseEnd to detect end of transmission of frame.
pdu.pid = 0xC4;
pdu.direction = IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse; //Transmits Header and expects slave to respond
IfxAsclin_Lin_sendFrame(&linMaster,&pdu);
//Here Poll for linMaster.acknowledgmentFlags.rxResponseEnd
//linMaster.linFrameData.rxResponseData[8] will have received response data if slave replies.

Slave Transfers

Same as master the LIN driver provides all three slave elemnatry tranfers.

This means: you can receive a header and based on the id byte received, you can send or receive response and can also ignore the header based on the id:

uint8 id; // for storing received id byte
// prepare transmit bytes incase of sending response
uint8 txData[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
// prepare receive buffer incase of receiving response
uint8 rxData[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
uint32 size = 8;
// receive header
IfxAsclin_Lin_receiveHeader(&linSlave, &id);
// if data is requsted by master
if(id == txId)
{
IfxAsclin_Lin_sendResponse(&linSlave, txData, size); // send response
}
// if header is follwed by response
else if(id == rxId)
{
IfxAsclin_Lin_receiveResponse(&linSlave, rxData, size); // receive response
}
// if header is not for this slave
else
{
IfxAsclin_Lin_ignoreHeader(&linSlave);
}


iLLD_TC26B: LIN

Modules
LIN
iLLD » ASCLIN
Collaboration diagram for LIN:

Modules

Data Structures
Elementary Transactions
Module Functions
Error Handling Functions
Interrupt Functions
Enumerations

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » ASCLIN » LIN
Collaboration diagram for Data Structures:

Data Structures

struct | IfxAsclin_Lin_EnabledInterrupts
Structure to store interrupts which are enabled during initialisation. More...
struct | IfxAsclin_Lin_FrameControlFlags
Structure for Lin Frame Control flags. More...
struct | IfxAsclin_Lin_AcknowledgementFlags
Structure for Acknowledgement Flags. More...
struct | IfxAsclin_Lin_BaudrateDetection
Structure for Baudrate Detection. More...
struct | IfxAsclin_Lin_BaudrateGeneration
Structure for Baudrate Generation. More...
struct | IfxAsclin_Lin_BitSamplingControl
Structure for Bit Sampling. More...
struct | IfxAsclin_Lin_BitTimingControl
Structure for Bit Timing. More...
struct | IfxAsclin_Lin_DataControl
Structure for Data Control. More...
struct | IfxAsclin_Lin_ErrorFlags
Structure for Error Flags. More...
struct | IfxAsclin_Lin_FifoControl
Structure for FIFO Control. More...
struct | IfxAsclin_Lin_FrameControl
Structure for Frame Control. More...
struct | IfxAsclin_Lin_FrameDataControl
Structure for Frame Data and Control flags. More...
struct | IfxAsclin_Lin_InterruptConfig
Structure for LIN Interrupt Configuration. More...
struct | IfxAsclin_Lin_LinControl
Structure for lin Control. More...
struct | IfxAsclin_Lin_Pins
Structure for LIN pin configuration. More...
struct | IfxAsclin_Lin
struct | IfxAsclin_Lin_Config
Configuration structure of the module. More...
struct | IfxAsclin_Lin_PduType
Structure to hold Lin Pdu data. More...

Detailed Description

Data Structure Documentation

◆ IfxAsclin_Lin_EnabledInterrupts

struct IfxAsclin_Lin_EnabledInterrupts

Structure to store interrupts which are enabled during initialisation.

Definition at line 346 of file IfxAsclin_Lin.h.

Data Fields
uint16 | exBreakDetected: 1 | Break Detected.
uint16 | exCollisionDetectionError: 1 | Collision Detection Error.
uint16 | exFramingError: 1 | Framing Error.
uint16 | exHeaderTimeout: 1 | Header Timeout.
uint16 | exLinAutobaudDetectionError: 1 | Lin Autobaud Detection Error.
uint16 | exLinChecksumError: 1 | Lin Checksum Error.
uint16 | exLinParityError: 1 | Lin Parity Error.
uint16 | exReceiveFIFOOverflow: 1 | Receive FIFO Overflow.
uint16 | exResponseTimeout: 1 | Response Timeout.
uint16 | exTransmissionCompleted: 1 | Transmission Completed.
uint16 | exTransmitFIFOOverflow: 1 | Transmit FIFO Overflow.
uint16 | rxReceivedHeader: 1 | Received Header.
uint16 | rxReceivedResponse: 1 | Received Response.
uint16 | txTransmittedHeader: 1 | Transmitted Header.
uint16 | txTransmittedResponse: 1 | Transmitted Response.

◆ IfxAsclin_Lin_FrameControlFlags

struct IfxAsclin_Lin_FrameControlFlags

Structure for Lin Frame Control flags.

Definition at line 367 of file IfxAsclin_Lin.h.

Data Fields
uint16 | rxHeaderErrorOccurred: 1 | Flag to indicate error occurred during reception of Header.
uint16 | rxHeaderInProgress: 1 | Flag to indicate Header reception is initiated and is in progress.
uint16 | rxResponseErrorOccurred: 1 | Flag to indicate error occurred during reception of Response.
uint16 | rxResponseInProgress: 1 | Flag to indicate Response reception is initiated and is in progress.
uint16 | txHeaderErrorOccurred: 1 | Flag to indicate error occurred during transmission of Header.
uint16 | txHeaderInProgress: 1 | Flag to indicate Header transmission is initiated and is in progress.
uint16 | txResponseErrorOccurred: 1 | Flag to indicate error occurred during transmission of Response.
uint16 | txResponseInProgress: 1 | Flag to indicate Response transmission is initiated and is in progress.
uint16 | txSendHeaderOnly: 1 | Flag indicating that only Header is transmitted.
uint16 | txSendResponse: 1 | Flag to indicate Response is transmitted.

◆ IfxAsclin_Lin_AcknowledgementFlags

struct IfxAsclin_Lin_AcknowledgementFlags

Structure for Acknowledgement Flags.

Definition at line 387 of file IfxAsclin_Lin.h.

Data Fields
uint8 | rxHeaderEnd: 1 | receive header end
uint8 | rxResponseEnd: 1 | receive response end
uint8 | txCompleted: 1 | transmission completed
uint8 | txHeaderEnd: 1 | transmit header end
uint8 | txResponseEnd: 1 | transmit response end

◆ IfxAsclin_Lin_BaudrateDetection

struct IfxAsclin_Lin_BaudrateDetection

Structure for Baudrate Detection.

Definition at line 398 of file IfxAsclin_Lin.h.

Data Fields
boolean | abd | LINCON.ABD, autobaud detection enable.
uint8 | lowerLimit | BRD.LOWERLIMIT, auto baudrate detection lowerlimit.
uint8 | measured | BRD.MEASURED, measured time interval between the first and the fifth falling edge of the sync byte.
uint8 | upperLimit | BRD.UPPERLIMIT, auto baudrate detection upperlimit.

◆ IfxAsclin_Lin_BaudrateGeneration

struct IfxAsclin_Lin_BaudrateGeneration

Structure for Baudrate Generation.

Definition at line 409 of file IfxAsclin_Lin.h.

Data Fields
float32 | baudrate | value of the required baudrate
uint16 | denominator | BRG.DENOMINATOR, defines the denominator of fractional divider.
uint16 | numerator | BRG.NUMERATOR, defines the numerator of fractional divider.

◆ IfxAsclin_Lin_BitSamplingControl

struct IfxAsclin_Lin_BitSamplingControl

Structure for Bit Sampling.

Definition at line 418 of file IfxAsclin_Lin.h.

Data Fields
uint8 | filterDepth | IOCR.DEPTH, digital glitch filter depth.
IfxAsclin_SamplesPerBit | medianFilter | BITCON.SM, no. of samples per bit 1 or 3.
IfxAsclin_SamplePointPosition | samplePointPosition | BITCON.SAMPLEPOINT, sample point position.

◆ IfxAsclin_Lin_BitTimingControl

struct IfxAsclin_Lin_BitTimingControl

Structure for Bit Timing.

Definition at line 427 of file IfxAsclin_Lin.h.

Data Fields
IfxAsclin_OversamplingFactor | oversampling | BITCON.OVERSAMPLING, postdivider, used for oversampling.
uint16 | prescaler | BITCON.PRESCALER, predivider to generate the baud rate.

◆ IfxAsclin_Lin_DataControl

struct IfxAsclin_Lin_DataControl

Structure for Data Control.

Definition at line 435 of file IfxAsclin_Lin.h.

Data Fields
IfxAsclin_Checksum | checksum | DATCON.CSM, checksum mode (classic or enhanced)
IfxAsclin_DataLength | dataLength | DATCON.DATALENGTH, data length, number of bits per transfer.
IfxAsclin_HeaderResponseSelect | headerOnly | DATCON.HO, Lin frame with header and response or header only.
uint16 | responseTimeout | DATCON.RESPONSE, timeout limit.
IfxAsclin_LinResponseTimeoutMode | responseTimeoutMode | DATCON.RM, response mode (response or frame timeout threshold)

◆ IfxAsclin_Lin_ErrorFlags

struct IfxAsclin_Lin_ErrorFlags

Structure for Error Flags.

Definition at line 446 of file IfxAsclin_Lin.h.

Data Fields
uint8 | breakDetected: 1 | break detected
uint8 | collisionDetectionError: 1 | collision detection error
uint8 | frameError: 1 | frame error
uint8 | headerTimeout: 1 | header timeout
uint8 | linAutobaudDetectionError: 1 | lin autobaud detection error
uint8 | linChecksumError: 1 | lin checksum error
uint8 | linParityError: 1 | lin parity error
uint8 | responseTimeout: 1 | response timeout
uint8 | rxFifoOverflow: 1 | receive FIFO overflow error
uint8 | txFifoOverflow: 1 | transmit FIFO overflow error

◆ IfxAsclin_Lin_FifoControl

struct IfxAsclin_Lin_FifoControl

Structure for FIFO Control.

Definition at line 462 of file IfxAsclin_Lin.h.

Data Fields
IfxAsclin_ReceiveBufferMode | buffMode | RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
IfxAsclin_TxFifoInletWidth | inWidth | TXFIFOCON.INW, transmit FIFO inlet width.
IfxAsclin_RxFifoOutletWidth | outWidth | RXFIFOCON.OTW, receive FIFO oulet width.

◆ IfxAsclin_Lin_FrameControl

struct IfxAsclin_Lin_FrameControl

Structure for Frame Control.

Definition at line 471 of file IfxAsclin_Lin.h.

Data Fields
boolean | collisionDetectionEnable | FRAMECON.CEN, collision detection enable.
IfxAsclin_IdleDelay | idleDelay | FRAMECON.IDLE, idle delay.
IfxAsclin_LeadDelay | leadDelay | FRAMECON.LEAD, lead delay.
boolean | parityEnable | FRAMECON.PEN, parity enable.
IfxAsclin_ParityType | parityType | FRAMECON.ODD, parity type (even or odd)
IfxAsclin_ShiftDirection | shiftDir | FRAMECON.MSB, shift direction.
IfxAsclin_StopBit | stopBit | FRAMECON.STOP, number of stop bits.

◆ IfxAsclin_Lin_FrameDataControl

struct IfxAsclin_Lin_FrameDataControl

Structure for Frame Data and Control flags.

Definition at line 484 of file IfxAsclin_Lin.h.

Collaboration diagram for IfxAsclin_Lin_FrameDataControl:
[legend]
Data Fields
IfxAsclin_Lin_FrameControlFlags | flags | LIN frame control flags.
uint8 | headerID | header ID
uint8 | rxResponseData[8] | Array to store received response data.
uint8 | rxResponseLength | Length of received response.
uint8 | txResponseLength | Length of transmitted response.

◆ IfxAsclin_Lin_InterruptConfig

struct IfxAsclin_Lin_InterruptConfig

Structure for LIN Interrupt Configuration.

Definition at line 495 of file IfxAsclin_Lin.h.

Collaboration diagram for IfxAsclin_Lin_InterruptConfig:
[legend]
Data Fields
IfxAsclin_Lin_EnabledInterrupts | enabledInterrupt | Interrupts which have to be enabled during initialisation as configured by application. Does not reflect current status of FLAGSENABLE register.
uint16 | exPriority | error interrupt priority
uint16 | rxPriority | receive interrupt priority
uint16 | txPriority | transmit interrupt priority
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxAsclin_Lin_LinControl

struct IfxAsclin_Lin_LinControl

Structure for lin Control.

Definition at line 506 of file IfxAsclin_Lin.h.

Data Fields
uint8 | breakLength | LINBTIMER.BREAK, break pulse generation and detection length.
boolean | csEnable | LINCON.CSEN, hardware checksum generation and checking.
IfxAsclin_ChecksumInjection | csi | LINCON.CSI, checksum injection (not written or written) into RxFIFO.
uint8 | headerTimeout | LINHTIMER.HEADER, header timeout threshold value.

◆ IfxAsclin_Lin_Pins

struct IfxAsclin_Lin_Pins

Structure for LIN pin configuration.

Definition at line 516 of file IfxAsclin_Lin.h.

Collaboration diagram for IfxAsclin_Lin_Pins:
[legend]
Data Fields
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxAsclin_Rx_In * | rx | LIN Rx pin.
IfxPort_InputMode | rxMode | rx pin as input
IFX_CONST IfxAsclin_Tx_Out * | tx | LIN Tx pin.
IfxPort_OutputMode | txMode | tx as output

◆ IfxAsclin_Lin

struct IfxAsclin_Lin

Definition at line 529 of file IfxAsclin_Lin.h.

Collaboration diagram for IfxAsclin_Lin:
[legend]
Data Fields
IfxAsclin_Lin_AcknowledgementFlags | acknowledgmentFlags | structure for acknowledgement flags
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
IfxAsclin_Lin_ErrorFlags | errorFlagsStatus | structure for error flags status
boolean | isInterruptMode | Value to indicate if APIs work in Polling mode or Interrupt mode.
IfxAsclin_Lin_FrameDataControl | linFrameData | Structure for Lin Frame Data and Control.
IfxAsclin_LinMode | linMode | LINCON.MS, lin mode of operation (master or slave)
boolean | receiveIdEnable | setting to receive Id in Rx Fifo after sending it

◆ IfxAsclin_Lin_Config

struct IfxAsclin_Lin_Config

Configuration structure of the module.

Definition at line 542 of file IfxAsclin_Lin.h.

Collaboration diagram for IfxAsclin_Lin_Config:
[legend]
Data Fields
IfxAsclin_RxInputSelect | alti | IOCR.ALTI, Rx input (alternate input) pin selection.
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
IfxAsclin_Lin_BaudrateDetection | brd | structure for baudrate detection
IfxAsclin_Lin_BaudrateGeneration | brg | structure for baudrate generation
IfxAsclin_Lin_BitSamplingControl | bsc | structure for bit sampling
IfxAsclin_Lin_BitTimingControl | btc | structure for bit timings
IfxAsclin_ClockSource | clockSource | CSR.CLKSEL, clock source selection.
IfxAsclin_Lin_DataControl | data | structure for data control
IfxAsclin_Lin_FifoControl | fifo | structure for FIFO control
IfxAsclin_Lin_FrameControl | frame | structure for frame control
IfxAsclin_FrameMode | frameMode | FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
IfxAsclin_Lin_InterruptConfig | interrupt | structure for lin interrupt configuration
boolean | isInterruptMode | flag to indicate Interrupt Mode (TRUE) or Polling Mode (FALSE)
IfxAsclin_Lin_LinControl | lin | structure for lin control
IfxAsclin_LinMode | linMode | LINCON.MS, lin mode of operation (master or slave)
IFX_CONST IfxAsclin_Lin_Pins * | pins | structure for LIN pins
boolean | receiveIdEnable | setting to receive Id in Rx Fifo after sending it

◆ IfxAsclin_Lin_PduType

struct IfxAsclin_Lin_PduType

Structure to hold Lin Pdu data.

Definition at line 565 of file IfxAsclin_Lin.h.

Data Fields
IfxAsclin_Checksum | checksumMode | LIN Checksum Mode.
uint8 | dataLength | Length of LIN Response.
uint8 * | dataPtr | Pointer for LIN Response data.
IfxAsclin_Lin_Direction | direction | Direction Control (Tx Header only, Tx both Header and Response, Tx Header and Rx Response)
uint8 | pid | PID of LIN Header.


iLLD_TC26B: Elementary Transactions

Functions
Elementary Transactions
iLLD » ASCLIN » LIN
Collaboration diagram for Elementary Transactions:

Functions

IFX_INLINE void | IfxAsclin_Lin_prepareHeaderReception (IfxAsclin_Lin *asclin)
Prepares the module to receive the header. More...
IFX_INLINE void | IfxAsclin_Lin_prepareResponseReception (IfxAsclin_Lin *asclin, uint32 length)
Prepares the module to Receive the response. More...
IFX_INLINE void | IfxAsclin_Lin_readHeader (IfxAsclin_Lin *asclin, uint8 *id)
Reads the header. More...
IFX_INLINE void | IfxAsclin_Lin_readResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Reads the response. More...
IFX_EXTERN void | IfxAsclin_Lin_ignoreHeader (IfxAsclin_Lin *asclin)
Ignores the latest header. More...
IFX_EXTERN void | IfxAsclin_Lin_receiveHeader (IfxAsclin_Lin *asclin, uint8 *id)
Receives the header. More...
IFX_EXTERN void | IfxAsclin_Lin_receiveResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Receives the response. More...
IFX_EXTERN void | IfxAsclin_Lin_sendHeader (IfxAsclin_Lin *asclin, uint8 *id)
Sends the header. More...
IFX_EXTERN void | IfxAsclin_Lin_sendResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
sends the response More...

Detailed Description

Function Documentation

◆ IfxAsclin_Lin_ignoreHeader()

IFX_EXTERN void IfxAsclin_Lin_ignoreHeader ( IfxAsclin_Lin * asclin )

Ignores the latest header.

Parameters
asclin module handle
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 257 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_prepareHeaderReception()

IFX_INLINE void IfxAsclin_Lin_prepareHeaderReception ( IfxAsclin_Lin * asclin )

Prepares the module to receive the header.

Parameters
asclin module handle
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 822 of file IfxAsclin_Lin.h.

Referenced by IfxAsclin_Lin_receiveHeader().

◆ IfxAsclin_Lin_prepareResponseReception()

IFX_INLINE void IfxAsclin_Lin_prepareResponseReception | ( | IfxAsclin_Lin * | asclin,
 |  | uint32 | length
 | ) |  |

Prepares the module to Receive the response.

Parameters
asclin | module handle
length | count of data (in bytes).
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 832 of file IfxAsclin_Lin.h.

Referenced by IfxAsclin_Lin_receiveResponse().

◆ IfxAsclin_Lin_readHeader()

IFX_INLINE void IfxAsclin_Lin_readHeader | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | id
 | ) |  |

Reads the header.

Parameters
asclin | module handle
id | the id byte which should be received
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 843 of file IfxAsclin_Lin.h.

Referenced by IfxAsclin_Lin_isrReceive(), and IfxAsclin_Lin_receiveHeader().

◆ IfxAsclin_Lin_readResponse()

IFX_INLINE void IfxAsclin_Lin_readResponse | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | data,
 |  | uint32 | length
 | ) |  |

Reads the response.

Parameters
asclin | module handle
data | Pointer to the start of data which should be received
length | count of data (in bytes).
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 850 of file IfxAsclin_Lin.h.

Referenced by IfxAsclin_Lin_isrReceive(), and IfxAsclin_Lin_receiveResponse().

◆ IfxAsclin_Lin_receiveHeader()

IFX_EXTERN void IfxAsclin_Lin_receiveHeader | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | id
 | ) |  |

Receives the header.

Parameters
asclin | module handle
id | the id byte which should be received
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 516 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_receiveResponse()

IFX_EXTERN void IfxAsclin_Lin_receiveResponse | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | data,
 |  | uint32 | length
 | ) |  |

Receives the response.

Parameters
asclin | module handle
data | Pointer to the start of data which should be received
length | count of data (in bytes).
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 533 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_sendHeader()

IFX_EXTERN void IfxAsclin_Lin_sendHeader | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | id
 | ) |  |

Sends the header.

Parameters
asclin | module handle
id | the id byte which should be sent
Returns
None

A coding example of send header in polling mode can be found in How to use the ASCLIN LIN Interface driver?. For interrupt mode, this fuction is internally used by IfxAsclin_Lin_sendFrame API and the the polling part is bypassed.

Definition at line 550 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_sendFrame().

◆ IfxAsclin_Lin_sendResponse()

IFX_EXTERN void IfxAsclin_Lin_sendResponse | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | data,
 |  | uint32 | length
 | ) |  |

sends the response

Parameters
asclin | module handle
data | Pointer to the start of data which should be sent
length | count of data (in bytes).
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 589 of file IfxAsclin_Lin.c.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » ASCLIN » LIN
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxAsclin_Lin_disableModule (IfxAsclin_Lin *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Lin_initModule (IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Lin_initModuleConfig (IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxAsclin_Lin_sendFrame (IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Response 3.Send Header and Receive Response. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Lin_disableModule()

IFX_EXTERN void IfxAsclin_Lin_disableModule ( IfxAsclin_Lin * asclin )

Disables the module.

Parameters
asclin module handle
Returns
None

Definition at line 247 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_initModule()

IFX_EXTERN IfxAsclin_Status IfxAsclin_Lin_initModule | ( | IfxAsclin_Lin * | asclin,
 |  | const IfxAsclin_Lin_Config * | config
 | ) |  |

Initialises the module.

Parameters
asclin | module handle
config | predefined configuration structure of the module
Returns
Status

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 266 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_initModuleConfig()

IFX_EXTERN void IfxAsclin_Lin_initModuleConfig | ( | IfxAsclin_Lin_Config * | config,
 |  | Ifx_ASCLIN * | asclin
 | ) |  |

Fills the config structure with default values.

Parameters
config | predefined configuration structure of the module
asclin | pointer to ASCLIN registers
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 439 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_sendFrame()

IFX_EXTERN void IfxAsclin_Lin_sendFrame | ( | IfxAsclin_Lin * | asclin,
 |  | IfxAsclin_Lin_PduType * | pduptr
 | ) |  |

This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Response 3.Send Header and Receive Response.

Parameters
asclin | asclin module handle
pduptr | lin pdu configuration
Returns
None

A coding example of sendFrame in interrupt mode can be found in How to use the ASCLIN LIN Interface driver?.

Definition at line 874 of file IfxAsclin_Lin.c.


iLLD_TC26B: Error Handling Functions

Functions
Error Handling Functions
iLLD » ASCLIN » LIN
Collaboration diagram for Error Handling Functions:

Functions

IFX_EXTERN void | IfxAsclin_Lin_checkForReceivedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received header More...
IFX_EXTERN void | IfxAsclin_Lin_checkForReceivedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received response More...
IFX_EXTERN void | IfxAsclin_Lin_checkForTransmittedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted header More...
IFX_EXTERN void | IfxAsclin_Lin_checkForTransmittedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted response More...
IFX_EXTERN void | IfxAsclin_Lin_clearFlagsStatus (IfxAsclin_Lin *asclin)
clears the flags status structures More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForReceivedHeader (IfxAsclin_Lin *asclin)
waits until receive header end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForReceivedResponse (IfxAsclin_Lin *asclin)
waits until receive response end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForTransmittedHeader (IfxAsclin_Lin *asclin)
waits until transmit header end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForTransmittedResponse (IfxAsclin_Lin *asclin)
waits until transmit response end acknowledgemnet or an error has been detected More...

Detailed Description

Function Documentation

◆ IfxAsclin_Lin_checkForReceivedHeaderFlags()

IFX_EXTERN void IfxAsclin_Lin_checkForReceivedHeaderFlags ( IfxAsclin_Lin * asclin )

checks for acknowledgement and error flags for received header

Parameters
asclin module handle
Returns
None

Definition at line 54 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_waitForReceivedHeader().

◆ IfxAsclin_Lin_checkForReceivedResponseFlags()

IFX_EXTERN void IfxAsclin_Lin_checkForReceivedResponseFlags ( IfxAsclin_Lin * asclin )

checks for acknowledgement and error flags for received response

Parameters
asclin module handle
Returns
None

Definition at line 98 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_waitForReceivedResponse().

◆ IfxAsclin_Lin_checkForTransmittedHeaderFlags()

IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedHeaderFlags ( IfxAsclin_Lin * asclin )

checks for acknowledgement and error flags for transmitted header

Parameters
asclin module handle
Returns
None

Definition at line 148 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_waitForTransmittedHeader().

◆ IfxAsclin_Lin_checkForTransmittedResponseFlags()

IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedResponseFlags ( IfxAsclin_Lin * asclin )

checks for acknowledgement and error flags for transmitted response

Parameters
asclin module handle
Returns
None

Definition at line 186 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_waitForTransmittedResponse().

◆ IfxAsclin_Lin_clearFlagsStatus()

IFX_EXTERN void IfxAsclin_Lin_clearFlagsStatus ( IfxAsclin_Lin * asclin )

clears the flags status structures

Parameters
asclin module handle
Returns
None

Definition at line 224 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_waitForReceivedHeader(), IfxAsclin_Lin_waitForReceivedResponse(), IfxAsclin_Lin_waitForTransmittedHeader(), and IfxAsclin_Lin_waitForTransmittedResponse().

◆ IfxAsclin_Lin_waitForReceivedHeader()

IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedHeader ( IfxAsclin_Lin * asclin )

waits until receive header end acknowledgemnet or an error has been detected

Parameters
asclin module handle
Returns
Result, TRUE: if error, FALSE: is no error

Definition at line 609 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_receiveHeader().

◆ IfxAsclin_Lin_waitForReceivedResponse()

IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedResponse ( IfxAsclin_Lin * asclin )

waits until receive response end acknowledgemnet or an error has been detected

Parameters
asclin module handle
Returns
Result, TRUE: if error, FALSE: is no error

Definition at line 634 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_receiveResponse().

◆ IfxAsclin_Lin_waitForTransmittedHeader()

IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedHeader ( IfxAsclin_Lin * asclin )

waits until transmit header end acknowledgemnet or an error has been detected

Parameters
asclin module handle
Returns
Result, TRUE: if error, FALSE: is no error

Definition at line 660 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_sendHeader().

◆ IfxAsclin_Lin_waitForTransmittedResponse()

IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedResponse ( IfxAsclin_Lin * asclin )

waits until transmit response end acknowledgemnet or an error has been detected

Parameters
asclin module handle
Returns
Result, TRUE: if error, FALSE: is no error

Definition at line 684 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_sendResponse().


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » ASCLIN » LIN
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN void | IfxAsclin_Lin_isrError (IfxAsclin_Lin *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Lin_isrReceive (IfxAsclin_Lin *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Lin_isrTransmit (IfxAsclin_Lin *asclin)
ISR transmit routine. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Lin_isrError()

IFX_EXTERN void IfxAsclin_Lin_isrError ( IfxAsclin_Lin * asclin )

ISR error routine.

Parameters
asclin module handle
Returns
None

Definition at line 708 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_isrReceive()

IFX_EXTERN void IfxAsclin_Lin_isrReceive ( IfxAsclin_Lin * asclin )

ISR receive routine.

Parameters
asclin module handle
Returns
None

Definition at line 830 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_isrTransmit()

IFX_EXTERN void IfxAsclin_Lin_isrTransmit ( IfxAsclin_Lin * asclin )

ISR transmit routine.

Parameters
asclin module handle
Returns
None

Definition at line 853 of file IfxAsclin_Lin.c.


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » ASCLIN » LIN
Collaboration diagram for Enumerations:

Enumerations

enum IfxAsclin_Lin_Direction {
IfxAsclin_Lin_Direction_TransmitHeader = 0,
IfxAsclin_Lin_Direction_TransmitHeaderAndResponse = 1,
IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse = 2
}
Defines the type of Lin Master Frame. (Transmit Header only) or (Transmit Header and Response) or (Transmit Header and Receive Response). More...

Detailed Description

Enumeration Type Documentation

◆ IfxAsclin_Lin_Direction

enum IfxAsclin_Lin_Direction

Defines the type of Lin Master Frame. (Transmit Header only) or (Transmit Header and Response) or (Transmit Header and Receive Response).

Enumerator
IfxAsclin_Lin_Direction_TransmitHeader | Transmit Header.
IfxAsclin_Lin_Direction_TransmitHeaderAndResponse | Transmit both Header and Response.
IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse | Transmit Header and Receive Response.

Definition at line 329 of file IfxAsclin_Lin.h.


iLLD_TC26B: How to use the ASCLIN SPI Interface driver?

How to use the ASCLIN SPI Interface driver?
iLLD » ASCLIN
Collaboration diagram for How to use the ASCLIN SPI Interface driver?:

The SPI interface driver provides a default ASCLIN configuration for synchronous serial communication in 8 and 16 bit mode, and a set of data transfer routines.

Data transfers are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the ASCLIN peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.

The SPI interface driver works only as Master

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Asclin/Spi/IfxAsclin_Spi.h>

Variables

Declare the Spi handle as global variable in your C code:

// used globally
static IfxAsclin_Spi spi;

In addition, declare global transmit and receive buffers for the data transfers:

#define SPI_BUFFER_SIZE 8
uint8 spiTxBuffer[SPI_BUFFER_SIZE];
uint8 spiRxBuffer[SPI_BUFFER_SIZE];

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_ASCLIN1_TX 1
#define IFX_INTPRIO_ASCLIN1_RX 2
#define IFX_INTPRIO_ASCLIN1_ER 3

Add the interrupt service routines to your C code. They have to call the SPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(asclin1TxISR, 0, IFX_INTPRIO_ASCLIN1_TX)
{
IfxAsclin_Spi_isrTransmit(&spi);
}
IFX_INTERRUPT(asclin1RxISR, 0, IFX_INTPRIO_ASCLIN1_RX)
{
IfxAsclin_Spi_isrReceive(&spi);
}
IFX_INTERRUPT(asclin1ErISR, 0, IFX_INTPRIO_ASCLIN1_ER)
{
IfxAsclin_Spi_isrError(&spi);
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&asclin1TxISR, IFX_INTPRIO_ASCLIN1_TX);
IfxCpu_Irq_installInterruptHandler(&asclin1RxISR, IFX_INTPRIO_ASCLIN1_RX);
IfxCpu_Irq_installInterruptHandler(&asclin1ErISR, IFX_INTPRIO_ASCLIN1_ER);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create module config
IfxAsclin_Spi_Config spiConfig;
IfxAsclin_Spi_initModuleConfig(&spiConfig, &MODULE_ASCLIN1);
// set the desired baudrate
spiConfig.baudrate.prescaler = 1;
spiConfig.baudrate.baudrate = 1000000; // FDR values will be calculated in initModule
// ISR priorities and interrupt target
spiConfig.interrupt.txPriority = IFX_INTPRIO_ASCLIN1_TX; // see also \ref IfxLld_Asclin
spiConfig.interrupt.rxPriority = IFX_INTPRIO_ASCLIN1_RX; // see also \ref IfxLld_Asclin
spiConfig.interrupt.erPriority = IFX_INTPRIO_ASCLIN1_ER; // see also \ref IfxLld_Asclin
spiConfig.interrupt.typeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
// pin configuration
const IfxAsclin_Spi_Pins pins = {
&IfxAsclin1_SCLK_P15_0_OUT, IfxPort_OutputMode_pushPull, // Clock out pin
&IfxAsclin1_RXA_P15_1_IN, IfxPort_InputMode_pullUp, // Rx pin
&IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
&IfxAsclin1_SLSO_P20_8_OUT, IfxPort_OutputMode_pushPull, // Slave select pin
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
spiConfig.pins = &pins;
// initialize module
//IfxAsclin_Spi spi; // defined globally
IfxAsclin_Spi_initModule(&spi, &spiConfig);

The SPI is ready for use now!

Data Transfers

In following examples we assume, that following buffers are declared globally:

// load the data buffers
int i;
for (i = 0; i < SPI_BUFFER_SIZE; i++)
{
spiTxBuffer[i] = i + 1;
spiRxBuffer[i] = 0;
}

Sending and Receiving a data stream:

// wait until transfer of previous data stream is finished
while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
// send/receive new stream
IfxAsclin_Spi_exchange(&spi, spiTxBuffer, spiRxBuffer, 8);

Send only, discard received data:

// wait until transfer of previous data stream is finished
while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
// send new stream
IfxAsclin_Spi_exchange(&spi, spiTxBuffer, NULL_PTR, 8);

Receive only, send all 1's

// wait until transfer of previous data stream is finished
while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
// receive new stream
IfxAsclin_Spi_exchange(&spi, NULL_PTR, spiRxBuffer, 8);


iLLD_TC26B: SPI

Modules
SPI
iLLD » ASCLIN
Collaboration diagram for SPI:

Modules

Data Structures
Module Functions
Interrupt Functions
Communication Functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » ASCLIN » SPI
Collaboration diagram for Data Structures:

Data Structures

struct | IfxAsclin_Spi_Baudrate
Structure for Baudrate Generation. More...
struct | IfxAsclin_Spi_BitSamplingControl
Structure for Bit Sampling. More...
struct | IfxAsclin_Spi_ErrorFlags
Structure for Error Flags. More...
struct | IfxAsclin_Spi_FifoControl
Structure for FIFO Control. More...
struct | IfxAsclin_Spi_FrameControl
Structure for Frame Control. More...
struct | IfxAsclin_Spi_InputOutputControl
Structure for input output control. More...
struct | IfxAsclin_Spi_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxAsclin_Spi_Job
Structure for data transfer jobs. More...
struct | IfxAsclin_Spi_Pins
Structure for SPI pin configuration. More...
struct | IfxAsclin_Spi
Module handle. More...
struct | IfxAsclin_Spi_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxAsclin_Spi_Baudrate

struct IfxAsclin_Spi_Baudrate

Structure for Baudrate Generation.

Definition at line 246 of file IfxAsclin_Spi.h.

Data Fields
float32 | baudrate | value of the required baudrate
IfxAsclin_OversamplingFactor | oversampling | BITCON.OVERSAMPLING, postdivider, used for oversampling.
uint16 | prescaler | BITCON.PRESCALER, predivider to generate the baud rate.

◆ IfxAsclin_Spi_BitSamplingControl

struct IfxAsclin_Spi_BitSamplingControl

Structure for Bit Sampling.

Definition at line 255 of file IfxAsclin_Spi.h.

Data Fields
IfxAsclin_SamplesPerBit medianFilter BITCON.SM, no. of samples per bit 1 or 3.

◆ IfxAsclin_Spi_ErrorFlags

struct IfxAsclin_Spi_ErrorFlags

Structure for Error Flags.

Definition at line 262 of file IfxAsclin_Spi.h.

Data Fields
uint8 | frameError: 1 | frame error
uint8 | rxFifoOverflow: 1 | receive FIFO overflow error
uint8 | rxFifoUnderflow: 1 | receive FIFO underflow error
uint8 | txFifoOverflow: 1 | transmit FIFO overflow error

◆ IfxAsclin_Spi_FifoControl

struct IfxAsclin_Spi_FifoControl

Structure for FIFO Control.

Definition at line 272 of file IfxAsclin_Spi.h.

Data Fields
IfxAsclin_ReceiveBufferMode | buffMode | RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
IfxAsclin_TxFifoInletWidth | inWidth | TXFIFOCON.INW, transmit FIFO inlet width.
IfxAsclin_RxFifoOutletWidth | outWidth | RXFIFOCON.OTW, receive FIFO oulet width.
IfxAsclin_RxFifoInterruptLevel | rxFifoInterruptLevel | RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
IfxAsclin_TxFifoInterruptLevel | txFifoInterruptLevel | TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.

◆ IfxAsclin_Spi_FrameControl

struct IfxAsclin_Spi_FrameControl

Structure for Frame Control.

Definition at line 283 of file IfxAsclin_Spi.h.

Data Fields
IfxAsclin_IdleDelay | idleDelay | FRAMECON.IDLE, idle delay.
IfxAsclin_LeadDelay | leadDelay | FRAMECON.LEAD, lead delay.
IfxAsclin_ShiftDirection | shiftDir | FRAMECON.MSB, shift direction.
IfxAsclin_StopBit | stopBit | FRAMECON.STOP, number of stop bits.

◆ IfxAsclin_Spi_InputOutputControl

struct IfxAsclin_Spi_InputOutputControl

Structure for input output control.

Definition at line 293 of file IfxAsclin_Spi.h.

Data Fields
IfxAsclin_RxInputSelect | alti | IOCR.ALTI, Rx input (alternate input) pin selection.
IfxAsclin_ClockPolarity | cpol | IOCR.CPOL clock polarity selection.
boolean | loopBack | IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
IfxAsclin_SlavePolarity | spol | IOCR.SPOL slave polarity selection.

◆ IfxAsclin_Spi_InterruptConfig

struct IfxAsclin_Spi_InterruptConfig

Structure for interrupt configuration.

Definition at line 303 of file IfxAsclin_Spi.h.

Data Fields
uint16 | erPriority | error interrupt priority
uint16 | rxPriority | receive interrupt priority
uint16 | txPriority | transmit interrupt priority
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxAsclin_Spi_Job

struct IfxAsclin_Spi_Job

Structure for data transfer jobs.

Definition at line 313 of file IfxAsclin_Spi.h.

Data Fields
void * | data | pointer to user data
uint32 | pending | job remaining (count of the data)

◆ IfxAsclin_Spi_Pins

struct IfxAsclin_Spi_Pins

Structure for SPI pin configuration.

Definition at line 321 of file IfxAsclin_Spi.h.

Collaboration diagram for IfxAsclin_Spi_Pins:
[legend]
Data Fields
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxAsclin_Rx_In * | rx | SPI Rx pin.
IfxPort_InputMode | rxMode | rx pin as input
IFX_CONST IfxAsclin_Sclk_Out * | sclk | SPI clock select pin.
IfxPort_OutputMode | sclkMode | sclk as output
IFX_CONST IfxAsclin_Slso_Out * | slso | SPI slave select pin.
IfxPort_OutputMode | slsoMode | slso as output
IFX_CONST IfxAsclin_Tx_Out * | tx | SPI Tx pin.
IfxPort_OutputMode | txMode | tx as output

◆ IfxAsclin_Spi

struct IfxAsclin_Spi

Module handle.

Definition at line 340 of file IfxAsclin_Spi.h.

Collaboration diagram for IfxAsclin_Spi:
[legend]
Data Fields
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
uint8 | dataWidth | width of the data in bytes
IfxAsclin_Spi_ErrorFlags | errorFlags | structure for error flags status
IfxAsclin_Spi_Job | rxJob | structure for Rx job
uint32 | sending | sending in progress status
boolean | transferInProgress | status of the transfer In progress
IfxAsclin_Spi_Job | txJob | structure for Tx job

◆ IfxAsclin_Spi_Config

struct IfxAsclin_Spi_Config

Configuration structure of the module.

Definition at line 353 of file IfxAsclin_Spi.h.

Collaboration diagram for IfxAsclin_Spi_Config:
[legend]
Data Fields
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
IfxAsclin_Spi_Baudrate | baudrate | structure for baudrate
IfxAsclin_Spi_BitSamplingControl | bitSampling | structure for bit sampling
IfxAsclin_ClockSource | clockSource | CSR.CLKSEL, clock source selection.
IfxAsclin_DataLength | dataLength | DATCON.DATALENGTH, data length, number of bits per transfer.
IfxAsclin_Spi_FifoControl | fifo | structure for FIFO control
IfxAsclin_Spi_FrameControl | frame | structure for frame control
IfxAsclin_FrameMode | frameMode | FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
IfxAsclin_Spi_InputOutputControl | inputOutput | structure for input output control
IfxAsclin_Spi_InterruptConfig | interrupt | structure for interrupt configuration
IFX_CONST IfxAsclin_Spi_Pins * | pins | structure for SPI pins


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » ASCLIN » SPI
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxAsclin_Spi_disableModule (IfxAsclin_Spi *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Spi_initModule (IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Spi_initModuleConfig (IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
Fills the configuration structure with default values. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Spi_disableModule()

IFX_EXTERN void IfxAsclin_Spi_disableModule ( IfxAsclin_Spi * asclin )

Disables the module.

Parameters
asclin module handle
Returns
None

Definition at line 70 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_initModule()

IFX_EXTERN IfxAsclin_Status IfxAsclin_Spi_initModule | ( | IfxAsclin_Spi * | asclin,
 |  | const IfxAsclin_Spi_Config * | config
 | ) |  |

Initialises the module.

Parameters
asclin | module handle
config | predefined configuration structure of the module
Returns
Status

A coding example can be found in How to use the ASCLIN SPI Interface driver?

Definition at line 112 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_initModuleConfig()

IFX_EXTERN void IfxAsclin_Spi_initModuleConfig | ( | IfxAsclin_Spi_Config * | config,
 |  | Ifx_ASCLIN * | asclin
 | ) |  |

Fills the configuration structure with default values.

Parameters
config | predefined configuration structure of the module
asclin | pointer to ASCLIN registers
Returns
None

A coding example can be found in How to use the ASCLIN SPI Interface driver?

Definition at line 257 of file IfxAsclin_Spi.c.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » ASCLIN » SPI
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN void | IfxAsclin_Spi_isrError (IfxAsclin_Spi *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Spi_isrReceive (IfxAsclin_Spi *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Spi_isrTransmit (IfxAsclin_Spi *asclin)
ISR transmit routine. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Spi_isrError()

IFX_EXTERN void IfxAsclin_Spi_isrError ( IfxAsclin_Spi * asclin )

ISR error routine.

Currently it only stores error flags in the handle (asclin->errorFlags) whenever an error happens. The user software could react on these flags, e.g. re-initialising the module.

Parameters
asclin module handle
Returns
None

Definition at line 323 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_isrReceive()

IFX_EXTERN void IfxAsclin_Spi_isrReceive ( IfxAsclin_Spi * asclin )

ISR receive routine.

Parameters
asclin module handle
Returns
None

Definition at line 354 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_isrTransmit()

IFX_EXTERN void IfxAsclin_Spi_isrTransmit ( IfxAsclin_Spi * asclin )

ISR transmit routine.

Parameters
asclin module handle
Returns
None

Definition at line 362 of file IfxAsclin_Spi.c.


iLLD_TC26B: Communication Functions

Functions
Communication Functions
iLLD » ASCLIN » SPI
Collaboration diagram for Communication Functions:

Functions

IFX_EXTERN IfxAsclin_Spi_Status | IfxAsclin_Spi_exchange (IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
starts the data exchange More...
IFX_EXTERN void | IfxAsclin_Spi_read (IfxAsclin_Spi *asclin)
Reads data from the Rx FIFO based on the outlet width. More...
IFX_EXTERN void | IfxAsclin_Spi_write (IfxAsclin_Spi *asclin)
Writes data into the Tx FIFO based on the inlet width. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Spi_exchange()

IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_exchange | ( | IfxAsclin_Spi * | asclin,
 |  | void * | src,
 |  | void * | dest,
 |  | uint32 | count
 | ) |  |

starts the data exchange

Parameters
asclin | module handle
src | pointer to transmit data buffer
dest | pointer to receive data buffer
count | count of the data
Returns
status

A coding example can be found in How to use the ASCLIN SPI Interface driver?

Definition at line 80 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_read()

IFX_EXTERN void IfxAsclin_Spi_read ( IfxAsclin_Spi * asclin )

Reads data from the Rx FIFO based on the outlet width.

Parameters
asclin module handle
Returns
None

Definition at line 377 of file IfxAsclin_Spi.c.

Referenced by IfxAsclin_Spi_isrReceive().

◆ IfxAsclin_Spi_write()

IFX_EXTERN void IfxAsclin_Spi_write ( IfxAsclin_Spi * asclin )

Writes data into the Tx FIFO based on the inlet width.

Parameters
asclin module handle
Returns
None

Definition at line 428 of file IfxAsclin_Spi.c.

Referenced by IfxAsclin_Spi_exchange(), and IfxAsclin_Spi_isrTransmit().


iLLD_TC26B: IfxAsclin_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxAsclin_cfg.h File Reference
iLLD » ASCLIN

ASCLIN on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxAsclin_reg.h"
Include dependency graph for IfxAsclin_cfg.h:

Go to the source code of this file.

Macros

#define IFXASCLIN_NUM_MODULES (4)

Enumerations

enum IfxAsclin_Index {
IfxAsclin_Index_none = -1,
IfxAsclin_Index_0 = 0,
IfxAsclin_Index_1,
IfxAsclin_Index_2,
IfxAsclin_Index_3
}
List of the available Asclin resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap [IFXASCLIN_NUM_MODULES]

Detailed Description

ASCLIN on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_cfg.h.

Macro Definition Documentation

◆ IFXASCLIN_NUM_MODULES

#define IFXASCLIN_NUM_MODULES (4)

Definition at line 67 of file IfxAsclin_cfg.h.

Referenced by IfxAsclin_getAddress(), and IfxAsclin_getIndex().

Variable Documentation

◆ IfxAsclin_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES]

Definition at line 91 of file IfxAsclin_cfg.h.


iLLD_TC26B: IfxAsclin_PinMap.c File Reference

  • _PinMap
Variables
IfxAsclin_PinMap.c File Reference
iLLD » ASCLIN

ASCLIN I/O map. More...

#include "IfxAsclin_PinMap.h"
Include dependency graph for IfxAsclin_PinMap.c:

Go to the source code of this file.

Variables

IfxAsclin_Cts_In | IfxAsclin0_CTSA_P14_9_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 9}, Ifx_RxSel_a}
IfxAsclin_Cts_In | IfxAsclin1_CTSA_P20_7_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 7}, Ifx_RxSel_a}
IfxAsclin_Cts_In | IfxAsclin1_CTSB_P32_4_IN = {&MODULE_ASCLIN1, {&MODULE_P32, 4}, Ifx_RxSel_b}
IfxAsclin_Cts_In | IfxAsclin2_CTSA_P10_7_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 7}, Ifx_RxSel_a}
IfxAsclin_Cts_In | IfxAsclin2_CTSB_P33_5_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 5}, Ifx_RxSel_b}
IfxAsclin_Cts_In | IfxAsclin3_CTSA_P00_12_IN = {&MODULE_ASCLIN3, {&MODULE_P00,12}, Ifx_RxSel_a}
IfxAsclin_Rts_Out | IfxAsclin0_RTS_P14_7_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt2}
IfxAsclin_Rts_Out | IfxAsclin1_RTS_P20_6_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt2}
IfxAsclin_Rts_Out | IfxAsclin1_RTS_P23_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Rts_Out | IfxAsclin2_RTS_P10_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt2}
IfxAsclin_Rts_Out | IfxAsclin2_RTS_P33_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt2}
IfxAsclin_Rts_Out | IfxAsclin3_RTS_P00_9_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt3}
IfxAsclin_Rx_In | IfxAsclin0_RXA_P14_1_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin0_RXB_P15_3_IN = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin1_RXA_P15_1_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin1_RXB_P15_5_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin1_RXC_P20_9_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 9}, Ifx_RxSel_c}
IfxAsclin_Rx_In | IfxAsclin1_RXD_P14_8_IN = {&MODULE_ASCLIN1, {&MODULE_P14, 8}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin1_RXE_P11_10_IN = {&MODULE_ASCLIN1, {&MODULE_P11,10}, Ifx_RxSel_e}
IfxAsclin_Rx_In | IfxAsclin1_RXF_P33_13_IN = {&MODULE_ASCLIN1, {&MODULE_P33,13}, Ifx_RxSel_f}
IfxAsclin_Rx_In | IfxAsclin1_RXG_P02_3_IN = {&MODULE_ASCLIN1, {&MODULE_P02, 3}, Ifx_RxSel_g}
IfxAsclin_Rx_In | IfxAsclin2_RXA_P14_3_IN = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin2_RXB_P02_1_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 1}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin2_RXD_P10_6_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin2_RXE_P33_8_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, Ifx_RxSel_e}
IfxAsclin_Rx_In | IfxAsclin2_RXG_P02_0_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, Ifx_RxSel_g}
IfxAsclin_Rx_In | IfxAsclin3_RXA_P15_7_IN = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin3_RXC_P20_3_IN = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, Ifx_RxSel_c}
IfxAsclin_Rx_In | IfxAsclin3_RXD_P32_2_IN = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin3_RXE_P00_1_IN = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, Ifx_RxSel_e}
IfxAsclin_Rx_In | IfxAsclin3_RXF_P21_6_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, Ifx_RxSel_f}
IfxAsclin_Sclk_Out | IfxAsclin0_SCLK_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin0_SCLK_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin1_SCLK_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin1_SCLK_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin1_SCLK_P33_11_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,11}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin1_SCLK_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt4}
IfxAsclin_Sclk_Out | IfxAsclin2_SCLK_P02_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin2_SCLK_P10_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin2_SCLK_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin2_SCLK_P33_7_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin2_SCLK_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt4}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P00_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P15_8_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt3}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P21_5_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt3}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt4}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P33_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin1_SLSO_P14_3_OUT = {&MODULE_ASCLIN1, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt4}
IfxAsclin_Slso_Out | IfxAsclin1_SLSO_P20_8_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin1_SLSO_P33_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,10}, IfxPort_OutputIdx_alt4}
IfxAsclin_Slso_Out | IfxAsclin2_SLSO_P02_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin2_SLSO_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt6}
IfxAsclin_Slso_Out | IfxAsclin2_SLSO_P33_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin3_SLSO_P00_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin3_SLSO_P14_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt5}
IfxAsclin_Slso_Out | IfxAsclin3_SLSO_P21_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin3_SLSO_P21_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin3_SLSO_P33_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin0_TX_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin0_TX_P14_1_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin0_TX_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin0_TX_P15_3_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P02_2_OUT = {&MODULE_ASCLIN1, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P11_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P11,12}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P14_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P14,10}, IfxPort_OutputIdx_alt4}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P15_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P15_4_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P15_5_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P33_13_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,13}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P02_0_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P14_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P33_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt3}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P00_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P15_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P20_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P32_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt2}
const IfxAsclin_Cts_In * | IfxAsclin_Cts_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]
const IfxAsclin_Rts_Out * | IfxAsclin_Rts_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]
const IfxAsclin_Rx_In * | IfxAsclin_Rx_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]
const IfxAsclin_Sclk_Out * | IfxAsclin_Sclk_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]
const IfxAsclin_Slso_Out * | IfxAsclin_Slso_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]
const IfxAsclin_Tx_Out * | IfxAsclin_Tx_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]

Detailed Description

ASCLIN I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_PinMap.c.

Variable Documentation

◆ IfxAsclin0_CTSA_P14_9_IN

IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 9}, Ifx_RxSel_a}

Definition at line 45 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_RTS_P14_7_OUT

IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt2}

Definition at line 51 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_RXA_P14_1_IN

IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, Ifx_RxSel_a}

Definition at line 57 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_RXB_P15_3_IN

IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, Ifx_RxSel_b}

Definition at line 58 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_SCLK_P14_0_OUT

IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt6}

Definition at line 76 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_SCLK_P15_2_OUT

IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt6}

Definition at line 77 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_TX_P14_0_OUT

IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt2}

Definition at line 107 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_TX_P14_1_OUT

IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt2}

Definition at line 108 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_TX_P15_2_OUT

IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt2}

Definition at line 109 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_TX_P15_3_OUT

IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt2}

Definition at line 110 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_CTSA_P20_7_IN

IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 7}, Ifx_RxSel_a}

Definition at line 46 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_CTSB_P32_4_IN

IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN = {&MODULE_ASCLIN1, {&MODULE_P32, 4}, Ifx_RxSel_b}

Definition at line 47 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RTS_P20_6_OUT

IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt2}

Definition at line 52 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RTS_P23_1_OUT

IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt2}

Definition at line 53 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXA_P15_1_IN

IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, Ifx_RxSel_a}

Definition at line 59 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXB_P15_5_IN

IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, Ifx_RxSel_b}

Definition at line 60 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXC_P20_9_IN

IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 9}, Ifx_RxSel_c}

Definition at line 61 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXD_P14_8_IN

IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN = {&MODULE_ASCLIN1, {&MODULE_P14, 8}, Ifx_RxSel_d}

Definition at line 62 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXE_P11_10_IN

IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN = {&MODULE_ASCLIN1, {&MODULE_P11,10}, Ifx_RxSel_e}

Definition at line 63 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXF_P33_13_IN

IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN = {&MODULE_ASCLIN1, {&MODULE_P33,13}, Ifx_RxSel_f}

Definition at line 64 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXG_P02_3_IN

IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN = {&MODULE_ASCLIN1, {&MODULE_P02, 3}, Ifx_RxSel_g}

Definition at line 65 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SCLK_P15_0_OUT

IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt6}

Definition at line 78 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SCLK_P20_10_OUT

IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt6}

Definition at line 79 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SCLK_P33_11_OUT

IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,11}, IfxPort_OutputIdx_alt2}

Definition at line 80 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SCLK_P33_12_OUT

IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt4}

Definition at line 81 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SLSO_P14_3_OUT

IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT = {&MODULE_ASCLIN1, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt4}

Definition at line 96 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SLSO_P20_8_OUT

IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt2}

Definition at line 97 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SLSO_P33_10_OUT

IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,10}, IfxPort_OutputIdx_alt4}

Definition at line 98 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P02_2_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT = {&MODULE_ASCLIN1, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt2}

Definition at line 111 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P11_12_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P11,12}, IfxPort_OutputIdx_alt2}

Definition at line 112 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P14_10_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P14,10}, IfxPort_OutputIdx_alt4}

Definition at line 113 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P15_0_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt2}

Definition at line 114 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P15_1_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt2}

Definition at line 115 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P15_4_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt2}

Definition at line 116 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P15_5_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt2}

Definition at line 117 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P20_10_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt2}

Definition at line 118 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P33_12_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt2}

Definition at line 119 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P33_13_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,13}, IfxPort_OutputIdx_alt2}

Definition at line 120 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_CTSA_P10_7_IN

IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 7}, Ifx_RxSel_a}

Definition at line 48 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_CTSB_P33_5_IN

IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 5}, Ifx_RxSel_b}

Definition at line 49 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RTS_P10_8_OUT

IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt2}

Definition at line 54 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RTS_P33_4_OUT

IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt2}

Definition at line 55 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RXA_P14_3_IN

IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, Ifx_RxSel_a}

Definition at line 66 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RXB_P02_1_IN

IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 1}, Ifx_RxSel_b}

Definition at line 67 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RXD_P10_6_IN

IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, Ifx_RxSel_d}

Definition at line 68 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RXE_P33_8_IN

IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, Ifx_RxSel_e}

Definition at line 69 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RXG_P02_0_IN

IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, Ifx_RxSel_g}

Definition at line 70 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SCLK_P02_4_OUT

IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt2}

Definition at line 82 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SCLK_P10_6_OUT

IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt2}

Definition at line 83 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SCLK_P14_2_OUT

IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt6}

Definition at line 84 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SCLK_P33_7_OUT

IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt2}

Definition at line 85 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SCLK_P33_9_OUT

IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt4}

Definition at line 86 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SLSO_P02_3_OUT

IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt2}

Definition at line 99 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SLSO_P10_5_OUT

IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt6}

Definition at line 100 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SLSO_P33_6_OUT

IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt2}

Definition at line 101 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P02_0_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt2}

Definition at line 121 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P10_5_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt2}

Definition at line 122 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P14_2_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt2}

Definition at line 123 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P14_3_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt2}

Definition at line 124 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P33_8_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt2}

Definition at line 125 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P33_9_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt2}

Definition at line 126 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_CTSA_P00_12_IN

IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN = {&MODULE_ASCLIN3, {&MODULE_P00,12}, Ifx_RxSel_a}

Definition at line 50 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RTS_P00_9_OUT

IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt3}

Definition at line 56 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXA_P15_7_IN

IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, Ifx_RxSel_a}

Definition at line 71 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXC_P20_3_IN

IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, Ifx_RxSel_c}

Definition at line 72 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXD_P32_2_IN

IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, Ifx_RxSel_d}

Definition at line 73 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXE_P00_1_IN

IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, Ifx_RxSel_e}

Definition at line 74 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXF_P21_6_IN

IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, Ifx_RxSel_f}

Definition at line 75 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P00_0_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt2}

Definition at line 87 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P00_2_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt2}

Definition at line 88 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P15_6_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt6}

Definition at line 89 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P15_8_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt6}

Definition at line 90 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P20_0_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt3}

Definition at line 91 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P21_5_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt2}

Definition at line 92 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P21_7_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt3}

Definition at line 93 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P32_3_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt4}

Definition at line 94 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P33_2_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt2}

Definition at line 95 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SLSO_P00_3_OUT

IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt2}

Definition at line 102 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SLSO_P14_3_OUT

IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt5}

Definition at line 103 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SLSO_P21_2_OUT

IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt2}

Definition at line 104 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SLSO_P21_6_OUT

IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt2}

Definition at line 105 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SLSO_P33_1_OUT

IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt2}

Definition at line 106 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P00_0_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt3}

Definition at line 127 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P00_1_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt2}

Definition at line 128 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P15_6_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt2}

Definition at line 129 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P15_7_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt2}

Definition at line 130 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P20_0_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt2}

Definition at line 131 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P20_3_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt2}

Definition at line 132 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P21_7_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt2}

Definition at line 133 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P32_2_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt2}

Definition at line 134 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P32_3_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt2}

Definition at line 135 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Cts_In_pinTable

const IfxAsclin_Cts_In* IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxAsclin0_CTSA_P14_9_IN,
NULL_PTR
},
{
&IfxAsclin1_CTSA_P20_7_IN,
&IfxAsclin1_CTSB_P32_4_IN
},
{
&IfxAsclin2_CTSA_P10_7_IN,
&IfxAsclin2_CTSB_P33_5_IN
},
{
&IfxAsclin3_CTSA_P00_12_IN,
NULL_PTR
}
}
IfxAsclin1_CTSB_P32_4_IN
IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN
Definition: IfxAsclin_PinMap.c:47
IfxAsclin2_CTSA_P10_7_IN
IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN
Definition: IfxAsclin_PinMap.c:48
IfxAsclin0_CTSA_P14_9_IN
IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN
Definition: IfxAsclin_PinMap.c:45
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxAsclin1_CTSA_P20_7_IN
IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN
Definition: IfxAsclin_PinMap.c:46
IfxAsclin3_CTSA_P00_12_IN
IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN
Definition: IfxAsclin_PinMap.c:50
IfxAsclin2_CTSB_P33_5_IN
IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN
Definition: IfxAsclin_PinMap.c:49

Definition at line 138 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Rts_Out_pinTable

const IfxAsclin_Rts_Out* IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxAsclin0_RTS_P14_7_OUT,
NULL_PTR
},
{
&IfxAsclin1_RTS_P20_6_OUT,
&IfxAsclin1_RTS_P23_1_OUT
},
{
&IfxAsclin2_RTS_P10_8_OUT,
&IfxAsclin2_RTS_P33_4_OUT
},
{
&IfxAsclin3_RTS_P00_9_OUT,
NULL_PTR
}
}
IfxAsclin1_RTS_P23_1_OUT
IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT
Definition: IfxAsclin_PinMap.c:53
IfxAsclin2_RTS_P10_8_OUT
IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT
Definition: IfxAsclin_PinMap.c:54
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxAsclin2_RTS_P33_4_OUT
IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT
Definition: IfxAsclin_PinMap.c:55
IfxAsclin3_RTS_P00_9_OUT
IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT
Definition: IfxAsclin_PinMap.c:56
IfxAsclin1_RTS_P20_6_OUT
IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT
Definition: IfxAsclin_PinMap.c:52
IfxAsclin0_RTS_P14_7_OUT
IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT
Definition: IfxAsclin_PinMap.c:51

Definition at line 157 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Rx_In_pinTable

const IfxAsclin_Rx_In* IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]

Definition at line 176 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Sclk_Out_pinTable

const IfxAsclin_Sclk_Out* IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]

Definition at line 215 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Slso_Out_pinTable

const IfxAsclin_Slso_Out* IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]
Initial value:
= {
{
NULL_PTR,
NULL_PTR,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxAsclin1_SLSO_P14_3_OUT,
&IfxAsclin1_SLSO_P20_8_OUT,
&IfxAsclin1_SLSO_P33_10_OUT,
NULL_PTR,
NULL_PTR
},
{
&IfxAsclin2_SLSO_P02_3_OUT,
&IfxAsclin2_SLSO_P10_5_OUT,
&IfxAsclin2_SLSO_P33_6_OUT,
NULL_PTR,
NULL_PTR
},
{
&IfxAsclin3_SLSO_P00_3_OUT,
&IfxAsclin3_SLSO_P14_3_OUT,
&IfxAsclin3_SLSO_P21_2_OUT,
&IfxAsclin3_SLSO_P21_6_OUT,
&IfxAsclin3_SLSO_P33_1_OUT
}
}
IfxAsclin3_SLSO_P21_2_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT
Definition: IfxAsclin_PinMap.c:104
IfxAsclin2_SLSO_P33_6_OUT
IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT
Definition: IfxAsclin_PinMap.c:101
IfxAsclin1_SLSO_P14_3_OUT
IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT
Definition: IfxAsclin_PinMap.c:96
IfxAsclin2_SLSO_P02_3_OUT
IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT
Definition: IfxAsclin_PinMap.c:99
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxAsclin3_SLSO_P21_6_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT
Definition: IfxAsclin_PinMap.c:105
IfxAsclin1_SLSO_P20_8_OUT
IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT
Definition: IfxAsclin_PinMap.c:97
IfxAsclin3_SLSO_P14_3_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT
Definition: IfxAsclin_PinMap.c:103
IfxAsclin3_SLSO_P33_1_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT
Definition: IfxAsclin_PinMap.c:106
IfxAsclin2_SLSO_P10_5_OUT
IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT
Definition: IfxAsclin_PinMap.c:100
IfxAsclin3_SLSO_P00_3_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT
Definition: IfxAsclin_PinMap.c:102
IfxAsclin1_SLSO_P33_10_OUT
IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT
Definition: IfxAsclin_PinMap.c:98

Definition at line 262 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Tx_Out_pinTable

const IfxAsclin_Tx_Out* IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]

Definition at line 293 of file IfxAsclin_PinMap.c.


iLLD_TC26B: IfxAsclin_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxAsclin_PinMap.h File Reference
iLLD » ASCLIN

ASCLIN I/O map. More...

#include <IfxAsclin_reg.h>
#include <_Impl/IfxAsclin_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxAsclin_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxAsclin_Cts_In
CTS pin mapping structure. More...
struct | IfxAsclin_Rx_In
RX pin mapping structure. More...
struct | IfxAsclin_Rts_Out
RTS pin mapping structure. More...
struct | IfxAsclin_Sclk_Out
SCLK pin mapping structure. More...
struct | IfxAsclin_Slso_Out
SLSO pin mapping structure. More...
struct | IfxAsclin_Tx_Out
TX pin mapping structure. More...

Macros

#define | IFXASCLIN_PINMAP_NUM_MODULES 4
Table dimensions. More...
#define | IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS 2
#define | IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS 2
#define | IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS 7
#define | IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS 9
#define | IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS 5
#define | IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS 10

Variables

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN
ASCLIN0_CTSA: ASCLIN0 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN
ASCLIN1_CTSA: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN
ASCLIN1_CTSB: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN
ASCLIN2_CTSA: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN
ASCLIN2_CTSB: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN
ASCLIN3_CTSA: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT
ASCLIN0_RTS: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT
ASCLIN1_RTS: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT
ASCLIN1_RTS: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT
ASCLIN2_RTS: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT
ASCLIN2_RTS: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT
ASCLIN3_RTS: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN
ASCLIN0_RXA: ASCLIN0 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN
ASCLIN0_RXB: ASCLIN0 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN
ASCLIN1_RXA: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN
ASCLIN1_RXB: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN
ASCLIN1_RXC: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN
ASCLIN1_RXD: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN
ASCLIN1_RXE: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN
ASCLIN1_RXF: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN
ASCLIN1_RXG: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN
ASCLIN2_RXA: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN
ASCLIN2_RXB: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN
ASCLIN2_RXD: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN
ASCLIN2_RXE: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN
ASCLIN2_RXG: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN
ASCLIN3_RXA: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN
ASCLIN3_RXC: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN
ASCLIN3_RXD: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN
ASCLIN3_RXE: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN
ASCLIN3_RXF: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT
ASCLIN0_SCLK: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT
ASCLIN0_SCLK: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT
ASCLIN1_SCLK: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT
ASCLIN1_SCLK: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT
ASCLIN1_SCLK: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT
ASCLIN1_SCLK: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT
ASCLIN1_SLSO: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT
ASCLIN1_SLSO: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT
ASCLIN1_SLSO: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT
ASCLIN2_SLSO: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT
ASCLIN2_SLSO: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT
ASCLIN2_SLSO: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT
ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT
ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT
ASCLIN0_TX: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT
ASCLIN0_TX: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN const IfxAsclin_Cts_In * | IfxAsclin_Cts_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]
IfxAsclin_Cts_In table. More...
IFX_EXTERN const IfxAsclin_Rts_Out * | IfxAsclin_Rts_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]
IfxAsclin_Rts_Out table. More...
IFX_EXTERN const IfxAsclin_Rx_In * | IfxAsclin_Rx_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]
IfxAsclin_Rx_In table. More...
IFX_EXTERN const IfxAsclin_Sclk_Out * | IfxAsclin_Sclk_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxAsclin_Sclk_Out table. More...
IFX_EXTERN const IfxAsclin_Slso_Out * | IfxAsclin_Slso_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxAsclin_Slso_Out table. More...
IFX_EXTERN const IfxAsclin_Tx_Out * | IfxAsclin_Tx_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]
IfxAsclin_Tx_Out table. More...

Detailed Description

ASCLIN I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_PinMap.h.


iLLD_TC26B: IfxAsclin_Asc.h File Reference

  • Asclin
  • Asc
Data Structures | Functions
IfxAsclin_Asc.h File Reference
iLLD » ASCLIN

ASCLIN ASC details. More...

#include "Asclin/Std/IfxAsclin.h"
#include "_Lib/DataHandling/Ifx_Fifo.h"
#include "Stm/Std/IfxStm.h"
#include "StdIf/IfxStdIf_DPipe.h"
Include dependency graph for IfxAsclin_Asc.h:

Go to the source code of this file.

Data Structures

struct | IfxAsclin_Asc_ErrorFlags
Structure for Error Flags. More...
struct | IfxAsclin_Asc_BaudRate
Structure for baudrate. More...
struct | IfxAsclin_Asc_BitTimingControl
Structure for bit timings. More...
struct | IfxAsclin_Asc_FifoControl
Structure for FIFO control. More...
struct | IfxAsclin_Asc_FrameControl
Structure for frame control. More...
struct | IfxAsclin_Asc_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxAsclin_Asc_Pins
Structure for ASC pin configuration. More...
union | IfxAsclin_Asc_ErrorFlagsUnion
This union contains the error flags. In addition it allows to write and read to/from all flags as once via the ALL member. More...
struct | IfxAsclin_Asc
Module Handle. More...
struct | IfxAsclin_Asc_Config
Configuration structure of the module. More...

Functions

IFX_EXTERN void | IfxAsclin_Asc_isrError (IfxAsclin_Asc *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Asc_isrReceive (IfxAsclin_Asc *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Asc_isrTransmit (IfxAsclin_Asc *asclin)
ISR transmit routine. More...
IFX_EXTERN uint8 | IfxAsclin_Asc_blockingRead (IfxAsclin_Asc *asclin)
Reads data from the Rx FIFO. More...
IFX_EXTERN boolean | IfxAsclin_Asc_blockingWrite (IfxAsclin_Asc *asclin, uint8 data)
Writes data into the Tx FIFO. More...
IFX_EXTERN boolean | IfxAsclin_Asc_canReadCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
IFX_EXTERN boolean | IfxAsclin_Asc_canWriteCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
IFX_EXTERN void | IfxAsclin_Asc_clearRx (IfxAsclin_Asc *asclin)
IFX_EXTERN void | IfxAsclin_Asc_clearTx (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_flushTx (IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
IFX_EXTERN sint32 | IfxAsclin_Asc_getReadCount (IfxAsclin_Asc *asclin)
IFX_EXTERN IfxStdIf_DPipe_ReadEvent | IfxAsclin_Asc_getReadEvent (IfxAsclin_Asc *asclin)
IFX_EXTERN uint32 | IfxAsclin_Asc_getSendCount (IfxAsclin_Asc *asclin)
IFX_EXTERN Ifx_TickTime | IfxAsclin_Asc_getTxTimeStamp (IfxAsclin_Asc *asclin)
IFX_EXTERN sint32 | IfxAsclin_Asc_getWriteCount (IfxAsclin_Asc *asclin)
IFX_EXTERN IfxStdIf_DPipe_WriteEvent | IfxAsclin_Asc_getWriteEvent (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_read (IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
IFX_EXTERN void | IfxAsclin_Asc_resetSendCount (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_write (IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
IFX_EXTERN void | IfxAsclin_Asc_disableModule (IfxAsclin_Asc *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Asc_initModule (IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Asc_initModuleConfig (IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxAsclin_Asc_initiateTransmission (IfxAsclin_Asc *asclin)
Initiate the data transmission. More...
IFX_EXTERN boolean | IfxAsclin_Asc_stdIfDPipeInit (IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin)
Initialize the standard interface to the device driver. More...

Detailed Description

ASCLIN ASC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_Asc.h.

Data Structure Documentation

◆ IfxAsclin_Asc_ErrorFlags

struct IfxAsclin_Asc_ErrorFlags

Structure for Error Flags.

Definition at line 249 of file IfxAsclin_Asc.h.

Data Fields
uint8 | frameError: 1 | transmit complete/pending error
uint8 | parityError: 1 | parity error
uint8 | rxFifoOverflow: 1 | receive FIFO overflow error
uint8 | rxFifoUnderflow: 1 | receive FIFO underflow error
uint8 | txFifoOverflow: 1 | transmit FIFO overflow error

◆ IfxAsclin_Asc_ErrorFlagsUnion

union IfxAsclin_Asc_ErrorFlagsUnion

This union contains the error flags. In addition it allows to write and read to/from all flags as once via the ALL member.

Definition at line 330 of file IfxAsclin_Asc.h.

Collaboration diagram for IfxAsclin_Asc_ErrorFlagsUnion:
[legend]
Data Fields
uint8 | ALL
IfxAsclin_Asc_ErrorFlags | flags

Function Documentation

◆ IfxAsclin_Asc_initiateTransmission()

IFX_EXTERN void IfxAsclin_Asc_initiateTransmission ( IfxAsclin_Asc * asclin )

Initiate the data transmission.

Parameters
asclin module handle
Returns
None

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 402 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_write().

◆ IfxAsclin_Asc_stdIfDPipeInit()

IFX_EXTERN boolean IfxAsclin_Asc_stdIfDPipeInit | ( | IfxStdIf_DPipe * | stdif,
 |  | IfxAsclin_Asc * | asclin
 | ) |  |

Initialize the standard interface to the device driver.

Parameters
stdif | standard interface object, will be initialized by the function
asclin | device driver object used by the standard interface. must be initialised separately
Returns
TRUE on success, else FALSE

Definition at line 580 of file IfxAsclin_Asc.c.


iLLD_TC26B: IfxAsclin_Lin.h File Reference

  • Asclin
  • Lin
Data Structures | Macros | Enumerations | Functions
IfxAsclin_Lin.h File Reference
iLLD » ASCLIN

ASCLIN LIN details. More...

#include "Asclin/Std/IfxAsclin.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxAsclin_Lin.h:

Go to the source code of this file.

Data Structures

struct | IfxAsclin_Lin_EnabledInterrupts
Structure to store interrupts which are enabled during initialisation. More...
struct | IfxAsclin_Lin_FrameControlFlags
Structure for Lin Frame Control flags. More...
struct | IfxAsclin_Lin_AcknowledgementFlags
Structure for Acknowledgement Flags. More...
struct | IfxAsclin_Lin_BaudrateDetection
Structure for Baudrate Detection. More...
struct | IfxAsclin_Lin_BaudrateGeneration
Structure for Baudrate Generation. More...
struct | IfxAsclin_Lin_BitSamplingControl
Structure for Bit Sampling. More...
struct | IfxAsclin_Lin_BitTimingControl
Structure for Bit Timing. More...
struct | IfxAsclin_Lin_DataControl
Structure for Data Control. More...
struct | IfxAsclin_Lin_ErrorFlags
Structure for Error Flags. More...
struct | IfxAsclin_Lin_FifoControl
Structure for FIFO Control. More...
struct | IfxAsclin_Lin_FrameControl
Structure for Frame Control. More...
struct | IfxAsclin_Lin_FrameDataControl
Structure for Frame Data and Control flags. More...
struct | IfxAsclin_Lin_InterruptConfig
Structure for LIN Interrupt Configuration. More...
struct | IfxAsclin_Lin_LinControl
Structure for lin Control. More...
struct | IfxAsclin_Lin_Pins
Structure for LIN pin configuration. More...
struct | IfxAsclin_Lin
struct | IfxAsclin_Lin_Config
Configuration structure of the module. More...
struct | IfxAsclin_Lin_PduType
Structure to hold Lin Pdu data. More...

Macros

#define | IFXASCLIN_LIN_SEND_RESPONSE (0x80)
#define | IFXASCLIN_LIN_RECEIVE_RESPONSE (0xC1)

Enumerations

enum IfxAsclin_Lin_Direction {
IfxAsclin_Lin_Direction_TransmitHeader = 0,
IfxAsclin_Lin_Direction_TransmitHeaderAndResponse = 1,
IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse = 2
}
Defines the type of Lin Master Frame. (Transmit Header only) or (Transmit Header and Response) or (Transmit Header and Receive Response). More...

Functions

IFX_INLINE void | IfxAsclin_Lin_prepareHeaderReception (IfxAsclin_Lin *asclin)
Prepares the module to receive the header. More...
IFX_INLINE void | IfxAsclin_Lin_prepareResponseReception (IfxAsclin_Lin *asclin, uint32 length)
Prepares the module to Receive the response. More...
IFX_INLINE void | IfxAsclin_Lin_readHeader (IfxAsclin_Lin *asclin, uint8 *id)
Reads the header. More...
IFX_INLINE void | IfxAsclin_Lin_readResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Reads the response. More...
IFX_EXTERN void | IfxAsclin_Lin_ignoreHeader (IfxAsclin_Lin *asclin)
Ignores the latest header. More...
IFX_EXTERN void | IfxAsclin_Lin_receiveHeader (IfxAsclin_Lin *asclin, uint8 *id)
Receives the header. More...
IFX_EXTERN void | IfxAsclin_Lin_receiveResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Receives the response. More...
IFX_EXTERN void | IfxAsclin_Lin_sendHeader (IfxAsclin_Lin *asclin, uint8 *id)
Sends the header. More...
IFX_EXTERN void | IfxAsclin_Lin_sendResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
sends the response More...
IFX_EXTERN void | IfxAsclin_Lin_disableModule (IfxAsclin_Lin *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Lin_initModule (IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Lin_initModuleConfig (IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxAsclin_Lin_sendFrame (IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Response 3.Send Header and Receive Response. More...
IFX_EXTERN void | IfxAsclin_Lin_checkForReceivedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received header More...
IFX_EXTERN void | IfxAsclin_Lin_checkForReceivedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received response More...
IFX_EXTERN void | IfxAsclin_Lin_checkForTransmittedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted header More...
IFX_EXTERN void | IfxAsclin_Lin_checkForTransmittedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted response More...
IFX_EXTERN void | IfxAsclin_Lin_clearFlagsStatus (IfxAsclin_Lin *asclin)
clears the flags status structures More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForReceivedHeader (IfxAsclin_Lin *asclin)
waits until receive header end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForReceivedResponse (IfxAsclin_Lin *asclin)
waits until receive response end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForTransmittedHeader (IfxAsclin_Lin *asclin)
waits until transmit header end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForTransmittedResponse (IfxAsclin_Lin *asclin)
waits until transmit response end acknowledgemnet or an error has been detected More...
IFX_EXTERN void | IfxAsclin_Lin_isrError (IfxAsclin_Lin *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Lin_isrReceive (IfxAsclin_Lin *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Lin_isrTransmit (IfxAsclin_Lin *asclin)
ISR transmit routine. More...

Detailed Description

ASCLIN LIN details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_Lin.h.

Macro Definition Documentation

◆ IFXASCLIN_LIN_RECEIVE_RESPONSE

#define IFXASCLIN_LIN_RECEIVE_RESPONSE (0xC1)

Definition at line 316 of file IfxAsclin_Lin.h.

◆ IFXASCLIN_LIN_SEND_RESPONSE

#define IFXASCLIN_LIN_SEND_RESPONSE (0x80)

Definition at line 314 of file IfxAsclin_Lin.h.


iLLD_TC26B: IfxAsclin_Spi.h File Reference

  • Asclin
  • Spi
Data Structures | Enumerations | Functions
IfxAsclin_Spi.h File Reference
iLLD » ASCLIN

ASCLIN SPI details. More...

#include "Asclin/Std/IfxAsclin.h"
Include dependency graph for IfxAsclin_Spi.h:

Go to the source code of this file.

Data Structures

struct | IfxAsclin_Spi_Baudrate
Structure for Baudrate Generation. More...
struct | IfxAsclin_Spi_BitSamplingControl
Structure for Bit Sampling. More...
struct | IfxAsclin_Spi_ErrorFlags
Structure for Error Flags. More...
struct | IfxAsclin_Spi_FifoControl
Structure for FIFO Control. More...
struct | IfxAsclin_Spi_FrameControl
Structure for Frame Control. More...
struct | IfxAsclin_Spi_InputOutputControl
Structure for input output control. More...
struct | IfxAsclin_Spi_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxAsclin_Spi_Job
Structure for data transfer jobs. More...
struct | IfxAsclin_Spi_Pins
Structure for SPI pin configuration. More...
struct | IfxAsclin_Spi
Module handle. More...
struct | IfxAsclin_Spi_Config
Configuration structure of the module. More...

Enumerations

enum IfxAsclin_Spi_Status {
IfxAsclin_Spi_Status_ok = 0,
IfxAsclin_Spi_Status_busy = 1,
IfxAsclin_Spi_Status_unknown = 2
}
Enumeration for job status. More...

Functions

IFX_EXTERN void | IfxAsclin_Spi_disableModule (IfxAsclin_Spi *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Spi_initModule (IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Spi_initModuleConfig (IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
Fills the configuration structure with default values. More...
IFX_EXTERN void | IfxAsclin_Spi_isrError (IfxAsclin_Spi *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Spi_isrReceive (IfxAsclin_Spi *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Spi_isrTransmit (IfxAsclin_Spi *asclin)
ISR transmit routine. More...
IFX_EXTERN IfxAsclin_Spi_Status | IfxAsclin_Spi_exchange (IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
starts the data exchange More...
IFX_EXTERN void | IfxAsclin_Spi_read (IfxAsclin_Spi *asclin)
Reads data from the Rx FIFO based on the outlet width. More...
IFX_EXTERN void | IfxAsclin_Spi_write (IfxAsclin_Spi *asclin)
Writes data into the Tx FIFO based on the inlet width. More...
IFX_EXTERN IfxAsclin_Spi_Status | IfxAsclin_Spi_getStatus (IfxAsclin_Spi *asclin)

Detailed Description

ASCLIN SPI details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_Spi.h.

Enumeration Type Documentation

◆ IfxAsclin_Spi_Status

enum IfxAsclin_Spi_Status

Enumeration for job status.

Enumerator
IfxAsclin_Spi_Status_ok
IfxAsclin_Spi_Status_busy
IfxAsclin_Spi_Status_unknown

Definition at line 231 of file IfxAsclin_Spi.h.

Function Documentation

◆ IfxAsclin_Spi_getStatus()

IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus ( IfxAsclin_Spi * asclin )
Parameters
asclin module handle
Returns
status of the on going job

Definition at line 99 of file IfxAsclin_Spi.c.


iLLD_TC26B: IfxAsclin.h File Reference

  • Asclin
  • Std
Enumerations | Functions
IfxAsclin.h File Reference
iLLD » ASCLIN

ASCLIN basic functionality. More...

#include "_Impl/IfxAsclin_cfg.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxAsclin_reg.h"
#include "Src/Std/IfxSrc.h"
#include "_PinMap/IfxAsclin_PinMap.h"
Include dependency graph for IfxAsclin.h:

Go to the source code of this file.

Enumerations

enum IfxAsclin_Checksum {
IfxAsclin_Checksum_classic = 0,
IfxAsclin_Checksum_enhanced = 1
}
Defines if the classic or the enhanced checksum will be calculated by the checksum block.
Definition in Ifx_ASCLIN.DATCON.B.CSM. More...
enum IfxAsclin_ChecksumInjection {
IfxAsclin_ChecksumInjection_notWritten = 0,
IfxAsclin_ChecksumInjection_written = 1
}
Defines if the received checksum byte is written into the RXFifo or not.
Definition in Ifx_ASCLIN.LIN.CON.B.CSI. More...
enum IfxAsclin_ClockPolarity {
IfxAsclin_ClockPolarity_idleLow = 0,
IfxAsclin_ClockPolarity_idleHigh = 1
}
CPOL defines the idle level of the clock signal in the SPI mode.
Idle level is the level outside the data transmission time intervals.
Definition in Ifx_ASCLIN.IOCR.B.CPOL. More...
enum IfxAsclin_ClockSource {
IfxAsclin_ClockSource_noClock = 0,
IfxAsclin_ClockSource_kernelClock = 1,
IfxAsclin_ClockSource_oscillatorClock = 2,
IfxAsclin_ClockSource_flexRayClock = 4,
IfxAsclin_ClockSource_ascFastClock = 8,
IfxAsclin_ClockSource_ascSlowClock = 16
}
Selection of clock source
Definition in Ifx_ASCLIN.CSR.B.CLKSEL. More...
enum IfxAsclin_CtsInputSelect {
IfxAsclin_CtsInputSelect_0,
IfxAsclin_CtsInputSelect_1,
IfxAsclin_CtsInputSelect_2,
IfxAsclin_CtsInputSelect_3
}
CTS input pin selection
Definition in Ifx_ASCLIN.IOCR.B.CTS. More...
enum IfxAsclin_DataLength {
IfxAsclin_DataLength_1 = 0,
IfxAsclin_DataLength_2,
IfxAsclin_DataLength_3,
IfxAsclin_DataLength_4,
IfxAsclin_DataLength_5,
IfxAsclin_DataLength_6,
IfxAsclin_DataLength_7,
IfxAsclin_DataLength_8,
IfxAsclin_DataLength_9,
IfxAsclin_DataLength_10,
IfxAsclin_DataLength_11,
IfxAsclin_DataLength_12,
IfxAsclin_DataLength_13,
IfxAsclin_DataLength_14,
IfxAsclin_DataLength_15,
IfxAsclin_DataLength_16
}
Number of bits per transfer
Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN. More...
enum IfxAsclin_FrameMode {
IfxAsclin_FrameMode_initialise = 0,
IfxAsclin_FrameMode_asc = 1,
IfxAsclin_FrameMode_spi = 2,
IfxAsclin_FrameMode_lin = 3
}
Defines the basic operating mode of the module. Changing the mode must be done by switching first to initialize mode, and then to the other mode.
Definition in Ifx_ASCLIN.FRAMECON.B.MODE. More...
enum IfxAsclin_HeaderResponseSelect {
IfxAsclin_HeaderResponseSelect_headerAndResponse = 0,
IfxAsclin_HeaderResponseSelect_headerOnly = 1
}
Defines if LIN frame shall consist of a header and response or of a header only.
Definition in Ifx_ASCLIN.DATCON.B.HO. More...
enum IfxAsclin_IdleDelay {
IfxAsclin_IdleDelay_0,
IfxAsclin_IdleDelay_1,
IfxAsclin_IdleDelay_2,
IfxAsclin_IdleDelay_3,
IfxAsclin_IdleDelay_4,
IfxAsclin_IdleDelay_5,
IfxAsclin_IdleDelay_6,
IfxAsclin_IdleDelay_7
}
Defines the duration of the IDLE delay in bit times.
SPI mode: this is the idle time between the frames.
ASC and LIN mode: this is the pause inserted between transmission of bytes.
Definition in Ifx_ASCLIN.FRAMECON.B.IDLE. More...
enum IfxAsclin_LeadDelay {
IfxAsclin_LeadDelay_0,
IfxAsclin_LeadDelay_1,
IfxAsclin_LeadDelay_2,
IfxAsclin_LeadDelay_3,
IfxAsclin_LeadDelay_4,
IfxAsclin_LeadDelay_5,
IfxAsclin_LeadDelay_6,
IfxAsclin_LeadDelay_7
}
Defines the leading delay in bit times in SPI mode. ASC mode: not applicable.
LIN mode: delay between the end of the break and the start of the sync character.
Definition in Ifx_ASCLIN.FRAMECON.B.LEAD. More...
enum IfxAsclin_LinMode {
IfxAsclin_LinMode_slave = 0,
IfxAsclin_LinMode_master = 1
}
Configures if the module in LIN mode operates as master or slave
Definition in Ifx_ASCLIN.LIN.CON.B.MS. More...
enum IfxAsclin_LinResponseTimeoutMode {
IfxAsclin_LinResponseTimeoutMode_frameTimeout = 0,
IfxAsclin_LinResponseTimeoutMode_responseTimeout = 1
}
Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout.
Definition in Ifx_ASCLIN.DATCON.B.RM. More...
enum IfxAsclin_OversamplingFactor {
IfxAsclin_OversamplingFactor_4 = 3,
IfxAsclin_OversamplingFactor_5 = 4,
IfxAsclin_OversamplingFactor_6 = 5,
IfxAsclin_OversamplingFactor_7 = 6,
IfxAsclin_OversamplingFactor_8 = 7,
IfxAsclin_OversamplingFactor_9 = 8,
IfxAsclin_OversamplingFactor_10 = 9,
IfxAsclin_OversamplingFactor_11 = 10,
IfxAsclin_OversamplingFactor_12 = 11,
IfxAsclin_OversamplingFactor_13 = 12,
IfxAsclin_OversamplingFactor_14 = 13,
IfxAsclin_OversamplingFactor_15 = 14,
IfxAsclin_OversamplingFactor_16 = 15
}
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed
Definition in Ifx_ASCLIN.BITCON.B.OVERSAMPLING. More...
enum IfxAsclin_ParityType {
IfxAsclin_ParityType_even = 0,
IfxAsclin_ParityType_odd = 1
}
Type of parity bit attached to data bits
Definition in Ifx_ASCLIN.FRAMECON.B.ODD. More...
enum IfxAsclin_ReceiveBufferMode {
IfxAsclin_ReceiveBufferMode_rxFifo = 0,
IfxAsclin_ReceiveBufferMode_rxBuffer = 1
}
Receive buffer mode
Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF. More...
enum IfxAsclin_RtsCtsPolarity {
IfxAsclin_RtsCtsPolarity_activeHigh = 0,
IfxAsclin_RtsCtsPolarity_activeLow = 1
}
Polarity of the RTS and CTS signals
Definition in Ifx_ASCLIN.IOCR.B.RCPOL. More...
enum IfxAsclin_RxFifoInterruptLevel {
IfxAsclin_RxFifoInterruptLevel_1,
IfxAsclin_RxFifoInterruptLevel_2,
IfxAsclin_RxFifoInterruptLevel_3,
IfxAsclin_RxFifoInterruptLevel_4,
IfxAsclin_RxFifoInterruptLevel_5,
IfxAsclin_RxFifoInterruptLevel_6,
IfxAsclin_RxFifoInterruptLevel_7,
IfxAsclin_RxFifoInterruptLevel_8,
IfxAsclin_RxFifoInterruptLevel_9,
IfxAsclin_RxFifoInterruptLevel_10,
IfxAsclin_RxFifoInterruptLevel_11,
IfxAsclin_RxFifoInterruptLevel_12,
IfxAsclin_RxFifoInterruptLevel_13,
IfxAsclin_RxFifoInterruptLevel_14,
IfxAsclin_RxFifoInterruptLevel_15,
IfxAsclin_RxFifoInterruptLevel_16
}
Defines the filling level that triggers a drain (RX) interrupt or DMA access
Definition in Ifx_ASCLIN.RXFIFOCON.B.INTLEVEL. More...
enum IfxAsclin_RxFifoOutletWidth {
IfxAsclin_RxFifoOutletWidth_0,
IfxAsclin_RxFifoOutletWidth_1,
IfxAsclin_RxFifoOutletWidth_2,
IfxAsclin_RxFifoOutletWidth_3
}
Defines the number of bytes read from the Rx FIFO with one FPI bus read
Definition in Ifx_ASCLIN.RXFIFOCON.B.OUTW. More...
enum IfxAsclin_RxInputSelect {
IfxAsclin_RxInputSelect_0,
IfxAsclin_RxInputSelect_1,
IfxAsclin_RxInputSelect_2,
IfxAsclin_RxInputSelect_3,
IfxAsclin_RxInputSelect_4,
IfxAsclin_RxInputSelect_5,
IfxAsclin_RxInputSelect_6,
IfxAsclin_RxInputSelect_7
}
Alternate input selection for Rx signal.
Definition in Ifx_ASCLIN.IOCR.B.ALTI. More...
enum IfxAsclin_SamplePointPosition {
IfxAsclin_SamplePointPosition_1 = 1,
IfxAsclin_SamplePointPosition_2 = 2,
IfxAsclin_SamplePointPosition_3 = 3,
IfxAsclin_SamplePointPosition_4 = 4,
IfxAsclin_SamplePointPosition_5 = 5,
IfxAsclin_SamplePointPosition_6 = 6,
IfxAsclin_SamplePointPosition_7 = 7,
IfxAsclin_SamplePointPosition_8 = 8,
IfxAsclin_SamplePointPosition_9 = 9,
IfxAsclin_SamplePointPosition_10 = 10,
IfxAsclin_SamplePointPosition_11 = 11,
IfxAsclin_SamplePointPosition_12 = 12,
IfxAsclin_SamplePointPosition_13 = 13,
IfxAsclin_SamplePointPosition_14 = 14,
IfxAsclin_SamplePointPosition_15 = 15
}
Sample point position
Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT. More...
enum IfxAsclin_SamplesPerBit {
IfxAsclin_SamplesPerBit_one = 0,
IfxAsclin_SamplesPerBit_three = 1
}
Number of samples per bit, sample mode/medianfilter
Definition in Ifx_ASCLIN.BITCON.B.SM. More...
enum IfxAsclin_ShiftDirection {
IfxAsclin_ShiftDirection_lsbFirst = 0,
IfxAsclin_ShiftDirection_msbFirst = 1
}
SPI mode: defines the shift direction of the shift register.
ASC and LIN mode: should be set to 0.
Definition in Ifx_ASCLIN.FRAMECON.B.MSB. More...
enum IfxAsclin_SlavePolarity {
IfxAsclin_SlavePolarity_idleLow = 0,
IfxAsclin_SlavePolarity_idlehigh = 1
}
Defines the idle level of the SLSO signal, which is the level.
Outside the data transmission, leading and trailing time intervals.
Definition in Ifx_ASCLIN.IOCR.B.SPOL. More...
enum IfxAsclin_SleepMode {
IfxAsclin_SleepMode_enable = 0,
IfxAsclin_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ASCLIN.CLC.B.EDIS. More...
enum IfxAsclin_Status {
IfxAsclin_Status_configurationError = 0,
IfxAsclin_Status_noError = 1
}
Error status. More...
enum IfxAsclin_StopBit {
IfxAsclin_StopBit_0,
IfxAsclin_StopBit_1,
IfxAsclin_StopBit_2,
IfxAsclin_StopBit_3,
IfxAsclin_StopBit_4,
IfxAsclin_StopBit_5,
IfxAsclin_StopBit_6,
IfxAsclin_StopBit_7
}
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay.
Definition in Ifx_ASCLIN.FRAMECON.B.STOP. More...
enum IfxAsclin_SuspendMode {
IfxAsclin_SuspendMode_none = 0,
IfxAsclin_SuspendMode_hard = 1,
IfxAsclin_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxAsclin_TxFifoInletWidth {
IfxAsclin_TxFifoInletWidth_0,
IfxAsclin_TxFifoInletWidth_1,
IfxAsclin_TxFifoInletWidth_2,
IfxAsclin_TxFifoInletWidth_3
}
Defines the number of bytes written to the Tx FIFO with one FPI bus write
Definition in Ifx_ASCLIN.TXFIFOCON.B.INW. More...
enum IfxAsclin_TxFifoInterruptLevel {
IfxAsclin_TxFifoInterruptLevel_0,
IfxAsclin_TxFifoInterruptLevel_1,
IfxAsclin_TxFifoInterruptLevel_2,
IfxAsclin_TxFifoInterruptLevel_3,
IfxAsclin_TxFifoInterruptLevel_4,
IfxAsclin_TxFifoInterruptLevel_5,
IfxAsclin_TxFifoInterruptLevel_6,
IfxAsclin_TxFifoInterruptLevel_7,
IfxAsclin_TxFifoInterruptLevel_8,
IfxAsclin_TxFifoInterruptLevel_9,
IfxAsclin_TxFifoInterruptLevel_10,
IfxAsclin_TxFifoInterruptLevel_11,
IfxAsclin_TxFifoInterruptLevel_12,
IfxAsclin_TxFifoInterruptLevel_13,
IfxAsclin_TxFifoInterruptLevel_14,
IfxAsclin_TxFifoInterruptLevel_15
}
Defines the filling level that triggers a refill (TX) interrupt or DMA access
Definition in Ifx_ASCLIN.TXFIFOCON.B.INTLEVEL. More...

Functions

IFX_INLINE void | IfxAsclin_clearAllFlags (Ifx_ASCLIN *asclin)
clears all the flags More...
IFX_INLINE void | IfxAsclin_clearBreakDetectedFlag (Ifx_ASCLIN *asclin)
Clears the break detected flag. More...
IFX_INLINE void | IfxAsclin_clearCollisionDetectionErrorFlag (Ifx_ASCLIN *asclin)
Clears the collision detection error flag. More...
IFX_INLINE void | IfxAsclin_clearFallingEdgeDetectedFlag (Ifx_ASCLIN *asclin)
Clears the falling edge detected flag. More...
IFX_INLINE void | IfxAsclin_clearFrameErrorFlag (Ifx_ASCLIN *asclin)
Clears the frame error flag. More...
IFX_INLINE void | IfxAsclin_clearHeaderTimeoutFlag (Ifx_ASCLIN *asclin)
Clears the header timeout flag. More...
IFX_INLINE void | IfxAsclin_clearKernelResetStatus (Ifx_ASCLIN *asclin)
Clears the kernel reset status. More...
IFX_INLINE void | IfxAsclin_clearLinAutoBaudDetectionErrorFlag (Ifx_ASCLIN *asclin)
Clears the auto baudrate detection error flag. More...
IFX_INLINE void | IfxAsclin_clearLinChecksumErrorFlag (Ifx_ASCLIN *asclin)
Clears the LIN checksum error flag. More...
IFX_INLINE void | IfxAsclin_clearLinParityErrorFlag (Ifx_ASCLIN *asclin)
Clears the LIN parity error flag. More...
IFX_INLINE void | IfxAsclin_clearParityErrorFlag (Ifx_ASCLIN *asclin)
Clears the parity error flag. More...
IFX_INLINE void | IfxAsclin_clearRaisingEdgeDetectedFlag (Ifx_ASCLIN *asclin)
Clears the raising edge detected flag. More...
IFX_INLINE void | IfxAsclin_clearResponseTimeoutFlag (Ifx_ASCLIN *asclin)
Clears the response timeout flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoFillLevelFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoOverflowFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoUnderflowFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO underflow flag. More...
IFX_INLINE void | IfxAsclin_clearRxHeaderEndFlag (Ifx_ASCLIN *asclin)
Clears the receive header end flag. More...
IFX_INLINE void | IfxAsclin_clearRxResponseEndFlag (Ifx_ASCLIN *asclin)
Clears the receive response end flag. More...
IFX_INLINE void | IfxAsclin_clearTransmissionCompletedFlag (Ifx_ASCLIN *asclin)
Clears the transmission pending flag. More...
IFX_INLINE void | IfxAsclin_clearTxFifoFillLevelFlag (Ifx_ASCLIN *asclin)
Clears the Tx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_clearTxFifoOverflowFlag (Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_clearTxHeaderEndFlag (Ifx_ASCLIN *asclin)
Clears the transmit header end flag. More...
IFX_INLINE void | IfxAsclin_clearTxResponseEndFlag (Ifx_ASCLIN *asclin)
Clears the transmit response end flag. More...
IFX_INLINE void | IfxAsclin_flushRxFifo (Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO. More...
IFX_INLINE void | IfxAsclin_flushTxFifo (Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO. More...
IFX_INLINE void | IfxAsclin_setBrdLowerlimt (Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection's lower limit. More...
IFX_INLINE void | IfxAsclin_setBrdUpperlimt (Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection's upper limit. More...
IFX_INLINE void | IfxAsclin_setChecksumInjection (Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi)
Sets the checksum injection. More...
IFX_INLINE void | IfxAsclin_setChecksumMode (Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode)
Sets the checksum mode. More...
IFX_INLINE void | IfxAsclin_setDataLength (Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer) More...
IFX_INLINE void | IfxAsclin_setDenominator (Ifx_ASCLIN *asclin, uint16 denominator)
Sets the denominator of the fractional divider. More...
IFX_INLINE void | IfxAsclin_setDisableModuleRequest (Ifx_ASCLIN *asclin)
Sets the disable module request. More...
IFX_INLINE void | IfxAsclin_setEnableModuleRequest (Ifx_ASCLIN *asclin)
Sets the enable module request. More...
IFX_INLINE void | IfxAsclin_setFilterDepth (Ifx_ASCLIN *asclin, uint8 depth)
Sets digital glitch filter depth. More...
IFX_INLINE void | IfxAsclin_setHeaderResponseSelect (Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type)
Sets the header response selection. More...
IFX_INLINE void | IfxAsclin_setIdleDelay (Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay. More...
IFX_INLINE void | IfxAsclin_setKernelResetOne (Ifx_ASCLIN *asclin)
Sets the kernal reset of the KRST1. More...
IFX_INLINE void | IfxAsclin_setKernelResetZero (Ifx_ASCLIN *asclin)
Sets the kernel reset of the KRST0. More...
IFX_INLINE void | IfxAsclin_setLeadDelay (Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
Sets the lead delay. More...
IFX_INLINE void | IfxAsclin_setLinBreakLength (Ifx_ASCLIN *asclin, uint8 length)
Sets the LIN break length. More...
IFX_INLINE void | IfxAsclin_setLinHeaderTimeout (Ifx_ASCLIN *asclin, uint8 timeout)
Sets the LIN header timeout. More...
IFX_INLINE void | IfxAsclin_setLinMode (Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode)
Sets the LIN mode of operation. More...
IFX_INLINE void | IfxAsclin_setLinResponseTimeoutMode (Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode)
Sets the LIN response timeout mode. More...
IFX_INLINE void | IfxAsclin_setLinResponseTimeoutThreshold (Ifx_ASCLIN *asclin, uint16 threshold)
Sets the LIN response timeout threshold. More...
IFX_INLINE void | IfxAsclin_setNumerator (Ifx_ASCLIN *asclin, uint16 numerator)
Sets the numerator of the fractional divider. More...
IFX_INLINE void | IfxAsclin_setOversampling (Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor)
Sets the division ratio of the baudrate post divider. More...
IFX_INLINE void | IfxAsclin_setParityType (Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
Sets the parity type. More...
IFX_INLINE void | IfxAsclin_setPrescaler (Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler) More...
IFX_INLINE void | IfxAsclin_setRxBufferMode (Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
Sets the receive buffer mode. More...
IFX_INLINE void | IfxAsclin_setRxFifoInterruptLevel (Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level. More...
IFX_INLINE void | IfxAsclin_setRxFifoOutletWidth (Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width. More...
IFX_INLINE void | IfxAsclin_setSampleMode (Ifx_ASCLIN *asclin, IfxAsclin_SamplesPerBit medianFilter)
Sets the sample mode (number of samples per bit / median filter) More...
IFX_INLINE void | IfxAsclin_setSamplePointPosition (Ifx_ASCLIN *asclin, IfxAsclin_SamplePointPosition spPosition)
Sets the sampling point position. More...
IFX_INLINE void | IfxAsclin_setShiftDirection (Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction. More...
IFX_INLINE void | IfxAsclin_setStopBit (Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits. More...
IFX_INLINE void | IfxAsclin_setTransmitHeaderRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmit header request flag. More...
IFX_INLINE void | IfxAsclin_setTransmitResponseRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmit response request flag. More...
IFX_INLINE void | IfxAsclin_setTransmitWakeRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmission wake request flag. More...
IFX_INLINE void | IfxAsclin_setTxFifoInletWidth (Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width. More...
IFX_INLINE void | IfxAsclin_setTxFifoInterruptLevel (Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level. More...
IFX_INLINE boolean | IfxAsclin_getBreakDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the break detected flag status. More...
IFX_INLINE uint8 | IfxAsclin_getClockSource (Ifx_ASCLIN *asclin)
Returns the clock source. More...
IFX_INLINE boolean | IfxAsclin_getClockStatus (Ifx_ASCLIN *asclin)
Returns the clock status. More...
IFX_INLINE boolean | IfxAsclin_getCollisionDetectionErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the collision detection error flag status. More...
IFX_INLINE boolean | IfxAsclin_getFallingEdgeDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the falling edge detected flag status. More...
IFX_INLINE boolean | IfxAsclin_getFrameErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the frame error flag status. More...
IFX_INLINE boolean | IfxAsclin_getHeaderTimeoutFlagStatus (Ifx_ASCLIN *asclin)
Returns the header timeout flag status. More...
IFX_INLINE boolean | IfxAsclin_getKernelResetStatus (Ifx_ASCLIN *asclin)
Returns the kernel reset status. More...
IFX_INLINE boolean | IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN auto baudrate detection error flag status. More...
IFX_INLINE boolean | IfxAsclin_getLinChecksumErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN checksum error flag status. More...
IFX_INLINE boolean | IfxAsclin_getLinParityErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN parity error flag status. More...
IFX_INLINE boolean | IfxAsclin_getModuleStatus (Ifx_ASCLIN *asclin)
Returns the module status. More...
IFX_INLINE boolean | IfxAsclin_getParityErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the parity error flag status. More...
IFX_INLINE uint16 | IfxAsclin_getPrescaler (Ifx_ASCLIN *asclin)
Returns the division ratio of the predivider (prescaler) More...
IFX_INLINE boolean | IfxAsclin_getRaisingEdgeDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the raising edge detected flag status. More...
IFX_INLINE boolean | IfxAsclin_getReceiveSignalStatus (Ifx_ASCLIN *asclin)
Returns the received signal status. More...
IFX_INLINE boolean | IfxAsclin_getResponseTimeoutFlagStatus (Ifx_ASCLIN *asclin)
Returns the response timeout flag status. More...
IFX_INLINE uint8 | IfxAsclin_getRxFifoFillLevel (Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoFillLevelFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO level flag status. More...
IFX_INLINE uint8 | IfxAsclin_getRxFifoOutletWidth (Ifx_ASCLIN *asclin)
Returns the receive FIFO inlet width. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoOverflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoUnderflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO underflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxHeaderEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the receive header end flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxResponseEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the receive response end flag status. More...
IFX_INLINE boolean | IfxAsclin_getTransmissionCompletedFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmission pending flag status. More...
IFX_INLINE boolean | IfxAsclin_getTransmitSignalStatus (Ifx_ASCLIN *asclin)
Returns the transmit signal status. More...
IFX_INLINE uint8 | IfxAsclin_getTxFifoFillLevel (Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO. More...
IFX_INLINE boolean | IfxAsclin_getTxFifoFillLevelFlagStatus (Ifx_ASCLIN *asclin)
Returns the Tx FIFO level flag status. More...
IFX_INLINE uint8 | IfxAsclin_getTxFifoInletWidth (Ifx_ASCLIN *asclin)
Returns the transmit FIFO inlet width. More...
IFX_INLINE boolean | IfxAsclin_getTxFifoOverflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getTxHeaderEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmit header end flag status. More...
IFX_INLINE boolean | IfxAsclin_getTxResponseEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmit response end flag status. More...
IFX_INLINE void | IfxAsclin_setSleepMode (Ifx_ASCLIN *asclin, IfxAsclin_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN Ifx_ASCLIN * | IfxAsclin_getAddress (IfxAsclin_Index asclin)
API to get the address for ASCLIN HW module register memory map. More...
IFX_EXTERN float32 | IfxAsclin_getFaFrequency (Ifx_ASCLIN *asclin)
Returns the ASCLIN module FA frequency in Hz. More...
IFX_EXTERN IfxAsclin_Index | IfxAsclin_getIndex (Ifx_ASCLIN *asclin)
API to get the resource index of the ASCLIN specified. More...
IFX_EXTERN float32 | IfxAsclin_getOvsFrequency (Ifx_ASCLIN *asclin)
Returns the OVS frequency. More...
IFX_EXTERN float32 | IfxAsclin_getPdFrequency (Ifx_ASCLIN *asclin)
Returns the PD frequency. More...
IFX_EXTERN float32 | IfxAsclin_getShiftFrequency (Ifx_ASCLIN *asclin)
Returns the SHIFT frequency. More...
IFX_EXTERN void | IfxAsclin_resetModule (Ifx_ASCLIN *asclin)
resets Asclin kernel More...
IFX_INLINE void | IfxAsclin_disableAllFlags (Ifx_ASCLIN *asclin)
disables all flags More...
IFX_INLINE void | IfxAsclin_enableAutoBaudrateDetection (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the auto baudrate detection. More...
IFX_INLINE void | IfxAsclin_enableBreakDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables break detected flag. More...
IFX_INLINE void | IfxAsclin_enableCollisionDetection (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the collision detection. More...
IFX_INLINE void | IfxAsclin_enableCollisionDetectionErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN collision detection error flag. More...
IFX_INLINE void | IfxAsclin_enableCts (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables CTS. More...
IFX_INLINE void | IfxAsclin_enableFallingEdgeDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables falling edge detected flag. More...
IFX_INLINE void | IfxAsclin_enableFrameErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables frame error flag. More...
IFX_INLINE void | IfxAsclin_enableHardwareChecksum (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the hardware checksum. More...
IFX_INLINE void | IfxAsclin_enableHeaderTimeoutFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables header timeout flag. More...
IFX_INLINE void | IfxAsclin_enableLinAutoBaudDetectionErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN auto baudrate detection error flag. More...
IFX_INLINE void | IfxAsclin_enableLinChecksumErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN checksum error flag. More...
IFX_INLINE void | IfxAsclin_enableLinParityErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN parity error flag. More...
IFX_INLINE void | IfxAsclin_enableLoopBackMode (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the loop back mode. More...
IFX_INLINE void | IfxAsclin_enableParity (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits. More...
IFX_INLINE void | IfxAsclin_enableParityErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables parity error flag. More...
IFX_INLINE void | IfxAsclin_enableRaisingEdgeDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables raising edge detected flag. More...
IFX_INLINE void | IfxAsclin_enableResponseTimeoutFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables response timeout flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoFillLevelFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoInlet (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register. More...
IFX_INLINE void | IfxAsclin_enableRxFifoOverflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoUnderflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO underflow flag. More...
IFX_INLINE void | IfxAsclin_enableRxHeaderEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive header end flag. More...
IFX_INLINE void | IfxAsclin_enableRxResponseEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive response end flag. More...
IFX_INLINE void | IfxAsclin_enableTransmissionCompletedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmission completed flag. More...
IFX_INLINE void | IfxAsclin_enableTxFifoFillLevelFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_enableTxFifoOutlet (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission. More...
IFX_INLINE void | IfxAsclin_enableTxFifoOverflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_enableTxHeaderEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit header end flag. More...
IFX_INLINE void | IfxAsclin_enableTxResponseEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit response end flag. More...
IFX_INLINE boolean | IfxAsclin_isModuleSuspended (Ifx_ASCLIN *asclin)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxAsclin_setClockPolarity (Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol)
Selects the clock polarity. More...
IFX_INLINE void | IfxAsclin_setCtsInput (Ifx_ASCLIN *asclin, IfxAsclin_CtsInputSelect ctsi)
Selects the CTS input pin. More...
IFX_INLINE void | IfxAsclin_setFrameMode (Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module's mode of operation. More...
IFX_INLINE void | IfxAsclin_setRtsCtsPolarity (Ifx_ASCLIN *asclin, IfxAsclin_RtsCtsPolarity rcpol)
Selects the RTS/CTS polarity. More...
IFX_INLINE void | IfxAsclin_setRxInput (Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
Selects the alternate input for Rx signal. More...
IFX_INLINE void | IfxAsclin_setSlavePolarity (Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol)
Selects the slave polarity. More...
IFX_INLINE void | IfxAsclin_setSuspendMode (Ifx_ASCLIN *asclin, IfxAsclin_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN boolean | IfxAsclin_setBitTiming (Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing. More...
IFX_EXTERN void | IfxAsclin_disableModule (Ifx_ASCLIN *asclin)
Disables the module. More...
IFX_EXTERN void | IfxAsclin_enableAscErrorFlags (Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
Enables the ASC error interrupt Flags. More...
IFX_EXTERN void | IfxAsclin_enableModule (Ifx_ASCLIN *asclin)
Enables the module. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerEr (Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerRx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerTx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx. More...
IFX_EXTERN uint32 | IfxAsclin_read16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits. More...
IFX_EXTERN uint32 | IfxAsclin_read32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Reads data up to 32 bits. More...
IFX_EXTERN uint32 | IfxAsclin_read8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits. More...
IFX_EXTERN void | IfxAsclin_setBaudrateBitFields (Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
Sets the baudrate bit fields. More...
IFX_EXTERN void | IfxAsclin_setClockSource (Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source. More...
IFX_EXTERN uint32 | IfxAsclin_write16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits. More...
IFX_EXTERN uint32 | IfxAsclin_write32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Writes data up to 32 bits. More...
IFX_EXTERN uint32 | IfxAsclin_write8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits. More...
IFX_INLINE void | IfxAsclin_initCtsPin (const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a CTS input. More...
IFX_INLINE void | IfxAsclin_initRtsPin (const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a RTS output. More...
IFX_INLINE void | IfxAsclin_initRxPin (const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxAsclin_initSclkPin (const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output. More...
IFX_INLINE void | IfxAsclin_initSlsoPin (const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output. More...
IFX_INLINE void | IfxAsclin_initTxPin (const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE uint32 | IfxAsclin_readRxData (Ifx_ASCLIN *asclin)
IFX_INLINE void | IfxAsclin_writeTxData (Ifx_ASCLIN *asclin, uint32 data)
IFX_INLINE uint16 | IfxAsclin_getAllErrorFlagsStatus (Ifx_ASCLIN *asclin)
Returns the status of all error flags. More...

Detailed Description

ASCLIN basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin.h.

Function Documentation

◆ IfxAsclin_getAllErrorFlagsStatus()

IFX_INLINE uint16 IfxAsclin_getAllErrorFlagsStatus ( Ifx_ASCLIN * asclin )

Returns the status of all error flags.

Parameters
asclin pointer to ASCLIN registers
Returns
status

Definition at line 2458 of file IfxAsclin.h.

◆ IfxAsclin_readRxData()

IFX_INLINE uint32 IfxAsclin_readRxData ( Ifx_ASCLIN * asclin )
Parameters
asclin pointer to ASCLIN registers
Returns
returns the value of RxDATA register

Definition at line 2180 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_read().

◆ IfxAsclin_writeTxData()

IFX_INLINE void IfxAsclin_writeTxData | ( | Ifx_ASCLIN * | asclin,
 |  | uint32 | data
 | ) |  |
Parameters
asclin | pointer to ASCLIN registers
data | data to be written
Returns
None

Definition at line 2452 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_write().


iLLD_TC26B: CCU6

Modules | Files
CCU6
iLLD
Collaboration diagram for CCU6:

Modules

Implementation
Standard Driver
CCU6 Pin Mapping
ICU Interface driver
PWMBC Interface driver
PWM Interface Driver
TIMER Interface driver
TimerWithTrigger Interface driver
TPWM Interface driver

Files

file | IfxCcu6_cfg.h
CCU6 on-chip implementation data.
file | IfxCcu6_PinMap.c
CCU6 I/O map.
file | IfxCcu6_PinMap.h
CCU6 I/O map.
file | IfxCcu6_Icu.h
CCU6 ICU details.
file | IfxCcu6_PwmBc.h
CCU6 PWMBC details.
file | IfxCcu6_PwmHl.h
CCU6 PWMHL details.
file | IfxCcu6.h
CCU6 basic functionality.
file | IfxCcu6_Timer.h
CCU6 TIMER details.
file | IfxCcu6_TimerWithTrigger.h
CCU6 TIMERWITHTRIGGER details.
file | IfxCcu6_TPwm.h
CCU6 TPWM details.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » CCU6
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
iLLD » CCU6 » Implementation
Collaboration diagram for Enumerations:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » CCU6
Collaboration diagram for Standard Driver:

Modules

Enumerations
Operative Functions
Utility Functions
Configuration Functions
IO Pin Configuration Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » CCU6 » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxCcu6_CaptureCompareInput {
IfxCcu6_CaptureCompareInput_cC60 = IFX_CCU6_PISEL0_ISCC60_OFF,
IfxCcu6_CaptureCompareInput_cC61 = IFX_CCU6_PISEL0_ISCC61_OFF,
IfxCcu6_CaptureCompareInput_cC62 = IFX_CCU6_PISEL0_ISCC62_OFF,
IfxCcu6_CaptureCompareInput_cTRAP = IFX_CCU6_PISEL0_ISTRP_OFF,
IfxCcu6_CaptureCompareInput_cCPOS0 = IFX_CCU6_PISEL0_ISPOS0_OFF,
IfxCcu6_CaptureCompareInput_cCPOS1 = IFX_CCU6_PISEL0_ISPOS1_OFF,
IfxCcu6_CaptureCompareInput_cCPOS2 = IFX_CCU6_PISEL0_ISPOS2_OFF
}
Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )
Definition in Ifx_CCU.PISEL0. More...
enum IfxCcu6_CaptureCompareInputSignal {
IfxCcu6_CaptureCompareInputSignal_a = 0,
IfxCcu6_CaptureCompareInputSignal_b = 1,
IfxCcu6_CaptureCompareInputSignal_c = 2,
IfxCcu6_CaptureCompareInputSignal_d = 3
}
Selection of actual input signal for the capture compare inputs. More...
enum IfxCcu6_CaptureCompareState {
IfxCcu6_CaptureCompareState_set = 0,
IfxCcu6_CaptureCompareState_clear = 1,
IfxCcu6_CaptureCompareState_toggle = 2
}
capture/compare state to set / clear the CC6xST-bits More...
enum IfxCcu6_ChannelOut {
IfxCcu6_ChannelOut_cc0 = 0,
IfxCcu6_ChannelOut_cout0 = 1,
IfxCcu6_ChannelOut_cc1 = 2,
IfxCcu6_ChannelOut_cout1 = 3,
IfxCcu6_ChannelOut_cc2 = 4,
IfxCcu6_ChannelOut_cout2 = 5,
IfxCcu6_ChannelOut_cout3 = 6
}
Capture compare output pins. More...
enum IfxCcu6_CountingInputMode {
IfxCcu6_CountingInputMode_internal = 0,
IfxCcu6_CountingInputMode_manual = 1,
IfxCcu6_CountingInputMode_externalRising = 2,
IfxCcu6_CountingInputMode_externalFalling = 3
}
Defines the input event leading to a counting action of the timer (T12 / T13)
Definition in Ifx_CCU.PISEL2.B.ISCNT12 / Ifx_CCU.PISEL2.B.ISCNT13. More...
enum IfxCcu6_DelayBypass {
IfxCcu6_DelayBypass_notActive = 0,
IfxCcu6_DelayBypass_active = 1
}
Controls whether the source signal for the sampling of the Hall input pattern (selected by HSYNC) is delayed by the Dead-Time Counter 0
Definition in Ifx_CCU.T12MSEL.B.DBYP. More...
enum IfxCcu6_ExternalTriggerMode {
IfxCcu6_ExternalTriggerMode_disable = 0,
IfxCcu6_ExternalTriggerMode_risingEdge = 1,
IfxCcu6_ExternalTriggerMode_fallingEdge = 2,
IfxCcu6_ExternalTriggerMode_anyEdge = 3
}
Defines the event of signal T1xHR that can set the run bit T1xR by HW
Definition in Ifx_CCU.TCTR2.B.T12RSEL / IIfx_CCU.TCTR2.B.T13RSEL. More...
enum IfxCcu6_HallSensorTriggerMode {
IfxCcu6_HallSensorTriggerMode_permanentCheck = 0,
IfxCcu6_HallSensorTriggerMode_cM63 = 1,
IfxCcu6_HallSensorTriggerMode_t13PM = 2,
IfxCcu6_HallSensorTriggerMode_off = 3,
IfxCcu6_HallSensorTriggerMode_t12PMCountingUp = 4,
IfxCcu6_HallSensorTriggerMode_t12OMCountingDown = 5,
IfxCcu6_HallSensorTriggerMode_cM61CountingUp = 6,
IfxCcu6_HallSensorTriggerMode_cM61CountingDown = 7
}
Defines the source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields
Definition in Ifx_CCU.T12MSEL.HSYNC. More...
enum IfxCcu6_InterruptSource {
IfxCcu6_InterruptSource_cc60RisingEdge = IFX_CCU6_IS_ICC60R_OFF,
IfxCcu6_InterruptSource_cc60FallingEdge = IFX_CCU6_IS_ICC60F_OFF,
IfxCcu6_InterruptSource_cc61RisingEdge = IFX_CCU6_IS_ICC61R_OFF,
IfxCcu6_InterruptSource_cc61FallingEdge = IFX_CCU6_IS_ICC61F_OFF,
IfxCcu6_InterruptSource_cc62RisingEdge = IFX_CCU6_IS_ICC62R_OFF,
IfxCcu6_InterruptSource_cc62FallingEdge = IFX_CCU6_IS_ICC62F_OFF,
IfxCcu6_InterruptSource_t12OneMatch = IFX_CCU6_IS_T12OM_OFF,
IfxCcu6_InterruptSource_t12PeriodMatch = IFX_CCU6_IS_T12PM_OFF,
IfxCcu6_InterruptSource_t13CompareMatch = IFX_CCU6_IS_T13CM_OFF,
IfxCcu6_InterruptSource_t13PeriodMatch = IFX_CCU6_IS_T13PM_OFF,
IfxCcu6_InterruptSource_trap = IFX_CCU6_IS_TRPF_OFF,
IfxCcu6_InterruptSource_correctHallEvent = IFX_CCU6_IS_CHE_OFF,
IfxCcu6_InterruptSource_wrongHallEvent = IFX_CCU6_IS_WHE_OFF
}
Interrupt source selection Description in Ifx_CCU.IEN. More...
enum IfxCcu6_MultiChannelSwitchingSelect {
IfxCcu6_MultiChannelSwitchingSelect_noEvent = 0,
IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent = 1,
IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch = 2,
IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch = 3,
IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch = 4,
IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch = 5
}
Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP
Definition in Ifx_CCU.MCMCTR.B.SWSEL. More...
enum IfxCcu6_MultiChannelSwitchingSync {
IfxCcu6_MultiChannelSwitchingSync_direct = 0,
IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch = 1,
IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch = 2
}
Selection of the synchronization mechanism for the shadow transfer event MCM_ST
Definition in Ifx_CCU.MCMCTR.B.SWSYN. More...
enum IfxCcu6_ServiceRequest {
IfxCcu6_ServiceRequest_0 = 0,
IfxCcu6_ServiceRequest_1,
IfxCcu6_ServiceRequest_2,
IfxCcu6_ServiceRequest_3
}
Selection of service request outputs. More...
enum IfxCcu6_SleepMode {
IfxCcu6_SleepMode_enable = 0,
IfxCcu6_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CCU6.CLC.B.EDIS. More...
enum IfxCcu6_SuspendMode {
IfxCcu6_SuspendMode_none = 0,
IfxCcu6_SuspendMode_hard = 1,
IfxCcu6_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxCcu6_T12Channel {
IfxCcu6_T12Channel_0 = 0,
IfxCcu6_T12Channel_1,
IfxCcu6_T12Channel_2
}
Capture compare channel of Timer12. More...
enum IfxCcu6_T12ChannelMode {
IfxCcu6_T12ChannelMode_off = 0,
IfxCcu6_T12ChannelMode_compareMode = 1,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling = 4,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising = 5,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling = 6,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny = 7,
IfxCcu6_T12ChannelMode_hallSensor = 8,
IfxCcu6_T12ChannelMode_hysteresisLikecompare = 9,
IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling = 10,
IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising = 11,
IfxCcu6_T12ChannelMode_multiInputCaptureBothRising = 12,
IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling = 13,
IfxCcu6_T12ChannelMode_multiInputCaptureAny = 14
}
The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x. More...
enum IfxCcu6_T12CountDirection {
IfxCcu6_T12CountDirection_up = 0,
IfxCcu6_T12CountDirection_down = 1
}
Counting direction of Timer12
Definition in Ifx_CCU.TCTR0.B.CDIR. More...
enum IfxCcu6_T12CountMode {
IfxCcu6_T12CountMode_edgeAligned = 0,
IfxCcu6_T12CountMode_centerAligned = 1
}
Operating mode of Timer 12
Definition in Ifx_CCU.TCTR0.B.CTM. More...
enum IfxCcu6_T13TriggerDirection {
IfxCcu6_T13TriggerDirection_noAction = 0,
IfxCcu6_T13TriggerDirection_onT12CountingUp = 1,
IfxCcu6_T13TriggerDirection_onT12CountingDown = 2,
IfxCcu6_T13TriggerDirection_anyT12 = 3
}
Delivers additional information to control the automatic set of bit T13R in the case that the trigger action defined by T13 trigger event control (T13TEC) is detected.
Definition in Ifx_CCU.TCTR2.B.T13TED. More...
enum IfxCcu6_T13TriggerEvent {
IfxCcu6_T13TriggerEvent_noAction = 0,
IfxCcu6_T13TriggerEvent_onCC60RCompare = 1,
IfxCcu6_T13TriggerEvent_onCC61RCompare = 2,
IfxCcu6_T13TriggerEvent_onCC62RCompare = 3,
IfxCcu6_T13TriggerEvent_onAnyT12Compare = 4,
IfxCcu6_T13TriggerEvent_onT12Period = 5,
IfxCcu6_T13TriggerEvent_onT12Zero = 6,
IfxCcu6_T13TriggerEvent_onCCPOSxEdge = 7
}
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare signals)
Definition in Ifx_CCU.TCTR2.B.T13TEC. More...
enum IfxCcu6_TimerId {
IfxCcu6_TimerId_t12 = 0,
IfxCcu6_TimerId_t13 = 1
}
Timer number ( T12 / T13 ) More...
enum IfxCcu6_TimerInputClock {
IfxCcu6_TimerInputClock_fcc6 = 0,
IfxCcu6_TimerInputClock_fcc6By2 = 1,
IfxCcu6_TimerInputClock_fcc6By4 = 2,
IfxCcu6_TimerInputClock_fcc6By8 = 3,
IfxCcu6_TimerInputClock_fcc6By16 = 4,
IfxCcu6_TimerInputClock_fcc6By32 = 5,
IfxCcu6_TimerInputClock_fcc6By64 = 6,
IfxCcu6_TimerInputClock_fcc6By128 = 7
}
Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according to the equation
Definition in Ifx_CCU.TCTR0.B.T12CLK / Ifx_CCU.TCTR0.B.T13CLK. More...
enum IfxCcu6_TimerInputSignal {
IfxCcu6_TimerInputSignal_a = 0,
IfxCcu6_TimerInputSignal_b = 1,
IfxCcu6_TimerInputSignal_c = 2,
IfxCcu6_TimerInputSignal_d = 3,
IfxCcu6_TimerInputSignal_e = 0,
IfxCcu6_TimerInputSignal_f = 1,
IfxCcu6_TimerInputSignal_g = 2,
IfxCcu6_TimerInputSignal_h = 3
}
Selection of actual input signal for the timer inputs. More...
enum IfxCcu6_TimerRunStatus {
IfxCcu6_TimerRunStatus_stopped = 0,
IfxCcu6_TimerRunStatus_running = 1
}
Timer (T12 / T13) run status
Definition in Ifx_CCU.TCTR0.B.T12R and Ifx_CCU.TCTR0.B.T13R. More...
enum IfxCcu6_TrapMode {
IfxCcu6_TrapMode_automatic = 0,
IfxCcu6_TrapMode_manual = 1
}
Defines how the trap flag TRPF can be cleared after the trap input condition is no longer valid (either by CTRAP = 1 or by TRPPEN = 0)
Definition in Ifx_CCU.TRPCTR.B.TRPM2. More...
enum IfxCcu6_TrapState {
IfxCcu6_TrapState_t12Sync = 0,
IfxCcu6_TrapState_t13Sync = 1,
IfxCcu6_TrapState_immediate = 3
}
Defines the behavior of the selected outputs when leaving the trap state, after the trap condition has become inactive again
Definition in Ifx_CCU.TRPCTR.B.TRPMx (x = 0, 1) More...

Detailed Description

Enumeration Type Documentation

◆ IfxCcu6_CaptureCompareInput

enum IfxCcu6_CaptureCompareInput

Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )
Definition in Ifx_CCU.PISEL0.

Enumerator
IfxCcu6_CaptureCompareInput_cC60 | CC60 capture input.
IfxCcu6_CaptureCompareInput_cC61 | CC61 capture input.
IfxCcu6_CaptureCompareInput_cC62 | CC62 capture input.
IfxCcu6_CaptureCompareInput_cTRAP | CTRAP input.
IfxCcu6_CaptureCompareInput_cCPOS0 | CCPOS0 input.
IfxCcu6_CaptureCompareInput_cCPOS1 | CCPOS1 input.
IfxCcu6_CaptureCompareInput_cCPOS2 | CCPOS2 input.

Definition at line 78 of file IfxCcu6.h.

◆ IfxCcu6_CaptureCompareInputSignal

enum IfxCcu6_CaptureCompareInputSignal

Selection of actual input signal for the capture compare inputs.

Enumerator
IfxCcu6_CaptureCompareInputSignal_a | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_CaptureCompareInputSignal_b | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_CaptureCompareInputSignal_c | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_CaptureCompareInputSignal_d | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.

Definition at line 91 of file IfxCcu6.h.

◆ IfxCcu6_CaptureCompareState

enum IfxCcu6_CaptureCompareState

capture/compare state to set / clear the CC6xST-bits

Enumerator
IfxCcu6_CaptureCompareState_set | Bit CC6xST is set.
IfxCcu6_CaptureCompareState_clear | Bit CC6xST is cleared.
IfxCcu6_CaptureCompareState_toggle | Bit CC6xST is toggled.

Definition at line 101 of file IfxCcu6.h.

◆ IfxCcu6_ChannelOut

enum IfxCcu6_ChannelOut

Capture compare output pins.

Enumerator
IfxCcu6_ChannelOut_cc0 | CC60 compare output CC0.
IfxCcu6_ChannelOut_cout0 | CC60 compare output COUT0.
IfxCcu6_ChannelOut_cc1 | CC61 compare output CC1.
IfxCcu6_ChannelOut_cout1 | CC61 compare output COUT1.
IfxCcu6_ChannelOut_cc2 | CC62 compare output CC2.
IfxCcu6_ChannelOut_cout2 | CC62 compare output COUT2.
IfxCcu6_ChannelOut_cout3 | CC63 compare output COUT3.

Definition at line 110 of file IfxCcu6.h.

◆ IfxCcu6_CountingInputMode

enum IfxCcu6_CountingInputMode

Defines the input event leading to a counting action of the timer (T12 / T13)
Definition in Ifx_CCU.PISEL2.B.ISCNT12 / Ifx_CCU.PISEL2.B.ISCNT13.

Enumerator
IfxCcu6_CountingInputMode_internal | The T1x prescaler generates the counting events, Bit TCTR4.T1xCNT is not taken into account.
IfxCcu6_CountingInputMode_manual | Bit TCTR4.T1xCNT written with 1 is a counting event. The T1x prescaler is not taken into account.
IfxCcu6_CountingInputMode_externalRising | The timer T1x is counting each rising edge detected in the selected T1xHR signal.
IfxCcu6_CountingInputMode_externalFalling | The timer T1x is counting each falling edge detected in the selected T1xHR signal.

Definition at line 124 of file IfxCcu6.h.

◆ IfxCcu6_DelayBypass

enum IfxCcu6_DelayBypass

Controls whether the source signal for the sampling of the Hall input pattern (selected by HSYNC) is delayed by the Dead-Time Counter 0
Definition in Ifx_CCU.T12MSEL.B.DBYP.

Enumerator
IfxCcu6_DelayBypass_notActive | Dead-Time Counter 0 is generating a delay after the source signal becomes active.
IfxCcu6_DelayBypass_active | Dead-Time Counter 0 is not used for a delay.

Definition at line 139 of file IfxCcu6.h.

◆ IfxCcu6_ExternalTriggerMode

enum IfxCcu6_ExternalTriggerMode

Defines the event of signal T1xHR that can set the run bit T1xR by HW
Definition in Ifx_CCU.TCTR2.B.T12RSEL / IIfx_CCU.TCTR2.B.T13RSEL.

Enumerator
IfxCcu6_ExternalTriggerMode_disable | The external setting of T1xR is disabled.
IfxCcu6_ExternalTriggerMode_risingEdge | Bit T1xR is set if a rising edge of signal T1xHR is detected.
IfxCcu6_ExternalTriggerMode_fallingEdge | Bit T1xR is set if a falling edge of signal T1xHR is detected.
IfxCcu6_ExternalTriggerMode_anyEdge | Bit T1xR is set if an edge of signal T1xHR is detected.

Definition at line 149 of file IfxCcu6.h.

◆ IfxCcu6_HallSensorTriggerMode

enum IfxCcu6_HallSensorTriggerMode

Defines the source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields
Definition in Ifx_CCU.T12MSEL.HSYNC.

Enumerator
IfxCcu6_HallSensorTriggerMode_permanentCheck | Any edge at any of the inputs CCPOSx, independent from any PWM signal.
IfxCcu6_HallSensorTriggerMode_cM63 | A T13 Compare-Match.
IfxCcu6_HallSensorTriggerMode_t13PM | A T13 Period-Match.
IfxCcu6_HallSensorTriggerMode_off | Hall sampling triggered by HW sources is switched off.
IfxCcu6_HallSensorTriggerMode_t12PMCountingUp | A T12 Period-Match while counting up (T12_PM and CDIR = 0)
IfxCcu6_HallSensorTriggerMode_t12OMCountingDown | A T12 One-Match while counting down (T12_PM and CDIR = 1)
IfxCcu6_HallSensorTriggerMode_cM61CountingUp | A T12 Compare-Match of compare channel CC61 while counting up (CM_61 and CDIR = 0)
IfxCcu6_HallSensorTriggerMode_cM61CountingDown | A T12 Compare-Match of compare channel CC61 while counting down (CM_61 and CDIR = 1)

Definition at line 163 of file IfxCcu6.h.

◆ IfxCcu6_InterruptSource

enum IfxCcu6_InterruptSource

Interrupt source selection Description in Ifx_CCU.IEN.

Enumerator
IfxCcu6_InterruptSource_cc60RisingEdge | Capture compare match rising edge interrupt enable for channel CC60.
IfxCcu6_InterruptSource_cc60FallingEdge | Capture compare match falling edge interrupt enable for channel CC60.
IfxCcu6_InterruptSource_cc61RisingEdge | Capture compare match rising edge interrupt enable for channel CC61.
IfxCcu6_InterruptSource_cc61FallingEdge | Capture compare match falling edge interrupt enable for channel CC61.
IfxCcu6_InterruptSource_cc62RisingEdge | Capture compare match rising edge interrupt enable for channel CC62.
IfxCcu6_InterruptSource_cc62FallingEdge | Capture compare match falling edge interrupt enable for channel CC62.
IfxCcu6_InterruptSource_t12OneMatch | Interrupt enable for T12 one-match.
IfxCcu6_InterruptSource_t12PeriodMatch | Interrupt enable for T12 period-match.
IfxCcu6_InterruptSource_t13CompareMatch | Interrupt enable for T13 compare-match.
IfxCcu6_InterruptSource_t13PeriodMatch | Interrupt enable for T13 period-match.
IfxCcu6_InterruptSource_trap | Interrupt enable for trap flag.
IfxCcu6_InterruptSource_correctHallEvent | Interrupt enable for correct hall event.
IfxCcu6_InterruptSource_wrongHallEvent | Interrupt enable for wrong hall event.

Definition at line 179 of file IfxCcu6.h.

◆ IfxCcu6_MultiChannelSwitchingSelect

enum IfxCcu6_MultiChannelSwitchingSelect

Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP
Definition in Ifx_CCU.MCMCTR.B.SWSEL.

Enumerator
IfxCcu6_MultiChannelSwitchingSelect_noEvent | No trigger request will be generated.
IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent | Correct Hall pattern detected (CM_CHE)
IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch | T13 period-match detected (while counting up)
IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch | T12 one-match (while counting down)
IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch | T12 channel 1 compare-match detected (phase delay function)
IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch | T12 period match detected (while counting up)

Definition at line 205 of file IfxCcu6.h.

◆ IfxCcu6_MultiChannelSwitchingSync

enum IfxCcu6_MultiChannelSwitchingSync

Selection of the synchronization mechanism for the shadow transfer event MCM_ST
Definition in Ifx_CCU.MCMCTR.B.SWSYN.

Enumerator
IfxCcu6_MultiChannelSwitchingSync_direct | Direct, the trigger event immediately leads to the shadow transfer.
IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch | A T13 zero-match triggers the shadow transfer.
IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch | A T12 zero-match (while counting up) triggers the shadow transfer.

Definition at line 219 of file IfxCcu6.h.

◆ IfxCcu6_ServiceRequest

enum IfxCcu6_ServiceRequest

Selection of service request outputs.

Enumerator
IfxCcu6_ServiceRequest_0 | Service request output SR0.
IfxCcu6_ServiceRequest_1 | Service request output SR1.
IfxCcu6_ServiceRequest_2 | Service request output SR2.
IfxCcu6_ServiceRequest_3 | Service request output SR3.

Definition at line 230 of file IfxCcu6.h.

◆ IfxCcu6_SleepMode

enum IfxCcu6_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CCU6.CLC.B.EDIS.

Enumerator
IfxCcu6_SleepMode_enable | enables sleep mode
IfxCcu6_SleepMode_disable | disables sleep mode

Definition at line 241 of file IfxCcu6.h.

◆ IfxCcu6_SuspendMode

enum IfxCcu6_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxCcu6_SuspendMode_none | No suspend.
IfxCcu6_SuspendMode_hard | Hard Suspend.
IfxCcu6_SuspendMode_soft | Soft Suspend.

Definition at line 249 of file IfxCcu6.h.

◆ IfxCcu6_T12Channel

enum IfxCcu6_T12Channel

Capture compare channel of Timer12.

Enumerator
IfxCcu6_T12Channel_0 | T12 channel CC60.
IfxCcu6_T12Channel_1 | T12 channel CC61.
IfxCcu6_T12Channel_2 | T12 channel CC62.

Definition at line 258 of file IfxCcu6.h.

◆ IfxCcu6_T12ChannelMode

enum IfxCcu6_T12ChannelMode

The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x.

Enumerator
IfxCcu6_T12ChannelMode_off | Capture/Compare modes switched off.
IfxCcu6_T12ChannelMode_compareMode | Compare mode.
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling | CC6xIN rising edge: T12 stored in CC6xR, falling edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising | CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling | CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny | CC6xIN any active edge: CC6nSR stored in CC6xR, any active edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_hallSensor | Hall Sensor Mode, In order to properly enable this mode, all three MSEL6x fields have to be programmed to Hall Sensor mode.
IfxCcu6_T12ChannelMode_hysteresisLikecompare | Hysteresis-like compare mode.
IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling | CC6xIN rising edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising | CC6xIN falling edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_multiInputCaptureBothRising | CC6xIN rising edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling | CC6xIN falling edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_multiInputCaptureAny | CC6xIN any active edge : T12 stored in CC6xR, CCPOSx any active edge: T12 stored in CC6xSR.

Definition at line 267 of file IfxCcu6.h.

◆ IfxCcu6_T12CountDirection

enum IfxCcu6_T12CountDirection

Counting direction of Timer12
Definition in Ifx_CCU.TCTR0.B.CDIR.

Enumerator
IfxCcu6_T12CountDirection_up | Counting up.
IfxCcu6_T12CountDirection_down | Counting down.

Definition at line 288 of file IfxCcu6.h.

◆ IfxCcu6_T12CountMode

enum IfxCcu6_T12CountMode

Operating mode of Timer 12
Definition in Ifx_CCU.TCTR0.B.CTM.

Enumerator
IfxCcu6_T12CountMode_edgeAligned | T12 always counts up and continues counting from zero after reaching the period value.
IfxCcu6_T12CountMode_centerAligned | T12 counts down after detecting a period-match and counts up after detecting a one-match.

Definition at line 297 of file IfxCcu6.h.

◆ IfxCcu6_T13TriggerDirection

enum IfxCcu6_T13TriggerDirection

Delivers additional information to control the automatic set of bit T13R in the case that the trigger action defined by T13 trigger event control (T13TEC) is detected.
Definition in Ifx_CCU.TCTR2.B.T13TED.

Enumerator
IfxCcu6_T13TriggerDirection_noAction | no action
IfxCcu6_T13TriggerDirection_onT12CountingUp | while T12 is counting up
IfxCcu6_T13TriggerDirection_onT12CountingDown | while T12 is counting down
IfxCcu6_T13TriggerDirection_anyT12 | independent on the count direction of T12

Definition at line 308 of file IfxCcu6.h.

◆ IfxCcu6_T13TriggerEvent

enum IfxCcu6_T13TriggerEvent

Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare signals)
Definition in Ifx_CCU.TCTR2.B.T13TEC.

Enumerator
IfxCcu6_T13TriggerEvent_noAction | no action
IfxCcu6_T13TriggerEvent_onCC60RCompare | set T13R on a T12 compare event on channel 0
IfxCcu6_T13TriggerEvent_onCC61RCompare | set T13R on a T12 compare event on channel 1
IfxCcu6_T13TriggerEvent_onCC62RCompare | set T13R on a T12 compare event on channel 2
IfxCcu6_T13TriggerEvent_onAnyT12Compare | set T13R on any T12 compare event (ch. 0, 1, 2)
IfxCcu6_T13TriggerEvent_onT12Period | set T13R upon a period-match of T12
IfxCcu6_T13TriggerEvent_onT12Zero | set T13R upon a zero-match of T12 (while counting up)
IfxCcu6_T13TriggerEvent_onCCPOSxEdge | set T13R on any edge of inputs CCPOSx

Definition at line 319 of file IfxCcu6.h.

◆ IfxCcu6_TimerId

enum IfxCcu6_TimerId

Timer number ( T12 / T13 )

Enumerator
IfxCcu6_TimerId_t12 | Timer 12.
IfxCcu6_TimerId_t13 | Timer 13.

Definition at line 334 of file IfxCcu6.h.

◆ IfxCcu6_TimerInputClock

enum IfxCcu6_TimerInputClock

Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according to the equation
Definition in Ifx_CCU.TCTR0.B.T12CLK / Ifx_CCU.TCTR0.B.T13CLK.

Enumerator
IfxCcu6_TimerInputClock_fcc6 | fcc6
IfxCcu6_TimerInputClock_fcc6By2 | fcc6 / 2
IfxCcu6_TimerInputClock_fcc6By4 | fcc6 / 4
IfxCcu6_TimerInputClock_fcc6By8 | fcc6 / 8
IfxCcu6_TimerInputClock_fcc6By16 | fcc6 / 16
IfxCcu6_TimerInputClock_fcc6By32 | fcc6 / 32
IfxCcu6_TimerInputClock_fcc6By64 | fcc6 / 64
IfxCcu6_TimerInputClock_fcc6By128 | fcc6 / 128

Definition at line 343 of file IfxCcu6.h.

◆ IfxCcu6_TimerInputSignal

enum IfxCcu6_TimerInputSignal

Selection of actual input signal for the timer inputs.

Enumerator
IfxCcu6_TimerInputSignal_a | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_TimerInputSignal_b | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_TimerInputSignal_c | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_TimerInputSignal_d | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_TimerInputSignal_e | defines the input signal used as T1xHR input.
IfxCcu6_TimerInputSignal_f | defines the input signal used as T1xHR input.
IfxCcu6_TimerInputSignal_g | defines the input signal used as T1xHR input.
IfxCcu6_TimerInputSignal_h | defines the input signal used as T1xHR input.

Definition at line 357 of file IfxCcu6.h.

◆ IfxCcu6_TimerRunStatus

enum IfxCcu6_TimerRunStatus

Timer (T12 / T13) run status
Definition in Ifx_CCU.TCTR0.B.T12R and Ifx_CCU.TCTR0.B.T13R.

Enumerator
IfxCcu6_TimerRunStatus_stopped | Timer T1x is stopped.
IfxCcu6_TimerRunStatus_running | Timer T1x is running.

Definition at line 372 of file IfxCcu6.h.

◆ IfxCcu6_TrapMode

enum IfxCcu6_TrapMode

Defines how the trap flag TRPF can be cleared after the trap input condition is no longer valid (either by CTRAP = 1 or by TRPPEN = 0)
Definition in Ifx_CCU.TRPCTR.B.TRPM2.

Enumerator
IfxCcu6_TrapMode_automatic | Bit TRPF is cleared by HW.
IfxCcu6_TrapMode_manual | Bit TRPF stays 0, It has to be cleared by SW by writing ISR.RTRPF = 1.

Definition at line 381 of file IfxCcu6.h.

◆ IfxCcu6_TrapState

enum IfxCcu6_TrapState

Defines the behavior of the selected outputs when leaving the trap state, after the trap condition has become inactive again
Definition in Ifx_CCU.TRPCTR.B.TRPMx (x = 0, 1)

Enumerator
IfxCcu6_TrapState_t12Sync | The trap state is left when a zero-match of T12 (while counting up) is detected.
IfxCcu6_TrapState_t13Sync | The trap state is left when a zeromatch of T13 is detected.
IfxCcu6_TrapState_immediate | The trap state is left immediately without any synchronization to T12 or T13.

Definition at line 391 of file IfxCcu6.h.


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » CCU6 » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxCcu6_clearCounter (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Clears the counters of the Timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_clearDeadTimeCounters (Ifx_CCU6 *ccu6)
Clears all the three dead-time counter channels to zero. More...
IFX_INLINE void | IfxCcu6_clearInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Clears the selected interrupt flag. More...
IFX_INLINE void | IfxCcu6_clearT12OneNotification (Ifx_CCU6 *ccu6)
Clears the T12 One notification. More...
IFX_INLINE void | IfxCcu6_clearT12PeriodNotification (Ifx_CCU6 *ccu6)
Clears the T12 period notification. More...
IFX_INLINE void | IfxCcu6_clearT13CompareNotification (Ifx_CCU6 *ccu6)
Clears the T13 compare notification. More...
IFX_INLINE volatile uint32 * | IfxCcu6_getT12TimerPointer (Ifx_CCU6 *ccu6)
Returns the Timer pointer. More...
IFX_INLINE boolean | IfxCcu6_isModuleEnabled (Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled. More...
IFX_INLINE boolean | IfxCcu6_isT12OneNotification (Ifx_CCU6 *ccu6)
Returns the status of T12 one notification. More...
IFX_INLINE boolean | IfxCcu6_isT12PeriodNotification (Ifx_CCU6 *ccu6)
Returns the status of T12 period notification. More...
IFX_INLINE boolean | IfxCcu6_isT13CompareNotification (Ifx_CCU6 *ccu6)
Returns the status of T13 compare notification. More...
IFX_INLINE void | IfxCcu6_setCountingInputMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13). More...
IFX_INLINE void | IfxCcu6_setCurrentHallPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the current hall pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setDeadTimeValue (Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (dead time) More...
IFX_INLINE void | IfxCcu6_setExpectedHallPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the expected hall pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setExternalRunMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW. More...
IFX_INLINE void | IfxCcu6_setHallSensorTriggerMode (Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode)
Sets source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields. More...
IFX_INLINE void | IfxCcu6_setInputClockFrequency (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency)
Sets the input clock for timers (T12 or T13) More...
IFX_INLINE void | IfxCcu6_setInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Sets the selected interrupt flag. More...
IFX_INLINE void | IfxCcu6_setMultiChannelPwmPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the output pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setMultiChannelSwitchingMode (Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP. More...
IFX_INLINE void | IfxCcu6_setMultiChannelSwitchingSync (Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
Sets the synchronization mechanism of the shadow transfer event MCM_ST
if it has been requested before (flag R set by an event selected by SWSEL) and if MCMEN = 1. More...
IFX_INLINE void | IfxCcu6_setOutputPassiveState (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the state of the corresponding compare channel, that is considered to be the passive state. More...
IFX_INLINE void | IfxCcu6_setSingleShotModeEnable (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_setT12ChannelMode (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels. More...
IFX_INLINE void | IfxCcu6_setT12CountMode (Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
IFX_INLINE void | IfxCcu6_setT12CounterValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12. More...
IFX_INLINE void | IfxCcu6_setT12PeriodValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match. More...
IFX_INLINE void | IfxCcu6_setT13CompareValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit compare value of Timer13 (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setT13CounterValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13. More...
IFX_INLINE void | IfxCcu6_setT13PeriodValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match. More...
IFX_INLINE void | IfxCcu6_setT13TriggerEventDirection (Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction. More...
IFX_INLINE void | IfxCcu6_setT13TriggerEventMode (Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare signals) More...
IFX_INLINE void | IfxCcu6_setTrapMode (Ifx_CCU6 *ccu6, IfxCcu6_TrapMode mode)
Sets the mode of clearing the trap flag TRPF after the trap input condition is no longer valid. More...
IFX_INLINE void | IfxCcu6_setTrapState (Ifx_CCU6 *ccu6, IfxCcu6_TrapState state)
Sets behaviour of the selected outputs when leaving the trap state after the trap condition has become inactive again. More...
IFX_INLINE void | IfxCcu6_startTimer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_stopTimer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_updateHallPattern (Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output)
Updates the hall pattern (current hall, expected hall, moduleation output), in a single write. More...
IFX_EXTERN void | IfxCcu6_connectTrigger (Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
IFX_EXTERN void | IfxCcu6_routeInterruptNode (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests. More...
IFX_EXTERN void | IfxCcu6_setOutputPassiveLevel (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module. More...
IFX_EXTERN void | IfxCcu6_setT12CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xST (x=0,1,2) More...
IFX_EXTERN void | IfxCcu6_setT12CompareValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers) More...
IFX_EXTERN float32 | IfxCcu6_setT12Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : CaptureFrequency. More...
IFX_EXTERN void | IfxCcu6_setT12InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs. More...
IFX_EXTERN void | IfxCcu6_setT13CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63ST. More...
IFX_EXTERN float32 | IfxCcu6_setT13Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : captureFrequency. More...
IFX_EXTERN void | IfxCcu6_setT13InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs. More...

Detailed Description

Function Documentation

◆ IfxCcu6_clearCounter()

IFX_INLINE void IfxCcu6_clearCounter | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

Clears the counters of the Timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 choice (enable / disable)
t13 | Timer13 choice (enable / disable)
Returns
None

Definition at line 1402 of file IfxCcu6.h.

◆ IfxCcu6_clearDeadTimeCounters()

IFX_INLINE void IfxCcu6_clearDeadTimeCounters ( Ifx_CCU6 * ccu6 )

Clears all the three dead-time counter channels to zero.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1412 of file IfxCcu6.h.

◆ IfxCcu6_clearInterruptStatusFlag()

IFX_INLINE void IfxCcu6_clearInterruptStatusFlag | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source
 | ) |  |

Clears the selected interrupt flag.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
Returns
None

Definition at line 1418 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_init().

◆ IfxCcu6_clearT12OneNotification()

IFX_INLINE void IfxCcu6_clearT12OneNotification ( Ifx_CCU6 * ccu6 )

Clears the T12 One notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1425 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq().

◆ IfxCcu6_clearT12PeriodNotification()

IFX_INLINE void IfxCcu6_clearT12PeriodNotification ( Ifx_CCU6 * ccu6 )

Clears the T12 period notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1431 of file IfxCcu6.h.

◆ IfxCcu6_clearT13CompareNotification()

IFX_INLINE void IfxCcu6_clearT13CompareNotification ( Ifx_CCU6 * ccu6 )

Clears the T13 compare notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1437 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq().

◆ IfxCcu6_connectTrigger()

IFX_EXTERN void IfxCcu6_connectTrigger | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TrigOut | outputLine,
 |  | IfxCcu6_TrigSel | selectedTrigger
 | ) |  |
Parameters
ccu6 | Specifies Ccu6 module
outputLine | Output Line
selectedTrigger | Trigger selection
Returns
None

Definition at line 53 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_getT12TimerPointer()

IFX_INLINE volatile uint32 * IfxCcu6_getT12TimerPointer ( Ifx_CCU6 * ccu6 )

Returns the Timer pointer.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Timer pointer

Definition at line 1703 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_getPointer().

◆ IfxCcu6_isModuleEnabled()

IFX_INLINE boolean IfxCcu6_isModuleEnabled ( Ifx_CCU6 * ccu6 )

Returns the status of module enabled or disabled.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status (TRUE / FALSE)

Definition at line 1914 of file IfxCcu6.h.

Referenced by IfxCcu6_disableModule(), IfxCcu6_enableModule(), IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_isT12OneNotification()

IFX_INLINE boolean IfxCcu6_isT12OneNotification ( Ifx_CCU6 * ccu6 )

Returns the status of T12 one notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status (TRUE / FALSE)

Definition at line 1932 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq().

◆ IfxCcu6_isT12PeriodNotification()

IFX_INLINE boolean IfxCcu6_isT12PeriodNotification ( Ifx_CCU6 * ccu6 )

Returns the status of T12 period notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status (TRUE / FALSE)

Definition at line 1938 of file IfxCcu6.h.

◆ IfxCcu6_isT13CompareNotification()

IFX_INLINE boolean IfxCcu6_isT13CompareNotification ( Ifx_CCU6 * ccu6 )

Returns the status of T13 compare notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status (TRUE / FALSE)

Definition at line 1944 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq().

◆ IfxCcu6_routeInterruptNode()

IFX_EXTERN void IfxCcu6_routeInterruptNode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source,
 |  | IfxCcu6_ServiceRequest | serviceRequest
 | ) |  |

Routes the interrupt node pointer to the selected service requests.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
serviceRequest | Selection of service request outputs
Returns
None

Definition at line 283 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setCountingInputMode()

IFX_INLINE void IfxCcu6_setCountingInputMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer,
 |  | IfxCcu6_CountingInputMode | mode
 | ) |  |

Sets the input event leading to a counting action of Timers (T12 / T13).

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
mode | Input event leading to a counting action of the timer (T12 / T13)
Returns
None

Definition at line 1958 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_Timer_countOneStep(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setCurrentHallPattern()

IFX_INLINE void IfxCcu6_setCurrentHallPattern | ( | Ifx_CCU6 * | ccu6,
 |  | uint8 | pattern
 | ) |  |

Sets the current hall pattern for the multichannel mode (writes into shadow register)

Parameters
ccu6 | Pointer to the base of CCU6 registers
pattern | Current hall pattern
Returns
None

Definition at line 1966 of file IfxCcu6.h.

◆ IfxCcu6_setDeadTimeValue()

IFX_INLINE void IfxCcu6_setDeadTimeValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint8 | value
 | ) |  |

Sets the delay between switching from the passive state to the active state of the selected outputs (dead time)

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | Value of the dead time to be induced
Returns
None

Definition at line 1972 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setDeadtime(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setExpectedHallPattern()

IFX_INLINE void IfxCcu6_setExpectedHallPattern | ( | Ifx_CCU6 * | ccu6,
 |  | uint8 | pattern
 | ) |  |

Sets the expected hall pattern for the multichannel mode (writes into shadow register)

Parameters
ccu6 | Pointer to the base of CCU6 registers
pattern | Expected hall pattern
Returns
None

Definition at line 1978 of file IfxCcu6.h.

◆ IfxCcu6_setExternalRunMode()

IFX_INLINE void IfxCcu6_setExternalRunMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer,
 |  | IfxCcu6_ExternalTriggerMode | mode
 | ) |  |

Sets the event of signal T1xHR that can set the run bit T1xR by HW.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
mode | External trigger mode
Returns
None

Definition at line 1984 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_startCapture(), IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_start(), IfxCcu6_PwmBc_stop(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_stop(), IfxCcu6_TPwm_start(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_setHallSensorTriggerMode()

IFX_INLINE void IfxCcu6_setHallSensorTriggerMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_HallSensorTriggerMode | mode
 | ) |  |

Sets source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields.

Parameters
ccu6 | Pointer to the base of CCU6 registers
mode | Hall sensor input trigger event
Returns
None

Definition at line 1992 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_setInputClockFrequency()

IFX_INLINE void IfxCcu6_setInputClockFrequency | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer,
 |  | IfxCcu6_TimerInputClock | frequency
 | ) |  |

Sets the input clock for timers (T12 or T13)

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
frequency | Input clock for timers (T12 or T13)
Returns
None

Definition at line 2000 of file IfxCcu6.h.

Referenced by IfxCcu6_setT12Frequency(), and IfxCcu6_setT13Frequency().

◆ IfxCcu6_setInterruptStatusFlag()

IFX_INLINE void IfxCcu6_setInterruptStatusFlag | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source
 | ) |  |

Sets the selected interrupt flag.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
Returns
None

Definition at line 2008 of file IfxCcu6.h.

◆ IfxCcu6_setMultiChannelPwmPattern()

IFX_INLINE void IfxCcu6_setMultiChannelPwmPattern | ( | Ifx_CCU6 * | ccu6,
 |  | uint8 | pattern
 | ) |  |

Sets the output pattern for the multichannel mode (writes into shadow register)

Parameters
ccu6 | Pointer to the base of CCU6 registers
pattern | Output pattern for the multichannel mode.
Returns
None

Definition at line 2015 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmHl_setupChannels().

◆ IfxCcu6_setMultiChannelSwitchingMode()

IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_MultiChannelSwitchingSelect | mode
 | ) |  |

Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP.

Parameters
ccu6 | Pointer to the base of CCU6 registers
mode | Trigger request source (next multi-channel event) for the shadow transfer MCM_ST
Returns
None

Definition at line 2021 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), and IfxCcu6_PwmHl_init().

◆ IfxCcu6_setMultiChannelSwitchingSync()

IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_MultiChannelSwitchingSync | sync
 | ) |  |

Sets the synchronization mechanism of the shadow transfer event MCM_ST
if it has been requested before (flag R set by an event selected by SWSEL) and if MCMEN = 1.

Parameters
ccu6 | Pointer to the base of CCU6 registers
sync | Synchronization mechanism of the shadow transfer event MCM_ST
Returns
None

Definition at line 2027 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), and IfxCcu6_PwmHl_init().

◆ IfxCcu6_setOutputPassiveLevel()

IFX_EXTERN void IfxCcu6_setOutputPassiveLevel | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_ChannelOut | channelOut,
 |  | boolean | state
 | ) |  |

Sets the passive state level of the PWM outputs of the module.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channelOut | Capture compare output selection
state | FALSE: The passive level is 0. TRUE : The passive level is 1.
Returns
None

Definition at line 320 of file IfxCcu6.c.

Referenced by IfxCcu6_TimerWithTrigger_init().

◆ IfxCcu6_setOutputPassiveState()

IFX_INLINE void IfxCcu6_setOutputPassiveState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_ChannelOut | channelOut,
 |  | boolean | state
 | ) |  |

Sets the state of the corresponding compare channel, that is considered to be the passive state.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channelOut | Capture compare output selection
state FALSE: passive state when CC6xST == 0
TRUE : passive state when CC6xST == 1
Returns
None

Definition at line 2033 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setSingleShotModeEnable()

IFX_INLINE void IfxCcu6_setSingleShotModeEnable | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 choice (enable / disable)
t13 | Timer13 choice (enable / disable)
Returns
None

Definition at line 2041 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_init().

◆ IfxCcu6_setT12CaptureCompareState()

IFX_EXTERN void IfxCcu6_setT12CaptureCompareState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel,
 |  | IfxCcu6_CaptureCompareState | state
 | ) |  |

Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xST (x=0,1,2)

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
state | capture/compare state selection (set / clear / toggle)
Returns
None

Definition at line 335 of file IfxCcu6.c.

◆ IfxCcu6_setT12ChannelMode()

IFX_INLINE void IfxCcu6_setT12ChannelMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel,
 |  | IfxCcu6_T12ChannelMode | mode
 | ) |  |

Sets the operating mode of the Timer12 capture/compare channels.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
mode | The operating mode for the T12 channels
Returns
None

Definition at line 2071 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_startCapture(), IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT12CompareValue()

IFX_EXTERN void IfxCcu6_setT12CompareValue | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel,
 |  | uint16 | value
 | ) |  |

Sets the 16-bit compare value of Timer12 (writes into shadow registers)

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
value | Compare value
Returns
None

Definition at line 360 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOnTime(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT12CounterValue()

IFX_INLINE void IfxCcu6_setT12CounterValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint16 | value
 | ) |  |

Sets the 16-bit counter value of Timer12.

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | Counter value
Returns
None

Definition at line 2085 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT12CountMode()

IFX_INLINE void IfxCcu6_setT12CountMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12CountMode | mode
 | ) |  |
Parameters
ccu6 | Pointer to the base of CCU6 registers
mode | Operating mode of Timer 12
Returns
None

Definition at line 2079 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_setT12Frequency(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT12Frequency()

IFX_EXTERN float32 IfxCcu6_setT12Frequency | ( | Ifx_CCU6 * | ccu6,
 |  | float32 | frequency,
 |  | Ifx_TimerValue | period,
 |  | IfxCcu6_T12CountMode | countMode
 | ) |  |

Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : CaptureFrequency.

Parameters
ccu6 | Pointer to the base of CCU6 registers
frequency | Requested timer frequency in Hz
period | period value to be configured
countMode | Counting mode of Timer12
Returns
Zero, if the function failed to fulfill requested frequency and resolution
Positive, if the function can find settings close to the requested frequency and resolution above the requested

Definition at line 377 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT12InputSignal()

IFX_EXTERN void IfxCcu6_setT12InputSignal | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12hr_In * | extInput
 | ) |  |

selects the actual input signal for the timer inputs.

Parameters
ccu6 | Pointer to the base of CCU6 registers
extInput | External input signal for the Timer 12
Returns
None

Definition at line 426 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_Icu_startCapture(), IfxCcu6_initT12hrPin(), IfxCcu6_initT12hrPinWithPadLevel(), IfxCcu6_PwmBc_start(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_TPwm_initModule(), and IfxCcu6_TPwm_start().

◆ IfxCcu6_setT12PeriodValue()

IFX_INLINE void IfxCcu6_setT12PeriodValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint16 | value
 | ) |  |

Sets the period value that leads Timer12 counter value to a period-match.

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | Period value
Returns
None

Definition at line 2091 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_setT12Frequency(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_setPeriod(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT13CaptureCompareState()

IFX_EXTERN void IfxCcu6_setT13CaptureCompareState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_CaptureCompareState | state
 | ) |  |

Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63ST.

Parameters
ccu6 | Pointer to the base of CCU6 registers
state | capture/compare state selection (set / clear / toggle)
Returns
None

Definition at line 435 of file IfxCcu6.c.

◆ IfxCcu6_setT13CompareValue()

IFX_INLINE void IfxCcu6_setT13CompareValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint16 | value
 | ) |  |

Sets the 16-bit compare value of Timer13 (writes into shadow register)

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | Compare value
Returns
None

Definition at line 2097 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT13CounterValue()

IFX_INLINE void IfxCcu6_setT13CounterValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint16 | value
 | ) |  |

Sets the 16-bit counter value of Timer13.

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | counter value
Returns
None

Definition at line 2103 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT13Frequency()

IFX_EXTERN float32 IfxCcu6_setT13Frequency | ( | Ifx_CCU6 * | ccu6,
 |  | float32 | frequency,
 |  | Ifx_TimerValue | period
 | ) |  |

Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : captureFrequency.

Parameters
ccu6 | Pointer to the base of CCU6 registers
frequency | Requested timer frequency in Hz
period | period value to be configured
Returns
Zero, if the function failed to fulfill requested frequency and resolution
Positive, if the function can find settings close to the requested frequency and resolution above the requested
Return values
IfxCcu6_Stat_wrongPwmFreq if the T12 prescaler can't fulfill the required frequency

Definition at line 461 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT13InputSignal()

IFX_EXTERN void IfxCcu6_setT13InputSignal | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T13hr_In * | extInput
 | ) |  |

selects the actual input signal for the timer inputs.

Parameters
ccu6 | Pointer to the base of CCU6 registers
extInput | External input signal for the Timer 13
Returns
None

Definition at line 510 of file IfxCcu6.c.

Referenced by IfxCcu6_initT13hrPin(), IfxCcu6_initT13hrPinWithPadLevel(), IfxCcu6_PwmBc_start(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_TPwm_initModule(), and IfxCcu6_TPwm_start().

◆ IfxCcu6_setT13PeriodValue()

IFX_INLINE void IfxCcu6_setT13PeriodValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint16 | value
 | ) |  |

Sets the period value that leads Timer13 counter value to a period-match.

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | period value
Returns
None

Definition at line 2109 of file IfxCcu6.h.

Referenced by IfxCcu6_setT13Frequency(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT13TriggerEventDirection()

IFX_INLINE void IfxCcu6_setT13TriggerEventDirection | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T13TriggerDirection | direction
 | ) |  |

Sets the Timer13 trigger event direction.

Parameters
ccu6 | Pointer to the base of CCU6 registers
direction | T13 trigger event direction
Returns
None

Definition at line 2115 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmBc_stop(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_stop(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_setT13TriggerEventMode()

IFX_INLINE void IfxCcu6_setT13TriggerEventMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T13TriggerEvent | mode
 | ) |  |

Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare signals)

Parameters
ccu6 | Pointer to the base of CCU6 registers
mode | The trigger event to start T13
Returns
None

Definition at line 2121 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmBc_stop(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_stop(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_setTrapMode()

IFX_INLINE void IfxCcu6_setTrapMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TrapMode | mode
 | ) |  |

Sets the mode of clearing the trap flag TRPF after the trap input condition is no longer valid.

Parameters
ccu6 | Pointer to the base of CCU6 registers
mode | Trap mode selection
Returns
None

Definition at line 2127 of file IfxCcu6.h.

◆ IfxCcu6_setTrapState()

IFX_INLINE void IfxCcu6_setTrapState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TrapState | state
 | ) |  |

Sets behaviour of the selected outputs when leaving the trap state after the trap condition has become inactive again.

Parameters
ccu6 | Pointer to the base of CCU6 registers
state | Trap state selection
Returns
None

Definition at line 2133 of file IfxCcu6.h.

◆ IfxCcu6_startTimer()

IFX_INLINE void IfxCcu6_startTimer | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

starts the timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 start choice (enable / disable)
t13 | Timer13 start choice (enable / disable)
Returns
None

Definition at line 2140 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_startCapture(), IfxCcu6_PwmBc_start(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_synchronousStart(), IfxCcu6_TimerWithTrigger_run(), and IfxCcu6_TPwm_start().

◆ IfxCcu6_stopTimer()

IFX_INLINE void IfxCcu6_stopTimer | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

starts the timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 stop choice (enable / disable)
t13 | Timer13 stop choice (enable / disable)
Returns
None

Definition at line 2150 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_stop(), IfxCcu6_Timer_stop(), IfxCcu6_Timer_synchronousStop(), IfxCcu6_TimerWithTrigger_stop(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_updateHallPattern()

IFX_INLINE void IfxCcu6_updateHallPattern | ( | Ifx_CCU6 * | ccu6,
 |  | uint8 | currentHall,
 |  | uint8 | expectedHall,
 |  | uint8 | output
 | ) |  |

Updates the hall pattern (current hall, expected hall, moduleation output), in a single write.

Parameters
ccu6 | Pointer to the base of CCU6 registers
currentHall | Current hall pattern
expectedHall | Expected hall pattern
output | Output pattern for the multichannel mode.
Returns
None

Definition at line 2160 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_updateHallPattern().


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » CCU6 » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE boolean | IfxCcu6_getDeadTimeStatus (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Indicate the status of the dead time generation for each compare channel (0, 1, 2) of timer T12. More...
IFX_INLINE boolean | IfxCcu6_getHallPatternSampleState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the value of the input Hall pattern of the Timer12 capture/compare channels CC6POS6x (x = 0, 1, 2)
that has been compared to the current and expected value. More...
IFX_INLINE boolean | IfxCcu6_getInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Gets the status of the selected interrupt flag. More...
IFX_INLINE boolean | IfxCcu6_getMultiChannelModeAvailabilityStatus (Ifx_CCU6 *ccu6)
indicates if the multi-channel mode functionality is available More...
IFX_INLINE boolean | IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus (Ifx_CCU6 *ccu6)
Gets the status of the shadow transfer request from MCMPS to MCMP. More...
IFX_INLINE boolean | IfxCcu6_getShadowTransferStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) shadow transfer enable status. More...
IFX_INLINE boolean | IfxCcu6_getT12CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the state of the Timer12 capture/compare channels CC6xST (x = 0, 1, 2) More...
IFX_INLINE IfxCcu6_T12CountDirection | IfxCcu6_getT12CountDirection (Ifx_CCU6 *ccu6)
Returns the current counting direction of Timer12. More...
IFX_INLINE boolean | IfxCcu6_getT13CaptureCompareState (Ifx_CCU6 *ccu6)
Returns the state of the Timer13 capture/compare channel CC63ST. More...
IFX_INLINE boolean | IfxCcu6_getTimerAvailabilityStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability More...
IFX_INLINE IfxCcu6_TimerRunStatus | IfxCcu6_getTimerRunStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) run status. More...
IFX_INLINE boolean | IfxCcu6_isModuleSuspended (Ifx_CCU6 *ccu6)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxCcu6_setSuspendMode (Ifx_CCU6 *ccu6, IfxCcu6_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN Ifx_CCU6 * | IfxCcu6_getAddress (IfxCcu6_Index ccu6)
Returns the module index of the selected CCU6 module. More...
IFX_EXTERN uint32 | IfxCcu6_getCaptureRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel. More...
IFX_EXTERN uint32 | IfxCcu6_getCaptureShadowRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel. More...
IFX_EXTERN IfxCcu6_Index | IfxCcu6_getIndex (Ifx_CCU6 *ccu6)
Returns CCU6 index. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxCcu6_getSrcAddress (Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register. More...
IFX_EXTERN uint32 | IfxCcu6_readTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the current value of the timer register. More...

Detailed Description

Function Documentation

◆ IfxCcu6_getAddress()

IFX_EXTERN Ifx_CCU6* IfxCcu6_getAddress ( IfxCcu6_Index ccu6 )

Returns the module index of the selected CCU6 module.

Parameters
ccu6 Pointer to CCU6 module registers
Returns
CCU6 module register address

Definition at line 158 of file IfxCcu6.c.

◆ IfxCcu6_getCaptureRegisterValue()

IFX_EXTERN uint32 IfxCcu6_getCaptureRegisterValue | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Returns the capture register value of the selected channel.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
current value of the capture register of a selected channel

Definition at line 175 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_getMotorSpeed().

◆ IfxCcu6_getCaptureShadowRegisterValue()

IFX_EXTERN uint32 IfxCcu6_getCaptureShadowRegisterValue | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Returns the capture shadow register value of the selected channel.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
current value of the capture shadow register of a selected channel

Definition at line 196 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_getTimeStamp(), and IfxCcu6_PwmBc_getMotorSpeed().

◆ IfxCcu6_getDeadTimeStatus()

IFX_INLINE boolean IfxCcu6_getDeadTimeStatus | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Indicate the status of the dead time generation for each compare channel (0, 1, 2) of timer T12.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
Status TRUE or FALSE

Definition at line 1647 of file IfxCcu6.h.

◆ IfxCcu6_getHallPatternSampleState()

IFX_INLINE boolean IfxCcu6_getHallPatternSampleState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Returns the value of the input Hall pattern of the Timer12 capture/compare channels CC6POS6x (x = 0, 1, 2)
that has been compared to the current and expected value.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
Status
TRUE : The input CCPOSx has been sampled as 0
FALSE : The input CCPOSx has been sampled as 1

Definition at line 1655 of file IfxCcu6.h.

◆ IfxCcu6_getIndex()

IFX_EXTERN IfxCcu6_Index IfxCcu6_getIndex ( Ifx_CCU6 * ccu6 )

Returns CCU6 index.

Parameters
ccu6 Specifies the pointer to the base of CCU6 registers
Returns
Returns index. returns -1 in case of unknown index

Definition at line 217 of file IfxCcu6.c.

Referenced by IfxCcu6_getSrcAddress().

◆ IfxCcu6_getInterruptStatusFlag()

IFX_INLINE boolean IfxCcu6_getInterruptStatusFlag | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source
 | ) |  |

Gets the status of the selected interrupt flag.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
Returns
Status (TRUE / FALSE)

Definition at line 1663 of file IfxCcu6.h.

◆ IfxCcu6_getMultiChannelModeAvailabilityStatus()

IFX_INLINE boolean IfxCcu6_getMultiChannelModeAvailabilityStatus ( Ifx_CCU6 * ccu6 )

indicates if the multi-channel mode functionality is available

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status (TRUE / FALSE)

Definition at line 1670 of file IfxCcu6.h.

◆ IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus()

IFX_INLINE boolean IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus ( Ifx_CCU6 * ccu6 )

Gets the status of the shadow transfer request from MCMPS to MCMP.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status
FALSE: A shadow transfer MCM_ST is not requested
TRUE: A shadow transfer MCM_ST is requested, but has not yet been executed

Definition at line 1676 of file IfxCcu6.h.

◆ IfxCcu6_getShadowTransferStatus()

IFX_INLINE boolean IfxCcu6_getShadowTransferStatus | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Returns the Timer (T12 / T13) shadow transfer enable status.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
Status (TRUE: enable / FALSE: disable)

Definition at line 1682 of file IfxCcu6.h.

◆ IfxCcu6_getSrcAddress()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxCcu6_getSrcAddress | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_ServiceRequest | serviceRequest
 | ) |  |

Returns the service request register.

Parameters
ccu6 | Specifies Ccu6 module
serviceRequest | Selection of service request outputs
Returns
The service request register

Definition at line 237 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_getT12CaptureCompareState()

IFX_INLINE boolean IfxCcu6_getT12CaptureCompareState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Returns the state of the Timer12 capture/compare channels CC6xST (x = 0, 1, 2)

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
Status TRUE or FALSE

Definition at line 1690 of file IfxCcu6.h.

◆ IfxCcu6_getT12CountDirection()

IFX_INLINE IfxCcu6_T12CountDirection IfxCcu6_getT12CountDirection ( Ifx_CCU6 * ccu6 )

Returns the current counting direction of Timer12.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
direction (up / down)

Definition at line 1697 of file IfxCcu6.h.

◆ IfxCcu6_getT13CaptureCompareState()

IFX_INLINE boolean IfxCcu6_getT13CaptureCompareState ( Ifx_CCU6 * ccu6 )

Returns the state of the Timer13 capture/compare channel CC63ST.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status TRUE or FALSE

Definition at line 1709 of file IfxCcu6.h.

◆ IfxCcu6_getTimerAvailabilityStatus()

IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

indicates the Timer blocks (T12 / T13) availability

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
Status (TRUE / FALSE)

Definition at line 1715 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_getTimerRunStatus()

IFX_INLINE IfxCcu6_TimerRunStatus IfxCcu6_getTimerRunStatus | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Returns the Timer (T12 / T13) run status.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
Status (stopped / running)

Definition at line 1722 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_startCapture().

◆ IfxCcu6_isModuleSuspended()

IFX_INLINE boolean IfxCcu6_isModuleSuspended ( Ifx_CCU6 * ccu6 )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
ccu6 Pointer to CCU6 module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 1920 of file IfxCcu6.h.

◆ IfxCcu6_readTimer()

IFX_EXTERN uint32 IfxCcu6_readTimer | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Returns the current value of the timer register.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
current value of the timer register

Definition at line 247 of file IfxCcu6.c.

◆ IfxCcu6_setSuspendMode()

IFX_INLINE void IfxCcu6_setSuspendMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
ccu6 | Pointer to CCU6 module registers
mode | Module suspend mode
Returns
None

Definition at line 2060 of file IfxCcu6.h.


iLLD_TC26B: Configuration Functions

Functions
Configuration Functions
iLLD » CCU6 » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxCcu6_clearAllInterruptStatusFlags (Ifx_CCU6 *ccu6)
Clears all Interrupt flags. More...
IFX_INLINE void | IfxCcu6_disableAdditionalPrescaler (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies. More...
IFX_INLINE void | IfxCcu6_disableDeadTime (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Disables the dead time generation for each compare channel (0, 1, 2) of Timer12. More...
IFX_INLINE void | IfxCcu6_disableDelayBypass (Ifx_CCU6 *ccu6)
Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) More...
IFX_INLINE void | IfxCcu6_disableInterrupt (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Disables the selected interrupt. More...
IFX_INLINE void | IfxCcu6_disableMultiChannelMode (Ifx_CCU6 *ccu6)
Sets multi channel mode unavailable, A write access to MCMOUTS is ignored. More...
IFX_INLINE void | IfxCcu6_disableShadowTransfer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_disableSingleShotMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the single shot-mode of Timers (T12 T13). More...
IFX_INLINE void | IfxCcu6_disableT13InvertedModulation (Ifx_CCU6 *ccu6)
Disables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST. More...
IFX_INLINE void | IfxCcu6_disableTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block unavailable, A write access to T12PR is ignored. More...
IFX_INLINE void | IfxCcu6_disableTrap (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Disables the trap functionality for the corresponding output signals. More...
IFX_INLINE void | IfxCcu6_disableTrapPin (Ifx_CCU6 *ccu6)
Disables the input (pin) function for the trap generation. More...
IFX_INLINE void | IfxCcu6_enableAdditionalPrescaler (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies. More...
IFX_INLINE void | IfxCcu6_enableCountEvent (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Sets the single shot-mode of Timers (T12, T13). More...
IFX_INLINE void | IfxCcu6_enableDeadTime (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12. More...
IFX_INLINE void | IfxCcu6_enableDelayBypass (Ifx_CCU6 *ccu6)
Enables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) by the Dead-Time Counter 0. More...
IFX_INLINE void | IfxCcu6_enableHallPatternShadowTransfer (Ifx_CCU6 *ccu6)
Sets HP_ST immediately to update bit fields EXPH and CURH by EXPHS and CURHS. More...
IFX_INLINE void | IfxCcu6_enableInterrupt (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelMode (Ifx_CCU6 *ccu6)
Sets multi channel mode available, A write access to MCMOUTS is executed. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelModeAvailability (Ifx_CCU6 *ccu6)
Enables the Multi Channel Mode Availability. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelPwmPatternShadowTransfer (Ifx_CCU6 *ccu6)
Sets MCM_ST immediately to update bit field MCMP by the value of MCMPS. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 one match is detected while counting down. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 period match is detected while counting up. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T13_ST if flag MCMOUT.R is set or
becomes set while a T13 period match is detected. More...
IFX_INLINE void | IfxCcu6_enableShadowTransfer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_enableSingleShotMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the single shot-mode of Timers (T12 T13). More...
IFX_INLINE void | IfxCcu6_enableT13InvertedModulation (Ifx_CCU6 *ccu6)
Enables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST. More...
IFX_INLINE void | IfxCcu6_enableTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed. More...
IFX_INLINE void | IfxCcu6_enableTrap (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Enables the trap functionality for the corresponding output signals. More...
IFX_INLINE void | IfxCcu6_enableTrapPin (Ifx_CCU6 *ccu6)
Enables the input (pin) function for the trap generation. More...
IFX_INLINE void | IfxCcu6_setCaptureCompareInputSignal (Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareInput input, IfxCcu6_CaptureCompareInputSignal signal)
selects the actual input signal for the capture compare inputs. More...
IFX_EXTERN void | IfxCcu6_disableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
IFX_EXTERN void | IfxCcu6_disableModule (Ifx_CCU6 *ccu6)
Disables the selected CCU6 kernel. More...
IFX_EXTERN void | IfxCcu6_enableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
IFX_EXTERN void | IfxCcu6_enableModule (Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel. More...

Detailed Description

Function Documentation

◆ IfxCcu6_clearAllInterruptStatusFlags()

IFX_INLINE void IfxCcu6_clearAllInterruptStatusFlags ( Ifx_CCU6 * ccu6 )

Clears all Interrupt flags.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1396 of file IfxCcu6.h.

◆ IfxCcu6_disableAdditionalPrescaler()

IFX_INLINE void IfxCcu6_disableAdditionalPrescaler | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Disables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1443 of file IfxCcu6.h.

◆ IfxCcu6_disableDeadTime()

IFX_INLINE void IfxCcu6_disableDeadTime | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Disables the dead time generation for each compare channel (0, 1, 2) of Timer12.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
None

Definition at line 1451 of file IfxCcu6.h.

◆ IfxCcu6_disableDelayBypass()

IFX_INLINE void IfxCcu6_disableDelayBypass ( Ifx_CCU6 * ccu6 )

Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC)

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1459 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_disableInterrupt()

IFX_INLINE void IfxCcu6_disableInterrupt | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source
 | ) |  |

Disables the selected interrupt.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
Returns
None

Definition at line 1465 of file IfxCcu6.h.

◆ IfxCcu6_disableModulationOutput()

IFX_EXTERN void IfxCcu6_disableModulationOutput | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer,
 |  | IfxCcu6_ChannelOut | channelOut
 | ) |  |

Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
channelOut | Capture compare output selection
Returns
None

Definition at line 70 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_stop(), IfxCcu6_TPwm_pause(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_disableModule()

IFX_EXTERN void IfxCcu6_disableModule ( Ifx_CCU6 * ccu6 )

Disables the selected CCU6 kernel.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 101 of file IfxCcu6.c.

◆ IfxCcu6_disableMultiChannelMode()

IFX_INLINE void IfxCcu6_disableMultiChannelMode ( Ifx_CCU6 * ccu6 )

Sets multi channel mode unavailable, A write access to MCMOUTS is ignored.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1472 of file IfxCcu6.h.

◆ IfxCcu6_disableShadowTransfer()

IFX_INLINE void IfxCcu6_disableShadowTransfer | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

Disables shadow transfers of the timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 choice (enable / disable)
t13 | Timer13 choice (enable / disable)
Returns
None

Definition at line 1478 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_stop(), IfxCcu6_Timer_stop(), IfxCcu6_Timer_synchronousStop(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_disableSingleShotMode()

IFX_INLINE void IfxCcu6_disableSingleShotMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Disables the single shot-mode of Timers (T12 T13).

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1488 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_setSingleMode().

◆ IfxCcu6_disableT13InvertedModulation()

IFX_INLINE void IfxCcu6_disableT13InvertedModulation ( Ifx_CCU6 * ccu6 )

Disables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1495 of file IfxCcu6.h.

◆ IfxCcu6_disableTimer()

IFX_INLINE void IfxCcu6_disableTimer | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Sets Timer12 block unavailable, A write access to T12PR is ignored.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1501 of file IfxCcu6.h.

◆ IfxCcu6_disableTrap()

IFX_INLINE void IfxCcu6_disableTrap | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_ChannelOut | channelOut
 | ) |  |

Disables the trap functionality for the corresponding output signals.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channelOut | Capture compare output selection
Returns
None

Definition at line 1508 of file IfxCcu6.h.

◆ IfxCcu6_disableTrapPin()

IFX_INLINE void IfxCcu6_disableTrapPin ( Ifx_CCU6 * ccu6 )

Disables the input (pin) function for the trap generation.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1516 of file IfxCcu6.h.

◆ IfxCcu6_enableAdditionalPrescaler()

IFX_INLINE void IfxCcu6_enableAdditionalPrescaler | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1522 of file IfxCcu6.h.

Referenced by IfxCcu6_setT12Frequency(), and IfxCcu6_setT13Frequency().

◆ IfxCcu6_enableCountEvent()

IFX_INLINE void IfxCcu6_enableCountEvent | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

Sets the single shot-mode of Timers (T12, T13).

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 choice (enable / disable)
t13 | Timer13 choice (enable / disable)
Returns
None

Definition at line 1530 of file IfxCcu6.h.

Referenced by IfxCcu6_Timer_countOneStep().

◆ IfxCcu6_enableDeadTime()

IFX_INLINE void IfxCcu6_enableDeadTime | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Enables the dead time generation for each compare channel (0, 1, 2) of Timer12.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
None

Definition at line 1540 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_enableDelayBypass()

IFX_INLINE void IfxCcu6_enableDelayBypass ( Ifx_CCU6 * ccu6 )

Enables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) by the Dead-Time Counter 0.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1548 of file IfxCcu6.h.

◆ IfxCcu6_enableHallPatternShadowTransfer()

IFX_INLINE void IfxCcu6_enableHallPatternShadowTransfer ( Ifx_CCU6 * ccu6 )

Sets HP_ST immediately to update bit fields EXPH and CURH by EXPHS and CURHS.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1554 of file IfxCcu6.h.

◆ IfxCcu6_enableInterrupt()

IFX_INLINE void IfxCcu6_enableInterrupt | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source
 | ) |  |

Enables the selected interrupt.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
Returns
None

Definition at line 1560 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_enableModulationOutput()

IFX_EXTERN void IfxCcu6_enableModulationOutput | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer,
 |  | IfxCcu6_ChannelOut | channelOut
 | ) |  |

Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
channelOut | Capture compare output selection
Returns
None

Definition at line 114 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), and IfxCcu6_TPwm_resume().

◆ IfxCcu6_enableModule()

IFX_EXTERN void IfxCcu6_enableModule ( Ifx_CCU6 * ccu6 )

Enables the selected CCU6 kernel.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 145 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_enableMultiChannelMode()

IFX_INLINE void IfxCcu6_enableMultiChannelMode ( Ifx_CCU6 * ccu6 )

Sets multi channel mode available, A write access to MCMOUTS is executed.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1567 of file IfxCcu6.h.

◆ IfxCcu6_enableMultiChannelModeAvailability()

IFX_INLINE void IfxCcu6_enableMultiChannelModeAvailability ( Ifx_CCU6 * ccu6 )

Enables the Multi Channel Mode Availability.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1573 of file IfxCcu6.h.

◆ IfxCcu6_enableMultiChannelPwmPatternShadowTransfer()

IFX_INLINE void IfxCcu6_enableMultiChannelPwmPatternShadowTransfer ( Ifx_CCU6 * ccu6 )

Sets MCM_ST immediately to update bit field MCMP by the value of MCMPS.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1579 of file IfxCcu6.h.

◆ IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer()

IFX_INLINE void IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer ( Ifx_CCU6 * ccu6 )

Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 one match is detected while counting down.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1585 of file IfxCcu6.h.

◆ IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer()

IFX_INLINE void IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer ( Ifx_CCU6 * ccu6 )

Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 period match is detected while counting up.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1591 of file IfxCcu6.h.

◆ IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer()

IFX_INLINE void IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer ( Ifx_CCU6 * ccu6 )

Enables the shadow transfer T13_ST if flag MCMOUT.R is set or
becomes set while a T13 period match is detected.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1597 of file IfxCcu6.h.

◆ IfxCcu6_enableShadowTransfer()

IFX_INLINE void IfxCcu6_enableShadowTransfer | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

Enables shadow transfers of the timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 choice (enable / disable)
t13 | Timer13 choice (enable / disable)
Returns
None

Definition at line 1603 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_startCapture(), IfxCcu6_PwmBc_start(), IfxCcu6_setT12Frequency(), IfxCcu6_setT13Frequency(), IfxCcu6_Timer_countOneStep(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_synchronousStart(), IfxCcu6_TimerWithTrigger_applyUpdate(), and IfxCcu6_TPwm_start().

◆ IfxCcu6_enableSingleShotMode()

IFX_INLINE void IfxCcu6_enableSingleShotMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Enables the single shot-mode of Timers (T12 T13).

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1613 of file IfxCcu6.h.

Referenced by IfxCcu6_Timer_startSingleShotMode(), and IfxCcu6_TimerWithTrigger_setSingleMode().

◆ IfxCcu6_enableT13InvertedModulation()

IFX_INLINE void IfxCcu6_enableT13InvertedModulation ( Ifx_CCU6 * ccu6 )

Enables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1620 of file IfxCcu6.h.

◆ IfxCcu6_enableTimer()

IFX_INLINE void IfxCcu6_enableTimer | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Sets Timer12 block available, A write access to T12PR is executed.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1626 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_enableTrap()

IFX_INLINE void IfxCcu6_enableTrap | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_ChannelOut | channelOut
 | ) |  |

Enables the trap functionality for the corresponding output signals.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channelOut | Capture compare output selection
Returns
None

Definition at line 1633 of file IfxCcu6.h.

◆ IfxCcu6_enableTrapPin()

IFX_INLINE void IfxCcu6_enableTrapPin ( Ifx_CCU6 * ccu6 )

Enables the input (pin) function for the trap generation.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1641 of file IfxCcu6.h.

◆ IfxCcu6_setCaptureCompareInputSignal()

IFX_INLINE void IfxCcu6_setCaptureCompareInputSignal | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_CaptureCompareInput | input,
 |  | IfxCcu6_CaptureCompareInputSignal | signal
 | ) |  |

selects the actual input signal for the capture compare inputs.

Parameters
ccu6 | Pointer to the base of CCU6 registers
input | Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )
signal | selection of actual input signal for the module inputs
Returns
None

Definition at line 1950 of file IfxCcu6.h.

Referenced by IfxCcu6_initCc60InPin(), IfxCcu6_initCc60InPinWithPadLevel(), IfxCcu6_initCc61InPin(), IfxCcu6_initCc61InPinWithPadLevel(), IfxCcu6_initCc62InPin(), IfxCcu6_initCc62InPinWithPadLevel(), IfxCcu6_initCcpos0Pin(), IfxCcu6_initCcpos0PinWithPadLevel(), IfxCcu6_initCcpos1Pin(), IfxCcu6_initCcpos1PinWithPadLevel(), IfxCcu6_initCcpos2Pin(), IfxCcu6_initCcpos2PinWithPadLevel(), IfxCcu6_initCtrapPin(), and IfxCcu6_initCtrapPinWithPadLevel().


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » CCU6 » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxCcu6_initCc60InPin (const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode)
Initialises a CC60 input pin. More...
IFX_INLINE void | IfxCcu6_initCc60OutPin (const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin. More...
IFX_INLINE void | IfxCcu6_initCc61InPin (const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode)
Initialises a CC61 input pin. More...
IFX_INLINE void | IfxCcu6_initCc61OutPin (const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin. More...
IFX_INLINE void | IfxCcu6_initCc62InPin (const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode)
Initialises a CC62 input pin. More...
IFX_INLINE void | IfxCcu6_initCc62OutPin (const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin. More...
IFX_INLINE void | IfxCcu6_initCcpos0Pin (const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin. More...
IFX_INLINE void | IfxCcu6_initCcpos1Pin (const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode)
Initialises a CCPOS1 input pin. More...
IFX_INLINE void | IfxCcu6_initCcpos2Pin (const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin. More...
IFX_INLINE void | IfxCcu6_initCout60Pin (const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin. More...
IFX_INLINE void | IfxCcu6_initCout61Pin (const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin. More...
IFX_INLINE void | IfxCcu6_initCout62Pin (const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin. More...
IFX_INLINE void | IfxCcu6_initCout63Pin (const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin. More...
IFX_INLINE void | IfxCcu6_initCtrapPin (const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode)
Initialises a CTRAP input pin. More...
IFX_INLINE void | IfxCcu6_initT12hrPin (const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin. More...
IFX_INLINE void | IfxCcu6_initT13hrPin (const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin. More...

Detailed Description

Function Documentation

◆ IfxCcu6_initCc60InPin()

IFX_INLINE void IfxCcu6_initCc60InPin | ( | const IfxCcu6_Cc60in_In * | cc60In,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CC60 input pin.

Parameters
cc60In | CC60 capture input CC60IN
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1730 of file IfxCcu6.h.

◆ IfxCcu6_initCc60OutPin()

IFX_INLINE void IfxCcu6_initCc60OutPin | ( | const IfxCcu6_Cc60_Out * | cc60Out,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a CC60 output pin.

Parameters
cc60Out | CC60 compare output CC0
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1745 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCc61InPin()

IFX_INLINE void IfxCcu6_initCc61InPin | ( | const IfxCcu6_Cc61in_In * | cc61In,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CC61 input pin.

Parameters
cc61In | CC61 capture input CC61IN
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1752 of file IfxCcu6.h.

◆ IfxCcu6_initCc61OutPin()

IFX_INLINE void IfxCcu6_initCc61OutPin | ( | const IfxCcu6_Cc61_Out * | cc61Out,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a CC61 output pin.

Parameters
cc61Out | CC61 compare output CC1
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1767 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCc62InPin()

IFX_INLINE void IfxCcu6_initCc62InPin | ( | const IfxCcu6_Cc62in_In * | cc62In,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CC62 input pin.

Parameters
cc62In | CC62 capture input CC62IN
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1774 of file IfxCcu6.h.

◆ IfxCcu6_initCc62OutPin()

IFX_INLINE void IfxCcu6_initCc62OutPin | ( | const IfxCcu6_Cc62_Out * | cc62Out,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a CC62 output pin.

Parameters
cc62Out | CC62 compare output CC2
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1789 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCcpos0Pin()

IFX_INLINE void IfxCcu6_initCcpos0Pin | ( | const IfxCcu6_Ccpos0_In * | ccpos0,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CCPOS0 input pin.

Parameters
ccpos0 | CC60 capture input CCPOS0
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1796 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_initCcpos1Pin()

IFX_INLINE void IfxCcu6_initCcpos1Pin | ( | const IfxCcu6_Ccpos1_In * | ccpos1,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CCPOS1 input pin.

Parameters
ccpos1 | CC61 capture input CCPOS1
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1811 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_initCcpos2Pin()

IFX_INLINE void IfxCcu6_initCcpos2Pin | ( | const IfxCcu6_Ccpos2_In * | ccpos2,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CCPOS0 input pin.

Parameters
ccpos2 | CC62 capture input CCPOS2
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1826 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_initCout60Pin()

IFX_INLINE void IfxCcu6_initCout60Pin | ( | const IfxCcu6_Cout60_Out * | cout60,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a COUT60 output pin.

Parameters
cout60 | CC60 compare output COUT0
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1841 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCout61Pin()

IFX_INLINE void IfxCcu6_initCout61Pin | ( | const IfxCcu6_Cout61_Out * | cout61,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a COUT61 output pin.

Parameters
cout61 | CC61 compare output COUT1
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1848 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCout62Pin()

IFX_INLINE void IfxCcu6_initCout62Pin | ( | const IfxCcu6_Cout62_Out * | cout62,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a COUT62 output pin.

Parameters
cout62 | CC62 compare output COUT2
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1855 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCout63Pin()

IFX_INLINE void IfxCcu6_initCout63Pin | ( | const IfxCcu6_Cout63_Out * | cout63,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a COUT63 output pin.

Parameters
cout63 | CC63 compare output COUT3
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1862 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCtrapPin()

IFX_INLINE void IfxCcu6_initCtrapPin | ( | const IfxCcu6_Ctrap_In * | ctrap,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CTRAP input pin.

Parameters
ctrap | CTRAP input
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1869 of file IfxCcu6.h.

◆ IfxCcu6_initT12hrPin()

IFX_INLINE void IfxCcu6_initT12hrPin | ( | const IfxCcu6_T12hr_In * | t12hrIn,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a T12HR input pin.

Parameters
t12hrIn | Timer 12 HR input T12HR
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1884 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initT13hrPin()

IFX_INLINE void IfxCcu6_initT13hrPin | ( | const IfxCcu6_T13hr_In * | t13hrIn,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a T13HR input pin.

Parameters
t13hrIn | Timer 12 HR input T12HR
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1899 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().


iLLD_TC26B: CCU6 Pin Mapping

Data Structures | Macros | Variables
CCU6 Pin Mapping
iLLD » CCU6
Collaboration diagram for CCU6 Pin Mapping:

Data Structures

struct | IfxCcu6_Cc60in_In
CC60IN pin mapping structure. More...
struct | IfxCcu6_Cc61in_In
CC61IN pin mapping structure. More...
struct | IfxCcu6_Cc62in_In
CC62IN pin mapping structure. More...
struct | IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure. More...
struct | IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure. More...
struct | IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure. More...
struct | IfxCcu6_Ctrap_In
CTRAP pin mapping structure. More...
struct | IfxCcu6_T12hr_In
T12HR pin mapping structure. More...
struct | IfxCcu6_T13hr_In
T13HR pin mapping structure. More...
struct | IfxCcu6_Cc60_Out
CC60 pin mapping structure. More...
struct | IfxCcu6_Cc61_Out
CC61 pin mapping structure. More...
struct | IfxCcu6_Cc62_Out
CC62 pin mapping structure. More...
struct | IfxCcu6_Cout60_Out
COUT60 pin mapping structure. More...
struct | IfxCcu6_Cout61_Out
COUT61 pin mapping structure. More...
struct | IfxCcu6_Cout62_Out
COUT62 pin mapping structure. More...
struct | IfxCcu6_Cout63_Out
COUT63 pin mapping structure. More...

Macros

#define | IFXCCU6_PINMAP_NUM_MODULES 2
Table dimensions. More...
#define | IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS 5
#define | IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS 3

Variables

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT
CCU60_CC60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT
CCU60_CC60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT
CCU60_CC60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT
CCU60_CC60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT
CCU61_CC60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT
CCU61_CC60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT
CCU61_CC60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT
CCU61_CC60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN
CCU60_CC60INA: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN
CCU60_CC60INB: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN
CCU60_CC60INC: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN
CCU61_CC60INA: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN
CCU61_CC60INB: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN
CCU61_CC60INC: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT
CCU60_CC61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT
CCU60_CC61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT
CCU60_CC61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT
CCU60_CC61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT
CCU61_CC61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT
CCU61_CC61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT
CCU61_CC61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT
CCU61_CC61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN
CCU60_CC61INA: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN
CCU60_CC61INB: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN
CCU60_CC61INC: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN
CCU61_CC61INA: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN
CCU61_CC61INB: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN
CCU61_CC61INC: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT
CCU60_CC62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT
CCU60_CC62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT
CCU60_CC62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT
CCU60_CC62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT
CCU61_CC62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT
CCU61_CC62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT
CCU61_CC62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT
CCU61_CC62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN
CCU60_CC62INA: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN
CCU60_CC62INB: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN
CCU60_CC62INC: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN
CCU61_CC62INA: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN
CCU61_CC62INB: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN
CCU61_CC62INC: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN
CCU60_CCPOS0A: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN
CCU60_CCPOS0C: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN
CCU60_CCPOS0D: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN
CCU61_CCPOS0A: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN
CCU61_CCPOS0C: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN
CCU60_CCPOS1A: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN
CCU60_CCPOS1B: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN
CCU60_CCPOS1C: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN
CCU60_CCPOS1D: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN
CCU61_CCPOS1A: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN
CCU61_CCPOS1B: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN
CCU61_CCPOS1C: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN
CCU61_CCPOS1D: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN
CCU60_CCPOS2A: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN
CCU60_CCPOS2B: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN
CCU60_CCPOS2C: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN
CCU61_CCPOS2A: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN
CCU61_CCPOS2B: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN
CCU61_CCPOS2C: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN
CCU61_CCPOS2D: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT
CCU60_COUT60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT
CCU60_COUT60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT
CCU60_COUT60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT
CCU61_COUT60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT
CCU61_COUT60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT
CCU61_COUT60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT
CCU60_COUT61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT
CCU60_COUT61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT
CCU60_COUT61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT
CCU61_COUT61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT
CCU61_COUT61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT
CCU61_COUT61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT
CCU60_COUT62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT
CCU60_COUT62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT
CCU60_COUT62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT
CCU61_COUT62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT
CCU61_COUT62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT
CCU61_COUT62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT
CCU60_COUT63: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT
CCU60_COUT63: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT
CCU60_COUT63: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT
CCU60_COUT63: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT
CCU61_COUT63: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT
CCU61_COUT63: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT
CCU61_COUT63: CCU61 output. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN
CCU60_CTRAPA: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN
CCU61_CTRAPA: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN
CCU61_CTRAPC: CCU61 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN
CCU60_T12HRB: CCU60 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN
CCU60_T12HRC: CCU60 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN
CCU60_T12HRE: CCU60 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN
CCU61_T12HRB: CCU61 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN
CCU61_T12HRC: CCU61 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN
CCU61_T12HRE: CCU61 input. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN
CCU60_T13HRB: CCU60 input. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN
CCU60_T13HRC: CCU60 input. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN
CCU61_T13HRB: CCU61 input. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN
CCU61_T13HRC: CCU61 input. More...
IFX_EXTERN const IfxCcu6_Cc60_Out * | IfxCcu6_Cc60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
IfxCcu6_Cc60_Out table. More...
IFX_EXTERN const IfxCcu6_Cc60in_In * | IfxCcu6_Cc60in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
IfxCcu6_Cc60in_In table. More...
IFX_EXTERN const IfxCcu6_Cc61_Out * | IfxCcu6_Cc61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
IfxCcu6_Cc61_Out table. More...
IFX_EXTERN const IfxCcu6_Cc61in_In * | IfxCcu6_Cc61in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
IfxCcu6_Cc61in_In table. More...
IFX_EXTERN const IfxCcu6_Cc62_Out * | IfxCcu6_Cc62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
IfxCcu6_Cc62_Out table. More...
IFX_EXTERN const IfxCcu6_Cc62in_In * | IfxCcu6_Cc62in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
IfxCcu6_Cc62in_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos0_In * | IfxCcu6_Ccpos0_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
IfxCcu6_Ccpos0_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos1_In * | IfxCcu6_Ccpos1_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
IfxCcu6_Ccpos1_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos2_In * | IfxCcu6_Ccpos2_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
IfxCcu6_Ccpos2_In table. More...
IFX_EXTERN const IfxCcu6_Cout60_Out * | IfxCcu6_Cout60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
IfxCcu6_Cout60_Out table. More...
IFX_EXTERN const IfxCcu6_Cout61_Out * | IfxCcu6_Cout61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
IfxCcu6_Cout61_Out table. More...
IFX_EXTERN const IfxCcu6_Cout62_Out * | IfxCcu6_Cout62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
IfxCcu6_Cout62_Out table. More...
IFX_EXTERN const IfxCcu6_Cout63_Out * | IfxCcu6_Cout63_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
IfxCcu6_Cout63_Out table. More...
IFX_EXTERN const IfxCcu6_Ctrap_In * | IfxCcu6_Ctrap_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
IfxCcu6_Ctrap_In table. More...
IFX_EXTERN const IfxCcu6_T12hr_In * | IfxCcu6_T12hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
IfxCcu6_T12hr_In table. More...
IFX_EXTERN const IfxCcu6_T13hr_In * | IfxCcu6_T13hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]
IfxCcu6_T13hr_In table. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_Cc60in_In

struct IfxCcu6_Cc60in_In

CC60IN pin mapping structure.

Definition at line 56 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc60in_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Cc61in_In

struct IfxCcu6_Cc61in_In

CC61IN pin mapping structure.

Definition at line 64 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc61in_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Cc62in_In

struct IfxCcu6_Cc62in_In

CC62IN pin mapping structure.

Definition at line 72 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc62in_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Ccpos0_In

struct IfxCcu6_Ccpos0_In

CCPOS0 pin mapping structure.

Definition at line 80 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Ccpos0_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Ccpos1_In

struct IfxCcu6_Ccpos1_In

CCPOS1 pin mapping structure.

Definition at line 88 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Ccpos1_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Ccpos2_In

struct IfxCcu6_Ccpos2_In

CCPOS2 pin mapping structure.

Definition at line 96 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Ccpos2_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Ctrap_In

struct IfxCcu6_Ctrap_In

CTRAP pin mapping structure.

Definition at line 104 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Ctrap_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_T12hr_In

struct IfxCcu6_T12hr_In

T12HR pin mapping structure.

Definition at line 112 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_T12hr_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_T13hr_In

struct IfxCcu6_T13hr_In

T13HR pin mapping structure.

Definition at line 120 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_T13hr_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Cc60_Out

struct IfxCcu6_Cc60_Out

CC60 pin mapping structure.

Definition at line 128 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc60_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cc61_Out

struct IfxCcu6_Cc61_Out

CC61 pin mapping structure.

Definition at line 136 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc61_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cc62_Out

struct IfxCcu6_Cc62_Out

CC62 pin mapping structure.

Definition at line 144 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc62_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cout60_Out

struct IfxCcu6_Cout60_Out

COUT60 pin mapping structure.

Definition at line 152 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cout60_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cout61_Out

struct IfxCcu6_Cout61_Out

COUT61 pin mapping structure.

Definition at line 160 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cout61_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cout62_Out

struct IfxCcu6_Cout62_Out

COUT62 pin mapping structure.

Definition at line 168 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cout62_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cout63_Out

struct IfxCcu6_Cout63_Out

COUT63 pin mapping structure.

Definition at line 176 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cout63_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS 4

Definition at line 286 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS 3

Definition at line 287 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS 4

Definition at line 288 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS 3

Definition at line 289 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS 4

Definition at line 290 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS 3

Definition at line 291 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS 4

Definition at line 292 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS 4

Definition at line 293 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS 4

Definition at line 294 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS 3

Definition at line 295 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS 3

Definition at line 296 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS 3

Definition at line 297 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS 4

Definition at line 298 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS 3

Definition at line 299 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_NUM_MODULES

#define IFXCCU6_PINMAP_NUM_MODULES 2

Table dimensions.

Definition at line 285 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS 5

Definition at line 300 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS 3

Definition at line 301 of file IfxCcu6_PinMap.h.

Variable Documentation

◆ IfxCcu60_CC60_P02_0_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT

CCU60_CC60: CCU60 output.

Definition at line 183 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60_P02_6_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT

CCU60_CC60: CCU60 output.

Definition at line 184 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60_P11_12_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT

CCU60_CC60: CCU60 output.

Definition at line 185 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60_P15_6_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT

CCU60_CC60: CCU60 output.

Definition at line 186 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60INA_P02_0_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN

CCU60_CC60INA: CCU60 input.

Definition at line 191 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60INB_P00_1_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN

CCU60_CC60INB: CCU60 input.

Definition at line 192 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60INC_P02_6_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN

CCU60_CC60INC: CCU60 input.

Definition at line 193 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61_P02_2_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT

CCU60_CC61: CCU60 output.

Definition at line 197 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61_P02_7_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT

CCU60_CC61: CCU60 output.

Definition at line 198 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61_P11_11_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT

CCU60_CC61: CCU60 output.

Definition at line 199 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61_P15_5_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT

CCU60_CC61: CCU60 output.

Definition at line 200 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61INA_P02_2_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN

CCU60_CC61INA: CCU60 input.

Definition at line 205 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61INB_P00_3_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN

CCU60_CC61INB: CCU60 input.

Definition at line 206 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61INC_P02_7_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN

CCU60_CC61INC: CCU60 input.

Definition at line 207 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62_P02_4_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT

CCU60_CC62: CCU60 output.

Definition at line 211 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62_P02_8_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT

CCU60_CC62: CCU60 output.

Definition at line 212 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62_P11_10_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT

CCU60_CC62: CCU60 output.

Definition at line 213 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62_P15_4_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT

CCU60_CC62: CCU60 output.

Definition at line 214 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62INA_P02_4_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN

CCU60_CC62INA: CCU60 input.

Definition at line 219 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62INB_P00_5_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN

CCU60_CC62INB: CCU60 input.

Definition at line 220 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62INC_P02_8_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN

CCU60_CC62INC: CCU60 input.

Definition at line 221 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS0A_P02_6_IN

IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN

CCU60_CCPOS0A: CCU60 input.

Definition at line 225 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS0C_P10_4_IN

IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN

CCU60_CCPOS0C: CCU60 input.

Definition at line 226 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS0D_P40_0_IN

IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN

CCU60_CCPOS0D: CCU60 input.

Definition at line 227 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS1A_P02_7_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN

CCU60_CCPOS1A: CCU60 input.

Definition at line 230 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS1B_P40_1_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN

CCU60_CCPOS1B: CCU60 input.

Definition at line 231 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS1C_P10_7_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN

CCU60_CCPOS1C: CCU60 input.

Definition at line 232 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS1D_P40_2_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN

CCU60_CCPOS1D: CCU60 input.

Definition at line 233 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS2A_P02_8_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN

CCU60_CCPOS2A: CCU60 input.

Definition at line 238 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS2B_P40_3_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN

CCU60_CCPOS2B: CCU60 input.

Definition at line 239 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS2C_P10_8_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN

CCU60_CCPOS2C: CCU60 input.

Definition at line 240 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT60_P02_1_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT

CCU60_COUT60: CCU60 output.

Definition at line 245 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT60_P11_9_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT

CCU60_COUT60: CCU60 output.

Definition at line 246 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT60_P15_7_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT

CCU60_COUT60: CCU60 output.

Definition at line 247 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT61_P02_3_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT

CCU60_COUT61: CCU60 output.

Definition at line 251 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT61_P11_6_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT

CCU60_COUT61: CCU60 output.

Definition at line 252 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT61_P15_8_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT

CCU60_COUT61: CCU60 output.

Definition at line 253 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT62_P02_5_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT

CCU60_COUT62: CCU60 output.

Definition at line 257 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT62_P11_3_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT

CCU60_COUT62: CCU60 output.

Definition at line 258 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT62_P14_0_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT

CCU60_COUT62: CCU60 output.

Definition at line 259 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT63_P00_0_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT

CCU60_COUT63: CCU60 output.

Definition at line 263 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT63_P11_2_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT

CCU60_COUT63: CCU60 output.

Definition at line 264 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT63_P14_1_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT

CCU60_COUT63: CCU60 output.

Definition at line 265 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT63_P32_4_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT

CCU60_COUT63: CCU60 output.

Definition at line 266 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CTRAPA_P00_11_IN

IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN

CCU60_CTRAPA: CCU60 input.

Definition at line 270 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_T12HRB_P00_7_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN

CCU60_T12HRB: CCU60 input.

Definition at line 273 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_T12HRC_P00_9_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN

CCU60_T12HRC: CCU60 input.

Definition at line 274 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_T12HRE_P00_0_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN

CCU60_T12HRE: CCU60 input.

Definition at line 275 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_T13HRB_P00_8_IN

IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN

CCU60_T13HRB: CCU60 input.

Definition at line 279 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_T13HRC_P00_9_IN

IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN

CCU60_T13HRC: CCU60 input.

Definition at line 280 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60_P00_1_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT

CCU61_CC60: CCU61 output.

Definition at line 187 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60_P00_7_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT

CCU61_CC60: CCU61 output.

Definition at line 188 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60_P20_8_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT

CCU61_CC60: CCU61 output.

Definition at line 189 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60_P33_13_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT

CCU61_CC60: CCU61 output.

Definition at line 190 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60INA_P00_1_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN

CCU61_CC60INA: CCU61 input.

Definition at line 194 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60INB_P02_0_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN

CCU61_CC60INB: CCU61 input.

Definition at line 195 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60INC_P00_7_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN

CCU61_CC60INC: CCU61 input.

Definition at line 196 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61_P00_3_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT

CCU61_CC61: CCU61 output.

Definition at line 201 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61_P00_8_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT

CCU61_CC61: CCU61 output.

Definition at line 202 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61_P20_9_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT

CCU61_CC61: CCU61 output.

Definition at line 203 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61_P33_11_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT

CCU61_CC61: CCU61 output.

Definition at line 204 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61INA_P00_3_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN

CCU61_CC61INA: CCU61 input.

Definition at line 208 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61INB_P02_2_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN

CCU61_CC61INB: CCU61 input.

Definition at line 209 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61INC_P00_8_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN

CCU61_CC61INC: CCU61 input.

Definition at line 210 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62_P00_5_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT

CCU61_CC62: CCU61 output.

Definition at line 215 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62_P00_9_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT

CCU61_CC62: CCU61 output.

Definition at line 216 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62_P20_10_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT

CCU61_CC62: CCU61 output.

Definition at line 217 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62_P33_9_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT

CCU61_CC62: CCU61 output.

Definition at line 218 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62INA_P00_5_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN

CCU61_CC62INA: CCU61 input.

Definition at line 222 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62INB_P02_4_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN

CCU61_CC62INB: CCU61 input.

Definition at line 223 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62INC_P00_9_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN

CCU61_CC62INC: CCU61 input.

Definition at line 224 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS0A_P00_7_IN

IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN

CCU61_CCPOS0A: CCU61 input.

Definition at line 228 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS0C_P33_7_IN

IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN

CCU61_CCPOS0C: CCU61 input.

Definition at line 229 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS1A_P00_8_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN

CCU61_CCPOS1A: CCU61 input.

Definition at line 234 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS1B_P40_6_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN

CCU61_CCPOS1B: CCU61 input.

Definition at line 235 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS1C_P33_6_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN

CCU61_CCPOS1C: CCU61 input.

Definition at line 236 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS1D_P40_7_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN

CCU61_CCPOS1D: CCU61 input.

Definition at line 237 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS2A_P00_9_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN

CCU61_CCPOS2A: CCU61 input.

Definition at line 241 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS2B_P40_8_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN

CCU61_CCPOS2B: CCU61 input.

Definition at line 242 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS2C_P33_5_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN

CCU61_CCPOS2C: CCU61 input.

Definition at line 243 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS2D_P40_9_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN

CCU61_CCPOS2D: CCU61 input.

Definition at line 244 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT60_P00_2_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT

CCU61_COUT60: CCU61 output.

Definition at line 248 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT60_P20_11_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT

CCU61_COUT60: CCU61 output.

Definition at line 249 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT60_P33_12_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT

CCU61_COUT60: CCU61 output.

Definition at line 250 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT61_P00_4_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT

CCU61_COUT61: CCU61 output.

Definition at line 254 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT61_P20_12_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT

CCU61_COUT61: CCU61 output.

Definition at line 255 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT61_P33_10_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT

CCU61_COUT61: CCU61 output.

Definition at line 256 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT62_P00_6_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT

CCU61_COUT62: CCU61 output.

Definition at line 260 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT62_P20_13_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT

CCU61_COUT62: CCU61 output.

Definition at line 261 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT62_P33_8_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT

CCU61_COUT62: CCU61 output.

Definition at line 262 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT63_P00_10_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT

CCU61_COUT63: CCU61 output.

Definition at line 267 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT63_P00_12_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT

CCU61_COUT63: CCU61 output.

Definition at line 268 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT63_P20_7_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT

CCU61_COUT63: CCU61 output.

Definition at line 269 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CTRAPA_P00_0_IN

IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN

CCU61_CTRAPA: CCU61 input.

Definition at line 271 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CTRAPC_P33_4_IN

IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN

CCU61_CTRAPC: CCU61 input.

Definition at line 272 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_T12HRB_P02_6_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN

CCU61_T12HRB: CCU61 input.

Definition at line 276 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_T12HRC_P02_8_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN

CCU61_T12HRC: CCU61 input.

Definition at line 277 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_T12HRE_P00_11_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN

CCU61_T12HRE: CCU61 input.

Definition at line 278 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_T13HRB_P02_7_IN

IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN

CCU61_T13HRB: CCU61 input.

Definition at line 281 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_T13HRC_P02_8_IN

IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN

CCU61_T13HRC: CCU61 input.

Definition at line 282 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc60_Out_pinTable

IFX_EXTERN const IfxCcu6_Cc60_Out* IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]

IfxCcu6_Cc60_Out table.

Definition at line 305 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc60in_In_pinTable

IFX_EXTERN const IfxCcu6_Cc60in_In* IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]

IfxCcu6_Cc60in_In table.

Definition at line 308 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc61_Out_pinTable

IFX_EXTERN const IfxCcu6_Cc61_Out* IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]

IfxCcu6_Cc61_Out table.

Definition at line 311 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc61in_In_pinTable

IFX_EXTERN const IfxCcu6_Cc61in_In* IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]

IfxCcu6_Cc61in_In table.

Definition at line 314 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc62_Out_pinTable

IFX_EXTERN const IfxCcu6_Cc62_Out* IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]

IfxCcu6_Cc62_Out table.

Definition at line 317 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc62in_In_pinTable

IFX_EXTERN const IfxCcu6_Cc62in_In* IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]

IfxCcu6_Cc62in_In table.

Definition at line 320 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Ccpos0_In_pinTable

IFX_EXTERN const IfxCcu6_Ccpos0_In* IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]

IfxCcu6_Ccpos0_In table.

Definition at line 323 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Ccpos1_In_pinTable

IFX_EXTERN const IfxCcu6_Ccpos1_In* IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]

IfxCcu6_Ccpos1_In table.

Definition at line 326 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Ccpos2_In_pinTable

IFX_EXTERN const IfxCcu6_Ccpos2_In* IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]

IfxCcu6_Ccpos2_In table.

Definition at line 329 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cout60_Out_pinTable

IFX_EXTERN const IfxCcu6_Cout60_Out* IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]

IfxCcu6_Cout60_Out table.

Definition at line 332 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cout61_Out_pinTable

IFX_EXTERN const IfxCcu6_Cout61_Out* IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]

IfxCcu6_Cout61_Out table.

Definition at line 335 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cout62_Out_pinTable

IFX_EXTERN const IfxCcu6_Cout62_Out* IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]

IfxCcu6_Cout62_Out table.

Definition at line 338 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cout63_Out_pinTable

IFX_EXTERN const IfxCcu6_Cout63_Out* IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]

IfxCcu6_Cout63_Out table.

Definition at line 341 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Ctrap_In_pinTable

IFX_EXTERN const IfxCcu6_Ctrap_In* IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]

IfxCcu6_Ctrap_In table.

Definition at line 344 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_T12hr_In_pinTable

IFX_EXTERN const IfxCcu6_T12hr_In* IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]

IfxCcu6_T12hr_In table.

Definition at line 347 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_T13hr_In_pinTable

IFX_EXTERN const IfxCcu6_T13hr_In* IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]

IfxCcu6_T13hr_In table.

Definition at line 350 of file IfxCcu6_PinMap.h.


iLLD_TC26B: ICU Interface driver

Modules
ICU Interface driver
iLLD » CCU6
Collaboration diagram for ICU Interface driver:

Modules

How to use the CCU6 ICU Interface driver?
Data Structures
Module Initialize Functions
Capture Control Functions
Channel Initialize Functions

Detailed Description


iLLD_TC26B: How to use the CCU6 ICU Interface driver?

How to use the CCU6 ICU Interface driver?
iLLD » CCU6 » ICU Interface driver
Collaboration diagram for How to use the CCU6 ICU Interface driver?:

The ICU interface driver provides a default CCU6 configuration for capturing the input from the selected channel

User can select the various configuration options that hardware allows

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Ccu6/Icu/IfxCcu6_Icu.h>

Variables

Declare the ICU handle and channel handle as global variables in your C code:

// used globally
static IfxCcu6_Icu icu;
static IfxCcu6_IcuChannel icuChannel;

Interrupt Handler Installation

See also How to define Interrupts?

Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_CCU6 1

Add the interrupt service routine to your C code.

IFX_INTERRUPT(ccu60ISR_Icu, 0, IFX_INTPRIO_CCU6)
{
//user code
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&ccu60ISR_Icu, IFX_INTPRIO_CCU6);
IfxCpu_enableInterrupts();

Module Initialisation

The module can be initialised in two ways, as a stand alone driver or in conjunction with Timer driver The module initialisation can be done in the same function. Here an example:

// ---- when not using inconjunction with Timer driver ---- //
// create configuration
IfxCcu6_Icu_Config icuConfig;
IfxCcu6_Icu_initModuleConfig(&icuConfig, &MODULE_CCU60);
// configure the frequency of the timer in case of internal start
icuConfig.frequency = 400000;
// configure the period of the timer
icuConfig.period = 100;
// configure the clock for internal mode
icuConfig.clock.extClockEnabled = FALSE;
icuConfig.clock.extClockInput = NULL_PTR;
icuConfig.clock.countingInputMode = IfxCcu6_CountingInputMode_internal;
// configure count operation
icuConfig.countMode = IfxCcu6_T12CountMode_edgeAligned;
icuConfig.counterValue = 0;
// initialize the module
IfxCcu6_Icu_initModule(&icu, &icuConfig);
// -------------------------------------------------------- //
// ---- when not using inconjunction with Timer driver ---- //
// after initialising the timer
IfxCcu6_Timer timer;
IfxCcu6_TimerConfig timerConfig;
IfxCcu6_Timer_initModule(&timer, &timerConfig); // e.g. Timer 12 is specified previously in timerConfig.
// -------------------------------------------------------- //
// create Icu channel config
IfxCcu6_Icu_channelConfig icuChannelConfig;
IfxCcu6_Icu_initChannelConfig(&icuChannelConfig, &MODULE_CCU60);
// ---- when using inconjunction with Timer driver ---- //
icuChannelConfig.timer = (Timer*)&timer;
// ---------------------------------------------------- //
// configure the channel
icuChannelConfig.channelNumber = IfxCcu6_T12Channel_0;
icuChannelConfig.channelMode = IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising;
// configure the interrupts
icuChannelConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_cc60RisingEdge;
icuChannelConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
icuChannelConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
icuChannelConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
// ---- when not using inconjunction with Timer driver ---- //
// configure input and output triggers
icuChannelConfig.trigger.extInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
icuChannelConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
// -------------------------------------------------------- //
// pin configuration, in case of multi input capture mode select the respective CC6xIn and CCPOSxIn pins of the selected channel
const IfxCcu6_Icu_Pins pins = {
IfxCcu60_CC60INA_P02_0_IN, // CC60In pin
NULL, // CC61In pin not used
NULL, // CC62In pin not used
NULL, // CCPOS0In pin not used
NULL, // CCPOS1In pin not used
NULL, // CCPOS2In pin not used
IfxPort_InputMode_pullUp,
IfxPort_InputMode_pullUp
};
IcuConfig.pins = &pins;
// configure multi input capture mode
icuChannelConfig->multiInputCaptureEnabled = FALSE;
// initialize the channel
IfxCcu6_Icu_initChannel(&icuChannel, &icuChannelConfig);

The Icu is ready for use now!

Control

The ICU driver provides simple to use Capture Control functions

This means: you can start and stop the capture process, and you can also get a time stamp at any point of time during the capture process

Start Capture

IfxCcu6_Icu_startCapture(&icuChannel);

Stop Capture

IfxCcu6_Icu_stopCapture(&icuChannel);

Get time stamp at any point of time during the capture process (can also be used in ISR)

// assumed to be declared globally
// uint32 timeStamp[100] = 0;
// store the time stamp in an array
timeStamp[i] = IfxCcu6_Icu_getTimeStamp(&icuChannel);


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » ICU Interface driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCcu6_Icu_Clock
Structure for clock configuration. More...
struct | IfxCcu6_Icu_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_Icu_Pins
Structure for capture input pins. More...
struct | IfxCcu6_Icu_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_Icu
Module handle. More...
struct | IfxCcu6_Icu_Channel
Channel handle. More...
struct | IfxCcu6_Icu_ChannelConfig
Configuration structure of the channel. More...
struct | IfxCcu6_Icu_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_Icu_Clock

struct IfxCcu6_Icu_Clock

Structure for clock configuration.

Definition at line 247 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_Clock:
[legend]
Data Fields
IfxCcu6_CountingInputMode | countingInputMode | Input event leading to a counting action of the timer T12.
boolean | extClockEnabled | external clock enable / disable selection
IfxCcu6_T12hr_In * | extClockInput | External input signal selection for timer 12.

◆ IfxCcu6_Icu_InterruptConfig

struct IfxCcu6_Icu_InterruptConfig

Structure for interrupt configuration.

Definition at line 256 of file IfxCcu6_Icu.h.

Data Fields
uint16 | priority | Interrupt priority.
IfxCcu6_ServiceRequest | serviceRequest | Selection of service request outputs.
IfxCcu6_InterruptSource | source | Interrupt source selection.
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxCcu6_Icu_Pins

struct IfxCcu6_Icu_Pins

Structure for capture input pins.

Definition at line 266 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_Pins:
[legend]
Data Fields
IFX_CONST IfxCcu6_Cc60in_In * | cc60In | CC60 input signal.
IFX_CONST IfxCcu6_Cc61in_In * | cc61In | CC61 input signal.
IFX_CONST IfxCcu6_Cc62in_In * | cc62In | CC62 input signal.
IfxPort_InputMode | cc6xInputMode | The CC6x pin input mode which should be configured.
IFX_CONST IfxCcu6_Ccpos0_In * | ccpos0 | CCPOS0 input signal.
IFX_CONST IfxCcu6_Ccpos1_In * | ccpos1 | CCPOS2 input signal.
IFX_CONST IfxCcu6_Ccpos2_In * | ccpos2 | CCPOS2 input signal.
IfxPort_InputMode | ccposxInputMode | The CCPOSx pin input mode which should be configured.
IfxPort_PadDriver | pinDriver | Pad Driver.
IFX_CONST IfxCcu6_T12hr_In * | t12hr | T12HR input signal.
IFX_CONST IfxCcu6_T13hr_In * | t13hr | T13HR input signal.
IfxPort_InputMode | t1xhrInputMode | The T1xHR pin input mode which should be configured.

◆ IfxCcu6_Icu_TriggerConfig

struct IfxCcu6_Icu_TriggerConfig

Configuration structure for external triggers.

Definition at line 284 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_TriggerConfig:
[legend]
Data Fields
IfxCcu6_T12hr_In * | extInputTrigger | External input signal selection for timer.
IfxCcu6_ExternalTriggerMode | extInputTriggerMode | Event of signal T12HR that can set the run bit T12R by HW.

◆ IfxCcu6_Icu

struct IfxCcu6_Icu

Module handle.

Definition at line 296 of file IfxCcu6_Icu.h.

Data Fields
float32 | captureFrequency | Configured CCU6 capture frequency ( set to 0 for external counting mode)
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.

◆ IfxCcu6_Icu_Channel

struct IfxCcu6_Icu_Channel

Channel handle.

Definition at line 304 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_Channel:
[legend]
Data Fields
Icu | base | Base ICU object.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_T12Channel | channelId | Capture compare channel of the Timer12.
IfxCcu6_T12ChannelMode | channelMode | The operating mode for the T12 channel.
IfxCcu6_Icu_TriggerConfig | trigger | Structure for trigger configuration.

◆ IfxCcu6_Icu_ChannelConfig

struct IfxCcu6_Icu_ChannelConfig

Configuration structure of the channel.

Definition at line 315 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_ChannelConfig:
[legend]
Data Fields
Icu_Config | base | Base configuration.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_T12Channel | channelId | Capture compare channel of the Timer12.
IfxCcu6_T12ChannelMode | channelMode | The operating mode for the T12 channel.
IfxCcu6_Icu_InterruptConfig | interrupt1 | Structure for first interrupt configuration.
IfxCcu6_Icu_InterruptConfig | interrupt2 | Structure for second interrupt configuration.
IfxCcu6_Icu_InterruptConfig | interrupt3 | Structure for third interrupt configuration.
IfxCcu6_Icu_InterruptConfig | interrupt4 | Structure for fourth interrupt configuration.
boolean | multiInputCaptureEnabled | Choice of multi input capture.
IfxCcu6_Icu_Pins * | pins | Structure for capture input pins.
IfxCcu6_Timer | timer | Timer handle.
IfxCcu6_Icu_TriggerConfig | trigger | Structure for trigger configuration.

◆ IfxCcu6_Icu_Config

struct IfxCcu6_Icu_Config

Configuration structure of the module.

Definition at line 333 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_Config:
[legend]
Data Fields
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_Icu_Clock | clock | Structure for clock configuration.
uint16 | counterValue | 16-bit counter value of Timer12
IfxCcu6_T12CountMode | countMode | Operating mode of Timer 12.
float32 | frequency | Specify expected PWM frequency in Hertz.
Ifx_TimerValue | period | PWM period in ticks.


iLLD_TC26B: Module Initialize Functions

Functions
Module Initialize Functions
iLLD » CCU6 » ICU Interface driver
Collaboration diagram for Module Initialize Functions:

Functions

IFX_EXTERN void | IfxCcu6_Icu_initModule (IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_Icu_initModuleConfig (IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxCcu6_Icu_initModule()

IFX_EXTERN void IfxCcu6_Icu_initModule | ( | IfxCcu6_Icu * | icu,
 |  | const IfxCcu6_Icu_Config * | config
 | ) |  |

Initialises the module with default configuration.

Parameters
icu | Module handle
config | Configuration structure of the module
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 228 of file IfxCcu6_Icu.c.

◆ IfxCcu6_Icu_initModuleConfig()

IFX_EXTERN void IfxCcu6_Icu_initModuleConfig | ( | IfxCcu6_Icu_Config * | config,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure of the module
ccu6 | Pointer to the base of CCU6 registers
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 291 of file IfxCcu6_Icu.c.


iLLD_TC26B: Capture Control Functions

Functions
Capture Control Functions
iLLD » CCU6 » ICU Interface driver
Collaboration diagram for Capture Control Functions:

Functions

IFX_EXTERN uint32 | IfxCcu6_Icu_getTimeStamp (IfxCcu6_Icu_Channel *channel)
Returns the cuurent value stored in the Compare Shadow register (current time stamp) More...
IFX_EXTERN void | IfxCcu6_Icu_startCapture (IfxCcu6_Icu_Channel *channel)
Starts the input capture. More...
IFX_EXTERN void | IfxCcu6_Icu_stopCapture (IfxCcu6_Icu_Channel *channel)
Stops the input capture. More...

Detailed Description

Function Documentation

◆ IfxCcu6_Icu_getTimeStamp()

IFX_EXTERN uint32 IfxCcu6_Icu_getTimeStamp ( IfxCcu6_Icu_Channel * channel )

Returns the cuurent value stored in the Compare Shadow register (current time stamp)

Parameters
channel Channel handle
Returns
timeStamp (cuurent CC6xSR register value)

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 53 of file IfxCcu6_Icu.c.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_Icu_startCapture()

IFX_EXTERN void IfxCcu6_Icu_startCapture ( IfxCcu6_Icu_Channel * channel )

Starts the input capture.

Parameters
channel Channel handle
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 307 of file IfxCcu6_Icu.c.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_Icu_stopCapture()

IFX_EXTERN void IfxCcu6_Icu_stopCapture ( IfxCcu6_Icu_Channel * channel )

Stops the input capture.

Parameters
channel Channel handle
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 333 of file IfxCcu6_Icu.c.

Referenced by IfxCcu6_Icu_initChannel().


iLLD_TC26B: Channel Initialize Functions

Functions
Channel Initialize Functions
iLLD » CCU6 » ICU Interface driver
Collaboration diagram for Channel Initialize Functions:

Functions

IFX_EXTERN void | IfxCcu6_Icu_initChannel (IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
Initialises the channel. More...
IFX_EXTERN void | IfxCcu6_Icu_initChannelConfig (IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
Fills the channel config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxCcu6_Icu_initChannel()

IFX_EXTERN void IfxCcu6_Icu_initChannel | ( | IfxCcu6_Icu_Channel * | channel,
 |  | const IfxCcu6_Icu_ChannelConfig * | channelConfig
 | ) |  |

Initialises the channel.

Parameters
channel | Channel handle
channelConfig | Configuration structure of the channel
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 63 of file IfxCcu6_Icu.c.

◆ IfxCcu6_Icu_initChannelConfig()

IFX_EXTERN void IfxCcu6_Icu_initChannelConfig | ( | IfxCcu6_Icu_ChannelConfig * | channelConfig,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Fills the channel config structure with default values.

Parameters
channelConfig | Configuration structure of the channel
ccu6 | Pointer to the base of CCU6 registers
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 192 of file IfxCcu6_Icu.c.


iLLD_TC26B: PWMBC Interface driver

Modules
PWMBC Interface driver
iLLD » CCU6
Collaboration diagram for PWMBC Interface driver:

Modules

How to use the CCU6 PWMBC Interface driver?
Data Structures
Module Initialize Functions
Modulation Control Functions
Hall Pattern Functions

Detailed Description


iLLD_TC26B: How to use the CCU6 PWMBC Interface driver?

How to use the CCU6 PWMBC Interface driver?
iLLD » CCU6 » PWMBC Interface driver
Collaboration diagram for How to use the CCU6 PWMBC Interface driver?:

The PWMBC interface driver provides a default CCU6 configuration specifically for running a Brush Less DC Motor using hall sensor inputs, by utilising both the timers

After evaluating the hall input pattern at every T13 period match, new out pattern is given to the module after the phase delay at the T13 zero match

User has to prepare the control table for the respective motor he/she is using,

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Ccu6/PwmBc/IfxCcu6_PwmBc.h>

Variables

Declare the PWMBC handle and the motor control table as global variables in your C code:

// used globally
static IfxCcu6_PwmBc pwmBc;
// prepare the control table
uint8 controlTable[6][3] = {{1, 5, 17} ,
{2, 3, 36} ,
{3, 1, 6} ,
{4, 6, 18} ,
{5, 4, 24} ,
{6, 2, 9}};
// to store value of the speed
uint32 speed = 0;

Interrupt Handler Installation

See also How to define Interrupts?

Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_CCU6 1

Add the interrupt service routine to your C code.

IFX_INTERRUPT(ccu60ISR_PwmBc, 0, IFX_INTPRIO_CCU6)
{
//user code
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&ccu60ISR_PwmBc, IFX_INTPRIO_CCU6);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create configuration
IfxCcu6_PwmBc_Config pwmBcConfig;
IfxCcu6_PwmBc_initModuleConfig(&pwmBcConfig, &MODULE_CCU60);
// configure the frequencies of both the timers
pwmBcConfig.base.t12Frequency = 400000;
pwmBcConfig.base.t13Frequency = 400000;
// configure the periods of both the timers
pwmBcConfig.base.t12Period = 100;
pwmBcConfig.base.t13Period = 100;
// configure the phase delay and noise filter for hall input
pwmBcConfig.base.phaseDelay = 20;
pwmBcConfig.base.noiseFilter = 10;
// select the active state of the output
pwmBcConfig.base.activeState = Ifx_ActiveState_high;
// configure timer12
pwmBcConfig.timer12.countMode = IfxCcu6_T12CountMode_edgeAligned;
pwmBcConfig.timer12.counterValue = 0;
// configure timer13
pwmBcConfig.timer13.counterValue = 0;
pwmBcConfig.timer13.compareValue = 100;
// configure the syncronisation, in case of sync start with T12
pwmBcConfig.timer13.t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare;
pwmBcConfig.timer13.t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp;
// configure hall sync event that starts the hall input pattern evaluation
pwmBcConfig.hallSyncEvent = IfxCcu6_HallSensorTriggerMode_t13PM,
// configure multi channel control
pwmBcConfig.multiChannelControl.switchingSelect = IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch,
pwmBcConfig.multiChannelControl.switchingSync = IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch,
// pin configuration
const IfxCcu6_PwmBc_Pins pins = {
IfxCcu60_CC60_P02_0_OUT, // CC60Out pin
IfxCcu60_CC61_P02_2_OUT, // CC61Out pin
IfxCcu60_CC62_P02_4_OUT, // CC62Out pin
IfxCcu60_COUT60_P02_1_OUT, // COUT60 pin
IfxCcu60_COUT60_P02_3_OUT, // COUT61 pin
IfxCcu60_COUT60_P02_5_OUT, // COUT62 pin
NULL, // COUT63 pin not used
IfxCcu60_COUT60_P02_6_OUT // CCPOS0In pin
IfxCcu60_COUT60_P02_7_OUT // CCPOS1In pin
IfxCcu60_COUT60_P02_8_OUT // CCPOS2In pin
IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed1,
IfxPort_InputMode_pullUp
};
pwmBcConfig.pins = &pins;
// configure the interrupts
pwmBcConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_cc61FallingEdge;
pwmBcConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
pwmBcConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
pwmBcConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
// configure input and output triggers
pwmBcConfig.trigger.t12ExtInputTrigger = NULL_PTR;
pwmBcConfig.trigger.t12ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
pwmBcConfig.trigger.t13ExtInputTrigger = NULL_PTR;
pwmBcConfig.trigger.t13ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
pwmBcConfig.trigger.t13InSyncWithT12 = FALSE;
pwmBcConfig.trigger.outputTriggerEnabled = TRUE;
pwmBcConfig.trigger.outputLine = IfxCcu6_TrigOut_0;
pwmBcConfig.trigger.outputTrigger = IfxCcu6_TrigSel_cout63;
// initialize the module
IfxCcu6_PwmBc_initModule(&pwmBc, &pwmBcConfig);

The PwmBc is ready for use now!

Modulation Control

The PWMBC driver provides simple to use Motor Control functions

This means: you can start, stop, the BLDC motor once the module is initialised with the appropriate configuration You can optionally get the speed of the motor at any point of time

Start the motor

IfxCcu6_PwmBc_start(&pwmBc);

Stop the motor

IfxCcu6_PwmBc_stop(&pwmBc);

Update the output pattern

// prepare the control table
// assumed to be declared globally
uint8 controlTable[6][3] = {{1, 5, 17} ,
{2, 3, 36} ,
{3, 1, 6} ,
{4, 6, 18} ,
{5, 4, 24} ,
{6, 2, 9}};
// update the output pattern
IfxCcu6_PwmBc_updateHallPattern(&pwmBc, controlTable[6][3]);

Get the current motor speed (can also be called in ISR)

// assumed to be declared globally
uint32 speed = 0;
// get the current motor speed
speed = IfxCcu6_PwmBc_getMotorSpeed(&pwmBc);


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » PWMBC Interface driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCcu6_PwmBc_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_PwmBc_MultiChannelControl
Structure for multichannel mode control. More...
struct | IfxCcu6_PwmBc_Pins
Structure for CCU6 output pin configuration. More...
struct | IfxCcu6_PwmBc_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_PwmBc_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_PwmBc_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_PwmBc
Module handle. More...
struct | IfxCcu6_PwmBc_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_PwmBc_InterruptConfig

struct IfxCcu6_PwmBc_InterruptConfig

Structure for interrupt configuration.

Definition at line 272 of file IfxCcu6_PwmBc.h.

Data Fields
uint16 | priority | Interrupt priority.
IfxCcu6_ServiceRequest | serviceRequest | Selection of service request outputs.
IfxCcu6_InterruptSource | source | Interrupt source selection.
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxCcu6_PwmBc_MultiChannelControl

struct IfxCcu6_PwmBc_MultiChannelControl

Structure for multichannel mode control.

Definition at line 282 of file IfxCcu6_PwmBc.h.

Data Fields
IfxCcu6_MultiChannelSwitchingSelect | switchingSelect | Trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP.
IfxCcu6_MultiChannelSwitchingSync | switchingSync | Synchronization selection for the shadow transfer event MCM_ST.

◆ IfxCcu6_PwmBc_Pins

struct IfxCcu6_PwmBc_Pins

Structure for CCU6 output pin configuration.

Definition at line 290 of file IfxCcu6_PwmBc.h.

Collaboration diagram for IfxCcu6_PwmBc_Pins:
[legend]
Data Fields
IFX_CONST IfxCcu6_Cc60_Out * | cc60Out | CC60 compare output CC0.
IFX_CONST IfxCcu6_Cc61_Out * | cc61Out | CC61 compare output CC1.
IFX_CONST IfxCcu6_Cc62_Out * | cc62Out | CC62 compare output CC2.
IFX_CONST IfxCcu6_Ccpos0_In * | ccpos0 | CCPOS0 input signal.
IFX_CONST IfxCcu6_Ccpos1_In * | ccpos1 | CCPOS2 input signal.
IFX_CONST IfxCcu6_Ccpos2_In * | ccpos2 | CCPOS2 input signal.
IFX_CONST IfxCcu6_Cout60_Out * | cout60 | CC60 compare output COUT0.
IFX_CONST IfxCcu6_Cout61_Out * | cout61 | CC61 compare output COUT1.
IFX_CONST IfxCcu6_Cout62_Out * | cout62 | CC62 compare output COUT2.
IFX_CONST IfxCcu6_Cout63_Out * | cout63 | CC63 compare output COUT3.
IfxPort_InputMode | inputMode | The CCPOSx pin input mode which should be configured.
IfxPort_OutputMode | outputMode | The pin output mode which should be configured.
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxCcu6_T12hr_In * | t12hr | T12HR input signal.
IFX_CONST IfxCcu6_T13hr_In * | t13hr | T13HR input signal.
IfxPort_InputMode | t1xhrInputMode | The T1xHR pin input mode which should be configured.

◆ IfxCcu6_PwmBc_Timer12

struct IfxCcu6_PwmBc_Timer12

Structure for Timer 12.

Definition at line 312 of file IfxCcu6_PwmBc.h.

Data Fields
uint16 | counterValue | 16-bit counter value of Timer12
IfxCcu6_T12CountMode | countMode | Operating mode of Timer 12.

◆ IfxCcu6_PwmBc_Timer13

struct IfxCcu6_PwmBc_Timer13

Structure for Timer 13.

Definition at line 320 of file IfxCcu6_PwmBc.h.

Data Fields
uint16 | compareValue | 16-bit comapre value of Timer12
uint16 | counterValue | 16-bit counter value of Timer13
IfxCcu6_T13TriggerDirection | t12SyncDirection | Additional information to control trigger event selection.
IfxCcu6_T13TriggerEvent | t12SyncEvent | T12 sync trigger event to start T13.

◆ IfxCcu6_PwmBc_TriggerConfig

struct IfxCcu6_PwmBc_TriggerConfig

Configuration structure for external triggers.

Definition at line 330 of file IfxCcu6_PwmBc.h.

Collaboration diagram for IfxCcu6_PwmBc_TriggerConfig:
[legend]
Data Fields
IfxCcu6_TrigOut | outputLine | Trigger out selection.
IfxCcu6_TrigSel | outputTrigger | Trigger selection.
boolean | outputTriggerEnabled | Output trigger connection to VADC enable / disable choice.
IfxCcu6_T12hr_In * | t12ExtInputTrigger | External input signal selection for timer 12.
IfxCcu6_ExternalTriggerMode | t12ExtInputTriggerMode | Event of signal T12HR that can set the run bit T12R by HW.
IfxCcu6_T13hr_In * | t13ExtInputTrigger | External input signal selection for timer 13.
IfxCcu6_ExternalTriggerMode | t13ExtInputTriggerMode | Event of signal T13HR that can set the run bit T13R by HW.
boolean | t13InSyncWithT12 | Selection of Timer 13 start in sync with T12.

◆ IfxCcu6_PwmBc

struct IfxCcu6_PwmBc

Module handle.

Definition at line 348 of file IfxCcu6_PwmBc.h.

Collaboration diagram for IfxCcu6_PwmBc:
[legend]
Data Fields
PwmHl | base | Base PWMHL object.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
uint8 | hallPatternIndex | Hall pattern index of motor control table.
IfxCcu6_PwmBc_TriggerConfig | trigger | Structure for trigger configuration.

◆ IfxCcu6_PwmBc_Config

struct IfxCcu6_PwmBc_Config

Configuration structure of the module.

Definition at line 358 of file IfxCcu6_PwmBc.h.

Collaboration diagram for IfxCcu6_PwmBc_Config:
[legend]
Data Fields
PwmHl_Config | base | Base configuration.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
uint8 | hallPatternIndex | Hall pattern index of motor control table.
IfxCcu6_HallSensorTriggerMode | hallSyncEvent | Hall pattern evaluation trigger selection (HSYNC)
IfxCcu6_PwmBc_InterruptConfig | interrupt1 | Structure for first interrupt configuration.
IfxCcu6_PwmBc_InterruptConfig | interrupt2 | Structure for second interrupt configuration.
IfxCcu6_PwmBc_InterruptConfig | interrupt3 | Structure for third interrupt configuration.
IfxCcu6_PwmBc_InterruptConfig | interrupt4 | Structure for fourth interrupt configuration.
IfxCcu6_PwmBc_MultiChannelControl | multiChannelControl | Structure for multichannel mode control.
IfxCcu6_PwmBc_Pins * | pins | Structure for CCU6 output pin configuration.
IfxCcu6_PwmBc_Timer12 | timer12 | Structure for Timer 12.
IfxCcu6_PwmBc_Timer13 | timer13 | Structure for Timer 13.
IfxCcu6_PwmBc_TriggerConfig | trigger | Structure for trigger configuration.


iLLD_TC26B: Module Initialize Functions

Functions
Module Initialize Functions
iLLD » CCU6 » PWMBC Interface driver
Collaboration diagram for Module Initialize Functions:

Functions

IFX_EXTERN void | IfxCcu6_PwmBc_initModule (IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_PwmBc_initModuleConfig (IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxCcu6_PwmBc_initModule()

IFX_EXTERN void IfxCcu6_PwmBc_initModule | ( | IfxCcu6_PwmBc * | pwmBc,
 |  | const IfxCcu6_PwmBc_Config * | config
 | ) |  |

Initialises the module with default configuration.

Parameters
pwmBc | Module handle
config | Configuration structure of the module
Returns
None

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 68 of file IfxCcu6_PwmBc.c.

◆ IfxCcu6_PwmBc_initModuleConfig()

IFX_EXTERN void IfxCcu6_PwmBc_initModuleConfig | ( | IfxCcu6_PwmBc_Config * | config,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure of the module
ccu6 | Pointer to the base of CCU6 registers
Returns
None

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 333 of file IfxCcu6_PwmBc.c.


iLLD_TC26B: Modulation Control Functions

Functions
Modulation Control Functions
iLLD » CCU6 » PWMBC Interface driver
Collaboration diagram for Modulation Control Functions:

Functions

IFX_EXTERN void | IfxCcu6_PwmBc_start (IfxCcu6_PwmBc *pwmBc)
Starts the Hall sensored based PWM. More...
IFX_EXTERN void | IfxCcu6_PwmBc_stop (IfxCcu6_PwmBc *pwmBc)
Stops the Hall sensored based PWM. More...

Detailed Description

Function Documentation

◆ IfxCcu6_PwmBc_start()

IFX_EXTERN void IfxCcu6_PwmBc_start ( IfxCcu6_PwmBc * pwmBc )

Starts the Hall sensored based PWM.

Parameters
pwmBc Module handle
Returns
None

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 420 of file IfxCcu6_PwmBc.c.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_PwmBc_stop()

IFX_EXTERN void IfxCcu6_PwmBc_stop ( IfxCcu6_PwmBc * pwmBc )

Stops the Hall sensored based PWM.

Parameters
pwmBc Module handle
Returns
None

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 473 of file IfxCcu6_PwmBc.c.

Referenced by IfxCcu6_PwmBc_initModule().


iLLD_TC26B: Hall Pattern Functions

Functions
Hall Pattern Functions
iLLD » CCU6 » PWMBC Interface driver
Collaboration diagram for Hall Pattern Functions:

Functions

IFX_EXTERN uint32 | IfxCcu6_PwmBc_getMotorSpeed (IfxCcu6_PwmBc *pwmBc)
returns the current motor speed More...
IFX_EXTERN void | IfxCcu6_PwmBc_updateHallPattern (IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
Updates the Hall pattern. More...

Detailed Description

Function Documentation

◆ IfxCcu6_PwmBc_getMotorSpeed()

IFX_EXTERN uint32 IfxCcu6_PwmBc_getMotorSpeed ( IfxCcu6_PwmBc * pwmBc )

returns the current motor speed

Parameters
pwmBc Module handle
Returns
speed

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 53 of file IfxCcu6_PwmBc.c.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_PwmBc_updateHallPattern()

IFX_EXTERN void IfxCcu6_PwmBc_updateHallPattern | ( | IfxCcu6_PwmBc * | pwmBc,
 |  | uint8 | controlTable[6][3]
 | ) |  |

Updates the Hall pattern.

Parameters
pwmBc | Module handle
controlTable | Motor Control table
Returns
None

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 511 of file IfxCcu6_PwmBc.c.

Referenced by IfxCcu6_PwmBc_initModule().


iLLD_TC26B: PWM Interface Driver

Modules
PWM Interface Driver
iLLD » CCU6
Collaboration diagram for PWM Interface Driver:

Modules

How to use the CCU6 PWM Driver
Data Structures
PwmHl Functions
StdIf Functions

Detailed Description


iLLD_TC26B: How to use the CCU6 PWM Driver

How to use the CCU6 PWM Driver
iLLD » CCU6 » PWM Interface Driver
Collaboration diagram for How to use the CCU6 PWM Driver:

This driver implements the PWM functionalities as defined by Standard interface: Multi-channels, dual-complementary PWM interface. The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

For a detailed configuration of the microcontroller, see IfxCcu6_PwmHl_init().


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » PWM Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCcu6_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxCcu6_PwmHl_Config
CCU6: PWM HL configuration. More...
struct | IfxCcu6_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxCcu6_PwmHl_s
CCU6 PWM driver. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_PwmHl_Base

struct IfxCcu6_PwmHl_Base

Multi-channels PWM object definition (channels only)

Definition at line 96 of file IfxCcu6_PwmHl.h.

Data Fields
Ifx_ActiveState | ccxActiveState | Top PWM active state.
uint8 | channelCount | Number of PWM channels, one channel is made of a top and bottom channel.
Ifx_ActiveState | coutxActiveState | Bottom PWM active state.
Ifx_TimerValue | deadtime | Dead time between the top and bottom channel in ticks.
boolean | inverted | Flag indicating the center aligned inverted mode (TRUE)
Ifx_TimerValue | maxPulse | internal parameter
Ifx_TimerValue | minPulse | minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Ifx_Pwm_Mode | mode | actual PWM mode
sint8 | setMode | A non zero flag indicates that the PWM mode is being modified.

◆ IfxCcu6_PwmHl_Config

struct IfxCcu6_PwmHl_Config

CCU6: PWM HL configuration.

Definition at line 115 of file IfxCcu6_PwmHl.h.

Collaboration diagram for IfxCcu6_PwmHl_Config:
[legend]
Data Fields
IfxStdIf_PwmHl_Config | base | PWM HL standard interface configuration.
IfxCcu6_Cc60_Out * | cc0 | CC0 channel used.
IfxCcu6_Cc61_Out * | cc1 | CC1 channel used.
IfxCcu6_Cc62_Out * | cc2 | CC2 channel used.
IfxCcu6_Cout60_Out * | cout0 | COUT0 channel used.
IfxCcu6_Cout61_Out * | cout1 | COUT1 channel used.
IfxCcu6_Cout62_Out * | cout2 | COUT2 channel used.
IfxCcu6_TimerWithTrigger * | timer | Pointer to the linked timer object.

◆ IfxCcu6_PwmHl_Mode

struct IfxCcu6_PwmHl_Mode

Structure for PWM configuration.

Definition at line 129 of file IfxCcu6_PwmHl.h.

Collaboration diagram for IfxCcu6_PwmHl_Mode:
[legend]
Data Fields
boolean | inverted | Inverted configuration for the selected mode.
Ifx_Pwm_Mode | mode | pwm mode
IfxCcu6_PwmHl_Update | update | update call back function for the selected mode

◆ IfxCcu6_PwmHl_s

struct IfxCcu6_PwmHl_s

CCU6 PWM driver.

Definition at line 138 of file IfxCcu6_PwmHl.h.

Collaboration diagram for IfxCcu6_PwmHl_s:
[legend]
Data Fields
IfxCcu6_PwmHl_Base | base | Multi-channels PWM object definition (channels only)
IfxCcu6_TimerWithTrigger * | timer | Pointer to the linked timer object.
IfxCcu6_PwmHl_Update | update | Update function for actual selected mode.


iLLD_TC26B: PwmHl Functions

Functions
PwmHl Functions
iLLD » CCU6 » PWM Interface Driver
Collaboration diagram for PwmHl Functions:

Functions

IFX_EXTERN boolean | IfxCcu6_PwmHl_init (IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
Initializes the timer object. More...
IFX_EXTERN void | IfxCcu6_PwmHl_initConfig (IfxCcu6_PwmHl_Config *config)
Initialize the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxCcu6_PwmHl_init()

IFX_EXTERN boolean IfxCcu6_PwmHl_init | ( | IfxCcu6_PwmHl * | driver,
 |  | const IfxCcu6_PwmHl_Config * | config
 | ) |  |

Initializes the timer object.

Note
To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. Initialise the CCU6 module for PWM generation of high- and low switches usage, e.g.
  • electric motor drive
  • half-bridge switches

It is assumed that the whole CCU6 module is only used for purposes mentioned at the IfxCcu6_PwmHl API. No part of CCU6 module is used for other purpose.

The timer used should configure the T12 as PWM base timer and T13 as trigger.

Parameters
driver | CCU6 PWM driver
config | CCU6 : PWM HL configuration
Returns
TRUE on success else FALSE
  • All T12 channels (0,1,2) are set in compare mode
  • Enable T12 modulation mode

Definition at line 201 of file IfxCcu6_PwmHl.c.

◆ IfxCcu6_PwmHl_initConfig()

IFX_EXTERN void IfxCcu6_PwmHl_initConfig ( IfxCcu6_PwmHl_Config * config )

Initialize the configuration structure to default.

Parameters
config Channel configuration. This parameter is Initialised by the function
Returns
None

Definition at line 290 of file IfxCcu6_PwmHl.c.


iLLD_TC26B: StdIf Functions

Functions
StdIf Functions
iLLD » CCU6 » PWM Interface Driver
Collaboration diagram for StdIf Functions:

Functions

IFX_STATIC void | IfxCcu6_PwmHl_disable (IfxCcu6_PwmHl *driver)
Turn-off the complementary PWM generation mode. More...
IFX_STATIC void | IfxCcu6_PwmHl_enable (IfxCcu6_PwmHl *driver)
Turn-on the complementary PWM generation mode. More...
IFX_STATIC void | IfxCcu6_PwmHl_setOutputPins (Ifx_CCU6 *module, const IfxCcu6_PwmHl_Config *config)
Sets up the output pins. More...
IFX_STATIC void | IfxCcu6_PwmHl_updateCenterAligned (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxCcu6_PwmHl_updateEdgeAligned (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxCcu6_PwmHl_updateOff (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
IFX_INLINE Ifx_ActiveState | IfxCcu6_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_EXTERN float32 | IfxCcu6_PwmHl_getDeadtime (IfxCcu6_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxCcu6_PwmHl_getMinPulse (IfxCcu6_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxCcu6_PwmHl_getMode (IfxCcu6_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setDeadtime (IfxCcu6_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setMinPulse (IfxCcu6_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setMode (IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxCcu6_PwmHl_setOnTime (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are complementary. More...
IFX_EXTERN void | IfxCcu6_PwmHl_setupChannels (IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

Function Documentation

◆ IfxCcu6_PwmHl_disable()

IFX_STATIC void IfxCcu6_PwmHl_disable ( IfxCcu6_PwmHl * driver )

Turn-off the complementary PWM generation mode.

Note
The changes are not applied until Timer->applyUpdate() is called.
This function will set the ON time to ZERO, overriding previous call to IfxCcu6_PwmHl_setOnTime().
This function will disable PWM in all channels, overriding previous call to IfxCcu6_PwmHl_setupChannels().
Parameters
driver CCU6 PWM driver
Returns
None
  • All TOP and BOTTOM channel (COUTx) states equals CC6xST

Definition at line 126 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_setMode().

◆ IfxCcu6_PwmHl_enable()

IFX_STATIC void IfxCcu6_PwmHl_enable ( IfxCcu6_PwmHl * driver )

Turn-on the complementary PWM generation mode.

Note
The changes are not applied until Timer->applyUpdate() is called.
This function will disable PWM in all channels, overriding previous call to IfxCcu6_PwmHl_setupChannels().
Parameters
driver CCU6 PWM driver
Returns
None
  • All TOP and BOTTOM channel (COUTx) states equals CC6xST

Definition at line 157 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_setMode().

◆ IfxCcu6_PwmHl_getDeadtime()

IFX_EXTERN float32 IfxCcu6_PwmHl_getDeadtime ( IfxCcu6_PwmHl * driver )

Returns the dead time.

Parameters
driver CCU6 PWM driver
Returns
Dead Time
See also
IfxStdIf_PwmHl_GetDeadtime

Definition at line 183 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_getMinPulse()

IFX_EXTERN float32 IfxCcu6_PwmHl_getMinPulse ( IfxCcu6_PwmHl * driver )

Returns the minimum pulse.

Parameters
driver CCU6 PWM driver
Returns
Min Pulse
See also
IfxStdIf_PwmHl_GetMinPulse

Definition at line 189 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_getMode()

IFX_EXTERN Ifx_Pwm_Mode IfxCcu6_PwmHl_getMode ( IfxCcu6_PwmHl * driver )

Returns Pwm mode.

Parameters
driver CCU6 PWM driver
Returns
Pwm mode
See also
IfxStdIf_PwmHl_GetMode

Definition at line 195 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_invertActiveState()

IFX_INLINE Ifx_ActiveState IfxCcu6_PwmHl_invertActiveState ( Ifx_ActiveState activeState )

Inverts the active state.

Parameters
activeState Active state
Returns
State

Definition at line 301 of file IfxCcu6_PwmHl.h.

◆ IfxCcu6_PwmHl_setDeadtime()

IFX_EXTERN boolean IfxCcu6_PwmHl_setDeadtime | ( | IfxCcu6_PwmHl * | driver,
 |  | float32 | deadtime
 | ) |  |

Sets the dead time.

Note
The changes are not applied until Timer->applyUpdate() is called.
Parameters
driver | CCU6 PWM driver
deadtime | Dead time value
Returns
TRUE on success else FALSE
See also
IfxStdIf_PwmHl_SetDeadtime

Definition at line 303 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_init(), and IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_setMinPulse()

IFX_EXTERN boolean IfxCcu6_PwmHl_setMinPulse | ( | IfxCcu6_PwmHl * | driver,
 |  | float32 | minPulse
 | ) |  |

Sets the minimum pulse.

Parameters
driver | CCU6 PWM driver
minPulse | Minimum pulse
Returns
TRUE on success else FALSE
See also
IfxStdIf_PwmHl_SetMinPulse

Definition at line 314 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_init(), and IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_setMode()

IFX_EXTERN boolean IfxCcu6_PwmHl_setMode | ( | IfxCcu6_PwmHl * | driver,
 |  | Ifx_Pwm_Mode | mode
 | ) |  |

Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()

Parameters
driver | CCU6 PWM driver
mode | Pwm mode
Returns
TRUE on success else FALSE
See also
IfxStdIf_PwmHl_SetMode

Definition at line 325 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_init(), and IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_setOnTime()

IFX_EXTERN void IfxCcu6_PwmHl_setOnTime | ( | IfxCcu6_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are complementary.

Note
The changes are not applied until Timer->applyUpdate() is called.
Parameters
driver | CCU6 PWM driver
tOn | ON time
Returns
None
See also
IfxStdIf_PwmHl_SetOnTime

Definition at line 357 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_disable(), IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxCcu6_PwmHl_updateCenterAligned(), and IfxCcu6_PwmHl_updateEdgeAligned().

◆ IfxCcu6_PwmHl_setOutputPins()

IFX_STATIC void IfxCcu6_PwmHl_setOutputPins | ( | Ifx_CCU6 * | module,
 |  | const IfxCcu6_PwmHl_Config * | config
 | ) |  |

Sets up the output pins.

Parameters
module | Pointer to register base
config | CCU6 : PWM HL configuration
Returns
None

Definition at line 405 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_init().

◆ IfxCcu6_PwmHl_setupChannels()

IFX_EXTERN void IfxCcu6_PwmHl_setupChannels | ( | IfxCcu6_PwmHl * | driver,
 |  | boolean * | activeCh,
 |  | boolean * | stuckSt
 | ) |  |

Set channels which are generating PWM or in "stuck-at" state.

Note
The values for the parameters are arranged as follows: index = 0 –> phase 0 top index = 1 –> phase 0 bottom index = 2 –> phase 1 top index = 3 –> phase 1 bottom index = 4 –> phase 2 top index = 5 –> phase 2 bottom
Parameters
driver | CCU6 PWM driver
activeCh | Pointer to boolean array containing values for PWM channels. If FALSE, the channel will be in stuck-at state, else the channel will generate PWM.
stuckSt | Pointer to boolean array containing values for active channels. If FALSE, the stuck-at state is passive level, else the stuck-at state is active level.
Returns
None
See also
IfxStdIf_PwmHl_SetupChannels

Definition at line 441 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_disable(), and IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_stdIfPwmHlInit()

IFX_EXTERN boolean IfxCcu6_PwmHl_stdIfPwmHlInit | ( | IfxStdIf_PwmHl * | stdif,
 |  | IfxCcu6_PwmHl * | driver
 | ) |  |

Initialises the statndard interface Pwm.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 477 of file IfxCcu6_PwmHl.c.

◆ IfxCcu6_PwmHl_updateCenterAligned()

IFX_STATIC void IfxCcu6_PwmHl_updateCenterAligned | ( | IfxCcu6_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in center aligned and center aligned inverted modes.

Parameters
driver | CCU6 PWM driver
tOn | T on
Returns
None

Definition at line 500 of file IfxCcu6_PwmHl.c.

◆ IfxCcu6_PwmHl_updateEdgeAligned()

IFX_STATIC void IfxCcu6_PwmHl_updateEdgeAligned | ( | IfxCcu6_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in edge aligned modes (left and right aligned)

Parameters
driver | CCU6 PWM driver
tOn | T on
Returns
None

Definition at line 506 of file IfxCcu6_PwmHl.c.

◆ IfxCcu6_PwmHl_updateOff()

IFX_STATIC void IfxCcu6_PwmHl_updateOff | ( | IfxCcu6_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Set the outputs to inactive.

Parameters
driver | CCU6 PWM driver
tOn | T on
Returns
None

Definition at line 512 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_init().


iLLD_TC26B: TIMER Interface driver

Modules
TIMER Interface driver
iLLD » CCU6
Collaboration diagram for TIMER Interface driver:

Modules

How to use the CCU6 TIMER Interface driver?
Data Structures
Module Initialize Functions
Timer Control Functions

Detailed Description


iLLD_TC26B: How to use the CCU6 TIMER Interface driver?

How to use the CCU6 TIMER Interface driver?
iLLD » CCU6 » TIMER Interface driver
Collaboration diagram for How to use the CCU6 TIMER Interface driver?:

The TIMER interface driver provides a default CCU6 configuration for runnung the selected timer block.

User can select the various configuration options that hardware allows

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Ccu6/Timer/IfxCcu6_Timer.h>

Variables

Declare the TIMER handle as global variable in your C code:

// used globally
static IfxCcu6_Timer timer;

Interrupt Handler Installation

See also How to define Interrupts?

Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_CCU6 1

Add the interrupt service routine to your C code.

IFX_INTERRUPT(ccu60ISR_Timer, 0, IFX_INTPRIO_CCU6)
{
//user code
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&ccu60ISR_Timer, IFX_INTPRIO_CCU6);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create configuration
IfxCcu6_Timer_Config timerConfig;
IfxCcu6_Timer_initModuleConfig(&timerConfig, &MODULE_CCU60);
// configure the frequency of the timer in case of internal start
// this frequency will be set for the timer block selected later
timerConfig.base.frequency = 400000;
// configure the period of the timer
timerConfig.base.period = 100;
// configure the waiting time in case of delayed T13 start in sync with T12
timerConfig.base.waitingTime = 0;
// select the timer that needs to be started
timerConfig.timer = IfxCcu6_TimerId_t12;
// select the synchronous operation if both timers need to be start at the same time
// previous selection of timer block can be ignored in this mode
timerConfig.synchronousOperation = TRUE;
// configure the clock for internal mode
timerConfig.clock.t12ExtClockEnabled = FALSE;
timerConfig.clock.t12ExtClockInput = NULL_PTR;
timerConfig.clock.t12countingInputMode = IfxCcu6_CountingInputMode_internal;
// configure the selcted timer block
timerConfig.timer12.countMode = IfxCcu6_T12CountMode_edgeAligned;
timerConfig.timer12.counterValue = 0;
// configure the interrupts
timerConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_t12PeriodMatch;
timerConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
timerConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
timerConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
// configure input and output triggers
timerConfig.trigger.t12ExtInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
timerConfig.trigger.t13ExtInputTrigger = NULL_PTR;
timerConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
timerConfig.trigger.t13InSyncWithT12 = FALSE;
// initialize the module
IfxCcu6_Timer_initModule(&timer, &timerConfig);

The Timer is ready for use now!

Control

The TIMER driver provides simple to use timer Control functions

This means: In addition to start and stop a single timer, you can start and stop both the timer blocks at the same time you can also run the timer in single shot mode and finally you an manually make the timer count each step

Start the timer

IfxCcu6_Timer_start(&timer);

Stop the timer

IfxCcu6_Timer_stop(&timer);

Start both the timers synchronously, when the synchronousOperation mode is selected in the configuration

IfxCcu6_Timer_synchronousStart(&timer);

Stop both the timers synchronously, when the synchronousOperation mode is selected in the configuration

IfxCcu6_Timer_synchronousStop(&timer);

Start the selected timer in single shot mode

IfxCcu6_Timer_startSingleShotMode(&timer);

Make the timer count each step manually

uint8 i;
for (i=0; i<50; i++)
{
IfxCcu6_Timer_countOneStep(&timer);
}


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » TIMER Interface driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCcu6_Timer_Clock
Structure for clock configuration. More...
struct | IfxCcu6_Timer_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_Timer_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_Timer_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_Timer_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_Timer
Module handle. More...
struct | IfxCcu6_Timer_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_Timer_Clock

struct IfxCcu6_Timer_Clock

Structure for clock configuration.

Definition at line 231 of file IfxCcu6_Timer.h.

Collaboration diagram for IfxCcu6_Timer_Clock:
[legend]
Data Fields
IfxCcu6_CountingInputMode | t12countingInputMode | Input event leading to a counting action of the timer T12.
boolean | t12ExtClockEnabled | Timer 12 external clock enable / disable selection.
IfxCcu6_T12hr_In * | t12ExtClockInput | External input signal selection for timer 12.
IfxCcu6_CountingInputMode | t13countingInputMode | Input event leading to a counting action of the timer T13.
boolean | t13ExtClockEnabled | Timer 13 external clock enable / disable selection.
IfxCcu6_T13hr_In * | t13ExtClockInput | External input signal selection for timer 13.

◆ IfxCcu6_Timer_InterruptConfig

struct IfxCcu6_Timer_InterruptConfig

Structure for interrupt configuration.

Definition at line 243 of file IfxCcu6_Timer.h.

Data Fields
uint16 | priority | Interrupt priority.
IfxCcu6_ServiceRequest | serviceRequest | Selection of service request outputs.
IfxCcu6_InterruptSource | source | Interrupt source selection.
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxCcu6_Timer_Timer12

struct IfxCcu6_Timer_Timer12

Structure for Timer 12.

Definition at line 253 of file IfxCcu6_Timer.h.

Data Fields
uint16 | counterValue | 16-bit counter value of Timer12
IfxCcu6_T12CountMode | countMode | Operating mode of Timer 12.

◆ IfxCcu6_Timer_Timer13

struct IfxCcu6_Timer_Timer13

Structure for Timer 13.

Definition at line 261 of file IfxCcu6_Timer.h.

Data Fields
uint16 | counterValue | 16-bit counter value of Timer13
IfxCcu6_T13TriggerDirection | t12SyncDirection | Additional information to control trigger event selection.
IfxCcu6_T13TriggerEvent | t12SyncEvent | T12 sync trigger event to start T13.

◆ IfxCcu6_Timer_TriggerConfig

struct IfxCcu6_Timer_TriggerConfig

Configuration structure for external triggers.

Definition at line 270 of file IfxCcu6_Timer.h.

Collaboration diagram for IfxCcu6_Timer_TriggerConfig:
[legend]
Data Fields
IfxCcu6_ExternalTriggerMode | extInputTriggerMode | Event of signal T1xHR that can set the run bit T1xR by HW.
IfxCcu6_T12hr_In * | t12ExtInputTrigger | External input signal selection for timer 12.
IfxCcu6_T13hr_In * | t13ExtInputTrigger | External input signal selection for timer 13.
boolean | t13InSyncWithT12 | Selection of Timer 13 start in sync with T12.

◆ IfxCcu6_Timer

struct IfxCcu6_Timer

Module handle.

Definition at line 293 of file IfxCcu6_Timer.h.

Collaboration diagram for IfxCcu6_Timer:
[legend]
Data Fields
Timer | base | Base Timer object.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_TimerId | timer | Timer number (T12 / T13)
IfxCcu6_Timer_TriggerConfig | trigger | Structure for trigger configuration.

◆ IfxCcu6_Timer_Config

struct IfxCcu6_Timer_Config

Configuration structure of the module.

Definition at line 303 of file IfxCcu6_Timer.h.

Collaboration diagram for IfxCcu6_Timer_Config:
[legend]
Data Fields
Timer_Config | base | Base configuration.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_Timer_Clock | clock | Structure for clock configuration.
IfxCcu6_Timer_InterruptConfig | interrupt1 | Structure for first interrupt configuration.
IfxCcu6_Timer_InterruptConfig | interrupt2 | Structure for second interrupt configuration.
IfxCcu6_Timer_InterruptConfig | interrupt3 | Structure for third interrupt configuration.
IfxCcu6_Timer_InterruptConfig | interrupt4 | Structure for fourth interrupt configuration.
IfxCcu6_Timer_Pins * | pins | Structure for CCU6 output pin configuration.
boolean | synchronousOperation | Synchronous operation selection (starting / stopping both the timers at the same time)
IfxCcu6_TimerId | timer | Timer number (T12 / T13)
IfxCcu6_Timer_Timer12 | timer12 | Structure for Timer 12.
IfxCcu6_Timer_Timer13 | timer13 | Structure for Timer 13.
IfxCcu6_Timer_TriggerConfig | trigger | Structure for trigger configuration.


iLLD_TC26B: Module Initialize Functions

Functions
Module Initialize Functions
iLLD » CCU6 » TIMER Interface driver
Collaboration diagram for Module Initialize Functions:

Functions

IFX_EXTERN void | IfxCcu6_Timer_initModule (IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_Timer_initModuleConfig (IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxCcu6_Timer_initModule()

IFX_EXTERN void IfxCcu6_Timer_initModule | ( | IfxCcu6_Timer * | timer,
 |  | const IfxCcu6_Timer_Config * | config
 | ) |  |

Initialises the module with default configuration.

Parameters
timer | Module handle
config | Configuration structure of the module
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 76 of file IfxCcu6_Timer.c.

◆ IfxCcu6_Timer_initModuleConfig()

IFX_EXTERN void IfxCcu6_Timer_initModuleConfig | ( | IfxCcu6_Timer_Config * | config,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure of the module
ccu6 | Pointer to the base of CCU6 registers
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 280 of file IfxCcu6_Timer.c.


iLLD_TC26B: Timer Control Functions

Functions
Timer Control Functions
iLLD » CCU6 » TIMER Interface driver
Collaboration diagram for Timer Control Functions:

Functions

IFX_EXTERN void | IfxCcu6_Timer_countOneStep (IfxCcu6_Timer *timer)
Counts the timer one step. More...
IFX_EXTERN void | IfxCcu6_Timer_start (IfxCcu6_Timer *timer)
Starts the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_startSingleShotMode (IfxCcu6_Timer *timer)
Starts the single shot mode of the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_stop (IfxCcu6_Timer *timer)
Stops the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_synchronousStart (IfxCcu6_Timer *timer)
Starts both the timers together. More...
IFX_EXTERN void | IfxCcu6_Timer_synchronousStop (IfxCcu6_Timer *timer)
Starts both the timers together. More...

Detailed Description

Function Documentation

◆ IfxCcu6_Timer_countOneStep()

IFX_EXTERN void IfxCcu6_Timer_countOneStep ( IfxCcu6_Timer * timer )

Counts the timer one step.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 53 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().

◆ IfxCcu6_Timer_start()

IFX_EXTERN void IfxCcu6_Timer_start ( IfxCcu6_Timer * timer )

Starts the timer.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 364 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().

◆ IfxCcu6_Timer_startSingleShotMode()

IFX_EXTERN void IfxCcu6_Timer_startSingleShotMode ( IfxCcu6_Timer * timer )

Starts the single shot mode of the timer.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 419 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().

◆ IfxCcu6_Timer_stop()

IFX_EXTERN void IfxCcu6_Timer_stop ( IfxCcu6_Timer * timer )

Stops the timer.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 479 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().

◆ IfxCcu6_Timer_synchronousStart()

IFX_EXTERN void IfxCcu6_Timer_synchronousStart ( IfxCcu6_Timer * timer )

Starts both the timers together.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 524 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().

◆ IfxCcu6_Timer_synchronousStop()

IFX_EXTERN void IfxCcu6_Timer_synchronousStop ( IfxCcu6_Timer * timer )

Starts both the timers together.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 534 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().


iLLD_TC26B: TimerWithTrigger Interface driver

Modules
TimerWithTrigger Interface driver
iLLD » CCU6
Collaboration diagram for TimerWithTrigger Interface driver:

Modules

How to use the CCU6 TimerWithTrigger Interface driver?
Data Structures
Timer StdIf Functions
Timer Functions

Detailed Description


iLLD_TC26B: How to use the CCU6 TimerWithTrigger Interface driver?

How to use the CCU6 TimerWithTrigger Interface driver?
iLLD » CCU6 » TimerWithTrigger Interface driver
Collaboration diagram for How to use the CCU6 TimerWithTrigger Interface driver?:

This driver implements the timer functionalities as defined by Standard interface: Timer. The user is free to use either the driver specific APIs below or to used the standard interface APIs.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » TimerWithTrigger Interface driver
Collaboration diagram for Data Structures:

Data Structures

struct IfxCcu6_TimerWithTrigger_Base
Structure for the timer base. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_TimerWithTrigger_Base

struct IfxCcu6_TimerWithTrigger_Base

Structure for the timer base.

Definition at line 75 of file IfxCcu6_TimerWithTrigger.h.

Data Fields
float32 | clockFreq | Timer input clock frequency (cached value)
IfxStdIf_Timer_CountDir | countDir | Timer counting mode.
Ifx_TimerValue | period | Timer period in ticks (cached value)
boolean | triggerEnabled | If TRUE, the trigger functionality is Initialised.


iLLD_TC26B: Timer StdIf Functions

Functions
Timer StdIf Functions
iLLD » CCU6 » TimerWithTrigger Interface driver
Collaboration diagram for Timer StdIf Functions:

Functions

IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_applyUpdate (IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_disableUpdate (IfxCcu6_TimerWithTrigger *driver)
Disables the upadte
This function is has an empty body as the updated is disabled automatically after the shadow transfer. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxCcu6_TimerWithTrigger_getPeriod (IfxCcu6_TimerWithTrigger *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getResolution (IfxCcu6_TimerWithTrigger *driver)
Returns the resolution. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_run (IfxCcu6_TimerWithTrigger *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_setFrequency (IfxCcu6_TimerWithTrigger *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_setPeriod (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_setSingleMode (IfxCcu6_TimerWithTrigger *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_setTrigger (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_stop (IfxCcu6_TimerWithTrigger *driver)
Stops the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_updateInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Updates the input frequency. More...

Detailed Description

Function Documentation

◆ IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq ( IfxCcu6_TimerWithTrigger * driver )

Returns the timer event.

Parameters
driver CCU6 Timer interface Handle
Returns
Timer event
See also
IfxStdIf_Timer_AckTimerIrq

Definition at line 55 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq ( IfxCcu6_TimerWithTrigger * driver )

Returns the trigger event.

Parameters
driver CCU6 Timer interface Handle
Returns
Timer event
See also
IfxStdIf_Timer_AckTriggerIrq

Definition at line 71 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_applyUpdate()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_applyUpdate ( IfxCcu6_TimerWithTrigger * driver )

Enable the transfer of the shadow registers.

Parameters
driver CCU6 Timer interface Handle
Returns
None
See also
IfxStdIf_Timer_ApplyUpdate

Definition at line 87 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_PwmHl_init(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_disableUpdate()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_disableUpdate ( IfxCcu6_TimerWithTrigger * driver )

Disables the upadte
This function is has an empty body as the updated is disabled automatically after the shadow transfer.

Parameters
driver CCU6 Timer interface Handle
Returns
None
See also
IfxStdIf_Timer_DisableUpdate

Definition at line 93 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_getFrequency()

IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getFrequency ( IfxCcu6_TimerWithTrigger * driver )

Returns the frequency.

Parameters
driver CCU6 Timer interface Handle
Returns
Frequency
See also
IfxStdIf_Timer_GetFrequency

Definition at line 99 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_getInputFrequency()

IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getInputFrequency ( IfxCcu6_TimerWithTrigger * driver )

Returns the Input frequncy.

Parameters
driver CCU6 Timer interface Handle
Returns
Frequency
See also
IfxStdIf_Timer_GetInputFrequency

Definition at line 105 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_getPeriod()

IFX_EXTERN Ifx_TimerValue IfxCcu6_TimerWithTrigger_getPeriod ( IfxCcu6_TimerWithTrigger * driver )

Returns the period of the timer.

Parameters
driver CCU6 Timer interface Handle
Returns
Period
See also
IfxStdIf_Timer_GetPeriod

Definition at line 111 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_getResolution()

IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getResolution ( IfxCcu6_TimerWithTrigger * driver )

Returns the resolution.

Parameters
driver CCU6 Timer interface Handle
Returns
Resolution
See also
IfxStdIf_Timer_GetResolution

Definition at line 123 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_run()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_run ( IfxCcu6_TimerWithTrigger * driver )

Runs the timer.

Parameters
driver CCU6 Timer interface Handle
Returns
None
See also
IfxStdIf_Timer_Run

Definition at line 292 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_setFrequency()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setFrequency | ( | IfxCcu6_TimerWithTrigger * | driver,
 |  | float32 | frequency
 | ) |  |

Sets the frequency.

Parameters
driver | CCU6 Timer interface Handle
frequency | Frequency
Returns
TRUE on success else FALSE
See also
IfxStdIf_Timer_SetFrequency

Definition at line 298 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_setPeriod()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setPeriod | ( | IfxCcu6_TimerWithTrigger * | driver,
 |  | Ifx_TimerValue | period
 | ) |  |

Sets the period for the timer.

Parameters
driver | CCU6 Timer interface Handle
period | Period value
Returns
TRUE on success else FALSE
See also
IfxStdIf_Timer_SetPeriod

Definition at line 306 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_setFrequency(), and IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_setSingleMode()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_setSingleMode | ( | IfxCcu6_TimerWithTrigger * | driver,
 |  | boolean | enabled
 | ) |  |

Sets the single shot mode of the timer.

Parameters
driver | CCU6 Timer interface Handle
enabled | If TRUE, sets the single shot mode
Returns
None
See also
IfxStdIf_Timer_SetSingleMode

Definition at line 316 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_setTrigger()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_setTrigger | ( | IfxCcu6_TimerWithTrigger * | driver,
 |  | Ifx_TimerValue | triggerPoint
 | ) |  |

Sets the trigger.

Parameters
driver | CCU6 Timer interface Handle
triggerPoint | Trigger point value
Returns
None
See also
IfxStdIf_Timer_SetTrigger

Definition at line 329 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_stdIfTimerInit()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit | ( | IfxStdIf_Timer * | stdif,
 |  | IfxCcu6_TimerWithTrigger * | driver
 | ) |  |

Initializes the standard interface timer.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | CCU6 Timer interface Handle
Returns
TRUE on success else FALSE

Definition at line 335 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_TimerWithTrigger_stop()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_stop ( IfxCcu6_TimerWithTrigger * driver )

Stops the timer.

Parameters
driver CCU6 Timer interface Handle
Returns
None
See also
IfxStdIf_Timer_Stop

Definition at line 364 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_updateInputFrequency()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_updateInputFrequency ( IfxCcu6_TimerWithTrigger * driver )

Updates the input frequency.

Parameters
driver CCU6 Timer interface Handle
Returns
None
See also
IfxStdIf_Timer_UpdateInputFrequency

Definition at line 370 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TimerWithTrigger_stdIfTimerInit().


iLLD_TC26B: Timer Functions

Functions
Timer Functions
iLLD » CCU6 » TimerWithTrigger Interface driver
Collaboration diagram for Timer Functions:

Functions

IFX_EXTERN volatile uint32 * | IfxCcu6_TimerWithTrigger_getPointer (IfxCcu6_TimerWithTrigger *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_init (IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
Initialises the timer object
T12 is configured as timer, T13 is optionally configured as trigger
T12CLK, T12PRE and T12PR are chosen to achieve maximum PWM resolution
Note: To achieve maximum PWM resolution, the requested T12 frequency should be the
lowest PWM frequency.
. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_initConfig (IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxCcu6_TimerWithTrigger_getPointer()

IFX_EXTERN volatile uint32* IfxCcu6_TimerWithTrigger_getPointer ( IfxCcu6_TimerWithTrigger * driver )

Returns the pointer to timer channel.

Parameters
driver CCU6 Timer interface Handle
Returns
Pointer
See also
IfxStdIf_Timer_DisableUpdate

Definition at line 117 of file IfxCcu6_TimerWithTrigger.c.

◆ IfxCcu6_TimerWithTrigger_init()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_init | ( | IfxCcu6_TimerWithTrigger * | driver,
 |  | IfxCcu6_TimerWithTrigger_Config * | config
 | ) |  |

Initialises the timer object
T12 is configured as timer, T13 is optionally configured as trigger
T12CLK, T12PRE and T12PR are chosen to achieve maximum PWM resolution
Note: To achieve maximum PWM resolution, the requested T12 frequency should be the
lowest PWM frequency.
.

Parameters
driver | CCU6 Timer interface Handle
config | Configuration structure for Timer
Returns
TRUE on success else FALSE
  • Enable/initialise the CCU6 if it has not been enabled. See IfxCcu6_isModuleEnabled()

    Return values
    IfxCcu6_Stat_wrongPwmFreq if the T12 prescaler can't fulfill the required frequency
  • The T13 is used to generate additional PWM for internal trigger purpose (e.g. ADC) or external trigger purpose (e.g. sensor synchronisation).

Definition at line 129 of file IfxCcu6_TimerWithTrigger.c.

◆ IfxCcu6_TimerWithTrigger_initConfig()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_initConfig | ( | IfxCcu6_TimerWithTrigger_Config * | config,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | Configuration structure for Timer
ccu6 | Pointer to CCU6 module
Returns
None

Definition at line 282 of file IfxCcu6_TimerWithTrigger.c.


iLLD_TC26B: TPWM Interface driver

Modules
TPWM Interface driver
iLLD » CCU6
Collaboration diagram for TPWM Interface driver:

Modules

How to use the CCU6 TPWM Interface driver?
Data Structures
Module Initialize Functions
Modultion Control Functions

Detailed Description


iLLD_TC26B: How to use the CCU6 TPWM Interface driver?

How to use the CCU6 TPWM Interface driver?
iLLD » CCU6 » TPWM Interface driver
Collaboration diagram for How to use the CCU6 TPWM Interface driver?:

The TPWM interface driver provides a default CCU6 configuration for PWM modulation output through the selected timer block.

User can select the various configuration options that hardware allows

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Ccu6/TPwm/IfxCcu6_TPwm.h>

Variables

Declare the TPWM handle as global variable in your C code:

// used globally
static IfxCcu6_TPwm tPwm;

Interrupt Handler Installation

See also How to define Interrupts?

Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_CCU6 1

Add the interrupt service routine to your C code.

IFX_INTERRUPT(ccu60ISR_TPwm, 0, IFX_INTPRIO_CCU6)
{
//user code
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&ccu60ISR_TPwm, IFX_INTPRIO_CCU6);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create configuration
IfxCcu6_TPwm_Config tPwmConfig;
IfxCcu6_TPwm_initModuleConfig(&tPwmConfig, &MODULE_CCU60);
// configure the frequency of the timer in case of internal start
// this frequency will be set for the timer block selected later
tPwmConfig.base.frequency = 400000;
// configure the period of the timer
tPwmConfig.base.period = 100;
// configure the waiting time in case of delayed T13 start in sync with T12
tPwmConfig.base.waitingTime = 20;
// select the active state of the output
tPwmConfig.base.activeState = Ifx_ActiveState_high;
// select the timer through which PWM is to be generated
tPwmConfig.timer = IfxCcu6_TimerId_t13;
// configure the clock for internal mode
tPwmConfig.clock.t13ExtClockEnabled = FALSE;
tPwmConfig.clock.t13ExtClockInput = NULL_PTR;
tPwmConfig.clock.t13countingInputMode = IfxCcu6_CountingInputMode_internal;
// configure the selcted timer block
tPwmConfig.timer13.counterValue = 0;
tPwmConfig.timer13.compareValue = 100;
// configure the syncronisation, in case of sync start with T12
tPwmConfig.timer13.t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare;
tPwmConfig.timer13.t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp;
//select the channel out for modulation
tPwmConfig.channelOut = IfxCcu6_ChannelOut_cout3;
// pin configuration
const IfxCcu6_TPwm_Pins pins = {
NULL, // CC60Out pin not used
NULL, // CC61Out pin not used
NULL, // CC62Out pin not used
NULL, // COUT60 pin not used
NULL, // COUT61 pin not used
NULL, // COUT62 pin not used
IfxCcu60_COUT63_P00_0_OUT, // COUT63 pin
IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
tPwmConfig.pins = &pins;
// configure the interrupts
tPwmConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_t13CompareMatch;
tPwmConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
tPwmConfig.interrupt1.priority = IFX_INTPRIO_CCU6;
tPwmConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
// configure input and output triggers
tPwmConfig.trigger.t12ExtInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
tPwmConfig.trigger.t13ExtInputTrigger = NULL_PTR;
tPwmConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
tPwmConfig.trigger.t13InSyncWithT12 = TRUE;
tPwmConfig.trigger.outputTriggerEnabled = TRUE;
tPwmConfig.trigger.outputLine = IfxCcu6_TrigOut_0;
tPwmConfig.trigger.outputTrigger = IfxCcu6_TrigSel_cout63;
// initialize the module
IfxCcu6_TPwm_initModule(&tPwm, &tPwmConfig);

The TPWM is ready for use now!

Modulation Control

The TPWM driver provides simple to use Modulation Control functions

This means: you can start, stop, pause and resume the modulation once the module is initialised with the appropriate configuration

Start the modulation

IfxCcu6_TPwm_start(&tPwm);

Stop the modulation

IfxCcu6_TPwm_stop(&tPwm);

Pause the modulation

IfxCcu6_TPwm_pause(&tPwm);

Resume the modulation

IfxCcu6_TPwm_resume(&tPwm);


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » TPWM Interface driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCcu6_TPwm_Clock
Structure for clock configuration. More...
struct | IfxCcu6_TPwm_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_TPwm_Pins
Structure for CCU6 output pin configuration. More...
struct | IfxCcu6_TPwm_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_TPwm_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_TPwm_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_TPwm
Module handle. More...
struct | IfxCcu6_TPwm_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_TPwm_Clock

struct IfxCcu6_TPwm_Clock

Structure for clock configuration.

Definition at line 229 of file IfxCcu6_TPwm.h.

Collaboration diagram for IfxCcu6_TPwm_Clock:
[legend]
Data Fields
IfxCcu6_CountingInputMode | t12countingInputMode | Input event leading to a counting action of the timer T12.
boolean | t12ExtClockEnabled | Timer 12 external clock enable / disable selection.
IfxCcu6_T12hr_In * | t12ExtClockInput | External input signal selection for timer 12.
IfxCcu6_CountingInputMode | t13countingInputMode | Input event leading to a counting action of the timer T13.
boolean | t13ExtClockEnabled | Timer 13 external clock enable / disable selection.
IfxCcu6_T13hr_In * | t13ExtClockInput | External input signal selection for timer 13.

◆ IfxCcu6_TPwm_InterruptConfig

struct IfxCcu6_TPwm_InterruptConfig

Structure for interrupt configuration.

Definition at line 241 of file IfxCcu6_TPwm.h.

Data Fields
uint16 | priority | Interrupt priority.
IfxCcu6_ServiceRequest | serviceRequest | Selection of service request outputs.
IfxCcu6_InterruptSource | source | Interrupt source selection.
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxCcu6_TPwm_Pins

struct IfxCcu6_TPwm_Pins

Structure for CCU6 output pin configuration.

Definition at line 251 of file IfxCcu6_TPwm.h.

Collaboration diagram for IfxCcu6_TPwm_Pins:
[legend]
Data Fields
IFX_CONST IfxCcu6_Cc60_Out * | cc60Out | CC60 compare output CC0.
IFX_CONST IfxCcu6_Cc61_Out * | cc61Out | CC61 compare output CC1.
IFX_CONST IfxCcu6_Cc62_Out * | cc62Out | CC62 compare output CC2.
IFX_CONST IfxCcu6_Cout60_Out * | cout60 | CC60 compare output COUT0.
IFX_CONST IfxCcu6_Cout61_Out * | cout61 | CC61 compare output COUT1.
IFX_CONST IfxCcu6_Cout62_Out * | cout62 | CC62 compare output COUT2.
IFX_CONST IfxCcu6_Cout63_Out * | cout63 | CC63 compare output COUT3.
IfxPort_OutputMode | outputMode | The pin output mode which should be configured.
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxCcu6_T12hr_In * | t12hr | T12HR input signal.
IFX_CONST IfxCcu6_T13hr_In * | t13hr | T13HR input signal.
IfxPort_InputMode | t1xhrInputMode | The T1xHR pin input mode which should be configured.

◆ IfxCcu6_TPwm_Timer12

struct IfxCcu6_TPwm_Timer12

Structure for Timer 12.

Definition at line 269 of file IfxCcu6_TPwm.h.

Data Fields
IfxCcu6_T12Channel | channelId | Capture compare channel of the Timer12.
IfxCcu6_T12ChannelMode | channelMode | The operating mode for the T12 channel.
IfxCcu6_TimerInputClock | clockInput | Input clock selection (prescaler)
uint16 | compareValue | 16-bit comapre value of Timer12
uint16 | counterValue | 16-bit counter value of Timer12
IfxCcu6_T12CountMode | countMode | Operating mode of Timer 12.
uint8 | deadTimeValue | Value of the dead time to be induced.

◆ IfxCcu6_TPwm_Timer13

struct IfxCcu6_TPwm_Timer13

Structure for Timer 13.

Definition at line 282 of file IfxCcu6_TPwm.h.

Data Fields
IfxCcu6_TimerInputClock | clockInput | Input clock selection (prescaler)
uint16 | compareValue | 16-bit comapre value of Timer12
uint16 | counterValue | 16-bit counter value of Timer13
IfxCcu6_T13TriggerDirection | t12SyncDirection | Additional information to control trigger event selection.
IfxCcu6_T13TriggerEvent | t12SyncEvent | T12 sync trigger event to start T13.

◆ IfxCcu6_TPwm_TriggerConfig

struct IfxCcu6_TPwm_TriggerConfig

Configuration structure for external triggers.

Definition at line 293 of file IfxCcu6_TPwm.h.

Collaboration diagram for IfxCcu6_TPwm_TriggerConfig:
[legend]
Data Fields
IfxCcu6_ExternalTriggerMode | extInputTriggerMode | Event of signal T1xHR that can set the run bit T1xR by HW.
IfxCcu6_TrigOut | outputLine | Trigger out selection.
IfxCcu6_TrigSel | outputTrigger | Output Trigger selection.
boolean | outputTriggerEnabled | Output trigger connection to VADC enable / disable choice.
IfxCcu6_T12hr_In * | t12ExtInputTrigger | External trigger input signal selection to start the timer 12.
IfxCcu6_T13hr_In * | t13ExtInputTrigger | External trigger input signal selection to start the timer 13.
boolean | t13InSyncWithT12 | Selection of Timer 13 start in sync with T12.

◆ IfxCcu6_TPwm

struct IfxCcu6_TPwm

Module handle.

Definition at line 310 of file IfxCcu6_TPwm.h.

Collaboration diagram for IfxCcu6_TPwm:
[legend]
Data Fields
TPwm | base | Base TPWM object.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_ChannelOut | channelOut | Capture compare output pin selection.
IfxCcu6_TimerId | timer | Timer number (T12 / T13)
IfxCcu6_TPwm_TriggerConfig | trigger | Structure for trigger configuration.

◆ IfxCcu6_TPwm_Config

struct IfxCcu6_TPwm_Config

Configuration structure of the module.

Definition at line 321 of file IfxCcu6_TPwm.h.

Collaboration diagram for IfxCcu6_TPwm_Config:
[legend]
Data Fields
TPwm_Config | base | Base configuration.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_ChannelOut | channelOut | Capture compare output pin selection.
IfxCcu6_TPwm_Clock | clock | Structure for clock configuration.
IfxCcu6_TPwm_InterruptConfig | interrupt1 | Structure for first interrupt configuration.
IfxCcu6_TPwm_InterruptConfig | interrupt2 | Structure for second interrupt configuration.
IfxCcu6_TPwm_InterruptConfig | interrupt3 | Structure for third interrupt configuration.
IfxCcu6_TPwm_InterruptConfig | interrupt4 | Structure for fourth interrupt configuration.
IfxCcu6_TPwm_Pins * | pins | Structure for CCU6 output pin configuration.
IfxCcu6_TimerId | timer | Timer number (T12 / T13)
IfxCcu6_TPwm_Timer12 | timer12 | Structure for Timer 12.
IfxCcu6_TPwm_Timer13 | timer13 | Structure for Timer 13.
IfxCcu6_TPwm_TriggerConfig | trigger | Structure for trigger configuration.


iLLD_TC26B: Module Initialize Functions

Functions
Module Initialize Functions
iLLD » CCU6 » TPWM Interface driver
Collaboration diagram for Module Initialize Functions:

Functions

IFX_EXTERN void IfxCcu6_TPwm_initModuleConfig (IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxCcu6_TPwm_initModuleConfig()

IFX_EXTERN void IfxCcu6_TPwm_initModuleConfig | ( | IfxCcu6_TPwm_Config * | config,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure of the module
ccu6 | Pointer to the base of CCU6 registers
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 342 of file IfxCcu6_TPwm.c.


iLLD_TC26B: Modultion Control Functions

Functions
Modultion Control Functions
iLLD » CCU6 » TPWM Interface driver
Collaboration diagram for Modultion Control Functions:

Functions

IFX_EXTERN void | IfxCcu6_TPwm_initModule (IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_TPwm_pause (IfxCcu6_TPwm *tPwm)
Pauses the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_resume (IfxCcu6_TPwm *tPwm)
Resumes the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_start (IfxCcu6_TPwm *tPwm)
Starts the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_stop (IfxCcu6_TPwm *tPwm)
Stops the triggered PWM. More...

Detailed Description

Function Documentation

◆ IfxCcu6_TPwm_initModule()

IFX_EXTERN void IfxCcu6_TPwm_initModule | ( | IfxCcu6_TPwm * | tPwm,
 |  | const IfxCcu6_TPwm_Config * | config
 | ) |  |

Initialises the module with default configuration.

Parameters
tPwm | Module handle
config | Configuration structure of the module
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 53 of file IfxCcu6_TPwm.c.

◆ IfxCcu6_TPwm_pause()

IFX_EXTERN void IfxCcu6_TPwm_pause ( IfxCcu6_TPwm * tPwm )

Pauses the triggered PWM.

Parameters
tPwm Module handle
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 435 of file IfxCcu6_TPwm.c.

Referenced by IfxCcu6_TPwm_initModule().

◆ IfxCcu6_TPwm_resume()

IFX_EXTERN void IfxCcu6_TPwm_resume ( IfxCcu6_TPwm * tPwm )

Resumes the triggered PWM.

Parameters
tPwm Module handle
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 441 of file IfxCcu6_TPwm.c.

Referenced by IfxCcu6_TPwm_initModule().

◆ IfxCcu6_TPwm_start()

IFX_EXTERN void IfxCcu6_TPwm_start ( IfxCcu6_TPwm * tPwm )

Starts the triggered PWM.

Parameters
tPwm Module handle
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 447 of file IfxCcu6_TPwm.c.

Referenced by IfxCcu6_TPwm_initModule().

◆ IfxCcu6_TPwm_stop()

IFX_EXTERN void IfxCcu6_TPwm_stop ( IfxCcu6_TPwm * tPwm )

Stops the triggered PWM.

Parameters
tPwm Module handle
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 502 of file IfxCcu6_TPwm.c.

Referenced by IfxCcu6_TPwm_initModule().


iLLD_TC26B: IfxCcu6_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxCcu6_cfg.h File Reference
iLLD » CCU6

CCU6 on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxCcu6_reg.h"
#include "IfxCcu6_bf.h"
Include dependency graph for IfxCcu6_cfg.h:

Go to the source code of this file.

Macros

#define | IFXCCU6_NUM_MODULES (2)
#define | IFXCCU6_NUM_SERVICE_REQUESTS (4)
#define | IFXCCU6_NUM_T12_CHANNELS (3)
#define | IFXCCU6_NUM_T13_CHANNELS (1)

Enumerations

enum IfxCcu6_Index {
IfxCcu6_Index_none = -1,
IfxCcu6_Index_0 = 0,
IfxCcu6_Index_1
}
List of the available CCU6 resources. More...
enum IfxCcu6_TrigOut {
IfxCcu6_TrigOut_0 = IFX_CCU6_MOSEL_TRIG0SEL_OFF,
IfxCcu6_TrigOut_1 = IFX_CCU6_MOSEL_TRIG1SEL_OFF,
IfxCcu6_TrigOut_2 = IFX_CCU6_MOSEL_TRIG2SEL_OFF
}
enum IfxCcu6_TrigSel {
IfxCcu6_TrigSel_cout63 = 0,
IfxCcu6_TrigSel_cc60 = 1,
IfxCcu6_TrigSel_cc61 = 1,
IfxCcu6_TrigSel_cc62 = 1,
IfxCcu6_TrigSel_sr1 = 2,
IfxCcu6_TrigSel_sr3 = 3
}

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap [IFXCCU6_NUM_MODULES]

Detailed Description

CCU6 on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_cfg.h.

Macro Definition Documentation

◆ IFXCCU6_NUM_MODULES

#define IFXCCU6_NUM_MODULES (2)

Definition at line 66 of file IfxCcu6_cfg.h.

Referenced by IfxCcu6_getAddress(), and IfxCcu6_getIndex().

◆ IFXCCU6_NUM_SERVICE_REQUESTS

#define IFXCCU6_NUM_SERVICE_REQUESTS (4)

Definition at line 68 of file IfxCcu6_cfg.h.

◆ IFXCCU6_NUM_T12_CHANNELS

#define IFXCCU6_NUM_T12_CHANNELS (3)

Definition at line 70 of file IfxCcu6_cfg.h.

◆ IFXCCU6_NUM_T13_CHANNELS

#define IFXCCU6_NUM_T13_CHANNELS (1)

Definition at line 72 of file IfxCcu6_cfg.h.

Enumeration Type Documentation

◆ IfxCcu6_Index

enum IfxCcu6_Index

List of the available CCU6 resources.

Enumerator
IfxCcu6_Index_none | Not Selected.
IfxCcu6_Index_0 | CCU6 index 0.
IfxCcu6_Index_1 | CCU6 index 1.

Definition at line 80 of file IfxCcu6_cfg.h.

◆ IfxCcu6_TrigOut

enum IfxCcu6_TrigOut
Enumerator
IfxCcu6_TrigOut_0 | Output Trigger Select for CCU6061 TRIG0.
IfxCcu6_TrigOut_1 | Output Trigger Select for CCU6061 TRIG1.
IfxCcu6_TrigOut_2 | Output Trigger Select for CCU6061 TRIG2.

Definition at line 87 of file IfxCcu6_cfg.h.

◆ IfxCcu6_TrigSel

enum IfxCcu6_TrigSel
Enumerator
IfxCcu6_TrigSel_cout63
IfxCcu6_TrigSel_cc60
IfxCcu6_TrigSel_cc61
IfxCcu6_TrigSel_cc62
IfxCcu6_TrigSel_sr1
IfxCcu6_TrigSel_sr3

Definition at line 94 of file IfxCcu6_cfg.h.

Variable Documentation

◆ IfxCcu6_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES]

Definition at line 108 of file IfxCcu6_cfg.h.


iLLD_TC26B: IfxCcu6_PinMap.c File Reference

  • _PinMap
Variables
IfxCcu6_PinMap.c File Reference
iLLD » CCU6

CCU6 I/O map. More...

#include "IfxCcu6_PinMap.h"
Include dependency graph for IfxCcu6_PinMap.c:

Go to the source code of this file.

Variables

IfxCcu6_Cc60_Out | IfxCcu60_CC60_P02_0_OUT = {&MODULE_CCU60, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu60_CC60_P02_6_OUT = {&MODULE_CCU60, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu60_CC60_P11_12_OUT = {&MODULE_CCU60, {&MODULE_P11,12}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu60_CC60_P15_6_OUT = {&MODULE_CCU60, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu61_CC60_P00_1_OUT = {&MODULE_CCU61, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu61_CC60_P00_7_OUT = {&MODULE_CCU61, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu61_CC60_P20_8_OUT = {&MODULE_CCU61, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu61_CC60_P33_13_OUT = {&MODULE_CCU61, {&MODULE_P33,13}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60in_In | IfxCcu60_CC60INA_P02_0_IN = {&MODULE_CCU60, {&MODULE_P02, 0}, Ifx_RxSel_a}
IfxCcu6_Cc60in_In | IfxCcu60_CC60INB_P00_1_IN = {&MODULE_CCU60, {&MODULE_P00, 1}, Ifx_RxSel_b}
IfxCcu6_Cc60in_In | IfxCcu60_CC60INC_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_c}
IfxCcu6_Cc60in_In | IfxCcu61_CC60INA_P00_1_IN = {&MODULE_CCU61, {&MODULE_P00, 1}, Ifx_RxSel_a}
IfxCcu6_Cc60in_In | IfxCcu61_CC60INB_P02_0_IN = {&MODULE_CCU61, {&MODULE_P02, 0}, Ifx_RxSel_b}
IfxCcu6_Cc60in_In | IfxCcu61_CC60INC_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_c}
IfxCcu6_Cc61_Out | IfxCcu60_CC61_P02_2_OUT = {&MODULE_CCU60, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu60_CC61_P02_7_OUT = {&MODULE_CCU60, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu60_CC61_P11_11_OUT = {&MODULE_CCU60, {&MODULE_P11,11}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu60_CC61_P15_5_OUT = {&MODULE_CCU60, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu61_CC61_P00_3_OUT = {&MODULE_CCU61, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu61_CC61_P00_8_OUT = {&MODULE_CCU61, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu61_CC61_P20_9_OUT = {&MODULE_CCU61, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu61_CC61_P33_11_OUT = {&MODULE_CCU61, {&MODULE_P33,11}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61in_In | IfxCcu60_CC61INA_P02_2_IN = {&MODULE_CCU60, {&MODULE_P02, 2}, Ifx_RxSel_a}
IfxCcu6_Cc61in_In | IfxCcu60_CC61INB_P00_3_IN = {&MODULE_CCU60, {&MODULE_P00, 3}, Ifx_RxSel_b}
IfxCcu6_Cc61in_In | IfxCcu60_CC61INC_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_c}
IfxCcu6_Cc61in_In | IfxCcu61_CC61INA_P00_3_IN = {&MODULE_CCU61, {&MODULE_P00, 3}, Ifx_RxSel_a}
IfxCcu6_Cc61in_In | IfxCcu61_CC61INB_P02_2_IN = {&MODULE_CCU61, {&MODULE_P02, 2}, Ifx_RxSel_b}
IfxCcu6_Cc61in_In | IfxCcu61_CC61INC_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_c}
IfxCcu6_Cc62_Out | IfxCcu60_CC62_P02_4_OUT = {&MODULE_CCU60, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu60_CC62_P02_8_OUT = {&MODULE_CCU60, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu60_CC62_P11_10_OUT = {&MODULE_CCU60, {&MODULE_P11,10}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu60_CC62_P15_4_OUT = {&MODULE_CCU60, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu61_CC62_P00_5_OUT = {&MODULE_CCU61, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu61_CC62_P00_9_OUT = {&MODULE_CCU61, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu61_CC62_P20_10_OUT = {&MODULE_CCU61, {&MODULE_P20,10}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu61_CC62_P33_9_OUT = {&MODULE_CCU61, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62in_In | IfxCcu60_CC62INA_P02_4_IN = {&MODULE_CCU60, {&MODULE_P02, 4}, Ifx_RxSel_a}
IfxCcu6_Cc62in_In | IfxCcu60_CC62INB_P00_5_IN = {&MODULE_CCU60, {&MODULE_P00, 5}, Ifx_RxSel_b}
IfxCcu6_Cc62in_In | IfxCcu60_CC62INC_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_c}
IfxCcu6_Cc62in_In | IfxCcu61_CC62INA_P00_5_IN = {&MODULE_CCU61, {&MODULE_P00, 5}, Ifx_RxSel_a}
IfxCcu6_Cc62in_In | IfxCcu61_CC62INB_P02_4_IN = {&MODULE_CCU61, {&MODULE_P02, 4}, Ifx_RxSel_b}
IfxCcu6_Cc62in_In | IfxCcu61_CC62INC_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_c}
IfxCcu6_Ccpos0_In | IfxCcu60_CCPOS0A_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_a}
IfxCcu6_Ccpos0_In | IfxCcu60_CCPOS0C_P10_4_IN = {&MODULE_CCU60, {&MODULE_P10, 4}, Ifx_RxSel_c}
IfxCcu6_Ccpos0_In | IfxCcu60_CCPOS0D_P40_0_IN = {&MODULE_CCU60, {&MODULE_P40, 0}, Ifx_RxSel_d}
IfxCcu6_Ccpos0_In | IfxCcu61_CCPOS0A_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_a}
IfxCcu6_Ccpos0_In | IfxCcu61_CCPOS0C_P33_7_IN = {&MODULE_CCU61, {&MODULE_P33, 7}, Ifx_RxSel_c}
IfxCcu6_Ccpos1_In | IfxCcu60_CCPOS1A_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_a}
IfxCcu6_Ccpos1_In | IfxCcu60_CCPOS1B_P40_1_IN = {&MODULE_CCU60, {&MODULE_P40, 1}, Ifx_RxSel_b}
IfxCcu6_Ccpos1_In | IfxCcu60_CCPOS1C_P10_7_IN = {&MODULE_CCU60, {&MODULE_P10, 7}, Ifx_RxSel_c}
IfxCcu6_Ccpos1_In | IfxCcu60_CCPOS1D_P40_2_IN = {&MODULE_CCU60, {&MODULE_P40, 2}, Ifx_RxSel_d}
IfxCcu6_Ccpos1_In | IfxCcu61_CCPOS1A_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_a}
IfxCcu6_Ccpos1_In | IfxCcu61_CCPOS1B_P40_6_IN = {&MODULE_CCU61, {&MODULE_P40, 6}, Ifx_RxSel_b}
IfxCcu6_Ccpos1_In | IfxCcu61_CCPOS1C_P33_6_IN = {&MODULE_CCU61, {&MODULE_P33, 6}, Ifx_RxSel_c}
IfxCcu6_Ccpos1_In | IfxCcu61_CCPOS1D_P40_7_IN = {&MODULE_CCU61, {&MODULE_P40, 7}, Ifx_RxSel_d}
IfxCcu6_Ccpos2_In | IfxCcu60_CCPOS2A_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_a}
IfxCcu6_Ccpos2_In | IfxCcu60_CCPOS2B_P40_3_IN = {&MODULE_CCU60, {&MODULE_P40, 3}, Ifx_RxSel_b}
IfxCcu6_Ccpos2_In | IfxCcu60_CCPOS2C_P10_8_IN = {&MODULE_CCU60, {&MODULE_P10, 8}, Ifx_RxSel_c}
IfxCcu6_Ccpos2_In | IfxCcu61_CCPOS2A_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_a}
IfxCcu6_Ccpos2_In | IfxCcu61_CCPOS2B_P40_8_IN = {&MODULE_CCU61, {&MODULE_P40, 8}, Ifx_RxSel_b}
IfxCcu6_Ccpos2_In | IfxCcu61_CCPOS2C_P33_5_IN = {&MODULE_CCU61, {&MODULE_P33, 5}, Ifx_RxSel_c}
IfxCcu6_Ccpos2_In | IfxCcu61_CCPOS2D_P40_9_IN = {&MODULE_CCU61, {&MODULE_P40, 9}, Ifx_RxSel_d}
IfxCcu6_Cout60_Out | IfxCcu60_COUT60_P02_1_OUT = {&MODULE_CCU60, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout60_Out | IfxCcu60_COUT60_P11_9_OUT = {&MODULE_CCU60, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout60_Out | IfxCcu60_COUT60_P15_7_OUT = {&MODULE_CCU60, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout60_Out | IfxCcu61_COUT60_P00_2_OUT = {&MODULE_CCU61, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout60_Out | IfxCcu61_COUT60_P20_11_OUT = {&MODULE_CCU61, {&MODULE_P20,11}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout60_Out | IfxCcu61_COUT60_P33_12_OUT = {&MODULE_CCU61, {&MODULE_P33,12}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu60_COUT61_P02_3_OUT = {&MODULE_CCU60, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu60_COUT61_P11_6_OUT = {&MODULE_CCU60, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu60_COUT61_P15_8_OUT = {&MODULE_CCU60, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu61_COUT61_P00_4_OUT = {&MODULE_CCU61, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu61_COUT61_P20_12_OUT = {&MODULE_CCU61, {&MODULE_P20,12}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu61_COUT61_P33_10_OUT = {&MODULE_CCU61, {&MODULE_P33,10}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu60_COUT62_P02_5_OUT = {&MODULE_CCU60, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu60_COUT62_P11_3_OUT = {&MODULE_CCU60, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu60_COUT62_P14_0_OUT = {&MODULE_CCU60, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu61_COUT62_P00_6_OUT = {&MODULE_CCU61, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu61_COUT62_P20_13_OUT = {&MODULE_CCU61, {&MODULE_P20,13}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu61_COUT62_P33_8_OUT = {&MODULE_CCU61, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu60_COUT63_P00_0_OUT = {&MODULE_CCU60, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu60_COUT63_P11_2_OUT = {&MODULE_CCU60, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu60_COUT63_P14_1_OUT = {&MODULE_CCU60, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu60_COUT63_P32_4_OUT = {&MODULE_CCU60, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu61_COUT63_P00_10_OUT = {&MODULE_CCU61, {&MODULE_P00,10}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu61_COUT63_P00_12_OUT = {&MODULE_CCU61, {&MODULE_P00,12}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu61_COUT63_P20_7_OUT = {&MODULE_CCU61, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt7}
IfxCcu6_Ctrap_In | IfxCcu60_CTRAPA_P00_11_IN = {&MODULE_CCU60, {&MODULE_P00,11}, Ifx_RxSel_a}
IfxCcu6_Ctrap_In | IfxCcu61_CTRAPA_P00_0_IN = {&MODULE_CCU61, {&MODULE_P00, 0}, Ifx_RxSel_a}
IfxCcu6_Ctrap_In | IfxCcu61_CTRAPC_P33_4_IN = {&MODULE_CCU61, {&MODULE_P33, 4}, Ifx_RxSel_c}
IfxCcu6_T12hr_In | IfxCcu60_T12HRB_P00_7_IN = {&MODULE_CCU60, {&MODULE_P00, 7}, Ifx_RxSel_b}
IfxCcu6_T12hr_In | IfxCcu60_T12HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c}
IfxCcu6_T12hr_In | IfxCcu60_T12HRE_P00_0_IN = {&MODULE_CCU60, {&MODULE_P00, 0}, Ifx_RxSel_e}
IfxCcu6_T12hr_In | IfxCcu61_T12HRB_P02_6_IN = {&MODULE_CCU61, {&MODULE_P02, 6}, Ifx_RxSel_b}
IfxCcu6_T12hr_In | IfxCcu61_T12HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c}
IfxCcu6_T12hr_In | IfxCcu61_T12HRE_P00_11_IN = {&MODULE_CCU61, {&MODULE_P00,11}, Ifx_RxSel_e}
IfxCcu6_T13hr_In | IfxCcu60_T13HRB_P00_8_IN = {&MODULE_CCU60, {&MODULE_P00, 8}, Ifx_RxSel_b}
IfxCcu6_T13hr_In | IfxCcu60_T13HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c}
IfxCcu6_T13hr_In | IfxCcu61_T13HRB_P02_7_IN = {&MODULE_CCU61, {&MODULE_P02, 7}, Ifx_RxSel_b}
IfxCcu6_T13hr_In | IfxCcu61_T13HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c}
const IfxCcu6_Cc60_Out * | IfxCcu6_Cc60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
const IfxCcu6_Cc60in_In * | IfxCcu6_Cc60in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
const IfxCcu6_Cc61_Out * | IfxCcu6_Cc61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
const IfxCcu6_Cc61in_In * | IfxCcu6_Cc61in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
const IfxCcu6_Cc62_Out * | IfxCcu6_Cc62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
const IfxCcu6_Cc62in_In * | IfxCcu6_Cc62in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
const IfxCcu6_Ccpos0_In * | IfxCcu6_Ccpos0_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
const IfxCcu6_Ccpos1_In * | IfxCcu6_Ccpos1_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
const IfxCcu6_Ccpos2_In * | IfxCcu6_Ccpos2_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
const IfxCcu6_Cout60_Out * | IfxCcu6_Cout60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
const IfxCcu6_Cout61_Out * | IfxCcu6_Cout61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
const IfxCcu6_Cout62_Out * | IfxCcu6_Cout62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
const IfxCcu6_Cout63_Out * | IfxCcu6_Cout63_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
const IfxCcu6_Ctrap_In * | IfxCcu6_Ctrap_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
const IfxCcu6_T12hr_In * | IfxCcu6_T12hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
const IfxCcu6_T13hr_In * | IfxCcu6_T13hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]

Detailed Description

CCU6 I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_PinMap.c.

Variable Documentation

◆ IfxCcu60_CC60_P02_0_OUT

IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT = {&MODULE_CCU60, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt7}

Definition at line 45 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60_P02_6_OUT

IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT = {&MODULE_CCU60, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt7}

Definition at line 46 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60_P11_12_OUT

IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT = {&MODULE_CCU60, {&MODULE_P11,12}, IfxPort_OutputIdx_alt7}

Definition at line 47 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60_P15_6_OUT

IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT = {&MODULE_CCU60, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt7}

Definition at line 48 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60INA_P02_0_IN

IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN = {&MODULE_CCU60, {&MODULE_P02, 0}, Ifx_RxSel_a}

Definition at line 53 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60INB_P00_1_IN

IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN = {&MODULE_CCU60, {&MODULE_P00, 1}, Ifx_RxSel_b}

Definition at line 54 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60INC_P02_6_IN

IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_c}

Definition at line 55 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61_P02_2_OUT

IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT = {&MODULE_CCU60, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt7}

Definition at line 59 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61_P02_7_OUT

IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT = {&MODULE_CCU60, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt7}

Definition at line 60 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61_P11_11_OUT

IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT = {&MODULE_CCU60, {&MODULE_P11,11}, IfxPort_OutputIdx_alt7}

Definition at line 61 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61_P15_5_OUT

IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT = {&MODULE_CCU60, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt7}

Definition at line 62 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61INA_P02_2_IN

IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN = {&MODULE_CCU60, {&MODULE_P02, 2}, Ifx_RxSel_a}

Definition at line 67 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61INB_P00_3_IN

IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN = {&MODULE_CCU60, {&MODULE_P00, 3}, Ifx_RxSel_b}

Definition at line 68 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61INC_P02_7_IN

IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_c}

Definition at line 69 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62_P02_4_OUT

IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT = {&MODULE_CCU60, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt7}

Definition at line 73 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62_P02_8_OUT

IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT = {&MODULE_CCU60, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt7}

Definition at line 74 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62_P11_10_OUT

IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT = {&MODULE_CCU60, {&MODULE_P11,10}, IfxPort_OutputIdx_alt7}

Definition at line 75 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62_P15_4_OUT

IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT = {&MODULE_CCU60, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt7}

Definition at line 76 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62INA_P02_4_IN

IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN = {&MODULE_CCU60, {&MODULE_P02, 4}, Ifx_RxSel_a}

Definition at line 81 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62INB_P00_5_IN

IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN = {&MODULE_CCU60, {&MODULE_P00, 5}, Ifx_RxSel_b}

Definition at line 82 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62INC_P02_8_IN

IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_c}

Definition at line 83 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS0A_P02_6_IN

IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_a}

Definition at line 87 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS0C_P10_4_IN

IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN = {&MODULE_CCU60, {&MODULE_P10, 4}, Ifx_RxSel_c}

Definition at line 88 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS0D_P40_0_IN

IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN = {&MODULE_CCU60, {&MODULE_P40, 0}, Ifx_RxSel_d}

Definition at line 89 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS1A_P02_7_IN

IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_a}

Definition at line 92 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS1B_P40_1_IN

IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN = {&MODULE_CCU60, {&MODULE_P40, 1}, Ifx_RxSel_b}

Definition at line 93 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS1C_P10_7_IN

IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN = {&MODULE_CCU60, {&MODULE_P10, 7}, Ifx_RxSel_c}

Definition at line 94 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS1D_P40_2_IN

IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN = {&MODULE_CCU60, {&MODULE_P40, 2}, Ifx_RxSel_d}

Definition at line 95 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS2A_P02_8_IN

IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_a}

Definition at line 100 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS2B_P40_3_IN

IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN = {&MODULE_CCU60, {&MODULE_P40, 3}, Ifx_RxSel_b}

Definition at line 101 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS2C_P10_8_IN

IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN = {&MODULE_CCU60, {&MODULE_P10, 8}, Ifx_RxSel_c}

Definition at line 102 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT60_P02_1_OUT

IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT = {&MODULE_CCU60, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt7}

Definition at line 107 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT60_P11_9_OUT

IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT = {&MODULE_CCU60, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt7}

Definition at line 108 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT60_P15_7_OUT

IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT = {&MODULE_CCU60, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt7}

Definition at line 109 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT61_P02_3_OUT

IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT = {&MODULE_CCU60, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt7}

Definition at line 113 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT61_P11_6_OUT

IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT = {&MODULE_CCU60, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt7}

Definition at line 114 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT61_P15_8_OUT

IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT = {&MODULE_CCU60, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt7}

Definition at line 115 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT62_P02_5_OUT

IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT = {&MODULE_CCU60, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt7}

Definition at line 119 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT62_P11_3_OUT

IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT = {&MODULE_CCU60, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt7}

Definition at line 120 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT62_P14_0_OUT

IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT = {&MODULE_CCU60, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt7}

Definition at line 121 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT63_P00_0_OUT

IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT = {&MODULE_CCU60, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt7}

Definition at line 125 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT63_P11_2_OUT

IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT = {&MODULE_CCU60, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt7}

Definition at line 126 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT63_P14_1_OUT

IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT = {&MODULE_CCU60, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt7}

Definition at line 127 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT63_P32_4_OUT

IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT = {&MODULE_CCU60, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt7}

Definition at line 128 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CTRAPA_P00_11_IN

IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN = {&MODULE_CCU60, {&MODULE_P00,11}, Ifx_RxSel_a}

Definition at line 132 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_T12HRB_P00_7_IN

IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN = {&MODULE_CCU60, {&MODULE_P00, 7}, Ifx_RxSel_b}

Definition at line 135 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_T12HRC_P00_9_IN

IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c}

Definition at line 136 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_T12HRE_P00_0_IN

IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN = {&MODULE_CCU60, {&MODULE_P00, 0}, Ifx_RxSel_e}

Definition at line 137 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_T13HRB_P00_8_IN

IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN = {&MODULE_CCU60, {&MODULE_P00, 8}, Ifx_RxSel_b}

Definition at line 141 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_T13HRC_P00_9_IN

IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c}

Definition at line 142 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60_P00_1_OUT

IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT = {&MODULE_CCU61, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt7}

Definition at line 49 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60_P00_7_OUT

IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT = {&MODULE_CCU61, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt7}

Definition at line 50 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60_P20_8_OUT

IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT = {&MODULE_CCU61, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt7}

Definition at line 51 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60_P33_13_OUT

IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT = {&MODULE_CCU61, {&MODULE_P33,13}, IfxPort_OutputIdx_alt7}

Definition at line 52 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60INA_P00_1_IN

IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN = {&MODULE_CCU61, {&MODULE_P00, 1}, Ifx_RxSel_a}

Definition at line 56 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60INB_P02_0_IN

IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN = {&MODULE_CCU61, {&MODULE_P02, 0}, Ifx_RxSel_b}

Definition at line 57 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60INC_P00_7_IN

IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_c}

Definition at line 58 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61_P00_3_OUT

IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT = {&MODULE_CCU61, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt7}

Definition at line 63 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61_P00_8_OUT

IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT = {&MODULE_CCU61, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt7}

Definition at line 64 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61_P20_9_OUT

IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT = {&MODULE_CCU61, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt7}

Definition at line 65 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61_P33_11_OUT

IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT = {&MODULE_CCU61, {&MODULE_P33,11}, IfxPort_OutputIdx_alt7}

Definition at line 66 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61INA_P00_3_IN

IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN = {&MODULE_CCU61, {&MODULE_P00, 3}, Ifx_RxSel_a}

Definition at line 70 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61INB_P02_2_IN

IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN = {&MODULE_CCU61, {&MODULE_P02, 2}, Ifx_RxSel_b}

Definition at line 71 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61INC_P00_8_IN

IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_c}

Definition at line 72 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62_P00_5_OUT

IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT = {&MODULE_CCU61, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt7}

Definition at line 77 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62_P00_9_OUT

IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT = {&MODULE_CCU61, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt7}

Definition at line 78 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62_P20_10_OUT

IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT = {&MODULE_CCU61, {&MODULE_P20,10}, IfxPort_OutputIdx_alt7}

Definition at line 79 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62_P33_9_OUT

IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT = {&MODULE_CCU61, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt7}

Definition at line 80 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62INA_P00_5_IN

IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN = {&MODULE_CCU61, {&MODULE_P00, 5}, Ifx_RxSel_a}

Definition at line 84 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62INB_P02_4_IN

IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN = {&MODULE_CCU61, {&MODULE_P02, 4}, Ifx_RxSel_b}

Definition at line 85 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62INC_P00_9_IN

IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_c}

Definition at line 86 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS0A_P00_7_IN

IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_a}

Definition at line 90 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS0C_P33_7_IN

IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN = {&MODULE_CCU61, {&MODULE_P33, 7}, Ifx_RxSel_c}

Definition at line 91 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS1A_P00_8_IN

IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_a}

Definition at line 96 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS1B_P40_6_IN

IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN = {&MODULE_CCU61, {&MODULE_P40, 6}, Ifx_RxSel_b}

Definition at line 97 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS1C_P33_6_IN

IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN = {&MODULE_CCU61, {&MODULE_P33, 6}, Ifx_RxSel_c}

Definition at line 98 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS1D_P40_7_IN

IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN = {&MODULE_CCU61, {&MODULE_P40, 7}, Ifx_RxSel_d}

Definition at line 99 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS2A_P00_9_IN

IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_a}

Definition at line 103 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS2B_P40_8_IN

IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN = {&MODULE_CCU61, {&MODULE_P40, 8}, Ifx_RxSel_b}

Definition at line 104 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS2C_P33_5_IN

IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN = {&MODULE_CCU61, {&MODULE_P33, 5}, Ifx_RxSel_c}

Definition at line 105 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS2D_P40_9_IN

IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN = {&MODULE_CCU61, {&MODULE_P40, 9}, Ifx_RxSel_d}

Definition at line 106 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT60_P00_2_OUT

IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT = {&MODULE_CCU61, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt7}

Definition at line 110 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT60_P20_11_OUT

IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT = {&MODULE_CCU61, {&MODULE_P20,11}, IfxPort_OutputIdx_alt7}

Definition at line 111 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT60_P33_12_OUT

IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT = {&MODULE_CCU61, {&MODULE_P33,12}, IfxPort_OutputIdx_alt7}

Definition at line 112 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT61_P00_4_OUT

IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT = {&MODULE_CCU61, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt7}

Definition at line 116 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT61_P20_12_OUT

IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT = {&MODULE_CCU61, {&MODULE_P20,12}, IfxPort_OutputIdx_alt7}

Definition at line 117 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT61_P33_10_OUT

IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT = {&MODULE_CCU61, {&MODULE_P33,10}, IfxPort_OutputIdx_alt7}

Definition at line 118 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT62_P00_6_OUT

IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT = {&MODULE_CCU61, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt7}

Definition at line 122 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT62_P20_13_OUT

IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT = {&MODULE_CCU61, {&MODULE_P20,13}, IfxPort_OutputIdx_alt7}

Definition at line 123 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT62_P33_8_OUT

IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT = {&MODULE_CCU61, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt7}

Definition at line 124 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT63_P00_10_OUT

IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT = {&MODULE_CCU61, {&MODULE_P00,10}, IfxPort_OutputIdx_alt7}

Definition at line 129 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT63_P00_12_OUT

IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT = {&MODULE_CCU61, {&MODULE_P00,12}, IfxPort_OutputIdx_alt7}

Definition at line 130 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT63_P20_7_OUT

IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT = {&MODULE_CCU61, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt7}

Definition at line 131 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CTRAPA_P00_0_IN

IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN = {&MODULE_CCU61, {&MODULE_P00, 0}, Ifx_RxSel_a}

Definition at line 133 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CTRAPC_P33_4_IN

IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN = {&MODULE_CCU61, {&MODULE_P33, 4}, Ifx_RxSel_c}

Definition at line 134 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_T12HRB_P02_6_IN

IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN = {&MODULE_CCU61, {&MODULE_P02, 6}, Ifx_RxSel_b}

Definition at line 138 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_T12HRC_P02_8_IN

IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c}

Definition at line 139 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_T12HRE_P00_11_IN

IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN = {&MODULE_CCU61, {&MODULE_P00,11}, Ifx_RxSel_e}

Definition at line 140 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_T13HRB_P02_7_IN

IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN = {&MODULE_CCU61, {&MODULE_P02, 7}, Ifx_RxSel_b}

Definition at line 143 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_T13HRC_P02_8_IN

IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c}

Definition at line 144 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc60_Out_pinTable

const IfxCcu6_Cc60_Out* IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC60_P02_0_OUT,
&IfxCcu60_CC60_P02_6_OUT,
&IfxCcu60_CC60_P11_12_OUT,
&IfxCcu60_CC60_P15_6_OUT
},
{
&IfxCcu61_CC60_P00_1_OUT,
&IfxCcu61_CC60_P00_7_OUT,
&IfxCcu61_CC60_P20_8_OUT,
&IfxCcu61_CC60_P33_13_OUT
}
}
IfxCcu60_CC60_P02_0_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT
Definition: IfxCcu6_PinMap.c:45
IfxCcu61_CC60_P33_13_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT
Definition: IfxCcu6_PinMap.c:52
IfxCcu60_CC60_P02_6_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT
Definition: IfxCcu6_PinMap.c:46
IfxCcu61_CC60_P00_7_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT
Definition: IfxCcu6_PinMap.c:50
IfxCcu61_CC60_P00_1_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT
Definition: IfxCcu6_PinMap.c:49
IfxCcu60_CC60_P11_12_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT
Definition: IfxCcu6_PinMap.c:47
IfxCcu61_CC60_P20_8_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT
Definition: IfxCcu6_PinMap.c:51
IfxCcu60_CC60_P15_6_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT
Definition: IfxCcu6_PinMap.c:48

Definition at line 147 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc60in_In_pinTable

const IfxCcu6_Cc60in_In* IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC60INA_P02_0_IN,
&IfxCcu60_CC60INB_P00_1_IN,
&IfxCcu60_CC60INC_P02_6_IN
},
{
&IfxCcu61_CC60INA_P00_1_IN,
&IfxCcu61_CC60INB_P02_0_IN,
&IfxCcu61_CC60INC_P00_7_IN
}
}
IfxCcu60_CC60INC_P02_6_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN
Definition: IfxCcu6_PinMap.c:55
IfxCcu61_CC60INC_P00_7_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN
Definition: IfxCcu6_PinMap.c:58
IfxCcu60_CC60INA_P02_0_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN
Definition: IfxCcu6_PinMap.c:53
IfxCcu61_CC60INB_P02_0_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN
Definition: IfxCcu6_PinMap.c:57
IfxCcu61_CC60INA_P00_1_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN
Definition: IfxCcu6_PinMap.c:56
IfxCcu60_CC60INB_P00_1_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN
Definition: IfxCcu6_PinMap.c:54

Definition at line 162 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc61_Out_pinTable

const IfxCcu6_Cc61_Out* IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC61_P02_2_OUT,
&IfxCcu60_CC61_P02_7_OUT,
&IfxCcu60_CC61_P11_11_OUT,
&IfxCcu60_CC61_P15_5_OUT
},
{
&IfxCcu61_CC61_P00_3_OUT,
&IfxCcu61_CC61_P00_8_OUT,
&IfxCcu61_CC61_P20_9_OUT,
&IfxCcu61_CC61_P33_11_OUT
}
}
IfxCcu60_CC61_P02_2_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT
Definition: IfxCcu6_PinMap.c:59
IfxCcu60_CC61_P02_7_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT
Definition: IfxCcu6_PinMap.c:60
IfxCcu60_CC61_P11_11_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT
Definition: IfxCcu6_PinMap.c:61
IfxCcu61_CC61_P00_3_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT
Definition: IfxCcu6_PinMap.c:63
IfxCcu61_CC61_P33_11_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT
Definition: IfxCcu6_PinMap.c:66
IfxCcu61_CC61_P00_8_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT
Definition: IfxCcu6_PinMap.c:64
IfxCcu61_CC61_P20_9_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT
Definition: IfxCcu6_PinMap.c:65
IfxCcu60_CC61_P15_5_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT
Definition: IfxCcu6_PinMap.c:62

Definition at line 175 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc61in_In_pinTable

const IfxCcu6_Cc61in_In* IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC61INA_P02_2_IN,
&IfxCcu60_CC61INB_P00_3_IN,
&IfxCcu60_CC61INC_P02_7_IN
},
{
&IfxCcu61_CC61INA_P00_3_IN,
&IfxCcu61_CC61INB_P02_2_IN,
&IfxCcu61_CC61INC_P00_8_IN
}
}
IfxCcu60_CC61INB_P00_3_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN
Definition: IfxCcu6_PinMap.c:68
IfxCcu60_CC61INA_P02_2_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN
Definition: IfxCcu6_PinMap.c:67
IfxCcu60_CC61INC_P02_7_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN
Definition: IfxCcu6_PinMap.c:69
IfxCcu61_CC61INB_P02_2_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN
Definition: IfxCcu6_PinMap.c:71
IfxCcu61_CC61INC_P00_8_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN
Definition: IfxCcu6_PinMap.c:72
IfxCcu61_CC61INA_P00_3_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN
Definition: IfxCcu6_PinMap.c:70

Definition at line 190 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc62_Out_pinTable

const IfxCcu6_Cc62_Out* IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC62_P02_4_OUT,
&IfxCcu60_CC62_P02_8_OUT,
&IfxCcu60_CC62_P11_10_OUT,
&IfxCcu60_CC62_P15_4_OUT
},
{
&IfxCcu61_CC62_P00_5_OUT,
&IfxCcu61_CC62_P00_9_OUT,
&IfxCcu61_CC62_P20_10_OUT,
&IfxCcu61_CC62_P33_9_OUT
}
}
IfxCcu61_CC62_P33_9_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT
Definition: IfxCcu6_PinMap.c:80
IfxCcu61_CC62_P00_9_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT
Definition: IfxCcu6_PinMap.c:78
IfxCcu61_CC62_P20_10_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT
Definition: IfxCcu6_PinMap.c:79
IfxCcu61_CC62_P00_5_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT
Definition: IfxCcu6_PinMap.c:77
IfxCcu60_CC62_P02_4_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT
Definition: IfxCcu6_PinMap.c:73
IfxCcu60_CC62_P15_4_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT
Definition: IfxCcu6_PinMap.c:76
IfxCcu60_CC62_P02_8_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT
Definition: IfxCcu6_PinMap.c:74
IfxCcu60_CC62_P11_10_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT
Definition: IfxCcu6_PinMap.c:75

Definition at line 203 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc62in_In_pinTable

const IfxCcu6_Cc62in_In* IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC62INA_P02_4_IN,
&IfxCcu60_CC62INB_P00_5_IN,
&IfxCcu60_CC62INC_P02_8_IN
},
{
&IfxCcu61_CC62INA_P00_5_IN,
&IfxCcu61_CC62INB_P02_4_IN,
&IfxCcu61_CC62INC_P00_9_IN
}
}
IfxCcu61_CC62INB_P02_4_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN
Definition: IfxCcu6_PinMap.c:85
IfxCcu60_CC62INC_P02_8_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN
Definition: IfxCcu6_PinMap.c:83
IfxCcu61_CC62INC_P00_9_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN
Definition: IfxCcu6_PinMap.c:86
IfxCcu60_CC62INB_P00_5_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN
Definition: IfxCcu6_PinMap.c:82
IfxCcu60_CC62INA_P02_4_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN
Definition: IfxCcu6_PinMap.c:81
IfxCcu61_CC62INA_P00_5_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN
Definition: IfxCcu6_PinMap.c:84

Definition at line 218 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Ccpos0_In_pinTable

const IfxCcu6_Ccpos0_In* IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CCPOS0A_P02_6_IN,
NULL_PTR,
&IfxCcu60_CCPOS0C_P10_4_IN,
&IfxCcu60_CCPOS0D_P40_0_IN
},
{
&IfxCcu61_CCPOS0A_P00_7_IN,
NULL_PTR,
&IfxCcu61_CCPOS0C_P33_7_IN,
NULL_PTR
}
}
IfxCcu60_CCPOS0A_P02_6_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN
Definition: IfxCcu6_PinMap.c:87
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu61_CCPOS0C_P33_7_IN
IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN
Definition: IfxCcu6_PinMap.c:91
IfxCcu60_CCPOS0C_P10_4_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN
Definition: IfxCcu6_PinMap.c:88
IfxCcu61_CCPOS0A_P00_7_IN
IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN
Definition: IfxCcu6_PinMap.c:90
IfxCcu60_CCPOS0D_P40_0_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN
Definition: IfxCcu6_PinMap.c:89

Definition at line 231 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Ccpos1_In_pinTable

const IfxCcu6_Ccpos1_In* IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CCPOS1A_P02_7_IN,
&IfxCcu60_CCPOS1B_P40_1_IN,
&IfxCcu60_CCPOS1C_P10_7_IN,
&IfxCcu60_CCPOS1D_P40_2_IN
},
{
&IfxCcu61_CCPOS1A_P00_8_IN,
&IfxCcu61_CCPOS1B_P40_6_IN,
&IfxCcu61_CCPOS1C_P33_6_IN,
&IfxCcu61_CCPOS1D_P40_7_IN
}
}
IfxCcu61_CCPOS1A_P00_8_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN
Definition: IfxCcu6_PinMap.c:96
IfxCcu60_CCPOS1C_P10_7_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN
Definition: IfxCcu6_PinMap.c:94
IfxCcu60_CCPOS1A_P02_7_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN
Definition: IfxCcu6_PinMap.c:92
IfxCcu61_CCPOS1C_P33_6_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN
Definition: IfxCcu6_PinMap.c:98
IfxCcu60_CCPOS1B_P40_1_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN
Definition: IfxCcu6_PinMap.c:93
IfxCcu61_CCPOS1B_P40_6_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN
Definition: IfxCcu6_PinMap.c:97
IfxCcu61_CCPOS1D_P40_7_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN
Definition: IfxCcu6_PinMap.c:99
IfxCcu60_CCPOS1D_P40_2_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN
Definition: IfxCcu6_PinMap.c:95

Definition at line 246 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Ccpos2_In_pinTable

const IfxCcu6_Ccpos2_In* IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CCPOS2A_P02_8_IN,
&IfxCcu60_CCPOS2B_P40_3_IN,
&IfxCcu60_CCPOS2C_P10_8_IN,
NULL_PTR
},
{
&IfxCcu61_CCPOS2A_P00_9_IN,
&IfxCcu61_CCPOS2B_P40_8_IN,
&IfxCcu61_CCPOS2C_P33_5_IN,
&IfxCcu61_CCPOS2D_P40_9_IN
}
}
IfxCcu60_CCPOS2A_P02_8_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN
Definition: IfxCcu6_PinMap.c:100
IfxCcu61_CCPOS2D_P40_9_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN
Definition: IfxCcu6_PinMap.c:106
IfxCcu61_CCPOS2B_P40_8_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN
Definition: IfxCcu6_PinMap.c:104
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu61_CCPOS2A_P00_9_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN
Definition: IfxCcu6_PinMap.c:103
IfxCcu60_CCPOS2C_P10_8_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN
Definition: IfxCcu6_PinMap.c:102
IfxCcu61_CCPOS2C_P33_5_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN
Definition: IfxCcu6_PinMap.c:105
IfxCcu60_CCPOS2B_P40_3_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN
Definition: IfxCcu6_PinMap.c:101

Definition at line 261 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cout60_Out_pinTable

const IfxCcu6_Cout60_Out* IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_COUT60_P02_1_OUT,
&IfxCcu60_COUT60_P11_9_OUT,
&IfxCcu60_COUT60_P15_7_OUT
},
{
&IfxCcu61_COUT60_P00_2_OUT,
&IfxCcu61_COUT60_P20_11_OUT,
&IfxCcu61_COUT60_P33_12_OUT
}
}
IfxCcu61_COUT60_P00_2_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT
Definition: IfxCcu6_PinMap.c:110
IfxCcu61_COUT60_P33_12_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT
Definition: IfxCcu6_PinMap.c:112
IfxCcu60_COUT60_P11_9_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT
Definition: IfxCcu6_PinMap.c:108
IfxCcu60_COUT60_P02_1_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT
Definition: IfxCcu6_PinMap.c:107
IfxCcu61_COUT60_P20_11_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT
Definition: IfxCcu6_PinMap.c:111
IfxCcu60_COUT60_P15_7_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT
Definition: IfxCcu6_PinMap.c:109

Definition at line 276 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cout61_Out_pinTable

const IfxCcu6_Cout61_Out* IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_COUT61_P02_3_OUT,
&IfxCcu60_COUT61_P11_6_OUT,
&IfxCcu60_COUT61_P15_8_OUT
},
{
&IfxCcu61_COUT61_P00_4_OUT,
&IfxCcu61_COUT61_P20_12_OUT,
&IfxCcu61_COUT61_P33_10_OUT
}
}
IfxCcu61_COUT61_P20_12_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT
Definition: IfxCcu6_PinMap.c:117
IfxCcu60_COUT61_P11_6_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT
Definition: IfxCcu6_PinMap.c:114
IfxCcu60_COUT61_P02_3_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT
Definition: IfxCcu6_PinMap.c:113
IfxCcu60_COUT61_P15_8_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT
Definition: IfxCcu6_PinMap.c:115
IfxCcu61_COUT61_P00_4_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT
Definition: IfxCcu6_PinMap.c:116
IfxCcu61_COUT61_P33_10_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT
Definition: IfxCcu6_PinMap.c:118

Definition at line 289 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cout62_Out_pinTable

const IfxCcu6_Cout62_Out* IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_COUT62_P02_5_OUT,
&IfxCcu60_COUT62_P11_3_OUT,
&IfxCcu60_COUT62_P14_0_OUT
},
{
&IfxCcu61_COUT62_P00_6_OUT,
&IfxCcu61_COUT62_P20_13_OUT,
&IfxCcu61_COUT62_P33_8_OUT
}
}
IfxCcu61_COUT62_P00_6_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT
Definition: IfxCcu6_PinMap.c:122
IfxCcu60_COUT62_P02_5_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT
Definition: IfxCcu6_PinMap.c:119
IfxCcu60_COUT62_P14_0_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT
Definition: IfxCcu6_PinMap.c:121
IfxCcu60_COUT62_P11_3_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT
Definition: IfxCcu6_PinMap.c:120
IfxCcu61_COUT62_P33_8_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT
Definition: IfxCcu6_PinMap.c:124
IfxCcu61_COUT62_P20_13_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT
Definition: IfxCcu6_PinMap.c:123

Definition at line 302 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cout63_Out_pinTable

const IfxCcu6_Cout63_Out* IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_COUT63_P00_0_OUT,
&IfxCcu60_COUT63_P11_2_OUT,
&IfxCcu60_COUT63_P14_1_OUT,
&IfxCcu60_COUT63_P32_4_OUT
},
{
&IfxCcu61_COUT63_P00_10_OUT,
&IfxCcu61_COUT63_P00_12_OUT,
&IfxCcu61_COUT63_P20_7_OUT,
NULL_PTR
}
}
IfxCcu60_COUT63_P11_2_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT
Definition: IfxCcu6_PinMap.c:126
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu60_COUT63_P14_1_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT
Definition: IfxCcu6_PinMap.c:127
IfxCcu60_COUT63_P00_0_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT
Definition: IfxCcu6_PinMap.c:125
IfxCcu61_COUT63_P20_7_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT
Definition: IfxCcu6_PinMap.c:131
IfxCcu61_COUT63_P00_12_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT
Definition: IfxCcu6_PinMap.c:130
IfxCcu60_COUT63_P32_4_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT
Definition: IfxCcu6_PinMap.c:128
IfxCcu61_COUT63_P00_10_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT
Definition: IfxCcu6_PinMap.c:129

Definition at line 315 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Ctrap_In_pinTable

const IfxCcu6_Ctrap_In* IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CTRAPA_P00_11_IN,
NULL_PTR,
NULL_PTR
},
{
&IfxCcu61_CTRAPA_P00_0_IN,
NULL_PTR,
&IfxCcu61_CTRAPC_P33_4_IN
}
}
IfxCcu60_CTRAPA_P00_11_IN
IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN
Definition: IfxCcu6_PinMap.c:132
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu61_CTRAPA_P00_0_IN
IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN
Definition: IfxCcu6_PinMap.c:133
IfxCcu61_CTRAPC_P33_4_IN
IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN
Definition: IfxCcu6_PinMap.c:134

Definition at line 330 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_T12hr_In_pinTable

const IfxCcu6_T12hr_In* IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
Initial value:
= {
{
NULL_PTR,
&IfxCcu60_T12HRB_P00_7_IN,
&IfxCcu60_T12HRC_P00_9_IN,
NULL_PTR,
&IfxCcu60_T12HRE_P00_0_IN
},
{
NULL_PTR,
&IfxCcu61_T12HRB_P02_6_IN,
&IfxCcu61_T12HRC_P02_8_IN,
NULL_PTR,
&IfxCcu61_T12HRE_P00_11_IN
}
}
IfxCcu61_T12HRB_P02_6_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN
Definition: IfxCcu6_PinMap.c:138
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu60_T12HRB_P00_7_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN
Definition: IfxCcu6_PinMap.c:135
IfxCcu60_T12HRC_P00_9_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN
Definition: IfxCcu6_PinMap.c:136
IfxCcu60_T12HRE_P00_0_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN
Definition: IfxCcu6_PinMap.c:137
IfxCcu61_T12HRC_P02_8_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN
Definition: IfxCcu6_PinMap.c:139
IfxCcu61_T12HRE_P00_11_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN
Definition: IfxCcu6_PinMap.c:140

Definition at line 343 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_T13hr_In_pinTable

const IfxCcu6_T13hr_In* IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]
Initial value:
= {
{
NULL_PTR,
&IfxCcu60_T13HRB_P00_8_IN,
&IfxCcu60_T13HRC_P00_9_IN
},
{
NULL_PTR,
&IfxCcu61_T13HRB_P02_7_IN,
&IfxCcu61_T13HRC_P02_8_IN
}
}
IfxCcu60_T13HRB_P00_8_IN
IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN
Definition: IfxCcu6_PinMap.c:141
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu60_T13HRC_P00_9_IN
IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN
Definition: IfxCcu6_PinMap.c:142
IfxCcu61_T13HRC_P02_8_IN
IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN
Definition: IfxCcu6_PinMap.c:144
IfxCcu61_T13HRB_P02_7_IN
IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN
Definition: IfxCcu6_PinMap.c:143

Definition at line 360 of file IfxCcu6_PinMap.c.


iLLD_TC26B: IfxCcu6_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxCcu6_PinMap.h File Reference
iLLD » CCU6

CCU6 I/O map. More...

#include <IfxCcu6_reg.h>
#include <_Impl/IfxCcu6_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxCcu6_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_Cc60in_In
CC60IN pin mapping structure. More...
struct | IfxCcu6_Cc61in_In
CC61IN pin mapping structure. More...
struct | IfxCcu6_Cc62in_In
CC62IN pin mapping structure. More...
struct | IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure. More...
struct | IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure. More...
struct | IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure. More...
struct | IfxCcu6_Ctrap_In
CTRAP pin mapping structure. More...
struct | IfxCcu6_T12hr_In
T12HR pin mapping structure. More...
struct | IfxCcu6_T13hr_In
T13HR pin mapping structure. More...
struct | IfxCcu6_Cc60_Out
CC60 pin mapping structure. More...
struct | IfxCcu6_Cc61_Out
CC61 pin mapping structure. More...
struct | IfxCcu6_Cc62_Out
CC62 pin mapping structure. More...
struct | IfxCcu6_Cout60_Out
COUT60 pin mapping structure. More...
struct | IfxCcu6_Cout61_Out
COUT61 pin mapping structure. More...
struct | IfxCcu6_Cout62_Out
COUT62 pin mapping structure. More...
struct | IfxCcu6_Cout63_Out
COUT63 pin mapping structure. More...

Macros

#define | IFXCCU6_PINMAP_NUM_MODULES 2
Table dimensions. More...
#define | IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS 5
#define | IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS 3

Variables

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT
CCU60_CC60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT
CCU60_CC60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT
CCU60_CC60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT
CCU60_CC60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT
CCU61_CC60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT
CCU61_CC60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT
CCU61_CC60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT
CCU61_CC60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN
CCU60_CC60INA: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN
CCU60_CC60INB: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN
CCU60_CC60INC: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN
CCU61_CC60INA: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN
CCU61_CC60INB: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN
CCU61_CC60INC: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT
CCU60_CC61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT
CCU60_CC61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT
CCU60_CC61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT
CCU60_CC61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT
CCU61_CC61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT
CCU61_CC61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT
CCU61_CC61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT
CCU61_CC61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN
CCU60_CC61INA: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN
CCU60_CC61INB: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN
CCU60_CC61INC: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN
CCU61_CC61INA: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN
CCU61_CC61INB: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN
CCU61_CC61INC: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT
CCU60_CC62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT
CCU60_CC62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT
CCU60_CC62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT
CCU60_CC62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT
CCU61_CC62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT
CCU61_CC62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT
CCU61_CC62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT
CCU61_CC62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN
CCU60_CC62INA: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN
CCU60_CC62INB: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN
CCU60_CC62INC: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN
CCU61_CC62INA: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN
CCU61_CC62INB: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN
CCU61_CC62INC: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN
CCU60_CCPOS0A: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN
CCU60_CCPOS0C: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN
CCU60_CCPOS0D: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN
CCU61_CCPOS0A: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN
CCU61_CCPOS0C: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN
CCU60_CCPOS1A: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN
CCU60_CCPOS1B: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN
CCU60_CCPOS1C: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN
CCU60_CCPOS1D: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN
CCU61_CCPOS1A: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN
CCU61_CCPOS1B: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN
CCU61_CCPOS1C: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN
CCU61_CCPOS1D: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN
CCU60_CCPOS2A: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN
CCU60_CCPOS2B: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN
CCU60_CCPOS2C: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN
CCU61_CCPOS2A: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN
CCU61_CCPOS2B: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN
CCU61_CCPOS2C: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN
CCU61_CCPOS2D: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT
CCU60_COUT60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT
CCU60_COUT60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT
CCU60_COUT60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT
CCU61_COUT60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT
CCU61_COUT60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT
CCU61_COUT60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT
CCU60_COUT61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT
CCU60_COUT61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT
CCU60_COUT61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT
CCU61_COUT61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT
CCU61_COUT61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT
CCU61_COUT61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT
CCU60_COUT62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT
CCU60_COUT62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT
CCU60_COUT62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT
CCU61_COUT62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT
CCU61_COUT62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT
CCU61_COUT62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT
CCU60_COUT63: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT
CCU60_COUT63: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT
CCU60_COUT63: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT
CCU60_COUT63: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT
CCU61_COUT63: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT
CCU61_COUT63: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT
CCU61_COUT63: CCU61 output. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN
CCU60_CTRAPA: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN
CCU61_CTRAPA: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN
CCU61_CTRAPC: CCU61 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN
CCU60_T12HRB: CCU60 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN
CCU60_T12HRC: CCU60 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN
CCU60_T12HRE: CCU60 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN
CCU61_T12HRB: CCU61 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN
CCU61_T12HRC: CCU61 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN
CCU61_T12HRE: CCU61 input. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN
CCU60_T13HRB: CCU60 input. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN
CCU60_T13HRC: CCU60 input. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN
CCU61_T13HRB: CCU61 input. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN
CCU61_T13HRC: CCU61 input. More...
IFX_EXTERN const IfxCcu6_Cc60_Out * | IfxCcu6_Cc60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
IfxCcu6_Cc60_Out table. More...
IFX_EXTERN const IfxCcu6_Cc60in_In * | IfxCcu6_Cc60in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
IfxCcu6_Cc60in_In table. More...
IFX_EXTERN const IfxCcu6_Cc61_Out * | IfxCcu6_Cc61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
IfxCcu6_Cc61_Out table. More...
IFX_EXTERN const IfxCcu6_Cc61in_In * | IfxCcu6_Cc61in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
IfxCcu6_Cc61in_In table. More...
IFX_EXTERN const IfxCcu6_Cc62_Out * | IfxCcu6_Cc62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
IfxCcu6_Cc62_Out table. More...
IFX_EXTERN const IfxCcu6_Cc62in_In * | IfxCcu6_Cc62in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
IfxCcu6_Cc62in_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos0_In * | IfxCcu6_Ccpos0_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
IfxCcu6_Ccpos0_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos1_In * | IfxCcu6_Ccpos1_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
IfxCcu6_Ccpos1_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos2_In * | IfxCcu6_Ccpos2_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
IfxCcu6_Ccpos2_In table. More...
IFX_EXTERN const IfxCcu6_Cout60_Out * | IfxCcu6_Cout60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
IfxCcu6_Cout60_Out table. More...
IFX_EXTERN const IfxCcu6_Cout61_Out * | IfxCcu6_Cout61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
IfxCcu6_Cout61_Out table. More...
IFX_EXTERN const IfxCcu6_Cout62_Out * | IfxCcu6_Cout62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
IfxCcu6_Cout62_Out table. More...
IFX_EXTERN const IfxCcu6_Cout63_Out * | IfxCcu6_Cout63_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
IfxCcu6_Cout63_Out table. More...
IFX_EXTERN const IfxCcu6_Ctrap_In * | IfxCcu6_Ctrap_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
IfxCcu6_Ctrap_In table. More...
IFX_EXTERN const IfxCcu6_T12hr_In * | IfxCcu6_T12hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
IfxCcu6_T12hr_In table. More...
IFX_EXTERN const IfxCcu6_T13hr_In * | IfxCcu6_T13hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]
IfxCcu6_T13hr_In table. More...

Detailed Description

CCU6 I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_PinMap.h.


iLLD_TC26B: IfxCcu6_Icu.h File Reference

  • Ccu6
  • Icu
Data Structures | Functions
IfxCcu6_Icu.h File Reference
iLLD » CCU6

CCU6 ICU details. More...

#include "Ccu6/Std/IfxCcu6.h"
#include "If/Ccu6If/Icu.h"
#include "Ccu6/Timer/IfxCcu6_Timer.h"
Include dependency graph for IfxCcu6_Icu.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_Icu_Clock
Structure for clock configuration. More...
struct | IfxCcu6_Icu_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_Icu_Pins
Structure for capture input pins. More...
struct | IfxCcu6_Icu_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_Icu
Module handle. More...
struct | IfxCcu6_Icu_Channel
Channel handle. More...
struct | IfxCcu6_Icu_ChannelConfig
Configuration structure of the channel. More...
struct | IfxCcu6_Icu_Config
Configuration structure of the module. More...

Functions

IFX_EXTERN void | IfxCcu6_Icu_initModule (IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_Icu_initModuleConfig (IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
IFX_EXTERN uint32 | IfxCcu6_Icu_getTimeStamp (IfxCcu6_Icu_Channel *channel)
Returns the cuurent value stored in the Compare Shadow register (current time stamp) More...
IFX_EXTERN void | IfxCcu6_Icu_startCapture (IfxCcu6_Icu_Channel *channel)
Starts the input capture. More...
IFX_EXTERN void | IfxCcu6_Icu_stopCapture (IfxCcu6_Icu_Channel *channel)
Stops the input capture. More...
IFX_EXTERN void | IfxCcu6_Icu_initChannel (IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
Initialises the channel. More...
IFX_EXTERN void | IfxCcu6_Icu_initChannelConfig (IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
Fills the channel config structure with default values. More...

Detailed Description

CCU6 ICU details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_Icu.h.


iLLD_TC26B: IfxCcu6_PwmBc.h File Reference

  • Ccu6
  • PwmBc
Data Structures | Functions
IfxCcu6_PwmBc.h File Reference
iLLD » CCU6

CCU6 PWMBC details. More...

#include "Ccu6/Std/IfxCcu6.h"
#include "If/Ccu6If/PwmHl.h"
Include dependency graph for IfxCcu6_PwmBc.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_PwmBc_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_PwmBc_MultiChannelControl
Structure for multichannel mode control. More...
struct | IfxCcu6_PwmBc_Pins
Structure for CCU6 output pin configuration. More...
struct | IfxCcu6_PwmBc_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_PwmBc_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_PwmBc_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_PwmBc
Module handle. More...
struct | IfxCcu6_PwmBc_Config
Configuration structure of the module. More...

Functions

IFX_EXTERN void | IfxCcu6_PwmBc_initModule (IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_PwmBc_initModuleConfig (IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxCcu6_PwmBc_start (IfxCcu6_PwmBc *pwmBc)
Starts the Hall sensored based PWM. More...
IFX_EXTERN void | IfxCcu6_PwmBc_stop (IfxCcu6_PwmBc *pwmBc)
Stops the Hall sensored based PWM. More...
IFX_EXTERN uint32 | IfxCcu6_PwmBc_getMotorSpeed (IfxCcu6_PwmBc *pwmBc)
returns the current motor speed More...
IFX_EXTERN void | IfxCcu6_PwmBc_updateHallPattern (IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
Updates the Hall pattern. More...

Detailed Description

CCU6 PWMBC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_PwmBc.h.


iLLD_TC26B: IfxCcu6_PwmHl.h File Reference

  • Ccu6
  • PwmHl
Data Structures | Macros | Typedefs | Functions
IfxCcu6_PwmHl.h File Reference
iLLD » CCU6

CCU6 PWMHL details. More...

#include "StdIf/IfxStdIf_PwmHl.h"
#include "Ccu6/TimerWithTrigger/IfxCcu6_TimerWithTrigger.h"
Include dependency graph for IfxCcu6_PwmHl.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxCcu6_PwmHl_Config
CCU6: PWM HL configuration. More...
struct | IfxCcu6_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxCcu6_PwmHl_s
CCU6 PWM driver. More...

Macros

#define IFXCCU6_PWMHL_MAX_CHANNELS (3)
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output. More...

Typedefs

typedef struct IfxCcu6_PwmHl_s | IfxCcu6_PwmHl
typedef void(* | IfxCcu6_PwmHl_Update) (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)

Functions

IFX_EXTERN boolean | IfxCcu6_PwmHl_init (IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
Initializes the timer object. More...
IFX_EXTERN void | IfxCcu6_PwmHl_initConfig (IfxCcu6_PwmHl_Config *config)
Initialize the configuration structure to default. More...
IFX_INLINE Ifx_ActiveState | IfxCcu6_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_EXTERN float32 | IfxCcu6_PwmHl_getDeadtime (IfxCcu6_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxCcu6_PwmHl_getMinPulse (IfxCcu6_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxCcu6_PwmHl_getMode (IfxCcu6_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setDeadtime (IfxCcu6_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setMinPulse (IfxCcu6_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setMode (IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxCcu6_PwmHl_setOnTime (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are complementary. More...
IFX_EXTERN void | IfxCcu6_PwmHl_setupChannels (IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

CCU6 PWMHL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_PwmHl.h.

Macro Definition Documentation

◆ IFXCCU6_PWMHL_MAX_CHANNELS

#define IFXCCU6_PWMHL_MAX_CHANNELS (3)

Maximal number of channels handled by the driver. One channel has a top and bottom pwm output.

Definition at line 78 of file IfxCcu6_PwmHl.h.

Referenced by IfxCcu6_PwmHl_init().

Typedef Documentation

◆ IfxCcu6_PwmHl

typedef struct IfxCcu6_PwmHl_s IfxCcu6_PwmHl

Definition at line 84 of file IfxCcu6_PwmHl.h.

◆ IfxCcu6_PwmHl_Update

typedef void(* IfxCcu6_PwmHl_Update) (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)

Definition at line 86 of file IfxCcu6_PwmHl.h.


iLLD_TC26B: IfxCcu6.h File Reference

  • Ccu6
  • Std
Enumerations | Functions
IfxCcu6.h File Reference
iLLD » CCU6

CCU6 basic functionality. More...

#include "_Impl/IfxCcu6_cfg.h"
#include "Src/Std/IfxSrc.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
#include "_Utilities/Ifx_Assert.h"
#include "_PinMap/IfxCcu6_PinMap.h"
Include dependency graph for IfxCcu6.h:

Go to the source code of this file.

Enumerations

enum IfxCcu6_CaptureCompareInput {
IfxCcu6_CaptureCompareInput_cC60 = IFX_CCU6_PISEL0_ISCC60_OFF,
IfxCcu6_CaptureCompareInput_cC61 = IFX_CCU6_PISEL0_ISCC61_OFF,
IfxCcu6_CaptureCompareInput_cC62 = IFX_CCU6_PISEL0_ISCC62_OFF,
IfxCcu6_CaptureCompareInput_cTRAP = IFX_CCU6_PISEL0_ISTRP_OFF,
IfxCcu6_CaptureCompareInput_cCPOS0 = IFX_CCU6_PISEL0_ISPOS0_OFF,
IfxCcu6_CaptureCompareInput_cCPOS1 = IFX_CCU6_PISEL0_ISPOS1_OFF,
IfxCcu6_CaptureCompareInput_cCPOS2 = IFX_CCU6_PISEL0_ISPOS2_OFF
}
Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )
Definition in Ifx_CCU.PISEL0. More...
enum IfxCcu6_CaptureCompareInputSignal {
IfxCcu6_CaptureCompareInputSignal_a = 0,
IfxCcu6_CaptureCompareInputSignal_b = 1,
IfxCcu6_CaptureCompareInputSignal_c = 2,
IfxCcu6_CaptureCompareInputSignal_d = 3
}
Selection of actual input signal for the capture compare inputs. More...
enum IfxCcu6_CaptureCompareState {
IfxCcu6_CaptureCompareState_set = 0,
IfxCcu6_CaptureCompareState_clear = 1,
IfxCcu6_CaptureCompareState_toggle = 2
}
capture/compare state to set / clear the CC6xST-bits More...
enum IfxCcu6_ChannelOut {
IfxCcu6_ChannelOut_cc0 = 0,
IfxCcu6_ChannelOut_cout0 = 1,
IfxCcu6_ChannelOut_cc1 = 2,
IfxCcu6_ChannelOut_cout1 = 3,
IfxCcu6_ChannelOut_cc2 = 4,
IfxCcu6_ChannelOut_cout2 = 5,
IfxCcu6_ChannelOut_cout3 = 6
}
Capture compare output pins. More...
enum IfxCcu6_CountingInputMode {
IfxCcu6_CountingInputMode_internal = 0,
IfxCcu6_CountingInputMode_manual = 1,
IfxCcu6_CountingInputMode_externalRising = 2,
IfxCcu6_CountingInputMode_externalFalling = 3
}
Defines the input event leading to a counting action of the timer (T12 / T13)
Definition in Ifx_CCU.PISEL2.B.ISCNT12 / Ifx_CCU.PISEL2.B.ISCNT13. More...
enum IfxCcu6_DelayBypass {
IfxCcu6_DelayBypass_notActive = 0,
IfxCcu6_DelayBypass_active = 1
}
Controls whether the source signal for the sampling of the Hall input pattern (selected by HSYNC) is delayed by the Dead-Time Counter 0
Definition in Ifx_CCU.T12MSEL.B.DBYP. More...
enum IfxCcu6_ExternalTriggerMode {
IfxCcu6_ExternalTriggerMode_disable = 0,
IfxCcu6_ExternalTriggerMode_risingEdge = 1,
IfxCcu6_ExternalTriggerMode_fallingEdge = 2,
IfxCcu6_ExternalTriggerMode_anyEdge = 3
}
Defines the event of signal T1xHR that can set the run bit T1xR by HW
Definition in Ifx_CCU.TCTR2.B.T12RSEL / IIfx_CCU.TCTR2.B.T13RSEL. More...
enum IfxCcu6_HallSensorTriggerMode {
IfxCcu6_HallSensorTriggerMode_permanentCheck = 0,
IfxCcu6_HallSensorTriggerMode_cM63 = 1,
IfxCcu6_HallSensorTriggerMode_t13PM = 2,
IfxCcu6_HallSensorTriggerMode_off = 3,
IfxCcu6_HallSensorTriggerMode_t12PMCountingUp = 4,
IfxCcu6_HallSensorTriggerMode_t12OMCountingDown = 5,
IfxCcu6_HallSensorTriggerMode_cM61CountingUp = 6,
IfxCcu6_HallSensorTriggerMode_cM61CountingDown = 7
}
Defines the source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields
Definition in Ifx_CCU.T12MSEL.HSYNC. More...
enum IfxCcu6_InterruptSource {
IfxCcu6_InterruptSource_cc60RisingEdge = IFX_CCU6_IS_ICC60R_OFF,
IfxCcu6_InterruptSource_cc60FallingEdge = IFX_CCU6_IS_ICC60F_OFF,
IfxCcu6_InterruptSource_cc61RisingEdge = IFX_CCU6_IS_ICC61R_OFF,
IfxCcu6_InterruptSource_cc61FallingEdge = IFX_CCU6_IS_ICC61F_OFF,
IfxCcu6_InterruptSource_cc62RisingEdge = IFX_CCU6_IS_ICC62R_OFF,
IfxCcu6_InterruptSource_cc62FallingEdge = IFX_CCU6_IS_ICC62F_OFF,
IfxCcu6_InterruptSource_t12OneMatch = IFX_CCU6_IS_T12OM_OFF,
IfxCcu6_InterruptSource_t12PeriodMatch = IFX_CCU6_IS_T12PM_OFF,
IfxCcu6_InterruptSource_t13CompareMatch = IFX_CCU6_IS_T13CM_OFF,
IfxCcu6_InterruptSource_t13PeriodMatch = IFX_CCU6_IS_T13PM_OFF,
IfxCcu6_InterruptSource_trap = IFX_CCU6_IS_TRPF_OFF,
IfxCcu6_InterruptSource_correctHallEvent = IFX_CCU6_IS_CHE_OFF,
IfxCcu6_InterruptSource_wrongHallEvent = IFX_CCU6_IS_WHE_OFF
}
Interrupt source selection Description in Ifx_CCU.IEN. More...
enum IfxCcu6_MultiChannelSwitchingSelect {
IfxCcu6_MultiChannelSwitchingSelect_noEvent = 0,
IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent = 1,
IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch = 2,
IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch = 3,
IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch = 4,
IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch = 5
}
Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP
Definition in Ifx_CCU.MCMCTR.B.SWSEL. More...
enum IfxCcu6_MultiChannelSwitchingSync {
IfxCcu6_MultiChannelSwitchingSync_direct = 0,
IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch = 1,
IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch = 2
}
Selection of the synchronization mechanism for the shadow transfer event MCM_ST
Definition in Ifx_CCU.MCMCTR.B.SWSYN. More...
enum IfxCcu6_ServiceRequest {
IfxCcu6_ServiceRequest_0 = 0,
IfxCcu6_ServiceRequest_1,
IfxCcu6_ServiceRequest_2,
IfxCcu6_ServiceRequest_3
}
Selection of service request outputs. More...
enum IfxCcu6_SleepMode {
IfxCcu6_SleepMode_enable = 0,
IfxCcu6_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CCU6.CLC.B.EDIS. More...
enum IfxCcu6_SuspendMode {
IfxCcu6_SuspendMode_none = 0,
IfxCcu6_SuspendMode_hard = 1,
IfxCcu6_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxCcu6_T12Channel {
IfxCcu6_T12Channel_0 = 0,
IfxCcu6_T12Channel_1,
IfxCcu6_T12Channel_2
}
Capture compare channel of Timer12. More...
enum IfxCcu6_T12ChannelMode {
IfxCcu6_T12ChannelMode_off = 0,
IfxCcu6_T12ChannelMode_compareMode = 1,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling = 4,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising = 5,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling = 6,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny = 7,
IfxCcu6_T12ChannelMode_hallSensor = 8,
IfxCcu6_T12ChannelMode_hysteresisLikecompare = 9,
IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling = 10,
IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising = 11,
IfxCcu6_T12ChannelMode_multiInputCaptureBothRising = 12,
IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling = 13,
IfxCcu6_T12ChannelMode_multiInputCaptureAny = 14
}
The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x. More...
enum IfxCcu6_T12CountDirection {
IfxCcu6_T12CountDirection_up = 0,
IfxCcu6_T12CountDirection_down = 1
}
Counting direction of Timer12
Definition in Ifx_CCU.TCTR0.B.CDIR. More...
enum IfxCcu6_T12CountMode {
IfxCcu6_T12CountMode_edgeAligned = 0,
IfxCcu6_T12CountMode_centerAligned = 1
}
Operating mode of Timer 12
Definition in Ifx_CCU.TCTR0.B.CTM. More...
enum IfxCcu6_T13TriggerDirection {
IfxCcu6_T13TriggerDirection_noAction = 0,
IfxCcu6_T13TriggerDirection_onT12CountingUp = 1,
IfxCcu6_T13TriggerDirection_onT12CountingDown = 2,
IfxCcu6_T13TriggerDirection_anyT12 = 3
}
Delivers additional information to control the automatic set of bit T13R in the case that the trigger action defined by T13 trigger event control (T13TEC) is detected.
Definition in Ifx_CCU.TCTR2.B.T13TED. More...
enum IfxCcu6_T13TriggerEvent {
IfxCcu6_T13TriggerEvent_noAction = 0,
IfxCcu6_T13TriggerEvent_onCC60RCompare = 1,
IfxCcu6_T13TriggerEvent_onCC61RCompare = 2,
IfxCcu6_T13TriggerEvent_onCC62RCompare = 3,
IfxCcu6_T13TriggerEvent_onAnyT12Compare = 4,
IfxCcu6_T13TriggerEvent_onT12Period = 5,
IfxCcu6_T13TriggerEvent_onT12Zero = 6,
IfxCcu6_T13TriggerEvent_onCCPOSxEdge = 7
}
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare signals)
Definition in Ifx_CCU.TCTR2.B.T13TEC. More...
enum IfxCcu6_TimerId {
IfxCcu6_TimerId_t12 = 0,
IfxCcu6_TimerId_t13 = 1
}
Timer number ( T12 / T13 ) More...
enum IfxCcu6_TimerInputClock {
IfxCcu6_TimerInputClock_fcc6 = 0,
IfxCcu6_TimerInputClock_fcc6By2 = 1,
IfxCcu6_TimerInputClock_fcc6By4 = 2,
IfxCcu6_TimerInputClock_fcc6By8 = 3,
IfxCcu6_TimerInputClock_fcc6By16 = 4,
IfxCcu6_TimerInputClock_fcc6By32 = 5,
IfxCcu6_TimerInputClock_fcc6By64 = 6,
IfxCcu6_TimerInputClock_fcc6By128 = 7
}
Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according to the equation
Definition in Ifx_CCU.TCTR0.B.T12CLK / Ifx_CCU.TCTR0.B.T13CLK. More...
enum IfxCcu6_TimerInputSignal {
IfxCcu6_TimerInputSignal_a = 0,
IfxCcu6_TimerInputSignal_b = 1,
IfxCcu6_TimerInputSignal_c = 2,
IfxCcu6_TimerInputSignal_d = 3,
IfxCcu6_TimerInputSignal_e = 0,
IfxCcu6_TimerInputSignal_f = 1,
IfxCcu6_TimerInputSignal_g = 2,
IfxCcu6_TimerInputSignal_h = 3
}
Selection of actual input signal for the timer inputs. More...
enum IfxCcu6_TimerRunStatus {
IfxCcu6_TimerRunStatus_stopped = 0,
IfxCcu6_TimerRunStatus_running = 1
}
Timer (T12 / T13) run status
Definition in Ifx_CCU.TCTR0.B.T12R and Ifx_CCU.TCTR0.B.T13R. More...
enum IfxCcu6_TrapMode {
IfxCcu6_TrapMode_automatic = 0,
IfxCcu6_TrapMode_manual = 1
}
Defines how the trap flag TRPF can be cleared after the trap input condition is no longer valid (either by CTRAP = 1 or by TRPPEN = 0)
Definition in Ifx_CCU.TRPCTR.B.TRPM2. More...
enum IfxCcu6_TrapState {
IfxCcu6_TrapState_t12Sync = 0,
IfxCcu6_TrapState_t13Sync = 1,
IfxCcu6_TrapState_immediate = 3
}
Defines the behavior of the selected outputs when leaving the trap state, after the trap condition has become inactive again
Definition in Ifx_CCU.TRPCTR.B.TRPMx (x = 0, 1) More...

Functions

IFX_INLINE void | IfxCcu6_clearCounter (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Clears the counters of the Timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_clearDeadTimeCounters (Ifx_CCU6 *ccu6)
Clears all the three dead-time counter channels to zero. More...
IFX_INLINE void | IfxCcu6_clearInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Clears the selected interrupt flag. More...
IFX_INLINE void | IfxCcu6_clearT12OneNotification (Ifx_CCU6 *ccu6)
Clears the T12 One notification. More...
IFX_INLINE void | IfxCcu6_clearT12PeriodNotification (Ifx_CCU6 *ccu6)
Clears the T12 period notification. More...
IFX_INLINE void | IfxCcu6_clearT13CompareNotification (Ifx_CCU6 *ccu6)
Clears the T13 compare notification. More...
IFX_INLINE volatile uint32 * | IfxCcu6_getT12TimerPointer (Ifx_CCU6 *ccu6)
Returns the Timer pointer. More...
IFX_INLINE boolean | IfxCcu6_isModuleEnabled (Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled. More...
IFX_INLINE boolean | IfxCcu6_isT12OneNotification (Ifx_CCU6 *ccu6)
Returns the status of T12 one notification. More...
IFX_INLINE boolean | IfxCcu6_isT12PeriodNotification (Ifx_CCU6 *ccu6)
Returns the status of T12 period notification. More...
IFX_INLINE boolean | IfxCcu6_isT13CompareNotification (Ifx_CCU6 *ccu6)
Returns the status of T13 compare notification. More...
IFX_INLINE void | IfxCcu6_setCountingInputMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13). More...
IFX_INLINE void | IfxCcu6_setCurrentHallPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the current hall pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setDeadTimeValue (Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (dead time) More...
IFX_INLINE void | IfxCcu6_setExpectedHallPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the expected hall pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setExternalRunMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW. More...
IFX_INLINE void | IfxCcu6_setHallSensorTriggerMode (Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode)
Sets source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields. More...
IFX_INLINE void | IfxCcu6_setInputClockFrequency (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency)
Sets the input clock for timers (T12 or T13) More...
IFX_INLINE void | IfxCcu6_setInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Sets the selected interrupt flag. More...
IFX_INLINE void | IfxCcu6_setMultiChannelPwmPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the output pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setMultiChannelSwitchingMode (Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP. More...
IFX_INLINE void | IfxCcu6_setMultiChannelSwitchingSync (Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
Sets the synchronization mechanism of the shadow transfer event MCM_ST
if it has been requested before (flag R set by an event selected by SWSEL) and if MCMEN = 1. More...
IFX_INLINE void | IfxCcu6_setOutputPassiveState (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the state of the corresponding compare channel, that is considered to be the passive state. More...
IFX_INLINE void | IfxCcu6_setSingleShotModeEnable (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_setT12ChannelMode (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels. More...
IFX_INLINE void | IfxCcu6_setT12CountMode (Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
IFX_INLINE void | IfxCcu6_setT12CounterValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12. More...
IFX_INLINE void | IfxCcu6_setT12PeriodValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match. More...
IFX_INLINE void | IfxCcu6_setT13CompareValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit compare value of Timer13 (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setT13CounterValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13. More...
IFX_INLINE void | IfxCcu6_setT13PeriodValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match. More...
IFX_INLINE void | IfxCcu6_setT13TriggerEventDirection (Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction. More...
IFX_INLINE void | IfxCcu6_setT13TriggerEventMode (Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare signals) More...
IFX_INLINE void | IfxCcu6_setTrapMode (Ifx_CCU6 *ccu6, IfxCcu6_TrapMode mode)
Sets the mode of clearing the trap flag TRPF after the trap input condition is no longer valid. More...
IFX_INLINE void | IfxCcu6_setTrapState (Ifx_CCU6 *ccu6, IfxCcu6_TrapState state)
Sets behaviour of the selected outputs when leaving the trap state after the trap condition has become inactive again. More...
IFX_INLINE void | IfxCcu6_startTimer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_stopTimer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_updateHallPattern (Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output)
Updates the hall pattern (current hall, expected hall, moduleation output), in a single write. More...
IFX_EXTERN void | IfxCcu6_connectTrigger (Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
IFX_EXTERN void | IfxCcu6_routeInterruptNode (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests. More...
IFX_EXTERN void | IfxCcu6_setOutputPassiveLevel (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module. More...
IFX_EXTERN void | IfxCcu6_setT12CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xST (x=0,1,2) More...
IFX_EXTERN void | IfxCcu6_setT12CompareValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers) More...
IFX_EXTERN float32 | IfxCcu6_setT12Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : CaptureFrequency. More...
IFX_EXTERN void | IfxCcu6_setT12InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs. More...
IFX_EXTERN void | IfxCcu6_setT13CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63ST. More...
IFX_EXTERN float32 | IfxCcu6_setT13Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : captureFrequency. More...
IFX_EXTERN void | IfxCcu6_setT13InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs. More...
IFX_INLINE boolean | IfxCcu6_getDeadTimeStatus (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Indicate the status of the dead time generation for each compare channel (0, 1, 2) of timer T12. More...
IFX_INLINE boolean | IfxCcu6_getHallPatternSampleState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the value of the input Hall pattern of the Timer12 capture/compare channels CC6POS6x (x = 0, 1, 2)
that has been compared to the current and expected value. More...
IFX_INLINE boolean | IfxCcu6_getInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Gets the status of the selected interrupt flag. More...
IFX_INLINE boolean | IfxCcu6_getMultiChannelModeAvailabilityStatus (Ifx_CCU6 *ccu6)
indicates if the multi-channel mode functionality is available More...
IFX_INLINE boolean | IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus (Ifx_CCU6 *ccu6)
Gets the status of the shadow transfer request from MCMPS to MCMP. More...
IFX_INLINE boolean | IfxCcu6_getShadowTransferStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) shadow transfer enable status. More...
IFX_INLINE boolean | IfxCcu6_getT12CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the state of the Timer12 capture/compare channels CC6xST (x = 0, 1, 2) More...
IFX_INLINE IfxCcu6_T12CountDirection | IfxCcu6_getT12CountDirection (Ifx_CCU6 *ccu6)
Returns the current counting direction of Timer12. More...
IFX_INLINE boolean | IfxCcu6_getT13CaptureCompareState (Ifx_CCU6 *ccu6)
Returns the state of the Timer13 capture/compare channel CC63ST. More...
IFX_INLINE boolean | IfxCcu6_getTimerAvailabilityStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability More...
IFX_INLINE IfxCcu6_TimerRunStatus | IfxCcu6_getTimerRunStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) run status. More...
IFX_INLINE boolean | IfxCcu6_isModuleSuspended (Ifx_CCU6 *ccu6)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxCcu6_setSuspendMode (Ifx_CCU6 *ccu6, IfxCcu6_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN Ifx_CCU6 * | IfxCcu6_getAddress (IfxCcu6_Index ccu6)
Returns the module index of the selected CCU6 module. More...
IFX_EXTERN uint32 | IfxCcu6_getCaptureRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel. More...
IFX_EXTERN uint32 | IfxCcu6_getCaptureShadowRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel. More...
IFX_EXTERN IfxCcu6_Index | IfxCcu6_getIndex (Ifx_CCU6 *ccu6)
Returns CCU6 index. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxCcu6_getSrcAddress (Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register. More...
IFX_EXTERN uint32 | IfxCcu6_readTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the current value of the timer register. More...
IFX_INLINE void | IfxCcu6_clearAllInterruptStatusFlags (Ifx_CCU6 *ccu6)
Clears all Interrupt flags. More...
IFX_INLINE void | IfxCcu6_disableAdditionalPrescaler (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies. More...
IFX_INLINE void | IfxCcu6_disableDeadTime (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Disables the dead time generation for each compare channel (0, 1, 2) of Timer12. More...
IFX_INLINE void | IfxCcu6_disableDelayBypass (Ifx_CCU6 *ccu6)
Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) More...
IFX_INLINE void | IfxCcu6_disableInterrupt (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Disables the selected interrupt. More...
IFX_INLINE void | IfxCcu6_disableMultiChannelMode (Ifx_CCU6 *ccu6)
Sets multi channel mode unavailable, A write access to MCMOUTS is ignored. More...
IFX_INLINE void | IfxCcu6_disableShadowTransfer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_disableSingleShotMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the single shot-mode of Timers (T12 T13). More...
IFX_INLINE void | IfxCcu6_disableT13InvertedModulation (Ifx_CCU6 *ccu6)
Disables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST. More...
IFX_INLINE void | IfxCcu6_disableTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block unavailable, A write access to T12PR is ignored. More...
IFX_INLINE void | IfxCcu6_disableTrap (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Disables the trap functionality for the corresponding output signals. More...
IFX_INLINE void | IfxCcu6_disableTrapPin (Ifx_CCU6 *ccu6)
Disables the input (pin) function for the trap generation. More...
IFX_INLINE void | IfxCcu6_enableAdditionalPrescaler (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies. More...
IFX_INLINE void | IfxCcu6_enableCountEvent (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Sets the single shot-mode of Timers (T12, T13). More...
IFX_INLINE void | IfxCcu6_enableDeadTime (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12. More...
IFX_INLINE void | IfxCcu6_enableDelayBypass (Ifx_CCU6 *ccu6)
Enables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) by the Dead-Time Counter 0. More...
IFX_INLINE void | IfxCcu6_enableHallPatternShadowTransfer (Ifx_CCU6 *ccu6)
Sets HP_ST immediately to update bit fields EXPH and CURH by EXPHS and CURHS. More...
IFX_INLINE void | IfxCcu6_enableInterrupt (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelMode (Ifx_CCU6 *ccu6)
Sets multi channel mode available, A write access to MCMOUTS is executed. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelModeAvailability (Ifx_CCU6 *ccu6)
Enables the Multi Channel Mode Availability. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelPwmPatternShadowTransfer (Ifx_CCU6 *ccu6)
Sets MCM_ST immediately to update bit field MCMP by the value of MCMPS. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 one match is detected while counting down. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 period match is detected while counting up. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T13_ST if flag MCMOUT.R is set or
becomes set while a T13 period match is detected. More...
IFX_INLINE void | IfxCcu6_enableShadowTransfer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_enableSingleShotMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the single shot-mode of Timers (T12 T13). More...
IFX_INLINE void | IfxCcu6_enableT13InvertedModulation (Ifx_CCU6 *ccu6)
Enables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST. More...
IFX_INLINE void | IfxCcu6_enableTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed. More...
IFX_INLINE void | IfxCcu6_enableTrap (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Enables the trap functionality for the corresponding output signals. More...
IFX_INLINE void | IfxCcu6_enableTrapPin (Ifx_CCU6 *ccu6)
Enables the input (pin) function for the trap generation. More...
IFX_INLINE void | IfxCcu6_setCaptureCompareInputSignal (Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareInput input, IfxCcu6_CaptureCompareInputSignal signal)
selects the actual input signal for the capture compare inputs. More...
IFX_EXTERN void | IfxCcu6_disableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
IFX_EXTERN void | IfxCcu6_disableModule (Ifx_CCU6 *ccu6)
Disables the selected CCU6 kernel. More...
IFX_EXTERN void | IfxCcu6_enableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
IFX_EXTERN void | IfxCcu6_enableModule (Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel. More...
IFX_INLINE void | IfxCcu6_initCc60InPin (const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode)
Initialises a CC60 input pin. More...
IFX_INLINE void | IfxCcu6_initCc60OutPin (const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin. More...
IFX_INLINE void | IfxCcu6_initCc61InPin (const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode)
Initialises a CC61 input pin. More...
IFX_INLINE void | IfxCcu6_initCc61OutPin (const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin. More...
IFX_INLINE void | IfxCcu6_initCc62InPin (const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode)
Initialises a CC62 input pin. More...
IFX_INLINE void | IfxCcu6_initCc62OutPin (const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin. More...
IFX_INLINE void | IfxCcu6_initCcpos0Pin (const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin. More...
IFX_INLINE void | IfxCcu6_initCcpos1Pin (const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode)
Initialises a CCPOS1 input pin. More...
IFX_INLINE void | IfxCcu6_initCcpos2Pin (const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin. More...
IFX_INLINE void | IfxCcu6_initCout60Pin (const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin. More...
IFX_INLINE void | IfxCcu6_initCout61Pin (const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin. More...
IFX_INLINE void | IfxCcu6_initCout62Pin (const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin. More...
IFX_INLINE void | IfxCcu6_initCout63Pin (const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin. More...
IFX_INLINE void | IfxCcu6_initCtrapPin (const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode)
Initialises a CTRAP input pin. More...
IFX_INLINE void | IfxCcu6_initT12hrPin (const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin. More...
IFX_INLINE void | IfxCcu6_initT13hrPin (const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin. More...
IFX_INLINE void | IfxCcu6_initCc60InPinWithPadLevel (const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC60 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCc61InPinWithPadLevel (const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC61 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCc62InPinWithPadLevel (const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC62 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCcpos0PinWithPadLevel (const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS0 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCcpos1PinWithPadLevel (const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS1 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCcpos2PinWithPadLevel (const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS2 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCtrapPinWithPadLevel (const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CTRAP pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initT12hrPinWithPadLevel (const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T12HR pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initT13hrPinWithPadLevel (const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T13HR pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_setSleepMode (Ifx_CCU6 *ccu6, IfxCcu6_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN void | IfxCcu6_resetModule (Ifx_CCU6 *ccu6)

Detailed Description

CCU6 basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6.h.

Function Documentation

◆ IfxCcu6_initCc60InPinWithPadLevel()

IFX_INLINE void IfxCcu6_initCc60InPinWithPadLevel | ( | const IfxCcu6_Cc60in_In * | cc60In,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CC60 pin direction as input and configuring pad driver.

Parameters
cc60In | CC60 capture input CC60IN
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1737 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCc61InPinWithPadLevel()

IFX_INLINE void IfxCcu6_initCc61InPinWithPadLevel | ( | const IfxCcu6_Cc61in_In * | cc61In,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CC61 pin direction as input and configuring pad driver.

Parameters
cc61In | CC61 capture input CC61IN
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1759 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCc62InPinWithPadLevel()

IFX_INLINE void IfxCcu6_initCc62InPinWithPadLevel | ( | const IfxCcu6_Cc62in_In * | cc62In,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CC62 pin direction as input and configuring pad driver.

Parameters
cc62In | CC62 capture input CC62IN
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1781 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCcpos0PinWithPadLevel()

IFX_INLINE void IfxCcu6_initCcpos0PinWithPadLevel | ( | const IfxCcu6_Ccpos0_In * | ccpos0,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CCPOS0 pin direction as input and configuring pad driver.

Parameters
ccpos0 | CC60 capture input CCPOS0
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1803 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCcpos1PinWithPadLevel()

IFX_INLINE void IfxCcu6_initCcpos1PinWithPadLevel | ( | const IfxCcu6_Ccpos1_In * | ccpos1,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CCPOS1 pin direction as input and configuring pad driver.

Parameters
ccpos1 | CC61 capture input CCPOS1
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1818 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCcpos2PinWithPadLevel()

IFX_INLINE void IfxCcu6_initCcpos2PinWithPadLevel | ( | const IfxCcu6_Ccpos2_In * | ccpos2,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CCPOS2 pin direction as input and configuring pad driver.

Parameters
ccpos2 | CC62 capture input CCPOS2
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1833 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCtrapPinWithPadLevel()

IFX_INLINE void IfxCcu6_initCtrapPinWithPadLevel | ( | const IfxCcu6_Ctrap_In * | ctrap,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CTRAP pin direction as input and configuring pad driver.

Parameters
ctrap | CTRAP input
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1876 of file IfxCcu6.h.

◆ IfxCcu6_initT12hrPinWithPadLevel()

IFX_INLINE void IfxCcu6_initT12hrPinWithPadLevel | ( | const IfxCcu6_T12hr_In * | t12hrIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of T12HR pin direction as input and configuring pad driver.

Parameters
t12hrIn | Timer 12 HR input T12HR
inputMode | The pin input mode which should be configured
padDriver | Pad driver
Returns
None

Definition at line 1891 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initT13hrPinWithPadLevel()

IFX_INLINE void IfxCcu6_initT13hrPinWithPadLevel | ( | const IfxCcu6_T13hr_In * | t13hrIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of T13HR pin direction as input and configuring pad driver.

Parameters
t13hrIn | Timer 13 HR input T13HR
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1906 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_resetModule()

IFX_EXTERN void IfxCcu6_resetModule ( Ifx_CCU6 * ccu6 )
Parameters
ccu6 pointer to ccu6 registers
Returns
None

Definition at line 264 of file IfxCcu6.c.

◆ IfxCcu6_setSleepMode()

IFX_INLINE void IfxCcu6_setSleepMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
ccu6 | pointer to CCU6 registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 2051 of file IfxCcu6.h.


iLLD_TC26B: IfxCcu6_Timer.h File Reference

  • Ccu6
  • Timer
Data Structures | Functions
IfxCcu6_Timer.h File Reference
iLLD » CCU6

CCU6 TIMER details. More...

#include "Ccu6/Std/IfxCcu6.h"
#include "If/Ccu6If/Timer.h"
Include dependency graph for IfxCcu6_Timer.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_Timer_Clock
Structure for clock configuration. More...
struct | IfxCcu6_Timer_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_Timer_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_Timer_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_Timer_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_Timer_Pins
Structure for CCU6 output pin configuration. More...
struct | IfxCcu6_Timer
Module handle. More...
struct | IfxCcu6_Timer_Config
Configuration structure of the module. More...

Functions

IFX_EXTERN void | IfxCcu6_Timer_initModule (IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_Timer_initModuleConfig (IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxCcu6_Timer_countOneStep (IfxCcu6_Timer *timer)
Counts the timer one step. More...
IFX_EXTERN void | IfxCcu6_Timer_start (IfxCcu6_Timer *timer)
Starts the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_startSingleShotMode (IfxCcu6_Timer *timer)
Starts the single shot mode of the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_stop (IfxCcu6_Timer *timer)
Stops the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_synchronousStart (IfxCcu6_Timer *timer)
Starts both the timers together. More...
IFX_EXTERN void | IfxCcu6_Timer_synchronousStop (IfxCcu6_Timer *timer)
Starts both the timers together. More...

Detailed Description

CCU6 TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_Timer.h.

Data Structure Documentation

◆ IfxCcu6_Timer_Pins

struct IfxCcu6_Timer_Pins

Structure for CCU6 output pin configuration.

Definition at line 282 of file IfxCcu6_Timer.h.

Collaboration diagram for IfxCcu6_Timer_Pins:
[legend]
Data Fields
IFX_CONST IfxCcu6_T12hr_In * | t12hr | T12HR input signal.
IFX_CONST IfxCcu6_T13hr_In * | t13hr | T13HR input signal.
IfxPort_InputMode | t1xhrInputMode | The T1xHR pin input mode which should be configured.


iLLD_TC26B: IfxCcu6_TimerWithTrigger.h File Reference

  • Ccu6
  • TimerWithTrigger
Data Structures | Functions
IfxCcu6_TimerWithTrigger.h File Reference
iLLD » CCU6

CCU6 TIMERWITHTRIGGER details. More...

#include "_PinMap/IfxCcu6_PinMap.h"
#include "Ccu6/Std/IfxCcu6.h"
#include "StdIf/IfxStdIf_Timer.h"
Include dependency graph for IfxCcu6_TimerWithTrigger.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_TimerWithTrigger_Base
Structure for the timer base. More...
struct | IfxCcu6_TimerWithTrigger
CCU6 Timer interface. More...
struct | IfxCcu6_TimerWithTrigger_Config
Configuration structure for T12 and T13 Timer. More...

Functions

IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_applyUpdate (IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_disableUpdate (IfxCcu6_TimerWithTrigger *driver)
Disables the upadte
This function is has an empty body as the updated is disabled automatically after the shadow transfer. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxCcu6_TimerWithTrigger_getPeriod (IfxCcu6_TimerWithTrigger *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getResolution (IfxCcu6_TimerWithTrigger *driver)
Returns the resolution. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_run (IfxCcu6_TimerWithTrigger *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_setFrequency (IfxCcu6_TimerWithTrigger *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_setPeriod (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_setSingleMode (IfxCcu6_TimerWithTrigger *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_setTrigger (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_stop (IfxCcu6_TimerWithTrigger *driver)
Stops the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_updateInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Updates the input frequency. More...
IFX_EXTERN volatile uint32 * | IfxCcu6_TimerWithTrigger_getPointer (IfxCcu6_TimerWithTrigger *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_init (IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
Initialises the timer object
T12 is configured as timer, T13 is optionally configured as trigger
T12CLK, T12PRE and T12PR are chosen to achieve maximum PWM resolution
Note: To achieve maximum PWM resolution, the requested T12 frequency should be the
lowest PWM frequency.
. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_initConfig (IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
Initializes the configuration structure to default. More...

Detailed Description

CCU6 TIMERWITHTRIGGER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_TimerWithTrigger.h.

Data Structure Documentation

◆ IfxCcu6_TimerWithTrigger

struct IfxCcu6_TimerWithTrigger

CCU6 Timer interface.

Definition at line 87 of file IfxCcu6_TimerWithTrigger.h.

Collaboration diagram for IfxCcu6_TimerWithTrigger:
[legend]
Data Fields
IfxCcu6_TimerWithTrigger_Base | base | Timer base structure.
Ifx_CCU6 * | ccu6 | CCU6 module used for the timer functionality.

◆ IfxCcu6_TimerWithTrigger_Config

struct IfxCcu6_TimerWithTrigger_Config

Configuration structure for T12 and T13 Timer.

Definition at line 95 of file IfxCcu6_TimerWithTrigger.h.

Collaboration diagram for IfxCcu6_TimerWithTrigger_Config:
[legend]
Data Fields
IfxStdIf_Timer_Config | base | Standard interface timer configuration.
Ifx_CCU6 * | ccu6 | CCU6 module used for the timer functionality.
IfxCcu6_ServiceRequest | serviceReqNrPeriod | Service request used for the period.
IfxCcu6_ServiceRequest | serviceReqNrTrigger | Service request used for the Trigger.
IfxCcu6_Cout63_Out * | triggerOut |


iLLD_TC26B: IfxCcu6_TPwm.h File Reference

  • Ccu6
  • TPwm
Data Structures | Functions
IfxCcu6_TPwm.h File Reference
iLLD » CCU6

CCU6 TPWM details. More...

#include "Ccu6/Std/IfxCcu6.h"
#include "If/Ccu6If/TPwm.h"
Include dependency graph for IfxCcu6_TPwm.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_TPwm_Clock
Structure for clock configuration. More...
struct | IfxCcu6_TPwm_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_TPwm_Pins
Structure for CCU6 output pin configuration. More...
struct | IfxCcu6_TPwm_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_TPwm_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_TPwm_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_TPwm
Module handle. More...
struct | IfxCcu6_TPwm_Config
Configuration structure of the module. More...

Functions

IFX_EXTERN void | IfxCcu6_TPwm_initModuleConfig (IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxCcu6_TPwm_initModule (IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_TPwm_pause (IfxCcu6_TPwm *tPwm)
Pauses the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_resume (IfxCcu6_TPwm *tPwm)
Resumes the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_start (IfxCcu6_TPwm *tPwm)
Starts the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_stop (IfxCcu6_TPwm *tPwm)
Stops the triggered PWM. More...

Detailed Description

CCU6 TPWM details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_TPwm.h.


iLLD_TC26B: CIF

Modules | Files
CIF
iLLD
Collaboration diagram for CIF:

Modules

Implementation
Standard Driver
CIF Pin Mapping
CAM

Files

file | IfxCif_cfg.h
CIF on-chip implementation data.
file | IfxCif_PinMap.c
CIF I/O map.
file | IfxCif_PinMap.h
CIF I/O map.
file | IfxCif_Cam.h
CIF CAM details.
file | IfxCif.h
CIF basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » CIF
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » CIF
Collaboration diagram for Standard Driver:

Modules

Standard Enumerations
ISP Enumerations
Standard Functions
ISP Functions
Linear Downscaler Functions
Linear Downscaler Enumerations
Memory Interface Functions
Memory Interface Enumerations
JPEG Encoder Functions
JPEG Encoder Enumerations
Security Watchdog Functions
Security Watchdog Enumerations
ISP Image Stabilization Functions
ISP Image Stabilization Enumerations
Extra Path Functions
Extra Path Enumerations
Debug Path Functions
Debug Path Enumerations

Detailed Description


iLLD_TC26B: Standard Enumerations

Enumerations
Standard Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for Standard Enumerations:

Enumerations

enum IfxCif_DataPathSelectorForMainPath {
IfxCif_DataPathSelectorForMainPath_Disabled = 0,
IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed = 1,
IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder = 2
}
Enumerator for data path of main path. More...
enum IfxCif_ErrorState {
IfxCif_ErrorState_NoError = 0,
IfxCif_ErrorState_Error = 1
}
Enumerator for the state of an error. More...
enum IfxCif_ExtraPath {
IfxCif_ExtraPath_1 = 0,
IfxCif_ExtraPath_2 = 1,
IfxCif_ExtraPath_3 = 2,
IfxCif_ExtraPath_4 = 3,
IfxCif_ExtraPath_5 = 4
}
Enumerator for the extra paths. More...
enum IfxCif_ImageTiers {
IfxCif_ImageTiers_Horizontal = 0,
IfxCif_ImageTiers_Vertical = 1
}
Enumerator for tiers. More...
enum IfxCif_InputInterface { IfxCif_InputInterface_ParallelInterface = 0 }
Enumerator for input interfaces supported by the CIF interface. More...
enum IfxCif_InterruptTriggeredState {
IfxCif_InterruptTriggeredState_NotTriggered = 0,
IfxCif_InterruptTriggeredState_Triggered = 1
}
Enumerator for the state of an interrupt. More...
enum IfxCif_PortInputSelection {
IfxCif_PortInputSelection_PinMapping0 = 0,
IfxCif_PortInputSelection_PinMapping1 = 1
}
Enumerator for port input selections. More...
enum IfxCif_State {
IfxCif_State_Disabled = 0,
IfxCif_State_Enabled = 1
}
Enumerator for states. More...
enum IfxCif_Submodules {
IfxCif_Submodules_AllModules = 0,
IfxCif_Submodules_Debug = 1,
IfxCif_Submodules_ExtraPaths = 2,
IfxCif_Submodules_LinearDownscaler = 3,
IfxCif_Submodules_SecurityWatchdog = 4,
IfxCif_Submodules_MemoryInterface = 5,
IfxCif_Submodules_JpegEncoder = 6,
IfxCif_Submodules_ImageSignalProcessing = 7,
IfxCif_Submodules_YCSplitter = 8
}
Enumerator for submodules of the CIF interface. More...
enum IfxCif_YCSplitterChannelMode {
IfxCif_YCSplitterChannelMode_Disabled = 0,
IfxCif_YCSplitterChannelMode_MainPathAndRawMode = 1
}
Enumerator for channel mode of Y/C splitter. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCif_DataPathSelectorForMainPath

enum IfxCif_DataPathSelectorForMainPath

Enumerator for data path of main path.

Enumerator
IfxCif_DataPathSelectorForMainPath_Disabled | Main path is disabled.
IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed | Main path is routed to the Memory Interface.
IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder | Main path is routed to the JPEG encoder.

Definition at line 100 of file IfxCif.h.

◆ IfxCif_ErrorState

enum IfxCif_ErrorState

Enumerator for the state of an error.

Enumerator
IfxCif_ErrorState_NoError | No error occurred.
IfxCif_ErrorState_Error | Error occurred.

Definition at line 109 of file IfxCif.h.

◆ IfxCif_ExtraPath

enum IfxCif_ExtraPath

Enumerator for the extra paths.

Enumerator
IfxCif_ExtraPath_1
IfxCif_ExtraPath_2
IfxCif_ExtraPath_3
IfxCif_ExtraPath_4
IfxCif_ExtraPath_5

Definition at line 117 of file IfxCif.h.

◆ IfxCif_ImageTiers

enum IfxCif_ImageTiers

Enumerator for tiers.

Enumerator
IfxCif_ImageTiers_Horizontal | Horizontal tier.
IfxCif_ImageTiers_Vertical | Vertical tier.

Definition at line 128 of file IfxCif.h.

◆ IfxCif_InputInterface

enum IfxCif_InputInterface

Enumerator for input interfaces supported by the CIF interface.

Enumerator
IfxCif_InputInterface_ParallelInterface

Parallel interface (currently the only supported input interface)

Definition at line 136 of file IfxCif.h.

◆ IfxCif_InterruptTriggeredState

enum IfxCif_InterruptTriggeredState

Enumerator for the state of an interrupt.

Enumerator
IfxCif_InterruptTriggeredState_NotTriggered | Interrupt was not triggered.
IfxCif_InterruptTriggeredState_Triggered | Interrupt was triggered.

Definition at line 143 of file IfxCif.h.

◆ IfxCif_PortInputSelection

enum IfxCif_PortInputSelection

Enumerator for port input selections.

Enumerator
IfxCif_PortInputSelection_PinMapping0 | pin mapping 0
IfxCif_PortInputSelection_PinMapping1 | pin mapping 1

Definition at line 151 of file IfxCif.h.

◆ IfxCif_State

enum IfxCif_State

Enumerator for states.

Enumerator
IfxCif_State_Disabled | Disabled state.
IfxCif_State_Enabled | Enabled state.

Definition at line 159 of file IfxCif.h.

◆ IfxCif_Submodules

enum IfxCif_Submodules

Enumerator for submodules of the CIF interface.

Enumerator
IfxCif_Submodules_AllModules | All submodules.
IfxCif_Submodules_Debug | Debug submodule.
IfxCif_Submodules_ExtraPaths | Extra Paths submodule.
IfxCif_Submodules_LinearDownscaler | Linear Downscaler submodule.
IfxCif_Submodules_SecurityWatchdog | Security Watchdog submodule.
IfxCif_Submodules_MemoryInterface | Memory Interface submodule.
IfxCif_Submodules_JpegEncoder | JPEG Encoder submodule.
IfxCif_Submodules_ImageSignalProcessing | Image Signal Processing submodule.
IfxCif_Submodules_YCSplitter | Y/C-Splitter submodule.

Definition at line 167 of file IfxCif.h.

◆ IfxCif_YCSplitterChannelMode

enum IfxCif_YCSplitterChannelMode

Enumerator for channel mode of Y/C splitter.

Enumerator
IfxCif_YCSplitterChannelMode_Disabled | Y/C splitter is disabled.
IfxCif_YCSplitterChannelMode_MainPathAndRawMode | Y/C splitter is enabled for main path and RAW mode.

Definition at line 182 of file IfxCif.h.


iLLD_TC26B: ISP Enumerations

Enumerations
ISP Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for ISP Enumerations:

Enumerations

enum IfxCif_IspCcirSequence {
IfxCif_IspCcirSequence_YCbYCr = 0,
IfxCif_IspCcirSequence_YCrYCb = 1,
IfxCif_IspCcirSequence_CbYCrY = 2
}
Enumerator for the ISP CCIR sequence. More...
enum IfxCif_IspColorSpaceMatrixCrominanceClippingRange {
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_16To240 = 0,
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255 = 1
}
Enumerator for the clipping range of the crominance for the ISP output. More...
enum IfxCif_IspColorSpaceMatrixLuminanceClippingRange {
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_16To235 = 0,
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255 = 1
}
Enumerator for the clipping range of the luminance for the ISP output. More...
enum IfxCif_IspErrorSources {
IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule = 0,
IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule = 1,
IfxCif_IspErrorSources_SizeErrorInInformSubmodule = 2
}
Enumerator for error sources of the ISP module. More...
enum IfxCif_IspFieldSelection {
IfxCif_IspFieldSelection_AllFields = 0,
IfxCif_IspFieldSelection_OnlyEvenFields = 1,
IfxCif_IspFieldSelection_OnlyOddFields = 2
}
Enumerator for the sampled input fields. More...
enum IfxCif_IspInformFieldInformation {
IfxCif_IspInformFieldInformation_Odd = 0,
IfxCif_IspInformFieldInformation_Even = 1
}
Enumerator for current field information. More...
enum IfxCif_IspInputInterface {
IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb = 0,
IfxCif_IspInputInterface_8BitExternalInterfaceAppendZeros = 1,
IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb = 2,
IfxCif_IspInputInterface_10BitExternalInterfaceAppendZeros = 3,
IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb = 4,
IfxCif_IspInputInterface_12BitExternalInterfaceAppendZeros = 5,
IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb = 6,
IfxCif_IspInputInterface_14BitExternalInterfaceAppendZeros = 7,
IfxCif_IspInputInterface_16BitExternalInterface = 8
}
Enumerator for the supported input interfaces of the ISP. More...
enum IfxCif_IspInterruptSources {
IfxCif_IspInterruptSources_SecurityWatchdogTimeout = 0,
IfxCif_IspInterruptSources_StartEdgeOfHSync = 1,
IfxCif_IspInterruptSources_StartEdgeOfVSync = 2,
IfxCif_IspInterruptSources_SampledInputFrameComplete = 3,
IfxCif_IspInterruptSources_PictureSizeViolationOccurred = 4,
IfxCif_IspInterruptSources_LossOfData = 5,
IfxCif_IspInterruptSources_FrameCompletelyPutOut = 6,
IfxCif_IspInterruptSources_IspTurnedOff = 7
}
Enumerator for interrupt sources of the ISP submodule. More...
enum IfxCif_IspMode {
IfxCif_IspMode_RawPicture = 0,
IfxCif_IspMode_ItuRBT656 = 1,
IfxCif_IspMode_ItuRBT601 = 2,
IfxCif_IspMode_DataMode = 4,
IfxCif_IspMode_RawPictureWithItuRBT656Sync = 6
}
Enumerator for the ISP mode. More...
enum IfxCif_IspSamplingEdge {
IfxCif_IspSamplingEdge_NegativeEdge = 0,
IfxCif_IspSamplingEdge_PositiveEdge = 1
}
Enumerator for ISP sampling edge. More...
enum IfxCif_IspSyncPolarity {
IfxCif_IspSyncPolarity_HighActive = 0,
IfxCif_IspSyncPolarity_LowActive = 1
}

Detailed Description

Enumeration Type Documentation

◆ IfxCif_IspCcirSequence

enum IfxCif_IspCcirSequence

Enumerator for the ISP CCIR sequence.

Enumerator
IfxCif_IspCcirSequence_YCbYCr | YCbYCr.
IfxCif_IspCcirSequence_YCrYCb | YCrYCb.
IfxCif_IspCcirSequence_CbYCrY | CbYCrY.

Definition at line 194 of file IfxCif.h.

◆ IfxCif_IspColorSpaceMatrixCrominanceClippingRange

enum IfxCif_IspColorSpaceMatrixCrominanceClippingRange

Enumerator for the clipping range of the crominance for the ISP output.

Enumerator
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_16To240 | CbCr range 16..240 according to ITU-R BT.601 standard.
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255 | full UV range 0..255

Definition at line 203 of file IfxCif.h.

◆ IfxCif_IspColorSpaceMatrixLuminanceClippingRange

enum IfxCif_IspColorSpaceMatrixLuminanceClippingRange

Enumerator for the clipping range of the luminance for the ISP output.

Enumerator
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_16To235 | Y range 16..235 according to ITU-R BT.601 standard.
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255 | full Y range 0..255

Definition at line 211 of file IfxCif.h.

◆ IfxCif_IspErrorSources

enum IfxCif_IspErrorSources

Enumerator for error sources of the ISP module.

Enumerator
IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule | Size error is generated in outmux submodule.
IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule | Size error is generated in image stabilization submodule.
IfxCif_IspErrorSources_SizeErrorInInformSubmodule | ize error is generated in inform submodule

Definition at line 219 of file IfxCif.h.

◆ IfxCif_IspFieldSelection

enum IfxCif_IspFieldSelection

Enumerator for the sampled input fields.

Enumerator
IfxCif_IspFieldSelection_AllFields | sample all fields (don't care about fields)
IfxCif_IspFieldSelection_OnlyEvenFields | sample only even fields
IfxCif_IspFieldSelection_OnlyOddFields | sample only odd fields

Definition at line 228 of file IfxCif.h.

◆ IfxCif_IspInformFieldInformation

enum IfxCif_IspInformFieldInformation

Enumerator for current field information.

Enumerator
IfxCif_IspInformFieldInformation_Odd | Odd field.
IfxCif_IspInformFieldInformation_Even | Even field.

Definition at line 237 of file IfxCif.h.

◆ IfxCif_IspInputInterface

enum IfxCif_IspInputInterface

Enumerator for the supported input interfaces of the ISP.

Enumerator
IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb | 8-bit external Interface if enabled append 8 MSBs as LSBs
IfxCif_IspInputInterface_8BitExternalInterfaceAppendZeros | 8-bit external Interface if enabled append 8 zeroes as LSBs
IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb | 10-bit external Interface if enabled append 6 MSBs as LSBs
IfxCif_IspInputInterface_10BitExternalInterfaceAppendZeros | 10-bit external Interface if enabled append 6 zeroes as LSBs
IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb | 12-bit external Interface if enabled append 4 MSBs as LSBs
IfxCif_IspInputInterface_12BitExternalInterfaceAppendZeros | 12-bit external Interface if enabled append 4 zeroes as LSBs
IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb | 14-bit external Interface if enabled append 2 MSBs as LSBs
IfxCif_IspInputInterface_14BitExternalInterfaceAppendZeros | 14-bit external Interface if enabled append 2 zeroes as LSBs
IfxCif_IspInputInterface_16BitExternalInterface | 16-bit external Interface

Definition at line 245 of file IfxCif.h.

◆ IfxCif_IspInterruptSources

enum IfxCif_IspInterruptSources

Enumerator for interrupt sources of the ISP submodule.

Enumerator
IfxCif_IspInterruptSources_SecurityWatchdogTimeout | A watchdog timeout was triggered at the ISP input.
IfxCif_IspInterruptSources_StartEdgeOfHSync | Start Edge of h_sync.
IfxCif_IspInterruptSources_StartEdgeOfVSync | Start Edge of v_sync.
IfxCif_IspInterruptSources_SampledInputFrameComplete | Sampled Input Frame is Complete.
IfxCif_IspInterruptSources_PictureSizeViolationOccurred | Picture Size Violation Occurred.
IfxCif_IspInterruptSources_LossOfData | Loss of Data.
IfxCif_IspInterruptSources_FrameCompletelyPutOut | Frame was Completely Put Out.
IfxCif_IspInterruptSources_IspTurnedOff | Isp was Turned Off (vsynced)

Definition at line 260 of file IfxCif.h.

◆ IfxCif_IspMode

enum IfxCif_IspMode

Enumerator for the ISP mode.

Enumerator
IfxCif_IspMode_RawPicture | RAW picture.
IfxCif_IspMode_ItuRBT656 | ITU-R BT.656 (YUV with embedded sync)
IfxCif_IspMode_ItuRBT601 | ITU-R BT.601 (YUV input with H and Vsync signals)
IfxCif_IspMode_DataMode | datamode (ISP bypass, sync signals interpreted as data enable)
IfxCif_IspMode_RawPictureWithItuRBT656Sync | RAW picture mode with ITU-R BT.656 synchronization.

Definition at line 274 of file IfxCif.h.

◆ IfxCif_IspSamplingEdge

enum IfxCif_IspSamplingEdge

Enumerator for ISP sampling edge.

Enumerator
IfxCif_IspSamplingEdge_NegativeEdge | negative edge sampling
IfxCif_IspSamplingEdge_PositiveEdge | positive edge sampling

Definition at line 285 of file IfxCif.h.

◆ IfxCif_IspSyncPolarity

enum IfxCif_IspSyncPolarity
Enumerator
IfxCif_IspSyncPolarity_HighActive | high active sync polarity
IfxCif_IspSyncPolarity_LowActive | low active sync polarity

Definition at line 293 of file IfxCif.h.


iLLD_TC26B: Standard Functions

Functions
Standard Functions
iLLD » CIF » Standard Driver
Collaboration diagram for Standard Functions:

Functions

IFX_INLINE void | IfxCif_clearKernelResetState (void)
Function to clear the kernel reset state. More...
IFX_INLINE uint16 | IfxCif_getCifModuleId (void)
Function to query the CIF module ID. More...
IFX_INLINE IfxCif_PortInputSelection | IfxCif_getCifModulePortInputSelection (void)
Function to query the port input selection. More...
IFX_INLINE uint8 | IfxCif_getCifModuleRevision (void)
Function to query the CIF module revision. More...
IFX_INLINE uint8 | IfxCif_getCifModuleType (void)
Function to query the CIF module ID. More...
IFX_INLINE IfxCif_State | IfxCif_getClockControlLogicState (void)
Function to query the clock distribution enabled state. More...
IFX_INLINE IfxCif_DataPathSelectorForMainPath | IfxCif_getDataPathSelectorForMainPath (void)
Function to query the data path for main path. More...
IFX_INLINE IfxCif_InputInterface | IfxCif_getInputInterface (void)
Function to query the input interface of the CIF interface. More...
IFX_INLINE IfxCif_State | IfxCif_getIspInputPortSHSyncState (void)
Function to query the current level of the ISP input port s_hsync (for testing purposes only) More...
IFX_INLINE IfxCif_State | IfxCif_getKernelResetStatus (void)
Function to query the kernel reset status. More...
IFX_INLINE uint16 | IfxCif_getModuleNumber (void)
Function to query the module number. More...
IFX_INLINE uint8 | IfxCif_getModuleRevisionNumber (void)
Function to query the revision number of the CIF interface. More...
IFX_INLINE IfxCif_State | IfxCif_getModuleState (void)
Function to query the state of the CIF module. More...
IFX_INLINE uint8 | IfxCif_getModuleType (void)
Function to query the module type. More...
IFX_INLINE IfxCif_YCSplitterChannelMode | IfxCif_getYCSplitterChannelMode (void)
Function to query the Y/C splitter channel mode. More...
IFX_INLINE void | IfxCif_setClockControlLogicState (IfxCif_State clockControlLogicState)
Function to enable or disable the clock distribution to all CIF submodules. More...
IFX_INLINE void | IfxCif_setDataPathSelectorForMainPath (IfxCif_DataPathSelectorForMainPath pathSelector)
Function to set the data path for main path. More...
IFX_INLINE void | IfxCif_setInputInterface (IfxCif_InputInterface interface)
Function to set the input interface of the CIF interface. More...
IFX_INLINE void | IfxCif_setKernelResetRequestState (IfxCif_State state)
Function to request a kernel reset or reset the request bit. More...
IFX_INLINE void | IfxCif_setYCSplitterChannelMode (IfxCif_YCSplitterChannelMode mode)
Function to set the Y/C splitter channel mode. More...
IFX_EXTERN IfxCif_State | IfxCif_getInternalClockMode (IfxCif_Submodules submodule)
Function to query the clock state of a submodule. More...
IFX_EXTERN IfxCif_State | IfxCif_getKernelResetRequestState (void)
Function to query the state of the kernel reset request bit. More...
IFX_EXTERN IfxCif_State | IfxCif_getSoftwareResetMode (IfxCif_Submodules submodule)
Function to query the reset mode of a submodule. More...
IFX_EXTERN void | IfxCif_resetModule (Ifx_CIF_BBB *cifBbb)
resets CIF kernel More...
IFX_EXTERN void | IfxCif_setInternalClockMode (IfxCif_Submodules submodule, IfxCif_State clockState)
Function to enable or disable the clock of a submodule. More...
IFX_EXTERN void | IfxCif_setModuleStateRequest (IfxCif_State state)
Function to request enabling or disabling of the CIF module. More...
IFX_EXTERN void | IfxCif_setSoftwareResetMode (IfxCif_Submodules submodule, IfxCif_State resetMode)
Function to enable or disable the reset mode of a submodule. More...

Detailed Description

Function Documentation

◆ IfxCif_clearKernelResetState()

IFX_INLINE void IfxCif_clearKernelResetState ( void )

Function to clear the kernel reset state.

Returns
None

Definition at line 2367 of file IfxCif.h.

◆ IfxCif_getCifModuleId()

IFX_INLINE uint16 IfxCif_getCifModuleId ( void )

Function to query the CIF module ID.

Returns
CIF module ID

Definition at line 2397 of file IfxCif.h.

◆ IfxCif_getCifModulePortInputSelection()

IFX_INLINE IfxCif_PortInputSelection IfxCif_getCifModulePortInputSelection ( void )

Function to query the port input selection.

Returns
Always IfxCif_PortInputSelection_PinMapping0

Definition at line 2403 of file IfxCif.h.

◆ IfxCif_getCifModuleRevision()

IFX_INLINE uint8 IfxCif_getCifModuleRevision ( void )

Function to query the CIF module revision.

Returns
CIF module revision

Definition at line 2409 of file IfxCif.h.

◆ IfxCif_getCifModuleType()

IFX_INLINE uint8 IfxCif_getCifModuleType ( void )

Function to query the CIF module ID.

Returns
CIF module type

Definition at line 2415 of file IfxCif.h.

◆ IfxCif_getClockControlLogicState()

IFX_INLINE IfxCif_State IfxCif_getClockControlLogicState ( void )

Function to query the clock distribution enabled state.

Returns
IfxCif_State_Enabled if clock distribution is enabled, IfxCif_State_Disabled otherwise

Definition at line 2421 of file IfxCif.h.

◆ IfxCif_getDataPathSelectorForMainPath()

IFX_INLINE IfxCif_DataPathSelectorForMainPath IfxCif_getDataPathSelectorForMainPath ( void )

Function to query the data path for main path.

Returns
Selector for the main data path (one member of IfxCif_DataPathSelectorForMainPath)

Definition at line 2446 of file IfxCif.h.

◆ IfxCif_getInputInterface()

IFX_INLINE IfxCif_InputInterface IfxCif_getInputInterface ( void )

Function to query the input interface of the CIF interface.

Returns
IfxCif_InputInterface Type of the configured interface

Definition at line 2464 of file IfxCif.h.

◆ IfxCif_getInternalClockMode()

IFX_EXTERN IfxCif_State IfxCif_getInternalClockMode ( IfxCif_Submodules submodule )

Function to query the clock state of a submodule.

Parameters
submodule Identifier of the submodule
Returns
IfxCif_State_Enabled if the clock of the submodule is enabled, IfxCif_State_Disabled otherwise

Definition at line 1146 of file IfxCif.c.

◆ IfxCif_getIspInputPortSHSyncState()

IFX_INLINE IfxCif_State IfxCif_getIspInputPortSHSyncState ( void )

Function to query the current level of the ISP input port s_hsync (for testing purposes only)

Returns
IfxCif_State_Enabled if s_hsync is high, IfxCif_State_Disabled if s_hsync is low

Definition at line 2524 of file IfxCif.h.

◆ IfxCif_getKernelResetRequestState()

IFX_EXTERN IfxCif_State IfxCif_getKernelResetRequestState ( void )

Function to query the state of the kernel reset request bit.

Returns
IfxCif_State_Enabled if the kernel reset requets bit is set, IfxCif_State_Disabled otherwise

Definition at line 1685 of file IfxCif.c.

◆ IfxCif_getKernelResetStatus()

IFX_INLINE IfxCif_State IfxCif_getKernelResetStatus ( void )

Function to query the kernel reset status.

Returns
IfxCif_State_Enabled if kernel reset was executed, IfxCif_State_Disabled otherwise

Definition at line 2626 of file IfxCif.h.

◆ IfxCif_getModuleNumber()

IFX_INLINE uint16 IfxCif_getModuleNumber ( void )

Function to query the module number.

Returns
Module number of the CIF interface

Definition at line 2682 of file IfxCif.h.

◆ IfxCif_getModuleRevisionNumber()

IFX_INLINE uint8 IfxCif_getModuleRevisionNumber ( void )

Function to query the revision number of the CIF interface.

Returns
Revision number of the CIF interface

Definition at line 2688 of file IfxCif.h.

◆ IfxCif_getModuleState()

IFX_INLINE IfxCif_State IfxCif_getModuleState ( void )

Function to query the state of the CIF module.

Returns
IfxCif_State_Enabled if the module is currently enabled, IfxCif_State_Disabled otherwise

Definition at line 2694 of file IfxCif.h.

Referenced by IfxCif_Cam_init().

◆ IfxCif_getModuleType()

IFX_INLINE uint8 IfxCif_getModuleType ( void )

Function to query the module type.

Returns
Module type of the CIF interface

Definition at line 2701 of file IfxCif.h.

◆ IfxCif_getSoftwareResetMode()

IFX_EXTERN IfxCif_State IfxCif_getSoftwareResetMode ( IfxCif_Submodules submodule )

Function to query the reset mode of a submodule.

Parameters
submodule Identifier of the submodule
Returns
IfxCif_State_Enabled if the reset mode of the submodule is enabled, IfxCif_State_Disabled otherwise

Definition at line 2555 of file IfxCif.c.

◆ IfxCif_getYCSplitterChannelMode()

IFX_INLINE IfxCif_YCSplitterChannelMode IfxCif_getYCSplitterChannelMode ( void )

Function to query the Y/C splitter channel mode.

Returns
Configured mode of the Y/C splitter (one member of IfxCif_YCSplitterChannelMode)

Definition at line 2725 of file IfxCif.h.

◆ IfxCif_resetModule()

IFX_EXTERN void IfxCif_resetModule ( Ifx_CIF_BBB * cifBbb )

resets CIF kernel

Parameters
cifBbb pointer to CIF_BBB registers
Returns
None

Definition at line 2679 of file IfxCif.c.

◆ IfxCif_setClockControlLogicState()

IFX_INLINE void IfxCif_setClockControlLogicState ( IfxCif_State clockControlLogicState )

Function to enable or disable the clock distribution to all CIF submodules.

Parameters
clockControlLogicState IfxCif_State_Enabled to enable clock distribution, IfxCif_State_Disabled to disable clock distribution
Returns
None

Definition at line 2749 of file IfxCif.h.

◆ IfxCif_setDataPathSelectorForMainPath()

IFX_INLINE void IfxCif_setDataPathSelectorForMainPath ( IfxCif_DataPathSelectorForMainPath pathSelector )

Function to set the data path for main path.

Parameters
pathSelector Selector for the main data path
Returns
None

Definition at line 2756 of file IfxCif.h.

Referenced by IfxCif_Cam_disableJpegEncoder(), and IfxCif_Cam_enableJpegEncoder().

◆ IfxCif_setInputInterface()

IFX_INLINE void IfxCif_setInputInterface ( IfxCif_InputInterface interface )

Function to set the input interface of the CIF interface.

Parameters
interface Type of interface
Returns
None

Definition at line 2774 of file IfxCif.h.

◆ IfxCif_setInternalClockMode()

IFX_EXTERN void IfxCif_setInternalClockMode | ( | IfxCif_Submodules | submodule,
 |  | IfxCif_State | clockState
 | ) |  |

Function to enable or disable the clock of a submodule.

Parameters
submodule | Identifier of the submodule to enable or disable
clockState | IfxCif_State_Enabled to enable the clock, IfxCif_State_Disabled to disable the clock
Returns
None

Definition at line 3172 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifDownscaler(), IfxCif_Cam_initCifExtraPath(), IfxCif_Cam_initCifIspUnit(), IfxCif_Cam_initCifJpegEncoder(), and IfxCif_Cam_initCifMemInterface().

◆ IfxCif_setKernelResetRequestState()

IFX_INLINE void IfxCif_setKernelResetRequestState ( IfxCif_State state )

Function to request a kernel reset or reset the request bit.

Parameters
state IfxCif_State_Enabled to request a reset, IfxCif_State_Disabled to reset the request bit before a reset was performed
Returns
None

Definition at line 2962 of file IfxCif.h.

Referenced by IfxCif_Cam_init().

◆ IfxCif_setModuleStateRequest()

IFX_EXTERN void IfxCif_setModuleStateRequest ( IfxCif_State state )

Function to request enabling or disabling of the CIF module.

Parameters
state IfxCif_State_Enabled to request the enabling of the module, IfxCif_State_Disabled otherwise
Returns
None

Definition at line 3815 of file IfxCif.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_setSoftwareResetMode()

IFX_EXTERN void IfxCif_setSoftwareResetMode | ( | IfxCif_Submodules | submodule,
 |  | IfxCif_State | resetMode
 | ) |  |

Function to enable or disable the reset mode of a submodule.

Parameters
submodule | Identifier of the submodule
resetMode | IfxCif_State_Enabled to enable the reset of the submodule, IfxCif_State_Disabled to disable the reset
Returns
None

Definition at line 3919 of file IfxCif.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_setYCSplitterChannelMode()

IFX_INLINE void IfxCif_setYCSplitterChannelMode ( IfxCif_YCSplitterChannelMode mode )

Function to set the Y/C splitter channel mode.

Parameters
mode Mode of the Y/C splitter to set
Returns
None

Definition at line 3025 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().


iLLD_TC26B: ISP Functions

Functions
ISP Functions
iLLD » CIF » Standard Driver
Collaboration diagram for ISP Functions:

Functions

IFX_INLINE void | IfxCif_generateIspFrameSynchronousConfigUpdateSignal (void)
Function to generate a frame synchronous ISP configuration update signal. More...
IFX_INLINE void | IfxCif_generateIspImmediateConfigUpdateSignal (void)
Function to generate an immediate ISP configuration update signal. More...
IFX_INLINE uint16 | IfxCif_getCurrentIspFrameCount (void)
Function to query the current ISP frame count. More...
IFX_INLINE IfxCif_IspInformFieldInformation | IfxCif_getCurrentIspInformFieldInformation (void)
Function to query the current field information. More...
IFX_INLINE IfxCif_State | IfxCif_getCurrentIspInputFormatterState (void)
Function to query the current state of the ISP formatter. More...
IFX_INLINE IfxCif_IspCcirSequence | IfxCif_getIspCcirSequence (void)
Function to query the currently set CCIR sequence. More...
IFX_INLINE IfxCif_IspColorSpaceMatrixCrominanceClippingRange | IfxCif_getIspColorSpaceMatrixCrominanceClippingRange (void)
Function to query the clipping range of the crominance of the ISP output. More...
IFX_INLINE IfxCif_IspColorSpaceMatrixLuminanceClippingRange | IfxCif_getIspColorSpaceMatrixLuminanceClippingRange (void)
Function to query the clipping range of the luminance of the ISP output. More...
IFX_INLINE IfxCif_State | IfxCif_getIspFieldInvertState (void)
Function to query the state of field ID inversion. More...
IFX_INLINE IfxCif_IspFieldSelection | IfxCif_getIspFieldSelection (void)
Function to query the currently set field sample mode. More...
IFX_INLINE IfxCif_IspSyncPolarity | IfxCif_getIspHSyncPolarity (void)
Function to query the currently set polarity of the HSYNC signal. More...
IFX_INLINE IfxCif_State | IfxCif_getIspInputFormatterState (void)
Function to query the current state of the ISP input formatter. More...
IFX_INLINE IfxCif_IspInputInterface | IfxCif_getIspInputInterface (void)
Function to query the ISP input interface bit width. More...
IFX_INLINE uint16 | IfxCif_getIspInputPortSDataState (void)
Function to query the current value of the ISP input port s_data (for test purposes only) More...
IFX_INLINE IfxCif_State | IfxCif_getIspInputPortSVSyncState (void)
Function to query the current level of the ISP input port s_vsync (for test purposes only) More...
IFX_INLINE IfxCif_State | IfxCif_getIspMode (void)
Function to query the currently set ISP mode. More...
IFX_INLINE IfxCif_State | IfxCif_getIspOutputState (void)
Function to query the ISP output state. More...
IFX_INLINE IfxCif_IspSamplingEdge | IfxCif_getIspSamplingEdge (void)
Function to query the currently set ISP sampling edge. More...
IFX_INLINE IfxCif_State | IfxCif_getIspState (void)
Function to query the current state of the ISP. More...
IFX_INLINE IfxCif_IspSyncPolarity | IfxCif_getIspVSyncPolarity (void)
Function to query the currently set polarity of the VSYNC signal. More...
IFX_INLINE uint16 | IfxCif_getNumberOfAcquisitionFrames (void)
Function to query the number of acquisition frames. More...
IFX_INLINE void | IfxCif_setIspAcquisitionOffsets (uint16 hOffset, uint16 vOffset)
Function to set the ISP acquisition offsets. More...
IFX_INLINE void | IfxCif_setIspAcquisitionSizes (uint16 hSize, uint16 vSize)
Function to set the ISP acquisition sizes. More...
IFX_INLINE void | IfxCif_setIspCcirSequence (IfxCif_IspCcirSequence sequence)
Function to set the CCIR sequence. More...
IFX_INLINE void | IfxCif_setIspColorSpaceMatrixCrominanceClippingRange (IfxCif_IspColorSpaceMatrixCrominanceClippingRange clippingRange)
Function to set the clipping range of the crominance of the ISP output. More...
IFX_INLINE void | IfxCif_setIspColorSpaceMatrixLuminanceClippingRange (IfxCif_IspColorSpaceMatrixLuminanceClippingRange clippingRange)
Function to set the clipping range of the luminance of the ISP output. More...
IFX_INLINE void | IfxCif_setIspFieldInvertState (IfxCif_State fieldInvertState)
Function to enable or disable inversion of the field ID. More...
IFX_INLINE void | IfxCif_setIspFieldSelection (IfxCif_IspFieldSelection selection)
Function to select fields to sample. More...
IFX_INLINE void | IfxCif_setIspHSyncPolarity (IfxCif_IspSyncPolarity polarity)
Function to set the polarity of the HSYNC signal. More...
IFX_INLINE void | IfxCif_setIspInputFormatterState (IfxCif_State inputFormatterState)
Function to enable or disable the ISP input formatter. More...
IFX_INLINE void | IfxCif_setIspInputInterface (IfxCif_IspInputInterface input)
Function to set the ISP input interface bit width. More...
IFX_INLINE void | IfxCif_setIspMode (IfxCif_IspMode mode)
Function to set the ISP mode. More...
IFX_INLINE void | IfxCif_setIspOutputState (IfxCif_State ispOutputState)
Function to enable or disable the ISP output. More...
IFX_INLINE void | IfxCif_setIspOutputWindowOffsets (uint16 hOffset, uint16 vOffset)
Function to set the ISP output window offsets. More...
IFX_INLINE void | IfxCif_setIspPictureSizes (uint16 hSize, uint16 vSize)
Function to set the ISP picture sizes. More...
IFX_INLINE void | IfxCif_setIspSamplingEdge (IfxCif_IspSamplingEdge edge)
Function to set the ISP sampling edge. More...
IFX_INLINE void | IfxCif_setIspVSyncPolarity (IfxCif_IspSyncPolarity polarity)
Function to set the polarity of the VSYNC signal. More...
IFX_INLINE void | IfxCif_setNumberOfAcquisitionFrames (uint16 numberOfFrames)
Function to set the number of acquisition frames. More...
IFX_EXTERN void | IfxCif_clearIspError (IfxCif_IspErrorSources errorSource)
Function to clear the error status bit for an error source. More...
IFX_EXTERN void | IfxCif_clearIspInterrupt (IfxCif_IspInterruptSources interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN uint16 | IfxCif_getCurrentIspPictureOffset (IfxCif_ImageTiers tier)
Function to query the current ISP picture offset for one tier. More...
IFX_EXTERN uint16 | IfxCif_getCurrentIspPictureSize (IfxCif_ImageTiers tier)
Function to query the current ISP picture size for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspAcquisitionOffset (IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition offset of one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspAcquisitionSize (IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition size of one tier. More...
IFX_EXTERN IfxCif_ErrorState | IfxCif_getIspErrorState (IfxCif_IspErrorSources errorSource)
Function to query the error state of an error source. More...
IFX_EXTERN IfxCif_State | IfxCif_getIspInputSelectionAppendState (void)
Function to query the append state. More...
IFX_EXTERN IfxCif_State | IfxCif_getIspInterruptEnableState (IfxCif_IspInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN uint16 | IfxCif_getIspOutputWindowOffset (IfxCif_ImageTiers tier)
Function to query the currently set ISP output window offset for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspPictureSize (IfxCif_ImageTiers tier)
Function to query the currently set ISP picture size of one tier. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedIspInterruptTriggeredState (IfxCif_IspInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawIspInterruptTriggeredState (IfxCif_IspInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IFX_EXTERN void | IfxCif_setIspAcquisitionOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP acquisition offset of one tier. More...
IFX_EXTERN void | IfxCif_setIspAcquisitionSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the ISP acquisition size of one tier. More...
IFX_EXTERN void | IfxCif_setIspInputSelectionAppendState (IfxCif_State appendState)
Function to enable or disable appending of bits to the input signal. More...
IFX_EXTERN void | IfxCif_setIspInterruptEnableState (IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setIspInterruptRequestBit (IfxCif_IspInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setIspOutputWindowOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP output window offset for one tier. More...
IFX_EXTERN void | IfxCif_setIspPictureSize (IfxCif_ImageTiers tier, uint16 pictureSize)
Function to set the ISP picture size of one tier. More...

Detailed Description

Function Documentation

◆ IfxCif_clearIspError()

IFX_EXTERN void IfxCif_clearIspError ( IfxCif_IspErrorSources errorSource )

Function to clear the error status bit for an error source.

Parameters
errorSource Error source
Returns
None

Definition at line 94 of file IfxCif.c.

◆ IfxCif_clearIspInterrupt()

IFX_EXTERN void IfxCif_clearIspInterrupt ( IfxCif_IspInterruptSources interruptSource )

Function to clear an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
None

Definition at line 115 of file IfxCif.c.

◆ IfxCif_generateIspFrameSynchronousConfigUpdateSignal()

IFX_INLINE void IfxCif_generateIspFrameSynchronousConfigUpdateSignal ( void )

Function to generate a frame synchronous ISP configuration update signal.

Returns
None

Definition at line 2373 of file IfxCif.h.

Referenced by IfxCif_Cam_restartCapture().

◆ IfxCif_generateIspImmediateConfigUpdateSignal()

IFX_INLINE void IfxCif_generateIspImmediateConfigUpdateSignal ( void )

Function to generate an immediate ISP configuration update signal.

Returns
None

Definition at line 2379 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit(), IfxCif_Cam_startCapture(), and IfxCif_Cam_stopCapture().

◆ IfxCif_getCurrentIspFrameCount()

IFX_INLINE uint16 IfxCif_getCurrentIspFrameCount ( void )

Function to query the current ISP frame count.

Returns
Current ISP frame count

Definition at line 2428 of file IfxCif.h.

◆ IfxCif_getCurrentIspInformFieldInformation()

IFX_INLINE IfxCif_IspInformFieldInformation IfxCif_getCurrentIspInformFieldInformation ( void )

Function to query the current field information.

Returns
IfxCif_IspInformFieldInformation_Odd for odd fields, IfxCif_IspInformFieldInformation_Even for even fields

Definition at line 2434 of file IfxCif.h.

◆ IfxCif_getCurrentIspInputFormatterState()

IFX_INLINE IfxCif_State IfxCif_getCurrentIspInputFormatterState ( void )

Function to query the current state of the ISP formatter.

Returns
IfxCif_State_Enabled if the ISP input formatter is currently enabled, IfxCif_State_Disabled if the ISP input formatter is currently disabled

Definition at line 2440 of file IfxCif.h.

◆ IfxCif_getCurrentIspPictureOffset()

IFX_EXTERN uint16 IfxCif_getCurrentIspPictureOffset ( IfxCif_ImageTiers tier )

Function to query the current ISP picture offset for one tier.

Parameters
tier Tier for which to query the current ISP picture offset
Returns
Current ISP picture offset

Definition at line 349 of file IfxCif.c.

◆ IfxCif_getCurrentIspPictureSize()

IFX_EXTERN uint16 IfxCif_getCurrentIspPictureSize ( IfxCif_ImageTiers tier )

Function to query the current ISP picture size for one tier.

Parameters
tier Tier for which to query the current ISP picture size
Returns
Current ISP picture size

Definition at line 370 of file IfxCif.c.

◆ IfxCif_getIspAcquisitionOffset()

IFX_EXTERN uint16 IfxCif_getIspAcquisitionOffset ( IfxCif_ImageTiers tier )

Function to query the currently set ISP acquisition offset of one tier.

Parameters
tier Tier for which to query the ISP acquisition offset
Returns
Currently set ISP acquisition offset

Definition at line 1209 of file IfxCif.c.

◆ IfxCif_getIspAcquisitionSize()

IFX_EXTERN uint16 IfxCif_getIspAcquisitionSize ( IfxCif_ImageTiers tier )

Function to query the currently set ISP acquisition size of one tier.

Parameters
tier Tier for which to query the ISP acquisition size
Returns
Currently set acquisition size

Definition at line 1230 of file IfxCif.c.

◆ IfxCif_getIspCcirSequence()

IFX_INLINE IfxCif_IspCcirSequence IfxCif_getIspCcirSequence ( void )

Function to query the currently set CCIR sequence.

Returns
Currently set CCIR sequence (one member of IfxCif_IspCcirSequence)

Definition at line 2470 of file IfxCif.h.

◆ IfxCif_getIspColorSpaceMatrixCrominanceClippingRange()

IFX_INLINE IfxCif_IspColorSpaceMatrixCrominanceClippingRange IfxCif_getIspColorSpaceMatrixCrominanceClippingRange ( void )

Function to query the clipping range of the crominance of the ISP output.

Returns
Currently set clipping range (one member of IfxCif_IspColorSpaceMatrixCrominanceClippingRange)

Definition at line 2476 of file IfxCif.h.

◆ IfxCif_getIspColorSpaceMatrixLuminanceClippingRange()

IFX_INLINE IfxCif_IspColorSpaceMatrixLuminanceClippingRange IfxCif_getIspColorSpaceMatrixLuminanceClippingRange ( void )

Function to query the clipping range of the luminance of the ISP output.

Returns
Currently set clipping range (one member of IfxCif_IspColorSpaceMatrixLuminanceClippingRange)

Definition at line 2482 of file IfxCif.h.

◆ IfxCif_getIspErrorState()

IFX_EXTERN IfxCif_ErrorState IfxCif_getIspErrorState ( IfxCif_IspErrorSources errorSource )

Function to query the error state of an error source.

Parameters
errorSource errorSource Error source to query
Returns
IfxCif_ErrorState_Error if the error occured, IfxCif_ErrorState_NoError if the error did not occur

Definition at line 1251 of file IfxCif.c.

◆ IfxCif_getIspFieldInvertState()

IFX_INLINE IfxCif_State IfxCif_getIspFieldInvertState ( void )

Function to query the state of field ID inversion.

Returns
IfxCif_State_Enabled if field ID inversion is enabled, IfxCif_State_Disabled otherwise

Definition at line 2488 of file IfxCif.h.

◆ IfxCif_getIspFieldSelection()

IFX_INLINE IfxCif_IspFieldSelection IfxCif_getIspFieldSelection ( void )

Function to query the currently set field sample mode.

Returns
Currently set fields sample mode (one member of IfxCif_IspFieldSelection)

Definition at line 2494 of file IfxCif.h.

◆ IfxCif_getIspHSyncPolarity()

IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspHSyncPolarity ( void )

Function to query the currently set polarity of the HSYNC signal.

Returns
IfxCif_IspSyncPolarity_HighActive if HSYNC is configured as high active, IfxCif_IspSyncPolarity_LowActive if HSYNC is configured as low active

Definition at line 2500 of file IfxCif.h.

◆ IfxCif_getIspInputFormatterState()

IFX_INLINE IfxCif_State IfxCif_getIspInputFormatterState ( void )

Function to query the current state of the ISP input formatter.

Returns
IfxCif_State_Enabled if the ISP input formatter is enabled, IfxCif_State_Disabled otherwise

Definition at line 2506 of file IfxCif.h.

◆ IfxCif_getIspInputInterface()

IFX_INLINE IfxCif_IspInputInterface IfxCif_getIspInputInterface ( void )

Function to query the ISP input interface bit width.

Returns
Configured ISP input interface bit width (one member of IfxCif_IspInputInterface)

Definition at line 2512 of file IfxCif.h.

◆ IfxCif_getIspInputPortSDataState()

IFX_INLINE uint16 IfxCif_getIspInputPortSDataState ( void )

Function to query the current value of the ISP input port s_data (for test purposes only)

Returns
Current value of s_data

Definition at line 2518 of file IfxCif.h.

◆ IfxCif_getIspInputPortSVSyncState()

IFX_INLINE IfxCif_State IfxCif_getIspInputPortSVSyncState ( void )

Function to query the current level of the ISP input port s_vsync (for test purposes only)

Returns
IfxCif_State_Enabled if s_vsync is high, IfxCif_State_Disabled if s_vsync is low

Definition at line 2530 of file IfxCif.h.

◆ IfxCif_getIspInputSelectionAppendState()

IFX_EXTERN IfxCif_State IfxCif_getIspInputSelectionAppendState ( void )

Function to query the append state.

Returns
IfxCif_State_Enabled if appending is enabled, IfxCif_State_Disabled otherwise

Definition at line 1285 of file IfxCif.c.

◆ IfxCif_getIspInterruptEnableState()

IFX_EXTERN IfxCif_State IfxCif_getIspInterruptEnableState ( IfxCif_IspInterruptSources interruptSource )

Function to query the enabled state of an interrupt.

Parameters
interruptSource interruptSource Source of the interrupt
Returns
IfxCif_State_Enabled if the interrupt is enabled, IfxCif_State_Disabled if the interrupt is disabled

Definition at line 1302 of file IfxCif.c.

◆ IfxCif_getIspMode()

IFX_INLINE IfxCif_State IfxCif_getIspMode ( void )

Function to query the currently set ISP mode.

Returns
Current ISP mode (one member of IfxCif_IspMode)

Definition at line 2536 of file IfxCif.h.

◆ IfxCif_getIspOutputState()

IFX_INLINE IfxCif_State IfxCif_getIspOutputState ( void )

Function to query the ISP output state.

Returns
IfxCif_State_Enabled if the ISP output is enabled, IfxCif_State_Disabled otherwise

Definition at line 2542 of file IfxCif.h.

◆ IfxCif_getIspOutputWindowOffset()

IFX_EXTERN uint16 IfxCif_getIspOutputWindowOffset ( IfxCif_ImageTiers tier )

Function to query the currently set ISP output window offset for one tier.

Parameters
tier Tier for which to query the ISP output window offset
Returns
Currently set ISP output window offset

Definition at line 1367 of file IfxCif.c.

◆ IfxCif_getIspPictureSize()

IFX_EXTERN uint16 IfxCif_getIspPictureSize ( IfxCif_ImageTiers tier )

Function to query the currently set ISP picture size of one tier.

Parameters
tier Tier for which to query the ISP picture size
Returns
Currently set ISP picture size

Definition at line 1388 of file IfxCif.c.

◆ IfxCif_getIspSamplingEdge()

IFX_INLINE IfxCif_IspSamplingEdge IfxCif_getIspSamplingEdge ( void )

Function to query the currently set ISP sampling edge.

Returns
IfxCif_IspSamplingEdge_NegativeEdge if negative clock edge is configured as sampling edge, IfxCif_IspSamplingEdge_PositiveEdge if positive clock edge is configured as sampling edge

Definition at line 2548 of file IfxCif.h.

◆ IfxCif_getIspState()

IFX_INLINE IfxCif_State IfxCif_getIspState ( void )

Function to query the current state of the ISP.

Returns
IfxCif_State_Enabled if the ISP is currently enabled, IfxCif_State_Disabled if the ISP is currently disabled

Definition at line 2554 of file IfxCif.h.

◆ IfxCif_getIspVSyncPolarity()

IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspVSyncPolarity ( void )

Function to query the currently set polarity of the VSYNC signal.

Returns
IfxCif_IspSyncPolarity_HighActive if VSYNC is configured as high active, IfxCif_IspSyncPolarity_LowActive if VSYNC is configured as low active

Definition at line 2560 of file IfxCif.h.

◆ IfxCif_getMaskedIspInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedIspInterruptTriggeredState ( IfxCif_IspInterruptSources interruptSource )

Function to query the masked state of an interrupt.

Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled

Definition at line 1812 of file IfxCif.c.

◆ IfxCif_getNumberOfAcquisitionFrames()

IFX_INLINE uint16 IfxCif_getNumberOfAcquisitionFrames ( void )

Function to query the number of acquisition frames.

Returns
Currently set number of acquisition frames

Definition at line 2707 of file IfxCif.h.

◆ IfxCif_getRawIspInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawIspInterruptTriggeredState ( IfxCif_IspInterruptSources interruptSource )

Function to query the raw state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set

Definition at line 2311 of file IfxCif.c.

◆ IfxCif_setIspAcquisitionOffset()

IFX_EXTERN void IfxCif_setIspAcquisitionOffset | ( | IfxCif_ImageTiers | tier,
 |  | uint16 | offset
 | ) |  |

Function to set the ISP acquisition offset of one tier.

Parameters
tier | Tier for which to set the ISP acquisition offset
offset | Acquisition offset to set
Returns
None

Definition at line 3213 of file IfxCif.c.

◆ IfxCif_setIspAcquisitionOffsets()

IFX_INLINE void IfxCif_setIspAcquisitionOffsets | ( | uint16 | hOffset,
 |  | uint16 | vOffset
 | ) |  |

Function to set the ISP acquisition offsets.

Parameters
hOffset | Acquisition horizontal offset to set
vOffset | Acquisition vertical offset to set
Returns
None

Definition at line 2781 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspAcquisitionSize()

IFX_EXTERN void IfxCif_setIspAcquisitionSize | ( | IfxCif_ImageTiers | tier,
 |  | uint16 | size
 | ) |  |

Function to set the ISP acquisition size of one tier.

Parameters
tier | Tier for which to set the ISP acquisition size
size | Acquisition size to set
Returns
None

Definition at line 3230 of file IfxCif.c.

◆ IfxCif_setIspAcquisitionSizes()

IFX_INLINE void IfxCif_setIspAcquisitionSizes | ( | uint16 | hSize,
 |  | uint16 | vSize
 | ) |  |

Function to set the ISP acquisition sizes.

Parameters
hSize | Acquisition horizontal size to set
vSize | Acquisition vertical size to set
Returns
None

Definition at line 2788 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspCcirSequence()

IFX_INLINE void IfxCif_setIspCcirSequence ( IfxCif_IspCcirSequence sequence )

Function to set the CCIR sequence.

Parameters
sequence CCIR sequence to set
Returns
None

Definition at line 2795 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspColorSpaceMatrixCrominanceClippingRange()

IFX_INLINE void IfxCif_setIspColorSpaceMatrixCrominanceClippingRange ( IfxCif_IspColorSpaceMatrixCrominanceClippingRange clippingRange )

Function to set the clipping range of the crominance of the ISP output.

Parameters
clippingRange Clipping range to set
Returns
None

Definition at line 2801 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspColorSpaceMatrixLuminanceClippingRange()

IFX_INLINE void IfxCif_setIspColorSpaceMatrixLuminanceClippingRange ( IfxCif_IspColorSpaceMatrixLuminanceClippingRange clippingRange )

Function to set the clipping range of the luminance of the ISP output.

Parameters
clippingRange Clipping range to set
Returns
None

Definition at line 2807 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspFieldInvertState()

IFX_INLINE void IfxCif_setIspFieldInvertState ( IfxCif_State fieldInvertState )

Function to enable or disable inversion of the field ID.

Parameters
fieldInvertState IfxCif_State_Enabled to enable field ID inversion, IfxCif_State_Disabled to disable field ID inversion
Returns
None

Definition at line 2813 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspFieldSelection()

IFX_INLINE void IfxCif_setIspFieldSelection ( IfxCif_IspFieldSelection selection )

Function to select fields to sample.

Parameters
selection Sampled fields selector
Returns
None

Definition at line 2819 of file IfxCif.h.

◆ IfxCif_setIspHSyncPolarity()

IFX_INLINE void IfxCif_setIspHSyncPolarity ( IfxCif_IspSyncPolarity polarity )

Function to set the polarity of the HSYNC signal.

Parameters
polarity IfxCif_IspSyncPolarity_HighActive for high active HSYNC signal, IfxCif_IspSyncPolarity_LowActive for low active HSYNC signal
Returns
None

Definition at line 2825 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspInputFormatterState()

IFX_INLINE void IfxCif_setIspInputFormatterState ( IfxCif_State inputFormatterState )

Function to enable or disable the ISP input formatter.

Parameters
inputFormatterState IfxCif_State_Enabled to enable the ISP input formatter, IfxCif_State_Disabled to disable it
Returns
None

Definition at line 2831 of file IfxCif.h.

Referenced by IfxCif_Cam_startCapture().

◆ IfxCif_setIspInputInterface()

IFX_INLINE void IfxCif_setIspInputInterface ( IfxCif_IspInputInterface input )

Function to set the ISP input interface bit width.

Parameters
input ISP input interface bit width to set
Returns
None

Definition at line 2837 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspInputSelectionAppendState()

IFX_EXTERN void IfxCif_setIspInputSelectionAppendState ( IfxCif_State appendState )

Function to enable or disable appending of bits to the input signal.

Parameters
appendState IfxCif_State_Enabled if appending is enabled, IfxCif_State_Disabled otherwise
Returns
None

Definition at line 3247 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspInterruptEnableState()

IFX_EXTERN void IfxCif_setIspInterruptEnableState | ( | IfxCif_IspInterruptSources | interruptSource,
 |  | IfxCif_State | interruptEnableState
 | ) |  |

Function to enable or disable an interrupt.

Parameters
interruptSource | interruptSource Source of the interrupt to enable or disable
interruptEnableState | IfxCif_State_Enabled to enable the interrupt, IfxCif_State_Disabled to disable the interrupt
Returns
None

Definition at line 3261 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspInterruptRequestBit()

IFX_EXTERN void IfxCif_setIspInterruptRequestBit ( IfxCif_IspInterruptSources interruptSource )

Function to set an interrupt request bit (does not necessarily trigger an interrupt)

Parameters
interruptSource Source of the interrupt
Returns
None

Definition at line 3298 of file IfxCif.c.

◆ IfxCif_setIspMode()

IFX_INLINE void IfxCif_setIspMode ( IfxCif_IspMode mode )

Function to set the ISP mode.

Parameters
mode Mode to set
Returns
None

Definition at line 2843 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspOutputState()

IFX_INLINE void IfxCif_setIspOutputState ( IfxCif_State ispOutputState )

Function to enable or disable the ISP output.

Parameters
ispOutputState ispOutputState IfxCif_State_Enabled to enable the ISP output, IfxCif_State_Disabled to disable it
Returns
None

Definition at line 2849 of file IfxCif.h.

Referenced by IfxCif_Cam_restartCapture(), IfxCif_Cam_startCapture(), and IfxCif_Cam_stopCapture().

◆ IfxCif_setIspOutputWindowOffset()

IFX_EXTERN void IfxCif_setIspOutputWindowOffset | ( | IfxCif_ImageTiers | tier,
 |  | uint16 | offset
 | ) |  |

Function to set the ISP output window offset for one tier.

Parameters
tier | Tier for which to query the ISP output window offset
offset | Offset to set
Returns
None

Definition at line 3335 of file IfxCif.c.

◆ IfxCif_setIspOutputWindowOffsets()

IFX_INLINE void IfxCif_setIspOutputWindowOffsets | ( | uint16 | hOffset,
 |  | uint16 | vOffset
 | ) |  |

Function to set the ISP output window offsets.

Parameters
hOffset | Offset horizontal to set
vOffset | Offset vertical to set
Returns
None

Definition at line 2855 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspPictureSize()

IFX_EXTERN void IfxCif_setIspPictureSize | ( | IfxCif_ImageTiers | tier,
 |  | uint16 | pictureSize
 | ) |  |

Function to set the ISP picture size of one tier.

Parameters
tier | Tier for which to set the ISP picture size
pictureSize | Picture size to set
Returns
None

Definition at line 3352 of file IfxCif.c.

◆ IfxCif_setIspPictureSizes()

IFX_INLINE void IfxCif_setIspPictureSizes | ( | uint16 | hSize,
 |  | uint16 | vSize
 | ) |  |

Function to set the ISP picture sizes.

Parameters
hSize | Picture horizontal size to set
vSize | Picture vertical size to set
Returns
None

Definition at line 2862 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspSamplingEdge()

IFX_INLINE void IfxCif_setIspSamplingEdge ( IfxCif_IspSamplingEdge edge )

Function to set the ISP sampling edge.

Parameters
edge IfxCif_IspSamplingEdge_NegativeEdge to sample at negative clock edges, IfxCif_IspSamplingEdge_PositiveEdge to sample at positive clock edges
Returns
None

Definition at line 2869 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspVSyncPolarity()

IFX_INLINE void IfxCif_setIspVSyncPolarity ( IfxCif_IspSyncPolarity polarity )

Function to set the polarity of the VSYNC signal.

Parameters
polarity IfxCif_IspSyncPolarity_HighActive for high active VSYNC signal, IfxCif_IspSyncPolarity_LowActive for low active VSYNC signal
Returns
None

Definition at line 2875 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setNumberOfAcquisitionFrames()

IFX_INLINE void IfxCif_setNumberOfAcquisitionFrames ( uint16 numberOfFrames )

Function to set the number of acquisition frames.

Parameters
numberOfFrames Number of acquisition frames to set
Returns
None

Definition at line 3007 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit(), IfxCif_Cam_restartCapture(), and IfxCif_Cam_startCapture().


iLLD_TC26B: Linear Downscaler Functions

Functions
Linear Downscaler Functions
iLLD » CIF » Standard Driver
Collaboration diagram for Linear Downscaler Functions:

Functions

IFX_EXTERN IfxCif_State | IfxCif_getLinearDownscalerEnableState (IfxCif_ImageTiers tier)
Function to query the current state of the linear downscaler for one tier. More...
IFX_EXTERN uint8 | IfxCif_getLinearDownscalerScalingFactor (IfxCif_ImageTiers tier)
Function to query the currently set scaling factor of the linear downscaler of one tier. More...
IFX_EXTERN IfxCif_LinearDownscalerScalingMode | IfxCif_getLinearDownscalerScalingMode (IfxCif_ImageTiers tier)
Function to query the currently set scaling mode of one tier. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerEnableState (IfxCif_ImageTiers tier, IfxCif_State enableState)
Function to enable or disable the linear downscaler for one tier. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerScalingFactor (IfxCif_ImageTiers tier, uint8 factor)
Function to set the scaling factor of the linear downscaler of one tier. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerScalingFactors (uint8 horizFactor, uint8 vertFactor)
Function to set the scaling factors of the linear downscaler. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerScalingMode (IfxCif_ImageTiers tier, IfxCif_LinearDownscalerScalingMode mode)
Function to set the scaling mode of one tier. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerScalingModes (IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode)
Function to set the scaling mode of one tier. More...

Detailed Description

Function Documentation

◆ IfxCif_getLinearDownscalerEnableState()

IFX_EXTERN IfxCif_State IfxCif_getLinearDownscalerEnableState ( IfxCif_ImageTiers tier )

Function to query the current state of the linear downscaler for one tier.

Parameters
tier Tier for which to query the state of the linear downscaler
Returns
IfxCif_State_Enabled if the linear downscaler is enabled, IfxCif_State_Disabled if the linear downscaler is disabled

Definition at line 1698 of file IfxCif.c.

◆ IfxCif_getLinearDownscalerScalingFactor()

IFX_EXTERN uint8 IfxCif_getLinearDownscalerScalingFactor ( IfxCif_ImageTiers tier )

Function to query the currently set scaling factor of the linear downscaler of one tier.

Parameters
tier Tier for which to query the scaling factor
Returns
Current set scaling factor

Definition at line 1719 of file IfxCif.c.

◆ IfxCif_getLinearDownscalerScalingMode()

IFX_EXTERN IfxCif_LinearDownscalerScalingMode IfxCif_getLinearDownscalerScalingMode ( IfxCif_ImageTiers tier )

Function to query the currently set scaling mode of one tier.

Parameters
tier Tier for which to query the scaling mode
Returns
Currently set scaling mode (one member of IfxCif_LinearDownscalerScalingMode)

Definition at line 1740 of file IfxCif.c.

◆ IfxCif_setLinearDownscalerEnableState()

IFX_EXTERN void IfxCif_setLinearDownscalerEnableState | ( | IfxCif_ImageTiers | tier,
 |  | IfxCif_State | enableState
 | ) |  |

Function to enable or disable the linear downscaler for one tier.

Parameters
tier | Tier for which to enable or disable the linear downscaler
enableState | IfxCif_State_Enabled to enable the linear downscaler, IfxCif_State_Disabled to disable the linear downscaler
Returns
None

Definition at line 3558 of file IfxCif.c.

◆ IfxCif_setLinearDownscalerScalingFactor()

IFX_EXTERN void IfxCif_setLinearDownscalerScalingFactor | ( | IfxCif_ImageTiers | tier,
 |  | uint8 | factor
 | ) |  |

Function to set the scaling factor of the linear downscaler of one tier.

Parameters
tier | Tier for which to set the scaling factor
factor | Factor to set (depending on the configured scaling mode every factor + 1 pixel or double pixel will be skipped or passed to the next module)
Returns
None

Definition at line 3579 of file IfxCif.c.

◆ IfxCif_setLinearDownscalerScalingFactors()

IFX_EXTERN void IfxCif_setLinearDownscalerScalingFactors | ( | uint8 | horizFactor,
 |  | uint8 | vertFactor
 | ) |  |

Function to set the scaling factors of the linear downscaler.

Parameters
horizFactor | Factor horizontal to set (depending on the configured scaling mode every factor + 1 pixel or double pixel will be skipped or passed to the next module)
vertFactor | actor horizontal to set (depending on the configured scaling mode every factor + 1 pixel or double pixel will be skipped or passed to the next module)
Returns
None

Definition at line 3600 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifDownscaler().

◆ IfxCif_setLinearDownscalerScalingMode()

IFX_EXTERN void IfxCif_setLinearDownscalerScalingMode | ( | IfxCif_ImageTiers | tier,
 |  | IfxCif_LinearDownscalerScalingMode | mode
 | ) |  |

Function to set the scaling mode of one tier.

Parameters
tier | Tier for which to set the scaling mode
mode | Scaling mode to set
Returns
None

Definition at line 3610 of file IfxCif.c.

◆ IfxCif_setLinearDownscalerScalingModes()

IFX_EXTERN void IfxCif_setLinearDownscalerScalingModes | ( | IfxCif_LinearDownscalerScalingMode | horizMode,
 |  | IfxCif_LinearDownscalerScalingMode | vertMode
 | ) |  |

Function to set the scaling mode of one tier.

Parameters
horizMode | Scaling mode to set for horizontal If the horizMode is not IfxCif_LinearDownscalerScalingMode_Disabled, the horizontal scaling will be enabled.
vertMode | Scaling mode to set for vertical If the vertMode is not IfxCif_LinearDownscalerScalingMode_Disabled, the vertical scaling will be enabled.
Returns
None

Definition at line 3631 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifDownscaler().


iLLD_TC26B: Linear Downscaler Enumerations

Enumerations
Linear Downscaler Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for Linear Downscaler Enumerations:

Enumerations

enum IfxCif_LinearDownscalerScalingMode {
IfxCif_LinearDownscalerScalingMode_SingleSkip = 0,
IfxCif_LinearDownscalerScalingMode_DoubleSkip = 1,
IfxCif_LinearDownscalerScalingMode_SinglePass = 2,
IfxCif_LinearDownscalerScalingMode_DoublePass = 3,
IfxCif_LinearDownscalerScalingMode_Disabled = -1
}
Enumerator for scaling mode of linear downscaler. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCif_LinearDownscalerScalingMode

enum IfxCif_LinearDownscalerScalingMode

Enumerator for scaling mode of linear downscaler.

Enumerator
IfxCif_LinearDownscalerScalingMode_SingleSkip | Scaling mode single skip.
IfxCif_LinearDownscalerScalingMode_DoubleSkip | Scaling mode double skip.
IfxCif_LinearDownscalerScalingMode_SinglePass | Scaling mode single pass.
IfxCif_LinearDownscalerScalingMode_DoublePass | Scaling mode double pass.
IfxCif_LinearDownscalerScalingMode_Disabled | Disabled.

Definition at line 305 of file IfxCif.h.


iLLD_TC26B: Memory Interface Functions

Functions
Memory Interface Functions
iLLD » CIF » Standard Driver
Collaboration diagram for Memory Interface Functions:

Functions

IFX_INLINE void | IfxCif_generateMiImmediateConfigUpdateSignal (void)
Function to generate an immediate configuration update signal for the memory interface submodule. More...
IFX_INLINE IfxCif_State | IfxCif_getBaseAddressInitializationEnableState (void)
Function to query the enabled state of the update signal of the base address and buffer size shadow registers to the programmed register init values. More...
IFX_INLINE uint32 | IfxCif_getMiByteCount (void)
Function to query the number of JPEG or RAW data bytes of the last transmitted frame. More...
IFX_INLINE IfxCif_State | IfxCif_getMiByteSwapEnableState (void)
Function to query the current state of the change of byte order of the 32 bit output word. More...
IFX_INLINE IfxCif_MiBurstLength | IfxCif_getMiChrominanceBurstLength (void)
Function to query the currently set burst length for Cb and Cr data. More...
IFX_INLINE IfxCif_MiBurstLength | IfxCif_getMiLuminanceBurstLength (void)
Function to query the currently set burst length for Y, JPEG, or RAW data. More...
IFX_INLINE IfxCif_MiMainPictureWriteFormat | IfxCif_getMiMainPictureWriteFormat (void)
Function to query the currently set write format of the main picture path of the memory interface. More...
IFX_INLINE uint32 | IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset (void)
Function to query the filling level that triggers an interrupt of main picture path Y component. More...
IFX_INLINE uint32 | IfxCif_getMiMainPictureYInterruptOffset (void)
Function to query the filling level of the main picture Y component that triggers an interrupt. More...
IFX_INLINE IfxCif_State | IfxCif_getMiOffsetCounterInitializationEnableState (void)
Function to query the enabled state of the update signal of the offset counter shadow registers. More...
IFX_INLINE void | IfxCif_miSkipPicture (void)
Function to skip the current or next starting main data path picture. More...
IFX_INLINE void | IfxCif_setMiBaseAddressInitializationEnableState (IfxCif_State state)
Function to enable or disable the update of the base address and buffer size shadow registers to the programmed register init values (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port) More...
IFX_INLINE void | IfxCif_setMiByteSwapEnableState (IfxCif_State enableState)
Function to enable or disable the change of byte order of the 32 bit output word. More...
IFX_INLINE void | IfxCif_setMiChrominanceBurstLength (IfxCif_MiBurstLength burstLength)
Function to set the burst length for Cb and Cr data. More...
IFX_INLINE void | IfxCif_setMiMainPictureWriteFormat (IfxCif_MiMainPictureWriteFormat format)
Function to set the write format of the main picture path of the memory interface. More...
IFX_INLINE void | IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset (uint32 interruptOffset)
Function to set the filling level to trigger an interrupt for main picture path Y component. More...
IFX_INLINE void | IfxCif_setMiOffsetCounterInitializationEnableState (IfxCif_State state)
Function to enable or disable the update of the offset counter shadow registers (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port) More...
IFX_EXTERN void | IfxCif_clearMiInterrupt (IfxCif_MiInterruptSources interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN void | IfxCif_clearMiStatus (IfxCif_MiStatusClearSources source)
Function to clear the status information of one status clear source of the memory interface submodule. More...
IFX_EXTERN uint32 | IfxCif_getMainPictureComponentBaseInitAddress (IfxCif_MiMainPicturePathComponents component)
Function to query the initial base address of the ring buffer of one main picture path component. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedMiInterruptTriggeredState (IfxCif_MiInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IFX_EXTERN IfxCif_State | IfxCif_getMiDataPathInputEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface input. More...
IFX_EXTERN IfxCif_State | IfxCif_getMiDataPathOutputEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface output. More...
IFX_EXTERN IfxCif_State | IfxCif_getMiFeatureEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of a memory interface data path. More...
IFX_EXTERN IfxCif_State | IfxCif_getMiInterruptEnableState (IfxCif_MiInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentBaseAddress (IfxCif_MiMainPicturePathComponents component)
Function to query the current base address of the ring buffer of one main picture path component. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentInitSize (IfxCif_MiMainPicturePathComponents component)
Function to query the initial size of the ring buffer of one main picture path component. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentInitialOffsetCounter (IfxCif_MiMainPicturePathComponents component)
Function to query the initial offset counter inside the ring buffer of one main picture path compoent. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentOffsetCounter (IfxCif_MiMainPicturePathComponents component)
Function to query the current offset counter within the ring buffer of one main picture path component. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentOffsetCounterStart (IfxCif_MiMainPicturePathComponents component)
Function to query the offset counter which points to the start address of the previously processed picture for one main picture path component. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentSize (IfxCif_MiMainPicturePathComponents component)
Function to query the current size of the ring buffer of one main picture path component. More...
IFX_EXTERN IfxCif_ErrorState | IfxCif_getMiStatusInformation (IfxCif_MiStatusInformationSources source)
Function to query the status information of one status information source of the memory interface module. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawMiInterruptTriggeredState (IfxCif_MiInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IFX_EXTERN void | IfxCif_setMiFeatureEnableState (IfxCif_MiDataPaths dataPath, IfxCif_State enableState)
Function to enable or disable one memory interface data path. More...
IFX_EXTERN void | IfxCif_setMiInterruptEnableState (IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setMiInterruptRequestBit (IfxCif_MiInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setMiLuminanceBurstLength (IfxCif_MiBurstLength burstLength)
Function to set the burst length for Y, JPEG, or RAW data. More...
IFX_EXTERN void | IfxCif_setMiMainPictureComponentBaseInitAddress (IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address)
Function to set the initial base address of the ring buffer for one main picture path component. More...
IFX_EXTERN void | IfxCif_setMiMainPictureComponentInitSize (IfxCif_MiMainPicturePathComponents component, uint32 size)
Function to set the initial size of the ring buffer for one main picture path component. More...
IFX_EXTERN void | IfxCif_setMiMainPictureComponentInitialOffsetCounter (IfxCif_MiMainPicturePathComponents component, uint32 offsetCounter)
Function to set the initial offset counter inside the ring buffer for one main picture path component. More...

Detailed Description

Function Documentation

◆ IfxCif_clearMiInterrupt()

IFX_EXTERN void IfxCif_clearMiInterrupt ( IfxCif_MiInterruptSources interruptSource )

Function to clear an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
None

Definition at line 185 of file IfxCif.c.

◆ IfxCif_clearMiStatus()

IFX_EXTERN void IfxCif_clearMiStatus ( IfxCif_MiStatusClearSources source )

Function to clear the status information of one status clear source of the memory interface submodule.

Parameters
source Status information source for which to clear the status
Returns
None

Definition at line 222 of file IfxCif.c.

◆ IfxCif_generateMiImmediateConfigUpdateSignal()

IFX_INLINE void IfxCif_generateMiImmediateConfigUpdateSignal ( void )

Function to generate an immediate configuration update signal for the memory interface submodule.

Returns
None

Definition at line 2385 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifMemInterface(), and IfxCif_Cam_startCapture().

◆ IfxCif_getBaseAddressInitializationEnableState()

IFX_INLINE IfxCif_State IfxCif_getBaseAddressInitializationEnableState ( void )

Function to query the enabled state of the update signal of the base address and buffer size shadow registers to the programmed register init values.

Returns
IfxCif_State_Enabled if update of the base address and buffer size shadow registers is enabled (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port), IfxCif_State_Disabled if update of the base address and buffer size shadow registers is disabled

Definition at line 2391 of file IfxCif.h.

◆ IfxCif_getMainPictureComponentBaseInitAddress()

IFX_EXTERN uint32 IfxCif_getMainPictureComponentBaseInitAddress ( IfxCif_MiMainPicturePathComponents component )

Function to query the initial base address of the ring buffer of one main picture path component.

Parameters
component Main picture path component for which to query the initial base address
Returns
Initial base address of the main picture path component

Definition at line 1761 of file IfxCif.c.

◆ IfxCif_getMaskedMiInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedMiInterruptTriggeredState ( IfxCif_MiInterruptSources interruptSource )

Function to query the masked state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled

Definition at line 1918 of file IfxCif.c.

◆ IfxCif_getMiByteCount()

IFX_INLINE uint32 IfxCif_getMiByteCount ( void )

Function to query the number of JPEG or RAW data bytes of the last transmitted frame.

Returns
Number of JPEG or RAW data bytes of the last transmitted frame (updated at frame end)

Definition at line 2632 of file IfxCif.h.

◆ IfxCif_getMiByteSwapEnableState()

IFX_INLINE IfxCif_State IfxCif_getMiByteSwapEnableState ( void )

Function to query the current state of the change of byte order of the 32 bit output word.

Returns
IfxCif_State_Enabled if byte swapping is enabled, IfxCif_State_Disabled if byte swapping is disabled

Definition at line 2638 of file IfxCif.h.

◆ IfxCif_getMiChrominanceBurstLength()

IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiChrominanceBurstLength ( void )

Function to query the currently set burst length for Cb and Cr data.

Returns
IfxCif_MiBurstLength_4BeatBursts if 4 bytes are transferred, IfxCif_MiBurstLength_8BeatBursts if 8 bytes are transferred

Definition at line 2644 of file IfxCif.h.

◆ IfxCif_getMiDataPathInputEnableState()

IFX_EXTERN IfxCif_State IfxCif_getMiDataPathInputEnableState ( IfxCif_MiDataPaths dataPath )

Function to query the enabled state of one main data path component at the memory interface input.

Parameters
dataPath Main data path component for which to query the enabled state
Returns
IfxCif_State_Enabled if the main data path component is enabled, IfxCif_State_Disabled if the main data path component is disabled

Definition at line 1988 of file IfxCif.c.

◆ IfxCif_getMiDataPathOutputEnableState()

IFX_EXTERN IfxCif_State IfxCif_getMiDataPathOutputEnableState ( IfxCif_MiDataPaths dataPath )

Function to query the enabled state of one main data path component at the memory interface output.

Parameters
dataPath Main data path component for which to query the enabled state
Returns
IfxCif_State_Enabled if the main data path component is enabled, IfxCif_State_Disabled if the main data path component is disabled

Definition at line 2013 of file IfxCif.c.

◆ IfxCif_getMiFeatureEnableState()

IFX_EXTERN IfxCif_State IfxCif_getMiFeatureEnableState ( IfxCif_MiDataPaths dataPath )

Function to query the enabled state of a memory interface data path.

Parameters
dataPath Data path to query
Returns
IfxCif_State_Enabled if the memory interface data path is enabled, IfxCif_State_Disabled if the data path is disabled

Definition at line 2038 of file IfxCif.c.

◆ IfxCif_getMiInterruptEnableState()

IFX_EXTERN IfxCif_State IfxCif_getMiInterruptEnableState ( IfxCif_MiInterruptSources interruptSource )

Function to query the enabled state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_State_Enabled if the interrupt is enabled, IfxCif_State_Disabled if the interrupt is disabled

Definition at line 2063 of file IfxCif.c.

◆ IfxCif_getMiLuminanceBurstLength()

IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiLuminanceBurstLength ( void )

Function to query the currently set burst length for Y, JPEG, or RAW data.

Returns
IfxCif_MiBurstLength_4BeatBursts if 4 bytes are transferred, IfxCif_MiBurstLength_8BeatBursts if 8 bytes are transferred

Definition at line 2650 of file IfxCif.h.

◆ IfxCif_getMiMainPictureComponentBaseAddress()

IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentBaseAddress ( IfxCif_MiMainPicturePathComponents component )

Function to query the current base address of the ring buffer of one main picture path component.

Parameters
component Main Picture path component for which to query the base address
Returns
Current base address of the ring buffer of the main picture path component

Definition at line 2104 of file IfxCif.c.

◆ IfxCif_getMiMainPictureComponentInitialOffsetCounter()

IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentInitialOffsetCounter ( IfxCif_MiMainPicturePathComponents component )

Function to query the initial offset counter inside the ring buffer of one main picture path compoent.

Parameters
component Main picture path component for which to query the initial offset counter
Returns
Initial offset counter value of the main picture path component

Definition at line 2156 of file IfxCif.c.

◆ IfxCif_getMiMainPictureComponentInitSize()

IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentInitSize ( IfxCif_MiMainPicturePathComponents component )

Function to query the initial size of the ring buffer of one main picture path component.

Parameters
component Main picture path component for which to query the intial size
Returns
Initial size of the main picture path component

Definition at line 2129 of file IfxCif.c.

◆ IfxCif_getMiMainPictureComponentOffsetCounter()

IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentOffsetCounter ( IfxCif_MiMainPicturePathComponents component )

Function to query the current offset counter within the ring buffer of one main picture path component.

Parameters
component Main picture path component for which to query the offest counter value
Returns
Current offset counter within the ring buffer of the main picture path component

Definition at line 2183 of file IfxCif.c.

◆ IfxCif_getMiMainPictureComponentOffsetCounterStart()

IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentOffsetCounterStart ( IfxCif_MiMainPicturePathComponents component )

Function to query the offset counter which points to the start address of the previously processed picture for one main picture path component.

Parameters
component Main picture path component for which to query the offset counter value
Returns
Offset counter value pointing to the start address of the previously processed picture

Definition at line 2208 of file IfxCif.c.

◆ IfxCif_getMiMainPictureComponentSize()

IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentSize ( IfxCif_MiMainPicturePathComponents component )

Function to query the current size of the ring buffer of one main picture path component.

Parameters
component Main Picture path component for which to query the size
Returns
Current size of the ring buffer of the main picture path component

Definition at line 2235 of file IfxCif.c.

◆ IfxCif_getMiMainPictureWriteFormat()

IFX_INLINE IfxCif_MiMainPictureWriteFormat IfxCif_getMiMainPictureWriteFormat ( void )

Function to query the currently set write format of the main picture path of the memory interface.

Returns
Currently set write format (one member of IfxCif_MiMainPictureWriteFormat)

Definition at line 2656 of file IfxCif.h.

◆ IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset()

IFX_INLINE uint32 IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset ( void )

Function to query the filling level that triggers an interrupt of main picture path Y component.

Returns
Filling level that triggers an interrupt

Definition at line 2662 of file IfxCif.h.

◆ IfxCif_getMiMainPictureYInterruptOffset()

IFX_INLINE uint32 IfxCif_getMiMainPictureYInterruptOffset ( void )

Function to query the filling level of the main picture Y component that triggers an interrupt.

Returns
Filling level of the main picture Y component that triggers an interrupt

Definition at line 2670 of file IfxCif.h.

◆ IfxCif_getMiOffsetCounterInitializationEnableState()

IFX_INLINE IfxCif_State IfxCif_getMiOffsetCounterInitializationEnableState ( void )

Function to query the enabled state of the update signal of the offset counter shadow registers.

Returns
IfxCif_State_Enabled if update of the offset counter shadow registers is enabled (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port), IfxCif_State_Disabled if update of the offset counter shadow registers is disabled

Definition at line 2676 of file IfxCif.h.

◆ IfxCif_getMiStatusInformation()

IFX_EXTERN IfxCif_ErrorState IfxCif_getMiStatusInformation ( IfxCif_MiStatusInformationSources source )

Function to query the status information of one status information source of the memory interface module.

Parameters
source Status information source for which to query the status information
Returns
IfxCif_ErrorState_NoError if the error has occured since the last clear, IfxCif_ErrorState_Error if the error has occured since the last clear

Definition at line 2260 of file IfxCif.c.

◆ IfxCif_getRawMiInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawMiInterruptTriggeredState ( IfxCif_MiInterruptSources interruptSource )

Function to query the raw state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set

Definition at line 2413 of file IfxCif.c.

◆ IfxCif_miSkipPicture()

IFX_INLINE void IfxCif_miSkipPicture ( void )

Function to skip the current or next starting main data path picture.

Returns
None

Definition at line 2743 of file IfxCif.h.

Referenced by IfxCif_Cam_skipPicture().

◆ IfxCif_setMiBaseAddressInitializationEnableState()

IFX_INLINE void IfxCif_setMiBaseAddressInitializationEnableState ( IfxCif_State state )

Function to enable or disable the update of the base address and buffer size shadow registers to the programmed register init values (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port)

Parameters
state IfxCif_State_Enabled to enable the generation of the update signal, IfxCif_State_Disabled to disable the generation of the update signal
Returns
None

Definition at line 2969 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifMemInterface().

◆ IfxCif_setMiByteSwapEnableState()

IFX_INLINE void IfxCif_setMiByteSwapEnableState ( IfxCif_State enableState )

Function to enable or disable the change of byte order of the 32 bit output word.

Parameters
enableState IfxCif_State_Enabled to enable byte swapping, IfxCif_State_Disabled to disable byte swapping
Returns
None

Definition at line 2975 of file IfxCif.h.

◆ IfxCif_setMiChrominanceBurstLength()

IFX_INLINE void IfxCif_setMiChrominanceBurstLength ( IfxCif_MiBurstLength burstLength )

Function to set the burst length for Cb and Cr data.

Parameters
burstLength Burst length to set
Returns
None

Definition at line 2981 of file IfxCif.h.

◆ IfxCif_setMiFeatureEnableState()

IFX_EXTERN void IfxCif_setMiFeatureEnableState | ( | IfxCif_MiDataPaths | dataPath,
 |  | IfxCif_State | enableState
 | ) |  |

Function to enable or disable one memory interface data path.

Parameters
dataPath | Data path to enable or disable
enableState | IfxCif_State_Enabled to enable the data path, IfxCif_State_Disabled to disable the data path
Returns
None

Definition at line 3643 of file IfxCif.c.

Referenced by IfxCif_Cam_disableJpegEncoder(), IfxCif_Cam_enableJpegEncoder(), and IfxCif_Cam_initCifMemInterface().

◆ IfxCif_setMiInterruptEnableState()

IFX_EXTERN void IfxCif_setMiInterruptEnableState | ( | IfxCif_MiInterruptSources | interruptSource,
 |  | IfxCif_State | interruptEnableState
 | ) |  |

Function to enable or disable an interrupt.

Parameters
interruptSource | Source of the interrupt to enable or disable
interruptEnableState | IfxCif_State_Enabled to enable the interrupt, IfxCif_State_Disabled to disable the interrupt
Returns
None

Definition at line 3664 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifMemInterface().

◆ IfxCif_setMiInterruptRequestBit()

IFX_EXTERN void IfxCif_setMiInterruptRequestBit ( IfxCif_MiInterruptSources interruptSource )

Function to set an interrupt request bit (does not necessarily trigger an interrupt)

Parameters
interruptSource Source of the interrupt
Returns
None

Definition at line 3701 of file IfxCif.c.

◆ IfxCif_setMiLuminanceBurstLength()

IFX_EXTERN void IfxCif_setMiLuminanceBurstLength ( IfxCif_MiBurstLength burstLength )

Function to set the burst length for Y, JPEG, or RAW data.

Parameters
burstLength Burst length to set
Returns
None

Definition at line 3738 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifMemInterface().

◆ IfxCif_setMiMainPictureComponentBaseInitAddress()

IFX_EXTERN void IfxCif_setMiMainPictureComponentBaseInitAddress | ( | IfxCif_MiMainPicturePathComponents | component,
 |  | Ifx_AddressValue | address
 | ) |  |

Function to set the initial base address of the ring buffer for one main picture path component.

Parameters
component | Main picture path component for which to set the initial base address
address | Base address to set (must be word aligned)
Returns
None

Definition at line 3744 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifMemInterface().

◆ IfxCif_setMiMainPictureComponentInitialOffsetCounter()

IFX_EXTERN void IfxCif_setMiMainPictureComponentInitialOffsetCounter | ( | IfxCif_MiMainPicturePathComponents | component,
 |  | uint32 | offsetCounter
 | ) |  |

Function to set the initial offset counter inside the ring buffer for one main picture path component.

Parameters
component | Main picture path component for which to set the initial offest counter
offsetCounter | Offset counter value to set (must be word aligned)
Returns
None

Definition at line 3792 of file IfxCif.c.

◆ IfxCif_setMiMainPictureComponentInitSize()

IFX_EXTERN void IfxCif_setMiMainPictureComponentInitSize | ( | IfxCif_MiMainPicturePathComponents | component,
 |  | uint32 | size
 | ) |  |

Function to set the initial size of the ring buffer for one main picture path component.

Parameters
component | Main picture path component for which to set the initial size
size | Size to set (must be word aligned)
Returns
None

Definition at line 3769 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifMemInterface().

◆ IfxCif_setMiMainPictureWriteFormat()

IFX_INLINE void IfxCif_setMiMainPictureWriteFormat ( IfxCif_MiMainPictureWriteFormat format )

Function to set the write format of the main picture path of the memory interface.

Parameters
format Format to set
Returns
None

Definition at line 2987 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifMemInterface().

◆ IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset()

IFX_INLINE void IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset ( uint32 interruptOffset )

Function to set the filling level to trigger an interrupt for main picture path Y component.

Parameters
interruptOffset Filling level to set
Returns
None

Definition at line 2993 of file IfxCif.h.

◆ IfxCif_setMiOffsetCounterInitializationEnableState()

IFX_INLINE void IfxCif_setMiOffsetCounterInitializationEnableState ( IfxCif_State state )

Function to enable or disable the update of the offset counter shadow registers (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port)

Parameters
state IfxCif_State_Enabled to enable the generation of the update signal, IfxCif_State_Disabled to disable the generation of the update signal
Returns
None

Definition at line 3001 of file IfxCif.h.

Referenced by IfxCif_Cam_skipPicture(), and IfxCif_Cam_startCapture().


iLLD_TC26B: Memory Interface Enumerations

Enumerations
Memory Interface Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for Memory Interface Enumerations:

Enumerations

enum IfxCif_MiBurstLength {
IfxCif_MiBurstLength_4BeatBursts = 0,
IfxCif_MiBurstLength_8BeatBursts = 1
}
Enumerator for burst length affecting the write port of the memory interface. More...
enum IfxCif_MiDataPaths {
IfxCif_MiDataPaths_RawData = 0,
IfxCif_MiDataPaths_JpegData = 1,
IfxCif_MiDataPaths_MainPictureData = 2
}
Enumerator for data paths of the memory interface. More...
enum IfxCif_MiInterruptSources {
IfxCif_MiInterruptSources_BusError = 0,
IfxCif_MiInterruptSources_WrapMainPictureCr = 1,
IfxCif_MiInterruptSources_WrapMainPictureCb = 2,
IfxCif_MiInterruptSources_WrapMainPictureY = 3,
IfxCif_MiInterruptSources_FillMainPictureY = 4,
IfxCif_MiInterruptSources_MacroBlockLine = 5,
IfxCif_MiInterruptSources_MainPictureFrameEnd = 6
}
Enumerator for interrupt sources of the memory interface submodule. More...
enum IfxCif_MiMainPicturePathComponents {
IfxCif_MiMainPicturePathComponents_Y = 0,
IfxCif_MiMainPicturePathComponents_Cb = 1,
IfxCif_MiMainPicturePathComponents_Cr = 2
}
Enumerator for main picture path components of the memory interface. More...
enum IfxCif_MiMainPictureWriteFormat {
IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit = 0,
IfxCif_MiMainPictureWriteFormat_SemiPlanarOrData8Bit = 1,
IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit = 2
}
Enumerator for write formats of data written into memory. More...
enum IfxCif_MiStatusClearSources {
IfxCif_MiStatusClearSources_ExtraPath5FifoFull = 0,
IfxCif_MiStatusClearSources_ExtraPath4FifoFull = 1,
IfxCif_MiStatusClearSources_ExtraPath3FifoFull = 2,
IfxCif_MiStatusClearSources_ExtraPath2FifoFull = 3,
IfxCif_MiStatusClearSources_ExtraPath1FifoFull = 4,
IfxCif_MiStatusClearSources_BusWriteError = 5,
IfxCif_MiStatusClearSources_MainPictureCrFifoFull = 6,
IfxCif_MiStatusClearSources_MainPictureCbFifoFull = 7,
IfxCif_MiStatusClearSources_MainPictureYFifoFull = 8
}
Enumerator for status clear sources of the memory interface module. More...
enum IfxCif_MiStatusInformationSources {
IfxCif_MiStatusInformationSources_BusWriteError = 0,
IfxCif_MiStatusInformationSources_MainPictureCrFifoFull = 1,
IfxCif_MiStatusInformationSources_MainPictureCbFifoFull = 2,
IfxCif_MiStatusInformationSources_MainPictureYFifoFull = 3
}
Enumerator for status information sources of the memory interface submodule. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCif_MiBurstLength

enum IfxCif_MiBurstLength

Enumerator for burst length affecting the write port of the memory interface.

Enumerator
IfxCif_MiBurstLength_4BeatBursts | 4-beat bursts
IfxCif_MiBurstLength_8BeatBursts | 8-beat bursts

Definition at line 320 of file IfxCif.h.

◆ IfxCif_MiDataPaths

enum IfxCif_MiDataPaths

Enumerator for data paths of the memory interface.

Enumerator
IfxCif_MiDataPaths_RawData | RAW data path.
IfxCif_MiDataPaths_JpegData | JPEG data path.
IfxCif_MiDataPaths_MainPictureData | main picture data path

Definition at line 328 of file IfxCif.h.

◆ IfxCif_MiInterruptSources

enum IfxCif_MiInterruptSources

Enumerator for interrupt sources of the memory interface submodule.

Enumerator
IfxCif_MiInterruptSources_BusError | Bus write or read error interrupt (from handshake target interfaces)
IfxCif_MiInterruptSources_WrapMainPictureCr | Main picture Cr address wrap interrupt.
IfxCif_MiInterruptSources_WrapMainPictureCb | Main picture Cb address wrap interrupt.
IfxCif_MiInterruptSources_WrapMainPictureY | Main picture Y address wrap interrupt.
IfxCif_MiInterruptSources_FillMainPictureY | Main picture Y address wrap interrupt.
IfxCif_MiInterruptSources_MacroBlockLine | Macroblock line interrupt of main picture (16 lines of Y, 8 lines of Cb and 8 lines of Cr are written into RAM)
IfxCif_MiInterruptSources_MainPictureFrameEnd | Picture end of frame interrupt.

Definition at line 337 of file IfxCif.h.

◆ IfxCif_MiMainPicturePathComponents

enum IfxCif_MiMainPicturePathComponents

Enumerator for main picture path components of the memory interface.

Enumerator
IfxCif_MiMainPicturePathComponents_Y | Y-component.
IfxCif_MiMainPicturePathComponents_Cb | Cb-component.
IfxCif_MiMainPicturePathComponents_Cr | Cr-component.

Definition at line 350 of file IfxCif.h.

◆ IfxCif_MiMainPictureWriteFormat

enum IfxCif_MiMainPictureWriteFormat

Enumerator for write formats of data written into memory.

Enumerator
IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit | planar (YCbCr mode) / RAW & data mode (8 bit)
IfxCif_MiMainPictureWriteFormat_SemiPlanarOrData8Bit | semi-planar for YCbCr 4:2:x / RAW 8 bit
IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit | interleaved_combined for YCbCr 4:2:2 only / RAW & data mode (greater 8 up to 16 bit)

Definition at line 359 of file IfxCif.h.

◆ IfxCif_MiStatusClearSources

enum IfxCif_MiStatusClearSources

Enumerator for status clear sources of the memory interface module.

Enumerator
IfxCif_MiStatusClearSources_ExtraPath5FifoFull | FIFO full flag in extra path 5.
IfxCif_MiStatusClearSources_ExtraPath4FifoFull | FIFO full flag in extra path 4.
IfxCif_MiStatusClearSources_ExtraPath3FifoFull | FIFO full flag in extra path 3.
IfxCif_MiStatusClearSources_ExtraPath2FifoFull | FIFO full flag in extra path 2.
IfxCif_MiStatusClearSources_ExtraPath1FifoFull | FIFO full flag in extra path 1.
IfxCif_MiStatusClearSources_BusWriteError | Bus write error flag.
IfxCif_MiStatusClearSources_MainPictureCrFifoFull | Cr FIFO full flag in main path.
IfxCif_MiStatusClearSources_MainPictureCbFifoFull | Cb FIFO full flag in main path.
IfxCif_MiStatusClearSources_MainPictureYFifoFull | Y FIFO full flag in main path.

Definition at line 368 of file IfxCif.h.

◆ IfxCif_MiStatusInformationSources

enum IfxCif_MiStatusInformationSources

Enumerator for status information sources of the memory interface submodule.

Enumerator
IfxCif_MiStatusInformationSources_BusWriteError | An Bus error occurred while writing to the Bus (main/self path) since last clear.
IfxCif_MiStatusInformationSources_MainPictureCrFifoFull | FIFO full flag of Cr FIFO in main path asserted since last clear.
IfxCif_MiStatusInformationSources_MainPictureCbFifoFull | FIFO full flag of Cb FIFO in main path asserted since last clear.
IfxCif_MiStatusInformationSources_MainPictureYFifoFull | FIFO full flag of Y FIFO in main path asserted since last clear.

Definition at line 383 of file IfxCif.h.


iLLD_TC26B: JPEG Encoder Functions

Functions
JPEG Encoder Functions
iLLD » CIF » Standard Driver
Collaboration diagram for JPEG Encoder Functions:

Functions

IFX_INLINE IfxCif_JpeHeaderGenerationMode | IfxCif_getJpeHeaderGenerationMode (void)
Function to query the current header generation debug control mode. More...
IFX_INLINE IfxCif_JpeHeaderMode | IfxCif_getJpeHeaderMode (void)
Function to query the currently set JPE header mode. More...
IFX_INLINE IfxCif_State | IfxCif_getJpeMode (void)
Function to query the JPE encode mode. More...
IFX_INLINE uint16 | IfxCif_getJpeRestartInterval (void)
Function to query the current restart interval. More...
IFX_INLINE IfxCif_JpeState | IfxCif_getJpeState (void)
Function to get the current JPEG codec state. More...
IFX_INLINE IfxCif_JpeTableId | IfxCif_getJpeTableId (void)
Function to query the current JPE Table ID. More...
IFX_INLINE IfxCif_JpegJfifStreamEncoderContinuousMode | IfxCif_getJpegJfifStreamEncoderContinuousMode (void)
Function to query the current encoder continuous mode. More...
IFX_INLINE IfxCif_JpegPictureEncodingFormat | IfxCif_getJpegPictureEncodingFormat (void)
Function to query the current picture encoding format. More...
IFX_INLINE void | IfxCif_initJpegEncoder (void)
Function to immediately start the JPEG encoder. This function has to be called after IfxCif_startJpegJfifStreamEncoder to start the JPEG encoder. More...
IFX_INLINE void | IfxCif_jpeGenerateHeader (void)
Function to start to generate JPEG stream header. Auto reset after one clock cycle. More...
IFX_INLINE void | IfxCif_setJpeHeaderGenerationMode (IfxCif_JpeHeaderGenerationMode headerGenerationMode)
Function to set the header generation debug control mode. More...
IFX_INLINE void | IfxCif_setJpeHeaderMode (IfxCif_JpeHeaderMode headerMode)
Function to set the JPE header mode. More...
IFX_INLINE void | IfxCif_setJpeRestartInterval (uint16 interval)
Function to set the restart interval. More...
IFX_INLINE void | IfxCif_setJpeTableDataLsb (uint8 data)
Function to set the JPE Table LSB. More...
IFX_INLINE void | IfxCif_setJpeTableDataMsb (uint8 data)
Function to set the JPE Table MSB. More...
IFX_INLINE void | IfxCif_setJpeTableId (IfxCif_JpeTableId tableId)
Function to set the JPE Table ID. More...
IFX_INLINE void | IfxCif_setJpegCodecImageSizes (uint16 hSize, uint16 vSize)
Function to set the JPEG codec image sizes. More...
IFX_INLINE void | IfxCif_setJpegJfifStreamEncoderContinuousMode (IfxCif_JpegJfifStreamEncoderContinuousMode mode)
Function to set the stream encoder continuous mode. More...
IFX_INLINE void | IfxCif_setJpegPictureEncodingFormat (IfxCif_JpegPictureEncodingFormat format)
Function to set the picture encoding format. More...
IFX_INLINE void | IfxCif_startJpegJfifStreamEncoder (void)
Function to start JFIF stream encoding. Auto reset after one clock cycle. More...
IFX_EXTERN void | IfxCif_clearJpeInterrupt (IfxCif_JpeInterruptSources interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN uint8 | IfxCif_getHuffmanAcTableLength (IfxCif_HuffmanTables table)
Function to query the currently set Huffman Table length for AC values. More...
IFX_EXTERN IfxCif_State | IfxCif_getHuffmanAcTableSelectorState (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for AC values. More...
IFX_EXTERN uint8 | IfxCif_getHuffmanDcTableLength (IfxCif_HuffmanTables table)
Function to query the current Huffman Table length for DC values. More...
IFX_EXTERN IfxCif_State | IfxCif_getHuffmanDcTableSelectorState (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for DC values. More...
IFX_EXTERN IfxCif_JpeDebugSignalState | IfxCif_getJpeDebugSignalState (IfxCif_JpeDebugSignalSources source)
Function to query the state of one JPE debug signal source. More...
IFX_EXTERN IfxCif_State | IfxCif_getJpeInterruptEnableState (IfxCif_JpeInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN IfxCif_JpeQTableSelector | IfxCif_getJpeQTableSelector (IfxCif_JpeQTableSelectorComponents component)
Function to query the currently selected Q-Table for one component. More...
IFX_EXTERN IfxCif_State | IfxCif_getJpeScalingEnableState (IfxCif_JpeScalingValueSources source)
Function to query the current enabled state of the scaling of an input value source. More...
IFX_EXTERN uint16 | IfxCif_getJpegCodecImageSize (IfxCif_ImageTiers tier)
Function to query the currently set JPEG codec image size of one tier. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedJpeInterruptTriggeredState (IfxCif_JpeInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawJpeInterruptTriggeredState (IfxCif_JpeInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IFX_EXTERN void | IfxCif_programJpeTable (IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length)
IFX_EXTERN void | IfxCif_setHuffmanAcTableLength (IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for AC values. More...
IFX_EXTERN void | IfxCif_setHuffmanAcTableSelector (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for AC Values. More...
IFX_EXTERN void | IfxCif_setHuffmanDcTableLength (IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for DC values. More...
IFX_EXTERN void | IfxCif_setHuffmanDcTableSelector (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for DC values. More...
IFX_EXTERN void | IfxCif_setJpeInterruptEnableState (IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setJpeInterruptRequestBit (IfxCif_JpeInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setJpeQTableSelector (IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector)
Function to set the Q-Table selector for one component. More...
IFX_EXTERN void | IfxCif_setJpeScalingEnableState (IfxCif_JpeScalingValueSources source, IfxCif_State scalingEnable)
Function to enable or disable scaling of one input value source. More...
IFX_EXTERN void | IfxCif_setJpegCodecImageSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the JPEG codec image size of one tier. More...

Detailed Description

Function Documentation

◆ IfxCif_clearJpeInterrupt()

IFX_EXTERN void IfxCif_clearJpeInterrupt ( IfxCif_JpeInterruptSources interruptSource )

Function to clear an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
None

Definition at line 152 of file IfxCif.c.

◆ IfxCif_getHuffmanAcTableLength()

IFX_EXTERN uint8 IfxCif_getHuffmanAcTableLength ( IfxCif_HuffmanTables table )

Function to query the currently set Huffman Table length for AC values.

Parameters
table Huffman Table for which to query the current length
Returns
Current length of Huffman Table

Definition at line 1050 of file IfxCif.c.

◆ IfxCif_getHuffmanAcTableSelectorState()

IFX_EXTERN IfxCif_State IfxCif_getHuffmanAcTableSelectorState | ( | IfxCif_HuffmanTables | table,
 |  | IfxCif_HuffmanTableComponents | component
 | ) |  |

Function to check if a Huffman Table and a Huffman Table component is enabled for AC values.

Parameters
table | Huffman Table to check
component | Huffman Table component to check
Returns
IfxCif_State_Enabled if the queried Huffman Table and the Huffman Table component is selected, IfxCif_State_Disabled otherwise

Definition at line 1071 of file IfxCif.c.

◆ IfxCif_getHuffmanDcTableLength()

IFX_EXTERN uint8 IfxCif_getHuffmanDcTableLength ( IfxCif_HuffmanTables table )

Function to query the current Huffman Table length for DC values.

Parameters
table Huffman Table for which to query the current length
Returns
Current length of Huffman Table

Definition at line 1098 of file IfxCif.c.

◆ IfxCif_getHuffmanDcTableSelectorState()

IFX_EXTERN IfxCif_State IfxCif_getHuffmanDcTableSelectorState | ( | IfxCif_HuffmanTables | table,
 |  | IfxCif_HuffmanTableComponents | component
 | ) |  |

Function to check if a Huffman Table and a Huffman Table component is enabled for DC values.

Parameters
table | Huffman Table to check
component | Huffman Table component to check
Returns
IfxCif_State_Enabled if the queried Huffman Table and the Huffman Table component is selected, IfxCif_State_Disabled otherwise

Definition at line 1119 of file IfxCif.c.

◆ IfxCif_getJpeDebugSignalState()

IFX_EXTERN IfxCif_JpeDebugSignalState IfxCif_getJpeDebugSignalState ( IfxCif_JpeDebugSignalSources source )

Function to query the state of one JPE debug signal source.

Parameters
source Signal source for which to query the debug signal state
Returns
IfxCif_JpeDebugSignalState_Inactive if the debug signal is currently inactive, IfxCif_JpeDebugSignalState_Active if the debug signal is currently active

Definition at line 1548 of file IfxCif.c.

◆ IfxCif_getJpegCodecImageSize()

IFX_EXTERN uint16 IfxCif_getJpegCodecImageSize ( IfxCif_ImageTiers tier )

Function to query the currently set JPEG codec image size of one tier.

Parameters
tier Tier for which to query the JPEG codec image size
Returns
Currently set image size for R2B and SGEN blocks

Definition at line 1664 of file IfxCif.c.

◆ IfxCif_getJpegJfifStreamEncoderContinuousMode()

IFX_INLINE IfxCif_JpegJfifStreamEncoderContinuousMode IfxCif_getJpegJfifStreamEncoderContinuousMode ( void )

Function to query the current encoder continuous mode.

Returns
Current encoder continuous mode (one member of IfxCif_JpegJfifStreamEncoderContinuousMode)

Definition at line 2614 of file IfxCif.h.

◆ IfxCif_getJpegPictureEncodingFormat()

IFX_INLINE IfxCif_JpegPictureEncodingFormat IfxCif_getJpegPictureEncodingFormat ( void )

Function to query the current picture encoding format.

Returns
Current picture encoding format

Definition at line 2620 of file IfxCif.h.

◆ IfxCif_getJpeHeaderGenerationMode()

IFX_INLINE IfxCif_JpeHeaderGenerationMode IfxCif_getJpeHeaderGenerationMode ( void )

Function to query the current header generation debug control mode.

Returns
Currently set header generation debug control mode (one member of IfxCif_JpeHeaderGenerationMode)

Definition at line 2578 of file IfxCif.h.

◆ IfxCif_getJpeHeaderMode()

IFX_INLINE IfxCif_JpeHeaderMode IfxCif_getJpeHeaderMode ( void )

Function to query the currently set JPE header mode.

Returns
Currently set JPE header mode (one member of IfxCif_JpeHeaderMode)

Definition at line 2584 of file IfxCif.h.

◆ IfxCif_getJpeInterruptEnableState()

IFX_EXTERN IfxCif_State IfxCif_getJpeInterruptEnableState ( IfxCif_JpeInterruptSources interruptSource )

Function to query the enabled state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_State_Enabled if the interrupt is enabled, IfxCif_State_Disabled if the interrupt is disabled

Definition at line 1581 of file IfxCif.c.

◆ IfxCif_getJpeMode()

IFX_INLINE IfxCif_State IfxCif_getJpeMode ( void )

Function to query the JPE encode mode.

Returns
Always 1, because this is the encoder only edition

Definition at line 2590 of file IfxCif.h.

◆ IfxCif_getJpeQTableSelector()

IFX_EXTERN IfxCif_JpeQTableSelector IfxCif_getJpeQTableSelector ( IfxCif_JpeQTableSelectorComponents component )

Function to query the currently selected Q-Table for one component.

Parameters
component Component for which to query the currently selected Q-Table
Returns
Currently selected Q-Table

Definition at line 1618 of file IfxCif.c.

◆ IfxCif_getJpeRestartInterval()

IFX_INLINE uint16 IfxCif_getJpeRestartInterval ( void )

Function to query the current restart interval.

Returns
Current restart interval

Definition at line 2596 of file IfxCif.h.

◆ IfxCif_getJpeScalingEnableState()

IFX_EXTERN IfxCif_State IfxCif_getJpeScalingEnableState ( IfxCif_JpeScalingValueSources source )

Function to query the current enabled state of the scaling of an input value source.

Parameters
source Input value source for which to query the enabled state
Returns
IfxCif_State_Enabled if scaling is enabled, IfxCif_State_Disabled if scaling is disabled

Definition at line 1643 of file IfxCif.c.

◆ IfxCif_getJpeState()

IFX_INLINE IfxCif_JpeState IfxCif_getJpeState ( void )

Function to get the current JPEG codec state.

Returns
IfxCif_JpeState_Busy if the JPEG codec is currently processing, IfxCif_JpeState_Free if the JPEG codec is currently free

Definition at line 2602 of file IfxCif.h.

◆ IfxCif_getJpeTableId()

IFX_INLINE IfxCif_JpeTableId IfxCif_getJpeTableId ( void )

Function to query the current JPE Table ID.

Returns
Current JPE Table ID

Definition at line 2608 of file IfxCif.h.

◆ IfxCif_getMaskedJpeInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedJpeInterruptTriggeredState ( IfxCif_JpeInterruptSources interruptSource )

Function to query the masked state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled

Definition at line 1881 of file IfxCif.c.

◆ IfxCif_getRawJpeInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawJpeInterruptTriggeredState ( IfxCif_JpeInterruptSources interruptSource )

Function to query the raw state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set

Definition at line 2376 of file IfxCif.c.

◆ IfxCif_initJpegEncoder()

IFX_INLINE void IfxCif_initJpegEncoder ( void )

Function to immediately start the JPEG encoder. This function has to be called after IfxCif_startJpegJfifStreamEncoder to start the JPEG encoder.

Returns
None

Definition at line 2731 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifJpegEncoder().

◆ IfxCif_jpeGenerateHeader()

IFX_INLINE void IfxCif_jpeGenerateHeader ( void )

Function to start to generate JPEG stream header. Auto reset after one clock cycle.

Returns
None

Definition at line 2737 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifJpegEncoder().

◆ IfxCif_programJpeTable()

IFX_EXTERN void IfxCif_programJpeTable | ( | IfxCif_JpeTableId | tableId,
 |  | const uint8 * | tableEntry,
 |  | uint8 | length
 | ) |  |
Returns
None

Definition at line 2631 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifJpegEncoder().

◆ IfxCif_setHuffmanAcTableLength()

IFX_EXTERN void IfxCif_setHuffmanAcTableLength | ( | IfxCif_HuffmanTables | table,
 |  | uint8 | length
 | ) |  |

Function to set the Huffman Table length for AC values.

Parameters
table | Huffman Table for which to set the length
length | Length to set
Returns
None

Definition at line 3104 of file IfxCif.c.

Referenced by IfxCif_programJpeTable().

◆ IfxCif_setHuffmanAcTableSelector()

IFX_EXTERN void IfxCif_setHuffmanAcTableSelector | ( | IfxCif_HuffmanTables | table,
 |  | IfxCif_HuffmanTableComponents | component
 | ) |  |

Function to set the Huffman Table selector for AC Values.

Parameters
table | Huffman Table to select
component | Huffman Table component to select
Returns
None

Definition at line 3121 of file IfxCif.c.

◆ IfxCif_setHuffmanDcTableLength()

IFX_EXTERN void IfxCif_setHuffmanDcTableLength | ( | IfxCif_HuffmanTables | table,
 |  | uint8 | length
 | ) |  |

Function to set the Huffman Table length for DC values.

Parameters
table | Huffman Table for which to set the length
length | Length to set
Returns
None

Definition at line 3138 of file IfxCif.c.

Referenced by IfxCif_programJpeTable().

◆ IfxCif_setHuffmanDcTableSelector()

IFX_EXTERN void IfxCif_setHuffmanDcTableSelector | ( | IfxCif_HuffmanTables | table,
 |  | IfxCif_HuffmanTableComponents | component
 | ) |  |

Function to set the Huffman Table selector for DC values.

Parameters
table | Huffman Table to select
component | Huffman Table component to select
Returns
None

Definition at line 3155 of file IfxCif.c.

◆ IfxCif_setJpegCodecImageSize()

IFX_EXTERN void IfxCif_setJpegCodecImageSize | ( | IfxCif_ImageTiers | tier,
 |  | uint16 | size
 | ) |  |

Function to set the JPEG codec image size of one tier.

Parameters
tier | Tier for which to set the JPEG codec image size
size | Image size for R2B and SGEN blocks
Returns
None

Definition at line 3541 of file IfxCif.c.

◆ IfxCif_setJpegCodecImageSizes()

IFX_INLINE void IfxCif_setJpegCodecImageSizes | ( | uint16 | hSize,
 |  | uint16 | vSize
 | ) |  |

Function to set the JPEG codec image sizes.

Parameters
hSize | Image horizontal size
vSize | Image vertical size
Returns
None

Definition at line 2943 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifJpegEncoder().

◆ IfxCif_setJpegJfifStreamEncoderContinuousMode()

IFX_INLINE void IfxCif_setJpegJfifStreamEncoderContinuousMode ( IfxCif_JpegJfifStreamEncoderContinuousMode mode )

Function to set the stream encoder continuous mode.

Parameters
mode Encoder continuous mode to set
Returns
None

Definition at line 2950 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifJpegEncoder().

◆ IfxCif_setJpegPictureEncodingFormat()

IFX_INLINE void IfxCif_setJpegPictureEncodingFormat ( IfxCif_JpegPictureEncodingFormat format )

Function to set the picture encoding format.

Parameters
format Encoding format to set
Returns
None

Definition at line 2956 of file IfxCif.h.

◆ IfxCif_setJpeHeaderGenerationMode()

IFX_INLINE void IfxCif_setJpeHeaderGenerationMode ( IfxCif_JpeHeaderGenerationMode headerGenerationMode )

Function to set the header generation debug control mode.

Parameters
headerGenerationMode Header generation debug control mode to set
Returns
None

Definition at line 2907 of file IfxCif.h.

◆ IfxCif_setJpeHeaderMode()

IFX_INLINE void IfxCif_setJpeHeaderMode ( IfxCif_JpeHeaderMode headerMode )

Function to set the JPE header mode.

Parameters
headerMode Header mode to set
Returns
None

Definition at line 2913 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifJpegEncoder().

◆ IfxCif_setJpeInterruptEnableState()

IFX_EXTERN void IfxCif_setJpeInterruptEnableState | ( | IfxCif_JpeInterruptSources | interruptSource,
 |  | IfxCif_State | interruptEnableState
 | ) |  |

Function to enable or disable an interrupt.

Parameters
interruptSource | Source of the interrupt to enable or disable
interruptEnableState | IfxCif_State_Enabled to enable the interrupt, IfxCif_State_Disabled to disable the interrupt
Returns
None

Definition at line 3437 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifJpegEncoder().

◆ IfxCif_setJpeInterruptRequestBit()

IFX_EXTERN void IfxCif_setJpeInterruptRequestBit ( IfxCif_JpeInterruptSources interruptSource )

Function to set an interrupt request bit (does not necessarily trigger an interrupt)

Parameters
interruptSource Source of the interrupt
Returns
None

Definition at line 3470 of file IfxCif.c.

◆ IfxCif_setJpeQTableSelector()

IFX_EXTERN void IfxCif_setJpeQTableSelector | ( | IfxCif_JpeQTableSelectorComponents | component,
 |  | IfxCif_JpeQTableSelector | selector
 | ) |  |

Function to set the Q-Table selector for one component.

Parameters
component | Component for which to select the Q-Table
selector | Q-Table to select
Returns
None

Definition at line 3503 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifJpegEncoder().

◆ IfxCif_setJpeRestartInterval()

IFX_INLINE void IfxCif_setJpeRestartInterval ( uint16 interval )

Function to set the restart interval.

Parameters
interval Restart interval to set
Returns
None

Definition at line 2919 of file IfxCif.h.

◆ IfxCif_setJpeScalingEnableState()

IFX_EXTERN void IfxCif_setJpeScalingEnableState | ( | IfxCif_JpeScalingValueSources | source,
 |  | IfxCif_State | scalingEnable
 | ) |  |

Function to enable or disable scaling of one input value source.

Parameters
source | Input value source for which to query the enabled state
scalingEnable | IfxCif_State_Enabled to enable scaling, IfxCif_State_Disabled to disable scaling
Returns
None

Definition at line 3524 of file IfxCif.c.

◆ IfxCif_setJpeTableDataLsb()

IFX_INLINE void IfxCif_setJpeTableDataLsb ( uint8 data )

Function to set the JPE Table LSB.

Parameters
data Value to set for the JPE Table LSB
Returns
None

Definition at line 2925 of file IfxCif.h.

◆ IfxCif_setJpeTableDataMsb()

IFX_INLINE void IfxCif_setJpeTableDataMsb ( uint8 data )

Function to set the JPE Table MSB.

Parameters
data Value to set for the JPE Table MSB
Returns
None

Definition at line 2931 of file IfxCif.h.

◆ IfxCif_setJpeTableId()

IFX_INLINE void IfxCif_setJpeTableId ( IfxCif_JpeTableId tableId )

Function to set the JPE Table ID.

Parameters
tableId tableId Table ID to set
Returns
None

Definition at line 2937 of file IfxCif.h.

◆ IfxCif_startJpegJfifStreamEncoder()

IFX_INLINE void IfxCif_startJpegJfifStreamEncoder ( void )

Function to start JFIF stream encoding. Auto reset after one clock cycle.

Returns
None

Definition at line 3031 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifJpegEncoder().


iLLD_TC26B: JPEG Encoder Enumerations

Enumerations
JPEG Encoder Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for JPEG Encoder Enumerations:

Enumerations

enum IfxCif_HuffmanTableComponents {
IfxCif_HuffmanTableComponents_Component0 = 0,
IfxCif_HuffmanTableComponents_Component1 = 1,
IfxCif_HuffmanTableComponents_Component2 = 2
}
Enumerator for the Huffman Table components. More...
enum IfxCif_HuffmanTables {
IfxCif_HuffmanTables_Table0 = 0,
IfxCif_HuffmanTables_Table1 = 1
}
Enumerator for the Huffman Tables. More...
enum IfxCif_JpeDebugSignalSources {
IfxCif_JpeDebugSignalSources_BadTableAccess = 0,
IfxCif_JpeDebugSignalSources_VlcTableBusy = 1,
IfxCif_JpeDebugSignalSources_R2BMemoryFull = 2,
IfxCif_JpeDebugSignalSources_VlcEncodeBusy = 3,
IfxCif_JpeDebugSignalSources_QiqTableAccess = 4
}
Enumerator for the debug signal sources. More...
enum IfxCif_JpeDebugSignalState {
IfxCif_JpeDebugSignalState_Inactive = 0,
IfxCif_JpeDebugSignalState_Active = 1
}
Enumerator for the debug signal state. More...
enum IfxCif_JpeHeaderGenerationMode {
IfxCif_JpeHeaderGenerationMode_WaitForEncodedImage = 0,
IfxCif_JpeHeaderGenerationMode_TransmitLastHeaderBytes = 1
}
Enumerator for the header generation debug control. More...
enum IfxCif_JpeHeaderMode {
IfxCif_JpeHeaderMode_NoAppnHeader = 0,
IfxCif_JpeHeaderMode_JfifHeader = 2
}
Enumerator for the JPE header mode. More...
enum IfxCif_JpeInterruptSources {
IfxCif_JpeInterruptSources_VlcTableError = 0,
IfxCif_JpeInterruptSources_R2BImageSizeError = 1,
IfxCif_JpeInterruptSources_DcTableError = 2,
IfxCif_JpeInterruptSources_VlcSymbolError = 3,
IfxCif_JpeInterruptSources_HeaderGenerationComplete = 4,
IfxCif_JpeInterruptSources_EncodingComplete = 5
}
Enumerator for interrupt sources of the JPEG encoder module. More...
enum IfxCif_JpeQTableSelector {
IfxCif_JpeQTableSelector_Table0 = 0,
IfxCif_JpeQTableSelector_Table1 = 1,
IfxCif_JpeQTableSelector_Table2 = 2,
IfxCif_JpeQTableSelector_Table3 = 3
}
Enumerator for the Q-Table selector. More...
enum IfxCif_JpeQTableSelectorComponents {
IfxCif_JpeQTableSelectorComponents_Y = 0,
IfxCif_JpeQTableSelectorComponents_U = 1,
IfxCif_JpeQTableSelectorComponents_V = 2
}
Enumerator for the components to select Q-Tables. More...
enum IfxCif_JpeScalingValueSources {
IfxCif_JpeScalingValueSources_Y = 0,
IfxCif_JpeScalingValueSources_CbCr = 1
}
Enumerator for the input scaling values of the JPEG encoder. More...
enum IfxCif_JpeState {
IfxCif_JpeState_Free = 0,
IfxCif_JpeState_Busy = 1
}
Enumerator for the codec state. More...
enum IfxCif_JpeTableId {
IfxCif_JpeTableId_QTable0 = 0,
IfxCif_JpeTableId_QTable1 = 1,
IfxCif_JpeTableId_QTable2 = 2,
IfxCif_JpeTableId_QTable3 = 3,
IfxCif_JpeTableId_VlcDcTable0 = 4,
IfxCif_JpeTableId_VlcAcTable0 = 5,
IfxCif_JpeTableId_VlcDcTable1 = 6,
IfxCif_JpeTableId_VlcAcTable1 = 7
}
Enumerator for the JPE Tables. More...
enum IfxCif_JpegJfifStreamEncoderContinuousMode {
IfxCif_JpegJfifStreamEncoderContinuousMode_StopAtFrameEnd = 0,
IfxCif_JpegJfifStreamEncoderContinuousMode_StartAutomatically = 1,
IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically = 3
}
Enumerator for the JFIF stream encoder continuous mode. More...
enum IfxCif_JpegPictureEncodingFormat {
IfxCif_JpegPictureEncodingFormat_422 = 0,
IfxCif_JpegPictureEncodingFormat_400 = 1
}
Enumerator for the picture encoding format. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCif_HuffmanTableComponents

enum IfxCif_HuffmanTableComponents

Enumerator for the Huffman Table components.

Enumerator
IfxCif_HuffmanTableComponents_Component0 | Component 0.
IfxCif_HuffmanTableComponents_Component1 | Component 1.
IfxCif_HuffmanTableComponents_Component2 | Component 2.

Definition at line 397 of file IfxCif.h.

◆ IfxCif_HuffmanTables

enum IfxCif_HuffmanTables

Enumerator for the Huffman Tables.

Enumerator
IfxCif_HuffmanTables_Table0 | Huffman Table 0.
IfxCif_HuffmanTables_Table1 | Huffman Table 1.

Definition at line 406 of file IfxCif.h.

◆ IfxCif_JpeDebugSignalSources

enum IfxCif_JpeDebugSignalSources

Enumerator for the debug signal sources.

Enumerator
IfxCif_JpeDebugSignalSources_BadTableAccess | Debug Bad Table Access (set if an access to the TABLE_DATA or to the TABLE_ID register is performed, when the JPEG_ENCODER is busy)
IfxCif_JpeDebugSignalSources_VlcTableBusy | Debug VLC Table Busy (vlc access to hufftables)
IfxCif_JpeDebugSignalSources_R2BMemoryFull | R2B Memory Full (line memory status of r2b)
IfxCif_JpeDebugSignalSources_VlcEncodeBusy | VLC Encode Busy (vlc encode processing active)
IfxCif_JpeDebugSignalSources_QiqTableAccess | QiqTableAccess.

Definition at line 414 of file IfxCif.h.

◆ IfxCif_JpeDebugSignalState

enum IfxCif_JpeDebugSignalState

Enumerator for the debug signal state.

Enumerator
IfxCif_JpeDebugSignalState_Inactive | Debug signal is inactive.
IfxCif_JpeDebugSignalState_Active | Debug signal is active.

Definition at line 425 of file IfxCif.h.

◆ IfxCif_JpegJfifStreamEncoderContinuousMode

enum IfxCif_JpegJfifStreamEncoderContinuousMode

Enumerator for the JFIF stream encoder continuous mode.

Enumerator
IfxCif_JpegJfifStreamEncoderContinuousMode_StopAtFrameEnd | encoder stops at frame end
IfxCif_JpegJfifStreamEncoderContinuousMode_StartAutomatically | encoder starts automatically to encode the next frame
IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically | encoder first generates next header and then encodes automatically the next frame

Definition at line 510 of file IfxCif.h.

◆ IfxCif_JpegPictureEncodingFormat

enum IfxCif_JpegPictureEncodingFormat

Enumerator for the picture encoding format.

Enumerator
IfxCif_JpegPictureEncodingFormat_422 | 4:2:2 format
IfxCif_JpegPictureEncodingFormat_400 | 4:0:0 format

Definition at line 519 of file IfxCif.h.

◆ IfxCif_JpeHeaderGenerationMode

enum IfxCif_JpeHeaderGenerationMode

Enumerator for the header generation debug control.

Enumerator
IfxCif_JpeHeaderGenerationMode_WaitForEncodedImage | wait for encoded image data to fill output buffer
IfxCif_JpeHeaderGenerationMode_TransmitLastHeaderBytes | immediately transmit last header bytes

Definition at line 433 of file IfxCif.h.

◆ IfxCif_JpeHeaderMode

enum IfxCif_JpeHeaderMode

Enumerator for the JPE header mode.

Enumerator
IfxCif_JpeHeaderMode_NoAppnHeader | no APPn header
IfxCif_JpeHeaderMode_JfifHeader | JFIF header.

Definition at line 441 of file IfxCif.h.

◆ IfxCif_JpeInterruptSources

enum IfxCif_JpeInterruptSources

Enumerator for interrupt sources of the JPEG encoder module.

Enumerator
IfxCif_JpeInterruptSources_VlcTableError | VLC table error.
IfxCif_JpeInterruptSources_R2BImageSizeError | R2B image size error.
IfxCif_JpeInterruptSources_DcTableError | DC Table error.
IfxCif_JpeInterruptSources_VlcSymbolError | VLC symbol error.
IfxCif_JpeInterruptSources_HeaderGenerationComplete | Header generation complete.
IfxCif_JpeInterruptSources_EncodingComplete | Encoding complete.

Definition at line 449 of file IfxCif.h.

◆ IfxCif_JpeQTableSelector

enum IfxCif_JpeQTableSelector

Enumerator for the Q-Table selector.

Enumerator
IfxCif_JpeQTableSelector_Table0 | Q-Table 0.
IfxCif_JpeQTableSelector_Table1 | Q-Table 1.
IfxCif_JpeQTableSelector_Table2 | Q-Table 2.
IfxCif_JpeQTableSelector_Table3 | Q-Table 3.

Definition at line 461 of file IfxCif.h.

◆ IfxCif_JpeQTableSelectorComponents

enum IfxCif_JpeQTableSelectorComponents

Enumerator for the components to select Q-Tables.

Enumerator
IfxCif_JpeQTableSelectorComponents_Y | Y-component.
IfxCif_JpeQTableSelectorComponents_U | U-component.
IfxCif_JpeQTableSelectorComponents_V | V-component.

Definition at line 471 of file IfxCif.h.

◆ IfxCif_JpeScalingValueSources

enum IfxCif_JpeScalingValueSources

Enumerator for the input scaling values of the JPEG encoder.

Enumerator
IfxCif_JpeScalingValueSources_Y | scaling Y input from [16..235] to [0..255]
IfxCif_JpeScalingValueSources_CbCr | scaling Cb/Cr input from [16..240] to [0..255]

Definition at line 480 of file IfxCif.h.

◆ IfxCif_JpeState

enum IfxCif_JpeState

Enumerator for the codec state.

Enumerator
IfxCif_JpeState_Free | Codec is free (not busy)
IfxCif_JpeState_Busy | JPEG codec in process.

Definition at line 488 of file IfxCif.h.

◆ IfxCif_JpeTableId

enum IfxCif_JpeTableId

Enumerator for the JPE Tables.

Enumerator
IfxCif_JpeTableId_QTable0 | Q-Table 0.
IfxCif_JpeTableId_QTable1 | Q-Table 1.
IfxCif_JpeTableId_QTable2 | Q-Table 2.
IfxCif_JpeTableId_QTable3 | Q-Table 3.
IfxCif_JpeTableId_VlcDcTable0 | VLC DC Table 0.
IfxCif_JpeTableId_VlcAcTable0 | VLC AC Table 0.
IfxCif_JpeTableId_VlcDcTable1 | VLC DC Table 1.
IfxCif_JpeTableId_VlcAcTable1 | VLC AC Table 1.

Definition at line 496 of file IfxCif.h.


iLLD_TC26B: Security Watchdog Functions

Functions
Security Watchdog Functions
iLLD » CIF » Standard Driver
Collaboration diagram for Security Watchdog Functions:

Functions

IFX_INLINE uint16 | IfxCif_getSecurityWatchdogCounterPredivider (void)
Function to query the currently set watchdog predivider. More...
IFX_INLINE IfxCif_State | IfxCif_getSecurityWatchdogEnableState (void)
Function to query the enabled state of the watchdog unit. More...
IFX_INLINE void | IfxCif_setSecurityWatchdogCounterPredivider (uint16 predivider)
Function to set the watchdog predivider counter (A value of 0 means that the Watchdog Counters are increased with every CIF clock cycle. Every other value N leads to an increment at every N+1th cycle) More...
IFX_INLINE void | IfxCif_setSecurityWatchdogEnableState (IfxCif_State enableState)
Function to enable or disable the watchdog unit. More...
IFX_EXTERN void | IfxCif_clearSecurityWatchdogInterrupt (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the masked state of an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawSecurityWatchdogInterruptTriggeredState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the raw state of an interrupt. More...
IFX_EXTERN IfxCif_State | IfxCif_getSecurityWatchdogInterruptEnableState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN uint16 | IfxCif_getSecurityWatchdogTimeout (IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter)
Function to query the current value of a timeout counter of one tier. More...
IFX_EXTERN void | IfxCif_resetSecurityWatchdogCounter (IfxCif_SecurityWatchdogCounters counter)
Function to reset one watchdog counter. More...
IFX_EXTERN void | IfxCif_setSecurityWatchdogInterruptEnableState (IfxCif_SecurityWatchdogInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setSecurityWatchdogInterruptRequestBit (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setSecurityWatchdogTimeout (IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter, uint16 timeout)
Function to set the timeout for a watchdog timeout counter of one tier. A value of 0 disables the timeout. More...

Detailed Description

Function Documentation

◆ IfxCif_clearSecurityWatchdogInterrupt()

IFX_EXTERN void IfxCif_clearSecurityWatchdogInterrupt ( IfxCif_SecurityWatchdogInterruptSources interruptSource )

Function to clear an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
None

Definition at line 267 of file IfxCif.c.

◆ IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState ( IfxCif_SecurityWatchdogInterruptSources interruptSource )

Function to get the masked state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled

Definition at line 1959 of file IfxCif.c.

◆ IfxCif_getRawSecurityWatchdogInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawSecurityWatchdogInterruptTriggeredState ( IfxCif_SecurityWatchdogInterruptSources interruptSource )

Function to get the raw state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set

Definition at line 2454 of file IfxCif.c.

◆ IfxCif_getSecurityWatchdogCounterPredivider()

IFX_INLINE uint16 IfxCif_getSecurityWatchdogCounterPredivider ( void )

Function to query the currently set watchdog predivider.

Returns
Currently set predivider

Definition at line 2713 of file IfxCif.h.

◆ IfxCif_getSecurityWatchdogEnableState()

IFX_INLINE IfxCif_State IfxCif_getSecurityWatchdogEnableState ( void )

Function to query the enabled state of the watchdog unit.

Returns
IfxCif_State_Enabled if the watchdog unit is enabled, IfxCif_State_Disabled if the watchdog unit is disabled

Definition at line 2719 of file IfxCif.h.

◆ IfxCif_getSecurityWatchdogInterruptEnableState()

IFX_EXTERN IfxCif_State IfxCif_getSecurityWatchdogInterruptEnableState ( IfxCif_SecurityWatchdogInterruptSources interruptSource )

Function to query the enabled state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_State_Enabled if the interrupt is enabled, IfxCif_State_Disabled if the interrupt is disabled

Definition at line 2483 of file IfxCif.c.

◆ IfxCif_getSecurityWatchdogTimeout()

IFX_EXTERN uint16 IfxCif_getSecurityWatchdogTimeout | ( | IfxCif_ImageTiers | tier,
 |  | IfxCif_SecurityWatchdogTimeoutCounters | timeoutCounter
 | ) |  |

Function to query the current value of a timeout counter of one tier.

Parameters
tier | Tier for which to query the timeout counter
timeoutCounter | Timeout counter to query
Returns
Current timeout

Definition at line 2512 of file IfxCif.c.

◆ IfxCif_resetSecurityWatchdogCounter()

IFX_EXTERN void IfxCif_resetSecurityWatchdogCounter ( IfxCif_SecurityWatchdogCounters counter )

Function to reset one watchdog counter.

Parameters
counter Counter to reset
Returns
None

Definition at line 2698 of file IfxCif.c.

◆ IfxCif_setSecurityWatchdogCounterPredivider()

IFX_INLINE void IfxCif_setSecurityWatchdogCounterPredivider ( uint16 predivider )

Function to set the watchdog predivider counter (A value of 0 means that the Watchdog Counters are increased with every CIF clock cycle. Every other value N leads to an increment at every N+1th cycle)

Parameters
predivider Predivider to set
Returns
None

Definition at line 3013 of file IfxCif.h.

◆ IfxCif_setSecurityWatchdogEnableState()

IFX_INLINE void IfxCif_setSecurityWatchdogEnableState ( IfxCif_State enableState )

Function to enable or disable the watchdog unit.

Parameters
enableState IfxCif_State_Enabled to enable the watchdog unit, IfxCif_State_Disabled to disable the watchdog unit
Returns
None

Definition at line 3019 of file IfxCif.h.

◆ IfxCif_setSecurityWatchdogInterruptEnableState()

IFX_EXTERN void IfxCif_setSecurityWatchdogInterruptEnableState | ( | IfxCif_SecurityWatchdogInterruptSources | interruptSource,
 |  | IfxCif_State | interruptEnableState
 | ) |  |

Function to enable or disable an interrupt.

Parameters
interruptSource | Source of the interrupt to enable or disable
interruptEnableState | IfxCif_State_Enabled to enable the interrupt, IfxCif_State_Disabled to disable the interrupt
Returns
None

Definition at line 3830 of file IfxCif.c.

◆ IfxCif_setSecurityWatchdogInterruptRequestBit()

IFX_EXTERN void IfxCif_setSecurityWatchdogInterruptRequestBit ( IfxCif_SecurityWatchdogInterruptSources interruptSource )

Function to set an interrupt request bit (does not necessarily trigger an interrupt)

Parameters
interruptSource Source of the interrupt
Returns
None

Definition at line 3855 of file IfxCif.c.

◆ IfxCif_setSecurityWatchdogTimeout()

IFX_EXTERN void IfxCif_setSecurityWatchdogTimeout | ( | IfxCif_ImageTiers | tier,
 |  | IfxCif_SecurityWatchdogTimeoutCounters | timeoutCounter,
 |  | uint16 | timeout
 | ) |  |

Function to set the timeout for a watchdog timeout counter of one tier. A value of 0 disables the timeout.

Parameters
tier | Tier for which to set the timeout
timeoutCounter | Timeout counter for which to set the timeout
timeout | Timeout to set
Returns
None

Definition at line 3880 of file IfxCif.c.


iLLD_TC26B: Security Watchdog Enumerations

Enumerations
Security Watchdog Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for Security Watchdog Enumerations:

Enumerations

enum IfxCif_SecurityWatchdogCounters {
IfxCif_SecurityWatchdogCounters_Predivider = 0,
IfxCif_SecurityWatchdogCounters_Vertical = 1,
IfxCif_SecurityWatchdogCounters_Horizontal = 2
}
Enumerator for watchdog counters. More...
enum IfxCif_SecurityWatchdogInterruptSources {
IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout = 0,
IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout = 1,
IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout = 2,
IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout = 3
}
Enumerator for interrupt sources of the security watchdog submodule. More...
enum IfxCif_SecurityWatchdogTimeoutCounters {
IfxCif_SecurityWatchdogTimeoutCounters_EndStart = 0,
IfxCif_SecurityWatchdogTimeoutCounters_StartEnd = 1
}
Enumerator for watchdog timeout counters. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCif_SecurityWatchdogCounters

enum IfxCif_SecurityWatchdogCounters

Enumerator for watchdog counters.

Enumerator
IfxCif_SecurityWatchdogCounters_Predivider | Predivider counter.
IfxCif_SecurityWatchdogCounters_Vertical | Vertical counter.
IfxCif_SecurityWatchdogCounters_Horizontal | Horizontal counter.

Definition at line 531 of file IfxCif.h.

◆ IfxCif_SecurityWatchdogInterruptSources

enum IfxCif_SecurityWatchdogInterruptSources

Enumerator for interrupt sources of the security watchdog submodule.

Enumerator
IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout | Vertical End Start Interrupt.
IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout | Vertical Start End Interrupt.
IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout | Horizontal End Start Interrupt.
IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout | Horizontal Start End Interrupt.

Definition at line 540 of file IfxCif.h.

◆ IfxCif_SecurityWatchdogTimeoutCounters

enum IfxCif_SecurityWatchdogTimeoutCounters

Enumerator for watchdog timeout counters.

Enumerator
IfxCif_SecurityWatchdogTimeoutCounters_EndStart | Timeout counter for End Start phase.
IfxCif_SecurityWatchdogTimeoutCounters_StartEnd | Timeout counter for Start End phase.

Definition at line 550 of file IfxCif.h.


iLLD_TC26B: ISP Image Stabilization Functions

Functions
ISP Image Stabilization Functions
iLLD » CIF » Standard Driver
Collaboration diagram for ISP Image Stabilization Functions:

Functions

IFX_INLINE IfxCif_State | IfxCif_getIspisEnableState (void)
Function to query the enabled state of image stabilization. More...
IFX_INLINE uint8 | IfxCif_getIspisRecenterValue (void)
Function to query the current image stabilization recenter value. More...
IFX_INLINE void | IfxCif_setIspisEnableState (IfxCif_State enableState)
Function to enable or disable image stabilization. More...
IFX_INLINE void | IfxCif_setIspisOutputWindowOffsets (IfxCif_ImageTiers hOffset, uint16 vOffset)
Function to set the image stabilization offsets of the output window. More...
IFX_INLINE void | IfxCif_setIspisPictureSizes (uint16 hSize, uint16 vSize)
Function to set the picture size. More...
IFX_INLINE void | IfxCif_setIspisRecenterValue (uint8 value)
Function to set the image stabilization recenter value. More...
IFX_EXTERN uint16 | IfxCif_getIspisCameraDisplacement (IfxCif_ImageTiers tier)
Function to query the current camera displacement for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisCurrentPictureOffset (IfxCif_ImageTiers tier)
Function to query the offset of the current picture for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisCurrentPictureSize (IfxCif_ImageTiers tier)
Function to query the picture size of the current picture for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisMaximumDisplacement (IfxCif_ImageTiers tier)
Function to query the current maximum displacement for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisOffsetOutputWindow (IfxCif_ImageTiers tier)
Function to query the current image stabilization offset of the output window of one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisPictureSize (IfxCif_ImageTiers tier)
Function to query the current picture size for one tier. More...
IFX_EXTERN IfxCif_State | IfxCif_getIspisRecenterEnableState (void)
Function to query the enabled state of image stabilization recenter feature. More...
IFX_EXTERN void | IfxCif_setIspisCameraDisplacement (uint16 tier, uint16 displacement)
Function to set the camera displacement for one tier. More...
IFX_EXTERN void | IfxCif_setIspisMaximumDisplacement (IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement for one tier. More...
IFX_EXTERN void | IfxCif_setIspisOutputWindowOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the image stabilization offset of the output window of one tier. More...
IFX_EXTERN void | IfxCif_setIspisPictureSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the picture size for one tier. More...

Detailed Description

Function Documentation

◆ IfxCif_getIspisCameraDisplacement()

IFX_EXTERN uint16 IfxCif_getIspisCameraDisplacement ( IfxCif_ImageTiers tier )

Function to query the current camera displacement for one tier.

Parameters
tier Tier for which to query the camera displacement
Returns
Current camera displacement

Definition at line 1409 of file IfxCif.c.

◆ IfxCif_getIspisCurrentPictureOffset()

IFX_EXTERN uint16 IfxCif_getIspisCurrentPictureOffset ( IfxCif_ImageTiers tier )

Function to query the offset of the current picture for one tier.

Parameters
tier Tier for which to query the offset
Returns
Offset of the current picture

Definition at line 1430 of file IfxCif.c.

◆ IfxCif_getIspisCurrentPictureSize()

IFX_EXTERN uint16 IfxCif_getIspisCurrentPictureSize ( IfxCif_ImageTiers tier )

Function to query the picture size of the current picture for one tier.

Parameters
tier Tier for which to query the picture size
Returns
Picture size of the current picture

Definition at line 1451 of file IfxCif.c.

◆ IfxCif_getIspisEnableState()

IFX_INLINE IfxCif_State IfxCif_getIspisEnableState ( void )

Function to query the enabled state of image stabilization.

Returns
IfxCif_State_Enabled if image stabilization is enabled, IfxCif_State_Disabled if image stabilization is disabled

Definition at line 2566 of file IfxCif.h.

◆ IfxCif_getIspisMaximumDisplacement()

IFX_EXTERN uint16 IfxCif_getIspisMaximumDisplacement ( IfxCif_ImageTiers tier )

Function to query the current maximum displacement for one tier.

Parameters
tier Tier for which to query the maximum displacement
Returns
Current maximum displacement

Definition at line 1472 of file IfxCif.c.

◆ IfxCif_getIspisOffsetOutputWindow()

IFX_EXTERN uint16 IfxCif_getIspisOffsetOutputWindow ( IfxCif_ImageTiers tier )

Function to query the current image stabilization offset of the output window of one tier.

Parameters
tier Tier for which to query the offset
Returns
Current offset

Definition at line 1493 of file IfxCif.c.

◆ IfxCif_getIspisPictureSize()

IFX_EXTERN uint16 IfxCif_getIspisPictureSize ( IfxCif_ImageTiers tier )

Function to query the current picture size for one tier.

Parameters
tier Tier for which to query the picture size
Returns
Current picture size

Definition at line 1514 of file IfxCif.c.

◆ IfxCif_getIspisRecenterEnableState()

IFX_EXTERN IfxCif_State IfxCif_getIspisRecenterEnableState ( void )

Function to query the enabled state of image stabilization recenter feature.

Returns
IfxCif_State_Enabled if the image stabilization recenter feature is enabled, IfxCif_State_Disabled if the image stabilization recenter feature is disabled

Definition at line 1535 of file IfxCif.c.

◆ IfxCif_getIspisRecenterValue()

IFX_INLINE uint8 IfxCif_getIspisRecenterValue ( void )

Function to query the current image stabilization recenter value.

Returns
Current image stabilization recenter value

Definition at line 2572 of file IfxCif.h.

◆ IfxCif_setIspisCameraDisplacement()

IFX_EXTERN void IfxCif_setIspisCameraDisplacement | ( | uint16 | tier,
 |  | uint16 | displacement
 | ) |  |

Function to set the camera displacement for one tier.

Parameters
tier | Tier for which to set the camera displacement
displacement | Camera displacement to set
Returns
None

Definition at line 3369 of file IfxCif.c.

◆ IfxCif_setIspisEnableState()

IFX_INLINE void IfxCif_setIspisEnableState ( IfxCif_State enableState )

Function to enable or disable image stabilization.

Parameters
enableState IfxCif_State_Enabled to enable image stabilization, IfxCif_State_Disabled to disable image stabilization
Returns
None

Definition at line 2881 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspisMaximumDisplacement()

IFX_EXTERN void IfxCif_setIspisMaximumDisplacement | ( | IfxCif_ImageTiers | tier,
 |  | uint16 | displacement
 | ) |  |

Function to set the maximum displacement for one tier.

Parameters
tier | Tier for which to set the maximum displacement
displacement | Displacement to set
Returns
None

Definition at line 3386 of file IfxCif.c.

◆ IfxCif_setIspisOutputWindowOffset()

IFX_EXTERN void IfxCif_setIspisOutputWindowOffset | ( | IfxCif_ImageTiers | tier,
 |  | uint16 | offset
 | ) |  |

Function to set the image stabilization offset of the output window of one tier.

Parameters
tier | Tier for which to set the offset
offset | Offset to set
Returns
None

Definition at line 3403 of file IfxCif.c.

◆ IfxCif_setIspisOutputWindowOffsets()

IFX_INLINE void IfxCif_setIspisOutputWindowOffsets | ( | IfxCif_ImageTiers | hOffset,
 |  | uint16 | vOffset
 | ) |  |

Function to set the image stabilization offsets of the output window.

Parameters
hOffset | Horizontal Offset
vOffset | Vertical Offset
Returns
None

Definition at line 2887 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspisPictureSize()

IFX_EXTERN void IfxCif_setIspisPictureSize | ( | IfxCif_ImageTiers | tier,
 |  | uint16 | size
 | ) |  |

Function to set the picture size for one tier.

Parameters
tier | Tier for which to set the picture size
size | Size to set
Returns
None

Definition at line 3420 of file IfxCif.c.

◆ IfxCif_setIspisPictureSizes()

IFX_INLINE void IfxCif_setIspisPictureSizes | ( | uint16 | hSize,
 |  | uint16 | vSize
 | ) |  |

Function to set the picture size.

Parameters
hSize | Horizontal Picture Size
vSize | Vertical Picture Size
Returns
None

Definition at line 2894 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspisRecenterValue()

IFX_INLINE void IfxCif_setIspisRecenterValue ( uint8 value )

Function to set the image stabilization recenter value.

Parameters
value Recenter value to set (0 to disabled recenter value, for all other values recentering is active (cur_h/v_offs-H/V_OFFS)/2 power(recenter))
Returns
None

Definition at line 2901 of file IfxCif.h.


iLLD_TC26B: ISP Image Stabilization Enumerations

ISP Image Stabilization Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for ISP Image Stabilization Enumerations:


iLLD_TC26B: Extra Path Functions

Functions
Extra Path Functions
iLLD » CIF » Standard Driver
Collaboration diagram for Extra Path Functions:

Functions

IFX_EXTERN void | IfxCif_clearEpError (IfxCif_EpErrorClearSources source)
Function to clear one extra path error. More...
IFX_EXTERN void | IfxCif_clearEpInterrupt (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN void | IfxCif_epForceConfigurationUpdate (IfxCif_ExtraPath z)
Function to trigger an immediate configuration update for one extra path. More...
IFX_EXTERN void | IfxCif_epSkipPicture (IfxCif_ExtraPath z)
Function to skip one picture of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpBaseAddress (IfxCif_ExtraPath z)
Function to query the current base address of the ring buffer of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpBaseInitAddress (IfxCif_ExtraPath z)
Function to query the initial base address of the ring buffer of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingCameraDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping camera displacement of one tier of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingCurrentPictureOffset (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture offset of one tier of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingCurrentPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture size of one tier of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpCroppingEnableState (IfxCif_ExtraPath z)
Function to query the image cropping enabled state of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingMaximumDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the maximum displacement of one tier of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingOffsetOutputWindow (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping offset of the output window of one tier of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping picture size of one tier of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpCroppingRecenterState (IfxCif_ExtraPath z)
Function to query the enabled state of the recenter feature of one extra path. More...
IFX_EXTERN IfxCif_ErrorState | IfxCif_getEpErrorState (IfxCif_EpErrorSources source)
Function to query the state of an extra path error source. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpFeatureEnableState (IfxCif_ExtraPath z, IfxCif_EpFeatures feature)
Function to query the enabled state of one feature of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpInitSize (IfxCif_ExtraPath z)
Function to query the initial size of the ring buffer of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpInitialFillLevelInterruptOffset (IfxCif_ExtraPath z)
Function to query the initial filling level interrupt offset of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpInitialOffsetCounter (IfxCif_ExtraPath z)
Function to query the initial offset counter of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpInputEnableState (IfxCif_ExtraPath z)
Function to query the current input enable state of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpInterruptEnableState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN uint32 | IfxCif_getEpInterruptOffset (IfxCif_ExtraPath z)
Function to query the current interrupt offset of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpOffsetCounter (IfxCif_ExtraPath z)
Function to query the current offset counter of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpOffsetCounterStart (IfxCif_ExtraPath z)
Function to query the initial offset counter start value of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpOutputEnableState (IfxCif_ExtraPath z)
Function to query the current output enable state of one extra path. More...
IFX_EXTERN uint8 | IfxCif_getEpRecenterValue (IfxCif_ExtraPath z)
Function to query the current recenter value of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpSize (IfxCif_ExtraPath z)
Function to query the current ring buffer size of one extra path. More...
IFX_EXTERN IfxCif_EpWriteFormat | IfxCif_getEpWriteFormat (IfxCif_ExtraPath z)
Function to query the write format of one extra path. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedEpInterruptTriggeredState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to get the masked state of an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawEpInterruptTriggeredState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the raw state of an interrupt. More...
IFX_EXTERN void | IfxCif_setEpBaseInitAddress (IfxCif_ExtraPath z, Ifx_AddressValue baseAddress)
Function to set the initial base address of the ring buffer of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingCameraDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the image cropping camera displacement of one tier of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingEnableState (IfxCif_ExtraPath z, uint32 enableState)
Function to enable or disable image cropping of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingMaximumDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement of one tier of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingOffsetOutputWindow (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 offset)
Function to set the image cropping offset of the output window of one tier of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingOffsetsOutputWindow (IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset)
Function to set the image cropping offsets of the output window of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 size)
Function to set the image cropping picture size of one tier of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingPictureSizes (IfxCif_ExtraPath z, uint16 hSize, uint16 vSize)
Function to set the image cropping picture sizes one extra path. More...
IFX_EXTERN void | IfxCif_setEpFeatureEnableState (IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState)
Function to enable or disable one feature of one extra path. More...
IFX_EXTERN void | IfxCif_setEpInitSize (IfxCif_ExtraPath z, uint32 size)
Function to set the initial size of the ring buffer of one extra path. More...
IFX_EXTERN void | IfxCif_setEpInitialFillLevelInterruptOffset (uint32 z, uint32 interruptOffset)
Function to set the initial filling level interrupt offset of one extra path. More...
IFX_EXTERN void | IfxCif_setEpInitialOffsetCounter (IfxCif_ExtraPath z, uint32 offsetCounter)
Function to set the initial offset counter of one extra path. More...
IFX_EXTERN void | IfxCif_setEpInterruptEnableState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setEpInterruptRequestBit (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setEpOffsetCounterStart (uint32 z, uint32 offsetCounter)
Function to set the initial offset counter start value of one extra path. More...
IFX_EXTERN void | IfxCif_setEpRecenterValue (IfxCif_ExtraPath z, uint8 value)
Function to set the recenter value of one extra path (0 to switch the recenter feature off, for all other values recentering is active (cur_h/v_offs-H/V_OFFS)/2power(recenter)) More...
IFX_EXTERN void | IfxCif_setEpWriteFormat (IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat)
Function to set the write format for one extra path. More...

Detailed Description

Function Documentation

◆ IfxCif_clearEpError()

IFX_EXTERN void IfxCif_clearEpError ( IfxCif_EpErrorClearSources source )

Function to clear one extra path error.

Parameters
source Extra path error to clear
Returns
None

Definition at line 52 of file IfxCif.c.

◆ IfxCif_clearEpInterrupt()

IFX_EXTERN void IfxCif_clearEpInterrupt | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpInterrupts | interruptSource
 | ) |  |

Function to clear an interrupt.

Parameters
z | Extra path for which to clear the interrupt
interruptSource | Source of the interrupt
Returns
None

Definition at line 81 of file IfxCif.c.

◆ IfxCif_epForceConfigurationUpdate()

IFX_EXTERN void IfxCif_epForceConfigurationUpdate ( IfxCif_ExtraPath z )

Function to trigger an immediate configuration update for one extra path.

Parameters
z Function to trigger an immediate configuration update for one extra path
Returns
None

Definition at line 317 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifExtraPath().

◆ IfxCif_epSkipPicture()

IFX_EXTERN void IfxCif_epSkipPicture ( IfxCif_ExtraPath z )

Function to skip one picture of one extra path.

Parameters
z Extra path for which to skip one picture
Returns
None

Definition at line 333 of file IfxCif.c.

◆ IfxCif_getEpBaseAddress()

IFX_EXTERN uint32 IfxCif_getEpBaseAddress ( IfxCif_ExtraPath z )

Function to query the current base address of the ring buffer of one extra path.

Parameters
z Extra path for which to query the current base address of the ring buffer
Returns
Current base address of the ring buffer

Definition at line 494 of file IfxCif.c.

◆ IfxCif_getEpBaseInitAddress()

IFX_EXTERN uint32 IfxCif_getEpBaseInitAddress ( IfxCif_ExtraPath z )

Function to query the initial base address of the ring buffer of one extra path.

Parameters
z Extra path for which to query the initial base address
Returns
Initial base address of the ring buffer of the extra path

Definition at line 513 of file IfxCif.c.

◆ IfxCif_getEpCroppingCameraDisplacement()

IFX_EXTERN uint16 IfxCif_getEpCroppingCameraDisplacement | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier
 | ) |  |

Function to query the image cropping camera displacement of one tier of one extra path.

Parameters
z | Extra path for which to query the image cropping camera displacement
tier | Tier for which to query the image cropping camera displacement
Returns
Current image cropping camera displacement

Definition at line 532 of file IfxCif.c.

◆ IfxCif_getEpCroppingCurrentPictureOffset()

IFX_EXTERN uint16 IfxCif_getEpCroppingCurrentPictureOffset | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier
 | ) |  |

Function to query the current image cropping picture offset of one tier of one extra path.

Parameters
z | Extra path for which to query the current image cropping picture offset
tier | Tier for which to query the current image cropping picture offset
Returns
Current image cropping picture offset

Definition at line 560 of file IfxCif.c.

◆ IfxCif_getEpCroppingCurrentPictureSize()

IFX_EXTERN uint16 IfxCif_getEpCroppingCurrentPictureSize | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier
 | ) |  |

Function to query the current image cropping picture size of one tier of one extra path.

Parameters
z | Extra path for which to query the current image cropping picture size
tier | Tier for which to query the current image cropping picture size
Returns
Current image cropping picture size

Definition at line 588 of file IfxCif.c.

◆ IfxCif_getEpCroppingEnableState()

IFX_EXTERN IfxCif_State IfxCif_getEpCroppingEnableState ( IfxCif_ExtraPath z )

Function to query the image cropping enabled state of one extra path.

Parameters
z Extra path for which to query the image cropping enabled state
Returns
IfxCif_State_Enabled if image cropping is enabled, IfxCif_State_Disabled otherwise

Definition at line 616 of file IfxCif.c.

◆ IfxCif_getEpCroppingMaximumDisplacement()

IFX_EXTERN uint16 IfxCif_getEpCroppingMaximumDisplacement | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier
 | ) |  |

Function to query the maximum displacement of one tier of one extra path.

Parameters
z | Extra path for which to query the maximum displacement
tier | Tier for which to query the maximum displacement
Returns
Current maximum displacement

Definition at line 633 of file IfxCif.c.

◆ IfxCif_getEpCroppingOffsetOutputWindow()

IFX_EXTERN uint16 IfxCif_getEpCroppingOffsetOutputWindow | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier
 | ) |  |

Function to query the image cropping offset of the output window of one tier of one extra path.

Parameters
z | Extra path for which to query the image cropping offset of the output window
tier | Tier for which to query the image cropping offset of the output window
Returns
Current image cropping offset of the output window

Definition at line 661 of file IfxCif.c.

◆ IfxCif_getEpCroppingPictureSize()

IFX_EXTERN uint16 IfxCif_getEpCroppingPictureSize | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier
 | ) |  |

Function to query the image cropping picture size of one tier of one extra path.

Parameters
z | Extra path for which to query the image cropping picture size
tier | Tier for which to query the image cropping picture size of one tier of one extra path

Definition at line 689 of file IfxCif.c.

◆ IfxCif_getEpCroppingRecenterState()

IFX_EXTERN IfxCif_State IfxCif_getEpCroppingRecenterState ( IfxCif_ExtraPath z )

Function to query the enabled state of the recenter feature of one extra path.

Parameters
z Extra path for which to query the enabled state of the recenter feature
Returns
IfxCif_State_Enabled if the recenter feature is enabled, IfxCif_State_Disabled otherwise

Definition at line 717 of file IfxCif.c.

◆ IfxCif_getEpErrorState()

IFX_EXTERN IfxCif_ErrorState IfxCif_getEpErrorState ( IfxCif_EpErrorSources source )

Function to query the state of an extra path error source.

Parameters
source Error source for which to query the state
Returns
IfxCif_ErrorState_NoError if the error did not occur, IfxCif_ErrorState_Error if the error occured

Definition at line 737 of file IfxCif.c.

◆ IfxCif_getEpFeatureEnableState()

IFX_EXTERN IfxCif_State IfxCif_getEpFeatureEnableState | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpFeatures | feature
 | ) |  |

Function to query the enabled state of one feature of one extra path.

Parameters
z | Extra path for which to query the enabled state of the feature
feature | Feature which to query
Returns
IfxCif_State_Enabled if the feature of the extra path is enabled, IfxCif_State_Disabled if the feature of the extra path is disabled

Definition at line 790 of file IfxCif.c.

◆ IfxCif_getEpInitialFillLevelInterruptOffset()

IFX_EXTERN uint32 IfxCif_getEpInitialFillLevelInterruptOffset ( IfxCif_ExtraPath z )

Function to query the initial filling level interrupt offset of one extra path.

Parameters
z Extra path for which to query the initial filling level interrupt offset
Returns
Initial filling level interrupt offset of the extra path

Definition at line 846 of file IfxCif.c.

◆ IfxCif_getEpInitialOffsetCounter()

IFX_EXTERN uint32 IfxCif_getEpInitialOffsetCounter ( IfxCif_ExtraPath z )

Function to query the initial offset counter of one extra path.

Parameters
z Extra path for which to query the initial offset counter
Returns
Initial offset counter of the extra path

Definition at line 865 of file IfxCif.c.

◆ IfxCif_getEpInitSize()

IFX_EXTERN uint32 IfxCif_getEpInitSize ( IfxCif_ExtraPath z )

Function to query the initial size of the ring buffer of one extra path.

Parameters
z Extra path for which to query the initial size
Returns
Initial size of the ring buffer of the extra path

Definition at line 827 of file IfxCif.c.

◆ IfxCif_getEpInputEnableState()

IFX_EXTERN IfxCif_State IfxCif_getEpInputEnableState ( IfxCif_ExtraPath z )

Function to query the current input enable state of one extra path.

Parameters
z Extra path for which to query the current input enable state
Returns
IfxCif_State_Enabled if the extra path is used in module MI_IN, IfxCif_State_Disabled if the extra path is not used in module MI_IN

Definition at line 884 of file IfxCif.c.

◆ IfxCif_getEpInterruptEnableState()

IFX_EXTERN IfxCif_State IfxCif_getEpInterruptEnableState | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpInterrupts | interruptSource
 | ) |  |

Function to query the enabled state of an interrupt.

Parameters
z | Extra path for which to query the enabled state of the interrupt
interruptSource | Source of the interrupt
Returns
IfxCif_State_Enabled if the interrupt is enabled, IfxCif_State_Disabled if the interrupt is disabled

Definition at line 901 of file IfxCif.c.

◆ IfxCif_getEpInterruptOffset()

IFX_EXTERN uint32 IfxCif_getEpInterruptOffset ( IfxCif_ExtraPath z )

Function to query the current interrupt offset of one extra path.

Parameters
z Extra path for which to query the current interrupt offset
Returns
Current interrupt offset

Definition at line 923 of file IfxCif.c.

◆ IfxCif_getEpOffsetCounter()

IFX_EXTERN uint32 IfxCif_getEpOffsetCounter ( IfxCif_ExtraPath z )

Function to query the current offset counter of one extra path.

Parameters
z Extra path for which to query the current offset counter
Returns
Current offset counter

Definition at line 942 of file IfxCif.c.

◆ IfxCif_getEpOffsetCounterStart()

IFX_EXTERN uint32 IfxCif_getEpOffsetCounterStart ( IfxCif_ExtraPath z )

Function to query the initial offset counter start value of one extra path.

Parameters
z Extra path for which to query the initial offset counter start value
Returns
Initial offset counter start value of the extra path

Definition at line 961 of file IfxCif.c.

◆ IfxCif_getEpOutputEnableState()

IFX_EXTERN IfxCif_State IfxCif_getEpOutputEnableState ( IfxCif_ExtraPath z )

Function to query the current output enable state of one extra path.

Parameters
z Extra path for which to query the current output enable state
Returns
IfxCif_State_Enabled if the extra path is used in module MI_OUT, IfxCif_State_Disabled if the extra path is not used in module MI_OUT

Definition at line 980 of file IfxCif.c.

◆ IfxCif_getEpRecenterValue()

IFX_EXTERN uint8 IfxCif_getEpRecenterValue ( IfxCif_ExtraPath z )

Function to query the current recenter value of one extra path.

Parameters
z Extra path for which to query the current recenter value
Returns
Current recenter value

Definition at line 997 of file IfxCif.c.

◆ IfxCif_getEpSize()

IFX_EXTERN uint32 IfxCif_getEpSize ( IfxCif_ExtraPath z )

Function to query the current ring buffer size of one extra path.

Parameters
z Extra path for which to query the ring buffer size
Returns
Current ring buffer size

Definition at line 1014 of file IfxCif.c.

◆ IfxCif_getEpWriteFormat()

IFX_EXTERN IfxCif_EpWriteFormat IfxCif_getEpWriteFormat ( IfxCif_ExtraPath z )

Function to query the write format of one extra path.

Parameters
z Extra path for which to query the write format
Returns
Set write format of the extra path (one member of IfxCif_EpWriteFormat)

Definition at line 1033 of file IfxCif.c.

◆ IfxCif_getMaskedEpInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedEpInterruptTriggeredState | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpInterrupts | interruptSource
 | ) |  |

Function to get the masked state of an interrupt.

Parameters
z | Extra path for which to query the interrupt state
interruptSource | Source of the interrupt
Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled

Definition at line 1788 of file IfxCif.c.

◆ IfxCif_getRawEpInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawEpInterruptTriggeredState | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpInterrupts | interruptSource
 | ) |  |

Function to query the raw state of an interrupt.

Parameters
z | Extra path for which to query the interrupt state
interruptSource | Source of the interrupt
Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set

Definition at line 2289 of file IfxCif.c.

◆ IfxCif_setEpBaseInitAddress()

IFX_EXTERN void IfxCif_setEpBaseInitAddress | ( | IfxCif_ExtraPath | z,
 |  | Ifx_AddressValue | baseAddress
 | ) |  |

Function to set the initial base address of the ring buffer of one extra path.

Parameters
z | Extra path for which to set the initial base address
baseAddress | Initial base address of the ring buffer to set
Returns
None

Definition at line 2799 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifExtraPath().

◆ IfxCif_setEpCroppingCameraDisplacement()

IFX_EXTERN void IfxCif_setEpCroppingCameraDisplacement | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier,
 |  | uint16 | displacement
 | ) |  |

Function to set the image cropping camera displacement of one tier of one extra path.

Parameters
z | Extra path for which to set the image cropping camera displacement
tier | Tier for which to set the image cropping camera displacement
displacement | Image cropping camera displacement to set
Returns
None

Definition at line 2814 of file IfxCif.c.

◆ IfxCif_setEpCroppingEnableState()

IFX_EXTERN void IfxCif_setEpCroppingEnableState | ( | IfxCif_ExtraPath | z,
 |  | uint32 | enableState
 | ) |  |

Function to enable or disable image cropping of one extra path.

Parameters
z | Extra path for which to enable or disable image cropping
enableState | IfxCif_State_Enabled to enable image cropping, IfxCif_State_Disabled to disable image cropping
Returns
None

Definition at line 2838 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifExtraPath().

◆ IfxCif_setEpCroppingMaximumDisplacement()

IFX_EXTERN void IfxCif_setEpCroppingMaximumDisplacement | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier,
 |  | uint16 | displacement
 | ) |  |

Function to set the maximum displacement of one tier of one extra path.

Parameters
z | Extra path for which to set the maximum displacement
tier | Tier for which to set the maximum displacement
displacement | Maximum displacement to set
Returns
None

Definition at line 2851 of file IfxCif.c.

◆ IfxCif_setEpCroppingOffsetOutputWindow()

IFX_EXTERN void IfxCif_setEpCroppingOffsetOutputWindow | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier,
 |  | uint16 | offset
 | ) |  |

Function to set the image cropping offset of the output window of one tier of one extra path.

Parameters
z | Extra path for which to set the image cropping offset of the output window
tier | Tier for which to set the image cropping offset of the output window
offset | Offset to set
Returns
None

Definition at line 2875 of file IfxCif.c.

◆ IfxCif_setEpCroppingOffsetsOutputWindow()

IFX_EXTERN void IfxCif_setEpCroppingOffsetsOutputWindow | ( | IfxCif_ExtraPath | z,
 |  | uint16 | hOffset,
 |  | uint16 | vOffset
 | ) |  |

Function to set the image cropping offsets of the output window of one extra path.

Parameters
z | Extra path for which to set the image cropping offset of the output window
hOffset | Offset horizontal to set
vOffset | Offset vertical to set
Returns
None

Definition at line 2899 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifExtraPath().

◆ IfxCif_setEpCroppingPictureSize()

IFX_EXTERN void IfxCif_setEpCroppingPictureSize | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier,
 |  | uint16 | size
 | ) |  |

Function to set the image cropping picture size of one tier of one extra path.

Parameters
z | Extra path for which to set the image cropping picture size
tier | Tier for which to set the image cropping picture size
size | Image cropping picture size to set
Returns
None

Definition at line 2913 of file IfxCif.c.

◆ IfxCif_setEpCroppingPictureSizes()

IFX_EXTERN void IfxCif_setEpCroppingPictureSizes | ( | IfxCif_ExtraPath | z,
 |  | uint16 | hSize,
 |  | uint16 | vSize
 | ) |  |

Function to set the image cropping picture sizes one extra path.

Parameters
z | Extra path for which to set the image cropping picture size
hSize | Image cropping picture horizontal size to set
vSize | Image cropping picture vertical size to set
Returns
None

Definition at line 2937 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifExtraPath().

◆ IfxCif_setEpFeatureEnableState()

IFX_EXTERN void IfxCif_setEpFeatureEnableState | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpFeatures | feature,
 |  | IfxCif_State | enableState
 | ) |  |

Function to enable or disable one feature of one extra path.

Parameters
z | Extra path for which to enable or disable one feature
feature | Feature to enable or disable
enableState | IfxCif_State_Enabled to enable the feature, IfxCif_State_Disabled to disable the feature
Returns
None

Definition at line 2951 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifExtraPath().

◆ IfxCif_setEpInitialFillLevelInterruptOffset()

IFX_EXTERN void IfxCif_setEpInitialFillLevelInterruptOffset | ( | uint32 | z,
 |  | uint32 | interruptOffset
 | ) |  |

Function to set the initial filling level interrupt offset of one extra path.

Parameters
z | Extra path for which to set the initial filling level interrupt offset
interruptOffset | Initial filling level interrupt offset to set
Returns
None

Definition at line 2998 of file IfxCif.c.

◆ IfxCif_setEpInitialOffsetCounter()

IFX_EXTERN void IfxCif_setEpInitialOffsetCounter | ( | IfxCif_ExtraPath | z,
 |  | uint32 | offsetCounter
 | ) |  |

Function to set the initial offset counter of one extra path.

Parameters
z | Extra path for which to set the initial offset counter
offsetCounter | Initial offset counter to set
Returns
None

Definition at line 3013 of file IfxCif.c.

◆ IfxCif_setEpInitSize()

IFX_EXTERN void IfxCif_setEpInitSize | ( | IfxCif_ExtraPath | z,
 |  | uint32 | size
 | ) |  |

Function to set the initial size of the ring buffer of one extra path.

Parameters
z | Extra path for which to set the initial size of the ring buffer
size | Initial size of the ring buffer to se
Returns
None

Definition at line 2983 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifExtraPath().

◆ IfxCif_setEpInterruptEnableState()

IFX_EXTERN void IfxCif_setEpInterruptEnableState | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpInterrupts | interruptSource,
 |  | IfxCif_State | interruptEnableState
 | ) |  |

Function to enable or disable an interrupt.

Parameters
z | Extra path for which to enable or disable the interrupt
interruptSource | Source of the interrupt to enable or disable
interruptEnableState | IfxCif_State_Enabled to enable the interrupt, IfxCif_State_Disabled to disable the interrupt
Returns
None

Definition at line 3028 of file IfxCif.c.

◆ IfxCif_setEpInterruptRequestBit()

IFX_EXTERN void IfxCif_setEpInterruptRequestBit | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpInterrupts | interruptSource
 | ) |  |

Function to set an interrupt request bit (does not necessarily trigger an interrupt)

Parameters
z | Function to set an interrupt request bit (does not necessarily trigger an interrupt)
interruptSource | Extra path for which to set the interrupt request bit
Returns
None

Definition at line 3050 of file IfxCif.c.

◆ IfxCif_setEpOffsetCounterStart()

IFX_EXTERN void IfxCif_setEpOffsetCounterStart | ( | uint32 | z,
 |  | uint32 | offsetCounter
 | ) |  |

Function to set the initial offset counter start value of one extra path.

Parameters
z | Extra path for which to set the initial offset counter start value
offsetCounter | Initial offset counter start value to set
Returns
None

Definition at line 3063 of file IfxCif.c.

◆ IfxCif_setEpRecenterValue()

IFX_EXTERN void IfxCif_setEpRecenterValue | ( | IfxCif_ExtraPath | z,
 |  | uint8 | value
 | ) |  |

Function to set the recenter value of one extra path (0 to switch the recenter feature off, for all other values recentering is active (cur_h/v_offs-H/V_OFFS)/2power(recenter))

Parameters
z | Extra path for which to set the recenter value
value | Recenter value to set
Returns
None

Definition at line 3078 of file IfxCif.c.

◆ IfxCif_setEpWriteFormat()

IFX_EXTERN void IfxCif_setEpWriteFormat | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpWriteFormat | writeFormat
 | ) |  |

Function to set the write format for one extra path.

Parameters
z | Extra path for which to set the write format
writeFormat | Write format to set
Returns
None

Definition at line 3091 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifExtraPath().


iLLD_TC26B: Extra Path Enumerations

Enumerations
Extra Path Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for Extra Path Enumerations:

Enumerations

enum IfxCif_EpErrorClearSources {
IfxCif_EpErrorClearSources_ExtraPath5SizeError = 0,
IfxCif_EpErrorClearSources_ExtraPath4SizeError = 1,
IfxCif_EpErrorClearSources_ExtraPath3SizeError = 2,
IfxCif_EpErrorClearSources_ExtraPath2SizeError = 3,
IfxCif_EpErrorClearSources_ExtraPath1SizeError = 4
}
Enumerator for error sources that can be cleared in the extra paths registers. More...
enum IfxCif_EpErrorSources {
IfxCif_EpErrorSources_ExtraPath5FifoFull = 0,
IfxCif_EpErrorSources_ExtraPath4FifoFull = 1,
IfxCif_EpErrorSources_ExtraPath3FifoFull = 2,
IfxCif_EpErrorSources_ExtraPath2FifoFull = 3,
IfxCif_EpErrorSources_ExtraPath1FifoFull = 4,
IfxCif_EpErrorSources_ExtraPath5SizeError = 5,
IfxCif_EpErrorSources_ExtraPath4SizeError = 6,
IfxCif_EpErrorSources_ExtraPath3SizeError = 7,
IfxCif_EpErrorSources_ExtraPath2SizeError = 8,
IfxCif_EpErrorSources_ExtraPath1SizeError = 9
}
Enumerator for error sources of extra paths. More...
enum IfxCif_EpFeatures {
IfxCif_EpFeatures_InitOffsetCounter = 0,
IfxCif_EpFeatures_InitBaseAddress = 1,
IfxCif_EpFeatures_ByteSwap = 2,
IfxCif_EpFeatures_PictureDataPath = 3
}
Enumerator for extra path features. More...
enum IfxCif_EpInterrupts {
IfxCif_EpInterrupts_FrameEnd = IFX_CIF_MIEP_MIS_FRAME_END_EP_1_OFF,
IfxCif_EpInterrupts_FillLevel = IFX_CIF_MIEP_MIS_FILL_EP_1_OFF,
IfxCif_EpInterrupts_WrapAround = IFX_CIF_MIEP_MIS_WRAP_EP_1_OFF,
IfxCif_EpInterrupts_MacroBlockLine = IFX_CIF_MIEP_MIS_MBLK_LINE_EP_1_OFF,
IfxCif_EpInterrupts_Count = 4
}
Enumerator for interrupt sources of the extra paths module. More...
enum IfxCif_EpWriteFormat {
IfxCif_EpWriteFormat_RawAndData = 0,
IfxCif_EpWriteFormat_Raw8Bit = 1,
IfxCif_EpWriteFormat_RawGreater = 2,
IfxCif_EpWriteFormat_YCbCr = 3
}
Enumerator for write formats of extra paths. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCif_EpErrorClearSources

enum IfxCif_EpErrorClearSources

Enumerator for error sources that can be cleared in the extra paths registers.

Enumerator
IfxCif_EpErrorClearSources_ExtraPath5SizeError | Size error in image cropping unit of extra path 5.
IfxCif_EpErrorClearSources_ExtraPath4SizeError | Size error in image cropping unit of extra path 4.
IfxCif_EpErrorClearSources_ExtraPath3SizeError | Size error in image cropping unit of extra path 3.
IfxCif_EpErrorClearSources_ExtraPath2SizeError | Size error in image cropping unit of extra path 2.
IfxCif_EpErrorClearSources_ExtraPath1SizeError | Size error in image cropping unit of extra path 1.

Definition at line 562 of file IfxCif.h.

◆ IfxCif_EpErrorSources

enum IfxCif_EpErrorSources

Enumerator for error sources of extra paths.

Enumerator
IfxCif_EpErrorSources_ExtraPath5FifoFull | FIFO of extra path 5 is full.
IfxCif_EpErrorSources_ExtraPath4FifoFull | FIFO of extra path 4 is full.
IfxCif_EpErrorSources_ExtraPath3FifoFull | FIFO of extra path 3 is full.
IfxCif_EpErrorSources_ExtraPath2FifoFull | FIFO of extra path 2 is full.
IfxCif_EpErrorSources_ExtraPath1FifoFull | FIFO of extra path 1 is full.
IfxCif_EpErrorSources_ExtraPath5SizeError | Size error in image cropping unit of extra path 5.
IfxCif_EpErrorSources_ExtraPath4SizeError | Size error in image cropping unit of extra path 4.
IfxCif_EpErrorSources_ExtraPath3SizeError | Size error in image cropping unit of extra path 3.
IfxCif_EpErrorSources_ExtraPath2SizeError | Size error in image cropping unit of extra path 2.
IfxCif_EpErrorSources_ExtraPath1SizeError | Size error in image cropping unit of extra path 1.

Definition at line 573 of file IfxCif.h.

◆ IfxCif_EpFeatures

enum IfxCif_EpFeatures

Enumerator for extra path features.

Enumerator
IfxCif_EpFeatures_InitOffsetCounter | Init offest counter.
IfxCif_EpFeatures_InitBaseAddress | Init buffer base address.
IfxCif_EpFeatures_ByteSwap | Byte swap feature.
IfxCif_EpFeatures_PictureDataPath | enables the extra path picture data path

Definition at line 589 of file IfxCif.h.

◆ IfxCif_EpInterrupts

enum IfxCif_EpInterrupts

Enumerator for interrupt sources of the extra paths module.

Enumerator
IfxCif_EpInterrupts_FrameEnd | Picture end of frame interrupt.
IfxCif_EpInterrupts_FillLevel | Fill level interrupt.
IfxCif_EpInterrupts_WrapAround | Address wrap interrupt.
IfxCif_EpInterrupts_MacroBlockLine | Macroblock line interrupt.
IfxCif_EpInterrupts_Count | Total number of interrupt sources for one extra path.

Definition at line 599 of file IfxCif.h.

◆ IfxCif_EpWriteFormat

enum IfxCif_EpWriteFormat

Enumerator for write formats of extra paths.

Enumerator
IfxCif_EpWriteFormat_RawAndData | Raw and data mode (8 bit)
IfxCif_EpWriteFormat_Raw8Bit | Raw 8 bit mode.
IfxCif_EpWriteFormat_RawGreater | RAW & data mode (greater 8 up to 16 bit)
IfxCif_EpWriteFormat_YCbCr | YCbCr 16 bit; YCbCr data is handled interleaved as 16 bit data in extra paths.

Definition at line 610 of file IfxCif.h.


iLLD_TC26B: Debug Path Functions

Functions
Debug Path Functions
iLLD » CIF » Standard Driver
Collaboration diagram for Debug Path Functions:

Functions

IFX_INLINE IfxCif_State | IfxCif_getDpEnableState (void)
Function to query the debug path enabled state. More...
IFX_INLINE IfxCif_DpSourcePath | IfxCif_getDpSourcePath (void)
Function to query the selected debug path source path. More...
IFX_INLINE void | IfxCif_setDpEnableState (IfxCif_State enableState)
Function to enable or disable the debug path. More...
IFX_INLINE void | IfxCif_setDpSourcePath (IfxCif_DpSourcePath sourcePath)
Function to select one debug path source path. More...
IFX_EXTERN void | IfxCif_dpResetCounter (IfxCif_DpCounters counter)
Function to reset one debug path counter. More...
IFX_EXTERN IfxCif_State | IfxCif_getDpControlEnableState (IfxCif_DpControlSources source)
Function to query the transmission enabled state of one debug path control source. More...
IFX_EXTERN uint32 | IfxCif_getDpCounter (IfxCif_DpCounters counter)
Function to query the current counter value of one debug path counter. More...
IFX_EXTERN uint16 | IfxCif_getDpUserDefinedSymbol (uint8 x)
Function to query the value of one user defined debug symbol. More...
IFX_EXTERN void | IfxCif_setDpControlEnableState (IfxCif_DpControlSources source, IfxCif_State enableState)
Function to enable or disable transmission of one debug path control source. More...
IFX_EXTERN void | IfxCif_setDpCounter (IfxCif_DpCounters counter, uint32 counterValue)
Function to set one debug path counter to a counter value. More...
IFX_EXTERN void | IfxCif_setDpUserDefinedSymbol (uint8 x, uint16 value)
Function to set one user defined debug symbol. More...

Detailed Description

Function Documentation

◆ IfxCif_dpResetCounter()

IFX_EXTERN void IfxCif_dpResetCounter ( IfxCif_DpCounters counter )

Function to reset one debug path counter.

Parameters
counter Debug path counter to reset
Returns
None

Definition at line 292 of file IfxCif.c.

◆ IfxCif_getDpControlEnableState()

IFX_EXTERN IfxCif_State IfxCif_getDpControlEnableState ( IfxCif_DpControlSources source )

Function to query the transmission enabled state of one debug path control source.

Parameters
source Source for which to query the transmission enabled state
Returns
IfxCif_State_Enabled if transmission is enabled, IfxCif_State_Disabled if transmission is disabled

Definition at line 391 of file IfxCif.c.

◆ IfxCif_getDpCounter()

IFX_EXTERN uint32 IfxCif_getDpCounter ( IfxCif_DpCounters counter )

Function to query the current counter value of one debug path counter.

Parameters
counter Counter for which to query the value
Returns
Current counter value

Definition at line 448 of file IfxCif.c.

◆ IfxCif_getDpEnableState()

IFX_INLINE IfxCif_State IfxCif_getDpEnableState ( void )

Function to query the debug path enabled state.

Returns
IfxCif_State_Enabled if the debug path is enabled, IfxCif_State_Disabled if the debug path is disabled

Definition at line 2452 of file IfxCif.h.

◆ IfxCif_getDpSourcePath()

IFX_INLINE IfxCif_DpSourcePath IfxCif_getDpSourcePath ( void )

Function to query the selected debug path source path.

Returns
Currently selected debug path source path (one member of IfxCif_DpSourcePath)

Definition at line 2458 of file IfxCif.h.

◆ IfxCif_getDpUserDefinedSymbol()

IFX_EXTERN uint16 IfxCif_getDpUserDefinedSymbol ( uint8 x )

Function to query the value of one user defined debug symbol.

Parameters
x User defined symbol to query
Returns
Value of the user defined debug symbol

Definition at line 477 of file IfxCif.c.

◆ IfxCif_setDpControlEnableState()

IFX_EXTERN void IfxCif_setDpControlEnableState | ( | IfxCif_DpControlSources | source,
 |  | IfxCif_State | enableState
 | ) |  |

Function to enable or disable transmission of one debug path control source.

Parameters
source | Source for which to enable or disable transmission
enableState | IfxCif_State_Enabled to enable transmission, IfxCif_State_Disabled to disable transmission
Returns
None

Definition at line 2719 of file IfxCif.c.

◆ IfxCif_setDpCounter()

IFX_EXTERN void IfxCif_setDpCounter | ( | IfxCif_DpCounters | counter,
 |  | uint32 | counterValue
 | ) |  |

Function to set one debug path counter to a counter value.

Parameters
counter | Counter to set
counterValue | Counter value to set
Returns
None

Definition at line 2772 of file IfxCif.c.

◆ IfxCif_setDpEnableState()

IFX_INLINE void IfxCif_setDpEnableState ( IfxCif_State enableState )

Function to enable or disable the debug path.

Parameters
enableState IfxCif_State_Enabled to enable the debug path, IfxCif_State_Disabled to disable the debug path
Returns
None

Definition at line 2762 of file IfxCif.h.

◆ IfxCif_setDpSourcePath()

IFX_INLINE void IfxCif_setDpSourcePath ( IfxCif_DpSourcePath sourcePath )

Function to select one debug path source path.

Parameters
sourcePath Source path to select
Returns
None

Definition at line 2768 of file IfxCif.h.

◆ IfxCif_setDpUserDefinedSymbol()

IFX_EXTERN void IfxCif_setDpUserDefinedSymbol | ( | uint8 | x,
 |  | uint16 | value
 | ) |  |

Function to set one user defined debug symbol.

Parameters
x | User defined symbol to set
value | Value to set
Returns
None

Definition at line 2786 of file IfxCif.c.


iLLD_TC26B: Debug Path Enumerations

Enumerations
Debug Path Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for Debug Path Enumerations:

Enumerations

enum IfxCif_DpControlSources {
IfxCif_DpControlSources_UserDefinedSymbol8 = 0,
IfxCif_DpControlSources_UserDefinedSymbol7 = 1,
IfxCif_DpControlSources_UserDefinedSymbol6 = 2,
IfxCif_DpControlSources_UserDefinedSymbol5 = 3,
IfxCif_DpControlSources_UserDefinedSymbol4 = 4,
IfxCif_DpControlSources_UserDefinedSymbol3 = 5,
IfxCif_DpControlSources_UserDefinedSymbol2 = 6,
IfxCif_DpControlSources_UserDefinedSymbol1 = 7,
IfxCif_DpControlSources_TimestampCounter = 8,
IfxCif_DpControlSources_LineNumberCounter = 9,
IfxCif_DpControlSources_FrameNumberCounter = 10
}
Enumerator for debug path control sources. More...
enum IfxCif_DpCounters {
IfxCif_DpCounters_PredividerCounter = 0,
IfxCif_DpCounters_TimestampCounter = 1,
IfxCif_DpCounters_LineNumberCounter = 2,
IfxCif_DpCounters_FrameNumberCounter = 3
}
Enumerator for debug path counters. More...
enum IfxCif_DpSourcePath {
IfxCif_DpSourcePath_MainPath = 0,
IfxCif_DpSourcePath_ExtraPath1 = 1,
IfxCif_DpSourcePath_ExtraPath2 = 2,
IfxCif_DpSourcePath_ExtraPath4 = 4,
IfxCif_DpSourcePath_ExtraPath5 = 5
}
Enumerator for debug path source paths. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCif_DpControlSources

enum IfxCif_DpControlSources

Enumerator for debug path control sources.

Enumerator
IfxCif_DpControlSources_UserDefinedSymbol8 | User defined symbol 8.
IfxCif_DpControlSources_UserDefinedSymbol7 | User defined symbol 7.
IfxCif_DpControlSources_UserDefinedSymbol6 | User defined symbol 6.
IfxCif_DpControlSources_UserDefinedSymbol5 | User defined symbol 5.
IfxCif_DpControlSources_UserDefinedSymbol4 | ser defined symbol 4
IfxCif_DpControlSources_UserDefinedSymbol3 | User defined symbol 3.
IfxCif_DpControlSources_UserDefinedSymbol2 | User defined symbol 2.
IfxCif_DpControlSources_UserDefinedSymbol1 | User defined symbol 1.
IfxCif_DpControlSources_TimestampCounter | Timestamp counter.
IfxCif_DpControlSources_LineNumberCounter | Line number counter.
IfxCif_DpControlSources_FrameNumberCounter | Frame number counter.

Definition at line 624 of file IfxCif.h.

◆ IfxCif_DpCounters

enum IfxCif_DpCounters

Enumerator for debug path counters.

Enumerator
IfxCif_DpCounters_PredividerCounter | Predivider counter.
IfxCif_DpCounters_TimestampCounter | Timestamp counter.
IfxCif_DpCounters_LineNumberCounter | Line number counter.
IfxCif_DpCounters_FrameNumberCounter | Frame number counter.

Definition at line 641 of file IfxCif.h.

◆ IfxCif_DpSourcePath

enum IfxCif_DpSourcePath

Enumerator for debug path source paths.

Enumerator
IfxCif_DpSourcePath_MainPath | Main data path.
IfxCif_DpSourcePath_ExtraPath1 | Extra path 1.
IfxCif_DpSourcePath_ExtraPath2 | Extra path 2.
IfxCif_DpSourcePath_ExtraPath4 | Extra path 4.
IfxCif_DpSourcePath_ExtraPath5 | Extra path 5.

Definition at line 651 of file IfxCif.h.


iLLD_TC26B: CIF Pin Mapping

Data Structures | Variables
CIF Pin Mapping
iLLD » CIF
Collaboration diagram for CIF Pin Mapping:

Data Structures

struct | IfxCif_Clk_In
CLK pin mapping structure. More...
struct | IfxCif_D_In
D pin mapping structure. More...
struct | IfxCif_Hsnc_In
HSNC pin mapping structure. More...
struct | IfxCif_Vsnc_In
VSNC pin mapping structure. More...

Variables

IFX_EXTERN IfxCif_Clk_In IfxCif_CLK_P00_7_IN
CIF_CLK: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D0_P02_0_IN
CIF_D0: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D10_P00_1_IN
CIF_D10: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D11_P00_2_IN
CIF_D11: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D12_P00_3_IN
CIF_D12: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D13_P00_4_IN
CIF_D13: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D14_P00_5_IN
CIF_D14: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D15_P00_6_IN
CIF_D15: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D1_P02_1_IN
CIF_D1: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D2_P02_2_IN
CIF_D2: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D3_P02_3_IN
CIF_D3: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D4_P02_4_IN
CIF_D4: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D5_P02_5_IN
CIF_D5: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D6_P02_6_IN
CIF_D6: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D7_P02_7_IN
CIF_D7: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D8_P02_8_IN
CIF_D8: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D9_P00_0_IN
CIF_D9: CIF input. More...
IFX_EXTERN IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN
CIF_HSNC: CIF input. More...
IFX_EXTERN IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN
CIF_VSNC: CIF input. More...

Detailed Description

Data Structure Documentation

◆ IfxCif_Clk_In

struct IfxCif_Clk_In

CLK pin mapping structure.

Definition at line 56 of file IfxCif_PinMap.h.

Collaboration diagram for IfxCif_Clk_In:
[legend]
Data Fields
Ifx_CIF * | module | Base address.
IfxPort_Pin | pin | Port pin.

◆ IfxCif_D_In

struct IfxCif_D_In

D pin mapping structure.

Definition at line 63 of file IfxCif_PinMap.h.

Collaboration diagram for IfxCif_D_In:
[legend]
Data Fields
Ifx_CIF * | module | Base address.
IfxPort_Pin | pin | Port pin.

◆ IfxCif_Hsnc_In

struct IfxCif_Hsnc_In

HSNC pin mapping structure.

Definition at line 70 of file IfxCif_PinMap.h.

Collaboration diagram for IfxCif_Hsnc_In:
[legend]
Data Fields
Ifx_CIF * | module | Base address.
IfxPort_Pin | pin | Port pin.

◆ IfxCif_Vsnc_In

struct IfxCif_Vsnc_In

VSNC pin mapping structure.

Definition at line 77 of file IfxCif_PinMap.h.

Collaboration diagram for IfxCif_Vsnc_In:
[legend]
Data Fields
Ifx_CIF * | module | Base address.
IfxPort_Pin | pin | Port pin.

Variable Documentation

◆ IfxCif_CLK_P00_7_IN

IFX_EXTERN IfxCif_Clk_In IfxCif_CLK_P00_7_IN

CIF_CLK: CIF input.

Definition at line 83 of file IfxCif_PinMap.h.

◆ IfxCif_D0_P02_0_IN

IFX_EXTERN IfxCif_D_In IfxCif_D0_P02_0_IN

CIF_D0: CIF input.

Definition at line 84 of file IfxCif_PinMap.h.

◆ IfxCif_D10_P00_1_IN

IFX_EXTERN IfxCif_D_In IfxCif_D10_P00_1_IN

CIF_D10: CIF input.

Definition at line 85 of file IfxCif_PinMap.h.

◆ IfxCif_D11_P00_2_IN

IFX_EXTERN IfxCif_D_In IfxCif_D11_P00_2_IN

CIF_D11: CIF input.

Definition at line 86 of file IfxCif_PinMap.h.

◆ IfxCif_D12_P00_3_IN

IFX_EXTERN IfxCif_D_In IfxCif_D12_P00_3_IN

CIF_D12: CIF input.

Definition at line 87 of file IfxCif_PinMap.h.

◆ IfxCif_D13_P00_4_IN

IFX_EXTERN IfxCif_D_In IfxCif_D13_P00_4_IN

CIF_D13: CIF input.

Definition at line 88 of file IfxCif_PinMap.h.

◆ IfxCif_D14_P00_5_IN

IFX_EXTERN IfxCif_D_In IfxCif_D14_P00_5_IN

CIF_D14: CIF input.

Definition at line 89 of file IfxCif_PinMap.h.

◆ IfxCif_D15_P00_6_IN

IFX_EXTERN IfxCif_D_In IfxCif_D15_P00_6_IN

CIF_D15: CIF input.

Definition at line 90 of file IfxCif_PinMap.h.

◆ IfxCif_D1_P02_1_IN

IFX_EXTERN IfxCif_D_In IfxCif_D1_P02_1_IN

CIF_D1: CIF input.

Definition at line 91 of file IfxCif_PinMap.h.

◆ IfxCif_D2_P02_2_IN

IFX_EXTERN IfxCif_D_In IfxCif_D2_P02_2_IN

CIF_D2: CIF input.

Definition at line 92 of file IfxCif_PinMap.h.

◆ IfxCif_D3_P02_3_IN

IFX_EXTERN IfxCif_D_In IfxCif_D3_P02_3_IN

CIF_D3: CIF input.

Definition at line 93 of file IfxCif_PinMap.h.

◆ IfxCif_D4_P02_4_IN

IFX_EXTERN IfxCif_D_In IfxCif_D4_P02_4_IN

CIF_D4: CIF input.

Definition at line 94 of file IfxCif_PinMap.h.

◆ IfxCif_D5_P02_5_IN

IFX_EXTERN IfxCif_D_In IfxCif_D5_P02_5_IN

CIF_D5: CIF input.

Definition at line 95 of file IfxCif_PinMap.h.

◆ IfxCif_D6_P02_6_IN

IFX_EXTERN IfxCif_D_In IfxCif_D6_P02_6_IN

CIF_D6: CIF input.

Definition at line 96 of file IfxCif_PinMap.h.

◆ IfxCif_D7_P02_7_IN

IFX_EXTERN IfxCif_D_In IfxCif_D7_P02_7_IN

CIF_D7: CIF input.

Definition at line 97 of file IfxCif_PinMap.h.

◆ IfxCif_D8_P02_8_IN

IFX_EXTERN IfxCif_D_In IfxCif_D8_P02_8_IN

CIF_D8: CIF input.

Definition at line 98 of file IfxCif_PinMap.h.

◆ IfxCif_D9_P00_0_IN

IFX_EXTERN IfxCif_D_In IfxCif_D9_P00_0_IN

CIF_D9: CIF input.

Definition at line 99 of file IfxCif_PinMap.h.

◆ IfxCif_HSNC_P00_9_IN

IFX_EXTERN IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN

CIF_HSNC: CIF input.

Definition at line 100 of file IfxCif_PinMap.h.

◆ IfxCif_VSNC_P00_8_IN

IFX_EXTERN IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN

CIF_VSNC: CIF input.

Definition at line 101 of file IfxCif_PinMap.h.


iLLD_TC26B: CAM

Modules
CAM
iLLD » CIF
Collaboration diagram for CAM:

Modules

Camera Enumerations
Camera Functions
Camera Structures

Detailed Description


iLLD_TC26B: Camera Enumerations

Enumerations | Functions
Camera Enumerations
iLLD » CIF » CAM
Collaboration diagram for Camera Enumerations:

Enumerations

enum IfxCif_Cam_IspMode {
IfxCif_Cam_IspMode_undefined = -1,
IfxCif_Cam_IspMode_raw = 0,
IfxCif_Cam_IspMode_yuvInterleaved = 1,
IfxCif_Cam_IspMode_yuvPlanar = 2
}
CIF ISP mode. More...
enum IfxCif_Cam_State {
IfxCif_Cam_State_stopped = 0,
IfxCif_Cam_State_running = 1
}
Driver acquisition state. More...
enum IfxCif_Cam_Status {
IfxCif_Cam_Status_ok = 0,
IfxCif_Cam_Status_notEnoughMemory = 1,
IfxCif_Cam_Status_cameraCommError = 2,
IfxCif_Cam_Status_notAvailable = 3
}
Driver status. More...

Functions

IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initMemSize (IfxCif_Cam *cam, const IfxCif_Cam_Config *config)

Detailed Description

Enumeration Type Documentation

◆ IfxCif_Cam_IspMode

enum IfxCif_Cam_IspMode

CIF ISP mode.

Enumerator
IfxCif_Cam_IspMode_undefined | undefined
IfxCif_Cam_IspMode_raw | raw
IfxCif_Cam_IspMode_yuvInterleaved | yuv interleaved
IfxCif_Cam_IspMode_yuvPlanar | yuv planar

Definition at line 80 of file IfxCif_Cam.h.

◆ IfxCif_Cam_State

enum IfxCif_Cam_State

Driver acquisition state.

Enumerator
IfxCif_Cam_State_stopped | stopped
IfxCif_Cam_State_running | running

Definition at line 90 of file IfxCif_Cam.h.

◆ IfxCif_Cam_Status

enum IfxCif_Cam_Status

Driver status.

Enumerator
IfxCif_Cam_Status_ok | ok
IfxCif_Cam_Status_notEnoughMemory | not enough Memory
IfxCif_Cam_Status_cameraCommError | camera comm Error
IfxCif_Cam_Status_notAvailable | not available

Definition at line 98 of file IfxCif_Cam.h.

Function Documentation

◆ IfxCif_Cam_initMemSize()

IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initMemSize | ( | IfxCif_Cam * | cam,
 |  | const IfxCif_Cam_Config * | config
 | ) |  |
Parameters
cam cam handle

Definition at line 685 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_init().


iLLD_TC26B: Camera Functions

Functions
Camera Functions
iLLD » CIF » CAM
Collaboration diagram for Camera Functions:

Functions

IFX_INLINE uint32 | IfxCif_Cam_calcMem (uint32 bytes, float32 frames)
IFX_INLINE void | IfxCif_Cam_initPictInfo (IfxCif_Cam_PictureInfo *m, const IfxCif_Cam_MemConfig *mcfg)
IFX_INLINE void | IfxCif_Cam_initPortPins (IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
initializes GPIO Ports for image capturing More...
IFX_INLINE boolean | IfxCif_Cam_isEmulationExtensionAvailable (void)
IFX_INLINE uint32 | IfxCif_Cam_yuvMemSize (const IfxCif_Cam *cam)
IFX_STATIC IfxCif_Cam_Status | IfxCif_Cam_initCamera (const IfxCif_Cam_Config *config)
OVT OV10630 sensor Camera SensorcConfig subroutine , Config file is preloaded to pflash. More...
IFX_STATIC void | IfxCif_Cam_initCif (const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
Initialises the CIF for image capturing. More...
IFX_STATIC void | IfxCif_Cam_initCifDownscaler (const IfxCif_Cam_Downscaling *ds)
IFX_STATIC void | IfxCif_Cam_initCifExtraPath (const IfxCif_Cam *cam, IfxCif_ExtraPath ep, const IfxCif_Cam_Config *config)
IFX_STATIC void | IfxCif_Cam_initCifIspUnit (const IfxCif_Cam_Config *config)
IFX_STATIC void | IfxCif_Cam_initCifJpegEncoder (const IfxCif_Cam_Config *config)
IFX_STATIC void | IfxCif_Cam_initCifMemInterface (const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
IFX_STATIC void | IfxCif_Cam_initEmem (void)
Enables CIF and EMEM and initialises all memory to 0. More...
IFX_INLINE void | IfxCif_Cam_clearFrameReceptionFlag (const IfxCif_Cam *cam)
Clear the frame reception flag. More...
IFX_INLINE void | IfxCif_Cam_clearJpegEncodingCompleteFlag (const IfxCif_Cam *cam)
Clear the JPEG encoder completed flag. More...
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getBbbAddress (const IfxCif_Cam *cam, Ifx_AddressValue cpuAddress)
Convert the CPU address into BBB address. More...
IFX_INLINE uint32 | IfxCif_Cam_getExtraFrameSize (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns the size (in bytes) of one last acquired extra-path image data. More...
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * | IfxCif_Cam_getExtraPathMemInfo (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
IFX_INLINE uint32 | IfxCif_Cam_getFrameSize (const IfxCif_Cam *cam)
Returns the size (in bytes) of last acquired main-path image data. More...
IFX_INLINE uint32 | IfxCif_Cam_getJpegEncodedSize (const IfxCif_Cam *cam)
Returns the size (in bytes) of last encoded main-path image data. More...
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getLastExtraAddress (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns the address location of last acquired extra-path image frame data. More...
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * | IfxCif_Cam_getLastExtraCaptureInfo (const IfxCif_Cam *cam, IfxCif_ExtraPath z, Ifx_AddressValue *address, uint32 *size)
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getLastFrameAddress (const IfxCif_Cam *cam)
Returns the address location of last acquired main-path image frame data. More...
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * | IfxCif_Cam_getLastFrameCaptureInfo (const IfxCif_Cam *cam, Ifx_AddressValue *address, uint32 *size)
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getNextFrameAddress (const IfxCif_Cam *cam)
Returns the address location of next acquired main-path image frame data. More...
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getNextJpegFrameAddress (IfxCif_Cam *cam)
Returns the address location of next acquired JPEG image frame data. More...
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_incrementAddress (const IfxCif_Cam *cam, Ifx_AddressValue address)
Increment the address related to memory interface of for main-path. The address is wrapped around at the boundary of the allocated RAM size. More...
IFX_INLINE boolean | IfxCif_Cam_isFrameReceptionComplete (const IfxCif_Cam *cam)
Returns TRUE if JPEG encoding is completed. More...
IFX_INLINE boolean | IfxCif_Cam_isJpegEncodingComplete (const IfxCif_Cam *cam)
IFX_INLINE void | IfxCif_Cam_skipPicture (const IfxCif_Cam *cam)
IFX_EXTERN void | IfxCif_Cam_clearAllFlags (const IfxCif_Cam *cam)
Clear all CIF module notification flags. More...
IFX_EXTERN void | IfxCif_Cam_disableJpegEncoder (const IfxCif_Cam *cam)
Disable the JPEG encoder and route the acquisition path accordingly to the 'original' configuration, i.e. RAW or main path. More...
IFX_EXTERN void | IfxCif_Cam_enableJpegEncoder (const IfxCif_Cam *cam)
Enable the JPEG encoder and route the acquisition path accordingly. More...
IFX_EXTERN IFX_CONST IfxCif_Cam_PictureInfo * | IfxCif_Cam_getExtraPathPictureInfo (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns pointer to the variable storing picture info of an extra-path. More...
IFX_EXTERN boolean | IfxCif_Cam_getLastJpegEncodingInfo (IfxCif_Cam *cam, Ifx_AddressValue *address, sint32 *size)
Returns pointer to the memory structure storing last JPEG encoding process. More...
IFX_EXTERN IfxCif_Cam_Status | IfxCif_Cam_init (IfxCif_Cam *cam, const IfxCif_Cam_Config *config, boolean initCam)
Initialise the CIF, EMEM, PORT, I2C and the camera itself. More...
IFX_EXTERN void | IfxCif_Cam_restartCapture (const IfxCif_Cam *cam, uint8 frames)
Restart capture by enabling the ISP output. More...
IFX_EXTERN void | IfxCif_Cam_startCapture (const IfxCif_Cam *cam, uint8 frames)
Start capture by enabling the ISP output and initialising the MI counter. More...
IFX_EXTERN void | IfxCif_Cam_stopCapture (const IfxCif_Cam *cam)
Stop capture by disabling the ISP output. More...

Detailed Description

Function Documentation

◆ IfxCif_Cam_calcMem()

IFX_INLINE uint32 IfxCif_Cam_calcMem | ( | uint32 | bytes,
 |  | float32 | frames
 | ) |  |

Definition at line 152 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initMemSize().

◆ IfxCif_Cam_clearAllFlags()

IFX_EXTERN void IfxCif_Cam_clearAllFlags ( const IfxCif_Cam * cam )

Clear all CIF module notification flags.

Parameters
cam cam handle
Returns
None

Definition at line 205 of file IfxCif_Cam.c.

◆ IfxCif_Cam_clearFrameReceptionFlag()

IFX_INLINE void IfxCif_Cam_clearFrameReceptionFlag ( const IfxCif_Cam * cam )

Clear the frame reception flag.

Parameters
cam cam handle
Returns
None

Definition at line 454 of file IfxCif_Cam.h.

◆ IfxCif_Cam_clearJpegEncodingCompleteFlag()

IFX_INLINE void IfxCif_Cam_clearJpegEncodingCompleteFlag ( const IfxCif_Cam * cam )

Clear the JPEG encoder completed flag.

Parameters
cam cam handle
Returns
None

Definition at line 461 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getLastJpegEncodingInfo().

◆ IfxCif_Cam_disableJpegEncoder()

IFX_EXTERN void IfxCif_Cam_disableJpegEncoder ( const IfxCif_Cam * cam )

Disable the JPEG encoder and route the acquisition path accordingly to the 'original' configuration, i.e. RAW or main path.

Parameters
cam cam handle
Returns
None

Definition at line 214 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_Cam_enableJpegEncoder()

IFX_EXTERN void IfxCif_Cam_enableJpegEncoder ( const IfxCif_Cam * cam )

Enable the JPEG encoder and route the acquisition path accordingly.

Parameters
cam cam handle
Returns
None

Definition at line 230 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_Cam_getBbbAddress()

IFX_INLINE Ifx_AddressValue IfxCif_Cam_getBbbAddress | ( | const IfxCif_Cam * | cam,
 |  | Ifx_AddressValue | cpuAddress
 | ) |  |

Convert the CPU address into BBB address.

Parameters
cam | cam handle
cpuAddress | Address value

Definition at line 468 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_initCifExtraPath(), and IfxCif_Cam_initCifMemInterface().

◆ IfxCif_Cam_getExtraFrameSize()

IFX_INLINE uint32 IfxCif_Cam_getExtraFrameSize | ( | const IfxCif_Cam * | cam,
 |  | IfxCif_ExtraPath | z
 | ) |  |

Returns the size (in bytes) of one last acquired extra-path image data.

Parameters
cam | cam handle
z | Extra path

Definition at line 476 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getLastExtraCaptureInfo().

◆ IfxCif_Cam_getExtraPathMemInfo()

IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * IfxCif_Cam_getExtraPathMemInfo | ( | const IfxCif_Cam * | cam,
 |  | IfxCif_ExtraPath | z
 | ) |  |
Parameters
cam | cam handle
z | Extra path

Definition at line 498 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getLastExtraCaptureInfo().

◆ IfxCif_Cam_getExtraPathPictureInfo()

IFX_EXTERN IFX_CONST IfxCif_Cam_PictureInfo* IfxCif_Cam_getExtraPathPictureInfo | ( | const IfxCif_Cam * | cam,
 |  | IfxCif_ExtraPath | z
 | ) |  |

Returns pointer to the variable storing picture info of an extra-path.

Parameters
cam | cam handle
z | Extra Path
Returns
pointer to the variable storing picture info of an extra-path

Definition at line 240 of file IfxCif_Cam.c.

◆ IfxCif_Cam_getFrameSize()

IFX_INLINE uint32 IfxCif_Cam_getFrameSize ( const IfxCif_Cam * cam )

Returns the size (in bytes) of last acquired main-path image data.

Parameters
cam cam handle

Definition at line 504 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getJpegEncodedSize(), and IfxCif_Cam_getLastFrameCaptureInfo().

◆ IfxCif_Cam_getJpegEncodedSize()

IFX_INLINE uint32 IfxCif_Cam_getJpegEncodedSize ( const IfxCif_Cam * cam )

Returns the size (in bytes) of last encoded main-path image data.

Parameters
cam cam handle

Definition at line 518 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getLastJpegEncodingInfo().

◆ IfxCif_Cam_getLastExtraAddress()

IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastExtraAddress | ( | const IfxCif_Cam * | cam,
 |  | IfxCif_ExtraPath | z
 | ) |  |

Returns the address location of last acquired extra-path image frame data.

Parameters
cam | cam handle
z | Extra path

Definition at line 527 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getLastExtraCaptureInfo().

◆ IfxCif_Cam_getLastExtraCaptureInfo()

IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * IfxCif_Cam_getLastExtraCaptureInfo | ( | const IfxCif_Cam * | cam,
 |  | IfxCif_ExtraPath | z,
 |  | Ifx_AddressValue * | address,
 |  | uint32 * | size
 | ) |  |
Parameters
cam | cam handle
z | Extra path
address | Address Value
size | const IfxCif_Cam_MemInfo *m; *size = IfxCif_Cam_getExtraFrameSize(cam, z); *address = IfxCif_Cam_getLastExtraAddress(cam, z); m = IfxCif_Cam_getExtraPathMemInfo(cam, z); return m;

Definition at line 540 of file IfxCif_Cam.h.

◆ IfxCif_Cam_getLastFrameAddress()

IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastFrameAddress ( const IfxCif_Cam * cam )

Returns the address location of last acquired main-path image frame data.

Parameters
cam cam handle
Returns
address location of last acquired main-path image frame data

Definition at line 550 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getLastFrameCaptureInfo(), and IfxCif_Cam_getLastJpegEncodingInfo().

◆ IfxCif_Cam_getLastFrameCaptureInfo()

IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * IfxCif_Cam_getLastFrameCaptureInfo | ( | const IfxCif_Cam * | cam,
 |  | Ifx_AddressValue * | address,
 |  | uint32 * | size
 | ) |  |
Parameters
cam | cam handle
address | Address value
size | Size

Definition at line 558 of file IfxCif_Cam.h.

◆ IfxCif_Cam_getLastJpegEncodingInfo()

IFX_EXTERN boolean IfxCif_Cam_getLastJpegEncodingInfo | ( | IfxCif_Cam * | cam,
 |  | Ifx_AddressValue * | address,
 |  | sint32 * | size
 | ) |  |

Returns pointer to the memory structure storing last JPEG encoding process.

Parameters
cam | cam handle
address | EMEM address which stores the JPEG frame
size | size of JPEG frame
Returns
TRUE if there was new frame encoded, else FALSE

Definition at line 253 of file IfxCif_Cam.c.

◆ IfxCif_Cam_getNextFrameAddress()

IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextFrameAddress ( const IfxCif_Cam * cam )

Returns the address location of next acquired main-path image frame data.

Parameters
cam cam handle

Definition at line 568 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getNextJpegFrameAddress().

◆ IfxCif_Cam_getNextJpegFrameAddress()

IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextJpegFrameAddress ( IfxCif_Cam * cam )

Returns the address location of next acquired JPEG image frame data.

Parameters
cam cam handle

Definition at line 576 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getLastJpegEncodingInfo().

◆ IfxCif_Cam_incrementAddress()

IFX_INLINE Ifx_AddressValue IfxCif_Cam_incrementAddress | ( | const IfxCif_Cam * | cam,
 |  | Ifx_AddressValue | address
 | ) |  |

Increment the address related to memory interface of for main-path. The address is wrapped around at the boundary of the allocated RAM size.

Parameters
cam | cam handle
address | Address value

Definition at line 584 of file IfxCif_Cam.h.

◆ IfxCif_Cam_init()

IFX_EXTERN IfxCif_Cam_Status IfxCif_Cam_init | ( | IfxCif_Cam * | cam,
 |  | const IfxCif_Cam_Config * | config,
 |  | boolean | initCam
 | ) |  |

Initialise the CIF, EMEM, PORT, I2C and the camera itself.

Parameters
cam | cam handel
config | configurations structure
initCam | if TRUE camera will be reconfigured, else camera will not be reconfigured.

Definition at line 278 of file IfxCif_Cam.c.

◆ IfxCif_Cam_initCamera()

IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initCamera ( const IfxCif_Cam_Config * config )

OVT OV10630 sensor Camera SensorcConfig subroutine , Config file is preloaded to pflash.

Definition at line 317 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_init().

◆ IfxCif_Cam_initCif()

IFX_STATIC void IfxCif_Cam_initCif | ( | const IfxCif_Cam * | cam,
 |  | const IfxCif_Cam_Config * | config
 | ) |  |

Initialises the CIF for image capturing.

Parameters
cam cam handel
Returns
None

Definition at line 370 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_init().

◆ IfxCif_Cam_initCifDownscaler()

IFX_STATIC void IfxCif_Cam_initCifDownscaler ( const IfxCif_Cam_Downscaling * ds )
Returns
None

Definition at line 406 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_Cam_initCifExtraPath()

IFX_STATIC void IfxCif_Cam_initCifExtraPath | ( | const IfxCif_Cam * | cam,
 |  | IfxCif_ExtraPath | ep,
 |  | const IfxCif_Cam_Config * | config
 | ) |  |
Parameters
cam cam handle
Returns
None

Definition at line 418 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_Cam_initCifIspUnit()

IFX_STATIC void IfxCif_Cam_initCifIspUnit ( const IfxCif_Cam_Config * config )
Returns
None

Definition at line 464 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_Cam_initCifJpegEncoder()

IFX_STATIC void IfxCif_Cam_initCifJpegEncoder ( const IfxCif_Cam_Config * config )
Returns
None

Definition at line 557 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_Cam_initCifMemInterface()

IFX_STATIC void IfxCif_Cam_initCifMemInterface | ( | const IfxCif_Cam * | cam,
 |  | const IfxCif_Cam_Config * | config
 | ) |  |
Parameters
cam cam handle
Returns
None

Definition at line 612 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_Cam_initEmem()

IFX_STATIC void IfxCif_Cam_initEmem ( void )

Enables CIF and EMEM and initialises all memory to 0.

Returns
None

Definition at line 651 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_init().

◆ IfxCif_Cam_initPictInfo()

IFX_INLINE void IfxCif_Cam_initPictInfo | ( | IfxCif_Cam_PictureInfo * | m,
 |  | const IfxCif_Cam_MemConfig * | mcfg
 | ) |  |
Returns
None

Definition at line 161 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initMemSize().

◆ IfxCif_Cam_initPortPins()

IFX_INLINE void IfxCif_Cam_initPortPins | ( | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

initializes GPIO Ports for image capturing

Returns
None

Definition at line 170 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_init().

◆ IfxCif_Cam_isEmulationExtensionAvailable()

IFX_INLINE boolean IfxCif_Cam_isEmulationExtensionAvailable ( void )

Definition at line 189 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_init().

◆ IfxCif_Cam_isFrameReceptionComplete()

IFX_INLINE boolean IfxCif_Cam_isFrameReceptionComplete ( const IfxCif_Cam * cam )

Returns TRUE if JPEG encoding is completed.

Parameters
cam cam handle
Returns
TRUE if one frame reception is completed

Definition at line 597 of file IfxCif_Cam.h.

◆ IfxCif_Cam_isJpegEncodingComplete()

IFX_INLINE boolean IfxCif_Cam_isJpegEncodingComplete ( const IfxCif_Cam * cam )
Parameters
cam cam handle
Returns
TRUE if JPEG encoding is completed

Definition at line 605 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getLastJpegEncodingInfo().

◆ IfxCif_Cam_restartCapture()

IFX_EXTERN void IfxCif_Cam_restartCapture | ( | const IfxCif_Cam * | cam,
 |  | uint8 | frames
 | ) |  |

Restart capture by enabling the ISP output.

Parameters
cam | cam handle
frames | Number of acquisitions. Set to zero for continuous acquisition
Returns
None

Definition at line 819 of file IfxCif_Cam.c.

◆ IfxCif_Cam_skipPicture()

IFX_INLINE void IfxCif_Cam_skipPicture ( const IfxCif_Cam * cam )
Parameters
cam cam handle
Returns
None

Definition at line 613 of file IfxCif_Cam.h.

◆ IfxCif_Cam_startCapture()

IFX_EXTERN void IfxCif_Cam_startCapture | ( | const IfxCif_Cam * | cam,
 |  | uint8 | frames
 | ) |  |

Start capture by enabling the ISP output and initialising the MI counter.

Parameters
cam | cam handle
frames | Number of acquisitions. Set to zero for continuous acquisition
Returns
None

Definition at line 828 of file IfxCif_Cam.c.

◆ IfxCif_Cam_stopCapture()

IFX_EXTERN void IfxCif_Cam_stopCapture ( const IfxCif_Cam * cam )

Stop capture by disabling the ISP output.

Parameters
cam cam handle
Returns
None

Definition at line 840 of file IfxCif_Cam.c.

◆ IfxCif_Cam_yuvMemSize()

IFX_INLINE uint32 IfxCif_Cam_yuvMemSize ( const IfxCif_Cam * cam )
Parameters
cam cam handle

Definition at line 195 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initMemSize().


iLLD_TC26B: Camera Structures

Data Structures
Camera Structures
iLLD » CIF » CAM
Collaboration diagram for Camera Structures:

Data Structures

struct | IfxCif_Cam_TableInfo
struct | IfxCif_Cam_JpegTable
Single component JPEG tables. More...
struct | IfxCif_Cam_PictureInfo
Picture info. More...
struct | IfxCif_Cam_JpegTables
JPEG tables for all components. More...
struct | IfxCif_Cam_MemConfig
Single path memory interface configuration (used in initialisation/configuration) More...
struct | IfxCif_Cam_MemInfo
Single path memory interface information (used in Runtime) More...
struct | IfxCif_Cam_Common
Common configuration. More...
struct | IfxCif_Cam_Downscaling
Downscaler configuration. More...
struct | IfxCif_Cam_JfifHeader
JPEG JFIF header structure. More...
struct | IfxCif_Cam_MemAreas
All paths memory partitioning. More...
struct | IfxCif_Cam
Structure which is used as handle for the CIF-CAM functions. This stores cached variables useful for run-time operations. More...
struct | IfxCif_Cam_Config
Camera specific configuration. More...

Detailed Description

Data Structure Documentation

◆ IfxCif_Cam_TableInfo

struct IfxCif_Cam_TableInfo

Definition at line 114 of file IfxCif_Cam.h.

Data Fields
IFX_CONST uint8 * | entry | entry
uint8 | length | length

◆ IfxCif_Cam_JpegTable

struct IfxCif_Cam_JpegTable

Single component JPEG tables.

Definition at line 126 of file IfxCif_Cam.h.

Collaboration diagram for IfxCif_Cam_JpegTable:
[legend]
Data Fields
IfxCif_Cam_TableInfo | ac | ac
IfxCif_Cam_TableInfo | dc | dc
IfxCif_Cam_TableInfo | q | q

◆ IfxCif_Cam_PictureInfo

struct IfxCif_Cam_PictureInfo

Picture info.

Definition at line 135 of file IfxCif_Cam.h.

Data Fields
uint16 | hOffset | horizontal offset
uint16 | hSize | horizontal (number of pixel)
uint16 | vOffset | vertical offset
uint16 | vSize | vertical (number of lines)

◆ IfxCif_Cam_JpegTables

struct IfxCif_Cam_JpegTables

JPEG tables for all components.

Definition at line 149 of file IfxCif_Cam.h.

Collaboration diagram for IfxCif_Cam_JpegTables:
[legend]
Data Fields
IfxCif_Cam_JpegTable | uv | uv
IfxCif_Cam_JpegTable | y | y

◆ IfxCif_Cam_MemConfig

struct IfxCif_Cam_MemConfig

Single path memory interface configuration (used in initialisation/configuration)

Definition at line 157 of file IfxCif_Cam.h.

Data Fields
boolean | byteSwap | byte swapping
uint16 | hOffset | horizontal offset
uint16 | hSize | horizontal (number of pixel)
float32 | memFactor | multiples of frame count for memory allocation
uint16 | vOffset | vertical offset
uint16 | vSize | vertical (number of lines)

◆ IfxCif_Cam_MemInfo

struct IfxCif_Cam_MemInfo

Single path memory interface information (used in Runtime)

Definition at line 169 of file IfxCif_Cam.h.

Collaboration diagram for IfxCif_Cam_MemInfo:
[legend]
Data Fields
IfxCif_Cam_PictureInfo | image | image
uint32 | size | size in bytes
Ifx_AddressValue | start | start address

◆ IfxCif_Cam_Common

struct IfxCif_Cam_Common

Common configuration.

Definition at line 182 of file IfxCif_Cam.h.

Collaboration diagram for IfxCif_Cam_Common:
[legend]
Data Fields
boolean | debugPathEnabled | debug path enabled
IfxCif_Cam_MemConfig | extraPaths[IFXCIF_EXTRA_PATHS] | extra paths
IfxCif_InputInterface | inputInterface | input interface
IfxCif_Cam_PictureInfo | ispIn | ispIn
Ifx_IsrSetting | ispInterrupt | isp interrupt
boolean | jpegEnabled | jpeg enabled
IFX_CONST IfxCif_Cam_JpegTables * | jpegTables | jpeg tables
IfxCif_Cam_MemConfig | mainPath | main path
boolean | watchdogEnabled | watchdog enabled

◆ IfxCif_Cam_Downscaling

struct IfxCif_Cam_Downscaling

Downscaler configuration.

Definition at line 197 of file IfxCif_Cam.h.

Data Fields
boolean | enabled | enable
uint8 | hFactor | horizontal factor to program into IfxCif_setLinearDownscalerScalingFactors()
IfxCif_LinearDownscalerScalingMode | hMode | hMode
uint8 | sizeFactor | memory size factor, e.g. half in both H and V usually gives factor of 4
uint8 | vFactor | vertical factor to program into IfxCif_setLinearDownscalerScalingFactors()
IfxCif_LinearDownscalerScalingMode | vMode | vMode

◆ IfxCif_Cam_JfifHeader

struct IfxCif_Cam_JfifHeader

JPEG JFIF header structure.

Definition at line 209 of file IfxCif_Cam.h.

Data Fields
uint16 | app0 | app0
uint8 | density | density
uint16 | densityX | densityX
uint16 | densityY | densityY
uint8 | ident[5] | ident
uint16 | length | length
uint8 | thumbData[20] | thumbData
uint8 | thumbX | thumbX
uint8 | thumbY | thumbY
uint16 | unknown | unknown
uint16 | version | version

◆ IfxCif_Cam_MemAreas

struct IfxCif_Cam_MemAreas

All paths memory partitioning.

Definition at line 226 of file IfxCif_Cam.h.

Collaboration diagram for IfxCif_Cam_MemAreas:
[legend]
Data Fields
IfxCif_Cam_MemInfo | cb | cb
IfxCif_Cam_MemInfo | cr | cr
IfxCif_Cam_MemInfo | ep[IFXCIF_EXTRA_PATHS] | ep
IfxCif_Cam_MemInfo | y | y

◆ IfxCif_Cam

struct IfxCif_Cam

Structure which is used as handle for the CIF-CAM functions. This stores cached variables useful for run-time operations.

Definition at line 241 of file IfxCif_Cam.h.

Collaboration diagram for IfxCif_Cam:
[legend]
Data Fields
uint32 | availMemSize | total available RAM space left (in bytes)
Ifx_CIF * | cif | pointer to base address of CIF module SFRs
IfxCif_Cam_Status | configResult | status of last configuration (or initialisation)
Ifx_EMEM * | emem | pointer to base address of EMEM module SFRs
boolean | ispBpp | byte per pixel
IfxCif_Cam_IspMode | ispMode | actual ISP mode
IfxCif_Cam_JfifHeader * | jfif | pointer to the last acquired JPEG header
IfxCif_Cam_MemAreas | memAreas | memory area definition
Ifx_AddressValue | nextFreeAddress | next free storage address
uint32 | totalMemSize | total occupied memory area (in bytes)

◆ IfxCif_Cam_Config

struct IfxCif_Cam_Config

Camera specific configuration.

Definition at line 257 of file IfxCif_Cam.h.

Collaboration diagram for IfxCif_Cam_Config:
[legend]
Data Fields
IFX_CONST IfxCif_Cam_Common * | common | pointer to common configuration
IFX_CONST IfxCif_Cam_Downscaling * | downscaling | downscaling settings for ExtraPath 1
IfxCif_IspSyncPolarity | hSyncPolarity | polarity of HSYNC signal
IfxCif_Cam_IspMode | ispMode | ISP mode.
uint16 | ispRawBpp | bytes per pixel of the input stream
IfxCif_IspSamplingEdge | samplingEdge | sampling edge
uint16 | setupDataCount | number of camera-specific configuration data (in DWORDS)
IFX_CONST uint32 * | setupDataTable | pointer to the first entry of camera-specific configuration data
IfxCif_IspSyncPolarity | vSyncPolarity | polarity of VSYNC signal


iLLD_TC26B: IfxCif_cfg.h File Reference

  • _Impl
Macros
IfxCif_cfg.h File Reference
iLLD » CIF

CIF on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for IfxCif_cfg.h:

Go to the source code of this file.

Macros

#define | IFXCIF_DEBUG __debug()
#define | IFXCIF_EXTRA_PATHS (5)
Number of extra phats. More...
#define | IFXCIF_MAX_I2CNAK (16)
#define | IFXCIF_NUM_MODULES (1)

Detailed Description

CIF on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCif_cfg.h.

Macro Definition Documentation

◆ IFXCIF_DEBUG

#define IFXCIF_DEBUG __debug()

Definition at line 63 of file IfxCif_cfg.h.

Referenced by IfxCif_Cam_getExtraFrameSize(), IfxCif_Cam_initCifExtraPath(), IfxCif_Cam_initCifIspUnit(), IfxCif_Cam_initCifJpegEncoder(), IfxCif_Cam_initCifMemInterface(), IfxCif_Cam_initMemSize(), IfxCif_clearEpError(), IfxCif_clearEpInterrupt(), IfxCif_clearIspError(), IfxCif_clearJpeInterrupt(), IfxCif_clearMiInterrupt(), IfxCif_clearMiStatus(), IfxCif_clearSecurityWatchdogInterrupt(), IfxCif_dpResetCounter(), IfxCif_epForceConfigurationUpdate(), IfxCif_epSkipPicture(), IfxCif_getCurrentIspPictureOffset(), IfxCif_getCurrentIspPictureSize(), IfxCif_getDpControlEnableState(), IfxCif_getDpCounter(), IfxCif_getDpUserDefinedSymbol(), IfxCif_getEpBaseAddress(), IfxCif_getEpBaseInitAddress(), IfxCif_getEpCroppingCameraDisplacement(), IfxCif_getEpCroppingCurrentPictureOffset(), IfxCif_getEpCroppingCurrentPictureSize(), IfxCif_getEpCroppingEnableState(), IfxCif_getEpCroppingMaximumDisplacement(), IfxCif_getEpCroppingOffsetOutputWindow(), IfxCif_getEpCroppingPictureSize(), IfxCif_getEpCroppingRecenterState(), IfxCif_getEpErrorState(), IfxCif_getEpFeatureEnableState(), IfxCif_getEpInitialFillLevelInterruptOffset(), IfxCif_getEpInitialOffsetCounter(), IfxCif_getEpInitSize(), IfxCif_getEpInputEnableState(), IfxCif_getEpInterruptEnableState(), IfxCif_getEpInterruptOffset(), IfxCif_getEpOffsetCounter(), IfxCif_getEpOffsetCounterStart(), IfxCif_getEpOutputEnableState(), IfxCif_getEpRecenterValue(), IfxCif_getEpSize(), IfxCif_getEpWriteFormat(), IfxCif_getHuffmanAcTableLength(), IfxCif_getHuffmanAcTableSelectorState(), IfxCif_getHuffmanDcTableLength(), IfxCif_getHuffmanDcTableSelectorState(), IfxCif_getInternalClockMode(), IfxCif_getIspAcquisitionOffset(), IfxCif_getIspAcquisitionSize(), IfxCif_getIspErrorState(), IfxCif_getIspInputSelectionAppendState(), IfxCif_getIspisCameraDisplacement(), IfxCif_getIspisCurrentPictureOffset(), IfxCif_getIspisCurrentPictureSize(), IfxCif_getIspisMaximumDisplacement(), IfxCif_getIspisOffsetOutputWindow(), IfxCif_getIspisPictureSize(), IfxCif_getIspOutputWindowOffset(), IfxCif_getIspPictureSize(), IfxCif_getJpeDebugSignalState(), IfxCif_getJpegCodecImageSize(), IfxCif_getJpeInterruptEnableState(), IfxCif_getJpeQTableSelector(), IfxCif_getJpeScalingEnableState(), IfxCif_getLinearDownscalerEnableState(), IfxCif_getLinearDownscalerScalingFactor(), IfxCif_getLinearDownscalerScalingMode(), IfxCif_getMainPictureComponentBaseInitAddress(), IfxCif_getMaskedEpInterruptTriggeredState(), IfxCif_getMaskedIspInterruptTriggeredState(), IfxCif_getMaskedJpeInterruptTriggeredState(), IfxCif_getMaskedMiInterruptTriggeredState(), IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState(), IfxCif_getMiDataPathInputEnableState(), IfxCif_getMiDataPathOutputEnableState(), IfxCif_getMiFeatureEnableState(), IfxCif_getMiInterruptEnableState(), IfxCif_getMiMainPictureComponentBaseAddress(), IfxCif_getMiMainPictureComponentInitialOffsetCounter(), IfxCif_getMiMainPictureComponentInitSize(), IfxCif_getMiMainPictureComponentOffsetCounter(), IfxCif_getMiMainPictureComponentOffsetCounterStart(), IfxCif_getMiMainPictureComponentSize(), IfxCif_getMiStatusInformation(), IfxCif_getRawEpInterruptTriggeredState(), IfxCif_getRawJpeInterruptTriggeredState(), IfxCif_getRawMiInterruptTriggeredState(), IfxCif_getRawSecurityWatchdogInterruptTriggeredState(), IfxCif_getSecurityWatchdogInterruptEnableState(), IfxCif_getSecurityWatchdogTimeout(), IfxCif_getSoftwareResetMode(), IfxCif_programJpeTable(), IfxCif_resetSecurityWatchdogCounter(), IfxCif_setDpControlEnableState(), IfxCif_setDpCounter(), IfxCif_setDpUserDefinedSymbol(), IfxCif_setEpBaseInitAddress(), IfxCif_setEpCroppingCameraDisplacement(), IfxCif_setEpCroppingEnableState(), IfxCif_setEpCroppingMaximumDisplacement(), IfxCif_setEpCroppingOffsetOutputWindow(), IfxCif_setEpCroppingOffsetsOutputWindow(), IfxCif_setEpCroppingPictureSize(), IfxCif_setEpCroppingPictureSizes(), IfxCif_setEpFeatureEnableState(), IfxCif_setEpInitialFillLevelInterruptOffset(), IfxCif_setEpInitialOffsetCounter(), IfxCif_setEpInitSize(), IfxCif_setEpInterruptEnableState(), IfxCif_setEpInterruptRequestBit(), IfxCif_setEpOffsetCounterStart(), IfxCif_setEpRecenterValue(), IfxCif_setEpWriteFormat(), IfxCif_setHuffmanAcTableLength(), IfxCif_setHuffmanAcTableSelector(), IfxCif_setHuffmanDcTableLength(), IfxCif_setHuffmanDcTableSelector(), IfxCif_setInternalClockMode(), IfxCif_setIspAcquisitionOffset(), IfxCif_setIspAcquisitionSize(), IfxCif_setIspisCameraDisplacement(), IfxCif_setIspisMaximumDisplacement(), IfxCif_setIspisOutputWindowOffset(), IfxCif_setIspisPictureSize(), IfxCif_setIspOutputWindowOffset(), IfxCif_setIspPictureSize(), IfxCif_setJpegCodecImageSize(), IfxCif_setJpeInterruptEnableState(), IfxCif_setJpeInterruptRequestBit(), IfxCif_setJpeQTableSelector(), IfxCif_setJpeScalingEnableState(), IfxCif_setLinearDownscalerEnableState(), IfxCif_setLinearDownscalerScalingFactor(), IfxCif_setLinearDownscalerScalingMode(), IfxCif_setMiFeatureEnableState(), IfxCif_setMiInterruptEnableState(), IfxCif_setMiInterruptRequestBit(), IfxCif_setMiMainPictureComponentBaseInitAddress(), IfxCif_setMiMainPictureComponentInitialOffsetCounter(), IfxCif_setMiMainPictureComponentInitSize(), IfxCif_setSecurityWatchdogInterruptEnableState(), IfxCif_setSecurityWatchdogInterruptRequestBit(), IfxCif_setSecurityWatchdogTimeout(), and IfxCif_setSoftwareResetMode().

◆ IFXCIF_EXTRA_PATHS

#define IFXCIF_EXTRA_PATHS (5)

Number of extra phats.

Definition at line 68 of file IfxCif_cfg.h.

◆ IFXCIF_MAX_I2CNAK

#define IFXCIF_MAX_I2CNAK (16)

Definition at line 71 of file IfxCif_cfg.h.

Referenced by IfxCif_Cam_initCamera().

◆ IFXCIF_NUM_MODULES

#define IFXCIF_NUM_MODULES (1)

Definition at line 74 of file IfxCif_cfg.h.


iLLD_TC26B: IfxCif_PinMap.c File Reference

  • _PinMap
Variables
IfxCif_PinMap.c File Reference
iLLD » CIF

CIF I/O map. More...

#include "IfxCif_PinMap.h"
Include dependency graph for IfxCif_PinMap.c:

Go to the source code of this file.

Variables

IfxCif_Clk_In | IfxCif_CLK_P00_7_IN = {&MODULE_CIF, {&MODULE_P00, 7}}
IfxCif_D_In | IfxCif_D0_P02_0_IN = {&MODULE_CIF, {&MODULE_P02, 0}}
IfxCif_D_In | IfxCif_D10_P00_1_IN = {&MODULE_CIF, {&MODULE_P00, 1}}
IfxCif_D_In | IfxCif_D11_P00_2_IN = {&MODULE_CIF, {&MODULE_P00, 2}}
IfxCif_D_In | IfxCif_D12_P00_3_IN = {&MODULE_CIF, {&MODULE_P00, 3}}
IfxCif_D_In | IfxCif_D13_P00_4_IN = {&MODULE_CIF, {&MODULE_P00, 4}}
IfxCif_D_In | IfxCif_D14_P00_5_IN = {&MODULE_CIF, {&MODULE_P00, 5}}
IfxCif_D_In | IfxCif_D15_P00_6_IN = {&MODULE_CIF, {&MODULE_P00, 6}}
IfxCif_D_In | IfxCif_D1_P02_1_IN = {&MODULE_CIF, {&MODULE_P02, 1}}
IfxCif_D_In | IfxCif_D2_P02_2_IN = {&MODULE_CIF, {&MODULE_P02, 2}}
IfxCif_D_In | IfxCif_D3_P02_3_IN = {&MODULE_CIF, {&MODULE_P02, 3}}
IfxCif_D_In | IfxCif_D4_P02_4_IN = {&MODULE_CIF, {&MODULE_P02, 4}}
IfxCif_D_In | IfxCif_D5_P02_5_IN = {&MODULE_CIF, {&MODULE_P02, 5}}
IfxCif_D_In | IfxCif_D6_P02_6_IN = {&MODULE_CIF, {&MODULE_P02, 6}}
IfxCif_D_In | IfxCif_D7_P02_7_IN = {&MODULE_CIF, {&MODULE_P02, 7}}
IfxCif_D_In | IfxCif_D8_P02_8_IN = {&MODULE_CIF, {&MODULE_P02, 8}}
IfxCif_D_In | IfxCif_D9_P00_0_IN = {&MODULE_CIF, {&MODULE_P00, 0}}
IfxCif_Hsnc_In | IfxCif_HSNC_P00_9_IN = {&MODULE_CIF, {&MODULE_P00, 9}}
IfxCif_Vsnc_In | IfxCif_VSNC_P00_8_IN = {&MODULE_CIF, {&MODULE_P00, 8}}

Detailed Description

CIF I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCif_PinMap.c.

Variable Documentation

◆ IfxCif_CLK_P00_7_IN

IfxCif_Clk_In IfxCif_CLK_P00_7_IN = {&MODULE_CIF, {&MODULE_P00, 7}}

Definition at line 45 of file IfxCif_PinMap.c.

◆ IfxCif_D0_P02_0_IN

IfxCif_D_In IfxCif_D0_P02_0_IN = {&MODULE_CIF, {&MODULE_P02, 0}}

Definition at line 46 of file IfxCif_PinMap.c.

◆ IfxCif_D10_P00_1_IN

IfxCif_D_In IfxCif_D10_P00_1_IN = {&MODULE_CIF, {&MODULE_P00, 1}}

Definition at line 47 of file IfxCif_PinMap.c.

◆ IfxCif_D11_P00_2_IN

IfxCif_D_In IfxCif_D11_P00_2_IN = {&MODULE_CIF, {&MODULE_P00, 2}}

Definition at line 48 of file IfxCif_PinMap.c.

◆ IfxCif_D12_P00_3_IN

IfxCif_D_In IfxCif_D12_P00_3_IN = {&MODULE_CIF, {&MODULE_P00, 3}}

Definition at line 49 of file IfxCif_PinMap.c.

◆ IfxCif_D13_P00_4_IN

IfxCif_D_In IfxCif_D13_P00_4_IN = {&MODULE_CIF, {&MODULE_P00, 4}}

Definition at line 50 of file IfxCif_PinMap.c.

◆ IfxCif_D14_P00_5_IN

IfxCif_D_In IfxCif_D14_P00_5_IN = {&MODULE_CIF, {&MODULE_P00, 5}}

Definition at line 51 of file IfxCif_PinMap.c.

◆ IfxCif_D15_P00_6_IN

IfxCif_D_In IfxCif_D15_P00_6_IN = {&MODULE_CIF, {&MODULE_P00, 6}}

Definition at line 52 of file IfxCif_PinMap.c.

◆ IfxCif_D1_P02_1_IN

IfxCif_D_In IfxCif_D1_P02_1_IN = {&MODULE_CIF, {&MODULE_P02, 1}}

Definition at line 53 of file IfxCif_PinMap.c.

◆ IfxCif_D2_P02_2_IN

IfxCif_D_In IfxCif_D2_P02_2_IN = {&MODULE_CIF, {&MODULE_P02, 2}}

Definition at line 54 of file IfxCif_PinMap.c.

◆ IfxCif_D3_P02_3_IN

IfxCif_D_In IfxCif_D3_P02_3_IN = {&MODULE_CIF, {&MODULE_P02, 3}}

Definition at line 55 of file IfxCif_PinMap.c.

◆ IfxCif_D4_P02_4_IN

IfxCif_D_In IfxCif_D4_P02_4_IN = {&MODULE_CIF, {&MODULE_P02, 4}}

Definition at line 56 of file IfxCif_PinMap.c.

◆ IfxCif_D5_P02_5_IN

IfxCif_D_In IfxCif_D5_P02_5_IN = {&MODULE_CIF, {&MODULE_P02, 5}}

Definition at line 57 of file IfxCif_PinMap.c.

◆ IfxCif_D6_P02_6_IN

IfxCif_D_In IfxCif_D6_P02_6_IN = {&MODULE_CIF, {&MODULE_P02, 6}}

Definition at line 58 of file IfxCif_PinMap.c.

◆ IfxCif_D7_P02_7_IN

IfxCif_D_In IfxCif_D7_P02_7_IN = {&MODULE_CIF, {&MODULE_P02, 7}}

Definition at line 59 of file IfxCif_PinMap.c.

◆ IfxCif_D8_P02_8_IN

IfxCif_D_In IfxCif_D8_P02_8_IN = {&MODULE_CIF, {&MODULE_P02, 8}}

Definition at line 60 of file IfxCif_PinMap.c.

◆ IfxCif_D9_P00_0_IN

IfxCif_D_In IfxCif_D9_P00_0_IN = {&MODULE_CIF, {&MODULE_P00, 0}}

Definition at line 61 of file IfxCif_PinMap.c.

◆ IfxCif_HSNC_P00_9_IN

IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN = {&MODULE_CIF, {&MODULE_P00, 9}}

Definition at line 62 of file IfxCif_PinMap.c.

◆ IfxCif_VSNC_P00_8_IN

IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN = {&MODULE_CIF, {&MODULE_P00, 8}}

Definition at line 63 of file IfxCif_PinMap.c.


iLLD_TC26B: IfxCif_PinMap.h File Reference

  • _PinMap
Data Structures | Variables
IfxCif_PinMap.h File Reference
iLLD » CIF

CIF I/O map. More...

#include <IfxCif_reg.h>
#include <_Impl/IfxCif_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxCif_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxCif_Clk_In
CLK pin mapping structure. More...
struct | IfxCif_D_In
D pin mapping structure. More...
struct | IfxCif_Hsnc_In
HSNC pin mapping structure. More...
struct | IfxCif_Vsnc_In
VSNC pin mapping structure. More...

Variables

IFX_EXTERN IfxCif_Clk_In IfxCif_CLK_P00_7_IN
CIF_CLK: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D0_P02_0_IN
CIF_D0: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D10_P00_1_IN
CIF_D10: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D11_P00_2_IN
CIF_D11: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D12_P00_3_IN
CIF_D12: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D13_P00_4_IN
CIF_D13: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D14_P00_5_IN
CIF_D14: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D15_P00_6_IN
CIF_D15: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D1_P02_1_IN
CIF_D1: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D2_P02_2_IN
CIF_D2: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D3_P02_3_IN
CIF_D3: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D4_P02_4_IN
CIF_D4: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D5_P02_5_IN
CIF_D5: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D6_P02_6_IN
CIF_D6: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D7_P02_7_IN
CIF_D7: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D8_P02_8_IN
CIF_D8: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D9_P00_0_IN
CIF_D9: CIF input. More...
IFX_EXTERN IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN
CIF_HSNC: CIF input. More...
IFX_EXTERN IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN
CIF_VSNC: CIF input. More...

Detailed Description

CIF I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCif_PinMap.h.


iLLD_TC26B: IfxCif_Cam.h File Reference

  • Cif
  • Cam
Data Structures | Macros | Enumerations | Functions
IfxCif_Cam.h File Reference
iLLD » CIF

CIF CAM details. More...

#include "Cif/Std/IfxCif.h"
#include "_PinMap/IfxCif_PinMap.h"
#include "Emem/Std/IfxEmem.h"
#include "I2c/I2c/IfxI2c_I2c.h"
#include "string.h"
Include dependency graph for IfxCif_Cam.h:

Go to the source code of this file.

Data Structures

struct | IfxCif_Cam_TableInfo
struct | IfxCif_Cam_JpegTable
Single component JPEG tables. More...
struct | IfxCif_Cam_PictureInfo
Picture info. More...
struct | IfxCif_Cam_JpegTables
JPEG tables for all components. More...
struct | IfxCif_Cam_MemConfig
Single path memory interface configuration (used in initialisation/configuration) More...
struct | IfxCif_Cam_MemInfo
Single path memory interface information (used in Runtime) More...
struct | IfxCif_Cam_Common
Common configuration. More...
struct | IfxCif_Cam_Downscaling
Downscaler configuration. More...
struct | IfxCif_Cam_JfifHeader
JPEG JFIF header structure. More...
struct | IfxCif_Cam_MemAreas
All paths memory partitioning. More...
struct | IfxCif_Cam
Structure which is used as handle for the CIF-CAM functions. This stores cached variables useful for run-time operations. More...
struct | IfxCif_Cam_Config
Camera specific configuration. More...

Macros

#define | IFXCIF_CAM_MEM_ALIGN_SIZE (64)
#define | IFXCIF_CAM_MEM_GAPSIZE 0x0

Enumerations

enum IfxCif_Cam_IspMode {
IfxCif_Cam_IspMode_undefined = -1,
IfxCif_Cam_IspMode_raw = 0,
IfxCif_Cam_IspMode_yuvInterleaved = 1,
IfxCif_Cam_IspMode_yuvPlanar = 2
}
CIF ISP mode. More...
enum IfxCif_Cam_State {
IfxCif_Cam_State_stopped = 0,
IfxCif_Cam_State_running = 1
}
Driver acquisition state. More...
enum IfxCif_Cam_Status {
IfxCif_Cam_Status_ok = 0,
IfxCif_Cam_Status_notEnoughMemory = 1,
IfxCif_Cam_Status_cameraCommError = 2,
IfxCif_Cam_Status_notAvailable = 3
}
Driver status. More...

Functions

IFX_INLINE void | IfxCif_Cam_clearFrameReceptionFlag (const IfxCif_Cam *cam)
Clear the frame reception flag. More...
IFX_INLINE void | IfxCif_Cam_clearJpegEncodingCompleteFlag (const IfxCif_Cam *cam)
Clear the JPEG encoder completed flag. More...
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getBbbAddress (const IfxCif_Cam *cam, Ifx_AddressValue cpuAddress)
Convert the CPU address into BBB address. More...
IFX_INLINE uint32 | IfxCif_Cam_getExtraFrameSize (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns the size (in bytes) of one last acquired extra-path image data. More...
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * | IfxCif_Cam_getExtraPathMemInfo (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
IFX_INLINE uint32 | IfxCif_Cam_getFrameSize (const IfxCif_Cam *cam)
Returns the size (in bytes) of last acquired main-path image data. More...
IFX_INLINE uint32 | IfxCif_Cam_getJpegEncodedSize (const IfxCif_Cam *cam)
Returns the size (in bytes) of last encoded main-path image data. More...
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getLastExtraAddress (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns the address location of last acquired extra-path image frame data. More...
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * | IfxCif_Cam_getLastExtraCaptureInfo (const IfxCif_Cam *cam, IfxCif_ExtraPath z, Ifx_AddressValue *address, uint32 *size)
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getLastFrameAddress (const IfxCif_Cam *cam)
Returns the address location of last acquired main-path image frame data. More...
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * | IfxCif_Cam_getLastFrameCaptureInfo (const IfxCif_Cam *cam, Ifx_AddressValue *address, uint32 *size)
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getNextFrameAddress (const IfxCif_Cam *cam)
Returns the address location of next acquired main-path image frame data. More...
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getNextJpegFrameAddress (IfxCif_Cam *cam)
Returns the address location of next acquired JPEG image frame data. More...
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_incrementAddress (const IfxCif_Cam *cam, Ifx_AddressValue address)
Increment the address related to memory interface of for main-path. The address is wrapped around at the boundary of the allocated RAM size. More...
IFX_INLINE boolean | IfxCif_Cam_isFrameReceptionComplete (const IfxCif_Cam *cam)
Returns TRUE if JPEG encoding is completed. More...
IFX_INLINE boolean | IfxCif_Cam_isJpegEncodingComplete (const IfxCif_Cam *cam)
IFX_INLINE void | IfxCif_Cam_skipPicture (const IfxCif_Cam *cam)
IFX_EXTERN void | IfxCif_Cam_clearAllFlags (const IfxCif_Cam *cam)
Clear all CIF module notification flags. More...
IFX_EXTERN void | IfxCif_Cam_disableJpegEncoder (const IfxCif_Cam *cam)
Disable the JPEG encoder and route the acquisition path accordingly to the 'original' configuration, i.e. RAW or main path. More...
IFX_EXTERN void | IfxCif_Cam_enableJpegEncoder (const IfxCif_Cam *cam)
Enable the JPEG encoder and route the acquisition path accordingly. More...
IFX_EXTERN IFX_CONST IfxCif_Cam_PictureInfo * | IfxCif_Cam_getExtraPathPictureInfo (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns pointer to the variable storing picture info of an extra-path. More...
IFX_EXTERN boolean | IfxCif_Cam_getLastJpegEncodingInfo (IfxCif_Cam *cam, Ifx_AddressValue *address, sint32 *size)
Returns pointer to the memory structure storing last JPEG encoding process. More...
IFX_EXTERN IfxCif_Cam_Status | IfxCif_Cam_init (IfxCif_Cam *cam, const IfxCif_Cam_Config *config, boolean initCam)
Initialise the CIF, EMEM, PORT, I2C and the camera itself. More...
IFX_EXTERN void | IfxCif_Cam_restartCapture (const IfxCif_Cam *cam, uint8 frames)
Restart capture by enabling the ISP output. More...
IFX_EXTERN void | IfxCif_Cam_startCapture (const IfxCif_Cam *cam, uint8 frames)
Start capture by enabling the ISP output and initialising the MI counter. More...
IFX_EXTERN void | IfxCif_Cam_stopCapture (const IfxCif_Cam *cam)
Stop capture by disabling the ISP output. More...

Detailed Description

CIF CAM details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCif_Cam.h.

Macro Definition Documentation

◆ IFXCIF_CAM_MEM_ALIGN_SIZE

#define IFXCIF_CAM_MEM_ALIGN_SIZE (64)

Definition at line 68 of file IfxCif_Cam.h.

◆ IFXCIF_CAM_MEM_GAPSIZE

#define IFXCIF_CAM_MEM_GAPSIZE 0x0

Definition at line 70 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_initMemSize().


iLLD_TC26B: IfxCif.h File Reference

  • Cif
  • Std
Enumerations | Functions
IfxCif.h File Reference
iLLD » CIF

CIF basic functionality. More...

#include "_Impl/IfxCif_cfg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "IfxCif_bf.h"
#include "IfxCif_reg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxCif.h:

Go to the source code of this file.

Enumerations

enum IfxCif_DataPathSelectorForMainPath {
IfxCif_DataPathSelectorForMainPath_Disabled = 0,
IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed = 1,
IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder = 2
}
Enumerator for data path of main path. More...
enum IfxCif_ErrorState {
IfxCif_ErrorState_NoError = 0,
IfxCif_ErrorState_Error = 1
}
Enumerator for the state of an error. More...
enum IfxCif_ExtraPath {
IfxCif_ExtraPath_1 = 0,
IfxCif_ExtraPath_2 = 1,
IfxCif_ExtraPath_3 = 2,
IfxCif_ExtraPath_4 = 3,
IfxCif_ExtraPath_5 = 4
}
Enumerator for the extra paths. More...
enum IfxCif_ImageTiers {
IfxCif_ImageTiers_Horizontal = 0,
IfxCif_ImageTiers_Vertical = 1
}
Enumerator for tiers. More...
enum IfxCif_InputInterface { IfxCif_InputInterface_ParallelInterface = 0 }
Enumerator for input interfaces supported by the CIF interface. More...
enum IfxCif_InterruptTriggeredState {
IfxCif_InterruptTriggeredState_NotTriggered = 0,
IfxCif_InterruptTriggeredState_Triggered = 1
}
Enumerator for the state of an interrupt. More...
enum IfxCif_PortInputSelection {
IfxCif_PortInputSelection_PinMapping0 = 0,
IfxCif_PortInputSelection_PinMapping1 = 1
}
Enumerator for port input selections. More...
enum IfxCif_State {
IfxCif_State_Disabled = 0,
IfxCif_State_Enabled = 1
}
Enumerator for states. More...
enum IfxCif_Submodules {
IfxCif_Submodules_AllModules = 0,
IfxCif_Submodules_Debug = 1,
IfxCif_Submodules_ExtraPaths = 2,
IfxCif_Submodules_LinearDownscaler = 3,
IfxCif_Submodules_SecurityWatchdog = 4,
IfxCif_Submodules_MemoryInterface = 5,
IfxCif_Submodules_JpegEncoder = 6,
IfxCif_Submodules_ImageSignalProcessing = 7,
IfxCif_Submodules_YCSplitter = 8
}
Enumerator for submodules of the CIF interface. More...
enum IfxCif_YCSplitterChannelMode {
IfxCif_YCSplitterChannelMode_Disabled = 0,
IfxCif_YCSplitterChannelMode_MainPathAndRawMode = 1
}
Enumerator for channel mode of Y/C splitter. More...
enum IfxCif_IspCcirSequence {
IfxCif_IspCcirSequence_YCbYCr = 0,
IfxCif_IspCcirSequence_YCrYCb = 1,
IfxCif_IspCcirSequence_CbYCrY = 2
}
Enumerator for the ISP CCIR sequence. More...
enum IfxCif_IspColorSpaceMatrixCrominanceClippingRange {
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_16To240 = 0,
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255 = 1
}
Enumerator for the clipping range of the crominance for the ISP output. More...
enum IfxCif_IspColorSpaceMatrixLuminanceClippingRange {
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_16To235 = 0,
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255 = 1
}
Enumerator for the clipping range of the luminance for the ISP output. More...
enum IfxCif_IspErrorSources {
IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule = 0,
IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule = 1,
IfxCif_IspErrorSources_SizeErrorInInformSubmodule = 2
}
Enumerator for error sources of the ISP module. More...
enum IfxCif_IspFieldSelection {
IfxCif_IspFieldSelection_AllFields = 0,
IfxCif_IspFieldSelection_OnlyEvenFields = 1,
IfxCif_IspFieldSelection_OnlyOddFields = 2
}
Enumerator for the sampled input fields. More...
enum IfxCif_IspInformFieldInformation {
IfxCif_IspInformFieldInformation_Odd = 0,
IfxCif_IspInformFieldInformation_Even = 1
}
Enumerator for current field information. More...
enum IfxCif_IspInputInterface {
IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb = 0,
IfxCif_IspInputInterface_8BitExternalInterfaceAppendZeros = 1,
IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb = 2,
IfxCif_IspInputInterface_10BitExternalInterfaceAppendZeros = 3,
IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb = 4,
IfxCif_IspInputInterface_12BitExternalInterfaceAppendZeros = 5,
IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb = 6,
IfxCif_IspInputInterface_14BitExternalInterfaceAppendZeros = 7,
IfxCif_IspInputInterface_16BitExternalInterface = 8
}
Enumerator for the supported input interfaces of the ISP. More...
enum IfxCif_IspInterruptSources {
IfxCif_IspInterruptSources_SecurityWatchdogTimeout = 0,
IfxCif_IspInterruptSources_StartEdgeOfHSync = 1,
IfxCif_IspInterruptSources_StartEdgeOfVSync = 2,
IfxCif_IspInterruptSources_SampledInputFrameComplete = 3,
IfxCif_IspInterruptSources_PictureSizeViolationOccurred = 4,
IfxCif_IspInterruptSources_LossOfData = 5,
IfxCif_IspInterruptSources_FrameCompletelyPutOut = 6,
IfxCif_IspInterruptSources_IspTurnedOff = 7
}
Enumerator for interrupt sources of the ISP submodule. More...
enum IfxCif_IspMode {
IfxCif_IspMode_RawPicture = 0,
IfxCif_IspMode_ItuRBT656 = 1,
IfxCif_IspMode_ItuRBT601 = 2,
IfxCif_IspMode_DataMode = 4,
IfxCif_IspMode_RawPictureWithItuRBT656Sync = 6
}
Enumerator for the ISP mode. More...
enum IfxCif_IspSamplingEdge {
IfxCif_IspSamplingEdge_NegativeEdge = 0,
IfxCif_IspSamplingEdge_PositiveEdge = 1
}
Enumerator for ISP sampling edge. More...
enum IfxCif_IspSyncPolarity {
IfxCif_IspSyncPolarity_HighActive = 0,
IfxCif_IspSyncPolarity_LowActive = 1
}
enum IfxCif_LinearDownscalerScalingMode {
IfxCif_LinearDownscalerScalingMode_SingleSkip = 0,
IfxCif_LinearDownscalerScalingMode_DoubleSkip = 1,
IfxCif_LinearDownscalerScalingMode_SinglePass = 2,
IfxCif_LinearDownscalerScalingMode_DoublePass = 3,
IfxCif_LinearDownscalerScalingMode_Disabled = -1
}
Enumerator for scaling mode of linear downscaler. More...
enum IfxCif_MiBurstLength {
IfxCif_MiBurstLength_4BeatBursts = 0,
IfxCif_MiBurstLength_8BeatBursts = 1
}
Enumerator for burst length affecting the write port of the memory interface. More...
enum IfxCif_MiDataPaths {
IfxCif_MiDataPaths_RawData = 0,
IfxCif_MiDataPaths_JpegData = 1,
IfxCif_MiDataPaths_MainPictureData = 2
}
Enumerator for data paths of the memory interface. More...
enum IfxCif_MiInterruptSources {
IfxCif_MiInterruptSources_BusError = 0,
IfxCif_MiInterruptSources_WrapMainPictureCr = 1,
IfxCif_MiInterruptSources_WrapMainPictureCb = 2,
IfxCif_MiInterruptSources_WrapMainPictureY = 3,
IfxCif_MiInterruptSources_FillMainPictureY = 4,
IfxCif_MiInterruptSources_MacroBlockLine = 5,
IfxCif_MiInterruptSources_MainPictureFrameEnd = 6
}
Enumerator for interrupt sources of the memory interface submodule. More...
enum IfxCif_MiMainPicturePathComponents {
IfxCif_MiMainPicturePathComponents_Y = 0,
IfxCif_MiMainPicturePathComponents_Cb = 1,
IfxCif_MiMainPicturePathComponents_Cr = 2
}
Enumerator for main picture path components of the memory interface. More...
enum IfxCif_MiMainPictureWriteFormat {
IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit = 0,
IfxCif_MiMainPictureWriteFormat_SemiPlanarOrData8Bit = 1,
IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit = 2
}
Enumerator for write formats of data written into memory. More...
enum IfxCif_MiStatusClearSources {
IfxCif_MiStatusClearSources_ExtraPath5FifoFull = 0,
IfxCif_MiStatusClearSources_ExtraPath4FifoFull = 1,
IfxCif_MiStatusClearSources_ExtraPath3FifoFull = 2,
IfxCif_MiStatusClearSources_ExtraPath2FifoFull = 3,
IfxCif_MiStatusClearSources_ExtraPath1FifoFull = 4,
IfxCif_MiStatusClearSources_BusWriteError = 5,
IfxCif_MiStatusClearSources_MainPictureCrFifoFull = 6,
IfxCif_MiStatusClearSources_MainPictureCbFifoFull = 7,
IfxCif_MiStatusClearSources_MainPictureYFifoFull = 8
}
Enumerator for status clear sources of the memory interface module. More...
enum IfxCif_MiStatusInformationSources {
IfxCif_MiStatusInformationSources_BusWriteError = 0,
IfxCif_MiStatusInformationSources_MainPictureCrFifoFull = 1,
IfxCif_MiStatusInformationSources_MainPictureCbFifoFull = 2,
IfxCif_MiStatusInformationSources_MainPictureYFifoFull = 3
}
Enumerator for status information sources of the memory interface submodule. More...
enum IfxCif_HuffmanTableComponents {
IfxCif_HuffmanTableComponents_Component0 = 0,
IfxCif_HuffmanTableComponents_Component1 = 1,
IfxCif_HuffmanTableComponents_Component2 = 2
}
Enumerator for the Huffman Table components. More...
enum IfxCif_HuffmanTables {
IfxCif_HuffmanTables_Table0 = 0,
IfxCif_HuffmanTables_Table1 = 1
}
Enumerator for the Huffman Tables. More...
enum IfxCif_JpeDebugSignalSources {
IfxCif_JpeDebugSignalSources_BadTableAccess = 0,
IfxCif_JpeDebugSignalSources_VlcTableBusy = 1,
IfxCif_JpeDebugSignalSources_R2BMemoryFull = 2,
IfxCif_JpeDebugSignalSources_VlcEncodeBusy = 3,
IfxCif_JpeDebugSignalSources_QiqTableAccess = 4
}
Enumerator for the debug signal sources. More...
enum IfxCif_JpeDebugSignalState {
IfxCif_JpeDebugSignalState_Inactive = 0,
IfxCif_JpeDebugSignalState_Active = 1
}
Enumerator for the debug signal state. More...
enum IfxCif_JpeHeaderGenerationMode {
IfxCif_JpeHeaderGenerationMode_WaitForEncodedImage = 0,
IfxCif_JpeHeaderGenerationMode_TransmitLastHeaderBytes = 1
}
Enumerator for the header generation debug control. More...
enum IfxCif_JpeHeaderMode {
IfxCif_JpeHeaderMode_NoAppnHeader = 0,
IfxCif_JpeHeaderMode_JfifHeader = 2
}
Enumerator for the JPE header mode. More...
enum IfxCif_JpeInterruptSources {
IfxCif_JpeInterruptSources_VlcTableError = 0,
IfxCif_JpeInterruptSources_R2BImageSizeError = 1,
IfxCif_JpeInterruptSources_DcTableError = 2,
IfxCif_JpeInterruptSources_VlcSymbolError = 3,
IfxCif_JpeInterruptSources_HeaderGenerationComplete = 4,
IfxCif_JpeInterruptSources_EncodingComplete = 5
}
Enumerator for interrupt sources of the JPEG encoder module. More...
enum IfxCif_JpeQTableSelector {
IfxCif_JpeQTableSelector_Table0 = 0,
IfxCif_JpeQTableSelector_Table1 = 1,
IfxCif_JpeQTableSelector_Table2 = 2,
IfxCif_JpeQTableSelector_Table3 = 3
}
Enumerator for the Q-Table selector. More...
enum IfxCif_JpeQTableSelectorComponents {
IfxCif_JpeQTableSelectorComponents_Y = 0,
IfxCif_JpeQTableSelectorComponents_U = 1,
IfxCif_JpeQTableSelectorComponents_V = 2
}
Enumerator for the components to select Q-Tables. More...
enum IfxCif_JpeScalingValueSources {
IfxCif_JpeScalingValueSources_Y = 0,
IfxCif_JpeScalingValueSources_CbCr = 1
}
Enumerator for the input scaling values of the JPEG encoder. More...
enum IfxCif_JpeState {
IfxCif_JpeState_Free = 0,
IfxCif_JpeState_Busy = 1
}
Enumerator for the codec state. More...
enum IfxCif_JpeTableId {
IfxCif_JpeTableId_QTable0 = 0,
IfxCif_JpeTableId_QTable1 = 1,
IfxCif_JpeTableId_QTable2 = 2,
IfxCif_JpeTableId_QTable3 = 3,
IfxCif_JpeTableId_VlcDcTable0 = 4,
IfxCif_JpeTableId_VlcAcTable0 = 5,
IfxCif_JpeTableId_VlcDcTable1 = 6,
IfxCif_JpeTableId_VlcAcTable1 = 7
}
Enumerator for the JPE Tables. More...
enum IfxCif_JpegJfifStreamEncoderContinuousMode {
IfxCif_JpegJfifStreamEncoderContinuousMode_StopAtFrameEnd = 0,
IfxCif_JpegJfifStreamEncoderContinuousMode_StartAutomatically = 1,
IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically = 3
}
Enumerator for the JFIF stream encoder continuous mode. More...
enum IfxCif_JpegPictureEncodingFormat {
IfxCif_JpegPictureEncodingFormat_422 = 0,
IfxCif_JpegPictureEncodingFormat_400 = 1
}
Enumerator for the picture encoding format. More...
enum IfxCif_SecurityWatchdogCounters {
IfxCif_SecurityWatchdogCounters_Predivider = 0,
IfxCif_SecurityWatchdogCounters_Vertical = 1,
IfxCif_SecurityWatchdogCounters_Horizontal = 2
}
Enumerator for watchdog counters. More...
enum IfxCif_SecurityWatchdogInterruptSources {
IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout = 0,
IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout = 1,
IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout = 2,
IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout = 3
}
Enumerator for interrupt sources of the security watchdog submodule. More...
enum IfxCif_SecurityWatchdogTimeoutCounters {
IfxCif_SecurityWatchdogTimeoutCounters_EndStart = 0,
IfxCif_SecurityWatchdogTimeoutCounters_StartEnd = 1
}
Enumerator for watchdog timeout counters. More...
enum IfxCif_EpErrorClearSources {
IfxCif_EpErrorClearSources_ExtraPath5SizeError = 0,
IfxCif_EpErrorClearSources_ExtraPath4SizeError = 1,
IfxCif_EpErrorClearSources_ExtraPath3SizeError = 2,
IfxCif_EpErrorClearSources_ExtraPath2SizeError = 3,
IfxCif_EpErrorClearSources_ExtraPath1SizeError = 4
}
Enumerator for error sources that can be cleared in the extra paths registers. More...
enum IfxCif_EpErrorSources {
IfxCif_EpErrorSources_ExtraPath5FifoFull = 0,
IfxCif_EpErrorSources_ExtraPath4FifoFull = 1,
IfxCif_EpErrorSources_ExtraPath3FifoFull = 2,
IfxCif_EpErrorSources_ExtraPath2FifoFull = 3,
IfxCif_EpErrorSources_ExtraPath1FifoFull = 4,
IfxCif_EpErrorSources_ExtraPath5SizeError = 5,
IfxCif_EpErrorSources_ExtraPath4SizeError = 6,
IfxCif_EpErrorSources_ExtraPath3SizeError = 7,
IfxCif_EpErrorSources_ExtraPath2SizeError = 8,
IfxCif_EpErrorSources_ExtraPath1SizeError = 9
}
Enumerator for error sources of extra paths. More...
enum IfxCif_EpFeatures {
IfxCif_EpFeatures_InitOffsetCounter = 0,
IfxCif_EpFeatures_InitBaseAddress = 1,
IfxCif_EpFeatures_ByteSwap = 2,
IfxCif_EpFeatures_PictureDataPath = 3
}
Enumerator for extra path features. More...
enum IfxCif_EpInterrupts {
IfxCif_EpInterrupts_FrameEnd = IFX_CIF_MIEP_MIS_FRAME_END_EP_1_OFF,
IfxCif_EpInterrupts_FillLevel = IFX_CIF_MIEP_MIS_FILL_EP_1_OFF,
IfxCif_EpInterrupts_WrapAround = IFX_CIF_MIEP_MIS_WRAP_EP_1_OFF,
IfxCif_EpInterrupts_MacroBlockLine = IFX_CIF_MIEP_MIS_MBLK_LINE_EP_1_OFF,
IfxCif_EpInterrupts_Count = 4
}
Enumerator for interrupt sources of the extra paths module. More...
enum IfxCif_EpWriteFormat {
IfxCif_EpWriteFormat_RawAndData = 0,
IfxCif_EpWriteFormat_Raw8Bit = 1,
IfxCif_EpWriteFormat_RawGreater = 2,
IfxCif_EpWriteFormat_YCbCr = 3
}
Enumerator for write formats of extra paths. More...
enum IfxCif_DpControlSources {
IfxCif_DpControlSources_UserDefinedSymbol8 = 0,
IfxCif_DpControlSources_UserDefinedSymbol7 = 1,
IfxCif_DpControlSources_UserDefinedSymbol6 = 2,
IfxCif_DpControlSources_UserDefinedSymbol5 = 3,
IfxCif_DpControlSources_UserDefinedSymbol4 = 4,
IfxCif_DpControlSources_UserDefinedSymbol3 = 5,
IfxCif_DpControlSources_UserDefinedSymbol2 = 6,
IfxCif_DpControlSources_UserDefinedSymbol1 = 7,
IfxCif_DpControlSources_TimestampCounter = 8,
IfxCif_DpControlSources_LineNumberCounter = 9,
IfxCif_DpControlSources_FrameNumberCounter = 10
}
Enumerator for debug path control sources. More...
enum IfxCif_DpCounters {
IfxCif_DpCounters_PredividerCounter = 0,
IfxCif_DpCounters_TimestampCounter = 1,
IfxCif_DpCounters_LineNumberCounter = 2,
IfxCif_DpCounters_FrameNumberCounter = 3
}
Enumerator for debug path counters. More...
enum IfxCif_DpSourcePath {
IfxCif_DpSourcePath_MainPath = 0,
IfxCif_DpSourcePath_ExtraPath1 = 1,
IfxCif_DpSourcePath_ExtraPath2 = 2,
IfxCif_DpSourcePath_ExtraPath4 = 4,
IfxCif_DpSourcePath_ExtraPath5 = 5
}
Enumerator for debug path source paths. More...

Functions

IFX_INLINE void | IfxCif_clearKernelResetState (void)
Function to clear the kernel reset state. More...
IFX_INLINE uint16 | IfxCif_getCifModuleId (void)
Function to query the CIF module ID. More...
IFX_INLINE IfxCif_PortInputSelection | IfxCif_getCifModulePortInputSelection (void)
Function to query the port input selection. More...
IFX_INLINE uint8 | IfxCif_getCifModuleRevision (void)
Function to query the CIF module revision. More...
IFX_INLINE uint8 | IfxCif_getCifModuleType (void)
Function to query the CIF module ID. More...
IFX_INLINE IfxCif_State | IfxCif_getClockControlLogicState (void)
Function to query the clock distribution enabled state. More...
IFX_INLINE IfxCif_DataPathSelectorForMainPath | IfxCif_getDataPathSelectorForMainPath (void)
Function to query the data path for main path. More...
IFX_INLINE IfxCif_InputInterface | IfxCif_getInputInterface (void)
Function to query the input interface of the CIF interface. More...
IFX_INLINE IfxCif_State | IfxCif_getIspInputPortSHSyncState (void)
Function to query the current level of the ISP input port s_hsync (for testing purposes only) More...
IFX_INLINE IfxCif_State | IfxCif_getKernelResetStatus (void)
Function to query the kernel reset status. More...
IFX_INLINE uint16 | IfxCif_getModuleNumber (void)
Function to query the module number. More...
IFX_INLINE uint8 | IfxCif_getModuleRevisionNumber (void)
Function to query the revision number of the CIF interface. More...
IFX_INLINE IfxCif_State | IfxCif_getModuleState (void)
Function to query the state of the CIF module. More...
IFX_INLINE uint8 | IfxCif_getModuleType (void)
Function to query the module type. More...
IFX_INLINE IfxCif_YCSplitterChannelMode | IfxCif_getYCSplitterChannelMode (void)
Function to query the Y/C splitter channel mode. More...
IFX_INLINE void | IfxCif_setClockControlLogicState (IfxCif_State clockControlLogicState)
Function to enable or disable the clock distribution to all CIF submodules. More...
IFX_INLINE void | IfxCif_setDataPathSelectorForMainPath (IfxCif_DataPathSelectorForMainPath pathSelector)
Function to set the data path for main path. More...
IFX_INLINE void | IfxCif_setInputInterface (IfxCif_InputInterface interface)
Function to set the input interface of the CIF interface. More...
IFX_INLINE void | IfxCif_setKernelResetRequestState (IfxCif_State state)
Function to request a kernel reset or reset the request bit. More...
IFX_INLINE void | IfxCif_setYCSplitterChannelMode (IfxCif_YCSplitterChannelMode mode)
Function to set the Y/C splitter channel mode. More...
IFX_EXTERN IfxCif_State | IfxCif_getInternalClockMode (IfxCif_Submodules submodule)
Function to query the clock state of a submodule. More...
IFX_EXTERN IfxCif_State | IfxCif_getKernelResetRequestState (void)
Function to query the state of the kernel reset request bit. More...
IFX_EXTERN IfxCif_State | IfxCif_getSoftwareResetMode (IfxCif_Submodules submodule)
Function to query the reset mode of a submodule. More...
IFX_EXTERN void | IfxCif_resetModule (Ifx_CIF_BBB *cifBbb)
resets CIF kernel More...
IFX_EXTERN void | IfxCif_setInternalClockMode (IfxCif_Submodules submodule, IfxCif_State clockState)
Function to enable or disable the clock of a submodule. More...
IFX_EXTERN void | IfxCif_setModuleStateRequest (IfxCif_State state)
Function to request enabling or disabling of the CIF module. More...
IFX_EXTERN void | IfxCif_setSoftwareResetMode (IfxCif_Submodules submodule, IfxCif_State resetMode)
Function to enable or disable the reset mode of a submodule. More...
IFX_INLINE void | IfxCif_generateIspFrameSynchronousConfigUpdateSignal (void)
Function to generate a frame synchronous ISP configuration update signal. More...
IFX_INLINE void | IfxCif_generateIspImmediateConfigUpdateSignal (void)
Function to generate an immediate ISP configuration update signal. More...
IFX_INLINE uint16 | IfxCif_getCurrentIspFrameCount (void)
Function to query the current ISP frame count. More...
IFX_INLINE IfxCif_IspInformFieldInformation | IfxCif_getCurrentIspInformFieldInformation (void)
Function to query the current field information. More...
IFX_INLINE IfxCif_State | IfxCif_getCurrentIspInputFormatterState (void)
Function to query the current state of the ISP formatter. More...
IFX_INLINE IfxCif_IspCcirSequence | IfxCif_getIspCcirSequence (void)
Function to query the currently set CCIR sequence. More...
IFX_INLINE IfxCif_IspColorSpaceMatrixCrominanceClippingRange | IfxCif_getIspColorSpaceMatrixCrominanceClippingRange (void)
Function to query the clipping range of the crominance of the ISP output. More...
IFX_INLINE IfxCif_IspColorSpaceMatrixLuminanceClippingRange | IfxCif_getIspColorSpaceMatrixLuminanceClippingRange (void)
Function to query the clipping range of the luminance of the ISP output. More...
IFX_INLINE IfxCif_State | IfxCif_getIspFieldInvertState (void)
Function to query the state of field ID inversion. More...
IFX_INLINE IfxCif_IspFieldSelection | IfxCif_getIspFieldSelection (void)
Function to query the currently set field sample mode. More...
IFX_INLINE IfxCif_IspSyncPolarity | IfxCif_getIspHSyncPolarity (void)
Function to query the currently set polarity of the HSYNC signal. More...
IFX_INLINE IfxCif_State | IfxCif_getIspInputFormatterState (void)
Function to query the current state of the ISP input formatter. More...
IFX_INLINE IfxCif_IspInputInterface | IfxCif_getIspInputInterface (void)
Function to query the ISP input interface bit width. More...
IFX_INLINE uint16 | IfxCif_getIspInputPortSDataState (void)
Function to query the current value of the ISP input port s_data (for test purposes only) More...
IFX_INLINE IfxCif_State | IfxCif_getIspInputPortSVSyncState (void)
Function to query the current level of the ISP input port s_vsync (for test purposes only) More...
IFX_INLINE IfxCif_State | IfxCif_getIspMode (void)
Function to query the currently set ISP mode. More...
IFX_INLINE IfxCif_State | IfxCif_getIspOutputState (void)
Function to query the ISP output state. More...
IFX_INLINE IfxCif_IspSamplingEdge | IfxCif_getIspSamplingEdge (void)
Function to query the currently set ISP sampling edge. More...
IFX_INLINE IfxCif_State | IfxCif_getIspState (void)
Function to query the current state of the ISP. More...
IFX_INLINE IfxCif_IspSyncPolarity | IfxCif_getIspVSyncPolarity (void)
Function to query the currently set polarity of the VSYNC signal. More...
IFX_INLINE uint16 | IfxCif_getNumberOfAcquisitionFrames (void)
Function to query the number of acquisition frames. More...
IFX_INLINE void | IfxCif_setIspAcquisitionOffsets (uint16 hOffset, uint16 vOffset)
Function to set the ISP acquisition offsets. More...
IFX_INLINE void | IfxCif_setIspAcquisitionSizes (uint16 hSize, uint16 vSize)
Function to set the ISP acquisition sizes. More...
IFX_INLINE void | IfxCif_setIspCcirSequence (IfxCif_IspCcirSequence sequence)
Function to set the CCIR sequence. More...
IFX_INLINE void | IfxCif_setIspColorSpaceMatrixCrominanceClippingRange (IfxCif_IspColorSpaceMatrixCrominanceClippingRange clippingRange)
Function to set the clipping range of the crominance of the ISP output. More...
IFX_INLINE void | IfxCif_setIspColorSpaceMatrixLuminanceClippingRange (IfxCif_IspColorSpaceMatrixLuminanceClippingRange clippingRange)
Function to set the clipping range of the luminance of the ISP output. More...
IFX_INLINE void | IfxCif_setIspFieldInvertState (IfxCif_State fieldInvertState)
Function to enable or disable inversion of the field ID. More...
IFX_INLINE void | IfxCif_setIspFieldSelection (IfxCif_IspFieldSelection selection)
Function to select fields to sample. More...
IFX_INLINE void | IfxCif_setIspHSyncPolarity (IfxCif_IspSyncPolarity polarity)
Function to set the polarity of the HSYNC signal. More...
IFX_INLINE void | IfxCif_setIspInputFormatterState (IfxCif_State inputFormatterState)
Function to enable or disable the ISP input formatter. More...
IFX_INLINE void | IfxCif_setIspInputInterface (IfxCif_IspInputInterface input)
Function to set the ISP input interface bit width. More...
IFX_INLINE void | IfxCif_setIspMode (IfxCif_IspMode mode)
Function to set the ISP mode. More...
IFX_INLINE void | IfxCif_setIspOutputState (IfxCif_State ispOutputState)
Function to enable or disable the ISP output. More...
IFX_INLINE void | IfxCif_setIspOutputWindowOffsets (uint16 hOffset, uint16 vOffset)
Function to set the ISP output window offsets. More...
IFX_INLINE void | IfxCif_setIspPictureSizes (uint16 hSize, uint16 vSize)
Function to set the ISP picture sizes. More...
IFX_INLINE void | IfxCif_setIspSamplingEdge (IfxCif_IspSamplingEdge edge)
Function to set the ISP sampling edge. More...
IFX_INLINE void | IfxCif_setIspVSyncPolarity (IfxCif_IspSyncPolarity polarity)
Function to set the polarity of the VSYNC signal. More...
IFX_INLINE void | IfxCif_setNumberOfAcquisitionFrames (uint16 numberOfFrames)
Function to set the number of acquisition frames. More...
IFX_EXTERN void | IfxCif_clearIspError (IfxCif_IspErrorSources errorSource)
Function to clear the error status bit for an error source. More...
IFX_EXTERN void | IfxCif_clearIspInterrupt (IfxCif_IspInterruptSources interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN uint16 | IfxCif_getCurrentIspPictureOffset (IfxCif_ImageTiers tier)
Function to query the current ISP picture offset for one tier. More...
IFX_EXTERN uint16 | IfxCif_getCurrentIspPictureSize (IfxCif_ImageTiers tier)
Function to query the current ISP picture size for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspAcquisitionOffset (IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition offset of one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspAcquisitionSize (IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition size of one tier. More...
IFX_EXTERN IfxCif_ErrorState | IfxCif_getIspErrorState (IfxCif_IspErrorSources errorSource)
Function to query the error state of an error source. More...
IFX_EXTERN IfxCif_State | IfxCif_getIspInputSelectionAppendState (void)
Function to query the append state. More...
IFX_EXTERN IfxCif_State | IfxCif_getIspInterruptEnableState (IfxCif_IspInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN uint16 | IfxCif_getIspOutputWindowOffset (IfxCif_ImageTiers tier)
Function to query the currently set ISP output window offset for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspPictureSize (IfxCif_ImageTiers tier)
Function to query the currently set ISP picture size of one tier. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedIspInterruptTriggeredState (IfxCif_IspInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawIspInterruptTriggeredState (IfxCif_IspInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IFX_EXTERN void | IfxCif_setIspAcquisitionOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP acquisition offset of one tier. More...
IFX_EXTERN void | IfxCif_setIspAcquisitionSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the ISP acquisition size of one tier. More...
IFX_EXTERN void | IfxCif_setIspInputSelectionAppendState (IfxCif_State appendState)
Function to enable or disable appending of bits to the input signal. More...
IFX_EXTERN void | IfxCif_setIspInterruptEnableState (IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setIspInterruptRequestBit (IfxCif_IspInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setIspOutputWindowOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP output window offset for one tier. More...
IFX_EXTERN void | IfxCif_setIspPictureSize (IfxCif_ImageTiers tier, uint16 pictureSize)
Function to set the ISP picture size of one tier. More...
IFX_EXTERN IfxCif_State | IfxCif_getLinearDownscalerEnableState (IfxCif_ImageTiers tier)
Function to query the current state of the linear downscaler for one tier. More...
IFX_EXTERN uint8 | IfxCif_getLinearDownscalerScalingFactor (IfxCif_ImageTiers tier)
Function to query the currently set scaling factor of the linear downscaler of one tier. More...
IFX_EXTERN IfxCif_LinearDownscalerScalingMode | IfxCif_getLinearDownscalerScalingMode (IfxCif_ImageTiers tier)
Function to query the currently set scaling mode of one tier. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerEnableState (IfxCif_ImageTiers tier, IfxCif_State enableState)
Function to enable or disable the linear downscaler for one tier. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerScalingFactor (IfxCif_ImageTiers tier, uint8 factor)
Function to set the scaling factor of the linear downscaler of one tier. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerScalingFactors (uint8 horizFactor, uint8 vertFactor)
Function to set the scaling factors of the linear downscaler. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerScalingMode (IfxCif_ImageTiers tier, IfxCif_LinearDownscalerScalingMode mode)
Function to set the scaling mode of one tier. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerScalingModes (IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode)
Function to set the scaling mode of one tier. More...
IFX_INLINE void | IfxCif_generateMiImmediateConfigUpdateSignal (void)
Function to generate an immediate configuration update signal for the memory interface submodule. More...
IFX_INLINE IfxCif_State | IfxCif_getBaseAddressInitializationEnableState (void)
Function to query the enabled state of the update signal of the base address and buffer size shadow registers to the programmed register init values. More...
IFX_INLINE uint32 | IfxCif_getMiByteCount (void)
Function to query the number of JPEG or RAW data bytes of the last transmitted frame. More...
IFX_INLINE IfxCif_State | IfxCif_getMiByteSwapEnableState (void)
Function to query the current state of the change of byte order of the 32 bit output word. More...
IFX_INLINE IfxCif_MiBurstLength | IfxCif_getMiChrominanceBurstLength (void)
Function to query the currently set burst length for Cb and Cr data. More...
IFX_INLINE IfxCif_MiBurstLength | IfxCif_getMiLuminanceBurstLength (void)
Function to query the currently set burst length for Y, JPEG, or RAW data. More...
IFX_INLINE IfxCif_MiMainPictureWriteFormat | IfxCif_getMiMainPictureWriteFormat (void)
Function to query the currently set write format of the main picture path of the memory interface. More...
IFX_INLINE uint32 | IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset (void)
Function to query the filling level that triggers an interrupt of main picture path Y component. More...
IFX_INLINE uint32 | IfxCif_getMiMainPictureYInterruptOffset (void)
Function to query the filling level of the main picture Y component that triggers an interrupt. More...
IFX_INLINE IfxCif_State | IfxCif_getMiOffsetCounterInitializationEnableState (void)
Function to query the enabled state of the update signal of the offset counter shadow registers. More...
IFX_INLINE void | IfxCif_miSkipPicture (void)
Function to skip the current or next starting main data path picture. More...
IFX_INLINE void | IfxCif_setMiBaseAddressInitializationEnableState (IfxCif_State state)
Function to enable or disable the update of the base address and buffer size shadow registers to the programmed register init values (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port) More...
IFX_INLINE void | IfxCif_setMiByteSwapEnableState (IfxCif_State enableState)
Function to enable or disable the change of byte order of the 32 bit output word. More...
IFX_INLINE void | IfxCif_setMiChrominanceBurstLength (IfxCif_MiBurstLength burstLength)
Function to set the burst length for Cb and Cr data. More...
IFX_INLINE void | IfxCif_setMiMainPictureWriteFormat (IfxCif_MiMainPictureWriteFormat format)
Function to set the write format of the main picture path of the memory interface. More...
IFX_INLINE void | IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset (uint32 interruptOffset)
Function to set the filling level to trigger an interrupt for main picture path Y component. More...
IFX_INLINE void | IfxCif_setMiOffsetCounterInitializationEnableState (IfxCif_State state)
Function to enable or disable the update of the offset counter shadow registers (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port) More...
IFX_EXTERN void | IfxCif_clearMiInterrupt (IfxCif_MiInterruptSources interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN void | IfxCif_clearMiStatus (IfxCif_MiStatusClearSources source)
Function to clear the status information of one status clear source of the memory interface submodule. More...
IFX_EXTERN uint32 | IfxCif_getMainPictureComponentBaseInitAddress (IfxCif_MiMainPicturePathComponents component)
Function to query the initial base address of the ring buffer of one main picture path component. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedMiInterruptTriggeredState (IfxCif_MiInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IFX_EXTERN IfxCif_State | IfxCif_getMiDataPathInputEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface input. More...
IFX_EXTERN IfxCif_State | IfxCif_getMiDataPathOutputEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface output. More...
IFX_EXTERN IfxCif_State | IfxCif_getMiFeatureEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of a memory interface data path. More...
IFX_EXTERN IfxCif_State | IfxCif_getMiInterruptEnableState (IfxCif_MiInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentBaseAddress (IfxCif_MiMainPicturePathComponents component)
Function to query the current base address of the ring buffer of one main picture path component. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentInitSize (IfxCif_MiMainPicturePathComponents component)
Function to query the initial size of the ring buffer of one main picture path component. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentInitialOffsetCounter (IfxCif_MiMainPicturePathComponents component)
Function to query the initial offset counter inside the ring buffer of one main picture path compoent. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentOffsetCounter (IfxCif_MiMainPicturePathComponents component)
Function to query the current offset counter within the ring buffer of one main picture path component. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentOffsetCounterStart (IfxCif_MiMainPicturePathComponents component)
Function to query the offset counter which points to the start address of the previously processed picture for one main picture path component. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentSize (IfxCif_MiMainPicturePathComponents component)
Function to query the current size of the ring buffer of one main picture path component. More...
IFX_EXTERN IfxCif_ErrorState | IfxCif_getMiStatusInformation (IfxCif_MiStatusInformationSources source)
Function to query the status information of one status information source of the memory interface module. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawMiInterruptTriggeredState (IfxCif_MiInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IFX_EXTERN void | IfxCif_setMiFeatureEnableState (IfxCif_MiDataPaths dataPath, IfxCif_State enableState)
Function to enable or disable one memory interface data path. More...
IFX_EXTERN void | IfxCif_setMiInterruptEnableState (IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setMiInterruptRequestBit (IfxCif_MiInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setMiLuminanceBurstLength (IfxCif_MiBurstLength burstLength)
Function to set the burst length for Y, JPEG, or RAW data. More...
IFX_EXTERN void | IfxCif_setMiMainPictureComponentBaseInitAddress (IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address)
Function to set the initial base address of the ring buffer for one main picture path component. More...
IFX_EXTERN void | IfxCif_setMiMainPictureComponentInitSize (IfxCif_MiMainPicturePathComponents component, uint32 size)
Function to set the initial size of the ring buffer for one main picture path component. More...
IFX_EXTERN void | IfxCif_setMiMainPictureComponentInitialOffsetCounter (IfxCif_MiMainPicturePathComponents component, uint32 offsetCounter)
Function to set the initial offset counter inside the ring buffer for one main picture path component. More...
IFX_INLINE IfxCif_JpeHeaderGenerationMode | IfxCif_getJpeHeaderGenerationMode (void)
Function to query the current header generation debug control mode. More...
IFX_INLINE IfxCif_JpeHeaderMode | IfxCif_getJpeHeaderMode (void)
Function to query the currently set JPE header mode. More...
IFX_INLINE IfxCif_State | IfxCif_getJpeMode (void)
Function to query the JPE encode mode. More...
IFX_INLINE uint16 | IfxCif_getJpeRestartInterval (void)
Function to query the current restart interval. More...
IFX_INLINE IfxCif_JpeState | IfxCif_getJpeState (void)
Function to get the current JPEG codec state. More...
IFX_INLINE IfxCif_JpeTableId | IfxCif_getJpeTableId (void)
Function to query the current JPE Table ID. More...
IFX_INLINE IfxCif_JpegJfifStreamEncoderContinuousMode | IfxCif_getJpegJfifStreamEncoderContinuousMode (void)
Function to query the current encoder continuous mode. More...
IFX_INLINE IfxCif_JpegPictureEncodingFormat | IfxCif_getJpegPictureEncodingFormat (void)
Function to query the current picture encoding format. More...
IFX_INLINE void | IfxCif_initJpegEncoder (void)
Function to immediately start the JPEG encoder. This function has to be called after IfxCif_startJpegJfifStreamEncoder to start the JPEG encoder. More...
IFX_INLINE void | IfxCif_jpeGenerateHeader (void)
Function to start to generate JPEG stream header. Auto reset after one clock cycle. More...
IFX_INLINE void | IfxCif_setJpeHeaderGenerationMode (IfxCif_JpeHeaderGenerationMode headerGenerationMode)
Function to set the header generation debug control mode. More...
IFX_INLINE void | IfxCif_setJpeHeaderMode (IfxCif_JpeHeaderMode headerMode)
Function to set the JPE header mode. More...
IFX_INLINE void | IfxCif_setJpeRestartInterval (uint16 interval)
Function to set the restart interval. More...
IFX_INLINE void | IfxCif_setJpeTableDataLsb (uint8 data)
Function to set the JPE Table LSB. More...
IFX_INLINE void | IfxCif_setJpeTableDataMsb (uint8 data)
Function to set the JPE Table MSB. More...
IFX_INLINE void | IfxCif_setJpeTableId (IfxCif_JpeTableId tableId)
Function to set the JPE Table ID. More...
IFX_INLINE void | IfxCif_setJpegCodecImageSizes (uint16 hSize, uint16 vSize)
Function to set the JPEG codec image sizes. More...
IFX_INLINE void | IfxCif_setJpegJfifStreamEncoderContinuousMode (IfxCif_JpegJfifStreamEncoderContinuousMode mode)
Function to set the stream encoder continuous mode. More...
IFX_INLINE void | IfxCif_setJpegPictureEncodingFormat (IfxCif_JpegPictureEncodingFormat format)
Function to set the picture encoding format. More...
IFX_INLINE void | IfxCif_startJpegJfifStreamEncoder (void)
Function to start JFIF stream encoding. Auto reset after one clock cycle. More...
IFX_EXTERN void | IfxCif_clearJpeInterrupt (IfxCif_JpeInterruptSources interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN uint8 | IfxCif_getHuffmanAcTableLength (IfxCif_HuffmanTables table)
Function to query the currently set Huffman Table length for AC values. More...
IFX_EXTERN IfxCif_State | IfxCif_getHuffmanAcTableSelectorState (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for AC values. More...
IFX_EXTERN uint8 | IfxCif_getHuffmanDcTableLength (IfxCif_HuffmanTables table)
Function to query the current Huffman Table length for DC values. More...
IFX_EXTERN IfxCif_State | IfxCif_getHuffmanDcTableSelectorState (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for DC values. More...
IFX_EXTERN IfxCif_JpeDebugSignalState | IfxCif_getJpeDebugSignalState (IfxCif_JpeDebugSignalSources source)
Function to query the state of one JPE debug signal source. More...
IFX_EXTERN IfxCif_State | IfxCif_getJpeInterruptEnableState (IfxCif_JpeInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN IfxCif_JpeQTableSelector | IfxCif_getJpeQTableSelector (IfxCif_JpeQTableSelectorComponents component)
Function to query the currently selected Q-Table for one component. More...
IFX_EXTERN IfxCif_State | IfxCif_getJpeScalingEnableState (IfxCif_JpeScalingValueSources source)
Function to query the current enabled state of the scaling of an input value source. More...
IFX_EXTERN uint16 | IfxCif_getJpegCodecImageSize (IfxCif_ImageTiers tier)
Function to query the currently set JPEG codec image size of one tier. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedJpeInterruptTriggeredState (IfxCif_JpeInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawJpeInterruptTriggeredState (IfxCif_JpeInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IFX_EXTERN void | IfxCif_programJpeTable (IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length)
IFX_EXTERN void | IfxCif_setHuffmanAcTableLength (IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for AC values. More...
IFX_EXTERN void | IfxCif_setHuffmanAcTableSelector (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for AC Values. More...
IFX_EXTERN void | IfxCif_setHuffmanDcTableLength (IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for DC values. More...
IFX_EXTERN void | IfxCif_setHuffmanDcTableSelector (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for DC values. More...
IFX_EXTERN void | IfxCif_setJpeInterruptEnableState (IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setJpeInterruptRequestBit (IfxCif_JpeInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setJpeQTableSelector (IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector)
Function to set the Q-Table selector for one component. More...
IFX_EXTERN void | IfxCif_setJpeScalingEnableState (IfxCif_JpeScalingValueSources source, IfxCif_State scalingEnable)
Function to enable or disable scaling of one input value source. More...
IFX_EXTERN void | IfxCif_setJpegCodecImageSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the JPEG codec image size of one tier. More...
IFX_INLINE uint16 | IfxCif_getSecurityWatchdogCounterPredivider (void)
Function to query the currently set watchdog predivider. More...
IFX_INLINE IfxCif_State | IfxCif_getSecurityWatchdogEnableState (void)
Function to query the enabled state of the watchdog unit. More...
IFX_INLINE void | IfxCif_setSecurityWatchdogCounterPredivider (uint16 predivider)
Function to set the watchdog predivider counter (A value of 0 means that the Watchdog Counters are increased with every CIF clock cycle. Every other value N leads to an increment at every N+1th cycle) More...
IFX_INLINE void | IfxCif_setSecurityWatchdogEnableState (IfxCif_State enableState)
Function to enable or disable the watchdog unit. More...
IFX_EXTERN void | IfxCif_clearSecurityWatchdogInterrupt (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the masked state of an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawSecurityWatchdogInterruptTriggeredState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the raw state of an interrupt. More...
IFX_EXTERN IfxCif_State | IfxCif_getSecurityWatchdogInterruptEnableState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN uint16 | IfxCif_getSecurityWatchdogTimeout (IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter)
Function to query the current value of a timeout counter of one tier. More...
IFX_EXTERN void | IfxCif_resetSecurityWatchdogCounter (IfxCif_SecurityWatchdogCounters counter)
Function to reset one watchdog counter. More...
IFX_EXTERN void | IfxCif_setSecurityWatchdogInterruptEnableState (IfxCif_SecurityWatchdogInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setSecurityWatchdogInterruptRequestBit (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setSecurityWatchdogTimeout (IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter, uint16 timeout)
Function to set the timeout for a watchdog timeout counter of one tier. A value of 0 disables the timeout. More...
IFX_INLINE IfxCif_State | IfxCif_getIspisEnableState (void)
Function to query the enabled state of image stabilization. More...
IFX_INLINE uint8 | IfxCif_getIspisRecenterValue (void)
Function to query the current image stabilization recenter value. More...
IFX_INLINE void | IfxCif_setIspisEnableState (IfxCif_State enableState)
Function to enable or disable image stabilization. More...
IFX_INLINE void | IfxCif_setIspisOutputWindowOffsets (IfxCif_ImageTiers hOffset, uint16 vOffset)
Function to set the image stabilization offsets of the output window. More...
IFX_INLINE void | IfxCif_setIspisPictureSizes (uint16 hSize, uint16 vSize)
Function to set the picture size. More...
IFX_INLINE void | IfxCif_setIspisRecenterValue (uint8 value)
Function to set the image stabilization recenter value. More...
IFX_EXTERN uint16 | IfxCif_getIspisCameraDisplacement (IfxCif_ImageTiers tier)
Function to query the current camera displacement for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisCurrentPictureOffset (IfxCif_ImageTiers tier)
Function to query the offset of the current picture for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisCurrentPictureSize (IfxCif_ImageTiers tier)
Function to query the picture size of the current picture for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisMaximumDisplacement (IfxCif_ImageTiers tier)
Function to query the current maximum displacement for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisOffsetOutputWindow (IfxCif_ImageTiers tier)
Function to query the current image stabilization offset of the output window of one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisPictureSize (IfxCif_ImageTiers tier)
Function to query the current picture size for one tier. More...
IFX_EXTERN IfxCif_State | IfxCif_getIspisRecenterEnableState (void)
Function to query the enabled state of image stabilization recenter feature. More...
IFX_EXTERN void | IfxCif_setIspisCameraDisplacement (uint16 tier, uint16 displacement)
Function to set the camera displacement for one tier. More...
IFX_EXTERN void | IfxCif_setIspisMaximumDisplacement (IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement for one tier. More...
IFX_EXTERN void | IfxCif_setIspisOutputWindowOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the image stabilization offset of the output window of one tier. More...
IFX_EXTERN void | IfxCif_setIspisPictureSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the picture size for one tier. More...
IFX_EXTERN void | IfxCif_clearEpError (IfxCif_EpErrorClearSources source)
Function to clear one extra path error. More...
IFX_EXTERN void | IfxCif_clearEpInterrupt (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN void | IfxCif_epForceConfigurationUpdate (IfxCif_ExtraPath z)
Function to trigger an immediate configuration update for one extra path. More...
IFX_EXTERN void | IfxCif_epSkipPicture (IfxCif_ExtraPath z)
Function to skip one picture of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpBaseAddress (IfxCif_ExtraPath z)
Function to query the current base address of the ring buffer of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpBaseInitAddress (IfxCif_ExtraPath z)
Function to query the initial base address of the ring buffer of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingCameraDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping camera displacement of one tier of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingCurrentPictureOffset (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture offset of one tier of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingCurrentPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture size of one tier of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpCroppingEnableState (IfxCif_ExtraPath z)
Function to query the image cropping enabled state of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingMaximumDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the maximum displacement of one tier of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingOffsetOutputWindow (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping offset of the output window of one tier of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping picture size of one tier of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpCroppingRecenterState (IfxCif_ExtraPath z)
Function to query the enabled state of the recenter feature of one extra path. More...
IFX_EXTERN IfxCif_ErrorState | IfxCif_getEpErrorState (IfxCif_EpErrorSources source)
Function to query the state of an extra path error source. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpFeatureEnableState (IfxCif_ExtraPath z, IfxCif_EpFeatures feature)
Function to query the enabled state of one feature of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpInitSize (IfxCif_ExtraPath z)
Function to query the initial size of the ring buffer of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpInitialFillLevelInterruptOffset (IfxCif_ExtraPath z)
Function to query the initial filling level interrupt offset of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpInitialOffsetCounter (IfxCif_ExtraPath z)
Function to query the initial offset counter of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpInputEnableState (IfxCif_ExtraPath z)
Function to query the current input enable state of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpInterruptEnableState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN uint32 | IfxCif_getEpInterruptOffset (IfxCif_ExtraPath z)
Function to query the current interrupt offset of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpOffsetCounter (IfxCif_ExtraPath z)
Function to query the current offset counter of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpOffsetCounterStart (IfxCif_ExtraPath z)
Function to query the initial offset counter start value of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpOutputEnableState (IfxCif_ExtraPath z)
Function to query the current output enable state of one extra path. More...
IFX_EXTERN uint8 | IfxCif_getEpRecenterValue (IfxCif_ExtraPath z)
Function to query the current recenter value of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpSize (IfxCif_ExtraPath z)
Function to query the current ring buffer size of one extra path. More...
IFX_EXTERN IfxCif_EpWriteFormat | IfxCif_getEpWriteFormat (IfxCif_ExtraPath z)
Function to query the write format of one extra path. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedEpInterruptTriggeredState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to get the masked state of an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawEpInterruptTriggeredState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the raw state of an interrupt. More...
IFX_EXTERN void | IfxCif_setEpBaseInitAddress (IfxCif_ExtraPath z, Ifx_AddressValue baseAddress)
Function to set the initial base address of the ring buffer of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingCameraDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the image cropping camera displacement of one tier of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingEnableState (IfxCif_ExtraPath z, uint32 enableState)
Function to enable or disable image cropping of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingMaximumDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement of one tier of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingOffsetOutputWindow (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 offset)
Function to set the image cropping offset of the output window of one tier of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingOffsetsOutputWindow (IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset)
Function to set the image cropping offsets of the output window of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 size)
Function to set the image cropping picture size of one tier of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingPictureSizes (IfxCif_ExtraPath z, uint16 hSize, uint16 vSize)
Function to set the image cropping picture sizes one extra path. More...
IFX_EXTERN void | IfxCif_setEpFeatureEnableState (IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState)
Function to enable or disable one feature of one extra path. More...
IFX_EXTERN void | IfxCif_setEpInitSize (IfxCif_ExtraPath z, uint32 size)
Function to set the initial size of the ring buffer of one extra path. More...
IFX_EXTERN void | IfxCif_setEpInitialFillLevelInterruptOffset (uint32 z, uint32 interruptOffset)
Function to set the initial filling level interrupt offset of one extra path. More...
IFX_EXTERN void | IfxCif_setEpInitialOffsetCounter (IfxCif_ExtraPath z, uint32 offsetCounter)
Function to set the initial offset counter of one extra path. More...
IFX_EXTERN void | IfxCif_setEpInterruptEnableState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setEpInterruptRequestBit (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setEpOffsetCounterStart (uint32 z, uint32 offsetCounter)
Function to set the initial offset counter start value of one extra path. More...
IFX_EXTERN void | IfxCif_setEpRecenterValue (IfxCif_ExtraPath z, uint8 value)
Function to set the recenter value of one extra path (0 to switch the recenter feature off, for all other values recentering is active (cur_h/v_offs-H/V_OFFS)/2power(recenter)) More...
IFX_EXTERN void | IfxCif_setEpWriteFormat (IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat)
Function to set the write format for one extra path. More...
IFX_INLINE IfxCif_State | IfxCif_getDpEnableState (void)
Function to query the debug path enabled state. More...
IFX_INLINE IfxCif_DpSourcePath | IfxCif_getDpSourcePath (void)
Function to query the selected debug path source path. More...
IFX_INLINE void | IfxCif_setDpEnableState (IfxCif_State enableState)
Function to enable or disable the debug path. More...
IFX_INLINE void | IfxCif_setDpSourcePath (IfxCif_DpSourcePath sourcePath)
Function to select one debug path source path. More...
IFX_EXTERN void | IfxCif_dpResetCounter (IfxCif_DpCounters counter)
Function to reset one debug path counter. More...
IFX_EXTERN IfxCif_State | IfxCif_getDpControlEnableState (IfxCif_DpControlSources source)
Function to query the transmission enabled state of one debug path control source. More...
IFX_EXTERN uint32 | IfxCif_getDpCounter (IfxCif_DpCounters counter)
Function to query the current counter value of one debug path counter. More...
IFX_EXTERN uint16 | IfxCif_getDpUserDefinedSymbol (uint8 x)
Function to query the value of one user defined debug symbol. More...
IFX_EXTERN void | IfxCif_setDpControlEnableState (IfxCif_DpControlSources source, IfxCif_State enableState)
Function to enable or disable transmission of one debug path control source. More...
IFX_EXTERN void | IfxCif_setDpCounter (IfxCif_DpCounters counter, uint32 counterValue)
Function to set one debug path counter to a counter value. More...
IFX_EXTERN void | IfxCif_setDpUserDefinedSymbol (uint8 x, uint16 value)
Function to set one user defined debug symbol. More...

Detailed Description

CIF basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCif.h.


iLLD_TC26B: CPU

Modules | Files
CPU
iLLD
Collaboration diagram for CPU:

Modules

Implementation
Standard Driver
Core Startup Functions
Interrupt Functions
Trap Functions

Files

file | IfxCpu_cfg.h
CPU on-chip implementation data.
file | IfxCpu.h
CPU basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » CPU
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » CPU
Collaboration diagram for Standard Driver:

Modules

Cpu Core Functions
Interrupt Utility Functions
Cache Management Functions
Performance Counter Functions
Synchronization Functions
Cpu Utility Functions
Enumerations
Data Structures
Intrinsics

Detailed Description


iLLD_TC26B: Cpu Core Functions

Functions
Cpu Core Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Cpu Core Functions:

Functions

IFX_INLINE Ifx_CPU * | IfxCpu_getAddress (IfxCpu_ResourceCpu cpu)
API to get the address for CPU HW module register memory map. More...
IFX_INLINE IfxCpu_Id | IfxCpu_getCoreId (void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu's may not be continguous and shouldn't be used to index cpu. Use IfxCpu_getCoreIndex() to get cpu no. More...
IFX_INLINE IfxCpu_ResourceCpu | IfxCpu_getCoreIndex (void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed. More...
IFX_INLINE void | IfxCpu_initCSA (uint32 *csaBegin, uint32 *csaEnd)
API to initialize the context save area of the CPU where this is called. More...
IFX_INLINE void | IfxCpu_setSafetyTaskIdentifier (boolean safetyId)
Set/Clear safety task identifier (PSW.S) on current CPU. More...
IFX_INLINE void | IfxCpu_triggerSwReset (void)
Triggers Software Reset. More...
IFX_EXTERN IfxCpu_CoreMode | IfxCpu_getCoreMode (Ifx_CPU *cpu)
API to get current mode of CPU. More...
IFX_EXTERN IfxCpu_ResourceCpu | IfxCpu_getIndex (Ifx_CPU *cpu)
API to get current mode of CPU. More...
IFX_EXTERN boolean | IfxCpu_setCoreMode (Ifx_CPU *cpu, IfxCpu_CoreMode mode)
API to set mode of the CPU. More...
IFX_EXTERN boolean | IfxCpu_setProgramCounter (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified. More...
IFX_EXTERN boolean | IfxCpu_startCore (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified and start the CPU. More...

Detailed Description

Function Documentation

◆ IfxCpu_getAddress()

IFX_INLINE Ifx_CPU * IfxCpu_getAddress ( IfxCpu_ResourceCpu cpu )

API to get the address for CPU HW module register memory map.

Parameters
cpu Resource index of the CPU
Returns
CPU module register address

Definition at line 741 of file IfxCpu.h.

Referenced by IfxCpu_setProgramCounter().

◆ IfxCpu_getCoreId()

IFX_INLINE IfxCpu_Id IfxCpu_getCoreId ( void )

API to get core id of the CPU of the caller. Caution: Core id of the cpu's may not be continguous and shouldn't be used to index cpu. Use IfxCpu_getCoreIndex() to get cpu no.

Returns
Resource index of the CPU.

Definition at line 770 of file IfxCpu.h.

Referenced by IfxCpu_Trap_extractTrapInfo(), IfxEth_RxDescr_setBuffer(), IfxEth_setReceiveBuffer1RingMode(), IfxEth_setReceiveBuffer2RingMode(), IfxEth_setTransmitBuffer1RingMode(), IfxEth_setTransmitBuffer2RingMode(), IfxEth_TxDescr_setBuffer(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxCpu_getCoreIndex()

IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex ( void )

API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed.

Returns
Resource index of the CPU.

Definition at line 778 of file IfxCpu.h.

Referenced by IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_getCoreMode(), IfxCpu_setCoreMode(), IfxCpu_setDataCache(), IfxCpu_setProgramCache(), IfxCpu_setProgramCounter(), IfxScuWdt_changeCpuWatchdogPassword(), IfxScuWdt_changeCpuWatchdogReload(), IfxScuWdt_clearCpuEndinit(), IfxScuWdt_disableCpuWatchdog(), IfxScuWdt_enableCpuWatchdog(), IfxScuWdt_getCpuWatchdogEndInit(), IfxScuWdt_getCpuWatchdogPassword(), and IfxScuWdt_setCpuEndinit().

◆ IfxCpu_getCoreMode()

IFX_EXTERN IfxCpu_CoreMode IfxCpu_getCoreMode ( Ifx_CPU * cpu )

API to get current mode of CPU.

Parameters
cpu Pointer to the CPU HW module (register memory map)
Returns
Current mode of the CPU

Definition at line 74 of file IfxCpu.c.

Referenced by IfxCpu_startCore().

◆ IfxCpu_getIndex()

IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex ( Ifx_CPU * cpu )

API to get current mode of CPU.

Parameters
cpu Pointer to the CPU HW module (register memory map)
Returns
Resource index of the CPU

Definition at line 128 of file IfxCpu.c.

Referenced by IfxCpu_getCoreMode(), and IfxCpu_setCoreMode().

◆ IfxCpu_initCSA()

IFX_INLINE void IfxCpu_initCSA | ( | uint32 * | csaBegin,
 |  | uint32 * | csaEnd
 | ) |  |

API to initialize the context save area of the CPU where this is called.

This API can initialize the CSA of the host CPU where this API is called. This API shall not be used to initialize the CSA of another CPU

Parameters
csaBegin | Pointer to start of context save area
csaEnd | Pointer to end of context save area
Returns
None

Definition at line 856 of file IfxCpu.h.

Referenced by _Core0_start(), and _Core1_start().

◆ IfxCpu_setCoreMode()

IFX_EXTERN boolean IfxCpu_setCoreMode | ( | Ifx_CPU * | cpu,
 |  | IfxCpu_CoreMode | mode
 | ) |  |

API to set mode of the CPU.

Parameters
cpu | Pointer to the CPU HW module (register memory map)
mode | CPU mode to be set by this API
Returns
Success status of the activity (setting the core mode).
Return values
TRUE | If the activity successfully be performed.
FALSE | If the activity can't be performed.

Definition at line 223 of file IfxCpu.c.

Referenced by _Core0_start(), and IfxCpu_startCore().

◆ IfxCpu_setProgramCounter()

IFX_EXTERN boolean IfxCpu_setProgramCounter | ( | Ifx_CPU * | cpu,
 |  | uint32 | programCounter
 | ) |  |

API to set the program counter for the CPU specified.

Parameters
cpu | Pointer to the CPU HW module (register memory map)
programCounter | Program counter value to be set
Returns
success status of the activity (setting program counter value).
Return values
TRUE | If the activity successfully be performed.
FALSE | If the activity can't be performed

Definition at line 262 of file IfxCpu.c.

Referenced by IfxCpu_startCore().

◆ IfxCpu_setSafetyTaskIdentifier()

IFX_INLINE void IfxCpu_setSafetyTaskIdentifier ( boolean safetyId )

Set/Clear safety task identifier (PSW.S) on current CPU.

Returns
None

Definition at line 995 of file IfxCpu.h.

◆ IfxCpu_startCore()

IFX_EXTERN boolean IfxCpu_startCore | ( | Ifx_CPU * | cpu,
 |  | uint32 | programCounter
 | ) |  |

API to set the program counter for the CPU specified and start the CPU.

Parameters
cpu | Pointer to the CPU HW module (register memory map)
programCounter | Program counter value to start the CPU
Returns
success status of the activity (setting program counter value).
Return values
TRUE | If the activity successfully be performed.
FALSE | If the activity can't be performed

Definition at line 307 of file IfxCpu.c.

Referenced by _Core0_start().

◆ IfxCpu_triggerSwReset()

IFX_INLINE void IfxCpu_triggerSwReset ( void )

Triggers Software Reset.

Returns
None

Definition at line 1043 of file IfxCpu.h.


iLLD_TC26B: Interrupt Utility Functions

Macros | Functions
Interrupt Utility Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Interrupt Utility Functions:

Macros

#define IFX_INTERRUPT(isr, vectabNum, prio)
Macro to define Interrupt Service Routine. This macro makes following definitions:
1) Define linker section as .intvec_tc<vector number>_<interrupt priority>.
2) define compiler specific attribute for the interrupt functions.
3) define the Interrupt service routine as Isr function.
To get details about usage of this macro, refer How to define Interrupts?. More...

Functions

IFX_INLINE boolean | IfxCpu_areInterruptsEnabled (void)
API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API provides the status of CPU where this API is called. More...
IFX_INLINE boolean | IfxCpu_disableInterrupts (void)
API to disable global interrupt and return the previous status. More...
IFX_INLINE void | IfxCpu_enableInterrupts (void)
API to enable global interrupt. This API simply enables the global interrupt. More...
IFX_INLINE void | IfxCpu_forceDisableInterrupts (void)
Disable the Global Interrupt. More...
IFX_INLINE void | IfxCpu_restoreInterrupts (boolean enabled)
API to restore global interrupt with that of the passed parameter. More...

Detailed Description

Macro Definition Documentation

◆ IFX_INTERRUPT

#define IFX_INTERRUPT | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) |

Macro to define Interrupt Service Routine. This macro makes following definitions:
1) Define linker section as .intvec_tc<vector number>_<interrupt priority>.
2) define compiler specific attribute for the interrupt functions.
3) define the Interrupt service routine as Isr function.
To get details about usage of this macro, refer How to define Interrupts?.

Parameters
isr | Name of the Isr function.
vectabNum | Vector table number.
prio | Interrupt priority. Refer Usage of Interrupt Macro for more details.

Definition at line 108 of file Compilers.h.

Function Documentation

◆ IfxCpu_areInterruptsEnabled()

IFX_INLINE boolean IfxCpu_areInterruptsEnabled ( void )

API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API provides the status of CPU where this API is called.

Returns
Status of global interrupt enable bit.
Return values
TRUE | Global interrupts enabled.
FALSE | Global interrupts disabled

Definition at line 648 of file IfxCpu.h.

Referenced by areInterruptsEnabled(), IfxCpu_disableInterrupts(), and IfxQspi_SpiMaster_write().

◆ IfxCpu_disableInterrupts()

IFX_INLINE boolean IfxCpu_disableInterrupts ( void )

API to disable global interrupt and return the previous status.

This API can be used only to disable the global interrupts of caller CPU. It cannot be used for this activity towards other CPUs

Returns
Previous status of global interrupt enable bit.
Return values
TRUE | Previously, global interrupts enabled.
FALSE | Previously, global interrupts disabled

Definition at line 656 of file IfxCpu.h.

Referenced by disableInterrupts(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_clear(), IfxAsclin_Spi_write(), IfxGtm_Tim_In_getDutyPercent(), IfxI2c_I2c_read(), IfxI2c_I2c_write(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_write(), IfxStm_now(), and IfxStm_Timer_run().

◆ IfxCpu_enableInterrupts()

IFX_INLINE void IfxCpu_enableInterrupts ( void )

API to enable global interrupt. This API simply enables the global interrupt.

Returns
None

Definition at line 666 of file IfxCpu.h.

Referenced by enableInterrupts().

◆ IfxCpu_forceDisableInterrupts()

IFX_INLINE void IfxCpu_forceDisableInterrupts ( void )

Disable the Global Interrupt.

Returns
None

Definition at line 734 of file IfxCpu.h.

Referenced by forceDisableInterrupts().

◆ IfxCpu_restoreInterrupts()

IFX_INLINE void IfxCpu_restoreInterrupts ( boolean enabled )

API to restore global interrupt with that of the passed parameter.

This API can be used only to disable the global interrupts of caller CPU. It cannot be used for this activity towards other CPUs

Parameters
enabled Previous status of the global interrupt enable bit
Returns
None

Definition at line 933 of file IfxCpu.h.

Referenced by Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_clear(), IfxAsclin_Spi_write(), IfxGtm_Tim_In_getDutyPercent(), IfxI2c_I2c_read(), IfxI2c_I2c_write(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_write(), IfxStm_now(), IfxStm_Timer_run(), and restoreInterrupts().


iLLD_TC26B: Cache Management Functions

Functions
Cache Management Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Cache Management Functions:

Functions

IFX_INLINE void | IfxCpu_enableSegmentSpecificDataAccessCacheability (uint16 segmentNumberMask, boolean enable)
API to enable/ disable the data cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before. More...
IFX_INLINE void | IfxCpu_enableSegmentSpecificInstructionAccessCacheability (uint16 segmentNumberMask, boolean enable)
API to enable/ disable the instruction cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before. More...
IFX_INLINE void | IfxCpu_invalidateProgramCache (void)
API to invalidate the program cache. More...
IFX_INLINE boolean | IfxCpu_isAddressCachable (void *address)
API to determine if an address is in a cachable or non-cachable Flash/LMU section. More...
IFX_INLINE void | IfxCpu_setDataCache (boolean enable)
API to enable or bypass the data cache for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_setProgramCache (boolean enable)
API to enable or bypass the program cache for the CPU which calls this API. More...

Detailed Description

Function Documentation

◆ IfxCpu_enableSegmentSpecificDataAccessCacheability()

IFX_INLINE void IfxCpu_enableSegmentSpecificDataAccessCacheability | ( | uint16 | segmentNumberMask,
 |  | boolean | enable
 | ) |  |

API to enable/ disable the data cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before.

Parameters
segmentNumberMask | Mask where bitfield 0 represents segment 0 and bitfield 16 represent segment F.
enable | TRUE: to enable the cacheability for selected segment, FALSE: to disable.
Returns
None

Definition at line 672 of file IfxCpu.h.

◆ IfxCpu_enableSegmentSpecificInstructionAccessCacheability()

IFX_INLINE void IfxCpu_enableSegmentSpecificInstructionAccessCacheability | ( | uint16 | segmentNumberMask,
 |  | boolean | enable
 | ) |  |

API to enable/ disable the instruction cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before.

Parameters
segmentNumberMask | Mask where bitfield 0 represents segment 0 and bitfield 16 represent segment F.
enable | TRUE: to enable the cacheability for selected segment, FALSE: to disable.
Returns
None

Definition at line 703 of file IfxCpu.h.

◆ IfxCpu_invalidateProgramCache()

IFX_INLINE void IfxCpu_invalidateProgramCache ( void )

API to invalidate the program cache.

Returns
None

Definition at line 890 of file IfxCpu.h.

◆ IfxCpu_isAddressCachable()

IFX_INLINE boolean IfxCpu_isAddressCachable ( void * address )

API to determine if an address is in a cachable or non-cachable Flash/LMU section.

Parameters
address Address
Returns
Status TRUE/FALSE

Definition at line 904 of file IfxCpu.h.

◆ IfxCpu_setDataCache()

IFX_INLINE void IfxCpu_setDataCache ( boolean enable )

API to enable or bypass the data cache for the CPU which calls this API.

This API can be used only to enable or bypass the data cache of caller CPU. It cannot be used for this activity towards other CPUs

Parameters
enable Command to enable or bypass the data cache TRUE: Enable the data cache. FALSE: Bypass the data cache.
Returns
None

Definition at line 942 of file IfxCpu.h.

Referenced by _Core0_start(), and _Core1_start().

◆ IfxCpu_setProgramCache()

IFX_INLINE void IfxCpu_setProgramCache ( boolean enable )

API to enable or bypass the program cache for the CPU which calls this API.

This API can be used only to enable or bypass the program cache of caller CPU. It cannot be used for this activity towards other CPUs

Parameters
enable Command to enable or bypass the program cache. TRUE: Enable the program cache. FALSE: Bypass the program cache
Returns
None

Definition at line 969 of file IfxCpu.h.

Referenced by _Core0_start(), and _Core1_start().


iLLD_TC26B: Performance Counter Functions

Functions
Performance Counter Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Performance Counter Functions:

Functions

IFX_INLINE uint32 | IfxCpu_getClockCounter (void)
API to read the clock counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getClockCounterStickyOverflow (void)
API to get sticky overflow bit of clock counter for the CPU, which calls this API. More...
IFX_INLINE uint32 | IfxCpu_getInstructionCounter (void)
API to read the instruction counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getInstructionCounterStickyOverflow (void)
API to get sticky overflow bit of Instruction counter for the CPU, which calls this API. More...
IFX_INLINE uint32 | IfxCpu_getPerformanceCounter (uint16 address)
API to read the performance counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getPerformanceCounterStickyOverflow (uint16 address)
API to get sticky overflow bit of performance counter for the CPU, which calls this API. This is generic function to get sticky overflow bit of any performance counters. More...
IFX_INLINE void | IfxCpu_resetAndStartCounters (IfxCpu_CounterMode mode)
Reset and start instruction, clock and multi counters. More...
IFX_INLINE void | IfxCpu_setPerformanceCountersEnableBit (uint32 enable)
API to enable or disable performance counter for the CPU which calls this API. More...
IFX_INLINE IfxCpu_Perf | IfxCpu_stopCounters (void)
Stop instruction and clock counters, return their values. More...
IFX_INLINE void | IfxCpu_updateClockCounter (uint32 count)
API to update clock counter for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_updateInstructionCounter (uint32 count)
API to update Instruction counter for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_updatePerformanceCounter (uint32 address, uint32 count)
API to update performance counter for the CPU which calls this API. This is generic function to update any of the performance counters. More...

Detailed Description

Function Documentation

◆ IfxCpu_getClockCounter()

IFX_INLINE uint32 IfxCpu_getClockCounter ( void )

API to read the clock counter for the CPU which calls this API.

This API can be used to read clock counter of only the caller CPU. It cannot be used for this activity towards other CPUs.

Returns
Counter value. 0 to 0x7FFFFFFF.

Definition at line 758 of file IfxCpu.h.

◆ IfxCpu_getClockCounterStickyOverflow()

IFX_INLINE boolean IfxCpu_getClockCounterStickyOverflow ( void )

API to get sticky overflow bit of clock counter for the CPU, which calls this API.

This API can be used to get sticky overflow bit of clock counter of only the caller CPU. It cannot be used for this activity towards other CPUs. This API also clears the sticky overflow after the read. While reading the sticky bit this API disables the counter for short time. (otherwise sticky bit cannot be cleared). This API shall be used after reading the counter

Returns
Status of sticky overflow bit.
Return values
TRUE | Sticky overflow bit is set.
FALSE | Sticky overflow bit is reset

Definition at line 764 of file IfxCpu.h.

◆ IfxCpu_getInstructionCounter()

IFX_INLINE uint32 IfxCpu_getInstructionCounter ( void )

API to read the instruction counter for the CPU which calls this API.

This API can be used to read instruction counter of only the caller CPU. It cannot be used for this activity towards other CPUs

Returns
Counter value. 0 to 0x7FFFFFFF.

Definition at line 786 of file IfxCpu.h.

◆ IfxCpu_getInstructionCounterStickyOverflow()

IFX_INLINE boolean IfxCpu_getInstructionCounterStickyOverflow ( void )

API to get sticky overflow bit of Instruction counter for the CPU, which calls this API.

This API can be used to get sticky overflow bit of Instruction counter of only the caller CPU. It cannot be used for this activity towards other CPUs. This API also clears the sticky overflow after the read. While reading the sticky bit this API disables the counter for short time. (otherwise sticky bit cannot be cleared). This API shall be used after reading the counter

Returns
Status of sticky overflow bit.
Return values
TRUE | Sticky overflow bit is set.
FALSE | Sticky overflow bit is reset

Definition at line 792 of file IfxCpu.h.

◆ IfxCpu_getPerformanceCounter()

IFX_INLINE uint32 IfxCpu_getPerformanceCounter ( uint16 address )

API to read the performance counter for the CPU which calls this API.

Parameters
address Address
Returns
counter value

Definition at line 798 of file IfxCpu.h.

Referenced by IfxCpu_getClockCounter(), and IfxCpu_getInstructionCounter().

◆ IfxCpu_getPerformanceCounterStickyOverflow()

IFX_INLINE boolean IfxCpu_getPerformanceCounterStickyOverflow ( uint16 address )

API to get sticky overflow bit of performance counter for the CPU, which calls this API. This is generic function to get sticky overflow bit of any performance counters.

Parameters
address Address
Returns
Status

Definition at line 827 of file IfxCpu.h.

Referenced by IfxCpu_getClockCounterStickyOverflow(), and IfxCpu_getInstructionCounterStickyOverflow().

◆ IfxCpu_resetAndStartCounters()

IFX_INLINE void IfxCpu_resetAndStartCounters ( IfxCpu_CounterMode mode )

Reset and start instruction, clock and multi counters.

Reset and start CCNT, ICNT, M1CNT, M2CNT, M3CNT. the overflow bits are cleared.

Parameters
mode Counter mode
Returns
None

Definition at line 911 of file IfxCpu.h.

◆ IfxCpu_setPerformanceCountersEnableBit()

IFX_INLINE void IfxCpu_setPerformanceCountersEnableBit ( uint32 enable )

API to enable or disable performance counter for the CPU which calls this API.

This API can be used to enable or disable performance counter of only the caller CPU. It cannot be used for this activity towards other CPUs.

Parameters
enable enable Command to enable or disable the performance counter. TRUE: Enable the performance counter. FALSE: Disable the performance counter
Returns
None

Definition at line 960 of file IfxCpu.h.

◆ IfxCpu_stopCounters()

IFX_INLINE IfxCpu_Perf IfxCpu_stopCounters ( void )

Stop instruction and clock counters, return their values.

Stop CCNT, ICNT, M1CNT, M2CNT, M3CNT and return their values; The CCTRL is reset to 0, for more accurate measurements and has to be initialized again before strating the next performance measurement.

Returns
Performance counter result

Definition at line 1006 of file IfxCpu.h.

◆ IfxCpu_updateClockCounter()

IFX_INLINE void IfxCpu_updateClockCounter ( uint32 count )

API to update clock counter for the CPU which calls this API.

This API can be used to update clock counter of only the caller CPU. It cannot be used for this activity towards other CPUs.

Parameters
count Counter value to be updated. 0 to 0x7FFFFFFF
Returns
None

Definition at line 1053 of file IfxCpu.h.

◆ IfxCpu_updateInstructionCounter()

IFX_INLINE void IfxCpu_updateInstructionCounter ( uint32 count )

API to update Instruction counter for the CPU which calls this API.

This API can be used to update Instruction counter of only the caller CPU. It cannot be used for this activity towards other CPUs.

Parameters
count Counter value to be updated. 0 to 0x7FFFFFFF
Returns
None

Definition at line 1059 of file IfxCpu.h.

◆ IfxCpu_updatePerformanceCounter()

IFX_INLINE void IfxCpu_updatePerformanceCounter | ( | uint32 | address,
 |  | uint32 | count
 | ) |  |

API to update performance counter for the CPU which calls this API. This is generic function to update any of the performance counters.

Parameters
address | Address
count | Count
Returns
None

Definition at line 1065 of file IfxCpu.h.

Referenced by IfxCpu_updateClockCounter(), and IfxCpu_updateInstructionCounter().


iLLD_TC26B: Synchronization Functions

Functions
Synchronization Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Synchronization Functions:

Functions

IFX_EXTERN boolean | IfxCpu_acquireMutex (IfxCpu_mutexLock *lock)
API to acquire the mutex (binary semaphore). More...
IFX_EXTERN void | IfxCpu_releaseMutex (IfxCpu_mutexLock *lock)
API to unlock the mutex . More...
IFX_EXTERN void | IfxCpu_resetSpinLock (IfxCpu_spinLock *lock)
API to unlock the resource . More...
IFX_EXTERN boolean | IfxCpu_setSpinLock (IfxCpu_spinLock *lock, uint32 timeoutCount)
API to lock the resource in spin mode with the given timeout. More...

Detailed Description

Function Documentation

◆ IfxCpu_acquireMutex()

IFX_EXTERN boolean IfxCpu_acquireMutex ( IfxCpu_mutexLock * lock )

API to acquire the mutex (binary semaphore).

This API can be used to acquire/get the mutex.

Parameters
lock lock pointer
Returns
TRUE : lock acquired successfully. FALSE: Failed to acquire the lock
IfxCpu_mutexLock resourceLock;
boolean flag = IfxCpu_acquireMutex(&resourceLock);
if (flag){
// critical section
IfxCpu_releaseMutex(&resourceLock);
}

Definition at line 53 of file IfxCpu.c.

◆ IfxCpu_releaseMutex()

IFX_EXTERN void IfxCpu_releaseMutex ( IfxCpu_mutexLock * lock )

API to unlock the mutex .

This API can be used to unlock the previously acquired mutex

Parameters
lock lock pointer
Returns
None
IfxCpu_mutexLock resourceLock;
boolean flag = IfxCpu_acquireMutex(&resourceLock);
if (flag){
// critical section
IfxCpu_releaseMutex(&resourceLock);
}

Definition at line 209 of file IfxCpu.c.

◆ IfxCpu_resetSpinLock()

IFX_EXTERN void IfxCpu_resetSpinLock ( IfxCpu_spinLock * lock )

API to unlock the resource .

This API can be used to unlock the previously acquired lock

Parameters
lock lock pointer
Returns
None

Definition at line 216 of file IfxCpu.c.

◆ IfxCpu_setSpinLock()

IFX_EXTERN boolean IfxCpu_setSpinLock | ( | IfxCpu_spinLock * | lock,
 |  | uint32 | timeoutCount
 | ) |  |

API to lock the resource in spin mode with the given timeout.

This API can be used to spin lock for the lock for the given timeout period.

Parameters
lock | lock pointer
timeoutCount | loop counter value used for timeout to acquire lock
Returns
TRUE : lock acquired successfully. FALSE: Failed to acquire the lock
IfxCpu_spinLock resourceLock;
boolean flag = IfxCpu_setSpinLock(&resourceLock, 0xFFFF);
if (flag){
// critical section
IfxCpu_resetSpinLock(&resourceLock);
}

Definition at line 279 of file IfxCpu.c.


iLLD_TC26B: Cpu Utility Functions

Functions
Cpu Utility Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Cpu Utility Functions:

Functions

IFX_EXTERN uint32 | IfxCpu_getRandomValue (uint32 *seed)
API to get random value. More...
IFX_EXTERN uint32 | IfxCpu_getRandomValueWithinRange (uint32 *seed, uint32 min, uint32 max)
API to get random value with in the range. More...
IFX_EXTERN boolean | IfxCpu_waitEvent (IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation. More...
IFX_EXTERN void | IfxCpu_emitEvent (IfxCpu_syncEvent *event)
This function sets a bit corresponding to the core in the event. More...

Detailed Description

Function Documentation

◆ IfxCpu_emitEvent()

IFX_EXTERN void IfxCpu_emitEvent ( IfxCpu_syncEvent * event )

This function sets a bit corresponding to the core in the event.

Parameters
event Synchronous Event
Returns
None

A coding example can be found in IfxCpu_waitEvent

Definition at line 356 of file IfxCpu.c.

◆ IfxCpu_getRandomValue()

IFX_EXTERN uint32 IfxCpu_getRandomValue ( uint32 * seed )

API to get random value.

Parameters
seed Pointer to seed value
Returns
random value

Definition at line 147 of file IfxCpu.c.

Referenced by IfxCpu_getRandomValueWithinRange().

◆ IfxCpu_getRandomValueWithinRange()

IFX_EXTERN uint32 IfxCpu_getRandomValueWithinRange | ( | uint32 * | seed,
 |  | uint32 | min,
 |  | uint32 | max
 | ) |  |

API to get random value with in the range.

Parameters
seed | Pointer to seed value
min | minimum range value
max | maximum range value
Returns
random value

Definition at line 186 of file IfxCpu.c.

◆ IfxCpu_waitEvent()

IFX_EXTERN boolean IfxCpu_waitEvent | ( | IfxCpu_syncEvent * | event,
 |  | uint32 | timeoutMilliSec
 | ) |  |

This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation.

e.g:

  1. Check for synchronisation between core 0 and core 5

    define 0x41U

  1. Check for synchronisation between core 0 to core 5

    define 0x5FU

Note: Core id values read from CORE_ID register will be as shown below. The value indicates the position of the bit needs to be set while building the macro. Core 0: 0 Core 1: 1 Core 2: 2 Core 3: 3 Core 4: 4 Core 5: 6

Parameters
event | Synchronous Event
timeoutMilliSec | timeout in millisec
Returns
Error condition

The functions IfxCpu_waitEvent and IfxCpu_emitEvent are used to achieve synchronisation between all cores (i.e individual cores wait till all cores have reached the synchronisation point). The IfxCpu_waitEvent returns 1 incase a timeout occurs.

// Global variable. preferably located in shared memory.
IfxCpu_syncEvent event;
boolean errorVal;
// Below code should be repeated in Each core
// Upon reaching Synchonisation point
IfxCpu_emitEvent(&event);
errorVal = IfxCpu_waitEvent(&event, timeoutMilliSec); // timeoutMilliSec is timeout value to wait

Definition at line 325 of file IfxCpu.c.


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » CPU » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxCpu_CoreMode {
IfxCpu_CoreMode_halt,
IfxCpu_CoreMode_run,
IfxCpu_CoreMode_idle,
IfxCpu_CoreMode_sleep,
IfxCpu_CoreMode_stby,
IfxCpu_CoreMode_unknown
}
Enumeration for the Cpu mode. More...
enum IfxCpu_CounterMode {
IfxCpu_CounterMode_normal = 0,
IfxCpu_CounterMode_task = 1
}
Performance conunter modes. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCpu_CoreMode

enum IfxCpu_CoreMode

Enumeration for the Cpu mode.

Enumerator
IfxCpu_CoreMode_halt
IfxCpu_CoreMode_run
IfxCpu_CoreMode_idle
IfxCpu_CoreMode_sleep
IfxCpu_CoreMode_stby
IfxCpu_CoreMode_unknown

Definition at line 129 of file IfxCpu.h.

◆ IfxCpu_CounterMode

enum IfxCpu_CounterMode

Performance conunter modes.

Enumerator
IfxCpu_CounterMode_normal | Normal counter mode:the counter increments on their respective triggers.
IfxCpu_CounterMode_task | Normal counter mode:additional gating control from the debug unit which allows the data gathered in the performance counters to be filtered by some specific criteria.

Definition at line 141 of file IfxCpu.h.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » CPU » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCpu_Counter
counter More...
struct | IfxCpu_Perf
Performance counter result. More...

Detailed Description

Data Structure Documentation

◆ IfxCpu_Counter

struct IfxCpu_Counter

counter

Definition at line 157 of file IfxCpu.h.

Data Fields
uint32 | counter | Counter value.
boolean | overlfow | sticky overlfow

◆ IfxCpu_Perf

struct IfxCpu_Perf

Performance counter result.

Definition at line 169 of file IfxCpu.h.

Collaboration diagram for IfxCpu_Perf:
[legend]
Data Fields
IfxCpu_Counter | clock | CPU clock counter.
IfxCpu_Counter | counter1 | Multi counter 1.
IfxCpu_Counter | counter2 | Multi counter 2.
IfxCpu_Counter | counter3 | Multi counter 3.
IfxCpu_Counter | instruction | Instruction counter.


iLLD_TC26B: Intrinsics

Modules | Files
Intrinsics
iLLD » CPU » Standard Driver
Collaboration diagram for Intrinsics:

Modules

intrinsics for DCC compiler
Intrinsics for GNU compiler
Intrinsics for GNU compiler
Intrinsics for TASKING compiler

Files

file IfxCpu_Intrinsics.h

Detailed Description


iLLD_TC26B: intrinsics for DCC compiler

Modules
intrinsics for DCC compiler
iLLD » CPU » Standard Driver » Intrinsics
Collaboration diagram for intrinsics for DCC compiler:

Modules

Minimum and Maximum of (Short) Integers
Cross type arithmetic operation
Floating point operation
Fractional Arithmetic Support
Insert / Extract Bit-fields and Bits
Interrupt Handling
Miscellaneous Intrinsic Functions
Packed Data Type Support
Register Handling
Saturation Arithmetic Support
Insert Single Assembly Instruction

Detailed Description


iLLD_TC26B: Minimum and Maximum of (Short) Integers

Functions
Minimum and Maximum of (Short) Integers
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Minimum and Maximum of (Short) Integers:

Functions

asm volatile void | Ifx__non_return_call (void(*fun)(void))
asm volatile void | Ifx__jump_and_link (void(*fun)(void))

Detailed Description

These intrinsic functions return the minimum or maximum of a signed integer, unsigned integer or short integer.

Function Documentation

◆ Ifx__jump_and_link()

asm volatile void Ifx__jump_and_link ( void(*)(void) fun )

Jump and link

Definition at line 66 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__jumpToFunctionWithLink().

◆ Ifx__non_return_call()

asm volatile void Ifx__non_return_call ( void(*)(void) fun )

Function call without return

Definition at line 58 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__jumpToFunction().


iLLD_TC26B: Cross type arithmetic operation

Macros | Functions | Variables
Cross type arithmetic operation
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Cross type arithmetic operation:

Macros

#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__min __min
#define | Ifx__mins __mins
#define | Ifx__minu __minu
#define | Ifx__max __max
#define | Ifx__maxs __maxs
#define | Ifx__maxu __maxu
#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__min __min
#define | Ifx__mins __mins
#define | Ifx__minu __minu
#define | Ifx__max __max
#define | Ifx__maxs __maxs
#define | Ifx__maxu __maxu

Functions

sint32 | __min (sint32, sint32) __attribute__((intrinsic_pseudo(3
sint32 | __mins (sint32, sint32) __attribute__((intrinsic_function(0x10b
uint32 | __minu (uint32, uint32) __attribute__((intrinsic_pseudo(3
sint32 | __max (sint32, sint32) __attribute__((intrinsic_pseudo(3
uint32 | __maxs (uint32, uint32) __attribute__((intrinsic_function(0x10b
uint32 | __maxu (uint32, uint32) __attribute__((intrinsic_pseudo(3

Variables

sint32 min
sint32 min h
uint32 min u
sint32 max
sint32 min
sint32 min h
uint32 min u
sint32 max

Detailed Description

Macro compatible with float, fix point, signed integer and unsigned integer

Macro Definition Documentation

◆ Ifx__checkrangeX [1/2]

#define Ifx__checkrangeX | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 127 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__checkrangeX [2/2]

#define Ifx__checkrangeX | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 127 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__max [1/2]

#define Ifx__max __max

Definition at line 151 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__max [2/2]

#define Ifx__max __max

Definition at line 151 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__maxs [1/2]

#define Ifx__maxs __maxs

Definition at line 157 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__maxs [2/2]

#define Ifx__maxs __maxs

Definition at line 157 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__maxu [1/2]

#define Ifx__maxu __maxu

Definition at line 163 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__maxu [2/2]

#define Ifx__maxu __maxu

Definition at line 163 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__maxX [1/2]

#define Ifx__maxX | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 125 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__maxX [2/2]

#define Ifx__maxX | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 125 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__min [1/2]

#define Ifx__min __min

Definition at line 133 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__min [2/2]

#define Ifx__min __min

Definition at line 133 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mins [1/2]

#define Ifx__mins __mins

Definition at line 139 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__mins [2/2]

#define Ifx__mins __mins

Definition at line 139 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minu [1/2]

#define Ifx__minu __minu

Definition at line 145 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__minu [2/2]

#define Ifx__minu __minu

Definition at line 145 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minX [1/2]

#define Ifx__minX | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 124 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minX [2/2]

#define Ifx__minX | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 124 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__saturateX [1/2]

#define Ifx__saturateX | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minX(Ifx__maxX(X, Min), Max) )

Definition at line 126 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__saturateX [2/2]

#define Ifx__saturateX | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minX(Ifx__maxX(X, Min), Max) )

Definition at line 126 of file IfxCpu_IntrinsicsDcc2G.h.

Function Documentation

◆ __max()

sint32 __max | ( | sint32 | ,
 |  | sint32 |
 | ) |  |

Return maximum of two integers

Referenced by Ifx_Fifo_canWriteCount(), Ifx_Shell_process(), IfxQspi_calculateDelayConstants(), and IfxQspi_calculateTimeQuantumLength().

◆ __maxs()

uint32 __maxs | ( | uint32 | ,
 |  | uint32 |
 | ) |  |

Return maximum of two short integers

◆ __maxu()

uint32 __maxu | ( | uint32 | ,
 |  | uint32 |
 | ) |  |

Return maximum of two unsigned integers

Referenced by IfxAsclin_setBitTiming(), IfxScuCcu_setGtmFrequency(), IfxScuCcu_setSpbFrequency(), and IfxScuCcu_setSriFrequency().

◆ __min()

sint32 __min | ( | sint32 | ,
 |  | sint32 |
 | ) |  |

Return minimum of two integers

Referenced by Ifx_Console_printAlign(), Ifx_Shell_parseToken(), IfxAsclin_Spi_read(), IfxAsclin_Spi_write(), IfxQspi_SpiMaster_read(), IfxQspi_SpiMaster_write(), IfxQspi_SpiSlave_read(), and IfxQspi_SpiSlave_write().

◆ __mins()

sint32 __mins | ( | sint32 | ,
 |  | sint32 |
 | ) |  |

Return minimum of two short integers

◆ __minu()

uint32 __minu | ( | uint32 | ,
 |  | uint32 |
 | ) |  |

Return minimum of two unsigned integers

Referenced by IfxAsclin_setFilterDepth(), IfxAsclin_setLinResponseTimeoutThreshold(), IfxAsclin_setRxFifoInterruptLevel(), IfxAsclin_setSamplePointPosition(), IfxAsclin_setTxFifoInterruptLevel(), IfxCcu6_PwmHl_init(), IfxCcu6_PwmHl_setDeadtime(), IfxVadc_calculateSampleTime(), IfxVadc_initializeFAdcD(), and IfxVadc_initializeFAdcI().

Variable Documentation

◆ h [1/2]

uint32 max h

Definition at line 137 of file IfxCpu_IntrinsicsDcc.h.

◆ h [2/2]

uint32 max h

Definition at line 137 of file IfxCpu_IntrinsicsDcc2G.h.

◆ max [1/2]

sint32 max

Definition at line 149 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_getRandomValueWithinRange().

◆ max [2/2]

sint32 max

Definition at line 149 of file IfxCpu_IntrinsicsDcc2G.h.

◆ min [1/2]

sint32 min

Definition at line 131 of file IfxCpu_IntrinsicsDcc2G.h.

◆ min [2/2]

sint32 min

Definition at line 131 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__minb(), Ifx__minbu(), Ifx__minh(), Ifx__minhu(), and IfxCpu_getRandomValueWithinRange().

◆ u [1/2]

uint32 extr u

Definition at line 143 of file IfxCpu_IntrinsicsDcc2G.h.

◆ u [2/2]

uint32 extr u

Definition at line 143 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCcu6_setT12Frequency(), IfxCcu6_setT13Frequency(), IfxVadc_clearAllResultRequests(), and IfxVadc_setArbiterPriority().


iLLD_TC26B: Floating point operation

Macros
Floating point operation
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Floating point operation:

Macros

#define | Ifx__saturate(X, Min, Max) ( __minf(__maxf(X, Min), Max) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( __minf(__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__saturate(X, Min, Max) ( __minf(__maxf(X, Min), Max) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( __minf(__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )

Detailed Description

Macro Definition Documentation

◆ Ifx__abs_stdreal [1/2]

#define Ifx__abs_stdreal ( X ) ( ((X) > 0.0) ? (X) : -(X) )

Definition at line 184 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__abs_stdreal [2/2]

#define Ifx__abs_stdreal ( X ) ( ((X) > 0.0) ? (X) : -(X) )

Definition at line 184 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__absf [1/2]

#define Ifx__absf ( X ) ( ((X) < 0.0) ? -(X) : (X) )

Definition at line 178 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__absf [2/2]

#define Ifx__absf ( X ) ( ((X) < 0.0) ? -(X) : (X) )

Definition at line 178 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__checkrange [1/2]

#define Ifx__checkrange | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 175 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__checkrange [2/2]

#define Ifx__checkrange | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 175 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__checkrangef [1/2]

#define Ifx__checkrangef | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 182 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__checkrangef [2/2]

#define Ifx__checkrangef | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 182 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__geqf [1/2]

#define Ifx__geqf | ( | X,
 |  | Y
 | ) | ( !((X) < (Y)) )

X >= Y

Definition at line 191 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__geqf [2/2]

#define Ifx__geqf | ( | X,
 |  | Y
 | ) | ( !((X) < (Y)) )

X >= Y

Definition at line 191 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__leqf [1/2]

#define Ifx__leqf | ( | X,
 |  | Y
 | ) | ( !((X) > (Y)) )

X <= Y

Definition at line 190 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__leqf [2/2]

#define Ifx__leqf | ( | X,
 |  | Y
 | ) | ( !((X) > (Y)) )

X <= Y

Definition at line 190 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__max_stdreal [1/2]

#define Ifx__max_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 186 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__max_stdreal [2/2]

#define Ifx__max_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 186 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__maxf [1/2]

#define Ifx__maxf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 180 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__maxf [2/2]

#define Ifx__maxf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 180 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__min_stdreal [1/2]

#define Ifx__min_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 185 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__min_stdreal [2/2]

#define Ifx__min_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 185 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__minf [1/2]

#define Ifx__minf | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 179 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minf [2/2]

#define Ifx__minf | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 179 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__neqf [1/2]

#define Ifx__neqf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) || ((X) < (Y)) )

X != Y

Definition at line 189 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__neqf [2/2]

#define Ifx__neqf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) || ((X) < (Y)) )

X != Y

Definition at line 189 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__roundf [1/2]

#define Ifx__roundf ( X ) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))

Definition at line 177 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__roundf [2/2]

#define Ifx__roundf ( X ) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))

Definition at line 177 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__saturate [1/2]

#define Ifx__saturate | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __minf(__maxf(X, Min), Max) )

Definition at line 171 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__saturate [2/2]

#define Ifx__saturate | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __minf(__maxf(X, Min), Max) )

Definition at line 171 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__saturate_stdreal [1/2]

#define Ifx__saturate_stdreal | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )

Definition at line 187 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__saturate_stdreal [2/2]

#define Ifx__saturate_stdreal | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )

Definition at line 187 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__saturatef [1/2]

#define Ifx__saturatef | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __minf(__maxf(X, Min), Max) )

Definition at line 181 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__saturatef [2/2]

#define Ifx__saturatef | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __minf(__maxf(X, Min), Max) )

Definition at line 181 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sqrf [1/2]

#define Ifx__sqrf ( X ) ((X) * (X))

Definition at line 173 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sqrf [2/2]

#define Ifx__sqrf ( X ) ((X) * (X))

Definition at line 173 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__sqrtf [1/2]

#define Ifx__sqrtf ( X ) sqrtf(X)

Definition at line 174 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__sqrtf [2/2]

#define Ifx__sqrtf ( X ) sqrtf(X)

Definition at line 174 of file IfxCpu_IntrinsicsDcc.h.


iLLD_TC26B: Fractional Arithmetic Support

Macros | Functions
Fractional Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Fractional Arithmetic Support:

Macros

#define | Ifx__fract_to_sfract Ifx__round16
#define | Ifx__fract_to_sfract Ifx__round16

Functions

asm short | Ifx__clssf (sfract a)
asm fract | Ifx__float_to_fract (float a)
asm fract | Ifx__getfract (laccum a)
asm sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
asm sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
asm long | Ifx__mulfractfract (fract a, fract b)
asm long | Ifx__mulfractlong (fract a, long b)
asm sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | __float_to_sfract (float a)
asm sfract | Ifx__s16_to_sfract (short a)
asm short | Ifx__sfract_to_s16 (sfract a)
asm volatile uint16 | Ifx__sfract_to_u16 (sfract a)
asm laccum | Ifx__shaaccum (laccum a, sint32 b)
asm fract | Ifx__shafracts (fract a, sint32 b)
asm sfract | Ifx__shasfracts (sfract a, sint32 b)
asm sfract | Ifx__u16_to_sfract (uint16 a)

Detailed Description

The next table provides an overview of intrinsic functions to convert fractional values. Note that the TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C compiler does support these functions.

Macro Definition Documentation

◆ Ifx__fract_to_sfract [1/2]

#define Ifx__fract_to_sfract Ifx__round16

Definition at line 297 of file IfxCpu_IntrinsicsDcc.h.

Referenced by __float_to_sfract().

◆ Ifx__fract_to_sfract [2/2]

#define Ifx__fract_to_sfract Ifx__round16

Definition at line 297 of file IfxCpu_IntrinsicsDcc2G.h.

Function Documentation

◆ __float_to_sfract()

IFX_INLINE sfract __float_to_sfract ( float a )

Convert float to sfract

Definition at line 301 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__clssf()

IFX_INLINE sint16 Ifx__clssf ( sfract a )

Count the consecutive number of bits that have the same value as bit 15 of an sfract

Definition at line 205 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__float_to_fract()

IFX_INLINE fract Ifx__float_to_fract ( float a )

Convert float to fract

Definition at line 215 of file IfxCpu_IntrinsicsDcc.h.

Referenced by __float_to_sfract().

◆ Ifx__getfract()

IFX_INLINE fract Ifx__getfract ( laccum a )

Convert __laccum to fract

Convert laccum to fract

Definition at line 235 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mac_r_sf()

IFX_INLINE sfract Ifx__mac_r_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add with rounding. Returns the rounded result of ( a + b * c )

Definition at line 247 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mac_sf()

IFX_INLINE sfract Ifx__mac_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add sfract. Returns ( a + b * c )

Definition at line 260 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mulfractfract()

IFX_INLINE long Ifx__mulfractfract | ( | fract | a,
 |  | fract | b
 | ) |  |

Integer part of the multiplication of a fract and a fract

Definition at line 270 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mulfractlong()

IFX_INLINE long Ifx__mulfractlong | ( | fract | a,
 |  | long | b
 | ) |  |

Integer part of the multiplication of a fract and a long

Definition at line 279 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__round16()

IFX_INLINE sfract Ifx__round16 ( fract a )

Convert fract to sfract

Definition at line 288 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__s16_to_sfract()

IFX_INLINE sfract Ifx__s16_to_sfract ( short a )

Convert signed short to sfract

Convert signed sint16 to sfract

Definition at line 309 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sfract_to_s16()

IFX_INLINE sint16 Ifx__sfract_to_s16 ( sfract a )

Convert sfract to signed short

Convert sfract to sint16

Definition at line 319 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sfract_to_u16()

IFX_INLINE uint16 Ifx__sfract_to_u16 ( sfract a )

Convert sfract to uint16

Definition at line 328 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__shaaccum()

IFX_INLINE laccum Ifx__shaaccum | ( | laccum | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an __laccum

Left/right shift of an laccum

Definition at line 338 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__shafracts()

IFX_INLINE fract Ifx__shafracts | ( | fract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an fract

Definition at line 358 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__shasfracts()

IFX_INLINE sfract Ifx__shasfracts | ( | sfract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an sfract

Definition at line 371 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__u16_to_sfract()

IFX_INLINE sfract Ifx__u16_to_sfract ( uint16 a )

Convert uint16 to sfract

Definition at line 381 of file IfxCpu_IntrinsicsDcc.h.


iLLD_TC26B: Insert / Extract Bit-fields and Bits

Macros | Functions | Variables
Insert / Extract Bit-fields and Bits
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Insert / Extract Bit-fields and Bits:

Macros

#define | Ifx__extr __extr
#define | Ifx__extru __extru
#define | Ifx__getbit(address, bitoffset) __extru( *(address), bitoffset, 1 )
#define | Ifx__ins __ins
#define | Ifx__insert __insert
#define | Ifx__insn __insn
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address,value,bitoffset,1)
#define | Ifx__extr __extr
#define | Ifx__extru __extru
#define | Ifx__getbit(address, bitoffset) __extru( *(address), bitoffset, 1 )
#define | Ifx__ins __ins
#define | Ifx__insert __insert
#define | Ifx__insn __insn
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address,value,bitoffset,1)

Functions

sint32 | __extr (sint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
uint32 | __extru (uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
uint32 | __ins (uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
uint32 | __insert (uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109
uint32 | __insn (uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
asm volatile void | Ifx__imaskldmst (void *a, sint32 b, sint32 p, const sint32 w)

Variables

sint32 extr
uint32 ins | t
uint32 insert
sint32 extr
uint32 ins | t
uint32 insert

Detailed Description

Macro Definition Documentation

◆ Ifx__extr [1/2]

#define Ifx__extr __extr

Definition at line 400 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extr [2/2]

#define Ifx__extr __extr

Definition at line 400 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__extru [1/2]

#define Ifx__extru __extru

Definition at line 406 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extru [2/2]

#define Ifx__extru __extru

Definition at line 406 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__getbit [1/2]

#define Ifx__getbit | ( | address,
 |  | bitoffset
 | ) | __extru( *(address), bitoffset, 1 )

Load a single bit.

Definition at line 410 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__getbit [2/2]

#define Ifx__getbit | ( | address,
 |  | bitoffset
 | ) | __extru( *(address), bitoffset, 1 )

Load a single bit.

Definition at line 410 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__ins [1/2]

#define Ifx__ins __ins

Definition at line 416 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__ins [2/2]

#define Ifx__ins __ins

Definition at line 416 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__insert [1/2]

#define Ifx__insert __insert

Definition at line 423 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insert [2/2]

#define Ifx__insert __insert

Definition at line 423 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__insn [1/2]

#define Ifx__insn __insn

Definition at line 429 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__insn [2/2]

#define Ifx__insn __insn

Definition at line 429 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__putbit [1/2]

#define Ifx__putbit | ( | value,
 |  | address,
 |  | bitoffset
 | ) | Ifx__imaskldmst(address,value,bitoffset,1)

Store a single bit.

Definition at line 447 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__putbit [2/2]

#define Ifx__putbit | ( | value,
 |  | address,
 |  | bitoffset
 | ) | Ifx__imaskldmst(address,value,bitoffset,1)

Store a single bit.

Definition at line 447 of file IfxCpu_IntrinsicsDcc2G.h.

Function Documentation

◆ __extr()

sint32 __extr | ( | sint32 | ,
 |  | uint32 | ,
 |  | const uint32 |
 | ) |  |

Extract a bit-field (bit pos to bit pos+width) from value

◆ __extru()

uint32 __extru | ( | uint32 | ,
 |  | uint32 | ,
 |  | const uint32 |
 | ) |  |

Same as __extr() but return bit-field as unsigned integer

Referenced by __addr_to_cx(), and __cx_to_addr().

◆ __ins()

uint32 __ins | ( | uint32 | ,
 |  | const uint32 | ,
 |  | uint32 | ,
 |  | const uint32 |
 | ) |  |

Return trg but replace trgbit by srcbit in src.

◆ __insert()

uint32 __insert | ( | uint32 | ,
 |  | uint32 | ,
 |  | uint32 | ,
 |  | const uint32 |
 | ) |  |

Extract bit-field (width w bits starting at bit 0) from a and insert it in b at position p.

Referenced by __cx_to_addr().

◆ __insn()

uint32 __insn | ( | uint32 | ,
 |  | const uint32 | ,
 |  | uint32 | ,
 |  | const uint32 |
 | ) |  |

Return trg but replace trgbit by inverse of srcbit in src.

◆ Ifx__imaskldmst()

asm volatile void Ifx__imaskldmst | ( | void * | a,
 |  | sint32 | b,
 |  | sint32 | p,
 |  | const sint32 | w
 | ) |  |

Atomic load-modify-store.

Definition at line 436 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_emitEvent().

Variable Documentation

◆ extr [1/2]

sint32 extr

Definition at line 398 of file IfxCpu_IntrinsicsDcc.h.

Referenced by __initcirc(), Ifx__extractbyte1(), Ifx__extractbyte2(), Ifx__extractbyte3(), Ifx__extractbyte4(), Ifx__extracthw1(), Ifx__extracthw2(), Ifx__extractubyte1(), Ifx__extractubyte2(), Ifx__extractubyte3(), Ifx__extractubyte4(), Ifx__extractuhw1(), Ifx__extractuhw2(), Ifx__getbyte1(), Ifx__getbyte2(), Ifx__getbyte3(), Ifx__getbyte4(), Ifx__gethw1(), Ifx__gethw2(), Ifx__getubyte1(), Ifx__getubyte2(), Ifx__getubyte3(), Ifx__getubyte4(), Ifx__getuhw1(), Ifx__getuhw2(), and Ifx__round16().

◆ extr [2/2]

sint32 extr

Definition at line 398 of file IfxCpu_IntrinsicsDcc2G.h.

◆ insert [1/2]

uint32 insert

Definition at line 421 of file IfxCpu_IntrinsicsDcc2G.h.

◆ insert [2/2]

uint32 insert

Definition at line 421 of file IfxCpu_IntrinsicsDcc.h.

Referenced by __initcirc(), Ifx__fabs(), Ifx__fabsf(), Ifx__initpackb(), Ifx__initpackhw(), Ifx__initupackb(), Ifx__initupackhw(), Ifx__insertbyte1(), Ifx__insertbyte2(), Ifx__insertbyte3(), Ifx__insertbyte4(), Ifx__inserthw1(), Ifx__inserthw2(), Ifx__insertubyte1(), Ifx__insertubyte2(), Ifx__insertubyte3(), Ifx__insertubyte4(), Ifx__insertuhw1(), Ifx__insertuhw2(), Ifx__setbyte1(), Ifx__setbyte2(), Ifx__setbyte3(), Ifx__setbyte4(), Ifx__sethw1(), Ifx__sethw2(), Ifx__setubyte1(), Ifx__setubyte2(), Ifx__setubyte3(), Ifx__setubyte4(), Ifx__setuhw1(), and Ifx__setuhw2().

◆ t [1/2]

uint32 insn t

Definition at line 414 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxGtm_Cmu_setClkFrequency(), IfxGtm_Cmu_setEclkFrequency(), and IfxGtm_Cmu_setGclkFrequency().

◆ t [2/2]

uint32 insn t

Definition at line 414 of file IfxCpu_IntrinsicsDcc2G.h.


iLLD_TC26B: Interrupt Handling

Macros | Functions | Variables
Interrupt Handling
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Interrupt Handling:

Macros

#define | Ifx__bisr __bisr
#define | Ifx__disable __disable
#define | Ifx__enable __enable
#define | Ifx__restore __restore
#define | Ifx__syscall __syscall
#define | Ifx__bisr __bisr
#define | Ifx__disable __disable
#define | Ifx__enable __enable
#define | Ifx__restore __restore
#define | Ifx__syscall __syscall

Functions

void | __bisr (const uint32) __attribute__((intrinsic_function(0x100
void | __disable (void) __attribute__((intrinsic_function(0x103
void | __enable (void) __attribute__((intrinsic_function(0x103
void | __restore (sint32) __attribute__((intrinsic_function(0x104
void | __syscall (const uint32) __attribute__((intrinsic_function(0x100

Variables

void | bisr
void | disable
void | enable
void | restore
void | syscall
void | bisr
void | disable
void | enable
void | restore
void | syscall

Detailed Description

The next table provides an overview of the intrinsic functions to read or set interrupt handling.

Macro Definition Documentation

◆ Ifx__bisr [1/2]

#define Ifx__bisr __bisr

Definition at line 461 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__bisr [2/2]

#define Ifx__bisr __bisr

Definition at line 461 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__disable [1/2]

#define Ifx__disable __disable

Definition at line 467 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__disable [2/2]

#define Ifx__disable __disable

Definition at line 467 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__enable [1/2]

#define Ifx__enable __enable

Definition at line 479 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__enable [2/2]

#define Ifx__enable __enable

Definition at line 479 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__restore [1/2]

#define Ifx__restore __restore

Definition at line 485 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__restore [2/2]

#define Ifx__restore __restore

Definition at line 485 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__syscall [1/2]

#define Ifx__syscall __syscall

Definition at line 491 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__syscall [2/2]

#define Ifx__syscall __syscall

Definition at line 491 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ __bisr()

void __bisr ( const uint32 )

Set CPU priority number 0..255 and enable interrupts immediately at function entry

◆ __disable()

void __disable ( void )

Disable interrupts. Only supported for TriCore1

Referenced by IfxCpu_disableInterrupts(), and IfxCpu_forceDisableInterrupts().

◆ __enable()

void __enable ( void )

Disable interrupts and return previous interrupt state (enabled or disabled). Direct supported for TriCore1.6. Emulated on TC1.3.1Enable interrupts immediately at function entry

Referenced by IfxCpu_enableInterrupts(), and IfxCpu_restoreInterrupts().

◆ __restore()

void __restore ( sint32 )

Restore interrupt state. Direct supported for TriCore1.6. Emulated on TC1.3.1

◆ __syscall()

void __syscall ( const uint32 )

Call a system call function number

Variable Documentation

◆ bisr [1/2]

void bisr

Definition at line 459 of file IfxCpu_IntrinsicsDcc.h.

◆ bisr [2/2]

void bisr

Definition at line 459 of file IfxCpu_IntrinsicsDcc2G.h.

◆ disable [1/2]

void disable

Definition at line 465 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxFlash_disableCorrectableErrorTracking(), IfxFlash_disableUncorrectableErrorTracking(), and IfxVadc_disablePostCalibration().

◆ disable [2/2]

void disable

Definition at line 465 of file IfxCpu_IntrinsicsDcc2G.h.

◆ enable [1/2]

void enable

Definition at line 477 of file IfxCpu_IntrinsicsDcc2G.h.

◆ enable [2/2]

void enable

Definition at line 477 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxAsclin_enableAutoBaudrateDetection(), IfxAsclin_enableBreakDetectedFlag(), IfxAsclin_enableCollisionDetection(), IfxAsclin_enableCollisionDetectionErrorFlag(), IfxAsclin_enableCts(), IfxAsclin_enableFallingEdgeDetectedFlag(), IfxAsclin_enableFrameErrorFlag(), IfxAsclin_enableHardwareChecksum(), IfxAsclin_enableHeaderTimeoutFlag(), IfxAsclin_enableLinAutoBaudDetectionErrorFlag(), IfxAsclin_enableLinChecksumErrorFlag(), IfxAsclin_enableLinParityErrorFlag(), IfxAsclin_enableLoopBackMode(), IfxAsclin_enableParity(), IfxAsclin_enableParityErrorFlag(), IfxAsclin_enableRaisingEdgeDetectedFlag(), IfxAsclin_enableResponseTimeoutFlag(), IfxAsclin_enableRxFifoFillLevelFlag(), IfxAsclin_enableRxFifoInlet(), IfxAsclin_enableRxFifoOverflowFlag(), IfxAsclin_enableRxFifoUnderflowFlag(), IfxAsclin_enableRxHeaderEndFlag(), IfxAsclin_enableRxResponseEndFlag(), IfxAsclin_enableTransmissionCompletedFlag(), IfxAsclin_enableTxFifoFillLevelFlag(), IfxAsclin_enableTxFifoOutlet(), IfxAsclin_enableTxFifoOverflowFlag(), IfxAsclin_enableTxHeaderEndFlag(), IfxAsclin_enableTxResponseEndFlag(), IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_setDataCache(), IfxCpu_setPerformanceCountersEnableBit(), IfxCpu_setProgramCache(), IfxDma_setChannelSuspendEnable(), IfxGpt12_T3_enableOutput(), IfxMtu_enableErrorTracking(), IfxQspi_enableLoopbackMode(), IfxQspi_enablePT1Event(), IfxQspi_enablePT2Event(), and IfxQspi_enableUsrEvent().

◆ restore [1/2]

void restore

Definition at line 483 of file IfxCpu_IntrinsicsDcc2G.h.

◆ restore [2/2]

void restore

Definition at line 483 of file IfxCpu_IntrinsicsDcc.h.

◆ syscall [1/2]

void syscall

Definition at line 489 of file IfxCpu_IntrinsicsDcc2G.h.

◆ syscall [2/2]

void syscall

Definition at line 489 of file IfxCpu_IntrinsicsDcc.h.


iLLD_TC26B: Miscellaneous Intrinsic Functions

Macros | Functions | Variables
Miscellaneous Intrinsic Functions
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Miscellaneous Intrinsic Functions:

Macros

#define | Ifx__cacheawi __cacheawi
#define | Ifx__cacheawi __cacheawi

Functions

void | __cacheawi (void *) __attribute__((intrinsic_function(0x110
asm volatile uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
asm volatile void | Ifx__cacheiwi (uint8 *p)
asm circ_t | __initcirc (void *buf, uint16 bufsize, uint16 byteindex)
asm volatile sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
asm volatile uint32 | Ifx__rol (uint32 operand, uint32 count)
asm volatile uint32 | Ifx__ror (uint32 operand, uint32 count)

Variables

void cachea | wi
void cachea | wi

Detailed Description

Macro Definition Documentation

◆ Ifx__cacheawi [1/2]

#define Ifx__cacheawi __cacheawi

Definition at line 504 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__cacheawi [2/2]

#define Ifx__cacheawi __cacheawi

Definition at line 504 of file IfxCpu_IntrinsicsDcc2G.h.

Function Documentation

◆ __cacheawi()

void __cacheawi ( void * )

Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].

◆ __initcirc()

asm circ_t __initcirc | ( | void * | buf,
 |  | uint16 | bufsize,
 |  | uint16 | byteindex
 | ) |  |

Initialize a circular pointer with a dynamically allocated buffer at run-time.

Definition at line 528 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__cacheawi_bo_post_inc()

IFX_INLINE uint8 * Ifx__cacheawi_bo_post_inc ( uint8 * p )

Write back and invalidate cache address "p" and return post incremented value of "p". Generates CACHEA.WI [Ab+].

Definition at line 509 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__cacheiwi()

IFX_INLINE void Ifx__cacheiwi ( uint8 * p )

Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].

Definition at line 519 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mulsc()

IFX_INLINE sint32 Ifx__mulsc | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | offset
 | ) |  |

Multiply two 32-bit numbers to an intermediate 64-bit result, and scale back the result to 32 bits. To scale back the result, 32 bits are extracted from the intermediate 64-bit result: bit 63-offset to bit 31-offset.

Definition at line 542 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__rol()

IFX_INLINE uint32 Ifx__rol | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).

Definition at line 552 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__ror()

IFX_INLINE uint32 Ifx__ror | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).

Definition at line 561 of file IfxCpu_IntrinsicsDcc.h.

Variable Documentation

◆ wi [1/2]

void cachea wi

Definition at line 502 of file IfxCpu_IntrinsicsDcc.h.

◆ wi [2/2]

void cachea wi

Definition at line 502 of file IfxCpu_IntrinsicsDcc2G.h.


iLLD_TC26B: Packed Data Type Support

Functions
Packed Data Type Support
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Packed Data Type Support:

Functions

asm __packb | Ifx__absb (__packb a)
asm __packhw | Ifx__absh (__packhw a)
asm __packhw | Ifx__abssh (__packhw a)
asm volatile uint8 | Ifx__extractubyte1 (__upackb a)
asm volatile uint8 | Ifx__extractubyte2 (__upackb a)
asm volatile uint8 | Ifx__extractubyte3 (__upackb a)
asm volatile uint8 | Ifx__extractubyte4 (__upackb a)
asm volatile uint16 | Ifx__extractuhw1 (__upackhw a)
asm volatile uint16 | Ifx__extractuhw2 (__upackhw a)
asm sint8 | Ifx__getbyte1 (__packb *a)
asm sint8 | Ifx__getbyte2 (__packb *a)
asm sint8 | Ifx__getbyte3 (__packb *a)
asm sint8 | Ifx__getbyte4 (__packb *a)
asm short | Ifx__gethw1 (__packhw *a)
asm short | Ifx__gethw2 (__packhw *a)
asm volatile uint8 | Ifx__getubyte1 (__upackb *a)
asm volatile uint8 | Ifx__getubyte2 (__upackb *a)
asm volatile uint8 | Ifx__getubyte3 (__upackb *a)
asm volatile uint8 | Ifx__getubyte4 (__upackb *a)
asm volatile uint16 | Ifx__getuhw1 (__upackhw *a)
asm volatile uint16 | Ifx__getuhw2 (__upackhw *a)
asm __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
asm __packb | Ifx__initpackbl (long a)
asm __packhw | Ifx__initpackhwl (long a)
asm __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
asm __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
asm __packhw | Ifx__inserthw1 (__packhw a, short b)
asm __packhw | Ifx__inserthw2 (__packhw a, short b)
asm __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
asm __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
asm __packb | Ifx__minb (__packb a, __packb b)
asm __upackb | Ifx__minbu (__upackb a, __upackb b)
asm __packhw | Ifx__minh (__packhw a, __packhw b)
asm __upackhw | Ifx__minhu (__upackhw a, __upackhw b)
asm volatile void | Ifx__setbyte1 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte2 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte3 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte4 (__packb *a, sint8 b)
asm volatile void | Ifx__sethw1 (__packhw *a, short b)
asm volatile void | Ifx__sethw2 (__packhw *a, short b)
asm volatile void | Ifx__setubyte1 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte2 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte3 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte4 (__upackb *a, uint8 b)
asm volatile void | Ifx__setuhw1 (__upackhw *a, uint16 b)
asm volatile void | Ifx__setuhw2 (__upackhw *a, uint16 b)

Detailed Description

The next table provides an overview of the intrinsic functions for initialization of packed data type.

Function Documentation

◆ Ifx__absb()

IFX_INLINE __packb Ifx__absb ( __packb a )

Absolute value of __packb

Definition at line 579 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__absh()

IFX_INLINE __packhw Ifx__absh ( __packhw a )

Absolute value of __packhw

Definition at line 588 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__abssh()

IFX_INLINE __packhw Ifx__abssh ( __packhw a )

Absolute value of __packhw using saturation

Definition at line 597 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractubyte1()

IFX_INLINE uint8 Ifx__extractubyte1 ( __upackb a )

Extract first unsigned byte from a __packb

Extract first uint8 from a __packb

Definition at line 660 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractubyte2()

IFX_INLINE uint8 Ifx__extractubyte2 ( __upackb a )

Extract second unsigned byte from a __packb

Extract second uint8 from a __packb

Definition at line 669 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractubyte3()

IFX_INLINE uint8 Ifx__extractubyte3 ( __upackb a )

Extract third unsigned byte from a __packb

Extract third uint8 from a __packb

Definition at line 678 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractubyte4()

IFX_INLINE uint8 Ifx__extractubyte4 ( __upackb a )

Extract fourth unsigned byte from a __packb

Extract fourth uint8 from a __packb

Definition at line 687 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractuhw1()

IFX_INLINE uint16 Ifx__extractuhw1 ( __upackhw a )

Extract first uint16 from a __packhw

Definition at line 696 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractuhw2()

IFX_INLINE uint16 Ifx__extractuhw2 ( __upackhw a )

Extract second uint16 from a __packhw

Definition at line 705 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getbyte1()

IFX_INLINE sint8 Ifx__getbyte1 ( __packb * a )

Extract first byte from a __packb

Definition at line 714 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getbyte2()

IFX_INLINE sint8 Ifx__getbyte2 ( __packb * a )

Extract second byte from a __packb

Definition at line 724 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getbyte3()

IFX_INLINE sint8 Ifx__getbyte3 ( __packb * a )

Extract third byte from a __packb

Definition at line 734 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getbyte4()

IFX_INLINE sint8 Ifx__getbyte4 ( __packb * a )

Extract fourth byte from a __packb

Definition at line 744 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__gethw1()

IFX_INLINE sint16 Ifx__gethw1 ( __packhw * a )

Extract first short from a __packhw

Extract first sint16 from a __packhw

Definition at line 754 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__gethw2()

IFX_INLINE sint16 Ifx__gethw2 ( __packhw * a )

Extract second short from a __packhw

Extract second sint16 from a __packhw

Definition at line 764 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getubyte1()

IFX_INLINE uint8 Ifx__getubyte1 ( __upackb * a )

Extract first unsigned byte from a __packb

Extract first uint8 from a __packb

Definition at line 774 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getubyte2()

IFX_INLINE uint8 Ifx__getubyte2 ( __upackb * a )

Extract second unsigned byte from a __packb

Extract second uint8 from a __packb

Definition at line 784 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getubyte3()

IFX_INLINE uint8 Ifx__getubyte3 ( __upackb * a )

Extract third unsigned byte from a __packb

Extract third uint8 from a __packb

Definition at line 794 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getubyte4()

IFX_INLINE uint8 Ifx__getubyte4 ( __upackb * a )

Extract fourth unsigned byte from a __packb

Extract fourth uint8 from a __packb

Definition at line 804 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getuhw1()

IFX_INLINE uint16 Ifx__getuhw1 ( __upackhw * a )

Extract first uint16 from a __packhw

Definition at line 814 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getuhw2()

IFX_INLINE uint16 Ifx__getuhw2 ( __upackhw * a )

Extract second uint16 from a __packhw

Definition at line 824 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__initpackb()

IFX_INLINE __packb Ifx__initpackb | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | c,
 |  | sint32 | d
 | ) |  |

Initialize __packb with four integers

Definition at line 834 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__initpackbl()

IFX_INLINE __packb Ifx__initpackbl ( long a )

Initialize __packb with a long integer

Definition at line 845 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__initpackhwl()

IFX_INLINE __packhw Ifx__initpackhwl ( long a )

Initialize __packhw with a long integer

Definition at line 863 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__initupackb()

IFX_INLINE __upackb Ifx__initupackb | ( | uint32 | a,
 |  | uint32 | b,
 |  | uint32 | c,
 |  | uint32 | d
 | ) |  |

Initialize __packb with four unsigned integers

Definition at line 872 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__initupackhw()

IFX_INLINE __upackhw Ifx__initupackhw | ( | uint16 | a,
 |  | uint16 | b
 | ) |  |

Initialize __packhw with two unsigned integers

Definition at line 883 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__inserthw1()

IFX_INLINE __packhw Ifx__inserthw1 | ( | __packhw | a,
 |  | short | b
 | ) |  |

Insert short into first halfword of a __packhw

Insert sint16 into first halfword of a __packhw

Definition at line 928 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__inserthw2()

IFX_INLINE __packhw Ifx__inserthw2 | ( | __packhw | a,
 |  | short | b
 | ) |  |

Insert short into second halfword of a __packhw

Insert sint16 into second halfword of a __packhw

Definition at line 937 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertuhw1()

IFX_INLINE __upackhw Ifx__insertuhw1 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 982 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertuhw2()

IFX_INLINE __upackhw Ifx__insertuhw2 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 991 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minb()

IFX_INLINE __packb Ifx__minb | ( | __packb | a,
 |  | __packb | b
 | ) |  |

Minimum of two __packb values

Definition at line 1003 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minbu()

IFX_INLINE __upackb Ifx__minbu | ( | __upackb | a,
 |  | __upackb | b
 | ) |  |

Minimum of two __upackb values

Definition at line 1013 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minh()

IFX_INLINE __packhw Ifx__minh | ( | __packhw | a,
 |  | __packhw | b
 | ) |  |

Minimum of two __packhw values

Definition at line 1022 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minhu()

IFX_INLINE __upackhw Ifx__minhu | ( | __upackhw | a,
 |  | __upackhw | b
 | ) |  |

Minimum of two __upackhw values

Definition at line 1031 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setbyte1()

IFX_INLINE void Ifx__setbyte1 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into first byte of a __packb

Definition at line 1040 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setbyte2()

IFX_INLINE void Ifx__setbyte2 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into second byte of a __packb

Definition at line 1051 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setbyte3()

IFX_INLINE void Ifx__setbyte3 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into third byte of a __packb

Definition at line 1062 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setbyte4()

IFX_INLINE void Ifx__setbyte4 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into fourth byte of a __packb

Definition at line 1073 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sethw1()

IFX_INLINE void Ifx__sethw1 | ( | __packhw * | a,
 |  | short | b
 | ) |  |

Insert short into first halfword of a __packhw

Insert sint16 into first halfword of a __packhw

Definition at line 1084 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sethw2()

IFX_INLINE void Ifx__sethw2 | ( | __packhw * | a,
 |  | short | b
 | ) |  |

Insert short into second halfword of a __packhw

Insert sint16 into second halfword of a __packhw

Definition at line 1095 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setubyte1()

IFX_INLINE void Ifx__setubyte1 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into first byte of a __upackb

Definition at line 1106 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setubyte2()

IFX_INLINE void Ifx__setubyte2 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into second byte of a __upackb

Definition at line 1117 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setubyte3()

IFX_INLINE void Ifx__setubyte3 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into third byte of a __upackb

Definition at line 1128 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setubyte4()

IFX_INLINE void Ifx__setubyte4 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into fourth byte of a __upackb

Definition at line 1139 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setuhw1()

IFX_INLINE void Ifx__setuhw1 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 1150 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setuhw2()

IFX_INLINE void Ifx__setuhw2 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 1161 of file IfxCpu_IntrinsicsDcc.h.


iLLD_TC26B: Register Handling

Macros | Functions | Variables
Register Handling
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Register Handling:

Macros

#define | Ifx__abs __abs
#define | Ifx__absdif __absdif
#define | Ifx__abss __abss
#define | Ifx__clo __clo
#define | Ifx__cls __cls
#define | Ifx__clz __clz
#define | Ifx__mfcr __mfcr
#define | Ifx__mtcr __mtcr
#define | Ifx__abs __abs
#define | Ifx__absdif __absdif
#define | Ifx__abss __abss
#define | Ifx__clo __clo
#define | Ifx__cls __cls
#define | Ifx__clz __clz
#define | Ifx__mfcr __mfcr
#define | Ifx__mtcr __mtcr

Functions

sint32 | __abs (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __absdif (sint32, sint32) __attribute__((intrinsic_pseudo(1
sint32 | __abss (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __clo (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __cls (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __clz (sint32) __attribute__((intrinsic_pseudo(1
asm double | Ifx__fabs (double d)
asm float | Ifx__fabsf (float f)
sint32 | __mfcr (const uint32) __attribute__((intrinsic_function(0x101
void | __mtcr (const uint32, sint32) __attribute__((intrinsic_function(0x102
asm volatile sint32 | Ifx__parity (sint32 a)
asm sint8 | Ifx__satb (sint32 a)
asm volatile uint8 | Ifx__satbu (sint32 a)
asm short | Ifx__sath (sint32 a)
asm volatile uint16 | Ifx__sathu (sint32 a)

Variables

sint32 abs
sint32 absdif
sint32 abss
sint32 clo
sint32 cls
sint32 clz
sint32 mfcr
void | mtcr
sint32 abs
sint32 absdif
sint32 abss
sint32 clo
sint32 cls
sint32 clz
sint32 mfcr
void | mtcr

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to access control registers.

Macro Definition Documentation

◆ Ifx__abs [1/2]

#define Ifx__abs __abs

Definition at line 1182 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__abs [2/2]

#define Ifx__abs __abs

Definition at line 1182 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__absdif [1/2]

#define Ifx__absdif __absdif

Definition at line 1188 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__absdif [2/2]

#define Ifx__absdif __absdif

Definition at line 1188 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__abss [1/2]

#define Ifx__abss __abss

Definition at line 1194 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__abss [2/2]

#define Ifx__abss __abss

Definition at line 1194 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__clo [1/2]

#define Ifx__clo __clo

Definition at line 1200 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__clo [2/2]

#define Ifx__clo __clo

Definition at line 1200 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__cls [1/2]

#define Ifx__cls __cls

Definition at line 1206 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__cls [2/2]

#define Ifx__cls __cls

Definition at line 1206 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__clz [1/2]

#define Ifx__clz __clz

Definition at line 1212 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__clz [2/2]

#define Ifx__clz __clz

Definition at line 1212 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mfcr [1/2]

#define Ifx__mfcr __mfcr

Definition at line 1236 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__mfcr [2/2]

#define Ifx__mfcr __mfcr

Definition at line 1236 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mtcr [1/2]

#define Ifx__mtcr __mtcr

Definition at line 1242 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mtcr [2/2]

#define Ifx__mtcr __mtcr

Definition at line 1242 of file IfxCpu_IntrinsicsDcc2G.h.

Function Documentation

◆ __abs()

sint32 __abs ( sint32 )

Return absolute value

Referenced by IfxMultican_Node_setBitTiming(), IfxMultican_Node_setFastBitTiming(), and IfxMultican_Node_setNominalBitTiming().

◆ __absdif()

sint32 __absdif | ( | sint32 | ,
 |  | sint32 |
 | ) |  |

Return absolue difference of two integers

◆ __abss()

sint32 __abss ( sint32 )

Return absolute value with saturation

◆ __clo()

sint32 __clo ( sint32 )

Count leading ones in int

◆ __cls()

sint32 __cls ( sint32 )

Count number of redundant sign bits (all consecutive bits with the same value as bit 31

◆ __clz()

sint32 __clz ( sint32 )

Count leading zeros in int

Referenced by Ifx_FftF32_radix2(), Ifx_FftF32_radix2I(), IfxDma_getCircularRangeCode(), IfxFft_getLengthCode(), IfxSmu_getAlarm(), and IfxStm_Timer_init().

◆ __mfcr()

sint32 __mfcr ( const uint32 )

Move contents of the addressed core SFR into a data register

Referenced by _Core0_start(), _Core1_start(), IfxCpu_areInterruptsEnabled(), IfxCpu_emitEvent(), IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_getCoreId(), IfxCpu_getCoreIndex(), IfxCpu_getCoreMode(), IfxCpu_getPerformanceCounter(), IfxCpu_getPerformanceCounterStickyOverflow(), IfxCpu_invalidateProgramCache(), IfxCpu_resetAndStartCounters(), IfxCpu_setPerformanceCountersEnableBit(), IfxCpu_setSafetyTaskIdentifier(), IfxCpu_stopCounters(), IfxCpu_updatePerformanceCounter(), and IfxCpu_waitEvent().

◆ __mtcr()

void __mtcr | ( | const uint32 | ,
 |  | sint32 |
 | ) |  |

Move contents of a data register (second sint32) to the addressed core SFR (first sint32)

Referenced by _Core0_start(), _Core1_start(), IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_initCSA(), IfxCpu_invalidateProgramCache(), IfxCpu_resetAndStartCounters(), IfxCpu_setDataCache(), IfxCpu_setPerformanceCountersEnableBit(), IfxCpu_setProgramCache(), IfxCpu_setSafetyTaskIdentifier(), and IfxCpu_updatePerformanceCounter().

◆ Ifx__fabs()

IFX_INLINE double Ifx__fabs ( double d )

Return absolute double precision floating-point value

Definition at line 1216 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__fabsf()

IFX_INLINE float Ifx__fabsf ( float f )

Return absolute floating-point value

Definition at line 1225 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__parity()

IFX_INLINE sint32 Ifx__parity ( sint32 a )

Return parity

Definition at line 1246 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__satb()

IFX_INLINE sint8 Ifx__satb ( sint32 a )

Return saturated byte

Definition at line 1255 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__satbu()

IFX_INLINE uint8 Ifx__satbu ( sint32 a )

Return saturated unsigned byte

Return saturated uint8

Definition at line 1264 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sath()

IFX_INLINE sint16 Ifx__sath ( sint32 a )

Return saturated halfword

Definition at line 1273 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sathu()

IFX_INLINE uint16 Ifx__sathu ( sint32 a )

Return saturated unsignedhalfword

Return saturated unsigned halfword

Definition at line 1282 of file IfxCpu_IntrinsicsDcc.h.

Variable Documentation

◆ abs [1/2]

sint32 abs

Definition at line 1180 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__absb(), and Ifx__absh().

◆ abs [2/2]

sint32 abs

Definition at line 1180 of file IfxCpu_IntrinsicsDcc2G.h.

◆ absdif [1/2]

sint32 absdif

Definition at line 1186 of file IfxCpu_IntrinsicsDcc.h.

◆ absdif [2/2]

sint32 absdif

Definition at line 1186 of file IfxCpu_IntrinsicsDcc2G.h.

◆ abss [1/2]

sint32 abss

Definition at line 1192 of file IfxCpu_IntrinsicsDcc2G.h.

◆ abss [2/2]

sint32 abss

Definition at line 1192 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__abssh().

◆ clo [1/2]

sint32 clo

Definition at line 1198 of file IfxCpu_IntrinsicsDcc.h.

◆ clo [2/2]

sint32 clo

Definition at line 1198 of file IfxCpu_IntrinsicsDcc2G.h.

◆ cls [1/2]

sint32 cls

Definition at line 1204 of file IfxCpu_IntrinsicsDcc2G.h.

◆ cls [2/2]

sint32 cls

Definition at line 1204 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__clssf().

◆ clz [1/2]

sint32 clz

Definition at line 1210 of file IfxCpu_IntrinsicsDcc2G.h.

◆ clz [2/2]

sint32 clz

Definition at line 1210 of file IfxCpu_IntrinsicsDcc.h.

◆ mfcr [1/2]

sint32 mfcr

Definition at line 1234 of file IfxCpu_IntrinsicsDcc2G.h.

◆ mfcr [2/2]

sint32 mfcr

Definition at line 1234 of file IfxCpu_IntrinsicsDcc.h.

◆ mtcr [1/2]

void mtcr

Definition at line 1240 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__stopPerfCounters().

◆ mtcr [2/2]

void mtcr

Definition at line 1240 of file IfxCpu_IntrinsicsDcc2G.h.

Referenced by Ifx__stopPerfCounters().


iLLD_TC26B: Saturation Arithmetic Support

Macros | Functions | Variables
Saturation Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Saturation Arithmetic Support:

Macros

#define | Ifx__adds __adds
#define | Ifx__adds __adds

Functions

sint32 | __adds (sint32, sint32) __attribute__((intrinsic_pseudo(1
asm volatile uint32 | Ifx__addsu (uint32 a, uint32 b)
asm volatile sint32 | Ifx__subs (sint32 a, sint32 b)
asm volatile uint32 | Ifx__subsu (uint32 a, uint32 b)

Variables

sint32 adds
sint32 adds

Detailed Description

These intrinsics support saturation arithmetic

Macro Definition Documentation

◆ Ifx__adds [1/2]

#define Ifx__adds __adds

Definition at line 1300 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__adds [2/2]

#define Ifx__adds __adds

Definition at line 1300 of file IfxCpu_IntrinsicsDcc2G.h.

Function Documentation

◆ __adds()

sint32 __adds | ( | sint32 | ,
 |  | sint32 |
 | ) |  |

add signed with saturation

◆ Ifx__addsu()

IFX_INLINE uint32 Ifx__addsu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

add unsigned with saturation

Definition at line 1304 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__subs()

IFX_INLINE sint32 Ifx__subs | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

substract signed with saturation

Definition at line 1313 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__subsu()

IFX_INLINE uint32 Ifx__subsu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

substract unsigned with saturation

Definition at line 1322 of file IfxCpu_IntrinsicsDcc.h.

Variable Documentation

◆ adds [1/2]

sint32 adds

Definition at line 1298 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__addsu(), and Ifx__round16().

◆ adds [2/2]

sint32 adds

Definition at line 1298 of file IfxCpu_IntrinsicsDcc2G.h.


iLLD_TC26B: Insert Single Assembly Instruction

Macros | Functions | Variables
Insert Single Assembly Instruction
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Insert Single Assembly Instruction:

Macros

#define | Ifx__debug __debug
#define | Ifx__dsync __dsync
#define | Ifx__isync __isync
#define | Ifx__mem_barrier __scheduling_barrier
#define | Ifx__nop __nop
#define | Ifx__NOP __nops
#define | Ifx__rslcx
#define | Ifx__svlcx
#define | Ifx__debug __debug
#define | Ifx__dsync __dsync
#define | Ifx__isync __isync
#define | Ifx__mem_barrier __scheduling_barrier
#define | Ifx__nop __nop
#define | Ifx__NOP __nops
#define | Ifx__rslcx
#define | Ifx__svlcx

Functions

void | __debug (void) __attribute__((intrinsic_function(0x103
void | __dsync (void) __attribute__((intrinsic_function(0x103
void | __isync (void) __attribute__((intrinsic_function(0x103
asm volatile void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
void | __scheduling_barrier (void) __attribute__((intrinsic_function(9
void | __nop (void) __attribute__((intrinsic_function(0x103
asm volatile void | Ifx__nops (uint32 cnt)
asm volatile void | Ifx__nops1000 (uint32 x)
void | __rslcx (void) __attribute__((intrinsic_function(0x103
void | __svlcx (void) __attribute__((intrinsic_function(0x103
asm volatile uint32 | Ifx__swap (void *place, uint32 value)
asm volatile unsigned int | Ifx__cmpAndSwap (unsigned int *address, unsigned long value, unsigned long CmpVal)

Variables

void | debug
void | dsync
void | isync
void | $ $sb
void | nop
void | rslcx
void | svlcx
void | debug
void | dsync
void | isync
void | $ $sb
void | nop
void | rslcx
void | svlcx

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to insert a single assembly instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used assembly instructions.

Macro Definition Documentation

◆ Ifx__debug [1/2]

#define Ifx__debug __debug

Definition at line 1343 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__debug [2/2]

#define Ifx__debug __debug

Definition at line 1343 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__dsync [1/2]

#define Ifx__dsync __dsync

Definition at line 1349 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__dsync [2/2]

#define Ifx__dsync __dsync

Definition at line 1349 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__isync [1/2]

#define Ifx__isync __isync

Definition at line 1355 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__isync [2/2]

#define Ifx__isync __isync

Definition at line 1355 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mem_barrier [1/2]

#define Ifx__mem_barrier __scheduling_barrier

Definition at line 1374 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mem_barrier [2/2]

#define Ifx__mem_barrier __scheduling_barrier

Definition at line 1374 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__nop [1/2]

#define Ifx__nop __nop

Definition at line 1380 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__nop [2/2]

#define Ifx__nop __nop

Definition at line 1380 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__NOP [1/2]

#define Ifx__NOP __nops

Definition at line 1382 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__NOP [2/2]

#define Ifx__NOP __nops

Definition at line 1382 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__rslcx [1/2]

#define Ifx__rslcx

Definition at line 1418 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__rslcx [2/2]

#define Ifx__rslcx

Definition at line 1418 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__svlcx [1/2]

#define Ifx__svlcx

Definition at line 1424 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__svlcx [2/2]

#define Ifx__svlcx

Definition at line 1424 of file IfxCpu_IntrinsicsDcc2G.h.

Function Documentation

◆ __debug()

void __debug ( void )

Insert DEBUG instruction

Referenced by Ifx_Assert_doLevel(), Ifx_Assert_doValidate(), IfxCcu6_routeInterruptNode(), and IfxFft_Fft_isrInput().

◆ __dsync()

void __dsync ( void )

Insert DSYNC instruction

Referenced by _Core0_start(), _Core1_start(), IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxFlash_clearStatus(), IfxFlash_disableWriteProtection(), IfxFlash_enterPageMode(), IfxFlash_eraseMultiplePhysicalSectors(), IfxFlash_eraseMultipleSectors(), IfxFlash_erasePhysicalSector(), IfxFlash_eraseSector(), IfxFlash_eraseVerifyMultipleSectors(), IfxFlash_eraseVerifySector(), IfxFlash_loadPage(), IfxFlash_loadPage2X32(), IfxFlash_resetToRead(), IfxFlash_resumeProtection(), IfxFlash_suspendResumeMultipleSectors(), IfxFlash_suspendResumeSector(), IfxFlash_waitUnbusy(), IfxFlash_waitUnbusyAll(), IfxFlash_writeBurst(), IfxFlash_writePage(), and IfxFlash_writePageOnce().

◆ __isync()

void __isync ( void )

Insert ISYNC instruction

Referenced by IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_setDataCache(), and IfxCpu_setProgramCache().

◆ __nop()

void __nop ( void )

Insert NOP instruction

Referenced by IfxCif_Cam_initEmem(), IfxCpu_disableInterrupts(), IfxCpu_forceDisableInterrupts(), IfxCpu_waitEvent(), IfxEmem_setClockEnableState(), IfxHssl_Hssl_delay(), IfxMtu_clearSram(), IfxMtu_readSramAddress(), IfxMtu_runNonDestructiveInversionTest(), IfxMtu_waitForMbistDone(), and IfxMtu_writeSramAddress().

◆ __rslcx()

void __rslcx ( void )

Insert RSLCX instruction

◆ __scheduling_barrier()

void __scheduling_barrier ( void )

◆ __svlcx()

void __svlcx ( void )

Insert SVLCX instruction

◆ Ifx__cmpAndSwap()

asm volatile unsigned int Ifx__cmpAndSwap | ( | unsigned int * | address,
 |  | unsigned long | value,
 |  | unsigned long | CmpVal
 | ) |  |

Definition at line 1441 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__ldmst()

IFX_INLINE void Ifx__ldmst | ( | volatile void * | address,
 |  | uint32 | mask,
 |  | uint32 | value
 | ) |  |

Insert LDMST instruction. Note that all operands must be word-aligned.

Definition at line 1362 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__nops()

asm volatile void Ifx__nops ( uint32 cnt )

Insert a loop over n NOP instruction

Definition at line 1386 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__nops1000()

asm volatile void Ifx__nops1000 ( uint32 x )

Insert a loop over n times 1000 NOP instruction

Definition at line 1399 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__swap()

IFX_INLINE uint32 Ifx__swap | ( | void * | place,
 |  | uint32 | value
 | ) |  |

Insert SWAP instruction. Note that all operands must be word-aligned.

Definition at line 1431 of file IfxCpu_IntrinsicsDcc.h.

Variable Documentation

◆ $ $sb [1/2]

void $ $sb

Definition at line 1373 of file IfxCpu_IntrinsicsDcc.h.

◆ $ $sb [2/2]

void $ $sb

Definition at line 1373 of file IfxCpu_IntrinsicsDcc2G.h.

◆ debug [1/2]

void debug

Definition at line 1341 of file IfxCpu_IntrinsicsDcc2G.h.

◆ debug [2/2]

void debug

Definition at line 1341 of file IfxCpu_IntrinsicsDcc.h.

◆ dsync [1/2]

void dsync

Definition at line 1347 of file IfxCpu_IntrinsicsDcc.h.

◆ dsync [2/2]

void dsync

Definition at line 1347 of file IfxCpu_IntrinsicsDcc2G.h.

◆ isync [1/2]

void isync

Definition at line 1353 of file IfxCpu_IntrinsicsDcc2G.h.

Referenced by Ifx__stopPerfCounters().

◆ isync [2/2]

void isync

Definition at line 1353 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__stopPerfCounters().

◆ nop [1/2]

void nop

Definition at line 1378 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__nops(), and Ifx__nops1000().

◆ nop [2/2]

void nop

Definition at line 1378 of file IfxCpu_IntrinsicsDcc2G.h.

◆ rslcx [1/2]

void rslcx

Definition at line 1416 of file IfxCpu_IntrinsicsDcc.h.

◆ rslcx [2/2]

void rslcx

Definition at line 1416 of file IfxCpu_IntrinsicsDcc2G.h.

◆ svlcx [1/2]

void svlcx

Definition at line 1422 of file IfxCpu_IntrinsicsDcc2G.h.

◆ svlcx [2/2]

void svlcx

Definition at line 1422 of file IfxCpu_IntrinsicsDcc.h.


iLLD_TC26B: Intrinsics for GNU compiler

Modules
Intrinsics for GNU compiler
iLLD » CPU » Standard Driver » Intrinsics
Collaboration diagram for Intrinsics for GNU compiler:

Modules

Cross type arithmetic operation
Signed integer operation
Unsigned integer operation
Floating point operation
Fractional Arithmetic Support
Insert / Extract Bit-fields and Bits
Interrupt Handling
Miscellaneous Intrinsic Functions
Packed Data Type Support
Insert Single Assembly Instruction

Detailed Description


iLLD_TC26B: Cross type arithmetic operation

Macros
Cross type arithmetic operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Cross type arithmetic operation:

Macros

#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))

Detailed Description

Macro compatible with float, fix point, signed integer and unsigned integer

Macro Definition Documentation

◆ Ifx__checkrangeX [1/2]

#define Ifx__checkrangeX | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 120 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__checkrangeX [2/2]

#define Ifx__checkrangeX | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 120 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__maxX [1/2]

#define Ifx__maxX | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 118 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__maxX [2/2]

#define Ifx__maxX | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 118 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__minX [1/2]

#define Ifx__minX | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 117 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__minX [2/2]

#define Ifx__minX | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 117 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__saturateX [1/2]

#define Ifx__saturateX | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minX(Ifx__maxX(X, Min), Max) )

Definition at line 119 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__saturateX [2/2]

#define Ifx__saturateX | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minX(Ifx__maxX(X, Min), Max) )

Definition at line 119 of file IfxCpu_IntrinsicsGhs2G.h.


iLLD_TC26B: Signed integer operation

Macros
Signed integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Signed integer operation:

Macros

#define | Ifx__saturate(X, Min, Max) ( __min(__max(X, Min), Max) )
#define | Ifx__saturate(X, Min, Max) ( __min(__max(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturate [1/2]

#define Ifx__saturate | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __min(__max(X, Min), Max) )

Definition at line 127 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__saturate [2/2]

#define Ifx__saturate | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __min(__max(X, Min), Max) )

Definition at line 127 of file IfxCpu_IntrinsicsGhs2G.h.


iLLD_TC26B: Unsigned integer operation

Macros
Unsigned integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Unsigned integer operation:

Macros

#define | Ifx__saturateu(X, Min, Max) ( __minu(__maxu(X, Min), Max) )
#define | Ifx__saturateu(X, Min, Max) ( __minu(__maxu(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturateu [1/2]

#define Ifx__saturateu | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __minu(__maxu(X, Min), Max) )

Definition at line 134 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__saturateu [2/2]

#define Ifx__saturateu | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __minu(__maxu(X, Min), Max) )

Definition at line 134 of file IfxCpu_IntrinsicsGhs2G.h.


iLLD_TC26B: Floating point operation

Macros
Floating point operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Floating point operation:

Macros

#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )

Detailed Description

Macro Definition Documentation

◆ Ifx__abs_stdreal [1/2]

#define Ifx__abs_stdreal ( X ) ( ((X) > 0.0) ? (X) : -(X) )

Definition at line 153 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__abs_stdreal [2/2]

#define Ifx__abs_stdreal ( X ) ( ((X) > 0.0) ? (X) : -(X) )

Definition at line 153 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__absf [1/2]

#define Ifx__absf ( X ) ( ((X) < 0.0) ? -(X) : (X) )

Definition at line 147 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__absf [2/2]

#define Ifx__absf ( X ) ( ((X) < 0.0) ? -(X) : (X) )

Definition at line 147 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__checkrange [1/2]

#define Ifx__checkrange | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 144 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__checkrange [2/2]

#define Ifx__checkrange | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 144 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__checkrangef [1/2]

#define Ifx__checkrangef | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 151 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__checkrangef [2/2]

#define Ifx__checkrangef | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 151 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__geqf [1/2]

#define Ifx__geqf | ( | X,
 |  | Y
 | ) | ( !((X) < (Y)) )

X >= Y

Definition at line 160 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__geqf [2/2]

#define Ifx__geqf | ( | X,
 |  | Y
 | ) | ( !((X) < (Y)) )

X >= Y

Definition at line 160 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__leqf [1/2]

#define Ifx__leqf | ( | X,
 |  | Y
 | ) | ( !((X) > (Y)) )

X <= Y

Definition at line 159 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__leqf [2/2]

#define Ifx__leqf | ( | X,
 |  | Y
 | ) | ( !((X) > (Y)) )

X <= Y

Definition at line 159 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__max_stdreal [1/2]

#define Ifx__max_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 155 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__max_stdreal [2/2]

#define Ifx__max_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 155 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__maxf [1/2]

#define Ifx__maxf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 149 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__maxf [2/2]

#define Ifx__maxf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 149 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__min_stdreal [1/2]

#define Ifx__min_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 154 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__min_stdreal [2/2]

#define Ifx__min_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 154 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__minf [1/2]

#define Ifx__minf | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 148 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__minf [2/2]

#define Ifx__minf | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 148 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__neqf [1/2]

#define Ifx__neqf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) || ((X) < (Y)) )

X != Y

Definition at line 158 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__neqf [2/2]

#define Ifx__neqf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) || ((X) < (Y)) )

X != Y

Definition at line 158 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__roundf [1/2]

#define Ifx__roundf ( X ) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))

Definition at line 146 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__roundf [2/2]

#define Ifx__roundf ( X ) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))

Definition at line 146 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__saturate_stdreal [1/2]

#define Ifx__saturate_stdreal | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )

Definition at line 156 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__saturate_stdreal [2/2]

#define Ifx__saturate_stdreal | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )

Definition at line 156 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__saturatef [1/2]

#define Ifx__saturatef | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minf(Ifx__maxf(X, Min), Max) )

Definition at line 150 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__saturatef [2/2]

#define Ifx__saturatef | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minf(Ifx__maxf(X, Min), Max) )

Definition at line 150 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sqrf [1/2]

#define Ifx__sqrf ( X ) ((X) * (X))

Definition at line 142 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__sqrf [2/2]

#define Ifx__sqrf ( X ) ((X) * (X))

Definition at line 142 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sqrtf [1/2]

#define Ifx__sqrtf ( X ) sqrtf(X)

Definition at line 143 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__sqrtf [2/2]

#define Ifx__sqrtf ( X ) sqrtf(X)

Definition at line 143 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC26B: Fractional Arithmetic Support

Macros | Functions
Fractional Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Fractional Arithmetic Support:

Macros

#define | Ifx__fract_to_sfract Ifx__round16
#define | Ifx__fract_to_sfract Ifx__round16

Functions

IFX_INLINE sint16 | Ifx__clssf (sfract a)
IFX_INLINE float | Ifx__fract_to_float (fract a)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE fract | Ifx__getfract (laccum a)
IFX_INLINE sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
IFX_INLINE sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
IFX_INLINE long | Ifx__mulfractfract (fract a, fract b)
IFX_INLINE long | Ifx__mulfractlong (fract a, long b)
IFX_INLINE sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE sfract | Ifx__s16_to_sfract (sint16 a)
IFX_INLINE sint16 | Ifx__sfract_to_s16 (sfract a)
IFX_INLINE uint16 | Ifx__sfract_to_u16 (sfract a)
__asm__ laccum | Ifx__shaaccum (laccum a, sint32 b)
IFX_INLINE fract | Ifx__shafracts (fract a, sint32 b)
IFX_INLINE sfract | Ifx__shasfracts (sfract a, sint32 b)
IFX_INLINE sfract | Ifx__u16_to_sfract (uint16 a)

Detailed Description

The next table provides an overview of intrinsic functions to convert fractional values. Note that the TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C compiler does support these functions.

Macro Definition Documentation

◆ Ifx__fract_to_sfract [1/2]

#define Ifx__fract_to_sfract Ifx__round16

Definition at line 261 of file IfxCpu_IntrinsicsGhs.h.

Referenced by Ifx__float_to_sfract().

◆ Ifx__fract_to_sfract [2/2]

#define Ifx__fract_to_sfract Ifx__round16

Definition at line 261 of file IfxCpu_IntrinsicsGhs2G.h.

Function Documentation

◆ Ifx__clssf()

IFX_INLINE sint16 Ifx__clssf ( sfract a )

Count the consecutive number of bits that have the same value as bit 15 of an sfract

Definition at line 174 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__float_to_fract()

IFX_INLINE fract Ifx__float_to_fract ( float a )

Convert float to fract

Definition at line 193 of file IfxCpu_IntrinsicsGhs.h.

Referenced by Ifx__float_to_sfract().

◆ Ifx__float_to_sfract()

IFX_INLINE sfract Ifx__float_to_sfract ( float a )

Convert float to sfract

Definition at line 265 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__fract_to_float()

IFX_INLINE float Ifx__fract_to_float ( fract a )

Convert fract to float

Definition at line 184 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getfract()

IFX_INLINE fract Ifx__getfract ( laccum a )

Convert laccum to fract

Definition at line 202 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mac_r_sf()

IFX_INLINE sfract Ifx__mac_r_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add with rounding. Returns the rounded result of ( a + b * c )

Definition at line 211 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mac_sf()

IFX_INLINE sfract Ifx__mac_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add sfract. Returns ( a + b * c )

Definition at line 222 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mulfractfract()

IFX_INLINE long Ifx__mulfractfract | ( | fract | a,
 |  | fract | b
 | ) |  |

Integer part of the multiplication of a fract and a fract

Definition at line 233 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mulfractlong()

IFX_INLINE long Ifx__mulfractlong | ( | fract | a,
 |  | long | b
 | ) |  |

Integer part of the multiplication of a fract and a long

Definition at line 242 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__round16()

IFX_INLINE sfract Ifx__round16 ( fract a )

Convert fract to sfract

Definition at line 251 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__s16_to_sfract()

IFX_INLINE sfract Ifx__s16_to_sfract ( sint16 a )

Convert signed sint16 to sfract

Definition at line 273 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sfract_to_s16()

IFX_INLINE sint16 Ifx__sfract_to_s16 ( sfract a )

Convert sfract to sint16

Definition at line 283 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sfract_to_u16()

IFX_INLINE uint16 Ifx__sfract_to_u16 ( sfract a )

Convert sfract to uint16

Definition at line 293 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__shaaccum()

__asm__ laccum Ifx__shaaccum | ( | laccum | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an __laccum

Definition at line 303 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__shafracts()

IFX_INLINE fract Ifx__shafracts | ( | fract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an fract

Definition at line 320 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__shasfracts()

IFX_INLINE sfract Ifx__shasfracts | ( | sfract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an sfract

Definition at line 329 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__u16_to_sfract()

IFX_INLINE sfract Ifx__u16_to_sfract ( uint16 a )

Convert uint16 to sfract

Definition at line 340 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC26B: Insert / Extract Bit-fields and Bits

Macros | Functions
Insert / Extract Bit-fields and Bits
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Insert / Extract Bit-fields and Bits:

Macros

#define | Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
#define | Ifx__imaskldmst(address, value, bitoffset, bits) __imaskldmst((int *)address, value, bitoffset, bits)
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address, value, bitoffset,1)
#define | Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
#define | Ifx__imaskldmst(address, value, bitoffset, bits) __imaskldmst((int *)address, value, bitoffset, bits)
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address, value, bitoffset,1)

Functions

IFX_INLINE sint32 | Ifx__extr (sint32 a, uint32 p, uint32 w)
IFX_INLINE uint32 | Ifx__extru (uint32 a, uint32 p, uint32 w)
IFX_INLINE sint32 | Ifx__insert (sint32 a, sint32 b, sint32 p, const sint32 w)

Detailed Description

Macro Definition Documentation

◆ Ifx__getbit [1/2]

#define Ifx__getbit | ( | address,
 |  | bitoffset
 | ) | ((*(address) & (1U << (bitoffset))) != 0)

Load a single bit.

Definition at line 382 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getbit [2/2]

#define Ifx__getbit | ( | address,
 |  | bitoffset
 | ) | ((*(address) & (1U << (bitoffset))) != 0)

Load a single bit.

Definition at line 382 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__imaskldmst [1/2]

#define Ifx__imaskldmst | ( | address,
 |  | value,
 |  | bitoffset,
 |  | bits
 | ) | __imaskldmst((int *)address, value, bitoffset, bits)

Atomic load-modify-store.

Definition at line 386 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__imaskldmst [2/2]

#define Ifx__imaskldmst | ( | address,
 |  | value,
 |  | bitoffset,
 |  | bits
 | ) | __imaskldmst((int *)address, value, bitoffset, bits)

Atomic load-modify-store.

Definition at line 386 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__putbit [1/2]

#define Ifx__putbit | ( | value,
 |  | address,
 |  | bitoffset
 | ) | Ifx__imaskldmst(address, value, bitoffset,1)

Store a single bit.

Definition at line 402 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__putbit [2/2]

#define Ifx__putbit | ( | value,
 |  | address,
 |  | bitoffset
 | ) | Ifx__imaskldmst(address, value, bitoffset,1)

Store a single bit.

Definition at line 402 of file IfxCpu_IntrinsicsGhs2G.h.

Function Documentation

◆ Ifx__extr()

IFX_INLINE sint32 Ifx__extr | ( | sint32 | a,
 |  | uint32 | p,
 |  | uint32 | w
 | ) |  |

Extract a bit-field (bit pos to bit pos+width) from value

Definition at line 357 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extru()

IFX_INLINE uint32 Ifx__extru | ( | uint32 | a,
 |  | uint32 | p,
 |  | uint32 | w
 | ) |  |

Same as __extr() but return bit-field as unsigned integer

Definition at line 369 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insert()

IFX_INLINE sint32 Ifx__insert | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | p,
 |  | const sint32 | w
 | ) |  |

Extract bit-field (width bits starting at bit 0) from src and insert it in trg at pos.

Definition at line 390 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC26B: Interrupt Handling

Interrupt Handling
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Interrupt Handling:

The next table provides an overview of the intrinsic functions to read or set interrupt handling.


iLLD_TC26B: Miscellaneous Intrinsic Functions

Functions
Miscellaneous Intrinsic Functions
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Miscellaneous Intrinsic Functions:

Functions

IFX_INLINE void | Ifx__cacheawi (uint8 *p)
IFX_INLINE void | Ifx__cacheiwi (uint8 *p)
IFX_INLINE uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
IFX_INLINE sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
IFX_INLINE uint32 | Ifx__rol (uint32 operand, uint32 count)
IFX_INLINE uint32 | Ifx__ror (uint32 operand, uint32 count)

Detailed Description

Function Documentation

◆ Ifx__cacheawi()

IFX_INLINE void Ifx__cacheawi ( uint8 * p )

Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].

Definition at line 421 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__cacheawi_bo_post_inc()

IFX_INLINE uint8* Ifx__cacheawi_bo_post_inc ( uint8 * p )

Write back and invalidate cache address "p" and return post incremented value of "p". Generates CACHEA.WI [Ab+].

Definition at line 435 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__cacheiwi()

IFX_INLINE void Ifx__cacheiwi ( uint8 * p )

Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].

Definition at line 427 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mulsc()

IFX_INLINE sint32 Ifx__mulsc | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | offset
 | ) |  |

Multiply two 32-bit numbers to an intermediate 64-bit result, and scale back the result to 32 bits. To scale back the result, 32 bits are extracted from the intermediate 64-bit result: bit 63-offset to bit 31-offset.

Definition at line 445 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__rol()

IFX_INLINE uint32 Ifx__rol | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).

Definition at line 456 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__ror()

IFX_INLINE uint32 Ifx__ror | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).

Definition at line 465 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC26B: Packed Data Type Support

Functions
Packed Data Type Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Packed Data Type Support:

Functions

IFX_INLINE sint8 | Ifx__extractbyte1 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte2 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte3 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte4 (__packb a)
IFX_INLINE sint16 | Ifx__extracthw1 (__packhw a)
IFX_INLINE sint16 | Ifx__extracthw2 (__packhw a)
IFX_INLINE uint8 | Ifx__extractubyte1 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte2 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte3 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte4 (__upackb a)
IFX_INLINE uint16 | Ifx__extractuhw1 (__upackhw a)
IFX_INLINE uint16 | Ifx__extractuhw2 (__upackhw a)
IFX_INLINE sint8 | Ifx__getbyte1 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte2 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte3 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte4 (__packb *a)
IFX_INLINE sint16 | Ifx__gethw1 (__packhw *a)
IFX_INLINE sint16 | Ifx__gethw2 (__packhw *a)
IFX_INLINE uint8 | Ifx__getubyte1 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte2 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte3 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte4 (__upackb *a)
IFX_INLINE uint16 | Ifx__getuhw1 (__upackhw *a)
IFX_INLINE uint16 | Ifx__getuhw2 (__upackhw *a)
IFX_INLINE __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
IFX_INLINE __packb | Ifx__initpackbl (long a)
IFX_INLINE __packhw | Ifx__initpackhw (sint16 a, sint16 b)
IFX_INLINE __packhw | Ifx__initpackhwl (long a)
IFX_INLINE __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
IFX_INLINE __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
IFX_INLINE __packb | Ifx__insertbyte1 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte2 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte3 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte4 (__packb a, sint8 b)
IFX_INLINE __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
IFX_INLINE __packhw | Ifx__inserthw1 (__packhw a, sint16 b)
IFX_INLINE __packhw | Ifx__inserthw2 (__packhw a, sint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
IFX_INLINE void | Ifx__setbyte1 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte2 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte3 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte4 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__sethw1 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__sethw2 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__setubyte1 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte2 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte3 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte4 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setuhw1 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__setuhw2 (__upackhw *a, uint16 b)

Detailed Description

The next table provides an overview of the intrinsic functions for initialization of packed data type.

Function Documentation

◆ Ifx__extractbyte1()

IFX_INLINE sint8 Ifx__extractbyte1 ( __packb a )

Extract first byte from a __packb

Definition at line 483 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractbyte2()

IFX_INLINE sint8 Ifx__extractbyte2 ( __packb a )

Extract second byte from a __packb

Definition at line 493 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractbyte3()

IFX_INLINE sint8 Ifx__extractbyte3 ( __packb a )

Extract third byte from a __packb

Definition at line 503 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractbyte4()

IFX_INLINE sint8 Ifx__extractbyte4 ( __packb a )

Extract fourth byte from a __packb

Definition at line 513 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extracthw1()

IFX_INLINE sint16 Ifx__extracthw1 ( __packhw a )

Extract first sint16 from a __packhw

Definition at line 523 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extracthw2()

IFX_INLINE sint16 Ifx__extracthw2 ( __packhw a )

Extract second sint16 from a __packhw

Definition at line 533 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractubyte1()

IFX_INLINE uint8 Ifx__extractubyte1 ( __upackb a )

Extract first uint8 from a __packb

Definition at line 543 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractubyte2()

IFX_INLINE uint8 Ifx__extractubyte2 ( __upackb a )

Extract second uint8 from a __packb

Definition at line 553 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractubyte3()

IFX_INLINE uint8 Ifx__extractubyte3 ( __upackb a )

Extract third uint8 from a __packb

Definition at line 563 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractubyte4()

IFX_INLINE uint8 Ifx__extractubyte4 ( __upackb a )

Extract fourth uint8 from a __packb

Definition at line 573 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractuhw1()

IFX_INLINE uint16 Ifx__extractuhw1 ( __upackhw a )

Extract first uint16 from a __packhw

Definition at line 583 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractuhw2()

IFX_INLINE uint16 Ifx__extractuhw2 ( __upackhw a )

Extract second uint16 from a __packhw

Definition at line 593 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getbyte1()

IFX_INLINE sint8 Ifx__getbyte1 ( __packb * a )

Extract first byte from a __packb

Definition at line 603 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getbyte2()

IFX_INLINE sint8 Ifx__getbyte2 ( __packb * a )

Extract second byte from a __packb

Definition at line 615 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getbyte3()

IFX_INLINE sint8 Ifx__getbyte3 ( __packb * a )

Extract third byte from a __packb

Definition at line 627 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getbyte4()

IFX_INLINE sint8 Ifx__getbyte4 ( __packb * a )

Extract fourth byte from a __packb

Definition at line 639 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__gethw1()

IFX_INLINE sint16 Ifx__gethw1 ( __packhw * a )

Extract first sint16 from a __packhw

Definition at line 651 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__gethw2()

IFX_INLINE sint16 Ifx__gethw2 ( __packhw * a )

Extract second sint16 from a __packhw

Definition at line 661 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getubyte1()

IFX_INLINE uint8 Ifx__getubyte1 ( __upackb * a )

Extract first uint8 from a __packb

Definition at line 672 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getubyte2()

IFX_INLINE uint8 Ifx__getubyte2 ( __upackb * a )

Extract second uint8 from a __packb

Definition at line 683 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getubyte3()

IFX_INLINE uint8 Ifx__getubyte3 ( __upackb * a )

Extract third uint8 from a __packb

Definition at line 694 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getubyte4()

IFX_INLINE uint8 Ifx__getubyte4 ( __upackb * a )

Extract fourth uint8 from a __packb

Definition at line 705 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getuhw1()

IFX_INLINE uint16 Ifx__getuhw1 ( __upackhw * a )

Extract first uint16 from a __packhw

Definition at line 716 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getuhw2()

IFX_INLINE uint16 Ifx__getuhw2 ( __upackhw * a )

Extract second uint16 from a __packhw

Definition at line 727 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initpackb()

IFX_INLINE __packb Ifx__initpackb | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | c,
 |  | sint32 | d
 | ) |  |

Initialize __packb with four integers

Definition at line 738 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initpackbl()

IFX_INLINE __packb Ifx__initpackbl ( long a )

Initialize __packb with a long integer

Definition at line 750 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initpackhw()

IFX_INLINE __packhw Ifx__initpackhw | ( | sint16 | a,
 |  | sint16 | b
 | ) |  |

Initialize __packhw with two integers

Definition at line 757 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initpackhwl()

IFX_INLINE __packhw Ifx__initpackhwl ( long a )

Initialize __packhw with a long integer

Definition at line 767 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initupackb()

IFX_INLINE __upackb Ifx__initupackb | ( | uint32 | a,
 |  | uint32 | b,
 |  | uint32 | c,
 |  | uint32 | d
 | ) |  |

Initialize __packb with four unsigned integers

Definition at line 774 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initupackhw()

IFX_INLINE __upackhw Ifx__initupackhw | ( | uint16 | a,
 |  | uint16 | b
 | ) |  |

Initialize __packhw with two unsigned integers

Definition at line 786 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertbyte1()

IFX_INLINE __packb Ifx__insertbyte1 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into first byte of a __packb

Definition at line 796 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertbyte2()

IFX_INLINE __packb Ifx__insertbyte2 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into second byte of a __packb

Definition at line 806 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertbyte3()

IFX_INLINE __packb Ifx__insertbyte3 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into third byte of a __packb

Definition at line 816 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertbyte4()

IFX_INLINE __packb Ifx__insertbyte4 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into fourth byte of a __packb

Definition at line 826 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__inserthw1()

IFX_INLINE __packhw Ifx__inserthw1 | ( | __packhw | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into first halfword of a __packhw

Definition at line 876 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__inserthw2()

IFX_INLINE __packhw Ifx__inserthw2 | ( | __packhw | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into second halfword of a __packhw

Definition at line 886 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertubyte1()

IFX_INLINE __upackb Ifx__insertubyte1 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into first uint8 of a __packb

Definition at line 836 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertubyte2()

IFX_INLINE __upackb Ifx__insertubyte2 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into second uint8 of a __packb

Definition at line 846 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertubyte3()

IFX_INLINE __upackb Ifx__insertubyte3 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into third uint8 of a __packb

Definition at line 856 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertubyte4()

IFX_INLINE __upackb Ifx__insertubyte4 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into fourth uint8 of a __packb

Definition at line 866 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertuhw1()

IFX_INLINE __upackhw Ifx__insertuhw1 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 896 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertuhw2()

IFX_INLINE __upackhw Ifx__insertuhw2 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 906 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setbyte1()

IFX_INLINE void Ifx__setbyte1 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into first byte of a __packb

Definition at line 916 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setbyte2()

IFX_INLINE void Ifx__setbyte2 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into second byte of a __packb

Definition at line 926 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setbyte3()

IFX_INLINE void Ifx__setbyte3 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into third byte of a __packb

Definition at line 936 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setbyte4()

IFX_INLINE void Ifx__setbyte4 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into fourth byte of a __packb

Definition at line 946 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sethw1()

IFX_INLINE void Ifx__sethw1 | ( | __packhw * | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into first halfword of a __packhw

Definition at line 956 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sethw2()

IFX_INLINE void Ifx__sethw2 | ( | __packhw * | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into second halfword of a __packhw

Definition at line 966 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setubyte1()

IFX_INLINE void Ifx__setubyte1 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into first byte of a __upackb

Definition at line 976 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setubyte2()

IFX_INLINE void Ifx__setubyte2 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into second byte of a __upackb

Definition at line 986 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setubyte3()

IFX_INLINE void Ifx__setubyte3 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into third byte of a __upackb

Definition at line 996 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setubyte4()

IFX_INLINE void Ifx__setubyte4 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into fourth byte of a __upackb

Definition at line 1006 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setuhw1()

IFX_INLINE void Ifx__setuhw1 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 1016 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setuhw2()

IFX_INLINE void Ifx__setuhw2 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 1026 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC26B: Insert Single Assembly Instruction

Macros | Functions
Insert Single Assembly Instruction
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Insert Single Assembly Instruction:

Macros

#define | Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
#define | Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")

Functions

IFX_INLINE void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE uint32 | Ifx__swap (void *place, uint32 value)

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to insert a single assembly instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used assembly instructions.

Macro Definition Documentation

◆ Ifx__NOP [1/2]

#define Ifx__NOP ( n ) __asm(".rept " #n "\n\tnop\n\t.endr\n")

Insert n NOP instruction

Definition at line 1072 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__NOP [2/2]

#define Ifx__NOP ( n ) __asm(".rept " #n "\n\tnop\n\t.endr\n")

Insert n NOP instruction

Definition at line 1072 of file IfxCpu_IntrinsicsGhs2G.h.

Function Documentation

◆ Ifx__ldmst()

IFX_INLINE void Ifx__ldmst | ( | volatile void * | address,
 |  | uint32 | mask,
 |  | uint32 | value
 | ) |  |

Insert LDMST instruction. Note that all operands must be word-aligned.

Definition at line 1046 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__nops()

IFX_INLINE void Ifx__nops ( void * cnt )

Insert a loop over cnt NOP instruction

Definition at line 1054 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__swap()

IFX_INLINE uint32 Ifx__swap | ( | void * | place,
 |  | uint32 | value
 | ) |  |

Insert SWAP instruction. Note that all operands must be word-aligned.

Definition at line 1063 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC26B: Intrinsics for GNU compiler

Modules
Intrinsics for GNU compiler
iLLD » CPU » Standard Driver » Intrinsics
Collaboration diagram for Intrinsics for GNU compiler:

Modules

Cross type arithmetic operation
Signed integer operation
Unsigned integer operation
Minimum and Maximum of (sint16) Integers
Floating point operation
Fractional Arithmetic Support
Insert / Extract Bit-fields and Bits
Interrupt Handling
Miscellaneous Intrinsic Functions
Packed Data Type Support
Register Handling
Saturation Arithmetic Support
Insert Single Assembly Instruction

Detailed Description


iLLD_TC26B: Cross type arithmetic operation

Macros
Cross type arithmetic operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Cross type arithmetic operation:

Macros

#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))

Detailed Description

Macro compatible with float, fix point, signed integer and unsigned integer

Macro Definition Documentation

◆ Ifx__checkrangeX [1/2]

#define Ifx__checkrangeX | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 123 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__checkrangeX [2/2]

#define Ifx__checkrangeX | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 123 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__maxX [1/2]

#define Ifx__maxX | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 121 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__maxX [2/2]

#define Ifx__maxX | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 121 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__minX [1/2]

#define Ifx__minX | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 120 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__minX [2/2]

#define Ifx__minX | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 120 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__saturateX [1/2]

#define Ifx__saturateX | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minX(Ifx__maxX(X, Min), Max) )

Definition at line 122 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__saturateX [2/2]

#define Ifx__saturateX | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minX(Ifx__maxX(X, Min), Max) )

Definition at line 122 of file IfxCpu_IntrinsicsGnuc2G.h.


iLLD_TC26B: Signed integer operation

Macros
Signed integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Signed integer operation:

Macros

#define | Ifx__saturate(X, Min, Max) ( Ifx__min(Ifx__max(X, Min), Max) )
#define | Ifx__saturate(X, Min, Max) ( Ifx__min(Ifx__max(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturate [1/2]

#define Ifx__saturate | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min(Ifx__max(X, Min), Max) )

Definition at line 130 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__saturate [2/2]

#define Ifx__saturate | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min(Ifx__max(X, Min), Max) )

Definition at line 130 of file IfxCpu_IntrinsicsGnuc2G.h.


iLLD_TC26B: Unsigned integer operation

Macros
Unsigned integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Unsigned integer operation:

Macros

#define | Ifx__saturateu(X, Min, Max) ( Ifx__minu(Ifx__maxu(X, Min), Max) )
#define | Ifx__saturateu(X, Min, Max) ( Ifx__minu(Ifx__maxu(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturateu [1/2]

#define Ifx__saturateu | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minu(Ifx__maxu(X, Min), Max) )

Definition at line 137 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__saturateu [2/2]

#define Ifx__saturateu | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minu(Ifx__maxu(X, Min), Max) )

Definition at line 137 of file IfxCpu_IntrinsicsGnuc2G.h.


iLLD_TC26B: Minimum and Maximum of (sint16) Integers

Functions
Minimum and Maximum of (sint16) Integers
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Minimum and Maximum of (sint16) Integers:

Functions

IFX_INLINE sint32 | Ifx__max (sint32 a, sint32 b)
IFX_INLINE sint32 | Ifx__maxs (sint16 a, sint16 b)
IFX_INLINE uint32 | Ifx__maxu (uint32 a, uint32 b)
IFX_INLINE sint32 | Ifx__min (sint32 a, sint32 b)
IFX_INLINE sint16 | Ifx__mins (sint16 a, sint16 b)
IFX_INLINE uint32 | Ifx__minu (uint32 a, uint32 b)

Detailed Description

These intrinsic functions return the minimum or maximum of a sint16, uint16 or sint16

Function Documentation

◆ Ifx__max()

IFX_INLINE sint32 Ifx__max | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

Return maximum of two integers

Definition at line 148 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__maxs()

IFX_INLINE sint32 Ifx__maxs | ( | sint16 | a,
 |  | sint16 | b
 | ) |  |

Return maximum of two sint16

Definition at line 157 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__maxu()

IFX_INLINE uint32 Ifx__maxu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

Return maximum of two unsigned integers

Definition at line 165 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__min()

IFX_INLINE sint32 Ifx__min | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

Return minimum of two integers

Definition at line 174 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mins()

IFX_INLINE sint16 Ifx__mins | ( | sint16 | a,
 |  | sint16 | b
 | ) |  |

Return minimum of two sint16

Definition at line 183 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minu()

IFX_INLINE uint32 Ifx__minu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

Return minimum of two unsigned integers

Definition at line 192 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Floating point operation

Macros
Floating point operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Floating point operation:

Macros

#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )

Detailed Description

Macro Definition Documentation

◆ Ifx__abs_stdreal [1/2]

#define Ifx__abs_stdreal ( X ) ( ((X) > 0.0) ? (X) : -(X) )

Definition at line 217 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__abs_stdreal [2/2]

#define Ifx__abs_stdreal ( X ) ( ((X) > 0.0) ? (X) : -(X) )

Definition at line 217 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__absf [1/2]

#define Ifx__absf ( X ) ( ((X) < 0.0) ? -(X) : (X) )

Definition at line 211 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__absf [2/2]

#define Ifx__absf ( X ) ( ((X) < 0.0) ? -(X) : (X) )

Definition at line 211 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__checkrange [1/2]

#define Ifx__checkrange | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 208 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__checkrange [2/2]

#define Ifx__checkrange | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 208 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__checkrangef [1/2]

#define Ifx__checkrangef | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 215 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__checkrangef [2/2]

#define Ifx__checkrangef | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 215 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__geqf [1/2]

#define Ifx__geqf | ( | X,
 |  | Y
 | ) | ( !((X) < (Y)) )

X >= Y

Definition at line 224 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__geqf [2/2]

#define Ifx__geqf | ( | X,
 |  | Y
 | ) | ( !((X) < (Y)) )

X >= Y

Definition at line 224 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__leqf [1/2]

#define Ifx__leqf | ( | X,
 |  | Y
 | ) | ( !((X) > (Y)) )

X <= Y

Definition at line 223 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__leqf [2/2]

#define Ifx__leqf | ( | X,
 |  | Y
 | ) | ( !((X) > (Y)) )

X <= Y

Definition at line 223 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__max_stdreal [1/2]

#define Ifx__max_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 219 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__max_stdreal [2/2]

#define Ifx__max_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 219 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__maxf [1/2]

#define Ifx__maxf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 213 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__maxf [2/2]

#define Ifx__maxf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 213 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__min_stdreal [1/2]

#define Ifx__min_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 218 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__min_stdreal [2/2]

#define Ifx__min_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 218 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__minf [1/2]

#define Ifx__minf | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 212 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minf [2/2]

#define Ifx__minf | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 212 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__neqf [1/2]

#define Ifx__neqf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) || ((X) < (Y)) )

X != Y

Definition at line 222 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__neqf [2/2]

#define Ifx__neqf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) || ((X) < (Y)) )

X != Y

Definition at line 222 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__roundf [1/2]

#define Ifx__roundf ( X ) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))

Definition at line 210 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__roundf [2/2]

#define Ifx__roundf ( X ) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))

Definition at line 210 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__saturate_stdreal [1/2]

#define Ifx__saturate_stdreal | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )

Definition at line 220 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__saturate_stdreal [2/2]

#define Ifx__saturate_stdreal | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )

Definition at line 220 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__saturatef [1/2]

#define Ifx__saturatef | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minf(Ifx__maxf(X, Min), Max) )

Definition at line 214 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__saturatef [2/2]

#define Ifx__saturatef | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minf(Ifx__maxf(X, Min), Max) )

Definition at line 214 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sqrf [1/2]

#define Ifx__sqrf ( X ) ((X) * (X))

Definition at line 206 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__sqrf [2/2]

#define Ifx__sqrf ( X ) ((X) * (X))

Definition at line 206 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sqrtf [1/2]

#define Ifx__sqrtf ( X ) sqrtf(X)

Definition at line 207 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__sqrtf [2/2]

#define Ifx__sqrtf ( X ) sqrtf(X)

Definition at line 207 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Fractional Arithmetic Support

Functions
Fractional Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Fractional Arithmetic Support:

Functions

IFX_INLINE sint16 | Ifx__clssf (sfract a)
IFX_INLINE float | Ifx__fract_to_float (fract a)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE sfract | Ifx__fract_to_sfract (fract a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE fract | Ifx__getfract (laccum a)
IFX_INLINE sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
IFX_INLINE sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
IFX_INLINE long | Ifx__mulfractfract (fract a, fract b)
IFX_INLINE long | Ifx__mulfractlong (fract a, long b)
IFX_INLINE sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | Ifx__s16_to_sfract (sint16 a)
IFX_INLINE sint16 | Ifx__sfract_to_s16 (sfract a)
IFX_INLINE uint16 | Ifx__sfract_to_u16 (sfract a)
IFX_INLINE laccum | Ifx__shaaccum (laccum a, sint32 b)
IFX_INLINE fract | Ifx__shafracts (fract a, sint32 b)
IFX_INLINE sfract | Ifx__shasfracts (sfract a, sint32 b)
IFX_INLINE sfract | Ifx__u16_to_sfract (uint16 a)

Detailed Description

The next table provides an overview of intrinsic functions to convert fractional values. Note that the TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C compiler does support these functions.

Function Documentation

◆ Ifx__clssf()

IFX_INLINE sint16 Ifx__clssf ( sfract a )

Count the consecutive number of bits that have the same value as bit 15 of an sfract

Definition at line 238 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__float_to_fract()

IFX_INLINE fract Ifx__float_to_fract ( float a )

Convert float to fract

Definition at line 257 of file IfxCpu_IntrinsicsGnuc.h.

Referenced by Ifx__float_to_sfract().

◆ Ifx__float_to_sfract()

IFX_INLINE sfract Ifx__float_to_sfract ( float a )

Convert float to sfract

Definition at line 278 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__fract_to_float()

IFX_INLINE float Ifx__fract_to_float ( fract a )

Convert fract to float

Definition at line 248 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__fract_to_sfract()

IFX_INLINE sfract Ifx__fract_to_sfract ( fract a )

Convert fract to sfract

Definition at line 266 of file IfxCpu_IntrinsicsGnuc.h.

Referenced by Ifx__float_to_sfract().

◆ Ifx__getfract()

IFX_INLINE fract Ifx__getfract ( laccum a )

Convert laccum to fract

Definition at line 286 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mac_r_sf()

IFX_INLINE sfract Ifx__mac_r_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add with rounding. Returns the rounded result of ( a + b * c )

Definition at line 295 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mac_sf()

IFX_INLINE sfract Ifx__mac_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add sfract. Returns ( a + b * c )

Definition at line 306 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mulfractfract()

IFX_INLINE long Ifx__mulfractfract | ( | fract | a,
 |  | fract | b
 | ) |  |

Integer part of the multiplication of a fract and a fract

Definition at line 317 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mulfractlong()

IFX_INLINE long Ifx__mulfractlong | ( | fract | a,
 |  | long | b
 | ) |  |

Integer part of the multiplication of a fract and a long

Definition at line 326 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__round16()

IFX_INLINE sfract Ifx__round16 ( fract a )

Convert fract to sfract

Definition at line 335 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__s16_to_sfract()

IFX_INLINE sfract Ifx__s16_to_sfract ( sint16 a )

Convert signed sint16 to sfract

Definition at line 348 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sfract_to_s16()

IFX_INLINE sint16 Ifx__sfract_to_s16 ( sfract a )

Convert sfract to sint16

Definition at line 358 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sfract_to_u16()

IFX_INLINE uint16 Ifx__sfract_to_u16 ( sfract a )

Convert sfract to uint16

Definition at line 368 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__shaaccum()

IFX_INLINE laccum Ifx__shaaccum | ( | laccum | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an laccum

Definition at line 378 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__shafracts()

IFX_INLINE fract Ifx__shafracts | ( | fract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an fract

Definition at line 395 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__shasfracts()

IFX_INLINE sfract Ifx__shasfracts | ( | sfract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an sfract

Definition at line 404 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__u16_to_sfract()

IFX_INLINE sfract Ifx__u16_to_sfract ( uint16 a )

Convert uint16 to sfract

Definition at line 413 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Insert / Extract Bit-fields and Bits

Macros | Functions
Insert / Extract Bit-fields and Bits
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Insert / Extract Bit-fields and Bits:

Macros

#define | Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
#define | Ifx__imaskldmst(address, value, bitoffset, bits)
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address, value, bitoffset,1)
#define | Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
#define | Ifx__imaskldmst(address, value, bitoffset, bits)
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address, value, bitoffset,1)

Functions

IFX_INLINE sint32 | Ifx__extr (sint32 a, uint32 p, uint32 w)
IFX_INLINE uint32 | Ifx__extru (uint32 a, uint32 p, uint32 w)
IFX_INLINE sint32 | Ifx__ins (sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
IFX_INLINE sint32 | Ifx__insert (sint32 a, sint32 b, sint32 p, const sint32 w)
IFX_INLINE sint32 | Ifx__insn (sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)

Detailed Description

Macro Definition Documentation

◆ Ifx__getbit [1/2]

#define Ifx__getbit | ( | address,
 |  | bitoffset
 | ) | ((*(address) & (1U << (bitoffset))) != 0)

Load a single bit.

Definition at line 455 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getbit [2/2]

#define Ifx__getbit | ( | address,
 |  | bitoffset
 | ) | ((*(address) & (1U << (bitoffset))) != 0)

Load a single bit.

Definition at line 455 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__imaskldmst [1/2]

#define Ifx__imaskldmst | ( | address,
 |  | value,
 |  | bitoffset,
 |  | bits
 | ) |
Value:
{long long tmp;\
__asm__("imask %A0,%1,%2,%3"\
:"=d"((long long)tmp)\
:"d"(value),"d"(bitoffset),"i"(bits): "memory");\
__asm__("ldmst [%0]0,%A1"::"a"(address),"d"(tmp): "memory");}

Atomic load-modify-store.

Definition at line 459 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__imaskldmst [2/2]

#define Ifx__imaskldmst | ( | address,
 |  | value,
 |  | bitoffset,
 |  | bits
 | ) |
Value:
{long long tmp;\
__asm__("imask %A0,%1,%2,%3"\
:"=d"((long long)tmp)\
:"d"(value),"d"(bitoffset),"i"(bits): "memory");\
__asm__("ldmst [%0]0,%A1"::"a"(address),"d"(tmp): "memory");}

Atomic load-modify-store.

Definition at line 459 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__putbit [1/2]

#define Ifx__putbit | ( | value,
 |  | address,
 |  | bitoffset
 | ) | Ifx__imaskldmst(address, value, bitoffset,1)

Store a single bit.

Definition at line 498 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__putbit [2/2]

#define Ifx__putbit | ( | value,
 |  | address,
 |  | bitoffset
 | ) | Ifx__imaskldmst(address, value, bitoffset,1)

Store a single bit.

Definition at line 498 of file IfxCpu_IntrinsicsGnuc2G.h.

Function Documentation

◆ Ifx__extr()

IFX_INLINE sint32 Ifx__extr | ( | sint32 | a,
 |  | uint32 | p,
 |  | uint32 | w
 | ) |  |

Extract a bit-field (bit pos to bit pos+width) from value

Definition at line 430 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extru()

IFX_INLINE uint32 Ifx__extru | ( | uint32 | a,
 |  | uint32 | p,
 |  | uint32 | w
 | ) |  |

Same as __extr() but return bit-field as unsigned integer

Definition at line 442 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__ins()

IFX_INLINE sint32 Ifx__ins | ( | sint32 | trg,
 |  | const sint32 | trgbit,
 |  | sint32 | src,
 |  | const sint32 | srcbit
 | ) |  |

Return trg but replace trgbit by srcbit in src.

Definition at line 468 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insert()

IFX_INLINE sint32 Ifx__insert | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | p,
 |  | const sint32 | w
 | ) |  |

Extract bit-field (width bits starting at bit 0) from src and insert it in trg at pos.

Definition at line 477 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insn()

IFX_INLINE sint32 Ifx__insn | ( | sint32 | trg,
 |  | const sint32 | trgbit,
 |  | sint32 | src,
 |  | const sint32 | srcbit
 | ) |  |

Return trg but replace trgbit by inverse of srcbit in src.

Definition at line 489 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Interrupt Handling

Macros | Functions
Interrupt Handling
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Interrupt Handling:

Macros

#define | Ifx__disable() __asm__ volatile ("disable" : : : "memory")
#define | Ifx__enable() __asm__ volatile ("enable" : : : "memory")
#define | Ifx__disable() __asm__ volatile ("disable" : : : "memory")
#define | Ifx__enable() __asm__ volatile ("enable" : : : "memory")

Functions

IFX_INLINE sint32 | Ifx__disable_and_save (void)
IFX_INLINE void | Ifx__restore (sint32 ie)

Detailed Description

The next table provides an overview of the intrinsic functions to read or set interrupt handling.

Macro Definition Documentation

◆ Ifx__disable [1/2]

#define Ifx__disable ( ) __asm__ volatile ("disable" : : : "memory")

Disable interrupts. Only supported for TriCore1

Definition at line 516 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__disable [2/2]

#define Ifx__disable ( ) __asm__ volatile ("disable" : : : "memory")

Disable interrupts. Only supported for TriCore1

Definition at line 516 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__enable [1/2]

#define Ifx__enable ( ) __asm__ volatile ("enable" : : : "memory")

Enable interrupts immediately at function entry

Definition at line 529 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__enable [2/2]

#define Ifx__enable ( ) __asm__ volatile ("enable" : : : "memory")

Enable interrupts immediately at function entry

Definition at line 529 of file IfxCpu_IntrinsicsGnuc.h.

Function Documentation

◆ Ifx__disable_and_save()

IFX_INLINE sint32 Ifx__disable_and_save ( void )

Disable interrupts and return previous interrupt state (enabled or disabled). Direct supported for TriCore1.6. Emulated on TC1.3.1

Definition at line 520 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__restore()

IFX_INLINE void Ifx__restore ( sint32 ie )

Restore interrupt state. Direct supported for TriCore1.6. Emulated on TC1.3.1

Definition at line 533 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Miscellaneous Intrinsic Functions

Functions
Miscellaneous Intrinsic Functions
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Miscellaneous Intrinsic Functions:

Functions

IFX_INLINE void | Ifx__cacheawi (uint8 *p)
IFX_INLINE void | Ifx__cacheiwi (uint8 *p)
IFX_INLINE uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
IFX_INLINE sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
IFX_INLINE uint32 | Ifx__rol (uint32 operand, uint32 count)
IFX_INLINE uint32 | Ifx__ror (uint32 operand, uint32 count)

Detailed Description

Function Documentation

◆ Ifx__cacheawi()

IFX_INLINE void Ifx__cacheawi ( uint8 * p )

Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].

Definition at line 554 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__cacheawi_bo_post_inc()

IFX_INLINE uint8* Ifx__cacheawi_bo_post_inc ( uint8 * p )

Write back and invalidate cache address "p" and return post incremented value of "p". Generates CACHEA.WI [Ab+].

Definition at line 568 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__cacheiwi()

IFX_INLINE void Ifx__cacheiwi ( uint8 * p )

Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].

Definition at line 560 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mulsc()

IFX_INLINE sint32 Ifx__mulsc | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | offset
 | ) |  |

Multiply two 32-bit numbers to an intermediate 64-bit result, and scale back the result to 32 bits. To scale back the result, 32 bits are extracted from the intermediate 64-bit result: bit 63-offset to bit 31-offset.

Definition at line 578 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__rol()

IFX_INLINE uint32 Ifx__rol | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).

Definition at line 589 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__ror()

IFX_INLINE uint32 Ifx__ror | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).

Definition at line 598 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Packed Data Type Support

Functions
Packed Data Type Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Packed Data Type Support:

Functions

IFX_INLINE __packb | Ifx__absb (__packb a)
IFX_INLINE __packhw | Ifx__absh (__packhw a)
IFX_INLINE __packhw | Ifx__abssh (__packhw a)
IFX_INLINE sint8 | Ifx__extractbyte1 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte2 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte3 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte4 (__packb a)
IFX_INLINE sint16 | Ifx__extracthw1 (__packhw a)
IFX_INLINE sint16 | Ifx__extracthw2 (__packhw a)
IFX_INLINE uint8 | Ifx__extractubyte1 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte2 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte3 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte4 (__upackb a)
IFX_INLINE uint16 | Ifx__extractuhw1 (__upackhw a)
IFX_INLINE uint16 | Ifx__extractuhw2 (__upackhw a)
IFX_INLINE sint8 | Ifx__getbyte1 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte2 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte3 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte4 (__packb *a)
IFX_INLINE sint16 | Ifx__gethw1 (__packhw *a)
IFX_INLINE sint16 | Ifx__gethw2 (__packhw *a)
IFX_INLINE uint8 | Ifx__getubyte1 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte2 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte3 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte4 (__upackb *a)
IFX_INLINE uint16 | Ifx__getuhw1 (__upackhw *a)
IFX_INLINE uint16 | Ifx__getuhw2 (__upackhw *a)
IFX_INLINE __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
IFX_INLINE __packb | Ifx__initpackbl (long a)
IFX_INLINE __packhw | Ifx__initpackhw (sint16 a, sint16 b)
IFX_INLINE __packhw | Ifx__initpackhwl (long a)
IFX_INLINE __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
IFX_INLINE __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
IFX_INLINE __packb | Ifx__insertbyte1 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte2 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte3 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte4 (__packb a, sint8 b)
IFX_INLINE __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
IFX_INLINE __packhw | Ifx__inserthw1 (__packhw a, sint16 b)
IFX_INLINE __packhw | Ifx__inserthw2 (__packhw a, sint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
IFX_INLINE __packb | Ifx__minb (__packb a, __packb b)
IFX_INLINE __upackb | Ifx__minbu (__upackb a, __upackb b)
IFX_INLINE __packhw | Ifx__minh (__packhw a, __packhw b)
IFX_INLINE __upackhw | Ifx__minhu (__upackhw a, __upackhw b)
IFX_INLINE void | Ifx__setbyte1 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte2 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte3 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte4 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__sethw1 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__sethw2 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__setubyte1 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte2 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte3 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte4 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setuhw1 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__setuhw2 (__upackhw *a, uint16 b)

Detailed Description

The next table provides an overview of the intrinsic functions for initialization of packed data type.

Function Documentation

◆ Ifx__absb()

IFX_INLINE __packb Ifx__absb ( __packb a )

Absolute value of __packb

Definition at line 616 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__absh()

IFX_INLINE __packhw Ifx__absh ( __packhw a )

Absolute value of __packhw

Definition at line 626 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__abssh()

IFX_INLINE __packhw Ifx__abssh ( __packhw a )

Absolute value of __packhw using saturation

Definition at line 636 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractbyte1()

IFX_INLINE sint8 Ifx__extractbyte1 ( __packb a )

Extract first byte from a __packb

Definition at line 646 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractbyte2()

IFX_INLINE sint8 Ifx__extractbyte2 ( __packb a )

Extract second byte from a __packb

Definition at line 656 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractbyte3()

IFX_INLINE sint8 Ifx__extractbyte3 ( __packb a )

Extract third byte from a __packb

Definition at line 666 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractbyte4()

IFX_INLINE sint8 Ifx__extractbyte4 ( __packb a )

Extract fourth byte from a __packb

Definition at line 676 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extracthw1()

IFX_INLINE sint16 Ifx__extracthw1 ( __packhw a )

Extract first sint16 from a __packhw

Definition at line 686 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extracthw2()

IFX_INLINE sint16 Ifx__extracthw2 ( __packhw a )

Extract second sint16 from a __packhw

Definition at line 696 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractubyte1()

IFX_INLINE uint8 Ifx__extractubyte1 ( __upackb a )

Extract first uint8 from a __packb

Definition at line 706 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractubyte2()

IFX_INLINE uint8 Ifx__extractubyte2 ( __upackb a )

Extract second uint8 from a __packb

Definition at line 716 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractubyte3()

IFX_INLINE uint8 Ifx__extractubyte3 ( __upackb a )

Extract third uint8 from a __packb

Definition at line 726 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractubyte4()

IFX_INLINE uint8 Ifx__extractubyte4 ( __upackb a )

Extract fourth uint8 from a __packb

Definition at line 736 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractuhw1()

IFX_INLINE uint16 Ifx__extractuhw1 ( __upackhw a )

Extract first uint16 from a __packhw

Definition at line 746 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractuhw2()

IFX_INLINE uint16 Ifx__extractuhw2 ( __upackhw a )

Extract second uint16 from a __packhw

Definition at line 756 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getbyte1()

IFX_INLINE sint8 Ifx__getbyte1 ( __packb * a )

Extract first byte from a __packb

Definition at line 766 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getbyte2()

IFX_INLINE sint8 Ifx__getbyte2 ( __packb * a )

Extract second byte from a __packb

Definition at line 778 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getbyte3()

IFX_INLINE sint8 Ifx__getbyte3 ( __packb * a )

Extract third byte from a __packb

Definition at line 790 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getbyte4()

IFX_INLINE sint8 Ifx__getbyte4 ( __packb * a )

Extract fourth byte from a __packb

Definition at line 802 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__gethw1()

IFX_INLINE sint16 Ifx__gethw1 ( __packhw * a )

Extract first sint16 from a __packhw

Definition at line 814 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__gethw2()

IFX_INLINE sint16 Ifx__gethw2 ( __packhw * a )

Extract second sint16 from a __packhw

Definition at line 824 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getubyte1()

IFX_INLINE uint8 Ifx__getubyte1 ( __upackb * a )

Extract first uint8 from a __packb

Definition at line 835 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getubyte2()

IFX_INLINE uint8 Ifx__getubyte2 ( __upackb * a )

Extract second uint8 from a __packb

Definition at line 846 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getubyte3()

IFX_INLINE uint8 Ifx__getubyte3 ( __upackb * a )

Extract third uint8 from a __packb

Definition at line 857 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getubyte4()

IFX_INLINE uint8 Ifx__getubyte4 ( __upackb * a )

Extract fourth uint8 from a __packb

Definition at line 868 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getuhw1()

IFX_INLINE uint16 Ifx__getuhw1 ( __upackhw * a )

Extract first uint16 from a __packhw

Definition at line 879 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getuhw2()

IFX_INLINE uint16 Ifx__getuhw2 ( __upackhw * a )

Extract second uint16 from a __packhw

Definition at line 890 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initpackb()

IFX_INLINE __packb Ifx__initpackb | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | c,
 |  | sint32 | d
 | ) |  |

Initialize __packb with four integers

Definition at line 901 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initpackbl()

IFX_INLINE __packb Ifx__initpackbl ( long a )

Initialize __packb with a long integer

Definition at line 913 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initpackhw()

IFX_INLINE __packhw Ifx__initpackhw | ( | sint16 | a,
 |  | sint16 | b
 | ) |  |

Initialize __packhw with two integers

Definition at line 920 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initpackhwl()

IFX_INLINE __packhw Ifx__initpackhwl ( long a )

Initialize __packhw with a long integer

Definition at line 930 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initupackb()

IFX_INLINE __upackb Ifx__initupackb | ( | uint32 | a,
 |  | uint32 | b,
 |  | uint32 | c,
 |  | uint32 | d
 | ) |  |

Initialize __packb with four unsigned integers

Definition at line 937 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initupackhw()

IFX_INLINE __upackhw Ifx__initupackhw | ( | uint16 | a,
 |  | uint16 | b
 | ) |  |

Initialize __packhw with two unsigned integers

Definition at line 949 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertbyte1()

IFX_INLINE __packb Ifx__insertbyte1 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into first byte of a __packb

Definition at line 959 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertbyte2()

IFX_INLINE __packb Ifx__insertbyte2 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into second byte of a __packb

Definition at line 969 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertbyte3()

IFX_INLINE __packb Ifx__insertbyte3 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into third byte of a __packb

Definition at line 979 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertbyte4()

IFX_INLINE __packb Ifx__insertbyte4 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into fourth byte of a __packb

Definition at line 989 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__inserthw1()

IFX_INLINE __packhw Ifx__inserthw1 | ( | __packhw | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into first halfword of a __packhw

Definition at line 1039 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__inserthw2()

IFX_INLINE __packhw Ifx__inserthw2 | ( | __packhw | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into second halfword of a __packhw

Definition at line 1049 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertubyte1()

IFX_INLINE __upackb Ifx__insertubyte1 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into first uint8 of a __packb

Definition at line 999 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertubyte2()

IFX_INLINE __upackb Ifx__insertubyte2 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into second uint8 of a __packb

Definition at line 1009 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertubyte3()

IFX_INLINE __upackb Ifx__insertubyte3 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into third uint8 of a __packb

Definition at line 1019 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertubyte4()

IFX_INLINE __upackb Ifx__insertubyte4 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into fourth uint8 of a __packb

Definition at line 1029 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertuhw1()

IFX_INLINE __upackhw Ifx__insertuhw1 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 1059 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertuhw2()

IFX_INLINE __upackhw Ifx__insertuhw2 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 1069 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minb()

IFX_INLINE __packb Ifx__minb | ( | __packb | a,
 |  | __packb | b
 | ) |  |

Minimum of two __packb values

Definition at line 1079 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minbu()

IFX_INLINE __upackb Ifx__minbu | ( | __upackb | a,
 |  | __upackb | b
 | ) |  |

Minimum of two __upackb values

Definition at line 1089 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minh()

IFX_INLINE __packhw Ifx__minh | ( | __packhw | a,
 |  | __packhw | b
 | ) |  |

Minimum of two __packhw values

Definition at line 1099 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minhu()

IFX_INLINE __upackhw Ifx__minhu | ( | __upackhw | a,
 |  | __upackhw | b
 | ) |  |

Minimum of two __upackhw values

Definition at line 1109 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setbyte1()

IFX_INLINE void Ifx__setbyte1 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into first byte of a __packb

Definition at line 1119 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setbyte2()

IFX_INLINE void Ifx__setbyte2 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into second byte of a __packb

Definition at line 1129 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setbyte3()

IFX_INLINE void Ifx__setbyte3 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into third byte of a __packb

Definition at line 1139 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setbyte4()

IFX_INLINE void Ifx__setbyte4 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into fourth byte of a __packb

Definition at line 1149 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sethw1()

IFX_INLINE void Ifx__sethw1 | ( | __packhw * | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into first halfword of a __packhw

Definition at line 1159 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sethw2()

IFX_INLINE void Ifx__sethw2 | ( | __packhw * | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into second halfword of a __packhw

Definition at line 1169 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setubyte1()

IFX_INLINE void Ifx__setubyte1 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into first byte of a __upackb

Definition at line 1179 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setubyte2()

IFX_INLINE void Ifx__setubyte2 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into second byte of a __upackb

Definition at line 1189 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setubyte3()

IFX_INLINE void Ifx__setubyte3 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into third byte of a __upackb

Definition at line 1199 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setubyte4()

IFX_INLINE void Ifx__setubyte4 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into fourth byte of a __upackb

Definition at line 1209 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setuhw1()

IFX_INLINE void Ifx__setuhw1 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 1219 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setuhw2()

IFX_INLINE void Ifx__setuhw2 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 1229 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Register Handling

Macros | Functions
Register Handling
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Register Handling:

Macros

#define | Ifx__abs(a) __builtin_abs(a)
#define | Ifx__clz(a) __builtin_clz(a)
#define | Ifx__abs(a) __builtin_abs(a)
#define | Ifx__clz(a) __builtin_clz(a)

Functions

IFX_INLINE sint32 | Ifx__absdif (sint32 a, sint32 b)
IFX_INLINE sint32 | Ifx__abss (sint32 a)
IFX_INLINE sint32 | Ifx__clo (sint32 a)
IFX_INLINE sint32 | Ifx__cls (sint32 a)
IFX_INLINE double | Ifx__fabs (double d)
IFX_INLINE float | Ifx__fabsf (float f)
IFX_INLINE sint32 | Ifx__parity (sint32 a)
IFX_INLINE sint8 | Ifx__satb (sint32 a)
IFX_INLINE uint8 | Ifx__satbu (sint32 a)
IFX_INLINE sint16 | Ifx__sath (sint32 a)
IFX_INLINE uint16 | Ifx__sathu (sint32 a)

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to access control registers.

Macro Definition Documentation

◆ Ifx__abs [1/2]

#define Ifx__abs ( a ) __builtin_abs(a)

Return absolute value

Definition at line 1247 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__abs [2/2]

#define Ifx__abs ( a ) __builtin_abs(a)

Return absolute value

Definition at line 1247 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__clz [1/2]

#define Ifx__clz ( a ) __builtin_clz(a)

Count leading zeros in int

Definition at line 1287 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__clz [2/2]

#define Ifx__clz ( a ) __builtin_clz(a)

Count leading zeros in int

Definition at line 1287 of file IfxCpu_IntrinsicsGnuc.h.

Function Documentation

◆ Ifx__absdif()

IFX_INLINE sint32 Ifx__absdif | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

Return absolue difference of two integers

Definition at line 1251 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__abss()

IFX_INLINE sint32 Ifx__abss ( sint32 a )

Return absolute value with saturation

Definition at line 1260 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__clo()

IFX_INLINE sint32 Ifx__clo ( sint32 a )

Count leading ones in int

Definition at line 1269 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__cls()

IFX_INLINE sint32 Ifx__cls ( sint32 a )

Count number of redundant sign bits (all consecutive bits with the same value as bit 31

Definition at line 1278 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__fabs()

IFX_INLINE double Ifx__fabs ( double d )

Return absolute double precision floating-point value

Definition at line 1291 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__fabsf()

IFX_INLINE float Ifx__fabsf ( float f )

Return absolute floating-point value

Definition at line 1300 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__parity()

IFX_INLINE sint32 Ifx__parity ( sint32 a )

Return parity

Definition at line 1322 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__satb()

IFX_INLINE sint8 Ifx__satb ( sint32 a )

Return saturated byte

Definition at line 1331 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__satbu()

IFX_INLINE uint8 Ifx__satbu ( sint32 a )

Return saturated uint8

Definition at line 1340 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sath()

IFX_INLINE sint16 Ifx__sath ( sint32 a )

Return saturated halfword

Definition at line 1349 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sathu()

IFX_INLINE uint16 Ifx__sathu ( sint32 a )

Return saturated unsigned halfword

Definition at line 1358 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Saturation Arithmetic Support

Functions
Saturation Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Saturation Arithmetic Support:

Functions

IFX_INLINE sint32 | Ifx__adds (sint32 a, sint32 b)
IFX_INLINE uint32 | Ifx__addsu (uint32 a, uint32 b)
IFX_INLINE sint32 | Ifx__subs (sint32 a, sint32 b)
IFX_INLINE uint32 | Ifx__subsu (uint32 a, uint32 b)

Detailed Description

These intrinsics support saturation arithmetic

Function Documentation

◆ Ifx__adds()

IFX_INLINE sint32 Ifx__adds | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

add signed with saturation

Definition at line 1375 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__addsu()

IFX_INLINE uint32 Ifx__addsu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

add unsigned with saturation

Definition at line 1384 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__subs()

IFX_INLINE sint32 Ifx__subs | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

substract signed with saturation

Definition at line 1393 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__subsu()

IFX_INLINE uint32 Ifx__subsu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

substract unsigned with saturation

Definition at line 1402 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Insert Single Assembly Instruction

Macros | Functions
Insert Single Assembly Instruction
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Insert Single Assembly Instruction:

Macros

#define | Ifx__mem_barrier __asm__ volatile("":::"memory");
#define | Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
#define | Ifx__mem_barrier __asm__ volatile("":::"memory");
#define | Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")

Functions

IFX_INLINE void | Ifx__debug (void)
IFX_INLINE void | Ifx__dsync (void)
IFX_INLINE void | Ifx__isync (void)
IFX_INLINE void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
IFX_INLINE void | Ifx__nop (void)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE void | Ifx__rslcx (void)
IFX_INLINE void | Ifx__svlcx (void)
IFX_INLINE uint32 | Ifx__swap (void *place, uint32 value)

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to insert a single assembly instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used assembly instructions.

Macro Definition Documentation

◆ Ifx__mem_barrier [1/2]

#define Ifx__mem_barrier __asm__ volatile("":::"memory");

Insert a memory barrier

Definition at line 1428 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mem_barrier [2/2]

#define Ifx__mem_barrier __asm__ volatile("":::"memory");

Insert a memory barrier

Definition at line 1428 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__NOP [1/2]

#define Ifx__NOP ( n ) __asm(".rept " #n "\n\tnop\n\t.endr\n")

Insert n NOP instruction

Definition at line 1494 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__NOP [2/2]

#define Ifx__NOP ( n ) __asm(".rept " #n "\n\tnop\n\t.endr\n")

Insert n NOP instruction

Definition at line 1494 of file IfxCpu_IntrinsicsGnuc.h.

Function Documentation

◆ Ifx__debug()

IFX_INLINE void Ifx__debug ( void )

Insert DEBUG instruction

Definition at line 1421 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__dsync()

IFX_INLINE void Ifx__dsync ( void )

Insert DSYNC instruction

Definition at line 1432 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__isync()

IFX_INLINE void Ifx__isync ( void )

Insert ISYNC instruction

Definition at line 1439 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__ldmst()

IFX_INLINE void Ifx__ldmst | ( | volatile void * | address,
 |  | uint32 | mask,
 |  | uint32 | value
 | ) |  |

Insert LDMST instruction. Note that all operands must be word-aligned.

Definition at line 1446 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__nop()

IFX_INLINE void Ifx__nop ( void )

Insert NOP instruction

Definition at line 1455 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__nops()

IFX_INLINE void Ifx__nops ( void * cnt )

Insert a loop over cnt NOP instruction

Definition at line 1462 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__rslcx()

IFX_INLINE void Ifx__rslcx ( void )

Insert RSLCX instruction

Definition at line 1471 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__svlcx()

IFX_INLINE void Ifx__svlcx ( void )

Insert SVLCX instruction

Definition at line 1478 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__swap()

IFX_INLINE uint32 Ifx__swap | ( | void * | place,
 |  | uint32 | value
 | ) |  |

Insert SWAP instruction. Note that all operands must be word-aligned.

Definition at line 1485 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Intrinsics for TASKING compiler

Modules
Intrinsics for TASKING compiler
iLLD » CPU » Standard Driver » Intrinsics
Collaboration diagram for Intrinsics for TASKING compiler:

Modules

Cross type arithmetic operation
Signed integer operation
Unsigned integer operation
Floating point operation
Fractional Arithmetic Support
Insert / Extract Bit-fields and Bits
Interrupt Handling
Miscellaneous Intrinsic Functions
Packed Data Type Support
Register Handling
Saturation Arithmetic Support
Insert Single Assembly Instruction

Detailed Description


iLLD_TC26B: Cross type arithmetic operation

Macros
Cross type arithmetic operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Cross type arithmetic operation:

Macros

#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))

Detailed Description

Macro compatible with float, fix point, signed integer and unsigned integer

Macro Definition Documentation

◆ Ifx__checkrangeX [1/2]

#define Ifx__checkrangeX | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 110 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__checkrangeX [2/2]

#define Ifx__checkrangeX | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 110 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__maxX [1/2]

#define Ifx__maxX | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 108 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__maxX [2/2]

#define Ifx__maxX | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 108 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__minX [1/2]

#define Ifx__minX | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 107 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__minX [2/2]

#define Ifx__minX | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 107 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__saturateX [1/2]

#define Ifx__saturateX | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minX(Ifx__maxX(X, Min), Max) )

Definition at line 109 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__saturateX [2/2]

#define Ifx__saturateX | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minX(Ifx__maxX(X, Min), Max) )

Definition at line 109 of file IfxCpu_IntrinsicsTasking2G.h.


iLLD_TC26B: Signed integer operation

Macros
Signed integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Signed integer operation:

Macros

#define | Ifx__saturate(X, Min, Max) ( __min(__max(X, Min), Max) )
#define | Ifx__saturate(X, Min, Max) ( __min(__max(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturate [1/2]

#define Ifx__saturate | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __min(__max(X, Min), Max) )

Definition at line 117 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__saturate [2/2]

#define Ifx__saturate | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __min(__max(X, Min), Max) )

Definition at line 117 of file IfxCpu_IntrinsicsTasking2G.h.


iLLD_TC26B: Unsigned integer operation

Macros
Unsigned integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Unsigned integer operation:

Macros

#define | Ifx__saturateu(X, Min, Max) ( __minu(__maxu(X, Min), Max) )
#define | Ifx__saturateu(X, Min, Max) ( __minu(__maxu(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturateu [1/2]

#define Ifx__saturateu | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __minu(__maxu(X, Min), Max) )

Definition at line 124 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__saturateu [2/2]

#define Ifx__saturateu | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __minu(__maxu(X, Min), Max) )

Definition at line 124 of file IfxCpu_IntrinsicsTasking2G.h.


iLLD_TC26B: Floating point operation

Macros
Floating point operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Floating point operation:

Macros

#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__roundf(X) ((((X) - (int)(X)) > 0.5) ? (1 + (int)(X)) : ((int)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(_Ifx_maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__roundf(X) ((((X) - (int)(X)) > 0.5) ? (1 + (int)(X)) : ((int)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(_Ifx_maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )

Detailed Description

Macro Definition Documentation

◆ Ifx__abs_stdreal [1/2]

#define Ifx__abs_stdreal ( X ) ( ((X) > 0.0) ? (X) : -(X) )

Definition at line 143 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__abs_stdreal [2/2]

#define Ifx__abs_stdreal ( X ) ( ((X) > 0.0) ? (X) : -(X) )

Definition at line 143 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__absf [1/2]

#define Ifx__absf ( X ) ( ((X) < 0.0) ? -(X) : (X) )

Definition at line 137 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__absf [2/2]

#define Ifx__absf ( X ) ( ((X) < 0.0) ? -(X) : (X) )

Definition at line 137 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__checkrange [1/2]

#define Ifx__checkrange | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 131 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__checkrange [2/2]

#define Ifx__checkrange | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 131 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__checkrangef [1/2]

#define Ifx__checkrangef | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 141 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__checkrangef [2/2]

#define Ifx__checkrangef | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 141 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__geqf [1/2]

#define Ifx__geqf | ( | X,
 |  | Y
 | ) | ( !((X) < (Y)) )

X >= Y

Definition at line 150 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__geqf [2/2]

#define Ifx__geqf | ( | X,
 |  | Y
 | ) | ( !((X) < (Y)) )

X >= Y

Definition at line 150 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__leqf [1/2]

#define Ifx__leqf | ( | X,
 |  | Y
 | ) | ( !((X) > (Y)) )

X <= Y

Definition at line 149 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__leqf [2/2]

#define Ifx__leqf | ( | X,
 |  | Y
 | ) | ( !((X) > (Y)) )

X <= Y

Definition at line 149 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__max_stdreal [1/2]

#define Ifx__max_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 145 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__max_stdreal [2/2]

#define Ifx__max_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 145 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__maxf [1/2]

#define Ifx__maxf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 139 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__maxf [2/2]

#define Ifx__maxf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 139 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__min_stdreal [1/2]

#define Ifx__min_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 144 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__min_stdreal [2/2]

#define Ifx__min_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 144 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__minf [1/2]

#define Ifx__minf | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 138 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__minf [2/2]

#define Ifx__minf | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 138 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__neqf [1/2]

#define Ifx__neqf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) || ((X) < (Y)) )

X != Y

Definition at line 148 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__neqf [2/2]

#define Ifx__neqf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) || ((X) < (Y)) )

X != Y

Definition at line 148 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__roundf [1/2]

#define Ifx__roundf ( X ) ((((X) - (int)(X)) > 0.5) ? (1 + (int)(X)) : ((int)(X)))

Definition at line 136 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__roundf [2/2]

#define Ifx__roundf ( X ) ((((X) - (int)(X)) > 0.5) ? (1 + (int)(X)) : ((int)(X)))

Definition at line 136 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__saturate_stdreal [1/2]

#define Ifx__saturate_stdreal | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )

Definition at line 146 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__saturate_stdreal [2/2]

#define Ifx__saturate_stdreal | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )

Definition at line 146 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__saturatef [1/2]

#define Ifx__saturatef | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minf(_Ifx_maxf(X, Min), Max) )

Definition at line 140 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__saturatef [2/2]

#define Ifx__saturatef | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minf(_Ifx_maxf(X, Min), Max) )

Definition at line 140 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__sqrf [1/2]

#define Ifx__sqrf ( X ) ((X) * (X))

Definition at line 133 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__sqrf [2/2]

#define Ifx__sqrf ( X ) ((X) * (X))

Definition at line 133 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__sqrtf [1/2]

#define Ifx__sqrtf ( X ) sqrtf(X)

Definition at line 134 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__sqrtf [2/2]

#define Ifx__sqrtf ( X ) sqrtf(X)

Definition at line 134 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC26B: Fractional Arithmetic Support

Macros
Fractional Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Fractional Arithmetic Support:

Macros

#define | Ifx__fract_to_float(value) ((float)(value))
#define | Ifx__mulfractlong __mulfractlong
#define | Ifx__mulfractfract(fractvalue1, fractvalue2) ((fractvalue1)*(fractvalue2))
#define | Ifx__fract_to_float(value) ((float)(value))
#define | Ifx__mulfractlong __mulfractlong
#define | Ifx__mulfractfract(fractvalue1, fractvalue2) ((fractvalue1)*(fractvalue2))

Detailed Description

The next table provides an overview of intrinsic functions to convert fractional values. Note that the TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C compiler does support these functions.

Macro Definition Documentation

◆ Ifx__fract_to_float [1/2]

#define Ifx__fract_to_float ( value ) ((float)(value))

Definition at line 160 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__fract_to_float [2/2]

#define Ifx__fract_to_float ( value ) ((float)(value))

Definition at line 160 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__mulfractfract [1/2]

#define Ifx__mulfractfract | ( | fractvalue1,
 |  | fractvalue2
 | ) | ((fractvalue1)*(fractvalue2))

Definition at line 164 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__mulfractfract [2/2]

#define Ifx__mulfractfract | ( | fractvalue1,
 |  | fractvalue2
 | ) | ((fractvalue1)*(fractvalue2))

Definition at line 164 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__mulfractlong [1/2]

#define Ifx__mulfractlong __mulfractlong

Definition at line 162 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__mulfractlong [2/2]

#define Ifx__mulfractlong __mulfractlong

Definition at line 162 of file IfxCpu_IntrinsicsTasking2G.h.


iLLD_TC26B: Insert / Extract Bit-fields and Bits

Macros
Insert / Extract Bit-fields and Bits
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Insert / Extract Bit-fields and Bits:

Macros

#define | Ifx__extru(a, p, w) __extru(a,p,w)
#define | Ifx__extr(a, p, w) __extr(a,p,w)
#define | Ifx__imaskldmst(a, v, b, p) __imaskldmst((int*)a, v, b, p)
#define | Ifx__insert(a, b, p, w) __insert(a,b,p,w)
#define | Ifx__extru(a, p, w) __extru(a,p,w)
#define | Ifx__extr(a, p, w) __extr(a,p,w)
#define | Ifx__imaskldmst(a, v, b, p) __imaskldmst((int*)a, v, b, p)
#define | Ifx__insert(a, b, p, w) __insert(a,b,p,w)

Detailed Description

Macro Definition Documentation

◆ Ifx__extr [1/2]

#define Ifx__extr | ( | a,
 |  | p,
 |  | w
 | ) | __extr(a,p,w)

Definition at line 175 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__extr [2/2]

#define Ifx__extr | ( | a,
 |  | p,
 |  | w
 | ) | __extr(a,p,w)

Definition at line 175 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__extru [1/2]

#define Ifx__extru | ( | a,
 |  | p,
 |  | w
 | ) | __extru(a,p,w)

Definition at line 173 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__extru [2/2]

#define Ifx__extru | ( | a,
 |  | p,
 |  | w
 | ) | __extru(a,p,w)

Definition at line 173 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__imaskldmst [1/2]

#define Ifx__imaskldmst | ( | a,
 |  | v,
 |  | b,
 |  | p
 | ) | __imaskldmst((int*)a, v, b, p)

Definition at line 177 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__imaskldmst [2/2]

#define Ifx__imaskldmst | ( | a,
 |  | v,
 |  | b,
 |  | p
 | ) | __imaskldmst((int*)a, v, b, p)

Definition at line 177 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__insert [1/2]

#define Ifx__insert | ( | a,
 |  | b,
 |  | p,
 |  | w
 | ) | __insert(a,b,p,w)

Definition at line 179 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__insert [2/2]

#define Ifx__insert | ( | a,
 |  | b,
 |  | p,
 |  | w
 | ) | __insert(a,b,p,w)

Definition at line 179 of file IfxCpu_IntrinsicsTasking2G.h.


iLLD_TC26B: Interrupt Handling

Macros
Interrupt Handling
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Interrupt Handling:

Macros

#define | Ifx__disable_and_save __disable_and_save
#define | Ifx__restore __restore
#define | Ifx__disable_and_save __disable_and_save
#define | Ifx__restore __restore

Detailed Description

The next table provides an overview of the intrinsic functions to read or set interrupt handling.

Macro Definition Documentation

◆ Ifx__disable_and_save [1/2]

#define Ifx__disable_and_save __disable_and_save

Definition at line 188 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__disable_and_save [2/2]

#define Ifx__disable_and_save __disable_and_save

Definition at line 188 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__restore [1/2]

#define Ifx__restore __restore

Definition at line 190 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__restore [2/2]

#define Ifx__restore __restore

Definition at line 190 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC26B: Miscellaneous Intrinsic Functions

Miscellaneous Intrinsic Functions
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Miscellaneous Intrinsic Functions:


iLLD_TC26B: Packed Data Type Support

Packed Data Type Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Packed Data Type Support:

The next table provides an overview of the intrinsic functions for initialization of packed data type.


iLLD_TC26B: Register Handling

Macros
Register Handling
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Register Handling:

Macros

#define | Ifx__mtcr_no_isync(reg, val) __asm("mtcr %0,%1"::"i"(reg),"d"(val));
#define | Ifx__mtcr_no_isync(reg, val) __asm("mtcr %0,%1"::"i"(reg),"d"(val));

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to access control registers.

Macro Definition Documentation

◆ Ifx__mtcr_no_isync [1/2]

#define Ifx__mtcr_no_isync | ( | reg,
 |  | val
 | ) | __asm("mtcr %0,%1"::"i"(reg),"d"(val));

Definition at line 215 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__mtcr_no_isync [2/2]

#define Ifx__mtcr_no_isync | ( | reg,
 |  | val
 | ) | __asm("mtcr %0,%1"::"i"(reg),"d"(val));

Definition at line 215 of file IfxCpu_IntrinsicsTasking2G.h.


iLLD_TC26B: Saturation Arithmetic Support

Macros
Saturation Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Saturation Arithmetic Support:

Macros

#define | Ifx__adds(a, b) ((__sat int)(a)+(__sat int)(b))
#define | Ifx__addsu(a, b) ((__sat unsigned int)(a)+(__sat unsigned int)(b))
#define | Ifx__subs(a, b) ((__sat int)(a)-(__sat int)(b))
#define | Ifx__subsu(a, b) ((__sat unsigned int )(a)-(__sat unsigned int )(b))
#define | Ifx__adds(a, b) ((__sat int)(a)+(__sat int)(b))
#define | Ifx__addsu(a, b) ((__sat unsigned int)(a)+(__sat unsigned int)(b))
#define | Ifx__subs(a, b) ((__sat int)(a)-(__sat int)(b))
#define | Ifx__subsu(a, b) ((__sat unsigned int )(a)-(__sat unsigned int )(b))

Detailed Description

These intrinsics support saturation arithmetic

Macro Definition Documentation

◆ Ifx__adds [1/2]

#define Ifx__adds | ( | a,
 |  | b
 | ) | ((__sat int)(a)+(__sat int)(b))

Definition at line 226 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__adds [2/2]

#define Ifx__adds | ( | a,
 |  | b
 | ) | ((__sat int)(a)+(__sat int)(b))

Definition at line 226 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__addsu [1/2]

#define Ifx__addsu | ( | a,
 |  | b
 | ) | ((__sat unsigned int)(a)+(__sat unsigned int)(b))

Definition at line 228 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__addsu [2/2]

#define Ifx__addsu | ( | a,
 |  | b
 | ) | ((__sat unsigned int)(a)+(__sat unsigned int)(b))

Definition at line 228 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__subs [1/2]

#define Ifx__subs | ( | a,
 |  | b
 | ) | ((__sat int)(a)-(__sat int)(b))

Definition at line 230 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__subs [2/2]

#define Ifx__subs | ( | a,
 |  | b
 | ) | ((__sat int)(a)-(__sat int)(b))

Definition at line 230 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__subsu [1/2]

#define Ifx__subsu | ( | a,
 |  | b
 | ) | ((__sat unsigned int )(a)-(__sat unsigned int )(b))

Definition at line 232 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__subsu [2/2]

#define Ifx__subsu | ( | a,
 |  | b
 | ) | ((__sat unsigned int )(a)-(__sat unsigned int )(b))

Definition at line 232 of file IfxCpu_IntrinsicsTasking2G.h.


iLLD_TC26B: Insert Single Assembly Instruction

Macros | Functions
Insert Single Assembly Instruction
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Insert Single Assembly Instruction:

Macros

#define | Ifx__NOP(n) __asm(".DUP " #n "\n\tnop16\n\t.ENDM\n")
#define | Ifx__mem_barrier __asm("":::"memory");
#define | Ifx__fract_to_sfract __round16
#define | Ifx__ldmst(addr, mask, data) Ifx__ldmstAsm(addr, mask, data)
#define | Ifx__NOP(n) __asm(".DUP " #n "\n\tnop16\n\t.ENDM\n")
#define | Ifx__mem_barrier __asm("":::"memory");
#define | Ifx__fract_to_sfract __round16
#define | Ifx__ldmst(addr, mask, data) Ifx__ldmstAsm(addr, mask, data)

Functions

IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE void | Ifx__ldmstAsm (volatile void *addr, uint32 mask, uint32 data)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE void | Ifx__stopPerfCounters (void)

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to insert a single assembly instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used assembly instructions.

Macro Definition Documentation

◆ Ifx__fract_to_sfract [1/2]

#define Ifx__fract_to_sfract __round16

Definition at line 284 of file IfxCpu_IntrinsicsTasking.h.

Referenced by Ifx__float_to_sfract().

◆ Ifx__fract_to_sfract [2/2]

#define Ifx__fract_to_sfract __round16

Definition at line 284 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__ldmst [1/2]

#define Ifx__ldmst | ( | addr,
 |  | mask,
 |  | data
 | ) | Ifx__ldmstAsm(addr, mask, data)

Definition at line 294 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__ldmst [2/2]

#define Ifx__ldmst | ( | addr,
 |  | mask,
 |  | data
 | ) | Ifx__ldmstAsm(addr, mask, data)

Definition at line 294 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__mem_barrier [1/2]

#define Ifx__mem_barrier __asm("":::"memory");

Insert a memory barrier

Definition at line 255 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__mem_barrier [2/2]

#define Ifx__mem_barrier __asm("":::"memory");

Insert a memory barrier

Definition at line 255 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__NOP [1/2]

#define Ifx__NOP ( n ) __asm(".DUP " #n "\n\tnop16\n\t.ENDM\n")

Definition at line 251 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__NOP [2/2]

#define Ifx__NOP ( n ) __asm(".DUP " #n "\n\tnop16\n\t.ENDM\n")

Definition at line 251 of file IfxCpu_IntrinsicsTasking2G.h.

Function Documentation

◆ Ifx__float_to_fract()

IFX_INLINE fract Ifx__float_to_fract ( float a )

Convert float to fract

Definition at line 277 of file IfxCpu_IntrinsicsTasking.h.

Referenced by Ifx__float_to_sfract().

◆ Ifx__float_to_sfract()

IFX_INLINE sfract Ifx__float_to_sfract ( float a )

Convert float to sfract

Definition at line 288 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__ldmstAsm()

IFX_INLINE void Ifx__ldmstAsm | ( | volatile void * | addr,
 |  | uint32 | mask,
 |  | uint32 | data
 | ) |  |

Definition at line 266 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__nops()

IFX_INLINE void Ifx__nops ( void * cnt )

Definition at line 244 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__stopPerfCounters()

IFX_INLINE void Ifx__stopPerfCounters ( void )

Definition at line 297 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC26B: IfxCpu_Intrinsics.h File Reference

  • Cpu
  • Std
Macros | Functions
IfxCpu_Intrinsics.h File Reference
iLLD » CPU » Standard Driver » Intrinsics
#include "Ifx_Types.h"
Include dependency graph for IfxCpu_Intrinsics.h:

Go to the source code of this file.

Macros

#define | IFX_ALIGN_8 (1)
#define | IFX_ALIGN_16 (2)
#define | IFX_ALIGN_32 (4)
#define | IFX_ALIGN_64 (8)
#define | IFX_ALIGN_128 (16)
#define | IFX_ALIGN_256 (32)
#define | Ifx_AlignOn256(Size) ((((Size) + (IFX_ALIGN_256 - 1)) & (~(IFX_ALIGN_256 - 1))))
#define | Ifx_AlignOn128(Size) ((((Size) + (IFX_ALIGN_128 - 1)) & (~(IFX_ALIGN_128 - 1))))
#define | Ifx_AlignOn64(Size) ((((Size) + (IFX_ALIGN_64 - 1)) & (~(IFX_ALIGN_64 - 1))))
#define | Ifx_AlignOn32(Size) ((((Size) + (IFX_ALIGN_32 - 1)) & (~(IFX_ALIGN_32 - 1))))
#define | Ifx_AlignOn16(Size) ((((Size) + (IFX_ALIGN_16 - 1)) & (~(IFX_ALIGN_16 - 1))))
#define | Ifx_AlignOn8(Size) ((((Size) + (IFX_ALIGN_8 - 1)) & (~(IFX_ALIGN_8 - 1))))
#define | Ifx_COUNTOF(x) (sizeof(x) / sizeof(x[0]))

Functions

IFX_INLINE void * | __cx_to_addr (uint32 cx)
IFX_INLINE uint32 | __addr_to_cx (void *addr)
IFX_INLINE void | __ldmst_c (volatile void *address, unsigned mask, unsigned value)
IFX_INLINE uint32 | __ld32 (void *addr)
IFX_INLINE void | __st32 (void *addr, uint32 value)
IFX_INLINE uint64 | __ld64 (void *addr)
IFX_INLINE void | __st64 (void *addr, uint64 value)
IFX_INLINE void | __ld64_lu (void *addr, uint32 *valueLower, uint32 *valueUpper)
IFX_INLINE void | __st64_lu (void *addr, uint32 valueLower, uint32 valueUpper)

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_Intrinsics.h.

Macro Definition Documentation

◆ IFX_ALIGN_128

#define IFX_ALIGN_128 (16)

Definition at line 69 of file IfxCpu_Intrinsics.h.

◆ IFX_ALIGN_16

#define IFX_ALIGN_16 (2)

Definition at line 66 of file IfxCpu_Intrinsics.h.

◆ IFX_ALIGN_256

#define IFX_ALIGN_256 (32)

Definition at line 70 of file IfxCpu_Intrinsics.h.

◆ IFX_ALIGN_32

#define IFX_ALIGN_32 (4)

Definition at line 67 of file IfxCpu_Intrinsics.h.

◆ IFX_ALIGN_64

#define IFX_ALIGN_64 (8)

Definition at line 68 of file IfxCpu_Intrinsics.h.

◆ IFX_ALIGN_8

#define IFX_ALIGN_8 (1)

Definition at line 65 of file IfxCpu_Intrinsics.h.

◆ Ifx_AlignOn128

#define Ifx_AlignOn128 ( Size ) ((((Size) + (IFX_ALIGN_128 - 1)) & (~(IFX_ALIGN_128 - 1))))

Definition at line 73 of file IfxCpu_Intrinsics.h.

◆ Ifx_AlignOn16

#define Ifx_AlignOn16 ( Size ) ((((Size) + (IFX_ALIGN_16 - 1)) & (~(IFX_ALIGN_16 - 1))))

Definition at line 76 of file IfxCpu_Intrinsics.h.

◆ Ifx_AlignOn256

#define Ifx_AlignOn256 ( Size ) ((((Size) + (IFX_ALIGN_256 - 1)) & (~(IFX_ALIGN_256 - 1))))

Definition at line 72 of file IfxCpu_Intrinsics.h.

◆ Ifx_AlignOn32

#define Ifx_AlignOn32 ( Size ) ((((Size) + (IFX_ALIGN_32 - 1)) & (~(IFX_ALIGN_32 - 1))))

Definition at line 75 of file IfxCpu_Intrinsics.h.

Referenced by Ifx_Fifo_create(), Ifx_Fifo_init(), IfxCif_Cam_calcMem(), and IfxCif_Cam_initMemSize().

◆ Ifx_AlignOn64

#define Ifx_AlignOn64 ( Size ) ((((Size) + (IFX_ALIGN_64 - 1)) & (~(IFX_ALIGN_64 - 1))))

Definition at line 74 of file IfxCpu_Intrinsics.h.

Referenced by Ifx_Fifo_init().

◆ Ifx_AlignOn8

#define Ifx_AlignOn8 ( Size ) ((((Size) + (IFX_ALIGN_8 - 1)) & (~(IFX_ALIGN_8 - 1))))

Definition at line 77 of file IfxCpu_Intrinsics.h.

◆ Ifx_COUNTOF

#define Ifx_COUNTOF ( x ) (sizeof(x) / sizeof(x[0]))

Definition at line 79 of file IfxCpu_Intrinsics.h.

Referenced by Ifx_Shell_matchToken(), Ifx_Shell_parseAddress(), Ifx_Shell_parseFloat32(), Ifx_Shell_parseFloat64(), Ifx_Shell_parseSInt64(), and Ifx_Shell_parseUInt64().

Function Documentation

◆ __addr_to_cx()

IFX_INLINE uint32 __addr_to_cx ( void * addr )

Convert address pointer to context pointer

Parameters
[in] addr address pointer
Returns
context pointer

Definition at line 98 of file IfxCpu_Intrinsics.h.

◆ __cx_to_addr()

IFX_INLINE void* __cx_to_addr ( uint32 cx )

Convert context pointer to address pointer

Parameters
[in] cx context pointer
Returns
address pointer

Definition at line 87 of file IfxCpu_Intrinsics.h.

◆ __ld32()

IFX_INLINE uint32 __ld32 ( void * addr )

32bit load operation

Definition at line 116 of file IfxCpu_Intrinsics.h.

◆ __ld64()

IFX_INLINE uint64 __ld64 ( void * addr )

64bit load operation

Definition at line 132 of file IfxCpu_Intrinsics.h.

Referenced by __ld64_lu().

◆ __ld64_lu()

IFX_INLINE void __ld64_lu | ( | void * | addr,
 |  | uint32 * | valueLower,
 |  | uint32 * | valueUpper
 | ) |  |

64bit load operation which returns the lower and upper 32bit word

Definition at line 148 of file IfxCpu_Intrinsics.h.

◆ __ldmst_c()

IFX_INLINE void __ldmst_c | ( | volatile void * | address,
 |  | unsigned | mask,
 |  | unsigned | value
 | ) |  |

Definition at line 108 of file IfxCpu_Intrinsics.h.

Referenced by IfxCcu6_connectTrigger(), IfxDsadc_Rdc_initHwTimestamp(), IfxGtm_PinMap_setAtomTout(), IfxGtm_PinMap_setTimTin(), IfxGtm_PinMap_setTomTout(), IfxGtm_Tbu_enableChannel(), IfxGtm_Trig_fromDsadc(), IfxGtm_Trig_toDsadc(), IfxGtm_Trig_toSent(), and IfxGtm_Trig_toVadc().

◆ __st32()

IFX_INLINE void __st32 | ( | void * | addr,
 |  | uint32 | value
 | ) |  |

32bit store operation

Definition at line 124 of file IfxCpu_Intrinsics.h.

◆ __st64()

IFX_INLINE void __st64 | ( | void * | addr,
 |  | uint64 | value
 | ) |  |

64bit store operation

Definition at line 140 of file IfxCpu_Intrinsics.h.

Referenced by __st64_lu().

◆ __st64_lu()

IFX_INLINE void __st64_lu | ( | void * | addr,
 |  | uint32 | valueLower,
 |  | uint32 | valueUpper
 | ) |  |

64bit store operation which stores a lower and upper 32bit word

Definition at line 159 of file IfxCpu_Intrinsics.h.

Referenced by IfxFlash_loadPage().


iLLD_TC26B: Core Startup Functions

Modules
Core Startup Functions
iLLD » CPU
Collaboration diagram for Core Startup Functions:

Modules

Startup Sequence
How to enable cache during startup?
How to enable CPUs during startup?

Detailed Description


iLLD_TC26B: Startup Sequence

Startup Sequence
iLLD » CPU » Core Startup Functions
Collaboration diagram for Startup Sequence:

The startup driver is responsible for initializing the basic features of microcontroller to bring it up to the user functions. In framework these functions are called as "CoreX_main".

In TC27X controllers, CPU0 is master controller which is booted from reset. IfxCpu_CStart driver provides following functionalities and they are listed in the order of their execution.

Core Startup Sequence

1) Execute pre-initialization hook, which is user configurable. Using Startup pre-initialization hook
2) Setup user stack pointer for the CPU core
3) Set program/data cache bypass to configuration defined settings. Refer How to enable cache during startup?.
4) Set base address for trap vector and interrupt vector for the CPU core
5) Set interrupt stack pointer
6) Initialize the base pointers for the small data area registers for CPU core
7) Initialize the CSA for CPU core
8) Do the C initialization to initialize the global variables etc.
9) Initialize the clock system to configuration defined settings. Ifx_Scu_Ccu_ConfigClock
10) Start remaining cores if they configuration setting request them to be enabled. How to enable CPUs during startup?
11) Call user function "CoreX_main"

Note
All the above functionalities are executed by "master core" in this case CPU0. Remaining cores will execute only subset of the above functions, i.e. steps 8) 9) and 10) are not executed by remaining CPU core startups.

Using Startup pre-initialization hook

If the application/ demo example need some activity other than above defined functionalities, user can configure the function which is called before any other initialization is executed. Example of such activity is testing the CSA and STACK.

Following are the steps to be done to configure user defined activity which is needed before startup sequence.

Step1: Define a hook function

This definition shall be as user defined code (Generally in DemoApps folder).
Considerations:

  1. Format: IFX_INLINE void <pre init function name>(cpu)
    Note
    Define such a routine with the consideration, that there shall be no function call within this.
  2. Use the information available as parameter cpu

Example code in a user defined file eg. Ifx_preInitHook.h, placed under folder/subfolder: 0_AppSw/Tricore/DemoApp:

// file: Ifx_preInitHook.h
//Example function for pre initialization Hook for startup functions.
IFX_INLINE mySysPreInitHook(uint32 cpu)
{
switch (cpu)
{
case 0:
{
//user code for cpu0: Function calls NOT allowed.
break;
}
case 1:
{
//user code for cpu1: Function calls NOT allowed.
break;
}
case 2:
{
//user code for cpu2: Function calls NOT allowed.
break;
}
case default:
{
break;
}
}
}

Step2: Configure the pre initialization function for startup sequence call

Create a file for configuring the hook. For example, Ifx_Cfg_CStart.h at ../0_Src/0_AppSw/Config/Tricore (or in DemoApp folder)

Note
This configuration, overload the macro IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu), which is already defined in IfxCpu_CStart.h. !!IMPORTANT!! Don't modify this at IfxCpu_CStart.h, because this is library file.
//file: Ifx_Cfg_CStart.h
#include "Ifx_preInitHook.h" //Assuming this is the file name as in above example
#define IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu) mySysPreInitHook(cpu) //This is INLINE function.


iLLD_TC26B: How to enable cache during startup?

How to enable cache during startup?
iLLD » CPU » Core Startup Functions
Collaboration diagram for How to enable cache during startup?:

In Tricore Cpu the cache enable/ disable are handled by the feature called cache bypass. Cache is enabled if the Bypass is disabled.

Startup sequence of each CPU execute the function to do the cache settings. Ifx_Cpu_StartupSequence The configuration parameters IFX_CFG_CPU_CSTART_ENABLE_TRICOREx_PCACHE and IFX_CFG_CPU_CSTART_ENABLE_TRICOREx_DCACHE control this function.

To modify the default configuration, these macros are to be defined in Ifx_Cfg.h (usually located under ../0_Src/0_AppSw/Config/Common/Ifx_Cfg.h)

Note
This kind of definitions overload the macros, which are already defined in IfxCpu_CStart*.c. !!IMPORTANT!! Don't modify these in IfxCpu_CStart*.c, because theseare library files.

Details of configuration parameters:

Enable/Disable program cache of Tricore CPU0 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE
Enable/Disable program cache of Tricore CPU1 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE
Enable/Disable program cache of Tricore CPU2 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_PCACHE
Enable/Disable data cache of Tricore CPU0 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE
Enable/Disable data cache of Tricore CPU1 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE
Enable/Disable data cache of Tricore CPU2 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_DCACHE
Following example shows, how to enable program cache of all available cores and disable data cache of all the available cores.

//file: Ifx_Cfg.h
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE (1) //Program cache for Cpu0 is enabled
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE (1) //Data cache for Cpu0 is enabled
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE (1) //Program cache for Cpu1 is enabled
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE (1) //Data cache for Cpu1 is enabled
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_PCACHE (1) //Program cache for Cpu2 is enabled
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_DCACHE (1) //Data cache for Cpu2 is enabled

To control the the caches during runtime, refer for the details of APIs: Ifx_Cpu_Cache


iLLD_TC26B: How to enable CPUs during startup?

How to enable CPUs during startup?
iLLD » CPU » Core Startup Functions
Collaboration diagram for How to enable CPUs during startup?:

Startup sequence of CPU0 execute the function to initialize the remaining available CPUs. Core Startup Sequence. Startup sequence enables all the available CPUs.

The configuration parameters IFX_CFG_CPU_CSTART_ENABLE_TRICOREx control this function. To modify the default configuration, these macros are to be defined. Create a file to define these macros, for example, Ifx_Cfg_CStart.h at ../0_Src/0_AppSw/Config/Tricore (or in DemoApp folder).

Note
This kind of definitions, overload the macros, which are already defined in IfxCpu_CStart.h. !!IMPORTANT!! Don't modify these at IfxCpu_CStart.h, because this is library file.

Details of configuration parameters:

Enable/Disable of Tricore CPU0 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE0
Enable/Disable of Tricore CPU1 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE1
Enable/Disable of Tricore CPU2 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE2
Following example shows, how to enable all available cores.

//file: Ifx_Cfg_CStart.h
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 (1) //Cpu0 is enabled
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 (1) //Cpu1 is enabled
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE2 (1) //Cpu2 is enabled


iLLD_TC26B: Interrupt Functions

Modules
Interrupt Functions
iLLD » CPU
Collaboration diagram for Interrupt Functions:

Modules

How to define Interrupts?
Functions

Detailed Description


iLLD_TC26B: How to define Interrupts?

How to define Interrupts?
iLLD » CPU » Interrupt Functions
Collaboration diagram for How to define Interrupts?:

This page describes how to use interrupts with application framework.

Interrupts Terminology:

Hardware Managed Interrupt Mechanism.

Hardware managed interrupts have static interrupt vector which are defined for each priority separately. These vectors have jump instruction to the interrupt handler.

Advantages:
This mechanism has less interrupt latency time.

Software Managed Interrupt Mechanism.

Software managed interrupts have single interrupt vector statically defined at vector position 255. This address is assigned to BIV during startup.
For Tricore, this vector position is important, because whenever an interrupt occurs, with whichever priority, the execution control jumps to this vector position. The code at this vector position will:
1) fetch the priority of the targetted interrupt.
2) fetch the interrupt handler defined for this priority (this is done by Interrupt handler installation. Refer Step4: How to install Interrupt Service routine/handler?
3) Then call the handler as notmal function call.

Advantages:
This kind of mechanism is useful when project wants to change the handler for an interrupt during runtime.

Disadvantages:
This mechanism has more interrupt latency time.

of the interrupt and in tand jumps to the function

Steps to use Interrupt Mechanism.

Dependency: Ifx_Compilers, Ifx_Cpu, Ifx_Src, IfxCpu_Irq
Following are the steps to use interrupt mechanism.

Step1: Define Interrupt priorities.

Define priorities of all interrupts with names corresponding to their functionality. It is recommended to define such priority definitions in single header file, because it is easy to detect if ISR priorities are conflicting. In Tricore architecture, two Isrs can't have same priority at same point of time.

Note
These defines shall be defined without brackets surrounding priority number. (eg. #define PRIO (10) is not allowed)

In a user defined file eg. Ifx_IntPrioDef.h, placed in folder: 0_AppSw/Tricore/DemoApp:

//file: Ifx_IntPrioDef.h.
#define IFX_INTPRIO_FUNCT1 1
#define IFX_INTPRIO_FUNCT2 2
#define IFX_INTPRIO_FUNCT3 5
#define IFX_INTPRIO_STM0 8
#define IFX_INTPRIO_ADC_FUNC1 10
//etc.
Note
!! IMPORTANT !!
As explained above, the definition with closing bracket around priority number as, #define IFX_INTPRIO_FUNCT1 (1) will cause compilation error. Because linker sections which are constructed using such information will also get these brackets included. Which look like ".intvec_tc0_(1)" instead of the expected ".intvec_tc0_1"
Linker sections' definitions are predefined statically in .lsl file, for all 255 interrupts, with the format ".intvec_tc<vector number>_<interrupt priority>".

Step2: Define Type of interrupt mechanism.

To use Hardware Managed Interrupt Mechanism.

Refer Hardware Managed Interrupt Mechanism. If project is designed for hardware managed interrupts, this feature is enabled at the file Ifx_Cfg.h, at path: 0_Src/0_AppSw/Config/Common/, as shown below. IFX_USE_SW_MANAGED_INT definition must be undefined (i.e. the statement "#define IFX_USE_SW_MANAGED_INT" shall be commented as below).

//file: Ifx_Cfg.h
//#define IFX_USE_SW_MANAGED_INT

To use Software Managed Interrupt Mechanism.

Refer Software Managed Interrupt Mechanism. If project is designed for software managed interrupts, this feature is enabled at the file Ifx_Cfg.h, at path: 0_Src/0_AppSw/Config/Common/, as shown below. IFX_USE_SW_MANAGED_INT definition must be defined.

//file: Ifx_Cfg.h
#define IFX_USE_SW_MANAGED_INT

Software managed interrupts must also install the "Interrupt Handlers" Refer Step4: How to install Interrupt Service routine/handler?

Step3: How to define an Interrupt Service routine?

Interrupt service routines or interrupt handlers are defined in driver specific files or application specific files.

//file usercode1.c
#include "Compilers.h" // to get the compiler abstracted macros for interrupt definition
#include "Ifx_IntPrioDef.h" // to get the priority numbers
//define an ISR with name Isr_Stm0 with priority defined by IFX_INTPRIO_STM0
IFX_INTERRUPT (Isr_Stm0, 0, IFX_INTPRIO_STM0)
{
//Isr code here
}
//file usercode2.c
#include "Compilers.h" // to get the compiler abstracted macros for interrupt definition
#include "Ifx_IntPrioDef.h" // to get the priority numbers
//define an ISR with name Isr_Adc_fun1 with priority defined by IFX_INTPRIO_ADC_FUNC1
IFX_INTERRUPT (Isr_Adc_fun1, 0, IFX_INTPRIO_ADC_FUNC1)
{
//Isr code here
}

Step4: How to install Interrupt Service routine/handler?

This step is not required for HW managed interrupts.
Interrupt service routines or interrupt handlers are installed in driver specific files or application specific files

//file usermain.c
#include "IfxCpu_Irq.h"
#include "Ifx_IntPrioDef.h" // to get the priority numbers
void userfunction_init(void)
{
//code for user function init
// :
// :
IfxCpu_Irq_installInterruptHandler (Isr_Stm0, IFX_INTPRIO_STM0);
IfxCpu_Irq_installInterruptHandler (Isr_Adc_fun1, IFX_INTPRIO_ADC_FUNC1);
// :
}

Step5: Managing the Service Request Node.

For the interrupt to get activated, interrupt triggers are needed. These triggers are activated by peripheral modules and corresponding service request node must be
1) Configured with correct priority number
2) The request node must be enabled
Refer to How to use Service Request Mechanism?


iLLD_TC26B: Functions

Functions
Functions
iLLD » CPU » Interrupt Functions
Collaboration diagram for Functions:

Functions

IFX_INLINE IfxSrc_Tos IfxCpu_Irq_getTos (IfxCpu_ResourceCpu coreId)
API to get type of service of the caller CPU. More...

Detailed Description

Function Documentation

◆ IfxCpu_Irq_getTos()

IFX_INLINE IfxSrc_Tos IfxCpu_Irq_getTos ( IfxCpu_ResourceCpu coreId )

API to get type of service of the caller CPU.

Parameters
coreId core id of the core
Returns
type of service for the corresponding CPU.

Definition at line 101 of file IfxCpu_Irq.h.


iLLD_TC26B: Trap Functions

Modules
Trap Functions
iLLD » CPU
Collaboration diagram for Trap Functions:

Modules

Trap Function Hooks
How to use the Trap Function Hooks?
Macro to define the trap vector table. This macro is provided to define the trap vector table in the frameowrk. User shall not use this macro. Refer to the documentation to extend the trap with hook functions. How to use the Trap Function Hooks?.

Detailed Description


iLLD_TC26B: Trap Function Hooks

Data Structures | Typedefs | Enumerations
Trap Function Hooks
iLLD » CPU » Trap Functions
Collaboration diagram for Trap Function Hooks:

Data Structures

union | IfxCpu_Trap_Id
Union to abstract Identification numbers under Traps. More...
struct | IfxCpu_Trap
Structure to contain the trap information. More...

Typedefs

typedef sint32 | IfxCpu_Trap_SystemCall_Id
Type for Identification numbers under SystemCall Trap. More...
typedef sint32 | IfxCpu_Trap_NonMaskableInterrupt_Id
Type for Identification number for Non Maskable Interrupt Trap. More...

Enumerations

enum IfxCpu_Trap_Class {
IfxCpu_Trap_Class_memoryManagement = 0U,
IfxCpu_Trap_Class_internalProtection = 1U,
IfxCpu_Trap_Class_instructionErrors = 2U,
IfxCpu_Trap_Class_contextManagement = 3U,
IfxCpu_Trap_Class_bus = 4U,
IfxCpu_Trap_Class_assertion = 5U,
IfxCpu_Trap_Class_systemCall = 6U,
IfxCpu_Trap_Class_nonMaskableInterrupt = 7U
}
Enum for available Trap classes. More...
enum IfxCpu_Trap_MemoryManagement_Id {
IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill = 0U,
IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection = 1U
}
Enum for available Identification numbers under Memory Management Trap. More...
enum IfxCpu_Trap_InternalProtection_Id {
IfxCpu_Trap_InternalProtection_Id_privilegeViolation = 1U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead = 2U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite = 3U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute = 4U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess = 5U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress = 6U,
IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection = 7U
}
Enum for available Identification numbers under Internal Protection Trap. More...
enum IfxCpu_Trap_InstructionErrors_Id {
IfxCpu_Trap_InstructionErrors_Id_illegalOpcode = 1U,
IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode = 2U,
IfxCpu_Trap_InstructionErrors_Id_invalidOperand = 3U,
IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment = 4U,
IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress = 5U
}
Enum for available Identification numbers under Instruction Errors Trap. More...
enum IfxCpu_Trap_ContextManagement_Id {
IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion = 1U,
IfxCpu_Trap_ContextManagement_Id_callDepthOverflow = 2U,
IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow = 3U,
IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow = 4U,
IfxCpu_Trap_ContextManagement_Id_callStackUnderflow = 5U,
IfxCpu_Trap_ContextManagement_Id_contextType = 6U,
IfxCpu_Trap_ContextManagement_Id_nestingError = 7U
}
Enum for available Identification numbers under Context Management Trap. More...
enum IfxCpu_Trap_Bus_Id {
IfxCpu_Trap_Bus_Id_programFetchSynchronousError = 1U,
IfxCpu_Trap_Bus_Id_dataAccessSynchronousError = 2U,
IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError = 3U,
IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError = 4U,
IfxCpu_Trap_Bus_Id_programMemoryIntegrityError = 5U,
IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError = 6U,
IfxCpu_Trap_Bus_Id_temporalAsynchronousError = 7U
}
Enum for available Identification numbers under Bus Trap. More...
enum IfxCpu_Trap_Assertion_Id {
IfxCpu_Trap_Assertion_Id_arithmeticOverflow = 1U,
IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow = 2U
}
Enum for available Identification numbers under Assertion Trap. More...

Detailed Description

Data Structure Documentation

◆ IfxCpu_Trap_Id

union IfxCpu_Trap_Id

Union to abstract Identification numbers under Traps.

Definition at line 168 of file IfxCpu_Trap.h.

Data Fields
IfxCpu_Trap_Assertion_Id | assertion
IfxCpu_Trap_Bus_Id | bus
IfxCpu_Trap_ContextManagement_Id | contextManagement
IfxCpu_Trap_InstructionErrors_Id | instructionErrors
IfxCpu_Trap_InternalProtection_Id | internalProtection
IfxCpu_Trap_MemoryManagement_Id | memoryManagement
IfxCpu_Trap_NonMaskableInterrupt_Id | nonMaskableInterrupt
IfxCpu_Trap_SystemCall_Id | systemCall

◆ IfxCpu_Trap

struct IfxCpu_Trap

Structure to contain the trap information.

Definition at line 183 of file IfxCpu_Trap.h.

Data Fields
unsigned int | tAddr
unsigned int | tClass: 8
unsigned int | tCpu: 3
unsigned int | tId: 8

Typedef Documentation

◆ IfxCpu_Trap_NonMaskableInterrupt_Id

typedef sint32 IfxCpu_Trap_NonMaskableInterrupt_Id

Type for Identification number for Non Maskable Interrupt Trap.

Definition at line 163 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_SystemCall_Id

typedef sint32 IfxCpu_Trap_SystemCall_Id

Type for Identification numbers under SystemCall Trap.

Definition at line 158 of file IfxCpu_Trap.h.

Enumeration Type Documentation

◆ IfxCpu_Trap_Assertion_Id

enum IfxCpu_Trap_Assertion_Id

Enum for available Identification numbers under Assertion Trap.

Enumerator
IfxCpu_Trap_Assertion_Id_arithmeticOverflow
IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow

Definition at line 149 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_Bus_Id

enum IfxCpu_Trap_Bus_Id

Enum for available Identification numbers under Bus Trap.

Enumerator
IfxCpu_Trap_Bus_Id_programFetchSynchronousError
IfxCpu_Trap_Bus_Id_dataAccessSynchronousError
IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError
IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError
IfxCpu_Trap_Bus_Id_programMemoryIntegrityError
IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError
IfxCpu_Trap_Bus_Id_temporalAsynchronousError

Definition at line 135 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_Class

enum IfxCpu_Trap_Class

Enum for available Trap classes.

Enumerator
IfxCpu_Trap_Class_memoryManagement
IfxCpu_Trap_Class_internalProtection
IfxCpu_Trap_Class_instructionErrors
IfxCpu_Trap_Class_contextManagement
IfxCpu_Trap_Class_bus
IfxCpu_Trap_Class_assertion
IfxCpu_Trap_Class_systemCall
IfxCpu_Trap_Class_nonMaskableInterrupt

Definition at line 71 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_ContextManagement_Id

enum IfxCpu_Trap_ContextManagement_Id

Enum for available Identification numbers under Context Management Trap.

Enumerator
IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion
IfxCpu_Trap_ContextManagement_Id_callDepthOverflow
IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow
IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow
IfxCpu_Trap_ContextManagement_Id_callStackUnderflow
IfxCpu_Trap_ContextManagement_Id_contextType
IfxCpu_Trap_ContextManagement_Id_nestingError

Definition at line 121 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_InstructionErrors_Id

enum IfxCpu_Trap_InstructionErrors_Id

Enum for available Identification numbers under Instruction Errors Trap.

Enumerator
IfxCpu_Trap_InstructionErrors_Id_illegalOpcode
IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode
IfxCpu_Trap_InstructionErrors_Id_invalidOperand
IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment
IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress

Definition at line 109 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_InternalProtection_Id

enum IfxCpu_Trap_InternalProtection_Id

Enum for available Identification numbers under Internal Protection Trap.

Enumerator
IfxCpu_Trap_InternalProtection_Id_privilegeViolation
IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead
IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite
IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute
IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess
IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress
IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection

Definition at line 95 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_MemoryManagement_Id

enum IfxCpu_Trap_MemoryManagement_Id

Enum for available Identification numbers under Memory Management Trap.

Enumerator
IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill
IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection

Definition at line 86 of file IfxCpu_Trap.h.


iLLD_TC26B: How to use the Trap Function Hooks?

How to use the Trap Function Hooks?
iLLD » CPU » Trap Functions

Macro to define the trap vector table. This macro is provided to define the trap vector table in the frameowrk. User shall not use this macro. Refer to the documentation to extend the trap with hook functions. How to use the Trap Function Hooks?. More...

Collaboration diagram for How to use the Trap Function Hooks?:

Macro to define the trap vector table. This macro is provided to define the trap vector table in the frameowrk. User shall not use this macro. Refer to the documentation to extend the trap with hook functions. How to use the Trap Function Hooks?.

This page describes how to use the trap function hooks with application framework.
Framework has built in Trap Service Routines, which has minimal set of debug information. The execution of trap service is as below,
1) When a trap occurs, a variable "trapInfo" is updated with the information:
a. Which CPU caused this trap,
b. What is the trap address, trap class and
c. What is the trap identification number
2) Call to a configurable hook function, passing structure trapInfo as parameter.
3) Then debug instruction executed.
4) Returning from the trap. (This instruction is not reached if debugger is connected because of "debug" instruction before)
For normal cases during development, where user works with debugger, user can watch the structure variable "trapInfo" in the debugger.

In case, user wants to make use of the information of trap for further processing,
extend the traps, using the hook functions provided.

Extending the traps with hook functions.

If the trap extensions are to be extended, it is very important to enable this feature. By default this feature is disabled.

How to enable the trap extension feature?

To extend the trap hook functions user must enable this feature by defining the macro "IFX_CFG_EXTEND_TRAP_HOOKS" in Ifx_Cfg.h, as shown below.

//file: Ifx_Cfg.h
#define IFX_CFG_EXTEND_TRAP_HOOKS

Now the compiler will accept the further configurations to extend the hooks.
Ifx_Cfg_Trap.h file shall be used to extend the traps. This provides two kind of hook functions. ie. Hook for error traps and hooks (per CPU available) for system calls.

Extending the "Error traps" with hook function.

Error trap occurs as a result of an error event such as an instruction error, memory-management error or an illegal access.
To extend the error traps, following steps are to be followed:

Step1: Define a routine to substitute the hook for error traps.

This definition shall be as user defined code (Generally in DemoApps folder).
Considerations:

  1. Format: IFX_INLINE void <trap extension name>(IfxCpu_Trap trapInfo)
    Note
    Define such a routine with the consideration that the trap extension hook is not a function. In case of context management error, this extension itself will not call any other function.
  2. Use the information trapInfo, which is available as parameter passed to this hook and process further. Example code in a user defined file eg. Ifx_TrapExtension.h,
    //Example "inlined" function for trap Extension Hook.
    IFX_INLINE myTrapExtensionHook(IfxCpu_Trap trapInfo)
    {
    switch (trapInfo.tClass)
    {
    case IfxCpu_Trap_Class_memoryManagement:
    {
    //user code: Function calls allowed.
    break;
    }
    case IfxCpu_Trap_Class_internalProtection:
    {
    //user code: Function calls allowed.
    break;
    }
    case IfxCpu_Trap_Class_instructionErrors:
    {
    //user code: Function calls allowed.
    break;
    }
    case IfxCpu_Trap_Class_contextManagement:
    {
    //user code: Function calls NOT allowed.
    break;
    }
    case IfxCpu_Trap_Class_bus:
    {
    //user code: Function calls allowed.
    break;
    }
    case IfxCpu_Trap_Class_assertion:
    {
    //user code: Function calls allowed.
    break;
    }
    case IfxCpu_Trap_Class_nonMaskableInterrupt:
    {
    //user code: Function calls allowed.
    break;
    }
    case default:
    {
    break;
    }
    }
    }
    Note
    The error trap functions execute the debug instruction immediately after returning from extension hooks.

Step2: Configure error trap hook extension function.

Configure error trap hook extension function as defined above to the macro as below:

Note
Configuration of hook extension is available in Ifx_Cfg_Trap.h
//file: Ifx_Cfg_Trap.h
#include "Ifx_TrapExtension.h" //Assuming this is the file name as in above example
#define IFX_CFG_CPU_TRAP_TSR_HOOK(trapInfo) myTrapExtensionHook(trapInfo) //This is INLINE function.
Note
The exten hooks are effective only if the feature is enabled.

Extending the cpu specific "system call" hook functions.

Tricore architecture provides the system call trap which is executed by software trigger. The instruction "syscall" triggers this trap. Please refer Tricore architecture manual for more details.
IfxCpu_trap driver provide hook function for each CPU separately. To extend System Call trap following steps are to be followed:

Step1: Define routine/s to substitute the hook/s for System Call trap.

This definition shall be as user defined code (Generally in DemoApps folder).
Considerations:

  1. Format: void <syscall function name>(IfxCpu_Trap trapInfo) It is allowed to define this trap extension as function definition, because this trap is not triggered due to any error. Depending on the application requirement, define single or per CPU instance of the extension.
  2. Use the information trapInfo which is available as parameter passed to this hook and process further. The parameter passed, with syscall instruction, will be trap identification number (refer to Tricore architecture manual for more details).
    Note
    To hook extension, information about trap identification number is available through parameter "trapInfo".
    Example code in a user defined file eg. Ifx_TrapExtension.h,
    //Example function for System Call Extension Hook.
    IFX_INLINE mySysCallExtensionHook(IfxCpu_Trap trapInfo)
    {
    switch (trapInfo.tId)
    {
    case 0:
    {
    //user code: Function calls allowed.
    break;
    }
    case 1:
    {
    //user code: Function calls allowed.
    break;
    }
    // and so on..
    case default:
    {
    break;
    }
    }
    }

Step2: Configure the extension function.\n

Configure the hook extension function defined above, to the macro as below:

Note
Configuration of hook extension is available in Ifx_Cfg_Trap.h
//file: Ifx_Cfg_Trap.h
#include "Ifx_TrapExtension.h" //Assuming this is the file name as in above example
#define IFXCPU_TRAP_CFG_SYSCALL_CPU0_HOOK(trapInfo) mySysCallExtensionHook(trapInfo)
#define IFXCPU_TRAP_CFG_SYSCALL_CPU1_HOOK(trapInfo) // Not used in this example
#define IFXCPU_TRAP_CFG_SYSCALL_CPU2_HOOK(trapInfo) // Not used in this example
#define IFXCPU_TRAP_CFG_SYSCALL_CPU3_HOOK(trapInfo) // Not used in this example
#define IFXCPU_TRAP_CFG_SYSCALL_CPU4_HOOK(trapInfo) // Not used in this example
#define IFXCPU_TRAP_CFG_SYSCALL_CPU5_HOOK(trapInfo) // Not used in this example
The exten hooks are effective only if this feature is enabled.


iLLD_TC26B: IfxCpu_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxCpu_cfg.h File Reference
iLLD » CPU

CPU on-chip implementation data. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxCpu_reg.h"
Include dependency graph for IfxCpu_cfg.h:

Go to the source code of this file.

Macros

#define | IFXCPU_NUM_MODULES (2)
CPU count. More...
#define | IFXCPU_CACHABLE_FLASH_SEGMENT (8)
Segment number of cachable flash region. More...
#define | IFXCPU_CACHABLE_LMU_SEGMENT (9)
Segment number of cachable LMU region. More...
#define | IFXCPU_CFG_ALLCORE_DONE (0x3)
All cores (coreIDs) mask. This macro can be defined by the user according to the number of core being enabled. So that can be used for syncronisation among multiple cores. In case user didn't define this macro, by default this mask will be generated for all the available cores of the device. e.g: More...
#define | IFXCPU_ALLCORE_DONE IFXCPU_CFG_ALLCORE_DONE

Enumerations

enum IfxCpu_DBGST_HALT {
IfxCpu_DBGST_HALT_run = 0,
IfxCpu_DBGST_HALT_halt = 1
}
Halt status. More...
enum IfxCpu_Id {
IfxCpu_Id_0 = 0,
IfxCpu_Id_1 = 1,
IfxCpu_Id_none
}
List of the available CPU ids. More...
enum IfxCpu_Index {
IfxCpu_Index_0 = 0,
IfxCpu_Index_1 = 1,
IfxCpu_Index_none
}
List of the available CPU resources. More...
enum IfxCpu_PMCSR_PMST {
IfxCpu_PMCSR_PMST_normalMode = 1,
IfxCpu_PMCSR_PMST_idleModeRequest = 2,
IfxCpu_PMCSR_PMST_idleMode = 3,
IfxCpu_PMCSR_PMST_sleepModeRequest = 4,
IfxCpu_PMCSR_PMST_standbyModeRequest = 6
}
Power management status. More...
enum IfxCpu_ResourceCpu {
IfxCpu_ResourceCpu_0 = IfxCpu_Index_0,
IfxCpu_ResourceCpu_1 = IfxCpu_Index_1,
IfxCpu_ResourceCpu_none = IfxCpu_Index_none
}
List of the available CPU resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap [IFXCPU_NUM_MODULES]

Detailed Description

CPU on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_cfg.h.

Macro Definition Documentation

◆ IFXCPU_ALLCORE_DONE

#define IFXCPU_ALLCORE_DONE IFXCPU_CFG_ALLCORE_DONE

Definition at line 101 of file IfxCpu_cfg.h.

◆ IFXCPU_CACHABLE_FLASH_SEGMENT

#define IFXCPU_CACHABLE_FLASH_SEGMENT (8)

Segment number of cachable flash region.

Definition at line 69 of file IfxCpu_cfg.h.

Referenced by IfxCpu_isAddressCachable().

◆ IFXCPU_CACHABLE_LMU_SEGMENT

#define IFXCPU_CACHABLE_LMU_SEGMENT (9)

Segment number of cachable LMU region.

Definition at line 73 of file IfxCpu_cfg.h.

Referenced by IfxCpu_isAddressCachable().

◆ IFXCPU_CFG_ALLCORE_DONE

#define IFXCPU_CFG_ALLCORE_DONE (0x3)

All cores (coreIDs) mask. This macro can be defined by the user according to the number of core being enabled. So that can be used for syncronisation among multiple cores. In case user didn't define this macro, by default this mask will be generated for all the available cores of the device. e.g:

  1. Check for synchronisation between core 0 and core 5

    define 0x41U

  1. Check for synchronisation between core 0 to core 5

    define 0x5FU

Note: Core id values read from CORE_ID register will be as shown below. The value indicates the position of the bit needs to be set while building the macro. Core 0: 0 Core 1: 1 Core 2: 2 Core 3: 3 Core 4: 4 Core 5: 6

Definition at line 95 of file IfxCpu_cfg.h.

Referenced by IfxCpu_waitEvent().

◆ IFXCPU_NUM_MODULES

#define IFXCPU_NUM_MODULES (2)

CPU count.

Definition at line 65 of file IfxCpu_cfg.h.

Referenced by IfxCpu_getIndex().

Enumeration Type Documentation

◆ IfxCpu_DBGST_HALT

enum IfxCpu_DBGST_HALT

Halt status.

Enumerator
IfxCpu_DBGST_HALT_run
IfxCpu_DBGST_HALT_halt

Definition at line 116 of file IfxCpu_cfg.h.

◆ IfxCpu_Id

enum IfxCpu_Id

List of the available CPU ids.

Enumerator
IfxCpu_Id_0 | CPU 0.
IfxCpu_Id_1 | CPU 1.
IfxCpu_Id_none | None of the CPU.

Definition at line 124 of file IfxCpu_cfg.h.

◆ IfxCpu_Index

enum IfxCpu_Index

List of the available CPU resources.

Enumerator
IfxCpu_Index_0 | CPU 0.
IfxCpu_Index_1 | CPU 1.
IfxCpu_Index_none | None of the CPU.

Definition at line 133 of file IfxCpu_cfg.h.

◆ IfxCpu_PMCSR_PMST

enum IfxCpu_PMCSR_PMST

Power management status.

Enumerator
IfxCpu_PMCSR_PMST_normalMode
IfxCpu_PMCSR_PMST_idleModeRequest
IfxCpu_PMCSR_PMST_idleMode
IfxCpu_PMCSR_PMST_sleepModeRequest
IfxCpu_PMCSR_PMST_standbyModeRequest

Definition at line 142 of file IfxCpu_cfg.h.

◆ IfxCpu_ResourceCpu

enum IfxCpu_ResourceCpu

List of the available CPU resources.

Enumerator
IfxCpu_ResourceCpu_0 | CPU 0.
IfxCpu_ResourceCpu_1 | CPU 1.
IfxCpu_ResourceCpu_none | None of the CPU.

Definition at line 153 of file IfxCpu_cfg.h.

Variable Documentation

◆ IfxCpu_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]

Definition at line 164 of file IfxCpu_cfg.h.


iLLD_TC26B: IfxCpu.h File Reference

  • Cpu
  • Std
Data Structures | Macros | Typedefs | Enumerations | Functions
IfxCpu.h File Reference
iLLD » CPU

CPU basic functionality. More...

#include "_Impl/IfxCpu_cfg.h"
#include "IfxSrc_reg.h"
#include "IfxScu_reg.h"
#include "IfxStm_reg.h"
#include "_Impl/IfxScu_cfg.h"
#include "_Utilities/Ifx_Assert.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxCpu.h:

Go to the source code of this file.

Data Structures

struct | IfxCpu_Counter
counter More...
struct | IfxCpu_Perf
Performance counter result. More...

Macros

#define | IFXCPU_GLB_ADDR_DSPR(cpu, address) ((((((unsigned)(address) & 0xF0000000) == 0xD0000000) ? ((((unsigned)(address) & 0x000fffff) | 0x70000000) - ((cpu) * 0x10000000)) : (unsigned)(address))))
Convert local DSPR address to global DSPR address which can be accessed from the SRI bus. Use this macro to convert a local DSPR address (in segment 0xd00.....) to a global DSPR address (in segment 0x700....., 0x600....., 0x500..... downwards) depending on the CPU number. Example usage: More...
#define | IFXCPU_GLB_ADDR_PSPR(cpu, address) ((((unsigned)(address) & 0x000fffff) | 0x70100000) - ((cpu) * 0x10000000))
Convert local PSPR address to global PSPR address which can be accessed from the SRI bus. Use this macro to convert a local PSPR address (in segment 0xc......) to a global PSPR address (in segment 0x701....., 0x601....., 0x501..... downwards) depending on the CPU number. More...

Typedefs

typedef unsigned int | IfxCpu_spinLock
Lock type Spin lock. More...
typedef unsigned int | IfxCpu_mutexLock
Lock type Mutex lock. More...
typedef unsigned int | IfxCpu_syncEvent
Event used for synchronisation. More...

Enumerations

enum IfxCpu_CoreMode {
IfxCpu_CoreMode_halt,
IfxCpu_CoreMode_run,
IfxCpu_CoreMode_idle,
IfxCpu_CoreMode_sleep,
IfxCpu_CoreMode_stby,
IfxCpu_CoreMode_unknown
}
Enumeration for the Cpu mode. More...
enum IfxCpu_CounterMode {
IfxCpu_CounterMode_normal = 0,
IfxCpu_CounterMode_task = 1
}
Performance conunter modes. More...

Functions

IFX_INLINE Ifx_CPU * | IfxCpu_getAddress (IfxCpu_ResourceCpu cpu)
API to get the address for CPU HW module register memory map. More...
IFX_INLINE IfxCpu_Id | IfxCpu_getCoreId (void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu's may not be continguous and shouldn't be used to index cpu. Use IfxCpu_getCoreIndex() to get cpu no. More...
IFX_INLINE IfxCpu_ResourceCpu | IfxCpu_getCoreIndex (void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed. More...
IFX_INLINE void | IfxCpu_initCSA (uint32 *csaBegin, uint32 *csaEnd)
API to initialize the context save area of the CPU where this is called. More...
IFX_INLINE void | IfxCpu_setSafetyTaskIdentifier (boolean safetyId)
Set/Clear safety task identifier (PSW.S) on current CPU. More...
IFX_INLINE void | IfxCpu_triggerSwReset (void)
Triggers Software Reset. More...
IFX_EXTERN IfxCpu_CoreMode | IfxCpu_getCoreMode (Ifx_CPU *cpu)
API to get current mode of CPU. More...
IFX_EXTERN IfxCpu_ResourceCpu | IfxCpu_getIndex (Ifx_CPU *cpu)
API to get current mode of CPU. More...
IFX_EXTERN boolean | IfxCpu_setCoreMode (Ifx_CPU *cpu, IfxCpu_CoreMode mode)
API to set mode of the CPU. More...
IFX_EXTERN boolean | IfxCpu_setProgramCounter (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified. More...
IFX_EXTERN boolean | IfxCpu_startCore (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified and start the CPU. More...
IFX_INLINE boolean | IfxCpu_areInterruptsEnabled (void)
API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API provides the status of CPU where this API is called. More...
IFX_INLINE boolean | IfxCpu_disableInterrupts (void)
API to disable global interrupt and return the previous status. More...
IFX_INLINE void | IfxCpu_enableInterrupts (void)
API to enable global interrupt. This API simply enables the global interrupt. More...
IFX_INLINE void | IfxCpu_forceDisableInterrupts (void)
Disable the Global Interrupt. More...
IFX_INLINE void | IfxCpu_restoreInterrupts (boolean enabled)
API to restore global interrupt with that of the passed parameter. More...
IFX_INLINE void | IfxCpu_enableSegmentSpecificDataAccessCacheability (uint16 segmentNumberMask, boolean enable)
API to enable/ disable the data cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before. More...
IFX_INLINE void | IfxCpu_enableSegmentSpecificInstructionAccessCacheability (uint16 segmentNumberMask, boolean enable)
API to enable/ disable the instruction cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before. More...
IFX_INLINE void | IfxCpu_invalidateProgramCache (void)
API to invalidate the program cache. More...
IFX_INLINE boolean | IfxCpu_isAddressCachable (void *address)
API to determine if an address is in a cachable or non-cachable Flash/LMU section. More...
IFX_INLINE void | IfxCpu_setDataCache (boolean enable)
API to enable or bypass the data cache for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_setProgramCache (boolean enable)
API to enable or bypass the program cache for the CPU which calls this API. More...
IFX_INLINE uint32 | IfxCpu_getClockCounter (void)
API to read the clock counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getClockCounterStickyOverflow (void)
API to get sticky overflow bit of clock counter for the CPU, which calls this API. More...
IFX_INLINE uint32 | IfxCpu_getInstructionCounter (void)
API to read the instruction counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getInstructionCounterStickyOverflow (void)
API to get sticky overflow bit of Instruction counter for the CPU, which calls this API. More...
IFX_INLINE uint32 | IfxCpu_getPerformanceCounter (uint16 address)
API to read the performance counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getPerformanceCounterStickyOverflow (uint16 address)
API to get sticky overflow bit of performance counter for the CPU, which calls this API. This is generic function to get sticky overflow bit of any performance counters. More...
IFX_INLINE void | IfxCpu_resetAndStartCounters (IfxCpu_CounterMode mode)
Reset and start instruction, clock and multi counters. More...
IFX_INLINE void | IfxCpu_setPerformanceCountersEnableBit (uint32 enable)
API to enable or disable performance counter for the CPU which calls this API. More...
IFX_INLINE IfxCpu_Perf | IfxCpu_stopCounters (void)
Stop instruction and clock counters, return their values. More...
IFX_INLINE void | IfxCpu_updateClockCounter (uint32 count)
API to update clock counter for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_updateInstructionCounter (uint32 count)
API to update Instruction counter for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_updatePerformanceCounter (uint32 address, uint32 count)
API to update performance counter for the CPU which calls this API. This is generic function to update any of the performance counters. More...
IFX_EXTERN boolean | IfxCpu_acquireMutex (IfxCpu_mutexLock *lock)
API to acquire the mutex (binary semaphore). More...
IFX_EXTERN void | IfxCpu_releaseMutex (IfxCpu_mutexLock *lock)
API to unlock the mutex . More...
IFX_EXTERN void | IfxCpu_resetSpinLock (IfxCpu_spinLock *lock)
API to unlock the resource . More...
IFX_EXTERN boolean | IfxCpu_setSpinLock (IfxCpu_spinLock *lock, uint32 timeoutCount)
API to lock the resource in spin mode with the given timeout. More...
IFX_EXTERN uint32 | IfxCpu_getRandomValue (uint32 *seed)
API to get random value. More...
IFX_EXTERN uint32 | IfxCpu_getRandomValueWithinRange (uint32 *seed, uint32 min, uint32 max)
API to get random value with in the range. More...
IFX_EXTERN boolean | IfxCpu_waitEvent (IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation. More...
IFX_EXTERN void | IfxCpu_emitEvent (IfxCpu_syncEvent *event)
This function sets a bit corresponding to the core in the event. More...

Detailed Description

CPU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu.h.

Macro Definition Documentation

◆ IFXCPU_GLB_ADDR_DSPR

#define IFXCPU_GLB_ADDR_DSPR | ( | cpu,
 |  | address
 | ) | ((((((unsigned)(address) & 0xF0000000) == 0xD0000000) ? ((((unsigned)(address) & 0x000fffff) | 0x70000000) - ((cpu) * 0x10000000)) : (unsigned)(address))))

Convert local DSPR address to global DSPR address which can be accessed from the SRI bus. Use this macro to convert a local DSPR address (in segment 0xd00.....) to a global DSPR address (in segment 0x700....., 0x600....., 0x500..... downwards) depending on the CPU number. Example usage:

dmaChConfig.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i][0]);
dmaChConfig.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &destinationBuffer[i][0]);

Definition at line 90 of file IfxCpu.h.

Referenced by IfxCpu_waitEvent(), IfxEth_RxDescr_setBuffer(), IfxEth_setReceiveBuffer1RingMode(), IfxEth_setReceiveBuffer2RingMode(), IfxEth_setTransmitBuffer1RingMode(), IfxEth_setTransmitBuffer2RingMode(), IfxEth_TxDescr_setBuffer(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IFXCPU_GLB_ADDR_PSPR

#define IFXCPU_GLB_ADDR_PSPR | ( | cpu,
 |  | address
 | ) | ((((unsigned)(address) & 0x000fffff) | 0x70100000) - ((cpu) * 0x10000000))

Convert local PSPR address to global PSPR address which can be accessed from the SRI bus. Use this macro to convert a local PSPR address (in segment 0xc......) to a global PSPR address (in segment 0x701....., 0x601....., 0x501..... downwards) depending on the CPU number.

Example usage:

dmaChConfig.sourceAddress = IFXCPU_GLB_ADDR_PSPR(IfxCpu_getCoreId(), &sourceBufferInPsprMemory);
dmaChConfig.destinationAddress = IFXCPU_GLB_ADDR_PSPR(IfxCpu_getCoreId(), &destinationBufferInPsprMemory);

Definition at line 103 of file IfxCpu.h.

Typedef Documentation

◆ IfxCpu_mutexLock

typedef unsigned int IfxCpu_mutexLock

Lock type Mutex lock.

Definition at line 115 of file IfxCpu.h.

◆ IfxCpu_spinLock

typedef unsigned int IfxCpu_spinLock

Lock type Spin lock.

Definition at line 111 of file IfxCpu.h.

◆ IfxCpu_syncEvent

typedef unsigned int IfxCpu_syncEvent

Event used for synchronisation.

Definition at line 119 of file IfxCpu.h.


iLLD_TC26B: DMA

Modules | Files
DMA
iLLD
Collaboration diagram for DMA:

Modules

Implementation
Standard Driver
How to use the DMA Interface driver?
DMA

Files

file | IfxDma_cfg.h
DMA on-chip implementation data.
file | IfxDma_Dma.h
DMA DMA details.
file | IfxDma.h
DMA basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » DMA
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » DMA
Collaboration diagram for Standard Driver:

Modules

Enumerations
Reset Functions
Channel Transaction Functions
Move Engine functions
Channel configuration Functions
Channel Halt Functions
Double Buffer functions
Interrupt functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » DMA » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxDma_BusMasterMode {
IfxDma_BusMasterMode_user = 0,
IfxDma_BusMasterMode_supervisor = 1
}
Bus Master Mode definition Definition in Ifx_DMA.MODE[4].B.MODE. More...
enum IfxDma_ChannelBusPriority {
IfxDma_ChannelBusPriority_low = 0,
IfxDma_ChannelBusPriority_medium = 1,
IfxDma_ChannelBusPriority_high = 2
}
Channel Bus Priority definition. More...
enum IfxDma_ChannelIncrementCircular {
IfxDma_ChannelIncrementCircular_none = 0,
IfxDma_ChannelIncrementCircular_2 = 1,
IfxDma_ChannelIncrementCircular_4 = 2,
IfxDma_ChannelIncrementCircular_8 = 3,
IfxDma_ChannelIncrementCircular_16 = 4,
IfxDma_ChannelIncrementCircular_32 = 5,
IfxDma_ChannelIncrementCircular_64 = 6,
IfxDma_ChannelIncrementCircular_128 = 7,
IfxDma_ChannelIncrementCircular_256 = 8,
IfxDma_ChannelIncrementCircular_512 = 9,
IfxDma_ChannelIncrementCircular_1024 = 10,
IfxDma_ChannelIncrementCircular_2048 = 11,
IfxDma_ChannelIncrementCircular_4096 = 12,
IfxDma_ChannelIncrementCircular_8192 = 13,
IfxDma_ChannelIncrementCircular_16384 = 14,
IfxDma_ChannelIncrementCircular_32768 = 15
}
DMA circular buffer (wrap around) definition Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD. More...
enum IfxDma_ChannelIncrementDirection {
IfxDma_ChannelIncrementDirection_negative = 0,
IfxDma_ChannelIncrementDirection_positive = 1
}
DMA incrementation direction definition Definition in Ifx_DMA.CH[64].ADICR.B.INCS. More...
enum IfxDma_ChannelIncrementStep {
IfxDma_ChannelIncrementStep_1 = 0,
IfxDma_ChannelIncrementStep_2 = 1,
IfxDma_ChannelIncrementStep_4 = 2,
IfxDma_ChannelIncrementStep_8 = 3,
IfxDma_ChannelIncrementStep_16 = 4,
IfxDma_ChannelIncrementStep_32 = 5,
IfxDma_ChannelIncrementStep_64 = 6,
IfxDma_ChannelIncrementStep_128 = 7
}
DMA incrementation definition Definition in Ifx_DMA.CH[64].ADICR.B.SMF. More...
enum IfxDma_ChannelInterruptControl {
IfxDma_ChannelInterruptControl_thresholdLimitMatch = 0,
IfxDma_ChannelInterruptControl_transferCountDecremented = 1
}
Channel Transfer Interrupt generation mechanism. Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0) More...
enum IfxDma_ChannelMove {
IfxDma_ChannelMove_1 = 0,
IfxDma_ChannelMove_2 = 1,
IfxDma_ChannelMove_4 = 2,
IfxDma_ChannelMove_8 = 3,
IfxDma_ChannelMove_16 = 4,
IfxDma_ChannelMove_3 = 5,
IfxDma_ChannelMove_5 = 6,
IfxDma_ChannelMove_9 = 7
}
DMA transfer definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.BLKM and Ifx_DMA.BLK1.ME.CHCR.B.BLKM. More...
enum IfxDma_ChannelMoveSize {
IfxDma_ChannelMoveSize_8bit = 0,
IfxDma_ChannelMoveSize_16bit = 1,
IfxDma_ChannelMoveSize_32bit = 2,
IfxDma_ChannelMoveSize_64bit = 3,
IfxDma_ChannelMoveSize_128bit = 4,
IfxDma_ChannelMoveSize_256bit = 5
}
DMA move size definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHDW and Ifx_DMA.BLK1.ME.CHCR.B.CHDW. More...
enum IfxDma_ChannelOperationMode {
IfxDma_ChannelOperationMode_single = 0,
IfxDma_ChannelOperationMode_continuous = 1
}
DMA operation mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHMODE and Ifx_DMA.BLK1.ME.CHCR.B.CHMODE. More...
enum IfxDma_ChannelPattern {
IfxDma_ChannelPattern_0_disable = 0,
IfxDma_ChannelPattern_0_mode1 = 1,
IfxDma_ChannelPattern_0_mode2 = 2,
IfxDma_ChannelPattern_0_mode3 = 3,
IfxDma_ChannelPattern_1_disable = 4,
IfxDma_ChannelPattern_1_mode1 = 5,
IfxDma_ChannelPattern_1_mode2 = 6,
IfxDma_ChannelPattern_1_mode3 = 7
}
Pattern detection selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PATSEL and Ifx_DMA.BLK1.ME.CHCR.B.PATSEL. More...
enum IfxDma_ChannelPriority {
IfxDma_ChannelPriority_low = 0,
IfxDma_ChannelPriority_medium = 1,
IfxDma_ChannelPriority_high = 2
}
Channel Priority definition. More...
enum IfxDma_ChannelRequestMode {
IfxDma_ChannelRequestMode_oneTransferPerRequest = 0,
IfxDma_ChannelRequestMode_completeTransactionPerRequest = 1
}
DMA request mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.RROAT and Ifx_DMA.BLK1.ME.CHCR.B.RROAT. More...
enum IfxDma_ChannelRequestSource {
IfxDma_ChannelRequestSource_peripheral = 0,
IfxDma_ChannelRequestSource_daisyChain = 1
}
DMA request selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PRSEL and Ifx_DMA.BLK1.ME.CHCR.B.PRSEL. More...
enum IfxDma_ChannelShadow {
IfxDma_ChannelShadow_none = 0,
IfxDma_ChannelShadow_src = 1,
IfxDma_ChannelShadow_dst = 2,
IfxDma_ChannelShadow_srcDirectWrite = 5,
IfxDma_ChannelShadow_dstDirectWrite = 6,
IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch = 8,
IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch = 9,
IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch = 10,
IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch = 11,
IfxDma_ChannelShadow_linkedList = 12,
IfxDma_ChannelShadow_accumulatedLinkedList = 13,
IfxDma_ChannelShadow_safeLinkedList = 14,
IfxDma_ChannelShadow_conditionalLinkedList = 15
}
shadow definition definition Definition in Ifx_DMA.CH[64].ADICR.B.SHCT More...
enum IfxDma_HardwareResourcePartition {
IfxDma_HardwareResourcePartition_0 = 0,
IfxDma_HardwareResourcePartition_1,
IfxDma_HardwareResourcePartition_2,
IfxDma_HardwareResourcePartition_3
}
enum IfxDma_MoveEngine {
IfxDma_MoveEngine_0 = 0,
IfxDma_MoveEngine_1 = 1
}
DMA move engine definition. More...
enum IfxDma_SleepMode {
IfxDma_SleepMode_enable = 0,
IfxDma_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_DMA.CLC.B.EDIS. More...

Detailed Description

Enumeration Type Documentation

◆ IfxDma_BusMasterMode

enum IfxDma_BusMasterMode

Bus Master Mode definition Definition in Ifx_DMA.MODE[4].B.MODE.

Enumerator
IfxDma_BusMasterMode_user | Selected hardware resource performs Bus access in user mode.
IfxDma_BusMasterMode_supervisor | Selected hardware resource performs Bus access in supervisor mode.

Definition at line 83 of file IfxDma.h.

◆ IfxDma_ChannelBusPriority

enum IfxDma_ChannelBusPriority

Channel Bus Priority definition.

Enumerator
IfxDma_ChannelBusPriority_low | low priority
IfxDma_ChannelBusPriority_medium | medium priority
IfxDma_ChannelBusPriority_high | high priority

Definition at line 91 of file IfxDma.h.

◆ IfxDma_ChannelIncrementCircular

enum IfxDma_ChannelIncrementCircular

DMA circular buffer (wrap around) definition Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD.

Enumerator
IfxDma_ChannelIncrementCircular_none | no circular buffer operation
IfxDma_ChannelIncrementCircular_2 | circular buffer size is 2 byte
IfxDma_ChannelIncrementCircular_4 | circular buffer size is 4 byte
IfxDma_ChannelIncrementCircular_8 | circular buffer size is 8 byte
IfxDma_ChannelIncrementCircular_16 | circular buffer size is 16 byte
IfxDma_ChannelIncrementCircular_32 | circular buffer size is 32 byte
IfxDma_ChannelIncrementCircular_64 | circular buffer size is 64 byte
IfxDma_ChannelIncrementCircular_128 | circular buffer size is 128 byte
IfxDma_ChannelIncrementCircular_256 | circular buffer size is 256 byte
IfxDma_ChannelIncrementCircular_512 | circular buffer size is 512 byte
IfxDma_ChannelIncrementCircular_1024 | circular buffer size is 1024 byte
IfxDma_ChannelIncrementCircular_2048 | circular buffer size is 2048 byte
IfxDma_ChannelIncrementCircular_4096 | circular buffer size is 4096 byte
IfxDma_ChannelIncrementCircular_8192 | circular buffer size is 8192 byte
IfxDma_ChannelIncrementCircular_16384 | circular buffer size is 16384 byte
IfxDma_ChannelIncrementCircular_32768 | circular buffer size is 32768 byte

Definition at line 101 of file IfxDma.h.

◆ IfxDma_ChannelIncrementDirection

enum IfxDma_ChannelIncrementDirection

DMA incrementation direction definition Definition in Ifx_DMA.CH[64].ADICR.B.INCS.

Enumerator
IfxDma_ChannelIncrementDirection_negative | pointer is decremented
IfxDma_ChannelIncrementDirection_positive | pointer is incremented

Definition at line 124 of file IfxDma.h.

◆ IfxDma_ChannelIncrementStep

enum IfxDma_ChannelIncrementStep

DMA incrementation definition Definition in Ifx_DMA.CH[64].ADICR.B.SMF.

Enumerator
IfxDma_ChannelIncrementStep_1 | increment by 1 width
IfxDma_ChannelIncrementStep_2 | increment by 2 width
IfxDma_ChannelIncrementStep_4 | increment by 4 width
IfxDma_ChannelIncrementStep_8 | increment by 8 width
IfxDma_ChannelIncrementStep_16 | increment by 16 width
IfxDma_ChannelIncrementStep_32 | increment by 32 width
IfxDma_ChannelIncrementStep_64 | increment by 64 width
IfxDma_ChannelIncrementStep_128 | increment by 128 width

Definition at line 133 of file IfxDma.h.

◆ IfxDma_ChannelInterruptControl

enum IfxDma_ChannelInterruptControl

Channel Transfer Interrupt generation mechanism. Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0)

Enumerator
IfxDma_ChannelInterruptControl_thresholdLimitMatch | interrupt when transfer count (TCOUNT) equals the threshold limit (IRDV)
IfxDma_ChannelInterruptControl_transferCountDecremented | interrupt when transfer count (TCOUNT) is decremented

Definition at line 148 of file IfxDma.h.

◆ IfxDma_ChannelMove

enum IfxDma_ChannelMove

DMA transfer definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.BLKM and Ifx_DMA.BLK1.ME.CHCR.B.BLKM.

Enumerator
IfxDma_ChannelMove_1 | 1 DMA move per DMA transfer
IfxDma_ChannelMove_2 | 2 DMA move per DMA transfer
IfxDma_ChannelMove_4 | 4 DMA move per DMA transfer
IfxDma_ChannelMove_8 | 8 DMA move per DMA transfer
IfxDma_ChannelMove_16 | 16 DMA move per DMA transfer
IfxDma_ChannelMove_3 | 3 DMA move per DMA transfer
IfxDma_ChannelMove_5 | 5 DMA move per DMA transfer
IfxDma_ChannelMove_9 | 9 DMA move per DMA transfer

Definition at line 157 of file IfxDma.h.

◆ IfxDma_ChannelMoveSize

enum IfxDma_ChannelMoveSize

DMA move size definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHDW and Ifx_DMA.BLK1.ME.CHCR.B.CHDW.

Enumerator
IfxDma_ChannelMoveSize_8bit | 1 DMA move is 8 bit wide
IfxDma_ChannelMoveSize_16bit | 1 DMA move is 16 bit wide
IfxDma_ChannelMoveSize_32bit | 1 DMA move is 32 bit wide
IfxDma_ChannelMoveSize_64bit | 1 DMA move is 64 bit wide
IfxDma_ChannelMoveSize_128bit | 1 DMA move is 128 bit wide
IfxDma_ChannelMoveSize_256bit | 1 DMA move is 256 bit wide

Definition at line 172 of file IfxDma.h.

◆ IfxDma_ChannelOperationMode

enum IfxDma_ChannelOperationMode

DMA operation mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHMODE and Ifx_DMA.BLK1.ME.CHCR.B.CHMODE.

Enumerator
IfxDma_ChannelOperationMode_single | channel disabled after transaction
IfxDma_ChannelOperationMode_continuous | channel stays enabled after transaction

Definition at line 185 of file IfxDma.h.

◆ IfxDma_ChannelPattern

enum IfxDma_ChannelPattern

Pattern detection selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PATSEL and Ifx_DMA.BLK1.ME.CHCR.B.PATSEL.

Enumerator
IfxDma_ChannelPattern_0_disable | Pattern detect 0 disabled.
IfxDma_ChannelPattern_0_mode1 | Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2].
IfxDma_ChannelPattern_0_mode2 | Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT0[1] masked by PAT0[3].
IfxDma_ChannelPattern_0_mode3 | Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2] of actual DMA read move and pattern compare of MExR.RD[0] to PAT0[1] masked by PAT0[3] of previous DMA read move.
IfxDma_ChannelPattern_1_disable | Pattern detect 1 disabled.
IfxDma_ChannelPattern_1_mode1 | Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2].
IfxDma_ChannelPattern_1_mode2 | Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT1[1] masked by PAT1[3].
IfxDma_ChannelPattern_1_mode3 | Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2] of actual DMA read move and pattern compare of MExR.RD[0] to PAT1[1] masked by PAT1[3] of previous DMA read move.

Definition at line 194 of file IfxDma.h.

◆ IfxDma_ChannelPriority

enum IfxDma_ChannelPriority

Channel Priority definition.

Enumerator
IfxDma_ChannelPriority_low | low priority
IfxDma_ChannelPriority_medium | medium priority
IfxDma_ChannelPriority_high | high priority

Definition at line 208 of file IfxDma.h.

◆ IfxDma_ChannelRequestMode

enum IfxDma_ChannelRequestMode

DMA request mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.RROAT and Ifx_DMA.BLK1.ME.CHCR.B.RROAT.

Enumerator
IfxDma_ChannelRequestMode_oneTransferPerRequest | a request initiates a single transfer
IfxDma_ChannelRequestMode_completeTransactionPerRequest | a request initiates a complete transaction

Definition at line 218 of file IfxDma.h.

◆ IfxDma_ChannelRequestSource

enum IfxDma_ChannelRequestSource

DMA request selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PRSEL and Ifx_DMA.BLK1.ME.CHCR.B.PRSEL.

Enumerator
IfxDma_ChannelRequestSource_peripheral | Transfer Request via Hardware Trigger.
IfxDma_ChannelRequestSource_daisyChain | Transfer Request via next (higher priority) channel.

Definition at line 227 of file IfxDma.h.

◆ IfxDma_ChannelShadow

enum IfxDma_ChannelShadow

shadow definition definition Definition in Ifx_DMA.CH[64].ADICR.B.SHCT

Enumerator
IfxDma_ChannelShadow_none | shadow address register not used. Source and destination address register are written directly
IfxDma_ChannelShadow_src | Shadow address register used for source address buffering. When writing to SADRmx, the address is buffered in SHADRmx and transferred to SADRmx with the start of the next DMA transaction.
IfxDma_ChannelShadow_dst | Shadow address register used for destination address buffering. When writing to DADRmx, the address is buffered in SHADRmx and transferred to DADRmx with the start of the next DMA transaction.
IfxDma_ChannelShadow_srcDirectWrite | Shadow address used for source buffering. When writing to SADRz, the address is buffered in SHADRz and transferred to SADRz with the start of the next DMA transaction.
IfxDma_ChannelShadow_dstDirectWrite | Shadow address used for destination buffering. When writing to DADRz, the address is buffered in SHADRz and transferred to DADRz with the start of the next DMA transaction.
IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch | Software switch only. Shadow address used for double buffering.
IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch | Automatic Hardware and Software switch. Shadow address used for double buffering.
IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch | Software switch only. Shadow address used for double buffering.
IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch | Automatic Hardware and Software switch. Shadow address used for double buffering.
IfxDma_ChannelShadow_linkedList | The DMA controller reads a DMA channel transaction control set and overwrites 8 X words in the corresponding DMARAM channel z.
IfxDma_ChannelShadow_accumulatedLinkedList | The DMA controller reads a DMA channel transaction control set and overwrites 6 X words in the corresponding DMARAM channel z.
IfxDma_ChannelShadow_safeLinkedList | The DMA controller reads a DMA channel transaction control set. The Linked List only proceeds with the next DMA transaction if the existing SDCRC checksum matches the expected SDCRC checksum in the loaded from the new DMA transaction control set.
IfxDma_ChannelShadow_conditionalLinkedList | Shadow address register (MExSHADR) and source and destination address CRC register (MExSDCRC) are used as address pointers to a Linked List. The selection of the address pointer is determined by DMA channel pattern detection conditions.

Definition at line 236 of file IfxDma.h.

◆ IfxDma_HardwareResourcePartition

enum IfxDma_HardwareResourcePartition
Enumerator
IfxDma_HardwareResourcePartition_0 | "Set of DMA channels are associated with hardware resource partition " + str(x)
IfxDma_HardwareResourcePartition_1 | "Set of DMA channels are associated with hardware resource partition " + str(x)
IfxDma_HardwareResourcePartition_2 | "Set of DMA channels are associated with hardware resource partition " + str(x)
IfxDma_HardwareResourcePartition_3 | "Set of DMA channels are associated with hardware resource partition " + str(x)

Definition at line 253 of file IfxDma.h.

◆ IfxDma_MoveEngine

enum IfxDma_MoveEngine

DMA move engine definition.

Enumerator
IfxDma_MoveEngine_0 | first move engine
IfxDma_MoveEngine_1 | second move engine

Definition at line 263 of file IfxDma.h.

◆ IfxDma_SleepMode

enum IfxDma_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_DMA.CLC.B.EDIS.

Enumerator
IfxDma_SleepMode_enable | enables sleep mode
IfxDma_SleepMode_disable | disables sleep mode

Definition at line 272 of file IfxDma.h.


iLLD_TC26B: Reset Functions

Functions
Reset Functions
iLLD » DMA » Standard Driver
Collaboration diagram for Reset Functions:

Functions

IFX_INLINE boolean | IfxDma_isChannelReset (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (reset / not reset) This API needs to be used after the IfxDma_resetChannel() More...
IFX_INLINE void | IfxDma_resetChannel (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Reset the channel. More...

Detailed Description

Function Documentation

◆ IfxDma_isChannelReset()

IFX_INLINE boolean IfxDma_isChannelReset | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return the status of a DMA channel (reset / not reset) This API needs to be used after the IfxDma_resetChannel()

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if the channel is reset FALSE if the channel is not reset
// check whether the channel is reset or not and also the hardware trigger disabled
if (IfxDma_isChannelReset(chn[0].dma, chn[0].channelId) &&
(!IfxDma_isChannelTransactionEnabled(chn[0].dma, chn[0].channelId))) {
// Dma is out of RESET and there is no hardware request enabled
IfxDma_Dma_startChannelTransaction(&chn[0]);
}

Definition at line 1541 of file IfxDma.h.

Referenced by IfxDma_Dma_deInitChannel().

◆ IfxDma_resetChannel()

IFX_INLINE void IfxDma_resetChannel | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Reset the channel.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Apply reset to the channel
IfxDma_resetChannel(chn[0].dma, chn[0].channelId);

Definition at line 1565 of file IfxDma.h.

Referenced by IfxDma_Dma_deInitChannel().


iLLD_TC26B: Channel Transaction Functions

Functions
Channel Transaction Functions
iLLD » DMA » Standard Driver
Collaboration diagram for Channel Transaction Functions:

Functions

IFX_INLINE void | IfxDma_clearChannelTransactionRequestLost (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear the channel transaction request lost flag status. More...
IFX_INLINE void | IfxDma_disableChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable a DMA channel hardware transaction request. More...
IFX_INLINE void | IfxDma_disableChannelTransactionLostError (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable the generation of a channel transaction lost error interrupt. More...
IFX_INLINE void | IfxDma_enableChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable a DMA channel hardware transaction request. More...
IFX_INLINE void | IfxDma_enableChannelTransactionLostError (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the generation of a channel transaction lost error interrupt. More...
IFX_INLINE boolean | IfxDma_getChannelTransactionRequestLost (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Check the channel transaction request lost flag status. More...
IFX_INLINE IfxDma_ChannelIncrementCircular | IfxDma_getCircularRangeCode (uint16 range)
Converts DMA circular range to circular code. More...
IFX_INLINE boolean | IfxDma_isChannelTransactionEnabled (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the hardware transaction request status of a DMA channel. More...
IFX_INLINE boolean | IfxDma_isChannelTransactionPending (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (transaction pending) More...
IFX_INLINE void | IfxDma_setSleepMode (Ifx_DMA *dma, IfxDma_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxDma_startChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Request a DMA channel transaction. More...

Detailed Description

Function Documentation

◆ IfxDma_clearChannelTransactionRequestLost()

IFX_INLINE void IfxDma_clearChannelTransactionRequestLost | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Clear the channel transaction request lost flag status.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Clear the channel transaction request lost flag status
IfxDma_clearChannelTransactionRequestLost(chn[0].dma, chn[0].channelId);

Definition at line 1268 of file IfxDma.h.

◆ IfxDma_disableChannelTransaction()

IFX_INLINE void IfxDma_disableChannelTransaction | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Disable a DMA channel hardware transaction request.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_enableChannelTransaction

Definition at line 1293 of file IfxDma.h.

Referenced by IfxDma_Dma_deInitChannel(), and IfxQspi_SpiMaster_isrDmaTransmit().

◆ IfxDma_disableChannelTransactionLostError()

IFX_INLINE void IfxDma_disableChannelTransactionLostError | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Disable the generation of a channel transaction lost error interrupt.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Disable the transaction request lost interrupt for given channel
IfxDma_disableChannelTransactionLostError(chn[0].dma, chn[0].channelId);

Definition at line 1299 of file IfxDma.h.

◆ IfxDma_enableChannelTransaction()

IFX_INLINE void IfxDma_enableChannelTransaction | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Enable a DMA channel hardware transaction request.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
unsigned *src = (unsigned *)((unsigned)&SRC_DMACH0.U + 4*NUM_CHANNELS);
for(int chn=0; chn<NUM_CHANNELS; ++chn, ++src) {
IfxSrc_setRequest(src);
}
// Do not restrict the hardware triggering to only one transaction
IfxDma_setChannelContinuousMode(chn[0].dma, chn[0].channelId);
IfxDma_setChannelContinuousMode(chn[1].dma, chn[1].channelId);
IfxDma_setChannelContinuousMode(chn[2].dma, chn[2].channelId);
// Check for end of transaction
while(!(IfxDma_getAndClearChannelInterrupt(chn[0].dma, chn[0].channelId)));
// Enable the hardware trigger for channel 3
IfxDma_enableChannelTransaction(chn[3].dma, chn[3].channelId);
// Disable the hardware trigger for channel 2
IfxDma_disableChannelTransaction(chn[2].dma, chn[2].channelId);
// Hardware triggers for second time
unsigned *SRc = (unsigned *)((unsigned)&SRC_DMACH0.U + 4*NUM_CHANNELS);
for(int chn=0; chn<NUM_CHANNELS; ++chn, ++src) {
IfxSrc_setRequest(src);
}
// Restrict the hardware triggering to only one transaction
IfxDma_setChannelSingleMode(chn[0].dma, chn[0].channelId);
IfxDma_setChannelSingleMode(chn[1].dma, chn[1].channelId);

Definition at line 1337 of file IfxDma.h.

Referenced by IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_enableChannelTransactionLostError()

IFX_INLINE void IfxDma_enableChannelTransactionLostError | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Enable the generation of a channel transaction lost error interrupt.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Enable the transaction request lost interrupt for given channel
IfxDma_enableChannelTransactionLostError(chn[0].dma, chn[0].channelId);

Definition at line 1343 of file IfxDma.h.

◆ IfxDma_getChannelTransactionRequestLost()

IFX_INLINE boolean IfxDma_getChannelTransactionRequestLost | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Check the channel transaction request lost flag status.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if the TRL is set FALSE if the TRL is not set
boolean trlFlag;
// Check whether the channel transaction request lost flag is set or not
trlFlag = IfxDma_getChannelTransactionRequestLost(chn[0].dma, chn[0].channelId));

Definition at line 1475 of file IfxDma.h.

◆ IfxDma_getCircularRangeCode()

IFX_INLINE IfxDma_ChannelIncrementCircular IfxDma_getCircularRangeCode ( uint16 range )

Converts DMA circular range to circular code.

Parameters
range DMA circular range
Returns
DMA circular code

Definition at line 1487 of file IfxDma.h.

◆ IfxDma_isChannelTransactionEnabled()

IFX_INLINE boolean IfxDma_isChannelTransactionEnabled | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return the hardware transaction request status of a DMA channel.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if the hardware transaction request is enabled FALSE if the hardware transaction request is disabled

A coding example can be found in IfxDma_isChannelReset

Definition at line 1547 of file IfxDma.h.

Referenced by IfxDma_Dma_deInitChannel().

◆ IfxDma_isChannelTransactionPending()

IFX_INLINE boolean IfxDma_isChannelTransactionPending | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return the status of a DMA channel (transaction pending)

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if a transaction request for the given channel is pending
// check for the channel request pending with the channel
if (IfxDma_isChannelTransactionPending(chn[0].dma, chn[0].channelId) == TRUE) {
// There is channel request pending for channel 0
result |= 0;
}

Definition at line 1553 of file IfxDma.h.

Referenced by IfxDma_Dma_isChannelTransactionPending().

◆ IfxDma_setSleepMode()

IFX_INLINE void IfxDma_setSleepMode | ( | Ifx_DMA * | dma,
 |  | IfxDma_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
dma | pointer to DMA registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 1671 of file IfxDma.h.

◆ IfxDma_startChannelTransaction()

IFX_INLINE void IfxDma_startChannelTransaction | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Request a DMA channel transaction.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_Dma_startChannelTransaction

Definition at line 1680 of file IfxDma.h.

Referenced by IfxDma_Dma_startChannelTransaction(), IfxFft_Fft_loadInput(), IfxFft_Fft_unloadOutput(), and IfxQspi_SpiSlave_write().


iLLD_TC26B: Move Engine functions

Functions
Move Engine functions
iLLD » DMA » Standard Driver
Collaboration diagram for Move Engine functions:

Functions

IFX_INLINE void | IfxDma_clearErrorFlags (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine, uint32 mask)
Clear the DMA error status flags. More...
IFX_INLINE void | IfxDma_disableMoveEngineDestinationError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine destination error interrupt. More...
IFX_INLINE void | IfxDma_disableMoveEngineSourceError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine source error interrupt. More...
IFX_INLINE void | IfxDma_enableMoveEngineDestinationError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine destination error interrupt. More...
IFX_INLINE void | IfxDma_enableMoveEngineSourceError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine source error interrupt. More...
IFX_INLINE uint32 | IfxDma_getErrorFlags (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Return the DMA error status flags. More...

Detailed Description

Function Documentation

◆ IfxDma_clearErrorFlags()

IFX_INLINE void IfxDma_clearErrorFlags | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine,
 |  | uint32 | mask
 | ) |  |

Clear the DMA error status flags.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
mask | value holds the bits to clear or mask
Returns
None
// Clear the status of the error flags (as defined in _Impl/IfxDma_cfg.h)
IfxDma_clearErrorFlags(chn[0].dma,IfxDma_MoveEngine_1,
IFXDMA_ERROR_S | // move engine source error
IFXDMA_ERROR_D | // move engine destination error
IFXDMA_ERROR_SPB | // bus error on SPB
IFXDMA_ERROR_SRI | // bus error on SRI
IFXDMA_ERROR_RAM | // RAM error
IFXDMA_ERROR_SLL | // safe linked list CRC checksum error
IFXDMA_ERROR_DLL); // failed linked list load error

Definition at line 1274 of file IfxDma.h.

◆ IfxDma_disableMoveEngineDestinationError()

IFX_INLINE void IfxDma_disableMoveEngineDestinationError | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine
 | ) |  |

Disable the generation of a Move engine destination error interrupt.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
Returns
None

A coding example can be found in IfxDma_disableMoveEngineSourceError

Definition at line 1305 of file IfxDma.h.

◆ IfxDma_disableMoveEngineSourceError()

IFX_INLINE void IfxDma_disableMoveEngineSourceError | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine
 | ) |  |

Disable the generation of a Move engine source error interrupt.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
Returns
None
// Disable the move engine source and destination move errors
IfxDma_disableMoveEngineSourceError(chn[0].dma,IfxDma_MoveEngine_1);
IfxDma_disableMoveEngineDestinationError(chn[0].dma,IfxDma_MoveEngine_1);

Definition at line 1318 of file IfxDma.h.

◆ IfxDma_enableMoveEngineDestinationError()

IFX_INLINE void IfxDma_enableMoveEngineDestinationError | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine
 | ) |  |

Enable the generation of a Move engine destination error interrupt.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
Returns
None

A coding example can be found in IfxDma_enableMoveEngineSourceError

Definition at line 1349 of file IfxDma.h.

◆ IfxDma_enableMoveEngineSourceError()

IFX_INLINE void IfxDma_enableMoveEngineSourceError | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine
 | ) |  |

Enable the generation of a Move engine source error interrupt.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
Returns
None
// Enable the move engine source and destination move errors
IfxDma_enableMoveEngineSourceError(chn[0].dma,IfxDma_MoveEngine_1);
IfxDma_enableMoveEngineDestinationError(chn[0].dma,IfxDma_MoveEngine_1);

Definition at line 1362 of file IfxDma.h.

◆ IfxDma_getErrorFlags()

IFX_INLINE uint32 IfxDma_getErrorFlags | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine
 | ) |  |

Return the DMA error status flags.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
Returns
the content of the DMA.ERRSR register
uint32 errorFlags = 0;
// Get the status of the error flags of move engine
errorFlags = IfxDma_getErrorFlags(chn[0].dma,IfxDma_MoveEngine_1);
if( errorFlags & IFXDMA_ERROR_S ) { // move engine source error
}
if( errorFlags & IFXDMA_ERROR_D ) { // move engine destination error
// ...
}
if( errorFlags & IFXDMA_ERROR_SPB ) { // bus error on SPB
// ...
}
if( errorFlags & IFXDMA_ERROR_SRI ) { // bus error on SRI
// ...
}
if( errorFlags & IFXDMA_ERROR_RAM ) { // RAM error
// ...
}
if( errorFlags & IFXDMA_ERROR_SLL ) { // safe linked list CRC checksum error
// ...
}
if( errorFlags & IFXDMA_ERROR_DLL ) { // failed linked list load error
// ...
}

Definition at line 1514 of file IfxDma.h.


iLLD_TC26B: Channel configuration Functions

Functions
Channel configuration Functions
iLLD » DMA » Standard Driver
Collaboration diagram for Channel configuration Functions:

Functions

IFX_INLINE uint32 | IfxDma_getChannelDestinationAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address. More...
IFX_INLINE uint32 | IfxDma_getChannelSourceAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address. More...
IFX_INLINE boolean | IfxDma_getChannelSuspendModeStatus (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the DMA channel suspend Mode status. More...
IFX_INLINE uint32 | IfxDma_getChannelTransferCount (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return remaining DMA transfer count. More...
IFX_INLINE uint32 | IfxDma_getTimestamp (Ifx_DMA *dma)
get the time stamp More...
IFX_INLINE void | IfxDma_setChannelBlockMode (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMove blockMode)
Configure the move count for each DMA channel transfer. More...
IFX_INLINE void | IfxDma_setChannelContinuousMode (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "continous transaction mode" After a transaction, the hardware request transaction remain enabled. More...
IFX_INLINE void | IfxDma_setChannelDestinationAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address. More...
IFX_INLINE void | IfxDma_setChannelDestinationIncrementStep (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel destination pointer. More...
IFX_INLINE void | IfxDma_setChannelMoveSize (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
Configure a DMA channel move. More...
IFX_INLINE void | IfxDma_setChannelShadow (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelShadow shadow)
Configure a DMA channel shadow pointer. More...
IFX_INLINE void | IfxDma_setChannelSingleMode (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" After a transaction, the hardware request transaction is disabled, and must be set by software again. More...
IFX_INLINE void | IfxDma_setChannelSingleTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" One transfer request starts a complete DMA transaction. More...
IFX_INLINE void | IfxDma_setChannelSingleTransfer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transfer mode" A transfer request is required for each transfer. More...
IFX_INLINE void | IfxDma_setChannelSourceAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address. More...
IFX_INLINE void | IfxDma_setChannelSourceIncrementStep (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel source pointer. More...
IFX_INLINE void | IfxDma_setChannelSuspendEnable (Ifx_DMA *dma, IfxDma_ChannelId channelId, boolean enable)
Configure a DMA channel suspend enable. More...
IFX_INLINE void | IfxDma_setChannelTransferCount (Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction. More...
IFX_INLINE void | IfxDma_writeChannelShadowDisable (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to read only. More...
IFX_INLINE void | IfxDma_writeChannelShadowEnable (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to write-able. More...

Detailed Description

Function Documentation

◆ IfxDma_getChannelDestinationAddress()

IFX_INLINE uint32 IfxDma_getChannelDestinationAddress | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Get a channel source address.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
Actual channel destination address
uint32 destAddr = IfxDma_getChannelDestinationAddress(chn[2].dma, chn[2].channelId);

Definition at line 1435 of file IfxDma.h.

◆ IfxDma_getChannelSourceAddress()

IFX_INLINE uint32 IfxDma_getChannelSourceAddress | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Get a channel source address.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
Actual channel source address
uint32 sourceAddr = IfxDma_getChannelSourceAddress(chn[2].dma, chn[2].channelId);

Definition at line 1463 of file IfxDma.h.

◆ IfxDma_getChannelSuspendModeStatus()

IFX_INLINE boolean IfxDma_getChannelSuspendModeStatus | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return the DMA channel suspend Mode status.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
Channel Suspend Mode or Frozen State Active status (1- DMA channel is in channel suspend mode or frozen state)

Definition at line 1469 of file IfxDma.h.

◆ IfxDma_getChannelTransferCount()

IFX_INLINE uint32 IfxDma_getChannelTransferCount | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return remaining DMA transfer count.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
Remaining DMA transfer count
// Wait till transfer count (TCOUNT) becomes 0
bool notFinished;
do {
notFinished = false;
if( IfxDma_getChannelTransferCount(chn[0].dma, chn[0].channelId) ) {
notFinished = true;
break;
}
} while( notFinished );

Definition at line 1481 of file IfxDma.h.

◆ IfxDma_getTimestamp()

IFX_INLINE uint32 IfxDma_getTimestamp ( Ifx_DMA * dma )

get the time stamp

Parameters
dma pointer to DMA module
Returns
the current time stamp
uint32 timestamp = IfxDma_getTimestamp(chn[0].dma);

Definition at line 1535 of file IfxDma.h.

◆ IfxDma_setChannelBlockMode()

IFX_INLINE void IfxDma_setChannelBlockMode | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_ChannelMove | blockMode
 | ) |  |

Configure the move count for each DMA channel transfer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
blockMode | value holds the number of moves with in a DMA transfer
Returns
None

A coding example can be found in IfxDma_setChannelTransferCount

Definition at line 1571 of file IfxDma.h.

◆ IfxDma_setChannelContinuousMode()

IFX_INLINE void IfxDma_setChannelContinuousMode | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure a DMA channel to "continous transaction mode" After a transaction, the hardware request transaction remain enabled.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_enableChannelTransaction

Definition at line 1577 of file IfxDma.h.

◆ IfxDma_setChannelDestinationAddress()

IFX_INLINE void IfxDma_setChannelDestinationAddress | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | void * | address
 | ) |  |

Configure the destination address.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
address | is the Initial address of the destination pointer
Returns
None

A coding example can be found in IfxDma_setChannelSourceAddress

Definition at line 1583 of file IfxDma.h.

Referenced by IfxDma_Dma_setChannelDestinationAddress(), IfxFft_Fft_unloadOutput(), IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_setChannelDestinationIncrementStep()

IFX_INLINE void IfxDma_setChannelDestinationIncrementStep | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_ChannelIncrementStep | incStep,
 |  | IfxDma_ChannelIncrementDirection | direction,
 |  | IfxDma_ChannelIncrementCircular | size
 | ) |  |

Configure a DMA channel destination pointer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
incStep | Specifies the pointer incrementation step
direction | Specifies the incrementation direction
size | Specifies the size of the circular buffer
Returns
None

A coding example can be found in IfxDma_setChannelSourceIncrementStep

Definition at line 1589 of file IfxDma.h.

Referenced by IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_setChannelMoveSize()

IFX_INLINE void IfxDma_setChannelMoveSize | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_ChannelMoveSize | moveSize
 | ) |  |

Configure a DMA channel move.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
moveSize | value holds the opcode or size of data of individual moves with in a DMA transfer
Returns
None

A coding example can be found in IfxDma_setChannelTransferCount

Definition at line 1612 of file IfxDma.h.

Referenced by IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_setChannelShadow()

IFX_INLINE void IfxDma_setChannelShadow | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_ChannelShadow | shadow
 | ) |  |

Configure a DMA channel shadow pointer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
shadow | Specifies the shadow pointer
Returns
None
// Push the shadow mode into double buffer
IfxDma_setChannelShadow(chn[0].dma, chn[0].channelId,
IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch);

Definition at line 1618 of file IfxDma.h.

◆ IfxDma_setChannelSingleMode()

IFX_INLINE void IfxDma_setChannelSingleMode | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure a DMA channel to "single transaction mode" After a transaction, the hardware request transaction is disabled, and must be set by software again.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_enableChannelTransaction

Definition at line 1624 of file IfxDma.h.

◆ IfxDma_setChannelSingleTransaction()

IFX_INLINE void IfxDma_setChannelSingleTransaction | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure a DMA channel to "single transaction mode" One transfer request starts a complete DMA transaction.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_setChannelTransferCount

Definition at line 1630 of file IfxDma.h.

◆ IfxDma_setChannelSingleTransfer()

IFX_INLINE void IfxDma_setChannelSingleTransfer | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure a DMA channel to "single transfer mode" A transfer request is required for each transfer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_setChannelTransferCount

Definition at line 1636 of file IfxDma.h.

◆ IfxDma_setChannelSourceAddress()

IFX_INLINE void IfxDma_setChannelSourceAddress | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | const void * | address
 | ) |  |

Configure the source address.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
address | is the Initial address of the source pointer
Returns
None
// Check for the end of current transaction and before trigger the channel request for
// for another channel, re configure the source and destination addresses
while(!(IfxDma_getAndClearChannelInterrupt(chn[1].dma, chn[1].channelId)));
// Re-Program the source address for the channel 2
IfxDma_setChannelSourceAddress(chn[2].dma, chn[2].channelId,Sadr);
// Re-Program the destination address for channel 2
IfxDma_setChannelDestinationAddress(chn[2].dma, chn[2].channelId,Dadr);
// Start DMA transaction for channel 2
IfxDma_Dma_startChannelTransaction(&chn[2]);

Definition at line 1642 of file IfxDma.h.

Referenced by IfxDma_Dma_setChannelSourceAddress(), IfxFft_Fft_loadInput(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_setChannelSourceIncrementStep()

IFX_INLINE void IfxDma_setChannelSourceIncrementStep | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_ChannelIncrementStep | incStep,
 |  | IfxDma_ChannelIncrementDirection | direction,
 |  | IfxDma_ChannelIncrementCircular | size
 | ) |  |

Configure a DMA channel source pointer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
incStep | Specifies the pointer incrementation step
direction | Specifies the incrementation direction
size | Specifies the size of the circular buffer
Returns
None
// Re-program the source and destination circular buffer control fields
IfxDma_setChannelSourceIncrementStep(chn[0].dma, chn[0].channelId, IfxDma_ChannelIncrementStep_2, IfxDma_ChannelIncrementDirection_negative, IfxDma_ChannelIncrementCircular_16);
IfxDma_setChannelDestinationIncrementStep(chn[0].dma, chn[0].channelId, IfxDma_ChannelIncrementStep_2, IfxDma_ChannelIncrementDirection_negative, IfxDma_ChannelIncrementCircular_16);

Definition at line 1648 of file IfxDma.h.

Referenced by IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_setChannelSuspendEnable()

IFX_INLINE void IfxDma_setChannelSuspendEnable | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | boolean | enable
 | ) |  |

Configure a DMA channel suspend enable.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
enable | enable (1) / disable (0)
Returns
None

Definition at line 1659 of file IfxDma.h.

◆ IfxDma_setChannelTransferCount()

IFX_INLINE void IfxDma_setChannelTransferCount | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | uint32 | transferCount
 | ) |  |

Configure the move count of a DMA channel transaction.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
transferCount | value holds the DMA transfers within a transaction (1..16383; 0 handled like 1 transaction)
Returns
None
// Start DMA transaction
IfxDma_Dma_startChannelTransaction(&chn[0]);
// Wait till end of transaction
while(!(IfxDma_getAndClearChannelInterrupt(chn[0].dma, chn[0].channelId)));
// Change the TREL configuration for channel 1
IfxDma_setChannelTransferCount(chn[1].dma, chn[1].channelId,0x6);
// Change the BLKM configuration for channel 1
IfxDma_setChannelBlockMode(chn[1].dma, chn[1].channelId,IfxDma_ChannelMove_3);
// Change the Move size configuration for channel 1
IfxDma_setChannelMoveSize(chn[1].dma, chn[1].channelId,IfxDma_ChannelMoveSize_64bit);
// Pull down the channel pending request after the first transfer is initiated
IfxDma_setChannelSingleTransfer(chn[1].dma, chn[1].channelId);
// Pull down the channel pending request after the transaction gets over
IfxDma_setChannelSingleTransaction(chn[2].dma, chn[2].channelId);
// Start DMA transaction
IfxDma_Dma_startChannelTransaction(&chn[1]);
// Start DMA transaction
IfxDma_Dma_startChannelTransaction(&chn[2]);

Definition at line 1665 of file IfxDma.h.

Referenced by IfxDma_Dma_setChannelTransferCount(), IfxFft_Fft_loadInput(), IfxFft_Fft_unloadOutput(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_writeChannelShadowDisable()

IFX_INLINE void IfxDma_writeChannelShadowDisable | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure the shadow pointer register to read only.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Disable the shadow mode to come out of double buffer mode
IfxDma_writeChannelShadowDisable(chn[0].dma, chn[0].channelId);

Definition at line 1692 of file IfxDma.h.

◆ IfxDma_writeChannelShadowEnable()

IFX_INLINE void IfxDma_writeChannelShadowEnable | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure the shadow pointer register to write-able.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Enable the shadow mode to come out of double buffer mode
IfxDma_writeChannelShadowEnable(chn[0].dma, chn[0].channelId);

Definition at line 1698 of file IfxDma.h.


iLLD_TC26B: Channel Halt Functions

Functions
Channel Halt Functions
iLLD » DMA » Standard Driver
Collaboration diagram for Channel Halt Functions:

Functions

IFX_INLINE void | IfxDma_clearChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear channel halt request and aknowledgement. More...
IFX_INLINE boolean | IfxDma_getChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get channel halt aknowledgement. More...
IFX_INLINE void | IfxDma_setChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
setting channel halt request More...

Detailed Description

Function Documentation

◆ IfxDma_clearChannelHalt()

IFX_INLINE void IfxDma_clearChannelHalt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Clear channel halt request and aknowledgement.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Quit the halt mode of operation
IfxDma_clearChannelHalt(chn[0].dma, chn[0].channelId);

Definition at line 1256 of file IfxDma.h.

◆ IfxDma_getChannelHalt()

IFX_INLINE boolean IfxDma_getChannelHalt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Get channel halt aknowledgement.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
halt aknowledgement
// Check for the channel halt aknowledgement
while(!(IfxDma_getChannelHalt(chn[0].dma, chn[0].channelId)));

Definition at line 1441 of file IfxDma.h.

◆ IfxDma_setChannelHalt()

IFX_INLINE void IfxDma_setChannelHalt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

setting channel halt request

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Halt the channel processing
IfxDma_setChannelHalt(chn[0].dma,chn[0].channelId);

Definition at line 1600 of file IfxDma.h.


iLLD_TC26B: Double Buffer functions

Functions
Double Buffer functions
iLLD » DMA » Standard Driver
Collaboration diagram for Double Buffer functions:

Functions

IFX_INLINE boolean | IfxDma_getDoubleBufferRead (Ifx_DMA *dma, IfxDma_ChannelId channelId)
get information on buffer being read by software and clear the notification flag More...
IFX_INLINE boolean | IfxDma_getDoubleBufferSelection (Ifx_DMA *dma, IfxDma_ChannelId channelId)
get Double buffer selection More...
IFX_INLINE void | IfxDma_keepDoubleBufferActive (Ifx_DMA *dma, IfxDma_ChannelId channelId)
keeps the double buffer active More...
IFX_INLINE void | IfxDma_switchDoubleBuffer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Double buffer switch application. More...

Detailed Description

Function Documentation

◆ IfxDma_getDoubleBufferRead()

IFX_INLINE boolean IfxDma_getDoubleBufferRead | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

get information on buffer being read by software and clear the notification flag

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if one of the buffers is being read by software FALSE if one of the buffers is already read by software
// Check the buffer being read (Double buffer operation mode)
while(!(IfxDma_getDoubleBufferRead(chn[0].dma, chn[0].channelId)));

Definition at line 1493 of file IfxDma.h.

◆ IfxDma_getDoubleBufferSelection()

IFX_INLINE boolean IfxDma_getDoubleBufferSelection | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

get Double buffer selection

Parameters
dma | pointer to DMA module
channelId | channelId DMA channel number
Returns
TRUE if buffer 1 is being filled FALSE if buffer 0 is being filled
boolean buffer_being_filled;
// Check the buffer being filled (Double buffer operation mode)
buffer_being_filled = IfxDma_getDoubleBufferSelection(chn[0].dma, chn[0].channelId));

Definition at line 1508 of file IfxDma.h.

◆ IfxDma_keepDoubleBufferActive()

IFX_INLINE void IfxDma_keepDoubleBufferActive | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

keeps the double buffer active

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
IfxDma_keepDoubleBufferActive(chn[0].dma, chn[0].channelId);

Definition at line 1559 of file IfxDma.h.

◆ IfxDma_switchDoubleBuffer()

IFX_INLINE void IfxDma_switchDoubleBuffer | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Double buffer switch application.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Apply software buffer switch
IfxDma_switchDoubleBuffer(chn[0].dma, chn[0].channelId);

Definition at line 1686 of file IfxDma.h.


iLLD_TC26B: Interrupt functions

Functions
Interrupt functions
iLLD » DMA » Standard Driver
Collaboration diagram for Interrupt functions:

Functions

IFX_INLINE void | IfxDma_clearChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag. More...
IFX_INLINE void | IfxDma_disableChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable channel interrupt trigger. More...
IFX_INLINE void | IfxDma_enableChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable channel interrupt trigger. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelPatternDetectionInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the pattern detection interrupt flag. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelWrapDestinationBufferInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap destination buffer interrupt trigger flag. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelWrapSourceBufferInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap source buffer interrupt trigger flag. More...
IFX_INLINE boolean | IfxDma_getChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_getChannelPatternDetectionOldValue (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns whether the old value of pattern detection corresponding pattern comparison operation found a pattern match in previous DMA * read move or not. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDma_getSrcPointer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel. More...
IFX_INLINE void | IfxDma_setChannelInterruptServiceRequest (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Setting of channel interrupt service request by software. More...

Detailed Description

Function Documentation

◆ IfxDma_clearChannelInterrupt()

IFX_INLINE void IfxDma_clearChannelInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Clear a channel transfer interrupt flag.

Parameters
dma | pointer to DMA module
channelId | channel for which the interrupt flag should be cleared
Returns
None

see Dma.INTSR

Definition at line 1262 of file IfxDma.h.

Referenced by IfxDma_Dma_clearChannelInterrupt(), IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_disableChannelInterrupt()

IFX_INLINE void IfxDma_disableChannelInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Disable channel interrupt trigger.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
IfxDma_disableChannelInterrupt(chn[0].dma, chn[0].channelId);

Definition at line 1287 of file IfxDma.h.

◆ IfxDma_enableChannelInterrupt()

IFX_INLINE void IfxDma_enableChannelInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Enable channel interrupt trigger.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
IfxDma_enableChannelInterrupt(chn[0].dma, chn[0].channelId);

Definition at line 1331 of file IfxDma.h.

◆ IfxDma_getAndClearChannelInterrupt()

IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if the interrupt flag is set FALSE if the interrupt flag is not set
// wait for the end of transaction for intended channel by checking the channel interrupt flag
// and clear it once it is set and checked
// Wait till end of the transaction
while(!(IfxDma_getAndClearChannelInterrupt(chn[2].dma, chn[2].channelId)));

Definition at line 1375 of file IfxDma.h.

Referenced by IfxDma_Dma_getAndClearChannelInterrupt(), IfxQspi_SpiMaster_isrDmaReceive(), IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiMaster_isrError(), IfxQspi_SpiSlave_isrDmaReceive(), IfxQspi_SpiSlave_isrDmaTransmit(), and IfxQspi_SpiSlave_isrError().

◆ IfxDma_getAndClearChannelPatternDetectionInterrupt()

IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns and clears the pattern detection interrupt flag.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if pattern detection for a given channel is found FALSE if pattern detection for a given channel is not found
// wait till pattern match is found for given channel
// and clear it once it is set and checked
// Wait for the pattern detection
while(!(IfxDma_getAndClearChannelPatternDetectionInterrupt(chn[0].dma, chn[0].channelId)));

Definition at line 1390 of file IfxDma.h.

Referenced by IfxQspi_SpiMaster_isrDmaReceive(), IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiSlave_isrDmaReceive(), and IfxQspi_SpiSlave_isrDmaTransmit().

◆ IfxDma_getAndClearChannelWrapDestinationBufferInterrupt()

IFX_INLINE boolean IfxDma_getAndClearChannelWrapDestinationBufferInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns and clears the status of channel wrap destination buffer interrupt trigger flag.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if wrap destination buffer interrupt trigger flag is set FALSE if wrap destination buffer interrupt trigger flag is not set or get cleared already
// wait for the destination buffer wrap interrupt flag
// and clear it once it is set and checked
boolean destinationWrapFlag;
destinationWrapFlag = IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(chn[0].dma, chn[0].channelId);

Definition at line 1405 of file IfxDma.h.

◆ IfxDma_getAndClearChannelWrapSourceBufferInterrupt()

IFX_INLINE boolean IfxDma_getAndClearChannelWrapSourceBufferInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns and clears the status of channel wrap source buffer interrupt trigger flag.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if wrap source buffer interrupt trigger flag is set FALSE if wrap source buffer interrupt trigger flag is not set or get cleared already
// wait for the source buffer wrap interrupt flag
// and clear it once it is set and checked
boolean sourceWrapFlag;
sourceWrapFlag = IfxDma_getAndClearChannelWrapSourceBufferInterrupt(chn[0].dma, chn[0].channelId);

Definition at line 1420 of file IfxDma.h.

◆ IfxDma_getChannelInterrupt()

IFX_INLINE boolean IfxDma_getChannelInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return a channel transfer interrupt flag.

Parameters
dma | pointer to DMA module
channelId | channel for which the interrupt flag should be returned
Returns
TRUE if the interrupt flag is set FALSE if the interrupt flag is not set

see Dma.INTSR

Definition at line 1447 of file IfxDma.h.

Referenced by IfxDma_Dma_getChannelInterrupt().

◆ IfxDma_getChannelPatternDetectionOldValue()

IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns whether the old value of pattern detection corresponding pattern comparison operation found a pattern match in previous DMA * read move or not.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if corresponding pattern comparison operation found a pattern match in previous DMA read move or not FALSE if corresponding pattern comparison operation did not find a pattern match in previous DMA read move
boolean patternDetectOldVal;
// Check the old value of the pattern detection
patternDetectOldVal = IfxDma_getChannelPatternDetectionOldValue(chn[0].dma, chn[0].channelId);

Definition at line 1457 of file IfxDma.h.

◆ IfxDma_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getSrcPointer | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns the SRC pointer for given DMA channel.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
SRC pointer for given DMA channel

Definition at line 1527 of file IfxDma.h.

Referenced by IfxDma_Dma_getSrcPointer(), IfxDma_Dma_initChannel(), IfxFft_Fft_initDma(), IfxFft_Fft_unloadOutput(), and IfxQspi_SpiSlave_initModule().

◆ IfxDma_setChannelInterruptServiceRequest()

IFX_INLINE void IfxDma_setChannelInterruptServiceRequest | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Setting of channel interrupt service request by software.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Set the channel interrupt service request through software
IfxDma_setChannelInterruptServiceRequest(chn[0].dma, chn[0].channelId);

Definition at line 1606 of file IfxDma.h.

Referenced by IfxQspi_SpiSlave_write().


iLLD_TC26B: How to use the DMA Interface driver?

How to use the DMA Interface driver?
iLLD » DMA
Collaboration diagram for How to use the DMA Interface driver?:

The DMA interface driver provides a default configuration for data moves without intervention of the CPU or other on chip devices.

In the following sections it will be described, how to integrate the driver into the application framework for different use cases.

Preparation

Include Files

Include following header file into your C code:

#include <Dma/Dma/IfxDma_Dma.h>
#include <Vadc/Adc/IfxVadc_Adc.h>

Module initialisation

Declare the dma handle as a global variable:

// DMA handle
IfxDma_Dma dma;

Initialize the DMA with following code:

// create module config
IfxDma_Dma_Config dmaConfig;
IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
// initialize module
// IfxDma_Dma dma; // declared globally
IfxDma_Dma_initModule(&dma, &dmaConfig);

This only has to be done once in the application.

The "IfxDma_Dma dma" handle should either be declared as a global variable (as shown in this example), or it can be created locally if desired:

IfxDma_Dma dma;
IfxDma_Dma_createModuleHandle(&dma, &MODULE_DMA);

Memory-to-Memory Transfers

A large amount of data should be copied between SRI based memories, e.g. from Flash into the DSPR of the current CPU. It's recommended to use 256 bit moves for this purpose for best performance.

This requires, that source and target locations are 256 bit (32 byte) aligned. With the GCC compiler this can be achieved by adding attribute ((aligned(64))) to the arrays:

#define MEMORY_TRANSFER_NUM_WORDS 1024
uint32 __attribute__ ((aligned(64))) memoryDestination[MEMORY_TRANSFER_NUM_WORDS];

Channel configuration and handling for the data move:

// construct the channel configuration
IfxDma_Dma_ChannelConfig chnCfg;
IfxDma_Dma_initChannelConfig(&chnCfg, &dma);
// select DMA channel which should be used
chnCfg.channelId = IfxDma_ChannelId_0;
// source and destination address
chnCfg.sourceAddress = (uint32)0x80000000; // somewhere in flash section, here: start of PFlash (only for demo)
chnCfg.destinationAddress = (uint32)memoryDestination;
// move size, transfer count and request/operation mode
chnCfg.moveSize = IfxDma_ChannelMoveSize_256bit;
chnCfg.transferCount = (4 * MEMORY_TRANSFER_NUM_WORDS) / 32; // e.g. 1024 words require 128 * 256 bit moves
chnCfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
chnCfg.operationMode = IfxDma_ChannelOperationMode_continuous;
// transfer configuration into DMA channel registers
IfxDma_Dma_Channel chn;
IfxDma_Dma_initChannel(&chn, &chnCfg);
// start transfer and wait until it's finished
IfxDma_Dma_startChannelTransaction(&chn);
while( IfxDma_Dma_isChannelTransactionPending(&chn) == TRUE );

Peripheral-to-Memory Transfers

The content of 8 ADC result registers should be transfered to a memory location in DSPR whenever an VADC autoscan has been finished. After the DMA transaction, an interrupt should be triggered so that the CPU can process the conversion results.

We use following global variables:

// buffer for autoscanned conversion result values
#define NUM_SCANNED_CHANNELS 8
static uint16 vadcResultBuffer[NUM_SCANNED_CHANNELS];
// VADC handle
IfxVadc_Adc vadc;
// VADC group handle
static IfxVadc_Adc_Group adcGroup;
// DMA channel handle
static IfxDma_Dma_Channel dmaChn;

Create an interrupt handler for the DMA channel request:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_DMA_CH0 1
IFX_INTERRUPT(dmaCh0ISR, 0, IFX_INTPRIO_DMA_CH0)
{
// ...
// do something with the conversion results in vadcResultBuffer[]
// ...
// re-init DMA channel destination address
IfxDma_Dma_setChannelDestinationAddress(&dmaChn, ADDR_CPU_DSPR(IfxCpu_getCoreId(), &vadcResultBuffer[0]));
// start new transaction
IfxDma_Dma_setChannelTransferCount(&dmaChn, NUM_SCANNED_CHANNELS);
{
uint32 channels = 0xff; // all 8 channels
uint32 mask = 0xff; // modify the selection of all channels
// configure autoscan (single shot, not continuous scan)
IfxVadc_Adc_setScan(&adcGroup, channels, mask);
}
}

ADC configuration:

// create configuration
IfxVadc_Adc_Config adcConfig;
IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
adcConfig.startupCalibration = TRUE;
// initialize module
// IfxVadc_Adc vadc; // declared globally
IfxVadc_Adc_initModule(&vadc, &adcConfig);
// create group config
IfxVadc_Adc_GroupConfig adcGroupConfig;
IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
// initialize the group
//IfxVadc_Adc_Group adcGroup; // defined globally
adcGroupConfig.groupId = IfxVadc_GroupId_0;
adcGroupConfig.master = adcGroupConfig.groupId;
// enable all arbiter request sources
adcGroupConfig.arbiter.requestSlotQueueEnabled = TRUE; // enable Queue mode
adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE; // enable Scan mode
adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE; // enable Background scan
// enable all gates in "always" mode (no edge detection)
adcGroupConfig.queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
{
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig;
IfxVadc_Adc_initChannelConfig(&adcChannelConfig, &adcGroup);
// initialize the channels
for(int i=0; i<NUM_SCANNED_CHANNELS; ++i) {
adcChannelConfig.channelId = (IfxVadc_ChannelId)i;
adcChannelConfig.resultRegister = IfxVadc_ChannelResult_0;
// initialize the channel
IfxVadc_Adc_Channel adcChannel;
IfxVadc_Adc_initChannel(&adcChannel, &adcChannelConfig);
IfxVadc_Adc_configureWaitForReadMode(&adcChannel, TRUE);
}
}
adcGroup.group->RCR[0].B.SRGEN = 1; // interrupt when new result is available
// send service request to DMA Channel 0
IfxSrc_init((Ifx_SRC_SRCR*)&MODULE_SRC.VADC.G[0], IfxSrc_Tos_dma, 0);
IfxSrc_enable((Ifx_SRC_SRCR*)&MODULE_SRC.VADC.G[0]);

And finally the DMA channel configuration

// create module config
IfxDma_Dma_Config dmaConfig;
IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
// initialize module
IfxDma_Dma dma;
IfxDma_Dma_initModule(&dma, &dmaConfig);
{
// construct the channel configuration
IfxDma_Dma_ChannelConfig chnCfg;
IfxDma_Dma_initChannelConfig(&chnCfg, &dma);
// select DMA channel which should be used
chnCfg.channelId = IfxDma_ChannelId_0;
chnCfg.hardwareRequestEnabled = TRUE; // will be triggered from VADC service request
// interrupt configuration
chnCfg.channelInterruptEnabled = TRUE; // service request from DMA after all words have been transfered
chnCfg.channelInterruptPriority = IFX_INTPRIO_DMA_CH0;
chnCfg.channelInterruptTypeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
// source and destination address
chnCfg.sourceAddress = (uint32)&adcGroup.group->RES[0]; // first result register
chnCfg.sourceCircularBufferEnabled = TRUE;
chnCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_1; // keep this address
chnCfg.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &vadcResultBuffer[0]); // move into result buffer
chnCfg.destinationAddressIncrementStep = IfxDma_ChannelIncrementStep_1; // increment once (=2 bytes) with each write
// move size, transfer count and request/operation mode
chnCfg.moveSize = IfxDma_ChannelMoveSize_16bit;
chnCfg.transferCount = NUM_SCANNED_CHANNELS; // for the scanned channels
chnCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
chnCfg.operationMode = IfxDma_ChannelOperationMode_continuous; // hw request enable remains set after transaction
// transfer configuration into DMA channel registers
// IfxDma_Dma_Channel dmaChn; // declared globally
IfxDma_Dma_initChannel(&dmaChn, &chnCfg);
// configure IRQ handler which will be called after all result registers have been transfered
IfxCpu_Irq_installInterruptHandler(&dmaCh0ISR, IFX_INTPRIO_DMA_CH0);
// enable CPU interrupts
IfxCpu_enableInterrupts();
}

In order to start the initial channel conversions, use:

{
uint32 channels = 0xff; // all 8 channels
uint32 mask = 0xff; // modify the selection of all channels
// configure and start autoscan (single shot, not continuous mode)
IfxVadc_Adc_setScan(&adcGroup, channels, mask);
}

DMA will transfer the results to DSPR during the autoscan (whenever a new result is availale), and invoke the dmaCh0ISR function once all channels have been converted.

The ISR will re-configure the DMA channel and re-start the autoscan.

Linked Lists

Linked lists allow to initiate multiple DMA transactions from independent transaction sets which are typically stored in a DSPR memory location, and fetched and executed from the DMA channel without further CPU interaction.

Following example demonstrates, how 5 different transactions can be initiated from a single request. We copy the data of 5 CAN message objects to a DSPR location.

Includes and global variables:

#include <Dma/Dma/IfxDma_Dma.h>
#include <Scu/Std/IfxScuWdt.h>
#include <IfxCan_reg.h>
// DMA channel handle
IfxDma_Dma_Channel chn;
// Linked List storage
// IMPORTANT: it has to be aligned to an 256bit address, otherwise DMA can't read it
#define NUM_LINKED_LIST_ITEMS 5
IFX_ALIGN(256) Ifx_DMA_CH linkedList[NUM_LINKED_LIST_ITEMS] ;
// transfer these values to various CAN_MODATA[LH] registers via linked lists
#define NUM_TRANSFERED_WORDS 2
uint32 sourceBuffer[NUM_LINKED_LIST_ITEMS][NUM_TRANSFERED_WORDS];
const uint32 destinationAddresses[NUM_LINKED_LIST_ITEMS] = {
(uint32)&CAN_MODATAL0,
(uint32)&CAN_MODATAL1,
(uint32)&CAN_MODATAL2,
(uint32)&CAN_MODATAL3,
(uint32)&CAN_MODATAL4,
};

Following code to prepare CAN for this demo:

// enable CAN (no Ifx LLD available yet)
{
uint32 passwd = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(passwd);
CAN_CLC.U = 0x0100;
if( CAN_CLC.U ); // synch access
// select f_clc as kernel clock
CAN_MCR.B.CLKSEL = 1;
// configure fractional divider
CAN_FDR.U = 0x43ff;
// wait until RAM has been initialized
while( CAN_PANCTR.B.BUSY );
IfxScuWdt_setCpuEndinit(passwd);
}

Build a linked list

// create module config
IfxDma_Dma_Config dmaConfig;
IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
// initialize module
IfxDma_Dma dma;
IfxDma_Dma_initModule(&dma, &dmaConfig);
// initial channel configuration
IfxDma_Dma_ChannelConfig cfg;
IfxDma_Dma_initChannelConfig(&cfg, &dma);
// following settings are used by all transactions
cfg.transferCount = NUM_TRANSFERED_WORDS;
cfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
cfg.moveSize = IfxDma_ChannelMoveSize_32bit;
cfg.shadowControl = IfxDma_ChannelShadow_linkedList;
// generate linked list items
for(int i=0; i<NUM_LINKED_LIST_ITEMS; ++i) {
cfg.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i]);
cfg.destinationAddress = destinationAddresses[i];
// address to next transaction set
cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)&linkedList[(i + 1) % NUM_LINKED_LIST_ITEMS]);
// transfer first transaction set into DMA channel
if( i == 0 ) {
IfxDma_Dma_initChannel(&chn, &cfg);
}
// transfer into linked list storage
IfxDma_Dma_initLinkedListEntry((void *)&linkedList[i], &cfg);
if( i == 0 ) {
// - trigger channel interrupt once the first transaction set has been loaded (again) into DMA channel
linkedList[i].CHCSR.B.SIT = 1;
} else {
// - activate SCH (transaction request) for each entry, except for the first one (linked list terminated here)
linkedList[i].CHCSR.B.SCH = 1;
}
}

The transfer can be started via software with:

// clear service request flag
(IfxDma_Dma_getSrcPointer(&chn))->B.CLRR = 1;
// start linked list transaction
IfxDma_Dma_startChannelTransaction(&chn);
// wait for service request which is triggered at the end of linked list transfers
while( !(IfxDma_Dma_getSrcPointer(&chn))->B.SRR );

In order to synchronize with the end of linked list operations, it's recommended to poll the service request flag (triggered via linkedList[NUM_LINKED_LIST_ITEMS-1].CHCSR.B.SIT after the last word has been transfered), and not the transaction count as shown before, because a linked list will initiate multiple transactions.


iLLD_TC26B: DMA

Modules
DMA
iLLD » DMA
Collaboration diagram for DMA:

Modules

Data Structures
Module Initialization
Channel Initialization
Linked Lists
Channel Transactions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » DMA » DMA
Collaboration diagram for Data Structures:

Data Structures

struct | IfxDma_Dma
DMA base address data structure (Module handle) More...
struct | IfxDma_Dma_Channel
Channel handle. More...
struct | IfxDma_Dma_ChannelConfig
Configuration data structure of the channel. More...
struct | IfxDma_Dma_Config
Configuration data structure of the Module. More...

Detailed Description

Data Structure Documentation

◆ IfxDma_Dma

struct IfxDma_Dma

DMA base address data structure (Module handle)

Definition at line 460 of file IfxDma_Dma.h.

Data Fields
Ifx_DMA * dma Specifies the pointer to the DMA registers.

◆ IfxDma_Dma_Channel

struct IfxDma_Dma_Channel

Channel handle.

Definition at line 471 of file IfxDma_Dma.h.

Data Fields
Ifx_DMA_CH * | channel | Specifies the pointer to DMA channel registers.
IfxDma_ChannelId | channelId | Specifies the DMA channel.
Ifx_DMA * | dma | Specifies the pointer to the DMA registers.

◆ IfxDma_Dma_ChannelConfig

struct IfxDma_Dma_ChannelConfig

Configuration data structure of the channel.

Definition at line 480 of file IfxDma_Dma.h.

Collaboration diagram for IfxDma_Dma_ChannelConfig:
[legend]
Data Fields
IfxDma_ChannelMove | blockMode | Number of moves in a transfer.
IfxDma_ChannelBusPriority | busPriority | Bus priority selection.
IfxDma_ChannelId | channelId | Specifies the channel being used.
IfxDma_ChannelInterruptControl | channelInterruptControl | The channel transfer interrupt can either be triggered depending on the interruptRaiseThreshold, or each time the transaction count is decremented.
boolean | channelInterruptEnabled | The channel transfer interrupt should be triggered. See also channelInterruptControl.
Ifx_Priority | channelInterruptPriority | Priority of the channel interrupt trigger.
IfxSrc_Tos | channelInterruptTypeOfService | Interrupt service provider.
uint32 | destinationAddress | Destination address for the DMA channel.
IfxDma_ChannelIncrementCircular | destinationAddressCircularRange | Determines which part of the destination address remains unchanged and therby not updated after each move.
IfxDma_ChannelIncrementDirection | destinationAddressIncrementDirection | Decides whether the destination address offset after each move should be added or decremented from the exisiting address.
IfxDma_ChannelIncrementStep | destinationAddressIncrementStep | Describes the address offset with which the destination address should be modified after each move.
boolean | destinationCircularBufferEnabled | Enables/Disables the destination circular buffering.
boolean | hardwareRequestEnabled | Enabling channel transaction via hardware request.
uint8 | interruptRaiseThreshold | The value of the transferCount at which the interrupt should be raised.
IfxDma_Dma * | module | Specifies pointer to the IfxDma_Dma module handle.
IfxDma_ChannelMoveSize | moveSize | Read/write data size.
IfxDma_ChannelOperationMode | operationMode | keep enable/disable the hardware channel request after a transaction
IfxDma_ChannelPattern | pattern | Pattern selection operation modes.
uint32 | readDataCrc | Checksum for read data of the channel.
IfxDma_ChannelRequestMode | requestMode | A service request initiates a single transfer, or the complete transaction.
IfxDma_ChannelRequestSource | requestSource | Request of channel transfer through hardware or daisy chain. channel transfer complete interrupt of previous channel will trigger the next channel request.
uint32 | shadowAddress | Initial content of shadow address for the DMA channel.
IfxDma_ChannelShadow | shadowControl | selects the shadow transfer mode
uint32 | sourceAddress | Source address for the DMA channel.
IfxDma_ChannelIncrementCircular | sourceAddressCircularRange | Determines which part of the source address remains unchanged and therby not updated after each move.
IfxDma_ChannelIncrementDirection | sourceAddressIncrementDirection | Decides whether the source address offset after each move should be added or decremented from the exisiting address.
IfxDma_ChannelIncrementStep | sourceAddressIncrementStep | Describes the address offset with which the source address should be modified after each move.
boolean | sourceCircularBufferEnabled | Enables/Disables the source circular buffering.
uint32 | sourceDestinationAddressCrc | Checksum for source and destination address of channel.
boolean | timestampEnabled | Enables/Disables the appendage of the time stamp after end of the last DMA move in a transaction.
boolean | transactionRequestLostInterruptEnabled | Enables/Disables the channel transaction request lost interrupt.
uint16 | transferCount | Number of transfers in a transaction.
boolean | wrapDestinationInterruptEnabled | An interrupt should be triggered whenever destination address is wrapped.
boolean | wrapSourceInterruptEnabled | An interrupt should be triggered whenever source address is wrapped.

◆ IfxDma_Dma_Config

struct IfxDma_Dma_Config

Configuration data structure of the Module.

Definition at line 520 of file IfxDma_Dma.h.

Data Fields
Ifx_DMA * dma Specifies the pointer to the DMA registers.


iLLD_TC26B: Module Initialization

Functions
Module Initialization
iLLD » DMA » DMA
Collaboration diagram for Module Initialization:

Functions

IFX_EXTERN void | IfxDma_Dma_createModuleHandle (IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it's ensure that the DMA module is already initialized, and a DMA handle isn't globally available. More...
IFX_EXTERN void | IfxDma_Dma_deInitChannel (IfxDma_Dma *dma, IfxDma_ChannelId channel)
de-initialize the DMA channel More...
IFX_EXTERN void | IfxDma_Dma_initModule (IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
Initialize the DMA module. More...
IFX_EXTERN void | IfxDma_Dma_initModuleConfig (IfxDma_Dma_Config *config, Ifx_DMA *dma)
initialize the DMA module configuration More...

Detailed Description

Function Documentation

◆ IfxDma_Dma_createModuleHandle()

IFX_EXTERN void IfxDma_Dma_createModuleHandle | ( | IfxDma_Dma * | dmaHandle,
 |  | Ifx_DMA * | dma
 | ) |  |

initializes a DMA module handle based on the current configuration. Can be used in code where it's ensure that the DMA module is already initialized, and a DMA handle isn't globally available.

Parameters
dmaHandle | pointer to the DMA module handle
dma | pointer to the DMA registers
Returns
None
IfxDma_Dma dma;
IfxDma_Dma_createModuleHandle(&dma, &MODULE_DMA);

Definition at line 121 of file IfxDma_Dma.c.

Referenced by IfxFft_Fft_initDma(), IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxDma_Dma_deInitChannel()

IFX_EXTERN void IfxDma_Dma_deInitChannel | ( | IfxDma_Dma * | dma,
 |  | IfxDma_ChannelId | channel
 | ) |  |

de-initialize the DMA channel

Parameters
dma | pointer to the DMA module handle
channel | the DMA channel ID
Returns
None

Definition at line 127 of file IfxDma_Dma.c.

◆ IfxDma_Dma_initModule()

IFX_EXTERN void IfxDma_Dma_initModule | ( | IfxDma_Dma * | dma,
 |  | const IfxDma_Dma_Config * | config
 | ) |  |

Initialize the DMA module.

Parameters
dma | pointer to the DMA module handle
config | Pointer to configuration structure of the DMA module
Returns
None

See Memory-to-Memory Transfers

Definition at line 229 of file IfxDma_Dma.c.

◆ IfxDma_Dma_initModuleConfig()

IFX_EXTERN void IfxDma_Dma_initModuleConfig | ( | IfxDma_Dma_Config * | config,
 |  | Ifx_DMA * | dma
 | ) |  |

initialize the DMA module configuration

Parameters
config | Pointer to configuration structure of the DMA module
dma | pointer to the DMA registers
Returns
None

See Memory-to-Memory Transfers

Definition at line 235 of file IfxDma_Dma.c.


iLLD_TC26B: Channel Initialization

Functions
Channel Initialization
iLLD » DMA » DMA
Collaboration diagram for Channel Initialization:

Functions

IFX_EXTERN void | IfxDma_Dma_initChannel (IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel More...
IFX_EXTERN void | IfxDma_Dma_initChannelConfig (IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration More...

Detailed Description

Function Documentation

◆ IfxDma_Dma_initChannel()

IFX_EXTERN void IfxDma_Dma_initChannel | ( | IfxDma_Dma_Channel * | channel,
 |  | const IfxDma_Dma_ChannelConfig * | config
 | ) |  |

initialize the DMA channel

Parameters
channel | pointer to the DMA base address and channel ID
config | pointer to the DMA default channel configuration structure
Returns
None

See Memory-to-Memory Transfers

Definition at line 141 of file IfxDma_Dma.c.

Referenced by IfxFft_Fft_initDma(), IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxDma_Dma_initChannelConfig()

IFX_EXTERN void IfxDma_Dma_initChannelConfig | ( | IfxDma_Dma_ChannelConfig * | config,
 |  | IfxDma_Dma * | dma
 | ) |  |

initialize the DMA module channel configuration

Parameters
config | pointer to the DMA default channel configuration structure
dma | pointer to the DMA module handle
Returns
None

See Memory-to-Memory Transfers

Definition at line 176 of file IfxDma_Dma.c.

Referenced by IfxFft_Fft_initDma(), IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().


iLLD_TC26B: Linked Lists

Functions
Linked Lists
iLLD » DMA » DMA
Collaboration diagram for Linked Lists:

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDma_Dma_getSrcPointer (IfxDma_Dma_Channel *channel)
Returns the SRC pointer for given DMA channel. More...
IFX_EXTERN void | IfxDma_Dma_initLinkedListEntry (void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
linked list functionality within the DMA module More...

Detailed Description

Function Documentation

◆ IfxDma_Dma_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_Dma_getSrcPointer ( IfxDma_Dma_Channel * channel )

Returns the SRC pointer for given DMA channel.

Parameters
channel pointer to the DMA base address and channel ID
Returns
SRC pointer for given DMA channel

Definition at line 735 of file IfxDma_Dma.h.

◆ IfxDma_Dma_initLinkedListEntry()

IFX_EXTERN void IfxDma_Dma_initLinkedListEntry | ( | void * | ptrToAddress,
 |  | const IfxDma_Dma_ChannelConfig * | config
 | ) |  |

linked list functionality within the DMA module

Parameters
ptrToAddress | pointer to the memory location where the linked list entry should be stored
config | pointer to the DMA default channel configuration structure
Returns
None

See Linked Lists

Definition at line 223 of file IfxDma_Dma.c.


iLLD_TC26B: Channel Transactions

Functions
Channel Transactions
iLLD » DMA » DMA
Collaboration diagram for Channel Transactions:

Functions

IFX_INLINE void | IfxDma_Dma_clearChannelInterrupt (IfxDma_Dma_Channel *channel)
Clear a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_Dma_getAndClearChannelInterrupt (IfxDma_Dma_Channel *channel)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function. More...
IFX_INLINE boolean | IfxDma_Dma_getChannelInterrupt (IfxDma_Dma_Channel *channel)
Return a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_Dma_isChannelTransactionPending (IfxDma_Dma_Channel *channel)
Poll for an ongoing transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelDestinationAddress (IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the destination address after a transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelSourceAddress (IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the source address after a transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelTransferCount (IfxDma_Dma_Channel *channel, uint32 transferCount)
Re-initialize the transfer count after a transaction. More...
IFX_INLINE void | IfxDma_Dma_startChannelTransaction (IfxDma_Dma_Channel *channel)
initiate the DMA move transaction More...

Detailed Description

Function Documentation

◆ IfxDma_Dma_clearChannelInterrupt()

IFX_INLINE void IfxDma_Dma_clearChannelInterrupt ( IfxDma_Dma_Channel * channel )

Clear a channel transfer interrupt flag.

Parameters
channel pointer to the DMA base address and channel ID
Returns
None

Definition at line 717 of file IfxDma_Dma.h.

◆ IfxDma_Dma_getAndClearChannelInterrupt()

IFX_INLINE boolean IfxDma_Dma_getAndClearChannelInterrupt ( IfxDma_Dma_Channel * channel )

Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function.

Parameters
channel pointer to the DMA base address and channel ID
Returns
TRUE if the interrupt flag is set FALSE if the interrupt flag is not set

Definition at line 723 of file IfxDma_Dma.h.

◆ IfxDma_Dma_getChannelInterrupt()

IFX_INLINE boolean IfxDma_Dma_getChannelInterrupt ( IfxDma_Dma_Channel * channel )

Return a channel transfer interrupt flag.

Parameters
channel pointer to the DMA base address and channel ID
Returns
TRUE if the interrupt flag is set FALSE if the interrupt flag is not set

Definition at line 729 of file IfxDma_Dma.h.

◆ IfxDma_Dma_isChannelTransactionPending()

IFX_INLINE boolean IfxDma_Dma_isChannelTransactionPending ( IfxDma_Dma_Channel * channel )

Poll for an ongoing transaction.

Parameters
channel pointer to the DMA base address and channel ID
Returns
TRUE if a transaction request for the given channel is pending

See Memory-to-Memory Transfers

Definition at line 741 of file IfxDma_Dma.h.

◆ IfxDma_Dma_setChannelDestinationAddress()

IFX_INLINE void IfxDma_Dma_setChannelDestinationAddress | ( | IfxDma_Dma_Channel * | channel,
 |  | uint32 | address
 | ) |  |

Re-initialize the destination address after a transaction.

Parameters
channel | pointer to the DMA base address and channel ID
address | is the Initial address of the destination pointer
Returns
None

See Memory-to-Memory Transfers

Definition at line 747 of file IfxDma_Dma.h.

◆ IfxDma_Dma_setChannelSourceAddress()

IFX_INLINE void IfxDma_Dma_setChannelSourceAddress | ( | IfxDma_Dma_Channel * | channel,
 |  | uint32 | address
 | ) |  |

Re-initialize the source address after a transaction.

Parameters
channel | pointer to the DMA base address and channel ID
address | is the Initial address of the source pointer
Returns
None

See Memory-to-Memory Transfers

Definition at line 753 of file IfxDma_Dma.h.

◆ IfxDma_Dma_setChannelTransferCount()

IFX_INLINE void IfxDma_Dma_setChannelTransferCount | ( | IfxDma_Dma_Channel * | channel,
 |  | uint32 | transferCount
 | ) |  |

Re-initialize the transfer count after a transaction.

Parameters
channel | pointer to the DMA base address and channel ID
transferCount | value holds the DMA transfers within a transaction (1..16383; 0 handled like 1 transaction)
Returns
None

See Memory-to-Memory Transfers

Definition at line 759 of file IfxDma_Dma.h.

◆ IfxDma_Dma_startChannelTransaction()

IFX_INLINE void IfxDma_Dma_startChannelTransaction ( IfxDma_Dma_Channel * channel )

initiate the DMA move transaction

Parameters
channel pointer to the DMA base address and channel ID
Returns
None

See Memory-to-Memory Transfers

Definition at line 765 of file IfxDma_Dma.h.


iLLD_TC26B: IfxDma_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxDma_cfg.h File Reference
iLLD » DMA

DMA on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for IfxDma_cfg.h:

Go to the source code of this file.

Macros

#define | IFXDMA_NUM_CHANNELS 48
Number of channels. More...
#define | IFXDMA_ERROR_S (IFX_DMA_BLK_CLRE_CSER_MSK << IFX_DMA_BLK_CLRE_CSER_OFF)
Error mask for move engine source error. More...
#define | IFXDMA_ERROR_D (IFX_DMA_BLK_CLRE_CDER_MSK << IFX_DMA_BLK_CLRE_CDER_OFF)
Error mask for move engine destination error. More...
#define | IFXDMA_ERROR_SPB (IFX_DMA_BLK_CLRE_CSPBER_MSK << IFX_DMA_BLK_CLRE_CSPBER_OFF)
Error mask for bus error on SPB. More...
#define | IFXDMA_ERROR_SRI (IFX_DMA_BLK_CLRE_CSRIER_MSK << IFX_DMA_BLK_CLRE_CSRIER_OFF)
Error mask for bus error on SRI. More...
#define | IFXDMA_ERROR_RAM (IFX_DMA_BLK_CLRE_CRAMER_MSK << IFX_DMA_BLK_CLRE_CRAMER_OFF)
Error mask for RAM error. More...
#define | IFXDMA_ERROR_SLL (IFX_DMA_BLK_CLRE_CSLLER_MSK << IFX_DMA_BLK_CLRE_CSLLER_OFF)
Error mask for SLL (safe linked list CRC checksum) error. More...
#define | IFXDMA_ERROR_DLL (IFX_DMA_BLK_CLRE_CDLLER_MSK << IFX_DMA_BLK_CLRE_CDLLER_OFF)
Error mask for DLL (failed linked list load) error. More...
#define | IFXDMA_NUM_MODULES (1)

Enumerations

enum IfxDma_ChannelId {
IfxDma_ChannelId_none = -1,
IfxDma_ChannelId_0 = 0,
IfxDma_ChannelId_1,
IfxDma_ChannelId_2,
IfxDma_ChannelId_3,
IfxDma_ChannelId_4,
IfxDma_ChannelId_5,
IfxDma_ChannelId_6,
IfxDma_ChannelId_7,
IfxDma_ChannelId_8,
IfxDma_ChannelId_9,
IfxDma_ChannelId_10,
IfxDma_ChannelId_11,
IfxDma_ChannelId_12,
IfxDma_ChannelId_13,
IfxDma_ChannelId_14,
IfxDma_ChannelId_15,
IfxDma_ChannelId_16,
IfxDma_ChannelId_17,
IfxDma_ChannelId_18,
IfxDma_ChannelId_19,
IfxDma_ChannelId_20,
IfxDma_ChannelId_21,
IfxDma_ChannelId_22,
IfxDma_ChannelId_23,
IfxDma_ChannelId_24,
IfxDma_ChannelId_25,
IfxDma_ChannelId_26,
IfxDma_ChannelId_27,
IfxDma_ChannelId_28,
IfxDma_ChannelId_29,
IfxDma_ChannelId_30,
IfxDma_ChannelId_31,
IfxDma_ChannelId_32,
IfxDma_ChannelId_33,
IfxDma_ChannelId_34,
IfxDma_ChannelId_35,
IfxDma_ChannelId_36,
IfxDma_ChannelId_37,
IfxDma_ChannelId_38,
IfxDma_ChannelId_39,
IfxDma_ChannelId_40,
IfxDma_ChannelId_41,
IfxDma_ChannelId_42,
IfxDma_ChannelId_43,
IfxDma_ChannelId_44,
IfxDma_ChannelId_45,
IfxDma_ChannelId_46,
IfxDma_ChannelId_47
}
DMA channel resources definition. More...

Detailed Description

DMA on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDma_cfg.h.

Macro Definition Documentation

◆ IFXDMA_ERROR_D

#define IFXDMA_ERROR_D (IFX_DMA_BLK_CLRE_CDER_MSK << IFX_DMA_BLK_CLRE_CDER_OFF)

Error mask for move engine destination error.

Definition at line 72 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_DLL

#define IFXDMA_ERROR_DLL (IFX_DMA_BLK_CLRE_CDLLER_MSK << IFX_DMA_BLK_CLRE_CDLLER_OFF)

Error mask for DLL (failed linked list load) error.

Definition at line 92 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_RAM

#define IFXDMA_ERROR_RAM (IFX_DMA_BLK_CLRE_CRAMER_MSK << IFX_DMA_BLK_CLRE_CRAMER_OFF)

Error mask for RAM error.

Definition at line 84 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_S

#define IFXDMA_ERROR_S (IFX_DMA_BLK_CLRE_CSER_MSK << IFX_DMA_BLK_CLRE_CSER_OFF)

Error mask for move engine source error.

Definition at line 68 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_SLL

#define IFXDMA_ERROR_SLL (IFX_DMA_BLK_CLRE_CSLLER_MSK << IFX_DMA_BLK_CLRE_CSLLER_OFF)

Error mask for SLL (safe linked list CRC checksum) error.

Definition at line 88 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_SPB

#define IFXDMA_ERROR_SPB (IFX_DMA_BLK_CLRE_CSPBER_MSK << IFX_DMA_BLK_CLRE_CSPBER_OFF)

Error mask for bus error on SPB.

Definition at line 76 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_SRI

#define IFXDMA_ERROR_SRI (IFX_DMA_BLK_CLRE_CSRIER_MSK << IFX_DMA_BLK_CLRE_CSRIER_OFF)

Error mask for bus error on SRI.

Definition at line 80 of file IfxDma_cfg.h.

◆ IFXDMA_NUM_CHANNELS

#define IFXDMA_NUM_CHANNELS 48

Number of channels.

Definition at line 64 of file IfxDma_cfg.h.

◆ IFXDMA_NUM_MODULES

#define IFXDMA_NUM_MODULES (1)

Definition at line 94 of file IfxDma_cfg.h.

Enumeration Type Documentation

◆ IfxDma_ChannelId

enum IfxDma_ChannelId

DMA channel resources definition.

Enumerator
IfxDma_ChannelId_none | None of the Ifx_DMA Channels.
IfxDma_ChannelId_0 | Ifx_DMA Channel 0.
IfxDma_ChannelId_1 | Ifx_DMA Channel 1.
IfxDma_ChannelId_2 | Ifx_DMA Channel 2.
IfxDma_ChannelId_3 | Ifx_DMA Channel 3.
IfxDma_ChannelId_4 | Ifx_DMA Channel 4.
IfxDma_ChannelId_5 | Ifx_DMA Channel 5.
IfxDma_ChannelId_6 | Ifx_DMA Channel 6.
IfxDma_ChannelId_7 | Ifx_DMA Channel 7.
IfxDma_ChannelId_8 | Ifx_DMA Channel 8.
IfxDma_ChannelId_9 | Ifx_DMA Channel 9.
IfxDma_ChannelId_10 | Ifx_DMA Channel 10.
IfxDma_ChannelId_11 | Ifx_DMA Channel 11.
IfxDma_ChannelId_12 | Ifx_DMA Channel 12.
IfxDma_ChannelId_13 | Ifx_DMA Channel 13.
IfxDma_ChannelId_14 | Ifx_DMA Channel 14.
IfxDma_ChannelId_15 | Ifx_DMA Channel 15.
IfxDma_ChannelId_16 | Ifx_DMA Channel 16.
IfxDma_ChannelId_17 | Ifx_DMA Channel 17.
IfxDma_ChannelId_18 | Ifx_DMA Channel 18.
IfxDma_ChannelId_19 | Ifx_DMA Channel 19.
IfxDma_ChannelId_20 | Ifx_DMA Channel 20.
IfxDma_ChannelId_21 | Ifx_DMA Channel 21.
IfxDma_ChannelId_22 | Ifx_DMA Channel 22.
IfxDma_ChannelId_23 | Ifx_DMA Channel 23.
IfxDma_ChannelId_24 | Ifx_DMA Channel 24.
IfxDma_ChannelId_25 | Ifx_DMA Channel 25.
IfxDma_ChannelId_26 | Ifx_DMA Channel 26.
IfxDma_ChannelId_27 | Ifx_DMA Channel 27.
IfxDma_ChannelId_28 | Ifx_DMA Channel 28.
IfxDma_ChannelId_29 | Ifx_DMA Channel 29.
IfxDma_ChannelId_30 | Ifx_DMA Channel 30.
IfxDma_ChannelId_31 | Ifx_DMA Channel 31.
IfxDma_ChannelId_32 | Ifx_DMA Channel 32.
IfxDma_ChannelId_33 | Ifx_DMA Channel 33.
IfxDma_ChannelId_34 | Ifx_DMA Channel 34.
IfxDma_ChannelId_35 | Ifx_DMA Channel 35.
IfxDma_ChannelId_36 | Ifx_DMA Channel 36.
IfxDma_ChannelId_37 | Ifx_DMA Channel 37.
IfxDma_ChannelId_38 | Ifx_DMA Channel 38.
IfxDma_ChannelId_39 | Ifx_DMA Channel 39.
IfxDma_ChannelId_40 | Ifx_DMA Channel 40.
IfxDma_ChannelId_41 | Ifx_DMA Channel 41.
IfxDma_ChannelId_42 | Ifx_DMA Channel 42.
IfxDma_ChannelId_43 | Ifx_DMA Channel 43.
IfxDma_ChannelId_44 | Ifx_DMA Channel 44.
IfxDma_ChannelId_45 | Ifx_DMA Channel 45.
IfxDma_ChannelId_46 | Ifx_DMA Channel 46.
IfxDma_ChannelId_47 | Ifx_DMA Channel 47.

Definition at line 102 of file IfxDma_cfg.h.


iLLD_TC26B: IfxDma_Dma.h File Reference

  • Dma
  • Dma
Data Structures | Functions
IfxDma_Dma.h File Reference
iLLD » DMA

DMA DMA details. More...

#include "_Impl/IfxDma_cfg.h"
#include "Dma/Std/IfxDma.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxDma_Dma.h:

Go to the source code of this file.

Data Structures

struct | IfxDma_Dma
DMA base address data structure (Module handle) More...
struct | IfxDma_Dma_Channel
Channel handle. More...
struct | IfxDma_Dma_ChannelConfig
Configuration data structure of the channel. More...
struct | IfxDma_Dma_Config
Configuration data structure of the Module. More...

Functions

IFX_EXTERN void | IfxDma_Dma_createModuleHandle (IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it's ensure that the DMA module is already initialized, and a DMA handle isn't globally available. More...
IFX_EXTERN void | IfxDma_Dma_deInitChannel (IfxDma_Dma *dma, IfxDma_ChannelId channel)
de-initialize the DMA channel More...
IFX_EXTERN void | IfxDma_Dma_initModule (IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
Initialize the DMA module. More...
IFX_EXTERN void | IfxDma_Dma_initModuleConfig (IfxDma_Dma_Config *config, Ifx_DMA *dma)
initialize the DMA module configuration More...
IFX_EXTERN void | IfxDma_Dma_initChannel (IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel More...
IFX_EXTERN void | IfxDma_Dma_initChannelConfig (IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDma_Dma_getSrcPointer (IfxDma_Dma_Channel *channel)
Returns the SRC pointer for given DMA channel. More...
IFX_EXTERN void | IfxDma_Dma_initLinkedListEntry (void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
linked list functionality within the DMA module More...
IFX_INLINE void | IfxDma_Dma_clearChannelInterrupt (IfxDma_Dma_Channel *channel)
Clear a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_Dma_getAndClearChannelInterrupt (IfxDma_Dma_Channel *channel)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function. More...
IFX_INLINE boolean | IfxDma_Dma_getChannelInterrupt (IfxDma_Dma_Channel *channel)
Return a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_Dma_isChannelTransactionPending (IfxDma_Dma_Channel *channel)
Poll for an ongoing transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelDestinationAddress (IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the destination address after a transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelSourceAddress (IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the source address after a transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelTransferCount (IfxDma_Dma_Channel *channel, uint32 transferCount)
Re-initialize the transfer count after a transaction. More...
IFX_INLINE void | IfxDma_Dma_startChannelTransaction (IfxDma_Dma_Channel *channel)
initiate the DMA move transaction More...

Detailed Description

DMA DMA details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDma_Dma.h.


iLLD_TC26B: IfxDma.h File Reference

  • Dma
  • Std
Enumerations | Functions
IfxDma.h File Reference
iLLD » DMA

DMA basic functionality. More...

#include "_Impl/IfxDma_cfg.h"
#include "IfxDma_bf.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxDma_reg.h"
#include "Src/Std/IfxSrc.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxDma.h:

Go to the source code of this file.

Enumerations

enum IfxDma_BusMasterMode {
IfxDma_BusMasterMode_user = 0,
IfxDma_BusMasterMode_supervisor = 1
}
Bus Master Mode definition Definition in Ifx_DMA.MODE[4].B.MODE. More...
enum IfxDma_ChannelBusPriority {
IfxDma_ChannelBusPriority_low = 0,
IfxDma_ChannelBusPriority_medium = 1,
IfxDma_ChannelBusPriority_high = 2
}
Channel Bus Priority definition. More...
enum IfxDma_ChannelIncrementCircular {
IfxDma_ChannelIncrementCircular_none = 0,
IfxDma_ChannelIncrementCircular_2 = 1,
IfxDma_ChannelIncrementCircular_4 = 2,
IfxDma_ChannelIncrementCircular_8 = 3,
IfxDma_ChannelIncrementCircular_16 = 4,
IfxDma_ChannelIncrementCircular_32 = 5,
IfxDma_ChannelIncrementCircular_64 = 6,
IfxDma_ChannelIncrementCircular_128 = 7,
IfxDma_ChannelIncrementCircular_256 = 8,
IfxDma_ChannelIncrementCircular_512 = 9,
IfxDma_ChannelIncrementCircular_1024 = 10,
IfxDma_ChannelIncrementCircular_2048 = 11,
IfxDma_ChannelIncrementCircular_4096 = 12,
IfxDma_ChannelIncrementCircular_8192 = 13,
IfxDma_ChannelIncrementCircular_16384 = 14,
IfxDma_ChannelIncrementCircular_32768 = 15
}
DMA circular buffer (wrap around) definition Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD. More...
enum IfxDma_ChannelIncrementDirection {
IfxDma_ChannelIncrementDirection_negative = 0,
IfxDma_ChannelIncrementDirection_positive = 1
}
DMA incrementation direction definition Definition in Ifx_DMA.CH[64].ADICR.B.INCS. More...
enum IfxDma_ChannelIncrementStep {
IfxDma_ChannelIncrementStep_1 = 0,
IfxDma_ChannelIncrementStep_2 = 1,
IfxDma_ChannelIncrementStep_4 = 2,
IfxDma_ChannelIncrementStep_8 = 3,
IfxDma_ChannelIncrementStep_16 = 4,
IfxDma_ChannelIncrementStep_32 = 5,
IfxDma_ChannelIncrementStep_64 = 6,
IfxDma_ChannelIncrementStep_128 = 7
}
DMA incrementation definition Definition in Ifx_DMA.CH[64].ADICR.B.SMF. More...
enum IfxDma_ChannelInterruptControl {
IfxDma_ChannelInterruptControl_thresholdLimitMatch = 0,
IfxDma_ChannelInterruptControl_transferCountDecremented = 1
}
Channel Transfer Interrupt generation mechanism. Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0) More...
enum IfxDma_ChannelMove {
IfxDma_ChannelMove_1 = 0,
IfxDma_ChannelMove_2 = 1,
IfxDma_ChannelMove_4 = 2,
IfxDma_ChannelMove_8 = 3,
IfxDma_ChannelMove_16 = 4,
IfxDma_ChannelMove_3 = 5,
IfxDma_ChannelMove_5 = 6,
IfxDma_ChannelMove_9 = 7
}
DMA transfer definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.BLKM and Ifx_DMA.BLK1.ME.CHCR.B.BLKM. More...
enum IfxDma_ChannelMoveSize {
IfxDma_ChannelMoveSize_8bit = 0,
IfxDma_ChannelMoveSize_16bit = 1,
IfxDma_ChannelMoveSize_32bit = 2,
IfxDma_ChannelMoveSize_64bit = 3,
IfxDma_ChannelMoveSize_128bit = 4,
IfxDma_ChannelMoveSize_256bit = 5
}
DMA move size definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHDW and Ifx_DMA.BLK1.ME.CHCR.B.CHDW. More...
enum IfxDma_ChannelOperationMode {
IfxDma_ChannelOperationMode_single = 0,
IfxDma_ChannelOperationMode_continuous = 1
}
DMA operation mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHMODE and Ifx_DMA.BLK1.ME.CHCR.B.CHMODE. More...
enum IfxDma_ChannelPattern {
IfxDma_ChannelPattern_0_disable = 0,
IfxDma_ChannelPattern_0_mode1 = 1,
IfxDma_ChannelPattern_0_mode2 = 2,
IfxDma_ChannelPattern_0_mode3 = 3,
IfxDma_ChannelPattern_1_disable = 4,
IfxDma_ChannelPattern_1_mode1 = 5,
IfxDma_ChannelPattern_1_mode2 = 6,
IfxDma_ChannelPattern_1_mode3 = 7
}
Pattern detection selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PATSEL and Ifx_DMA.BLK1.ME.CHCR.B.PATSEL. More...
enum IfxDma_ChannelPriority {
IfxDma_ChannelPriority_low = 0,
IfxDma_ChannelPriority_medium = 1,
IfxDma_ChannelPriority_high = 2
}
Channel Priority definition. More...
enum IfxDma_ChannelRequestMode {
IfxDma_ChannelRequestMode_oneTransferPerRequest = 0,
IfxDma_ChannelRequestMode_completeTransactionPerRequest = 1
}
DMA request mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.RROAT and Ifx_DMA.BLK1.ME.CHCR.B.RROAT. More...
enum IfxDma_ChannelRequestSource {
IfxDma_ChannelRequestSource_peripheral = 0,
IfxDma_ChannelRequestSource_daisyChain = 1
}
DMA request selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PRSEL and Ifx_DMA.BLK1.ME.CHCR.B.PRSEL. More...
enum IfxDma_ChannelShadow {
IfxDma_ChannelShadow_none = 0,
IfxDma_ChannelShadow_src = 1,
IfxDma_ChannelShadow_dst = 2,
IfxDma_ChannelShadow_srcDirectWrite = 5,
IfxDma_ChannelShadow_dstDirectWrite = 6,
IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch = 8,
IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch = 9,
IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch = 10,
IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch = 11,
IfxDma_ChannelShadow_linkedList = 12,
IfxDma_ChannelShadow_accumulatedLinkedList = 13,
IfxDma_ChannelShadow_safeLinkedList = 14,
IfxDma_ChannelShadow_conditionalLinkedList = 15
}
shadow definition definition Definition in Ifx_DMA.CH[64].ADICR.B.SHCT More...
enum IfxDma_HardwareResourcePartition {
IfxDma_HardwareResourcePartition_0 = 0,
IfxDma_HardwareResourcePartition_1,
IfxDma_HardwareResourcePartition_2,
IfxDma_HardwareResourcePartition_3
}
enum IfxDma_MoveEngine {
IfxDma_MoveEngine_0 = 0,
IfxDma_MoveEngine_1 = 1
}
DMA move engine definition. More...
enum IfxDma_SleepMode {
IfxDma_SleepMode_enable = 0,
IfxDma_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_DMA.CLC.B.EDIS. More...

Functions

IFX_INLINE boolean | IfxDma_isChannelReset (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (reset / not reset) This API needs to be used after the IfxDma_resetChannel() More...
IFX_INLINE void | IfxDma_resetChannel (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Reset the channel. More...
IFX_INLINE void | IfxDma_clearChannelTransactionRequestLost (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear the channel transaction request lost flag status. More...
IFX_INLINE void | IfxDma_disableChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable a DMA channel hardware transaction request. More...
IFX_INLINE void | IfxDma_disableChannelTransactionLostError (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable the generation of a channel transaction lost error interrupt. More...
IFX_INLINE void | IfxDma_enableChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable a DMA channel hardware transaction request. More...
IFX_INLINE void | IfxDma_enableChannelTransactionLostError (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the generation of a channel transaction lost error interrupt. More...
IFX_INLINE boolean | IfxDma_getChannelTransactionRequestLost (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Check the channel transaction request lost flag status. More...
IFX_INLINE IfxDma_ChannelIncrementCircular | IfxDma_getCircularRangeCode (uint16 range)
Converts DMA circular range to circular code. More...
IFX_INLINE boolean | IfxDma_isChannelTransactionEnabled (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the hardware transaction request status of a DMA channel. More...
IFX_INLINE boolean | IfxDma_isChannelTransactionPending (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (transaction pending) More...
IFX_INLINE void | IfxDma_setSleepMode (Ifx_DMA *dma, IfxDma_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxDma_startChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Request a DMA channel transaction. More...
IFX_INLINE void | IfxDma_clearErrorFlags (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine, uint32 mask)
Clear the DMA error status flags. More...
IFX_INLINE void | IfxDma_disableMoveEngineDestinationError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine destination error interrupt. More...
IFX_INLINE void | IfxDma_disableMoveEngineSourceError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine source error interrupt. More...
IFX_INLINE void | IfxDma_enableMoveEngineDestinationError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine destination error interrupt. More...
IFX_INLINE void | IfxDma_enableMoveEngineSourceError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine source error interrupt. More...
IFX_INLINE uint32 | IfxDma_getErrorFlags (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Return the DMA error status flags. More...
IFX_INLINE uint32 | IfxDma_getChannelDestinationAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address. More...
IFX_INLINE uint32 | IfxDma_getChannelSourceAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address. More...
IFX_INLINE boolean | IfxDma_getChannelSuspendModeStatus (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the DMA channel suspend Mode status. More...
IFX_INLINE uint32 | IfxDma_getChannelTransferCount (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return remaining DMA transfer count. More...
IFX_INLINE uint32 | IfxDma_getTimestamp (Ifx_DMA *dma)
get the time stamp More...
IFX_INLINE void | IfxDma_setChannelBlockMode (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMove blockMode)
Configure the move count for each DMA channel transfer. More...
IFX_INLINE void | IfxDma_setChannelContinuousMode (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "continous transaction mode" After a transaction, the hardware request transaction remain enabled. More...
IFX_INLINE void | IfxDma_setChannelDestinationAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address. More...
IFX_INLINE void | IfxDma_setChannelDestinationIncrementStep (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel destination pointer. More...
IFX_INLINE void | IfxDma_setChannelMoveSize (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
Configure a DMA channel move. More...
IFX_INLINE void | IfxDma_setChannelShadow (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelShadow shadow)
Configure a DMA channel shadow pointer. More...
IFX_INLINE void | IfxDma_setChannelSingleMode (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" After a transaction, the hardware request transaction is disabled, and must be set by software again. More...
IFX_INLINE void | IfxDma_setChannelSingleTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" One transfer request starts a complete DMA transaction. More...
IFX_INLINE void | IfxDma_setChannelSingleTransfer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transfer mode" A transfer request is required for each transfer. More...
IFX_INLINE void | IfxDma_setChannelSourceAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address. More...
IFX_INLINE void | IfxDma_setChannelSourceIncrementStep (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel source pointer. More...
IFX_INLINE void | IfxDma_setChannelSuspendEnable (Ifx_DMA *dma, IfxDma_ChannelId channelId, boolean enable)
Configure a DMA channel suspend enable. More...
IFX_INLINE void | IfxDma_setChannelTransferCount (Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction. More...
IFX_INLINE void | IfxDma_writeChannelShadowDisable (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to read only. More...
IFX_INLINE void | IfxDma_writeChannelShadowEnable (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to write-able. More...
IFX_INLINE void | IfxDma_clearChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear channel halt request and aknowledgement. More...
IFX_INLINE boolean | IfxDma_getChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get channel halt aknowledgement. More...
IFX_INLINE void | IfxDma_setChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
setting channel halt request More...
IFX_INLINE boolean | IfxDma_getDoubleBufferRead (Ifx_DMA *dma, IfxDma_ChannelId channelId)
get information on buffer being read by software and clear the notification flag More...
IFX_INLINE boolean | IfxDma_getDoubleBufferSelection (Ifx_DMA *dma, IfxDma_ChannelId channelId)
get Double buffer selection More...
IFX_INLINE void | IfxDma_keepDoubleBufferActive (Ifx_DMA *dma, IfxDma_ChannelId channelId)
keeps the double buffer active More...
IFX_INLINE void | IfxDma_switchDoubleBuffer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Double buffer switch application. More...
IFX_INLINE void | IfxDma_clearChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag. More...
IFX_INLINE void | IfxDma_disableChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable channel interrupt trigger. More...
IFX_INLINE void | IfxDma_enableChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable channel interrupt trigger. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelPatternDetectionInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the pattern detection interrupt flag. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelWrapDestinationBufferInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap destination buffer interrupt trigger flag. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelWrapSourceBufferInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap source buffer interrupt trigger flag. More...
IFX_INLINE boolean | IfxDma_getChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_getChannelPatternDetectionOldValue (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns whether the old value of pattern detection corresponding pattern comparison operation found a pattern match in previous DMA * read move or not. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDma_getSrcPointer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel. More...
IFX_INLINE void | IfxDma_setChannelInterruptServiceRequest (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Setting of channel interrupt service request by software. More...
IFX_INLINE void | IfxDma_setChannelHardwareResourcePartition (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_HardwareResourcePartition resourcePartition)
Configure the hardware resource partition. More...
IFX_INLINE void | IfxDma_setInterruptControlValue (Ifx_DMA *dma, IfxDma_ChannelId channelId, uint8 value)
Sets the Interrupt control value. More...
IFX_INLINE void | IfxDma_setCircularBufferDestinationLength (Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
Sets the Circular Buffer Destination Length. More...
IFX_INLINE void | IfxDma_setCircularBufferSourceLength (Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
Sets the Circular Buffer Source Length. More...
IFX_INLINE void | IfxDma_enableSourceCircularBuffer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the Source Circular Buffer. More...
IFX_INLINE void | IfxDma_enableDestinationCircularBuffer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the Destination Circular Buffer. More...
IFX_INLINE uint32 | IfxDma_getDataCRC (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the Data CRC. More...
IFX_INLINE uint32 | IfxDma_getSourceAndDestinationCRC (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the Source and Destination CRC. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDma_getErrPointer (Ifx_DMA *dma)
Returns the ERR pointer. More...

Detailed Description

DMA basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDma.h.

Function Documentation

◆ IfxDma_enableDestinationCircularBuffer()

IFX_INLINE void IfxDma_enableDestinationCircularBuffer | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Enable the Destination Circular Buffer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

Definition at line 1738 of file IfxDma.h.

◆ IfxDma_enableSourceCircularBuffer()

IFX_INLINE void IfxDma_enableSourceCircularBuffer | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Enable the Source Circular Buffer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

Definition at line 1732 of file IfxDma.h.

◆ IfxDma_getDataCRC()

IFX_INLINE uint32 IfxDma_getDataCRC | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns the Data CRC.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
The Data CRC value

Definition at line 1744 of file IfxDma.h.

◆ IfxDma_getErrPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getErrPointer ( Ifx_DMA * dma )

Returns the ERR pointer.

Parameters
dma pointer to DMA module
Returns
ERR pointer for given DMA

Definition at line 1756 of file IfxDma.h.

◆ IfxDma_getSourceAndDestinationCRC()

IFX_INLINE uint32 IfxDma_getSourceAndDestinationCRC | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns the Source and Destination CRC.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
The source and destination CRC values

Definition at line 1750 of file IfxDma.h.

◆ IfxDma_setChannelHardwareResourcePartition()

IFX_INLINE void IfxDma_setChannelHardwareResourcePartition | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_HardwareResourcePartition | resourcePartition
 | ) |  |

Configure the hardware resource partition.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
resourcePartition | Hardware resource partition
Returns
None
// Set the required hardware resource partition
IfxDma_setChannelHardwareResourcePartition(chn[0].dma, chn[0].channelId,setChannelHardwareResourcePartition);

Definition at line 1705 of file IfxDma.h.

◆ IfxDma_setCircularBufferDestinationLength()

IFX_INLINE void IfxDma_setCircularBufferDestinationLength | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | uint16 | length
 | ) |  |

Sets the Circular Buffer Destination Length.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
length | Circular Buffer Destination Length
Returns
None

Definition at line 1720 of file IfxDma.h.

◆ IfxDma_setCircularBufferSourceLength()

IFX_INLINE void IfxDma_setCircularBufferSourceLength | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | uint16 | length
 | ) |  |

Sets the Circular Buffer Source Length.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
length | Circular Buffer Source Length
Returns
None

Definition at line 1726 of file IfxDma.h.

◆ IfxDma_setInterruptControlValue()

IFX_INLINE void IfxDma_setInterruptControlValue | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | uint8 | value
 | ) |  |

Sets the Interrupt control value.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
value | Interrupt control value
Returns
None

Definition at line 1714 of file IfxDma.h.


iLLD_TC26B: DSADC

Modules | Files
DSADC
iLLD
Collaboration diagram for DSADC:

Modules

Implementation
Standard Driver
DSADC Pin Mapping
How to use the DSADC Interface driver?
DSADC
RDC

Files

file | IfxDsadc_cfg.h
DSADC on-chip implementation data.
file | IfxDsadc_PinMap.c
DSADC I/O map.
file | IfxDsadc_PinMap.h
DSADC I/O map.
file | IfxDsadc_Dsadc.h
DSADC DSADC details.
file | IfxDsadc_Rdc.h
DSADC RDC details.
file | IfxDsadc.h
DSADC basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » DSADC
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » DSADC
Collaboration diagram for Standard Driver:

Modules

Enumerations
Operative Functions
Support Functions
Interrupt Functions
IO Pin Configuration Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » DSADC » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxDsadc_AuxCombFilterShift {
IfxDsadc_AuxCombFilterShift_noShift = 0,
IfxDsadc_AuxCombFilterShift_shiftBy1 = 1,
IfxDsadc_AuxCombFilterShift_shiftBy2 = 2,
IfxDsadc_AuxCombFilterShift_shiftBy3 = 3
}
Comb Filter (auxiliary) shift control
Definition in Ifx_DSADC.FCFGA.B.AFSC. More...
enum IfxDsadc_AuxCombFilterType {
IfxDsadc_AuxCombFilterType_comb1 = 0,
IfxDsadc_AuxCombFilterType_comb2 = 1,
IfxDsadc_AuxCombFilterType_comb3 = 2,
IfxDsadc_AuxCombFilterType_combF = 3
}
Comb Filter (auxiliary) configuration/type
Definition in Ifx_DSADC.FCFGA.B.CFAC. More...
enum IfxDsadc_AuxEvent {
IfxDsadc_AuxEvent_everyNewResult = 0,
IfxDsadc_AuxEvent_insideBoundary = 1,
IfxDsadc_AuxEvent_outsideBoundary = 2
}
Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.ESEL. More...
enum IfxDsadc_AuxGate {
IfxDsadc_AuxGate_definedByESEL = 0,
IfxDsadc_AuxGate_coupledToIntegrator = 1
}
Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.EGT. More...
enum IfxDsadc_AuxServiceRequest {
IfxDsadc_AuxServiceRequest_never = 0,
IfxDsadc_AuxServiceRequest_auxFilter = 1,
IfxDsadc_AuxServiceRequest_altSource = 2
}
Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.SRGA. More...
enum IfxDsadc_CarrierWaveformMode {
IfxDsadc_CarrierWaveformMode_stopped = 0,
IfxDsadc_CarrierWaveformMode_square = 1,
IfxDsadc_CarrierWaveformMode_triangle = 2,
IfxDsadc_CarrierWaveformMode_sine = 3
}
Carrier generation mode
Definition in Ifx_DSADC.CGCFG.B.CGMOD. More...
enum IfxDsadc_ChannelId {
IfxDsadc_ChannelId_0 = 0,
IfxDsadc_ChannelId_2 = 2,
IfxDsadc_ChannelId_3 = 3
}
Specifies the channel Index. More...
enum IfxDsadc_CommonModeVoltage {
IfxDsadc_CommonModeVoltage_a = 0,
IfxDsadc_CommonModeVoltage_b = 1,
IfxDsadc_CommonModeVoltage_c = 2
}
Modulator common mode voltage selection
Definition in Ifx_DSADC.MODCFGx.B.CMVS. More...
enum IfxDsadc_FirDataShift {
IfxDsadc_FirDataShift_noShift = 0,
IfxDsadc_FirDataShift_shiftBy1 = 1,
IfxDsadc_FirDataShift_shiftBy2 = 2,
IfxDsadc_FirDataShift_shiftBy3 = 3
}
FIR data shift control
Selects the displacement caused by the data shifter at the FIR filter output
Definition in Ifx_DSADC.FCFGM.B.DSH. More...
enum IfxDsadc_FirInternalShift {
IfxDsadc_FirInternalShift_noShift = 0,
IfxDsadc_FirInternalShift_shiftBy1 = 1
}
FIR shift control
Selects the displacement caused by the data shifter inbetween the FIR filter blocks.
Definition in Ifx_DSADC.FCFGM.B.FSH. More...
enum IfxDsadc_InputConfig {
IfxDsadc_InputConfig_inputPin = 0,
IfxDsadc_InputConfig_supplyVoltage = 1,
IfxDsadc_InputConfig_commonModeVoltage = 2,
IfxDsadc_InputConfig_referenceGround = 3
}
Modulator configuration of positive/negative input line
Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN. More...
enum IfxDsadc_InputDataSource {
IfxDsadc_InputDataSource_onChipStandAlone = 0,
IfxDsadc_InputDataSource_onChipCombined = 1,
IfxDsadc_InputDataSource_directInputA = 2,
IfxDsadc_InputDataSource_invertedInputA = 3,
IfxDsadc_InputDataSource_directInputB = 4,
IfxDsadc_InputDataSource_invertedInputB = 5
}
Demodulator input data source selection
Definition in Ifx_DSADC.DICFG.B.DSRC. More...
enum IfxDsadc_InputGain {
IfxDsadc_InputGain_factor1 = 0,
IfxDsadc_InputGain_factor2 = 1,
IfxDsadc_InputGain_factor4 = 2,
IfxDsadc_InputGain_factor8 = 3,
IfxDsadc_InputGain_factor16 = 4
}
Modulator gain select of analog input path
Definition in Ifx_DSADC.MODCFGx.B.GAINSEL. More...
enum IfxDsadc_InputPin {
IfxDsadc_InputPin_a = 0,
IfxDsadc_InputPin_b = 1,
IfxDsadc_InputPin_c = 2,
IfxDsadc_InputPin_d = 3
}
Modulator input pin selection
Definition in Ifx_DSADC.MODCFGx.B.INMUX. More...
enum IfxDsadc_IntegrationWindowSize {
IfxDsadc_IntegrationWindowSize_internalControl = 0,
IfxDsadc_IntegrationWindowSize_externalControl = 1
}
Integrator window size
Definition in Ifx_DSADC.IWCTR.B.IWS. More...
enum IfxDsadc_IntegratorTrigger {
IfxDsadc_IntegratorTrigger_bypassed = 0,
IfxDsadc_IntegratorTrigger_fallingEdge = 1,
IfxDsadc_IntegratorTrigger_risingEdge = 2,
IfxDsadc_IntegratorTrigger_alwaysActive = 3
}
Integrator trigger mode
NOTE: switch-first to bypassed before using other mode
Definition in Ifx_DSADC.DICFG.B.ITRMODE. More...
enum IfxDsadc_LowPowerSupply {
IfxDsadc_LowPowerSupply_5V = 0,
IfxDsadc_LowPowerSupply_3_3V = 1
}
Low power supply voltage select
Definition in Ifx_DSADC.GLOBCFG.B.LOSUP. More...
enum IfxDsadc_MainCombFilterShift {
IfxDsadc_MainCombFilterShift_noShift = 0,
IfxDsadc_MainCombFilterShift_shiftBy1 = 1,
IfxDsadc_MainCombFilterShift_shiftBy2 = 2,
IfxDsadc_MainCombFilterShift_shiftBy3 = 3
}
Comb Filter (Main Chain) shift control
Definition in Ifx_DSADC.FCFGC.B.MFSC. More...
enum IfxDsadc_MainCombFilterType {
IfxDsadc_MainCombFilterType_comb1 = 0,
IfxDsadc_MainCombFilterType_comb2 = 1,
IfxDsadc_MainCombFilterType_comb3 = 2,
IfxDsadc_MainCombFilterType_combF = 3
}
Comb Filter (Main Chain) configuration/type
Definition in Ifx_DSADC.FCFGC.B.CFMC. More...
enum IfxDsadc_MainServiceRequest {
IfxDsadc_MainServiceRequest_never = 0,
IfxDsadc_MainServiceRequest_highGateSignal = 1,
IfxDsadc_MainServiceRequest_lowGateSignal = 2,
IfxDsadc_MainServiceRequest_everyNewResult = 3
}
Service request generation (main chain)
Definition in Ifx_DSADC.FCFGC.B.SRGM. More...
enum IfxDsadc_ModulatorClock {
IfxDsadc_ModulatorClock_off = 0,
IfxDsadc_ModulatorClock_fDSD = 1,
IfxDsadc_ModulatorClock_fERAY = 2,
IfxDsadc_ModulatorClock_fOSC0 = 3
}
Modulator clock select
Definition in Ifx_DSADC.GLOBCFG.B.MCSEL. More...
enum IfxDsadc_ModulatorClockDivider {
IfxDsadc_ModulatorClockDivider_div2 = 0,
IfxDsadc_ModulatorClockDivider_div4,
IfxDsadc_ModulatorClockDivider_div6,
IfxDsadc_ModulatorClockDivider_div8,
IfxDsadc_ModulatorClockDivider_div10,
IfxDsadc_ModulatorClockDivider_div12,
IfxDsadc_ModulatorClockDivider_div14,
IfxDsadc_ModulatorClockDivider_div16,
IfxDsadc_ModulatorClockDivider_div18,
IfxDsadc_ModulatorClockDivider_div20,
IfxDsadc_ModulatorClockDivider_div22,
IfxDsadc_ModulatorClockDivider_div24,
IfxDsadc_ModulatorClockDivider_div26,
IfxDsadc_ModulatorClockDivider_div28,
IfxDsadc_ModulatorClockDivider_div30,
IfxDsadc_ModulatorClockDivider_div32
}
Modulator divider factor for modulator clock
Definition in Ifx_DSADC.MODCFGx.B.DIVM. More...
enum IfxDsadc_RectifierSignSource {
IfxDsadc_RectifierSignSource_onChipGenerator = 0,
IfxDsadc_RectifierSignSource_nextChannel = 1,
IfxDsadc_RectifierSignSource_externalA = 2,
IfxDsadc_RectifierSignSource_externalB = 3
}
Rectifier sign source
Selects the sign signal that is to be delayed.
Definition in Ifx_DSADC.RECT.B.SSRC. More...
enum IfxDsadc_SampleClockSource {
IfxDsadc_SampleClockSource_internal = 0,
IfxDsadc_SampleClockSource_inputA = 1,
IfxDsadc_SampleClockSource_inputB = 2,
IfxDsadc_SampleClockSource_inputC = 3
}
Demodulator sample clock source select
Definition in Ifx_DSADC.DICFG.B.CSRC. More...
enum IfxDsadc_SampleStrobe {
IfxDsadc_SampleStrobe_noDataStrobe = 0,
IfxDsadc_SampleStrobe_sampleOnRisingEdge = 1,
IfxDsadc_SampleStrobe_sampleOnFallingEdge = 2,
IfxDsadc_SampleStrobe_sampleOnBothEdges = 3,
IfxDsadc_SampleStrobe_reserved = 4,
IfxDsadc_SampleStrobe_sampleOnTwoRisingEdges = 5,
IfxDsadc_SampleStrobe_sampleOnTwoFallingEdges = 6
}
Demodulator data strobe generation mode
Definition in Ifx_DSADC.DICFG.B.STROBE. More...
enum IfxDsadc_SleepMode {
IfxDsadc_SleepMode_enable = 0,
IfxDsadc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_DSADC.CLC.B.EDIS. More...
enum IfxDsadc_TimestampTrigger {
IfxDsadc_TimestampTrigger_noTrigger = 0,
IfxDsadc_TimestampTrigger_fallingEdge = 1,
IfxDsadc_TimestampTrigger_risingEdge = 2,
IfxDsadc_TimestampTrigger_eachEdge = 3
}
Timestamp trigger mode
Definition in Ifx_DSADC.DICFG.B.TSTRMODE. More...
enum IfxDsadc_TriggerInput {
IfxDsadc_TriggerInput_a = 0,
IfxDsadc_TriggerInput_b = 1,
IfxDsadc_TriggerInput_c = 2,
IfxDsadc_TriggerInput_d = 3,
IfxDsadc_TriggerInput_e = 4,
IfxDsadc_TriggerInput_f = 5,
IfxDsadc_TriggerInput_g = 6,
IfxDsadc_TriggerInput_h = 7
}
Trigger select
Definition in Ifx_DSADC.DICFG.B.TRSEL. More...

Detailed Description

Enumeration Type Documentation

◆ IfxDsadc_AuxCombFilterShift

enum IfxDsadc_AuxCombFilterShift

Comb Filter (auxiliary) shift control
Definition in Ifx_DSADC.FCFGA.B.AFSC.

Enumerator
IfxDsadc_AuxCombFilterShift_noShift | no shift, use full range
IfxDsadc_AuxCombFilterShift_shiftBy1 | Shift by 1.
IfxDsadc_AuxCombFilterShift_shiftBy2 | Shift by 2.
IfxDsadc_AuxCombFilterShift_shiftBy3 | Shift by 3.

Definition at line 76 of file IfxDsadc.h.

◆ IfxDsadc_AuxCombFilterType

enum IfxDsadc_AuxCombFilterType

Comb Filter (auxiliary) configuration/type
Definition in Ifx_DSADC.FCFGA.B.CFAC.

Enumerator
IfxDsadc_AuxCombFilterType_comb1 | CIC1.
IfxDsadc_AuxCombFilterType_comb2 | CIC2.
IfxDsadc_AuxCombFilterType_comb3 | CIC3.
IfxDsadc_AuxCombFilterType_combF | CICF.

Definition at line 87 of file IfxDsadc.h.

◆ IfxDsadc_AuxEvent

enum IfxDsadc_AuxEvent

Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.ESEL.

Enumerator
IfxDsadc_AuxEvent_everyNewResult | Always, for each new result value.
IfxDsadc_AuxEvent_insideBoundary | If result is inside the boundary band.
IfxDsadc_AuxEvent_outsideBoundary | If result is outside the boundary band.

Definition at line 98 of file IfxDsadc.h.

◆ IfxDsadc_AuxGate

enum IfxDsadc_AuxGate

Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.EGT.

Enumerator
IfxDsadc_AuxGate_definedByESEL | Separate: generate events according to ESEL.
IfxDsadc_AuxGate_coupledToIntegrator | Coupled: generate events only when the integrator is enabled and after the discard phase defined by bitfield NVALDIS.

Definition at line 108 of file IfxDsadc.h.

◆ IfxDsadc_AuxServiceRequest

enum IfxDsadc_AuxServiceRequest

Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.SRGA.

Enumerator
IfxDsadc_AuxServiceRequest_never | Never, service requests disabled.
IfxDsadc_AuxServiceRequest_auxFilter | Auxiliary filter: As selected by bitfield ESEL (IfxDsadc_AuxEvent)
IfxDsadc_AuxServiceRequest_altSource | Alternate source: Capturing of a sign delay value to register CGSYNCx (x = 0 - 5)

Definition at line 117 of file IfxDsadc.h.

◆ IfxDsadc_CarrierWaveformMode

enum IfxDsadc_CarrierWaveformMode

Carrier generation mode
Definition in Ifx_DSADC.CGCFG.B.CGMOD.

Enumerator
IfxDsadc_CarrierWaveformMode_stopped | Carrier Generator stopped.
IfxDsadc_CarrierWaveformMode_square | Carrier Generator generates square wave.
IfxDsadc_CarrierWaveformMode_triangle | Carrier Generator generates triangle wave.
IfxDsadc_CarrierWaveformMode_sine | Carrier Generator generates sine wave.

Definition at line 127 of file IfxDsadc.h.

◆ IfxDsadc_ChannelId

enum IfxDsadc_ChannelId

Specifies the channel Index.

Enumerator
IfxDsadc_ChannelId_0 | Specifies the channel Index 0.
IfxDsadc_ChannelId_2 | Specifies the channel Index 2.
IfxDsadc_ChannelId_3 | Specifies the channel Index 3.

Definition at line 137 of file IfxDsadc.h.

◆ IfxDsadc_CommonModeVoltage

enum IfxDsadc_CommonModeVoltage

Modulator common mode voltage selection
Definition in Ifx_DSADC.MODCFGx.B.CMVS.

Enumerator
IfxDsadc_CommonModeVoltage_a | VCM = VAREF / 3.03 (1.65 V for VAREF = 5.0 V), recommended for VDDM = 3.3 V1.65V.
IfxDsadc_CommonModeVoltage_b | VCM = VAREF / 2.27 (2.2 V for VAREF = 5.0 V), recommended for low distortion of AC-coupled signals.
IfxDsadc_CommonModeVoltage_c | VCM = VAREF / 2.0 (2.5 V for VAREF = 5.0 V), recommended for DC-coupled signals.

Definition at line 147 of file IfxDsadc.h.

◆ IfxDsadc_FirDataShift

enum IfxDsadc_FirDataShift

FIR data shift control
Selects the displacement caused by the data shifter at the FIR filter output
Definition in Ifx_DSADC.FCFGM.B.DSH.

Enumerator
IfxDsadc_FirDataShift_noShift | no shift, use full range
IfxDsadc_FirDataShift_shiftBy1 | Shift by 1.
IfxDsadc_FirDataShift_shiftBy2 | Shift by 2.
IfxDsadc_FirDataShift_shiftBy3 | Shift by 3.

Definition at line 158 of file IfxDsadc.h.

◆ IfxDsadc_FirInternalShift

enum IfxDsadc_FirInternalShift

FIR shift control
Selects the displacement caused by the data shifter inbetween the FIR filter blocks.
Definition in Ifx_DSADC.FCFGM.B.FSH.

Enumerator
IfxDsadc_FirInternalShift_noShift | no shift, use full range
IfxDsadc_FirInternalShift_shiftBy1 | Shift by 1.

Definition at line 170 of file IfxDsadc.h.

◆ IfxDsadc_InputConfig

enum IfxDsadc_InputConfig

Modulator configuration of positive/negative input line
Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN.

Enumerator
IfxDsadc_InputConfig_inputPin | Modulator input connected to external pin.
IfxDsadc_InputConfig_supplyVoltage | Modulator input connected to supply voltage V_ddm.
IfxDsadc_InputConfig_commonModeVoltage | Modulator input connected to common mode voltage V_cm.
IfxDsadc_InputConfig_referenceGround | Modulator input connected to reference ground V_ref.

Definition at line 179 of file IfxDsadc.h.

◆ IfxDsadc_InputDataSource

enum IfxDsadc_InputDataSource

Demodulator input data source selection
Definition in Ifx_DSADC.DICFG.B.DSRC.

Enumerator
IfxDsadc_InputDataSource_onChipStandAlone | On-chip modulator, standalone (3rd order)
IfxDsadc_InputDataSource_onChipCombined | On-chip modulator, yield (2nd order)
IfxDsadc_InputDataSource_directInputA | External, from input A, direct.
IfxDsadc_InputDataSource_invertedInputA | External, from input A, inverted.
IfxDsadc_InputDataSource_directInputB | External, from input B, direct.
IfxDsadc_InputDataSource_invertedInputB | External, from input B, inverted.

Definition at line 190 of file IfxDsadc.h.

◆ IfxDsadc_InputGain

enum IfxDsadc_InputGain

Modulator gain select of analog input path
Definition in Ifx_DSADC.MODCFGx.B.GAINSEL.

Enumerator
IfxDsadc_InputGain_factor1 | Input gain factor: 1.
IfxDsadc_InputGain_factor2 | Input gain factor: 2.
IfxDsadc_InputGain_factor4 | Input gain factor: 4.
IfxDsadc_InputGain_factor8 | Input gain factor: 8.
IfxDsadc_InputGain_factor16 | Input gain factor: 16.

Definition at line 203 of file IfxDsadc.h.

◆ IfxDsadc_InputPin

enum IfxDsadc_InputPin

Modulator input pin selection
Definition in Ifx_DSADC.MODCFGx.B.INMUX.

Enumerator
IfxDsadc_InputPin_a | Pin A connected to modulator input.
IfxDsadc_InputPin_b | Pin B connected to modulator input.
IfxDsadc_InputPin_c | Pin C connected to modulator input.
IfxDsadc_InputPin_d | Pin D connected to modulator input.

Definition at line 215 of file IfxDsadc.h.

◆ IfxDsadc_IntegrationWindowSize

enum IfxDsadc_IntegrationWindowSize

Integrator window size
Definition in Ifx_DSADC.IWCTR.B.IWS.

Enumerator
IfxDsadc_IntegrationWindowSize_internalControl | Internal control: stop integrator after REPVAL+1 integration cycles.
IfxDsadc_IntegrationWindowSize_externalControl | External control: stop integrator when bit INTEN becomes 0.

Definition at line 226 of file IfxDsadc.h.

◆ IfxDsadc_IntegratorTrigger

enum IfxDsadc_IntegratorTrigger

Integrator trigger mode
NOTE: switch-first to bypassed before using other mode
Definition in Ifx_DSADC.DICFG.B.ITRMODE.

Enumerator
IfxDsadc_IntegratorTrigger_bypassed | No integration trigger, integrator bypassed.
IfxDsadc_IntegratorTrigger_fallingEdge | Trigger event upon a falling edge.
IfxDsadc_IntegratorTrigger_risingEdge | Trigger event upon a rising edge.
IfxDsadc_IntegratorTrigger_alwaysActive | No trigger, integrator active all the time.

Definition at line 236 of file IfxDsadc.h.

◆ IfxDsadc_LowPowerSupply

enum IfxDsadc_LowPowerSupply

Low power supply voltage select
Definition in Ifx_DSADC.GLOBCFG.B.LOSUP.

Enumerator
IfxDsadc_LowPowerSupply_5V | Supply Voltage for Analog Circuitry set to 5V.
IfxDsadc_LowPowerSupply_3_3V | Supply Voltage for Analog Circuitry set to 3.3V.

Definition at line 247 of file IfxDsadc.h.

◆ IfxDsadc_MainCombFilterShift

enum IfxDsadc_MainCombFilterShift

Comb Filter (Main Chain) shift control
Definition in Ifx_DSADC.FCFGC.B.MFSC.

Enumerator
IfxDsadc_MainCombFilterShift_noShift | no shift, use full range
IfxDsadc_MainCombFilterShift_shiftBy1 | Shift by 1.
IfxDsadc_MainCombFilterShift_shiftBy2 | Shift by 2.
IfxDsadc_MainCombFilterShift_shiftBy3 | Shift by 3.

Definition at line 256 of file IfxDsadc.h.

◆ IfxDsadc_MainCombFilterType

enum IfxDsadc_MainCombFilterType

Comb Filter (Main Chain) configuration/type
Definition in Ifx_DSADC.FCFGC.B.CFMC.

Enumerator
IfxDsadc_MainCombFilterType_comb1 | CIC1.
IfxDsadc_MainCombFilterType_comb2 | CIC2.
IfxDsadc_MainCombFilterType_comb3 | CIC3.
IfxDsadc_MainCombFilterType_combF | CICF.

Definition at line 267 of file IfxDsadc.h.

◆ IfxDsadc_MainServiceRequest

enum IfxDsadc_MainServiceRequest

Service request generation (main chain)
Definition in Ifx_DSADC.FCFGC.B.SRGM.

Enumerator
IfxDsadc_MainServiceRequest_never | Never, service requests disabled.
IfxDsadc_MainServiceRequest_highGateSignal | While gate (selected trigger signal) is high.
IfxDsadc_MainServiceRequest_lowGateSignal | While gate (selected trigger signal) is low.
IfxDsadc_MainServiceRequest_everyNewResult | Always, for each new result value.

Definition at line 278 of file IfxDsadc.h.

◆ IfxDsadc_ModulatorClock

enum IfxDsadc_ModulatorClock

Modulator clock select
Definition in Ifx_DSADC.GLOBCFG.B.MCSEL.

Enumerator
IfxDsadc_ModulatorClock_off | Internal clock off, no source selected.
IfxDsadc_ModulatorClock_fDSD | f_dsd clock selected
IfxDsadc_ModulatorClock_fERAY | f_eray clock selected
IfxDsadc_ModulatorClock_fOSC0 | f_osc0 clock selected

Definition at line 289 of file IfxDsadc.h.

◆ IfxDsadc_ModulatorClockDivider

enum IfxDsadc_ModulatorClockDivider

Modulator divider factor for modulator clock
Definition in Ifx_DSADC.MODCFGx.B.DIVM.

Enumerator
IfxDsadc_ModulatorClockDivider_div2 | f_mod = f_clk / 2
IfxDsadc_ModulatorClockDivider_div4 | f_mod = f_clk / 4
IfxDsadc_ModulatorClockDivider_div6 | f_mod = f_clk / 6
IfxDsadc_ModulatorClockDivider_div8 | f_mod = f_clk / 8
IfxDsadc_ModulatorClockDivider_div10 | f_mod = f_clk / 10
IfxDsadc_ModulatorClockDivider_div12 | f_mod = f_clk / 12
IfxDsadc_ModulatorClockDivider_div14 | f_mod = f_clk / 14
IfxDsadc_ModulatorClockDivider_div16 | f_mod = f_clk / 16
IfxDsadc_ModulatorClockDivider_div18 | f_mod = f_clk / 18
IfxDsadc_ModulatorClockDivider_div20 | f_mod = f_clk / 20
IfxDsadc_ModulatorClockDivider_div22 | f_mod = f_clk / 22
IfxDsadc_ModulatorClockDivider_div24 | f_mod = f_clk / 24
IfxDsadc_ModulatorClockDivider_div26 | f_mod = f_clk / 26
IfxDsadc_ModulatorClockDivider_div28 | f_mod = f_clk / 28
IfxDsadc_ModulatorClockDivider_div30 | f_mod = f_clk / 30
IfxDsadc_ModulatorClockDivider_div32 | f_mod = f_clk / 32

Definition at line 300 of file IfxDsadc.h.

◆ IfxDsadc_RectifierSignSource

enum IfxDsadc_RectifierSignSource

Rectifier sign source
Selects the sign signal that is to be delayed.
Definition in Ifx_DSADC.RECT.B.SSRC.

Enumerator
IfxDsadc_RectifierSignSource_onChipGenerator | On-chip carrier generator.
IfxDsadc_RectifierSignSource_nextChannel | Sign of result of next channel.
IfxDsadc_RectifierSignSource_externalA | External sign signal A.
IfxDsadc_RectifierSignSource_externalB | External sign signal B.

Definition at line 324 of file IfxDsadc.h.

◆ IfxDsadc_SampleClockSource

enum IfxDsadc_SampleClockSource

Demodulator sample clock source select
Definition in Ifx_DSADC.DICFG.B.CSRC.

Enumerator
IfxDsadc_SampleClockSource_internal | Internal clock.
IfxDsadc_SampleClockSource_inputA | External clock, from Input A.
IfxDsadc_SampleClockSource_inputB | External clock, from Input B.
IfxDsadc_SampleClockSource_inputC | External clock, from Input C.

Definition at line 335 of file IfxDsadc.h.

◆ IfxDsadc_SampleStrobe

enum IfxDsadc_SampleStrobe

Demodulator data strobe generation mode
Definition in Ifx_DSADC.DICFG.B.STROBE.

Enumerator
IfxDsadc_SampleStrobe_noDataStrobe | No data strobe.
IfxDsadc_SampleStrobe_sampleOnRisingEdge | Direct clock, a sample trigger is generated at each rising clock edge.
IfxDsadc_SampleStrobe_sampleOnFallingEdge | Direct clock, a sample trigger is generated at each falling clock edge.
IfxDsadc_SampleStrobe_sampleOnBothEdges | Double data, a sample trigger is generated at each rising and falling clock edge.
IfxDsadc_SampleStrobe_reserved | don't use
IfxDsadc_SampleStrobe_sampleOnTwoRisingEdges | Double clock, a sample trigger is generated at every 2nd rising clock edge.
IfxDsadc_SampleStrobe_sampleOnTwoFallingEdges | Double clock, a sample trigger is generated at every 2nd falling clock edge.

Definition at line 346 of file IfxDsadc.h.

◆ IfxDsadc_SleepMode

enum IfxDsadc_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_DSADC.CLC.B.EDIS.

Enumerator
IfxDsadc_SleepMode_enable | enables sleep mode
IfxDsadc_SleepMode_disable | disables sleep mode

Definition at line 360 of file IfxDsadc.h.

◆ IfxDsadc_TimestampTrigger

enum IfxDsadc_TimestampTrigger

Timestamp trigger mode
Definition in Ifx_DSADC.DICFG.B.TSTRMODE.

Enumerator
IfxDsadc_TimestampTrigger_noTrigger | No timestamp trigger.
IfxDsadc_TimestampTrigger_fallingEdge | Trigger event upon a falling edge.
IfxDsadc_TimestampTrigger_risingEdge | Trigger event upon a rising edge.
IfxDsadc_TimestampTrigger_eachEdge | Trigger event upon each edge.

Definition at line 369 of file IfxDsadc.h.

◆ IfxDsadc_TriggerInput

enum IfxDsadc_TriggerInput

Trigger select
Definition in Ifx_DSADC.DICFG.B.TRSEL.

Enumerator
IfxDsadc_TriggerInput_a | dsadc trig 0
IfxDsadc_TriggerInput_b | dsadc trig 1
IfxDsadc_TriggerInput_c | vadc trig 0
IfxDsadc_TriggerInput_d | vadc trig 1
IfxDsadc_TriggerInput_e | external pin e
IfxDsadc_TriggerInput_f | external pin f
IfxDsadc_TriggerInput_g |
IfxDsadc_TriggerInput_h |

Definition at line 380 of file IfxDsadc.h.


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » DSADC » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxDsadc_setSleepMode (Ifx_DSADC *dsadc, IfxDsadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxDsadc_startScan (Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels. More...
IFX_INLINE void | IfxDsadc_stopScan (Ifx_DSADC *dsadc, uint32 modulatorMask)
Disables the conversion of multiple channels. More...
IFX_EXTERN void | IfxDsadc_resetModule (Ifx_DSADC *dsadc)
resets the DSADC kernel More...

Detailed Description

Function Documentation

◆ IfxDsadc_resetModule()

IFX_EXTERN void IfxDsadc_resetModule ( Ifx_DSADC * dsadc )

resets the DSADC kernel

Parameters
dsadc pointer to DSADC registers
Returns
None

Definition at line 158 of file IfxDsadc.c.

◆ IfxDsadc_setSleepMode()

IFX_INLINE void IfxDsadc_setSleepMode | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
dsadc | pointer to DSADC registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 736 of file IfxDsadc.h.

◆ IfxDsadc_startScan()

IFX_INLINE void IfxDsadc_startScan | ( | Ifx_DSADC * | dsadc,
 |  | uint32 | modulatorMask,
 |  | uint32 | channelMask
 | ) |  |

Enables the conversion of multiple channels.

Parameters
dsadc | Pointer to the DSADC register space
modulatorMask | the modulator which should be running (bitwise selection)
channelMask | the channels which should be scanned (bitwise selection)
Returns
None
// enable the conversion of all 6 DSADC channels
IfxDsadc_startScan(&MODULE_DSADC, 0x3FU, 0x3FU);
// results are now available in IFXDSADC(ds).CH[x].RESM.B.RESULT (x=0..5)

Definition at line 745 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_startScan(), and IfxDsadc_Rdc_startConversion().

◆ IfxDsadc_stopScan()

IFX_INLINE void IfxDsadc_stopScan | ( | Ifx_DSADC * | dsadc,
 |  | uint32 | modulatorMask
 | ) |  |

Disables the conversion of multiple channels.

Parameters
dsadc | Pointer to the DSADC register space
modulatorMask | the modulator which should be disabled (bitwise selection)
Returns
None
// disable the modulators of all 6 DSADC channels
IfxDsadc_stopScan(&MODULE_DSADC, 0x3FU);

Definition at line 751 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_stopScan().


iLLD_TC26B: Support Functions

Functions
Support Functions
iLLD » DSADC » Standard Driver
Collaboration diagram for Support Functions:

Functions

IFX_INLINE sint16 | IfxDsadc_getAuxResult (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the auxiliary chain. More...
IFX_INLINE uint16 | IfxDsadc_getMainCombDecimation (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the main comb decimation factor. More...
IFX_INLINE sint16 | IfxDsadc_getMainResult (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the main chain. More...
IFX_INLINE boolean | IfxDsadc_isModuleEnabled (Ifx_DSADC *dsadc)
Return TRUE if DSADC module is enabled. More...
IFX_INLINE void | IfxDsadc_setCarrierMode (Ifx_DSADC *dsadc, IfxDsadc_CarrierWaveformMode waveformMode)
Set the carrier waveform mode. More...
IFX_EXTERN float32 | IfxDsadc_getIntegratorOutFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the integrator output in Hz. More...
IFX_EXTERN float32 | IfxDsadc_getMainCombOutFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the main COMB filter output in Hz. More...
IFX_EXTERN float32 | IfxDsadc_getMainGroupDelay (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Estimate the group delay of main-chain filters in seconds. More...
IFX_EXTERN float32 | IfxDsadc_getModulatorClockFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the modulator clock frequency in Hz. More...
IFX_EXTERN float32 | IfxDsadc_getModulatorInputClockFreq (Ifx_DSADC *dsadc)
Get the input frequency of DSADC in Hz. More...

Detailed Description

Function Documentation

◆ IfxDsadc_getAuxResult()

IFX_INLINE sint16 IfxDsadc_getAuxResult | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Get result from the auxiliary chain.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
result from the auxiliary chain

Definition at line 629 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_getAuxResult().

◆ IfxDsadc_getIntegratorOutFreq()

IFX_EXTERN float32 IfxDsadc_getIntegratorOutFreq | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Get the sample frequency of the integrator output in Hz.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
frequency in Hz

Definition at line 58 of file IfxDsadc.c.

Referenced by IfxDsadc_Rdc_getUpdatePeriod().

◆ IfxDsadc_getMainCombDecimation()

IFX_INLINE uint16 IfxDsadc_getMainCombDecimation | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Get the main comb decimation factor.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
the main comb decimation factor

Definition at line 635 of file IfxDsadc.h.

◆ IfxDsadc_getMainCombOutFreq()

IFX_EXTERN float32 IfxDsadc_getMainCombOutFreq | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Get the sample frequency of the main COMB filter output in Hz.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
frequency in Hz

Definition at line 79 of file IfxDsadc.c.

Referenced by IfxDsadc_getIntegratorOutFreq().

◆ IfxDsadc_getMainGroupDelay()

IFX_EXTERN float32 IfxDsadc_getMainGroupDelay | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Estimate the group delay of main-chain filters in seconds.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
delay in seconds

Definition at line 87 of file IfxDsadc.c.

Referenced by IfxDsadc_Rdc_calculateGroupDelay().

◆ IfxDsadc_getMainResult()

IFX_INLINE sint16 IfxDsadc_getMainResult | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Get result from the main chain.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
result from the main chain

Definition at line 641 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_getMainResult(), and IfxDsadc_Rdc_onEventA().

◆ IfxDsadc_getModulatorClockFreq()

IFX_EXTERN float32 IfxDsadc_getModulatorClockFreq | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Get the modulator clock frequency in Hz.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
frequency in Hz

Definition at line 126 of file IfxDsadc.c.

Referenced by IfxDsadc_getMainCombOutFreq(), and IfxDsadc_getMainGroupDelay().

◆ IfxDsadc_getModulatorInputClockFreq()

IFX_EXTERN float32 IfxDsadc_getModulatorInputClockFreq ( Ifx_DSADC * dsadc )

Get the input frequency of DSADC in Hz.

Parameters
dsadc Pointer to the DSADC register space
Returns
frequency in Hz

Definition at line 134 of file IfxDsadc.c.

Referenced by IfxDsadc_Dsadc_initCarrierGen(), IfxDsadc_Dsadc_initModulator(), and IfxDsadc_getModulatorClockFreq().

◆ IfxDsadc_isModuleEnabled()

IFX_INLINE boolean IfxDsadc_isModuleEnabled ( Ifx_DSADC * dsadc )

Return TRUE if DSADC module is enabled.

Parameters
dsadc Pointer to the DSADC register space
Returns
TRUE if DSADC module is enabled

Definition at line 724 of file IfxDsadc.h.

◆ IfxDsadc_setCarrierMode()

IFX_INLINE void IfxDsadc_setCarrierMode | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_CarrierWaveformMode | waveformMode
 | ) |  |

Set the carrier waveform mode.

Parameters
dsadc | Pointer to the DSADC register space
waveformMode | the waveform mode
Returns
None

Definition at line 730 of file IfxDsadc.h.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » DSADC » Standard Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxDsadc_getAuxSrc (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Address/pointer to the interrupt source register. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxDsadc_getMainSrc (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the interrupt source register for a Main event. More...

Detailed Description

Function Documentation

◆ IfxDsadc_getAuxSrc()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxDsadc_getAuxSrc | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Address/pointer to the interrupt source register.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
Address/pointer to the interrupt source register

Definition at line 52 of file IfxDsadc.c.

Referenced by IfxDsadc_Dsadc_getAuxSrc().

◆ IfxDsadc_getMainSrc()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxDsadc_getMainSrc | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Get the interrupt source register for a Main event.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
Address/pointer to the interrupt source register

Definition at line 120 of file IfxDsadc.c.

Referenced by IfxDsadc_Dsadc_getMainSrc().


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » DSADC » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxDsadc_initCgPwmPin (const IfxDsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a CGPWM output. More...
IFX_INLINE void | IfxDsadc_initCinPin (const IfxDsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver)
Initializes a CIN input. More...
IFX_INLINE void | IfxDsadc_initCoutPin (const IfxDsadc_Cout_Out *cout, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a COUT output. More...
IFX_INLINE void | IfxDsadc_initDinPin (const IfxDsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver)
Initializes a DIN input. More...
IFX_INLINE void | IfxDsadc_initDsnPin (const IfxDsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input. More...
IFX_INLINE void | IfxDsadc_initDspPin (const IfxDsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input. More...
IFX_INLINE void | IfxDsadc_initItrPin (const IfxDsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver)
Initializes a ITR input. More...
IFX_INLINE void | IfxDsadc_initSgPin (const IfxDsadc_Sg_In *sg, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SG input. More...

Detailed Description

Function Documentation

◆ IfxDsadc_initCgPwmPin()

IFX_INLINE void IfxDsadc_initCgPwmPin | ( | const IfxDsadc_Cgpwm_Out * | cgPwm,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a CGPWM output.

Parameters
cgPwm | the CGPWM Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 647 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_initCarrierGen().

◆ IfxDsadc_initCinPin()

IFX_INLINE void IfxDsadc_initCinPin | ( | const IfxDsadc_Cin_In * | cIn,
 |  | IfxPort_InputMode | cInMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a CIN input.

Parameters
cIn | the CIN Pin which should be configured
cInMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 654 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_initCoutPin()

IFX_INLINE void IfxDsadc_initCoutPin | ( | const IfxDsadc_Cout_Out * | cout,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a COUT output.

Parameters
cout | the COUT Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 664 of file IfxDsadc.h.

◆ IfxDsadc_initDinPin()

IFX_INLINE void IfxDsadc_initDinPin | ( | const IfxDsadc_Din_In * | dIn,
 |  | IfxPort_InputMode | dInMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a DIN input.

Parameters
dIn | the DIN Pin which should be configured
dInMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 674 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_initDsnPin()

IFX_INLINE void IfxDsadc_initDsnPin | ( | const IfxDsadc_Dsn_In * | dsn,
 |  | IfxPort_InputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a DS input.

Parameters
dsn | the DSN Pin which should be configured
pinMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 684 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_initDspPin()

IFX_INLINE void IfxDsadc_initDspPin | ( | const IfxDsadc_Dsp_In * | dsp,
 |  | IfxPort_InputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a DS input.

Parameters
dsp | the DSP Pin which should be configured
pinMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 694 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_initItrPin()

IFX_INLINE void IfxDsadc_initItrPin | ( | const IfxDsadc_Itr_In * | itr,
 |  | IfxPort_InputMode | itrMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a ITR input.

Parameters
itr | the ITR Pin which should be configured
itrMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 704 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_initSgPin()

IFX_INLINE void IfxDsadc_initSgPin | ( | const IfxDsadc_Sg_In * | sg,
 |  | IfxPort_InputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SG input.

Parameters
sg | the SG Pin which should be configured
pinMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 714 of file IfxDsadc.h.


iLLD_TC26B: DSADC Pin Mapping

Data Structures | Macros | Variables
DSADC Pin Mapping
iLLD » DSADC
Collaboration diagram for DSADC Pin Mapping:

Data Structures

struct | IfxDsadc_Dsn_In
DS negative pin mapping structure. More...
struct | IfxDsadc_Dsp_In
DS positive pin mapping structure. More...
struct | IfxDsadc_Cin_In
CIN pin mapping structure. More...
struct | IfxDsadc_Din_In
DIN pin mapping structure. More...
struct | IfxDsadc_Itr_In
ITR pin mapping structure. More...
struct | IfxDsadc_Cgpwm_Out
CGPWM pin mapping structure. More...
struct | IfxDsadc_Sg_In
SG pin mapping structure. More...
struct | IfxDsadc_Cout_Out
COUT pin mapping structure. More...

Macros

#define | IFXDSADC_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXDSADC_PINMAP_NUM_CHANNELS 4
#define | IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS 6
#define | IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS 2
#define | IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS 3
#define | IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS 2
#define | IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS 4
#define | IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS 4
#define | IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS 6
#define | IFXDSADC_PINMAP_SG_IN_NUM_ITEMS 2

Variables

IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT
DSADC_CGPWMN: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT
DSADC_CGPWMN: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT
DSADC_CGPWMN: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT
DSADC_CGPWMP: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT
DSADC_CGPWMP: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT
DSADC_CGPWMP: DSADC output. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN
DSADC_CIN0A: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN
DSADC_CIN0B: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN
DSADC_CIN2A: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN
DSADC_CIN2B: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN
DSADC_CIN3A: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN
DSADC_CIN3B: DSADC input. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT
DSADC_COUT0: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT
DSADC_COUT0: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT
DSADC_COUT0: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT
DSADC_COUT2: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT
DSADC_COUT2: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT
DSADC_COUT3: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT
DSADC_COUT3: DSADC output. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN
DSADC_DIN0A: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN
DSADC_DIN0B: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN
DSADC_DIN2A: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN
DSADC_DIN2B: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN
DSADC_DIN3A: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN
DSADC_DIN3B: DSADC input. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN
DSADC_DS0NA: DSADC: negative analog input channel of DSADC 0 pin A. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN
DSADC_DS0NB: DSADC: negative analog input channel of DSADC 0 pin B. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN
DSADC_DS2NA: DSADC: negative analog input channel of DSADC 2 pin A. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN
DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3 pin A. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN
DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3, pin A. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN
DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3 pin B. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN
DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3, pin B. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN
DSADC_DS3NC: DSADC: negative analog input channel of DSADC 3 pin C. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN
DSADC_DS3ND: DSADC: negative analog input channel of DSADC 3 pin D. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN
DSADC_DS0PA: DSADC: positive analog input channel of DSADC 0 pin A. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN
DSADC_DS0PB: DSADC: positive analog input channel of DSADC 0 pin B. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN
DSADC_DS2PA: DSADC: positive analog input channel of DSADC 2 pin A. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN
DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3 pin A. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN
DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3, pin A. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN
DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3 pin B. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN
DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3, pin B. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN
DSADC_DS3PC: DSADC: positive analog input channel of DSADC 3 pin C. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN
DSADC_DS3PD: DSADC: positive analog input channel of DSADC 3 pin D. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN
DSADC_ITR0E: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN
DSADC_ITR0F: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN
DSADC_ITR2E: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN
DSADC_ITR2F: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN
DSADC_ITR3E: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN
DSADC_ITR3F: DSADC input. More...
IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN
DSADC_SGNA: DSADC input. More...
IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN
DSADC_SGNB: DSADC input. More...
IFX_EXTERN const IfxDsadc_Cgpwm_Out * | IfxDsadc_Cgpwm_Out_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
IfxDsadc_Cgpwm_Out table. More...
IFX_EXTERN const IfxDsadc_Cin_In * | IfxDsadc_Cin_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS]
IfxDsadc_Cin_In table. More...
IFX_EXTERN const IfxDsadc_Cout_Out * | IfxDsadc_Cout_Out_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS]
IfxDsadc_Cout_Out table. More...
IFX_EXTERN const IfxDsadc_Din_In * | IfxDsadc_Din_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS]
IfxDsadc_Din_In table. More...
IFX_EXTERN const IfxDsadc_Dsn_In * | IfxDsadc_Dsn_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS]
IfxDsadc_Dsn_In table. More...
IFX_EXTERN const IfxDsadc_Dsp_In * | IfxDsadc_Dsp_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS]
IfxDsadc_Dsp_In table. More...
IFX_EXTERN const IfxDsadc_Itr_In * | IfxDsadc_Itr_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS]
IfxDsadc_Itr_In table. More...
IFX_EXTERN const IfxDsadc_Sg_In * | IfxDsadc_Sg_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS]
IfxDsadc_Sg_In table. More...

Detailed Description

Data Structure Documentation

◆ IfxDsadc_Dsn_In

struct IfxDsadc_Dsn_In

DS negative pin mapping structure.

Definition at line 56 of file IfxDsadc_PinMap.h.

Collaboration diagram for IfxDsadc_Dsn_In:
[legend]
Data Fields
uint8 | channel | Channel number.
Ifx_DSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxDsadc_Dsp_In

struct IfxDsadc_Dsp_In

DS positive pin mapping structure.

Definition at line 65 of file IfxDsadc_PinMap.h.

Collaboration diagram for IfxDsadc_Dsp_In:
[legend]
Data Fields
uint8 | channel | Channel number.
Ifx_DSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxDsadc_Cin_In

struct IfxDsadc_Cin_In

CIN pin mapping structure.

Definition at line 74 of file IfxDsadc_PinMap.h.

Collaboration diagram for IfxDsadc_Cin_In:
[legend]
Data Fields
uint8 | channel | Channel number.
Ifx_DSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxDsadc_Din_In

struct IfxDsadc_Din_In

DIN pin mapping structure.

Definition at line 83 of file IfxDsadc_PinMap.h.

Collaboration diagram for IfxDsadc_Din_In:
[legend]
Data Fields
uint8 | channel | Channel number.
Ifx_DSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxDsadc_Itr_In

struct IfxDsadc_Itr_In

ITR pin mapping structure.

Definition at line 92 of file IfxDsadc_PinMap.h.

Collaboration diagram for IfxDsadc_Itr_In:
[legend]
Data Fields
uint8 | channel | Channel number.
Ifx_DSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxDsadc_Cgpwm_Out

struct IfxDsadc_Cgpwm_Out

CGPWM pin mapping structure.

Definition at line 101 of file IfxDsadc_PinMap.h.

Collaboration diagram for IfxDsadc_Cgpwm_Out:
[legend]
Data Fields
Ifx_DSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxDsadc_Sg_In

struct IfxDsadc_Sg_In

SG pin mapping structure.

Definition at line 109 of file IfxDsadc_PinMap.h.

Collaboration diagram for IfxDsadc_Sg_In:
[legend]
Data Fields
Ifx_DSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxDsadc_Cout_Out

struct IfxDsadc_Cout_Out

COUT pin mapping structure.

Definition at line 117 of file IfxDsadc_PinMap.h.

Collaboration diagram for IfxDsadc_Cout_Out:
[legend]
Data Fields
uint8 | channel | Channel number.
Ifx_DSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS

#define IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS 6

Definition at line 180 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS

#define IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS 2

Definition at line 181 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS

#define IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS 3

Definition at line 182 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS

#define IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS 2

Definition at line 183 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS

#define IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS 4

Definition at line 184 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS

#define IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS 4

Definition at line 185 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS

#define IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS 6

Definition at line 186 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_NUM_CHANNELS

#define IFXDSADC_PINMAP_NUM_CHANNELS 4

Definition at line 179 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_NUM_MODULES

#define IFXDSADC_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 178 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_SG_IN_NUM_ITEMS

#define IFXDSADC_PINMAP_SG_IN_NUM_ITEMS 2

Definition at line 187 of file IfxDsadc_PinMap.h.

Variable Documentation

◆ IfxDsadc_Cgpwm_Out_pinTable

IFX_EXTERN const IfxDsadc_Cgpwm_Out* IfxDsadc_Cgpwm_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]

IfxDsadc_Cgpwm_Out table.

Definition at line 191 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CGPWMN_P00_5_OUT

IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT

DSADC_CGPWMN: DSADC output.

Definition at line 125 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CGPWMN_P02_0_OUT

IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT

DSADC_CGPWMN: DSADC output.

Definition at line 126 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CGPWMN_P33_11_OUT

IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT

DSADC_CGPWMN: DSADC output.

Definition at line 127 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CGPWMP_P00_6_OUT

IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT

DSADC_CGPWMP: DSADC output.

Definition at line 128 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CGPWMP_P02_1_OUT

IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT

DSADC_CGPWMP: DSADC output.

Definition at line 129 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CGPWMP_P33_12_OUT

IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT

DSADC_CGPWMP: DSADC output.

Definition at line 130 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CIN0A_P00_1_IN

IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN

DSADC_CIN0A: DSADC input.

Definition at line 131 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CIN0B_P33_5_IN

IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN

DSADC_CIN0B: DSADC input.

Definition at line 132 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CIN2A_P00_5_IN

IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN

DSADC_CIN2A: DSADC input.

Definition at line 133 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CIN2B_P33_1_IN

IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN

DSADC_CIN2B: DSADC input.

Definition at line 134 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CIN3A_P00_3_IN

IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN

DSADC_CIN3A: DSADC input.

Definition at line 135 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CIN3B_P02_7_IN

IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN

DSADC_CIN3B: DSADC input.

Definition at line 136 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_Cin_In_pinTable

IFX_EXTERN const IfxDsadc_Cin_In* IfxDsadc_Cin_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS]

IfxDsadc_Cin_In table.

Definition at line 194 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_COUT0_P00_11_OUT

IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT

DSADC_COUT0: DSADC output.

Definition at line 137 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_COUT0_P00_1_OUT

IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT

DSADC_COUT0: DSADC output.

Definition at line 138 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_COUT0_P33_5_OUT

IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT

DSADC_COUT0: DSADC output.

Definition at line 139 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_COUT2_P00_5_OUT

IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT

DSADC_COUT2: DSADC output.

Definition at line 140 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_COUT2_P33_1_OUT

IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT

DSADC_COUT2: DSADC output.

Definition at line 141 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_COUT3_P00_3_OUT

IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT

DSADC_COUT3: DSADC output.

Definition at line 142 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_COUT3_P02_7_OUT

IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT

DSADC_COUT3: DSADC output.

Definition at line 143 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_Cout_Out_pinTable

IFX_EXTERN const IfxDsadc_Cout_Out* IfxDsadc_Cout_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS]

IfxDsadc_Cout_Out table.

Definition at line 197 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DIN0A_P00_2_IN

IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN

DSADC_DIN0A: DSADC input.

Definition at line 144 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DIN0B_P33_6_IN

IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN

DSADC_DIN0B: DSADC input.

Definition at line 145 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DIN2A_P00_6_IN

IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN

DSADC_DIN2A: DSADC input.

Definition at line 146 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DIN2B_P33_2_IN

IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN

DSADC_DIN2B: DSADC input.

Definition at line 147 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DIN3A_P00_4_IN

IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN

DSADC_DIN3A: DSADC input.

Definition at line 148 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DIN3B_P02_8_IN

IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN

DSADC_DIN3B: DSADC input.

Definition at line 149 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_Din_In_pinTable

IFX_EXTERN const IfxDsadc_Din_In* IfxDsadc_Din_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS]

IfxDsadc_Din_In table.

Definition at line 200 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS0NA_AN3_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN

DSADC_DS0NA: DSADC: negative analog input channel of DSADC 0 pin A.

Definition at line 150 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS0NB_AN1_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN

DSADC_DS0NB: DSADC: negative analog input channel of DSADC 0 pin B.

Definition at line 151 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS0PA_AN2_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN

DSADC_DS0PA: DSADC: positive analog input channel of DSADC 0 pin A.

Definition at line 159 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS0PB_AN0_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN

DSADC_DS0PB: DSADC: positive analog input channel of DSADC 0 pin B.

Definition at line 160 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS2NA_AN21_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN

DSADC_DS2NA: DSADC: negative analog input channel of DSADC 2 pin A.

Definition at line 152 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS2PA_AN20_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN

DSADC_DS2PA: DSADC: positive analog input channel of DSADC 2 pin A.

Definition at line 161 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3NA_AN37_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN

DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3 pin A.

Definition at line 153 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3NA_P40_7_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN

DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3, pin A.

Definition at line 154 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3NB_AN39_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN

DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3 pin B.

Definition at line 155 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3NB_P40_9_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN

DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3, pin B.

Definition at line 156 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3NC_AN45_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN

DSADC_DS3NC: DSADC: negative analog input channel of DSADC 3 pin C.

Definition at line 157 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3ND_AN47_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN

DSADC_DS3ND: DSADC: negative analog input channel of DSADC 3 pin D.

Definition at line 158 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3PA_AN36_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN

DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3 pin A.

Definition at line 162 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3PA_P40_6_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN

DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3, pin A.

Definition at line 163 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3PB_AN38_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN

DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3 pin B.

Definition at line 164 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3PB_P40_8_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN

DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3, pin B.

Definition at line 165 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3PC_AN44_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN

DSADC_DS3PC: DSADC: positive analog input channel of DSADC 3 pin C.

Definition at line 166 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3PD_AN46_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN

DSADC_DS3PD: DSADC: positive analog input channel of DSADC 3 pin D.

Definition at line 167 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_Dsn_In_pinTable

IFX_EXTERN const IfxDsadc_Dsn_In* IfxDsadc_Dsn_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS]

IfxDsadc_Dsn_In table.

Definition at line 203 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_Dsp_In_pinTable

IFX_EXTERN const IfxDsadc_Dsp_In* IfxDsadc_Dsp_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS]

IfxDsadc_Dsp_In table.

Definition at line 206 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_ITR0E_P33_0_IN

IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN

DSADC_ITR0E: DSADC input.

Definition at line 168 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_ITR0F_P33_4_IN

IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN

DSADC_ITR0F: DSADC input.

Definition at line 169 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_ITR2E_P33_2_IN

IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN

DSADC_ITR2E: DSADC input.

Definition at line 170 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_ITR2F_P33_6_IN

IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN

DSADC_ITR2F: DSADC input.

Definition at line 171 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_ITR3E_P02_8_IN

IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN

DSADC_ITR3E: DSADC input.

Definition at line 172 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_ITR3F_P00_9_IN

IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN

DSADC_ITR3F: DSADC input.

Definition at line 173 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_Itr_In_pinTable

IFX_EXTERN const IfxDsadc_Itr_In* IfxDsadc_Itr_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS]

IfxDsadc_Itr_In table.

Definition at line 209 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_Sg_In_pinTable

IFX_EXTERN const IfxDsadc_Sg_In* IfxDsadc_Sg_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS]

IfxDsadc_Sg_In table.

Definition at line 212 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_SGNA_P00_4_IN

IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN

DSADC_SGNA: DSADC input.

Definition at line 174 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_SGNB_P33_13_IN

IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN

DSADC_SGNB: DSADC input.

Definition at line 175 of file IfxDsadc_PinMap.h.


iLLD_TC26B: How to use the DSADC Interface driver?

How to use the DSADC Interface driver?
iLLD » DSADC
Collaboration diagram for How to use the DSADC Interface driver?:

The DSADC interface driver provides a default DSADC configuration for converting analog data streams inputs from external modulators via digital input channels, into digital values by using the on-chip demodulator channels.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Dsadc/Dsadc/IfxDsadc_Dsadc.h>

Variables

Declare the DSADC channel handle and available channels as global variables in your C code:

static IfxDsadc_Dsadc dsadc;
IfxDsadc_Dsadc_Channel dsadcChannel[IFXDSADC_NUM_CHANNELS];
#if defined(DERIVATIVE_TC22x) || defined(DERIVATIVE_TC23x) || defined(DERIVATIVE_TC24x)
uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 0, 0, 1 };
#elif defined(DERIVATIVE_TC27x) || defined(DERIVATIVE_TC27xB) || defined(DERIVATIVE_TC27xC) || defined(DERIVATIVE_TC27xD)
uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 1, 1, 1, 1, 1 };
#elif defined(DERIVATIVE_TC26x) || defined(DERIVATIVE_TC26xB)
uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 0, 1, 1 };
#elif defined(DERIVATIVE_TC29x) || defined(DERIVATIVE_TC29xB)
uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
#else
# error "Testcase not prepared for this derivative!"
#endif

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create module config
IfxDsadc_Dsadc_Config dsadcConfig;
IfxDsadc_Dsadc_initModuleConfig(&dsadcConfig, &MODULE_DSADC);
// initialize module
IfxDsadc_Dsadc_initModule(&dsadc, &dsadcConfig);
// create channel config
IfxDsadc_Dsadc_ChannelConfig dsadcChannelConfig;
IfxDsadc_Dsadc_initChannelConfig(&dsadcChannelConfig, &dsadc);
// modify default configuration
dsadcChannelConfig.modulator.positiveInput = IfxDsadc_InputConfig_inputPin;
dsadcChannelConfig.modulator.negativeInput = IfxDsadc_InputConfig_inputPin;
dsadcChannelConfig.modulator.inputGain = IfxDsadc_InputGain_factor1;
dsadcChannelConfig.modulator.inputPin = IfxDsadc_InputPin_a;
dsadcChannelConfig.modulator.modulatorClockFreq = 10.0e6;
dsadcChannelConfig.modulator.commonModeVoltage = IfxDsadc_CommonModeVoltage_c;
dsadcChannelConfig.combFilter.bypassed = FALSE;
dsadcChannelConfig.combFilter.combFilterType = IfxDsadc_MainCombFilterType_comb3;
dsadcChannelConfig.combFilter.combFilterShift = IfxDsadc_MainCombFilterShift_noShift;
dsadcChannelConfig.combFilter.serviceRequest = IfxDsadc_MainServiceRequest_everyNewResult;
dsadcChannelConfig.combFilter.decimationFactor = 32;
dsadcChannelConfig.combFilter.startValue = 32;
dsadcChannelConfig.firFilter.fir0Enabled = TRUE;
dsadcChannelConfig.firFilter.fir1Enabled = TRUE;
dsadcChannelConfig.firFilter.offsetCompensation = FALSE;
dsadcChannelConfig.firFilter.dataShift = IfxDsadc_FirDataShift_shiftBy2;
dsadcChannelConfig.firFilter.internalShift = IfxDsadc_FirInternalShift_shiftBy1;
// initialize channels
for(int chn=0; chn<IFXDSADC_NUM_CHANNELS; ++chn) {
if( dsadcChannelAvailable[chn] ) {
dsadcChannelConfig.channelId = (IfxDsadc_ChannelId)chn;
IfxDsadc_Dsadc_initChannel(&dsadcChannel[chn], &dsadcChannelConfig);
}
}

The DSADC is ready for use now!

Conversions

The DSADC driver provides simple to use Conversion function,

// start conversions
IfxDsadc_Dsadc_startScan(&dsadc, 0x3f, 0x3f);
// results are now available in IFXDSADC(ds).CH[x].RESM.B.RESULT (x=0..5)

The converted data can be collected using the following function

// declared globally
// sint16 result[];
for(int chn=0; chn<IFXDSADC_NUM_CHANNELS; ++chn) {
if( dsadcChannelAvailable[chn] ) {
result = IfxDsadc_Dsadc_getMainResult(&dsadcChannel[chn]));
}
}


iLLD_TC26B: DSADC

Modules
DSADC
iLLD » DSADC
Collaboration diagram for DSADC:

Modules

Data Structures
Module Functions
Channel Functions
Operative Functions
Result Functions
Interrupt Functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » DSADC » DSADC
Collaboration diagram for Data Structures:

Data Structures

struct | IfxDsadc_Dsadc_AuxFilterConfig
Auxiliary comb filter configuration structure. More...
struct | IfxDsadc_Dsadc_ChannelPins
Channel Pins Configuration structure. More...
struct | IfxDsadc_Dsadc_CombFilterConfig
Comb filter configuration structure. More...
struct | IfxDsadc_Dsadc_DemodulatorConfig
Demodulator configuration structure. More...
struct | IfxDsadc_Dsadc_FirFilterConfig
FIR filters configuration structure. More...
struct | IfxDsadc_Dsadc_IntegratorConfig
Integrator configuration structure. More...
struct | IfxDsadc_Dsadc_ModulatorConfig
Modulator configuration structure. More...
struct | IfxDsadc_Dsadc_RectifierConfig
Rectifier configuration structure. More...
struct | IfxDsadc_Dsadc
DSADC handle data structure. More...
struct | IfxDsadc_Dsadc_CarrierGenConfig
Carrier generation configuration structure. More...
struct | IfxDsadc_Dsadc_Channel
Channel handle structure. More...
struct | IfxDsadc_Dsadc_ChannelConfig
Single channel configuration structure. More...
struct | IfxDsadc_Dsadc_Config
Clock configuration data structure. More...

Detailed Description

Data Structure Documentation

◆ IfxDsadc_Dsadc_AuxFilterConfig

struct IfxDsadc_Dsadc_AuxFilterConfig

Auxiliary comb filter configuration structure.

Definition at line 192 of file IfxDsadc_Dsadc.h.

Data Fields
boolean | bypassed |
IfxDsadc_AuxCombFilterShift | combFilterShift | Comb Filter (auxiliary) shift control.
IfxDsadc_AuxCombFilterType | combFilterType | Comb Filter (auxiliary) configuration/type.
uint8 | decimationFactor | CIC Filter (Auxiliary) decimation factor (4 .. 32)
IfxDsadc_AuxGate | eventGate | Service request generation (auxiliary)
IfxDsadc_AuxEvent | eventSelect | Service request generation (auxiliary)
IfxDsadc_AuxServiceRequest | serviceRequest | Service request generation (auxiliary)

◆ IfxDsadc_Dsadc_ChannelPins

struct IfxDsadc_Dsadc_ChannelPins

Channel Pins Configuration structure.

Definition at line 205 of file IfxDsadc_Dsadc.h.

Collaboration diagram for IfxDsadc_Dsadc_ChannelPins:
[legend]
Data Fields
IFX_CONST IfxDsadc_Cin_In * | cin | the CIN Pin which should be configured
IfxPort_InputMode | cinMode | the CIN pin input mode which should be configured
IFX_CONST IfxDsadc_Din_In * | din | the DIN Pin which should be configured
IfxPort_InputMode | dinMode | the DIN pin input mode which should be configured
IFX_CONST IfxDsadc_Dsn_In * | dsn | the DSN Pin which should be configured
IfxPort_InputMode | dsnMode | the DSN pin output mode which should be configured
IFX_CONST IfxDsadc_Dsp_In * | dsp | the DSP Pin which should be configured
IfxPort_InputMode | dspMode | the DSP pin output mode which should be configured
IFX_CONST IfxDsadc_Itr_In * | itr | the ITR Pin which should be configured
IfxPort_InputMode | itrMode | the ITR pin input mode which should be configured
IfxPort_PadDriver | pinDriver | Pin Driver Configuration.

◆ IfxDsadc_Dsadc_CombFilterConfig

struct IfxDsadc_Dsadc_CombFilterConfig

Comb filter configuration structure.

Definition at line 222 of file IfxDsadc_Dsadc.h.

Data Fields
boolean | bypassed | CIC Filter enable/bypass selection.
IfxDsadc_MainCombFilterShift | combFilterShift | Comb Filter (Main Chain) shift control.
IfxDsadc_MainCombFilterType | combFilterType | Comb Filter (Main Chain) configuration/type.
uint16 | decimationFactor | 4 .. 256
IfxDsadc_MainServiceRequest | serviceRequest | Service request generation (main chain)
uint16 | startValue | 4 .. decimationFactor

◆ IfxDsadc_Dsadc_DemodulatorConfig

struct IfxDsadc_Dsadc_DemodulatorConfig

Demodulator configuration structure.

Definition at line 234 of file IfxDsadc_Dsadc.h.

Data Fields
IfxDsadc_InputDataSource | inputDataSource | Demodulator input data source selection.
IfxDsadc_IntegratorTrigger | integrationTrigger | Integrator trigger mode selection.
IfxDsadc_SampleClockSource | sampleClockSource | Demodulator sample clock source selection.
IfxDsadc_SampleStrobe | sampleStrobe | Demodulator data strobe generation mode selection.
IfxDsadc_TimestampTrigger | timestampTrigger | Timestamp trigger mode selection.
IfxDsadc_TriggerInput | triggerInput | Trigger selection.

◆ IfxDsadc_Dsadc_FirFilterConfig

struct IfxDsadc_Dsadc_FirFilterConfig

FIR filters configuration structure.

Definition at line 246 of file IfxDsadc_Dsadc.h.

Data Fields
IfxDsadc_FirDataShift | dataShift | FIR data shift control selection.
boolean | fir0Enabled | FIR filter 0 enable/disable selection.
boolean | fir1Enabled | FIR filter 0 enable/disable selection.
IfxDsadc_FirInternalShift | internalShift | FIR shift control selction.
boolean | offsetCompensation | Offset Compensation Filter enable/disable selection.

◆ IfxDsadc_Dsadc_IntegratorConfig

struct IfxDsadc_Dsadc_IntegratorConfig

Integrator configuration structure.

Definition at line 257 of file IfxDsadc_Dsadc.h.

Data Fields
uint16 | discardCount | Number of discarded values to after active trigger: 1 .. 64.
uint16 | integrationCount | Number of integrated values after discard step: 1 .. 64.
uint16 | integrationCycles | Number of integration cycles: 1 .. 16. Used only when IfxDsadc_IntegrationWindowSize_internalControl.
IfxDsadc_IntegrationWindowSize | windowSize | Integrator window size.

◆ IfxDsadc_Dsadc_ModulatorConfig

struct IfxDsadc_Dsadc_ModulatorConfig

Modulator configuration structure.

Definition at line 267 of file IfxDsadc_Dsadc.h.

Data Fields
IfxDsadc_CommonModeVoltage | commonModeVoltage | Modulator common mode voltage selection.
IfxDsadc_InputGain | inputGain | Modulator gain select of analog input path.
IfxDsadc_InputPin | inputPin | Modulator input pin selection.
float32 | modulatorClockFreq | Modulator clock frequency.
IfxDsadc_InputConfig | negativeInput | Modulator configuration of negative input line.
IfxDsadc_InputConfig | positiveInput | Modulator configuration of positive input line.

◆ IfxDsadc_Dsadc_RectifierConfig

struct IfxDsadc_Dsadc_RectifierConfig

Rectifier configuration structure.

Definition at line 279 of file IfxDsadc_Dsadc.h.

Data Fields
boolean | enabled | Rectification enable/disable selection.
uint8 | signDelay | Sign delay value.
uint8 | signPeriod | Sign period.
IfxDsadc_RectifierSignSource | signSource | Rectifier sign source.

◆ IfxDsadc_Dsadc

struct IfxDsadc_Dsadc

DSADC handle data structure.

Definition at line 293 of file IfxDsadc_Dsadc.h.

Data Fields
Ifx_DSADC * dsadc Specifies the pointer to the DSADC module registers.

◆ IfxDsadc_Dsadc_CarrierGenConfig

struct IfxDsadc_Dsadc_CarrierGenConfig

Carrier generation configuration structure.

Definition at line 300 of file IfxDsadc_Dsadc.h.

Collaboration diagram for IfxDsadc_Dsadc_CarrierGenConfig:
[legend]
Data Fields
boolean | bitReversed | Bit-Reverse PWM Generation (Normal / Bit reverse mode) selection.
IfxDsadc_CarrierWaveformMode | carrierWaveformMode | Carrier generation mode.
float32 | frequency | Expected excitation frequency in Hz.
boolean | inverted | Signal polarity (Normal / Inverted) selection.
IfxPort_PadDriver | pinDriver | Carrier pins pad driver.
IfxPort_OutputMode | pinMode | Carrier pins output mode.
IFX_CONST IfxDsadc_Cgpwm_Out * | pinNeg | Negative-carrier pin configuration.
IFX_CONST IfxDsadc_Cgpwm_Out * | pinPos | Positive-carrier pin configuration.

◆ IfxDsadc_Dsadc_Channel

struct IfxDsadc_Dsadc_Channel

Channel handle structure.

Definition at line 314 of file IfxDsadc_Dsadc.h.

Data Fields
Ifx_DSADC_CH * | channel | Specifies the pointer to the DSADC channel registers.
IfxDsadc_ChannelId | channelId | Channel Id.
Ifx_DSADC * | module | Specifies the pointer to the DSADC module registers.

◆ IfxDsadc_Dsadc_ChannelConfig

struct IfxDsadc_Dsadc_ChannelConfig

Single channel configuration structure.

Definition at line 323 of file IfxDsadc_Dsadc.h.

Collaboration diagram for IfxDsadc_Dsadc_ChannelConfig:
[legend]
Data Fields
IfxDsadc_Dsadc_AuxFilterConfig | auxFilter | Auxiliary comb filter configuration structure.
IfxDsadc_ChannelId | channelId | Channel Id.
IFX_CONST IfxDsadc_Dsadc_ChannelPins * | channelPins | Channel Pins Configuration structure.
IfxDsadc_Dsadc_CombFilterConfig | combFilter | Comb filter configuration structure.
IfxDsadc_Dsadc_DemodulatorConfig | demodulator | Demodulator configuration structure.
IfxDsadc_Dsadc_FirFilterConfig | firFilter | FIR filters configuration structure.
IfxDsadc_Dsadc_IntegratorConfig | integrator | Integrator configuration structure.
IfxDsadc_Dsadc_ModulatorConfig | modulator | Modulator configuration structure.
Ifx_DSADC * | module | Specifies the pointer to the DSADC module registers.
IfxDsadc_Dsadc_RectifierConfig | rectifier | Rectifier configuration structure.

◆ IfxDsadc_Dsadc_Config

struct IfxDsadc_Dsadc_Config

Clock configuration data structure.

Definition at line 339 of file IfxDsadc_Dsadc.h.

Data Fields
Ifx_DSADC * | dsadc | Specifies the pointer to the DSADC module registers.
IfxDsadc_LowPowerSupply | lowPowerSupply | Low power supply voltage selection.
IfxDsadc_ModulatorClock | modulatorClockSelect | Modulator clock selection.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » DSADC » DSADC
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxDsadc_Dsadc_initCarrierGen (IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_CarrierGenConfig *config)
Initialise the DSADC carrier generator. More...
IFX_EXTERN void | IfxDsadc_Dsadc_initModule (IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_Config *config)
Initialise the DSADC with the supplied configuration. More...
IFX_EXTERN void | IfxDsadc_Dsadc_initModuleConfig (IfxDsadc_Dsadc_Config *config, Ifx_DSADC *dsadc)
Initialise the config struct with default DSADC configuration. More...

Detailed Description

Function Documentation

◆ IfxDsadc_Dsadc_initCarrierGen()

IFX_EXTERN void IfxDsadc_Dsadc_initCarrierGen | ( | IfxDsadc_Dsadc * | dsadc,
 |  | const IfxDsadc_Dsadc_CarrierGenConfig * | config
 | ) |  |

Initialise the DSADC carrier generator.

Parameters
dsadc | pointer to the DSADC handle (it will be initialized by this function)
config | pointer to the DSADC carrier configuration
Returns
None

Definition at line 165 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Rdc_initHwChannels().

◆ IfxDsadc_Dsadc_initModule()

IFX_EXTERN void IfxDsadc_Dsadc_initModule | ( | IfxDsadc_Dsadc * | dsadc,
 |  | const IfxDsadc_Dsadc_Config * | config
 | ) |  |

Initialise the DSADC with the supplied configuration.

Parameters
dsadc | pointer to the DSADC handle (it will be initialized by this function)
config | pointer to the DSADC module configuration
Returns
None

A coding example can be found in How to use the DSADC Interface driver?

Definition at line 424 of file IfxDsadc_Dsadc.c.

◆ IfxDsadc_Dsadc_initModuleConfig()

IFX_EXTERN void IfxDsadc_Dsadc_initModuleConfig | ( | IfxDsadc_Dsadc_Config * | config,
 |  | Ifx_DSADC * | dsadc
 | ) |  |

Initialise the config struct with default DSADC configuration.

Parameters
config | pointer to the DSADC module configuration
dsadc | base address of the DSADC register space
Returns
None

A coding example can be found in How to use the DSADC Interface driver?

Definition at line 454 of file IfxDsadc_Dsadc.c.


iLLD_TC26B: Channel Functions

Functions
Channel Functions
iLLD » DSADC » DSADC
Collaboration diagram for Channel Functions:

Functions

IFX_EXTERN void | IfxDsadc_Dsadc_initChannel (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ChannelConfig *config)
Initialise a DSADC channel with the supplied configuration. More...
IFX_EXTERN void | IfxDsadc_Dsadc_initChannelConfig (IfxDsadc_Dsadc_ChannelConfig *config, IfxDsadc_Dsadc *dsadc)
Initialise the config struct with default DSADC channel configuration. More...

Detailed Description

Function Documentation

◆ IfxDsadc_Dsadc_initChannel()

IFX_EXTERN void IfxDsadc_Dsadc_initChannel | ( | IfxDsadc_Dsadc_Channel * | channel,
 |  | const IfxDsadc_Dsadc_ChannelConfig * | config
 | ) |  |

Initialise a DSADC channel with the supplied configuration.

Parameters
channel | pointer to the DSADC channel handle (it will be initialized by this function)
config | pointer to the DSADC Channel configuration
Returns
None

A coding example can be found in How to use the DSADC Interface driver?

Definition at line 196 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Rdc_initHwChannels().

◆ IfxDsadc_Dsadc_initChannelConfig()

IFX_EXTERN void IfxDsadc_Dsadc_initChannelConfig | ( | IfxDsadc_Dsadc_ChannelConfig * | config,
 |  | IfxDsadc_Dsadc * | dsadc
 | ) |  |

Initialise the config struct with default DSADC channel configuration.

Parameters
config | pointer to the DSADC Channel configuration (it will be initialized by this function)
dsadc | pointer to the DSADC handle
Returns
None

A coding example can be found in How to use the DSADC Interface driver?

Definition at line 254 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Rdc_initConfig().


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » DSADC » DSADC
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxDsadc_Dsadc_startScan (IfxDsadc_Dsadc *dsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels. More...
IFX_INLINE void | IfxDsadc_Dsadc_stopScan (IfxDsadc_Dsadc *dsadc, uint32 modulatorMask)
Disables the conversion of multiple channels. More...

Detailed Description

Function Documentation

◆ IfxDsadc_Dsadc_startScan()

IFX_INLINE void IfxDsadc_Dsadc_startScan | ( | IfxDsadc_Dsadc * | dsadc,
 |  | uint32 | modulatorMask,
 |  | uint32 | channelMask
 | ) |  |

Enables the conversion of multiple channels.

Parameters
dsadc | Pointer to the DSADC handle
modulatorMask | the modulator which should be running (bitwise selection)
channelMask | the channels which should be scanned (bitwise selection)
Returns
None

A coding example can be found in How to use the DSADC Interface driver?

Definition at line 524 of file IfxDsadc_Dsadc.h.

◆ IfxDsadc_Dsadc_stopScan()

IFX_INLINE void IfxDsadc_Dsadc_stopScan | ( | IfxDsadc_Dsadc * | dsadc,
 |  | uint32 | modulatorMask
 | ) |  |

Disables the conversion of multiple channels.

Parameters
dsadc | Pointer to the DSADC handle
modulatorMask | the modulator which should be running (bitwise selection)
Returns
None
// disable the modulators of all 6 DSADC channels
IfxDsadc_Dsadc_stopScan(&dsadc, 0x3f);

Definition at line 530 of file IfxDsadc_Dsadc.h.


iLLD_TC26B: Result Functions

Functions
Result Functions
iLLD » DSADC » DSADC
Collaboration diagram for Result Functions:

Functions

IFX_INLINE sint16 | IfxDsadc_Dsadc_getMainResult (IfxDsadc_Dsadc_Channel *channel)
Get result from the main chain. More...
IFX_EXTERN sint16 | IfxDsadc_Dsadc_getAuxResult (IfxDsadc_Dsadc_Channel *channel)
Get result from the auxilary chain. More...

Detailed Description

Function Documentation

◆ IfxDsadc_Dsadc_getAuxResult()

IFX_EXTERN sint16 IfxDsadc_Dsadc_getAuxResult ( IfxDsadc_Dsadc_Channel * channel )

Get result from the auxilary chain.

Parameters
channel Pointer to the DSADC channel handle
Returns
result from the auxiliary chain

Definition at line 140 of file IfxDsadc_Dsadc.c.

◆ IfxDsadc_Dsadc_getMainResult()

IFX_INLINE sint16 IfxDsadc_Dsadc_getMainResult ( IfxDsadc_Dsadc_Channel * channel )

Get result from the main chain.

Parameters
channel Pointer to the DSADC channel handle
Returns
result from the main chain

Definition at line 512 of file IfxDsadc_Dsadc.h.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » DSADC » DSADC
Collaboration diagram for Interrupt Functions:

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDsadc_Dsadc_getAuxSrc (IfxDsadc_Dsadc_Channel *channel)
Get the interrupt source register for a Aux event. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDsadc_Dsadc_getMainSrc (IfxDsadc_Dsadc_Channel *channel)
Get the interrupt source register for a Main event. More...

Detailed Description

Function Documentation

◆ IfxDsadc_Dsadc_getAuxSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxDsadc_Dsadc_getAuxSrc ( IfxDsadc_Dsadc_Channel * channel )

Get the interrupt source register for a Aux event.

Parameters
channel Pointer to the DSADC channel handle
Returns
Address/pointer to the interrupt source register

Definition at line 506 of file IfxDsadc_Dsadc.h.

◆ IfxDsadc_Dsadc_getMainSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxDsadc_Dsadc_getMainSrc ( IfxDsadc_Dsadc_Channel * channel )

Get the interrupt source register for a Main event.

Parameters
channel Pointer to the DSADC channel handle
Returns
Address/pointer to the interrupt source register

Definition at line 518 of file IfxDsadc_Dsadc.h.


iLLD_TC26B: RDC

Modules
RDC
iLLD » DSADC
Collaboration diagram for RDC:

Modules

Variables
Configuration Functions
StdIf Functions
Structures
Utility Functions

Detailed Description


iLLD_TC26B: Variables

Variables
Variables
iLLD » DSADC » RDC
Collaboration diagram for Variables:

Variables

IFX_STATIC IFX_CONST Ifx_GTM_TIM_CH_CTRL_Bits IfxDsadc_Rdc_GtmTimCfg
GTM TIM Configuration settings. More...

Detailed Description

Variable Documentation

◆ IfxDsadc_Rdc_GtmTimCfg

IFX_STATIC IFX_CONST Ifx_GTM_TIM_CH_CTRL_Bits IfxDsadc_Rdc_GtmTimCfg
Initial value:
= {
.TIM_EN = 1,
.TIM_MODE = IfxGtm_Tim_Mode_inputEvent,
.GPR0_SEL = IfxGtm_Tim_GprSel_tbuTs0,
.GPR1_SEL = IfxGtm_Tim_GprSel_tbuTs0,
.CNTS_SEL = IfxGtm_Tim_CntsSel_cntReg,
.DSL = 0,
.ISL = 0,
}
IfxGtm_Tim_Mode_inputEvent
TIEM.
Definition: IfxGtm_Tim.h:110
IfxGtm_Tim_GprSel_tbuTs0
Definition: IfxGtm_Tim.h:94
IfxGtm_Tim_CntsSel_cntReg
Definition: IfxGtm_Tim.h:72

GTM TIM Configuration settings.

Definition at line 123 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_initGtmTim().


iLLD_TC26B: Configuration Functions

Functions
Configuration Functions
iLLD » DSADC » RDC iLLD » DSADC » RDC » | Structures
Collaboration diagram for Configuration Functions:

Functions

IFX_STATIC Ifx_GTM_TIM_CH * | IfxDsadc_Rdc_initGtmTim (Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch timCh, boolean risingEdge)
IFX_STATIC boolean | IfxDsadc_Rdc_initHwChannels (IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the DSADC hardware channels. More...
IFX_STATIC void | IfxDsadc_Rdc_initHwTimestamp (IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the GTM timestamp hardware resources. More...
IFX_EXTERN boolean | IfxDsadc_Rdc_init (IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the DSADC RDC driver by initialising: More...
IFX_EXTERN void | IfxDsadc_Rdc_initConfig (IfxDsadc_Rdc_Config *config)

Detailed Description

Function Documentation

◆ IfxDsadc_Rdc_init()

IFX_EXTERN boolean IfxDsadc_Rdc_init | ( | IfxDsadc_Rdc * | driver,
 |  | const IfxDsadc_Rdc_Config * | config
 | ) |  |

Initialise the DSADC RDC driver by initialising:

  • Two DSADC hardware channel resources
  • Carrier generation hardware resources
  • Time-stamp hardware resources
  • Driver's run-time data (RAM): tracking observer, fault-detection, interface layer etc.
    Parameters
    driver | Driver's handle, i.e. pointer to IfxDsadc_Rdc RAM location
    config | Config Pointer to the driver's configuration
    Returns
    TRUE in case of success else FALSE

Definition at line 228 of file IfxDsadc_Rdc.c.

◆ IfxDsadc_Rdc_initConfig()

IFX_EXTERN void IfxDsadc_Rdc_initConfig ( IfxDsadc_Rdc_Config * config )
Parameters
config DSADC RDC configuration structure
Returns
None

12-bit default resolution

Definition at line 277 of file IfxDsadc_Rdc.c.

◆ IfxDsadc_Rdc_initGtmTim()

IFX_STATIC Ifx_GTM_TIM_CH * IfxDsadc_Rdc_initGtmTim | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tim | tim,
 |  | IfxGtm_Tim_Ch | timCh,
 |  | boolean | risingEdge
 | ) |  |
Parameters
gtm | Pointer to GTM module registers
tim | TIM Number
timCh | TIM Channel Number
risingEdge | Signal level control

Definition at line 309 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_initHwTimestamp().

◆ IfxDsadc_Rdc_initHwChannels()

IFX_STATIC boolean IfxDsadc_Rdc_initHwChannels | ( | IfxDsadc_Rdc * | driver,
 |  | const IfxDsadc_Rdc_Config * | config
 | ) |  |

Initialise the DSADC hardware channels.

Parameters
driver | Driver handle
config | DSADC RDC configuration structure

Definition at line 320 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_init().

◆ IfxDsadc_Rdc_initHwTimestamp()

IFX_STATIC void IfxDsadc_Rdc_initHwTimestamp | ( | IfxDsadc_Rdc * | driver,
 |  | const IfxDsadc_Rdc_Config * | config
 | ) |  |

Initialise the GTM timestamp hardware resources.

Parameters
driver | Driver handle
config | DSADC RDC configuration structure
Returns
None
  • Initialize TIM channel which is triggered by application's PWM

  • Initialize TIM channel which is triggered by DSADC sample event

  • Connect DSADC trigger to TIM mux
  • Connect into TIM input

Definition at line 390 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_init().


iLLD_TC26B: StdIf Functions

Functions
StdIf Functions
iLLD » DSADC » RDC iLLD » DSADC » RDC » | Structures
Collaboration diagram for StdIf Functions:

Functions

IFX_INLINE IfxStdIf_Pos_Status | IfxDsadc_Rdc_getFault (IfxDsadc_Rdc *driver)
IFX_INLINE uint16 | IfxDsadc_Rdc_getPeriodPerRotation (IfxDsadc_Rdc *driver)
IFX_INLINE IfxStdIf_Pos_RawAngle | IfxDsadc_Rdc_getRawPosition (IfxDsadc_Rdc *driver)
IFX_INLINE float32 | IfxDsadc_Rdc_getSpeed (IfxDsadc_Rdc *driver)
IFX_EXTERN float32 | IfxDsadc_Rdc_getAbsolutePosition (IfxDsadc_Rdc *driver)
see IfxStdIf_Pos_GetAbsolutePosition More...
IFX_EXTERN IfxStdIf_Pos_Dir | IfxDsadc_Rdc_getDirection (IfxDsadc_Rdc *driver)
IFX_EXTERN sint32 | IfxDsadc_Rdc_getOffset (IfxDsadc_Rdc *driver)
IFX_EXTERN float32 | IfxDsadc_Rdc_getPosition (IfxDsadc_Rdc *driver)
IFX_EXTERN float32 | IfxDsadc_Rdc_getRefreshPeriod (IfxDsadc_Rdc *driver)
IFX_EXTERN sint32 | IfxDsadc_Rdc_getResolution (IfxDsadc_Rdc *driver)
IFX_EXTERN IfxStdIf_Pos_SensorType | IfxDsadc_Rdc_getSensorType (IfxDsadc_Rdc *driver)
IFX_EXTERN sint32 | IfxDsadc_Rdc_getTurn (IfxDsadc_Rdc *driver)
IFX_EXTERN void | IfxDsadc_Rdc_onEventA (IfxDsadc_Rdc *driver)
IFX_EXTERN void | IfxDsadc_Rdc_reset (IfxDsadc_Rdc *driver)
IFX_EXTERN void | IfxDsadc_Rdc_resetFaults (IfxDsadc_Rdc *driver)
IFX_EXTERN void | IfxDsadc_Rdc_setOffset (IfxDsadc_Rdc *driver, sint32 offset)
IFX_EXTERN void | IfxDsadc_Rdc_setRefreshPeriod (IfxDsadc_Rdc *driver, float32 updatePeriod)
IFX_EXTERN boolean | IfxDsadc_Rdc_stdIfPosInit (IfxStdIf_Pos *stdif, IfxDsadc_Rdc *driver)
Initializes the standard interface "Pos". More...
IFX_EXTERN void | IfxDsadc_Rdc_update (IfxDsadc_Rdc *driver)

Detailed Description

Function Documentation

◆ IfxDsadc_Rdc_getAbsolutePosition()

IFX_EXTERN float32 IfxDsadc_Rdc_getAbsolutePosition ( IfxDsadc_Rdc * driver )

see IfxStdIf_Pos_GetAbsolutePosition

Parameters
driver Driver handle
Returns
Absolute position

Definition at line 173 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getDirection()

IFX_EXTERN IfxStdIf_Pos_Dir IfxDsadc_Rdc_getDirection ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetDirection
Parameters
driver Driver handle
Returns
Direction

Definition at line 179 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getFault()

IFX_INLINE IfxStdIf_Pos_Status IfxDsadc_Rdc_getFault ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetFault
Parameters
driver Driver handle
Returns
Fault

Definition at line 601 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getOffset()

IFX_EXTERN sint32 IfxDsadc_Rdc_getOffset ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetOffset
Parameters
driver Driver handle
Returns
Offset address

Definition at line 185 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getPeriodPerRotation()

IFX_INLINE uint16 IfxDsadc_Rdc_getPeriodPerRotation ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetPeriodPerRotation
Parameters
driver Driver handle
Returns
Period per rotation

Definition at line 607 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getPosition()

IFX_EXTERN float32 IfxDsadc_Rdc_getPosition ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetPosition
Parameters
driver Driver handle
Returns
Position

Definition at line 191 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getRawPosition()

IFX_INLINE IfxStdIf_Pos_RawAngle IfxDsadc_Rdc_getRawPosition ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetRawPosition
Parameters
driver Driver handle
Returns
Position in ticks

Definition at line 613 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getRefreshPeriod()

IFX_EXTERN float32 IfxDsadc_Rdc_getRefreshPeriod ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetRefreshPeriod
Parameters
driver driver handle
Returns
Update period

Definition at line 197 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getResolution()

IFX_EXTERN sint32 IfxDsadc_Rdc_getResolution ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetResolution
Parameters
driver Driver handle
Returns
Resolution

Definition at line 203 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getSensorType()

IFX_EXTERN IfxStdIf_Pos_SensorType IfxDsadc_Rdc_getSensorType ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetSensorType
Parameters
driver driver handle
Returns
Sensor type

Definition at line 209 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getSpeed()

IFX_INLINE float32 IfxDsadc_Rdc_getSpeed ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetSpeed
Parameters
driver Driver handle
Returns
speed

Definition at line 619 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getTurn()

IFX_EXTERN sint32 IfxDsadc_Rdc_getTurn ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetTurn
Parameters
driver Driver handle
Returns
Returns the number of turns

Definition at line 215 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_onEventA()

IFX_EXTERN void IfxDsadc_Rdc_onEventA ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_OnEventA The API handles the event A which corresponds to the DSADC interrupt event.
Parameters
driver Driver's handle
Returns
None

Definition at line 420 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_reset()

IFX_EXTERN void IfxDsadc_Rdc_reset ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_Reset
Parameters
driver Driver handle
Returns
None

Definition at line 443 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_resetFaults()

IFX_EXTERN void IfxDsadc_Rdc_resetFaults ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_ResetFaults
Parameters
driver Driver handle
Returns
None

Definition at line 449 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_setOffset()

IFX_EXTERN void IfxDsadc_Rdc_setOffset | ( | IfxDsadc_Rdc * | driver,
 |  | sint32 | offset
 | ) |  |
See also
IfxStdIf_Pos_SetOffset
Parameters
driver | Driver handle
offset | Offset
Returns
None

Definition at line 455 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_setRefreshPeriod()

IFX_EXTERN void IfxDsadc_Rdc_setRefreshPeriod | ( | IfxDsadc_Rdc * | driver,
 |  | float32 | updatePeriod
 | ) |  |
See also
IfxStdIf_Pos_SetRefreshPeriod
Parameters
driver | Driver handle
updatePeriod | Update period
Returns
None

Definition at line 461 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_stdIfPosInit()

IFX_EXTERN boolean IfxDsadc_Rdc_stdIfPosInit | ( | IfxStdIf_Pos * | stdif,
 |  | IfxDsadc_Rdc * | driver
 | ) |  |

Initializes the standard interface "Pos".

Parameters
stdif | Standard interface position object
driver | Virtual position sensor
Returns
TRUE on success else FALSE

Definition at line 477 of file IfxDsadc_Rdc.c.

◆ IfxDsadc_Rdc_update()

IFX_EXTERN void IfxDsadc_Rdc_update ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_Update This function is to be executed at user's application interrupt or task, e.g. motor control
Parameters
driver Driver's handle
Returns
None

Definition at line 515 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().


iLLD_TC26B: Structures

Modules | Data Structures | Variables
Structures
iLLD » DSADC » RDC
Collaboration diagram for Structures:

Modules

Configuration Functions
StdIf Functions
Utility Functions

Data Structures

struct | IfxDsadc_Rdc_GtmTimestamp
DSADC timestamp helper using GTM. More...
struct | IfxDsadc_Rdc_ConfigHw
RDC hardware configuration. More...
struct | IfxDsadc_Rdc_Hw
DSADC RDC hardware object structure. More...
struct | IfxDsadc_Rdc_Ts
struct | IfxDsadc_Rdc
DSADC RDC data structure. More...
struct | IfxDsadc_Rdc_Config
DSADC RDC configuration structure Note: if ALL kp, ki, kd are zero, then the init function will use default value. More...

Variables

Ifx_GTM * | gtm
Pointer to GTM SFRs. More...
IfxGtm_Tim rdcTim
IfxGtm_Tim_Ch rdcTimChannel
TIM channel triggered by DSADC channel. More...
uint32 rdcTimMuxValue
Mux value used. More...
IfxGtm_Tim_TinMap * pwmTim
TIM channel triggered by PWM trigger. More...
IfxDsadc_Dsadc_ChannelConfig inputConfig
Default channel configuration for both SIN and COS input. More...
IfxDsadc_ChannelId inputSin
Channel ID of DSADC used for SIN input. This will override value given in the inputConfig. More...
IfxDsadc_ChannelId inputCos
Channel ID of DSADC used for COS input. This will override value given in the inputConfig. More...
Ifx_Priority servReqPriority
Interrupt priority. NOTE: Only used by inputSin and will override value given in the inputConfig. More...
IfxSrc_Tos servReqProvider
Service provider. NOTE: Only used by inputSin and will override value given in the inputConfig. More...
boolean startScan
Specifies whether the conversion will be started as soon as the IfxDsadc_Rdc_initHw() is called. More...
IfxDsadc_Dsadc_CarrierGenConfig carrierGen
Pointer to the carrier signal generation configuration. More...
IfxDsadc_Cout_Out * outputClock
if not NULL_PTR, modulator clock output pin from inputSin channel will be configured More...
IfxDsadc_Rdc_GtmTimestamp gtmTimestamp
Timestamp helper using GTM. More...
IfxDsadc_Dsadc_Channel inputSin
Handle to SIN input channel. More...
IfxDsadc_Dsadc_Channel inputCos
Handle to COS input channel. More...
Ifx_GTM_TIM_CH * | pwmTimCh
TIM channel for PWM timestamp. More...
Ifx_GTM_TIM_CH * | rdcTimCh
TIM channel for DSADC timestamp. More...
boolean enabled
float32 inSeconds
uint32 rdc
Absolute time of DSADC result. More...
uint32 pwm
Absolute time of user's PWM trigger. Used only if IFXDSADC_RDC_CFG_DEBUG is set. More...
sint32 inTicks
Time-stamp of last result (in ticks). Used only if IFXDSADC_RDC_CFG_DEBUG is set. More...
uint32 maxTicks
Maximum time-stamp value (in ticks of absolute time clock) More...
float32 clockPeriod
Period of absolute time clock (in second) More...
Ifx_AngleTrkF32 angleTrk
sint16 sinIn
sint16 cosIn
float32 updatePeriod
float32 groupDelay
IfxDsadc_Rdc_Hw hardware
IfxDsadc_Rdc_Ts timestamp
float32 kp
Observer proportional gain. More...
float32 ki
Observer integral gain. More...
float32 kd
Observer differential gain. More...
float32 speedLpfFc
Cut-off frequency of speed low-pass filter (in Hertz). More...
float32 errorThreshold
Threshold of error value in the tracking loop (in radian) More...
float32 userTs
Sampling period of the application. More...
sint32 sqrAmplMax
Maximum value for square of signal amplitudes. More...
sint32 sqrAmplMin
Minimum value for square of signal amplitudes. More...
uint16 periodPerRotation
Number of electrical periods per mechanical rotation. More...
boolean reversed
TRUE: reversed direction, FALSE: straight direction. More...
sint32 resolution
Sensor resolution. More...
IfxStdIf_Pos_RawAngle offset
Offset in ticks. [0 .. (IfxDsadc_Rdc_Config::resolution - 1)]. More...
IfxDsadc_Rdc_ConfigHw hardware
Pointer to hardware config. More...
IfxDsadc_Dsadc * dsadc
Pointer to the DSADC driver. More...

Detailed Description

Data Structure Documentation

◆ IfxDsadc_Rdc_GtmTimestamp

struct IfxDsadc_Rdc_GtmTimestamp

DSADC timestamp helper using GTM.

Definition at line 322 of file IfxDsadc_Rdc.h.

Collaboration diagram for IfxDsadc_Rdc_GtmTimestamp:
[legend]
Data Fields
Ifx_GTM * | gtm | Pointer to GTM SFRs.
IfxGtm_Tim_TinMap * | pwmTim | TIM channel triggered by PWM trigger.
IfxGtm_Tim | rdcTim |
IfxGtm_Tim_Ch | rdcTimChannel | TIM channel triggered by DSADC channel.
uint32 | rdcTimMuxValue | Mux value used.

◆ IfxDsadc_Rdc_ConfigHw

struct IfxDsadc_Rdc_ConfigHw

RDC hardware configuration.

Definition at line 337 of file IfxDsadc_Rdc.h.

Collaboration diagram for IfxDsadc_Rdc_ConfigHw:
[legend]
Data Fields
IfxDsadc_Dsadc_CarrierGenConfig carrierGen Pointer to the carrier signal generation configuration.
Note
If NULL_PTR, it is assumed that the carrier generation has been pre-configured
IfxDsadc_Rdc_GtmTimestamp | gtmTimestamp | Timestamp helper using GTM.
IfxDsadc_Dsadc_ChannelConfig | inputConfig | Default channel configuration for both SIN and COS input.
IfxDsadc_ChannelId | inputCos | Channel ID of DSADC used for COS input. This will override value given in the inputConfig.
IfxDsadc_ChannelId | inputSin | Channel ID of DSADC used for SIN input. This will override value given in the inputConfig.
IfxDsadc_Cout_Out * | outputClock | if not NULL_PTR, modulator clock output pin from inputSin channel will be configured
Ifx_Priority | servReqPriority | Interrupt priority. NOTE: Only used by inputSin and will override value given in the inputConfig.
IfxSrc_Tos | servReqProvider | Service provider. NOTE: Only used by inputSin and will override value given in the inputConfig.
boolean | startScan | Specifies whether the conversion will be started as soon as the IfxDsadc_Rdc_initHw() is called.

◆ IfxDsadc_Rdc_Hw

struct IfxDsadc_Rdc_Hw

DSADC RDC hardware object structure.

Definition at line 353 of file IfxDsadc_Rdc.h.

Collaboration diagram for IfxDsadc_Rdc_Hw:
[legend]
Data Fields
IfxDsadc_Dsadc_Channel | inputCos | Handle to COS input channel.
IfxDsadc_Dsadc_Channel | inputSin | Handle to SIN input channel.
Ifx_GTM_TIM_CH * | pwmTimCh | TIM channel for PWM timestamp.
Ifx_GTM_TIM_CH * | rdcTimCh | TIM channel for DSADC timestamp.

◆ IfxDsadc_Rdc_Ts

struct IfxDsadc_Rdc_Ts

Definition at line 363 of file IfxDsadc_Rdc.h.

Data Fields
float32 | clockPeriod | Period of absolute time clock (in second)
boolean | enabled |
float32 | inSeconds |
sint32 | inTicks | Time-stamp of last result (in ticks). Used only if IFXDSADC_RDC_CFG_DEBUG is set.
uint32 | maxTicks | Maximum time-stamp value (in ticks of absolute time clock)
uint32 | pwm | Absolute time of user's PWM trigger. Used only if IFXDSADC_RDC_CFG_DEBUG is set.
uint32 | rdc | Absolute time of DSADC result.

◆ IfxDsadc_Rdc

struct IfxDsadc_Rdc

DSADC RDC data structure.

Definition at line 380 of file IfxDsadc_Rdc.h.

Collaboration diagram for IfxDsadc_Rdc:
[legend]
Data Fields
Ifx_AngleTrkF32 | angleTrk
sint16 | cosIn
float32 | groupDelay
IfxDsadc_Rdc_Hw | hardware
sint16 | sinIn
IfxDsadc_Rdc_Ts | timestamp
float32 | updatePeriod

◆ IfxDsadc_Rdc_Config

struct IfxDsadc_Rdc_Config

DSADC RDC configuration structure Note: if ALL kp, ki, kd are zero, then the init function will use default value.

Definition at line 394 of file IfxDsadc_Rdc.h.

Collaboration diagram for IfxDsadc_Rdc_Config:
[legend]
Data Fields
IfxDsadc_Dsadc * | dsadc | Pointer to the DSADC driver.
float32 | errorThreshold | Threshold of error value in the tracking loop (in radian)
IfxDsadc_Rdc_ConfigHw | hardware | Pointer to hardware config.
float32 | kd | Observer differential gain.
float32 | ki | Observer integral gain.
float32 | kp | Observer proportional gain.
IfxStdIf_Pos_RawAngle | offset | Offset in ticks. [0 .. (IfxDsadc_Rdc_Config::resolution - 1)].
uint16 | periodPerRotation | Number of electrical periods per mechanical rotation.
sint32 | resolution | Sensor resolution.
boolean | reversed | TRUE: reversed direction, FALSE: straight direction.
float32 | speedLpfFc | Cut-off frequency of speed low-pass filter (in Hertz).
sint32 | sqrAmplMax | Maximum value for square of signal amplitudes.
sint32 | sqrAmplMin | Minimum value for square of signal amplitudes.
float32 | userTs | Sampling period of the application.

Variable Documentation

◆ angleTrk

Ifx_AngleTrkF32 angleTrk

Definition at line 382 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_getAbsolutePosition(), IfxDsadc_Rdc_getDirection(), IfxDsadc_Rdc_getFault(), IfxDsadc_Rdc_getOffset(), IfxDsadc_Rdc_getPeriodPerRotation(), IfxDsadc_Rdc_getPosition(), IfxDsadc_Rdc_getRawPosition(), IfxDsadc_Rdc_getRefreshPeriod(), IfxDsadc_Rdc_getResolution(), IfxDsadc_Rdc_getSpeed(), IfxDsadc_Rdc_getTurn(), IfxDsadc_Rdc_init(), IfxDsadc_Rdc_onEventA(), IfxDsadc_Rdc_reset(), IfxDsadc_Rdc_resetFaults(), IfxDsadc_Rdc_setOffset(), IfxDsadc_Rdc_setRefreshPeriod(), and IfxDsadc_Rdc_update().

◆ carrierGen

IfxDsadc_Dsadc_CarrierGenConfig carrierGen

Pointer to the carrier signal generation configuration.

Note
If NULL_PTR, it is assumed that the carrier generation has been pre-configured

Definition at line 345 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwChannels().

◆ clockPeriod

float32 clockPeriod

Period of absolute time clock (in second)

Definition at line 371 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_updateTimestamp().

◆ cosIn

sint16 cosIn

Definition at line 384 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), IfxDsadc_Rdc_onEventA(), and IfxDsadc_Rdc_update().

◆ dsadc

IfxDsadc_Dsadc* dsadc

Pointer to the DSADC driver.

Definition at line 409 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initHwChannels().

◆ enabled

boolean enabled

Definition at line 365 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_update().

◆ errorThreshold

float32 errorThreshold

Threshold of error value in the tracking loop (in radian)

Definition at line 400 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ groupDelay

float32 groupDelay

Definition at line 386 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_update().

◆ gtm

Ifx_GTM* gtm

Pointer to GTM SFRs.

Definition at line 324 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_calculateTimestampPeriod(), IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwTimestamp().

◆ gtmTimestamp

IfxDsadc_Rdc_GtmTimestamp gtmTimestamp

Timestamp helper using GTM.

Definition at line 348 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_calculateTimestampPeriod(), IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwTimestamp().

◆ hardware [1/2]

IfxDsadc_Rdc_Hw hardware

Definition at line 387 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_calculateGroupDelay(), IfxDsadc_Rdc_getUpdatePeriod(), IfxDsadc_Rdc_initHwChannels(), IfxDsadc_Rdc_initHwTimestamp(), IfxDsadc_Rdc_onEventA(), IfxDsadc_Rdc_startConversion(), and IfxDsadc_Rdc_updateTimestamp().

◆ hardware [2/2]

IfxDsadc_Rdc_ConfigHw hardware

Pointer to hardware config.

Definition at line 408 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_calculateTimestampPeriod(), IfxDsadc_Rdc_initConfig(), IfxDsadc_Rdc_initHwChannels(), and IfxDsadc_Rdc_initHwTimestamp().

◆ inputConfig

IfxDsadc_Dsadc_ChannelConfig inputConfig

Default channel configuration for both SIN and COS input.

Definition at line 339 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), IfxDsadc_Rdc_initHwChannels(), and IfxDsadc_Rdc_initHwTimestamp().

◆ inputCos [1/2]

IfxDsadc_ChannelId inputCos

Channel ID of DSADC used for COS input. This will override value given in the inputConfig.

Definition at line 341 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwChannels().

◆ inputCos [2/2]

IfxDsadc_Dsadc_Channel inputCos

Handle to COS input channel.

Definition at line 356 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initHwChannels(), IfxDsadc_Rdc_onEventA(), and IfxDsadc_Rdc_startConversion().

◆ inputSin [1/2]

IfxDsadc_ChannelId inputSin

Channel ID of DSADC used for SIN input. This will override value given in the inputConfig.

Definition at line 340 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), IfxDsadc_Rdc_initHwChannels(), and IfxDsadc_Rdc_initHwTimestamp().

◆ inputSin [2/2]

IfxDsadc_Dsadc_Channel inputSin

Handle to SIN input channel.

Definition at line 355 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_calculateGroupDelay(), IfxDsadc_Rdc_getUpdatePeriod(), IfxDsadc_Rdc_initHwChannels(), IfxDsadc_Rdc_onEventA(), and IfxDsadc_Rdc_startConversion().

◆ inSeconds

float32 inSeconds

Definition at line 366 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_getTimestamp(), and IfxDsadc_Rdc_updateTimestamp().

◆ inTicks

sint32 inTicks

Time-stamp of last result (in ticks). Used only if IFXDSADC_RDC_CFG_DEBUG is set.

Definition at line 369 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_updateTimestamp().

◆ kd

float32 kd

Observer differential gain.

Definition at line 398 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ ki

float32 ki

Observer integral gain.

Definition at line 397 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ kp

float32 kp

Observer proportional gain.

Definition at line 396 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ maxTicks

uint32 maxTicks

Maximum time-stamp value (in ticks of absolute time clock)

Definition at line 370 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_updateTimestamp().

◆ offset

IfxStdIf_Pos_RawAngle offset

Offset in ticks. [0 .. (IfxDsadc_Rdc_Config::resolution - 1)].

Definition at line 407 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ outputClock

IfxDsadc_Cout_Out* outputClock

if not NULL_PTR, modulator clock output pin from inputSin channel will be configured

Definition at line 347 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwChannels().

◆ periodPerRotation

uint16 periodPerRotation

Number of electrical periods per mechanical rotation.

Definition at line 404 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ pwm

uint32 pwm

Absolute time of user's PWM trigger. Used only if IFXDSADC_RDC_CFG_DEBUG is set.

Definition at line 368 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_updateTimestamp().

◆ pwmTim

IfxGtm_Tim_TinMap* pwmTim

TIM channel triggered by PWM trigger.

Definition at line 328 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwTimestamp().

◆ pwmTimCh

Ifx_GTM_TIM_CH* pwmTimCh

TIM channel for PWM timestamp.

Definition at line 357 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initHwTimestamp(), and IfxDsadc_Rdc_updateTimestamp().

◆ rdc

uint32 rdc

Absolute time of DSADC result.

Definition at line 367 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_onEventA(), and IfxDsadc_Rdc_updateTimestamp().

◆ rdcTim

IfxGtm_Tim rdcTim

Definition at line 325 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwTimestamp().

◆ rdcTimCh

Ifx_GTM_TIM_CH* rdcTimCh

TIM channel for DSADC timestamp.

Definition at line 358 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initHwTimestamp(), and IfxDsadc_Rdc_onEventA().

◆ rdcTimChannel

IfxGtm_Tim_Ch rdcTimChannel

TIM channel triggered by DSADC channel.

Definition at line 326 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwTimestamp().

◆ rdcTimMuxValue

uint32 rdcTimMuxValue

Mux value used.

Definition at line 327 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwTimestamp().

◆ resolution

sint32 resolution

Sensor resolution.

Definition at line 406 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ reversed

boolean reversed

TRUE: reversed direction, FALSE: straight direction.

Definition at line 405 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ servReqPriority

Ifx_Priority servReqPriority

Interrupt priority. NOTE: Only used by inputSin and will override value given in the inputConfig.

Definition at line 342 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwChannels().

◆ servReqProvider

IfxSrc_Tos servReqProvider

Service provider. NOTE: Only used by inputSin and will override value given in the inputConfig.

Definition at line 343 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwChannels().

◆ sinIn

sint16 sinIn

Definition at line 383 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), IfxDsadc_Rdc_onEventA(), and IfxDsadc_Rdc_update().

◆ speedLpfFc

float32 speedLpfFc

Cut-off frequency of speed low-pass filter (in Hertz).

Definition at line 399 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ sqrAmplMax

sint32 sqrAmplMax

Maximum value for square of signal amplitudes.

Definition at line 402 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ sqrAmplMin

sint32 sqrAmplMin

Minimum value for square of signal amplitudes.

Definition at line 403 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ startScan

boolean startScan

Specifies whether the conversion will be started as soon as the IfxDsadc_Rdc_initHw() is called.

Definition at line 344 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwChannels().

◆ timestamp

IfxDsadc_Rdc_Ts timestamp

Definition at line 388 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_getTimestamp(), IfxDsadc_Rdc_init(), IfxDsadc_Rdc_onEventA(), IfxDsadc_Rdc_update(), and IfxDsadc_Rdc_updateTimestamp().

◆ updatePeriod

float32 updatePeriod

Definition at line 385 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init().

◆ userTs

float32 userTs

Sampling period of the application.

Definition at line 401 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » DSADC » RDC iLLD » DSADC » RDC » | Structures
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE void | IfxDsadc_Rdc_updateTimestamp (IfxDsadc_Rdc *driver)
Updating RDC timestamps. More...
IFX_STATIC float32 | IfxDsadc_Rdc_calculateGroupDelay (IfxDsadc_Rdc *driver)
Group Dalay calculation. More...
IFX_STATIC float32 | IfxDsadc_Rdc_calculateTimestampPeriod (const IfxDsadc_Rdc_Config *config)
IFX_STATIC float32 | IfxDsadc_Rdc_getUpdatePeriod (IfxDsadc_Rdc *driver)
Return the update period. More...
IFX_INLINE float32 | IfxDsadc_Rdc_getTimestamp (IfxDsadc_Rdc *driver)
Return timestamp in seconds. More...
IFX_EXTERN void | IfxDsadc_Rdc_startConversion (IfxDsadc_Rdc *driver)
Synchronously start of both DSADC H/W channels. More...

Detailed Description

Function Documentation

◆ IfxDsadc_Rdc_calculateGroupDelay()

IFX_STATIC float32 IfxDsadc_Rdc_calculateGroupDelay ( IfxDsadc_Rdc * driver )

Group Dalay calculation.

Parameters
driver Driver handle

Definition at line 159 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_init().

◆ IfxDsadc_Rdc_calculateTimestampPeriod()

IFX_STATIC float32 IfxDsadc_Rdc_calculateTimestampPeriod ( const IfxDsadc_Rdc_Config * config )
Parameters
config DSADC RDC configuration structure

Definition at line 166 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_init().

◆ IfxDsadc_Rdc_getTimestamp()

IFX_INLINE float32 IfxDsadc_Rdc_getTimestamp ( IfxDsadc_Rdc * driver )

Return timestamp in seconds.

Parameters
driver Driver handle
Returns
timestamp in seconds.

Definition at line 625 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_update().

◆ IfxDsadc_Rdc_getUpdatePeriod()

IFX_STATIC float32 IfxDsadc_Rdc_getUpdatePeriod ( IfxDsadc_Rdc * driver )

Return the update period.

Parameters
driver Driver handle
Returns
Return the update period in [seconds], i.e. the period of new result (and interrupt)

Definition at line 221 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_init().

◆ IfxDsadc_Rdc_startConversion()

IFX_EXTERN void IfxDsadc_Rdc_startConversion ( IfxDsadc_Rdc * driver )

Synchronously start of both DSADC H/W channels.

Parameters
driver Driver's handle, i.e. pointer to IfxDsadc_Rdc RAM location
Returns
None

Definition at line 467 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_initHwChannels().

◆ IfxDsadc_Rdc_updateTimestamp()

IFX_INLINE void IfxDsadc_Rdc_updateTimestamp ( IfxDsadc_Rdc * driver )

Updating RDC timestamps.

Parameters
driver Driver handle
Returns
None

Definition at line 140 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_update().


iLLD_TC26B: IfxDsadc_cfg.h File Reference

  • _Impl
Macros
IfxDsadc_cfg.h File Reference
iLLD » DSADC

DSADC on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXDSADC_NUM_CHANNELS 4
Number of channels. More...
#define | IFXDSADC_NUM_MODULES (1)

Detailed Description

DSADC on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDsadc_cfg.h.

Macro Definition Documentation

◆ IFXDSADC_NUM_CHANNELS

#define IFXDSADC_NUM_CHANNELS 4

Number of channels.

Definition at line 63 of file IfxDsadc_cfg.h.

◆ IFXDSADC_NUM_MODULES

#define IFXDSADC_NUM_MODULES (1)

Definition at line 65 of file IfxDsadc_cfg.h.


iLLD_TC26B: IfxDsadc_PinMap.c File Reference

  • _PinMap
Variables
IfxDsadc_PinMap.c File Reference
iLLD » DSADC

DSADC I/O map. More...

#include "IfxDsadc_PinMap.h"
Include dependency graph for IfxDsadc_PinMap.c:

Go to the source code of this file.

Variables

IfxDsadc_Cgpwm_Out | IfxDsadc_CGPWMN_P00_5_OUT = {&MODULE_DSADC, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt2}
IfxDsadc_Cgpwm_Out | IfxDsadc_CGPWMN_P02_0_OUT = {&MODULE_DSADC, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt4}
IfxDsadc_Cgpwm_Out | IfxDsadc_CGPWMN_P33_11_OUT = {&MODULE_DSADC, {&MODULE_P33,11}, IfxPort_OutputIdx_alt6}
IfxDsadc_Cgpwm_Out | IfxDsadc_CGPWMP_P00_6_OUT = {&MODULE_DSADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt2}
IfxDsadc_Cgpwm_Out | IfxDsadc_CGPWMP_P02_1_OUT = {&MODULE_DSADC, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt4}
IfxDsadc_Cgpwm_Out | IfxDsadc_CGPWMP_P33_12_OUT = {&MODULE_DSADC, {&MODULE_P33,12}, IfxPort_OutputIdx_alt6}
IfxDsadc_Cin_In | IfxDsadc_CIN0A_P00_1_IN = {&MODULE_DSADC, 0, {&MODULE_P00, 1}, Ifx_RxSel_a}
IfxDsadc_Cin_In | IfxDsadc_CIN0B_P33_5_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 5}, Ifx_RxSel_b}
IfxDsadc_Cin_In | IfxDsadc_CIN2A_P00_5_IN = {&MODULE_DSADC, 2, {&MODULE_P00, 5}, Ifx_RxSel_a}
IfxDsadc_Cin_In | IfxDsadc_CIN2B_P33_1_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 1}, Ifx_RxSel_b}
IfxDsadc_Cin_In | IfxDsadc_CIN3A_P00_3_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 3}, Ifx_RxSel_a}
IfxDsadc_Cin_In | IfxDsadc_CIN3B_P02_7_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 7}, Ifx_RxSel_b}
IfxDsadc_Cout_Out | IfxDsadc_COUT0_P00_11_OUT = {&MODULE_DSADC, 0, {&MODULE_P00,11}, IfxPort_OutputIdx_alt4}
IfxDsadc_Cout_Out | IfxDsadc_COUT0_P00_1_OUT = {&MODULE_DSADC, 0, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt4}
IfxDsadc_Cout_Out | IfxDsadc_COUT0_P33_5_OUT = {&MODULE_DSADC, 0, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt4}
IfxDsadc_Cout_Out | IfxDsadc_COUT2_P00_5_OUT = {&MODULE_DSADC, 2, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt4}
IfxDsadc_Cout_Out | IfxDsadc_COUT2_P33_1_OUT = {&MODULE_DSADC, 2, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt4}
IfxDsadc_Cout_Out | IfxDsadc_COUT3_P00_3_OUT = {&MODULE_DSADC, 3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt4}
IfxDsadc_Cout_Out | IfxDsadc_COUT3_P02_7_OUT = {&MODULE_DSADC, 3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt4}
IfxDsadc_Din_In | IfxDsadc_DIN0A_P00_2_IN = {&MODULE_DSADC, 0, {&MODULE_P00, 2}, Ifx_RxSel_a}
IfxDsadc_Din_In | IfxDsadc_DIN0B_P33_6_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 6}, Ifx_RxSel_b}
IfxDsadc_Din_In | IfxDsadc_DIN2A_P00_6_IN = {&MODULE_DSADC, 2, {&MODULE_P00, 6}, Ifx_RxSel_a}
IfxDsadc_Din_In | IfxDsadc_DIN2B_P33_2_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 2}, Ifx_RxSel_b}
IfxDsadc_Din_In | IfxDsadc_DIN3A_P00_4_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 4}, Ifx_RxSel_a}
IfxDsadc_Din_In | IfxDsadc_DIN3B_P02_8_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 8}, Ifx_RxSel_b}
IfxDsadc_Dsn_In | IfxDsadc_DS0NA_AN3_IN = {&MODULE_DSADC, 0, {NULL_PTR, 3}, Ifx_RxSel_a}
IfxDsadc_Dsn_In | IfxDsadc_DS0NB_AN1_IN = {&MODULE_DSADC, 0, {NULL_PTR, 1}, Ifx_RxSel_b}
IfxDsadc_Dsn_In | IfxDsadc_DS2NA_AN21_IN = {&MODULE_DSADC, 2, {NULL_PTR,21}, Ifx_RxSel_a}
IfxDsadc_Dsn_In | IfxDsadc_DS3NA_AN37_IN = {&MODULE_DSADC, 3, {NULL_PTR,37}, Ifx_RxSel_a}
IfxDsadc_Dsn_In | IfxDsadc_DS3NA_P40_7_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 7}, Ifx_RxSel_a}
IfxDsadc_Dsn_In | IfxDsadc_DS3NB_AN39_IN = {&MODULE_DSADC, 3, {NULL_PTR,39}, Ifx_RxSel_b}
IfxDsadc_Dsn_In | IfxDsadc_DS3NB_P40_9_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 9}, Ifx_RxSel_b}
IfxDsadc_Dsn_In | IfxDsadc_DS3NC_AN45_IN = {&MODULE_DSADC, 3, {NULL_PTR,45}, Ifx_RxSel_c}
IfxDsadc_Dsn_In | IfxDsadc_DS3ND_AN47_IN = {&MODULE_DSADC, 3, {NULL_PTR,47}, Ifx_RxSel_d}
IfxDsadc_Dsp_In | IfxDsadc_DS0PA_AN2_IN = {&MODULE_DSADC, 0, {NULL_PTR, 2}, Ifx_RxSel_a}
IfxDsadc_Dsp_In | IfxDsadc_DS0PB_AN0_IN = {&MODULE_DSADC, 0, {NULL_PTR, 0}, Ifx_RxSel_b}
IfxDsadc_Dsp_In | IfxDsadc_DS2PA_AN20_IN = {&MODULE_DSADC, 2, {NULL_PTR,20}, Ifx_RxSel_a}
IfxDsadc_Dsp_In | IfxDsadc_DS3PA_AN36_IN = {&MODULE_DSADC, 3, {NULL_PTR,36}, Ifx_RxSel_a}
IfxDsadc_Dsp_In | IfxDsadc_DS3PA_P40_6_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 6}, Ifx_RxSel_a}
IfxDsadc_Dsp_In | IfxDsadc_DS3PB_AN38_IN = {&MODULE_DSADC, 3, {NULL_PTR,38}, Ifx_RxSel_b}
IfxDsadc_Dsp_In | IfxDsadc_DS3PB_P40_8_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 8}, Ifx_RxSel_b}
IfxDsadc_Dsp_In | IfxDsadc_DS3PC_AN44_IN = {&MODULE_DSADC, 3, {NULL_PTR,44}, Ifx_RxSel_c}
IfxDsadc_Dsp_In | IfxDsadc_DS3PD_AN46_IN = {&MODULE_DSADC, 3, {NULL_PTR,46}, Ifx_RxSel_d}
IfxDsadc_Itr_In | IfxDsadc_ITR0E_P33_0_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 0}, Ifx_RxSel_e}
IfxDsadc_Itr_In | IfxDsadc_ITR0F_P33_4_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 4}, Ifx_RxSel_f}
IfxDsadc_Itr_In | IfxDsadc_ITR2E_P33_2_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 2}, Ifx_RxSel_e}
IfxDsadc_Itr_In | IfxDsadc_ITR2F_P33_6_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 6}, Ifx_RxSel_f}
IfxDsadc_Itr_In | IfxDsadc_ITR3E_P02_8_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 8}, Ifx_RxSel_e}
IfxDsadc_Itr_In | IfxDsadc_ITR3F_P00_9_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 9}, Ifx_RxSel_f}
IfxDsadc_Sg_In | IfxDsadc_SGNA_P00_4_IN = {&MODULE_DSADC, {&MODULE_P00, 4}, Ifx_RxSel_a}
IfxDsadc_Sg_In | IfxDsadc_SGNB_P33_13_IN = {&MODULE_DSADC, {&MODULE_P33,13}, Ifx_RxSel_b}
const IfxDsadc_Cgpwm_Out * | IfxDsadc_Cgpwm_Out_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
const IfxDsadc_Cin_In * | IfxDsadc_Cin_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS]
const IfxDsadc_Cout_Out * | IfxDsadc_Cout_Out_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS]
const IfxDsadc_Din_In * | IfxDsadc_Din_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS]
const IfxDsadc_Dsn_In * | IfxDsadc_Dsn_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS]
const IfxDsadc_Dsp_In * | IfxDsadc_Dsp_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS]
const IfxDsadc_Itr_In * | IfxDsadc_Itr_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS]
const IfxDsadc_Sg_In * | IfxDsadc_Sg_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS]

Detailed Description

DSADC I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDsadc_PinMap.c.

Variable Documentation

◆ IfxDsadc_Cgpwm_Out_pinTable

const IfxDsadc_Cgpwm_Out* IfxDsadc_Cgpwm_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxDsadc_CGPWMN_P00_5_OUT,
&IfxDsadc_CGPWMP_P00_6_OUT,
&IfxDsadc_CGPWMN_P02_0_OUT,
&IfxDsadc_CGPWMP_P02_1_OUT,
&IfxDsadc_CGPWMN_P33_11_OUT,
&IfxDsadc_CGPWMP_P33_12_OUT
}
}
IfxDsadc_CGPWMN_P02_0_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT
Definition: IfxDsadc_PinMap.c:46
IfxDsadc_CGPWMN_P33_11_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT
Definition: IfxDsadc_PinMap.c:47
IfxDsadc_CGPWMP_P00_6_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT
Definition: IfxDsadc_PinMap.c:48
IfxDsadc_CGPWMP_P33_12_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT
Definition: IfxDsadc_PinMap.c:50
IfxDsadc_CGPWMP_P02_1_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT
Definition: IfxDsadc_PinMap.c:49
IfxDsadc_CGPWMN_P00_5_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT
Definition: IfxDsadc_PinMap.c:45

Definition at line 98 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CGPWMN_P00_5_OUT

IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT = {&MODULE_DSADC, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt2}

Definition at line 45 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CGPWMN_P02_0_OUT

IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT = {&MODULE_DSADC, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt4}

Definition at line 46 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CGPWMN_P33_11_OUT

IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT = {&MODULE_DSADC, {&MODULE_P33,11}, IfxPort_OutputIdx_alt6}

Definition at line 47 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CGPWMP_P00_6_OUT

IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT = {&MODULE_DSADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt2}

Definition at line 48 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CGPWMP_P02_1_OUT

IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT = {&MODULE_DSADC, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt4}

Definition at line 49 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CGPWMP_P33_12_OUT

IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT = {&MODULE_DSADC, {&MODULE_P33,12}, IfxPort_OutputIdx_alt6}

Definition at line 50 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CIN0A_P00_1_IN

IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN = {&MODULE_DSADC, 0, {&MODULE_P00, 1}, Ifx_RxSel_a}

Definition at line 51 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CIN0B_P33_5_IN

IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 5}, Ifx_RxSel_b}

Definition at line 52 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CIN2A_P00_5_IN

IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN = {&MODULE_DSADC, 2, {&MODULE_P00, 5}, Ifx_RxSel_a}

Definition at line 53 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CIN2B_P33_1_IN

IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 1}, Ifx_RxSel_b}

Definition at line 54 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CIN3A_P00_3_IN

IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 3}, Ifx_RxSel_a}

Definition at line 55 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CIN3B_P02_7_IN

IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 7}, Ifx_RxSel_b}

Definition at line 56 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_Cin_In_pinTable

const IfxDsadc_Cin_In* IfxDsadc_Cin_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS]
Initial value:
= {
{
{
&IfxDsadc_CIN0A_P00_1_IN,
&IfxDsadc_CIN0B_P33_5_IN
},
{
NULL_PTR,
NULL_PTR
},
{
&IfxDsadc_CIN2A_P00_5_IN,
&IfxDsadc_CIN2B_P33_1_IN
},
{
&IfxDsadc_CIN3A_P00_3_IN,
&IfxDsadc_CIN3B_P02_7_IN
}
}
}
IfxDsadc_CIN2A_P00_5_IN
IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN
Definition: IfxDsadc_PinMap.c:53
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxDsadc_CIN0A_P00_1_IN
IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN
Definition: IfxDsadc_PinMap.c:51
IfxDsadc_CIN3A_P00_3_IN
IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN
Definition: IfxDsadc_PinMap.c:55
IfxDsadc_CIN0B_P33_5_IN
IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN
Definition: IfxDsadc_PinMap.c:52
IfxDsadc_CIN2B_P33_1_IN
IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN
Definition: IfxDsadc_PinMap.c:54
IfxDsadc_CIN3B_P02_7_IN
IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN
Definition: IfxDsadc_PinMap.c:56

Definition at line 109 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_COUT0_P00_11_OUT

IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT = {&MODULE_DSADC, 0, {&MODULE_P00,11}, IfxPort_OutputIdx_alt4}

Definition at line 57 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_COUT0_P00_1_OUT

IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT = {&MODULE_DSADC, 0, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt4}

Definition at line 58 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_COUT0_P33_5_OUT

IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT = {&MODULE_DSADC, 0, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt4}

Definition at line 59 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_COUT2_P00_5_OUT

IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT = {&MODULE_DSADC, 2, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt4}

Definition at line 60 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_COUT2_P33_1_OUT

IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT = {&MODULE_DSADC, 2, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt4}

Definition at line 61 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_COUT3_P00_3_OUT

IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT = {&MODULE_DSADC, 3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt4}

Definition at line 62 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_COUT3_P02_7_OUT

IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT = {&MODULE_DSADC, 3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt4}

Definition at line 63 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_Cout_Out_pinTable

const IfxDsadc_Cout_Out* IfxDsadc_Cout_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS]
Initial value:
= {
{
{
&IfxDsadc_COUT0_P00_1_OUT,
&IfxDsadc_COUT0_P00_11_OUT,
&IfxDsadc_COUT0_P33_5_OUT
},
{
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxDsadc_COUT2_P00_5_OUT,
&IfxDsadc_COUT2_P33_1_OUT,
NULL_PTR
},
{
&IfxDsadc_COUT3_P00_3_OUT,
&IfxDsadc_COUT3_P02_7_OUT,
NULL_PTR
}
}
}
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxDsadc_COUT3_P02_7_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT
Definition: IfxDsadc_PinMap.c:63
IfxDsadc_COUT2_P33_1_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT
Definition: IfxDsadc_PinMap.c:61
IfxDsadc_COUT2_P00_5_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT
Definition: IfxDsadc_PinMap.c:60
IfxDsadc_COUT0_P00_11_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT
Definition: IfxDsadc_PinMap.c:57
IfxDsadc_COUT0_P33_5_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT
Definition: IfxDsadc_PinMap.c:59
IfxDsadc_COUT3_P00_3_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT
Definition: IfxDsadc_PinMap.c:62
IfxDsadc_COUT0_P00_1_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT
Definition: IfxDsadc_PinMap.c:58

Definition at line 130 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DIN0A_P00_2_IN

IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN = {&MODULE_DSADC, 0, {&MODULE_P00, 2}, Ifx_RxSel_a}

Definition at line 64 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DIN0B_P33_6_IN

IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 6}, Ifx_RxSel_b}

Definition at line 65 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DIN2A_P00_6_IN

IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN = {&MODULE_DSADC, 2, {&MODULE_P00, 6}, Ifx_RxSel_a}

Definition at line 66 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DIN2B_P33_2_IN

IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 2}, Ifx_RxSel_b}

Definition at line 67 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DIN3A_P00_4_IN

IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 4}, Ifx_RxSel_a}

Definition at line 68 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DIN3B_P02_8_IN

IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 8}, Ifx_RxSel_b}

Definition at line 69 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_Din_In_pinTable

const IfxDsadc_Din_In* IfxDsadc_Din_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS]
Initial value:
= {
{
{
&IfxDsadc_DIN0A_P00_2_IN,
&IfxDsadc_DIN0B_P33_6_IN
},
{
NULL_PTR,
NULL_PTR
},
{
&IfxDsadc_DIN2A_P00_6_IN,
&IfxDsadc_DIN2B_P33_2_IN
},
{
&IfxDsadc_DIN3A_P00_4_IN,
&IfxDsadc_DIN3B_P02_8_IN
}
}
}
IfxDsadc_DIN0B_P33_6_IN
IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN
Definition: IfxDsadc_PinMap.c:65
IfxDsadc_DIN2B_P33_2_IN
IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN
Definition: IfxDsadc_PinMap.c:67
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxDsadc_DIN0A_P00_2_IN
IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN
Definition: IfxDsadc_PinMap.c:64
IfxDsadc_DIN3B_P02_8_IN
IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN
Definition: IfxDsadc_PinMap.c:69
IfxDsadc_DIN3A_P00_4_IN
IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN
Definition: IfxDsadc_PinMap.c:68
IfxDsadc_DIN2A_P00_6_IN
IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN
Definition: IfxDsadc_PinMap.c:66

Definition at line 155 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS0NA_AN3_IN

IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN = {&MODULE_DSADC, 0, {NULL_PTR, 3}, Ifx_RxSel_a}

Definition at line 70 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS0NB_AN1_IN

IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN = {&MODULE_DSADC, 0, {NULL_PTR, 1}, Ifx_RxSel_b}

Definition at line 71 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS0PA_AN2_IN

IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN = {&MODULE_DSADC, 0, {NULL_PTR, 2}, Ifx_RxSel_a}

Definition at line 79 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS0PB_AN0_IN

IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN = {&MODULE_DSADC, 0, {NULL_PTR, 0}, Ifx_RxSel_b}

Definition at line 80 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS2NA_AN21_IN

IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN = {&MODULE_DSADC, 2, {NULL_PTR,21}, Ifx_RxSel_a}

Definition at line 72 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS2PA_AN20_IN

IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN = {&MODULE_DSADC, 2, {NULL_PTR,20}, Ifx_RxSel_a}

Definition at line 81 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3NA_AN37_IN

IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN = {&MODULE_DSADC, 3, {NULL_PTR,37}, Ifx_RxSel_a}

Definition at line 73 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3NA_P40_7_IN

IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 7}, Ifx_RxSel_a}

Definition at line 74 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3NB_AN39_IN

IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN = {&MODULE_DSADC, 3, {NULL_PTR,39}, Ifx_RxSel_b}

Definition at line 75 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3NB_P40_9_IN

IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 9}, Ifx_RxSel_b}

Definition at line 76 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3NC_AN45_IN

IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN = {&MODULE_DSADC, 3, {NULL_PTR,45}, Ifx_RxSel_c}

Definition at line 77 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3ND_AN47_IN

IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN = {&MODULE_DSADC, 3, {NULL_PTR,47}, Ifx_RxSel_d}

Definition at line 78 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3PA_AN36_IN

IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN = {&MODULE_DSADC, 3, {NULL_PTR,36}, Ifx_RxSel_a}

Definition at line 82 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3PA_P40_6_IN

IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 6}, Ifx_RxSel_a}

Definition at line 83 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3PB_AN38_IN

IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN = {&MODULE_DSADC, 3, {NULL_PTR,38}, Ifx_RxSel_b}

Definition at line 84 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3PB_P40_8_IN

IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 8}, Ifx_RxSel_b}

Definition at line 85 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3PC_AN44_IN

IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN = {&MODULE_DSADC, 3, {NULL_PTR,44}, Ifx_RxSel_c}

Definition at line 86 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3PD_AN46_IN

IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN = {&MODULE_DSADC, 3, {NULL_PTR,46}, Ifx_RxSel_d}

Definition at line 87 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_Dsn_In_pinTable

const IfxDsadc_Dsn_In* IfxDsadc_Dsn_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS]
Initial value:
= {
{
{
&IfxDsadc_DS0NA_AN3_IN,
&IfxDsadc_DS0NB_AN1_IN,
NULL_PTR,
NULL_PTR
},
{
NULL_PTR,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxDsadc_DS2NA_AN21_IN,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxDsadc_DS3NA_P40_7_IN,
&IfxDsadc_DS3NB_P40_9_IN,
&IfxDsadc_DS3NC_AN45_IN,
&IfxDsadc_DS3ND_AN47_IN
}
}
}
IfxDsadc_DS3NB_P40_9_IN
IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN
Definition: IfxDsadc_PinMap.c:76
IfxDsadc_DS2NA_AN21_IN
IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN
Definition: IfxDsadc_PinMap.c:72
IfxDsadc_DS3NC_AN45_IN
IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN
Definition: IfxDsadc_PinMap.c:77
IfxDsadc_DS0NA_AN3_IN
IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN
Definition: IfxDsadc_PinMap.c:70
IfxDsadc_DS0NB_AN1_IN
IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN
Definition: IfxDsadc_PinMap.c:71
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxDsadc_DS3ND_AN47_IN
IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN
Definition: IfxDsadc_PinMap.c:78
IfxDsadc_DS3NA_P40_7_IN
IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN
Definition: IfxDsadc_PinMap.c:74

Definition at line 176 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_Dsp_In_pinTable

const IfxDsadc_Dsp_In* IfxDsadc_Dsp_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS]
Initial value:
= {
{
{
&IfxDsadc_DS0PA_AN2_IN,
&IfxDsadc_DS0PB_AN0_IN,
NULL_PTR,
NULL_PTR
},
{
NULL_PTR,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxDsadc_DS2PA_AN20_IN,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxDsadc_DS3PA_P40_6_IN,
&IfxDsadc_DS3PB_P40_8_IN,
&IfxDsadc_DS3PC_AN44_IN,
&IfxDsadc_DS3PD_AN46_IN
}
}
}
IfxDsadc_DS0PA_AN2_IN
IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN
Definition: IfxDsadc_PinMap.c:79
IfxDsadc_DS3PB_P40_8_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN
Definition: IfxDsadc_PinMap.c:85
IfxDsadc_DS0PB_AN0_IN
IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN
Definition: IfxDsadc_PinMap.c:80
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxDsadc_DS3PC_AN44_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN
Definition: IfxDsadc_PinMap.c:86
IfxDsadc_DS3PA_P40_6_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN
Definition: IfxDsadc_PinMap.c:83
IfxDsadc_DS2PA_AN20_IN
IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN
Definition: IfxDsadc_PinMap.c:81
IfxDsadc_DS3PD_AN46_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN
Definition: IfxDsadc_PinMap.c:87

Definition at line 205 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_ITR0E_P33_0_IN

IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 0}, Ifx_RxSel_e}

Definition at line 88 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_ITR0F_P33_4_IN

IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 4}, Ifx_RxSel_f}

Definition at line 89 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_ITR2E_P33_2_IN

IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 2}, Ifx_RxSel_e}

Definition at line 90 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_ITR2F_P33_6_IN

IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 6}, Ifx_RxSel_f}

Definition at line 91 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_ITR3E_P02_8_IN

IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 8}, Ifx_RxSel_e}

Definition at line 92 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_ITR3F_P00_9_IN

IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 9}, Ifx_RxSel_f}

Definition at line 93 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_Itr_In_pinTable

const IfxDsadc_Itr_In* IfxDsadc_Itr_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS]

Definition at line 234 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_Sg_In_pinTable

const IfxDsadc_Sg_In* IfxDsadc_Sg_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxDsadc_SGNA_P00_4_IN,
&IfxDsadc_SGNB_P33_13_IN
}
}
IfxDsadc_SGNA_P00_4_IN
IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN
Definition: IfxDsadc_PinMap.c:94
IfxDsadc_SGNB_P33_13_IN
IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN
Definition: IfxDsadc_PinMap.c:95

Definition at line 271 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_SGNA_P00_4_IN

IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN = {&MODULE_DSADC, {&MODULE_P00, 4}, Ifx_RxSel_a}

Definition at line 94 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_SGNB_P33_13_IN

IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN = {&MODULE_DSADC, {&MODULE_P33,13}, Ifx_RxSel_b}

Definition at line 95 of file IfxDsadc_PinMap.c.


iLLD_TC26B: IfxDsadc_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxDsadc_PinMap.h File Reference
iLLD » DSADC

DSADC I/O map. More...

#include <IfxDsadc_reg.h>
#include <_Impl/IfxDsadc_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxDsadc_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxDsadc_Dsn_In
DS negative pin mapping structure. More...
struct | IfxDsadc_Dsp_In
DS positive pin mapping structure. More...
struct | IfxDsadc_Cin_In
CIN pin mapping structure. More...
struct | IfxDsadc_Din_In
DIN pin mapping structure. More...
struct | IfxDsadc_Itr_In
ITR pin mapping structure. More...
struct | IfxDsadc_Cgpwm_Out
CGPWM pin mapping structure. More...
struct | IfxDsadc_Sg_In
SG pin mapping structure. More...
struct | IfxDsadc_Cout_Out
COUT pin mapping structure. More...

Macros

#define | IFXDSADC_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXDSADC_PINMAP_NUM_CHANNELS 4
#define | IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS 6
#define | IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS 2
#define | IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS 3
#define | IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS 2
#define | IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS 4
#define | IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS 4
#define | IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS 6
#define | IFXDSADC_PINMAP_SG_IN_NUM_ITEMS 2

Variables

IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT
DSADC_CGPWMN: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT
DSADC_CGPWMN: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT
DSADC_CGPWMN: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT
DSADC_CGPWMP: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT
DSADC_CGPWMP: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT
DSADC_CGPWMP: DSADC output. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN
DSADC_CIN0A: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN
DSADC_CIN0B: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN
DSADC_CIN2A: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN
DSADC_CIN2B: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN
DSADC_CIN3A: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN
DSADC_CIN3B: DSADC input. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT
DSADC_COUT0: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT
DSADC_COUT0: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT
DSADC_COUT0: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT
DSADC_COUT2: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT
DSADC_COUT2: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT
DSADC_COUT3: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT
DSADC_COUT3: DSADC output. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN
DSADC_DIN0A: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN
DSADC_DIN0B: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN
DSADC_DIN2A: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN
DSADC_DIN2B: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN
DSADC_DIN3A: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN
DSADC_DIN3B: DSADC input. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN
DSADC_DS0NA: DSADC: negative analog input channel of DSADC 0 pin A. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN
DSADC_DS0NB: DSADC: negative analog input channel of DSADC 0 pin B. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN
DSADC_DS2NA: DSADC: negative analog input channel of DSADC 2 pin A. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN
DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3 pin A. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN
DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3, pin A. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN
DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3 pin B. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN
DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3, pin B. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN
DSADC_DS3NC: DSADC: negative analog input channel of DSADC 3 pin C. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN
DSADC_DS3ND: DSADC: negative analog input channel of DSADC 3 pin D. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN
DSADC_DS0PA: DSADC: positive analog input channel of DSADC 0 pin A. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN
DSADC_DS0PB: DSADC: positive analog input channel of DSADC 0 pin B. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN
DSADC_DS2PA: DSADC: positive analog input channel of DSADC 2 pin A. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN
DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3 pin A. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN
DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3, pin A. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN
DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3 pin B. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN
DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3, pin B. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN
DSADC_DS3PC: DSADC: positive analog input channel of DSADC 3 pin C. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN
DSADC_DS3PD: DSADC: positive analog input channel of DSADC 3 pin D. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN
DSADC_ITR0E: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN
DSADC_ITR0F: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN
DSADC_ITR2E: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN
DSADC_ITR2F: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN
DSADC_ITR3E: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN
DSADC_ITR3F: DSADC input. More...
IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN
DSADC_SGNA: DSADC input. More...
IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN
DSADC_SGNB: DSADC input. More...
IFX_EXTERN const IfxDsadc_Cgpwm_Out * | IfxDsadc_Cgpwm_Out_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
IfxDsadc_Cgpwm_Out table. More...
IFX_EXTERN const IfxDsadc_Cin_In * | IfxDsadc_Cin_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS]
IfxDsadc_Cin_In table. More...
IFX_EXTERN const IfxDsadc_Cout_Out * | IfxDsadc_Cout_Out_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS]
IfxDsadc_Cout_Out table. More...
IFX_EXTERN const IfxDsadc_Din_In * | IfxDsadc_Din_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS]
IfxDsadc_Din_In table. More...
IFX_EXTERN const IfxDsadc_Dsn_In * | IfxDsadc_Dsn_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS]
IfxDsadc_Dsn_In table. More...
IFX_EXTERN const IfxDsadc_Dsp_In * | IfxDsadc_Dsp_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS]
IfxDsadc_Dsp_In table. More...
IFX_EXTERN const IfxDsadc_Itr_In * | IfxDsadc_Itr_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS]
IfxDsadc_Itr_In table. More...
IFX_EXTERN const IfxDsadc_Sg_In * | IfxDsadc_Sg_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS]
IfxDsadc_Sg_In table. More...

Detailed Description

DSADC I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDsadc_PinMap.h.


iLLD_TC26B: IfxDsadc_Dsadc.h File Reference

  • Dsadc
  • Dsadc
Data Structures | Functions
IfxDsadc_Dsadc.h File Reference
iLLD » DSADC

DSADC DSADC details. More...

#include "Dsadc/Std/IfxDsadc.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxDsadc_Dsadc.h:

Go to the source code of this file.

Data Structures

struct | IfxDsadc_Dsadc_AuxFilterConfig
Auxiliary comb filter configuration structure. More...
struct | IfxDsadc_Dsadc_ChannelPins
Channel Pins Configuration structure. More...
struct | IfxDsadc_Dsadc_CombFilterConfig
Comb filter configuration structure. More...
struct | IfxDsadc_Dsadc_DemodulatorConfig
Demodulator configuration structure. More...
struct | IfxDsadc_Dsadc_FirFilterConfig
FIR filters configuration structure. More...
struct | IfxDsadc_Dsadc_IntegratorConfig
Integrator configuration structure. More...
struct | IfxDsadc_Dsadc_ModulatorConfig
Modulator configuration structure. More...
struct | IfxDsadc_Dsadc_RectifierConfig
Rectifier configuration structure. More...
struct | IfxDsadc_Dsadc
DSADC handle data structure. More...
struct | IfxDsadc_Dsadc_CarrierGenConfig
Carrier generation configuration structure. More...
struct | IfxDsadc_Dsadc_Channel
Channel handle structure. More...
struct | IfxDsadc_Dsadc_ChannelConfig
Single channel configuration structure. More...
struct | IfxDsadc_Dsadc_Config
Clock configuration data structure. More...

Functions

IFX_EXTERN void | IfxDsadc_Dsadc_initCarrierGen (IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_CarrierGenConfig *config)
Initialise the DSADC carrier generator. More...
IFX_EXTERN void | IfxDsadc_Dsadc_initModule (IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_Config *config)
Initialise the DSADC with the supplied configuration. More...
IFX_EXTERN void | IfxDsadc_Dsadc_initModuleConfig (IfxDsadc_Dsadc_Config *config, Ifx_DSADC *dsadc)
Initialise the config struct with default DSADC configuration. More...
IFX_EXTERN void | IfxDsadc_Dsadc_initChannel (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ChannelConfig *config)
Initialise a DSADC channel with the supplied configuration. More...
IFX_EXTERN void | IfxDsadc_Dsadc_initChannelConfig (IfxDsadc_Dsadc_ChannelConfig *config, IfxDsadc_Dsadc *dsadc)
Initialise the config struct with default DSADC channel configuration. More...
IFX_INLINE void | IfxDsadc_Dsadc_startScan (IfxDsadc_Dsadc *dsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels. More...
IFX_INLINE void | IfxDsadc_Dsadc_stopScan (IfxDsadc_Dsadc *dsadc, uint32 modulatorMask)
Disables the conversion of multiple channels. More...
IFX_INLINE sint16 | IfxDsadc_Dsadc_getMainResult (IfxDsadc_Dsadc_Channel *channel)
Get result from the main chain. More...
IFX_EXTERN sint16 | IfxDsadc_Dsadc_getAuxResult (IfxDsadc_Dsadc_Channel *channel)
Get result from the auxilary chain. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDsadc_Dsadc_getAuxSrc (IfxDsadc_Dsadc_Channel *channel)
Get the interrupt source register for a Aux event. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDsadc_Dsadc_getMainSrc (IfxDsadc_Dsadc_Channel *channel)
Get the interrupt source register for a Main event. More...
IFX_EXTERN void | IfxDsadc_Dsadc_initCarrierGenConfig (IfxDsadc_Dsadc_CarrierGenConfig *config)

Detailed Description

DSADC DSADC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDsadc_Dsadc.h.

Function Documentation

◆ IfxDsadc_Dsadc_initCarrierGenConfig()

IFX_EXTERN void IfxDsadc_Dsadc_initCarrierGenConfig ( IfxDsadc_Dsadc_CarrierGenConfig * config )
Parameters
config Pointer to DSADC Carrier Configuration
Returns
None

Definition at line 480 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Rdc_initConfig().


iLLD_TC26B: IfxDsadc_Rdc.h File Reference

  • Dsadc
  • Rdc
Data Structures | Functions
IfxDsadc_Rdc.h File Reference
iLLD » DSADC

DSADC RDC details. More...

#include "SysSe/Math/Ifx_AngleTrkF32.h"
#include "Dsadc/Dsadc/IfxDsadc_Dsadc.h"
#include "Gtm/Std/IfxGtm_Tim.h"
#include "_PinMap/IfxGtm_PinMap.h"
#include "Ifx_Cfg.h"
Include dependency graph for IfxDsadc_Rdc.h:

Go to the source code of this file.

Data Structures

struct | IfxDsadc_Rdc_GtmTimestamp
DSADC timestamp helper using GTM. More...
struct | IfxDsadc_Rdc_ConfigHw
RDC hardware configuration. More...
struct | IfxDsadc_Rdc_Hw
DSADC RDC hardware object structure. More...
struct | IfxDsadc_Rdc_Ts
struct | IfxDsadc_Rdc
DSADC RDC data structure. More...
struct | IfxDsadc_Rdc_Config
DSADC RDC configuration structure Note: if ALL kp, ki, kd are zero, then the init function will use default value. More...

Macros

Getting result functions
{ // within context of user's application interrupt or task
extern IfxDsadc_Rdc rdcHandle;
IfxDsadc_Rdc_update(&rdcHandle); // final update
IfxStdIf_Pos_RawAngle position = IfxDsadc_Rdc_getRawPosition(&rdcHandle);
StdReal speedRad_s = IfxDsadc_Rdc_getSpeed(&rdcHandle);
}

Alternatively, the application may use Standard interface: Position interface for accessing the actual results.

{ // within context of user's application interrupt or task
extern IfxDsadc_Rdc rdcHandle;
Ifx_AngleTrkF32_PosIf* posIf = (Ifx_AngleTrkF32_PosIf*)&rdcHandle; // cast is safe because it's located in the same address
PosIf_update(posIf); // final update, alias of IfxDsadc_Rdc_update()
elAngle = PosIf_getElAngle(posIf);
elSpeed = PosIf_getElSpeed(posIf);
faultOccurred = PosIf_isFault(posIf);
}
Note
the IfxDsadc_Rdc_update() is implementing the PosIf_update(). Therefore, only one of them shall be used.
#define | IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION (1)
#define | IFXDSADC_RDC_CFG_DEBUG (0)

Functions

IFX_EXTERN boolean | IfxDsadc_Rdc_init (IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the DSADC RDC driver by initialising: More...
IFX_EXTERN void | IfxDsadc_Rdc_initConfig (IfxDsadc_Rdc_Config *config)
IFX_INLINE IfxStdIf_Pos_Status | IfxDsadc_Rdc_getFault (IfxDsadc_Rdc *driver)
IFX_INLINE uint16 | IfxDsadc_Rdc_getPeriodPerRotation (IfxDsadc_Rdc *driver)
IFX_INLINE IfxStdIf_Pos_RawAngle | IfxDsadc_Rdc_getRawPosition (IfxDsadc_Rdc *driver)
IFX_INLINE float32 | IfxDsadc_Rdc_getSpeed (IfxDsadc_Rdc *driver)
IFX_EXTERN float32 | IfxDsadc_Rdc_getAbsolutePosition (IfxDsadc_Rdc *driver)
see IfxStdIf_Pos_GetAbsolutePosition More...
IFX_EXTERN IfxStdIf_Pos_Dir | IfxDsadc_Rdc_getDirection (IfxDsadc_Rdc *driver)
IFX_EXTERN sint32 | IfxDsadc_Rdc_getOffset (IfxDsadc_Rdc *driver)
IFX_EXTERN float32 | IfxDsadc_Rdc_getPosition (IfxDsadc_Rdc *driver)
IFX_EXTERN float32 | IfxDsadc_Rdc_getRefreshPeriod (IfxDsadc_Rdc *driver)
IFX_EXTERN sint32 | IfxDsadc_Rdc_getResolution (IfxDsadc_Rdc *driver)
IFX_EXTERN IfxStdIf_Pos_SensorType | IfxDsadc_Rdc_getSensorType (IfxDsadc_Rdc *driver)
IFX_EXTERN sint32 | IfxDsadc_Rdc_getTurn (IfxDsadc_Rdc *driver)
IFX_EXTERN void | IfxDsadc_Rdc_onEventA (IfxDsadc_Rdc *driver)
IFX_EXTERN void | IfxDsadc_Rdc_reset (IfxDsadc_Rdc *driver)
IFX_EXTERN void | IfxDsadc_Rdc_resetFaults (IfxDsadc_Rdc *driver)
IFX_EXTERN void | IfxDsadc_Rdc_setOffset (IfxDsadc_Rdc *driver, sint32 offset)
IFX_EXTERN void | IfxDsadc_Rdc_setRefreshPeriod (IfxDsadc_Rdc *driver, float32 updatePeriod)
IFX_EXTERN boolean | IfxDsadc_Rdc_stdIfPosInit (IfxStdIf_Pos *stdif, IfxDsadc_Rdc *driver)
Initializes the standard interface "Pos". More...
IFX_EXTERN void | IfxDsadc_Rdc_update (IfxDsadc_Rdc *driver)
IFX_INLINE float32 | IfxDsadc_Rdc_getTimestamp (IfxDsadc_Rdc *driver)
Return timestamp in seconds. More...
IFX_EXTERN void | IfxDsadc_Rdc_startConversion (IfxDsadc_Rdc *driver)
Synchronously start of both DSADC H/W channels. More...

Detailed Description

DSADC RDC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Please refer to page Resolver-to-digital Converter with DSADC for more details. This module uses the following modules:

  • DSADC
  • Angle-Tracking Observer

Example usage: Initialisation shall be done by using IfxDsadc_Rdc_init().

IfxDsadc_Rdc rdcHandle;
IfxDsadc_Rdc_Config rdcConfig;
IfxDsadc_Rdc_initConfig(&rdcConfig);
rdcConfig.hardware.inputConfig.module = &MODULE_DSADC;
IfxDsadc_Rdc_init(&rdcHandle, &rdcConfig);
IfxDsadc_Rdc_startConversion(&rdcHandle);

After successful initialisation, one DSADC channel may generate interrupt request to CPU. Function IfxDsadc_Rdc_onEventA() shall be called in the interrupt service routine.

The function IfxDsadc_Rdc_update() shall be called in the user application's task or interrupt context for updating the final outputs (position and speed), (e.g. running inside motor PWM interrupt context)

Definition in file IfxDsadc_Rdc.h.

Macro Definition Documentation

◆ IFXDSADC_RDC_CFG_DEBUG

#define IFXDSADC_RDC_CFG_DEBUG (0)

Definition at line 311 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_updateTimestamp().

◆ IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION

#define IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION (1)

Definition at line 307 of file IfxDsadc_Rdc.h.


iLLD_TC26B: IfxDsadc.h File Reference

  • Dsadc
  • Std
Enumerations | Functions
IfxDsadc.h File Reference
iLLD » DSADC

DSADC basic functionality. More...

#include "_Impl/IfxDsadc_cfg.h"
#include "Src/Std/IfxSrc.h"
#include "Scu/Std/IfxScuCcu.h"
#include "_PinMap/IfxDsadc_PinMap.h"
#include "IfxDsadc_reg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxDsadc.h:

Go to the source code of this file.

Enumerations

enum IfxDsadc_AuxCombFilterShift {
IfxDsadc_AuxCombFilterShift_noShift = 0,
IfxDsadc_AuxCombFilterShift_shiftBy1 = 1,
IfxDsadc_AuxCombFilterShift_shiftBy2 = 2,
IfxDsadc_AuxCombFilterShift_shiftBy3 = 3
}
Comb Filter (auxiliary) shift control
Definition in Ifx_DSADC.FCFGA.B.AFSC. More...
enum IfxDsadc_AuxCombFilterType {
IfxDsadc_AuxCombFilterType_comb1 = 0,
IfxDsadc_AuxCombFilterType_comb2 = 1,
IfxDsadc_AuxCombFilterType_comb3 = 2,
IfxDsadc_AuxCombFilterType_combF = 3
}
Comb Filter (auxiliary) configuration/type
Definition in Ifx_DSADC.FCFGA.B.CFAC. More...
enum IfxDsadc_AuxEvent {
IfxDsadc_AuxEvent_everyNewResult = 0,
IfxDsadc_AuxEvent_insideBoundary = 1,
IfxDsadc_AuxEvent_outsideBoundary = 2
}
Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.ESEL. More...
enum IfxDsadc_AuxGate {
IfxDsadc_AuxGate_definedByESEL = 0,
IfxDsadc_AuxGate_coupledToIntegrator = 1
}
Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.EGT. More...
enum IfxDsadc_AuxServiceRequest {
IfxDsadc_AuxServiceRequest_never = 0,
IfxDsadc_AuxServiceRequest_auxFilter = 1,
IfxDsadc_AuxServiceRequest_altSource = 2
}
Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.SRGA. More...
enum IfxDsadc_CarrierWaveformMode {
IfxDsadc_CarrierWaveformMode_stopped = 0,
IfxDsadc_CarrierWaveformMode_square = 1,
IfxDsadc_CarrierWaveformMode_triangle = 2,
IfxDsadc_CarrierWaveformMode_sine = 3
}
Carrier generation mode
Definition in Ifx_DSADC.CGCFG.B.CGMOD. More...
enum IfxDsadc_ChannelId {
IfxDsadc_ChannelId_0 = 0,
IfxDsadc_ChannelId_2 = 2,
IfxDsadc_ChannelId_3 = 3
}
Specifies the channel Index. More...
enum IfxDsadc_CommonModeVoltage {
IfxDsadc_CommonModeVoltage_a = 0,
IfxDsadc_CommonModeVoltage_b = 1,
IfxDsadc_CommonModeVoltage_c = 2
}
Modulator common mode voltage selection
Definition in Ifx_DSADC.MODCFGx.B.CMVS. More...
enum IfxDsadc_FirDataShift {
IfxDsadc_FirDataShift_noShift = 0,
IfxDsadc_FirDataShift_shiftBy1 = 1,
IfxDsadc_FirDataShift_shiftBy2 = 2,
IfxDsadc_FirDataShift_shiftBy3 = 3
}
FIR data shift control
Selects the displacement caused by the data shifter at the FIR filter output
Definition in Ifx_DSADC.FCFGM.B.DSH. More...
enum IfxDsadc_FirInternalShift {
IfxDsadc_FirInternalShift_noShift = 0,
IfxDsadc_FirInternalShift_shiftBy1 = 1
}
FIR shift control
Selects the displacement caused by the data shifter inbetween the FIR filter blocks.
Definition in Ifx_DSADC.FCFGM.B.FSH. More...
enum IfxDsadc_InputConfig {
IfxDsadc_InputConfig_inputPin = 0,
IfxDsadc_InputConfig_supplyVoltage = 1,
IfxDsadc_InputConfig_commonModeVoltage = 2,
IfxDsadc_InputConfig_referenceGround = 3
}
Modulator configuration of positive/negative input line
Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN. More...
enum IfxDsadc_InputDataSource {
IfxDsadc_InputDataSource_onChipStandAlone = 0,
IfxDsadc_InputDataSource_onChipCombined = 1,
IfxDsadc_InputDataSource_directInputA = 2,
IfxDsadc_InputDataSource_invertedInputA = 3,
IfxDsadc_InputDataSource_directInputB = 4,
IfxDsadc_InputDataSource_invertedInputB = 5
}
Demodulator input data source selection
Definition in Ifx_DSADC.DICFG.B.DSRC. More...
enum IfxDsadc_InputGain {
IfxDsadc_InputGain_factor1 = 0,
IfxDsadc_InputGain_factor2 = 1,
IfxDsadc_InputGain_factor4 = 2,
IfxDsadc_InputGain_factor8 = 3,
IfxDsadc_InputGain_factor16 = 4
}
Modulator gain select of analog input path
Definition in Ifx_DSADC.MODCFGx.B.GAINSEL. More...
enum IfxDsadc_InputPin {
IfxDsadc_InputPin_a = 0,
IfxDsadc_InputPin_b = 1,
IfxDsadc_InputPin_c = 2,
IfxDsadc_InputPin_d = 3
}
Modulator input pin selection
Definition in Ifx_DSADC.MODCFGx.B.INMUX. More...
enum IfxDsadc_IntegrationWindowSize {
IfxDsadc_IntegrationWindowSize_internalControl = 0,
IfxDsadc_IntegrationWindowSize_externalControl = 1
}
Integrator window size
Definition in Ifx_DSADC.IWCTR.B.IWS. More...
enum IfxDsadc_IntegratorTrigger {
IfxDsadc_IntegratorTrigger_bypassed = 0,
IfxDsadc_IntegratorTrigger_fallingEdge = 1,
IfxDsadc_IntegratorTrigger_risingEdge = 2,
IfxDsadc_IntegratorTrigger_alwaysActive = 3
}
Integrator trigger mode
NOTE: switch-first to bypassed before using other mode
Definition in Ifx_DSADC.DICFG.B.ITRMODE. More...
enum IfxDsadc_LowPowerSupply {
IfxDsadc_LowPowerSupply_5V = 0,
IfxDsadc_LowPowerSupply_3_3V = 1
}
Low power supply voltage select
Definition in Ifx_DSADC.GLOBCFG.B.LOSUP. More...
enum IfxDsadc_MainCombFilterShift {
IfxDsadc_MainCombFilterShift_noShift = 0,
IfxDsadc_MainCombFilterShift_shiftBy1 = 1,
IfxDsadc_MainCombFilterShift_shiftBy2 = 2,
IfxDsadc_MainCombFilterShift_shiftBy3 = 3
}
Comb Filter (Main Chain) shift control
Definition in Ifx_DSADC.FCFGC.B.MFSC. More...
enum IfxDsadc_MainCombFilterType {
IfxDsadc_MainCombFilterType_comb1 = 0,
IfxDsadc_MainCombFilterType_comb2 = 1,
IfxDsadc_MainCombFilterType_comb3 = 2,
IfxDsadc_MainCombFilterType_combF = 3
}
Comb Filter (Main Chain) configuration/type
Definition in Ifx_DSADC.FCFGC.B.CFMC. More...
enum IfxDsadc_MainServiceRequest {
IfxDsadc_MainServiceRequest_never = 0,
IfxDsadc_MainServiceRequest_highGateSignal = 1,
IfxDsadc_MainServiceRequest_lowGateSignal = 2,
IfxDsadc_MainServiceRequest_everyNewResult = 3
}
Service request generation (main chain)
Definition in Ifx_DSADC.FCFGC.B.SRGM. More...
enum IfxDsadc_ModulatorClock {
IfxDsadc_ModulatorClock_off = 0,
IfxDsadc_ModulatorClock_fDSD = 1,
IfxDsadc_ModulatorClock_fERAY = 2,
IfxDsadc_ModulatorClock_fOSC0 = 3
}
Modulator clock select
Definition in Ifx_DSADC.GLOBCFG.B.MCSEL. More...
enum IfxDsadc_ModulatorClockDivider {
IfxDsadc_ModulatorClockDivider_div2 = 0,
IfxDsadc_ModulatorClockDivider_div4,
IfxDsadc_ModulatorClockDivider_div6,
IfxDsadc_ModulatorClockDivider_div8,
IfxDsadc_ModulatorClockDivider_div10,
IfxDsadc_ModulatorClockDivider_div12,
IfxDsadc_ModulatorClockDivider_div14,
IfxDsadc_ModulatorClockDivider_div16,
IfxDsadc_ModulatorClockDivider_div18,
IfxDsadc_ModulatorClockDivider_div20,
IfxDsadc_ModulatorClockDivider_div22,
IfxDsadc_ModulatorClockDivider_div24,
IfxDsadc_ModulatorClockDivider_div26,
IfxDsadc_ModulatorClockDivider_div28,
IfxDsadc_ModulatorClockDivider_div30,
IfxDsadc_ModulatorClockDivider_div32
}
Modulator divider factor for modulator clock
Definition in Ifx_DSADC.MODCFGx.B.DIVM. More...
enum IfxDsadc_RectifierSignSource {
IfxDsadc_RectifierSignSource_onChipGenerator = 0,
IfxDsadc_RectifierSignSource_nextChannel = 1,
IfxDsadc_RectifierSignSource_externalA = 2,
IfxDsadc_RectifierSignSource_externalB = 3
}
Rectifier sign source
Selects the sign signal that is to be delayed.
Definition in Ifx_DSADC.RECT.B.SSRC. More...
enum IfxDsadc_SampleClockSource {
IfxDsadc_SampleClockSource_internal = 0,
IfxDsadc_SampleClockSource_inputA = 1,
IfxDsadc_SampleClockSource_inputB = 2,
IfxDsadc_SampleClockSource_inputC = 3
}
Demodulator sample clock source select
Definition in Ifx_DSADC.DICFG.B.CSRC. More...
enum IfxDsadc_SampleStrobe {
IfxDsadc_SampleStrobe_noDataStrobe = 0,
IfxDsadc_SampleStrobe_sampleOnRisingEdge = 1,
IfxDsadc_SampleStrobe_sampleOnFallingEdge = 2,
IfxDsadc_SampleStrobe_sampleOnBothEdges = 3,
IfxDsadc_SampleStrobe_reserved = 4,
IfxDsadc_SampleStrobe_sampleOnTwoRisingEdges = 5,
IfxDsadc_SampleStrobe_sampleOnTwoFallingEdges = 6
}
Demodulator data strobe generation mode
Definition in Ifx_DSADC.DICFG.B.STROBE. More...
enum IfxDsadc_SleepMode {
IfxDsadc_SleepMode_enable = 0,
IfxDsadc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_DSADC.CLC.B.EDIS. More...
enum IfxDsadc_TimestampTrigger {
IfxDsadc_TimestampTrigger_noTrigger = 0,
IfxDsadc_TimestampTrigger_fallingEdge = 1,
IfxDsadc_TimestampTrigger_risingEdge = 2,
IfxDsadc_TimestampTrigger_eachEdge = 3
}
Timestamp trigger mode
Definition in Ifx_DSADC.DICFG.B.TSTRMODE. More...
enum IfxDsadc_TriggerInput {
IfxDsadc_TriggerInput_a = 0,
IfxDsadc_TriggerInput_b = 1,
IfxDsadc_TriggerInput_c = 2,
IfxDsadc_TriggerInput_d = 3,
IfxDsadc_TriggerInput_e = 4,
IfxDsadc_TriggerInput_f = 5,
IfxDsadc_TriggerInput_g = 6,
IfxDsadc_TriggerInput_h = 7
}
Trigger select
Definition in Ifx_DSADC.DICFG.B.TRSEL. More...

Functions

IFX_INLINE void | IfxDsadc_setSleepMode (Ifx_DSADC *dsadc, IfxDsadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxDsadc_startScan (Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels. More...
IFX_INLINE void | IfxDsadc_stopScan (Ifx_DSADC *dsadc, uint32 modulatorMask)
Disables the conversion of multiple channels. More...
IFX_EXTERN void | IfxDsadc_resetModule (Ifx_DSADC *dsadc)
resets the DSADC kernel More...
IFX_INLINE sint16 | IfxDsadc_getAuxResult (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the auxiliary chain. More...
IFX_INLINE uint16 | IfxDsadc_getMainCombDecimation (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the main comb decimation factor. More...
IFX_INLINE sint16 | IfxDsadc_getMainResult (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the main chain. More...
IFX_INLINE boolean | IfxDsadc_isModuleEnabled (Ifx_DSADC *dsadc)
Return TRUE if DSADC module is enabled. More...
IFX_INLINE void | IfxDsadc_setCarrierMode (Ifx_DSADC *dsadc, IfxDsadc_CarrierWaveformMode waveformMode)
Set the carrier waveform mode. More...
IFX_EXTERN float32 | IfxDsadc_getIntegratorOutFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the integrator output in Hz. More...
IFX_EXTERN float32 | IfxDsadc_getMainCombOutFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the main COMB filter output in Hz. More...
IFX_EXTERN float32 | IfxDsadc_getMainGroupDelay (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Estimate the group delay of main-chain filters in seconds. More...
IFX_EXTERN float32 | IfxDsadc_getModulatorClockFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the modulator clock frequency in Hz. More...
IFX_EXTERN float32 | IfxDsadc_getModulatorInputClockFreq (Ifx_DSADC *dsadc)
Get the input frequency of DSADC in Hz. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxDsadc_getAuxSrc (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Address/pointer to the interrupt source register. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxDsadc_getMainSrc (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the interrupt source register for a Main event. More...
IFX_INLINE void | IfxDsadc_initCgPwmPin (const IfxDsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a CGPWM output. More...
IFX_INLINE void | IfxDsadc_initCinPin (const IfxDsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver)
Initializes a CIN input. More...
IFX_INLINE void | IfxDsadc_initCoutPin (const IfxDsadc_Cout_Out *cout, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a COUT output. More...
IFX_INLINE void | IfxDsadc_initDinPin (const IfxDsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver)
Initializes a DIN input. More...
IFX_INLINE void | IfxDsadc_initDsnPin (const IfxDsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input. More...
IFX_INLINE void | IfxDsadc_initDspPin (const IfxDsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input. More...
IFX_INLINE void | IfxDsadc_initItrPin (const IfxDsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver)
Initializes a ITR input. More...
IFX_INLINE void | IfxDsadc_initSgPin (const IfxDsadc_Sg_In *sg, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SG input. More...

Detailed Description

DSADC basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDsadc.h.


iLLD_TC26B: DTS

Modules | Files
DTS
iLLD
Collaboration diagram for DTS:

Modules

Implementation
Standard Driver
How to use the DTS Interface driver?
DTS

Files

file | IfxDts_cfg.h
DTS on-chip implementation data.
file | IfxDts_Dts.h
DTS DTS details.
file | IfxDts.h
DTS basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » DTS
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » DTS
Collaboration diagram for Standard Driver:

Modules

Control functions
Status functions

Detailed Description


iLLD_TC26B: Control functions

Functions
Control functions
iLLD » DTS » Standard Driver
Collaboration diagram for Control functions:

Functions

IFX_INLINE void | IfxDts_disableSensorControl (void)
Disable the writing of register bits except START bit. More...
IFX_INLINE void | IfxDts_enableSensor (void)
Enables the DTS sensor. More...
IFX_INLINE void | IfxDts_startSensor (void)
Starts the next temperature measurement. More...

Detailed Description

Function Documentation

◆ IfxDts_disableSensorControl()

IFX_INLINE void IfxDts_disableSensorControl ( void )

Disable the writing of register bits except START bit.

Returns
None

Definition at line 120 of file IfxDts.h.

Referenced by IfxDts_Dts_initModule().

◆ IfxDts_enableSensor()

IFX_INLINE void IfxDts_enableSensor ( void )

Enables the DTS sensor.

Returns
None

Definition at line 127 of file IfxDts.h.

Referenced by IfxDts_Dts_initModule().

◆ IfxDts_startSensor()

IFX_INLINE void IfxDts_startSensor ( void )

Starts the next temperature measurement.

Returns
None

Definition at line 151 of file IfxDts.h.

Referenced by IfxDts_Dts_startSensor().


iLLD_TC26B: Status functions

Functions
Status functions
iLLD » DTS » Standard Driver
Collaboration diagram for Status functions:

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDts_getSrcPointer (void)
Gets the Interrupt request source. More...
IFX_INLINE uint16 | IfxDts_getTemperatureValue (void)
Read the temperature measurement result. More...
IFX_INLINE boolean | IfxDts_isBusy (void)
Returns the current BUSY status of the Sensor. More...

Detailed Description

Function Documentation

◆ IfxDts_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxDts_getSrcPointer ( void )

Gets the Interrupt request source.

Returns
Address of interrupt request source

Definition at line 133 of file IfxDts.h.

Referenced by IfxDts_Dts_initModule().

◆ IfxDts_getTemperatureValue()

IFX_INLINE uint16 IfxDts_getTemperatureValue ( void )

Read the temperature measurement result.

Returns
Temperature measurement result

Definition at line 139 of file IfxDts.h.

Referenced by IfxDts_Dts_getTemperatureCelsius(), and IfxDts_Dts_getTemperatureValue().

◆ IfxDts_isBusy()

IFX_INLINE boolean IfxDts_isBusy ( void )

Returns the current BUSY status of the Sensor.

Returns
TRUE if Sensor is busy in measuring temperature otherwise FALSE

Definition at line 145 of file IfxDts.h.

Referenced by IfxDts_Dts_isBusy(), and IfxDts_Dts_startSensor().


iLLD_TC26B: How to use the DTS Interface driver?

How to use the DTS Interface driver?
iLLD » DTS
Collaboration diagram for How to use the DTS Interface driver?:

DTS gives the die-temperature result which will decoded to standard temperature value. Minimum first two temperature results are to be ignored to get reliable temperature.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Dts/Dts/IfxDts_Dts.h>

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_DTS 1

Add the interrupt service routine to your C code which should do the error flag handling:

IFX_INTERRUPT(dtsISR, 0, IFX_INTPRIO_DTS)
{
// DTS finished temperature measurement
uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
// here we could do something with the value...
// and the DTS can be restarted
IfxDts_Dts_startSensor();
}

Finally install the interrupt handler in your initialisation function:

// install interrupt handler
IfxCpu_Irq_installInterruptHandler(&dtsISR, IFX_INTPRIO_DTS);
IfxCpu_enableInterrupts();

DTS Module Initialisation

The module initialisation can be done in the same function:

// Get the default configuration
IfxDts_Dts_Config dtsConfig;
IfxDts_Dts_initModuleConfig(&dtsConfig);
// Adapt the default configuration if required
dtsConfig.isrPriority = IFX_INTPRIO_DTS;
dtsConfig.isrTypeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
dtsConfig.lowerTemperatureLimit = -35; // SMU alarm if temperature value is below this Celsius value
dtsConfig.upperTemperatureLimit = 150; // SMU alarm if temperature value is above this Celsius value
// Module initialisation
IfxDts_Dts_initModule(&dtsConfig);

Now, DTS is initialised for starting temperature measurements:

IfxDts_Dts_startSensor();

IRQ based measurements

Whenever the interrupt handler is called, a new measurment result is available and could be processed further (e.g. for statistical analysis).

IFX_INTERRUPT(dtsISR, 0, IFX_INTPRIO_DTS)
{
// DTS finished temperature measurement
uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
// here we could do something with the value...
// and the DTS can be restarted
IfxDts_Dts_startSensor();
}

Measurements without IRQs

If no interrupt routine should be used, a new measurement result can be requested the following way:

// start Sensor
IfxDts_Dts_startSensor();
// wait until a new result is available
while( IfxDts_Dts_isBusy() );
uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();

Alternatively (and this is the normal usage), the DTS could be periodically started from a timer routine, e.g. each mS. The conversion itself takes 100 uS maximum.

Temperature conversion

Following function returns the actual temperature in Celsius:

float32 temperature = IfxDts_Dts_getTemperatureCelsius();


iLLD_TC26B: DTS

Modules
DTS
iLLD » DTS
Collaboration diagram for DTS:

Modules

Data Structures
Module Initialisation functions
Sensor Functions
Conversion Functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » DTS » DTS
Collaboration diagram for Data Structures:

Data Structures

struct IfxDts_Dts_Config
DTS module configuration structure. More...

Detailed Description

Data Structure Documentation

◆ IfxDts_Dts_Config

struct IfxDts_Dts_Config

DTS module configuration structure.

Definition at line 181 of file IfxDts_Dts.h.

Data Fields
boolean | enableSecureLock | MODULE_SCU.DTSCON.SLCK,MODULE_SCU.DTSLIM.SLCK, Specifies the Security Lock for Configuration and Limitation register.
uint16 | isrPriority | interrupt priority
IfxSrc_Tos | isrTypeOfService | type of interrupt service
float32 | lowerTemperatureLimit | Specifies the lower temperature limit compared against die temperature in Celsius. A SMU will be triggered if the measurement result is below this limit
boolean | sensorControlDisabled | MODULE_SCU.DTSCON.SCLK, specifies the control register lock except MODULE_SCU.DTSCON.START.
float32 | upperTemperatureLimit | Specifies the upper temperature limit compared against die temperature in Celsius. A SMU will be triggered if the measurement result is above this limit


iLLD_TC26B: Module Initialisation functions

Functions
Module Initialisation functions
iLLD » DTS » DTS
Collaboration diagram for Module Initialisation functions:

Functions

IFX_EXTERN void | IfxDts_Dts_initModule (const IfxDts_Dts_Config *config)
Initialise the DTS with supplied configuration. More...
IFX_EXTERN void | IfxDts_Dts_initModuleConfig (IfxDts_Dts_Config *config)
Intialises the module configuration buffer with default configuration. More...

Detailed Description

Function Documentation

◆ IfxDts_Dts_initModule()

IFX_EXTERN void IfxDts_Dts_initModule ( const IfxDts_Dts_Config * config )

Initialise the DTS with supplied configuration.

Parameters
config pointer to module configuration structure
Returns
None

Usage Example : How to use the DTS Interface driver?

Definition at line 75 of file IfxDts_Dts.c.

◆ IfxDts_Dts_initModuleConfig()

IFX_EXTERN void IfxDts_Dts_initModuleConfig ( IfxDts_Dts_Config * config )

Intialises the module configuration buffer with default configuration.

Parameters
config pointer to module configuration structure
Returns
None

Usage Example : How to use the DTS Interface driver?

Definition at line 125 of file IfxDts_Dts.c.


iLLD_TC26B: Sensor Functions

Functions
Sensor Functions
iLLD » DTS » DTS
Collaboration diagram for Sensor Functions:

Functions

IFX_INLINE float32 | IfxDts_Dts_getTemperatureCelsius (void)
Returns the converted temperature in Celsius. More...
IFX_INLINE uint16 | IfxDts_Dts_getTemperatureValue (void)
Returns the unconverted temperature measurement result. More...
IFX_INLINE boolean | IfxDts_Dts_isBusy (void)
Returns the current BUSY status of the Sensor. More...
IFX_INLINE void | IfxDts_Dts_startSensor (void)
Starts the next temperature measurement. More...

Detailed Description

Function Documentation

◆ IfxDts_Dts_getTemperatureCelsius()

IFX_INLINE float32 IfxDts_Dts_getTemperatureCelsius ( void )

Returns the converted temperature in Celsius.

Returns
The temperature based on the DTS temperature value

Usage Example : How to use the DTS Interface driver?

Definition at line 290 of file IfxDts_Dts.h.

◆ IfxDts_Dts_getTemperatureValue()

IFX_INLINE uint16 IfxDts_Dts_getTemperatureValue ( void )

Returns the unconverted temperature measurement result.

Returns
current sensor measured result.

Usage Example : How to use the DTS Interface driver?

Definition at line 296 of file IfxDts_Dts.h.

◆ IfxDts_Dts_isBusy()

IFX_INLINE boolean IfxDts_Dts_isBusy ( void )

Returns the current BUSY status of the Sensor.

Returns
TRUE if Sensor is busy in measuring temperature otherwise FALSE

Usage Example : How to use the DTS Interface driver?

Definition at line 302 of file IfxDts_Dts.h.

Referenced by IfxDts_Dts_initModule().

◆ IfxDts_Dts_startSensor()

IFX_INLINE void IfxDts_Dts_startSensor ( void )

Starts the next temperature measurement.

Returns
None

Usage Example : How to use the DTS Interface driver?

Definition at line 308 of file IfxDts_Dts.h.

Referenced by IfxDts_Dts_initModule().


iLLD_TC26B: Conversion Functions

Functions
Conversion Functions
iLLD » DTS » DTS
Collaboration diagram for Conversion Functions:

Functions

IFX_EXTERN uint16 | IfxDts_Dts_convertFromCelsius (float32 temperatureValue)
Converts a temperature value in Celsius to DTS value. More...
IFX_EXTERN float32 | IfxDts_Dts_convertToCelsius (uint16 dtsValue)
Converts the measurement value returned from DTS to Celsius. More...

Detailed Description

Function Documentation

◆ IfxDts_Dts_convertFromCelsius()

IFX_EXTERN uint16 IfxDts_Dts_convertFromCelsius ( float32 temperatureValue )

Converts a temperature value in Celsius to DTS value.

Parameters
temperatureValue the temperature in Celsius
Returns
the appr. DTS value

Definition at line 52 of file IfxDts_Dts.c.

Referenced by IfxDts_Dts_initModule().

◆ IfxDts_Dts_convertToCelsius()

IFX_EXTERN float32 IfxDts_Dts_convertToCelsius ( uint16 dtsValue )

Converts the measurement value returned from DTS to Celsius.

Parameters
dtsValue measurement value returned from DTS
Returns
temperature in Celsius

Definition at line 69 of file IfxDts_Dts.c.

Referenced by IfxDts_Dts_getTemperatureCelsius().


iLLD_TC26B: IfxDts_cfg.h File Reference

  • _Impl
Macros
IfxDts_cfg.h File Reference
iLLD » DTS

DTS on-chip implementation data. More...

Go to the source code of this file.

Macros

#define IFXDTS_NUM_MODULES (1)

Detailed Description

DTS on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDts_cfg.h.

Macro Definition Documentation

◆ IFXDTS_NUM_MODULES

#define IFXDTS_NUM_MODULES (1)

Definition at line 60 of file IfxDts_cfg.h.


iLLD_TC26B: IfxDts_Dts.h File Reference

  • Dts
  • Dts
Data Structures | Functions
IfxDts_Dts.h File Reference
iLLD » DTS

DTS DTS details. More...

#include "Dts/Std/IfxDts.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxDts_Dts.h:

Go to the source code of this file.

Data Structures

struct IfxDts_Dts_Config
DTS module configuration structure. More...

Functions

IFX_EXTERN void | IfxDts_Dts_initModule (const IfxDts_Dts_Config *config)
Initialise the DTS with supplied configuration. More...
IFX_EXTERN void | IfxDts_Dts_initModuleConfig (IfxDts_Dts_Config *config)
Intialises the module configuration buffer with default configuration. More...
IFX_INLINE float32 | IfxDts_Dts_getTemperatureCelsius (void)
Returns the converted temperature in Celsius. More...
IFX_INLINE uint16 | IfxDts_Dts_getTemperatureValue (void)
Returns the unconverted temperature measurement result. More...
IFX_INLINE boolean | IfxDts_Dts_isBusy (void)
Returns the current BUSY status of the Sensor. More...
IFX_INLINE void | IfxDts_Dts_startSensor (void)
Starts the next temperature measurement. More...
IFX_EXTERN uint16 | IfxDts_Dts_convertFromCelsius (float32 temperatureValue)
Converts a temperature value in Celsius to DTS value. More...
IFX_EXTERN float32 | IfxDts_Dts_convertToCelsius (uint16 dtsValue)
Converts the measurement value returned from DTS to Celsius. More...

Detailed Description

DTS DTS details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDts_Dts.h.


iLLD_TC26B: IfxDts.h File Reference

  • Dts
  • Std
Functions
IfxDts.h File Reference
iLLD » DTS

DTS basic functionality. More...

#include "_Impl/IfxDts_cfg.h"
#include "IfxScu_reg.h"
#include "IfxScu_bf.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxDts.h:

Go to the source code of this file.

Functions

IFX_INLINE void | IfxDts_disableSensorControl (void)
Disable the writing of register bits except START bit. More...
IFX_INLINE void | IfxDts_enableSensor (void)
Enables the DTS sensor. More...
IFX_INLINE void | IfxDts_startSensor (void)
Starts the next temperature measurement. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDts_getSrcPointer (void)
Gets the Interrupt request source. More...
IFX_INLINE uint16 | IfxDts_getTemperatureValue (void)
Read the temperature measurement result. More...
IFX_INLINE boolean | IfxDts_isBusy (void)
Returns the current BUSY status of the Sensor. More...
IFX_EXTERN boolean | IfxDts_isReady (void)
Returns the current READY status of the Sensor. More...

Detailed Description

DTS basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDts.h.

Function Documentation

◆ IfxDts_isReady()

IFX_EXTERN boolean IfxDts_isReady ( void )

Returns the current READY status of the Sensor.

Returns
TRUE if Sensor is ready for measuring temperature otherwise FALSE

Definition at line 52 of file IfxDts.c.

Referenced by IfxDts_Dts_initModule().


iLLD_TC26B: EMEM

Modules | Files
EMEM
iLLD
Collaboration diagram for EMEM:

Modules

Implementation
Standard Driver

Files

file | IfxEmem_cfg.h
EMEM on-chip implementation data.
file | IfxEmem.h
EMEM basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » EMEM
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » EMEM
Collaboration diagram for Standard Driver:

Modules

Enumerations
Module Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » EMEM » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxEmem_LockedState {
IfxEmem_LockedState_locked = 0,
IfxEmem_LockedState_unlocked = 1
}
EMEM lock state defined in MODULE_EMEM.SBRCTR.B.STBLOCK. More...
enum IfxEmem_State {
IfxEmem_State_disabled = 0,
IfxEmem_State_enabled = 1
}
EMEM module clock enabled or disabled state defined in MODULE_EMEM.CLC.B.DISR. More...
enum IfxEmem_TileConfigMode { IfxEmem_TileConfigMode_calibMode = 0 }
EMEM tile configuration mode defined in MODULE_EMEM.TILECONFIG.B.Tx( x = 0,1,..). More...
enum IfxEmem_TileNumber {
IfxEmem_TileNumber_0 = 0,
IfxEmem_TileNumber_1,
IfxEmem_TileNumber_2,
IfxEmem_TileNumber_3,
IfxEmem_TileNumber_4,
IfxEmem_TileNumber_5,
IfxEmem_TileNumber_6,
IfxEmem_TileNumber_7,
IfxEmem_TileNumber_8,
IfxEmem_TileNumber_9,
IfxEmem_TileNumber_10,
IfxEmem_TileNumber_11,
IfxEmem_TileNumber_12,
IfxEmem_TileNumber_13,
IfxEmem_TileNumber_14,
IfxEmem_TileNumber_15
}
Tile Number. More...

Detailed Description

Enumeration Type Documentation

◆ IfxEmem_LockedState

enum IfxEmem_LockedState

EMEM lock state defined in MODULE_EMEM.SBRCTR.B.STBLOCK.

Enumerator
IfxEmem_LockedState_locked | EMEM locked state.
IfxEmem_LockedState_unlocked | EMEM unlocked state.

Definition at line 65 of file IfxEmem.h.

◆ IfxEmem_State

enum IfxEmem_State

EMEM module clock enabled or disabled state defined in MODULE_EMEM.CLC.B.DISR.

Enumerator
IfxEmem_State_disabled | EMEM module clock disabled state.
IfxEmem_State_enabled | EMEM module clock enabled state.

Definition at line 73 of file IfxEmem.h.

◆ IfxEmem_TileConfigMode

enum IfxEmem_TileConfigMode

EMEM tile configuration mode defined in MODULE_EMEM.TILECONFIG.B.Tx( x = 0,1,..).

Enumerator
IfxEmem_TileConfigMode_calibMode

EMEM tile mode to calibration memory.

Definition at line 81 of file IfxEmem.h.

◆ IfxEmem_TileNumber

enum IfxEmem_TileNumber

Tile Number.

Enumerator
IfxEmem_TileNumber_0 | Tile Number0.
IfxEmem_TileNumber_1 | Tile Number1.
IfxEmem_TileNumber_2 | Tile Number2.
IfxEmem_TileNumber_3 | Tile Number3.
IfxEmem_TileNumber_4 | Tile Number4.
IfxEmem_TileNumber_5 | Tile Number5.
IfxEmem_TileNumber_6 | Tile Number6.
IfxEmem_TileNumber_7 | Tile Number7.
IfxEmem_TileNumber_8 | Tile Number8.
IfxEmem_TileNumber_9 | Tile Number9.
IfxEmem_TileNumber_10 | Tile Number10.
IfxEmem_TileNumber_11 | Tile Number11.
IfxEmem_TileNumber_12 | Tile Number12.
IfxEmem_TileNumber_13 | Tile Number13.
IfxEmem_TileNumber_14 | Tile Number14.
IfxEmem_TileNumber_15 | Tile Number15.

Definition at line 88 of file IfxEmem.h.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » EMEM » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE boolean | IfxEmem_isModuleEnabled (void)
Returns the status of module enabled or disabled. More...
IFX_INLINE void | IfxEmem_setTileConfigMode (const IfxEmem_TileConfigMode mode, IfxEmem_TileNumber tile)
Sets all EMEM tiles to calibration memory mode. More...
IFX_INLINE void | IfxEmem_setUnlockStandbyLockFlag (const uint8 flag)
Sets Unlock standby lock flag. More...
IFX_EXTERN IfxEmem_LockedState | IfxEmem_getLockedState (void)
Gets the EMEM stand RAM lock state. More...
IFX_EXTERN void | IfxEmem_setClockEnableState (const IfxEmem_State state)
Sets state of the EMEM module clock. Note: Do not use this API for enabling and disabling EMEM without handling Endinit protection in application. for complete enable and disable of EMEM with endint protection handling, please use the following APIs /ref IfxEmem_enableModule /ref IfxEmem_disableModule. More...

Detailed Description

Function Documentation

◆ IfxEmem_getLockedState()

IFX_EXTERN IfxEmem_LockedState IfxEmem_getLockedState ( void )

Gets the EMEM stand RAM lock state.

Returns
EMEM stand RAM lock state.

Definition at line 53 of file IfxEmem.c.

Referenced by IfxCif_Cam_initEmem().

◆ IfxEmem_isModuleEnabled()

IFX_INLINE boolean IfxEmem_isModuleEnabled ( void )

Returns the status of module enabled or disabled.

Returns
Status (TRUE / FALSE)

Definition at line 160 of file IfxEmem.h.

◆ IfxEmem_setClockEnableState()

IFX_EXTERN void IfxEmem_setClockEnableState ( const IfxEmem_State state )

Sets state of the EMEM module clock. Note: Do not use this API for enabling and disabling EMEM without handling Endinit protection in application. for complete enable and disable of EMEM with endint protection handling, please use the following APIs /ref IfxEmem_enableModule /ref IfxEmem_disableModule.

Parameters
state EMEM module clock enabled or disabled state.
Returns
None

Definition at line 59 of file IfxEmem.c.

Referenced by IfxCif_Cam_initEmem().

◆ IfxEmem_setTileConfigMode()

IFX_INLINE void IfxEmem_setTileConfigMode | ( | const IfxEmem_TileConfigMode | mode,
 |  | IfxEmem_TileNumber | tile
 | ) |  |

Sets all EMEM tiles to calibration memory mode.

Parameters
mode | EMEM tile configuration mode.
tile | tile number
Returns
None

Definition at line 166 of file IfxEmem.h.

Referenced by IfxCif_Cam_initEmem().

◆ IfxEmem_setUnlockStandbyLockFlag()

IFX_INLINE void IfxEmem_setUnlockStandbyLockFlag ( const uint8 flag )

Sets Unlock standby lock flag.

Parameters
flag Unlock standby lock flag value.
Returns
None

Definition at line 175 of file IfxEmem.h.

Referenced by IfxCif_Cam_initEmem().


iLLD_TC26B: IfxEmem_cfg.h File Reference

  • _Impl
Macros
IfxEmem_cfg.h File Reference
iLLD » EMEM

EMEM on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxEmem_reg.h"
Include dependency graph for IfxEmem_cfg.h:

Go to the source code of this file.

Macros

#define | IFXEMEM_START_ADDR_CPU_CACHED 0x9F000000UL
#define | IFXEMEM_START_ADDR_CPU 0xBF000000UL
#define | IFXEMEM_START_ADDR_BBB (0xAF000000UL)
#define | IFXEMEM_SIZE (0x50000UL)
#define | IFXEMEM_NUM_MODULES (1)

Detailed Description

EMEM on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEmem_cfg.h.

Macro Definition Documentation

◆ IFXEMEM_NUM_MODULES

#define IFXEMEM_NUM_MODULES (1)

Definition at line 71 of file IfxEmem_cfg.h.

◆ IFXEMEM_SIZE

#define IFXEMEM_SIZE (0x50000UL)

Definition at line 69 of file IfxEmem_cfg.h.

Referenced by IfxCif_Cam_initEmem().

◆ IFXEMEM_START_ADDR_BBB

#define IFXEMEM_START_ADDR_BBB (0xAF000000UL)

Definition at line 67 of file IfxEmem_cfg.h.

Referenced by IfxCif_Cam_getBbbAddress().

◆ IFXEMEM_START_ADDR_CPU

#define IFXEMEM_START_ADDR_CPU 0xBF000000UL

Definition at line 65 of file IfxEmem_cfg.h.

Referenced by IfxCif_Cam_initEmem().

◆ IFXEMEM_START_ADDR_CPU_CACHED

#define IFXEMEM_START_ADDR_CPU_CACHED 0x9F000000UL

Definition at line 63 of file IfxEmem_cfg.h.

Referenced by IfxCif_Cam_getLastFrameAddress(), IfxCif_Cam_getNextFrameAddress(), IfxCif_Cam_incrementAddress(), and IfxCif_Cam_initMemSize().


iLLD_TC26B: IfxEmem.h File Reference

  • Emem
  • Std
Enumerations | Functions
IfxEmem.h File Reference
iLLD » EMEM

EMEM basic functionality. More...

#include "_Impl/IfxEmem_cfg.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxEmem.h:

Go to the source code of this file.

Enumerations

enum IfxEmem_LockedState {
IfxEmem_LockedState_locked = 0,
IfxEmem_LockedState_unlocked = 1
}
EMEM lock state defined in MODULE_EMEM.SBRCTR.B.STBLOCK. More...
enum IfxEmem_State {
IfxEmem_State_disabled = 0,
IfxEmem_State_enabled = 1
}
EMEM module clock enabled or disabled state defined in MODULE_EMEM.CLC.B.DISR. More...
enum IfxEmem_TileConfigMode { IfxEmem_TileConfigMode_calibMode = 0 }
EMEM tile configuration mode defined in MODULE_EMEM.TILECONFIG.B.Tx( x = 0,1,..). More...
enum IfxEmem_TileNumber {
IfxEmem_TileNumber_0 = 0,
IfxEmem_TileNumber_1,
IfxEmem_TileNumber_2,
IfxEmem_TileNumber_3,
IfxEmem_TileNumber_4,
IfxEmem_TileNumber_5,
IfxEmem_TileNumber_6,
IfxEmem_TileNumber_7,
IfxEmem_TileNumber_8,
IfxEmem_TileNumber_9,
IfxEmem_TileNumber_10,
IfxEmem_TileNumber_11,
IfxEmem_TileNumber_12,
IfxEmem_TileNumber_13,
IfxEmem_TileNumber_14,
IfxEmem_TileNumber_15
}
Tile Number. More...

Functions

IFX_INLINE boolean | IfxEmem_isModuleEnabled (void)
Returns the status of module enabled or disabled. More...
IFX_INLINE void | IfxEmem_setTileConfigMode (const IfxEmem_TileConfigMode mode, IfxEmem_TileNumber tile)
Sets all EMEM tiles to calibration memory mode. More...
IFX_INLINE void | IfxEmem_setUnlockStandbyLockFlag (const uint8 flag)
Sets Unlock standby lock flag. More...
IFX_EXTERN IfxEmem_LockedState | IfxEmem_getLockedState (void)
Gets the EMEM stand RAM lock state. More...
IFX_EXTERN void | IfxEmem_setClockEnableState (const IfxEmem_State state)
Sets state of the EMEM module clock. Note: Do not use this API for enabling and disabling EMEM without handling Endinit protection in application. for complete enable and disable of EMEM with endint protection handling, please use the following APIs /ref IfxEmem_enableModule /ref IfxEmem_disableModule. More...

Detailed Description

EMEM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEmem.h.


iLLD_TC26B: ERAY

Modules | Files
ERAY
iLLD
Collaboration diagram for ERAY:

Modules

Implementation
Standard Driver
ERAY Pin Mapping
How to use the ERAY Interface driver?
ERAY

Files

file | IfxEray_cfg.h
ERAY on-chip implementation data.
file | IfxEray_PinMap.c
ERAY I/O map.
file | IfxEray_PinMap.h
ERAY I/O map.
file | IfxEray_Eray.h
ERAY ERAY details.
file | IfxEray.h
ERAY basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » ERAY
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations | Variables
Enumerations
iLLD » ERAY » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxEray_Index {
IfxEray_Index_none = -1,
IfxEray_Index_0 = 0
}
List of the available Eray resources. More...
enum IfxEray_NodeId {
IfxEray_NodeId_a = 0,
IfxEray_NodeId_b = 1,
IfxEray_NodeId_none = -1
}
Node Id in communication cycle. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap [IFXERAY_NUM_MODULES]

Detailed Description

Enumeration Type Documentation

◆ IfxEray_Index

enum IfxEray_Index

List of the available Eray resources.

Enumerator
IfxEray_Index_none | Not Selected.
IfxEray_Index_0 | ERAY index 0.

Definition at line 79 of file IfxEray_cfg.h.

◆ IfxEray_NodeId

enum IfxEray_NodeId

Node Id in communication cycle.

Enumerator
IfxEray_NodeId_a | Ifx_ERAY Node A.
IfxEray_NodeId_b | Ifx_ERAY Node B.
IfxEray_NodeId_none | None of the Ifx_ERAY Nodes.

Definition at line 87 of file IfxEray_cfg.h.

Variable Documentation

◆ IfxEray_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES]

Definition at line 103 of file IfxEray_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » ERAY
Collaboration diagram for Standard Driver:

Modules

Enumerations
Interrupt Functions
IO Pin Configuration Functions
Module Functions
Status Functions
Configuration Functions
Data Structures
Operative Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » ERAY » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxEray_Baudrate {
IfxEray_Baudrate_10 = 0,
IfxEray_Baudrate_5 = 1,
IfxEray_Baudrate_2_5 = 2
}
Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP. More...
enum IfxEray_BufferDirection {
IfxEray_BufferDirection_receive = 0,
IfxEray_BufferDirection_transmit = 1
}
wheather transmit buffer or receive buffer, defined in MODULE_ERAY0.WRHS1.B.CFG. More...
enum IfxEray_Channel {
IfxEray_Channel_a = 0,
IfxEray_Channel_b = 1
}
Channel Id. More...
enum IfxEray_ClearErrorFlag {
IfxEray_ClearErrorFlag_pemc = 1,
IfxEray_ClearErrorFlag_cna = 2,
IfxEray_ClearErrorFlag_sfbm = 4,
IfxEray_ClearErrorFlag_sfo = 8,
IfxEray_ClearErrorFlag_ccf = 16,
IfxEray_ClearErrorFlag_ccl = 32,
IfxEray_ClearErrorFlag_eerr = 64,
IfxEray_ClearErrorFlag_rfo = 128,
IfxEray_ClearErrorFlag_efa = 256,
IfxEray_ClearErrorFlag_iiba = 512,
IfxEray_ClearErrorFlag_ioba = 1024,
IfxEray_ClearErrorFlag_mhf = 2048,
IfxEray_ClearErrorFlag_eda = 65536,
IfxEray_ClearErrorFlag_ltva = 131072,
IfxEray_ClearErrorFlag_taba = 262144,
IfxEray_ClearErrorFlag_edb = 16777216,
IfxEray_ClearErrorFlag_ltvb = 33554432,
IfxEray_ClearErrorFlag_tabb = 67108864
}
Selection of error flag to clear defined in MODULE_ERAY.EIR.U. More...
enum IfxEray_ClearStatusFlag {
IfxEray_ClearStatusFlag_wst = 1,
IfxEray_ClearStatusFlag_cas = 2,
IfxEray_ClearStatusFlag_cycs = 4,
IfxEray_ClearStatusFlag_txi = 8,
IfxEray_ClearStatusFlag_rxi = 16,
IfxEray_ClearStatusFlag_rfne = 32,
IfxEray_ClearStatusFlag_rfcl = 64,
IfxEray_ClearStatusFlag_nmvc = 128,
IfxEray_ClearStatusFlag_ti0 = 256,
IfxEray_ClearStatusFlag_ti1 = 512,
IfxEray_ClearStatusFlag_tibc = 1024,
IfxEray_ClearStatusFlag_tobc = 2048,
IfxEray_ClearStatusFlag_swe = 4096,
IfxEray_ClearStatusFlag_sucs = 8192,
IfxEray_ClearStatusFlag_mbsi = 16384,
IfxEray_ClearStatusFlag_sds = 32768,
IfxEray_ClearStatusFlag_wupa = 65536,
IfxEray_ClearStatusFlag_mtsa = 131072,
IfxEray_ClearStatusFlag_wupb = 16777216,
IfxEray_ClearStatusFlag_mtsb = 33554432
}
Selection of status flag to clear defined in MODULE_ERAY.SIR.U. More...
enum IfxEray_ClockDivider {
IfxEray_ClockDivider_none = 0,
IfxEray_ClockDivider_1 = 1,
IfxEray_ClockDivider_2,
IfxEray_ClockDivider_3,
IfxEray_ClockDivider_4,
IfxEray_ClockDivider_5,
IfxEray_ClockDivider_6,
IfxEray_ClockDivider_7
}
Clock divider in RUN mode, defined in MODULE_ERAY0.B.RMC. More...
enum IfxEray_ExternalOffset {
IfxEray_ExternalOffset_noCorrection = 1,
IfxEray_ExternalOffset_correctionSubtracted = 2,
IfxEray_ExternalOffset_correctionAdded = 3
}
External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC. More...
enum IfxEray_ExternalOffsetCorrection {
IfxEray_ExternalOffsetCorrection_0 = 0,
IfxEray_ExternalOffsetCorrection_1,
IfxEray_ExternalOffsetCorrection_2,
IfxEray_ExternalOffsetCorrection_3,
IfxEray_ExternalOffsetCorrection_4,
IfxEray_ExternalOffsetCorrection_5,
IfxEray_ExternalOffsetCorrection_6,
IfxEray_ExternalOffsetCorrection_7
}
External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC. More...
enum IfxEray_ExternalRate {
IfxEray_ExternalRate_noCorrection = 1,
IfxEray_ExternalRate_correctionSubtracted = 2,
IfxEray_ExternalRate_correctionAdded = 3
}
External rate correction control MODULE_ERAY0.GTU11.B.ERCC. More...
enum IfxEray_ExternalRateCorrection {
IfxEray_ExternalRateCorrection_0 = 0,
IfxEray_ExternalRateCorrection_1,
IfxEray_ExternalRateCorrection_2,
IfxEray_ExternalRateCorrection_3,
IfxEray_ExternalRateCorrection_4,
IfxEray_ExternalRateCorrection_5,
IfxEray_ExternalRateCorrection_6,
IfxEray_ExternalRateCorrection_7
}
External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC. More...
enum IfxEray_IdleDynamicSlots {
IfxEray_IdleDynamicSlots_0 = 0,
IfxEray_IdleDynamicSlots_1,
IfxEray_IdleDynamicSlots_2
}
Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI. More...
enum IfxEray_ListenTimeOutNoise {
IfxEray_ListenTimeOutNoise_2 = 1,
IfxEray_ListenTimeOutNoise_3,
IfxEray_ListenTimeOutNoise_4,
IfxEray_ListenTimeOutNoise_5,
IfxEray_ListenTimeOutNoise_6,
IfxEray_ListenTimeOutNoise_7,
IfxEray_ListenTimeOutNoise_8,
IfxEray_ListenTimeOutNoise_9,
IfxEray_ListenTimeOutNoise_10,
IfxEray_ListenTimeOutNoise_11,
IfxEray_ListenTimeOutNoise_12,
IfxEray_ListenTimeOutNoise_13,
IfxEray_ListenTimeOutNoise_14,
IfxEray_ListenTimeOutNoise_15,
IfxEray_ListenTimeOutNoise_16
}
Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN. More...
enum IfxEray_MaxSynchFrames {
IfxEray_MaxSynchFrames_2 = 2,
IfxEray_MaxSynchFrames_3,
IfxEray_MaxSynchFrames_4,
IfxEray_MaxSynchFrames_5,
IfxEray_MaxSynchFrames_6,
IfxEray_MaxSynchFrames_7,
IfxEray_MaxSynchFrames_8,
IfxEray_MaxSynchFrames_9,
IfxEray_MaxSynchFrames_10,
IfxEray_MaxSynchFrames_11,
IfxEray_MaxSynchFrames_12,
IfxEray_MaxSynchFrames_13,
IfxEray_MaxSynchFrames_14,
IfxEray_MaxSynchFrames_15
}
Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM. More...
enum IfxEray_PocCommand {
IfxEray_PocCommand_notAccepted = 0,
IfxEray_PocCommand_config = 1,
IfxEray_PocCommand_ready = 2,
IfxEray_PocCommand_wakeup = 3,
IfxEray_PocCommand_run = 4,
IfxEray_PocCommand_allSlots = 5,
IfxEray_PocCommand_halt = 6,
IfxEray_PocCommand_freeze = 7,
IfxEray_PocCommand_sendMts = 8,
IfxEray_PocCommand_coldStart = 9,
IfxEray_PocCommand_reset = 10,
IfxEray_PocCommand_monitor = 11,
IfxEray_PocCommand_clearRam = 12
}
Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD. More...
enum IfxEray_PocState {
IfxEray_PocState_defaultConfig = 0,
IfxEray_PocState_ready = 1,
IfxEray_PocState_normalActive = 2,
IfxEray_PocState_normalPassive = 3,
IfxEray_PocState_halt = 4,
IfxEray_PocState_monitor = 5,
IfxEray_PocState_config = 15,
IfxEray_PocState_wakeupStandby = 16,
IfxEray_PocState_wakeupListen = 17,
IfxEray_PocState_wakeupSend = 18,
IfxEray_PocState_wakeupDetect = 19,
IfxEray_PocState_startup = 32,
IfxEray_PocState_coldStartListen = 33,
IfxEray_PocState_collisionResolution = 34,
IfxEray_PocState_consistencyCheck = 35,
IfxEray_PocState_gap = 36,
IfxEray_PocState_join = 37,
IfxEray_PocState_integrationCheck = 38,
IfxEray_PocState_integrationListen = 39,
IfxEray_PocState_integrationConsistencyCheck = 40,
IfxEray_PocState_initializeSchedule = 41,
IfxEray_PocState_staruAborted = 42,
IfxEray_PocState_startupSucced = 43
}
State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS. More...
enum IfxEray_ReceiveChannel {
IfxEray_ReceiveChannel_both = 0,
IfxEray_ReceiveChannel_b = 1,
IfxEray_ReceiveChannel_a = 2,
IfxEray_ReceiveChannel_none = 3
}
Receiving channel, defined in MODULE_ERAY0.FRF.B.CH. More...
enum IfxEray_SleepMode {
IfxEray_SleepMode_enable = 0,
IfxEray_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ERAY.CLC.B.EDIS. More...
enum IfxEray_StrobePosition {
IfxEray_StrobePosition_5 = 0,
IfxEray_StrobePosition_4 = 1,
IfxEray_StrobePosition_6 = 2
}
Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP. More...
enum IfxEray_SuspendMode {
IfxEray_SuspendMode_none = 0,
IfxEray_SuspendMode_hard = 1,
IfxEray_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxEray_TransmissionMode {
IfxEray_TransmissionMode_continuous = 0,
IfxEray_TransmissionMode_singleShot = 1
}
Transmission mode of Header, defined in MODULE_ERAY0.WRHS1.B.TXM. More...
enum IfxEray_TransmissionSlotMode {
IfxEray_TransmissionSlotMode_all = 0,
IfxEray_TransmissionSlotMode_single = 1
}
Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM. More...
enum IfxEray_WakeupChannel {
IfxEray_WakeupChannel_a = 0,
IfxEray_WakeupChannel_b = 1
}
Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS. More...

Detailed Description

Enumeration Type Documentation

◆ IfxEray_Baudrate

enum IfxEray_Baudrate

Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP.

Enumerator
IfxEray_Baudrate_10 | baudrate is 10MBits/Sec
IfxEray_Baudrate_5 | baudrate is 5MBits/Sec
IfxEray_Baudrate_2_5 | baudrate is 2.5MBits/Sec

Definition at line 79 of file IfxEray.h.

◆ IfxEray_BufferDirection

enum IfxEray_BufferDirection

wheather transmit buffer or receive buffer, defined in MODULE_ERAY0.WRHS1.B.CFG.

Enumerator
IfxEray_BufferDirection_receive | buffer is configured as receive buffer
IfxEray_BufferDirection_transmit | buffer is configured as transmit buffer

Definition at line 88 of file IfxEray.h.

◆ IfxEray_Channel

enum IfxEray_Channel

Channel Id.

Enumerator
IfxEray_Channel_a | channel A
IfxEray_Channel_b | channel B

Definition at line 96 of file IfxEray.h.

◆ IfxEray_ClearErrorFlag

enum IfxEray_ClearErrorFlag

Selection of error flag to clear defined in MODULE_ERAY.EIR.U.

Enumerator
IfxEray_ClearErrorFlag_pemc | POC error mode change bit.
IfxEray_ClearErrorFlag_cna | command not accepted event bit.
IfxEray_ClearErrorFlag_sfbm | sync frame below minimum bit.
IfxEray_ClearErrorFlag_sfo | sync frame overflow event bit
IfxEray_ClearErrorFlag_ccf | clock correction failure event.
IfxEray_ClearErrorFlag_ccl | CHI command locked event.
IfxEray_ClearErrorFlag_eerr | ECC error event bit.
IfxEray_ClearErrorFlag_rfo | RxFIFO overrun event bit.
IfxEray_ClearErrorFlag_efa | empty FIFO access event bit.
IfxEray_ClearErrorFlag_iiba | illegal input buffer access event.
IfxEray_ClearErrorFlag_ioba | illegal output buffer access event.
IfxEray_ClearErrorFlag_mhf | message handler constraint flag.
IfxEray_ClearErrorFlag_eda | error event on channel A.
IfxEray_ClearErrorFlag_ltva | latest transmit violation flag on channel A .
IfxEray_ClearErrorFlag_taba | transmission across channel A boundary flag.
IfxEray_ClearErrorFlag_edb | error event on channel B.
IfxEray_ClearErrorFlag_ltvb | latest transmit violation flag on channel B .
IfxEray_ClearErrorFlag_tabb | transmission across channel B boundary flag.

Definition at line 104 of file IfxEray.h.

◆ IfxEray_ClearStatusFlag

enum IfxEray_ClearStatusFlag

Selection of status flag to clear defined in MODULE_ERAY.SIR.U.

Enumerator
IfxEray_ClearStatusFlag_wst | wakeup status bit.
IfxEray_ClearStatusFlag_cas | collision avoidance bit.
IfxEray_ClearStatusFlag_cycs | cycle start service bit.
IfxEray_ClearStatusFlag_txi | transmit service request bit.
IfxEray_ClearStatusFlag_rxi | receive service request bit.
IfxEray_ClearStatusFlag_rfne | receive fifo not empty bit.
IfxEray_ClearStatusFlag_rfcl | RxFIFO critical level reached bit.
IfxEray_ClearStatusFlag_nmvc | network management vector bit.
IfxEray_ClearStatusFlag_ti0 | timer0 service request bit.
IfxEray_ClearStatusFlag_ti1 | timer1 service request bit.
IfxEray_ClearStatusFlag_tibc | transfer input buffer completion request bit.
IfxEray_ClearStatusFlag_tobc | transfer output buffer completion request bit.
IfxEray_ClearStatusFlag_swe | stop watch event bit.
IfxEray_ClearStatusFlag_sucs | startup success event bit.
IfxEray_ClearStatusFlag_mbsi | message buffer service status bit.
IfxEray_ClearStatusFlag_sds | dynamic segment start bit.
IfxEray_ClearStatusFlag_wupa | wakeup pattern channel A bit.
IfxEray_ClearStatusFlag_mtsa | MTS receive channel A bit.
IfxEray_ClearStatusFlag_wupb | wakeup pattern channel B bit.
IfxEray_ClearStatusFlag_mtsb | MTS receive channel B bit.

Definition at line 128 of file IfxEray.h.

◆ IfxEray_ClockDivider

enum IfxEray_ClockDivider

Clock divider in RUN mode, defined in MODULE_ERAY0.B.RMC.

Enumerator
IfxEray_ClockDivider_none | no clock signal
IfxEray_ClockDivider_1 | run mode clock divider 1
IfxEray_ClockDivider_2 | run mode clock divider 2
IfxEray_ClockDivider_3 | run mode clock divider 3
IfxEray_ClockDivider_4 | run mode clock divider 4
IfxEray_ClockDivider_5 | run mode clock divider 5
IfxEray_ClockDivider_6 | run mode clock divider 6
IfxEray_ClockDivider_7 | run mode clock divider 7

Definition at line 154 of file IfxEray.h.

◆ IfxEray_ExternalOffset

enum IfxEray_ExternalOffset

External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC.

Enumerator
IfxEray_ExternalOffset_noCorrection | No external correction control.
IfxEray_ExternalOffset_correctionSubtracted | External offset correction subtracted from calculated correction.
IfxEray_ExternalOffset_correctionAdded | External offset correction added to calculated correction.

Definition at line 168 of file IfxEray.h.

◆ IfxEray_ExternalOffsetCorrection

enum IfxEray_ExternalOffsetCorrection

External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC.

Enumerator
IfxEray_ExternalOffsetCorrection_0 | external clock offset correction value 0
IfxEray_ExternalOffsetCorrection_1 | external clock offset correction value 1
IfxEray_ExternalOffsetCorrection_2 | external clock offset correction value 2
IfxEray_ExternalOffsetCorrection_3 | external clock offset correction value 3
IfxEray_ExternalOffsetCorrection_4 | external clock offset correction value 4
IfxEray_ExternalOffsetCorrection_5 | external clock offset correction value 5
IfxEray_ExternalOffsetCorrection_6 | external clock offset correction value 6
IfxEray_ExternalOffsetCorrection_7 | external clock offset correction value 7

Definition at line 177 of file IfxEray.h.

◆ IfxEray_ExternalRate

enum IfxEray_ExternalRate

External rate correction control MODULE_ERAY0.GTU11.B.ERCC.

Enumerator
IfxEray_ExternalRate_noCorrection | No external correction control.
IfxEray_ExternalRate_correctionSubtracted | External rate correction subtracted from calculated correction.
IfxEray_ExternalRate_correctionAdded | External rate correction added to calculated correction.

Definition at line 191 of file IfxEray.h.

◆ IfxEray_ExternalRateCorrection

enum IfxEray_ExternalRateCorrection

External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC.

Enumerator
IfxEray_ExternalRateCorrection_0 | external clock rate correction value 0
IfxEray_ExternalRateCorrection_1 | external clock rate correction value 1
IfxEray_ExternalRateCorrection_2 | external clock rate correction value 2
IfxEray_ExternalRateCorrection_3 | external clock rate correction value 3
IfxEray_ExternalRateCorrection_4 | external clock rate correction value 4
IfxEray_ExternalRateCorrection_5 | external clock rate correction value 5
IfxEray_ExternalRateCorrection_6 | external clock rate correction value 6
IfxEray_ExternalRateCorrection_7 | external clock rate correction value 7

Definition at line 200 of file IfxEray.h.

◆ IfxEray_IdleDynamicSlots

enum IfxEray_IdleDynamicSlots

Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI.

Enumerator
IfxEray_IdleDynamicSlots_0 | duration of dynamic slot idle phase is 0
IfxEray_IdleDynamicSlots_1 | duration of dynamic slot idle phase is 1
IfxEray_IdleDynamicSlots_2 | duration of dynamic slot idle phase is 2

Definition at line 214 of file IfxEray.h.

◆ IfxEray_ListenTimeOutNoise

enum IfxEray_ListenTimeOutNoise

Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN.

Enumerator
IfxEray_ListenTimeOutNoise_2 | listen Time-out noise 2
IfxEray_ListenTimeOutNoise_3 | listen Time-out noise 3
IfxEray_ListenTimeOutNoise_4 | listen Time-out noise 4
IfxEray_ListenTimeOutNoise_5 | listen Time-out noise 5
IfxEray_ListenTimeOutNoise_6 | listen Time-out noise 6
IfxEray_ListenTimeOutNoise_7 | listen Time-out noise 7
IfxEray_ListenTimeOutNoise_8 | listen Time-out noise 8
IfxEray_ListenTimeOutNoise_9 | listen Time-out noise 9
IfxEray_ListenTimeOutNoise_10 | listen Time-out noise 10
IfxEray_ListenTimeOutNoise_11 | listen Time-out noise 11
IfxEray_ListenTimeOutNoise_12 | listen Time-out noise 12
IfxEray_ListenTimeOutNoise_13 | listen Time-out noise 13
IfxEray_ListenTimeOutNoise_14 | listen Time-out noise 14
IfxEray_ListenTimeOutNoise_15 | listen Time-out noise 15
IfxEray_ListenTimeOutNoise_16 | listen Time-out noise 16

Definition at line 223 of file IfxEray.h.

◆ IfxEray_MaxSynchFrames

enum IfxEray_MaxSynchFrames

Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM.

Enumerator
IfxEray_MaxSynchFrames_2 | Maximum number of sync frames in a cluster are 2.
IfxEray_MaxSynchFrames_3 | Maximum number of sync frames in a cluster are 3.
IfxEray_MaxSynchFrames_4 | Maximum number of sync frames in a cluster are 4.
IfxEray_MaxSynchFrames_5 | Maximum number of sync frames in a cluster are 5.
IfxEray_MaxSynchFrames_6 | Maximum number of sync frames in a cluster are 6.
IfxEray_MaxSynchFrames_7 | Maximum number of sync frames in a cluster are 7.
IfxEray_MaxSynchFrames_8 | Maximum number of sync frames in a cluster are 8.
IfxEray_MaxSynchFrames_9 | Maximum number of sync frames in a cluster are 9.
IfxEray_MaxSynchFrames_10 | Maximum number of sync frames in a cluster are 10.
IfxEray_MaxSynchFrames_11 | Maximum number of sync frames in a cluster are 11.
IfxEray_MaxSynchFrames_12 | Maximum number of sync frames in a cluster are 12.
IfxEray_MaxSynchFrames_13 | Maximum number of sync frames in a cluster are 13.
IfxEray_MaxSynchFrames_14 | Maximum number of sync frames in a cluster are 14.
IfxEray_MaxSynchFrames_15 | Maximum number of sync frames in a cluster are 15.

Definition at line 244 of file IfxEray.h.

◆ IfxEray_PocCommand

enum IfxEray_PocCommand

Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD.

Enumerator
IfxEray_PocCommand_notAccepted | command not accepted.
IfxEray_PocCommand_config | command to controller to enter CONFIG
IfxEray_PocCommand_ready | command to controller to enter READY.
IfxEray_PocCommand_wakeup | command to controller to enter WAKEUP
IfxEray_PocCommand_run | command to controller to enter RUN
IfxEray_PocCommand_allSlots | command to controller to enter ALL_SLOTS
IfxEray_PocCommand_halt | command to controller to enter HALT
IfxEray_PocCommand_freeze | command to controller to enter FREEZE
IfxEray_PocCommand_sendMts | command to controller to enter SEND_MTS
IfxEray_PocCommand_coldStart | command to controller to enter COLD_START
IfxEray_PocCommand_reset | command to controller to enter RESET
IfxEray_PocCommand_monitor | command to controller to enter MONITOR
IfxEray_PocCommand_clearRam | command to controller to enter CLEAR_RAM

Definition at line 264 of file IfxEray.h.

◆ IfxEray_PocState

enum IfxEray_PocState

State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS.

Enumerator
IfxEray_PocState_defaultConfig | controller entered default config state
IfxEray_PocState_ready | controller entered ready state
IfxEray_PocState_normalActive | controller entered normal-active state
IfxEray_PocState_normalPassive | controller entered normal-passive state
IfxEray_PocState_halt | controller entered halt state
IfxEray_PocState_monitor | controller entered monitor state
IfxEray_PocState_config | controller entered config state
IfxEray_PocState_wakeupStandby | controller entered wakeup standby state
IfxEray_PocState_wakeupListen | controller entered wakeup-listen state
IfxEray_PocState_wakeupSend | controller entered wakeup-send state
IfxEray_PocState_wakeupDetect | controller entered wakeup-detection state
IfxEray_PocState_startup | controller entered startup state
IfxEray_PocState_coldStartListen | controller entered clod-start listen state
IfxEray_PocState_collisionResolution | controller entered collission-resolution state.
IfxEray_PocState_consistencyCheck | controller entered consistency-check.
IfxEray_PocState_gap | controller entered gap state.
IfxEray_PocState_join | controller entered join state.
IfxEray_PocState_integrationCheck | controller entered integration-check.
IfxEray_PocState_integrationListen | controller entered integration-listen state.
IfxEray_PocState_integrationConsistencyCheck | controller entered integration consistency check state
IfxEray_PocState_initializeSchedule | controller entered initialise schedule state
IfxEray_PocState_staruAborted | controller entered startup-abort state
IfxEray_PocState_startupSucced | controller entered startup succeed state.

Definition at line 283 of file IfxEray.h.

◆ IfxEray_ReceiveChannel

enum IfxEray_ReceiveChannel

Receiving channel, defined in MODULE_ERAY0.FRF.B.CH.

Enumerator
IfxEray_ReceiveChannel_both | both channels for reception
IfxEray_ReceiveChannel_b | channel A for reception
IfxEray_ReceiveChannel_a | channel B for reception
IfxEray_ReceiveChannel_none | none channels for reception

Definition at line 312 of file IfxEray.h.

◆ IfxEray_SleepMode

enum IfxEray_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ERAY.CLC.B.EDIS.

Enumerator
IfxEray_SleepMode_enable | enables sleep mode
IfxEray_SleepMode_disable | disables sleep mode

Definition at line 323 of file IfxEray.h.

◆ IfxEray_StrobePosition

enum IfxEray_StrobePosition

Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP.

Enumerator
IfxEray_StrobePosition_5 | Sample count 5 for strobing.
IfxEray_StrobePosition_4 | Sample count 4 for strobing.
IfxEray_StrobePosition_6 | Sample count 6 for strobing.

Definition at line 331 of file IfxEray.h.

◆ IfxEray_SuspendMode

enum IfxEray_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxEray_SuspendMode_none | No suspend.
IfxEray_SuspendMode_hard | Hard Suspend.
IfxEray_SuspendMode_soft | Soft Suspend.

Definition at line 340 of file IfxEray.h.

◆ IfxEray_TransmissionMode

enum IfxEray_TransmissionMode

Transmission mode of Header, defined in MODULE_ERAY0.WRHS1.B.TXM.

Enumerator
IfxEray_TransmissionMode_continuous | continuos transmission mode
IfxEray_TransmissionMode_singleShot | single transmission mode

Definition at line 349 of file IfxEray.h.

◆ IfxEray_TransmissionSlotMode

enum IfxEray_TransmissionSlotMode

Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM.

Enumerator
IfxEray_TransmissionSlotMode_all | transmission in all slots.
IfxEray_TransmissionSlotMode_single | transmission in key slot.

Definition at line 357 of file IfxEray.h.

◆ IfxEray_WakeupChannel

enum IfxEray_WakeupChannel

Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS.

Enumerator
IfxEray_WakeupChannel_a | send wakeup channel pattern on channel A
IfxEray_WakeupChannel_b | send wakeup channel pattern on channel B

Definition at line 365 of file IfxEray.h.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_INLINE void | IfxEray_clearErrorFlag (Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag)
Clears the error flag requested. More...
IFX_INLINE void | IfxEray_clearStatusFlag (Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status flag requested. More...
IFX_INLINE Ifx_ERAY_EIR | IfxEray_getErrorInterrupts (Ifx_ERAY *eray)
Gets the error interrupt flags. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInputBufferBusySrcPtr (Ifx_ERAY *eray)
Gets the IBUSY service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInterruptLine0SrcPtr (Ifx_ERAY *eray)
Gets the INT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInterruptLine1SrcPtr (Ifx_ERAY *eray)
Gets the INT1 service request. More...
IFX_INLINE boolean | IfxEray_getMessageBufferInterruptStatus (Ifx_ERAY *eray, uint8 messageBuffer)
Gets the message buffers interrupt status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getMessageBufferStatus0SrcPtr (Ifx_ERAY *eray)
Gets the MBSC0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getMessageBufferStatus1SrcPtr (Ifx_ERAY *eray)
Gets the MBSC1 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getNewDataInterrupt0SrcPtr (Ifx_ERAY *eray)
Gets the NDAT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getNewDataInterrupt1SrcPtr (Ifx_ERAY *eray)
Gets the NDAT1 service request. More...
IFX_INLINE boolean | IfxEray_getNewDataInterruptStatus (Ifx_ERAY *eray, uint8 ndat)
Gets the new data interrupt buffers status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getOutputBufferBusySrcPtr (Ifx_ERAY *eray)
Gets the OBUSY service request. More...
IFX_INLINE Ifx_ERAY_SIR | IfxEray_getStatusInterrupts (Ifx_ERAY *eray)
Gets the status interrupt flags. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getTimerInterrupt0SrcPtr (Ifx_ERAY *eray)
Gets the TINT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getTimerInterrupt1SrcPtr (Ifx_ERAY *eray)
Gets the TINT1 service request. More...
IFX_EXTERN void | IfxEray_clearAllFlags (Ifx_ERAY *eray)
Clears all the error flags. More...
IFX_EXTERN void | IfxEray_enableInterruptLines (Ifx_ERAY *eray)
Enables all the Interrupt lines. More...
IFX_EXTERN void | IfxEray_setMessageBufferInterruptDestination (Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination. More...
IFX_EXTERN void | IfxEray_setNewDataInterruptDestination (Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination. More...

Detailed Description

Function Documentation

◆ IfxEray_clearAllFlags()

IFX_EXTERN void IfxEray_clearAllFlags ( Ifx_ERAY * eray )

Clears all the error flags.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 123 of file IfxEray.c.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_clearErrorFlag()

IFX_INLINE void IfxEray_clearErrorFlag | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ClearErrorFlag | errorFlag
 | ) |  |

Clears the error flag requested.

Parameters
eray | pointer to ERAY module registers.
errorFlag | error flag to be cleared.
Returns
None

Definition at line 1206 of file IfxEray.h.

Referenced by IfxEray_Eray_clearErrorFlag().

◆ IfxEray_clearStatusFlag()

IFX_INLINE void IfxEray_clearStatusFlag | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ClearStatusFlag | statusFlag
 | ) |  |

Clears the status flag requested.

Parameters
eray | pointer to ERAY module registers.
statusFlag | status flag to be cleared.
Returns
None

Definition at line 1212 of file IfxEray.h.

Referenced by IfxEray_Eray_clearStatusFlag().

◆ IfxEray_enableInterruptLines()

IFX_EXTERN void IfxEray_enableInterruptLines ( Ifx_ERAY * eray )

Enables all the Interrupt lines.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 133 of file IfxEray.c.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_getErrorInterrupts()

IFX_INLINE Ifx_ERAY_EIR IfxEray_getErrorInterrupts ( Ifx_ERAY * eray )

Gets the error interrupt flags.

Parameters
eray pointer to ERAY module registers.
Returns
error interrupt flags.

Definition at line 1244 of file IfxEray.h.

Referenced by IfxEray_Eray_getErrorInterrupts().

◆ IfxEray_getInputBufferBusySrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInputBufferBusySrcPtr ( Ifx_ERAY * eray )

Gets the IBUSY service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of IBUSY service request value.

Definition at line 1278 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getInterruptLine0SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine0SrcPtr ( Ifx_ERAY * eray )

Gets the INT0 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of INT0 service request value.

Definition at line 1285 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getInterruptLine1SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine1SrcPtr ( Ifx_ERAY * eray )

Gets the INT1 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of INT1 service request value.

Definition at line 1292 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getMessageBufferInterruptStatus()

IFX_INLINE boolean IfxEray_getMessageBufferInterruptStatus | ( | Ifx_ERAY * | eray,
 |  | uint8 | messageBuffer
 | ) |  |

Gets the message buffers interrupt status.

Parameters
eray | pointer to ERAY module registers.
messageBuffer | message buffer to which interrupt status be checked.
Returns
message buffer interrupt status.

Definition at line 1299 of file IfxEray.h.

Referenced by IfxEray_Eray_getMessageBufferInterruptStatus().

◆ IfxEray_getMessageBufferStatus0SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus0SrcPtr ( Ifx_ERAY * eray )

Gets the MBSC0 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of MBSC0 service request value.

Definition at line 1310 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getMessageBufferStatus1SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus1SrcPtr ( Ifx_ERAY * eray )

Gets the MBSC1 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of MBSC1 service request value.

Definition at line 1317 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getNewDataInterrupt0SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt0SrcPtr ( Ifx_ERAY * eray )

Gets the NDAT0 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of NDAT0 service request value.

Definition at line 1324 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getNewDataInterrupt1SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt1SrcPtr ( Ifx_ERAY * eray )

Gets the NDAT1 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of NDAT1 service request value.

Definition at line 1331 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getNewDataInterruptStatus()

IFX_INLINE boolean IfxEray_getNewDataInterruptStatus | ( | Ifx_ERAY * | eray,
 |  | uint8 | ndat
 | ) |  |

Gets the new data interrupt buffers status.

Parameters
eray | pointer to ERAY module registers.
ndat | message buffer number configured to which ndat occurs.
Returns
ndat interrupt buffer.

Definition at line 1338 of file IfxEray.h.

Referenced by IfxEray_Eray_getNewDataInterruptStatus().

◆ IfxEray_getOutputBufferBusySrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getOutputBufferBusySrcPtr ( Ifx_ERAY * eray )

Gets the OBUSY service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of OBUSY service request value.

Definition at line 1361 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getStatusInterrupts()

IFX_INLINE Ifx_ERAY_SIR IfxEray_getStatusInterrupts ( Ifx_ERAY * eray )

Gets the status interrupt flags.

Parameters
eray pointer to ERAY module registers.
Returns
status interrupt flags.

Definition at line 1374 of file IfxEray.h.

Referenced by IfxEray_Eray_getStatusInterrupts().

◆ IfxEray_getTimerInterrupt0SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt0SrcPtr ( Ifx_ERAY * eray )

Gets the TINT0 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of TINT0 service request value.

Definition at line 1382 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getTimerInterrupt1SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt1SrcPtr ( Ifx_ERAY * eray )

Gets the TINT1 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of TINT1 service request value.

Definition at line 1389 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_setMessageBufferInterruptDestination()

IFX_EXTERN void IfxEray_setMessageBufferInterruptDestination | ( | Ifx_ERAY * | eray,
 |  | uint8 | messageBuffer,
 |  | uint8 | messageBufferDestination
 | ) |  |

Selects between MBSC0 and MBSC1 interrupt destination.

Parameters
eray | pointer to ERAY module registers.
messageBuffer | message buffer interrupt which should be configured
messageBufferDestination | selects MBSC0 or MBSC1 interrupt output
Returns
None

Definition at line 247 of file IfxEray.c.

Referenced by IfxEray_Eray_setMessageBufferInterruptDestination().

◆ IfxEray_setNewDataInterruptDestination()

IFX_EXTERN void IfxEray_setNewDataInterruptDestination | ( | Ifx_ERAY * | eray,
 |  | uint8 | ndat,
 |  | uint8 | ndatDestination
 | ) |  |

Selects between NDAT0 and NDAT1 interrupt destination.

Parameters
eray | pointer to ERAY module registers.
ndat | NDAT interrupt which should be configured
ndatDestination | selects NDAT0 or NDAT1 interrupt output
Returns
None

Definition at line 264 of file IfxEray.c.

Referenced by IfxEray_Eray_setNewDataInterruptDestination().


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxEray_initRxPin (const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode)
Initialises a RX pin. More...
IFX_INLINE void | IfxEray_initTxEnPin (const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver)
Initializes a TX Enable output. More...
IFX_INLINE void | IfxEray_initTxPin (const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...

Detailed Description

Function Documentation

◆ IfxEray_initRxPin()

IFX_INLINE void IfxEray_initRxPin | ( | const IfxEray_Rxd_In * | rx,
 |  | IfxPort_InputMode | rxMode
 | ) |  |

Initialises a RX pin.

Parameters
rx | the RX Pin which should be configured.
rxMode | the pin input mode which should be configured.
Returns
None

Definition at line 1413 of file IfxEray.h.

◆ IfxEray_initTxEnPin()

IFX_INLINE void IfxEray_initTxEnPin | ( | const IfxEray_Txen_Out * | txEn,
 |  | IfxPort_OutputMode | txEnMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a TX Enable output.

Parameters
txEn | the TX Enable Pin which should be configured.
txEnMode | the pin output mode which should be configured.
padDriver | the pad driver mode which should be configured.
Returns
None

Definition at line 1428 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_initTxPin()

IFX_INLINE void IfxEray_initTxPin | ( | const IfxEray_Txd_Out * | tx,
 |  | IfxPort_OutputMode | txMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a TX output.

Parameters
tx | the TX Pin which should be configured.
txMode | the pin output mode which should be configured.
padDriver | the pad driver mode which should be configured.
Returns
None

Definition at line 1435 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_init().


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxEray_disableModule (Ifx_ERAY *eray)
Disables the ERAY module. More...
IFX_INLINE void | IfxEray_enableModule (Ifx_ERAY *eray)
Enables the ERAY module. More...
IFX_INLINE boolean | IfxEray_isModuleSuspended (Ifx_ERAY *eray)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxEray_setSleepMode (Ifx_ERAY *eray, IfxEray_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN Ifx_ERAY * | IfxEray_getAddress (IfxEray_Index eray)
IFX_EXTERN IfxEray_Index | IfxEray_getIndex (Ifx_ERAY *eray)
API to get the resource index of the ERAY specified. More...
IFX_EXTERN void | IfxEray_resetModule (Ifx_ERAY *eray)
Resets the ERAY kernel. More...

Detailed Description

Function Documentation

◆ IfxEray_disableModule()

IFX_INLINE void IfxEray_disableModule ( Ifx_ERAY * eray )

Disables the ERAY module.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 1218 of file IfxEray.h.

◆ IfxEray_enableModule()

IFX_INLINE void IfxEray_enableModule ( Ifx_ERAY * eray )

Enables the ERAY module.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 1228 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getAddress()

IFX_EXTERN Ifx_ERAY* IfxEray_getAddress ( IfxEray_Index eray )
Parameters
eray Resource index of the ERAY
Returns
ERAY module register address

Definition at line 151 of file IfxEray.c.

◆ IfxEray_getIndex()

IFX_EXTERN IfxEray_Index IfxEray_getIndex ( Ifx_ERAY * eray )

API to get the resource index of the ERAY specified.

Parameters
eray Pointer to the ERAY HW module (register memory map)
Returns
Resource index of the ERAY

Definition at line 168 of file IfxEray.c.

◆ IfxEray_isModuleSuspended()

IFX_INLINE boolean IfxEray_isModuleSuspended ( Ifx_ERAY * eray )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
eray Pointer to ERAY module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 1442 of file IfxEray.h.

◆ IfxEray_resetModule()

IFX_EXTERN void IfxEray_resetModule ( Ifx_ERAY * eray )

Resets the ERAY kernel.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 227 of file IfxEray.c.

Referenced by IfxEray_Eray_deInitModule().

◆ IfxEray_setSleepMode()

IFX_INLINE void IfxEray_setSleepMode | ( | Ifx_ERAY * | eray,
 |  | IfxEray_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
eray | pointer to ERAY registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 1721 of file IfxEray.h.


iLLD_TC26B: Status Functions

Functions
Status Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for Status Functions:

Functions

IFX_INLINE Ifx_ERAY_FSR | IfxEray_getFifoStatus (Ifx_ERAY *eray)
Gets the FIFO status. More...
IFX_INLINE boolean | IfxEray_getInputBufferBusyHostStatus (Ifx_ERAY *eray)
Gets the Input Buffer Host Busy status. More...
IFX_INLINE uint8 | IfxEray_getInputBufferBusyShadowStatus (Ifx_ERAY *eray)
Gets the Input Buffer Shadow status. More...
IFX_INLINE uint8 | IfxEray_getOutputBuffer (Ifx_ERAY *eray)
Gets the output buffer index. More...
IFX_INLINE boolean | IfxEray_getOutputBufferBusyShadowStatus (Ifx_ERAY *eray)
Gets the Output Buffer Shadow status. More...
IFX_INLINE IfxEray_PocState | IfxEray_getPocState (Ifx_ERAY *eray)
Gets the current POC state. More...
IFX_INLINE IfxEray_WakeupChannel | IfxEray_getWakeupPatternReceivedChannel (Ifx_ERAY *eray)
Gets the received wakeup pattern channel. More...
IFX_INLINE void | IfxEray_waitForPocState (Ifx_ERAY *eray, IfxEray_PocState pocState)
Waits until the controller enters required POC state. More...
IFX_EXTERN boolean | IfxEray_changePocState (Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state. More...
IFX_EXTERN void | IfxEray_setPocReady (Ifx_ERAY *eray)
Sets the POC state to Ready state. More...

Detailed Description

Function Documentation

◆ IfxEray_changePocState()

IFX_EXTERN boolean IfxEray_changePocState | ( | Ifx_ERAY * | eray,
 |  | IfxEray_PocCommand | pocCommand
 | ) |  |

Changes the Commmunication Controller state.

Parameters
eray | pointer to ERAY module registers.
pocCommand | POC command which triggers the Controller state.
Returns
TRUE if command accepted otherwise FALSE.

Definition at line 99 of file IfxEray.c.

Referenced by IfxEray_Eray_allowColdStart(), IfxEray_Eray_changePocState(), IfxEray_Eray_Node_init(), IfxEray_Eray_setPocAllSlots(), IfxEray_Eray_startCommunication(), IfxEray_Eray_wakeUpChannel(), and IfxEray_Eray_wakeUpCluster().

◆ IfxEray_getFifoStatus()

IFX_INLINE Ifx_ERAY_FSR IfxEray_getFifoStatus ( Ifx_ERAY * eray )

Gets the FIFO status.

Parameters
eray pointer to ERAY module registers.
Returns
FIFO status.

Definition at line 1258 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame().

◆ IfxEray_getInputBufferBusyHostStatus()

IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus ( Ifx_ERAY * eray )

Gets the Input Buffer Host Busy status.

Parameters
eray pointer to ERAY module registers.
Returns
TRUE if Host is Busy otherwise FALSE.

Definition at line 1266 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame(), and IfxEray_setSlot().

◆ IfxEray_getInputBufferBusyShadowStatus()

IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus ( Ifx_ERAY * eray )

Gets the Input Buffer Shadow status.

Parameters
eray pointer to ERAY module registers.
Returns
TRUE if busy otherwise FALSE

Definition at line 1272 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame(), and IfxEray_setSlot().

◆ IfxEray_getOutputBuffer()

IFX_INLINE uint8 IfxEray_getOutputBuffer ( Ifx_ERAY * eray )

Gets the output buffer index.

Parameters
eray pointer to ERAY module registers.
Returns
output buffer index.

Definition at line 1349 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_getOutputBufferBusyShadowStatus()

IFX_INLINE boolean IfxEray_getOutputBufferBusyShadowStatus ( Ifx_ERAY * eray )

Gets the Output Buffer Shadow status.

Parameters
eray pointer to ERAY module registers.
Returns
TRUE if busy otherwise FALSE

Definition at line 1355 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_getPocState()

IFX_INLINE IfxEray_PocState IfxEray_getPocState ( Ifx_ERAY * eray )

Gets the current POC state.

Parameters
eray pointer to ERAY module registers.
Returns
current POC state.

Definition at line 1368 of file IfxEray.h.

Referenced by IfxEray_Eray_getPocState(), and IfxEray_Eray_Node_init().

◆ IfxEray_getWakeupPatternReceivedChannel()

IFX_INLINE IfxEray_WakeupChannel IfxEray_getWakeupPatternReceivedChannel ( Ifx_ERAY * eray )

Gets the received wakeup pattern channel.

Parameters
eray pointer to ERAY module registers.
Returns
received wakeup pattern channel.

Definition at line 1396 of file IfxEray.h.

Referenced by IfxEray_Eray_getWakeupPatternReceivedChannel().

◆ IfxEray_setPocReady()

IFX_EXTERN void IfxEray_setPocReady ( Ifx_ERAY * eray )

Sets the POC state to Ready state.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 282 of file IfxEray.c.

Referenced by IfxEray_Eray_Node_init(), and IfxEray_Eray_wakeUpChannel().

◆ IfxEray_waitForPocState()

IFX_INLINE void IfxEray_waitForPocState | ( | Ifx_ERAY * | eray,
 |  | IfxEray_PocState | pocState
 | ) |  |

Waits until the controller enters required POC state.

Parameters
eray | pointer to ERAY module registers.
pocState | POC state upto which controller waits.
Returns
None

Definition at line 1819 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_init().


iLLD_TC26B: Configuration Functions

Functions
Configuration Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxEray_receiveHeader (Ifx_ERAY *eray, boolean headerReceived)
request to receive header section from message buffer. More...
IFX_INLINE void | IfxEray_sendHeader (Ifx_ERAY *eray, boolean headerTransfered)
sets the bit to send header in frame. More...
IFX_INLINE void | IfxEray_setActiveCyclePairs (Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive)
Sets number of cycle pairs for Active state. More...
IFX_INLINE void | IfxEray_setAutoDelayBuffers (Ifx_ERAY *eray)
Sets auto delays between input, output buffers and message RAM. More...
IFX_INLINE void | IfxEray_setBaudrate (Ifx_ERAY *eray, IfxEray_Baudrate baudrate)
Sets baudrate on Flexray bus. More...
IFX_INLINE void | IfxEray_setBufferReconfigSecure (Ifx_ERAY *eray, uint8 secureValue)
Sets secured buffers in message RAM. More...
IFX_INLINE void | IfxEray_setChannelAInitialOffsets (Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset)
Sets channel A initial offstes. More...
IFX_INLINE void | IfxEray_setChannelBInitialOffsets (Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset)
Sets channel B initial offstes. More...
IFX_INLINE void | IfxEray_setChannelsReceiveDelay (Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay)
Sets receive delays on channels. More...
IFX_INLINE void | IfxEray_setClockCorrectionCycles (Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt)
Sets clock correction cycles for Passive and Halt. More...
IFX_INLINE void | IfxEray_setClockSynchErrorHalt (Ifx_ERAY *eray, boolean clockSyncErrorHalt)
lead to halt state in clock synch error. More...
IFX_INLINE void | IfxEray_setClusterDriftValues (Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset)
Sets cluster drift values. More...
IFX_INLINE void | IfxEray_setClusterStartupDeviation (Ifx_ERAY *eray, uint16 acceptedStartupDeviation)
Sets cluster startup deviation. More...
IFX_INLINE void | IfxEray_setCollisionAvoidanceDuration (Ifx_ERAY *eray, uint8 collisionAvoidanceDuration)
Sets CAS symbol window duration. More...
IFX_INLINE void | IfxEray_setCycleDurationMacroticks (Ifx_ERAY *eray, uint16 macroticks)
sets duration of the communication cycle in Macroticks. More...
IFX_INLINE void | IfxEray_setCycleDurationMicroticks (Ifx_ERAY *eray, uint32 microticks)
sets duration of the communication cycle in Microticks. More...
IFX_INLINE void | IfxEray_setDecodingCorrectionValue (Ifx_ERAY *eray, uint8 decodingCorrection)
Sets decoding correction value. More...
IFX_INLINE void | IfxEray_setDynamicSlots (Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots)
Sets dynamic slots count and length. More...
IFX_INLINE void | IfxEray_setExternalCorrectionControl (Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate)
Sets external correction controls. More...
IFX_INLINE void | IfxEray_setExternalCorrectionValues (Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection)
Sets external correction values. More...
IFX_INLINE void | IfxEray_setFifoBufferStartIndex (Ifx_ERAY *eray, uint8 fifoBufferStartIndex)
Sets FIFO buffer start idex. More...
IFX_INLINE void | IfxEray_setFifoFilterConfigurations (Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter)
Sets FIFO filter configurations. More...
IFX_INLINE void | IfxEray_setFifoMessageBufferConfigurations (Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth)
Sets FIFO configurations. More...
IFX_INLINE void | IfxEray_setFirstDynamicBuffer (Ifx_ERAY *eray, uint8 firstDynamicBuffer)
Sets first dynamic buffer. More...
IFX_INLINE void | IfxEray_setListenTimeOuts (Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise)
Sets startup or wakeup listen timeouts. More...
IFX_INLINE void | IfxEray_setMaxColdStartAttempts (Ifx_ERAY *eray, uint8 maxColdStartAttempts)
Sets the maximum cold start attempts for active state. More...
IFX_INLINE void | IfxEray_setMaxCorrectionValues (Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection)
Sets max limit correction values. More...
IFX_INLINE void | IfxEray_setMaxSynchFrames (Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames)
Sets maximum synch frames in a cluster. More...
IFX_INLINE void | IfxEray_setMessageBufferCount (Ifx_ERAY *eray, uint8 numberOfMessageBuffers)
Sets number of message buffers. More...
IFX_INLINE void | IfxEray_setMessageHandlerConfigurations (Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart)
Sets Message Handler configurations. More...
IFX_INLINE void | IfxEray_setNetworkStartIdleTime (Ifx_ERAY *eray, uint16 networkStartIdleTime)
Sets network start Idle time. More...
IFX_INLINE void | IfxEray_setNetworkVectorLength (Ifx_ERAY *eray, uint32 networkVectorLength)
Sets network management vector length. More...
IFX_INLINE void | IfxEray_setNodeChannels (Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode)
Sets channels connected to node. More...
IFX_INLINE void | IfxEray_setOffsetCorrection (Ifx_ERAY *eray, uint16 correctionOffset)
Sets offset correction starting point. More...
IFX_INLINE void | IfxEray_setReceiveRequest (Ifx_ERAY *eray, boolean receiveRequested)
requests to receive the frame. More...
IFX_INLINE void | IfxEray_setReceiveWakeupTimes (Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime)
Sets receive wakeup times. More...
IFX_INLINE void | IfxEray_setRxBufferNumber (Ifx_ERAY *eray, uint8 bufferIndex)
sets buffer number in which frame is received. More...
IFX_INLINE void | IfxEray_setSlotActionPoints (Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint)
Sets slots action points. More...
IFX_INLINE void | IfxEray_setStaticSlots (Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount)
Sets static slots count and length. More...
IFX_INLINE void | IfxEray_setStrobePosition (Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition)
Sets sample point for strobing. More...
IFX_INLINE void | IfxEray_setSymbolChannels (Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted)
Sets channels which transmits symbols. More...
IFX_INLINE void | IfxEray_setTransmissionSlotMode (Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode)
Sets the transmit slot mode. More...
IFX_INLINE void | IfxEray_setTransmissionStartTime (Ifx_ERAY *eray, uint8 transmissionStartTime)
Sets transmission start time duration. More...
IFX_INLINE void | IfxEray_setTransmitRequest (Ifx_ERAY *eray, boolean transferRequested)
Sets transfer request to send frame. More...
IFX_INLINE void | IfxEray_setTransmitWakeupTimes (Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime)
Sets transmit wakeup times. More...
IFX_INLINE void | IfxEray_setTransmittedFrames (Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted)
Configures transmitted frames for startup and synchronization. More...
IFX_INLINE void | IfxEray_setTxBufferNumber (Ifx_ERAY *eray, uint8 bufferIndex)
Sets the transmit buffer number. More...
IFX_INLINE void | IfxEray_setViewData (Ifx_ERAY *eray, boolean swapRequested)
Swaps the shadow and Host output registers. More...
IFX_INLINE void | IfxEray_setWakeupPatternChannel (Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel)
Sets the cluster wakeup channel. More...

Detailed Description

Function Documentation

◆ IfxEray_receiveHeader()

IFX_INLINE void IfxEray_receiveHeader | ( | Ifx_ERAY * | eray,
 |  | boolean | headerReceived
 | ) |  |

request to receive header section from message buffer.

Parameters
eray | pointer to ERAY module registers.
headerReceived | whether header is received or not.
Returns
None

Definition at line 1460 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_sendHeader()

IFX_INLINE void IfxEray_sendHeader | ( | Ifx_ERAY * | eray,
 |  | boolean | headerTransfered
 | ) |  |

sets the bit to send header in frame.

Parameters
eray | pointer to ERAY module registers.
headerTransfered | whether header transfered or not.
Returns
None

Definition at line 1472 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame().

◆ IfxEray_setActiveCyclePairs()

IFX_INLINE void IfxEray_setActiveCyclePairs | ( | Ifx_ERAY * | eray,
 |  | uint8 | numberOfCyclePairsForActive
 | ) |  |

Sets number of cycle pairs for Active state.

Parameters
eray | pointer to ERAY module registers.
numberOfCyclePairsForActive | number of cycle pairs for Active state.
Returns
None

Definition at line 1478 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setAutoDelayBuffers()

IFX_INLINE void IfxEray_setAutoDelayBuffers ( Ifx_ERAY * eray )

Sets auto delays between input, output buffers and message RAM.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 1484 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_setBaudrate()

IFX_INLINE void IfxEray_setBaudrate | ( | Ifx_ERAY * | eray,
 |  | IfxEray_Baudrate | baudrate
 | ) |  |

Sets baudrate on Flexray bus.

Parameters
eray | pointer to ERAY module registers.
baudrate | baudrate on flexray bus.
Returns
None

Definition at line 1492 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setBufferReconfigSecure()

IFX_INLINE void IfxEray_setBufferReconfigSecure | ( | Ifx_ERAY * | eray,
 |  | uint8 | secureValue
 | ) |  |

Sets secured buffers in message RAM.

Parameters
eray | pointer to ERAY module registers.
secureValue | secure value.
Returns
None

Definition at line 1498 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setChannelAInitialOffsets()

IFX_INLINE void IfxEray_setChannelAInitialOffsets | ( | Ifx_ERAY * | eray,
 |  | uint8 | channelAMicrotickInitialOffset,
 |  | uint8 | channelAMacrotickInitialOffset
 | ) |  |

Sets channel A initial offstes.

Parameters
eray | pointer to ERAY module registers.
channelAMicrotickInitialOffset | difference between reference points on channel A in microticks.
channelAMacrotickInitialOffset | difference between reference points on channel A in macroticks.
Returns
None

Definition at line 1504 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setChannelBInitialOffsets()

IFX_INLINE void IfxEray_setChannelBInitialOffsets | ( | Ifx_ERAY * | eray,
 |  | uint8 | channelBMicrotickInitialOffset,
 |  | uint8 | channelBMacrotickInitialOffset
 | ) |  |

Sets channel B initial offstes.

Parameters
eray | pointer to ERAY module registers.
channelBMicrotickInitialOffset | difference between reference points on channel B in microticks.
channelBMacrotickInitialOffset | difference between reference points on channel B in macroticks.
Returns
None

Definition at line 1511 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setChannelsReceiveDelay()

IFX_INLINE void IfxEray_setChannelsReceiveDelay | ( | Ifx_ERAY * | eray,
 |  | uint8 | channelAReceptionDelay,
 |  | uint8 | channelBReceptionDelay
 | ) |  |

Sets receive delays on channels.

Parameters
eray | pointer to ERAY module registers.
channelAReceptionDelay | reception delay on channel A.
channelBReceptionDelay | reception delay on channel B.
Returns
None

Definition at line 1518 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setClockCorrectionCycles()

IFX_INLINE void IfxEray_setClockCorrectionCycles | ( | Ifx_ERAY * | eray,
 |  | uint8 | clockCorrectionCyclesPassive,
 |  | uint8 | clockCorrectionCyclesHalt
 | ) |  |

Sets clock correction cycles for Passive and Halt.

Parameters
eray | pointer to ERAY module registers.
clockCorrectionCyclesPassive | maximum number of cycles missing clock correction leading for passive state.
clockCorrectionCyclesHalt | maximum number of cycles missing clock correction leading for halt state.
Returns
None

Definition at line 1525 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setClockSynchErrorHalt()

IFX_INLINE void IfxEray_setClockSynchErrorHalt | ( | Ifx_ERAY * | eray,
 |  | boolean | clockSyncErrorHalt
 | ) |  |

lead to halt state in clock synch error.

Parameters
eray | pointer to ERAY module registers.
clockSyncErrorHalt | whether to enter halt in clock synch error or not.
Returns
None

Definition at line 1535 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setClusterDriftValues()

IFX_INLINE void IfxEray_setClusterDriftValues | ( | Ifx_ERAY * | eray,
 |  | uint8 | clusterDrift,
 |  | uint16 | maxDriftOffset
 | ) |  |

Sets cluster drift values.

Parameters
eray | pointer to ERAY module registers.
clusterDrift | cluster drift damping value used in clock synchronization.
maxDriftOffset | maximum drift offset between two nodes.
Returns
None

Definition at line 1541 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setClusterStartupDeviation()

IFX_INLINE void IfxEray_setClusterStartupDeviation | ( | Ifx_ERAY * | eray,
 |  | uint16 | acceptedStartupDeviation
 | ) |  |

Sets cluster startup deviation.

Parameters
eray | pointer to ERAY module registers.
acceptedStartupDeviation | deviation for startup Frames during integration.
Returns
None

Definition at line 1548 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setCollisionAvoidanceDuration()

IFX_INLINE void IfxEray_setCollisionAvoidanceDuration | ( | Ifx_ERAY * | eray,
 |  | uint8 | collisionAvoidanceDuration
 | ) |  |

Sets CAS symbol window duration.

Parameters
eray | pointer to ERAY module registers.
collisionAvoidanceDuration | accepted duration of CAS symbol.
Returns
None

Definition at line 1554 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setCycleDurationMacroticks()

IFX_INLINE void IfxEray_setCycleDurationMacroticks | ( | Ifx_ERAY * | eray,
 |  | uint16 | macroticks
 | ) |  |

sets duration of the communication cycle in Macroticks.

Parameters
eray | pointer to ERAY module registers.
macroticks | duration of the communication cycle in Macroticks.
Returns
None

Definition at line 1560 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setCycleDurationMicroticks()

IFX_INLINE void IfxEray_setCycleDurationMicroticks | ( | Ifx_ERAY * | eray,
 |  | uint32 | microticks
 | ) |  |

sets duration of the communication cycle in Microticks.

Parameters
eray | pointer to ERAY module registers.
microticks | duration of the communication cycle in Microticks.
Returns
None

Definition at line 1566 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setDecodingCorrectionValue()

IFX_INLINE void IfxEray_setDecodingCorrectionValue | ( | Ifx_ERAY * | eray,
 |  | uint8 | decodingCorrection
 | ) |  |

Sets decoding correction value.

Parameters
eray | pointer to ERAY module registers.
decodingCorrection | decoding correction value.
Returns
None

Definition at line 1572 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setDynamicSlots()

IFX_INLINE void IfxEray_setDynamicSlots | ( | Ifx_ERAY * | eray,
 |  | uint8 | dynamicSlotLength,
 |  | uint16 | dynamicSlotCount,
 |  | IfxEray_IdleDynamicSlots | idleDynamicSlots
 | ) |  |

Sets dynamic slots count and length.

Parameters
eray | pointer to ERAY module registers.
dynamicSlotLength | duration of dynamic slot in macroticks.
dynamicSlotCount | number of dynamic slots in a communication cycle.
idleDynamicSlots | duration of dynamic slot idle phase.
Returns
None

Definition at line 1578 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setExternalCorrectionControl()

IFX_INLINE void IfxEray_setExternalCorrectionControl | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ExternalOffset | externalOffset,
 |  | IfxEray_ExternalRate | externalRate
 | ) |  |

Sets external correction controls.

Parameters
eray | pointer to ERAY module registers.
externalOffset | External offset correction control.
externalRate | External rate correction control.
Returns
None

Definition at line 1586 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setExternalCorrectionValues()

IFX_INLINE void IfxEray_setExternalCorrectionValues | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ExternalOffsetCorrection | externalOffsetCorrection,
 |  | IfxEray_ExternalRateCorrection | externalRateCorrection
 | ) |  |

Sets external correction values.

Parameters
eray | pointer to ERAY module registers.
externalOffsetCorrection | external clock offset correction value.
externalRateCorrection | external clock rate correction value.
Returns
None

Definition at line 1593 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setFifoBufferStartIndex()

IFX_INLINE void IfxEray_setFifoBufferStartIndex | ( | Ifx_ERAY * | eray,
 |  | uint8 | fifoBufferStartIndex
 | ) |  |

Sets FIFO buffer start idex.

Parameters
eray | pointer to ERAY module registers.
fifoBufferStartIndex | FIFO buffer start idex.
Returns
None

Definition at line 1600 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setFifoFilterConfigurations()

IFX_INLINE void IfxEray_setFifoFilterConfigurations | ( | Ifx_ERAY * | eray,
 |  | uint16 | rejectedFrameId,
 |  | uint8 | filteredCycleNumber,
 |  | boolean | fifoNullFramesRejected,
 |  | uint16 | frameIdFilter
 | ) |  |

Sets FIFO filter configurations.

Parameters
eray | pointer to ERAY module registers.
rejectedFrameId | rejected frameId by FIFO.
filteredCycleNumber | filtered cycle number.
fifoNullFramesRejected | null frames rejection selection.
frameIdFilter | filtered frameid by FIFO.
Returns
None

Definition at line 1607 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setFifoMessageBufferConfigurations()

IFX_INLINE void IfxEray_setFifoMessageBufferConfigurations | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ReceiveChannel | receiveChannel,
 |  | boolean | staticFifoDisabled,
 |  | uint8 | fifoDepth
 | ) |  |

Sets FIFO configurations.

Parameters
eray | pointer to ERAY module registers.
receiveChannel | FIFO receive channel.
staticFifoDisabled | static FIFO selection.
fifoDepth | FIFO depth.
Returns
None

Definition at line 1616 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setFirstDynamicBuffer()

IFX_INLINE void IfxEray_setFirstDynamicBuffer | ( | Ifx_ERAY * | eray,
 |  | uint8 | firstDynamicBuffer
 | ) |  |

Sets first dynamic buffer.

Parameters
eray | pointer to ERAY module registers.
firstDynamicBuffer | first dynamic buffer.
Returns
None

Definition at line 1624 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setListenTimeOuts()

IFX_INLINE void IfxEray_setListenTimeOuts | ( | Ifx_ERAY * | eray,
 |  | uint32 | listenTimeOut,
 |  | IfxEray_ListenTimeOutNoise | listenTimeOutNoise
 | ) |  |

Sets startup or wakeup listen timeouts.

Parameters
eray | pointer to ERAY module registers.
listenTimeOut | wakeup or startup listen timeout in microticks.
listenTimeOutNoise | upper limit for startup or wakeup listen timeout in presence of noise.
Returns
None

Definition at line 1631 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setMaxColdStartAttempts()

IFX_INLINE void IfxEray_setMaxColdStartAttempts | ( | Ifx_ERAY * | eray,
 |  | uint8 | maxColdStartAttempts
 | ) |  |

Sets the maximum cold start attempts for active state.

Parameters
eray | pointer to ERAY module registers.
maxColdStartAttempts | maximum number of attempts that a cold start node allows.
Returns
None

Definition at line 1641 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setMaxCorrectionValues()

IFX_INLINE void IfxEray_setMaxCorrectionValues | ( | Ifx_ERAY * | eray,
 |  | uint16 | maxOffsetCorrection,
 |  | uint16 | maxRateCorrection
 | ) |  |

Sets max limit correction values.

Parameters
eray | pointer to ERAY module registers.
maxOffsetCorrection | maximum offset correction.
maxRateCorrection | maximum rate correction.
Returns
None

Definition at line 1647 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setMaxSynchFrames()

IFX_INLINE void IfxEray_setMaxSynchFrames | ( | Ifx_ERAY * | eray,
 |  | IfxEray_MaxSynchFrames | maxSyncFrames
 | ) |  |

Sets maximum synch frames in a cluster.

Parameters
eray | pointer to ERAY module registers.
maxSyncFrames | maximum synch frames in a cluster.
Returns
None

Definition at line 1654 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setMessageBufferCount()

IFX_INLINE void IfxEray_setMessageBufferCount | ( | Ifx_ERAY * | eray,
 |  | uint8 | numberOfMessageBuffers
 | ) |  |

Sets number of message buffers.

Parameters
eray | pointer to ERAY module registers.
numberOfMessageBuffers | number of message buffers.
Returns
None

Definition at line 1660 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setMessageHandlerConfigurations()

IFX_INLINE void IfxEray_setMessageHandlerConfigurations | ( | Ifx_ERAY * | eray,
 |  | uint8 | staticFramepayload,
 |  | uint8 | latestTransmissionStart
 | ) |  |

Sets Message Handler configurations.

Parameters
eray | pointer to ERAY module registers.
staticFramepayload | payload length of static frames in double bytes.
latestTransmissionStart | dynamic slots befor transmission of inhibit frame in dynamic segment.
Returns
None

Definition at line 1666 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setNetworkStartIdleTime()

IFX_INLINE void IfxEray_setNetworkStartIdleTime | ( | Ifx_ERAY * | eray,
 |  | uint16 | networkStartIdleTime
 | ) |  |

Sets network start Idle time.

Parameters
eray | pointer to ERAY module registers.
networkStartIdleTime | starting point of Network Idle Time Phase.
Returns
None

Definition at line 1676 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setNetworkVectorLength()

IFX_INLINE void IfxEray_setNetworkVectorLength | ( | Ifx_ERAY * | eray,
 |  | uint32 | networkVectorLength
 | ) |  |

Sets network management vector length.

Parameters
eray | pointer to ERAY module registers.
networkVectorLength | length of network management vector.
Returns
None

Definition at line 1682 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setNodeChannels()

IFX_INLINE void IfxEray_setNodeChannels | ( | Ifx_ERAY * | eray,
 |  | boolean | channelAConnectedNode,
 |  | boolean | channelBConnectedNode
 | ) |  |

Sets channels connected to node.

Parameters
eray | pointer to ERAY module registers.
channelAConnectedNode | whether node connected to channel A or not.
channelBConnectedNode | whether node connected to channel B or not.
Returns
None

Definition at line 1688 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setOffsetCorrection()

IFX_INLINE void IfxEray_setOffsetCorrection | ( | Ifx_ERAY * | eray,
 |  | uint16 | correctionOffset
 | ) |  |

Sets offset correction starting point.

Parameters
eray | pointer to ERAY module registers.
correctionOffset | offset correction start point.
Returns
None

Definition at line 1695 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setReceiveRequest()

IFX_INLINE void IfxEray_setReceiveRequest | ( | Ifx_ERAY * | eray,
 |  | boolean | receiveRequested
 | ) |  |

requests to receive the frame.

Parameters
eray | pointer to ERAY module registers.
receiveRequested | whether frame to be received or not.
Returns
None

Definition at line 1701 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_setReceiveWakeupTimes()

IFX_INLINE void IfxEray_setReceiveWakeupTimes | ( | Ifx_ERAY * | eray,
 |  | uint16 | receiveWakeupTestDuration,
 |  | uint8 | receiveWakeupIdleTime,
 |  | uint8 | receiveWakeupLowTime
 | ) |  |

Sets receive wakeup times.

Parameters
eray | pointer to ERAY module registers.
receiveWakeupTestDuration | duration of receive wakeup pattern.
receiveWakeupIdleTime | duration of receive wakeup idle time.
receiveWakeupLowTime | duration of receive wakeup low time.
Returns
None

Definition at line 1707 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setRxBufferNumber()

IFX_INLINE void IfxEray_setRxBufferNumber | ( | Ifx_ERAY * | eray,
 |  | uint8 | bufferIndex
 | ) |  |

sets buffer number in which frame is received.

Parameters
eray | pointer to ERAY module registers.
bufferIndex | buffer number in which frame is received.
Returns
None

Definition at line 1715 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_setSlotActionPoints()

IFX_INLINE void IfxEray_setSlotActionPoints | ( | Ifx_ERAY * | eray,
 |  | uint8 | staticActionPoint,
 |  | uint8 | dynamicActionPoint
 | ) |  |

Sets slots action points.

Parameters
eray | pointer to ERAY module registers.
staticActionPoint | static slots and symbol window action point.
dynamicActionPoint | dynamic slots action point.
Returns
None

Definition at line 1730 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setStaticSlots()

IFX_INLINE void IfxEray_setStaticSlots | ( | Ifx_ERAY * | eray,
 |  | uint16 | staticSlotLength,
 |  | uint16 | staticSlotsCount
 | ) |  |

Sets static slots count and length.

Parameters
eray | pointer to ERAY module registers.
staticSlotLength | duration of static slot in macroticks.
staticSlotsCount | number of static slots in a communication cycle.
Returns
None

Definition at line 1737 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setStrobePosition()

IFX_INLINE void IfxEray_setStrobePosition | ( | Ifx_ERAY * | eray,
 |  | IfxEray_StrobePosition | strobePosition
 | ) |  |

Sets sample point for strobing.

Parameters
eray | pointer to ERAY module registers.
strobePosition | strobing sample count.
Returns
None

Definition at line 1744 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setSymbolChannels()

IFX_INLINE void IfxEray_setSymbolChannels | ( | Ifx_ERAY * | eray,
 |  | boolean | channelASymbolTransmitted,
 |  | boolean | channelBSymbolTransmitted
 | ) |  |

Sets channels which transmits symbols.

Parameters
eray | pointer to ERAY module registers.
channelASymbolTransmitted | whether symbol is transmitted in Channel A or not.
channelBSymbolTransmitted | whether symbol is transmitted in Channel B or not.
Returns
None

Definition at line 1761 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setTransmissionSlotMode()

IFX_INLINE void IfxEray_setTransmissionSlotMode | ( | Ifx_ERAY * | eray,
 |  | IfxEray_TransmissionSlotMode | transmissionSlotMode
 | ) |  |

Sets the transmit slot mode.

Parameters
eray | pointer to ERAY module registers.
transmissionSlotMode | transmission slot mode.
Returns
None

Definition at line 1768 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setTransmissionStartTime()

IFX_INLINE void IfxEray_setTransmissionStartTime | ( | Ifx_ERAY * | eray,
 |  | uint8 | transmissionStartTime
 | ) |  |

Sets transmission start time duration.

Parameters
eray | pointer to ERAY module registers.
transmissionStartTime | transmission start time.
Returns
None

Definition at line 1774 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setTransmitRequest()

IFX_INLINE void IfxEray_setTransmitRequest | ( | Ifx_ERAY * | eray,
 |  | boolean | transferRequested
 | ) |  |

Sets transfer request to send frame.

Parameters
eray | pointer to ERAY module registers.
transferRequested | whether transfer requested or not.
Returns
None

Definition at line 1780 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame().

◆ IfxEray_setTransmittedFrames()

IFX_INLINE void IfxEray_setTransmittedFrames | ( | Ifx_ERAY * | eray,
 |  | boolean | startupFrameTransmitted,
 |  | boolean | synchFrameTransmitted
 | ) |  |

Configures transmitted frames for startup and synchronization.

Parameters
eray | pointer to ERAY module registers.
startupFrameTransmitted | whether startup Frame transmitted or not.
synchFrameTransmitted | whether synch Frame transmitted or not.
Returns
None

Definition at line 1794 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setTransmitWakeupTimes()

IFX_INLINE void IfxEray_setTransmitWakeupTimes | ( | Ifx_ERAY * | eray,
 |  | uint8 | transmitWakeupRepetitions,
 |  | uint8 | transmitWakeupIdleTime,
 |  | uint8 | transmitWakeupLowTime
 | ) |  |

Sets transmit wakeup times.

Parameters
eray | pointer to ERAY module registers.
transmitWakeupRepetitions | transmission wakeup repetitions.
transmitWakeupIdleTime | duration of transmit wakeup idle time.
transmitWakeupLowTime | duration of transmit wakeup low time.
Returns
None

Definition at line 1786 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setTxBufferNumber()

IFX_INLINE void IfxEray_setTxBufferNumber | ( | Ifx_ERAY * | eray,
 |  | uint8 | bufferIndex
 | ) |  |

Sets the transmit buffer number.

Parameters
eray | pointer to ERAY module registers.
bufferIndex | buffer number in which frame is sent.
Returns
None

Definition at line 1801 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame().

◆ IfxEray_setViewData()

IFX_INLINE void IfxEray_setViewData | ( | Ifx_ERAY * | eray,
 |  | boolean | swapRequested
 | ) |  |

Swaps the shadow and Host output registers.

Parameters
eray | pointer to ERAY module registers.
swapRequested | whether swap is requested or not.
Returns
None

Definition at line 1807 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_setWakeupPatternChannel()

IFX_INLINE void IfxEray_setWakeupPatternChannel | ( | Ifx_ERAY * | eray,
 |  | IfxEray_WakeupChannel | wakeupPatternChannel
 | ) |  |

Sets the cluster wakeup channel.

Parameters
eray | pointer to ERAY module registers.
wakeupPatternChannel | cluster wakeup pattern channel.
Returns
None

Definition at line 1813 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » ERAY » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxEray_Header
Header section in a frame. More...
struct | IfxEray_ReceivedHeader
Received header in a frame. More...
struct | IfxEray_SlotConfig
Transmit control structure. More...

Detailed Description

Data Structure Documentation

◆ IfxEray_Header

struct IfxEray_Header

Header section in a frame.

Definition at line 381 of file IfxEray.h.

Data Fields
IfxEray_BufferDirection | bufferDirection | selects buffer as a transmit buffer or as a receive buffer.
boolean | bufferServiceEnabled | wether buffer service request is enabled or not.
boolean | channelAFiltered | channel A serves as a control for transmit and filter for receive buffers.
boolean | channelBFiltered | channel B serves as a control for transmit and filter for receive buffers.
uint8 | cycleCode | the cycle set used for cycle counter filtering.
uint16 | dataPointer | pointer to the data section of message buffer in RAM.
uint16 | frameId | slot ID of the selected Message Buffer.
uint8 | payloadLength | length of data section.
boolean | startupFrameIndicator | whether startup frame is indicated or not.
boolean | syncFrameIndicator | whether sync frame is indicated or not.
IfxEray_TransmissionMode | transmissionMode | transmission mode of Header.
boolean | transmitPayloadIndicatior | weather payload indicator is set or not.

◆ IfxEray_ReceivedHeader

struct IfxEray_ReceivedHeader

Received header in a frame.

Definition at line 399 of file IfxEray.h.

Data Fields
uint8 | cycleNumber: 7 | cycle number in which frame is received.
uint16 | frameId: 11 | received frame id.
uint16 | headerCrc: 11 | received header crc.
uint8 | nullFrameIndicator: 1 | 0 : no data frame received; 1: atleast one data frame received.
uint8 | payloadLength: 7 | received payload length.
uint8 | payloadPreambleIndicator: 1 | 1 : received payload segment has network management and message id or not; 0 : It hasn't.
uint8 | startupFrame: 1 | 0 : received frame is not a startup frame ; 1 : receive frame is a startup frame.
uint8 | syncFrame: 1 | 0 : received frame is not a synch frame ; 1 : receive frame is a synch frame.

◆ IfxEray_SlotConfig

struct IfxEray_SlotConfig

Transmit control structure.

Definition at line 413 of file IfxEray.h.

Data Fields
uint8 | bufferIndex | buffer index in the Message RAM.
boolean | dataTransfered | whether data is transfered from input buffers to Message RAM or not.
boolean | headerTransfered | whether header is transfered from input buffers to Message RAM or not.
boolean | transferRequested | transmit buffer released for transmission or not.


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxEray_receiveData (Ifx_ERAY *eray, boolean dataReceived)
requests to receive data from message buffer. More...
IFX_INLINE void | IfxEray_sendData (Ifx_ERAY *eray, boolean dataTransfered)
sets the bit to send data in frame. More...
IFX_EXTERN uint16 | IfxEray_calcHeaderCrc (uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
Calculate and returns the CRC for frame. More...
IFX_EXTERN void | IfxEray_readData (Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers. More...
IFX_EXTERN void | IfxEray_readFrame (Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers. More...
IFX_EXTERN void | IfxEray_setSlot (Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots. More...
IFX_EXTERN void | IfxEray_writeData (Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers. More...

Detailed Description

Function Documentation

◆ IfxEray_calcHeaderCrc()

IFX_EXTERN uint16 IfxEray_calcHeaderCrc | ( | uint8 | payloadLength,
 |  | uint16 | frameId,
 |  | boolean | startupFrameIndicator,
 |  | boolean | syncFrameIndicator
 | ) |  |

Calculate and returns the CRC for frame.

Parameters
payloadLength | payload length configured for frame.
frameId | slot id
startupFrameIndicator | whether startup frame is indicated or not.
syncFrameIndicator | whether sync frame is indicated or not.
Returns
calculated CRC value.

Definition at line 52 of file IfxEray.c.

Referenced by IfxEray_setSlot().

◆ IfxEray_readData()

IFX_EXTERN void IfxEray_readData | ( | Ifx_ERAY * | eray,
 |  | uint32 * | data,
 |  | uint8 | payloadLength
 | ) |  |

Reads the received data from output registers.

Parameters
eray | pointer to ERAY module registers.
data | pointer to received data buffer.
payloadLength | payload length received in a frame.
Returns
None

Definition at line 188 of file IfxEray.c.

Referenced by IfxEray_Eray_readData(), and IfxEray_readFrame().

◆ IfxEray_readFrame()

IFX_EXTERN void IfxEray_readFrame | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ReceivedHeader * | header,
 |  | uint32 * | data,
 |  | Ifx_SizeT | maxPayloadLength
 | ) |  |

Reads header and data from output buffers.

Parameters
eray | pointer to ERAY module registers.
header | header received in a frame.
data | data received in a frame.
maxPayloadLength | maximum payload length received in a frame.
Returns
None

Definition at line 203 of file IfxEray.c.

Referenced by IfxEray_Eray_readFrame().

◆ IfxEray_receiveData()

IFX_INLINE void IfxEray_receiveData | ( | Ifx_ERAY * | eray,
 |  | boolean | dataReceived
 | ) |  |

requests to receive data from message buffer.

Parameters
eray | pointer to ERAY module registers.
dataReceived | whether data to be received or not.
Returns
None

Definition at line 1454 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_sendData()

IFX_INLINE void IfxEray_sendData | ( | Ifx_ERAY * | eray,
 |  | boolean | dataTransfered
 | ) |  |

sets the bit to send data in frame.

Parameters
eray | pointer to ERAY module registers.
dataTransfered | whether data transfered or not.
Returns
None

Definition at line 1466 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame().

◆ IfxEray_setSlot()

IFX_EXTERN void IfxEray_setSlot | ( | Ifx_ERAY * | eray,
 |  | const IfxEray_Header * | header,
 |  | const uint32 * | data,
 |  | const IfxEray_SlotConfig * | slotConfig
 | ) |  |

Writes header and data to Input buffers and set the slots.

Parameters
eray | pointer to ERAY module registers.
header | Header section of message buffer.
data | data section of message buffer.
slotConfig | pointer slot allocation configuration structure.
Returns
None

Definition at line 295 of file IfxEray.c.

Referenced by IfxEray_Eray_bufferReconfig(), and IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_writeData()

IFX_EXTERN void IfxEray_writeData | ( | Ifx_ERAY * | eray,
 |  | const uint32 * | data,
 |  | uint8 | payloadLength
 | ) |  |

Writes data section of a frame to input data registers.

Parameters
eray | pointer to ERAY module registers.
data | data segment in a frame.
payloadLength | payload length configured for slot buffer.
Returns
None

Definition at line 348 of file IfxEray.c.

Referenced by IfxEray_Eray_writeData(), and IfxEray_setSlot().


iLLD_TC26B: ERAY Pin Mapping

Data Structures | Macros | Variables
ERAY Pin Mapping
iLLD » ERAY
Collaboration diagram for ERAY Pin Mapping:

Data Structures

struct | IfxEray_Rxd_In
RXD pin mapping structure. More...
struct | IfxEray_Txd_Out
TXD pin mapping structure. More...
struct | IfxEray_Txen_Out
TXEN pin mapping structure. More...

Macros

#define | IFXERAY_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXERAY_PINMAP_NUM_NODES 2
#define | IFXERAY_PINMAP_RXD_IN_NUM_ITEMS 4
#define | IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS 4
#define | IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS 5

Variables

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN
ERAY_RXDA0: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN
ERAY_RXDA1: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN
ERAY_RXDA2: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN
ERAY_RXDA3: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN
ERAY_RXDB0: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN
ERAY_RXDB1: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN
ERAY_RXDB2: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN
ERAY_RXDB3: ERAY input. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT
ERAY_TXDA: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT
ERAY_TXDA: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT
ERAY_TXDA: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT
ERAY_TXDA: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT
ERAY_TXDB: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT
ERAY_TXDB: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT
ERAY_TXDB: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT
ERAY_TXDB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT
ERAY_TXENA: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT
ERAY_TXENA: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT
ERAY_TXENA: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN const IfxEray_Rxd_In * | IfxEray_Rxd_In_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
IfxEray_Rxd_In table. More...
IFX_EXTERN const IfxEray_Txd_Out * | IfxEray_Txd_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
IfxEray_Txd_Out table. More...
IFX_EXTERN const IfxEray_Txen_Out * | IfxEray_Txen_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxEray_Txen_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxEray_Rxd_In

struct IfxEray_Rxd_In

RXD pin mapping structure.

Definition at line 56 of file IfxEray_PinMap.h.

Collaboration diagram for IfxEray_Rxd_In:
[legend]
Data Fields
Ifx_ERAY * | module | Base address.
IfxEray_NodeId | nodeId | Node ID.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEray_Txd_Out

struct IfxEray_Txd_Out

TXD pin mapping structure.

Definition at line 65 of file IfxEray_PinMap.h.

Collaboration diagram for IfxEray_Txd_Out:
[legend]
Data Fields
Ifx_ERAY * | module | Base address.
IfxEray_NodeId | nodeId | Node ID.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxEray_Txen_Out

struct IfxEray_Txen_Out

TXEN pin mapping structure.

Definition at line 74 of file IfxEray_PinMap.h.

Collaboration diagram for IfxEray_Txen_Out:
[legend]
Data Fields
Ifx_ERAY * | module | Base address.
IfxEray_NodeId | nodeId | Node ID.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXERAY_PINMAP_NUM_MODULES

#define IFXERAY_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 108 of file IfxEray_PinMap.h.

◆ IFXERAY_PINMAP_NUM_NODES

#define IFXERAY_PINMAP_NUM_NODES 2

Definition at line 109 of file IfxEray_PinMap.h.

◆ IFXERAY_PINMAP_RXD_IN_NUM_ITEMS

#define IFXERAY_PINMAP_RXD_IN_NUM_ITEMS 4

Definition at line 110 of file IfxEray_PinMap.h.

◆ IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS

#define IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS 4

Definition at line 111 of file IfxEray_PinMap.h.

◆ IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS

#define IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS 5

Definition at line 112 of file IfxEray_PinMap.h.

Variable Documentation

◆ IfxEray0_RXDA0_P14_8_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN

ERAY_RXDA0: ERAY input.

Definition at line 82 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDA1_P11_9_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN

ERAY_RXDA1: ERAY input.

Definition at line 83 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDA2_P02_1_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN

ERAY_RXDA2: ERAY input.

Definition at line 84 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDA3_P14_1_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN

ERAY_RXDA3: ERAY input.

Definition at line 85 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDB0_P14_7_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN

ERAY_RXDB0: ERAY input.

Definition at line 86 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDB1_P11_10_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN

ERAY_RXDB1: ERAY input.

Definition at line 87 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDB2_P02_3_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN

ERAY_RXDB2: ERAY input.

Definition at line 88 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDB3_P14_1_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN

ERAY_RXDB3: ERAY input.

Definition at line 89 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDA_P02_0_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT

ERAY_TXDA: ERAY output.

Definition at line 90 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDA_P11_3_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT

ERAY_TXDA: ERAY output.

Definition at line 91 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDA_P14_0_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT

ERAY_TXDA: ERAY output.

Definition at line 92 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDA_P14_10_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT

ERAY_TXDA: ERAY output.

Definition at line 93 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDB_P02_2_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT

ERAY_TXDB: ERAY output.

Definition at line 94 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDB_P11_12_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT

ERAY_TXDB: ERAY output.

Definition at line 95 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDB_P14_0_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT

ERAY_TXDB: ERAY output.

Definition at line 96 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDB_P14_5_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT

ERAY_TXDB: ERAY output.

Definition at line 97 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENA_P02_4_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT

ERAY_TXENA: ERAY output.

Definition at line 98 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENA_P11_6_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT

ERAY_TXENA: ERAY output.

Definition at line 99 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENA_P14_9_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT

ERAY_TXENA: ERAY output.

Definition at line 100 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENB_P02_5_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT

ERAY_TXENB: ERAY output.

Definition at line 101 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENB_P11_11_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT

ERAY_TXENB: ERAY output.

Definition at line 102 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENB_P11_6_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT

ERAY_TXENB: ERAY output.

Definition at line 103 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENB_P14_6_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT

ERAY_TXENB: ERAY output.

Definition at line 104 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENB_P14_9_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT

ERAY_TXENB: ERAY output.

Definition at line 105 of file IfxEray_PinMap.h.

◆ IfxEray_Rxd_In_pinTable

IFX_EXTERN const IfxEray_Rxd_In* IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]

IfxEray_Rxd_In table.

Definition at line 116 of file IfxEray_PinMap.h.

◆ IfxEray_Txd_Out_pinTable

IFX_EXTERN const IfxEray_Txd_Out* IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]

IfxEray_Txd_Out table.

Definition at line 119 of file IfxEray_PinMap.h.

◆ IfxEray_Txen_Out_pinTable

IFX_EXTERN const IfxEray_Txen_Out* IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]

IfxEray_Txen_Out table.

Definition at line 122 of file IfxEray_PinMap.h.


iLLD_TC26B: How to use the ERAY Interface driver?

How to use the ERAY Interface driver?
iLLD » ERAY
Collaboration diagram for How to use the ERAY Interface driver?:

Preparation

Include Files

Include following header file into your C code:

#include <Eray/Eray/IfxEray_Eray.h>
#include <Scu/Std/IfxScuWdt.h>
#include <eray_commands.h>

Defines

// Number of tested communication cycles
#define NUMBER_ERAY_COMM_CYCLES 8
#define NO_OF_SLOTS 2

Variables

// global variables
static IfxEray_Eray eray;
volatile unsigned receivedDataCounter;
uint32 receivedData[NUMBER_ERAY_COMM_CYCLES][NO_OF_SLOTS];

Interrupt Handler Installation

Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

#define IFX_ERAY_INT0_PRIO 1
#define IFX_ERAY_INT1_PRIO 2
#define IFX_ERAY_NDAT0_PRIO 3
#define IFX_ERAY_NDAT1_PRIO 4
#define IFX_ERAY_MBSC0_PRIO 5
#define IFX_ERAY_MBSC1_PRIO 6

Add the interrupt service routine to your C code. It has to call the ERAY interrupt handler:

// ISR routines for interrupt handling
void ERAY_irqInt0Handler();
void ERAY_irqInt1Handler();
void ERAY_irqNdat0Handler();
void ERAY_irqNdat1Handler();
void ERAY_irqMbsc0Handler();
void ERAY_irqMbsc1Handler();
IFX_INTERRUPT(eray0Int0ISR, 0, IFX_ERAY_INT0_PRIO)
{
ERAY_irqInt0Handler();
}
IFX_INTERRUPT(eray0Int1ISR, 0, IFX_ERAY_INT1_PRIO)
{
ERAY_irqInt1Handler();
}
IFX_INTERRUPT(eray0Ndat0ISR, 0, IFX_ERAY_NDAT0_PRIO)
{
ERAY_irqNdat0Handler();
}
IFX_INTERRUPT(eray0Ndat1ISR, 0, IFX_ERAY_NDAT1_PRIO)
{
ERAY_irqNdat1Handler();
}
IFX_INTERRUPT(eray0Mbsc0ISR, 0, IFX_ERAY_MBSC0_PRIO)
{
ERAY_irqMbsc0Handler();
}
IFX_INTERRUPT(eray0Mbsc1ISR, 0, IFX_ERAY_MBSC1_PRIO)
{
ERAY_irqMbsc1Handler();
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handler
IfxCpu_Irq_installInterruptHandler(&eray0Int0ISR, IFX_ERAY_INT0_PRIO);
IfxCpu_Irq_installInterruptHandler(&eray0Int1ISR, IFX_ERAY_INT1_PRIO);
IfxCpu_Irq_installInterruptHandler(&eray0Ndat0ISR, IFX_ERAY_NDAT0_PRIO);
IfxCpu_Irq_installInterruptHandler(&eray0Ndat1ISR, IFX_ERAY_NDAT1_PRIO);
IfxCpu_Irq_installInterruptHandler(&eray0Mbsc0ISR, IFX_ERAY_MBSC0_PRIO);
IfxCpu_Irq_installInterruptHandler(&eray0Mbsc1ISR, IFX_ERAY_MBSC1_PRIO);
// enable all cpu0 interrupts
IfxCpu_enableInterrupts();

Module Initialisation

First ensure that the ERAY PLL is configured to output a 80 MHz clock for the ERAY module:

// initialize Eray PLL
//clib_ver_printf("Initialize ERAY PLL\n");
{
IfxScuCcu_ErayPllConfig ErayPllConfig;
IfxScuCcu_initErayPllConfig(&ErayPllConfig);
result |= IfxScuCcu_initErayPll(&ErayPllConfig);
}

Thereafter initialize the module:

// create module config
IfxEray_Eray_Config erayModuleConfig;
#if TEST_ERAY1
//clib_ver_printf("Initialize ERAY1\n");
IfxEray_Eray_initModuleConfig(&erayModuleConfig, &MODULE_ERAY1);
#else
//clib_ver_printf("Initialize ERAY0\n");
IfxEray_Eray_initModuleConfig(&erayModuleConfig, &MODULE_ERAY0);
#endif
// ISR priorities
erayModuleConfig.interrupt.int0Priority = IFX_ERAY_INT0_PRIO;
erayModuleConfig.interrupt.int1Priority = IFX_ERAY_INT1_PRIO;
erayModuleConfig.interrupt.ndat0Priority = IFX_ERAY_NDAT0_PRIO;
erayModuleConfig.interrupt.ndat1Priority = IFX_ERAY_NDAT1_PRIO;
erayModuleConfig.interrupt.mbsc0Priority = IFX_ERAY_MBSC0_PRIO;
erayModuleConfig.interrupt.mbsc1Priority = IFX_ERAY_MBSC1_PRIO;
// init module
IfxEray_Eray_initModule( &eray, &erayModuleConfig );

Note: Application should explicitly configure the system DMA, if system DMA is selected as the service provider for the interrupt.

Node Initialisation

The node initialisation can be done in the same function.

// get ERAY node default configuration
IfxEray_Eray_NodeConfig nodeConfig;
IfxEray_Eray_Node_initConfig(&nodeConfig);
// configuration changes for interaction with external testbench element
{
// only for simulation: start external ERAY node
{
TbeMessage reply;
// start ERay Testbench Element
sendMessage(MSG_ID_TESTBENCH_ERAY, CMD_ERAY_TBE_START, 0 );
receiveMessageBlockingFrom(MSG_ID_TESTBENCH_ERAY, reply);
}
{
// SUCC1
IfxEray_Eray_Succ1Config *succ1 = &nodeConfig.controllerConfig.succ1Config;
succ1->clockSyncErrorHalt = FALSE;
}
{
// PRTC1
IfxEray_Eray_Prtc1Control *prtc1 = &nodeConfig.controllerConfig.prtc1Control;
prtc1->transmissionStartTime = 10;
prtc1->collisionAvoidanceDuration = 0;
prtc1->strobePosition = IfxEray_StrobePosition_5;
prtc1->baudrate = IfxEray_Baudrate_10;
prtc1->receiveWakeupTestDuration = 76;
prtc1->transmitWakeupRepetitions = 2;
}
{
// PRTC2
IfxEray_Eray_Prtc2Control *prtc2 = &nodeConfig.controllerConfig.prtc2Control;
prtc2->receiveWakeupIdleTime = 18;
prtc2->receiveWakeupLowTime = 18;
prtc2->transmitWakeupIdleTime = 180;
prtc2->transmitWakeupLowTime = 60;
}
{
// SUCC2
IfxEray_Eray_Succ2Config *succ2 = &nodeConfig.controllerConfig.succ2Config;
succ2->listenTimeOut = 2500;
succ2->listenTimeOutNoise = IfxEray_ListenTimeOutNoise_16;
}
{
// GTU
IfxEray_Eray_GTUConfig *gtu = &nodeConfig.controllerConfig.gtuConfig;
gtu->gtu01Config.microticksPerCycle = 3000;
gtu->gtu02Config.macroticksPerCycle = 50;
gtu->gtu02Config.maxSyncFrames = 15;
gtu->gtu03Config.channelAMicrotickInitialOffset = 0;
gtu->gtu03Config.channelBMicrotickInitialOffset = 0;
gtu->gtu03Config.channelAMacrotickInitialOffset = 2;
gtu->gtu03Config.channelBMacrotickInitialOffset = 2;
gtu->gtu04Config.networkStartIdleTime = 0x2f;
gtu->gtu04Config.correctionOffset = 0x30;
gtu->gtu05Config.channelAReceptionDelay = 0x4;
gtu->gtu05Config.channelBReceptionDelay = 0x4;
gtu->gtu05Config.clusterDrift = 1;
gtu->gtu05Config.decodingCorrection = 0x34;
gtu->gtu06Config.acceptedStartupDeviation = 0x81;
gtu->gtu06Config.maxDriftOffset = 0x31;
gtu->gtu07Config.staticSlotLength = 0x10;
gtu->gtu07Config.staticSlotsCount = 0x2;
gtu->gtu08Config.dynamicSlotLength = 2;
gtu->gtu08Config.dynamicSlotCount = 2;
gtu->gtu09Config.idleDynamicSlots = IfxEray_IdleDynamicSlots_1; // bug: not set by IfxEray_setDynamicSlots
gtu->gtu09Config.staticActionPoint = 1;
gtu->gtu09Config.dynamicActionPoint = 1;
gtu->gtu10Config.maxOffsetCorrection = 0xcd;
gtu->gtu10Config.maxRateCorrection = 0x31;
gtu->gtu11Config.externalOffsetCorrection = IfxEray_ExternalOffsetCorrection_0;
gtu->gtu11Config.externalRateCorrection = IfxEray_ExternalRateCorrection_0;
gtu->gtu11Config.externalOffset = IfxEray_ExternalOffset_noCorrection;
gtu->gtu11Config.externalRate = IfxEray_ExternalRate_noCorrection;
}
}
// Messages
nodeConfig.messageRAMConfig.numberOfMessageBuffers = 2;
nodeConfig.messageRAMConfig.firstDynamicBuffer = 0x40;
nodeConfig.messageRAMConfig.fifoBufferStartIndex = 0x40;
// Frame header
IfxEray_Header header[2] = {
// fid cyc cha chb buffer direction ppit transmission mode mbi pl dp startupfr syncfr
{ 1, 1, TRUE, TRUE, IfxEray_BufferDirection_transmit, TRUE, IfxEray_TransmissionMode_continuous, TRUE, 4, 0x30, TRUE, TRUE },
{ 2, 1, TRUE, TRUE, IfxEray_BufferDirection_receive, FALSE, IfxEray_TransmissionMode_continuous, TRUE, 4, 0x40, FALSE, FALSE },
};
// slot buffer
IfxEray_SlotConfig slot[2] = {
// header data stxrh buffNum
{ TRUE, TRUE, TRUE, 0 },
{ TRUE, FALSE, FALSE, 1 },
};
for(int i=0; i < 2; ++i) {
nodeConfig.messageRAMConfig.header[i] = &header[i];
nodeConfig.messageRAMConfig.slotControl[i] = &slot[i];
nodeConfig.messageRAMConfig.data[i] = NULL_PTR;
}
#if TEST_ERAY1
// channel A pins
const IfxEray_Eray_NodeA nodeAPins = {
IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
&IfxEray1_RXDA0_P14_8_IN, &IfxEray1_TXDA_P14_10_OUT,
&IfxEray1_TXENA_P14_9_OUT
};
// channel B pins
const IfxEray_Eray_NodeB nodeBPins = {
IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
&IfxEray1_RXDB0_P14_7_IN, &IfxEray1_TXDB_P14_5_OUT,
&IfxEray1_TXENB_P14_6_OUT
};
#else
// channel A pins
const IfxEray_Eray_NodeA nodeAPins = {
IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
&IfxEray0_RXDA0_P14_8_IN, &IfxEray0_TXDA_P14_10_OUT,
&IfxEray0_TXENA_P14_9_OUT
};
// channel B pins
const IfxEray_Eray_NodeB nodeBPins = {
IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
&IfxEray0_RXDB0_P14_7_IN, &IfxEray0_TXDB_P14_5_OUT,
&IfxEray0_TXENB_P14_6_OUT
};
#endif
const IfxEray_Eray_Pins pins = { (IfxEray_Eray_NodeA *)&nodeAPins, (IfxEray_Eray_NodeB *)&nodeBPins };
nodeConfig.pins = (IfxEray_Eray_Pins *)&pins;
// ERAY node initialisation with supplied configuration
IfxEray_Eray_Node_init(&eray, &nodeConfig);
// set interrupt outputs for data and message buffers
IfxEray_Eray_setNewDataInterruptDestination(&eray, 0, 0); // New Data #0 -> NDAT0
IfxEray_Eray_setNewDataInterruptDestination(&eray, 1, 1); // New Data #1 -> NDAT1
IfxEray_Eray_setMessageBufferInterruptDestination(&eray, 0, 0); // Message Buffer #0 -> MBSC0
IfxEray_Eray_setMessageBufferInterruptDestination(&eray, 1, 1); // Message Buffer #1 -> MBSC1
//clib_ver_printf("Send wakeup pattern\n");
// send wakeup pattern on default configured channel ( IfxEray_Channel_a )
IfxEray_PocState pocState;
do {
pocState = IfxEray_Eray_getPocState( &eray );
if ( pocState != IfxEray_PocState_wakeupListen ) {
while ( !IfxEray_Eray_changePocState( &eray, IfxEray_PocCommand_wakeup ));
}
} while ( pocState != IfxEray_PocState_wakeupListen );
// allow node to cold-start and wait until cold-start is successful
while( !IfxEray_Eray_allowColdStart(&eray) );
// start the communication in cluster and wait until communication is successfull
while( !IfxEray_Eray_startCommunication(&eray) );
// wait until communication Controller enters NORMAL_ACTIVE or NORMAL_PASSIVE state, exit if communication Controller enters HALT state.
do {
pocState = IfxEray_Eray_getPocState( &eray );
// if communication Controller enters HALT state, break the loop.
if( pocState == IfxEray_PocState_halt) {
break;
}
} while( !((pocState == IfxEray_PocState_normalActive) || (pocState == IfxEray_PocState_normalPassive)) );
// enter ALL_SLOTS mode when Communication Controller is in NORMAL_ACTIVE or NORMAL_PASSIVE state only.
if ( pocState == IfxEray_PocState_normalActive || pocState == IfxEray_PocState_normalPassive ) {
while ( !IfxEray_Eray_setPocAllSlots(&eray) );
}

Transactions

unsigned prevReceivedDataCounter = 0;
while( 1 ) {
if( receivedDataCounter != prevReceivedDataCounter ) {
prevReceivedDataCounter = receivedDataCounter;
//clib_ver_printf("Received %d packets", receivedDataCounter);
if( receivedDataCounter >= NUMBER_ERAY_COMM_CYCLES )
break;
}
};

Interrupt Service Handlers

The ISR has to be implemented in the application. Following templates can be used to react on the events:

void ERAY_irqInt0Handler()
{
//clib_ver_note(1); // for debugging in simulation: notify Int0
Ifx_ERAY_EIR ErrIntStat = IfxEray_Eray_getErrorInterrupts( &eray );
Ifx_ERAY_SIR StatusIntStat = IfxEray_Eray_getStatusInterrupts( &eray );
if(StatusIntStat.B.SDS)
{
// SDS must be cleared for getting the next interrupt
IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_sds );
}
if(StatusIntStat.B.CYCS)
{
// CYCS must be cleared for getting the next interrupt
IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_cycs );
}
if(StatusIntStat.B.SUCS)
{
// SUCS must be cleared for getting the next interrupt
IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_sucs );
}
if(StatusIntStat.B.TIBC)
{
// TIBC must be cleared for getting the next interrupt
IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_tibc );
}
if(ErrIntStat.B.MHF)
{
// clear flag MHF
IfxEray_Eray_clearErrorFlag( &eray, IfxEray_ClearErrorFlag_mhf );
}
}
void ERAY_irqInt1Handler()
{
//clib_ver_note(2); // for debugging in simulation: notify Int1
// TOBC must be cleared for getting the next interrupt
IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_tobc );
}
void ERAY_irqNdat0Handler()
{
//clib_ver_note(3); // for debugging in simulation: notify Ndat0
}
void ERAY_irqNdat1Handler()
{
//clib_ver_note(4); // for debugging in simulation: notify Ndat1
// message received in slot1 buffer?
if( IfxEray_Eray_getNewDataInterruptStatus(&eray, 1) == 1 )
{
// read data
uint32 data[2];
{
IfxEray_Eray_ReceiveControl config;
config.headerReceived = TRUE;
config.dataReceived = TRUE;
config.receiveRequested = TRUE;
config.swapRequested = TRUE;
config.bufferIndex = 1;
IfxEray_Eray_receiveFrame(&eray, &config);
IfxEray_Eray_readData(&eray, data, 2*2);
}
// display received data (Here received data has to be displayed)
//clib_ver_data(data[0]);
//clib_ver_data(data[1]);
// store received data
if( receivedDataCounter < NUMBER_ERAY_COMM_CYCLES ) {
receivedData[receivedDataCounter][0] = data[0];
receivedData[receivedDataCounter][1] = data[1];
}
++receivedDataCounter;
// put some new data into slot0
++data[0];
++data[1];
{
IfxEray_Eray_TransmitControl config;
config.headerTransfered = FALSE;
config.dataTransfered = TRUE;
config.transferRequested = TRUE;
config.bufferIndex = 0;
IfxEray_Eray_writeData(&eray, data, 2*2);
IfxEray_Eray_transmitFrame(&eray, &config);
}
}
}
void ERAY_irqMbsc0Handler()
{
//clib_ver_note(5); // for debugging in simulation: notify Mbsc0
}
void ERAY_irqMbsc1Handler()
{
//clib_ver_note(6); // for debugging in simulation: notify Mbsc1
}


iLLD_TC26B: ERAY

Modules
ERAY
iLLD » ERAY
Collaboration diagram for ERAY:

Modules

Data Structures
Module Initialisation Functions
Node Initialisation Functions
Operative Functions
Status Functions
Interrupt Functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » ERAY » ERAY
Collaboration diagram for Data Structures:

Data Structures

struct | IfxEray_Eray_Gtu01Config
GTU01 configuration. More...
struct | IfxEray_Eray_Gtu02Config
GTU02 configuration. More...
struct | IfxEray_Eray_Gtu03Config
GTU03 configuration. More...
struct | IfxEray_Eray_Gtu04Config
GTU04 configuration. More...
struct | IfxEray_Eray_Gtu05Config
GTU05 configuration. More...
struct | IfxEray_Eray_Gtu06Config
GTU06 configuration. More...
struct | IfxEray_Eray_Gtu07Config
GTU07 configuration. More...
struct | IfxEray_Eray_Gtu08Config
GTU08 configuration. More...
struct | IfxEray_Eray_Gtu09Config
GTU09 configuration. More...
struct | IfxEray_Eray_Gtu10Config
GTU10 configuration. More...
struct | IfxEray_Eray_Gtu11Config
GTU11 configuration. More...
struct | IfxEray_Eray_GTUConfig
Gloabl Timing Unit configuration structure. More...
struct | IfxEray_Eray_NodeA
Pins configuration structure for Node A. More...
struct | IfxEray_Eray_NodeB
Pins configuration structure for Node B. More...
struct | IfxEray_Eray_Prtc1Control
Protocol operation control properties. More...
struct | IfxEray_Eray_Prtc2Control
Wakeup symbol control properties. More...
struct | IfxEray_Eray_Succ1Config
communication controller control properties. More...
struct | IfxEray_Eray_Succ2Config
Communication listen timeout properties. More...
struct | IfxEray_Eray_Succ3Config
Clock correction fail properties. More...
struct | IfxEray_Eray_ControllerConfig
Communication Controller configuration structure. More...
struct | IfxEray_Eray_Interrupt
Interrupt control properties. More...
struct | IfxEray_Eray_MessageRAMConfig
Message RAM configuration structure. More...
struct | IfxEray_Eray
ERAY Module handle. More...
struct | IfxEray_Eray_BufferReconfig
Reconfigurable buffer structure. More...
struct | IfxEray_Eray_Config
Module configuration structure. More...
struct | IfxEray_Eray_NodeConfig
Node configuration structure. More...
struct | IfxEray_Eray_ReceiveControl
Receive control properties structure. More...
struct | IfxEray_Eray_ReceivedFrame
Received Frame. More...
struct | IfxEray_Eray_TransmitControl
Transfer control in a slot. More...

Detailed Description

Data Structure Documentation

◆ IfxEray_Eray_Gtu01Config

struct IfxEray_Eray_Gtu01Config

GTU01 configuration.

Definition at line 533 of file IfxEray_Eray.h.

Data Fields
uint32 microticksPerCycle Duration of the communication cycle in Microticks.

◆ IfxEray_Eray_Gtu02Config

struct IfxEray_Eray_Gtu02Config

GTU02 configuration.

Definition at line 540 of file IfxEray_Eray.h.

Data Fields
uint16 | macroticksPerCycle | Duration of the communication cycle in Macroticks.
uint8 | maxSyncFrames | Maximum number of sync frames in a cluster.

◆ IfxEray_Eray_Gtu03Config

struct IfxEray_Eray_Gtu03Config

GTU03 configuration.

Definition at line 548 of file IfxEray_Eray.h.

Data Fields
uint8 | channelAMacrotickInitialOffset | difference between two adjacent static slots on channel A in macroticks.
uint8 | channelAMicrotickInitialOffset | difference between adjacent time reference points on channel A in microticks.
uint8 | channelBMacrotickInitialOffset | difference between two adjacent static slots on channel B in macroticks.
uint8 | channelBMicrotickInitialOffset | difference between adjacent time reference points on channel B in microticks.

◆ IfxEray_Eray_Gtu04Config

struct IfxEray_Eray_Gtu04Config

GTU04 configuration.

Definition at line 558 of file IfxEray_Eray.h.

Data Fields
uint16 | correctionOffset | offset correction start point.
uint16 | networkStartIdleTime | starting point of Network Idle Time Phase.

◆ IfxEray_Eray_Gtu05Config

struct IfxEray_Eray_Gtu05Config

GTU05 configuration.

Definition at line 566 of file IfxEray_Eray.h.

Data Fields
uint8 | channelAReceptionDelay | reception delay on channel A.
uint8 | channelBReceptionDelay | reception delay on channel B.
uint8 | clusterDrift | cluster drift damping value used in clock synchronization.
uint8 | decodingCorrection | decoding correction to determine the primary time reference point.

◆ IfxEray_Eray_Gtu06Config

struct IfxEray_Eray_Gtu06Config

GTU06 configuration.

Definition at line 576 of file IfxEray_Eray.h.

Data Fields
uint16 | acceptedStartupDeviation | expanded range of measured deviation for startup Frames during integration.
uint16 | maxDriftOffset | maximum drift offset between two nodes.

◆ IfxEray_Eray_Gtu07Config

struct IfxEray_Eray_Gtu07Config

GTU07 configuration.

Definition at line 584 of file IfxEray_Eray.h.

Data Fields
uint16 | staticSlotLength | duration of static slot in macroticks.
uint16 | staticSlotsCount | number of static slots in a communication cycle.

◆ IfxEray_Eray_Gtu08Config

struct IfxEray_Eray_Gtu08Config

GTU08 configuration.

Definition at line 592 of file IfxEray_Eray.h.

Data Fields
uint16 | dynamicSlotCount | number of dynamic slots in a communication cycle.
uint8 | dynamicSlotLength | duration of dynamic slot in macroticks.

◆ IfxEray_Eray_Gtu09Config

struct IfxEray_Eray_Gtu09Config

GTU09 configuration.

Definition at line 600 of file IfxEray_Eray.h.

Data Fields
uint8 | dynamicActionPoint | dynamic slots action point.
IfxEray_IdleDynamicSlots | idleDynamicSlots | duration of dynamic slot idle phase.
uint8 | staticActionPoint | static slots and symbol window action point.

◆ IfxEray_Eray_Gtu10Config

struct IfxEray_Eray_Gtu10Config

GTU10 configuration.

Definition at line 609 of file IfxEray_Eray.h.

Data Fields
uint16 | maxOffsetCorrection | maximum offset correction to be applied by the internal clock synchronization algorithm.
uint16 | maxRateCorrection | maximum rate correction to be applied by the internal clock synchronization algorithm.

◆ IfxEray_Eray_Gtu11Config

struct IfxEray_Eray_Gtu11Config

GTU11 configuration.

Definition at line 617 of file IfxEray_Eray.h.

Data Fields
IfxEray_ExternalOffset | externalOffset | External offset correction control.
IfxEray_ExternalOffsetCorrection | externalOffsetCorrection | External clock offset correction value.
IfxEray_ExternalRate | externalRate | External rate correction control.
IfxEray_ExternalRateCorrection | externalRateCorrection | External clock rate correction value.

◆ IfxEray_Eray_GTUConfig

struct IfxEray_Eray_GTUConfig

Gloabl Timing Unit configuration structure.

Definition at line 631 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_GTUConfig:
[legend]
Data Fields
IfxEray_Eray_Gtu01Config | gtu01Config | GTU01 configuration.
IfxEray_Eray_Gtu02Config | gtu02Config | GTU02 configuration.
IfxEray_Eray_Gtu03Config | gtu03Config | GTU03 configuration.
IfxEray_Eray_Gtu04Config | gtu04Config | GTU04 configuration.
IfxEray_Eray_Gtu05Config | gtu05Config | GTU05 configuration.
IfxEray_Eray_Gtu06Config | gtu06Config | GTU06 configuration.
IfxEray_Eray_Gtu07Config | gtu07Config | GTU07 configuration.
IfxEray_Eray_Gtu08Config | gtu08Config | GTU08 configuration.
IfxEray_Eray_Gtu09Config | gtu09Config | GTU09 configuration.
IfxEray_Eray_Gtu10Config | gtu10Config | GTU10 configuration.
IfxEray_Eray_Gtu11Config | gtu11Config | GTU11 configuration.

◆ IfxEray_Eray_NodeA

struct IfxEray_Eray_NodeA

Pins configuration structure for Node A.

Definition at line 648 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_NodeA:
[legend]
Data Fields
IfxPort_PadDriver | pinDriver | the pad driver mode which should be configured.
IFX_CONST IfxEray_Rxd_In * | rxIn | the RX Pin which should be configured.
IfxPort_InputMode | rxInMode | the RX pin input mode which should be configured
IFX_CONST IfxEray_Txen_Out * | txEnOut | the TXEN Pin which should be configured.
IfxPort_OutputMode | txEnOutMode | the TXEN pin output mode which should be configured.
IFX_CONST IfxEray_Txd_Out * | txOut | the TX Pin which should be configured.
IfxPort_OutputMode | txOutMode | the TX pin output mode which should be configured.

◆ IfxEray_Eray_NodeB

struct IfxEray_Eray_NodeB

Pins configuration structure for Node B.

Definition at line 661 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_NodeB:
[legend]
Data Fields
IfxPort_PadDriver | pinDriver | the pad driver mode which should be configured.
IFX_CONST IfxEray_Rxd_In * | rxIn | the RX Pin which should be configured.
IfxPort_InputMode | rxInMode | the RX pin input mode which should be configured
IFX_CONST IfxEray_Txen_Out * | txEnOut | the TXEN Pin which should be configured.
IfxPort_OutputMode | txEnOutMode | the TXEN pin output mode which should be configured.
IFX_CONST IfxEray_Txd_Out * | txOut | the TX Pin which should be configured.
IfxPort_OutputMode | txOutMode | the TX pin output mode which should be configured.

◆ IfxEray_Eray_Prtc1Control

struct IfxEray_Eray_Prtc1Control

Protocol operation control properties.

Definition at line 674 of file IfxEray_Eray.h.

Data Fields
IfxEray_Baudrate | baudrate | baud rate on the flexray bus.
uint8 | collisionAvoidanceDuration | accepted duration of collision avoidance symbol.
uint8 | receiveWakeupTestDuration | duration of received wakeup pattern in bit times.
IfxEray_StrobePosition | strobePosition | sample count value for strobing.
uint16 | transmissionStartTime | duration of transmission start time.
uint8 | transmitWakeupRepetitions | duration of transmitted wakeup pattern in bit times.

◆ IfxEray_Eray_Prtc2Control

struct IfxEray_Eray_Prtc2Control

Wakeup symbol control properties.

Definition at line 686 of file IfxEray_Eray.h.

Data Fields
uint8 | receiveWakeupIdleTime | duration of received wakeup symbol idle phase.
uint8 | receiveWakeupLowTime | duration of received wakeup symbol low phase.
uint8 | transmitWakeupIdleTime | duration of transmit wakeup symbol idle phase.
uint8 | transmitWakeupLowTime | duration of transmit wakeup symbol low phase.

◆ IfxEray_Eray_Succ1Config

struct IfxEray_Eray_Succ1Config

communication controller control properties.

Definition at line 696 of file IfxEray_Eray.h.

Data Fields
boolean | channelAConnectedNode | whether the node is connected to channel A.
boolean | channelASymbolTransmitted | selects channel A for MTS symbol transmission.
boolean | channelBConnectedNode | whether the node is connected to channel B.
boolean | channelBSymbolTransmitted | selects channel B for MTS symbol transmission
boolean | clockSyncErrorHalt | transition to HALT state due to a clock synchronization error.
uint8 | maxColdStartAttempts | maximum number of attempts that a cold starting node is permitted.
uint8 | numberOfCyclePairsForActive | number of even / odd cycle pairs that must have valid clock correction terms.
boolean | startupFrameTransmitted | whether the key slot is used to transmit startup Frames.
boolean | syncFrameTransmitted | whether the key slot is used to transmit SYNC Frames.
IfxEray_TransmissionSlotMode | transmissionSlotMode | Initial transmission mode.
IfxEray_WakeupChannel | wakeupPatternChannel | Wakeup pattern carry channel.

◆ IfxEray_Eray_Succ2Config

struct IfxEray_Eray_Succ2Config

Communication listen timeout properties.

Definition at line 713 of file IfxEray_Eray.h.

Data Fields
uint32 | listenTimeOut | wakeup or startup listen timeout in microticks.
IfxEray_ListenTimeOutNoise | listenTimeOutNoise | upper limit for startup and wakeup listen timeout in the presence of noise.

◆ IfxEray_Eray_Succ3Config

struct IfxEray_Eray_Succ3Config

Clock correction fail properties.

Definition at line 721 of file IfxEray_Eray.h.

Data Fields
uint8 | clockCorrectionCyclesHalt | maximum number of cycles missing clock correctionlead to active or passive to halt.
uint8 | clockCorrectionCyclesPassive | maximum number of cycles missing clock correction lead active to passive state.

◆ IfxEray_Eray_ControllerConfig

struct IfxEray_Eray_ControllerConfig

Communication Controller configuration structure.

Definition at line 733 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_ControllerConfig:
[legend]
Data Fields
IfxEray_Eray_GTUConfig | gtuConfig | gloabl timing unit configuration structure.
uint8 | latestTransmissionStart | number of dynamic slots before inhibit frame transmission in dynamic segment.
uint32 | networkVectorLength | length of network management vector.
IfxEray_Eray_Prtc1Control | prtc1Control | protocol operation control properties.
IfxEray_Eray_Prtc2Control | prtc2Control | wakeup symbol control properties.
uint8 | staticFramepayload | payload length of static frame in double bytes.
IfxEray_Eray_Succ1Config | succ1Config | communication controller control properties.
IfxEray_Eray_Succ2Config | succ2Config | communication listen timeout properties.
IfxEray_Eray_Succ3Config | succ3Config | clock correction fail properties.

◆ IfxEray_Eray_Interrupt

struct IfxEray_Eray_Interrupt

Interrupt control properties.

Definition at line 748 of file IfxEray_Eray.h.

Data Fields
IfxSrc_Tos | ibusyIsrProvider | the input buffer interrupt service provider. CPU or DMA.
uint16 | ibusyPriority | the inputput buffer interrupt priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | int0IsrProvider | the interrupt line 0 service provider. CPU or DMA.
uint16 | int0Priority | the interrupt line 0 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | int1IsrProvider | the interrupt line 1 service provider. CPU or DMA.
uint16 | int1Priority | the interrupt line 1 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | mbsc0IsrProvider | the message buffer status changed interrupt 0 service provider. CPU or DMA.
uint16 | mbsc0Priority | the message buffer status changed interrupt 0 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | mbsc1IsrProvider | the message buffer status changed interrupt 1 service provider. CPU or DMA.
uint16 | mbsc1Priority | the message buffer status changed interrupt 1 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | ndat0IsrProvider | the new data interrupt 0 service provider. CPU or DMA.
uint16 | ndat0Priority | the new data interrupt 0 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | ndat1IsrProvider | the new data interrupt 1 service provider. CPU or DMA.
uint16 | ndat1Priority | the new data interrupt 1 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | obusyIsrProvider | the output buffer interrupt service provider. CPU or DMA.
uint16 | obusyPriority | the output buffer interrupt priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | tint0IsrProvider | the timer interrupt line 0 service provider. CPU or DMA.
uint16 | tint0Priority | the timer interrupt 0 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | tint1IsrProvider | the timer interrupt line 1 service provider. CPU or DMA.
uint16 | tint1Priority | the timer interrupt 1 priority. Always 1 since all interrupts are handled at a time.

◆ IfxEray_Eray_MessageRAMConfig

struct IfxEray_Eray_MessageRAMConfig

Message RAM configuration structure.

Definition at line 774 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_MessageRAMConfig:
[legend]
Data Fields
boolean | bufferReconfigEnabled | whether reconfiguration of message buffers is enabled or not.
uint32 * | data[128] | data section of message buffer.
uint32 | fifoBufferStartIndex | message buffers assigned FIFO.
boolean | fifoConfigured | Whether receive FIFO configured or not.
uint8 | fifoDepth | fifo critical level.
boolean | fifoNullFramesRejected | whether null frames stored in fifo or not.
uint8 | filteredCycleNumber | the cycle set to which Frame ID and channel rejection filter are applied.
uint8 | firstDynamicBuffer | first dynamic buffer index.
uint16 | frameIdFilter | Frame ID used for rejection filtering.
IfxEray_Header * | header[128] | Header section of message buffer.
uint8 | numberOfMessageBuffers | last configured buffer.
IfxEray_ReceiveChannel | receiveChannel | FIFO receive channel.
uint16 | rejectedFrameId | frame ID to be rejected by the FIFO.
IfxEray_SlotConfig * | slotControl[128] | Transmit control properties.
boolean | staticFifoDisabled | fifo is not used in static segment.

◆ IfxEray_Eray

struct IfxEray_Eray

ERAY Module handle.

Definition at line 811 of file IfxEray_Eray.h.

Data Fields
Ifx_ERAY * eray pointer to ERAY module registers.

◆ IfxEray_Eray_BufferReconfig

struct IfxEray_Eray_BufferReconfig

Reconfigurable buffer structure.

Definition at line 818 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_BufferReconfig:
[legend]
Data Fields
uint32 | data[64] | data section of a reconfigurable buffer.
IfxEray_Header * | header | header of a reconfigurable buffer.
IfxEray_SlotConfig * | slotControl | message buffer configuration in message RAM.

◆ IfxEray_Eray_Config

struct IfxEray_Eray_Config

Module configuration structure.

Definition at line 827 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_Config:
[legend]
Data Fields
IfxEray_Eray_Interrupt | interrupt | Interrupt control properties.
Ifx_ERAY * | module | pointer to ERAY module registers.

◆ IfxEray_Eray_NodeConfig

struct IfxEray_Eray_NodeConfig

Node configuration structure.

Definition at line 835 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_NodeConfig:
[legend]
Data Fields
IfxEray_Eray_ControllerConfig | controllerConfig | Communication Controller configuration structure.
IfxEray_Eray_MessageRAMConfig | messageRAMConfig | Message RAM configuration structure.
IFX_CONST IfxEray_Eray_Pins * | pins | Pins configuration structure.

◆ IfxEray_Eray_ReceiveControl

struct IfxEray_Eray_ReceiveControl

Receive control properties structure.

Definition at line 844 of file IfxEray_Eray.h.

Data Fields
uint8 | bufferIndex | buffer index in the Message RAM.
boolean | dataReceived | whether data selected for transfer from Message RAM to Output Buffer or not.
boolean | headerReceived | whether header selected for transfer from Message RAM to Output Buffer or not.
boolean | receiveRequested |
boolean | swapRequested | whether output buffer shadow and output buffer host are swapped or not.

◆ IfxEray_Eray_ReceivedFrame

struct IfxEray_Eray_ReceivedFrame

Received Frame.

Definition at line 855 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_ReceivedFrame:
[legend]
Data Fields
uint32 | data[64] | received data in a frame.
IfxEray_ReceivedHeader | header | received header in a frame.

◆ IfxEray_Eray_TransmitControl

struct IfxEray_Eray_TransmitControl

Transfer control in a slot.

Definition at line 863 of file IfxEray_Eray.h.

Data Fields
uint8 | bufferIndex | buffer index which gives slot for transfers.
boolean | dataTransfered | whether data section of message buffer is transfered or not.
boolean | headerTransfered | whether header section of frame is transfered or not.
boolean | transferRequested | whether frame in a slot is transfered or not.


iLLD_TC26B: Module Initialisation Functions

Functions
Module Initialisation Functions
iLLD » ERAY » ERAY
Collaboration diagram for Module Initialisation Functions:

Functions

IFX_INLINE void | IfxEray_Eray_deInitModule (IfxEray_Eray *eray)
De-initialises the ERAY module. More...
IFX_EXTERN void | IfxEray_Eray_initModule (IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
Initialises the ERAY module with supplied configuration. More...
IFX_EXTERN void | IfxEray_Eray_initModuleConfig (IfxEray_Eray_Config *config, Ifx_ERAY *eray)
Inialises the default module configuration buffer. More...

Detailed Description

Function Documentation

◆ IfxEray_Eray_deInitModule()

IFX_INLINE void IfxEray_Eray_deInitModule ( IfxEray_Eray * eray )

De-initialises the ERAY module.

Parameters
eray pointer to module handle.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1209 of file IfxEray_Eray.h.

◆ IfxEray_Eray_initModule()

IFX_EXTERN void IfxEray_Eray_initModule | ( | IfxEray_Eray * | eray,
 |  | const IfxEray_Eray_Config * | config
 | ) |  |

Initialises the ERAY module with supplied configuration.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to module configuration structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

NOTE: If not DMA, the interrupt service provider is assigned to the CPU ID where this function is called from

Definition at line 402 of file IfxEray_Eray.c.

◆ IfxEray_Eray_initModuleConfig()

IFX_EXTERN void IfxEray_Eray_initModuleConfig | ( | IfxEray_Eray_Config * | config,
 |  | Ifx_ERAY * | eray
 | ) |  |

Inialises the default module configuration buffer.

Parameters
config | pointer to module configuration structure.
eray | pointer ERAY module registers.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 504 of file IfxEray_Eray.c.


iLLD_TC26B: Node Initialisation Functions

Data Structures | Functions
Node Initialisation Functions
iLLD » ERAY » ERAY
Collaboration diagram for Node Initialisation Functions:

Data Structures

struct IfxEray_Eray_Pins
Pins configuration structure. More...

Functions

IFX_STATIC void | IfxEray_Eray_Node_initCommunicationController (IfxEray_Eray *eray, const IfxEray_Eray_ControllerConfig *config)
Inialises the communication controller. More...
IFX_STATIC void | IfxEray_Eray_Node_initGTU (IfxEray_Eray *eray, const IfxEray_Eray_GTUConfig *config)
Initialises the Global Timing Unit. More...
IFX_STATIC void | IfxEray_Eray_Node_initMessageRAM (IfxEray_Eray *eray, const IfxEray_Eray_MessageRAMConfig *config)
Inialises the message RAM. More...
IFX_EXTERN void | IfxEray_Eray_Node_init (IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
Initialises the Node with supplied configuration. More...
IFX_EXTERN void | IfxEray_Eray_Node_initConfig (IfxEray_Eray_NodeConfig *config)
Initialises the default node configuration buffer. More...

Detailed Description

Data Structure Documentation

◆ IfxEray_Eray_Pins

struct IfxEray_Eray_Pins

Pins configuration structure.

Definition at line 799 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_Pins:
[legend]
Data Fields
IFX_CONST IfxEray_Eray_NodeA * | nodeAPins | Pins configuration structure for Node A.
IFX_CONST IfxEray_Eray_NodeB * | nodeBPins | Pins configuration structure for Node B.

Function Documentation

◆ IfxEray_Eray_Node_init()

IFX_EXTERN void IfxEray_Eray_Node_init | ( | IfxEray_Eray * | eray,
 |  | const IfxEray_Eray_NodeConfig * | config
 | ) |  |

Initialises the Node with supplied configuration.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to node configuration structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 83 of file IfxEray_Eray.c.

◆ IfxEray_Eray_Node_initCommunicationController()

IFX_STATIC void IfxEray_Eray_Node_initCommunicationController | ( | IfxEray_Eray * | eray,
 |  | const IfxEray_Eray_ControllerConfig * | config
 | ) |  |

Inialises the communication controller.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to communication controller config structure.
Returns
None

Definition at line 170 of file IfxEray_Eray.c.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_Eray_Node_initConfig()

IFX_EXTERN void IfxEray_Eray_Node_initConfig ( IfxEray_Eray_NodeConfig * config )

Initialises the default node configuration buffer.

Parameters
config pointer to node configuration structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 203 of file IfxEray_Eray.c.

◆ IfxEray_Eray_Node_initGTU()

IFX_STATIC void IfxEray_Eray_Node_initGTU | ( | IfxEray_Eray * | eray,
 |  | const IfxEray_Eray_GTUConfig * | config
 | ) |  |

Initialises the Global Timing Unit.

Parameters
eray | pointer to ERAY Module handle.
config | global timing unit Configuration structure.
Returns
None

Definition at line 335 of file IfxEray_Eray.c.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_Eray_Node_initMessageRAM()

IFX_STATIC void IfxEray_Eray_Node_initMessageRAM | ( | IfxEray_Eray * | eray,
 |  | const IfxEray_Eray_MessageRAMConfig * | config
 | ) |  |

Inialises the message RAM.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to message RAM config structure.
Returns
None

Definition at line 359 of file IfxEray_Eray.c.

Referenced by IfxEray_Eray_Node_init().


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » ERAY » ERAY
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE boolean | IfxEray_Eray_allowColdStart (IfxEray_Eray *eray)
Allows node to enter the cold startup state. More...
IFX_INLINE void | IfxEray_Eray_bufferReconfig (IfxEray_Eray *eray, IfxEray_Eray_BufferReconfig *reconfigBuffer)
Reconfiguring the buffer or changing the slot. More...
IFX_INLINE boolean | IfxEray_Eray_changePocState (IfxEray_Eray *eray, IfxEray_PocCommand PocCommand)
Changes the POC state and return status. More...
IFX_INLINE void | IfxEray_Eray_readData (IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers. More...
IFX_INLINE void | IfxEray_Eray_readFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceivedFrame *frame, Ifx_SizeT maxPayloadLength)
reads the frame received in a buffer. More...
IFX_INLINE boolean | IfxEray_Eray_setPocAllSlots (IfxEray_Eray *eray)
Sets the Controller state to ALL Slots mode. More...
IFX_INLINE boolean | IfxEray_Eray_startCommunication (IfxEray_Eray *eray)
Runs the communication controller. More...
IFX_INLINE void | IfxEray_Eray_wakeUpChannel (IfxEray_Eray *eray, IfxEray_Channel channel)
Wakeups the channel in a cluster. More...
IFX_INLINE boolean | IfxEray_Eray_wakeUpCluster (IfxEray_Eray *eray)
Wakeups the node in a cluster. More...
IFX_INLINE void | IfxEray_Eray_writeData (IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers. More...
IFX_EXTERN void | IfxEray_Eray_receiveFifoFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers frame from fifo in message RAM to Output buffer. More...
IFX_EXTERN void | IfxEray_Eray_receiveFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers header and data from message buffer to output buffer. More...
IFX_EXTERN void | IfxEray_Eray_transmitFrame (IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
Transfers the frame in given slot. More...

Detailed Description

Function Documentation

◆ IfxEray_Eray_allowColdStart()

IFX_INLINE boolean IfxEray_Eray_allowColdStart ( IfxEray_Eray * eray )

Allows node to enter the cold startup state.

Parameters
eray pointer to ERAY Module handle.
Returns
TRUE if cold start successful otherwise FALSE.

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1178 of file IfxEray_Eray.h.

◆ IfxEray_Eray_bufferReconfig()

IFX_INLINE void IfxEray_Eray_bufferReconfig | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Eray_BufferReconfig * | reconfigBuffer
 | ) |  |

Reconfiguring the buffer or changing the slot.

Parameters
eray | pointer to module handle.
reconfigBuffer | pointer reconfigurable buffer structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1184 of file IfxEray_Eray.h.

◆ IfxEray_Eray_changePocState()

IFX_INLINE boolean IfxEray_Eray_changePocState | ( | IfxEray_Eray * | eray,
 |  | IfxEray_PocCommand | PocCommand
 | ) |  |

Changes the POC state and return status.

Parameters
eray | pointer to module handle.
PocCommand | POC command to change state.
Returns
TRUE if command accepted.

Definition at line 1190 of file IfxEray_Eray.h.

◆ IfxEray_Eray_readData()

IFX_INLINE void IfxEray_Eray_readData | ( | IfxEray_Eray * | eray,
 |  | uint32 * | data,
 |  | uint8 | payloadLength
 | ) |  |

Reads the received data from output registers.

Parameters
eray | pointer to module handle.
data | pointer to received data buffer.
payloadLength | payload length received in a frame.
Returns
None

Definition at line 1260 of file IfxEray_Eray.h.

◆ IfxEray_Eray_readFrame()

IFX_INLINE void IfxEray_Eray_readFrame | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Eray_ReceivedFrame * | frame,
 |  | Ifx_SizeT | maxPayloadLength
 | ) |  |

reads the frame received in a buffer.

Parameters
eray | pointer to module handle.
frame | received frame in a buffer.
maxPayloadLength | maximum payload length received in a frame.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1266 of file IfxEray_Eray.h.

◆ IfxEray_Eray_receiveFifoFrame()

IFX_EXTERN void IfxEray_Eray_receiveFifoFrame | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Eray_ReceiveControl * | config
 | ) |  |

Transfers frame from fifo in message RAM to Output buffer.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to receive control structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 531 of file IfxEray_Eray.c.

◆ IfxEray_Eray_receiveFrame()

IFX_EXTERN void IfxEray_Eray_receiveFrame | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Eray_ReceiveControl * | config
 | ) |  |

Transfers header and data from message buffer to output buffer.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to receive control structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 567 of file IfxEray_Eray.c.

◆ IfxEray_Eray_setPocAllSlots()

IFX_INLINE boolean IfxEray_Eray_setPocAllSlots ( IfxEray_Eray * eray )

Sets the Controller state to ALL Slots mode.

Parameters
eray pointer to module handle.
Returns
TRUE if All slots mode is successful otherwise FALSE.

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1284 of file IfxEray_Eray.h.

◆ IfxEray_Eray_startCommunication()

IFX_INLINE boolean IfxEray_Eray_startCommunication ( IfxEray_Eray * eray )

Runs the communication controller.

Parameters
eray pointer to ERAY Module handle.
Returns
TRUE if communication started otherwise FALSE.

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1290 of file IfxEray_Eray.h.

◆ IfxEray_Eray_transmitFrame()

IFX_EXTERN void IfxEray_Eray_transmitFrame | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Eray_TransmitControl * | transmitControl
 | ) |  |

Transfers the frame in given slot.

Parameters
eray | pointer to module handle.
transmitControl | transmits frame in a given slot.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 589 of file IfxEray_Eray.c.

◆ IfxEray_Eray_wakeUpChannel()

IFX_INLINE void IfxEray_Eray_wakeUpChannel | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Channel | channel
 | ) |  |

Wakeups the channel in a cluster.

Parameters
eray | pointer to ERAY Module handle.
channel | wakeup channel Id.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1296 of file IfxEray_Eray.h.

◆ IfxEray_Eray_wakeUpCluster()

IFX_INLINE boolean IfxEray_Eray_wakeUpCluster ( IfxEray_Eray * eray )

Wakeups the node in a cluster.

Parameters
eray pointer to ERAY Module handle.
Returns
TRUE if cluster is wakeup otherwise FALSE.

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1309 of file IfxEray_Eray.h.

◆ IfxEray_Eray_writeData()

IFX_INLINE void IfxEray_Eray_writeData | ( | IfxEray_Eray * | eray,
 |  | uint32 * | data,
 |  | uint8 | payloadLength
 | ) |  |

Writes data section of a frame to input data registers.

Parameters
eray | pointer to module handle.
data | data section in frame.
payloadLength | payload length configured for slot buffer.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1315 of file IfxEray_Eray.h.


iLLD_TC26B: Status Functions

Functions
Status Functions
iLLD » ERAY » ERAY
Collaboration diagram for Status Functions:

Functions

IFX_INLINE IfxEray_PocState | IfxEray_Eray_getPocState (IfxEray_Eray *eray)
Gets the current node controller POC state. More...
IFX_INLINE IfxEray_WakeupChannel | IfxEray_Eray_getWakeupPatternReceivedChannel (IfxEray_Eray *eray)
Gets the received wakeup pattern channel. More...

Detailed Description

Function Documentation

◆ IfxEray_Eray_getPocState()

IFX_INLINE IfxEray_PocState IfxEray_Eray_getPocState ( IfxEray_Eray * eray )

Gets the current node controller POC state.

Parameters
eray pointer to module handle.
Returns
current POC state.

Definition at line 1238 of file IfxEray_Eray.h.

◆ IfxEray_Eray_getWakeupPatternReceivedChannel()

IFX_INLINE IfxEray_WakeupChannel IfxEray_Eray_getWakeupPatternReceivedChannel ( IfxEray_Eray * eray )

Gets the received wakeup pattern channel.

Parameters
eray pointer to module handle.
Returns
received wakeup pattern channel.

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1251 of file IfxEray_Eray.h.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » ERAY » ERAY
Collaboration diagram for Interrupt Functions:

Functions

IFX_INLINE void | IfxEray_Eray_clearErrorFlag (IfxEray_Eray *eray, IfxEray_ClearErrorFlag errorFlag)
clears the error interrupt flag requested. More...
IFX_INLINE void | IfxEray_Eray_clearStatusFlag (IfxEray_Eray *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status interrupt flag requested. More...
IFX_INLINE Ifx_ERAY_EIR | IfxEray_Eray_getErrorInterrupts (IfxEray_Eray *eray)
Gets the error interrupt status. More...
IFX_INLINE uint8 | IfxEray_Eray_getMessageBufferInterruptStatus (IfxEray_Eray *eray, uint8 messageBuffer)
Gets the message buffer interrupt status. More...
IFX_INLINE uint8 | IfxEray_Eray_getNewDataInterruptStatus (IfxEray_Eray *eray, uint8 ndat)
Gets the new data interrupt buffers status. More...
IFX_INLINE Ifx_ERAY_SIR | IfxEray_Eray_getStatusInterrupts (IfxEray_Eray *eray)
Gets the node status interrupts. More...
IFX_INLINE void | IfxEray_Eray_setMessageBufferInterruptDestination (IfxEray_Eray *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Enables the message buffer interrupt line. More...
IFX_INLINE void | IfxEray_Eray_setNewDataInterruptDestination (IfxEray_Eray *eray, uint8 ndat, uint8 ndatDestination)
Enables the NDAT buffer interrupt line. More...

Detailed Description

Function Documentation

◆ IfxEray_Eray_clearErrorFlag()

IFX_INLINE void IfxEray_Eray_clearErrorFlag | ( | IfxEray_Eray * | eray,
 |  | IfxEray_ClearErrorFlag | errorFlag
 | ) |  |

clears the error interrupt flag requested.

Parameters
eray | pointer to module handle.
errorFlag | error flag to be cleared.
Returns
None

Definition at line 1197 of file IfxEray_Eray.h.

◆ IfxEray_Eray_clearStatusFlag()

IFX_INLINE void IfxEray_Eray_clearStatusFlag | ( | IfxEray_Eray * | eray,
 |  | IfxEray_ClearStatusFlag | statusFlag
 | ) |  |

Clears the status interrupt flag requested.

Parameters
eray | pointer to module handle.
statusFlag | status flag to be cleared.
Returns
None

Definition at line 1203 of file IfxEray_Eray.h.

◆ IfxEray_Eray_getErrorInterrupts()

IFX_INLINE Ifx_ERAY_EIR IfxEray_Eray_getErrorInterrupts ( IfxEray_Eray * eray )

Gets the error interrupt status.

Parameters
eray pointer to module handle.
Returns
error interrupt status.

Definition at line 1216 of file IfxEray_Eray.h.

◆ IfxEray_Eray_getMessageBufferInterruptStatus()

IFX_INLINE uint8 IfxEray_Eray_getMessageBufferInterruptStatus | ( | IfxEray_Eray * | eray,
 |  | uint8 | messageBuffer
 | ) |  |

Gets the message buffer interrupt status.

Parameters
eray | pointer to module handle.
messageBuffer | message buffer to which interrupt status be checked.
Returns
message buffer interrupt status.

Definition at line 1224 of file IfxEray_Eray.h.

◆ IfxEray_Eray_getNewDataInterruptStatus()

IFX_INLINE uint8 IfxEray_Eray_getNewDataInterruptStatus | ( | IfxEray_Eray * | eray,
 |  | uint8 | ndat
 | ) |  |

Gets the new data interrupt buffers status.

Parameters
eray | pointer to module handle.
ndat | ndat buffer to which interrupt status be checked.
Returns
ndat buffer interrupt status.

Definition at line 1231 of file IfxEray_Eray.h.

◆ IfxEray_Eray_getStatusInterrupts()

IFX_INLINE Ifx_ERAY_SIR IfxEray_Eray_getStatusInterrupts ( IfxEray_Eray * eray )

Gets the node status interrupts.

Parameters
eray pointer to module handle.
Returns
node status interrupts.

Definition at line 1244 of file IfxEray_Eray.h.

◆ IfxEray_Eray_setMessageBufferInterruptDestination()

IFX_INLINE void IfxEray_Eray_setMessageBufferInterruptDestination | ( | IfxEray_Eray * | eray,
 |  | uint8 | messageBuffer,
 |  | uint8 | messageBufferDestination
 | ) |  |

Enables the message buffer interrupt line.

Parameters
eray | pointer to module handle.
messageBuffer | message buffer interrupt which should be configured
messageBufferDestination | selects MBSC0 or MBSC1 interrupt output
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1272 of file IfxEray_Eray.h.

◆ IfxEray_Eray_setNewDataInterruptDestination()

IFX_INLINE void IfxEray_Eray_setNewDataInterruptDestination | ( | IfxEray_Eray * | eray,
 |  | uint8 | ndat,
 |  | uint8 | ndatDestination
 | ) |  |

Enables the NDAT buffer interrupt line.

Parameters
eray | pointer to module handle.
ndat | message buffer number configured to which ndat interrupt line to be set.
ndatDestination | selects NDAT0 or NDAT1 interrupt output
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1278 of file IfxEray_Eray.h.


iLLD_TC26B: IfxEray_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxEray_cfg.h File Reference
iLLD » ERAY

ERAY on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxEray_reg.h"
Include dependency graph for IfxEray_cfg.h:

Go to the source code of this file.

Macros

#define | IFXERAY_NUM_MODULES (1)
#define | IFXERAY_NUM_SLOTS (128)
#define | IFXERAY_NUM_CHANNELS (2)

Enumerations

enum IfxEray_Index {
IfxEray_Index_none = -1,
IfxEray_Index_0 = 0
}
List of the available Eray resources. More...
enum IfxEray_NodeId {
IfxEray_NodeId_a = 0,
IfxEray_NodeId_b = 1,
IfxEray_NodeId_none = -1
}
Node Id in communication cycle. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap [IFXERAY_NUM_MODULES]

Detailed Description

ERAY on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEray_cfg.h.

Macro Definition Documentation

◆ IFXERAY_NUM_CHANNELS

#define IFXERAY_NUM_CHANNELS (2)

Definition at line 69 of file IfxEray_cfg.h.

◆ IFXERAY_NUM_MODULES

#define IFXERAY_NUM_MODULES (1)

Definition at line 65 of file IfxEray_cfg.h.

Referenced by IfxEray_getAddress(), and IfxEray_getIndex().

◆ IFXERAY_NUM_SLOTS

#define IFXERAY_NUM_SLOTS (128)

Definition at line 67 of file IfxEray_cfg.h.


iLLD_TC26B: IfxEray_PinMap.c File Reference

  • _PinMap
Variables
IfxEray_PinMap.c File Reference
iLLD » ERAY

ERAY I/O map. More...

#include "IfxEray_PinMap.h"
Include dependency graph for IfxEray_PinMap.c:

Go to the source code of this file.

Variables

IfxEray_Rxd_In | IfxEray0_RXDA0_P14_8_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 8}, Ifx_RxSel_a}
IfxEray_Rxd_In | IfxEray0_RXDA1_P11_9_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 9}, Ifx_RxSel_b}
IfxEray_Rxd_In | IfxEray0_RXDA2_P02_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 1}, Ifx_RxSel_c}
IfxEray_Rxd_In | IfxEray0_RXDA3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 1}, Ifx_RxSel_d}
IfxEray_Rxd_In | IfxEray0_RXDB0_P14_7_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 7}, Ifx_RxSel_a}
IfxEray_Rxd_In | IfxEray0_RXDB1_P11_10_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,10}, Ifx_RxSel_b}
IfxEray_Rxd_In | IfxEray0_RXDB2_P02_3_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 3}, Ifx_RxSel_c}
IfxEray_Rxd_In | IfxEray0_RXDB3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 1}, Ifx_RxSel_d}
IfxEray_Txd_Out | IfxEray0_TXDA_P02_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt6}
IfxEray_Txd_Out | IfxEray0_TXDA_P11_3_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt4}
IfxEray_Txd_Out | IfxEray0_TXDA_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt3}
IfxEray_Txd_Out | IfxEray0_TXDA_P14_10_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14,10}, IfxPort_OutputIdx_alt6}
IfxEray_Txd_Out | IfxEray0_TXDB_P02_2_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt6}
IfxEray_Txd_Out | IfxEray0_TXDB_P11_12_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,12}, IfxPort_OutputIdx_alt4}
IfxEray_Txd_Out | IfxEray0_TXDB_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt4}
IfxEray_Txd_Out | IfxEray0_TXDB_P14_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray0_TXENA_P02_4_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray0_TXENA_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt4}
IfxEray_Txen_Out | IfxEray0_TXENA_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray0_TXENB_P02_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray0_TXENB_P11_11_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,11}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray0_TXENB_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt2}
IfxEray_Txen_Out | IfxEray0_TXENB_P14_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray0_TXENB_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt5}
const IfxEray_Rxd_In * | IfxEray_Rxd_In_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
const IfxEray_Txd_Out * | IfxEray_Txd_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
const IfxEray_Txen_Out * | IfxEray_Txen_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]

Detailed Description

ERAY I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEray_PinMap.c.

Variable Documentation

◆ IfxEray0_RXDA0_P14_8_IN

IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 8}, Ifx_RxSel_a}

Definition at line 45 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDA1_P11_9_IN

IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 9}, Ifx_RxSel_b}

Definition at line 46 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDA2_P02_1_IN

IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 1}, Ifx_RxSel_c}

Definition at line 47 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDA3_P14_1_IN

IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 1}, Ifx_RxSel_d}

Definition at line 48 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDB0_P14_7_IN

IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 7}, Ifx_RxSel_a}

Definition at line 49 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDB1_P11_10_IN

IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,10}, Ifx_RxSel_b}

Definition at line 50 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDB2_P02_3_IN

IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 3}, Ifx_RxSel_c}

Definition at line 51 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDB3_P14_1_IN

IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 1}, Ifx_RxSel_d}

Definition at line 52 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDA_P02_0_OUT

IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt6}

Definition at line 53 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDA_P11_3_OUT

IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt4}

Definition at line 54 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDA_P14_0_OUT

IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt3}

Definition at line 55 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDA_P14_10_OUT

IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14,10}, IfxPort_OutputIdx_alt6}

Definition at line 56 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDB_P02_2_OUT

IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt6}

Definition at line 57 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDB_P11_12_OUT

IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,12}, IfxPort_OutputIdx_alt4}

Definition at line 58 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDB_P14_0_OUT

IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt4}

Definition at line 59 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDB_P14_5_OUT

IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt6}

Definition at line 60 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENA_P02_4_OUT

IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt6}

Definition at line 61 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENA_P11_6_OUT

IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt4}

Definition at line 62 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENA_P14_9_OUT

IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt6}

Definition at line 63 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENB_P02_5_OUT

IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt6}

Definition at line 64 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENB_P11_11_OUT

IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,11}, IfxPort_OutputIdx_alt6}

Definition at line 65 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENB_P11_6_OUT

IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt2}

Definition at line 66 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENB_P14_6_OUT

IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt6}

Definition at line 67 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENB_P14_9_OUT

IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt5}

Definition at line 68 of file IfxEray_PinMap.c.

◆ IfxEray_Rxd_In_pinTable

const IfxEray_Rxd_In* IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
Initial value:
= {
{
{
&IfxEray0_RXDA0_P14_8_IN,
&IfxEray0_RXDA1_P11_9_IN,
&IfxEray0_RXDA2_P02_1_IN,
&IfxEray0_RXDA3_P14_1_IN
},
{
&IfxEray0_RXDB0_P14_7_IN,
&IfxEray0_RXDB1_P11_10_IN,
&IfxEray0_RXDB2_P02_3_IN,
&IfxEray0_RXDB3_P14_1_IN
}
}
}
IfxEray0_RXDB2_P02_3_IN
IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN
Definition: IfxEray_PinMap.c:51
IfxEray0_RXDB3_P14_1_IN
IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN
Definition: IfxEray_PinMap.c:52
IfxEray0_RXDB1_P11_10_IN
IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN
Definition: IfxEray_PinMap.c:50
IfxEray0_RXDA0_P14_8_IN
IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN
Definition: IfxEray_PinMap.c:45
IfxEray0_RXDA1_P11_9_IN
IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN
Definition: IfxEray_PinMap.c:46
IfxEray0_RXDA2_P02_1_IN
IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN
Definition: IfxEray_PinMap.c:47
IfxEray0_RXDA3_P14_1_IN
IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN
Definition: IfxEray_PinMap.c:48
IfxEray0_RXDB0_P14_7_IN
IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN
Definition: IfxEray_PinMap.c:49

Definition at line 71 of file IfxEray_PinMap.c.

◆ IfxEray_Txd_Out_pinTable

const IfxEray_Txd_Out* IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
Initial value:
= {
{
{
&IfxEray0_TXDA_P02_0_OUT,
&IfxEray0_TXDA_P11_3_OUT,
&IfxEray0_TXDA_P14_0_OUT,
&IfxEray0_TXDA_P14_10_OUT
},
{
&IfxEray0_TXDB_P02_2_OUT,
&IfxEray0_TXDB_P11_12_OUT,
&IfxEray0_TXDB_P14_0_OUT,
&IfxEray0_TXDB_P14_5_OUT
}
}
}
IfxEray0_TXDA_P11_3_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT
Definition: IfxEray_PinMap.c:54
IfxEray0_TXDA_P02_0_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT
Definition: IfxEray_PinMap.c:53
IfxEray0_TXDB_P02_2_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT
Definition: IfxEray_PinMap.c:57
IfxEray0_TXDA_P14_10_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT
Definition: IfxEray_PinMap.c:56
IfxEray0_TXDB_P14_0_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT
Definition: IfxEray_PinMap.c:59
IfxEray0_TXDB_P11_12_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT
Definition: IfxEray_PinMap.c:58
IfxEray0_TXDA_P14_0_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT
Definition: IfxEray_PinMap.c:55
IfxEray0_TXDB_P14_5_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT
Definition: IfxEray_PinMap.c:60

Definition at line 88 of file IfxEray_PinMap.c.

◆ IfxEray_Txen_Out_pinTable

const IfxEray_Txen_Out* IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]
Initial value:
= {
{
{
&IfxEray0_TXENA_P02_4_OUT,
&IfxEray0_TXENA_P11_6_OUT,
&IfxEray0_TXENA_P14_9_OUT,
NULL_PTR,
NULL_PTR
},
{
&IfxEray0_TXENB_P02_5_OUT,
&IfxEray0_TXENB_P11_6_OUT,
&IfxEray0_TXENB_P11_11_OUT,
&IfxEray0_TXENB_P14_6_OUT,
&IfxEray0_TXENB_P14_9_OUT
}
}
}
IfxEray0_TXENB_P02_5_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT
Definition: IfxEray_PinMap.c:64
IfxEray0_TXENB_P11_6_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT
Definition: IfxEray_PinMap.c:66
IfxEray0_TXENA_P11_6_OUT
IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT
Definition: IfxEray_PinMap.c:62
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEray0_TXENB_P14_6_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT
Definition: IfxEray_PinMap.c:67
IfxEray0_TXENA_P02_4_OUT
IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT
Definition: IfxEray_PinMap.c:61
IfxEray0_TXENB_P14_9_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT
Definition: IfxEray_PinMap.c:68
IfxEray0_TXENB_P11_11_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT
Definition: IfxEray_PinMap.c:65
IfxEray0_TXENA_P14_9_OUT
IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT
Definition: IfxEray_PinMap.c:63

Definition at line 105 of file IfxEray_PinMap.c.


iLLD_TC26B: IfxEray_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxEray_PinMap.h File Reference
iLLD » ERAY

ERAY I/O map. More...

#include <IfxEray_reg.h>
#include <_Impl/IfxEray_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxEray_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxEray_Rxd_In
RXD pin mapping structure. More...
struct | IfxEray_Txd_Out
TXD pin mapping structure. More...
struct | IfxEray_Txen_Out
TXEN pin mapping structure. More...

Macros

#define | IFXERAY_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXERAY_PINMAP_NUM_NODES 2
#define | IFXERAY_PINMAP_RXD_IN_NUM_ITEMS 4
#define | IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS 4
#define | IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS 5

Variables

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN
ERAY_RXDA0: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN
ERAY_RXDA1: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN
ERAY_RXDA2: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN
ERAY_RXDA3: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN
ERAY_RXDB0: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN
ERAY_RXDB1: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN
ERAY_RXDB2: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN
ERAY_RXDB3: ERAY input. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT
ERAY_TXDA: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT
ERAY_TXDA: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT
ERAY_TXDA: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT
ERAY_TXDA: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT
ERAY_TXDB: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT
ERAY_TXDB: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT
ERAY_TXDB: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT
ERAY_TXDB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT
ERAY_TXENA: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT
ERAY_TXENA: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT
ERAY_TXENA: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN const IfxEray_Rxd_In * | IfxEray_Rxd_In_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
IfxEray_Rxd_In table. More...
IFX_EXTERN const IfxEray_Txd_Out * | IfxEray_Txd_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
IfxEray_Txd_Out table. More...
IFX_EXTERN const IfxEray_Txen_Out * | IfxEray_Txen_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxEray_Txen_Out table. More...

Detailed Description

ERAY I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEray_PinMap.h.


iLLD_TC26B: IfxEray_Eray.h File Reference

  • Eray
  • Eray
Data Structures | Functions
IfxEray_Eray.h File Reference
iLLD » ERAY

ERAY ERAY details. More...

#include "Eray/Std/IfxEray.h"
#include "Cpu/Std/IfxCpu.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxEray_Eray.h:

Go to the source code of this file.

Data Structures

struct | IfxEray_Eray_Gtu01Config
GTU01 configuration. More...
struct | IfxEray_Eray_Gtu02Config
GTU02 configuration. More...
struct | IfxEray_Eray_Gtu03Config
GTU03 configuration. More...
struct | IfxEray_Eray_Gtu04Config
GTU04 configuration. More...
struct | IfxEray_Eray_Gtu05Config
GTU05 configuration. More...
struct | IfxEray_Eray_Gtu06Config
GTU06 configuration. More...
struct | IfxEray_Eray_Gtu07Config
GTU07 configuration. More...
struct | IfxEray_Eray_Gtu08Config
GTU08 configuration. More...
struct | IfxEray_Eray_Gtu09Config
GTU09 configuration. More...
struct | IfxEray_Eray_Gtu10Config
GTU10 configuration. More...
struct | IfxEray_Eray_Gtu11Config
GTU11 configuration. More...
struct | IfxEray_Eray_GTUConfig
Gloabl Timing Unit configuration structure. More...
struct | IfxEray_Eray_NodeA
Pins configuration structure for Node A. More...
struct | IfxEray_Eray_NodeB
Pins configuration structure for Node B. More...
struct | IfxEray_Eray_Prtc1Control
Protocol operation control properties. More...
struct | IfxEray_Eray_Prtc2Control
Wakeup symbol control properties. More...
struct | IfxEray_Eray_Succ1Config
communication controller control properties. More...
struct | IfxEray_Eray_Succ2Config
Communication listen timeout properties. More...
struct | IfxEray_Eray_Succ3Config
Clock correction fail properties. More...
struct | IfxEray_Eray_ControllerConfig
Communication Controller configuration structure. More...
struct | IfxEray_Eray_Interrupt
Interrupt control properties. More...
struct | IfxEray_Eray_MessageRAMConfig
Message RAM configuration structure. More...
struct | IfxEray_Eray_Pins
Pins configuration structure. More...
struct | IfxEray_Eray
ERAY Module handle. More...
struct | IfxEray_Eray_BufferReconfig
Reconfigurable buffer structure. More...
struct | IfxEray_Eray_Config
Module configuration structure. More...
struct | IfxEray_Eray_NodeConfig
Node configuration structure. More...
struct | IfxEray_Eray_ReceiveControl
Receive control properties structure. More...
struct | IfxEray_Eray_ReceivedFrame
Received Frame. More...
struct | IfxEray_Eray_TransmitControl
Transfer control in a slot. More...

Functions

IFX_INLINE void | IfxEray_Eray_deInitModule (IfxEray_Eray *eray)
De-initialises the ERAY module. More...
IFX_EXTERN void | IfxEray_Eray_initModule (IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
Initialises the ERAY module with supplied configuration. More...
IFX_EXTERN void | IfxEray_Eray_initModuleConfig (IfxEray_Eray_Config *config, Ifx_ERAY *eray)
Inialises the default module configuration buffer. More...
IFX_EXTERN void | IfxEray_Eray_Node_init (IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
Initialises the Node with supplied configuration. More...
IFX_EXTERN void | IfxEray_Eray_Node_initConfig (IfxEray_Eray_NodeConfig *config)
Initialises the default node configuration buffer. More...
IFX_INLINE boolean | IfxEray_Eray_allowColdStart (IfxEray_Eray *eray)
Allows node to enter the cold startup state. More...
IFX_INLINE void | IfxEray_Eray_bufferReconfig (IfxEray_Eray *eray, IfxEray_Eray_BufferReconfig *reconfigBuffer)
Reconfiguring the buffer or changing the slot. More...
IFX_INLINE boolean | IfxEray_Eray_changePocState (IfxEray_Eray *eray, IfxEray_PocCommand PocCommand)
Changes the POC state and return status. More...
IFX_INLINE void | IfxEray_Eray_readData (IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers. More...
IFX_INLINE void | IfxEray_Eray_readFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceivedFrame *frame, Ifx_SizeT maxPayloadLength)
reads the frame received in a buffer. More...
IFX_INLINE boolean | IfxEray_Eray_setPocAllSlots (IfxEray_Eray *eray)
Sets the Controller state to ALL Slots mode. More...
IFX_INLINE boolean | IfxEray_Eray_startCommunication (IfxEray_Eray *eray)
Runs the communication controller. More...
IFX_INLINE void | IfxEray_Eray_wakeUpChannel (IfxEray_Eray *eray, IfxEray_Channel channel)
Wakeups the channel in a cluster. More...
IFX_INLINE boolean | IfxEray_Eray_wakeUpCluster (IfxEray_Eray *eray)
Wakeups the node in a cluster. More...
IFX_INLINE void | IfxEray_Eray_writeData (IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers. More...
IFX_EXTERN void | IfxEray_Eray_receiveFifoFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers frame from fifo in message RAM to Output buffer. More...
IFX_EXTERN void | IfxEray_Eray_receiveFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers header and data from message buffer to output buffer. More...
IFX_EXTERN void | IfxEray_Eray_transmitFrame (IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
Transfers the frame in given slot. More...
IFX_INLINE IfxEray_PocState | IfxEray_Eray_getPocState (IfxEray_Eray *eray)
Gets the current node controller POC state. More...
IFX_INLINE IfxEray_WakeupChannel | IfxEray_Eray_getWakeupPatternReceivedChannel (IfxEray_Eray *eray)
Gets the received wakeup pattern channel. More...
IFX_INLINE void | IfxEray_Eray_clearErrorFlag (IfxEray_Eray *eray, IfxEray_ClearErrorFlag errorFlag)
clears the error interrupt flag requested. More...
IFX_INLINE void | IfxEray_Eray_clearStatusFlag (IfxEray_Eray *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status interrupt flag requested. More...
IFX_INLINE Ifx_ERAY_EIR | IfxEray_Eray_getErrorInterrupts (IfxEray_Eray *eray)
Gets the error interrupt status. More...
IFX_INLINE uint8 | IfxEray_Eray_getMessageBufferInterruptStatus (IfxEray_Eray *eray, uint8 messageBuffer)
Gets the message buffer interrupt status. More...
IFX_INLINE uint8 | IfxEray_Eray_getNewDataInterruptStatus (IfxEray_Eray *eray, uint8 ndat)
Gets the new data interrupt buffers status. More...
IFX_INLINE Ifx_ERAY_SIR | IfxEray_Eray_getStatusInterrupts (IfxEray_Eray *eray)
Gets the node status interrupts. More...
IFX_INLINE void | IfxEray_Eray_setMessageBufferInterruptDestination (IfxEray_Eray *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Enables the message buffer interrupt line. More...
IFX_INLINE void | IfxEray_Eray_setNewDataInterruptDestination (IfxEray_Eray *eray, uint8 ndat, uint8 ndatDestination)
Enables the NDAT buffer interrupt line. More...

Detailed Description

ERAY ERAY details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEray_Eray.h.


iLLD_TC26B: IfxEray.h File Reference

  • Eray
  • Std
Data Structures | Enumerations | Functions
IfxEray.h File Reference
iLLD » ERAY

ERAY basic functionality. More...

#include "_Impl/IfxEray_cfg.h"
#include "_PinMap/IfxEray_PinMap.h"
#include "Src/Std/IfxSrc.h"
#include "IfxEray_reg.h"
Include dependency graph for IfxEray.h:

Go to the source code of this file.

Data Structures

struct | IfxEray_Header
Header section in a frame. More...
struct | IfxEray_ReceivedHeader
Received header in a frame. More...
struct | IfxEray_SlotConfig
Transmit control structure. More...

Enumerations

enum IfxEray_Baudrate {
IfxEray_Baudrate_10 = 0,
IfxEray_Baudrate_5 = 1,
IfxEray_Baudrate_2_5 = 2
}
Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP. More...
enum IfxEray_BufferDirection {
IfxEray_BufferDirection_receive = 0,
IfxEray_BufferDirection_transmit = 1
}
wheather transmit buffer or receive buffer, defined in MODULE_ERAY0.WRHS1.B.CFG. More...
enum IfxEray_Channel {
IfxEray_Channel_a = 0,
IfxEray_Channel_b = 1
}
Channel Id. More...
enum IfxEray_ClearErrorFlag {
IfxEray_ClearErrorFlag_pemc = 1,
IfxEray_ClearErrorFlag_cna = 2,
IfxEray_ClearErrorFlag_sfbm = 4,
IfxEray_ClearErrorFlag_sfo = 8,
IfxEray_ClearErrorFlag_ccf = 16,
IfxEray_ClearErrorFlag_ccl = 32,
IfxEray_ClearErrorFlag_eerr = 64,
IfxEray_ClearErrorFlag_rfo = 128,
IfxEray_ClearErrorFlag_efa = 256,
IfxEray_ClearErrorFlag_iiba = 512,
IfxEray_ClearErrorFlag_ioba = 1024,
IfxEray_ClearErrorFlag_mhf = 2048,
IfxEray_ClearErrorFlag_eda = 65536,
IfxEray_ClearErrorFlag_ltva = 131072,
IfxEray_ClearErrorFlag_taba = 262144,
IfxEray_ClearErrorFlag_edb = 16777216,
IfxEray_ClearErrorFlag_ltvb = 33554432,
IfxEray_ClearErrorFlag_tabb = 67108864
}
Selection of error flag to clear defined in MODULE_ERAY.EIR.U. More...
enum IfxEray_ClearStatusFlag {
IfxEray_ClearStatusFlag_wst = 1,
IfxEray_ClearStatusFlag_cas = 2,
IfxEray_ClearStatusFlag_cycs = 4,
IfxEray_ClearStatusFlag_txi = 8,
IfxEray_ClearStatusFlag_rxi = 16,
IfxEray_ClearStatusFlag_rfne = 32,
IfxEray_ClearStatusFlag_rfcl = 64,
IfxEray_ClearStatusFlag_nmvc = 128,
IfxEray_ClearStatusFlag_ti0 = 256,
IfxEray_ClearStatusFlag_ti1 = 512,
IfxEray_ClearStatusFlag_tibc = 1024,
IfxEray_ClearStatusFlag_tobc = 2048,
IfxEray_ClearStatusFlag_swe = 4096,
IfxEray_ClearStatusFlag_sucs = 8192,
IfxEray_ClearStatusFlag_mbsi = 16384,
IfxEray_ClearStatusFlag_sds = 32768,
IfxEray_ClearStatusFlag_wupa = 65536,
IfxEray_ClearStatusFlag_mtsa = 131072,
IfxEray_ClearStatusFlag_wupb = 16777216,
IfxEray_ClearStatusFlag_mtsb = 33554432
}
Selection of status flag to clear defined in MODULE_ERAY.SIR.U. More...
enum IfxEray_ClockDivider {
IfxEray_ClockDivider_none = 0,
IfxEray_ClockDivider_1 = 1,
IfxEray_ClockDivider_2,
IfxEray_ClockDivider_3,
IfxEray_ClockDivider_4,
IfxEray_ClockDivider_5,
IfxEray_ClockDivider_6,
IfxEray_ClockDivider_7
}
Clock divider in RUN mode, defined in MODULE_ERAY0.B.RMC. More...
enum IfxEray_ExternalOffset {
IfxEray_ExternalOffset_noCorrection = 1,
IfxEray_ExternalOffset_correctionSubtracted = 2,
IfxEray_ExternalOffset_correctionAdded = 3
}
External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC. More...
enum IfxEray_ExternalOffsetCorrection {
IfxEray_ExternalOffsetCorrection_0 = 0,
IfxEray_ExternalOffsetCorrection_1,
IfxEray_ExternalOffsetCorrection_2,
IfxEray_ExternalOffsetCorrection_3,
IfxEray_ExternalOffsetCorrection_4,
IfxEray_ExternalOffsetCorrection_5,
IfxEray_ExternalOffsetCorrection_6,
IfxEray_ExternalOffsetCorrection_7
}
External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC. More...
enum IfxEray_ExternalRate {
IfxEray_ExternalRate_noCorrection = 1,
IfxEray_ExternalRate_correctionSubtracted = 2,
IfxEray_ExternalRate_correctionAdded = 3
}
External rate correction control MODULE_ERAY0.GTU11.B.ERCC. More...
enum IfxEray_ExternalRateCorrection {
IfxEray_ExternalRateCorrection_0 = 0,
IfxEray_ExternalRateCorrection_1,
IfxEray_ExternalRateCorrection_2,
IfxEray_ExternalRateCorrection_3,
IfxEray_ExternalRateCorrection_4,
IfxEray_ExternalRateCorrection_5,
IfxEray_ExternalRateCorrection_6,
IfxEray_ExternalRateCorrection_7
}
External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC. More...
enum IfxEray_IdleDynamicSlots {
IfxEray_IdleDynamicSlots_0 = 0,
IfxEray_IdleDynamicSlots_1,
IfxEray_IdleDynamicSlots_2
}
Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI. More...
enum IfxEray_ListenTimeOutNoise {
IfxEray_ListenTimeOutNoise_2 = 1,
IfxEray_ListenTimeOutNoise_3,
IfxEray_ListenTimeOutNoise_4,
IfxEray_ListenTimeOutNoise_5,
IfxEray_ListenTimeOutNoise_6,
IfxEray_ListenTimeOutNoise_7,
IfxEray_ListenTimeOutNoise_8,
IfxEray_ListenTimeOutNoise_9,
IfxEray_ListenTimeOutNoise_10,
IfxEray_ListenTimeOutNoise_11,
IfxEray_ListenTimeOutNoise_12,
IfxEray_ListenTimeOutNoise_13,
IfxEray_ListenTimeOutNoise_14,
IfxEray_ListenTimeOutNoise_15,
IfxEray_ListenTimeOutNoise_16
}
Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN. More...
enum IfxEray_MaxSynchFrames {
IfxEray_MaxSynchFrames_2 = 2,
IfxEray_MaxSynchFrames_3,
IfxEray_MaxSynchFrames_4,
IfxEray_MaxSynchFrames_5,
IfxEray_MaxSynchFrames_6,
IfxEray_MaxSynchFrames_7,
IfxEray_MaxSynchFrames_8,
IfxEray_MaxSynchFrames_9,
IfxEray_MaxSynchFrames_10,
IfxEray_MaxSynchFrames_11,
IfxEray_MaxSynchFrames_12,
IfxEray_MaxSynchFrames_13,
IfxEray_MaxSynchFrames_14,
IfxEray_MaxSynchFrames_15
}
Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM. More...
enum IfxEray_PocCommand {
IfxEray_PocCommand_notAccepted = 0,
IfxEray_PocCommand_config = 1,
IfxEray_PocCommand_ready = 2,
IfxEray_PocCommand_wakeup = 3,
IfxEray_PocCommand_run = 4,
IfxEray_PocCommand_allSlots = 5,
IfxEray_PocCommand_halt = 6,
IfxEray_PocCommand_freeze = 7,
IfxEray_PocCommand_sendMts = 8,
IfxEray_PocCommand_coldStart = 9,
IfxEray_PocCommand_reset = 10,
IfxEray_PocCommand_monitor = 11,
IfxEray_PocCommand_clearRam = 12
}
Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD. More...
enum IfxEray_PocState {
IfxEray_PocState_defaultConfig = 0,
IfxEray_PocState_ready = 1,
IfxEray_PocState_normalActive = 2,
IfxEray_PocState_normalPassive = 3,
IfxEray_PocState_halt = 4,
IfxEray_PocState_monitor = 5,
IfxEray_PocState_config = 15,
IfxEray_PocState_wakeupStandby = 16,
IfxEray_PocState_wakeupListen = 17,
IfxEray_PocState_wakeupSend = 18,
IfxEray_PocState_wakeupDetect = 19,
IfxEray_PocState_startup = 32,
IfxEray_PocState_coldStartListen = 33,
IfxEray_PocState_collisionResolution = 34,
IfxEray_PocState_consistencyCheck = 35,
IfxEray_PocState_gap = 36,
IfxEray_PocState_join = 37,
IfxEray_PocState_integrationCheck = 38,
IfxEray_PocState_integrationListen = 39,
IfxEray_PocState_integrationConsistencyCheck = 40,
IfxEray_PocState_initializeSchedule = 41,
IfxEray_PocState_staruAborted = 42,
IfxEray_PocState_startupSucced = 43
}
State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS. More...
enum IfxEray_ReceiveChannel {
IfxEray_ReceiveChannel_both = 0,
IfxEray_ReceiveChannel_b = 1,
IfxEray_ReceiveChannel_a = 2,
IfxEray_ReceiveChannel_none = 3
}
Receiving channel, defined in MODULE_ERAY0.FRF.B.CH. More...
enum IfxEray_SleepMode {
IfxEray_SleepMode_enable = 0,
IfxEray_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ERAY.CLC.B.EDIS. More...
enum IfxEray_StrobePosition {
IfxEray_StrobePosition_5 = 0,
IfxEray_StrobePosition_4 = 1,
IfxEray_StrobePosition_6 = 2
}
Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP. More...
enum IfxEray_SuspendMode {
IfxEray_SuspendMode_none = 0,
IfxEray_SuspendMode_hard = 1,
IfxEray_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxEray_TransmissionMode {
IfxEray_TransmissionMode_continuous = 0,
IfxEray_TransmissionMode_singleShot = 1
}
Transmission mode of Header, defined in MODULE_ERAY0.WRHS1.B.TXM. More...
enum IfxEray_TransmissionSlotMode {
IfxEray_TransmissionSlotMode_all = 0,
IfxEray_TransmissionSlotMode_single = 1
}
Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM. More...
enum IfxEray_WakeupChannel {
IfxEray_WakeupChannel_a = 0,
IfxEray_WakeupChannel_b = 1
}
Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS. More...

Functions

IFX_INLINE void | IfxEray_clearErrorFlag (Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag)
Clears the error flag requested. More...
IFX_INLINE void | IfxEray_clearStatusFlag (Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status flag requested. More...
IFX_INLINE Ifx_ERAY_EIR | IfxEray_getErrorInterrupts (Ifx_ERAY *eray)
Gets the error interrupt flags. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInputBufferBusySrcPtr (Ifx_ERAY *eray)
Gets the IBUSY service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInterruptLine0SrcPtr (Ifx_ERAY *eray)
Gets the INT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInterruptLine1SrcPtr (Ifx_ERAY *eray)
Gets the INT1 service request. More...
IFX_INLINE boolean | IfxEray_getMessageBufferInterruptStatus (Ifx_ERAY *eray, uint8 messageBuffer)
Gets the message buffers interrupt status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getMessageBufferStatus0SrcPtr (Ifx_ERAY *eray)
Gets the MBSC0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getMessageBufferStatus1SrcPtr (Ifx_ERAY *eray)
Gets the MBSC1 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getNewDataInterrupt0SrcPtr (Ifx_ERAY *eray)
Gets the NDAT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getNewDataInterrupt1SrcPtr (Ifx_ERAY *eray)
Gets the NDAT1 service request. More...
IFX_INLINE boolean | IfxEray_getNewDataInterruptStatus (Ifx_ERAY *eray, uint8 ndat)
Gets the new data interrupt buffers status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getOutputBufferBusySrcPtr (Ifx_ERAY *eray)
Gets the OBUSY service request. More...
IFX_INLINE Ifx_ERAY_SIR | IfxEray_getStatusInterrupts (Ifx_ERAY *eray)
Gets the status interrupt flags. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getTimerInterrupt0SrcPtr (Ifx_ERAY *eray)
Gets the TINT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getTimerInterrupt1SrcPtr (Ifx_ERAY *eray)
Gets the TINT1 service request. More...
IFX_EXTERN void | IfxEray_clearAllFlags (Ifx_ERAY *eray)
Clears all the error flags. More...
IFX_EXTERN void | IfxEray_enableInterruptLines (Ifx_ERAY *eray)
Enables all the Interrupt lines. More...
IFX_EXTERN void | IfxEray_setMessageBufferInterruptDestination (Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination. More...
IFX_EXTERN void | IfxEray_setNewDataInterruptDestination (Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination. More...
IFX_INLINE void | IfxEray_initRxPin (const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode)
Initialises a RX pin. More...
IFX_INLINE void | IfxEray_initTxEnPin (const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver)
Initializes a TX Enable output. More...
IFX_INLINE void | IfxEray_initTxPin (const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE void | IfxEray_disableModule (Ifx_ERAY *eray)
Disables the ERAY module. More...
IFX_INLINE void | IfxEray_enableModule (Ifx_ERAY *eray)
Enables the ERAY module. More...
IFX_INLINE boolean | IfxEray_isModuleSuspended (Ifx_ERAY *eray)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxEray_setSleepMode (Ifx_ERAY *eray, IfxEray_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN Ifx_ERAY * | IfxEray_getAddress (IfxEray_Index eray)
IFX_EXTERN IfxEray_Index | IfxEray_getIndex (Ifx_ERAY *eray)
API to get the resource index of the ERAY specified. More...
IFX_EXTERN void | IfxEray_resetModule (Ifx_ERAY *eray)
Resets the ERAY kernel. More...
IFX_INLINE Ifx_ERAY_FSR | IfxEray_getFifoStatus (Ifx_ERAY *eray)
Gets the FIFO status. More...
IFX_INLINE boolean | IfxEray_getInputBufferBusyHostStatus (Ifx_ERAY *eray)
Gets the Input Buffer Host Busy status. More...
IFX_INLINE uint8 | IfxEray_getInputBufferBusyShadowStatus (Ifx_ERAY *eray)
Gets the Input Buffer Shadow status. More...
IFX_INLINE uint8 | IfxEray_getOutputBuffer (Ifx_ERAY *eray)
Gets the output buffer index. More...
IFX_INLINE boolean | IfxEray_getOutputBufferBusyShadowStatus (Ifx_ERAY *eray)
Gets the Output Buffer Shadow status. More...
IFX_INLINE IfxEray_PocState | IfxEray_getPocState (Ifx_ERAY *eray)
Gets the current POC state. More...
IFX_INLINE IfxEray_WakeupChannel | IfxEray_getWakeupPatternReceivedChannel (Ifx_ERAY *eray)
Gets the received wakeup pattern channel. More...
IFX_INLINE void | IfxEray_waitForPocState (Ifx_ERAY *eray, IfxEray_PocState pocState)
Waits until the controller enters required POC state. More...
IFX_EXTERN boolean | IfxEray_changePocState (Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state. More...
IFX_EXTERN void | IfxEray_setPocReady (Ifx_ERAY *eray)
Sets the POC state to Ready state. More...
IFX_INLINE void | IfxEray_receiveHeader (Ifx_ERAY *eray, boolean headerReceived)
request to receive header section from message buffer. More...
IFX_INLINE void | IfxEray_sendHeader (Ifx_ERAY *eray, boolean headerTransfered)
sets the bit to send header in frame. More...
IFX_INLINE void | IfxEray_setActiveCyclePairs (Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive)
Sets number of cycle pairs for Active state. More...
IFX_INLINE void | IfxEray_setAutoDelayBuffers (Ifx_ERAY *eray)
Sets auto delays between input, output buffers and message RAM. More...
IFX_INLINE void | IfxEray_setBaudrate (Ifx_ERAY *eray, IfxEray_Baudrate baudrate)
Sets baudrate on Flexray bus. More...
IFX_INLINE void | IfxEray_setBufferReconfigSecure (Ifx_ERAY *eray, uint8 secureValue)
Sets secured buffers in message RAM. More...
IFX_INLINE void | IfxEray_setChannelAInitialOffsets (Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset)
Sets channel A initial offstes. More...
IFX_INLINE void | IfxEray_setChannelBInitialOffsets (Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset)
Sets channel B initial offstes. More...
IFX_INLINE void | IfxEray_setChannelsReceiveDelay (Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay)
Sets receive delays on channels. More...
IFX_INLINE void | IfxEray_setClockCorrectionCycles (Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt)
Sets clock correction cycles for Passive and Halt. More...
IFX_INLINE void | IfxEray_setClockSynchErrorHalt (Ifx_ERAY *eray, boolean clockSyncErrorHalt)
lead to halt state in clock synch error. More...
IFX_INLINE void | IfxEray_setClusterDriftValues (Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset)
Sets cluster drift values. More...
IFX_INLINE void | IfxEray_setClusterStartupDeviation (Ifx_ERAY *eray, uint16 acceptedStartupDeviation)
Sets cluster startup deviation. More...
IFX_INLINE void | IfxEray_setCollisionAvoidanceDuration (Ifx_ERAY *eray, uint8 collisionAvoidanceDuration)
Sets CAS symbol window duration. More...
IFX_INLINE void | IfxEray_setCycleDurationMacroticks (Ifx_ERAY *eray, uint16 macroticks)
sets duration of the communication cycle in Macroticks. More...
IFX_INLINE void | IfxEray_setCycleDurationMicroticks (Ifx_ERAY *eray, uint32 microticks)
sets duration of the communication cycle in Microticks. More...
IFX_INLINE void | IfxEray_setDecodingCorrectionValue (Ifx_ERAY *eray, uint8 decodingCorrection)
Sets decoding correction value. More...
IFX_INLINE void | IfxEray_setDynamicSlots (Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots)
Sets dynamic slots count and length. More...
IFX_INLINE void | IfxEray_setExternalCorrectionControl (Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate)
Sets external correction controls. More...
IFX_INLINE void | IfxEray_setExternalCorrectionValues (Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection)
Sets external correction values. More...
IFX_INLINE void | IfxEray_setFifoBufferStartIndex (Ifx_ERAY *eray, uint8 fifoBufferStartIndex)
Sets FIFO buffer start idex. More...
IFX_INLINE void | IfxEray_setFifoFilterConfigurations (Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter)
Sets FIFO filter configurations. More...
IFX_INLINE void | IfxEray_setFifoMessageBufferConfigurations (Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth)
Sets FIFO configurations. More...
IFX_INLINE void | IfxEray_setFirstDynamicBuffer (Ifx_ERAY *eray, uint8 firstDynamicBuffer)
Sets first dynamic buffer. More...
IFX_INLINE void | IfxEray_setListenTimeOuts (Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise)
Sets startup or wakeup listen timeouts. More...
IFX_INLINE void | IfxEray_setMaxColdStartAttempts (Ifx_ERAY *eray, uint8 maxColdStartAttempts)
Sets the maximum cold start attempts for active state. More...
IFX_INLINE void | IfxEray_setMaxCorrectionValues (Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection)
Sets max limit correction values. More...
IFX_INLINE void | IfxEray_setMaxSynchFrames (Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames)
Sets maximum synch frames in a cluster. More...
IFX_INLINE void | IfxEray_setMessageBufferCount (Ifx_ERAY *eray, uint8 numberOfMessageBuffers)
Sets number of message buffers. More...
IFX_INLINE void | IfxEray_setMessageHandlerConfigurations (Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart)
Sets Message Handler configurations. More...
IFX_INLINE void | IfxEray_setNetworkStartIdleTime (Ifx_ERAY *eray, uint16 networkStartIdleTime)
Sets network start Idle time. More...
IFX_INLINE void | IfxEray_setNetworkVectorLength (Ifx_ERAY *eray, uint32 networkVectorLength)
Sets network management vector length. More...
IFX_INLINE void | IfxEray_setNodeChannels (Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode)
Sets channels connected to node. More...
IFX_INLINE void | IfxEray_setOffsetCorrection (Ifx_ERAY *eray, uint16 correctionOffset)
Sets offset correction starting point. More...
IFX_INLINE void | IfxEray_setReceiveRequest (Ifx_ERAY *eray, boolean receiveRequested)
requests to receive the frame. More...
IFX_INLINE void | IfxEray_setReceiveWakeupTimes (Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime)
Sets receive wakeup times. More...
IFX_INLINE void | IfxEray_setRxBufferNumber (Ifx_ERAY *eray, uint8 bufferIndex)
sets buffer number in which frame is received. More...
IFX_INLINE void | IfxEray_setSlotActionPoints (Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint)
Sets slots action points. More...
IFX_INLINE void | IfxEray_setStaticSlots (Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount)
Sets static slots count and length. More...
IFX_INLINE void | IfxEray_setStrobePosition (Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition)
Sets sample point for strobing. More...
IFX_INLINE void | IfxEray_setSymbolChannels (Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted)
Sets channels which transmits symbols. More...
IFX_INLINE void | IfxEray_setTransmissionSlotMode (Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode)
Sets the transmit slot mode. More...
IFX_INLINE void | IfxEray_setTransmissionStartTime (Ifx_ERAY *eray, uint8 transmissionStartTime)
Sets transmission start time duration. More...
IFX_INLINE void | IfxEray_setTransmitRequest (Ifx_ERAY *eray, boolean transferRequested)
Sets transfer request to send frame. More...
IFX_INLINE void | IfxEray_setTransmitWakeupTimes (Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime)
Sets transmit wakeup times. More...
IFX_INLINE void | IfxEray_setTransmittedFrames (Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted)
Configures transmitted frames for startup and synchronization. More...
IFX_INLINE void | IfxEray_setTxBufferNumber (Ifx_ERAY *eray, uint8 bufferIndex)
Sets the transmit buffer number. More...
IFX_INLINE void | IfxEray_setViewData (Ifx_ERAY *eray, boolean swapRequested)
Swaps the shadow and Host output registers. More...
IFX_INLINE void | IfxEray_setWakeupPatternChannel (Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel)
Sets the cluster wakeup channel. More...
IFX_INLINE void | IfxEray_receiveData (Ifx_ERAY *eray, boolean dataReceived)
requests to receive data from message buffer. More...
IFX_INLINE void | IfxEray_sendData (Ifx_ERAY *eray, boolean dataTransfered)
sets the bit to send data in frame. More...
IFX_EXTERN uint16 | IfxEray_calcHeaderCrc (uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
Calculate and returns the CRC for frame. More...
IFX_EXTERN void | IfxEray_readData (Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers. More...
IFX_EXTERN void | IfxEray_readFrame (Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers. More...
IFX_EXTERN void | IfxEray_setSlot (Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots. More...
IFX_EXTERN void | IfxEray_writeData (Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers. More...
IFX_INLINE uint8 | IfxEray_getFifoIndex (Ifx_ERAY *eray)
Gets the FIFO index. More...
IFX_INLINE void | IfxEray_setSuspendMode (Ifx_ERAY *eray, IfxEray_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxEray_initRxPinWithPadLevel (const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of pin direction as input and configuring pad driver. More...

Detailed Description

ERAY basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEray.h.

Function Documentation

◆ IfxEray_getFifoIndex()

IFX_INLINE uint8 IfxEray_getFifoIndex ( Ifx_ERAY * eray )

Gets the FIFO index.

Parameters
eray pointer to ERAY module registers.
Returns
FIFO buffer index.

Definition at line 1252 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame().

◆ IfxEray_initRxPinWithPadLevel()

IFX_INLINE void IfxEray_initRxPinWithPadLevel | ( | const IfxEray_Rxd_In * | rx,
 |  | IfxPort_InputMode | rxMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of pin direction as input and configuring pad driver.

Parameters
rx | the RX Pin which should be configured.
rxMode | the pin input mode which should be configured.
padDriver | Pad Driver Configuration
Returns
None

Definition at line 1826 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_setSuspendMode()

IFX_INLINE void IfxEray_setSuspendMode | ( | Ifx_ERAY * | eray,
 |  | IfxEray_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
eray | Pointer to ERAY module registers
mode | Module suspend mode
Returns
None

Definition at line 1750 of file IfxEray.h.


iLLD_TC26B: ETH

Modules | Files
ETH
iLLD
Collaboration diagram for ETH:

Modules

Implementation
Standard Driver
ETH Pin Mapping
PHY_PEF7071

Files

file | IfxEth_cfg.h
ETH on-chip implementation data.
file | IfxEth_PinMap.c
ETH I/O map.
file | IfxEth_PinMap.h
ETH I/O map.
file | IfxEth_Phy_Pef7071.h
ETH PHY_PEF7071 details.
file | IfxEth.h
ETH basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » ETH
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » ETH
Collaboration diagram for Standard Driver:

Modules

Data Structures
Unions
Configuration Functions
Utility Functions
Initialisation Functions
Enumerations

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » ETH » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxEth_AltRxDescr0_Bits
Structure for Alternate/Enhanced RX descriptor DWORD 0 Bit field access. More...
struct | IfxEth_AltRxDescr1_Bits
Structure for Alternate/Enhanced RX descriptor DWORD 1 Bit field access. More...
struct | IfxEth_AltTxDescr0_Bits
Structure for Alternate/Enhanced TX descriptor DWORD 0 Bit field access. More...
struct | IfxEth_AltTxDescr1_Bits
Structure for Alternate/Enhanced TX descriptor DWORD 1 Bit field access. More...
struct | IfxEth_RingModeRxBuffersConfig
Configuration structure for Ring Mode Receive Buffers. More...
struct | IfxEth_RingModeTxBuffersConfig
Configuration structure for Ring Mode Transmit buffers. More...
struct | IfxEth_RxDescr
Normal RX descriptor. More...
struct | IfxEth_TxDescr
Normal TX descriptor. More...
struct | IfxEth_MiiPins
Port pins for MII mode configuration. More...
struct | IfxEth_RingModeBuffersConfig
Configuration structure for Ring Mode descriptors. More...
struct | IfxEth_RmiiPins
Port pins for RMII mode configuration. More...
struct | IfxEth_Config
ETH configuration structure. More...
struct | IfxEth
ETH driver structure. More...
struct | IfxEth_RxDescr0_Bits
Structure for RX descriptor DWORD 0 Bit field access. More...
struct | IfxEth_RxDescr1_Bits
Structure for RX descriptor DWORD 1 Bit field access. More...
struct | IfxEth_TxDescr0_Bits
Structure for TX descriptor DWORD 0 Bit field access. More...
struct | IfxEth_TxDescr1_Bits
Structure for TX descriptor DWORD 1 Bit field access. More...

Detailed Description

Data Structure Documentation

◆ IfxEth_AltRxDescr0_Bits

struct IfxEth_AltRxDescr0_Bits

Structure for Alternate/Enhanced RX descriptor DWORD 0 Bit field access.

Definition at line 173 of file IfxEth.h.

Data Fields
uint32 | AFM: 1 | Destination Address Filter Fail.
uint32 | CE: 1 | CRC Error.
uint32 | DBE: 1 | Dribble Bit Error.
uint32 | DE: 1 | Descriptor Error.
uint32 | ES: 1 | Error Summary, ES = PCE | CE | RE | RWT | LC | IPC | OE | DE.
uint32 | ext: 1 | Extended Status Available/Rx MAC Address.
uint32 | FL: 14 | Frame Length.
uint32 | FS: 1 | First Descriptor.
uint32 | FT: 1 | Frame Type.
uint32 | IPC: 1 | IPC Checksum Error/Giant Frame.
uint32 | LC: 1 | Late Collision.
uint32 | LE: 1 | Length Error.
uint32 | LS: 1 | Last Descriptor.
uint32 | OE: 1 | Overflow Error.
uint32 | OWN: 1 | Own Bit, 1 = own by DMA.
uint32 | RE: 1 | Receive Error.
uint32 | RWT: 1 | Receive Watchdog Timeout.
uint32 | SAF: 1 | Source Address Filter Fail.
uint32 | VLAN: 1 | VLAN Tag.

◆ IfxEth_AltRxDescr1_Bits

struct IfxEth_AltRxDescr1_Bits

Structure for Alternate/Enhanced RX descriptor DWORD 1 Bit field access.

Definition at line 198 of file IfxEth.h.

Data Fields
uint32 | DIC: 1 | Disable Interrupt on Completion.
uint32 | RBS1: 13 | Receive Buffer 1 Size.
uint32 | RBS2: 13 | Receive Buffer 2 Size.
uint32 | RCH: 1 | Second Address Chained.
uint32 | RER: 1 | Receive End of Ring.
uint32 | resv: 2 | reserved)
uint32 | resv1: 1 | reserved

◆ IfxEth_AltTxDescr0_Bits

struct IfxEth_AltTxDescr0_Bits

Structure for Alternate/Enhanced TX descriptor DWORD 0 Bit field access.

Definition at line 211 of file IfxEth.h.

Data Fields
uint32 | CC: 4 | Collision count.
uint32 | CIC: 2 | Checksum Insertion Control.
uint32 | DB: 1 | Deferred bit.
uint32 | DC: 1 | Disable CRC.
uint32 | DP: 1 | Disable Padding.
uint32 | EC: 1 | Excessive Collision.
uint32 | ED: 1 | Excessive deferral.
uint32 | ES: 1 | Error Summary, ES = JT | FF | LOC | NC | LC | EC | ED | UF.
uint32 | FF: 1 | Frame Flushed.
uint32 | FS: 1 | First Segment.
uint32 | IC: 1 | Interrupt on Completion.
uint32 | IHE: 1 | IP Header Error.
uint32 | JT: 1 | Jabber Timeout.
uint32 | LC: 1 | Late Collision.
uint32 | LOC: 1 | Loss of Carrier.
uint32 | LS: 1 | Last Segment.
uint32 | NC: 1 | No Carrier.
uint32 | OWN: 1 | Own Bit, 1 = own by DMA.
uint32 | PCE: 1 | Payload Checksum Error.
uint32 | resv: 2 | (reserved)
uint32 | resv1: 1 | (Reserved)
uint32 | TCH: 1 | Second Address Chained.
uint32 | TER: 1 | Transmit End of Ring.
uint32 | TTSE: 1 | Transmit Time Stamp Enable.
uint32 | TTSS: 1 | Transmit Time Stamp Status.
uint32 | UF: 1 | Underflow error.
uint32 | VLAN: 1 | VLAN TAG.

◆ IfxEth_AltTxDescr1_Bits

struct IfxEth_AltTxDescr1_Bits

Structure for Alternate/Enhanced TX descriptor DWORD 1 Bit field access.

Definition at line 244 of file IfxEth.h.

Data Fields
uint32 | resv1: 3 | (reserved)
uint32 | resv2: 3 | (reserved)
uint32 | TBS1: 13 | Transmit Buffer 1 Size.
uint32 | TBS2: 13 | Transmit Buffer 2 Size.

◆ IfxEth_RingModeRxBuffersConfig

struct IfxEth_RingModeRxBuffersConfig

Configuration structure for Ring Mode Receive Buffers.

Definition at line 322 of file IfxEth.h.

Data Fields
uint16 | rxBuffer1Size | Size of Rx Buffer 1.
uint32 | rxBuffer1StartAddress | Start address of Rx Buffer 1.
uint16 | rxBuffer2Size | Size of Rx Buffer 2.
uint32 | rxBuffer2StartAddress | Start address of Rx Buffer 2.
IfxEth_RingModeBufferUsed | rxBufferUsed | Receive Buffer(s) used in ringmode.

◆ IfxEth_RingModeTxBuffersConfig

struct IfxEth_RingModeTxBuffersConfig

Configuration structure for Ring Mode Transmit buffers.

Definition at line 333 of file IfxEth.h.

Data Fields
uint16 | txBuffer1Size | Size of Tx Buffer 1.
uint32 | txBuffer1StartAddress | Start address of Tx Buffer 1.
uint16 | txBuffer2Size | Size of Tx Buffer 2.
uint32 | txBuffer2StartAddress | Start address of Tx Buffer 2.
IfxEth_RingModeBufferUsed | txBufferUsed | Transmit Buffer(s) used in ringmode.

◆ IfxEth_RxDescr

struct IfxEth_RxDescr

Normal RX descriptor.

Definition at line 344 of file IfxEth.h.

Collaboration diagram for IfxEth_RxDescr:
[legend]
Data Fields
IfxEth_RxDescr0 | RDES0 | RX descriptor DWORD 0.
IfxEth_RxDescr1 | RDES1 | RX descriptor DWORD 1.
IfxEth_RxDescr2 | RDES2 | RX descriptor DWORD 2.
IfxEth_RxDescr3 | RDES3 | RX descriptor DWORD 3.

◆ IfxEth_TxDescr

struct IfxEth_TxDescr

Normal TX descriptor.

Definition at line 354 of file IfxEth.h.

Collaboration diagram for IfxEth_TxDescr:
[legend]
Data Fields
IfxEth_TxDescr0 | TDES0 | TX descriptor DWORD 0.
IfxEth_TxDescr1 | TDES1 | TX descriptor DWORD 1.
IfxEth_TxDescr2 | TDES2 | TX descriptor DWORD 2.
IfxEth_TxDescr3 | TDES3 | TX descriptor DWORD 3.

◆ IfxEth_MiiPins

struct IfxEth_MiiPins

Port pins for MII mode configuration.

Definition at line 368 of file IfxEth.h.

Collaboration diagram for IfxEth_MiiPins:
[legend]
Data Fields
IfxEth_Col_In * | col | pointer to COL input pin config
IfxEth_Crs_In * | crs | pointer to CRS input pin config
IfxEth_Mdc_Out * | mdc | Pointer to MDC pin config.
IfxEth_Mdio_InOut * | mdio | Pointer to MDIO pin config.
IfxEth_Rxclk_In * | rxClk | Pointer to RXCLK input pin config.
IfxEth_Rxd_In * | rxd0 | Pointer to RXD0 input pin config.
IfxEth_Rxd_In * | rxd1 | Pointer to RXD1 input pin config.
IfxEth_Rxd_In * | rxd2 | Pointer to RXD2 input pin config.
IfxEth_Rxd_In * | rxd3 | Pointer to RXD3 input pin config.
IfxEth_Rxdv_In * | rxDv | Pointer to RXDV input pin config.
IfxEth_Rxer_In * | rxEr | Pointer to RXER input pin config.
IfxEth_Txclk_In * | txClk | Pointer to TXCLK input pin config.
IfxEth_Txd_Out * | txd0 | Pointer to TXD0 output pin config.
IfxEth_Txd_Out * | txd1 | Pointer to TXD1 output pin config.
IfxEth_Txd_Out * | txd2 | Pointer to TXD2 output pin config.
IfxEth_Txd_Out * | txd3 | Pointer to TXD3 output pin config.
IfxEth_Txen_Out * | txEn | Pointer to TXEN output pin config.
IfxEth_Txer_Out * | txEr | Pointer to TXER output pin config.

◆ IfxEth_RingModeBuffersConfig

struct IfxEth_RingModeBuffersConfig

Configuration structure for Ring Mode descriptors.

Definition at line 392 of file IfxEth.h.

Collaboration diagram for IfxEth_RingModeBuffersConfig:
[legend]
Data Fields
IfxEth_RingModeRxBuffersConfig | rxConfig | Receive buffers ring mode config.
IfxEth_RingModeTxBuffersConfig | txConfig | Transmit buffers ring mode config.

◆ IfxEth_RmiiPins

struct IfxEth_RmiiPins

Port pins for RMII mode configuration.

Definition at line 400 of file IfxEth.h.

Collaboration diagram for IfxEth_RmiiPins:
[legend]
Data Fields
IfxEth_Crsdv_In * | crsDiv | pointer to CRSDIV input pin config
IfxEth_Mdc_Out * | mdc | Pointer to MDC output pin config.
IfxEth_Mdio_InOut * | mdio | Pointer to MDIO pin config.
IfxEth_Refclk_In * | refClk | Pointer to REFCLK input pin config.
IfxEth_Rxd_In * | rxd0 | Pointer to RXD0 input pin config.
IfxEth_Rxd_In * | rxd1 | Pointer to RXD1 input pin config.
IfxEth_Txd_Out * | txd0 | Pointer to TXD0 output pin config.
IfxEth_Txd_Out * | txd1 | Pointer to TXD1 output pin config.
IfxEth_Txen_Out * | txEn | Pointer to TXEN output pin config.

◆ IfxEth_Config

struct IfxEth_Config

ETH configuration structure.

Definition at line 435 of file IfxEth.h.

Collaboration diagram for IfxEth_Config:
[legend]

Data Fields

uint8 | macAddress [6]
MAC address for the ethernet, should be unique in the network. More...
uint32(* | phyInit )(void)
Pointer to the transceiver init function. More...
boolean(* | phyLink )(void)
Pointer to the transceiver link function. More...
IfxEth_PhyInterfaceMode phyInterfaceMode
Phy Interface mode. More...
IFX_CONST IfxEth_RmiiPins * rmiiPins
Pointer to port pins configuration of RMII mode. More...
IFX_CONST IfxEth_MiiPins * miiPins
Pointer to port pins configuration of MII mode. More...
Ifx_Priority isrPriority
Interrupt service priority. More...
IfxSrc_Tos isrProvider
Interrupt service provider. More...
Ifx_ETH * | ethSfr
Pointer to register base. More...
IfxEth_RxDescrList * rxDescr
pointer to RX descriptor RAM More...
IfxEth_TxDescrList * txDescr
pointer to TX descriptor RAM More...
IfxEth_DescriptorMode descriptorMode
Descriptor mode (chain or ring) More...
IfxEth_RingModeBuffersConfig ringModeBuffersConfig
Ring mode buffers condiguration. More...

Field Documentation

◆ descriptorMode

IfxEth_DescriptorMode descriptorMode

Descriptor mode (chain or ring)

Definition at line 448 of file IfxEth.h.

Referenced by IfxEth_init().

◆ ethSfr

Ifx_ETH* ethSfr

Pointer to register base.

Definition at line 445 of file IfxEth.h.

Referenced by IfxEth_init(), and IfxEth_initConfig().

◆ isrPriority

Ifx_Priority isrPriority

Interrupt service priority.

Definition at line 443 of file IfxEth.h.

Referenced by IfxEth_init().

◆ isrProvider

IfxSrc_Tos isrProvider

Interrupt service provider.

Definition at line 444 of file IfxEth.h.

Referenced by IfxEth_init().

◆ macAddress

uint8 macAddress[6]

MAC address for the ethernet, should be unique in the network.

Definition at line 437 of file IfxEth.h.

Referenced by IfxEth_getMacAddressPointer(), and IfxEth_init().

◆ miiPins

IFX_CONST IfxEth_MiiPins* miiPins

Pointer to port pins configuration of MII mode.

Definition at line 442 of file IfxEth.h.

Referenced by IfxEth_init().

◆ phyInit

uint32(* phyInit) (void)

Pointer to the transceiver init function.

Definition at line 438 of file IfxEth.h.

Referenced by IfxEth_init().

◆ phyInterfaceMode

IfxEth_PhyInterfaceMode phyInterfaceMode

Phy Interface mode.

Definition at line 440 of file IfxEth.h.

Referenced by IfxEth_init().

◆ phyLink

boolean(* phyLink) (void)

Pointer to the transceiver link function.

Definition at line 439 of file IfxEth.h.

Referenced by IfxEth_isLinkActive().

◆ ringModeBuffersConfig

IfxEth_RingModeBuffersConfig ringModeBuffersConfig

Ring mode buffers condiguration.

Definition at line 449 of file IfxEth.h.

Referenced by IfxEth_init().

◆ rmiiPins

IFX_CONST IfxEth_RmiiPins* rmiiPins

Pointer to port pins configuration of RMII mode.

Definition at line 441 of file IfxEth.h.

Referenced by IfxEth_init().

◆ rxDescr

IfxEth_RxDescrList* rxDescr

pointer to RX descriptor RAM

Definition at line 446 of file IfxEth.h.

Referenced by IfxEth_init().

◆ txDescr

IfxEth_TxDescrList* txDescr

pointer to TX descriptor RAM

Definition at line 447 of file IfxEth.h.

Referenced by IfxEth_init().

◆ IfxEth

struct IfxEth

ETH driver structure.

Definition at line 458 of file IfxEth.h.

Collaboration diagram for IfxEth:
[legend]
Data Fields
IfxEth_Config | config | Copy of the configuration passed through IfxEth_init()
IfxEth_DescriptorMode | descriptorMode | Descriptor mode (chain or ring)
uint32 | error | Indicate an error has occurred during execution.
Ifx_ETH * | ethSfr | Pointer to register base.
sint32 | isrCount | count of all ISR
sint32 | isrRxCount | Count of RX ISR.
sint32 | isrTxCount | Count of TX ISR.
IfxEth_RxDescr * | pRxDescr |
IfxEth_TxDescr * | pTxDescr |
IfxEth_RingModeBufferUsed | rxBufferUsed | Receive Buffer(s) used in ringmode.
uint32 | rxCount | Number of frames received.
IfxEth_RxDescrList * | rxDescr | pointer to RX descriptor RAM
sint32 | rxDiff | Difference between isrRxCount and rxCount.
Ifx_ETH_STATUS | status | Intermediate variable to use register content in control structure.
IfxEth_RingModeBufferUsed | txBufferUsed | Transmit Buffer(s) used in ringmode.
uint32 | txCount | Number of frames transmitted.
IfxEth_TxDescrList * | txDescr | pointer to TX descriptor RAM
sint32 | txDiff | Difference between isrTxCount and txCount.

◆ IfxEth_RxDescr0_Bits

struct IfxEth_RxDescr0_Bits

Structure for RX descriptor DWORD 0 Bit field access.

Definition at line 482 of file IfxEth.h.

Data Fields
uint32 | AFM: 1 | Destination Address Filter Fail.
uint32 | CE: 1 | CRC Error.
uint32 | DBE: 1 | Dribble Bit Error.
uint32 | DE: 1 | Descriptor Error.
uint32 | ES: 1 | Error Summary, ES = PCE | CE | RE | RWT | LC | IPC | OE | DE.
uint32 | FL: 14 | Frame Length.
uint32 | FS: 1 | First Descriptor.
uint32 | FT: 1 | Frame Type.
uint32 | IPC: 1 | IPC Checksum Error/Giant Frame.
uint32 | LC: 1 | Late Collision.
uint32 | LE: 1 | Length Error.
uint32 | LS: 1 | Last Descriptor.
uint32 | OE: 1 | Overflow Error.
uint32 | OWN: 1 | Own Bit, 1 = own by DMA.
uint32 | PCE: 1 | Rx MAC Address/Payload Checksum Error.
uint32 | RE: 1 | Receive Error.
uint32 | RWT: 1 | Receive Watchdog Timeout.
uint32 | SAF: 1 | Source Address Filter Fail.
uint32 | VLAN: 1 | VLAN Tag.

◆ IfxEth_RxDescr1_Bits

struct IfxEth_RxDescr1_Bits

Structure for RX descriptor DWORD 1 Bit field access.

Definition at line 507 of file IfxEth.h.

Data Fields
uint32 | DIC: 1 | Disable Interrupt on Completion.
uint32 | RBS1: 11 | Receive Buffer 1 Size.
uint32 | RBS2: 11 | Receive Buffer 2 Size.
uint32 | RCH: 1 | Second Address Chained.
uint32 | RER: 1 | Receive End of Ring.
uint32 | resv: 2 | (reserved)
uint32 | resv2: 5 | (reserved)

◆ IfxEth_TxDescr0_Bits

struct IfxEth_TxDescr0_Bits

Structure for TX descriptor DWORD 0 Bit field access.

Definition at line 520 of file IfxEth.h.

Data Fields
uint32 | CC: 4 | Collision Count.
uint32 | DB: 1 | Deferred Bit.
uint32 | EC: 1 | Excessive Collision.
uint32 | ED: 1 | Excessive Deferral.
uint32 | ES: 1 | Error Summary, ES = JT | FF | LOC | NC | LC | EC | ED | UF.
uint32 | FF: 1 | Frame Flushed.
uint32 | IHE: 1 | IP Header Error.
uint32 | JT: 1 | Jabber Timeout.
uint32 | LC: 1 | Late Collision.
uint32 | LOC: 1 | Loss of Carrier.
uint32 | NC: 1 | No Carrier.
uint32 | OWN: 1 | Own Bit, 1 = own by DMA.
uint32 | PCE: 1 | Payload Checksum Error.
uint32 | resv: 13 | (reserved)
uint32 | TTSS: 1 | Tx Time Stamp Status.
uint32 | UF: 1 | Underflow Error.
uint32 | VLAN: 1 | VLAN Tag.

◆ IfxEth_TxDescr1_Bits

struct IfxEth_TxDescr1_Bits

Structure for TX descriptor DWORD 1 Bit field access.

Definition at line 543 of file IfxEth.h.

Data Fields
uint32 | CIC: 2 | Checksum Insertion Control.
uint32 | DC: 1 | Disable CRC.
uint32 | DP: 1 | Disable Padding.
uint32 | FS: 1 | First Segment.
uint32 | IC: 1 | Interrupt on Completion.
uint32 | LS: 1 | Last Segment.
uint32 | TBS1: 11 | Transmit Buffer 1 Size.
uint32 | TBS2: 11 | Transmit Buffer 2 Size.
uint32 | TCH: 1 | Second Address Chained.
uint32 | TER: 1 | Transmit End of Ring.
uint32 | TTSE: 1 | Transmit Time Stamp Enable.


iLLD_TC26B: Unions

Data Structures
Unions
iLLD » ETH » Standard Driver
Collaboration diagram for Unions:

Data Structures

union | IfxEth_RxDescr0
Union for RX descriptor DWORD 0. More...
union | IfxEth_RxDescr1
Union for RX descriptor DWORD 1. More...
union | IfxEth_RxDescr2
Union for RX descriptor DWORD 2. More...
union | IfxEth_RxDescr3
Union for RX descriptor DWORD 3. More...
union | IfxEth_TxDescr0
Union for TX descriptor DWORD 0. More...
union | IfxEth_TxDescr1
Union for TX descriptor DWORD 1. More...
union | IfxEth_TxDescr2
Union for TX descriptor DWORD 2. More...
union | IfxEth_TxDescr3
Union for TX descriptor DWORD 3. More...
union | IfxEth_RxDescrList
union | IfxEth_TxDescrList

Detailed Description

Data Structure Documentation

◆ IfxEth_RxDescr0

union IfxEth_RxDescr0

Union for RX descriptor DWORD 0.

Definition at line 258 of file IfxEth.h.

Collaboration diagram for IfxEth_RxDescr0:
[legend]
Data Fields
IfxEth_AltRxDescr0_Bits | A | Structure for RX descriptor DWORD 0 Bit field access.
uint32 | U | Unsigned long access.

◆ IfxEth_RxDescr1

union IfxEth_RxDescr1

Union for RX descriptor DWORD 1.

Definition at line 266 of file IfxEth.h.

Collaboration diagram for IfxEth_RxDescr1:
[legend]
Data Fields
IfxEth_AltRxDescr1_Bits | A | Structure for RX descriptor DWORD 1 Bit field access.
uint32 | U | unsigned long access

◆ IfxEth_RxDescr2

union IfxEth_RxDescr2

Union for RX descriptor DWORD 2.

Definition at line 274 of file IfxEth.h.

Data Fields
uint32 U unsigned long access

◆ IfxEth_RxDescr3

union IfxEth_RxDescr3

Union for RX descriptor DWORD 3.

Definition at line 281 of file IfxEth.h.

Data Fields
uint32 U unsigned long access

◆ IfxEth_TxDescr0

union IfxEth_TxDescr0

Union for TX descriptor DWORD 0.

Definition at line 288 of file IfxEth.h.

Collaboration diagram for IfxEth_TxDescr0:
[legend]
Data Fields
IfxEth_AltTxDescr0_Bits | A | Structure for TX descriptor DWORD 0 Bit field access.
uint32 | U | Unsigned long access.

◆ IfxEth_TxDescr1

union IfxEth_TxDescr1

Union for TX descriptor DWORD 1.

Definition at line 296 of file IfxEth.h.

Collaboration diagram for IfxEth_TxDescr1:
[legend]
Data Fields
IfxEth_AltTxDescr1_Bits | A | Structure for RX descriptor DWORD 1 Bit field access.
uint32 | U | unsigned long access

◆ IfxEth_TxDescr2

union IfxEth_TxDescr2

Union for TX descriptor DWORD 2.

Definition at line 304 of file IfxEth.h.

Data Fields
uint32 U unsigned long access

◆ IfxEth_TxDescr3

union IfxEth_TxDescr3

Union for TX descriptor DWORD 3.

Definition at line 311 of file IfxEth.h.

Data Fields
uint32 U unsigned long access

◆ IfxEth_RxDescrList

union IfxEth_RxDescrList

Definition at line 417 of file IfxEth.h.

Collaboration diagram for IfxEth_RxDescrList:
[legend]
Data Fields
IfxEth_RxDescr | items[IFXETH_MAX_RX_BUFFERS]
uint32 | U[IFXETH_MAX_RX_BUFFERS][IFXETH_DESCR_SIZE]

◆ IfxEth_TxDescrList

union IfxEth_TxDescrList

Definition at line 423 of file IfxEth.h.

Collaboration diagram for IfxEth_TxDescrList:
[legend]
Data Fields
IfxEth_TxDescr | items[IFXETH_MAX_TX_BUFFERS]
uint32 | U[IFXETH_MAX_TX_BUFFERS][IFXETH_DESCR_SIZE]


iLLD_TC26B: Configuration Functions

Functions
Configuration Functions
iLLD » ETH » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxEth_RxDescr_setBuffer (IfxEth_RxDescr *descr, void *buffer)
Set buffer of an RX descriptor. More...
IFX_INLINE IfxEth_TxDescr * | IfxEth_TxDescr_getNext (IfxEth_TxDescr *descr)
Get pointer to next TX descriptor. More...
IFX_INLINE boolean | IfxEth_TxDescr_isAvailable (IfxEth_TxDescr *descr)
Return TRUE if a TX descriptor is available for setup. More...
IFX_INLINE void | IfxEth_TxDescr_setBuffer (IfxEth_TxDescr *descr, void *buffer)
Set buffer of a TX descriptor. More...
IFX_INLINE void | IfxEth_applySoftwareReset (IfxEth *eth)
Applies the Software Reset. More...
IFX_INLINE void | IfxEth_clearEriInterrupt (IfxEth *eth)
Clear Early Receive Interrupt request. More...
IFX_INLINE void | IfxEth_clearRxInterrupt (IfxEth *eth)
Clear receive interrupt request. More...
IFX_INLINE void | IfxEth_clearTuInterrupt (IfxEth *eth)
Clear Transmit Buffer Unavailable request. More...
IFX_INLINE void | IfxEth_clearTxInterrupt (IfxEth *eth)
Clear transmit interrupt request. More...
IFX_INLINE void | IfxEth_disableTimeStampCoarseUpdate (IfxEth *eth)
Disables Timestamp Fine or Coarse Update. More...
IFX_INLINE void | IfxEth_disableTimeStampForIpv4Frames (IfxEth *eth)
Disables Processing of PTP frames sent over IPV4 UDP. More...
IFX_INLINE void | IfxEth_enableMmcCounter (IfxEth *eth)
Enables theMMC counter. More...
IFX_INLINE void | IfxEth_enableTimeStamp (IfxEth *eth)
Enables the TimeStamp. More...
IFX_INLINE void | IfxEth_enableTimeStampCoarseUpdate (IfxEth *eth)
Enables Timestamp Fine or Coarse Update. More...
IFX_INLINE void | IfxEth_enableTimeStampForAllFrames (IfxEth *eth)
Enables the TimeStamp for All frames. More...
IFX_INLINE void | IfxEth_enableTimeStampForEthFrames (IfxEth *eth)
Enables Processing of PTP over Ethernet Frames. More...
IFX_INLINE void | IfxEth_enableTimeStampForIpv4Frames (IfxEth *eth)
Enables Processing of PTP frames sent over IPV4 UDP. More...
IFX_INLINE void | IfxEth_enableTimeStampForVer2Format (IfxEth *eth)
Enables PTP packet Processing for Version 2 Format. More...
IFX_INLINE boolean | IfxEth_getTimeStampInitialiseStatus (IfxEth *eth)
returns the status of the TimeStamp Initialisation More...
IFX_INLINE boolean | IfxEth_getTimeStampUpdateStatus (IfxEth *eth)
returns the status of the System Time updation More...
IFX_INLINE void | IfxEth_initialiseTimeStamp (IfxEth *eth)
Initialises the TimeStamp. More...
IFX_INLINE boolean | IfxEth_isSoftwareResetDone (IfxEth *eth)
Returns the status of Software Reset. More...
IFX_INLINE void | IfxEth_setAddToTimeUpdate (IfxEth *eth)
Sets addition, the time value is added with the contents of the update register. More...
IFX_INLINE void | IfxEth_setBinaryRolloverControl (IfxEth *eth, boolean enabled)
Enable/Disables Timestamp Digital or Binary Rollover Control. More...
IFX_INLINE void | IfxEth_setLoopbackMode (IfxEth *eth, boolean loopbackMode)
Sets the loopback mode. More...
IFX_INLINE void | IfxEth_setNanoSecondsUpdateValue (IfxEth *eth, uint8 value)
Sets the time in sub seconds representation, to be initialized or added to the system time. More...
IFX_INLINE void | IfxEth_setPhyInterfaceMode (IfxEth *eth, IfxEth_PhyInterfaceMode mode)
Sets the Phy Interface mode. More...
IFX_INLINE void | IfxEth_setReceiveDescriptorAddress (Ifx_ETH *eth, void *address)
Sets receive descriptor address. More...
IFX_INLINE void | IfxEth_setSecondsUpdateValue (IfxEth *eth, uint8 value)
Sets the time in seconds to be initialized or added to the system time. More...
IFX_INLINE void | IfxEth_setSubSecondIncrementValue (IfxEth *eth, uint8 value)
Sets the Sub Second Increment Value. More...
IFX_INLINE void | IfxEth_setSubtractToTimeUpdate (IfxEth *eth)
Sets subtraction, the time value is subtracted with the contents of the update register. More...
IFX_INLINE void | IfxEth_setTransmitDescriptorAddress (Ifx_ETH *eth, void *address)
Sets transmit descriptor address. More...
IFX_INLINE void | IfxEth_updateTimeStamp (IfxEth *eth)
Updates the System time with specified values in SECONDS and NANOSECONDS registers. More...
IFX_INLINE void * | IfxEth_waitTransmitBuffer (IfxEth *eth)
Waits for one TX buffer becomes available. More...
IFX_EXTERN void | IfxEth_freeReceiveBuffer (IfxEth *eth)
Free the receive buffer, enabling it for the further reception. More...
IFX_EXTERN void | IfxEth_sendTransmitBuffer (IfxEth *eth, uint16 len)
Request to send the transmit buffer. More...
IFX_EXTERN void | IfxEth_sendTransmitBuffersRingMode (IfxEth *eth, uint16 buffer1Length, uint16 buffer2Length)
Request to send the transmit buffer. More...
IFX_EXTERN void | IfxEth_setMacAddress (IfxEth *eth, const uint8 *macAddress)
Sets the MAC address. More...
IFX_EXTERN void | IfxEth_startReceiver (IfxEth *eth)
Start the receiver functions. More...
IFX_EXTERN void | IfxEth_stopReceiver (IfxEth *eth)
Stops the receiver functions. More...
IFX_EXTERN void | IfxEth_writeHeader (IfxEth *eth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 packetSize)
writes the header format into buffrer More...

Detailed Description

Function Documentation

◆ IfxEth_applySoftwareReset()

IFX_INLINE void IfxEth_applySoftwareReset ( IfxEth * eth )

Applies the Software Reset.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1278 of file IfxEth.h.

Referenced by IfxEth_init().

◆ IfxEth_clearEriInterrupt()

IFX_INLINE void IfxEth_clearEriInterrupt ( IfxEth * eth )

Clear Early Receive Interrupt request.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1285 of file IfxEth.h.

◆ IfxEth_clearRxInterrupt()

IFX_INLINE void IfxEth_clearRxInterrupt ( IfxEth * eth )

Clear receive interrupt request.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1298 of file IfxEth.h.

◆ IfxEth_clearTuInterrupt()

IFX_INLINE void IfxEth_clearTuInterrupt ( IfxEth * eth )

Clear Transmit Buffer Unavailable request.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1305 of file IfxEth.h.

◆ IfxEth_clearTxInterrupt()

IFX_INLINE void IfxEth_clearTxInterrupt ( IfxEth * eth )

Clear transmit interrupt request.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1312 of file IfxEth.h.

◆ IfxEth_disableTimeStampCoarseUpdate()

IFX_INLINE void IfxEth_disableTimeStampCoarseUpdate ( IfxEth * eth )

Disables Timestamp Fine or Coarse Update.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1319 of file IfxEth.h.

◆ IfxEth_disableTimeStampForIpv4Frames()

IFX_INLINE void IfxEth_disableTimeStampForIpv4Frames ( IfxEth * eth )

Disables Processing of PTP frames sent over IPV4 UDP.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1326 of file IfxEth.h.

◆ IfxEth_enableMmcCounter()

IFX_INLINE void IfxEth_enableMmcCounter ( IfxEth * eth )

Enables theMMC counter.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1333 of file IfxEth.h.

◆ IfxEth_enableTimeStamp()

IFX_INLINE void IfxEth_enableTimeStamp ( IfxEth * eth )

Enables the TimeStamp.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1340 of file IfxEth.h.

◆ IfxEth_enableTimeStampCoarseUpdate()

IFX_INLINE void IfxEth_enableTimeStampCoarseUpdate ( IfxEth * eth )

Enables Timestamp Fine or Coarse Update.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1347 of file IfxEth.h.

◆ IfxEth_enableTimeStampForAllFrames()

IFX_INLINE void IfxEth_enableTimeStampForAllFrames ( IfxEth * eth )

Enables the TimeStamp for All frames.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1354 of file IfxEth.h.

◆ IfxEth_enableTimeStampForEthFrames()

IFX_INLINE void IfxEth_enableTimeStampForEthFrames ( IfxEth * eth )

Enables Processing of PTP over Ethernet Frames.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1361 of file IfxEth.h.

◆ IfxEth_enableTimeStampForIpv4Frames()

IFX_INLINE void IfxEth_enableTimeStampForIpv4Frames ( IfxEth * eth )

Enables Processing of PTP frames sent over IPV4 UDP.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1368 of file IfxEth.h.

◆ IfxEth_enableTimeStampForVer2Format()

IFX_INLINE void IfxEth_enableTimeStampForVer2Format ( IfxEth * eth )

Enables PTP packet Processing for Version 2 Format.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1375 of file IfxEth.h.

◆ IfxEth_freeReceiveBuffer()

IFX_EXTERN void IfxEth_freeReceiveBuffer ( IfxEth * eth )

Free the receive buffer, enabling it for the further reception.

Parameters
eth ETH driver structure
Returns
None

Definition at line 84 of file IfxEth.c.

◆ IfxEth_getTimeStampInitialiseStatus()

IFX_INLINE boolean IfxEth_getTimeStampInitialiseStatus ( IfxEth * eth )

returns the status of the TimeStamp Initialisation

Parameters
eth ETH driver structure
Returns
Status, TRUE: initialising, FLASE: initialised

Definition at line 1453 of file IfxEth.h.

◆ IfxEth_getTimeStampUpdateStatus()

IFX_INLINE boolean IfxEth_getTimeStampUpdateStatus ( IfxEth * eth )

returns the status of the System Time updation

Parameters
eth ETH driver structure
Returns
Status, TRUE: initialising, FLASE: initialised

Definition at line 1460 of file IfxEth.h.

◆ IfxEth_initialiseTimeStamp()

IFX_INLINE void IfxEth_initialiseTimeStamp ( IfxEth * eth )

Initialises the TimeStamp.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1474 of file IfxEth.h.

◆ IfxEth_isSoftwareResetDone()

IFX_INLINE boolean IfxEth_isSoftwareResetDone ( IfxEth * eth )

Returns the status of Software Reset.

Parameters
eth ETH driver structure
Returns
Status

Definition at line 1532 of file IfxEth.h.

Referenced by IfxEth_init().

◆ IfxEth_RxDescr_setBuffer()

IFX_INLINE void IfxEth_RxDescr_setBuffer | ( | IfxEth_RxDescr * | descr,
 |  | void * | buffer
 | ) |  |

Set buffer of an RX descriptor.

Parameters
descr | descr Pointer to an RX descriptor
buffer | pointer to buffer
Returns
None

Definition at line 1236 of file IfxEth.h.

Referenced by IfxEth_initReceiveDescriptors().

◆ IfxEth_sendTransmitBuffer()

IFX_EXTERN void IfxEth_sendTransmitBuffer | ( | IfxEth * | eth,
 |  | uint16 | len
 | ) |  |

Request to send the transmit buffer.

The transmit buffer is the last one specified by IfxEth_getTransmitBuffer()

Parameters
eth | ETH driver structure
len | Length of the data put in the transmit buffer (in bytes)
Returns
None

Definition at line 546 of file IfxEth.c.

Referenced by IfxEth_setAndSendTransmitBuffer().

◆ IfxEth_sendTransmitBuffersRingMode()

IFX_EXTERN void IfxEth_sendTransmitBuffersRingMode | ( | IfxEth * | eth,
 |  | uint16 | buffer1Length,
 |  | uint16 | buffer2Length
 | ) |  |

Request to send the transmit buffer.

The transmit buffer is the last one specified by IfxEth_getTransmitBuffer()

Parameters
eth | ETH driver structure
buffer1Length | Length of the data put in the transmit buffer 1 (in bytes)
buffer2Length | Length of the data put in the transmit buffer 2 (in bytes)
Returns
None

Definition at line 560 of file IfxEth.c.

◆ IfxEth_setAddToTimeUpdate()

IFX_INLINE void IfxEth_setAddToTimeUpdate ( IfxEth * eth )

Sets addition, the time value is added with the contents of the update register.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1561 of file IfxEth.h.

◆ IfxEth_setBinaryRolloverControl()

IFX_INLINE void IfxEth_setBinaryRolloverControl | ( | IfxEth * | eth,
 |  | boolean | enabled
 | ) |  |

Enable/Disables Timestamp Digital or Binary Rollover Control.

Parameters
eth | ETH driver structure
enabled | Enable = 1 / Disable = 0
Returns
None

Definition at line 1568 of file IfxEth.h.

◆ IfxEth_setLoopbackMode()

IFX_INLINE void IfxEth_setLoopbackMode | ( | IfxEth * | eth,
 |  | boolean | loopbackMode
 | ) |  |

Sets the loopback mode.

Parameters
eth | ETH driver structure
loopbackMode | loopback mode enable/disbale
Returns
None

Definition at line 1575 of file IfxEth.h.

◆ IfxEth_setMacAddress()

IFX_EXTERN void IfxEth_setMacAddress | ( | IfxEth * | eth,
 |  | const uint8 * | macAddress
 | ) |  |

Sets the MAC address.

Parameters
eth | ETH driver structure
macAddress | MAC address
Returns
None

Definition at line 590 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_setNanoSecondsUpdateValue()

IFX_INLINE void IfxEth_setNanoSecondsUpdateValue | ( | IfxEth * | eth,
 |  | uint8 | value
 | ) |  |

Sets the time in sub seconds representation, to be initialized or added to the system time.

Parameters
eth | ETH driver structure
value | Sub Second Increment Value
Returns
None

Definition at line 1582 of file IfxEth.h.

◆ IfxEth_setPhyInterfaceMode()

IFX_INLINE void IfxEth_setPhyInterfaceMode | ( | IfxEth * | eth,
 |  | IfxEth_PhyInterfaceMode | mode
 | ) |  |

Sets the Phy Interface mode.

Parameters
eth | ETH driver structure
mode | Phy interface mode
Returns
None

Definition at line 1589 of file IfxEth.h.

Referenced by IfxEth_init().

◆ IfxEth_setReceiveDescriptorAddress()

IFX_INLINE void IfxEth_setReceiveDescriptorAddress | ( | Ifx_ETH * | eth,
 |  | void * | address
 | ) |  |

Sets receive descriptor address.

Parameters
eth | pointer to the ethernet module
address | Address
Returns
None

Definition at line 1610 of file IfxEth.h.

Referenced by IfxEth_initReceiveDescriptors(), and IfxEth_initReceiveDescriptorsRingMode().

◆ IfxEth_setSecondsUpdateValue()

IFX_INLINE void IfxEth_setSecondsUpdateValue | ( | IfxEth * | eth,
 |  | uint8 | value
 | ) |  |

Sets the time in seconds to be initialized or added to the system time.

Parameters
eth | ETH driver structure
value | Sub Second Increment Value
Returns
None

Definition at line 1616 of file IfxEth.h.

◆ IfxEth_setSubSecondIncrementValue()

IFX_INLINE void IfxEth_setSubSecondIncrementValue | ( | IfxEth * | eth,
 |  | uint8 | value
 | ) |  |

Sets the Sub Second Increment Value.

Parameters
eth | ETH driver structure
value | Sub Second Increment Value
Returns
None

Definition at line 1623 of file IfxEth.h.

◆ IfxEth_setSubtractToTimeUpdate()

IFX_INLINE void IfxEth_setSubtractToTimeUpdate ( IfxEth * eth )

Sets subtraction, the time value is subtracted with the contents of the update register.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1630 of file IfxEth.h.

◆ IfxEth_setTransmitDescriptorAddress()

IFX_INLINE void IfxEth_setTransmitDescriptorAddress | ( | Ifx_ETH * | eth,
 |  | void * | address
 | ) |  |

Sets transmit descriptor address.

Parameters
eth | pointer to the ethernet module
address | Address
Returns
None

Definition at line 1651 of file IfxEth.h.

Referenced by IfxEth_initTransmitDescriptors(), and IfxEth_initTransmitDescriptorsRingMode().

◆ IfxEth_startReceiver()

IFX_EXTERN void IfxEth_startReceiver ( IfxEth * eth )

Start the receiver functions.

Parameters
eth ETH driver structure
Returns
None

Definition at line 853 of file IfxEth.c.

Referenced by IfxEth_wakeupReceiver().

◆ IfxEth_stopReceiver()

IFX_EXTERN void IfxEth_stopReceiver ( IfxEth * eth )

Stops the receiver functions.

Parameters
eth ETH driver structure
Returns
None

Definition at line 874 of file IfxEth.c.

◆ IfxEth_TxDescr_getNext()

IFX_INLINE IfxEth_TxDescr * IfxEth_TxDescr_getNext ( IfxEth_TxDescr * descr )

Get pointer to next TX descriptor.

Parameters
descr descr Pointer to a TX descriptor
Returns
next Tx descriptor

Definition at line 1242 of file IfxEth.h.

Referenced by IfxEth_setupChecksumEngine(), and IfxEth_shuffleTxDescriptor().

◆ IfxEth_TxDescr_isAvailable()

IFX_INLINE boolean IfxEth_TxDescr_isAvailable ( IfxEth_TxDescr * descr )

Return TRUE if a TX descriptor is available for setup.

Parameters
descr pointer to descriptor

Definition at line 1248 of file IfxEth.h.

◆ IfxEth_TxDescr_setBuffer()

IFX_INLINE void IfxEth_TxDescr_setBuffer | ( | IfxEth_TxDescr * | descr,
 |  | void * | buffer
 | ) |  |

Set buffer of a TX descriptor.

Parameters
descr | Entdescr Pointer to a TX descriptorer_String_here
buffer | pointer to Buffer
Returns
None

Definition at line 1260 of file IfxEth.h.

Referenced by IfxEth_initTransmitDescriptors(), and IfxEth_setAndSendTransmitBuffer().

◆ IfxEth_updateTimeStamp()

IFX_INLINE void IfxEth_updateTimeStamp ( IfxEth * eth )

Updates the System time with specified values in SECONDS and NANOSECONDS registers.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1657 of file IfxEth.h.

◆ IfxEth_waitTransmitBuffer()

IFX_INLINE void * IfxEth_waitTransmitBuffer ( IfxEth * eth )

Waits for one TX buffer becomes available.

Parameters
eth ETH driver structure retval non NULL_PTR TX buffer is available at the address pointed by the returned value retval NULL_PTR TX buffer is busy.

Definition at line 1668 of file IfxEth.h.

◆ IfxEth_writeHeader()

IFX_EXTERN void IfxEth_writeHeader | ( | IfxEth * | eth,
 |  | uint8 * | txBuffer,
 |  | uint8 * | destinationAddress,
 |  | uint8 * | sourceAddress,
 |  | uint32 | packetSize
 | ) |  |

writes the header format into buffrer

Parameters
eth | ETH driver structure
txBuffer | pointer to tx buffer
destinationAddress | pointer to destination address
sourceAddress | pointer to source address
packetSize | size of the packet
Returns
None

Definition at line 930 of file IfxEth.c.


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » ETH » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE IfxEth_RxDescr * | IfxEth_RxDescr_getNext (IfxEth_RxDescr *descr)
Get pointer to next RX descriptor. More...
IFX_INLINE void | IfxEth_RxDescr_release (IfxEth_RxDescr *descr)
release RX descriptor More...
IFX_INLINE void | IfxEth_TxDescr_release (IfxEth_TxDescr *descr)
Release a TX descriptor for transmit queue. More...
IFX_INLINE void | IfxEth_clearMacConfiguration (void)
resets Ethernet Configuration register More...
IFX_INLINE IfxEth_RxDescr * | IfxEth_getActualRxDescriptor (IfxEth *eth)
Get pointer to actual RX descriptor. More...
IFX_INLINE uint32 | IfxEth_getActualRxIndex (IfxEth *eth)
IFX_INLINE IfxEth_TxDescr * | IfxEth_getActualTxDescriptor (IfxEth *eth)
Get pointer to actual TX descriptor. More...
IFX_INLINE IfxEth_RxDescr * | IfxEth_getBaseRxDescriptor (IfxEth *eth)
Get pointer to base RX descriptor. More...
IFX_INLINE IfxEth_TxDescr * | IfxEth_getBaseTxDescriptor (IfxEth *eth)
Get pointer to base TX descriptor. More...
IFX_INLINE boolean | IfxEth_getLoopbackMode (IfxEth *eth)
returns the status of th eloopback mode More...
IFX_INLINE void * | IfxEth_getMacAddressPointer (IfxEth *eth)
Returns pointer to the MAC address configured for this ETH. More...
IFX_INLINE IfxEth_ReceiveProcessState | IfxEth_getReceiveProcessState (IfxEth *eth)
returns the Receive Process State More...
IFX_INLINE uint16 | IfxEth_getRxDataLength (IfxEth *eth)
Returns length of the oldest available RX data. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEth_getSrcPointer (IfxEth *eth)
Returns the SRC pointer of Eth. More...
IFX_INLINE IfxEth_TransmitProcessState | IfxEth_getTransmitProcessState (IfxEth *eth)
returns the Transmit Process State More...
IFX_INLINE boolean | IfxEth_isEriInterrupt (IfxEth *eth)
Checks whether Early Receive interrupt is requested. More...
IFX_INLINE boolean | IfxEth_isLinkActive (IfxEth *eth)
Checks whether physical connection is active. More...
IFX_INLINE boolean | IfxEth_isNisInterrupt (IfxEth *eth)
Checks whether NIS interrupt is requested. More...
IFX_INLINE boolean | IfxEth_isRxChecksumError (IfxEth *eth)
IFX_INLINE boolean | IfxEth_isRxDataAvailable (IfxEth *eth)
Checks whether one or more RX data is available. More...
IFX_INLINE boolean | IfxEth_isRxInterrupt (IfxEth *eth)
Checks whether receive interrupt is requested. More...
IFX_INLINE boolean | IfxEth_isTuInterrupt (IfxEth *eth)
Checks whether Transmit Buffer Unavailable interrupt is requested. More...
IFX_INLINE boolean | IfxEth_isTxInterrupt (IfxEth *eth)
Checks whether transmit interrupt is requested. More...
IFX_INLINE void | IfxEth_readAllFlags (IfxEth *eth)
reads the status of all flags More...
IFX_EXTERN void | IfxEth_disableModule (void)
Disable ETH Module. More...
IFX_EXTERN void | IfxEth_enableModule (void)
Enable ETH Module. More...
IFX_EXTERN void * | IfxEth_getReceiveBuffer (IfxEth *eth)
Gets receive buffer
note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffer has been processed. More...
IFX_EXTERN void * | IfxEth_getTransmitBuffer (IfxEth *eth)
Get a free transmit buffer. More...
IFX_EXTERN void | IfxEth_readMacAddress (IfxEth *eth, uint8 *macAddress)
Reads the MAC address from module register. More...
IFX_EXTERN void | IfxEth_resetModule (void)
resets Ethernet kernel More...
IFX_EXTERN void | IfxEth_setAndSendTransmitBuffer (IfxEth *eth, void *buffer, uint16 len)
IFX_EXTERN void | IfxEth_setupChecksumEngine (IfxEth *eth, IfxEth_ChecksumMode mode)
Set up checksum Engine. More...
IFX_EXTERN void | IfxEth_shuffleRxDescriptor (IfxEth *eth)
Shuffle to next RX descriptor. More...
IFX_EXTERN void | IfxEth_shuffleTxDescriptor (IfxEth *eth)
Shuffle to next TX descriptor. More...
IFX_EXTERN void | IfxEth_startTransmitter (IfxEth *eth)
Start the transmitter functions. More...
IFX_EXTERN void | IfxEth_stopTransmitter (IfxEth *eth)
Stop the transmitter functions. More...
IFX_EXTERN void | IfxEth_wakeupReceiver (IfxEth *eth)
Wakeup the receiver functions. More...
IFX_EXTERN void | IfxEth_wakeupTransmitter (IfxEth *eth)
Wakeup the transmitter functions. More...

Detailed Description

Function Documentation

◆ IfxEth_clearMacConfiguration()

IFX_INLINE void IfxEth_clearMacConfiguration ( void )

resets Ethernet Configuration register

Returns
None

Definition at line 1292 of file IfxEth.h.

◆ IfxEth_disableModule()

IFX_EXTERN void IfxEth_disableModule ( void )

Disable ETH Module.

Returns
None

Definition at line 64 of file IfxEth.c.

◆ IfxEth_enableModule()

IFX_EXTERN void IfxEth_enableModule ( void )

Enable ETH Module.

Returns
None

Definition at line 73 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_getActualRxDescriptor()

IFX_INLINE IfxEth_RxDescr * IfxEth_getActualRxDescriptor ( IfxEth * eth )

Get pointer to actual RX descriptor.

Parameters
eth eth ETH driver structure

Definition at line 1382 of file IfxEth.h.

Referenced by IfxEth_freeReceiveBuffer(), IfxEth_getReceiveBuffer(), IfxEth_getRxDataLength(), IfxEth_isRxChecksumError(), and IfxEth_isRxDataAvailable().

◆ IfxEth_getActualRxIndex()

IFX_INLINE uint32 IfxEth_getActualRxIndex ( IfxEth * eth )

Definition at line 1388 of file IfxEth.h.

◆ IfxEth_getActualTxDescriptor()

IFX_INLINE IfxEth_TxDescr * IfxEth_getActualTxDescriptor ( IfxEth * eth )

Get pointer to actual TX descriptor.

Parameters
eth eth ETH driver structure

Definition at line 1395 of file IfxEth.h.

Referenced by IfxEth_getTransmitBuffer(), IfxEth_sendTransmitBuffer(), IfxEth_sendTransmitBuffersRingMode(), and IfxEth_setAndSendTransmitBuffer().

◆ IfxEth_getBaseRxDescriptor()

IFX_INLINE IfxEth_RxDescr * IfxEth_getBaseRxDescriptor ( IfxEth * eth )

Get pointer to base RX descriptor.

Parameters
eth eth ETH driver structure

Definition at line 1401 of file IfxEth.h.

Referenced by IfxEth_getActualRxIndex(), IfxEth_initReceiveDescriptors(), IfxEth_initReceiveDescriptorsRingMode(), and IfxEth_shuffleRxDescriptor().

◆ IfxEth_getBaseTxDescriptor()

IFX_INLINE IfxEth_TxDescr * IfxEth_getBaseTxDescriptor ( IfxEth * eth )

Get pointer to base TX descriptor.

Parameters
eth eth ETH driver structure

Definition at line 1407 of file IfxEth.h.

Referenced by IfxEth_initTransmitDescriptors(), IfxEth_initTransmitDescriptorsRingMode(), IfxEth_setupChecksumEngine(), and IfxEth_shuffleTxDescriptor().

◆ IfxEth_getLoopbackMode()

IFX_INLINE boolean IfxEth_getLoopbackMode ( IfxEth * eth )

returns the status of th eloopback mode

Parameters
eth ETH driver structure
Returns
Loop back mode status (TRUE / FALSE)

Definition at line 1413 of file IfxEth.h.

◆ IfxEth_getMacAddressPointer()

IFX_INLINE void * IfxEth_getMacAddressPointer ( IfxEth * eth )

Returns pointer to the MAC address configured for this ETH.

Parameters
eth ETH driver structure

Definition at line 1420 of file IfxEth.h.

◆ IfxEth_getReceiveBuffer()

IFX_EXTERN void* IfxEth_getReceiveBuffer ( IfxEth * eth )

Gets receive buffer
note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffer has been processed.

Parameters
eth ETH driver structure
Returns
retval NULL_PTR no received frame retval !NULL_PTR a frame has been received

Definition at line 92 of file IfxEth.c.

◆ IfxEth_getReceiveProcessState()

IFX_INLINE IfxEth_ReceiveProcessState IfxEth_getReceiveProcessState ( IfxEth * eth )

returns the Receive Process State

Parameters
eth ETH driver structure
Returns
Receive Process State

Definition at line 1426 of file IfxEth.h.

◆ IfxEth_getRxDataLength()

IFX_INLINE uint16 IfxEth_getRxDataLength ( IfxEth * eth )

Returns length of the oldest available RX data.

Parameters
eth ETH driver structure
Returns
Data length

Definition at line 1433 of file IfxEth.h.

◆ IfxEth_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEth_getSrcPointer ( IfxEth * eth )

Returns the SRC pointer of Eth.

Parameters
eth ETH driver structure
Returns
pointer to ETH SRCR register

Definition at line 1446 of file IfxEth.h.

◆ IfxEth_getTransmitBuffer()

IFX_EXTERN void* IfxEth_getTransmitBuffer ( IfxEth * eth )

Get a free transmit buffer.

Parameters
eth ETH driver structure
Returns
retval NULL_PTR no free transmit buffer is available retval !NULL_PTR a free transmit buffer is available

Definition at line 110 of file IfxEth.c.

Referenced by IfxEth_waitTransmitBuffer().

◆ IfxEth_getTransmitProcessState()

IFX_INLINE IfxEth_TransmitProcessState IfxEth_getTransmitProcessState ( IfxEth * eth )

returns the Transmit Process State

Parameters
eth ETH driver structure
Returns
Transmit Process State

Definition at line 1467 of file IfxEth.h.

◆ IfxEth_isEriInterrupt()

IFX_INLINE boolean IfxEth_isEriInterrupt ( IfxEth * eth )

Checks whether Early Receive interrupt is requested.

Parameters
eth ETH driver structure
Returns
TRUE/FALSE

Definition at line 1485 of file IfxEth.h.

◆ IfxEth_isLinkActive()

IFX_INLINE boolean IfxEth_isLinkActive ( IfxEth * eth )

Checks whether physical connection is active.

Parameters
eth ETH driver structure
Returns
retval zero Connection is inactive retval non zero Connection is active

Definition at line 1493 of file IfxEth.h.

◆ IfxEth_isNisInterrupt()

IFX_INLINE boolean IfxEth_isNisInterrupt ( IfxEth * eth )

Checks whether NIS interrupt is requested.

Parameters
eth ETH driver structure
Returns
TRUE/FALSE

Definition at line 1499 of file IfxEth.h.

◆ IfxEth_isRxChecksumError()

IFX_INLINE boolean IfxEth_isRxChecksumError ( IfxEth * eth )
Parameters
eth pointer to ETH driver structure

Definition at line 1507 of file IfxEth.h.

◆ IfxEth_isRxDataAvailable()

IFX_INLINE boolean IfxEth_isRxDataAvailable ( IfxEth * eth )

Checks whether one or more RX data is available.

Parameters
eth ETH driver structure
Returns
retval TRUE one or more RX data is available retval FALSE no RX data is available

Definition at line 1517 of file IfxEth.h.

Referenced by IfxEth_getReceiveBuffer(), and IfxEth_getRxDataLength().

◆ IfxEth_isRxInterrupt()

IFX_INLINE boolean IfxEth_isRxInterrupt ( IfxEth * eth )

Checks whether receive interrupt is requested.

Parameters
eth ETH driver structure
Returns
TRUE/FALSE

Definition at line 1524 of file IfxEth.h.

◆ IfxEth_isTuInterrupt()

IFX_INLINE boolean IfxEth_isTuInterrupt ( IfxEth * eth )

Checks whether Transmit Buffer Unavailable interrupt is requested.

Parameters
eth ETH driver structure
Returns
TRUE/FALSE

Definition at line 1539 of file IfxEth.h.

◆ IfxEth_isTxInterrupt()

IFX_INLINE boolean IfxEth_isTxInterrupt ( IfxEth * eth )

Checks whether transmit interrupt is requested.

Parameters
eth ETH driver structure
Returns
TRUE/FALSE

Definition at line 1547 of file IfxEth.h.

◆ IfxEth_readAllFlags()

IFX_INLINE void IfxEth_readAllFlags ( IfxEth * eth )

reads the status of all flags

Parameters
eth ETH driver structure
Returns
None

Definition at line 1555 of file IfxEth.h.

◆ IfxEth_readMacAddress()

IFX_EXTERN void IfxEth_readMacAddress | ( | IfxEth * | eth,
 |  | uint8 * | macAddress
 | ) |  |

Reads the MAC address from module register.

Parameters
eth | ETH driver structure
macAddress | MAC address
Returns
None

Definition at line 519 of file IfxEth.c.

◆ IfxEth_resetModule()

IFX_EXTERN void IfxEth_resetModule ( void )

resets Ethernet kernel

Returns
None

Definition at line 527 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_RxDescr_getNext()

IFX_INLINE IfxEth_RxDescr * IfxEth_RxDescr_getNext ( IfxEth_RxDescr * descr )

Get pointer to next RX descriptor.

Parameters
descr descr Pointer to an RX descriptor
Returns
next RX descriptor

Definition at line 1224 of file IfxEth.h.

Referenced by IfxEth_shuffleRxDescriptor().

◆ IfxEth_RxDescr_release()

IFX_INLINE void IfxEth_RxDescr_release ( IfxEth_RxDescr * descr )

release RX descriptor

Parameters
descr pointer to Rx descriptor
Returns
None

Definition at line 1230 of file IfxEth.h.

Referenced by IfxEth_freeReceiveBuffer().

◆ IfxEth_setAndSendTransmitBuffer()

IFX_EXTERN void IfxEth_setAndSendTransmitBuffer | ( | IfxEth * | eth,
 |  | void * | buffer,
 |  | uint16 | len
 | ) |  |
Parameters
eth | pointer to ETH driver structure
len | length of buffer
Returns
None

Definition at line 583 of file IfxEth.c.

◆ IfxEth_setupChecksumEngine()

IFX_EXTERN void IfxEth_setupChecksumEngine | ( | IfxEth * | eth,
 |  | IfxEth_ChecksumMode | mode
 | ) |  |

Set up checksum Engine.

Parameters
eth | eth ETH driver structure
mode | specifies checksum mode
Returns
None

Definition at line 607 of file IfxEth.c.

◆ IfxEth_shuffleRxDescriptor()

IFX_EXTERN void IfxEth_shuffleRxDescriptor ( IfxEth * eth )

Shuffle to next RX descriptor.

Parameters
eth eth ETH driver structure
Returns
None

Definition at line 819 of file IfxEth.c.

Referenced by IfxEth_freeReceiveBuffer().

◆ IfxEth_shuffleTxDescriptor()

IFX_EXTERN void IfxEth_shuffleTxDescriptor ( IfxEth * eth )

Shuffle to next TX descriptor.

Parameters
eth eth ETH driver structure
Returns
None

Definition at line 836 of file IfxEth.c.

Referenced by IfxEth_sendTransmitBuffer(), and IfxEth_sendTransmitBuffersRingMode().

◆ IfxEth_startTransmitter()

IFX_EXTERN void IfxEth_startTransmitter ( IfxEth * eth )

Start the transmitter functions.

Parameters
eth eth ETH driver structure
Returns
None

Definition at line 864 of file IfxEth.c.

Referenced by IfxEth_wakeupTransmitter().

◆ IfxEth_stopTransmitter()

IFX_EXTERN void IfxEth_stopTransmitter ( IfxEth * eth )

Stop the transmitter functions.

Parameters
eth eth ETH driver structure
Returns
None

Definition at line 884 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_TxDescr_release()

IFX_INLINE void IfxEth_TxDescr_release ( IfxEth_TxDescr * descr )

Release a TX descriptor for transmit queue.

Parameters
descr Enter_String_herdescr Pointer to a TX descriptore
Returns
None

Definition at line 1254 of file IfxEth.h.

◆ IfxEth_wakeupReceiver()

IFX_EXTERN void IfxEth_wakeupReceiver ( IfxEth * eth )

Wakeup the receiver functions.

Parameters
eth eth ETH driver structure
Returns
None

Definition at line 894 of file IfxEth.c.

Referenced by IfxEth_getReceiveBuffer().

◆ IfxEth_wakeupTransmitter()

IFX_EXTERN void IfxEth_wakeupTransmitter ( IfxEth * eth )

Wakeup the transmitter functions.

Parameters
eth eth ETH driver structure
Returns
None

Definition at line 911 of file IfxEth.c.

Referenced by IfxEth_sendTransmitBuffer(), and IfxEth_sendTransmitBuffersRingMode().


iLLD_TC26B: Initialisation Functions

Functions
Initialisation Functions
iLLD » ETH » Standard Driver
Collaboration diagram for Initialisation Functions:

Functions

IFX_INLINE void | IfxEth_TxDescr_setup (IfxEth_TxDescr *descr, uint16 length, boolean firstSegment, boolean lastSegment)
Setup some properties of a TX descriptor. More...
IFX_INLINE void | IfxEth_setReceiveBuffer1RingMode (IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
Sets the receive buffer1 of the receive descriptor along with its size. More...
IFX_INLINE void | IfxEth_setReceiveBuffer2RingMode (IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
Sets the receive buffer2 of the receive descriptor along with its size. More...
IFX_INLINE void | IfxEth_setTransmitBuffer1RingMode (IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
Sets the transmit buffer1 of the receive descriptor along with its size. More...
IFX_INLINE void | IfxEth_setTransmitBuffer2RingMode (IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
Sets the transmit buffer2 of the receive descriptor along with its size. More...
IFX_EXTERN void | IfxEth_init (IfxEth *eth, const IfxEth_Config *config)
Initialises the driver. More...
IFX_EXTERN void | IfxEth_initConfig (IfxEth_Config *config, Ifx_ETH *ethSfr)
Initialises the configuration Structure. More...
IFX_EXTERN void | IfxEth_initReceiveDescriptors (IfxEth *eth)
Initialises the receive descriptors. More...
IFX_EXTERN void | IfxEth_initReceiveDescriptorsRingMode (IfxEth *eth, const IfxEth_RingModeRxBuffersConfig *config)
Initialises the receive descriptors. More...
IFX_EXTERN void | IfxEth_initTransmitDescriptors (IfxEth *eth)
Initialises transmit descriptors. More...
IFX_EXTERN void | IfxEth_initTransmitDescriptorsRingMode (IfxEth *eth, const IfxEth_RingModeTxBuffersConfig *config)
Initialises transmit descriptors. More...
IFX_EXTERN void | IfxEth_setupMiiInputPins (IfxEth *eth, const IfxEth_MiiPins *miiPins)
Set up MII mode input pins. More...
IFX_EXTERN void | IfxEth_setupMiiOutputPins (IfxEth *eth, const IfxEth_MiiPins *miiPins)
setup MII mode output pins More...
IFX_EXTERN void | IfxEth_setupRmiiInputPins (IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
Set up input pins. More...
IFX_EXTERN void | IfxEth_setupRmiiOutputPins (IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
set output pin of port More...

Detailed Description

Function Documentation

◆ IfxEth_init()

IFX_EXTERN void IfxEth_init | ( | IfxEth * | eth,
 |  | const IfxEth_Config * | config
 | ) |  |

Initialises the driver.

Parameters
eth | ETH driver structure
config | ETH configuration structure
Returns
None

Definition at line 125 of file IfxEth.c.

◆ IfxEth_initConfig()

IFX_EXTERN void IfxEth_initConfig | ( | IfxEth_Config * | config,
 |  | Ifx_ETH * | ethSfr
 | ) |  |

Initialises the configuration Structure.

Parameters
config | ETH configuration structure
ethSfr | Pointer to register base
Returns
None

Definition at line 263 of file IfxEth.c.

◆ IfxEth_initReceiveDescriptors()

IFX_EXTERN void IfxEth_initReceiveDescriptors ( IfxEth * eth )

Initialises the receive descriptors.

Parameters
eth ETH driver structure
Returns
None

Definition at line 301 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_initReceiveDescriptorsRingMode()

IFX_EXTERN void IfxEth_initReceiveDescriptorsRingMode | ( | IfxEth * | eth,
 |  | const IfxEth_RingModeRxBuffersConfig * | config
 | ) |  |

Initialises the receive descriptors.

Parameters
eth | ETH driver structure
config | Ring mode Rx buffers configuration
Returns
None

Definition at line 347 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_initTransmitDescriptors()

IFX_EXTERN void IfxEth_initTransmitDescriptors ( IfxEth * eth )

Initialises transmit descriptors.

Parameters
eth pointer to ETH driver structure
Returns
None

Definition at line 411 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_initTransmitDescriptorsRingMode()

IFX_EXTERN void IfxEth_initTransmitDescriptorsRingMode | ( | IfxEth * | eth,
 |  | const IfxEth_RingModeTxBuffersConfig * | config
 | ) |  |

Initialises transmit descriptors.

Parameters
eth | pointer to ETH driver structure
config | Ring mode Tx buffers configuration
Returns
None

Definition at line 455 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_setReceiveBuffer1RingMode()

IFX_INLINE void IfxEth_setReceiveBuffer1RingMode | ( | IfxEth * | eth,
 |  | IfxEth_RxDescr * | descr,
 |  | uint32 | address,
 |  | uint16 | size
 | ) |  |

Sets the receive buffer1 of the receive descriptor along with its size.

Parameters
eth | ETH driver structure
descr | Pointer to Rx descreptor
address | Buffer 1 start address
size | Buffer 1 size
Returns
None

Definition at line 1596 of file IfxEth.h.

Referenced by IfxEth_initReceiveDescriptorsRingMode().

◆ IfxEth_setReceiveBuffer2RingMode()

IFX_INLINE void IfxEth_setReceiveBuffer2RingMode | ( | IfxEth * | eth,
 |  | IfxEth_RxDescr * | descr,
 |  | uint32 | address,
 |  | uint16 | size
 | ) |  |

Sets the receive buffer2 of the receive descriptor along with its size.

Parameters
eth | ETH driver structure
descr | Pointer to Rx descreptor
address | Buffer 1 start address
size | Buffer 1 size
Returns
None

Definition at line 1603 of file IfxEth.h.

Referenced by IfxEth_initReceiveDescriptorsRingMode().

◆ IfxEth_setTransmitBuffer1RingMode()

IFX_INLINE void IfxEth_setTransmitBuffer1RingMode | ( | IfxEth * | eth,
 |  | IfxEth_TxDescr * | descr,
 |  | uint32 | address,
 |  | uint16 | size
 | ) |  |

Sets the transmit buffer1 of the receive descriptor along with its size.

Parameters
eth | ETH driver structure
descr | Pointer to Tx descreptor
address | Buffer 1 start address
size | Buffer 1 size
Returns
None

Definition at line 1637 of file IfxEth.h.

Referenced by IfxEth_initTransmitDescriptorsRingMode().

◆ IfxEth_setTransmitBuffer2RingMode()

IFX_INLINE void IfxEth_setTransmitBuffer2RingMode | ( | IfxEth * | eth,
 |  | IfxEth_TxDescr * | descr,
 |  | uint32 | address,
 |  | uint16 | size
 | ) |  |

Sets the transmit buffer2 of the receive descriptor along with its size.

Parameters
eth | ETH driver structure
descr | Pointer to Tx descreptor
address | Buffer 1 start address
size | Buffer 1 size
Returns
None

Definition at line 1644 of file IfxEth.h.

Referenced by IfxEth_initTransmitDescriptorsRingMode().

◆ IfxEth_setupMiiInputPins()

IFX_EXTERN void IfxEth_setupMiiInputPins | ( | IfxEth * | eth,
 |  | const IfxEth_MiiPins * | miiPins
 | ) |  |

Set up MII mode input pins.

Parameters
eth | eth pointer to ETH driver structure
miiPins | pin of port to be set
Returns
None

Definition at line 628 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_setupMiiOutputPins()

IFX_EXTERN void IfxEth_setupMiiOutputPins | ( | IfxEth * | eth,
 |  | const IfxEth_MiiPins * | miiPins
 | ) |  |

setup MII mode output pins

Parameters
eth | eth pointer to ETH driver structure
miiPins | pin of port to be set
Returns
None

Definition at line 714 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_setupRmiiInputPins()

IFX_EXTERN void IfxEth_setupRmiiInputPins | ( | IfxEth * | eth,
 |  | const IfxEth_RmiiPins * | rmiiPins
 | ) |  |

Set up input pins.

Parameters
eth | eth pointer to ETH driver structure
rmiiPins | pin of port to be set
Returns
None

Definition at line 753 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_setupRmiiOutputPins()

IFX_EXTERN void IfxEth_setupRmiiOutputPins | ( | IfxEth * | eth,
 |  | const IfxEth_RmiiPins * | rmiiPins
 | ) |  |

set output pin of port

Parameters
eth | eth pointer to ETH driver structure
rmiiPins | pin of port to be set
Returns
None

Definition at line 785 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_TxDescr_setup()

IFX_INLINE void IfxEth_TxDescr_setup | ( | IfxEth_TxDescr * | descr,
 |  | uint16 | length,
 |  | boolean | firstSegment,
 |  | boolean | lastSegment
 | ) |  |

Setup some properties of a TX descriptor.

Parameters
descr | Enter_Sdescr Pointer to a TX descriptortring_here
length | specifies length of transmit descriptor
firstSegment | specifies first segment of frame
lastSegment | specifies last segment of frame
Returns
None

Definition at line 1266 of file IfxEth.h.


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » ETH » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxEth_ChecksumMode {
IfxEth_ChecksumMode_bypass = 0,
IfxEth_ChecksumMode_ipv4 = 1,
IfxEth_ChecksumMode_tcpUdpIcmpSegment = 2,
IfxEth_ChecksumMode_tcpUdpIcmpFull = 3
}
enum IfxEth_DescriptorMode {
IfxEth_DescriptorMode_chain,
IfxEth_DescriptorMode_ring
}
enum IfxEth_PhyInterfaceMode {
IfxEth_PhyInterfaceMode_mii,
IfxEth_PhyInterfaceMode_rmii
}
External Phy Interface RMII Mode. More...
enum IfxEth_ReceiveProcessState {
IfxEth_ReceiveProcessState_reset,
IfxEth_ReceiveProcessState_fetching,
IfxEth_ReceiveProcessState_none,
IfxEth_ReceiveProcessState_waiting,
IfxEth_ReceiveProcessState_suspended,
IfxEth_ReceiveProcessState_closing,
IfxEth_ReceiveProcessState_timestampWrite,
IfxEth_ReceiveProcessState_transfering
}
indicates the Receive DMA FSM state More...
enum IfxEth_RingModeBufferUsed {
IfxEth_RingModeBufferUsed_buffer1,
IfxEth_RingModeBufferUsed_buffer2,
IfxEth_RingModeBufferUsed_bothBuffers
}
Buffer(s) used in ring mode. More...
enum IfxEth_TransmitProcessState {
IfxEth_TransmitProcessState_reset,
IfxEth_TransmitProcessState_fetching,
IfxEth_TransmitProcessState_waiting,
IfxEth_TransmitProcessState_reading,
IfxEth_TransmitProcessState_timestampWrite,
IfxEth_TransmitProcessState_none,
IfxEth_TransmitProcessState_suspended,
IfxEth_TransmitProcessState_closing
}
indicates the Transmit DMA FSM state More...

Detailed Description

Enumeration Type Documentation

◆ IfxEth_ChecksumMode

enum IfxEth_ChecksumMode
Enumerator
IfxEth_ChecksumMode_bypass
IfxEth_ChecksumMode_ipv4
IfxEth_ChecksumMode_tcpUdpIcmpSegment
IfxEth_ChecksumMode_tcpUdpIcmpFull

Definition at line 104 of file IfxEth.h.

◆ IfxEth_DescriptorMode

enum IfxEth_DescriptorMode
Enumerator
IfxEth_DescriptorMode_chain | chain mode descriptors
IfxEth_DescriptorMode_ring | ring mode descriptors

Definition at line 112 of file IfxEth.h.

◆ IfxEth_PhyInterfaceMode

enum IfxEth_PhyInterfaceMode

External Phy Interface RMII Mode.

Enumerator
IfxEth_PhyInterfaceMode_mii | MII mode.
IfxEth_PhyInterfaceMode_rmii | RMII mode.

Definition at line 120 of file IfxEth.h.

◆ IfxEth_ReceiveProcessState

enum IfxEth_ReceiveProcessState

indicates the Receive DMA FSM state

Enumerator
IfxEth_ReceiveProcessState_reset | Stopped: Reset or Stop Receive Command issued.
IfxEth_ReceiveProcessState_fetching | Running: Fetching Receive Transfer Descriptor.
IfxEth_ReceiveProcessState_none | Reserved for future use.
IfxEth_ReceiveProcessState_waiting | Running: Waiting for receive packet.
IfxEth_ReceiveProcessState_suspended | Suspended: Receive Descriptor Unavailable.
IfxEth_ReceiveProcessState_closing | Running: Closing Receive Descriptor.
IfxEth_ReceiveProcessState_timestampWrite | TIME_STAMP write state.
IfxEth_ReceiveProcessState_transfering | Running: Transferring the receive packet data from receive buffer to host memory.

Definition at line 128 of file IfxEth.h.

◆ IfxEth_RingModeBufferUsed

enum IfxEth_RingModeBufferUsed

Buffer(s) used in ring mode.

Enumerator
IfxEth_RingModeBufferUsed_buffer1 | Buffer 1 used.
IfxEth_RingModeBufferUsed_buffer2 | Buffer 2 used.
IfxEth_RingModeBufferUsed_bothBuffers | BOth Buffers used.

Definition at line 142 of file IfxEth.h.

◆ IfxEth_TransmitProcessState

enum IfxEth_TransmitProcessState

indicates the Transmit DMA FSM state

Enumerator
IfxEth_TransmitProcessState_reset | Stopped; Reset or Stop Transmit Command issued.
IfxEth_TransmitProcessState_fetching | Running; Fetching Transmit Transfer Descriptor.
IfxEth_TransmitProcessState_waiting | Running; Waiting for status.
IfxEth_TransmitProcessState_reading | Running; Reading Data from host memory buffer and queuing it to transmit buffer (Tx FIFO)
IfxEth_TransmitProcessState_timestampWrite | TIME_STAMP write state.
IfxEth_TransmitProcessState_none | Reserved for future use.
IfxEth_TransmitProcessState_suspended | Suspended; Transmit Descriptor Unavailable or Transmit Buffer Underflow.
IfxEth_TransmitProcessState_closing | Running; Closing Transmit Descriptor.

Definition at line 151 of file IfxEth.h.


iLLD_TC26B: ETH Pin Mapping

Data Structures | Macros | Variables
ETH Pin Mapping
iLLD » ETH
Collaboration diagram for ETH Pin Mapping:

Data Structures

struct | IfxEth_Crs_In
CRS pin mapping structure. More...
struct | IfxEth_Crsdv_In
CRSDV pin mapping structure. More...
struct | IfxEth_Rxdv_In
RXDV pin mapping structure. More...
struct | IfxEth_Refclk_In
REFCLK pin mapping structure. More...
struct | IfxEth_Rxclk_In
RXCLK pin mapping structure. More...
struct | IfxEth_Txclk_In
TXCLK pin mapping structure. More...
struct | IfxEth_Rxd_In
RXD pin mapping structure. More...
struct | IfxEth_Col_In
COL pin mapping structure. More...
struct | IfxEth_Mdc_Out
MDC pin mapping structure. More...
struct | IfxEth_Mdio_InOut
MDIO pin mapping structure. More...
struct | IfxEth_Txd_Out
TXD pin mapping structure. More...
struct | IfxEth_Txen_Out
TXEN pin mapping structure. More...
struct | IfxEth_Txer_Out
TXER pin mapping structure. More...
struct | IfxEth_Rxer_In
RXER pin mapping structure. More...

Macros

#define | IFXETH_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS 1
#define | IFXETH_PINMAP_MDC_OUT_NUM_ITEMS 3
#define | IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS 7
#define | IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS 1
#define | IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS 1
#define | IFXETH_PINMAP_RXD_IN_NUM_ITEMS 1
#define | IFXETH_PINMAP_RXER_IN_NUM_ITEMS 2
#define | IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS 2
#define | IFXETH_PINMAP_TXD_OUT_NUM_ITEMS 2
#define | IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS 1

Variables

IFX_EXTERN IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN
ETH_CRSDVA: ETH input. More...
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT
ETH_MDC: ETH output. More...
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT
ETH_MDC: ETH output. More...
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT
ETH_MDC: ETH output. More...
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT
ETH_MDIOA: ETH input/output. More...
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT
ETH_MDIOD: ETH input/output. More...
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT
ETH_MDIO: ETH output (Not for production purposes) More...
IFX_EXTERN IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN
ETH_REFCLK: ETH input. More...
IFX_EXTERN IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN
ETH_RXCLKA: ETH input (Not for productive purposes) More...
IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN
ETH_RXD0: ETH input. More...
IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN
ETH_RXD1: ETH input. More...
IFX_EXTERN IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN
ETH_RXERB: ETH input. More...
IFX_EXTERN IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN
ETH_TXCLKB: ETH input (Not for productive purposes) More...
IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT
ETH_TXD0: ETH output. More...
IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT
ETH_TXD1: ETH output. More...
IFX_EXTERN IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT
ETH_TXEN: ETH output. More...
IFX_EXTERN const IfxEth_Crsdv_In * | IfxEth_Crsdv_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS]
IfxEth_Crsdv_In table. More...
IFX_EXTERN const IfxEth_Mdc_Out * | IfxEth_Mdc_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS]
IfxEth_Mdc_Out table. More...
IFX_EXTERN const IfxEth_Mdio_InOut * | IfxEth_Mdio_InOut_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
IfxEth_Mdio_InOut table. More...
IFX_EXTERN const IfxEth_Refclk_In * | IfxEth_Refclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS]
IfxEth_Refclk_In table. More...
IFX_EXTERN const IfxEth_Rxclk_In * | IfxEth_Rxclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS]
IfxEth_Rxclk_In table. More...
IFX_EXTERN const IfxEth_Rxd_In * | IfxEth_Rxd_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS]
IfxEth_Rxd_In table. More...
IFX_EXTERN const IfxEth_Rxer_In * | IfxEth_Rxer_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS]
IfxEth_Rxer_In table. More...
IFX_EXTERN const IfxEth_Txclk_In * | IfxEth_Txclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS]
IfxEth_Txclk_In table. More...
IFX_EXTERN const IfxEth_Txd_Out * | IfxEth_Txd_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS]
IfxEth_Txd_Out table. More...
IFX_EXTERN const IfxEth_Txen_Out * | IfxEth_Txen_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxEth_Txen_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxEth_Crs_In

struct IfxEth_Crs_In

CRS pin mapping structure.

Definition at line 56 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Crs_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEth_Crsdv_In

struct IfxEth_Crsdv_In

CRSDV pin mapping structure.

Definition at line 64 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Crsdv_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEth_Rxdv_In

struct IfxEth_Rxdv_In

RXDV pin mapping structure.

Definition at line 72 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Rxdv_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEth_Refclk_In

struct IfxEth_Refclk_In

REFCLK pin mapping structure.

Definition at line 80 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Refclk_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEth_Rxclk_In

struct IfxEth_Rxclk_In

RXCLK pin mapping structure.

Definition at line 88 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Rxclk_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEth_Txclk_In

struct IfxEth_Txclk_In

TXCLK pin mapping structure.

Definition at line 96 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Txclk_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEth_Rxd_In

struct IfxEth_Rxd_In

RXD pin mapping structure.

Definition at line 104 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Rxd_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEth_Col_In

struct IfxEth_Col_In

COL pin mapping structure.

Definition at line 112 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Col_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEth_Mdc_Out

struct IfxEth_Mdc_Out

MDC pin mapping structure.

Definition at line 120 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Mdc_Out:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxEth_Mdio_InOut

struct IfxEth_Mdio_InOut

MDIO pin mapping structure.

Definition at line 128 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Mdio_InOut:
[legend]
Data Fields
Ifx_RxSel | inSelect | Input multiplexer value.
Ifx_ETH * | module | Base address.
IfxPort_OutputIdx | outSelect | Port control code.
IfxPort_Pin | pin | Port pin.

◆ IfxEth_Txd_Out

struct IfxEth_Txd_Out

TXD pin mapping structure.

Definition at line 137 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Txd_Out:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxEth_Txen_Out

struct IfxEth_Txen_Out

TXEN pin mapping structure.

Definition at line 145 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Txen_Out:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxEth_Txer_Out

struct IfxEth_Txer_Out

TXER pin mapping structure.

Definition at line 153 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Txer_Out:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxEth_Rxer_In

struct IfxEth_Rxer_In

RXER pin mapping structure.

Definition at line 161 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Rxer_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

Macro Definition Documentation

◆ IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS

#define IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS 1

Definition at line 187 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_MDC_OUT_NUM_ITEMS

#define IFXETH_PINMAP_MDC_OUT_NUM_ITEMS 3

Definition at line 188 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS

#define IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS 7

Definition at line 189 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_NUM_MODULES

#define IFXETH_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 186 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS

#define IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS 1

Definition at line 190 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS

#define IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS 1

Definition at line 191 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_RXD_IN_NUM_ITEMS

#define IFXETH_PINMAP_RXD_IN_NUM_ITEMS 1

Definition at line 192 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_RXER_IN_NUM_ITEMS

#define IFXETH_PINMAP_RXER_IN_NUM_ITEMS 2

Definition at line 193 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS

#define IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS 2

Definition at line 194 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_TXD_OUT_NUM_ITEMS

#define IFXETH_PINMAP_TXD_OUT_NUM_ITEMS 2

Definition at line 195 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS

#define IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS 1

Definition at line 196 of file IfxEth_PinMap.h.

Variable Documentation

◆ IfxEth_Crsdv_In_pinTable

IFX_EXTERN const IfxEth_Crsdv_In* IfxEth_Crsdv_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS]

IfxEth_Crsdv_In table.

Definition at line 200 of file IfxEth_PinMap.h.

◆ IfxEth_CRSDVA_P11_11_IN

IFX_EXTERN IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN

ETH_CRSDVA: ETH input.

Definition at line 168 of file IfxEth_PinMap.h.

◆ IfxEth_Mdc_Out_pinTable

IFX_EXTERN const IfxEth_Mdc_Out* IfxEth_Mdc_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS]

IfxEth_Mdc_Out table.

Definition at line 203 of file IfxEth_PinMap.h.

◆ IfxEth_MDC_P02_8_OUT

IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT

ETH_MDC: ETH output.

Definition at line 169 of file IfxEth_PinMap.h.

◆ IfxEth_MDC_P21_0_OUT

IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT

ETH_MDC: ETH output.

Definition at line 170 of file IfxEth_PinMap.h.

◆ IfxEth_MDC_P21_2_OUT

IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT

ETH_MDC: ETH output.

Definition at line 171 of file IfxEth_PinMap.h.

◆ IfxEth_Mdio_InOut_pinTable

IFX_EXTERN const IfxEth_Mdio_InOut* IfxEth_Mdio_InOut_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS]

IfxEth_Mdio_InOut table.

Definition at line 206 of file IfxEth_PinMap.h.

◆ IfxEth_MDIO_P21_1_INOUT

IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT

ETH_MDIO: ETH output (Not for production purposes)

Definition at line 174 of file IfxEth_PinMap.h.

◆ IfxEth_MDIOA_P00_0_INOUT

IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT

ETH_MDIOA: ETH input/output.

Definition at line 172 of file IfxEth_PinMap.h.

◆ IfxEth_MDIOD_P21_3_INOUT

IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT

ETH_MDIOD: ETH input/output.

Definition at line 173 of file IfxEth_PinMap.h.

◆ IfxEth_Refclk_In_pinTable

IFX_EXTERN const IfxEth_Refclk_In* IfxEth_Refclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS]

IfxEth_Refclk_In table.

Definition at line 209 of file IfxEth_PinMap.h.

◆ IfxEth_REFCLK_P11_12_IN

IFX_EXTERN IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN

ETH_REFCLK: ETH input.

Definition at line 175 of file IfxEth_PinMap.h.

◆ IfxEth_Rxclk_In_pinTable

IFX_EXTERN const IfxEth_Rxclk_In* IfxEth_Rxclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS]

IfxEth_Rxclk_In table.

Definition at line 212 of file IfxEth_PinMap.h.

◆ IfxEth_RXCLKA_P11_12_IN

IFX_EXTERN IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN

ETH_RXCLKA: ETH input (Not for productive purposes)

Definition at line 176 of file IfxEth_PinMap.h.

◆ IfxEth_RXD0_P11_10_IN

IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN

ETH_RXD0: ETH input.

Definition at line 177 of file IfxEth_PinMap.h.

◆ IfxEth_RXD1_P11_9_IN

IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN

ETH_RXD1: ETH input.

Definition at line 178 of file IfxEth_PinMap.h.

◆ IfxEth_Rxd_In_pinTable

IFX_EXTERN const IfxEth_Rxd_In* IfxEth_Rxd_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS]

IfxEth_Rxd_In table.

Definition at line 215 of file IfxEth_PinMap.h.

◆ IfxEth_Rxer_In_pinTable

IFX_EXTERN const IfxEth_Rxer_In* IfxEth_Rxer_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS]

IfxEth_Rxer_In table.

Definition at line 218 of file IfxEth_PinMap.h.

◆ IfxEth_RXERB_P21_7_IN

IFX_EXTERN IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN

ETH_RXERB: ETH input.

Definition at line 179 of file IfxEth_PinMap.h.

◆ IfxEth_Txclk_In_pinTable

IFX_EXTERN const IfxEth_Txclk_In* IfxEth_Txclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS]

IfxEth_Txclk_In table.

Definition at line 221 of file IfxEth_PinMap.h.

◆ IfxEth_TXCLKB_P11_12_IN

IFX_EXTERN IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN

ETH_TXCLKB: ETH input (Not for productive purposes)

Definition at line 180 of file IfxEth_PinMap.h.

◆ IfxEth_TXD0_P11_3_OUT

IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT

ETH_TXD0: ETH output.

Definition at line 181 of file IfxEth_PinMap.h.

◆ IfxEth_TXD1_P11_2_OUT

IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT

ETH_TXD1: ETH output.

Definition at line 182 of file IfxEth_PinMap.h.

◆ IfxEth_Txd_Out_pinTable

IFX_EXTERN const IfxEth_Txd_Out* IfxEth_Txd_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS]

IfxEth_Txd_Out table.

Definition at line 224 of file IfxEth_PinMap.h.

◆ IfxEth_Txen_Out_pinTable

IFX_EXTERN const IfxEth_Txen_Out* IfxEth_Txen_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS]

IfxEth_Txen_Out table.

Definition at line 227 of file IfxEth_PinMap.h.

◆ IfxEth_TXEN_P11_6_OUT

IFX_EXTERN IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT

ETH_TXEN: ETH output.

Definition at line 183 of file IfxEth_PinMap.h.


iLLD_TC26B: PHY_PEF7071

Modules
PHY_PEF7071
iLLD » ETH
Collaboration diagram for PHY_PEF7071:

Modules

Functions

Detailed Description


iLLD_TC26B: Functions

Functions
Functions
iLLD » ETH » PHY_PEF7071
Collaboration diagram for Functions:

Functions

IFX_EXTERN uint32 | IfxEth_Phy_Pef7071_init (void)
IFX_EXTERN boolean | IfxEth_Phy_Pef7071_link (void)
IFX_EXTERN void | IfxEth_Phy_Pef7071_read_mdio_reg (uint32 layeraddr, uint32 regaddr, uint32 *pdata)
IFX_EXTERN void | IfxEth_Phy_Pef7071_write_mdio_reg (uint32 layeraddr, uint32 regaddr, uint32 data)
IFX_EXTERN void | IfxEth_Phy_Pef7071_write_mmd_indirect (uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Write the data into the MMD register of PHY. More...
IFX_EXTERN void | IfxEth_Phy_Pef7071_read_mmd_indirect (uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Read data from MMD register of PHY. More...

Detailed Description

Function Documentation

◆ IfxEth_Phy_Pef7071_init()

IFX_EXTERN uint32 IfxEth_Phy_Pef7071_init ( void )
Returns
Status

Definition at line 140 of file IfxEth_Phy_Pef7071.c.

◆ IfxEth_Phy_Pef7071_link()

IFX_EXTERN boolean IfxEth_Phy_Pef7071_link ( void )
Returns
Link status

Definition at line 178 of file IfxEth_Phy_Pef7071.c.

◆ IfxEth_Phy_Pef7071_read_mdio_reg()

IFX_EXTERN void IfxEth_Phy_Pef7071_read_mdio_reg | ( | uint32 | layeraddr,
 |  | uint32 | regaddr,
 |  | uint32 * | pdata
 | ) |  |
Returns
None

Definition at line 193 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_init(), IfxEth_Phy_Pef7071_link(), and IfxEth_Phy_Pef7071_read_mmd_indirect().

◆ IfxEth_Phy_Pef7071_read_mmd_indirect()

IFX_EXTERN void IfxEth_Phy_Pef7071_read_mmd_indirect | ( | uint32 | layeraddr,
 |  | uint32 | devaddr,
 |  | uint32 | regaddr,
 |  | uint32 | data
 | ) |  |

Read data from MMD register of PHY.

Parameters
layeraddr | physical layer address
devaddr | Device address in PHY
regaddr | Register address in PHY
data | Data from PHY register
Returns
None

Definition at line 230 of file IfxEth_Phy_Pef7071.c.

◆ IfxEth_Phy_Pef7071_write_mdio_reg()

IFX_EXTERN void IfxEth_Phy_Pef7071_write_mdio_reg | ( | uint32 | layeraddr,
 |  | uint32 | regaddr,
 |  | uint32 | data
 | ) |  |
Returns
None

Definition at line 205 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_init(), IfxEth_Phy_Pef7071_read_mmd_indirect(), and IfxEth_Phy_Pef7071_write_mmd_indirect().

◆ IfxEth_Phy_Pef7071_write_mmd_indirect()

IFX_EXTERN void IfxEth_Phy_Pef7071_write_mmd_indirect | ( | uint32 | layeraddr,
 |  | uint32 | devaddr,
 |  | uint32 | regaddr,
 |  | uint32 | data
 | ) |  |

Write the data into the MMD register of PHY.

Parameters
layeraddr | physical layer address
devaddr | Device address in PHY
regaddr | Register address in PHY
data | Data to be written
Returns
None

Definition at line 217 of file IfxEth_Phy_Pef7071.c.


iLLD_TC26B: IfxEth_cfg.h File Reference

  • _Impl
Macros
IfxEth_cfg.h File Reference
iLLD » ETH

ETH on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXETH_MAX_TIMEOUT_VALUE 1000
#define | IFXETH_NUM_MODULES (1)

Detailed Description

ETH on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEth_cfg.h.

Macro Definition Documentation

◆ IFXETH_MAX_TIMEOUT_VALUE

#define IFXETH_MAX_TIMEOUT_VALUE 1000

Definition at line 60 of file IfxEth_cfg.h.

Referenced by IfxEth_init().

◆ IFXETH_NUM_MODULES

#define IFXETH_NUM_MODULES (1)

Definition at line 62 of file IfxEth_cfg.h.


iLLD_TC26B: IfxEth_PinMap.c File Reference

  • _PinMap
Variables
IfxEth_PinMap.c File Reference
iLLD » ETH

ETH I/O map. More...

#include "IfxEth_PinMap.h"
Include dependency graph for IfxEth_PinMap.c:

Go to the source code of this file.

Variables

IfxEth_Crsdv_In | IfxEth_CRSDVA_P11_11_IN = {&MODULE_ETH, {&MODULE_P11,11}, Ifx_RxSel_a}
IfxEth_Mdc_Out | IfxEth_MDC_P02_8_OUT = {&MODULE_ETH, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt6}
IfxEth_Mdc_Out | IfxEth_MDC_P21_0_OUT = {&MODULE_ETH, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt6}
IfxEth_Mdc_Out | IfxEth_MDC_P21_2_OUT = {&MODULE_ETH, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt5}
IfxEth_Mdio_InOut | IfxEth_MDIOA_P00_0_INOUT = {&MODULE_ETH, {&MODULE_P00, 0}, Ifx_RxSel_a, IfxPort_OutputIdx_alt1}
IfxEth_Mdio_InOut | IfxEth_MDIOD_P21_3_INOUT = {&MODULE_ETH, {&MODULE_P21, 3}, Ifx_RxSel_d, IfxPort_OutputIdx_alt1}
IfxEth_Mdio_InOut | IfxEth_MDIO_P21_1_INOUT = {&MODULE_ETH, {&MODULE_P21, 1}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}
IfxEth_Refclk_In | IfxEth_REFCLK_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_a}
IfxEth_Rxclk_In | IfxEth_RXCLKA_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_a}
IfxEth_Rxd_In | IfxEth_RXD0_P11_10_IN = {&MODULE_ETH, {&MODULE_P11,10}, Ifx_RxSel_a}
IfxEth_Rxd_In | IfxEth_RXD1_P11_9_IN = {&MODULE_ETH, {&MODULE_P11, 9}, Ifx_RxSel_a}
IfxEth_Rxer_In | IfxEth_RXERB_P21_7_IN = {&MODULE_ETH, {&MODULE_P21, 7}, Ifx_RxSel_b}
IfxEth_Txclk_In | IfxEth_TXCLKB_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_b}
IfxEth_Txd_Out | IfxEth_TXD0_P11_3_OUT = {&MODULE_ETH, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt6}
IfxEth_Txd_Out | IfxEth_TXD1_P11_2_OUT = {&MODULE_ETH, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt6}
IfxEth_Txen_Out | IfxEth_TXEN_P11_6_OUT = {&MODULE_ETH, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt6}
const IfxEth_Crsdv_In * | IfxEth_Crsdv_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS]
const IfxEth_Mdc_Out * | IfxEth_Mdc_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS]
const IfxEth_Mdio_InOut * | IfxEth_Mdio_InOut_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
const IfxEth_Refclk_In * | IfxEth_Refclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS]
const IfxEth_Rxclk_In * | IfxEth_Rxclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS]
const IfxEth_Rxd_In * | IfxEth_Rxd_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS]
const IfxEth_Rxer_In * | IfxEth_Rxer_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS]
const IfxEth_Txclk_In * | IfxEth_Txclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS]
const IfxEth_Txd_Out * | IfxEth_Txd_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS]
const IfxEth_Txen_Out * | IfxEth_Txen_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS]

Detailed Description

ETH I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEth_PinMap.c.

Variable Documentation

◆ IfxEth_Crsdv_In_pinTable

const IfxEth_Crsdv_In* IfxEth_Crsdv_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxEth_CRSDVA_P11_11_IN
}
}
IfxEth_CRSDVA_P11_11_IN
IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN
Definition: IfxEth_PinMap.c:45

Definition at line 63 of file IfxEth_PinMap.c.

◆ IfxEth_CRSDVA_P11_11_IN

IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN = {&MODULE_ETH, {&MODULE_P11,11}, Ifx_RxSel_a}

Definition at line 45 of file IfxEth_PinMap.c.

◆ IfxEth_Mdc_Out_pinTable

const IfxEth_Mdc_Out* IfxEth_Mdc_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxEth_MDC_P02_8_OUT,
&IfxEth_MDC_P21_0_OUT,
&IfxEth_MDC_P21_2_OUT
}
}
IfxEth_MDC_P21_0_OUT
IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT
Definition: IfxEth_PinMap.c:47
IfxEth_MDC_P02_8_OUT
IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT
Definition: IfxEth_PinMap.c:46
IfxEth_MDC_P21_2_OUT
IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT
Definition: IfxEth_PinMap.c:48

Definition at line 69 of file IfxEth_PinMap.c.

◆ IfxEth_MDC_P02_8_OUT

IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT = {&MODULE_ETH, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt6}

Definition at line 46 of file IfxEth_PinMap.c.

◆ IfxEth_MDC_P21_0_OUT

IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT = {&MODULE_ETH, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt6}

Definition at line 47 of file IfxEth_PinMap.c.

◆ IfxEth_MDC_P21_2_OUT

IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT = {&MODULE_ETH, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt5}

Definition at line 48 of file IfxEth_PinMap.c.

◆ IfxEth_Mdio_InOut_pinTable

const IfxEth_Mdio_InOut* IfxEth_Mdio_InOut_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
Initial value:
= {
{
NULL_PTR,
&IfxEth_MDIOA_P00_0_INOUT,
NULL_PTR,
NULL_PTR,
NULL_PTR,
NULL_PTR,
&IfxEth_MDIO_P21_1_INOUT
}
}
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEth_MDIOA_P00_0_INOUT
IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT
Definition: IfxEth_PinMap.c:49
IfxEth_MDIO_P21_1_INOUT
IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT
Definition: IfxEth_PinMap.c:51

Definition at line 77 of file IfxEth_PinMap.c.

◆ IfxEth_MDIO_P21_1_INOUT

IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT = {&MODULE_ETH, {&MODULE_P21, 1}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}

Definition at line 51 of file IfxEth_PinMap.c.

◆ IfxEth_MDIOA_P00_0_INOUT

IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT = {&MODULE_ETH, {&MODULE_P00, 0}, Ifx_RxSel_a, IfxPort_OutputIdx_alt1}

Definition at line 49 of file IfxEth_PinMap.c.

◆ IfxEth_MDIOD_P21_3_INOUT

IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT = {&MODULE_ETH, {&MODULE_P21, 3}, Ifx_RxSel_d, IfxPort_OutputIdx_alt1}

Definition at line 50 of file IfxEth_PinMap.c.

◆ IfxEth_Refclk_In_pinTable

const IfxEth_Refclk_In* IfxEth_Refclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxEth_REFCLK_P11_12_IN
}
}
IfxEth_REFCLK_P11_12_IN
IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN
Definition: IfxEth_PinMap.c:52

Definition at line 89 of file IfxEth_PinMap.c.

◆ IfxEth_REFCLK_P11_12_IN

IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_a}

Definition at line 52 of file IfxEth_PinMap.c.

◆ IfxEth_Rxclk_In_pinTable

const IfxEth_Rxclk_In* IfxEth_Rxclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxEth_RXCLKA_P11_12_IN
}
}
IfxEth_RXCLKA_P11_12_IN
IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN
Definition: IfxEth_PinMap.c:53

Definition at line 95 of file IfxEth_PinMap.c.

◆ IfxEth_RXCLKA_P11_12_IN

IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_a}

Definition at line 53 of file IfxEth_PinMap.c.

◆ IfxEth_RXD0_P11_10_IN

IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN = {&MODULE_ETH, {&MODULE_P11,10}, Ifx_RxSel_a}

Definition at line 54 of file IfxEth_PinMap.c.

◆ IfxEth_RXD1_P11_9_IN

IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN = {&MODULE_ETH, {&MODULE_P11, 9}, Ifx_RxSel_a}

Definition at line 55 of file IfxEth_PinMap.c.

◆ IfxEth_Rxd_In_pinTable

const IfxEth_Rxd_In* IfxEth_Rxd_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxEth_RXD1_P11_9_IN
}
}
IfxEth_RXD1_P11_9_IN
IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN
Definition: IfxEth_PinMap.c:55

Definition at line 101 of file IfxEth_PinMap.c.

◆ IfxEth_Rxer_In_pinTable

const IfxEth_Rxer_In* IfxEth_Rxer_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS]
Initial value:
= {
{
NULL_PTR,
&IfxEth_RXERB_P21_7_IN
}
}
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEth_RXERB_P21_7_IN
IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN
Definition: IfxEth_PinMap.c:56

Definition at line 107 of file IfxEth_PinMap.c.

◆ IfxEth_RXERB_P21_7_IN

IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN = {&MODULE_ETH, {&MODULE_P21, 7}, Ifx_RxSel_b}

Definition at line 56 of file IfxEth_PinMap.c.

◆ IfxEth_Txclk_In_pinTable

const IfxEth_Txclk_In* IfxEth_Txclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS]
Initial value:
= {
{
NULL_PTR,
&IfxEth_TXCLKB_P11_12_IN
}
}
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEth_TXCLKB_P11_12_IN
IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN
Definition: IfxEth_PinMap.c:57

Definition at line 114 of file IfxEth_PinMap.c.

◆ IfxEth_TXCLKB_P11_12_IN

IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_b}

Definition at line 57 of file IfxEth_PinMap.c.

◆ IfxEth_TXD0_P11_3_OUT

IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT = {&MODULE_ETH, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt6}

Definition at line 58 of file IfxEth_PinMap.c.

◆ IfxEth_TXD1_P11_2_OUT

IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT = {&MODULE_ETH, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt6}

Definition at line 59 of file IfxEth_PinMap.c.

◆ IfxEth_Txd_Out_pinTable

const IfxEth_Txd_Out* IfxEth_Txd_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxEth_TXD1_P11_2_OUT,
&IfxEth_TXD0_P11_3_OUT
}
}
IfxEth_TXD0_P11_3_OUT
IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT
Definition: IfxEth_PinMap.c:58
IfxEth_TXD1_P11_2_OUT
IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT
Definition: IfxEth_PinMap.c:59

Definition at line 121 of file IfxEth_PinMap.c.

◆ IfxEth_Txen_Out_pinTable

const IfxEth_Txen_Out* IfxEth_Txen_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxEth_TXEN_P11_6_OUT
}
}
IfxEth_TXEN_P11_6_OUT
IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT
Definition: IfxEth_PinMap.c:60

Definition at line 128 of file IfxEth_PinMap.c.

◆ IfxEth_TXEN_P11_6_OUT

IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT = {&MODULE_ETH, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt6}

Definition at line 60 of file IfxEth_PinMap.c.


iLLD_TC26B: IfxEth_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxEth_PinMap.h File Reference
iLLD » ETH

ETH I/O map. More...

#include <IfxEth_reg.h>
#include <_Impl/IfxEth_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxEth_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxEth_Crs_In
CRS pin mapping structure. More...
struct | IfxEth_Crsdv_In
CRSDV pin mapping structure. More...
struct | IfxEth_Rxdv_In
RXDV pin mapping structure. More...
struct | IfxEth_Refclk_In
REFCLK pin mapping structure. More...
struct | IfxEth_Rxclk_In
RXCLK pin mapping structure. More...
struct | IfxEth_Txclk_In
TXCLK pin mapping structure. More...
struct | IfxEth_Rxd_In
RXD pin mapping structure. More...
struct | IfxEth_Col_In
COL pin mapping structure. More...
struct | IfxEth_Mdc_Out
MDC pin mapping structure. More...
struct | IfxEth_Mdio_InOut
MDIO pin mapping structure. More...
struct | IfxEth_Txd_Out
TXD pin mapping structure. More...
struct | IfxEth_Txen_Out
TXEN pin mapping structure. More...
struct | IfxEth_Txer_Out
TXER pin mapping structure. More...
struct | IfxEth_Rxer_In
RXER pin mapping structure. More...

Macros

#define | IFXETH_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS 1
#define | IFXETH_PINMAP_MDC_OUT_NUM_ITEMS 3
#define | IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS 7
#define | IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS 1
#define | IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS 1
#define | IFXETH_PINMAP_RXD_IN_NUM_ITEMS 1
#define | IFXETH_PINMAP_RXER_IN_NUM_ITEMS 2
#define | IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS 2
#define | IFXETH_PINMAP_TXD_OUT_NUM_ITEMS 2
#define | IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS 1

Variables

IFX_EXTERN IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN
ETH_CRSDVA: ETH input. More...
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT
ETH_MDC: ETH output. More...
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT
ETH_MDC: ETH output. More...
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT
ETH_MDC: ETH output. More...
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT
ETH_MDIOA: ETH input/output. More...
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT
ETH_MDIOD: ETH input/output. More...
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT
ETH_MDIO: ETH output (Not for production purposes) More...
IFX_EXTERN IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN
ETH_REFCLK: ETH input. More...
IFX_EXTERN IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN
ETH_RXCLKA: ETH input (Not for productive purposes) More...
IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN
ETH_RXD0: ETH input. More...
IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN
ETH_RXD1: ETH input. More...
IFX_EXTERN IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN
ETH_RXERB: ETH input. More...
IFX_EXTERN IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN
ETH_TXCLKB: ETH input (Not for productive purposes) More...
IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT
ETH_TXD0: ETH output. More...
IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT
ETH_TXD1: ETH output. More...
IFX_EXTERN IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT
ETH_TXEN: ETH output. More...
IFX_EXTERN const IfxEth_Crsdv_In * | IfxEth_Crsdv_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS]
IfxEth_Crsdv_In table. More...
IFX_EXTERN const IfxEth_Mdc_Out * | IfxEth_Mdc_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS]
IfxEth_Mdc_Out table. More...
IFX_EXTERN const IfxEth_Mdio_InOut * | IfxEth_Mdio_InOut_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
IfxEth_Mdio_InOut table. More...
IFX_EXTERN const IfxEth_Refclk_In * | IfxEth_Refclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS]
IfxEth_Refclk_In table. More...
IFX_EXTERN const IfxEth_Rxclk_In * | IfxEth_Rxclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS]
IfxEth_Rxclk_In table. More...
IFX_EXTERN const IfxEth_Rxd_In * | IfxEth_Rxd_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS]
IfxEth_Rxd_In table. More...
IFX_EXTERN const IfxEth_Rxer_In * | IfxEth_Rxer_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS]
IfxEth_Rxer_In table. More...
IFX_EXTERN const IfxEth_Txclk_In * | IfxEth_Txclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS]
IfxEth_Txclk_In table. More...
IFX_EXTERN const IfxEth_Txd_Out * | IfxEth_Txd_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS]
IfxEth_Txd_Out table. More...
IFX_EXTERN const IfxEth_Txen_Out * | IfxEth_Txen_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxEth_Txen_Out table. More...

Detailed Description

ETH I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEth_PinMap.h.


iLLD_TC26B: IfxEth_Phy_Pef7071.h File Reference

  • Eth
  • Phy_Pef7071
Functions | Variables
IfxEth_Phy_Pef7071.h File Reference
iLLD » ETH

ETH PHY_PEF7071 details. More...

#include "Eth/Std/IfxEth.h"
Include dependency graph for IfxEth_Phy_Pef7071.h:

Go to the source code of this file.

Functions

IFX_EXTERN uint32 | IfxEth_Phy_Pef7071_init (void)
IFX_EXTERN boolean | IfxEth_Phy_Pef7071_link (void)
IFX_EXTERN void | IfxEth_Phy_Pef7071_read_mdio_reg (uint32 layeraddr, uint32 regaddr, uint32 *pdata)
IFX_EXTERN void | IfxEth_Phy_Pef7071_write_mdio_reg (uint32 layeraddr, uint32 regaddr, uint32 data)
IFX_EXTERN void | IfxEth_Phy_Pef7071_write_mmd_indirect (uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Write the data into the MMD register of PHY. More...
IFX_EXTERN void | IfxEth_Phy_Pef7071_read_mmd_indirect (uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Read data from MMD register of PHY. More...

Variables

IFX_EXTERN uint32 IfxEth_Phy_Pef7071_iPhyInitDone

Detailed Description

ETH PHY_PEF7071 details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEth_Phy_Pef7071.h.

Variable Documentation

◆ IfxEth_Phy_Pef7071_iPhyInitDone

IFX_EXTERN uint32 IfxEth_Phy_Pef7071_iPhyInitDone

Definition at line 106 of file IfxEth_Phy_Pef7071.h.


iLLD_TC26B: IfxEth.h File Reference

  • Eth
  • Std
Data Structures | Macros | Enumerations | Functions | Variables
IfxEth.h File Reference
iLLD » ETH

ETH basic functionality. More...

#include "_Impl/IfxEth_cfg.h"
#include "Cpu/Std/Ifx_Types.h"
#include "IfxEth_reg.h"
#include "IfxEth_bf.h"
#include "_PinMap/IfxEth_PinMap.h"
#include "Src/Std/IfxSrc.h"
#include "Scu/Std/IfxScuWdt.h"
#include "_Utilities/Ifx_Assert.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxEth.h:

Go to the source code of this file.

Data Structures

struct | IfxEth_AltRxDescr0_Bits
Structure for Alternate/Enhanced RX descriptor DWORD 0 Bit field access. More...
struct | IfxEth_AltRxDescr1_Bits
Structure for Alternate/Enhanced RX descriptor DWORD 1 Bit field access. More...
struct | IfxEth_AltTxDescr0_Bits
Structure for Alternate/Enhanced TX descriptor DWORD 0 Bit field access. More...
struct | IfxEth_AltTxDescr1_Bits
Structure for Alternate/Enhanced TX descriptor DWORD 1 Bit field access. More...
union | IfxEth_RxDescr0
Union for RX descriptor DWORD 0. More...
union | IfxEth_RxDescr1
Union for RX descriptor DWORD 1. More...
union | IfxEth_RxDescr2
Union for RX descriptor DWORD 2. More...
union | IfxEth_RxDescr3
Union for RX descriptor DWORD 3. More...
union | IfxEth_TxDescr0
Union for TX descriptor DWORD 0. More...
union | IfxEth_TxDescr1
Union for TX descriptor DWORD 1. More...
union | IfxEth_TxDescr2
Union for TX descriptor DWORD 2. More...
union | IfxEth_TxDescr3
Union for TX descriptor DWORD 3. More...
struct | IfxEth_RingModeRxBuffersConfig
Configuration structure for Ring Mode Receive Buffers. More...
struct | IfxEth_RingModeTxBuffersConfig
Configuration structure for Ring Mode Transmit buffers. More...
struct | IfxEth_RxDescr
Normal RX descriptor. More...
struct | IfxEth_TxDescr
Normal TX descriptor. More...
struct | IfxEth_MiiPins
Port pins for MII mode configuration. More...
struct | IfxEth_RingModeBuffersConfig
Configuration structure for Ring Mode descriptors. More...
struct | IfxEth_RmiiPins
Port pins for RMII mode configuration. More...
union | IfxEth_RxDescrList
union | IfxEth_TxDescrList
struct | IfxEth_Config
ETH configuration structure. More...
struct | IfxEth
ETH driver structure. More...
struct | IfxEth_RxDescr0_Bits
Structure for RX descriptor DWORD 0 Bit field access. More...
struct | IfxEth_RxDescr1_Bits
Structure for RX descriptor DWORD 1 Bit field access. More...
struct | IfxEth_TxDescr0_Bits
Structure for TX descriptor DWORD 0 Bit field access. More...
struct | IfxEth_TxDescr1_Bits
Structure for TX descriptor DWORD 1 Bit field access. More...

Macros

#define | IFXETH_RTX_BUFFER_SIZE 1536
Size of one ethernet frame buffer. More...
#define | IFXETH_MAX_RX_BUFFERS 8
Rx buffers (ring mode) More...
#define | IFXETH_MAX_TX_BUFFERS 16
Tx buffers (ring mode) More...
#define | IFXETH_DESCR_SIZE 4
4 DWORDS (16 bytes) More...

Enumerations

enum IfxEth_ChecksumMode {
IfxEth_ChecksumMode_bypass = 0,
IfxEth_ChecksumMode_ipv4 = 1,
IfxEth_ChecksumMode_tcpUdpIcmpSegment = 2,
IfxEth_ChecksumMode_tcpUdpIcmpFull = 3
}
enum IfxEth_DescriptorMode {
IfxEth_DescriptorMode_chain,
IfxEth_DescriptorMode_ring
}
enum IfxEth_PhyInterfaceMode {
IfxEth_PhyInterfaceMode_mii,
IfxEth_PhyInterfaceMode_rmii
}
External Phy Interface RMII Mode. More...
enum IfxEth_ReceiveProcessState {
IfxEth_ReceiveProcessState_reset,
IfxEth_ReceiveProcessState_fetching,
IfxEth_ReceiveProcessState_none,
IfxEth_ReceiveProcessState_waiting,
IfxEth_ReceiveProcessState_suspended,
IfxEth_ReceiveProcessState_closing,
IfxEth_ReceiveProcessState_timestampWrite,
IfxEth_ReceiveProcessState_transfering
}
indicates the Receive DMA FSM state More...
enum IfxEth_RingModeBufferUsed {
IfxEth_RingModeBufferUsed_buffer1,
IfxEth_RingModeBufferUsed_buffer2,
IfxEth_RingModeBufferUsed_bothBuffers
}
Buffer(s) used in ring mode. More...
enum IfxEth_TransmitProcessState {
IfxEth_TransmitProcessState_reset,
IfxEth_TransmitProcessState_fetching,
IfxEth_TransmitProcessState_waiting,
IfxEth_TransmitProcessState_reading,
IfxEth_TransmitProcessState_timestampWrite,
IfxEth_TransmitProcessState_none,
IfxEth_TransmitProcessState_suspended,
IfxEth_TransmitProcessState_closing
}
indicates the Transmit DMA FSM state More...

Functions

IFX_INLINE void | IfxEth_RxDescr_setBuffer (IfxEth_RxDescr *descr, void *buffer)
Set buffer of an RX descriptor. More...
IFX_INLINE IfxEth_TxDescr * | IfxEth_TxDescr_getNext (IfxEth_TxDescr *descr)
Get pointer to next TX descriptor. More...
IFX_INLINE boolean | IfxEth_TxDescr_isAvailable (IfxEth_TxDescr *descr)
Return TRUE if a TX descriptor is available for setup. More...
IFX_INLINE void | IfxEth_TxDescr_setBuffer (IfxEth_TxDescr *descr, void *buffer)
Set buffer of a TX descriptor. More...
IFX_INLINE void | IfxEth_applySoftwareReset (IfxEth *eth)
Applies the Software Reset. More...
IFX_INLINE void | IfxEth_clearEriInterrupt (IfxEth *eth)
Clear Early Receive Interrupt request. More...
IFX_INLINE void | IfxEth_clearRxInterrupt (IfxEth *eth)
Clear receive interrupt request. More...
IFX_INLINE void | IfxEth_clearTuInterrupt (IfxEth *eth)
Clear Transmit Buffer Unavailable request. More...
IFX_INLINE void | IfxEth_clearTxInterrupt (IfxEth *eth)
Clear transmit interrupt request. More...
IFX_INLINE void | IfxEth_disableTimeStampCoarseUpdate (IfxEth *eth)
Disables Timestamp Fine or Coarse Update. More...
IFX_INLINE void | IfxEth_disableTimeStampForIpv4Frames (IfxEth *eth)
Disables Processing of PTP frames sent over IPV4 UDP. More...
IFX_INLINE void | IfxEth_enableMmcCounter (IfxEth *eth)
Enables theMMC counter. More...
IFX_INLINE void | IfxEth_enableTimeStamp (IfxEth *eth)
Enables the TimeStamp. More...
IFX_INLINE void | IfxEth_enableTimeStampCoarseUpdate (IfxEth *eth)
Enables Timestamp Fine or Coarse Update. More...
IFX_INLINE void | IfxEth_enableTimeStampForAllFrames (IfxEth *eth)
Enables the TimeStamp for All frames. More...
IFX_INLINE void | IfxEth_enableTimeStampForEthFrames (IfxEth *eth)
Enables Processing of PTP over Ethernet Frames. More...
IFX_INLINE void | IfxEth_enableTimeStampForIpv4Frames (IfxEth *eth)
Enables Processing of PTP frames sent over IPV4 UDP. More...
IFX_INLINE void | IfxEth_enableTimeStampForVer2Format (IfxEth *eth)
Enables PTP packet Processing for Version 2 Format. More...
IFX_INLINE boolean | IfxEth_getTimeStampInitialiseStatus (IfxEth *eth)
returns the status of the TimeStamp Initialisation More...
IFX_INLINE boolean | IfxEth_getTimeStampUpdateStatus (IfxEth *eth)
returns the status of the System Time updation More...
IFX_INLINE void | IfxEth_initialiseTimeStamp (IfxEth *eth)
Initialises the TimeStamp. More...
IFX_INLINE boolean | IfxEth_isSoftwareResetDone (IfxEth *eth)
Returns the status of Software Reset. More...
IFX_INLINE void | IfxEth_setAddToTimeUpdate (IfxEth *eth)
Sets addition, the time value is added with the contents of the update register. More...
IFX_INLINE void | IfxEth_setBinaryRolloverControl (IfxEth *eth, boolean enabled)
Enable/Disables Timestamp Digital or Binary Rollover Control. More...
IFX_INLINE void | IfxEth_setLoopbackMode (IfxEth *eth, boolean loopbackMode)
Sets the loopback mode. More...
IFX_INLINE void | IfxEth_setNanoSecondsUpdateValue (IfxEth *eth, uint8 value)
Sets the time in sub seconds representation, to be initialized or added to the system time. More...
IFX_INLINE void | IfxEth_setPhyInterfaceMode (IfxEth *eth, IfxEth_PhyInterfaceMode mode)
Sets the Phy Interface mode. More...
IFX_INLINE void | IfxEth_setReceiveDescriptorAddress (Ifx_ETH *eth, void *address)
Sets receive descriptor address. More...
IFX_INLINE void | IfxEth_setSecondsUpdateValue (IfxEth *eth, uint8 value)
Sets the time in seconds to be initialized or added to the system time. More...
IFX_INLINE void | IfxEth_setSubSecondIncrementValue (IfxEth *eth, uint8 value)
Sets the Sub Second Increment Value. More...
IFX_INLINE void | IfxEth_setSubtractToTimeUpdate (IfxEth *eth)
Sets subtraction, the time value is subtracted with the contents of the update register. More...
IFX_INLINE void | IfxEth_setTransmitDescriptorAddress (Ifx_ETH *eth, void *address)
Sets transmit descriptor address. More...
IFX_INLINE void | IfxEth_updateTimeStamp (IfxEth *eth)
Updates the System time with specified values in SECONDS and NANOSECONDS registers. More...
IFX_INLINE void * | IfxEth_waitTransmitBuffer (IfxEth *eth)
Waits for one TX buffer becomes available. More...
IFX_EXTERN void | IfxEth_freeReceiveBuffer (IfxEth *eth)
Free the receive buffer, enabling it for the further reception. More...
IFX_EXTERN void | IfxEth_sendTransmitBuffer (IfxEth *eth, uint16 len)
Request to send the transmit buffer. More...
IFX_EXTERN void | IfxEth_sendTransmitBuffersRingMode (IfxEth *eth, uint16 buffer1Length, uint16 buffer2Length)
Request to send the transmit buffer. More...
IFX_EXTERN void | IfxEth_setMacAddress (IfxEth *eth, const uint8 *macAddress)
Sets the MAC address. More...
IFX_EXTERN void | IfxEth_startReceiver (IfxEth *eth)
Start the receiver functions. More...
IFX_EXTERN void | IfxEth_stopReceiver (IfxEth *eth)
Stops the receiver functions. More...
IFX_EXTERN void | IfxEth_writeHeader (IfxEth *eth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 packetSize)
writes the header format into buffrer More...
IFX_INLINE IfxEth_RxDescr * | IfxEth_RxDescr_getNext (IfxEth_RxDescr *descr)
Get pointer to next RX descriptor. More...
IFX_INLINE void | IfxEth_RxDescr_release (IfxEth_RxDescr *descr)
release RX descriptor More...
IFX_INLINE void | IfxEth_TxDescr_release (IfxEth_TxDescr *descr)
Release a TX descriptor for transmit queue. More...
IFX_INLINE void | IfxEth_clearMacConfiguration (void)
resets Ethernet Configuration register More...
IFX_INLINE IfxEth_RxDescr * | IfxEth_getActualRxDescriptor (IfxEth *eth)
Get pointer to actual RX descriptor. More...
IFX_INLINE uint32 | IfxEth_getActualRxIndex (IfxEth *eth)
IFX_INLINE IfxEth_TxDescr * | IfxEth_getActualTxDescriptor (IfxEth *eth)
Get pointer to actual TX descriptor. More...
IFX_INLINE IfxEth_RxDescr * | IfxEth_getBaseRxDescriptor (IfxEth *eth)
Get pointer to base RX descriptor. More...
IFX_INLINE IfxEth_TxDescr * | IfxEth_getBaseTxDescriptor (IfxEth *eth)
Get pointer to base TX descriptor. More...
IFX_INLINE boolean | IfxEth_getLoopbackMode (IfxEth *eth)
returns the status of th eloopback mode More...
IFX_INLINE void * | IfxEth_getMacAddressPointer (IfxEth *eth)
Returns pointer to the MAC address configured for this ETH. More...
IFX_INLINE IfxEth_ReceiveProcessState | IfxEth_getReceiveProcessState (IfxEth *eth)
returns the Receive Process State More...
IFX_INLINE uint16 | IfxEth_getRxDataLength (IfxEth *eth)
Returns length of the oldest available RX data. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEth_getSrcPointer (IfxEth *eth)
Returns the SRC pointer of Eth. More...
IFX_INLINE IfxEth_TransmitProcessState | IfxEth_getTransmitProcessState (IfxEth *eth)
returns the Transmit Process State More...
IFX_INLINE boolean | IfxEth_isEriInterrupt (IfxEth *eth)
Checks whether Early Receive interrupt is requested. More...
IFX_INLINE boolean | IfxEth_isLinkActive (IfxEth *eth)
Checks whether physical connection is active. More...
IFX_INLINE boolean | IfxEth_isNisInterrupt (IfxEth *eth)
Checks whether NIS interrupt is requested. More...
IFX_INLINE boolean | IfxEth_isRxChecksumError (IfxEth *eth)
IFX_INLINE boolean | IfxEth_isRxDataAvailable (IfxEth *eth)
Checks whether one or more RX data is available. More...
IFX_INLINE boolean | IfxEth_isRxInterrupt (IfxEth *eth)
Checks whether receive interrupt is requested. More...
IFX_INLINE boolean | IfxEth_isTuInterrupt (IfxEth *eth)
Checks whether Transmit Buffer Unavailable interrupt is requested. More...
IFX_INLINE boolean | IfxEth_isTxInterrupt (IfxEth *eth)
Checks whether transmit interrupt is requested. More...
IFX_INLINE void | IfxEth_readAllFlags (IfxEth *eth)
reads the status of all flags More...
IFX_EXTERN void | IfxEth_disableModule (void)
Disable ETH Module. More...
IFX_EXTERN void | IfxEth_enableModule (void)
Enable ETH Module. More...
IFX_EXTERN void * | IfxEth_getReceiveBuffer (IfxEth *eth)
Gets receive buffer
note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffer has been processed. More...
IFX_EXTERN void * | IfxEth_getTransmitBuffer (IfxEth *eth)
Get a free transmit buffer. More...
IFX_EXTERN void | IfxEth_readMacAddress (IfxEth *eth, uint8 *macAddress)
Reads the MAC address from module register. More...
IFX_EXTERN void | IfxEth_resetModule (void)
resets Ethernet kernel More...
IFX_EXTERN void | IfxEth_setAndSendTransmitBuffer (IfxEth *eth, void *buffer, uint16 len)
IFX_EXTERN void | IfxEth_setupChecksumEngine (IfxEth *eth, IfxEth_ChecksumMode mode)
Set up checksum Engine. More...
IFX_EXTERN void | IfxEth_shuffleRxDescriptor (IfxEth *eth)
Shuffle to next RX descriptor. More...
IFX_EXTERN void | IfxEth_shuffleTxDescriptor (IfxEth *eth)
Shuffle to next TX descriptor. More...
IFX_EXTERN void | IfxEth_startTransmitter (IfxEth *eth)
Start the transmitter functions. More...
IFX_EXTERN void | IfxEth_stopTransmitter (IfxEth *eth)
Stop the transmitter functions. More...
IFX_EXTERN void | IfxEth_wakeupReceiver (IfxEth *eth)
Wakeup the receiver functions. More...
IFX_EXTERN void | IfxEth_wakeupTransmitter (IfxEth *eth)
Wakeup the transmitter functions. More...
IFX_INLINE void | IfxEth_TxDescr_setup (IfxEth_TxDescr *descr, uint16 length, boolean firstSegment, boolean lastSegment)
Setup some properties of a TX descriptor. More...
IFX_INLINE void | IfxEth_setReceiveBuffer1RingMode (IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
Sets the receive buffer1 of the receive descriptor along with its size. More...
IFX_INLINE void | IfxEth_setReceiveBuffer2RingMode (IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
Sets the receive buffer2 of the receive descriptor along with its size. More...
IFX_INLINE void | IfxEth_setTransmitBuffer1RingMode (IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
Sets the transmit buffer1 of the receive descriptor along with its size. More...
IFX_INLINE void | IfxEth_setTransmitBuffer2RingMode (IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
Sets the transmit buffer2 of the receive descriptor along with its size. More...
IFX_EXTERN void | IfxEth_init (IfxEth *eth, const IfxEth_Config *config)
Initialises the driver. More...
IFX_EXTERN void | IfxEth_initConfig (IfxEth_Config *config, Ifx_ETH *ethSfr)
Initialises the configuration Structure. More...
IFX_EXTERN void | IfxEth_initReceiveDescriptors (IfxEth *eth)
Initialises the receive descriptors. More...
IFX_EXTERN void | IfxEth_initReceiveDescriptorsRingMode (IfxEth *eth, const IfxEth_RingModeRxBuffersConfig *config)
Initialises the receive descriptors. More...
IFX_EXTERN void | IfxEth_initTransmitDescriptors (IfxEth *eth)
Initialises transmit descriptors. More...
IFX_EXTERN void | IfxEth_initTransmitDescriptorsRingMode (IfxEth *eth, const IfxEth_RingModeTxBuffersConfig *config)
Initialises transmit descriptors. More...
IFX_EXTERN void | IfxEth_setupMiiInputPins (IfxEth *eth, const IfxEth_MiiPins *miiPins)
Set up MII mode input pins. More...
IFX_EXTERN void | IfxEth_setupMiiOutputPins (IfxEth *eth, const IfxEth_MiiPins *miiPins)
setup MII mode output pins More...
IFX_EXTERN void | IfxEth_setupRmiiInputPins (IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
Set up input pins. More...
IFX_EXTERN void | IfxEth_setupRmiiOutputPins (IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
set output pin of port More...

Variables

IFX_EXTERN uint8 IfxEth_rxBuffer [IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]
receive buffers More...
IFX_EXTERN IfxEth_RxDescrList IfxEth_rxDescr
IFX_EXTERN uint8 IfxEth_txBuffer [IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]
Transmit buffers. More...
IFX_EXTERN IfxEth_TxDescrList IfxEth_txDescr

Detailed Description

ETH basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEth.h.

Macro Definition Documentation

◆ IFXETH_DESCR_SIZE

#define IFXETH_DESCR_SIZE 4

4 DWORDS (16 bytes)

Definition at line 96 of file IfxEth.h.

Referenced by IfxEth_init().

◆ IFXETH_MAX_RX_BUFFERS

#define IFXETH_MAX_RX_BUFFERS 8

Rx buffers (ring mode)

Definition at line 85 of file IfxEth.h.

Referenced by IfxEth_initReceiveDescriptors(), and IfxEth_initReceiveDescriptorsRingMode().

◆ IFXETH_MAX_TX_BUFFERS

#define IFXETH_MAX_TX_BUFFERS 16

Tx buffers (ring mode)

Definition at line 91 of file IfxEth.h.

Referenced by IfxEth_initTransmitDescriptors(), IfxEth_initTransmitDescriptorsRingMode(), and IfxEth_setupChecksumEngine().

◆ IFXETH_RTX_BUFFER_SIZE

#define IFXETH_RTX_BUFFER_SIZE 1536

Size of one ethernet frame buffer.

Definition at line 79 of file IfxEth.h.

Referenced by IfxEth_initConfig(), and IfxEth_initReceiveDescriptors().

Variable Documentation

◆ IfxEth_rxBuffer

IFX_EXTERN uint8 IfxEth_rxBuffer[IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]

receive buffers

Definition at line 1210 of file IfxEth.h.

◆ IfxEth_rxDescr

IFX_EXTERN IfxEth_RxDescrList IfxEth_rxDescr

Definition at line 1212 of file IfxEth.h.

◆ IfxEth_txBuffer

IFX_EXTERN uint8 IfxEth_txBuffer[IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]

Transmit buffers.

Definition at line 1216 of file IfxEth.h.

◆ IfxEth_txDescr

IFX_EXTERN IfxEth_TxDescrList IfxEth_txDescr

Definition at line 1218 of file IfxEth.h.


iLLD_TC26B: FCE

Modules | Files
FCE
iLLD
Collaboration diagram for FCE:

Modules

Implementation
Standard Driver
How to use the FCE CRC Interface driver?
CRC

Files

file | IfxFce_cfg.h
FCE on-chip implementation data.
file | IfxFce_Crc.h
FCE CRC details.
file | IfxFce.h
FCE basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » FCE
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » FCE
Collaboration diagram for Standard Driver:

Modules

Enumerations
Module Functions
Support Function
Interrupt Status Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » FCE » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxFce_Crc32Kernel {
IfxFce_Crc32Kernel_0 = 0,
IfxFce_Crc32Kernel_1
}
Ifx_FCE_INx(x= 0,1), Specifies the kernel used for CRC-32. More...
enum IfxFce_CrcMode {
IfxFce_CrcMode_8 = 0,
IfxFce_CrcMode_16 = 1,
IfxFce_CrcMode_32 = 2
}
Specifies the CRC mode. More...

Detailed Description

Enumeration Type Documentation

◆ IfxFce_Crc32Kernel

enum IfxFce_Crc32Kernel

Ifx_FCE_INx(x= 0,1), Specifies the kernel used for CRC-32.

Enumerator
IfxFce_Crc32Kernel_0 | Specifies the kernel0 used for CRC-32.
IfxFce_Crc32Kernel_1 | Specifies the kernel1 used for CRC-32.

Definition at line 73 of file IfxFce.h.

◆ IfxFce_CrcMode

enum IfxFce_CrcMode

Specifies the CRC mode.

Enumerator
IfxFce_CrcMode_8 | Specifies the 8-bit CRC mode.
IfxFce_CrcMode_16 | Specifies the 16-bit CRC mode.
IfxFce_CrcMode_32 | Specifies the 32-bit CRC mode.

Definition at line 81 of file IfxFce.h.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » FCE » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxFce_disableModule (Ifx_FCE *fce)
Disable the control of FCE module. More...
IFX_INLINE void | IfxFce_enableModule (Ifx_FCE *fce)
Enable the control of FCE module. More...
IFX_EXTERN void | IfxFce_resetModule (Ifx_FCE *fce)
Reset the module by clearing the kernel. More...

Detailed Description

Function Documentation

◆ IfxFce_disableModule()

IFX_INLINE void IfxFce_disableModule ( Ifx_FCE * fce )

Disable the control of FCE module.

Parameters
fce Specifies pointer to FCE module registers
Returns
None

Definition at line 222 of file IfxFce.h.

◆ IfxFce_enableModule()

IFX_INLINE void IfxFce_enableModule ( Ifx_FCE * fce )

Enable the control of FCE module.

Parameters
fce Specifies pointer to FCE module registers
Returns
None

Definition at line 231 of file IfxFce.h.

Referenced by IfxFce_Crc_initModule().

◆ IfxFce_resetModule()

IFX_EXTERN void IfxFce_resetModule ( Ifx_FCE * fce )

Reset the module by clearing the kernel.

Parameters
fce Specifies pointer to FCE module registers
Returns
None

Definition at line 105 of file IfxFce.c.

Referenced by IfxFce_Crc_deInitModule().


iLLD_TC26B: Support Function

Functions
Support Function
iLLD » FCE » Standard Driver
Collaboration diagram for Support Function:

Functions

IFX_EXTERN uint32 IfxFce_reflectCrc32 (uint32 crcStartValue, uint8 crcLength)
Reflects the CRC data and returns it. More...

Detailed Description

Function Documentation

◆ IfxFce_reflectCrc32()

IFX_EXTERN uint32 IfxFce_reflectCrc32 | ( | uint32 | crcStartValue,
 |  | uint8 | crcLength
 | ) |  |

Reflects the CRC data and returns it.

Parameters
crcStartValue | start value for reflection
crcLength | length of reflected value
Returns
Reflected CRC data

Definition at line 86 of file IfxFce.c.


iLLD_TC26B: Interrupt Status Functions

Functions
Interrupt Status Functions
iLLD » FCE » Standard Driver
Collaboration diagram for Interrupt Status Functions:

Functions

IFX_INLINE void | IfxFce_clearCrc16ErrorFlags (Ifx_FCE *fce)
Clears the CRC-16 error flags. More...
IFX_INLINE void | IfxFce_clearCrc32ErrorFlags (Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Clears the CRC-32 error flags. More...
IFX_INLINE void | IfxFce_clearCrc8ErrorFlags (Ifx_FCE *fce)
Clears the CRC-8 error flags. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxFce_getSrcPointer (Ifx_FCE *fce)
Returns the SRC pointer for FCE. More...
IFX_EXTERN Ifx_FCE_STS | IfxFce_getCrc16InterruptStatus (Ifx_FCE *fce)
Gets the CRC-16 interrupt status. More...
IFX_EXTERN Ifx_FCE_STS | IfxFce_getCrc32InterruptStatus (Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Gets the CRC-32 interrupt status. More...
IFX_EXTERN Ifx_FCE_STS | IfxFce_getCrc8InterruptStatus (Ifx_FCE *fce)
Gets the CRC-8 interrupt status. More...

Detailed Description

Function Documentation

◆ IfxFce_clearCrc16ErrorFlags()

IFX_INLINE void IfxFce_clearCrc16ErrorFlags ( Ifx_FCE * fce )

Clears the CRC-16 error flags.

Parameters
fce Specifies pointer to FCE module registers
Returns
None

Definition at line 197 of file IfxFce.h.

Referenced by IfxFce_Crc_clearErrorFlags().

◆ IfxFce_clearCrc32ErrorFlags()

IFX_INLINE void IfxFce_clearCrc32ErrorFlags | ( | Ifx_FCE * | fce,
 |  | IfxFce_Crc32Kernel | crc32Kernel
 | ) |  |

Clears the CRC-32 error flags.

Parameters
fce | Specifies pointer to FCE module registers
crc32Kernel | Specifies the kernel used for CRC-32
Returns
None

Definition at line 203 of file IfxFce.h.

Referenced by IfxFce_Crc_clearErrorFlags().

◆ IfxFce_clearCrc8ErrorFlags()

IFX_INLINE void IfxFce_clearCrc8ErrorFlags ( Ifx_FCE * fce )

Clears the CRC-8 error flags.

Parameters
fce Specifies pointer to FCE module registers
Returns
None

Definition at line 216 of file IfxFce.h.

Referenced by IfxFce_Crc_clearErrorFlags().

◆ IfxFce_getCrc16InterruptStatus()

IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc16InterruptStatus ( Ifx_FCE * fce )

Gets the CRC-16 interrupt status.

Parameters
fce Specifies pointer to FCE module registers
Returns
Current CRC-16 interrupt status

Definition at line 53 of file IfxFce.c.

Referenced by IfxFce_Crc_getInterruptStatus().

◆ IfxFce_getCrc32InterruptStatus()

IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc32InterruptStatus | ( | Ifx_FCE * | fce,
 |  | IfxFce_Crc32Kernel | crc32Kernel
 | ) |  |

Gets the CRC-32 interrupt status.

Parameters
fce | Specifies pointer to FCE module registers
crc32Kernel | Specifies the kernel used for CRC-32
Returns
Current CRC-32 interrupt status

Definition at line 61 of file IfxFce.c.

Referenced by IfxFce_Crc_getInterruptStatus().

◆ IfxFce_getCrc8InterruptStatus()

IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc8InterruptStatus ( Ifx_FCE * fce )

Gets the CRC-8 interrupt status.

Parameters
fce Specifies pointer to FCE module registers
Returns
Current CRC-8 interrupt status

Definition at line 78 of file IfxFce.c.

Referenced by IfxFce_Crc_getInterruptStatus().

◆ IfxFce_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxFce_getSrcPointer ( Ifx_FCE * fce )

Returns the SRC pointer for FCE.

Parameters
fce Specifies pointer to FCE module registers

Definition at line 240 of file IfxFce.h.

Referenced by IfxFce_Crc_initModule().


iLLD_TC26B: How to use the FCE CRC Interface driver?

How to use the FCE CRC Interface driver?
iLLD » FCE
Collaboration diagram for How to use the FCE CRC Interface driver?:

FCE gives CRC-x(x= 8,16,32) message signatures. Kernel 3 is used for CRC-8,Kernel 2 is used for CRC-16,Kernel 0 1nd Kernel 1 is used for CRC-32.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Fce/Crc/IfxFce_Crc.h>

Variables

Declare the FCE and CRC handles as global variable in your C code:

// used globally
static IfxFce_Crc fce;
static IfxFce_Crc_Crc fceCrc32_0;
static IfxFce_Crc_Crc fceCrc32_1;
static IfxFce_Crc_Crc fceCrc16;
static IfxFce_Crc_Crc fceCrc8;

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_FCE 1

Add the interrupt service routine to your C code which should do the error flag handling:

IFX_INTERRUPT(fceISR, 0, IFX_INTPRIO_FCE)
{
{
Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc32_0);
if (interruptStatus.U )
{
if ( interruptStatus.B.CMF == 1)
{
// CRC Mismatch Error...!
}
if( interruptStatus.B.CEF == 1)
{
// Configuration Error...!
}
if ( interruptStatus.B.LEF == 1)
{
// Length Error...!
}
if ( interruptStatus.B.BEF == 1)
{
// Bus Error...!
}
}
IfxFce_Crc_clearErrorFlags(&fceCrc32_0);
}
{
Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc32_1);
if (interruptStatus.U )
{
if ( interruptStatus.B.CMF == 1)
{
// CRC Mismatch Error...!
}
if( interruptStatus.B.CEF == 1)
{
// Configuration Error...!
}
if ( interruptStatus.B.LEF == 1)
{
// Length Error...!
}
if ( interruptStatus.B.BEF == 1)
{
// Bus Error...!
}
}
IfxFce_Crc_clearErrorFlags(&fceCrc32_1);
}
{
Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc16);
if (interruptStatus.U )
{
if ( interruptStatus.B.CMF == 1)
{
// CRC Mismatch Error...!
}
if( interruptStatus.B.CEF == 1)
{
// Configuration Error...!
}
if ( interruptStatus.B.LEF == 1)
{
// Length Error...!
}
if ( interruptStatus.B.BEF == 1)
{
// Bus Error...!
}
}
IfxFce_Crc_clearErrorFlags(&fceCrc16);
}
{
Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc8);
if (interruptStatus.U )
{
if ( interruptStatus.B.CMF == 1)
{
// CRC Mismatch Error...!
}
if( interruptStatus.B.CEF == 1)
{
// Configuration Error...!
}
if ( interruptStatus.B.LEF == 1)
{
// Length Error...!
}
if ( interruptStatus.B.BEF == 1)
{
// Bus Error...!
}
}
IfxFce_Crc_clearErrorFlags(&fceCrc8);
}
}

Finally install the interrupt handler in your initialisation function:

// install interrupt handler
IfxCpu_Irq_installInterruptHandler(fceISR, IFX_INTPRIO_FCE);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example for all CRC kernels:

// create module config
IfxFce_Crc_Config fceConfig;
IfxFce_Crc_initModuleConfig(&fceConfig, &MODULE_FCE0);
// ISR priorities and interrupt target
fceConfig.isrPriority = IFX_INTPRIO_FCE;
fceConfig.isrTypeOfService = IfxCpu_Irq_getTos( IfxCpu_getCoreIndex());
// initialize module
//IfxFce_Crc fce; // defined globally
IfxFce_Crc_initModule(&fce, &fceConfig);
// initialize CRC kernels
IfxFce_Crc_CrcConfig crcConfig;
IfxFce_Crc_initCrcConfig(&crcConfig, &fce);
//IfxFce_Crc_Crc fceCrc32_0; // defined globally
IfxFce_Crc_initCrc(&fceCrc32_0, &crcConfig);
//IfxFce_Crc_Crc fceCrc32_1; // defined globally
crcConfig.crc32Kernel = IfxFce_Crc32Kernel_1;
IfxFce_Crc_initCrc(&fceCrc32_1, &crcConfig);
crcConfig.crc32Kernel = IfxFce_Crc32Kernel_0;
//IfxFce_Crc_Crc fceCrc16; // defined globally
crcConfig.crcMode = IfxFce_CrcMode_16;
IfxFce_Crc_initCrc(&fceCrc16, &crcConfig);
//IfxFce_Crc_Crc fceCrc8; // defined globally
crcConfig.crcMode = IfxFce_CrcMode_8;
crcConfig.useDma = TRUE; // Enable Dma transfer
crcConfig.fceChannelId = IfxDma_ChannelId_0;
IfxFce_Crc_initCrc(&fceCrc8, &crcConfig);

Error Interrupt on CRC mismatch

By default, all error interrupts aside from the CRC mismatch interrupt (CMF) are enabled.

In order to use the CMF interrupt as well, the appr. error flag has to be enabled during configuration:

// initialize CRC kernel with CRC check enabled
IfxFce_Crc_CrcConfig crcConfig;
IfxFce_Crc_initCrcConfig(&crcConfig, &fce);
crcConfig.enabledInterrupts.crcMismatch = TRUE;
IfxFce_Crc_initCrc(&fceCrc32_0, &crcConfig);

And the expected CRC value has to be written into the expectedCrc field of the handle before the CRC calculation is started.

{
// Expected CRC:
fceCrc32_0.expectedCrc = 0xd95def75;
// do calculation
uint32 fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_0, checkData, CHECK_DATA_SIZE, 0x00000000);
// we can expect, that an error interrupt has been triggered if the CRC over checkData didn't match.
}

CRC Calculation

Now, all 4 FCE kernels are configured and can be used to calculate CRC values.

In following examples, CRC is calculated over following array:

#define CHECK_DATA_SIZE 25 // declare this portion globally
// if Dma is enabled, align memory to 32 byte
uint32 checkData[CHECK_DATA_SIZE] = {
0xbe9957bb,
0x1c706c1e,
0x14c3db3f,
0x7fb17a93,
0xb0d9d5a7,
0x768093e0,
0x88b206a0,
0xc51299e4,
0xe8a97d48,
0x89367f27,
0x70095984,
0xec030f75,
0xdc22f8d4,
0xd951407b,
0x34ae18c6,
0x4d47ba7d,
0x0e2e4622,
0x4a2e90d3,
0xdaec3752,
0xcd3ed11c,
0x36b416b7,
0x8ea28658,
0xdd37eee3,
0x23928b62,
0x84eb4b22,
};

Function calls:

// Common usage:
{
uint32 fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_0, checkData, CHECK_DATA_SIZE, 0x00000000);
// -> CRC32 will be 0xd95def75
}
// Piecewise CRC calculation over two (more more) memory blocks.
// Please note that the initial value requires a bytewise reflection, and an inversion whenever it's passed for the next calculation:
{
uint32 fceCrc;
fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_1, (uint32 *)&checkData[0], CHECK_DATA_SIZE-10, 0x00000000);
fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_1, (uint32 *)&checkData[CHECK_DATA_SIZE-10], 10, ~IfxFce_reflectCrc32(fceCrc, 32));
// -> CRC32 will be 0xd95def75 (as well)
}
// using the CRC16 kernel
{
uint32 fceCrc;
fceCrc = IfxFce_Crc_calculateCrc16(&fceCrc16, (uint16 *)checkData, CHECK_DATA_SIZE*2, 0x00000000);
// -> CRC16 will be 0xda6f
}
// using the CRC8 kernel
{
uint32 fceCrc;
fceCrc = IfxFce_Crc_calculateCrc8(&fceCrc8, (uint8 *)checkData, CHECK_DATA_SIZE*4, 0x00000000);
// -> CRC8 will be 0x61
}

/


iLLD_TC26B: CRC

Modules
CRC
iLLD » FCE
Collaboration diagram for CRC:

Modules

Data Structures
Module Initialise Functions
CRC Operation Functions
Interrupt Status Function

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » FCE » CRC
Collaboration diagram for Data Structures:

Data Structures

struct | IfxFce_Crc_EnabledInterrupts
Specifies the interrupt enable structure. More...
struct | IfxFce_Crc
FCE Module Handle;. More...
struct | IfxFce_Crc_Config
Configuration structure of the module. More...
struct | IfxFce_Crc_Crc
Specifies the pointer to FCE module handler. More...
struct | IfxFce_Crc_CrcConfig
Specifies the module configuration structure. More...

Detailed Description

Data Structure Documentation

◆ IfxFce_Crc_EnabledInterrupts

struct IfxFce_Crc_EnabledInterrupts

Specifies the interrupt enable structure.

Definition at line 373 of file IfxFce_Crc.h.

Data Fields
boolean | busError | Specifies enabel/disable of bus error interrupt.
boolean | configError | Specifies enabel/disable of configuration error interrupt.
boolean | crcMismatch | Specifies enabel/disable of CRC mismatch interrupt.
boolean | lengthError | Specifies enabel/disable of length error interrupt.

◆ IfxFce_Crc

struct IfxFce_Crc

FCE Module Handle;.

Definition at line 387 of file IfxFce_Crc.h.

Data Fields
Ifx_FCE * fce Pointer to FCE registers.

◆ IfxFce_Crc_Config

struct IfxFce_Crc_Config

Configuration structure of the module.

Definition at line 394 of file IfxFce_Crc.h.

Data Fields
Ifx_FCE * | fce | Pointer to FCE registers.
uint16 | isrPriority | interrupt priority
IfxSrc_Tos | isrTypeOfService | type of interrupt service

◆ IfxFce_Crc_Crc

struct IfxFce_Crc_Crc

Specifies the pointer to FCE module handler.

Definition at line 403 of file IfxFce_Crc.h.

Data Fields
IfxFce_Crc32Kernel | crc32Kernel | Specifies the kernel used for CRC-32.
IfxFce_CrcMode | crcMode | Specifies the CRC mode.
uint32 | expectedCrc | Specifies the expected CRC to be compared with resulted.
Ifx_FCE * | fce | Specifies pointer to FCE module registers.

◆ IfxFce_Crc_CrcConfig

struct IfxFce_Crc_CrcConfig

Specifies the module configuration structure.

Definition at line 413 of file IfxFce_Crc.h.

Collaboration diagram for IfxFce_Crc_CrcConfig:
[legend]
Data Fields
boolean | automaticLengthReload | Specifies the enable/disable of automatic length reload.
boolean | crc32BitReflectionEnabled | Specifies enable/disable of CRC 32-bit wise reflection.
IfxFce_Crc32Kernel | crc32Kernel | Specifies the kernel used for CRC-32.
boolean | crcCheckCompared | Specifies whether CRC check comparision is enabled or not.
IfxFce_CrcMode | crcMode | Specifies the CRC mode.
boolean | crcResultInverted | Specifies the XOR valueto get the final CRC.
boolean | dataByteReflectionEnabled | Specifies enable/disable of input data byte wise reflection.
IfxFce_Crc_EnabledInterrupts | enabledInterrupts | Specifies the interrupt enable structure.
uint32 | expectedCrc | Specifies the expected CRC to be compared with resulted.
Ifx_FCE * | fce | Specifies pointer to FCE module registers.


iLLD_TC26B: Module Initialise Functions

Functions
Module Initialise Functions
iLLD » FCE » CRC
Collaboration diagram for Module Initialise Functions:

Functions

IFX_EXTERN void | IfxFce_Crc_deInitModule (IfxFce_Crc_Crc *fce)
Deinitialises the FCE module. More...
IFX_EXTERN void | IfxFce_Crc_initCrc (IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
Initialise the FCE module for CRC computation according to CRC mode. More...
IFX_EXTERN void | IfxFce_Crc_initCrcConfig (IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
Initialises the default CRC configuration buffer. More...
IFX_EXTERN void | IfxFce_Crc_initModule (IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
Usage Example: see How to use the FCE CRC Interface driver?. More...
IFX_EXTERN void | IfxFce_Crc_initModuleConfig (IfxFce_Crc_Config *config, Ifx_FCE *fce)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxFce_Crc_deInitModule()

IFX_EXTERN void IfxFce_Crc_deInitModule ( IfxFce_Crc_Crc * fce )

Deinitialises the FCE module.

Parameters
fce Specifies the pointer to FCE module handler
Returns
None

Reset the module

IfxFce_Crc fce;
//Deinitialise the module
IfxFce_Crc_deInitModule(&fce);

Definition at line 177 of file IfxFce_Crc.c.

◆ IfxFce_Crc_initCrc()

IFX_EXTERN void IfxFce_Crc_initCrc | ( | IfxFce_Crc_Crc * | fceCrc,
 |  | const IfxFce_Crc_CrcConfig * | crcConfig
 | ) |  |

Initialise the FCE module for CRC computation according to CRC mode.

Parameters
fceCrc | Specifies the pointer to CRC handle
crcConfig | Specifies the FCE CRC configuration structure
Returns
None

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 200 of file IfxFce_Crc.c.

◆ IfxFce_Crc_initCrcConfig()

IFX_EXTERN void IfxFce_Crc_initCrcConfig | ( | IfxFce_Crc_CrcConfig * | crcConfig,
 |  | IfxFce_Crc * | fce
 | ) |  |

Initialises the default CRC configuration buffer.

Parameters
crcConfig | Specifies the FCE CRC configuration structure
fce | Pointer to the FCE module handle
Returns
None

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 249 of file IfxFce_Crc.c.

◆ IfxFce_Crc_initModule()

IFX_EXTERN void IfxFce_Crc_initModule | ( | IfxFce_Crc * | fce,
 |  | const IfxFce_Crc_Config * | config
 | ) |  |

Usage Example: see How to use the FCE CRC Interface driver?.

Parameters
fce | module handle
config | predefined configuration structure of the module
Returns
None

Definition at line 265 of file IfxFce_Crc.c.

◆ IfxFce_Crc_initModuleConfig()

IFX_EXTERN void IfxFce_Crc_initModuleConfig | ( | IfxFce_Crc_Config * | config,
 |  | Ifx_FCE * | fce
 | ) |  |

Fills the config structure with default values.

Parameters
config | configuration structure of the module
fce | pointer to FCE registers
Returns
None

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 278 of file IfxFce_Crc.c.


iLLD_TC26B: CRC Operation Functions

Functions
CRC Operation Functions
iLLD » FCE » CRC
Collaboration diagram for CRC Operation Functions:

Functions

IFX_EXTERN uint16 | IfxFce_Crc_calculateCrc16 (IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue)
Calculate the XORed 16-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...
IFX_EXTERN uint32 | IfxFce_Crc_calculateCrc32 (IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue)
Calculate the XORed 32-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...
IFX_EXTERN uint8 | IfxFce_Crc_calculateCrc8 (IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue)
Calculate the XORed 8-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...

Detailed Description

Function Documentation

◆ IfxFce_Crc_calculateCrc16()

IFX_EXTERN uint16 IfxFce_Crc_calculateCrc16 | ( | IfxFce_Crc_Crc * | fce,
 |  | const uint16 * | crcData,
 |  | uint32 | crcDataLength,
 |  | uint16 | crcStartValue
 | ) |  |

Calculate the XORed 16-bit CRC value and returns it. It takes the precomputed XORed and reversed.

Parameters
fce | Specifies the pointer to FCE module handler
crcData | Length of the input data block
crcDataLength | Length of the input data block
crcStartValue | start value for CRC calculation
Returns
Final CRC after XORed with XOR value.

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 53 of file IfxFce_Crc.c.

◆ IfxFce_Crc_calculateCrc32()

IFX_EXTERN uint32 IfxFce_Crc_calculateCrc32 | ( | IfxFce_Crc_Crc * | fce,
 |  | const uint32 * | crcData,
 |  | uint32 | crcDataLength,
 |  | uint32 | crcStartValue
 | ) |  |

Calculate the XORed 32-bit CRC value and returns it. It takes the precomputed XORed and reversed.

Parameters
fce | Specifies the pointer to FCE module handler
crcData | pointer to the input data block
crcDataLength | Length of the input data block
crcStartValue | start value for CRC calculation
Returns
Final CRC after XORed with XOR value.

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 81 of file IfxFce_Crc.c.

◆ IfxFce_Crc_calculateCrc8()

IFX_EXTERN uint8 IfxFce_Crc_calculateCrc8 | ( | IfxFce_Crc_Crc * | fce,
 |  | const uint8 * | crcData,
 |  | uint32 | crcDataLength,
 |  | uint8 | crcStartValue
 | ) |  |

Calculate the XORed 8-bit CRC value and returns it. It takes the precomputed XORed and reversed.

Parameters
fce | Specifies the pointer to FCE module handler
crcData | Length of the input data block
crcDataLength | Length of the input data block
crcStartValue | start value for CRC calculation
Returns
Final CRC after XORed with XOR value.

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 131 of file IfxFce_Crc.c.


iLLD_TC26B: Interrupt Status Function

Functions
Interrupt Status Function
iLLD » FCE » CRC
Collaboration diagram for Interrupt Status Function:

Functions

IFX_EXTERN void | IfxFce_Crc_clearErrorFlags (IfxFce_Crc_Crc *fce)
Clears the error flags. More...
IFX_EXTERN Ifx_FCE_STS | IfxFce_Crc_getInterruptStatus (IfxFce_Crc_Crc *fce)
Gets the current CRC interrupt status. More...

Detailed Description

Function Documentation

◆ IfxFce_Crc_clearErrorFlags()

IFX_EXTERN void IfxFce_Crc_clearErrorFlags ( IfxFce_Crc_Crc * fce )

Clears the error flags.

Parameters
fce Specifies the pointer to FCE module handler
Returns
None

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 160 of file IfxFce_Crc.c.

◆ IfxFce_Crc_getInterruptStatus()

IFX_EXTERN Ifx_FCE_STS IfxFce_Crc_getInterruptStatus ( IfxFce_Crc_Crc * fce )

Gets the current CRC interrupt status.

Parameters
fce Specifies the pointer to FCE module handler
Returns
Current interrupt status

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 183 of file IfxFce_Crc.c.


iLLD_TC26B: IfxFce_cfg.h File Reference

  • _Impl
Macros
IfxFce_cfg.h File Reference
iLLD » FCE

FCE on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXFCE_NUM_KERNEL (4)
#define | IFXFCE_NUM_MODULES (1)

Detailed Description

FCE on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFce_cfg.h.

Macro Definition Documentation

◆ IFXFCE_NUM_KERNEL

#define IFXFCE_NUM_KERNEL (4)

Definition at line 60 of file IfxFce_cfg.h.

◆ IFXFCE_NUM_MODULES

#define IFXFCE_NUM_MODULES (1)

Definition at line 62 of file IfxFce_cfg.h.


iLLD_TC26B: IfxFce_Crc.h File Reference

  • Fce
  • Crc
Data Structures | Functions
IfxFce_Crc.h File Reference
iLLD » FCE

FCE CRC details. More...

#include "Fce/Std/IfxFce.h"
#include "Cpu/Irq/IfxCpu_Irq.h"
Include dependency graph for IfxFce_Crc.h:

Go to the source code of this file.

Data Structures

struct | IfxFce_Crc_EnabledInterrupts
Specifies the interrupt enable structure. More...
struct | IfxFce_Crc
FCE Module Handle;. More...
struct | IfxFce_Crc_Config
Configuration structure of the module. More...
struct | IfxFce_Crc_Crc
Specifies the pointer to FCE module handler. More...
struct | IfxFce_Crc_CrcConfig
Specifies the module configuration structure. More...

Functions

IFX_EXTERN void | IfxFce_Crc_deInitModule (IfxFce_Crc_Crc *fce)
Deinitialises the FCE module. More...
IFX_EXTERN void | IfxFce_Crc_initCrc (IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
Initialise the FCE module for CRC computation according to CRC mode. More...
IFX_EXTERN void | IfxFce_Crc_initCrcConfig (IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
Initialises the default CRC configuration buffer. More...
IFX_EXTERN void | IfxFce_Crc_initModule (IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
Usage Example: see How to use the FCE CRC Interface driver?. More...
IFX_EXTERN void | IfxFce_Crc_initModuleConfig (IfxFce_Crc_Config *config, Ifx_FCE *fce)
Fills the config structure with default values. More...
IFX_EXTERN uint16 | IfxFce_Crc_calculateCrc16 (IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue)
Calculate the XORed 16-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...
IFX_EXTERN uint32 | IfxFce_Crc_calculateCrc32 (IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue)
Calculate the XORed 32-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...
IFX_EXTERN uint8 | IfxFce_Crc_calculateCrc8 (IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue)
Calculate the XORed 8-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...
IFX_EXTERN void | IfxFce_Crc_clearErrorFlags (IfxFce_Crc_Crc *fce)
Clears the error flags. More...
IFX_EXTERN Ifx_FCE_STS | IfxFce_Crc_getInterruptStatus (IfxFce_Crc_Crc *fce)
Gets the current CRC interrupt status. More...

Detailed Description

FCE CRC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFce_Crc.h.


iLLD_TC26B: IfxFce.h File Reference

  • Fce
  • Std
Enumerations | Functions
IfxFce.h File Reference
iLLD » FCE

FCE basic functionality. More...

#include "_Impl/IfxFce_cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Scu/Std/IfxScuWdt.h"
#include "IfxFce_reg.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxFce.h:

Go to the source code of this file.

Enumerations

enum IfxFce_Crc32Kernel {
IfxFce_Crc32Kernel_0 = 0,
IfxFce_Crc32Kernel_1
}
Ifx_FCE_INx(x= 0,1), Specifies the kernel used for CRC-32. More...
enum IfxFce_CrcMode {
IfxFce_CrcMode_8 = 0,
IfxFce_CrcMode_16 = 1,
IfxFce_CrcMode_32 = 2
}
Specifies the CRC mode. More...

Functions

IFX_INLINE void | IfxFce_disableModule (Ifx_FCE *fce)
Disable the control of FCE module. More...
IFX_INLINE void | IfxFce_enableModule (Ifx_FCE *fce)
Enable the control of FCE module. More...
IFX_EXTERN void | IfxFce_resetModule (Ifx_FCE *fce)
Reset the module by clearing the kernel. More...
IFX_EXTERN uint32 | IfxFce_reflectCrc32 (uint32 crcStartValue, uint8 crcLength)
Reflects the CRC data and returns it. More...
IFX_INLINE void | IfxFce_clearCrc16ErrorFlags (Ifx_FCE *fce)
Clears the CRC-16 error flags. More...
IFX_INLINE void | IfxFce_clearCrc32ErrorFlags (Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Clears the CRC-32 error flags. More...
IFX_INLINE void | IfxFce_clearCrc8ErrorFlags (Ifx_FCE *fce)
Clears the CRC-8 error flags. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxFce_getSrcPointer (Ifx_FCE *fce)
Returns the SRC pointer for FCE. More...
IFX_EXTERN Ifx_FCE_STS | IfxFce_getCrc16InterruptStatus (Ifx_FCE *fce)
Gets the CRC-16 interrupt status. More...
IFX_EXTERN Ifx_FCE_STS | IfxFce_getCrc32InterruptStatus (Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Gets the CRC-32 interrupt status. More...
IFX_EXTERN Ifx_FCE_STS | IfxFce_getCrc8InterruptStatus (Ifx_FCE *fce)
Gets the CRC-8 interrupt status. More...

Detailed Description

FCE basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFce.h.


iLLD_TC26B: FFT

Modules | Files
FFT
iLLD
Collaboration diagram for FFT:

Modules

Implementation
Standard Driver
How to use the FFT driver?
FFT

Files

file | IfxFft_cfg.h
FFT on-chip implementation data.
file | IfxFft_Fft.h
FFT FFT details.
file | IfxFft.h
FFT basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » FFT
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » FFT
Collaboration diagram for Standard Driver:

Modules

Enumerations
Utility Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » FFT » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxFft_Input {
IfxFft_Input_complexSInt32 = 0,
IfxFft_Input_realSInt32 = 1,
IfxFft_Input_complexSInt16 = 2,
IfxFft_Input_realSInt16 = 3
}
Input format Definition in Ifx_FFT.CSR.B.IN.FMT. More...
enum IfxFft_Length {
IfxFft_Length_8 = 3,
IfxFft_Length_16 = 4,
IfxFft_Length_32 = 5,
IfxFft_Length_64 = 6,
IfxFft_Length_128 = 7,
IfxFft_Length_256 = 8,
IfxFft_Length_512 = 9,
IfxFft_Length_1024 = 10
}
Length of transform. Log base 2 of the required transform size. Length must be between 3 (transform of 8) and 11 (transform of 2048). Definition in Ifx_FFT.CSR.B.LENGTH. More...
enum IfxFft_Operation {
IfxFft_Operation_fft = 0,
IfxFft_Operation_ifft = 1
}
Operation (FFT / IFFT) Definition in Ifx_FFT.CSR.B.IFFT. More...
enum IfxFft_Output {
IfxFft_Output_complexSInt32 = 0,
IfxFft_Output_complexSInt16 = 1
}
Output format Definition in Ifx_FFT.CSR.B.OUT.FMT. More...
enum IfxFft_SuspendMode {
IfxFft_SuspendMode_none = 0,
IfxFft_SuspendMode_hard = 1,
IfxFft_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Detailed Description

Enumeration Type Documentation

◆ IfxFft_Input

enum IfxFft_Input

Input format Definition in Ifx_FFT.CSR.B.IN.FMT.

Enumerator
IfxFft_Input_complexSInt32 | 1 complex 32-bit data per 64-bit word
IfxFft_Input_realSInt32 | 2 real 32-bit data per 64-bit word
IfxFft_Input_complexSInt16 | 2 complex 16-bit data per 64-bit word
IfxFft_Input_realSInt16 | 4 real 16-bit data per 64-bit word

Definition at line 70 of file IfxFft.h.

◆ IfxFft_Length

enum IfxFft_Length

Length of transform. Log base 2 of the required transform size. Length must be between 3 (transform of 8) and 11 (transform of 2048). Definition in Ifx_FFT.CSR.B.LENGTH.

Enumerator
IfxFft_Length_8 | transform of 8
IfxFft_Length_16 | transform of 16
IfxFft_Length_32 | transform of 32
IfxFft_Length_64 | transform of 64
IfxFft_Length_128 | transform of 128
IfxFft_Length_256 | transform of 256
IfxFft_Length_512 | transform of 512
IfxFft_Length_1024 | transform of 1024

Definition at line 82 of file IfxFft.h.

◆ IfxFft_Operation

enum IfxFft_Operation

Operation (FFT / IFFT) Definition in Ifx_FFT.CSR.B.IFFT.

Enumerator
IfxFft_Operation_fft | perform FFT
IfxFft_Operation_ifft | perform IFFT

Definition at line 97 of file IfxFft.h.

◆ IfxFft_Output

enum IfxFft_Output

Output format Definition in Ifx_FFT.CSR.B.OUT.FMT.

Enumerator
IfxFft_Output_complexSInt32 | 1 complex 32-bit data per 64-bit word
IfxFft_Output_complexSInt16 | 2 complex 16-bit data per 64-bit word

Definition at line 106 of file IfxFft.h.

◆ IfxFft_SuspendMode

enum IfxFft_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxFft_SuspendMode_none | No suspend.
IfxFft_SuspendMode_hard | Hard Suspend.
IfxFft_SuspendMode_soft | Soft Suspend.

Definition at line 114 of file IfxFft.h.


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » FFT » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE void | IfxFft_disableModule (Ifx_FFT *fft, Ifx_LMU *lmu)
Disables the FFT module and also the LMU interface. More...
IFX_INLINE void | IfxFft_enableModule (Ifx_FFT *fft, Ifx_LMU *lmu)
Enables the FFT module and also the LMU interface. More...
IFX_INLINE IfxFft_Input | IfxFft_getInputFormat (Ifx_FFT *fft)
Returns the input format. More...
IFX_INLINE IfxFft_Length | IfxFft_getLength (Ifx_FFT *fft)
Returns the length of the transform (length code, 3 to 10) More...
IFX_INLINE IfxFft_Length | IfxFft_getLengthCode (uint16 length)
Converts the given input length into the transform length code, to write into Ifx_FFT.CSR.B.LENGTH. More...
IFX_INLINE uint16 | IfxFft_getLengthFromCode (IfxFft_Length length)
Retruns the actual length of the transform from the length code. More...
IFX_INLINE IfxFft_Output | IfxFft_getOutputFormat (Ifx_FFT *fft)
Returns the output format. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxFft_getSrcPointerDone (Ifx_FFT *fft)
Returns the status of FFT DONE request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxFft_getSrcPointerRfs (Ifx_FFT *fft)
Returns the status of FFT RFS request. More...
IFX_INLINE uint16 | IfxFft_getTransformLength (Ifx_FFT *fft)
Returns the actual length of the transform. More...
IFX_INLINE boolean | IfxFft_isEngineBusy (Ifx_FFT *fft)
Returns the status of whether the FFT Engine is Idle or has at least one transform in operation. More...
IFX_INLINE boolean | IfxFft_isModuleEnabled (Ifx_FFT *fft)
Returns the status of whether the module is enabled or not. More...
IFX_INLINE boolean | IfxFft_isModuleSuspended (Ifx_FFT *fft)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE boolean | IfxFft_isReadyForStart (Ifx_FFT *fft)
Returns the status of whether the module can accept a START operation or not. More...
IFX_INLINE void | IfxFft_setSuspendMode (Ifx_FFT *fft, IfxFft_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...

Detailed Description

Function Documentation

◆ IfxFft_disableModule()

IFX_INLINE void IfxFft_disableModule | ( | Ifx_FFT * | fft,
 |  | Ifx_LMU * | lmu
 | ) |  |

Disables the FFT module and also the LMU interface.

Parameters
fft | pointer to FFT registers
lmu | pointer to LMU registers
Returns
None

Definition at line 232 of file IfxFft.h.

◆ IfxFft_enableModule()

IFX_INLINE void IfxFft_enableModule | ( | Ifx_FFT * | fft,
 |  | Ifx_LMU * | lmu
 | ) |  |

Enables the FFT module and also the LMU interface.

Parameters
fft | pointer to FFT registers
lmu | pointer to LMU registers
Returns
None

Definition at line 242 of file IfxFft.h.

Referenced by IfxFft_Fft_initModule().

◆ IfxFft_getInputFormat()

IFX_INLINE IfxFft_Input IfxFft_getInputFormat ( Ifx_FFT * fft )

Returns the input format.

Parameters
fft pointer to FFT registers
Returns
Input format

Definition at line 252 of file IfxFft.h.

◆ IfxFft_getLength()

IFX_INLINE IfxFft_Length IfxFft_getLength ( Ifx_FFT * fft )

Returns the length of the transform (length code, 3 to 10)

Parameters
fft pointer to FFT registers
Returns
Length of the transform (length code)

Definition at line 258 of file IfxFft.h.

◆ IfxFft_getLengthCode()

IFX_INLINE IfxFft_Length IfxFft_getLengthCode ( uint16 length )

Converts the given input length into the transform length code, to write into Ifx_FFT.CSR.B.LENGTH.

Parameters
length Input length of the transform
Returns
Length of the transform (code, 3 to 10)

Definition at line 264 of file IfxFft.h.

◆ IfxFft_getLengthFromCode()

IFX_INLINE uint16 IfxFft_getLengthFromCode ( IfxFft_Length length )

Retruns the actual length of the transform from the length code.

Parameters
length Length of transform
Returns
Actual length of the transform

Definition at line 270 of file IfxFft.h.

Referenced by IfxFft_Fft_calcCounters(), and IfxFft_Fft_initJob().

◆ IfxFft_getOutputFormat()

IFX_INLINE IfxFft_Output IfxFft_getOutputFormat ( Ifx_FFT * fft )

Returns the output format.

Parameters
fft pointer to FFT registers
Returns
Output format

Definition at line 276 of file IfxFft.h.

◆ IfxFft_getSrcPointerDone()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxFft_getSrcPointerDone ( Ifx_FFT * fft )

Returns the status of FFT DONE request.

Parameters
fft pointer to FFT registers
Returns
Status of FFT DONE request

Definition at line 282 of file IfxFft.h.

Referenced by IfxFft_Fft_initDma(), and IfxFft_Fft_initModule().

◆ IfxFft_getSrcPointerRfs()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxFft_getSrcPointerRfs ( Ifx_FFT * fft )

Returns the status of FFT RFS request.

Parameters
fft pointer to FFT registers
Returns
Status of FFT RFS request

Definition at line 289 of file IfxFft.h.

◆ IfxFft_getTransformLength()

IFX_INLINE uint16 IfxFft_getTransformLength ( Ifx_FFT * fft )

Returns the actual length of the transform.

Parameters
fft pointer to FFT registers
Returns
Actual length of the transform ()

Definition at line 296 of file IfxFft.h.

◆ IfxFft_isEngineBusy()

IFX_INLINE boolean IfxFft_isEngineBusy ( Ifx_FFT * fft )

Returns the status of whether the FFT Engine is Idle or has at least one transform in operation.

Parameters
fft pointer to FFT registers
Returns
(true / false)

Definition at line 302 of file IfxFft.h.

Referenced by IfxFft_Fft_initWindow().

◆ IfxFft_isModuleEnabled()

IFX_INLINE boolean IfxFft_isModuleEnabled ( Ifx_FFT * fft )

Returns the status of whether the module is enabled or not.

Parameters
fft pointer to FFT registers
Returns
(true / false)

Definition at line 308 of file IfxFft.h.

Referenced by IfxFft_Fft_initModule().

◆ IfxFft_isModuleSuspended()

IFX_INLINE boolean IfxFft_isModuleSuspended ( Ifx_FFT * fft )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
fft Pointer to FFT module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 314 of file IfxFft.h.

◆ IfxFft_isReadyForStart()

IFX_INLINE boolean IfxFft_isReadyForStart ( Ifx_FFT * fft )

Returns the status of whether the module can accept a START operation or not.

Parameters
fft Pointer to FFT registers
Returns
(true / false)

Definition at line 326 of file IfxFft.h.

Referenced by IfxFft_Fft_initWindow(), and IfxFft_Fft_startJob().

◆ IfxFft_setSuspendMode()

IFX_INLINE void IfxFft_setSuspendMode | ( | Ifx_FFT * | fft,
 |  | IfxFft_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
fft | Pointer to FFT module registers
mode | Module suspend mode
Returns
None

Definition at line 332 of file IfxFft.h.


iLLD_TC26B: How to use the FFT driver?

How to use the FFT driver?
iLLD » FFT
Collaboration diagram for How to use the FFT driver?:

The FFT interface driver provides a default FFT configuration for calculating forward and inverse FFTs of lengths 8 to 1024 (powers of 2 only) of real or complex input operands.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Fft/Fft/IfxFft_Fft.h>

Variables

Declare the FFT handle, FFT job handle and the input output locations as global variables in your C code:

// FFT window length
#define FFT_LENGTH 512
// source waveform (must be 256bit aligned!)
__attribute__ ((aligned(256))) sint32 fftIn[FFT_LENGTH] = {
#include "sinewave.inc"
};
// FFT result (must be 256bit aligned!)
__attribute__ ((aligned(256))) sint32 fftOut[FFT_LENGTH*2];
// used globally
IfxFft_Fft fft;
IfxFft_Fft_Job fftJob;
volatile uint32 fftInterruptCounter;

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define ISR_PRIORITY_FFT_OUTPUT 1
#define ISR_PRIORITY_FFT_INPUT 2
#define ISR_PRIORITY_FFT_INTRA 3

Add the interrupt service routines to your C code. They have to call the FFT interrupt handlers by passing the fftJob handle:

IFX_INTERRUPT(ISR_Fft_intra, 0, ISR_PRIORITY_FFT_INTRA)
{
IfxFft_Fft_isrIntra(&fft);
}
IFX_INTERRUPT(ISR_Fft_input, 0, ISR_PRIORITY_FFT_INPUT)
{
IfxFft_Fft_isrInput(&fft);
}
IFX_INTERRUPT(ISR_Fft_output, 0, ISR_PRIORITY_FFT_output)
{
++fftInterruptCounter;
IfxFft_Fft_isrOutput(&fft);
// do the next transform:
while (IfxFft_Fft_startJob(&fftJob) == FALSE) {}
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&ISR_Fft_input, ISR_PRIORITY_FFT_INPUT);
IfxCpu_Irq_installInterruptHandler(&ISR_Fft_output, ISR_PRIORITY_FFT_OUTPUT);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create module config
IfxFft_Fft_Config fftConfig;
IfxFft_Fft_initModuleConfig(&fftConfig, &MODULE_FFT, &MODULE_LMU);
// configure interrupts
fftConfig.inputPriority = ISR_PRIORITY_FFT_INPUT;
fftConfig.intraPriority = ISR_PRIORITY_FFT_INTRA;
fftConfig.outputPriority = ISR_PRIORITY_FFT_OUTPUT;
fftConfig.typeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
// use DMA channels for input/output transfers
fftConfig.inputDmaChannelId = IfxDma_ChannelId_4;
fftConfig.outputDmaChannelId = IfxDma_ChannelId_5;
fftConfig.discardDmaChannelId = IfxDma_ChannelId_6;
// initialize module
// IfxFft_Fft fft; // defined globally
IfxFft_Fft_initModule(&fft, &fftConfig);

Job Initialisation

The FFT job initialisation can also be done in the same function. Here an example:

// create FFT job config
IfxFft_Fft_JobConfig fftJobConfig;
IfxFft_Fft_initJobConfig(&fftJobConfig, &fft);
// customize job
fftJobConfig.fftLength = IfxFft_Length_512;
fftJobConfig.inputFormat = IfxFft_Input_realSInt32;
fftJobConfig.inputPtr = (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)fftIn);
fftJobConfig.inputLength = FFT_LENGTH;
fftJobConfig.outputFormat = IfxFft_Output_complexSInt32;
fftJobConfig.outputPtr = (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)fftOut);
fftJobConfig.outputLength = FFT_LENGTH;
// initialize FFT job
// IfxFft_Fft_Job fftJob; // defined globally
IfxFft_Fft_initJob(&fftJob, &fftJobConfig);

The FFT is ready for use now!

Transform Functions

The FFT driver provides simple function to perform the transforms.

This means: you only have to start the FFT job with pre configured job handle and the transform will be done automatically by the FFT engine and an interrupt will be raised, indicating the end of treansform(DONE).

// start job until return TRUE.
while (IfxFft_Fft_startJob(&fftJob) == FALSE) {}
// wait for 3 interrupts
while( fftInterruptCounter < 3 );


iLLD_TC26B: FFT

Modules
FFT
iLLD » FFT
Collaboration diagram for FFT:

Modules

Data Structures
Module Functions
Interrupt Functions
Transform Funtions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » FFT » FFT
Collaboration diagram for Data Structures:

Data Structures

struct | IfxFft_Fft
Module handle. More...
struct | IfxFft_Fft_Count64
Structure for counters. More...
struct | IfxFft_Fft_Config
Configuration structure of the module. More...
struct | IfxFft_Fft_JobConfig
Configuration structure for the FFT job. More...
struct | IfxFft_Fft_Job_s
FFT job handle. More...

Detailed Description

Data Structure Documentation

◆ IfxFft_Fft

struct IfxFft_Fft

Module handle.

Definition at line 238 of file IfxFft_Fft.h.

Collaboration diagram for IfxFft_Fft:
[legend]
Data Fields
IfxDma_Dma_Channel | discardDmaChannel | Discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0)
Ifx_FFT * | fft | Pointer to FFT registers. Used when (IFXFFT_FFT_OPTIMIZED == 0)
uint32 | flags | Driver flags. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
IfxDma_Dma_Channel | inputDmaChannel | Input DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0)
uint32 | inputIdx | Input interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
uint32 | intraIdx | Intra interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
IfxFft_Fft_Job * | job[2] | FFT job handle.
Ifx_LMU * | lmu | Pointer to LMU registers.Used when (IFXFFT_FFT_OPTIMIZED == 0)
IfxDma_Dma_Channel | outputDmaChannel | Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0)
Ifx_SRC_SRCR_Bits | srcrOutDis | Cache of discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Ifx_SRC_SRCR_Bits | srcrOutEnd | Cache of end of output DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)

◆ IfxFft_Fft_Count64

struct IfxFft_Fft_Count64

Structure for counters.

Definition at line 255 of file IfxFft_Fft.h.

Data Fields
uint16 | expect | Padding.
uint16 | input | Input count.
uint16 | output | Output count.
uint16 | result | Discard.

◆ IfxFft_Fft_Config

struct IfxFft_Fft_Config

Configuration structure of the module.

Definition at line 269 of file IfxFft_Fft.h.

Data Fields
IfxDma_ChannelId | discardDmaChannelId | DMA channel for discarding unused samples. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Ifx_FFT * | fft | Pointer to FFT registers.Used when (IFXFFT_FFT_OPTIMIZED == 0)
IfxDma_ChannelId | inputDmaChannelId | Input DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Ifx_Priority | inputPriority | "input loading finished" interrupt priority
Ifx_Priority | intraPriority | "intra transfer" interrupt priority
Ifx_LMU * | lmu | Pointer to LMU registers.Used when (IFXFFT_FFT_OPTIMIZED == 0)
IfxDma_ChannelId | outputDmaChannelId | Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Ifx_Priority | outputPriority | "output unloading finished" interrupt priority
IfxSrc_Tos | typeOfService | Type of interrupt service.

◆ IfxFft_Fft_JobConfig

struct IfxFft_Fft_JobConfig

Configuration structure for the FFT job.

Definition at line 284 of file IfxFft_Fft.h.

Collaboration diagram for IfxFft_Fft_JobConfig:
[legend]
Data Fields
IfxFft_Fft * | fft | Pointer To FFT.Used when (IFXFFT_FFT_OPTIMIZED == 0)
IfxFft_Length | fftLength | Length of the transform.
IfxFft_Input | inputFormat | Input format.
uint16 | inputLength | Length of the input.
IFX_CONST void * | inputPtr | Pointer to input data.
IfxFft_Operation | operation | Operation (FFT / IFFT)
IfxFft_Output | outputFormat | Output format.
uint16 | outputLength | Length of the output.
void * | outputPtr | Pointer to output data.
boolean | useWindowFunction | Selection to use window function.

◆ IfxFft_Fft_Job_s

struct IfxFft_Fft_Job_s

FFT job handle.

Definition at line 300 of file IfxFft_Fft.h.

Collaboration diagram for IfxFft_Fft_Job_s:
[legend]
Data Fields
IfxFft_Fft_Count64 | count64 | Counters.
Ifx_FFT_CSR | csr | FFT.CSR register duplicate.
IfxFft_Fft * | fft | Pointer to FFT registers. Used when (IFXFFT_FFT_OPTIMIZED == 0)
IFX_CONST void * | inputPtr | Input pointer.
IfxFft_Fft_Job * | nextJob | Pointer to the next job.
void * | outputPtr | Output pointer.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » FFT » FFT
Collaboration diagram for Module Functions:

Functions

IFX_STATIC uint32 | IfxFft_Fft_calcCSR (const IfxFft_Fft_JobConfig *config)
Configures the CSR register. More...
IFX_EXTERN void | IfxFft_Fft_initModule (IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxFft_Fft_initModuleConfig (IfxFft_Fft_Config *config, Ifx_FFT *fft, Ifx_LMU *lmu)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxFft_Fft_calcCSR()

IFX_STATIC uint32 IfxFft_Fft_calcCSR ( const IfxFft_Fft_JobConfig * config )

Configures the CSR register.

Parameters
config Configuration structure for the FFT job
Returns
Desired value to write into the Ifx_FFT.CSR register

Definition at line 133 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_initJob().

◆ IfxFft_Fft_initModule()

IFX_EXTERN void IfxFft_Fft_initModule | ( | IfxFft_Fft * | fft,
 |  | const IfxFft_Fft_Config * | config
 | ) |  |

Initialises the module.

Parameters
fft | Module handle
config | Configuration structure of the module
Returns
None

A coding example can be found in How to use the FFT driver?

Definition at line 277 of file IfxFft_Fft.c.

◆ IfxFft_Fft_initModuleConfig()

IFX_EXTERN void IfxFft_Fft_initModuleConfig | ( | IfxFft_Fft_Config * | config,
 |  | Ifx_FFT * | fft,
 |  | Ifx_LMU * | lmu
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure of the module
fft | Pointer to FFT registers
lmu | Pointer to LMU registers
Returns
None

A coding example can be found in How to use the FFT driver?

Definition at line 327 of file IfxFft_Fft.c.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » FFT » FFT
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN void | IfxFft_Fft_isrInput (IfxFft_Fft *fft)
ISR input routine. More...
IFX_EXTERN void | IfxFft_Fft_isrOutput (IfxFft_Fft *fft)
ISR output routine. More...

Detailed Description

Function Documentation

◆ IfxFft_Fft_isrInput()

IFX_EXTERN void IfxFft_Fft_isrInput ( IfxFft_Fft * fft )

ISR input routine.

Parameters
fft Module handle
Returns
None

Definition at line 377 of file IfxFft_Fft.c.

◆ IfxFft_Fft_isrOutput()

IFX_EXTERN void IfxFft_Fft_isrOutput ( IfxFft_Fft * fft )

ISR output routine.

Parameters
fft Module handle
Returns
None

Definition at line 420 of file IfxFft_Fft.c.


iLLD_TC26B: Transform Funtions

Functions
Transform Funtions
iLLD » FFT » FFT
Collaboration diagram for Transform Funtions:

Functions

IFX_STATIC void | IfxFft_Fft_unloadOutput (IfxFft_Fft_Job *job)
Unloads output data from the FFT engine. More...
IFX_STATIC void | IfxFft_Fft_loadInput (IfxFft_Fft_Job *job)
Loads input data into the FFT engine. More...
IFX_EXTERN void | IfxFft_Fft_cloneAndLinkJobs (IfxFft_Fft_Job *originalJob, IfxFft_Fft_Job *newJob)
Clones and links the jobs. More...
IFX_EXTERN void | IfxFft_Fft_initJob (IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
Initialises the FFT job. More...
IFX_EXTERN void | IfxFft_Fft_initJobConfig (IfxFft_Fft_JobConfig *config, IfxFft_Fft *fft)
Fills the job configuration structure with default values. More...
IFX_EXTERN void | IfxFft_Fft_initWindow (IfxFft_Fft *fft, const uint64 *windowData)
Initialises the window transfer. More...
IFX_EXTERN void | IfxFft_Fft_modifyDataPointers (IfxFft_Fft_Job *job, const void *inputPtr, void *outputPtr)
Updates the input and output pointers in the FFT job handle. More...
IFX_EXTERN boolean | IfxFft_Fft_startJob (IfxFft_Fft_Job *job)
Starts the FFT job. More...

Detailed Description

Function Documentation

◆ IfxFft_Fft_cloneAndLinkJobs()

IFX_EXTERN void IfxFft_Fft_cloneAndLinkJobs | ( | IfxFft_Fft_Job * | originalJob,
 |  | IfxFft_Fft_Job * | newJob
 | ) |  |

Clones and links the jobs.

Parameters
originalJob | Current (original)FFT job handle
newJob | Modified (new) FFT job handle
Returns
None

Definition at line 145 of file IfxFft_Fft.c.

◆ IfxFft_Fft_initJob()

IFX_EXTERN void IfxFft_Fft_initJob | ( | IfxFft_Fft_Job * | job,
 |  | const IfxFft_Fft_JobConfig * | jobConfig
 | ) |  |

Initialises the FFT job.

Parameters
job | FFT job handle
jobConfig | Configuration structure for the FFT job
Returns
None

A coding example can be found in How to use the FFT driver?

Definition at line 232 of file IfxFft_Fft.c.

◆ IfxFft_Fft_initJobConfig()

IFX_EXTERN void IfxFft_Fft_initJobConfig | ( | IfxFft_Fft_JobConfig * | config,
 |  | IfxFft_Fft * | fft
 | ) |  |

Fills the job configuration structure with default values.

Parameters
config | Configuration structure for the FFT job
fft | Module handle
Returns
None

A coding example can be found in How to use the FFT driver?

Definition at line 262 of file IfxFft_Fft.c.

◆ IfxFft_Fft_initWindow()

IFX_EXTERN void IfxFft_Fft_initWindow | ( | IfxFft_Fft * | fft,
 |  | const uint64 * | windowData
 | ) |  |

Initialises the window transfer.

Parameters
fft | Module handle
windowData | Window data
Returns
None

Definition at line 353 of file IfxFft_Fft.c.

◆ IfxFft_Fft_loadInput()

IFX_STATIC void IfxFft_Fft_loadInput ( IfxFft_Fft_Job * job )

Loads input data into the FFT engine.

Parameters
job FFT job handle
Returns
None

Definition at line 485 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_startJob().

◆ IfxFft_Fft_modifyDataPointers()

IFX_EXTERN void IfxFft_Fft_modifyDataPointers | ( | IfxFft_Fft_Job * | job,
 |  | const void * | inputPtr,
 |  | void * | outputPtr
 | ) |  |

Updates the input and output pointers in the FFT job handle.

Parameters
job | FFT job handle
inputPtr | Input pointer
outputPtr | Output pointer
Returns
None

Definition at line 524 of file IfxFft_Fft.c.

◆ IfxFft_Fft_startJob()

IFX_EXTERN boolean IfxFft_Fft_startJob ( IfxFft_Fft_Job * job )

Starts the FFT job.

Parameters
job FFT job handle
Returns
Module's ready for start (RFS) status (true / false)

A coding example can be found in How to use the FFT driver?

Definition at line 531 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_isrInput(), and IfxFft_Fft_isrOutput().

◆ IfxFft_Fft_unloadOutput()

IFX_STATIC void IfxFft_Fft_unloadOutput ( IfxFft_Fft_Job * job )

Unloads output data from the FFT engine.

Parameters
job FFT job handle
Returns
None

Definition at line 152 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_isrInput(), IfxFft_Fft_isrIntra(), and IfxFft_Fft_isrOutput().


iLLD_TC26B: IfxFft_cfg.h File Reference

  • _Impl
Macros
IfxFft_cfg.h File Reference
iLLD » FFT

FFT on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXFFT_DATA_SPACE 0xBE000000U
Data space starting address. More...
#define | IFXFFT_WINDOW_SPACE 0xBE100000U
Window coefficient space starting address. More...
#define | IFXFFT_MAX_LENGTH 2048
Maximim possible length of the transform. More...
#define | IFXFFT_MAX_WINDOW_LENGTH (IFXFFT_MAX_LENGTH / 2)
#define | IFXFFT_FFT_DMA_SUPPORT (1)
#define | IFXFFT_FFT_OPTIMIZED (0)
#define | IFXFFT_FFT_DMA_CHANNEL_BASE 4
#define | IFXFFT_FFT_PIPELINED (1)
#define | IFXFFT_FFT_NUM_JOBS (8)
#define | IFXFFT_NUM_MODULES (1)

Detailed Description

FFT on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFft_cfg.h.

Macro Definition Documentation

◆ IFXFFT_DATA_SPACE

#define IFXFFT_DATA_SPACE 0xBE000000U

Data space starting address.

Definition at line 62 of file IfxFft_cfg.h.

Referenced by IfxFft_Fft_initDma().

◆ IFXFFT_FFT_DMA_CHANNEL_BASE

#define IFXFFT_FFT_DMA_CHANNEL_BASE 4

Definition at line 78 of file IfxFft_cfg.h.

Referenced by IfxFft_Fft_initModuleConfig().

◆ IFXFFT_FFT_DMA_SUPPORT

#define IFXFFT_FFT_DMA_SUPPORT (1)

Definition at line 74 of file IfxFft_cfg.h.

◆ IFXFFT_FFT_NUM_JOBS

#define IFXFFT_FFT_NUM_JOBS (8)

Definition at line 82 of file IfxFft_cfg.h.

Referenced by IfxFft_Fft_isrInput().

◆ IFXFFT_FFT_OPTIMIZED

#define IFXFFT_FFT_OPTIMIZED (0)

Definition at line 76 of file IfxFft_cfg.h.

◆ IFXFFT_FFT_PIPELINED

#define IFXFFT_FFT_PIPELINED (1)

Definition at line 80 of file IfxFft_cfg.h.

◆ IFXFFT_MAX_LENGTH

#define IFXFFT_MAX_LENGTH 2048

Maximim possible length of the transform.

Definition at line 70 of file IfxFft_cfg.h.

Referenced by IfxFft_Fft_initJob().

◆ IFXFFT_MAX_WINDOW_LENGTH

#define IFXFFT_MAX_WINDOW_LENGTH (IFXFFT_MAX_LENGTH / 2)

Definition at line 72 of file IfxFft_cfg.h.

Referenced by IfxFft_Fft_initWindow().

◆ IFXFFT_NUM_MODULES

#define IFXFFT_NUM_MODULES (1)

Definition at line 84 of file IfxFft_cfg.h.

◆ IFXFFT_WINDOW_SPACE

#define IFXFFT_WINDOW_SPACE 0xBE100000U

Window coefficient space starting address.

Definition at line 66 of file IfxFft_cfg.h.

Referenced by IfxFft_Fft_initWindow().


iLLD_TC26B: IfxFft_Fft.h File Reference

  • Fft
  • Fft
Data Structures | Macros | Typedefs | Functions
IfxFft_Fft.h File Reference
iLLD » FFT

FFT FFT details. More...

#include "_Utilities/Ifx_Assert.h"
#include "IfxFft_bf.h"
#include "Fft/Std/IfxFft.h"
#include "Dma/Dma/IfxDma_Dma.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxFft_Fft.h:

Go to the source code of this file.

Data Structures

struct | IfxFft_Fft
Module handle. More...
struct | IfxFft_Fft_Count64
Structure for counters. More...
struct | IfxFft_Fft_Config
Configuration structure of the module. More...
struct | IfxFft_Fft_JobConfig
Configuration structure for the FFT job. More...
struct | IfxFft_Fft_Job_s
FFT job handle. More...

Macros

#define | IFXFFT_FFT_FLAG_INPUT (1)
#define | IFXFFT_FFT_FLAG_DONE (2)
#define | IFXFFT_FFT_HW_EXEC (1)

Typedefs

typedef struct IfxFft_Fft_Job_s IfxFft_Fft_Job

Functions

IFX_EXTERN void | IfxFft_Fft_initModule (IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxFft_Fft_initModuleConfig (IfxFft_Fft_Config *config, Ifx_FFT *fft, Ifx_LMU *lmu)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxFft_Fft_isrInput (IfxFft_Fft *fft)
ISR input routine. More...
IFX_EXTERN void | IfxFft_Fft_isrOutput (IfxFft_Fft *fft)
ISR output routine. More...
IFX_EXTERN void | IfxFft_Fft_cloneAndLinkJobs (IfxFft_Fft_Job *originalJob, IfxFft_Fft_Job *newJob)
Clones and links the jobs. More...
IFX_EXTERN void | IfxFft_Fft_initJob (IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
Initialises the FFT job. More...
IFX_EXTERN void | IfxFft_Fft_initJobConfig (IfxFft_Fft_JobConfig *config, IfxFft_Fft *fft)
Fills the job configuration structure with default values. More...
IFX_EXTERN void | IfxFft_Fft_initWindow (IfxFft_Fft *fft, const uint64 *windowData)
Initialises the window transfer. More...
IFX_EXTERN void | IfxFft_Fft_modifyDataPointers (IfxFft_Fft_Job *job, const void *inputPtr, void *outputPtr)
Updates the input and output pointers in the FFT job handle. More...
IFX_EXTERN boolean | IfxFft_Fft_startJob (IfxFft_Fft_Job *job)
Starts the FFT job. More...
IFX_INLINE void | IfxFft_Fft_triggerEngine (Ifx_FFT *fft, uint32 csr)
IFX_EXTERN void | IfxFft_Fft_isrIntra (IfxFft_Fft *fft)
IFX_EXTERN void | IfxFft_Fft_initDma (IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialization of DMA. More...

Detailed Description

FFT FFT details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFft_Fft.h.

Macro Definition Documentation

◆ IFXFFT_FFT_FLAG_DONE

#define IFXFFT_FFT_FLAG_DONE (2)

Definition at line 220 of file IfxFft_Fft.h.

Referenced by IfxFft_Fft_isrInput(), IfxFft_Fft_isrIntra(), and IfxFft_Fft_isrOutput().

◆ IFXFFT_FFT_FLAG_INPUT

#define IFXFFT_FFT_FLAG_INPUT (1)

Definition at line 218 of file IfxFft_Fft.h.

Referenced by IfxFft_Fft_isrInput(), IfxFft_Fft_isrIntra(), and IfxFft_Fft_isrOutput().

◆ IFXFFT_FFT_HW_EXEC

#define IFXFFT_FFT_HW_EXEC (1)

Definition at line 222 of file IfxFft_Fft.h.

Typedef Documentation

◆ IfxFft_Fft_Job

typedef struct IfxFft_Fft_Job_s IfxFft_Fft_Job

Definition at line 228 of file IfxFft_Fft.h.

Function Documentation

◆ IfxFft_Fft_initDma()

IFX_EXTERN void IfxFft_Fft_initDma | ( | IfxFft_Fft * | fft,
 |  | const IfxFft_Fft_Config * | config
 | ) |  |

Initialization of DMA.

Parameters
fft | fft Module handle
config | pointing to config strucuture of fft
Returns
None

Definition at line 640 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_initModule().

◆ IfxFft_Fft_isrIntra()

IFX_EXTERN void IfxFft_Fft_isrIntra ( IfxFft_Fft * fft )
Returns
None

Definition at line 606 of file IfxFft_Fft.c.

◆ IfxFft_Fft_triggerEngine()

IFX_INLINE void IfxFft_Fft_triggerEngine | ( | Ifx_FFT * | fft,
 |  | uint32 | csr
 | ) |  |
Returns
None

Definition at line 452 of file IfxFft_Fft.h.

Referenced by IfxFft_Fft_startJob().


iLLD_TC26B: IfxFft.h File Reference

  • Fft
  • Std
Enumerations | Functions
IfxFft.h File Reference
iLLD » FFT

FFT basic functionality. More...

#include "_Impl/IfxFft_cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Src/Std/IfxSrc.h"
#include "IfxFft_reg.h"
#include "IfxLmu_reg.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxFft.h:

Go to the source code of this file.

Enumerations

enum IfxFft_Input {
IfxFft_Input_complexSInt32 = 0,
IfxFft_Input_realSInt32 = 1,
IfxFft_Input_complexSInt16 = 2,
IfxFft_Input_realSInt16 = 3
}
Input format Definition in Ifx_FFT.CSR.B.IN.FMT. More...
enum IfxFft_Length {
IfxFft_Length_8 = 3,
IfxFft_Length_16 = 4,
IfxFft_Length_32 = 5,
IfxFft_Length_64 = 6,
IfxFft_Length_128 = 7,
IfxFft_Length_256 = 8,
IfxFft_Length_512 = 9,
IfxFft_Length_1024 = 10
}
Length of transform. Log base 2 of the required transform size. Length must be between 3 (transform of 8) and 11 (transform of 2048). Definition in Ifx_FFT.CSR.B.LENGTH. More...
enum IfxFft_Operation {
IfxFft_Operation_fft = 0,
IfxFft_Operation_ifft = 1
}
Operation (FFT / IFFT) Definition in Ifx_FFT.CSR.B.IFFT. More...
enum IfxFft_Output {
IfxFft_Output_complexSInt32 = 0,
IfxFft_Output_complexSInt16 = 1
}
Output format Definition in Ifx_FFT.CSR.B.OUT.FMT. More...
enum IfxFft_SuspendMode {
IfxFft_SuspendMode_none = 0,
IfxFft_SuspendMode_hard = 1,
IfxFft_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Functions

IFX_INLINE void | IfxFft_disableModule (Ifx_FFT *fft, Ifx_LMU *lmu)
Disables the FFT module and also the LMU interface. More...
IFX_INLINE void | IfxFft_enableModule (Ifx_FFT *fft, Ifx_LMU *lmu)
Enables the FFT module and also the LMU interface. More...
IFX_INLINE IfxFft_Input | IfxFft_getInputFormat (Ifx_FFT *fft)
Returns the input format. More...
IFX_INLINE IfxFft_Length | IfxFft_getLength (Ifx_FFT *fft)
Returns the length of the transform (length code, 3 to 10) More...
IFX_INLINE IfxFft_Length | IfxFft_getLengthCode (uint16 length)
Converts the given input length into the transform length code, to write into Ifx_FFT.CSR.B.LENGTH. More...
IFX_INLINE uint16 | IfxFft_getLengthFromCode (IfxFft_Length length)
Retruns the actual length of the transform from the length code. More...
IFX_INLINE IfxFft_Output | IfxFft_getOutputFormat (Ifx_FFT *fft)
Returns the output format. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxFft_getSrcPointerDone (Ifx_FFT *fft)
Returns the status of FFT DONE request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxFft_getSrcPointerRfs (Ifx_FFT *fft)
Returns the status of FFT RFS request. More...
IFX_INLINE uint16 | IfxFft_getTransformLength (Ifx_FFT *fft)
Returns the actual length of the transform. More...
IFX_INLINE boolean | IfxFft_isEngineBusy (Ifx_FFT *fft)
Returns the status of whether the FFT Engine is Idle or has at least one transform in operation. More...
IFX_INLINE boolean | IfxFft_isModuleEnabled (Ifx_FFT *fft)
Returns the status of whether the module is enabled or not. More...
IFX_INLINE boolean | IfxFft_isModuleSuspended (Ifx_FFT *fft)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE boolean | IfxFft_isReadyForStart (Ifx_FFT *fft)
Returns the status of whether the module can accept a START operation or not. More...
IFX_INLINE void | IfxFft_setSuspendMode (Ifx_FFT *fft, IfxFft_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...

Detailed Description

FFT basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFft.h.


iLLD_TC26B: FLASH

Modules | Files
FLASH
iLLD
Collaboration diagram for FLASH:

Modules

Implementation
Standard Driver

Files

file | IfxFlash_cfg.h
FLASH on-chip implementation data.
file | IfxFlash.h
FLASH basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » FLASH
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » FLASH
Collaboration diagram for Standard Driver:

Modules

Enumerations
CommandSequence Functions
Error Tracking Functions

Detailed Description


iLLD_TC26B: Enumerations

Data Structures | Enumerations
Enumerations
iLLD » FLASH » Standard Driver
Collaboration diagram for Enumerations:

Data Structures

struct IfxFlash_ErrorTracking_Address
Error tracking address structure. More...

Enumerations

enum IfxFlash_ErrorTracking {
IfxFlash_ErrorTracking_none = 0,
IfxFlash_ErrorTracking_correctedSingleBitError = 1,
IfxFlash_ErrorTracking_correctedDoubleBitError = 2,
IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError = 3,
IfxFlash_ErrorTracking_uncorrectableMultiBitError = 4
}
enumeration for Flash Error tracking More...
enum IfxFlash_PortId {
IfxFlash_PortId_PortId_0 = 0,
IfxFlash_PortId_PortId_1 = 1
}
Corrected/UnCorrected Bits Address Buffer Port Id. More...

Detailed Description

Data Structure Documentation

◆ IfxFlash_ErrorTracking_Address

struct IfxFlash_ErrorTracking_Address

Error tracking address structure.

Definition at line 96 of file IfxFlash.h.

Data Fields
uint32 | address | Flash address for error tracking.
IfxFlash_ErrorTracking | errorType | Error type.

Enumeration Type Documentation

◆ IfxFlash_ErrorTracking

enum IfxFlash_ErrorTracking

enumeration for Flash Error tracking

Enumerator
IfxFlash_ErrorTracking_none | Error tracking disabled.
IfxFlash_ErrorTracking_correctedSingleBitError | corrected single bit errors
IfxFlash_ErrorTracking_correctedDoubleBitError | Corrected double-bit errors.
IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError | Corrected single-bit and double-bit errors.
IfxFlash_ErrorTracking_uncorrectableMultiBitError | Detected uncorrectable errors.

Definition at line 69 of file IfxFlash.h.

◆ IfxFlash_PortId

enum IfxFlash_PortId

Corrected/UnCorrected Bits Address Buffer Port Id.

Enumerator
IfxFlash_PortId_PortId_0 | Port Id 0.
IfxFlash_PortId_PortId_1 | Port Id 1.

Definition at line 80 of file IfxFlash.h.


iLLD_TC26B: CommandSequence Functions

Functions
CommandSequence Functions
iLLD » FLASH » Standard Driver
Collaboration diagram for CommandSequence Functions:

Functions

IFX_INLINE void | IfxFlash_clearStatus (uint32 flash)
Performs the "Clear Status" sequence. Operation and error flags are cleared. More...
IFX_INLINE uint8 | IfxFlash_enterPageMode (uint32 pageAddr)
Performs the sequence for entering program page mode. More...
IFX_INLINE void | IfxFlash_eraseMultiplePhysicalSectors (uint32 sectorAddr, uint32 numSector)
Performs the erase sequence for n sectors in program or data flash. More...
IFX_INLINE void | IfxFlash_eraseMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the erase sequence for n sectors in program or data flash. More...
IFX_INLINE void | IfxFlash_erasePhysicalSector (uint32 sectorAddr)
Performs the erase sequence for a physical sector in program or data flash. More...
IFX_INLINE void | IfxFlash_eraseSector (uint32 sectorAddr)
Performs the erase sequence for a sector in program or data flash. More...
IFX_INLINE void | IfxFlash_eraseVerifyMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the "Erase Verify" sequence for multiple sectors. More...
IFX_INLINE void | IfxFlash_eraseVerifySector (uint32 sectorAddr)
Performs the "Erase Verify" sequence. More...
IFX_INLINE void | IfxFlash_loadPage (uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with a single 64bit access More...
IFX_INLINE void | IfxFlash_loadPage2X32 (uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with two 32bit accesses More...
IFX_INLINE void | IfxFlash_resetToRead (uint32 flash)
reset to read mode More...
IFX_INLINE void | IfxFlash_resumeProtection (uint32 flash)
Performs the "Resume Protection" sequence. More...
IFX_INLINE void | IfxFlash_suspendResumeMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the "Suspend Resume" sequence for multiple sectors. More...
IFX_INLINE void | IfxFlash_suspendResumeSector (uint32 sectorAddr)
Performs the "Suspend Resume" sequence. More...
IFX_INLINE uint8 | IfxFlash_waitUnbusy (uint32 flash, IfxFlash_FlashType flashType)
Polls the selected status flag in flash status register until it turns to 0. More...
IFX_INLINE void | IfxFlash_writeBurst (uint32 pageAddr)
Performs the "Write Burst" sequence, similar to write page but performs a burst transfer instead of page.Make sure the appropriate amount of data is loaded using load page command. More...
IFX_INLINE void | IfxFlash_writePage (uint32 pageAddr)
Performs the "Write Page" sequence. More...
IFX_INLINE void | IfxFlash_writePageOnce (uint32 pageAddr)
Performs the "Write Page Once" sequence, similar to write page but performs a program verify after writing. More...
IFX_EXTERN void | IfxFlash_disableWriteProtection (uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled. The command fails by setting PROER when any of the supplied PWs does not match. In this case until the next application reset all further calls of "Disable Protection" fail with PROER independent of the supplied password. More...

Detailed Description

Function Documentation

◆ IfxFlash_clearStatus()

IFX_INLINE void IfxFlash_clearStatus ( uint32 flash )

Performs the "Clear Status" sequence. Operation and error flags are cleared.

Parameters
flash selects the flash (PMU) module
Returns
None

Definition at line 499 of file IfxFlash.h.

◆ IfxFlash_disableWriteProtection()

IFX_EXTERN void IfxFlash_disableWriteProtection | ( | uint32 | flash,
 |  | IfxFlash_UcbType | ucb,
 |  | uint32 * | password
 | ) |  |

The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled. The command fails by setting PROER when any of the supplied PWs does not match. In this case until the next application reset all further calls of "Disable Protection" fail with PROER independent of the supplied password.

Parameters
flash | selects the flash (PMU) module
ucb | selects the user configuration block (0 for UCB0, 1 for UCB1, 5 for UCB_HSMC)
password | password pointer to an array of 8 words
Returns
None

Definition at line 77 of file IfxFlash.c.

◆ IfxFlash_enterPageMode()

IFX_INLINE uint8 IfxFlash_enterPageMode ( uint32 pageAddr )

Performs the sequence for entering program page mode.

Parameters
pageAddr pageAddr specifies the page being written - the command sequence will be varied accordingly
Returns
0 on success, != 0 if invalid or not available page is selected

Usage Example:

unsigned int pageAddr = IFXFLASH_DFLASH_START + page*IFXFLASH_DFLASH_PAGE_LENGTH;
// enter page mode
IfxFlash_enterPageMode(pageAddr);

Definition at line 510 of file IfxFlash.h.

◆ IfxFlash_eraseMultiplePhysicalSectors()

IFX_INLINE void IfxFlash_eraseMultiplePhysicalSectors | ( | uint32 | sectorAddr,
 |  | uint32 | numSector
 | ) |  |

Performs the erase sequence for n sectors in program or data flash.

Parameters
sectorAddr | sector address
numSector | the no.of sectors to be erased
Returns
None

Usage Example:

// erase the first and second data flash
IfxFlash_eraseMultiplePhysicalSectors(IFXFLASH_DFLASH_START,2);

Definition at line 530 of file IfxFlash.h.

◆ IfxFlash_eraseMultipleSectors()

IFX_INLINE void IfxFlash_eraseMultipleSectors | ( | uint32 | sectorAddr,
 |  | uint32 | numSector
 | ) |  |

Performs the erase sequence for n sectors in program or data flash.

Parameters
sectorAddr | sector address
numSector | the no.of sectors to be erased
Returns
None

Usage Example:

// erase logical sectors of program flash
IfxFlash_eraseMultipleSectors(pFlashTableLog[sector].start,2);

Definition at line 546 of file IfxFlash.h.

◆ IfxFlash_erasePhysicalSector()

IFX_INLINE void IfxFlash_erasePhysicalSector ( uint32 sectorAddr )

Performs the erase sequence for a physical sector in program or data flash.

Parameters
sectorAddr sector address
Returns
None

Usage Example:

// erase the first data flash
IfxFlash_erasePhysicalSector(IFXFLASH_DFLASH_START);

Definition at line 562 of file IfxFlash.h.

◆ IfxFlash_eraseSector()

IFX_INLINE void IfxFlash_eraseSector ( uint32 sectorAddr )

Performs the erase sequence for a sector in program or data flash.

Parameters
sectorAddr sector address
Returns
None

Usage Example:

// erase all sectors of program flash
for(sector=0; sector<IFXFLASH_PFLASH_NO_OF_LOG_SECTORS; ++sector) {
// get address from predefined table
unsigned int sector_addr = pFlashTableLog[sector].start;
// erase sector
IfxFlash_eraseSector(sector_addr);
}

Definition at line 578 of file IfxFlash.h.

◆ IfxFlash_eraseVerifyMultipleSectors()

IFX_INLINE void IfxFlash_eraseVerifyMultipleSectors | ( | uint32 | sectorAddr,
 |  | uint32 | numSector
 | ) |  |

Performs the "Erase Verify" sequence for multiple sectors.

Parameters
sectorAddr | sector address which should be verified
numSector | no.of sectors to be operated on
Returns
None

Definition at line 594 of file IfxFlash.h.

◆ IfxFlash_eraseVerifySector()

IFX_INLINE void IfxFlash_eraseVerifySector ( uint32 sectorAddr )

Performs the "Erase Verify" sequence.

Parameters
sectorAddr sector address which should be verified
Returns
None

Definition at line 610 of file IfxFlash.h.

◆ IfxFlash_loadPage()

IFX_INLINE void IfxFlash_loadPage | ( | uint32 | pageAddr,
 |  | uint32 | wordL,
 |  | uint32 | wordU
 | ) |  |

performs a load page sequence with a single 64bit access

Parameters
pageAddr | pageAddr start address of page which should be programmed
wordL | Lower Address word
wordU | Upper address word
Returns
None

Usage Example:

// load 64bit into assembly buffer of program flash
IfxFlash_loadPage(IFXFLASH_PFLASH_START, 0x55555555, 0xaaaaaaaa);
// load 64bit into assembly buffer of data flash
IfxFlash_loadPage(0XAF000000, 0x55555555, 0xaaaaaaaa);

Definition at line 626 of file IfxFlash.h.

◆ IfxFlash_loadPage2X32()

IFX_INLINE void IfxFlash_loadPage2X32 | ( | uint32 | pageAddr,
 |  | uint32 | wordL,
 |  | uint32 | wordU
 | ) |  |

performs a load page sequence with two 32bit accesses

Parameters
pageAddr | pageAddr start address of page which should be programmed
wordL | Lower Address word
wordU | Upper Address word
Returns
None

Usage Example:

// load 2*32bit into assembly buffer of program flash
IfxFlash_loadPage2X32(IFXFLASH_PFLASH_START, 0x55555555, 0xaaaaaaaa);
// load 2*32bit into assembly buffer of data flash
IfxFlash_loadPage2X32(0XAF000000, 0x55555555, 0xaaaaaaaa);

Definition at line 637 of file IfxFlash.h.

◆ IfxFlash_resetToRead()

IFX_INLINE void IfxFlash_resetToRead ( uint32 flash )

reset to read mode

Parameters
flash flash selects the flash (PMU) module
Returns
None

Usage Example:

// reset to read mode
IfxFlash_resetToRead(0);

Definition at line 651 of file IfxFlash.h.

◆ IfxFlash_resumeProtection()

IFX_INLINE void IfxFlash_resumeProtection ( uint32 flash )

Performs the "Resume Protection" sequence.

Parameters
flash selects the flash (PMU) module
Returns
None

Definition at line 661 of file IfxFlash.h.

◆ IfxFlash_suspendResumeMultipleSectors()

IFX_INLINE void IfxFlash_suspendResumeMultipleSectors | ( | uint32 | sectorAddr,
 |  | uint32 | numSector
 | ) |  |

Performs the "Suspend Resume" sequence for multiple sectors.

Parameters
sectorAddr | sector address
numSector | the no.of sectors to be operated on
Returns
None

Definition at line 673 of file IfxFlash.h.

◆ IfxFlash_suspendResumeSector()

IFX_INLINE void IfxFlash_suspendResumeSector ( uint32 sectorAddr )

Performs the "Suspend Resume" sequence.

Parameters
sectorAddr sector address which should be resumed
Returns
None

Definition at line 689 of file IfxFlash.h.

◆ IfxFlash_waitUnbusy()

IFX_INLINE uint8 IfxFlash_waitUnbusy | ( | uint32 | flash,
 |  | IfxFlash_FlashType | flashType
 | ) |  |

Polls the selected status flag in flash status register until it turns to 0.

Parameters
flash | selects the flash (PMU) module
flashType | selects the flash type
Returns
0 on success, != 0 if invalid or not available page is selected

Usage Example:

// wait until data flash 0 is unbusy
IfxFlash_waitUnbusy(0, IfxFlash_FlashType_D0);

Definition at line 705 of file IfxFlash.h.

◆ IfxFlash_writeBurst()

IFX_INLINE void IfxFlash_writeBurst ( uint32 pageAddr )

Performs the "Write Burst" sequence, similar to write page but performs a burst transfer instead of page.Make sure the appropriate amount of data is loaded using load page command.

Parameters
pageAddr start address of page which should be programmed
Returns
None

Usage Example:

// program the second page of the first sector of the Program Flash
IfxFlash_writeBurst(0xa0000100);

Definition at line 729 of file IfxFlash.h.

◆ IfxFlash_writePage()

IFX_INLINE void IfxFlash_writePage ( uint32 pageAddr )

Performs the "Write Page" sequence.

Parameters
pageAddr start address of page which should be programmed
Returns
None

Usage Example:

// program the second page of the first sector of the Program Flash
IfxFlash_writePage(0xa0000100);

Definition at line 745 of file IfxFlash.h.

◆ IfxFlash_writePageOnce()

IFX_INLINE void IfxFlash_writePageOnce ( uint32 pageAddr )

Performs the "Write Page Once" sequence, similar to write page but performs a program verify after writing.

Parameters
pageAddr start address of page which should be programmed
Returns
None

Usage Example:

// program the second page of the first sector of the Program Flash
IfxFlash_writePageOnce(0xa0000100);

Definition at line 761 of file IfxFlash.h.


iLLD_TC26B: Error Tracking Functions

Functions
Error Tracking Functions
iLLD » FLASH » Standard Driver
Collaboration diagram for Error Tracking Functions:

Functions

IFX_EXTERN void | IfxFlash_clearCorrectableErrorTracking (IfxFlash_PortId portId)
Clear the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register. More...
IFX_EXTERN void | IfxFlash_clearUncorrectableErrorTracking (IfxFlash_PortId portId)
Select the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register. More...
IFX_EXTERN void | IfxFlash_disableCorrectableErrorTracking (IfxFlash_PortId portId, boolean disable)
Disable the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register. More...
IFX_EXTERN void | IfxFlash_disableUncorrectableErrorTracking (IfxFlash_PortId portId, boolean disable)
Clear the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register. More...
IFX_EXTERN uint32 | IfxFlash_getTrackedCorrectableErrors (IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked correctable error addresses, error types and number of errors which are stored in the CBAB registers. More...
IFX_EXTERN uint32 | IfxFlash_getTrackedUncorrectableErrors (IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked uncorrectable error addresses, error types and number of errors which are stored in the UBAB registers. More...
IFX_EXTERN void | IfxFlash_selectCorrectableErrorTracking (IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for correctable flash errors. More...
IFX_EXTERN void | IfxFlash_selectUncorrectableErrorTracking (IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for uncorrectable flash errors. More...

Detailed Description

Function Documentation

◆ IfxFlash_clearCorrectableErrorTracking()

IFX_EXTERN void IfxFlash_clearCorrectableErrorTracking ( IfxFlash_PortId portId )

Clear the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register.

Parameters
portId Corrected Bits Address Buffer Port Id
Returns
None

Definition at line 53 of file IfxFlash.c.

◆ IfxFlash_clearUncorrectableErrorTracking()

IFX_EXTERN void IfxFlash_clearUncorrectableErrorTracking ( IfxFlash_PortId portId )

Select the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register.

Parameters
portId UnCorrected Bits Address Buffer Port Id
Returns
None

Definition at line 59 of file IfxFlash.c.

◆ IfxFlash_disableCorrectableErrorTracking()

IFX_EXTERN void IfxFlash_disableCorrectableErrorTracking | ( | IfxFlash_PortId | portId,
 |  | boolean | disable
 | ) |  |

Disable the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register.

Parameters
portId | Corrected Bits Address Buffer Port Id
disable | Disable/enable the error tracking
Returns
None

Definition at line 65 of file IfxFlash.c.

◆ IfxFlash_disableUncorrectableErrorTracking()

IFX_EXTERN void IfxFlash_disableUncorrectableErrorTracking | ( | IfxFlash_PortId | portId,
 |  | boolean | disable
 | ) |  |

Clear the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register.

Parameters
portId | UnCorrected Bits Address Buffer Port Id
disable | Disable/enable the error tracking
Returns
None

Definition at line 71 of file IfxFlash.c.

◆ IfxFlash_getTrackedCorrectableErrors()

IFX_EXTERN uint32 IfxFlash_getTrackedCorrectableErrors | ( | IfxFlash_PortId | portId,
 |  | IfxFlash_ErrorTracking_Address * | trackedFlashAdresses
 | ) |  |

Returns the tracked correctable error addresses, error types and number of errors which are stored in the CBAB registers.

Parameters
portId | Corrected Bits Address Buffer Port Id
trackedFlashAdresses | tracked flash addresses for correctable errors
Returns
numErrors

Example usage to print out tracked errors :

{
IfxFlash_ErrorTracking_Address trackedAddresses[IFX_FLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS];
IfxFlash_portId portId = 0;
uint8 numTrackedAddresses = IfxFlash_getTrackedCorrectableErrors(portId, trackedAddresses);
for(int i=0; i<numTrackedAddresses; ++i) {
printf("%d: A:0x%04x Error Type:%d \n",
i,
trackedAddresses[i].address,
trackedAddresses[i].errorType);
}
}

Definition at line 94 of file IfxFlash.c.

◆ IfxFlash_getTrackedUncorrectableErrors()

IFX_EXTERN uint32 IfxFlash_getTrackedUncorrectableErrors | ( | IfxFlash_PortId | portId,
 |  | IfxFlash_ErrorTracking_Address * | trackedFlashAdresses
 | ) |  |

Returns the tracked uncorrectable error addresses, error types and number of errors which are stored in the UBAB registers.

Parameters
portId | UnCorrected Bits Address Buffer Port Id
trackedFlashAdresses | tracked flash addresses for uncorrectable errors
Returns
numErrors

Example usage to print out tracked errors :

{
IfxFlash_ErrorTracking_Address trackedAddresses[IFX_FLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS];
IfxFlash_portId portId = 0;
uint8 numTrackedAddresses = IfxFlash_getTrackedUnCorrectableErrors(portId, trackedAddresses);
for(int i=0; i<numTrackedAddresses; ++i) {
printf("%d: A:0x%04x Error Type:%d \n",
i,
trackedAddresses[i].address,
trackedAddresses[i].errorType);
}
}

Definition at line 124 of file IfxFlash.c.

◆ IfxFlash_selectCorrectableErrorTracking()

IFX_EXTERN void IfxFlash_selectCorrectableErrorTracking | ( | IfxFlash_PortId | portId,
 |  | IfxFlash_ErrorTracking | errorTracking
 | ) |  |

Enables error tracking for correctable flash errors.

Parameters
portId | Corrected Bits Address Buffer Port Id
errorTracking | Error Tracking to be selected
Returns
None

Usage example: how to enable error tracking for two flash ports:

// enable error tracking
{
uint16 password = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(password);
// PFlash0
IfxFlash_selectCorrectableErrorTracking(IfxFlash_PortId_PortId_0, IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError);
IfxFlash_selectUncorrectableErrorTracking(IfxFlash_PortId_PortId_0, IfxFlash_ErrorTracking_uncorrectableMultiBitError);
// PFlash1
IfxFlash_selectCorrectableErrorTracking(IfxFlash_PortId_PortId_1, IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError);
IfxFlash_selectUncorrectableErrorTracking(IfxFlash_PortId_PortId_1, IfxFlash_ErrorTracking_uncorrectableMultiBitError);
IfxScuWdt_setCpuEndinit(password);
}

Definition at line 154 of file IfxFlash.c.

◆ IfxFlash_selectUncorrectableErrorTracking()

IFX_EXTERN void IfxFlash_selectUncorrectableErrorTracking | ( | IfxFlash_PortId | portId,
 |  | IfxFlash_ErrorTracking | errorTracking
 | ) |  |

Enables error tracking for uncorrectable flash errors.

Parameters
portId | UnCorrected Bits Address Buffer Port Id
errorTracking | Error Tracking to be selected
Returns
None

Usage example: see IfxFlash_selectCorrectableErrorTracking

Definition at line 166 of file IfxFlash.c.


iLLD_TC26B: IfxFlash_cfg.h File Reference

  • _Impl
Data Structures | Macros | Enumerations | Variables
IfxFlash_cfg.h File Reference
iLLD » FLASH

FLASH on-chip implementation data. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxFlash_cfg.h:

Go to the source code of this file.

Data Structures

struct IfxFlash_flashSector
contains start and end address of sectors More...

Macros

#define | IFXFLASH_NUM_FLASH_MODULES (1)
number of flash modules. This macro may be deprecated in future. Use IFXFLASH_NUM_MODULES instead. More...
#define | IFXFLASH_CMD_BASE_ADDRESS (0xaf000000)
base address for general command sequences More...
#define | IFXFLASH_CMD_BASE_OFFSET (0x00100000)
offset between command areas (in DFlash range) More...
#define | IFXFLASH_DFLASH_BANKS (1)
#define | IFXFLASH_DFLASH_BURST_LENGTH (0x20)
Dflash burst length. More...
#define | IFXFLASH_DFLASH_END (IFXFLASH_DFLASH_START + IFXFLASH_DFLASH_SIZE - 1)
#define | IFXFLASH_DFLASH_NUM_LOG_SECTORS (12)
#define | IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS (1)
Phy sector for DF. More...
#define | IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS (16)
#define | IFXFLASH_DFLASH_PAGE_LENGTH (8)
8 bytes More...
#define | IFXFLASH_DFLASH_SIZE (IFXFLASH_DFLASH_NUM_LOG_SECTORS * 0x2000)
#define | IFXFLASH_DFLASH_START (0xaf000000)
#define | IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS (10)
#define | IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS (1)
#define | IFXFLASH_NUM_MODULES (1)
number of flash modules More...
#define | IFXFLASH_PFLASH_BANKS (2)
#define | IFXFLASH_PFLASH_BURST_LENGTH (0x100)
P flash burst length. More...
#define | IFXFLASH_PFLASH_END ()
p flash end More...
#define | IFXFLASH_PFLASH_NUM_LOG_SECTORS (23 + 25)
#define | IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS (2 + 3)
#define | IFXFLASH_PFLASH_OFFSET (0x00800000)
offset between PMU PFlash ranges More...
#define | IFXFLASH_PFLASH_PAGE_LENGTH (32)
#define | IFXFLASH_PFLASH_SIZE (0x00280000)
p flash size More...
#define | IFXFLASH_PFLASH_START (0xa0000000)
p flash start More...

Enumerations

enum IfxFlash_FlashType {
IfxFlash_FlashType_Fa = 0,
IfxFlash_FlashType_D0 = 1,
IfxFlash_FlashType_D1 = 2,
IfxFlash_FlashType_P0 = 3,
IfxFlash_FlashType_P1 = 4,
IfxFlash_FlashType_P2 = 5,
IfxFlash_FlashType_P3 = 6
}
enum IfxFlash_UcbType {
IfxFlash_UcbType_ucb0 = 0,
IfxFlash_UcbType_ucb1 = 1,
IfxFlash_UcbType_ucbHsmc = 5
}
user configuration block type More...

Variables

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog [IFXFLASH_DFLASH_NUM_LOG_SECTORS]
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys [IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog [IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog [IFXFLASH_PFLASH_NUM_LOG_SECTORS]
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys [IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]

Detailed Description

FLASH on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFlash_cfg.h.

Data Structure Documentation

◆ IfxFlash_flashSector

struct IfxFlash_flashSector

contains start and end address of sectors

Definition at line 173 of file IfxFlash_cfg.h.

Data Fields
uint32 | end | end address of sector
uint32 | start | start address of sector

Macro Definition Documentation

◆ IFXFLASH_CMD_BASE_ADDRESS

#define IFXFLASH_CMD_BASE_ADDRESS (0xaf000000)

base address for general command sequences

Definition at line 69 of file IfxFlash_cfg.h.

Referenced by IfxFlash_clearStatus(), IfxFlash_disableWriteProtection(), IfxFlash_enterPageMode(), IfxFlash_eraseMultiplePhysicalSectors(), IfxFlash_eraseMultipleSectors(), IfxFlash_erasePhysicalSector(), IfxFlash_eraseSector(), IfxFlash_eraseVerifyMultipleSectors(), IfxFlash_eraseVerifySector(), IfxFlash_loadPage(), IfxFlash_loadPage2X32(), IfxFlash_resetToRead(), IfxFlash_resumeProtection(), IfxFlash_suspendResumeMultipleSectors(), IfxFlash_suspendResumeSector(), IfxFlash_writeBurst(), IfxFlash_writePage(), and IfxFlash_writePageOnce().

◆ IFXFLASH_CMD_BASE_OFFSET

#define IFXFLASH_CMD_BASE_OFFSET (0x00100000)

offset between command areas (in DFlash range)

Definition at line 73 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_BANKS

#define IFXFLASH_DFLASH_BANKS (1)

Definition at line 75 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_BURST_LENGTH

#define IFXFLASH_DFLASH_BURST_LENGTH (0x20)

Dflash burst length.

Definition at line 79 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_END

#define IFXFLASH_DFLASH_END (IFXFLASH_DFLASH_START + IFXFLASH_DFLASH_SIZE - 1)

Definition at line 81 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_NUM_LOG_SECTORS

#define IFXFLASH_DFLASH_NUM_LOG_SECTORS (12)

Definition at line 83 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS

#define IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS (1)

Phy sector for DF.

Definition at line 87 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS

#define IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS (16)

Definition at line 89 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_PAGE_LENGTH

#define IFXFLASH_DFLASH_PAGE_LENGTH (8)

8 bytes

Definition at line 93 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_SIZE

#define IFXFLASH_DFLASH_SIZE (IFXFLASH_DFLASH_NUM_LOG_SECTORS * 0x2000)

Definition at line 95 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_START

#define IFXFLASH_DFLASH_START (0xaf000000)

Definition at line 97 of file IfxFlash_cfg.h.

◆ IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS

#define IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS (10)

Definition at line 101 of file IfxFlash_cfg.h.

Referenced by IfxFlash_getTrackedCorrectableErrors().

◆ IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS

#define IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS (1)

Definition at line 105 of file IfxFlash_cfg.h.

Referenced by IfxFlash_getTrackedUncorrectableErrors().

◆ IFXFLASH_NUM_FLASH_MODULES

#define IFXFLASH_NUM_FLASH_MODULES (1)

number of flash modules. This macro may be deprecated in future. Use IFXFLASH_NUM_MODULES instead.

Definition at line 65 of file IfxFlash_cfg.h.

◆ IFXFLASH_NUM_MODULES

#define IFXFLASH_NUM_MODULES (1)

number of flash modules

Definition at line 109 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_BANKS

#define IFXFLASH_PFLASH_BANKS (2)

Definition at line 111 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_BURST_LENGTH

#define IFXFLASH_PFLASH_BURST_LENGTH (0x100)

P flash burst length.

Definition at line 115 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_END

#define IFXFLASH_PFLASH_END ()

p flash end

Definition at line 119 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_NUM_LOG_SECTORS

#define IFXFLASH_PFLASH_NUM_LOG_SECTORS (23 + 25)

Definition at line 123 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS

#define IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS (2 + 3)

Definition at line 125 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_OFFSET

#define IFXFLASH_PFLASH_OFFSET (0x00800000)

offset between PMU PFlash ranges

Definition at line 129 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_PAGE_LENGTH

#define IFXFLASH_PFLASH_PAGE_LENGTH (32)

Definition at line 131 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_SIZE

#define IFXFLASH_PFLASH_SIZE (0x00280000)

p flash size

Definition at line 135 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_START

#define IFXFLASH_PFLASH_START (0xa0000000)

p flash start

Definition at line 139 of file IfxFlash_cfg.h.

Enumeration Type Documentation

◆ IfxFlash_FlashType

enum IfxFlash_FlashType
Enumerator
IfxFlash_FlashType_Fa | Flash Array.
IfxFlash_FlashType_D0 | data flash #0
IfxFlash_FlashType_D1 | data flash #1
IfxFlash_FlashType_P0 | program flash #0
IfxFlash_FlashType_P1 | program flash #1
IfxFlash_FlashType_P2 | program flash #2
IfxFlash_FlashType_P3 | program flash #3

Definition at line 147 of file IfxFlash_cfg.h.

◆ IfxFlash_UcbType

enum IfxFlash_UcbType

user configuration block type

Enumerator
IfxFlash_UcbType_ucb0 | UCB 0.
IfxFlash_UcbType_ucb1 | UCB 1.
IfxFlash_UcbType_ucbHsmc | HSM UCB.

Definition at line 160 of file IfxFlash_cfg.h.

Variable Documentation

◆ IfxFlash_dFlashTableEepLog

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS]

Definition at line 183 of file IfxFlash_cfg.h.

◆ IfxFlash_dFlashTablePhys

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]

Definition at line 185 of file IfxFlash_cfg.h.

◆ IfxFlash_dFlashTableUcbLog

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]

Definition at line 187 of file IfxFlash_cfg.h.

◆ IfxFlash_pFlashTableLog

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS]

Definition at line 189 of file IfxFlash_cfg.h.

◆ IfxFlash_pFlashTablePhys

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]

Definition at line 191 of file IfxFlash_cfg.h.


iLLD_TC26B: IfxFlash.h File Reference

  • Flash
  • Std
Data Structures | Enumerations | Functions
IfxFlash.h File Reference
iLLD » FLASH

FLASH basic functionality. More...

#include "_Impl/IfxFlash_cfg.h"
#include "_Utilities/Ifx_Assert.h"
#include "IfxFlash_reg.h"
Include dependency graph for IfxFlash.h:

Go to the source code of this file.

Data Structures

struct IfxFlash_ErrorTracking_Address
Error tracking address structure. More...

Enumerations

enum IfxFlash_ErrorTracking {
IfxFlash_ErrorTracking_none = 0,
IfxFlash_ErrorTracking_correctedSingleBitError = 1,
IfxFlash_ErrorTracking_correctedDoubleBitError = 2,
IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError = 3,
IfxFlash_ErrorTracking_uncorrectableMultiBitError = 4
}
enumeration for Flash Error tracking More...
enum IfxFlash_PortId {
IfxFlash_PortId_PortId_0 = 0,
IfxFlash_PortId_PortId_1 = 1
}
Corrected/UnCorrected Bits Address Buffer Port Id. More...

Functions

IFX_INLINE void | IfxFlash_clearStatus (uint32 flash)
Performs the "Clear Status" sequence. Operation and error flags are cleared. More...
IFX_INLINE uint8 | IfxFlash_enterPageMode (uint32 pageAddr)
Performs the sequence for entering program page mode. More...
IFX_INLINE void | IfxFlash_eraseMultiplePhysicalSectors (uint32 sectorAddr, uint32 numSector)
Performs the erase sequence for n sectors in program or data flash. More...
IFX_INLINE void | IfxFlash_eraseMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the erase sequence for n sectors in program or data flash. More...
IFX_INLINE void | IfxFlash_erasePhysicalSector (uint32 sectorAddr)
Performs the erase sequence for a physical sector in program or data flash. More...
IFX_INLINE void | IfxFlash_eraseSector (uint32 sectorAddr)
Performs the erase sequence for a sector in program or data flash. More...
IFX_INLINE void | IfxFlash_eraseVerifyMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the "Erase Verify" sequence for multiple sectors. More...
IFX_INLINE void | IfxFlash_eraseVerifySector (uint32 sectorAddr)
Performs the "Erase Verify" sequence. More...
IFX_INLINE void | IfxFlash_loadPage (uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with a single 64bit access More...
IFX_INLINE void | IfxFlash_loadPage2X32 (uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with two 32bit accesses More...
IFX_INLINE void | IfxFlash_resetToRead (uint32 flash)
reset to read mode More...
IFX_INLINE void | IfxFlash_resumeProtection (uint32 flash)
Performs the "Resume Protection" sequence. More...
IFX_INLINE void | IfxFlash_suspendResumeMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the "Suspend Resume" sequence for multiple sectors. More...
IFX_INLINE void | IfxFlash_suspendResumeSector (uint32 sectorAddr)
Performs the "Suspend Resume" sequence. More...
IFX_INLINE uint8 | IfxFlash_waitUnbusy (uint32 flash, IfxFlash_FlashType flashType)
Polls the selected status flag in flash status register until it turns to 0. More...
IFX_INLINE void | IfxFlash_writeBurst (uint32 pageAddr)
Performs the "Write Burst" sequence, similar to write page but performs a burst transfer instead of page.Make sure the appropriate amount of data is loaded using load page command. More...
IFX_INLINE void | IfxFlash_writePage (uint32 pageAddr)
Performs the "Write Page" sequence. More...
IFX_INLINE void | IfxFlash_writePageOnce (uint32 pageAddr)
Performs the "Write Page Once" sequence, similar to write page but performs a program verify after writing. More...
IFX_EXTERN void | IfxFlash_disableWriteProtection (uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled. The command fails by setting PROER when any of the supplied PWs does not match. In this case until the next application reset all further calls of "Disable Protection" fail with PROER independent of the supplied password. More...
IFX_EXTERN void | IfxFlash_clearCorrectableErrorTracking (IfxFlash_PortId portId)
Clear the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register. More...
IFX_EXTERN void | IfxFlash_clearUncorrectableErrorTracking (IfxFlash_PortId portId)
Select the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register. More...
IFX_EXTERN void | IfxFlash_disableCorrectableErrorTracking (IfxFlash_PortId portId, boolean disable)
Disable the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register. More...
IFX_EXTERN void | IfxFlash_disableUncorrectableErrorTracking (IfxFlash_PortId portId, boolean disable)
Clear the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register. More...
IFX_EXTERN uint32 | IfxFlash_getTrackedCorrectableErrors (IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked correctable error addresses, error types and number of errors which are stored in the CBAB registers. More...
IFX_EXTERN uint32 | IfxFlash_getTrackedUncorrectableErrors (IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked uncorrectable error addresses, error types and number of errors which are stored in the UBAB registers. More...
IFX_EXTERN void | IfxFlash_selectCorrectableErrorTracking (IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for correctable flash errors. More...
IFX_EXTERN void | IfxFlash_selectUncorrectableErrorTracking (IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for uncorrectable flash errors. More...
IFX_INLINE boolean | IfxFlash_waitUnbusyAll (void)
This function will wait till all the flash banks are out of busy state. More...

Detailed Description

FLASH basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFlash.h.

Function Documentation

◆ IfxFlash_waitUnbusyAll()

IFX_INLINE boolean IfxFlash_waitUnbusyAll ( void )

This function will wait till all the flash banks are out of busy state.

Returns
Return 0 on success.Success means none of the flash banks are in busy state.

Definition at line 777 of file IfxFlash.h.


iLLD_TC26B: Global Definitions

Files
Global Definitions
iLLD
Collaboration diagram for Global Definitions:

Files

file IfxGlobal_cfg.h
Global definitions.

Detailed Description


iLLD_TC26B: IfxGlobal_cfg.h File Reference

  • _Impl
Macros
IfxGlobal_cfg.h File Reference
iLLD » Global Definitions

Global definitions. More...

Go to the source code of this file.

Macros

#define | IFXGLOBAL_DERIVATIVE_TC26xB (1)
Microcontroller derivative corresponding to the iLLD implementation. More...
#define | IFXGLOBAL_DERIVATIVE_NAME "TC26xB"
Microcontroller derivative name. More...

Detailed Description

Global definitions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGlobal_cfg.h.

Macro Definition Documentation

◆ IFXGLOBAL_DERIVATIVE_NAME

#define IFXGLOBAL_DERIVATIVE_NAME "TC26xB"

Microcontroller derivative name.

Definition at line 59 of file IfxGlobal_cfg.h.

◆ IFXGLOBAL_DERIVATIVE_TC26xB

#define IFXGLOBAL_DERIVATIVE_TC26xB (1)

Microcontroller derivative corresponding to the iLLD implementation.

Definition at line 55 of file IfxGlobal_cfg.h.


iLLD_TC26B: GPT12

Modules | Files
GPT12
iLLD
Collaboration diagram for GPT12:

Modules

Implementation
Standard Driver
GPT12 Pin Mapping
INCRENC

Files

file | IfxGpt12_cfg.h
GPT12 on-chip implementation data.
file | IfxGpt12_PinMap.c
GPT12 I/O map.
file | IfxGpt12_PinMap.h
GPT12 I/O map.
file | IfxGpt12_IncrEnc.h
GPT12 INCRENC details.
file | IfxGpt12.h
GPT12 basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » GPT12
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » GPT12
Collaboration diagram for Standard Driver:

Modules

Enumerations
Interrupt Functions
Configuration Functions
Utility Functions
Operative Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » GPT12 » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxGpt12_CaptureInput {
IfxGpt12_CaptureInput_A = 0,
IfxGpt12_CaptureInput_B = 1,
IfxGpt12_CaptureInput_C = 2,
IfxGpt12_CaptureInput_D = 3
}
Input Select for CAPIN
Definition in IfxGPT12.PISEL.B.ISCAPIN. More...
enum IfxGpt12_CaptureInputMode {
IfxGpt12_CaptureInputMode_none = 0,
IfxGpt12_CaptureInputMode_risingEdgeTxIN = 1,
IfxGpt12_CaptureInputMode_fallingEdgeTxIN = 2,
IfxGpt12_CaptureInputMode_bothEdgesTxIN = 3
}
Tx Input Edge Selection (Capture Mode, x=2,4) More...
enum IfxGpt12_CaptureTrigger {
IfxGpt12_CaptureTrigger_capin = 0,
IfxGpt12_CaptureTrigger_t3inOrT3EUD = 1
}
Capture Trigger Enable
Definition in IfxGPT12.T5CON.B.CT3. More...
enum IfxGpt12_CaptureTriggerMode {
IfxGpt12_CaptureTriggerMode_disabled = 0,
IfxGpt12_CaptureTriggerMode_risingEdge = 1,
IfxGpt12_CaptureTriggerMode_fallingEdge = 2,
IfxGpt12_CaptureTriggerMode_randomEdge = 3
}
Capture Trigger Selection
Definition in IfxGPT12.T5CON.B.CI. More...
enum IfxGpt12_CounterInputMode {
IfxGpt12_CounterInputMode_counterDisabled = 0,
IfxGpt12_CounterInputMode_risingEdgeTxIN = 1,
IfxGpt12_CounterInputMode_fallingEdgeTxIN = 2,
IfxGpt12_CounterInputMode_bothEdgesTxIN = 3,
IfxGpt12_CounterInputMode_risingEdgeTxOTL = 5,
IfxGpt12_CounterInputMode_fallingEdgeTxOTL = 6,
IfxGpt12_CounterInputMode_bothEdgesTxOTL = 7
}
Input Edge Selection for counter mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 6) More...
enum IfxGpt12_EudInput {
IfxGpt12_EudInput_A = 0,
IfxGpt12_EudInput_B = 1,
IfxGpt12_EudInput_C = 2,
IfxGpt12_EudInput_D = 3
}
Input Select for TxEUD
Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4) More...
enum IfxGpt12_Gpt1BlockPrescaler {
IfxGpt12_Gpt1BlockPrescaler_8 = 0,
IfxGpt12_Gpt1BlockPrescaler_4 = 1,
IfxGpt12_Gpt1BlockPrescaler_32 = 2,
IfxGpt12_Gpt1BlockPrescaler_16 = 3
}
GPT1 block prescaler Selection
Definition in IfxGPT12.T3CON.B.BPS1. More...
enum IfxGpt12_Gpt2BlockPrescaler {
IfxGpt12_Gpt2BlockPrescaler_4 = 0,
IfxGpt12_Gpt2BlockPrescaler_2 = 1,
IfxGpt12_Gpt2BlockPrescaler_16 = 2,
IfxGpt12_Gpt2BlockPrescaler_8 = 3
}
Gpt2 block prescaler Selection
Definition in IfxGPT12.T6CON.B.BPS2. More...
enum IfxGpt12_IncrementalInterfaceInputMode {
IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx = 0,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN = 1,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD = 2,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD = 3
}
Input Edge Selection for Incremental Interface mode
Definition in IfxGPT12.TxCON.B.TxI (x=2, 3 and 4) More...
enum IfxGpt12_Input {
IfxGpt12_Input_A = 0,
IfxGpt12_Input_B = 1,
IfxGpt12_Input_C = 2,
IfxGpt12_Input_D = 3
}
Input Select for TxIN
Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4) More...
enum IfxGpt12_Mode {
IfxGpt12_Mode_timer = 0,
IfxGpt12_Mode_counter = 1,
IfxGpt12_Mode_lowGatedTimer = 2,
IfxGpt12_Mode_highGatedTimer = 3,
IfxGpt12_Mode_reload = 4,
IfxGpt12_Mode_capture = 5,
IfxGpt12_Mode_incrementalInterfaceRotationDetection = 6,
IfxGpt12_Mode_incrementalInterfaceEdgeDetection = 7
}
Timer operating mode
Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4) More...
enum IfxGpt12_ReloadInputMode {
IfxGpt12_ReloadInputMode_counterDisabled = 0,
IfxGpt12_ReloadInputMode_risingEdgeTxIN = 1,
IfxGpt12_ReloadInputMode_fallingEdgeTxIN = 2,
IfxGpt12_ReloadInputMode_bothEdgesTxIN = 3,
IfxGpt12_ReloadInputMode_risingEdgeTxOTL = 5,
IfxGpt12_ReloadInputMode_fallingEdgeTxOTL = 6,
IfxGpt12_ReloadInputMode_bothEdgesTxOTL = 7
}
Input Edge Selection for reload mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 and 4) More...
enum IfxGpt12_SleepMode {
IfxGpt12_SleepMode_enable = 0,
IfxGpt12_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_GPT12.CLC.B.EDIS. More...
enum IfxGpt12_SuspendMode {
IfxGpt12_SuspendMode_none = 0,
IfxGpt12_SuspendMode_hard = 1,
IfxGpt12_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxGpt12_TimerDirection {
IfxGpt12_TimerDirection_up = 0,
IfxGpt12_TimerDirection_down = 1
}
Timer Count Direction
Definition in IfxGPT12.TxCON.B.TxUD (x=2 to 6) More...
enum IfxGpt12_TimerDirectionSource {
IfxGpt12_TimerDirectionSource_internal = 0,
IfxGpt12_TimerDirectionSource_external = 1
}
Timer count direction control source
Definition in IfxGPT12.TxCON.B.TxUDE (x=2 to 6) More...
enum IfxGpt12_TimerInputPrescaler {
IfxGpt12_TimerInputPrescaler_1 = 0,
IfxGpt12_TimerInputPrescaler_2 = 1,
IfxGpt12_TimerInputPrescaler_4 = 2,
IfxGpt12_TimerInputPrescaler_8 = 3,
IfxGpt12_TimerInputPrescaler_16 = 4,
IfxGpt12_TimerInputPrescaler_32 = 5,
IfxGpt12_TimerInputPrescaler_64 = 6,
IfxGpt12_TimerInputPrescaler_128 = 7
}
Input prescaler Selection for the timer
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4) More...
enum IfxGpt12_TimerReloadMode {
IfxGpt12_TimerReloadMode_disable,
IfxGpt12_TimerReloadMode_enable
}
Timer Reload Mode
Definition in IfxGPT12.T6CON.B.T6SR. More...
enum IfxGpt12_TimerRemoteControl {
IfxGpt12_TimerRemoteControl_off = 0,
IfxGpt12_TimerRemoteControl_on = 1
}
Timer Remote Control enable choice
Definition in IfxGPT12.TxCON.B.TxRC (x = 2 and 4) More...
enum IfxGpt12_TimerRun {
IfxGpt12_TimerRun_stop = 0,
IfxGpt12_TimerRun_start = 1
}
Timer Run / stop control choice (only if TxCON.B.TxRC = 0)
Definition in IfxGPT12.TxCON.B.TxR (x = 2 to 6) More...

Detailed Description

Enumeration Type Documentation

◆ IfxGpt12_CaptureInput

enum IfxGpt12_CaptureInput

Input Select for CAPIN
Definition in IfxGPT12.PISEL.B.ISCAPIN.

Enumerator
IfxGpt12_CaptureInput_A | signal CAPINA selected
IfxGpt12_CaptureInput_B | signal CAPINB selected
IfxGpt12_CaptureInput_C | signal CAPINC selected
IfxGpt12_CaptureInput_D | signal CAPIND selected

Definition at line 76 of file IfxGpt12.h.

◆ IfxGpt12_CaptureInputMode

enum IfxGpt12_CaptureInputMode

Tx Input Edge Selection (Capture Mode, x=2,4)

Enumerator
IfxGpt12_CaptureInputMode_none | None, Counter is disabled.
IfxGpt12_CaptureInputMode_risingEdgeTxIN | rising edge on TxIN
IfxGpt12_CaptureInputMode_fallingEdgeTxIN | falling edge on TxIN
IfxGpt12_CaptureInputMode_bothEdgesTxIN | (rising or falling edge) on TxIN

Definition at line 86 of file IfxGpt12.h.

◆ IfxGpt12_CaptureTrigger

enum IfxGpt12_CaptureTrigger

Capture Trigger Enable
Definition in IfxGPT12.T5CON.B.CT3.

Enumerator
IfxGpt12_CaptureTrigger_capin | Capture Trigger Enable from CAPIN.
IfxGpt12_CaptureTrigger_t3inOrT3EUD | Capture Trigger Enable from T3IN/T3EUD.

Definition at line 97 of file IfxGpt12.h.

◆ IfxGpt12_CaptureTriggerMode

enum IfxGpt12_CaptureTriggerMode

Capture Trigger Selection
Definition in IfxGPT12.T5CON.B.CI.

Enumerator
IfxGpt12_CaptureTriggerMode_disabled | capture disabled
IfxGpt12_CaptureTriggerMode_risingEdge | positive Transition on CAPIN or any Transition on T3IN
IfxGpt12_CaptureTriggerMode_fallingEdge | negative Transition on CAPIN or any Transition on T3EUD
IfxGpt12_CaptureTriggerMode_randomEdge | Any Transition on CAPIN or any Transition on T3IN/T3EUD.

Definition at line 106 of file IfxGpt12.h.

◆ IfxGpt12_CounterInputMode

enum IfxGpt12_CounterInputMode

Input Edge Selection for counter mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 6)

Enumerator
IfxGpt12_CounterInputMode_counterDisabled | Counter Tx is disabled.
IfxGpt12_CounterInputMode_risingEdgeTxIN | rising edge on TxIN
IfxGpt12_CounterInputMode_fallingEdgeTxIN | falling edge on TxIN
IfxGpt12_CounterInputMode_bothEdgesTxIN | rising or falling edge on TxIN
IfxGpt12_CounterInputMode_risingEdgeTxOTL | rising edge of TxOTL (x=3,6)
IfxGpt12_CounterInputMode_fallingEdgeTxOTL | falling edge of TxOTL
IfxGpt12_CounterInputMode_bothEdgesTxOTL | rising or falling edge of TxOTL

Definition at line 117 of file IfxGpt12.h.

◆ IfxGpt12_EudInput

enum IfxGpt12_EudInput

Input Select for TxEUD
Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4)

Enumerator
IfxGpt12_EudInput_A | signal TXEUDA selected
IfxGpt12_EudInput_B | signal TXEUDB selected
IfxGpt12_EudInput_C | signal TXEUDC selected
IfxGpt12_EudInput_D | signal TXEUDD selected

Definition at line 131 of file IfxGpt12.h.

◆ IfxGpt12_Gpt1BlockPrescaler

enum IfxGpt12_Gpt1BlockPrescaler

GPT1 block prescaler Selection
Definition in IfxGPT12.T3CON.B.BPS1.

Enumerator
IfxGpt12_Gpt1BlockPrescaler_8 | fGPT/8
IfxGpt12_Gpt1BlockPrescaler_4 | fGPT/4
IfxGpt12_Gpt1BlockPrescaler_32 | fGPT/32
IfxGpt12_Gpt1BlockPrescaler_16 | fGPT/16

Definition at line 142 of file IfxGpt12.h.

◆ IfxGpt12_Gpt2BlockPrescaler

enum IfxGpt12_Gpt2BlockPrescaler

Gpt2 block prescaler Selection
Definition in IfxGPT12.T6CON.B.BPS2.

Enumerator
IfxGpt12_Gpt2BlockPrescaler_4 | fGPT/4
IfxGpt12_Gpt2BlockPrescaler_2 | fGPT/2
IfxGpt12_Gpt2BlockPrescaler_16 | fGPT/16
IfxGpt12_Gpt2BlockPrescaler_8 | fGPT/8

Definition at line 153 of file IfxGpt12.h.

◆ IfxGpt12_IncrementalInterfaceInputMode

enum IfxGpt12_IncrementalInterfaceInputMode

Input Edge Selection for Incremental Interface mode
Definition in IfxGPT12.TxCON.B.TxI (x=2, 3 and 4)

Enumerator
IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx | Counter Tx Stop.
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN | (rising or falling edge) on TxIN
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD | (rising or falling edge) on TxEUD
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD | (rising or falling edge) on any Tx input (TxIN or TxEUD)

Definition at line 164 of file IfxGpt12.h.

◆ IfxGpt12_Input

enum IfxGpt12_Input

Input Select for TxIN
Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4)

Enumerator
IfxGpt12_Input_A | signal TXINA selected
IfxGpt12_Input_B | signal TXINB selected
IfxGpt12_Input_C | signal TXINC selected
IfxGpt12_Input_D | signal TXIND selected

Definition at line 175 of file IfxGpt12.h.

◆ IfxGpt12_Mode

enum IfxGpt12_Mode

Timer operating mode
Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4)

Enumerator
IfxGpt12_Mode_timer | Timer Mode selected.
IfxGpt12_Mode_counter | Counter Mode selected.
IfxGpt12_Mode_lowGatedTimer | Low Gated Timer Mode selected.
IfxGpt12_Mode_highGatedTimer | High Gated Timer Mode selected.
IfxGpt12_Mode_reload | Reload Mode selected.
IfxGpt12_Mode_capture | Capture Mode selected.
IfxGpt12_Mode_incrementalInterfaceRotationDetection | Incremental Interface Mode selected.
IfxGpt12_Mode_incrementalInterfaceEdgeDetection | Incremental Interface Mode selected.

Definition at line 186 of file IfxGpt12.h.

◆ IfxGpt12_ReloadInputMode

enum IfxGpt12_ReloadInputMode

Input Edge Selection for reload mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 and 4)

Enumerator
IfxGpt12_ReloadInputMode_counterDisabled | Counter Tx is disabled.
IfxGpt12_ReloadInputMode_risingEdgeTxIN | rising edge on TxIN
IfxGpt12_ReloadInputMode_fallingEdgeTxIN | falling edge on TxIN
IfxGpt12_ReloadInputMode_bothEdgesTxIN | rising or falling edge on TxIN
IfxGpt12_ReloadInputMode_risingEdgeTxOTL | rising edge of Tx toggle latch TxOTL
IfxGpt12_ReloadInputMode_fallingEdgeTxOTL | falling edge of Tx toggle latch TxOTL
IfxGpt12_ReloadInputMode_bothEdgesTxOTL | rising or falling edge of Tx toggle latch TxOTL

Definition at line 201 of file IfxGpt12.h.

◆ IfxGpt12_SleepMode

enum IfxGpt12_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_GPT12.CLC.B.EDIS.

Enumerator
IfxGpt12_SleepMode_enable | enables sleep mode
IfxGpt12_SleepMode_disable | disables sleep mode

Definition at line 215 of file IfxGpt12.h.

◆ IfxGpt12_SuspendMode

enum IfxGpt12_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxGpt12_SuspendMode_none | No suspend.
IfxGpt12_SuspendMode_hard | Hard Suspend.
IfxGpt12_SuspendMode_soft | Soft Suspend.

Definition at line 223 of file IfxGpt12.h.

◆ IfxGpt12_TimerDirection

enum IfxGpt12_TimerDirection

Timer Count Direction
Definition in IfxGPT12.TxCON.B.TxUD (x=2 to 6)

Enumerator
IfxGpt12_TimerDirection_up | Timer Up Direction selected.
IfxGpt12_TimerDirection_down | Timer Down Direction selected.

Definition at line 233 of file IfxGpt12.h.

◆ IfxGpt12_TimerDirectionSource

enum IfxGpt12_TimerDirectionSource

Timer count direction control source
Definition in IfxGPT12.TxCON.B.TxUDE (x=2 to 6)

Enumerator
IfxGpt12_TimerDirectionSource_internal | Timer Dir Control = TxUD (x=2,3,4)
IfxGpt12_TimerDirectionSource_external | Timer Dir Control = TxUD (x=2,3,4)

Definition at line 242 of file IfxGpt12.h.

◆ IfxGpt12_TimerInputPrescaler

enum IfxGpt12_TimerInputPrescaler

Input prescaler Selection for the timer
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4)

Enumerator
IfxGpt12_TimerInputPrescaler_1
IfxGpt12_TimerInputPrescaler_2
IfxGpt12_TimerInputPrescaler_4
IfxGpt12_TimerInputPrescaler_8
IfxGpt12_TimerInputPrescaler_16
IfxGpt12_TimerInputPrescaler_32
IfxGpt12_TimerInputPrescaler_64
IfxGpt12_TimerInputPrescaler_128

Definition at line 251 of file IfxGpt12.h.

◆ IfxGpt12_TimerReloadMode

enum IfxGpt12_TimerReloadMode

Timer Reload Mode
Definition in IfxGPT12.T6CON.B.T6SR.

Enumerator
IfxGpt12_TimerReloadMode_disable | Reload mode disabled.
IfxGpt12_TimerReloadMode_enable | Reload mode enabled.

Definition at line 266 of file IfxGpt12.h.

◆ IfxGpt12_TimerRemoteControl

enum IfxGpt12_TimerRemoteControl

Timer Remote Control enable choice
Definition in IfxGPT12.TxCON.B.TxRC (x = 2 and 4)

Enumerator
IfxGpt12_TimerRemoteControl_off | T2 RemoteControl Off.
IfxGpt12_TimerRemoteControl_on | T2 RemoteControl On.

Definition at line 275 of file IfxGpt12.h.

◆ IfxGpt12_TimerRun

enum IfxGpt12_TimerRun

Timer Run / stop control choice (only if TxCON.B.TxRC = 0)
Definition in IfxGPT12.TxCON.B.TxR (x = 2 to 6)

Enumerator
IfxGpt12_TimerRun_stop | Timer x Stops.
IfxGpt12_TimerRun_start | Timer X Run.

Definition at line 284 of file IfxGpt12.h.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » GPT12 » Standard Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T2_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 2 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T3_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 3 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T4_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 4 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T5_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 5 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T6_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 6 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_getCaptureSrc (Ifx_GPT12 *gpt12)
Returns the address of capture service request. More...

Detailed Description

Function Documentation

◆ IfxGpt12_getCaptureSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_getCaptureSrc ( Ifx_GPT12 * gpt12 )

Returns the address of capture service request.

Parameters
gpt12 Pointer to module base address
Returns
address of capture Interrupt

Definition at line 1570 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_updateSpeedFromT3().

◆ IfxGpt12_T2_getSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T2_getSrc ( Ifx_GPT12 * gpt12 )

Returns the address of Timer 2 service request.

Parameters
gpt12 Pointer to module base address
Returns
address of timer 2 Interrupt

Definition at line 1074 of file IfxGpt12.h.

◆ IfxGpt12_T3_getSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T3_getSrc ( Ifx_GPT12 * gpt12 )

Returns the address of Timer 3 service request.

Parameters
gpt12 Pointer to module base address
Returns
address of Timer 3 Interrupt

Definition at line 1185 of file IfxGpt12.h.

◆ IfxGpt12_T4_getSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T4_getSrc ( Ifx_GPT12 * gpt12 )

Returns the address of Timer 4 service request.

Parameters
gpt12 Pointer to module base address
Returns
address of timer 4 interrupt

Definition at line 1278 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_getSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T5_getSrc ( Ifx_GPT12 * gpt12 )

Returns the address of Timer 5 service request.

Parameters
gpt12 Pointer to module base address
Returns
address of Timer 5 Interrupt

Definition at line 1387 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_updateSpeedFromT3().

◆ IfxGpt12_T6_getSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T6_getSrc ( Ifx_GPT12 * gpt12 )

Returns the address of Timer 6 service request.

Parameters
gpt12 Pointer to module base address
Returns
address of Timer 6 interrupt

Definition at line 1493 of file IfxGpt12.h.


iLLD_TC26B: Configuration Functions

Functions
Configuration Functions
iLLD » GPT12 » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxGpt12_T2_setCaptureInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T2 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T2_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setInterruptEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setReloadInputMode (Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T2 timer count direction. More...
IFX_INLINE void | IfxGpt12_T2_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T2 timer. More...
IFX_INLINE void | IfxGpt12_T3_enableOutput (Ifx_GPT12 *gpt12, boolean enable)
Enable / Disable the T3 Output on pin T3OUT. More...
IFX_INLINE void | IfxGpt12_T3_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T3 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T3_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T3 timer count direction. More...
IFX_INLINE void | IfxGpt12_T3_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T3 timer. More...
IFX_INLINE void | IfxGpt12_T4_enableClearTimerT2 (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T2 bit of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_enableClearTimerT3 (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T3 bit of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setCaptureInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T4 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T4_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setInterruptEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setReloadInputMode (Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T4 timer count direction. More...
IFX_INLINE void | IfxGpt12_T4_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T4 timer. More...
IFX_INLINE void | IfxGpt12_T5_enableClearTimer (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTrigger (Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger)
Sets the capture trigger of teh T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTriggerEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the capture trigger of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTriggerMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode)
Sets the capture trigger mode of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T5 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T5_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T5 timer count direction. More...
IFX_INLINE void | IfxGpt12_T5_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer. More...
IFX_INLINE void | IfxGpt12_T6_enableClearTimer (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
sets the T6 timer count direction source internal / external More...
IFX_INLINE void | IfxGpt12_T6_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setReloadMode (Ifx_GPT12 *gpt12, IfxGpt12_TimerReloadMode mode)
sets the T6 timer count direction More...
IFX_INLINE void | IfxGpt12_T6_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
sets the T6 timer count direction More...
IFX_INLINE void | IfxGpt12_T6_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T6 timer. More...
IFX_INLINE void | IfxGpt12_initCapInPin (const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode)
Initializes a Capin_In input. More...
IFX_INLINE void | IfxGpt12_initTxOutPin (const IfxGpt12_TxOut_Out *txOut, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output. More...
IFX_INLINE void | IfxGpt12_setCaptureInput (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInput input)
Sets the capture input. More...
IFX_INLINE void | IfxGpt12_setGpt1BlockPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_Gpt1BlockPrescaler bps1)
Sets the GPT1 block prescaler. More...
IFX_INLINE void | IfxGpt12_setGpt2BlockPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_Gpt2BlockPrescaler bps2)
Sets the GPT2 block prescaler. More...
IFX_EXTERN void | IfxGpt12_disableModule (Ifx_GPT12 *gpt12)
Disables the module. More...
IFX_EXTERN void | IfxGpt12_enableModule (Ifx_GPT12 *gpt12)
Enables the module. More...
IFX_EXTERN void | IfxGpt12_initTxEudInPin (const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
Initializes a TxEUDIn_IN input. More...
IFX_EXTERN void | IfxGpt12_initTxInPin (const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
Initializes a TxIn input. More...

Detailed Description

Function Documentation

◆ IfxGpt12_disableModule()

IFX_EXTERN void IfxGpt12_disableModule ( Ifx_GPT12 * gpt12 )

Disables the module.

Parameters
gpt12 Pointer to module base address
Returns
None

Definition at line 257 of file IfxGpt12.c.

◆ IfxGpt12_enableModule()

IFX_EXTERN void IfxGpt12_enableModule ( Ifx_GPT12 * gpt12 )

Enables the module.

Parameters
gpt12 Pointer to module base address
Returns
None

Definition at line 266 of file IfxGpt12.c.

◆ IfxGpt12_initCapInPin()

IFX_INLINE void IfxGpt12_initCapInPin | ( | const IfxGpt12_TxIn_In * | capIn,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initializes a Capin_In input.

Parameters
capIn | the TxIn Pin which should be configured
inputMode | the pin input mode which should be configured
Returns
None

Definition at line 1584 of file IfxGpt12.h.

◆ IfxGpt12_initTxEudInPin()

IFX_EXTERN void IfxGpt12_initTxEudInPin | ( | const IfxGpt12_TxEud_In * | txEudIn,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initializes a TxEUDIn_IN input.

Parameters
txEudIn | the TxEUD_IN Pin which should be configured
inputMode | the pin input mode which should be configured
Returns
None

Definition at line 275 of file IfxGpt12.c.

◆ IfxGpt12_initTxInPin()

IFX_EXTERN void IfxGpt12_initTxInPin | ( | const IfxGpt12_TxIn_In * | txIn,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initializes a TxIn input.

Parameters
txIn | the TxIn Pin which should be configured
inputMode | the pin input mode which should be configured
Returns
None

Definition at line 330 of file IfxGpt12.c.

◆ IfxGpt12_initTxOutPin()

IFX_INLINE void IfxGpt12_initTxOutPin | ( | const IfxGpt12_TxOut_Out * | txOut,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SLSO output.

Parameters
txOut | the TxOUT Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1599 of file IfxGpt12.h.

◆ IfxGpt12_setCaptureInput()

IFX_INLINE void IfxGpt12_setCaptureInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CaptureInput | input
 | ) |  |

Sets the capture input.

Parameters
gpt12 | Pointer to Module base address
input | Select the capture input signal
Returns
None

Definition at line 1618 of file IfxGpt12.h.

Referenced by IfxGpt12_initCapInPin(), and IfxGpt12_initCapInPinWithPadLevel().

◆ IfxGpt12_setGpt1BlockPrescaler()

IFX_INLINE void IfxGpt12_setGpt1BlockPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Gpt1BlockPrescaler | bps1
 | ) |  |

Sets the GPT1 block prescaler.

Parameters
gpt12 | Pointer to module base address
bps1 | Select the GPT1 block Prescaler
Returns
None

Definition at line 1630 of file IfxGpt12.h.

◆ IfxGpt12_setGpt2BlockPrescaler()

IFX_INLINE void IfxGpt12_setGpt2BlockPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Gpt2BlockPrescaler | bps2
 | ) |  |

Sets the GPT2 block prescaler.

Parameters
gpt12 | Pointer to module base address
bps2 | Select the GPT2 block Prescaler
Returns
None

Definition at line 1636 of file IfxGpt12.h.

◆ IfxGpt12_T2_setCaptureInputMode()

IFX_INLINE void IfxGpt12_T2_setCaptureInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CaptureInputMode | inputMode
 | ) |  |

Sets the input edge selection for the capture mode of the T2 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input prescaler value in capture mode
Returns
None

Definition at line 1093 of file IfxGpt12.h.

◆ IfxGpt12_T2_setCounterInputMode()

IFX_INLINE void IfxGpt12_T2_setCounterInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CounterInputMode | inputMode
 | ) |  |

Sets the input edge selection for the counter mode of the T2 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in counter mode
Returns
None

Definition at line 1099 of file IfxGpt12.h.

◆ IfxGpt12_T2_setDirectionSource()

IFX_INLINE void IfxGpt12_T2_setDirectionSource | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirectionSource | source
 | ) |  |

Sets the T2 timer count direction source internal / external.

Parameters
gpt12 | Pointer to module base address
source | direction source
Returns
None

Definition at line 1105 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T2_setEudInput()

IFX_INLINE void IfxGpt12_T2_setEudInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_EudInput | input
 | ) |  |

Sets the EUD input for the T2 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the EUD input signal
Returns
None

Definition at line 1111 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxEudInPin(), and IfxGpt12_initTxEudInPinWithPadLevel().

◆ IfxGpt12_T2_setIncrementalInterfaceInputMode()

IFX_INLINE void IfxGpt12_T2_setIncrementalInterfaceInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_IncrementalInterfaceInputMode | inputMode
 | ) |  |

Sets the input edge selection for the incremental interface mode of the T2 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in IIM mode
Returns
None

Definition at line 1118 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T2_setInput()

IFX_INLINE void IfxGpt12_T2_setInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Input | input
 | ) |  |

Sets the input for the T2 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the Input signal
Returns
None

Definition at line 1124 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxInPin(), and IfxGpt12_initTxInPinWithPadLevel().

◆ IfxGpt12_T2_setInterruptEnable()

IFX_INLINE void IfxGpt12_T2_setInterruptEnable | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the interrupt generation of the T2 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1131 of file IfxGpt12.h.

◆ IfxGpt12_T2_setMode()

IFX_INLINE void IfxGpt12_T2_setMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Mode | mode
 | ) |  |

Sets the mode of operation od T2 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the mode of operation
Returns
None

Definition at line 1137 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T2_setReloadInputMode()

IFX_INLINE void IfxGpt12_T2_setReloadInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_ReloadInputMode | inputMode
 | ) |  |

Sets the input edge selection for the reload mode of the T2 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input prescaler value in reload mode
Returns
None

Definition at line 1143 of file IfxGpt12.h.

◆ IfxGpt12_T2_setRemoteControl()

IFX_INLINE void IfxGpt12_T2_setRemoteControl | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRemoteControl | control
 | ) |  |

Sets the remote control of the T2 timer.

Parameters
gpt12 | pointer to module base address
control | enable the remote control
Returns
None

Definition at line 1149 of file IfxGpt12.h.

◆ IfxGpt12_T2_setTimerDirection()

IFX_INLINE void IfxGpt12_T2_setTimerDirection | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirection | direction
 | ) |  |

Sets the T2 timer count direction.

Parameters
gpt12 | Pointer to module base address
direction | select the Timer direction
Returns
None

Definition at line 1155 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T2_setTimerPrescaler()

IFX_INLINE void IfxGpt12_T2_setTimerPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerInputPrescaler | inputPrescaler
 | ) |  |

Sets the input prescaler for the Timer mode and Gated timer mode of T2 timer.

Parameters
gpt12 | Pointer to module base address
inputPrescaler | input prescaler value in timer mode and gated timer mode
Returns
None

Definition at line 1161 of file IfxGpt12.h.

◆ IfxGpt12_T3_enableOutput()

IFX_INLINE void IfxGpt12_T3_enableOutput | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enable
 | ) |  |

Enable / Disable the T3 Output on pin T3OUT.

Parameters
gpt12 | Pointer to module base address
enable | enable / disable choice for T3OE
Returns
None

Definition at line 1173 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setCounterInputMode()

IFX_INLINE void IfxGpt12_T3_setCounterInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CounterInputMode | inputMode
 | ) |  |

Sets the input edge selection for the counter mode of the T3 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in counter mode
Returns
None

Definition at line 1204 of file IfxGpt12.h.

◆ IfxGpt12_T3_setDirectionSource()

IFX_INLINE void IfxGpt12_T3_setDirectionSource | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirectionSource | source
 | ) |  |

Sets the T3 timer count direction source internal / external.

Parameters
gpt12 | Pointer to module base address
source | direction source
Returns
None

Definition at line 1211 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setEudInput()

IFX_INLINE void IfxGpt12_T3_setEudInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_EudInput | input
 | ) |  |

Sets the EUD input for the T3 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the EUD input signal
Returns
None

Definition at line 1217 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxEudInPin(), and IfxGpt12_initTxEudInPinWithPadLevel().

◆ IfxGpt12_T3_setIncrementalInterfaceInputMode()

IFX_INLINE void IfxGpt12_T3_setIncrementalInterfaceInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_IncrementalInterfaceInputMode | inputMode
 | ) |  |

Sets the input edge selection for the incremental interface mode of the T3 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in IIM mode
Returns
None

Definition at line 1223 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setInput()

IFX_INLINE void IfxGpt12_T3_setInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Input | input
 | ) |  |

Sets the input for the T3 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the Input signal
Returns
None

Definition at line 1229 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxInPin(), and IfxGpt12_initTxInPinWithPadLevel().

◆ IfxGpt12_T3_setMode()

IFX_INLINE void IfxGpt12_T3_setMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Mode | mode
 | ) |  |

Sets the mode of operation od T3 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the mode of operation
Returns
None

Definition at line 1235 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setTimerDirection()

IFX_INLINE void IfxGpt12_T3_setTimerDirection | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirection | direction
 | ) |  |

Sets the T3 timer count direction.

Parameters
gpt12 | Pointer to module base address
direction | select the Timer direction
Returns
None

Definition at line 1242 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setTimerPrescaler()

IFX_INLINE void IfxGpt12_T3_setTimerPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerInputPrescaler | inputPrescaler
 | ) |  |

Sets the input prescaler for the Timer mode and Gated timer mode of T3 timer.

Parameters
gpt12 | Pointer to module base address
inputPrescaler | input prescaler value in timer mode and gated timer mode
Returns
None

Definition at line 1248 of file IfxGpt12.h.

◆ IfxGpt12_T4_enableClearTimerT2()

IFX_INLINE void IfxGpt12_T4_enableClearTimerT2 | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the clear timer T2 bit of the T4 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1260 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_enableClearTimerT3()

IFX_INLINE void IfxGpt12_T4_enableClearTimerT3 | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the clear timer T3 bit of the T4 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1266 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setCaptureInputMode()

IFX_INLINE void IfxGpt12_T4_setCaptureInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CaptureInputMode | inputMode
 | ) |  |

Sets the input edge selection for the capture mode of the T4 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input prescaler value in capture mode
Returns
None

Definition at line 1297 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setCounterInputMode()

IFX_INLINE void IfxGpt12_T4_setCounterInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CounterInputMode | inputMode
 | ) |  |

Sets the input edge selection for the counter mode of the T4 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in counter mode
Returns
None

Definition at line 1303 of file IfxGpt12.h.

◆ IfxGpt12_T4_setDirectionSource()

IFX_INLINE void IfxGpt12_T4_setDirectionSource | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirectionSource | source
 | ) |  |

Sets the T4 timer count direction source internal / external.

Parameters
gpt12 | Pointer to module base address
source | direction source
Returns
None

Definition at line 1309 of file IfxGpt12.h.

◆ IfxGpt12_T4_setEudInput()

IFX_INLINE void IfxGpt12_T4_setEudInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_EudInput | input
 | ) |  |

Sets the EUD input for the T4 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the EUD input signal
Returns
None

Definition at line 1315 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxEudInPin(), and IfxGpt12_initTxEudInPinWithPadLevel().

◆ IfxGpt12_T4_setIncrementalInterfaceInputMode()

IFX_INLINE void IfxGpt12_T4_setIncrementalInterfaceInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_IncrementalInterfaceInputMode | inputMode
 | ) |  |

Sets the input edge selection for the incremental interface mode of the T4 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in IIM mode
Returns
None

Definition at line 1321 of file IfxGpt12.h.

◆ IfxGpt12_T4_setInput()

IFX_INLINE void IfxGpt12_T4_setInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Input | input
 | ) |  |

Sets the input for the T4 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the Input signal
Returns
None

Definition at line 1327 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxInPin(), and IfxGpt12_initTxInPinWithPadLevel().

◆ IfxGpt12_T4_setInterruptEnable()

IFX_INLINE void IfxGpt12_T4_setInterruptEnable | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the interrupt generation of the T4 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1333 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setMode()

IFX_INLINE void IfxGpt12_T4_setMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Mode | mode
 | ) |  |

Sets the mode of operation od T4 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the mode of operation
Returns
None

Definition at line 1339 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setReloadInputMode()

IFX_INLINE void IfxGpt12_T4_setReloadInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_ReloadInputMode | inputMode
 | ) |  |

Sets the input edge selection for the reload mode of the T4 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input prescaler value in reload mode
Returns
None

Definition at line 1345 of file IfxGpt12.h.

◆ IfxGpt12_T4_setRemoteControl()

IFX_INLINE void IfxGpt12_T4_setRemoteControl | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRemoteControl | control
 | ) |  |

Sets the remote control of the T4 timer.

Parameters
gpt12 | pointer to module base address
control | enable the remote control
Returns
None

Definition at line 1351 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setTimerDirection()

IFX_INLINE void IfxGpt12_T4_setTimerDirection | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirection | direction
 | ) |  |

Sets the T4 timer count direction.

Parameters
gpt12 | Pointer to module base address
direction | select the Timer direction
Returns
None

Definition at line 1357 of file IfxGpt12.h.

◆ IfxGpt12_T4_setTimerPrescaler()

IFX_INLINE void IfxGpt12_T4_setTimerPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerInputPrescaler | inputPrescaler
 | ) |  |

Sets the input prescaler for the Timer mode and Gated timer mode of T4 timer.

Parameters
gpt12 | Pointer to module base address
inputPrescaler | input prescaler value in timer mode and gated timer mode
Returns
None

Definition at line 1363 of file IfxGpt12.h.

◆ IfxGpt12_T5_enableClearTimer()

IFX_INLINE void IfxGpt12_T5_enableClearTimer | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the clear timer bit of the T5 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1375 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setCaptureTrigger()

IFX_INLINE void IfxGpt12_T5_setCaptureTrigger | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CaptureTrigger | trigger
 | ) |  |

Sets the capture trigger of teh T5 timer.

Parameters
gpt12 | Pointer to Module base address
trigger | Capture trigger
Returns
None

Definition at line 1406 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setCaptureTriggerEnable()

IFX_INLINE void IfxGpt12_T5_setCaptureTriggerEnable | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the capture trigger of the T5 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1412 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setCaptureTriggerMode()

IFX_INLINE void IfxGpt12_T5_setCaptureTriggerMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CaptureTriggerMode | mode
 | ) |  |

Sets the capture trigger mode of the T5 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the capture trigger mode
Returns
None

Definition at line 1418 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setCounterInputMode()

IFX_INLINE void IfxGpt12_T5_setCounterInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CounterInputMode | inputMode
 | ) |  |

Sets the input edge selection for the counter mode of the T5 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in counter mode
Returns
None

Definition at line 1424 of file IfxGpt12.h.

◆ IfxGpt12_T5_setDirectionSource()

IFX_INLINE void IfxGpt12_T5_setDirectionSource | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirectionSource | source
 | ) |  |

Sets the T5 timer count direction source internal / external.

Parameters
gpt12 | Pointer to module base address
source | direction source
Returns
None

Definition at line 1430 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setEudInput()

IFX_INLINE void IfxGpt12_T5_setEudInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_EudInput | input
 | ) |  |

Sets the EUD input for the T5 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the EUD input signal
Returns
None

Definition at line 1436 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxEudInPin(), and IfxGpt12_initTxEudInPinWithPadLevel().

◆ IfxGpt12_T5_setInput()

IFX_INLINE void IfxGpt12_T5_setInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Input | input
 | ) |  |

Sets the input for the T5 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the Input signal
Returns
None

Definition at line 1443 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxInPin(), and IfxGpt12_initTxInPinWithPadLevel().

◆ IfxGpt12_T5_setMode()

IFX_INLINE void IfxGpt12_T5_setMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Mode | mode
 | ) |  |

Sets the mode of operation od T5 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the mode of operation
Returns
None

Definition at line 1450 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setRemoteControl()

IFX_INLINE void IfxGpt12_T5_setRemoteControl | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRemoteControl | control
 | ) |  |

Sets the remote control of the T5 timer.

Parameters
gpt12 | pointer to module base address
control | enable the remote control
Returns
None

Definition at line 1457 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setTimerDirection()

IFX_INLINE void IfxGpt12_T5_setTimerDirection | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirection | direction
 | ) |  |

Sets the T5 timer count direction.

Parameters
gpt12 | Pointer to module base address
direction | select the Timer direction
Returns
None

Definition at line 1463 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setTimerPrescaler()

IFX_INLINE void IfxGpt12_T5_setTimerPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerInputPrescaler | inputPrescaler
 | ) |  |

Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer.

Parameters
gpt12 | Pointer to module base address
inputPrescaler | input prescaler value in timer mode and gated timer mode
Returns
None

Definition at line 1469 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T6_enableClearTimer()

IFX_INLINE void IfxGpt12_T6_enableClearTimer | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the clear timer bit of the T6 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1481 of file IfxGpt12.h.

◆ IfxGpt12_T6_setCounterInputMode()

IFX_INLINE void IfxGpt12_T6_setCounterInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CounterInputMode | inputMode
 | ) |  |

Sets the input edge selection for the counter mode of the T6 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in counter mode
Returns
None

Definition at line 1512 of file IfxGpt12.h.

◆ IfxGpt12_T6_setDirectionSource()

IFX_INLINE void IfxGpt12_T6_setDirectionSource | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirectionSource | source
 | ) |  |

sets the T6 timer count direction source internal / external

Parameters
gpt12 | Pointer to module base address
source | direction source
Returns
None

Definition at line 1519 of file IfxGpt12.h.

◆ IfxGpt12_T6_setEudInput()

IFX_INLINE void IfxGpt12_T6_setEudInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_EudInput | input
 | ) |  |

Sets the EUD input for the T6 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the EUD input signal
Returns
None

Definition at line 1525 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxEudInPin(), and IfxGpt12_initTxEudInPinWithPadLevel().

◆ IfxGpt12_T6_setInput()

IFX_INLINE void IfxGpt12_T6_setInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Input | input
 | ) |  |

Sets the input for the T6 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the Input signal
Returns
None

Definition at line 1532 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxInPin(), and IfxGpt12_initTxInPinWithPadLevel().

◆ IfxGpt12_T6_setMode()

IFX_INLINE void IfxGpt12_T6_setMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Mode | mode
 | ) |  |

Sets the mode of operation od T6 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the mode of operation
Returns
None

Definition at line 1539 of file IfxGpt12.h.

◆ IfxGpt12_T6_setReloadMode()

IFX_INLINE void IfxGpt12_T6_setReloadMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerReloadMode | mode
 | ) |  |

sets the T6 timer count direction

Parameters
gpt12 | Pointer to module base address
mode | Timer Reload Mode
Returns
None

Definition at line 1546 of file IfxGpt12.h.

◆ IfxGpt12_T6_setTimerDirection()

IFX_INLINE void IfxGpt12_T6_setTimerDirection | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirection | direction
 | ) |  |

sets the T6 timer count direction

Parameters
gpt12 | Pointer to module base address
direction | select the Timer direction
Returns
None

Definition at line 1552 of file IfxGpt12.h.

◆ IfxGpt12_T6_setTimerPrescaler()

IFX_INLINE void IfxGpt12_T6_setTimerPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerInputPrescaler | inputPrescaler
 | ) |  |

Sets the input prescaler for the Timer mode and Gated timer mode of T6 timer.

Parameters
gpt12 | Pointer to module base address
inputPrescaler | input prescaler value in timer mode and gated timer mode
Returns
None

Definition at line 1558 of file IfxGpt12.h.


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » GPT12 » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE IfxGpt12_Mode | IfxGpt12_T2_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T2 timer. More...
IFX_INLINE uint16 | IfxGpt12_T2_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T2 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T3_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T3 timer. More...
IFX_INLINE uint16 | IfxGpt12_T3_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T3 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T4_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T4 timer. More...
IFX_INLINE uint16 | IfxGpt12_T4_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T4 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T5_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T5 timer. More...
IFX_INLINE uint16 | IfxGpt12_T5_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T5 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T6_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T6 timer. More...
IFX_INLINE uint16 | IfxGpt12_T6_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T6 timer. More...
IFX_INLINE float32 | IfxGpt12_getModuleFrequency (Ifx_GPT12 *gpt12)
Returns the gpt12 module frequency. More...
IFX_EXTERN float32 | IfxGpt12_T2_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T2 timer. More...
IFX_EXTERN float32 | IfxGpt12_T3_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T3 timer. More...
IFX_EXTERN float32 | IfxGpt12_T4_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T4 timer. More...
IFX_EXTERN float32 | IfxGpt12_T5_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer. More...
IFX_EXTERN float32 | IfxGpt12_T6_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T6 timer. More...

Detailed Description

Function Documentation

◆ IfxGpt12_getModuleFrequency()

IFX_INLINE float32 IfxGpt12_getModuleFrequency ( Ifx_GPT12 * gpt12 )

Returns the gpt12 module frequency.

Parameters
gpt12 Pointer to module base address
Returns
gpt12 module frequency

Definition at line 1577 of file IfxGpt12.h.

Referenced by IfxGpt12_T2_getFrequency(), IfxGpt12_T3_getFrequency(), IfxGpt12_T4_getFrequency(), IfxGpt12_T5_getFrequency(), and IfxGpt12_T6_getFrequency().

◆ IfxGpt12_T2_getFrequency()

IFX_EXTERN float32 IfxGpt12_T2_getFrequency ( Ifx_GPT12 * gpt12 )

Returns the frequency of the T2 timer.

Parameters
gpt12 Pointer to Module base address
Returns
frequency

Definition at line 52 of file IfxGpt12.c.

◆ IfxGpt12_T2_getMode()

IFX_INLINE IfxGpt12_Mode IfxGpt12_T2_getMode ( Ifx_GPT12 * gpt12 )

Returns the operating mode of the T2 timer.

Parameters
gpt12 Pointer to module base address
Returns
mode of operation

Definition at line 1068 of file IfxGpt12.h.

Referenced by IfxGpt12_T2_getFrequency().

◆ IfxGpt12_T2_getTimerValue()

IFX_INLINE uint16 IfxGpt12_T2_getTimerValue ( Ifx_GPT12 * gpt12 )

Returns the timer value of the T2 timer.

Parameters
gpt12 Pointer to module base address
Returns
timer current value

Definition at line 1081 of file IfxGpt12.h.

◆ IfxGpt12_T3_getFrequency()

IFX_EXTERN float32 IfxGpt12_T3_getFrequency ( Ifx_GPT12 * gpt12 )

Returns the frequency of the T3 timer.

Parameters
gpt12 Pointer to Module base address
Returns
frequency

Definition at line 93 of file IfxGpt12.c.

◆ IfxGpt12_T3_getMode()

IFX_INLINE IfxGpt12_Mode IfxGpt12_T3_getMode ( Ifx_GPT12 * gpt12 )

Returns the operating mode of the T3 timer.

Parameters
gpt12 Pointer to module base address
Returns
mode of operation

Definition at line 1179 of file IfxGpt12.h.

◆ IfxGpt12_T3_getTimerValue()

IFX_INLINE uint16 IfxGpt12_T3_getTimerValue ( Ifx_GPT12 * gpt12 )

Returns the timer value of the T3 timer.

Parameters
gpt12 Pointer to module base address
Returns
timer current value

Definition at line 1192 of file IfxGpt12.h.

◆ IfxGpt12_T4_getFrequency()

IFX_EXTERN float32 IfxGpt12_T4_getFrequency ( Ifx_GPT12 * gpt12 )

Returns the frequency of the T4 timer.

Parameters
gpt12 Pointer to Module base address
Returns
frequency

Definition at line 134 of file IfxGpt12.c.

◆ IfxGpt12_T4_getMode()

IFX_INLINE IfxGpt12_Mode IfxGpt12_T4_getMode ( Ifx_GPT12 * gpt12 )

Returns the operating mode of the T4 timer.

Parameters
gpt12 Pointer to module base address
Returns
mode of operation

Definition at line 1272 of file IfxGpt12.h.

◆ IfxGpt12_T4_getTimerValue()

IFX_INLINE uint16 IfxGpt12_T4_getTimerValue ( Ifx_GPT12 * gpt12 )

Returns the timer value of the T4 timer.

Parameters
gpt12 Pointer to module base address
Returns
timer current value

Definition at line 1285 of file IfxGpt12.h.

◆ IfxGpt12_T5_getFrequency()

IFX_EXTERN float32 IfxGpt12_T5_getFrequency ( Ifx_GPT12 * gpt12 )

Returns the frequency of the T5 timer.

Parameters
gpt12 Pointer to Module base address
Returns
frequency

Definition at line 175 of file IfxGpt12.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_getMode()

IFX_INLINE IfxGpt12_Mode IfxGpt12_T5_getMode ( Ifx_GPT12 * gpt12 )

Returns the operating mode of the T5 timer.

Parameters
gpt12 Pointer to module base address
Returns
mode of operation

Definition at line 1381 of file IfxGpt12.h.

◆ IfxGpt12_T5_getTimerValue()

IFX_INLINE uint16 IfxGpt12_T5_getTimerValue ( Ifx_GPT12 * gpt12 )

Returns the timer value of the T5 timer.

Parameters
gpt12 Pointer to module base address
Returns
timer current value

Definition at line 1394 of file IfxGpt12.h.

◆ IfxGpt12_T6_getFrequency()

IFX_EXTERN float32 IfxGpt12_T6_getFrequency ( Ifx_GPT12 * gpt12 )

Returns the frequency of the T6 timer.

Parameters
gpt12 Pointer to Module base address
Returns
frequency

Definition at line 216 of file IfxGpt12.c.

◆ IfxGpt12_T6_getMode()

IFX_INLINE IfxGpt12_Mode IfxGpt12_T6_getMode ( Ifx_GPT12 * gpt12 )

Returns the operating mode of the T6 timer.

Parameters
gpt12 Pointer to module base address
Returns
mode of operation

Definition at line 1487 of file IfxGpt12.h.

◆ IfxGpt12_T6_getTimerValue()

IFX_INLINE uint16 IfxGpt12_T6_getTimerValue ( Ifx_GPT12 * gpt12 )

Returns the timer value of the T6 timer.

Parameters
gpt12 Pointer to module base address
Returns
timer current value

Definition at line 1500 of file IfxGpt12.h.


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » GPT12 » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxGpt12_T2_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T2 Timer. More...
IFX_INLINE void | IfxGpt12_T2_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T3_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T3 Timer. More...
IFX_INLINE void | IfxGpt12_T3_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T3 Timer. More...
IFX_INLINE void | IfxGpt12_T4_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T4 Timer. More...
IFX_INLINE void | IfxGpt12_T4_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T5_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T5 Timer. More...
IFX_INLINE void | IfxGpt12_T5_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T6_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T6 Timer. More...
IFX_INLINE void | IfxGpt12_T6_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T6 timer. More...
IFX_INLINE void | IfxGpt12_setCaptureReload (Ifx_GPT12 *gpt12, IfxGpt12_SleepMode value)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxGpt12_setSleepMode (Ifx_GPT12 *gpt12, IfxGpt12_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxGpt12_setSuspendMode (Ifx_GPT12 *gpt12, IfxGpt12_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxGpt12_resetModule (Ifx_GPT12 *gpt12)
resets GPT12 kernel More...

Detailed Description

Function Documentation

◆ IfxGpt12_resetModule()

IFX_EXTERN void IfxGpt12_resetModule ( Ifx_GPT12 * gpt12 )

resets GPT12 kernel

Parameters
gpt12 pointer to GPT12 registers
Returns
None

Definition at line 385 of file IfxGpt12.c.

◆ IfxGpt12_setCaptureReload()

IFX_INLINE void IfxGpt12_setCaptureReload | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_SleepMode | value
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
gpt12 | pointer to GPT12 registers
value | Reload value
Returns
None

Definition at line 1624 of file IfxGpt12.h.

◆ IfxGpt12_setSleepMode()

IFX_INLINE void IfxGpt12_setSleepMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
gpt12 | pointer to GPT12 registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 1642 of file IfxGpt12.h.

◆ IfxGpt12_setSuspendMode()

IFX_INLINE void IfxGpt12_setSuspendMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
gpt12 | Pointer to GPT12 module registers
mode | Module suspend mode
Returns
None

Definition at line 1651 of file IfxGpt12.h.

◆ IfxGpt12_T2_run()

IFX_INLINE void IfxGpt12_T2_run | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRun | runTimer
 | ) |  |

Starts / stops the T2 Timer.

Parameters
gpt12 | Pointer to Module base address
runTimer | Start/stop Timer 2
Returns
None

Definition at line 1087 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T2_setTimerValue()

IFX_INLINE void IfxGpt12_T2_setTimerValue | ( | Ifx_GPT12 * | gpt12,
 |  | uint16 | value
 | ) |  |

Sets value for the T2 timer.

Parameters
gpt12 | pointer to module base address
value | Timer Value
Returns
None

Definition at line 1167 of file IfxGpt12.h.

◆ IfxGpt12_T3_run()

IFX_INLINE void IfxGpt12_T3_run | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRun | runTimer
 | ) |  |

Starts / stops the T3 Timer.

Parameters
gpt12 | Pointer to module base address
runTimer | start/stop Timer 3
Returns
None

Definition at line 1198 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setTimerValue()

IFX_INLINE void IfxGpt12_T3_setTimerValue | ( | Ifx_GPT12 * | gpt12,
 |  | uint16 | value
 | ) |  |

Sets value for the T3 Timer.

Parameters
gpt12 | pointer to module base address
value | Timer Value
Returns
None

Definition at line 1254 of file IfxGpt12.h.

◆ IfxGpt12_T4_run()

IFX_INLINE void IfxGpt12_T4_run | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRun | runTimer
 | ) |  |

Starts / stops the T4 Timer.

Parameters
gpt12 | Pointer to module base address
runTimer | Start/stop Timer 4
Returns
None

Definition at line 1291 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setTimerValue()

IFX_INLINE void IfxGpt12_T4_setTimerValue | ( | Ifx_GPT12 * | gpt12,
 |  | uint16 | value
 | ) |  |

Sets value for the T4 timer.

Parameters
gpt12 | pointer to module base address
value | Timer Value
Returns
None

Definition at line 1369 of file IfxGpt12.h.

◆ IfxGpt12_T5_run()

IFX_INLINE void IfxGpt12_T5_run | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRun | runTimer
 | ) |  |

Starts / stops the T5 Timer.

Parameters
gpt12 | Pointer to module base address
runTimer | Start/stop Timer 5
Returns
None

Definition at line 1400 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setTimerValue()

IFX_INLINE void IfxGpt12_T5_setTimerValue | ( | Ifx_GPT12 * | gpt12,
 |  | uint16 | value
 | ) |  |

Sets value for the T5 timer.

Parameters
gpt12 | pointer to module base address
value | Timer Value
Returns
None

Definition at line 1475 of file IfxGpt12.h.

◆ IfxGpt12_T6_run()

IFX_INLINE void IfxGpt12_T6_run | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRun | runTimer
 | ) |  |

Starts / stops the T6 Timer.

Parameters
gpt12 | Pointer to module base address
runTimer | Start/stop Timer 6
Returns
None

Definition at line 1506 of file IfxGpt12.h.

◆ IfxGpt12_T6_setTimerValue()

IFX_INLINE void IfxGpt12_T6_setTimerValue | ( | Ifx_GPT12 * | gpt12,
 |  | uint16 | value
 | ) |  |

Sets value for the T6 timer.

Parameters
gpt12 | pointer to module base address
value | Timer Value
Returns
None

Definition at line 1564 of file IfxGpt12.h.


iLLD_TC26B: GPT12 Pin Mapping

Data Structures | Macros | Variables
GPT12 Pin Mapping
iLLD » GPT12
Collaboration diagram for GPT12 Pin Mapping:

Data Structures

struct | IfxGpt12_Capin_In
CAPIN pin mapping structure. More...
struct | IfxGpt12_TxEud_In
TxEUD pin mapping structure. More...
struct | IfxGpt12_TxIn_In
TxIN pin mapping structure. More...
struct | IfxGpt12_TxOut_Out
TxOUT pin mapping structure. More...

Macros

#define | IFXGPT12_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXGPT12_PINMAP_NUM_TIMERS 7
#define | IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS 1
#define | IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS 2
#define | IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS 2
#define | IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN
GPT120_CAPINA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN
GPT120_T2EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN
GPT120_T2EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN
GPT120_T3EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN
GPT120_T3EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN
GPT120_T4EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN
GPT120_T4EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN
GPT120_T5EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN
GPT120_T5EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN
GPT120_T6EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN
GPT120_T6EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN
GPT120_T2INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN
GPT120_T2INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN
GPT120_T3INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN
GPT120_T3INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN
GPT120_T4INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN
GPT120_T4INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN
GPT120_T5INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN
GPT120_T5INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN
GPT120_T6INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN
GPT120_T6INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT
GPT120_T3OUT: GPT120 output. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT
GPT120_T3OUT: GPT120 output. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT
GPT120_T6OUT: GPT120 output. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT
GPT120_T6OUT: GPT120 output. More...
IFX_EXTERN const IfxGpt12_Capin_In * | IfxGpt12_Capin_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
IfxGpt12_Capin_In table. More...
IFX_EXTERN const IfxGpt12_TxEud_In * | IfxGpt12_TxEud_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]
IfxGpt12_TxEud_In table. More...
IFX_EXTERN const IfxGpt12_TxIn_In * | IfxGpt12_TxIn_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]
IfxGpt12_TxIn_In table. More...
IFX_EXTERN const IfxGpt12_TxOut_Out * | IfxGpt12_TxOut_Out_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]
IfxGpt12_TxOut_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxGpt12_Capin_In

struct IfxGpt12_Capin_In

CAPIN pin mapping structure.

Definition at line 56 of file IfxGpt12_PinMap.h.

Collaboration diagram for IfxGpt12_Capin_In:
[legend]
Data Fields
Ifx_GPT12 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxGpt12_TxEud_In

struct IfxGpt12_TxEud_In

TxEUD pin mapping structure.

Definition at line 64 of file IfxGpt12_PinMap.h.

Collaboration diagram for IfxGpt12_TxEud_In:
[legend]
Data Fields
Ifx_GPT12 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.
uint8 | timer | Timer number.

◆ IfxGpt12_TxIn_In

struct IfxGpt12_TxIn_In

TxIN pin mapping structure.

Definition at line 73 of file IfxGpt12_PinMap.h.

Collaboration diagram for IfxGpt12_TxIn_In:
[legend]
Data Fields
Ifx_GPT12 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.
uint8 | timer | Timer number.

◆ IfxGpt12_TxOut_Out

struct IfxGpt12_TxOut_Out

TxOUT pin mapping structure.

Definition at line 82 of file IfxGpt12_PinMap.h.

Collaboration diagram for IfxGpt12_TxOut_Out:
[legend]
Data Fields
Ifx_GPT12 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.
uint8 | timer | Timer number.

Macro Definition Documentation

◆ IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS

#define IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS 1

Definition at line 119 of file IfxGpt12_PinMap.h.

◆ IFXGPT12_PINMAP_NUM_MODULES

#define IFXGPT12_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 117 of file IfxGpt12_PinMap.h.

◆ IFXGPT12_PINMAP_NUM_TIMERS

#define IFXGPT12_PINMAP_NUM_TIMERS 7

Definition at line 118 of file IfxGpt12_PinMap.h.

◆ IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS

#define IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS 2

Definition at line 120 of file IfxGpt12_PinMap.h.

◆ IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS

#define IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS 2

Definition at line 121 of file IfxGpt12_PinMap.h.

◆ IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS

#define IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS 2

Definition at line 122 of file IfxGpt12_PinMap.h.

Variable Documentation

◆ IfxGpt120_CAPINA_P13_2_IN

IFX_EXTERN IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN

GPT120_CAPINA: GPT120 input.

Definition at line 90 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T2EUDA_P00_8_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN

GPT120_T2EUDA: GPT120 input.

Definition at line 91 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T2EUDB_P33_6_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN

GPT120_T2EUDB: GPT120 input.

Definition at line 92 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T2INA_P00_7_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN

GPT120_T2INA: GPT120 input.

Definition at line 101 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T2INB_P33_7_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN

GPT120_T2INB: GPT120 input.

Definition at line 102 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3EUDA_P02_7_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN

GPT120_T3EUDA: GPT120 input.

Definition at line 93 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3EUDB_P10_7_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN

GPT120_T3EUDB: GPT120 input.

Definition at line 94 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3INA_P02_6_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN

GPT120_T3INA: GPT120 input.

Definition at line 103 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3INB_P10_4_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN

GPT120_T3INB: GPT120 input.

Definition at line 104 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3OUT_P10_6_OUT

IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT

GPT120_T3OUT: GPT120 output.

Definition at line 111 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3OUT_P21_6_OUT

IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT

GPT120_T3OUT: GPT120 output.

Definition at line 112 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T4EUDA_P00_9_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN

GPT120_T4EUDA: GPT120 input.

Definition at line 95 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T4EUDB_P33_5_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN

GPT120_T4EUDB: GPT120 input.

Definition at line 96 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T4INA_P02_8_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN

GPT120_T4INA: GPT120 input.

Definition at line 105 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T4INB_P10_8_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN

GPT120_T4INB: GPT120 input.

Definition at line 106 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T5EUDA_P21_6_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN

GPT120_T5EUDA: GPT120 input.

Definition at line 97 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T5EUDB_P10_1_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN

GPT120_T5EUDB: GPT120 input.

Definition at line 98 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T5INA_P21_7_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN

GPT120_T5INA: GPT120 input.

Definition at line 107 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T5INB_P10_3_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN

GPT120_T5INB: GPT120 input.

Definition at line 108 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6EUDA_P20_0_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN

GPT120_T6EUDA: GPT120 input.

Definition at line 99 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6EUDB_P10_0_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN

GPT120_T6EUDB: GPT120 input.

Definition at line 100 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6INA_P20_3_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN

GPT120_T6INA: GPT120 input.

Definition at line 109 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6INB_P10_2_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN

GPT120_T6INB: GPT120 input.

Definition at line 110 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6OUT_P10_5_OUT

IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT

GPT120_T6OUT: GPT120 output.

Definition at line 113 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6OUT_P21_7_OUT

IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT

GPT120_T6OUT: GPT120 output.

Definition at line 114 of file IfxGpt12_PinMap.h.

◆ IfxGpt12_Capin_In_pinTable

IFX_EXTERN const IfxGpt12_Capin_In* IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]

IfxGpt12_Capin_In table.

Definition at line 126 of file IfxGpt12_PinMap.h.

◆ IfxGpt12_TxEud_In_pinTable

IFX_EXTERN const IfxGpt12_TxEud_In* IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]

IfxGpt12_TxEud_In table.

Definition at line 129 of file IfxGpt12_PinMap.h.

◆ IfxGpt12_TxIn_In_pinTable

IFX_EXTERN const IfxGpt12_TxIn_In* IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]

IfxGpt12_TxIn_In table.

Definition at line 132 of file IfxGpt12_PinMap.h.

◆ IfxGpt12_TxOut_Out_pinTable

IFX_EXTERN const IfxGpt12_TxOut_Out* IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]

IfxGpt12_TxOut_Out table.

Definition at line 135 of file IfxGpt12_PinMap.h.


iLLD_TC26B: INCRENC

Modules
INCRENC
iLLD » GPT12
Collaboration diagram for INCRENC:

Modules

How to use the GPT12 Incremental Encoder Driver
Data structures
Functions
StdIf Functions

Detailed Description


iLLD_TC26B: How to use the GPT12 Incremental Encoder Driver

How to use the GPT12 Incremental Encoder Driver
iLLD » GPT12 » INCRENC
Collaboration diagram for How to use the GPT12 Incremental Encoder Driver:

The IncrEnc interface can be used in one of the following configurations T3 as core or T2 as core

Setup with T3 as core

  • T3 as incremental mode
    • Multiplication factor:
      • twoFold: use both edges of TxIn
      • fourFold: use both edges of TxIn and TxEUD
      • Reverse of direction supported by GPT12
      • T3 value diff is used for speed calculation at high speed (speed > speedModeThreshold)
  • T4 used for zero signal detection if pinZ is not NULL
    • interrupt is generated to support turn calculation if zeroIsrPriority != 0
    • T4 clears T3 on zero signal event on TxIn input
  • T5 used for low speed calculation (speed < speedModeThreshold)
    • Rising edge of TxIn or TxEUD captures the T5 timer in CAPREL

Setup with T2 as core

  • T2 as incremental mode
    • Multiplication factor:
      • twoFold: sample on both edges of TxIn
      • fourFold: sample on both edges of TxIn and TxEUD
      • Reverse of direction supported by GPT12
      • T2 value diff is used for speed calculation at high speed
  • T4 used for zero signal detection if pinZeroTxEUD is not NULL
  • T4 clears T2 on zero signal event on TxEUD input

Preparation

Include Files

Include following header file into your C code:

#include <Gpt12/Gpt/IfxGpt12_IncrEnc.h>

Variables

// used globally
static IfxGpt12_IncrEnc gpt12;

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define ISR_PRIORITY_INCRENC_ZERO 6

Add the interrupt service routines to your C code. They have to call the GPT12 interrupt handlers by passing the gpt12 handle:

IFX_INTERRUPT(ISR_IncrIncZero, 0, ISR_PRIORITY_INCRENC_ZERO)
{
IfxGpt12_IncrEnc_onZeroIrq(&gpt12);
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&ISR_IncrIncZero, ISR_PRIORITY_INCRENC_ZERO);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// Initialize global clocks
IfxGpt12_enableModule(&MODULE_GPT120);
IfxGpt12_setGpt1BlockPrescaler(&MODULE_GPT120, IfxGpt12_Gpt1BlockPrescaler_8);
IfxGpt12_setGpt2BlockPrescaler(&MODULE_GPT120, IfxGpt12_Gpt2BlockPrescaler_4);
// create module config
IfxGpt12_IncrEnc_Config gpt12Config;
IfxGpt12_IncrEnc_initConfig(&gpt12Config , &MODULE_GPT120);
// implementation with T3 as core
gpt12Config.base.offset = 0;
gpt12Config.base.reversed = FALSE;
gpt12Config.base.resolution = 2048;
gpt12Config.base.periodPerRotation = 1;
gpt12Config.base.resolutionFactor = IfxStdIf_Pos_ResolutionFactor_fourFold;
gpt12Config.base.updatePeriod = 100e-6;
gpt12Config.base.speedModeThreshold = 200;
gpt12Config.base.minSpeed = 10;
gpt12Config.base.maxSpeed = 500;
gpt12Config.zeroIsrPriority = ISR_PRIORITY(INTERRUPT_INCRINC_ZERO);
gpt12Config.zeroIsrProvider = ISR_PROVIDER(INTERRUPT_INCRINC_ZERO);
gpt12Config.pinA = &IfxGpt120_T3INA_P02_6_IN;
gpt12Config.pinB = &IfxGpt120_T3EUDA_P02_7_IN;
gpt12Config.pinZ = &IfxGpt120_T4INA_P02_8_IN;
gpt12Config.pinMode = IfxPort_InputMode_noPullDevice;
gpt12Config.base.speedFilterEnabled = TRUE;
gpt12Config.base.speedFilerCutOffFrequency = config.base.maxSpeed / 2 * IFX_PI * 2;
// initialize module
//IfxGpt12_IncrEnc gpt12; // defined globally
IfxGpt12_IncrEnc_init(&gpt12, &gpt12Config);

Update

speed, position and direction of the incremental encoder can be collected by the following

float32 speed, rawPosition;
IfxStdIf_Pos_Dir direction;
Ifx_TickTime tickRefresh = gpt12.updatePeriod * TimeConst_1s;
Ifx_TickTime refreshDeadLine = now();
if (isDeadLine(refreshDeadLine))
{
refreshDeadLine = addTTime(refreshDeadLine, tickRefresh);
IfxGpt12_IncrEnc_update(&gpt12);
speed = IfxGpt12_IncrEnc_getSpeed(&gpt12);
rawPosition = IfxGpt12_IncrEnc_getRawPosition(&gpt12);
direction = IfxGpt12_IncrEnc_getDirection(&gpt12);
}


iLLD_TC26B: Data structures

Data Structures
Data structures
iLLD » GPT12 » INCRENC
Collaboration diagram for Data structures:

Data Structures

struct | IfxGpt12_IncrEnc
Incremental encoder object. More...
struct | IfxGpt12_IncrEnc_Config
Configuration structure for GPT12. More...

Detailed Description

Data Structure Documentation

◆ IfxGpt12_IncrEnc

struct IfxGpt12_IncrEnc

Incremental encoder object.

Definition at line 209 of file IfxGpt12_IncrEnc.h.

Collaboration diagram for IfxGpt12_IncrEnc:
[legend]
Data Fields
IfxStdIf_Pos_Dir | direction | rotation direction
float32 | maxSpeed | Absolute maximal allowed speed. Above speed is recognized as error.
float32 | minSpeed | Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Ifx_GPT12 * | module | Pointer to the GPT12 module.
sint32 | offset | raw position offset
float32 | positionConst | constant for calculating mechanical position (in rad) from raw position
sint32 rawPosition raw position in ticks.
Note
: the value already contains the offset
sint32 | resolution | resolution of this position sensor interface
float32 | speed | mechanical speed in rad/s
float32 | speedConstPulseCount | constant for calculating mechanical speed (in rad/s) from raw speed in pulse count mode
float32 | speedConstTimeDiff | constant for calculating mechanical speed (in rad/s) from raw speed in time diff mode
float32 | speedModeThreshold | treshold used for speed calculation using pulse count mode or time diff mode in rad/s
sint32 | speedModeThresholdTick | treshold used for speed calculation using pulse count mode or time diff mode in ticks
IfxStdIf_Pos_Status | status | error code (0 = no error)
sint32 | turn | number of mechanical turns
IfxGpt12_IncrEnc_Update | update | Update call back API.
float32 | updatePeriod | update period in seconds

◆ IfxGpt12_IncrEnc_Config

struct IfxGpt12_IncrEnc_Config

Configuration structure for GPT12.

Definition at line 232 of file IfxGpt12_IncrEnc.h.

Collaboration diagram for IfxGpt12_IncrEnc_Config:
[legend]
Data Fields
IfxStdIf_Pos_Config | base | Configuration data of Standard interface: Position interface.
boolean | initPins | TRUE: Initialize pins in driver FALSE: Don't initialize pins. User handles separately.
Ifx_GPT12 * | module | Pointer to module base address.
IfxGpt12_TxIn_In * | pinA | Encoder A signal. Should be connecting to T2 or T3 TxIN. See GPT12 pin map data.
IfxGpt12_TxEud_In * | pinB | Encoder B signal. Should be connecting to T2 or T3 TxEUD. See GPT12 pin map data.
IfxPort_PadDriver | pinDriver | Pad Driver.
IfxPort_InputMode | pinMode | Pin mode for A, B and Z inputs.
IfxGpt12_TxIn_In * | pinZ | Encoder Z signal. Should be connecting to T4 TxIn for use with T3 and TxEUD (Ignore compiler type conflict warning) for use with T4. See GPT12 pin map data.
Ifx_Priority | zeroIsrPriority | Interrupt isrPriority of the zero interrupt, if 0 the interrupt is disable.
IfxSrc_Tos | zeroIsrProvider | Interrupt service provider for the zero interrupt.


iLLD_TC26B: Functions

Functions
Functions
iLLD » GPT12 » INCRENC
Collaboration diagram for Functions:

Functions

IFX_EXTERN boolean | IfxGpt12_IncrEnc_init (IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
Initialises the Incremental interface. More...
IFX_EXTERN void | IfxGpt12_IncrEnc_initConfig (IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGpt12_IncrEnc_init()

IFX_EXTERN boolean IfxGpt12_IncrEnc_init | ( | IfxGpt12_IncrEnc * | driver,
 |  | const IfxGpt12_IncrEnc_Config * | config
 | ) |  |

Initialises the Incremental interface.

Parameters
driver | incremental encoder interface Handle
config | Configuration structure for incremental encoder
Returns
TRUE on success else FALSE
// create module config
IfxGpt12_IncrEnc_Config gptConfig;
IfxGpt12_IncrEnc_initConfig(&gptConfig , &MODULE_GPT120);
// initialize module
//IfxGpt12_IncrEnc gpt12; // defined globally
IfxGpt12_IncrEnc_init(&gpt12, &gptConfig);

Definition at line 158 of file IfxGpt12_IncrEnc.c.

◆ IfxGpt12_IncrEnc_initConfig()

IFX_EXTERN void IfxGpt12_IncrEnc_initConfig | ( | IfxGpt12_IncrEnc_Config * | config,
 |  | Ifx_GPT12 * | gpt12
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | Configuration structure for incremental encoder
gpt12 | pointer to module base address
Returns
None

see IfxGpt12_IncrEnc_init

Definition at line 293 of file IfxGpt12_IncrEnc.c.


iLLD_TC26B: StdIf Functions

Functions
StdIf Functions
iLLD » GPT12 » INCRENC
Collaboration diagram for StdIf Functions:

Functions

IFX_EXTERN float32 | IfxGpt12_IncrEnc_getAbsolutePosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_Dir | IfxGpt12_IncrEnc_getDirection (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_Status | IfxGpt12_IncrEnc_getFault (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getOffset (IfxGpt12_IncrEnc *driver)
IFX_EXTERN uint16 | IfxGpt12_IncrEnc_getPeriodPerRotation (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getPosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getRawPosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getRefreshPeriod (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getResolution (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_SensorType | IfxGpt12_IncrEnc_getSensorType (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getSpeed (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getTurn (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_onZeroIrq (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_reset (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_resetFaults (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_setOffset (IfxGpt12_IncrEnc *driver, sint32 offset)
IFX_EXTERN void | IfxGpt12_IncrEnc_setRefreshPeriod (IfxGpt12_IncrEnc *driver, float32 updatePeriod)
IFX_EXTERN void | IfxGpt12_IncrEnc_update (IfxGpt12_IncrEnc *driver)

Detailed Description

Function Documentation

◆ IfxGpt12_IncrEnc_getAbsolutePosition()

IFX_EXTERN float32 IfxGpt12_IncrEnc_getAbsolutePosition ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetAbsolutePosition
Parameters
driver driver handle
Returns
absolute position

Definition at line 84 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getDirection()

IFX_EXTERN IfxStdIf_Pos_Dir IfxGpt12_IncrEnc_getDirection ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetDirection
Parameters
driver driver handle
Returns
direction

Definition at line 90 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getFault()

IFX_EXTERN IfxStdIf_Pos_Status IfxGpt12_IncrEnc_getFault ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetFault
Parameters
driver driver handle
Returns
Fault

Definition at line 96 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getOffset()

IFX_EXTERN sint32 IfxGpt12_IncrEnc_getOffset ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetOffset
Parameters
driver driver handle
Returns
offset address

Definition at line 102 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getPeriodPerRotation()

IFX_EXTERN uint16 IfxGpt12_IncrEnc_getPeriodPerRotation ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetPeriodPerRotation
Parameters
driver driver handle
Returns
Period per rotation

Definition at line 108 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getPosition()

IFX_EXTERN float32 IfxGpt12_IncrEnc_getPosition ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetPosition
Parameters
driver driver handle
Returns
position

Definition at line 115 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getRawPosition()

IFX_EXTERN sint32 IfxGpt12_IncrEnc_getRawPosition ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetRawPosition
Parameters
driver driver handle
Returns
position in ticks

Definition at line 121 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getRefreshPeriod()

IFX_EXTERN float32 IfxGpt12_IncrEnc_getRefreshPeriod ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetRefreshPeriod
Parameters
driver driver handle
Returns
update period

Definition at line 127 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getResolution()

IFX_EXTERN sint32 IfxGpt12_IncrEnc_getResolution ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetResolution
Parameters
driver driver handle
Returns
resolution

Definition at line 133 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getSensorType()

IFX_EXTERN IfxStdIf_Pos_SensorType IfxGpt12_IncrEnc_getSensorType ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetSensorType
Parameters
driver driver handle
Returns
sensor type

Definition at line 139 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getSpeed()

IFX_EXTERN float32 IfxGpt12_IncrEnc_getSpeed ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetSpeed
Parameters
driver driver handle
Returns
speed

Definition at line 146 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getTurn()

IFX_EXTERN sint32 IfxGpt12_IncrEnc_getTurn ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetTurn
Parameters
driver driver handle
Returns
the number of turns

Definition at line 152 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_onZeroIrq()

IFX_EXTERN void IfxGpt12_IncrEnc_onZeroIrq ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_OnZeroIrq
Parameters
driver driver handle
Returns
None

Definition at line 314 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_reset()

IFX_EXTERN void IfxGpt12_IncrEnc_reset ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_Reset
Parameters
driver driver handle
Returns
None

Definition at line 332 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_resetFaults()

IFX_EXTERN void IfxGpt12_IncrEnc_resetFaults ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_ResetFaults
Parameters
driver driver handle
Returns
None

Definition at line 342 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_setOffset()

IFX_EXTERN void IfxGpt12_IncrEnc_setOffset | ( | IfxGpt12_IncrEnc * | driver,
 |  | sint32 | offset
 | ) |  |
See also
IfxStdIf_Pos_SetOffset
Parameters
driver | driver handle
offset | offset address
Returns
None

Definition at line 351 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_setRefreshPeriod()

IFX_EXTERN void IfxGpt12_IncrEnc_setRefreshPeriod | ( | IfxGpt12_IncrEnc * | driver,
 |  | float32 | updatePeriod
 | ) |  |
See also
IfxStdIf_Pos_SetRefreshPeriod
Parameters
driver | driver handle
updatePeriod | update period
Returns
None

Definition at line 358 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_init(), and IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_update()

IFX_EXTERN void IfxGpt12_IncrEnc_update ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_Update
Parameters
driver driver handle
Returns
None

Definition at line 400 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().


iLLD_TC26B: IfxGpt12_cfg.h File Reference

  • _Impl
Macros
IfxGpt12_cfg.h File Reference
iLLD » GPT12

GPT12 on-chip implementation data. More...

Go to the source code of this file.

Macros

#define IFXGPT12_NUM_MODULES (1)

Detailed Description

GPT12 on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGpt12_cfg.h.

Macro Definition Documentation

◆ IFXGPT12_NUM_MODULES

#define IFXGPT12_NUM_MODULES (1)

Definition at line 60 of file IfxGpt12_cfg.h.


iLLD_TC26B: IfxGpt12_PinMap.c File Reference

  • _PinMap
Variables
IfxGpt12_PinMap.c File Reference
iLLD » GPT12

GPT12 I/O map. More...

#include "IfxGpt12_PinMap.h"
Include dependency graph for IfxGpt12_PinMap.c:

Go to the source code of this file.

Variables

IfxGpt12_Capin_In | IfxGpt120_CAPINA_P13_2_IN = {&MODULE_GPT120, {&MODULE_P13, 2}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T2EUDA_P00_8_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 8}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T2EUDB_P33_6_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 6}, Ifx_RxSel_b}
IfxGpt12_TxEud_In | IfxGpt120_T3EUDA_P02_7_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 7}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T3EUDB_P10_7_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 7}, Ifx_RxSel_b}
IfxGpt12_TxEud_In | IfxGpt120_T4EUDA_P00_9_IN = {&MODULE_GPT120, 4, {&MODULE_P00, 9}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T4EUDB_P33_5_IN = {&MODULE_GPT120, 4, {&MODULE_P33, 5}, Ifx_RxSel_b}
IfxGpt12_TxEud_In | IfxGpt120_T5EUDA_P21_6_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 6}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T5EUDB_P10_1_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 1}, Ifx_RxSel_b}
IfxGpt12_TxEud_In | IfxGpt120_T6EUDA_P20_0_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 0}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T6EUDB_P10_0_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 0}, Ifx_RxSel_b}
IfxGpt12_TxIn_In | IfxGpt120_T2INA_P00_7_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 7}, Ifx_RxSel_a}
IfxGpt12_TxIn_In | IfxGpt120_T2INB_P33_7_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 7}, Ifx_RxSel_b}
IfxGpt12_TxIn_In | IfxGpt120_T3INA_P02_6_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 6}, Ifx_RxSel_a}
IfxGpt12_TxIn_In | IfxGpt120_T3INB_P10_4_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 4}, Ifx_RxSel_b}
IfxGpt12_TxIn_In | IfxGpt120_T4INA_P02_8_IN = {&MODULE_GPT120, 4, {&MODULE_P02, 8}, Ifx_RxSel_a}
IfxGpt12_TxIn_In | IfxGpt120_T4INB_P10_8_IN = {&MODULE_GPT120, 4, {&MODULE_P10, 8}, Ifx_RxSel_b}
IfxGpt12_TxIn_In | IfxGpt120_T5INA_P21_7_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 7}, Ifx_RxSel_a}
IfxGpt12_TxIn_In | IfxGpt120_T5INB_P10_3_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 3}, Ifx_RxSel_b}
IfxGpt12_TxIn_In | IfxGpt120_T6INA_P20_3_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 3}, Ifx_RxSel_a}
IfxGpt12_TxIn_In | IfxGpt120_T6INB_P10_2_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 2}, Ifx_RxSel_b}
IfxGpt12_TxOut_Out | IfxGpt120_T3OUT_P10_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt4}
IfxGpt12_TxOut_Out | IfxGpt120_T3OUT_P21_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt7}
IfxGpt12_TxOut_Out | IfxGpt120_T6OUT_P10_5_OUT = {&MODULE_GPT120, 6, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt5}
IfxGpt12_TxOut_Out | IfxGpt120_T6OUT_P21_7_OUT = {&MODULE_GPT120, 6, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt7}
const IfxGpt12_Capin_In * | IfxGpt12_Capin_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
const IfxGpt12_TxEud_In * | IfxGpt12_TxEud_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]
const IfxGpt12_TxIn_In * | IfxGpt12_TxIn_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]
const IfxGpt12_TxOut_Out * | IfxGpt12_TxOut_Out_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]

Detailed Description

GPT12 I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGpt12_PinMap.c.

Variable Documentation

◆ IfxGpt120_CAPINA_P13_2_IN

IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN = {&MODULE_GPT120, {&MODULE_P13, 2}, Ifx_RxSel_a}

Definition at line 45 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T2EUDA_P00_8_IN

IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 8}, Ifx_RxSel_a}

Definition at line 46 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T2EUDB_P33_6_IN

IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 6}, Ifx_RxSel_b}

Definition at line 47 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T2INA_P00_7_IN

IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 7}, Ifx_RxSel_a}

Definition at line 56 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T2INB_P33_7_IN

IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 7}, Ifx_RxSel_b}

Definition at line 57 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3EUDA_P02_7_IN

IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 7}, Ifx_RxSel_a}

Definition at line 48 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3EUDB_P10_7_IN

IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 7}, Ifx_RxSel_b}

Definition at line 49 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3INA_P02_6_IN

IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 6}, Ifx_RxSel_a}

Definition at line 58 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3INB_P10_4_IN

IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 4}, Ifx_RxSel_b}

Definition at line 59 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3OUT_P10_6_OUT

IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt4}

Definition at line 66 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3OUT_P21_6_OUT

IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt7}

Definition at line 67 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T4EUDA_P00_9_IN

IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN = {&MODULE_GPT120, 4, {&MODULE_P00, 9}, Ifx_RxSel_a}

Definition at line 50 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T4EUDB_P33_5_IN

IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN = {&MODULE_GPT120, 4, {&MODULE_P33, 5}, Ifx_RxSel_b}

Definition at line 51 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T4INA_P02_8_IN

IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN = {&MODULE_GPT120, 4, {&MODULE_P02, 8}, Ifx_RxSel_a}

Definition at line 60 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T4INB_P10_8_IN

IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN = {&MODULE_GPT120, 4, {&MODULE_P10, 8}, Ifx_RxSel_b}

Definition at line 61 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T5EUDA_P21_6_IN

IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 6}, Ifx_RxSel_a}

Definition at line 52 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T5EUDB_P10_1_IN

IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 1}, Ifx_RxSel_b}

Definition at line 53 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T5INA_P21_7_IN

IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 7}, Ifx_RxSel_a}

Definition at line 62 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T5INB_P10_3_IN

IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 3}, Ifx_RxSel_b}

Definition at line 63 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6EUDA_P20_0_IN

IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 0}, Ifx_RxSel_a}

Definition at line 54 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6EUDB_P10_0_IN

IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 0}, Ifx_RxSel_b}

Definition at line 55 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6INA_P20_3_IN

IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 3}, Ifx_RxSel_a}

Definition at line 64 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6INB_P10_2_IN

IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 2}, Ifx_RxSel_b}

Definition at line 65 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6OUT_P10_5_OUT

IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT = {&MODULE_GPT120, 6, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt5}

Definition at line 68 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6OUT_P21_7_OUT

IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT = {&MODULE_GPT120, 6, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt7}

Definition at line 69 of file IfxGpt12_PinMap.c.

◆ IfxGpt12_Capin_In_pinTable

const IfxGpt12_Capin_In* IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxGpt120_CAPINA_P13_2_IN
}
}
IfxGpt120_CAPINA_P13_2_IN
IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN
Definition: IfxGpt12_PinMap.c:45

Definition at line 72 of file IfxGpt12_PinMap.c.

◆ IfxGpt12_TxEud_In_pinTable

const IfxGpt12_TxEud_In* IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]

Definition at line 78 of file IfxGpt12_PinMap.c.

◆ IfxGpt12_TxIn_In_pinTable

const IfxGpt12_TxIn_In* IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]

Definition at line 111 of file IfxGpt12_PinMap.c.

◆ IfxGpt12_TxOut_Out_pinTable

const IfxGpt12_TxOut_Out* IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]

Definition at line 144 of file IfxGpt12_PinMap.c.


iLLD_TC26B: IfxGpt12_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxGpt12_PinMap.h File Reference
iLLD » GPT12

GPT12 I/O map. More...

#include <IfxGpt12_reg.h>
#include <_Impl/IfxGpt12_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxGpt12_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxGpt12_Capin_In
CAPIN pin mapping structure. More...
struct | IfxGpt12_TxEud_In
TxEUD pin mapping structure. More...
struct | IfxGpt12_TxIn_In
TxIN pin mapping structure. More...
struct | IfxGpt12_TxOut_Out
TxOUT pin mapping structure. More...

Macros

#define | IFXGPT12_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXGPT12_PINMAP_NUM_TIMERS 7
#define | IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS 1
#define | IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS 2
#define | IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS 2
#define | IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN
GPT120_CAPINA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN
GPT120_T2EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN
GPT120_T2EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN
GPT120_T3EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN
GPT120_T3EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN
GPT120_T4EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN
GPT120_T4EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN
GPT120_T5EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN
GPT120_T5EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN
GPT120_T6EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN
GPT120_T6EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN
GPT120_T2INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN
GPT120_T2INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN
GPT120_T3INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN
GPT120_T3INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN
GPT120_T4INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN
GPT120_T4INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN
GPT120_T5INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN
GPT120_T5INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN
GPT120_T6INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN
GPT120_T6INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT
GPT120_T3OUT: GPT120 output. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT
GPT120_T3OUT: GPT120 output. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT
GPT120_T6OUT: GPT120 output. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT
GPT120_T6OUT: GPT120 output. More...
IFX_EXTERN const IfxGpt12_Capin_In * | IfxGpt12_Capin_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
IfxGpt12_Capin_In table. More...
IFX_EXTERN const IfxGpt12_TxEud_In * | IfxGpt12_TxEud_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]
IfxGpt12_TxEud_In table. More...
IFX_EXTERN const IfxGpt12_TxIn_In * | IfxGpt12_TxIn_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]
IfxGpt12_TxIn_In table. More...
IFX_EXTERN const IfxGpt12_TxOut_Out * | IfxGpt12_TxOut_Out_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]
IfxGpt12_TxOut_Out table. More...

Detailed Description

GPT12 I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGpt12_PinMap.h.


iLLD_TC26B: IfxGpt12_IncrEnc.h File Reference

  • Gpt12
  • IncrEnc
Data Structures | Typedefs | Functions
IfxGpt12_IncrEnc.h File Reference
iLLD » GPT12

GPT12 INCRENC details. More...

#include "StdIf/IfxStdIf_Pos.h"
#include "Gpt12/Std/IfxGpt12.h"
#include "string.h"
Include dependency graph for IfxGpt12_IncrEnc.h:

Go to the source code of this file.

Data Structures

struct | IfxGpt12_IncrEnc
Incremental encoder object. More...
struct | IfxGpt12_IncrEnc_Config
Configuration structure for GPT12. More...

Typedefs

typedef IfxStdIf_Pos_Update IfxGpt12_IncrEnc_Update

Functions

IFX_EXTERN boolean | IfxGpt12_IncrEnc_init (IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
Initialises the Incremental interface. More...
IFX_EXTERN void | IfxGpt12_IncrEnc_initConfig (IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
Initializes the configuration structure to default. More...
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getAbsolutePosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_Dir | IfxGpt12_IncrEnc_getDirection (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_Status | IfxGpt12_IncrEnc_getFault (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getOffset (IfxGpt12_IncrEnc *driver)
IFX_EXTERN uint16 | IfxGpt12_IncrEnc_getPeriodPerRotation (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getPosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getRawPosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getRefreshPeriod (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getResolution (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_SensorType | IfxGpt12_IncrEnc_getSensorType (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getSpeed (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getTurn (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_onZeroIrq (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_reset (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_resetFaults (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_setOffset (IfxGpt12_IncrEnc *driver, sint32 offset)
IFX_EXTERN void | IfxGpt12_IncrEnc_setRefreshPeriod (IfxGpt12_IncrEnc *driver, float32 updatePeriod)
IFX_EXTERN void | IfxGpt12_IncrEnc_update (IfxGpt12_IncrEnc *driver)
IFX_EXTERN boolean | IfxGpt12_IncrEnc_stdIfPosInit (IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver)
Initializes the standard interface "Pos". More...

Detailed Description

GPT12 INCRENC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGpt12_IncrEnc.h.

Typedef Documentation

◆ IfxGpt12_IncrEnc_Update

typedef IfxStdIf_Pos_Update IfxGpt12_IncrEnc_Update

Definition at line 199 of file IfxGpt12_IncrEnc.h.

Function Documentation

◆ IfxGpt12_IncrEnc_stdIfPosInit()

IFX_EXTERN boolean IfxGpt12_IncrEnc_stdIfPosInit | ( | IfxStdIf_Pos * | stdif,
 |  | IfxGpt12_IncrEnc * | driver
 | ) |  |

Initializes the standard interface "Pos".

Parameters
stdif | Standard interface position object
driver | incremental encoder interface Handle
Returns
TRUE on success else FALSE

Definition at line 366 of file IfxGpt12_IncrEnc.c.


iLLD_TC26B: IfxGpt12.h File Reference

  • Gpt12
  • Std
Enumerations | Functions
IfxGpt12.h File Reference
iLLD » GPT12

GPT12 basic functionality. More...

#include "_Impl/IfxGpt12_cfg.h"
#include "Src/Std/IfxSrc.h"
#include "_Utilities/Ifx_Assert.h"
#include "Scu/Std/IfxScuCcu.h"
#include "IfxGpt12_reg.h"
#include "_PinMap/IfxGpt12_PinMap.h"
Include dependency graph for IfxGpt12.h:

Go to the source code of this file.

Enumerations

enum IfxGpt12_CaptureInput {
IfxGpt12_CaptureInput_A = 0,
IfxGpt12_CaptureInput_B = 1,
IfxGpt12_CaptureInput_C = 2,
IfxGpt12_CaptureInput_D = 3
}
Input Select for CAPIN
Definition in IfxGPT12.PISEL.B.ISCAPIN. More...
enum IfxGpt12_CaptureInputMode {
IfxGpt12_CaptureInputMode_none = 0,
IfxGpt12_CaptureInputMode_risingEdgeTxIN = 1,
IfxGpt12_CaptureInputMode_fallingEdgeTxIN = 2,
IfxGpt12_CaptureInputMode_bothEdgesTxIN = 3
}
Tx Input Edge Selection (Capture Mode, x=2,4) More...
enum IfxGpt12_CaptureTrigger {
IfxGpt12_CaptureTrigger_capin = 0,
IfxGpt12_CaptureTrigger_t3inOrT3EUD = 1
}
Capture Trigger Enable
Definition in IfxGPT12.T5CON.B.CT3. More...
enum IfxGpt12_CaptureTriggerMode {
IfxGpt12_CaptureTriggerMode_disabled = 0,
IfxGpt12_CaptureTriggerMode_risingEdge = 1,
IfxGpt12_CaptureTriggerMode_fallingEdge = 2,
IfxGpt12_CaptureTriggerMode_randomEdge = 3
}
Capture Trigger Selection
Definition in IfxGPT12.T5CON.B.CI. More...
enum IfxGpt12_CounterInputMode {
IfxGpt12_CounterInputMode_counterDisabled = 0,
IfxGpt12_CounterInputMode_risingEdgeTxIN = 1,
IfxGpt12_CounterInputMode_fallingEdgeTxIN = 2,
IfxGpt12_CounterInputMode_bothEdgesTxIN = 3,
IfxGpt12_CounterInputMode_risingEdgeTxOTL = 5,
IfxGpt12_CounterInputMode_fallingEdgeTxOTL = 6,
IfxGpt12_CounterInputMode_bothEdgesTxOTL = 7
}
Input Edge Selection for counter mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 6) More...
enum IfxGpt12_EudInput {
IfxGpt12_EudInput_A = 0,
IfxGpt12_EudInput_B = 1,
IfxGpt12_EudInput_C = 2,
IfxGpt12_EudInput_D = 3
}
Input Select for TxEUD
Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4) More...
enum IfxGpt12_Gpt1BlockPrescaler {
IfxGpt12_Gpt1BlockPrescaler_8 = 0,
IfxGpt12_Gpt1BlockPrescaler_4 = 1,
IfxGpt12_Gpt1BlockPrescaler_32 = 2,
IfxGpt12_Gpt1BlockPrescaler_16 = 3
}
GPT1 block prescaler Selection
Definition in IfxGPT12.T3CON.B.BPS1. More...
enum IfxGpt12_Gpt2BlockPrescaler {
IfxGpt12_Gpt2BlockPrescaler_4 = 0,
IfxGpt12_Gpt2BlockPrescaler_2 = 1,
IfxGpt12_Gpt2BlockPrescaler_16 = 2,
IfxGpt12_Gpt2BlockPrescaler_8 = 3
}
Gpt2 block prescaler Selection
Definition in IfxGPT12.T6CON.B.BPS2. More...
enum IfxGpt12_IncrementalInterfaceInputMode {
IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx = 0,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN = 1,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD = 2,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD = 3
}
Input Edge Selection for Incremental Interface mode
Definition in IfxGPT12.TxCON.B.TxI (x=2, 3 and 4) More...
enum IfxGpt12_Input {
IfxGpt12_Input_A = 0,
IfxGpt12_Input_B = 1,
IfxGpt12_Input_C = 2,
IfxGpt12_Input_D = 3
}
Input Select for TxIN
Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4) More...
enum IfxGpt12_Mode {
IfxGpt12_Mode_timer = 0,
IfxGpt12_Mode_counter = 1,
IfxGpt12_Mode_lowGatedTimer = 2,
IfxGpt12_Mode_highGatedTimer = 3,
IfxGpt12_Mode_reload = 4,
IfxGpt12_Mode_capture = 5,
IfxGpt12_Mode_incrementalInterfaceRotationDetection = 6,
IfxGpt12_Mode_incrementalInterfaceEdgeDetection = 7
}
Timer operating mode
Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4) More...
enum IfxGpt12_ReloadInputMode {
IfxGpt12_ReloadInputMode_counterDisabled = 0,
IfxGpt12_ReloadInputMode_risingEdgeTxIN = 1,
IfxGpt12_ReloadInputMode_fallingEdgeTxIN = 2,
IfxGpt12_ReloadInputMode_bothEdgesTxIN = 3,
IfxGpt12_ReloadInputMode_risingEdgeTxOTL = 5,
IfxGpt12_ReloadInputMode_fallingEdgeTxOTL = 6,
IfxGpt12_ReloadInputMode_bothEdgesTxOTL = 7
}
Input Edge Selection for reload mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 and 4) More...
enum IfxGpt12_SleepMode {
IfxGpt12_SleepMode_enable = 0,
IfxGpt12_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_GPT12.CLC.B.EDIS. More...
enum IfxGpt12_SuspendMode {
IfxGpt12_SuspendMode_none = 0,
IfxGpt12_SuspendMode_hard = 1,
IfxGpt12_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxGpt12_TimerDirection {
IfxGpt12_TimerDirection_up = 0,
IfxGpt12_TimerDirection_down = 1
}
Timer Count Direction
Definition in IfxGPT12.TxCON.B.TxUD (x=2 to 6) More...
enum IfxGpt12_TimerDirectionSource {
IfxGpt12_TimerDirectionSource_internal = 0,
IfxGpt12_TimerDirectionSource_external = 1
}
Timer count direction control source
Definition in IfxGPT12.TxCON.B.TxUDE (x=2 to 6) More...
enum IfxGpt12_TimerInputPrescaler {
IfxGpt12_TimerInputPrescaler_1 = 0,
IfxGpt12_TimerInputPrescaler_2 = 1,
IfxGpt12_TimerInputPrescaler_4 = 2,
IfxGpt12_TimerInputPrescaler_8 = 3,
IfxGpt12_TimerInputPrescaler_16 = 4,
IfxGpt12_TimerInputPrescaler_32 = 5,
IfxGpt12_TimerInputPrescaler_64 = 6,
IfxGpt12_TimerInputPrescaler_128 = 7
}
Input prescaler Selection for the timer
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4) More...
enum IfxGpt12_TimerReloadMode {
IfxGpt12_TimerReloadMode_disable,
IfxGpt12_TimerReloadMode_enable
}
Timer Reload Mode
Definition in IfxGPT12.T6CON.B.T6SR. More...
enum IfxGpt12_TimerRemoteControl {
IfxGpt12_TimerRemoteControl_off = 0,
IfxGpt12_TimerRemoteControl_on = 1
}
Timer Remote Control enable choice
Definition in IfxGPT12.TxCON.B.TxRC (x = 2 and 4) More...
enum IfxGpt12_TimerRun {
IfxGpt12_TimerRun_stop = 0,
IfxGpt12_TimerRun_start = 1
}
Timer Run / stop control choice (only if TxCON.B.TxRC = 0)
Definition in IfxGPT12.TxCON.B.TxR (x = 2 to 6) More...

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T2_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 2 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T3_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 3 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T4_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 4 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T5_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 5 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T6_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 6 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_getCaptureSrc (Ifx_GPT12 *gpt12)
Returns the address of capture service request. More...
IFX_INLINE void | IfxGpt12_T2_setCaptureInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T2 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T2_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setInterruptEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setReloadInputMode (Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T2 timer count direction. More...
IFX_INLINE void | IfxGpt12_T2_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T2 timer. More...
IFX_INLINE void | IfxGpt12_T3_enableOutput (Ifx_GPT12 *gpt12, boolean enable)
Enable / Disable the T3 Output on pin T3OUT. More...
IFX_INLINE void | IfxGpt12_T3_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T3 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T3_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T3 timer count direction. More...
IFX_INLINE void | IfxGpt12_T3_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T3 timer. More...
IFX_INLINE void | IfxGpt12_T4_enableClearTimerT2 (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T2 bit of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_enableClearTimerT3 (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T3 bit of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setCaptureInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T4 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T4_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setInterruptEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setReloadInputMode (Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T4 timer count direction. More...
IFX_INLINE void | IfxGpt12_T4_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T4 timer. More...
IFX_INLINE void | IfxGpt12_T5_enableClearTimer (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTrigger (Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger)
Sets the capture trigger of teh T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTriggerEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the capture trigger of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTriggerMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode)
Sets the capture trigger mode of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T5 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T5_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T5 timer count direction. More...
IFX_INLINE void | IfxGpt12_T5_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer. More...
IFX_INLINE void | IfxGpt12_T6_enableClearTimer (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
sets the T6 timer count direction source internal / external More...
IFX_INLINE void | IfxGpt12_T6_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setReloadMode (Ifx_GPT12 *gpt12, IfxGpt12_TimerReloadMode mode)
sets the T6 timer count direction More...
IFX_INLINE void | IfxGpt12_T6_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
sets the T6 timer count direction More...
IFX_INLINE void | IfxGpt12_T6_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T6 timer. More...
IFX_INLINE void | IfxGpt12_initCapInPin (const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode)
Initializes a Capin_In input. More...
IFX_INLINE void | IfxGpt12_initTxOutPin (const IfxGpt12_TxOut_Out *txOut, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output. More...
IFX_INLINE void | IfxGpt12_setCaptureInput (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInput input)
Sets the capture input. More...
IFX_INLINE void | IfxGpt12_setGpt1BlockPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_Gpt1BlockPrescaler bps1)
Sets the GPT1 block prescaler. More...
IFX_INLINE void | IfxGpt12_setGpt2BlockPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_Gpt2BlockPrescaler bps2)
Sets the GPT2 block prescaler. More...
IFX_EXTERN void | IfxGpt12_disableModule (Ifx_GPT12 *gpt12)
Disables the module. More...
IFX_EXTERN void | IfxGpt12_enableModule (Ifx_GPT12 *gpt12)
Enables the module. More...
IFX_EXTERN void | IfxGpt12_initTxEudInPin (const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
Initializes a TxEUDIn_IN input. More...
IFX_EXTERN void | IfxGpt12_initTxInPin (const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
Initializes a TxIn input. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T2_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T2 timer. More...
IFX_INLINE uint16 | IfxGpt12_T2_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T2 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T3_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T3 timer. More...
IFX_INLINE uint16 | IfxGpt12_T3_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T3 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T4_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T4 timer. More...
IFX_INLINE uint16 | IfxGpt12_T4_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T4 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T5_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T5 timer. More...
IFX_INLINE uint16 | IfxGpt12_T5_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T5 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T6_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T6 timer. More...
IFX_INLINE uint16 | IfxGpt12_T6_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T6 timer. More...
IFX_INLINE float32 | IfxGpt12_getModuleFrequency (Ifx_GPT12 *gpt12)
Returns the gpt12 module frequency. More...
IFX_EXTERN float32 | IfxGpt12_T2_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T2 timer. More...
IFX_EXTERN float32 | IfxGpt12_T3_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T3 timer. More...
IFX_EXTERN float32 | IfxGpt12_T4_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T4 timer. More...
IFX_EXTERN float32 | IfxGpt12_T5_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer. More...
IFX_EXTERN float32 | IfxGpt12_T6_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T6 timer. More...
IFX_INLINE void | IfxGpt12_T2_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T2 Timer. More...
IFX_INLINE void | IfxGpt12_T2_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T3_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T3 Timer. More...
IFX_INLINE void | IfxGpt12_T3_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T3 Timer. More...
IFX_INLINE void | IfxGpt12_T4_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T4 Timer. More...
IFX_INLINE void | IfxGpt12_T4_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T5_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T5 Timer. More...
IFX_INLINE void | IfxGpt12_T5_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T6_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T6 Timer. More...
IFX_INLINE void | IfxGpt12_T6_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T6 timer. More...
IFX_INLINE void | IfxGpt12_setCaptureReload (Ifx_GPT12 *gpt12, IfxGpt12_SleepMode value)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxGpt12_setSleepMode (Ifx_GPT12 *gpt12, IfxGpt12_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxGpt12_setSuspendMode (Ifx_GPT12 *gpt12, IfxGpt12_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxGpt12_resetModule (Ifx_GPT12 *gpt12)
resets GPT12 kernel More...
IFX_INLINE void | IfxGpt12_initCapInPinWithPadLevel (const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CAPIN pin direction as input and configuring pad driver. More...
IFX_INLINE boolean | IfxGpt12_isModuleSuspended (Ifx_GPT12 *gpt12)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_EXTERN void | IfxGpt12_initTxEudInPinWithPadLevel (const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver. More...
IFX_EXTERN void | IfxGpt12_initTxInPinWithPadLevel (const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXIN pin direction as input and configuring pad driver. More...

Detailed Description

GPT12 basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGpt12.h.

Function Documentation

◆ IfxGpt12_initCapInPinWithPadLevel()

IFX_INLINE void IfxGpt12_initCapInPinWithPadLevel | ( | const IfxGpt12_TxIn_In * | capIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CAPIN pin direction as input and configuring pad driver.

Parameters
capIn | the TxIn Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1591 of file IfxGpt12.h.

◆ IfxGpt12_initTxEudInPinWithPadLevel()

IFX_EXTERN void IfxGpt12_initTxEudInPinWithPadLevel | ( | const IfxGpt12_TxEud_In * | txEudIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver.

Parameters
txEudIn | the TxEUD_IN Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 302 of file IfxGpt12.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_initTxInPinWithPadLevel()

IFX_EXTERN void IfxGpt12_initTxInPinWithPadLevel | ( | const IfxGpt12_TxIn_In * | txIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of TXIN pin direction as input and configuring pad driver.

Parameters
txIn | the TxIn Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 357 of file IfxGpt12.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_isModuleSuspended()

IFX_INLINE boolean IfxGpt12_isModuleSuspended ( Ifx_GPT12 * gpt12 )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
gpt12 Pointer to GPT12 module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 1606 of file IfxGpt12.h.


iLLD_TC26B: GTM

Modules | Files
GTM
iLLD
Collaboration diagram for GTM:

Modules

Implementation
Standard Driver
Atom Interface Drivers
TOM Interface Drivers
Tim Interface Drivers
GTM Pin Mapping
GTM Trigger Configuration

Files

file | IfxGtm_cfg.h
GTM on-chip implementation data.
file | IfxGtm_PinMap.c
GTM I/O map.
file | IfxGtm_PinMap.h
GTM I/O map.
file | IfxGtm_Atom_Pwm.h
GTM PWM details.
file | IfxGtm_Atom_PwmHl.h
GTM PWMHL details.
file | IfxGtm_Atom_Timer.h
GTM TIMER details.
file | IfxGtm.h
GTM basic functionality.
file | IfxGtm_Atom.h
GTM basic functionality.
file | IfxGtm_Cmu.h
GTM basic functionality.
file | IfxGtm_Dpll.h
GTM basic functionality.
file | IfxGtm_Tbu.h
GTM basic functionality.
file | IfxGtm_Tim.h
GTM basic functionality.
file | IfxGtm_Tom.h
GTM basic functionality.
file | IfxGtm_Tim_In.h
GTM IN details.
file | IfxGtm_Tom_Pwm.h
GTM PWM details.
file | IfxGtm_Tom_PwmHl.h
GTM PWMHL details.
file | IfxGtm_Tom_Timer.h
GTM TIMER details.
file | IfxGtm_Trig.h
GTM TRIG details.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » GTM
Collaboration diagram for Implementation:

Modules

Enumerations
Data Structures

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » GTM » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxGtm_Atom {
IfxGtm_Atom_0,
IfxGtm_Atom_1,
IfxGtm_Atom_2,
IfxGtm_Atom_3
}
Enum for ATOM objects. More...
enum IfxGtm_Atom_Ch {
IfxGtm_Atom_Ch_none = -1,
IfxGtm_Atom_Ch_0,
IfxGtm_Atom_Ch_1,
IfxGtm_Atom_Ch_2,
IfxGtm_Atom_Ch_3,
IfxGtm_Atom_Ch_4,
IfxGtm_Atom_Ch_5,
IfxGtm_Atom_Ch_6,
IfxGtm_Atom_Ch_7
}
Enum for ATOM channels. More...
enum IfxGtm_Dpll_SubInc {
IfxGtm_Dpll_SubInc_1 = 0,
IfxGtm_Dpll_SubInc_2
}
Enum for Dpll subincrements. More...
enum IfxGtm_FeatureControl {
IfxGtm_FeatureControl_disabled = 0,
IfxGtm_FeatureControl_disable = 1,
IfxGtm_FeatureControl_enable = 2,
IfxGtm_FeatureControl_enabled = 3
}
Enum Enable disable feature control. More...
enum IfxGtm_Tim {
IfxGtm_Tim_0,
IfxGtm_Tim_1,
IfxGtm_Tim_2
}
Enum for TIM objects. More...
enum IfxGtm_Tim_Ch {
IfxGtm_Tim_Ch_0,
IfxGtm_Tim_Ch_1,
IfxGtm_Tim_Ch_2,
IfxGtm_Tim_Ch_3,
IfxGtm_Tim_Ch_4,
IfxGtm_Tim_Ch_5,
IfxGtm_Tim_Ch_6,
IfxGtm_Tim_Ch_7
}
Enum for TIM channels. More...
enum IfxGtm_Tom {
IfxGtm_Tom_0,
IfxGtm_Tom_1
}
Enum for TOM objects. More...
enum IfxGtm_Tom_Ch {
IfxGtm_Tom_Ch_none = -1,
IfxGtm_Tom_Ch_0,
IfxGtm_Tom_Ch_1,
IfxGtm_Tom_Ch_2,
IfxGtm_Tom_Ch_3,
IfxGtm_Tom_Ch_4,
IfxGtm_Tom_Ch_5,
IfxGtm_Tom_Ch_6,
IfxGtm_Tom_Ch_7,
IfxGtm_Tom_Ch_8,
IfxGtm_Tom_Ch_9,
IfxGtm_Tom_Ch_10,
IfxGtm_Tom_Ch_11,
IfxGtm_Tom_Ch_12,
IfxGtm_Tom_Ch_13,
IfxGtm_Tom_Ch_14,
IfxGtm_Tom_Ch_15
}
Enum for TOM channels. More...
enum IfxGtm_Tom_Tgc {
IfxGtm_Tom_Tgc_0,
IfxGtm_Tom_Tgc_1
}
Enum for TOM global channel control units. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Atom

enum IfxGtm_Atom

Enum for ATOM objects.

Enumerator
IfxGtm_Atom_0 | ATOM object 0.
IfxGtm_Atom_1 | ATOM object 1.
IfxGtm_Atom_2 | ATOM object 2.
IfxGtm_Atom_3 | ATOM object 3.

Definition at line 209 of file IfxGtm_cfg.h.

◆ IfxGtm_Atom_Ch

enum IfxGtm_Atom_Ch

Enum for ATOM channels.

Enumerator
IfxGtm_Atom_Ch_none | Not Selected.
IfxGtm_Atom_Ch_0 | ATOM channel 0.
IfxGtm_Atom_Ch_1 | ATOM channel 1.
IfxGtm_Atom_Ch_2 | ATOM channel 2.
IfxGtm_Atom_Ch_3 | ATOM channel 3.
IfxGtm_Atom_Ch_4 | ATOM channel 4.
IfxGtm_Atom_Ch_5 | ATOM channel 5.
IfxGtm_Atom_Ch_6 | ATOM channel 6.
IfxGtm_Atom_Ch_7 | ATOM channel 7.

Definition at line 219 of file IfxGtm_cfg.h.

◆ IfxGtm_Dpll_SubInc

enum IfxGtm_Dpll_SubInc

Enum for Dpll subincrements.

Enumerator
IfxGtm_Dpll_SubInc_1 | subincrement1
IfxGtm_Dpll_SubInc_2 | subincrement2

Definition at line 234 of file IfxGtm_cfg.h.

◆ IfxGtm_FeatureControl

enum IfxGtm_FeatureControl

Enum Enable disable feature control.

Enumerator
IfxGtm_FeatureControl_disabled | disabled
IfxGtm_FeatureControl_disable | disable
IfxGtm_FeatureControl_enable | enable
IfxGtm_FeatureControl_enabled | enabled

Definition at line 242 of file IfxGtm_cfg.h.

◆ IfxGtm_Tim

enum IfxGtm_Tim

Enum for TIM objects.

Enumerator
IfxGtm_Tim_0 | TIM object 0.
IfxGtm_Tim_1 | TIM object 1.
IfxGtm_Tim_2 | TIM object 2.

Definition at line 252 of file IfxGtm_cfg.h.

◆ IfxGtm_Tim_Ch

enum IfxGtm_Tim_Ch

Enum for TIM channels.

Enumerator
IfxGtm_Tim_Ch_0 | TIM channel 0.
IfxGtm_Tim_Ch_1 | TIM channel 1.
IfxGtm_Tim_Ch_2 | TIM channel 2.
IfxGtm_Tim_Ch_3 | TIM channel 3.
IfxGtm_Tim_Ch_4 | TIM channel 4.
IfxGtm_Tim_Ch_5 | TIM channel 5.
IfxGtm_Tim_Ch_6 | TIM channel 6.
IfxGtm_Tim_Ch_7 | TIM channel 7.

Definition at line 261 of file IfxGtm_cfg.h.

◆ IfxGtm_Tom

enum IfxGtm_Tom

Enum for TOM objects.

Enumerator
IfxGtm_Tom_0 | TOM object 0.
IfxGtm_Tom_1 | TOM object 1.

Definition at line 275 of file IfxGtm_cfg.h.

◆ IfxGtm_Tom_Ch

enum IfxGtm_Tom_Ch

Enum for TOM channels.

Enumerator
IfxGtm_Tom_Ch_none | Not Selected.
IfxGtm_Tom_Ch_0 | TOM channel 0.
IfxGtm_Tom_Ch_1 | TOM channel 1.
IfxGtm_Tom_Ch_2 | TOM channel 2.
IfxGtm_Tom_Ch_3 | TOM channel 3.
IfxGtm_Tom_Ch_4 | TOM channel 4.
IfxGtm_Tom_Ch_5 | TOM channel 5.
IfxGtm_Tom_Ch_6 | TOM channel 6.
IfxGtm_Tom_Ch_7 | TOM channel 7.
IfxGtm_Tom_Ch_8 | TOM channel 8.
IfxGtm_Tom_Ch_9 | TOM channel 9.
IfxGtm_Tom_Ch_10 | TOM channel 10.
IfxGtm_Tom_Ch_11 | TOM channel 11.
IfxGtm_Tom_Ch_12 | TOM channel 12.
IfxGtm_Tom_Ch_13 | TOM channel 13.
IfxGtm_Tom_Ch_14 | TOM channel 14.
IfxGtm_Tom_Ch_15 | TOM channel 15.

Definition at line 283 of file IfxGtm_cfg.h.

◆ IfxGtm_Tom_Tgc

enum IfxGtm_Tom_Tgc

Enum for TOM global channel control units.

Enumerator
IfxGtm_Tom_Tgc_0 | TOM global channel control unit0.
IfxGtm_Tom_Tgc_1 | TOM global channel control unit1.

Definition at line 306 of file IfxGtm_cfg.h.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » GTM » Implementation
Collaboration diagram for Data Structures:

Data Structures

struct IfxGtm_Tom_TGC
TOM TGC objects. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tom_TGC

struct IfxGtm_Tom_TGC

TOM TGC objects.

Definition at line 322 of file IfxGtm_cfg.h.

Data Fields
Ifx_GTM_TOM_TGC0_ACT_TB | ACT_TB | 34, TOM TGC0 Action Time Base Register
Ifx_GTM_TOM_TGC0_ENDIS_CTRL | ENDIS_CTRL | 70, TOM TGC0 Enable/Disable Control Register
Ifx_GTM_TOM_TGC0_ENDIS_STAT | ENDIS_STAT | 74, TOM TGC0 Enable/Disable Status Register
Ifx_GTM_TOM_TGC0_FUPD_CTRL | FUPD_CTRL | 38, TOM TGC0 Force Update Control Register
Ifx_GTM_TOM_TGC0_GLB_CTRL | GLB_CTRL | 30, TOM TGC0 Global Control Register
Ifx_GTM_TOM_TGC0_INT_TRIG | INT_TRIG | 3C, TOM TGC0 Internal Trigger Control Register
Ifx_GTM_TOM_TGC0_OUTEN_CTRL | OUTEN_CTRL | 78, TOM TGC0 Output Enable Control Register
Ifx_GTM_TOM_TGC0_OUTEN_STAT | OUTEN_STAT | 7C, TOM TGC0 Output Enable Status Register
Ifx_GTM_TOM_CH | xxxCH1 | 40, TOM channel objects


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » GTM
Collaboration diagram for Standard Driver:

Modules

Basic Functions
Enumerations
Atom Basic Functionality
Cmu Basic Functionality
Dpll Basic Functionality
Tbu Basic Functionality
Tim Basic Functionality
Tom Basic Functionality

Detailed Description


iLLD_TC26B: Basic Functions

Functions
Basic Functions
iLLD » GTM » Standard Driver
Collaboration diagram for Basic Functions:

Functions

IFX_INLINE boolean | IfxGtm_isEnabled (Ifx_GTM *gtm)
Returs the status of module enabled or disabled. More...
IFX_INLINE boolean | IfxGtm_isModuleSuspended (Ifx_GTM *gtm)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxGtm_setSuspendMode (Ifx_GTM *gtm, IfxGtm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxGtm_disable (Ifx_GTM *gtm)
Disables the module. More...
IFX_EXTERN void | IfxGtm_enable (Ifx_GTM *gtm)
Enables the module. More...

Detailed Description

Function Documentation

◆ IfxGtm_disable()

IFX_EXTERN void IfxGtm_disable ( Ifx_GTM * gtm )

Disables the module.

Parameters
gtm Pointer to GTM module
Returns
None

Definition at line 54 of file IfxGtm.c.

◆ IfxGtm_enable()

IFX_EXTERN void IfxGtm_enable ( Ifx_GTM * gtm )

Enables the module.

Parameters
gtm Pointer to GTM module
Returns
None

Definition at line 64 of file IfxGtm.c.

◆ IfxGtm_isEnabled()

IFX_INLINE boolean IfxGtm_isEnabled ( Ifx_GTM * gtm )

Returs the status of module enabled or disabled.

Parameters
gtm Pointer to GTM module
Returns
status: TRUE/FALSE

Definition at line 144 of file IfxGtm.h.

◆ IfxGtm_isModuleSuspended()

IFX_INLINE boolean IfxGtm_isModuleSuspended ( Ifx_GTM * gtm )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
gtm Pointer to GTM module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 150 of file IfxGtm.h.

◆ IfxGtm_setSuspendMode()

IFX_INLINE void IfxGtm_setSuspendMode | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
gtm | Pointer to GTM module registers
mode | Module suspend mode
Returns
None

Definition at line 162 of file IfxGtm.h.


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » GTM » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxGtm_IrqMode {
IfxGtm_IrqMode_level = 0,
IfxGtm_IrqMode_pulse = 1,
IfxGtm_IrqMode_pulseNotify = 2,
IfxGtm_IrqMode_singlePulse = 3
}
Enum for GTM interrupt modes. More...
enum IfxGtm_SuspendMode {
IfxGtm_SuspendMode_none = 0,
IfxGtm_SuspendMode_hard = 1,
IfxGtm_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_IrqMode

enum IfxGtm_IrqMode

Enum for GTM interrupt modes.

Enumerator
IfxGtm_IrqMode_level
IfxGtm_IrqMode_pulse
IfxGtm_IrqMode_pulseNotify
IfxGtm_IrqMode_singlePulse

Definition at line 64 of file IfxGtm.h.

◆ IfxGtm_SuspendMode

enum IfxGtm_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxGtm_SuspendMode_none | No suspend.
IfxGtm_SuspendMode_hard | Hard Suspend.
IfxGtm_SuspendMode_soft | Soft Suspend.

Definition at line 74 of file IfxGtm.h.


iLLD_TC26B: Atom Basic Functionality

Modules
Atom Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Atom Basic Functionality:

Modules

ATOM Enumerations
ATOM Channel Functions
ATOM AGC Functions

Detailed Description


iLLD_TC26B: ATOM Enumerations

Enumerations
ATOM Enumerations
iLLD » GTM » Standard Driver » Atom Basic Functionality
Collaboration diagram for ATOM Enumerations:

Enumerations

enum IfxGtm_Atom_Ch_OutputTrigger {
IfxGtm_Atom_Ch_OutputTrigger_forward = 0,
IfxGtm_Atom_Ch_OutputTrigger_generate = 1
}
Reset source for channel counter CN0. More...
enum IfxGtm_Atom_Ch_ResetEvent {
IfxGtm_Atom_Ch_ResetEvent_onCm0 = 0,
IfxGtm_Atom_Ch_ResetEvent_onTrigger = 1
}
Reset event for channel counter CN0. More...
enum IfxGtm_Atom_Mode {
IfxGtm_Atom_Mode_outputImmediate,
IfxGtm_Atom_Mode_outputCompare,
IfxGtm_Atom_Mode_outputPwm,
IfxGtm_Atom_Mode_outputSerial
}
Enum for ATOM mode. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Atom_Ch_OutputTrigger

enum IfxGtm_Atom_Ch_OutputTrigger

Reset source for channel counter CN0.

Enumerator
IfxGtm_Atom_Ch_OutputTrigger_forward | Forward the trigger from the previous channel.
IfxGtm_Atom_Ch_OutputTrigger_generate | Generate the trigger from the current channel.

Definition at line 75 of file IfxGtm_Atom.h.

◆ IfxGtm_Atom_Ch_ResetEvent

enum IfxGtm_Atom_Ch_ResetEvent

Reset event for channel counter CN0.

Enumerator
IfxGtm_Atom_Ch_ResetEvent_onCm0
IfxGtm_Atom_Ch_ResetEvent_onTrigger

Definition at line 83 of file IfxGtm_Atom.h.

◆ IfxGtm_Atom_Mode

enum IfxGtm_Atom_Mode

Enum for ATOM mode.

Enumerator
IfxGtm_Atom_Mode_outputImmediate
IfxGtm_Atom_Mode_outputCompare
IfxGtm_Atom_Mode_outputPwm
IfxGtm_Atom_Mode_outputSerial

Definition at line 91 of file IfxGtm_Atom.h.


iLLD_TC26B: ATOM Channel Functions

Functions
ATOM Channel Functions
iLLD » GTM » Standard Driver » Atom Basic Functionality
Collaboration diagram for ATOM Channel Functions:

Functions

IFX_INLINE Ifx_GTM_ATOM_CH * | IfxGtm_Atom_Ch_getChannelPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the base addredd of selected Atom channel. More...
IFX_INLINE void | IfxGtm_Atom_Ch_setCompareShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_clearOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_clearZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_configurePwmMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
IFX_EXTERN float32 | IfxGtm_Atom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Atom_Ch_getClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getCompareOnePointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getCompareZeroPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero pointer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_getOutputLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Gets the ATOM output level. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxGtm_Atom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getTimerPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_isOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_isZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_raiseInterruptOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 1. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_raiseInterruptZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 0. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
Sets the channel clock source. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompare (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareOneShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareZeroShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setOneShotMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setResetSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setSignalLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setTriggerOutput (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Get the counter value. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_Ch_clearOneNotification()

IFX_EXTERN void IfxGtm_Atom_Ch_clearOneNotification | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Clears the channel One notification.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
None

Definition at line 262 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_acknowledgeTriggerIrq().

◆ IfxGtm_Atom_Ch_clearZeroNotification()

IFX_EXTERN void IfxGtm_Atom_Ch_clearZeroNotification | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Clears the channel Zero notification.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
None

Definition at line 270 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_acknowledgeTimerIrq().

◆ IfxGtm_Atom_Ch_configurePwmMode()

IFX_EXTERN void IfxGtm_Atom_Ch_configurePwmMode | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Cmu_Clk | clock,
 |  | Ifx_ActiveState | activeState,
 |  | IfxGtm_Atom_Ch_ResetEvent | resetEvent,
 |  | IfxGtm_Atom_Ch_OutputTrigger | trigger
 | ) |  |
Parameters
atom | Pointer to the ATOM object
channel | Channel index
clock | Clock source
activeState | Active State
resetEvent | Channel reset event
trigger | Channel trigger output mode
Returns
None

Definition at line 278 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Ch_getChannelPointer()

IFX_INLINE Ifx_GTM_ATOM_CH * IfxGtm_Atom_Ch_getChannelPointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the base addredd of selected Atom channel.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
Pointer to channel base address

Definition at line 613 of file IfxGtm_Atom.h.

Referenced by IfxGtm_Atom_Ch_clearOneNotification(), IfxGtm_Atom_Ch_clearZeroNotification(), IfxGtm_Atom_Ch_configurePwmMode(), IfxGtm_Atom_Ch_getClockSource(), IfxGtm_Atom_Ch_getCompareOne(), IfxGtm_Atom_Ch_getCompareOnePointer(), IfxGtm_Atom_Ch_getCompareZero(), IfxGtm_Atom_Ch_getCompareZeroPointer(), IfxGtm_Atom_Ch_getCounterValue(), IfxGtm_Atom_Ch_getOutputLevel(), IfxGtm_Atom_Ch_isOneNotification(), IfxGtm_Atom_Ch_isZeroNotification(), IfxGtm_Atom_Ch_raiseInterruptOne(), IfxGtm_Atom_Ch_raiseInterruptZero(), IfxGtm_Atom_Ch_setAruInput(), IfxGtm_Atom_Ch_setAruReadAddress0(), IfxGtm_Atom_Ch_setAruReadAddress1(), IfxGtm_Atom_Ch_setClockSource(), IfxGtm_Atom_Ch_setCompare(), IfxGtm_Atom_Ch_setCompareOne(), IfxGtm_Atom_Ch_setCompareOneShadow(), IfxGtm_Atom_Ch_setCompareShadow(), IfxGtm_Atom_Ch_setCompareZero(), IfxGtm_Atom_Ch_setCompareZeroShadow(), IfxGtm_Atom_Ch_setCounterValue(), IfxGtm_Atom_Ch_setMode(), IfxGtm_Atom_Ch_setNotification(), IfxGtm_Atom_Ch_setOneShotMode(), IfxGtm_Atom_Ch_setResetSource(), IfxGtm_Atom_Ch_setSignalLevel(), IfxGtm_Atom_Ch_setSomcControl(), IfxGtm_Atom_Ch_setSomcSignalLevelControl(), IfxGtm_Atom_Ch_setTriggerOutput(), IfxGtm_Atom_getShadowOne(), IfxGtm_Atom_getShadowOnePointer(), IfxGtm_Atom_getShadowZero(), and IfxGtm_Atom_getShadowZeroPointer().

◆ IfxGtm_Atom_Ch_getClockFrequency()

IFX_EXTERN float32 IfxGtm_Atom_Ch_getClockFrequency | ( | Ifx_GTM * | gtm,
 |  | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the ATOM channel input clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
atom | Pointer to the ATOM object
channel | Channel index
Returns
ATOM channel input clock frequency in Hz

Definition at line 296 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_updateInputFrequency().

◆ IfxGtm_Atom_Ch_getClockSource()

IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the channel clock source.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
The clock source

Definition at line 306 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Ch_getClockFrequency(), and IfxGtm_Atom_PwmHl_init().

◆ IfxGtm_Atom_Ch_getCompareOne()

IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareOne | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the compare one value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
compare one value

Definition at line 316 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_getTrigger().

◆ IfxGtm_Atom_Ch_getCompareOnePointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_Ch_getCompareOnePointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the compare one pointer.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
compare one pointer

Definition at line 324 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_getTriggerPointer().

◆ IfxGtm_Atom_Ch_getCompareZero()

IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareZero | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the compare zero value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
compare zero value

Definition at line 332 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_getCompareZeroPointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_Ch_getCompareZeroPointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the compare zero pointer.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
compare zero pointer

Definition at line 340 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_getCounterValue()

IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCounterValue | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Get the counter value.

Parameters
atom | pointer to the ATOM instance
channel | channel index of the ATOM
Returns
counter value

Definition at line 529 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_getOutputLevel()

IFX_EXTERN boolean IfxGtm_Atom_Ch_getOutputLevel | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Gets the ATOM output level.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
TRUE the output is high, FALSE the output is low

Definition at line 348 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_getSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxGtm_Atom_Ch_getSrcPointer | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Atom | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns a pointer to the ATOM channel SRC.

Parameters
gtm | Pointer to GTM module
atom | Specifies the atom object
channel | Channel index
Returns
Pointer to the TOM channel SRC

Definition at line 359 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Ch_getTimerPointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_Ch_getTimerPointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the Timer pointer.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
Timer pointer

Definition at line 366 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_getPointer().

◆ IfxGtm_Atom_Ch_isOneNotification()

IFX_EXTERN boolean IfxGtm_Atom_Ch_isOneNotification | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the status of channel One notification.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
Status of channel One notification

Definition at line 372 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_acknowledgeTriggerIrq().

◆ IfxGtm_Atom_Ch_isZeroNotification()

IFX_EXTERN boolean IfxGtm_Atom_Ch_isZeroNotification | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the status of channel Zero notification.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
Status of channel Zero notification

Definition at line 381 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_acknowledgeTimerIrq().

◆ IfxGtm_Atom_Ch_raiseInterruptOne()

IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptOne | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Raises the interrupt for Compare 1.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
None

Definition at line 390 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_raiseInterruptZero()

IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptZero | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Raises the interrupt for Compare 0.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
None

Definition at line 398 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setClockSource()

IFX_EXTERN void IfxGtm_Atom_Ch_setClockSource | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Cmu_Clk | clock
 | ) |  |

Sets the channel clock source.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
clock | Channel clock source
Returns
None

Definition at line 406 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setCompare()

IFX_EXTERN void IfxGtm_Atom_Ch_setCompare | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | compareZero,
 |  | uint32 | compareOne
 | ) |  |

Sets the compare 0 and 1 values.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
compareZero | Compare zero value
compareOne | Compare one value
Returns
None

Definition at line 414 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setCompareOne()

IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOne | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | compareOne
 | ) |  |

Sets the compare 1 value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
compareOne | Compare one value
Returns
None

Definition at line 423 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init().

◆ IfxGtm_Atom_Ch_setCompareOneShadow()

IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOneShadow | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | shadowOne
 | ) |  |

Sets the compare 1 shadow value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
shadowOne | Compare one shadow value
Returns
None

Definition at line 431 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), and IfxGtm_Atom_Timer_setTrigger().

◆ IfxGtm_Atom_Ch_setCompareShadow()

IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | shadowZero,
 |  | uint32 | shadowOne
 | ) |  |

Sets the compare 0 and 1 shadow values.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
shadowZero | Compare zero shadow value
shadowOne | Compare one shadow value
Returns
None

Definition at line 619 of file IfxGtm_Atom.h.

Referenced by IfxGtm_Atom_PwmHl_updateCenterAligned(), IfxGtm_Atom_PwmHl_updateEdgeAligned(), IfxGtm_Atom_PwmHl_updateOff(), IfxGtm_Atom_PwmHl_updatePulse(), and IfxGtm_Atom_PwmHl_updateShiftCenterAligned().

◆ IfxGtm_Atom_Ch_setCompareZero()

IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZero | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | compareZero
 | ) |  |

Sets the compare 0 value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
compareZero | Compare zero value
Returns
None

Definition at line 439 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init().

◆ IfxGtm_Atom_Ch_setCompareZeroShadow()

IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZeroShadow | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | shadowZero
 | ) |  |

Sets the compare 0 shadow value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
shadowZero | Compare zero shadow value
Returns
None

Definition at line 447 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), and IfxGtm_Atom_Timer_setPeriod().

◆ IfxGtm_Atom_Ch_setCounterValue()

IFX_EXTERN void IfxGtm_Atom_Ch_setCounterValue | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | value
 | ) |  |

Sets the counter value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
value | Counter value
Returns
None

Definition at line 455 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Ch_setMode()

IFX_EXTERN void IfxGtm_Atom_Ch_setMode | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_Mode | mode
 | ) |  |

set the Atom operating mode

Parameters
atom | Pointer to the ATOM object
channel | Channel index
mode | Atom operating mode
Returns
None

Definition at line 463 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init().

◆ IfxGtm_Atom_Ch_setNotification()

IFX_EXTERN void IfxGtm_Atom_Ch_setNotification | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_IrqMode | mode,
 |  | boolean | interruptOnCompareZero,
 |  | boolean | interruptOnCompareOne
 | ) |  |

Sets the channel notification.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
mode | Interrupt mode
interruptOnCompareZero | If TRUE, an interrupt is generated on compare 0, else no interrupt is generated
interruptOnCompareOne | If TRUE, an interrupt is generated on compare 1, else no interrupt is generated
Returns
None

Definition at line 471 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Ch_setOneShotMode()

IFX_EXTERN void IfxGtm_Atom_Ch_setOneShotMode | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable the one shot mode.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
enabled | If TRUE, the feature is enabled, else disabled
Returns
None

Definition at line 489 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_setSingleMode().

◆ IfxGtm_Atom_Ch_setResetSource()

IFX_EXTERN void IfxGtm_Atom_Ch_setResetSource | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_Ch_ResetEvent | event
 | ) |  |

Sets the channel clock source either from local or from previous channel.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
event | Channel reset event
Returns
None

Definition at line 497 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setSignalLevel()

IFX_EXTERN void IfxGtm_Atom_Ch_setSignalLevel | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | Ifx_ActiveState | activeState
 | ) |  |

Sets the signal level.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
activeState | Signal level active state. In case the channel is reset, the output is set to not active. The signal is active between 0 and the leading edge (CM1) and inactive between the leading edge and the trailing edge (CM0).
Returns
None

Definition at line 505 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_PwmHl_setMode(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Ch_setTriggerOutput()

IFX_EXTERN void IfxGtm_Atom_Ch_setTriggerOutput | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_Ch_OutputTrigger | trigger
 | ) |  |

Sets the channel trigger output.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
trigger | Channel trigger output mode
Returns
None

Definition at line 513 of file IfxGtm_Atom.c.


iLLD_TC26B: ATOM AGC Functions

Functions
ATOM AGC Functions
iLLD » GTM » Standard Driver » Atom Basic Functionality
Collaboration diagram for ATOM AGC Functions:

Functions

IFX_INLINE void | IfxGtm_Atom_Agc_setChannelsUpdate (Ifx_GTM_ATOM_AGC *agc, uint32 value)
Sets the channels for update (UPEN) More...
IFX_EXTERN uint32 | IfxGtm_Atom_Agc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Agc_buildFeatureForChannel (IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannel (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelOutput (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannels (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsOutput (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsTrigger (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableTimeTrigger (Ifx_GTM_ATOM_AGC *agc, boolean enabled)
Enable/disable the time base trigger. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_resetChannels (Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
Reset one or more channels. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setChannelForceUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setChannelsForceUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setTimeTrigger (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_trigger (Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_Agc_buildFeature()

IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeature | ( | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | uint8 | bitfieldOffset
 | ) |  |

Builds the register value for the feature enable/disable.

Parameters
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
bitfieldOffset | Offset of the channel 0 bitfield in the register
Returns
The register value

Definition at line 61 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Agc_enableChannels(), IfxGtm_Atom_Agc_enableChannelsOutput(), IfxGtm_Atom_Agc_enableChannelsTrigger(), IfxGtm_Atom_Agc_enableChannelsUpdate(), IfxGtm_Atom_Agc_setChannelsForceUpdate(), and IfxGtm_Atom_Timer_addToChannelMask().

◆ IfxGtm_Atom_Agc_buildFeatureForChannel()

IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeatureForChannel | ( | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled,
 |  | uint8 | bitfieldOffset
 | ) |  |

Builds the register value for the feature enable/disable for a single channel.

Parameters
channel | Channel index
enabled | Enable/ Disable choise of the feature
bitfieldOffset | Offset of the channel 0 bitfield in the register
Returns
The register value

Definition at line 89 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Agc_enableChannel(), IfxGtm_Atom_Agc_enableChannelOutput(), IfxGtm_Atom_Agc_enableChannelUpdate(), and IfxGtm_Atom_Agc_setChannelForceUpdate().

◆ IfxGtm_Atom_Agc_enableChannel()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannel | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | immediate
 | ) |  |

Enable/disable one channel (ENDIS)

Parameters
agc | Pointer to the AGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
immediate | If TRUE, the action is done immediately else, the action is done on AGC trigger (CTRL_TRIG)
Returns
None

Definition at line 109 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_start(), and IfxGtm_Atom_Pwm_stop().

◆ IfxGtm_Atom_Agc_enableChannelOutput()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelOutput | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | immediate
 | ) |  |

Enable/disable one channel output (OUTEN)

Parameters
agc | Pointer to the AGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 127 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_start(), and IfxGtm_Atom_Pwm_stop().

◆ IfxGtm_Atom_Agc_enableChannels()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannels | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | boolean | immediate
 | ) |  |

Enable/disable one or more channels (ENDIS)

Parameters
agc | Pointer to the AGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 151 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_Timer_init(), IfxGtm_Atom_Timer_run(), and IfxGtm_Atom_Timer_stop().

◆ IfxGtm_Atom_Agc_enableChannelsOutput()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsOutput | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | boolean | immediate
 | ) |  |

Enable/disable one or more channels output (OUTEN)

Parameters
agc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 169 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Agc_enableChannelsTrigger()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsTrigger | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask
 | ) |  |

Enable/disable the TGC channels trigger.

Parameters
agc | Pointer to the AGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 187 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Agc_enableChannelsUpdate()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsUpdate | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask
 | ) |  |

Enable/disable one or more channels for update (UPEN)

Parameters
agc | Pointer to the AGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 193 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Agc_enableChannelUpdate()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelUpdate | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable one channel for update (UPEN)

Parameters
agc | Pointer to the AGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
Returns
None

Definition at line 145 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init().

◆ IfxGtm_Atom_Agc_enableTimeTrigger()

IFX_EXTERN void IfxGtm_Atom_Agc_enableTimeTrigger | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | boolean | enabled
 | ) |  |

Enable/disable the time base trigger.

Parameters
agc | Pointer to the AGC object
enabled | If TRUE, the trigger is enabled else disabled
Returns
None

Definition at line 199 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Agc_resetChannels()

IFX_EXTERN void IfxGtm_Atom_Agc_resetChannels | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint32 | resetMask
 | ) |  |

Reset one or more channels.

Parameters
agc | Pointer to the AGC object
resetMask | Mask for the channel reset (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 205 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Agc_setChannelForceUpdate()

IFX_EXTERN void IfxGtm_Atom_Agc_setChannelForceUpdate | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | resetEnabled
 | ) |  |

Enable/disable one channel for update (FUPD)

Parameters
agc | Pointer to the AGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
resetEnabled | Enable/ Disable reset choise of the feature
Returns
None

Definition at line 224 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init().

◆ IfxGtm_Atom_Agc_setChannelsForceUpdate()

IFX_EXTERN void IfxGtm_Atom_Agc_setChannelsForceUpdate | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | uint16 | resetEnableMask,
 |  | uint16 | resetDisableMask
 | ) |  |

Enable/disable one or more channels for the force update feature (FUPD)

Parameters
agc | Pointer to the AGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
resetEnableMask | Mask for the enabled channels counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...) Channel 0, bit 1: channel 1, ...)
resetDisableMask | Mask for the disabled channels with no counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 235 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Agc_setChannelsUpdate()

IFX_INLINE void IfxGtm_Atom_Agc_setChannelsUpdate | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint32 | value
 | ) |  |

Sets the channels for update (UPEN)

Parameters
agc | Pointer to the AGC object
value | value for the channel enable (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 628 of file IfxGtm_Atom.h.

Referenced by IfxGtm_Atom_Timer_applyUpdate(), and IfxGtm_Atom_Timer_disableUpdate().

◆ IfxGtm_Atom_Agc_setTimeTrigger()

IFX_EXTERN void IfxGtm_Atom_Agc_setTimeTrigger | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | IfxGtm_Tbu_Ts | base,
 |  | uint32 | value
 | ) |  |

Sets the trigger time base and time base value.

Parameters
agc | Pointer to the AGC object
base | Time base used for comparison
value | Compare value that raise the trigger
Returns
None

Definition at line 245 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Agc_trigger()

IFX_EXTERN void IfxGtm_Atom_Agc_trigger ( Ifx_GTM_ATOM_AGC * agc )

Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)

Parameters
agc Pointer to the AGC object
Returns
None

Definition at line 256 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_start(), IfxGtm_Atom_Pwm_stop(), IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().


iLLD_TC26B: Cmu Basic Functionality

Modules
Cmu Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Cmu Basic Functionality:

Modules

CMU Enumerations
CMU Basic Functions

Detailed Description


iLLD_TC26B: CMU Enumerations

Enumerations
CMU Enumerations
iLLD » GTM » Standard Driver » Cmu Basic Functionality
Collaboration diagram for CMU Enumerations:

Enumerations

enum IfxGtm_Cmu_Clk {
IfxGtm_Cmu_Clk_0 = 0,
IfxGtm_Cmu_Clk_1,
IfxGtm_Cmu_Clk_2,
IfxGtm_Cmu_Clk_3,
IfxGtm_Cmu_Clk_4,
IfxGtm_Cmu_Clk_5,
IfxGtm_Cmu_Clk_6,
IfxGtm_Cmu_Clk_7
}
enum IfxGtm_Cmu_Eclk {
IfxGtm_Cmu_Eclk_0 = 0,
IfxGtm_Cmu_Eclk_1,
IfxGtm_Cmu_Eclk_2
}
enum IfxGtm_Cmu_Fxclk {
IfxGtm_Cmu_Fxclk_0 = 0,
IfxGtm_Cmu_Fxclk_1,
IfxGtm_Cmu_Fxclk_2,
IfxGtm_Cmu_Fxclk_3,
IfxGtm_Cmu_Fxclk_4
}
enum IfxGtm_Cmu_Tim_Filter_Clk {
IfxGtm_Cmu_Tim_Filter_Clk_0,
IfxGtm_Cmu_Tim_Filter_Clk_1,
IfxGtm_Cmu_Tim_Filter_Clk_6,
IfxGtm_Cmu_Tim_Filter_Clk_7
}
Tim Filter counter frequency select. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Cmu_Clk

enum IfxGtm_Cmu_Clk
Enumerator
IfxGtm_Cmu_Clk_0
IfxGtm_Cmu_Clk_1
IfxGtm_Cmu_Clk_2
IfxGtm_Cmu_Clk_3
IfxGtm_Cmu_Clk_4
IfxGtm_Cmu_Clk_5
IfxGtm_Cmu_Clk_6
IfxGtm_Cmu_Clk_7

Definition at line 64 of file IfxGtm_Cmu.h.

◆ IfxGtm_Cmu_Eclk

enum IfxGtm_Cmu_Eclk
Enumerator
IfxGtm_Cmu_Eclk_0
IfxGtm_Cmu_Eclk_1
IfxGtm_Cmu_Eclk_2

Definition at line 76 of file IfxGtm_Cmu.h.

◆ IfxGtm_Cmu_Fxclk

enum IfxGtm_Cmu_Fxclk
Enumerator
IfxGtm_Cmu_Fxclk_0
IfxGtm_Cmu_Fxclk_1
IfxGtm_Cmu_Fxclk_2
IfxGtm_Cmu_Fxclk_3
IfxGtm_Cmu_Fxclk_4

Definition at line 83 of file IfxGtm_Cmu.h.

◆ IfxGtm_Cmu_Tim_Filter_Clk

enum IfxGtm_Cmu_Tim_Filter_Clk

Tim Filter counter frequency select.

Enumerator
IfxGtm_Cmu_Tim_Filter_Clk_0 | FLT_CNT counts with CMU_CLK0.
IfxGtm_Cmu_Tim_Filter_Clk_1 | FLT_CNT counts with CMU_CLK1.
IfxGtm_Cmu_Tim_Filter_Clk_6 | FLT_CNT counts with CMU_CLK6.
IfxGtm_Cmu_Tim_Filter_Clk_7 | FLT_CNT counts with CMU_CLK7.

Definition at line 94 of file IfxGtm_Cmu.h.


iLLD_TC26B: CMU Basic Functions

Functions
CMU Basic Functions
iLLD » GTM » Standard Driver » Cmu Basic Functionality
Collaboration diagram for CMU Basic Functions:

Functions

IFX_EXTERN void | IfxGtm_Cmu_enableClocks (Ifx_GTM *gtm, uint32 clkMask)
Enable / Disable the configurable, fixed, and external clocks. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
Returns the GTM external clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getFxClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getGclkFrequency (Ifx_GTM *gtm)
Returns the GTM global clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getModuleFrequency (Ifx_GTM *gtm)
returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency: IfxGtm_getSysClkFrequency() is to be used. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isClkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
Returns the configurable clock enable status. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isEclkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
Returns the external clock enable status. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isFxClockEnabled (Ifx_GTM *gtm)
Returns the fixed clock enable status. More...
IFX_EXTERN void | IfxGtm_Cmu_selectClkInput (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the corresponding clock is disabled using IfxGtm_Cmu_enableClocks() More...
IFX_EXTERN void | IfxGtm_Cmu_setClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
Set the GTM configurable clock frequency in Hz. More...
IFX_EXTERN void | IfxGtm_Cmu_setEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
Set the GTM external clock frequency in Hz. More...
IFX_EXTERN void | IfxGtm_Cmu_setGclkFrequency (Ifx_GTM *gtm, float32 frequency)
Set the GTM global clock frequency in Hz. More...

Detailed Description

Function Documentation

◆ IfxGtm_Cmu_enableClocks()

IFX_EXTERN void IfxGtm_Cmu_enableClocks | ( | Ifx_GTM * | gtm,
 |  | uint32 | clkMask
 | ) |  |

Enable / Disable the configurable, fixed, and external clocks.

Parameters
gtm | Pointer to GTM module
clkMask | Enable / Disable mask.
Returns
None

Definition at line 58 of file IfxGtm_Cmu.c.

◆ IfxGtm_Cmu_getClkFrequency()

IFX_EXTERN float32 IfxGtm_Cmu_getClkFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Clk | clkIndex,
 |  | boolean | assumeEnabled
 | ) |  |

Returns the GTM configurable clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
assumeEnabled | When TRUE, attempt to calculate the frequency as if the clock is enabled.
Returns
GTM configurable clock frequency in Hz

Definition at line 64 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Atom_Ch_getClockFrequency(), IfxGtm_Cmu_getFxClkFrequency(), IfxGtm_Tbu_getClockFrequency(), IfxGtm_Tim_Ch_getCaptureClockFrequency(), IfxGtm_Tim_Ch_getFilterClockFrequency(), and IfxGtm_Tim_Ch_getTimeoutClockFrequency().

◆ IfxGtm_Cmu_getEclkFrequency()

IFX_EXTERN float32 IfxGtm_Cmu_getEclkFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Eclk | clkIndex,
 |  | boolean | assumeEnabled
 | ) |  |

Returns the GTM external clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
assumeEnabled | When TRUE, attempt to calculate the frequency as if the clock is enabled.
Returns
GTM external clock frequency in Hz

Definition at line 118 of file IfxGtm_Cmu.c.

◆ IfxGtm_Cmu_getFxClkFrequency()

IFX_EXTERN float32 IfxGtm_Cmu_getFxClkFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Fxclk | clkIndex,
 |  | boolean | assumeEnabled
 | ) |  |

Returns the GTM fixed clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the fixed clock 0=CMU_FXCLK0, 1=CMU_FXCLK1, ...
assumeEnabled | When TRUE, attempt to calculate the frequency as if the clock is enabled.
Returns
GTM fixed clock frequency in Hz

Definition at line 138 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Tom_Ch_getClockFrequency().

◆ IfxGtm_Cmu_getGclkFrequency()

IFX_EXTERN float32 IfxGtm_Cmu_getGclkFrequency ( Ifx_GTM * gtm )

Returns the GTM global clock frequency in Hz.

Parameters
gtm Pointer to GTM module
Returns
GTM global clock frequency in Hz

Definition at line 199 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Cmu_getClkFrequency(), IfxGtm_Cmu_getEclkFrequency(), IfxGtm_Cmu_getFxClkFrequency(), IfxGtm_Cmu_setClkFrequency(), and IfxGtm_Cmu_setEclkFrequency().

◆ IfxGtm_Cmu_getModuleFrequency()

IFX_EXTERN float32 IfxGtm_Cmu_getModuleFrequency ( Ifx_GTM * gtm )

returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency: IfxGtm_getSysClkFrequency() is to be used.

Parameters
gtm Pointer to GTM module
Returns
GTM module frequency in Hz

Definition at line 209 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Cmu_getGclkFrequency(), and IfxGtm_Cmu_setGclkFrequency().

◆ IfxGtm_Cmu_isClkClockEnabled()

IFX_EXTERN boolean IfxGtm_Cmu_isClkClockEnabled | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Clk | clkIndex
 | ) |  |

Returns the configurable clock enable status.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
Returns
TRUE The clock is enabled, FALSE The clock is disabled

Definition at line 215 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Cmu_getClkFrequency().

◆ IfxGtm_Cmu_isEclkClockEnabled()

IFX_EXTERN boolean IfxGtm_Cmu_isEclkClockEnabled | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Eclk | clkIndex
 | ) |  |

Returns the external clock enable status.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
Returns
TRUE The clock is enabled, FALSE The clock is disabled

Definition at line 221 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Cmu_getEclkFrequency().

◆ IfxGtm_Cmu_isFxClockEnabled()

IFX_EXTERN boolean IfxGtm_Cmu_isFxClockEnabled ( Ifx_GTM * gtm )

Returns the fixed clock enable status.

Parameters
gtm Pointer to GTM module
Returns
TRUE The clock is enabled, FALSE The clock is disabled

Definition at line 227 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Cmu_getFxClkFrequency().

◆ IfxGtm_Cmu_selectClkInput()

IFX_EXTERN void IfxGtm_Cmu_selectClkInput | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Clk | clkIndex,
 |  | boolean | useGlobal
 | ) |  |

Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the corresponding clock is disabled using IfxGtm_Cmu_enableClocks()

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
useGlobal | if TRUE, uses the global clock as an input, else use the SUB_INC input
Returns
None

Definition at line 233 of file IfxGtm_Cmu.c.

◆ IfxGtm_Cmu_setClkFrequency()

IFX_EXTERN void IfxGtm_Cmu_setClkFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Clk | clkIndex,
 |  | float32 | frequency
 | ) |  |

Set the GTM configurable clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
frequency | Frequency in Hz
Returns
None

Definition at line 249 of file IfxGtm_Cmu.c.

◆ IfxGtm_Cmu_setEclkFrequency()

IFX_EXTERN void IfxGtm_Cmu_setEclkFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Eclk | clkIndex,
 |  | float32 | frequency
 | ) |  |

Set the GTM external clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
frequency | Frequency in Hz
Returns
None

Definition at line 286 of file IfxGtm_Cmu.c.

◆ IfxGtm_Cmu_setGclkFrequency()

IFX_EXTERN void IfxGtm_Cmu_setGclkFrequency | ( | Ifx_GTM * | gtm,
 |  | float32 | frequency
 | ) |  |

Set the GTM global clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
frequency | Frequency in Hz
Returns
None

Definition at line 334 of file IfxGtm_Cmu.c.


iLLD_TC26B: Dpll Basic Functionality

Modules
Dpll Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Dpll Basic Functionality:

Modules

DPLL Basic Functions

Detailed Description


iLLD_TC26B: DPLL Basic Functions

Functions
DPLL Basic Functions
iLLD » GTM » Standard Driver » Dpll Basic Functionality
Collaboration diagram for DPLL Basic Functions:

Functions

IFX_EXTERN float32 IfxGtm_Dpll_getSubIncFrequency (Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F. More...

Detailed Description

Function Documentation

◆ IfxGtm_Dpll_getSubIncFrequency()

IFX_EXTERN float32 IfxGtm_Dpll_getSubIncFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Dpll_SubInc | index
 | ) |  |

Dummy Function, returns 0.0F.

Parameters
gtm | Pointer to GTM module
index | Dpll subincrement index
Returns
frequency

Definition at line 52 of file IfxGtm_Dpll.c.

Referenced by IfxGtm_Cmu_getClkFrequency().


iLLD_TC26B: Tbu Basic Functionality

Modules
Tbu Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Tbu Basic Functionality:

Modules

TBU Enumerations
TBU Basic Functions

Detailed Description


iLLD_TC26B: TBU Enumerations

Enumerations
TBU Enumerations
iLLD » GTM » Standard Driver » Tbu Basic Functionality
Collaboration diagram for TBU Enumerations:

Enumerations

enum IfxGtm_Tbu_Ts {
IfxGtm_Tbu_Ts_0,
IfxGtm_Tbu_Ts_1,
IfxGtm_Tbu_Ts_2
}
GTM TOM TBU Time stamps. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Tbu_Ts

enum IfxGtm_Tbu_Ts

GTM TOM TBU Time stamps.

Enumerator
IfxGtm_Tbu_Ts_0
IfxGtm_Tbu_Ts_1
IfxGtm_Tbu_Ts_2

Definition at line 66 of file IfxGtm_Tbu.h.


iLLD_TC26B: TBU Basic Functions

Functions
TBU Basic Functions
iLLD » GTM » Standard Driver » Tbu Basic Functionality
Collaboration diagram for TBU Basic Functions:

Functions

IFX_INLINE void | IfxGtm_Tbu_enableChannel (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Enables the channel. More...
IFX_INLINE boolean | IfxGtm_Tbu_isChannelEnabled (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Function to check if a TBU channel is enabled. Returns TRUE if the corresponding channel is enabled Returns FALSE if the corresponding channel is disabled. More...
IFX_EXTERN float32 | IfxGtm_Tbu_getClockFrequency (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Returns the clock frequency. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tbu_enableChannel()

IFX_INLINE void IfxGtm_Tbu_enableChannel | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tbu_Ts | channel
 | ) |  |

Enables the channel.

Parameters
gtm | Pointer to GTM module
channel | TBU Time stamps
Returns
None

Definition at line 115 of file IfxGtm_Tbu.h.

Referenced by IfxDsadc_Rdc_initHwTimestamp().

◆ IfxGtm_Tbu_getClockFrequency()

IFX_EXTERN float32 IfxGtm_Tbu_getClockFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tbu_Ts | channel
 | ) |  |

Returns the clock frequency.

Parameters
gtm | Pointer to GTM module
channel | TBU Time stamps
Returns
frequency

Definition at line 53 of file IfxGtm_Tbu.c.

Referenced by IfxDsadc_Rdc_calculateTimestampPeriod().

◆ IfxGtm_Tbu_isChannelEnabled()

IFX_INLINE boolean IfxGtm_Tbu_isChannelEnabled | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tbu_Ts | channel
 | ) |  |

Function to check if a TBU channel is enabled. Returns TRUE if the corresponding channel is enabled Returns FALSE if the corresponding channel is disabled.

Parameters
gtm | Pointer to GTM SFR
channel | Channel of TBU
Returns
TRUE: channel is enabled

Definition at line 123 of file IfxGtm_Tbu.h.


iLLD_TC26B: Tim Basic Functionality

Modules
Tim Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Tim Basic Functionality:

Modules

TIM Enumerations
TIM Channel Functions

Detailed Description


iLLD_TC26B: TIM Enumerations

Enumerations
TIM Enumerations
iLLD » GTM » Standard Driver » Tim Basic Functionality
Collaboration diagram for TIM Enumerations:

Enumerations

enum IfxGtm_Tim_CntsSel {
IfxGtm_Tim_CntsSel_cntReg = 0,
IfxGtm_Tim_CntsSel_tbuTs0
}
enum IfxGtm_Tim_FilterCounter {
IfxGtm_Tim_FilterCounter_upDown = 0,
IfxGtm_Tim_FilterCounter_hold
}
Enum for Filter counter. More...
enum IfxGtm_Tim_FilterMode {
IfxGtm_Tim_FilterMode_immediateEdgePropagation = 0,
IfxGtm_Tim_FilterMode_individualDeglitchTime
}
Enum for Filter mode. More...
enum IfxGtm_Tim_GprSel {
IfxGtm_Tim_GprSel_tbuTs0 = 0,
IfxGtm_Tim_GprSel_tbuTs1,
IfxGtm_Tim_GprSel_tbuTs2,
IfxGtm_Tim_GprSel_cnts
}
enum IfxGtm_Tim_Input {
IfxGtm_Tim_Input_currentChannel = 0,
IfxGtm_Tim_Input_adjacentChannel
}
enum IfxGtm_Tim_Mode {
IfxGtm_Tim_Mode_pwmMeasurement = 0,
IfxGtm_Tim_Mode_pulseIntegration,
IfxGtm_Tim_Mode_inputEvent,
IfxGtm_Tim_Mode_inputPrescaler,
IfxGtm_Tim_Mode_bitCompression
}
enum IfxGtm_Tim_Timeout {
IfxGtm_Tim_Timeout_disabled,
IfxGtm_Tim_Timeout_risingEdge,
IfxGtm_Tim_Timeout_fallingEdge,
IfxGtm_Tim_Timeout_bothEdge
}
Enum for Timeout control. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Tim_CntsSel

enum IfxGtm_Tim_CntsSel
Enumerator
IfxGtm_Tim_CntsSel_cntReg
IfxGtm_Tim_CntsSel_tbuTs0

Definition at line 70 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_FilterCounter

enum IfxGtm_Tim_FilterCounter

Enum for Filter counter.

Enumerator
IfxGtm_Tim_FilterCounter_upDown
IfxGtm_Tim_FilterCounter_hold

Definition at line 78 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_FilterMode

enum IfxGtm_Tim_FilterMode

Enum for Filter mode.

Enumerator
IfxGtm_Tim_FilterMode_immediateEdgePropagation | Immediate edge Propagation mode.
IfxGtm_Tim_FilterMode_individualDeglitchTime | Individual deglitch mode.

Definition at line 86 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_GprSel

enum IfxGtm_Tim_GprSel
Enumerator
IfxGtm_Tim_GprSel_tbuTs0
IfxGtm_Tim_GprSel_tbuTs1
IfxGtm_Tim_GprSel_tbuTs2
IfxGtm_Tim_GprSel_cnts

Definition at line 92 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_Input

enum IfxGtm_Tim_Input
Enumerator
IfxGtm_Tim_Input_currentChannel
IfxGtm_Tim_Input_adjacentChannel

Definition at line 100 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_Mode

enum IfxGtm_Tim_Mode
Enumerator
IfxGtm_Tim_Mode_pwmMeasurement | TPWM.
IfxGtm_Tim_Mode_pulseIntegration | TPIM.
IfxGtm_Tim_Mode_inputEvent | TIEM.
IfxGtm_Tim_Mode_inputPrescaler | TIPM.
IfxGtm_Tim_Mode_bitCompression | TBCM.

Definition at line 106 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_Timeout

enum IfxGtm_Tim_Timeout

Enum for Timeout control.

Enumerator
IfxGtm_Tim_Timeout_disabled | Timeout feature disabled.
IfxGtm_Tim_Timeout_risingEdge | Timeout feature enabled for rising edge only.
IfxGtm_Tim_Timeout_fallingEdge | Timeout feature enabled for falling edge only.
IfxGtm_Tim_Timeout_bothEdge | Timeout feature enabled for both edges.

Definition at line 117 of file IfxGtm_Tim.h.


iLLD_TC26B: TIM Channel Functions

Functions
TIM Channel Functions
iLLD » GTM » Standard Driver » Tim Basic Functionality
Collaboration diagram for TIM Channel Functions:

Functions

IFX_INLINE void | IfxGtm_Tim_Ch_clearCntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Clears the counter overflow flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearDataLostEvent (Ifx_GTM_TIM_CH *channel)
Clears the data lost flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearEcntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Clears the event counter overflow flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearGlitchEvent (Ifx_GTM_TIM_CH *channel)
Clears the glitch flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearNewValueEvent (Ifx_GTM_TIM_CH *channel)
Clears the new value flag. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGtm_Tim_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel)
Returns a pointer to the TIM channel SRC. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isCntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Test the counter overflow flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isDataLostEvent (Ifx_GTM_TIM_CH *channel)
Test the data lost flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isEcntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Test the event counter overflow flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isGlitchEvent (Ifx_GTM_TIM_CH *channel)
Test the glitch flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isNewValueEvent (Ifx_GTM_TIM_CH *channel)
Test the new value flag. More...
IFX_INLINE Ifx_GTM_TIM_CH * | IfxGtm_Tim_getChannel (Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Returns the pointer to the TIM channel. More...
IFX_INLINE void | IfxGtm_Tim_Ch_resetChannel (Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Reset the specified TIM channel. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getCaptureClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getCaptureClockSource (Ifx_GTM_TIM_CH *channel)
Returns the capture clock source selected. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getFilterClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Tim_Filter_Clk | IfxGtm_Tim_Ch_getFilterClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Filter clock source selected. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getTimeoutClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getTimeoutClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Timeout clock source selected. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setChannelNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setClockSource (Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setFilterNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setNotificationMode (Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setTimeoutNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tim_Ch_clearCntOverflowEvent()

IFX_INLINE void IfxGtm_Tim_Ch_clearCntOverflowEvent ( Ifx_GTM_TIM_CH * channel )

Clears the counter overflow flag.

Parameters
channel TIM channel pointer
Returns
None

Definition at line 303 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_clearDataLostEvent()

IFX_INLINE void IfxGtm_Tim_Ch_clearDataLostEvent ( Ifx_GTM_TIM_CH * channel )

Clears the data lost flag.

Parameters
channel TIM channel pointer
Returns
None

Definition at line 309 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_clearEcntOverflowEvent()

IFX_INLINE void IfxGtm_Tim_Ch_clearEcntOverflowEvent ( Ifx_GTM_TIM_CH * channel )

Clears the event counter overflow flag.

Parameters
channel TIM channel pointer
Returns
None

Definition at line 315 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_clearGlitchEvent()

IFX_INLINE void IfxGtm_Tim_Ch_clearGlitchEvent ( Ifx_GTM_TIM_CH * channel )

Clears the glitch flag.

Parameters
channel TIM channel pointer
Returns
None

Definition at line 321 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_clearNewValueEvent()

IFX_INLINE void IfxGtm_Tim_Ch_clearNewValueEvent ( Ifx_GTM_TIM_CH * channel )

Clears the new value flag.

Parameters
channel TIM channel pointer
Returns
None

Definition at line 327 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_getCaptureClockFrequency()

IFX_EXTERN float32 IfxGtm_Tim_Ch_getCaptureClockFrequency | ( | Ifx_GTM * | gtm,
 |  | Ifx_GTM_TIM_CH * | channel
 | ) |  |

Returns the Capture Clock Frequency.

Parameters
gtm | Pointer to GTM module
channel | Pointer to TIM channel base
Returns
Capture clock frequency

Definition at line 52 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_getCaptureClockSource()

IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getCaptureClockSource ( Ifx_GTM_TIM_CH * channel )

Returns the capture clock source selected.

Parameters
channel TIM channel pointer
Returns
capture clock source

Definition at line 62 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_Ch_getCaptureClockFrequency().

◆ IfxGtm_Tim_Ch_getFilterClockFrequency()

IFX_EXTERN float32 IfxGtm_Tim_Ch_getFilterClockFrequency | ( | Ifx_GTM * | gtm,
 |  | Ifx_GTM_TIM_CH * | channel
 | ) |  |

Returns the Filter Clock Frequency.

Parameters
gtm | Pointer to GTM module
channel | Pointer to TIM channel base
Returns
Filter clock frequency

Definition at line 68 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_getFilterClockSource()

IFX_EXTERN IfxGtm_Cmu_Tim_Filter_Clk IfxGtm_Tim_Ch_getFilterClockSource ( Ifx_GTM_TIM_CH * channel )

Returns the Filter clock source selected.

Parameters
channel TIM channel pointer
Returns
Filter clock source

Definition at line 98 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_Ch_getFilterClockFrequency().

◆ IfxGtm_Tim_Ch_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGtm_Tim_Ch_getSrcPointer | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tim | tim,
 |  | IfxGtm_Tim_Ch | channel
 | ) |  |

Returns a pointer to the TIM channel SRC.

Parameters
gtm | Pointer to GTM module
tim | Specifies the tim module no
channel | Channel index
Returns
Pointer to the TIM channel SRC

Definition at line 333 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_getTimeoutClockFrequency()

IFX_EXTERN float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency | ( | Ifx_GTM * | gtm,
 |  | Ifx_GTM_TIM_CH * | channel
 | ) |  |

Returns the Timeout Clock Frequency.

Parameters
gtm | Pointer to GTM module
channel | Pointer to TIM channel base
Returns
Timeout clock frequency

Definition at line 104 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_getTimeoutClockSource()

IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getTimeoutClockSource ( Ifx_GTM_TIM_CH * channel )

Returns the Timeout clock source selected.

Parameters
channel TIM channel pointer
Returns
Timeout clock source

Definition at line 114 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_Ch_getTimeoutClockFrequency().

◆ IfxGtm_Tim_Ch_isCntOverflowEvent()

IFX_INLINE boolean IfxGtm_Tim_Ch_isCntOverflowEvent ( Ifx_GTM_TIM_CH * channel )

Test the counter overflow flag.

Parameters
channel TIM channel pointer
Returns
TRUE if the flag is set, else FALSE

Definition at line 340 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_isDataLostEvent()

IFX_INLINE boolean IfxGtm_Tim_Ch_isDataLostEvent ( Ifx_GTM_TIM_CH * channel )

Test the data lost flag.

Parameters
channel TIM channel pointer
Returns
TRUE if the flag is set, else FALSE

Definition at line 346 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_isEcntOverflowEvent()

IFX_INLINE boolean IfxGtm_Tim_Ch_isEcntOverflowEvent ( Ifx_GTM_TIM_CH * channel )

Test the event counter overflow flag.

Parameters
channel TIM channel pointer
Returns
TRUE if the flag is set, else FALSE

Definition at line 352 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_isGlitchEvent()

IFX_INLINE boolean IfxGtm_Tim_Ch_isGlitchEvent ( Ifx_GTM_TIM_CH * channel )

Test the glitch flag.

Parameters
channel TIM channel pointer
Returns
TRUE if the flag is set, else FALSE

Definition at line 358 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_isNewValueEvent()

IFX_INLINE boolean IfxGtm_Tim_Ch_isNewValueEvent ( Ifx_GTM_TIM_CH * channel )

Test the new value flag.

Parameters
channel TIM channel pointer
Returns
TRUE if the flag is set, else FALSE

Definition at line 364 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_resetChannel()

IFX_INLINE void IfxGtm_Tim_Ch_resetChannel | ( | Ifx_GTM_TIM * | tim,
 |  | IfxGtm_Tim_Ch | channel
 | ) |  |

Reset the specified TIM channel.

Parameters
tim | Pointer to GTM TIM instance
channel | Channel index
Returns
None

Definition at line 376 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_Ch_setChannelNotification()

IFX_EXTERN void IfxGtm_Tim_Ch_setChannelNotification | ( | Ifx_GTM_TIM_CH * | channel,
 |  | boolean | irqOnNewVal,
 |  | boolean | irqOnCntOverflow,
 |  | boolean | irqOnEcntOverflow,
 |  | boolean | irqOnDatalost
 | ) |  |

Set the channel notification.

Parameters
channel | TIM channel pointer
irqOnNewVal | If TRUE, the interrupt on new value is enabled
irqOnCntOverflow | If TRUE, the interrupt on CNT overflow is enabled
irqOnEcntOverflow | If TRUE, the interrupt on ECNT overflow is enabled
irqOnDatalost | If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled
Returns
None

Definition at line 120 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_setClockSource()

IFX_EXTERN void IfxGtm_Tim_Ch_setClockSource | ( | Ifx_GTM_TIM_CH * | channel,
 |  | IfxGtm_Cmu_Clk | clock
 | ) |  |

Set the channel clock source.

Parameters
channel | TIM channel pointer
clock | Selected clock
Returns
None

Definition at line 133 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_setFilterNotification()

IFX_EXTERN void IfxGtm_Tim_Ch_setFilterNotification | ( | Ifx_GTM_TIM_CH * | channel,
 |  | boolean | irqOnGlitch
 | ) |  |

Set the filter notification.

Parameters
channel | TIM channel pointer
irqOnGlitch | If TRUE, the interrupt on glitch is enabled
Returns
None

Definition at line 139 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_setNotificationMode()

IFX_EXTERN void IfxGtm_Tim_Ch_setNotificationMode | ( | Ifx_GTM_TIM_CH * | channel,
 |  | IfxGtm_IrqMode | mode
 | ) |  |

This function configures the TIM channel IRQ mode.

Parameters
channel | TIM channel pointer
mode | Notification Mode
Returns
None

Definition at line 150 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_setTimeoutNotification()

IFX_EXTERN void IfxGtm_Tim_Ch_setTimeoutNotification | ( | Ifx_GTM_TIM_CH * | channel,
 |  | boolean | irqOnTimeout
 | ) |  |

Set the timeout notification.

Parameters
channel | TIM channel pointer
irqOnTimeout | If TRUE, the interrupt on timeout is enabled
Returns
None

Definition at line 162 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_getChannel()

IFX_INLINE Ifx_GTM_TIM_CH * IfxGtm_Tim_getChannel | ( | Ifx_GTM_TIM * | tim,
 |  | IfxGtm_Tim_Ch | channel
 | ) |  |

Returns the pointer to the TIM channel.

Parameters
tim | Pointer to Tim base
channel | TIM channel
Returns
Pointer to TIM channel base

Definition at line 370 of file IfxGtm_Tim.h.

Referenced by IfxDsadc_Rdc_initGtmTim(), and IfxGtm_Tim_In_init().


iLLD_TC26B: Tom Basic Functionality

Modules
Tom Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Tom Basic Functionality:

Modules

TOM Enumerations
TOM Channel Functions
TOM TGC Functions

Detailed Description


iLLD_TC26B: TOM Enumerations

Enumerations
TOM Enumerations
iLLD » GTM » Standard Driver » Tom Basic Functionality
Collaboration diagram for TOM Enumerations:

Enumerations

enum IfxGtm_Tom_Ch_ClkSrc {
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 = 0,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 = 1,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 = 2,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 = 3,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 = 4,
IfxGtm_Tom_Ch_ClkSrc_noClock = 5
}
Clock source for the TOM channels. More...
enum IfxGtm_Tom_Ch_OutputTrigger {
IfxGtm_Tom_Ch_OutputTrigger_forward = 0,
IfxGtm_Tom_Ch_OutputTrigger_generate = 1
}
Reset source for channel counter CN0. More...
enum IfxGtm_Tom_Ch_ResetEvent {
IfxGtm_Tom_Ch_ResetEvent_onCm0 = 0,
IfxGtm_Tom_Ch_ResetEvent_onTrigger = 1
}
Reset event for channel counter CN0. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Tom_Ch_ClkSrc

enum IfxGtm_Tom_Ch_ClkSrc

Clock source for the TOM channels.

Enumerator
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 | div 1
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 | div 16
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 | div 256
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 | div 4096
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 | div 32768
IfxGtm_Tom_Ch_ClkSrc_noClock | no clock

Definition at line 81 of file IfxGtm_Tom.h.

◆ IfxGtm_Tom_Ch_OutputTrigger

enum IfxGtm_Tom_Ch_OutputTrigger

Reset source for channel counter CN0.

Enumerator
IfxGtm_Tom_Ch_OutputTrigger_forward | Forward the trigger from the previous channel.
IfxGtm_Tom_Ch_OutputTrigger_generate | Generate the trigger from the current channel.

Definition at line 93 of file IfxGtm_Tom.h.

◆ IfxGtm_Tom_Ch_ResetEvent

enum IfxGtm_Tom_Ch_ResetEvent

Reset event for channel counter CN0.

Enumerator
IfxGtm_Tom_Ch_ResetEvent_onCm0
IfxGtm_Tom_Ch_ResetEvent_onTrigger

Definition at line 101 of file IfxGtm_Tom.h.


iLLD_TC26B: TOM Channel Functions

Functions
TOM Channel Functions
iLLD » GTM » Standard Driver » Tom Basic Functionality
Collaboration diagram for TOM Channel Functions:

Functions

IFX_INLINE Ifx_GTM_TOM_CH * | IfxGtm_Tom_Ch_getChannelPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the base addredd of selected Tom channel. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_clearOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_clearZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification. More...
IFX_EXTERN float32 | IfxGtm_Tom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz. More...
IFX_EXTERN IfxGtm_Tom_Ch_ClkSrc | IfxGtm_Tom_Ch_getClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Ch_getCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getCompareOnePointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Ch_getCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getCompareZeroPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero pointer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_getOutputLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Gets the TOM output level. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxGtm_Tom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC. More...
IFX_EXTERN Ifx_GTM_TOM_TGC * | IfxGtm_Tom_Ch_getTgcPointer (Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getTimerPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_isOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_isZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_raiseInterruptOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 1. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_raiseInterruptZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 0. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompare (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareOneShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareZeroShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCounterValue (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setGatedCounter (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the gated counter mode (channel 0 to 7 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setOneShotMode (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setPcm (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the PCM mode (channel 15 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setResetSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setSignalLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setSpe (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the SPE mode (channel 0 to 7 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setTriggerOutput (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_Ch_clearOneNotification()

IFX_EXTERN void IfxGtm_Tom_Ch_clearOneNotification | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Clears the channel One notification.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
None

Definition at line 54 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_acknowledgeTriggerIrq().

◆ IfxGtm_Tom_Ch_clearZeroNotification()

IFX_EXTERN void IfxGtm_Tom_Ch_clearZeroNotification | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Clears the channel Zero notification.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
None

Definition at line 61 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_acknowledgeTimerIrq().

◆ IfxGtm_Tom_Ch_getChannelPointer()

IFX_INLINE Ifx_GTM_TOM_CH * IfxGtm_Tom_Ch_getChannelPointer | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the base addredd of selected Tom channel.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
Pointer to channel base address

Definition at line 522 of file IfxGtm_Tom.h.

Referenced by IfxGtm_Tom_Ch_clearOneNotification(), IfxGtm_Tom_Ch_clearZeroNotification(), IfxGtm_Tom_Ch_getClockSource(), IfxGtm_Tom_Ch_getCompareOne(), IfxGtm_Tom_Ch_getCompareOnePointer(), IfxGtm_Tom_Ch_getCompareZero(), IfxGtm_Tom_Ch_getCompareZeroPointer(), IfxGtm_Tom_Ch_getOutputLevel(), IfxGtm_Tom_Ch_getTimerPointer(), IfxGtm_Tom_Ch_isOneNotification(), IfxGtm_Tom_Ch_isZeroNotification(), IfxGtm_Tom_Ch_raiseInterruptOne(), IfxGtm_Tom_Ch_raiseInterruptZero(), IfxGtm_Tom_Ch_setClockSource(), IfxGtm_Tom_Ch_setCompare(), IfxGtm_Tom_Ch_setCompareOne(), IfxGtm_Tom_Ch_setCompareOneShadow(), IfxGtm_Tom_Ch_setCompareShadow(), IfxGtm_Tom_Ch_setCompareZero(), IfxGtm_Tom_Ch_setCompareZeroShadow(), IfxGtm_Tom_Ch_setCounterValue(), IfxGtm_Tom_Ch_setGatedCounter(), IfxGtm_Tom_Ch_setNotification(), IfxGtm_Tom_Ch_setOneShotMode(), IfxGtm_Tom_Ch_setResetSource(), IfxGtm_Tom_Ch_setSignalLevel(), IfxGtm_Tom_Ch_setSpe(), and IfxGtm_Tom_Ch_setTriggerOutput().

◆ IfxGtm_Tom_Ch_getClockFrequency()

IFX_EXTERN float32 IfxGtm_Tom_Ch_getClockFrequency | ( | Ifx_GTM * | gtm,
 |  | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the TOM channel input clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
tom | Pointer to the TOM object
channel | Channel index
Returns
TOM channel input clock frequency in Hz

Definition at line 68 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_updateInputFrequency().

◆ IfxGtm_Tom_Ch_getClockSource()

IFX_EXTERN IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the channel clock source.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
The clock source

Definition at line 92 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Ch_getClockFrequency(), and IfxGtm_Tom_PwmHl_init().

◆ IfxGtm_Tom_Ch_getCompareOne()

IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareOne | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the compare one value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
compare one value

Definition at line 104 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_getTrigger().

◆ IfxGtm_Tom_Ch_getCompareOnePointer()

IFX_EXTERN volatile uint32* IfxGtm_Tom_Ch_getCompareOnePointer | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the compare one pointer.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
compare one pointer

Definition at line 112 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_getTriggerPointer().

◆ IfxGtm_Tom_Ch_getCompareZero()

IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareZero | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the compare zero value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
compare zero value

Definition at line 120 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_getCompareZeroPointer()

IFX_EXTERN volatile uint32* IfxGtm_Tom_Ch_getCompareZeroPointer | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the compare zero pointer.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
compare zero pointer

Definition at line 128 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_getOutputLevel()

IFX_EXTERN boolean IfxGtm_Tom_Ch_getOutputLevel | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Gets the TOM output level.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
TRUE the output is high, FALSE the output is low

Definition at line 135 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_getSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxGtm_Tom_Ch_getSrcPointer | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tom | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns a pointer to the TOM channel SRC.

Parameters
gtm | Pointer to GTM module
tom | Specifies the tom object
channel | Channel index
Returns
Pointer to the TOM channel SRC

Definition at line 146 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_getTgcPointer()

IFX_EXTERN Ifx_GTM_TOM_TGC* IfxGtm_Tom_Ch_getTgcPointer | ( | Ifx_GTM_TOM * | tom,
 |  | uint32 | tgcIndex
 | ) |  |

Returns the TGC pointer.

Parameters
tom | Pointer to the TOM object
tgcIndex | TGC index
Returns
TOM TGC object pointer

Definition at line 153 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_getTimerPointer()

IFX_EXTERN volatile uint32* IfxGtm_Tom_Ch_getTimerPointer | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the Timer pointer.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
Timer pointer

Definition at line 170 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_getPointer().

◆ IfxGtm_Tom_Ch_isOneNotification()

IFX_EXTERN boolean IfxGtm_Tom_Ch_isOneNotification | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the status of channel One notification.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
Status of channel One notification

Definition at line 177 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_acknowledgeTriggerIrq().

◆ IfxGtm_Tom_Ch_isZeroNotification()

IFX_EXTERN boolean IfxGtm_Tom_Ch_isZeroNotification | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the status of channel Zero notification.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
Status of channel Zero notification

Definition at line 186 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_acknowledgeTimerIrq().

◆ IfxGtm_Tom_Ch_raiseInterruptOne()

IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptOne | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Raises the interrupt for Compare 1.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
None

Definition at line 195 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_raiseInterruptZero()

IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptZero | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Raises the interrupt for Compare 0.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
None

Definition at line 202 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_setClockSource()

IFX_EXTERN void IfxGtm_Tom_Ch_setClockSource | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | IfxGtm_Tom_Ch_ClkSrc | clock
 | ) |  |

Sets the channel clock source.

Parameters
tom | Pointer to the TOM object
channel | Channel index
clock | Channel clock source
Returns
None

Definition at line 209 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_setCompare()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompare | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | compareZero,
 |  | uint32 | compareOne
 | ) |  |

Sets the compare 0 and 1 values.

Parameters
tom | Pointer to the TOM object
channel | Channel index
compareZero | Compare zero value
compareOne | Compare one value
Returns
None

Definition at line 217 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_setCompareOne()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOne | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | compareOne
 | ) |  |

Sets the compare 1 value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
compareOne | Compare one value
Returns
None

Definition at line 226 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init().

◆ IfxGtm_Tom_Ch_setCompareOneShadow()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOneShadow | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | shadowOne
 | ) |  |

Sets the compare 1 shadow value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
shadowOne | Compare one shadow value
Returns
None

Definition at line 234 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), and IfxGtm_Tom_Timer_setTrigger().

◆ IfxGtm_Tom_Ch_setCompareShadow()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompareShadow | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | shadowZero,
 |  | uint32 | shadowOne
 | ) |  |

Sets the compare 0 and 1 shadow values.

Parameters
tom | Pointer to the TOM object
channel | Channel index
shadowZero | Compare zero shadow value
shadowOne | Compare one shadow value
Returns
None

Definition at line 242 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_PwmHl_updateCenterAligned(), IfxGtm_Tom_PwmHl_updateEdgeAligned(), IfxGtm_Tom_PwmHl_updateOff(), IfxGtm_Tom_PwmHl_updatePulse(), and IfxGtm_Tom_PwmHl_updateShiftCenterAligned().

◆ IfxGtm_Tom_Ch_setCompareZero()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZero | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | compareZero
 | ) |  |

Sets the compare 0 value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
compareZero | Compare zero value
Returns
None

Definition at line 251 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init().

◆ IfxGtm_Tom_Ch_setCompareZeroShadow()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZeroShadow | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | shadowZero
 | ) |  |

Sets the compare 0 shadow value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
shadowZero | Compare zero shadow value
Returns
None

Definition at line 259 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), and IfxGtm_Tom_Timer_setPeriod().

◆ IfxGtm_Tom_Ch_setCounterValue()

IFX_EXTERN void IfxGtm_Tom_Ch_setCounterValue | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | value
 | ) |  |

Sets the counter value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
value | Counter value
Returns
None

Definition at line 267 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_setGatedCounter()

IFX_EXTERN void IfxGtm_Tom_Ch_setGatedCounter | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable the gated counter mode (channel 0 to 7 only)

Parameters
tom | Pointer to the TOM object
channel | Channel index
enabled | If TRUE, the feature is enabled, else disabled
Returns
None

Definition at line 275 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_setNotification()

IFX_EXTERN void IfxGtm_Tom_Ch_setNotification | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | IfxGtm_IrqMode | mode,
 |  | boolean | interruptOnCompareZero,
 |  | boolean | interruptOnCompareOne
 | ) |  |

Sets the channel notification.

Parameters
tom | Pointer to the TOM object
channel | Channel index
mode | Interrupt mode
interruptOnCompareZero | If TRUE, an interrupt is generated on compare 0, else no interrupt is generated
interruptOnCompareOne | If TRUE, an interrupt is generated on compare 1, else no interrupt is generated
Returns
None

Definition at line 286 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_setOneShotMode()

IFX_EXTERN void IfxGtm_Tom_Ch_setOneShotMode | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable the one shot mode.

Parameters
tom | Pointer to the TOM object
channel | Channel index
enabled | If TRUE, the feature is enabled, else disabled
Returns
None

Definition at line 304 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_setSingleMode().

◆ IfxGtm_Tom_Ch_setPcm()

IFX_EXTERN void IfxGtm_Tom_Ch_setPcm | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable the PCM mode (channel 15 only)

Parameters
tom | Pointer to the TOM object
channel | Channel index
enabled | If TRUE, the feature is enabled, else disabled
Returns
None

Definition at line 312 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_setResetSource()

IFX_EXTERN void IfxGtm_Tom_Ch_setResetSource | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | IfxGtm_Tom_Ch_ResetEvent | event
 | ) |  |

Sets the channel clock source either from local or from previous channel.

Parameters
tom | Pointer to the TOM object
channel | Channel index
event | Channel reset event
Returns
None

Definition at line 321 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_setSignalLevel()

IFX_EXTERN void IfxGtm_Tom_Ch_setSignalLevel | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | Ifx_ActiveState | activeState
 | ) |  |

Sets the signal level.

Parameters
tom | Pointer to the TOM object
channel | Channel index
activeState | Signal level active state. In case the channel is reset, the output is set to not active. The signal is active between 0 and the leading edge (CM1) and inactive between the leading edge and the trailing edge (CM0).
Returns
None

Definition at line 329 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_setMode(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_setSpe()

IFX_EXTERN void IfxGtm_Tom_Ch_setSpe | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable the SPE mode (channel 0 to 7 only)

Parameters
tom | Pointer to the TOM object
channel | Channel index
enabled | If TRUE, the feature is enabled, else disabled
Returns
None

Definition at line 337 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_setTriggerOutput()

IFX_EXTERN void IfxGtm_Tom_Ch_setTriggerOutput | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | IfxGtm_Tom_Ch_OutputTrigger | trigger
 | ) |  |

Sets the channel trigger output.

Parameters
tom | Pointer to the TOM object
channel | Channel index
trigger | Channel trigger output mode
Returns
None

Definition at line 348 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().


iLLD_TC26B: TOM TGC Functions

Functions
TOM TGC Functions
iLLD » GTM » Standard Driver » Tom Basic Functionality
Collaboration diagram for TOM TGC Functions:

Functions

IFX_INLINE void | IfxGtm_Tom_Tgc_writeGlobalControl (Ifx_GTM_TOM_TGC *tgc, uint32 control)
Sets the tgc global control value. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Tgc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Tgc_buildFeatureForChannel (IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannel (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelOutput (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannels (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsOutput (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsTrigger (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableTimeTrigger (Ifx_GTM_TOM_TGC *tgc, boolean enabled)
Enable/disable the time base trigger. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_resetChannels (Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
Reset one or more channels. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setChannelForceUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setChannelsForceUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setTimeTrigger (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_trigger (Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_Tgc_buildFeature()

IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeature | ( | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | uint8 | bitfieldOffset
 | ) |  |

Builds the register value for the feature enable/disable.

Parameters
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
bitfieldOffset | Offset of the channel 0 bitfield in the register
Returns
The register value

Definition at line 356 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Tgc_enableChannels(), IfxGtm_Tom_Tgc_enableChannelsOutput(), IfxGtm_Tom_Tgc_enableChannelsTrigger(), IfxGtm_Tom_Tgc_enableChannelsUpdate(), IfxGtm_Tom_Tgc_setChannelsForceUpdate(), and IfxGtm_Tom_Timer_addToChannelMask().

◆ IfxGtm_Tom_Tgc_buildFeatureForChannel()

IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeatureForChannel | ( | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled,
 |  | uint8 | bitfieldOffset
 | ) |  |

Builds the register value for the feature enable/disable for a single channel.

Parameters
channel | Channel index
enabled | Enable/ Disable choise of the feature
bitfieldOffset | Offset of the channel 0 bitfield in the register
Returns
The register value

Definition at line 384 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Tgc_enableChannel(), IfxGtm_Tom_Tgc_enableChannelOutput(), IfxGtm_Tom_Tgc_enableChannelUpdate(), and IfxGtm_Tom_Tgc_setChannelForceUpdate().

◆ IfxGtm_Tom_Tgc_enableChannel()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannel | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | immediate
 | ) |  |

Enable/disable one channel (ENDIS)

Parameters
tgc | Pointer to the TGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 404 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_start(), and IfxGtm_Tom_Pwm_stop().

◆ IfxGtm_Tom_Tgc_enableChannelOutput()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelOutput | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | immediate
 | ) |  |

Enable/disable one channel output (OUTEN)

Parameters
tgc | Pointer to the TGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 422 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_start(), and IfxGtm_Tom_Pwm_stop().

◆ IfxGtm_Tom_Tgc_enableChannels()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannels | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | boolean | immediate
 | ) |  |

Enable/disable one or more channels (ENDIS)

Parameters
tgc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 446 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_Timer_init(), IfxGtm_Tom_Timer_run(), and IfxGtm_Tom_Timer_stop().

◆ IfxGtm_Tom_Tgc_enableChannelsOutput()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsOutput | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | boolean | immediate
 | ) |  |

Enable/disable one or more channels output (OUTEN)

Parameters
tgc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 464 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Tgc_enableChannelsTrigger()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsTrigger | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask
 | ) |  |

Enable/disable the TGC channels trigger.

Parameters
tgc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 482 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Tgc_enableChannelsUpdate()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsUpdate | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask
 | ) |  |

Enable/disable one or more channels for update (UPEN)

Parameters
tgc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 488 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Tgc_enableChannelUpdate()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelUpdate | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable one channel for update (UPEN)

Parameters
tgc | Pointer to the TGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
Returns
None

Definition at line 440 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init().

◆ IfxGtm_Tom_Tgc_enableTimeTrigger()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableTimeTrigger | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | boolean | enabled
 | ) |  |

Enable/disable the time base trigger.

Parameters
tgc | Pointer to the TGC object
enabled | If TRUE, the trigger is enabled else disabled
Returns
None

Definition at line 494 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Tgc_resetChannels()

IFX_EXTERN void IfxGtm_Tom_Tgc_resetChannels | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint32 | resetMask
 | ) |  |

Reset one or more channels.

Parameters
tgc | Pointer to the TGC object
resetMask | Mask for the channel reset (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 500 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Tgc_setChannelForceUpdate()

IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelForceUpdate | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | resetEnabled
 | ) |  |

Enable/disable one channel for update (FUPD)

Parameters
tgc | Pointer to the TGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
resetEnabled | Enable/ Disable reset choise of the feature
Returns
None

Definition at line 519 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init().

◆ IfxGtm_Tom_Tgc_setChannelsForceUpdate()

IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelsForceUpdate | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | uint16 | resetEnableMask,
 |  | uint16 | resetDisableMask
 | ) |  |

Enable/disable one or more channels for the force update feature (FUPD)

Parameters
tgc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
resetEnableMask | Mask for the enabled channels counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...) Channel 0, bit 1: channel 1, ...)
resetDisableMask | Mask for the disabled channels with no counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 530 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Tgc_setTimeTrigger()

IFX_EXTERN void IfxGtm_Tom_Tgc_setTimeTrigger | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | IfxGtm_Tbu_Ts | base,
 |  | uint32 | value
 | ) |  |

Sets the trigger time base and time base value.

Parameters
tgc | Pointer to the TGC object
base | Time base used for comparison
value | Compare value that raise the trigger
Returns
None

Definition at line 541 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Tgc_trigger()

IFX_EXTERN void IfxGtm_Tom_Tgc_trigger ( Ifx_GTM_TOM_TGC * tgc )

Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)

Parameters
tgc Pointer to the TGC object
Returns
None

Definition at line 552 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_start(), IfxGtm_Tom_Pwm_stop(), IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Tgc_writeGlobalControl()

IFX_INLINE void IfxGtm_Tom_Tgc_writeGlobalControl | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint32 | control
 | ) |  |

Sets the tgc global control value.

Parameters
tgc | Pointer to the TGC object
control | global control value
Returns
None

Definition at line 528 of file IfxGtm_Tom.h.

Referenced by IfxGtm_Tom_Timer_applyUpdate(), and IfxGtm_Tom_Timer_disableUpdate().


iLLD_TC26B: Atom Interface Drivers

Modules
Atom Interface Drivers
iLLD » GTM
Collaboration diagram for Atom Interface Drivers:

Modules

ATOM PWM Interface Driver
ATOM PWM HL Interface Driver
ATOM Timer Interface Driver

Detailed Description


iLLD_TC26B: ATOM PWM Interface Driver

Modules
ATOM PWM Interface Driver
iLLD » GTM » Atom Interface Drivers
Collaboration diagram for ATOM PWM Interface Driver:

Modules

How to use the GTM ATOM PWM Driver
ATOM PWM DataStructures
Pwm Functions

Detailed Description


iLLD_TC26B: How to use the GTM ATOM PWM Driver

How to use the GTM ATOM PWM Driver
iLLD » GTM » Atom Interface Drivers » ATOM PWM Interface Driver
Collaboration diagram for How to use the GTM ATOM PWM Driver:

This interface allows to generate simple PWM signal on a ATOM out put and can generate interrupts if enabled. this output can also be routed to port pin if required.

Preparation

Include Files

Include following header file into your C code:

#include <Gtm/Atom/Pwm/IfxGtm_Atom_Pwm.h>

Variables

define global variables if necessary

Ifx_GTM *gtm = &MODULE_GTM;
#define ATOM0_CH0_PRIO 20

Interrupts

define Interrupts if needed

IFX_INTERRUPT(ATOM0Ch0_ISR, 0, ATOM0_CH0_PRIO)
{}

Initialization

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler (ATOM0Ch0_ISR, ATOM0_CH0_PRIO);
// enable GTM clock
{
float32 frequency = IfxGtm_Cmu_getModuleFrequency(gtm);
// Enables the GTM
IfxGtm_enable(gtm);
// Set the global clock frequency to the max
IfxGtm_Cmu_setGclkFrequency(gtm, frequency);
// Set the CMU CLK0
IfxGtm_Cmu_setClkFrequency(gtm, IfxGtm_Cmu_Clk_0, frequency);
// FXCLK: used by TOM and CLK0: used by ATOM
IfxGtm_Cmu_enableClocks(gtm, IFXGTM_CMU_CLKEN_FXCLK | IFXGTM_CMU_CLKEN_CLK0);
}
// initialise ATOM
IfxGtm_Atom_Pwm_Config atomConfig; \\configuration structure
IfxGtm_Atom_Pwm_Driver atomHandle; \\ handle
IfxGtm_Atom_Pwm_initConfig(&atomConfig, gtm);
atomConfig.tomChannel = IfxGtm_Tom_Ch_0;
atomConfig.period = 20;
atomConfig.dutyCycle = 10;
atomConfig.interrupt.ccu0Enabled = TRUE;
atomConfig.interrupt.isrPriority = ATOM0_CH0_PRIO;
atomConfig.pin.outputPin = &IfxGtm_ATOM0_0_TOUT0_P02_0_OUT;
IfxGtm_Atom_Pwm_init(&atomHandle, &atomConfig);

ATOM will be now generating a PWM signal on the selected port pin while generating selected interrupt according to above configured period and duty cycle.


iLLD_TC26B: ATOM PWM DataStructures

Data Structures
ATOM PWM DataStructures
iLLD » GTM » Atom Interface Drivers » ATOM PWM Interface Driver
Collaboration diagram for ATOM PWM DataStructures:

Data Structures

struct | IfxGtm_Atom_Pwm_Interrupt
configuration structure for interrupts More...
struct | IfxGtm_Atom_Pwm_pin
configuration structure for output pin More...
struct | IfxGtm_Atom_Pwm_Config
Configuration structure. More...
struct | IfxGtm_Atom_Pwm_Driver
Driver Handle. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Atom_Pwm_Interrupt

struct IfxGtm_Atom_Pwm_Interrupt

configuration structure for interrupts

Definition at line 136 of file IfxGtm_Atom_Pwm.h.

Data Fields
boolean | ccu0Enabled | Enable/Disable choice for CCU0 trigger interrupt.
boolean | ccu1Enabled | Enable/Disable choice for CCU1 trigger interrupt.
Ifx_Priority | isrPriority | Priority for Ccu0/1 interrupt.
IfxSrc_Tos | isrProvider | Type of Service for Ccu0/1 interrupt.
IfxGtm_IrqMode | mode | IRQ mode of interrupt.

◆ IfxGtm_Atom_Pwm_pin

struct IfxGtm_Atom_Pwm_pin

configuration structure for output pin

Definition at line 147 of file IfxGtm_Atom_Pwm.h.

Collaboration diagram for IfxGtm_Atom_Pwm_pin:
[legend]
Data Fields
IfxPort_OutputMode | outputMode | Output mode.
IfxGtm_Atom_ToutMap * | outputPin | output pin
IfxPort_PadDriver | padDriver | Pad driver.

◆ IfxGtm_Atom_Pwm_Config

struct IfxGtm_Atom_Pwm_Config

Configuration structure.

Definition at line 160 of file IfxGtm_Atom_Pwm.h.

Collaboration diagram for IfxGtm_Atom_Pwm_Config:
[legend]
Data Fields
IfxGtm_Atom | atom | Index of the ATOM object used.
IfxGtm_Atom_Ch | atomChannel | ATOM channel used for the timer.
uint32 | dutyCycle | Duty Cycle.
Ifx_GTM * | gtm | Pointer to GTM module.
boolean | immediateStartEnabled | enable immediate start after init
IfxGtm_Atom_Pwm_Interrupt | interrupt | configuration structure for interrupt
IfxGtm_Atom_Mode | mode | Atom mode of operation.
boolean | oneShotModeEnabled | Enable/Disable the one shot mode.
uint32 | period | Period.
IfxGtm_Atom_Pwm_pin | pin | configuration structure for output pin
Ifx_ActiveState | signalLevel | Signal Level.
boolean | synchronousUpdateEnabled | Synchronous or Asynchronous update.

◆ IfxGtm_Atom_Pwm_Driver

struct IfxGtm_Atom_Pwm_Driver

Driver Handle.

Definition at line 178 of file IfxGtm_Atom_Pwm.h.

Data Fields
Ifx_GTM_ATOM_AGC * | agc | Pointer to the AGC object.
Ifx_GTM_ATOM * | atom | Pointer to the ATOM object.
IfxGtm_Atom_Ch | atomChannel | ATOM channel used for the timer.
IfxGtm_Atom | atomIndex | Index of the ATOM object used.
Ifx_GTM * | gtm | Pointer to GTM module.
IfxGtm_Atom_Mode | mode | Atom mode of operation.


iLLD_TC26B: Pwm Functions

Functions
Pwm Functions
iLLD » GTM » Atom Interface Drivers » ATOM PWM Interface Driver
Collaboration diagram for Pwm Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Atom_Pwm_init (IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
Initialises the Timer object. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_initConfig (IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_start (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Starts the PWM generation from the configured channel. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_stop (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_Pwm_init()

IFX_EXTERN boolean IfxGtm_Atom_Pwm_init | ( | IfxGtm_Atom_Pwm_Driver * | driver,
 |  | const IfxGtm_Atom_Pwm_Config * | config
 | ) |  |

Initialises the Timer object.

Parameters
driver | ATOM Handle
config | Configuration structure for ATOM
Returns
TRUE on success else FALSE

Definition at line 52 of file IfxGtm_Atom_Pwm.c.

◆ IfxGtm_Atom_Pwm_initConfig()

IFX_EXTERN void IfxGtm_Atom_Pwm_initConfig | ( | IfxGtm_Atom_Pwm_Config * | config,
 |  | Ifx_GTM * | gtm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | This parameter is Initialised by the function
gtm | Pointer to GTM module
Returns
None

Definition at line 116 of file IfxGtm_Atom_Pwm.c.

◆ IfxGtm_Atom_Pwm_start()

IFX_EXTERN void IfxGtm_Atom_Pwm_start | ( | IfxGtm_Atom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

Starts the PWM generation from the configured channel.

Parameters
driver | handle for the PWM device.
immediate | immediate start or not.
Returns
None

Definition at line 139 of file IfxGtm_Atom_Pwm.c.

◆ IfxGtm_Atom_Pwm_stop()

IFX_EXTERN void IfxGtm_Atom_Pwm_stop | ( | IfxGtm_Atom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

Stops the PWM generation from the configured channel.

Parameters
driver | handle for the PWM device
immediate | immediate start or not.
Returns
None

Definition at line 150 of file IfxGtm_Atom_Pwm.c.


iLLD_TC26B: ATOM PWM HL Interface Driver

Modules
ATOM PWM HL Interface Driver
iLLD » GTM » Atom Interface Drivers
Collaboration diagram for ATOM PWM HL Interface Driver:

Modules

How to use the GTM ATOM PWM Driver
Data Structures
PwmHl Functions
PwmHl StdIf Functions

Detailed Description


iLLD_TC26B: How to use the GTM ATOM PWM Driver

How to use the GTM ATOM PWM Driver
iLLD » GTM » Atom Interface Drivers » ATOM PWM HL Interface Driver
Collaboration diagram for How to use the GTM ATOM PWM Driver:

This driver implements the PWM functionalities as defined by Standard interface: Multi-channels, dual-complementary PWM interface. The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

Implementation is similar to TOM PWM HL Interface Driver

For a detailed configuration of the microcontroller, see IfxGtm_Atom_PwmHl_init().

Usage example

Initialisation is done by, e.g:

IfxGtm_Atom_PwmHl_Config driverConfig;
IfxGtm_Atom_PwmHl driverData;
IfxStdIf_PwmHl pwmhl;
IfxGtm_Atom_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
IfxGtm_Atom_PwmHl_init(&driverData, &driverConfig);
IfxGtm_Atom_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);

During run-time, the interface functions shall be used, e.g.:

IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
Ifx_TimerValue onTime[3]; // assume configured for three HL channels
onTime[0] = 10;
onTime[1] = 20;
onTime[2] = 30;
IfxStdIf_Timer_disableUpdate(timer);
IfxStdIf_Timer_setPeriod(timer, period);
IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
IfxStdIf_Timer_applyUpdate(timer);


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » GTM » Atom Interface Drivers » ATOM PWM HL Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Atom_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxGtm_Atom_PwmHl_Config
GTM ATOM: PWM HL configuration. More...
struct | IfxGtm_Atom_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxGtm_Atom_PwmHl_s
GTM ATOM PWM driver. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Atom_PwmHl_Base

struct IfxGtm_Atom_PwmHl_Base

Multi-channels PWM object definition (channels only)

Definition at line 128 of file IfxGtm_Atom_PwmHl.h.

Data Fields
Ifx_ActiveState | ccxActiveState | Top PWM active state.
uint8 | channelCount | Number of PWM channels, one channel is made of a top and bottom channel.
Ifx_ActiveState | coutxActiveState | Bottom PWM active state.
Ifx_TimerValue | deadtime | Dead time between the top and bottom channel in ticks.
boolean | inverted | Flag indicating the center aligned inverted mode (TRUE)
Ifx_TimerValue | maxPulse | internal parameter
Ifx_TimerValue | minPulse | minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Ifx_Pwm_Mode | mode | actual PWM mode
sint8 | setMode | A non zero flag indicates that the PWM mode is being modified.

◆ IfxGtm_Atom_PwmHl_Config

struct IfxGtm_Atom_PwmHl_Config

GTM ATOM: PWM HL configuration.

Definition at line 147 of file IfxGtm_Atom_PwmHl.h.

Collaboration diagram for IfxGtm_Atom_PwmHl_Config:
[legend]
Data Fields
IfxGtm_Atom | atom | ATOM unit used.
IfxStdIf_PwmHl_Config | base | PWM HL standard interface configuration.
IFX_CONST IfxGtm_Atom_ToutMapP * | ccx | Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
IFX_CONST IfxGtm_Atom_ToutMapP * | coutx | Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
boolean | initPins | TRUE: Initialize pins in driver FALSE: Don't initialize pins in driver. User handles separately.
IfxGtm_Atom_Timer * | timer | Pointer to the linked timer object.

◆ IfxGtm_Atom_PwmHl_Mode

struct IfxGtm_Atom_PwmHl_Mode

Structure for PWM configuration.

Definition at line 160 of file IfxGtm_Atom_PwmHl.h.

Collaboration diagram for IfxGtm_Atom_PwmHl_Mode:
[legend]
Data Fields
boolean | inverted | Inverted configuration for the selected mode.
Ifx_Pwm_Mode | mode | Pwm Mode.
IfxGtm_Atom_PwmHl_Update | update | update call back function for the selected mode
IfxGtm_Atom_PwmHl_UpdateShift | updateAndShift | update shift call back function for the selected mode
IfxGtm_Atom_PwmHl_UpdatePulse | updatePulse | update pulse call back function for the selected mode

◆ IfxGtm_Atom_PwmHl_s

struct IfxGtm_Atom_PwmHl_s

GTM ATOM PWM driver.

Definition at line 171 of file IfxGtm_Atom_PwmHl.h.

Collaboration diagram for IfxGtm_Atom_PwmHl_s:
[legend]
Data Fields
Ifx_GTM_ATOM_AGC * | agc | AGC unit used.
Ifx_GTM_ATOM * | atom | ATOM unit used.
IfxGtm_Atom_PwmHl_Base | base | Multi-channels PWM object definition (channels only)
IfxGtm_Atom_Ch | ccx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS] | ATOM channels used for the CCCX outputs.
IfxGtm_Atom_Ch * | ccxTemp | cached value
IfxGtm_Atom_Ch | coutx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS] | ATOM channels used for the OUTX outputs.
IfxGtm_Atom_Ch * | coutxTemp | cached value
IfxGtm_Atom_Timer * | timer | Pointer to the linked timer object.
IfxGtm_Atom_PwmHl_Update | update | Update function for actual selected mode.
IfxGtm_Atom_PwmHl_UpdateShift | updateAndShift | Update shift function for actual selected mode.
IfxGtm_Atom_PwmHl_UpdatePulse | updatePulse | Update pulse function for actual selected mode.


iLLD_TC26B: PwmHl Functions

Functions
PwmHl Functions
iLLD » GTM » Atom Interface Drivers » ATOM PWM HL Interface Driver
Collaboration diagram for PwmHl Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_init (IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_initConfig (IfxGtm_Atom_PwmHl_Config *config)
Initialize the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_PwmHl_init()

IFX_EXTERN boolean IfxGtm_Atom_PwmHl_init | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | const IfxGtm_Atom_PwmHl_Config * | config
 | ) |  |

Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.

Parameters
driver | GTM ATOM PWM driver
config | GTM ATOM: PWM HL configuration
Returns
TRUE on success else FALSE

Definition at line 166 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_initConfig()

IFX_EXTERN void IfxGtm_Atom_PwmHl_initConfig ( IfxGtm_Atom_PwmHl_Config * config )

Initialize the configuration structure to default.

Parameters
config Channel configuration. This parameter is Initialised by the function
Returns
None

Definition at line 262 of file IfxGtm_Atom_PwmHl.c.


iLLD_TC26B: PwmHl StdIf Functions

Functions
PwmHl StdIf Functions
iLLD » GTM » Atom Interface Drivers » ATOM PWM HL Interface Driver
Collaboration diagram for PwmHl StdIf Functions:

Functions

IFX_INLINE Ifx_ActiveState | IfxGtm_Atom_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateAndShiftOff (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateCenterAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateEdgeAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateOff (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updatePulse (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updatePulseOff (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateShiftCenterAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned. More...
IFX_EXTERN float32 | IfxGtm_Atom_PwmHl_getDeadtime (IfxGtm_Atom_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxGtm_Atom_PwmHl_getMinPulse (IfxGtm_Atom_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxGtm_Atom_PwmHl_getMode (IfxGtm_Atom_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setDeadtime (IfxGtm_Atom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setMinPulse (IfxGtm_Atom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setMode (IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setOnTime (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setOnTimeAndShift (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setPulse (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setupChannels (IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_PwmHl_getDeadtime()

IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getDeadtime ( IfxGtm_Atom_PwmHl * driver )

Returns the dead time.

See also
IfxStdIf_PwmHl_GetDeadtime
Parameters
driver GTM ATOM PWM driver
Returns
Dead Time

Definition at line 148 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_getMinPulse()

IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getMinPulse ( IfxGtm_Atom_PwmHl * driver )

Returns the minimum pulse.

See also
IfxStdIf_PwmHl_GetMinPulse
Parameters
driver GTM ATOM PWM driver
Returns
Min Pulse

Definition at line 154 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_getMode()

IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Atom_PwmHl_getMode ( IfxGtm_Atom_PwmHl * driver )

Returns Pwm mode.

See also
IfxStdIf_PwmHl_GetMode
Parameters
driver GTM ATOM PWM driver
Returns
Pwm mode

Definition at line 160 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_invertActiveState()

IFX_INLINE Ifx_ActiveState IfxGtm_Atom_PwmHl_invertActiveState ( Ifx_ActiveState activeState )

Inverts the active state.

Parameters
activeState Active state
Returns
State

Definition at line 138 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_PwmHl_setMode().

◆ IfxGtm_Atom_PwmHl_setDeadtime()

IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setDeadtime | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | float32 | deadtime
 | ) |  |

Sets the dead time.

See also
IfxStdIf_PwmHl_SetDeadtime
Parameters
driver | GTM ATOM PWM driver
deadtime | Dead time value
Returns
TRUE on success else FALSE

Definition at line 273 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setMinPulse()

IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMinPulse | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | float32 | minPulse
 | ) |  |

Sets the minimum pulse.

See also
IfxStdIf_PwmHl_SetMinPulse
Parameters
driver | GTM ATOM PWM driver
minPulse | Minimum pulse
Returns
TRUE on success else FALSE

Definition at line 282 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setMode()

IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMode | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_Pwm_Mode | mode
 | ) |  |

Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()

See also
IfxStdIf_PwmHl_SetMode
Parameters
driver | GTM ATOM PWM driver
mode | Pwm mode
Returns
TRUE on success else FALSE
Note
Changing signal level may produce short circuit at the power stage, in which case the inverter must be disable during this action.

Definition at line 293 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setOnTime()

IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTime | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Sets the ON time.

See also
IfxStdIf_PwmHl_SetOnTime
Parameters
driver | GTM ATOM PWM driver
tOn | ON time
Returns
None

Definition at line 362 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setOnTimeAndShift()

IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTimeAndShift | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets the ON time and Shift.

Parameters
driver | GTM ATOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 368 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setPulse()

IFX_EXTERN void IfxGtm_Atom_PwmHl_setPulse | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Sets the ON time and offset, all switched are independent.

Parameters
driver | GTM ATOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 374 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setupChannels()

IFX_EXTERN void IfxGtm_Atom_PwmHl_setupChannels | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | boolean * | activeCh,
 |  | boolean * | stuckSt
 | ) |  |

Set up channels.

See also
IfxStdIf_PwmHl_SetupChannels
Parameters
driver | GTM ATOM PWM driver
activeCh | Active channel
stuckSt | Stuck state
Returns
None

Definition at line 380 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_stdIfPwmHlInit()

IFX_EXTERN boolean IfxGtm_Atom_PwmHl_stdIfPwmHlInit | ( | IfxStdIf_PwmHl * | stdif,
 |  | IfxGtm_Atom_PwmHl * | driver
 | ) |  |

Initialises the statndard interface Pwm.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 389 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updateAndShiftOff()

IFX_STATIC void IfxGtm_Atom_PwmHl_updateAndShiftOff | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets switched to OFF.

Parameters
driver | GTM ATOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 414 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updateCenterAligned()

IFX_STATIC void IfxGtm_Atom_PwmHl_updateCenterAligned | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in center aligned and center aligned inverted modes.

Parameters
driver | GTM ATOM PWM driver
tOn | T on
Returns
None

Definition at line 422 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updateEdgeAligned()

IFX_STATIC void IfxGtm_Atom_PwmHl_updateEdgeAligned | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in edge aligned modes (left and right aligned)

Parameters
driver | GTM ATOM PWM driver
tOn | T on
Returns
None

Definition at line 482 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updateOff()

IFX_STATIC void IfxGtm_Atom_PwmHl_updateOff | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Set the outputs to inactive.

Parameters
driver | GTM ATOM PWM driver
tOn | T on
Returns
None

Definition at line 542 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_PwmHl_updateAndShiftOff(), and IfxGtm_Atom_PwmHl_updatePulseOff().

◆ IfxGtm_Atom_PwmHl_updatePulse()

IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulse | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Update Pulse.

Parameters
driver | GTM ATOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 558 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updatePulseOff()

IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulseOff | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Set Pulse to OFF.

Parameters
driver | GTM ATOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 665 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updateShiftCenterAligned()

IFX_STATIC void IfxGtm_Atom_PwmHl_updateShiftCenterAligned | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Update Shift Center Aligned.

Parameters
driver | GTM ATOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 674 of file IfxGtm_Atom_PwmHl.c.


iLLD_TC26B: ATOM Timer Interface Driver

Modules
ATOM Timer Interface Driver
iLLD » GTM » Atom Interface Drivers
Collaboration diagram for ATOM Timer Interface Driver:

Modules

How to use the GTM ATOM Timer Driver
Timer StdIf Functions
Timer Functions
Data Structures

Detailed Description


iLLD_TC26B: How to use the GTM ATOM Timer Driver

How to use the GTM ATOM Timer Driver
iLLD » GTM » Atom Interface Drivers » ATOM Timer Interface Driver
Collaboration diagram for How to use the GTM ATOM Timer Driver:

This driver implements the timer functionalities as defined by Standard interface: Timer. The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

Implementation is similar to TOM Timer Interface Driver.

For a detailed configuration of the microcontroller, see IfxGtm_Atom_Timer_init().

Usage example

Initialisation:

IfxGtm_Atom_Timer_Config driverConfig;
IfxGtm_Atom_Timer driverData;
IfxStdIf_Timer timer;
IfxGtm_Atom_Timer_initConfig(&driverConfig, &MODULE_GTM);
IfxGtm_Atom_Timer_init (&driverData, &driverConfig);
boolean IfxGtm_Atom_Timer_stdIfTimerInit(&timer, &driverData);

During run-time, the interface functions should be used:

IfxStdIf_Timer_run(timer);
IfxStdIf_Timer_disableUpdate(timer);
IfxStdIf_Timer_setPeriod(timer, period);
IfxStdIf_Timer_applyUpdate(timer);


iLLD_TC26B: Timer StdIf Functions

Functions
Timer StdIf Functions
iLLD » GTM » Atom Interface Drivers » ATOM Timer Interface Driver
Collaboration diagram for Timer StdIf Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Atom_Timer_acknowledgeTimerIrq (IfxGtm_Atom_Timer *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_acknowledgeTriggerIrq (IfxGtm_Atom_Timer *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_addToChannelMask (IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_applyUpdate (IfxGtm_Atom_Timer *driver)
Enables the transfer of the shadow registers. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_disableUpdate (IfxGtm_Atom_Timer *driver)
Disables the upadte. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getFrequency (IfxGtm_Atom_Timer *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getInputFrequency (IfxGtm_Atom_Timer *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getPeriod (IfxGtm_Atom_Timer *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getResolution (IfxGtm_Atom_Timer *driver)
Returns the resolution. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getTrigger (IfxGtm_Atom_Timer *driver)
Returns the trigger point. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_run (IfxGtm_Atom_Timer *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_setFrequency (IfxGtm_Atom_Timer *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_setPeriod (IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_setSingleMode (IfxGtm_Atom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_setTrigger (IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_stop (IfxGtm_Atom_Timer *driver)
Stops the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_updateInputFrequency (IfxGtm_Atom_Timer *driver)
Updates the input frequency. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_Timer_acknowledgeTimerIrq()

IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTimerIrq ( IfxGtm_Atom_Timer * driver )

Returns the timer event.

See also
IfxStdIf_Timer_AckTimerIrq
Parameters
driver ATOM Timer interface Handle
Returns
Timer event

Definition at line 56 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_acknowledgeTriggerIrq()

IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTriggerIrq ( IfxGtm_Atom_Timer * driver )

Returns the trigger event.

See also
IfxStdIf_Timer_AckTriggerIrq
Parameters
driver ATOM Timer interface Handle
Returns
Trigger event

Definition at line 72 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_addToChannelMask()

IFX_EXTERN void IfxGtm_Atom_Timer_addToChannelMask | ( | IfxGtm_Atom_Timer * | driver,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run.

Parameters
driver | ATOM Timer interface Handle
channel | Channel to ba added to the mask
Returns
None

Definition at line 88 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Timer_applyUpdate()

IFX_EXTERN void IfxGtm_Atom_Timer_applyUpdate ( IfxGtm_Atom_Timer * driver )

Enables the transfer of the shadow registers.

See also
IfxStdIf_Timer_ApplyUpdate
Parameters
driver ATOM Timer interface Handle
Returns
None

Definition at line 96 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_disableUpdate()

IFX_EXTERN void IfxGtm_Atom_Timer_disableUpdate ( IfxGtm_Atom_Timer * driver )

Disables the upadte.

See also
IfxStdIf_Timer_DisableUpdate
Parameters
driver ATOM Timer interface Handle
Returns
None

Definition at line 102 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_getFrequency()

IFX_EXTERN float32 IfxGtm_Atom_Timer_getFrequency ( IfxGtm_Atom_Timer * driver )

Returns the frequency.

See also
IfxStdIf_Timer_GetFrequency
Parameters
driver ATOM Timer interface Handle
Returns
Frequency

Definition at line 108 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_getInputFrequency()

IFX_EXTERN float32 IfxGtm_Atom_Timer_getInputFrequency ( IfxGtm_Atom_Timer * driver )

Returns the Input frequncy.

See also
IfxStdIf_Timer_GetInputFrequency
Parameters
driver ATOM Timer interface Handle
Returns
Frequency

Definition at line 114 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_getPeriod()

IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getPeriod ( IfxGtm_Atom_Timer * driver )

Returns the period of the timer.

See also
IfxStdIf_Timer_GetPeriod
Parameters
driver ATOM Timer interface Handle
Returns
Period

Definition at line 126 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_getResolution()

IFX_EXTERN float32 IfxGtm_Atom_Timer_getResolution ( IfxGtm_Atom_Timer * driver )

Returns the resolution.

See also
IfxStdIf_Timer_GetResolution
Parameters
driver ATOM Timer interface Handle
Returns
Resolution

Definition at line 138 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_getTrigger()

IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getTrigger ( IfxGtm_Atom_Timer * driver )

Returns the trigger point.

Parameters
driver ATOM Timer interface Handle
Returns
Trigger point

Definition at line 144 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_run()

IFX_EXTERN void IfxGtm_Atom_Timer_run ( IfxGtm_Atom_Timer * driver )

Runs the timer.

See also
IfxStdIf_Timer_Run
Parameters
driver ATOM Timer interface Handle
Returns
None

Definition at line 311 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_setFrequency()

IFX_EXTERN boolean IfxGtm_Atom_Timer_setFrequency | ( | IfxGtm_Atom_Timer * | driver,
 |  | float32 | frequency
 | ) |  |

Sets the frequency.

See also
IfxStdIf_Timer_SetFrequency
Parameters
driver | ATOM Timer interface Handle
frequency | Frequency
Returns
TRUE on success else FALSE

Definition at line 317 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_init(), and IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_setPeriod()

IFX_EXTERN boolean IfxGtm_Atom_Timer_setPeriod | ( | IfxGtm_Atom_Timer * | driver,
 |  | Ifx_TimerValue | period
 | ) |  |

Sets the period for the timer.

See also
IfxStdIf_Timer_SetPeriod
Parameters
driver | ATOM Timer interface Handle
period | Period value
Returns
TRUE on success else FALSE

Definition at line 325 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_setFrequency(), and IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_setSingleMode()

IFX_EXTERN void IfxGtm_Atom_Timer_setSingleMode | ( | IfxGtm_Atom_Timer * | driver,
 |  | boolean | enabled
 | ) |  |

Sets the single shot mode of the timer.

See also
IfxStdIf_Timer_SetSingleMode
Parameters
driver | ATOM Timer interface Handle
enabled | If TRUE, sets the single shot mode
Returns
None

Definition at line 339 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_setTrigger()

IFX_EXTERN void IfxGtm_Atom_Timer_setTrigger | ( | IfxGtm_Atom_Timer * | driver,
 |  | Ifx_TimerValue | triggerPoint
 | ) |  |

Sets the trigger.

See also
IfxStdIf_Timer_SetTrigger
Parameters
driver | ATOM Timer interface Handle
triggerPoint | Trigger point value
Returns
None

Definition at line 345 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_init(), and IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_stdIfTimerInit()

IFX_EXTERN boolean IfxGtm_Atom_Timer_stdIfTimerInit | ( | IfxStdIf_Timer * | stdif,
 |  | IfxGtm_Atom_Timer * | driver
 | ) |  |

Initializes the standard interface timer.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 351 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Timer_stop()

IFX_EXTERN void IfxGtm_Atom_Timer_stop ( IfxGtm_Atom_Timer * driver )

Stops the timer.

See also
IfxStdIf_Timer_Stop
Parameters
driver ATOM Timer interface Handle
Returns
None

Definition at line 381 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_updateInputFrequency()

IFX_EXTERN void IfxGtm_Atom_Timer_updateInputFrequency ( IfxGtm_Atom_Timer * driver )

Updates the input frequency.

See also
IfxStdIf_Timer_UpdateInputFrequency
Parameters
driver ATOM Timer interface Handle
Returns
None

Definition at line 387 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_init(), and IfxGtm_Atom_Timer_stdIfTimerInit().


iLLD_TC26B: Timer Functions

Functions
Timer Functions
iLLD » GTM » Atom Interface Drivers » ATOM Timer Interface Driver
Collaboration diagram for Timer Functions:

Functions

IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getOffset (IfxGtm_Atom_Timer *driver)
Returns the initial timer offset in ticks. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Timer_getPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Timer_getTriggerPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to trigger channel. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_init (IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_initConfig (IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_Timer_getOffset()

IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getOffset ( IfxGtm_Atom_Timer * driver )

Returns the initial timer offset in ticks.

See also
IfxStdIf_Timer_GetOffset
Parameters
driver ATOM Timer interface Handle
Returns
Returns the initial timer offset in ticks

Definition at line 120 of file IfxGtm_Atom_Timer.c.

◆ IfxGtm_Atom_Timer_getPointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_Timer_getPointer ( IfxGtm_Atom_Timer * driver )

Returns the pointer to timer channel.

Parameters
driver ATOM Timer interface Handle
Returns
Pointer

Definition at line 132 of file IfxGtm_Atom_Timer.c.

◆ IfxGtm_Atom_Timer_getTriggerPointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_Timer_getTriggerPointer ( IfxGtm_Atom_Timer * driver )

Returns the pointer to trigger channel.

Parameters
driver ATOM Timer interface Handle
Returns
Pointer

Definition at line 150 of file IfxGtm_Atom_Timer.c.

◆ IfxGtm_Atom_Timer_init()

IFX_EXTERN boolean IfxGtm_Atom_Timer_init | ( | IfxGtm_Atom_Timer * | driver,
 |  | const IfxGtm_Atom_Timer_Config * | config
 | ) |  |

Initialises the timer object.

Parameters
driver | ATOM Timer interface Handle
config | Configuration structure for ATOM Timer
Returns
TRUE on success else FALSE

Definition at line 156 of file IfxGtm_Atom_Timer.c.

◆ IfxGtm_Atom_Timer_initConfig()

IFX_EXTERN void IfxGtm_Atom_Timer_initConfig | ( | IfxGtm_Atom_Timer_Config * | config,
 |  | Ifx_GTM * | gtm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | Configuration structure for ATOM Timer
gtm | Pointer to GTM module
Returns
None

Definition at line 296 of file IfxGtm_Atom_Timer.c.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » GTM » Atom Interface Drivers » ATOM Timer Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Atom_Timer_Base
Structure for the timer base. More...
struct | IfxGtm_Atom_Timer
TOM Timer interface. More...
struct | IfxGtm_Atom_Timer_Config
Configuration structure for TOM Timer. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Atom_Timer_Base

struct IfxGtm_Atom_Timer_Base

Structure for the timer base.

Definition at line 103 of file IfxGtm_Atom_Timer.h.

Data Fields
float32 | clockFreq | Timer input clock frequency (cached value)
IfxStdIf_Timer_CountDir | countDir | Timer counting mode.
Ifx_TimerValue | period | Timer period in ticks (cached value)
boolean | triggerEnabled | If TRUE, the trigger functionality is Initialised.

◆ IfxGtm_Atom_Timer

struct IfxGtm_Atom_Timer

TOM Timer interface.

Definition at line 117 of file IfxGtm_Atom_Timer.h.

Collaboration diagram for IfxGtm_Atom_Timer:
[legend]
Data Fields
Ifx_GTM_ATOM_AGC * | agc | Pointer to the AGC object.
uint32 | agcApplyUpdate | AGC value for apply update.
uint32 | agcDisableUpdate | AGC value for disable update.
Ifx_GTM_ATOM * | atom | ATOM used for the timer functionality.
IfxGtm_Atom | atomIndex | Enum for ATOM objects.
IfxGtm_Atom_Timer_Base | base | Timer base structure.
uint16 | channelsMask | Mask for channels to be modified together.
Ifx_GTM * | gtm | GTM module used for the timer functionality.
Ifx_TimerValue | offset | Timer initial offset in ticks.
IfxGtm_Atom_Ch | timerChannel | ATOM channel used for the timer.
IfxGtm_Atom_Ch | triggerChannel | ATOM channel used for the trigger, if identical to the timerChannel, the trigger interrupt is having the same interrupt level as the timer interrupt.

◆ IfxGtm_Atom_Timer_Config

struct IfxGtm_Atom_Timer_Config

Configuration structure for TOM Timer.

Definition at line 134 of file IfxGtm_Atom_Timer.h.

Collaboration diagram for IfxGtm_Atom_Timer_Config:
[legend]
Data Fields
IfxGtm_Atom | atom | ATOM used for the timer functionality.
IfxStdIf_Timer_Config | base | Standard interface timer configuration.
IfxGtm_Cmu_Clk | clock | Timer input clock.
Ifx_GTM * | gtm | GTM used for the timer functionality.
boolean | initPins | TRUE: Initialize pins in driver FALSE: Don't initialize pins in driver : user handles separately.
IfxGtm_IrqMode | irqModeTimer | Interrupt mode for the timer.
IfxGtm_IrqMode | irqModeTrigger | Interrupt mode for the trigger.
IfxGtm_Atom_Ch | timerChannel | ATOM channel used for the timer.
IfxGtm_Atom_ToutMap * | triggerOut | ATOM channel used for the trigger output, can be identical to the timer channe.


iLLD_TC26B: TOM Interface Drivers

Modules
TOM Interface Drivers
iLLD » GTM
Collaboration diagram for TOM Interface Drivers:

Modules

TOM PWM Interface Driver
TOM PWM HL Interface Driver
TOM Timer Interface Driver

Detailed Description


iLLD_TC26B: TOM PWM Interface Driver

Modules
TOM PWM Interface Driver
iLLD » GTM » TOM Interface Drivers
Collaboration diagram for TOM PWM Interface Driver:

Modules

How to use the GTM TOM PWM Driver
TOM PWM DataStructures
Pwm Functions

Detailed Description


iLLD_TC26B: How to use the GTM TOM PWM Driver

How to use the GTM TOM PWM Driver
iLLD » GTM » TOM Interface Drivers » TOM PWM Interface Driver
Collaboration diagram for How to use the GTM TOM PWM Driver:

This interface allows to generate simple PWM signal on a TOM out put and can generate interrupts if enabled. this output can also be routed to port pin if required.

Preparation

Include Files

Include following header file into your C code:

#include <Gtm/Tom/Pwm/IfxGtm_Tom_Pwm.h>

Variables

define global variables if necessary

Ifx_GTM *gtm = &MODULE_GTM;
#define TOM0_CH0_PRIO 10

Interrupts

define Interrupts if needed

IFX_INTERRUPT(TOM0Ch0_ISR, 0, TOM0_CH0_PRIO)
{}

Initialization

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler (TOM0Ch0_ISR, TOM0_CH0_PRIO);
// enable GTM clock
{
float32 frequency = IfxGtm_Cmu_getModuleFrequency(gtm);
// Enables the GTM
IfxGtm_enable(gtm);
// Set the global clock frequency to the max
IfxGtm_Cmu_setGclkFrequency(gtm, frequency);
// Set the CMU CLK0
IfxGtm_Cmu_setClkFrequency(gtm, IfxGtm_Cmu_Clk_0, frequency);
// FXCLK: used by TOM and CLK0: used by ATOM
IfxGtm_Cmu_enableClocks(gtm, IFXGTM_CMU_CLKEN_FXCLK | IFXGTM_CMU_CLKEN_CLK0);
}
// initialise TOM
IfxGtm_Tom_Pwm_Config tomConfig; \\configuration structure
IfxGtm_Tom_Pwm_Driver tomHandle; \\ handle
IfxGtm_Tom_Pwm_initConfig(&tomConfig, gtm);
tomConfig.tomChannel = IfxGtm_Tom_Ch_0;
tomConfig.period = 20;
tomConfig.dutyCycle = 10;
tomConfig.interrupt.ccu0Enabled = TRUE;
tomConfig.interrupt.isrPriority = TOM0_CH0_PRIO;
tomConfig.pin.outputPin = &IfxGtm_TOM0_0_TOUT106_P10_4_OUT;
IfxGtm_Tom_Pwm_init(&tomHandle, &tomConfig);

TOM will be now generating a PWM signal on the selected port pin while generating selected interrupt according to above configured period and duty cycle.


iLLD_TC26B: TOM PWM DataStructures

Data Structures
TOM PWM DataStructures
iLLD » GTM » TOM Interface Drivers » TOM PWM Interface Driver
Collaboration diagram for TOM PWM DataStructures:

Data Structures

struct | IfxGtm_Tom_Pwm_Interrupt
configuration structure for interrupts More...
struct | IfxGtm_Tom_Pwm_Config
Configuration structure. More...
struct | IfxGtm_Tom_Pwm_Driver
Driver Handle. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tom_Pwm_Interrupt

struct IfxGtm_Tom_Pwm_Interrupt

configuration structure for interrupts

Definition at line 136 of file IfxGtm_Tom_Pwm.h.

Data Fields
boolean | ccu0Enabled | Enable/Disable choice for CCU0 trigger interrupt.
boolean | ccu1Enabled | Enable/Disable choice for CCU1 trigger interrupt.
Ifx_Priority | isrPriority | Priority for Ccu0/1 interrupt.
IfxSrc_Tos | isrProvider | Type of Service for Ccu0/1 interrupt.
IfxGtm_IrqMode | mode | IRQ mode of interrupt.

◆ IfxGtm_Tom_Pwm_Config

struct IfxGtm_Tom_Pwm_Config

Configuration structure.

Definition at line 160 of file IfxGtm_Tom_Pwm.h.

Collaboration diagram for IfxGtm_Tom_Pwm_Config:
[legend]
Data Fields
IfxGtm_Tom_Ch_ClkSrc | clock | Timer input clock.
uint32 | dutyCycle | Duty Cycle.
Ifx_GTM * | gtm | Pointer to GTM module.
boolean | immediateStartEnabled | enable/disable immediate start of PWM
IfxGtm_Tom_Pwm_Interrupt | interrupt | configuration structure for interrupt
boolean | oneShotModeEnabled | Enable/Disable the one shot mode.
uint32 | period | Period.
IfxGtm_Tom_Pwm_pin | pin | configuration structure for output pin
Ifx_ActiveState | signalLevel | Signal Level.
boolean | synchronousUpdateEnabled | Synchronous or Asynchronous update.
IfxGtm_Tom | tom | Index of the TOM object used.
IfxGtm_Tom_Ch | tomChannel | TOM channel used for the timer.

◆ IfxGtm_Tom_Pwm_Driver

struct IfxGtm_Tom_Pwm_Driver

Driver Handle.

Definition at line 178 of file IfxGtm_Tom_Pwm.h.

Data Fields
Ifx_GTM * | gtm | Pointer to GTM module.
Ifx_GTM_TOM_TGC * | tgc[2] | Pointer to the TGC object.
Ifx_GTM_TOM * | tom | Pointer to the TOM object.
IfxGtm_Tom_Ch | tomChannel | TOM channel used for the timer.
IfxGtm_Tom | tomIndex | Index of the TOM object used.


iLLD_TC26B: Pwm Functions

Functions
Pwm Functions
iLLD » GTM » TOM Interface Drivers » TOM PWM Interface Driver
Collaboration diagram for Pwm Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Tom_Pwm_init (IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
Initialises the Timer object. More...
IFX_EXTERN void | IfxGtm_Tom_Pwm_initConfig (IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_Pwm_init()

IFX_EXTERN boolean IfxGtm_Tom_Pwm_init | ( | IfxGtm_Tom_Pwm_Driver * | driver,
 |  | const IfxGtm_Tom_Pwm_Config * | config
 | ) |  |

Initialises the Timer object.

Parameters
driver | TOM Handle
config | Configuration structure for TOM Timer
Returns
TRUE on success else FALSE

Definition at line 52 of file IfxGtm_Tom_Pwm.c.

◆ IfxGtm_Tom_Pwm_initConfig()

IFX_EXTERN void IfxGtm_Tom_Pwm_initConfig | ( | IfxGtm_Tom_Pwm_Config * | config,
 |  | Ifx_GTM * | gtm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | This parameter is Initialised by the function
gtm | Pointer to GTM module
Returns
None

Definition at line 126 of file IfxGtm_Tom_Pwm.c.


iLLD_TC26B: TOM PWM HL Interface Driver

Modules
TOM PWM HL Interface Driver
iLLD » GTM » TOM Interface Drivers
Collaboration diagram for TOM PWM HL Interface Driver:

Modules

How to use the GTM TOM PWM Driver
Data Structures
PwmHl Functions
PwmHl StdIf Functions

Detailed Description


iLLD_TC26B: How to use the GTM TOM PWM Driver

How to use the GTM TOM PWM Driver
iLLD » GTM » TOM Interface Drivers » TOM PWM HL Interface Driver
Collaboration diagram for How to use the GTM TOM PWM Driver:

This driver implements the PWM functionalities as defined by Standard interface: Multi-channels, dual-complementary PWM interface. The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

The PWM driver is a concatenation of a timer with additional PWM generation cells.

The timer is implemented as described in TOM Timer Interface Driver, it generate an internal trigger that is used to synchronize all the TOM channel used (shown in red in the pictures below).

The picture below presents two configuration examples:

  • On the left, the timer and trigger are generated using the same TOM channel CH0. The 3 dual-complementary PWMs, CCx and COUTx, are generated using 6 additional TOM channels (CH1 to Ch6).
  • On the right, the timer and the trigger uses separate TOM channels to allow the triggering of the ADC conversions. The order of the CCx and COUTx has been allocated freely between CH9 up to CH14.
PWM implementations on GTM TOM

Each of the TOM channel used for the generation of the CCx and COUTx signals are configured as in the figure below:

TOM channel configuration

.

The internal trigger (red line) is generated by the timer on timer rest and used by the TOM PWM channels to reset the counters CN0 and transfer the shadow values saved in SR0 and SR1 to the CM0 and CM1 registers. When the counter CN0 reach the values of the CM0 or CM1 compare registers, a rising or falling edge is generated on the output PWM signal. The signal active state configuration define which of the CM0 or CM1 is generating the falling or rising edge.

This trigger mechanism ensure that all the PWM channels, period and trigger are updated at the exact same time, avoiding any possibility for glitch or incoherent signals.

The clock use is the same as the timer clock.

In order to ensure a coherent update of all registers, the internal trigger must be disable before updating the timer, trigger and PWM duty cycles shadow values, and enabled once the update is done. The transfer will ocucrs at the next timer reset.

Features

  • This implementation allows from 1 up to 3 dual-complementary PWM channels.
  • Resources used:
    • Additionally to the linked timer resources used, the following resources are used:
      • 2 TOM channels per PWM channels
    • All TOM channels used must be own by the same TOM and TGC as for the linked timer
  • The TOM channel used for the timer must always have a lower index than the TOM channels used for the pwm.
  • All TOM channels used (including the timer and the trigger) must be contiguous but the order of the TOM channels is free.

For a detailed configuration of the microcontroller, see IfxGtm_Tom_PwmHl_init().

Usage Example

Initialisation is done by, e.g:

IfxGtm_Tom_PwmHl_Config driverConfig;
IfxGtm_Tom_PwmHl driverData;
IfxStdIf_PwmHl pwmhl;
IfxGtm_Tom_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
IfxGtm_Tom_PwmHl_init(&driverData, &driverConfig);
IfxGtm_Tom_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);

During run-time, the interface functions shall be used, e.g.:

IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
Ifx_TimerValue onTime[3]; // assume configured for three HL channels
onTime[0] = 10;
onTime[1] = 20;
onTime[2] = 30;
IfxStdIf_Timer_disableUpdate(timer);
IfxStdIf_Timer_setPeriod(timer, period);
IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
IfxStdIf_Timer_applyUpdate(timer);


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » GTM » TOM Interface Drivers » TOM PWM HL Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Tom_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxGtm_Tom_PwmHl_Config
GTM TOM: PWM HL configuration. More...
struct | IfxGtm_Tom_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxGtm_Tom_PwmHl_s
GTM TOM PWM driver. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tom_PwmHl_Base

struct IfxGtm_Tom_PwmHl_Base

Multi-channels PWM object definition (channels only)

Definition at line 168 of file IfxGtm_Tom_PwmHl.h.

Data Fields
Ifx_ActiveState | ccxActiveState | Top PWM active state.
uint8 | channelCount | Number of PWM channels, one channel is made of a top and bottom channel.
Ifx_ActiveState | coutxActiveState | Bottom PWM active state.
Ifx_TimerValue | deadtime | Dead time between the top and bottom channel in ticks.
boolean | inverted | Flag indicating the center aligned inverted mode (TRUE)
Ifx_TimerValue | maxPulse | internal parameter
Ifx_TimerValue | minPulse | minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Ifx_Pwm_Mode | mode | actual PWM mode
sint8 | setMode | A non zero flag indicates that the PWM mode is being modified.

◆ IfxGtm_Tom_PwmHl_Config

struct IfxGtm_Tom_PwmHl_Config

GTM TOM: PWM HL configuration.

Definition at line 187 of file IfxGtm_Tom_PwmHl.h.

Collaboration diagram for IfxGtm_Tom_PwmHl_Config:
[legend]
Data Fields
IfxStdIf_PwmHl_Config | base | PWM HL standard interface configuration.
IFX_CONST IfxGtm_Tom_ToutMapP * | ccx | Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for ccx and coutx must be adjacent to the channel used for the timer, order is not important.
IFX_CONST IfxGtm_Tom_ToutMapP * | coutx | Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for ccx and coutx must be adjacent to the channel used for the timer, order is not important.
boolean | initPins | TRUE: Initialize pins in driver FALSE: Don't initialize pins in driver: user handles separately.
IfxGtm_Tom_Timer * | timer | Pointer to the linked timer object.
IfxGtm_Tom | tom | TOM unit used.

◆ IfxGtm_Tom_PwmHl_Mode

struct IfxGtm_Tom_PwmHl_Mode

Structure for PWM configuration.

Definition at line 200 of file IfxGtm_Tom_PwmHl.h.

Collaboration diagram for IfxGtm_Tom_PwmHl_Mode:
[legend]
Data Fields
boolean | inverted | Inverted configuration for the selected mode.
Ifx_Pwm_Mode | mode | Pwm Mode.
IfxGtm_Tom_PwmHl_Update | update | update call back function for the selected mode
IfxGtm_Tom_PwmHl_UpdateShift | updateAndShift | update shift call back function for the selected mode
IfxGtm_Tom_PwmHl_UpdatePulse | updatePulse | update pulse call back function for the selected mode

◆ IfxGtm_Tom_PwmHl_s

struct IfxGtm_Tom_PwmHl_s

GTM TOM PWM driver.

Definition at line 211 of file IfxGtm_Tom_PwmHl.h.

Collaboration diagram for IfxGtm_Tom_PwmHl_s:
[legend]
Data Fields
IfxGtm_Tom_PwmHl_Base | base | Multi-channels PWM object definition (channels only)
IfxGtm_Tom_Ch | ccx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS] | TOM channels used for the CCCX outputs.
IfxGtm_Tom_Ch * | ccxTemp | cached value
IfxGtm_Tom_Ch | coutx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS] | TOM channels used for the OUTX outputs.
IfxGtm_Tom_Ch * | coutxTemp | cached value
Ifx_GTM_TOM_TGC * | tgc | TGC unit used.
IfxGtm_Tom_Timer * | timer | Pointer to the linked timer object.
Ifx_GTM_TOM * | tom | TOM unit used.
IfxGtm_Tom_PwmHl_Update | update | Update function for actual selected mode.
IfxGtm_Tom_PwmHl_UpdateShift | updateAndShift | Update shift function for actual selected mode.
IfxGtm_Tom_PwmHl_UpdatePulse | updatePulse | Update pulse function for actual selected mode.


iLLD_TC26B: PwmHl Functions

Functions
PwmHl Functions
iLLD » GTM » TOM Interface Drivers » TOM PWM HL Interface Driver
Collaboration diagram for PwmHl Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_init (IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. Note: all PWM channels must use the same TGC Note: the current implementation must use the same TGC for the timer and PWM channels. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_initConfig (IfxGtm_Tom_PwmHl_Config *config)
Initialize the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_PwmHl_init()

IFX_EXTERN boolean IfxGtm_Tom_PwmHl_init | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | const IfxGtm_Tom_PwmHl_Config * | config
 | ) |  |

Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. Note: all PWM channels must use the same TGC Note: the current implementation must use the same TGC for the timer and PWM channels.

Parameters
driver | GTM TOM PWM driver
config | GTM TOM: PWM HL configuration
Returns
TRUE on success else FALSE

Definition at line 166 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_initConfig()

IFX_EXTERN void IfxGtm_Tom_PwmHl_initConfig ( IfxGtm_Tom_PwmHl_Config * config )

Initialize the configuration structure to default.

Parameters
config Channel configuration. This parameter is Initialised by the function
Returns
None

Definition at line 289 of file IfxGtm_Tom_PwmHl.c.


iLLD_TC26B: PwmHl StdIf Functions

Functions
PwmHl StdIf Functions
iLLD » GTM » TOM Interface Drivers » TOM PWM HL Interface Driver
Collaboration diagram for PwmHl StdIf Functions:

Functions

IFX_INLINE Ifx_ActiveState | IfxGtm_Tom_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateAndShiftOff (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateCenterAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateEdgeAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateOff (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updatePulse (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updatePulseOff (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateShiftCenterAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned. More...
IFX_EXTERN float32 | IfxGtm_Tom_PwmHl_getDeadtime (IfxGtm_Tom_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxGtm_Tom_PwmHl_getMinPulse (IfxGtm_Tom_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxGtm_Tom_PwmHl_getMode (IfxGtm_Tom_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setDeadtime (IfxGtm_Tom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setMinPulse (IfxGtm_Tom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setMode (IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setOnTime (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setOnTimeAndShift (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setPulse (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setupChannels (IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_PwmHl_getDeadtime()

IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getDeadtime ( IfxGtm_Tom_PwmHl * driver )

Returns the dead time.

See also
IfxStdIf_PwmHl_GetDeadtime
Parameters
driver GTM TOM PWM driver
Returns
Dead Time

Definition at line 148 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_getMinPulse()

IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getMinPulse ( IfxGtm_Tom_PwmHl * driver )

Returns the minimum pulse.

See also
IfxStdIf_PwmHl_GetMinPulse
Parameters
driver GTM TOM PWM driver
Returns
Min Pulse

Definition at line 154 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_getMode()

IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Tom_PwmHl_getMode ( IfxGtm_Tom_PwmHl * driver )

Returns Pwm mode.

See also
IfxStdIf_PwmHl_GetMode
Parameters
driver GTM TOM PWM driver
Returns
Pwm mode

Definition at line 160 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_invertActiveState()

IFX_INLINE Ifx_ActiveState IfxGtm_Tom_PwmHl_invertActiveState ( Ifx_ActiveState activeState )

Inverts the active state.

Parameters
activeState Active state
Returns
State

Definition at line 138 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_PwmHl_setMode().

◆ IfxGtm_Tom_PwmHl_setDeadtime()

IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setDeadtime | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | float32 | deadtime
 | ) |  |

Sets the dead time.

See also
IfxStdIf_PwmHl_setDeadtime
Parameters
driver | GTM TOM PWM driver
deadtime | Dead time value
Returns
TRUE on success else FALSE

Definition at line 300 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setMinPulse()

IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMinPulse | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | float32 | minPulse
 | ) |  |

Sets the minimum pulse.

See also
IfxStdIf_PwmHl_setMinPulse
Parameters
driver | GTM TOM PWM driver
minPulse | Minimum pulse
Returns
TRUE on success else FALSE

Definition at line 309 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setMode()

IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMode | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_Pwm_Mode | mode
 | ) |  |

Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()

See also
IfxStdIf_PwmHl_SetMode
Parameters
driver | GTM TOM PWM driver
mode | Pwm mode
Returns
TRUE on success else FALSE
Note
that changing signal level may produce short circuit at the power stage, in which case the inverter must be disable during this action.

Definition at line 320 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setOnTime()

IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTime | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Sets the ON time.

See also
IfxStdIf_PwmHl_SetOnTime
Parameters
driver | GTM TOM PWM driver
tOn | ON time
Returns
None

Definition at line 389 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setOnTimeAndShift()

IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTimeAndShift | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets the ON time and Shift.

Parameters
driver | GTM TOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 395 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setPulse()

IFX_EXTERN void IfxGtm_Tom_PwmHl_setPulse | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Sets the ON time and offset, all switched are independent.

Parameters
driver | GTM TOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 401 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setupChannels()

IFX_EXTERN void IfxGtm_Tom_PwmHl_setupChannels | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | boolean * | activeCh,
 |  | boolean * | stuckSt
 | ) |  |

Set up channels.

See also
IfxStdIf_PwmHl_SetupChannels
Parameters
driver | GTM TOM PWM driver
activeCh | Active channel
stuckSt | Stuck state
Returns
None

Definition at line 407 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_stdIfPwmHlInit()

IFX_EXTERN boolean IfxGtm_Tom_PwmHl_stdIfPwmHlInit | ( | IfxStdIf_PwmHl * | stdif,
 |  | IfxGtm_Tom_PwmHl * | driver
 | ) |  |

Initialises the statndard interface Pwm.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 416 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updateAndShiftOff()

IFX_STATIC void IfxGtm_Tom_PwmHl_updateAndShiftOff | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets switched to OFF.

Parameters
driver | GTM TOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 441 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updateCenterAligned()

IFX_STATIC void IfxGtm_Tom_PwmHl_updateCenterAligned | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in center aligned and center aligned inverted modes.

Parameters
driver | GTM TOM PWM driver
tOn | T on
Returns
None

Definition at line 450 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updateEdgeAligned()

IFX_STATIC void IfxGtm_Tom_PwmHl_updateEdgeAligned | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in edge aligned modes (left and right aligned)

Parameters
driver | GTM TOM PWM driver
tOn | T on
Returns
None

Definition at line 510 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updateOff()

IFX_STATIC void IfxGtm_Tom_PwmHl_updateOff | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Set the outputs to inactive.

Parameters
driver | GTM TOM PWM driver
tOn | T on
Returns
None

Definition at line 570 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_updateAndShiftOff(), and IfxGtm_Tom_PwmHl_updatePulseOff().

◆ IfxGtm_Tom_PwmHl_updatePulse()

IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulse | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Update Pulse.

Parameters
driver | GTM TOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 587 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updatePulseOff()

IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulseOff | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Set Pulse to OFF.

Parameters
driver | GTM TOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 694 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updateShiftCenterAligned()

IFX_STATIC void IfxGtm_Tom_PwmHl_updateShiftCenterAligned | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Update Shift Center Aligned.

Parameters
driver | GTM TOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 702 of file IfxGtm_Tom_PwmHl.c.


iLLD_TC26B: TOM Timer Interface Driver

Modules
TOM Timer Interface Driver
iLLD » GTM » TOM Interface Drivers
Collaboration diagram for TOM Timer Interface Driver:

Modules

How to use the GTM TOM Timer Driver
Data Structures
Timer Functions
Timer StdIf Functions

Detailed Description


iLLD_TC26B: How to use the GTM TOM Timer Driver

How to use the GTM TOM Timer Driver
iLLD » GTM » TOM Interface Drivers » TOM Timer Interface Driver
Collaboration diagram for How to use the GTM TOM Timer Driver:

This driver implements the timer functionalities as defined by Standard interface: Timer. The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

The timer fucntinality is implemented using either a single or 2 TOM channels. The dicision to use 1 or 2 channels is done depending on the following requirements:

  • relative position of the timer channel to the other channels used if any
  • need to trigger an other module, for example ADC triggering.

The figure below show how the TOM is configured when a single TOM channel is used for the timer and trigger functinalities. The internal trigger signal (red line) is generated when the counter CN0 reach the CM0 compare register. The value of CM0 act as the period value. This internal trigger is used to reset the CN0 counter and simultaneously transfer the shadow values for the period value (SR0->CM0) and trigger edge (SR1->CM1). The internal trigger is used as a trigger input to the next TOM channel. The trigger signal (output trigger) is generated by the CM0 and CM1 compare values. Depending on the trigger signal active edge configuiration, the CM0 will reset, and the CM1 will set the trigger signal, or vice versa.

Timer using one signle TOM channel

In case 2 TOM channels are used for the timer and trigger functionalities, the 1st channel (CHz in the figure below) is used for the generation of the period, and the 2nd channel (CHz+n the below figure, the figure shows n=1 as example) is used for the trigger generation.

The CHz TOM channel generates the internal trigger signal (red line) when the counter CN0 reach the CM0 compare register. The value of CM0 of CHz act as the period value. This internal trigger is used to reset the CN0 counter and simultaneously transfer the shadow period value (SR0->CM0). The internal trigger is used as an input for the next TOM channel.

The CHz+n TOM channel, uses the internal trigger signal to simultaneously resets the counter CN0, and transfer the shadow values used for the generation of the trigger falling and rising edges (SR0->CM0 and SR1->CM1). The internal trigger is used as a trigger input to the next TOM channel. Depending on the trigger signal active edge configuiration, the CM0 will reset, and the CM1 will set the trigger signal, or vice versa. In orter to have a similar behaviour to the single channel implementation, the CM0 is set to the same value as CHz CM0, and CM1 is used for the trigger edge.

Timer using two different TOM channels for the timer and the trigger

In order to ensure a coherent update of all registers, the internal trigger must be disable before updating the timer and trigger shadow values, and enabled once the update is done. The transfer will ocucrs at the next timer reset.

  • Resources used:
    • if the trigger channel is identical to the timer channel, only one TOM channels is used
    • if the trigger channel is different from the timer channel, 2 TOM channels are used
    • All channels used must be own by the same TOM and TOM TGC
  • The timer counting direction is limited to IfxStdIf_Timer_CountDir_up
  • If the TOM trigger channel is not the same as the TOM timer channels
    • The TOM channel used for the trigger must have a lower index than the TOM channels used for the timer.
    • the TOM channels must be contiguous, unless specified by the driver using the timer driver.

Note: the timer and trigger must bepart of the same TGC, but PWM channels can be of different TGC of the same TOM as the timer

For a detailed configuration of the microcontroller, see IfxGtm_Tom_Timer_init().

Usage Example

Initialisation:

IfxGtm_Tom_Timer_Config driverConfig;
IfxGtm_Tom_Timer driverData;
IfxStdIf_Timer timer;
IfxGtm_Tom_Timer_initConfig(&driverConfig, &MODULE_GTM);
IfxGtm_Tom_Timer_init (&driverData, &driverConfig);
boolean IfxGtm_Tom_Timer_stdIfTimerInit(&timer, &driverData);

During run-time, the interface functions should be used:

IfxStdIf_Timer_run(timer);
IfxStdIf_Timer_disableUpdate(timer);
IfxStdIf_Timer_setPeriod(timer, period);
IfxStdIf_Timer_applyUpdate(timer);


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » GTM » TOM Interface Drivers » TOM Timer Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Tom_Timer_Base
Structure for the timer base. More...
struct | IfxGtm_Tom_Timer
TOM Timer interface Handle. More...
struct | IfxGtm_Tom_Timer_Config
Configuration structure for TOM Timer. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tom_Timer_Base

struct IfxGtm_Tom_Timer_Base

Structure for the timer base.

Definition at line 146 of file IfxGtm_Tom_Timer.h.

Data Fields
float32 | clockFreq | Timer input clock frequency (cached value)
IfxStdIf_Timer_CountDir | countDir | Timer counting mode.
Ifx_TimerValue | period | Timer period in ticks (cached value)
boolean | triggerEnabled | If TRUE, the trigger functionality is Initialised.

◆ IfxGtm_Tom_Timer

struct IfxGtm_Tom_Timer

TOM Timer interface Handle.

Definition at line 160 of file IfxGtm_Tom_Timer.h.

Collaboration diagram for IfxGtm_Tom_Timer:
[legend]
Data Fields
IfxGtm_Tom_Timer_Base | base | Timer base structure.
uint16 | channelsMask[2] | Mask for channels to be modified together, The 1st value corresponds to the Timer's TGC, the 2nd value corresponds to the timer's next TGC if any.
Ifx_GTM * | gtm | Pointer to GTM module.
Ifx_TimerValue | offset | Timer initial offset in ticks.
Ifx_GTM_TOM_TGC * | tgc[2] | Pointer to the TGC object.
uint32 | tgcGlobalControlApplyUpdate[2] | Cached value for TGC GLOB_CTR.
uint32 | tgcGlobalControlDisableUpdate[2] | Cached value for TGC GLOB_CTR.
IfxGtm_Tom_Ch | timerChannel | TOM channel used for the timer.
Ifx_GTM_TOM * | tom | Pointer to the TOM object.
IfxGtm_Tom | tomIndex | Enum for TOM objects.
IfxGtm_Tom_Ch | triggerChannel | TOM channel used for the trigger, can be identical to the timer channel.

◆ IfxGtm_Tom_Timer_Config

struct IfxGtm_Tom_Timer_Config

Configuration structure for TOM Timer.

Definition at line 177 of file IfxGtm_Tom_Timer.h.

Collaboration diagram for IfxGtm_Tom_Timer_Config:
[legend]
Data Fields
IfxStdIf_Timer_Config | base | Standard interface timer configuration.
IfxGtm_Tom_Ch_ClkSrc | clock | Timer input clock.
Ifx_GTM * | gtm | Pointer to GTM module.
boolean | initPins | TRUE : Initialize pins in driver. FALSE: Don't initialize pins : handled separately by user.
IfxGtm_IrqMode | irqModeTimer | Interrupt mode for the timer.
IfxGtm_IrqMode | irqModeTrigger | Interrupt mode for the trigger.
IfxGtm_Tom_Ch | timerChannel | TOM channel used for the timer.
IfxGtm_Tom | tom | Index of the TOM object used.
IfxGtm_Tom_ToutMap * | triggerOut | TOM channel used for the trigger output, can be identical to the timer channel.


iLLD_TC26B: Timer Functions

Functions
Timer Functions
iLLD » GTM » TOM Interface Drivers » TOM Timer Interface Driver
Collaboration diagram for Timer Functions:

Functions

IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getOffset (IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Timer_getPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Timer_getTriggerPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to trigger channel. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_init (IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_initConfig (IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_Timer_getOffset()

IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getOffset ( IfxGtm_Tom_Timer * driver )

Returns the initial timer offset in ticks.

Parameters
driver TOM Timer interface Handle
Returns
Returns the initial timer offset in ticks

Definition at line 150 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_PwmHl_init().

◆ IfxGtm_Tom_Timer_getPointer()

IFX_EXTERN volatile uint32* IfxGtm_Tom_Timer_getPointer ( IfxGtm_Tom_Timer * driver )

Returns the pointer to timer channel.

Parameters
driver TOM Timer interface Handle
Returns
Pointer

Definition at line 162 of file IfxGtm_Tom_Timer.c.

◆ IfxGtm_Tom_Timer_getTriggerPointer()

IFX_EXTERN volatile uint32* IfxGtm_Tom_Timer_getTriggerPointer ( IfxGtm_Tom_Timer * driver )

Returns the pointer to trigger channel.

Parameters
driver TOM Timer interface Handle
Returns
Pointer

Definition at line 180 of file IfxGtm_Tom_Timer.c.

◆ IfxGtm_Tom_Timer_init()

IFX_EXTERN boolean IfxGtm_Tom_Timer_init | ( | IfxGtm_Tom_Timer * | driver,
 |  | const IfxGtm_Tom_Timer_Config * | config
 | ) |  |

Initialises the timer object.

Parameters
driver | TOM Timer interface Handle
config | Configuration structure for TOM Timer
Returns
TRUE on success else FALSE

Definition at line 186 of file IfxGtm_Tom_Timer.c.

◆ IfxGtm_Tom_Timer_initConfig()

IFX_EXTERN void IfxGtm_Tom_Timer_initConfig | ( | IfxGtm_Tom_Timer_Config * | config,
 |  | Ifx_GTM * | gtm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | This parameter is Initialised by the function
gtm | Pointer to GTM module
Returns
None

Definition at line 341 of file IfxGtm_Tom_Timer.c.


iLLD_TC26B: Timer StdIf Functions

Functions
Timer StdIf Functions
iLLD » GTM » TOM Interface Drivers » TOM Timer Interface Driver
Collaboration diagram for Timer StdIf Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Tom_Timer_acknowledgeTimerIrq (IfxGtm_Tom_Timer *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_acknowledgeTriggerIrq (IfxGtm_Tom_Timer *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_addToChannelMask (IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_applyUpdate (IfxGtm_Tom_Timer *driver)
Enables the transfer of the shadow registers. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_disableUpdate (IfxGtm_Tom_Timer *driver)
Disables the upadte. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getFrequency (IfxGtm_Tom_Timer *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getInputFrequency (IfxGtm_Tom_Timer *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getPeriod (IfxGtm_Tom_Timer *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getResolution (IfxGtm_Tom_Timer *driver)
Returns the resolution. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getTrigger (IfxGtm_Tom_Timer *driver)
Returns the trigger point. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_run (IfxGtm_Tom_Timer *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_setFrequency (IfxGtm_Tom_Timer *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_setPeriod (IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_setSingleMode (IfxGtm_Tom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_setTrigger (IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_stop (IfxGtm_Tom_Timer *driver)
Stops the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_updateInputFrequency (IfxGtm_Tom_Timer *driver)
Updates the input frequency. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_Timer_acknowledgeTimerIrq()

IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTimerIrq ( IfxGtm_Tom_Timer * driver )

Returns the timer event.

See also
IfxStdIf_Timer_AckTimerIrq
Parameters
driver TOM Timer interface Handle
Returns
Timer event

Definition at line 56 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_acknowledgeTriggerIrq()

IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTriggerIrq ( IfxGtm_Tom_Timer * driver )

Returns the trigger event.

See also
IfxStdIf_Timer_AckTriggerIrq
Parameters
driver TOM Timer interface Handle
Returns
Trigger event

Definition at line 73 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_addToChannelMask()

IFX_EXTERN void IfxGtm_Tom_Timer_addToChannelMask | ( | IfxGtm_Tom_Timer * | driver,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run.

Parameters
driver | TOM Timer interface Handle
channel | Channel to ba added to the mask
Returns
None

Definition at line 90 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Timer_applyUpdate()

IFX_EXTERN void IfxGtm_Tom_Timer_applyUpdate ( IfxGtm_Tom_Timer * driver )

Enables the transfer of the shadow registers.

See also
IfxStdIf_Timer_ApplyUpdate Specific implementation: Enable the transfer of the shadow registers
Parameters
driver TOM Timer interface Handle
Returns
None

Definition at line 116 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_disableUpdate()

IFX_EXTERN void IfxGtm_Tom_Timer_disableUpdate ( IfxGtm_Tom_Timer * driver )

Disables the upadte.

See also
IfxStdIf_Timer_DisableUpdate Specific implementation: Disable the transfer of the shadow registers
Parameters
driver TOM Timer interface Handle
Returns
None

Definition at line 127 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_getFrequency()

IFX_EXTERN float32 IfxGtm_Tom_Timer_getFrequency ( IfxGtm_Tom_Timer * driver )

Returns the frequency.

See also
IfxStdIf_Timer_GetFrequency
Parameters
driver TOM Timer interface Handle
Returns
Frequency

Definition at line 138 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_getInputFrequency()

IFX_EXTERN float32 IfxGtm_Tom_Timer_getInputFrequency ( IfxGtm_Tom_Timer * driver )

Returns the Input frequncy.

Parameters
driver TOM Timer interface Handle
Returns
Frequency

Definition at line 144 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_getPeriod()

IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getPeriod ( IfxGtm_Tom_Timer * driver )

Returns the period of the timer.

See also
IfxStdIf_Timer_GetPeriod
Parameters
driver TOM Timer interface Handle
Returns
Period

Definition at line 156 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_getResolution()

IFX_EXTERN float32 IfxGtm_Tom_Timer_getResolution ( IfxGtm_Tom_Timer * driver )

Returns the resolution.

See also
IfxStdIf_Timer_GetResolution
Parameters
driver TOM Timer interface Handle
Returns
Resolution

Definition at line 168 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_getTrigger()

IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getTrigger ( IfxGtm_Tom_Timer * driver )

Returns the trigger point.

Parameters
driver TOM Timer interface Handle
Returns
Trigger point

Definition at line 174 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_run()

IFX_EXTERN void IfxGtm_Tom_Timer_run ( IfxGtm_Tom_Timer * driver )

Runs the timer.

See also
IfxStdIf_Timer_Run
Parameters
driver TOM Timer interface Handle
Returns
None

Definition at line 356 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_setFrequency()

IFX_EXTERN boolean IfxGtm_Tom_Timer_setFrequency | ( | IfxGtm_Tom_Timer * | driver,
 |  | float32 | frequency
 | ) |  |

Sets the frequency.

See also
IfxStdIf_Timer_SetFrequency
Parameters
driver | TOM Timer interface Handle
frequency | Frequency
Returns
TRUE on success else FALSE

Definition at line 367 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_init(), and IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_setPeriod()

IFX_EXTERN boolean IfxGtm_Tom_Timer_setPeriod | ( | IfxGtm_Tom_Timer * | driver,
 |  | Ifx_TimerValue | period
 | ) |  |

Sets the period for the timer.

See also
IfxStdIf_Timer_SetPeriod
Parameters
driver | TOM Timer interface Handle
period | Period value
Returns
TRUE on success else FALSE

Definition at line 375 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_setFrequency(), and IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_setSingleMode()

IFX_EXTERN void IfxGtm_Tom_Timer_setSingleMode | ( | IfxGtm_Tom_Timer * | driver,
 |  | boolean | enabled
 | ) |  |

Sets the single shot mode of the timer.

See also
IfxStdIf_Timer_SetSingleMode
Parameters
driver | TOM Timer interface Handle
enabled | If TRUE, sets the single shot mode
Returns
None

Definition at line 389 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_setTrigger()

IFX_EXTERN void IfxGtm_Tom_Timer_setTrigger | ( | IfxGtm_Tom_Timer * | driver,
 |  | Ifx_TimerValue | triggerPoint
 | ) |  |

Sets the trigger.

See also
IfxStdIf_Timer_SetTrigger
Parameters
driver | TOM Timer interface Handle
triggerPoint | Trigger point value
Returns
None

Definition at line 395 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_init(), and IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_stdIfTimerInit()

IFX_EXTERN boolean IfxGtm_Tom_Timer_stdIfTimerInit | ( | IfxStdIf_Timer * | stdif,
 |  | IfxGtm_Tom_Timer * | driver
 | ) |  |

Initializes the standard interface timer.

Parameters
stdif | Standard interface timer object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 401 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Timer_stop()

IFX_EXTERN void IfxGtm_Tom_Timer_stop ( IfxGtm_Tom_Timer * driver )

Stops the timer.

See also
IfxStdIf_Timer_Stop
Parameters
driver TOM Timer interface Handle
Returns
None

Definition at line 431 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_updateInputFrequency()

IFX_EXTERN void IfxGtm_Tom_Timer_updateInputFrequency ( IfxGtm_Tom_Timer * driver )

Updates the input frequency.

See also
IfxStdIf_Timer_UpdateInputFrequency
Parameters
driver TOM Timer interface Handle
Returns
None

Definition at line 442 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_init(), and IfxGtm_Tom_Timer_stdIfTimerInit().


iLLD_TC26B: Tim Interface Drivers

Modules
Tim Interface Drivers
iLLD » GTM
Collaboration diagram for Tim Interface Drivers:

Modules

TIM Input Interface

Detailed Description


iLLD_TC26B: TIM Input Interface

Modules
TIM Input Interface
iLLD » GTM » Tim Interface Drivers
Collaboration diagram for TIM Input Interface:

Modules

Data Structures
Enumerations
Funtions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » GTM » Tim Interface Drivers » TIM Input Interface
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Tim_In_ConfigCapture
Configuration structure for TIM capture. More...
struct | IfxGtm_Tim_In_ConfigFilter
Configuration structure for TIM filter. More...
struct | IfxGtm_Tim_In_ConfigTimeout
Configuration structure for TIM timeout. More...
struct | IfxGtm_Tim_In
Driver Handle. More...
struct | IfxGtm_Tim_In_Config
Configuration structure for TIM input capture. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tim_In_ConfigCapture

struct IfxGtm_Tim_In_ConfigCapture

Configuration structure for TIM capture.

Definition at line 99 of file IfxGtm_Tim_In.h.

Data Fields
IfxGtm_Cmu_Clk | clock | Timer input clock.
boolean | irqOnCntOverflow | If TRUE, the interrupt on CNT overflow is enabled.
boolean | irqOnDatalost | If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled.
boolean | irqOnEcntOverflow | If TRUE, the interrupt on ECNT (Edge counter) overflow is enabled.
boolean | irqOnNewVal | If TRUE, the interrupt on new value is enabled.
Ifx_Pwm_Mode | mode | PWM mode, only Ifx_Pwm_Mode_leftAligned and Ifx_Pwm_Mode_righAligned are supported.

◆ IfxGtm_Tim_In_ConfigFilter

struct IfxGtm_Tim_In_ConfigFilter

Configuration structure for TIM filter.

Definition at line 111 of file IfxGtm_Tim_In.h.

Collaboration diagram for IfxGtm_Tim_In_ConfigFilter:
[legend]
Data Fields
IfxGtm_Cmu_Tim_Filter_Clk | clock | Timeout clock.
float32 | fallingEdgeFilterTime | Falling edge filter time in second.
IfxGtm_Tim_In_ConfigFilterMode | fallingEdgeMode | Filter mode for falling edge.
IfxGtm_Tim_In_Input | input | selected input
IfxGtm_Tim_TinMap * | inputPin | If defined, this value overwrites the IfxGtm_Tim_In_Config.filter.input, IfxGtm_Tim_In_Config.timIndex, IfxGtm_Tim_In_Config.channelIndex.
IfxPort_InputMode | inputPinMode | Input pin mode.
boolean | irqOnGlitch | If TRUE, the interrupt on glitch is enabled.
float32 | risingEdgeFilterTime | Rising edge filter time in second.
IfxGtm_Tim_In_ConfigFilterMode | risingEdgeMode | Filter mode for rising edge.

◆ IfxGtm_Tim_In_ConfigTimeout

struct IfxGtm_Tim_In_ConfigTimeout

Configuration structure for TIM timeout.

Definition at line 126 of file IfxGtm_Tim_In.h.

Data Fields
IfxGtm_Cmu_Clk | clock | Timeout clock.
boolean | irqOnTimeout | If TRUE, the interrupt on timeout is enabled.
float32 | timeout | Timeout in second. Value of 0 disable the timeout functionality see 27.10.3 Timeout Detection Unit (TDU)

◆ IfxGtm_Tim_In

struct IfxGtm_Tim_In

Driver Handle.

Definition at line 139 of file IfxGtm_Tim_In.h.

Data Fields
float32 | captureClockFrequency | Capture clock frequency in Hz.
Ifx_GTM_TIM_CH * | channel | TIM channel used.
IfxGtm_Tim_Ch | channelIndex | Index of the TIM channel being used.
boolean | dataCoherent | TRUE, if the duty and period values are measured from the same period.
boolean | dataLost | TRUE if data are lost.
uint16 | edgeCount | number of edges counted.
uint32 | edgeCounterUpper | upper part of the edge counter
boolean | glitch | TRUE if glitch is detected.
boolean | newData | TRUE when values are updated, and if none of the counter CNT, CNTS have overflowed.
boolean | overflowCnt | TRUE if the last measurement show an overflow in CNT.
uint32 | periodTick | Period value in clock ticks.
uint32 | pulseLengthTick | Duty value in clock ticks.
IfxGtm_Tim | timIndex | Index of the TIM module being used.

◆ IfxGtm_Tim_In_Config

struct IfxGtm_Tim_In_Config

Configuration structure for TIM input capture.

Definition at line 158 of file IfxGtm_Tim_In.h.

Collaboration diagram for IfxGtm_Tim_In_Config:
[legend]
Data Fields
IfxGtm_Tim_In_ConfigCapture | capture | Capture configuration.
IfxGtm_Tim_Ch | channelIndex | Channel index.
IfxGtm_Tim_In_ConfigFilter | filter | Filter configuration.
Ifx_GTM * | gtm | GTM used.
IfxGtm_IrqMode | irqMode | Interrupt mode for the new value available.
Ifx_Priority | isrPriority | Set the interrupt priority for new value available. If 0, no interrupt will be generated.
IfxSrc_Tos | isrProvider | Interrupt service provider for the timer interrupt.
IfxGtm_Tim_In_ConfigTimeout | timeout | Timeout configuration.
IfxGtm_Tim | timIndex | TIM index.


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » GTM » Tim Interface Drivers » TIM Input Interface
Collaboration diagram for Enumerations:

Enumerations

enum IfxGtm_Tim_In_ConfigFilterMode {
IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation,
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown,
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold,
IfxGtm_Tim_In_ConfigFilterMode_none
}
Config Filter Mode. More...
enum IfxGtm_Tim_In_Input {
IfxGtm_Tim_In_Input_currentChannel,
IfxGtm_Tim_In_Input_adjacentChannel,
IfxGtm_Tim_In_Input_aux
}
Input Source. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Tim_In_ConfigFilterMode

enum IfxGtm_Tim_In_ConfigFilterMode

Config Filter Mode.

Enumerator
IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation | Immediate edge propagation mode.
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown | Individual deglitch time mode (Up Down)
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold | Individual deglitch time mode (Hold)
IfxGtm_Tim_In_ConfigFilterMode_none | No filter.

Definition at line 72 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_Input

enum IfxGtm_Tim_In_Input

Input Source.

Enumerator
IfxGtm_Tim_In_Input_currentChannel | Use the input from the current channel.
IfxGtm_Tim_In_Input_adjacentChannel | Use the input from the adjacent channel.
IfxGtm_Tim_In_Input_aux | Use the input from the aux.

Definition at line 82 of file IfxGtm_Tim_In.h.


iLLD_TC26B: Funtions

Functions
Funtions
iLLD » GTM » Tim Interface Drivers » TIM Input Interface
Collaboration diagram for Funtions:

Functions

IFX_INLINE void | IfxGtm_Tim_In_clearNewData (IfxGtm_Tim_In *driver)
Clear the new data flag. More...
IFX_INLINE float32 | IfxGtm_Tim_In_getDutyPercent (IfxGtm_Tim_In *driver, boolean *dataCoherent)
return the dutycycle in percent More...
IFX_INLINE float32 | IfxGtm_Tim_In_getPeriodSecond (IfxGtm_Tim_In *driver)
Return the period in second. More...
IFX_INLINE sint32 | IfxGtm_Tim_In_getPeriodTicks (IfxGtm_Tim_In *driver)
Return the period value in tick. More...
IFX_INLINE sint32 | IfxGtm_Tim_In_getPulseLengthTick (IfxGtm_Tim_In *driver)
Return the pulse length value in tick. More...
IFX_INLINE boolean | IfxGtm_Tim_In_isDataLost (IfxGtm_Tim_In *driver)
Indicates if data were lost. More...
IFX_INLINE boolean | IfxGtm_Tim_In_isNewData (IfxGtm_Tim_In *driver)
Indicates if new data are present (new data flag) More...
IFX_EXTERN boolean | IfxGtm_Tim_In_init (IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
Initializes the input capture object. More...
IFX_EXTERN void | IfxGtm_Tim_In_initConfig (IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN void | IfxGtm_Tim_In_onIsr (IfxGtm_Tim_In *driver)
will update the driver state
To be called in the interrupt generated by the IfxGtm_Tim_In driver More...
IFX_EXTERN void | IfxGtm_Tim_In_update (IfxGtm_Tim_In *driver)
Updates the period and duty cycle. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tim_In_clearNewData()

IFX_INLINE void IfxGtm_Tim_In_clearNewData ( IfxGtm_Tim_In * driver )

Clear the new data flag.

Parameters
driver TIM Input object
Returns
None

Definition at line 260 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_getDutyPercent()

IFX_INLINE float32 IfxGtm_Tim_In_getDutyPercent | ( | IfxGtm_Tim_In * | driver,
 |  | boolean * | dataCoherent
 | ) |  |

return the dutycycle in percent

Parameters
driver | TIM Input object
dataCoherent | If true, the duty cycle has been calculated with coherent values for the period and duty, else the period and duty value are from 2 adjacent periods
Returns
duty

Definition at line 266 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_getPeriodSecond()

IFX_INLINE float32 IfxGtm_Tim_In_getPeriodSecond ( IfxGtm_Tim_In * driver )

Return the period in second.

Parameters
driver TIM Input object
Returns
period value in seconds

Definition at line 278 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_getPeriodTicks()

IFX_INLINE sint32 IfxGtm_Tim_In_getPeriodTicks ( IfxGtm_Tim_In * driver )

Return the period value in tick.

Parameters
driver TIM Input object
Returns
period value in ticks

Definition at line 284 of file IfxGtm_Tim_In.h.

Referenced by IfxGtm_Tim_In_getPeriodSecond().

◆ IfxGtm_Tim_In_getPulseLengthTick()

IFX_INLINE sint32 IfxGtm_Tim_In_getPulseLengthTick ( IfxGtm_Tim_In * driver )

Return the pulse length value in tick.

Parameters
driver TIM Input object
Returns
pulse length

Definition at line 290 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_init()

IFX_EXTERN boolean IfxGtm_Tim_In_init | ( | IfxGtm_Tim_In * | driver,
 |  | const IfxGtm_Tim_In_Config * | config
 | ) |  |

Initializes the input capture object.

Parameters
driver | TIM Input object
config | Configuration structure for the input capture Timer
Returns
TRUE on success else FALSE

Definition at line 54 of file IfxGtm_Tim_In.c.

◆ IfxGtm_Tim_In_initConfig()

IFX_EXTERN void IfxGtm_Tim_In_initConfig | ( | IfxGtm_Tim_In_Config * | config,
 |  | Ifx_GTM * | gtm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | Configuration structure for the input capture Timer
gtm | Pointer to GTM module
Returns
None

Definition at line 254 of file IfxGtm_Tim_In.c.

◆ IfxGtm_Tim_In_isDataLost()

IFX_INLINE boolean IfxGtm_Tim_In_isDataLost ( IfxGtm_Tim_In * driver )

Indicates if data were lost.

Parameters
driver TIM Input object
Returns
TRUE if Data is lost FALSE otherwise

Definition at line 296 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_isNewData()

IFX_INLINE boolean IfxGtm_Tim_In_isNewData ( IfxGtm_Tim_In * driver )

Indicates if new data are present (new data flag)

Parameters
driver TIM Input object
Returns
TRUE if New Data FALSE otherwise

Definition at line 302 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_onIsr()

IFX_EXTERN void IfxGtm_Tim_In_onIsr ( IfxGtm_Tim_In * driver )

will update the driver state
To be called in the interrupt generated by the IfxGtm_Tim_In driver

Parameters
driver TIM Input object
Returns
None

Definition at line 284 of file IfxGtm_Tim_In.c.

◆ IfxGtm_Tim_In_update()

IFX_EXTERN void IfxGtm_Tim_In_update ( IfxGtm_Tim_In * driver )

Updates the period and duty cycle.

Parameters
driver TIM Input object
Returns
None

Definition at line 290 of file IfxGtm_Tim_In.c.

Referenced by IfxGtm_Tim_In_onIsr().


iLLD_TC26B: GTM Pin Mapping

Data Structures | Typedefs | Enumerations | Functions | Variables
GTM Pin Mapping
iLLD » GTM
Collaboration diagram for GTM Pin Mapping:

Data Structures

struct | IfxGtm_Tim_TinMap
TIN pin mapping structure. More...
struct | IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure. More...
struct | IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure. More...
struct | IfxGtm_Clk_Out
GTM Clock Output. More...

Typedefs

typedef IfxGtm_Atom_ToutMap * | IfxGtm_Atom_ToutMapP
Pointer to IfxGtm_Atom_ToutMap. More...
typedef IfxGtm_Tom_ToutMap * | IfxGtm_Tom_ToutMapP
Pointer to IfxGtm_Tom_ToutMap. More...

Enumerations

enum IfxGtm_ChXSel {
IfxGtm_ChXSel_a,
IfxGtm_ChXSel_b,
IfxGtm_ChXSel_c,
IfxGtm_ChXSel_d,
IfxGtm_ChXSel_e,
IfxGtm_ChXSel_f,
IfxGtm_ChXSel_g,
IfxGtm_ChXSel_h,
IfxGtm_ChXSel_i,
IfxGtm_ChXSel_j,
IfxGtm_ChXSel_k,
IfxGtm_ChXSel_l,
IfxGtm_ChXSel_m,
IfxGtm_ChXSel_n,
IfxGtm_ChXSel_o,
IfxGtm_ChXSel_p
}
CHxSEL register control code. More...
enum IfxGtm_ToutSel {
IfxGtm_ToutSel_a,
IfxGtm_ToutSel_b,
IfxGtm_ToutSel_c,
IfxGtm_ToutSel_d,
IfxGtm_ToutSel_e
}
TOUTSEL register control code. More...

Functions

IFX_EXTERN void | IfxGtm_PinMap_setTimTin (IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
IFX_EXTERN void | IfxGtm_PinMap_setAtomTout (IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
IFX_EXTERN void | IfxGtm_PinMap_setTomTout (IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)

Variables

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT
IfxGtm_ATOM0_0_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT
IfxGtm_ATOM0_0_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT
IfxGtm_ATOM0_0_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT
IfxGtm_ATOM0_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT
IfxGtm_ATOM0_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT
IfxGtm_ATOM0_0_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT
IfxGtm_ATOM0_0_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT
IfxGtm_ATOM0_1_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT
IfxGtm_ATOM0_1_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT
IfxGtm_ATOM0_1_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT
IfxGtm_ATOM0_1_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT
IfxGtm_ATOM0_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT
IfxGtm_ATOM0_1_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT
IfxGtm_ATOM0_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT
IfxGtm_ATOM0_1_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT
IfxGtm_ATOM0_2_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT
IfxGtm_ATOM0_2_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT
IfxGtm_ATOM0_2_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT
IfxGtm_ATOM0_2_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT
IfxGtm_ATOM0_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT
IfxGtm_ATOM0_2_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT
IfxGtm_ATOM0_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT
IfxGtm_ATOM0_2_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT
IfxGtm_ATOM0_3_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT
IfxGtm_ATOM0_3_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT
IfxGtm_ATOM0_3_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT
IfxGtm_ATOM0_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT
IfxGtm_ATOM0_3_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT
IfxGtm_ATOM0_3_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT
IfxGtm_ATOM0_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT
IfxGtm_ATOM0_3_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT
IfxGtm_ATOM0_3_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT
IfxGtm_ATOM0_4_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT
IfxGtm_ATOM0_4_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT
IfxGtm_ATOM0_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT
IfxGtm_ATOM0_4_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT
IfxGtm_ATOM0_4_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT
IfxGtm_ATOM0_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT
IfxGtm_ATOM0_4_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT
IfxGtm_ATOM0_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT
IfxGtm_ATOM0_5_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT
IfxGtm_ATOM0_5_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT
IfxGtm_ATOM0_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT
IfxGtm_ATOM0_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT
IfxGtm_ATOM0_5_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT
IfxGtm_ATOM0_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT
IfxGtm_ATOM0_5_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT
IfxGtm_ATOM0_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT
IfxGtm_ATOM0_6_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT
IfxGtm_ATOM0_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT
IfxGtm_ATOM0_6_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT
IfxGtm_ATOM0_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT
IfxGtm_ATOM0_6_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT
IfxGtm_ATOM0_7_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT
IfxGtm_ATOM0_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT
IfxGtm_ATOM0_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT
IfxGtm_ATOM0_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT
IfxGtm_ATOM0_7_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT
IfxGtm_ATOM1_0_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT
IfxGtm_ATOM1_0_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT
IfxGtm_ATOM1_0_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT
IfxGtm_ATOM1_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT
IfxGtm_ATOM1_0_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT
IfxGtm_ATOM1_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT
IfxGtm_ATOM1_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT
IfxGtm_ATOM1_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT
IfxGtm_ATOM1_0_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT
IfxGtm_ATOM1_0_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT
IfxGtm_ATOM1_1_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT
IfxGtm_ATOM1_1_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT
IfxGtm_ATOM1_1_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT
IfxGtm_ATOM1_1_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT
IfxGtm_ATOM1_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT
IfxGtm_ATOM1_1_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT
IfxGtm_ATOM1_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT
IfxGtm_ATOM1_1_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT
IfxGtm_ATOM1_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT
IfxGtm_ATOM1_1_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT
IfxGtm_ATOM1_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT
IfxGtm_ATOM1_2_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT
IfxGtm_ATOM1_2_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT
IfxGtm_ATOM1_2_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT
IfxGtm_ATOM1_2_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT
IfxGtm_ATOM1_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT
IfxGtm_ATOM1_2_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT
IfxGtm_ATOM1_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT
IfxGtm_ATOM1_2_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT
IfxGtm_ATOM1_2_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT
IfxGtm_ATOM1_3_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT
IfxGtm_ATOM1_3_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT
IfxGtm_ATOM1_3_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT
IfxGtm_ATOM1_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT
IfxGtm_ATOM1_3_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT
IfxGtm_ATOM1_3_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT
IfxGtm_ATOM1_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT
IfxGtm_ATOM1_3_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT
IfxGtm_ATOM1_3_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT
IfxGtm_ATOM1_4_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT
IfxGtm_ATOM1_4_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT
IfxGtm_ATOM1_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT
IfxGtm_ATOM1_4_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT
IfxGtm_ATOM1_4_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT
IfxGtm_ATOM1_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT
IfxGtm_ATOM1_4_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT
IfxGtm_ATOM1_4_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT
IfxGtm_ATOM1_5_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT
IfxGtm_ATOM1_5_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT
IfxGtm_ATOM1_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT
IfxGtm_ATOM1_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT
IfxGtm_ATOM1_5_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT
IfxGtm_ATOM1_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT
IfxGtm_ATOM1_5_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT
IfxGtm_ATOM1_5_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT
IfxGtm_ATOM1_5_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT
IfxGtm_ATOM1_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT
IfxGtm_ATOM1_6_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT
IfxGtm_ATOM1_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT
IfxGtm_ATOM1_6_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT
IfxGtm_ATOM1_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT
IfxGtm_ATOM1_6_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT
IfxGtm_ATOM1_6_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT
IfxGtm_ATOM1_6_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT
IfxGtm_ATOM1_7_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT
IfxGtm_ATOM1_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT
IfxGtm_ATOM1_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT
IfxGtm_ATOM1_7_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT
IfxGtm_ATOM1_7_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT
IfxGtm_ATOM1_7_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT
IfxGtm_ATOM2_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT
IfxGtm_ATOM2_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT
IfxGtm_ATOM2_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT
IfxGtm_ATOM2_0_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT
IfxGtm_ATOM2_0_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT
IfxGtm_ATOM2_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT
IfxGtm_ATOM2_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT
IfxGtm_ATOM2_1_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT
IfxGtm_ATOM2_1_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT
IfxGtm_ATOM2_1_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT
IfxGtm_ATOM2_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT
IfxGtm_ATOM2_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT
IfxGtm_ATOM2_2_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT
IfxGtm_ATOM2_2_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT
IfxGtm_ATOM2_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT
IfxGtm_ATOM2_2_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT
IfxGtm_ATOM2_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT
IfxGtm_ATOM2_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT
IfxGtm_ATOM2_3_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT
IfxGtm_ATOM2_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT
IfxGtm_ATOM2_3_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT
IfxGtm_ATOM2_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT
IfxGtm_ATOM2_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT
IfxGtm_ATOM2_4_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT
IfxGtm_ATOM2_4_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT
IfxGtm_ATOM2_4_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT
IfxGtm_ATOM2_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT
IfxGtm_ATOM2_4_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT
IfxGtm_ATOM2_5_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT
IfxGtm_ATOM2_5_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT
IfxGtm_ATOM2_5_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT
IfxGtm_ATOM2_5_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT
IfxGtm_ATOM2_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT
IfxGtm_ATOM2_5_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT
IfxGtm_ATOM2_6_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT
IfxGtm_ATOM2_6_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT
IfxGtm_ATOM2_6_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT
IfxGtm_ATOM2_6_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT
IfxGtm_ATOM2_6_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT
IfxGtm_ATOM2_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT
IfxGtm_ATOM2_7_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT
IfxGtm_ATOM2_7_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT
IfxGtm_ATOM2_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT
IfxGtm_ATOM2_7_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT
IfxGtm_ATOM2_7_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT
IfxGtm_ATOM2_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT
IfxGtm_ATOM3_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT
IfxGtm_ATOM3_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT
IfxGtm_ATOM3_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT
IfxGtm_ATOM3_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT
IfxGtm_ATOM3_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT
IfxGtm_ATOM3_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT
IfxGtm_ATOM3_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT
IfxGtm_ATOM3_0_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT
IfxGtm_ATOM3_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT
IfxGtm_ATOM3_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT
IfxGtm_ATOM3_1_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT
IfxGtm_ATOM3_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT
IfxGtm_ATOM3_1_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT
IfxGtm_ATOM3_1_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT
IfxGtm_ATOM3_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT
IfxGtm_ATOM3_1_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT
IfxGtm_ATOM3_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT
IfxGtm_ATOM3_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT
IfxGtm_ATOM3_2_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT
IfxGtm_ATOM3_2_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT
IfxGtm_ATOM3_2_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT
IfxGtm_ATOM3_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT
IfxGtm_ATOM3_2_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT
IfxGtm_ATOM3_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT
IfxGtm_ATOM3_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT
IfxGtm_ATOM3_3_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT
IfxGtm_ATOM3_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT
IfxGtm_ATOM3_3_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT
IfxGtm_ATOM3_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT
IfxGtm_ATOM3_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT
IfxGtm_ATOM3_4_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT
IfxGtm_ATOM3_4_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT
IfxGtm_ATOM3_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT
IfxGtm_ATOM3_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT
IfxGtm_ATOM3_4_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT
IfxGtm_ATOM3_5_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT
IfxGtm_ATOM3_5_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT
IfxGtm_ATOM3_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT
IfxGtm_ATOM3_5_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT
IfxGtm_ATOM3_6_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT
IfxGtm_ATOM3_6_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT
IfxGtm_ATOM3_6_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT
IfxGtm_ATOM3_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT
IfxGtm_ATOM3_7_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT
IfxGtm_ATOM3_7_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT
IfxGtm_ATOM3_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT
GTM_CLK0: GTM output. More...
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT
GTM_CLK1: GTM output. More...
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT
GTM_CLK2: GTM output. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN
IfxGtm_TIM0_0_TIN0_P02_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN
IfxGtm_TIM0_0_TIN109_P10_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN
IfxGtm_TIM0_0_TIN18_P00_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN
IfxGtm_TIM0_0_TIN26_P33_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN
IfxGtm_TIM0_0_TIN32_P33_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN
IfxGtm_TIM0_0_TIN34_P33_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN
IfxGtm_TIM0_0_TIN48_P22_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN
IfxGtm_TIM0_0_TIN53_P21_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN
IfxGtm_TIM0_0_TIN77_P15_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN
IfxGtm_TIM0_0_TIN85_P14_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN
IfxGtm_TIM0_0_TIN87_P14_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN
IfxGtm_TIM0_0_TIN8_P02_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN
IfxGtm_TIM0_0_TIN9_P00_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN
IfxGtm_TIM0_1_TIN103_P10_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN
IfxGtm_TIM0_1_TIN10_P00_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN
IfxGtm_TIM0_1_TIN11_P00_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN
IfxGtm_TIM0_1_TIN19_P00_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN
IfxGtm_TIM0_1_TIN1_P02_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN
IfxGtm_TIM0_1_TIN27_P33_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN
IfxGtm_TIM0_1_TIN31_P33_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN
IfxGtm_TIM0_1_TIN35_P33_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN
IfxGtm_TIM0_1_TIN47_P22_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN
IfxGtm_TIM0_1_TIN54_P21_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN
IfxGtm_TIM0_1_TIN78_P15_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN
IfxGtm_TIM0_1_TIN86_P14_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN
IfxGtm_TIM0_2_TIN104_P10_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN
IfxGtm_TIM0_2_TIN107_P10_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN
IfxGtm_TIM0_2_TIN20_P00_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN
IfxGtm_TIM0_2_TIN28_P33_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN
IfxGtm_TIM0_2_TIN2_P02_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN
IfxGtm_TIM0_2_TIN33_P33_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN
IfxGtm_TIM0_2_TIN36_P32_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN
IfxGtm_TIM0_2_TIN46_P23_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN
IfxGtm_TIM0_2_TIN55_P21_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN
IfxGtm_TIM0_2_TIN79_P15_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN
IfxGtm_TIM0_3_TIN105_P10_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN
IfxGtm_TIM0_3_TIN108_P10_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN
IfxGtm_TIM0_3_TIN21_P00_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN
IfxGtm_TIM0_3_TIN29_P33_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN
IfxGtm_TIM0_3_TIN38_P32_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN
IfxGtm_TIM0_3_TIN3_P02_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN
IfxGtm_TIM0_3_TIN49_P22_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN
IfxGtm_TIM0_3_TIN51_P21_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN
IfxGtm_TIM0_3_TIN56_P21_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN
IfxGtm_TIM0_3_TIN60_P20_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN
IfxGtm_TIM0_3_TIN80_P14_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN
IfxGtm_TIM0_4_TIN102_P10_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN
IfxGtm_TIM0_4_TIN22_P33_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN
IfxGtm_TIM0_4_TIN30_P33_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN
IfxGtm_TIM0_4_TIN39_P32_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN
IfxGtm_TIM0_4_TIN4_P02_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN
IfxGtm_TIM0_4_TIN50_P22_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN
IfxGtm_TIM0_4_TIN52_P21_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN
IfxGtm_TIM0_4_TIN57_P21_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN
IfxGtm_TIM0_4_TIN61_P20_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN
IfxGtm_TIM0_4_TIN81_P14_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN
IfxGtm_TIM0_5_TIN110_P10_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN
IfxGtm_TIM0_5_TIN23_P33_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN
IfxGtm_TIM0_5_TIN40_P32_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN
IfxGtm_TIM0_5_TIN41_P23_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN
IfxGtm_TIM0_5_TIN58_P21_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN
IfxGtm_TIM0_5_TIN5_P02_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN
IfxGtm_TIM0_5_TIN82_P14_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN
IfxGtm_TIM0_6_TIN106_P10_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN
IfxGtm_TIM0_6_TIN24_P33_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN
IfxGtm_TIM0_6_TIN42_P23_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN
IfxGtm_TIM0_6_TIN43_P23_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN
IfxGtm_TIM0_6_TIN59_P20_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN
IfxGtm_TIM0_6_TIN62_P20_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN
IfxGtm_TIM0_6_TIN83_P14_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN
IfxGtm_TIM0_7_TIN25_P33_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN
IfxGtm_TIM0_7_TIN44_P23_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN
IfxGtm_TIM0_7_TIN45_P23_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN
IfxGtm_TIM0_7_TIN63_P20_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN
IfxGtm_TIM0_7_TIN64_P20_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN
IfxGtm_TIM0_7_TIN7_P02_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN
IfxGtm_TIM0_7_TIN84_P14_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN
IfxGtm_TIM1_0_TIN0_P02_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN
IfxGtm_TIM1_0_TIN109_P10_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN
IfxGtm_TIM1_0_TIN18_P00_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN
IfxGtm_TIM1_0_TIN26_P33_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN
IfxGtm_TIM1_0_TIN32_P33_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN
IfxGtm_TIM1_0_TIN48_P22_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN
IfxGtm_TIM1_0_TIN53_P21_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN
IfxGtm_TIM1_0_TIN68_P20_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN
IfxGtm_TIM1_0_TIN76_P15_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN
IfxGtm_TIM1_0_TIN77_P15_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN
IfxGtm_TIM1_0_TIN85_P14_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN
IfxGtm_TIM1_0_TIN87_P14_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN
IfxGtm_TIM1_0_TIN94_P13_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN
IfxGtm_TIM1_1_TIN103_P10_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN
IfxGtm_TIM1_1_TIN19_P00_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN
IfxGtm_TIM1_1_TIN1_P02_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN
IfxGtm_TIM1_1_TIN27_P33_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN
IfxGtm_TIM1_1_TIN31_P33_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN
IfxGtm_TIM1_1_TIN47_P22_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN
IfxGtm_TIM1_1_TIN54_P21_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN
IfxGtm_TIM1_1_TIN69_P20_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN
IfxGtm_TIM1_1_TIN78_P15_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN
IfxGtm_TIM1_1_TIN86_P14_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN
IfxGtm_TIM1_1_TIN95_P11_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN
IfxGtm_TIM1_2_TIN104_P10_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN
IfxGtm_TIM1_2_TIN107_P10_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN
IfxGtm_TIM1_2_TIN12_P00_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN
IfxGtm_TIM1_2_TIN20_P00_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN
IfxGtm_TIM1_2_TIN28_P33_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN
IfxGtm_TIM1_2_TIN2_P02_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN
IfxGtm_TIM1_2_TIN33_P33_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN
IfxGtm_TIM1_2_TIN46_P23_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN
IfxGtm_TIM1_2_TIN55_P21_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN
IfxGtm_TIM1_2_TIN70_P20_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN
IfxGtm_TIM1_2_TIN79_P15_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN
IfxGtm_TIM1_2_TIN96_P11_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN
IfxGtm_TIM1_3_TIN105_P10_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN
IfxGtm_TIM1_3_TIN108_P10_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN
IfxGtm_TIM1_3_TIN13_P00_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN
IfxGtm_TIM1_3_TIN21_P00_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN
IfxGtm_TIM1_3_TIN29_P33_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN
IfxGtm_TIM1_3_TIN38_P32_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN
IfxGtm_TIM1_3_TIN3_P02_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN
IfxGtm_TIM1_3_TIN49_P22_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN
IfxGtm_TIM1_3_TIN56_P21_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN
IfxGtm_TIM1_3_TIN71_P15_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN
IfxGtm_TIM1_3_TIN80_P14_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN
IfxGtm_TIM1_3_TIN97_P11_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN
IfxGtm_TIM1_4_TIN102_P10_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN
IfxGtm_TIM1_4_TIN14_P00_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN
IfxGtm_TIM1_4_TIN22_P33_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN
IfxGtm_TIM1_4_TIN30_P33_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN
IfxGtm_TIM1_4_TIN39_P32_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN
IfxGtm_TIM1_4_TIN4_P02_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN
IfxGtm_TIM1_4_TIN50_P22_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN
IfxGtm_TIM1_4_TIN57_P21_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN
IfxGtm_TIM1_4_TIN72_P15_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN
IfxGtm_TIM1_4_TIN81_P14_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN
IfxGtm_TIM1_4_TIN98_P11_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN
IfxGtm_TIM1_5_TIN110_P10_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN
IfxGtm_TIM1_5_TIN15_P00_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN
IfxGtm_TIM1_5_TIN40_P32_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN
IfxGtm_TIM1_5_TIN41_P23_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN
IfxGtm_TIM1_5_TIN58_P21_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN
IfxGtm_TIM1_5_TIN5_P02_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN
IfxGtm_TIM1_5_TIN65_P20_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN
IfxGtm_TIM1_5_TIN73_P15_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN
IfxGtm_TIM1_5_TIN82_P14_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN
IfxGtm_TIM1_5_TIN91_P13_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN
IfxGtm_TIM1_5_TIN99_P11_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN
IfxGtm_TIM1_6_TIN100_P11_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN
IfxGtm_TIM1_6_TIN106_P10_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN
IfxGtm_TIM1_6_TIN16_P00_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN
IfxGtm_TIM1_6_TIN24_P33_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN
IfxGtm_TIM1_6_TIN42_P23_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN
IfxGtm_TIM1_6_TIN43_P23_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN
IfxGtm_TIM1_6_TIN59_P20_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN
IfxGtm_TIM1_6_TIN66_P20_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN
IfxGtm_TIM1_6_TIN6_P02_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN
IfxGtm_TIM1_6_TIN74_P15_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN
IfxGtm_TIM1_6_TIN83_P14_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN
IfxGtm_TIM1_6_TIN92_P13_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN
IfxGtm_TIM1_7_TIN101_P11_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN
IfxGtm_TIM1_7_TIN17_P00_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN
IfxGtm_TIM1_7_TIN25_P33_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN
IfxGtm_TIM1_7_TIN44_P23_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN
IfxGtm_TIM1_7_TIN45_P23_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN
IfxGtm_TIM1_7_TIN64_P20_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN
IfxGtm_TIM1_7_TIN67_P20_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN
IfxGtm_TIM1_7_TIN75_P15_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN
IfxGtm_TIM1_7_TIN7_P02_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN
IfxGtm_TIM1_7_TIN84_P14_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN
IfxGtm_TIM1_7_TIN93_P13_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN
IfxGtm_TIM2_0_TIN34_P33_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN
IfxGtm_TIM2_0_TIN68_P20_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN
IfxGtm_TIM2_0_TIN76_P15_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN
IfxGtm_TIM2_0_TIN8_P02_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN
IfxGtm_TIM2_0_TIN94_P13_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN
IfxGtm_TIM2_0_TIN9_P00_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN
IfxGtm_TIM2_1_TIN10_P00_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN
IfxGtm_TIM2_1_TIN11_P00_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN
IfxGtm_TIM2_1_TIN35_P33_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN
IfxGtm_TIM2_1_TIN69_P20_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN
IfxGtm_TIM2_1_TIN95_P11_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN
IfxGtm_TIM2_2_TIN12_P00_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN
IfxGtm_TIM2_2_TIN36_P32_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN
IfxGtm_TIM2_2_TIN70_P20_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN
IfxGtm_TIM2_2_TIN88_P14_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN
IfxGtm_TIM2_2_TIN96_P11_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN
IfxGtm_TIM2_3_TIN13_P00_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN
IfxGtm_TIM2_3_TIN60_P20_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN
IfxGtm_TIM2_3_TIN71_P15_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN
IfxGtm_TIM2_3_TIN89_P14_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN
IfxGtm_TIM2_3_TIN97_P11_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN
IfxGtm_TIM2_4_TIN14_P00_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN
IfxGtm_TIM2_4_TIN51_P21_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN
IfxGtm_TIM2_4_TIN61_P20_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN
IfxGtm_TIM2_4_TIN72_P15_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN
IfxGtm_TIM2_4_TIN90_P14_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN
IfxGtm_TIM2_4_TIN98_P11_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN
IfxGtm_TIM2_5_TIN15_P00_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN
IfxGtm_TIM2_5_TIN52_P21_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN
IfxGtm_TIM2_5_TIN65_P20_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN
IfxGtm_TIM2_5_TIN73_P15_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN
IfxGtm_TIM2_5_TIN91_P13_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN
IfxGtm_TIM2_5_TIN99_P11_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN
IfxGtm_TIM2_6_TIN100_P11_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN
IfxGtm_TIM2_6_TIN16_P00_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN
IfxGtm_TIM2_6_TIN62_P20_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN
IfxGtm_TIM2_6_TIN66_P20_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN
IfxGtm_TIM2_6_TIN74_P15_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN
IfxGtm_TIM2_6_TIN92_P13_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN
IfxGtm_TIM2_7_TIN101_P11_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN
IfxGtm_TIM2_7_TIN17_P00_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN
IfxGtm_TIM2_7_TIN63_P20_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN
IfxGtm_TIM2_7_TIN67_P20_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN
IfxGtm_TIM2_7_TIN75_P15_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN
IfxGtm_TIM2_7_TIN93_P13_2_IN. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT
IfxGtm_TOM0_0_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT
IfxGtm_TOM0_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT
IfxGtm_TOM0_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT
IfxGtm_TOM0_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT
IfxGtm_TOM0_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT
IfxGtm_TOM0_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT
IfxGtm_TOM0_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT
IfxGtm_TOM0_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT
IfxGtm_TOM0_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT
IfxGtm_TOM0_10_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT
IfxGtm_TOM0_10_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT
IfxGtm_TOM0_10_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT
IfxGtm_TOM0_10_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT
IfxGtm_TOM0_10_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT
IfxGtm_TOM0_10_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT
IfxGtm_TOM0_10_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT
IfxGtm_TOM0_11_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT
IfxGtm_TOM0_11_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT
IfxGtm_TOM0_11_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT
IfxGtm_TOM0_11_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT
IfxGtm_TOM0_11_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT
IfxGtm_TOM0_11_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT
IfxGtm_TOM0_11_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT
IfxGtm_TOM0_12_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT
IfxGtm_TOM0_12_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT
IfxGtm_TOM0_12_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT
IfxGtm_TOM0_12_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT
IfxGtm_TOM0_12_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT
IfxGtm_TOM0_12_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT
IfxGtm_TOM0_12_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT
IfxGtm_TOM0_13_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT
IfxGtm_TOM0_13_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT
IfxGtm_TOM0_13_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT
IfxGtm_TOM0_13_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT
IfxGtm_TOM0_13_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT
IfxGtm_TOM0_13_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT
IfxGtm_TOM0_14_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT
IfxGtm_TOM0_14_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT
IfxGtm_TOM0_14_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT
IfxGtm_TOM0_14_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT
IfxGtm_TOM0_14_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT
IfxGtm_TOM0_14_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT
IfxGtm_TOM0_15_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT
IfxGtm_TOM0_15_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT
IfxGtm_TOM0_15_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT
IfxGtm_TOM0_15_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT
IfxGtm_TOM0_15_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT
IfxGtm_TOM0_15_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT
IfxGtm_TOM0_1_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT
IfxGtm_TOM0_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT
IfxGtm_TOM0_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT
IfxGtm_TOM0_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT
IfxGtm_TOM0_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT
IfxGtm_TOM0_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT
IfxGtm_TOM0_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT
IfxGtm_TOM0_2_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT
IfxGtm_TOM0_2_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT
IfxGtm_TOM0_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT
IfxGtm_TOM0_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT
IfxGtm_TOM0_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT
IfxGtm_TOM0_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT
IfxGtm_TOM0_2_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT
IfxGtm_TOM0_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT
IfxGtm_TOM0_3_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT
IfxGtm_TOM0_3_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT
IfxGtm_TOM0_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT
IfxGtm_TOM0_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT
IfxGtm_TOM0_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT
IfxGtm_TOM0_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT
IfxGtm_TOM0_3_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT
IfxGtm_TOM0_3_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT
IfxGtm_TOM0_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT
IfxGtm_TOM0_4_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT
IfxGtm_TOM0_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT
IfxGtm_TOM0_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT
IfxGtm_TOM0_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT
IfxGtm_TOM0_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT
IfxGtm_TOM0_4_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT
IfxGtm_TOM0_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT
IfxGtm_TOM0_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT
IfxGtm_TOM0_5_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT
IfxGtm_TOM0_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT
IfxGtm_TOM0_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT
IfxGtm_TOM0_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT
IfxGtm_TOM0_5_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT
IfxGtm_TOM0_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT
IfxGtm_TOM0_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT
IfxGtm_TOM0_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT
IfxGtm_TOM0_6_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT
IfxGtm_TOM0_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT
IfxGtm_TOM0_6_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT
IfxGtm_TOM0_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT
IfxGtm_TOM0_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT
IfxGtm_TOM0_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT
IfxGtm_TOM0_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT
IfxGtm_TOM0_7_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT
IfxGtm_TOM0_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT
IfxGtm_TOM0_8_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT
IfxGtm_TOM0_8_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT
IfxGtm_TOM0_8_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT
IfxGtm_TOM0_8_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT
IfxGtm_TOM0_8_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT
IfxGtm_TOM0_8_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT
IfxGtm_TOM0_8_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT
IfxGtm_TOM0_8_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT
IfxGtm_TOM0_9_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT
IfxGtm_TOM0_9_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT
IfxGtm_TOM0_9_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT
IfxGtm_TOM0_9_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT
IfxGtm_TOM0_9_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT
IfxGtm_TOM0_9_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT
IfxGtm_TOM1_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT
IfxGtm_TOM1_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT
IfxGtm_TOM1_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT
IfxGtm_TOM1_0_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT
IfxGtm_TOM1_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT
IfxGtm_TOM1_0_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT
IfxGtm_TOM1_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT
IfxGtm_TOM1_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT
IfxGtm_TOM1_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT
IfxGtm_TOM1_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT
IfxGtm_TOM1_0_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT
IfxGtm_TOM1_0_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT
IfxGtm_TOM1_0_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT
IfxGtm_TOM1_10_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT
IfxGtm_TOM1_10_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT
IfxGtm_TOM1_10_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT
IfxGtm_TOM1_10_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT
IfxGtm_TOM1_11_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT
IfxGtm_TOM1_11_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT
IfxGtm_TOM1_11_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT
IfxGtm_TOM1_11_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT
IfxGtm_TOM1_11_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT
IfxGtm_TOM1_12_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT
IfxGtm_TOM1_12_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT
IfxGtm_TOM1_12_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT
IfxGtm_TOM1_12_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT
IfxGtm_TOM1_13_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT
IfxGtm_TOM1_13_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT
IfxGtm_TOM1_13_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT
IfxGtm_TOM1_13_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT
IfxGtm_TOM1_14_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT
IfxGtm_TOM1_14_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT
IfxGtm_TOM1_14_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT
IfxGtm_TOM1_15_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT
IfxGtm_TOM1_15_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT
IfxGtm_TOM1_1_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT
IfxGtm_TOM1_1_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT
IfxGtm_TOM1_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT
IfxGtm_TOM1_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT
IfxGtm_TOM1_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT
IfxGtm_TOM1_1_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT
IfxGtm_TOM1_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT
IfxGtm_TOM1_1_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT
IfxGtm_TOM1_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT
IfxGtm_TOM1_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT
IfxGtm_TOM1_1_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT
IfxGtm_TOM1_2_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT
IfxGtm_TOM1_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT
IfxGtm_TOM1_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT
IfxGtm_TOM1_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT
IfxGtm_TOM1_2_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT
IfxGtm_TOM1_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT
IfxGtm_TOM1_2_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT
IfxGtm_TOM1_2_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT
IfxGtm_TOM1_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT
IfxGtm_TOM1_2_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT
IfxGtm_TOM1_3_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT
IfxGtm_TOM1_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT
IfxGtm_TOM1_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT
IfxGtm_TOM1_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT
IfxGtm_TOM1_3_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT
IfxGtm_TOM1_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT
IfxGtm_TOM1_3_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT
IfxGtm_TOM1_3_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT
IfxGtm_TOM1_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT
IfxGtm_TOM1_3_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT
IfxGtm_TOM1_4_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT
IfxGtm_TOM1_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT
IfxGtm_TOM1_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT
IfxGtm_TOM1_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT
IfxGtm_TOM1_4_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT
IfxGtm_TOM1_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT
IfxGtm_TOM1_4_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT
IfxGtm_TOM1_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT
IfxGtm_TOM1_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT
IfxGtm_TOM1_4_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT
IfxGtm_TOM1_5_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT
IfxGtm_TOM1_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT
IfxGtm_TOM1_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT
IfxGtm_TOM1_5_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT
IfxGtm_TOM1_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT
IfxGtm_TOM1_5_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT
IfxGtm_TOM1_5_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT
IfxGtm_TOM1_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT
IfxGtm_TOM1_5_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT
IfxGtm_TOM1_6_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT
IfxGtm_TOM1_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT
IfxGtm_TOM1_6_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT
IfxGtm_TOM1_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT
IfxGtm_TOM1_6_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT
IfxGtm_TOM1_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT
IfxGtm_TOM1_6_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT
IfxGtm_TOM1_6_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT
IfxGtm_TOM1_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT
IfxGtm_TOM1_7_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT
IfxGtm_TOM1_7_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT
IfxGtm_TOM1_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT
IfxGtm_TOM1_7_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT
IfxGtm_TOM1_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT
IfxGtm_TOM1_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT
IfxGtm_TOM1_7_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT
IfxGtm_TOM1_7_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT
IfxGtm_TOM1_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT
IfxGtm_TOM1_8_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT
IfxGtm_TOM1_8_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT
IfxGtm_TOM1_8_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT
IfxGtm_TOM1_9_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT
IfxGtm_TOM1_9_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT
IfxGtm_TOM1_9_TOUT52_P21_1_OUT. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tim_TinMap

struct IfxGtm_Tim_TinMap

TIN pin mapping structure.

Definition at line 93 of file IfxGtm_PinMap.h.

Collaboration diagram for IfxGtm_Tim_TinMap:
[legend]
Data Fields
IfxGtm_Tim_Ch | channel | TIM channel index.
IfxPort_Pin | pin | Port pin.
IfxGtm_ChXSel | select | Input multiplexer value.
IfxGtm_Tim | tim | TIM unit index.

◆ IfxGtm_Atom_ToutMap

struct IfxGtm_Atom_ToutMap

ATOM TOUT pin mapping structure.

Definition at line 102 of file IfxGtm_PinMap.h.

Collaboration diagram for IfxGtm_Atom_ToutMap:
[legend]
Data Fields
IfxGtm_Atom | atom | ATOM unit index.
IfxGtm_Atom_Ch | channel | ATOM channel index.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.
uint32 | toutn | TOUT number.
IfxGtm_ToutSel | toutSel | TOUTSEL register control code.

◆ IfxGtm_Tom_ToutMap

struct IfxGtm_Tom_ToutMap

TOM TOUT pin mapping structure.

Definition at line 116 of file IfxGtm_PinMap.h.

Collaboration diagram for IfxGtm_Tom_ToutMap:
[legend]
Data Fields
IfxGtm_Tom_Ch | channel | TOM channel index.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.
IfxGtm_Tom | tom | TOM unit index.
uint32 | toutn | TOUT number.
IfxGtm_ToutSel | toutSel | TOUTSEL register control code.

◆ IfxGtm_Clk_Out

struct IfxGtm_Clk_Out

GTM Clock Output.

Definition at line 127 of file IfxGtm_PinMap.h.

Collaboration diagram for IfxGtm_Clk_Out:
[legend]
Data Fields
Ifx_GTM * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Typedef Documentation

◆ IfxGtm_Atom_ToutMapP

typedef IfxGtm_Atom_ToutMap* IfxGtm_Atom_ToutMapP

Pointer to IfxGtm_Atom_ToutMap.

Definition at line 113 of file IfxGtm_PinMap.h.

◆ IfxGtm_Tom_ToutMapP

typedef IfxGtm_Tom_ToutMap* IfxGtm_Tom_ToutMapP

Pointer to IfxGtm_Tom_ToutMap.

Definition at line 135 of file IfxGtm_PinMap.h.

Enumeration Type Documentation

◆ IfxGtm_ChXSel

enum IfxGtm_ChXSel

CHxSEL register control code.

Enumerator
IfxGtm_ChXSel_a
IfxGtm_ChXSel_b
IfxGtm_ChXSel_c
IfxGtm_ChXSel_d
IfxGtm_ChXSel_e
IfxGtm_ChXSel_f
IfxGtm_ChXSel_g
IfxGtm_ChXSel_h
IfxGtm_ChXSel_i
IfxGtm_ChXSel_j
IfxGtm_ChXSel_k
IfxGtm_ChXSel_l
IfxGtm_ChXSel_m
IfxGtm_ChXSel_n
IfxGtm_ChXSel_o
IfxGtm_ChXSel_p

Definition at line 59 of file IfxGtm_PinMap.h.

◆ IfxGtm_ToutSel

enum IfxGtm_ToutSel

TOUTSEL register control code.

Enumerator
IfxGtm_ToutSel_a
IfxGtm_ToutSel_b
IfxGtm_ToutSel_c
IfxGtm_ToutSel_d
IfxGtm_ToutSel_e

Definition at line 83 of file IfxGtm_PinMap.h.

Function Documentation

◆ IfxGtm_PinMap_setAtomTout()

IFX_EXTERN void IfxGtm_PinMap_setAtomTout | ( | IfxGtm_Atom_ToutMap * | config,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Definition at line 718 of file IfxGtm_PinMap.c.

Referenced by IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_PinMap_setTimTin()

IFX_EXTERN void IfxGtm_PinMap_setTimTin | ( | IfxGtm_Tim_TinMap * | config,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Definition at line 706 of file IfxGtm_PinMap.c.

Referenced by IfxDsadc_Rdc_initHwTimestamp(), and IfxGtm_Tim_In_init().

◆ IfxGtm_PinMap_setTomTout()

IFX_EXTERN void IfxGtm_PinMap_setTomTout | ( | IfxGtm_Tom_ToutMap * | config,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Definition at line 730 of file IfxGtm_PinMap.c.

Referenced by IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

Variable Documentation

◆ IfxGtm_ATOM0_0_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT

IfxGtm_ATOM0_0_TOUT0_P02_0_OUT.

Definition at line 141 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT

IfxGtm_ATOM0_0_TOUT109_P10_7_OUT.

Definition at line 142 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT

IfxGtm_ATOM0_0_TOUT48_P22_1_OUT.

Definition at line 143 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT

IfxGtm_ATOM0_0_TOUT53_P21_2_OUT.

Definition at line 144 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT

IfxGtm_ATOM0_0_TOUT85_P14_5_OUT.

Definition at line 145 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT

IfxGtm_ATOM0_0_TOUT8_P02_8_OUT.

Definition at line 146 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT

IfxGtm_ATOM0_0_TOUT9_P00_0_OUT.

Definition at line 147 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT

IfxGtm_ATOM0_1_TOUT103_P10_1_OUT.

Definition at line 148 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT

IfxGtm_ATOM0_1_TOUT10_P00_1_OUT.

Definition at line 149 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT

IfxGtm_ATOM0_1_TOUT11_P00_2_OUT.

Definition at line 150 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT

IfxGtm_ATOM0_1_TOUT1_P02_1_OUT.

Definition at line 151 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT

IfxGtm_ATOM0_1_TOUT31_P33_9_OUT.

Definition at line 152 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT47_P22_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT

IfxGtm_ATOM0_1_TOUT47_P22_0_OUT.

Definition at line 153 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT

IfxGtm_ATOM0_1_TOUT54_P21_3_OUT.

Definition at line 154 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT

IfxGtm_ATOM0_1_TOUT84_P14_4_OUT.

Definition at line 155 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT

IfxGtm_ATOM0_2_TOUT104_P10_2_OUT.

Definition at line 156 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT

IfxGtm_ATOM0_2_TOUT107_P10_5_OUT.

Definition at line 157 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT

IfxGtm_ATOM0_2_TOUT12_P00_3_OUT.

Definition at line 158 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT

IfxGtm_ATOM0_2_TOUT2_P02_2_OUT.

Definition at line 159 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT

IfxGtm_ATOM0_2_TOUT33_P33_11_OUT.

Definition at line 160 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT

IfxGtm_ATOM0_2_TOUT46_P23_5_OUT.

Definition at line 161 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT

IfxGtm_ATOM0_2_TOUT55_P21_4_OUT.

Definition at line 162 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT83_P14_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT

IfxGtm_ATOM0_2_TOUT83_P14_3_OUT.

Definition at line 163 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT

IfxGtm_ATOM0_3_TOUT105_P10_3_OUT.

Definition at line 164 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT

IfxGtm_ATOM0_3_TOUT108_P10_6_OUT.

Definition at line 165 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT

IfxGtm_ATOM0_3_TOUT13_P00_4_OUT.

Definition at line 166 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT

IfxGtm_ATOM0_3_TOUT38_P32_2_OUT.

Definition at line 167 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT

IfxGtm_ATOM0_3_TOUT3_P02_3_OUT.

Definition at line 168 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT

IfxGtm_ATOM0_3_TOUT49_P22_2_OUT.

Definition at line 169 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT

IfxGtm_ATOM0_3_TOUT56_P21_5_OUT.

Definition at line 170 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT

IfxGtm_ATOM0_3_TOUT60_P20_1_OUT.

Definition at line 171 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT

IfxGtm_ATOM0_3_TOUT82_P14_2_OUT.

Definition at line 172 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT

IfxGtm_ATOM0_4_TOUT102_P10_0_OUT.

Definition at line 173 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT

IfxGtm_ATOM0_4_TOUT14_P00_5_OUT.

Definition at line 174 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT

IfxGtm_ATOM0_4_TOUT39_P32_3_OUT.

Definition at line 175 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT

IfxGtm_ATOM0_4_TOUT4_P02_4_OUT.

Definition at line 176 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT

IfxGtm_ATOM0_4_TOUT50_P22_3_OUT.

Definition at line 177 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT

IfxGtm_ATOM0_4_TOUT57_P21_6_OUT.

Definition at line 178 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT

IfxGtm_ATOM0_4_TOUT61_P20_3_OUT.

Definition at line 179 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT

IfxGtm_ATOM0_4_TOUT81_P14_1_OUT.

Definition at line 180 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT

IfxGtm_ATOM0_5_TOUT110_P10_8_OUT.

Definition at line 181 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT

IfxGtm_ATOM0_5_TOUT15_P00_6_OUT.

Definition at line 182 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT

IfxGtm_ATOM0_5_TOUT23_P33_1_OUT.

Definition at line 183 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT

IfxGtm_ATOM0_5_TOUT40_P32_4_OUT.

Definition at line 184 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT

IfxGtm_ATOM0_5_TOUT41_P23_0_OUT.

Definition at line 185 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT

IfxGtm_ATOM0_5_TOUT58_P21_7_OUT.

Definition at line 186 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT

IfxGtm_ATOM0_5_TOUT5_P02_5_OUT.

Definition at line 187 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT

IfxGtm_ATOM0_6_TOUT106_P10_4_OUT.

Definition at line 188 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT

IfxGtm_ATOM0_6_TOUT16_P00_7_OUT.

Definition at line 189 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT

IfxGtm_ATOM0_6_TOUT24_P33_2_OUT.

Definition at line 190 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT

IfxGtm_ATOM0_6_TOUT42_P23_1_OUT.

Definition at line 191 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT

IfxGtm_ATOM0_6_TOUT59_P20_0_OUT.

Definition at line 192 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT

IfxGtm_ATOM0_6_TOUT6_P02_6_OUT.

Definition at line 193 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT

IfxGtm_ATOM0_7_TOUT17_P00_8_OUT.

Definition at line 194 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT

IfxGtm_ATOM0_7_TOUT25_P33_3_OUT.

Definition at line 195 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT

IfxGtm_ATOM0_7_TOUT45_P23_4_OUT.

Definition at line 196 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT

IfxGtm_ATOM0_7_TOUT64_P20_8_OUT.

Definition at line 197 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT

IfxGtm_ATOM0_7_TOUT7_P02_7_OUT.

Definition at line 198 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT

IfxGtm_ATOM1_0_TOUT0_P02_0_OUT.

Definition at line 199 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT

IfxGtm_ATOM1_0_TOUT109_P10_7_OUT.

Definition at line 200 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT

IfxGtm_ATOM1_0_TOUT48_P22_1_OUT.

Definition at line 201 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT

IfxGtm_ATOM1_0_TOUT53_P21_2_OUT.

Definition at line 202 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT

IfxGtm_ATOM1_0_TOUT68_P20_12_OUT.

Definition at line 203 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT

IfxGtm_ATOM1_0_TOUT76_P15_5_OUT.

Definition at line 204 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT

IfxGtm_ATOM1_0_TOUT77_P15_6_OUT.

Definition at line 205 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT

IfxGtm_ATOM1_0_TOUT87_P14_7_OUT.

Definition at line 206 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT

IfxGtm_ATOM1_0_TOUT8_P02_8_OUT.

Definition at line 207 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT

IfxGtm_ATOM1_0_TOUT9_P00_0_OUT.

Definition at line 208 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT

IfxGtm_ATOM1_1_TOUT103_P10_1_OUT.

Definition at line 209 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT

IfxGtm_ATOM1_1_TOUT10_P00_1_OUT.

Definition at line 210 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT

IfxGtm_ATOM1_1_TOUT11_P00_2_OUT.

Definition at line 211 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT

IfxGtm_ATOM1_1_TOUT1_P02_1_OUT.

Definition at line 212 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT

IfxGtm_ATOM1_1_TOUT31_P33_9_OUT.

Definition at line 213 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT47_P22_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT

IfxGtm_ATOM1_1_TOUT47_P22_0_OUT.

Definition at line 214 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT

IfxGtm_ATOM1_1_TOUT54_P21_3_OUT.

Definition at line 215 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT

IfxGtm_ATOM1_1_TOUT69_P20_13_OUT.

Definition at line 216 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT

IfxGtm_ATOM1_1_TOUT78_P15_7_OUT.

Definition at line 217 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT

IfxGtm_ATOM1_1_TOUT79_P15_8_OUT.

Definition at line 218 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT

IfxGtm_ATOM1_1_TOUT86_P14_6_OUT.

Definition at line 219 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT

IfxGtm_ATOM1_2_TOUT104_P10_2_OUT.

Definition at line 220 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT

IfxGtm_ATOM1_2_TOUT107_P10_5_OUT.

Definition at line 221 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT

IfxGtm_ATOM1_2_TOUT12_P00_3_OUT.

Definition at line 222 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT

IfxGtm_ATOM1_2_TOUT2_P02_2_OUT.

Definition at line 223 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT

IfxGtm_ATOM1_2_TOUT33_P33_11_OUT.

Definition at line 224 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT

IfxGtm_ATOM1_2_TOUT46_P23_5_OUT.

Definition at line 225 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT

IfxGtm_ATOM1_2_TOUT55_P21_4_OUT.

Definition at line 226 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT

IfxGtm_ATOM1_2_TOUT70_P20_14_OUT.

Definition at line 227 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT

IfxGtm_ATOM1_2_TOUT80_P14_0_OUT.

Definition at line 228 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT

IfxGtm_ATOM1_3_TOUT105_P10_3_OUT.

Definition at line 229 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT

IfxGtm_ATOM1_3_TOUT108_P10_6_OUT.

Definition at line 230 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT

IfxGtm_ATOM1_3_TOUT13_P00_4_OUT.

Definition at line 231 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT

IfxGtm_ATOM1_3_TOUT38_P32_2_OUT.

Definition at line 232 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT

IfxGtm_ATOM1_3_TOUT3_P02_3_OUT.

Definition at line 233 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT

IfxGtm_ATOM1_3_TOUT49_P22_2_OUT.

Definition at line 234 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT

IfxGtm_ATOM1_3_TOUT56_P21_5_OUT.

Definition at line 235 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT

IfxGtm_ATOM1_3_TOUT60_P20_1_OUT.

Definition at line 236 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT

IfxGtm_ATOM1_3_TOUT71_P15_0_OUT.

Definition at line 237 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT

IfxGtm_ATOM1_4_TOUT102_P10_0_OUT.

Definition at line 238 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT

IfxGtm_ATOM1_4_TOUT14_P00_5_OUT.

Definition at line 239 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT

IfxGtm_ATOM1_4_TOUT39_P32_3_OUT.

Definition at line 240 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT

IfxGtm_ATOM1_4_TOUT4_P02_4_OUT.

Definition at line 241 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT

IfxGtm_ATOM1_4_TOUT50_P22_3_OUT.

Definition at line 242 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT

IfxGtm_ATOM1_4_TOUT57_P21_6_OUT.

Definition at line 243 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT

IfxGtm_ATOM1_4_TOUT61_P20_3_OUT.

Definition at line 244 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT

IfxGtm_ATOM1_4_TOUT72_P15_1_OUT.

Definition at line 245 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT

IfxGtm_ATOM1_5_TOUT110_P10_8_OUT.

Definition at line 246 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT

IfxGtm_ATOM1_5_TOUT15_P00_6_OUT.

Definition at line 247 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT

IfxGtm_ATOM1_5_TOUT23_P33_1_OUT.

Definition at line 248 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT

IfxGtm_ATOM1_5_TOUT40_P32_4_OUT.

Definition at line 249 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT

IfxGtm_ATOM1_5_TOUT41_P23_0_OUT.

Definition at line 250 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT

IfxGtm_ATOM1_5_TOUT58_P21_7_OUT.

Definition at line 251 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT

IfxGtm_ATOM1_5_TOUT5_P02_5_OUT.

Definition at line 252 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT

IfxGtm_ATOM1_5_TOUT65_P20_9_OUT.

Definition at line 253 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT

IfxGtm_ATOM1_5_TOUT73_P15_2_OUT.

Definition at line 254 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT

IfxGtm_ATOM1_6_TOUT106_P10_4_OUT.

Definition at line 255 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT

IfxGtm_ATOM1_6_TOUT16_P00_7_OUT.

Definition at line 256 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT

IfxGtm_ATOM1_6_TOUT24_P33_2_OUT.

Definition at line 257 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT

IfxGtm_ATOM1_6_TOUT42_P23_1_OUT.

Definition at line 258 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT

IfxGtm_ATOM1_6_TOUT59_P20_0_OUT.

Definition at line 259 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT

IfxGtm_ATOM1_6_TOUT66_P20_10_OUT.

Definition at line 260 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT

IfxGtm_ATOM1_6_TOUT6_P02_6_OUT.

Definition at line 261 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT

IfxGtm_ATOM1_6_TOUT74_P15_3_OUT.

Definition at line 262 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT

IfxGtm_ATOM1_7_TOUT17_P00_8_OUT.

Definition at line 263 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT

IfxGtm_ATOM1_7_TOUT25_P33_3_OUT.

Definition at line 264 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT

IfxGtm_ATOM1_7_TOUT45_P23_4_OUT.

Definition at line 265 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT

IfxGtm_ATOM1_7_TOUT67_P20_11_OUT.

Definition at line 266 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT

IfxGtm_ATOM1_7_TOUT75_P15_4_OUT.

Definition at line 267 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT

IfxGtm_ATOM1_7_TOUT7_P02_7_OUT.

Definition at line 268 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT

IfxGtm_ATOM2_0_TOUT18_P00_9_OUT.

Definition at line 269 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT

IfxGtm_ATOM2_0_TOUT26_P33_4_OUT.

Definition at line 270 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT

IfxGtm_ATOM2_0_TOUT32_P33_10_OUT.

Definition at line 271 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT

IfxGtm_ATOM2_0_TOUT68_P20_12_OUT.

Definition at line 272 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT

IfxGtm_ATOM2_0_TOUT94_P13_3_OUT.

Definition at line 273 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT

IfxGtm_ATOM2_1_TOUT19_P00_10_OUT.

Definition at line 274 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT

IfxGtm_ATOM2_1_TOUT27_P33_5_OUT.

Definition at line 275 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT

IfxGtm_ATOM2_1_TOUT43_P23_2_OUT.

Definition at line 276 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT

IfxGtm_ATOM2_1_TOUT69_P20_13_OUT.

Definition at line 277 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT

IfxGtm_ATOM2_1_TOUT95_P11_2_OUT.

Definition at line 278 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT

IfxGtm_ATOM2_2_TOUT20_P00_11_OUT.

Definition at line 279 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT

IfxGtm_ATOM2_2_TOUT28_P33_6_OUT.

Definition at line 280 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT

IfxGtm_ATOM2_2_TOUT44_P23_3_OUT.

Definition at line 281 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT

IfxGtm_ATOM2_2_TOUT70_P20_14_OUT.

Definition at line 282 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT

IfxGtm_ATOM2_2_TOUT88_P14_8_OUT.

Definition at line 283 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT

IfxGtm_ATOM2_2_TOUT96_P11_3_OUT.

Definition at line 284 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT

IfxGtm_ATOM2_3_TOUT21_P00_12_OUT.

Definition at line 285 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT

IfxGtm_ATOM2_3_TOUT29_P33_7_OUT.

Definition at line 286 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT

IfxGtm_ATOM2_3_TOUT71_P15_0_OUT.

Definition at line 287 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT

IfxGtm_ATOM2_3_TOUT89_P14_9_OUT.

Definition at line 288 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT

IfxGtm_ATOM2_3_TOUT97_P11_6_OUT.

Definition at line 289 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT

IfxGtm_ATOM2_4_TOUT22_P33_0_OUT.

Definition at line 290 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT

IfxGtm_ATOM2_4_TOUT30_P33_8_OUT.

Definition at line 291 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT

IfxGtm_ATOM2_4_TOUT34_P33_12_OUT.

Definition at line 292 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT

IfxGtm_ATOM2_4_TOUT51_P21_0_OUT.

Definition at line 293 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT

IfxGtm_ATOM2_4_TOUT72_P15_1_OUT.

Definition at line 294 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT

IfxGtm_ATOM2_4_TOUT90_P14_10_OUT.

Definition at line 295 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT

IfxGtm_ATOM2_4_TOUT98_P11_9_OUT.

Definition at line 296 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT

IfxGtm_ATOM2_5_TOUT35_P33_13_OUT.

Definition at line 297 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT

IfxGtm_ATOM2_5_TOUT52_P21_1_OUT.

Definition at line 298 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT

IfxGtm_ATOM2_5_TOUT65_P20_9_OUT.

Definition at line 299 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT

IfxGtm_ATOM2_5_TOUT73_P15_2_OUT.

Definition at line 300 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT

IfxGtm_ATOM2_5_TOUT91_P13_0_OUT.

Definition at line 301 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT

IfxGtm_ATOM2_5_TOUT99_P11_10_OUT.

Definition at line 302 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT

IfxGtm_ATOM2_6_TOUT100_P11_11_OUT.

Definition at line 303 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT

IfxGtm_ATOM2_6_TOUT36_P32_0_OUT.

Definition at line 304 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT

IfxGtm_ATOM2_6_TOUT62_P20_6_OUT.

Definition at line 305 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT

IfxGtm_ATOM2_6_TOUT66_P20_10_OUT.

Definition at line 306 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT

IfxGtm_ATOM2_6_TOUT74_P15_3_OUT.

Definition at line 307 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT

IfxGtm_ATOM2_6_TOUT92_P13_1_OUT.

Definition at line 308 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT

IfxGtm_ATOM2_7_TOUT101_P11_12_OUT.

Definition at line 309 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT

IfxGtm_ATOM2_7_TOUT63_P20_7_OUT.

Definition at line 310 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT

IfxGtm_ATOM2_7_TOUT64_P20_8_OUT.

Definition at line 311 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT

IfxGtm_ATOM2_7_TOUT67_P20_11_OUT.

Definition at line 312 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT

IfxGtm_ATOM2_7_TOUT75_P15_4_OUT.

Definition at line 313 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT

IfxGtm_ATOM2_7_TOUT93_P13_2_OUT.

Definition at line 314 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT

IfxGtm_ATOM3_0_TOUT18_P00_9_OUT.

Definition at line 315 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT

IfxGtm_ATOM3_0_TOUT26_P33_4_OUT.

Definition at line 316 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT

IfxGtm_ATOM3_0_TOUT32_P33_10_OUT.

Definition at line 317 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT

IfxGtm_ATOM3_0_TOUT76_P15_5_OUT.

Definition at line 318 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT

IfxGtm_ATOM3_0_TOUT77_P15_6_OUT.

Definition at line 319 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT

IfxGtm_ATOM3_0_TOUT85_P14_5_OUT.

Definition at line 320 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT

IfxGtm_ATOM3_0_TOUT87_P14_7_OUT.

Definition at line 321 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT

IfxGtm_ATOM3_0_TOUT94_P13_3_OUT.

Definition at line 322 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT

IfxGtm_ATOM3_1_TOUT19_P00_10_OUT.

Definition at line 323 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT

IfxGtm_ATOM3_1_TOUT27_P33_5_OUT.

Definition at line 324 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT

IfxGtm_ATOM3_1_TOUT43_P23_2_OUT.

Definition at line 325 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT

IfxGtm_ATOM3_1_TOUT78_P15_7_OUT.

Definition at line 326 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT

IfxGtm_ATOM3_1_TOUT79_P15_8_OUT.

Definition at line 327 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT

IfxGtm_ATOM3_1_TOUT84_P14_4_OUT.

Definition at line 328 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT

IfxGtm_ATOM3_1_TOUT86_P14_6_OUT.

Definition at line 329 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT

IfxGtm_ATOM3_1_TOUT95_P11_2_OUT.

Definition at line 330 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT

IfxGtm_ATOM3_2_TOUT20_P00_11_OUT.

Definition at line 331 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT

IfxGtm_ATOM3_2_TOUT28_P33_6_OUT.

Definition at line 332 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT

IfxGtm_ATOM3_2_TOUT44_P23_3_OUT.

Definition at line 333 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT

IfxGtm_ATOM3_2_TOUT80_P14_0_OUT.

Definition at line 334 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT83_P14_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT

IfxGtm_ATOM3_2_TOUT83_P14_3_OUT.

Definition at line 335 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT

IfxGtm_ATOM3_2_TOUT88_P14_8_OUT.

Definition at line 336 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT

IfxGtm_ATOM3_2_TOUT96_P11_3_OUT.

Definition at line 337 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT

IfxGtm_ATOM3_3_TOUT21_P00_12_OUT.

Definition at line 338 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT

IfxGtm_ATOM3_3_TOUT29_P33_7_OUT.

Definition at line 339 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT

IfxGtm_ATOM3_3_TOUT82_P14_2_OUT.

Definition at line 340 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT

IfxGtm_ATOM3_3_TOUT89_P14_9_OUT.

Definition at line 341 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT

IfxGtm_ATOM3_3_TOUT97_P11_6_OUT.

Definition at line 342 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT

IfxGtm_ATOM3_4_TOUT22_P33_0_OUT.

Definition at line 343 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT

IfxGtm_ATOM3_4_TOUT30_P33_8_OUT.

Definition at line 344 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT

IfxGtm_ATOM3_4_TOUT34_P33_12_OUT.

Definition at line 345 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT

IfxGtm_ATOM3_4_TOUT51_P21_0_OUT.

Definition at line 346 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT

IfxGtm_ATOM3_4_TOUT81_P14_1_OUT.

Definition at line 347 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT

IfxGtm_ATOM3_4_TOUT90_P14_10_OUT.

Definition at line 348 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT

IfxGtm_ATOM3_4_TOUT98_P11_9_OUT.

Definition at line 349 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT

IfxGtm_ATOM3_5_TOUT35_P33_13_OUT.

Definition at line 350 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT

IfxGtm_ATOM3_5_TOUT52_P21_1_OUT.

Definition at line 351 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT

IfxGtm_ATOM3_5_TOUT91_P13_0_OUT.

Definition at line 352 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT

IfxGtm_ATOM3_5_TOUT99_P11_10_OUT.

Definition at line 353 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT

IfxGtm_ATOM3_6_TOUT100_P11_11_OUT.

Definition at line 354 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT

IfxGtm_ATOM3_6_TOUT36_P32_0_OUT.

Definition at line 355 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT

IfxGtm_ATOM3_6_TOUT62_P20_6_OUT.

Definition at line 356 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT

IfxGtm_ATOM3_6_TOUT92_P13_1_OUT.

Definition at line 357 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_7_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT

IfxGtm_ATOM3_7_TOUT101_P11_12_OUT.

Definition at line 358 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_7_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT

IfxGtm_ATOM3_7_TOUT63_P20_7_OUT.

Definition at line 359 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_7_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT

IfxGtm_ATOM3_7_TOUT93_P13_2_OUT.

Definition at line 360 of file IfxGtm_PinMap.h.

◆ IfxGtm_CLK0_P23_1_OUT

IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT

GTM_CLK0: GTM output.

Definition at line 361 of file IfxGtm_PinMap.h.

◆ IfxGtm_CLK1_P32_4_OUT

IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT

GTM_CLK1: GTM output.

Definition at line 362 of file IfxGtm_PinMap.h.

◆ IfxGtm_CLK2_P11_12_OUT

IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT

GTM_CLK2: GTM output.

Definition at line 363 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN0_P02_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN

IfxGtm_TIM0_0_TIN0_P02_0_IN.

Definition at line 364 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN109_P10_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN

IfxGtm_TIM0_0_TIN109_P10_7_IN.

Definition at line 365 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN18_P00_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN

IfxGtm_TIM0_0_TIN18_P00_9_IN.

Definition at line 366 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN26_P33_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN

IfxGtm_TIM0_0_TIN26_P33_4_IN.

Definition at line 367 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN32_P33_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN

IfxGtm_TIM0_0_TIN32_P33_10_IN.

Definition at line 368 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN34_P33_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN

IfxGtm_TIM0_0_TIN34_P33_12_IN.

Definition at line 369 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN48_P22_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN

IfxGtm_TIM0_0_TIN48_P22_1_IN.

Definition at line 370 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN53_P21_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN

IfxGtm_TIM0_0_TIN53_P21_2_IN.

Definition at line 371 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN77_P15_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN

IfxGtm_TIM0_0_TIN77_P15_6_IN.

Definition at line 372 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN85_P14_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN

IfxGtm_TIM0_0_TIN85_P14_5_IN.

Definition at line 373 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN87_P14_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN

IfxGtm_TIM0_0_TIN87_P14_7_IN.

Definition at line 374 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN8_P02_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN

IfxGtm_TIM0_0_TIN8_P02_8_IN.

Definition at line 375 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN9_P00_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN

IfxGtm_TIM0_0_TIN9_P00_0_IN.

Definition at line 376 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN103_P10_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN

IfxGtm_TIM0_1_TIN103_P10_1_IN.

Definition at line 377 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN10_P00_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN

IfxGtm_TIM0_1_TIN10_P00_1_IN.

Definition at line 378 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN11_P00_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN

IfxGtm_TIM0_1_TIN11_P00_2_IN.

Definition at line 379 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN19_P00_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN

IfxGtm_TIM0_1_TIN19_P00_10_IN.

Definition at line 380 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN1_P02_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN

IfxGtm_TIM0_1_TIN1_P02_1_IN.

Definition at line 381 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN27_P33_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN

IfxGtm_TIM0_1_TIN27_P33_5_IN.

Definition at line 382 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN31_P33_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN

IfxGtm_TIM0_1_TIN31_P33_9_IN.

Definition at line 383 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN35_P33_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN

IfxGtm_TIM0_1_TIN35_P33_13_IN.

Definition at line 384 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN47_P22_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN

IfxGtm_TIM0_1_TIN47_P22_0_IN.

Definition at line 385 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN54_P21_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN

IfxGtm_TIM0_1_TIN54_P21_3_IN.

Definition at line 386 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN78_P15_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN

IfxGtm_TIM0_1_TIN78_P15_7_IN.

Definition at line 387 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN86_P14_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN

IfxGtm_TIM0_1_TIN86_P14_6_IN.

Definition at line 388 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN104_P10_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN

IfxGtm_TIM0_2_TIN104_P10_2_IN.

Definition at line 389 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN107_P10_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN

IfxGtm_TIM0_2_TIN107_P10_5_IN.

Definition at line 390 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN20_P00_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN

IfxGtm_TIM0_2_TIN20_P00_11_IN.

Definition at line 391 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN28_P33_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN

IfxGtm_TIM0_2_TIN28_P33_6_IN.

Definition at line 392 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN2_P02_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN

IfxGtm_TIM0_2_TIN2_P02_2_IN.

Definition at line 393 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN33_P33_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN

IfxGtm_TIM0_2_TIN33_P33_11_IN.

Definition at line 394 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN36_P32_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN

IfxGtm_TIM0_2_TIN36_P32_0_IN.

Definition at line 395 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN46_P23_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN

IfxGtm_TIM0_2_TIN46_P23_5_IN.

Definition at line 396 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN55_P21_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN

IfxGtm_TIM0_2_TIN55_P21_4_IN.

Definition at line 397 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN79_P15_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN

IfxGtm_TIM0_2_TIN79_P15_8_IN.

Definition at line 398 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN105_P10_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN

IfxGtm_TIM0_3_TIN105_P10_3_IN.

Definition at line 399 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN108_P10_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN

IfxGtm_TIM0_3_TIN108_P10_6_IN.

Definition at line 400 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN21_P00_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN

IfxGtm_TIM0_3_TIN21_P00_12_IN.

Definition at line 401 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN29_P33_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN

IfxGtm_TIM0_3_TIN29_P33_7_IN.

Definition at line 402 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN38_P32_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN

IfxGtm_TIM0_3_TIN38_P32_2_IN.

Definition at line 403 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN3_P02_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN

IfxGtm_TIM0_3_TIN3_P02_3_IN.

Definition at line 404 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN49_P22_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN

IfxGtm_TIM0_3_TIN49_P22_2_IN.

Definition at line 405 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN51_P21_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN

IfxGtm_TIM0_3_TIN51_P21_0_IN.

Definition at line 406 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN56_P21_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN

IfxGtm_TIM0_3_TIN56_P21_5_IN.

Definition at line 407 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN60_P20_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN

IfxGtm_TIM0_3_TIN60_P20_1_IN.

Definition at line 408 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN80_P14_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN

IfxGtm_TIM0_3_TIN80_P14_0_IN.

Definition at line 409 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN102_P10_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN

IfxGtm_TIM0_4_TIN102_P10_0_IN.

Definition at line 410 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN22_P33_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN

IfxGtm_TIM0_4_TIN22_P33_0_IN.

Definition at line 411 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN30_P33_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN

IfxGtm_TIM0_4_TIN30_P33_8_IN.

Definition at line 412 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN39_P32_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN

IfxGtm_TIM0_4_TIN39_P32_3_IN.

Definition at line 413 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN4_P02_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN

IfxGtm_TIM0_4_TIN4_P02_4_IN.

Definition at line 414 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN50_P22_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN

IfxGtm_TIM0_4_TIN50_P22_3_IN.

Definition at line 415 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN52_P21_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN

IfxGtm_TIM0_4_TIN52_P21_1_IN.

Definition at line 416 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN57_P21_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN

IfxGtm_TIM0_4_TIN57_P21_6_IN.

Definition at line 417 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN61_P20_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN

IfxGtm_TIM0_4_TIN61_P20_3_IN.

Definition at line 418 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN81_P14_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN

IfxGtm_TIM0_4_TIN81_P14_1_IN.

Definition at line 419 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_TIN110_P10_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN

IfxGtm_TIM0_5_TIN110_P10_8_IN.

Definition at line 420 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_TIN23_P33_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN

IfxGtm_TIM0_5_TIN23_P33_1_IN.

Definition at line 421 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_TIN40_P32_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN

IfxGtm_TIM0_5_TIN40_P32_4_IN.

Definition at line 422 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_TIN41_P23_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN

IfxGtm_TIM0_5_TIN41_P23_0_IN.

Definition at line 423 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_TIN58_P21_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN

IfxGtm_TIM0_5_TIN58_P21_7_IN.

Definition at line 424 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_TIN5_P02_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN

IfxGtm_TIM0_5_TIN5_P02_5_IN.

Definition at line 425 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_TIN82_P14_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN

IfxGtm_TIM0_5_TIN82_P14_2_IN.

Definition at line 426 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_TIN106_P10_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN

IfxGtm_TIM0_6_TIN106_P10_4_IN.

Definition at line 427 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_TIN24_P33_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN

IfxGtm_TIM0_6_TIN24_P33_2_IN.

Definition at line 428 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_TIN42_P23_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN

IfxGtm_TIM0_6_TIN42_P23_1_IN.

Definition at line 429 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_TIN43_P23_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN

IfxGtm_TIM0_6_TIN43_P23_2_IN.

Definition at line 430 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_TIN59_P20_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN

IfxGtm_TIM0_6_TIN59_P20_0_IN.

Definition at line 431 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_TIN62_P20_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN

IfxGtm_TIM0_6_TIN62_P20_6_IN.

Definition at line 432 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_TIN83_P14_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN

IfxGtm_TIM0_6_TIN83_P14_3_IN.

Definition at line 433 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_TIN25_P33_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN

IfxGtm_TIM0_7_TIN25_P33_3_IN.

Definition at line 434 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_TIN44_P23_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN

IfxGtm_TIM0_7_TIN44_P23_3_IN.

Definition at line 435 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_TIN45_P23_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN

IfxGtm_TIM0_7_TIN45_P23_4_IN.

Definition at line 436 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_TIN63_P20_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN

IfxGtm_TIM0_7_TIN63_P20_7_IN.

Definition at line 437 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_TIN64_P20_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN

IfxGtm_TIM0_7_TIN64_P20_8_IN.

Definition at line 438 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_TIN7_P02_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN

IfxGtm_TIM0_7_TIN7_P02_7_IN.

Definition at line 439 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_TIN84_P14_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN

IfxGtm_TIM0_7_TIN84_P14_4_IN.

Definition at line 440 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN0_P02_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN

IfxGtm_TIM1_0_TIN0_P02_0_IN.

Definition at line 441 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN109_P10_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN

IfxGtm_TIM1_0_TIN109_P10_7_IN.

Definition at line 442 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN18_P00_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN

IfxGtm_TIM1_0_TIN18_P00_9_IN.

Definition at line 443 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN26_P33_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN

IfxGtm_TIM1_0_TIN26_P33_4_IN.

Definition at line 444 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN32_P33_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN

IfxGtm_TIM1_0_TIN32_P33_10_IN.

Definition at line 445 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN48_P22_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN

IfxGtm_TIM1_0_TIN48_P22_1_IN.

Definition at line 446 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN53_P21_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN

IfxGtm_TIM1_0_TIN53_P21_2_IN.

Definition at line 447 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN68_P20_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN

IfxGtm_TIM1_0_TIN68_P20_12_IN.

Definition at line 448 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN76_P15_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN

IfxGtm_TIM1_0_TIN76_P15_5_IN.

Definition at line 449 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN77_P15_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN

IfxGtm_TIM1_0_TIN77_P15_6_IN.

Definition at line 450 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN85_P14_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN

IfxGtm_TIM1_0_TIN85_P14_5_IN.

Definition at line 451 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN87_P14_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN

IfxGtm_TIM1_0_TIN87_P14_7_IN.

Definition at line 452 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN94_P13_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN

IfxGtm_TIM1_0_TIN94_P13_3_IN.

Definition at line 453 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN103_P10_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN

IfxGtm_TIM1_1_TIN103_P10_1_IN.

Definition at line 454 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN19_P00_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN

IfxGtm_TIM1_1_TIN19_P00_10_IN.

Definition at line 455 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN1_P02_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN

IfxGtm_TIM1_1_TIN1_P02_1_IN.

Definition at line 456 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN27_P33_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN

IfxGtm_TIM1_1_TIN27_P33_5_IN.

Definition at line 457 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN31_P33_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN

IfxGtm_TIM1_1_TIN31_P33_9_IN.

Definition at line 458 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN47_P22_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN

IfxGtm_TIM1_1_TIN47_P22_0_IN.

Definition at line 459 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN54_P21_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN

IfxGtm_TIM1_1_TIN54_P21_3_IN.

Definition at line 460 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN69_P20_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN

IfxGtm_TIM1_1_TIN69_P20_13_IN.

Definition at line 461 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN78_P15_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN

IfxGtm_TIM1_1_TIN78_P15_7_IN.

Definition at line 462 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN86_P14_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN

IfxGtm_TIM1_1_TIN86_P14_6_IN.

Definition at line 463 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN95_P11_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN

IfxGtm_TIM1_1_TIN95_P11_2_IN.

Definition at line 464 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN104_P10_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN

IfxGtm_TIM1_2_TIN104_P10_2_IN.

Definition at line 465 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN107_P10_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN

IfxGtm_TIM1_2_TIN107_P10_5_IN.

Definition at line 466 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN12_P00_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN

IfxGtm_TIM1_2_TIN12_P00_3_IN.

Definition at line 467 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN20_P00_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN

IfxGtm_TIM1_2_TIN20_P00_11_IN.

Definition at line 468 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN28_P33_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN

IfxGtm_TIM1_2_TIN28_P33_6_IN.

Definition at line 469 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN2_P02_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN

IfxGtm_TIM1_2_TIN2_P02_2_IN.

Definition at line 470 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN33_P33_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN

IfxGtm_TIM1_2_TIN33_P33_11_IN.

Definition at line 471 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN46_P23_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN

IfxGtm_TIM1_2_TIN46_P23_5_IN.

Definition at line 472 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN55_P21_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN

IfxGtm_TIM1_2_TIN55_P21_4_IN.

Definition at line 473 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN70_P20_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN

IfxGtm_TIM1_2_TIN70_P20_14_IN.

Definition at line 474 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN79_P15_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN

IfxGtm_TIM1_2_TIN79_P15_8_IN.

Definition at line 475 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN96_P11_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN

IfxGtm_TIM1_2_TIN96_P11_3_IN.

Definition at line 476 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN105_P10_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN

IfxGtm_TIM1_3_TIN105_P10_3_IN.

Definition at line 477 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN108_P10_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN

IfxGtm_TIM1_3_TIN108_P10_6_IN.

Definition at line 478 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN13_P00_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN

IfxGtm_TIM1_3_TIN13_P00_4_IN.

Definition at line 479 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN21_P00_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN

IfxGtm_TIM1_3_TIN21_P00_12_IN.

Definition at line 480 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN29_P33_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN

IfxGtm_TIM1_3_TIN29_P33_7_IN.

Definition at line 481 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN38_P32_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN

IfxGtm_TIM1_3_TIN38_P32_2_IN.

Definition at line 482 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN3_P02_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN

IfxGtm_TIM1_3_TIN3_P02_3_IN.

Definition at line 483 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN49_P22_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN

IfxGtm_TIM1_3_TIN49_P22_2_IN.

Definition at line 484 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN56_P21_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN

IfxGtm_TIM1_3_TIN56_P21_5_IN.

Definition at line 485 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN71_P15_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN

IfxGtm_TIM1_3_TIN71_P15_0_IN.

Definition at line 486 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN80_P14_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN

IfxGtm_TIM1_3_TIN80_P14_0_IN.

Definition at line 487 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN97_P11_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN

IfxGtm_TIM1_3_TIN97_P11_6_IN.

Definition at line 488 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN102_P10_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN

IfxGtm_TIM1_4_TIN102_P10_0_IN.

Definition at line 489 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN14_P00_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN

IfxGtm_TIM1_4_TIN14_P00_5_IN.

Definition at line 490 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN22_P33_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN

IfxGtm_TIM1_4_TIN22_P33_0_IN.

Definition at line 491 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN30_P33_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN

IfxGtm_TIM1_4_TIN30_P33_8_IN.

Definition at line 492 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN39_P32_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN

IfxGtm_TIM1_4_TIN39_P32_3_IN.

Definition at line 493 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN4_P02_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN

IfxGtm_TIM1_4_TIN4_P02_4_IN.

Definition at line 494 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN50_P22_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN

IfxGtm_TIM1_4_TIN50_P22_3_IN.

Definition at line 495 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN57_P21_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN

IfxGtm_TIM1_4_TIN57_P21_6_IN.

Definition at line 496 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN72_P15_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN

IfxGtm_TIM1_4_TIN72_P15_1_IN.

Definition at line 497 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN81_P14_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN

IfxGtm_TIM1_4_TIN81_P14_1_IN.

Definition at line 498 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN98_P11_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN

IfxGtm_TIM1_4_TIN98_P11_9_IN.

Definition at line 499 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN110_P10_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN

IfxGtm_TIM1_5_TIN110_P10_8_IN.

Definition at line 500 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN15_P00_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN

IfxGtm_TIM1_5_TIN15_P00_6_IN.

Definition at line 501 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN40_P32_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN

IfxGtm_TIM1_5_TIN40_P32_4_IN.

Definition at line 502 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN41_P23_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN

IfxGtm_TIM1_5_TIN41_P23_0_IN.

Definition at line 503 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN58_P21_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN

IfxGtm_TIM1_5_TIN58_P21_7_IN.

Definition at line 504 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN5_P02_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN

IfxGtm_TIM1_5_TIN5_P02_5_IN.

Definition at line 505 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN65_P20_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN

IfxGtm_TIM1_5_TIN65_P20_9_IN.

Definition at line 506 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN73_P15_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN

IfxGtm_TIM1_5_TIN73_P15_2_IN.

Definition at line 507 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN82_P14_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN

IfxGtm_TIM1_5_TIN82_P14_2_IN.

Definition at line 508 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN91_P13_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN

IfxGtm_TIM1_5_TIN91_P13_0_IN.

Definition at line 509 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN99_P11_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN

IfxGtm_TIM1_5_TIN99_P11_10_IN.

Definition at line 510 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN100_P11_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN

IfxGtm_TIM1_6_TIN100_P11_11_IN.

Definition at line 511 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN106_P10_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN

IfxGtm_TIM1_6_TIN106_P10_4_IN.

Definition at line 512 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN16_P00_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN

IfxGtm_TIM1_6_TIN16_P00_7_IN.

Definition at line 513 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN24_P33_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN

IfxGtm_TIM1_6_TIN24_P33_2_IN.

Definition at line 514 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN42_P23_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN

IfxGtm_TIM1_6_TIN42_P23_1_IN.

Definition at line 515 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN43_P23_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN

IfxGtm_TIM1_6_TIN43_P23_2_IN.

Definition at line 516 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN59_P20_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN

IfxGtm_TIM1_6_TIN59_P20_0_IN.

Definition at line 517 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN66_P20_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN

IfxGtm_TIM1_6_TIN66_P20_10_IN.

Definition at line 518 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN6_P02_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN

IfxGtm_TIM1_6_TIN6_P02_6_IN.

Definition at line 519 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN74_P15_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN

IfxGtm_TIM1_6_TIN74_P15_3_IN.

Definition at line 520 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN83_P14_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN

IfxGtm_TIM1_6_TIN83_P14_3_IN.

Definition at line 521 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN92_P13_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN

IfxGtm_TIM1_6_TIN92_P13_1_IN.

Definition at line 522 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN101_P11_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN

IfxGtm_TIM1_7_TIN101_P11_12_IN.

Definition at line 523 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN17_P00_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN

IfxGtm_TIM1_7_TIN17_P00_8_IN.

Definition at line 524 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN25_P33_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN

IfxGtm_TIM1_7_TIN25_P33_3_IN.

Definition at line 525 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN44_P23_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN

IfxGtm_TIM1_7_TIN44_P23_3_IN.

Definition at line 526 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN45_P23_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN

IfxGtm_TIM1_7_TIN45_P23_4_IN.

Definition at line 527 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN64_P20_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN

IfxGtm_TIM1_7_TIN64_P20_8_IN.

Definition at line 528 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN67_P20_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN

IfxGtm_TIM1_7_TIN67_P20_11_IN.

Definition at line 529 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN75_P15_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN

IfxGtm_TIM1_7_TIN75_P15_4_IN.

Definition at line 530 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN7_P02_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN

IfxGtm_TIM1_7_TIN7_P02_7_IN.

Definition at line 531 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN84_P14_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN

IfxGtm_TIM1_7_TIN84_P14_4_IN.

Definition at line 532 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN93_P13_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN

IfxGtm_TIM1_7_TIN93_P13_2_IN.

Definition at line 533 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_TIN34_P33_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN

IfxGtm_TIM2_0_TIN34_P33_12_IN.

Definition at line 534 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_TIN68_P20_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN

IfxGtm_TIM2_0_TIN68_P20_12_IN.

Definition at line 535 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_TIN76_P15_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN

IfxGtm_TIM2_0_TIN76_P15_5_IN.

Definition at line 536 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_TIN8_P02_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN

IfxGtm_TIM2_0_TIN8_P02_8_IN.

Definition at line 537 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_TIN94_P13_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN

IfxGtm_TIM2_0_TIN94_P13_3_IN.

Definition at line 538 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_TIN9_P00_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN

IfxGtm_TIM2_0_TIN9_P00_0_IN.

Definition at line 539 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_TIN10_P00_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN

IfxGtm_TIM2_1_TIN10_P00_1_IN.

Definition at line 540 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_TIN11_P00_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN

IfxGtm_TIM2_1_TIN11_P00_2_IN.

Definition at line 541 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_TIN35_P33_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN

IfxGtm_TIM2_1_TIN35_P33_13_IN.

Definition at line 542 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_TIN69_P20_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN

IfxGtm_TIM2_1_TIN69_P20_13_IN.

Definition at line 543 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_TIN95_P11_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN

IfxGtm_TIM2_1_TIN95_P11_2_IN.

Definition at line 544 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_TIN12_P00_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN

IfxGtm_TIM2_2_TIN12_P00_3_IN.

Definition at line 545 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_TIN36_P32_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN

IfxGtm_TIM2_2_TIN36_P32_0_IN.

Definition at line 546 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_TIN70_P20_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN

IfxGtm_TIM2_2_TIN70_P20_14_IN.

Definition at line 547 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_TIN88_P14_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN

IfxGtm_TIM2_2_TIN88_P14_8_IN.

Definition at line 548 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_TIN96_P11_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN

IfxGtm_TIM2_2_TIN96_P11_3_IN.

Definition at line 549 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_TIN13_P00_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN

IfxGtm_TIM2_3_TIN13_P00_4_IN.

Definition at line 550 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_TIN60_P20_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN

IfxGtm_TIM2_3_TIN60_P20_1_IN.

Definition at line 551 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_TIN71_P15_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN

IfxGtm_TIM2_3_TIN71_P15_0_IN.

Definition at line 552 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_TIN89_P14_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN

IfxGtm_TIM2_3_TIN89_P14_9_IN.

Definition at line 553 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_TIN97_P11_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN

IfxGtm_TIM2_3_TIN97_P11_6_IN.

Definition at line 554 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_TIN14_P00_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN

IfxGtm_TIM2_4_TIN14_P00_5_IN.

Definition at line 555 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_TIN51_P21_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN

IfxGtm_TIM2_4_TIN51_P21_0_IN.

Definition at line 556 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_TIN61_P20_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN

IfxGtm_TIM2_4_TIN61_P20_3_IN.

Definition at line 557 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_TIN72_P15_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN

IfxGtm_TIM2_4_TIN72_P15_1_IN.

Definition at line 558 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_TIN90_P14_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN

IfxGtm_TIM2_4_TIN90_P14_10_IN.

Definition at line 559 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_TIN98_P11_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN

IfxGtm_TIM2_4_TIN98_P11_9_IN.

Definition at line 560 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_TIN15_P00_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN

IfxGtm_TIM2_5_TIN15_P00_6_IN.

Definition at line 561 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_TIN52_P21_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN

IfxGtm_TIM2_5_TIN52_P21_1_IN.

Definition at line 562 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_TIN65_P20_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN

IfxGtm_TIM2_5_TIN65_P20_9_IN.

Definition at line 563 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_TIN73_P15_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN

IfxGtm_TIM2_5_TIN73_P15_2_IN.

Definition at line 564 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_TIN91_P13_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN

IfxGtm_TIM2_5_TIN91_P13_0_IN.

Definition at line 565 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_TIN99_P11_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN

IfxGtm_TIM2_5_TIN99_P11_10_IN.

Definition at line 566 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_TIN100_P11_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN

IfxGtm_TIM2_6_TIN100_P11_11_IN.

Definition at line 567 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_TIN16_P00_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN

IfxGtm_TIM2_6_TIN16_P00_7_IN.

Definition at line 568 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_TIN62_P20_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN

IfxGtm_TIM2_6_TIN62_P20_6_IN.

Definition at line 569 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_TIN66_P20_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN

IfxGtm_TIM2_6_TIN66_P20_10_IN.

Definition at line 570 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_TIN74_P15_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN

IfxGtm_TIM2_6_TIN74_P15_3_IN.

Definition at line 571 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_TIN92_P13_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN

IfxGtm_TIM2_6_TIN92_P13_1_IN.

Definition at line 572 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_TIN101_P11_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN

IfxGtm_TIM2_7_TIN101_P11_12_IN.

Definition at line 573 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_TIN17_P00_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN

IfxGtm_TIM2_7_TIN17_P00_8_IN.

Definition at line 574 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_TIN63_P20_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN

IfxGtm_TIM2_7_TIN63_P20_7_IN.

Definition at line 575 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_TIN67_P20_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN

IfxGtm_TIM2_7_TIN67_P20_11_IN.

Definition at line 576 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_TIN75_P15_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN

IfxGtm_TIM2_7_TIN75_P15_4_IN.

Definition at line 577 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_TIN93_P13_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN

IfxGtm_TIM2_7_TIN93_P13_2_IN.

Definition at line 578 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT

IfxGtm_TOM0_0_TOUT109_P10_7_OUT.

Definition at line 579 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT

IfxGtm_TOM0_0_TOUT18_P00_9_OUT.

Definition at line 580 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT

IfxGtm_TOM0_0_TOUT26_P33_4_OUT.

Definition at line 581 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT

IfxGtm_TOM0_0_TOUT32_P33_10_OUT.

Definition at line 582 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT

IfxGtm_TOM0_0_TOUT53_P21_2_OUT.

Definition at line 583 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT

IfxGtm_TOM0_0_TOUT76_P15_5_OUT.

Definition at line 584 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT

IfxGtm_TOM0_0_TOUT77_P15_6_OUT.

Definition at line 585 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT

IfxGtm_TOM0_0_TOUT85_P14_5_OUT.

Definition at line 586 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT

IfxGtm_TOM0_0_TOUT87_P14_7_OUT.

Definition at line 587 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT

IfxGtm_TOM0_10_TOUT12_P00_3_OUT.

Definition at line 588 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT

IfxGtm_TOM0_10_TOUT2_P02_2_OUT.

Definition at line 589 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT

IfxGtm_TOM0_10_TOUT41_P23_0_OUT.

Definition at line 590 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT

IfxGtm_TOM0_10_TOUT46_P23_5_OUT.

Definition at line 591 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT

IfxGtm_TOM0_10_TOUT62_P20_6_OUT.

Definition at line 592 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT

IfxGtm_TOM0_10_TOUT70_P20_14_OUT.

Definition at line 593 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT

IfxGtm_TOM0_10_TOUT96_P11_3_OUT.

Definition at line 594 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT

IfxGtm_TOM0_11_TOUT13_P00_4_OUT.

Definition at line 595 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT

IfxGtm_TOM0_11_TOUT3_P02_3_OUT.

Definition at line 596 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT

IfxGtm_TOM0_11_TOUT43_P23_2_OUT.

Definition at line 597 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT

IfxGtm_TOM0_11_TOUT49_P22_2_OUT.

Definition at line 598 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT

IfxGtm_TOM0_11_TOUT63_P20_7_OUT.

Definition at line 599 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT

IfxGtm_TOM0_11_TOUT71_P15_0_OUT.

Definition at line 600 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT

IfxGtm_TOM0_11_TOUT97_P11_6_OUT.

Definition at line 601 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT

IfxGtm_TOM0_12_TOUT14_P00_5_OUT.

Definition at line 602 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT

IfxGtm_TOM0_12_TOUT34_P33_12_OUT.

Definition at line 603 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT

IfxGtm_TOM0_12_TOUT44_P23_3_OUT.

Definition at line 604 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT

IfxGtm_TOM0_12_TOUT4_P02_4_OUT.

Definition at line 605 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT

IfxGtm_TOM0_12_TOUT50_P22_3_OUT.

Definition at line 606 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT

IfxGtm_TOM0_12_TOUT72_P15_1_OUT.

Definition at line 607 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT

IfxGtm_TOM0_12_TOUT98_P11_9_OUT.

Definition at line 608 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_13_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT

IfxGtm_TOM0_13_TOUT15_P00_6_OUT.

Definition at line 609 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_13_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT

IfxGtm_TOM0_13_TOUT35_P33_13_OUT.

Definition at line 610 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_13_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT

IfxGtm_TOM0_13_TOUT5_P02_5_OUT.

Definition at line 611 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_13_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT

IfxGtm_TOM0_13_TOUT65_P20_9_OUT.

Definition at line 612 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_13_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT

IfxGtm_TOM0_13_TOUT73_P15_2_OUT.

Definition at line 613 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_13_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT

IfxGtm_TOM0_13_TOUT99_P11_10_OUT.

Definition at line 614 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_14_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT

IfxGtm_TOM0_14_TOUT100_P11_11_OUT.

Definition at line 615 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_14_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT

IfxGtm_TOM0_14_TOUT16_P00_7_OUT.

Definition at line 616 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_14_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT

IfxGtm_TOM0_14_TOUT36_P32_0_OUT.

Definition at line 617 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_14_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT

IfxGtm_TOM0_14_TOUT66_P20_10_OUT.

Definition at line 618 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_14_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT

IfxGtm_TOM0_14_TOUT6_P02_6_OUT.

Definition at line 619 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_14_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT

IfxGtm_TOM0_14_TOUT74_P15_3_OUT.

Definition at line 620 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_15_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT

IfxGtm_TOM0_15_TOUT101_P11_12_OUT.

Definition at line 621 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_15_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT

IfxGtm_TOM0_15_TOUT17_P00_8_OUT.

Definition at line 622 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_15_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT

IfxGtm_TOM0_15_TOUT42_P23_1_OUT.

Definition at line 623 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_15_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT

IfxGtm_TOM0_15_TOUT67_P20_11_OUT.

Definition at line 624 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_15_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT

IfxGtm_TOM0_15_TOUT75_P15_4_OUT.

Definition at line 625 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_15_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT

IfxGtm_TOM0_15_TOUT7_P02_7_OUT.

Definition at line 626 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT

IfxGtm_TOM0_1_TOUT103_P10_1_OUT.

Definition at line 627 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT

IfxGtm_TOM0_1_TOUT19_P00_10_OUT.

Definition at line 628 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT

IfxGtm_TOM0_1_TOUT27_P33_5_OUT.

Definition at line 629 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT

IfxGtm_TOM0_1_TOUT31_P33_9_OUT.

Definition at line 630 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT

IfxGtm_TOM0_1_TOUT54_P21_3_OUT.

Definition at line 631 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT

IfxGtm_TOM0_1_TOUT78_P15_7_OUT.

Definition at line 632 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT

IfxGtm_TOM0_1_TOUT86_P14_6_OUT.

Definition at line 633 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT

IfxGtm_TOM0_2_TOUT104_P10_2_OUT.

Definition at line 634 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT

IfxGtm_TOM0_2_TOUT107_P10_5_OUT.

Definition at line 635 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT

IfxGtm_TOM0_2_TOUT20_P00_11_OUT.

Definition at line 636 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT

IfxGtm_TOM0_2_TOUT28_P33_6_OUT.

Definition at line 637 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT

IfxGtm_TOM0_2_TOUT33_P33_11_OUT.

Definition at line 638 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT

IfxGtm_TOM0_2_TOUT55_P21_4_OUT.

Definition at line 639 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT

IfxGtm_TOM0_2_TOUT79_P15_8_OUT.

Definition at line 640 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT

IfxGtm_TOM0_2_TOUT88_P14_8_OUT.

Definition at line 641 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT

IfxGtm_TOM0_3_TOUT105_P10_3_OUT.

Definition at line 642 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT

IfxGtm_TOM0_3_TOUT108_P10_6_OUT.

Definition at line 643 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT

IfxGtm_TOM0_3_TOUT21_P00_12_OUT.

Definition at line 644 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT

IfxGtm_TOM0_3_TOUT29_P33_7_OUT.

Definition at line 645 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT

IfxGtm_TOM0_3_TOUT38_P32_2_OUT.

Definition at line 646 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT

IfxGtm_TOM0_3_TOUT56_P21_5_OUT.

Definition at line 647 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT

IfxGtm_TOM0_3_TOUT60_P20_1_OUT.

Definition at line 648 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT

IfxGtm_TOM0_3_TOUT80_P14_0_OUT.

Definition at line 649 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT

IfxGtm_TOM0_3_TOUT89_P14_9_OUT.

Definition at line 650 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT

IfxGtm_TOM0_4_TOUT102_P10_0_OUT.

Definition at line 651 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT

IfxGtm_TOM0_4_TOUT22_P33_0_OUT.

Definition at line 652 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT

IfxGtm_TOM0_4_TOUT30_P33_8_OUT.

Definition at line 653 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT

IfxGtm_TOM0_4_TOUT39_P32_3_OUT.

Definition at line 654 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT

IfxGtm_TOM0_4_TOUT57_P21_6_OUT.

Definition at line 655 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT

IfxGtm_TOM0_4_TOUT61_P20_3_OUT.

Definition at line 656 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT

IfxGtm_TOM0_4_TOUT81_P14_1_OUT.

Definition at line 657 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT

IfxGtm_TOM0_4_TOUT90_P14_10_OUT.

Definition at line 658 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT

IfxGtm_TOM0_5_TOUT110_P10_8_OUT.

Definition at line 659 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT

IfxGtm_TOM0_5_TOUT23_P33_1_OUT.

Definition at line 660 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT

IfxGtm_TOM0_5_TOUT40_P32_4_OUT.

Definition at line 661 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT

IfxGtm_TOM0_5_TOUT58_P21_7_OUT.

Definition at line 662 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT

IfxGtm_TOM0_5_TOUT82_P14_2_OUT.

Definition at line 663 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT

IfxGtm_TOM0_5_TOUT91_P13_0_OUT.

Definition at line 664 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT

IfxGtm_TOM0_6_TOUT106_P10_4_OUT.

Definition at line 665 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT

IfxGtm_TOM0_6_TOUT24_P33_2_OUT.

Definition at line 666 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT

IfxGtm_TOM0_6_TOUT42_P23_1_OUT.

Definition at line 667 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT

IfxGtm_TOM0_6_TOUT59_P20_0_OUT.

Definition at line 668 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT83_P14_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT

IfxGtm_TOM0_6_TOUT83_P14_3_OUT.

Definition at line 669 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT

IfxGtm_TOM0_6_TOUT92_P13_1_OUT.

Definition at line 670 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT

IfxGtm_TOM0_7_TOUT25_P33_3_OUT.

Definition at line 671 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT

IfxGtm_TOM0_7_TOUT45_P23_4_OUT.

Definition at line 672 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT

IfxGtm_TOM0_7_TOUT64_P20_8_OUT.

Definition at line 673 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT

IfxGtm_TOM0_7_TOUT84_P14_4_OUT.

Definition at line 674 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT

IfxGtm_TOM0_7_TOUT93_P13_2_OUT.

Definition at line 675 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT

IfxGtm_TOM0_8_TOUT0_P02_0_OUT.

Definition at line 676 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT

IfxGtm_TOM0_8_TOUT48_P22_1_OUT.

Definition at line 677 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT

IfxGtm_TOM0_8_TOUT51_P21_0_OUT.

Definition at line 678 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT

IfxGtm_TOM0_8_TOUT68_P20_12_OUT.

Definition at line 679 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT

IfxGtm_TOM0_8_TOUT8_P02_8_OUT.

Definition at line 680 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT

IfxGtm_TOM0_8_TOUT94_P13_3_OUT.

Definition at line 681 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT

IfxGtm_TOM0_8_TOUT95_P11_2_OUT.

Definition at line 682 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT

IfxGtm_TOM0_8_TOUT9_P00_0_OUT.

Definition at line 683 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_9_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT

IfxGtm_TOM0_9_TOUT10_P00_1_OUT.

Definition at line 684 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_9_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT

IfxGtm_TOM0_9_TOUT11_P00_2_OUT.

Definition at line 685 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_9_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT

IfxGtm_TOM0_9_TOUT1_P02_1_OUT.

Definition at line 686 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_9_TOUT47_P22_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT

IfxGtm_TOM0_9_TOUT47_P22_0_OUT.

Definition at line 687 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_9_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT

IfxGtm_TOM0_9_TOUT52_P21_1_OUT.

Definition at line 688 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_9_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT

IfxGtm_TOM0_9_TOUT69_P20_13_OUT.

Definition at line 689 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT

IfxGtm_TOM1_0_TOUT18_P00_9_OUT.

Definition at line 690 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT

IfxGtm_TOM1_0_TOUT26_P33_4_OUT.

Definition at line 691 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT

IfxGtm_TOM1_0_TOUT32_P33_10_OUT.

Definition at line 692 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT

IfxGtm_TOM1_0_TOUT48_P22_1_OUT.

Definition at line 693 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT

IfxGtm_TOM1_0_TOUT53_P21_2_OUT.

Definition at line 694 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT

IfxGtm_TOM1_0_TOUT68_P20_12_OUT.

Definition at line 695 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT

IfxGtm_TOM1_0_TOUT76_P15_5_OUT.

Definition at line 696 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT

IfxGtm_TOM1_0_TOUT77_P15_6_OUT.

Definition at line 697 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT

IfxGtm_TOM1_0_TOUT85_P14_5_OUT.

Definition at line 698 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT

IfxGtm_TOM1_0_TOUT87_P14_7_OUT.

Definition at line 699 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT

IfxGtm_TOM1_0_TOUT8_P02_8_OUT.

Definition at line 700 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT

IfxGtm_TOM1_0_TOUT94_P13_3_OUT.

Definition at line 701 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT

IfxGtm_TOM1_0_TOUT9_P00_0_OUT.

Definition at line 702 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_10_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT

IfxGtm_TOM1_10_TOUT104_P10_2_OUT.

Definition at line 703 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_10_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT

IfxGtm_TOM1_10_TOUT107_P10_5_OUT.

Definition at line 704 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_10_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT

IfxGtm_TOM1_10_TOUT2_P02_2_OUT.

Definition at line 705 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_10_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT

IfxGtm_TOM1_10_TOUT62_P20_6_OUT.

Definition at line 706 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_11_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT

IfxGtm_TOM1_11_TOUT105_P10_3_OUT.

Definition at line 707 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_11_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT

IfxGtm_TOM1_11_TOUT108_P10_6_OUT.

Definition at line 708 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_11_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT

IfxGtm_TOM1_11_TOUT3_P02_3_OUT.

Definition at line 709 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_11_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT

IfxGtm_TOM1_11_TOUT60_P20_1_OUT.

Definition at line 710 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_11_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT

IfxGtm_TOM1_11_TOUT63_P20_7_OUT.

Definition at line 711 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_12_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT

IfxGtm_TOM1_12_TOUT102_P10_0_OUT.

Definition at line 712 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_12_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT

IfxGtm_TOM1_12_TOUT34_P33_12_OUT.

Definition at line 713 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_12_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT

IfxGtm_TOM1_12_TOUT4_P02_4_OUT.

Definition at line 714 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_12_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT

IfxGtm_TOM1_12_TOUT61_P20_3_OUT.

Definition at line 715 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_13_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT

IfxGtm_TOM1_13_TOUT110_P10_8_OUT.

Definition at line 716 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_13_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT

IfxGtm_TOM1_13_TOUT35_P33_13_OUT.

Definition at line 717 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_13_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT

IfxGtm_TOM1_13_TOUT5_P02_5_OUT.

Definition at line 718 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_13_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT

IfxGtm_TOM1_13_TOUT65_P20_9_OUT.

Definition at line 719 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_14_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT

IfxGtm_TOM1_14_TOUT36_P32_0_OUT.

Definition at line 720 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_14_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT

IfxGtm_TOM1_14_TOUT66_P20_10_OUT.

Definition at line 721 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_14_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT

IfxGtm_TOM1_14_TOUT6_P02_6_OUT.

Definition at line 722 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_15_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT

IfxGtm_TOM1_15_TOUT67_P20_11_OUT.

Definition at line 723 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_15_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT

IfxGtm_TOM1_15_TOUT7_P02_7_OUT.

Definition at line 724 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT

IfxGtm_TOM1_1_TOUT10_P00_1_OUT.

Definition at line 725 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT

IfxGtm_TOM1_1_TOUT11_P00_2_OUT.

Definition at line 726 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT

IfxGtm_TOM1_1_TOUT19_P00_10_OUT.

Definition at line 727 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT

IfxGtm_TOM1_1_TOUT27_P33_5_OUT.

Definition at line 728 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT

IfxGtm_TOM1_1_TOUT31_P33_9_OUT.

Definition at line 729 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT47_P22_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT

IfxGtm_TOM1_1_TOUT47_P22_0_OUT.

Definition at line 730 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT

IfxGtm_TOM1_1_TOUT54_P21_3_OUT.

Definition at line 731 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT

IfxGtm_TOM1_1_TOUT69_P20_13_OUT.

Definition at line 732 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT

IfxGtm_TOM1_1_TOUT78_P15_7_OUT.

Definition at line 733 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT

IfxGtm_TOM1_1_TOUT86_P14_6_OUT.

Definition at line 734 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT

IfxGtm_TOM1_1_TOUT95_P11_2_OUT.

Definition at line 735 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT

IfxGtm_TOM1_2_TOUT12_P00_3_OUT.

Definition at line 736 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT

IfxGtm_TOM1_2_TOUT20_P00_11_OUT.

Definition at line 737 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT

IfxGtm_TOM1_2_TOUT28_P33_6_OUT.

Definition at line 738 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT

IfxGtm_TOM1_2_TOUT33_P33_11_OUT.

Definition at line 739 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT

IfxGtm_TOM1_2_TOUT46_P23_5_OUT.

Definition at line 740 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT

IfxGtm_TOM1_2_TOUT55_P21_4_OUT.

Definition at line 741 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT

IfxGtm_TOM1_2_TOUT70_P20_14_OUT.

Definition at line 742 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT

IfxGtm_TOM1_2_TOUT79_P15_8_OUT.

Definition at line 743 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT

IfxGtm_TOM1_2_TOUT88_P14_8_OUT.

Definition at line 744 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT

IfxGtm_TOM1_2_TOUT96_P11_3_OUT.

Definition at line 745 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT

IfxGtm_TOM1_3_TOUT13_P00_4_OUT.

Definition at line 746 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT

IfxGtm_TOM1_3_TOUT21_P00_12_OUT.

Definition at line 747 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT

IfxGtm_TOM1_3_TOUT29_P33_7_OUT.

Definition at line 748 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT

IfxGtm_TOM1_3_TOUT38_P32_2_OUT.

Definition at line 749 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT

IfxGtm_TOM1_3_TOUT49_P22_2_OUT.

Definition at line 750 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT

IfxGtm_TOM1_3_TOUT56_P21_5_OUT.

Definition at line 751 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT

IfxGtm_TOM1_3_TOUT71_P15_0_OUT.

Definition at line 752 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT

IfxGtm_TOM1_3_TOUT80_P14_0_OUT.

Definition at line 753 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT

IfxGtm_TOM1_3_TOUT89_P14_9_OUT.

Definition at line 754 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT

IfxGtm_TOM1_3_TOUT97_P11_6_OUT.

Definition at line 755 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT

IfxGtm_TOM1_4_TOUT14_P00_5_OUT.

Definition at line 756 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT

IfxGtm_TOM1_4_TOUT22_P33_0_OUT.

Definition at line 757 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT

IfxGtm_TOM1_4_TOUT30_P33_8_OUT.

Definition at line 758 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT

IfxGtm_TOM1_4_TOUT39_P32_3_OUT.

Definition at line 759 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT

IfxGtm_TOM1_4_TOUT50_P22_3_OUT.

Definition at line 760 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT

IfxGtm_TOM1_4_TOUT57_P21_6_OUT.

Definition at line 761 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT

IfxGtm_TOM1_4_TOUT72_P15_1_OUT.

Definition at line 762 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT

IfxGtm_TOM1_4_TOUT81_P14_1_OUT.

Definition at line 763 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT

IfxGtm_TOM1_4_TOUT90_P14_10_OUT.

Definition at line 764 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT

IfxGtm_TOM1_4_TOUT98_P11_9_OUT.

Definition at line 765 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT

IfxGtm_TOM1_5_TOUT15_P00_6_OUT.

Definition at line 766 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT

IfxGtm_TOM1_5_TOUT23_P33_1_OUT.

Definition at line 767 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT

IfxGtm_TOM1_5_TOUT40_P32_4_OUT.

Definition at line 768 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT

IfxGtm_TOM1_5_TOUT41_P23_0_OUT.

Definition at line 769 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT

IfxGtm_TOM1_5_TOUT58_P21_7_OUT.

Definition at line 770 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT

IfxGtm_TOM1_5_TOUT73_P15_2_OUT.

Definition at line 771 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT

IfxGtm_TOM1_5_TOUT82_P14_2_OUT.

Definition at line 772 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT

IfxGtm_TOM1_5_TOUT91_P13_0_OUT.

Definition at line 773 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT

IfxGtm_TOM1_5_TOUT99_P11_10_OUT.

Definition at line 774 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT

IfxGtm_TOM1_6_TOUT100_P11_11_OUT.

Definition at line 775 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT

IfxGtm_TOM1_6_TOUT106_P10_4_OUT.

Definition at line 776 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT

IfxGtm_TOM1_6_TOUT16_P00_7_OUT.

Definition at line 777 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT

IfxGtm_TOM1_6_TOUT24_P33_2_OUT.

Definition at line 778 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT

IfxGtm_TOM1_6_TOUT43_P23_2_OUT.

Definition at line 779 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT

IfxGtm_TOM1_6_TOUT59_P20_0_OUT.

Definition at line 780 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT

IfxGtm_TOM1_6_TOUT74_P15_3_OUT.

Definition at line 781 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT83_P14_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT

IfxGtm_TOM1_6_TOUT83_P14_3_OUT.

Definition at line 782 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT

IfxGtm_TOM1_6_TOUT92_P13_1_OUT.

Definition at line 783 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT

IfxGtm_TOM1_7_TOUT101_P11_12_OUT.

Definition at line 784 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT

IfxGtm_TOM1_7_TOUT17_P00_8_OUT.

Definition at line 785 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT

IfxGtm_TOM1_7_TOUT25_P33_3_OUT.

Definition at line 786 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT

IfxGtm_TOM1_7_TOUT44_P23_3_OUT.

Definition at line 787 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT

IfxGtm_TOM1_7_TOUT45_P23_4_OUT.

Definition at line 788 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT

IfxGtm_TOM1_7_TOUT64_P20_8_OUT.

Definition at line 789 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT

IfxGtm_TOM1_7_TOUT75_P15_4_OUT.

Definition at line 790 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT

IfxGtm_TOM1_7_TOUT84_P14_4_OUT.

Definition at line 791 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT

IfxGtm_TOM1_7_TOUT93_P13_2_OUT.

Definition at line 792 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_8_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT

IfxGtm_TOM1_8_TOUT0_P02_0_OUT.

Definition at line 793 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_8_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT

IfxGtm_TOM1_8_TOUT109_P10_7_OUT.

Definition at line 794 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_8_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT

IfxGtm_TOM1_8_TOUT51_P21_0_OUT.

Definition at line 795 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_9_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT

IfxGtm_TOM1_9_TOUT103_P10_1_OUT.

Definition at line 796 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_9_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT

IfxGtm_TOM1_9_TOUT1_P02_1_OUT.

Definition at line 797 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_9_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT

IfxGtm_TOM1_9_TOUT52_P21_1_OUT.

Definition at line 798 of file IfxGtm_PinMap.h.


iLLD_TC26B: GTM Trigger Configuration

Modules
GTM Trigger Configuration
iLLD » GTM
Collaboration diagram for GTM Trigger Configuration:

Modules

Enumerations
Data Structures
Trigger Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » GTM » GTM Trigger Configuration
Collaboration diagram for Enumerations:

Enumerations

enum IfxGtm_Trig_AdcGroup {
IfxGtm_Trig_AdcGroup_0,
IfxGtm_Trig_AdcGroup_1,
IfxGtm_Trig_AdcGroup_2,
IfxGtm_Trig_AdcGroup_3,
IfxGtm_Trig_AdcGroup_4
}
Enum for ADC group. More...
enum IfxGtm_Trig_AdcTrig {
IfxGtm_Trig_AdcTrig_0,
IfxGtm_Trig_AdcTrig_1,
IfxGtm_Trig_AdcTrig_count
}
Enum for ADC trigger. More...
enum IfxGtm_Trig_AdcTrigChannel {
IfxGtm_Trig_AdcTrigChannel_4,
IfxGtm_Trig_AdcTrigChannel_5,
IfxGtm_Trig_AdcTrigChannel_6,
IfxGtm_Trig_AdcTrigChannel_7,
IfxGtm_Trig_AdcTrigChannel_13,
IfxGtm_Trig_AdcTrigChannel_14,
IfxGtm_Trig_AdcTrigChannel_15,
IfxGtm_Trig_AdcTrigChannel_count
}
Enum for ADC trigger channel. More...
enum IfxGtm_Trig_AdcTrigSource {
IfxGtm_Trig_AdcTrigSource_atom0,
IfxGtm_Trig_AdcTrigSource_atom1,
IfxGtm_Trig_AdcTrigSource_atom2,
IfxGtm_Trig_AdcTrigSource_atom3,
IfxGtm_Trig_AdcTrigSource_tom0,
IfxGtm_Trig_AdcTrigSource_tom1,
IfxGtm_Trig_AdcTrigSource_count
}
Enum for ADC trigger source. More...
enum IfxGtm_Trig_DsadcTrig {
IfxGtm_Trig_DsadcTrig_0,
IfxGtm_Trig_DsadcTrig_1
}
Enum for DSADC trigger. More...
enum IfxGtm_Trig_DsadcTrigSource {
IfxGtm_Trig_DsadcTrigSource_tomX_6,
IfxGtm_Trig_DsadcTrigSource_tomX_7,
IfxGtm_Trig_DsadcTrigSource_tomX_13,
IfxGtm_Trig_DsadcTrigSource_tomX_14,
IfxGtm_Trig_DsadcTrigSource_atomX_4,
IfxGtm_Trig_DsadcTrigSource_atomX_5,
IfxGtm_Trig_DsadcTrigSource_atomX_6,
IfxGtm_Trig_DsadcTrigSource_atomX_7
}
Enum for DSADC trigger source. More...
enum IfxGtm_Trig_SentGroup {
IfxGtm_Trig_SentGroup_0,
IfxGtm_Trig_SentGroup_1,
IfxGtm_Trig_SentGroup_2,
IfxGtm_Trig_SentGroup_3,
IfxGtm_Trig_SentGroup_4,
IfxGtm_Trig_SentGroup_5
}
Enum for SENT group. More...
enum IfxGtm_Trig_SentTrig { IfxGtm_Trig_SentTrig_0 }
Enum for SENT trigger. More...
enum IfxGtm_Trig_SentTrigChannel {
IfxGtm_Trig_SentTrigChannel_4,
IfxGtm_Trig_SentTrigChannel_5,
IfxGtm_Trig_SentTrigChannel_6,
IfxGtm_Trig_SentTrigChannel_7,
IfxGtm_Trig_SentTrigChannel_13,
IfxGtm_Trig_SentTrigChannel_14,
IfxGtm_Trig_SentTrigChannel_15,
IfxGtm_Trig_SentTrigChannel_count
}
Enum for SENT trigger channel. More...
enum IfxGtm_Trig_SentTrigSource {
IfxGtm_Trig_SentTrigSource_atom0,
IfxGtm_Trig_SentTrigSource_atom1,
IfxGtm_Trig_SentTrigSource_atom2,
IfxGtm_Trig_SentTrigSource_atom3,
IfxGtm_Trig_SentTrigSource_tom0,
IfxGtm_Trig_SentTrigSource_tom1,
IfxGtm_Trig_SentTrigSource_count
}
Enum for SENT trigger source. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Trig_AdcGroup

enum IfxGtm_Trig_AdcGroup

Enum for ADC group.

Enumerator
IfxGtm_Trig_AdcGroup_0 | For ADC group 0.
IfxGtm_Trig_AdcGroup_1 | For ADC group 1.
IfxGtm_Trig_AdcGroup_2 | For ADC group 2.
IfxGtm_Trig_AdcGroup_3 | For ADC group 3.
IfxGtm_Trig_AdcGroup_4 | For ADC group 4.

Definition at line 70 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_AdcTrig

enum IfxGtm_Trig_AdcTrig

Enum for ADC trigger.

Enumerator
IfxGtm_Trig_AdcTrig_0 |
IfxGtm_Trig_AdcTrig_1 |
IfxGtm_Trig_AdcTrig_count | count of the enum definition

Definition at line 81 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_AdcTrigChannel

enum IfxGtm_Trig_AdcTrigChannel

Enum for ADC trigger channel.

Enumerator
IfxGtm_Trig_AdcTrigChannel_4 |
IfxGtm_Trig_AdcTrigChannel_5 |
IfxGtm_Trig_AdcTrigChannel_6 |
IfxGtm_Trig_AdcTrigChannel_7 |
IfxGtm_Trig_AdcTrigChannel_13 |
IfxGtm_Trig_AdcTrigChannel_14 |
IfxGtm_Trig_AdcTrigChannel_15 |
IfxGtm_Trig_AdcTrigChannel_count | count of the enum definition

Definition at line 90 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_AdcTrigSource

enum IfxGtm_Trig_AdcTrigSource

Enum for ADC trigger source.

Enumerator
IfxGtm_Trig_AdcTrigSource_atom0 |
IfxGtm_Trig_AdcTrigSource_atom1 |
IfxGtm_Trig_AdcTrigSource_atom2 |
IfxGtm_Trig_AdcTrigSource_atom3 |
IfxGtm_Trig_AdcTrigSource_tom0 |
IfxGtm_Trig_AdcTrigSource_tom1 |
IfxGtm_Trig_AdcTrigSource_count | count of the enum definition

Definition at line 104 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_DsadcTrig

enum IfxGtm_Trig_DsadcTrig

Enum for DSADC trigger.

Enumerator
IfxGtm_Trig_DsadcTrig_0
IfxGtm_Trig_DsadcTrig_1

Definition at line 117 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_DsadcTrigSource

enum IfxGtm_Trig_DsadcTrigSource

Enum for DSADC trigger source.

Enumerator
IfxGtm_Trig_DsadcTrigSource_tomX_6
IfxGtm_Trig_DsadcTrigSource_tomX_7
IfxGtm_Trig_DsadcTrigSource_tomX_13
IfxGtm_Trig_DsadcTrigSource_tomX_14
IfxGtm_Trig_DsadcTrigSource_atomX_4
IfxGtm_Trig_DsadcTrigSource_atomX_5
IfxGtm_Trig_DsadcTrigSource_atomX_6
IfxGtm_Trig_DsadcTrigSource_atomX_7

Definition at line 125 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_SentGroup

enum IfxGtm_Trig_SentGroup

Enum for SENT group.

Enumerator
IfxGtm_Trig_SentGroup_0 | For SENT group 0.
IfxGtm_Trig_SentGroup_1 | For SENT group 1.
IfxGtm_Trig_SentGroup_2 | For SENT group 2.
IfxGtm_Trig_SentGroup_3 | For SENT group 3.
IfxGtm_Trig_SentGroup_4 | For SENT group 4.
IfxGtm_Trig_SentGroup_5 | For SENT group 5.

Definition at line 139 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_SentTrig

enum IfxGtm_Trig_SentTrig

Enum for SENT trigger.

Enumerator
IfxGtm_Trig_SentTrig_0

sent trigger 0

Definition at line 151 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_SentTrigChannel

enum IfxGtm_Trig_SentTrigChannel

Enum for SENT trigger channel.

Enumerator
IfxGtm_Trig_SentTrigChannel_4 |
IfxGtm_Trig_SentTrigChannel_5 |
IfxGtm_Trig_SentTrigChannel_6 |
IfxGtm_Trig_SentTrigChannel_7 |
IfxGtm_Trig_SentTrigChannel_13 |
IfxGtm_Trig_SentTrigChannel_14 |
IfxGtm_Trig_SentTrigChannel_15 |
IfxGtm_Trig_SentTrigChannel_count | count of the enum definition

Definition at line 158 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_SentTrigSource

enum IfxGtm_Trig_SentTrigSource

Enum for SENT trigger source.

Enumerator
IfxGtm_Trig_SentTrigSource_atom0 |
IfxGtm_Trig_SentTrigSource_atom1 |
IfxGtm_Trig_SentTrigSource_atom2 |
IfxGtm_Trig_SentTrigSource_atom3 |
IfxGtm_Trig_SentTrigSource_tom0 |
IfxGtm_Trig_SentTrigSource_tom1 |
IfxGtm_Trig_SentTrigSource_count | count of the enum definition

Definition at line 172 of file IfxGtm_Trig.h.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » GTM » GTM Trigger Configuration
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Trig_Channel
struct | IfxGtm_Trig_Source
struct | IfxGtm_Trig_Trigger
struct | IfxGtm_Trig_AdcTrig_Table

Detailed Description

Data Structure Documentation

◆ IfxGtm_Trig_Channel

struct IfxGtm_Trig_Channel

Definition at line 56 of file IfxGtm_Trig.c.

Data Fields
sint8 config Value for SEL0/1. config=0xFF means "not available".

◆ IfxGtm_Trig_Source

struct IfxGtm_Trig_Source

Definition at line 65 of file IfxGtm_Trig.c.

Collaboration diagram for IfxGtm_Trig_Source:
[legend]
Data Fields
IfxGtm_Trig_Channel channel[IfxGtm_Trig_AdcTrigChannel_count]

◆ IfxGtm_Trig_Trigger

struct IfxGtm_Trig_Trigger

Definition at line 74 of file IfxGtm_Trig.c.

Collaboration diagram for IfxGtm_Trig_Trigger:
[legend]
Data Fields
IfxGtm_Trig_Source source[IfxGtm_Trig_AdcTrigSource_count]

◆ IfxGtm_Trig_AdcTrig_Table

struct IfxGtm_Trig_AdcTrig_Table

Definition at line 83 of file IfxGtm_Trig.c.

Collaboration diagram for IfxGtm_Trig_AdcTrig_Table:
[legend]
Data Fields
IfxGtm_Trig_Trigger trigger[IfxGtm_Trig_AdcTrig_count]


iLLD_TC26B: Trigger Functions

Functions
Trigger Functions
iLLD » GTM » GTM Trigger Configuration
Collaboration diagram for Trigger Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Trig_fromDsadc (Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
IFX_EXTERN void | IfxGtm_Trig_toDsadc (Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Trig_DsadcTrig dsadcTrig, IfxGtm_Trig_DsadcTrigSource sel)
IFX_EXTERN boolean | IfxGtm_Trig_toVadc (Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
IFX_EXTERN boolean | IfxGtm_Trig_toSent (Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)

Detailed Description

Function Documentation

◆ IfxGtm_Trig_fromDsadc()

IFX_EXTERN boolean IfxGtm_Trig_fromDsadc | ( | Ifx_GTM * | gtm,
 |  | uint32 | dsadcChannel,
 |  | IfxGtm_Tim | tim,
 |  | IfxGtm_Tim_Ch | timChannel
 | ) |  |
Parameters
gtm | Pointer to GTM module
dsadcChannel | DSADC channel
tim | TIM object
timChannel | TIM channel
Returns
TRUE on success else FALSE

Definition at line 174 of file IfxGtm_Trig.c.

Referenced by IfxDsadc_Rdc_initHwTimestamp().

◆ IfxGtm_Trig_toDsadc()

IFX_EXTERN void IfxGtm_Trig_toDsadc | ( | Ifx_GTM * | gtm,
 |  | uint32 | dsadcChannel,
 |  | IfxGtm_Trig_DsadcTrig | dsadcTrig,
 |  | IfxGtm_Trig_DsadcTrigSource | sel
 | ) |  |
Parameters
gtm | Pointer to GTM module
dsadcChannel | DSADC channel
dsadcTrig | DSADC trigger
sel | DSADC trigger source
Returns
None

Definition at line 188 of file IfxGtm_Trig.c.

◆ IfxGtm_Trig_toSent()

IFX_EXTERN boolean IfxGtm_Trig_toSent | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Trig_SentGroup | sentGroup,
 |  | IfxGtm_Trig_SentTrig | sentTrig,
 |  | IfxGtm_Trig_SentTrigSource | source,
 |  | IfxGtm_Trig_SentTrigChannel | channel
 | ) |  |
Parameters
gtm | Pointer to GTM module
sentGroup | SENT group
sentTrig | SENT trigger
source | SENT trigger source
channel | SENT trigger channel
Returns
TRUE on success else FALSE

Definition at line 256 of file IfxGtm_Trig.c.

◆ IfxGtm_Trig_toVadc()

IFX_EXTERN boolean IfxGtm_Trig_toVadc | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Trig_AdcGroup | adcGroup,
 |  | IfxGtm_Trig_AdcTrig | adcTrig,
 |  | IfxGtm_Trig_AdcTrigSource | source,
 |  | IfxGtm_Trig_AdcTrigChannel | channel
 | ) |  |
Parameters
gtm | Pointer to GTM module
adcGroup | ADC group
adcTrig | ADC trigger
source | ADC trigger source
channel | ADC trigger channel
Returns
TRUE on success else FALSE

Definition at line 206 of file IfxGtm_Trig.c.


iLLD_TC26B: IfxGtm_cfg.h File Reference

  • _Impl
Data Structures | Macros | Typedefs | Enumerations
IfxGtm_cfg.h File Reference
iLLD » GTM

GTM on-chip implementation data. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Ifx_Cfg.h"
#include "IfxGtm_reg.h"
#include "Port/Std/IfxPort.h"
Include dependency graph for IfxGtm_cfg.h:

Go to the source code of this file.

Data Structures

struct IfxGtm_Tom_TGC
TOM TGC objects. More...

Macros

#define | IFXGTM_CMU_CLKEN_CLK0 (0x00000002)
Mask for CMU_CLK_EN register (Enable): CLK0. More...
#define | IFXGTM_CMU_CLKEN_CLK1 (0x00000008)
Mask for CMU_CLK_EN register (Enable): CLK1. More...
#define | IFXGTM_CMU_CLKEN_CLK2 (0x00000020)
Mask for CMU_CLK_EN register (Enable): CLK2. More...
#define | IFXGTM_CMU_CLKEN_CLK3 (0x00000080)
Mask for CMU_CLK_EN register (Enable): CLK3. More...
#define | IFXGTM_CMU_CLKEN_CLK4 (0x00000200)
Mask for CMU_CLK_EN register (Enable): CLK4. More...
#define | IFXGTM_CMU_CLKEN_CLK5 (0x00000800)
Mask for CMU_CLK_EN register (Enable): CLK5. More...
#define | IFXGTM_CMU_CLKEN_CLK6 (0x00002000)
Mask for CMU_CLK_EN register (Enable): CLK6. More...
#define | IFXGTM_CMU_CLKEN_CLK7 (0x00008000)
Mask for CMU_CLK_EN register (Enable): CLK7. More...
#define | IFXGTM_CMU_CLKEN_ECLK0 (0x00020000)
Mask for CMU_CLK_EN register (Enable): ECLK0. More...
#define | IFXGTM_CMU_CLKEN_ECLK1 (0x00080000)
Mask for CMU_CLK_EN register (Enable): ECLK1. More...
#define | IFXGTM_CMU_CLKEN_ECLK2 (0x00200000)
Mask for CMU_CLK_EN register (Enable): ECLK2. More...
#define | IFXGTM_CMU_CLKEN_FXCLK (0x00800000)
Mask for CMU_CLK_EN register (Enable): FXCLK. More...
#define | IFXGTM_CMU_CLKEN_ALL (0x00AAAAAA)
Mask for CMU_CLK_EN register (Enable): ALL clocks. More...
#define | IFXGTM_CMU_CLKDIS_CLK0 (0x00000001)
Mask for CMU_CLK_EN register (Disable): CLK0. More...
#define | IFXGTM_CMU_CLKDIS_CLK1 (0x00000004)
Mask for CMU_CLK_EN register (Disable): CLK1. More...
#define | IFXGTM_CMU_CLKDIS_CLK2 (0x00000010)
Mask for CMU_CLK_EN register (Disable): CLK2. More...
#define | IFXGTM_CMU_CLKDIS_CLK3 (0x00000040)
Mask for CMU_CLK_EN register (Disable): CLK3. More...
#define | IFXGTM_CMU_CLKDIS_CLK4 (0x00000100)
Mask for CMU_CLK_EN register (Disable): CLK4. More...
#define | IFXGTM_CMU_CLKDIS_CLK5 (0x00000400)
Mask for CMU_CLK_EN register (Disable): CLK5. More...
#define | IFXGTM_CMU_CLKDIS_CLK6 (0x00001000)
Mask for CMU_CLK_EN register (Disable): CLK6. More...
#define | IFXGTM_CMU_CLKDIS_CLK7 (0x00004000)
Mask for CMU_CLK_EN register (Disable): CLK7. More...
#define | IFXGTM_CMU_CLKDIS_ECLK0 (0x00010000)
Mask for CMU_CLK_EN register (Disable): ECLK0. More...
#define | IFXGTM_CMU_CLKDIS_ECLK1 (0x00040000)
Mask for CMU_CLK_EN register (Disable): ECLK1. More...
#define | IFXGTM_CMU_CLKDIS_ECLK2 (0x00100000)
Mask for CMU_CLK_EN register (Disable): ECLK2. More...
#define | IFXGTM_CMU_CLKDIS_FXCLK (0x00400000)
Mask for CMU_CLK_EN register (Disable): FXCLK. More...
#define | IFXGTM_CMU_CLKDIS_ALL (0x00555555)
Mask for CMU_CLK_EN register (Disable): ALL clocks. More...
#define | IFXGTM_NUM_ATOM_OBJECTS (4)
#define | IFXGTM_NUM_TOM_OBJECTS (2)
#define | IFXGTM_NUM_ATOM_CHANNELS (8)
#define | IFXGTM_NUM_TOM_CHANNELS (16)
#define | IFXGTM_NUM_MODULES (1)
#define | IFXGTM_NUM_TIM_CHANNELS (8)
number of TIM channels. More...

Typedefs

typedef volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC

Enumerations

enum IfxGtm_Atom {
IfxGtm_Atom_0,
IfxGtm_Atom_1,
IfxGtm_Atom_2,
IfxGtm_Atom_3
}
Enum for ATOM objects. More...
enum IfxGtm_Atom_Ch {
IfxGtm_Atom_Ch_none = -1,
IfxGtm_Atom_Ch_0,
IfxGtm_Atom_Ch_1,
IfxGtm_Atom_Ch_2,
IfxGtm_Atom_Ch_3,
IfxGtm_Atom_Ch_4,
IfxGtm_Atom_Ch_5,
IfxGtm_Atom_Ch_6,
IfxGtm_Atom_Ch_7
}
Enum for ATOM channels. More...
enum IfxGtm_Dpll_SubInc {
IfxGtm_Dpll_SubInc_1 = 0,
IfxGtm_Dpll_SubInc_2
}
Enum for Dpll subincrements. More...
enum IfxGtm_FeatureControl {
IfxGtm_FeatureControl_disabled = 0,
IfxGtm_FeatureControl_disable = 1,
IfxGtm_FeatureControl_enable = 2,
IfxGtm_FeatureControl_enabled = 3
}
Enum Enable disable feature control. More...
enum IfxGtm_Tim {
IfxGtm_Tim_0,
IfxGtm_Tim_1,
IfxGtm_Tim_2
}
Enum for TIM objects. More...
enum IfxGtm_Tim_Ch {
IfxGtm_Tim_Ch_0,
IfxGtm_Tim_Ch_1,
IfxGtm_Tim_Ch_2,
IfxGtm_Tim_Ch_3,
IfxGtm_Tim_Ch_4,
IfxGtm_Tim_Ch_5,
IfxGtm_Tim_Ch_6,
IfxGtm_Tim_Ch_7
}
Enum for TIM channels. More...
enum IfxGtm_Tom {
IfxGtm_Tom_0,
IfxGtm_Tom_1
}
Enum for TOM objects. More...
enum IfxGtm_Tom_Ch {
IfxGtm_Tom_Ch_none = -1,
IfxGtm_Tom_Ch_0,
IfxGtm_Tom_Ch_1,
IfxGtm_Tom_Ch_2,
IfxGtm_Tom_Ch_3,
IfxGtm_Tom_Ch_4,
IfxGtm_Tom_Ch_5,
IfxGtm_Tom_Ch_6,
IfxGtm_Tom_Ch_7,
IfxGtm_Tom_Ch_8,
IfxGtm_Tom_Ch_9,
IfxGtm_Tom_Ch_10,
IfxGtm_Tom_Ch_11,
IfxGtm_Tom_Ch_12,
IfxGtm_Tom_Ch_13,
IfxGtm_Tom_Ch_14,
IfxGtm_Tom_Ch_15
}
Enum for TOM channels. More...
enum IfxGtm_Tom_Tgc {
IfxGtm_Tom_Tgc_0,
IfxGtm_Tom_Tgc_1
}
Enum for TOM global channel control units. More...

Detailed Description

GTM on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_cfg.h.

Macro Definition Documentation

◆ IFXGTM_CMU_CLKDIS_ALL

#define IFXGTM_CMU_CLKDIS_ALL (0x00555555)

Mask for CMU_CLK_EN register (Disable): ALL clocks.

Definition at line 177 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK0

#define IFXGTM_CMU_CLKDIS_CLK0 (0x00000001)

Mask for CMU_CLK_EN register (Disable): CLK0.

Definition at line 129 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK1

#define IFXGTM_CMU_CLKDIS_CLK1 (0x00000004)

Mask for CMU_CLK_EN register (Disable): CLK1.

Definition at line 133 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK2

#define IFXGTM_CMU_CLKDIS_CLK2 (0x00000010)

Mask for CMU_CLK_EN register (Disable): CLK2.

Definition at line 137 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK3

#define IFXGTM_CMU_CLKDIS_CLK3 (0x00000040)

Mask for CMU_CLK_EN register (Disable): CLK3.

Definition at line 141 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK4

#define IFXGTM_CMU_CLKDIS_CLK4 (0x00000100)

Mask for CMU_CLK_EN register (Disable): CLK4.

Definition at line 145 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK5

#define IFXGTM_CMU_CLKDIS_CLK5 (0x00000400)

Mask for CMU_CLK_EN register (Disable): CLK5.

Definition at line 149 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK6

#define IFXGTM_CMU_CLKDIS_CLK6 (0x00001000)

Mask for CMU_CLK_EN register (Disable): CLK6.

Definition at line 153 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK7

#define IFXGTM_CMU_CLKDIS_CLK7 (0x00004000)

Mask for CMU_CLK_EN register (Disable): CLK7.

Definition at line 157 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_ECLK0

#define IFXGTM_CMU_CLKDIS_ECLK0 (0x00010000)

Mask for CMU_CLK_EN register (Disable): ECLK0.

Definition at line 161 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_ECLK1

#define IFXGTM_CMU_CLKDIS_ECLK1 (0x00040000)

Mask for CMU_CLK_EN register (Disable): ECLK1.

Definition at line 165 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_ECLK2

#define IFXGTM_CMU_CLKDIS_ECLK2 (0x00100000)

Mask for CMU_CLK_EN register (Disable): ECLK2.

Definition at line 169 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_FXCLK

#define IFXGTM_CMU_CLKDIS_FXCLK (0x00400000)

Mask for CMU_CLK_EN register (Disable): FXCLK.

Definition at line 173 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_ALL

#define IFXGTM_CMU_CLKEN_ALL (0x00AAAAAA)

Mask for CMU_CLK_EN register (Enable): ALL clocks.

Definition at line 125 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK0

#define IFXGTM_CMU_CLKEN_CLK0 (0x00000002)

Mask for CMU_CLK_EN register (Enable): CLK0.

Definition at line 77 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK1

#define IFXGTM_CMU_CLKEN_CLK1 (0x00000008)

Mask for CMU_CLK_EN register (Enable): CLK1.

Definition at line 81 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK2

#define IFXGTM_CMU_CLKEN_CLK2 (0x00000020)

Mask for CMU_CLK_EN register (Enable): CLK2.

Definition at line 85 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK3

#define IFXGTM_CMU_CLKEN_CLK3 (0x00000080)

Mask for CMU_CLK_EN register (Enable): CLK3.

Definition at line 89 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK4

#define IFXGTM_CMU_CLKEN_CLK4 (0x00000200)

Mask for CMU_CLK_EN register (Enable): CLK4.

Definition at line 93 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK5

#define IFXGTM_CMU_CLKEN_CLK5 (0x00000800)

Mask for CMU_CLK_EN register (Enable): CLK5.

Definition at line 97 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK6

#define IFXGTM_CMU_CLKEN_CLK6 (0x00002000)

Mask for CMU_CLK_EN register (Enable): CLK6.

Definition at line 101 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK7

#define IFXGTM_CMU_CLKEN_CLK7 (0x00008000)

Mask for CMU_CLK_EN register (Enable): CLK7.

Definition at line 105 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_ECLK0

#define IFXGTM_CMU_CLKEN_ECLK0 (0x00020000)

Mask for CMU_CLK_EN register (Enable): ECLK0.

Definition at line 109 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_ECLK1

#define IFXGTM_CMU_CLKEN_ECLK1 (0x00080000)

Mask for CMU_CLK_EN register (Enable): ECLK1.

Definition at line 113 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_ECLK2

#define IFXGTM_CMU_CLKEN_ECLK2 (0x00200000)

Mask for CMU_CLK_EN register (Enable): ECLK2.

Definition at line 117 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_FXCLK

#define IFXGTM_CMU_CLKEN_FXCLK (0x00800000)

Mask for CMU_CLK_EN register (Enable): FXCLK.

Definition at line 121 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_ATOM_CHANNELS

#define IFXGTM_NUM_ATOM_CHANNELS (8)

Definition at line 185 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_ATOM_OBJECTS

#define IFXGTM_NUM_ATOM_OBJECTS (4)

Definition at line 181 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_MODULES

#define IFXGTM_NUM_MODULES (1)

Definition at line 189 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_TIM_CHANNELS

#define IFXGTM_NUM_TIM_CHANNELS (8)

number of TIM channels.

Definition at line 193 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_TOM_CHANNELS

#define IFXGTM_NUM_TOM_CHANNELS (16)

Definition at line 187 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_TOM_OBJECTS

#define IFXGTM_NUM_TOM_OBJECTS (2)

Definition at line 183 of file IfxGtm_cfg.h.

Typedef Documentation

◆ Ifx_GTM_TOM_TGC

typedef volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC

Definition at line 199 of file IfxGtm_cfg.h.


iLLD_TC26B: IfxGtm_PinMap.c File Reference

  • _PinMap
Functions | Variables
IfxGtm_PinMap.c File Reference
iLLD » GTM

GTM I/O map. More...

#include "IfxGtm_PinMap.h"
#include "IfxGtm_bf.h"
Include dependency graph for IfxGtm_PinMap.c:

Go to the source code of this file.

Functions

void | IfxGtm_PinMap_setTimTin (IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
void | IfxGtm_PinMap_setAtomTout (IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
void | IfxGtm_PinMap_setTomTout (IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)

Variables

IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Clk_Out | IfxGtm_CLK0_P23_1_OUT = {&MODULE_GTM, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt4}
IfxGtm_Clk_Out | IfxGtm_CLK1_P32_4_OUT = {&MODULE_GTM, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt4}
IfxGtm_Clk_Out | IfxGtm_CLK2_P11_12_OUT = {&MODULE_GTM, {&MODULE_P11,12}, IfxPort_OutputIdx_alt3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN0_P02_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN109_P10_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN18_P00_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN26_P33_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN32_P33_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN34_P33_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)12}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN48_P22_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN53_P21_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN77_P15_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN85_P14_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN87_P14_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN8_P02_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN9_P00_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)13}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN103_P10_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN10_P00_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)10}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN11_P00_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN19_P00_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN1_P02_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN27_P33_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN31_P33_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN35_P33_13_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)12}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN47_P22_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN54_P21_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN78_P15_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN86_P14_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN104_P10_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN107_P10_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN20_P00_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN28_P33_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN2_P02_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN33_P33_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN36_P32_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN46_P23_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN55_P21_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN79_P15_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN105_P10_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN108_P10_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN21_P00_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN29_P33_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN38_P32_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN3_P02_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN49_P22_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN51_P21_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P21, 0}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN56_P21_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN60_P20_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)10}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN80_P14_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN102_P10_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN22_P33_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN30_P33_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN39_P32_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN4_P02_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN50_P22_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN52_P21_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P21, 1}, (IfxGtm_ChXSel)10}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN57_P21_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN61_P20_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN81_P14_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_5_TIN110_P10_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_5_TIN23_P33_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P33, 1}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_5_TIN40_P32_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_5_TIN41_P23_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_5_TIN58_P21_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_5_TIN5_P02_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_5_TIN82_P14_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_6_TIN106_P10_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_6_TIN24_P33_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_6_TIN42_P23_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_6_TIN43_P23_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_6_TIN59_P20_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_6_TIN62_P20_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_6_TIN83_P14_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_7_TIN25_P33_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_7_TIN44_P23_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_7_TIN45_P23_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_7_TIN63_P20_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_7_TIN64_P20_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_7_TIN7_P02_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_7_TIN84_P14_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN0_P02_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN109_P10_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)14}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN18_P00_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN26_P33_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN32_P33_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN48_P22_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN53_P21_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN68_P20_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)15}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN76_P15_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN77_P15_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN85_P14_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN87_P14_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)13}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN94_P13_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN103_P10_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN19_P00_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)14}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN1_P02_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN27_P33_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN31_P33_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN47_P22_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN54_P21_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN69_P20_13_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)10}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN78_P15_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN86_P14_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN95_P11_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN104_P10_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN107_P10_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN12_P00_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN20_P00_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)14}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN28_P33_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN2_P02_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN33_P33_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN46_P23_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)15}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN55_P21_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN70_P20_14_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)10}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN79_P15_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN96_P11_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN105_P10_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN108_P10_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN13_P00_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN21_P00_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN29_P33_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN38_P32_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN3_P02_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN49_P22_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN56_P21_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN71_P15_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)10}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN80_P14_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN97_P11_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)12}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN102_P10_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN14_P00_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN22_P33_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN30_P33_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN39_P32_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN4_P02_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN50_P22_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN57_P21_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN72_P15_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)12}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN81_P14_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN98_P11_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN110_P10_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN15_P00_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN40_P32_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN41_P23_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN58_P21_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN5_P02_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN65_P20_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN73_P15_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN82_P14_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN91_P13_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN99_P11_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)12}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN100_P11_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)12}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN106_P10_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN16_P00_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN24_P33_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN42_P23_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN43_P23_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN59_P20_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN66_P20_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN6_P02_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P02, 6}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN74_P15_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN83_P14_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN92_P13_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)13}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN101_P11_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)12}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN17_P00_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN25_P33_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN44_P23_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN45_P23_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN64_P20_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN67_P20_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN75_P15_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN7_P02_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN84_P14_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN93_P13_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_0_TIN34_P33_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_0_TIN68_P20_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_0_TIN76_P15_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_0_TIN8_P02_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_0_TIN94_P13_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_0_TIN9_P00_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_1_TIN10_P00_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_1_TIN11_P00_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_1_TIN35_P33_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_1_TIN69_P20_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_1_TIN95_P11_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_2_TIN12_P00_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_2_TIN36_P32_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_2_TIN70_P20_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_2_TIN88_P14_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P14, 8}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_2_TIN96_P11_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_3_TIN13_P00_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_3_TIN60_P20_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_3_TIN71_P15_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_3_TIN89_P14_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P14, 9}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_3_TIN97_P11_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_4_TIN14_P00_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_4_TIN51_P21_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P21, 0}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_4_TIN61_P20_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_4_TIN72_P15_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_4_TIN90_P14_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P14,10}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_4_TIN98_P11_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_5_TIN15_P00_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_5_TIN52_P21_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P21, 1}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_5_TIN65_P20_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_5_TIN73_P15_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_5_TIN91_P13_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_5_TIN99_P11_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_6_TIN100_P11_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_6_TIN16_P00_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_6_TIN62_P20_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_6_TIN66_P20_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_6_TIN74_P15_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_6_TIN92_P13_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_7_TIN101_P11_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_7_TIN17_P00_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_7_TIN63_P20_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_7_TIN67_P20_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_7_TIN75_P15_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_7_TIN93_P13_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)3}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT109_P10_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_10_TOUT12_P00_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_10_TOUT41_P23_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_10_TOUT46_P23_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_10_TOUT70_P20_14_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_10_TOUT96_P11_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_11_TOUT13_P00_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_11_TOUT43_P23_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_11_TOUT49_P22_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_11_TOUT71_P15_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_11_TOUT97_P11_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_12_TOUT14_P00_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_12_TOUT44_P23_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_12_TOUT50_P22_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_12_TOUT72_P15_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_12_TOUT98_P11_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_13_TOUT15_P00_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_13_TOUT73_P15_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_13_TOUT99_P11_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_14_TOUT100_P11_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_14_TOUT16_P00_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_14_TOUT74_P15_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_15_TOUT101_P11_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_15_TOUT17_P00_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_15_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_15_TOUT75_P15_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_1_TOUT103_P10_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_2_TOUT104_P10_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_2_TOUT107_P10_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT105_P10_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT108_P10_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT60_P20_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_4_TOUT102_P10_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_4_TOUT61_P20_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_5_TOUT110_P10_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_8_TOUT48_P22_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_8_TOUT68_P20_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_8_TOUT8_P02_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_8_TOUT94_P13_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_8_TOUT95_P11_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_8_TOUT9_P00_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_9_TOUT10_P00_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_9_TOUT11_P00_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_9_TOUT47_P22_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_9_TOUT69_P20_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT48_P22_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT94_P13_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_10_TOUT104_P10_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_10_TOUT107_P10_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_11_TOUT105_P10_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_11_TOUT108_P10_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_11_TOUT60_P20_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_12_TOUT102_P10_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_12_TOUT61_P20_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_13_TOUT110_P10_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT47_P22_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT95_P11_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT46_P23_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT96_P11_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT49_P22_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT97_P11_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT50_P22_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT98_P11_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT99_P11_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT100_P11_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT43_P23_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT101_P11_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT44_P23_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_8_TOUT109_P10_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_9_TOUT103_P10_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Detailed Description

GTM I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_PinMap.c.

Variable Documentation

◆ IfxGtm_ATOM0_0_TOUT0_P02_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 45 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0_TOUT109_P10_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

Definition at line 46 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0_TOUT48_P22_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

Definition at line 47 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0_TOUT53_P21_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 48 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0_TOUT85_P14_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

Definition at line 49 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0_TOUT8_P02_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 50 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0_TOUT9_P00_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 51 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT103_P10_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

Definition at line 52 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT10_P00_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 53 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT11_P00_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 54 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT1_P02_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 55 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT31_P33_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 56 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT47_P22_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}

Definition at line 57 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT54_P21_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

Definition at line 58 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT84_P14_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

Definition at line 59 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT104_P10_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

Definition at line 60 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT107_P10_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

Definition at line 61 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT12_P00_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 62 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT2_P02_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 63 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT33_P33_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

Definition at line 64 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT46_P23_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

Definition at line 65 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT55_P21_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

Definition at line 66 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT83_P14_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}

Definition at line 67 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT105_P10_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

Definition at line 68 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT108_P10_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

Definition at line 69 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT13_P00_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

Definition at line 70 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT38_P32_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

Definition at line 71 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT3_P02_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 72 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT49_P22_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

Definition at line 73 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT56_P21_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 74 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT60_P20_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

Definition at line 75 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT82_P14_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

Definition at line 76 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT102_P10_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

Definition at line 77 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT14_P00_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 78 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT39_P32_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 79 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT4_P02_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 80 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT50_P22_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 81 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT57_P21_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 82 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT61_P20_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 83 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT81_P14_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

Definition at line 84 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT110_P10_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

Definition at line 85 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT15_P00_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 86 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT23_P33_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 87 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT40_P32_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 88 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT41_P23_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

Definition at line 89 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT58_P21_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

Definition at line 90 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT5_P02_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 91 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT106_P10_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 92 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT16_P00_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 93 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT24_P33_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 94 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT42_P23_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 95 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT59_P20_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 96 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT6_P02_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 97 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7_TOUT17_P00_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

Definition at line 98 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7_TOUT25_P33_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

Definition at line 99 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7_TOUT45_P23_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

Definition at line 100 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7_TOUT64_P20_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

Definition at line 101 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7_TOUT7_P02_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 102 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT0_P02_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 103 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT109_P10_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

Definition at line 104 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT48_P22_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

Definition at line 105 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT53_P21_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 106 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT68_P20_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

Definition at line 107 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT76_P15_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 108 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT77_P15_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 109 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT87_P14_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

Definition at line 110 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT8_P02_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 111 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT9_P00_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 112 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT103_P10_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

Definition at line 113 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT10_P00_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 114 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT11_P00_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 115 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT1_P02_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 116 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT31_P33_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 117 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT47_P22_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}

Definition at line 118 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT54_P21_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

Definition at line 119 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT69_P20_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

Definition at line 120 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT78_P15_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 121 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT79_P15_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 122 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT86_P14_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

Definition at line 123 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT104_P10_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

Definition at line 124 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT107_P10_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

Definition at line 125 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT12_P00_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 126 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT2_P02_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 127 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT33_P33_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

Definition at line 128 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT46_P23_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

Definition at line 129 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT55_P21_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

Definition at line 130 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT70_P20_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

Definition at line 131 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT80_P14_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

Definition at line 132 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT105_P10_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

Definition at line 133 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT108_P10_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

Definition at line 134 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT13_P00_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

Definition at line 135 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT38_P32_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

Definition at line 136 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT3_P02_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 137 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT49_P22_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

Definition at line 138 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT56_P21_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 139 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT60_P20_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

Definition at line 140 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT71_P15_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 141 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT102_P10_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

Definition at line 142 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT14_P00_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 143 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT39_P32_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 144 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT4_P02_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 145 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT50_P22_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 146 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT57_P21_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 147 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT61_P20_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 148 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT72_P15_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

Definition at line 149 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT110_P10_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

Definition at line 150 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT15_P00_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 151 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT23_P33_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 152 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT40_P32_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 153 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT41_P23_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

Definition at line 154 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT58_P21_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

Definition at line 155 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT5_P02_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 156 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT65_P20_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 157 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT73_P15_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 158 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT106_P10_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 159 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT16_P00_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 160 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT24_P33_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 161 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT42_P23_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 162 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT59_P20_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 163 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT66_P20_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

Definition at line 164 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT6_P02_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 165 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT74_P15_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 166 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT17_P00_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

Definition at line 167 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT25_P33_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

Definition at line 168 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT45_P23_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

Definition at line 169 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT67_P20_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

Definition at line 170 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT75_P15_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

Definition at line 171 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT7_P02_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 172 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0_TOUT18_P00_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

Definition at line 173 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0_TOUT26_P33_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 174 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0_TOUT32_P33_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 175 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0_TOUT68_P20_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

Definition at line 176 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0_TOUT94_P13_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 177 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1_TOUT19_P00_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

Definition at line 178 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1_TOUT27_P33_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 179 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1_TOUT43_P23_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

Definition at line 180 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1_TOUT69_P20_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

Definition at line 181 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1_TOUT95_P11_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 182 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT20_P00_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

Definition at line 183 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT28_P33_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 184 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT44_P23_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

Definition at line 185 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT70_P20_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

Definition at line 186 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT88_P14_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

Definition at line 187 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT96_P11_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 188 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3_TOUT21_P00_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

Definition at line 189 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3_TOUT29_P33_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 190 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3_TOUT71_P15_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 191 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3_TOUT89_P14_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

Definition at line 192 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3_TOUT97_P11_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 193 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT22_P33_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

Definition at line 194 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT30_P33_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 195 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT34_P33_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

Definition at line 196 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT51_P21_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

Definition at line 197 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT72_P15_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

Definition at line 198 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT90_P14_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 199 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT98_P11_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 200 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT35_P33_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

Definition at line 201 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT52_P21_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Definition at line 202 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT65_P20_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 203 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT73_P15_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 204 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT91_P13_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 205 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT99_P11_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

Definition at line 206 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT100_P11_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

Definition at line 207 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT36_P32_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

Definition at line 208 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT62_P20_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

Definition at line 209 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT66_P20_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

Definition at line 210 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT74_P15_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 211 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT92_P13_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 212 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT101_P11_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

Definition at line 213 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT63_P20_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

Definition at line 214 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT64_P20_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

Definition at line 215 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT67_P20_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

Definition at line 216 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT75_P15_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

Definition at line 217 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT93_P13_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 218 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT18_P00_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

Definition at line 219 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT26_P33_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 220 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT32_P33_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 221 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT76_P15_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 222 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT77_P15_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 223 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT85_P14_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

Definition at line 224 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT87_P14_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

Definition at line 225 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT94_P13_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 226 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT19_P00_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

Definition at line 227 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT27_P33_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 228 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT43_P23_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

Definition at line 229 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT78_P15_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 230 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT79_P15_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 231 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT84_P14_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

Definition at line 232 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT86_P14_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

Definition at line 233 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT95_P11_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 234 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT20_P00_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

Definition at line 235 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT28_P33_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 236 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT44_P23_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

Definition at line 237 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT80_P14_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

Definition at line 238 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT83_P14_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}

Definition at line 239 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT88_P14_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

Definition at line 240 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT96_P11_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 241 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3_TOUT21_P00_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

Definition at line 242 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3_TOUT29_P33_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 243 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3_TOUT82_P14_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

Definition at line 244 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3_TOUT89_P14_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

Definition at line 245 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3_TOUT97_P11_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 246 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT22_P33_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

Definition at line 247 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT30_P33_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 248 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT34_P33_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

Definition at line 249 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT51_P21_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

Definition at line 250 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT81_P14_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

Definition at line 251 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT90_P14_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 252 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT98_P11_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 253 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5_TOUT35_P33_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

Definition at line 254 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5_TOUT52_P21_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Definition at line 255 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5_TOUT91_P13_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 256 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5_TOUT99_P11_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

Definition at line 257 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6_TOUT100_P11_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

Definition at line 258 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6_TOUT36_P32_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

Definition at line 259 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6_TOUT62_P20_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

Definition at line 260 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6_TOUT92_P13_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 261 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_7_TOUT101_P11_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

Definition at line 262 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_7_TOUT63_P20_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

Definition at line 263 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_7_TOUT93_P13_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 264 of file IfxGtm_PinMap.c.

◆ IfxGtm_CLK0_P23_1_OUT

IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT = {&MODULE_GTM, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt4}

Definition at line 265 of file IfxGtm_PinMap.c.

◆ IfxGtm_CLK1_P32_4_OUT

IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT = {&MODULE_GTM, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt4}

Definition at line 266 of file IfxGtm_PinMap.c.

◆ IfxGtm_CLK2_P11_12_OUT

IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT = {&MODULE_GTM, {&MODULE_P11,12}, IfxPort_OutputIdx_alt3}

Definition at line 267 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN0_P02_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2}

Definition at line 268 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN109_P10_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)3}

Definition at line 269 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN18_P00_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1}

Definition at line 270 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN26_P33_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10}

Definition at line 271 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN32_P33_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9}

Definition at line 272 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN34_P33_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)12}

Definition at line 273 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN48_P22_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8}

Definition at line 274 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN53_P21_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7}

Definition at line 275 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN77_P15_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6}

Definition at line 276 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN85_P14_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4}

Definition at line 277 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN87_P14_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)5}

Definition at line 278 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN8_P02_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)11}

Definition at line 279 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN9_P00_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)13}

Definition at line 280 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN103_P10_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3}

Definition at line 281 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN10_P00_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)10}

Definition at line 282 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN11_P00_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)11}

Definition at line 283 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN19_P00_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)1}

Definition at line 284 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN1_P02_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2}

Definition at line 285 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN27_P33_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8}

Definition at line 286 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN31_P33_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9}

Definition at line 287 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN35_P33_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)12}

Definition at line 288 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN47_P22_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7}

Definition at line 289 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN54_P21_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6}

Definition at line 290 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN78_P15_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5}

Definition at line 291 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN86_P14_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4}

Definition at line 292 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN104_P10_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3}

Definition at line 293 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN107_P10_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4}

Definition at line 294 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN20_P00_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)1}

Definition at line 295 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN28_P33_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9}

Definition at line 296 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN2_P02_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2}

Definition at line 297 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN33_P33_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8}

Definition at line 298 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN36_P32_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)11}

Definition at line 299 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN46_P23_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)7}

Definition at line 300 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN55_P21_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6}

Definition at line 301 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN79_P15_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5}

Definition at line 302 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN105_P10_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3}

Definition at line 303 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN108_P10_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4}

Definition at line 304 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN21_P00_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)1}

Definition at line 305 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN29_P33_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9}

Definition at line 306 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN38_P32_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8}

Definition at line 307 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN3_P02_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2}

Definition at line 308 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN49_P22_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7}

Definition at line 309 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN51_P21_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P21, 0}, (IfxGtm_ChXSel)11}

Definition at line 310 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN56_P21_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6}

Definition at line 311 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN60_P20_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)10}

Definition at line 312 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN80_P14_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5}

Definition at line 313 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN102_P10_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2}

Definition at line 314 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN22_P33_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6}

Definition at line 315 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN30_P33_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7}

Definition at line 316 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN39_P32_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5}

Definition at line 317 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN4_P02_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1}

Definition at line 318 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN50_P22_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4}

Definition at line 319 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN52_P21_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P21, 1}, (IfxGtm_ChXSel)10}

Definition at line 320 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN57_P21_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8}

Definition at line 321 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN61_P20_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)9}

Definition at line 322 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN81_P14_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3}

Definition at line 323 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_TIN110_P10_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2}

Definition at line 324 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_TIN23_P33_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P33, 1}, (IfxGtm_ChXSel)6}

Definition at line 325 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_TIN40_P32_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5}

Definition at line 326 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_TIN41_P23_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4}

Definition at line 327 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_TIN58_P21_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7}

Definition at line 328 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_TIN5_P02_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1}

Definition at line 329 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_TIN82_P14_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3}

Definition at line 330 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_TIN106_P10_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)1}

Definition at line 331 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_TIN24_P33_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6}

Definition at line 332 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_TIN42_P23_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4}

Definition at line 333 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_TIN43_P23_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5}

Definition at line 334 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_TIN59_P20_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7}

Definition at line 335 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_TIN62_P20_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)2}

Definition at line 336 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_TIN83_P14_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3}

Definition at line 337 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_TIN25_P33_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6}

Definition at line 338 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_TIN44_P23_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4}

Definition at line 339 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_TIN45_P23_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5}

Definition at line 340 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_TIN63_P20_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)7}

Definition at line 341 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_TIN64_P20_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3}

Definition at line 342 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_TIN7_P02_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1}

Definition at line 343 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_TIN84_P14_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2}

Definition at line 344 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN0_P02_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2}

Definition at line 345 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN109_P10_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)14}

Definition at line 346 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN18_P00_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1}

Definition at line 347 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN26_P33_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10}

Definition at line 348 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN32_P33_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9}

Definition at line 349 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN48_P22_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8}

Definition at line 350 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN53_P21_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7}

Definition at line 351 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN68_P20_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)15}

Definition at line 352 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN76_P15_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)5}

Definition at line 353 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN77_P15_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6}

Definition at line 354 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN85_P14_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4}

Definition at line 355 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN87_P14_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)13}

Definition at line 356 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN94_P13_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3}

Definition at line 357 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN103_P10_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3}

Definition at line 358 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN19_P00_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)14}

Definition at line 359 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN1_P02_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2}

Definition at line 360 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN27_P33_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8}

Definition at line 361 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN31_P33_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9}

Definition at line 362 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN47_P22_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7}

Definition at line 363 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN54_P21_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6}

Definition at line 364 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN69_P20_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)10}

Definition at line 365 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN78_P15_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5}

Definition at line 366 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN86_P14_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4}

Definition at line 367 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN95_P11_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)1}

Definition at line 368 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN104_P10_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3}

Definition at line 369 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN107_P10_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4}

Definition at line 370 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN12_P00_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1}

Definition at line 371 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN20_P00_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)14}

Definition at line 372 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN28_P33_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9}

Definition at line 373 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN2_P02_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2}

Definition at line 374 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN33_P33_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8}

Definition at line 375 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN46_P23_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)15}

Definition at line 376 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN55_P21_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6}

Definition at line 377 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN70_P20_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)10}

Definition at line 378 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN79_P15_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5}

Definition at line 379 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN96_P11_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)7}

Definition at line 380 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN105_P10_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3}

Definition at line 381 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN108_P10_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4}

Definition at line 382 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN13_P00_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1}

Definition at line 383 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN21_P00_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)11}

Definition at line 384 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN29_P33_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9}

Definition at line 385 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN38_P32_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8}

Definition at line 386 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN3_P02_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2}

Definition at line 387 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN49_P22_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7}

Definition at line 388 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN56_P21_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6}

Definition at line 389 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN71_P15_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)10}

Definition at line 390 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN80_P14_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5}

Definition at line 391 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN97_P11_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)12}

Definition at line 392 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN102_P10_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2}

Definition at line 393 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN14_P00_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)9}

Definition at line 394 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN22_P33_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6}

Definition at line 395 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN30_P33_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7}

Definition at line 396 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN39_P32_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5}

Definition at line 397 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN4_P02_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1}

Definition at line 398 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN50_P22_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4}

Definition at line 399 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN57_P21_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8}

Definition at line 400 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN72_P15_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)12}

Definition at line 401 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN81_P14_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3}

Definition at line 402 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN98_P11_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)11}

Definition at line 403 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN110_P10_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2}

Definition at line 404 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN15_P00_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)11}

Definition at line 405 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN40_P32_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5}

Definition at line 406 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN41_P23_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4}

Definition at line 407 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN58_P21_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7}

Definition at line 408 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN5_P02_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1}

Definition at line 409 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN65_P20_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)9}

Definition at line 410 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN73_P15_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)8}

Definition at line 411 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN82_P14_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3}

Definition at line 412 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN91_P13_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)6}

Definition at line 413 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN99_P11_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)12}

Definition at line 414 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN100_P11_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)12}

Definition at line 415 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN106_P10_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)2}

Definition at line 416 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN16_P00_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)11}

Definition at line 417 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN24_P33_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6}

Definition at line 418 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN42_P23_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4}

Definition at line 419 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN43_P23_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5}

Definition at line 420 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN59_P20_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7}

Definition at line 421 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN66_P20_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)9}

Definition at line 422 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN6_P02_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P02, 6}, (IfxGtm_ChXSel)1}

Definition at line 423 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN74_P15_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)8}

Definition at line 424 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN83_P14_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3}

Definition at line 425 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN92_P13_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)13}

Definition at line 426 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN101_P11_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)12}

Definition at line 427 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN17_P00_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)11}

Definition at line 428 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN25_P33_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6}

Definition at line 429 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN44_P23_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4}

Definition at line 430 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN45_P23_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5}

Definition at line 431 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN64_P20_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3}

Definition at line 432 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN67_P20_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)8}

Definition at line 433 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN75_P15_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)7}

Definition at line 434 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN7_P02_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1}

Definition at line 435 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN84_P14_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2}

Definition at line 436 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN93_P13_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)9}

Definition at line 437 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_TIN34_P33_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)6}

Definition at line 438 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_TIN68_P20_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)5}

Definition at line 439 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_TIN76_P15_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)4}

Definition at line 440 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_TIN8_P02_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)2}

Definition at line 441 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_TIN94_P13_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3}

Definition at line 442 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_TIN9_P00_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)1}

Definition at line 443 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_TIN10_P00_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)1}

Definition at line 444 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_TIN11_P00_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)2}

Definition at line 445 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_TIN35_P33_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)5}

Definition at line 446 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_TIN69_P20_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)4}

Definition at line 447 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_TIN95_P11_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)3}

Definition at line 448 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_TIN12_P00_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1}

Definition at line 449 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_TIN36_P32_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)5}

Definition at line 450 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_TIN70_P20_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)4}

Definition at line 451 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_TIN88_P14_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P14, 8}, (IfxGtm_ChXSel)3}

Definition at line 452 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_TIN96_P11_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)2}

Definition at line 453 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_TIN13_P00_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1}

Definition at line 454 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_TIN60_P20_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)5}

Definition at line 455 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_TIN71_P15_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)4}

Definition at line 456 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_TIN89_P14_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P14, 9}, (IfxGtm_ChXSel)3}

Definition at line 457 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_TIN97_P11_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)2}

Definition at line 458 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_TIN14_P00_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)1}

Definition at line 459 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_TIN51_P21_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P21, 0}, (IfxGtm_ChXSel)6}

Definition at line 460 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_TIN61_P20_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)5}

Definition at line 461 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_TIN72_P15_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)4}

Definition at line 462 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_TIN90_P14_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P14,10}, (IfxGtm_ChXSel)3}

Definition at line 463 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_TIN98_P11_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)2}

Definition at line 464 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_TIN15_P00_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)1}

Definition at line 465 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_TIN52_P21_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P21, 1}, (IfxGtm_ChXSel)6}

Definition at line 466 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_TIN65_P20_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)5}

Definition at line 467 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_TIN73_P15_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)4}

Definition at line 468 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_TIN91_P13_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)3}

Definition at line 469 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_TIN99_P11_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)2}

Definition at line 470 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_TIN100_P11_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)2}

Definition at line 471 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_TIN16_P00_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)1}

Definition at line 472 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_TIN62_P20_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)5}

Definition at line 473 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_TIN66_P20_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)6}

Definition at line 474 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_TIN74_P15_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)4}

Definition at line 475 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_TIN92_P13_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)3}

Definition at line 476 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_TIN101_P11_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)2}

Definition at line 477 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_TIN17_P00_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)1}

Definition at line 478 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_TIN63_P20_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)5}

Definition at line 479 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_TIN67_P20_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)6}

Definition at line 480 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_TIN75_P15_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)4}

Definition at line 481 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_TIN93_P13_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)3}

Definition at line 482 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT109_P10_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

Definition at line 483 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT18_P00_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

Definition at line 484 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT26_P33_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 485 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT32_P33_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 486 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT53_P21_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 487 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT76_P15_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 488 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT77_P15_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 489 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT85_P14_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

Definition at line 490 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT87_P14_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

Definition at line 491 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT12_P00_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 492 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT2_P02_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 493 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT41_P23_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

Definition at line 494 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT46_P23_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

Definition at line 495 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT62_P20_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

Definition at line 496 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT70_P20_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

Definition at line 497 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT96_P11_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 498 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT13_P00_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

Definition at line 499 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT3_P02_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 500 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT43_P23_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

Definition at line 501 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT49_P22_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

Definition at line 502 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT63_P20_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

Definition at line 503 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT71_P15_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 504 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT97_P11_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 505 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT14_P00_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 506 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT34_P33_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

Definition at line 507 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT44_P23_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

Definition at line 508 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT4_P02_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 509 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT50_P22_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 510 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT72_P15_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

Definition at line 511 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT98_P11_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 512 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_13_TOUT15_P00_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 513 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_13_TOUT35_P33_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

Definition at line 514 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_13_TOUT5_P02_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 515 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_13_TOUT65_P20_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 516 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_13_TOUT73_P15_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 517 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_13_TOUT99_P11_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

Definition at line 518 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_14_TOUT100_P11_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

Definition at line 519 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_14_TOUT16_P00_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 520 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_14_TOUT36_P32_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

Definition at line 521 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_14_TOUT66_P20_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

Definition at line 522 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_14_TOUT6_P02_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 523 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_14_TOUT74_P15_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 524 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_15_TOUT101_P11_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

Definition at line 525 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_15_TOUT17_P00_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

Definition at line 526 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_15_TOUT42_P23_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 527 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_15_TOUT67_P20_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

Definition at line 528 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_15_TOUT75_P15_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

Definition at line 529 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_15_TOUT7_P02_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 530 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT103_P10_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

Definition at line 531 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT19_P00_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

Definition at line 532 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT27_P33_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 533 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT31_P33_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 534 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT54_P21_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

Definition at line 535 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT78_P15_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 536 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT86_P14_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

Definition at line 537 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT104_P10_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

Definition at line 538 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT107_P10_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

Definition at line 539 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT20_P00_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

Definition at line 540 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT28_P33_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 541 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT33_P33_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

Definition at line 542 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT55_P21_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

Definition at line 543 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT79_P15_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 544 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT88_P14_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

Definition at line 545 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT105_P10_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

Definition at line 546 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT108_P10_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

Definition at line 547 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT21_P00_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

Definition at line 548 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT29_P33_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 549 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT38_P32_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

Definition at line 550 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT56_P21_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 551 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT60_P20_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

Definition at line 552 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT80_P14_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

Definition at line 553 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT89_P14_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

Definition at line 554 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT102_P10_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

Definition at line 555 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT22_P33_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

Definition at line 556 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT30_P33_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 557 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT39_P32_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 558 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT57_P21_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 559 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT61_P20_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 560 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT81_P14_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

Definition at line 561 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT90_P14_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 562 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT110_P10_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

Definition at line 563 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT23_P33_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 564 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT40_P32_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 565 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT58_P21_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

Definition at line 566 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT82_P14_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

Definition at line 567 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT91_P13_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 568 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT106_P10_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 569 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT24_P33_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 570 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT42_P23_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 571 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT59_P20_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 572 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT83_P14_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}

Definition at line 573 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT92_P13_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 574 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT25_P33_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

Definition at line 575 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT45_P23_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

Definition at line 576 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT64_P20_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

Definition at line 577 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT84_P14_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

Definition at line 578 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT93_P13_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 579 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT0_P02_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 580 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT48_P22_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

Definition at line 581 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT51_P21_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

Definition at line 582 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT68_P20_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

Definition at line 583 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT8_P02_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 584 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT94_P13_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 585 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT95_P11_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 586 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT9_P00_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 587 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_9_TOUT10_P00_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 588 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_9_TOUT11_P00_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 589 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_9_TOUT1_P02_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 590 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_9_TOUT47_P22_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}

Definition at line 591 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_9_TOUT52_P21_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Definition at line 592 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_9_TOUT69_P20_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

Definition at line 593 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT18_P00_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

Definition at line 594 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT26_P33_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 595 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT32_P33_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 596 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT48_P22_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

Definition at line 597 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT53_P21_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 598 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT68_P20_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

Definition at line 599 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT76_P15_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 600 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT77_P15_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 601 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT85_P14_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

Definition at line 602 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT87_P14_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

Definition at line 603 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT8_P02_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 604 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT94_P13_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 605 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT9_P00_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 606 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_10_TOUT104_P10_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

Definition at line 607 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_10_TOUT107_P10_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

Definition at line 608 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_10_TOUT2_P02_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 609 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_10_TOUT62_P20_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

Definition at line 610 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_11_TOUT105_P10_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

Definition at line 611 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_11_TOUT108_P10_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

Definition at line 612 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_11_TOUT3_P02_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 613 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_11_TOUT60_P20_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

Definition at line 614 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_11_TOUT63_P20_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

Definition at line 615 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_12_TOUT102_P10_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

Definition at line 616 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_12_TOUT34_P33_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

Definition at line 617 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_12_TOUT4_P02_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 618 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_12_TOUT61_P20_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 619 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_13_TOUT110_P10_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

Definition at line 620 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_13_TOUT35_P33_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

Definition at line 621 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_13_TOUT5_P02_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 622 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_13_TOUT65_P20_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 623 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_14_TOUT36_P32_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

Definition at line 624 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_14_TOUT66_P20_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

Definition at line 625 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_14_TOUT6_P02_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 626 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_15_TOUT67_P20_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

Definition at line 627 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_15_TOUT7_P02_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 628 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT10_P00_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 629 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT11_P00_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 630 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT19_P00_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

Definition at line 631 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT27_P33_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 632 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT31_P33_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 633 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT47_P22_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}

Definition at line 634 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT54_P21_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

Definition at line 635 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT69_P20_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

Definition at line 636 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT78_P15_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 637 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT86_P14_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

Definition at line 638 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT95_P11_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 639 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT12_P00_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 640 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT20_P00_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

Definition at line 641 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT28_P33_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 642 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT33_P33_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

Definition at line 643 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT46_P23_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

Definition at line 644 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT55_P21_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

Definition at line 645 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT70_P20_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

Definition at line 646 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT79_P15_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 647 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT88_P14_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

Definition at line 648 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT96_P11_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 649 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT13_P00_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

Definition at line 650 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT21_P00_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

Definition at line 651 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT29_P33_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 652 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT38_P32_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

Definition at line 653 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT49_P22_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

Definition at line 654 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT56_P21_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 655 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT71_P15_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 656 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT80_P14_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

Definition at line 657 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT89_P14_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

Definition at line 658 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT97_P11_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 659 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT14_P00_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 660 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT22_P33_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

Definition at line 661 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT30_P33_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 662 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT39_P32_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 663 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT50_P22_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 664 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT57_P21_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 665 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT72_P15_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

Definition at line 666 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT81_P14_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

Definition at line 667 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT90_P14_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 668 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT98_P11_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 669 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT15_P00_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 670 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT23_P33_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 671 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT40_P32_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 672 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT41_P23_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

Definition at line 673 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT58_P21_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

Definition at line 674 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT73_P15_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 675 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT82_P14_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

Definition at line 676 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT91_P13_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 677 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT99_P11_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

Definition at line 678 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT100_P11_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

Definition at line 679 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT106_P10_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 680 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT16_P00_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 681 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT24_P33_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 682 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT43_P23_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

Definition at line 683 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT59_P20_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 684 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT74_P15_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 685 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT83_P14_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}

Definition at line 686 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT92_P13_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 687 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT101_P11_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

Definition at line 688 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT17_P00_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

Definition at line 689 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT25_P33_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

Definition at line 690 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT44_P23_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

Definition at line 691 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT45_P23_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

Definition at line 692 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT64_P20_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

Definition at line 693 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT75_P15_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

Definition at line 694 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT84_P14_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

Definition at line 695 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT93_P13_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 696 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_8_TOUT0_P02_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 697 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_8_TOUT109_P10_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

Definition at line 698 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_8_TOUT51_P21_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

Definition at line 699 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_9_TOUT103_P10_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

Definition at line 700 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_9_TOUT1_P02_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 701 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_9_TOUT52_P21_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Definition at line 702 of file IfxGtm_PinMap.c.


iLLD_TC26B: IfxGtm_PinMap.h File Reference

  • _PinMap
Data Structures | Typedefs | Enumerations | Functions | Variables
IfxGtm_PinMap.h File Reference
iLLD » GTM

GTM I/O map. More...

#include <IfxGtm_reg.h>
#include <_Impl/IfxGtm_cfg.h>
#include <Port/Std/IfxPort.h>
#include <Gtm/Std/IfxGtm_Atom.h>
#include <Gtm/Std/IfxGtm_Tom.h>
#include <Gtm/Std/IfxGtm_Tim.h>
Include dependency graph for IfxGtm_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tim_TinMap
TIN pin mapping structure. More...
struct | IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure. More...
struct | IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure. More...
struct | IfxGtm_Clk_Out
GTM Clock Output. More...

Typedefs

typedef IfxGtm_Atom_ToutMap * | IfxGtm_Atom_ToutMapP
Pointer to IfxGtm_Atom_ToutMap. More...
typedef IfxGtm_Tom_ToutMap * | IfxGtm_Tom_ToutMapP
Pointer to IfxGtm_Tom_ToutMap. More...

Enumerations

enum IfxGtm_ChXSel {
IfxGtm_ChXSel_a,
IfxGtm_ChXSel_b,
IfxGtm_ChXSel_c,
IfxGtm_ChXSel_d,
IfxGtm_ChXSel_e,
IfxGtm_ChXSel_f,
IfxGtm_ChXSel_g,
IfxGtm_ChXSel_h,
IfxGtm_ChXSel_i,
IfxGtm_ChXSel_j,
IfxGtm_ChXSel_k,
IfxGtm_ChXSel_l,
IfxGtm_ChXSel_m,
IfxGtm_ChXSel_n,
IfxGtm_ChXSel_o,
IfxGtm_ChXSel_p
}
CHxSEL register control code. More...
enum IfxGtm_ToutSel {
IfxGtm_ToutSel_a,
IfxGtm_ToutSel_b,
IfxGtm_ToutSel_c,
IfxGtm_ToutSel_d,
IfxGtm_ToutSel_e
}
TOUTSEL register control code. More...

Functions

IFX_EXTERN void | IfxGtm_PinMap_setTimTin (IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
IFX_EXTERN void | IfxGtm_PinMap_setAtomTout (IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
IFX_EXTERN void | IfxGtm_PinMap_setTomTout (IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)

Variables

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT
IfxGtm_ATOM0_0_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT
IfxGtm_ATOM0_0_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT
IfxGtm_ATOM0_0_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT
IfxGtm_ATOM0_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT
IfxGtm_ATOM0_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT
IfxGtm_ATOM0_0_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT
IfxGtm_ATOM0_0_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT
IfxGtm_ATOM0_1_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT
IfxGtm_ATOM0_1_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT
IfxGtm_ATOM0_1_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT
IfxGtm_ATOM0_1_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT
IfxGtm_ATOM0_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT
IfxGtm_ATOM0_1_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT
IfxGtm_ATOM0_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT
IfxGtm_ATOM0_1_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT
IfxGtm_ATOM0_2_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT
IfxGtm_ATOM0_2_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT
IfxGtm_ATOM0_2_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT
IfxGtm_ATOM0_2_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT
IfxGtm_ATOM0_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT
IfxGtm_ATOM0_2_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT
IfxGtm_ATOM0_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT
IfxGtm_ATOM0_2_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT
IfxGtm_ATOM0_3_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT
IfxGtm_ATOM0_3_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT
IfxGtm_ATOM0_3_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT
IfxGtm_ATOM0_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT
IfxGtm_ATOM0_3_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT
IfxGtm_ATOM0_3_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT
IfxGtm_ATOM0_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT
IfxGtm_ATOM0_3_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT
IfxGtm_ATOM0_3_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT
IfxGtm_ATOM0_4_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT
IfxGtm_ATOM0_4_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT
IfxGtm_ATOM0_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT
IfxGtm_ATOM0_4_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT
IfxGtm_ATOM0_4_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT
IfxGtm_ATOM0_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT
IfxGtm_ATOM0_4_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT
IfxGtm_ATOM0_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT
IfxGtm_ATOM0_5_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT
IfxGtm_ATOM0_5_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT
IfxGtm_ATOM0_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT
IfxGtm_ATOM0_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT
IfxGtm_ATOM0_5_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT
IfxGtm_ATOM0_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT
IfxGtm_ATOM0_5_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT
IfxGtm_ATOM0_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT
IfxGtm_ATOM0_6_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT
IfxGtm_ATOM0_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT
IfxGtm_ATOM0_6_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT
IfxGtm_ATOM0_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT
IfxGtm_ATOM0_6_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT
IfxGtm_ATOM0_7_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT
IfxGtm_ATOM0_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT
IfxGtm_ATOM0_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT
IfxGtm_ATOM0_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT
IfxGtm_ATOM0_7_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT
IfxGtm_ATOM1_0_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT
IfxGtm_ATOM1_0_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT
IfxGtm_ATOM1_0_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT
IfxGtm_ATOM1_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT
IfxGtm_ATOM1_0_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT
IfxGtm_ATOM1_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT
IfxGtm_ATOM1_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT
IfxGtm_ATOM1_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT
IfxGtm_ATOM1_0_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT
IfxGtm_ATOM1_0_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT
IfxGtm_ATOM1_1_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT
IfxGtm_ATOM1_1_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT
IfxGtm_ATOM1_1_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT
IfxGtm_ATOM1_1_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT
IfxGtm_ATOM1_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT
IfxGtm_ATOM1_1_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT
IfxGtm_ATOM1_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT
IfxGtm_ATOM1_1_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT
IfxGtm_ATOM1_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT
IfxGtm_ATOM1_1_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT
IfxGtm_ATOM1_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT
IfxGtm_ATOM1_2_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT
IfxGtm_ATOM1_2_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT
IfxGtm_ATOM1_2_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT
IfxGtm_ATOM1_2_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT
IfxGtm_ATOM1_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT
IfxGtm_ATOM1_2_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT
IfxGtm_ATOM1_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT
IfxGtm_ATOM1_2_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT
IfxGtm_ATOM1_2_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT
IfxGtm_ATOM1_3_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT
IfxGtm_ATOM1_3_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT
IfxGtm_ATOM1_3_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT
IfxGtm_ATOM1_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT
IfxGtm_ATOM1_3_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT
IfxGtm_ATOM1_3_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT
IfxGtm_ATOM1_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT
IfxGtm_ATOM1_3_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT
IfxGtm_ATOM1_3_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT
IfxGtm_ATOM1_4_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT
IfxGtm_ATOM1_4_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT
IfxGtm_ATOM1_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT
IfxGtm_ATOM1_4_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT
IfxGtm_ATOM1_4_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT
IfxGtm_ATOM1_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT
IfxGtm_ATOM1_4_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT
IfxGtm_ATOM1_4_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT
IfxGtm_ATOM1_5_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT
IfxGtm_ATOM1_5_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT
IfxGtm_ATOM1_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT
IfxGtm_ATOM1_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT
IfxGtm_ATOM1_5_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT
IfxGtm_ATOM1_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT
IfxGtm_ATOM1_5_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT
IfxGtm_ATOM1_5_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT
IfxGtm_ATOM1_5_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT
IfxGtm_ATOM1_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT
IfxGtm_ATOM1_6_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT
IfxGtm_ATOM1_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT
IfxGtm_ATOM1_6_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT
IfxGtm_ATOM1_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT
IfxGtm_ATOM1_6_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT
IfxGtm_ATOM1_6_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT
IfxGtm_ATOM1_6_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT
IfxGtm_ATOM1_7_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT
IfxGtm_ATOM1_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT
IfxGtm_ATOM1_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT
IfxGtm_ATOM1_7_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT
IfxGtm_ATOM1_7_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT
IfxGtm_ATOM1_7_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT
IfxGtm_ATOM2_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT
IfxGtm_ATOM2_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT
IfxGtm_ATOM2_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT
IfxGtm_ATOM2_0_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT
IfxGtm_ATOM2_0_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT
IfxGtm_ATOM2_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT
IfxGtm_ATOM2_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT
IfxGtm_ATOM2_1_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT
IfxGtm_ATOM2_1_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT
IfxGtm_ATOM2_1_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT
IfxGtm_ATOM2_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT
IfxGtm_ATOM2_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT
IfxGtm_ATOM2_2_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT
IfxGtm_ATOM2_2_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT
IfxGtm_ATOM2_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT
IfxGtm_ATOM2_2_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT
IfxGtm_ATOM2_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT
IfxGtm_ATOM2_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT
IfxGtm_ATOM2_3_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT
IfxGtm_ATOM2_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT
IfxGtm_ATOM2_3_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT
IfxGtm_ATOM2_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT
IfxGtm_ATOM2_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT
IfxGtm_ATOM2_4_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT
IfxGtm_ATOM2_4_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT
IfxGtm_ATOM2_4_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT
IfxGtm_ATOM2_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT
IfxGtm_ATOM2_4_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT
IfxGtm_ATOM2_5_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT
IfxGtm_ATOM2_5_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT
IfxGtm_ATOM2_5_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT
IfxGtm_ATOM2_5_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT
IfxGtm_ATOM2_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT
IfxGtm_ATOM2_5_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT
IfxGtm_ATOM2_6_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT
IfxGtm_ATOM2_6_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT
IfxGtm_ATOM2_6_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT
IfxGtm_ATOM2_6_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT
IfxGtm_ATOM2_6_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT
IfxGtm_ATOM2_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT
IfxGtm_ATOM2_7_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT
IfxGtm_ATOM2_7_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT
IfxGtm_ATOM2_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT
IfxGtm_ATOM2_7_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT
IfxGtm_ATOM2_7_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT
IfxGtm_ATOM2_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT
IfxGtm_ATOM3_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT
IfxGtm_ATOM3_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT
IfxGtm_ATOM3_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT
IfxGtm_ATOM3_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT
IfxGtm_ATOM3_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT
IfxGtm_ATOM3_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT
IfxGtm_ATOM3_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT
IfxGtm_ATOM3_0_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT
IfxGtm_ATOM3_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT
IfxGtm_ATOM3_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT
IfxGtm_ATOM3_1_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT
IfxGtm_ATOM3_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT
IfxGtm_ATOM3_1_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT
IfxGtm_ATOM3_1_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT
IfxGtm_ATOM3_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT
IfxGtm_ATOM3_1_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT
IfxGtm_ATOM3_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT
IfxGtm_ATOM3_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT
IfxGtm_ATOM3_2_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT
IfxGtm_ATOM3_2_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT
IfxGtm_ATOM3_2_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT
IfxGtm_ATOM3_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT
IfxGtm_ATOM3_2_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT
IfxGtm_ATOM3_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT
IfxGtm_ATOM3_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT
IfxGtm_ATOM3_3_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT
IfxGtm_ATOM3_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT
IfxGtm_ATOM3_3_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT
IfxGtm_ATOM3_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT
IfxGtm_ATOM3_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT
IfxGtm_ATOM3_4_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT
IfxGtm_ATOM3_4_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT
IfxGtm_ATOM3_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT
IfxGtm_ATOM3_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT
IfxGtm_ATOM3_4_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT
IfxGtm_ATOM3_5_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT
IfxGtm_ATOM3_5_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT
IfxGtm_ATOM3_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT
IfxGtm_ATOM3_5_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT
IfxGtm_ATOM3_6_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT
IfxGtm_ATOM3_6_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT
IfxGtm_ATOM3_6_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT
IfxGtm_ATOM3_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT
IfxGtm_ATOM3_7_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT
IfxGtm_ATOM3_7_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT
IfxGtm_ATOM3_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT
GTM_CLK0: GTM output. More...
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT
GTM_CLK1: GTM output. More...
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT
GTM_CLK2: GTM output. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN
IfxGtm_TIM0_0_TIN0_P02_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN
IfxGtm_TIM0_0_TIN109_P10_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN
IfxGtm_TIM0_0_TIN18_P00_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN
IfxGtm_TIM0_0_TIN26_P33_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN
IfxGtm_TIM0_0_TIN32_P33_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN
IfxGtm_TIM0_0_TIN34_P33_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN
IfxGtm_TIM0_0_TIN48_P22_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN
IfxGtm_TIM0_0_TIN53_P21_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN
IfxGtm_TIM0_0_TIN77_P15_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN
IfxGtm_TIM0_0_TIN85_P14_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN
IfxGtm_TIM0_0_TIN87_P14_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN
IfxGtm_TIM0_0_TIN8_P02_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN
IfxGtm_TIM0_0_TIN9_P00_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN
IfxGtm_TIM0_1_TIN103_P10_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN
IfxGtm_TIM0_1_TIN10_P00_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN
IfxGtm_TIM0_1_TIN11_P00_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN
IfxGtm_TIM0_1_TIN19_P00_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN
IfxGtm_TIM0_1_TIN1_P02_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN
IfxGtm_TIM0_1_TIN27_P33_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN
IfxGtm_TIM0_1_TIN31_P33_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN
IfxGtm_TIM0_1_TIN35_P33_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN
IfxGtm_TIM0_1_TIN47_P22_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN
IfxGtm_TIM0_1_TIN54_P21_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN
IfxGtm_TIM0_1_TIN78_P15_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN
IfxGtm_TIM0_1_TIN86_P14_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN
IfxGtm_TIM0_2_TIN104_P10_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN
IfxGtm_TIM0_2_TIN107_P10_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN
IfxGtm_TIM0_2_TIN20_P00_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN
IfxGtm_TIM0_2_TIN28_P33_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN
IfxGtm_TIM0_2_TIN2_P02_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN
IfxGtm_TIM0_2_TIN33_P33_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN
IfxGtm_TIM0_2_TIN36_P32_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN
IfxGtm_TIM0_2_TIN46_P23_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN
IfxGtm_TIM0_2_TIN55_P21_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN
IfxGtm_TIM0_2_TIN79_P15_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN
IfxGtm_TIM0_3_TIN105_P10_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN
IfxGtm_TIM0_3_TIN108_P10_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN
IfxGtm_TIM0_3_TIN21_P00_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN
IfxGtm_TIM0_3_TIN29_P33_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN
IfxGtm_TIM0_3_TIN38_P32_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN
IfxGtm_TIM0_3_TIN3_P02_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN
IfxGtm_TIM0_3_TIN49_P22_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN
IfxGtm_TIM0_3_TIN51_P21_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN
IfxGtm_TIM0_3_TIN56_P21_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN
IfxGtm_TIM0_3_TIN60_P20_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN
IfxGtm_TIM0_3_TIN80_P14_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN
IfxGtm_TIM0_4_TIN102_P10_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN
IfxGtm_TIM0_4_TIN22_P33_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN
IfxGtm_TIM0_4_TIN30_P33_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN
IfxGtm_TIM0_4_TIN39_P32_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN
IfxGtm_TIM0_4_TIN4_P02_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN
IfxGtm_TIM0_4_TIN50_P22_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN
IfxGtm_TIM0_4_TIN52_P21_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN
IfxGtm_TIM0_4_TIN57_P21_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN
IfxGtm_TIM0_4_TIN61_P20_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN
IfxGtm_TIM0_4_TIN81_P14_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN
IfxGtm_TIM0_5_TIN110_P10_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN
IfxGtm_TIM0_5_TIN23_P33_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN
IfxGtm_TIM0_5_TIN40_P32_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN
IfxGtm_TIM0_5_TIN41_P23_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN
IfxGtm_TIM0_5_TIN58_P21_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN
IfxGtm_TIM0_5_TIN5_P02_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN
IfxGtm_TIM0_5_TIN82_P14_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN
IfxGtm_TIM0_6_TIN106_P10_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN
IfxGtm_TIM0_6_TIN24_P33_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN
IfxGtm_TIM0_6_TIN42_P23_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN
IfxGtm_TIM0_6_TIN43_P23_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN
IfxGtm_TIM0_6_TIN59_P20_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN
IfxGtm_TIM0_6_TIN62_P20_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN
IfxGtm_TIM0_6_TIN83_P14_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN
IfxGtm_TIM0_7_TIN25_P33_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN
IfxGtm_TIM0_7_TIN44_P23_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN
IfxGtm_TIM0_7_TIN45_P23_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN
IfxGtm_TIM0_7_TIN63_P20_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN
IfxGtm_TIM0_7_TIN64_P20_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN
IfxGtm_TIM0_7_TIN7_P02_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN
IfxGtm_TIM0_7_TIN84_P14_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN
IfxGtm_TIM1_0_TIN0_P02_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN
IfxGtm_TIM1_0_TIN109_P10_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN
IfxGtm_TIM1_0_TIN18_P00_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN
IfxGtm_TIM1_0_TIN26_P33_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN
IfxGtm_TIM1_0_TIN32_P33_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN
IfxGtm_TIM1_0_TIN48_P22_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN
IfxGtm_TIM1_0_TIN53_P21_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN
IfxGtm_TIM1_0_TIN68_P20_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN
IfxGtm_TIM1_0_TIN76_P15_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN
IfxGtm_TIM1_0_TIN77_P15_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN
IfxGtm_TIM1_0_TIN85_P14_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN
IfxGtm_TIM1_0_TIN87_P14_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN
IfxGtm_TIM1_0_TIN94_P13_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN
IfxGtm_TIM1_1_TIN103_P10_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN
IfxGtm_TIM1_1_TIN19_P00_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN
IfxGtm_TIM1_1_TIN1_P02_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN
IfxGtm_TIM1_1_TIN27_P33_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN
IfxGtm_TIM1_1_TIN31_P33_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN
IfxGtm_TIM1_1_TIN47_P22_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN
IfxGtm_TIM1_1_TIN54_P21_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN
IfxGtm_TIM1_1_TIN69_P20_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN
IfxGtm_TIM1_1_TIN78_P15_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN
IfxGtm_TIM1_1_TIN86_P14_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN
IfxGtm_TIM1_1_TIN95_P11_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN
IfxGtm_TIM1_2_TIN104_P10_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN
IfxGtm_TIM1_2_TIN107_P10_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN
IfxGtm_TIM1_2_TIN12_P00_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN
IfxGtm_TIM1_2_TIN20_P00_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN
IfxGtm_TIM1_2_TIN28_P33_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN
IfxGtm_TIM1_2_TIN2_P02_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN
IfxGtm_TIM1_2_TIN33_P33_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN
IfxGtm_TIM1_2_TIN46_P23_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN
IfxGtm_TIM1_2_TIN55_P21_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN
IfxGtm_TIM1_2_TIN70_P20_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN
IfxGtm_TIM1_2_TIN79_P15_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN
IfxGtm_TIM1_2_TIN96_P11_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN
IfxGtm_TIM1_3_TIN105_P10_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN
IfxGtm_TIM1_3_TIN108_P10_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN
IfxGtm_TIM1_3_TIN13_P00_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN
IfxGtm_TIM1_3_TIN21_P00_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN
IfxGtm_TIM1_3_TIN29_P33_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN
IfxGtm_TIM1_3_TIN38_P32_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN
IfxGtm_TIM1_3_TIN3_P02_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN
IfxGtm_TIM1_3_TIN49_P22_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN
IfxGtm_TIM1_3_TIN56_P21_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN
IfxGtm_TIM1_3_TIN71_P15_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN
IfxGtm_TIM1_3_TIN80_P14_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN
IfxGtm_TIM1_3_TIN97_P11_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN
IfxGtm_TIM1_4_TIN102_P10_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN
IfxGtm_TIM1_4_TIN14_P00_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN
IfxGtm_TIM1_4_TIN22_P33_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN
IfxGtm_TIM1_4_TIN30_P33_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN
IfxGtm_TIM1_4_TIN39_P32_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN
IfxGtm_TIM1_4_TIN4_P02_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN
IfxGtm_TIM1_4_TIN50_P22_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN
IfxGtm_TIM1_4_TIN57_P21_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN
IfxGtm_TIM1_4_TIN72_P15_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN
IfxGtm_TIM1_4_TIN81_P14_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN
IfxGtm_TIM1_4_TIN98_P11_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN
IfxGtm_TIM1_5_TIN110_P10_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN
IfxGtm_TIM1_5_TIN15_P00_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN
IfxGtm_TIM1_5_TIN40_P32_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN
IfxGtm_TIM1_5_TIN41_P23_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN
IfxGtm_TIM1_5_TIN58_P21_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN
IfxGtm_TIM1_5_TIN5_P02_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN
IfxGtm_TIM1_5_TIN65_P20_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN
IfxGtm_TIM1_5_TIN73_P15_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN
IfxGtm_TIM1_5_TIN82_P14_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN
IfxGtm_TIM1_5_TIN91_P13_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN
IfxGtm_TIM1_5_TIN99_P11_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN
IfxGtm_TIM1_6_TIN100_P11_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN
IfxGtm_TIM1_6_TIN106_P10_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN
IfxGtm_TIM1_6_TIN16_P00_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN
IfxGtm_TIM1_6_TIN24_P33_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN
IfxGtm_TIM1_6_TIN42_P23_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN
IfxGtm_TIM1_6_TIN43_P23_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN
IfxGtm_TIM1_6_TIN59_P20_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN
IfxGtm_TIM1_6_TIN66_P20_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN
IfxGtm_TIM1_6_TIN6_P02_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN
IfxGtm_TIM1_6_TIN74_P15_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN
IfxGtm_TIM1_6_TIN83_P14_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN
IfxGtm_TIM1_6_TIN92_P13_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN
IfxGtm_TIM1_7_TIN101_P11_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN
IfxGtm_TIM1_7_TIN17_P00_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN
IfxGtm_TIM1_7_TIN25_P33_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN
IfxGtm_TIM1_7_TIN44_P23_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN
IfxGtm_TIM1_7_TIN45_P23_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN
IfxGtm_TIM1_7_TIN64_P20_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN
IfxGtm_TIM1_7_TIN67_P20_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN
IfxGtm_TIM1_7_TIN75_P15_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN
IfxGtm_TIM1_7_TIN7_P02_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN
IfxGtm_TIM1_7_TIN84_P14_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN
IfxGtm_TIM1_7_TIN93_P13_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN
IfxGtm_TIM2_0_TIN34_P33_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN
IfxGtm_TIM2_0_TIN68_P20_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN
IfxGtm_TIM2_0_TIN76_P15_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN
IfxGtm_TIM2_0_TIN8_P02_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN
IfxGtm_TIM2_0_TIN94_P13_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN
IfxGtm_TIM2_0_TIN9_P00_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN
IfxGtm_TIM2_1_TIN10_P00_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN
IfxGtm_TIM2_1_TIN11_P00_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN
IfxGtm_TIM2_1_TIN35_P33_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN
IfxGtm_TIM2_1_TIN69_P20_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN
IfxGtm_TIM2_1_TIN95_P11_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN
IfxGtm_TIM2_2_TIN12_P00_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN
IfxGtm_TIM2_2_TIN36_P32_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN
IfxGtm_TIM2_2_TIN70_P20_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN
IfxGtm_TIM2_2_TIN88_P14_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN
IfxGtm_TIM2_2_TIN96_P11_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN
IfxGtm_TIM2_3_TIN13_P00_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN
IfxGtm_TIM2_3_TIN60_P20_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN
IfxGtm_TIM2_3_TIN71_P15_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN
IfxGtm_TIM2_3_TIN89_P14_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN
IfxGtm_TIM2_3_TIN97_P11_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN
IfxGtm_TIM2_4_TIN14_P00_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN
IfxGtm_TIM2_4_TIN51_P21_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN
IfxGtm_TIM2_4_TIN61_P20_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN
IfxGtm_TIM2_4_TIN72_P15_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN
IfxGtm_TIM2_4_TIN90_P14_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN
IfxGtm_TIM2_4_TIN98_P11_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN
IfxGtm_TIM2_5_TIN15_P00_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN
IfxGtm_TIM2_5_TIN52_P21_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN
IfxGtm_TIM2_5_TIN65_P20_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN
IfxGtm_TIM2_5_TIN73_P15_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN
IfxGtm_TIM2_5_TIN91_P13_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN
IfxGtm_TIM2_5_TIN99_P11_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN
IfxGtm_TIM2_6_TIN100_P11_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN
IfxGtm_TIM2_6_TIN16_P00_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN
IfxGtm_TIM2_6_TIN62_P20_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN
IfxGtm_TIM2_6_TIN66_P20_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN
IfxGtm_TIM2_6_TIN74_P15_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN
IfxGtm_TIM2_6_TIN92_P13_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN
IfxGtm_TIM2_7_TIN101_P11_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN
IfxGtm_TIM2_7_TIN17_P00_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN
IfxGtm_TIM2_7_TIN63_P20_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN
IfxGtm_TIM2_7_TIN67_P20_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN
IfxGtm_TIM2_7_TIN75_P15_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN
IfxGtm_TIM2_7_TIN93_P13_2_IN. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT
IfxGtm_TOM0_0_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT
IfxGtm_TOM0_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT
IfxGtm_TOM0_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT
IfxGtm_TOM0_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT
IfxGtm_TOM0_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT
IfxGtm_TOM0_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT
IfxGtm_TOM0_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT
IfxGtm_TOM0_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT
IfxGtm_TOM0_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT
IfxGtm_TOM0_10_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT
IfxGtm_TOM0_10_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT
IfxGtm_TOM0_10_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT
IfxGtm_TOM0_10_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT
IfxGtm_TOM0_10_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT
IfxGtm_TOM0_10_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT
IfxGtm_TOM0_10_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT
IfxGtm_TOM0_11_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT
IfxGtm_TOM0_11_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT
IfxGtm_TOM0_11_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT
IfxGtm_TOM0_11_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT
IfxGtm_TOM0_11_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT
IfxGtm_TOM0_11_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT
IfxGtm_TOM0_11_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT
IfxGtm_TOM0_12_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT
IfxGtm_TOM0_12_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT
IfxGtm_TOM0_12_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT
IfxGtm_TOM0_12_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT
IfxGtm_TOM0_12_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT
IfxGtm_TOM0_12_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT
IfxGtm_TOM0_12_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT
IfxGtm_TOM0_13_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT
IfxGtm_TOM0_13_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT
IfxGtm_TOM0_13_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT
IfxGtm_TOM0_13_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT
IfxGtm_TOM0_13_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT
IfxGtm_TOM0_13_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT
IfxGtm_TOM0_14_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT
IfxGtm_TOM0_14_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT
IfxGtm_TOM0_14_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT
IfxGtm_TOM0_14_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT
IfxGtm_TOM0_14_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT
IfxGtm_TOM0_14_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT
IfxGtm_TOM0_15_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT
IfxGtm_TOM0_15_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT
IfxGtm_TOM0_15_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT
IfxGtm_TOM0_15_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT
IfxGtm_TOM0_15_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT
IfxGtm_TOM0_15_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT
IfxGtm_TOM0_1_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT
IfxGtm_TOM0_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT
IfxGtm_TOM0_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT
IfxGtm_TOM0_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT
IfxGtm_TOM0_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT
IfxGtm_TOM0_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT
IfxGtm_TOM0_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT
IfxGtm_TOM0_2_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT
IfxGtm_TOM0_2_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT
IfxGtm_TOM0_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT
IfxGtm_TOM0_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT
IfxGtm_TOM0_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT
IfxGtm_TOM0_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT
IfxGtm_TOM0_2_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT
IfxGtm_TOM0_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT
IfxGtm_TOM0_3_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT
IfxGtm_TOM0_3_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT
IfxGtm_TOM0_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT
IfxGtm_TOM0_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT
IfxGtm_TOM0_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT
IfxGtm_TOM0_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT
IfxGtm_TOM0_3_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT
IfxGtm_TOM0_3_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT
IfxGtm_TOM0_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT
IfxGtm_TOM0_4_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT
IfxGtm_TOM0_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT
IfxGtm_TOM0_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT
IfxGtm_TOM0_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT
IfxGtm_TOM0_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT
IfxGtm_TOM0_4_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT
IfxGtm_TOM0_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT
IfxGtm_TOM0_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT
IfxGtm_TOM0_5_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT
IfxGtm_TOM0_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT
IfxGtm_TOM0_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT
IfxGtm_TOM0_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT
IfxGtm_TOM0_5_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT
IfxGtm_TOM0_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT
IfxGtm_TOM0_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT
IfxGtm_TOM0_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT
IfxGtm_TOM0_6_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT
IfxGtm_TOM0_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT
IfxGtm_TOM0_6_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT
IfxGtm_TOM0_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT
IfxGtm_TOM0_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT
IfxGtm_TOM0_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT
IfxGtm_TOM0_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT
IfxGtm_TOM0_7_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT
IfxGtm_TOM0_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT
IfxGtm_TOM0_8_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT
IfxGtm_TOM0_8_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT
IfxGtm_TOM0_8_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT
IfxGtm_TOM0_8_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT
IfxGtm_TOM0_8_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT
IfxGtm_TOM0_8_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT
IfxGtm_TOM0_8_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT
IfxGtm_TOM0_8_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT
IfxGtm_TOM0_9_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT
IfxGtm_TOM0_9_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT
IfxGtm_TOM0_9_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT
IfxGtm_TOM0_9_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT
IfxGtm_TOM0_9_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT
IfxGtm_TOM0_9_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT
IfxGtm_TOM1_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT
IfxGtm_TOM1_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT
IfxGtm_TOM1_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT
IfxGtm_TOM1_0_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT
IfxGtm_TOM1_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT
IfxGtm_TOM1_0_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT
IfxGtm_TOM1_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT
IfxGtm_TOM1_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT
IfxGtm_TOM1_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT
IfxGtm_TOM1_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT
IfxGtm_TOM1_0_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT
IfxGtm_TOM1_0_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT
IfxGtm_TOM1_0_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT
IfxGtm_TOM1_10_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT
IfxGtm_TOM1_10_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT
IfxGtm_TOM1_10_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT
IfxGtm_TOM1_10_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT
IfxGtm_TOM1_11_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT
IfxGtm_TOM1_11_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT
IfxGtm_TOM1_11_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT
IfxGtm_TOM1_11_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT
IfxGtm_TOM1_11_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT
IfxGtm_TOM1_12_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT
IfxGtm_TOM1_12_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT
IfxGtm_TOM1_12_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT
IfxGtm_TOM1_12_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT
IfxGtm_TOM1_13_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT
IfxGtm_TOM1_13_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT
IfxGtm_TOM1_13_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT
IfxGtm_TOM1_13_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT
IfxGtm_TOM1_14_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT
IfxGtm_TOM1_14_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT
IfxGtm_TOM1_14_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT
IfxGtm_TOM1_15_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT
IfxGtm_TOM1_15_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT
IfxGtm_TOM1_1_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT
IfxGtm_TOM1_1_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT
IfxGtm_TOM1_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT
IfxGtm_TOM1_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT
IfxGtm_TOM1_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT
IfxGtm_TOM1_1_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT
IfxGtm_TOM1_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT
IfxGtm_TOM1_1_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT
IfxGtm_TOM1_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT
IfxGtm_TOM1_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT
IfxGtm_TOM1_1_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT
IfxGtm_TOM1_2_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT
IfxGtm_TOM1_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT
IfxGtm_TOM1_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT
IfxGtm_TOM1_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT
IfxGtm_TOM1_2_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT
IfxGtm_TOM1_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT
IfxGtm_TOM1_2_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT
IfxGtm_TOM1_2_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT
IfxGtm_TOM1_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT
IfxGtm_TOM1_2_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT
IfxGtm_TOM1_3_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT
IfxGtm_TOM1_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT
IfxGtm_TOM1_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT
IfxGtm_TOM1_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT
IfxGtm_TOM1_3_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT
IfxGtm_TOM1_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT
IfxGtm_TOM1_3_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT
IfxGtm_TOM1_3_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT
IfxGtm_TOM1_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT
IfxGtm_TOM1_3_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT
IfxGtm_TOM1_4_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT
IfxGtm_TOM1_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT
IfxGtm_TOM1_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT
IfxGtm_TOM1_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT
IfxGtm_TOM1_4_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT
IfxGtm_TOM1_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT
IfxGtm_TOM1_4_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT
IfxGtm_TOM1_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT
IfxGtm_TOM1_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT
IfxGtm_TOM1_4_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT
IfxGtm_TOM1_5_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT
IfxGtm_TOM1_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT
IfxGtm_TOM1_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT
IfxGtm_TOM1_5_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT
IfxGtm_TOM1_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT
IfxGtm_TOM1_5_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT
IfxGtm_TOM1_5_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT
IfxGtm_TOM1_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT
IfxGtm_TOM1_5_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT
IfxGtm_TOM1_6_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT
IfxGtm_TOM1_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT
IfxGtm_TOM1_6_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT
IfxGtm_TOM1_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT
IfxGtm_TOM1_6_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT
IfxGtm_TOM1_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT
IfxGtm_TOM1_6_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT
IfxGtm_TOM1_6_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT
IfxGtm_TOM1_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT
IfxGtm_TOM1_7_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT
IfxGtm_TOM1_7_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT
IfxGtm_TOM1_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT
IfxGtm_TOM1_7_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT
IfxGtm_TOM1_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT
IfxGtm_TOM1_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT
IfxGtm_TOM1_7_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT
IfxGtm_TOM1_7_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT
IfxGtm_TOM1_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT
IfxGtm_TOM1_8_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT
IfxGtm_TOM1_8_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT
IfxGtm_TOM1_8_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT
IfxGtm_TOM1_9_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT
IfxGtm_TOM1_9_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT
IfxGtm_TOM1_9_TOUT52_P21_1_OUT. More...

Detailed Description

GTM I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_PinMap.h.


iLLD_TC26B: IfxGtm_Atom_Pwm.h File Reference

  • Gtm
  • Atom
  • Pwm
Data Structures | Functions
IfxGtm_Atom_Pwm.h File Reference
iLLD » GTM

GTM PWM details. More...

#include "_PinMap/IfxGtm_PinMap.h"
#include "Gtm/Std/IfxGtm_Atom.h"
#include "Gtm/Std/IfxGtm_Cmu.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxGtm_Atom_Pwm.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Atom_Pwm_Interrupt
configuration structure for interrupts More...
struct | IfxGtm_Atom_Pwm_pin
configuration structure for output pin More...
struct | IfxGtm_Atom_Pwm_Config
Configuration structure. More...
struct | IfxGtm_Atom_Pwm_Driver
Driver Handle. More...

Functions

IFX_EXTERN boolean | IfxGtm_Atom_Pwm_init (IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
Initialises the Timer object. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_initConfig (IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_start (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Starts the PWM generation from the configured channel. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_stop (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel. More...

Detailed Description

GTM PWM details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom_Pwm.h.


iLLD_TC26B: IfxGtm_Atom_PwmHl.h File Reference

  • Gtm
  • Atom
  • PwmHl
Data Structures | Macros | Typedefs | Functions
IfxGtm_Atom_PwmHl.h File Reference
iLLD » GTM

GTM PWMHL details. More...

#include "StdIf/IfxStdIf_PwmHl.h"
#include "Gtm/Atom/Timer/IfxGtm_Atom_Timer.h"
Include dependency graph for IfxGtm_Atom_PwmHl.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Atom_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxGtm_Atom_PwmHl_Config
GTM ATOM: PWM HL configuration. More...
struct | IfxGtm_Atom_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxGtm_Atom_PwmHl_s
GTM ATOM PWM driver. More...

Macros

#define IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS (8)
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output. More...

Typedefs

typedef struct IfxGtm_Atom_PwmHl_s | IfxGtm_Atom_PwmHl
typedef void(* | IfxGtm_Atom_PwmHl_Update) (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
typedef void(* | IfxGtm_Atom_PwmHl_UpdateShift) (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
typedef void(* | IfxGtm_Atom_PwmHl_UpdatePulse) (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)

Functions

IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_init (IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_initConfig (IfxGtm_Atom_PwmHl_Config *config)
Initialize the configuration structure to default. More...
IFX_EXTERN float32 | IfxGtm_Atom_PwmHl_getDeadtime (IfxGtm_Atom_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxGtm_Atom_PwmHl_getMinPulse (IfxGtm_Atom_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxGtm_Atom_PwmHl_getMode (IfxGtm_Atom_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setDeadtime (IfxGtm_Atom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setMinPulse (IfxGtm_Atom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setMode (IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setOnTime (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setOnTimeAndShift (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setPulse (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setupChannels (IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

GTM PWMHL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom_PwmHl.h.

Macro Definition Documentation

◆ IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS

#define IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS (8)

Maximal number of channels handled by the driver. One channel has a top and bottom pwm output.

Definition at line 106 of file IfxGtm_Atom_PwmHl.h.

Referenced by IfxGtm_Atom_PwmHl_init().

Typedef Documentation

◆ IfxGtm_Atom_PwmHl

typedef struct IfxGtm_Atom_PwmHl_s IfxGtm_Atom_PwmHl

Definition at line 112 of file IfxGtm_Atom_PwmHl.h.

◆ IfxGtm_Atom_PwmHl_Update

typedef void(* IfxGtm_Atom_PwmHl_Update) (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)

Definition at line 114 of file IfxGtm_Atom_PwmHl.h.

◆ IfxGtm_Atom_PwmHl_UpdatePulse

typedef void(* IfxGtm_Atom_PwmHl_UpdatePulse) (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)

Definition at line 118 of file IfxGtm_Atom_PwmHl.h.

◆ IfxGtm_Atom_PwmHl_UpdateShift

typedef void(* IfxGtm_Atom_PwmHl_UpdateShift) (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)

Definition at line 116 of file IfxGtm_Atom_PwmHl.h.


iLLD_TC26B: IfxGtm_Atom_Timer.h File Reference

  • Gtm
  • Atom
  • Timer
Data Structures | Functions
IfxGtm_Atom_Timer.h File Reference
iLLD » GTM

GTM TIMER details. More...

#include "_PinMap/IfxGtm_PinMap.h"
#include "Gtm/Std/IfxGtm_Atom.h"
#include "Gtm/Std/IfxGtm_Cmu.h"
#include "StdIf/IfxStdIf_Timer.h"
Include dependency graph for IfxGtm_Atom_Timer.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Atom_Timer_Base
Structure for the timer base. More...
struct | IfxGtm_Atom_Timer
TOM Timer interface. More...
struct | IfxGtm_Atom_Timer_Config
Configuration structure for TOM Timer. More...

Functions

IFX_EXTERN boolean | IfxGtm_Atom_Timer_acknowledgeTimerIrq (IfxGtm_Atom_Timer *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_acknowledgeTriggerIrq (IfxGtm_Atom_Timer *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_addToChannelMask (IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_applyUpdate (IfxGtm_Atom_Timer *driver)
Enables the transfer of the shadow registers. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_disableUpdate (IfxGtm_Atom_Timer *driver)
Disables the upadte. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getFrequency (IfxGtm_Atom_Timer *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getInputFrequency (IfxGtm_Atom_Timer *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getPeriod (IfxGtm_Atom_Timer *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getResolution (IfxGtm_Atom_Timer *driver)
Returns the resolution. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getTrigger (IfxGtm_Atom_Timer *driver)
Returns the trigger point. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_run (IfxGtm_Atom_Timer *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_setFrequency (IfxGtm_Atom_Timer *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_setPeriod (IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_setSingleMode (IfxGtm_Atom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_setTrigger (IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_stop (IfxGtm_Atom_Timer *driver)
Stops the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_updateInputFrequency (IfxGtm_Atom_Timer *driver)
Updates the input frequency. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getOffset (IfxGtm_Atom_Timer *driver)
Returns the initial timer offset in ticks. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Timer_getPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Timer_getTriggerPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to trigger channel. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_init (IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_initConfig (IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...

Detailed Description

GTM TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom_Timer.h.


iLLD_TC26B: IfxGtm.h File Reference

  • Gtm
  • Std
Enumerations | Functions
IfxGtm.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
Include dependency graph for IfxGtm.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_IrqMode {
IfxGtm_IrqMode_level = 0,
IfxGtm_IrqMode_pulse = 1,
IfxGtm_IrqMode_pulseNotify = 2,
IfxGtm_IrqMode_singlePulse = 3
}
Enum for GTM interrupt modes. More...
enum IfxGtm_SuspendMode {
IfxGtm_SuspendMode_none = 0,
IfxGtm_SuspendMode_hard = 1,
IfxGtm_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Functions

IFX_INLINE boolean | IfxGtm_isEnabled (Ifx_GTM *gtm)
Returs the status of module enabled or disabled. More...
IFX_INLINE boolean | IfxGtm_isModuleSuspended (Ifx_GTM *gtm)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxGtm_setSuspendMode (Ifx_GTM *gtm, IfxGtm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxGtm_disable (Ifx_GTM *gtm)
Disables the module. More...
IFX_EXTERN void | IfxGtm_enable (Ifx_GTM *gtm)
Enables the module. More...
IFX_EXTERN float32 | IfxGtm_getSysClkFrequency (void)
returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm.h.

Function Documentation

◆ IfxGtm_getSysClkFrequency()

IFX_EXTERN float32 IfxGtm_getSysClkFrequency ( void )

returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK.

Returns
sysFreq

Definition at line 74 of file IfxGtm.c.

Referenced by IfxGtm_Cmu_getModuleFrequency().


iLLD_TC26B: IfxGtm_Atom.h File Reference

  • Gtm
  • Std
Enumerations | Functions
IfxGtm_Atom.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
#include "IfxGtm.h"
#include "IfxGtm_Tbu.h"
#include "Src/Std/IfxSrc.h"
#include "IfxGtm_Cmu.h"
#include "stddef.h"
Include dependency graph for IfxGtm_Atom.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_Atom_Ch_OutputTrigger {
IfxGtm_Atom_Ch_OutputTrigger_forward = 0,
IfxGtm_Atom_Ch_OutputTrigger_generate = 1
}
Reset source for channel counter CN0. More...
enum IfxGtm_Atom_Ch_ResetEvent {
IfxGtm_Atom_Ch_ResetEvent_onCm0 = 0,
IfxGtm_Atom_Ch_ResetEvent_onTrigger = 1
}
Reset event for channel counter CN0. More...
enum IfxGtm_Atom_Mode {
IfxGtm_Atom_Mode_outputImmediate,
IfxGtm_Atom_Mode_outputCompare,
IfxGtm_Atom_Mode_outputPwm,
IfxGtm_Atom_Mode_outputSerial
}
Enum for ATOM mode. More...
enum IfxGtm_Atom_AruInput {
IfxGtm_Atom_AruInput_disabled = 0,
IfxGtm_Atom_AruInput_enabled = 1
}
Enable/disable of Aru Input to ATOM channel. More...
enum IfxGtm_Atom_SomcControl {
IfxGtm_Atom_SomcControl_compareBoth = 0,
IfxGtm_Atom_SomcControl_compareBoth1 = 1,
IfxGtm_Atom_SomcControl_ccu0Ts0 = 2,
IfxGtm_Atom_SomcControl_ccu1Ts12 = 3,
IfxGtm_Atom_SomcControl_ccu0ccu1Ts0 = 4,
IfxGtm_Atom_SomcControl_ccu0ccu1Ts12 = 5,
IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12 = 6,
IfxGtm_Atom_SomcControl_cancelCompare = 7
}
Match Compare control modes. More...
enum IfxGtm_Atom_SomcSignalLevelControl {
IfxGtm_Atom_SomcSignalLevelControl_noChange = 0,
IfxGtm_Atom_SomcSignalLevelControl_sl0out1 = 1,
IfxGtm_Atom_SomcSignalLevelControl_sl0out0 = 2,
IfxGtm_Atom_SomcSignalLevelControl_toggle = 3
}
SOMC signal level Control. More...

Functions

IFX_INLINE Ifx_GTM_ATOM_CH * | IfxGtm_Atom_Ch_getChannelPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the base addredd of selected Atom channel. More...
IFX_INLINE void | IfxGtm_Atom_Ch_setCompareShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_clearOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_clearZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_configurePwmMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
IFX_EXTERN float32 | IfxGtm_Atom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Atom_Ch_getClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getCompareOnePointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getCompareZeroPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero pointer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_getOutputLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Gets the ATOM output level. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxGtm_Atom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getTimerPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_isOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_isZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_raiseInterruptOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 1. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_raiseInterruptZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 0. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
Sets the channel clock source. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompare (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareOneShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareZeroShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setOneShotMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setResetSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setSignalLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setTriggerOutput (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Get the counter value. More...
IFX_INLINE void | IfxGtm_Atom_Agc_setChannelsUpdate (Ifx_GTM_ATOM_AGC *agc, uint32 value)
Sets the channels for update (UPEN) More...
IFX_EXTERN uint32 | IfxGtm_Atom_Agc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Agc_buildFeatureForChannel (IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannel (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelOutput (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannels (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsOutput (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsTrigger (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableTimeTrigger (Ifx_GTM_ATOM_AGC *agc, boolean enabled)
Enable/disable the time base trigger. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_resetChannels (Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
Reset one or more channels. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setChannelForceUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setChannelsForceUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setTimeTrigger (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_trigger (Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setAruInput (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
enable/disable ARU input for the ATOM channel specified. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setSomcControl (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control)
sets the SOMC control bits for the specified ATOM channel More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setSomcSignalLevelControl (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl)
sets the SL control for SOMC mode. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setAruReadAddress0 (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 0 More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setAruReadAddress1 (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 1 More...
IFX_EXTERN uint32 | IfxGtm_Atom_getShadowZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow zero value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_getShadowZeroPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow zero pointer. More...
IFX_EXTERN uint32 | IfxGtm_Atom_getShadowOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow one value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_getShadowOnePointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow One pointer. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom.h.

Enumeration Type Documentation

◆ IfxGtm_Atom_AruInput

enum IfxGtm_Atom_AruInput

Enable/disable of Aru Input to ATOM channel.

Enumerator
IfxGtm_Atom_AruInput_disabled | ARU input disabled.
IfxGtm_Atom_AruInput_enabled | ARU input enabled.

Definition at line 103 of file IfxGtm_Atom.h.

◆ IfxGtm_Atom_SomcControl

enum IfxGtm_Atom_SomcControl

Match Compare control modes.

Enumerator
IfxGtm_Atom_SomcControl_compareBoth | compare CCU0 and CCU1 in parallel
IfxGtm_Atom_SomcControl_compareBoth1 | compare CCU0 and CCU1 in parallel
IfxGtm_Atom_SomcControl_ccu0Ts0 | compare CCU0 against TS0
IfxGtm_Atom_SomcControl_ccu1Ts12 | compare only CCU1 against TS1 or TS2
IfxGtm_Atom_SomcControl_ccu0ccu1Ts0 | compare CCU0 then CCU1, use TS0
IfxGtm_Atom_SomcControl_ccu0ccu1Ts12 | compare CCU0 then CCU1. Use TS1 or TS2
IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12 | compare CCU0 with TS0 then CCU1 with TS1 or TS2
IfxGtm_Atom_SomcControl_cancelCompare | Cancel pending compare events.

Definition at line 111 of file IfxGtm_Atom.h.

◆ IfxGtm_Atom_SomcSignalLevelControl

enum IfxGtm_Atom_SomcSignalLevelControl

SOMC signal level Control.

Enumerator
IfxGtm_Atom_SomcSignalLevelControl_noChange | no signal level change at output
IfxGtm_Atom_SomcSignalLevelControl_sl0out1 | SL= 0 -> Out=1; SL=1->Out=0.
IfxGtm_Atom_SomcSignalLevelControl_sl0out0 | SL=0->Out=0; SL=1->Out=1.
IfxGtm_Atom_SomcSignalLevelControl_toggle | toggle the output signal level

Definition at line 125 of file IfxGtm_Atom.h.

Function Documentation

◆ IfxGtm_Atom_Ch_setAruInput()

IFX_EXTERN void IfxGtm_Atom_Ch_setAruInput | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

enable/disable ARU input for the ATOM channel specified.

Parameters
atom | pointer to the ATOM instance
channel | index of ATOM channel
enabled | ARU enable status
Returns
None

Definition at line 521 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setAruReadAddress0()

IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress0 | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | address
 | ) |  |

set the ARU read address 0

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
address | ARU read address 0
Returns
None

Definition at line 553 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setAruReadAddress1()

IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress1 | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | address
 | ) |  |

set the ARU read address 1

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
address | ARU read address 1
Returns
None

Definition at line 560 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setSomcControl()

IFX_EXTERN void IfxGtm_Atom_Ch_setSomcControl | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_SomcControl | control
 | ) |  |

sets the SOMC control bits for the specified ATOM channel

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
control | SOMC control mode enum
Returns
None

Definition at line 537 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setSomcSignalLevelControl()

IFX_EXTERN void IfxGtm_Atom_Ch_setSomcSignalLevelControl | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_SomcSignalLevelControl | ctrl
 | ) |  |

sets the SL control for SOMC mode.

Parameters
atom | pointer to the ATOM instance
channel | index of ATOM channel
ctrl | SIgnal level control
Returns
None

Definition at line 545 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_getShadowOne()

IFX_EXTERN uint32 IfxGtm_Atom_getShadowOne | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the shadow one value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
shadow one value

Definition at line 583 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_getShadowOnePointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_getShadowOnePointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the shadow One pointer.

Parameters
atom | Pointer to the ATOM object
channel | channel index
Returns
shadow One pointer

Definition at line 591 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_getShadowZero()

IFX_EXTERN uint32 IfxGtm_Atom_getShadowZero | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the shadow zero value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
shadow zero value

Definition at line 567 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_getShadowZeroPointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_getShadowZeroPointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the shadow zero pointer.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
shadow zero value

Definition at line 575 of file IfxGtm_Atom.c.


iLLD_TC26B: IfxGtm_Cmu.h File Reference

  • Gtm
  • Std
Enumerations | Functions
IfxGtm_Cmu.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
Include dependency graph for IfxGtm_Cmu.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_Cmu_Clk {
IfxGtm_Cmu_Clk_0 = 0,
IfxGtm_Cmu_Clk_1,
IfxGtm_Cmu_Clk_2,
IfxGtm_Cmu_Clk_3,
IfxGtm_Cmu_Clk_4,
IfxGtm_Cmu_Clk_5,
IfxGtm_Cmu_Clk_6,
IfxGtm_Cmu_Clk_7
}
enum IfxGtm_Cmu_Eclk {
IfxGtm_Cmu_Eclk_0 = 0,
IfxGtm_Cmu_Eclk_1,
IfxGtm_Cmu_Eclk_2
}
enum IfxGtm_Cmu_Fxclk {
IfxGtm_Cmu_Fxclk_0 = 0,
IfxGtm_Cmu_Fxclk_1,
IfxGtm_Cmu_Fxclk_2,
IfxGtm_Cmu_Fxclk_3,
IfxGtm_Cmu_Fxclk_4
}
enum IfxGtm_Cmu_Tim_Filter_Clk {
IfxGtm_Cmu_Tim_Filter_Clk_0,
IfxGtm_Cmu_Tim_Filter_Clk_1,
IfxGtm_Cmu_Tim_Filter_Clk_6,
IfxGtm_Cmu_Tim_Filter_Clk_7
}
Tim Filter counter frequency select. More...

Functions

IFX_EXTERN void | IfxGtm_Cmu_enableClocks (Ifx_GTM *gtm, uint32 clkMask)
Enable / Disable the configurable, fixed, and external clocks. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
Returns the GTM external clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getFxClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getGclkFrequency (Ifx_GTM *gtm)
Returns the GTM global clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getModuleFrequency (Ifx_GTM *gtm)
returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency: IfxGtm_getSysClkFrequency() is to be used. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isClkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
Returns the configurable clock enable status. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isEclkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
Returns the external clock enable status. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isFxClockEnabled (Ifx_GTM *gtm)
Returns the fixed clock enable status. More...
IFX_EXTERN void | IfxGtm_Cmu_selectClkInput (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the corresponding clock is disabled using IfxGtm_Cmu_enableClocks() More...
IFX_EXTERN void | IfxGtm_Cmu_setClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
Set the GTM configurable clock frequency in Hz. More...
IFX_EXTERN void | IfxGtm_Cmu_setEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
Set the GTM external clock frequency in Hz. More...
IFX_EXTERN void | IfxGtm_Cmu_setGclkFrequency (Ifx_GTM *gtm, float32 frequency)
Set the GTM global clock frequency in Hz. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Cmu.h.


iLLD_TC26B: IfxGtm_Dpll.h File Reference

  • Gtm
  • Std
Functions
IfxGtm_Dpll.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
Include dependency graph for IfxGtm_Dpll.h:

Go to the source code of this file.

Functions

IFX_EXTERN float32 IfxGtm_Dpll_getSubIncFrequency (Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Dpll.h.


iLLD_TC26B: IfxGtm_Tbu.h File Reference

  • Gtm
  • Std
Enumerations | Functions
IfxGtm_Tbu.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
Include dependency graph for IfxGtm_Tbu.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_Tbu_Ts {
IfxGtm_Tbu_Ts_0,
IfxGtm_Tbu_Ts_1,
IfxGtm_Tbu_Ts_2
}
GTM TOM TBU Time stamps. More...

Functions

IFX_INLINE void | IfxGtm_Tbu_enableChannel (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Enables the channel. More...
IFX_INLINE boolean | IfxGtm_Tbu_isChannelEnabled (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Function to check if a TBU channel is enabled. Returns TRUE if the corresponding channel is enabled Returns FALSE if the corresponding channel is disabled. More...
IFX_EXTERN float32 | IfxGtm_Tbu_getClockFrequency (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Returns the clock frequency. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tbu.h.


iLLD_TC26B: IfxGtm_Tim.h File Reference

  • Gtm
  • Std
Enumerations | Functions
IfxGtm_Tim.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
#include "Src/Std/IfxSrc.h"
#include "IfxGtm.h"
#include "IfxGtm_Cmu.h"
#include "IfxGtm_bf.h"
Include dependency graph for IfxGtm_Tim.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_Tim_CntsSel {
IfxGtm_Tim_CntsSel_cntReg = 0,
IfxGtm_Tim_CntsSel_tbuTs0
}
enum IfxGtm_Tim_FilterCounter {
IfxGtm_Tim_FilterCounter_upDown = 0,
IfxGtm_Tim_FilterCounter_hold
}
Enum for Filter counter. More...
enum IfxGtm_Tim_FilterMode {
IfxGtm_Tim_FilterMode_immediateEdgePropagation = 0,
IfxGtm_Tim_FilterMode_individualDeglitchTime
}
Enum for Filter mode. More...
enum IfxGtm_Tim_GprSel {
IfxGtm_Tim_GprSel_tbuTs0 = 0,
IfxGtm_Tim_GprSel_tbuTs1,
IfxGtm_Tim_GprSel_tbuTs2,
IfxGtm_Tim_GprSel_cnts
}
enum IfxGtm_Tim_Input {
IfxGtm_Tim_Input_currentChannel = 0,
IfxGtm_Tim_Input_adjacentChannel
}
enum IfxGtm_Tim_Mode {
IfxGtm_Tim_Mode_pwmMeasurement = 0,
IfxGtm_Tim_Mode_pulseIntegration,
IfxGtm_Tim_Mode_inputEvent,
IfxGtm_Tim_Mode_inputPrescaler,
IfxGtm_Tim_Mode_bitCompression
}
enum IfxGtm_Tim_Timeout {
IfxGtm_Tim_Timeout_disabled,
IfxGtm_Tim_Timeout_risingEdge,
IfxGtm_Tim_Timeout_fallingEdge,
IfxGtm_Tim_Timeout_bothEdge
}
Enum for Timeout control. More...

Functions

IFX_INLINE void | IfxGtm_Tim_Ch_clearCntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Clears the counter overflow flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearDataLostEvent (Ifx_GTM_TIM_CH *channel)
Clears the data lost flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearEcntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Clears the event counter overflow flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearGlitchEvent (Ifx_GTM_TIM_CH *channel)
Clears the glitch flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearNewValueEvent (Ifx_GTM_TIM_CH *channel)
Clears the new value flag. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGtm_Tim_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel)
Returns a pointer to the TIM channel SRC. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isCntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Test the counter overflow flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isDataLostEvent (Ifx_GTM_TIM_CH *channel)
Test the data lost flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isEcntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Test the event counter overflow flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isGlitchEvent (Ifx_GTM_TIM_CH *channel)
Test the glitch flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isNewValueEvent (Ifx_GTM_TIM_CH *channel)
Test the new value flag. More...
IFX_INLINE Ifx_GTM_TIM_CH * | IfxGtm_Tim_getChannel (Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Returns the pointer to the TIM channel. More...
IFX_INLINE void | IfxGtm_Tim_Ch_resetChannel (Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Reset the specified TIM channel. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getCaptureClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getCaptureClockSource (Ifx_GTM_TIM_CH *channel)
Returns the capture clock source selected. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getFilterClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Tim_Filter_Clk | IfxGtm_Tim_Ch_getFilterClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Filter clock source selected. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getTimeoutClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getTimeoutClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Timeout clock source selected. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setChannelNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setClockSource (Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setFilterNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setNotificationMode (Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setTimeoutNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tim.h.


iLLD_TC26B: IfxGtm_Tom.h File Reference

  • Gtm
  • Std
Macros | Enumerations | Functions
IfxGtm_Tom.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
#include "IfxGtm.h"
#include "IfxGtm_Tbu.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxGtm_Tom.h:

Go to the source code of this file.

Macros

#define IFXGTM_TOM_NUM_TGC_CHANNELS (8)
Number of channels per TOM TGC. More...

Enumerations

enum IfxGtm_Tom_Ch_ClkSrc {
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 = 0,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 = 1,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 = 2,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 = 3,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 = 4,
IfxGtm_Tom_Ch_ClkSrc_noClock = 5
}
Clock source for the TOM channels. More...
enum IfxGtm_Tom_Ch_OutputTrigger {
IfxGtm_Tom_Ch_OutputTrigger_forward = 0,
IfxGtm_Tom_Ch_OutputTrigger_generate = 1
}
Reset source for channel counter CN0. More...
enum IfxGtm_Tom_Ch_ResetEvent {
IfxGtm_Tom_Ch_ResetEvent_onCm0 = 0,
IfxGtm_Tom_Ch_ResetEvent_onTrigger = 1
}
Reset event for channel counter CN0. More...

Functions

IFX_INLINE Ifx_GTM_TOM_CH * | IfxGtm_Tom_Ch_getChannelPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the base addredd of selected Tom channel. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_clearOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_clearZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification. More...
IFX_EXTERN float32 | IfxGtm_Tom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz. More...
IFX_EXTERN IfxGtm_Tom_Ch_ClkSrc | IfxGtm_Tom_Ch_getClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Ch_getCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getCompareOnePointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Ch_getCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getCompareZeroPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero pointer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_getOutputLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Gets the TOM output level. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxGtm_Tom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC. More...
IFX_EXTERN Ifx_GTM_TOM_TGC * | IfxGtm_Tom_Ch_getTgcPointer (Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getTimerPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_isOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_isZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_raiseInterruptOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 1. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_raiseInterruptZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 0. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompare (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareOneShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareZeroShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCounterValue (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setGatedCounter (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the gated counter mode (channel 0 to 7 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setOneShotMode (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setPcm (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the PCM mode (channel 15 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setResetSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setSignalLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setSpe (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the SPE mode (channel 0 to 7 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setTriggerOutput (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...
IFX_INLINE void | IfxGtm_Tom_Tgc_writeGlobalControl (Ifx_GTM_TOM_TGC *tgc, uint32 control)
Sets the tgc global control value. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Tgc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Tgc_buildFeatureForChannel (IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannel (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelOutput (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannels (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsOutput (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsTrigger (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableTimeTrigger (Ifx_GTM_TOM_TGC *tgc, boolean enabled)
Enable/disable the time base trigger. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_resetChannels (Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
Reset one or more channels. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setChannelForceUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setChannelsForceUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setTimeTrigger (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_trigger (Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom.h.

Macro Definition Documentation

◆ IFXGTM_TOM_NUM_TGC_CHANNELS

#define IFXGTM_TOM_NUM_TGC_CHANNELS (8)

Number of channels per TOM TGC.

Definition at line 71 of file IfxGtm_Tom.h.

Referenced by IfxGtm_Tom_Tgc_buildFeature(), and IfxGtm_Tom_Tgc_resetChannels().


iLLD_TC26B: IfxGtm_Tim_In.h File Reference

  • Gtm
  • Tim
  • In
Data Structures | Enumerations | Functions
IfxGtm_Tim_In.h File Reference
iLLD » GTM

GTM IN details. More...

#include "_PinMap/IfxGtm_PinMap.h"
#include "Gtm/Std/IfxGtm_Tim.h"
#include "Gtm/Std/IfxGtm_Cmu.h"
#include "Cpu/Std/IfxCpu.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxGtm_Tim_In.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tim_In_ConfigCapture
Configuration structure for TIM capture. More...
struct | IfxGtm_Tim_In_ConfigFilter
Configuration structure for TIM filter. More...
struct | IfxGtm_Tim_In_ConfigTimeout
Configuration structure for TIM timeout. More...
struct | IfxGtm_Tim_In
Driver Handle. More...
struct | IfxGtm_Tim_In_Config
Configuration structure for TIM input capture. More...

Enumerations

enum IfxGtm_Tim_In_ConfigFilterMode {
IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation,
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown,
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold,
IfxGtm_Tim_In_ConfigFilterMode_none
}
Config Filter Mode. More...
enum IfxGtm_Tim_In_Input {
IfxGtm_Tim_In_Input_currentChannel,
IfxGtm_Tim_In_Input_adjacentChannel,
IfxGtm_Tim_In_Input_aux
}
Input Source. More...

Functions

IFX_INLINE void | IfxGtm_Tim_In_clearNewData (IfxGtm_Tim_In *driver)
Clear the new data flag. More...
IFX_INLINE float32 | IfxGtm_Tim_In_getDutyPercent (IfxGtm_Tim_In *driver, boolean *dataCoherent)
return the dutycycle in percent More...
IFX_INLINE float32 | IfxGtm_Tim_In_getPeriodSecond (IfxGtm_Tim_In *driver)
Return the period in second. More...
IFX_INLINE sint32 | IfxGtm_Tim_In_getPeriodTicks (IfxGtm_Tim_In *driver)
Return the period value in tick. More...
IFX_INLINE sint32 | IfxGtm_Tim_In_getPulseLengthTick (IfxGtm_Tim_In *driver)
Return the pulse length value in tick. More...
IFX_INLINE boolean | IfxGtm_Tim_In_isDataLost (IfxGtm_Tim_In *driver)
Indicates if data were lost. More...
IFX_INLINE boolean | IfxGtm_Tim_In_isNewData (IfxGtm_Tim_In *driver)
Indicates if new data are present (new data flag) More...
IFX_EXTERN boolean | IfxGtm_Tim_In_init (IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
Initializes the input capture object. More...
IFX_EXTERN void | IfxGtm_Tim_In_initConfig (IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN void | IfxGtm_Tim_In_onIsr (IfxGtm_Tim_In *driver)
will update the driver state
To be called in the interrupt generated by the IfxGtm_Tim_In driver More...
IFX_EXTERN void | IfxGtm_Tim_In_update (IfxGtm_Tim_In *driver)
Updates the period and duty cycle. More...

Detailed Description

GTM IN details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tim_In.h.


iLLD_TC26B: IfxGtm_Tom_Pwm.h File Reference

  • Gtm
  • Tom
  • Pwm
Data Structures | Functions
IfxGtm_Tom_Pwm.h File Reference
iLLD » GTM

GTM PWM details. More...

#include "_PinMap/IfxGtm_PinMap.h"
#include "Gtm/Std/IfxGtm_Tom.h"
#include "Gtm/Std/IfxGtm_Cmu.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxGtm_Tom_Pwm.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tom_Pwm_Interrupt
configuration structure for interrupts More...
struct | IfxGtm_Tom_Pwm_pin
configuration structure for output pin More...
struct | IfxGtm_Tom_Pwm_Config
Configuration structure. More...
struct | IfxGtm_Tom_Pwm_Driver
Driver Handle. More...

Functions

IFX_EXTERN boolean | IfxGtm_Tom_Pwm_init (IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
Initialises the Timer object. More...
IFX_EXTERN void | IfxGtm_Tom_Pwm_initConfig (IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN void | IfxGtm_Tom_Pwm_start (IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
starts the PWM generation from the configured channel More...
IFX_EXTERN void | IfxGtm_Tom_Pwm_stop (IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel. More...

Detailed Description

GTM PWM details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom_Pwm.h.

Data Structure Documentation

◆ IfxGtm_Tom_Pwm_pin

struct IfxGtm_Tom_Pwm_pin

configuration structure for output pin

Definition at line 149 of file IfxGtm_Tom_Pwm.h.

Collaboration diagram for IfxGtm_Tom_Pwm_pin:
[legend]
Data Fields
IfxPort_OutputMode | outputMode | Output mode.
IfxGtm_Tom_ToutMap * | outputPin | output pin
IfxPort_PadDriver | padDriver | Pad driver.

Function Documentation

◆ IfxGtm_Tom_Pwm_start()

IFX_EXTERN void IfxGtm_Tom_Pwm_start | ( | IfxGtm_Tom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

starts the PWM generation from the configured channel

Parameters
driver | handle for the PWM device
immediate | immediate start or not
Returns
None

Definition at line 149 of file IfxGtm_Tom_Pwm.c.

◆ IfxGtm_Tom_Pwm_stop()

IFX_EXTERN void IfxGtm_Tom_Pwm_stop | ( | IfxGtm_Tom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

Stops the PWM generation from the configured channel.

Parameters
driver | handle for the PWM device
immediate | immediate start or not.
Returns
None

Definition at line 160 of file IfxGtm_Tom_Pwm.c.


iLLD_TC26B: IfxGtm_Tom_PwmHl.h File Reference

  • Gtm
  • Tom
  • PwmHl
Data Structures | Macros | Typedefs | Functions
IfxGtm_Tom_PwmHl.h File Reference
iLLD » GTM

GTM PWMHL details. More...

#include "StdIf/IfxStdIf_PwmHl.h"
#include "Gtm/Tom/Timer/IfxGtm_Tom_Timer.h"
Include dependency graph for IfxGtm_Tom_PwmHl.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tom_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxGtm_Tom_PwmHl_Config
GTM TOM: PWM HL configuration. More...
struct | IfxGtm_Tom_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxGtm_Tom_PwmHl_s
GTM TOM PWM driver. More...

Macros

#define IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS (3)
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output Limited to 3 because the PWM channels used must be owned by the same TGC. More...

Typedefs

typedef struct IfxGtm_Tom_PwmHl_s | IfxGtm_Tom_PwmHl
typedef void(* | IfxGtm_Tom_PwmHl_Update) (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
typedef void(* | IfxGtm_Tom_PwmHl_UpdateShift) (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
typedef void(* | IfxGtm_Tom_PwmHl_UpdatePulse) (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)

Functions

IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_init (IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. Note: all PWM channels must use the same TGC Note: the current implementation must use the same TGC for the timer and PWM channels. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_initConfig (IfxGtm_Tom_PwmHl_Config *config)
Initialize the configuration structure to default. More...
IFX_EXTERN float32 | IfxGtm_Tom_PwmHl_getDeadtime (IfxGtm_Tom_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxGtm_Tom_PwmHl_getMinPulse (IfxGtm_Tom_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxGtm_Tom_PwmHl_getMode (IfxGtm_Tom_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setDeadtime (IfxGtm_Tom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setMinPulse (IfxGtm_Tom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setMode (IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setOnTime (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setOnTimeAndShift (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setPulse (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setupChannels (IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

GTM PWMHL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom_PwmHl.h.

Macro Definition Documentation

◆ IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS

#define IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS (3)

Maximal number of channels handled by the driver. One channel has a top and bottom pwm output Limited to 3 because the PWM channels used must be owned by the same TGC.

Definition at line 146 of file IfxGtm_Tom_PwmHl.h.

Referenced by IfxGtm_Tom_PwmHl_init().

Typedef Documentation

◆ IfxGtm_Tom_PwmHl

typedef struct IfxGtm_Tom_PwmHl_s IfxGtm_Tom_PwmHl

Definition at line 152 of file IfxGtm_Tom_PwmHl.h.

◆ IfxGtm_Tom_PwmHl_Update

typedef void(* IfxGtm_Tom_PwmHl_Update) (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)

Definition at line 154 of file IfxGtm_Tom_PwmHl.h.

◆ IfxGtm_Tom_PwmHl_UpdatePulse

typedef void(* IfxGtm_Tom_PwmHl_UpdatePulse) (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)

Definition at line 158 of file IfxGtm_Tom_PwmHl.h.

◆ IfxGtm_Tom_PwmHl_UpdateShift

typedef void(* IfxGtm_Tom_PwmHl_UpdateShift) (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)

Definition at line 156 of file IfxGtm_Tom_PwmHl.h.


iLLD_TC26B: IfxGtm_Tom_Timer.h File Reference

  • Gtm
  • Tom
  • Timer
Data Structures | Functions
IfxGtm_Tom_Timer.h File Reference
iLLD » GTM

GTM TIMER details. More...

#include "_PinMap/IfxGtm_PinMap.h"
#include "Gtm/Std/IfxGtm_Tom.h"
#include "Gtm/Std/IfxGtm_Cmu.h"
#include "StdIf/IfxStdIf_Timer.h"
Include dependency graph for IfxGtm_Tom_Timer.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tom_Timer_Base
Structure for the timer base. More...
struct | IfxGtm_Tom_Timer
TOM Timer interface Handle. More...
struct | IfxGtm_Tom_Timer_Config
Configuration structure for TOM Timer. More...

Functions

IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getOffset (IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Timer_getPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Timer_getTriggerPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to trigger channel. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_init (IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_initConfig (IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_acknowledgeTimerIrq (IfxGtm_Tom_Timer *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_acknowledgeTriggerIrq (IfxGtm_Tom_Timer *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_addToChannelMask (IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_applyUpdate (IfxGtm_Tom_Timer *driver)
Enables the transfer of the shadow registers. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_disableUpdate (IfxGtm_Tom_Timer *driver)
Disables the upadte. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getFrequency (IfxGtm_Tom_Timer *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getInputFrequency (IfxGtm_Tom_Timer *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getPeriod (IfxGtm_Tom_Timer *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getResolution (IfxGtm_Tom_Timer *driver)
Returns the resolution. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getTrigger (IfxGtm_Tom_Timer *driver)
Returns the trigger point. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_run (IfxGtm_Tom_Timer *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_setFrequency (IfxGtm_Tom_Timer *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_setPeriod (IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_setSingleMode (IfxGtm_Tom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_setTrigger (IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_stop (IfxGtm_Tom_Timer *driver)
Stops the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_updateInputFrequency (IfxGtm_Tom_Timer *driver)
Updates the input frequency. More...

Detailed Description

GTM TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom_Timer.h.


iLLD_TC26B: IfxGtm_Trig.h File Reference

  • Gtm
  • Trig
Enumerations | Functions
IfxGtm_Trig.h File Reference
iLLD » GTM

GTM TRIG details. More...

#include "Cpu/Std/Ifx_Types.h"
#include "_Impl/IfxGtm_cfg.h"
#include "Gtm/Std/IfxGtm_Tim.h"
Include dependency graph for IfxGtm_Trig.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_Trig_AdcGroup {
IfxGtm_Trig_AdcGroup_0,
IfxGtm_Trig_AdcGroup_1,
IfxGtm_Trig_AdcGroup_2,
IfxGtm_Trig_AdcGroup_3,
IfxGtm_Trig_AdcGroup_4
}
Enum for ADC group. More...
enum IfxGtm_Trig_AdcTrig {
IfxGtm_Trig_AdcTrig_0,
IfxGtm_Trig_AdcTrig_1,
IfxGtm_Trig_AdcTrig_count
}
Enum for ADC trigger. More...
enum IfxGtm_Trig_AdcTrigChannel {
IfxGtm_Trig_AdcTrigChannel_4,
IfxGtm_Trig_AdcTrigChannel_5,
IfxGtm_Trig_AdcTrigChannel_6,
IfxGtm_Trig_AdcTrigChannel_7,
IfxGtm_Trig_AdcTrigChannel_13,
IfxGtm_Trig_AdcTrigChannel_14,
IfxGtm_Trig_AdcTrigChannel_15,
IfxGtm_Trig_AdcTrigChannel_count
}
Enum for ADC trigger channel. More...
enum IfxGtm_Trig_AdcTrigSource {
IfxGtm_Trig_AdcTrigSource_atom0,
IfxGtm_Trig_AdcTrigSource_atom1,
IfxGtm_Trig_AdcTrigSource_atom2,
IfxGtm_Trig_AdcTrigSource_atom3,
IfxGtm_Trig_AdcTrigSource_tom0,
IfxGtm_Trig_AdcTrigSource_tom1,
IfxGtm_Trig_AdcTrigSource_count
}
Enum for ADC trigger source. More...
enum IfxGtm_Trig_DsadcTrig {
IfxGtm_Trig_DsadcTrig_0,
IfxGtm_Trig_DsadcTrig_1
}
Enum for DSADC trigger. More...
enum IfxGtm_Trig_DsadcTrigSource {
IfxGtm_Trig_DsadcTrigSource_tomX_6,
IfxGtm_Trig_DsadcTrigSource_tomX_7,
IfxGtm_Trig_DsadcTrigSource_tomX_13,
IfxGtm_Trig_DsadcTrigSource_tomX_14,
IfxGtm_Trig_DsadcTrigSource_atomX_4,
IfxGtm_Trig_DsadcTrigSource_atomX_5,
IfxGtm_Trig_DsadcTrigSource_atomX_6,
IfxGtm_Trig_DsadcTrigSource_atomX_7
}
Enum for DSADC trigger source. More...
enum IfxGtm_Trig_SentGroup {
IfxGtm_Trig_SentGroup_0,
IfxGtm_Trig_SentGroup_1,
IfxGtm_Trig_SentGroup_2,
IfxGtm_Trig_SentGroup_3,
IfxGtm_Trig_SentGroup_4,
IfxGtm_Trig_SentGroup_5
}
Enum for SENT group. More...
enum IfxGtm_Trig_SentTrig { IfxGtm_Trig_SentTrig_0 }
Enum for SENT trigger. More...
enum IfxGtm_Trig_SentTrigChannel {
IfxGtm_Trig_SentTrigChannel_4,
IfxGtm_Trig_SentTrigChannel_5,
IfxGtm_Trig_SentTrigChannel_6,
IfxGtm_Trig_SentTrigChannel_7,
IfxGtm_Trig_SentTrigChannel_13,
IfxGtm_Trig_SentTrigChannel_14,
IfxGtm_Trig_SentTrigChannel_15,
IfxGtm_Trig_SentTrigChannel_count
}
Enum for SENT trigger channel. More...
enum IfxGtm_Trig_SentTrigSource {
IfxGtm_Trig_SentTrigSource_atom0,
IfxGtm_Trig_SentTrigSource_atom1,
IfxGtm_Trig_SentTrigSource_atom2,
IfxGtm_Trig_SentTrigSource_atom3,
IfxGtm_Trig_SentTrigSource_tom0,
IfxGtm_Trig_SentTrigSource_tom1,
IfxGtm_Trig_SentTrigSource_count
}
Enum for SENT trigger source. More...

Functions

IFX_EXTERN boolean | IfxGtm_Trig_fromDsadc (Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
IFX_EXTERN void | IfxGtm_Trig_toDsadc (Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Trig_DsadcTrig dsadcTrig, IfxGtm_Trig_DsadcTrigSource sel)
IFX_EXTERN boolean | IfxGtm_Trig_toVadc (Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
IFX_EXTERN boolean | IfxGtm_Trig_toSent (Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)

Detailed Description

GTM TRIG details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Trig.h.


iLLD_TC26B: HSSL

Modules | Files
HSSL
iLLD
Collaboration diagram for HSSL:

Modules

Implementation
Standard Driver
How to use the HSSL Interface driver?
HSSL

Files

file | IfxHssl_cfg.h
HSSL on-chip implementation data.
file | IfxHssl_Hssl.h
HSSL HSSL details.
file | IfxHssl.h
HSSL basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » HSSL
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations | Variables
Enumerations
iLLD » HSSL » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxHssl_hsctIndex {
IfxHssl_hsctIndex_none = -1,
IfxHssl_hsctIndex_0 = 0
}
List of the available Hsct resources. More...
enum IfxHssl_hsslIndex {
IfxHssl_hsslIndex_none = -1,
IfxHssl_hsslIndex_0 = 0
}
List of the available Hssl resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap [IFXHSSL_NUM_MODULES]
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap [IFXHSSL_NUM_MODULES]

Detailed Description

Enumeration Type Documentation

◆ IfxHssl_hsctIndex

enum IfxHssl_hsctIndex

List of the available Hsct resources.

Enumerator
IfxHssl_hsctIndex_none | Not Selected.
IfxHssl_hsctIndex_0 | HSCT index 0.

Definition at line 80 of file IfxHssl_cfg.h.

◆ IfxHssl_hsslIndex

enum IfxHssl_hsslIndex

List of the available Hssl resources.

Enumerator
IfxHssl_hsslIndex_none | Not Selected.
IfxHssl_hsslIndex_0 | HSSL index 0.

Definition at line 88 of file IfxHssl_cfg.h.

Variable Documentation

◆ IfxHssl_cfg_hsctIndexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES]

Definition at line 103 of file IfxHssl_cfg.h.

◆ IfxHssl_cfg_hsslIndexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES]

Definition at line 105 of file IfxHssl_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » HSSL
Collaboration diagram for Standard Driver:

Modules

Enumerations
Hsct Functions
Data Structures
Hssl Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » HSSL » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxHssl_ChannelId {
IfxHssl_ChannelId_0,
IfxHssl_ChannelId_1,
IfxHssl_ChannelId_2,
IfxHssl_ChannelId_3
}
channel selection More...
enum IfxHssl_ClockFrequencyRate {
IfxHssl_ClockFrequencyRate_20Mhz = 0,
IfxHssl_ClockFrequencyRate_10Mhz = 1
}
SysClk / Reference Clock Frequency rate Definition in Ifx_HSCT.INIT.B.SRCF. More...
enum IfxHssl_Command {
IfxHssl_Command_noAction = 0,
IfxHssl_Command_readFrame = 1,
IfxHssl_Command_writeFrame = 2,
IfxHssl_Command_triggerFrame = 3
}
communication command selection Definition in Ifx_HSSL.I.ICON.B.RWT More...
enum IfxHssl_ControlCommand {
IfxHssl_ControlCommand_ping = 0,
IfxHssl_ControlCommand_highSpeedClockStart = 2,
IfxHssl_ControlCommand_highSpeedClockStop = 4,
IfxHssl_ControlCommand_lowSpeedTransmission = 8,
IfxHssl_ControlCommand_highSpeedTransmission = 16,
IfxHssl_ControlCommand_lowSpeedReception = 32,
IfxHssl_ControlCommand_mediumSpeedReception = 64,
IfxHssl_ControlCommand_highSpeedReception = 128,
IfxHssl_ControlCommand_enableReception = 49,
IfxHssl_ControlCommand_disableReception = 50,
IfxHssl_ControlCommand_turnOnClockTestMode = 52,
IfxHssl_ControlCommand_turnOffClockTestMode = 56,
IfxHssl_ControlCommand_turnOnPayloadLoopback = 255
}
predefined control command payload values More...
enum IfxHssl_DataLength {
IfxHssl_DataLength_8bit = 0,
IfxHssl_DataLength_16bit = 1,
IfxHssl_DataLength_32bit = 2
}
Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL.I.ICON.B.DATLEN. More...
enum IfxHssl_Hsct_InterruptSource {
IfxHssl_Hsct_InterruptSource_headerError = IFX_HSCT_IRQ_HER_OFF,
IfxHssl_Hsct_InterruptSource_payloadError = IFX_HSCT_IRQ_PYER_OFF,
IfxHssl_Hsct_InterruptSource_commandError = IFX_HSCT_IRQ_CER_OFF,
IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend = IFX_HSCT_IRQ_IFCFS_OFF,
IfxHssl_Hsct_InterruptSource_speedModeSwitchError = IFX_HSCT_IRQ_SMER_OFF,
IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished = IFX_HSCT_IRQ_USMSF_OFF,
IfxHssl_Hsct_InterruptSource_pllLockLosterror = IFX_HSCT_IRQ_PLER_OFF,
IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived = IFX_HSCT_IRQ_USM_OFF,
IfxHssl_Hsct_InterruptSource_pingAnswerReceived = IFX_HSCT_IRQ_PAR_OFF,
IfxHssl_Hsct_InterruptSource_txTransferError = IFX_HSCT_IRQ_TXTE_OFF,
IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow = IFX_HSCT_IRQ_SFO_OFF,
IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow = IFX_HSCT_IRQ_SFU_OFF
}
HSCT interrupt source Definition in Ifx_HSCT.IRQ. More...
enum IfxHssl_Hsct_SleepMode {
IfxHssl_Hsct_SleepMode_enable = 0,
IfxHssl_Hsct_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSCT.CLC.B.EDIS. More...
enum IfxHssl_Hssl_SleepMode {
IfxHssl_Hssl_SleepMode_enable = 0,
IfxHssl_Hssl_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSSL.CLC.B.EDIS. More...
enum IfxHssl_InterfaceMode {
IfxHssl_InterfaceMode_master = 0,
IfxHssl_InterfaceMode_slave = 1
}
interface mode (master IF /slave IF) Definition in Ifx_HSCT.INIT.B.IFM More...
enum IfxHssl_MasterModeRxSpeed {
IfxHssl_MasterModeRxSpeed_lowSpeed = 0,
IfxHssl_MasterModeRxSpeed_mediumSpeed = 1,
IfxHssl_MasterModeRxSpeed_highSpeed = 2
}
master mode receive speed Definition in Ifx_HSCT.IFCTRL.B.MRXSPEED More...
enum IfxHssl_MasterModeTxSpeed {
IfxHssl_MasterModeTxSpeed_lowSpeed = 0,
IfxHssl_MasterModeTxSpeed_highSpeed = 2
}
master mode transmit speed Definition in Ifx_HSCT.IFCTRL.B.MTXSPEED More...
enum IfxHssl_PllReferenceClock {
IfxHssl_PllReferenceClock_hsctSystemClockInput = 0,
IfxHssl_PllReferenceClock_oscillatorInput = 1
}
PLL reference clock Definition in Ifx_HSCT.CONFIGPHY.B.OSCCLKEN. More...
enum IfxHssl_StreamingMode {
IfxHssl_StreamingMode_continuous = 0,
IfxHssl_StreamingMode_single = 1
}
streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR More...
enum IfxHssl_SuspendMode {
IfxHssl_SuspendMode_none = 0,
IfxHssl_SuspendMode_hard = 1,
IfxHssl_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Detailed Description

Enumeration Type Documentation

◆ IfxHssl_ChannelId

enum IfxHssl_ChannelId

channel selection

Enumerator
IfxHssl_ChannelId_0 | Channel 0.
IfxHssl_ChannelId_1 | Channel 1.
IfxHssl_ChannelId_2 | Channel 2.
IfxHssl_ChannelId_3 | Channel 3.

Definition at line 74 of file IfxHssl.h.

◆ IfxHssl_ClockFrequencyRate

enum IfxHssl_ClockFrequencyRate

SysClk / Reference Clock Frequency rate Definition in Ifx_HSCT.INIT.B.SRCF.

Enumerator
IfxHssl_ClockFrequencyRate_20Mhz | SysClk/ RefClk is 20 MHz (Divider 1/1)
IfxHssl_ClockFrequencyRate_10Mhz | SysClk/ RefClk is 10 MHz (Divider 1/2)

Definition at line 85 of file IfxHssl.h.

◆ IfxHssl_Command

enum IfxHssl_Command

communication command selection Definition in Ifx_HSSL.I.ICON.B.RWT

Enumerator
IfxHssl_Command_noAction | command no action
IfxHssl_Command_readFrame | command read frame
IfxHssl_Command_writeFrame | command write frame
IfxHssl_Command_triggerFrame | command trigger frame

Definition at line 94 of file IfxHssl.h.

◆ IfxHssl_ControlCommand

enum IfxHssl_ControlCommand

predefined control command payload values

Enumerator
IfxHssl_ControlCommand_ping | ping (send by master. Slave sends back a fixed 32-bit payload result.)
IfxHssl_ControlCommand_highSpeedClockStart | slave interface clock multiplier start (in preparation for high speed mode)
IfxHssl_ControlCommand_highSpeedClockStop | slave interface clock multiplier stop (after fallback from high speed mode)
IfxHssl_ControlCommand_lowSpeedTransmission | select low speed mode for transfers from the Master to the Slave
IfxHssl_ControlCommand_highSpeedTransmission | select high speed mode for transfers from the Master to the Slave
IfxHssl_ControlCommand_lowSpeedReception | select low speed mode for transfers from the Slave to the Master
IfxHssl_ControlCommand_mediumSpeedReception | select medium speed mode for transfers from the Slave to the master
IfxHssl_ControlCommand_highSpeedReception | select high speed mode for transfers from the Slave to the master
IfxHssl_ControlCommand_enableReception | enable Slave interface transmitter
IfxHssl_ControlCommand_disableReception | disable Slave interface transmitter
IfxHssl_ControlCommand_turnOnClockTestMode | turn on clock test mode
IfxHssl_ControlCommand_turnOffClockTestMode | turn off clock test mode
IfxHssl_ControlCommand_turnOnPayloadLoopback | turn on payload loopback

Definition at line 104 of file IfxHssl.h.

◆ IfxHssl_DataLength

enum IfxHssl_DataLength

Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL.I.ICON.B.DATLEN.

Enumerator
IfxHssl_DataLength_8bit | 8 bit
IfxHssl_DataLength_16bit | 16 bit
IfxHssl_DataLength_32bit | 32 bit

Definition at line 124 of file IfxHssl.h.

◆ IfxHssl_Hsct_InterruptSource

enum IfxHssl_Hsct_InterruptSource

HSCT interrupt source Definition in Ifx_HSCT.IRQ.

Enumerator
IfxHssl_Hsct_InterruptSource_headerError | Header error detected.
IfxHssl_Hsct_InterruptSource_payloadError | Payload error detected.
IfxHssl_Hsct_InterruptSource_commandError | HSCT Command error.
IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend | Interface control frame send.
IfxHssl_Hsct_InterruptSource_speedModeSwitchError | Speed mode switch error.
IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished | Unsolicited message frame send finished.
IfxHssl_Hsct_InterruptSource_pllLockLosterror | Pll lock lost error.
IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived | Unsolicited message received.
IfxHssl_Hsct_InterruptSource_pingAnswerReceived | PING Answer Received.
IfxHssl_Hsct_InterruptSource_txTransferError | TX transfer error occurred on a disabled TX channel.
IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow | Synchronization FIFO overflow (in RX direction)
IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow | Synchronization FIFO underflow (in TX direction)

Definition at line 134 of file IfxHssl.h.

◆ IfxHssl_Hsct_SleepMode

enum IfxHssl_Hsct_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSCT.CLC.B.EDIS.

Enumerator
IfxHssl_Hsct_SleepMode_enable | enables sleep mode
IfxHssl_Hsct_SleepMode_disable | disables sleep mode

Definition at line 156 of file IfxHssl.h.

◆ IfxHssl_Hssl_SleepMode

enum IfxHssl_Hssl_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSSL.CLC.B.EDIS.

Enumerator
IfxHssl_Hssl_SleepMode_enable | enables sleep mode
IfxHssl_Hssl_SleepMode_disable | disables sleep mode

Definition at line 165 of file IfxHssl.h.

◆ IfxHssl_InterfaceMode

enum IfxHssl_InterfaceMode

interface mode (master IF /slave IF) Definition in Ifx_HSCT.INIT.B.IFM

Enumerator
IfxHssl_InterfaceMode_master | master IF mode
IfxHssl_InterfaceMode_slave | slave IF mode

Definition at line 174 of file IfxHssl.h.

◆ IfxHssl_MasterModeRxSpeed

enum IfxHssl_MasterModeRxSpeed

master mode receive speed Definition in Ifx_HSCT.IFCTRL.B.MRXSPEED

Enumerator
IfxHssl_MasterModeRxSpeed_lowSpeed | low speed
IfxHssl_MasterModeRxSpeed_mediumSpeed | medium speed
IfxHssl_MasterModeRxSpeed_highSpeed | high speed

Definition at line 183 of file IfxHssl.h.

◆ IfxHssl_MasterModeTxSpeed

enum IfxHssl_MasterModeTxSpeed

master mode transmit speed Definition in Ifx_HSCT.IFCTRL.B.MTXSPEED

Enumerator
IfxHssl_MasterModeTxSpeed_lowSpeed | low speed
IfxHssl_MasterModeTxSpeed_highSpeed | high speed

Definition at line 193 of file IfxHssl.h.

◆ IfxHssl_PllReferenceClock

enum IfxHssl_PllReferenceClock

PLL reference clock Definition in Ifx_HSCT.CONFIGPHY.B.OSCCLKEN.

Enumerator
IfxHssl_PllReferenceClock_hsctSystemClockInput | hsct system clock input (HSCT SysClk_i)
IfxHssl_PllReferenceClock_oscillatorInput | oscillator input

Definition at line 202 of file IfxHssl.h.

◆ IfxHssl_StreamingMode

enum IfxHssl_StreamingMode

streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR

Enumerator
IfxHssl_StreamingMode_continuous | streaming mode continuous (with two memory blocks)
IfxHssl_StreamingMode_single | streaming mode single (with one memory block)

Definition at line 211 of file IfxHssl.h.

◆ IfxHssl_SuspendMode

enum IfxHssl_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxHssl_SuspendMode_none | No suspend.
IfxHssl_SuspendMode_hard | Hard Suspend.
IfxHssl_SuspendMode_soft | Soft Suspend.

Definition at line 219 of file IfxHssl.h.


iLLD_TC26B: Hsct Functions

Functions
Hsct Functions
iLLD » HSSL » Standard Driver
Collaboration diagram for Hsct Functions:

Functions

IFX_INLINE void | IfxHssl_clearHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Clears the HSCT interrupt flag. More...
IFX_INLINE void | IfxHssl_disableHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag. More...
IFX_INLINE void | IfxHssl_enableHsctInterrupt (Ifx_HSCT *hsct, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSCT interrupt. More...
IFX_INLINE void | IfxHssl_enableHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag. More...
IFX_INLINE boolean | IfxHssl_getHsctInterruptFlagStatus (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Returns the HSCT interrupt flag status. More...
IFX_INLINE void | IfxHssl_setHsctSleepMode (Ifx_HSCT *hsct, IfxHssl_Hsct_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE uint32 | IfxHssl_getHsctUnsolicitedStatusMessage (Ifx_HSCT *hsct)
Get the last received unsolicited status message. More...
IFX_INLINE void | IfxHssl_sendHsctUnsolicitedStatusMessage (Ifx_HSCT *hsct, uint32 message)
Send the unsolicited status message. More...
IFX_INLINE void | IfxHssl_setHsctRxLinkSpeed (Ifx_HSCT *hsct, IfxHssl_MasterModeRxSpeed rxSpeed)
Set the HSCT RX link speed. More...
IFX_INLINE void | IfxHssl_setHsctTxLinkSpeed (Ifx_HSCT *hsct, IfxHssl_MasterModeTxSpeed txSpeed)
Set the HSCT TX link speed. More...
IFX_INLINE void | IfxHssl_enableHsctTransmitPath (Ifx_HSCT *hsct)
Enable hsct transmit path in master interface. More...
IFX_INLINE void | IfxHssl_enableHsctReceivePath (Ifx_HSCT *hsct)
Enable hsct receive path in master interface. More...
IFX_INLINE void | IfxHssl_disableHsctTransmitPath (Ifx_HSCT *hsct)
Disable hsct transmit path in master interface. More...
IFX_INLINE void | IfxHssl_disableHsctReceivePath (Ifx_HSCT *hsct)
Disable hsct receive path in master interface. More...
IFX_EXTERN void | IfxHssl_disableHsctModule (Ifx_HSCT *hsct)
Disables hsct module. More...
IFX_EXTERN void | IfxHssl_enableHsctModule (Ifx_HSCT *hsct)
Enables hsct module. More...
IFX_EXTERN Ifx_HSCT * | IfxHssl_getHsctAddress (IfxHssl_hsctIndex hsct)
IFX_EXTERN IfxHssl_hsctIndex | IfxHssl_getHsctIndex (Ifx_HSCT *hsct)
API to get the resource index of the HSCT specified. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsctSrcPointer (Ifx_HSCT *hsct)
Returns the SRC pointer for HSCT. More...
IFX_EXTERN void | IfxHssl_resetHsctKernel (Ifx_HSCT *hsct)
resets HSCT kernel More...

Detailed Description

Function Documentation

◆ IfxHssl_clearHsctInterruptFlag()

IFX_INLINE void IfxHssl_clearHsctInterruptFlag | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_Hsct_InterruptSource | source
 | ) |  |

Clears the HSCT interrupt flag.

Parameters
hsct | pointer to HSCT registers
source | HSCT interrupt source
Returns
None

Definition at line 684 of file IfxHssl.h.

◆ IfxHssl_disableHsctInterruptFlag()

IFX_INLINE void IfxHssl_disableHsctInterruptFlag | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_Hsct_InterruptSource | source
 | ) |  |

Enables HSCT interrupt flag.

Parameters
hsct | pointer to HSCT registers
source | HSCT interrupt source
Returns
None

Definition at line 711 of file IfxHssl.h.

◆ IfxHssl_disableHsctModule()

IFX_EXTERN void IfxHssl_disableHsctModule ( Ifx_HSCT * hsct )

Disables hsct module.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 53 of file IfxHssl.c.

◆ IfxHssl_disableHsctReceivePath()

IFX_INLINE void IfxHssl_disableHsctReceivePath ( Ifx_HSCT * hsct )

Disable hsct receive path in master interface.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 956 of file IfxHssl.h.

◆ IfxHssl_disableHsctTransmitPath()

IFX_INLINE void IfxHssl_disableHsctTransmitPath ( Ifx_HSCT * hsct )

Disable hsct transmit path in master interface.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 950 of file IfxHssl.h.

◆ IfxHssl_enableHsctInterrupt()

IFX_INLINE void IfxHssl_enableHsctInterrupt | ( | Ifx_HSCT * | hsct,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSCT interrupt.

Parameters
hsct | pointer to HSCT registers
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 738 of file IfxHssl.h.

◆ IfxHssl_enableHsctInterruptFlag()

IFX_INLINE void IfxHssl_enableHsctInterruptFlag | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_Hsct_InterruptSource | source
 | ) |  |

Enables HSCT interrupt flag.

Parameters
hsct | pointer to HSCT registers
source | HSCT interrupt source
Returns
None

Definition at line 747 of file IfxHssl.h.

◆ IfxHssl_enableHsctModule()

IFX_EXTERN void IfxHssl_enableHsctModule ( Ifx_HSCT * hsct )

Enables hsct module.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 71 of file IfxHssl.c.

Referenced by IfxHssl_Hssl_initHsctModule().

◆ IfxHssl_enableHsctReceivePath()

IFX_INLINE void IfxHssl_enableHsctReceivePath ( Ifx_HSCT * hsct )

Enable hsct receive path in master interface.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 944 of file IfxHssl.h.

◆ IfxHssl_enableHsctTransmitPath()

IFX_INLINE void IfxHssl_enableHsctTransmitPath ( Ifx_HSCT * hsct )

Enable hsct transmit path in master interface.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 938 of file IfxHssl.h.

◆ IfxHssl_getHsctAddress()

IFX_EXTERN Ifx_HSCT* IfxHssl_getHsctAddress ( IfxHssl_hsctIndex hsct )
Parameters
hsct Resource index of the HSCT
Returns
HSCT module register address

Definition at line 89 of file IfxHssl.c.

◆ IfxHssl_getHsctIndex()

IFX_EXTERN IfxHssl_hsctIndex IfxHssl_getHsctIndex ( Ifx_HSCT * hsct )

API to get the resource index of the HSCT specified.

Returns
Resource index of the HSCT

Definition at line 106 of file IfxHssl.c.

◆ IfxHssl_getHsctInterruptFlagStatus()

IFX_INLINE boolean IfxHssl_getHsctInterruptFlagStatus | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_Hsct_InterruptSource | source
 | ) |  |

Returns the HSCT interrupt flag status.

Parameters
hsct | pointer to HSCT registers
source | HSCT interrupt source
Returns
Status (TRUE / FALSE)

Definition at line 825 of file IfxHssl.h.

◆ IfxHssl_getHsctSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsctSrcPointer ( Ifx_HSCT * hsct )

Returns the SRC pointer for HSCT.

Parameters
hsct pointer to HSCT registers
Returns
SRC pointer for HSCT

Definition at line 126 of file IfxHssl.c.

Referenced by IfxHssl_enableHsctInterrupt().

◆ IfxHssl_getHsctUnsolicitedStatusMessage()

IFX_INLINE uint32 IfxHssl_getHsctUnsolicitedStatusMessage ( Ifx_HSCT * hsct )

Get the last received unsolicited status message.

Parameters
hsct pointer to HSCT registers
Returns
Get the unsolicited status message.

Definition at line 914 of file IfxHssl.h.

◆ IfxHssl_resetHsctKernel()

IFX_EXTERN void IfxHssl_resetHsctKernel ( Ifx_HSCT * hsct )

resets HSCT kernel

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 205 of file IfxHssl.c.

◆ IfxHssl_sendHsctUnsolicitedStatusMessage()

IFX_INLINE void IfxHssl_sendHsctUnsolicitedStatusMessage | ( | Ifx_HSCT * | hsct,
 |  | uint32 | message
 | ) |  |

Send the unsolicited status message.

Parameters
hsct | pointer to HSCT registers
message | Unsolicited status message to be sent
Returns
None

Definition at line 920 of file IfxHssl.h.

◆ IfxHssl_setHsctRxLinkSpeed()

IFX_INLINE void IfxHssl_setHsctRxLinkSpeed | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_MasterModeRxSpeed | rxSpeed
 | ) |  |

Set the HSCT RX link speed.

Parameters
hsct | pointer to HSCT registers
rxSpeed | Speed for Rx link
Returns
None

Definition at line 926 of file IfxHssl.h.

◆ IfxHssl_setHsctSleepMode()

IFX_INLINE void IfxHssl_setHsctSleepMode | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_Hsct_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
hsct | pointer to HSCT registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 867 of file IfxHssl.h.

◆ IfxHssl_setHsctTxLinkSpeed()

IFX_INLINE void IfxHssl_setHsctTxLinkSpeed | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_MasterModeTxSpeed | txSpeed
 | ) |  |

Set the HSCT TX link speed.

Parameters
hsct | pointer to HSCT registers
txSpeed | Speed for Tx link
Returns
None

Definition at line 932 of file IfxHssl.h.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » HSSL » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxHssl_Hsct
HSCT module handle. More...
struct | IfxHssl_Hsct_Config
Configuration structure of the HSCT module. More...

Detailed Description

Data Structure Documentation

◆ IfxHssl_Hsct

struct IfxHssl_Hsct

HSCT module handle.

Definition at line 260 of file IfxHssl.h.

Data Fields
Ifx_HSCT * | hsct | pointer to HSCT registers
boolean | loopBack | loopc back selection

◆ IfxHssl_Hsct_Config

struct IfxHssl_Hsct_Config

Configuration structure of the HSCT module.

Definition at line 268 of file IfxHssl.h.

Data Fields
boolean | highSpeedMode | high speed mode selection
Ifx_HSCT * | hsct | pointer to HSCT registers
IfxHssl_InterfaceMode | interfaceMode | interface mode (master IF /slave IF)
boolean | loopBack | loopc back selection


iLLD_TC26B: Hssl Functions

Functions
Hssl Functions
iLLD » HSSL » Standard Driver
Collaboration diagram for Hssl Functions:

Functions

IFX_INLINE void | IfxHssl_clearHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag. More...
IFX_INLINE void | IfxHssl_clearHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag. More...
IFX_INLINE void | IfxHssl_clearInitialiseModeFlag (Ifx_HSSL *hssl)
Clears the Initialise Mode Flag status. More...
IFX_INLINE void | IfxHssl_disableHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt. More...
IFX_INLINE void | IfxHssl_disableHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Disables the HSSl channel error interrupt flag, which trggers the EXI interrupt. More...
IFX_INLINE void | IfxHssl_enableAllErrorFlags (Ifx_HSSL *hssl)
Enables all error flags. More...
IFX_INLINE void | IfxHssl_enableHsslCOKInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL COK interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt. More...
IFX_INLINE void | IfxHssl_enableHsslERRInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL ERR interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslEXIInterrupt (Ifx_HSSL *hssl, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL EXI interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Enables the HSSl global error interrupt flag, which trggers the EXI interrupt. More...
IFX_INLINE void | IfxHssl_enableHsslRDIInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL RDI interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslTRGInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL TRG interrupt of specified channel. More...
IFX_INLINE uint32 | IfxHssl_getAllMflagsStatus (Ifx_HSSL *hssl)
Returns the status of all MFLAGS status. More...
IFX_INLINE uint16 | IfxHssl_getCurrentCount (Ifx_HSSL *hssl)
Returns the Current Count value. More...
IFX_INLINE boolean | IfxHssl_getHsslChannelErrorInterruptFlagStatus (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag. More...
IFX_INLINE boolean | IfxHssl_getHsslGloabalErrorInterruptFlagStatus (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag. More...
IFX_INLINE boolean | IfxHssl_getInitialiseModeFlagStatus (Ifx_HSSL *hssl)
Returns the Initialise Mode Flag status. More...
IFX_INLINE uint16 | IfxHssl_getReloadCount (Ifx_HSSL *hssl)
Returns the Reload Count value. More...
IFX_INLINE boolean | IfxHssl_isModuleSuspended (Ifx_HSSL *hssl)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxHssl_setHsslSleepMode (Ifx_HSSL *hssl, IfxHssl_Hssl_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxHssl_setInitialiseModeFlag (Ifx_HSSL *hssl)
Sets the Initialise Mode Flag. More...
IFX_INLINE void | IfxHssl_setReloadCount (Ifx_HSSL *hssl, uint16 reloadValue)
Sets the reload Count. More...
IFX_INLINE void | IfxHssl_setSuspendMode (Ifx_HSSL *hssl, IfxHssl_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxHssl_setTimeoutReloadValue (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, uint8 timeoutValue)
Sets the Timeout Reload Value. More...
IFX_EXTERN void | IfxHssl_disableHsslModule (Ifx_HSSL *hssl)
DIsables the hssl module. More...
IFX_EXTERN void | IfxHssl_enableHsslModule (Ifx_HSSL *hssl)
Enables the hssl module. More...
IFX_EXTERN Ifx_HSSL * | IfxHssl_getHsslAddress (IfxHssl_hsslIndex hssl)
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslCOKSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslERRSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL ERR of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslEXISrcPointer (Ifx_HSSL *hssl)
Returns the SRC pointer for HSSL EXI interrupt. More...
IFX_EXTERN IfxHssl_hsslIndex | IfxHssl_getHsslIndex (Ifx_HSSL *hssl)
API to get the resource index of the HSSL specified. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslRDISrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslTRGSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL TRG of specified channel. More...
IFX_EXTERN void | IfxHssl_resetHsslKernel (Ifx_HSSL *hssl)
resets the HSSL kernel More...

Detailed Description

Function Documentation

◆ IfxHssl_clearHsslChannelErrorInterruptFlag()

IFX_INLINE void IfxHssl_clearHsslChannelErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_ERRInterruptSource | source,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Clears the HSSl channel error interrupt flag.

Parameters
hssl | pointer to HSSl registers
source | HSSL channel error interrupt source
channelId | HSSL channel number
Returns
None

Definition at line 691 of file IfxHssl.h.

◆ IfxHssl_clearHsslGlobalErrorInterruptFlag()

IFX_INLINE void IfxHssl_clearHsslGlobalErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_EXIInterruptSource | source
 | ) |  |

Clears the HSSl global error interrupt flag.

Parameters
hssl | pointer to HSSl registers
source | HSSL global error interrupt source
Returns
None

Definition at line 698 of file IfxHssl.h.

◆ IfxHssl_clearInitialiseModeFlag()

IFX_INLINE void IfxHssl_clearInitialiseModeFlag ( Ifx_HSSL * hssl )

Clears the Initialise Mode Flag status.

Parameters
hssl pointer to HSSL registers
Returns
None

Definition at line 705 of file IfxHssl.h.

◆ IfxHssl_disableHsslChannelErrorInterruptFlag()

IFX_INLINE void IfxHssl_disableHsslChannelErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_ERRInterruptSource | source,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt.

Parameters
hssl | pointer to HSSl registers
source | HSSL channel error interrupt source
channelId | HSSL channel number
Returns
None

Definition at line 718 of file IfxHssl.h.

◆ IfxHssl_disableHsslGlobalErrorInterruptFlag()

IFX_INLINE void IfxHssl_disableHsslGlobalErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_EXIInterruptSource | source
 | ) |  |

Disables the HSSl channel error interrupt flag, which trggers the EXI interrupt.

Parameters
hssl | pointer to HSSl registers
source | HSSL global error interrupt source
Returns
None

Definition at line 725 of file IfxHssl.h.

◆ IfxHssl_disableHsslModule()

IFX_EXTERN void IfxHssl_disableHsslModule ( Ifx_HSSL * hssl )

DIsables the hssl module.

Parameters
hssl pointer to HSSl registers
Returns
None

Definition at line 62 of file IfxHssl.c.

◆ IfxHssl_enableAllErrorFlags()

IFX_INLINE void IfxHssl_enableAllErrorFlags ( Ifx_HSSL * hssl )

Enables all error flags.

Parameters
hssl pointer to HSSL registers
Returns
None

Definition at line 732 of file IfxHssl.h.

◆ IfxHssl_enableHsslChannelErrorInterruptFlag()

IFX_INLINE void IfxHssl_enableHsslChannelErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_ERRInterruptSource | source,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt.

Parameters
hssl | pointer to HSSl registers
source | HSSL channel error interrupt source
channelId | HSSL channel number
Returns
None

Definition at line 763 of file IfxHssl.h.

◆ IfxHssl_enableHsslCOKInterrupt()

IFX_INLINE void IfxHssl_enableHsslCOKInterrupt | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSSL COK interrupt of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 754 of file IfxHssl.h.

◆ IfxHssl_enableHsslERRInterrupt()

IFX_INLINE void IfxHssl_enableHsslERRInterrupt | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSSL ERR interrupt of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 770 of file IfxHssl.h.

◆ IfxHssl_enableHsslEXIInterrupt()

IFX_INLINE void IfxHssl_enableHsslEXIInterrupt | ( | Ifx_HSSL * | hssl,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSSL EXI interrupt of specified channel.

Parameters
hssl | pointer to HSSl registers
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 779 of file IfxHssl.h.

◆ IfxHssl_enableHsslGlobalErrorInterruptFlag()

IFX_INLINE void IfxHssl_enableHsslGlobalErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_EXIInterruptSource | source
 | ) |  |

Enables the HSSl global error interrupt flag, which trggers the EXI interrupt.

Parameters
hssl | pointer to HSSl registers
source | HSSL global error interrupt source
Returns
None

Definition at line 788 of file IfxHssl.h.

◆ IfxHssl_enableHsslModule()

IFX_EXTERN void IfxHssl_enableHsslModule ( Ifx_HSSL * hssl )

Enables the hssl module.

Parameters
hssl pointer to HSSl registers
Returns
None

Definition at line 80 of file IfxHssl.c.

Referenced by IfxHssl_Hssl_initHsslModule().

◆ IfxHssl_enableHsslRDIInterrupt()

IFX_INLINE void IfxHssl_enableHsslRDIInterrupt | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSSL RDI interrupt of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 795 of file IfxHssl.h.

◆ IfxHssl_enableHsslTRGInterrupt()

IFX_INLINE void IfxHssl_enableHsslTRGInterrupt | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSSL TRG interrupt of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 804 of file IfxHssl.h.

◆ IfxHssl_getAllMflagsStatus()

IFX_INLINE uint32 IfxHssl_getAllMflagsStatus ( Ifx_HSSL * hssl )

Returns the status of all MFLAGS status.

Parameters
hssl pointer to HSSL registers
Returns
MFLAGS status

Definition at line 813 of file IfxHssl.h.

◆ IfxHssl_getCurrentCount()

IFX_INLINE uint16 IfxHssl_getCurrentCount ( Ifx_HSSL * hssl )

Returns the Current Count value.

Parameters
hssl pointer to HSSL registers
Returns
Current Count value

Definition at line 819 of file IfxHssl.h.

◆ IfxHssl_getHsslAddress()

IFX_EXTERN Ifx_HSSL* IfxHssl_getHsslAddress ( IfxHssl_hsslIndex hssl )
Parameters
hssl Resource index of the HSSL
Returns
HSSL module register address

Definition at line 133 of file IfxHssl.c.

◆ IfxHssl_getHsslChannelErrorInterruptFlagStatus()

IFX_INLINE boolean IfxHssl_getHsslChannelErrorInterruptFlagStatus | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_ERRInterruptSource | source,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Clears the HSSl channel error interrupt flag.

Parameters
hssl | pointer to HSSl registers
source | HSSL channel error interrupt source
channelId | HSSL channel number
Returns
Status (TRUE / FALSE)

Definition at line 831 of file IfxHssl.h.

◆ IfxHssl_getHsslCOKSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsslCOKSrcPointer | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Returns the SRC pointer for HSSL COK of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
Returns
SRC pointer for HSSL COK interrupt of specific channel

Definition at line 150 of file IfxHssl.c.

Referenced by IfxHssl_enableHsslCOKInterrupt().

◆ IfxHssl_getHsslERRSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsslERRSrcPointer | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Returns the SRC pointer for HSSL ERR of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
Returns
SRC pointer for HSSL ERR interrupt of specific channel

Definition at line 157 of file IfxHssl.c.

Referenced by IfxHssl_enableHsslERRInterrupt().

◆ IfxHssl_getHsslEXISrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsslEXISrcPointer ( Ifx_HSSL * hssl )

Returns the SRC pointer for HSSL EXI interrupt.

Parameters
hssl pointer to HSSl registers
Returns
SRC pointer for HSSL EXI interrupt

Definition at line 164 of file IfxHssl.c.

Referenced by IfxHssl_enableHsslEXIInterrupt().

◆ IfxHssl_getHsslGloabalErrorInterruptFlagStatus()

IFX_INLINE boolean IfxHssl_getHsslGloabalErrorInterruptFlagStatus | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_EXIInterruptSource | source
 | ) |  |

Clears the HSSl global error interrupt flag.

Parameters
hssl | pointer to HSSl registers
source | HSSL global error interrupt source
Returns
Status (TRUE / FALSE)

Definition at line 837 of file IfxHssl.h.

◆ IfxHssl_getHsslIndex()

IFX_EXTERN IfxHssl_hsslIndex IfxHssl_getHsslIndex ( Ifx_HSSL * hssl )

API to get the resource index of the HSSL specified.

Returns
Resource index of the HSSL

Definition at line 171 of file IfxHssl.c.

◆ IfxHssl_getHsslRDISrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsslRDISrcPointer | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Returns the SRC pointer for HSSL COK of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
Returns
SRC pointer for HSSL RDI interrupt of specific channel

Definition at line 191 of file IfxHssl.c.

Referenced by IfxHssl_enableHsslRDIInterrupt().

◆ IfxHssl_getHsslTRGSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsslTRGSrcPointer | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Returns the SRC pointer for HSSL TRG of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
Returns
SRC pointer for HSSL TRG interrupt of specific channel

Definition at line 198 of file IfxHssl.c.

Referenced by IfxHssl_enableHsslTRGInterrupt().

◆ IfxHssl_getInitialiseModeFlagStatus()

IFX_INLINE boolean IfxHssl_getInitialiseModeFlagStatus ( Ifx_HSSL * hssl )

Returns the Initialise Mode Flag status.

Parameters
hssl pointer to HSSL registers
Returns
status : TRUE/FALSE

Definition at line 843 of file IfxHssl.h.

◆ IfxHssl_getReloadCount()

IFX_INLINE uint16 IfxHssl_getReloadCount ( Ifx_HSSL * hssl )

Returns the Reload Count value.

Parameters
hssl pointer to HSSL registers
Returns
Current Count value

Definition at line 849 of file IfxHssl.h.

◆ IfxHssl_isModuleSuspended()

IFX_INLINE boolean IfxHssl_isModuleSuspended ( Ifx_HSSL * hssl )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
hssl Pointer to HSSL module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 855 of file IfxHssl.h.

◆ IfxHssl_resetHsslKernel()

IFX_EXTERN void IfxHssl_resetHsslKernel ( Ifx_HSSL * hssl )

resets the HSSL kernel

Parameters
hssl pointer to HSSL registers
Returns
None

Definition at line 224 of file IfxHssl.c.

◆ IfxHssl_setHsslSleepMode()

IFX_INLINE void IfxHssl_setHsslSleepMode | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
hssl | pointer to HSSL registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 876 of file IfxHssl.h.

◆ IfxHssl_setInitialiseModeFlag()

IFX_INLINE void IfxHssl_setInitialiseModeFlag ( Ifx_HSSL * hssl )

Sets the Initialise Mode Flag.

Parameters
hssl pointer to HSSL registers
Returns
None

Definition at line 885 of file IfxHssl.h.

◆ IfxHssl_setReloadCount()

IFX_INLINE void IfxHssl_setReloadCount | ( | Ifx_HSSL * | hssl,
 |  | uint16 | reloadValue
 | ) |  |

Sets the reload Count.

Parameters
hssl | pointer to HSSL registers
reloadValue | Reload Value
Returns
None

Definition at line 891 of file IfxHssl.h.

◆ IfxHssl_setSuspendMode()

IFX_INLINE void IfxHssl_setSuspendMode | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
hssl | Pointer to HSSL module registers
mode | Module suspend mode
Returns
None

Definition at line 897 of file IfxHssl.h.

◆ IfxHssl_setTimeoutReloadValue()

IFX_INLINE void IfxHssl_setTimeoutReloadValue | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId,
 |  | uint8 | timeoutValue
 | ) |  |

Sets the Timeout Reload Value.

Parameters
hssl | pointer to HSSL registers
channelId | HSSL channel number
timeoutValue | Timeout Value
Returns
None

Definition at line 908 of file IfxHssl.h.


iLLD_TC26B: How to use the HSSL Interface driver?

How to use the HSSL Interface driver?
iLLD » HSSL
Collaboration diagram for How to use the HSSL Interface driver?:

The HSSL interface driver provides a default HSSL/HSCT configuration for point to point communication at two transfer speeds, 5MBaud (low speed) and 320MBaud (high speed). It also supports streaming transfers of data a memory block at both low and high speeds.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Hssl/Hssl/IfxHssl_Hssl.h>

Variables

Declare the HSSL handle, HSCT handle and channel array as global variables in your C code:

// used globally
static IfxHssl_Hssl hssl;
static IfxHssl_Hsct hsct;
IfxHssl_Hssl_Channel hsslChannel[4];
__attribute__ ((aligned(256))) uint32 txData[80]; // needs to be declared globally in case of streaming transfers

Module Initialisation

The module initialisation can be done as follows:

// create module config
IfxHssl_Hsct_Config hsctConfig;
IfxHssl_Hssl_initHsctModuleConfig(&hsctConfig, &MODULE_HSCT);
// select the interface mode (in case of slave)
hsctConfig.interfaceMode = IfxHssl_InterfaceMode_slave;
// select the high speed mode if required
hsctConfig.highSpeedMode = TRUE;
// initialize module
// IfxHssl_Hsct hsct; defined globally
IfxHssl_Hssl_initHsctModule(&hsct, &hsctConfig);
// create module config
IfxHssl_Hssl_Config hsslConfig;
IfxHssl_Hssl_initHsslModuleConfig(&hsslConfig, &MODULE_HSSL);
// IfxHssl_Hssl hssl; defined globally
IfxHssl_Hssl_initHsslModule(&hssl, &hsslConfig);

If application intends to explicitly configure the pins for HSCT module IFXHSSL_HSCT_DISABLE_PINCONFIG macro should be defined in the application. The explicit pin assignment should be done prior to IfxHssl_Hssl_initHsctModule().

Channel Initialisation

The Channel initialisation can be done as follows:

// create HSSL channel config
IfxHssl_Hssl_ChannelConfig hsslChannelConfig;
IfxHssl_Hssl_initChannelConfig(&hsslChannelConfig, &hssl, &hsct);
// initialize the channels
// IfxHssl_Hssl_Channel hsslChannel[4]; defined globally
for(int i=0; i<4; ++i)
{
hsslChannelConfig.channelId = (IfxHssl_ChannelId)i;
IfxHssl_Hssl_initChannel(&hsslChannel[i], &hsslChannelConfig);
}

Changing HSCT link speed

The link speed change can be done as follows

As per the above settings the HSCT master is in High speed reception and transmission.

The pseudo code for setting the target to High speed is as below

// Set the Tx link speed of the master to Low speed
IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_lowSpeed);
// Enable reception at the Slave
IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_enableReception);
// Send interface commmand to change Rx to High speed at the target
IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_highSpeedReception);
// Send interface commmand to change Tx to High speed at the target
IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_highSpeedTransmission);
// Set the Tx link speed of the master to High speed
IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_highSpeed);

The pseudo code for setitng the target to Low speed from High speed (ie. if hsctConfig.highSpeedMode is set to TRUE).

// Set the Tx link speed of master to Low speed
IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_lowSpeed);
// Send interface command to change Rx to low speed at the target
IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_lowSpeedReception);
// Set the Rx link speed of master to Low speed
IfxHssl_setHsctRxLinkSpeed(&hsct, IfxHssl_MasterModeRxSpeed_lowSpeed);
// Send interface command to change Tx to low speed at the target
IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_lowSpeedTransmission);

The HSSL is ready for use now!

Data Transfers

Simple Transfers

The HSSL driver provides simple to use data transfer functions,

It supports direct writing of 8/16/32 bit data from the initiator into a target's register, as well as reading a value from the target

// write some data to remote location:
IfxHssl_Hssl_write(&hsslChannel[0], 0x70000000, 0x12345678, IfxHssl_DataLength_32bit);
// wait for the acknowledgement
while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) != IfxHssl_Hssl_Status_ok )
{
if( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) == IfxHssl_Hssl_Status_error )
{
IfxHssl_Hssl_checkErrors(&hssl);
break;
}
}

A simple to use receive function is available as well.

// read some data from remote location:
IfxHssl_Hssl_read(&hsslChannel[0], 0x70000000, IfxHssl_DataLength_32bit);
// wait for the acknowledgement
while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) != IfxHssl_Hssl_Status_ok )
{
if( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) == IfxHssl_Hssl_Status_error )
{
IfxHssl_Hssl_checkErrors(&hssl);
break;
}
}
// read data from the register
uint32 dataL = IfxHssl_Hssl_getReadData(&hsslChannel[0]);

Streaming Transfers

HSSL driver also supports streaming transfers of data as a memory block at both low and high speeds.

Preparing the target for streaming with the desired memory location where the data needs to be transfered

// choose a channel other than channel2 for register access
// prepare streaming of single memory block
IfxHssl_Hssl_prepareStream(&hsslChannel[0], 0x70000000, 10);

Stream the memory block

Usage Example:

// __attribute__ ((aligned(256))) uint32 txData[80]; expected to be declared globally
// for single block streaming transfer
// change the txData address to global address before passing it to the API
// IfxHssl_Hssl_writeStream(&hssl, (uint32 *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)txData), 10);
IfxHssl_Hssl_writeStream(&hssl, txData, 10);
// wait until the streaming is finished
while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[2]) != IfxHssl_Hssl_Status_ok )
{}

DMA Operated Command Queues

It makes sense to do this from outside the driver, by initialising the DMA after HSSL, and send command queues through linked lists here is an example of how to use DMA operated command queues.

Include following header files into your C code:

#include <Hssl/Hssl/IfxHssl_Hssl.h>
#include <Dma/Dma/IfxDma_Dma.h>
#include <Scu/Std/IfxScuWdt.h>

Declare the HSSL handle, HSCT handle, HSSL channel handle and DMA channel handle as global variables in your C code:

// used globally
static IfxHssl_Hssl hssl;
static IfxHssl_Hsct hsct;
IfxHssl_Hssl_Channel hsslChannel;
// DMA channel handle
IfxDma_Dma_Channel chn;
// Linked List storage
// IMPORTANT: it has to be aligned to an 64bit address, otherwise DMA can't read it
#define NUM_LINKED_LIST_ITEMS 3
__attribute__ ((aligned(64))) Ifx_DMA_CH linkedList[NUM_LINKED_LIST_ITEMS] ;
// transfer these values to channel 0 : HSSL_IWD0, HSSL_ICON0, HSSL_IRWA0 registers via linked lists
#define NUM_TRANSFERED_WORDS 3
// three write command queues with different data and to different addresses on slave
uint32 sourceBuffer[NUM_LINKED_LIST_ITEMS][NUM_TRANSFERED_WORDS] = {
{0xC0CAC01A, 0xFF0A0000, 0x70000000},
{0xBA5EBA11, 0xFF0A0000, 0x70000010},
{0xDEADBEEF, 0xFF0A0000, 0x70000020}
};
// three command queues to the same channel 0
const uint32 destinationAddresses[NUM_LINKED_LIST_ITEMS] = {
(uint32)&HSSL_I0_IWD,
(uint32)&HSSL_I0_IWD,
(uint32)&HSSL_I0_IWD
};

Initialise the hssl module, see Module Initialisation

Initialise the hssl channel

// create HSSL channel config
IfxHssl_Hssl_ChannelConfig hsslChannelConfig;
IfxHssl_Hssl_initChannelConfig(&hsslChannelConfig, &hssl, &hsct);
// initialize the channel 0
// IfxHssl_Hssl_Channel hsslChannel; defined globally
hsslChannelConfig.channelId = 0;
IfxHssl_Hssl_initChannel(&hsslChannel, &hsslChannelConfig);

Build a linked list

// create module config
IfxDma_Dma_Config dmaConfig;
IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
// initialize module
IfxDma_Dma dma;
IfxDma_Dma_initModule(&dma, &dmaConfig);
// initial channel configuration
IfxDma_Dma_ChannelConfig cfg;
IfxDma_Dma_initChannelConfig(&cfg, &dma);
// following settings are used by all transactions
cfg.transferCount = NUM_TRANSFERED_WORDS;
cfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
cfg.moveSize = IfxDma_ChannelMoveSize_32bit;
cfg.shadowControl = IfxDma_ChannelShadow_linkedList;
// generate linked list items
for(int i=0; i<NUM_LINKED_LIST_ITEMS; ++i) {
cfg.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i]);
cfg.destinationAddress = destinationAddresses[i];
// address to next transaction set
cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)&linkedList[(i + 1) % NUM_LINKED_LIST_ITEMS]);
// transfer first transaction set into DMA channel
if( i == 0 ) {
IfxDma_Dma_initChannel(&chn, &cfg);
}
// transfer into linked list storage
IfxDma_Dma_initLinkedListEntry((void *)&linkedList[i], &cfg);
if( i == 0 ) {
// - trigger channel interrupt once the first transaction set has been loaded (again) into DMA channel
linkedList[i].CHCSR.B.SIT = 1;
} else {
// - activate SCH (transaction request) for each entry, expect for the first one (linked list terminated here)
linkedList[i].CHCSR.B.SCH = 1;
}
}

The transfer can be started via software with:

// clear service request flag
(IfxDma_Dma_getSrcPointer(&chn))->B.CLRR = 1;
// start linked list transaction
IfxDma_Dma_startChannelTransaction(&chn);
// wait for service request which is triggered at the end of linked list transfers
while( !(IfxDma_Dma_getSrcPointer(&chn))->B.SRR );

Interrupts usage

Interrupts can be enabled from the application by using the APIs provided in the driver, there are APIs available in the driver to enable, disable, clear and read the status of interrupt falgs, along with these,
APIs to enable the the enterrupts are also available.

here is an example of how to use the interrupts in HSSL driver.

Using HSCT interrupts

After initialising HSCT module Module Initialisation

choose what flags needs to be enabled for HSCT interrupt and call the following function once for each flag by choosing the right flag as parameter,
and after choosing all the flags needed, enable the HSCT interrupt with desired type of service and priority.

Ifx_HSCT *hsct = &MODULE_HSCT;
IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_headerError);
IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_payloadError);
IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_commandError);
IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_speedModeSwitchError);
// enable the HSCT interrupt
IfxHssl_enableHsctInterrupt(hsct, IfxSrc_Tos_cpu0, 4);

Using HSSl interrupts

HSSL global error interrupt (EXI)

After initilaising HSSL module Module Initialisation

choose what flags needs to be enabled for HSSL global error (EXI) interrupt and call the following function once for each flag by choosing the right flag as parameter,
and after choosing all the flags needed, enable the HSSL EXI interrupt with desired type of service and priority

Ifx_HSSL *hssl = &MODULE_HSSL;
IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_busAccessError);
IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_dataLengthError);
IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_crcError);
// enable the HSSL EXI interrupt
IfxHssl_enableHsslEXIInterrupt(hssl, IfxSrc_Tos_cpu0, 6);

HSSL channel specific error interrupt (ERR)

After initilaising HSSL channel Channel Initialisation

choose what flags needs to be enabled for HSSL channel specific error (ERR) interrupt and call the following function once for each flag by choosing the right flag as parameter,
and after choosing all the flags needed, enable the HSSL ERR interrupt with desired channel, type of service and priority

Ifx_HSSL *hssl = &MODULE_HSSL;
IfxHssl_enableHsslChannelErrorInterruptFlag(hssl, channelId_0, IfxHssl_Hssl_ERRInterruptSource_transactionTagError);
IfxHssl_enableHsslChannelErrorInterruptFlag(hssl, channelId_0, IfxHssl_Hssl_ERRInterruptSource_timeoutError);
// enable the HSSL ERR interrupt
IfxHssl_enableHsslERRInterrupt(hssl, channelId_0, IfxSrc_Tos_cpu0, 8);

you can define the ISR of your own and service the interrupt, please refer to more general usage of interrupts How to define Interrupts?

some additional APIs to clear, disable interrupt flags and get flag status are also available.


iLLD_TC26B: HSSL

Modules
HSSL
iLLD » HSSL
Collaboration diagram for HSSL:

Modules

Data Structures
Enumerations
Module Functions
Channel Functions
Simple Communication
Error Handling
Streaming Communication

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » HSSL » HSSL
Collaboration diagram for Data Structures:

Data Structures

struct | IfxHssl_Hssl_AccessWindow
structure for access windows More...
struct | IfxHssl_Hssl
HSSL Handle. More...
struct | IfxHssl_Hssl_Channel
channel handle More...
struct | IfxHssl_Hssl_ChannelConfig
configuration structure for channel More...
struct | IfxHssl_Hssl_Config
configuration structure of the HSSL module More...

Detailed Description

Data Structure Documentation

◆ IfxHssl_Hssl_AccessWindow

struct IfxHssl_Hssl_AccessWindow

structure for access windows

Definition at line 477 of file IfxHssl_Hssl.h.

Data Fields
uint32 | end | end of the access
uint32 | start | start of the access

◆ IfxHssl_Hssl

struct IfxHssl_Hssl

HSSL Handle.

Definition at line 504 of file IfxHssl_Hssl.h.

Collaboration diagram for IfxHssl_Hssl:
[legend]
Data Fields
IfxHssl_Hssl_errorFlags | errorFlags | structure for error flags
Ifx_HSSL * | hssl | pointer to HSSL register
boolean | loopBack | loop back (enable / disable) for streaming transfers within the microcontroller

◆ IfxHssl_Hssl_Channel

struct IfxHssl_Hssl_Channel

channel handle

Definition at line 513 of file IfxHssl_Hssl.h.

Data Fields
IfxHssl_ChannelId | channelId | channel number (id)
IfxHssl_Hssl_FrameRequest | currentFrameRequest | current frame request
Ifx_HSCT * | hsct | pointer to HSCT registers
Ifx_HSSL * | hssl | pointer to HSSL registers
boolean | loopBack | loopback (enable / disable) for streaming transfers within the microcontroller
IfxHssl_StreamingMode | streamingMode | streaming mode selection ( single / continuous )
boolean | streamingModeOn | streaming mode or command mode

◆ IfxHssl_Hssl_ChannelConfig

struct IfxHssl_Hssl_ChannelConfig

configuration structure for channel

Definition at line 526 of file IfxHssl_Hssl.h.

Data Fields
IfxHssl_ChannelId | channelId | channel number (id)
Ifx_HSCT * | hsct | pointer to HSCT registers
Ifx_HSSL * | hssl | pointer to HSSL registers
boolean | loopBack | loop back (enable / disable) for streaming transfers within the microcontroller
IfxHssl_StreamingMode | streamingMode | streaming mode selection ( single / continuous )

◆ IfxHssl_Hssl_Config

struct IfxHssl_Hssl_Config

configuration structure of the HSSL module

Definition at line 537 of file IfxHssl_Hssl.h.

Collaboration diagram for IfxHssl_Hssl_Config:
[legend]
Data Fields
IfxHssl_Hssl_AccessWindow | accessWindow0 | access window of channel 0
IfxHssl_Hssl_AccessWindow | accessWindow1 | access window of channel 1
IfxHssl_Hssl_AccessWindow | accessWindow2 | access window of channel 2
IfxHssl_Hssl_AccessWindow | accessWindow3 | access window of channel 3
Ifx_HSSL * | hssl | pointer to HSSL registers
uint16 | preDivider | Defines the down-scaled module clock to be used by all channel timeout timers.


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » HSSL » HSSL
Collaboration diagram for Enumerations:

Enumerations

enum IfxHssl_Hssl_FrameRequest {
IfxHssl_Hssl_FrameRequest_readFrame = 1,
IfxHssl_Hssl_FrameRequest_writeFrame = 2,
IfxHssl_Hssl_FrameRequest_triggerFrame = 3,
IfxHssl_Hssl_FrameRequest_readId = 4,
IfxHssl_Hssl_FrameRequest_noAction = 5
}
frame request selection More...
enum IfxHssl_Hssl_Status {
IfxHssl_Hssl_Status_ok = 0,
IfxHssl_Hssl_Status_busy = 1,
IfxHssl_Hssl_Status_error = 2
}
module status More...

Detailed Description

Enumeration Type Documentation

◆ IfxHssl_Hssl_FrameRequest

enum IfxHssl_Hssl_FrameRequest

frame request selection

Enumerator
IfxHssl_Hssl_FrameRequest_readFrame | read frame rquest
IfxHssl_Hssl_FrameRequest_writeFrame | write frame rquest
IfxHssl_Hssl_FrameRequest_triggerFrame | trigger frame rquest
IfxHssl_Hssl_FrameRequest_readId | read id request
IfxHssl_Hssl_FrameRequest_noAction | no action

Definition at line 449 of file IfxHssl_Hssl.h.

◆ IfxHssl_Hssl_Status

enum IfxHssl_Hssl_Status

module status

Enumerator
IfxHssl_Hssl_Status_ok | status ok
IfxHssl_Hssl_Status_busy | status busy
IfxHssl_Hssl_Status_error | status error

Definition at line 460 of file IfxHssl_Hssl.h.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » HSSL » HSSL
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxHssl_Hssl_initHsctModule (IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsctModuleConfig (IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsslModule (IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
Initialises the Hssl module. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsslModuleConfig (IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxHssl_Hssl_initHsctModule()

IFX_EXTERN void IfxHssl_Hssl_initHsctModule | ( | IfxHssl_Hsct * | hsct,
 |  | const IfxHssl_Hsct_Config * | config
 | ) |  |

Initialises the module.

Parameters
hsct | HSCT Handle
config | configuration structure of the HSCT module
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 157 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_initHsctModuleConfig()

IFX_EXTERN void IfxHssl_Hssl_initHsctModuleConfig | ( | IfxHssl_Hsct_Config * | config,
 |  | Ifx_HSCT * | hsct
 | ) |  |

Fills the config structure with default values.

Parameters
config | configuration structure of the HSCT module
hsct | pointer to HSCT register
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 244 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_initHsslModule()

IFX_EXTERN void IfxHssl_Hssl_initHsslModule | ( | IfxHssl_Hssl * | hssl,
 |  | const IfxHssl_Hssl_Config * | config
 | ) |  |

Initialises the Hssl module.

Parameters
hssl | HSSL handle
config | configuration structure of the module
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 258 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_initHsslModuleConfig()

IFX_EXTERN void IfxHssl_Hssl_initHsslModuleConfig | ( | IfxHssl_Hssl_Config * | config,
 |  | Ifx_HSSL * | hssl
 | ) |  |

Fills the config structure with default values.

Parameters
config | configuration structure of the module
hssl | pointer to HSSL registers
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 289 of file IfxHssl_Hssl.c.


iLLD_TC26B: Channel Functions

Functions
Channel Functions
iLLD » HSSL » HSSL
Collaboration diagram for Channel Functions:

Functions

IFX_EXTERN void | IfxHssl_Hssl_initChannel (IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
Initialises the channel. More...
IFX_EXTERN void | IfxHssl_Hssl_initChannelConfig (IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
Fills the channel config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxHssl_Hssl_initChannel()

IFX_EXTERN void IfxHssl_Hssl_initChannel | ( | IfxHssl_Hssl_Channel * | channel,
 |  | const IfxHssl_Hssl_ChannelConfig * | channelConfig
 | ) |  |

Initialises the channel.

Parameters
channel | channel handle
channelConfig | configuration structure for channel
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 131 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_initChannelConfig()

IFX_EXTERN void IfxHssl_Hssl_initChannelConfig | ( | IfxHssl_Hssl_ChannelConfig * | channelConfig,
 |  | IfxHssl_Hssl * | hssl,
 |  | IfxHssl_Hsct * | hsct
 | ) |  |

Fills the channel config structure with default values.

Parameters
channelConfig | configuration structure for channel
hssl | HSSL Handle
hsct | HSCT Handle
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 145 of file IfxHssl_Hssl.c.


iLLD_TC26B: Simple Communication

Functions
Simple Communication
iLLD » HSSL » HSSL
Collaboration diagram for Simple Communication:

Functions

IFX_INLINE uint32 | IfxHssl_Hssl_getReadData (IfxHssl_Hssl_Channel *channel)
reads and returs the data More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_read (IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
Initiates read request. More...
IFX_EXTERN void | IfxHssl_Hssl_sendControlCommand (IfxHssl_Hsct *hsct, uint8 command)
sends a predefined command from master to slave More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_singleFrameRequest (IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
serves the frame request (read, write, trigger frame and read id) More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_waitAcknowledge (IfxHssl_Hssl_Channel *channel)
waits until the current transaction is done More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_write (IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
writes single frame of data into the specified address More...

Detailed Description

Function Documentation

◆ IfxHssl_Hssl_getReadData()

IFX_INLINE uint32 IfxHssl_Hssl_getReadData ( IfxHssl_Hssl_Channel * channel )

reads and returs the data

Parameters
channel channel handle
Returns
data

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 770 of file IfxHssl_Hssl.h.

Referenced by IfxHssl_Hssl_prepareStream().

◆ IfxHssl_Hssl_read()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_read | ( | IfxHssl_Hssl_Channel * | channel,
 |  | uint32 | address,
 |  | IfxHssl_DataLength | dataLength
 | ) |  |

Initiates read request.

Parameters
channel | channel handle
address | address of the location from where the data is to be read
dataLength | length of the data
Returns
module status (ok, busy, error)

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 423 of file IfxHssl_Hssl.c.

Referenced by IfxHssl_Hssl_prepareStream().

◆ IfxHssl_Hssl_sendControlCommand()

IFX_EXTERN void IfxHssl_Hssl_sendControlCommand | ( | IfxHssl_Hsct * | hsct,
 |  | uint8 | command
 | ) |  |

sends a predefined command from master to slave

Parameters
hsct | HSCT Handle
command | command value
Returns
None

Usage Example:

// enable slave Tx channel (Rx disable to Rx low peed)
IfxHssl_Hssl_sendControlCommand(&channel, IfxHssl_ControlCommand_enableReception);

Definition at line 430 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_singleFrameRequest()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_singleFrameRequest | ( | IfxHssl_Hssl_Channel * | channel,
 |  | IfxHssl_Hssl_FrameRequest | frameRequest,
 |  | uint32 | address,
 |  | uint32 | data,
 |  | IfxHssl_DataLength | dataLength
 | ) |  |

serves the frame request (read, write, trigger frame and read id)

Parameters
channel | channel handle
frameRequest | frame request
address | address of the location (to be written into / read from)
data | data to be written
dataLength | length of the data
Returns
module status (ok, busy, error)

Definition at line 441 of file IfxHssl_Hssl.c.

Referenced by IfxHssl_Hssl_prepareStream(), IfxHssl_Hssl_read(), and IfxHssl_Hssl_write().

◆ IfxHssl_Hssl_waitAcknowledge()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_waitAcknowledge ( IfxHssl_Hssl_Channel * channel )

waits until the current transaction is done

Parameters
channel channel handle
Returns
module status (ok, busy, error)

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 484 of file IfxHssl_Hssl.c.

Referenced by IfxHssl_Hssl_prepareStream().

◆ IfxHssl_Hssl_write()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_write | ( | IfxHssl_Hssl_Channel * | channel,
 |  | uint32 | address,
 |  | uint32 | data,
 |  | IfxHssl_DataLength | dataLength
 | ) |  |

writes single frame of data into the specified address

Parameters
channel | channel handle
address | address of the location where the data is to be written
data | data that needs to be written
dataLength | length of the data (8, 16, 32 bit)
Returns
module status (ok, busy, error)

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 543 of file IfxHssl_Hssl.c.


iLLD_TC26B: Error Handling

Functions
Error Handling
iLLD » HSSL » HSSL
Collaboration diagram for Error Handling:

Functions

IFX_EXTERN void | IfxHssl_Hssl_checkErrors (IfxHssl_Hssl *hssl)
stores the status of errors in the respective members of the error flags structure More...
IFX_EXTERN void | IfxHssl_Hssl_clearErrorFlags (IfxHssl_Hssl *hssl)
clears the status of members in the error flags structure More...
IFX_EXTERN void | IfxHssl_Hssl_delay (IfxHssl_Hsct *hsct)
a simple software delay More...

Detailed Description

Function Documentation

◆ IfxHssl_Hssl_checkErrors()

IFX_EXTERN void IfxHssl_Hssl_checkErrors ( IfxHssl_Hssl * hssl )

stores the status of errors in the respective members of the error flags structure

Parameters
hssl HSSL Handle
Returns
None

Definition at line 53 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_clearErrorFlags()

IFX_EXTERN void IfxHssl_Hssl_clearErrorFlags ( IfxHssl_Hssl * hssl )

clears the status of members in the error flags structure

Parameters
hssl HSSL Handle
Returns
None

Definition at line 105 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_delay()

IFX_EXTERN void IfxHssl_Hssl_delay ( IfxHssl_Hsct * hsct )

a simple software delay

Parameters
hsct HSCT Handle
Returns
None

Definition at line 119 of file IfxHssl_Hssl.c.

Referenced by IfxHssl_Hssl_sendControlCommand().


iLLD_TC26B: Streaming Communication

Functions
Streaming Communication
iLLD » HSSL » HSSL
Collaboration diagram for Streaming Communication:

Functions

IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_prepareStream (IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
Prepares the target device for streaming. More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_writeStream (IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
transfers one memory block of data useful for transfering huge data from one location to another and between devices. NOTE: This function should be called only for IfxHssl_ChannelId_2 More...

Detailed Description

Function Documentation

◆ IfxHssl_Hssl_prepareStream()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_prepareStream | ( | IfxHssl_Hssl_Channel * | channel,
 |  | uint32 | slaveTargetAddress,
 |  | Ifx_SizeT | count
 | ) |  |

Prepares the target device for streaming.

Parameters
channel | channel handle
slaveTargetAddress | address of the location on target device where the data needs to be transfered
count | Frame count (length of the data in the memory as 256 bytes per frame)
Returns
module status (ok, busy, error)

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 308 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_writeStream()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_writeStream | ( | IfxHssl_Hssl * | hssl,
 |  | uint32 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

transfers one memory block of data useful for transfering huge data from one location to another and between devices. NOTE: This function should be called only for IfxHssl_ChannelId_2

Parameters
hssl | HSSL handle
data | starting address of the location to be read from (memory block 0 / HSSL_ISSA0)
count | Frame count (length of the data in the memory as 256 bytes per frame)
Returns
module status (ok, busy, error)

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 549 of file IfxHssl_Hssl.c.


iLLD_TC26B: IfxHssl_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxHssl_cfg.h File Reference
iLLD » HSSL

HSSL on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxHssl_reg.h"
#include "IfxHsct_reg.h"
Include dependency graph for IfxHssl_cfg.h:

Go to the source code of this file.

Macros

#define | IFXHSSL_NUM_CHANNELS 4
#define | IFXHSSL_NUM_MODULES 1
#define | IFXHSSL_JTAG_ID_ADDRESS (0xF0000464u)

Enumerations

enum IfxHssl_hsctIndex {
IfxHssl_hsctIndex_none = -1,
IfxHssl_hsctIndex_0 = 0
}
List of the available Hsct resources. More...
enum IfxHssl_hsslIndex {
IfxHssl_hsslIndex_none = -1,
IfxHssl_hsslIndex_0 = 0
}
List of the available Hssl resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap [IFXHSSL_NUM_MODULES]
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap [IFXHSSL_NUM_MODULES]

Detailed Description

HSSL on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxHssl_cfg.h.

Macro Definition Documentation

◆ IFXHSSL_JTAG_ID_ADDRESS

#define IFXHSSL_JTAG_ID_ADDRESS (0xF0000464u)

Definition at line 70 of file IfxHssl_cfg.h.

Referenced by IfxHssl_Hssl_initHsslModule().

◆ IFXHSSL_NUM_CHANNELS

#define IFXHSSL_NUM_CHANNELS 4

Definition at line 66 of file IfxHssl_cfg.h.

◆ IFXHSSL_NUM_MODULES

#define IFXHSSL_NUM_MODULES 1

Definition at line 68 of file IfxHssl_cfg.h.

Referenced by IfxHssl_getHsctAddress(), IfxHssl_getHsctIndex(), IfxHssl_getHsslAddress(), and IfxHssl_getHsslIndex().


iLLD_TC26B: IfxHssl_Hssl.h File Reference

  • Hssl
  • Hssl
Data Structures | Enumerations | Functions
IfxHssl_Hssl.h File Reference
iLLD » HSSL

HSSL HSSL details. More...

#include "Hssl/Std/IfxHssl.h"
#include "Port/Std/IfxPort.h"
Include dependency graph for IfxHssl_Hssl.h:

Go to the source code of this file.

Data Structures

struct | IfxHssl_Hssl_AccessWindow
structure for access windows More...
struct | IfxHssl_Hssl_errorFlags
structure for error flags More...
struct | IfxHssl_Hssl
HSSL Handle. More...
struct | IfxHssl_Hssl_Channel
channel handle More...
struct | IfxHssl_Hssl_ChannelConfig
configuration structure for channel More...
struct | IfxHssl_Hssl_Config
configuration structure of the HSSL module More...

Enumerations

enum IfxHssl_Hssl_FrameRequest {
IfxHssl_Hssl_FrameRequest_readFrame = 1,
IfxHssl_Hssl_FrameRequest_writeFrame = 2,
IfxHssl_Hssl_FrameRequest_triggerFrame = 3,
IfxHssl_Hssl_FrameRequest_readId = 4,
IfxHssl_Hssl_FrameRequest_noAction = 5
}
frame request selection More...
enum IfxHssl_Hssl_Status {
IfxHssl_Hssl_Status_ok = 0,
IfxHssl_Hssl_Status_busy = 1,
IfxHssl_Hssl_Status_error = 2
}
module status More...

Functions

IFX_EXTERN void | IfxHssl_Hssl_initHsctModule (IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsctModuleConfig (IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsslModule (IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
Initialises the Hssl module. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsslModuleConfig (IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxHssl_Hssl_initChannel (IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
Initialises the channel. More...
IFX_EXTERN void | IfxHssl_Hssl_initChannelConfig (IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
Fills the channel config structure with default values. More...
IFX_INLINE uint32 | IfxHssl_Hssl_getReadData (IfxHssl_Hssl_Channel *channel)
reads and returs the data More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_read (IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
Initiates read request. More...
IFX_EXTERN void | IfxHssl_Hssl_sendControlCommand (IfxHssl_Hsct *hsct, uint8 command)
sends a predefined command from master to slave More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_singleFrameRequest (IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
serves the frame request (read, write, trigger frame and read id) More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_waitAcknowledge (IfxHssl_Hssl_Channel *channel)
waits until the current transaction is done More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_write (IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
writes single frame of data into the specified address More...
IFX_EXTERN void | IfxHssl_Hssl_checkErrors (IfxHssl_Hssl *hssl)
stores the status of errors in the respective members of the error flags structure More...
IFX_EXTERN void | IfxHssl_Hssl_clearErrorFlags (IfxHssl_Hssl *hssl)
clears the status of members in the error flags structure More...
IFX_EXTERN void | IfxHssl_Hssl_delay (IfxHssl_Hsct *hsct)
a simple software delay More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_prepareStream (IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
Prepares the target device for streaming. More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_writeStream (IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
transfers one memory block of data useful for transfering huge data from one location to another and between devices. NOTE: This function should be called only for IfxHssl_ChannelId_2 More...

Detailed Description

HSSL HSSL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxHssl_Hssl.h.

Data Structure Documentation

◆ IfxHssl_Hssl_errorFlags

struct IfxHssl_Hssl_errorFlags

structure for error flags

Definition at line 487 of file IfxHssl_Hssl.h.

Data Fields
uint8 | busAccessError: 1 | SRI/SPB bus access error.
uint8 | channelNumberCodeError: 1 | PHY inconsistency error 1 (channel number code error)
uint8 | crcError: 1 | CRC error.
uint8 | dataLengthError: 1 | PHY inconsistency error 2 (data length error)
uint8 | memoryAccessViolation: 1 | memory access violation
uint8 | notAcknowledgeError: 1 | not acknowledge error / tag error
uint8 | timeoutError: 1 | timeout error
uint8 | transactionTagError: 1 | transaction tag error
uint8 | unexpectedError: 1 | unexpected type of frame error


iLLD_TC26B: IfxHssl.h File Reference

  • Hssl
  • Std
Data Structures | Enumerations | Functions
IfxHssl.h File Reference
iLLD » HSSL

HSSL basic functionality. More...

#include "_Impl/IfxHssl_cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Scu/Std/IfxScuWdt.h"
#include "IfxHssl_bf.h"
#include "IfxHsct_bf.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxHssl.h:

Go to the source code of this file.

Data Structures

struct | IfxHssl_Hsct
HSCT module handle. More...
struct | IfxHssl_Hsct_Config
Configuration structure of the HSCT module. More...

Enumerations

enum IfxHssl_ChannelId {
IfxHssl_ChannelId_0,
IfxHssl_ChannelId_1,
IfxHssl_ChannelId_2,
IfxHssl_ChannelId_3
}
channel selection More...
enum IfxHssl_ClockFrequencyRate {
IfxHssl_ClockFrequencyRate_20Mhz = 0,
IfxHssl_ClockFrequencyRate_10Mhz = 1
}
SysClk / Reference Clock Frequency rate Definition in Ifx_HSCT.INIT.B.SRCF. More...
enum IfxHssl_Command {
IfxHssl_Command_noAction = 0,
IfxHssl_Command_readFrame = 1,
IfxHssl_Command_writeFrame = 2,
IfxHssl_Command_triggerFrame = 3
}
communication command selection Definition in Ifx_HSSL.I.ICON.B.RWT More...
enum IfxHssl_ControlCommand {
IfxHssl_ControlCommand_ping = 0,
IfxHssl_ControlCommand_highSpeedClockStart = 2,
IfxHssl_ControlCommand_highSpeedClockStop = 4,
IfxHssl_ControlCommand_lowSpeedTransmission = 8,
IfxHssl_ControlCommand_highSpeedTransmission = 16,
IfxHssl_ControlCommand_lowSpeedReception = 32,
IfxHssl_ControlCommand_mediumSpeedReception = 64,
IfxHssl_ControlCommand_highSpeedReception = 128,
IfxHssl_ControlCommand_enableReception = 49,
IfxHssl_ControlCommand_disableReception = 50,
IfxHssl_ControlCommand_turnOnClockTestMode = 52,
IfxHssl_ControlCommand_turnOffClockTestMode = 56,
IfxHssl_ControlCommand_turnOnPayloadLoopback = 255
}
predefined control command payload values More...
enum IfxHssl_DataLength {
IfxHssl_DataLength_8bit = 0,
IfxHssl_DataLength_16bit = 1,
IfxHssl_DataLength_32bit = 2
}
Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL.I.ICON.B.DATLEN. More...
enum IfxHssl_Hsct_InterruptSource {
IfxHssl_Hsct_InterruptSource_headerError = IFX_HSCT_IRQ_HER_OFF,
IfxHssl_Hsct_InterruptSource_payloadError = IFX_HSCT_IRQ_PYER_OFF,
IfxHssl_Hsct_InterruptSource_commandError = IFX_HSCT_IRQ_CER_OFF,
IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend = IFX_HSCT_IRQ_IFCFS_OFF,
IfxHssl_Hsct_InterruptSource_speedModeSwitchError = IFX_HSCT_IRQ_SMER_OFF,
IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished = IFX_HSCT_IRQ_USMSF_OFF,
IfxHssl_Hsct_InterruptSource_pllLockLosterror = IFX_HSCT_IRQ_PLER_OFF,
IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived = IFX_HSCT_IRQ_USM_OFF,
IfxHssl_Hsct_InterruptSource_pingAnswerReceived = IFX_HSCT_IRQ_PAR_OFF,
IfxHssl_Hsct_InterruptSource_txTransferError = IFX_HSCT_IRQ_TXTE_OFF,
IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow = IFX_HSCT_IRQ_SFO_OFF,
IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow = IFX_HSCT_IRQ_SFU_OFF
}
HSCT interrupt source Definition in Ifx_HSCT.IRQ. More...
enum IfxHssl_Hsct_SleepMode {
IfxHssl_Hsct_SleepMode_enable = 0,
IfxHssl_Hsct_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSCT.CLC.B.EDIS. More...
enum IfxHssl_Hssl_SleepMode {
IfxHssl_Hssl_SleepMode_enable = 0,
IfxHssl_Hssl_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSSL.CLC.B.EDIS. More...
enum IfxHssl_InterfaceMode {
IfxHssl_InterfaceMode_master = 0,
IfxHssl_InterfaceMode_slave = 1
}
interface mode (master IF /slave IF) Definition in Ifx_HSCT.INIT.B.IFM More...
enum IfxHssl_MasterModeRxSpeed {
IfxHssl_MasterModeRxSpeed_lowSpeed = 0,
IfxHssl_MasterModeRxSpeed_mediumSpeed = 1,
IfxHssl_MasterModeRxSpeed_highSpeed = 2
}
master mode receive speed Definition in Ifx_HSCT.IFCTRL.B.MRXSPEED More...
enum IfxHssl_MasterModeTxSpeed {
IfxHssl_MasterModeTxSpeed_lowSpeed = 0,
IfxHssl_MasterModeTxSpeed_highSpeed = 2
}
master mode transmit speed Definition in Ifx_HSCT.IFCTRL.B.MTXSPEED More...
enum IfxHssl_PllReferenceClock {
IfxHssl_PllReferenceClock_hsctSystemClockInput = 0,
IfxHssl_PllReferenceClock_oscillatorInput = 1
}
PLL reference clock Definition in Ifx_HSCT.CONFIGPHY.B.OSCCLKEN. More...
enum IfxHssl_StreamingMode {
IfxHssl_StreamingMode_continuous = 0,
IfxHssl_StreamingMode_single = 1
}
streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR More...
enum IfxHssl_SuspendMode {
IfxHssl_SuspendMode_none = 0,
IfxHssl_SuspendMode_hard = 1,
IfxHssl_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxHssl_Hssl_ERRInterruptSource {
IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError = IFX_HSSL_MFLAGS_NACK_OFF,
IfxHssl_Hssl_ERRInterruptSource_transactionTagError = IFX_HSSL_MFLAGS_TTE_OFF,
IfxHssl_Hssl_ERRInterruptSource_timeoutError = IFX_HSSL_MFLAGS_TIMEOUT_OFF,
IfxHssl_Hssl_ERRInterruptSource_unexpectedError = IFX_HSSL_MFLAGS_UNEXPECTED_OFF
}
HSSL channel error interrupt source, which triggers the ERR interrupt Definition in Ifx_HSSL.MFLAGS. More...
enum IfxHssl_Hssl_EXIInterruptSource {
IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation = IFX_HSSL_MFLAGS_MAV_OFF,
IfxHssl_Hssl_EXIInterruptSource_busAccessError = IFX_HSSL_MFLAGS_SRIE_OFF,
IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError = IFX_HSSL_MFLAGS_PIE1_OFF,
IfxHssl_Hssl_EXIInterruptSource_dataLengthError = IFX_HSSL_MFLAGS_PIE2_OFF,
IfxHssl_Hssl_EXIInterruptSource_crcError = IFX_HSSL_MFLAGS_CRCE_OFF
}
HSSL global error interrupt source, which triggers the EXI interrupt Definition in Ifx_HSSL.MFLAGS. More...

Functions

IFX_INLINE void | IfxHssl_clearHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Clears the HSCT interrupt flag. More...
IFX_INLINE void | IfxHssl_disableHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag. More...
IFX_INLINE void | IfxHssl_enableHsctInterrupt (Ifx_HSCT *hsct, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSCT interrupt. More...
IFX_INLINE void | IfxHssl_enableHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag. More...
IFX_INLINE boolean | IfxHssl_getHsctInterruptFlagStatus (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Returns the HSCT interrupt flag status. More...
IFX_INLINE void | IfxHssl_setHsctSleepMode (Ifx_HSCT *hsct, IfxHssl_Hsct_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE uint32 | IfxHssl_getHsctUnsolicitedStatusMessage (Ifx_HSCT *hsct)
Get the last received unsolicited status message. More...
IFX_INLINE void | IfxHssl_sendHsctUnsolicitedStatusMessage (Ifx_HSCT *hsct, uint32 message)
Send the unsolicited status message. More...
IFX_INLINE void | IfxHssl_setHsctRxLinkSpeed (Ifx_HSCT *hsct, IfxHssl_MasterModeRxSpeed rxSpeed)
Set the HSCT RX link speed. More...
IFX_INLINE void | IfxHssl_setHsctTxLinkSpeed (Ifx_HSCT *hsct, IfxHssl_MasterModeTxSpeed txSpeed)
Set the HSCT TX link speed. More...
IFX_INLINE void | IfxHssl_enableHsctTransmitPath (Ifx_HSCT *hsct)
Enable hsct transmit path in master interface. More...
IFX_INLINE void | IfxHssl_enableHsctReceivePath (Ifx_HSCT *hsct)
Enable hsct receive path in master interface. More...
IFX_INLINE void | IfxHssl_disableHsctTransmitPath (Ifx_HSCT *hsct)
Disable hsct transmit path in master interface. More...
IFX_INLINE void | IfxHssl_disableHsctReceivePath (Ifx_HSCT *hsct)
Disable hsct receive path in master interface. More...
IFX_EXTERN void | IfxHssl_disableHsctModule (Ifx_HSCT *hsct)
Disables hsct module. More...
IFX_EXTERN void | IfxHssl_enableHsctModule (Ifx_HSCT *hsct)
Enables hsct module. More...
IFX_EXTERN Ifx_HSCT * | IfxHssl_getHsctAddress (IfxHssl_hsctIndex hsct)
IFX_EXTERN IfxHssl_hsctIndex | IfxHssl_getHsctIndex (Ifx_HSCT *hsct)
API to get the resource index of the HSCT specified. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsctSrcPointer (Ifx_HSCT *hsct)
Returns the SRC pointer for HSCT. More...
IFX_EXTERN void | IfxHssl_resetHsctKernel (Ifx_HSCT *hsct)
resets HSCT kernel More...
IFX_INLINE void | IfxHssl_clearHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag. More...
IFX_INLINE void | IfxHssl_clearHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag. More...
IFX_INLINE void | IfxHssl_clearInitialiseModeFlag (Ifx_HSSL *hssl)
Clears the Initialise Mode Flag status. More...
IFX_INLINE void | IfxHssl_disableHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt. More...
IFX_INLINE void | IfxHssl_disableHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Disables the HSSl channel error interrupt flag, which trggers the EXI interrupt. More...
IFX_INLINE void | IfxHssl_enableAllErrorFlags (Ifx_HSSL *hssl)
Enables all error flags. More...
IFX_INLINE void | IfxHssl_enableHsslCOKInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL COK interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt. More...
IFX_INLINE void | IfxHssl_enableHsslERRInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL ERR interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslEXIInterrupt (Ifx_HSSL *hssl, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL EXI interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Enables the HSSl global error interrupt flag, which trggers the EXI interrupt. More...
IFX_INLINE void | IfxHssl_enableHsslRDIInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL RDI interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslTRGInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL TRG interrupt of specified channel. More...
IFX_INLINE uint32 | IfxHssl_getAllMflagsStatus (Ifx_HSSL *hssl)
Returns the status of all MFLAGS status. More...
IFX_INLINE uint16 | IfxHssl_getCurrentCount (Ifx_HSSL *hssl)
Returns the Current Count value. More...
IFX_INLINE boolean | IfxHssl_getHsslChannelErrorInterruptFlagStatus (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag. More...
IFX_INLINE boolean | IfxHssl_getHsslGloabalErrorInterruptFlagStatus (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag. More...
IFX_INLINE boolean | IfxHssl_getInitialiseModeFlagStatus (Ifx_HSSL *hssl)
Returns the Initialise Mode Flag status. More...
IFX_INLINE uint16 | IfxHssl_getReloadCount (Ifx_HSSL *hssl)
Returns the Reload Count value. More...
IFX_INLINE boolean | IfxHssl_isModuleSuspended (Ifx_HSSL *hssl)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxHssl_setHsslSleepMode (Ifx_HSSL *hssl, IfxHssl_Hssl_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxHssl_setInitialiseModeFlag (Ifx_HSSL *hssl)
Sets the Initialise Mode Flag. More...
IFX_INLINE void | IfxHssl_setReloadCount (Ifx_HSSL *hssl, uint16 reloadValue)
Sets the reload Count. More...
IFX_INLINE void | IfxHssl_setSuspendMode (Ifx_HSSL *hssl, IfxHssl_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxHssl_setTimeoutReloadValue (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, uint8 timeoutValue)
Sets the Timeout Reload Value. More...
IFX_EXTERN void | IfxHssl_disableHsslModule (Ifx_HSSL *hssl)
DIsables the hssl module. More...
IFX_EXTERN void | IfxHssl_enableHsslModule (Ifx_HSSL *hssl)
Enables the hssl module. More...
IFX_EXTERN Ifx_HSSL * | IfxHssl_getHsslAddress (IfxHssl_hsslIndex hssl)
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslCOKSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslERRSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL ERR of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslEXISrcPointer (Ifx_HSSL *hssl)
Returns the SRC pointer for HSSL EXI interrupt. More...
IFX_EXTERN IfxHssl_hsslIndex | IfxHssl_getHsslIndex (Ifx_HSSL *hssl)
API to get the resource index of the HSSL specified. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslRDISrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslTRGSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL TRG of specified channel. More...
IFX_EXTERN void | IfxHssl_resetHsslKernel (Ifx_HSSL *hssl)
resets the HSSL kernel More...

Detailed Description

HSSL basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxHssl.h.

Enumeration Type Documentation

◆ IfxHssl_Hssl_ERRInterruptSource

enum IfxHssl_Hssl_ERRInterruptSource

HSSL channel error interrupt source, which triggers the ERR interrupt Definition in Ifx_HSSL.MFLAGS.

Enumerator
IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError | NACK error (triggers ERR interrupt)
IfxHssl_Hssl_ERRInterruptSource_transactionTagError | Transaction Tag Error (triggers ERR interrupt)
IfxHssl_Hssl_ERRInterruptSource_timeoutError | Timeout error (triggers ERR interrupt)
IfxHssl_Hssl_ERRInterruptSource_unexpectedError | Unexpected error (triggers ERR interrupt)

Definition at line 231 of file IfxHssl.h.

◆ IfxHssl_Hssl_EXIInterruptSource

enum IfxHssl_Hssl_EXIInterruptSource

HSSL global error interrupt source, which triggers the EXI interrupt Definition in Ifx_HSSL.MFLAGS.

Enumerator
IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation | Memory Access Violation error (triggers EXI interrupt)
IfxHssl_Hssl_EXIInterruptSource_busAccessError | SRI/SPB Bus Access Error (triggers EXI interrupt)
IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError | PHY Inconsistency Error 1 (Channel Number Code Error, triggers EXI interrupt)
IfxHssl_Hssl_EXIInterruptSource_dataLengthError | PHY Inconsistency Error 2 (Data Length Error, triggers EXI interrupt)
IfxHssl_Hssl_EXIInterruptSource_crcError | CRC error (triggers EXI interrupt)

Definition at line 242 of file IfxHssl.h.


iLLD_TC26B: I2C

Modules | Files
I2C
iLLD
Collaboration diagram for I2C:

Modules

Implementation
Standard Driver
I2C Pin Mapping
How to use the I2c driver?
I2C

Files

file | IfxI2c_cfg.h
I2C on-chip implementation data.
file | IfxI2c_PinMap.c
I2C I/O map.
file | IfxI2c_PinMap.h
I2C I/O map.
file | IfxI2c_I2c.h
I2C I2C details.
file | IfxI2c.h
I2C basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » I2C
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations | Variables
Enumerations
iLLD » I2C » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxI2c_Index {
IfxI2c_Index_none = -1,
IfxI2c_Index_0 = 0
}
List of the available I2c interfaces. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap [IFXI2C_NUM_MODULES]

Detailed Description

Enumeration Type Documentation

◆ IfxI2c_Index

enum IfxI2c_Index

List of the available I2c interfaces.

Enumerator
IfxI2c_Index_none | Not Selected.
IfxI2c_Index_0 | I2C Index 0.

Definition at line 77 of file IfxI2c_cfg.h.

Variable Documentation

◆ IfxI2c_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES]

Definition at line 91 of file IfxI2c_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » I2C
Collaboration diagram for Standard Driver:

Modules

Enumerations
Functions
Data Structures

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » I2C » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxI2c_BusStatus {
IfxI2c_BusStatus_idle = 0,
IfxI2c_BusStatus_started = 1,
IfxI2c_BusStatus_busyMaster = 2,
IfxI2c_BusStatus_remoteSlave = 3
}
enum IfxI2c_ErrorInterruptSource {
IfxI2c_ErrorInterruptSource_rxFifoUnderflow = IFX_I2C_ERRIRQSM_RXF_UFL_OFF,
IfxI2c_ErrorInterruptSource_rxFifoOverflow = IFX_I2C_ERRIRQSM_RXF_OFL_OFF,
IfxI2c_ErrorInterruptSource_txFifoUnderflow = IFX_I2C_ERRIRQSM_TXF_UFL_OFF,
IfxI2c_ErrorInterruptSource_txFifoOverflow = IFX_I2C_ERRIRQSM_TXF_OFL_OFF
}
enable error interrupt request source Definition in Ifx.I2C.ERRIRQSM.U More...
enum IfxI2c_PinSelect {
IfxI2c_PinSelect_a = 0,
IfxI2c_PinSelect_b = 1,
IfxI2c_PinSelect_c = 2,
IfxI2c_PinSelect_d = 3,
IfxI2c_PinSelect_e = 4,
IfxI2c_PinSelect_f = 5,
IfxI2c_PinSelect_g = 6,
IfxI2c_PinSelect_h = 7
}
enum IfxI2c_ProtocolInterruptSource {
IfxI2c_ProtocolInterruptSource_addressMatch = IFX_I2C_PIRQSM_AM_OFF,
IfxI2c_ProtocolInterruptSource_generalCall = IFX_I2C_PIRQSM_GC_OFF,
IfxI2c_ProtocolInterruptSource_masterCode = IFX_I2C_PIRQSM_MC_OFF,
IfxI2c_ProtocolInterruptSource_arbitrationLost = IFX_I2C_PIRQSM_AL_OFF,
IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived = IFX_I2C_PIRQSM_NACK_OFF,
IfxI2c_ProtocolInterruptSource_transmissionEnd = IFX_I2C_PIRQSM_TX_END_OFF,
IfxI2c_ProtocolInterruptSource_receiveMode = IFX_I2C_PIRQSM_RX_OFF
}
enable protocol interrupt source Definition in Ifx.I2C.PIRQSM.U More...
enum IfxI2c_SleepMode {
IfxI2c_SleepMode_enable = 0,
IfxI2c_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_I2C.CLC1.B.EDIS. More...

Detailed Description

Enumeration Type Documentation

◆ IfxI2c_BusStatus

enum IfxI2c_BusStatus
Enumerator
IfxI2c_BusStatus_idle | idle
IfxI2c_BusStatus_started | started
IfxI2c_BusStatus_busyMaster | busy Master
IfxI2c_BusStatus_remoteSlave | remote Slave

Definition at line 71 of file IfxI2c.h.

◆ IfxI2c_ErrorInterruptSource

enum IfxI2c_ErrorInterruptSource

enable error interrupt request source Definition in Ifx.I2C.ERRIRQSM.U

Enumerator
IfxI2c_ErrorInterruptSource_rxFifoUnderflow | receive fifo underflow service request
IfxI2c_ErrorInterruptSource_rxFifoOverflow | receive fifo overflow service request
IfxI2c_ErrorInterruptSource_txFifoUnderflow | transmit fifo underflow service request
IfxI2c_ErrorInterruptSource_txFifoOverflow | transmit fifo overflow service request

Definition at line 82 of file IfxI2c.h.

◆ IfxI2c_PinSelect

enum IfxI2c_PinSelect
Enumerator
IfxI2c_PinSelect_a
IfxI2c_PinSelect_b
IfxI2c_PinSelect_c
IfxI2c_PinSelect_d
IfxI2c_PinSelect_e
IfxI2c_PinSelect_f
IfxI2c_PinSelect_g
IfxI2c_PinSelect_h

Definition at line 90 of file IfxI2c.h.

◆ IfxI2c_ProtocolInterruptSource

enum IfxI2c_ProtocolInterruptSource

enable protocol interrupt source Definition in Ifx.I2C.PIRQSM.U

Enumerator
IfxI2c_ProtocolInterruptSource_addressMatch | address match service request
IfxI2c_ProtocolInterruptSource_generalCall | general call service request
IfxI2c_ProtocolInterruptSource_masterCode | master code service request
IfxI2c_ProtocolInterruptSource_arbitrationLost | arbitration lost service request
IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived | not acknowledge received service request
IfxI2c_ProtocolInterruptSource_transmissionEnd | transmission end service request
IfxI2c_ProtocolInterruptSource_receiveMode | receive mode service request

Definition at line 105 of file IfxI2c.h.

◆ IfxI2c_SleepMode

enum IfxI2c_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_I2C.CLC1.B.EDIS.

Enumerator
IfxI2c_SleepMode_enable | enables sleep mode
IfxI2c_SleepMode_disable | disables sleep mode

Definition at line 119 of file IfxI2c.h.


iLLD_TC26B: Functions

Functions
Functions
iLLD » I2C » Standard Driver
Collaboration diagram for Functions:

Functions

IFX_INLINE boolean | IfxI2c_busIsFree (Ifx_I2C *i2c)
Returns if the bus is free. More...
IFX_INLINE void | IfxI2c_clearAllDtrInterruptSources (Ifx_I2C *i2c)
clears all DTR interrupt sources More...
IFX_INLINE void | IfxI2c_clearAllErrorInterruptSources (Ifx_I2C *i2c)
clears all Error Interrupt sources More...
IFX_INLINE void | IfxI2c_clearAllProtocolInterruptSources (Ifx_I2C *i2c)
Clears all Protocol Interrupt sources. More...
IFX_INLINE void | IfxI2c_clearBurstRequestInterruptSource (Ifx_I2C *i2c)
clears burst request interrupt source More...
IFX_INLINE void | IfxI2c_clearErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
clears the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_clearLastBurstRequestInterruptSource (Ifx_I2C *i2c)
clears last burst request interrupt source More...
IFX_INLINE void | IfxI2c_clearLastSingleRequestInterruptSource (Ifx_I2C *i2c)
clears last single request interrupt source More...
IFX_INLINE void | IfxI2c_clearProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
clears the specified source of protocol interrupt More...
IFX_INLINE void | IfxI2c_clearSingleRequestInterruptSource (Ifx_I2C *i2c)
clears single request interrupt source More...
IFX_INLINE void | IfxI2c_disableBurstRequestInterruptSource (Ifx_I2C *i2c)
disables burst request interrupt source More...
IFX_INLINE void | IfxI2c_disableErrorInterruptFlag (Ifx_I2C *i2c)
disables the error interrupt flag More...
IFX_INLINE void | IfxI2c_disableErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
disables the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_disableLastBurstRequestInterruptSource (Ifx_I2C *i2c)
disables last burst request interrupt source More...
IFX_INLINE void | IfxI2c_disableLastSingleRequestInterruptSource (Ifx_I2C *i2c)
disables last single request interrupt source More...
IFX_INLINE void | IfxI2c_disableProtocolInterruptFlag (Ifx_I2C *i2c)
disables the Protocol interrupt flag More...
IFX_INLINE void | IfxI2c_disableProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
disables the specified source of protocol interrupt More...
IFX_INLINE void | IfxI2c_disableSingleRequestInterruptSource (Ifx_I2C *i2c)
disables single request interrupt source More...
IFX_INLINE void | IfxI2c_enableBurstRequestInterruptSource (Ifx_I2C *i2c)
enables burst request interrupt source More...
IFX_INLINE void | IfxI2c_enableErrorInterruptFlag (Ifx_I2C *i2c)
enables the error interrupt flag More...
IFX_INLINE void | IfxI2c_enableErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
enables the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_enableLastBurstRequestInterruptSource (Ifx_I2C *i2c)
enables last burst request interrupt source More...
IFX_INLINE void | IfxI2c_enableLastSingleRequestInterruptSource (Ifx_I2C *i2c)
enables last single request interrupt source More...
IFX_INLINE void | IfxI2c_enableProtocolInterruptFlag (Ifx_I2C *i2c)
enables the protocol interrupt flag More...
IFX_INLINE void | IfxI2c_enableProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
enables the specified source of protocol interrupt More...
IFX_INLINE void | IfxI2c_enableSingleRequestInterruptSource (Ifx_I2C *i2c)
enables single request interrupt source More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getBurstDataTransferSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C burst data transfer request interrupt. More...
IFX_INLINE boolean | IfxI2c_getBurstRequestInterruptSourceStatus (Ifx_I2C *i2c)
returns the status of burst request interrupt source status More...
IFX_INLINE IfxI2c_BusStatus | IfxI2c_getBusStatus (Ifx_I2C *i2c)
IFX_INLINE boolean | IfxI2c_getErrorInterruptFlagStatus (Ifx_I2C *i2c)
returns the current status of error interrupt flag More...
IFX_INLINE boolean | IfxI2c_getErrorInterruptSourceStatus (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
returns the status of the error interrupt source More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getErrorSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C Error interrupt. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getLastBurstDataTransferSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C last burst data transfer request interrupt. More...
IFX_INLINE boolean | IfxI2c_getLastBurstRequestInterruptSourceStatus (Ifx_I2C *i2c)
returns the status of last burst request interrupt source status More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getLastSingleDataTransferSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C last single data transfer request interrupt. More...
IFX_INLINE boolean | IfxI2c_getLastSingleRequestInterruptSourceStatus (Ifx_I2C *i2c)
returns the status of last single request interrupt source status More...
IFX_INLINE boolean | IfxI2c_getProtocolInterruptFlagStatus (Ifx_I2C *i2c)
returns the current raw status of protocol interrupt More...
IFX_INLINE boolean | IfxI2c_getProtocolInterruptSourceStatus (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
returns the status of specified protocol interrupt source More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getProtocolSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C Protocol interrupt. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getSingleDataTransferSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C single data transfer request interrupt. More...
IFX_INLINE boolean | IfxI2c_getSingleRequestInterruptSourceStatus (Ifx_I2C *i2c)
returns the status of single request interrupt source status More...
IFX_INLINE boolean | IfxI2c_isFifoRequest (Ifx_I2C *i2c)
Returns if the Fifo is requesting new data. More...
IFX_INLINE void | IfxI2c_run (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_setPinSelection (Ifx_I2C *i2c, IfxI2c_PinSelect pisel)
selects the pin More...
IFX_INLINE void | IfxI2c_setReceivePacketSize (Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be received. More...
IFX_INLINE void | IfxI2c_setSlaveDeviceAddress (Ifx_I2C *i2c, uint16 address)
IFX_INLINE void | IfxI2c_setSleepMode (Ifx_I2C *i2c, IfxI2c_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxI2c_setTransmitPacketSize (Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be tansmitted. More...
IFX_INLINE void | IfxI2c_stop (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_waitBusFree (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_writeFifo (Ifx_I2C *i2c, uint32 packet)
Writes a packet (4 bytes) into the Fifo. More...
IFX_EXTERN void | IfxI2c_configureAsMaster (Ifx_I2C *i2c)
Configures the Module as Master. More...
IFX_EXTERN void | IfxI2c_disableModule (Ifx_I2C *i2c)
Disables the I2c Module. More...
IFX_EXTERN void | IfxI2c_enableBurstDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Burst data transfer interrupt. More...
IFX_EXTERN void | IfxI2c_enableErrorInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Error interrupt. More...
IFX_EXTERN void | IfxI2c_enableLastBurstDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last burst data transfer interrupt More...
IFX_EXTERN void | IfxI2c_enableLastSingleDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last single data transfer interrupt More...
IFX_EXTERN void | IfxI2c_enableModule (Ifx_I2C *i2c)
Enables the I2c Module. More...
IFX_EXTERN void | IfxI2c_enableProtocolInterrupt (void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the protocol interrupt. More...
IFX_EXTERN void | IfxI2c_enableSingleDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the single data transfer interrupt More...
IFX_EXTERN Ifx_I2C * | IfxI2c_getAddress (IfxI2c_Index i2c)
IFX_EXTERN float32 | IfxI2c_getBaudrate (Ifx_I2C *i2c)
Returns the real Baudrate. More...
IFX_EXTERN IfxI2c_Index | IfxI2c_getIndex (Ifx_I2C *i2c)
API to get the resource index of the I2C specified. More...
IFX_EXTERN void | IfxI2c_initSclSdaPin (const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
IFX_EXTERN void | IfxI2c_releaseBus (Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus. More...
IFX_EXTERN void | IfxI2c_resetFifo (Ifx_I2C *i2c)
IFX_EXTERN void | IfxI2c_resetModule (Ifx_I2C *i2c)
resets the I2c kernel More...
IFX_EXTERN void | IfxI2c_setBaudrate (Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate. More...

Detailed Description

Function Documentation

◆ IfxI2c_busIsFree()

IFX_INLINE boolean IfxI2c_busIsFree ( Ifx_I2C * i2c )

Returns if the bus is free.

Definition at line 588 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_clearAllDtrInterruptSources()

IFX_INLINE void IfxI2c_clearAllDtrInterruptSources ( Ifx_I2C * i2c )

clears all DTR interrupt sources

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 601 of file IfxI2c.h.

◆ IfxI2c_clearAllErrorInterruptSources()

IFX_INLINE void IfxI2c_clearAllErrorInterruptSources ( Ifx_I2C * i2c )

clears all Error Interrupt sources

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 607 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_clearAllProtocolInterruptSources()

IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources ( Ifx_I2C * i2c )

Clears all Protocol Interrupt sources.

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 613 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_clearBurstRequestInterruptSource()

IFX_INLINE void IfxI2c_clearBurstRequestInterruptSource ( Ifx_I2C * i2c )

clears burst request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 619 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_clearErrorInterruptSource()

IFX_INLINE void IfxI2c_clearErrorInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ErrorInterruptSource | source
 | ) |  |

clears the specified source of error interrupt

Parameters
i2c | pointer to i2c registers
source | error interrupt source
Returns
None

Definition at line 625 of file IfxI2c.h.

◆ IfxI2c_clearLastBurstRequestInterruptSource()

IFX_INLINE void IfxI2c_clearLastBurstRequestInterruptSource ( Ifx_I2C * i2c )

clears last burst request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 631 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_clearLastSingleRequestInterruptSource()

IFX_INLINE void IfxI2c_clearLastSingleRequestInterruptSource ( Ifx_I2C * i2c )

clears last single request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 637 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_clearProtocolInterruptSource()

IFX_INLINE void IfxI2c_clearProtocolInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ProtocolInterruptSource | source
 | ) |  |

clears the specified source of protocol interrupt

Parameters
i2c | pointer to i2c registers
source | protocol interrupt source
Returns
None

Definition at line 643 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), IfxI2c_I2c_write(), and IfxI2c_releaseBus().

◆ IfxI2c_clearSingleRequestInterruptSource()

IFX_INLINE void IfxI2c_clearSingleRequestInterruptSource ( Ifx_I2C * i2c )

clears single request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 649 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_configureAsMaster()

IFX_EXTERN void IfxI2c_configureAsMaster ( Ifx_I2C * i2c )

Configures the Module as Master.

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 54 of file IfxI2c.c.

Referenced by IfxI2c_I2c_initModule().

◆ IfxI2c_disableBurstRequestInterruptSource()

IFX_INLINE void IfxI2c_disableBurstRequestInterruptSource ( Ifx_I2C * i2c )

disables burst request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 655 of file IfxI2c.h.

◆ IfxI2c_disableErrorInterruptFlag()

IFX_INLINE void IfxI2c_disableErrorInterruptFlag ( Ifx_I2C * i2c )

disables the error interrupt flag

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 661 of file IfxI2c.h.

◆ IfxI2c_disableErrorInterruptSource()

IFX_INLINE void IfxI2c_disableErrorInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ErrorInterruptSource | source
 | ) |  |

disables the specified source of error interrupt

Parameters
i2c | pointer to i2c registers
source | error interrupt source
Returns
None

Definition at line 667 of file IfxI2c.h.

◆ IfxI2c_disableLastBurstRequestInterruptSource()

IFX_INLINE void IfxI2c_disableLastBurstRequestInterruptSource ( Ifx_I2C * i2c )

disables last burst request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 673 of file IfxI2c.h.

◆ IfxI2c_disableLastSingleRequestInterruptSource()

IFX_INLINE void IfxI2c_disableLastSingleRequestInterruptSource ( Ifx_I2C * i2c )

disables last single request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 679 of file IfxI2c.h.

◆ IfxI2c_disableModule()

IFX_EXTERN void IfxI2c_disableModule ( Ifx_I2C * i2c )

Disables the I2c Module.

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 74 of file IfxI2c.c.

◆ IfxI2c_disableProtocolInterruptFlag()

IFX_INLINE void IfxI2c_disableProtocolInterruptFlag ( Ifx_I2C * i2c )

disables the Protocol interrupt flag

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 685 of file IfxI2c.h.

◆ IfxI2c_disableProtocolInterruptSource()

IFX_INLINE void IfxI2c_disableProtocolInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ProtocolInterruptSource | source
 | ) |  |

disables the specified source of protocol interrupt

Parameters
i2c | pointer to i2c registers
source | protocol interrupt source
Returns
None

Definition at line 691 of file IfxI2c.h.

◆ IfxI2c_disableSingleRequestInterruptSource()

IFX_INLINE void IfxI2c_disableSingleRequestInterruptSource ( Ifx_I2C * i2c )

disables single request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 697 of file IfxI2c.h.

◆ IfxI2c_enableBurstDataTransferInterrupt()

IFX_EXTERN void IfxI2c_enableBurstDataTransferInterrupt | ( | Ifx_I2C * | i2c,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables the Burst data transfer interrupt.

Parameters
i2c | pointer to i2c registers
typeOfService | Type of Service (Cpu or DMA)
priority | priority of the interrupt
Returns
None

Definition at line 89 of file IfxI2c.c.

◆ IfxI2c_enableBurstRequestInterruptSource()

IFX_INLINE void IfxI2c_enableBurstRequestInterruptSource ( Ifx_I2C * i2c )

enables burst request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 703 of file IfxI2c.h.

◆ IfxI2c_enableErrorInterrupt()

IFX_EXTERN void IfxI2c_enableErrorInterrupt | ( | Ifx_I2C * | i2c,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables the Error interrupt.

Parameters
i2c | pointer to i2c registers
typeOfService | Type of Service (Cpu or DMA)
priority | priority of the interrupt
Returns
None

Definition at line 98 of file IfxI2c.c.

◆ IfxI2c_enableErrorInterruptFlag()

IFX_INLINE void IfxI2c_enableErrorInterruptFlag ( Ifx_I2C * i2c )

enables the error interrupt flag

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 709 of file IfxI2c.h.

◆ IfxI2c_enableErrorInterruptSource()

IFX_INLINE void IfxI2c_enableErrorInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ErrorInterruptSource | source
 | ) |  |

enables the specified source of error interrupt

Parameters
i2c | pointer to i2c registers
source | error interrupt source
Returns
None

Definition at line 715 of file IfxI2c.h.

◆ IfxI2c_enableLastBurstDataTransferInterrupt()

IFX_EXTERN void IfxI2c_enableLastBurstDataTransferInterrupt | ( | Ifx_I2C * | i2c,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

enables the last burst data transfer interrupt

Parameters
i2c | pointer to i2c registers
typeOfService | Type of Service (Cpu or DMA)
priority | priority of the interrupt
Returns
None

Definition at line 107 of file IfxI2c.c.

◆ IfxI2c_enableLastBurstRequestInterruptSource()

IFX_INLINE void IfxI2c_enableLastBurstRequestInterruptSource ( Ifx_I2C * i2c )

enables last burst request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 721 of file IfxI2c.h.

◆ IfxI2c_enableLastSingleDataTransferInterrupt()

IFX_EXTERN void IfxI2c_enableLastSingleDataTransferInterrupt | ( | Ifx_I2C * | i2c,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

enables the last single data transfer interrupt

Parameters
i2c | pointer to i2c registers
typeOfService | Type of Service (Cpu or DMA)
priority | priority of the interrupt
Returns
None

Definition at line 116 of file IfxI2c.c.

◆ IfxI2c_enableLastSingleRequestInterruptSource()

IFX_INLINE void IfxI2c_enableLastSingleRequestInterruptSource ( Ifx_I2C * i2c )

enables last single request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 727 of file IfxI2c.h.

◆ IfxI2c_enableModule()

IFX_EXTERN void IfxI2c_enableModule ( Ifx_I2C * i2c )

Enables the I2c Module.

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 125 of file IfxI2c.c.

Referenced by IfxI2c_I2c_initModule().

◆ IfxI2c_enableProtocolInterrupt()

IFX_EXTERN void IfxI2c_enableProtocolInterrupt | ( | void * | i2c,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables the protocol interrupt.

Parameters
i2c | pointer to i2c registers
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 154 of file IfxI2c.c.

◆ IfxI2c_enableProtocolInterruptFlag()

IFX_INLINE void IfxI2c_enableProtocolInterruptFlag ( Ifx_I2C * i2c )

enables the protocol interrupt flag

Parameters
i2c pointer to I2C registers
Returns
None

Definition at line 733 of file IfxI2c.h.

◆ IfxI2c_enableProtocolInterruptSource()

IFX_INLINE void IfxI2c_enableProtocolInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ProtocolInterruptSource | source
 | ) |  |

enables the specified source of protocol interrupt

Parameters
i2c | pointer to I2C registers
source | protocol interrupt source
Returns
None

Definition at line 739 of file IfxI2c.h.

◆ IfxI2c_enableSingleDataTransferInterrupt()

IFX_EXTERN void IfxI2c_enableSingleDataTransferInterrupt | ( | Ifx_I2C * | i2c,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

enables the single data transfer interrupt

Parameters
i2c | pointer to i2c registers
typeOfService | Type of Service (Cpu or DMA)
priority | priority of the interrupt
Returns
None

Definition at line 163 of file IfxI2c.c.

◆ IfxI2c_enableSingleRequestInterruptSource()

IFX_INLINE void IfxI2c_enableSingleRequestInterruptSource ( Ifx_I2C * i2c )

enables single request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 745 of file IfxI2c.h.

◆ IfxI2c_getAddress()

IFX_EXTERN Ifx_I2C* IfxI2c_getAddress ( IfxI2c_Index i2c )
Parameters
i2c Resource index of the I2c
Returns
I2C module register address

Definition at line 172 of file IfxI2c.c.

◆ IfxI2c_getBaudrate()

IFX_EXTERN float32 IfxI2c_getBaudrate ( Ifx_I2C * i2c )

Returns the real Baudrate.

Returns
Baudrate

Definition at line 189 of file IfxI2c.c.

Referenced by IfxI2c_I2c_initModule().

◆ IfxI2c_getBurstDataTransferSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getBurstDataTransferSrcPointer ( Ifx_I2C * i2c )

Returns the SRC pointer for I2C burst data transfer request interrupt.

Parameters
i2c pointer to i2c registers
Returns
SRC pointer for I2C burst data transfer Service interrupt

Definition at line 751 of file IfxI2c.h.

Referenced by IfxI2c_enableBurstDataTransferInterrupt().

◆ IfxI2c_getBurstRequestInterruptSourceStatus()

IFX_INLINE boolean IfxI2c_getBurstRequestInterruptSourceStatus ( Ifx_I2C * i2c )

returns the status of burst request interrupt source status

Parameters
i2c pointer to i2c registers
Returns
status

Definition at line 764 of file IfxI2c.h.

◆ IfxI2c_getBusStatus()

IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus ( Ifx_I2C * i2c )
Parameters
i2c pointer to i2c registers
Returns
BusStatus

Definition at line 770 of file IfxI2c.h.

Referenced by IfxI2c_I2c_initModule(), IfxI2c_I2c_read(), IfxI2c_I2c_write(), and IfxI2c_waitBusFree().

◆ IfxI2c_getErrorInterruptFlagStatus()

IFX_INLINE boolean IfxI2c_getErrorInterruptFlagStatus ( Ifx_I2C * i2c )

returns the current status of error interrupt flag

Parameters
i2c pointer to i2c registers
Returns
status

Definition at line 776 of file IfxI2c.h.

◆ IfxI2c_getErrorInterruptSourceStatus()

IFX_INLINE boolean IfxI2c_getErrorInterruptSourceStatus | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ErrorInterruptSource | source
 | ) |  |

returns the status of the error interrupt source

Parameters
i2c | pointer to i2c registers
source | error interrupt source
Returns
status

Definition at line 782 of file IfxI2c.h.

◆ IfxI2c_getErrorSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getErrorSrcPointer ( Ifx_I2C * i2c )

Returns the SRC pointer for I2C Error interrupt.

Parameters
i2c pointer to i2c registers
Returns
SRC pointer for I2C Error Service interrupt

Definition at line 788 of file IfxI2c.h.

Referenced by IfxI2c_enableErrorInterrupt().

◆ IfxI2c_getIndex()

IFX_EXTERN IfxI2c_Index IfxI2c_getIndex ( Ifx_I2C * i2c )

API to get the resource index of the I2C specified.

Parameters
i2c Pointer to the I2C HW module (register memory map)
Returns
Resource index of the I2C

Definition at line 200 of file IfxI2c.c.

◆ IfxI2c_getLastBurstDataTransferSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getLastBurstDataTransferSrcPointer ( Ifx_I2C * i2c )

Returns the SRC pointer for I2C last burst data transfer request interrupt.

Parameters
i2c pointer to i2c registers
Returns
SRC pointer for I2C last burst data transfer Service interrupt

Definition at line 801 of file IfxI2c.h.

Referenced by IfxI2c_enableLastBurstDataTransferInterrupt().

◆ IfxI2c_getLastBurstRequestInterruptSourceStatus()

IFX_INLINE boolean IfxI2c_getLastBurstRequestInterruptSourceStatus ( Ifx_I2C * i2c )

returns the status of last burst request interrupt source status

Parameters
i2c pointer to i2c registers
Returns
status

Definition at line 814 of file IfxI2c.h.

◆ IfxI2c_getLastSingleDataTransferSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getLastSingleDataTransferSrcPointer ( Ifx_I2C * i2c )

Returns the SRC pointer for I2C last single data transfer request interrupt.

Parameters
i2c pointer to i2c registers
Returns
SRC pointer for I2C last single data transfer Service interrupt

Definition at line 820 of file IfxI2c.h.

Referenced by IfxI2c_enableLastSingleDataTransferInterrupt().

◆ IfxI2c_getLastSingleRequestInterruptSourceStatus()

IFX_INLINE boolean IfxI2c_getLastSingleRequestInterruptSourceStatus ( Ifx_I2C * i2c )

returns the status of last single request interrupt source status

Parameters
i2c pointer to i2c registers
Returns
status

Definition at line 833 of file IfxI2c.h.

◆ IfxI2c_getProtocolInterruptFlagStatus()

IFX_INLINE boolean IfxI2c_getProtocolInterruptFlagStatus ( Ifx_I2C * i2c )

returns the current raw status of protocol interrupt

Parameters
i2c pointer to i2c registers
Returns
status

Definition at line 839 of file IfxI2c.h.

◆ IfxI2c_getProtocolInterruptSourceStatus()

IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ProtocolInterruptSource | source
 | ) |  |

returns the status of specified protocol interrupt source

Parameters
i2c | pointer to i2c registers
source | protocol interrupt source
Returns
status

Definition at line 845 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), IfxI2c_I2c_write(), and IfxI2c_releaseBus().

◆ IfxI2c_getProtocolSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getProtocolSrcPointer ( Ifx_I2C * i2c )

Returns the SRC pointer for I2C Protocol interrupt.

Parameters
i2c pointer to i2c registers
Returns
SRC pointer for I2C Protocol Service interrupt

Definition at line 851 of file IfxI2c.h.

Referenced by IfxI2c_enableProtocolInterrupt().

◆ IfxI2c_getSingleDataTransferSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getSingleDataTransferSrcPointer ( Ifx_I2C * i2c )

Returns the SRC pointer for I2C single data transfer request interrupt.

Parameters
i2c pointer to i2c registers
Returns
SRC pointer for I2C single data transfer Service interrupt

Definition at line 864 of file IfxI2c.h.

Referenced by IfxI2c_enableSingleDataTransferInterrupt().

◆ IfxI2c_getSingleRequestInterruptSourceStatus()

IFX_INLINE boolean IfxI2c_getSingleRequestInterruptSourceStatus ( Ifx_I2C * i2c )

returns the status of single request interrupt source status

Parameters
i2c pointer to i2c registers
Returns
status

Definition at line 877 of file IfxI2c.h.

◆ IfxI2c_initSclSdaPin()

IFX_EXTERN void IfxI2c_initSclSdaPin | ( | const IfxI2c_Scl_InOut * | scl,
 |  | const IfxI2c_Sda_InOut * | sda,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |
Returns
None

Definition at line 220 of file IfxI2c.c.

Referenced by IfxI2c_I2c_initModule().

◆ IfxI2c_isFifoRequest()

IFX_INLINE boolean IfxI2c_isFifoRequest ( Ifx_I2C * i2c )

Returns if the Fifo is requesting new data.

Definition at line 883 of file IfxI2c.h.

◆ IfxI2c_releaseBus()

IFX_EXTERN void IfxI2c_releaseBus ( Ifx_I2C * i2c )

Releases the bus, i.e puts a stop condition on the bus.

Returns
None

Definition at line 231 of file IfxI2c.c.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_resetFifo()

IFX_EXTERN void IfxI2c_resetFifo ( Ifx_I2C * i2c )
Returns
None

Definition at line 247 of file IfxI2c.c.

◆ IfxI2c_resetModule()

IFX_EXTERN void IfxI2c_resetModule ( Ifx_I2C * i2c )

resets the I2c kernel

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 260 of file IfxI2c.c.

◆ IfxI2c_run()

IFX_INLINE void IfxI2c_run ( Ifx_I2C * i2c )
Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 889 of file IfxI2c.h.

Referenced by IfxI2c_I2c_initModule().

◆ IfxI2c_setBaudrate()

IFX_EXTERN void IfxI2c_setBaudrate | ( | Ifx_I2C * | i2c,
 |  | float32 | baudrate
 | ) |  |

Calculates the desired baudrate.

Parameters
i2c | pointer to i2c registers
baudrate | specifies the baud rate
Returns
None

Definition at line 279 of file IfxI2c.c.

Referenced by IfxI2c_I2c_initModule().

◆ IfxI2c_setPinSelection()

IFX_INLINE void IfxI2c_setPinSelection | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_PinSelect | pisel
 | ) |  |

selects the pin

Parameters
i2c | pointer to i2c registers
pisel | pin to be select
Returns
None

Definition at line 895 of file IfxI2c.h.

Referenced by IfxI2c_initSclSdaPin().

◆ IfxI2c_setReceivePacketSize()

IFX_INLINE void IfxI2c_setReceivePacketSize | ( | Ifx_I2C * | i2c,
 |  | Ifx_SizeT | size
 | ) |  |

Sets the number of bytes to be received.

Parameters
i2c | pointer to i2c registers
size | number of packets
Returns
None

Definition at line 901 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read().

◆ IfxI2c_setSlaveDeviceAddress()

IFX_INLINE void IfxI2c_setSlaveDeviceAddress | ( | Ifx_I2C * | i2c,
 |  | uint16 | address
 | ) |  |
Parameters
i2c | pointer to i2c registers
address | device address
Returns
None

Definition at line 907 of file IfxI2c.h.

◆ IfxI2c_setSleepMode()

IFX_INLINE void IfxI2c_setSleepMode | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
i2c | pointer to i2c registers
mode | mode selection (enable / disable)
Returns
None

Definition at line 913 of file IfxI2c.h.

◆ IfxI2c_setTransmitPacketSize()

IFX_INLINE void IfxI2c_setTransmitPacketSize | ( | Ifx_I2C * | i2c,
 |  | Ifx_SizeT | size
 | ) |  |

Sets the number of bytes to be tansmitted.

Parameters
i2c | pointer to i2c registers
size | number of packets
Returns
None

Definition at line 919 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_stop()

IFX_INLINE void IfxI2c_stop ( Ifx_I2C * i2c )
Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 925 of file IfxI2c.h.

Referenced by IfxI2c_configureAsMaster(), and IfxI2c_I2c_initModule().

◆ IfxI2c_waitBusFree()

IFX_INLINE void IfxI2c_waitBusFree ( Ifx_I2C * i2c )
Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 931 of file IfxI2c.h.

◆ IfxI2c_writeFifo()

IFX_INLINE void IfxI2c_writeFifo | ( | Ifx_I2C * | i2c,
 |  | uint32 | packet
 | ) |  |

Writes a packet (4 bytes) into the Fifo.

Parameters
i2c | pointer to i2c registers
packet | specifies the byte to be transfer
Returns
None

Definition at line 938 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » I2C » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct IfxI2c_Pins
Pin Structure. More...

Detailed Description

Data Structure Documentation

◆ IfxI2c_Pins

struct IfxI2c_Pins

Pin Structure.

Definition at line 135 of file IfxI2c.h.

Collaboration diagram for IfxI2c_Pins:
[legend]
Data Fields
IfxPort_PadDriver | padDriver
IfxI2c_Scl_InOut * | scl
IfxI2c_Sda_InOut * | sda


iLLD_TC26B: I2C Pin Mapping

Data Structures | Macros | Variables
I2C Pin Mapping
iLLD » I2C
Collaboration diagram for I2C Pin Mapping:

Data Structures

struct | IfxI2c_Scl_InOut
SCL input mapping structure. More...
struct | IfxI2c_Sda_InOut
SDA input mapping structure. More...

Macros

#define | IFXI2C_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS 3
#define | IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT
I2C0_SCL: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT
I2C0_SCL: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT
I2C0_SCL: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT
I2C0_SDA: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT
I2C0_SDA: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT
I2C0_SDA: I2C0 output and input. More...
IFX_EXTERN const IfxI2c_Scl_InOut * | IfxI2c_Scl_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
IfxI2c_Scl_InOut table. More...
IFX_EXTERN const IfxI2c_Sda_InOut * | IfxI2c_Sda_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]
IfxI2c_Sda_InOut table. More...

Detailed Description

Data Structure Documentation

◆ IfxI2c_Scl_InOut

struct IfxI2c_Scl_InOut

SCL input mapping structure.

Definition at line 56 of file IfxI2c_PinMap.h.

Collaboration diagram for IfxI2c_Scl_InOut:
[legend]
Data Fields
Ifx_RxSel | inSelect | Input multiplexer value.
Ifx_I2C * | module | Base address.
IfxPort_OutputIdx | outSelect | Port control code.
IfxPort_Pin | pin | Port pin.

◆ IfxI2c_Sda_InOut

struct IfxI2c_Sda_InOut

SDA input mapping structure.

Definition at line 65 of file IfxI2c_PinMap.h.

Collaboration diagram for IfxI2c_Sda_InOut:
[legend]
Data Fields
Ifx_RxSel | inSelect | Input multiplexer value.
Ifx_I2C * | module | Base address.
IfxPort_OutputIdx | outSelect | Port control code.
IfxPort_Pin | pin | Port pin.

Macro Definition Documentation

◆ IFXI2C_PINMAP_NUM_MODULES

#define IFXI2C_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 81 of file IfxI2c_PinMap.h.

◆ IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS

#define IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS 3

Definition at line 82 of file IfxI2c_PinMap.h.

◆ IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS

#define IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS 3

Definition at line 83 of file IfxI2c_PinMap.h.

Variable Documentation

◆ IfxI2c0_SCL_P02_5_INOUT

IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT

I2C0_SCL: I2C0 output and input.

Definition at line 73 of file IfxI2c_PinMap.h.

◆ IfxI2c0_SCL_P13_1_INOUT

IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT

I2C0_SCL: I2C0 output and input.

Definition at line 74 of file IfxI2c_PinMap.h.

◆ IfxI2c0_SCL_P15_4_INOUT

IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT

I2C0_SCL: I2C0 output and input.

Definition at line 75 of file IfxI2c_PinMap.h.

◆ IfxI2c0_SDA_P02_4_INOUT

IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT

I2C0_SDA: I2C0 output and input.

Definition at line 76 of file IfxI2c_PinMap.h.

◆ IfxI2c0_SDA_P13_2_INOUT

IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT

I2C0_SDA: I2C0 output and input.

Definition at line 77 of file IfxI2c_PinMap.h.

◆ IfxI2c0_SDA_P15_5_INOUT

IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT

I2C0_SDA: I2C0 output and input.

Definition at line 78 of file IfxI2c_PinMap.h.

◆ IfxI2c_Scl_InOut_pinTable

IFX_EXTERN const IfxI2c_Scl_InOut* IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]

IfxI2c_Scl_InOut table.

Definition at line 87 of file IfxI2c_PinMap.h.

◆ IfxI2c_Sda_InOut_pinTable

IFX_EXTERN const IfxI2c_Sda_InOut* IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]

IfxI2c_Sda_InOut table.

Definition at line 90 of file IfxI2c_PinMap.h.


iLLD_TC26B: How to use the I2c driver?

How to use the I2c driver?
iLLD » I2C
Collaboration diagram for How to use the I2c driver?:

The I2c driver provides a default configuration for 8bit wide data transfers in Master mode.

NOTE: Interrupts are disabled during data transfers as long as the driver operates on the I2C hardware FIFO, except for reading 32 bytes or less. This is due to limitations of the I2c Module.

NOTE : Send Slave address as 8-bit by left shifting it by 1.E.g incase of EEPROM,slave address is 7 bit represented as 0x50, after left shifting it by 1, it will be 0xa0

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation Preparation

Include Files

Include following header file into your C code:

#include <I2c/I2c/IfxI2c_I2c.h>

Variables

Declare the I2c handle, the I2c device handle and the data buffer in your C code:

// used globally
static IfxI2c_I2c i2c; // i2c handle
static IfxI2c_I2c_Device i2cDev; // slave device handle
uint8 data[128]; // data buffer

Module Initialisation

// create config structure
IfxI2c_I2c_Config config;
// fill structure with default values and Module address
IfxI2c_I2c_initConfig(&config, &MODULE_I2C0);
// configure pins
const IfxI2c_Pins pins = {
&IfxI2c0_SCL_P02_5_INOUT,
&IfxI2c0_SDA_P02_4_INOUT,
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
config.pins = &pins;
config.baudrate = 400000; // 400 kHz
// initialize module
IfxI2c_I2c_initModule(&i2c, &config);

Device Initialisation

Here the i2c device handle is initialized.

// create device config
IfxI2c_I2c_deviceConfig i2cDeviceConfig;
// fill structure with default values and i2c Handler
IfxI2c_I2c_initDeviceConfig(&i2cDeviceConfig, &i2c);
// set device specifig values.
i2cDeviceConfig.deviceAddress = 0xa0; // 8 bit device address
// initialize the i2c device handle
IfxI2c_I2c_initDevice(&i2cDev, &i2cDeviceConfig);

Data Transfers

Example for an i2c EEPROM.

Write

uint16 addr = 0x0000;
// setup the device's internal address
data[0] = addr >> 8; // High byte
data[1] = (uint8)addr; // Low byte
// setup data to be written
data[2] = 0x01;
data[3] = 0x02;
data[4] = 0x03;
uint8 size = 5; // 5 bytes to transmit to i2cDev (data and internal address)
// write data to device as soon as it is ready
while(IfxI2c_I2c_write(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);

Read

Ifx_SizeT size;
uint16 addr = 0x0000;
// setup internal address to be read from
data[0] = addr >> 8; // High byte
data[1] = (uint8)addr; // Low byte
size = 2;
while(IfxI2c_I2c_write(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);
size = 8; // 8 bytes to read
// read device data to data array
while(IfxI2c_I2c_read(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);

Acknowledge Polling

It is also possible to poll explicitly for NAK.

By using write operations:

// size = 0;
while(IfxI2c_I2c_write(&i2cDev, data, 0) == IfxI2c_I2c_Status_nak)); // where data is just a dummy pointer

By using read operations:

// size = 0;
while(IfxI2c_I2c_read(&i2cDev, data, 0) == IfxI2c_I2c_Status_nak)); // where data is just a dummy pointer

Interrupts usage

Interrupts can be enabled from the application by using the APIs provided in the driver, there are APIs available in the driver to enable, disable, clear and read the status of interrupt falgs, along with these,
APIs to enable the the interrupts are also available.

here is an example of how to use the interrupts in I2C driver.

Using I2C interrupts

I2C burst data transfer interrupt

After initilaising I2C device Device Initialisation

choose the burst data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing burst data transfer
interrupt source, enable burst data transfer service request or interrupt with the desired type of service and priority

//enable burst data transfer interrupt source
Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
IfxI2c_enableBurstRequestInterruptSource(i2c);
// enable the burst data transfer interrupt
IfxI2c_enableBurstDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);

I2C last burst data transfer interrupt

After initilaising I2C device Device Initialisation

choose the last burst data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing last burst data transfer
interrupt source, enable burst data transfer service request or interrupt with the desired type of service and priority

//enable last burst data transfer interrupt source
Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
IfxI2c_enableLastBurstRequestInterruptSource(i2c);
// enable the last burst data transfer interrupt
IfxI2c_enableLastBurstDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);

I2C single data transfer interrupt

After initilaising I2C device Device Initialisation

choose the single data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing single data transfer
interrupt source, enable single data transfer service request or interrupt with the desired type of service and priority

//enable burst data transfer interrupt source
Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
IfxI2c_enableSingleRequestInterruptSource(i2c);
// enable the burst data transfer interrupt
IfxI2c_enableSingleDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);

I2C last single data transfer interrupt

After initilaising I2C device Device Initialisation

choose the last single data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing last single data transfer
interrupt source, enable last single data transfer service request or interrupt with the desired type of service and priority

//enable burst data transfer interrupt source
Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
IfxI2c_enableLastSingleRequestInterruptSource(i2c);
// enable the burst data transfer interrupt
IfxI2c_enableLastSingleDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);

I2C error interrupt (ERR)

After initilaising I2C device Device Initialisation

choose the error interrupt sources needed to be enabled for I2C module and call the following functions once for each error interrupt source by choosing the right
error interrupt source as parameter,and after choosing all the error interrupt sources, enable the I2C error interrupt flag and then enable I2C error service request or interrupt with desired type of service and priority

//enable error interrupt sources
Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
IfxI2c_enableErrorInterruptSource(i2c, IfxI2c_ErrorInterruptSource_rxFifoUnderflow);
IfxI2c_enableErrorInterruptSource(i2c, IfxI2c_ErrorInterruptSource_txFifoOverflow);
// enable the error interrupt flag
IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c);
// enable the error interrupt
IfxI2c_enableErrorInterrupt(i2c, IfxSrc_Tos_cpu0, 8);

I2C protocol interrupt (PROTOCOL)

After initilaising I2C device Device Initialisation

choose the protocol interrupt sources needed to be enabled for I2C module and call the following functions once for each protocol interrupt source by choosing the
right protocol interrupt source as parameter,and after choosing all the protocol interrupt sources, enable the I2C protocol interrupt flag and then enable
I2C protocol service request or interrupt with desired type of service and priority

//enable protocol interrupt sources
Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
IfxI2c_enableProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_addressMatch);
IfxI2c_enableProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_arbitrationLost);
// enable the protocol interrupt flag
IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c);
// enable the protocol interrupt
IfxI2c_enableProtocolInterrupt(i2c, IfxSrc_Tos_cpu0, 8);

you can define the ISR of your own and service the interrupt, please refer to more general usage of interrupts How to define Interrupts?

some additional APIs to clear, disable interrupt flags and get flag status are also available.


iLLD_TC26B: I2C

Modules
I2C
iLLD » I2C
Collaboration diagram for I2C:

Modules

Module Functions
Enumerations
Data Structures

Detailed Description


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » I2C » I2C
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxI2c_I2c_initConfig (IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxI2c_I2c_initDevice (IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
Initializes the device Handler. More...
IFX_EXTERN void | IfxI2c_I2c_initDeviceConfig (IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
Fills the config structure of the slave device with default values. More...
IFX_EXTERN void | IfxI2c_I2c_initModule (IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
Initializes the Module. More...
IFX_EXTERN IfxI2c_I2c_Status | IfxI2c_I2c_read (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
reads the I2c device More...
IFX_EXTERN IfxI2c_I2c_Status | IfxI2c_I2c_write (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
writes to the I2c device More...

Detailed Description

Function Documentation

◆ IfxI2c_I2c_initConfig()

IFX_EXTERN void IfxI2c_I2c_initConfig | ( | IfxI2c_I2c_Config * | config,
 |  | Ifx_I2C * | i2c
 | ) |  |

Fills the config structure with default values.

Parameters
config | Structure to configure the Module
i2c | Module address
Returns
None

Definition at line 54 of file IfxI2c_I2c.c.

Referenced by IfxCif_Cam_initCamera().

◆ IfxI2c_I2c_initDevice()

IFX_EXTERN void IfxI2c_I2c_initDevice | ( | IfxI2c_I2c_Device * | i2cDevice,
 |  | const IfxI2c_I2c_deviceConfig * | i2cDeviceConfig
 | ) |  |

Initializes the device Handler.

Parameters
i2cDevice | I2c device Handler
i2cDeviceConfig | Structure to configure the device's data structure
Returns
None

A coding example can be found in How to use the I2c driver?

Definition at line 62 of file IfxI2c_I2c.c.

Referenced by IfxCif_Cam_initCamera().

◆ IfxI2c_I2c_initDeviceConfig()

IFX_EXTERN void IfxI2c_I2c_initDeviceConfig | ( | IfxI2c_I2c_deviceConfig * | i2cDeviceConfig,
 |  | IfxI2c_I2c * | i2c
 | ) |  |

Fills the config structure of the slave device with default values.

Parameters
i2cDeviceConfig | Structure to configure the device's data structure
i2c | Handler
Returns
None

Definition at line 69 of file IfxI2c_I2c.c.

Referenced by IfxCif_Cam_initCamera().

◆ IfxI2c_I2c_initModule()

IFX_EXTERN void IfxI2c_I2c_initModule | ( | IfxI2c_I2c * | i2c,
 |  | const IfxI2c_I2c_Config * | config
 | ) |  |

Initializes the Module.

Parameters
i2c | Handler
config | Configuration structure
Returns
None

A coding example can be found in How to use the I2c driver?

Definition at line 76 of file IfxI2c_I2c.c.

Referenced by IfxCif_Cam_initCamera().

◆ IfxI2c_I2c_read()

IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_read | ( | IfxI2c_I2c_Device * | i2cDevice,
 |  | volatile uint8 * | data,
 |  | Ifx_SizeT | size
 | ) |  |

reads the I2c device

A coding example can be found in How to use the I2c driver?

Definition at line 98 of file IfxI2c_I2c.c.

◆ IfxI2c_I2c_write()

IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_write | ( | IfxI2c_I2c_Device * | i2cDevice,
 |  | volatile uint8 * | data,
 |  | Ifx_SizeT | size
 | ) |  |

writes to the I2c device

A coding example can be found in How to use the I2c driver?

Definition at line 342 of file IfxI2c_I2c.c.

Referenced by IfxCif_Cam_initCamera().


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » I2C » I2C
Collaboration diagram for Enumerations:

Enumerations

enum IfxI2c_I2c_Status {
IfxI2c_I2c_Status_ok = 0,
IfxI2c_I2c_Status_nak = 1,
IfxI2c_I2c_Status_al = 2,
IfxI2c_I2c_Status_busNotFree = 3,
IfxI2c_I2c_Status_error = 4
}

Detailed Description

Enumeration Type Documentation

◆ IfxI2c_I2c_Status

enum IfxI2c_I2c_Status
Enumerator
IfxI2c_I2c_Status_ok | ok
IfxI2c_I2c_Status_nak | NAK.
IfxI2c_I2c_Status_al | Arbitration Lost.
IfxI2c_I2c_Status_busNotFree | bus is not free
IfxI2c_I2c_Status_error | error

Definition at line 317 of file IfxI2c_I2c.h.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » I2C » I2C
Collaboration diagram for Data Structures:

Data Structures

struct | IfxI2c_I2c
Handler. More...
struct | IfxI2c_I2c_Config
Structure to configure the Module. More...
struct | IfxI2c_I2c_Device
Structure with slave device data. More...
struct | IfxI2c_I2c_deviceConfig
Structure to configure the device's data structure. More...

Detailed Description

Data Structure Documentation

◆ IfxI2c_I2c

struct IfxI2c_I2c

Handler.

Definition at line 336 of file IfxI2c_I2c.h.

Data Fields
float32 | baudrate | Baudrate.
IfxI2c_BusStatus | busStatus | Status of the bus.
Ifx_I2C * | i2c | Module Pointer.
IfxI2c_I2c_Status | status | Status of the last bus operation.

◆ IfxI2c_I2c_Config

struct IfxI2c_I2c_Config

Structure to configure the Module.

Definition at line 346 of file IfxI2c_I2c.h.

Collaboration diagram for IfxI2c_I2c_Config:
[legend]
Data Fields
float32 | baudrate | Baudrate.
Ifx_I2C * | i2c | Module Pointer.
IFX_CONST IfxI2c_Pins * | pins | Pins.

◆ IfxI2c_I2c_Device

struct IfxI2c_I2c_Device

Structure with slave device data.

Definition at line 355 of file IfxI2c_I2c.h.

Collaboration diagram for IfxI2c_I2c_Device:
[legend]
Data Fields
uint8 | deviceAddress |
IfxI2c_I2c * | i2c | Module Pionter.

◆ IfxI2c_I2c_deviceConfig

struct IfxI2c_I2c_deviceConfig

Structure to configure the device's data structure.

Definition at line 363 of file IfxI2c_I2c.h.

Collaboration diagram for IfxI2c_I2c_deviceConfig:
[legend]
Data Fields
uint8 | deviceAddress | the slave device's address
IfxI2c_I2c * | i2c | Module Pointer.


iLLD_TC26B: IfxI2c_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxI2c_cfg.h File Reference
iLLD » I2C

I2C on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxI2c_reg.h"
Include dependency graph for IfxI2c_cfg.h:

Go to the source code of this file.

Macros

#define IFXI2C_NUM_MODULES (1)

Enumerations

enum IfxI2c_Index {
IfxI2c_Index_none = -1,
IfxI2c_Index_0 = 0
}
List of the available I2c interfaces. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap [IFXI2C_NUM_MODULES]

Detailed Description

I2C on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxI2c_cfg.h.

Macro Definition Documentation

◆ IFXI2C_NUM_MODULES

#define IFXI2C_NUM_MODULES (1)

Definition at line 67 of file IfxI2c_cfg.h.

Referenced by IfxI2c_getAddress(), and IfxI2c_getIndex().


iLLD_TC26B: IfxI2c_PinMap.c File Reference

  • _PinMap
Variables
IfxI2c_PinMap.c File Reference
iLLD » I2C

I2C I/O map. More...

#include "IfxI2c_PinMap.h"
Include dependency graph for IfxI2c_PinMap.c:

Go to the source code of this file.

Variables

IfxI2c_Scl_InOut | IfxI2c0_SCL_P02_5_INOUT = {&MODULE_I2C0, {&MODULE_P02, 5}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5}
IfxI2c_Scl_InOut | IfxI2c0_SCL_P13_1_INOUT = {&MODULE_I2C0, {&MODULE_P13, 1}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}
IfxI2c_Scl_InOut | IfxI2c0_SCL_P15_4_INOUT = {&MODULE_I2C0, {&MODULE_P15, 4}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6}
IfxI2c_Sda_InOut | IfxI2c0_SDA_P02_4_INOUT = {&MODULE_I2C0, {&MODULE_P02, 4}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5}
IfxI2c_Sda_InOut | IfxI2c0_SDA_P13_2_INOUT = {&MODULE_I2C0, {&MODULE_P13, 2}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}
IfxI2c_Sda_InOut | IfxI2c0_SDA_P15_5_INOUT = {&MODULE_I2C0, {&MODULE_P15, 5}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6}
const IfxI2c_Scl_InOut * | IfxI2c_Scl_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
const IfxI2c_Sda_InOut * | IfxI2c_Sda_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]

Detailed Description

I2C I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxI2c_PinMap.c.

Variable Documentation

◆ IfxI2c0_SCL_P02_5_INOUT

IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT = {&MODULE_I2C0, {&MODULE_P02, 5}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5}

Definition at line 45 of file IfxI2c_PinMap.c.

◆ IfxI2c0_SCL_P13_1_INOUT

IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT = {&MODULE_I2C0, {&MODULE_P13, 1}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}

Definition at line 46 of file IfxI2c_PinMap.c.

◆ IfxI2c0_SCL_P15_4_INOUT

IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT = {&MODULE_I2C0, {&MODULE_P15, 4}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6}

Definition at line 47 of file IfxI2c_PinMap.c.

Referenced by IfxCif_Cam_initCamera().

◆ IfxI2c0_SDA_P02_4_INOUT

IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT = {&MODULE_I2C0, {&MODULE_P02, 4}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5}

Definition at line 48 of file IfxI2c_PinMap.c.

◆ IfxI2c0_SDA_P13_2_INOUT

IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT = {&MODULE_I2C0, {&MODULE_P13, 2}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}

Definition at line 49 of file IfxI2c_PinMap.c.

◆ IfxI2c0_SDA_P15_5_INOUT

IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT = {&MODULE_I2C0, {&MODULE_P15, 5}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6}

Definition at line 50 of file IfxI2c_PinMap.c.

Referenced by IfxCif_Cam_initCamera().

◆ IfxI2c_Scl_InOut_pinTable

const IfxI2c_Scl_InOut* IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
Initial value:
= {
{
&IfxI2c0_SCL_P02_5_INOUT,
&IfxI2c0_SCL_P13_1_INOUT,
&IfxI2c0_SCL_P15_4_INOUT
}
}
IfxI2c0_SCL_P13_1_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT
Definition: IfxI2c_PinMap.c:46
IfxI2c0_SCL_P02_5_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT
Definition: IfxI2c_PinMap.c:45
IfxI2c0_SCL_P15_4_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT
Definition: IfxI2c_PinMap.c:47

Definition at line 53 of file IfxI2c_PinMap.c.

◆ IfxI2c_Sda_InOut_pinTable

const IfxI2c_Sda_InOut* IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]
Initial value:
= {
{
&IfxI2c0_SDA_P02_4_INOUT,
&IfxI2c0_SDA_P13_2_INOUT,
&IfxI2c0_SDA_P15_5_INOUT
}
}
IfxI2c0_SDA_P15_5_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT
Definition: IfxI2c_PinMap.c:50
IfxI2c0_SDA_P13_2_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT
Definition: IfxI2c_PinMap.c:49
IfxI2c0_SDA_P02_4_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT
Definition: IfxI2c_PinMap.c:48

Definition at line 61 of file IfxI2c_PinMap.c.


iLLD_TC26B: IfxI2c_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxI2c_PinMap.h File Reference
iLLD » I2C

I2C I/O map. More...

#include <IfxI2c_reg.h>
#include <_Impl/IfxI2c_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxI2c_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxI2c_Scl_InOut
SCL input mapping structure. More...
struct | IfxI2c_Sda_InOut
SDA input mapping structure. More...

Macros

#define | IFXI2C_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS 3
#define | IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT
I2C0_SCL: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT
I2C0_SCL: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT
I2C0_SCL: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT
I2C0_SDA: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT
I2C0_SDA: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT
I2C0_SDA: I2C0 output and input. More...
IFX_EXTERN const IfxI2c_Scl_InOut * | IfxI2c_Scl_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
IfxI2c_Scl_InOut table. More...
IFX_EXTERN const IfxI2c_Sda_InOut * | IfxI2c_Sda_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]
IfxI2c_Sda_InOut table. More...

Detailed Description

I2C I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxI2c_PinMap.h.


iLLD_TC26B: IfxI2c_I2c.h File Reference

  • I2c
  • I2c
Data Structures | Enumerations | Functions
IfxI2c_I2c.h File Reference
iLLD » I2C

I2C I2C details. More...

#include "I2c/Std/IfxI2c.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxI2c_I2c.h:

Go to the source code of this file.

Data Structures

struct | IfxI2c_I2c
Handler. More...
struct | IfxI2c_I2c_Config
Structure to configure the Module. More...
struct | IfxI2c_I2c_Device
Structure with slave device data. More...
struct | IfxI2c_I2c_deviceConfig
Structure to configure the device's data structure. More...

Enumerations

enum IfxI2c_I2c_Status {
IfxI2c_I2c_Status_ok = 0,
IfxI2c_I2c_Status_nak = 1,
IfxI2c_I2c_Status_al = 2,
IfxI2c_I2c_Status_busNotFree = 3,
IfxI2c_I2c_Status_error = 4
}

Functions

IFX_EXTERN void | IfxI2c_I2c_initConfig (IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxI2c_I2c_initDevice (IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
Initializes the device Handler. More...
IFX_EXTERN void | IfxI2c_I2c_initDeviceConfig (IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
Fills the config structure of the slave device with default values. More...
IFX_EXTERN void | IfxI2c_I2c_initModule (IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
Initializes the Module. More...
IFX_EXTERN IfxI2c_I2c_Status | IfxI2c_I2c_read (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
reads the I2c device More...
IFX_EXTERN IfxI2c_I2c_Status | IfxI2c_I2c_write (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
writes to the I2c device More...

Detailed Description

I2C I2C details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxI2c_I2c.h.


iLLD_TC26B: IfxI2c.h File Reference

  • I2c
  • Std
Data Structures | Enumerations | Functions
IfxI2c.h File Reference
iLLD » I2C

I2C basic functionality. More...

#include "_Impl/IfxI2c_cfg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
#include "IfxI2c_bf.h"
#include "_PinMap/IfxI2c_PinMap.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxI2c.h:

Go to the source code of this file.

Data Structures

struct IfxI2c_Pins
Pin Structure. More...

Enumerations

enum IfxI2c_BusStatus {
IfxI2c_BusStatus_idle = 0,
IfxI2c_BusStatus_started = 1,
IfxI2c_BusStatus_busyMaster = 2,
IfxI2c_BusStatus_remoteSlave = 3
}
enum IfxI2c_ErrorInterruptSource {
IfxI2c_ErrorInterruptSource_rxFifoUnderflow = IFX_I2C_ERRIRQSM_RXF_UFL_OFF,
IfxI2c_ErrorInterruptSource_rxFifoOverflow = IFX_I2C_ERRIRQSM_RXF_OFL_OFF,
IfxI2c_ErrorInterruptSource_txFifoUnderflow = IFX_I2C_ERRIRQSM_TXF_UFL_OFF,
IfxI2c_ErrorInterruptSource_txFifoOverflow = IFX_I2C_ERRIRQSM_TXF_OFL_OFF
}
enable error interrupt request source Definition in Ifx.I2C.ERRIRQSM.U More...
enum IfxI2c_PinSelect {
IfxI2c_PinSelect_a = 0,
IfxI2c_PinSelect_b = 1,
IfxI2c_PinSelect_c = 2,
IfxI2c_PinSelect_d = 3,
IfxI2c_PinSelect_e = 4,
IfxI2c_PinSelect_f = 5,
IfxI2c_PinSelect_g = 6,
IfxI2c_PinSelect_h = 7
}
enum IfxI2c_ProtocolInterruptSource {
IfxI2c_ProtocolInterruptSource_addressMatch = IFX_I2C_PIRQSM_AM_OFF,
IfxI2c_ProtocolInterruptSource_generalCall = IFX_I2C_PIRQSM_GC_OFF,
IfxI2c_ProtocolInterruptSource_masterCode = IFX_I2C_PIRQSM_MC_OFF,
IfxI2c_ProtocolInterruptSource_arbitrationLost = IFX_I2C_PIRQSM_AL_OFF,
IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived = IFX_I2C_PIRQSM_NACK_OFF,
IfxI2c_ProtocolInterruptSource_transmissionEnd = IFX_I2C_PIRQSM_TX_END_OFF,
IfxI2c_ProtocolInterruptSource_receiveMode = IFX_I2C_PIRQSM_RX_OFF
}
enable protocol interrupt source Definition in Ifx.I2C.PIRQSM.U More...
enum IfxI2c_SleepMode {
IfxI2c_SleepMode_enable = 0,
IfxI2c_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_I2C.CLC1.B.EDIS. More...

Functions

IFX_INLINE boolean | IfxI2c_busIsFree (Ifx_I2C *i2c)
Returns if the bus is free. More...
IFX_INLINE void | IfxI2c_clearAllDtrInterruptSources (Ifx_I2C *i2c)
clears all DTR interrupt sources More...
IFX_INLINE void | IfxI2c_clearAllErrorInterruptSources (Ifx_I2C *i2c)
clears all Error Interrupt sources More...
IFX_INLINE void | IfxI2c_clearAllProtocolInterruptSources (Ifx_I2C *i2c)
Clears all Protocol Interrupt sources. More...
IFX_INLINE void | IfxI2c_clearBurstRequestInterruptSource (Ifx_I2C *i2c)
clears burst request interrupt source More...
IFX_INLINE void | IfxI2c_clearErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
clears the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_clearLastBurstRequestInterruptSource (Ifx_I2C *i2c)
clears last burst request interrupt source More...
IFX_INLINE void | IfxI2c_clearLastSingleRequestInterruptSource (Ifx_I2C *i2c)
clears last single request interrupt source More...
IFX_INLINE void | IfxI2c_clearProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
clears the specified source of protocol interrupt More...
IFX_INLINE void | IfxI2c_clearSingleRequestInterruptSource (Ifx_I2C *i2c)
clears single request interrupt source More...
IFX_INLINE void | IfxI2c_disableBurstRequestInterruptSource (Ifx_I2C *i2c)
disables burst request interrupt source More...
IFX_INLINE void | IfxI2c_disableErrorInterruptFlag (Ifx_I2C *i2c)
disables the error interrupt flag More...
IFX_INLINE void | IfxI2c_disableErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
disables the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_disableLastBurstRequestInterruptSource (Ifx_I2C *i2c)
disables last burst request interrupt source More...
IFX_INLINE void | IfxI2c_disableLastSingleRequestInterruptSource (Ifx_I2C *i2c)
disables last single request interrupt source More...
IFX_INLINE void | IfxI2c_disableProtocolInterruptFlag (Ifx_I2C *i2c)
disables the Protocol interrupt flag More...
IFX_INLINE void | IfxI2c_disableProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
disables the specified source of protocol interrupt More...
IFX_INLINE void | IfxI2c_disableSingleRequestInterruptSource (Ifx_I2C *i2c)
disables single request interrupt source More...
IFX_INLINE void | IfxI2c_enableBurstRequestInterruptSource (Ifx_I2C *i2c)
enables burst request interrupt source More...
IFX_INLINE void | IfxI2c_enableErrorInterruptFlag (Ifx_I2C *i2c)
enables the error interrupt flag More...
IFX_INLINE void | IfxI2c_enableErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
enables the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_enableLastBurstRequestInterruptSource (Ifx_I2C *i2c)
enables last burst request interrupt source More...
IFX_INLINE void | IfxI2c_enableLastSingleRequestInterruptSource (Ifx_I2C *i2c)
enables last single request interrupt source More...
IFX_INLINE void | IfxI2c_enableProtocolInterruptFlag (Ifx_I2C *i2c)
enables the protocol interrupt flag More...
IFX_INLINE void | IfxI2c_enableProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
enables the specified source of protocol interrupt More...
IFX_INLINE void | IfxI2c_enableSingleRequestInterruptSource (Ifx_I2C *i2c)
enables single request interrupt source More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getBurstDataTransferSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C burst data transfer request interrupt. More...
IFX_INLINE boolean | IfxI2c_getBurstRequestInterruptSourceStatus (Ifx_I2C *i2c)
returns the status of burst request interrupt source status More...
IFX_INLINE IfxI2c_BusStatus | IfxI2c_getBusStatus (Ifx_I2C *i2c)
IFX_INLINE boolean | IfxI2c_getErrorInterruptFlagStatus (Ifx_I2C *i2c)
returns the current status of error interrupt flag More...
IFX_INLINE boolean | IfxI2c_getErrorInterruptSourceStatus (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
returns the status of the error interrupt source More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getErrorSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C Error interrupt. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getLastBurstDataTransferSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C last burst data transfer request interrupt. More...
IFX_INLINE boolean | IfxI2c_getLastBurstRequestInterruptSourceStatus (Ifx_I2C *i2c)
returns the status of last burst request interrupt source status More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getLastSingleDataTransferSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C last single data transfer request interrupt. More...
IFX_INLINE boolean | IfxI2c_getLastSingleRequestInterruptSourceStatus (Ifx_I2C *i2c)
returns the status of last single request interrupt source status More...
IFX_INLINE boolean | IfxI2c_getProtocolInterruptFlagStatus (Ifx_I2C *i2c)
returns the current raw status of protocol interrupt More...
IFX_INLINE boolean | IfxI2c_getProtocolInterruptSourceStatus (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
returns the status of specified protocol interrupt source More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getProtocolSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C Protocol interrupt. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getSingleDataTransferSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C single data transfer request interrupt. More...
IFX_INLINE boolean | IfxI2c_getSingleRequestInterruptSourceStatus (Ifx_I2C *i2c)
returns the status of single request interrupt source status More...
IFX_INLINE boolean | IfxI2c_isFifoRequest (Ifx_I2C *i2c)
Returns if the Fifo is requesting new data. More...
IFX_INLINE void | IfxI2c_run (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_setPinSelection (Ifx_I2C *i2c, IfxI2c_PinSelect pisel)
selects the pin More...
IFX_INLINE void | IfxI2c_setReceivePacketSize (Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be received. More...
IFX_INLINE void | IfxI2c_setSlaveDeviceAddress (Ifx_I2C *i2c, uint16 address)
IFX_INLINE void | IfxI2c_setSleepMode (Ifx_I2C *i2c, IfxI2c_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxI2c_setTransmitPacketSize (Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be tansmitted. More...
IFX_INLINE void | IfxI2c_stop (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_waitBusFree (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_writeFifo (Ifx_I2C *i2c, uint32 packet)
Writes a packet (4 bytes) into the Fifo. More...
IFX_EXTERN void | IfxI2c_configureAsMaster (Ifx_I2C *i2c)
Configures the Module as Master. More...
IFX_EXTERN void | IfxI2c_disableModule (Ifx_I2C *i2c)
Disables the I2c Module. More...
IFX_EXTERN void | IfxI2c_enableBurstDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Burst data transfer interrupt. More...
IFX_EXTERN void | IfxI2c_enableErrorInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Error interrupt. More...
IFX_EXTERN void | IfxI2c_enableLastBurstDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last burst data transfer interrupt More...
IFX_EXTERN void | IfxI2c_enableLastSingleDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last single data transfer interrupt More...
IFX_EXTERN void | IfxI2c_enableModule (Ifx_I2C *i2c)
Enables the I2c Module. More...
IFX_EXTERN void | IfxI2c_enableProtocolInterrupt (void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the protocol interrupt. More...
IFX_EXTERN void | IfxI2c_enableSingleDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the single data transfer interrupt More...
IFX_EXTERN Ifx_I2C * | IfxI2c_getAddress (IfxI2c_Index i2c)
IFX_EXTERN float32 | IfxI2c_getBaudrate (Ifx_I2C *i2c)
Returns the real Baudrate. More...
IFX_EXTERN IfxI2c_Index | IfxI2c_getIndex (Ifx_I2C *i2c)
API to get the resource index of the I2C specified. More...
IFX_EXTERN void | IfxI2c_initSclSdaPin (const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
IFX_EXTERN void | IfxI2c_releaseBus (Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus. More...
IFX_EXTERN void | IfxI2c_resetFifo (Ifx_I2C *i2c)
IFX_EXTERN void | IfxI2c_resetModule (Ifx_I2C *i2c)
resets the I2c kernel More...
IFX_EXTERN void | IfxI2c_setBaudrate (Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate. More...

Detailed Description

I2C basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxI2c.h.


iLLD_TC26B: IOM

Modules | Files
IOM
iLLD
Collaboration diagram for IOM:

Modules

Implementation
Standard Driver
IOM Driver

Files

file | IfxIom_cfg.h
IOM on-chip implementation data.
file | IfxIom_Driver.h
IOM DRIVER details.
file | IfxIom.h
IOM basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » IOM
Collaboration diagram for Implementation:

Modules

Enum input signals
Enumeration inputs

Detailed Description


iLLD_TC26B: Enum input signals

Enumerations
Enum input signals
iLLD » IOM » Implementation
Collaboration diagram for Enum input signals:

Enumerations

enum IfxIom_MonInputSignal {
IfxIom_MonInputSignal_p = 0,
IfxIom_MonInputSignal_0 = 1,
IfxIom_MonInputSignal_1 = 2,
IfxIom_MonInputSignal_2 = 3
}
IOM_FPCCTRk.ISM. More...
enum IfxIom_RefInputSignal {
IfxIom_RefInputSignal_p = 0,
IfxIom_RefInputSignal_0 = 1,
IfxIom_RefInputSignal_1 = 2,
IfxIom_RefInputSignal_2 = 3,
IfxIom_RefInputSignal_xorCombiner = 4
}
IOM_FPCCTRk.ISR. More...

Detailed Description

Enumeration Type Documentation

◆ IfxIom_MonInputSignal

enum IfxIom_MonInputSignal

IOM_FPCCTRk.ISM.

Enumerator
IfxIom_MonInputSignal_p | Signal input Pn_IN (from portlogic) selected.
IfxIom_MonInputSignal_0 | Monitor Signal Input 0 selected.
IfxIom_MonInputSignal_1 | Monitor Signal Input 1 selected.
IfxIom_MonInputSignal_2 | Monitor Signal Input 2 selected.

Definition at line 76 of file IfxIom_cfg.h.

◆ IfxIom_RefInputSignal

enum IfxIom_RefInputSignal

IOM_FPCCTRk.ISR.

Enumerator
IfxIom_RefInputSignal_p | Signal input Pn_IN (from portlogic) selected.
IfxIom_RefInputSignal_0 | Monitor Signal Input 0 selected.
IfxIom_RefInputSignal_1 | Monitor Signal Input 1 selected.
IfxIom_RefInputSignal_2 | Monitor Signal Input 2 selected.
IfxIom_RefInputSignal_xorCombiner | GTM XOR Combiner selected.

Definition at line 86 of file IfxIom_cfg.h.


iLLD_TC26B: Enumeration inputs

Enumerations
Enumeration inputs
iLLD » IOM » Implementation
Collaboration diagram for Enumeration inputs:

Enumerations

enum IfxIom_MonInput {
IfxIom_MonInput_p33_0 = (IfxIom_MonInputSignal_p << 8) | 0x0,
IfxIom_MonInput_p33_1 = (IfxIom_MonInputSignal_p << 8) | 0x1,
IfxIom_MonInput_p33_2 = (IfxIom_MonInputSignal_p << 8) | 0x2,
IfxIom_MonInput_p33_3 = (IfxIom_MonInputSignal_p << 8) | 0x3,
IfxIom_MonInput_p33_4 = (IfxIom_MonInputSignal_p << 8) | 0x4,
IfxIom_MonInput_p33_5 = (IfxIom_MonInputSignal_p << 8) | 0x5,
IfxIom_MonInput_p33_6 = (IfxIom_MonInputSignal_p << 8) | 0x6,
IfxIom_MonInput_p33_7 = (IfxIom_MonInputSignal_p << 8) | 0x7,
IfxIom_MonInput_p33_8 = (IfxIom_MonInputSignal_p << 8) | 0x8,
IfxIom_MonInput_p33_9 = (IfxIom_MonInputSignal_p << 8) | 0x9,
IfxIom_MonInput_p33_10 = (IfxIom_MonInputSignal_p << 8) | 0xa,
IfxIom_MonInput_p33_11 = (IfxIom_MonInputSignal_p << 8) | 0xb,
IfxIom_MonInput_p33_12 = (IfxIom_MonInputSignal_p << 8) | 0xc,
IfxIom_MonInput_p20_12 = (IfxIom_MonInputSignal_p << 8) | 0xd,
IfxIom_MonInput_p20_13 = (IfxIom_MonInputSignal_p << 8) | 0xe,
IfxIom_MonInput_p20_14 = (IfxIom_MonInputSignal_p << 8) | 0xf,
IfxIom_MonInput_gtmTout22 = (IfxIom_MonInputSignal_0 << 8) | 0x0,
IfxIom_MonInput_gtmTout23 = (IfxIom_MonInputSignal_0 << 8) | 0x1,
IfxIom_MonInput_gtmTout24 = (IfxIom_MonInputSignal_0 << 8) | 0x2,
IfxIom_MonInput_gtmTout25 = (IfxIom_MonInputSignal_0 << 8) | 0x3,
IfxIom_MonInput_gtmTout26 = (IfxIom_MonInputSignal_0 << 8) | 0x4,
IfxIom_MonInput_gtmTout27 = (IfxIom_MonInputSignal_0 << 8) | 0x5,
IfxIom_MonInput_gtmTout28 = (IfxIom_MonInputSignal_0 << 8) | 0x6,
IfxIom_MonInput_gtmTout29 = (IfxIom_MonInputSignal_0 << 8) | 0x7,
IfxIom_MonInput_gtmTout30 = (IfxIom_MonInputSignal_0 << 8) | 0x8,
IfxIom_MonInput_gtmTout31 = (IfxIom_MonInputSignal_0 << 8) | 0x9,
IfxIom_MonInput_gtmTout32 = (IfxIom_MonInputSignal_0 << 8) | 0xa,
IfxIom_MonInput_gtmTout33 = (IfxIom_MonInputSignal_0 << 8) | 0xb,
IfxIom_MonInput_gtmTout34 = (IfxIom_MonInputSignal_0 << 8) | 0xc,
IfxIom_MonInput_gtmTout68 = (IfxIom_MonInputSignal_0 << 8) | 0xd,
IfxIom_MonInput_gtmTout69 = (IfxIom_MonInputSignal_0 << 8) | 0xe,
IfxIom_MonInput_gtmTout70 = (IfxIom_MonInputSignal_0 << 8) | 0xf,
IfxIom_MonInput_ccu60Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0x0,
IfxIom_MonInput_ccu60Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x1,
IfxIom_MonInput_ccu60Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x2,
IfxIom_MonInput_ccu60Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0x3,
IfxIom_MonInput_ccu60Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0x4,
IfxIom_MonInput_ccu60Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0x5,
IfxIom_MonInput_ccu60Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x6,
IfxIom_MonInput_ccu61Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x7,
IfxIom_MonInput_ccu61Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x8,
IfxIom_MonInput_ccu61Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x9,
IfxIom_MonInput_ccu61Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0xa,
IfxIom_MonInput_ccu61Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0xb,
IfxIom_MonInput_ccu61Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0xc,
IfxIom_MonInput_ccu61Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0xd,
IfxIom_MonInput_psi5Psitx0 = (IfxIom_MonInputSignal_1 << 8) | 0xe,
IfxIom_MonInput_psi5Psitx1 = (IfxIom_MonInputSignal_1 << 8) | 0xf,
IfxIom_MonInput_qspi0Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x0,
IfxIom_MonInput_qspi1Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x1,
IfxIom_MonInput_qspi2Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x2,
IfxIom_MonInput_qspi3Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x3,
IfxIom_MonInput_gnd = (IfxIom_MonInputSignal_2 << 8) | 0x4,
IfxIom_MonInput_canNode0Txd = (IfxIom_MonInputSignal_2 << 8) | 0x5,
IfxIom_MonInput_canNode1Txd = (IfxIom_MonInputSignal_2 << 8) | 0x6,
IfxIom_MonInput_canNode2Txd = (IfxIom_MonInputSignal_2 << 8) | 0x7,
IfxIom_MonInput_canNode3Txd = (IfxIom_MonInputSignal_2 << 8) | 0x8,
IfxIom_MonInput_gtmTout104 = (IfxIom_MonInputSignal_2 << 8) | 0x9,
IfxIom_MonInput_gtmTout105 = (IfxIom_MonInputSignal_2 << 8) | 0xa,
IfxIom_MonInput_gtmTout106 = (IfxIom_MonInputSignal_2 << 8) | 0xb,
IfxIom_MonInput_asclin0Atx = (IfxIom_MonInputSignal_2 << 8) | 0xc,
IfxIom_MonInput_asclin1Atx = (IfxIom_MonInputSignal_2 << 8) | 0xd,
IfxIom_MonInput_asclin2Atx = (IfxIom_MonInputSignal_2 << 8) | 0xe,
IfxIom_MonInput_asclin3Atx = (IfxIom_MonInputSignal_2 << 8) | 0xf
}
LAM mon inputs. More...
enum IfxIom_RefInput {
IfxIom_RefInput_p33_0 = (IfxIom_RefInputSignal_p << 8) | 0x0,
IfxIom_RefInput_p33_1 = (IfxIom_RefInputSignal_p << 8) | 0x1,
IfxIom_RefInput_p33_2 = (IfxIom_RefInputSignal_p << 8) | 0x2,
IfxIom_RefInput_p33_3 = (IfxIom_RefInputSignal_p << 8) | 0x3,
IfxIom_RefInput_p33_4 = (IfxIom_RefInputSignal_p << 8) | 0x4,
IfxIom_RefInput_p33_5 = (IfxIom_RefInputSignal_p << 8) | 0x5,
IfxIom_RefInput_p33_6 = (IfxIom_RefInputSignal_p << 8) | 0x6,
IfxIom_RefInput_p33_7 = (IfxIom_RefInputSignal_p << 8) | 0x7,
IfxIom_RefInput_p33_8 = (IfxIom_RefInputSignal_p << 8) | 0x8,
IfxIom_RefInput_p33_9 = (IfxIom_RefInputSignal_p << 8) | 0x9,
IfxIom_RefInput_p33_10 = (IfxIom_RefInputSignal_p << 8) | 0xa,
IfxIom_RefInput_p33_11 = (IfxIom_RefInputSignal_p << 8) | 0xb,
IfxIom_RefInput_p33_12 = (IfxIom_RefInputSignal_p << 8) | 0xc,
IfxIom_RefInput_p20_12 = (IfxIom_RefInputSignal_p << 8) | 0xd,
IfxIom_RefInput_p20_13 = (IfxIom_RefInputSignal_p << 8) | 0xe,
IfxIom_RefInput_p20_14 = (IfxIom_RefInputSignal_p << 8) | 0xf,
IfxIom_RefInput_gtmTout0 = (IfxIom_RefInputSignal_0 << 8) | 0x0,
IfxIom_RefInput_gtmTout1 = (IfxIom_RefInputSignal_0 << 8) | 0x1,
IfxIom_RefInput_gtmTout2 = (IfxIom_RefInputSignal_0 << 8) | 0x2,
IfxIom_RefInput_gtmTout3 = (IfxIom_RefInputSignal_0 << 8) | 0x3,
IfxIom_RefInput_gtmTout4 = (IfxIom_RefInputSignal_0 << 8) | 0x4,
IfxIom_RefInput_gtmTout5 = (IfxIom_RefInputSignal_0 << 8) | 0x5,
IfxIom_RefInput_gtmTout6 = (IfxIom_RefInputSignal_0 << 8) | 0x6,
IfxIom_RefInput_gtmTout7 = (IfxIom_RefInputSignal_0 << 8) | 0x7,
IfxIom_RefInput_gtmTout8 = (IfxIom_RefInputSignal_0 << 8) | 0x8,
IfxIom_RefInput_gtmTout9 = (IfxIom_RefInputSignal_0 << 8) | 0x9,
IfxIom_RefInput_gtmTout10 = (IfxIom_RefInputSignal_0 << 8) | 0xa,
IfxIom_RefInput_gtmTout11 = (IfxIom_RefInputSignal_0 << 8) | 0xb,
IfxIom_RefInput_gtmTout12 = (IfxIom_RefInputSignal_0 << 8) | 0xc,
IfxIom_RefInput_gtmTout13 = (IfxIom_RefInputSignal_0 << 8) | 0xd,
IfxIom_RefInput_gtmTout14 = (IfxIom_RefInputSignal_0 << 8) | 0xe,
IfxIom_RefInput_gtmTout15 = (IfxIom_RefInputSignal_0 << 8) | 0xf,
IfxIom_RefInput_ccu60Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x0,
IfxIom_RefInput_ccu60Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x1,
IfxIom_RefInput_ccu60Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x2,
IfxIom_RefInput_ccu60Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0x3,
IfxIom_RefInput_ccu60Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0x4,
IfxIom_RefInput_ccu60Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0x5,
IfxIom_RefInput_ccu60Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0x6,
IfxIom_RefInput_ccu61Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x7,
IfxIom_RefInput_ccu61Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x8,
IfxIom_RefInput_ccu61Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x9,
IfxIom_RefInput_ccu61Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0xa,
IfxIom_RefInput_ccu61Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0xb,
IfxIom_RefInput_ccu61Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0xc,
IfxIom_RefInput_ccu61Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0xd,
IfxIom_RefInput_psi5Psitx0 = (IfxIom_RefInputSignal_1 << 8) | 0xe,
IfxIom_RefInput_psi5Psitx2 = (IfxIom_RefInputSignal_1 << 8) | 0xf,
IfxIom_RefInput_qspi0Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x0,
IfxIom_RefInput_qspi1Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x1,
IfxIom_RefInput_qspi2Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x2,
IfxIom_RefInput_qspi3Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x3,
IfxIom_RefInput_gnd = (IfxIom_RefInputSignal_2 << 8) | 0x4,
IfxIom_RefInput_canNode0Txd = (IfxIom_RefInputSignal_2 << 8) | 0x5,
IfxIom_RefInput_canNode1Txd = (IfxIom_RefInputSignal_2 << 8) | 0x6,
IfxIom_RefInput_canNode2Txd = (IfxIom_RefInputSignal_2 << 8) | 0x7,
IfxIom_RefInput_canNode3Txd = (IfxIom_RefInputSignal_2 << 8) | 0x8,
IfxIom_RefInput_gtmTout107 = (IfxIom_RefInputSignal_2 << 8) | 0x9,
IfxIom_RefInput_gtmTout108 = (IfxIom_RefInputSignal_2 << 8) | 0xa,
IfxIom_RefInput_gtmTout109 = (IfxIom_RefInputSignal_2 << 8) | 0xb,
IfxIom_RefInput_asclin0Atx = (IfxIom_RefInputSignal_2 << 8) | 0xc,
IfxIom_RefInput_asclin1Atx = (IfxIom_RefInputSignal_2 << 8) | 0xd,
IfxIom_RefInput_asclin2Atx = (IfxIom_RefInputSignal_2 << 8) | 0xe,
IfxIom_RefInput_asclin3Atx = (IfxIom_RefInputSignal_2 << 8) | 0xf,
IfxIom_RefInput_exorCombiner = (IfxIom_RefInputSignal_xorCombiner << 8) | 0x0
}
LAM ref inputs. More...

Detailed Description

Enumeration Type Documentation

◆ IfxIom_MonInput

enum IfxIom_MonInput

LAM mon inputs.

Enumerator
IfxIom_MonInput_p33_0 | Value=0xXXYY where XX=ISM, YY=k.
IfxIom_MonInput_p33_1 |
IfxIom_MonInput_p33_2 |
IfxIom_MonInput_p33_3 |
IfxIom_MonInput_p33_4 |
IfxIom_MonInput_p33_5 |
IfxIom_MonInput_p33_6 |
IfxIom_MonInput_p33_7 |
IfxIom_MonInput_p33_8 |
IfxIom_MonInput_p33_9 |
IfxIom_MonInput_p33_10 |
IfxIom_MonInput_p33_11 |
IfxIom_MonInput_p33_12 |
IfxIom_MonInput_p20_12 |
IfxIom_MonInput_p20_13 |
IfxIom_MonInput_p20_14 |
IfxIom_MonInput_gtmTout22 |
IfxIom_MonInput_gtmTout23 |
IfxIom_MonInput_gtmTout24 |
IfxIom_MonInput_gtmTout25 |
IfxIom_MonInput_gtmTout26 |
IfxIom_MonInput_gtmTout27 |
IfxIom_MonInput_gtmTout28 |
IfxIom_MonInput_gtmTout29 |
IfxIom_MonInput_gtmTout30 |
IfxIom_MonInput_gtmTout31 |
IfxIom_MonInput_gtmTout32 |
IfxIom_MonInput_gtmTout33 |
IfxIom_MonInput_gtmTout34 |
IfxIom_MonInput_gtmTout68 |
IfxIom_MonInput_gtmTout69 |
IfxIom_MonInput_gtmTout70 |
IfxIom_MonInput_ccu60Cc62 |
IfxIom_MonInput_ccu60Cc61 |
IfxIom_MonInput_ccu60Cc60 |
IfxIom_MonInput_ccu60Cout60 |
IfxIom_MonInput_ccu60Cout61 |
IfxIom_MonInput_ccu60Cout62 |
IfxIom_MonInput_ccu60Cout63 |
IfxIom_MonInput_ccu61Cout63 |
IfxIom_MonInput_ccu61Cc60 |
IfxIom_MonInput_ccu61Cc61 |
IfxIom_MonInput_ccu61Cc62 |
IfxIom_MonInput_ccu61Cout60 |
IfxIom_MonInput_ccu61Cout61 |
IfxIom_MonInput_ccu61Cout62 |
IfxIom_MonInput_psi5Psitx0 |
IfxIom_MonInput_psi5Psitx1 |
IfxIom_MonInput_qspi0Mrst |
IfxIom_MonInput_qspi1Mrst |
IfxIom_MonInput_qspi2Mrst |
IfxIom_MonInput_qspi3Mrst |
IfxIom_MonInput_gnd |
IfxIom_MonInput_canNode0Txd |
IfxIom_MonInput_canNode1Txd |
IfxIom_MonInput_canNode2Txd |
IfxIom_MonInput_canNode3Txd |
IfxIom_MonInput_gtmTout104 |
IfxIom_MonInput_gtmTout105 |
IfxIom_MonInput_gtmTout106 |
IfxIom_MonInput_asclin0Atx |
IfxIom_MonInput_asclin1Atx |
IfxIom_MonInput_asclin2Atx |
IfxIom_MonInput_asclin3Atx |

Definition at line 101 of file IfxIom_cfg.h.

◆ IfxIom_RefInput

enum IfxIom_RefInput

LAM ref inputs.

Enumerator
IfxIom_RefInput_p33_0
IfxIom_RefInput_p33_1
IfxIom_RefInput_p33_2
IfxIom_RefInput_p33_3
IfxIom_RefInput_p33_4
IfxIom_RefInput_p33_5
IfxIom_RefInput_p33_6
IfxIom_RefInput_p33_7
IfxIom_RefInput_p33_8
IfxIom_RefInput_p33_9
IfxIom_RefInput_p33_10
IfxIom_RefInput_p33_11
IfxIom_RefInput_p33_12
IfxIom_RefInput_p20_12
IfxIom_RefInput_p20_13
IfxIom_RefInput_p20_14
IfxIom_RefInput_gtmTout0
IfxIom_RefInput_gtmTout1
IfxIom_RefInput_gtmTout2
IfxIom_RefInput_gtmTout3
IfxIom_RefInput_gtmTout4
IfxIom_RefInput_gtmTout5
IfxIom_RefInput_gtmTout6
IfxIom_RefInput_gtmTout7
IfxIom_RefInput_gtmTout8
IfxIom_RefInput_gtmTout9
IfxIom_RefInput_gtmTout10
IfxIom_RefInput_gtmTout11
IfxIom_RefInput_gtmTout12
IfxIom_RefInput_gtmTout13
IfxIom_RefInput_gtmTout14
IfxIom_RefInput_gtmTout15
IfxIom_RefInput_ccu60Cout63
IfxIom_RefInput_ccu60Cout62
IfxIom_RefInput_ccu60Cout61
IfxIom_RefInput_ccu60Cout60
IfxIom_RefInput_ccu60Cc62
IfxIom_RefInput_ccu60Cc61
IfxIom_RefInput_ccu60Cc60
IfxIom_RefInput_ccu61Cout63
IfxIom_RefInput_ccu61Cout62
IfxIom_RefInput_ccu61Cout61
IfxIom_RefInput_ccu61Cout60
IfxIom_RefInput_ccu61Cc62
IfxIom_RefInput_ccu61Cc61
IfxIom_RefInput_ccu61Cc60
IfxIom_RefInput_psi5Psitx0
IfxIom_RefInput_psi5Psitx2
IfxIom_RefInput_qspi0Mrst
IfxIom_RefInput_qspi1Mrst
IfxIom_RefInput_qspi2Mrst
IfxIom_RefInput_qspi3Mrst
IfxIom_RefInput_gnd
IfxIom_RefInput_canNode0Txd
IfxIom_RefInput_canNode1Txd
IfxIom_RefInput_canNode2Txd
IfxIom_RefInput_canNode3Txd
IfxIom_RefInput_gtmTout107
IfxIom_RefInput_gtmTout108
IfxIom_RefInput_gtmTout109
IfxIom_RefInput_asclin0Atx
IfxIom_RefInput_asclin1Atx
IfxIom_RefInput_asclin2Atx
IfxIom_RefInput_asclin3Atx
IfxIom_RefInput_exorCombiner

Definition at line 171 of file IfxIom_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » IOM
Collaboration diagram for Standard Driver:

Modules

Enumeration
Utility Functions
Enumeration Obsolete (NOt recommended for use)
Module Functions Obsolete (NOt recommended for use)

Detailed Description


iLLD_TC26B: Enumeration

Enumerations
Enumeration
iLLD » IOM » Standard Driver
Collaboration diagram for Enumeration:

Enumerations

enum IfxIom_LamEventSource {
IfxIom_LamEventSource_mon = 0,
IfxIom_LamEventSource_monXorRef = 1
}
Event source configuration IOM_LAMCFGm.MOS. More...
enum IfxIom_LamEventTrigger {
IfxIom_LamEventTrigger_none = 0,
IfxIom_LamEventTrigger_risingEdge = 1,
IfxIom_LamEventTrigger_fallingEdge = 2,
IfxIom_LamEventTrigger_anyEdge = 3
}
Event trigger configuration IOM_LAMCFGm.EDS upper two bits. More...
enum IfxIom_LamEventWindowClearEvent {
IfxIom_LamEventWindowClearEvent_none = 0,
IfxIom_LamEventWindowClearEvent_risingEdge = 1,
IfxIom_LamEventWindowClearEvent_fallingEdge = 2,
IfxIom_LamEventWindowClearEvent_anyEdge = 3
}
Timer clear event configuration IOM_LAMCFGm.EDS upper lower bits. More...
enum IfxIom_LamEventWindowControlSource {
IfxIom_LamEventWindowControlSource_ref = 0,
IfxIom_LamEventWindowControlSource_mon = 1
}
Timer control source configuration IOM_LAMCFGm.EWS. More...
enum IfxIom_LamEventWindowRunControl {
IfxIom_LamEventWindowRunControl_freeRunning = 0,
IfxIom_LamEventWindowRunControl_gated = 1
}
Timer run configuration IOM_LAMCFGm.RMS. More...
enum IfxIom_LamFilterMode {
IfxIom_LamFilterMode_delayDebounceBothEdge = 0,
IfxIom_LamFilterMode_immediateDebounceBothEdge = 1,
IfxIom_LamFilterMode_immediateDebounceRisingEdge = 2,
IfxIom_LamFilterMode_immediateDebounceFallingEdge = 3,
IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge = 4,
IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge = 5,
IfxIom_LamFilterMode_prescalerOnRisingEdge = 6,
IfxIom_LamFilterMode_prescalerOnFallingEdge = 7,
IfxIom_LamFilterMode_noFilter = 8
}
FPC filer mode IOM_FPCCTRk.MOD, with additional definition for noFilter. More...
enum IfxIom_LamId {
IfxIom_LamId_0 = 0,
IfxIom_LamId_1,
IfxIom_LamId_2,
IfxIom_LamId_3,
IfxIom_LamId_4,
IfxIom_LamId_5,
IfxIom_LamId_6,
IfxIom_LamId_7,
IfxIom_LamId_8,
IfxIom_LamId_9,
IfxIom_LamId_10,
IfxIom_LamId_11,
IfxIom_LamId_12,
IfxIom_LamId_13,
IfxIom_LamId_14,
IfxIom_LamId_15
}
Specifies the Logic Module Analyser Module Number. More...
enum IfxIom_SleepMode {
IfxIom_SleepMode_enable = 0,
IfxIom_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_IOM.CLC.B.EDIS. More...

Detailed Description

Enumeration Type Documentation

◆ IfxIom_LamEventSource

enum IfxIom_LamEventSource

Event source configuration IOM_LAMCFGm.MOS.

Enumerator
IfxIom_LamEventSource_mon | Monitor signal is sourced directly from FPCmch.
IfxIom_LamEventSource_monXorRef | Monitor signal is EXOR'd with FPCrch.

Definition at line 72 of file IfxIom.h.

◆ IfxIom_LamEventTrigger

enum IfxIom_LamEventTrigger

Event trigger configuration IOM_LAMCFGm.EDS upper two bits.

Enumerator
IfxIom_LamEventTrigger_none | Neither edge used to gate event generation.
IfxIom_LamEventTrigger_risingEdge | Positive edge used to gate event generation.
IfxIom_LamEventTrigger_fallingEdge | Negative edge used to gate event generation.
IfxIom_LamEventTrigger_anyEdge | Either edge used to gate event generation.

Definition at line 81 of file IfxIom.h.

◆ IfxIom_LamEventWindowClearEvent

enum IfxIom_LamEventWindowClearEvent

Timer clear event configuration IOM_LAMCFGm.EDS upper lower bits.

Enumerator
IfxIom_LamEventWindowClearEvent_none | Neither edge used to clear event windowcounter.
IfxIom_LamEventWindowClearEvent_risingEdge | Positive edge used to clear event windowcounter.
IfxIom_LamEventWindowClearEvent_fallingEdge | Negative edge used to clear event windowcounter.
IfxIom_LamEventWindowClearEvent_anyEdge | Either edge used to clear event windowcounter.

Definition at line 92 of file IfxIom.h.

◆ IfxIom_LamEventWindowControlSource

enum IfxIom_LamEventWindowControlSource

Timer control source configuration IOM_LAMCFGm.EWS.

Enumerator
IfxIom_LamEventWindowControlSource_ref | Event window generation is determined from the reference signal.
IfxIom_LamEventWindowControlSource_mon | Event window generation is determined from the monitor signal.

Definition at line 103 of file IfxIom.h.

◆ IfxIom_LamEventWindowRunControl

enum IfxIom_LamEventWindowRunControl

Timer run configuration IOM_LAMCFGm.RMS.

Enumerator
IfxIom_LamEventWindowRunControl_freeRunning | Event window generation is free-running.
IfxIom_LamEventWindowRunControl_gated | Event window generation is gated with the monitor or reference signal.

Definition at line 112 of file IfxIom.h.

◆ IfxIom_LamFilterMode

enum IfxIom_LamFilterMode

FPC filer mode IOM_FPCCTRk.MOD, with additional definition for noFilter.

Enumerator
IfxIom_LamFilterMode_delayDebounceBothEdge | Delayed Debounce Filter Mode on both edges.
IfxIom_LamFilterMode_immediateDebounceBothEdge | Immediate Debounce Filter Mode on both edges.
IfxIom_LamFilterMode_immediateDebounceRisingEdge | Rising edge: Immediate Debounce Filter Mode, falling edge: no filtering.
IfxIom_LamFilterMode_immediateDebounceFallingEdge | Rising edge: no filtering, falling edge: Immediate Debounce Filter Mode.
IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge | Rising edge: Delayed Debounce Filter Mode, falling edge: Immediate Debounce Filter Mode.
IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge | Immediate Debounce Filter Mode, falling edge: Delayed Debounce Filter Mode.
IfxIom_LamFilterMode_prescalerOnRisingEdge | Prescaler Mode (triggered on rising edge)
IfxIom_LamFilterMode_prescalerOnFallingEdge | Prescaler Mode (triggered on falling edge)
IfxIom_LamFilterMode_noFilter | No filter (value used for software only )

Definition at line 121 of file IfxIom.h.

◆ IfxIom_LamId

enum IfxIom_LamId

Specifies the Logic Module Analyser Module Number.

Enumerator
IfxIom_LamId_0 | Specifies the LAM Id0.
IfxIom_LamId_1 | Specifies the LAM Id1.
IfxIom_LamId_2 | Specifies the LAM Id2.
IfxIom_LamId_3 | Specifies the LAM Id3.
IfxIom_LamId_4 | Specifies the LAM Id4.
IfxIom_LamId_5 | Specifies the LAM Id5.
IfxIom_LamId_6 | Specifies the LAM Id6.
IfxIom_LamId_7 | Specifies the LAM Id7.
IfxIom_LamId_8 | Specifies the LAM Id8.
IfxIom_LamId_9 | Specifies the LAM Id9.
IfxIom_LamId_10 | Specifies the LAM Id10.
IfxIom_LamId_11 | Specifies the LAM Id11.
IfxIom_LamId_12 | Specifies the LAM Id12.
IfxIom_LamId_13 | Specifies the LAM Id13.
IfxIom_LamId_14 | Specifies the LAM Id14.
IfxIom_LamId_15 | Specifies the LAM Id15.

Definition at line 136 of file IfxIom.h.

◆ IfxIom_SleepMode

enum IfxIom_SleepMode

Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_IOM.CLC.B.EDIS.

Enumerator
IfxIom_SleepMode_enable | Enables sleep mode.
IfxIom_SleepMode_disable | Disables sleep mode.

Definition at line 159 of file IfxIom.h.


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » IOM » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE void | IfxIom_disableModule (Ifx_IOM *iom)
Disables the IOM module . More...
IFX_INLINE void | IfxIom_enableModule (Ifx_IOM *iom, uint8 clockDivider)
Enable the IOM module control. More...
IFX_INLINE void | IfxIom_setSleepMode (Ifx_IOM *iom, IfxIom_SleepMode mode)
Enable/disable the sensitivity of the module to sleep signal. More...
IFX_EXTERN float32 | IfxIom_getFrequency (Ifx_IOM *iom)
Return the frequency used for the filter and timers clock. More...
IFX_EXTERN void | IfxIom_resetModule (Ifx_IOM *iom)
Reset the IOM module. More...

Detailed Description

Function Documentation

◆ IfxIom_disableModule()

IFX_INLINE void IfxIom_disableModule ( Ifx_IOM * iom )

Disables the IOM module .

Parameters
iom Pointer to IOM module registers
Returns
None

Definition at line 219 of file IfxIom.h.

◆ IfxIom_enableModule()

IFX_INLINE void IfxIom_enableModule | ( | Ifx_IOM * | iom,
 |  | uint8 | clockDivider
 | ) |  |

Enable the IOM module control.

Parameters
iom | Pointer to IOM module registers
clockDivider | IOM clock divider. Set to 1 for max clock.
Returns
None

Definition at line 229 of file IfxIom.h.

◆ IfxIom_getFrequency()

IFX_EXTERN float32 IfxIom_getFrequency ( Ifx_IOM * iom )

Return the frequency used for the filter and timers clock.

Parameters
iom Pointer to IOM module registers

Definition at line 53 of file IfxIom.c.

Referenced by IfxIom_Driver_initLam().

◆ IfxIom_resetModule()

IFX_EXTERN void IfxIom_resetModule ( Ifx_IOM * iom )

Reset the IOM module.

Parameters
iom Pointer to IOM module registers
Returns
None

Definition at line 66 of file IfxIom.c.

◆ IfxIom_setSleepMode()

IFX_INLINE void IfxIom_setSleepMode | ( | Ifx_IOM * | iom,
 |  | IfxIom_SleepMode | mode
 | ) |  |

Enable/disable the sensitivity of the module to sleep signal.

Parameters
iom | Pointer to IOM registers
mode | Mode selection (enable/disable)
Returns
None

Definition at line 240 of file IfxIom.h.


iLLD_TC26B: Enumeration Obsolete (NOt recommended for use)

Enumeration Obsolete (NOt recommended for use)
iLLD » IOM » Standard Driver
Collaboration diagram for Enumeration Obsolete (NOt recommended for use):


iLLD_TC26B: Module Functions Obsolete (NOt recommended for use)

Module Functions Obsolete (NOt recommended for use)
iLLD » IOM » Standard Driver
Collaboration diagram for Module Functions Obsolete (NOt recommended for use):


iLLD_TC26B: IOM Driver

Modules
IOM Driver
iLLD » IOM
Collaboration diagram for IOM Driver:

Modules

Driver Functions
Structures

Detailed Description


iLLD_TC26B: Driver Functions

Functions
Driver Functions
iLLD » IOM » IOM Driver
Collaboration diagram for Driver Functions:

Functions

IFX_EXTERN void | IfxIom_Driver_clearAllGlitch (IfxIom_Driver *driver)
Clear all LAM monitor and reference glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_clearHistory (IfxIom_Driver *driver)
Clear the IOM event history. More...
IFX_EXTERN void | IfxIom_Driver_clearLamMonGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM monitor signal glitch flag. More...
IFX_EXTERN void | IfxIom_Driver_clearLamRefGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM reference signal glitch flag. More...
IFX_EXTERN uint32 | IfxIom_Driver_disableEvents (IfxIom_Driver *driver)
Disable all event generation. More...
IFX_EXTERN void | IfxIom_Driver_disableLamEvent (IfxIom_Driver_Lam *driver)
Disable the event generation for the LAM. More...
IFX_EXTERN void | IfxIom_Driver_enableLamEvent (IfxIom_Driver_Lam *driver)
Enable the event genration for the LAM. More...
IFX_EXTERN void | IfxIom_Driver_getHistory (IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ... More...
IFX_EXTERN boolean | IfxIom_Driver_init (IfxIom_Driver *driver, IfxIom_Driver_Config *config)
Initialize the IOM Must be called before IfxIom_Driver_initLam() More...
IFX_EXTERN void | IfxIom_Driver_initConfig (IfxIom_Driver_Config *config, Ifx_IOM *module)
Set the IOM default configuration. More...
IFX_EXTERN boolean | IfxIom_Driver_initLam (IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
Initialize the LAM channel. More...
IFX_EXTERN void | IfxIom_Driver_initLamConfig (IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
Set the LAM default configuration. More...
IFX_EXTERN void | IfxIom_Driver_isLamMonGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM monitor glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_isLamRefGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM reference glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_restoreEvents (IfxIom_Driver *driver, uint32 mask)
Restore the IOM event mask. More...

Detailed Description

Function Documentation

◆ IfxIom_Driver_clearAllGlitch()

IFX_EXTERN void IfxIom_Driver_clearAllGlitch ( IfxIom_Driver * driver )

Clear all LAM monitor and reference glitch flags.

Parameters
driver Pointer to the IOM driver object
Returns
None

Definition at line 66 of file IfxIom_Driver.c.

◆ IfxIom_Driver_clearHistory()

IFX_EXTERN void IfxIom_Driver_clearHistory ( IfxIom_Driver * driver )

Clear the IOM event history.

Parameters
driver Pointer to the IOM driver object
Returns
None

Definition at line 73 of file IfxIom_Driver.c.

◆ IfxIom_Driver_clearLamMonGlitch()

IFX_EXTERN void IfxIom_Driver_clearLamMonGlitch ( IfxIom_Driver_Lam * driver )

Clear the LAM monitor signal glitch flag.

Parameters
driver Pointer to the LAM driver object
Returns
None

Definition at line 80 of file IfxIom_Driver.c.

◆ IfxIom_Driver_clearLamRefGlitch()

IFX_EXTERN void IfxIom_Driver_clearLamRefGlitch ( IfxIom_Driver_Lam * driver )

Clear the LAM reference signal glitch flag.

Parameters
driver Pointer to the LAM driver object
Returns
None

Definition at line 91 of file IfxIom_Driver.c.

◆ IfxIom_Driver_disableEvents()

IFX_EXTERN uint32 IfxIom_Driver_disableEvents ( IfxIom_Driver * driver )

Disable all event generation.

Parameters
driver Pointer to the IOM driver object
Returns
Return the configured events

Definition at line 102 of file IfxIom_Driver.c.

◆ IfxIom_Driver_disableLamEvent()

IFX_EXTERN void IfxIom_Driver_disableLamEvent ( IfxIom_Driver_Lam * driver )

Disable the event generation for the LAM.

Parameters
driver Pointer to the LAM driver object
Returns
None

Definition at line 111 of file IfxIom_Driver.c.

◆ IfxIom_Driver_enableLamEvent()

IFX_EXTERN void IfxIom_Driver_enableLamEvent ( IfxIom_Driver_Lam * driver )

Enable the event genration for the LAM.

Parameters
driver Pointer to the LAM driver object
Returns
None

Definition at line 132 of file IfxIom_Driver.c.

◆ IfxIom_Driver_getHistory()

IFX_EXTERN void IfxIom_Driver_getHistory | ( | IfxIom_Driver * | driver,
 |  | uint16 * | a,
 |  | uint16 * | b,
 |  | uint16 * | c,
 |  | uint16 * | d
 | ) |  |

Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ...

Parameters
driver | Pointer to the IOM driver object
a | Event mask of history level 0 (Last event)
b | Event mask of history level 1
c | Event mask of history level 2
d | Event mask of history level 3 (oldest event)
Returns
None

Definition at line 153 of file IfxIom_Driver.c.

◆ IfxIom_Driver_init()

IFX_EXTERN boolean IfxIom_Driver_init | ( | IfxIom_Driver * | driver,
 |  | IfxIom_Driver_Config * | config
 | ) |  |

Initialize the IOM Must be called before IfxIom_Driver_initLam()

Parameters
driver | Pointer to the IOM driver object. Will be initialized by the function
config | IOM driver configuration
Returns
TRUE in case of success else FALSE

Definition at line 168 of file IfxIom_Driver.c.

◆ IfxIom_Driver_initConfig()

IFX_EXTERN void IfxIom_Driver_initConfig | ( | IfxIom_Driver_Config * | config,
 |  | Ifx_IOM * | module
 | ) |  |

Set the IOM default configuration.

Parameters
config | IOM configuration. Will be initialized by the function
module | Pointer to the IOM module
Returns
None

Definition at line 177 of file IfxIom_Driver.c.

◆ IfxIom_Driver_initLam()

IFX_EXTERN boolean IfxIom_Driver_initLam | ( | IfxIom_Driver_Lam * | driver,
 |  | IfxIom_Driver_LamConfig * | config
 | ) |  |

Initialize the LAM channel.

Parameters
driver | Pointer to the LAM driver object. Will be initialized by the function
config | LAM driver configuration
Returns
TRUE in case of success else FALSE

Definition at line 183 of file IfxIom_Driver.c.

◆ IfxIom_Driver_initLamConfig()

IFX_EXTERN void IfxIom_Driver_initLamConfig | ( | IfxIom_Driver_LamConfig * | config,
 |  | IfxIom_Driver * | driver
 | ) |  |

Set the LAM default configuration.

Parameters
config | LAM configuration. Will be initialized by the function
driver | Pointer to the IOM driver object
Returns
None

Definition at line 333 of file IfxIom_Driver.c.

◆ IfxIom_Driver_isLamMonGlitch()

IFX_EXTERN void IfxIom_Driver_isLamMonGlitch | ( | IfxIom_Driver_Lam * | driver,
 |  | boolean * | risingEdgeGlitch,
 |  | boolean * | fallingEdgeGlitch
 | ) |  |

Return the LAM monitor glitch flags.

Parameters
driver | Pointer to the LAM driver object
risingEdgeGlitch | Set to TRUE by the function if rising edge glitch were detected on the monitor signal
fallingEdgeGlitch | Set to TRUE by the function if falling edge glitch were detected on the monitor signal
Returns
None

Definition at line 362 of file IfxIom_Driver.c.

◆ IfxIom_Driver_isLamRefGlitch()

IFX_EXTERN void IfxIom_Driver_isLamRefGlitch | ( | IfxIom_Driver_Lam * | driver,
 |  | boolean * | risingEdgeGlitch,
 |  | boolean * | fallingEdgeGlitch
 | ) |  |

Return the LAM reference glitch flags.

Parameters
driver | Pointer to the LAM driver object
risingEdgeGlitch | Set to TRUE by the function if rising edge glitch were detected on the reference signal
fallingEdgeGlitch | Set to TRUE by the function if falling edge glitch were detected on the reference signal
Returns
None

Definition at line 381 of file IfxIom_Driver.c.

◆ IfxIom_Driver_restoreEvents()

IFX_EXTERN void IfxIom_Driver_restoreEvents | ( | IfxIom_Driver * | driver,
 |  | uint32 | mask
 | ) |  |

Restore the IOM event mask.

Parameters
driver | Pointer to the IOM driver object
mask | Event configuration as returned by IfxIom_Driver_disableEvents()
Returns
None

Definition at line 400 of file IfxIom_Driver.c.


iLLD_TC26B: Structures

Data Structures
Structures
iLLD » IOM » IOM Driver
Collaboration diagram for Structures:

Data Structures

struct | IfxIom_Driver_LamFilterConfig
IOM LAM filter configuration. More...
struct | IfxIom_Driver
IOM driver. More...
struct | IfxIom_Driver_LamEventConfig
IOM LAM event configuration. More...
struct | IfxIom_Driver_LamEventWindowConfig
IOM LAM event window configuration. More...
struct | IfxIom_Driver_LamMonConfig
IOM LAM monitor input configuration. More...
struct | IfxIom_Driver_LamRefConfig
IOM LAM reference input configuration. More...
struct | IfxIom_Driver_Config
IOM Driver Configuration. More...
struct | IfxIom_Driver_Lam
IOM LAM object. More...
struct | IfxIom_Driver_LamConfig
IOM LAM configuration. More...

Detailed Description

Data Structure Documentation

◆ IfxIom_Driver_LamFilterConfig

struct IfxIom_Driver_LamFilterConfig

IOM LAM filter configuration.

Definition at line 122 of file IfxIom_Driver.h.

Data Fields
boolean | clearTimerOnGlitch | If set, the timer is cleared on glitch, else it is decremented.
float32 | fallingEdgeFilterTime | Falling edge filter time in second for immediate debounce filter mode. In delayed filter time this corresponds to the minimal filter time.
IfxIom_LamFilterMode | mode | Filter mode.
uint32 | prescalerFactor | Prescaler factor, must be > 0, only valid for prescaler mode.
float32 | risingEdgeFilterTime | Rising edge filter time in second for immediate debounce filter mode. In delayed filter time this corresponds to the minimal filter time.

◆ IfxIom_Driver

struct IfxIom_Driver

IOM driver.

Definition at line 137 of file IfxIom_Driver.h.

Data Fields
uint8 | accumulatedEventUsedMask | Indicates the used / unused accumulated counter ECM. bit0=CTS0, bit1=CTS2, ... 0=unused, 1=used.
uint16 | lamUsedMask | Indicates the used / unused LAM. bit0=LAM0, bit1=LAM2, ... 0=unused, 1=used.
Ifx_IOM * | module | Pointer to IOM module SFR set.

◆ IfxIom_Driver_LamEventConfig

struct IfxIom_Driver_LamEventConfig

IOM LAM event configuration.

Definition at line 146 of file IfxIom_Driver.h.

Data Fields
IfxIom_LamEventSource | source | Event source.
IfxIom_LamEventTrigger | trigger | Event trigger.

◆ IfxIom_Driver_LamEventWindowConfig

struct IfxIom_Driver_LamEventWindowConfig

IOM LAM event window configuration.

Definition at line 154 of file IfxIom_Driver.h.

Data Fields
IfxIom_LamEventWindowClearEvent | clearEvent | Timer clear event.
IfxIom_LamEventWindowControlSource | controlSource | Timer control source.
boolean | inverted | If TRUE, the event window is inverted.
IfxIom_LamEventWindowRunControl | run | Timer run control.
float32 | threshold | Event window threshold in second. If 0, no event are generated.

◆ IfxIom_Driver_LamMonConfig

struct IfxIom_Driver_LamMonConfig

IOM LAM monitor input configuration.

Definition at line 165 of file IfxIom_Driver.h.

Collaboration diagram for IfxIom_Driver_LamMonConfig:
[legend]
Data Fields
IfxIom_Driver_LamFilterConfig | filter | Filter configuration.
IfxIom_MonInput | input | Monitor input.
boolean | inverted | If TRUE, the signal is inverted.

◆ IfxIom_Driver_LamRefConfig

struct IfxIom_Driver_LamRefConfig

IOM LAM reference input configuration.

Definition at line 174 of file IfxIom_Driver.h.

Collaboration diagram for IfxIom_Driver_LamRefConfig:
[legend]
Data Fields
IfxIom_Driver_LamFilterConfig | filter | Filter configuration.
IfxIom_RefInput | input | Reference input.
boolean | inverted | If TRUE, the signal is inverted.

◆ IfxIom_Driver_Config

struct IfxIom_Driver_Config

IOM Driver Configuration.

Definition at line 187 of file IfxIom_Driver.h.

Data Fields
Ifx_IOM * module IOM module SFRs.

◆ IfxIom_Driver_Lam

struct IfxIom_Driver_Lam

IOM LAM object.

Definition at line 194 of file IfxIom_Driver.h.

Collaboration diagram for IfxIom_Driver_Lam:
[legend]
Data Fields
sint8 | accumulatedCounterIndex | Accumulated counter used. Negative value means no counter used.
IfxIom_LamId | channel | LAM Channel.
IfxIom_Driver * | iomDriver | Main IOM Driver.
uint8 | monIndex | Monitor input index.
IfxIom_MonInputSignal | monInput | Monitor input.
uint8 | refIndex | Reference input index.
IfxIom_RefInputSignal | refInput | Reference input.
uint8 | systemEventTriggerThreshold | Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event. Value one enables the trigger event. Value from 2 to 15 will use the counter to filter events, max 4 counters exists for the IOM.

◆ IfxIom_Driver_LamConfig

struct IfxIom_Driver_LamConfig

IOM LAM configuration.

Definition at line 208 of file IfxIom_Driver.h.

Collaboration diagram for IfxIom_Driver_LamConfig:
[legend]
Data Fields
IfxIom_LamId | channel | LAM channel to be used.
IfxIom_Driver_LamEventConfig | event | LAM event configuration.
IfxIom_Driver_LamEventWindowConfig | eventWindow | LAM eventWindow configuration.
IfxIom_Driver * | iomDriver | Pointer to the IOM driver.
IfxIom_Driver_LamMonConfig | mon | LAM Monitor input configuration.
IfxIom_Driver_LamRefConfig | ref | LAM reference input configuration.
uint8 | systemEventTriggerThreshold | Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event. Value one enables the trigger event. Value from 2 to 15 will use the counter to filter events, max 4 counters exists for the IOM.


iLLD_TC26B: IfxIom_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxIom_cfg.h File Reference
iLLD » IOM

IOM on-chip implementation data. More...

Go to the source code of this file.

Macros

#define IFXIOM_NUM_CHANNELS 16
Specifies maximum number of channels. More...

Enumerations

enum IfxIom_MonInputSignal {
IfxIom_MonInputSignal_p = 0,
IfxIom_MonInputSignal_0 = 1,
IfxIom_MonInputSignal_1 = 2,
IfxIom_MonInputSignal_2 = 3
}
IOM_FPCCTRk.ISM. More...
enum IfxIom_RefInputSignal {
IfxIom_RefInputSignal_p = 0,
IfxIom_RefInputSignal_0 = 1,
IfxIom_RefInputSignal_1 = 2,
IfxIom_RefInputSignal_2 = 3,
IfxIom_RefInputSignal_xorCombiner = 4
}
IOM_FPCCTRk.ISR. More...
enum IfxIom_MonInput {
IfxIom_MonInput_p33_0 = (IfxIom_MonInputSignal_p << 8) | 0x0,
IfxIom_MonInput_p33_1 = (IfxIom_MonInputSignal_p << 8) | 0x1,
IfxIom_MonInput_p33_2 = (IfxIom_MonInputSignal_p << 8) | 0x2,
IfxIom_MonInput_p33_3 = (IfxIom_MonInputSignal_p << 8) | 0x3,
IfxIom_MonInput_p33_4 = (IfxIom_MonInputSignal_p << 8) | 0x4,
IfxIom_MonInput_p33_5 = (IfxIom_MonInputSignal_p << 8) | 0x5,
IfxIom_MonInput_p33_6 = (IfxIom_MonInputSignal_p << 8) | 0x6,
IfxIom_MonInput_p33_7 = (IfxIom_MonInputSignal_p << 8) | 0x7,
IfxIom_MonInput_p33_8 = (IfxIom_MonInputSignal_p << 8) | 0x8,
IfxIom_MonInput_p33_9 = (IfxIom_MonInputSignal_p << 8) | 0x9,
IfxIom_MonInput_p33_10 = (IfxIom_MonInputSignal_p << 8) | 0xa,
IfxIom_MonInput_p33_11 = (IfxIom_MonInputSignal_p << 8) | 0xb,
IfxIom_MonInput_p33_12 = (IfxIom_MonInputSignal_p << 8) | 0xc,
IfxIom_MonInput_p20_12 = (IfxIom_MonInputSignal_p << 8) | 0xd,
IfxIom_MonInput_p20_13 = (IfxIom_MonInputSignal_p << 8) | 0xe,
IfxIom_MonInput_p20_14 = (IfxIom_MonInputSignal_p << 8) | 0xf,
IfxIom_MonInput_gtmTout22 = (IfxIom_MonInputSignal_0 << 8) | 0x0,
IfxIom_MonInput_gtmTout23 = (IfxIom_MonInputSignal_0 << 8) | 0x1,
IfxIom_MonInput_gtmTout24 = (IfxIom_MonInputSignal_0 << 8) | 0x2,
IfxIom_MonInput_gtmTout25 = (IfxIom_MonInputSignal_0 << 8) | 0x3,
IfxIom_MonInput_gtmTout26 = (IfxIom_MonInputSignal_0 << 8) | 0x4,
IfxIom_MonInput_gtmTout27 = (IfxIom_MonInputSignal_0 << 8) | 0x5,
IfxIom_MonInput_gtmTout28 = (IfxIom_MonInputSignal_0 << 8) | 0x6,
IfxIom_MonInput_gtmTout29 = (IfxIom_MonInputSignal_0 << 8) | 0x7,
IfxIom_MonInput_gtmTout30 = (IfxIom_MonInputSignal_0 << 8) | 0x8,
IfxIom_MonInput_gtmTout31 = (IfxIom_MonInputSignal_0 << 8) | 0x9,
IfxIom_MonInput_gtmTout32 = (IfxIom_MonInputSignal_0 << 8) | 0xa,
IfxIom_MonInput_gtmTout33 = (IfxIom_MonInputSignal_0 << 8) | 0xb,
IfxIom_MonInput_gtmTout34 = (IfxIom_MonInputSignal_0 << 8) | 0xc,
IfxIom_MonInput_gtmTout68 = (IfxIom_MonInputSignal_0 << 8) | 0xd,
IfxIom_MonInput_gtmTout69 = (IfxIom_MonInputSignal_0 << 8) | 0xe,
IfxIom_MonInput_gtmTout70 = (IfxIom_MonInputSignal_0 << 8) | 0xf,
IfxIom_MonInput_ccu60Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0x0,
IfxIom_MonInput_ccu60Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x1,
IfxIom_MonInput_ccu60Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x2,
IfxIom_MonInput_ccu60Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0x3,
IfxIom_MonInput_ccu60Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0x4,
IfxIom_MonInput_ccu60Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0x5,
IfxIom_MonInput_ccu60Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x6,
IfxIom_MonInput_ccu61Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x7,
IfxIom_MonInput_ccu61Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x8,
IfxIom_MonInput_ccu61Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x9,
IfxIom_MonInput_ccu61Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0xa,
IfxIom_MonInput_ccu61Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0xb,
IfxIom_MonInput_ccu61Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0xc,
IfxIom_MonInput_ccu61Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0xd,
IfxIom_MonInput_psi5Psitx0 = (IfxIom_MonInputSignal_1 << 8) | 0xe,
IfxIom_MonInput_psi5Psitx1 = (IfxIom_MonInputSignal_1 << 8) | 0xf,
IfxIom_MonInput_qspi0Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x0,
IfxIom_MonInput_qspi1Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x1,
IfxIom_MonInput_qspi2Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x2,
IfxIom_MonInput_qspi3Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x3,
IfxIom_MonInput_gnd = (IfxIom_MonInputSignal_2 << 8) | 0x4,
IfxIom_MonInput_canNode0Txd = (IfxIom_MonInputSignal_2 << 8) | 0x5,
IfxIom_MonInput_canNode1Txd = (IfxIom_MonInputSignal_2 << 8) | 0x6,
IfxIom_MonInput_canNode2Txd = (IfxIom_MonInputSignal_2 << 8) | 0x7,
IfxIom_MonInput_canNode3Txd = (IfxIom_MonInputSignal_2 << 8) | 0x8,
IfxIom_MonInput_gtmTout104 = (IfxIom_MonInputSignal_2 << 8) | 0x9,
IfxIom_MonInput_gtmTout105 = (IfxIom_MonInputSignal_2 << 8) | 0xa,
IfxIom_MonInput_gtmTout106 = (IfxIom_MonInputSignal_2 << 8) | 0xb,
IfxIom_MonInput_asclin0Atx = (IfxIom_MonInputSignal_2 << 8) | 0xc,
IfxIom_MonInput_asclin1Atx = (IfxIom_MonInputSignal_2 << 8) | 0xd,
IfxIom_MonInput_asclin2Atx = (IfxIom_MonInputSignal_2 << 8) | 0xe,
IfxIom_MonInput_asclin3Atx = (IfxIom_MonInputSignal_2 << 8) | 0xf
}
LAM mon inputs. More...
enum IfxIom_RefInput {
IfxIom_RefInput_p33_0 = (IfxIom_RefInputSignal_p << 8) | 0x0,
IfxIom_RefInput_p33_1 = (IfxIom_RefInputSignal_p << 8) | 0x1,
IfxIom_RefInput_p33_2 = (IfxIom_RefInputSignal_p << 8) | 0x2,
IfxIom_RefInput_p33_3 = (IfxIom_RefInputSignal_p << 8) | 0x3,
IfxIom_RefInput_p33_4 = (IfxIom_RefInputSignal_p << 8) | 0x4,
IfxIom_RefInput_p33_5 = (IfxIom_RefInputSignal_p << 8) | 0x5,
IfxIom_RefInput_p33_6 = (IfxIom_RefInputSignal_p << 8) | 0x6,
IfxIom_RefInput_p33_7 = (IfxIom_RefInputSignal_p << 8) | 0x7,
IfxIom_RefInput_p33_8 = (IfxIom_RefInputSignal_p << 8) | 0x8,
IfxIom_RefInput_p33_9 = (IfxIom_RefInputSignal_p << 8) | 0x9,
IfxIom_RefInput_p33_10 = (IfxIom_RefInputSignal_p << 8) | 0xa,
IfxIom_RefInput_p33_11 = (IfxIom_RefInputSignal_p << 8) | 0xb,
IfxIom_RefInput_p33_12 = (IfxIom_RefInputSignal_p << 8) | 0xc,
IfxIom_RefInput_p20_12 = (IfxIom_RefInputSignal_p << 8) | 0xd,
IfxIom_RefInput_p20_13 = (IfxIom_RefInputSignal_p << 8) | 0xe,
IfxIom_RefInput_p20_14 = (IfxIom_RefInputSignal_p << 8) | 0xf,
IfxIom_RefInput_gtmTout0 = (IfxIom_RefInputSignal_0 << 8) | 0x0,
IfxIom_RefInput_gtmTout1 = (IfxIom_RefInputSignal_0 << 8) | 0x1,
IfxIom_RefInput_gtmTout2 = (IfxIom_RefInputSignal_0 << 8) | 0x2,
IfxIom_RefInput_gtmTout3 = (IfxIom_RefInputSignal_0 << 8) | 0x3,
IfxIom_RefInput_gtmTout4 = (IfxIom_RefInputSignal_0 << 8) | 0x4,
IfxIom_RefInput_gtmTout5 = (IfxIom_RefInputSignal_0 << 8) | 0x5,
IfxIom_RefInput_gtmTout6 = (IfxIom_RefInputSignal_0 << 8) | 0x6,
IfxIom_RefInput_gtmTout7 = (IfxIom_RefInputSignal_0 << 8) | 0x7,
IfxIom_RefInput_gtmTout8 = (IfxIom_RefInputSignal_0 << 8) | 0x8,
IfxIom_RefInput_gtmTout9 = (IfxIom_RefInputSignal_0 << 8) | 0x9,
IfxIom_RefInput_gtmTout10 = (IfxIom_RefInputSignal_0 << 8) | 0xa,
IfxIom_RefInput_gtmTout11 = (IfxIom_RefInputSignal_0 << 8) | 0xb,
IfxIom_RefInput_gtmTout12 = (IfxIom_RefInputSignal_0 << 8) | 0xc,
IfxIom_RefInput_gtmTout13 = (IfxIom_RefInputSignal_0 << 8) | 0xd,
IfxIom_RefInput_gtmTout14 = (IfxIom_RefInputSignal_0 << 8) | 0xe,
IfxIom_RefInput_gtmTout15 = (IfxIom_RefInputSignal_0 << 8) | 0xf,
IfxIom_RefInput_ccu60Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x0,
IfxIom_RefInput_ccu60Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x1,
IfxIom_RefInput_ccu60Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x2,
IfxIom_RefInput_ccu60Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0x3,
IfxIom_RefInput_ccu60Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0x4,
IfxIom_RefInput_ccu60Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0x5,
IfxIom_RefInput_ccu60Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0x6,
IfxIom_RefInput_ccu61Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x7,
IfxIom_RefInput_ccu61Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x8,
IfxIom_RefInput_ccu61Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x9,
IfxIom_RefInput_ccu61Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0xa,
IfxIom_RefInput_ccu61Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0xb,
IfxIom_RefInput_ccu61Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0xc,
IfxIom_RefInput_ccu61Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0xd,
IfxIom_RefInput_psi5Psitx0 = (IfxIom_RefInputSignal_1 << 8) | 0xe,
IfxIom_RefInput_psi5Psitx2 = (IfxIom_RefInputSignal_1 << 8) | 0xf,
IfxIom_RefInput_qspi0Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x0,
IfxIom_RefInput_qspi1Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x1,
IfxIom_RefInput_qspi2Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x2,
IfxIom_RefInput_qspi3Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x3,
IfxIom_RefInput_gnd = (IfxIom_RefInputSignal_2 << 8) | 0x4,
IfxIom_RefInput_canNode0Txd = (IfxIom_RefInputSignal_2 << 8) | 0x5,
IfxIom_RefInput_canNode1Txd = (IfxIom_RefInputSignal_2 << 8) | 0x6,
IfxIom_RefInput_canNode2Txd = (IfxIom_RefInputSignal_2 << 8) | 0x7,
IfxIom_RefInput_canNode3Txd = (IfxIom_RefInputSignal_2 << 8) | 0x8,
IfxIom_RefInput_gtmTout107 = (IfxIom_RefInputSignal_2 << 8) | 0x9,
IfxIom_RefInput_gtmTout108 = (IfxIom_RefInputSignal_2 << 8) | 0xa,
IfxIom_RefInput_gtmTout109 = (IfxIom_RefInputSignal_2 << 8) | 0xb,
IfxIom_RefInput_asclin0Atx = (IfxIom_RefInputSignal_2 << 8) | 0xc,
IfxIom_RefInput_asclin1Atx = (IfxIom_RefInputSignal_2 << 8) | 0xd,
IfxIom_RefInput_asclin2Atx = (IfxIom_RefInputSignal_2 << 8) | 0xe,
IfxIom_RefInput_asclin3Atx = (IfxIom_RefInputSignal_2 << 8) | 0xf,
IfxIom_RefInput_exorCombiner = (IfxIom_RefInputSignal_xorCombiner << 8) | 0x0
}
LAM ref inputs. More...

Detailed Description

IOM on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxIom_cfg.h.

Macro Definition Documentation

◆ IFXIOM_NUM_CHANNELS

#define IFXIOM_NUM_CHANNELS 16

Specifies maximum number of channels.

Definition at line 66 of file IfxIom_cfg.h.


iLLD_TC26B: IfxIom_Driver.h File Reference

  • Iom
  • Driver
Data Structures | Functions
IfxIom_Driver.h File Reference
iLLD » IOM

IOM DRIVER details. More...

#include "Iom/Std/IfxIom.h"
Include dependency graph for IfxIom_Driver.h:

Go to the source code of this file.

Data Structures

struct | IfxIom_Driver_LamFilterConfig
IOM LAM filter configuration. More...
struct | IfxIom_Driver
IOM driver. More...
struct | IfxIom_Driver_LamEventConfig
IOM LAM event configuration. More...
struct | IfxIom_Driver_LamEventWindowConfig
IOM LAM event window configuration. More...
struct | IfxIom_Driver_LamMonConfig
IOM LAM monitor input configuration. More...
struct | IfxIom_Driver_LamRefConfig
IOM LAM reference input configuration. More...
struct | IfxIom_Driver_Config
IOM Driver Configuration. More...
struct | IfxIom_Driver_Lam
IOM LAM object. More...
struct | IfxIom_Driver_LamConfig
IOM LAM configuration. More...

Functions

IFX_EXTERN void | IfxIom_Driver_clearAllGlitch (IfxIom_Driver *driver)
Clear all LAM monitor and reference glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_clearHistory (IfxIom_Driver *driver)
Clear the IOM event history. More...
IFX_EXTERN void | IfxIom_Driver_clearLamMonGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM monitor signal glitch flag. More...
IFX_EXTERN void | IfxIom_Driver_clearLamRefGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM reference signal glitch flag. More...
IFX_EXTERN uint32 | IfxIom_Driver_disableEvents (IfxIom_Driver *driver)
Disable all event generation. More...
IFX_EXTERN void | IfxIom_Driver_disableLamEvent (IfxIom_Driver_Lam *driver)
Disable the event generation for the LAM. More...
IFX_EXTERN void | IfxIom_Driver_enableLamEvent (IfxIom_Driver_Lam *driver)
Enable the event genration for the LAM. More...
IFX_EXTERN void | IfxIom_Driver_getHistory (IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ... More...
IFX_EXTERN boolean | IfxIom_Driver_init (IfxIom_Driver *driver, IfxIom_Driver_Config *config)
Initialize the IOM Must be called before IfxIom_Driver_initLam() More...
IFX_EXTERN void | IfxIom_Driver_initConfig (IfxIom_Driver_Config *config, Ifx_IOM *module)
Set the IOM default configuration. More...
IFX_EXTERN boolean | IfxIom_Driver_initLam (IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
Initialize the LAM channel. More...
IFX_EXTERN void | IfxIom_Driver_initLamConfig (IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
Set the LAM default configuration. More...
IFX_EXTERN void | IfxIom_Driver_isLamMonGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM monitor glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_isLamRefGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM reference glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_restoreEvents (IfxIom_Driver *driver, uint32 mask)
Restore the IOM event mask. More...

Detailed Description

IOM DRIVER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

The IOM driver enable easy usage of the IOM module, by abstracting the internal module structure. For it's configuration it requires the LAM channel to be used together with the reference and monitor signal. The muxes and filters are configured accordingly. The driver handles the event combiner "accumulated event timer" resources base on the single or multi-event configuration making use of the next free timer if required.

Double resource usage (LAM channel, accumulated event timers) is checked and reported at driver initialization .

The driver care for the timing and clock conversion, all timing configuration are to be given in second.

Example of use:

  • Initialization of the Iom
  • Initialization of LAM channel 0 with:
    • IOM monitor input: External pin P20.13, delay debounce filter both edge 0.5us, signal inverted,
    • IOM reference: GTM TOUT14, no filter, not inverted
    • Event window controlled by ref signal, with a free running timer and cleared on any edge of the reference signal, threshold set to 1us
    • Event source is XOR of monitor and reference signal, event is triggered on falling edge of the XOR
    • An alarm signal is generated if the monitor signal is not within the threshold, after two events.
void InitLam(IfxIom_Driver *driver, IfxIom_Driver *lam){
IfxIom_Driver_Config configDriver;
IfxIom_Driver_LamConfig configLam;
IfxIom_Driver_initConfig(&configDriver, &MODULE_IOM);
IfxIom_Driver_init(driver, &configDriver);
IfxIom_Driver_initLamConfig(&configLam, driver);
configLam.channel = IfxIom_LamId_0;
configLam.mon.input = IfxIom_MonInput_p20_13;
configLam.mon.filter.mode = IfxIom_LamFilterMode_delayDebounceBothEdge;
configLam.mon.filter.clearTimerOnGlitch = FALSE;
configLam.mon.filter.fallingEdgeFilterTime = 0.5e-6;
configLam.mon.filter.risingEdgeFilterTime = configLam.ref.filter.fallingEdgeFilterTime;
configLam.mon.inverted = TRUE;
configLam.ref.input= IfxIom_RefInput_gtmTout14;
configLam.ref.filter.mode = IfxIom_LamFilterMode_noFilter;
configLam.ref.inverted = FALSE;
configLam.eventWindow.controlSource = IfxIom_LamEventWindowControlSource_ref;
configLam.eventWindow.run = IfxIom_LamEventWindowRunControl_freeRunning;
configLam.eventWindow.clearEvent = IfxIom_LamEventWindowClearEvent_anyEdge;
configLam.eventWindow.threshold = 1e-6;
configLam.event.source = IfxIom_LamEventSource_monXorRef;
configLam.event.trigger = IfxIom_LamEventTrigger_fallingEdge;
configLam.systemEventTriggerThreshold = 2;
IfxIom_Driver_initLam(lam, &configLam);
}

Definition in file IfxIom_Driver.h.


iLLD_TC26B: IfxIom.h File Reference

  • Iom
  • Std
Enumerations | Functions
IfxIom.h File Reference
iLLD » IOM

IOM basic functionality. More...

#include "_Impl/IfxIom_cfg.h"
#include "IfxIom_reg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxIom.h:

Go to the source code of this file.

Enumerations

enum IfxIom_LamEventSource {
IfxIom_LamEventSource_mon = 0,
IfxIom_LamEventSource_monXorRef = 1
}
Event source configuration IOM_LAMCFGm.MOS. More...
enum IfxIom_LamEventTrigger {
IfxIom_LamEventTrigger_none = 0,
IfxIom_LamEventTrigger_risingEdge = 1,
IfxIom_LamEventTrigger_fallingEdge = 2,
IfxIom_LamEventTrigger_anyEdge = 3
}
Event trigger configuration IOM_LAMCFGm.EDS upper two bits. More...
enum IfxIom_LamEventWindowClearEvent {
IfxIom_LamEventWindowClearEvent_none = 0,
IfxIom_LamEventWindowClearEvent_risingEdge = 1,
IfxIom_LamEventWindowClearEvent_fallingEdge = 2,
IfxIom_LamEventWindowClearEvent_anyEdge = 3
}
Timer clear event configuration IOM_LAMCFGm.EDS upper lower bits. More...
enum IfxIom_LamEventWindowControlSource {
IfxIom_LamEventWindowControlSource_ref = 0,
IfxIom_LamEventWindowControlSource_mon = 1
}
Timer control source configuration IOM_LAMCFGm.EWS. More...
enum IfxIom_LamEventWindowRunControl {
IfxIom_LamEventWindowRunControl_freeRunning = 0,
IfxIom_LamEventWindowRunControl_gated = 1
}
Timer run configuration IOM_LAMCFGm.RMS. More...
enum IfxIom_LamFilterMode {
IfxIom_LamFilterMode_delayDebounceBothEdge = 0,
IfxIom_LamFilterMode_immediateDebounceBothEdge = 1,
IfxIom_LamFilterMode_immediateDebounceRisingEdge = 2,
IfxIom_LamFilterMode_immediateDebounceFallingEdge = 3,
IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge = 4,
IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge = 5,
IfxIom_LamFilterMode_prescalerOnRisingEdge = 6,
IfxIom_LamFilterMode_prescalerOnFallingEdge = 7,
IfxIom_LamFilterMode_noFilter = 8
}
FPC filer mode IOM_FPCCTRk.MOD, with additional definition for noFilter. More...
enum IfxIom_LamId {
IfxIom_LamId_0 = 0,
IfxIom_LamId_1,
IfxIom_LamId_2,
IfxIom_LamId_3,
IfxIom_LamId_4,
IfxIom_LamId_5,
IfxIom_LamId_6,
IfxIom_LamId_7,
IfxIom_LamId_8,
IfxIom_LamId_9,
IfxIom_LamId_10,
IfxIom_LamId_11,
IfxIom_LamId_12,
IfxIom_LamId_13,
IfxIom_LamId_14,
IfxIom_LamId_15
}
Specifies the Logic Module Analyser Module Number. More...
enum IfxIom_SleepMode {
IfxIom_SleepMode_enable = 0,
IfxIom_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_IOM.CLC.B.EDIS. More...

Functions

IFX_INLINE void | IfxIom_disableModule (Ifx_IOM *iom)
Disables the IOM module . More...
IFX_INLINE void | IfxIom_enableModule (Ifx_IOM *iom, uint8 clockDivider)
Enable the IOM module control. More...
IFX_INLINE void | IfxIom_setSleepMode (Ifx_IOM *iom, IfxIom_SleepMode mode)
Enable/disable the sensitivity of the module to sleep signal. More...
IFX_EXTERN float32 | IfxIom_getFrequency (Ifx_IOM *iom)
Return the frequency used for the filter and timers clock. More...
IFX_EXTERN void | IfxIom_resetModule (Ifx_IOM *iom)
Reset the IOM module. More...

Detailed Description

IOM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxIom.h.


iLLD_TC26B: MSC

Modules | Files
MSC
iLLD
Collaboration diagram for MSC:

Modules

Implementation
Standard Driver
MSC Pin Mapping
How to use the MSC Interface driver?
MSC

Files

file | IfxMsc_cfg.h
MSC on-chip implementation data.
file | IfxMsc_PinMap.c
MSC I/O map.
file | IfxMsc_PinMap.h
MSC I/O map.
file | IfxMsc_Msc.h
MSC MSC details.
file | IfxMsc.h
MSC basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » MSC
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » MSC » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxMsc_Index {
IfxMsc_Index_none = -1,
IfxMsc_Index_0 = 0,
IfxMsc_Index_1
}
List of the available MSC resources. More...

Detailed Description

Enumeration Type Documentation

◆ IfxMsc_Index

enum IfxMsc_Index

List of the available MSC resources.

Enumerator
IfxMsc_Index_none | Not Selected.
IfxMsc_Index_0 | "MSC index "+str(x)
IfxMsc_Index_1 | "MSC index "+str(x)

Definition at line 79 of file IfxMsc_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » MSC
Collaboration diagram for Standard Driver:

Modules

Enumerations
Configure Flags
Set Command Target
Set Data
Get Data
Enable Module
Reset Module
Baud Calculator
IO Pin Configuration Functions
Module Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » MSC » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxMsc_ActivePhaseSelection {
IfxMsc_ActivePhaseSelection_none = 0,
IfxMsc_ActivePhaseSelection_lowLevel = 1
}
Enable SRL/SRH Active Phase Selection Bit
Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL. More...
enum IfxMsc_AsynchronousBlock {
IfxMsc_AsynchronousBlock_bypassed = 0,
IfxMsc_AsynchronousBlock_noBypassed = 1
}
Asynchronous Block Configuration Register - Asynchronous Block Bypass
Definition in Ifx_MSC.ABC.B.ABB. More...
enum IfxMsc_ChipSelectActiveState {
IfxMsc_ChipSelectActiveState_high = 0,
IfxMsc_ChipSelectActiveState_low = 1
}
Output Control Register - Chip Selection Line Polarity
Definition in Ifx_MSC.OCR.B.CSLP. More...
enum IfxMsc_ClockSelect {
IfxMsc_ClockSelect_noClock = 0,
IfxMsc_ClockSelect_fspb = 1,
IfxMsc_ClockSelect_fsri = 2,
IfxMsc_ClockSelect_feray = 4
}
Asynchronous Block Configuration Register - Clock Select
Definition in Ifx_MSC.ABC.B.CLKSEL. More...
enum IfxMsc_CommandDataCommandRepetitionMode {
IfxMsc_CommandDataCommandRepetitionMode_disabled = 0,
IfxMsc_CommandDataCommandRepetitionMode_enabled = 1
}
Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode
Definition in Ifx_MSC.DSCE.B.CDCM. More...
enum IfxMsc_CommandFrameInterrupt {
IfxMsc_CommandFrameInterrupt_disabled = 0,
IfxMsc_CommandFrameInterrupt_enabled = 1
}
Interrupt Control Register - Command Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.ECIE. More...
enum IfxMsc_CommandFrameInterruptNode {
IfxMsc_CommandFrameInterruptNode_SR0 = 0,
IfxMsc_CommandFrameInterruptNode_SR1,
IfxMsc_CommandFrameInterruptNode_SR2,
IfxMsc_CommandFrameInterruptNode_SR3
}
Interrupt Control Register - Command Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.ECIP. More...
enum IfxMsc_CommandFrameLength {
IfxMsc_CommandFrameLength_0 = 0,
IfxMsc_CommandFrameLength_1 = 1,
IfxMsc_CommandFrameLength_2 = 2,
IfxMsc_CommandFrameLength_3,
IfxMsc_CommandFrameLength_4,
IfxMsc_CommandFrameLength_5,
IfxMsc_CommandFrameLength_6,
IfxMsc_CommandFrameLength_7,
IfxMsc_CommandFrameLength_8,
IfxMsc_CommandFrameLength_9,
IfxMsc_CommandFrameLength_10,
IfxMsc_CommandFrameLength_11,
IfxMsc_CommandFrameLength_12,
IfxMsc_CommandFrameLength_13,
IfxMsc_CommandFrameLength_14,
IfxMsc_CommandFrameLength_15,
IfxMsc_CommandFrameLength_16,
IfxMsc_CommandFrameLength_17 = 17,
IfxMsc_CommandFrameLength_18 = 18,
IfxMsc_CommandFrameLength_19,
IfxMsc_CommandFrameLength_20,
IfxMsc_CommandFrameLength_21,
IfxMsc_CommandFrameLength_22,
IfxMsc_CommandFrameLength_23,
IfxMsc_CommandFrameLength_24,
IfxMsc_CommandFrameLength_25,
IfxMsc_CommandFrameLength_26,
IfxMsc_CommandFrameLength_27,
IfxMsc_CommandFrameLength_28,
IfxMsc_CommandFrameLength_29,
IfxMsc_CommandFrameLength_30,
IfxMsc_CommandFrameLength_31,
IfxMsc_CommandFrameLength_32
}
Number of Bits shifted at command frames
Definition in Ifx_MSC.DSC.B.NBC. More...
enum IfxMsc_ControlFrameExtensionPassivePhaseLength {
IfxMsc_ControlFrameExtensionPassivePhaseLength_0 = 0,
IfxMsc_ControlFrameExtensionPassivePhaseLength_1,
IfxMsc_ControlFrameExtensionPassivePhaseLength_2,
IfxMsc_ControlFrameExtensionPassivePhaseLength_3,
IfxMsc_ControlFrameExtensionPassivePhaseLength_4,
IfxMsc_ControlFrameExtensionPassivePhaseLength_5,
IfxMsc_ControlFrameExtensionPassivePhaseLength_6,
IfxMsc_ControlFrameExtensionPassivePhaseLength_7,
IfxMsc_ControlFrameExtensionPassivePhaseLength_8,
IfxMsc_ControlFrameExtensionPassivePhaseLength_9,
IfxMsc_ControlFrameExtensionPassivePhaseLength_10,
IfxMsc_ControlFrameExtensionPassivePhaseLength_11,
IfxMsc_ControlFrameExtensionPassivePhaseLength_12,
IfxMsc_ControlFrameExtensionPassivePhaseLength_13,
IfxMsc_ControlFrameExtensionPassivePhaseLength_14,
IfxMsc_ControlFrameExtensionPassivePhaseLength_15,
IfxMsc_ControlFrameExtensionPassivePhaseLength_16,
IfxMsc_ControlFrameExtensionPassivePhaseLength_17,
IfxMsc_ControlFrameExtensionPassivePhaseLength_18,
IfxMsc_ControlFrameExtensionPassivePhaseLength_19,
IfxMsc_ControlFrameExtensionPassivePhaseLength_20,
IfxMsc_ControlFrameExtensionPassivePhaseLength_21,
IfxMsc_ControlFrameExtensionPassivePhaseLength_22,
IfxMsc_ControlFrameExtensionPassivePhaseLength_23,
IfxMsc_ControlFrameExtensionPassivePhaseLength_24,
IfxMsc_ControlFrameExtensionPassivePhaseLength_25,
IfxMsc_ControlFrameExtensionPassivePhaseLength_26,
IfxMsc_ControlFrameExtensionPassivePhaseLength_27,
IfxMsc_ControlFrameExtensionPassivePhaseLength_28,
IfxMsc_ControlFrameExtensionPassivePhaseLength_29,
IfxMsc_ControlFrameExtensionPassivePhaseLength_30,
IfxMsc_ControlFrameExtensionPassivePhaseLength_31,
IfxMsc_ControlFrameExtensionPassivePhaseLength_32,
IfxMsc_ControlFrameExtensionPassivePhaseLength_33,
IfxMsc_ControlFrameExtensionPassivePhaseLength_34,
IfxMsc_ControlFrameExtensionPassivePhaseLength_35,
IfxMsc_ControlFrameExtensionPassivePhaseLength_36,
IfxMsc_ControlFrameExtensionPassivePhaseLength_37,
IfxMsc_ControlFrameExtensionPassivePhaseLength_38,
IfxMsc_ControlFrameExtensionPassivePhaseLength_39,
IfxMsc_ControlFrameExtensionPassivePhaseLength_40,
IfxMsc_ControlFrameExtensionPassivePhaseLength_41,
IfxMsc_ControlFrameExtensionPassivePhaseLength_42,
IfxMsc_ControlFrameExtensionPassivePhaseLength_43,
IfxMsc_ControlFrameExtensionPassivePhaseLength_44,
IfxMsc_ControlFrameExtensionPassivePhaseLength_45,
IfxMsc_ControlFrameExtensionPassivePhaseLength_46,
IfxMsc_ControlFrameExtensionPassivePhaseLength_47,
IfxMsc_ControlFrameExtensionPassivePhaseLength_48,
IfxMsc_ControlFrameExtensionPassivePhaseLength_49,
IfxMsc_ControlFrameExtensionPassivePhaseLength_50,
IfxMsc_ControlFrameExtensionPassivePhaseLength_51,
IfxMsc_ControlFrameExtensionPassivePhaseLength_52,
IfxMsc_ControlFrameExtensionPassivePhaseLength_53,
IfxMsc_ControlFrameExtensionPassivePhaseLength_54,
IfxMsc_ControlFrameExtensionPassivePhaseLength_55,
IfxMsc_ControlFrameExtensionPassivePhaseLength_56,
IfxMsc_ControlFrameExtensionPassivePhaseLength_57,
IfxMsc_ControlFrameExtensionPassivePhaseLength_58,
IfxMsc_ControlFrameExtensionPassivePhaseLength_59,
IfxMsc_ControlFrameExtensionPassivePhaseLength_60,
IfxMsc_ControlFrameExtensionPassivePhaseLength_61,
IfxMsc_ControlFrameExtensionPassivePhaseLength_62,
IfxMsc_ControlFrameExtensionPassivePhaseLength_63,
IfxMsc_ControlFrameExtensionPassivePhaseLength_64,
IfxMsc_ControlFrameExtensionPassivePhaseLength_65,
IfxMsc_ControlFrameExtensionPassivePhaseLength_66,
IfxMsc_ControlFrameExtensionPassivePhaseLength_67,
IfxMsc_ControlFrameExtensionPassivePhaseLength_68,
IfxMsc_ControlFrameExtensionPassivePhaseLength_69,
IfxMsc_ControlFrameExtensionPassivePhaseLength_70,
IfxMsc_ControlFrameExtensionPassivePhaseLength_71,
IfxMsc_ControlFrameExtensionPassivePhaseLength_72,
IfxMsc_ControlFrameExtensionPassivePhaseLength_73,
IfxMsc_ControlFrameExtensionPassivePhaseLength_74,
IfxMsc_ControlFrameExtensionPassivePhaseLength_75,
IfxMsc_ControlFrameExtensionPassivePhaseLength_76,
IfxMsc_ControlFrameExtensionPassivePhaseLength_77,
IfxMsc_ControlFrameExtensionPassivePhaseLength_78,
IfxMsc_ControlFrameExtensionPassivePhaseLength_79,
IfxMsc_ControlFrameExtensionPassivePhaseLength_80,
IfxMsc_ControlFrameExtensionPassivePhaseLength_81,
IfxMsc_ControlFrameExtensionPassivePhaseLength_82,
IfxMsc_ControlFrameExtensionPassivePhaseLength_83,
IfxMsc_ControlFrameExtensionPassivePhaseLength_84,
IfxMsc_ControlFrameExtensionPassivePhaseLength_85,
IfxMsc_ControlFrameExtensionPassivePhaseLength_86,
IfxMsc_ControlFrameExtensionPassivePhaseLength_87,
IfxMsc_ControlFrameExtensionPassivePhaseLength_88,
IfxMsc_ControlFrameExtensionPassivePhaseLength_89,
IfxMsc_ControlFrameExtensionPassivePhaseLength_90,
IfxMsc_ControlFrameExtensionPassivePhaseLength_91,
IfxMsc_ControlFrameExtensionPassivePhaseLength_92,
IfxMsc_ControlFrameExtensionPassivePhaseLength_93,
IfxMsc_ControlFrameExtensionPassivePhaseLength_94,
IfxMsc_ControlFrameExtensionPassivePhaseLength_95,
IfxMsc_ControlFrameExtensionPassivePhaseLength_96,
IfxMsc_ControlFrameExtensionPassivePhaseLength_97,
IfxMsc_ControlFrameExtensionPassivePhaseLength_98,
IfxMsc_ControlFrameExtensionPassivePhaseLength_99,
IfxMsc_ControlFrameExtensionPassivePhaseLength_100,
IfxMsc_ControlFrameExtensionPassivePhaseLength_101,
IfxMsc_ControlFrameExtensionPassivePhaseLength_102,
IfxMsc_ControlFrameExtensionPassivePhaseLength_103,
IfxMsc_ControlFrameExtensionPassivePhaseLength_104,
IfxMsc_ControlFrameExtensionPassivePhaseLength_105,
IfxMsc_ControlFrameExtensionPassivePhaseLength_106,
IfxMsc_ControlFrameExtensionPassivePhaseLength_107,
IfxMsc_ControlFrameExtensionPassivePhaseLength_108,
IfxMsc_ControlFrameExtensionPassivePhaseLength_109,
IfxMsc_ControlFrameExtensionPassivePhaseLength_110,
IfxMsc_ControlFrameExtensionPassivePhaseLength_111,
IfxMsc_ControlFrameExtensionPassivePhaseLength_112,
IfxMsc_ControlFrameExtensionPassivePhaseLength_113,
IfxMsc_ControlFrameExtensionPassivePhaseLength_114,
IfxMsc_ControlFrameExtensionPassivePhaseLength_115,
IfxMsc_ControlFrameExtensionPassivePhaseLength_116,
IfxMsc_ControlFrameExtensionPassivePhaseLength_117,
IfxMsc_ControlFrameExtensionPassivePhaseLength_118,
IfxMsc_ControlFrameExtensionPassivePhaseLength_119,
IfxMsc_ControlFrameExtensionPassivePhaseLength_120,
IfxMsc_ControlFrameExtensionPassivePhaseLength_121,
IfxMsc_ControlFrameExtensionPassivePhaseLength_122,
IfxMsc_ControlFrameExtensionPassivePhaseLength_123,
IfxMsc_ControlFrameExtensionPassivePhaseLength_124,
IfxMsc_ControlFrameExtensionPassivePhaseLength_125,
IfxMsc_ControlFrameExtensionPassivePhaseLength_126,
IfxMsc_ControlFrameExtensionPassivePhaseLength_127
}
Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension
Definition in Ifx_MSC.DSTE.B.PPCE. More...
enum IfxMsc_DataFrameExtensionPassivePhaseLength {
IfxMsc_DataFrameExtensionPassivePhaseLength_0 = 0,
IfxMsc_DataFrameExtensionPassivePhaseLength_1,
IfxMsc_DataFrameExtensionPassivePhaseLength_2,
IfxMsc_DataFrameExtensionPassivePhaseLength_3
}
Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension
Definition in Ifx_MSC.DSTE.B.PPDE. More...
enum IfxMsc_DataFrameInterrupt {
IfxMsc_DataFrameInterrupt_disabled = 0,
IfxMsc_DataFrameInterrupt_atLastDataBit = 1,
IfxMsc_DataFrameInterrupt_atFirstDataBit = 2
}
Interrupt Control Register - Data Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.EDIE. More...
enum IfxMsc_DataFrameInterruptNode {
IfxMsc_DataFrameInterruptNode_SR0 = 0,
IfxMsc_DataFrameInterruptNode_SR1,
IfxMsc_DataFrameInterruptNode_SR2,
IfxMsc_DataFrameInterruptNode_SR3
}
Interrupt Control Register - Data Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.EDIP. More...
enum IfxMsc_DataFrameLength {
IfxMsc_DataFrameLength_0 = 0,
IfxMsc_DataFrameLength_1 = 1,
IfxMsc_DataFrameLength_2 = 2,
IfxMsc_DataFrameLength_3,
IfxMsc_DataFrameLength_4,
IfxMsc_DataFrameLength_5,
IfxMsc_DataFrameLength_6,
IfxMsc_DataFrameLength_7,
IfxMsc_DataFrameLength_8,
IfxMsc_DataFrameLength_9,
IfxMsc_DataFrameLength_10,
IfxMsc_DataFrameLength_11,
IfxMsc_DataFrameLength_12,
IfxMsc_DataFrameLength_13,
IfxMsc_DataFrameLength_14,
IfxMsc_DataFrameLength_15,
IfxMsc_DataFrameLength_16
}
Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames
Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL. More...
enum IfxMsc_DataFramePassivePhaseLength {
IfxMsc_DataFramePassivePhaseLength_2 = 2,
IfxMsc_DataFramePassivePhaseLength_3,
IfxMsc_DataFramePassivePhaseLength_4,
IfxMsc_DataFramePassivePhaseLength_5,
IfxMsc_DataFramePassivePhaseLength_6,
IfxMsc_DataFramePassivePhaseLength_7,
IfxMsc_DataFramePassivePhaseLength_8,
IfxMsc_DataFramePassivePhaseLength_9,
IfxMsc_DataFramePassivePhaseLength_10,
IfxMsc_DataFramePassivePhaseLength_11,
IfxMsc_DataFramePassivePhaseLength_12,
IfxMsc_DataFramePassivePhaseLength_13,
IfxMsc_DataFramePassivePhaseLength_14,
IfxMsc_DataFramePassivePhaseLength_15,
IfxMsc_DataFramePassivePhaseLength_16,
IfxMsc_DataFramePassivePhaseLength_17,
IfxMsc_DataFramePassivePhaseLength_18,
IfxMsc_DataFramePassivePhaseLength_19,
IfxMsc_DataFramePassivePhaseLength_20,
IfxMsc_DataFramePassivePhaseLength_21,
IfxMsc_DataFramePassivePhaseLength_22,
IfxMsc_DataFramePassivePhaseLength_23,
IfxMsc_DataFramePassivePhaseLength_24,
IfxMsc_DataFramePassivePhaseLength_25,
IfxMsc_DataFramePassivePhaseLength_26,
IfxMsc_DataFramePassivePhaseLength_27,
IfxMsc_DataFramePassivePhaseLength_28,
IfxMsc_DataFramePassivePhaseLength_29,
IfxMsc_DataFramePassivePhaseLength_30,
IfxMsc_DataFramePassivePhaseLength_31,
IfxMsc_DataFramePassivePhaseLength_32
}
Passive Phase Length at Data Frames
Definition in Ifx_MSC.DSC.B.PPD. More...
enum IfxMsc_DividerMode {
IfxMsc_DividerMode_normal = 1,
IfxMsc_DividerMode_fractional = 2
}
Divider mode. More...
enum IfxMsc_EmergencyStop {
IfxMsc_EmergencyStop_disabled = 0,
IfxMsc_EmergencyStop_enabled = 1
}
Emergency Stop Register - Emergency stop feature Enable or Disable - SRL and SRH
Definition in Ifx_MSC.ESR. More...
enum IfxMsc_Extension {
IfxMsc_Extension_disabled = 0,
IfxMsc_Extension_enabled = 1
}
Downstream Control Enhanced Register - Extension Enable
Definition in Ifx_MSC.DSCE.B.NDBLE. More...
enum IfxMsc_ExternalBitInjectionPosition {
IfxMsc_ExternalBitInjectionPosition_0 = 0,
IfxMsc_ExternalBitInjectionPosition_1,
IfxMsc_ExternalBitInjectionPosition_2,
IfxMsc_ExternalBitInjectionPosition_3,
IfxMsc_ExternalBitInjectionPosition_4,
IfxMsc_ExternalBitInjectionPosition_5,
IfxMsc_ExternalBitInjectionPosition_6,
IfxMsc_ExternalBitInjectionPosition_7,
IfxMsc_ExternalBitInjectionPosition_8,
IfxMsc_ExternalBitInjectionPosition_9,
IfxMsc_ExternalBitInjectionPosition_10,
IfxMsc_ExternalBitInjectionPosition_11,
IfxMsc_ExternalBitInjectionPosition_12,
IfxMsc_ExternalBitInjectionPosition_13,
IfxMsc_ExternalBitInjectionPosition_14,
IfxMsc_ExternalBitInjectionPosition_15,
IfxMsc_ExternalBitInjectionPosition_16,
IfxMsc_ExternalBitInjectionPosition_17,
IfxMsc_ExternalBitInjectionPosition_18,
IfxMsc_ExternalBitInjectionPosition_19,
IfxMsc_ExternalBitInjectionPosition_20,
IfxMsc_ExternalBitInjectionPosition_21,
IfxMsc_ExternalBitInjectionPosition_22,
IfxMsc_ExternalBitInjectionPosition_23,
IfxMsc_ExternalBitInjectionPosition_24,
IfxMsc_ExternalBitInjectionPosition_25,
IfxMsc_ExternalBitInjectionPosition_26,
IfxMsc_ExternalBitInjectionPosition_27,
IfxMsc_ExternalBitInjectionPosition_28,
IfxMsc_ExternalBitInjectionPosition_29,
IfxMsc_ExternalBitInjectionPosition_30,
IfxMsc_ExternalBitInjectionPosition_31,
IfxMsc_ExternalBitInjectionPosition_32,
IfxMsc_ExternalBitInjectionPosition_33,
IfxMsc_ExternalBitInjectionPosition_34,
IfxMsc_ExternalBitInjectionPosition_35,
IfxMsc_ExternalBitInjectionPosition_36,
IfxMsc_ExternalBitInjectionPosition_37,
IfxMsc_ExternalBitInjectionPosition_38,
IfxMsc_ExternalBitInjectionPosition_39,
IfxMsc_ExternalBitInjectionPosition_40,
IfxMsc_ExternalBitInjectionPosition_41,
IfxMsc_ExternalBitInjectionPosition_42,
IfxMsc_ExternalBitInjectionPosition_43,
IfxMsc_ExternalBitInjectionPosition_44,
IfxMsc_ExternalBitInjectionPosition_45,
IfxMsc_ExternalBitInjectionPosition_46,
IfxMsc_ExternalBitInjectionPosition_47,
IfxMsc_ExternalBitInjectionPosition_48,
IfxMsc_ExternalBitInjectionPosition_49,
IfxMsc_ExternalBitInjectionPosition_50,
IfxMsc_ExternalBitInjectionPosition_51,
IfxMsc_ExternalBitInjectionPosition_52,
IfxMsc_ExternalBitInjectionPosition_53,
IfxMsc_ExternalBitInjectionPosition_54,
IfxMsc_ExternalBitInjectionPosition_55,
IfxMsc_ExternalBitInjectionPosition_56,
IfxMsc_ExternalBitInjectionPosition_57,
IfxMsc_ExternalBitInjectionPosition_58,
IfxMsc_ExternalBitInjectionPosition_59,
IfxMsc_ExternalBitInjectionPosition_60,
IfxMsc_ExternalBitInjectionPosition_61,
IfxMsc_ExternalBitInjectionPosition_62,
IfxMsc_ExternalBitInjectionPosition_63
}
Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJPOSP0 and Ifx_MSC.DSCE.B.INJPOSP1. More...
enum IfxMsc_ExternalSignalInjection {
IfxMsc_ExternalSignalInjection_disabled = 0,
IfxMsc_ExternalSignalInjection_enabled = 1
}
Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJENP0 and Ifx_MSC.DSCE.B.INJENP1. More...
enum IfxMsc_FclClockControlEnabled {
IfxMsc_FclClockControlEnabled_activePhaseOnly = 0,
IfxMsc_FclClockControlEnabled_always = 1
}
Output Control Register - Clock Control
Definition in Ifx_MSC.OCR.B.CLKCTRL. More...
enum IfxMsc_FclLinePolarity {
IfxMsc_FclLinePolarity_nonInverted = 0,
IfxMsc_FclLinePolarity_inverted = 1
}
Output Control Register - FCLP Line Polarity
Definition in Ifx_MSC.OCR.B.CLP. More...
enum IfxMsc_HardwareClock {
IfxMsc_HardwareClock_disabled = 0,
IfxMsc_HardwareClock_enabled = 1
}
Enable hardware clock control. More...
enum IfxMsc_InterruptServiceRequest {
IfxMsc_InterruptServiceRequest_0 = 0,
IfxMsc_InterruptServiceRequest_1,
IfxMsc_InterruptServiceRequest_2,
IfxMsc_InterruptServiceRequest_3,
IfxMsc_InterruptServiceRequest_4
}
Interrupt Service Request. More...
enum IfxMsc_ModuleSuspendRequestBit {
IfxMsc_ModuleSuspendRequestBit_noSuspend = 0,
IfxMsc_ModuleSuspendRequestBit_hardSuspend = 1,
IfxMsc_ModuleSuspendRequestBit_softSuspend = 2
}
OCDS Control and Status - OCDS Suspend Control Definition in Ifx_MSC.OCS.B.SUS. More...
enum IfxMsc_MsbBitDataExtension {
IfxMsc_MsbBitDataExtension_notPresent = 0,
IfxMsc_MsbBitDataExtension_present = 1
}
Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/NDBH)
Definition in Ifx_MSC.DSCE.B.NDBLE and Ifx_MSC.DSCE.B.NDBHE. More...
enum IfxMsc_NDividerAbra {
IfxMsc_NDividerAbra_1 = 0,
IfxMsc_NDividerAbra_2,
IfxMsc_NDividerAbra_3,
IfxMsc_NDividerAbra_4,
IfxMsc_NDividerAbra_5,
IfxMsc_NDividerAbra_6,
IfxMsc_NDividerAbra_7,
IfxMsc_NDividerAbra_8
}
Asynchronous Block Configuration Register - N Divider ABRA
Definition in Ifx_MSC.ABC.B.NDA. More...
enum IfxMsc_NDividerDownstream {
IfxMsc_NDividerDownstream_1 = 0,
IfxMsc_NDividerDownstream_2,
IfxMsc_NDividerDownstream_3,
IfxMsc_NDividerDownstream_4,
IfxMsc_NDividerDownstream_5,
IfxMsc_NDividerDownstream_6,
IfxMsc_NDividerDownstream_7,
IfxMsc_NDividerDownstream_8,
IfxMsc_NDividerDownstream_9,
IfxMsc_NDividerDownstream_10,
IfxMsc_NDividerDownstream_11,
IfxMsc_NDividerDownstream_12,
IfxMsc_NDividerDownstream_13,
IfxMsc_NDividerDownstream_14,
IfxMsc_NDividerDownstream_15,
IfxMsc_NDividerDownstream_16
}
Downstream Timing Extension Register - N Divider Downstream
Definition in Ifx_MSC.DSTE.B.NDD. More...
enum IfxMsc_OverflowInterrupt {
IfxMsc_OverflowInterrupt_disabled = 0,
IfxMsc_OverflowInterrupt_enabled = 1
}
Asynchronous Block Configuration Register - Overflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.OIE. More...
enum IfxMsc_OverflowInterruptNode {
IfxMsc_OverflowInterruptNode_SR0 = 0,
IfxMsc_OverflowInterruptNode_SR1,
IfxMsc_OverflowInterruptNode_SR2,
IfxMsc_OverflowInterruptNode_SR3,
IfxMsc_OverflowInterruptNode_SR4
}
Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.OIP. More...
enum IfxMsc_Parity {
IfxMsc_Parity_even = 0,
IfxMsc_Parity_odd = 1
}
Parity Mode
Definition in Ifx_MSC.USR.B.PCT. More...
enum IfxMsc_PassiveTimeFrameCount {
IfxMsc_PassiveTimeFrameCount_0 = 0,
IfxMsc_PassiveTimeFrameCount_1 = 1,
IfxMsc_PassiveTimeFrameCount_2,
IfxMsc_PassiveTimeFrameCount_3,
IfxMsc_PassiveTimeFrameCount_4,
IfxMsc_PassiveTimeFrameCount_5,
IfxMsc_PassiveTimeFrameCount_6,
IfxMsc_PassiveTimeFrameCount_7,
IfxMsc_PassiveTimeFrameCount_8,
IfxMsc_PassiveTimeFrameCount_9,
IfxMsc_PassiveTimeFrameCount_10,
IfxMsc_PassiveTimeFrameCount_11,
IfxMsc_PassiveTimeFrameCount_12,
IfxMsc_PassiveTimeFrameCount_13,
IfxMsc_PassiveTimeFrameCount_14,
IfxMsc_PassiveTimeFrameCount_15
}
Downstream Status Register - Number Of Passive Time Frames
Definition in Ifx_MSC.DSS.B.NPTF. More...
enum IfxMsc_ReceiveDataInterrupt {
IfxMsc_ReceiveDataInterrupt_disabled = 0,
IfxMsc_ReceiveDataInterrupt_onDataReceive = 1,
IfxMsc_ReceiveDataInterrupt_onRdieSet = 2,
IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 = 3
}
Interrupt Control Register - Receive Data Interrupt Enable
Definition in Ifx_MSC.ICR.B.RDIE. More...
enum IfxMsc_ReceiveDataInterruptNode {
IfxMsc_ReceiveDataInterruptNode_SR0 = 0,
IfxMsc_ReceiveDataInterruptNode_SR1,
IfxMsc_ReceiveDataInterruptNode_SR2,
IfxMsc_ReceiveDataInterruptNode_SR3
}
Interrupt Control Register - Receive Data Interrupt Pointer
Definition in Ifx_MSC.ICR.B.RDIP. More...
enum IfxMsc_SdiLinePolarity {
IfxMsc_SdiLinePolarity_likeSi = 0,
IfxMsc_SdiLinePolarity_invertedSi = 1
}
Output Control Register - SDI Line Polarity
Definition in Ifx_MSC.OCR.B.ILP. More...
enum IfxMsc_SerialDataInput {
IfxMsc_SerialDataInput_0 = 0,
IfxMsc_SerialDataInput_1,
IfxMsc_SerialDataInput_2,
IfxMsc_SerialDataInput_3,
IfxMsc_SerialDataInput_4,
IfxMsc_SerialDataInput_5,
IfxMsc_SerialDataInput_6,
IfxMsc_SerialDataInput_7
}
Output Control Register - Serial Data Input Selection
Definition in Ifx_MSC.OCR.B.SDISEL. More...
enum IfxMsc_ServiceRequestDelay {
IfxMsc_ServiceRequestDelay_noDelay = 0,
IfxMsc_ServiceRequestDelay_1bit = 1
}
Service Request Delay
Definition in Ifx_MSC.USR.B.SRDC. More...
enum IfxMsc_ShiftClockPhaseDuration {
IfxMsc_ShiftClockPhaseDuration_1 = 0,
IfxMsc_ShiftClockPhaseDuration_2,
IfxMsc_ShiftClockPhaseDuration_3,
IfxMsc_ShiftClockPhaseDuration_4,
IfxMsc_ShiftClockPhaseDuration_5,
IfxMsc_ShiftClockPhaseDuration_6,
IfxMsc_ShiftClockPhaseDuration_7,
IfxMsc_ShiftClockPhaseDuration_8,
IfxMsc_ShiftClockPhaseDuration_9,
IfxMsc_ShiftClockPhaseDuration_10,
IfxMsc_ShiftClockPhaseDuration_11,
IfxMsc_ShiftClockPhaseDuration_12,
IfxMsc_ShiftClockPhaseDuration_13,
IfxMsc_ShiftClockPhaseDuration_14,
IfxMsc_ShiftClockPhaseDuration_15,
IfxMsc_ShiftClockPhaseDuration_16
}
Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock
Definition in Ifx_MSC.ABC.B.LOW and Ifx_MSC.ABC.B.HIGH. More...
enum IfxMsc_SleepMode {
IfxMsc_SleepMode_enable = 0,
IfxMsc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_MSC.CLC.B.EDIS. More...
enum IfxMsc_SoLinePolarity {
IfxMsc_SoLinePolarity_nonInverted = 0,
IfxMsc_SoLinePolarity_inverted = 1
}
Output Control Register - SOP Line Polarity
Definition in Ifx_MSC.OCR.B.SLP. More...
enum IfxMsc_Source {
IfxMsc_Source_downstreamDataRegister = 0,
IfxMsc_Source_alternateInputLine = 2,
IfxMsc_Source_alternateInputLineInverted = 3
}
Downstream Select Data Source Low Register - Select Source for - SRL and SRHNumber Of Passive Time Frames
Definition in Ifx_MSC.DSDSL and Ifx_MSC.DSDSH. More...
enum IfxMsc_SuspendMode {
IfxMsc_SuspendMode_none = 0,
IfxMsc_SuspendMode_hard = 1,
IfxMsc_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxMsc_Target {
IfxMsc_Target_en0 = 0,
IfxMsc_Target_en1,
IfxMsc_Target_en2,
IfxMsc_Target_en3
}
Msc Targets - use as chip enable selection for ENH, ENL and ENC. More...
enum IfxMsc_TimeFrameInterrupt {
IfxMsc_TimeFrameInterrupt_disabled = 0,
IfxMsc_TimeFrameInterrupt_enabled = 1
}
Interrupt Control Register - Time Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.TFIE. More...
enum IfxMsc_TimeFrameInterruptNode {
IfxMsc_TimeFrameInterruptNode_SR0 = 0,
IfxMsc_TimeFrameInterruptNode_SR1,
IfxMsc_TimeFrameInterruptNode_SR2,
IfxMsc_TimeFrameInterruptNode_SR3
}
Interrupt Control Register - Time Frame Interrupt Pointer
Definition in Ifx_MSC.ICR.B.TFIP. More...
enum IfxMsc_TransmissionMode {
IfxMsc_TransmissionMode_triggered = 0,
IfxMsc_TransmissionMode_dataRepetition = 1
}
Downstream Channel Transmission Mode
Definition in Ifx_MSC.DSC.B.TM. More...
enum IfxMsc_UnderflowInterrupt {
IfxMsc_UnderflowInterrupt_disabled = 0,
IfxMsc_UnderflowInterrupt_enabled = 1
}
Asynchronous Block Configuration Register - Underflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.UIE. More...
enum IfxMsc_UnderflowInterruptNode {
IfxMsc_UnderflowInterruptNode_SR0 = 0,
IfxMsc_UnderflowInterruptNode_SR1,
IfxMsc_UnderflowInterruptNode_SR2,
IfxMsc_UnderflowInterruptNode_SR3,
IfxMsc_UnderflowInterruptNode_SR4
}
Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.UIP. More...
enum IfxMsc_UpstreamChannelFrameType {
IfxMsc_UpstreamChannelFrameType_12bit = 0,
IfxMsc_UpstreamChannelFrameType_16bit = 1
}
Channel Frame Type
Definition in Ifx_MSC.USR.B.UFT. More...
enum IfxMsc_UpstreamChannelReceivingRate {
IfxMsc_UpstreamChannelReceivingRate_disabled = 0,
IfxMsc_UpstreamChannelReceivingRate_4 = 1,
IfxMsc_UpstreamChannelReceivingRate_8 = 2,
IfxMsc_UpstreamChannelReceivingRate_16 = 3,
IfxMsc_UpstreamChannelReceivingRate_32 = 4,
IfxMsc_UpstreamChannelReceivingRate_64 = 5,
IfxMsc_UpstreamChannelReceivingRate_128 = 6,
IfxMsc_UpstreamChannelReceivingRate_256 = 7
}
Upstream Receiving Rate
Definition in Ifx_MSC.USR.B.URR. More...
enum IfxMsc_UpstreamTimeoutInterrupt {
IfxMsc_UpstreamTimeoutInterrupt_disabled = 0,
IfxMsc_UpstreamTimeoutInterrupt_enabled = 1
}
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable
Definition in Ifx_MSC.USCE.B.USTOEN. More...
enum IfxMsc_UpstreamTimeoutInterruptNode {
IfxMsc_UpstreamTimeoutInterruptNode_SR0 = 0,
IfxMsc_UpstreamTimeoutInterruptNode_SR1,
IfxMsc_UpstreamTimeoutInterruptNode_SR2,
IfxMsc_UpstreamTimeoutInterruptNode_SR3,
IfxMsc_UpstreamTimeoutInterruptNode_SR4
}
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer
Definition in Ifx_MSC.USCE.B.USTOIP. More...
enum IfxMsc_UpstreamTimeoutPrescaler {
IfxMsc_UpstreamTimeoutPrescaler_1 = 0,
IfxMsc_UpstreamTimeoutPrescaler_2 = 1,
IfxMsc_UpstreamTimeoutPrescaler_4 = 2,
IfxMsc_UpstreamTimeoutPrescaler_8 = 3,
IfxMsc_UpstreamTimeoutPrescaler_16 = 4,
IfxMsc_UpstreamTimeoutPrescaler_32 = 5,
IfxMsc_UpstreamTimeoutPrescaler_64 = 6,
IfxMsc_UpstreamTimeoutPrescaler_128 = 7,
IfxMsc_UpstreamTimeoutPrescaler_256 = 8,
IfxMsc_UpstreamTimeoutPrescaler_512 = 9,
IfxMsc_UpstreamTimeoutPrescaler_1024 = 10,
IfxMsc_UpstreamTimeoutPrescaler_2048 = 11,
IfxMsc_UpstreamTimeoutPrescaler_4096 = 12,
IfxMsc_UpstreamTimeoutPrescaler_8192 = 13,
IfxMsc_UpstreamTimeoutPrescaler_16384 = 14,
IfxMsc_UpstreamTimeoutPrescaler_32768 = 15
}
Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler
Definition in Ifx_MSC.USCE.B.USTOPRE. More...
enum IfxMsc_UpstreamTimeoutValue {
IfxMsc_UpstreamTimeoutValue_1 = 0,
IfxMsc_UpstreamTimeoutValue_2,
IfxMsc_UpstreamTimeoutValue_3,
IfxMsc_UpstreamTimeoutValue_4,
IfxMsc_UpstreamTimeoutValue_5,
IfxMsc_UpstreamTimeoutValue_6,
IfxMsc_UpstreamTimeoutValue_7,
IfxMsc_UpstreamTimeoutValue_8,
IfxMsc_UpstreamTimeoutValue_9,
IfxMsc_UpstreamTimeoutValue_10,
IfxMsc_UpstreamTimeoutValue_11,
IfxMsc_UpstreamTimeoutValue_12,
IfxMsc_UpstreamTimeoutValue_13,
IfxMsc_UpstreamTimeoutValue_14,
IfxMsc_UpstreamTimeoutValue_15,
IfxMsc_UpstreamTimeoutValue_16
}
Upstream Control Enhanced Register 1 - Upstream Timeout Value
Definition in Ifx_MSC.USCE.B.USTOVAL. More...

Detailed Description

Enumeration Type Documentation

◆ IfxMsc_ActivePhaseSelection

enum IfxMsc_ActivePhaseSelection

Enable SRL/SRH Active Phase Selection Bit
Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL.

Enumerator
IfxMsc_ActivePhaseSelection_none | No selection bit inserted.
IfxMsc_ActivePhaseSelection_lowLevel | Low level selection bit inserted.

Definition at line 87 of file IfxMsc.h.

◆ IfxMsc_AsynchronousBlock

enum IfxMsc_AsynchronousBlock

Asynchronous Block Configuration Register - Asynchronous Block Bypass
Definition in Ifx_MSC.ABC.B.ABB.

Enumerator
IfxMsc_AsynchronousBlock_bypassed | Asynchronous block and the n-divider of the MSC downstream path are bypassed and are disabled.
IfxMsc_AsynchronousBlock_noBypassed | Asynchronous block and the n-divider of the MSC downstream path are active.

Definition at line 96 of file IfxMsc.h.

◆ IfxMsc_ChipSelectActiveState

enum IfxMsc_ChipSelectActiveState

Output Control Register - Chip Selection Line Polarity
Definition in Ifx_MSC.OCR.B.CSLP.

Enumerator
IfxMsc_ChipSelectActiveState_high | EN[3:0] and ENL,ENH,ENC polarities are identical.
IfxMsc_ChipSelectActiveState_low | EN[3:0] and ENL,ENH,ENC polarities are inverted.

Definition at line 105 of file IfxMsc.h.

◆ IfxMsc_ClockSelect

enum IfxMsc_ClockSelect

Asynchronous Block Configuration Register - Clock Select
Definition in Ifx_MSC.ABC.B.CLKSEL.

Enumerator
IfxMsc_ClockSelect_noClock | no clock source for the ABRA block
IfxMsc_ClockSelect_fspb | f_SPB is the clock source for the ABRA block
IfxMsc_ClockSelect_fsri | f_SRI is the clock source for the ABRA block
IfxMsc_ClockSelect_feray | f_ERAY is the clock source for the ABRA block

Definition at line 114 of file IfxMsc.h.

◆ IfxMsc_CommandDataCommandRepetitionMode

enum IfxMsc_CommandDataCommandRepetitionMode

Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode
Definition in Ifx_MSC.DSCE.B.CDCM.

Enumerator
IfxMsc_CommandDataCommandRepetitionMode_disabled | Disables the automatic insertion of data.
IfxMsc_CommandDataCommandRepetitionMode_enabled | Enables the automatic insertion of data.

Definition at line 125 of file IfxMsc.h.

◆ IfxMsc_CommandFrameInterrupt

enum IfxMsc_CommandFrameInterrupt

Interrupt Control Register - Command Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.ECIE.

Enumerator
IfxMsc_CommandFrameInterrupt_disabled | Interrupt generation disabled.
IfxMsc_CommandFrameInterrupt_enabled | Interrupt generation enabled.

Definition at line 134 of file IfxMsc.h.

◆ IfxMsc_CommandFrameInterruptNode

enum IfxMsc_CommandFrameInterruptNode

Interrupt Control Register - Command Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.ECIP.

Enumerator
IfxMsc_CommandFrameInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_CommandFrameInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_CommandFrameInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_CommandFrameInterruptNode_SR3 | Service request output SR3 selected.

Definition at line 143 of file IfxMsc.h.

◆ IfxMsc_CommandFrameLength

enum IfxMsc_CommandFrameLength

Number of Bits shifted at command frames
Definition in Ifx_MSC.DSC.B.NBC.

Enumerator
IfxMsc_CommandFrameLength_0 | No bit shifted.
IfxMsc_CommandFrameLength_1 | SRL[0] Shifted.
IfxMsc_CommandFrameLength_2 | SRL[1:0] Shifted.
IfxMsc_CommandFrameLength_3 | SRL[2:0] Shifted.
IfxMsc_CommandFrameLength_4 | SRL[3:0] Shifted.
IfxMsc_CommandFrameLength_5 | SRL[4:0] Shifted.
IfxMsc_CommandFrameLength_6 | SRL[5:0] Shifted.
IfxMsc_CommandFrameLength_7 | SRL[6:0] Shifted.
IfxMsc_CommandFrameLength_8 | SRL[7:0] Shifted.
IfxMsc_CommandFrameLength_9 | SRL[8:0] Shifted.
IfxMsc_CommandFrameLength_10 | SRL[9:0] Shifted.
IfxMsc_CommandFrameLength_11 | SRL[10:0] Shifted.
IfxMsc_CommandFrameLength_12 | SRL[11:0] Shifted.
IfxMsc_CommandFrameLength_13 | SRL[12:0] Shifted.
IfxMsc_CommandFrameLength_14 | SRL[13:0] Shifted.
IfxMsc_CommandFrameLength_15 | SRL[14:0] Shifted.
IfxMsc_CommandFrameLength_16 | SRL[15:0] Shifted.
IfxMsc_CommandFrameLength_17 | SRL[15:0] and SRH[0] Shifted.
IfxMsc_CommandFrameLength_18 | SRL[15:0] and SRH[1:0] Shifted.
IfxMsc_CommandFrameLength_19 | SRL[15:0] and SRH[2:0] Shifted.
IfxMsc_CommandFrameLength_20 | SRL[15:0] and SRH[3:0] Shifted.
IfxMsc_CommandFrameLength_21 | SRL[15:0] and SRH[4:0] Shifted.
IfxMsc_CommandFrameLength_22 | SRL[15:0] and SRH[5:0] Shifted.
IfxMsc_CommandFrameLength_23 | SRL[15:0] and SRH[6:0] Shifted.
IfxMsc_CommandFrameLength_24 | SRL[15:0] and SRH[7:0] Shifted.
IfxMsc_CommandFrameLength_25 | SRL[15:0] and SRH[8:0] Shifted.
IfxMsc_CommandFrameLength_26 | SRL[15:0] and SRH[9:0] Shifted.
IfxMsc_CommandFrameLength_27 | SRL[15:0] and SRH[10:0] Shifted.
IfxMsc_CommandFrameLength_28 | SRL[15:0] and SRH[11:0] Shifted.
IfxMsc_CommandFrameLength_29 | SRL[15:0] and SRH[12:0] Shifted.
IfxMsc_CommandFrameLength_30 | SRL[15:0] and SRH[13:0] Shifted.
IfxMsc_CommandFrameLength_31 | SRL[15:0] and SRH[14:0] Shifted.
IfxMsc_CommandFrameLength_32 | SRL[15:0] and SRH[15:0] Shifted.

Definition at line 154 of file IfxMsc.h.

◆ IfxMsc_ControlFrameExtensionPassivePhaseLength

enum IfxMsc_ControlFrameExtensionPassivePhaseLength

Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension
Definition in Ifx_MSC.DSTE.B.PPCE.

Enumerator
IfxMsc_ControlFrameExtensionPassivePhaseLength_0 | Length of Command frames passive phase is 2.
IfxMsc_ControlFrameExtensionPassivePhaseLength_1 | Length of Command frames passive phase is 3.
IfxMsc_ControlFrameExtensionPassivePhaseLength_2 | Length of Command frames passive phase is 4.
IfxMsc_ControlFrameExtensionPassivePhaseLength_3 | Length of Command frames passive phase is 5.
IfxMsc_ControlFrameExtensionPassivePhaseLength_4 | Length of Command frames passive phase is 6.
IfxMsc_ControlFrameExtensionPassivePhaseLength_5 | Length of Command frames passive phase is 7.
IfxMsc_ControlFrameExtensionPassivePhaseLength_6 | Length of Command frames passive phase is 8.
IfxMsc_ControlFrameExtensionPassivePhaseLength_7 | Length of Command frames passive phase is 9.
IfxMsc_ControlFrameExtensionPassivePhaseLength_8 | Length of Command frames passive phase is 10.
IfxMsc_ControlFrameExtensionPassivePhaseLength_9 | Length of Command frames passive phase is 11.
IfxMsc_ControlFrameExtensionPassivePhaseLength_10 | Length of Command frames passive phase is 12.
IfxMsc_ControlFrameExtensionPassivePhaseLength_11 | Length of Command frames passive phase is 13.
IfxMsc_ControlFrameExtensionPassivePhaseLength_12 | Length of Command frames passive phase is 14.
IfxMsc_ControlFrameExtensionPassivePhaseLength_13 | Length of Command frames passive phase is 15.
IfxMsc_ControlFrameExtensionPassivePhaseLength_14 | Length of Command frames passive phase is 16.
IfxMsc_ControlFrameExtensionPassivePhaseLength_15 | Length of Command frames passive phase is 17.
IfxMsc_ControlFrameExtensionPassivePhaseLength_16 | Length of Command frames passive phase is 18.
IfxMsc_ControlFrameExtensionPassivePhaseLength_17 | Length of Command frames passive phase is 19.
IfxMsc_ControlFrameExtensionPassivePhaseLength_18 | Length of Command frames passive phase is 20.
IfxMsc_ControlFrameExtensionPassivePhaseLength_19 | Length of Command frames passive phase is 21.
IfxMsc_ControlFrameExtensionPassivePhaseLength_20 | Length of Command frames passive phase is 22.
IfxMsc_ControlFrameExtensionPassivePhaseLength_21 | Length of Command frames passive phase is 23.
IfxMsc_ControlFrameExtensionPassivePhaseLength_22 | Length of Command frames passive phase is 24.
IfxMsc_ControlFrameExtensionPassivePhaseLength_23 | Length of Command frames passive phase is 25.
IfxMsc_ControlFrameExtensionPassivePhaseLength_24 | Length of Command frames passive phase is 26.
IfxMsc_ControlFrameExtensionPassivePhaseLength_25 | Length of Command frames passive phase is 27.
IfxMsc_ControlFrameExtensionPassivePhaseLength_26 | Length of Command frames passive phase is 28.
IfxMsc_ControlFrameExtensionPassivePhaseLength_27 | Length of Command frames passive phase is 29.
IfxMsc_ControlFrameExtensionPassivePhaseLength_28 | Length of Command frames passive phase is 30.
IfxMsc_ControlFrameExtensionPassivePhaseLength_29 | Length of Command frames passive phase is 31.
IfxMsc_ControlFrameExtensionPassivePhaseLength_30 | Length of Command frames passive phase is 32.
IfxMsc_ControlFrameExtensionPassivePhaseLength_31 | Length of Command frames passive phase is 33.
IfxMsc_ControlFrameExtensionPassivePhaseLength_32 | Length of Command frames passive phase is 34.
IfxMsc_ControlFrameExtensionPassivePhaseLength_33 | Length of Command frames passive phase is 35.
IfxMsc_ControlFrameExtensionPassivePhaseLength_34 | Length of Command frames passive phase is 36.
IfxMsc_ControlFrameExtensionPassivePhaseLength_35 | Length of Command frames passive phase is 37.
IfxMsc_ControlFrameExtensionPassivePhaseLength_36 | Length of Command frames passive phase is 38.
IfxMsc_ControlFrameExtensionPassivePhaseLength_37 | Length of Command frames passive phase is 39.
IfxMsc_ControlFrameExtensionPassivePhaseLength_38 | Length of Command frames passive phase is 40.
IfxMsc_ControlFrameExtensionPassivePhaseLength_39 | Length of Command frames passive phase is 41.
IfxMsc_ControlFrameExtensionPassivePhaseLength_40 | Length of Command frames passive phase is 42.
IfxMsc_ControlFrameExtensionPassivePhaseLength_41 | Length of Command frames passive phase is 43.
IfxMsc_ControlFrameExtensionPassivePhaseLength_42 | Length of Command frames passive phase is 44.
IfxMsc_ControlFrameExtensionPassivePhaseLength_43 | Length of Command frames passive phase is 45.
IfxMsc_ControlFrameExtensionPassivePhaseLength_44 | Length of Command frames passive phase is 46.
IfxMsc_ControlFrameExtensionPassivePhaseLength_45 | Length of Command frames passive phase is 47.
IfxMsc_ControlFrameExtensionPassivePhaseLength_46 | Length of Command frames passive phase is 48.
IfxMsc_ControlFrameExtensionPassivePhaseLength_47 | Length of Command frames passive phase is 49.
IfxMsc_ControlFrameExtensionPassivePhaseLength_48 | Length of Command frames passive phase is 50.
IfxMsc_ControlFrameExtensionPassivePhaseLength_49 | Length of Command frames passive phase is 51.
IfxMsc_ControlFrameExtensionPassivePhaseLength_50 | Length of Command frames passive phase is 52.
IfxMsc_ControlFrameExtensionPassivePhaseLength_51 | Length of Command frames passive phase is 53.
IfxMsc_ControlFrameExtensionPassivePhaseLength_52 | Length of Command frames passive phase is 54.
IfxMsc_ControlFrameExtensionPassivePhaseLength_53 | Length of Command frames passive phase is 55.
IfxMsc_ControlFrameExtensionPassivePhaseLength_54 | Length of Command frames passive phase is 56.
IfxMsc_ControlFrameExtensionPassivePhaseLength_55 | Length of Command frames passive phase is 57.
IfxMsc_ControlFrameExtensionPassivePhaseLength_56 | Length of Command frames passive phase is 58.
IfxMsc_ControlFrameExtensionPassivePhaseLength_57 | Length of Command frames passive phase is 59.
IfxMsc_ControlFrameExtensionPassivePhaseLength_58 | Length of Command frames passive phase is 60.
IfxMsc_ControlFrameExtensionPassivePhaseLength_59 | Length of Command frames passive phase is 61.
IfxMsc_ControlFrameExtensionPassivePhaseLength_60 | Length of Command frames passive phase is 62.
IfxMsc_ControlFrameExtensionPassivePhaseLength_61 | Length of Command frames passive phase is 63.
IfxMsc_ControlFrameExtensionPassivePhaseLength_62 | Length of Command frames passive phase is 64.
IfxMsc_ControlFrameExtensionPassivePhaseLength_63 | Length of Command frames passive phase is 65.
IfxMsc_ControlFrameExtensionPassivePhaseLength_64 | Length of Command frames passive phase is 66.
IfxMsc_ControlFrameExtensionPassivePhaseLength_65 | Length of Command frames passive phase is 67.
IfxMsc_ControlFrameExtensionPassivePhaseLength_66 | Length of Command frames passive phase is 68.
IfxMsc_ControlFrameExtensionPassivePhaseLength_67 | Length of Command frames passive phase is 69.
IfxMsc_ControlFrameExtensionPassivePhaseLength_68 | Length of Command frames passive phase is 70.
IfxMsc_ControlFrameExtensionPassivePhaseLength_69 | Length of Command frames passive phase is 71.
IfxMsc_ControlFrameExtensionPassivePhaseLength_70 | Length of Command frames passive phase is 72.
IfxMsc_ControlFrameExtensionPassivePhaseLength_71 | Length of Command frames passive phase is 73.
IfxMsc_ControlFrameExtensionPassivePhaseLength_72 | Length of Command frames passive phase is 74.
IfxMsc_ControlFrameExtensionPassivePhaseLength_73 | Length of Command frames passive phase is 75.
IfxMsc_ControlFrameExtensionPassivePhaseLength_74 | Length of Command frames passive phase is 76.
IfxMsc_ControlFrameExtensionPassivePhaseLength_75 | Length of Command frames passive phase is 77.
IfxMsc_ControlFrameExtensionPassivePhaseLength_76 | Length of Command frames passive phase is 78.
IfxMsc_ControlFrameExtensionPassivePhaseLength_77 | Length of Command frames passive phase is 79.
IfxMsc_ControlFrameExtensionPassivePhaseLength_78 | Length of Command frames passive phase is 80.
IfxMsc_ControlFrameExtensionPassivePhaseLength_79 | Length of Command frames passive phase is 81.
IfxMsc_ControlFrameExtensionPassivePhaseLength_80 | Length of Command frames passive phase is 82.
IfxMsc_ControlFrameExtensionPassivePhaseLength_81 | Length of Command frames passive phase is 83.
IfxMsc_ControlFrameExtensionPassivePhaseLength_82 | Length of Command frames passive phase is 84.
IfxMsc_ControlFrameExtensionPassivePhaseLength_83 | Length of Command frames passive phase is 85.
IfxMsc_ControlFrameExtensionPassivePhaseLength_84 | Length of Command frames passive phase is 86.
IfxMsc_ControlFrameExtensionPassivePhaseLength_85 | Length of Command frames passive phase is 87.
IfxMsc_ControlFrameExtensionPassivePhaseLength_86 | Length of Command frames passive phase is 88.
IfxMsc_ControlFrameExtensionPassivePhaseLength_87 | Length of Command frames passive phase is 89.
IfxMsc_ControlFrameExtensionPassivePhaseLength_88 | Length of Command frames passive phase is 90.
IfxMsc_ControlFrameExtensionPassivePhaseLength_89 | Length of Command frames passive phase is 91.
IfxMsc_ControlFrameExtensionPassivePhaseLength_90 | Length of Command frames passive phase is 92.
IfxMsc_ControlFrameExtensionPassivePhaseLength_91 | Length of Command frames passive phase is 93.
IfxMsc_ControlFrameExtensionPassivePhaseLength_92 | Length of Command frames passive phase is 94.
IfxMsc_ControlFrameExtensionPassivePhaseLength_93 | Length of Command frames passive phase is 95.
IfxMsc_ControlFrameExtensionPassivePhaseLength_94 | Length of Command frames passive phase is 96.
IfxMsc_ControlFrameExtensionPassivePhaseLength_95 | Length of Command frames passive phase is 97.
IfxMsc_ControlFrameExtensionPassivePhaseLength_96 | Length of Command frames passive phase is 98.
IfxMsc_ControlFrameExtensionPassivePhaseLength_97 | Length of Command frames passive phase is 99.
IfxMsc_ControlFrameExtensionPassivePhaseLength_98 | Length of Command frames passive phase is 100.
IfxMsc_ControlFrameExtensionPassivePhaseLength_99 | Length of Command frames passive phase is 101.
IfxMsc_ControlFrameExtensionPassivePhaseLength_100 | Length of Command frames passive phase is 102.
IfxMsc_ControlFrameExtensionPassivePhaseLength_101 | Length of Command frames passive phase is 103.
IfxMsc_ControlFrameExtensionPassivePhaseLength_102 | Length of Command frames passive phase is 104.
IfxMsc_ControlFrameExtensionPassivePhaseLength_103 | Length of Command frames passive phase is 105.
IfxMsc_ControlFrameExtensionPassivePhaseLength_104 | Length of Command frames passive phase is 106.
IfxMsc_ControlFrameExtensionPassivePhaseLength_105 | Length of Command frames passive phase is 107.
IfxMsc_ControlFrameExtensionPassivePhaseLength_106 | Length of Command frames passive phase is 108.
IfxMsc_ControlFrameExtensionPassivePhaseLength_107 | Length of Command frames passive phase is 109.
IfxMsc_ControlFrameExtensionPassivePhaseLength_108 | Length of Command frames passive phase is 110.
IfxMsc_ControlFrameExtensionPassivePhaseLength_109 | Length of Command frames passive phase is 111.
IfxMsc_ControlFrameExtensionPassivePhaseLength_110 | Length of Command frames passive phase is 112.
IfxMsc_ControlFrameExtensionPassivePhaseLength_111 | Length of Command frames passive phase is 113.
IfxMsc_ControlFrameExtensionPassivePhaseLength_112 | Length of Command frames passive phase is 114.
IfxMsc_ControlFrameExtensionPassivePhaseLength_113 | Length of Command frames passive phase is 115.
IfxMsc_ControlFrameExtensionPassivePhaseLength_114 | Length of Command frames passive phase is 116.
IfxMsc_ControlFrameExtensionPassivePhaseLength_115 | Length of Command frames passive phase is 117.
IfxMsc_ControlFrameExtensionPassivePhaseLength_116 | Length of Command frames passive phase is 118.
IfxMsc_ControlFrameExtensionPassivePhaseLength_117 | Length of Command frames passive phase is 119.
IfxMsc_ControlFrameExtensionPassivePhaseLength_118 | Length of Command frames passive phase is 120.
IfxMsc_ControlFrameExtensionPassivePhaseLength_119 | Length of Command frames passive phase is 121.
IfxMsc_ControlFrameExtensionPassivePhaseLength_120 | Length of Command frames passive phase is 122.
IfxMsc_ControlFrameExtensionPassivePhaseLength_121 | Length of Command frames passive phase is 123.
IfxMsc_ControlFrameExtensionPassivePhaseLength_122 | Length of Command frames passive phase is 124.
IfxMsc_ControlFrameExtensionPassivePhaseLength_123 | Length of Command frames passive phase is 125.
IfxMsc_ControlFrameExtensionPassivePhaseLength_124 | Length of Command frames passive phase is 126.
IfxMsc_ControlFrameExtensionPassivePhaseLength_125 | Length of Command frames passive phase is 127.
IfxMsc_ControlFrameExtensionPassivePhaseLength_126 | Length of Command frames passive phase is 128.
IfxMsc_ControlFrameExtensionPassivePhaseLength_127 | Length of Command frames passive phase is 129.

Definition at line 194 of file IfxMsc.h.

◆ IfxMsc_DataFrameExtensionPassivePhaseLength

enum IfxMsc_DataFrameExtensionPassivePhaseLength

Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension
Definition in Ifx_MSC.DSTE.B.PPDE.

Enumerator
IfxMsc_DataFrameExtensionPassivePhaseLength_0 | 0 Additional MSB bits extension of the PPD bit field
IfxMsc_DataFrameExtensionPassivePhaseLength_1 | 1 Additional MSB bits extension of the PPD bit field
IfxMsc_DataFrameExtensionPassivePhaseLength_2 | 2 Additional MSB bits extension of the PPD bit field
IfxMsc_DataFrameExtensionPassivePhaseLength_3 | 3 Additional MSB bits extension of the PPD bit field

Definition at line 329 of file IfxMsc.h.

◆ IfxMsc_DataFrameInterrupt

enum IfxMsc_DataFrameInterrupt

Interrupt Control Register - Data Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.EDIE.

Enumerator
IfxMsc_DataFrameInterrupt_disabled | Interrupt generation Disable.
IfxMsc_DataFrameInterrupt_atLastDataBit | An interrupt is generated when the last data bit has been shifted out.
IfxMsc_DataFrameInterrupt_atFirstDataBit | An interrupt is generated when the First data bit has been shifted out.

Definition at line 340 of file IfxMsc.h.

◆ IfxMsc_DataFrameInterruptNode

enum IfxMsc_DataFrameInterruptNode

Interrupt Control Register - Data Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.EDIP.

Enumerator
IfxMsc_DataFrameInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_DataFrameInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_DataFrameInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_DataFrameInterruptNode_SR3 | Service request output SR3 selected.

Definition at line 350 of file IfxMsc.h.

◆ IfxMsc_DataFrameLength

enum IfxMsc_DataFrameLength

Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames
Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL.

Enumerator
IfxMsc_DataFrameLength_0 | No SRx bit shifted.
IfxMsc_DataFrameLength_1 | SRx[0] Shifted.
IfxMsc_DataFrameLength_2 | SRx[1:0] Shifted.
IfxMsc_DataFrameLength_3 | SRx[2:0] Shifted.
IfxMsc_DataFrameLength_4 | SRx[3:0] Shifted.
IfxMsc_DataFrameLength_5 | SRx[4:0] Shifted.
IfxMsc_DataFrameLength_6 | SRx[5:0] Shifted.
IfxMsc_DataFrameLength_7 | SRx[6:0] Shifted.
IfxMsc_DataFrameLength_8 | SRx[7:0] Shifted.
IfxMsc_DataFrameLength_9 | SRx[8:0] Shifted.
IfxMsc_DataFrameLength_10 | SRx[9:0] Shifted.
IfxMsc_DataFrameLength_11 | SRx[10:0] Shifted.
IfxMsc_DataFrameLength_12 | SRx[11:0] Shifted.
IfxMsc_DataFrameLength_13 | SRx[12:0] Shifted.
IfxMsc_DataFrameLength_14 | SRx[13:0] Shifted.
IfxMsc_DataFrameLength_15 | SRx[14:0] Shifted.
IfxMsc_DataFrameLength_16 | SRx[15:0] Shifted.

Definition at line 361 of file IfxMsc.h.

◆ IfxMsc_DataFramePassivePhaseLength

enum IfxMsc_DataFramePassivePhaseLength

Passive Phase Length at Data Frames
Definition in Ifx_MSC.DSC.B.PPD.

Enumerator
IfxMsc_DataFramePassivePhaseLength_2 | Passive phase length is 2 tFCL.
IfxMsc_DataFramePassivePhaseLength_3 | Passive phase length is 3 tFCL.
IfxMsc_DataFramePassivePhaseLength_4 | Passive phase length is 4 tFCL.
IfxMsc_DataFramePassivePhaseLength_5 | Passive phase length is 5 tFCL.
IfxMsc_DataFramePassivePhaseLength_6 | Passive phase length is 6 tFCL.
IfxMsc_DataFramePassivePhaseLength_7 | Passive phase length is 7 tFCL.
IfxMsc_DataFramePassivePhaseLength_8 | Passive phase length is 8 tFCL.
IfxMsc_DataFramePassivePhaseLength_9 | Passive phase length is 9 tFCL.
IfxMsc_DataFramePassivePhaseLength_10 | Passive phase length is 10 tFCL.
IfxMsc_DataFramePassivePhaseLength_11 | Passive phase length is 11 tFCL.
IfxMsc_DataFramePassivePhaseLength_12 | Passive phase length is 12 tFCL.
IfxMsc_DataFramePassivePhaseLength_13 | Passive phase length is 13 tFCL.
IfxMsc_DataFramePassivePhaseLength_14 | Passive phase length is 14 tFCL.
IfxMsc_DataFramePassivePhaseLength_15 | Passive phase length is 15 tFCL.
IfxMsc_DataFramePassivePhaseLength_16 | Passive phase length is 16 tFCL.
IfxMsc_DataFramePassivePhaseLength_17 | Passive phase length is 17 tFCL.
IfxMsc_DataFramePassivePhaseLength_18 | Passive phase length is 18 tFCL.
IfxMsc_DataFramePassivePhaseLength_19 | Passive phase length is 19 tFCL.
IfxMsc_DataFramePassivePhaseLength_20 | Passive phase length is 20 tFCL.
IfxMsc_DataFramePassivePhaseLength_21 | Passive phase length is 21 tFCL.
IfxMsc_DataFramePassivePhaseLength_22 | Passive phase length is 22 tFCL.
IfxMsc_DataFramePassivePhaseLength_23 | Passive phase length is 23 tFCL.
IfxMsc_DataFramePassivePhaseLength_24 | Passive phase length is 24 tFCL.
IfxMsc_DataFramePassivePhaseLength_25 | Passive phase length is 25 tFCL.
IfxMsc_DataFramePassivePhaseLength_26 | Passive phase length is 26 tFCL.
IfxMsc_DataFramePassivePhaseLength_27 | Passive phase length is 27 tFCL.
IfxMsc_DataFramePassivePhaseLength_28 | Passive phase length is 28 tFCL.
IfxMsc_DataFramePassivePhaseLength_29 | Passive phase length is 29 tFCL.
IfxMsc_DataFramePassivePhaseLength_30 | Passive phase length is 30 tFCL.
IfxMsc_DataFramePassivePhaseLength_31 | Passive phase length is 31 tFCL.
IfxMsc_DataFramePassivePhaseLength_32 | Passive phase length is 32 tFCL.

Definition at line 385 of file IfxMsc.h.

◆ IfxMsc_DividerMode

enum IfxMsc_DividerMode

Divider mode.

Enumerator
IfxMsc_DividerMode_normal | divider mode is normal
IfxMsc_DividerMode_fractional | divider mode is fractional

Definition at line 422 of file IfxMsc.h.

◆ IfxMsc_EmergencyStop

enum IfxMsc_EmergencyStop

Emergency Stop Register - Emergency stop feature Enable or Disable - SRL and SRH
Definition in Ifx_MSC.ESR.

Enumerator
IfxMsc_EmergencyStop_disabled | Emergency stop feature for SRx bit is Disabled.
IfxMsc_EmergencyStop_enabled | Emergency stop feature for SRx bit is Enabled.

Definition at line 431 of file IfxMsc.h.

◆ IfxMsc_Extension

enum IfxMsc_Extension

Downstream Control Enhanced Register - Extension Enable
Definition in Ifx_MSC.DSCE.B.NDBLE.

Enumerator
IfxMsc_Extension_disabled | Disables the extension bit fields.
IfxMsc_Extension_enabled | Enables the extension bit fields.

Definition at line 440 of file IfxMsc.h.

◆ IfxMsc_ExternalBitInjectionPosition

enum IfxMsc_ExternalBitInjectionPosition

Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJPOSP0 and Ifx_MSC.DSCE.B.INJPOSP1.

Enumerator
IfxMsc_ExternalBitInjectionPosition_0 | Injected external bit is at Position 0 of the data frame.
IfxMsc_ExternalBitInjectionPosition_1 | Injected external bit is at Position 1 of the data frame.
IfxMsc_ExternalBitInjectionPosition_2 | Injected external bit is at Position 2 of the data frame.
IfxMsc_ExternalBitInjectionPosition_3 | Injected external bit is at Position 3 of the data frame.
IfxMsc_ExternalBitInjectionPosition_4 | Injected external bit is at Position 4 of the data frame.
IfxMsc_ExternalBitInjectionPosition_5 | Injected external bit is at Position 5 of the data frame.
IfxMsc_ExternalBitInjectionPosition_6 | Injected external bit is at Position 6 of the data frame.
IfxMsc_ExternalBitInjectionPosition_7 | Injected external bit is at Position 7 of the data frame.
IfxMsc_ExternalBitInjectionPosition_8 | Injected external bit is at Position 8 of the data frame.
IfxMsc_ExternalBitInjectionPosition_9 | Injected external bit is at Position 9 of the data frame.
IfxMsc_ExternalBitInjectionPosition_10 | Injected external bit is at Position 10 of the data frame.
IfxMsc_ExternalBitInjectionPosition_11 | Injected external bit is at Position 11 of the data frame.
IfxMsc_ExternalBitInjectionPosition_12 | Injected external bit is at Position 12 of the data frame.
IfxMsc_ExternalBitInjectionPosition_13 | Injected external bit is at Position 13 of the data frame.
IfxMsc_ExternalBitInjectionPosition_14 | Injected external bit is at Position 14 of the data frame.
IfxMsc_ExternalBitInjectionPosition_15 | Injected external bit is at Position 15 of the data frame.
IfxMsc_ExternalBitInjectionPosition_16 | Injected external bit is at Position 16 of the data frame.
IfxMsc_ExternalBitInjectionPosition_17 | Injected external bit is at Position 17 of the data frame.
IfxMsc_ExternalBitInjectionPosition_18 | Injected external bit is at Position 18 of the data frame.
IfxMsc_ExternalBitInjectionPosition_19 | Injected external bit is at Position 19 of the data frame.
IfxMsc_ExternalBitInjectionPosition_20 | Injected external bit is at Position 20 of the data frame.
IfxMsc_ExternalBitInjectionPosition_21 | Injected external bit is at Position 21 of the data frame.
IfxMsc_ExternalBitInjectionPosition_22 | Injected external bit is at Position 22 of the data frame.
IfxMsc_ExternalBitInjectionPosition_23 | Injected external bit is at Position 23 of the data frame.
IfxMsc_ExternalBitInjectionPosition_24 | Injected external bit is at Position 24 of the data frame.
IfxMsc_ExternalBitInjectionPosition_25 | Injected external bit is at Position 25 of the data frame.
IfxMsc_ExternalBitInjectionPosition_26 | Injected external bit is at Position 26 of the data frame.
IfxMsc_ExternalBitInjectionPosition_27 | Injected external bit is at Position 27 of the data frame.
IfxMsc_ExternalBitInjectionPosition_28 | Injected external bit is at Position 28 of the data frame.
IfxMsc_ExternalBitInjectionPosition_29 | Injected external bit is at Position 29 of the data frame.
IfxMsc_ExternalBitInjectionPosition_30 | Injected external bit is at Position 30 of the data frame.
IfxMsc_ExternalBitInjectionPosition_31 | Injected external bit is at Position 31 of the data frame.
IfxMsc_ExternalBitInjectionPosition_32 | Injected external bit is at Position 32 of the data frame.
IfxMsc_ExternalBitInjectionPosition_33 | Injected external bit is at Position 33 of the data frame.
IfxMsc_ExternalBitInjectionPosition_34 | Injected external bit is at Position 34 of the data frame.
IfxMsc_ExternalBitInjectionPosition_35 | Injected external bit is at Position 35 of the data frame.
IfxMsc_ExternalBitInjectionPosition_36 | Injected external bit is at Position 36 of the data frame.
IfxMsc_ExternalBitInjectionPosition_37 | Injected external bit is at Position 37 of the data frame.
IfxMsc_ExternalBitInjectionPosition_38 | Injected external bit is at Position 38 of the data frame.
IfxMsc_ExternalBitInjectionPosition_39 | Injected external bit is at Position 39 of the data frame.
IfxMsc_ExternalBitInjectionPosition_40 | Injected external bit is at Position 40 of the data frame.
IfxMsc_ExternalBitInjectionPosition_41 | Injected external bit is at Position 41 of the data frame.
IfxMsc_ExternalBitInjectionPosition_42 | Injected external bit is at Position 42 of the data frame.
IfxMsc_ExternalBitInjectionPosition_43 | Injected external bit is at Position 43 of the data frame.
IfxMsc_ExternalBitInjectionPosition_44 | Injected external bit is at Position 44 of the data frame.
IfxMsc_ExternalBitInjectionPosition_45 | Injected external bit is at Position 45 of the data frame.
IfxMsc_ExternalBitInjectionPosition_46 | Injected external bit is at Position 46 of the data frame.
IfxMsc_ExternalBitInjectionPosition_47 | Injected external bit is at Position 47 of the data frame.
IfxMsc_ExternalBitInjectionPosition_48 | Injected external bit is at Position 48 of the data frame.
IfxMsc_ExternalBitInjectionPosition_49 | Injected external bit is at Position 49 of the data frame.
IfxMsc_ExternalBitInjectionPosition_50 | Injected external bit is at Position 50 of the data frame.
IfxMsc_ExternalBitInjectionPosition_51 | Injected external bit is at Position 51 of the data frame.
IfxMsc_ExternalBitInjectionPosition_52 | Injected external bit is at Position 52 of the data frame.
IfxMsc_ExternalBitInjectionPosition_53 | Injected external bit is at Position 53 of the data frame.
IfxMsc_ExternalBitInjectionPosition_54 | Injected external bit is at Position 54 of the data frame.
IfxMsc_ExternalBitInjectionPosition_55 | Injected external bit is at Position 55 of the data frame.
IfxMsc_ExternalBitInjectionPosition_56 | Injected external bit is at Position 56 of the data frame.
IfxMsc_ExternalBitInjectionPosition_57 | Injected external bit is at Position 57 of the data frame.
IfxMsc_ExternalBitInjectionPosition_58 | Injected external bit is at Position 58 of the data frame.
IfxMsc_ExternalBitInjectionPosition_59 | Injected external bit is at Position 59 of the data frame.
IfxMsc_ExternalBitInjectionPosition_60 | Injected external bit is at Position 60 of the data frame.
IfxMsc_ExternalBitInjectionPosition_61 | Injected external bit is at Position 61 of the data frame.
IfxMsc_ExternalBitInjectionPosition_62 | Injected external bit is at Position 62 of the data frame.
IfxMsc_ExternalBitInjectionPosition_63 | Injected external bit is at Position 63 of the data frame.

Definition at line 449 of file IfxMsc.h.

◆ IfxMsc_ExternalSignalInjection

enum IfxMsc_ExternalSignalInjection

Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJENP0 and Ifx_MSC.DSCE.B.INJENP1.

Enumerator
IfxMsc_ExternalSignalInjection_disabled | Disables the external signal injection in a data frame.
IfxMsc_ExternalSignalInjection_enabled | Enables the external signal injection in a data frame.

Definition at line 520 of file IfxMsc.h.

◆ IfxMsc_FclClockControlEnabled

enum IfxMsc_FclClockControlEnabled

Output Control Register - Clock Control
Definition in Ifx_MSC.OCR.B.CLKCTRL.

Enumerator
IfxMsc_FclClockControlEnabled_activePhaseOnly | FCL is active during active phases of data or command frames.
IfxMsc_FclClockControlEnabled_always | FCL is always active.

Definition at line 529 of file IfxMsc.h.

◆ IfxMsc_FclLinePolarity

enum IfxMsc_FclLinePolarity

Output Control Register - FCLP Line Polarity
Definition in Ifx_MSC.OCR.B.CLP.

Enumerator
IfxMsc_FclLinePolarity_nonInverted | FCLP and FCL signal polarity is identical.
IfxMsc_FclLinePolarity_inverted | FCLP signal has inverted FCL signal polarity.

Definition at line 538 of file IfxMsc.h.

◆ IfxMsc_HardwareClock

enum IfxMsc_HardwareClock

Enable hardware clock control.

Enumerator
IfxMsc_HardwareClock_disabled | Hardware clock disable.
IfxMsc_HardwareClock_enabled | Hardware clock enable.

Definition at line 546 of file IfxMsc.h.

◆ IfxMsc_InterruptServiceRequest

enum IfxMsc_InterruptServiceRequest

Interrupt Service Request.

Enumerator
IfxMsc_InterruptServiceRequest_0 | Interrupt Service Request number0.
IfxMsc_InterruptServiceRequest_1 | Interrupt Service Request number1.
IfxMsc_InterruptServiceRequest_2 | Interrupt Service Request number2.
IfxMsc_InterruptServiceRequest_3 | Interrupt Service Request number3.
IfxMsc_InterruptServiceRequest_4 | Interrupt Service Request number4.

Definition at line 554 of file IfxMsc.h.

◆ IfxMsc_ModuleSuspendRequestBit

enum IfxMsc_ModuleSuspendRequestBit

OCDS Control and Status - OCDS Suspend Control Definition in Ifx_MSC.OCS.B.SUS.

Enumerator
IfxMsc_ModuleSuspendRequestBit_noSuspend | OCDS is not suspended.
IfxMsc_ModuleSuspendRequestBit_hardSuspend | OCDS is Hard suspended. Clock is switched off immediately.
IfxMsc_ModuleSuspendRequestBit_softSuspend | OCDS is Soft suspended.

Definition at line 566 of file IfxMsc.h.

◆ IfxMsc_MsbBitDataExtension

enum IfxMsc_MsbBitDataExtension

Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/NDBH)
Definition in Ifx_MSC.DSCE.B.NDBLE and Ifx_MSC.DSCE.B.NDBHE.

Enumerator
IfxMsc_MsbBitDataExtension_notPresent | Additional MSB bit is not present in the extension of the NDBL/NDBH bit field.
IfxMsc_MsbBitDataExtension_present | Additional MSB bit is present in the extension of the NDBL/NDBH bit field.

Definition at line 576 of file IfxMsc.h.

◆ IfxMsc_NDividerAbra

enum IfxMsc_NDividerAbra

Asynchronous Block Configuration Register - N Divider ABRA
Definition in Ifx_MSC.ABC.B.NDA.

Enumerator
IfxMsc_NDividerAbra_1 | Division ratio is 1.
IfxMsc_NDividerAbra_2 | Division ratio is 2.
IfxMsc_NDividerAbra_3 | Division ratio is 3.
IfxMsc_NDividerAbra_4 | Division ratio is 4.
IfxMsc_NDividerAbra_5 | Division ratio is 5.
IfxMsc_NDividerAbra_6 | Division ratio is 6.
IfxMsc_NDividerAbra_7 | Division ratio is 7.
IfxMsc_NDividerAbra_8 | Division ratio is 8.

Definition at line 585 of file IfxMsc.h.

◆ IfxMsc_NDividerDownstream

enum IfxMsc_NDividerDownstream

Downstream Timing Extension Register - N Divider Downstream
Definition in Ifx_MSC.DSTE.B.NDD.

Enumerator
IfxMsc_NDividerDownstream_1 | division ratio is 1
IfxMsc_NDividerDownstream_2 | division ratio is 2
IfxMsc_NDividerDownstream_3 | division ratio is 3
IfxMsc_NDividerDownstream_4 | division ratio is 4
IfxMsc_NDividerDownstream_5 | division ratio is 5
IfxMsc_NDividerDownstream_6 | division ratio is 6
IfxMsc_NDividerDownstream_7 | division ratio is 7
IfxMsc_NDividerDownstream_8 | division ratio is 8
IfxMsc_NDividerDownstream_9 | division ratio is 9
IfxMsc_NDividerDownstream_10 | division ratio is 10
IfxMsc_NDividerDownstream_11 | division ratio is 11
IfxMsc_NDividerDownstream_12 | division ratio is 12
IfxMsc_NDividerDownstream_13 | division ratio is 13
IfxMsc_NDividerDownstream_14 | division ratio is 14
IfxMsc_NDividerDownstream_15 | division ratio is 15
IfxMsc_NDividerDownstream_16 | division ratio is 16

Definition at line 600 of file IfxMsc.h.

◆ IfxMsc_OverflowInterrupt

enum IfxMsc_OverflowInterrupt

Asynchronous Block Configuration Register - Overflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.OIE.

Enumerator
IfxMsc_OverflowInterrupt_disabled | Disables the path of the overflow interrupt towards the interrupt node.
IfxMsc_OverflowInterrupt_enabled | Enables the path of the overflow interrupt towards the interrupt node.

Definition at line 623 of file IfxMsc.h.

◆ IfxMsc_OverflowInterruptNode

enum IfxMsc_OverflowInterruptNode

Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.OIP.

Enumerator
IfxMsc_OverflowInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_OverflowInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_OverflowInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_OverflowInterruptNode_SR3 | Service request output SR3 selected.
IfxMsc_OverflowInterruptNode_SR4 | Service request output SR4 selected.

Definition at line 632 of file IfxMsc.h.

◆ IfxMsc_Parity

enum IfxMsc_Parity

Parity Mode
Definition in Ifx_MSC.USR.B.PCT.

Enumerator
IfxMsc_Parity_even | Even Parity.
IfxMsc_Parity_odd | Odd Parity.

Definition at line 644 of file IfxMsc.h.

◆ IfxMsc_PassiveTimeFrameCount

enum IfxMsc_PassiveTimeFrameCount

Downstream Status Register - Number Of Passive Time Frames
Definition in Ifx_MSC.DSS.B.NPTF.

Enumerator
IfxMsc_PassiveTimeFrameCount_0 | No Passive time frames inserted.
IfxMsc_PassiveTimeFrameCount_1 | 1 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_2 | 2 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_3 | 3 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_4 | 4 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_5 | 5 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_6 | 6 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_7 | 7 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_8 | 8 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_9 | 9 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_10 | 10 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_11 | 11 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_12 | 12 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_13 | 13 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_14 | 14 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_15 | 15 Passive time frames inserted

Definition at line 653 of file IfxMsc.h.

◆ IfxMsc_ReceiveDataInterrupt

enum IfxMsc_ReceiveDataInterrupt

Interrupt Control Register - Receive Data Interrupt Enable
Definition in Ifx_MSC.ICR.B.RDIE.

Enumerator
IfxMsc_ReceiveDataInterrupt_disabled | Interrupt generation disabled.
IfxMsc_ReceiveDataInterrupt_onDataReceive | An interrupt is generated when data is received and written into the upstream data registers.
IfxMsc_ReceiveDataInterrupt_onRdieSet | An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H.
IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 | An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H.

Definition at line 676 of file IfxMsc.h.

◆ IfxMsc_ReceiveDataInterruptNode

enum IfxMsc_ReceiveDataInterruptNode

Interrupt Control Register - Receive Data Interrupt Pointer
Definition in Ifx_MSC.ICR.B.RDIP.

Enumerator
IfxMsc_ReceiveDataInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_ReceiveDataInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_ReceiveDataInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_ReceiveDataInterruptNode_SR3 | Service request output SR3 selected.

Definition at line 687 of file IfxMsc.h.

◆ IfxMsc_SdiLinePolarity

enum IfxMsc_SdiLinePolarity

Output Control Register - SDI Line Polarity
Definition in Ifx_MSC.OCR.B.ILP.

Enumerator
IfxMsc_SdiLinePolarity_likeSi | SDI and SI signal polarities are identical.
IfxMsc_SdiLinePolarity_invertedSi | SDI and SI signal polarities are inverted.

Definition at line 698 of file IfxMsc.h.

◆ IfxMsc_SerialDataInput

enum IfxMsc_SerialDataInput

Output Control Register - Serial Data Input Selection
Definition in Ifx_MSC.OCR.B.SDISEL.

Enumerator
IfxMsc_SerialDataInput_0 | SDI0 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_1 | SDI1 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_2 | SDI2 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_3 | SDI3 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_4 | SDI4 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_5 | SDI5 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_6 | SDI6 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_7 | SDI7 is selected for the SDI of the upstream channel.

Definition at line 707 of file IfxMsc.h.

◆ IfxMsc_ServiceRequestDelay

enum IfxMsc_ServiceRequestDelay

Service Request Delay
Definition in Ifx_MSC.USR.B.SRDC.

Enumerator
IfxMsc_ServiceRequestDelay_noDelay | No Delay.
IfxMsc_ServiceRequestDelay_1bit | Delay of 1 bit time.

Definition at line 722 of file IfxMsc.h.

◆ IfxMsc_ShiftClockPhaseDuration

enum IfxMsc_ShiftClockPhaseDuration

Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock
Definition in Ifx_MSC.ABC.B.LOW and Ifx_MSC.ABC.B.HIGH.

Enumerator
IfxMsc_ShiftClockPhaseDuration_1 | Duration in periods of f_A is 1.
IfxMsc_ShiftClockPhaseDuration_2 | Duration in periods of f_A is 2.
IfxMsc_ShiftClockPhaseDuration_3 | Duration in periods of f_A is 3.
IfxMsc_ShiftClockPhaseDuration_4 | Duration in periods of f_A is 4.
IfxMsc_ShiftClockPhaseDuration_5 | Duration in periods of f_A is 5.
IfxMsc_ShiftClockPhaseDuration_6 | Duration in periods of f_A is 6.
IfxMsc_ShiftClockPhaseDuration_7 | Duration in periods of f_A is 7.
IfxMsc_ShiftClockPhaseDuration_8 | Duration in periods of f_A is 8.
IfxMsc_ShiftClockPhaseDuration_9 | Duration in periods of f_A is 9.
IfxMsc_ShiftClockPhaseDuration_10 | Duration in periods of f_A is 10.
IfxMsc_ShiftClockPhaseDuration_11 | Duration in periods of f_A is 11.
IfxMsc_ShiftClockPhaseDuration_12 | Duration in periods of f_A is 12.
IfxMsc_ShiftClockPhaseDuration_13 | Duration in periods of f_A is 13.
IfxMsc_ShiftClockPhaseDuration_14 | Duration in periods of f_A is 14.
IfxMsc_ShiftClockPhaseDuration_15 | Duration in periods of f_A is 15.
IfxMsc_ShiftClockPhaseDuration_16 | Duration in periods of f_A is 16.

Definition at line 731 of file IfxMsc.h.

◆ IfxMsc_SleepMode

enum IfxMsc_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_MSC.CLC.B.EDIS.

Enumerator
IfxMsc_SleepMode_enable | enables sleep mode
IfxMsc_SleepMode_disable | disables sleep mode

Definition at line 754 of file IfxMsc.h.

◆ IfxMsc_SoLinePolarity

enum IfxMsc_SoLinePolarity

Output Control Register - SOP Line Polarity
Definition in Ifx_MSC.OCR.B.SLP.

Enumerator
IfxMsc_SoLinePolarity_nonInverted | SOP and SO polarity is identical.
IfxMsc_SoLinePolarity_inverted | SOP and SO polarity is inverted.

Definition at line 763 of file IfxMsc.h.

◆ IfxMsc_Source

enum IfxMsc_Source

Downstream Select Data Source Low Register - Select Source for - SRL and SRHNumber Of Passive Time Frames
Definition in Ifx_MSC.DSDSL and Ifx_MSC.DSDSH.

Enumerator
IfxMsc_Source_downstreamDataRegister | SRx[16] is taken from data Register DD.DDL[xx].
IfxMsc_Source_alternateInputLine | SRx[16] is taken from ALTINL input line.
IfxMsc_Source_alternateInputLineInverted | SRx[16] is taken from ALTINL input line in inverted state.

Definition at line 772 of file IfxMsc.h.

◆ IfxMsc_SuspendMode

enum IfxMsc_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxMsc_SuspendMode_none | No suspend.
IfxMsc_SuspendMode_hard | Hard Suspend.
IfxMsc_SuspendMode_soft | Soft Suspend.

Definition at line 781 of file IfxMsc.h.

◆ IfxMsc_Target

enum IfxMsc_Target

Msc Targets - use as chip enable selection for ENH, ENL and ENC.

Enumerator
IfxMsc_Target_en0 | Target EN0.
IfxMsc_Target_en1 | Target EN1.
IfxMsc_Target_en2 | Target EN2.
IfxMsc_Target_en3 | Target EN3.

Definition at line 790 of file IfxMsc.h.

◆ IfxMsc_TimeFrameInterrupt

enum IfxMsc_TimeFrameInterrupt

Interrupt Control Register - Time Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.TFIE.

Enumerator
IfxMsc_TimeFrameInterrupt_disabled | Interrupt generation disabled.
IfxMsc_TimeFrameInterrupt_enabled | Interrupt generation enabled.

Definition at line 801 of file IfxMsc.h.

◆ IfxMsc_TimeFrameInterruptNode

enum IfxMsc_TimeFrameInterruptNode

Interrupt Control Register - Time Frame Interrupt Pointer
Definition in Ifx_MSC.ICR.B.TFIP.

Enumerator
IfxMsc_TimeFrameInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_TimeFrameInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_TimeFrameInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_TimeFrameInterruptNode_SR3 | Service request output SR3 selected.

Definition at line 810 of file IfxMsc.h.

◆ IfxMsc_TransmissionMode

enum IfxMsc_TransmissionMode

Downstream Channel Transmission Mode
Definition in Ifx_MSC.DSC.B.TM.

Enumerator
IfxMsc_TransmissionMode_triggered | Triggered Mode.
IfxMsc_TransmissionMode_dataRepetition | Data Repetition Mode.

Definition at line 821 of file IfxMsc.h.

◆ IfxMsc_UnderflowInterrupt

enum IfxMsc_UnderflowInterrupt

Asynchronous Block Configuration Register - Underflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.UIE.

Enumerator
IfxMsc_UnderflowInterrupt_disabled | Disables the path of the Underflow interrupt towards the interrupt node.
IfxMsc_UnderflowInterrupt_enabled | Enables the path of the Underflow interrupt towards the interrupt node.

Definition at line 830 of file IfxMsc.h.

◆ IfxMsc_UnderflowInterruptNode

enum IfxMsc_UnderflowInterruptNode

Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.UIP.

Enumerator
IfxMsc_UnderflowInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_UnderflowInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_UnderflowInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_UnderflowInterruptNode_SR3 | Service request output SR3 selected.
IfxMsc_UnderflowInterruptNode_SR4 | Service request output SR4 selected.

Definition at line 839 of file IfxMsc.h.

◆ IfxMsc_UpstreamChannelFrameType

enum IfxMsc_UpstreamChannelFrameType

Channel Frame Type
Definition in Ifx_MSC.USR.B.UFT.

Enumerator
IfxMsc_UpstreamChannelFrameType_12bit | 12-bit Upstream frame selected
IfxMsc_UpstreamChannelFrameType_16bit | 16-bit Upstream frame selected

Definition at line 851 of file IfxMsc.h.

◆ IfxMsc_UpstreamChannelReceivingRate

enum IfxMsc_UpstreamChannelReceivingRate

Upstream Receiving Rate
Definition in Ifx_MSC.USR.B.URR.

Enumerator
IfxMsc_UpstreamChannelReceivingRate_disabled | Disabled.
IfxMsc_UpstreamChannelReceivingRate_4 | Baud rate = f_MSC / 4.
IfxMsc_UpstreamChannelReceivingRate_8 | Baud rate = f_MSC / 8.
IfxMsc_UpstreamChannelReceivingRate_16 | Baud rate = f_MSC / 16.
IfxMsc_UpstreamChannelReceivingRate_32 | Baud rate = f_MSC / 32.
IfxMsc_UpstreamChannelReceivingRate_64 | Baud rate = f_MSC / 64.
IfxMsc_UpstreamChannelReceivingRate_128 | Baud rate = f_MSC / 128.
IfxMsc_UpstreamChannelReceivingRate_256 | Baud rate = f_MSC / 256.

Definition at line 860 of file IfxMsc.h.

◆ IfxMsc_UpstreamTimeoutInterrupt

enum IfxMsc_UpstreamTimeoutInterrupt

Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable
Definition in Ifx_MSC.USCE.B.USTOEN.

Enumerator
IfxMsc_UpstreamTimeoutInterrupt_disabled | Upstream Timeout Interrupt Disabled.
IfxMsc_UpstreamTimeoutInterrupt_enabled | Upstream Timeout Interrupt Enabled.

Definition at line 875 of file IfxMsc.h.

◆ IfxMsc_UpstreamTimeoutInterruptNode

enum IfxMsc_UpstreamTimeoutInterruptNode

Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer
Definition in Ifx_MSC.USCE.B.USTOIP.

Enumerator
IfxMsc_UpstreamTimeoutInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_UpstreamTimeoutInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_UpstreamTimeoutInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_UpstreamTimeoutInterruptNode_SR3 | Service request output SR3 selected.
IfxMsc_UpstreamTimeoutInterruptNode_SR4 | Service request output SR4 selected.

Definition at line 884 of file IfxMsc.h.

◆ IfxMsc_UpstreamTimeoutPrescaler

enum IfxMsc_UpstreamTimeoutPrescaler

Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler
Definition in Ifx_MSC.USCE.B.USTOPRE.

Enumerator
IfxMsc_UpstreamTimeoutPrescaler_1 | Prescale value 1 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_2 | Prescale value 2 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_4 | Prescale value 4 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_8 | Prescale value 8 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_16 | Prescale value 16 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_32 | Prescale value 32 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_64 | Prescale value 64 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_128 | Prescale value 128 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_256 | Prescale value 256 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_512 | Prescale value 512 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_1024 | Prescale value 1024 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_2048 | Prescale value 2048 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_4096 | Prescale value 4096 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_8192 | Prescale value 8192 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_16384 | Prescale value 16384 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_32768 | Prescale value 32768 for the upstream time-out limit.

Definition at line 896 of file IfxMsc.h.

◆ IfxMsc_UpstreamTimeoutValue

enum IfxMsc_UpstreamTimeoutValue

Upstream Control Enhanced Register 1 - Upstream Timeout Value
Definition in Ifx_MSC.USCE.B.USTOVAL.

Enumerator
IfxMsc_UpstreamTimeoutValue_1 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_2 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_3 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_4 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_5 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_6 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_7 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_8 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_9 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_10 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_11 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_12 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_13 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_14 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_15 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_16 | Upstream timeout value for the N-Divider.

Definition at line 919 of file IfxMsc.h.


iLLD_TC26B: Configure Flags

Functions
Configure Flags
iLLD » MSC » Standard Driver
Collaboration diagram for Configure Flags:

Functions

IFX_INLINE void | IfxMsc_clearAbraOverflowFlag (Ifx_MSC *msc)
Clear ABRA overflow flag. More...
IFX_INLINE void | IfxMsc_clearAbraUnderflowFlag (Ifx_MSC *msc)
Clear ABRA underflow flag. More...
IFX_INLINE void | IfxMsc_clearUpstreamTimeout (Ifx_MSC *msc)
Clear Upstream timeout. More...
IFX_INLINE void | IfxMsc_clearUpstreamValidFlag (Ifx_MSC *msc, uint8 upstreamIdx)
Clear the valid flag. More...
IFX_INLINE boolean | IfxMsc_getUpstreamValidFlag (Ifx_MSC *msc, uint8 upstreamIdx)
Get the status of the valid flag. More...

Detailed Description

Function Documentation

◆ IfxMsc_clearAbraOverflowFlag()

IFX_INLINE void IfxMsc_clearAbraOverflowFlag ( Ifx_MSC * msc )

Clear ABRA overflow flag.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1420 of file IfxMsc.h.

◆ IfxMsc_clearAbraUnderflowFlag()

IFX_INLINE void IfxMsc_clearAbraUnderflowFlag ( Ifx_MSC * msc )

Clear ABRA underflow flag.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1427 of file IfxMsc.h.

◆ IfxMsc_clearUpstreamTimeout()

IFX_INLINE void IfxMsc_clearUpstreamTimeout ( Ifx_MSC * msc )

Clear Upstream timeout.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1440 of file IfxMsc.h.

◆ IfxMsc_clearUpstreamValidFlag()

IFX_INLINE void IfxMsc_clearUpstreamValidFlag | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Clear the valid flag.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | data register ID
Returns
None

Definition at line 1447 of file IfxMsc.h.

Referenced by IfxMsc_Msc_receiveData().

◆ IfxMsc_getUpstreamValidFlag()

IFX_INLINE boolean IfxMsc_getUpstreamValidFlag | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Get the status of the valid flag.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | data register ID
Returns
Status TRUE or FALSE

Definition at line 1562 of file IfxMsc.h.

Referenced by IfxMsc_Msc_receiveData().


iLLD_TC26B: Set Command Target

Functions
Set Command Target
iLLD » MSC » Standard Driver
Collaboration diagram for Set Command Target:

Functions

IFX_INLINE void IfxMsc_setCommandTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for command phase. More...

Detailed Description

Function Documentation

◆ IfxMsc_setCommandTarget()

IFX_INLINE void IfxMsc_setCommandTarget | ( | Ifx_MSC * | msc,
 |  | IfxMsc_Target | enX
 | ) |  |

Select the target for command phase.

Parameters
msc | pointer to the base of MSC registers
enX | Target to be selected
Returns
None

Definition at line 1661 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule(), and IfxMsc_Msc_setCommandTarget().


iLLD_TC26B: Set Data

Functions
Set Data
iLLD » MSC » Standard Driver
Collaboration diagram for Set Data:

Functions

IFX_INLINE void | IfxMsc_setDataHighTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data high phase. More...
IFX_INLINE void | IfxMsc_setDataLowTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data low phase. More...

Detailed Description

Function Documentation

◆ IfxMsc_setDataHighTarget()

IFX_INLINE void IfxMsc_setDataHighTarget | ( | Ifx_MSC * | msc,
 |  | IfxMsc_Target | enX
 | ) |  |

Select the target for data high phase.

Parameters
msc | pointer to the base of MSC registers
enX | Target to be selected
Returns
None

Definition at line 1668 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule(), and IfxMsc_Msc_setDataTarget().

◆ IfxMsc_setDataLowTarget()

IFX_INLINE void IfxMsc_setDataLowTarget | ( | Ifx_MSC * | msc,
 |  | IfxMsc_Target | enX
 | ) |  |

Select the target for data low phase.

Parameters
msc | pointer to the base of MSC registers
enX | Target to be selected
Returns
None

Definition at line 1675 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule(), and IfxMsc_Msc_setDataTarget().


iLLD_TC26B: Get Data

Functions
Get Data
iLLD » MSC » Standard Driver
Collaboration diagram for Get Data:

Functions

IFX_INLINE uint16 | IfxMsc_getData (Ifx_MSC *msc, uint8 upstreamIdx)
Get the upstream data from upstream data register. More...
IFX_INLINE IfxMsc_Target | IfxMsc_getDataHighTarget (Ifx_MSC *msc)
Get the selected target during high phase. More...
IFX_INLINE IfxMsc_Target | IfxMsc_getDataLowTarget (Ifx_MSC *msc)
Get the selected target during low phase. More...

Detailed Description

Function Documentation

◆ IfxMsc_getData()

IFX_INLINE uint16 IfxMsc_getData | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Get the upstream data from upstream data register.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | Upstream data register ID
Returns
Recevived data

Definition at line 1477 of file IfxMsc.h.

Referenced by IfxMsc_Msc_receiveData().

◆ IfxMsc_getDataHighTarget()

IFX_INLINE IfxMsc_Target IfxMsc_getDataHighTarget ( Ifx_MSC * msc )

Get the selected target during high phase.

Parameters
msc pointer to the base of MSC registers
Returns
Selected target

Definition at line 1487 of file IfxMsc.h.

Referenced by IfxMsc_Msc_getTarget().

◆ IfxMsc_getDataLowTarget()

IFX_INLINE IfxMsc_Target IfxMsc_getDataLowTarget ( Ifx_MSC * msc )

Get the selected target during low phase.

Parameters
msc pointer to the base of MSC registers
Returns
Selected target

Definition at line 1494 of file IfxMsc.h.

Referenced by IfxMsc_Msc_getTarget().


iLLD_TC26B: Enable Module

Functions
Enable Module
iLLD » MSC » Standard Driver
Collaboration diagram for Enable Module:

Functions

IFX_EXTERN void | IfxMsc_disableModule (Ifx_MSC *msc)
Disable MSC kernel. More...
IFX_EXTERN void | IfxMsc_enableModule (Ifx_MSC *msc)
Enable MSC kernel. More...

Detailed Description

Function Documentation

◆ IfxMsc_disableModule()

IFX_EXTERN void IfxMsc_disableModule ( Ifx_MSC * msc )

Disable MSC kernel.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 76 of file IfxMsc.c.

◆ IfxMsc_enableModule()

IFX_EXTERN void IfxMsc_enableModule ( Ifx_MSC * msc )

Enable MSC kernel.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 127 of file IfxMsc.c.

Referenced by IfxMsc_Msc_initModule().


iLLD_TC26B: Reset Module

Functions
Reset Module
iLLD » MSC » Standard Driver
Collaboration diagram for Reset Module:

Functions

IFX_EXTERN void | IfxMsc_clearReset (Ifx_MSC *msc)
Clear reset bit of MSC kernel. More...
IFX_EXTERN void | IfxMsc_resetModule (Ifx_MSC *msc)
Reset MSC kernel. More...

Detailed Description

Function Documentation

◆ IfxMsc_clearReset()

IFX_EXTERN void IfxMsc_clearReset ( Ifx_MSC * msc )

Clear reset bit of MSC kernel.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 61 of file IfxMsc.c.

◆ IfxMsc_resetModule()

IFX_EXTERN void IfxMsc_resetModule ( Ifx_MSC * msc )

Reset MSC kernel.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 187 of file IfxMsc.c.

Referenced by IfxMsc_Msc_deInitModule().


iLLD_TC26B: Baud Calculator

Functions
Baud Calculator
iLLD » MSC » Standard Driver
Collaboration diagram for Baud Calculator:

Functions

IFX_EXTERN uint32 | IfxMsc_downstreamAbraBaudCalculator (uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled. More...
IFX_EXTERN uint64 | IfxMsc_upstreamFractionalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional. More...
IFX_EXTERN uint32 | IfxMsc_upstreamNormalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal. More...

Detailed Description

Function Documentation

◆ IfxMsc_downstreamAbraBaudCalculator()

IFX_EXTERN uint32 IfxMsc_downstreamAbraBaudCalculator ( uint32 baud )

Get the NDD value for the supplied baud rate when when ABRA block is enabled.

Parameters
baud Required baud rate
Returns
NDD value

Definition at line 86 of file IfxMsc.c.

Referenced by IfxMsc_Msc_initializeAbra().

◆ IfxMsc_upstreamFractionalBaudCalculator()

IFX_EXTERN uint64 IfxMsc_upstreamFractionalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is fractional.

Parameters
msc | pointer to the base of MSC registers
baud | Required baud rate
Returns
Step value

Definition at line 208 of file IfxMsc.c.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_upstreamNormalBaudCalculator()

IFX_EXTERN uint32 IfxMsc_upstreamNormalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is normal.

Parameters
msc | pointer to the base of MSC registers
baud | Required baud rate
Returns
Step value

Definition at line 231 of file IfxMsc.c.

Referenced by IfxMsc_Msc_initModule().


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » MSC » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxMsc_initEnPin (const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a EN output. More...
IFX_INLINE void | IfxMsc_initFclnPin (const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLN output. More...
IFX_INLINE void | IfxMsc_initFclpPin (const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLP output. More...
IFX_INLINE void | IfxMsc_initInjPin (const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a INJ input. More...
IFX_INLINE void | IfxMsc_initSdiPin (const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SDI input. More...
IFX_INLINE void | IfxMsc_initSonPin (const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SON output. More...
IFX_INLINE void | IfxMsc_initSopPin (const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SOP output. More...

Detailed Description

Function Documentation

◆ IfxMsc_initEnPin()

IFX_INLINE void IfxMsc_initEnPin | ( | const IfxMsc_En_Out * | en,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a EN output.

Parameters
en | the EN Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1572 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initFclnPin()

IFX_INLINE void IfxMsc_initFclnPin | ( | const IfxMsc_Fcln_Out * | fcln,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a FCLN output.

Parameters
fcln | the FCLN Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1582 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initFclpPin()

IFX_INLINE void IfxMsc_initFclpPin | ( | const IfxMsc_Fclp_Out * | fclp,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a FCLP output.

Parameters
fclp | the FCLP Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1592 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initInjPin()

IFX_INLINE void IfxMsc_initInjPin | ( | const IfxMsc_Inj_In * | inj,
 |  | IfxPort_InputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a INJ input.

Parameters
inj | the INJ Pin which should be configured
pinMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1602 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initSdiPin()

IFX_INLINE void IfxMsc_initSdiPin | ( | const IfxMsc_Sdi_In * | sdi,
 |  | IfxPort_InputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SDI input.

Parameters
sdi | the SDI Pin which should be configured
pinMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1612 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initSonPin()

IFX_INLINE void IfxMsc_initSonPin | ( | const IfxMsc_Son_Out * | son,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SON output.

Parameters
son | the SON Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1623 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initSopPin()

IFX_INLINE void IfxMsc_initSopPin | ( | const IfxMsc_Sop_Out * | sop,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SOP output.

Parameters
sop | the SOP Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1633 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » MSC » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN Ifx_MSC * | IfxMsc_getAddress (IfxMsc_Index msc)
IFX_EXTERN IfxMsc_Index | IfxMsc_getIndex (Ifx_MSC *msc)
API to get the resource index of the MSC specified. More...

Detailed Description

Function Documentation

◆ IfxMsc_getAddress()

IFX_EXTERN Ifx_MSC* IfxMsc_getAddress ( IfxMsc_Index msc )
Parameters
msc Resource index of the MSC
Returns
MSC module register address

Definition at line 140 of file IfxMsc.c.

◆ IfxMsc_getIndex()

IFX_EXTERN IfxMsc_Index IfxMsc_getIndex ( Ifx_MSC * msc )

API to get the resource index of the MSC specified.

Parameters
msc Pointer to the MSC HW module (register memory map)
Returns
Resource index of the ERAY

Definition at line 167 of file IfxMsc.c.

Referenced by IfxMsc_getSrcPointer().


iLLD_TC26B: MSC Pin Mapping

Data Structures | Macros | Variables
MSC Pin Mapping
iLLD » MSC
Collaboration diagram for MSC Pin Mapping:

Data Structures

struct | IfxMsc_Inj_In
INJ pin mapping structure. More...
struct | IfxMsc_Sdi_In
SDI pin mapping structure. More...
struct | IfxMsc_En_Out
EN pin mapping structure. More...
struct | IfxMsc_Fclp_Out
FCLP pin mapping structure. More...
struct | IfxMsc_Fcln_Out
FCLN pin mapping structure. More...
struct | IfxMsc_Sop_Out
SOP pin mapping structure. More...
struct | IfxMsc_Son_Out
SON pin mapping structure. More...

Macros

#define | IFXMSC_PINMAP_NUM_MODULES 2
Table dimensions. More...
#define | IFXMSC_PINMAP_NUM_TARGETS 4
#define | IFXMSC_PINMAP_EN_OUT_NUM_ITEMS 6
#define | IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS 2
#define | IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS 3
#define | IFXMSC_PINMAP_INJ_IN_NUM_ITEMS 2
#define | IFXMSC_PINMAP_SDI_IN_NUM_ITEMS 4
#define | IFXMSC_PINMAP_SON_OUT_NUM_ITEMS 2
#define | IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT
MSC1_EN0: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT
MSC1_EN0: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT
MSC1_EN1: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT
MSC1_END2: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT
MSC1_END2: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT
MSC1_END3: MSC1 output. More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT
MSC0_FCLND: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT
MSC0_FCLN: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT
MSC1_FCLND: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT
MSC1_FCLN: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT
MSC0_FCLP: MSC0 output. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT
MSC0_FCLP: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT
MSC0_FCLP: MSC0 output. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT
MSC1_FCLP: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN
MSC0_INJ0: MSC0 input. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN
MSC0_INJ1: MSC0 input. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN
MSC1_INJ0: MSC1 input. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN
MSC1_INJ1: MSC1 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN
MSC0_SDI0: MSC0 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN
MSC0_SDI1: MSC0 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN
MSC0_SDI2: MSC0 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN
MSC0_SDI3: MSC0 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN
MSC1_SDI0: MSC1 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN
MSC1_SDI1: MSC1 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN
MSC1_SDI2: MSC1 input. More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT
MSC0_SOND: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT
MSC0_SON: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT
MSC1_SOND: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT
MSC1_SON: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT
MSC0_SOP: MSC0 output. More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT
MSC0_SOP: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT
MSC1_SOP: MSC1 output (LVDS) More...
IFX_EXTERN const IfxMsc_En_Out * | IfxMsc_En_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]
IfxMsc_En_Out table. More...
IFX_EXTERN const IfxMsc_Fcln_Out * | IfxMsc_Fcln_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
IfxMsc_Fcln_Out table. More...
IFX_EXTERN const IfxMsc_Fclp_Out * | IfxMsc_Fclp_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
IfxMsc_Fclp_Out table. More...
IFX_EXTERN const IfxMsc_Inj_In * | IfxMsc_Inj_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
IfxMsc_Inj_In table. More...
IFX_EXTERN const IfxMsc_Sdi_In * | IfxMsc_Sdi_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
IfxMsc_Sdi_In table. More...
IFX_EXTERN const IfxMsc_Son_Out * | IfxMsc_Son_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
IfxMsc_Son_Out table. More...
IFX_EXTERN const IfxMsc_Sop_Out * | IfxMsc_Sop_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]
IfxMsc_Sop_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxMsc_Inj_In

struct IfxMsc_Inj_In

INJ pin mapping structure.

Definition at line 56 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Inj_In:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxMsc_Sdi_In

struct IfxMsc_Sdi_In

SDI pin mapping structure.

Definition at line 64 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Sdi_In:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxMsc_En_Out

struct IfxMsc_En_Out

EN pin mapping structure.

Definition at line 72 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_En_Out:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.
uint8 | target | Target ID.

◆ IfxMsc_Fclp_Out

struct IfxMsc_Fclp_Out

FCLP pin mapping structure.

Definition at line 81 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Fclp_Out:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxMsc_Fcln_Out

struct IfxMsc_Fcln_Out

FCLN pin mapping structure.

Definition at line 89 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Fcln_Out:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxMsc_Sop_Out

struct IfxMsc_Sop_Out

SOP pin mapping structure.

Definition at line 97 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Sop_Out:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxMsc_Son_Out

struct IfxMsc_Son_Out

SON pin mapping structure.

Definition at line 105 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Son_Out:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXMSC_PINMAP_EN_OUT_NUM_ITEMS

#define IFXMSC_PINMAP_EN_OUT_NUM_ITEMS 6

Definition at line 170 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS

#define IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS 2

Definition at line 171 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS

#define IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS 3

Definition at line 172 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_INJ_IN_NUM_ITEMS

#define IFXMSC_PINMAP_INJ_IN_NUM_ITEMS 2

Definition at line 173 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_NUM_MODULES

#define IFXMSC_PINMAP_NUM_MODULES 2

Table dimensions.

Definition at line 168 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_NUM_TARGETS

#define IFXMSC_PINMAP_NUM_TARGETS 4

Definition at line 169 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_SDI_IN_NUM_ITEMS

#define IFXMSC_PINMAP_SDI_IN_NUM_ITEMS 4

Definition at line 174 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_SON_OUT_NUM_ITEMS

#define IFXMSC_PINMAP_SON_OUT_NUM_ITEMS 2

Definition at line 175 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS

#define IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS 2

Definition at line 176 of file IfxMsc_PinMap.h.

Variable Documentation

◆ IfxMsc0_EN0_P10_2_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT

MSC0_EN0: MSC0 output.

Definition at line 112 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN0_P10_3_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT

MSC0_EN0: MSC0 output.

Definition at line 113 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN0_P10_4_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT

MSC0_EN0: MSC0 output.

Definition at line 114 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN0_P11_11_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT

MSC0_EN0: MSC0 output.

Definition at line 115 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN0_P14_10_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT

MSC0_EN0: MSC0 output.

Definition at line 116 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN0_P15_5_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT

MSC0_EN0: MSC0 output.

Definition at line 117 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN1_P10_1_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT

MSC0_EN1: MSC0 output.

Definition at line 118 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN1_P11_2_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT

MSC0_EN1: MSC0 output.

Definition at line 119 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN1_P13_0_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT

MSC0_EN1: MSC0 output.

Definition at line 120 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN1_P14_9_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT

MSC0_EN1: MSC0 output.

Definition at line 121 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN1_P15_3_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT

MSC0_EN1: MSC0 output.

Definition at line 122 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END2_P10_2_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT

MSC0_END2: MSC0 output.

Definition at line 123 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END2_P10_3_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT

MSC0_END2: MSC0 output.

Definition at line 124 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END2_P10_4_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT

MSC0_END2: MSC0 output.

Definition at line 125 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END2_P11_11_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT

MSC0_END2: MSC0 output.

Definition at line 126 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END2_P14_10_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT

MSC0_END2: MSC0 output.

Definition at line 127 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END2_P15_5_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT

MSC0_END2: MSC0 output.

Definition at line 128 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END3_P10_1_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT

MSC0_END3: MSC0 output.

Definition at line 129 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END3_P11_2_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT

MSC0_END3: MSC0 output.

Definition at line 130 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END3_P13_0_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT

MSC0_END3: MSC0 output.

Definition at line 131 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END3_P14_9_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT

MSC0_END3: MSC0 output.

Definition at line 132 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END3_P15_3_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT

MSC0_END3: MSC0 output.

Definition at line 133 of file IfxMsc_PinMap.h.

◆ IfxMsc0_FCLN_P13_0_OUT

IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT

MSC0_FCLN: MSC0 output (LVDS)

Definition at line 141 of file IfxMsc_PinMap.h.

◆ IfxMsc0_FCLND_P13_0_OUT

IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT

MSC0_FCLND: MSC0 output (LVDS)

Definition at line 140 of file IfxMsc_PinMap.h.

◆ IfxMsc0_FCLP_P11_6_OUT

IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT

MSC0_FCLP: MSC0 output.

Definition at line 144 of file IfxMsc_PinMap.h.

◆ IfxMsc0_FCLP_P13_1_OUT

IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT

MSC0_FCLP: MSC0 output (LVDS)

Definition at line 145 of file IfxMsc_PinMap.h.

◆ IfxMsc0_FCLP_P13_2_OUT

IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT

MSC0_FCLP: MSC0 output.

Definition at line 146 of file IfxMsc_PinMap.h.

◆ IfxMsc0_INJ0_P00_0_IN

IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN

MSC0_INJ0: MSC0 input.

Definition at line 148 of file IfxMsc_PinMap.h.

◆ IfxMsc0_INJ1_P10_5_IN

IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN

MSC0_INJ1: MSC0 input.

Definition at line 149 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SDI0_P11_10_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN

MSC0_SDI0: MSC0 input.

Definition at line 152 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SDI1_P10_2_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN

MSC0_SDI1: MSC0 input.

Definition at line 153 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SDI2_P14_3_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN

MSC0_SDI2: MSC0 input.

Definition at line 154 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SDI3_P11_3_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN

MSC0_SDI3: MSC0 input.

Definition at line 155 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SON_P13_2_OUT

IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT

MSC0_SON: MSC0 output (LVDS)

Definition at line 160 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SOND_P13_2_OUT

IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT

MSC0_SOND: MSC0 output (LVDS)

Definition at line 159 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SOP_P11_9_OUT

IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT

MSC0_SOP: MSC0 output.

Definition at line 163 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SOP_P13_3_OUT

IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT

MSC0_SOP: MSC0 output (LVDS)

Definition at line 164 of file IfxMsc_PinMap.h.

◆ IfxMsc1_EN0_P23_4_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT

MSC1_EN0: MSC1 output.

Definition at line 134 of file IfxMsc_PinMap.h.

◆ IfxMsc1_EN0_P32_4_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT

MSC1_EN0: MSC1 output.

Definition at line 135 of file IfxMsc_PinMap.h.

◆ IfxMsc1_EN1_P23_5_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT

MSC1_EN1: MSC1 output.

Definition at line 136 of file IfxMsc_PinMap.h.

◆ IfxMsc1_END2_P23_4_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT

MSC1_END2: MSC1 output.

Definition at line 137 of file IfxMsc_PinMap.h.

◆ IfxMsc1_END2_P32_4_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT

MSC1_END2: MSC1 output.

Definition at line 138 of file IfxMsc_PinMap.h.

◆ IfxMsc1_END3_P23_5_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT

MSC1_END3: MSC1 output.

Definition at line 139 of file IfxMsc_PinMap.h.

◆ IfxMsc1_FCLN_P22_0_OUT

IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT

MSC1_FCLN: MSC1 output (LVDS)

Definition at line 143 of file IfxMsc_PinMap.h.

◆ IfxMsc1_FCLND_P22_0_OUT

IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT

MSC1_FCLND: MSC1 output (LVDS)

Definition at line 142 of file IfxMsc_PinMap.h.

◆ IfxMsc1_FCLP_P22_1_OUT

IFX_EXTERN IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT

MSC1_FCLP: MSC1 output (LVDS)

Definition at line 147 of file IfxMsc_PinMap.h.

◆ IfxMsc1_INJ0_P23_3_IN

IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN

MSC1_INJ0: MSC1 input.

Definition at line 150 of file IfxMsc_PinMap.h.

◆ IfxMsc1_INJ1_P33_13_IN

IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN

MSC1_INJ1: MSC1 input.

Definition at line 151 of file IfxMsc_PinMap.h.

◆ IfxMsc1_SDI0_P23_1_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN

MSC1_SDI0: MSC1 input.

Definition at line 156 of file IfxMsc_PinMap.h.

◆ IfxMsc1_SDI1_P02_3_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN

MSC1_SDI1: MSC1 input.

Definition at line 157 of file IfxMsc_PinMap.h.

◆ IfxMsc1_SDI2_P32_4_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN

MSC1_SDI2: MSC1 input.

Definition at line 158 of file IfxMsc_PinMap.h.

◆ IfxMsc1_SON_P22_2_OUT

IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT

MSC1_SON: MSC1 output (LVDS)

Definition at line 162 of file IfxMsc_PinMap.h.

◆ IfxMsc1_SOND_P22_2_OUT

IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT

MSC1_SOND: MSC1 output (LVDS)

Definition at line 161 of file IfxMsc_PinMap.h.

◆ IfxMsc1_SOP_P22_3_OUT

IFX_EXTERN IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT

MSC1_SOP: MSC1 output (LVDS)

Definition at line 165 of file IfxMsc_PinMap.h.

◆ IfxMsc_En_Out_pinTable

IFX_EXTERN const IfxMsc_En_Out* IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]

IfxMsc_En_Out table.

Definition at line 180 of file IfxMsc_PinMap.h.

◆ IfxMsc_Fcln_Out_pinTable

IFX_EXTERN const IfxMsc_Fcln_Out* IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]

IfxMsc_Fcln_Out table.

Definition at line 183 of file IfxMsc_PinMap.h.

◆ IfxMsc_Fclp_Out_pinTable

IFX_EXTERN const IfxMsc_Fclp_Out* IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]

IfxMsc_Fclp_Out table.

Definition at line 186 of file IfxMsc_PinMap.h.

◆ IfxMsc_Inj_In_pinTable

IFX_EXTERN const IfxMsc_Inj_In* IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]

IfxMsc_Inj_In table.

Definition at line 189 of file IfxMsc_PinMap.h.

◆ IfxMsc_Sdi_In_pinTable

IFX_EXTERN const IfxMsc_Sdi_In* IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]

IfxMsc_Sdi_In table.

Definition at line 192 of file IfxMsc_PinMap.h.

◆ IfxMsc_Son_Out_pinTable

IFX_EXTERN const IfxMsc_Son_Out* IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]

IfxMsc_Son_Out table.

Definition at line 195 of file IfxMsc_PinMap.h.

◆ IfxMsc_Sop_Out_pinTable

IFX_EXTERN const IfxMsc_Sop_Out* IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]

IfxMsc_Sop_Out table.

Definition at line 198 of file IfxMsc_PinMap.h.


iLLD_TC26B: How to use the MSC Interface driver?

How to use the MSC Interface driver?
iLLD » MSC
Collaboration diagram for How to use the MSC Interface driver?:

The MSC interface driver provides a default MSC configuration

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Msc/Msc/IfxMsc_Msc.h>

Variables

Declare the MSC handle as global variable in your C code:

// MSC handle
static IfxMsc_Msc *msc;
// IO Pins
static const IfxMsc_Msc_Io IfxMsc_PinMap[IFXMSC_NUM_MODULES] = {
{
{ &IfxMsc0_FCLP_P13_1_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc0_FCLN_P13_0_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc0_SOP_P13_3_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc0_SON_P13_2_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc0_EN0_P10_3_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc0_EN1_P11_2_OUT, IfxPort_OutputMode_pushPull },
{NULL_PTR},
{NULL_PTR},
{ &IfxMsc0_SDI0_P11_10_IN, IfxPort_InputMode_pullUp },
{ &IfxMsc0_INJ0_P00_0_IN, IfxPort_InputMode_pullUp },
{ &IfxMsc0_INJ1_P10_5_IN, IfxPort_InputMode_pullUp },
IfxPort_PadDriver_cmosAutomotiveSpeed3
},
#if IFXMSC_NUM_MODULES >= 2
{
{ &IfxMsc1_FCLP_P22_1_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc1_FCLN_P22_0_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc1_SOP_P22_3_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc1_SON_P22_2_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc1_EN0_P23_4_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc1_EN1_P23_5_OUT, IfxPort_OutputMode_pushPull },
{NULL_PTR},
{NULL_PTR},
{ &IfxMsc1_SDI0_P23_1_IN, IfxPort_InputMode_pullUp },
{ &IfxMsc1_INJ0_P23_3_IN, IfxPort_InputMode_pullUp },
{ &IfxMsc1_INJ1_P33_13_IN, IfxPort_InputMode_pullUp },
IfxPort_PadDriver_cmosAutomotiveSpeed3
},
#endif
};

Module Initialisation

The module initialisation can be done as followed:

// create configuration (same is used for all MSCs)
IfxMsc_Msc_Config mscConfig;
IfxMsc_Msc_initModuleConfig(&mscConfig, &MODULE_MSC0);
// increase baudrate for faster simulation:
mscConfig.clockConfig.baudrate = 25000000;
mscConfig.clockConfig.dividerMode = IfxMsc_DividerMode_fractional;
// FCL only activated on transfers
mscConfig.outputControlConfig.fclClockControl = IfxMsc_FclClockControlEnabled_activePhaseOnly;
// in this case we also don't need a selection bit
mscConfig.downstreamConfig.srlActivePhaseSelection = IfxMsc_ActivePhaseSelection_none;
mscConfig.downstreamConfig.srhActivePhaseSelection = IfxMsc_ActivePhaseSelection_none;
// initialize MSCs
for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
// init module pointer
mscConfig.msc = (Ifx_MSC*)IfxMsc_cfg_indexMap[i].module;
// IO Config
mscConfig.io = IfxMsc_PinMap[i];
// initialize module
IfxMsc_Msc_initModule(&msc[i], &mscConfig);
}

The MSC is ready for use now!

Data Transfers

The MSC driver provides simple to use transfer function

for(int n=0; n<10; ++n) {
// clear IRQ flag of previous transfer
for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
msc[i].msc->ISC.B.CDEDI = 1;
}
// new transfer
for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
const unsigned dataL = i*0x1000 + n;
const unsigned dataH = i*0x1000 + 0x0100 + n;
IfxMsc_Msc_sendData(&msc[i], dataL, dataH);
}
// wait until transfers are finished
for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
while( !msc[i].msc->ISR.B.DEDI ); // check if new data could be written
while( msc[i].msc->DSS.B.DFA ); // check if we are still in the active data phase
}
}


iLLD_TC26B: MSC

Modules
MSC
iLLD » MSC
Collaboration diagram for MSC:

Modules

Enumerations
Data Structures
Module Initialize Functions
Send Functions
Receive Functions
Target Read Write Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » MSC » MSC
Collaboration diagram for Enumerations:

Enumerations

enum IfxMsc_Msc_Target {
IfxMsc_Msc_Target_low = 0,
IfxMsc_Msc_Target_high = 1
}
Msc Instance Number. More...

Detailed Description

Enumeration Type Documentation

◆ IfxMsc_Msc_Target

enum IfxMsc_Msc_Target

Msc Instance Number.

Enumerator
IfxMsc_Msc_Target_low | MSC Target Low.
IfxMsc_Msc_Target_high | MSC Target High.

Definition at line 197 of file IfxMsc_Msc.h.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » MSC » MSC
Collaboration diagram for Data Structures:

Data Structures

struct | IfxMsc_Msc_en
struct | IfxMsc_Msc_fcln
struct | IfxMsc_Msc_fclp
struct | IfxMsc_Msc_inj0
struct | IfxMsc_Msc_inj1
struct | IfxMsc_Msc_sdi
struct | IfxMsc_Msc_son
struct | IfxMsc_Msc_sop
struct | IfxMsc_Msc_Abra
ABRA block Configuration Structure. More...
struct | IfxMsc_Msc_Clock
Clock configuration data Structure. More...
struct | IfxMsc_Msc_DownstreamControlConfig
Downstream Control Configuration Structure. More...
struct | IfxMsc_Msc_DownstreamControlExtensionConfig
Downstream Control Extension Configuration Structure. More...
struct | IfxMsc_Msc_InterruptConfig
Interrupt Configuration Structure. More...
struct | IfxMsc_Msc_Io
MSC Pin Configuration Structure. More...
struct | IfxMsc_Msc_OutputControlConfig
Output Control Configuration Structure. More...
struct | IfxMsc_Msc_UpstreamStatusConfig
Upstream Control Configuration Structure. More...
struct | IfxMsc_Msc
MSC base address data Structure. More...
struct | IfxMsc_Msc_Config
MSC Module Configuration Structure. More...

Detailed Description

Data Structure Documentation

◆ IfxMsc_Msc_en

struct IfxMsc_Msc_en

Definition at line 211 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_en:
[legend]
Data Fields
IfxPort_OutputMode | mode
IfxMsc_En_Out * | pin

◆ IfxMsc_Msc_fcln

struct IfxMsc_Msc_fcln

Definition at line 217 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_fcln:
[legend]
Data Fields
IfxPort_OutputMode | mode
IfxMsc_Fcln_Out * | pin

◆ IfxMsc_Msc_fclp

struct IfxMsc_Msc_fclp

Definition at line 223 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_fclp:
[legend]
Data Fields
IfxPort_OutputMode | mode
IfxMsc_Fclp_Out * | pin

◆ IfxMsc_Msc_inj0

struct IfxMsc_Msc_inj0

Definition at line 229 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_inj0:
[legend]
Data Fields
IfxPort_InputMode | mode
IfxMsc_Inj_In * | pin

◆ IfxMsc_Msc_inj1

struct IfxMsc_Msc_inj1

Definition at line 235 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_inj1:
[legend]
Data Fields
IfxPort_InputMode | mode
IfxMsc_Inj_In * | pin

◆ IfxMsc_Msc_sdi

struct IfxMsc_Msc_sdi

Definition at line 241 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_sdi:
[legend]
Data Fields
IfxPort_InputMode | mode
IfxMsc_Sdi_In * | pin

◆ IfxMsc_Msc_son

struct IfxMsc_Msc_son

Definition at line 247 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_son:
[legend]
Data Fields
IfxPort_OutputMode | mode
IfxMsc_Son_Out * | pin

◆ IfxMsc_Msc_sop

struct IfxMsc_Msc_sop

Definition at line 253 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_sop:
[legend]
Data Fields
IfxPort_OutputMode | mode
IfxMsc_Sop_Out * | pin

◆ IfxMsc_Msc_Abra

struct IfxMsc_Msc_Abra

ABRA block Configuration Structure.

Definition at line 265 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_AsynchronousBlock | abraBlockBypass | Specifies ABRA block bypass.
uint32 | abraDownstreamBlockBaudrate | Specifies ABRA downstream block baud.
IfxMsc_ClockSelect | clockSelectAbra | Specifies the clock select for ABRA.
IfxMsc_ShiftClockPhaseDuration | highPhaseOfShiftClock | Specifies High phase of shift clock.
IfxMsc_ShiftClockPhaseDuration | lowPhaseOfShiftClock | Specifies Low phase of shift clock.
IfxMsc_NDividerAbra | nDividerAbra | Specifies the N divider.

◆ IfxMsc_Msc_Clock

struct IfxMsc_Msc_Clock

Clock configuration data Structure.

Definition at line 277 of file IfxMsc_Msc.h.

Data Fields
uint32 | baudrate | Specifies the baud rate.
IfxMsc_DividerMode | dividerMode | Specifies divided clock properties.
uint16 | step | Specifies the step value.

◆ IfxMsc_Msc_DownstreamControlConfig

struct IfxMsc_Msc_DownstreamControlConfig

Downstream Control Configuration Structure.

Definition at line 286 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_CommandDataCommandRepetitionMode | commandDataCommandReceptionMode | Specifies the Command-Data-Command in Data Repetition Mode.
IfxMsc_CommandFrameLength | commandFrameLength | Specifies the Number of bits shifted at command frames.
IfxMsc_DataFramePassivePhaseLength | dataFramePassivePhaseLength | Specifies the Passive Phase Length at Data Frames.
uint32 | downstreamDataSourcesHigh | Specifies the Downstream Data Source selections High.
uint32 | downstreamDataSourcesLow | Specifies the Downstream Data Source selections Low.
uint32 | emergencyStopEnableBits | Emergency Stop.
IfxMsc_ExternalSignalInjection | externalSignalInjectionPin0 | Specifies the Injection Enable Pin 0.
IfxMsc_ExternalSignalInjection | externalSignalInjectionPin1 | Specifies the Injection Enable Pin 1.
IfxMsc_ExternalBitInjectionPosition | injectionPositionPin0 | Specifies the Injection Position Pin 0.
IfxMsc_ExternalBitInjectionPosition | injectionPositionPin1 | Specifies the Injection Position Pin 1.
IfxMsc_PassiveTimeFrameCount | passiveTimeFrameCount | Specifies the Number of Passive Time Frames.
IfxMsc_ActivePhaseSelection | srhActivePhaseSelection | Specifies the Enable SRL active phase selection bit.
IfxMsc_DataFrameLength | srhDataFrameLength | Specifies the Number of SRH bits shifted at data frames.
IfxMsc_ActivePhaseSelection | srlActivePhaseSelection | Specifies the Enable SRL active phase selection bit.
IfxMsc_DataFrameLength | srlDataFrameLength | Specifies the Number of SRL bits shifted at data frames.
IfxMsc_TransmissionMode | transmissionMode | Specifies the transmission Mode.

◆ IfxMsc_Msc_DownstreamControlExtensionConfig

struct IfxMsc_Msc_DownstreamControlExtensionConfig

Downstream Control Extension Configuration Structure.

Definition at line 308 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_ControlFrameExtensionPassivePhaseLength | controlFrameExtensionPassivePhaseLength | Specifies the Passive Phase Length at Control Frames Extension.
IfxMsc_DataFrameExtensionPassivePhaseLength | dataFrameExtensionPassivePhaseLength | Specifies the Passive Phase Length at Data Frames Extension.
uint32 | downstreamExtensionDataSourcesHigh | Specifies the Downstream Select Data Source High Extension.
uint32 | downstreamExtensionDataSourcesLow | Specifies the Downstream Select Data Source Low Extension.
uint32 | emergencyStopExtensionEnableBits | Emergency Stop Extension.
IfxMsc_Extension | extension | Specifies the Extension Enable.
IfxMsc_NDividerDownstream | nDividerDownstream | Specifies the division ratio for downstream generator clock.
IfxMsc_MsbBitDataExtension | srhBitsShiftedAtDataFramesExtension | Specifies the Number of SRHE bits shifted at Data Frames.
IfxMsc_MsbBitDataExtension | srlBitsShiftedAtDataFramesExtension | Specifies the Number of SRLE bits shifted at Data Frames.

◆ IfxMsc_Msc_InterruptConfig

struct IfxMsc_Msc_InterruptConfig

Interrupt Configuration Structure.

Definition at line 323 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_CommandFrameInterrupt | commandFrameInterrupt | Specifies the Command Frame Interrupt Mode.
IfxMsc_CommandFrameInterruptNode | commandFrameInterruptNode | Specifies the Command Frame Interrupt Node.
IfxMsc_DataFrameInterrupt | dataFrameInterrupt | Specifies the Data Frame Interrupt Mode.
IfxMsc_DataFrameInterruptNode | dataFrameInterruptNode | Specifies the Data Frame Interrupt Node.
IfxMsc_OverflowInterrupt | overflowInterrupt | Specifies the ABRA Overflow Interrupt Mode.
IfxMsc_OverflowInterruptNode | overflowInterruptNode | Specifies the ABRA Overflow Interrupt Node.
IfxMsc_ReceiveDataInterrupt | receiveDataInterrupt | Specifies the Receive Interrupt Mode.
IfxMsc_ReceiveDataInterruptNode | receiveDataInterruptNode | Specifies the Receive Interrupt Node.
IfxMsc_TimeFrameInterrupt | timeFrameInterrupt | Specifies the Time Frame Interrupt Mode.
IfxMsc_TimeFrameInterruptNode | timeFrameInterruptNode | Specifies the Time Frame Interrupt Node.
IfxMsc_UnderflowInterrupt | underflowInterrupt | Specifies the ABRA Underflow Interrupt Mode.
IfxMsc_UnderflowInterruptNode | underflowInterruptNode | Specifies the ABRA Underflow Interrupt Node.
IfxMsc_UpstreamTimeoutInterrupt | upstreamTimeoutInterrupt | Specifies the Upstream Timeout Interrupt Mode.
IfxMsc_UpstreamTimeoutInterruptNode | upstreamTimeoutInterruptNode | Specifies the Upstream Timeout Interrupt Node.

◆ IfxMsc_Msc_Io

struct IfxMsc_Msc_Io

MSC Pin Configuration Structure.

Definition at line 343 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_Io:
[legend]
Data Fields
IfxMsc_Msc_en | en0
IfxMsc_Msc_en | en1
IfxMsc_Msc_en | en2
IfxMsc_Msc_en | en3
IfxMsc_Msc_fcln | fcln
IfxMsc_Msc_fclp | fclp
IfxMsc_Msc_inj0 | inj0
IfxMsc_Msc_inj1 | inj1
IfxPort_PadDriver | pinDriver
IfxMsc_Msc_sdi | sdi
IfxMsc_Msc_son | son
IfxMsc_Msc_sop | sop

◆ IfxMsc_Msc_OutputControlConfig

struct IfxMsc_Msc_OutputControlConfig

Output Control Configuration Structure.

Definition at line 361 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_ChipSelectActiveState | cslpPolarity | Specifies the CSLP Polarity.
IfxMsc_FclClockControlEnabled | fclClockControl | Specifies the CLKCTRL Polarity.
IfxMsc_FclLinePolarity | fclpPolarity | Specifies the FCLP Polarity.
IfxMsc_SdiLinePolarity | sdiLinePolarity | Specifies the ILP Polarity.
IfxMsc_SoLinePolarity | sopPolarity | Specifies the SLP Polarity.

◆ IfxMsc_Msc_UpstreamStatusConfig

struct IfxMsc_Msc_UpstreamStatusConfig

Upstream Control Configuration Structure.

Definition at line 372 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_Parity | parity | Specifies the Parity Mode.
IfxMsc_ServiceRequestDelay | serviceRequestDelay | Specifies the Service Request Delay.
IfxMsc_UpstreamChannelFrameType | upstreamChannelFrameType | Specifies the Upstream Channel Frame Type.
IfxMsc_UpstreamChannelReceivingRate | upstreamChannelReceivingRate | Specifies the Upstream Channel Receiving Rate.
IfxMsc_UpstreamTimeoutPrescaler | upstreamTimeoutPrescaler | Specifies the Upstream Timeout Prescaler.
IfxMsc_UpstreamTimeoutValue | upstreamTimeoutValue | Specifies the Upstream Timeout Value.

◆ IfxMsc_Msc

struct IfxMsc_Msc

MSC base address data Structure.

Definition at line 388 of file IfxMsc_Msc.h.

Data Fields
Ifx_MSC * msc Specifies the pointer to the MSC registers.

◆ IfxMsc_Msc_Config

struct IfxMsc_Msc_Config

MSC Module Configuration Structure.

Definition at line 395 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_Config:
[legend]
Data Fields
IfxMsc_Msc_Abra | abraConfig | Specifies the ABRA configuration.
IfxMsc_Msc_Clock | clockConfig | Specifies the Clock configuration.
IfxMsc_Msc_DownstreamControlConfig | downstreamConfig | Specifies the Downstream configuration.
IfxMsc_Msc_DownstreamControlExtensionConfig | downstreamExtensionConfig | Specifies the Downstream Extension configuration.
IfxMsc_Msc_InterruptConfig | interruptConfig | Specifies the Interrupt configuration.
IfxMsc_Msc_Io | io | Specifies the IO Pin configuration.
Ifx_MSC * | msc | Specifies the pointer to the MSC registers.
IfxMsc_Msc_OutputControlConfig | outputControlConfig | Specifies the Output Control configuration.
IfxMsc_Target | target[IFXMSC_NUM_ENABLE_SELECT_LINES] | Specifies the Downstream targets.
IfxMsc_Msc_UpstreamStatusConfig | upstreamConfig | Specifies the Upstream configuration.


iLLD_TC26B: Module Initialize Functions

Functions
Module Initialize Functions
iLLD » MSC » MSC
Collaboration diagram for Module Initialize Functions:

Functions

IFX_EXTERN void | IfxMsc_Msc_deInitModule (IfxMsc_Msc *msc)
de-initialize MSC module More...
IFX_EXTERN void | IfxMsc_Msc_initModule (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC module More...
IFX_EXTERN void | IfxMsc_Msc_initModuleConfig (IfxMsc_Msc_Config *config, Ifx_MSC *msc)
initialize the MSC module configuration More...
IFX_EXTERN void | IfxMsc_Msc_initializeAbra (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the ABRA block More...
IFX_EXTERN void | IfxMsc_Msc_initializeDataExtension (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC data extension block for 64bit operation More...

Detailed Description

Function Documentation

◆ IfxMsc_Msc_deInitModule()

IFX_EXTERN void IfxMsc_Msc_deInitModule ( IfxMsc_Msc * msc )

de-initialize MSC module

Parameters
msc pointer to the MSC module handle
Returns
None
IfxMsc_Msc_deInitModule(&msc);

Definition at line 54 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_initializeAbra()

IFX_EXTERN void IfxMsc_Msc_initializeAbra | ( | IfxMsc_Msc * | msc,
 |  | const IfxMsc_Msc_Config * | config
 | ) |  |

initialize the ABRA block

Parameters
msc | pointer to the MSC module handle
config | pointer to the MSC module configuration
Returns
None

Definition at line 541 of file IfxMsc_Msc.c.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_Msc_initializeDataExtension()

IFX_EXTERN void IfxMsc_Msc_initializeDataExtension | ( | IfxMsc_Msc * | msc,
 |  | const IfxMsc_Msc_Config * | config
 | ) |  |

initialize the MSC data extension block for 64bit operation

Parameters
msc | pointer to the MSC module handle
config | pointer to the MSC module configuration
Returns
None

Definition at line 571 of file IfxMsc_Msc.c.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_Msc_initModule()

IFX_EXTERN void IfxMsc_Msc_initModule | ( | IfxMsc_Msc * | msc,
 |  | const IfxMsc_Msc_Config * | config
 | ) |  |

initialize the MSC module

Parameters
msc | pointer to the MSC module handle
config | pointer to the MSC module configuration
Returns
None

A coding example can be found in How to use the MSC Interface driver?

Definition at line 78 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_initModuleConfig()

IFX_EXTERN void IfxMsc_Msc_initModuleConfig | ( | IfxMsc_Msc_Config * | config,
 |  | Ifx_MSC * | msc
 | ) |  |

initialize the MSC module configuration

Parameters
config | pointer to the MSC configuration
msc | pointer to the MSC registers
Returns
None

A coding example can be found in How to use the MSC Interface driver?

Definition at line 407 of file IfxMsc_Msc.c.


iLLD_TC26B: Send Functions

Functions
Send Functions
iLLD » MSC » MSC
Collaboration diagram for Send Functions:

Functions

IFX_EXTERN void | IfxMsc_Msc_sendCommand (IfxMsc_Msc *msc, uint32 command)
send downstream command More...
IFX_EXTERN void | IfxMsc_Msc_sendData (IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
send complete downstream data, both high and low More...
IFX_EXTERN void | IfxMsc_Msc_sendDataExtension (IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
Send downstream data extension (64bit) More...
IFX_EXTERN void | IfxMsc_Msc_sendDataHigh (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...
IFX_EXTERN void | IfxMsc_Msc_sendDataLow (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...

Detailed Description

Function Documentation

◆ IfxMsc_Msc_sendCommand()

IFX_EXTERN void IfxMsc_Msc_sendCommand | ( | IfxMsc_Msc * | msc,
 |  | uint32 | command
 | ) |  |

send downstream command

Parameters
msc | pointer to the MSC module handle
command | transmit command
Returns
None

Definition at line 639 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_sendData()

IFX_EXTERN void IfxMsc_Msc_sendData | ( | IfxMsc_Msc * | msc,
 |  | uint16 | dataLow,
 |  | uint16 | dataHigh
 | ) |  |

send complete downstream data, both high and low

Parameters
msc | pointer to the MSC module handle
dataLow | low data to be transmitted
dataHigh | high data to be transmitted
Returns
None

A coding example can be found in How to use the MSC Interface driver?

Definition at line 648 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_sendDataExtension()

IFX_EXTERN void IfxMsc_Msc_sendDataExtension | ( | IfxMsc_Msc * | msc,
 |  | uint32 | data,
 |  | uint32 | dataExtension
 | ) |  |

Send downstream data extension (64bit)

Parameters
msc | pointer to the MSC module handle
data | Data to send
dataExtension | Data extension to send
Returns
None

Definition at line 666 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_sendDataHigh()

IFX_EXTERN void IfxMsc_Msc_sendDataHigh | ( | IfxMsc_Msc * | msc,
 |  | uint16 | data
 | ) |  |

send high downstream data

Parameters
msc | pointer to the MSC module handle
data | high downstream data to be transmitted
Returns
None

Definition at line 679 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_sendDataLow()

IFX_EXTERN void IfxMsc_Msc_sendDataLow | ( | IfxMsc_Msc * | msc,
 |  | uint16 | data
 | ) |  |

send high downstream data

Parameters
msc | pointer to the MSC module handle
data | low downstream data to be transmitted
Returns
None

Definition at line 691 of file IfxMsc_Msc.c.


iLLD_TC26B: Receive Functions

Functions
Receive Functions
iLLD » MSC » MSC
Collaboration diagram for Receive Functions:

Functions

IFX_EXTERN uint32 IfxMsc_Msc_receiveData (IfxMsc_Msc *msc, uint8 upstreamIdx)
receive upstream data More...

Detailed Description

Function Documentation

◆ IfxMsc_Msc_receiveData()

IFX_EXTERN uint32 IfxMsc_Msc_receiveData | ( | IfxMsc_Msc * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

receive upstream data

Parameters
msc | pointer to the MSC module handle
upstreamIdx | index of the upstream data register
Returns
data

Definition at line 618 of file IfxMsc_Msc.c.


iLLD_TC26B: Target Read Write Functions

Functions
Target Read Write Functions
iLLD » MSC » MSC
Collaboration diagram for Target Read Write Functions:

Functions

IFX_EXTERN IfxMsc_Target | IfxMsc_Msc_getTarget (IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
get the target during high and low phase More...
IFX_EXTERN void | IfxMsc_Msc_setCommandTarget (IfxMsc_Msc *msc, IfxMsc_Target enX)
set the command for target More...
IFX_EXTERN void | IfxMsc_Msc_setDataTarget (IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
set the target data to be transmitted during low and high phase More...

Detailed Description

Function Documentation

◆ IfxMsc_Msc_getTarget()

IFX_EXTERN IfxMsc_Target IfxMsc_Msc_getTarget | ( | IfxMsc_Msc * | msc,
 |  | IfxMsc_Msc_Target | target
 | ) |  |

get the target during high and low phase

Parameters
msc | pointer to the MSC module handle
target | low phase target or high phase target
Returns
selected target

Definition at line 60 of file IfxMsc_Msc.c.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_Msc_setCommandTarget()

IFX_EXTERN void IfxMsc_Msc_setCommandTarget | ( | IfxMsc_Msc * | msc,
 |  | IfxMsc_Target | enX
 | ) |  |

set the command for target

Parameters
msc | pointer to the MSC module handle
enX | enX target to be selected
Returns
None

Definition at line 703 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_setDataTarget()

IFX_EXTERN void IfxMsc_Msc_setDataTarget | ( | IfxMsc_Msc * | msc,
 |  | IfxMsc_Target | enXHigh,
 |  | IfxMsc_Target | enXLow
 | ) |  |

set the target data to be transmitted during low and high phase

Parameters
msc | pointer to the MSC module handle
enXHigh | high target to be selected
enXLow | low target to be selected
Returns
None

Definition at line 711 of file IfxMsc_Msc.c.


iLLD_TC26B: IfxMsc_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxMsc_cfg.h File Reference
iLLD » MSC

MSC on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxMsc_reg.h"
Include dependency graph for IfxMsc_cfg.h:

Go to the source code of this file.

Macros

#define | IFXMSC_NUM_MODULES 2
#define | IFXMSC_NUM_ENABLE_SELECT_LINES (4)

Enumerations

enum IfxMsc_Index {
IfxMsc_Index_none = -1,
IfxMsc_Index_0 = 0,
IfxMsc_Index_1
}
List of the available MSC resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap [IFXMSC_NUM_MODULES]

Detailed Description

MSC on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMsc_cfg.h.

Macro Definition Documentation

◆ IFXMSC_NUM_ENABLE_SELECT_LINES

#define IFXMSC_NUM_ENABLE_SELECT_LINES (4)

Definition at line 69 of file IfxMsc_cfg.h.

◆ IFXMSC_NUM_MODULES

#define IFXMSC_NUM_MODULES 2

Definition at line 67 of file IfxMsc_cfg.h.

Referenced by IfxMsc_getAddress(), and IfxMsc_getIndex().

Variable Documentation

◆ IfxMsc_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES]

Definition at line 91 of file IfxMsc_cfg.h.


iLLD_TC26B: IfxMsc_PinMap.c File Reference

  • _PinMap
Variables
IfxMsc_PinMap.c File Reference
iLLD » MSC

MSC I/O map. More...

#include "IfxMsc_PinMap.h"
Include dependency graph for IfxMsc_PinMap.c:

Go to the source code of this file.

Variables

IfxMsc_En_Out | IfxMsc0_EN0_P10_2_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc0_EN0_P10_3_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc0_EN0_P10_4_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc0_EN0_P11_11_OUT = {&MODULE_MSC0, 0, {&MODULE_P11,11}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc0_EN0_P14_10_OUT = {&MODULE_MSC0, 0, {&MODULE_P14,10}, IfxPort_OutputIdx_alt3}
IfxMsc_En_Out | IfxMsc0_EN0_P15_5_OUT = {&MODULE_MSC0, 0, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc0_EN1_P10_1_OUT = {&MODULE_MSC0, 1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc0_EN1_P11_2_OUT = {&MODULE_MSC0, 1, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc0_EN1_P13_0_OUT = {&MODULE_MSC0, 1, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc0_EN1_P14_9_OUT = {&MODULE_MSC0, 1, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt3}
IfxMsc_En_Out | IfxMsc0_EN1_P15_3_OUT = {&MODULE_MSC0, 1, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc0_END2_P10_2_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt6}
IfxMsc_En_Out | IfxMsc0_END2_P10_3_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc0_END2_P10_4_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt6}
IfxMsc_En_Out | IfxMsc0_END2_P11_11_OUT = {&MODULE_MSC0, 2, {&MODULE_P11,11}, IfxPort_OutputIdx_alt2}
IfxMsc_En_Out | IfxMsc0_END2_P14_10_OUT = {&MODULE_MSC0, 2, {&MODULE_P14,10}, IfxPort_OutputIdx_alt2}
IfxMsc_En_Out | IfxMsc0_END2_P15_5_OUT = {&MODULE_MSC0, 2, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc0_END3_P10_1_OUT = {&MODULE_MSC0, 3, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt6}
IfxMsc_En_Out | IfxMsc0_END3_P11_2_OUT = {&MODULE_MSC0, 3, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt2}
IfxMsc_En_Out | IfxMsc0_END3_P13_0_OUT = {&MODULE_MSC0, 3, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt2}
IfxMsc_En_Out | IfxMsc0_END3_P14_9_OUT = {&MODULE_MSC0, 3, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt2}
IfxMsc_En_Out | IfxMsc0_END3_P15_3_OUT = {&MODULE_MSC0, 3, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc1_EN0_P23_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc1_EN0_P32_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc1_EN1_P23_5_OUT = {&MODULE_MSC1, 1, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc1_END2_P23_4_OUT = {&MODULE_MSC1, 2, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc1_END2_P32_4_OUT = {&MODULE_MSC1, 2, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt3}
IfxMsc_En_Out | IfxMsc1_END3_P23_5_OUT = {&MODULE_MSC1, 3, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt4}
IfxMsc_Fcln_Out | IfxMsc0_FCLND_P13_0_OUT = {&MODULE_MSC0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt6}
IfxMsc_Fcln_Out | IfxMsc0_FCLN_P13_0_OUT = {&MODULE_MSC0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt5}
IfxMsc_Fcln_Out | IfxMsc1_FCLND_P22_0_OUT = {&MODULE_MSC1, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt6}
IfxMsc_Fcln_Out | IfxMsc1_FCLN_P22_0_OUT = {&MODULE_MSC1, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt5}
IfxMsc_Fclp_Out | IfxMsc0_FCLP_P11_6_OUT = {&MODULE_MSC0, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt5}
IfxMsc_Fclp_Out | IfxMsc0_FCLP_P13_1_OUT = {&MODULE_MSC0, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt5}
IfxMsc_Fclp_Out | IfxMsc0_FCLP_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt4}
IfxMsc_Fclp_Out | IfxMsc1_FCLP_P22_1_OUT = {&MODULE_MSC1, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt5}
IfxMsc_Inj_In | IfxMsc0_INJ0_P00_0_IN = {&MODULE_MSC0, {&MODULE_P00, 0}, Ifx_RxSel_a}
IfxMsc_Inj_In | IfxMsc0_INJ1_P10_5_IN = {&MODULE_MSC0, {&MODULE_P10, 5}, Ifx_RxSel_b}
IfxMsc_Inj_In | IfxMsc1_INJ0_P23_3_IN = {&MODULE_MSC1, {&MODULE_P23, 3}, Ifx_RxSel_a}
IfxMsc_Inj_In | IfxMsc1_INJ1_P33_13_IN = {&MODULE_MSC1, {&MODULE_P33,13}, Ifx_RxSel_b}
IfxMsc_Sdi_In | IfxMsc0_SDI0_P11_10_IN = {&MODULE_MSC0, {&MODULE_P11,10}, Ifx_RxSel_a}
IfxMsc_Sdi_In | IfxMsc0_SDI1_P10_2_IN = {&MODULE_MSC0, {&MODULE_P10, 2}, Ifx_RxSel_b}
IfxMsc_Sdi_In | IfxMsc0_SDI2_P14_3_IN = {&MODULE_MSC0, {&MODULE_P14, 3}, Ifx_RxSel_c}
IfxMsc_Sdi_In | IfxMsc0_SDI3_P11_3_IN = {&MODULE_MSC0, {&MODULE_P11, 3}, Ifx_RxSel_d}
IfxMsc_Sdi_In | IfxMsc1_SDI0_P23_1_IN = {&MODULE_MSC1, {&MODULE_P23, 1}, Ifx_RxSel_a}
IfxMsc_Sdi_In | IfxMsc1_SDI1_P02_3_IN = {&MODULE_MSC1, {&MODULE_P02, 3}, Ifx_RxSel_b}
IfxMsc_Sdi_In | IfxMsc1_SDI2_P32_4_IN = {&MODULE_MSC1, {&MODULE_P32, 4}, Ifx_RxSel_c}
IfxMsc_Son_Out | IfxMsc0_SOND_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt7}
IfxMsc_Son_Out | IfxMsc0_SON_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt5}
IfxMsc_Son_Out | IfxMsc1_SOND_P22_2_OUT = {&MODULE_MSC1, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt6}
IfxMsc_Son_Out | IfxMsc1_SON_P22_2_OUT = {&MODULE_MSC1, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt5}
IfxMsc_Sop_Out | IfxMsc0_SOP_P11_9_OUT = {&MODULE_MSC0, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt5}
IfxMsc_Sop_Out | IfxMsc0_SOP_P13_3_OUT = {&MODULE_MSC0, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt5}
IfxMsc_Sop_Out | IfxMsc1_SOP_P22_3_OUT = {&MODULE_MSC1, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt5}
const IfxMsc_En_Out * | IfxMsc_En_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]
const IfxMsc_Fcln_Out * | IfxMsc_Fcln_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
const IfxMsc_Fclp_Out * | IfxMsc_Fclp_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
const IfxMsc_Inj_In * | IfxMsc_Inj_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
const IfxMsc_Sdi_In * | IfxMsc_Sdi_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
const IfxMsc_Son_Out * | IfxMsc_Son_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
const IfxMsc_Sop_Out * | IfxMsc_Sop_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]

Detailed Description

MSC I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMsc_PinMap.c.

Variable Documentation

◆ IfxMsc0_EN0_P10_2_OUT

IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt4}

Definition at line 45 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN0_P10_3_OUT

IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt4}

Definition at line 46 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN0_P10_4_OUT

IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt5}

Definition at line 47 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN0_P11_11_OUT

IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT = {&MODULE_MSC0, 0, {&MODULE_P11,11}, IfxPort_OutputIdx_alt5}

Definition at line 48 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN0_P14_10_OUT

IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT = {&MODULE_MSC0, 0, {&MODULE_P14,10}, IfxPort_OutputIdx_alt3}

Definition at line 49 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN0_P15_5_OUT

IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT = {&MODULE_MSC0, 0, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt5}

Definition at line 50 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN1_P10_1_OUT

IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT = {&MODULE_MSC0, 1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt4}

Definition at line 51 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN1_P11_2_OUT

IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT = {&MODULE_MSC0, 1, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt5}

Definition at line 52 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN1_P13_0_OUT

IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT = {&MODULE_MSC0, 1, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt4}

Definition at line 53 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN1_P14_9_OUT

IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT = {&MODULE_MSC0, 1, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt3}

Definition at line 54 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN1_P15_3_OUT

IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT = {&MODULE_MSC0, 1, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt5}

Definition at line 55 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END2_P10_2_OUT

IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt6}

Definition at line 56 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END2_P10_3_OUT

IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt5}

Definition at line 57 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END2_P10_4_OUT

IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt6}

Definition at line 58 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END2_P11_11_OUT

IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT = {&MODULE_MSC0, 2, {&MODULE_P11,11}, IfxPort_OutputIdx_alt2}

Definition at line 59 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END2_P14_10_OUT

IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT = {&MODULE_MSC0, 2, {&MODULE_P14,10}, IfxPort_OutputIdx_alt2}

Definition at line 60 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END2_P15_5_OUT

IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT = {&MODULE_MSC0, 2, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt4}

Definition at line 61 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END3_P10_1_OUT

IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT = {&MODULE_MSC0, 3, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt6}

Definition at line 62 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END3_P11_2_OUT

IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT = {&MODULE_MSC0, 3, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt2}

Definition at line 63 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END3_P13_0_OUT

IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT = {&MODULE_MSC0, 3, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt2}

Definition at line 64 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END3_P14_9_OUT

IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT = {&MODULE_MSC0, 3, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt2}

Definition at line 65 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END3_P15_3_OUT

IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT = {&MODULE_MSC0, 3, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt4}

Definition at line 66 of file IfxMsc_PinMap.c.

◆ IfxMsc0_FCLN_P13_0_OUT

IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT = {&MODULE_MSC0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt5}

Definition at line 74 of file IfxMsc_PinMap.c.

◆ IfxMsc0_FCLND_P13_0_OUT

IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT = {&MODULE_MSC0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt6}

Definition at line 73 of file IfxMsc_PinMap.c.

◆ IfxMsc0_FCLP_P11_6_OUT

IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT = {&MODULE_MSC0, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt5}

Definition at line 77 of file IfxMsc_PinMap.c.

◆ IfxMsc0_FCLP_P13_1_OUT

IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT = {&MODULE_MSC0, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt5}

Definition at line 78 of file IfxMsc_PinMap.c.

◆ IfxMsc0_FCLP_P13_2_OUT

IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt4}

Definition at line 79 of file IfxMsc_PinMap.c.

◆ IfxMsc0_INJ0_P00_0_IN

IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN = {&MODULE_MSC0, {&MODULE_P00, 0}, Ifx_RxSel_a}

Definition at line 81 of file IfxMsc_PinMap.c.

◆ IfxMsc0_INJ1_P10_5_IN

IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN = {&MODULE_MSC0, {&MODULE_P10, 5}, Ifx_RxSel_b}

Definition at line 82 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SDI0_P11_10_IN

IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN = {&MODULE_MSC0, {&MODULE_P11,10}, Ifx_RxSel_a}

Definition at line 85 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SDI1_P10_2_IN

IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN = {&MODULE_MSC0, {&MODULE_P10, 2}, Ifx_RxSel_b}

Definition at line 86 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SDI2_P14_3_IN

IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN = {&MODULE_MSC0, {&MODULE_P14, 3}, Ifx_RxSel_c}

Definition at line 87 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SDI3_P11_3_IN

IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN = {&MODULE_MSC0, {&MODULE_P11, 3}, Ifx_RxSel_d}

Definition at line 88 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SON_P13_2_OUT

IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt5}

Definition at line 93 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SOND_P13_2_OUT

IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt7}

Definition at line 92 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SOP_P11_9_OUT

IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT = {&MODULE_MSC0, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt5}

Definition at line 96 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SOP_P13_3_OUT

IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT = {&MODULE_MSC0, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt5}

Definition at line 97 of file IfxMsc_PinMap.c.

◆ IfxMsc1_EN0_P23_4_OUT

IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt5}

Definition at line 67 of file IfxMsc_PinMap.c.

◆ IfxMsc1_EN0_P32_4_OUT

IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt5}

Definition at line 68 of file IfxMsc_PinMap.c.

◆ IfxMsc1_EN1_P23_5_OUT

IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT = {&MODULE_MSC1, 1, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt5}

Definition at line 69 of file IfxMsc_PinMap.c.

◆ IfxMsc1_END2_P23_4_OUT

IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT = {&MODULE_MSC1, 2, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt4}

Definition at line 70 of file IfxMsc_PinMap.c.

◆ IfxMsc1_END2_P32_4_OUT

IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT = {&MODULE_MSC1, 2, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt3}

Definition at line 71 of file IfxMsc_PinMap.c.

◆ IfxMsc1_END3_P23_5_OUT

IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT = {&MODULE_MSC1, 3, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt4}

Definition at line 72 of file IfxMsc_PinMap.c.

◆ IfxMsc1_FCLN_P22_0_OUT

IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT = {&MODULE_MSC1, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt5}

Definition at line 76 of file IfxMsc_PinMap.c.

◆ IfxMsc1_FCLND_P22_0_OUT

IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT = {&MODULE_MSC1, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt6}

Definition at line 75 of file IfxMsc_PinMap.c.

◆ IfxMsc1_FCLP_P22_1_OUT

IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT = {&MODULE_MSC1, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt5}

Definition at line 80 of file IfxMsc_PinMap.c.

◆ IfxMsc1_INJ0_P23_3_IN

IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN = {&MODULE_MSC1, {&MODULE_P23, 3}, Ifx_RxSel_a}

Definition at line 83 of file IfxMsc_PinMap.c.

◆ IfxMsc1_INJ1_P33_13_IN

IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN = {&MODULE_MSC1, {&MODULE_P33,13}, Ifx_RxSel_b}

Definition at line 84 of file IfxMsc_PinMap.c.

◆ IfxMsc1_SDI0_P23_1_IN

IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN = {&MODULE_MSC1, {&MODULE_P23, 1}, Ifx_RxSel_a}

Definition at line 89 of file IfxMsc_PinMap.c.

◆ IfxMsc1_SDI1_P02_3_IN

IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN = {&MODULE_MSC1, {&MODULE_P02, 3}, Ifx_RxSel_b}

Definition at line 90 of file IfxMsc_PinMap.c.

◆ IfxMsc1_SDI2_P32_4_IN

IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN = {&MODULE_MSC1, {&MODULE_P32, 4}, Ifx_RxSel_c}

Definition at line 91 of file IfxMsc_PinMap.c.

◆ IfxMsc1_SON_P22_2_OUT

IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT = {&MODULE_MSC1, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt5}

Definition at line 95 of file IfxMsc_PinMap.c.

◆ IfxMsc1_SOND_P22_2_OUT

IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT = {&MODULE_MSC1, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt6}

Definition at line 94 of file IfxMsc_PinMap.c.

◆ IfxMsc1_SOP_P22_3_OUT

IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT = {&MODULE_MSC1, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt5}

Definition at line 98 of file IfxMsc_PinMap.c.

◆ IfxMsc_En_Out_pinTable

const IfxMsc_En_Out* IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]

Definition at line 101 of file IfxMsc_PinMap.c.

◆ IfxMsc_Fcln_Out_pinTable

const IfxMsc_Fcln_Out* IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_FCLN_P13_0_OUT,
&IfxMsc0_FCLND_P13_0_OUT
},
{
&IfxMsc1_FCLN_P22_0_OUT,
&IfxMsc1_FCLND_P22_0_OUT
}
}
IfxMsc1_FCLN_P22_0_OUT
IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT
Definition: IfxMsc_PinMap.c:76
IfxMsc0_FCLN_P13_0_OUT
IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT
Definition: IfxMsc_PinMap.c:74
IfxMsc1_FCLND_P22_0_OUT
IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT
Definition: IfxMsc_PinMap.c:75
IfxMsc0_FCLND_P13_0_OUT
IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT
Definition: IfxMsc_PinMap.c:73

Definition at line 172 of file IfxMsc_PinMap.c.

◆ IfxMsc_Fclp_Out_pinTable

const IfxMsc_Fclp_Out* IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_FCLP_P11_6_OUT,
&IfxMsc0_FCLP_P13_1_OUT,
&IfxMsc0_FCLP_P13_2_OUT
},
{
&IfxMsc1_FCLP_P22_1_OUT,
NULL_PTR,
NULL_PTR
}
}
IfxMsc0_FCLP_P13_1_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT
Definition: IfxMsc_PinMap.c:78
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxMsc1_FCLP_P22_1_OUT
IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT
Definition: IfxMsc_PinMap.c:80
IfxMsc0_FCLP_P13_2_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT
Definition: IfxMsc_PinMap.c:79
IfxMsc0_FCLP_P11_6_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT
Definition: IfxMsc_PinMap.c:77

Definition at line 183 of file IfxMsc_PinMap.c.

◆ IfxMsc_Inj_In_pinTable

const IfxMsc_Inj_In* IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_INJ0_P00_0_IN,
&IfxMsc0_INJ1_P10_5_IN
},
{
&IfxMsc1_INJ0_P23_3_IN,
&IfxMsc1_INJ1_P33_13_IN
}
}
IfxMsc1_INJ0_P23_3_IN
IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN
Definition: IfxMsc_PinMap.c:83
IfxMsc0_INJ1_P10_5_IN
IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN
Definition: IfxMsc_PinMap.c:82
IfxMsc0_INJ0_P00_0_IN
IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN
Definition: IfxMsc_PinMap.c:81
IfxMsc1_INJ1_P33_13_IN
IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN
Definition: IfxMsc_PinMap.c:84

Definition at line 196 of file IfxMsc_PinMap.c.

◆ IfxMsc_Sdi_In_pinTable

const IfxMsc_Sdi_In* IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_SDI0_P11_10_IN,
&IfxMsc0_SDI1_P10_2_IN,
&IfxMsc0_SDI2_P14_3_IN,
&IfxMsc0_SDI3_P11_3_IN
},
{
&IfxMsc1_SDI0_P23_1_IN,
&IfxMsc1_SDI1_P02_3_IN,
&IfxMsc1_SDI2_P32_4_IN,
NULL_PTR
}
}
IfxMsc1_SDI0_P23_1_IN
IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN
Definition: IfxMsc_PinMap.c:89
IfxMsc1_SDI2_P32_4_IN
IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN
Definition: IfxMsc_PinMap.c:91
IfxMsc0_SDI2_P14_3_IN
IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN
Definition: IfxMsc_PinMap.c:87
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxMsc0_SDI3_P11_3_IN
IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN
Definition: IfxMsc_PinMap.c:88
IfxMsc0_SDI1_P10_2_IN
IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN
Definition: IfxMsc_PinMap.c:86
IfxMsc0_SDI0_P11_10_IN
IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN
Definition: IfxMsc_PinMap.c:85
IfxMsc1_SDI1_P02_3_IN
IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN
Definition: IfxMsc_PinMap.c:90

Definition at line 207 of file IfxMsc_PinMap.c.

◆ IfxMsc_Son_Out_pinTable

const IfxMsc_Son_Out* IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_SON_P13_2_OUT,
&IfxMsc0_SOND_P13_2_OUT
},
{
&IfxMsc1_SON_P22_2_OUT,
&IfxMsc1_SOND_P22_2_OUT
}
}
IfxMsc0_SOND_P13_2_OUT
IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT
Definition: IfxMsc_PinMap.c:92
IfxMsc0_SON_P13_2_OUT
IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT
Definition: IfxMsc_PinMap.c:93
IfxMsc1_SON_P22_2_OUT
IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT
Definition: IfxMsc_PinMap.c:95
IfxMsc1_SOND_P22_2_OUT
IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT
Definition: IfxMsc_PinMap.c:94

Definition at line 222 of file IfxMsc_PinMap.c.

◆ IfxMsc_Sop_Out_pinTable

const IfxMsc_Sop_Out* IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_SOP_P11_9_OUT,
&IfxMsc0_SOP_P13_3_OUT
},
{
&IfxMsc1_SOP_P22_3_OUT,
NULL_PTR
}
}
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxMsc1_SOP_P22_3_OUT
IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT
Definition: IfxMsc_PinMap.c:98
IfxMsc0_SOP_P11_9_OUT
IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT
Definition: IfxMsc_PinMap.c:96
IfxMsc0_SOP_P13_3_OUT
IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT
Definition: IfxMsc_PinMap.c:97

Definition at line 233 of file IfxMsc_PinMap.c.


iLLD_TC26B: IfxMsc_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxMsc_PinMap.h File Reference
iLLD » MSC

MSC I/O map. More...

#include <IfxMsc_reg.h>
#include <_Impl/IfxMsc_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxMsc_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxMsc_Inj_In
INJ pin mapping structure. More...
struct | IfxMsc_Sdi_In
SDI pin mapping structure. More...
struct | IfxMsc_En_Out
EN pin mapping structure. More...
struct | IfxMsc_Fclp_Out
FCLP pin mapping structure. More...
struct | IfxMsc_Fcln_Out
FCLN pin mapping structure. More...
struct | IfxMsc_Sop_Out
SOP pin mapping structure. More...
struct | IfxMsc_Son_Out
SON pin mapping structure. More...

Macros

#define | IFXMSC_PINMAP_NUM_MODULES 2
Table dimensions. More...
#define | IFXMSC_PINMAP_NUM_TARGETS 4
#define | IFXMSC_PINMAP_EN_OUT_NUM_ITEMS 6
#define | IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS 2
#define | IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS 3
#define | IFXMSC_PINMAP_INJ_IN_NUM_ITEMS 2
#define | IFXMSC_PINMAP_SDI_IN_NUM_ITEMS 4
#define | IFXMSC_PINMAP_SON_OUT_NUM_ITEMS 2
#define | IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT
MSC1_EN0: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT
MSC1_EN0: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT
MSC1_EN1: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT
MSC1_END2: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT
MSC1_END2: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT
MSC1_END3: MSC1 output. More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT
MSC0_FCLND: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT
MSC0_FCLN: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT
MSC1_FCLND: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT
MSC1_FCLN: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT
MSC0_FCLP: MSC0 output. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT
MSC0_FCLP: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT
MSC0_FCLP: MSC0 output. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT
MSC1_FCLP: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN
MSC0_INJ0: MSC0 input. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN
MSC0_INJ1: MSC0 input. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN
MSC1_INJ0: MSC1 input. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN
MSC1_INJ1: MSC1 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN
MSC0_SDI0: MSC0 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN
MSC0_SDI1: MSC0 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN
MSC0_SDI2: MSC0 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN
MSC0_SDI3: MSC0 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN
MSC1_SDI0: MSC1 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN
MSC1_SDI1: MSC1 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN
MSC1_SDI2: MSC1 input. More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT
MSC0_SOND: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT
MSC0_SON: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT
MSC1_SOND: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT
MSC1_SON: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT
MSC0_SOP: MSC0 output. More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT
MSC0_SOP: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT
MSC1_SOP: MSC1 output (LVDS) More...
IFX_EXTERN const IfxMsc_En_Out * | IfxMsc_En_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]
IfxMsc_En_Out table. More...
IFX_EXTERN const IfxMsc_Fcln_Out * | IfxMsc_Fcln_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
IfxMsc_Fcln_Out table. More...
IFX_EXTERN const IfxMsc_Fclp_Out * | IfxMsc_Fclp_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
IfxMsc_Fclp_Out table. More...
IFX_EXTERN const IfxMsc_Inj_In * | IfxMsc_Inj_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
IfxMsc_Inj_In table. More...
IFX_EXTERN const IfxMsc_Sdi_In * | IfxMsc_Sdi_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
IfxMsc_Sdi_In table. More...
IFX_EXTERN const IfxMsc_Son_Out * | IfxMsc_Son_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
IfxMsc_Son_Out table. More...
IFX_EXTERN const IfxMsc_Sop_Out * | IfxMsc_Sop_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]
IfxMsc_Sop_Out table. More...

Detailed Description

MSC I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMsc_PinMap.h.


iLLD_TC26B: IfxMsc_Msc.h File Reference

  • Msc
  • Msc
Data Structures | Enumerations | Functions
IfxMsc_Msc.h File Reference
iLLD » MSC

MSC MSC details. More...

#include "Msc/Std/IfxMsc.h"
Include dependency graph for IfxMsc_Msc.h:

Go to the source code of this file.

Data Structures

struct | IfxMsc_Msc_en
struct | IfxMsc_Msc_fcln
struct | IfxMsc_Msc_fclp
struct | IfxMsc_Msc_inj0
struct | IfxMsc_Msc_inj1
struct | IfxMsc_Msc_sdi
struct | IfxMsc_Msc_son
struct | IfxMsc_Msc_sop
struct | IfxMsc_Msc_Abra
ABRA block Configuration Structure. More...
struct | IfxMsc_Msc_Clock
Clock configuration data Structure. More...
struct | IfxMsc_Msc_DownstreamControlConfig
Downstream Control Configuration Structure. More...
struct | IfxMsc_Msc_DownstreamControlExtensionConfig
Downstream Control Extension Configuration Structure. More...
struct | IfxMsc_Msc_InterruptConfig
Interrupt Configuration Structure. More...
struct | IfxMsc_Msc_Io
MSC Pin Configuration Structure. More...
struct | IfxMsc_Msc_OutputControlConfig
Output Control Configuration Structure. More...
struct | IfxMsc_Msc_UpstreamStatusConfig
Upstream Control Configuration Structure. More...
struct | IfxMsc_Msc
MSC base address data Structure. More...
struct | IfxMsc_Msc_Config
MSC Module Configuration Structure. More...

Enumerations

enum IfxMsc_Msc_Target {
IfxMsc_Msc_Target_low = 0,
IfxMsc_Msc_Target_high = 1
}
Msc Instance Number. More...

Functions

IFX_EXTERN void | IfxMsc_Msc_deInitModule (IfxMsc_Msc *msc)
de-initialize MSC module More...
IFX_EXTERN void | IfxMsc_Msc_initModule (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC module More...
IFX_EXTERN void | IfxMsc_Msc_initModuleConfig (IfxMsc_Msc_Config *config, Ifx_MSC *msc)
initialize the MSC module configuration More...
IFX_EXTERN void | IfxMsc_Msc_initializeAbra (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the ABRA block More...
IFX_EXTERN void | IfxMsc_Msc_initializeDataExtension (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC data extension block for 64bit operation More...
IFX_EXTERN void | IfxMsc_Msc_sendCommand (IfxMsc_Msc *msc, uint32 command)
send downstream command More...
IFX_EXTERN void | IfxMsc_Msc_sendData (IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
send complete downstream data, both high and low More...
IFX_EXTERN void | IfxMsc_Msc_sendDataExtension (IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
Send downstream data extension (64bit) More...
IFX_EXTERN void | IfxMsc_Msc_sendDataHigh (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...
IFX_EXTERN void | IfxMsc_Msc_sendDataLow (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...
IFX_EXTERN uint32 | IfxMsc_Msc_receiveData (IfxMsc_Msc *msc, uint8 upstreamIdx)
receive upstream data More...
IFX_EXTERN IfxMsc_Target | IfxMsc_Msc_getTarget (IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
get the target during high and low phase More...
IFX_EXTERN void | IfxMsc_Msc_setCommandTarget (IfxMsc_Msc *msc, IfxMsc_Target enX)
set the command for target More...
IFX_EXTERN void | IfxMsc_Msc_setDataTarget (IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
set the target data to be transmitted during low and high phase More...
IFX_INLINE void | IfxMsc_Msc_clearDataFrameInterrupt (IfxMsc_Msc *msc)
IFX_INLINE boolean | IfxMsc_Msc_getActiveDataFrameStatus (IfxMsc_Msc *msc)
IFX_INLINE boolean | IfxMsc_Msc_getDataFrameInterruptStatus (IfxMsc_Msc *msc)

Detailed Description

MSC MSC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMsc_Msc.h.

Function Documentation

◆ IfxMsc_Msc_clearDataFrameInterrupt()

IFX_INLINE void IfxMsc_Msc_clearDataFrameInterrupt ( IfxMsc_Msc * msc )
Parameters
msc pointer to the MSC module handle
Returns
None

Definition at line 587 of file IfxMsc_Msc.h.

◆ IfxMsc_Msc_getActiveDataFrameStatus()

IFX_INLINE boolean IfxMsc_Msc_getActiveDataFrameStatus ( IfxMsc_Msc * msc )
Parameters
msc pointer to the MSC module handle
Returns
status of the active data frame

Definition at line 593 of file IfxMsc_Msc.h.

◆ IfxMsc_Msc_getDataFrameInterruptStatus()

IFX_INLINE boolean IfxMsc_Msc_getDataFrameInterruptStatus ( IfxMsc_Msc * msc )
Parameters
msc pointer to the MSC module handle
Returns
status of the data frame interrupt

Definition at line 599 of file IfxMsc_Msc.h.


iLLD_TC26B: IfxMsc.h File Reference

  • Msc
  • Std
Enumerations | Functions
IfxMsc.h File Reference
iLLD » MSC

MSC basic functionality. More...

#include "_Impl/IfxMsc_cfg.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Scu/Std/IfxScuWdt.h"
#include "_PinMap/IfxMsc_PinMap.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxMsc.h:

Go to the source code of this file.

Enumerations

enum IfxMsc_ActivePhaseSelection {
IfxMsc_ActivePhaseSelection_none = 0,
IfxMsc_ActivePhaseSelection_lowLevel = 1
}
Enable SRL/SRH Active Phase Selection Bit
Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL. More...
enum IfxMsc_AsynchronousBlock {
IfxMsc_AsynchronousBlock_bypassed = 0,
IfxMsc_AsynchronousBlock_noBypassed = 1
}
Asynchronous Block Configuration Register - Asynchronous Block Bypass
Definition in Ifx_MSC.ABC.B.ABB. More...
enum IfxMsc_ChipSelectActiveState {
IfxMsc_ChipSelectActiveState_high = 0,
IfxMsc_ChipSelectActiveState_low = 1
}
Output Control Register - Chip Selection Line Polarity
Definition in Ifx_MSC.OCR.B.CSLP. More...
enum IfxMsc_ClockSelect {
IfxMsc_ClockSelect_noClock = 0,
IfxMsc_ClockSelect_fspb = 1,
IfxMsc_ClockSelect_fsri = 2,
IfxMsc_ClockSelect_feray = 4
}
Asynchronous Block Configuration Register - Clock Select
Definition in Ifx_MSC.ABC.B.CLKSEL. More...
enum IfxMsc_CommandDataCommandRepetitionMode {
IfxMsc_CommandDataCommandRepetitionMode_disabled = 0,
IfxMsc_CommandDataCommandRepetitionMode_enabled = 1
}
Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode
Definition in Ifx_MSC.DSCE.B.CDCM. More...
enum IfxMsc_CommandFrameInterrupt {
IfxMsc_CommandFrameInterrupt_disabled = 0,
IfxMsc_CommandFrameInterrupt_enabled = 1
}
Interrupt Control Register - Command Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.ECIE. More...
enum IfxMsc_CommandFrameInterruptNode {
IfxMsc_CommandFrameInterruptNode_SR0 = 0,
IfxMsc_CommandFrameInterruptNode_SR1,
IfxMsc_CommandFrameInterruptNode_SR2,
IfxMsc_CommandFrameInterruptNode_SR3
}
Interrupt Control Register - Command Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.ECIP. More...
enum IfxMsc_CommandFrameLength {
IfxMsc_CommandFrameLength_0 = 0,
IfxMsc_CommandFrameLength_1 = 1,
IfxMsc_CommandFrameLength_2 = 2,
IfxMsc_CommandFrameLength_3,
IfxMsc_CommandFrameLength_4,
IfxMsc_CommandFrameLength_5,
IfxMsc_CommandFrameLength_6,
IfxMsc_CommandFrameLength_7,
IfxMsc_CommandFrameLength_8,
IfxMsc_CommandFrameLength_9,
IfxMsc_CommandFrameLength_10,
IfxMsc_CommandFrameLength_11,
IfxMsc_CommandFrameLength_12,
IfxMsc_CommandFrameLength_13,
IfxMsc_CommandFrameLength_14,
IfxMsc_CommandFrameLength_15,
IfxMsc_CommandFrameLength_16,
IfxMsc_CommandFrameLength_17 = 17,
IfxMsc_CommandFrameLength_18 = 18,
IfxMsc_CommandFrameLength_19,
IfxMsc_CommandFrameLength_20,
IfxMsc_CommandFrameLength_21,
IfxMsc_CommandFrameLength_22,
IfxMsc_CommandFrameLength_23,
IfxMsc_CommandFrameLength_24,
IfxMsc_CommandFrameLength_25,
IfxMsc_CommandFrameLength_26,
IfxMsc_CommandFrameLength_27,
IfxMsc_CommandFrameLength_28,
IfxMsc_CommandFrameLength_29,
IfxMsc_CommandFrameLength_30,
IfxMsc_CommandFrameLength_31,
IfxMsc_CommandFrameLength_32
}
Number of Bits shifted at command frames
Definition in Ifx_MSC.DSC.B.NBC. More...
enum IfxMsc_ControlFrameExtensionPassivePhaseLength {
IfxMsc_ControlFrameExtensionPassivePhaseLength_0 = 0,
IfxMsc_ControlFrameExtensionPassivePhaseLength_1,
IfxMsc_ControlFrameExtensionPassivePhaseLength_2,
IfxMsc_ControlFrameExtensionPassivePhaseLength_3,
IfxMsc_ControlFrameExtensionPassivePhaseLength_4,
IfxMsc_ControlFrameExtensionPassivePhaseLength_5,
IfxMsc_ControlFrameExtensionPassivePhaseLength_6,
IfxMsc_ControlFrameExtensionPassivePhaseLength_7,
IfxMsc_ControlFrameExtensionPassivePhaseLength_8,
IfxMsc_ControlFrameExtensionPassivePhaseLength_9,
IfxMsc_ControlFrameExtensionPassivePhaseLength_10,
IfxMsc_ControlFrameExtensionPassivePhaseLength_11,
IfxMsc_ControlFrameExtensionPassivePhaseLength_12,
IfxMsc_ControlFrameExtensionPassivePhaseLength_13,
IfxMsc_ControlFrameExtensionPassivePhaseLength_14,
IfxMsc_ControlFrameExtensionPassivePhaseLength_15,
IfxMsc_ControlFrameExtensionPassivePhaseLength_16,
IfxMsc_ControlFrameExtensionPassivePhaseLength_17,
IfxMsc_ControlFrameExtensionPassivePhaseLength_18,
IfxMsc_ControlFrameExtensionPassivePhaseLength_19,
IfxMsc_ControlFrameExtensionPassivePhaseLength_20,
IfxMsc_ControlFrameExtensionPassivePhaseLength_21,
IfxMsc_ControlFrameExtensionPassivePhaseLength_22,
IfxMsc_ControlFrameExtensionPassivePhaseLength_23,
IfxMsc_ControlFrameExtensionPassivePhaseLength_24,
IfxMsc_ControlFrameExtensionPassivePhaseLength_25,
IfxMsc_ControlFrameExtensionPassivePhaseLength_26,
IfxMsc_ControlFrameExtensionPassivePhaseLength_27,
IfxMsc_ControlFrameExtensionPassivePhaseLength_28,
IfxMsc_ControlFrameExtensionPassivePhaseLength_29,
IfxMsc_ControlFrameExtensionPassivePhaseLength_30,
IfxMsc_ControlFrameExtensionPassivePhaseLength_31,
IfxMsc_ControlFrameExtensionPassivePhaseLength_32,
IfxMsc_ControlFrameExtensionPassivePhaseLength_33,
IfxMsc_ControlFrameExtensionPassivePhaseLength_34,
IfxMsc_ControlFrameExtensionPassivePhaseLength_35,
IfxMsc_ControlFrameExtensionPassivePhaseLength_36,
IfxMsc_ControlFrameExtensionPassivePhaseLength_37,
IfxMsc_ControlFrameExtensionPassivePhaseLength_38,
IfxMsc_ControlFrameExtensionPassivePhaseLength_39,
IfxMsc_ControlFrameExtensionPassivePhaseLength_40,
IfxMsc_ControlFrameExtensionPassivePhaseLength_41,
IfxMsc_ControlFrameExtensionPassivePhaseLength_42,
IfxMsc_ControlFrameExtensionPassivePhaseLength_43,
IfxMsc_ControlFrameExtensionPassivePhaseLength_44,
IfxMsc_ControlFrameExtensionPassivePhaseLength_45,
IfxMsc_ControlFrameExtensionPassivePhaseLength_46,
IfxMsc_ControlFrameExtensionPassivePhaseLength_47,
IfxMsc_ControlFrameExtensionPassivePhaseLength_48,
IfxMsc_ControlFrameExtensionPassivePhaseLength_49,
IfxMsc_ControlFrameExtensionPassivePhaseLength_50,
IfxMsc_ControlFrameExtensionPassivePhaseLength_51,
IfxMsc_ControlFrameExtensionPassivePhaseLength_52,
IfxMsc_ControlFrameExtensionPassivePhaseLength_53,
IfxMsc_ControlFrameExtensionPassivePhaseLength_54,
IfxMsc_ControlFrameExtensionPassivePhaseLength_55,
IfxMsc_ControlFrameExtensionPassivePhaseLength_56,
IfxMsc_ControlFrameExtensionPassivePhaseLength_57,
IfxMsc_ControlFrameExtensionPassivePhaseLength_58,
IfxMsc_ControlFrameExtensionPassivePhaseLength_59,
IfxMsc_ControlFrameExtensionPassivePhaseLength_60,
IfxMsc_ControlFrameExtensionPassivePhaseLength_61,
IfxMsc_ControlFrameExtensionPassivePhaseLength_62,
IfxMsc_ControlFrameExtensionPassivePhaseLength_63,
IfxMsc_ControlFrameExtensionPassivePhaseLength_64,
IfxMsc_ControlFrameExtensionPassivePhaseLength_65,
IfxMsc_ControlFrameExtensionPassivePhaseLength_66,
IfxMsc_ControlFrameExtensionPassivePhaseLength_67,
IfxMsc_ControlFrameExtensionPassivePhaseLength_68,
IfxMsc_ControlFrameExtensionPassivePhaseLength_69,
IfxMsc_ControlFrameExtensionPassivePhaseLength_70,
IfxMsc_ControlFrameExtensionPassivePhaseLength_71,
IfxMsc_ControlFrameExtensionPassivePhaseLength_72,
IfxMsc_ControlFrameExtensionPassivePhaseLength_73,
IfxMsc_ControlFrameExtensionPassivePhaseLength_74,
IfxMsc_ControlFrameExtensionPassivePhaseLength_75,
IfxMsc_ControlFrameExtensionPassivePhaseLength_76,
IfxMsc_ControlFrameExtensionPassivePhaseLength_77,
IfxMsc_ControlFrameExtensionPassivePhaseLength_78,
IfxMsc_ControlFrameExtensionPassivePhaseLength_79,
IfxMsc_ControlFrameExtensionPassivePhaseLength_80,
IfxMsc_ControlFrameExtensionPassivePhaseLength_81,
IfxMsc_ControlFrameExtensionPassivePhaseLength_82,
IfxMsc_ControlFrameExtensionPassivePhaseLength_83,
IfxMsc_ControlFrameExtensionPassivePhaseLength_84,
IfxMsc_ControlFrameExtensionPassivePhaseLength_85,
IfxMsc_ControlFrameExtensionPassivePhaseLength_86,
IfxMsc_ControlFrameExtensionPassivePhaseLength_87,
IfxMsc_ControlFrameExtensionPassivePhaseLength_88,
IfxMsc_ControlFrameExtensionPassivePhaseLength_89,
IfxMsc_ControlFrameExtensionPassivePhaseLength_90,
IfxMsc_ControlFrameExtensionPassivePhaseLength_91,
IfxMsc_ControlFrameExtensionPassivePhaseLength_92,
IfxMsc_ControlFrameExtensionPassivePhaseLength_93,
IfxMsc_ControlFrameExtensionPassivePhaseLength_94,
IfxMsc_ControlFrameExtensionPassivePhaseLength_95,
IfxMsc_ControlFrameExtensionPassivePhaseLength_96,
IfxMsc_ControlFrameExtensionPassivePhaseLength_97,
IfxMsc_ControlFrameExtensionPassivePhaseLength_98,
IfxMsc_ControlFrameExtensionPassivePhaseLength_99,
IfxMsc_ControlFrameExtensionPassivePhaseLength_100,
IfxMsc_ControlFrameExtensionPassivePhaseLength_101,
IfxMsc_ControlFrameExtensionPassivePhaseLength_102,
IfxMsc_ControlFrameExtensionPassivePhaseLength_103,
IfxMsc_ControlFrameExtensionPassivePhaseLength_104,
IfxMsc_ControlFrameExtensionPassivePhaseLength_105,
IfxMsc_ControlFrameExtensionPassivePhaseLength_106,
IfxMsc_ControlFrameExtensionPassivePhaseLength_107,
IfxMsc_ControlFrameExtensionPassivePhaseLength_108,
IfxMsc_ControlFrameExtensionPassivePhaseLength_109,
IfxMsc_ControlFrameExtensionPassivePhaseLength_110,
IfxMsc_ControlFrameExtensionPassivePhaseLength_111,
IfxMsc_ControlFrameExtensionPassivePhaseLength_112,
IfxMsc_ControlFrameExtensionPassivePhaseLength_113,
IfxMsc_ControlFrameExtensionPassivePhaseLength_114,
IfxMsc_ControlFrameExtensionPassivePhaseLength_115,
IfxMsc_ControlFrameExtensionPassivePhaseLength_116,
IfxMsc_ControlFrameExtensionPassivePhaseLength_117,
IfxMsc_ControlFrameExtensionPassivePhaseLength_118,
IfxMsc_ControlFrameExtensionPassivePhaseLength_119,
IfxMsc_ControlFrameExtensionPassivePhaseLength_120,
IfxMsc_ControlFrameExtensionPassivePhaseLength_121,
IfxMsc_ControlFrameExtensionPassivePhaseLength_122,
IfxMsc_ControlFrameExtensionPassivePhaseLength_123,
IfxMsc_ControlFrameExtensionPassivePhaseLength_124,
IfxMsc_ControlFrameExtensionPassivePhaseLength_125,
IfxMsc_ControlFrameExtensionPassivePhaseLength_126,
IfxMsc_ControlFrameExtensionPassivePhaseLength_127
}
Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension
Definition in Ifx_MSC.DSTE.B.PPCE. More...
enum IfxMsc_DataFrameExtensionPassivePhaseLength {
IfxMsc_DataFrameExtensionPassivePhaseLength_0 = 0,
IfxMsc_DataFrameExtensionPassivePhaseLength_1,
IfxMsc_DataFrameExtensionPassivePhaseLength_2,
IfxMsc_DataFrameExtensionPassivePhaseLength_3
}
Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension
Definition in Ifx_MSC.DSTE.B.PPDE. More...
enum IfxMsc_DataFrameInterrupt {
IfxMsc_DataFrameInterrupt_disabled = 0,
IfxMsc_DataFrameInterrupt_atLastDataBit = 1,
IfxMsc_DataFrameInterrupt_atFirstDataBit = 2
}
Interrupt Control Register - Data Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.EDIE. More...
enum IfxMsc_DataFrameInterruptNode {
IfxMsc_DataFrameInterruptNode_SR0 = 0,
IfxMsc_DataFrameInterruptNode_SR1,
IfxMsc_DataFrameInterruptNode_SR2,
IfxMsc_DataFrameInterruptNode_SR3
}
Interrupt Control Register - Data Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.EDIP. More...
enum IfxMsc_DataFrameLength {
IfxMsc_DataFrameLength_0 = 0,
IfxMsc_DataFrameLength_1 = 1,
IfxMsc_DataFrameLength_2 = 2,
IfxMsc_DataFrameLength_3,
IfxMsc_DataFrameLength_4,
IfxMsc_DataFrameLength_5,
IfxMsc_DataFrameLength_6,
IfxMsc_DataFrameLength_7,
IfxMsc_DataFrameLength_8,
IfxMsc_DataFrameLength_9,
IfxMsc_DataFrameLength_10,
IfxMsc_DataFrameLength_11,
IfxMsc_DataFrameLength_12,
IfxMsc_DataFrameLength_13,
IfxMsc_DataFrameLength_14,
IfxMsc_DataFrameLength_15,
IfxMsc_DataFrameLength_16
}
Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames
Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL. More...
enum IfxMsc_DataFramePassivePhaseLength {
IfxMsc_DataFramePassivePhaseLength_2 = 2,
IfxMsc_DataFramePassivePhaseLength_3,
IfxMsc_DataFramePassivePhaseLength_4,
IfxMsc_DataFramePassivePhaseLength_5,
IfxMsc_DataFramePassivePhaseLength_6,
IfxMsc_DataFramePassivePhaseLength_7,
IfxMsc_DataFramePassivePhaseLength_8,
IfxMsc_DataFramePassivePhaseLength_9,
IfxMsc_DataFramePassivePhaseLength_10,
IfxMsc_DataFramePassivePhaseLength_11,
IfxMsc_DataFramePassivePhaseLength_12,
IfxMsc_DataFramePassivePhaseLength_13,
IfxMsc_DataFramePassivePhaseLength_14,
IfxMsc_DataFramePassivePhaseLength_15,
IfxMsc_DataFramePassivePhaseLength_16,
IfxMsc_DataFramePassivePhaseLength_17,
IfxMsc_DataFramePassivePhaseLength_18,
IfxMsc_DataFramePassivePhaseLength_19,
IfxMsc_DataFramePassivePhaseLength_20,
IfxMsc_DataFramePassivePhaseLength_21,
IfxMsc_DataFramePassivePhaseLength_22,
IfxMsc_DataFramePassivePhaseLength_23,
IfxMsc_DataFramePassivePhaseLength_24,
IfxMsc_DataFramePassivePhaseLength_25,
IfxMsc_DataFramePassivePhaseLength_26,
IfxMsc_DataFramePassivePhaseLength_27,
IfxMsc_DataFramePassivePhaseLength_28,
IfxMsc_DataFramePassivePhaseLength_29,
IfxMsc_DataFramePassivePhaseLength_30,
IfxMsc_DataFramePassivePhaseLength_31,
IfxMsc_DataFramePassivePhaseLength_32
}
Passive Phase Length at Data Frames
Definition in Ifx_MSC.DSC.B.PPD. More...
enum IfxMsc_DividerMode {
IfxMsc_DividerMode_normal = 1,
IfxMsc_DividerMode_fractional = 2
}
Divider mode. More...
enum IfxMsc_EmergencyStop {
IfxMsc_EmergencyStop_disabled = 0,
IfxMsc_EmergencyStop_enabled = 1
}
Emergency Stop Register - Emergency stop feature Enable or Disable - SRL and SRH
Definition in Ifx_MSC.ESR. More...
enum IfxMsc_Extension {
IfxMsc_Extension_disabled = 0,
IfxMsc_Extension_enabled = 1
}
Downstream Control Enhanced Register - Extension Enable
Definition in Ifx_MSC.DSCE.B.NDBLE. More...
enum IfxMsc_ExternalBitInjectionPosition {
IfxMsc_ExternalBitInjectionPosition_0 = 0,
IfxMsc_ExternalBitInjectionPosition_1,
IfxMsc_ExternalBitInjectionPosition_2,
IfxMsc_ExternalBitInjectionPosition_3,
IfxMsc_ExternalBitInjectionPosition_4,
IfxMsc_ExternalBitInjectionPosition_5,
IfxMsc_ExternalBitInjectionPosition_6,
IfxMsc_ExternalBitInjectionPosition_7,
IfxMsc_ExternalBitInjectionPosition_8,
IfxMsc_ExternalBitInjectionPosition_9,
IfxMsc_ExternalBitInjectionPosition_10,
IfxMsc_ExternalBitInjectionPosition_11,
IfxMsc_ExternalBitInjectionPosition_12,
IfxMsc_ExternalBitInjectionPosition_13,
IfxMsc_ExternalBitInjectionPosition_14,
IfxMsc_ExternalBitInjectionPosition_15,
IfxMsc_ExternalBitInjectionPosition_16,
IfxMsc_ExternalBitInjectionPosition_17,
IfxMsc_ExternalBitInjectionPosition_18,
IfxMsc_ExternalBitInjectionPosition_19,
IfxMsc_ExternalBitInjectionPosition_20,
IfxMsc_ExternalBitInjectionPosition_21,
IfxMsc_ExternalBitInjectionPosition_22,
IfxMsc_ExternalBitInjectionPosition_23,
IfxMsc_ExternalBitInjectionPosition_24,
IfxMsc_ExternalBitInjectionPosition_25,
IfxMsc_ExternalBitInjectionPosition_26,
IfxMsc_ExternalBitInjectionPosition_27,
IfxMsc_ExternalBitInjectionPosition_28,
IfxMsc_ExternalBitInjectionPosition_29,
IfxMsc_ExternalBitInjectionPosition_30,
IfxMsc_ExternalBitInjectionPosition_31,
IfxMsc_ExternalBitInjectionPosition_32,
IfxMsc_ExternalBitInjectionPosition_33,
IfxMsc_ExternalBitInjectionPosition_34,
IfxMsc_ExternalBitInjectionPosition_35,
IfxMsc_ExternalBitInjectionPosition_36,
IfxMsc_ExternalBitInjectionPosition_37,
IfxMsc_ExternalBitInjectionPosition_38,
IfxMsc_ExternalBitInjectionPosition_39,
IfxMsc_ExternalBitInjectionPosition_40,
IfxMsc_ExternalBitInjectionPosition_41,
IfxMsc_ExternalBitInjectionPosition_42,
IfxMsc_ExternalBitInjectionPosition_43,
IfxMsc_ExternalBitInjectionPosition_44,
IfxMsc_ExternalBitInjectionPosition_45,
IfxMsc_ExternalBitInjectionPosition_46,
IfxMsc_ExternalBitInjectionPosition_47,
IfxMsc_ExternalBitInjectionPosition_48,
IfxMsc_ExternalBitInjectionPosition_49,
IfxMsc_ExternalBitInjectionPosition_50,
IfxMsc_ExternalBitInjectionPosition_51,
IfxMsc_ExternalBitInjectionPosition_52,
IfxMsc_ExternalBitInjectionPosition_53,
IfxMsc_ExternalBitInjectionPosition_54,
IfxMsc_ExternalBitInjectionPosition_55,
IfxMsc_ExternalBitInjectionPosition_56,
IfxMsc_ExternalBitInjectionPosition_57,
IfxMsc_ExternalBitInjectionPosition_58,
IfxMsc_ExternalBitInjectionPosition_59,
IfxMsc_ExternalBitInjectionPosition_60,
IfxMsc_ExternalBitInjectionPosition_61,
IfxMsc_ExternalBitInjectionPosition_62,
IfxMsc_ExternalBitInjectionPosition_63
}
Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJPOSP0 and Ifx_MSC.DSCE.B.INJPOSP1. More...
enum IfxMsc_ExternalSignalInjection {
IfxMsc_ExternalSignalInjection_disabled = 0,
IfxMsc_ExternalSignalInjection_enabled = 1
}
Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJENP0 and Ifx_MSC.DSCE.B.INJENP1. More...
enum IfxMsc_FclClockControlEnabled {
IfxMsc_FclClockControlEnabled_activePhaseOnly = 0,
IfxMsc_FclClockControlEnabled_always = 1
}
Output Control Register - Clock Control
Definition in Ifx_MSC.OCR.B.CLKCTRL. More...
enum IfxMsc_FclLinePolarity {
IfxMsc_FclLinePolarity_nonInverted = 0,
IfxMsc_FclLinePolarity_inverted = 1
}
Output Control Register - FCLP Line Polarity
Definition in Ifx_MSC.OCR.B.CLP. More...
enum IfxMsc_HardwareClock {
IfxMsc_HardwareClock_disabled = 0,
IfxMsc_HardwareClock_enabled = 1
}
Enable hardware clock control. More...
enum IfxMsc_InterruptServiceRequest {
IfxMsc_InterruptServiceRequest_0 = 0,
IfxMsc_InterruptServiceRequest_1,
IfxMsc_InterruptServiceRequest_2,
IfxMsc_InterruptServiceRequest_3,
IfxMsc_InterruptServiceRequest_4
}
Interrupt Service Request. More...
enum IfxMsc_ModuleSuspendRequestBit {
IfxMsc_ModuleSuspendRequestBit_noSuspend = 0,
IfxMsc_ModuleSuspendRequestBit_hardSuspend = 1,
IfxMsc_ModuleSuspendRequestBit_softSuspend = 2
}
OCDS Control and Status - OCDS Suspend Control Definition in Ifx_MSC.OCS.B.SUS. More...
enum IfxMsc_MsbBitDataExtension {
IfxMsc_MsbBitDataExtension_notPresent = 0,
IfxMsc_MsbBitDataExtension_present = 1
}
Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/NDBH)
Definition in Ifx_MSC.DSCE.B.NDBLE and Ifx_MSC.DSCE.B.NDBHE. More...
enum IfxMsc_NDividerAbra {
IfxMsc_NDividerAbra_1 = 0,
IfxMsc_NDividerAbra_2,
IfxMsc_NDividerAbra_3,
IfxMsc_NDividerAbra_4,
IfxMsc_NDividerAbra_5,
IfxMsc_NDividerAbra_6,
IfxMsc_NDividerAbra_7,
IfxMsc_NDividerAbra_8
}
Asynchronous Block Configuration Register - N Divider ABRA
Definition in Ifx_MSC.ABC.B.NDA. More...
enum IfxMsc_NDividerDownstream {
IfxMsc_NDividerDownstream_1 = 0,
IfxMsc_NDividerDownstream_2,
IfxMsc_NDividerDownstream_3,
IfxMsc_NDividerDownstream_4,
IfxMsc_NDividerDownstream_5,
IfxMsc_NDividerDownstream_6,
IfxMsc_NDividerDownstream_7,
IfxMsc_NDividerDownstream_8,
IfxMsc_NDividerDownstream_9,
IfxMsc_NDividerDownstream_10,
IfxMsc_NDividerDownstream_11,
IfxMsc_NDividerDownstream_12,
IfxMsc_NDividerDownstream_13,
IfxMsc_NDividerDownstream_14,
IfxMsc_NDividerDownstream_15,
IfxMsc_NDividerDownstream_16
}
Downstream Timing Extension Register - N Divider Downstream
Definition in Ifx_MSC.DSTE.B.NDD. More...
enum IfxMsc_OverflowInterrupt {
IfxMsc_OverflowInterrupt_disabled = 0,
IfxMsc_OverflowInterrupt_enabled = 1
}
Asynchronous Block Configuration Register - Overflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.OIE. More...
enum IfxMsc_OverflowInterruptNode {
IfxMsc_OverflowInterruptNode_SR0 = 0,
IfxMsc_OverflowInterruptNode_SR1,
IfxMsc_OverflowInterruptNode_SR2,
IfxMsc_OverflowInterruptNode_SR3,
IfxMsc_OverflowInterruptNode_SR4
}
Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.OIP. More...
enum IfxMsc_Parity {
IfxMsc_Parity_even = 0,
IfxMsc_Parity_odd = 1
}
Parity Mode
Definition in Ifx_MSC.USR.B.PCT. More...
enum IfxMsc_PassiveTimeFrameCount {
IfxMsc_PassiveTimeFrameCount_0 = 0,
IfxMsc_PassiveTimeFrameCount_1 = 1,
IfxMsc_PassiveTimeFrameCount_2,
IfxMsc_PassiveTimeFrameCount_3,
IfxMsc_PassiveTimeFrameCount_4,
IfxMsc_PassiveTimeFrameCount_5,
IfxMsc_PassiveTimeFrameCount_6,
IfxMsc_PassiveTimeFrameCount_7,
IfxMsc_PassiveTimeFrameCount_8,
IfxMsc_PassiveTimeFrameCount_9,
IfxMsc_PassiveTimeFrameCount_10,
IfxMsc_PassiveTimeFrameCount_11,
IfxMsc_PassiveTimeFrameCount_12,
IfxMsc_PassiveTimeFrameCount_13,
IfxMsc_PassiveTimeFrameCount_14,
IfxMsc_PassiveTimeFrameCount_15
}
Downstream Status Register - Number Of Passive Time Frames
Definition in Ifx_MSC.DSS.B.NPTF. More...
enum IfxMsc_ReceiveDataInterrupt {
IfxMsc_ReceiveDataInterrupt_disabled = 0,
IfxMsc_ReceiveDataInterrupt_onDataReceive = 1,
IfxMsc_ReceiveDataInterrupt_onRdieSet = 2,
IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 = 3
}
Interrupt Control Register - Receive Data Interrupt Enable
Definition in Ifx_MSC.ICR.B.RDIE. More...
enum IfxMsc_ReceiveDataInterruptNode {
IfxMsc_ReceiveDataInterruptNode_SR0 = 0,
IfxMsc_ReceiveDataInterruptNode_SR1,
IfxMsc_ReceiveDataInterruptNode_SR2,
IfxMsc_ReceiveDataInterruptNode_SR3
}
Interrupt Control Register - Receive Data Interrupt Pointer
Definition in Ifx_MSC.ICR.B.RDIP. More...
enum IfxMsc_SdiLinePolarity {
IfxMsc_SdiLinePolarity_likeSi = 0,
IfxMsc_SdiLinePolarity_invertedSi = 1
}
Output Control Register - SDI Line Polarity
Definition in Ifx_MSC.OCR.B.ILP. More...
enum IfxMsc_SerialDataInput {
IfxMsc_SerialDataInput_0 = 0,
IfxMsc_SerialDataInput_1,
IfxMsc_SerialDataInput_2,
IfxMsc_SerialDataInput_3,
IfxMsc_SerialDataInput_4,
IfxMsc_SerialDataInput_5,
IfxMsc_SerialDataInput_6,
IfxMsc_SerialDataInput_7
}
Output Control Register - Serial Data Input Selection
Definition in Ifx_MSC.OCR.B.SDISEL. More...
enum IfxMsc_ServiceRequestDelay {
IfxMsc_ServiceRequestDelay_noDelay = 0,
IfxMsc_ServiceRequestDelay_1bit = 1
}
Service Request Delay
Definition in Ifx_MSC.USR.B.SRDC. More...
enum IfxMsc_ShiftClockPhaseDuration {
IfxMsc_ShiftClockPhaseDuration_1 = 0,
IfxMsc_ShiftClockPhaseDuration_2,
IfxMsc_ShiftClockPhaseDuration_3,
IfxMsc_ShiftClockPhaseDuration_4,
IfxMsc_ShiftClockPhaseDuration_5,
IfxMsc_ShiftClockPhaseDuration_6,
IfxMsc_ShiftClockPhaseDuration_7,
IfxMsc_ShiftClockPhaseDuration_8,
IfxMsc_ShiftClockPhaseDuration_9,
IfxMsc_ShiftClockPhaseDuration_10,
IfxMsc_ShiftClockPhaseDuration_11,
IfxMsc_ShiftClockPhaseDuration_12,
IfxMsc_ShiftClockPhaseDuration_13,
IfxMsc_ShiftClockPhaseDuration_14,
IfxMsc_ShiftClockPhaseDuration_15,
IfxMsc_ShiftClockPhaseDuration_16
}
Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock
Definition in Ifx_MSC.ABC.B.LOW and Ifx_MSC.ABC.B.HIGH. More...
enum IfxMsc_SleepMode {
IfxMsc_SleepMode_enable = 0,
IfxMsc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_MSC.CLC.B.EDIS. More...
enum IfxMsc_SoLinePolarity {
IfxMsc_SoLinePolarity_nonInverted = 0,
IfxMsc_SoLinePolarity_inverted = 1
}
Output Control Register - SOP Line Polarity
Definition in Ifx_MSC.OCR.B.SLP. More...
enum IfxMsc_Source {
IfxMsc_Source_downstreamDataRegister = 0,
IfxMsc_Source_alternateInputLine = 2,
IfxMsc_Source_alternateInputLineInverted = 3
}
Downstream Select Data Source Low Register - Select Source for - SRL and SRHNumber Of Passive Time Frames
Definition in Ifx_MSC.DSDSL and Ifx_MSC.DSDSH. More...
enum IfxMsc_SuspendMode {
IfxMsc_SuspendMode_none = 0,
IfxMsc_SuspendMode_hard = 1,
IfxMsc_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxMsc_Target {
IfxMsc_Target_en0 = 0,
IfxMsc_Target_en1,
IfxMsc_Target_en2,
IfxMsc_Target_en3
}
Msc Targets - use as chip enable selection for ENH, ENL and ENC. More...
enum IfxMsc_TimeFrameInterrupt {
IfxMsc_TimeFrameInterrupt_disabled = 0,
IfxMsc_TimeFrameInterrupt_enabled = 1
}
Interrupt Control Register - Time Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.TFIE. More...
enum IfxMsc_TimeFrameInterruptNode {
IfxMsc_TimeFrameInterruptNode_SR0 = 0,
IfxMsc_TimeFrameInterruptNode_SR1,
IfxMsc_TimeFrameInterruptNode_SR2,
IfxMsc_TimeFrameInterruptNode_SR3
}
Interrupt Control Register - Time Frame Interrupt Pointer
Definition in Ifx_MSC.ICR.B.TFIP. More...
enum IfxMsc_TransmissionMode {
IfxMsc_TransmissionMode_triggered = 0,
IfxMsc_TransmissionMode_dataRepetition = 1
}
Downstream Channel Transmission Mode
Definition in Ifx_MSC.DSC.B.TM. More...
enum IfxMsc_UnderflowInterrupt {
IfxMsc_UnderflowInterrupt_disabled = 0,
IfxMsc_UnderflowInterrupt_enabled = 1
}
Asynchronous Block Configuration Register - Underflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.UIE. More...
enum IfxMsc_UnderflowInterruptNode {
IfxMsc_UnderflowInterruptNode_SR0 = 0,
IfxMsc_UnderflowInterruptNode_SR1,
IfxMsc_UnderflowInterruptNode_SR2,
IfxMsc_UnderflowInterruptNode_SR3,
IfxMsc_UnderflowInterruptNode_SR4
}
Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.UIP. More...
enum IfxMsc_UpstreamChannelFrameType {
IfxMsc_UpstreamChannelFrameType_12bit = 0,
IfxMsc_UpstreamChannelFrameType_16bit = 1
}
Channel Frame Type
Definition in Ifx_MSC.USR.B.UFT. More...
enum IfxMsc_UpstreamChannelReceivingRate {
IfxMsc_UpstreamChannelReceivingRate_disabled = 0,
IfxMsc_UpstreamChannelReceivingRate_4 = 1,
IfxMsc_UpstreamChannelReceivingRate_8 = 2,
IfxMsc_UpstreamChannelReceivingRate_16 = 3,
IfxMsc_UpstreamChannelReceivingRate_32 = 4,
IfxMsc_UpstreamChannelReceivingRate_64 = 5,
IfxMsc_UpstreamChannelReceivingRate_128 = 6,
IfxMsc_UpstreamChannelReceivingRate_256 = 7
}
Upstream Receiving Rate
Definition in Ifx_MSC.USR.B.URR. More...
enum IfxMsc_UpstreamTimeoutInterrupt {
IfxMsc_UpstreamTimeoutInterrupt_disabled = 0,
IfxMsc_UpstreamTimeoutInterrupt_enabled = 1
}
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable
Definition in Ifx_MSC.USCE.B.USTOEN. More...
enum IfxMsc_UpstreamTimeoutInterruptNode {
IfxMsc_UpstreamTimeoutInterruptNode_SR0 = 0,
IfxMsc_UpstreamTimeoutInterruptNode_SR1,
IfxMsc_UpstreamTimeoutInterruptNode_SR2,
IfxMsc_UpstreamTimeoutInterruptNode_SR3,
IfxMsc_UpstreamTimeoutInterruptNode_SR4
}
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer
Definition in Ifx_MSC.USCE.B.USTOIP. More...
enum IfxMsc_UpstreamTimeoutPrescaler {
IfxMsc_UpstreamTimeoutPrescaler_1 = 0,
IfxMsc_UpstreamTimeoutPrescaler_2 = 1,
IfxMsc_UpstreamTimeoutPrescaler_4 = 2,
IfxMsc_UpstreamTimeoutPrescaler_8 = 3,
IfxMsc_UpstreamTimeoutPrescaler_16 = 4,
IfxMsc_UpstreamTimeoutPrescaler_32 = 5,
IfxMsc_UpstreamTimeoutPrescaler_64 = 6,
IfxMsc_UpstreamTimeoutPrescaler_128 = 7,
IfxMsc_UpstreamTimeoutPrescaler_256 = 8,
IfxMsc_UpstreamTimeoutPrescaler_512 = 9,
IfxMsc_UpstreamTimeoutPrescaler_1024 = 10,
IfxMsc_UpstreamTimeoutPrescaler_2048 = 11,
IfxMsc_UpstreamTimeoutPrescaler_4096 = 12,
IfxMsc_UpstreamTimeoutPrescaler_8192 = 13,
IfxMsc_UpstreamTimeoutPrescaler_16384 = 14,
IfxMsc_UpstreamTimeoutPrescaler_32768 = 15
}
Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler
Definition in Ifx_MSC.USCE.B.USTOPRE. More...
enum IfxMsc_UpstreamTimeoutValue {
IfxMsc_UpstreamTimeoutValue_1 = 0,
IfxMsc_UpstreamTimeoutValue_2,
IfxMsc_UpstreamTimeoutValue_3,
IfxMsc_UpstreamTimeoutValue_4,
IfxMsc_UpstreamTimeoutValue_5,
IfxMsc_UpstreamTimeoutValue_6,
IfxMsc_UpstreamTimeoutValue_7,
IfxMsc_UpstreamTimeoutValue_8,
IfxMsc_UpstreamTimeoutValue_9,
IfxMsc_UpstreamTimeoutValue_10,
IfxMsc_UpstreamTimeoutValue_11,
IfxMsc_UpstreamTimeoutValue_12,
IfxMsc_UpstreamTimeoutValue_13,
IfxMsc_UpstreamTimeoutValue_14,
IfxMsc_UpstreamTimeoutValue_15,
IfxMsc_UpstreamTimeoutValue_16
}
Upstream Control Enhanced Register 1 - Upstream Timeout Value
Definition in Ifx_MSC.USCE.B.USTOVAL. More...

Functions

IFX_INLINE void | IfxMsc_clearAbraOverflowFlag (Ifx_MSC *msc)
Clear ABRA overflow flag. More...
IFX_INLINE void | IfxMsc_clearAbraUnderflowFlag (Ifx_MSC *msc)
Clear ABRA underflow flag. More...
IFX_INLINE void | IfxMsc_clearUpstreamTimeout (Ifx_MSC *msc)
Clear Upstream timeout. More...
IFX_INLINE void | IfxMsc_clearUpstreamValidFlag (Ifx_MSC *msc, uint8 upstreamIdx)
Clear the valid flag. More...
IFX_INLINE boolean | IfxMsc_getUpstreamValidFlag (Ifx_MSC *msc, uint8 upstreamIdx)
Get the status of the valid flag. More...
IFX_INLINE void | IfxMsc_setCommandTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for command phase. More...
IFX_INLINE void | IfxMsc_setDataHighTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data high phase. More...
IFX_INLINE void | IfxMsc_setDataLowTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data low phase. More...
IFX_INLINE uint16 | IfxMsc_getData (Ifx_MSC *msc, uint8 upstreamIdx)
Get the upstream data from upstream data register. More...
IFX_INLINE IfxMsc_Target | IfxMsc_getDataHighTarget (Ifx_MSC *msc)
Get the selected target during high phase. More...
IFX_INLINE IfxMsc_Target | IfxMsc_getDataLowTarget (Ifx_MSC *msc)
Get the selected target during low phase. More...
IFX_EXTERN void | IfxMsc_disableModule (Ifx_MSC *msc)
Disable MSC kernel. More...
IFX_EXTERN void | IfxMsc_enableModule (Ifx_MSC *msc)
Enable MSC kernel. More...
IFX_EXTERN void | IfxMsc_clearReset (Ifx_MSC *msc)
Clear reset bit of MSC kernel. More...
IFX_EXTERN void | IfxMsc_resetModule (Ifx_MSC *msc)
Reset MSC kernel. More...
IFX_EXTERN uint32 | IfxMsc_downstreamAbraBaudCalculator (uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled. More...
IFX_EXTERN uint64 | IfxMsc_upstreamFractionalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional. More...
IFX_EXTERN uint32 | IfxMsc_upstreamNormalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal. More...
IFX_INLINE void | IfxMsc_initEnPin (const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a EN output. More...
IFX_INLINE void | IfxMsc_initFclnPin (const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLN output. More...
IFX_INLINE void | IfxMsc_initFclpPin (const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLP output. More...
IFX_INLINE void | IfxMsc_initInjPin (const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a INJ input. More...
IFX_INLINE void | IfxMsc_initSdiPin (const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SDI input. More...
IFX_INLINE void | IfxMsc_initSonPin (const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SON output. More...
IFX_INLINE void | IfxMsc_initSopPin (const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SOP output. More...
IFX_EXTERN Ifx_MSC * | IfxMsc_getAddress (IfxMsc_Index msc)
IFX_EXTERN IfxMsc_Index | IfxMsc_getIndex (Ifx_MSC *msc)
API to get the resource index of the MSC specified. More...
IFX_INLINE void | IfxMsc_clearRecieveDataInterruptFlag (Ifx_MSC *msc)
Clears The Recieve Data Interrupt Flag. More...
IFX_INLINE void | IfxMsc_clearValidbit (Ifx_MSC *msc, uint8 upstreamIdx)
Clears the Valid bit. More...
IFX_INLINE void | IfxMsc_disableUpstreamTimeoutInterrupt (Ifx_MSC *msc)
Disables the Upstream Timeout Interrupt. More...
IFX_INLINE void | IfxMsc_enableUpstreamTimeoutInterrupt (Ifx_MSC *msc)
Enables the Upstream Timeout Interrupt. More...
IFX_INLINE boolean | IfxMsc_getAsyncClockBypass (Ifx_MSC *msc)
Returns the value of Asynchronous clock Bypass bit. More...
IFX_INLINE boolean | IfxMsc_getDownStreamExtension (Ifx_MSC *msc)
Returns the value of Down stream extension enable bit. More...
IFX_INLINE boolean | IfxMsc_getRecieveDataInterruptFlag (Ifx_MSC *msc)
Returns the Recieve DataInterrupt Flag Status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxMsc_getSrcPointer (Ifx_MSC *msc, IfxMsc_InterruptServiceRequest intRequest)
Returns the Src pointer for the selected MSC interrupt node. More...
IFX_INLINE uint32 | IfxMsc_getUpstreamData (Ifx_MSC *msc, uint8 upstreamIdx)
Returns the Upstream Data. More...
IFX_INLINE boolean | IfxMsc_getUpstreamParityErrorFlag (Ifx_MSC *msc, uint8 upstreamIdx)
Returns the Upstream Parity Error Flag Status. More...
IFX_INLINE boolean | IfxMsc_getUpstreamTimeoutFlag (Ifx_MSC *msc)
Returns Upstream Timeout Flag Status. More...
IFX_INLINE boolean | IfxMsc_isModuleSuspended (Ifx_MSC *msc)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxMsc_setAsyncClockBypass (Ifx_MSC *msc, boolean value)
Set or reset the Asynchronous clock bypass bit. More...
IFX_INLINE void | IfxMsc_setDownStreamData (Ifx_MSC *msc, uint32 data)
Sets the Down stream data. More...
IFX_INLINE void | IfxMsc_setDownStreamExtension (Ifx_MSC *msc, boolean value)
Set or reset the Down stream extension enable bit. More...
IFX_INLINE void | IfxMsc_setDownStreamExtensionData (Ifx_MSC *msc, uint32 data)
Sets the Down stream Extension data. More...
IFX_INLINE void | IfxMsc_setFractionalDividerStep (Ifx_MSC *msc, uint16 value)
Sets The Fractional Divider Step. More...
IFX_INLINE void | IfxMsc_setNdividerDownstream (Ifx_MSC *msc, IfxMsc_NDividerDownstream divisionRatio)
Set the required N divider downstream value. More...
IFX_INLINE void | IfxMsc_setSerialDataInputSelect (Ifx_MSC *msc, IfxMsc_SerialDataInput select)
Sets The Serial Data Input Select. More...
IFX_INLINE void | IfxMsc_setSleepMode (Ifx_MSC *msc, IfxMsc_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxMsc_setSuspendMode (Ifx_MSC *msc, IfxMsc_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxMsc_setTransmissionMode (Ifx_MSC *msc, IfxMsc_TransmissionMode mode)
Sets the Transmission Mode. More...
IFX_INLINE void | IfxMsc_setUpstreamChannelRecieveRate (Ifx_MSC *msc, IfxMsc_UpstreamChannelReceivingRate recieveRate)
Sets The Upstream Channel Recieve Rate. More...
IFX_INLINE void | IfxMsc_setUpstreamTimeout (Ifx_MSC *msc, IfxMsc_UpstreamTimeoutValue timeoutVal)
Sets The Upstream Timeout. More...
IFX_INLINE void | IfxMsc_setUpstreamTimeoutPrescalar (Ifx_MSC *msc, IfxMsc_UpstreamTimeoutPrescaler prescalar)
Sets The Upstream Timeout Prescalar. More...
IFX_EXTERN void | IfxMsc_clearDataFrameInterruptFlag (Ifx_MSC *msc)
clear data frame interrupt flag More...
IFX_EXTERN uint64 | IfxMsc_downstreamFractionalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional for downstream. More...
IFX_EXTERN uint32 | IfxMsc_downstreamNormalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal for downstream. More...
IFX_EXTERN boolean | IfxMsc_getActiveDataFrameStatus (Ifx_MSC *msc)
get the status of the active data frame More...
IFX_EXTERN boolean | IfxMsc_getDataFrameInterruptFlag (Ifx_MSC *msc)
get the status of the data frame interrupt flag More...

Detailed Description

MSC basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMsc.h.

Function Documentation

◆ IfxMsc_clearDataFrameInterruptFlag()

IFX_EXTERN void IfxMsc_clearDataFrameInterruptFlag ( Ifx_MSC * msc )

clear data frame interrupt flag

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 54 of file IfxMsc.c.

Referenced by IfxMsc_Msc_clearDataFrameInterrupt().

◆ IfxMsc_clearRecieveDataInterruptFlag()

IFX_INLINE void IfxMsc_clearRecieveDataInterruptFlag ( Ifx_MSC * msc )

Clears The Recieve Data Interrupt Flag.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1434 of file IfxMsc.h.

◆ IfxMsc_clearValidbit()

IFX_INLINE void IfxMsc_clearValidbit | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Clears the Valid bit.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | upstream index
Returns
None

Definition at line 1453 of file IfxMsc.h.

◆ IfxMsc_disableUpstreamTimeoutInterrupt()

IFX_INLINE void IfxMsc_disableUpstreamTimeoutInterrupt ( Ifx_MSC * msc )

Disables the Upstream Timeout Interrupt.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1459 of file IfxMsc.h.

◆ IfxMsc_downstreamFractionalBaudCalculator()

IFX_EXTERN uint64 IfxMsc_downstreamFractionalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is fractional for downstream.

Parameters
msc | pointer to the base of MSC registers
baud | Required baud rate
Returns
Step Value

Definition at line 99 of file IfxMsc.c.

◆ IfxMsc_downstreamNormalBaudCalculator()

IFX_EXTERN uint32 IfxMsc_downstreamNormalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is normal for downstream.

Parameters
msc | Select DataType Ref
baud | Required baud rate
Returns
Step value

Definition at line 112 of file IfxMsc.c.

◆ IfxMsc_enableUpstreamTimeoutInterrupt()

IFX_INLINE void IfxMsc_enableUpstreamTimeoutInterrupt ( Ifx_MSC * msc )

Enables the Upstream Timeout Interrupt.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1465 of file IfxMsc.h.

◆ IfxMsc_getActiveDataFrameStatus()

IFX_EXTERN boolean IfxMsc_getActiveDataFrameStatus ( Ifx_MSC * msc )

get the status of the active data frame

Parameters
msc pointer to the base of MSC registers
Returns
Status TRUE or FALSE

Definition at line 134 of file IfxMsc.c.

Referenced by IfxMsc_Msc_getActiveDataFrameStatus().

◆ IfxMsc_getAsyncClockBypass()

IFX_INLINE boolean IfxMsc_getAsyncClockBypass ( Ifx_MSC * msc )

Returns the value of Asynchronous clock Bypass bit.

Parameters
msc pointer to the base of MSC registers
Returns
Get the value of Asynchronous clock bypass enable bit.

Definition at line 1471 of file IfxMsc.h.

◆ IfxMsc_getDataFrameInterruptFlag()

IFX_EXTERN boolean IfxMsc_getDataFrameInterruptFlag ( Ifx_MSC * msc )

get the status of the data frame interrupt flag

Parameters
msc pointer to the base of MSC registers
Returns
Status TRUE or FALSE

Definition at line 157 of file IfxMsc.c.

Referenced by IfxMsc_Msc_getDataFrameInterruptStatus().

◆ IfxMsc_getDownStreamExtension()

IFX_INLINE boolean IfxMsc_getDownStreamExtension ( Ifx_MSC * msc )

Returns the value of Down stream extension enable bit.

Parameters
msc pointer to the base of MSC registers
Returns
Get the value of Down stream extension enable bit.

Definition at line 1501 of file IfxMsc.h.

◆ IfxMsc_getRecieveDataInterruptFlag()

IFX_INLINE boolean IfxMsc_getRecieveDataInterruptFlag ( Ifx_MSC * msc )

Returns the Recieve DataInterrupt Flag Status.

Parameters
msc pointer to the base of MSC registers
Returns
Status

Definition at line 1507 of file IfxMsc.h.

◆ IfxMsc_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxMsc_getSrcPointer | ( | Ifx_MSC * | msc,
 |  | IfxMsc_InterruptServiceRequest | intRequest
 | ) |  |

Returns the Src pointer for the selected MSC interrupt node.

Parameters
msc | pointer to the base of MSC registers
intRequest | Interrupt Request
Returns
Pointer to SRCR register

Definition at line 1513 of file IfxMsc.h.

◆ IfxMsc_getUpstreamData()

IFX_INLINE uint32 IfxMsc_getUpstreamData | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Returns the Upstream Data.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | upstream index
Returns
Upstream Data

Definition at line 1544 of file IfxMsc.h.

◆ IfxMsc_getUpstreamParityErrorFlag()

IFX_INLINE boolean IfxMsc_getUpstreamParityErrorFlag | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Returns the Upstream Parity Error Flag Status.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | upstream index
Returns
Status

Definition at line 1550 of file IfxMsc.h.

◆ IfxMsc_getUpstreamTimeoutFlag()

IFX_INLINE boolean IfxMsc_getUpstreamTimeoutFlag ( Ifx_MSC * msc )

Returns Upstream Timeout Flag Status.

Parameters
msc pointer to the base of MSC registers
Returns
Status

Definition at line 1556 of file IfxMsc.h.

◆ IfxMsc_isModuleSuspended()

IFX_INLINE boolean IfxMsc_isModuleSuspended ( Ifx_MSC * msc )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
msc Pointer to MSC module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 1643 of file IfxMsc.h.

◆ IfxMsc_setAsyncClockBypass()

IFX_INLINE void IfxMsc_setAsyncClockBypass | ( | Ifx_MSC * | msc,
 |  | boolean | value
 | ) |  |

Set or reset the Asynchronous clock bypass bit.

Parameters
msc | pointer to the base of MSC registers
value | Set / reset value.
Returns
None

Definition at line 1655 of file IfxMsc.h.

◆ IfxMsc_setDownStreamData()

IFX_INLINE void IfxMsc_setDownStreamData | ( | Ifx_MSC * | msc,
 |  | uint32 | data
 | ) |  |

Sets the Down stream data.

Parameters
msc | pointer to the base of MSC registers
data | Data
Returns
None

Definition at line 1682 of file IfxMsc.h.

◆ IfxMsc_setDownStreamExtension()

IFX_INLINE void IfxMsc_setDownStreamExtension | ( | Ifx_MSC * | msc,
 |  | boolean | value
 | ) |  |

Set or reset the Down stream extension enable bit.

Parameters
msc | pointer to the base of MSC registers
value | Set / reset value.
Returns
None

Definition at line 1688 of file IfxMsc.h.

◆ IfxMsc_setDownStreamExtensionData()

IFX_INLINE void IfxMsc_setDownStreamExtensionData | ( | Ifx_MSC * | msc,
 |  | uint32 | data
 | ) |  |

Sets the Down stream Extension data.

Parameters
msc | pointer to the base of MSC registers
data | Data
Returns
None

Definition at line 1694 of file IfxMsc.h.

◆ IfxMsc_setFractionalDividerStep()

IFX_INLINE void IfxMsc_setFractionalDividerStep | ( | Ifx_MSC * | msc,
 |  | uint16 | value
 | ) |  |

Sets The Fractional Divider Step.

Parameters
msc | pointer to the base of MSC registers
value | Value
Returns
None

Definition at line 1700 of file IfxMsc.h.

◆ IfxMsc_setNdividerDownstream()

IFX_INLINE void IfxMsc_setNdividerDownstream | ( | Ifx_MSC * | msc,
 |  | IfxMsc_NDividerDownstream | divisionRatio
 | ) |  |

Set the required N divider downstream value.

Parameters
msc | pointer to the base of MSC registers
divisionRatio | select the required division ratio.
Returns
None

Definition at line 1721 of file IfxMsc.h.

◆ IfxMsc_setSerialDataInputSelect()

IFX_INLINE void IfxMsc_setSerialDataInputSelect | ( | Ifx_MSC * | msc,
 |  | IfxMsc_SerialDataInput | select
 | ) |  |

Sets The Serial Data Input Select.

Parameters
msc | pointer to the base of MSC registers
select | Serial Data Input Select
Returns
None

Definition at line 1727 of file IfxMsc.h.

◆ IfxMsc_setSleepMode()

IFX_INLINE void IfxMsc_setSleepMode | ( | Ifx_MSC * | msc,
 |  | IfxMsc_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
msc | pointer to MSC registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 1733 of file IfxMsc.h.

◆ IfxMsc_setSuspendMode()

IFX_INLINE void IfxMsc_setSuspendMode | ( | Ifx_MSC * | msc,
 |  | IfxMsc_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
msc | Pointer to MSC module registers
mode | Module suspend mode
Returns
None

Definition at line 1742 of file IfxMsc.h.

◆ IfxMsc_setTransmissionMode()

IFX_INLINE void IfxMsc_setTransmissionMode | ( | Ifx_MSC * | msc,
 |  | IfxMsc_TransmissionMode | mode
 | ) |  |

Sets the Transmission Mode.

Parameters
msc | pointer to the base of MSC registers
mode | mode
Returns
None

Definition at line 1753 of file IfxMsc.h.

◆ IfxMsc_setUpstreamChannelRecieveRate()

IFX_INLINE void IfxMsc_setUpstreamChannelRecieveRate | ( | Ifx_MSC * | msc,
 |  | IfxMsc_UpstreamChannelReceivingRate | recieveRate
 | ) |  |

Sets The Upstream Channel Recieve Rate.

Parameters
msc | pointer to the base of MSC registers
recieveRate | Recieve Rate
Returns
None

Definition at line 1759 of file IfxMsc.h.

◆ IfxMsc_setUpstreamTimeout()

IFX_INLINE void IfxMsc_setUpstreamTimeout | ( | Ifx_MSC * | msc,
 |  | IfxMsc_UpstreamTimeoutValue | timeoutVal
 | ) |  |

Sets The Upstream Timeout.

Parameters
msc | pointer to the base of MSC registers
timeoutVal | Timeout Value
Returns
None

Definition at line 1765 of file IfxMsc.h.

◆ IfxMsc_setUpstreamTimeoutPrescalar()

IFX_INLINE void IfxMsc_setUpstreamTimeoutPrescalar | ( | Ifx_MSC * | msc,
 |  | IfxMsc_UpstreamTimeoutPrescaler | prescalar
 | ) |  |

Sets The Upstream Timeout Prescalar.

Parameters
msc | pointer to the base of MSC registers
prescalar | prescalar
Returns
None

Definition at line 1771 of file IfxMsc.h.


iLLD_TC26B: MTU

Modules | Files
MTU
iLLD
Collaboration diagram for MTU:

Modules

Implementation
Standard Driver
How to use the Mtu driver?

Files

file | IfxMtu_cfg.h
Mtu on-chip implementation data.
file | IfxMtu.h
MTU basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » MTU
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » MTU
Collaboration diagram for Standard Driver:

Modules

Utility Functions
MBIST Operations
MBIST Error Tracking

Detailed Description


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » MTU » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_STATIC void | IfxMtu_waitForMbistDone (uint32 towerDepth, uint8 numInstructions, IfxMtu_MbistSel mbistSel)
API to wait for requested tower depth. More...
IFX_INLINE void | IfxMtu_disableMbistShell (IfxMtu_MbistSel mbistSel)
Disables the MBIST Shell of the given SRAM. More...
IFX_INLINE void | IfxMtu_enableMbistShell (IfxMtu_MbistSel mbistSel)
Enables the MBIST Shell of the given SRAM. More...
IFX_INLINE void | IfxMtu_enableModule (void)
Enables the MTU module. More...
IFX_INLINE boolean | IfxMtu_isAutoInitRunning (IfxMtu_MbistSel mbistSel)
Returns TRUE if Auto-Initialisation is running for the given SRAM. More...
IFX_INLINE boolean | IfxMtu_isModuleEnabled (void)
Returns the status of whether the module is enabled or not. More...

Detailed Description

Function Documentation

◆ IfxMtu_disableMbistShell()

IFX_INLINE void IfxMtu_disableMbistShell ( IfxMtu_MbistSel mbistSel )

Disables the MBIST Shell of the given SRAM.

Parameters
mbistSel Memory Selection
Returns
None

Usage Example

IfxMtu_disableMbistShell(IfxMtu_MbistSel_cpu0Dtag);
// Note: Wait for Auto-initilisation to be completed for auto-init memories like cpu-Dtag, cpu-Ptag, Cpu-Dcache, Cpu-Pcache
while (IfxMtu_isAutoInitRunning(IfxMtu_MbistSel_cpu0Dtag))
{}

Definition at line 488 of file IfxMtu.h.

Referenced by IfxMtu_clearSramContinue(), and IfxMtu_runNonDestructiveInversionTest().

◆ IfxMtu_enableMbistShell()

IFX_INLINE void IfxMtu_enableMbistShell ( IfxMtu_MbistSel mbistSel )

Enables the MBIST Shell of the given SRAM.

Parameters
mbistSel Memory Selection
Returns
None

Usage Example

// Enable MTU clock
{
uint16 password = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(password);
IfxMtu_enableModule();
IfxScuWdt_setCpuEndinit(password);
}
{
IfxMtu_enableMbistShell(IfxMtu_MbistSel_cpu0Dtag);
// Note: Wait for Auto-initilisation to be completed for auto-init memories like cpu-Dtag, cpu-Ptag, Cpu-Dcache, Cpu-Pcache,
while (IfxMtu_isAutoInitRunning(IfxMtu_MbistSel_cpu0Dtag))
{}
}

Definition at line 496 of file IfxMtu.h.

Referenced by IfxMtu_clearSramStart(), and IfxMtu_runNonDestructiveInversionTest().

◆ IfxMtu_enableModule()

IFX_INLINE void IfxMtu_enableModule ( void )

Enables the MTU module.

Returns
None

Definition at line 504 of file IfxMtu.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxMtu_isAutoInitRunning()

IFX_INLINE boolean IfxMtu_isAutoInitRunning ( IfxMtu_MbistSel mbistSel )

Returns TRUE if Auto-Initialisation is running for the given SRAM.

Should be polled after MBIST enableMbistShell to ensure that an auto-init operation is finished before starting a new operation.

Parameters
mbistSel Memory Selection
Returns
TRUE if auto-initialisation running.

Definition at line 525 of file IfxMtu.h.

Referenced by IfxMtu_clearSramContinue(), IfxMtu_clearSramStart(), and IfxMtu_runNonDestructiveInversionTest().

◆ IfxMtu_isModuleEnabled()

IFX_INLINE boolean IfxMtu_isModuleEnabled ( void )

Returns the status of whether the module is enabled or not.

Returns

Definition at line 557 of file IfxMtu.h.

◆ IfxMtu_waitForMbistDone()

IFX_STATIC void IfxMtu_waitForMbistDone | ( | uint32 | towerDepth,
 |  | uint8 | numInstructions,
 |  | IfxMtu_MbistSel | mbistSel
 | ) |  |

API to wait for requested tower depth.

Parameters
towerDepth | tower depth of MBIST Ram
numInstructions | number of instructions
mbistSel | Memory Selection
Returns
None

Definition at line 422 of file IfxMtu.c.

Referenced by IfxMtu_clearSram(), IfxMtu_readSramAddress(), IfxMtu_runNonDestructiveInversionTest(), and IfxMtu_writeSramAddress().


iLLD_TC26B: MBIST Operations

Functions
MBIST Operations
iLLD » MTU » Standard Driver
Collaboration diagram for MBIST Operations:

Functions

IFX_INLINE boolean | IfxMtu_isMbistDone (IfxMtu_MbistSel mbistSel)
This Function returns the status of MBIST clear Sram operation. Caution: It is recommended not to call this function continously in a loop. Use IfxMtu_ClearSram() function for Synchronous polling mode. More...
IFX_EXTERN void | IfxMtu_clearSram (IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. More...
IFX_EXTERN void | IfxMtu_clearSramContinue (IfxMtu_MbistSel mbistSel)
This Function should be called after MBIST Clear SRAM operation is completed. Note: The function should be called with safety endinit bit cleared. More...
IFX_EXTERN void | IfxMtu_clearSramStart (IfxMtu_MbistSel mbistSel)
This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn't wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared. More...
IFX_EXTERN void | IfxMtu_readSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)
IFX_EXTERN uint8 | IfxMtu_runNonDestructiveInversionTest (IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can be considered as a simple linear test that is able to find all Stuck-At faults (the cell remains stuck at a value for any operation) without destroying any user data. The test accesses every Word in the address range defined by the RANGE register, four times. Test Steps: More...
IFX_EXTERN void | IfxMtu_writeSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)

Detailed Description

Function Documentation

◆ IfxMtu_clearSram()

IFX_EXTERN void IfxMtu_clearSram ( IfxMtu_MbistSel mbistSel )

Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end.

Parameters
mbistSel Memory Selection
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 77 of file IfxMtu.c.

Referenced by IfxEray_Eray_initModule().

◆ IfxMtu_clearSramContinue()

IFX_EXTERN void IfxMtu_clearSramContinue ( IfxMtu_MbistSel mbistSel )

This Function should be called after MBIST Clear SRAM operation is completed. Note: The function should be called with safety endinit bit cleared.

Parameters
mbistSel Memory Selection
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 119 of file IfxMtu.c.

Referenced by IfxMtu_clearSram().

◆ IfxMtu_clearSramStart()

IFX_EXTERN void IfxMtu_clearSramStart ( IfxMtu_MbistSel mbistSel )

This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn't wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared.

Parameters
mbistSel Memory Selection
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 132 of file IfxMtu.c.

Referenced by IfxMtu_clearSram().

◆ IfxMtu_isMbistDone()

IFX_INLINE boolean IfxMtu_isMbistDone ( IfxMtu_MbistSel mbistSel )

This Function returns the status of MBIST clear Sram operation. Caution: It is recommended not to call this function continously in a loop. Use IfxMtu_ClearSram() function for Synchronous polling mode.

Parameters
mbistSel Memory Selection
Returns
status of Mbist Clear Sram operation (TRUE - Operation completed, FALSE - Operation still in progress)

A coding example can be found in How to use the Mtu driver?

Definition at line 547 of file IfxMtu.h.

Referenced by IfxMtu_clearSram(), IfxMtu_readSramAddress(), IfxMtu_runNonDestructiveInversionTest(), and IfxMtu_writeSramAddress().

◆ IfxMtu_readSramAddress()

IFX_EXTERN void IfxMtu_readSramAddress | ( | IfxMtu_MbistSel | mbistSel,
 |  | uint16 | sramAddress
 | ) |  |
Parameters
mbistSel | Memory Selection
sramAddress | SRAM address which should be read
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 274 of file IfxMtu.c.

Referenced by IfxMtu_clearSramContinue().

◆ IfxMtu_runNonDestructiveInversionTest()

IFX_EXTERN uint8 IfxMtu_runNonDestructiveInversionTest | ( | IfxMtu_MbistSel | mbistSel,
 |  | uint8 | rangeSel,
 |  | uint8 | rangeAddrUp,
 |  | uint8 | rangeAddrLow,
 |  | uint16 * | errorAddr
 | ) |  |

This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can be considered as a simple linear test that is able to find all Stuck-At faults (the cell remains stuck at a value for any operation) without destroying any user data. The test accesses every Word in the address range defined by the RANGE register, four times. Test Steps:

  1. Read data Word including check bits
  2. write back all bits inverted
  3. Read data Word including check bits
  4. Write back all bits inverted At the end of this procedure the user data remains unchanged and and every bit has been set to 0 and 1. Any single Stuck-At error will be visible as a correctable error. Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. The Error flags need to be cleared to enable further tracking after the test
    Parameters
    mbistSel | Memory Selection
    rangeSel | enable/disable range Selection (0 - disable, 1- enable)
    rangeAddrUp | when range mode is enabled, it specifies the upper logical block address limit in 64 word increments.
    rangeAddrLow | when range mode is enabled, it specifies the lower logical block address limit.
    errorAddr | If the test fails, it contains the error address (bit0 - bit12) and memory block index (Bit13 - Bit15)
    Returns
    Test Status (0-PASS, 1- FAIL)

Definition at line 301 of file IfxMtu.c.

◆ IfxMtu_writeSramAddress()

IFX_EXTERN void IfxMtu_writeSramAddress | ( | IfxMtu_MbistSel | mbistSel,
 |  | uint16 | sramAddress
 | ) |  |
Parameters
mbistSel | Memory Selection
sramAddress | SRAM address which should be written
Returns
None

Definition at line 377 of file IfxMtu.c.


iLLD_TC26B: MBIST Error Tracking

Functions
MBIST Error Tracking
iLLD » MTU » Standard Driver
Collaboration diagram for MBIST Error Tracking:

Functions

IFX_INLINE boolean | IfxMtu_isErrorTrackingEnabled (IfxMtu_MbistSel mbistSel)
Returns the status of the error tracking. More...
IFX_INLINE boolean | IfxMtu_isErrorTrackingOverflow (IfxMtu_MbistSel mbistSel)
Returns the error tracking overflow status. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005). More...
IFX_INLINE boolean | IfxMtu_checkErrorFlags (IfxMtu_MbistSel mbistSel)
Returns True if any Error Flags are set. More...
IFX_EXTERN void | IfxMtu_clearErrorTracking (IfxMtu_MbistSel mbistSel)
Clears the error tracking registers (ETRR), valid and overflow bits. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005). More...
IFX_EXTERN void | IfxMtu_enableErrorTracking (IfxMtu_MbistSel mbistSel, boolean enable)
Enables the tracking of SRAM errors. More...
IFX_EXTERN uint32 | IfxMtu_getSystemAddress (IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR trackedSramAddress)
Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (SRAM address and block) More...
IFX_EXTERN uint8 | IfxMtu_getTrackedSramAddresses (IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR *trackedSramAddresses)
Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registers. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005). More...

Detailed Description

Function Documentation

◆ IfxMtu_checkErrorFlags()

IFX_INLINE boolean IfxMtu_checkErrorFlags ( IfxMtu_MbistSel mbistSel )

Returns True if any Error Flags are set.

Parameters
mbistSel Memory slection
Returns
True if any error Flag is set

Definition at line 563 of file IfxMtu.h.

Referenced by IfxMtu_runNonDestructiveInversionTest().

◆ IfxMtu_clearErrorTracking()

IFX_EXTERN void IfxMtu_clearErrorTracking ( IfxMtu_MbistSel mbistSel )

Clears the error tracking registers (ETRR), valid and overflow bits. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005).

Parameters
mbistSel Memory Selection
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 70 of file IfxMtu.c.

◆ IfxMtu_enableErrorTracking()

IFX_EXTERN void IfxMtu_enableErrorTracking | ( | IfxMtu_MbistSel | mbistSel,
 |  | boolean | enable
 | ) |  |

Enables the tracking of SRAM errors.

Parameters
mbistSel | Memory Selection
enable | TRUE to enable error tracking, FALSE to disable error tracking.
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 199 of file IfxMtu.c.

◆ IfxMtu_getSystemAddress()

IFX_EXTERN uint32 IfxMtu_getSystemAddress | ( | IfxMtu_MbistSel | mbistSel,
 |  | Ifx_MC_ETRR | trackedSramAddress
 | ) |  |

Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (SRAM address and block)

Please note that not all memories of the system are supported by this function. Additional memories will be considered on request.

Parameters
mbistSel | Memory Selection
trackedSramAddress | tracked SRAM address which consists of an ADDR and MBI field (SRAM address and block)
Returns
descrambled system address if supported by this function, otherwise 0

Example usage: see IfxMtu_getTrackedSramAddresses

Definition at line 214 of file IfxMtu.c.

◆ IfxMtu_getTrackedSramAddresses()

IFX_EXTERN uint8 IfxMtu_getTrackedSramAddresses | ( | IfxMtu_MbistSel | mbistSel,
 |  | Ifx_MC_ETRR * | trackedSramAddresses
 | ) |  |

Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registers. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005).

Parameters
mbistSel | Memory Selection
trackedSramAddresses | will contain the tracked error addresses in trackedSramAdresses[x].B.ADDR and affected blocks in sramAddresses[x].B.MBI

The array size shall be IFXMTU_MAX_TRACKED_ADDRESSES

Returns
number of tracked errors (0..IFXMTU_MAX_TRACKED_ADDRESSES)

Example usage to print out tracked errors of a given memory:

We assume that the MTU clock has already been enabled, and that the MBIST instance has been selected; e.g. for LMU:

uint16 password = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(password);
IfxMtu_enableModule();
IfxMtu_MbistSel mbistSel = IfxMtu_MbistSel_lmu;
IfxMtu_enableMbistShell(mbistSel);
// for auto-init memories: wait for the end of the clear operation
while (IfxMtu_isAutoInitRunning(mbistSel))
{}

Now the tracking information can be retrieved with:

{
Ifx_MC_ETRR trackedSramAddresses[IFXMTU_MAX_TRACKED_ADDRESSES];
uint8 numTrackedAddresses = IfxMtu_getTrackedSramAddresses(mbistSel, trackedSramAddresses);
clib_ver_printf("Tracked addresses: %d (Overflow: %d)\n",
numTrackedAddresses,
IfxMtu_isErrorTrackingOverflow(mbistSel) ? 1 : 0);
for(int i=0; i<numTrackedAddresses; ++i) {
clib_ver_printf("%d: A:0x%04x MBI:%d -> SystemAddress: 0x%08x\n",
i,
trackedSramAddresses[i].B.ADDR,
trackedSramAddresses[i].B.MBI,
IfxMtu_getSystemAddress(mbistSel, trackedSramAddresses[i]));
}
}

Definition at line 250 of file IfxMtu.c.

◆ IfxMtu_isErrorTrackingEnabled()

IFX_INLINE boolean IfxMtu_isErrorTrackingEnabled ( IfxMtu_MbistSel mbistSel )

Returns the status of the error tracking.

Parameters
mbistSel Memory Selection
Returns
TRUE if error tracking enabled.

Definition at line 533 of file IfxMtu.h.

◆ IfxMtu_isErrorTrackingOverflow()

IFX_INLINE boolean IfxMtu_isErrorTrackingOverflow ( IfxMtu_MbistSel mbistSel )

Returns the error tracking overflow status. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005).

Parameters
mbistSel Memory Selection
Returns
TRUE if more errors were detected since last clear than error tracking registers are available, or if more than one memory block was in error at the same time.

Definition at line 540 of file IfxMtu.h.


iLLD_TC26B: How to use the Mtu driver?

How to use the Mtu driver?
iLLD » MTU
Collaboration diagram for How to use the Mtu driver?:

The Memory Test Unit (MTU) controls and monitors the test, initialization and data integrity checking functions of the various internal memories in the device

The Mtu driver provides set of routines for various Mbist operations

In the following sections it will be described, how to integrate the Mtu driver into the application framework.

Sram Initialisation

Include Files

Include following header file into your C code:

#include <Mtu/IfxMtu.h>

Clear Sram (Synchronous polling mode)

The Sram initialisation in synchronous polling mode (i.e wait till the complete operation is done) can be used as:

clearSram(IfxMtu_MbistSel_cpu0Dspr);

Clear Sram (Asynchronous polling mode)

The Sram initialisation can be triggered by calling IfxMtu_clearSramStart() function, then can be queried for completion in a task using IfxMtu_isMbistDone. Once it's completed, then IfxMtu_clearSramContinue() has to be called. Note: The Safety Endinit watchdog has to be cleared before and set after for the IfxMtu_clearSramStart() and IfxMtu_clearSramContinue() functions.

Following code triggers Sram initilisation.

uint16 password = 0;
password = IfxScuWdt_getSafetyWatchdogPassword();
// Clear EndInit
IfxScuWdt_clearSafetyEndinit(password);
IfxMtu_clearSramStart(IfxMtu_MbistSel_cpu0Dspr);
// Set EndInit Watchdog
IfxScuWdt_setSafetyEndinit(password);

Sram initialisation status can be queried in a task and once done complete the operation using:

if (IfxMtu_isMbistDone(IfxMtu_MbistSel_cpu0Dspr))
{
// Sram Clear operation done
// Clear EndInit
IfxScuWdt_clearSafetyEndinit(password);
IfxMtu_clearSramContinue(IfxMtu_MbistSel_cpu0Dspr);
// Set EndInit Watchdog
IfxScuWdt_setSafetyEndinit(password);
}
else
{
// Sram operation is still in progress
}

Sram Error tracking

Example usage of Sram Error tracking

IfxScuWdt_clearSafetyEndinit(password);
IfxMtu_MbistSel mbistSel = IfxMtu_MbistSel_cpu1Dspr;
Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
IfxMtu_enableMbistShell(mbistSel);
// for auto-init memories: wait for the end of the clear operation
while (IfxMtu_isAutoInitRunning(mbistSel))
{}
IfxMtu_enableErrorTracking(mbistSel, TRUE);
uint32 numEtrr = 5;
// print tracked error address
{
Ifx_MC_ETRR trackedSramAddresses[IFXMTU_MAX_TRACKED_ADDRESSES];
uint8 numTrackedAddresses = IfxMtu_getTrackedSramAddresses(mbistSel, trackedSramAddresses);
for(uint32 i=0; i<numEtrr; ++i) {
printf("%d: Error Address:0x%04x, Error System Address:0x%04x \n",
i,
trackedSramAddresses[i].B.ADDR,
IfxMtu_getSystemAddress(mbistSel, trackedSramAddresses[i]));
}
}
}
IfxMtu_disableMbistShell(mbistSel);
IfxScuWdt_setSafetyEndinit(password);

Memory Tests

Non Destructive Inversion Test

Usage Example:

// Enable MTU clock
{
uint16 password = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(password);
IfxMtu_enableModule();
IfxScuWdt_setCpuEndinit(password);
}
{
uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
uint16 errAddr = 0;
IfxScuWdt_clearSafetyEndinit(password);
// run Non distructive inversion test for cpu0 DSPR memory (Range selection disabled)
IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel_cpu0Dspr, 0, 0xFF, 0, &errAddr);
// Clear Error Flags which are set in case you want to run further tests
IfxMtu_clearErrorTracking(IfxMtu_MbistSel_cpu0Dspr);
IfxScuWdt_setSafetyEndinit(password);
}


iLLD_TC26B: IfxMtu_cfg.h File Reference

  • _Impl
Data Structures | Macros | Enumerations | Variables
IfxMtu_cfg.h File Reference
iLLD » MTU

Mtu on-chip implementation data. More...

#include "Cpu/Std/IfxCpu.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxMtu_reg.h"
#include "IfxMc_reg.h"
Include dependency graph for IfxMtu_cfg.h:

Go to the source code of this file.

Data Structures

struct IfxMtu_SramItem
Describes physical parameters of a SRAM memory. More...

Macros

#define | IFXMTU_MC_ADDRESS_BASE (0xF0061000u)
Base address of first MBIST Control Block. More...
#define | IFXMTU_NUM_MBIST_TABLE_ITEMS (88)
Number of MBIST Table items. More...
#define | IFXMTU_MAX_TRACKED_ADDRESSES (5)
Maximum number of tracked SRAM addresses (ETTR) More...

Enumerations

enum IfxMtu_MbistSel {
IfxMtu_MbistSel_none = -1,
IfxMtu_MbistSel_cpu1Dspr = 6,
IfxMtu_MbistSel_cpu1Dtag = 8,
IfxMtu_MbistSel_cpu1Pspr = 9,
IfxMtu_MbistSel_cpu1Ptag = 11,
IfxMtu_MbistSel_cpu0Dspr = 14,
IfxMtu_MbistSel_cpu0Pspr = 16,
IfxMtu_MbistSel_cpu0Ptag = 17,
IfxMtu_MbistSel_ethermac = 22,
IfxMtu_MbistSel_mod4 = 26,
IfxMtu_MbistSel_gtmFifo = 28,
IfxMtu_MbistSel_gtmMcs0 = 29,
IfxMtu_MbistSel_gtmMcs1 = 30,
IfxMtu_MbistSel_gtmDpll1a = 31,
IfxMtu_MbistSel_gtmDpll1b = 32,
IfxMtu_MbistSel_gtmDpll2 = 33,
IfxMtu_MbistSel_psi5 = 34,
IfxMtu_MbistSel_mcan = 36,
IfxMtu_MbistSel_erayObf = 38,
IfxMtu_MbistSel_erayIbfTbf = 39,
IfxMtu_MbistSel_erayMbf = 40,
IfxMtu_MbistSel_stdbyRam1 = 44,
IfxMtu_MbistSel_mcds = 45,
IfxMtu_MbistSel_emem0 = 46,
IfxMtu_MbistSel_emem1 = 47,
IfxMtu_MbistSel_emem2 = 48,
IfxMtu_MbistSel_emem3 = 49,
IfxMtu_MbistSel_emem4 = 50,
IfxMtu_MbistSel_emem5 = 51,
IfxMtu_MbistSel_emem6 = 52,
IfxMtu_MbistSel_emem7 = 53,
IfxMtu_MbistSel_cifJpeg1_4 = 78,
IfxMtu_MbistSel_cifJpeg3 = 80,
IfxMtu_MbistSel_cifCif = 81,
IfxMtu_MbistSel_stdbyRam2 = 82,
IfxMtu_MbistSel_dma = 83,
IfxMtu_MbistSel_ememXtm0 = 84,
IfxMtu_MbistSel_ememXtm1 = 85,
IfxMtu_MbistSel_fft0 = 86,
IfxMtu_MbistSel_fft1 = 87
}
MBIST Selection. More...

Variables

IFX_EXTERN const IfxMtu_SramItem IfxMtu_sramTable [IFXMTU_NUM_MBIST_TABLE_ITEMS]

Detailed Description

Mtu on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMtu_cfg.h.

Data Structure Documentation

◆ IfxMtu_SramItem

struct IfxMtu_SramItem

Describes physical parameters of a SRAM memory.

Definition at line 133 of file IfxMtu_cfg.h.

Data Fields
uint16 | dataSize | Data Size of each memory block.
uint8 | eccInvPos0 | First ECC bit which needs to be inverted.
uint8 | eccInvPos1 | Second ECC bit which needs to be inverted.
uint8 | eccSize | ECC Size of each memory block.
uint32 | mbistDelay | Mbist Delay.
uint8 | numBlocks | number of SRAM blocks

Macro Definition Documentation

◆ IFXMTU_MAX_TRACKED_ADDRESSES

#define IFXMTU_MAX_TRACKED_ADDRESSES (5)

Maximum number of tracked SRAM addresses (ETTR)

Definition at line 75 of file IfxMtu_cfg.h.

Referenced by IfxMtu_getTrackedSramAddresses().

◆ IFXMTU_MC_ADDRESS_BASE

#define IFXMTU_MC_ADDRESS_BASE (0xF0061000u)

Base address of first MBIST Control Block.

Definition at line 67 of file IfxMtu_cfg.h.

Referenced by IfxMtu_checkErrorFlags(), IfxMtu_clearErrorTracking(), IfxMtu_clearSram(), IfxMtu_clearSramStart(), IfxMtu_enableErrorTracking(), IfxMtu_getTrackedSramAddresses(), IfxMtu_isErrorTrackingEnabled(), IfxMtu_isErrorTrackingOverflow(), IfxMtu_isMbistDone(), IfxMtu_readSramAddress(), IfxMtu_runNonDestructiveInversionTest(), and IfxMtu_writeSramAddress().

◆ IFXMTU_NUM_MBIST_TABLE_ITEMS

#define IFXMTU_NUM_MBIST_TABLE_ITEMS (88)

Number of MBIST Table items.

Definition at line 71 of file IfxMtu_cfg.h.

Referenced by IfxMtu_clearSramStart().

Enumeration Type Documentation

◆ IfxMtu_MbistSel

enum IfxMtu_MbistSel

MBIST Selection.

Enumerator
IfxMtu_MbistSel_none
IfxMtu_MbistSel_cpu1Dspr
IfxMtu_MbistSel_cpu1Dtag
IfxMtu_MbistSel_cpu1Pspr
IfxMtu_MbistSel_cpu1Ptag
IfxMtu_MbistSel_cpu0Dspr
IfxMtu_MbistSel_cpu0Pspr
IfxMtu_MbistSel_cpu0Ptag
IfxMtu_MbistSel_ethermac
IfxMtu_MbistSel_mod4
IfxMtu_MbistSel_gtmFifo
IfxMtu_MbistSel_gtmMcs0
IfxMtu_MbistSel_gtmMcs1
IfxMtu_MbistSel_gtmDpll1a
IfxMtu_MbistSel_gtmDpll1b
IfxMtu_MbistSel_gtmDpll2
IfxMtu_MbistSel_psi5
IfxMtu_MbistSel_mcan
IfxMtu_MbistSel_erayObf
IfxMtu_MbistSel_erayIbfTbf
IfxMtu_MbistSel_erayMbf
IfxMtu_MbistSel_stdbyRam1
IfxMtu_MbistSel_mcds
IfxMtu_MbistSel_emem0
IfxMtu_MbistSel_emem1
IfxMtu_MbistSel_emem2
IfxMtu_MbistSel_emem3
IfxMtu_MbistSel_emem4
IfxMtu_MbistSel_emem5
IfxMtu_MbistSel_emem6
IfxMtu_MbistSel_emem7
IfxMtu_MbistSel_cifJpeg1_4
IfxMtu_MbistSel_cifJpeg3
IfxMtu_MbistSel_cifCif
IfxMtu_MbistSel_stdbyRam2
IfxMtu_MbistSel_dma
IfxMtu_MbistSel_ememXtm0
IfxMtu_MbistSel_ememXtm1
IfxMtu_MbistSel_fft0
IfxMtu_MbistSel_fft1

Definition at line 83 of file IfxMtu_cfg.h.

Variable Documentation

◆ IfxMtu_sramTable

IFX_EXTERN const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS]

Definition at line 147 of file IfxMtu_cfg.h.


iLLD_TC26B: IfxMtu.h File Reference

  • Mtu
  • Std
Macros | Functions
IfxMtu.h File Reference
iLLD » MTU

MTU basic functionality. More...

#include "_Impl/IfxMtu_cfg.h"
#include "IfxMc_bf.h"
#include "IfxMtu_reg.h"
#include "IfxMc_reg.h"
#include "IfxScu_reg.h"
#include "_Utilities/Ifx_Assert.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxMtu.h:

Go to the source code of this file.

Macros

#define IFXMTU_ERROR_FLAGS_MASK
Mask for the ERROR flags. More...

Functions

IFX_INLINE void | IfxMtu_disableMbistShell (IfxMtu_MbistSel mbistSel)
Disables the MBIST Shell of the given SRAM. More...
IFX_INLINE void | IfxMtu_enableMbistShell (IfxMtu_MbistSel mbistSel)
Enables the MBIST Shell of the given SRAM. More...
IFX_INLINE void | IfxMtu_enableModule (void)
Enables the MTU module. More...
IFX_INLINE boolean | IfxMtu_isAutoInitRunning (IfxMtu_MbistSel mbistSel)
Returns TRUE if Auto-Initialisation is running for the given SRAM. More...
IFX_INLINE boolean | IfxMtu_isModuleEnabled (void)
Returns the status of whether the module is enabled or not. More...
IFX_INLINE boolean | IfxMtu_isMbistDone (IfxMtu_MbistSel mbistSel)
This Function returns the status of MBIST clear Sram operation. Caution: It is recommended not to call this function continously in a loop. Use IfxMtu_ClearSram() function for Synchronous polling mode. More...
IFX_EXTERN void | IfxMtu_clearSram (IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. More...
IFX_EXTERN void | IfxMtu_clearSramContinue (IfxMtu_MbistSel mbistSel)
This Function should be called after MBIST Clear SRAM operation is completed. Note: The function should be called with safety endinit bit cleared. More...
IFX_EXTERN void | IfxMtu_clearSramStart (IfxMtu_MbistSel mbistSel)
This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn't wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared. More...
IFX_EXTERN void | IfxMtu_readSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)
IFX_EXTERN uint8 | IfxMtu_runNonDestructiveInversionTest (IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can be considered as a simple linear test that is able to find all Stuck-At faults (the cell remains stuck at a value for any operation) without destroying any user data. The test accesses every Word in the address range defined by the RANGE register, four times. Test Steps: More...
IFX_EXTERN void | IfxMtu_writeSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)
IFX_INLINE boolean | IfxMtu_isErrorTrackingEnabled (IfxMtu_MbistSel mbistSel)
Returns the status of the error tracking. More...
IFX_INLINE boolean | IfxMtu_isErrorTrackingOverflow (IfxMtu_MbistSel mbistSel)
Returns the error tracking overflow status. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005). More...
IFX_INLINE boolean | IfxMtu_checkErrorFlags (IfxMtu_MbistSel mbistSel)
Returns True if any Error Flags are set. More...
IFX_EXTERN void | IfxMtu_clearErrorTracking (IfxMtu_MbistSel mbistSel)
Clears the error tracking registers (ETRR), valid and overflow bits. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005). More...
IFX_EXTERN void | IfxMtu_enableErrorTracking (IfxMtu_MbistSel mbistSel, boolean enable)
Enables the tracking of SRAM errors. More...
IFX_EXTERN uint32 | IfxMtu_getSystemAddress (IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR trackedSramAddress)
Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (SRAM address and block) More...
IFX_EXTERN uint8 | IfxMtu_getTrackedSramAddresses (IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR *trackedSramAddresses)
Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registers. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005). More...

Detailed Description

MTU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMtu.h.

Macro Definition Documentation

◆ IFXMTU_ERROR_FLAGS_MASK

#define IFXMTU_ERROR_FLAGS_MASK
Value:
(((unsigned int)IFX_MC_ECCD_EOV_MSK << IFX_MC_ECCD_EOV_OFF) | \
((unsigned int)IFX_MC_ECCD_CERR_MSK << IFX_MC_ECCD_CERR_OFF) | \
((unsigned int)IFX_MC_ECCD_UERR_MSK << IFX_MC_ECCD_UERR_OFF) | \
((unsigned int)IFX_MC_ECCD_AERR_MSK << IFX_MC_ECCD_AERR_OFF))

Mask for the ERROR flags.

Definition at line 202 of file IfxMtu.h.

Referenced by IfxMtu_checkErrorFlags().


iLLD_TC26B: MULTICAN

Modules | Files
MULTICAN
iLLD
Collaboration diagram for MULTICAN:

Modules

Implementation
Standard Driver
MULTICAN Pin Mapping
How to use the CAN Interface driver?
CAN

Files

file | IfxMultican_cfg.h
MULTICAN on-chip implementation data.
file | IfxMultican_PinMap.c
MULTICAN I/O map.
file | IfxMultican_PinMap.h
MULTICAN I/O map.
file | IfxMultican_Can.h
MULTICAN CAN details.
file | IfxMultican.h
MULTICAN basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » MULTICAN
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » MULTICAN
Collaboration diagram for Standard Driver:

Modules

Enumerations
General functions
CAN Nodes
Message
Message Objects
Interrupts

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » MULTICAN » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxMultican_ClockSelect {
IfxMultican_ClockSelect_noClock = 0,
IfxMultican_ClockSelect_fclc = 1,
IfxMultican_ClockSelect_fosc0 = 2,
IfxMultican_ClockSelect_fErayPll = 4
}
CAN input clock selection. More...
enum IfxMultican_DataLengthCode {
IfxMultican_DataLengthCode_0 = 0,
IfxMultican_DataLengthCode_1,
IfxMultican_DataLengthCode_2,
IfxMultican_DataLengthCode_3,
IfxMultican_DataLengthCode_4,
IfxMultican_DataLengthCode_5,
IfxMultican_DataLengthCode_6,
IfxMultican_DataLengthCode_7,
IfxMultican_DataLengthCode_8,
IfxMultican_DataLengthCode_12 = 9,
IfxMultican_DataLengthCode_16 = 10,
IfxMultican_DataLengthCode_20 = 11,
IfxMultican_DataLengthCode_24 = 12,
IfxMultican_DataLengthCode_32 = 13,
IfxMultican_DataLengthCode_48 = 14,
IfxMultican_DataLengthCode_64 = 15
}
CAN frame data length code Definition in Ifx_CAN.MOFCRx.DLC. More...
enum IfxMultican_Frame {
IfxMultican_Frame_receive,
IfxMultican_Frame_transmit,
IfxMultican_Frame_remoteRequest,
IfxMultican_Frame_remoteAnswer
}
CAN frame type. More...
enum IfxMultican_FrameCounterMode {
IfxMultican_FrameCounterMode_frameCountMode = 0,
IfxMultican_FrameCounterMode_timeStampMode = 1,
IfxMultican_FrameCounterMode_bitTimingMode = 2,
IfxMultican_FrameCounterMode_errorCountMode = 3
}
Determines the operation mode of the frame counter
Definition in Ifx_CAN.NFCRx.B.CFMOD, (x= node Id) More...
enum IfxMultican_MsgObjGroup {
IfxMultican_MsgObjGroup_0 = 0,
IfxMultican_MsgObjGroup_1,
IfxMultican_MsgObjGroup_2,
IfxMultican_MsgObjGroup_3,
IfxMultican_MsgObjGroup_4,
IfxMultican_MsgObjGroup_5,
IfxMultican_MsgObjGroup_6,
IfxMultican_MsgObjGroup_7
}
CAN message object group
Each group consists of 32 consecutive message objects. More...
enum IfxMultican_MsgObjMode {
IfxMultican_MsgObjMode_standard = 0,
IfxMultican_MsgObjMode_receiveFifoBase = 1,
IfxMultican_MsgObjMode_transmitFifoBase = 2,
IfxMultican_MsgObjMode_transmitFifoSlave = 3,
IfxMultican_MsgObjMode_gatewaySource = 4,
IfxMultican_MsgObjMode_canFD64 = 5
}
CAN Message Object Mode. More...
enum IfxMultican_MsgObjStatusFlag {
IfxMultican_MsgObjStatusFlag_receivePending = IFX_CAN_MO_STAT_RXPND_OFF,
IfxMultican_MsgObjStatusFlag_transmitPending = IFX_CAN_MO_STAT_TXPND_OFF,
IfxMultican_MsgObjStatusFlag_receiveUpdating = IFX_CAN_MO_STAT_RXUPD_OFF,
IfxMultican_MsgObjStatusFlag_newData = IFX_CAN_MO_STAT_NEWDAT_OFF,
IfxMultican_MsgObjStatusFlag_messageLost = IFX_CAN_MO_STAT_MSGLST_OFF,
IfxMultican_MsgObjStatusFlag_messageValid = IFX_CAN_MO_STAT_MSGVAL_OFF,
IfxMultican_MsgObjStatusFlag_receiveTransmitSelected = IFX_CAN_MO_STAT_RTSEL_OFF,
IfxMultican_MsgObjStatusFlag_receiveEnable = IFX_CAN_MO_STAT_RXEN_OFF,
IfxMultican_MsgObjStatusFlag_transmitRequest = IFX_CAN_MO_STAT_TXRQ_OFF,
IfxMultican_MsgObjStatusFlag_transmitEnable0 = IFX_CAN_MO_STAT_TXEN0_OFF,
IfxMultican_MsgObjStatusFlag_transmitEnable1 = IFX_CAN_MO_STAT_TXEN1_OFF,
IfxMultican_MsgObjStatusFlag_messageDirection = IFX_CAN_MO_STAT_DIR_OFF
}
CAN Message Object status flag Definition in Ifx_CAN.MOSTATx (x: 0 to max number of msg objs) More...
enum IfxMultican_Priority {
IfxMultican_Priority_ListOrder = 1,
IfxMultican_Priority_CAN_ID = 2
}
CAN priorities. More...
enum IfxMultican_SleepMode {
IfxMultican_SleepMode_enable = 0,
IfxMultican_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CAN.CLC.B.EDIS. More...
enum IfxMultican_Status {
IfxMultican_Status_ok = 0x00000000,
IfxMultican_Status_notInitialised = 0x00000001,
IfxMultican_Status_wrongParam = 0x00000002,
IfxMultican_Status_wrongPin = 0x00000004,
IfxMultican_Status_busHeavy = 0x00000008,
IfxMultican_Status_busOff = 0x00000010,
IfxMultican_Status_notSentBusy = 0x00000020,
IfxMultican_Status_receiveEmpty = 0x00000040,
IfxMultican_Status_messageLost = 0x00000080,
IfxMultican_Status_newData = 0x00000100,
IfxMultican_Status_newDataButOneLost = IfxMultican_Status_messageLost | IfxMultican_Status_newData
}
CAN API status definition. More...
enum IfxMultican_SuspendMode {
IfxMultican_SuspendMode_none = 0,
IfxMultican_SuspendMode_hard = 1,
IfxMultican_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Detailed Description

Enumeration Type Documentation

◆ IfxMultican_ClockSelect

enum IfxMultican_ClockSelect

CAN input clock selection.

Enumerator
IfxMultican_ClockSelect_noClock | No clock supplied.
IfxMultican_ClockSelect_fclc | fMULTICAN
IfxMultican_ClockSelect_fosc0 | Oscillator Clock.
IfxMultican_ClockSelect_fErayPll | E-Ray clock.

Definition at line 87 of file IfxMultican.h.

◆ IfxMultican_DataLengthCode

enum IfxMultican_DataLengthCode

CAN frame data length code Definition in Ifx_CAN.MOFCRx.DLC.

Enumerator
IfxMultican_DataLengthCode_0 | 0 data bytes
IfxMultican_DataLengthCode_1 | 1 data bytes
IfxMultican_DataLengthCode_2 | 2 data bytes
IfxMultican_DataLengthCode_3 | 3 data bytes
IfxMultican_DataLengthCode_4 | 4 data bytes
IfxMultican_DataLengthCode_5 | 5 data bytes
IfxMultican_DataLengthCode_6 | 6 data bytes
IfxMultican_DataLengthCode_7 | 7 data bytes
IfxMultican_DataLengthCode_8 | 8 data bytes
IfxMultican_DataLengthCode_12 | 12 data bytes
IfxMultican_DataLengthCode_16 | 16 data bytes
IfxMultican_DataLengthCode_20 | 20 data bytes
IfxMultican_DataLengthCode_24 | 24 data bytes
IfxMultican_DataLengthCode_32 | 32 data bytes
IfxMultican_DataLengthCode_48 | 48 data bytes
IfxMultican_DataLengthCode_64 | 64 data bytes

Definition at line 98 of file IfxMultican.h.

◆ IfxMultican_Frame

enum IfxMultican_Frame

CAN frame type.

Enumerator
IfxMultican_Frame_receive | Data frame is received.
IfxMultican_Frame_transmit | Data frame is generated.
IfxMultican_Frame_remoteRequest | Remote request frame is generated.
IfxMultican_Frame_remoteAnswer | Answer frame is generated on reception of the corresponding remote request.

Definition at line 120 of file IfxMultican.h.

◆ IfxMultican_FrameCounterMode

enum IfxMultican_FrameCounterMode

Determines the operation mode of the frame counter
Definition in Ifx_CAN.NFCRx.B.CFMOD, (x= node Id)

Enumerator
IfxMultican_FrameCounterMode_frameCountMode | The frame counter is incremented upon the reception and transmission of frames.
IfxMultican_FrameCounterMode_timeStampMode | The frame counter is used to count bit times.
IfxMultican_FrameCounterMode_bitTimingMode | The frame counter is used for analysis of the bit timing.
IfxMultican_FrameCounterMode_errorCountMode | The frame counter is used for counting when an error frame is received or an error is detected by the node.

Definition at line 131 of file IfxMultican.h.

◆ IfxMultican_MsgObjGroup

enum IfxMultican_MsgObjGroup

CAN message object group
Each group consists of 32 consecutive message objects.

Enumerator
IfxMultican_MsgObjGroup_0
IfxMultican_MsgObjGroup_1
IfxMultican_MsgObjGroup_2
IfxMultican_MsgObjGroup_3
IfxMultican_MsgObjGroup_4
IfxMultican_MsgObjGroup_5
IfxMultican_MsgObjGroup_6
IfxMultican_MsgObjGroup_7

Definition at line 147 of file IfxMultican.h.

◆ IfxMultican_MsgObjMode

enum IfxMultican_MsgObjMode

CAN Message Object Mode.

Enumerator
IfxMultican_MsgObjMode_standard | Standard Message Object.
IfxMultican_MsgObjMode_receiveFifoBase | Receive FIFO Base Object.
IfxMultican_MsgObjMode_transmitFifoBase | Transmit FIFO Base Object.
IfxMultican_MsgObjMode_transmitFifoSlave | Transmit FIFO Slave Object.
IfxMultican_MsgObjMode_gatewaySource | Gateway Source Object.
IfxMultican_MsgObjMode_canFD64 | CANFD 64 bytes Message Mode.

Definition at line 161 of file IfxMultican.h.

◆ IfxMultican_MsgObjStatusFlag

enum IfxMultican_MsgObjStatusFlag

CAN Message Object status flag Definition in Ifx_CAN.MOSTATx (x: 0 to max number of msg objs)

Enumerator
IfxMultican_MsgObjStatusFlag_receivePending | Receive pending status flag.
IfxMultican_MsgObjStatusFlag_transmitPending | Transmit pending status flag.
IfxMultican_MsgObjStatusFlag_receiveUpdating | Receive updating status flag.
IfxMultican_MsgObjStatusFlag_newData | New data status flag.
IfxMultican_MsgObjStatusFlag_messageLost | Message lost status flag.
IfxMultican_MsgObjStatusFlag_messageValid | Message valid status flag.
IfxMultican_MsgObjStatusFlag_receiveTransmitSelected | Receive transmit selected status flag.
IfxMultican_MsgObjStatusFlag_receiveEnable | Receive enable status flag.
IfxMultican_MsgObjStatusFlag_transmitRequest | Transmit request status flag.
IfxMultican_MsgObjStatusFlag_transmitEnable0 | Transmit enable 0 status flag.
IfxMultican_MsgObjStatusFlag_transmitEnable1 | Transmit enable 1 status flag.
IfxMultican_MsgObjStatusFlag_messageDirection | Message direction status flag.

Definition at line 174 of file IfxMultican.h.

◆ IfxMultican_Priority

enum IfxMultican_Priority

CAN priorities.

Enumerator
IfxMultican_Priority_ListOrder | List order.
IfxMultican_Priority_CAN_ID | CAN ID.

Definition at line 192 of file IfxMultican.h.

◆ IfxMultican_SleepMode

enum IfxMultican_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CAN.CLC.B.EDIS.

Enumerator
IfxMultican_SleepMode_enable | enables sleep mode
IfxMultican_SleepMode_disable | disables sleep mode

Definition at line 201 of file IfxMultican.h.

◆ IfxMultican_Status

enum IfxMultican_Status

CAN API status definition.

Enumerator
IfxMultican_Status_ok
IfxMultican_Status_notInitialised
IfxMultican_Status_wrongParam
IfxMultican_Status_wrongPin
IfxMultican_Status_busHeavy
IfxMultican_Status_busOff
IfxMultican_Status_notSentBusy
IfxMultican_Status_receiveEmpty
IfxMultican_Status_messageLost
IfxMultican_Status_newData
IfxMultican_Status_newDataButOneLost

Definition at line 209 of file IfxMultican.h.

◆ IfxMultican_SuspendMode

enum IfxMultican_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxMultican_SuspendMode_none | No suspend.
IfxMultican_SuspendMode_hard | Hard Suspend.
IfxMultican_SuspendMode_soft | Soft Suspend.

Definition at line 226 of file IfxMultican.h.


iLLD_TC26B: General functions

Functions
General functions
iLLD » MULTICAN » Standard Driver
Collaboration diagram for General functions:

Functions

IFX_INLINE void | IfxMultican_clearMessagePendingSeletor (Ifx_CAN *mcan)
clears the message pending interrupt notification of a given list More...
IFX_INLINE void | IfxMultican_clearPendingMessageNotification (Ifx_CAN *mcan, uint16 list)
clears the message pending interrupt notification of a given list More...
IFX_INLINE void | IfxMultican_disableModule (Ifx_CAN *mcan)
Disables the module (sets the disable request) More...
IFX_INLINE void | IfxMultican_disableSleepMode (Ifx_CAN *mcan)
Disregards the sleep mode of the module. More...
IFX_INLINE void | IfxMultican_enableModule (Ifx_CAN *mcan)
Enables the module (clears the disable request) More...
IFX_INLINE void | IfxMultican_enableSleepMode (Ifx_CAN *mcan)
Enables the sleep mode of the module. More...
IFX_INLINE uint16 | IfxMultican_getFractionalDividerMode (Ifx_CAN *mcan)
Returns the selected fractional divider mode. More...
IFX_INLINE uint16 | IfxMultican_getFractionalDividerStepValue (Ifx_CAN *mcan)
Returns the reload or addition value for the result. More...
IFX_INLINE IfxMultican_ClockSelect | IfxMultican_getInputClock (Ifx_CAN *mcan)
Returns the selected input clock source. More...
IFX_INLINE boolean | IfxMultican_isModuleEnabled (Ifx_CAN *mcan)
Returns the status of module enabled or disabled. More...
IFX_INLINE void | IfxMultican_setFractionalDividerMode (Ifx_CAN *mcan, uint16 mode)
sets the fractional divider mode More...
IFX_INLINE void | IfxMultican_setFractionalDividerStepValue (Ifx_CAN *mcan, uint16 stepValue)
sets reload or addition value for the result. More...
IFX_INLINE void | IfxMultican_setInputClock (Ifx_CAN *mcan, IfxMultican_ClockSelect clockSelect)
Sets the input clock source. More...
IFX_INLINE void | IfxMultican_setMessageIndexMask (Ifx_CAN *mcan, uint32 mask)
clears the message pending interrupt notification of a given list More...
IFX_INLINE void | IfxMultican_setSleepMode (Ifx_CAN *can, IfxMultican_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxMultican_waitListReady (Ifx_CAN *mcan)
Wait until the list panel is ready. More...
IFX_INLINE boolean | IfxMultican_isModuleSuspended (Ifx_CAN *mcan)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxMultican_setSuspendMode (Ifx_CAN *mcan, IfxMultican_SuspendMode mode)
Set the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxMultican_Node_setFastBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures FBTR register. More...
IFX_EXTERN void | IfxMultican_Node_setNominalBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTEVR register. More...
IFX_EXTERN void | IfxMultican_deinit (Ifx_CAN *mcan)
Reset the CAN module
Reset and disable the CAN module, inclusive message object and node registers. More...
IFX_EXTERN void | IfxMultican_resetModule (Ifx_CAN *can)
resets Multican kernel More...
IFX_EXTERN void | IfxMultican_setListCommand (Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1)
Execute a command from the command panel. More...
IFX_EXTERN IfxMultican_Index | IfxMultican_getIndex (Ifx_CAN *multican)
API to get the resource index of the CAN specified. More...
IFX_EXTERN Ifx_CAN * | IfxMultican_getAddress (IfxMultican_Index multican)

Detailed Description

Function Documentation

◆ IfxMultican_clearMessagePendingSeletor()

IFX_INLINE void IfxMultican_clearMessagePendingSeletor ( Ifx_CAN * mcan )

clears the message pending interrupt notification of a given list

Parameters
mcan mcan Specifies the CAN module
Returns
None

Definition at line 1553 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_clearPendingMessageNotification()

IFX_INLINE void IfxMultican_clearPendingMessageNotification | ( | Ifx_CAN * | mcan,
 |  | uint16 | list
 | ) |  |

clears the message pending interrupt notification of a given list

Parameters
mcan | mcan Specifies the CAN module
list | List number
Returns
None

Definition at line 1559 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_deinit()

IFX_EXTERN void IfxMultican_deinit ( Ifx_CAN * mcan )

Reset the CAN module
Reset and disable the CAN module, inclusive message object and node registers.

Parameters
mcan Specifies the CAN module
Returns
None

Definition at line 1178 of file IfxMultican.c.

Referenced by IfxMultican_Can_deinit().

◆ IfxMultican_disableModule()

IFX_INLINE void IfxMultican_disableModule ( Ifx_CAN * mcan )

Disables the module (sets the disable request)

Parameters
mcan mcan Specifies the CAN module
Returns
None

Definition at line 1565 of file IfxMultican.h.

◆ IfxMultican_disableSleepMode()

IFX_INLINE void IfxMultican_disableSleepMode ( Ifx_CAN * mcan )

Disregards the sleep mode of the module.

Parameters
mcan mcan Specifies the CAN module
Returns
None

Definition at line 1571 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_enableModule()

IFX_INLINE void IfxMultican_enableModule ( Ifx_CAN * mcan )

Enables the module (clears the disable request)

Parameters
mcan mcan Specifies the CAN module
Returns
None

Definition at line 1577 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_enableSleepMode()

IFX_INLINE void IfxMultican_enableSleepMode ( Ifx_CAN * mcan )

Enables the sleep mode of the module.

Parameters
mcan mcan Specifies the CAN module
Returns
None

Definition at line 1583 of file IfxMultican.h.

◆ IfxMultican_getAddress()

IFX_EXTERN Ifx_CAN* IfxMultican_getAddress ( IfxMultican_Index multican )
Parameters
multican Module index of the MULTICAN
Returns
MULTICAN module register address

Definition at line 1280 of file IfxMultican.c.

◆ IfxMultican_getFractionalDividerMode()

IFX_INLINE uint16 IfxMultican_getFractionalDividerMode ( Ifx_CAN * mcan )

Returns the selected fractional divider mode.

Parameters
mcan mcan Specifies the CAN module
Returns
Divider mode

Definition at line 1589 of file IfxMultican.h.

Referenced by IfxMultican_Can_getConfig().

◆ IfxMultican_getFractionalDividerStepValue()

IFX_INLINE uint16 IfxMultican_getFractionalDividerStepValue ( Ifx_CAN * mcan )

Returns the reload or addition value for the result.

Parameters
mcan mcan Specifies the CAN module
Returns
Step Value

Definition at line 1595 of file IfxMultican.h.

Referenced by IfxMultican_Can_getConfig().

◆ IfxMultican_getIndex()

IFX_EXTERN IfxMultican_Index IfxMultican_getIndex ( Ifx_CAN * multican )

API to get the resource index of the CAN specified.

Returns
multican resource index

Definition at line 1260 of file IfxMultican.c.

◆ IfxMultican_getInputClock()

IFX_INLINE IfxMultican_ClockSelect IfxMultican_getInputClock ( Ifx_CAN * mcan )

Returns the selected input clock source.

Parameters
mcan mcan Specifies the CAN module
Returns
Clock selection

Definition at line 1601 of file IfxMultican.h.

Referenced by IfxMultican_Can_getConfig().

◆ IfxMultican_isModuleEnabled()

IFX_INLINE boolean IfxMultican_isModuleEnabled ( Ifx_CAN * mcan )

Returns the status of module enabled or disabled.

Parameters
mcan mcan Specifies the CAN module
Returns
Status (TRUE / FALSE)

Definition at line 1607 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_isModuleSuspended()

IFX_INLINE boolean IfxMultican_isModuleSuspended ( Ifx_CAN * mcan )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
mcan Pointer to MULTICAN module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 1653 of file IfxMultican.h.

◆ IfxMultican_Node_setFastBitTiming()

IFX_EXTERN void IfxMultican_Node_setFastBitTiming | ( | Ifx_CAN_N * | hwNode,
 |  | float32 | moduleFreq,
 |  | uint32 | baudrate,
 |  | uint16 | samplePoint,
 |  | uint16 | synchJumpWidth
 | ) |  |

Calculates the best posible values and configures FBTR register.

Parameters
hwNode | Pointer to CAN Node registers
moduleFreq | Specifies the CAN module frequency
baudrate | Specifies the node baud rate. Unit: baud
samplePoint | Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
synchJumpWidth synchJumpWidth Specifies the re-synchronization jump width.
Range = [0, 10000] resp. [0%, 100%] of the total bit time.
Returns
None

Definition at line 845 of file IfxMultican.c.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setNominalBitTiming()

IFX_EXTERN void IfxMultican_Node_setNominalBitTiming | ( | Ifx_CAN_N * | hwNode,
 |  | float32 | moduleFreq,
 |  | uint32 | baudrate,
 |  | uint16 | samplePoint,
 |  | uint16 | synchJumpWidth
 | ) |  |

Calculates the best posible values and configures BTEVR register.

Parameters
hwNode | Pointer to CAN Node registers
moduleFreq | Specifies the CAN module frequency
baudrate | Specifies the node baud rate. Unit: baud
samplePoint | Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
synchJumpWidth synchJumpWidth Specifies the re-synchronization jump width.
Range = [0, 10000] resp. [0%, 100%] of the total bit time.
Returns
None

Definition at line 1002 of file IfxMultican.c.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_resetModule()

IFX_EXTERN void IfxMultican_resetModule ( Ifx_CAN * can )

resets Multican kernel

Parameters
can pointer to CAN registers
Returns
None

Definition at line 1226 of file IfxMultican.c.

◆ IfxMultican_setFractionalDividerMode()

IFX_INLINE void IfxMultican_setFractionalDividerMode | ( | Ifx_CAN * | mcan,
 |  | uint16 | mode
 | ) |  |

sets the fractional divider mode

Parameters
mcan | mcan Specifies the CAN module
mode | Divider mode
Returns
None

Definition at line 1613 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_setFractionalDividerStepValue()

IFX_INLINE void IfxMultican_setFractionalDividerStepValue | ( | Ifx_CAN * | mcan,
 |  | uint16 | stepValue
 | ) |  |

sets reload or addition value for the result.

Parameters
mcan | mcan Specifies the CAN module
stepValue | Step Value
Returns
None

Definition at line 1619 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_setInputClock()

IFX_INLINE void IfxMultican_setInputClock | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_ClockSelect | clockSelect
 | ) |  |

Sets the input clock source.

Parameters
mcan | mcan Specifies the CAN module
clockSelect | Clock selection
Returns
None

Definition at line 1625 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_setListCommand()

IFX_EXTERN void IfxMultican_setListCommand | ( | Ifx_CAN * | mcan,
 |  | uint32 | cmd,
 |  | uint32 | arg2,
 |  | uint32 | arg1
 | ) |  |

Execute a command from the command panel.

Parameters
mcan | Specifies the CAN module
cmd | Specifies the command
arg2 | Specifies the second argument
arg1 | Specifies the first argument
Returns
None
  • write to CAN_PANCTR

Definition at line 1245 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_init(), and IfxMultican_MsgObj_deinit().

◆ IfxMultican_setMessageIndexMask()

IFX_INLINE void IfxMultican_setMessageIndexMask | ( | Ifx_CAN * | mcan,
 |  | uint32 | mask
 | ) |  |

clears the message pending interrupt notification of a given list

Parameters
mcan | mcan Specifies the CAN module
mask | Message Index mask
Returns
None

Definition at line 1631 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_setSleepMode()

IFX_INLINE void IfxMultican_setSleepMode | ( | Ifx_CAN * | can,
 |  | IfxMultican_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
can | pointer to CAN registers
mode | mode selection (enable / disable)
Returns
None

Definition at line 1637 of file IfxMultican.h.

◆ IfxMultican_setSuspendMode()

IFX_INLINE void IfxMultican_setSuspendMode | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_SuspendMode | mode
 | ) |  |

Set the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
mcan | Pointer to MULTICAN module registers
mode | Module suspend mode
Returns
None

Definition at line 1665 of file IfxMultican.h.

◆ IfxMultican_waitListReady()

IFX_INLINE void IfxMultican_waitListReady ( Ifx_CAN * mcan )

Wait until the list panel is ready.

Parameters
mcan mcan Specifies the CAN module
Returns
None

Definition at line 1646 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule(), and IfxMultican_setListCommand().


iLLD_TC26B: CAN Nodes

Functions
CAN Nodes
iLLD » MULTICAN » Standard Driver
Collaboration diagram for CAN Nodes:

Functions

IFX_INLINE void | IfxMultican_Node_activate (Ifx_CAN_N *hwNode)
Activate the CAN Node. Participate in the CAN bus activities. More...
IFX_INLINE void | IfxMultican_Node_deactivate (Ifx_CAN_N *hwNode)
Deactivate the CAN Node. Take out from participation in the CAN bus activities. More...
IFX_INLINE void | IfxMultican_Node_disableConfigurationChange (Ifx_CAN_N *hwNode)
Disables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node. More...
IFX_INLINE void | IfxMultican_Node_enableConfigurationChange (Ifx_CAN_N *hwNode)
Enables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node. More...
IFX_INLINE Ifx_CAN_N * | IfxMultican_Node_getPointer (Ifx_CAN *mcan, IfxMultican_NodeId node)
Returns the base address to a given CAN node number. More...
IFX_INLINE void | IfxMultican_Node_resetControlRegister (Ifx_CAN_N *hwNode)
Resets the control register of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_resetErrorCounters (Ifx_CAN_N *hwNode)
Resets the error counters of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_resetInterruptPointers (Ifx_CAN_N *hwNode)
Resets the interrupt pointers of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setAlertInterrupt (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the alert interrupt of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setAlertInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for an alert interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setAnalyzerMode (Ifx_CAN_N *hwNode, boolean mode)
Enables / Disables the analyzer mode of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setErrorWarningLevel (Ifx_CAN_N *hwNode, uint8 level)
Determines the threshold value (warning level, default 96) to be reached
in order to set the corresponding error warning bit EWRN. More...
IFX_INLINE void | IfxMultican_Node_setFastNode (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the flexible data rate of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setFrameCounterInterrupt (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the CAN frame counter overflow interrupt of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setFrameCounterInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a frame counter overflow interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setFrameCounterMode (Ifx_CAN_N *hwNode, IfxMultican_FrameCounterMode mode)
Sets the operation mode of the frame counter of the CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setLastErrorCodeInterrupt (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the last error code interrupt of CAN node x.
This interrupt is generated with each hardware update of bit field NSRx.LEC with LEC > 0 (CAN protocol error). More...
IFX_INLINE void | IfxMultican_Node_setLastErrorCodeInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for an LEC interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setLoopBackMode (Ifx_CAN_N *hwNode, boolean mode)
Enables / Disables the loopback mode of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setReceiveErrorCounter (Ifx_CAN_N *hwNode, uint8 value)
Sets the value of the receive error counter of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setTimerEventInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a timer event interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setTransceiverDelayCompensation (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the transceiver delay compensation of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setTransceiverDelayCompensationOffset (Ifx_CAN_N *hwNode, uint16 value)
Sets transceiver delay ompensation offset of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setTransferInterrupt (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the transfer interrupt of CAN node x.
This interrupt is generated after the successful reception or transmission of a CAN frame in node x. More...
IFX_INLINE void | IfxMultican_Node_setTransferInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a transfer OK interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setTransmitErrorCounter (Ifx_CAN_N *hwNode, uint8 value)
Sets the value of the transmit error counter of CAN node x. More...
IFX_INLINE IfxMultican_DataLengthCode | IfxMultican_Node_getCodeFromDataLength (uint32 dataLength)
Return the DLC code corresponding to the data length in byte. More...
IFX_INLINE uint32 | IfxMultican_Node_getDataLengthFromCode (IfxMultican_DataLengthCode code)
Get the datalength in bytes from DLC. More...
IFX_EXTERN void | IfxMultican_Node_deinit (Ifx_CAN_N *hwNode)
Reset the CAN node. More...
IFX_EXTERN boolean | IfxMultican_Node_initRxPin (Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin. More...
IFX_EXTERN boolean | IfxMultican_Node_initTxPin (Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Node_recoverBusOff (Ifx_CAN_N *hwNode)
Recovers the CAN node from bus off. More...
IFX_EXTERN void | IfxMultican_Node_setBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTR register. More...
IFX_EXTERN void | IfxMultican_calcTimingFromBTR (float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth)
Returns the CAN node timing. More...

Detailed Description

Function Documentation

◆ IfxMultican_calcTimingFromBTR()

IFX_EXTERN void IfxMultican_calcTimingFromBTR | ( | float32 | moduleFreq,
 |  | uint32 | btr,
 |  | uint32 * | baudrate,
 |  | uint16 * | samplePoint,
 |  | uint16 * | synchJumpWidth
 | ) |  |

Returns the CAN node timing.

Parameters
moduleFreq | Specifies the CAN module frequency
btr | BTR
baudrate | Baudrate
samplePoint | Sample point
synchJumpWidth | Sync Jump Width
Returns
None

Definition at line 1161 of file IfxMultican.c.

Referenced by IfxMultican_Can_Node_getConfig().

◆ IfxMultican_Node_activate()

IFX_INLINE void IfxMultican_Node_activate ( Ifx_CAN_N * hwNode )

Activate the CAN Node. Participate in the CAN bus activities.

Parameters
hwNode Pointer to CAN Node registers
Returns
None

Definition at line 1395 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_activate(), IfxMultican_Can_Node_init(), and IfxMultican_Node_recoverBusOff().

◆ IfxMultican_Node_deactivate()

IFX_INLINE void IfxMultican_Node_deactivate ( Ifx_CAN_N * hwNode )

Deactivate the CAN Node. Take out from participation in the CAN bus activities.

Parameters
hwNode Pointer to CAN Node registers
Returns
None

Definition at line 1401 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_deactivate(), and IfxMultican_Node_recoverBusOff().

◆ IfxMultican_Node_deinit()

IFX_EXTERN void IfxMultican_Node_deinit ( Ifx_CAN_N * hwNode )

Reset the CAN node.

Parameters
hwNode Pointer to CAN Node registers
Returns
None

Definition at line 609 of file IfxMultican.c.

Referenced by IfxMultican_Can_Node_deinit(), and IfxMultican_deinit().

◆ IfxMultican_Node_disableConfigurationChange()

IFX_INLINE void IfxMultican_Node_disableConfigurationChange ( Ifx_CAN_N * hwNode )

Disables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node.

Parameters
hwNode Pointer to CAN Node registers
Returns
None

Definition at line 1407 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_enableConfigurationChange()

IFX_INLINE void IfxMultican_Node_enableConfigurationChange ( Ifx_CAN_N * hwNode )

Enables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node.

Parameters
hwNode Pointer to CAN Node registers
Returns
None

Definition at line 1413 of file IfxMultican.h.

◆ IfxMultican_Node_getCodeFromDataLength()

IFX_INLINE IfxMultican_DataLengthCode IfxMultican_Node_getCodeFromDataLength ( uint32 dataLength )

Return the DLC code corresponding to the data length in byte.

Parameters
dataLength Data length in bytes
Returns
Data length code

Definition at line 1676 of file IfxMultican.h.

◆ IfxMultican_Node_getDataLengthFromCode()

IFX_INLINE uint32 IfxMultican_Node_getDataLengthFromCode ( IfxMultican_DataLengthCode code )

Get the datalength in bytes from DLC.

Parameters
code Data length code
Returns
Datalength in bytes

Definition at line 1697 of file IfxMultican.h.

◆ IfxMultican_Node_getPointer()

IFX_INLINE Ifx_CAN_N * IfxMultican_Node_getPointer | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_NodeId | node
 | ) |  |

Returns the base address to a given CAN node number.

Parameters
mcan | Specifies the CAN module
node | Specifies the CAN node
Returns
base pointer to CAN node

Definition at line 1419 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_activate(), IfxMultican_Can_Node_deactivate(), IfxMultican_Can_Node_deinit(), IfxMultican_Can_Node_init(), IfxMultican_Can_Node_recoverBusOff(), and IfxMultican_deinit().

◆ IfxMultican_Node_initRxPin()

IFX_EXTERN boolean IfxMultican_Node_initRxPin | ( | Ifx_CAN_N * | hwNode,
 |  | IfxMultican_Rxd_In * | rxd,
 |  | IfxPort_InputMode | mode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Select and initialise the CAN node receive pin.

Parameters
hwNode | Pointer to CAN Node registers
rxd | Rx pin
mode | Input mode
Returns
TRUE: Returns TRUE if the operation was successful
FALSE: Returns FALSE if the operation was errorneous

Definition at line 621 of file IfxMultican.c.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_initTxPin()

IFX_EXTERN boolean IfxMultican_Node_initTxPin | ( | Ifx_CAN_N * | hwNode,
 |  | IfxMultican_Txd_Out * | txd,
 |  | IfxPort_OutputMode | mode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Select and initialise the CAN node transmit pin.

Parameters
hwNode | Pointer to CAN Node registers
txd | Tx pin
mode | Output mode
Returns
TRUE: Returns TRUE if the operation was successful
FALSE: Returns FALSE if the operation was errorneous

Definition at line 631 of file IfxMultican.c.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_recoverBusOff()

IFX_EXTERN IfxMultican_Status IfxMultican_Node_recoverBusOff ( Ifx_CAN_N * hwNode )

Recovers the CAN node from bus off.

Parameters
hwNode Pointer to CAN Node registers
Returns
Status

Definition at line 640 of file IfxMultican.c.

Referenced by IfxMultican_Can_Node_recoverBusOff().

◆ IfxMultican_Node_resetControlRegister()

IFX_INLINE void IfxMultican_Node_resetControlRegister ( Ifx_CAN_N * hwNode )

Resets the control register of CAN Node x.

Parameters
hwNode Pointer to CAN Node registers
Returns
None

Definition at line 1425 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_resetErrorCounters()

IFX_INLINE void IfxMultican_Node_resetErrorCounters ( Ifx_CAN_N * hwNode )

Resets the error counters of CAN Node x.

Parameters
hwNode Pointer to CAN Node registers
Returns
None

Definition at line 1431 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_resetInterruptPointers()

IFX_INLINE void IfxMultican_Node_resetInterruptPointers ( Ifx_CAN_N * hwNode )

Resets the interrupt pointers of CAN Node x.

Parameters
hwNode Pointer to CAN Node registers
Returns
None

Definition at line 1437 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setAlertInterrupt()

IFX_INLINE void IfxMultican_Node_setAlertInterrupt | ( | Ifx_CAN_N * | hwNode,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the alert interrupt of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
enabled | Enable / disable choice
Returns
None

Definition at line 1443 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setAlertInterruptPointer()

IFX_INLINE void IfxMultican_Node_setAlertInterruptPointer | ( | Ifx_CAN_N * | hwNode,
 |  | IfxMultican_SrcId | srcId
 | ) |  |

Selects the interrupt output line INT_Om (m = 0-15) for an alert interrupt of CAN Node x.

Parameters
hwNode | Pointer to CAN Node registers
srcId | Service request ID
Returns
None

Definition at line 1449 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setAnalyzerMode()

IFX_INLINE void IfxMultican_Node_setAnalyzerMode | ( | Ifx_CAN_N * | hwNode,
 |  | boolean | mode
 | ) |  |

Enables / Disables the analyzer mode of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
mode | Enable / disable choice
Returns
None

Definition at line 1455 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setBitTiming()

IFX_EXTERN void IfxMultican_Node_setBitTiming | ( | Ifx_CAN_N * | hwNode,
 |  | float32 | moduleFreq,
 |  | uint32 | baudrate,
 |  | uint16 | samplePoint,
 |  | uint16 | synchJumpWidth
 | ) |  |

Calculates the best posible values and configures BTR register.

Parameters
hwNode | Pointer to CAN Node registers
moduleFreq | Specifies the CAN module frequency
baudrate | Specifies the node baud rate. Unit: baud
samplePoint | Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
synchJumpWidth synchJumpWidth Specifies the re-synchronization jump width.
Range = [0, 10000] resp. [0%, 100%] of the total bit time.
Returns
None

Definition at line 685 of file IfxMultican.c.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setErrorWarningLevel()

IFX_INLINE void IfxMultican_Node_setErrorWarningLevel | ( | Ifx_CAN_N * | hwNode,
 |  | uint8 | level
 | ) |  |

Determines the threshold value (warning level, default 96) to be reached
in order to set the corresponding error warning bit EWRN.

Parameters
hwNode | Pointer to CAN Node registers
level | Error warning level
Returns
None

Definition at line 1461 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setFastNode()

IFX_INLINE void IfxMultican_Node_setFastNode | ( | Ifx_CAN_N * | hwNode,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the flexible data rate of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
enabled | Enable / disable choice
Returns
None

Definition at line 1467 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setFrameCounterInterrupt()

IFX_INLINE void IfxMultican_Node_setFrameCounterInterrupt | ( | Ifx_CAN_N * | hwNode,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the CAN frame counter overflow interrupt of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
enabled | Enable / disable choice
Returns
None

Definition at line 1475 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setFrameCounterInterruptPointer()

IFX_INLINE void IfxMultican_Node_setFrameCounterInterruptPointer | ( | Ifx_CAN_N * | hwNode,
 |  | IfxMultican_SrcId | srcId
 | ) |  |

Selects the interrupt output line INT_Om (m = 0-15) for a frame counter overflow interrupt of CAN Node x.

Parameters
hwNode | Pointer to CAN Node registers
srcId | Service request ID
Returns
None

Definition at line 1481 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setFrameCounterMode()

IFX_INLINE void IfxMultican_Node_setFrameCounterMode | ( | Ifx_CAN_N * | hwNode,
 |  | IfxMultican_FrameCounterMode | mode
 | ) |  |

Sets the operation mode of the frame counter of the CAN Node x.

Parameters
hwNode | Pointer to CAN Node registers
mode | Determines the operation mode of the frame counter
Returns
None

Definition at line 1487 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setLastErrorCodeInterrupt()

IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterrupt | ( | Ifx_CAN_N * | hwNode,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the last error code interrupt of CAN node x.
This interrupt is generated with each hardware update of bit field NSRx.LEC with LEC > 0 (CAN protocol error).

Parameters
hwNode | Pointer to CAN Node registers
enabled | Enable / disable choice
Returns
None

Definition at line 1493 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setLastErrorCodeInterruptPointer()

IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterruptPointer | ( | Ifx_CAN_N * | hwNode,
 |  | IfxMultican_SrcId | srcId
 | ) |  |

Selects the interrupt output line INT_Om (m = 0-15) for an LEC interrupt of CAN Node x.

Parameters
hwNode | Pointer to CAN Node registers
srcId | Service request ID
Returns
None

Definition at line 1499 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setLoopBackMode()

IFX_INLINE void IfxMultican_Node_setLoopBackMode | ( | Ifx_CAN_N * | hwNode,
 |  | boolean | mode
 | ) |  |

Enables / Disables the loopback mode of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
mode | Enable / disable choice
Returns
None

Definition at line 1505 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setReceiveErrorCounter()

IFX_INLINE void IfxMultican_Node_setReceiveErrorCounter | ( | Ifx_CAN_N * | hwNode,
 |  | uint8 | value
 | ) |  |

Sets the value of the receive error counter of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
value | Receive error counter value
Returns
None

Definition at line 1511 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setTimerEventInterruptPointer()

IFX_INLINE void IfxMultican_Node_setTimerEventInterruptPointer | ( | Ifx_CAN_N * | hwNode,
 |  | IfxMultican_SrcId | srcId
 | ) |  |

Selects the interrupt output line INT_Om (m = 0-15) for a timer event interrupt of CAN Node x.

Parameters
hwNode | Pointer to CAN Node registers
srcId | Service request ID
Returns
None

Definition at line 1517 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setTransceiverDelayCompensation()

IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensation | ( | Ifx_CAN_N * | hwNode,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the transceiver delay compensation of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
enabled | Enable / disable choice
Returns
None

Definition at line 1523 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setTransceiverDelayCompensationOffset()

IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensationOffset | ( | Ifx_CAN_N * | hwNode,
 |  | uint16 | value
 | ) |  |

Sets transceiver delay ompensation offset of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
value | transceiver delay ompensation offset that is added to the measured transceiver delay. Range = [0, 15]
Returns
None

Definition at line 1529 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setTransferInterrupt()

IFX_INLINE void IfxMultican_Node_setTransferInterrupt | ( | Ifx_CAN_N * | hwNode,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the transfer interrupt of CAN node x.
This interrupt is generated after the successful reception or transmission of a CAN frame in node x.

Parameters
hwNode | Pointer to CAN Node registers
enabled | Enable / disable choice
Returns
None

Definition at line 1535 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setTransferInterruptPointer()

IFX_INLINE void IfxMultican_Node_setTransferInterruptPointer | ( | Ifx_CAN_N * | hwNode,
 |  | IfxMultican_SrcId | srcId
 | ) |  |

Selects the interrupt output line INT_Om (m = 0-15) for a transfer OK interrupt of CAN Node x.

Parameters
hwNode | Pointer to CAN Node registers
srcId | Service request ID
Returns
None

Definition at line 1541 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setTransmitErrorCounter()

IFX_INLINE void IfxMultican_Node_setTransmitErrorCounter | ( | Ifx_CAN_N * | hwNode,
 |  | uint8 | value
 | ) |  |

Sets the value of the transmit error counter of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
value | Transmit error counter value
Returns
None

Definition at line 1547 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().


iLLD_TC26B: Message

Functions
Message
iLLD » MULTICAN » Standard Driver
Collaboration diagram for Message:

Functions

IFX_INLINE void | IfxMultican_Message_init (IfxMultican_Message *msg, uint32 id, uint32 dataLow, uint32 dataHigh, IfxMultican_DataLengthCode lengthCode)
Initializes a CAN message. More...
IFX_INLINE void | IfxMultican_Message_longFrameInit (IfxMultican_Message *msg, uint32 id, IfxMultican_DataLengthCode lengthCode, boolean fastBitRate)
Initializes a CAN message long frame. More...

Detailed Description

Function Documentation

◆ IfxMultican_Message_init()

IFX_INLINE void IfxMultican_Message_init | ( | IfxMultican_Message * | msg,
 |  | uint32 | id,
 |  | uint32 | dataLow,
 |  | uint32 | dataHigh,
 |  | IfxMultican_DataLengthCode | lengthCode
 | ) |  |

Initializes a CAN message.

Parameters
msg | The message which should be initialized
id | The message ID
dataLow | The lower part of the 64bit data value
dataHigh | The upper part of the 64bit data value
lengthCode | number of bytes (data length code) which should be transmitted (0..8)
Returns
None

Definition at line 1134 of file IfxMultican.h.

◆ IfxMultican_Message_longFrameInit()

IFX_INLINE void IfxMultican_Message_longFrameInit | ( | IfxMultican_Message * | msg,
 |  | uint32 | id,
 |  | IfxMultican_DataLengthCode | lengthCode,
 |  | boolean | fastBitRate
 | ) |  |

Initializes a CAN message long frame.

Parameters
msg | The message which should be initialized
id | The message ID
lengthCode | number of bytes (data length code) which should be transmitted (0..8)
fastBitRate | Fast bit rate (FCR.BRS) enable/ disable choice
Returns
None

Definition at line 1145 of file IfxMultican.h.


iLLD_TC26B: Message Objects

Functions
Message Objects
iLLD » MULTICAN » Standard Driver
Collaboration diagram for Message Objects:

Functions

IFX_INLINE void | IfxMultican_MsgObj_clearDataRegisters (Ifx_CAN_MO *hwObj)
Sets priority class of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_clearFifoGatewayPointers (Ifx_CAN_MO *hwObj)
Clears the FIFO/GateWay pointers of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_clearRxPending (Ifx_CAN_MO *hwObj)
Clear the RX pending flag of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_clearTxPending (Ifx_CAN_MO *hwObj)
Clear the TX pending flag of a message object. More...
IFX_INLINE IfxMultican_MsgObjId | IfxMultican_MsgObj_getBottomObjectPointer (Ifx_CAN_MO *hwObj)
Gets bottom object pointer of the base message object. More...
IFX_INLINE IfxMultican_DataLengthCode | IfxMultican_MsgObj_getDataLengthCode (Ifx_CAN_MO *hwObj)
Gets data length code of a message object. More...
IFX_INLINE uint32 | IfxMultican_MsgObj_getMessageId (Ifx_CAN_MO *hwObj)
Gets message identifier of message object. More...
IFX_INLINE IfxMultican_MsgObjId | IfxMultican_MsgObj_getNextObjectPointer (Ifx_CAN_MO *hwObj)
Returns next object pointer (PNEXT) of the current message object. More...
IFX_INLINE Ifx_CAN_MO * | IfxMultican_MsgObj_getPointer (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Get base address of a message object register. More...
IFX_INLINE boolean | IfxMultican_MsgObj_isExtendedFrame (Ifx_CAN_MO *hwObj)
Get the message object status. More...
IFX_INLINE boolean | IfxMultican_MsgObj_isRxPending (Ifx_CAN_MO *hwObj)
Returns the RX pending flag of a message object. More...
IFX_INLINE boolean | IfxMultican_MsgObj_isTransmitRequested (Ifx_CAN_MO *hwObj)
Returns the TX Request flag of a message object. More...
IFX_INLINE boolean | IfxMultican_MsgObj_isTxPending (Ifx_CAN_MO *hwObj)
Returns the TX pending flag of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setAcceptanceMask (Ifx_CAN_MO *hwObj, uint32 mask, boolean extendedFrame)
Sets acceptance mask for the message identifier. More...
IFX_INLINE void | IfxMultican_MsgObj_setBitRateSwitch (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable bit rate switch of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setBottomObjectPointer (Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom object pointer of the base message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setCurrentObjectPointer (Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom current pointer of the base message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setDataCopy (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable data copy of a gateway source message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setDataLengthCode (Ifx_CAN_MO *hwObj, IfxMultican_DataLengthCode code)
Sets data length code of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setDataLengthCodeCopy (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable data length code copy of a gateway source message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setExtendedDataLength (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable extended data length of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setGatewayDataFrameSend (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable gateway data frame send of a gateway source message object which in turn sets the TXRQ of the gateway deatination object. More...
IFX_INLINE void | IfxMultican_MsgObj_setIdentifierCopy (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable identifier copy of a gateway source message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setIdentifierExtension (Ifx_CAN_MO *hwObj, boolean extension)
Sets identifier extension of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setMatchingId (Ifx_CAN_MO *hwObj, boolean matchingId)
Sets acceptance mask for the message IDE bit. More...
IFX_INLINE void | IfxMultican_MsgObj_setMessageId (Ifx_CAN_MO *hwObj, uint32 messageId, boolean extendedFrame)
Sets message identifier of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setMessageMode (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjMode mode)
Sets the message mode of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setMessagePendingNumber (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjId messageNumber)
Sets message pending number that selects the bit position of the bit in the Message Pending Register
that is set upon a message object n receive/transmit interrupt. More...
IFX_INLINE void | IfxMultican_MsgObj_setOverflowInterrupt (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable overflow interrupt of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setPriorityClass (Ifx_CAN_MO *hwObj, IfxMultican_Priority priority)
Sets priority class of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setReceiveInterrupt (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable receive interrupt of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setReceiveInterruptNodePointer (Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
Sets receive interrupt node pointer of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setRemoteMonitoring (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable transmit object remote monitoring of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setSelectObjectPointer (Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom object select pointer of the base message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setSingleDataTransfer (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable single data transfer of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setSingleTransmitTrial (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable single transmit trial of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setTopObjectPointer (Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets top object pointer of the base message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setTransmitInterrupt (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable transmit interrupt of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setTransmitInterruptNodePointer (Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
Sets transmit interrupt node pointer of message object. More...
IFX_EXTERN boolean | IfxMultican_MsgObj_cancelSend (Ifx_CAN_MO *hwObj)
Cancel pending TX request by invalidating the request, only when frame transmission has not been started. More...
IFX_EXTERN void | IfxMultican_MsgObj_clearStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Clears the selected status flag of a message object. More...
IFX_EXTERN void | IfxMultican_MsgObj_deinit (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Reset the message object
Append the message object to the end of idle list and reset message object registers. More...
IFX_EXTERN IfxMultican_MsgObjId | IfxMultican_MsgObj_getPendingId (Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group. More...
IFX_EXTERN IfxMultican_MsgObjStat | IfxMultican_MsgObj_getStatus (Ifx_CAN_MO *hwObj)
Get the message object status. More...
IFX_EXTERN boolean | IfxMultican_MsgObj_getStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Gets the status of the selected status flag of a message object. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_readLongFrame (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Read a received CAN long frame. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_readMessage (Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
Read a received CAN message. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_sendLongFrame (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Send a CAN Long frame message. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_sendMessage (Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_writeTxfifo (Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message. More...
IFX_EXTERN void | IfxMultican_MsgObj_setFilter (Ifx_CAN_MO *hwObj, boolean extend, uint32 id, uint32 accMask)
Set message object filter. More...
IFX_EXTERN void | IfxMultican_MsgObj_setStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Sets the selected status flag of a message object. More...

Detailed Description

Function Documentation

◆ IfxMultican_MsgObj_cancelSend()

IFX_EXTERN boolean IfxMultican_MsgObj_cancelSend ( Ifx_CAN_MO * hwObj )

Cancel pending TX request by invalidating the request, only when frame transmission has not been started.

Parameters
hwObj Pointer to CAN message object registers
Returns
TRUE if cancellation was successfully executed

Definition at line 72 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_cancelSend().

◆ IfxMultican_MsgObj_clearDataRegisters()

IFX_INLINE void IfxMultican_MsgObj_clearDataRegisters ( Ifx_CAN_MO * hwObj )

Sets priority class of message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
None

Definition at line 1155 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_clearFifoGatewayPointers()

IFX_INLINE void IfxMultican_MsgObj_clearFifoGatewayPointers ( Ifx_CAN_MO * hwObj )

Clears the FIFO/GateWay pointers of a message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
None

Definition at line 1162 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_clearRxPending()

IFX_INLINE void IfxMultican_MsgObj_clearRxPending ( Ifx_CAN_MO * hwObj )

Clear the RX pending flag of a message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
None

Definition at line 1168 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_clearRxPending(), and IfxMultican_Can_MsgObj_readMessage().

◆ IfxMultican_MsgObj_clearStatusFlag()

IFX_EXTERN void IfxMultican_MsgObj_clearStatusFlag | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_MsgObjStatusFlag | flag
 | ) |  |

Clears the selected status flag of a message object.

Parameters
hwObj | Pointer to CAN message object registers
flag | Message Object status flag
Returns
None

Definition at line 92 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_init(), IfxMultican_MsgObj_clearRxPending(), IfxMultican_MsgObj_clearTxPending(), IfxMultican_MsgObj_doReadLongFrame(), IfxMultican_MsgObj_doReadMessage(), IfxMultican_MsgObj_readLongFrame(), IfxMultican_MsgObj_readMessage(), IfxMultican_MsgObj_sendLongFrame(), IfxMultican_MsgObj_sendMessage(), and IfxMultican_MsgObj_writeTxfifo().

◆ IfxMultican_MsgObj_clearTxPending()

IFX_INLINE void IfxMultican_MsgObj_clearTxPending ( Ifx_CAN_MO * hwObj )

Clear the TX pending flag of a message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
None

Definition at line 1174 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_clearTxPending().

◆ IfxMultican_MsgObj_deinit()

IFX_EXTERN void IfxMultican_MsgObj_deinit | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_MsgObjId | msgObjId
 | ) |  |

Reset the message object
Append the message object to the end of idle list and reset message object registers.

Parameters
mcan | Specifies the CAN module
msgObjId | Specifies the message object index. Range = [0, IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
Returns
None

Definition at line 102 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_deinit(), and IfxMultican_deinit().

◆ IfxMultican_MsgObj_getBottomObjectPointer()

IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getBottomObjectPointer ( Ifx_CAN_MO * hwObj )

Gets bottom object pointer of the base message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
Bottom message object number

Definition at line 1180 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_readMessage(), and IfxMultican_Can_MsgObj_sendMessage().

◆ IfxMultican_MsgObj_getDataLengthCode()

IFX_INLINE IfxMultican_DataLengthCode IfxMultican_MsgObj_getDataLengthCode ( Ifx_CAN_MO * hwObj )

Gets data length code of a message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
CAN frame data length code

Definition at line 1186 of file IfxMultican.h.

Referenced by IfxMultican_MsgObj_doReadLongFrame(), and IfxMultican_MsgObj_doReadMessage().

◆ IfxMultican_MsgObj_getMessageId()

IFX_INLINE uint32 IfxMultican_MsgObj_getMessageId ( Ifx_CAN_MO * hwObj )

Gets message identifier of message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
messageId

Definition at line 1192 of file IfxMultican.h.

Referenced by IfxMultican_MsgObj_doReadLongFrame(), and IfxMultican_MsgObj_doReadMessage().

◆ IfxMultican_MsgObj_getNextObjectPointer()

IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getNextObjectPointer ( Ifx_CAN_MO * hwObj )

Returns next object pointer (PNEXT) of the current message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
Next message object number

Definition at line 1200 of file IfxMultican.h.

◆ IfxMultican_MsgObj_getPendingId()

IFX_EXTERN IfxMultican_MsgObjId IfxMultican_MsgObj_getPendingId | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_MsgObjGroup | msgObjGroup
 | ) |  |

Get message object ID which has TX/RX pending flag from a message object group.

Parameters
mcan | Specifies the CAN module
msgObjGroup | Message object group
Returns
Message object index

Definition at line 214 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_getPendingId().

◆ IfxMultican_MsgObj_getPointer()

IFX_INLINE Ifx_CAN_MO * IfxMultican_MsgObj_getPointer | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_MsgObjId | msgObjId
 | ) |  |

Get base address of a message object register.

Parameters
mcan | Specifies the CAN module
msgObjId | Specifies the message object index. Range = [0, IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
Returns
Pointer to Message Object registers

Definition at line 1206 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_cancelSend(), IfxMultican_Can_MsgObj_clearRxPending(), IfxMultican_Can_MsgObj_clearTxPending(), IfxMultican_Can_MsgObj_getConfig(), IfxMultican_Can_MsgObj_getStatus(), IfxMultican_Can_MsgObj_init(), IfxMultican_Can_MsgObj_isRxPending(), IfxMultican_Can_MsgObj_isTransmitRequested(), IfxMultican_Can_MsgObj_isTxPending(), IfxMultican_Can_MsgObj_readMessage(), IfxMultican_Can_MsgObj_sendMessage(), IfxMultican_MsgObj_deinit(), IfxMultican_MsgObj_doReadLongFrame(), IfxMultican_MsgObj_readLongFrame(), and IfxMultican_MsgObj_sendLongFrame().

◆ IfxMultican_MsgObj_getStatus()

IFX_EXTERN IfxMultican_MsgObjStat IfxMultican_MsgObj_getStatus ( Ifx_CAN_MO * hwObj )

Get the message object status.

Parameters
hwObj Pointer to CAN message object registers
Returns
IfxMultican_MsgObjStat bitfield

Definition at line 229 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_getStatus(), IfxMultican_MsgObj_isRxPending(), IfxMultican_MsgObj_isTransmitRequested(), and IfxMultican_MsgObj_isTxPending().

◆ IfxMultican_MsgObj_getStatusFlag()

IFX_EXTERN boolean IfxMultican_MsgObj_getStatusFlag | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_MsgObjStatusFlag | flag
 | ) |  |

Gets the status of the selected status flag of a message object.

Parameters
hwObj | Pointer to CAN message object registers
flag | Message Object status flag
Returns
Status (TRUE / FALSE)

Definition at line 239 of file IfxMultican.c.

◆ IfxMultican_MsgObj_isExtendedFrame()

IFX_INLINE boolean IfxMultican_MsgObj_isExtendedFrame ( Ifx_CAN_MO * hwObj )

Get the message object status.

Parameters
hwObj Pointer to CAN message object registers
Returns
Extended frame: True Standard frame: False

Definition at line 1212 of file IfxMultican.h.

Referenced by IfxMultican_MsgObj_sendLongFrame(), IfxMultican_MsgObj_sendMessage(), and IfxMultican_MsgObj_writeTxfifo().

◆ IfxMultican_MsgObj_isRxPending()

IFX_INLINE boolean IfxMultican_MsgObj_isRxPending ( Ifx_CAN_MO * hwObj )

Returns the RX pending flag of a message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
TRUE of the RX pending flag of a message object is set

Definition at line 1218 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_isRxPending().

◆ IfxMultican_MsgObj_isTransmitRequested()

IFX_INLINE boolean IfxMultican_MsgObj_isTransmitRequested ( Ifx_CAN_MO * hwObj )

Returns the TX Request flag of a message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
TRUE of the TX Request flag of a message object is set

Definition at line 1225 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_isTransmitRequested().

◆ IfxMultican_MsgObj_isTxPending()

IFX_INLINE boolean IfxMultican_MsgObj_isTxPending ( Ifx_CAN_MO * hwObj )

Returns the TX pending flag of a message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
TRUE of the TX pending flag of a message object is set

Definition at line 1232 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_isTxPending().

◆ IfxMultican_MsgObj_readLongFrame()

IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_readLongFrame | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_MsgObjId | msgObjId,
 |  | IfxMultican_Message * | msg,
 |  | uint32 * | data
 | ) |  |

Read a received CAN long frame.

Parameters
mcan | Specifies the CAN module
msgObjId | Specifies the message object index. Range = [0, IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
msg | The message which should be initialized
data | Pointer to data (in words)
Returns
IfxMultican_Status_newData: if the operation was successful
IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully
IfxMultican_Status_messageLost: if the message lost and new data is not yet ready
IfxMultican_Status_receiveEmpty: if no message is been received

Definition at line 247 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_readLongFrame().

◆ IfxMultican_MsgObj_readMessage()

IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_readMessage | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_Message * | msg
 | ) |  |

Read a received CAN message.

Parameters
hwObj | Pointer to CAN message object registers
msg | This parameter is filled in by the function with the received message. Also when reading is not successful.
Returns
IfxMultican_Status_newData: if the operation was successful
IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully
IfxMultican_Status_messageLost: if the message lost and new data is not yet ready
IfxMultican_Status_receiveEmpty: if no message is been received

Definition at line 309 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_readMessage().

◆ IfxMultican_MsgObj_sendLongFrame()

IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_sendLongFrame | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_MsgObjId | msgObjId,
 |  | IfxMultican_Message * | msg,
 |  | uint32 * | data
 | ) |  |

Send a CAN Long frame message.

Parameters
mcan | Specifies the CAN module
msgObjId | Specifies the message object index. Range = [0, IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
msg | The message which should be initialized
data | Pointer to data (in words)
Returns
IfxMultican_Status_ok: if the operation was successful IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy

Definition at line 361 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_sendLongFrame().

◆ IfxMultican_MsgObj_sendMessage()

IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_sendMessage | ( | Ifx_CAN_MO * | hwObj,
 |  | const IfxMultican_Message * | msg
 | ) |  |

Send a CAN message.

Parameters
hwObj | Pointer to CAN message object registers
msg | Specifies the message to be send
Returns
IfxMultican_Status_ok: if the operation was successful IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy

Definition at line 481 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_sendMessage().

◆ IfxMultican_MsgObj_setAcceptanceMask()

IFX_INLINE void IfxMultican_MsgObj_setAcceptanceMask | ( | Ifx_CAN_MO * | hwObj,
 |  | uint32 | mask,
 |  | boolean | extendedFrame
 | ) |  |

Sets acceptance mask for the message identifier.

Parameters
hwObj | Pointer to CAN message object registers
mask | Acceptance Mask for the message identifier
extendedFrame | Extended frame enabled / disabled
Returns
None

Definition at line 1239 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setBitRateSwitch()

IFX_INLINE void IfxMultican_MsgObj_setBitRateSwitch | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable bit rate switch of a message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1245 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init(), and IfxMultican_MsgObj_sendLongFrame().

◆ IfxMultican_MsgObj_setBottomObjectPointer()

IFX_INLINE void IfxMultican_MsgObj_setBottomObjectPointer | ( | Ifx_CAN_MO * | hwObj,
 |  | sint32 | objNumber
 | ) |  |

Sets bottom object pointer of the base message object.

Parameters
hwObj | Pointer to CAN message object registers
objNumber | Bottom message object number
Returns
None

Definition at line 1251 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setCurrentObjectPointer()

IFX_INLINE void IfxMultican_MsgObj_setCurrentObjectPointer | ( | Ifx_CAN_MO * | hwObj,
 |  | sint32 | objNumber
 | ) |  |

Sets bottom current pointer of the base message object.

Parameters
hwObj | Pointer to CAN message object registers
objNumber | Current message object number
Returns
None

Definition at line 1257 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setDataCopy()

IFX_INLINE void IfxMultican_MsgObj_setDataCopy | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable data copy of a gateway source message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1263 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setDataLengthCode()

IFX_INLINE void IfxMultican_MsgObj_setDataLengthCode | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_DataLengthCode | code
 | ) |  |

Sets data length code of a message object.

Parameters
hwObj | Pointer to CAN message object registers
code | CAN frame data length code
Returns
None

Definition at line 1269 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init(), IfxMultican_MsgObj_sendLongFrame(), IfxMultican_MsgObj_sendMessage(), and IfxMultican_MsgObj_writeTxfifo().

◆ IfxMultican_MsgObj_setDataLengthCodeCopy()

IFX_INLINE void IfxMultican_MsgObj_setDataLengthCodeCopy | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable data length code copy of a gateway source message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1275 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setExtendedDataLength()

IFX_INLINE void IfxMultican_MsgObj_setExtendedDataLength | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable extended data length of a message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1281 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setFilter()

IFX_EXTERN void IfxMultican_MsgObj_setFilter | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | extend,
 |  | uint32 | id,
 |  | uint32 | accMask
 | ) |  |

Set message object filter.

Parameters
hwObj | Pointer to CAN message object registers
extend | TRUE/FALSE : extended ID
id | ID
accMask | acceptance mask
Returns
None

Definition at line 581 of file IfxMultican.c.

◆ IfxMultican_MsgObj_setGatewayDataFrameSend()

IFX_INLINE void IfxMultican_MsgObj_setGatewayDataFrameSend | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable gateway data frame send of a gateway source message object which in turn sets the TXRQ of the gateway deatination object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1287 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setIdentifierCopy()

IFX_INLINE void IfxMultican_MsgObj_setIdentifierCopy | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable identifier copy of a gateway source message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1293 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setIdentifierExtension()

IFX_INLINE void IfxMultican_MsgObj_setIdentifierExtension | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | extension
 | ) |  |

Sets identifier extension of message object.

Parameters
hwObj | Pointer to CAN message object registers
extension | Acceptance Mask for the message IDE bit
Returns
None

Definition at line 1299 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setMatchingId()

IFX_INLINE void IfxMultican_MsgObj_setMatchingId | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | matchingId
 | ) |  |

Sets acceptance mask for the message IDE bit.

Parameters
hwObj | Pointer to CAN message object registers
matchingId | Acceptance Mask for the message IDE bit
Returns
None

Definition at line 1305 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setMessageId()

IFX_INLINE void IfxMultican_MsgObj_setMessageId | ( | Ifx_CAN_MO * | hwObj,
 |  | uint32 | messageId,
 |  | boolean | extendedFrame
 | ) |  |

Sets message identifier of message object.

Parameters
hwObj | Pointer to CAN message object registers
messageId | CAN Identifier of message object
extendedFrame | Extended frame enabled / disabled
Returns
None

Definition at line 1311 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init(), IfxMultican_MsgObj_sendLongFrame(), IfxMultican_MsgObj_sendMessage(), and IfxMultican_MsgObj_writeTxfifo().

◆ IfxMultican_MsgObj_setMessageMode()

IFX_INLINE void IfxMultican_MsgObj_setMessageMode | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_MsgObjMode | mode
 | ) |  |

Sets the message mode of a message object.

Parameters
hwObj | Pointer to CAN message object registers
mode | CAN Message Object Mode
Returns
None

Definition at line 1317 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setMessagePendingNumber()

IFX_INLINE void IfxMultican_MsgObj_setMessagePendingNumber | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_MsgObjId | messageNumber
 | ) |  |

Sets message pending number that selects the bit position of the bit in the Message Pending Register
that is set upon a message object n receive/transmit interrupt.

Parameters
hwObj | Pointer to CAN message object registers
messageNumber | Message pending number
Returns
None

Definition at line 1323 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setOverflowInterrupt()

IFX_INLINE void IfxMultican_MsgObj_setOverflowInterrupt | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable overflow interrupt of a message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1329 of file IfxMultican.h.

◆ IfxMultican_MsgObj_setPriorityClass()

IFX_INLINE void IfxMultican_MsgObj_setPriorityClass | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_Priority | priority
 | ) |  |

Sets priority class of message object.

Parameters
hwObj | Pointer to CAN message object registers
priority | One of the priority classes 0, 1, 2, 3 to message object n
Returns
None

Definition at line 1335 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setReceiveInterrupt()

IFX_INLINE void IfxMultican_MsgObj_setReceiveInterrupt | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable receive interrupt of a message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1341 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setReceiveInterruptNodePointer()

IFX_INLINE void IfxMultican_MsgObj_setReceiveInterruptNodePointer | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_SrcId | srcId
 | ) |  |

Sets receive interrupt node pointer of message object.

Parameters
hwObj | Pointer to CAN message object registers
srcId | Service request ID
Returns
None

Definition at line 1347 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setRemoteMonitoring()

IFX_INLINE void IfxMultican_MsgObj_setRemoteMonitoring | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable transmit object remote monitoring of a message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1353 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setSelectObjectPointer()

IFX_INLINE void IfxMultican_MsgObj_setSelectObjectPointer | ( | Ifx_CAN_MO * | hwObj,
 |  | sint32 | objNumber
 | ) |  |

Sets bottom object select pointer of the base message object.

Parameters
hwObj | Pointer to CAN message object registers
objNumber | Select message object number
Returns
None

Definition at line 1359 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setSingleDataTransfer()

IFX_INLINE void IfxMultican_MsgObj_setSingleDataTransfer | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable single data transfer of a message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1365 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setSingleTransmitTrial()

IFX_INLINE void IfxMultican_MsgObj_setSingleTransmitTrial | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable single transmit trial of a message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1371 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setStatusFlag()

IFX_EXTERN void IfxMultican_MsgObj_setStatusFlag | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_MsgObjStatusFlag | flag
 | ) |  |

Sets the selected status flag of a message object.

Parameters
hwObj | Pointer to CAN message object registers
flag | Message Object status flag
Returns
None

Definition at line 598 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_init(), IfxMultican_Can_MsgObj_sendMessage(), IfxMultican_MsgObj_sendLongFrame(), IfxMultican_MsgObj_sendMessage(), and IfxMultican_MsgObj_writeTxfifo().

◆ IfxMultican_MsgObj_setTopObjectPointer()

IFX_INLINE void IfxMultican_MsgObj_setTopObjectPointer | ( | Ifx_CAN_MO * | hwObj,
 |  | sint32 | objNumber
 | ) |  |

Sets top object pointer of the base message object.

Parameters
hwObj | Pointer to CAN message object registers
objNumber | Top message object number
Returns
None

Definition at line 1377 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setTransmitInterrupt()

IFX_INLINE void IfxMultican_MsgObj_setTransmitInterrupt | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable transmit interrupt of a message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1383 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setTransmitInterruptNodePointer()

IFX_INLINE void IfxMultican_MsgObj_setTransmitInterruptNodePointer | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_SrcId | srcId
 | ) |  |

Sets transmit interrupt node pointer of message object.

Parameters
hwObj | Pointer to CAN message object registers
srcId | Service request ID
Returns
None

Definition at line 1389 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_writeTxfifo()

IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_writeTxfifo | ( | Ifx_CAN_MO * | hwObj,
 |  | const IfxMultican_Message * | msg
 | ) |  |

Send a CAN message.

Parameters
hwObj | Pointer to CAN message object registers
msg | Specifies the message to be send
Returns
IfxMultican_Status_ok: if the operation was successful IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy

Definition at line 529 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_sendMessage().


iLLD_TC26B: Interrupts

Functions
Interrupts
iLLD » MULTICAN » Standard Driver
Collaboration diagram for Interrupts:

Functions

IFX_EXTERN volatile Ifx_SRC_SRCR * IfxMultican_getSrcPointer (Ifx_CAN *mcan, IfxMultican_SrcId srcId)
Get the interrupt source register. More...

Detailed Description

Function Documentation

◆ IfxMultican_getSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxMultican_getSrcPointer | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_SrcId | srcId
 | ) |  |

Get the interrupt source register.

Parameters
mcan | Specifies the CAN module
srcId | Specifies the service request ID
Returns
Address of the interrupt source register

Definition at line 1220 of file IfxMultican.c.

Referenced by IfxMultican_Can_initModule().


iLLD_TC26B: MULTICAN Pin Mapping

Data Structures | Macros | Variables
MULTICAN Pin Mapping
iLLD » MULTICAN
Collaboration diagram for MULTICAN Pin Mapping:

Data Structures

struct | IfxMultican_Rxd_In
RXD pin mapping structure. More...
struct | IfxMultican_Txd_Out
TXD pin mapping structure. More...

Macros

#define | IFXMULTICAN_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXMULTICAN_PINMAP_NUM_NODES 4
#define | IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS 5
#define | IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS 5

Variables

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN
CAN0_RXDA: CAN node 0 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN
CAN0_RXDB: CAN node 0 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN
CAN0_RXDD: CAN node 0 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN
CAN0_RXDE: CAN node 0 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN
CAN1_RXDA: CAN node 1 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN
CAN1_RXDB: CAN node 1 input Used for single pin DAP (SPD) function. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN
CAN1_RXDD: CAN node 1 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN
CAN2_RXDA: CAN node 2 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN
CAN2_RXDB: CAN node 2 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN
CAN2_RXDD: CAN node 2 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN
CAN2_RXDE: CAN node 2 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN
CAN3_RXDA: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN
CAN3_RXDB: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN
CAN3_RXDC: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN
CAN3_RXDD: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN
CAN3_RXDE: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT
CAN0_TXD: CAN node 0 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT
CAN0_TXD: CAN node 0 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT
CAN0_TXD: CAN node 0 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT
CAN0_TXD: CAN node 0 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT
CAN1_TXD: CAN node 1 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT
CAN1_TXD: CAN node 1 output Used for single pin DAP (SPD) function. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT
CAN1_TXD: CAN node 1 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT
CAN2_TXD: CAN node 2 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT
CAN2_TXD: CAN node 2 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT
CAN2_TXD: CAN node 2 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT
CAN2_TXD: CAN node 2 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN const IfxMultican_Rxd_In * | IfxMultican_Rxd_In_pinTable [IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS]
IfxMultican_Rxd_In table. More...
IFX_EXTERN const IfxMultican_Txd_Out * | IfxMultican_Txd_Out_pinTable [IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS]
IfxMultican_Txd_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxMultican_Rxd_In

struct IfxMultican_Rxd_In

RXD pin mapping structure.

Definition at line 56 of file IfxMultican_PinMap.h.

Collaboration diagram for IfxMultican_Rxd_In:
[legend]
Data Fields
Ifx_CAN * | module | Base address.
IfxMultican_NodeId | nodeId | Node ID.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxMultican_Txd_Out

struct IfxMultican_Txd_Out

TXD pin mapping structure.

Definition at line 65 of file IfxMultican_PinMap.h.

Collaboration diagram for IfxMultican_Txd_Out:
[legend]
Data Fields
Ifx_CAN * | module | Base address.
IfxMultican_NodeId | nodeId | Node ID.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXMULTICAN_PINMAP_NUM_MODULES

#define IFXMULTICAN_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 107 of file IfxMultican_PinMap.h.

◆ IFXMULTICAN_PINMAP_NUM_NODES

#define IFXMULTICAN_PINMAP_NUM_NODES 4

Definition at line 108 of file IfxMultican_PinMap.h.

◆ IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS

#define IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS 5

Definition at line 109 of file IfxMultican_PinMap.h.

◆ IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS

#define IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS 5

Definition at line 110 of file IfxMultican_PinMap.h.

Variable Documentation

◆ IfxMultican_RXD0A_P02_1_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN

CAN0_RXDA: CAN node 0 input.

Definition at line 73 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD0B_P20_7_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN

CAN0_RXDB: CAN node 0 input.

Definition at line 74 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD0D_P02_4_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN

CAN0_RXDD: CAN node 0 input.

Definition at line 75 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD0E_P33_7_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN

CAN0_RXDE: CAN node 0 input.

Definition at line 76 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD1A_P15_3_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN

CAN1_RXDA: CAN node 1 input.

Definition at line 77 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD1B_P14_1_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN

CAN1_RXDB: CAN node 1 input Used for single pin DAP (SPD) function.

Definition at line 78 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD1D_P00_1_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN

CAN1_RXDD: CAN node 1 input.

Definition at line 79 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD2A_P15_1_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN

CAN2_RXDA: CAN node 2 input.

Definition at line 80 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD2B_P02_3_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN

CAN2_RXDB: CAN node 2 input.

Definition at line 81 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD2D_P14_8_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN

CAN2_RXDD: CAN node 2 input.

Definition at line 82 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD2E_P10_2_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN

CAN2_RXDE: CAN node 2 input.

Definition at line 83 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD3A_P00_3_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN

CAN3_RXDA: CAN node 3 input.

Definition at line 84 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD3B_P32_2_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN

CAN3_RXDB: CAN node 3 input.

Definition at line 85 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD3C_P20_0_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN

CAN3_RXDC: CAN node 3 input.

Definition at line 86 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD3D_P11_10_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN

CAN3_RXDD: CAN node 3 input.

Definition at line 87 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD3E_P20_9_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN

CAN3_RXDE: CAN node 3 input.

Definition at line 88 of file IfxMultican_PinMap.h.

◆ IfxMultican_Rxd_In_pinTable

IFX_EXTERN const IfxMultican_Rxd_In* IfxMultican_Rxd_In_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS]

IfxMultican_Rxd_In table.

Definition at line 114 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD0_P02_0_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT

CAN0_TXD: CAN node 0 output.

Definition at line 89 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD0_P02_5_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT

CAN0_TXD: CAN node 0 output.

Definition at line 90 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD0_P20_8_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT

CAN0_TXD: CAN node 0 output.

Definition at line 91 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD0_P33_8_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT

CAN0_TXD: CAN node 0 output.

Definition at line 92 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD1_P00_0_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT

CAN1_TXD: CAN node 1 output.

Definition at line 93 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD1_P14_0_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT

CAN1_TXD: CAN node 1 output Used for single pin DAP (SPD) function.

Definition at line 94 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD1_P15_2_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT

CAN1_TXD: CAN node 1 output.

Definition at line 95 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD2_P02_2_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT

CAN2_TXD: CAN node 2 output.

Definition at line 96 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD2_P10_3_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT

CAN2_TXD: CAN node 2 output.

Definition at line 97 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD2_P14_10_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT

CAN2_TXD: CAN node 2 output.

Definition at line 98 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD2_P15_0_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT

CAN2_TXD: CAN node 2 output.

Definition at line 99 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD3_P00_2_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT

CAN3_TXD: CAN node 3 output.

Definition at line 100 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD3_P11_12_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT

CAN3_TXD: CAN node 3 output.

Definition at line 101 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD3_P20_10_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT

CAN3_TXD: CAN node 3 output.

Definition at line 102 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD3_P20_3_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT

CAN3_TXD: CAN node 3 output.

Definition at line 103 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD3_P32_3_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT

CAN3_TXD: CAN node 3 output.

Definition at line 104 of file IfxMultican_PinMap.h.

◆ IfxMultican_Txd_Out_pinTable

IFX_EXTERN const IfxMultican_Txd_Out* IfxMultican_Txd_Out_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS]

IfxMultican_Txd_Out table.

Definition at line 117 of file IfxMultican_PinMap.h.


iLLD_TC26B: How to use the CAN Interface driver?

How to use the CAN Interface driver?
iLLD » MULTICAN
Collaboration diagram for How to use the CAN Interface driver?:

The CAN interface driver provides a default configuration for various modes.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Multican/Can/IfxMultican_Can.h>

Variables

Declare the CAN handles as global variables in your C code:

// CAN handle
IfxMultican_Can can;
// Nodes handles
IfxMultican_Can_Node canSrcNode;
IfxMultican_Can_Node canDstNode;
// Message Object handles
IfxMultican_Can_MsgObj canSrcMsgObj;
IfxMultican_Can_MsgObj canDstMsgObj;
const unsigned id = 0x100;

Module Initialisation

The module initialisation can be done as followed: only module clock is supported for clock selection as of now

// create configuration
IfxMultican_Can_Config canConfig;
IfxMultican_Can_initModuleConfig(&canConfig, &MODULE_CAN);
// initialize module
// IfxMultican_Can can; // defined globally
IfxMultican_Can_initModule(&can, &canConfig);

Note: Application should explicitly configure the system DMA, if system DMA is selected as the service provider for the interrupt.

Node Initialisation

The Can nodes initialisation can be done as followed:

// create CAN node config
IfxMultican_Can_NodeConfig canNodeConfig;
IfxMultican_Can_Node_initConfig(&canNodeConfig, &can);
canNodeConfig.baudrate = 1000000; // 1 MBaud
// Source Node
// IfxMultican_Can_Node canSrcNode; // defined globally
{
canNodeConfig.nodeId = IfxMultican_NodeId_0;
canNodeConfig.rxPin = &IIfxMultican_RXD0B_P20_7_IN;
canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
canNodeConfig.txPin = &IfxMultican_TXD0_P20_8_OUT;
canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
// initialise the node
IfxMultican_Can_Node_init(&canSrcNode, &canNodeConfig);
}
// Destination Node
// IfxMultican_Can_Node canDstNode; // defined globally
{
canNodeConfig.nodeId = IfxMultican_NodeId_1;
canNodeConfig.rxPin = &IfxMultican_RXD1B_P14_1_IN;
canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
canNodeConfig.txPin = &IfxMultican_TXD1_P14_0_OUT;
canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
// initialise the node
IfxMultican_Can_Node_init(&canDstNode, &canNodeConfig);
}

Message Object Initialisation

The Can message objects initialisation can be done as followed:

// IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
// assigned message object:
canMsgObjConfig.msgObjId = 0;
canMsgObjConfig.messageId = id; // 'id' is defined globally
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_transmit;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
}
// IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
// assigned message object:
canMsgObjConfig.msgObjId = 1;
canMsgObjConfig.messageId = id;
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_receive;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
}

The MULTICAN is ready for use now!

Single Data Transfers

The CAN driver provides simple to use transfer functions

Data can be sent by the following way:

const unsigned dataLow = 0xC0CAC01A;
const unsigned dataHigh = 0xBA5EBA11;
// Initialise the message strcture
IfxMultican_Message txMsg;
IfxMultican_Message_init(&txMsg, id, dataLow, dataHigh, IfxMultican_DataLengthCode_8);
// Transmit Data
while( IfxMultican_Can_MsgObj_sendMessage(&canSrcMsgObj, &txMsg) == IfxMultican_Status_notSentBusy );

Data can be received by the following way:

// Receiving Data
// Initialise the message structure with dummy values, will be replaced by the received values
IfxMultican_Message rxMsg;
IfxMultican_Message_init(&rxMsg, 0xdead, 0xdeadbeef, 0xdeadbeef, IfxMultican_DataLengthCode_8); // start with invalid values
// wait until Multican received a new message
while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
// read message
IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readMessage(&canDstMsgObj, &rxMsg);
// if no new data is been received report an error
if( !( readStatus & IfxMultican_Status_newData ) ) {
clib_ver_printf("ERROR: IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
}
// if a new data is been received but one lost, report the status
if( readStatus == IfxMultican_Status_newDataButOneLost ) {
clib_ver_printf(" IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
}
// data now available at rxMsg.data[0] and rxMsg.data[1]

FIFO based Transfers

A transmit and receive FIFO can be enabled during the node configuration by specifing the number of allocated message objects with the canMsgObjConfig.msgObjCount item. and specifying the message object number of first slave object with the canMsgObjConfig.firstSlaveObjId item.

Message objects will be allocated to the FIFO in ascending order.

Here a configuration example:

//add the following defines to your code globally
#define FIFO_SIZE 16
#define FIFO_SIZE 8
// IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
// FIFO MsgObj allocation:
canMsgObjConfig.msgObjId = 0; // will allocate MsgObj 0
canMsgObjConfig.msgObjCount = FIFO_SIZE/2;
canMsgObjConfig.firstSlaveObjId = 1;
canMsgObjConfig.messageId = id; // 'id' defined gloabally
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_transmit;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
}
// IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
// FIFO MsgObj allocation:
canMsgObjConfig.msgObjId = FIFO_SIZE + 1; // avoid clashing with transmit FIFO message objects
canMsgObjConfig.msgObjCount = FIFO_SIZE;
canMsgObjConfig.firstSlaveObjId = FIFO_SIZE + 2;
canMsgObjConfig.messageId = id; // 'id' defined gloabally
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_receive;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
}

Data can now be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).

here is a transmit example

IfxMultican_Message txMsg;
for (i = 0; i < FIFO_SIZE; ++i)
{
// Transmit Data from the source message object //
IfxMultican_Message_init(&txMsg, id, dataLow + i, dataHigh + i, IfxMultican_DataLengthCode_8);
while( IfxMultican_Can_MsgObj_sendMessage(&canSrcMsgObj, &txMsg) == IfxMultican_Status_notSentBusy );
}

data can be read by the following way

IfxMultican_Message rxMsg;
for (i = 0; i < FIFO_SIZE; ++i)
{
// Receiving Data, read the data from the destination receive Fifo //
// wait until MCAN received the frame
// wait until Multican received a new message
while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
IfxMultican_Message_init(&rxMsg, 0xdead, 0xdeadbeef, 0xdeadbeef, IfxMultican_DataLengthCode_8); // start with invalid values
IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readMessage(&canDstMsgObj, &rxMsg);
}

CAN FD Data Transfers

The CAN driver provides simple to use FD transfer functions After initialising the module, choose the node initialisation as the following Node configuration:

// create CAN node config
IfxMultican_Can_NodeConfig canNodeConfig;
IfxMultican_Can_Node_initConfig(&canNodeConfig, &can);
canNodeConfig.baudrate = 1000000; // 1 MBaud
// Source Node
// IfxMultican_Can_Node canSrcNode; // defined globally
{
canNodeConfig.nodeId = IfxMultican_NodeId_0;
canNodeConfig.rxPin = &IfxMultican_RXD0B_P20_7_IN;
canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
canNodeConfig.txPin = &IfxMultican_TXD0_P20_8_OUT;
canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
// choose CAN FD transfer enable or disable //
canNodeConfig.flexibleDataRate = TRUE;
// if CAN FD enabled choose the FD configuration //
canNodeConfig.fdConfig.nominalBaudrate = 500000;
canNodeConfig.fdConfig.nominalSynchJumpWidth = 8000;
canNodeConfig.fdConfig.nominalSamplePoint = 2000;
canNodeConfig.fdConfig.fastBaudrate = 1000000;
canNodeConfig.fdConfig.fastSynchJumpWidth = 8000;
canNodeConfig.fdConfig.fastSamplePoint = 2000;
canNodeConfig.fdConfig.loopDelayOffset = 0;
// initialise the node
IfxMultican_Can_Node_init(&canSrcNode, &canNodeConfig);
}
// Destination Node
// IfxMultican_Can_Node canDstNode; // defined globally
{
canNodeConfig.nodeId = IfxMultican_NodeId_1;
canNodeConfig.rxPin = IfxMultican_RXD1B_P14_1_IN;
canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
canNodeConfig.txPin = IfxMultican_TXD1_P14_0_OUT;
canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
// choose CAN FD transfer enable or disable //
config->flexibleDataRate = TRUE;
// if CAN FD enabled choose the FD configuration //
canNodeConfig.fdConfig.nominalBaudrate = 500000;
canNodeConfig.fdConfig.nominalSynchJumpWidth = 8000;
canNodeConfig.fdConfig.nominalSamplePoint = 2000;
canNodeConfig.fdConfig.fastBaudrate = 1000000;
canNodeConfig.fdConfig.fastSynchJumpWidth = 8000;
canNodeConfig.fdConfig.fastSamplePoint = 2000;
canNodeConfig.fdConfig.loopDelayOffset = 0;
// initialise the node
IfxMultican_Can_Node_init(&canDstNode, &canNodeConfig);
}

The CAN FD message objects initialisation can be done as followed:

// IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
// assigned message object:
canMsgObjConfig.msgObjId = 0;
canMsgObjConfig.messageId = id; // 'id' defined gloabally
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_transmit;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_64;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
canMsgObjConfig.control.topMsgObjId = 250;
canMsgObjConfig.control.bottomMsgObjId = 251;
canMsgObjConfig.control.fastBitRate = FALSE; // fast bit rate enable/disable
// initialize message object
IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
}
// IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
// assigned message object:
canMsgObjConfig.msgObjId = 1;
canMsgObjConfig.messageId = id;
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_receive;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_64;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
canMsgObjConfig.control.topMsgObjId = 252;
canMsgObjConfig.control.bottomMsgObjId = 253;
canMsgObjConfig.control.fastBitRate = FALSE; // fast bit rate enable/disable
// initialize message object
IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
}

In case of standard messages, data can be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).

In case of long frames of length more than 8 bytes the data can be sent in the following way

// load txData buffer with the data that needs to be send
// txData is assumed to be declared globally
int i;
for (i = 0; i < 16; ++i)
{
// uint32 txData[16]; // defined globally
txData[i] = (0x11110000 + i);
}
// Initialise the message strcture
IfxMultican_Message txMsg;
IfxMultican_Message_longFrameInit(&txMsg, id, IfxMultican_DataLengthCode_64, FALSE);
// Transmit Data
while( IfxMultican_Can_MsgObj_sendlongFrame(&canSrcMsgObj, &txMsg, txData) == IfxMultican_Status_notSentBusy );

You can recieve the data by the following way

// Receiving Data
// Initialise the message strcture with dummy values, will be replaced by the received values
IfxMultican_Message rxMsg;
IfxMultican_Message_longFrameInit(&rxMsg, 0xdead, IfxMultican_DataLengthCode_64, FALSE); // start with invalid values
// wait until Multican received a new message
while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
// read the message
//uint32 rxData[16]; //defined globally
IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readLongFrame(&canDstMsgObj, &rxMsg, rxData);
// if no new data is been received report an error
if( !( readStatus & IfxMultican_Status_newData ) ) {
clib_ver_printf("ERROR: IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
}
// if a new data is been received but one lost, report the status
if( readStatus == IfxMultican_Status_newDataButOneLost ) {
clib_ver_printf(" IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
}
// clear pending flag
IfxMultican_Can_MsgObj_clearRxPending(&canDstMsgObj);
// data will be available at rxData

Gateway Transfers

After initialising th emodule and nodes, the gateway message objects can be initialised in the following way

A Gateway transfers can be enabled during the message object configuration by specifing with the canMsgObjConfig.gatewayTransfersEnable item.

Here a configuration example:

// source message object
// IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
canMsgObjConfig.msgObjId = 0;
canMsgObjConfig.messageId = id; // 'id' defined globally
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_transmit;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
canMsgObjConfig.gatewayTransfers = FALSE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
}
// gateway source message object //
// data will be received into this object from SrcObj, and then copied into gateway destination object //
IfxMultican_Can_MsgObj canGatewaySrcMsgObj;
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
canMsgObjConfig.msgObjId = 1;
canMsgObjConfig.messageId = id;
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_receive;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
canMsgObjConfig.gatewayTransfers = TRUE;
canMsgObjConfig.gatewayConfig.copyDataLengthCode = TRUE;
canMsgObjConfig.gatewayConfig.copyData = TRUE;
canMsgObjConfig.gatewayConfig.copyId = FALSE;
canMsgObjConfig.gatewayConfig.enableTransmit = TRUE; // if this is not choosen, then no need to initialise canDstMsgObj to read the final data
canMsgObjConfig.gatewayConfig.gatewayDstObjId = 3; // specify the destination object number
// initialize message object
IfxMultican_Can_MsgObj_init(&canGatewaySrcMsgObj, &canMsgObjConfig);
}
// gateway destination object //
// data, id , datlength code will be copied from GatewaySrcObj into this object through gateway transfers //
// and then sent onto the bus for sending the message to destination message object //
IfxMultican_Can_MsgObj canGatewayDstMsgObj;
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
canMsgObjConfig.msgObjId = 3;
canMsgObjConfig.messageId = 0x200;
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_transmit;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
canMsgObjConfig.gatewayTransfers = FALSE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canGatewayDstMsgObj, &canMsgObjConfig);
}
// destination message object, not needed if enableTransmit is not chosen in gateway source object, or you don't want to read the data//
// data will be received from GatewayDstObj into this obj //
// IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
canMsgObjConfig.msgObjId = 10;
canMsgObjConfig.messageId = 0x200;
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_receive;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = FALSE;
canMsgObjConfig.gatewayTransfers = FALSE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
}

Data can now be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).

The data flow is as followed,

Data will be sent from the source object (canSrcMsgObj), it will be received by the gateway source object (canGatewaySrcMsgObj). and then gets copied into the gateway destination object (canGatewayDstMsgObj) without CPU intervention,

If GDFS is selected in gateway source object (canGatewaySrcMsgObj)then, the data will be transmitted from gateway destination object(canGatewayDstMsgObj) to the destination object (canDstMsgObj)

Gateway FIFO based Transfers

After initialising the module and nodes,

A gateway FIFO transfers can be enabled during the node configuration by specifing the number of allocated message objects with the canMsgObjConfig.msgObjCount item. and enbling the gateway transfers with the canMsgObjConfig.gatewayTransfersEnable item. and also by selecting the start object of the FIFO with the canMsgObjConfig.firstSlaveObjId item.

Message objects will be allocated to the gateway FIFO in ascending order. Here a configuration example:

// source message object, you can even make it as a Tx FIFO
// IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
canMsgObjConfig.msgObjId = 0;
canMsgObjConfig.messageId = id;
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_transmit;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
canMsgObjConfig.gatewayTransfers = FALSE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
}
// gateway source Fifo //
// data will be received into this object from SrcObj, and then copied into gateway Fifo objects //
IfxMultican_Can_MsgObj canGatewaySrcMsgObj;
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
canMsgObjConfig.msgObjId = 1;
canMsgObjConfig.messageId = id;
canMsgObjConfig.msgObjCount = 4; // FIFO
canMsgObjConfig.firstSlaveObjId = 2; // will allocate MsgObj 2..5 for the gateway FIFO
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_receive;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
canMsgObjConfig.gatewayTransfers = TRUE; // gateway FIFO
canMsgObjConfig.gatewayConfig.copyDataLengthCode = TRUE;
canMsgObjConfig.gatewayConfig.copyData = TRUE;
canMsgObjConfig.gatewayConfig.copyId = FALSE;
canMsgObjConfig.gatewayConfig.enableTransmit = TRUE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canGatewaySrcMsgObj, &canMsgObjConfig);
}
int i = 0;
for (i = 0; i < 4 ; ++i)
{
// gateway destination objects //
// data, id , datlength code will be copied from GatewaySrcObj into this object through gateway transfers //
// and then sent onto the bus for sending the message to destination receive Fifo message objects //
IfxMultican_Can_MsgObj canGatewayDstMsgObj;
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
canMsgObjConfig.msgObjId = 2 + i;
canMsgObjConfig.messageId = 0x200;
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_transmit;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = FALSE;
canMsgObjConfig.gatewayTransfers = FALSE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canGatewayDstMsgObj, &canMsgObjConfig);
}
}
// destination receive Fifo,
// data will be received from GatewayDstObj into this Fifo //
// IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
canMsgObjConfig.msgObjId = 10;
canMsgObjConfig.messageId = 0x200;
canMsgObjConfig.msgObjCount = 4; // receive FIFO
canMsgObjConfig.firstSlaveObjId = 11; // will allocate MsgObj 11..14 for the receive FIFO
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_receive;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = FALSE;
canMsgObjConfig.gatewayTransfers = FALSE;
canMsgObjConfig.firstSlaveObjId = 11;
// initialize message object
IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
}

Data can now be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above). here is a transmit example

for (i = 0; i < 4; ++i)
{
// Transmit Data from the source message object //
IfxMultican_Message txMsg;
IfxMultican_Message_init(&txMsg, id, dataLow + i, dataHigh + i, IfxMultican_DataLengthCode_8);
while( IfxMultican_Can_MsgObj_sendMessage(&canSrcMsgObj, &txMsg) == IfxMultican_Status_notSentBusy );
}

The data flow is as followed,

data will be sent from the source object (canSrcMsgObj) or source TX FIFO, it will be received by the gateway source FIFO (canGatewaySrcMsgObj). and then gets copied into the gateway destination objects (canGatewayDstMsgObj) without CPU intervention,

If GDFS is selected in gateway source object (FIFO) (canGatewaySrcMsgObj)then, the data will be transmitted from gateway destination objects (canGatewayDstMsgObj) to the destination objects or receive FIFO (canDstMsgObj)

data can be read by the following way

for (i = 0; i < 4; ++i)
{
// Receiving Data, read the data from the destination receive Fifo //
// wait until MCAN received the frame
// wait until Multican received a new message
while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
IfxMultican_Message rxMsg;
IfxMultican_Message_init(&rxMsg, 0xdead, 0xdeadbeef, 0xdeadbeef, IfxMultican_DataLengthCode_8); // start with invalid values
IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readMessage(&canDstMsgObj, &rxMsg);
// if no new data is been received report an error
if( !( readStatus & IfxMultican_Status_newData ) ) {
clib_ver_printf("ERROR: IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
}
// if a new data is been received but one lost, report the status
if( readStatus == IfxMultican_Status_newDataButOneLost ) {
clib_ver_printf(" IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
}
}


iLLD_TC26B: CAN

Modules
CAN
iLLD » MULTICAN
Collaboration diagram for CAN:

Modules

Data structures
General functions
CAN Nodes
Message Objects
Interrupts

Detailed Description


iLLD_TC26B: Data structures

Data Structures
Data structures
iLLD » MULTICAN » CAN
Collaboration diagram for Data structures:

Data Structures

struct | IfxMultican_Can_FdConfig
Structure for CAN FD configuration. More...
struct | IfxMultican_Can_GatewayConfig
Structure for gateway configuration. More...
struct | IfxMultican_Can_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxMultican_Can_InterruptSource
Structure for interrupt source. More...
struct | IfxMultican_Can_MsgObjControl
Message object control. More...
struct | IfxMultican_Can_Node
CAN node handle data structure. More...
struct | IfxMultican_Can
CAN handle data structure. More...
struct | IfxMultican_Can_Config
CAN module configuration. More...
struct | IfxMultican_Can_MsgObj
CAN message object handle data structure. More...
struct | IfxMultican_Can_MsgObjConfig
CAN message object configuration. More...
struct | IfxMultican_Can_NodeConfig
CAN Node configuration. More...

Detailed Description

Data Structure Documentation

◆ IfxMultican_Can_FdConfig

struct IfxMultican_Can_FdConfig

Structure for CAN FD configuration.

Definition at line 782 of file IfxMultican_Can.h.

Data Fields
uint32 | fastBaudrate | Specifies the FD fast baudrate (Data Bit rate)
uint16 | fastSamplePoint | Specifies the FD fast sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
uint16 | fastSynchJumpWidth | Specifies the FD fast resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total fast bit time.
uint16 | loopDelayOffset | Specifies the transceiver delay ompensation offset that is added to the measured transceiver delay. Range = [0, 15].
uint32 | nominalBaudrate | Specifies the FD nominal baudrate (Nominal Bit Rate)
uint16 | nominalSamplePoint | Specifies the FD nominal sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
uint16 | nominalSynchJumpWidth | Specifies the FD nominal resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total nominal bit time.

◆ IfxMultican_Can_GatewayConfig

struct IfxMultican_Can_GatewayConfig

Structure for gateway configuration.

Definition at line 795 of file IfxMultican_Can.h.

Data Fields
uint32 | copyData: 1 | Specifies the choice for copying data (data low and data high)
uint32 | copyDataLengthCode: 1 | Specifies the choice for copying data length code.
uint32 | copyId: 1 | Specifies the choice for copying id of the message.
uint32 | enableTransmit: 1 | Specifies the enable choice of TXRQ in the destination gateway object (GDFS of source gateway object)
IfxMultican_MsgObjId | gatewayDstObjId | Message object number of first slave object (bottom pointer)

◆ IfxMultican_Can_InterruptConfig

struct IfxMultican_Can_InterruptConfig

Structure for interrupt configuration.

Definition at line 806 of file IfxMultican_Can.h.

Data Fields
uint16 | priority | interrupt priority
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxMultican_Can_InterruptSource

struct IfxMultican_Can_InterruptSource

Structure for interrupt source.

Definition at line 814 of file IfxMultican_Can.h.

Data Fields
boolean | enabled | If true, enables the interrupt generation.
IfxMultican_SrcId | srcId | interrupt node pointer used

◆ IfxMultican_Can_MsgObjControl

struct IfxMultican_Can_MsgObjControl

Message object control.

Definition at line 822 of file IfxMultican_Can.h.

Data Fields
IfxMultican_MsgObjId | bottomMsgObjId | Specifies the ID of the message object with data byte 36 to 63. (CAN FD)
uint32 | extendedFrame: 1 | Specifies the standard / extended frame mode. 0: standard frame 11 bit ID; 1: extended frame 29 bit ID.
uint32 | fastBitRate: 1 | Specifies the bit rate switch. 0: nominal bit rate ; 1: fast bit rate.
uint32 | matchingId: 1 | Specifies the acceptance mask. 0: standard & extended frame (11 & 29 bit); 1: only frames with maching IDE.
IfxMultican_DataLengthCode | messageLen | Specifies the length of the transmited data (number of bytes). This value is ignored for receive object.
uint32 | singleDataTransfer: 1 | Specifies the single data transfer option. If 1, single data transfer is selected.
uint32 | singleTransmitTrial: 1 | Specifies the single transmit trial option. If 1, single transmit trial is selected.
IfxMultican_MsgObjId | topMsgObjId | Specifies the ID of the message object with data byte 8 to 35. (CAN FD)

◆ IfxMultican_Can_Node

struct IfxMultican_Can_Node

CAN node handle data structure.

Definition at line 836 of file IfxMultican_Can.h.

Data Fields
boolean | fastNode | CAN FD fast node enable/disable.
Ifx_CAN * | mcan | Specifies the pointer to the MULTICAN module registers.
Ifx_CAN_N * | node | Specifies the pointer to the MULTICAN node registers.
IfxMultican_NodeId | nodeId | Specifies the node Id.

◆ IfxMultican_Can

struct IfxMultican_Can

CAN handle data structure.

Definition at line 850 of file IfxMultican_Can.h.

Data Fields
Ifx_CAN * mcan Specifies the pointer to the MULTICAN module registers.

◆ IfxMultican_Can_Config

struct IfxMultican_Can_Config

CAN module configuration.

Definition at line 857 of file IfxMultican_Can.h.

Collaboration diagram for IfxMultican_Can_Config:
[legend]
Data Fields
IfxMultican_ClockSelect | clockSelect | Selected module input clock.
Ifx_CAN * | module | pointer to MULTICAN module
float32 | moduleFreq | Required module frequency in Hertz.
IfxMultican_Can_InterruptConfig | nodePointer[IFXMULTICAN_NUM_SRC] | Node pointer configuration.

◆ IfxMultican_Can_MsgObj

struct IfxMultican_Can_MsgObj

CAN message object handle data structure.

Definition at line 867 of file IfxMultican_Can.h.

Collaboration diagram for IfxMultican_Can_MsgObj:
[legend]
Data Fields
IfxMultican_MsgObjId | fifoPointer | Pointer for FIFO based transfers.
uint16 | msgObjCount | Number of message object sto be initialised (1 for standard Msg Obj and no. of objects including base object for FIFO transfers)
IfxMultican_MsgObjId | msgObjId | Specifies the message object ID.
IfxMultican_Can_Node * | node | Specifies the pointer to the node handle.

◆ IfxMultican_Can_MsgObjConfig

struct IfxMultican_Can_MsgObjConfig

CAN message object configuration.

Definition at line 877 of file IfxMultican_Can.h.

Collaboration diagram for IfxMultican_Can_MsgObjConfig:
[legend]
Data Fields
uint32 | acceptanceMask | Specifies the acceptance mask.
IfxMultican_Can_MsgObjControl | control | Message object control.
IfxMultican_MsgObjId | firstSlaveObjId | Message object number of first slave object (bottom pointer)
IfxMultican_Frame | frame | Specifies the frame type.
IfxMultican_Can_GatewayConfig | gatewayConfig | Structure for gateway configuration.
uint32 | gatewayTransfers: 1 | Specifies the gateway source object (gateway transfres enable / disable choice)
uint32 | messageId | Specifies the message ID.
uint16 | msgObjCount | Number of message object sto be initialised (1 for standard Msg Obj and no. of objects including base object for FIFO transfers)
IfxMultican_MsgObjId | msgObjId | Specifies the message object ID.
IfxMultican_Can_Node * | node | Specifies the pointer to the node handle.
IfxMultican_Priority | priority | Specifies the message object priority.
IfxMultican_Can_InterruptSource | rxInterrupt | Rx Interrupt configuration.
IfxMultican_Can_InterruptSource | txInterrupt | Tx Interrupt configuration.

◆ IfxMultican_Can_NodeConfig

struct IfxMultican_Can_NodeConfig

CAN Node configuration.

Definition at line 896 of file IfxMultican_Can.h.

Collaboration diagram for IfxMultican_Can_NodeConfig:
[legend]
Data Fields
IfxMultican_Can_InterruptSource | alertInterrupt | Alert interrupt.
boolean | analyzerMode | Specifies the analizer mode. If TRUE then the CAN Node works in analizer mode.
uint32 | baudrate | Specifies the baudrate.
uint8 | errorWarningLevel | Specifies the error warinig level.
IfxMultican_Can_FdConfig | fdConfig | Specifies CAN FD configuration.
boolean | flexibleDataRate | CANFD enable/disable.
IfxMultican_Can_InterruptSource | frameCounterInterrupt | Frame counter interrupt.
IfxMultican_Can_InterruptSource | lastErrorCodeInterrupt | Last error code interrupt.
boolean | loopBackMode | Specifies the loop back mode. If TRUE then the CAN Node works in loop back mode.
Ifx_CAN * | module | pointer to MULTICAN module
IfxMultican_NodeId | nodeId | Specifies the node Id.
IfxPort_PadDriver | pinDriver |
IfxMultican_Rxd_In * | rxPin | Specifies the receive pin.
IfxPort_InputMode | rxPinMode | Specifies the receive pin as input mode.
uint16 | samplePoint | Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
uint16 | synchJumpWidth | Specifies the resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
IfxMultican_Can_InterruptSource | timerInterrupt | Timer Interrupt.
IfxMultican_Can_InterruptSource | transferInterrupt | Transfer interrupt.
IfxMultican_Txd_Out * | txPin | Specifies the transmit pin.
IfxPort_OutputMode | txPinMode | Specifies the transmit pin output mode.


iLLD_TC26B: General functions

Functions
General functions
iLLD » MULTICAN » CAN
Collaboration diagram for General functions:

Functions

IFX_INLINE void | IfxMultican_Can_deinit (IfxMultican_Can *mcan)
Reset the CAN module.
Reset and disable the CAN module, inclusive message object and node registers. More...
IFX_EXTERN void | IfxMultican_Can_getConfig (IfxMultican_Can *mcan, IfxMultican_Can_Config *config)
Return the actual CAN module configuration. More...
IFX_EXTERN float32 | IfxMultican_Can_getModuleFrequency (IfxMultican_Can *mcan)
Get the module frequency. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_initModule (IfxMultican_Can *mcan, const IfxMultican_Can_Config *config)
Initialize the CAN module
The following configuration is used:
. More...
IFX_EXTERN void | IfxMultican_Can_initModuleConfig (IfxMultican_Can_Config *config, Ifx_CAN *mcan)
Return the default MULTICAN configuration. More...

Detailed Description

Function Documentation

◆ IfxMultican_Can_deinit()

IFX_INLINE void IfxMultican_Can_deinit ( IfxMultican_Can * mcan )

Reset the CAN module.
Reset and disable the CAN module, inclusive message object and node registers.

Parameters
mcan pointer to the CAN handle
Returns
None

Definition at line 1308 of file IfxMultican_Can.h.

◆ IfxMultican_Can_getConfig()

IFX_EXTERN void IfxMultican_Can_getConfig | ( | IfxMultican_Can * | mcan,
 |  | IfxMultican_Can_Config * | config
 | ) |  |

Return the actual CAN module configuration.

Parameters
mcan | pointer to the CAN handle
config | Pointer to the configuration structure, will be filled by this function
Returns
None

Definition at line 916 of file IfxMultican_Can.c.

Referenced by IfxMultican_Can_getModuleFrequency().

◆ IfxMultican_Can_getModuleFrequency()

IFX_EXTERN float32 IfxMultican_Can_getModuleFrequency ( IfxMultican_Can * mcan )

Get the module frequency.

Parameters
mcan pointer to the CAN handle
Returns
Frequency Value

Definition at line 955 of file IfxMultican_Can.c.

Referenced by IfxMultican_Can_Node_getConfig(), and IfxMultican_Can_Node_init().

◆ IfxMultican_Can_initModule()

IFX_EXTERN IfxMultican_Status IfxMultican_Can_initModule | ( | IfxMultican_Can * | mcan,
 |  | const IfxMultican_Can_Config * | config
 | ) |  |

Initialize the CAN module
The following configuration is used:
.

  • The CAN module is stopped during sleep mode
  • The normal divider mode is selected
  • The CAN module clock is the system clock
    Parameters
    mcan | pointer to the CAN handle
    config | Specifies pointer to the CAN module configuration
    Returns
    Status,: Returns IfxMultican_Status_ok if the operation was successful
    Returns IfxMultican_Status_notInitialised if the operation was errorneous
    A coding example can be found in How to use the CAN Interface driver?

Definition at line 965 of file IfxMultican_Can.c.

◆ IfxMultican_Can_initModuleConfig()

IFX_EXTERN void IfxMultican_Can_initModuleConfig | ( | IfxMultican_Can_Config * | config,
 |  | Ifx_CAN * | mcan
 | ) |  |

Return the default MULTICAN configuration.

Parameters
config | Default configuration filled by this function
mcan | base address of the MULTICAN register space
Returns
None

A coding example can be found in How to use the CAN Interface driver?

  • take over module pointer

  • Selected input clock is from CLC
  • Module frequency is fSPB

Definition at line 1055 of file IfxMultican_Can.c.


iLLD_TC26B: CAN Nodes

Functions
CAN Nodes
iLLD » MULTICAN » CAN
Collaboration diagram for CAN Nodes:

Functions

IFX_INLINE void | IfxMultican_Can_Node_activate (IfxMultican_Can_Node *node)
Activate the CAN Node. Participate in the CAN bus activities. More...
IFX_INLINE void | IfxMultican_Can_Node_deactivate (IfxMultican_Can_Node *node)
Deactivate the CAN Node. Take out from participation in the CAN bus activities. More...
IFX_INLINE void | IfxMultican_Can_Node_deinit (IfxMultican_Can_Node *node)
Reset the CAN node. More...
IFX_INLINE IfxMultican_Status | IfxMultican_Can_Node_recoverBusOff (IfxMultican_Can_Node *node)
Recovers the CAN node from bus off. More...
IFX_EXTERN void | IfxMultican_Can_Node_getConfig (IfxMultican_Can_Node *node, IfxMultican_Can_NodeConfig *config)
Get the actual message object configuration. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_Node_init (IfxMultican_Can_Node *node, const IfxMultican_Can_NodeConfig *config)
Initialize the CAN node. More...
IFX_EXTERN void | IfxMultican_Can_Node_initConfig (IfxMultican_Can_NodeConfig *config, IfxMultican_Can *mcan)
Get default CAN node configuration. More...
IFX_EXTERN void | IfxMultican_Can_Node_sendToBusOff (IfxMultican_Can_Node *node)
Sends the CAN node into bus off. More...

Detailed Description

Function Documentation

◆ IfxMultican_Can_Node_activate()

IFX_INLINE void IfxMultican_Can_Node_activate ( IfxMultican_Can_Node * node )

Activate the CAN Node. Participate in the CAN bus activities.

Parameters
node Specifies the CAN node handle to be configured
Returns
None

Definition at line 1277 of file IfxMultican_Can.h.

◆ IfxMultican_Can_Node_deactivate()

IFX_INLINE void IfxMultican_Can_Node_deactivate ( IfxMultican_Can_Node * node )

Deactivate the CAN Node. Take out from participation in the CAN bus activities.

Parameters
node Specifies the CAN node handle to be configured
Returns
None

Definition at line 1285 of file IfxMultican_Can.h.

◆ IfxMultican_Can_Node_deinit()

IFX_INLINE void IfxMultican_Can_Node_deinit ( IfxMultican_Can_Node * node )

Reset the CAN node.

Parameters
node Specifies the CAN node handle to be configured
Returns
None

Definition at line 1292 of file IfxMultican_Can.h.

◆ IfxMultican_Can_Node_getConfig()

IFX_EXTERN void IfxMultican_Can_Node_getConfig | ( | IfxMultican_Can_Node * | node,
 |  | IfxMultican_Can_NodeConfig * | config
 | ) |  |

Get the actual message object configuration.

Parameters
node | Specifies the CAN node handle to be configured
config | Specifies the CAN node configuration
Returns
None

Definition at line 748 of file IfxMultican_Can.c.

◆ IfxMultican_Can_Node_init()

IFX_EXTERN IfxMultican_Status IfxMultican_Can_Node_init | ( | IfxMultican_Can_Node * | node,
 |  | const IfxMultican_Can_NodeConfig * | config
 | ) |  |

Initialize the CAN node.

Parameters
node | Specifies the CAN node handle to be configured
config | Specifies the CAN node configuration
Returns
Status

A coding example can be found in How to use the CAN Interface driver?

Definition at line 765 of file IfxMultican_Can.c.

◆ IfxMultican_Can_Node_initConfig()

IFX_EXTERN void IfxMultican_Can_Node_initConfig | ( | IfxMultican_Can_NodeConfig * | config,
 |  | IfxMultican_Can * | mcan
 | ) |  |

Get default CAN node configuration.

Parameters
config | Specifies the CAN node configuration
mcan | pointer to the CAN handle
Returns
None

A coding example can be found in How to use the CAN Interface driver?

Definition at line 852 of file IfxMultican_Can.c.

◆ IfxMultican_Can_Node_recoverBusOff()

IFX_INLINE IfxMultican_Status IfxMultican_Can_Node_recoverBusOff ( IfxMultican_Can_Node * node )

Recovers the CAN node from bus off.

Parameters
node Specifies the CAN node handle to be configured
Returns
Status

IfxMultican_Status status = IfxMultican_Status_busOff;

while (status != IfxMultican_Status_ok) { status = IfxMultican_Can_Node_recoverBusOff(&canNode); }

Definition at line 1300 of file IfxMultican_Can.h.

◆ IfxMultican_Can_Node_sendToBusOff()

IFX_EXTERN void IfxMultican_Can_Node_sendToBusOff ( IfxMultican_Can_Node * node )

Sends the CAN node into bus off.

Parameters
node Specifies the CAN node handle to be configured
Returns
None

IfxMultican_Can_Node_sendToBusOff(&canNode);

Definition at line 900 of file IfxMultican_Can.c.


iLLD_TC26B: Message Objects

Functions
Message Objects
iLLD » MULTICAN » CAN
Collaboration diagram for Message Objects:

Functions

IFX_INLINE boolean | IfxMultican_Can_MsgObj_cancelSend (IfxMultican_Can_MsgObj *msgObj)
Cancel pending TX request by invalidating the request
Only when frame transmission has not been started. More...
IFX_INLINE void | IfxMultican_Can_MsgObj_clearRxPending (IfxMultican_Can_MsgObj *msgObj)
Clear the RX pending flag of a message object. More...
IFX_INLINE void | IfxMultican_Can_MsgObj_clearTxPending (IfxMultican_Can_MsgObj *msgObj)
Clear the TX pending flag of a message object. More...
IFX_INLINE void | IfxMultican_Can_MsgObj_deinit (IfxMultican_Can_MsgObj *msgObj)
Reset the message object
Append the message object to the end of idle list and reset message object registers. More...
IFX_INLINE IfxMultican_MsgObjId | IfxMultican_Can_MsgObj_getPendingId (IfxMultican_Can_MsgObj *msgObj, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group. More...
IFX_INLINE IfxMultican_MsgObjStat | IfxMultican_Can_MsgObj_getStatus (IfxMultican_Can_MsgObj *msgObj)
Get the message object status. More...
IFX_INLINE IfxMultican_Status | IfxMultican_Can_MsgObj_readLongFrame (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
Read a received CAN message. More...
IFX_INLINE IfxMultican_Status | IfxMultican_Can_MsgObj_sendLongFrame (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
Read a received CAN message. More...
IFX_EXTERN void | IfxMultican_Can_MsgObj_getConfig (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Can_MsgObjConfig *config)
Get the actual message object configuration. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_MsgObj_init (IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Can_MsgObjConfig *config)
Initialize the message object. More...
IFX_EXTERN void | IfxMultican_Can_MsgObj_initConfig (IfxMultican_Can_MsgObjConfig *config, IfxMultican_Can_Node *node)
Initialise message config with default values and the given parameters. More...
IFX_EXTERN boolean | IfxMultican_Can_MsgObj_isRxPending (IfxMultican_Can_MsgObj *msgObj)
Returns the RX pending flag of a message object. More...
IFX_EXTERN boolean | IfxMultican_Can_MsgObj_isTransmitRequested (IfxMultican_Can_MsgObj *msgObj)
Returns the TX Request flag of a message object. More...
IFX_EXTERN boolean | IfxMultican_Can_MsgObj_isTxPending (IfxMultican_Can_MsgObj *msgObj)
Returns the TX pending flag of a message object. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_MsgObj_readMessage (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg)
Read a received CAN message. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_MsgObj_sendMessage (IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Message *msg)
Send a CAN message. More...

Detailed Description

Function Documentation

◆ IfxMultican_Can_MsgObj_cancelSend()

IFX_INLINE boolean IfxMultican_Can_MsgObj_cancelSend ( IfxMultican_Can_MsgObj * msgObj )

Cancel pending TX request by invalidating the request
Only when frame transmission has not been started.

Parameters
msgObj pointer to the CAN message object handle
Returns
TRUE if cancellation was successfully executed

Definition at line 1221 of file IfxMultican_Can.h.

◆ IfxMultican_Can_MsgObj_clearRxPending()

IFX_INLINE void IfxMultican_Can_MsgObj_clearRxPending ( IfxMultican_Can_MsgObj * msgObj )

Clear the RX pending flag of a message object.

Parameters
msgObj pointer to the CAN message object handle
Returns
None

A coding example can be found in How to use the CAN Interface driver?

Definition at line 1229 of file IfxMultican_Can.h.

◆ IfxMultican_Can_MsgObj_clearTxPending()

IFX_INLINE void IfxMultican_Can_MsgObj_clearTxPending ( IfxMultican_Can_MsgObj * msgObj )

Clear the TX pending flag of a message object.

Parameters
msgObj pointer to the CAN message object handle
Returns
None

A coding example can be found in How to use the CAN Interface driver?

Definition at line 1237 of file IfxMultican_Can.h.

◆ IfxMultican_Can_MsgObj_deinit()

IFX_INLINE void IfxMultican_Can_MsgObj_deinit ( IfxMultican_Can_MsgObj * msgObj )

Reset the message object
Append the message object to the end of idle list and reset message object registers.

Parameters
msgObj pointer to the CAN message object handle
Returns
None

Definition at line 1245 of file IfxMultican_Can.h.

◆ IfxMultican_Can_MsgObj_getConfig()

IFX_EXTERN void IfxMultican_Can_MsgObj_getConfig | ( | IfxMultican_Can_MsgObj * | msgObj,
 |  | IfxMultican_Can_MsgObjConfig * | config
 | ) |  |

Get the actual message object configuration.

Parameters
msgObj | pointer to the CAN message object handle
config | Pointer to the RAM buffer. Filled by this function
Returns
None

Definition at line 52 of file IfxMultican_Can.c.

◆ IfxMultican_Can_MsgObj_getPendingId()

IFX_INLINE IfxMultican_MsgObjId IfxMultican_Can_MsgObj_getPendingId | ( | IfxMultican_Can_MsgObj * | msgObj,
 |  | IfxMultican_MsgObjGroup | msgObjGroup
 | ) |  |

Get message object ID which has TX/RX pending flag from a message object group.

Parameters
msgObj | pointer to the CAN message object handle
msgObjGroup | Message object group
Returns
Message Object Id

Definition at line 1251 of file IfxMultican_Can.h.

◆ IfxMultican_Can_MsgObj_getStatus()

IFX_INLINE IfxMultican_MsgObjStat IfxMultican_Can_MsgObj_getStatus ( IfxMultican_Can_MsgObj * msgObj )

Get the message object status.

Parameters
msgObj pointer to the CAN message object handle
Returns
IfxMultican_MsgObjStat bitfield

A coding example can be found in How to use the CAN Interface driver?

Definition at line 1257 of file IfxMultican_Can.h.

◆ IfxMultican_Can_MsgObj_init()

IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_init | ( | IfxMultican_Can_MsgObj * | msgObj,
 |  | const IfxMultican_Can_MsgObjConfig * | config
 | ) |  |

Initialize the message object.

Parameters
msgObj | pointer to the CAN message object handle
config | pointer to the CAN message object configuration
Returns
Status

A coding example can be found in How to use the CAN Interface driver?

Definition at line 78 of file IfxMultican_Can.c.

◆ IfxMultican_Can_MsgObj_initConfig()

IFX_EXTERN void IfxMultican_Can_MsgObj_initConfig | ( | IfxMultican_Can_MsgObjConfig * | config,
 |  | IfxMultican_Can_Node * | node
 | ) |  |

Initialise message config with default values and the given parameters.

Parameters
config | pointer to the CAN message object configuration
node | pointer to the CAN node handle to which the message object should be assigned
Returns
None

A coding example can be found in How to use the CAN Interface driver?

Definition at line 570 of file IfxMultican_Can.c.

◆ IfxMultican_Can_MsgObj_isRxPending()

IFX_EXTERN boolean IfxMultican_Can_MsgObj_isRxPending ( IfxMultican_Can_MsgObj * msgObj )

Returns the RX pending flag of a message object.

Parameters
msgObj pointer to the CAN message object handle
Returns
TRUE of the RX pending flag of a message object is set

Definition at line 609 of file IfxMultican_Can.c.

◆ IfxMultican_Can_MsgObj_isTransmitRequested()

IFX_EXTERN boolean IfxMultican_Can_MsgObj_isTransmitRequested ( IfxMultican_Can_MsgObj * msgObj )

Returns the TX Request flag of a message object.

Parameters
msgObj pointer to the CAN message object handle
Returns
TRUE of the TX Request flag of a message object is set

Definition at line 624 of file IfxMultican_Can.c.

◆ IfxMultican_Can_MsgObj_isTxPending()

IFX_EXTERN boolean IfxMultican_Can_MsgObj_isTxPending ( IfxMultican_Can_MsgObj * msgObj )

Returns the TX pending flag of a message object.

Parameters
msgObj pointer to the CAN message object handle
Returns
TRUE of the TX pending flag of a message object is set

Definition at line 641 of file IfxMultican_Can.c.

◆ IfxMultican_Can_MsgObj_readLongFrame()

IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_readLongFrame | ( | IfxMultican_Can_MsgObj * | msgObj,
 |  | IfxMultican_Message * | msg,
 |  | uint32 * | data
 | ) |  |

Read a received CAN message.

Parameters
msgObj | pointer to the CAN message object handle
msg | This parameter is filled in by the function with the received message. Also when reading is not successful
data | Pointer to data (in words)
Returns
IfxMultican_Status_newData: if the operation was successful
IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully
IfxMultican_Status_messageLost: if the message lost and new data is not yet ready
IfxMultican_Status_receiveEmpty: if no message is been received

A coding example can be found in How to use the CAN Interface driver?

Definition at line 1265 of file IfxMultican_Can.h.

◆ IfxMultican_Can_MsgObj_readMessage()

IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_readMessage | ( | IfxMultican_Can_MsgObj * | msgObj,
 |  | IfxMultican_Message * | msg
 | ) |  |

Read a received CAN message.

Parameters
msgObj | pointer to the CAN message object handle
msg | This parameter is filled in by the function with the received message. Also when reading is not successful
Returns
IfxMultican_Status_newData: if the operation was successful
IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully
IfxMultican_Status_messageLost: if the message lost and new data is not yet ready
IfxMultican_Status_receiveEmpty: if no message is been received

A coding example can be found in How to use the CAN Interface driver?

Definition at line 658 of file IfxMultican_Can.c.

◆ IfxMultican_Can_MsgObj_sendLongFrame()

IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_sendLongFrame | ( | IfxMultican_Can_MsgObj * | msgObj,
 |  | IfxMultican_Message * | msg,
 |  | uint32 * | data
 | ) |  |

Read a received CAN message.

Parameters
msgObj | pointer to the CAN message object handle
msg | This parameter is filled in by the function with the received message. Also when reading is not successful
data | Pointer to data (in words)
Returns
IfxMultican_Status_ok: if the operation was successful IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy

A coding example can be found in How to use the CAN Interface driver?

Definition at line 1271 of file IfxMultican_Can.h.

◆ IfxMultican_Can_MsgObj_sendMessage()

IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_sendMessage | ( | IfxMultican_Can_MsgObj * | msgObj,
 |  | const IfxMultican_Message * | msg
 | ) |  |

Send a CAN message.

Parameters
msgObj | pointer to the CAN message object handle
msg | Specifies the msg to be send
Returns
IfxMultican_Status_ok: if the operation was successful
IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy

A coding example can be found in How to use the CAN Interface driver?

Definition at line 698 of file IfxMultican_Can.c.


iLLD_TC26B: Interrupts

Interrupts
iLLD » MULTICAN » CAN
Collaboration diagram for Interrupts:


iLLD_TC26B: IfxMultican_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxMultican_cfg.h File Reference
iLLD » MULTICAN

MULTICAN on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxCan_reg.h"
Include dependency graph for IfxMultican_cfg.h:

Go to the source code of this file.

Macros

#define | IFXMULTICAN_NUM_MESSAGE_OBJECTS (256)
Number of CAN message objects. More...
#define | IFXMULTICAN_NUM_NODES (5)
Number of CAN nodes. More...
#define | IFXMULTICAN_NUM_SRC (16)
Number of service requests. More...
#define | IFXMULTICAN_NUM_MODULES (1)
#define | IFXMULTICAN_R_NUM_SRC (8)
Number of CANR service requests. More...

Enumerations

enum IfxMultican_Index {
IfxMultican_Index_none = -1,
IfxMultican_Index_0 = 0
}
List of the available multican resource.
More...
enum IfxMultican_NodeId {
IfxMultican_NodeId_none = -1,
IfxMultican_NodeId_0 = 0,
IfxMultican_NodeId_1,
IfxMultican_NodeId_2,
IfxMultican_NodeId_3
}
CAN Nodes definition
More...
enum IfxMultican_SrcId {
IfxMultican_SrcId_0 = 0,
IfxMultican_SrcId_1,
IfxMultican_SrcId_2,
IfxMultican_SrcId_3,
IfxMultican_SrcId_4,
IfxMultican_SrcId_5,
IfxMultican_SrcId_6,
IfxMultican_SrcId_7,
IfxMultican_SrcId_8,
IfxMultican_SrcId_9,
IfxMultican_SrcId_10,
IfxMultican_SrcId_11,
IfxMultican_SrcId_12,
IfxMultican_SrcId_13,
IfxMultican_SrcId_14,
IfxMultican_SrcId_15
}
Service request ID
More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap [IFXMULTICAN_NUM_MODULES]

Detailed Description

MULTICAN on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMultican_cfg.h.

Macro Definition Documentation

◆ IFXMULTICAN_NUM_MESSAGE_OBJECTS

#define IFXMULTICAN_NUM_MESSAGE_OBJECTS (256)

Number of CAN message objects.

Definition at line 65 of file IfxMultican_cfg.h.

Referenced by IfxMultican_deinit().

◆ IFXMULTICAN_NUM_MODULES

#define IFXMULTICAN_NUM_MODULES (1)

Definition at line 75 of file IfxMultican_cfg.h.

Referenced by IfxMultican_getAddress(), and IfxMultican_getIndex().

◆ IFXMULTICAN_NUM_NODES

#define IFXMULTICAN_NUM_NODES (5)

Number of CAN nodes.

Definition at line 69 of file IfxMultican_cfg.h.

Referenced by IfxMultican_deinit().

◆ IFXMULTICAN_NUM_SRC

#define IFXMULTICAN_NUM_SRC (16)

Number of service requests.

Definition at line 73 of file IfxMultican_cfg.h.

Referenced by IfxMultican_Can_initModule(), IfxMultican_Can_initModuleConfig(), and IfxMultican_deinit().

◆ IFXMULTICAN_R_NUM_SRC

#define IFXMULTICAN_R_NUM_SRC (8)

Number of CANR service requests.

Definition at line 79 of file IfxMultican_cfg.h.

Enumeration Type Documentation

◆ IfxMultican_Index

enum IfxMultican_Index

List of the available multican resource.

Enumerator
IfxMultican_Index_none | Not Selected.
IfxMultican_Index_0 | MULTICAN index 0.

Definition at line 89 of file IfxMultican_cfg.h.

◆ IfxMultican_NodeId

enum IfxMultican_NodeId

CAN Nodes definition

Enumerator
IfxMultican_NodeId_none | None of the Ifx_CAN Nodes.
IfxMultican_NodeId_0 | Ifx_CAN Node 0.
IfxMultican_NodeId_1 | Ifx_CAN Node 1.
IfxMultican_NodeId_2 | Ifx_CAN Node 2.
IfxMultican_NodeId_3 | Ifx_CAN Node 3.

Definition at line 97 of file IfxMultican_cfg.h.

◆ IfxMultican_SrcId

enum IfxMultican_SrcId

Service request ID

Enumerator
IfxMultican_SrcId_0 | Service request ID 0.
IfxMultican_SrcId_1 | Service request ID 1.
IfxMultican_SrcId_2 | Service request ID 2.
IfxMultican_SrcId_3 | Service request ID 3.
IfxMultican_SrcId_4 | Service request ID 4.
IfxMultican_SrcId_5 | Service request ID 5.
IfxMultican_SrcId_6 | Service request ID 6.
IfxMultican_SrcId_7 | Service request ID 7.
IfxMultican_SrcId_8 | Service request ID 8.
IfxMultican_SrcId_9 | Service request ID 9.
IfxMultican_SrcId_10 | Service request ID 10.
IfxMultican_SrcId_11 | Service request ID 11.
IfxMultican_SrcId_12 | Service request ID 12.
IfxMultican_SrcId_13 | Service request ID 13.
IfxMultican_SrcId_14 | Service request ID 14.
IfxMultican_SrcId_15 | Service request ID 15.

Definition at line 108 of file IfxMultican_cfg.h.

Variable Documentation

◆ IfxMultican_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap[IFXMULTICAN_NUM_MODULES]

Definition at line 133 of file IfxMultican_cfg.h.


iLLD_TC26B: IfxMultican_PinMap.c File Reference

  • _PinMap
Variables
IfxMultican_PinMap.c File Reference
iLLD » MULTICAN

MULTICAN I/O map. More...

#include "IfxMultican_PinMap.h"
Include dependency graph for IfxMultican_PinMap.c:

Go to the source code of this file.

Variables

IfxMultican_Rxd_In | IfxMultican_RXD0A_P02_1_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 1}, Ifx_RxSel_a}
IfxMultican_Rxd_In | IfxMultican_RXD0B_P20_7_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P20, 7}, Ifx_RxSel_b}
IfxMultican_Rxd_In | IfxMultican_RXD0D_P02_4_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 4}, Ifx_RxSel_d}
IfxMultican_Rxd_In | IfxMultican_RXD0E_P33_7_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P33, 7}, Ifx_RxSel_e}
IfxMultican_Rxd_In | IfxMultican_RXD1A_P15_3_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P15, 3}, Ifx_RxSel_a}
IfxMultican_Rxd_In | IfxMultican_RXD1B_P14_1_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P14, 1}, Ifx_RxSel_b}
IfxMultican_Rxd_In | IfxMultican_RXD1D_P00_1_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P00, 1}, Ifx_RxSel_d}
IfxMultican_Rxd_In | IfxMultican_RXD2A_P15_1_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P15, 1}, Ifx_RxSel_a}
IfxMultican_Rxd_In | IfxMultican_RXD2B_P02_3_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P02, 3}, Ifx_RxSel_b}
IfxMultican_Rxd_In | IfxMultican_RXD2D_P14_8_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P14, 8}, Ifx_RxSel_d}
IfxMultican_Rxd_In | IfxMultican_RXD2E_P10_2_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P10, 2}, Ifx_RxSel_e}
IfxMultican_Rxd_In | IfxMultican_RXD3A_P00_3_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P00, 3}, Ifx_RxSel_a}
IfxMultican_Rxd_In | IfxMultican_RXD3B_P32_2_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P32, 2}, Ifx_RxSel_b}
IfxMultican_Rxd_In | IfxMultican_RXD3C_P20_0_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 0}, Ifx_RxSel_c}
IfxMultican_Rxd_In | IfxMultican_RXD3D_P11_10_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P11,10}, Ifx_RxSel_d}
IfxMultican_Rxd_In | IfxMultican_RXD3E_P20_9_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 9}, Ifx_RxSel_e}
IfxMultican_Txd_Out | IfxMultican_TXD0_P02_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD0_P02_5_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt2}
IfxMultican_Txd_Out | IfxMultican_TXD0_P20_8_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD0_P33_8_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD1_P00_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD1_P14_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD1_P15_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD2_P02_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD2_P10_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt6}
IfxMultican_Txd_Out | IfxMultican_TXD2_P14_10_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P14,10}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD2_P15_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD3_P00_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD3_P11_12_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P11,12}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD3_P20_10_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20,10}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD3_P20_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD3_P32_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt5}
const IfxMultican_Rxd_In * | IfxMultican_Rxd_In_pinTable [IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS]
const IfxMultican_Txd_Out * | IfxMultican_Txd_Out_pinTable [IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS]

Detailed Description

MULTICAN I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMultican_PinMap.c.

Variable Documentation

◆ IfxMultican_RXD0A_P02_1_IN

IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 1}, Ifx_RxSel_a}

Definition at line 45 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD0B_P20_7_IN

IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P20, 7}, Ifx_RxSel_b}

Definition at line 46 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD0D_P02_4_IN

IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 4}, Ifx_RxSel_d}

Definition at line 47 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD0E_P33_7_IN

IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P33, 7}, Ifx_RxSel_e}

Definition at line 48 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD1A_P15_3_IN

IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P15, 3}, Ifx_RxSel_a}

Definition at line 49 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD1B_P14_1_IN

IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P14, 1}, Ifx_RxSel_b}

Definition at line 50 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD1D_P00_1_IN

IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P00, 1}, Ifx_RxSel_d}

Definition at line 51 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD2A_P15_1_IN

IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P15, 1}, Ifx_RxSel_a}

Definition at line 52 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD2B_P02_3_IN

IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P02, 3}, Ifx_RxSel_b}

Definition at line 53 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD2D_P14_8_IN

IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P14, 8}, Ifx_RxSel_d}

Definition at line 54 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD2E_P10_2_IN

IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P10, 2}, Ifx_RxSel_e}

Definition at line 55 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD3A_P00_3_IN

IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P00, 3}, Ifx_RxSel_a}

Definition at line 56 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD3B_P32_2_IN

IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P32, 2}, Ifx_RxSel_b}

Definition at line 57 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD3C_P20_0_IN

IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 0}, Ifx_RxSel_c}

Definition at line 58 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD3D_P11_10_IN

IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P11,10}, Ifx_RxSel_d}

Definition at line 59 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD3E_P20_9_IN

IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 9}, Ifx_RxSel_e}

Definition at line 60 of file IfxMultican_PinMap.c.

◆ IfxMultican_Rxd_In_pinTable

const IfxMultican_Rxd_In* IfxMultican_Rxd_In_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS]

Definition at line 79 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD0_P02_0_OUT

IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt5}

Definition at line 61 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD0_P02_5_OUT

IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt2}

Definition at line 62 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD0_P20_8_OUT

IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt5}

Definition at line 63 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD0_P33_8_OUT

IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt5}

Definition at line 64 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD1_P00_0_OUT

IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt5}

Definition at line 65 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD1_P14_0_OUT

IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt5}

Definition at line 66 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD1_P15_2_OUT

IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt5}

Definition at line 67 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD2_P02_2_OUT

IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt5}

Definition at line 68 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD2_P10_3_OUT

IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt6}

Definition at line 69 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD2_P14_10_OUT

IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P14,10}, IfxPort_OutputIdx_alt5}

Definition at line 70 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD2_P15_0_OUT

IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt5}

Definition at line 71 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD3_P00_2_OUT

IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt5}

Definition at line 72 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD3_P11_12_OUT

IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P11,12}, IfxPort_OutputIdx_alt5}

Definition at line 73 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD3_P20_10_OUT

IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20,10}, IfxPort_OutputIdx_alt5}

Definition at line 74 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD3_P20_3_OUT

IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt5}

Definition at line 75 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD3_P32_3_OUT

IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt5}

Definition at line 76 of file IfxMultican_PinMap.c.

◆ IfxMultican_Txd_Out_pinTable

const IfxMultican_Txd_Out* IfxMultican_Txd_Out_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS]

Definition at line 112 of file IfxMultican_PinMap.c.


iLLD_TC26B: IfxMultican_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxMultican_PinMap.h File Reference
iLLD » MULTICAN

MULTICAN I/O map. More...

#include <IfxCan_reg.h>
#include <_Impl/IfxMultican_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxMultican_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxMultican_Rxd_In
RXD pin mapping structure. More...
struct | IfxMultican_Txd_Out
TXD pin mapping structure. More...

Macros

#define | IFXMULTICAN_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXMULTICAN_PINMAP_NUM_NODES 4
#define | IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS 5
#define | IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS 5

Variables

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN
CAN0_RXDA: CAN node 0 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN
CAN0_RXDB: CAN node 0 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN
CAN0_RXDD: CAN node 0 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN
CAN0_RXDE: CAN node 0 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN
CAN1_RXDA: CAN node 1 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN
CAN1_RXDB: CAN node 1 input Used for single pin DAP (SPD) function. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN
CAN1_RXDD: CAN node 1 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN
CAN2_RXDA: CAN node 2 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN
CAN2_RXDB: CAN node 2 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN
CAN2_RXDD: CAN node 2 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN
CAN2_RXDE: CAN node 2 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN
CAN3_RXDA: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN
CAN3_RXDB: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN
CAN3_RXDC: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN
CAN3_RXDD: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN
CAN3_RXDE: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT
CAN0_TXD: CAN node 0 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT
CAN0_TXD: CAN node 0 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT
CAN0_TXD: CAN node 0 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT
CAN0_TXD: CAN node 0 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT
CAN1_TXD: CAN node 1 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT
CAN1_TXD: CAN node 1 output Used for single pin DAP (SPD) function. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT
CAN1_TXD: CAN node 1 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT
CAN2_TXD: CAN node 2 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT
CAN2_TXD: CAN node 2 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT
CAN2_TXD: CAN node 2 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT
CAN2_TXD: CAN node 2 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN const IfxMultican_Rxd_In * | IfxMultican_Rxd_In_pinTable [IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS]
IfxMultican_Rxd_In table. More...
IFX_EXTERN const IfxMultican_Txd_Out * | IfxMultican_Txd_Out_pinTable [IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS]
IfxMultican_Txd_Out table. More...

Detailed Description

MULTICAN I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMultican_PinMap.h.


iLLD_TC26B: IfxMultican_Can.h File Reference

  • Multican
  • Can
Data Structures | Functions
IfxMultican_Can.h File Reference
iLLD » MULTICAN

MULTICAN CAN details. More...

#include "Multican/Std/IfxMultican.h"
#include "Scu/Std/IfxScuCcu.h"
#include "IfxScu_regdef.h"
Include dependency graph for IfxMultican_Can.h:

Go to the source code of this file.

Data Structures

struct | IfxMultican_Can_FdConfig
Structure for CAN FD configuration. More...
struct | IfxMultican_Can_GatewayConfig
Structure for gateway configuration. More...
struct | IfxMultican_Can_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxMultican_Can_InterruptSource
Structure for interrupt source. More...
struct | IfxMultican_Can_MsgObjControl
Message object control. More...
struct | IfxMultican_Can_Node
CAN node handle data structure. More...
struct | IfxMultican_Can
CAN handle data structure. More...
struct | IfxMultican_Can_Config
CAN module configuration. More...
struct | IfxMultican_Can_MsgObj
CAN message object handle data structure. More...
struct | IfxMultican_Can_MsgObjConfig
CAN message object configuration. More...
struct | IfxMultican_Can_NodeConfig
CAN Node configuration. More...

Functions

IFX_INLINE void | IfxMultican_Can_deinit (IfxMultican_Can *mcan)
Reset the CAN module.
Reset and disable the CAN module, inclusive message object and node registers. More...
IFX_EXTERN void | IfxMultican_Can_getConfig (IfxMultican_Can *mcan, IfxMultican_Can_Config *config)
Return the actual CAN module configuration. More...
IFX_EXTERN float32 | IfxMultican_Can_getModuleFrequency (IfxMultican_Can *mcan)
Get the module frequency. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_initModule (IfxMultican_Can *mcan, const IfxMultican_Can_Config *config)
Initialize the CAN module
The following configuration is used:
. More...
IFX_EXTERN void | IfxMultican_Can_initModuleConfig (IfxMultican_Can_Config *config, Ifx_CAN *mcan)
Return the default MULTICAN configuration. More...
IFX_INLINE void | IfxMultican_Can_Node_activate (IfxMultican_Can_Node *node)
Activate the CAN Node. Participate in the CAN bus activities. More...
IFX_INLINE void | IfxMultican_Can_Node_deactivate (IfxMultican_Can_Node *node)
Deactivate the CAN Node. Take out from participation in the CAN bus activities. More...
IFX_INLINE void | IfxMultican_Can_Node_deinit (IfxMultican_Can_Node *node)
Reset the CAN node. More...
IFX_INLINE IfxMultican_Status | IfxMultican_Can_Node_recoverBusOff (IfxMultican_Can_Node *node)
Recovers the CAN node from bus off. More...
IFX_EXTERN void | IfxMultican_Can_Node_getConfig (IfxMultican_Can_Node *node, IfxMultican_Can_NodeConfig *config)
Get the actual message object configuration. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_Node_init (IfxMultican_Can_Node *node, const IfxMultican_Can_NodeConfig *config)
Initialize the CAN node. More...
IFX_EXTERN void | IfxMultican_Can_Node_initConfig (IfxMultican_Can_NodeConfig *config, IfxMultican_Can *mcan)
Get default CAN node configuration. More...
IFX_EXTERN void | IfxMultican_Can_Node_sendToBusOff (IfxMultican_Can_Node *node)
Sends the CAN node into bus off. More...
IFX_INLINE boolean | IfxMultican_Can_MsgObj_cancelSend (IfxMultican_Can_MsgObj *msgObj)
Cancel pending TX request by invalidating the request
Only when frame transmission has not been started. More...
IFX_INLINE void | IfxMultican_Can_MsgObj_clearRxPending (IfxMultican_Can_MsgObj *msgObj)
Clear the RX pending flag of a message object. More...
IFX_INLINE void | IfxMultican_Can_MsgObj_clearTxPending (IfxMultican_Can_MsgObj *msgObj)
Clear the TX pending flag of a message object. More...
IFX_INLINE void | IfxMultican_Can_MsgObj_deinit (IfxMultican_Can_MsgObj *msgObj)
Reset the message object
Append the message object to the end of idle list and reset message object registers. More...
IFX_INLINE IfxMultican_MsgObjId | IfxMultican_Can_MsgObj_getPendingId (IfxMultican_Can_MsgObj *msgObj, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group. More...
IFX_INLINE IfxMultican_MsgObjStat | IfxMultican_Can_MsgObj_getStatus (IfxMultican_Can_MsgObj *msgObj)
Get the message object status. More...
IFX_INLINE IfxMultican_Status | IfxMultican_Can_MsgObj_readLongFrame (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
Read a received CAN message. More...
IFX_INLINE IfxMultican_Status | IfxMultican_Can_MsgObj_sendLongFrame (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
Read a received CAN message. More...
IFX_EXTERN void | IfxMultican_Can_MsgObj_getConfig (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Can_MsgObjConfig *config)
Get the actual message object configuration. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_MsgObj_init (IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Can_MsgObjConfig *config)
Initialize the message object. More...
IFX_EXTERN void | IfxMultican_Can_MsgObj_initConfig (IfxMultican_Can_MsgObjConfig *config, IfxMultican_Can_Node *node)
Initialise message config with default values and the given parameters. More...
IFX_EXTERN boolean | IfxMultican_Can_MsgObj_isRxPending (IfxMultican_Can_MsgObj *msgObj)
Returns the RX pending flag of a message object. More...
IFX_EXTERN boolean | IfxMultican_Can_MsgObj_isTransmitRequested (IfxMultican_Can_MsgObj *msgObj)
Returns the TX Request flag of a message object. More...
IFX_EXTERN boolean | IfxMultican_Can_MsgObj_isTxPending (IfxMultican_Can_MsgObj *msgObj)
Returns the TX pending flag of a message object. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_MsgObj_readMessage (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg)
Read a received CAN message. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_MsgObj_sendMessage (IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Message *msg)
Send a CAN message. More...

Detailed Description

MULTICAN CAN details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMultican_Can.h.


iLLD_TC26B: IfxMultican.h File Reference

  • Multican
  • Std
Data Structures | Typedefs | Enumerations | Functions
IfxMultican.h File Reference
iLLD » MULTICAN

MULTICAN basic functionality. More...

#include "_Impl/IfxMultican_cfg.h"
#include "Src/Std/IfxSrc.h"
#include "_PinMap/IfxMultican_PinMap.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxCan_bf.h"
#include "Scu/Std/IfxScuWdt.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxMultican.h:

Go to the source code of this file.

Data Structures

struct | IfxMultican_Message
CAN message definition. More...
union | IfxMultican_MsgObjStat
Message object status bit-fields. More...

Typedefs

typedef sint32 IfxMultican_MsgObjId
Message object ID, 0 .. IFXMULTICAN_NUM_MESSAGE_OBJECTS. More...

Enumerations

enum IfxMultican_ClockSelect {
IfxMultican_ClockSelect_noClock = 0,
IfxMultican_ClockSelect_fclc = 1,
IfxMultican_ClockSelect_fosc0 = 2,
IfxMultican_ClockSelect_fErayPll = 4
}
CAN input clock selection. More...
enum IfxMultican_DataLengthCode {
IfxMultican_DataLengthCode_0 = 0,
IfxMultican_DataLengthCode_1,
IfxMultican_DataLengthCode_2,
IfxMultican_DataLengthCode_3,
IfxMultican_DataLengthCode_4,
IfxMultican_DataLengthCode_5,
IfxMultican_DataLengthCode_6,
IfxMultican_DataLengthCode_7,
IfxMultican_DataLengthCode_8,
IfxMultican_DataLengthCode_12 = 9,
IfxMultican_DataLengthCode_16 = 10,
IfxMultican_DataLengthCode_20 = 11,
IfxMultican_DataLengthCode_24 = 12,
IfxMultican_DataLengthCode_32 = 13,
IfxMultican_DataLengthCode_48 = 14,
IfxMultican_DataLengthCode_64 = 15
}
CAN frame data length code Definition in Ifx_CAN.MOFCRx.DLC. More...
enum IfxMultican_Frame {
IfxMultican_Frame_receive,
IfxMultican_Frame_transmit,
IfxMultican_Frame_remoteRequest,
IfxMultican_Frame_remoteAnswer
}
CAN frame type. More...
enum IfxMultican_FrameCounterMode {
IfxMultican_FrameCounterMode_frameCountMode = 0,
IfxMultican_FrameCounterMode_timeStampMode = 1,
IfxMultican_FrameCounterMode_bitTimingMode = 2,
IfxMultican_FrameCounterMode_errorCountMode = 3
}
Determines the operation mode of the frame counter
Definition in Ifx_CAN.NFCRx.B.CFMOD, (x= node Id) More...
enum IfxMultican_MsgObjGroup {
IfxMultican_MsgObjGroup_0 = 0,
IfxMultican_MsgObjGroup_1,
IfxMultican_MsgObjGroup_2,
IfxMultican_MsgObjGroup_3,
IfxMultican_MsgObjGroup_4,
IfxMultican_MsgObjGroup_5,
IfxMultican_MsgObjGroup_6,
IfxMultican_MsgObjGroup_7
}
CAN message object group
Each group consists of 32 consecutive message objects. More...
enum IfxMultican_MsgObjMode {
IfxMultican_MsgObjMode_standard = 0,
IfxMultican_MsgObjMode_receiveFifoBase = 1,
IfxMultican_MsgObjMode_transmitFifoBase = 2,
IfxMultican_MsgObjMode_transmitFifoSlave = 3,
IfxMultican_MsgObjMode_gatewaySource = 4,
IfxMultican_MsgObjMode_canFD64 = 5
}
CAN Message Object Mode. More...
enum IfxMultican_MsgObjStatusFlag {
IfxMultican_MsgObjStatusFlag_receivePending = IFX_CAN_MO_STAT_RXPND_OFF,
IfxMultican_MsgObjStatusFlag_transmitPending = IFX_CAN_MO_STAT_TXPND_OFF,
IfxMultican_MsgObjStatusFlag_receiveUpdating = IFX_CAN_MO_STAT_RXUPD_OFF,
IfxMultican_MsgObjStatusFlag_newData = IFX_CAN_MO_STAT_NEWDAT_OFF,
IfxMultican_MsgObjStatusFlag_messageLost = IFX_CAN_MO_STAT_MSGLST_OFF,
IfxMultican_MsgObjStatusFlag_messageValid = IFX_CAN_MO_STAT_MSGVAL_OFF,
IfxMultican_MsgObjStatusFlag_receiveTransmitSelected = IFX_CAN_MO_STAT_RTSEL_OFF,
IfxMultican_MsgObjStatusFlag_receiveEnable = IFX_CAN_MO_STAT_RXEN_OFF,
IfxMultican_MsgObjStatusFlag_transmitRequest = IFX_CAN_MO_STAT_TXRQ_OFF,
IfxMultican_MsgObjStatusFlag_transmitEnable0 = IFX_CAN_MO_STAT_TXEN0_OFF,
IfxMultican_MsgObjStatusFlag_transmitEnable1 = IFX_CAN_MO_STAT_TXEN1_OFF,
IfxMultican_MsgObjStatusFlag_messageDirection = IFX_CAN_MO_STAT_DIR_OFF
}
CAN Message Object status flag Definition in Ifx_CAN.MOSTATx (x: 0 to max number of msg objs) More...
enum IfxMultican_Priority {
IfxMultican_Priority_ListOrder = 1,
IfxMultican_Priority_CAN_ID = 2
}
CAN priorities. More...
enum IfxMultican_SleepMode {
IfxMultican_SleepMode_enable = 0,
IfxMultican_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CAN.CLC.B.EDIS. More...
enum IfxMultican_Status {
IfxMultican_Status_ok = 0x00000000,
IfxMultican_Status_notInitialised = 0x00000001,
IfxMultican_Status_wrongParam = 0x00000002,
IfxMultican_Status_wrongPin = 0x00000004,
IfxMultican_Status_busHeavy = 0x00000008,
IfxMultican_Status_busOff = 0x00000010,
IfxMultican_Status_notSentBusy = 0x00000020,
IfxMultican_Status_receiveEmpty = 0x00000040,
IfxMultican_Status_messageLost = 0x00000080,
IfxMultican_Status_newData = 0x00000100,
IfxMultican_Status_newDataButOneLost = IfxMultican_Status_messageLost | IfxMultican_Status_newData
}
CAN API status definition. More...
enum IfxMultican_SuspendMode {
IfxMultican_SuspendMode_none = 0,
IfxMultican_SuspendMode_hard = 1,
IfxMultican_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Functions

IFX_INLINE void | IfxMultican_clearMessagePendingSeletor (Ifx_CAN *mcan)
clears the message pending interrupt notification of a given list More...
IFX_INLINE void | IfxMultican_clearPendingMessageNotification (Ifx_CAN *mcan, uint16 list)
clears the message pending interrupt notification of a given list More...
IFX_INLINE void | IfxMultican_disableModule (Ifx_CAN *mcan)
Disables the module (sets the disable request) More...
IFX_INLINE void | IfxMultican_disableSleepMode (Ifx_CAN *mcan)
Disregards the sleep mode of the module. More...
IFX_INLINE void | IfxMultican_enableModule (Ifx_CAN *mcan)
Enables the module (clears the disable request) More...
IFX_INLINE void | IfxMultican_enableSleepMode (Ifx_CAN *mcan)
Enables the sleep mode of the module. More...
IFX_INLINE uint16 | IfxMultican_getFractionalDividerMode (Ifx_CAN *mcan)
Returns the selected fractional divider mode. More...
IFX_INLINE uint16 | IfxMultican_getFractionalDividerStepValue (Ifx_CAN *mcan)
Returns the reload or addition value for the result. More...
IFX_INLINE IfxMultican_ClockSelect | IfxMultican_getInputClock (Ifx_CAN *mcan)
Returns the selected input clock source. More...
IFX_INLINE boolean | IfxMultican_isModuleEnabled (Ifx_CAN *mcan)
Returns the status of module enabled or disabled. More...
IFX_INLINE void | IfxMultican_setFractionalDividerMode (Ifx_CAN *mcan, uint16 mode)
sets the fractional divider mode More...
IFX_INLINE void | IfxMultican_setFractionalDividerStepValue (Ifx_CAN *mcan, uint16 stepValue)
sets reload or addition value for the result. More...
IFX_INLINE void | IfxMultican_setInputClock (Ifx_CAN *mcan, IfxMultican_ClockSelect clockSelect)
Sets the input clock source. More...
IFX_INLINE void | IfxMultican_setMessageIndexMask (Ifx_CAN *mcan, uint32 mask)
clears the message pending interrupt notification of a given list More...
IFX_INLINE void | IfxMultican_setSleepMode (Ifx_CAN *can, IfxMultican_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxMultican_waitListReady (Ifx_CAN *mcan)
Wait until the list panel is ready. More...
IFX_INLINE boolean | IfxMultican_isModuleSuspended (Ifx_CAN *mcan)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxMultican_setSuspendMode (Ifx_CAN *mcan, IfxMultican_SuspendMode mode)
Set the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxMultican_Node_setFastBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures FBTR register. More...
IFX_EXTERN void | IfxMultican_Node_setNominalBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTEVR register. More...
IFX_EXTERN void | IfxMultican_deinit (Ifx_CAN *mcan)
Reset the CAN module
Reset and disable the CAN module, inclusive message object and node registers. More...
IFX_EXTERN void | IfxMultican_resetModule (Ifx_CAN *can)
resets Multican kernel More...
IFX_EXTERN void | IfxMultican_setListCommand (Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1)
Execute a command from the command panel. More...
IFX_EXTERN IfxMultican_Index | IfxMultican_getIndex (Ifx_CAN *multican)
API to get the resource index of the CAN specified. More...
IFX_EXTERN Ifx_CAN * | IfxMultican_getAddress (IfxMultican_Index multican)
IFX_INLINE void | IfxMultican_Node_activate (Ifx_CAN_N *hwNode)
Activate the CAN Node. Participate in the CAN bus activities. More...
IFX_INLINE void | IfxMultican_Node_deactivate (Ifx_CAN_N *hwNode)
Deactivate the CAN Node. Take out from participation in the CAN bus activities. More...
IFX_INLINE void | IfxMultican_Node_disableConfigurationChange (Ifx_CAN_N *hwNode)
Disables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node. More...
IFX_INLINE void | IfxMultican_Node_enableConfigurationChange (Ifx_CAN_N *hwNode)
Enables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node. More...
IFX_INLINE Ifx_CAN_N * | IfxMultican_Node_getPointer (Ifx_CAN *mcan, IfxMultican_NodeId node)
Returns the base address to a given CAN node number. More...
IFX_INLINE void | IfxMultican_Node_resetControlRegister (Ifx_CAN_N *hwNode)
Resets the control register of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_resetErrorCounters (Ifx_CAN_N *hwNode)
Resets the error counters of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_resetInterruptPointers (Ifx_CAN_N *hwNode)
Resets the interrupt pointers of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setAlertInterrupt (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the alert interrupt of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setAlertInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for an alert interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setAnalyzerMode (Ifx_CAN_N *hwNode, boolean mode)
Enables / Disables the analyzer mode of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setErrorWarningLevel (Ifx_CAN_N *hwNode, uint8 level)
Determines the threshold value (warning level, default 96) to be reached
in order to set the corresponding error warning bit EWRN. More...
IFX_INLINE void | IfxMultican_Node_setFastNode (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the flexible data rate of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setFrameCounterInterrupt (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the CAN frame counter overflow interrupt of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setFrameCounterInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a frame counter overflow interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setFrameCounterMode (Ifx_CAN_N *hwNode, IfxMultican_FrameCounterMode mode)
Sets the operation mode of the frame counter of the CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setLastErrorCodeInterrupt (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the last error code interrupt of CAN node x.
This interrupt is generated with each hardware update of bit field NSRx.LEC with LEC > 0 (CAN protocol error). More...
IFX_INLINE void | IfxMultican_Node_setLastErrorCodeInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for an LEC interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setLoopBackMode (Ifx_CAN_N *hwNode, boolean mode)
Enables / Disables the loopback mode of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setReceiveErrorCounter (Ifx_CAN_N *hwNode, uint8 value)
Sets the value of the receive error counter of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setTimerEventInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a timer event interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setTransceiverDelayCompensation (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the transceiver delay compensation of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setTransceiverDelayCompensationOffset (Ifx_CAN_N *hwNode, uint16 value)
Sets transceiver delay ompensation offset of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setTransferInterrupt (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the transfer interrupt of CAN node x.
This interrupt is generated after the successful reception or transmission of a CAN frame in node x. More...
IFX_INLINE void | IfxMultican_Node_setTransferInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a transfer OK interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setTransmitErrorCounter (Ifx_CAN_N *hwNode, uint8 value)
Sets the value of the transmit error counter of CAN node x. More...
IFX_INLINE IfxMultican_DataLengthCode | IfxMultican_Node_getCodeFromDataLength (uint32 dataLength)
Return the DLC code corresponding to the data length in byte. More...
IFX_INLINE uint32 | IfxMultican_Node_getDataLengthFromCode (IfxMultican_DataLengthCode code)
Get the datalength in bytes from DLC. More...
IFX_EXTERN void | IfxMultican_Node_deinit (Ifx_CAN_N *hwNode)
Reset the CAN node. More...
IFX_EXTERN boolean | IfxMultican_Node_initRxPin (Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin. More...
IFX_EXTERN boolean | IfxMultican_Node_initTxPin (Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Node_recoverBusOff (Ifx_CAN_N *hwNode)
Recovers the CAN node from bus off. More...
IFX_EXTERN void | IfxMultican_Node_setBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTR register. More...
IFX_EXTERN void | IfxMultican_calcTimingFromBTR (float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth)
Returns the CAN node timing. More...
IFX_INLINE void | IfxMultican_Message_init (IfxMultican_Message *msg, uint32 id, uint32 dataLow, uint32 dataHigh, IfxMultican_DataLengthCode lengthCode)
Initializes a CAN message. More...
IFX_INLINE void | IfxMultican_Message_longFrameInit (IfxMultican_Message *msg, uint32 id, IfxMultican_DataLengthCode lengthCode, boolean fastBitRate)
Initializes a CAN message long frame. More...
IFX_INLINE void | IfxMultican_MsgObj_clearDataRegisters (Ifx_CAN_MO *hwObj)
Sets priority class of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_clearFifoGatewayPointers (Ifx_CAN_MO *hwObj)
Clears the FIFO/GateWay pointers of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_clearRxPending (Ifx_CAN_MO *hwObj)
Clear the RX pending flag of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_clearTxPending (Ifx_CAN_MO *hwObj)
Clear the TX pending flag of a message object. More...
IFX_INLINE IfxMultican_MsgObjId | IfxMultican_MsgObj_getBottomObjectPointer (Ifx_CAN_MO *hwObj)
Gets bottom object pointer of the base message object. More...
IFX_INLINE IfxMultican_DataLengthCode | IfxMultican_MsgObj_getDataLengthCode (Ifx_CAN_MO *hwObj)
Gets data length code of a message object. More...
IFX_INLINE uint32 | IfxMultican_MsgObj_getMessageId (Ifx_CAN_MO *hwObj)
Gets message identifier of message object. More...
IFX_INLINE IfxMultican_MsgObjId | IfxMultican_MsgObj_getNextObjectPointer (Ifx_CAN_MO *hwObj)
Returns next object pointer (PNEXT) of the current message object. More...
IFX_INLINE Ifx_CAN_MO * | IfxMultican_MsgObj_getPointer (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Get base address of a message object register. More...
IFX_INLINE boolean | IfxMultican_MsgObj_isExtendedFrame (Ifx_CAN_MO *hwObj)
Get the message object status. More...
IFX_INLINE boolean | IfxMultican_MsgObj_isRxPending (Ifx_CAN_MO *hwObj)
Returns the RX pending flag of a message object. More...
IFX_INLINE boolean | IfxMultican_MsgObj_isTransmitRequested (Ifx_CAN_MO *hwObj)
Returns the TX Request flag of a message object. More...
IFX_INLINE boolean | IfxMultican_MsgObj_isTxPending (Ifx_CAN_MO *hwObj)
Returns the TX pending flag of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setAcceptanceMask (Ifx_CAN_MO *hwObj, uint32 mask, boolean extendedFrame)
Sets acceptance mask for the message identifier. More...
IFX_INLINE void | IfxMultican_MsgObj_setBitRateSwitch (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable bit rate switch of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setBottomObjectPointer (Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom object pointer of the base message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setCurrentObjectPointer (Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom current pointer of the base message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setDataCopy (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable data copy of a gateway source message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setDataLengthCode (Ifx_CAN_MO *hwObj, IfxMultican_DataLengthCode code)
Sets data length code of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setDataLengthCodeCopy (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable data length code copy of a gateway source message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setExtendedDataLength (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable extended data length of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setGatewayDataFrameSend (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable gateway data frame send of a gateway source message object which in turn sets the TXRQ of the gateway deatination object. More...
IFX_INLINE void | IfxMultican_MsgObj_setIdentifierCopy (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable identifier copy of a gateway source message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setIdentifierExtension (Ifx_CAN_MO *hwObj, boolean extension)
Sets identifier extension of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setMatchingId (Ifx_CAN_MO *hwObj, boolean matchingId)
Sets acceptance mask for the message IDE bit. More...
IFX_INLINE void | IfxMultican_MsgObj_setMessageId (Ifx_CAN_MO *hwObj, uint32 messageId, boolean extendedFrame)
Sets message identifier of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setMessageMode (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjMode mode)
Sets the message mode of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setMessagePendingNumber (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjId messageNumber)
Sets message pending number that selects the bit position of the bit in the Message Pending Register
that is set upon a message object n receive/transmit interrupt. More...
IFX_INLINE void | IfxMultican_MsgObj_setOverflowInterrupt (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable overflow interrupt of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setPriorityClass (Ifx_CAN_MO *hwObj, IfxMultican_Priority priority)
Sets priority class of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setReceiveInterrupt (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable receive interrupt of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setReceiveInterruptNodePointer (Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
Sets receive interrupt node pointer of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setRemoteMonitoring (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable transmit object remote monitoring of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setSelectObjectPointer (Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom object select pointer of the base message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setSingleDataTransfer (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable single data transfer of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setSingleTransmitTrial (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable single transmit trial of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setTopObjectPointer (Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets top object pointer of the base message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setTransmitInterrupt (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable transmit interrupt of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setTransmitInterruptNodePointer (Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
Sets transmit interrupt node pointer of message object. More...
IFX_EXTERN boolean | IfxMultican_MsgObj_cancelSend (Ifx_CAN_MO *hwObj)
Cancel pending TX request by invalidating the request, only when frame transmission has not been started. More...
IFX_EXTERN void | IfxMultican_MsgObj_clearStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Clears the selected status flag of a message object. More...
IFX_EXTERN void | IfxMultican_MsgObj_deinit (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Reset the message object
Append the message object to the end of idle list and reset message object registers. More...
IFX_EXTERN IfxMultican_MsgObjId | IfxMultican_MsgObj_getPendingId (Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group. More...
IFX_EXTERN IfxMultican_MsgObjStat | IfxMultican_MsgObj_getStatus (Ifx_CAN_MO *hwObj)
Get the message object status. More...
IFX_EXTERN boolean | IfxMultican_MsgObj_getStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Gets the status of the selected status flag of a message object. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_readLongFrame (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Read a received CAN long frame. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_readMessage (Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
Read a received CAN message. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_sendLongFrame (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Send a CAN Long frame message. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_sendMessage (Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_writeTxfifo (Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message. More...
IFX_EXTERN void | IfxMultican_MsgObj_setFilter (Ifx_CAN_MO *hwObj, boolean extend, uint32 id, uint32 accMask)
Set message object filter. More...
IFX_EXTERN void | IfxMultican_MsgObj_setStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Sets the selected status flag of a message object. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxMultican_getSrcPointer (Ifx_CAN *mcan, IfxMultican_SrcId srcId)
Get the interrupt source register. More...

Detailed Description

MULTICAN basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMultican.h.

Data Structure Documentation

◆ IfxMultican_Message

struct IfxMultican_Message

CAN message definition.

Definition at line 241 of file IfxMultican.h.

Data Fields
uint32 | data[2] | CAN message data.
boolean | fastBitRate | CAN FD fast bit rate enable/disable.
uint32 | id | CAN message ID.
IfxMultican_DataLengthCode | lengthCode | CAN message data length code.

◆ IfxMultican_MsgObjStat

union IfxMultican_MsgObjStat

Message object status bit-fields.

Definition at line 251 of file IfxMultican.h.

Data Fields
Ifx_CAN_MO_STAT_Bits | B
unsigned int | U

Typedef Documentation

◆ IfxMultican_MsgObjId

typedef sint32 IfxMultican_MsgObjId

Message object ID, 0 .. IFXMULTICAN_NUM_MESSAGE_OBJECTS.

Definition at line 77 of file IfxMultican.h.


iLLD_TC26B: PORTS

Modules | Files
PORTS
iLLD
Collaboration diagram for PORTS:

Modules

Implementation
Standard Driver
PORT Pin Mapping
How to use the PORT I/O driver?
Interface Driver

Files

file | IfxPort_cfg.h
PORT on-chip implementation data.
file | IfxPort_PinMap.c
PORT I/O map.
file | IfxPort_PinMap.h
PORT I/O map.
file | IfxPort_Io.h
PORT IO details.
file | IfxPort.h
PORT basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » PORTS
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » PORTS
Collaboration diagram for Standard Driver:

Modules

Enumerations
Data structures
Single Pin Functions
Group Access Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » PORTS » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxPort_ControlledBy {
IfxPort_ControlledBy_port = 0,
IfxPort_ControlledBy_hsct = 1
}
The LVDS RX_DIS control function can be selected from the Port (default) or HSCT module.declared in MODULE_PORTx.LPCRx. More...
enum IfxPort_InputMode {
IfxPort_InputMode_undefined = -1,
IfxPort_InputMode_noPullDevice = 0 << 3,
IfxPort_InputMode_pullDown = 1U << 3,
IfxPort_InputMode_pullUp = 2U << 3
}
Ifx_P output modification modes definition. More...
enum IfxPort_Mode {
IfxPort_Mode_inputNoPullDevice = 0,
IfxPort_Mode_inputPullDown = 8U,
IfxPort_Mode_inputPullUp = 0x10U,
IfxPort_Mode_outputPushPullGeneral = 0x80U,
IfxPort_Mode_outputPushPullAlt1 = 0x88U,
IfxPort_Mode_outputPushPullAlt2 = 0x90U,
IfxPort_Mode_outputPushPullAlt3 = 0x98U,
IfxPort_Mode_outputPushPullAlt4 = 0xA0U,
IfxPort_Mode_outputPushPullAlt5 = 0xA8U,
IfxPort_Mode_outputPushPullAlt6 = 0xB0U,
IfxPort_Mode_outputPushPullAlt7 = 0xB8U,
IfxPort_Mode_outputOpenDrainGeneral = 0xC0U,
IfxPort_Mode_outputOpenDrainAlt1 = 0xC8U,
IfxPort_Mode_outputOpenDrainAlt2 = 0xD0U,
IfxPort_Mode_outputOpenDrainAlt3 = 0xD8U,
IfxPort_Mode_outputOpenDrainAlt4 = 0xE0U,
IfxPort_Mode_outputOpenDrainAlt5 = 0xE8U,
IfxPort_Mode_outputOpenDrainAlt6 = 0xF0U,
IfxPort_Mode_outputOpenDrainAlt7 = 0xF8U
}
Ifx_P input / output mode definition. More...
enum IfxPort_OutputIdx {
IfxPort_OutputIdx_general = 0x10U << 3,
IfxPort_OutputIdx_alt1 = 0x11U << 3,
IfxPort_OutputIdx_alt2 = 0x12U << 3,
IfxPort_OutputIdx_alt3 = 0x13U << 3,
IfxPort_OutputIdx_alt4 = 0x14U << 3,
IfxPort_OutputIdx_alt5 = 0x15U << 3,
IfxPort_OutputIdx_alt6 = 0x16U << 3,
IfxPort_OutputIdx_alt7 = 0x17U << 3
}
Pin output alternate index. More...
enum IfxPort_OutputMode {
IfxPort_OutputMode_pushPull = 0x10U << 3,
IfxPort_OutputMode_openDrain = 0x18U << 3,
IfxPort_OutputMode_none = 0
}
Pin output mode definition. More...
enum IfxPort_PadDriver {
IfxPort_PadDriver_cmosAutomotiveSpeed1 = 0,
IfxPort_PadDriver_cmosAutomotiveSpeed2 = 1,
IfxPort_PadDriver_cmosAutomotiveSpeed3 = 2,
IfxPort_PadDriver_cmosAutomotiveSpeed4 = 3,
IfxPort_PadDriver_lvdsSpeed1 = 4,
IfxPort_PadDriver_lvdsSpeed2 = 5,
IfxPort_PadDriver_lvdsSpeed3 = 6,
IfxPort_PadDriver_lvdsSpeed4 = 7,
IfxPort_PadDriver_ttlSpeed1 = 8,
IfxPort_PadDriver_ttlSpeed2 = 9,
IfxPort_PadDriver_ttlSpeed3 = 10,
IfxPort_PadDriver_ttlSpeed4 = 11
}
Pad driver mode definition (strength and slew rate). More...
enum IfxPort_PadSupply {
IfxPort_PadSupply_5v = 0,
IfxPort_PadSupply_3v = 1
}
MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair. More...
enum IfxPort_State {
IfxPort_State_notChanged = (0 << 16) | (0 << 0),
IfxPort_State_high = (0 << 16) | (1U << 0),
IfxPort_State_low = (1U << 16) | (0 << 0),
IfxPort_State_toggled = (1U << 16) | (1U << 0)
}
Ifx_P output modification modes definition. More...

Detailed Description

Enumeration Type Documentation

◆ IfxPort_ControlledBy

enum IfxPort_ControlledBy

The LVDS RX_DIS control function can be selected from the Port (default) or HSCT module.declared in MODULE_PORTx.LPCRx.

Enumerator
IfxPort_ControlledBy_port | port controlled by PORT Module
IfxPort_ControlledBy_hsct | Port controlled by HSCT Module.

Definition at line 72 of file IfxPort.h.

◆ IfxPort_InputMode

enum IfxPort_InputMode

Ifx_P output modification modes definition.

Enumerator
IfxPort_InputMode_undefined
IfxPort_InputMode_noPullDevice
IfxPort_InputMode_pullDown
IfxPort_InputMode_pullUp

Definition at line 80 of file IfxPort.h.

◆ IfxPort_Mode

enum IfxPort_Mode

Ifx_P input / output mode definition.

See also
Ifx_P.IOCR, IfxPort_setPinMode()
Enumerator
IfxPort_Mode_inputNoPullDevice | Input, No pull device connected.
IfxPort_Mode_inputPullDown | Input, pull-down device connected.
IfxPort_Mode_inputPullUp | Input, pull-up device connected.
IfxPort_Mode_outputPushPullGeneral | Push-pull, General-purpose output.
IfxPort_Mode_outputPushPullAlt1 | Push-pull, Alternate output function 1.
IfxPort_Mode_outputPushPullAlt2 | Push-pull, Alternate output function 2.
IfxPort_Mode_outputPushPullAlt3 | Push-pull, Alternate output function 3.
IfxPort_Mode_outputPushPullAlt4 | Push-pull, Alternate output function 4.
IfxPort_Mode_outputPushPullAlt5 | Push-pull, Alternate output function 5.
IfxPort_Mode_outputPushPullAlt6 | Push-pull, Alternate output function 6.
IfxPort_Mode_outputPushPullAlt7 | Push-pull, Alternate output function 7.
IfxPort_Mode_outputOpenDrainGeneral | Open-drain, General-purpose output.
IfxPort_Mode_outputOpenDrainAlt1 | Open-drain, Alternate output function 1.
IfxPort_Mode_outputOpenDrainAlt2 | Open-drain, Alternate output function 2.
IfxPort_Mode_outputOpenDrainAlt3 | Open-drain, Alternate output function 3.
IfxPort_Mode_outputOpenDrainAlt4 | Open-drain, Alternate output function 4.
IfxPort_Mode_outputOpenDrainAlt5 | Open-drain, Alternate output function 5.
IfxPort_Mode_outputOpenDrainAlt6 | Open-drain, Alternate output function 6.
IfxPort_Mode_outputOpenDrainAlt7 | Open-drain, Alternate output function 7.

Definition at line 92 of file IfxPort.h.

◆ IfxPort_OutputIdx

enum IfxPort_OutputIdx

Pin output alternate index.

Enumerator
IfxPort_OutputIdx_general
IfxPort_OutputIdx_alt1
IfxPort_OutputIdx_alt2
IfxPort_OutputIdx_alt3
IfxPort_OutputIdx_alt4
IfxPort_OutputIdx_alt5
IfxPort_OutputIdx_alt6
IfxPort_OutputIdx_alt7

Definition at line 117 of file IfxPort.h.

◆ IfxPort_OutputMode

enum IfxPort_OutputMode

Pin output mode definition.

Enumerator
IfxPort_OutputMode_pushPull
IfxPort_OutputMode_openDrain
IfxPort_OutputMode_none

Definition at line 131 of file IfxPort.h.

◆ IfxPort_PadDriver

enum IfxPort_PadDriver

Pad driver mode definition (strength and slew rate).

See also
Ifx_P.PDR, IfxPort_setPinPadDriver()
Enumerator
IfxPort_PadDriver_cmosAutomotiveSpeed1 | Speed grade 1.
IfxPort_PadDriver_cmosAutomotiveSpeed2 | Speed grade 2.
IfxPort_PadDriver_cmosAutomotiveSpeed3 | Speed grade 3.
IfxPort_PadDriver_cmosAutomotiveSpeed4 | Speed grade 4.
IfxPort_PadDriver_lvdsSpeed1 | Lvds Speed grade 1.
IfxPort_PadDriver_lvdsSpeed2 | Lvds Speed grade 2.
IfxPort_PadDriver_lvdsSpeed3 | Lvds Speed grade 3.
IfxPort_PadDriver_lvdsSpeed4 | Lvds Speed grade 4.
IfxPort_PadDriver_ttlSpeed1 | Speed grade 1.
IfxPort_PadDriver_ttlSpeed2 | Speed grade 2.
IfxPort_PadDriver_ttlSpeed3 | Speed grade 3.
IfxPort_PadDriver_ttlSpeed4 | Speed grade 4.

Definition at line 142 of file IfxPort.h.

◆ IfxPort_PadSupply

enum IfxPort_PadSupply

MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair.

Enumerator
IfxPort_PadSupply_5v | select, 5V supply
IfxPort_PadSupply_3v | select, 3V supply

Definition at line 160 of file IfxPort.h.

◆ IfxPort_State

enum IfxPort_State

Ifx_P output modification modes definition.

See also
Ifx_P.OMR, IfxPort_setPinState()
Enumerator
IfxPort_State_notChanged | Ifx_P pin is left unchanged.
IfxPort_State_high | Ifx_P pin is set to high.
IfxPort_State_low | Ifx_P pin is set to low.
IfxPort_State_toggled | Ifx_P pin is toggled.

Definition at line 170 of file IfxPort.h.


iLLD_TC26B: Data structures

Data Structures
Data structures
iLLD » PORTS » Standard Driver
Collaboration diagram for Data structures:

Data Structures

struct | IfxPort_Pin
Defines a pin. More...
struct | IfxPort_Pin_Config
To configure pins. More...

Detailed Description

Data Structure Documentation

◆ IfxPort_Pin

struct IfxPort_Pin

Defines a pin.

Definition at line 188 of file IfxPort.h.

Data Fields
uint8 | pinIndex
Ifx_P * | port

◆ IfxPort_Pin_Config

struct IfxPort_Pin_Config

To configure pins.

Definition at line 196 of file IfxPort.h.

Data Fields
IfxPort_OutputIdx | mode
IfxPort_PadDriver | padDriver
uint8 | pinIndex
Ifx_P * | port


iLLD_TC26B: Single Pin Functions

Functions
Single Pin Functions
iLLD » PORTS » Standard Driver
Collaboration diagram for Single Pin Functions:

Functions

IFX_INLINE boolean | IfxPort_getPinState (Ifx_P *port, uint8 pinIndex)
Return the port state. More...
IFX_INLINE void | IfxPort_setPinHigh (Ifx_P *port, uint8 pinIndex)
Set the port output. More...
IFX_INLINE void | IfxPort_setPinLow (Ifx_P *port, uint8 pinIndex)
Reset the port output. More...
IFX_INLINE void | IfxPort_setPinModeInput (Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode. More...
IFX_INLINE void | IfxPort_setPinModeOutput (Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode. More...
IFX_INLINE void | IfxPort_setPinState (Ifx_P *port, uint8 pinIndex, IfxPort_State action)
Set / Resets / Toggle the port output. More...
IFX_INLINE void | IfxPort_togglePin (Ifx_P *port, uint8 pinIndex)
Toggle the port output. More...
IFX_EXTERN boolean | IfxPort_disableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality. More...
IFX_EXTERN boolean | IfxPort_enableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality. More...
IFX_EXTERN void | IfxPort_setPinMode (Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality which bydefault support analog functionality. More...
IFX_EXTERN void | IfxPort_setPinPadDriver (Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode. More...

Detailed Description

Function Documentation

◆ IfxPort_disableEmergencyStop()

IFX_EXTERN boolean IfxPort_disableEmergencyStop | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be disabled.
Returns
Returns TRUE if the emergency stop function has been disabled; FALSE if the emergency stop function could not be disabled

Coding example: /code if( !IfxPort_disableEmergencyStop(&MODULE_P33, 0) ) { // failed to disable emergency stop for P33.0 } /endcode

See also
IfxPort_disableEmergencyStop(), IfxPort_resetESR()

Definition at line 52 of file IfxPort.c.

◆ IfxPort_enableEmergencyStop()

IFX_EXTERN boolean IfxPort_enableEmergencyStop | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be enabled.
Returns
Returns TRUE if the emergency stop function has been enabled; FALSE if the emergency stop function could not be enabled

Coding example:

if( !IfxPort_enableEmergencyStop(&MODULE_P33, 0) ) {
// failed to enable emergency stop for P33.0
}
See also
IfxPort_disableEmergencyStop(), IfxPort_setESR()

Definition at line 75 of file IfxPort.c.

◆ IfxPort_getPinState()

IFX_INLINE boolean IfxPort_getPinState | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Return the port state.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the state should be returned.
Returns
Returns TRUE the pin is high; FALSE the pin is low

Coding example:

if( IfxPort_getPinState(&MODULE_P33, 0) ) {
// ...
}

Definition at line 554 of file IfxPort.h.

◆ IfxPort_setPinHigh()

IFX_INLINE void IfxPort_setPinHigh | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Set the port output.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be set.
Returns
None

Coding example:

IfxPort_setPinHigh(&MODULE_P33, 0);
See also
IfxPort_setPinState(), IfxPort_setPinLow(), IfxPort_togglePin()

Definition at line 566 of file IfxPort.h.

◆ IfxPort_setPinLow()

IFX_INLINE void IfxPort_setPinLow | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Reset the port output.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be reset.
Returns
None

Coding example:

IfxPort_setPinLow(&MODULE_P33, 0);
See also
IfxPort_setPinState(), IfxPort_setPinHigh(), IfxPort_togglePin()

Definition at line 572 of file IfxPort.h.

◆ IfxPort_setPinMode()

IFX_EXTERN void IfxPort_setPinMode | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_Mode | mode
 | ) |  |

Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality which bydefault support analog functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be configured.
mode | Specifies the port pin mode.
Returns
None

Coding example:

IfxPort_setPinMode(&MODULE_P33, 0, IfxPort_Mode_outputPushPullGeneral);

Definition at line 277 of file IfxPort.c.

Referenced by IfxPort_Io_initModule(), IfxPort_setPinModeInput(), and IfxPort_setPinModeOutput().

◆ IfxPort_setPinModeInput()

IFX_INLINE void IfxPort_setPinModeInput | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_InputMode | mode
 | ) |  |

Configure the port input / output mode.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be configured.
mode | Specifies the port pin mode.
Returns
None

Coding example:

IfxPort_setPinModeInput(&MODULE_P33, 0, IfxPort_InputMode_pullUp);

Definition at line 578 of file IfxPort.h.

Referenced by IfxAsclin_initCtsPin(), IfxAsclin_initRxPin(), IfxCcu6_initCc60InPin(), IfxCcu6_initCc60InPinWithPadLevel(), IfxCcu6_initCc61InPin(), IfxCcu6_initCc61InPinWithPadLevel(), IfxCcu6_initCc62InPin(), IfxCcu6_initCc62InPinWithPadLevel(), IfxCcu6_initCcpos0Pin(), IfxCcu6_initCcpos0PinWithPadLevel(), IfxCcu6_initCcpos1Pin(), IfxCcu6_initCcpos1PinWithPadLevel(), IfxCcu6_initCcpos2Pin(), IfxCcu6_initCcpos2PinWithPadLevel(), IfxCcu6_initCtrapPin(), IfxCcu6_initCtrapPinWithPadLevel(), IfxCcu6_initT12hrPin(), IfxCcu6_initT12hrPinWithPadLevel(), IfxCcu6_initT13hrPin(), IfxCcu6_initT13hrPinWithPadLevel(), IfxCif_Cam_initPortPins(), IfxDsadc_initCinPin(), IfxDsadc_initDinPin(), IfxDsadc_initDsnPin(), IfxDsadc_initDspPin(), IfxDsadc_initItrPin(), IfxDsadc_initSgPin(), IfxEray_initRxPin(), IfxEray_initRxPinWithPadLevel(), IfxEth_setupMiiInputPins(), IfxEth_setupRmiiInputPins(), IfxGpt12_initCapInPin(), IfxGpt12_initCapInPinWithPadLevel(), IfxGpt12_initTxEudInPin(), IfxGpt12_initTxEudInPinWithPadLevel(), IfxGpt12_initTxInPin(), IfxGpt12_initTxInPinWithPadLevel(), IfxGtm_PinMap_setTimTin(), IfxHssl_Hssl_initHsctModule(), IfxMsc_initInjPin(), IfxMsc_initSdiPin(), IfxMultican_Node_initRxPin(), IfxPsi5_initRxPin(), IfxPsi5s_initRxPin(), IfxQspi_initMrstInPin(), IfxQspi_initMrstInPinWithPadLevel(), IfxQspi_initMtsrInPin(), IfxQspi_initMtsrInPinWithPadLevel(), IfxQspi_initSclkInPin(), IfxQspi_initSclkInPinWithPadLevel(), IfxQspi_initSlsi(), IfxQspi_initSlsiWithPadLevel(), IfxScuEru_initReqPin(), and IfxSent_initSentPin().

◆ IfxPort_setPinModeOutput()

IFX_INLINE void IfxPort_setPinModeOutput | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_OutputMode | mode,
 |  | IfxPort_OutputIdx | index
 | ) |  |

Configure the port input / output mode.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be configured.
mode | Specifies the port pin mode.
index | Specifies the alternate (or general purpose) output channel.
Returns
None

Coding example:

IfxPort_setPinModeOutput(&MODULE_P33, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);

Definition at line 584 of file IfxPort.h.

Referenced by IfxAsclin_initRtsPin(), IfxAsclin_initSclkPin(), IfxAsclin_initSlsoPin(), IfxAsclin_initTxPin(), IfxCcu6_initCc60OutPin(), IfxCcu6_initCc61OutPin(), IfxCcu6_initCc62OutPin(), IfxCcu6_initCout60Pin(), IfxCcu6_initCout61Pin(), IfxCcu6_initCout62Pin(), IfxCcu6_initCout63Pin(), IfxDsadc_initCgPwmPin(), IfxDsadc_initCoutPin(), IfxDsadc_Rdc_initHwChannels(), IfxEray_initTxEnPin(), IfxEray_initTxPin(), IfxEth_setupMiiOutputPins(), IfxEth_setupRmiiOutputPins(), IfxGpt12_initTxOutPin(), IfxGtm_PinMap_setAtomTout(), IfxGtm_PinMap_setTomTout(), IfxHssl_Hssl_initHsctModule(), IfxI2c_initSclSdaPin(), IfxMsc_initEnPin(), IfxMsc_initFclnPin(), IfxMsc_initFclpPin(), IfxMsc_initSonPin(), IfxMsc_initSopPin(), IfxMultican_Node_initTxPin(), IfxPsi5_initTxPin(), IfxPsi5s_initClkPin(), IfxPsi5s_initTxPin(), IfxQspi_initMrstOutPin(), IfxQspi_initMtsrOutPin(), IfxQspi_initSclkOutPin(), IfxQspi_initSlso(), IfxSent_initSpcPin(), IfxSmu_initFsp(), IfxVadc_initEmuxPin(), and IfxVadc_initGxBflPin().

◆ IfxPort_setPinPadDriver()

IFX_EXTERN void IfxPort_setPinPadDriver | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Configure the pad driver mode.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the mode will be set.
padDriver | Specifies the driver mode.
Returns
None

Coding example:

// enable strong 3.3V driver
IfxPort_setPinPadDriver(&MODULE_P33, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);

Definition at line 340 of file IfxPort.c.

Referenced by IfxAsclin_initCtsPin(), IfxAsclin_initRtsPin(), IfxAsclin_initRxPin(), IfxAsclin_initSclkPin(), IfxAsclin_initSlsoPin(), IfxAsclin_initTxPin(), IfxCcu6_initCc60InPinWithPadLevel(), IfxCcu6_initCc60OutPin(), IfxCcu6_initCc61InPinWithPadLevel(), IfxCcu6_initCc61OutPin(), IfxCcu6_initCc62InPinWithPadLevel(), IfxCcu6_initCc62OutPin(), IfxCcu6_initCcpos0PinWithPadLevel(), IfxCcu6_initCcpos1PinWithPadLevel(), IfxCcu6_initCcpos2PinWithPadLevel(), IfxCcu6_initCout60Pin(), IfxCcu6_initCout61Pin(), IfxCcu6_initCout62Pin(), IfxCcu6_initCout63Pin(), IfxCcu6_initCtrapPinWithPadLevel(), IfxCcu6_initT12hrPinWithPadLevel(), IfxCcu6_initT13hrPinWithPadLevel(), IfxDsadc_initCgPwmPin(), IfxDsadc_initCinPin(), IfxDsadc_initCoutPin(), IfxDsadc_initDinPin(), IfxDsadc_initDsnPin(), IfxDsadc_initDspPin(), IfxDsadc_initItrPin(), IfxDsadc_initSgPin(), IfxDsadc_Rdc_initHwChannels(), IfxEray_initRxPinWithPadLevel(), IfxEray_initTxEnPin(), IfxEray_initTxPin(), IfxEth_setupMiiInputPins(), IfxEth_setupMiiOutputPins(), IfxEth_setupRmiiInputPins(), IfxEth_setupRmiiOutputPins(), IfxGpt12_initCapInPinWithPadLevel(), IfxGpt12_initTxEudInPinWithPadLevel(), IfxGpt12_initTxInPinWithPadLevel(), IfxGpt12_initTxOutPin(), IfxGtm_PinMap_setAtomTout(), IfxGtm_PinMap_setTomTout(), IfxHssl_Hssl_initHsctModule(), IfxI2c_initSclSdaPin(), IfxMsc_initEnPin(), IfxMsc_initFclnPin(), IfxMsc_initFclpPin(), IfxMsc_initInjPin(), IfxMsc_initSdiPin(), IfxMsc_initSonPin(), IfxMsc_initSopPin(), IfxMultican_Node_initRxPin(), IfxMultican_Node_initTxPin(), IfxPort_Io_initModule(), IfxPsi5_initRxPin(), IfxPsi5_initTxPin(), IfxPsi5s_initClkPin(), IfxPsi5s_initRxPin(), IfxPsi5s_initTxPin(), IfxQspi_initMrstInPinWithPadLevel(), IfxQspi_initMrstOutPin(), IfxQspi_initMtsrInPinWithPadLevel(), IfxQspi_initMtsrOutPin(), IfxQspi_initSclkInPinWithPadLevel(), IfxQspi_initSclkOutPin(), IfxQspi_initSlsiWithPadLevel(), IfxQspi_initSlso(), IfxSent_initSentPin(), IfxSent_initSpcPin(), IfxSmu_initFsp(), IfxVadc_initEmuxPin(), and IfxVadc_initGxBflPin().

◆ IfxPort_setPinState()

IFX_INLINE void IfxPort_setPinState | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_State | action
 | ) |  |

Set / Resets / Toggle the port output.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to modify.
action | Specifies the action: set, reset, toggle.
Returns
None

Coding example:

IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);

Definition at line 590 of file IfxPort.h.

Referenced by IfxGtm_Tom_PwmHl_init(), IfxPort_setPinHigh(), IfxPort_setPinLow(), IfxPort_togglePin(), IfxQspi_SpiMaster_activateSlso(), and IfxQspi_SpiMaster_deactivateSlso().

◆ IfxPort_togglePin()

IFX_INLINE void IfxPort_togglePin | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Toggle the port output.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be toggled.
Returns
None

Coding example:

IfxPort_togglePin(&MODULE_P33, 0);
See also
IfxPort_setPinState(), IfxPort_setPinLow(), IfxPort_setPinHigh()

Definition at line 596 of file IfxPort.h.


iLLD_TC26B: Group Access Functions

Functions
Group Access Functions
iLLD » PORTS » Standard Driver
Collaboration diagram for Group Access Functions:

Functions

IFX_INLINE uint32 | IfxPort_getGroupState (Ifx_P *port, uint8 pinIndex, uint16 mask)
Return the port group state. More...
IFX_INLINE void | IfxPort_setGroupState (Ifx_P *port, uint8 pinIndex, uint16 mask, uint16 data)
Set the port group state. More...
IFX_EXTERN Ifx_P * | IfxPort_getAddress (IfxPort_Index port)
Returns the module address of the selected Port module. More...
IFX_EXTERN IfxPort_Index | IfxPort_getIndex (Ifx_P *port)
Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c) More...
IFX_EXTERN void | IfxPort_setGroupModeInput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
Set pin modes to input at the pin location specified by '1' by the mask. More...
IFX_EXTERN void | IfxPort_setGroupModeOutput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Set pin modes to output at the pin location specified by '1' by the mask starting at pinIndex. More...
IFX_EXTERN void | IfxPort_setGroupPadDriver (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
Set pad driver strength at the pin location specified by '1' by the mask. More...
IFX_EXTERN void | IfxPort_setPinModeLvdsHigh (Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode, IfxPort_ControlledBy enablePortControlled)
set LVDSH mode (configured for Port21) More...
IFX_EXTERN void | IfxPort_setPinModeLvdsMedium (Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver lvdsPadDriver, IfxPort_PadSupply padSupply)
set LVDSM mode More...

Detailed Description

Function Documentation

◆ IfxPort_getAddress()

IFX_EXTERN Ifx_P* IfxPort_getAddress ( IfxPort_Index port )

Returns the module address of the selected Port module.

Parameters
port Pointer to PORT module registers
Returns
PORT module register address

Definition at line 96 of file IfxPort.c.

◆ IfxPort_getGroupState()

IFX_INLINE uint32 IfxPort_getGroupState | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | uint16 | mask
 | ) |  |

Return the port group state.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | start at the given pin
mask | selects the pins which should be read (starting from pinIndex)
Returns
Returns the selected pin values

Coding example:

// read the current value of P33[7:0]
uint16 value = IfxPort_getGroupState(&MODULE_P33, 0, 0xff);

Definition at line 548 of file IfxPort.h.

◆ IfxPort_getIndex()

IFX_EXTERN IfxPort_Index IfxPort_getIndex ( Ifx_P * port )

Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c)

Parameters
port Pointer to the port for which the index number in IfxModule_IndexMap should be retrieved.
Returns
port index of IfxModule_IndexMap. return -1 in case of unknown port index.

Definition at line 115 of file IfxPort.c.

◆ IfxPort_setGroupModeInput()

IFX_EXTERN void IfxPort_setGroupModeInput | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | uint16 | mask,
 |  | IfxPort_InputMode | mode
 | ) |  |

Set pin modes to input at the pin location specified by '1' by the mask.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | start at the given pin
mask | selects the pins which should be modified (starting from pinIndex)
mode | Specifies the port pin mode.
Returns
None

Coding example:

// configure P33.[7:0] as GPIO inputs with Pull-Down enabled
IfxPort_setGroupModeInput(&MODULE_P33, 0, 0xff, IfxPort_InputMode_pullDown);

Definition at line 155 of file IfxPort.c.

Referenced by IfxCif_Cam_initPortPins().

◆ IfxPort_setGroupModeOutput()

IFX_EXTERN void IfxPort_setGroupModeOutput | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | uint16 | mask,
 |  | IfxPort_OutputMode | mode,
 |  | IfxPort_OutputIdx | index
 | ) |  |

Set pin modes to output at the pin location specified by '1' by the mask starting at pinIndex.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | start at the given pin
mask | selects the pins which should be modified (starting from pinIndex)
mode | Specifies the port pin mode.
index | Specifies the alternate (or general purpose) output channel.
Returns
None

Coding example:

// configure P33.[7:0] as GPIO outputs
IfxPort_setGroupModeOutput(&MODULE_P33, 0, 0xff, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);

Definition at line 193 of file IfxPort.c.

◆ IfxPort_setGroupPadDriver()

IFX_EXTERN void IfxPort_setGroupPadDriver | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | uint16 | mask,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Set pad driver strength at the pin location specified by '1' by the mask.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | start at the given pin
mask | selects the pins which should be modified (starting from pinIndex)
padDriver | Specifies the pad driver strength.
Returns
None

Coding example:

// configure P33.[7:0] to use CMOS pad driver with speed 1
IfxPort_setGroupPadDriver(&MODULE_P33, 0, 0xff, IfxPort_PadDriver_cmosAutomotiveSpeed1);

Definition at line 233 of file IfxPort.c.

Referenced by IfxCif_Cam_initPortPins().

◆ IfxPort_setGroupState()

IFX_INLINE void IfxPort_setGroupState | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | uint16 | mask,
 |  | uint16 | data
 | ) |  |

Set the port group state.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | start at the given pin
mask | selects the pins which should be modified (starting from pinIndex)
data | specifies the value which should be set
Returns
None

Coding example:

// configure P33.[7:0] as GPIO outputs
IfxPort_setGroupModeOutput(&MODULE_P33, 0, 0xff, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
// set initial value
IfxPort_setGroupState(&MODULE_P33, 0, 0xff, 0x42);

Definition at line 560 of file IfxPort.h.

◆ IfxPort_setPinModeLvdsHigh()

IFX_EXTERN void IfxPort_setPinModeLvdsHigh | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_Mode | mode,
 |  | IfxPort_ControlledBy | enablePortControlled
 | ) |  |

set LVDSH mode (configured for Port21)

Parameters
port | Pointer to the port which should be accessed.
pinIndex | specifies pin to be modified
mode | specifes the mode of pin
enablePortControlled | specifies whether it is controlled by port or HSCT
Returns
None

Definition at line 295 of file IfxPort.c.

◆ IfxPort_setPinModeLvdsMedium()

IFX_EXTERN void IfxPort_setPinModeLvdsMedium | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_PadDriver | lvdsPadDriver,
 |  | IfxPort_PadSupply | padSupply
 | ) |  |

set LVDSM mode

Parameters
port | Pointer to the port which should be accessed.
pinIndex | specifies pin to be modified
lvdsPadDriver | select speed grade of LVDS Pad
padSupply | select the PAD supply (5/3.3V)
Returns
None

Definition at line 322 of file IfxPort.c.


iLLD_TC26B: PORT Pin Mapping

Macros | Variables
PORT Pin Mapping
iLLD » PORTS
Collaboration diagram for PORT Pin Mapping:

Macros

#define | IFXPORT_PINMAP_NUM_MODULES 41
Table dimensions. More...
#define | IFXPORT_PINMAP_PIN_NUM_ITEMS 15

Variables

IFX_EXTERN IfxPort_Pin IfxPort_P00_0
IfxPort_P00_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_1
IfxPort_P00_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_10
IfxPort_P00_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_11
IfxPort_P00_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_12
IfxPort_P00_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_2
IfxPort_P00_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_3
IfxPort_P00_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_4
IfxPort_P00_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_5
IfxPort_P00_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_6
IfxPort_P00_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_7
IfxPort_P00_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_8
IfxPort_P00_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_9
IfxPort_P00_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_0
IfxPort_P02_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_1
IfxPort_P02_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_2
IfxPort_P02_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_3
IfxPort_P02_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_4
IfxPort_P02_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_5
IfxPort_P02_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_6
IfxPort_P02_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_7
IfxPort_P02_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_8
IfxPort_P02_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_0
IfxPort_P10_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_1
IfxPort_P10_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_2
IfxPort_P10_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_3
IfxPort_P10_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_4
IfxPort_P10_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_5
IfxPort_P10_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_6
IfxPort_P10_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_7
IfxPort_P10_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_8
IfxPort_P10_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_10
IfxPort_P11_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_11
IfxPort_P11_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_12
IfxPort_P11_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_2
IfxPort_P11_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_3
IfxPort_P11_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_6
IfxPort_P11_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_9
IfxPort_P11_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_0
IfxPort_P13_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_1
IfxPort_P13_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_2
IfxPort_P13_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_3
IfxPort_P13_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_0
IfxPort_P14_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_1
IfxPort_P14_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_10
IfxPort_P14_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_2
IfxPort_P14_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_3
IfxPort_P14_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_4
IfxPort_P14_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_5
IfxPort_P14_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_6
IfxPort_P14_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_7
IfxPort_P14_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_8
IfxPort_P14_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_9
IfxPort_P14_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_0
IfxPort_P15_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_1
IfxPort_P15_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_2
IfxPort_P15_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_3
IfxPort_P15_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_4
IfxPort_P15_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_5
IfxPort_P15_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_6
IfxPort_P15_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_7
IfxPort_P15_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_8
IfxPort_P15_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_0
IfxPort_P20_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_1
IfxPort_P20_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_10
IfxPort_P20_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_11
IfxPort_P20_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_12
IfxPort_P20_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_13
IfxPort_P20_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_14
IfxPort_P20_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_3
IfxPort_P20_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_6
IfxPort_P20_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_7
IfxPort_P20_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_8
IfxPort_P20_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_9
IfxPort_P20_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_0
IfxPort_P21_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_1
IfxPort_P21_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_2
IfxPort_P21_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_3
IfxPort_P21_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_4
IfxPort_P21_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_5
IfxPort_P21_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_6
IfxPort_P21_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_7
IfxPort_P21_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_0
IfxPort_P22_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_1
IfxPort_P22_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_2
IfxPort_P22_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_3
IfxPort_P22_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_0
IfxPort_P23_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_1
IfxPort_P23_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_2
IfxPort_P23_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_3
IfxPort_P23_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_4
IfxPort_P23_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_5
IfxPort_P23_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_0
IfxPort_P32_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_2
IfxPort_P32_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_3
IfxPort_P32_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_4
IfxPort_P32_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_0
IfxPort_P33_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_1
IfxPort_P33_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_10
IfxPort_P33_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_11
IfxPort_P33_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_12
IfxPort_P33_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_13
IfxPort_P33_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_2
IfxPort_P33_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_3
IfxPort_P33_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_4
IfxPort_P33_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_5
IfxPort_P33_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_6
IfxPort_P33_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_7
IfxPort_P33_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_8
IfxPort_P33_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_9
IfxPort_P33_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_0
IfxPort_P40_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_1
IfxPort_P40_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_2
IfxPort_P40_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_3
IfxPort_P40_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_6
IfxPort_P40_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_7
IfxPort_P40_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_8
IfxPort_P40_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_9
IfxPort_P40_9. More...
IFX_EXTERN const IfxPort_Pin * IfxPort_Pin_pinTable [IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]
IfxPort_Pin table. More...

Detailed Description

Macro Definition Documentation

◆ IFXPORT_PINMAP_NUM_MODULES

#define IFXPORT_PINMAP_NUM_MODULES 41

Table dimensions.

Definition at line 174 of file IfxPort_PinMap.h.

◆ IFXPORT_PINMAP_PIN_NUM_ITEMS

#define IFXPORT_PINMAP_PIN_NUM_ITEMS 15

Definition at line 175 of file IfxPort_PinMap.h.

Variable Documentation

◆ IfxPort_P00_0

IFX_EXTERN IfxPort_Pin IfxPort_P00_0

IfxPort_P00_0.

Definition at line 54 of file IfxPort_PinMap.h.

◆ IfxPort_P00_1

IFX_EXTERN IfxPort_Pin IfxPort_P00_1

IfxPort_P00_1.

Definition at line 55 of file IfxPort_PinMap.h.

◆ IfxPort_P00_10

IFX_EXTERN IfxPort_Pin IfxPort_P00_10

IfxPort_P00_10.

Definition at line 56 of file IfxPort_PinMap.h.

◆ IfxPort_P00_11

IFX_EXTERN IfxPort_Pin IfxPort_P00_11

IfxPort_P00_11.

Definition at line 57 of file IfxPort_PinMap.h.

◆ IfxPort_P00_12

IFX_EXTERN IfxPort_Pin IfxPort_P00_12

IfxPort_P00_12.

Definition at line 58 of file IfxPort_PinMap.h.

◆ IfxPort_P00_2

IFX_EXTERN IfxPort_Pin IfxPort_P00_2

IfxPort_P00_2.

Definition at line 59 of file IfxPort_PinMap.h.

◆ IfxPort_P00_3

IFX_EXTERN IfxPort_Pin IfxPort_P00_3

IfxPort_P00_3.

Definition at line 60 of file IfxPort_PinMap.h.

◆ IfxPort_P00_4

IFX_EXTERN IfxPort_Pin IfxPort_P00_4

IfxPort_P00_4.

Definition at line 61 of file IfxPort_PinMap.h.

◆ IfxPort_P00_5

IFX_EXTERN IfxPort_Pin IfxPort_P00_5

IfxPort_P00_5.

Definition at line 62 of file IfxPort_PinMap.h.

◆ IfxPort_P00_6

IFX_EXTERN IfxPort_Pin IfxPort_P00_6

IfxPort_P00_6.

Definition at line 63 of file IfxPort_PinMap.h.

◆ IfxPort_P00_7

IFX_EXTERN IfxPort_Pin IfxPort_P00_7

IfxPort_P00_7.

Definition at line 64 of file IfxPort_PinMap.h.

◆ IfxPort_P00_8

IFX_EXTERN IfxPort_Pin IfxPort_P00_8

IfxPort_P00_8.

Definition at line 65 of file IfxPort_PinMap.h.

◆ IfxPort_P00_9

IFX_EXTERN IfxPort_Pin IfxPort_P00_9

IfxPort_P00_9.

Definition at line 66 of file IfxPort_PinMap.h.

◆ IfxPort_P02_0

IFX_EXTERN IfxPort_Pin IfxPort_P02_0

IfxPort_P02_0.

Definition at line 67 of file IfxPort_PinMap.h.

◆ IfxPort_P02_1

IFX_EXTERN IfxPort_Pin IfxPort_P02_1

IfxPort_P02_1.

Definition at line 68 of file IfxPort_PinMap.h.

◆ IfxPort_P02_2

IFX_EXTERN IfxPort_Pin IfxPort_P02_2

IfxPort_P02_2.

Definition at line 69 of file IfxPort_PinMap.h.

◆ IfxPort_P02_3

IFX_EXTERN IfxPort_Pin IfxPort_P02_3

IfxPort_P02_3.

Definition at line 70 of file IfxPort_PinMap.h.

◆ IfxPort_P02_4

IFX_EXTERN IfxPort_Pin IfxPort_P02_4

IfxPort_P02_4.

Definition at line 71 of file IfxPort_PinMap.h.

◆ IfxPort_P02_5

IFX_EXTERN IfxPort_Pin IfxPort_P02_5

IfxPort_P02_5.

Definition at line 72 of file IfxPort_PinMap.h.

◆ IfxPort_P02_6

IFX_EXTERN IfxPort_Pin IfxPort_P02_6

IfxPort_P02_6.

Definition at line 73 of file IfxPort_PinMap.h.

◆ IfxPort_P02_7

IFX_EXTERN IfxPort_Pin IfxPort_P02_7

IfxPort_P02_7.

Definition at line 74 of file IfxPort_PinMap.h.

◆ IfxPort_P02_8

IFX_EXTERN IfxPort_Pin IfxPort_P02_8

IfxPort_P02_8.

Definition at line 75 of file IfxPort_PinMap.h.

◆ IfxPort_P10_0

IFX_EXTERN IfxPort_Pin IfxPort_P10_0

IfxPort_P10_0.

Definition at line 76 of file IfxPort_PinMap.h.

◆ IfxPort_P10_1

IFX_EXTERN IfxPort_Pin IfxPort_P10_1

IfxPort_P10_1.

Definition at line 77 of file IfxPort_PinMap.h.

◆ IfxPort_P10_2

IFX_EXTERN IfxPort_Pin IfxPort_P10_2

IfxPort_P10_2.

Definition at line 78 of file IfxPort_PinMap.h.

◆ IfxPort_P10_3

IFX_EXTERN IfxPort_Pin IfxPort_P10_3

IfxPort_P10_3.

Definition at line 79 of file IfxPort_PinMap.h.

◆ IfxPort_P10_4

IFX_EXTERN IfxPort_Pin IfxPort_P10_4

IfxPort_P10_4.

Definition at line 80 of file IfxPort_PinMap.h.

◆ IfxPort_P10_5

IFX_EXTERN IfxPort_Pin IfxPort_P10_5

IfxPort_P10_5.

Definition at line 81 of file IfxPort_PinMap.h.

◆ IfxPort_P10_6

IFX_EXTERN IfxPort_Pin IfxPort_P10_6

IfxPort_P10_6.

Definition at line 82 of file IfxPort_PinMap.h.

◆ IfxPort_P10_7

IFX_EXTERN IfxPort_Pin IfxPort_P10_7

IfxPort_P10_7.

Definition at line 83 of file IfxPort_PinMap.h.

◆ IfxPort_P10_8

IFX_EXTERN IfxPort_Pin IfxPort_P10_8

IfxPort_P10_8.

Definition at line 84 of file IfxPort_PinMap.h.

◆ IfxPort_P11_10

IFX_EXTERN IfxPort_Pin IfxPort_P11_10

IfxPort_P11_10.

Definition at line 85 of file IfxPort_PinMap.h.

◆ IfxPort_P11_11

IFX_EXTERN IfxPort_Pin IfxPort_P11_11

IfxPort_P11_11.

Definition at line 86 of file IfxPort_PinMap.h.

◆ IfxPort_P11_12

IFX_EXTERN IfxPort_Pin IfxPort_P11_12

IfxPort_P11_12.

Definition at line 87 of file IfxPort_PinMap.h.

◆ IfxPort_P11_2

IFX_EXTERN IfxPort_Pin IfxPort_P11_2

IfxPort_P11_2.

Definition at line 88 of file IfxPort_PinMap.h.

◆ IfxPort_P11_3

IFX_EXTERN IfxPort_Pin IfxPort_P11_3

IfxPort_P11_3.

Definition at line 89 of file IfxPort_PinMap.h.

◆ IfxPort_P11_6

IFX_EXTERN IfxPort_Pin IfxPort_P11_6

IfxPort_P11_6.

Definition at line 90 of file IfxPort_PinMap.h.

◆ IfxPort_P11_9

IFX_EXTERN IfxPort_Pin IfxPort_P11_9

IfxPort_P11_9.

Definition at line 91 of file IfxPort_PinMap.h.

◆ IfxPort_P13_0

IFX_EXTERN IfxPort_Pin IfxPort_P13_0

IfxPort_P13_0.

Definition at line 92 of file IfxPort_PinMap.h.

◆ IfxPort_P13_1

IFX_EXTERN IfxPort_Pin IfxPort_P13_1

IfxPort_P13_1.

Definition at line 93 of file IfxPort_PinMap.h.

◆ IfxPort_P13_2

IFX_EXTERN IfxPort_Pin IfxPort_P13_2

IfxPort_P13_2.

Definition at line 94 of file IfxPort_PinMap.h.

◆ IfxPort_P13_3

IFX_EXTERN IfxPort_Pin IfxPort_P13_3

IfxPort_P13_3.

Definition at line 95 of file IfxPort_PinMap.h.

◆ IfxPort_P14_0

IFX_EXTERN IfxPort_Pin IfxPort_P14_0

IfxPort_P14_0.

Definition at line 96 of file IfxPort_PinMap.h.

◆ IfxPort_P14_1

IFX_EXTERN IfxPort_Pin IfxPort_P14_1

IfxPort_P14_1.

Definition at line 97 of file IfxPort_PinMap.h.

◆ IfxPort_P14_10

IFX_EXTERN IfxPort_Pin IfxPort_P14_10

IfxPort_P14_10.

Definition at line 98 of file IfxPort_PinMap.h.

◆ IfxPort_P14_2

IFX_EXTERN IfxPort_Pin IfxPort_P14_2

IfxPort_P14_2.

Definition at line 99 of file IfxPort_PinMap.h.

◆ IfxPort_P14_3

IFX_EXTERN IfxPort_Pin IfxPort_P14_3

IfxPort_P14_3.

Definition at line 100 of file IfxPort_PinMap.h.

◆ IfxPort_P14_4

IFX_EXTERN IfxPort_Pin IfxPort_P14_4

IfxPort_P14_4.

Definition at line 101 of file IfxPort_PinMap.h.

◆ IfxPort_P14_5

IFX_EXTERN IfxPort_Pin IfxPort_P14_5

IfxPort_P14_5.

Definition at line 102 of file IfxPort_PinMap.h.

◆ IfxPort_P14_6

IFX_EXTERN IfxPort_Pin IfxPort_P14_6

IfxPort_P14_6.

Definition at line 103 of file IfxPort_PinMap.h.

◆ IfxPort_P14_7

IFX_EXTERN IfxPort_Pin IfxPort_P14_7

IfxPort_P14_7.

Definition at line 104 of file IfxPort_PinMap.h.

◆ IfxPort_P14_8

IFX_EXTERN IfxPort_Pin IfxPort_P14_8

IfxPort_P14_8.

Definition at line 105 of file IfxPort_PinMap.h.

◆ IfxPort_P14_9

IFX_EXTERN IfxPort_Pin IfxPort_P14_9

IfxPort_P14_9.

Definition at line 106 of file IfxPort_PinMap.h.

◆ IfxPort_P15_0

IFX_EXTERN IfxPort_Pin IfxPort_P15_0

IfxPort_P15_0.

Definition at line 107 of file IfxPort_PinMap.h.

◆ IfxPort_P15_1

IFX_EXTERN IfxPort_Pin IfxPort_P15_1

IfxPort_P15_1.

Definition at line 108 of file IfxPort_PinMap.h.

◆ IfxPort_P15_2

IFX_EXTERN IfxPort_Pin IfxPort_P15_2

IfxPort_P15_2.

Definition at line 109 of file IfxPort_PinMap.h.

◆ IfxPort_P15_3

IFX_EXTERN IfxPort_Pin IfxPort_P15_3

IfxPort_P15_3.

Definition at line 110 of file IfxPort_PinMap.h.

◆ IfxPort_P15_4

IFX_EXTERN IfxPort_Pin IfxPort_P15_4

IfxPort_P15_4.

Definition at line 111 of file IfxPort_PinMap.h.

◆ IfxPort_P15_5

IFX_EXTERN IfxPort_Pin IfxPort_P15_5

IfxPort_P15_5.

Definition at line 112 of file IfxPort_PinMap.h.

◆ IfxPort_P15_6

IFX_EXTERN IfxPort_Pin IfxPort_P15_6

IfxPort_P15_6.

Definition at line 113 of file IfxPort_PinMap.h.

◆ IfxPort_P15_7

IFX_EXTERN IfxPort_Pin IfxPort_P15_7

IfxPort_P15_7.

Definition at line 114 of file IfxPort_PinMap.h.

◆ IfxPort_P15_8

IFX_EXTERN IfxPort_Pin IfxPort_P15_8

IfxPort_P15_8.

Definition at line 115 of file IfxPort_PinMap.h.

◆ IfxPort_P20_0

IFX_EXTERN IfxPort_Pin IfxPort_P20_0

IfxPort_P20_0.

Definition at line 116 of file IfxPort_PinMap.h.

◆ IfxPort_P20_1

IFX_EXTERN IfxPort_Pin IfxPort_P20_1

IfxPort_P20_1.

Definition at line 117 of file IfxPort_PinMap.h.

◆ IfxPort_P20_10

IFX_EXTERN IfxPort_Pin IfxPort_P20_10

IfxPort_P20_10.

Definition at line 118 of file IfxPort_PinMap.h.

◆ IfxPort_P20_11

IFX_EXTERN IfxPort_Pin IfxPort_P20_11

IfxPort_P20_11.

Definition at line 119 of file IfxPort_PinMap.h.

◆ IfxPort_P20_12

IFX_EXTERN IfxPort_Pin IfxPort_P20_12

IfxPort_P20_12.

Definition at line 120 of file IfxPort_PinMap.h.

◆ IfxPort_P20_13

IFX_EXTERN IfxPort_Pin IfxPort_P20_13

IfxPort_P20_13.

Definition at line 121 of file IfxPort_PinMap.h.

◆ IfxPort_P20_14

IFX_EXTERN IfxPort_Pin IfxPort_P20_14

IfxPort_P20_14.

Definition at line 122 of file IfxPort_PinMap.h.

◆ IfxPort_P20_3

IFX_EXTERN IfxPort_Pin IfxPort_P20_3

IfxPort_P20_3.

Definition at line 123 of file IfxPort_PinMap.h.

◆ IfxPort_P20_6

IFX_EXTERN IfxPort_Pin IfxPort_P20_6

IfxPort_P20_6.

Definition at line 124 of file IfxPort_PinMap.h.

◆ IfxPort_P20_7

IFX_EXTERN IfxPort_Pin IfxPort_P20_7

IfxPort_P20_7.

Definition at line 125 of file IfxPort_PinMap.h.

◆ IfxPort_P20_8

IFX_EXTERN IfxPort_Pin IfxPort_P20_8

IfxPort_P20_8.

Definition at line 126 of file IfxPort_PinMap.h.

◆ IfxPort_P20_9

IFX_EXTERN IfxPort_Pin IfxPort_P20_9

IfxPort_P20_9.

Definition at line 127 of file IfxPort_PinMap.h.

◆ IfxPort_P21_0

IFX_EXTERN IfxPort_Pin IfxPort_P21_0

IfxPort_P21_0.

Definition at line 128 of file IfxPort_PinMap.h.

◆ IfxPort_P21_1

IFX_EXTERN IfxPort_Pin IfxPort_P21_1

IfxPort_P21_1.

Definition at line 129 of file IfxPort_PinMap.h.

◆ IfxPort_P21_2

IFX_EXTERN IfxPort_Pin IfxPort_P21_2

IfxPort_P21_2.

Definition at line 130 of file IfxPort_PinMap.h.

◆ IfxPort_P21_3

IFX_EXTERN IfxPort_Pin IfxPort_P21_3

IfxPort_P21_3.

Definition at line 131 of file IfxPort_PinMap.h.

◆ IfxPort_P21_4

IFX_EXTERN IfxPort_Pin IfxPort_P21_4

IfxPort_P21_4.

Definition at line 132 of file IfxPort_PinMap.h.

◆ IfxPort_P21_5

IFX_EXTERN IfxPort_Pin IfxPort_P21_5

IfxPort_P21_5.

Definition at line 133 of file IfxPort_PinMap.h.

◆ IfxPort_P21_6

IFX_EXTERN IfxPort_Pin IfxPort_P21_6

IfxPort_P21_6.

Definition at line 134 of file IfxPort_PinMap.h.

◆ IfxPort_P21_7

IFX_EXTERN IfxPort_Pin IfxPort_P21_7

IfxPort_P21_7.

Definition at line 135 of file IfxPort_PinMap.h.

◆ IfxPort_P22_0

IFX_EXTERN IfxPort_Pin IfxPort_P22_0

IfxPort_P22_0.

Definition at line 136 of file IfxPort_PinMap.h.

◆ IfxPort_P22_1

IFX_EXTERN IfxPort_Pin IfxPort_P22_1

IfxPort_P22_1.

Definition at line 137 of file IfxPort_PinMap.h.

◆ IfxPort_P22_2

IFX_EXTERN IfxPort_Pin IfxPort_P22_2

IfxPort_P22_2.

Definition at line 138 of file IfxPort_PinMap.h.

◆ IfxPort_P22_3

IFX_EXTERN IfxPort_Pin IfxPort_P22_3

IfxPort_P22_3.

Definition at line 139 of file IfxPort_PinMap.h.

◆ IfxPort_P23_0

IFX_EXTERN IfxPort_Pin IfxPort_P23_0

IfxPort_P23_0.

Definition at line 140 of file IfxPort_PinMap.h.

◆ IfxPort_P23_1

IFX_EXTERN IfxPort_Pin IfxPort_P23_1

IfxPort_P23_1.

Definition at line 141 of file IfxPort_PinMap.h.

◆ IfxPort_P23_2

IFX_EXTERN IfxPort_Pin IfxPort_P23_2

IfxPort_P23_2.

Definition at line 142 of file IfxPort_PinMap.h.

◆ IfxPort_P23_3

IFX_EXTERN IfxPort_Pin IfxPort_P23_3

IfxPort_P23_3.

Definition at line 143 of file IfxPort_PinMap.h.

◆ IfxPort_P23_4

IFX_EXTERN IfxPort_Pin IfxPort_P23_4

IfxPort_P23_4.

Definition at line 144 of file IfxPort_PinMap.h.

◆ IfxPort_P23_5

IFX_EXTERN IfxPort_Pin IfxPort_P23_5

IfxPort_P23_5.

Definition at line 145 of file IfxPort_PinMap.h.

◆ IfxPort_P32_0

IFX_EXTERN IfxPort_Pin IfxPort_P32_0

IfxPort_P32_0.

Definition at line 146 of file IfxPort_PinMap.h.

◆ IfxPort_P32_2

IFX_EXTERN IfxPort_Pin IfxPort_P32_2

IfxPort_P32_2.

Definition at line 147 of file IfxPort_PinMap.h.

◆ IfxPort_P32_3

IFX_EXTERN IfxPort_Pin IfxPort_P32_3

IfxPort_P32_3.

Definition at line 148 of file IfxPort_PinMap.h.

◆ IfxPort_P32_4

IFX_EXTERN IfxPort_Pin IfxPort_P32_4

IfxPort_P32_4.

Definition at line 149 of file IfxPort_PinMap.h.

◆ IfxPort_P33_0

IFX_EXTERN IfxPort_Pin IfxPort_P33_0

IfxPort_P33_0.

Definition at line 150 of file IfxPort_PinMap.h.

◆ IfxPort_P33_1

IFX_EXTERN IfxPort_Pin IfxPort_P33_1

IfxPort_P33_1.

Definition at line 151 of file IfxPort_PinMap.h.

◆ IfxPort_P33_10

IFX_EXTERN IfxPort_Pin IfxPort_P33_10

IfxPort_P33_10.

Definition at line 152 of file IfxPort_PinMap.h.

◆ IfxPort_P33_11

IFX_EXTERN IfxPort_Pin IfxPort_P33_11

IfxPort_P33_11.

Definition at line 153 of file IfxPort_PinMap.h.

◆ IfxPort_P33_12

IFX_EXTERN IfxPort_Pin IfxPort_P33_12

IfxPort_P33_12.

Definition at line 154 of file IfxPort_PinMap.h.

◆ IfxPort_P33_13

IFX_EXTERN IfxPort_Pin IfxPort_P33_13

IfxPort_P33_13.

Definition at line 155 of file IfxPort_PinMap.h.

◆ IfxPort_P33_2

IFX_EXTERN IfxPort_Pin IfxPort_P33_2

IfxPort_P33_2.

Definition at line 156 of file IfxPort_PinMap.h.

◆ IfxPort_P33_3

IFX_EXTERN IfxPort_Pin IfxPort_P33_3

IfxPort_P33_3.

Definition at line 157 of file IfxPort_PinMap.h.

◆ IfxPort_P33_4

IFX_EXTERN IfxPort_Pin IfxPort_P33_4

IfxPort_P33_4.

Definition at line 158 of file IfxPort_PinMap.h.

◆ IfxPort_P33_5

IFX_EXTERN IfxPort_Pin IfxPort_P33_5

IfxPort_P33_5.

Definition at line 159 of file IfxPort_PinMap.h.

◆ IfxPort_P33_6

IFX_EXTERN IfxPort_Pin IfxPort_P33_6

IfxPort_P33_6.

Definition at line 160 of file IfxPort_PinMap.h.

◆ IfxPort_P33_7

IFX_EXTERN IfxPort_Pin IfxPort_P33_7

IfxPort_P33_7.

Definition at line 161 of file IfxPort_PinMap.h.

◆ IfxPort_P33_8

IFX_EXTERN IfxPort_Pin IfxPort_P33_8

IfxPort_P33_8.

Definition at line 162 of file IfxPort_PinMap.h.

◆ IfxPort_P33_9

IFX_EXTERN IfxPort_Pin IfxPort_P33_9

IfxPort_P33_9.

Definition at line 163 of file IfxPort_PinMap.h.

◆ IfxPort_P40_0

IFX_EXTERN IfxPort_Pin IfxPort_P40_0

IfxPort_P40_0.

Definition at line 164 of file IfxPort_PinMap.h.

◆ IfxPort_P40_1

IFX_EXTERN IfxPort_Pin IfxPort_P40_1

IfxPort_P40_1.

Definition at line 165 of file IfxPort_PinMap.h.

◆ IfxPort_P40_2

IFX_EXTERN IfxPort_Pin IfxPort_P40_2

IfxPort_P40_2.

Definition at line 166 of file IfxPort_PinMap.h.

◆ IfxPort_P40_3

IFX_EXTERN IfxPort_Pin IfxPort_P40_3

IfxPort_P40_3.

Definition at line 167 of file IfxPort_PinMap.h.

◆ IfxPort_P40_6

IFX_EXTERN IfxPort_Pin IfxPort_P40_6

IfxPort_P40_6.

Definition at line 168 of file IfxPort_PinMap.h.

◆ IfxPort_P40_7

IFX_EXTERN IfxPort_Pin IfxPort_P40_7

IfxPort_P40_7.

Definition at line 169 of file IfxPort_PinMap.h.

◆ IfxPort_P40_8

IFX_EXTERN IfxPort_Pin IfxPort_P40_8

IfxPort_P40_8.

Definition at line 170 of file IfxPort_PinMap.h.

◆ IfxPort_P40_9

IFX_EXTERN IfxPort_Pin IfxPort_P40_9

IfxPort_P40_9.

Definition at line 171 of file IfxPort_PinMap.h.

◆ IfxPort_Pin_pinTable

IFX_EXTERN const IfxPort_Pin* IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]

IfxPort_Pin table.

Definition at line 179 of file IfxPort_PinMap.h.


iLLD_TC26B: How to use the PORT I/O driver?

How to use the PORT I/O driver?
iLLD » PORTS
Collaboration diagram for How to use the PORT I/O driver?:

The PORT I/O driver provides several functions to easily configure and read pins. The configuration includes input/output, mode, pad driver strength and state. For referencing the pins and their ports a IfxPort_PinMap is available as well.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Port/Io/IfxPort_Io.h>

Conifguration Table

Specify the used pins, their modes and (for outputs) the pad driver strength:
Note: For inputs the pad driver strength is only a dummy.

const IfxPort_Io_ConfigPin configPin[] = {
{&IfxPort_P00_0, IfxPort_Mode_inputPullDown, IfxPort_PadDriver_cmosAutomotiveSpeed1}, // P00.0
{&IfxPort_P33_0, IfxPort_Mode_outputPushPullGeneral, IfxPort_PadDriver_cmosAutomotiveSpeed1}, // P33.0
};

Note: the IfxPort_* pins are defined in IfxPort_PinMap

Port Initialisation

Assemble the final configuration structure:

const IfxPort_Io_Config conf = {
sizeof(configPin)/sizeof(IfxPort_Io_ConfigPin),
(IfxPort_Io_ConfigPin *)configPin
};

Call the initialisation function:

IfxPort_Io_initModule(&conf);

Now the pins are configured as specified.

Misc. Functions of the Standard Layer

Pin Mode Configuration

Generally, you can use one function for both inputs and outputs to set the desired mode.

// configure P33.0 as general output
IfxPort_setPinMode(&MODULE_P33, 0, IfxPort_Mode_outputPushPullGeneral);

For inputs use the IfxPort_setPinModeInput function:

// configure P33.0 as input with pullUp
IfxPort_setPinModeInput(&MODULE_P33, 0, IfxPort_InputMode_pullUp);

For outputs use the IfxPort_setModeOutput function:

// configure P33.0 as output in general pushPull mode
IfxPort_setPinModeOutput(&MODULE_P33, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);

If the pin is an output, the pad driver should be configured as well:

IfxPort_setPinPadDriver(&MODULE_P33, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);

Reading Input State

Read the state of a single pin:

uint8 state = IfxPort_getPinState(&MODULE_P33, 0); // read P33.0

Setting Output State

Generally, you can use one function to set an output pin high or low or to toggle it.

IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled); // toggle P33.0

An output pin can be set high as following:

IfxPort_setPinHigh(&MODULE_P33, 0); // P33.0 = 1

An output pin can be set low as following:

IfxPort_setPinLow(&MODULE_P33, 0); // P33.0 = 0

Configure Emergency Function

Enable emergency stop for P33.0:

IfxPort_enableEmergencyStop(&MODULE_P33, 0);

The driver also provides a function to disable this feature.


iLLD_TC26B: Interface Driver

Modules
Interface Driver
iLLD » PORTS
Collaboration diagram for Interface Driver:

Modules

Data Structures
Module Functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » PORTS » Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxPort_Io_ConfigPin
struct | IfxPort_Io_Config

Detailed Description

Data Structure Documentation

◆ IfxPort_Io_ConfigPin

struct IfxPort_Io_ConfigPin

Definition at line 176 of file IfxPort_Io.h.

Collaboration diagram for IfxPort_Io_ConfigPin:
[legend]
Data Fields
IfxPort_Mode | mode
IfxPort_PadDriver | padDriver
IFX_CONST IfxPort_Pin * | pin

◆ IfxPort_Io_Config

struct IfxPort_Io_Config

Definition at line 187 of file IfxPort_Io.h.

Collaboration diagram for IfxPort_Io_Config:
[legend]
Data Fields
IfxPort_Io_ConfigPin * | pinTable
uint32 | size


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » PORTS » Interface Driver
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void IfxPort_Io_initModule (const IfxPort_Io_Config *config)

Detailed Description

Function Documentation

◆ IfxPort_Io_initModule()

IFX_EXTERN void IfxPort_Io_initModule ( const IfxPort_Io_Config * config )
Returns
None

Definition at line 52 of file IfxPort_Io.c.


iLLD_TC26B: IfxPort_cfg.h File Reference

  • _Impl
Data Structures | Macros | Enumerations | Variables
IfxPort_cfg.h File Reference
iLLD » PORTS

PORT on-chip implementation data. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxPort_reg.h"
Include dependency graph for IfxPort_cfg.h:

Go to the source code of this file.

Data Structures

struct IfxPort_Esr_Masks
used by IfxPort_Esr_Masks table More...

Macros

#define | IFXPORT_NUM_MODULES (13)
Port count. More...
#define | IFXPORT_OUTOUTFEATURE_NONE (0xFFFFFFFF)

Enumerations

enum IfxPort_Index {
IfxPort_Index_00 = 0,
IfxPort_Index_02 = 2,
IfxPort_Index_10 = 10,
IfxPort_Index_11 = 11,
IfxPort_Index_13 = 13,
IfxPort_Index_14 = 14,
IfxPort_Index_15 = 15,
IfxPort_Index_20 = 20,
IfxPort_Index_21 = 21,
IfxPort_Index_22 = 22,
IfxPort_Index_23 = 23,
IfxPort_Index_32 = 32,
IfxPort_Index_33 = 33,
IfxPort_Index_none = -1
}
List of the available Port resources. More...

Variables

IFX_EXTERN IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks [IFXPORT_NUM_MODULES]
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap [IFXPORT_NUM_MODULES]

Detailed Description

PORT on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPort_cfg.h.

Data Structure Documentation

◆ IfxPort_Esr_Masks

struct IfxPort_Esr_Masks

used by IfxPort_Esr_Masks table

Definition at line 100 of file IfxPort_cfg.h.

Data Fields
uint16 | masks
Ifx_P * | port

Macro Definition Documentation

◆ IFXPORT_NUM_MODULES

#define IFXPORT_NUM_MODULES (13)

Port count.

Definition at line 66 of file IfxPort_cfg.h.

Referenced by IfxPort_disableEmergencyStop(), IfxPort_enableEmergencyStop(), IfxPort_getAddress(), and IfxPort_getIndex().

◆ IFXPORT_OUTOUTFEATURE_NONE

#define IFXPORT_OUTOUTFEATURE_NONE (0xFFFFFFFF)

Definition at line 68 of file IfxPort_cfg.h.

Enumeration Type Documentation

◆ IfxPort_Index

enum IfxPort_Index

List of the available Port resources.

Enumerator
IfxPort_Index_00 | PORT 00.
IfxPort_Index_02 | PORT 02.
IfxPort_Index_10 | PORT 10.
IfxPort_Index_11 | PORT 11.
IfxPort_Index_13 | PORT 13.
IfxPort_Index_14 | PORT 14.
IfxPort_Index_15 | PORT 15.
IfxPort_Index_20 | PORT 20.
IfxPort_Index_21 | PORT 21.
IfxPort_Index_22 | PORT 22.
IfxPort_Index_23 | PORT 23.
IfxPort_Index_32 | PORT 32.
IfxPort_Index_33 | PORT 33.
IfxPort_Index_none | none

Definition at line 76 of file IfxPort_cfg.h.

Variable Documentation

◆ IfxPort_cfg_esrMasks

IFX_EXTERN IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES]

Definition at line 110 of file IfxPort_cfg.h.

◆ IfxPort_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES]

Definition at line 112 of file IfxPort_cfg.h.


iLLD_TC26B: IfxPort_PinMap.c File Reference

  • _PinMap
Variables
IfxPort_PinMap.c File Reference
iLLD » PORTS

PORT I/O map. More...

#include "IfxPort_PinMap.h"
Include dependency graph for IfxPort_PinMap.c:

Go to the source code of this file.

Variables

IfxPort_Pin | IfxPort_P00_0 = {&MODULE_P00, 0}
IfxPort_Pin | IfxPort_P00_1 = {&MODULE_P00, 1}
IfxPort_Pin | IfxPort_P00_10 = {&MODULE_P00,10}
IfxPort_Pin | IfxPort_P00_11 = {&MODULE_P00,11}
IfxPort_Pin | IfxPort_P00_12 = {&MODULE_P00,12}
IfxPort_Pin | IfxPort_P00_2 = {&MODULE_P00, 2}
IfxPort_Pin | IfxPort_P00_3 = {&MODULE_P00, 3}
IfxPort_Pin | IfxPort_P00_4 = {&MODULE_P00, 4}
IfxPort_Pin | IfxPort_P00_5 = {&MODULE_P00, 5}
IfxPort_Pin | IfxPort_P00_6 = {&MODULE_P00, 6}
IfxPort_Pin | IfxPort_P00_7 = {&MODULE_P00, 7}
IfxPort_Pin | IfxPort_P00_8 = {&MODULE_P00, 8}
IfxPort_Pin | IfxPort_P00_9 = {&MODULE_P00, 9}
IfxPort_Pin | IfxPort_P02_0 = {&MODULE_P02, 0}
IfxPort_Pin | IfxPort_P02_1 = {&MODULE_P02, 1}
IfxPort_Pin | IfxPort_P02_2 = {&MODULE_P02, 2}
IfxPort_Pin | IfxPort_P02_3 = {&MODULE_P02, 3}
IfxPort_Pin | IfxPort_P02_4 = {&MODULE_P02, 4}
IfxPort_Pin | IfxPort_P02_5 = {&MODULE_P02, 5}
IfxPort_Pin | IfxPort_P02_6 = {&MODULE_P02, 6}
IfxPort_Pin | IfxPort_P02_7 = {&MODULE_P02, 7}
IfxPort_Pin | IfxPort_P02_8 = {&MODULE_P02, 8}
IfxPort_Pin | IfxPort_P10_0 = {&MODULE_P10, 0}
IfxPort_Pin | IfxPort_P10_1 = {&MODULE_P10, 1}
IfxPort_Pin | IfxPort_P10_2 = {&MODULE_P10, 2}
IfxPort_Pin | IfxPort_P10_3 = {&MODULE_P10, 3}
IfxPort_Pin | IfxPort_P10_4 = {&MODULE_P10, 4}
IfxPort_Pin | IfxPort_P10_5 = {&MODULE_P10, 5}
IfxPort_Pin | IfxPort_P10_6 = {&MODULE_P10, 6}
IfxPort_Pin | IfxPort_P10_7 = {&MODULE_P10, 7}
IfxPort_Pin | IfxPort_P10_8 = {&MODULE_P10, 8}
IfxPort_Pin | IfxPort_P11_10 = {&MODULE_P11,10}
IfxPort_Pin | IfxPort_P11_11 = {&MODULE_P11,11}
IfxPort_Pin | IfxPort_P11_12 = {&MODULE_P11,12}
IfxPort_Pin | IfxPort_P11_2 = {&MODULE_P11, 2}
IfxPort_Pin | IfxPort_P11_3 = {&MODULE_P11, 3}
IfxPort_Pin | IfxPort_P11_6 = {&MODULE_P11, 6}
IfxPort_Pin | IfxPort_P11_9 = {&MODULE_P11, 9}
IfxPort_Pin | IfxPort_P13_0 = {&MODULE_P13, 0}
IfxPort_Pin | IfxPort_P13_1 = {&MODULE_P13, 1}
IfxPort_Pin | IfxPort_P13_2 = {&MODULE_P13, 2}
IfxPort_Pin | IfxPort_P13_3 = {&MODULE_P13, 3}
IfxPort_Pin | IfxPort_P14_0 = {&MODULE_P14, 0}
IfxPort_Pin | IfxPort_P14_1 = {&MODULE_P14, 1}
IfxPort_Pin | IfxPort_P14_10 = {&MODULE_P14,10}
IfxPort_Pin | IfxPort_P14_2 = {&MODULE_P14, 2}
IfxPort_Pin | IfxPort_P14_3 = {&MODULE_P14, 3}
IfxPort_Pin | IfxPort_P14_4 = {&MODULE_P14, 4}
IfxPort_Pin | IfxPort_P14_5 = {&MODULE_P14, 5}
IfxPort_Pin | IfxPort_P14_6 = {&MODULE_P14, 6}
IfxPort_Pin | IfxPort_P14_7 = {&MODULE_P14, 7}
IfxPort_Pin | IfxPort_P14_8 = {&MODULE_P14, 8}
IfxPort_Pin | IfxPort_P14_9 = {&MODULE_P14, 9}
IfxPort_Pin | IfxPort_P15_0 = {&MODULE_P15, 0}
IfxPort_Pin | IfxPort_P15_1 = {&MODULE_P15, 1}
IfxPort_Pin | IfxPort_P15_2 = {&MODULE_P15, 2}
IfxPort_Pin | IfxPort_P15_3 = {&MODULE_P15, 3}
IfxPort_Pin | IfxPort_P15_4 = {&MODULE_P15, 4}
IfxPort_Pin | IfxPort_P15_5 = {&MODULE_P15, 5}
IfxPort_Pin | IfxPort_P15_6 = {&MODULE_P15, 6}
IfxPort_Pin | IfxPort_P15_7 = {&MODULE_P15, 7}
IfxPort_Pin | IfxPort_P15_8 = {&MODULE_P15, 8}
IfxPort_Pin | IfxPort_P20_0 = {&MODULE_P20, 0}
IfxPort_Pin | IfxPort_P20_1 = {&MODULE_P20, 1}
IfxPort_Pin | IfxPort_P20_10 = {&MODULE_P20,10}
IfxPort_Pin | IfxPort_P20_11 = {&MODULE_P20,11}
IfxPort_Pin | IfxPort_P20_12 = {&MODULE_P20,12}
IfxPort_Pin | IfxPort_P20_13 = {&MODULE_P20,13}
IfxPort_Pin | IfxPort_P20_14 = {&MODULE_P20,14}
IfxPort_Pin | IfxPort_P20_3 = {&MODULE_P20, 3}
IfxPort_Pin | IfxPort_P20_6 = {&MODULE_P20, 6}
IfxPort_Pin | IfxPort_P20_7 = {&MODULE_P20, 7}
IfxPort_Pin | IfxPort_P20_8 = {&MODULE_P20, 8}
IfxPort_Pin | IfxPort_P20_9 = {&MODULE_P20, 9}
IfxPort_Pin | IfxPort_P21_0 = {&MODULE_P21, 0}
IfxPort_Pin | IfxPort_P21_1 = {&MODULE_P21, 1}
IfxPort_Pin | IfxPort_P21_2 = {&MODULE_P21, 2}
IfxPort_Pin | IfxPort_P21_3 = {&MODULE_P21, 3}
IfxPort_Pin | IfxPort_P21_4 = {&MODULE_P21, 4}
IfxPort_Pin | IfxPort_P21_5 = {&MODULE_P21, 5}
IfxPort_Pin | IfxPort_P21_6 = {&MODULE_P21, 6}
IfxPort_Pin | IfxPort_P21_7 = {&MODULE_P21, 7}
IfxPort_Pin | IfxPort_P22_0 = {&MODULE_P22, 0}
IfxPort_Pin | IfxPort_P22_1 = {&MODULE_P22, 1}
IfxPort_Pin | IfxPort_P22_2 = {&MODULE_P22, 2}
IfxPort_Pin | IfxPort_P22_3 = {&MODULE_P22, 3}
IfxPort_Pin | IfxPort_P23_0 = {&MODULE_P23, 0}
IfxPort_Pin | IfxPort_P23_1 = {&MODULE_P23, 1}
IfxPort_Pin | IfxPort_P23_2 = {&MODULE_P23, 2}
IfxPort_Pin | IfxPort_P23_3 = {&MODULE_P23, 3}
IfxPort_Pin | IfxPort_P23_4 = {&MODULE_P23, 4}
IfxPort_Pin | IfxPort_P23_5 = {&MODULE_P23, 5}
IfxPort_Pin | IfxPort_P32_0 = {&MODULE_P32, 0}
IfxPort_Pin | IfxPort_P32_2 = {&MODULE_P32, 2}
IfxPort_Pin | IfxPort_P32_3 = {&MODULE_P32, 3}
IfxPort_Pin | IfxPort_P32_4 = {&MODULE_P32, 4}
IfxPort_Pin | IfxPort_P33_0 = {&MODULE_P33, 0}
IfxPort_Pin | IfxPort_P33_1 = {&MODULE_P33, 1}
IfxPort_Pin | IfxPort_P33_10 = {&MODULE_P33,10}
IfxPort_Pin | IfxPort_P33_11 = {&MODULE_P33,11}
IfxPort_Pin | IfxPort_P33_12 = {&MODULE_P33,12}
IfxPort_Pin | IfxPort_P33_13 = {&MODULE_P33,13}
IfxPort_Pin | IfxPort_P33_2 = {&MODULE_P33, 2}
IfxPort_Pin | IfxPort_P33_3 = {&MODULE_P33, 3}
IfxPort_Pin | IfxPort_P33_4 = {&MODULE_P33, 4}
IfxPort_Pin | IfxPort_P33_5 = {&MODULE_P33, 5}
IfxPort_Pin | IfxPort_P33_6 = {&MODULE_P33, 6}
IfxPort_Pin | IfxPort_P33_7 = {&MODULE_P33, 7}
IfxPort_Pin | IfxPort_P33_8 = {&MODULE_P33, 8}
IfxPort_Pin | IfxPort_P33_9 = {&MODULE_P33, 9}
IfxPort_Pin | IfxPort_P40_0 = {&MODULE_P40, 0}
IfxPort_Pin | IfxPort_P40_1 = {&MODULE_P40, 1}
IfxPort_Pin | IfxPort_P40_2 = {&MODULE_P40, 2}
IfxPort_Pin | IfxPort_P40_3 = {&MODULE_P40, 3}
IfxPort_Pin | IfxPort_P40_6 = {&MODULE_P40, 6}
IfxPort_Pin | IfxPort_P40_7 = {&MODULE_P40, 7}
IfxPort_Pin | IfxPort_P40_8 = {&MODULE_P40, 8}
IfxPort_Pin | IfxPort_P40_9 = {&MODULE_P40, 9}
const IfxPort_Pin * | IfxPort_Pin_pinTable [IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]

Detailed Description

PORT I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPort_PinMap.c.

Variable Documentation

◆ IfxPort_P00_0

IfxPort_Pin IfxPort_P00_0 = {&MODULE_P00, 0}

Definition at line 45 of file IfxPort_PinMap.c.

◆ IfxPort_P00_1

IfxPort_Pin IfxPort_P00_1 = {&MODULE_P00, 1}

Definition at line 46 of file IfxPort_PinMap.c.

◆ IfxPort_P00_10

IfxPort_Pin IfxPort_P00_10 = {&MODULE_P00,10}

Definition at line 47 of file IfxPort_PinMap.c.

◆ IfxPort_P00_11

IfxPort_Pin IfxPort_P00_11 = {&MODULE_P00,11}

Definition at line 48 of file IfxPort_PinMap.c.

◆ IfxPort_P00_12

IfxPort_Pin IfxPort_P00_12 = {&MODULE_P00,12}

Definition at line 49 of file IfxPort_PinMap.c.

◆ IfxPort_P00_2

IfxPort_Pin IfxPort_P00_2 = {&MODULE_P00, 2}

Definition at line 50 of file IfxPort_PinMap.c.

◆ IfxPort_P00_3

IfxPort_Pin IfxPort_P00_3 = {&MODULE_P00, 3}

Definition at line 51 of file IfxPort_PinMap.c.

◆ IfxPort_P00_4

IfxPort_Pin IfxPort_P00_4 = {&MODULE_P00, 4}

Definition at line 52 of file IfxPort_PinMap.c.

◆ IfxPort_P00_5

IfxPort_Pin IfxPort_P00_5 = {&MODULE_P00, 5}

Definition at line 53 of file IfxPort_PinMap.c.

◆ IfxPort_P00_6

IfxPort_Pin IfxPort_P00_6 = {&MODULE_P00, 6}

Definition at line 54 of file IfxPort_PinMap.c.

◆ IfxPort_P00_7

IfxPort_Pin IfxPort_P00_7 = {&MODULE_P00, 7}

Definition at line 55 of file IfxPort_PinMap.c.

◆ IfxPort_P00_8

IfxPort_Pin IfxPort_P00_8 = {&MODULE_P00, 8}

Definition at line 56 of file IfxPort_PinMap.c.

◆ IfxPort_P00_9

IfxPort_Pin IfxPort_P00_9 = {&MODULE_P00, 9}

Definition at line 57 of file IfxPort_PinMap.c.

◆ IfxPort_P02_0

IfxPort_Pin IfxPort_P02_0 = {&MODULE_P02, 0}

Definition at line 58 of file IfxPort_PinMap.c.

◆ IfxPort_P02_1

IfxPort_Pin IfxPort_P02_1 = {&MODULE_P02, 1}

Definition at line 59 of file IfxPort_PinMap.c.

◆ IfxPort_P02_2

IfxPort_Pin IfxPort_P02_2 = {&MODULE_P02, 2}

Definition at line 60 of file IfxPort_PinMap.c.

◆ IfxPort_P02_3

IfxPort_Pin IfxPort_P02_3 = {&MODULE_P02, 3}

Definition at line 61 of file IfxPort_PinMap.c.

◆ IfxPort_P02_4

IfxPort_Pin IfxPort_P02_4 = {&MODULE_P02, 4}

Definition at line 62 of file IfxPort_PinMap.c.

◆ IfxPort_P02_5

IfxPort_Pin IfxPort_P02_5 = {&MODULE_P02, 5}

Definition at line 63 of file IfxPort_PinMap.c.

◆ IfxPort_P02_6

IfxPort_Pin IfxPort_P02_6 = {&MODULE_P02, 6}

Definition at line 64 of file IfxPort_PinMap.c.

◆ IfxPort_P02_7

IfxPort_Pin IfxPort_P02_7 = {&MODULE_P02, 7}

Definition at line 65 of file IfxPort_PinMap.c.

◆ IfxPort_P02_8

IfxPort_Pin IfxPort_P02_8 = {&MODULE_P02, 8}

Definition at line 66 of file IfxPort_PinMap.c.

◆ IfxPort_P10_0

IfxPort_Pin IfxPort_P10_0 = {&MODULE_P10, 0}

Definition at line 67 of file IfxPort_PinMap.c.

◆ IfxPort_P10_1

IfxPort_Pin IfxPort_P10_1 = {&MODULE_P10, 1}

Definition at line 68 of file IfxPort_PinMap.c.

◆ IfxPort_P10_2

IfxPort_Pin IfxPort_P10_2 = {&MODULE_P10, 2}

Definition at line 69 of file IfxPort_PinMap.c.

◆ IfxPort_P10_3

IfxPort_Pin IfxPort_P10_3 = {&MODULE_P10, 3}

Definition at line 70 of file IfxPort_PinMap.c.

◆ IfxPort_P10_4

IfxPort_Pin IfxPort_P10_4 = {&MODULE_P10, 4}

Definition at line 71 of file IfxPort_PinMap.c.

◆ IfxPort_P10_5

IfxPort_Pin IfxPort_P10_5 = {&MODULE_P10, 5}

Definition at line 72 of file IfxPort_PinMap.c.

◆ IfxPort_P10_6

IfxPort_Pin IfxPort_P10_6 = {&MODULE_P10, 6}

Definition at line 73 of file IfxPort_PinMap.c.

◆ IfxPort_P10_7

IfxPort_Pin IfxPort_P10_7 = {&MODULE_P10, 7}

Definition at line 74 of file IfxPort_PinMap.c.

◆ IfxPort_P10_8

IfxPort_Pin IfxPort_P10_8 = {&MODULE_P10, 8}

Definition at line 75 of file IfxPort_PinMap.c.

◆ IfxPort_P11_10

IfxPort_Pin IfxPort_P11_10 = {&MODULE_P11,10}

Definition at line 76 of file IfxPort_PinMap.c.

◆ IfxPort_P11_11

IfxPort_Pin IfxPort_P11_11 = {&MODULE_P11,11}

Definition at line 77 of file IfxPort_PinMap.c.

◆ IfxPort_P11_12

IfxPort_Pin IfxPort_P11_12 = {&MODULE_P11,12}

Definition at line 78 of file IfxPort_PinMap.c.

◆ IfxPort_P11_2

IfxPort_Pin IfxPort_P11_2 = {&MODULE_P11, 2}

Definition at line 79 of file IfxPort_PinMap.c.

◆ IfxPort_P11_3

IfxPort_Pin IfxPort_P11_3 = {&MODULE_P11, 3}

Definition at line 80 of file IfxPort_PinMap.c.

◆ IfxPort_P11_6

IfxPort_Pin IfxPort_P11_6 = {&MODULE_P11, 6}

Definition at line 81 of file IfxPort_PinMap.c.

◆ IfxPort_P11_9

IfxPort_Pin IfxPort_P11_9 = {&MODULE_P11, 9}

Definition at line 82 of file IfxPort_PinMap.c.

◆ IfxPort_P13_0

IfxPort_Pin IfxPort_P13_0 = {&MODULE_P13, 0}

Definition at line 83 of file IfxPort_PinMap.c.

◆ IfxPort_P13_1

IfxPort_Pin IfxPort_P13_1 = {&MODULE_P13, 1}

Definition at line 84 of file IfxPort_PinMap.c.

◆ IfxPort_P13_2

IfxPort_Pin IfxPort_P13_2 = {&MODULE_P13, 2}

Definition at line 85 of file IfxPort_PinMap.c.

◆ IfxPort_P13_3

IfxPort_Pin IfxPort_P13_3 = {&MODULE_P13, 3}

Definition at line 86 of file IfxPort_PinMap.c.

◆ IfxPort_P14_0

IfxPort_Pin IfxPort_P14_0 = {&MODULE_P14, 0}

Definition at line 87 of file IfxPort_PinMap.c.

◆ IfxPort_P14_1

IfxPort_Pin IfxPort_P14_1 = {&MODULE_P14, 1}

Definition at line 88 of file IfxPort_PinMap.c.

◆ IfxPort_P14_10

IfxPort_Pin IfxPort_P14_10 = {&MODULE_P14,10}

Definition at line 89 of file IfxPort_PinMap.c.

◆ IfxPort_P14_2

IfxPort_Pin IfxPort_P14_2 = {&MODULE_P14, 2}

Definition at line 90 of file IfxPort_PinMap.c.

◆ IfxPort_P14_3

IfxPort_Pin IfxPort_P14_3 = {&MODULE_P14, 3}

Definition at line 91 of file IfxPort_PinMap.c.

◆ IfxPort_P14_4

IfxPort_Pin IfxPort_P14_4 = {&MODULE_P14, 4}

Definition at line 92 of file IfxPort_PinMap.c.

◆ IfxPort_P14_5

IfxPort_Pin IfxPort_P14_5 = {&MODULE_P14, 5}

Definition at line 93 of file IfxPort_PinMap.c.

◆ IfxPort_P14_6

IfxPort_Pin IfxPort_P14_6 = {&MODULE_P14, 6}

Definition at line 94 of file IfxPort_PinMap.c.

◆ IfxPort_P14_7

IfxPort_Pin IfxPort_P14_7 = {&MODULE_P14, 7}

Definition at line 95 of file IfxPort_PinMap.c.

◆ IfxPort_P14_8

IfxPort_Pin IfxPort_P14_8 = {&MODULE_P14, 8}

Definition at line 96 of file IfxPort_PinMap.c.

◆ IfxPort_P14_9

IfxPort_Pin IfxPort_P14_9 = {&MODULE_P14, 9}

Definition at line 97 of file IfxPort_PinMap.c.

◆ IfxPort_P15_0

IfxPort_Pin IfxPort_P15_0 = {&MODULE_P15, 0}

Definition at line 98 of file IfxPort_PinMap.c.

◆ IfxPort_P15_1

IfxPort_Pin IfxPort_P15_1 = {&MODULE_P15, 1}

Definition at line 99 of file IfxPort_PinMap.c.

◆ IfxPort_P15_2

IfxPort_Pin IfxPort_P15_2 = {&MODULE_P15, 2}

Definition at line 100 of file IfxPort_PinMap.c.

◆ IfxPort_P15_3

IfxPort_Pin IfxPort_P15_3 = {&MODULE_P15, 3}

Definition at line 101 of file IfxPort_PinMap.c.

◆ IfxPort_P15_4

IfxPort_Pin IfxPort_P15_4 = {&MODULE_P15, 4}

Definition at line 102 of file IfxPort_PinMap.c.

◆ IfxPort_P15_5

IfxPort_Pin IfxPort_P15_5 = {&MODULE_P15, 5}

Definition at line 103 of file IfxPort_PinMap.c.

◆ IfxPort_P15_6

IfxPort_Pin IfxPort_P15_6 = {&MODULE_P15, 6}

Definition at line 104 of file IfxPort_PinMap.c.

◆ IfxPort_P15_7

IfxPort_Pin IfxPort_P15_7 = {&MODULE_P15, 7}

Definition at line 105 of file IfxPort_PinMap.c.

◆ IfxPort_P15_8

IfxPort_Pin IfxPort_P15_8 = {&MODULE_P15, 8}

Definition at line 106 of file IfxPort_PinMap.c.

◆ IfxPort_P20_0

IfxPort_Pin IfxPort_P20_0 = {&MODULE_P20, 0}

Definition at line 107 of file IfxPort_PinMap.c.

◆ IfxPort_P20_1

IfxPort_Pin IfxPort_P20_1 = {&MODULE_P20, 1}

Definition at line 108 of file IfxPort_PinMap.c.

◆ IfxPort_P20_10

IfxPort_Pin IfxPort_P20_10 = {&MODULE_P20,10}

Definition at line 109 of file IfxPort_PinMap.c.

◆ IfxPort_P20_11

IfxPort_Pin IfxPort_P20_11 = {&MODULE_P20,11}

Definition at line 110 of file IfxPort_PinMap.c.

◆ IfxPort_P20_12

IfxPort_Pin IfxPort_P20_12 = {&MODULE_P20,12}

Definition at line 111 of file IfxPort_PinMap.c.

◆ IfxPort_P20_13

IfxPort_Pin IfxPort_P20_13 = {&MODULE_P20,13}

Definition at line 112 of file IfxPort_PinMap.c.

◆ IfxPort_P20_14

IfxPort_Pin IfxPort_P20_14 = {&MODULE_P20,14}

Definition at line 113 of file IfxPort_PinMap.c.

◆ IfxPort_P20_3

IfxPort_Pin IfxPort_P20_3 = {&MODULE_P20, 3}

Definition at line 114 of file IfxPort_PinMap.c.

◆ IfxPort_P20_6

IfxPort_Pin IfxPort_P20_6 = {&MODULE_P20, 6}

Definition at line 115 of file IfxPort_PinMap.c.

◆ IfxPort_P20_7

IfxPort_Pin IfxPort_P20_7 = {&MODULE_P20, 7}

Definition at line 116 of file IfxPort_PinMap.c.

◆ IfxPort_P20_8

IfxPort_Pin IfxPort_P20_8 = {&MODULE_P20, 8}

Definition at line 117 of file IfxPort_PinMap.c.

◆ IfxPort_P20_9

IfxPort_Pin IfxPort_P20_9 = {&MODULE_P20, 9}

Definition at line 118 of file IfxPort_PinMap.c.

◆ IfxPort_P21_0

IfxPort_Pin IfxPort_P21_0 = {&MODULE_P21, 0}

Definition at line 119 of file IfxPort_PinMap.c.

◆ IfxPort_P21_1

IfxPort_Pin IfxPort_P21_1 = {&MODULE_P21, 1}

Definition at line 120 of file IfxPort_PinMap.c.

◆ IfxPort_P21_2

IfxPort_Pin IfxPort_P21_2 = {&MODULE_P21, 2}

Definition at line 121 of file IfxPort_PinMap.c.

◆ IfxPort_P21_3

IfxPort_Pin IfxPort_P21_3 = {&MODULE_P21, 3}

Definition at line 122 of file IfxPort_PinMap.c.

◆ IfxPort_P21_4

IfxPort_Pin IfxPort_P21_4 = {&MODULE_P21, 4}

Definition at line 123 of file IfxPort_PinMap.c.

◆ IfxPort_P21_5

IfxPort_Pin IfxPort_P21_5 = {&MODULE_P21, 5}

Definition at line 124 of file IfxPort_PinMap.c.

◆ IfxPort_P21_6

IfxPort_Pin IfxPort_P21_6 = {&MODULE_P21, 6}

Definition at line 125 of file IfxPort_PinMap.c.

◆ IfxPort_P21_7

IfxPort_Pin IfxPort_P21_7 = {&MODULE_P21, 7}

Definition at line 126 of file IfxPort_PinMap.c.

◆ IfxPort_P22_0

IfxPort_Pin IfxPort_P22_0 = {&MODULE_P22, 0}

Definition at line 127 of file IfxPort_PinMap.c.

◆ IfxPort_P22_1

IfxPort_Pin IfxPort_P22_1 = {&MODULE_P22, 1}

Definition at line 128 of file IfxPort_PinMap.c.

◆ IfxPort_P22_2

IfxPort_Pin IfxPort_P22_2 = {&MODULE_P22, 2}

Definition at line 129 of file IfxPort_PinMap.c.

◆ IfxPort_P22_3

IfxPort_Pin IfxPort_P22_3 = {&MODULE_P22, 3}

Definition at line 130 of file IfxPort_PinMap.c.

◆ IfxPort_P23_0

IfxPort_Pin IfxPort_P23_0 = {&MODULE_P23, 0}

Definition at line 131 of file IfxPort_PinMap.c.

◆ IfxPort_P23_1

IfxPort_Pin IfxPort_P23_1 = {&MODULE_P23, 1}

Definition at line 132 of file IfxPort_PinMap.c.

◆ IfxPort_P23_2

IfxPort_Pin IfxPort_P23_2 = {&MODULE_P23, 2}

Definition at line 133 of file IfxPort_PinMap.c.

◆ IfxPort_P23_3

IfxPort_Pin IfxPort_P23_3 = {&MODULE_P23, 3}

Definition at line 134 of file IfxPort_PinMap.c.

◆ IfxPort_P23_4

IfxPort_Pin IfxPort_P23_4 = {&MODULE_P23, 4}

Definition at line 135 of file IfxPort_PinMap.c.

◆ IfxPort_P23_5

IfxPort_Pin IfxPort_P23_5 = {&MODULE_P23, 5}

Definition at line 136 of file IfxPort_PinMap.c.

◆ IfxPort_P32_0

IfxPort_Pin IfxPort_P32_0 = {&MODULE_P32, 0}

Definition at line 137 of file IfxPort_PinMap.c.

◆ IfxPort_P32_2

IfxPort_Pin IfxPort_P32_2 = {&MODULE_P32, 2}

Definition at line 138 of file IfxPort_PinMap.c.

◆ IfxPort_P32_3

IfxPort_Pin IfxPort_P32_3 = {&MODULE_P32, 3}

Definition at line 139 of file IfxPort_PinMap.c.

◆ IfxPort_P32_4

IfxPort_Pin IfxPort_P32_4 = {&MODULE_P32, 4}

Definition at line 140 of file IfxPort_PinMap.c.

◆ IfxPort_P33_0

IfxPort_Pin IfxPort_P33_0 = {&MODULE_P33, 0}

Definition at line 141 of file IfxPort_PinMap.c.

◆ IfxPort_P33_1

IfxPort_Pin IfxPort_P33_1 = {&MODULE_P33, 1}

Definition at line 142 of file IfxPort_PinMap.c.

◆ IfxPort_P33_10

IfxPort_Pin IfxPort_P33_10 = {&MODULE_P33,10}

Definition at line 143 of file IfxPort_PinMap.c.

◆ IfxPort_P33_11

IfxPort_Pin IfxPort_P33_11 = {&MODULE_P33,11}

Definition at line 144 of file IfxPort_PinMap.c.

◆ IfxPort_P33_12

IfxPort_Pin IfxPort_P33_12 = {&MODULE_P33,12}

Definition at line 145 of file IfxPort_PinMap.c.

◆ IfxPort_P33_13

IfxPort_Pin IfxPort_P33_13 = {&MODULE_P33,13}

Definition at line 146 of file IfxPort_PinMap.c.

◆ IfxPort_P33_2

IfxPort_Pin IfxPort_P33_2 = {&MODULE_P33, 2}

Definition at line 147 of file IfxPort_PinMap.c.

◆ IfxPort_P33_3

IfxPort_Pin IfxPort_P33_3 = {&MODULE_P33, 3}

Definition at line 148 of file IfxPort_PinMap.c.

◆ IfxPort_P33_4

IfxPort_Pin IfxPort_P33_4 = {&MODULE_P33, 4}

Definition at line 149 of file IfxPort_PinMap.c.

◆ IfxPort_P33_5

IfxPort_Pin IfxPort_P33_5 = {&MODULE_P33, 5}

Definition at line 150 of file IfxPort_PinMap.c.

◆ IfxPort_P33_6

IfxPort_Pin IfxPort_P33_6 = {&MODULE_P33, 6}

Definition at line 151 of file IfxPort_PinMap.c.

◆ IfxPort_P33_7

IfxPort_Pin IfxPort_P33_7 = {&MODULE_P33, 7}

Definition at line 152 of file IfxPort_PinMap.c.

◆ IfxPort_P33_8

IfxPort_Pin IfxPort_P33_8 = {&MODULE_P33, 8}

Definition at line 153 of file IfxPort_PinMap.c.

◆ IfxPort_P33_9

IfxPort_Pin IfxPort_P33_9 = {&MODULE_P33, 9}

Definition at line 154 of file IfxPort_PinMap.c.

◆ IfxPort_P40_0

IfxPort_Pin IfxPort_P40_0 = {&MODULE_P40, 0}

Definition at line 155 of file IfxPort_PinMap.c.

◆ IfxPort_P40_1

IfxPort_Pin IfxPort_P40_1 = {&MODULE_P40, 1}

Definition at line 156 of file IfxPort_PinMap.c.

◆ IfxPort_P40_2

IfxPort_Pin IfxPort_P40_2 = {&MODULE_P40, 2}

Definition at line 157 of file IfxPort_PinMap.c.

◆ IfxPort_P40_3

IfxPort_Pin IfxPort_P40_3 = {&MODULE_P40, 3}

Definition at line 158 of file IfxPort_PinMap.c.

◆ IfxPort_P40_6

IfxPort_Pin IfxPort_P40_6 = {&MODULE_P40, 6}

Definition at line 159 of file IfxPort_PinMap.c.

◆ IfxPort_P40_7

IfxPort_Pin IfxPort_P40_7 = {&MODULE_P40, 7}

Definition at line 160 of file IfxPort_PinMap.c.

◆ IfxPort_P40_8

IfxPort_Pin IfxPort_P40_8 = {&MODULE_P40, 8}

Definition at line 161 of file IfxPort_PinMap.c.

◆ IfxPort_P40_9

IfxPort_Pin IfxPort_P40_9 = {&MODULE_P40, 9}

Definition at line 162 of file IfxPort_PinMap.c.

◆ IfxPort_Pin_pinTable

const IfxPort_Pin* IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]

Definition at line 165 of file IfxPort_PinMap.c.


iLLD_TC26B: IfxPort_PinMap.h File Reference

  • _PinMap
Macros | Variables
IfxPort_PinMap.h File Reference
iLLD » PORTS

PORT I/O map. More...

#include <Port/Std/IfxPort.h>
Include dependency graph for IfxPort_PinMap.h:

Go to the source code of this file.

Macros

#define | IFXPORT_PINMAP_NUM_MODULES 41
Table dimensions. More...
#define | IFXPORT_PINMAP_PIN_NUM_ITEMS 15

Variables

IFX_EXTERN IfxPort_Pin IfxPort_P00_0
IfxPort_P00_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_1
IfxPort_P00_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_10
IfxPort_P00_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_11
IfxPort_P00_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_12
IfxPort_P00_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_2
IfxPort_P00_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_3
IfxPort_P00_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_4
IfxPort_P00_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_5
IfxPort_P00_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_6
IfxPort_P00_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_7
IfxPort_P00_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_8
IfxPort_P00_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_9
IfxPort_P00_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_0
IfxPort_P02_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_1
IfxPort_P02_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_2
IfxPort_P02_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_3
IfxPort_P02_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_4
IfxPort_P02_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_5
IfxPort_P02_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_6
IfxPort_P02_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_7
IfxPort_P02_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_8
IfxPort_P02_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_0
IfxPort_P10_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_1
IfxPort_P10_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_2
IfxPort_P10_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_3
IfxPort_P10_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_4
IfxPort_P10_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_5
IfxPort_P10_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_6
IfxPort_P10_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_7
IfxPort_P10_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_8
IfxPort_P10_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_10
IfxPort_P11_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_11
IfxPort_P11_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_12
IfxPort_P11_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_2
IfxPort_P11_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_3
IfxPort_P11_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_6
IfxPort_P11_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_9
IfxPort_P11_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_0
IfxPort_P13_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_1
IfxPort_P13_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_2
IfxPort_P13_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_3
IfxPort_P13_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_0
IfxPort_P14_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_1
IfxPort_P14_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_10
IfxPort_P14_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_2
IfxPort_P14_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_3
IfxPort_P14_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_4
IfxPort_P14_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_5
IfxPort_P14_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_6
IfxPort_P14_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_7
IfxPort_P14_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_8
IfxPort_P14_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_9
IfxPort_P14_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_0
IfxPort_P15_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_1
IfxPort_P15_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_2
IfxPort_P15_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_3
IfxPort_P15_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_4
IfxPort_P15_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_5
IfxPort_P15_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_6
IfxPort_P15_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_7
IfxPort_P15_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_8
IfxPort_P15_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_0
IfxPort_P20_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_1
IfxPort_P20_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_10
IfxPort_P20_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_11
IfxPort_P20_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_12
IfxPort_P20_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_13
IfxPort_P20_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_14
IfxPort_P20_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_3
IfxPort_P20_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_6
IfxPort_P20_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_7
IfxPort_P20_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_8
IfxPort_P20_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_9
IfxPort_P20_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_0
IfxPort_P21_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_1
IfxPort_P21_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_2
IfxPort_P21_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_3
IfxPort_P21_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_4
IfxPort_P21_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_5
IfxPort_P21_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_6
IfxPort_P21_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_7
IfxPort_P21_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_0
IfxPort_P22_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_1
IfxPort_P22_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_2
IfxPort_P22_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_3
IfxPort_P22_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_0
IfxPort_P23_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_1
IfxPort_P23_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_2
IfxPort_P23_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_3
IfxPort_P23_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_4
IfxPort_P23_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_5
IfxPort_P23_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_0
IfxPort_P32_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_2
IfxPort_P32_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_3
IfxPort_P32_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_4
IfxPort_P32_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_0
IfxPort_P33_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_1
IfxPort_P33_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_10
IfxPort_P33_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_11
IfxPort_P33_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_12
IfxPort_P33_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_13
IfxPort_P33_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_2
IfxPort_P33_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_3
IfxPort_P33_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_4
IfxPort_P33_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_5
IfxPort_P33_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_6
IfxPort_P33_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_7
IfxPort_P33_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_8
IfxPort_P33_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_9
IfxPort_P33_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_0
IfxPort_P40_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_1
IfxPort_P40_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_2
IfxPort_P40_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_3
IfxPort_P40_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_6
IfxPort_P40_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_7
IfxPort_P40_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_8
IfxPort_P40_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_9
IfxPort_P40_9. More...
IFX_EXTERN const IfxPort_Pin * IfxPort_Pin_pinTable [IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]
IfxPort_Pin table. More...

Detailed Description

PORT I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPort_PinMap.h.


iLLD_TC26B: IfxPort_Io.h File Reference

  • Port
  • Io
Data Structures | Functions
IfxPort_Io.h File Reference
iLLD » PORTS

PORT IO details. More...

#include "Port/Std/IfxPort.h"
Include dependency graph for IfxPort_Io.h:

Go to the source code of this file.

Data Structures

struct | IfxPort_Io_ConfigPin
struct | IfxPort_Io_Config

Functions

IFX_EXTERN void IfxPort_Io_initModule (const IfxPort_Io_Config *config)

Detailed Description

PORT IO details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPort_Io.h.


iLLD_TC26B: IfxPort.h File Reference

  • Port
  • Std
Data Structures | Enumerations | Functions
IfxPort.h File Reference
iLLD » PORTS

PORT basic functionality. More...

#include "_Impl/IfxPort_cfg.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxPort.h:

Go to the source code of this file.

Data Structures

struct | IfxPort_Pin
Defines a pin. More...
struct | IfxPort_Pin_Config
To configure pins. More...

Enumerations

enum IfxPort_ControlledBy {
IfxPort_ControlledBy_port = 0,
IfxPort_ControlledBy_hsct = 1
}
The LVDS RX_DIS control function can be selected from the Port (default) or HSCT module.declared in MODULE_PORTx.LPCRx. More...
enum IfxPort_InputMode {
IfxPort_InputMode_undefined = -1,
IfxPort_InputMode_noPullDevice = 0 << 3,
IfxPort_InputMode_pullDown = 1U << 3,
IfxPort_InputMode_pullUp = 2U << 3
}
Ifx_P output modification modes definition. More...
enum IfxPort_Mode {
IfxPort_Mode_inputNoPullDevice = 0,
IfxPort_Mode_inputPullDown = 8U,
IfxPort_Mode_inputPullUp = 0x10U,
IfxPort_Mode_outputPushPullGeneral = 0x80U,
IfxPort_Mode_outputPushPullAlt1 = 0x88U,
IfxPort_Mode_outputPushPullAlt2 = 0x90U,
IfxPort_Mode_outputPushPullAlt3 = 0x98U,
IfxPort_Mode_outputPushPullAlt4 = 0xA0U,
IfxPort_Mode_outputPushPullAlt5 = 0xA8U,
IfxPort_Mode_outputPushPullAlt6 = 0xB0U,
IfxPort_Mode_outputPushPullAlt7 = 0xB8U,
IfxPort_Mode_outputOpenDrainGeneral = 0xC0U,
IfxPort_Mode_outputOpenDrainAlt1 = 0xC8U,
IfxPort_Mode_outputOpenDrainAlt2 = 0xD0U,
IfxPort_Mode_outputOpenDrainAlt3 = 0xD8U,
IfxPort_Mode_outputOpenDrainAlt4 = 0xE0U,
IfxPort_Mode_outputOpenDrainAlt5 = 0xE8U,
IfxPort_Mode_outputOpenDrainAlt6 = 0xF0U,
IfxPort_Mode_outputOpenDrainAlt7 = 0xF8U
}
Ifx_P input / output mode definition. More...
enum IfxPort_OutputIdx {
IfxPort_OutputIdx_general = 0x10U << 3,
IfxPort_OutputIdx_alt1 = 0x11U << 3,
IfxPort_OutputIdx_alt2 = 0x12U << 3,
IfxPort_OutputIdx_alt3 = 0x13U << 3,
IfxPort_OutputIdx_alt4 = 0x14U << 3,
IfxPort_OutputIdx_alt5 = 0x15U << 3,
IfxPort_OutputIdx_alt6 = 0x16U << 3,
IfxPort_OutputIdx_alt7 = 0x17U << 3
}
Pin output alternate index. More...
enum IfxPort_OutputMode {
IfxPort_OutputMode_pushPull = 0x10U << 3,
IfxPort_OutputMode_openDrain = 0x18U << 3,
IfxPort_OutputMode_none = 0
}
Pin output mode definition. More...
enum IfxPort_PadDriver {
IfxPort_PadDriver_cmosAutomotiveSpeed1 = 0,
IfxPort_PadDriver_cmosAutomotiveSpeed2 = 1,
IfxPort_PadDriver_cmosAutomotiveSpeed3 = 2,
IfxPort_PadDriver_cmosAutomotiveSpeed4 = 3,
IfxPort_PadDriver_lvdsSpeed1 = 4,
IfxPort_PadDriver_lvdsSpeed2 = 5,
IfxPort_PadDriver_lvdsSpeed3 = 6,
IfxPort_PadDriver_lvdsSpeed4 = 7,
IfxPort_PadDriver_ttlSpeed1 = 8,
IfxPort_PadDriver_ttlSpeed2 = 9,
IfxPort_PadDriver_ttlSpeed3 = 10,
IfxPort_PadDriver_ttlSpeed4 = 11
}
Pad driver mode definition (strength and slew rate). More...
enum IfxPort_PadSupply {
IfxPort_PadSupply_5v = 0,
IfxPort_PadSupply_3v = 1
}
MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair. More...
enum IfxPort_State {
IfxPort_State_notChanged = (0 << 16) | (0 << 0),
IfxPort_State_high = (0 << 16) | (1U << 0),
IfxPort_State_low = (1U << 16) | (0 << 0),
IfxPort_State_toggled = (1U << 16) | (1U << 0)
}
Ifx_P output modification modes definition. More...

Functions

IFX_INLINE boolean | IfxPort_getPinState (Ifx_P *port, uint8 pinIndex)
Return the port state. More...
IFX_INLINE void | IfxPort_setPinHigh (Ifx_P *port, uint8 pinIndex)
Set the port output. More...
IFX_INLINE void | IfxPort_setPinLow (Ifx_P *port, uint8 pinIndex)
Reset the port output. More...
IFX_INLINE void | IfxPort_setPinModeInput (Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode. More...
IFX_INLINE void | IfxPort_setPinModeOutput (Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode. More...
IFX_INLINE void | IfxPort_setPinState (Ifx_P *port, uint8 pinIndex, IfxPort_State action)
Set / Resets / Toggle the port output. More...
IFX_INLINE void | IfxPort_togglePin (Ifx_P *port, uint8 pinIndex)
Toggle the port output. More...
IFX_EXTERN boolean | IfxPort_disableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality. More...
IFX_EXTERN boolean | IfxPort_enableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality. More...
IFX_EXTERN void | IfxPort_setPinMode (Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality which bydefault support analog functionality. More...
IFX_EXTERN void | IfxPort_setPinPadDriver (Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode. More...
IFX_INLINE uint32 | IfxPort_getGroupState (Ifx_P *port, uint8 pinIndex, uint16 mask)
Return the port group state. More...
IFX_INLINE void | IfxPort_setGroupState (Ifx_P *port, uint8 pinIndex, uint16 mask, uint16 data)
Set the port group state. More...
IFX_EXTERN Ifx_P * | IfxPort_getAddress (IfxPort_Index port)
Returns the module address of the selected Port module. More...
IFX_EXTERN IfxPort_Index | IfxPort_getIndex (Ifx_P *port)
Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c) More...
IFX_EXTERN void | IfxPort_setGroupModeInput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
Set pin modes to input at the pin location specified by '1' by the mask. More...
IFX_EXTERN void | IfxPort_setGroupModeOutput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Set pin modes to output at the pin location specified by '1' by the mask starting at pinIndex. More...
IFX_EXTERN void | IfxPort_setGroupPadDriver (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
Set pad driver strength at the pin location specified by '1' by the mask. More...
IFX_EXTERN void | IfxPort_setPinModeLvdsHigh (Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode, IfxPort_ControlledBy enablePortControlled)
set LVDSH mode (configured for Port21) More...
IFX_EXTERN void | IfxPort_setPinModeLvdsMedium (Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver lvdsPadDriver, IfxPort_PadSupply padSupply)
set LVDSM mode More...
IFX_EXTERN void | IfxPort_resetESR (Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality. More...
IFX_EXTERN void | IfxPort_setESR (Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality. More...

Detailed Description

PORT basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPort.h.

Function Documentation

◆ IfxPort_resetESR()

IFX_EXTERN void IfxPort_resetESR | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be disabled.
Returns
None
See also
IfxPort_disableEmergencyStop()

Definition at line 135 of file IfxPort.c.

Referenced by IfxPort_disableEmergencyStop().

◆ IfxPort_setESR()

IFX_EXTERN void IfxPort_setESR | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be enabled.
Returns
None
See also
IfxPort_enableEmergencyStop()

Definition at line 145 of file IfxPort.c.

Referenced by IfxPort_enableEmergencyStop().


iLLD_TC26B: PSI5

Modules | Files
PSI5
iLLD
Collaboration diagram for PSI5:

Modules

Implementation
Standard Driver
PSI5 Pin Mapping
How to use the PSI5 PSI5 Interface driver?
PSI5

Files

file | IfxPsi5_cfg.h
PSI5 on-chip implementation data.
file | IfxPsi5_PinMap.c
PSI5 I/O map.
file | IfxPsi5_PinMap.h
PSI5 I/O map.
file | IfxPsi5_Psi5.h
PSI5 PSI5 details.
file | IfxPsi5.h
PSI5 basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » PSI5
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
iLLD » PSI5 » Implementation
Collaboration diagram for Enumerations:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » PSI5
Collaboration diagram for Standard Driver:

Modules

Enumerations
Channel Status Functions
IO Pin Configuration Functions
Interrupt configuration function
Operative functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » PSI5 » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxPsi5_AlternateInput {
IfxPsi5_AlternateInput_0 = 0,
IfxPsi5_AlternateInput_1,
IfxPsi5_AlternateInput_2,
IfxPsi5_AlternateInput_3
}
MODULE_PSI5.IOCRx.ALTI(x = 0,1,2),Alternate input selection. More...
enum IfxPsi5_BaudRate {
IfxPsi5_BaudRate_125 = 0,
IfxPsi5_BaudRate_189 = 1
}
MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection. More...
enum IfxPsi5_CRCorParity {
IfxPsi5_CRCorParity_parity = 0,
IfxPsi5_CRCorParity_crc = 1
}
MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection. More...
enum IfxPsi5_ClockType {
IfxPsi5_ClockType_fracDiv = 0,
IfxPsi5_ClockType_slowClock_125 = 1,
IfxPsi5_ClockType_fastClock_189 = 2,
IfxPsi5_ClockType_timeStamp = 3
}
Clock type. More...
enum IfxPsi5_DigitalInputFilterDepth {
IfxPsi5_DigitalInputFilterDepth_0 = 0,
IfxPsi5_DigitalInputFilterDepth_1,
IfxPsi5_DigitalInputFilterDepth_2,
IfxPsi5_DigitalInputFilterDepth_3,
IfxPsi5_DigitalInputFilterDepth_4,
IfxPsi5_DigitalInputFilterDepth_5,
IfxPsi5_DigitalInputFilterDepth_6,
IfxPsi5_DigitalInputFilterDepth_7,
IfxPsi5_DigitalInputFilterDepth_8,
IfxPsi5_DigitalInputFilterDepth_9,
IfxPsi5_DigitalInputFilterDepth_10,
IfxPsi5_DigitalInputFilterDepth_11,
IfxPsi5_DigitalInputFilterDepth_12,
IfxPsi5_DigitalInputFilterDepth_13,
IfxPsi5_DigitalInputFilterDepth_14,
IfxPsi5_DigitalInputFilterDepth_15
}
MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth. More...
enum IfxPsi5_DividerMode {
IfxPsi5_DividerMode_spb = 0,
IfxPsi5_DividerMode_normal = 1,
IfxPsi5_DividerMode_fractional = 2,
IfxPsi5_DividerMode_off = 3
}
MODULE_PSI5.FDR.DM,Divider mode. More...
enum IfxPsi5_FrameExpectation {
IfxPsi5_FrameExpectation_notExpected = 0,
IfxPsi5_FrameExpectation_expected = 1
}
MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control. More...
enum IfxPsi5_MessagingBits {
IfxPsi5_MessagingBits_absent = 0,
IfxPsi5_MessagingBits_present = 1
}
MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence. More...
enum IfxPsi5_ReceiveDataRegisterTimestamp {
IfxPsi5_ReceiveDataRegisterTimestamp_pulse = 0,
IfxPsi5_ReceiveDataRegisterTimestamp_frame = 1
}
MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers. More...
enum IfxPsi5_Slot {
IfxPsi5_Slot_0 = 0,
IfxPsi5_Slot_1,
IfxPsi5_Slot_2,
IfxPsi5_Slot_3,
IfxPsi5_Slot_4,
IfxPsi5_Slot_5
}
MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id. More...
enum IfxPsi5_SuspendMode {
IfxPsi5_SuspendMode_none = 0,
IfxPsi5_SuspendMode_hard = 1,
IfxPsi5_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxPsi5_TimeBase {
IfxPsi5_TimeBase_internal = 0,
IfxPsi5_TimeBase_external = 1
}
MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base. More...
enum IfxPsi5_TimestampRegister {
IfxPsi5_TimestampRegister_a = 0,
IfxPsi5_TimestampRegister_b = 1,
IfxPsi5_TimestampRegister_c = 2
}
MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type. More...
enum IfxPsi5_Trigger {
IfxPsi5_Trigger_0 = 0,
IfxPsi5_Trigger_1,
IfxPsi5_Trigger_2,
IfxPsi5_Trigger_3,
IfxPsi5_Trigger_4,
IfxPsi5_Trigger_5
}
MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id. More...
enum IfxPsi5_TriggerType {
IfxPsi5_TriggerType_periodic = 0,
IfxPsi5_TriggerType_external = 1,
IfxPsi5_TriggerType_bypass = 2
}
Trigger type. More...
enum IfxPsi5_Verbose {
IfxPsi5_Verbose_off = 0,
IfxPsi5_Verbose_on = 1
}
MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode. More...

Detailed Description

Enumeration Type Documentation

◆ IfxPsi5_AlternateInput

enum IfxPsi5_AlternateInput

MODULE_PSI5.IOCRx.ALTI(x = 0,1,2),Alternate input selection.

Enumerator
IfxPsi5_AlternateInput_0 | Alternate Input 0.
IfxPsi5_AlternateInput_1 | Alternate Input 1.
IfxPsi5_AlternateInput_2 | Alternate Input 2.
IfxPsi5_AlternateInput_3 | Alternate Input 3.

Definition at line 77 of file IfxPsi5.h.

◆ IfxPsi5_BaudRate

enum IfxPsi5_BaudRate

MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection.

Enumerator
IfxPsi5_BaudRate_125 | Slow 125 kHz clock.
IfxPsi5_BaudRate_189 | Fast 189 kHz clock.

Definition at line 87 of file IfxPsi5.h.

◆ IfxPsi5_ClockType

enum IfxPsi5_ClockType

Clock type.

Enumerator
IfxPsi5_ClockType_fracDiv | Fractional Divide clock.
IfxPsi5_ClockType_slowClock_125 | Slow 125 kHz clock.
IfxPsi5_ClockType_fastClock_189 | Fast 189 kHz clock.
IfxPsi5_ClockType_timeStamp | Timestamp clock.

Definition at line 103 of file IfxPsi5.h.

◆ IfxPsi5_CRCorParity

enum IfxPsi5_CRCorParity

MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection.

Enumerator
IfxPsi5_CRCorParity_parity | parity selection
IfxPsi5_CRCorParity_crc | CRC selection.

Definition at line 95 of file IfxPsi5.h.

◆ IfxPsi5_DigitalInputFilterDepth

enum IfxPsi5_DigitalInputFilterDepth

MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth.

Enumerator
IfxPsi5_DigitalInputFilterDepth_0 | Digital input filter depth is 0.
IfxPsi5_DigitalInputFilterDepth_1 | Digital input filter depth is 1.
IfxPsi5_DigitalInputFilterDepth_2 | Digital input filter depth is 2.
IfxPsi5_DigitalInputFilterDepth_3 | Digital input filter depth is 3.
IfxPsi5_DigitalInputFilterDepth_4 | Digital input filter depth is 4.
IfxPsi5_DigitalInputFilterDepth_5 | Digital input filter depth is 5.
IfxPsi5_DigitalInputFilterDepth_6 | Digital input filter depth is 6.
IfxPsi5_DigitalInputFilterDepth_7 | Digital input filter depth is 7.
IfxPsi5_DigitalInputFilterDepth_8 | Digital input filter depth is 8.
IfxPsi5_DigitalInputFilterDepth_9 | Digital input filter depth is 9.
IfxPsi5_DigitalInputFilterDepth_10 | Digital input filter depth is 10.
IfxPsi5_DigitalInputFilterDepth_11 | Digital input filter depth is 11.
IfxPsi5_DigitalInputFilterDepth_12 | Digital input filter depth is 12.
IfxPsi5_DigitalInputFilterDepth_13 | Digital input filter depth is 13.
IfxPsi5_DigitalInputFilterDepth_14 | Digital input filter depth is 14.
IfxPsi5_DigitalInputFilterDepth_15 | Digital input filter depth is 15.

Definition at line 113 of file IfxPsi5.h.

◆ IfxPsi5_DividerMode

enum IfxPsi5_DividerMode

MODULE_PSI5.FDR.DM,Divider mode.

Enumerator
IfxPsi5_DividerMode_spb | divider mode is off
IfxPsi5_DividerMode_normal | divider mode is normal
IfxPsi5_DividerMode_fractional | divider mode is fractional
IfxPsi5_DividerMode_off | divider mode is off

Definition at line 135 of file IfxPsi5.h.

◆ IfxPsi5_FrameExpectation

enum IfxPsi5_FrameExpectation

MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control.

Enumerator
IfxPsi5_FrameExpectation_notExpected | No frame is expected.
IfxPsi5_FrameExpectation_expected | Frame is expected.

Definition at line 145 of file IfxPsi5.h.

◆ IfxPsi5_MessagingBits

enum IfxPsi5_MessagingBits

MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence.

Enumerator
IfxPsi5_MessagingBits_absent | No messaging bits.
IfxPsi5_MessagingBits_present | 2 messaging bits

Definition at line 153 of file IfxPsi5.h.

◆ IfxPsi5_ReceiveDataRegisterTimestamp

enum IfxPsi5_ReceiveDataRegisterTimestamp

MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers.

Enumerator
IfxPsi5_ReceiveDataRegisterTimestamp_pulse | Pulse based timestamp SPTSC to be stored in RDRHC.
IfxPsi5_ReceiveDataRegisterTimestamp_frame | Start of frame based timestamp SPTSC to be stored in RDRHC.

Definition at line 161 of file IfxPsi5.h.

◆ IfxPsi5_Slot

enum IfxPsi5_Slot

MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id.

Enumerator
IfxPsi5_Slot_0 | slot 0
IfxPsi5_Slot_1 | slot 1
IfxPsi5_Slot_2 | slot 2
IfxPsi5_Slot_3 | slot 3
IfxPsi5_Slot_4 | slot 4
IfxPsi5_Slot_5 | slot 5

Definition at line 169 of file IfxPsi5.h.

◆ IfxPsi5_SuspendMode

enum IfxPsi5_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxPsi5_SuspendMode_none | No suspend.
IfxPsi5_SuspendMode_hard | Hard Suspend.
IfxPsi5_SuspendMode_soft | Soft Suspend.

Definition at line 181 of file IfxPsi5.h.

◆ IfxPsi5_TimeBase

enum IfxPsi5_TimeBase

MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base.

Enumerator
IfxPsi5_TimeBase_internal | Internal time stamp clock.
IfxPsi5_TimeBase_external | External GTM inputs.

Definition at line 190 of file IfxPsi5.h.

◆ IfxPsi5_TimestampRegister

enum IfxPsi5_TimestampRegister

MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type.

Enumerator
IfxPsi5_TimestampRegister_a | Timestamp register A.
IfxPsi5_TimestampRegister_b | Timestamp register B.
IfxPsi5_TimestampRegister_c | Timestamp register C.

Definition at line 198 of file IfxPsi5.h.

◆ IfxPsi5_Trigger

enum IfxPsi5_Trigger

MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id.

Enumerator
IfxPsi5_Trigger_0 | trigger 0
IfxPsi5_Trigger_1 | trigger 1
IfxPsi5_Trigger_2 | trigger 2
IfxPsi5_Trigger_3 | trigger 3
IfxPsi5_Trigger_4 | trigger 4
IfxPsi5_Trigger_5 | trigger 5

Definition at line 207 of file IfxPsi5.h.

◆ IfxPsi5_TriggerType

enum IfxPsi5_TriggerType

Trigger type.

Enumerator
IfxPsi5_TriggerType_periodic | Periodic trigger.
IfxPsi5_TriggerType_external | External trigger.
IfxPsi5_TriggerType_bypass | Bypassed trigger.

Definition at line 219 of file IfxPsi5.h.

◆ IfxPsi5_Verbose

enum IfxPsi5_Verbose

MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode.

Enumerator
IfxPsi5_Verbose_off | Verbose mode is turned off.
IfxPsi5_Verbose_on | Verbose mode is turned on.

Definition at line 228 of file IfxPsi5.h.


iLLD_TC26B: Channel Status Functions

Functions
Channel Status Functions
iLLD » PSI5 » Standard Driver
Collaboration diagram for Channel Status Functions:

Functions

IFX_INLINE uint32 | IfxPsi5_getStatusCrci (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the CRCI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusMei (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the MEI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusNbi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NBI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusNfi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NFI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRdi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RDI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRmi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RMI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRsi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RSI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusTei (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the TEI status register contents for a channel More...
IFX_EXTERN void | IfxPsi5_resetModule (Ifx_PSI5 *psi5)
resets PSI5 kernel More...

Detailed Description

Function Documentation

◆ IfxPsi5_getStatusCrci()

IFX_INLINE uint32 IfxPsi5_getStatusCrci | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the CRCI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Crci status register contents

Definition at line 456 of file IfxPsi5.h.

◆ IfxPsi5_getStatusMei()

IFX_INLINE uint32 IfxPsi5_getStatusMei | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the MEI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Mei status register contents

Definition at line 462 of file IfxPsi5.h.

◆ IfxPsi5_getStatusNbi()

IFX_INLINE uint32 IfxPsi5_getStatusNbi | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the NBI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Nbi status register contents

Definition at line 468 of file IfxPsi5.h.

◆ IfxPsi5_getStatusNfi()

IFX_INLINE uint32 IfxPsi5_getStatusNfi | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the NFI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Nfi status register contents

Definition at line 474 of file IfxPsi5.h.

◆ IfxPsi5_getStatusRdi()

IFX_INLINE uint32 IfxPsi5_getStatusRdi | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the RDI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Rdi status register contents

Definition at line 480 of file IfxPsi5.h.

◆ IfxPsi5_getStatusRmi()

IFX_INLINE uint32 IfxPsi5_getStatusRmi | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the RMI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Rmi status register contents

Definition at line 486 of file IfxPsi5.h.

◆ IfxPsi5_getStatusRsi()

IFX_INLINE uint32 IfxPsi5_getStatusRsi | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the RSI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Rsi status register contents

Definition at line 492 of file IfxPsi5.h.

◆ IfxPsi5_getStatusTei()

IFX_INLINE uint32 IfxPsi5_getStatusTei | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the TEI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Tei status register contents

Definition at line 498 of file IfxPsi5.h.

◆ IfxPsi5_resetModule()

IFX_EXTERN void IfxPsi5_resetModule ( Ifx_PSI5 * psi5 )

resets PSI5 kernel

Parameters
psi5 pointer to PSI5 registers
Returns
None

Definition at line 63 of file IfxPsi5.c.


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » PSI5 » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxPsi5_initRxPin (const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxPsi5_initTxPin (const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE void | IfxPsi5_setRxInput (Ifx_PSI5_CH *psi5Ch, IfxPsi5_AlternateInput alternateInput)
Sets the alternate RX input. More...

Detailed Description

Function Documentation

◆ IfxPsi5_initRxPin()

IFX_INLINE void IfxPsi5_initRxPin | ( | const IfxPsi5_Rx_In * | rx,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a RX input.

Parameters
rx | the RX Pin which should be configured
inputMode | pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 504 of file IfxPsi5.h.

Referenced by IfxPsi5_Psi5_initChannel().

◆ IfxPsi5_initTxPin()

IFX_INLINE void IfxPsi5_initTxPin | ( | const IfxPsi5_Tx_Out * | tx,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a TX output.

Parameters
tx | the TX Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 517 of file IfxPsi5.h.

Referenced by IfxPsi5_Psi5_initChannel().

◆ IfxPsi5_setRxInput()

IFX_INLINE void IfxPsi5_setRxInput | ( | Ifx_PSI5_CH * | psi5Ch,
 |  | IfxPsi5_AlternateInput | alternateInput
 | ) |  |

Sets the alternate RX input.

Parameters
psi5Ch | pointer to the PSI5 channel register space
alternateInput | Alternate RX input selection
Returns
None

Definition at line 527 of file IfxPsi5.h.

Referenced by IfxPsi5_initRxPin().


iLLD_TC26B: Interrupt configuration function

Interrupt configuration function
iLLD » PSI5 » Standard Driver
Collaboration diagram for Interrupt configuration function:


iLLD_TC26B: Operative functions

Functions
Operative functions
iLLD » PSI5 » Standard Driver
Collaboration diagram for Operative functions:

Functions

IFX_INLINE boolean | IfxPsi5_isModuleSuspended (Ifx_PSI5 *psi5)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxPsi5_setSuspendMode (Ifx_PSI5 *psi5, IfxPsi5_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxPsi5_disableModule (Ifx_PSI5 *psi5)
Disable PSI5 kernel. More...

Detailed Description

Function Documentation

◆ IfxPsi5_disableModule()

IFX_EXTERN void IfxPsi5_disableModule ( Ifx_PSI5 * psi5 )

Disable PSI5 kernel.

Parameters
psi5 pointer to the base of PSI5 registers
Returns
None

Definition at line 54 of file IfxPsi5.c.

◆ IfxPsi5_isModuleSuspended()

IFX_INLINE boolean IfxPsi5_isModuleSuspended ( Ifx_PSI5 * psi5 )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
psi5 Pointer to PSI5 module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 536 of file IfxPsi5.h.

◆ IfxPsi5_setSuspendMode()

IFX_INLINE void IfxPsi5_setSuspendMode | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
psi5 | Pointer to PSI5 module registers
mode | Module suspend mode
Returns
None

Definition at line 548 of file IfxPsi5.h.


iLLD_TC26B: PSI5 Pin Mapping

Data Structures | Macros | Variables
PSI5 Pin Mapping
iLLD » PSI5
Collaboration diagram for PSI5 Pin Mapping:

Data Structures

struct | IfxPsi5_Rx_In
RX pin mapping structure. More...
struct | IfxPsi5_Tx_Out
TX pin mapping structure. More...

Macros

#define | IFXPSI5_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXPSI5_PINMAP_NUM_CHANNELS 3
#define | IFXPSI5_PINMAP_RX_IN_NUM_ITEMS 3
#define | IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN
PSI5_RX0A: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN
PSI5_RX0B: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN
PSI5_RX0C: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN
PSI5_RX1A: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN
PSI5_RX1B: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN
PSI5_RX1C: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN
PSI5_RX2A: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN
PSI5_RX2B: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN
PSI5_RX2C: PSI5 input. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT
PSI5_TX0: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT
PSI5_TX0: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT
PSI5_TX0: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT
PSI5_TX1: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT
PSI5_TX1: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT
PSI5_TX1: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT
PSI5_TX2: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT
PSI5_TX2: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT
PSI5_TX2: PSI5 output. More...
IFX_EXTERN const IfxPsi5_Rx_In * | IfxPsi5_Rx_In_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5_Rx_In table. More...
IFX_EXTERN const IfxPsi5_Tx_Out * | IfxPsi5_Tx_Out_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5_Tx_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxPsi5_Rx_In

struct IfxPsi5_Rx_In

RX pin mapping structure.

Definition at line 56 of file IfxPsi5_PinMap.h.

Collaboration diagram for IfxPsi5_Rx_In:
[legend]
Data Fields
IfxPsi5_ChannelId | channelId | Channel ID.
Ifx_PSI5 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxPsi5_Tx_Out

struct IfxPsi5_Tx_Out

TX pin mapping structure.

Definition at line 65 of file IfxPsi5_PinMap.h.

Collaboration diagram for IfxPsi5_Tx_Out:
[legend]
Data Fields
IfxPsi5_ChannelId | channelId | Channel ID.
Ifx_PSI5 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXPSI5_PINMAP_NUM_CHANNELS

#define IFXPSI5_PINMAP_NUM_CHANNELS 3

Definition at line 94 of file IfxPsi5_PinMap.h.

◆ IFXPSI5_PINMAP_NUM_MODULES

#define IFXPSI5_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 93 of file IfxPsi5_PinMap.h.

◆ IFXPSI5_PINMAP_RX_IN_NUM_ITEMS

#define IFXPSI5_PINMAP_RX_IN_NUM_ITEMS 3

Definition at line 95 of file IfxPsi5_PinMap.h.

◆ IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS

#define IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS 3

Definition at line 96 of file IfxPsi5_PinMap.h.

Variable Documentation

◆ IfxPsi5_RX0A_P00_1_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN

PSI5_RX0A: PSI5 input.

Definition at line 73 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX0B_P02_3_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN

PSI5_RX0B: PSI5 input.

Definition at line 74 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX0C_P33_1_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN

PSI5_RX0C: PSI5 input.

Definition at line 75 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX1A_P00_3_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN

PSI5_RX1A: PSI5 input.

Definition at line 76 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX1B_P02_5_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN

PSI5_RX1B: PSI5 input.

Definition at line 77 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX1C_P33_3_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN

PSI5_RX1C: PSI5 input.

Definition at line 78 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX2A_P00_5_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN

PSI5_RX2A: PSI5 input.

Definition at line 79 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX2B_P02_7_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN

PSI5_RX2B: PSI5 input.

Definition at line 80 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX2C_P33_5_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN

PSI5_RX2C: PSI5 input.

Definition at line 81 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_Rx_In_pinTable

IFX_EXTERN const IfxPsi5_Rx_In* IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]

IfxPsi5_Rx_In table.

Definition at line 100 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX0_P00_2_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT

PSI5_TX0: PSI5 output.

Definition at line 82 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX0_P02_2_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT

PSI5_TX0: PSI5 output.

Definition at line 83 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX0_P33_2_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT

PSI5_TX0: PSI5 output.

Definition at line 84 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX1_P00_4_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT

PSI5_TX1: PSI5 output.

Definition at line 85 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX1_P02_6_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT

PSI5_TX1: PSI5 output.

Definition at line 86 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX1_P33_4_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT

PSI5_TX1: PSI5 output.

Definition at line 87 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX2_P00_6_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT

PSI5_TX2: PSI5 output.

Definition at line 88 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX2_P02_8_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT

PSI5_TX2: PSI5 output.

Definition at line 89 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX2_P33_6_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT

PSI5_TX2: PSI5 output.

Definition at line 90 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_Tx_Out_pinTable

IFX_EXTERN const IfxPsi5_Tx_Out* IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]

IfxPsi5_Tx_Out table.

Definition at line 103 of file IfxPsi5_PinMap.h.


iLLD_TC26B: How to use the PSI5 PSI5 Interface driver?

How to use the PSI5 PSI5 Interface driver?
iLLD » PSI5
Collaboration diagram for How to use the PSI5 PSI5 Interface driver?:

PSI5 communicates with the external world via one input/output line for each channel.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Psi5/Psi5/IfxPsi5_Psi5.h>

Variables

//used globally

IfxPsi5_Psi5_Channel psi5Channel[IFXPSI5_PINMAP_NUM_CHANNELS];

Module Initialisation

// create module config
IfxPsi5_Psi5_Config psi5Config;
IfxPsi5_Psi5_initModuleConfig(&psi5Config, &MODULE_PSI5);
// initialize module
IfxPsi5_Psi5 psi5;
IfxPsi5_Psi5_initModule(&psi5, &psi5Config);

Channel Initialisation

// create channel config
IfxPsi5_Psi5_ChannelConfig psi5ChannelConfig;
IfxPsi5_Psi5_initChannelConfig(&psi5ChannelConfig, &psi5);
psi5ChannelConfig.watchdogTimerLimit[0] = 0x32; // initial delay before slot 0 starts
psi5ChannelConfig.watchdogTimerLimit[1] = 0x90;
psi5ChannelConfig.watchdogTimerLimit[2] = 0x10;
psi5ChannelConfig.watchdogTimerLimit[3] = 0x10;
psi5ChannelConfig.watchdogTimerLimit[4] = 0x10;
psi5ChannelConfig.watchdogTimerLimit[5] = 0x10;
psi5ChannelConfig.watchdogTimerLimit[6] = 0x10;
for(int slot=0; slot<6; ++slot) {
psi5ChannelConfig.receiveControl.payloadLength[slot] = 8;
if( slot == 0 )
psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_expected;
else
psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_notExpected;
}
// initialize channels
for(int chn=0; chn<IFXPSI5_PINMAP_NUM_CHANNELS; ++chn) {
psi5ChannelConfig.channelId = (IfxPsi5_ChannelId)chn;
// TODO: currently no IOCRx.ALTI config field
unsigned alti = 0;
IfxPsi5_Psi5_PinsConfig pinsConfig;
for(int module=0;module<IFXPSI5_PINMAP_NUM_MODULES;module++)
{
pinsConfig.in = IfxPsi5_Rx_In_pinTable[module][chn][alti];
pinsConfig.inMode = IfxPort_InputMode_pullUp;
pinsConfig.out = IfxPsi5_Tx_Out_pinTable[module][chn][alti];
}
pinsConfig.outMode = IfxPort_OutputMode_pushPull;
pinsConfig.pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
psi5ChannelConfig.pinsConfig = &pinsConfig;
IfxPsi5_Psi5_initChannel(&psi5Channel[chn], &psi5ChannelConfig);
}

read channel frame

for(int i=0; i<5; ++i) {
for(int chn=0; chn<IFXPSI5_PINMAP_NUM_CHANNELS; ++chn) {
IfxPsi5_Psi5_Frame frame;
while( !IfxPsi5_Psi5_readChannelFrame(&psi5Channel[chn], &frame) );
}
}


iLLD_TC26B: PSI5

Modules
PSI5
iLLD » PSI5
Collaboration diagram for PSI5:

Modules

Data Structures
Module Initialisation functions
Channel functions
Clock Intialisation functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » PSI5 » PSI5
Collaboration diagram for Data Structures:

Data Structures

struct | IfxPsi5_Psi5
PSI5 handle data structure. More...
struct | IfxPsi5_Psi5_ChannelTrigger
channel trigger configuration structure More...
struct | IfxPsi5_Psi5_Clock
Clock configuration data structure. More...
struct | IfxPsi5_Psi5_FrameData
Psi5 frame data structure with individual members. More...
struct | IfxPsi5_Psi5_InputOutputControl
Input output configuration structure. More...
struct | IfxPsi5_Psi5_Message
Psi5 serial message with individual members. More...
struct | IfxPsi5_Psi5_PulseGeneration
Sync pulse generation configuration structure. More...
struct | IfxPsi5_Psi5_Rdm
Psi5 frame in double word format. More...
struct | IfxPsi5_Psi5_Rds
Psi5 serial message as unsigned 32 bit value. More...
struct | IfxPsi5_Psi5_ReceiveControl
Receive control configuration structure. More...
struct | IfxPsi5_Psi5_TimeStampConfig
Timestamp configuration data structure. More...
struct | IfxPsi5_Psi5_TransmitControl
Transmit control configuration structure. More...
struct | IfxPsi5_Psi5_Channel
Channel handle data structure. More...
struct | IfxPsi5_Psi5_ChannelConfig
Channel configuration structure. More...
struct | IfxPsi5_Psi5_Config
PSI5 module configuration structure. More...
union | IfxPsi5_Psi5_Frame
Psi5 frame data union. More...
union | IfxPsi5_Psi5_SerialMessage
Psi5 serial message data structure. More...
struct | IfxPsi5_Psi5_StartupOptions
startup related options TBD More...

Detailed Description

Data Structure Documentation

◆ IfxPsi5_Psi5

struct IfxPsi5_Psi5

PSI5 handle data structure.

Definition at line 163 of file IfxPsi5_Psi5.h.

Data Fields
Ifx_PSI5 * psi5 Specifies the pointer to the PSI5 module registers.

◆ IfxPsi5_Psi5_ChannelTrigger

struct IfxPsi5_Psi5_ChannelTrigger

channel trigger configuration structure

Definition at line 170 of file IfxPsi5_Psi5.h.

Data Fields
uint32 | channelTriggerCounter | Specifies the channel trigger counter.
uint32 | channelTriggerValue | Specifies the channel trigger value CTV.

◆ IfxPsi5_Psi5_Clock

struct IfxPsi5_Psi5_Clock

Clock configuration data structure.

Definition at line 178 of file IfxPsi5_Psi5.h.

Data Fields
uint32 | frequency | Specifies the frequency for the clock.
IfxPsi5_DividerMode | mode | Specifies the mode of division for the clock.
IfxPsi5_ClockType | type | Specifies the type of clock (fracDiv / slow 125kHz / fast 189 kHz / timestamp)

◆ IfxPsi5_Psi5_FrameData

struct IfxPsi5_Psi5_FrameData

Psi5 frame data structure with individual members.

Definition at line 187 of file IfxPsi5_Psi5.h.

Data Fields
uint8 | crc: 3 | Received crc.
uint8 | crcError: 1 | Crc error flag.
uint8 | messagingBitsError: 1 | Messaging bits error flag.
uint8 | noFrameReceivedError: 1 | No frame received flag.
uint8 | numberOfBitsError: 1 | Number of bits error flag.
uint32 | readData: 28 | Received data.
uint8 | receiveMemoryOverflowError: 1 | Receive buffer overflow error flag.
uint8 | slotCounter: 3 | Slot counter.
uint8 | timeslotError: 1 | Time slot error flag.
uint32 | timestamp: 24 | Timestamp.

◆ IfxPsi5_Psi5_InputOutputControl

struct IfxPsi5_Psi5_InputOutputControl

Input output configuration structure.

Definition at line 203 of file IfxPsi5_Psi5.h.

Data Fields
IfxPsi5_DigitalInputFilterDepth | digitalInputFilterDepth | Specifies the the number of port input samples considered for floating average.
boolean | inputInverterEnabled | Specifies the pulse polarity of the input.
boolean | outputInverterEnabled | Specifies the pulse polarity of the output.

◆ IfxPsi5_Psi5_Message

struct IfxPsi5_Psi5_Message

Psi5 serial message with individual members.

Definition at line 212 of file IfxPsi5_Psi5.h.

Data Fields
uint8 | configuration: 1 | Serial message configuration.
uint8 | crc: 6 | Serial message crc.
uint8 | messageId: 8 | Serial message Id.
uint16 | serialData: 16 | Serial message data.
uint8 | serialMessageCRCFailedError: 1 | Serial message crc error flag.

◆ IfxPsi5_Psi5_PulseGeneration

struct IfxPsi5_Psi5_PulseGeneration

Sync pulse generation configuration structure.

Definition at line 223 of file IfxPsi5_Psi5.h.

Data Fields
uint32 | blankoutTime | Specifies the duration of blank out period.
uint32 | delayLength | Specifies the additional length of the pulse width for coding a '1'.
IfxPsi5_Trigger | externalTimeBaseSelect | Specifies the clock source for CTV in the case of external.
IfxPsi5_Trigger | externalTriggerSelect | Specifies the trigger source in case of external triggerring.
IfxPsi5_TriggerType | periodicOrExternalOrBypass | Specifies whether periodic trigger or external trigger or bypass is selected.
uint32 | pulseLength | Specifies the standard pulse width without data coding for standard pulse width or for coding a '0'.
IfxPsi5_TimeBase | timeBaseSelect | Specifies the clock source for CTV as internal or external.

◆ IfxPsi5_Psi5_Rdm

struct IfxPsi5_Psi5_Rdm

Psi5 frame in double word format.

Definition at line 236 of file IfxPsi5_Psi5.h.

Data Fields
uint32 | highWord | Upper 32 bits of the Psi5 frame.
uint32 | lowWord | Lower 32 bits of the Psi5 frame.

◆ IfxPsi5_Psi5_Rds

struct IfxPsi5_Psi5_Rds

Psi5 serial message as unsigned 32 bit value.

Definition at line 244 of file IfxPsi5_Psi5.h.

Data Fields
uint32 value 32 bit value of the Psi5 serial message

◆ IfxPsi5_Psi5_ReceiveControl

struct IfxPsi5_Psi5_ReceiveControl

Receive control configuration structure.

Definition at line 251 of file IfxPsi5_Psi5.h.

Data Fields
boolean | asynchronousModeSelected | Specifies the asynchronous mode of operation.
IfxPsi5_BaudRate | baudrateSelect | Specifies the baudrate selection.
IfxPsi5_CRCorParity | crcOrParity[IFXPSI5_NUM_SLOTS] | Specifies the crc or parity selection for the slots 0 to 5.
uint32 | fifoWarningLevel | Specifies the fifo warning level.
IfxPsi5_FrameExpectation | frameExpectation[IFXPSI5_NUM_SLOTS] | Specifies whether the frame is expected or not in the slots 0 to 5.
IfxPsi5_TimestampRegister | frameTimestampSelect | Specifies the timestamp register selection for start of frames.
IfxPsi5_MessagingBits | messagingBitsPresence[IFXPSI5_NUM_SLOTS] | Specifies the presence or absence of messaging bits in the slots 0 to 5.
uint32 | payloadLength[IFXPSI5_NUM_SLOTS] | Specifies the payload length for the slots 0 to 5.
IfxPsi5_TimestampRegister | pulseTimestampSelect | Specifies the timestamp register selection for pulses.
IfxPsi5_ReceiveDataRegisterTimestamp | receiveDataRegisterTimestamp | Specifies the pulse or start of frame based timestamp to be stored in receive data register RDRH.
IfxPsi5_Verbose | verbose[IFXPSI5_NUM_SLOTS] | Specifies the verbose is enabled or disabled for the slots 0 to 5.
IfxPsi5_Verbose | verboseForAsynchronousMode | Specifies the verbose mode selection in asynchronous mode of operation.

◆ IfxPsi5_Psi5_TimeStampConfig

struct IfxPsi5_Psi5_TimeStampConfig

Timestamp configuration data structure.

Definition at line 269 of file IfxPsi5_Psi5.h.

Data Fields
IfxPsi5_Trigger | externalTimeBaseSelect | Specifies the clock base for counter CTS in the case of external.
IfxPsi5_TimeBase | timeBaseSelect | Specifies the clock source for CTS as internal or external.

◆ IfxPsi5_Psi5_TransmitControl

struct IfxPsi5_Psi5_TransmitControl

Transmit control configuration structure.

Definition at line 277 of file IfxPsi5_Psi5.h.

Data Fields
boolean | bitStuffingEnabled | Specifies whether the bit stuffing is turned on or not.
boolean | crcGenerationEnabled | Specifies whether the crc generation is turned on or not.
boolean | enhancedProtocolSelected | Specifies whether the enhanced protocol is selected or not.
boolean | inhibitingAutomaticTransferEnabled | Specifies whether automatic transfer from the shift registers SSRL/H to SORL/H is inhibited or not.
uint32 | payloadLength | Specifies the payload length to be sent.
uint32 | sorPayloadLength | Specifies the payload length of SOR.
uint32 | ssrPayloadLength | Specifies the payload length of SSR.
boolean | startSequenceGenerationEnabled | Specifies whether the start sequence generation is turned on or not.

◆ IfxPsi5_Psi5_Channel

struct IfxPsi5_Psi5_Channel

Channel handle data structure.

Definition at line 306 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_Channel:
[legend]
Data Fields
Ifx_PSI5_CH * | channel | Pointer to the channel registers.
IfxPsi5_ChannelId | channelId | Specifies the channel index.
IfxPsi5_Psi5 * | module | The PSI5 handle structure.

◆ IfxPsi5_Psi5_ChannelConfig

struct IfxPsi5_Psi5_ChannelConfig

Channel configuration structure.

Definition at line 315 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_ChannelConfig:
[legend]
Data Fields
IfxPsi5_ChannelId | channelId | Specifies the channel index.
IfxPsi5_Psi5_ChannelTrigger | channelTrigger | Specifies the configuration for channel trigger.
IfxPsi5_Psi5_InputOutputControl | inputOutputControl | Specifies the configuration for input output control.
IFX_CONST IfxPsi5_Psi5 * | module | Specifies pointer to the IfxPsi5_Psi5 module handle.
IFX_CONST IfxPsi5_Psi5_PinsConfig * | pinsConfig | Pin Configuration structure.
IfxPsi5_Psi5_PulseGeneration | pulseGeneration | Specifies the configuration for sync pulse generation.
IfxPsi5_Psi5_ReceiveControl | receiveControl | Specifies the configuration for reception.
IfxPsi5_Psi5_TransmitControl | sendControl | Specifies the configuration for transmission.
uint32 | watchdogTimerLimit[IFXPSI5_NUM_WDTS] | Specifies the watchdog timer limit for each of the slots 0 to 6.

◆ IfxPsi5_Psi5_Config

struct IfxPsi5_Psi5_Config

PSI5 module configuration structure.

Definition at line 330 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_Config:
[legend]
Data Fields
IfxPsi5_Psi5_Clock | fastClock | Specifies the faster f189 clock properties.
IfxPsi5_Psi5_Clock | fracDiv | Specifies fractionally divided clock properties.
Ifx_PSI5 * | psi5 | Specifies the pointer to the PSI5 module registers.
IfxPsi5_Psi5_Clock | slowClock | Specifies the slower f125 clock properties.
IfxPsi5_Psi5_Clock | timestampClock | Specifies the time stamp clock properties.
IfxPsi5_Psi5_TimeStampConfig | timestampCounterA | Specifies the time stamp counter A properties.
IfxPsi5_Psi5_TimeStampConfig | timestampCounterB | Specifies the time stamp counter B properties.
IfxPsi5_Psi5_TimeStampConfig | timestampCounterC | Specifies the time stamp counter C properties.

◆ IfxPsi5_Psi5_Frame

union IfxPsi5_Psi5_Frame

Psi5 frame data union.

Definition at line 344 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_Frame:
[legend]
Data Fields
IfxPsi5_Psi5_FrameData | frame | Psi5 frame data structure with individual members.
IfxPsi5_Psi5_Rdm | rdm | Psi5 frame in double word format.

◆ IfxPsi5_Psi5_SerialMessage

union IfxPsi5_Psi5_SerialMessage

Psi5 serial message data structure.

Definition at line 352 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_SerialMessage:
[legend]
Data Fields
IfxPsi5_Psi5_Message | message | Psi5 serial message with individual members.
IfxPsi5_Psi5_Rds | rds | Psi5 serial message as unsigned 32 bit value.

◆ IfxPsi5_Psi5_StartupOptions

struct IfxPsi5_Psi5_StartupOptions

startup related options TBD

Definition at line 360 of file IfxPsi5_Psi5.h.

Data Fields
uint8 | a: 1 | TBD.
uint32 | b: 31 | TBD.


iLLD_TC26B: Module Initialisation functions

Functions
Module Initialisation functions
iLLD » PSI5 » PSI5
Collaboration diagram for Module Initialisation functions:

Functions

IFX_EXTERN void | IfxPsi5_Psi5_deInitModule (IfxPsi5_Psi5 *psi5)
Resets the PSI5 module. More...
IFX_EXTERN void | IfxPsi5_Psi5_enableModule (Ifx_PSI5 *psi5)
Enable PSI5 kernel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_initModule (IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
Initialise the PSI5 with the supplied configureation. More...
IFX_EXTERN void | IfxPsi5_Psi5_initModuleConfig (IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
Initialise buffer with default PSI5 configuration. More...
IFX_EXTERN void | IfxPsi5_Psi5_resetModule (Ifx_PSI5 *psi5)
Reset PSI5 kernel. More...

Detailed Description

Function Documentation

◆ IfxPsi5_Psi5_deInitModule()

IFX_EXTERN void IfxPsi5_Psi5_deInitModule ( IfxPsi5_Psi5 * psi5 )

Resets the PSI5 module.

Parameters
psi5 pointer to the PSI5 module
Returns
None

Definition at line 54 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_enableModule()

IFX_EXTERN void IfxPsi5_Psi5_enableModule ( Ifx_PSI5 * psi5 )

Enable PSI5 kernel.

Parameters
psi5 pointer to the base of PSI5 registers
Returns
None

Definition at line 62 of file IfxPsi5_Psi5.c.

Referenced by IfxPsi5_Psi5_initModule().

◆ IfxPsi5_Psi5_initModule()

IFX_EXTERN boolean IfxPsi5_Psi5_initModule | ( | IfxPsi5_Psi5 * | psi5,
 |  | const IfxPsi5_Psi5_Config * | config
 | ) |  |

Initialise the PSI5 with the supplied configureation.

Parameters
psi5 | pointer to the PSI5 module
config | pointer to the PSI5 configuration
Returns
return TRUE on success & FALSE if configuration not valid

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 330 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_initModuleConfig()

IFX_EXTERN void IfxPsi5_Psi5_initModuleConfig | ( | IfxPsi5_Psi5_Config * | config,
 |  | Ifx_PSI5 * | psi5
 | ) |  |

Initialise buffer with default PSI5 configuration.

Parameters
config | pointer to the PSI5 module configuration
psi5 | base address of the PSI5 register space
Returns
None

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 383 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_resetModule()

IFX_EXTERN void IfxPsi5_Psi5_resetModule ( Ifx_PSI5 * psi5 )

Reset PSI5 kernel.

Parameters
psi5 pointer to the base of PSI5 registers
Returns
None

Definition at line 540 of file IfxPsi5_Psi5.c.

Referenced by IfxPsi5_Psi5_deInitModule().


iLLD_TC26B: Channel functions

Functions
Channel functions
iLLD » PSI5 » PSI5
Collaboration diagram for Channel functions:

Functions

IFX_INLINE boolean | IfxPsi5_Psi5_startupChannel (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_StartupOptions *options)
start the channel with the selected options More...
IFX_EXTERN boolean | IfxPsi5_Psi5_initChannel (IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxPsi5_Psi5_initChannelConfig (IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
Get the current channel configuration (e.g. sample settings) More...
IFX_EXTERN boolean | IfxPsi5_Psi5_readChannelFrame (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
Gets the received psi5 frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_readChannelSerialMessage (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
Get the received serial message for the channel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_sendChannelData (IfxPsi5_Psi5_Channel *channel, uint64 data)
Transmit the data through the channel. More...

Detailed Description

Function Documentation

◆ IfxPsi5_Psi5_initChannel()

IFX_EXTERN boolean IfxPsi5_Psi5_initChannel | ( | IfxPsi5_Psi5_Channel * | channel,
 |  | const IfxPsi5_Psi5_ChannelConfig * | config
 | ) |  |

Initialize the channel with the supplied configuration.

Parameters
channel | pointer to the PSI5 channel
config | pointer to the PSI5 channel configuration
Returns
TRUE on success & FALSE if configuration not valid

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 95 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_initChannelConfig()

IFX_EXTERN void IfxPsi5_Psi5_initChannelConfig | ( | IfxPsi5_Psi5_ChannelConfig * | config,
 |  | IfxPsi5_Psi5 * | psi5
 | ) |  |

Get the current channel configuration (e.g. sample settings)

Parameters
config | pointer to the PSI5 channel configuration
psi5 | pointer to the PSI5 module
Returns
None

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 245 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_readChannelFrame()

IFX_EXTERN boolean IfxPsi5_Psi5_readChannelFrame | ( | IfxPsi5_Psi5_Channel * | channel,
 |  | IfxPsi5_Psi5_Frame * | frame
 | ) |  |

Gets the received psi5 frame for the channel.

Parameters
channel | pointer to the PSI5 channel
frame | pointer to the PSI5 frame buffer
Returns
TRUE if successful; FALSE if no frame available

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 514 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_readChannelSerialMessage()

IFX_EXTERN boolean IfxPsi5_Psi5_readChannelSerialMessage | ( | IfxPsi5_Psi5_Channel * | channel,
 |  | IfxPsi5_Slot | slot,
 |  | IfxPsi5_Psi5_SerialMessage * | message
 | ) |  |

Get the received serial message for the channel.

Parameters
channel | pointer to the PSI5 channel
slot | Slot Id
message | pointer to the PSI5 serial message buffer
Returns
TRUE if successful; FALSE if no serial message available

Definition at line 532 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_sendChannelData()

IFX_EXTERN boolean IfxPsi5_Psi5_sendChannelData | ( | IfxPsi5_Psi5_Channel * | channel,
 |  | uint64 | data
 | ) |  |

Transmit the data through the channel.

Parameters
channel | pointer to the PSI5 channel
data | data to be sent
Returns
TRUE if successful; FALSE otherwise

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 558 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_startupChannel()

IFX_INLINE boolean IfxPsi5_Psi5_startupChannel | ( | IfxPsi5_Psi5_Channel * | channel,
 |  | IfxPsi5_Psi5_StartupOptions * | options
 | ) |  |

start the channel with the selected options

Parameters
channel | pointer to the PSI5 channel
options | startup related options
Returns
TRUE if successful; FALSE otherwise

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 512 of file IfxPsi5_Psi5.h.


iLLD_TC26B: Clock Intialisation functions

Functions
Clock Intialisation functions
iLLD » PSI5 » PSI5
Collaboration diagram for Clock Intialisation functions:

Functions

IFX_EXTERN uint32 | IfxPsi5_Psi5_getFracDivClock (Ifx_PSI5 *psi5)
Returns the configured fracDiv psi5 clock frequency in Hz. More...
IFX_EXTERN uint32 | IfxPsi5_Psi5_initializeClock (Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
Configure the fracDiv clock. More...

Detailed Description

Function Documentation

◆ IfxPsi5_Psi5_getFracDivClock()

IFX_EXTERN uint32 IfxPsi5_Psi5_getFracDivClock ( Ifx_PSI5 * psi5 )

Returns the configured fracDiv psi5 clock frequency in Hz.

Parameters
psi5 Pointer to the base of PSI5 registers
Returns
Returns the configured fracDiv psi5 clock frequency in Hz.

Definition at line 68 of file IfxPsi5_Psi5.c.

Referenced by IfxPsi5_Psi5_initializeClock().

◆ IfxPsi5_Psi5_initializeClock()

IFX_EXTERN uint32 IfxPsi5_Psi5_initializeClock | ( | Ifx_PSI5 * | psi5,
 |  | const IfxPsi5_Psi5_Clock * | clock
 | ) |  |

Configure the fracDiv clock.

Parameters
psi5 | Pointer to the base of PSI5 registers
clock | Specifies the required clock frequency in Hz.
Returns
Returns the configured clock frequency in Hz.

Definition at line 409 of file IfxPsi5_Psi5.c.

Referenced by IfxPsi5_Psi5_initModule().


iLLD_TC26B: IfxPsi5_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxPsi5_cfg.h File Reference
iLLD » PSI5

PSI5 on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXPSI5_STEP_RANGE 1024
#define | IFXPSI5_NUM_WDTS 7
#define | IFXPSI5_NUM_SLOTS 6
#define | IFXPSI5_ENABLE_CHANNELTRIGGER (1 << 8)
#define | IFXPSI5_ENABLE_CHANNEL (1 << 16)
#define | IFXPSI5_DEFAULT_SLOWCLOCK_FREQ 4000000
#define | IFXPSI5_DEFAULT_FASTCLOCK_FREQ 6000000
#define | IFXPSI5_DEFAULT_TIMESTAMP_FREQ 1000000
#define | IFXPSI5_NUM_CHANNELS 3
#define | IFXPSI5_NUM_MODULES (1)

Enumerations

enum IfxPsi5_ChannelId {
IfxPsi5_ChannelId_none = -1,
IfxPsi5_ChannelId_0 = 0,
IfxPsi5_ChannelId_1 = 1,
IfxPsi5_ChannelId_2 = 2
}
Channel Id. More...

Detailed Description

PSI5 on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5_cfg.h.

Macro Definition Documentation

◆ IFXPSI5_DEFAULT_FASTCLOCK_FREQ

#define IFXPSI5_DEFAULT_FASTCLOCK_FREQ 6000000

Definition at line 76 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initModuleConfig().

◆ IFXPSI5_DEFAULT_SLOWCLOCK_FREQ

#define IFXPSI5_DEFAULT_SLOWCLOCK_FREQ 4000000

Definition at line 74 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initModuleConfig().

◆ IFXPSI5_DEFAULT_TIMESTAMP_FREQ

#define IFXPSI5_DEFAULT_TIMESTAMP_FREQ 1000000

Definition at line 78 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initModuleConfig().

◆ IFXPSI5_ENABLE_CHANNEL

#define IFXPSI5_ENABLE_CHANNEL (1 << 16)

Definition at line 72 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initChannel().

◆ IFXPSI5_ENABLE_CHANNELTRIGGER

#define IFXPSI5_ENABLE_CHANNELTRIGGER (1 << 8)

Definition at line 70 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initChannel().

◆ IFXPSI5_NUM_CHANNELS

#define IFXPSI5_NUM_CHANNELS 3

Definition at line 80 of file IfxPsi5_cfg.h.

◆ IFXPSI5_NUM_MODULES

#define IFXPSI5_NUM_MODULES (1)

Definition at line 82 of file IfxPsi5_cfg.h.

◆ IFXPSI5_NUM_SLOTS

#define IFXPSI5_NUM_SLOTS 6

Definition at line 68 of file IfxPsi5_cfg.h.

◆ IFXPSI5_NUM_WDTS

#define IFXPSI5_NUM_WDTS 7

Definition at line 66 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initChannel().

◆ IFXPSI5_STEP_RANGE

#define IFXPSI5_STEP_RANGE 1024

Definition at line 64 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_getFracDivClock(), and IfxPsi5_Psi5_initializeClock().

Enumeration Type Documentation

◆ IfxPsi5_ChannelId

enum IfxPsi5_ChannelId

Channel Id.

Enumerator
IfxPsi5_ChannelId_none | None of the Ifx_PSI5 Channels.
IfxPsi5_ChannelId_0 | Specifies PSI5 channel 0.
IfxPsi5_ChannelId_1 | Specifies PSI5 channel 1.
IfxPsi5_ChannelId_2 | Specifies PSI5 channel 2.

Definition at line 90 of file IfxPsi5_cfg.h.


iLLD_TC26B: IfxPsi5_PinMap.c File Reference

  • _PinMap
Variables
IfxPsi5_PinMap.c File Reference
iLLD » PSI5

PSI5 I/O map. More...

#include "IfxPsi5_PinMap.h"
Include dependency graph for IfxPsi5_PinMap.c:

Go to the source code of this file.

Variables

IfxPsi5_Rx_In | IfxPsi5_RX0A_P00_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_a}
IfxPsi5_Rx_In | IfxPsi5_RX0B_P02_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 3}, Ifx_RxSel_b}
IfxPsi5_Rx_In | IfxPsi5_RX0C_P33_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 1}, Ifx_RxSel_c}
IfxPsi5_Rx_In | IfxPsi5_RX1A_P00_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 3}, Ifx_RxSel_a}
IfxPsi5_Rx_In | IfxPsi5_RX1B_P02_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 5}, Ifx_RxSel_b}
IfxPsi5_Rx_In | IfxPsi5_RX1C_P33_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 3}, Ifx_RxSel_c}
IfxPsi5_Rx_In | IfxPsi5_RX2A_P00_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 5}, Ifx_RxSel_a}
IfxPsi5_Rx_In | IfxPsi5_RX2B_P02_7_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 7}, Ifx_RxSel_b}
IfxPsi5_Rx_In | IfxPsi5_RX2C_P33_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 5}, Ifx_RxSel_c}
IfxPsi5_Tx_Out | IfxPsi5_TX0_P00_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX0_P02_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX0_P33_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX1_P00_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX1_P02_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX1_P33_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX2_P00_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX2_P02_8_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX2_P33_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt4}
const IfxPsi5_Rx_In * | IfxPsi5_Rx_In_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
const IfxPsi5_Tx_Out * | IfxPsi5_Tx_Out_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]

Detailed Description

PSI5 I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5_PinMap.c.

Variable Documentation

◆ IfxPsi5_RX0A_P00_1_IN

IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_a}

Definition at line 45 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX0B_P02_3_IN

IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 3}, Ifx_RxSel_b}

Definition at line 46 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX0C_P33_1_IN

IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 1}, Ifx_RxSel_c}

Definition at line 47 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX1A_P00_3_IN

IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 3}, Ifx_RxSel_a}

Definition at line 48 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX1B_P02_5_IN

IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 5}, Ifx_RxSel_b}

Definition at line 49 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX1C_P33_3_IN

IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 3}, Ifx_RxSel_c}

Definition at line 50 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX2A_P00_5_IN

IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 5}, Ifx_RxSel_a}

Definition at line 51 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX2B_P02_7_IN

IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 7}, Ifx_RxSel_b}

Definition at line 52 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX2C_P33_5_IN

IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 5}, Ifx_RxSel_c}

Definition at line 53 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_Rx_In_pinTable

const IfxPsi5_Rx_In* IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
Initial value:
= {
{
{
&IfxPsi5_RX0A_P00_1_IN,
&IfxPsi5_RX0B_P02_3_IN,
&IfxPsi5_RX0C_P33_1_IN
},
{
&IfxPsi5_RX1A_P00_3_IN,
&IfxPsi5_RX1B_P02_5_IN,
&IfxPsi5_RX1C_P33_3_IN
},
{
&IfxPsi5_RX2A_P00_5_IN,
&IfxPsi5_RX2B_P02_7_IN,
&IfxPsi5_RX2C_P33_5_IN
}
}
}
IfxPsi5_RX1C_P33_3_IN
IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN
Definition: IfxPsi5_PinMap.c:50
IfxPsi5_RX1A_P00_3_IN
IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN
Definition: IfxPsi5_PinMap.c:48
IfxPsi5_RX0B_P02_3_IN
IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN
Definition: IfxPsi5_PinMap.c:46
IfxPsi5_RX0A_P00_1_IN
IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN
Definition: IfxPsi5_PinMap.c:45
IfxPsi5_RX0C_P33_1_IN
IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN
Definition: IfxPsi5_PinMap.c:47
IfxPsi5_RX2B_P02_7_IN
IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN
Definition: IfxPsi5_PinMap.c:52
IfxPsi5_RX2A_P00_5_IN
IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN
Definition: IfxPsi5_PinMap.c:51
IfxPsi5_RX1B_P02_5_IN
IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN
Definition: IfxPsi5_PinMap.c:49
IfxPsi5_RX2C_P33_5_IN
IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN
Definition: IfxPsi5_PinMap.c:53

Definition at line 65 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX0_P00_2_OUT

IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt4}

Definition at line 54 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX0_P02_2_OUT

IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt4}

Definition at line 55 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX0_P33_2_OUT

IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt4}

Definition at line 56 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX1_P00_4_OUT

IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt4}

Definition at line 57 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX1_P02_6_OUT

IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt4}

Definition at line 58 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX1_P33_4_OUT

IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt4}

Definition at line 59 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX2_P00_6_OUT

IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt4}

Definition at line 60 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX2_P02_8_OUT

IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt4}

Definition at line 61 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX2_P33_6_OUT

IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt4}

Definition at line 62 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_Tx_Out_pinTable

const IfxPsi5_Tx_Out* IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]
Initial value:
= {
{
{
&IfxPsi5_TX0_P00_2_OUT,
&IfxPsi5_TX0_P02_2_OUT,
&IfxPsi5_TX0_P33_2_OUT
},
{
&IfxPsi5_TX1_P00_4_OUT,
&IfxPsi5_TX1_P02_6_OUT,
&IfxPsi5_TX1_P33_4_OUT
},
{
&IfxPsi5_TX2_P00_6_OUT,
&IfxPsi5_TX2_P02_8_OUT,
&IfxPsi5_TX2_P33_6_OUT
}
}
}
IfxPsi5_TX0_P02_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT
Definition: IfxPsi5_PinMap.c:55
IfxPsi5_TX0_P33_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT
Definition: IfxPsi5_PinMap.c:56
IfxPsi5_TX1_P33_4_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT
Definition: IfxPsi5_PinMap.c:59
IfxPsi5_TX2_P02_8_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT
Definition: IfxPsi5_PinMap.c:61
IfxPsi5_TX1_P00_4_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT
Definition: IfxPsi5_PinMap.c:57
IfxPsi5_TX2_P00_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT
Definition: IfxPsi5_PinMap.c:60
IfxPsi5_TX0_P00_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT
Definition: IfxPsi5_PinMap.c:54
IfxPsi5_TX1_P02_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT
Definition: IfxPsi5_PinMap.c:58
IfxPsi5_TX2_P33_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT
Definition: IfxPsi5_PinMap.c:62

Definition at line 85 of file IfxPsi5_PinMap.c.


iLLD_TC26B: IfxPsi5_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxPsi5_PinMap.h File Reference
iLLD » PSI5

PSI5 I/O map. More...

#include <IfxPsi5_reg.h>
#include <_Impl/IfxPsi5_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxPsi5_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxPsi5_Rx_In
RX pin mapping structure. More...
struct | IfxPsi5_Tx_Out
TX pin mapping structure. More...

Macros

#define | IFXPSI5_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXPSI5_PINMAP_NUM_CHANNELS 3
#define | IFXPSI5_PINMAP_RX_IN_NUM_ITEMS 3
#define | IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN
PSI5_RX0A: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN
PSI5_RX0B: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN
PSI5_RX0C: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN
PSI5_RX1A: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN
PSI5_RX1B: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN
PSI5_RX1C: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN
PSI5_RX2A: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN
PSI5_RX2B: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN
PSI5_RX2C: PSI5 input. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT
PSI5_TX0: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT
PSI5_TX0: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT
PSI5_TX0: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT
PSI5_TX1: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT
PSI5_TX1: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT
PSI5_TX1: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT
PSI5_TX2: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT
PSI5_TX2: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT
PSI5_TX2: PSI5 output. More...
IFX_EXTERN const IfxPsi5_Rx_In * | IfxPsi5_Rx_In_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5_Rx_In table. More...
IFX_EXTERN const IfxPsi5_Tx_Out * | IfxPsi5_Tx_Out_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5_Tx_Out table. More...

Detailed Description

PSI5 I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5_PinMap.h.


iLLD_TC26B: IfxPsi5_Psi5.h File Reference

  • Psi5
  • Psi5
Data Structures | Functions
IfxPsi5_Psi5.h File Reference
iLLD » PSI5

PSI5 PSI5 details. More...

#include "Psi5/Std/IfxPsi5.h"
#include "Scu/Std/IfxScuCcu.h"
#include "IfxPsi5_bf.h"
Include dependency graph for IfxPsi5_Psi5.h:

Go to the source code of this file.

Data Structures

struct | IfxPsi5_Psi5
PSI5 handle data structure. More...
struct | IfxPsi5_Psi5_ChannelTrigger
channel trigger configuration structure More...
struct | IfxPsi5_Psi5_Clock
Clock configuration data structure. More...
struct | IfxPsi5_Psi5_FrameData
Psi5 frame data structure with individual members. More...
struct | IfxPsi5_Psi5_InputOutputControl
Input output configuration structure. More...
struct | IfxPsi5_Psi5_Message
Psi5 serial message with individual members. More...
struct | IfxPsi5_Psi5_PulseGeneration
Sync pulse generation configuration structure. More...
struct | IfxPsi5_Psi5_Rdm
Psi5 frame in double word format. More...
struct | IfxPsi5_Psi5_Rds
Psi5 serial message as unsigned 32 bit value. More...
struct | IfxPsi5_Psi5_ReceiveControl
Receive control configuration structure. More...
struct | IfxPsi5_Psi5_TimeStampConfig
Timestamp configuration data structure. More...
struct | IfxPsi5_Psi5_TransmitControl
Transmit control configuration structure. More...
struct | IfxPsi5_Psi5_PinsConfig
Pin Configuration structure. More...
struct | IfxPsi5_Psi5_Channel
Channel handle data structure. More...
struct | IfxPsi5_Psi5_ChannelConfig
Channel configuration structure. More...
struct | IfxPsi5_Psi5_Config
PSI5 module configuration structure. More...
union | IfxPsi5_Psi5_Frame
Psi5 frame data union. More...
union | IfxPsi5_Psi5_SerialMessage
Psi5 serial message data structure. More...
struct | IfxPsi5_Psi5_StartupOptions
startup related options TBD More...

Functions

IFX_EXTERN void | IfxPsi5_Psi5_deInitModule (IfxPsi5_Psi5 *psi5)
Resets the PSI5 module. More...
IFX_EXTERN void | IfxPsi5_Psi5_enableModule (Ifx_PSI5 *psi5)
Enable PSI5 kernel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_initModule (IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
Initialise the PSI5 with the supplied configureation. More...
IFX_EXTERN void | IfxPsi5_Psi5_initModuleConfig (IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
Initialise buffer with default PSI5 configuration. More...
IFX_EXTERN void | IfxPsi5_Psi5_resetModule (Ifx_PSI5 *psi5)
Reset PSI5 kernel. More...
IFX_INLINE boolean | IfxPsi5_Psi5_startupChannel (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_StartupOptions *options)
start the channel with the selected options More...
IFX_EXTERN boolean | IfxPsi5_Psi5_initChannel (IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxPsi5_Psi5_initChannelConfig (IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
Get the current channel configuration (e.g. sample settings) More...
IFX_EXTERN boolean | IfxPsi5_Psi5_readChannelFrame (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
Gets the received psi5 frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_readChannelSerialMessage (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
Get the received serial message for the channel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_sendChannelData (IfxPsi5_Psi5_Channel *channel, uint64 data)
Transmit the data through the channel. More...
IFX_EXTERN uint32 | IfxPsi5_Psi5_getFracDivClock (Ifx_PSI5 *psi5)
Returns the configured fracDiv psi5 clock frequency in Hz. More...
IFX_EXTERN uint32 | IfxPsi5_Psi5_initializeClock (Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
Configure the fracDiv clock. More...

Detailed Description

PSI5 PSI5 details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5_Psi5.h.

Data Structure Documentation

◆ IfxPsi5_Psi5_PinsConfig

struct IfxPsi5_Psi5_PinsConfig

Pin Configuration structure.

Definition at line 293 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_PinsConfig:
[legend]
Data Fields
IFX_CONST IfxPsi5_Rx_In * | in | The RX Pin which should be configured.
IfxPort_InputMode | inMode | The pin input mode which should be configured.
IFX_CONST IfxPsi5_Tx_Out * | out | The TX Pin which should be configured.
IfxPort_OutputMode | outMode | The pin output mode which should be configured.
IfxPort_PadDriver | pinDriver | The pad driver mode which should be configured.


iLLD_TC26B: IfxPsi5.h File Reference

  • Psi5
  • Std
Enumerations | Functions
IfxPsi5.h File Reference
iLLD » PSI5

PSI5 basic functionality. More...

#include "_Impl/IfxPsi5_cfg.h"
#include "_PinMap/IfxPsi5_PinMap.h"
#include "IfxPsi5_reg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxPsi5.h:

Go to the source code of this file.

Enumerations

enum IfxPsi5_AlternateInput {
IfxPsi5_AlternateInput_0 = 0,
IfxPsi5_AlternateInput_1,
IfxPsi5_AlternateInput_2,
IfxPsi5_AlternateInput_3
}
MODULE_PSI5.IOCRx.ALTI(x = 0,1,2),Alternate input selection. More...
enum IfxPsi5_BaudRate {
IfxPsi5_BaudRate_125 = 0,
IfxPsi5_BaudRate_189 = 1
}
MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection. More...
enum IfxPsi5_CRCorParity {
IfxPsi5_CRCorParity_parity = 0,
IfxPsi5_CRCorParity_crc = 1
}
MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection. More...
enum IfxPsi5_ClockType {
IfxPsi5_ClockType_fracDiv = 0,
IfxPsi5_ClockType_slowClock_125 = 1,
IfxPsi5_ClockType_fastClock_189 = 2,
IfxPsi5_ClockType_timeStamp = 3
}
Clock type. More...
enum IfxPsi5_DigitalInputFilterDepth {
IfxPsi5_DigitalInputFilterDepth_0 = 0,
IfxPsi5_DigitalInputFilterDepth_1,
IfxPsi5_DigitalInputFilterDepth_2,
IfxPsi5_DigitalInputFilterDepth_3,
IfxPsi5_DigitalInputFilterDepth_4,
IfxPsi5_DigitalInputFilterDepth_5,
IfxPsi5_DigitalInputFilterDepth_6,
IfxPsi5_DigitalInputFilterDepth_7,
IfxPsi5_DigitalInputFilterDepth_8,
IfxPsi5_DigitalInputFilterDepth_9,
IfxPsi5_DigitalInputFilterDepth_10,
IfxPsi5_DigitalInputFilterDepth_11,
IfxPsi5_DigitalInputFilterDepth_12,
IfxPsi5_DigitalInputFilterDepth_13,
IfxPsi5_DigitalInputFilterDepth_14,
IfxPsi5_DigitalInputFilterDepth_15
}
MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth. More...
enum IfxPsi5_DividerMode {
IfxPsi5_DividerMode_spb = 0,
IfxPsi5_DividerMode_normal = 1,
IfxPsi5_DividerMode_fractional = 2,
IfxPsi5_DividerMode_off = 3
}
MODULE_PSI5.FDR.DM,Divider mode. More...
enum IfxPsi5_FrameExpectation {
IfxPsi5_FrameExpectation_notExpected = 0,
IfxPsi5_FrameExpectation_expected = 1
}
MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control. More...
enum IfxPsi5_MessagingBits {
IfxPsi5_MessagingBits_absent = 0,
IfxPsi5_MessagingBits_present = 1
}
MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence. More...
enum IfxPsi5_ReceiveDataRegisterTimestamp {
IfxPsi5_ReceiveDataRegisterTimestamp_pulse = 0,
IfxPsi5_ReceiveDataRegisterTimestamp_frame = 1
}
MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers. More...
enum IfxPsi5_Slot {
IfxPsi5_Slot_0 = 0,
IfxPsi5_Slot_1,
IfxPsi5_Slot_2,
IfxPsi5_Slot_3,
IfxPsi5_Slot_4,
IfxPsi5_Slot_5
}
MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id. More...
enum IfxPsi5_SuspendMode {
IfxPsi5_SuspendMode_none = 0,
IfxPsi5_SuspendMode_hard = 1,
IfxPsi5_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxPsi5_TimeBase {
IfxPsi5_TimeBase_internal = 0,
IfxPsi5_TimeBase_external = 1
}
MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base. More...
enum IfxPsi5_TimestampRegister {
IfxPsi5_TimestampRegister_a = 0,
IfxPsi5_TimestampRegister_b = 1,
IfxPsi5_TimestampRegister_c = 2
}
MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type. More...
enum IfxPsi5_Trigger {
IfxPsi5_Trigger_0 = 0,
IfxPsi5_Trigger_1,
IfxPsi5_Trigger_2,
IfxPsi5_Trigger_3,
IfxPsi5_Trigger_4,
IfxPsi5_Trigger_5
}
MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id. More...
enum IfxPsi5_TriggerType {
IfxPsi5_TriggerType_periodic = 0,
IfxPsi5_TriggerType_external = 1,
IfxPsi5_TriggerType_bypass = 2
}
Trigger type. More...
enum IfxPsi5_Verbose {
IfxPsi5_Verbose_off = 0,
IfxPsi5_Verbose_on = 1
}
MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode. More...
enum IfxPsi5_FractionalDividerRegister {
IfxPsi5_FractionalDividerRegister_normal = 0,
IfxPsi5_FractionalDividerRegister_lowbitrate = 1,
IfxPsi5_FractionalDividerRegister_highbitrate = 2,
IfxPsi5_FractionalDividerRegister_timestamp = 3
}
Options for choosing different Fractional Divider Registers. More...
enum IfxPsi5_InterruptServiceRequest {
IfxPsi5_InterruptServiceRequest_0 = 0,
IfxPsi5_InterruptServiceRequest_1 = 1,
IfxPsi5_InterruptServiceRequest_2 = 2,
IfxPsi5_InterruptServiceRequest_3 = 3,
IfxPsi5_InterruptServiceRequest_4 = 4,
IfxPsi5_InterruptServiceRequest_5 = 5,
IfxPsi5_InterruptServiceRequest_6 = 6,
IfxPsi5_InterruptServiceRequest_7 = 7
}
enum IfxPsi5_InterruptStatusRegister {
IfxPsi5_InterruptStatusRegister_a = 0,
IfxPsi5_InterruptStatusRegister_b = 1
}
enum IfxPsi5_ReceiverControlRegister {
IfxPsi5_ReceiverControlRegister_a = 0,
IfxPsi5_ReceiverControlRegister_b = 1,
IfxPsi5_ReceiverControlRegister_c = 2
}
Optiond for different Receive Control Registers(RCRA,RCRB,RCRC) More...

Functions

IFX_INLINE uint32 | IfxPsi5_getStatusCrci (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the CRCI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusMei (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the MEI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusNbi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NBI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusNfi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NFI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRdi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RDI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRmi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RMI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRsi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RSI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusTei (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the TEI status register contents for a channel More...
IFX_EXTERN void | IfxPsi5_resetModule (Ifx_PSI5 *psi5)
resets PSI5 kernel More...
IFX_INLINE void | IfxPsi5_initRxPin (const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxPsi5_initTxPin (const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE void | IfxPsi5_setRxInput (Ifx_PSI5_CH *psi5Ch, IfxPsi5_AlternateInput alternateInput)
Sets the alternate RX input. More...
IFX_INLINE boolean | IfxPsi5_isModuleSuspended (Ifx_PSI5 *psi5)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxPsi5_setSuspendMode (Ifx_PSI5 *psi5, IfxPsi5_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxPsi5_disableModule (Ifx_PSI5 *psi5)
Disable PSI5 kernel. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxPsi5_getSrcPointer (Ifx_PSI5 *psi5, IfxPsi5_InterruptServiceRequest intRequest)
Gives the pointer to the SRC register for respective PSI5 interrupt source. More...
IFX_INLINE void | IfxPsi5_enableAllChannels (Ifx_PSI5 *psi5)
Enabling all channels and error flags. More...
IFX_INLINE void | IfxPsi5_setFractionalDivider (Ifx_PSI5 *psi5, IfxPsi5_FractionalDividerRegister fcd, uint32 value)
IFX_EXTERN void | IfxPsi5_enableModule (Ifx_PSI5 *psi5)

Detailed Description

PSI5 basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5.h.

Enumeration Type Documentation

◆ IfxPsi5_FractionalDividerRegister

enum IfxPsi5_FractionalDividerRegister

Options for choosing different Fractional Divider Registers.

Enumerator
IfxPsi5_FractionalDividerRegister_normal | The Fractional Divider Register controls the input clock f_fracdiv.
IfxPsi5_FractionalDividerRegister_lowbitrate | The Fractional Divider Register for lower Bit Rate contains the pre-divider that defines the time resolution of the f_125.It divides f_fracdiv by a factor and provides f_125 to all channels.
IfxPsi5_FractionalDividerRegister_highbitrate | The Fractional Divider Register for Higher Bit Rate contains the pre-divider that defines the time resolution of f_189. It divides f_fracdiv by a factor and provides f_189 to all channels.
IfxPsi5_FractionalDividerRegister_timestamp | The PSI5 Module Time Stamp Predivider Register contains the pre-divider that defines the time resolution of the Time Stamp Registers TSRA/B/C and the Sync Pulse Time Base Counter SBC. It divides fPSI5 by a factor. It contains as well the bits for reset control of the time stamp counters.

Definition at line 238 of file IfxPsi5.h.

◆ IfxPsi5_InterruptServiceRequest

enum IfxPsi5_InterruptServiceRequest
Enumerator
IfxPsi5_InterruptServiceRequest_0
IfxPsi5_InterruptServiceRequest_1
IfxPsi5_InterruptServiceRequest_2
IfxPsi5_InterruptServiceRequest_3
IfxPsi5_InterruptServiceRequest_4
IfxPsi5_InterruptServiceRequest_5
IfxPsi5_InterruptServiceRequest_6
IfxPsi5_InterruptServiceRequest_7

Definition at line 249 of file IfxPsi5.h.

◆ IfxPsi5_InterruptStatusRegister

enum IfxPsi5_InterruptStatusRegister
Enumerator
IfxPsi5_InterruptStatusRegister_a
IfxPsi5_InterruptStatusRegister_b

Definition at line 261 of file IfxPsi5.h.

◆ IfxPsi5_ReceiverControlRegister

enum IfxPsi5_ReceiverControlRegister

Optiond for different Receive Control Registers(RCRA,RCRB,RCRC)

Enumerator
IfxPsi5_ReceiverControlRegister_a | Receiver Control Register A configures the payload length of the up to 6 frames in the up to 6 slots.
IfxPsi5_ReceiverControlRegister_b | Receiver Control Register B configures up to 6 frame types in the up to 6 slots.
IfxPsi5_ReceiverControlRegister_c | Receiver Control Register C configures bit rate and time stamp sources.

Definition at line 269 of file IfxPsi5.h.

Function Documentation

◆ IfxPsi5_enableAllChannels()

IFX_INLINE void IfxPsi5_enableAllChannels ( Ifx_PSI5 * psi5 )

Enabling all channels and error flags.

Parameters
psi5 Pointer to PSI5 SFR base register
Returns
None

Definition at line 566 of file IfxPsi5.h.

◆ IfxPsi5_enableModule()

IFX_EXTERN void IfxPsi5_enableModule ( Ifx_PSI5 * psi5 )
Returns
None

Definition at line 81 of file IfxPsi5.c.

◆ IfxPsi5_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxPsi5_getSrcPointer | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_InterruptServiceRequest | intRequest
 | ) |  |

Gives the pointer to the SRC register for respective PSI5 interrupt source.

Parameters
psi5 | Pointer to PSI5 SFR base register
intRequest | Interrupt Source
Returns
Address of the required SRC register

Definition at line 559 of file IfxPsi5.h.

◆ IfxPsi5_setFractionalDivider()

IFX_INLINE void IfxPsi5_setFractionalDivider | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_FractionalDividerRegister | fcd,
 |  | uint32 | value
 | ) |  |
Parameters
psi5 | Pointer to PSI5 SFR base register
fcd | Select the appropriate divider register(see IfxPsi5_FractionalDividerRegister enum) for required functionality.
value | Contains value including divider values for different divider registers(FDR,FDRL,FDRH,FDRT)
Returns
None

Definition at line 575 of file IfxPsi5.h.


iLLD_TC26B: PSI5S

Modules | Files
PSI5S
iLLD
Collaboration diagram for PSI5S:

Modules

Implementation
Standard Driver
PSI5S Pin Mapping
How to use the PSI5S PSI5S Interface driver?
PSI5S

Files

file | IfxPsi5s_cfg.h
PSI5S on-chip implementation data.
file | IfxPsi5s_PinMap.c
PSI5S I/O map.
file | IfxPsi5s_PinMap.h
PSI5S I/O map.
file | IfxPsi5s_Psi5s.h
PSI5S PSI5S details.
file | IfxPsi5s.h
PSI5S basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » PSI5S
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » PSI5S
Collaboration diagram for Standard Driver:

Modules

Enumerations
Channel Operative Functions
IO Pin Configuration Functions
Interrupt configuration functions
Module Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » PSI5S » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxPsi5s_AlternateInput {
IfxPsi5s_AlternateInput_0 = 0,
IfxPsi5s_AlternateInput_1,
IfxPsi5s_AlternateInput_2,
IfxPsi5s_AlternateInput_3
}
MODULE_PSI5S.IOCR.ALTI:Alternate input. More...
enum IfxPsi5s_AscBaudratePrescalar {
IfxPsi5s_AscBaudratePrescalar_divideBy2 = 0,
IfxPsi5s_AscBaudratePrescalar_divideBy3 = 1
}
MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select. More...
enum IfxPsi5s_AscMode {
IfxPsi5s_AscMode_sync = 0,
IfxPsi5s_AscMode_async_8bitData = 1,
IfxPsi5s_AscMode_async_7bitDataWithParity = 3,
IfxPsi5s_AscMode_async_9bitData = 4,
IfxPsi5s_AscMode_async_8bitDataWithWakeup = 5,
IfxPsi5s_AscMode_async_8bitDataWithParity = 7
}
MODULE_PSI5S.CON.M:ASC mode of operation. More...
enum IfxPsi5s_AscStopBits {
IfxPsi5s_AscStopBits_1 = 0,
IfxPsi5s_AscStopBits_2
}
MODULE_PSI5S.CON.STP: Number of stop bits. More...
enum IfxPsi5s_ChannelId {
IfxPsi5s_ChannelId_0 = 0,
IfxPsi5s_ChannelId_1,
IfxPsi5s_ChannelId_2,
IfxPsi5s_ChannelId_3,
IfxPsi5s_ChannelId_4,
IfxPsi5s_ChannelId_5,
IfxPsi5s_ChannelId_6,
IfxPsi5s_ChannelId_7,
IfxPsi5s_ChannelId_none = -1
}
PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID. More...
enum IfxPsi5s_ClockType {
IfxPsi5s_ClockType_fracDiv = 0,
IfxPsi5s_ClockType_timeStamp = 1,
IfxPsi5s_ClockType_ascFracDiv = 2,
IfxPsi5s_ClockType_ascOutput = 3
}
Clock Selection. More...
enum IfxPsi5s_CrcOrParity {
IfxPsi5s_CrcOrParity_parity = 0,
IfxPsi5s_CrcOrParity_crc = 1
}
MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity. More...
enum IfxPsi5s_DividerMode {
IfxPsi5s_DividerMode_spb = 0,
IfxPsi5s_DividerMode_normal = 1,
IfxPsi5s_DividerMode_fractional = 2,
IfxPsi5s_DividerMode_off = 3
}
MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode. More...
enum IfxPsi5s_EnhancedProtocol {
IfxPsi5s_EnhancedProtocol_toothGapMethod = 0,
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 = 1,
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 = 3
}
MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types. More...
enum IfxPsi5s_FrameId {
IfxPsi5s_FrameId_frameHeader = 0,
IfxPsi5s_FrameId_rollingNumber = 1
}
MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation. More...
enum IfxPsi5s_IdleTime {
IfxPsi5s_IdleTime_1 = 0,
IfxPsi5s_IdleTime_2,
IfxPsi5s_IdleTime_3,
IfxPsi5s_IdleTime_4,
IfxPsi5s_IdleTime_5,
IfxPsi5s_IdleTime_6,
IfxPsi5s_IdleTime_7,
IfxPsi5s_IdleTime_8,
IfxPsi5s_IdleTime_9,
IfxPsi5s_IdleTime_10,
IfxPsi5s_IdleTime_11,
IfxPsi5s_IdleTime_12,
IfxPsi5s_IdleTime_13,
IfxPsi5s_IdleTime_14,
IfxPsi5s_IdleTime_15,
IfxPsi5s_IdleTime_16
}
MODULE_PSI5S.GCR.IDT:Idle time bit count. More...
enum IfxPsi5s_LoopBackMode {
IfxPsi5s_LoopBackMode_disable = 0,
IfxPsi5s_LoopBackMode_enable = 1
}
Enable/Disable Loop back Mode. More...
enum IfxPsi5s_MessagingBits {
IfxPsi5s_MessagingBits_absent = 0,
IfxPsi5s_MessagingBits_present = 1
}
Messaging bits presence. More...
enum IfxPsi5s_NumberExpectedFrames {
IfxPsi5s_NumberExpectedFrames_1 = 1,
IfxPsi5s_NumberExpectedFrames_2,
IfxPsi5s_NumberExpectedFrames_3,
IfxPsi5s_NumberExpectedFrames_4,
IfxPsi5s_NumberExpectedFrames_5,
IfxPsi5s_NumberExpectedFrames_6
}
MODULE_PSI5S.NFC.NFx:Expected Psi5s frames. More...
enum IfxPsi5s_SleepMode {
IfxPsi5s_SleepMode_enable = 0,
IfxPsi5s_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_PSI5S.CLC.B.EDIS. More...
enum IfxPsi5s_SuspendMode {
IfxPsi5s_SuspendMode_none = 0,
IfxPsi5s_SuspendMode_hard = 1,
IfxPsi5s_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxPsi5s_TimeBase {
IfxPsi5s_TimeBase_internal = 0,
IfxPsi5s_TimeBase_external = 1
}
MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base. More...
enum IfxPsi5s_TimestampRegister {
IfxPsi5s_TimestampRegister_a = 0,
IfxPsi5s_TimestampRegister_b = 1
}
MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register. More...
enum IfxPsi5s_TimestampTrigger {
IfxPsi5s_TimestampTrigger_syncPulse = 0,
IfxPsi5s_TimestampTrigger_frame = 1
}
MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger. More...
enum IfxPsi5s_Trigger {
IfxPsi5s_Trigger_0 = 0,
IfxPsi5s_Trigger_1,
IfxPsi5s_Trigger_2,
IfxPsi5s_Trigger_3,
IfxPsi5s_Trigger_4,
IfxPsi5s_Trigger_5,
IfxPsi5s_Trigger_6,
IfxPsi5s_Trigger_7
}
MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id. More...
enum IfxPsi5s_TriggerType {
IfxPsi5s_TriggerType_periodic = 0,
IfxPsi5s_TriggerType_external = 1
}
Trigger type defined in. More...
enum IfxPsi5s_UartFrameCount {
IfxPsi5s_UartFrameCount_3 = 0,
IfxPsi5s_UartFrameCount_4,
IfxPsi5s_UartFrameCount_5,
IfxPsi5s_UartFrameCount_6
}
MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count. More...
enum IfxPsi5s_WatchdogTimerMode {
IfxPsi5s_WatchdogTimerMode_frame = 0,
IfxPsi5s_WatchdogTimerMode_syncPulse = 1
}
MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode. More...

Detailed Description

Enumeration Type Documentation

◆ IfxPsi5s_AlternateInput

enum IfxPsi5s_AlternateInput

MODULE_PSI5S.IOCR.ALTI:Alternate input.

Enumerator
IfxPsi5s_AlternateInput_0 | Alternate Input 0.
IfxPsi5s_AlternateInput_1 | Alternate Input 1.
IfxPsi5s_AlternateInput_2 | Alternate Input 2.
IfxPsi5s_AlternateInput_3 | Alternate Input 3.

Definition at line 78 of file IfxPsi5s.h.

◆ IfxPsi5s_AscBaudratePrescalar

enum IfxPsi5s_AscBaudratePrescalar

MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select.

Enumerator
IfxPsi5s_AscBaudratePrescalar_divideBy2 | Divide by 2 is selected for baudrate timer prescalar.
IfxPsi5s_AscBaudratePrescalar_divideBy3 | Divide by 3 is selected for baudrate timer prescalar.

Definition at line 88 of file IfxPsi5s.h.

◆ IfxPsi5s_AscMode

enum IfxPsi5s_AscMode

MODULE_PSI5S.CON.M:ASC mode of operation.

Enumerator
IfxPsi5s_AscMode_sync | Synchronous mode.
IfxPsi5s_AscMode_async_8bitData | Asynchronous mode with 8 bit data.
IfxPsi5s_AscMode_async_7bitDataWithParity | Asynchronous mode with 7 bit data with parity.
IfxPsi5s_AscMode_async_9bitData | Asynchronous mode with 9 bit data.
IfxPsi5s_AscMode_async_8bitDataWithWakeup | Asynchronous mode with 8 bit data with wakeup.
IfxPsi5s_AscMode_async_8bitDataWithParity | Asynchronous mode with 8 bit data with parity.

Definition at line 96 of file IfxPsi5s.h.

◆ IfxPsi5s_AscStopBits

enum IfxPsi5s_AscStopBits

MODULE_PSI5S.CON.STP: Number of stop bits.

Enumerator
IfxPsi5s_AscStopBits_1 | 1 stop bit
IfxPsi5s_AscStopBits_2 | 2 stop bit

Definition at line 108 of file IfxPsi5s.h.

◆ IfxPsi5s_ChannelId

enum IfxPsi5s_ChannelId

PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID.

Enumerator
IfxPsi5s_ChannelId_0 | Ifx_PSI5S Channel 0.
IfxPsi5s_ChannelId_1 | Ifx_PSI5S Channel 1.
IfxPsi5s_ChannelId_2 | Ifx_PSI5S Channel 2.
IfxPsi5s_ChannelId_3 | Ifx_PSI5S Channel 3.
IfxPsi5s_ChannelId_4 | Ifx_PSI5S Channel 4.
IfxPsi5s_ChannelId_5 | Ifx_PSI5S Channel 5.
IfxPsi5s_ChannelId_6 | Ifx_PSI5S Channel 6.
IfxPsi5s_ChannelId_7 | Ifx_PSI5S Channel 7.
IfxPsi5s_ChannelId_none | None of the Ifx_PSI5S Channels.

Definition at line 116 of file IfxPsi5s.h.

◆ IfxPsi5s_ClockType

enum IfxPsi5s_ClockType

Clock Selection.

Enumerator
IfxPsi5s_ClockType_fracDiv | Fractional Divide clock.
IfxPsi5s_ClockType_timeStamp | Timestamp clock.
IfxPsi5s_ClockType_ascFracDiv | Asc Fractional divider clock.
IfxPsi5s_ClockType_ascOutput | Asc output clock.

Definition at line 131 of file IfxPsi5s.h.

◆ IfxPsi5s_CrcOrParity

enum IfxPsi5s_CrcOrParity

MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity.

Enumerator
IfxPsi5s_CrcOrParity_parity | parity selection
IfxPsi5s_CrcOrParity_crc | CRC selection.

Definition at line 141 of file IfxPsi5s.h.

◆ IfxPsi5s_DividerMode

enum IfxPsi5s_DividerMode

MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode.

Enumerator
IfxPsi5s_DividerMode_spb | divider mode is off
IfxPsi5s_DividerMode_normal | divider mode is normal
IfxPsi5s_DividerMode_fractional | divider mode is fractional
IfxPsi5s_DividerMode_off | divider mode is off

Definition at line 149 of file IfxPsi5s.h.

◆ IfxPsi5s_EnhancedProtocol

enum IfxPsi5s_EnhancedProtocol

MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types.

Enumerator
IfxPsi5s_EnhancedProtocol_toothGapMethod | toothGapMethod Enhanced protocol type
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 | pulseWidth_frameFormat_1to3 Enhanced protocol type
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 | pulseWidth_frameFormat_4 Enhanced protocol type

Definition at line 159 of file IfxPsi5s.h.

◆ IfxPsi5s_FrameId

enum IfxPsi5s_FrameId

MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation.

Enumerator
IfxPsi5s_FrameId_frameHeader | Frame ID is updated from packet frame header (Sync mode)
IfxPsi5s_FrameId_rollingNumber | Frame ID is a rolling number 0 .. 5 copied from FCNT.

Definition at line 168 of file IfxPsi5s.h.

◆ IfxPsi5s_IdleTime

enum IfxPsi5s_IdleTime

MODULE_PSI5S.GCR.IDT:Idle time bit count.

Enumerator
IfxPsi5s_IdleTime_1 | 1 bit Idle time
IfxPsi5s_IdleTime_2 | 2 bit Idle time
IfxPsi5s_IdleTime_3 | 3 bit Idle time
IfxPsi5s_IdleTime_4 | 4 bit Idle time
IfxPsi5s_IdleTime_5 | 5 bit Idle time
IfxPsi5s_IdleTime_6 | 6 bit Idle time
IfxPsi5s_IdleTime_7 | 7 bit Idle time
IfxPsi5s_IdleTime_8 | 8 bit Idle time
IfxPsi5s_IdleTime_9 | 9 bit Idle time
IfxPsi5s_IdleTime_10 | 10 bit Idle time
IfxPsi5s_IdleTime_11 | 11 bit Idle time
IfxPsi5s_IdleTime_12 | 12 bit Idle time
IfxPsi5s_IdleTime_13 | 13 bit Idle time
IfxPsi5s_IdleTime_14 | 14 bit Idle time
IfxPsi5s_IdleTime_15 | 15 bit Idle time
IfxPsi5s_IdleTime_16 | 16 bit Idle time

Definition at line 176 of file IfxPsi5s.h.

◆ IfxPsi5s_LoopBackMode

enum IfxPsi5s_LoopBackMode

Enable/Disable Loop back Mode.

Enumerator
IfxPsi5s_LoopBackMode_disable | loop-back mode disabled
IfxPsi5s_LoopBackMode_enable | loop-back mode enabled

Definition at line 198 of file IfxPsi5s.h.

◆ IfxPsi5s_MessagingBits

enum IfxPsi5s_MessagingBits

Messaging bits presence.

Enumerator
IfxPsi5s_MessagingBits_absent | No messaging bits.
IfxPsi5s_MessagingBits_present | 2 messaging bits

Definition at line 206 of file IfxPsi5s.h.

◆ IfxPsi5s_NumberExpectedFrames

enum IfxPsi5s_NumberExpectedFrames

MODULE_PSI5S.NFC.NFx:Expected Psi5s frames.

Enumerator
IfxPsi5s_NumberExpectedFrames_1 | 1 psi5s frame expected
IfxPsi5s_NumberExpectedFrames_2 | 2 psi5s frame expected
IfxPsi5s_NumberExpectedFrames_3 | 3 psi5s frame expected
IfxPsi5s_NumberExpectedFrames_4 | 4 psi5s frame expected
IfxPsi5s_NumberExpectedFrames_5 | 5 psi5s frame expected
IfxPsi5s_NumberExpectedFrames_6 | 6 psi5s frame expected

Definition at line 214 of file IfxPsi5s.h.

◆ IfxPsi5s_SleepMode

enum IfxPsi5s_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_PSI5S.CLC.B.EDIS.

Enumerator
IfxPsi5s_SleepMode_enable | enables sleep mode
IfxPsi5s_SleepMode_disable | disables sleep mode

Definition at line 227 of file IfxPsi5s.h.

◆ IfxPsi5s_SuspendMode

enum IfxPsi5s_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxPsi5s_SuspendMode_none | No suspend.
IfxPsi5s_SuspendMode_hard | Hard Suspend.
IfxPsi5s_SuspendMode_soft | Soft Suspend.

Definition at line 235 of file IfxPsi5s.h.

◆ IfxPsi5s_TimeBase

enum IfxPsi5s_TimeBase

MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base.

Enumerator
IfxPsi5s_TimeBase_internal | Internal time stamp clock.
IfxPsi5s_TimeBase_external | External GTM inputs.

Definition at line 244 of file IfxPsi5s.h.

◆ IfxPsi5s_TimestampRegister

enum IfxPsi5s_TimestampRegister

MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register.

Enumerator
IfxPsi5s_TimestampRegister_a | Timestamp register A.
IfxPsi5s_TimestampRegister_b | Timestamp register B.

Definition at line 252 of file IfxPsi5s.h.

◆ IfxPsi5s_TimestampTrigger

enum IfxPsi5s_TimestampTrigger

MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger.

Enumerator
IfxPsi5s_TimestampTrigger_syncPulse | Timestamp trigger on sync pulse.
IfxPsi5s_TimestampTrigger_frame | Timestamp trigger on any frame.

Definition at line 260 of file IfxPsi5s.h.

◆ IfxPsi5s_Trigger

enum IfxPsi5s_Trigger

MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id.

Enumerator
IfxPsi5s_Trigger_0 | Trigger 0.
IfxPsi5s_Trigger_1 | Trigger 1.
IfxPsi5s_Trigger_2 | Trigger 2.
IfxPsi5s_Trigger_3 | Trigger 3.
IfxPsi5s_Trigger_4 | Trigger 4.
IfxPsi5s_Trigger_5 | Trigger 5.
IfxPsi5s_Trigger_6 | Trigger 6.
IfxPsi5s_Trigger_7 | Trigger 7.

Definition at line 268 of file IfxPsi5s.h.

◆ IfxPsi5s_TriggerType

enum IfxPsi5s_TriggerType

Trigger type defined in.

Enumerator
IfxPsi5s_TriggerType_periodic | Periodic trigger.
IfxPsi5s_TriggerType_external | External trigger.

Definition at line 282 of file IfxPsi5s.h.

◆ IfxPsi5s_UartFrameCount

enum IfxPsi5s_UartFrameCount

MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count.

Enumerator
IfxPsi5s_UartFrameCount_3 | 3 UART frames
IfxPsi5s_UartFrameCount_4 | 4 UART frames
IfxPsi5s_UartFrameCount_5 | 5 UART frames
IfxPsi5s_UartFrameCount_6 | 6 UART frames

Definition at line 290 of file IfxPsi5s.h.

◆ IfxPsi5s_WatchdogTimerMode

enum IfxPsi5s_WatchdogTimerMode

MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode.

Enumerator
IfxPsi5s_WatchdogTimerMode_frame | Watch Dog Timer is restarted on reception of each recoverable frame (async mode)
IfxPsi5s_WatchdogTimerMode_syncPulse | Watch Dog Timer is restarted on Sync Pulse and stopped at reception of the last frame configured in NFC.NFx.(sync mode)

Definition at line 300 of file IfxPsi5s.h.


iLLD_TC26B: Channel Operative Functions

Functions
Channel Operative Functions
iLLD » PSI5S » Standard Driver
Collaboration diagram for Channel Operative Functions:

Functions

IFX_EXTERN void | IfxPsi5s_disableAscReceiver (Ifx_PSI5S *psi5s)
Asc receiver is disabled. More...
IFX_EXTERN void | IfxPsi5s_enableAscReceiver (Ifx_PSI5S *psi5s)
Enable ASC receiver. More...
IFX_EXTERN void | IfxPsi5s_enableDisableChannelTriggerCounters (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter. More...
IFX_EXTERN void | IfxPsi5s_enableDisableChannels (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter. More...
IFX_EXTERN void | IfxPsi5s_startAscTransactions (Ifx_PSI5S *psi5s)
Start ASC transactions. More...
IFX_EXTERN void | IfxPsi5s_stopAscTransactions (Ifx_PSI5S *psi5s)

Detailed Description

Function Documentation

◆ IfxPsi5s_disableAscReceiver()

IFX_EXTERN void IfxPsi5s_disableAscReceiver ( Ifx_PSI5S * psi5s )

Asc receiver is disabled.

Parameters
psi5s Pointer to PSI5S module registers
Returns
None

Definition at line 54 of file IfxPsi5s.c.

◆ IfxPsi5s_enableAscReceiver()

IFX_EXTERN void IfxPsi5s_enableAscReceiver ( Ifx_PSI5S * psi5s )

Enable ASC receiver.

Parameters
psi5s pointer to the PSI5S register space
Returns
None

Definition at line 69 of file IfxPsi5s.c.

Referenced by IfxPsi5s_Psi5s_enableAscReceiver().

◆ IfxPsi5s_enableDisableChannels()

IFX_EXTERN void IfxPsi5s_enableDisableChannels | ( | Ifx_PSI5S * | psi5s,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

Enable/disable any combination of channels selected by mask parameter.

Parameters
psi5s | pointer to the PSI5S register space
channels | specifies the channels which should be enabled/disabled
mask | specifies the channels which should be modified
Returns
None

Definition at line 83 of file IfxPsi5s.c.

Referenced by IfxPsi5s_Psi5s_enableDisableChannels().

◆ IfxPsi5s_enableDisableChannelTriggerCounters()

IFX_EXTERN void IfxPsi5s_enableDisableChannelTriggerCounters | ( | Ifx_PSI5S * | psi5s,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

Enable/disable any combination of channel trigger counters selected by mask parameter.

Parameters
psi5s | pointer to the PSI5S register space
channels | specifies the channel trigger counters which should be enabled/disabled
mask | specifies the channel trigger counters which should be modified
Returns
None

Definition at line 75 of file IfxPsi5s.c.

Referenced by IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters().

◆ IfxPsi5s_startAscTransactions()

IFX_EXTERN void IfxPsi5s_startAscTransactions ( Ifx_PSI5S * psi5s )

Start ASC transactions.

Parameters
psi5s pointer to the PSI5S register space
Returns
None

Definition at line 122 of file IfxPsi5s.c.

Referenced by IfxPsi5s_Psi5s_startAscTransactions().

◆ IfxPsi5s_stopAscTransactions()

IFX_EXTERN void IfxPsi5s_stopAscTransactions ( Ifx_PSI5S * psi5s )
Parameters
psi5s Pointer to PSI5S module registers
Returns
None

Definition at line 128 of file IfxPsi5s.c.


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » PSI5S » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxPsi5s_initClkPin (const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a CLK output. More...
IFX_INLINE void | IfxPsi5s_initRxPin (const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxPsi5s_initTxPin (const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE void | IfxPsi5s_setRxInput (Ifx_PSI5S *psi5s, IfxPsi5s_AlternateInput alti)
Selects the alternate input for Rx signal. More...

Detailed Description

Function Documentation

◆ IfxPsi5s_initClkPin()

IFX_INLINE void IfxPsi5s_initClkPin | ( | const IfxPsi5s_Clk_Out * | clk,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a CLK output.

Parameters
clk | the CLK Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 462 of file IfxPsi5s.h.

Referenced by IfxPsi5s_Psi5s_initModule().

◆ IfxPsi5s_initRxPin()

IFX_INLINE void IfxPsi5s_initRxPin | ( | const IfxPsi5s_Rx_In * | rx,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a RX input.

Parameters
rx | the RX Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 472 of file IfxPsi5s.h.

Referenced by IfxPsi5s_Psi5s_initModule().

◆ IfxPsi5s_initTxPin()

IFX_INLINE void IfxPsi5s_initTxPin | ( | const IfxPsi5s_Tx_Out * | tx,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a TX output.

Parameters
tx | the TX Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 483 of file IfxPsi5s.h.

Referenced by IfxPsi5s_Psi5s_initModule().

◆ IfxPsi5s_setRxInput()

IFX_INLINE void IfxPsi5s_setRxInput | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_AlternateInput | alti
 | ) |  |

Selects the alternate input for Rx signal.

Parameters
psi5s | pointer to PSI5S registers
alti | alternate input selection of Rx signal
Returns
None

Definition at line 505 of file IfxPsi5s.h.

Referenced by IfxPsi5s_initRxPin().


iLLD_TC26B: Interrupt configuration functions

Interrupt configuration functions
iLLD » PSI5S » Standard Driver
Collaboration diagram for Interrupt configuration functions:


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » PSI5S » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE boolean | IfxPsi5s_isModuleSuspended (Ifx_PSI5S *psi5s)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxPsi5s_setSleepMode (Ifx_PSI5S *psi5s, IfxPsi5s_SleepMode mode)
enable / disable sleep mode More...
IFX_INLINE void | IfxPsi5s_setSuspendMode (Ifx_PSI5S *psi5s, IfxPsi5s_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxPsi5s_disableModule (Ifx_PSI5S *psi5s)
Disable PSI5S kernel. More...
IFX_EXTERN boolean | IfxPsi5s_getReadFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5s_getSuccessfullyReceivedFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Indicates the successful reception of a frame. More...
IFX_EXTERN void | IfxPsi5s_resetModule (Ifx_PSI5S *psi5s)
resets PSI5S kernel More...

Detailed Description

Function Documentation

◆ IfxPsi5s_disableModule()

IFX_EXTERN void IfxPsi5s_disableModule ( Ifx_PSI5S * psi5s )

Disable PSI5S kernel.

Parameters
psi5s pointer to the base of PSI5S register space
Returns
None

Definition at line 60 of file IfxPsi5s.c.

◆ IfxPsi5s_getReadFrameStatus()

IFX_EXTERN boolean IfxPsi5s_getReadFrameStatus | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_ChannelId | channelId
 | ) |  |

Get the received psi5s frame for the channel.

Parameters
psi5s | Pointer to PSI5S Module
channelId | channel ID
Returns
Frame Status

Definition at line 91 of file IfxPsi5s.c.

Referenced by IfxPsi5s_Psi5s_getReadFrameStatus().

◆ IfxPsi5s_getSuccessfullyReceivedFrameStatus()

IFX_EXTERN boolean IfxPsi5s_getSuccessfullyReceivedFrameStatus | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_ChannelId | channelId
 | ) |  |

Indicates the successful reception of a frame.

Parameters
psi5s | Pointer to PSI5S module registers
channelId | Channel Number

Definition at line 97 of file IfxPsi5s.c.

◆ IfxPsi5s_isModuleSuspended()

IFX_INLINE boolean IfxPsi5s_isModuleSuspended ( Ifx_PSI5S * psi5s )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
psi5s Pointer to PSI5S module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 493 of file IfxPsi5s.h.

◆ IfxPsi5s_resetModule()

IFX_EXTERN void IfxPsi5s_resetModule ( Ifx_PSI5S * psi5s )

resets PSI5S kernel

Parameters
psi5s pointer to PSI5S registers
Returns
None

Definition at line 103 of file IfxPsi5s.c.

◆ IfxPsi5s_setSleepMode()

IFX_INLINE void IfxPsi5s_setSleepMode | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_SleepMode | mode
 | ) |  |

enable / disable sleep mode

Parameters
psi5s | Pointer to PSI5S register
mode | sleep mode (enable/disable)
Returns
None

Definition at line 511 of file IfxPsi5s.h.

◆ IfxPsi5s_setSuspendMode()

IFX_INLINE void IfxPsi5s_setSuspendMode | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
psi5s | Pointer to PSI5S module registers
mode | Module suspend mode
Returns
None

Definition at line 520 of file IfxPsi5s.h.


iLLD_TC26B: PSI5S Pin Mapping

Data Structures | Macros | Variables
PSI5S Pin Mapping
iLLD » PSI5S
Collaboration diagram for PSI5S Pin Mapping:

Data Structures

struct | IfxPsi5s_Rx_In
RX pin mapping structure. More...
struct | IfxPsi5s_Tx_Out
TX pin mapping structure. More...
struct | IfxPsi5s_Clk_Out
CLK pin mapping structure. More...

Macros

#define | IFXPSI5S_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS 2
#define | IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS 3
#define | IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT
PSI5S_CLK: PSI5-S output. More...
IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT
PSI5S_CLK: PSI5-S output. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN
PSI5S_RXA: PSI5-S input. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN
PSI5S_RXB: PSI5-S input. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN
PSI5S_RXC: PSI5-S input. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT
PSI5S_TX: PSI5-S output. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT
PSI5S_TX: PSI5-S output. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT
PSI5S_TX: PSI5-S output. More...
IFX_EXTERN const IfxPsi5s_Clk_Out * | IfxPsi5s_Clk_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
IfxPsi5s_Clk_Out table. More...
IFX_EXTERN const IfxPsi5s_Rx_In * | IfxPsi5s_Rx_In_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5s_Rx_In table. More...
IFX_EXTERN const IfxPsi5s_Tx_Out * | IfxPsi5s_Tx_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5s_Tx_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxPsi5s_Rx_In

struct IfxPsi5s_Rx_In

RX pin mapping structure.

Definition at line 56 of file IfxPsi5s_PinMap.h.

Collaboration diagram for IfxPsi5s_Rx_In:
[legend]
Data Fields
Ifx_PSI5S * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxPsi5s_Tx_Out

struct IfxPsi5s_Tx_Out

TX pin mapping structure.

Definition at line 64 of file IfxPsi5s_PinMap.h.

Collaboration diagram for IfxPsi5s_Tx_Out:
[legend]
Data Fields
Ifx_PSI5S * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxPsi5s_Clk_Out

struct IfxPsi5s_Clk_Out

CLK pin mapping structure.

Definition at line 72 of file IfxPsi5s_PinMap.h.

Collaboration diagram for IfxPsi5s_Clk_Out:
[legend]
Data Fields
Ifx_PSI5S * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS

#define IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS 2

Definition at line 90 of file IfxPsi5s_PinMap.h.

◆ IFXPSI5S_PINMAP_NUM_MODULES

#define IFXPSI5S_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 89 of file IfxPsi5s_PinMap.h.

◆ IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS

#define IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS 3

Definition at line 91 of file IfxPsi5s_PinMap.h.

◆ IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS

#define IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS 3

Definition at line 92 of file IfxPsi5s_PinMap.h.

Variable Documentation

◆ IfxPsi5s_Clk_Out_pinTable

IFX_EXTERN const IfxPsi5s_Clk_Out* IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]

IfxPsi5s_Clk_Out table.

Definition at line 96 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_CLK_P02_4_OUT

IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT

PSI5S_CLK: PSI5-S output.

Definition at line 79 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_CLK_P33_10_OUT

IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT

PSI5S_CLK: PSI5-S output.

Definition at line 80 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_Rx_In_pinTable

IFX_EXTERN const IfxPsi5s_Rx_In* IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]

IfxPsi5s_Rx_In table.

Definition at line 99 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_RXA_P00_3_IN

IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN

PSI5S_RXA: PSI5-S input.

Definition at line 81 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_RXB_P02_5_IN

IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN

PSI5S_RXB: PSI5-S input.

Definition at line 82 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_RXC_P33_5_IN

IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN

PSI5S_RXC: PSI5-S input.

Definition at line 83 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_Tx_Out_pinTable

IFX_EXTERN const IfxPsi5s_Tx_Out* IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]

IfxPsi5s_Tx_Out table.

Definition at line 102 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_TX_P00_4_OUT

IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT

PSI5S_TX: PSI5-S output.

Definition at line 84 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_TX_P02_6_OUT

IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT

PSI5S_TX: PSI5-S output.

Definition at line 85 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_TX_P33_6_OUT

IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT

PSI5S_TX: PSI5-S output.

Definition at line 86 of file IfxPsi5s_PinMap.h.


iLLD_TC26B: How to use the PSI5S PSI5S Interface driver?

How to use the PSI5S PSI5S Interface driver?
iLLD » PSI5S
Collaboration diagram for How to use the PSI5S PSI5S Interface driver?:

PSI5S defines a current loop based serial communication link typically used to connect airbag sensors or other peripheral devices.Data transmission and configuration of the sensor can be done by modulation of the Sync Pulses.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Psi5s/Psi5s/IfxPsi5s_Psi5s.h>

Variables

// PSI5S handle
IfxPsi5s_Psi5s psi5s;

Module Initialisation

// create module config
IfxPsi5s_Psi5s_Config psi5sModuleConfig;
IfxPsi5s_Psi5s_initModuleConfig(&psi5sModuleConfig, &MODULE_PSI5S);
IfxPsi5s_Psi5s_initModule(&psi5s, &psi5sModuleConfig);

Channel Initialisation

// create channel config
IfxPsi5s_Psi5s_ChannelConfig psi5sChannelConfig;
IfxPsi5s_Psi5s_initChannelConfig(&psi5sChannelConfig, &psi5s);
// change channel (default is channel 0, change to channel 4)
psi5sChannelConfig.channelId = IfxPsi5s_ChannelId_4;
// change payloadlength (default is 0, i.e., no frame expecte; change to 8)
for(int slot=0; slot<6; ++slot)
{
psi5sChannelConfig.receiveControl.payloadLength[slot] = 8;
}
// change channel (default is channel 0, change to channel 4)
psi5sChannelConfig.channelId = IfxPsi5s_ChannelId_4;
// initialize the channel
IfxPsi5s_Psi5s_Channel psi5sChannel;
IfxPsi5s_Psi5s_initChannel(&psi5sChannel, &psi5sChannelConfig);

Now, PSI5S is ready. Then, call the below APIs to do operation.

Send Channel Data

uint32 channels = (1 << IfxPsi5s_ChannelId_4); // enable channel 4
uint32 mask = (1 << IfxPsi5s_ChannelId_4); // modify the selection for channel 4
// enable the channel trigger counter
IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(&psi5s, channels, mask);
// enable the channel
IfxPsi5s_Psi5s_enableDisableChannels(&psi5s, channels, mask);
// start ASC interface
IfxPsi5s_Psi5s_startAscTransactions(&psi5s);
uint32 data = 0x5;
// send data
if(IfxPsi5s_Psi5s_sendChannelData(&psi5sChannel, data))
{
// wait till data transfer is completed
while(psi5s.psi5s->INTSTAT[IfxPsi5s_ChannelId_4].B.TPI == 0);
}

Read Channel Frame

// enable ASC receiver
IfxPsi5s_Psi5s_enableAscReceiver(&psi5s);
// start ASC interface
IfxPsi5s_Psi5s_startAscTransactions(&psi5s);
// add the code below to initiate the sensor to transmit frames
// end of code to initiate the sensor to transmit frames
IfxPsi5s_Psi5s_Frame frame;
while(!IfxPsi5s_Psi5s_getReadFrameStatus(psi5,IfxPsi5s_ChannelId_4));
IfxPsi5s_Psi5s_readFrame(&psi5sChannel, &frame))


iLLD_TC26B: PSI5S

Modules
PSI5S
iLLD » PSI5S
Collaboration diagram for PSI5S:

Modules

Data Structures
Module Initialise Functions
Channel Functions
Utility Functions
Interrupt configuration Function

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » PSI5S » PSI5S
Collaboration diagram for Data Structures:

Data Structures

struct | IfxPsi5s_Psi5s_Clock
Clock configuration data structure. More...
struct | IfxPsi5s_Psi5s_ReceivedBits
Received individual bits. More...
struct | IfxPsi5s_Psi5s_ReceivedData
Receive data structure with different segments of data. More...
struct | IfxPsi5s_Psi5s_Timestamp
Received timestamp contents structure. More...
struct | IfxPsi5s_Psi5s
PSI5S handle data structure. More...
struct | IfxPsi5s_Psi5s_AscConfig
PSI5S module configuration structure. More...
struct | IfxPsi5s_Psi5s_ChannelTrigger
channel trigger configuration structure More...
struct | IfxPsi5s_Psi5s_GlobalControlConfig
PSI5S global control configuration structure. More...
struct | IfxPsi5s_Psi5s_Pins
Structure for PSI5S pin configuration. More...
struct | IfxPsi5s_Psi5s_PulseGeneration
Sync pulse generation configuration structure. More...
struct | IfxPsi5s_Psi5s_ReceiveControl
Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers. More...
union | IfxPsi5s_Psi5s_ReceiveData
"Received data" data structure More...
union | IfxPsi5s_Psi5s_ReceiveStatus
Receiver status data structure. More...
union | IfxPsi5s_Psi5s_ReceiveTimestamp
Receiver timestamp data structure. More...
struct | IfxPsi5s_Psi5s_TimeStampConfig
Timestamp configuration data structure. More...
struct | IfxPsi5s_Psi5s_TransmitControl
Transmit control configuration structure. More...
struct | IfxPsi5s_Psi5s_Channel
Channel handle data structure. More...
struct | IfxPsi5s_Psi5s_ChannelConfig
Channel configuration structure. More...
struct | IfxPsi5s_Psi5s_Config
PSI5S module configuration structure. More...
struct | IfxPsi5s_Psi5s_Frame
Psi5s frame data structure. More...

Detailed Description

Data Structure Documentation

◆ IfxPsi5s_Psi5s_Clock

struct IfxPsi5s_Psi5s_Clock

Clock configuration data structure.

Definition at line 179 of file IfxPsi5s_Psi5s.h.

Data Fields
uint32 | frequency | Specifies the frequency for the clock.
IfxPsi5s_DividerMode | mode | Specifies the mode of division for the clock.
IfxPsi5s_ClockType | type | Specifies the type of clock (fracDiv / timestamp)

◆ IfxPsi5s_Psi5s_ReceivedBits

struct IfxPsi5s_Psi5s_ReceivedBits

Received individual bits.

Definition at line 188 of file IfxPsi5s_Psi5s.h.

Data Fields
uint8 | actualUartFrameCount: 3 | UART frames actually received.
uint8 | ascFramingErrorFlag: 1 | ASC framing error flag.
uint8 | ascOverrunErrorFlag: 1 | ASC overrun error flag.
uint8 | ascParityErrorFlag: 1 | ASC parity error flag.
uint8 | channelId: 3 | Channel ID.
uint8 | crc: 3 | Received CRC.
uint8 | crcError: 1 | CRC error flag.
uint8 | errorFlag0: 1 | Error signalling flag 0.
uint8 | errorFlag1: 1 | Error signalling flag 1.
uint8 | frameId: 3 | Frame ID.
uint8 | headerErrorFlag: 1 | Header error signalling flag.
uint8 | packetFrameCount: 4 | Packet frame count.
uint8 | receiveBufferOverflowFlag: 1 | Receive buffer overflow flag.
uint8 | watchdogTimeoutErrorFlag: 1 | Watchdog timeout error flag.
uint8 | xcrc: 6 | Received XCRC.
uint8 | xcrcError: 1 | XCRC error flag.

◆ IfxPsi5s_Psi5s_ReceivedData

struct IfxPsi5s_Psi5s_ReceivedData

Receive data structure with different segments of data.

Definition at line 210 of file IfxPsi5s_Psi5s.h.

Data Fields
uint8 | packetFrameCount | Packet frame count.
uint32 | readData: 28 | Received data.

◆ IfxPsi5s_Psi5s_Timestamp

struct IfxPsi5s_Psi5s_Timestamp

Received timestamp contents structure.

Definition at line 218 of file IfxPsi5s_Psi5s.h.

Data Fields
uint8 | packetFrameCount: 4 | Packet frame count.
uint32 | timestamp: 24 | Received data.

◆ IfxPsi5s_Psi5s

struct IfxPsi5s_Psi5s

PSI5S handle data structure.

Definition at line 230 of file IfxPsi5s_Psi5s.h.

Data Fields
Ifx_PSI5S * psi5s Specifies the pointer to the PSI5S module registers.

◆ IfxPsi5s_Psi5s_AscConfig

struct IfxPsi5s_Psi5s_AscConfig

PSI5S module configuration structure.

Definition at line 237 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_AscConfig:
[legend]
Data Fields
uint32 | baudrateFrequency | Specifies the baudrate frequency.
IfxPsi5s_AscBaudratePrescalar | baudrateSelection | Specifies whether divide-by-2 or divide-by-3 is selected for baudrate prescalar.
IfxPsi5s_Psi5s_Clock | clockOutput | Specifies the output clock properties.
boolean | fractionalDividerEnabled | Specifies whether fractional divider is enabled or not.
boolean | framingCheckEnabled | Specifies whether framing check is enabled or not.
boolean | loopbackEnabled | Specifies whether loopback is enabled or not.
boolean | overrunCheckEnabled | Specifies whether overrun check is enabled or not.
boolean | parityCheckEnabled | Specifies whether parity check is enabled or not.
IfxPsi5s_AscMode | receiveMode | Specifies the mode of operation for ASC receiver.
boolean | receiverOddParityEnabled | Specifies whether receiver parity check should be for even or odd.
IfxPsi5s_AscStopBits | stopBits | Specifies the number of stop bits.
IfxPsi5s_AscMode | transmitMode | Specifies the mode of operation for ASC transmitter.
boolean | transmitterOddParityEnabled | Specifies whether transmit parity generation should be even or odd.

◆ IfxPsi5s_Psi5s_ChannelTrigger

struct IfxPsi5s_Psi5s_ChannelTrigger

channel trigger configuration structure

Definition at line 256 of file IfxPsi5s_Psi5s.h.

Data Fields
uint32 | channelTriggerCounter | Specifies the channel trigger counter.
uint32 | channelTriggerValue | Specifies the channel trigger value CTV.

◆ IfxPsi5s_Psi5s_GlobalControlConfig

struct IfxPsi5s_Psi5s_GlobalControlConfig

PSI5S global control configuration structure.

Definition at line 264 of file IfxPsi5s_Psi5s.h.

Data Fields
boolean | ascOnlyMode | Specifies if the module is in ASC only mode.
boolean | crcErrorConsideredForRSI | Specifies whether CRCI is considered for RSI assertion.
boolean | framingErrorConsideredForRSI | Specifies whether FE is considered for RSI assertion.
boolean | headerErrorConsideredForRSI | Specifies whether HDI is considered for RSI assertion.
uint32 | idleTime | Specifies the number of stop bits in addition to last UART frame that is required for start of frame detection.
boolean | overrunErrorConsideredForRSI | Specifies whether OE is considered for RSI assertion.
boolean | parityErrorConsideredForRSI | Specifies whether PE is considered for RSI assertion.
boolean | receiveBufferErrorConsideredForRSI | Specifies whether RBI is considered for RSI assertion.
boolean | transmitErrorConsideredForRSI | Specifies whether TEI is considered for RSI assertion.
boolean | xcrcErrorConsideredForRSI | Specifies whether XCRCI is considered for RSI assertion.

◆ IfxPsi5s_Psi5s_Pins

struct IfxPsi5s_Psi5s_Pins

Structure for PSI5S pin configuration.

Definition at line 280 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_Pins:
[legend]
Data Fields
IFX_CONST IfxPsi5s_Clk_Out * | clk | PSI5S Clk Pin.
IfxPort_OutputMode | clkMode | Clk as output.
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxPsi5s_Rx_In * | rx | PSI5S Rx pin.
IfxPort_InputMode | rxMode | Rx pin as input.
IFX_CONST IfxPsi5s_Tx_Out * | tx | PSI5S Tx pin.
IfxPort_OutputMode | txMode | Tx as output.

◆ IfxPsi5s_Psi5s_PulseGeneration

struct IfxPsi5s_Psi5s_PulseGeneration

Sync pulse generation configuration structure.

Definition at line 293 of file IfxPsi5s_Psi5s.h.

Data Fields
uint32 | codeforOne | Specifies the code used to represent '1' - referred as ATXCMD.
uint32 | codeforZero | Specifies the code used to represent '0' - referred as TXCMD.
IfxPsi5s_Trigger | externalTimeBaseSelect | Specifies the clock source for CTV in the case of external.
IfxPsi5s_Trigger | externalTriggerSelect | Specifies the trigger source in case of external triggerring.
IfxPsi5s_TriggerType | periodicOrExternal | Specifies whether periodic trigger or external trigger or bypass is selected.
IfxPsi5s_TimeBase | timeBaseSelect | Specifies the clock source for CTV as internal or external.

◆ IfxPsi5s_Psi5s_ReceiveControl

struct IfxPsi5s_Psi5s_ReceiveControl

Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers.

Definition at line 305 of file IfxPsi5s_Psi5s.h.

Data Fields
IfxPsi5s_CrcOrParity | crcOrParity[IFXPSI5S_NUM_SLOTS] | Specifies the crc or parity selection for the slots 0 to 5.
IfxPsi5s_FrameId | frameIdSelect | Specifies if frame ID is updated from frame header or is a rolling number 0..5 copied from FCNT.
IfxPsi5s_NumberExpectedFrames | numberOfFramesExpected | Specifies the number of psi5s frames expected.
uint32 | payloadLength[IFXPSI5S_NUM_SLOTS] | Specifies the payload length to be received for each slot.
boolean | timestampEnabled | Specifies whether the timestamp is enabled or not.
IfxPsi5s_TimestampRegister | timestampSelect | Specifies the timestamp register selection for pulses.
IfxPsi5s_TimestampTrigger | timestampTriggerSelect | Specifies the timestamp register selection for pulses.
IfxPsi5s_UartFrameCount | uartFrameCount[IFXPSI5S_NUM_SLOTS] | Specifies the expected number of UART frames per packet frame for each slot.
IfxPsi5s_WatchdogTimerMode | watchdogTimerModeSelect | Specifies the watchdog timer restart is wrt frame or sync pulse reception.

◆ IfxPsi5s_Psi5s_ReceiveData

union IfxPsi5s_Psi5s_ReceiveData

"Received data" data structure

Definition at line 320 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_ReceiveData:
[legend]
Data Fields
uint32 | rdr | received data with frame count
IfxPsi5s_Psi5s_ReceivedData | receivedData | Receive data structure with different segments of data.

◆ IfxPsi5s_Psi5s_ReceiveStatus

union IfxPsi5s_Psi5s_ReceiveStatus

Receiver status data structure.

Definition at line 328 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_ReceiveStatus:
[legend]
Data Fields
uint32 | rds | received status data.
IfxPsi5s_Psi5s_ReceivedBits | receivedBits | Received individual bits.

◆ IfxPsi5s_Psi5s_ReceiveTimestamp

union IfxPsi5s_Psi5s_ReceiveTimestamp

Receiver timestamp data structure.

Definition at line 336 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_ReceiveTimestamp:
[legend]
Data Fields
IfxPsi5s_Psi5s_Timestamp | timeStamp | Received timestamp contents structure.
uint32 | tsm | received timestamp along with frame count

◆ IfxPsi5s_Psi5s_TimeStampConfig

struct IfxPsi5s_Psi5s_TimeStampConfig

Timestamp configuration data structure.

Definition at line 344 of file IfxPsi5s_Psi5s.h.

Data Fields
IfxPsi5s_Trigger | externalTimeBaseSelect | Specifies the clock base for counter CTS in the case of external.
IfxPsi5s_TimeBase | timeBaseSelect | Specifies the clock source for CTS as internal or external.

◆ IfxPsi5s_Psi5s_TransmitControl

struct IfxPsi5s_Psi5s_TransmitControl

Transmit control configuration structure.

Definition at line 352 of file IfxPsi5s_Psi5s.h.

Data Fields
boolean | bitStuffControl | Specifies whether the bit stuffing is turned on or not.
boolean | crcGenerationControl | Specifies whether the crc generation is turned on or not.
IfxPsi5s_EnhancedProtocol | enhancedProtocolSelection | Specifies whether the enhanced protocol is selected or not.
uint32 | payloadLength | Specifies the payload length to be sent.
boolean | startSequenceGenerationControl | Specifies whether the start sequence generation is turned on or not.

◆ IfxPsi5s_Psi5s_Channel

struct IfxPsi5s_Psi5s_Channel

Channel handle data structure.

Definition at line 367 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_Channel:
[legend]
Data Fields
IfxPsi5s_ChannelId | channelId | Specifies the channel index.
IfxPsi5s_Psi5s * | module | The PSI5S handle structure.

◆ IfxPsi5s_Psi5s_ChannelConfig

struct IfxPsi5s_Psi5s_ChannelConfig

Channel configuration structure.

Definition at line 375 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_ChannelConfig:
[legend]
Data Fields
IfxPsi5s_ChannelId | channelId | Specifies the channel index.
IfxPsi5s_Psi5s_ChannelTrigger | channelTrigger | Specifies the configuration for channel trigger.
IFX_CONST IfxPsi5s_Psi5s * | module | Specifies pointer to the IfxPsi5s_Psi5s module handle.
IfxPsi5s_Psi5s_PulseGeneration | pulseGeneration | Specifies the configuration for sync pulse generation.
IfxPsi5s_Psi5s_ReceiveControl | receiveControl | Specifies the configuration for reception.
IfxPsi5s_Psi5s_TransmitControl | sendControl | Specifies the configuration for transmission.
uint32 | watchdogTimerLimit | Specifies the watchdog timer limit for each of the slots 0 to 6.

◆ IfxPsi5s_Psi5s_Config

struct IfxPsi5s_Psi5s_Config

PSI5S module configuration structure.

Definition at line 388 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_Config:
[legend]
Data Fields
IfxPsi5s_Psi5s_AscConfig | ascConfig | Specifies the configuration for ASC.
IfxPsi5s_Psi5s_Clock | fracDiv | Specifies fractionally divided clock properties.
IfxPsi5s_Psi5s_GlobalControlConfig | globalControlConfig | Specifies the global control configuration.
Ifx_PSI5S * | module | Specifies the pointer to the PSI5S module registers.
IFX_CONST IfxPsi5s_Psi5s_Pins * | pins | structure for PSI5S pin configuration
IfxPsi5s_Psi5s_Clock | timestampClock | Specifies the time stamp clock properties.
IfxPsi5s_Psi5s_TimeStampConfig | timestampCounterA | Specifies the time stamp counter A properties.
IfxPsi5s_Psi5s_TimeStampConfig | timestampCounterB | Specifies the time stamp counter B properties.

◆ IfxPsi5s_Psi5s_Frame

struct IfxPsi5s_Psi5s_Frame

Psi5s frame data structure.

Definition at line 402 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_Frame:
[legend]
Data Fields
IfxPsi5s_Psi5s_ReceiveData | data | Received data.
IfxPsi5s_Psi5s_ReceiveStatus | status | Receiver status.
IfxPsi5s_Psi5s_ReceiveTimestamp | timestamp | Receiver timestamp.


iLLD_TC26B: Module Initialise Functions

Functions
Module Initialise Functions
iLLD » PSI5S » PSI5S
Collaboration diagram for Module Initialise Functions:

Functions

IFX_EXTERN void | IfxPsi5s_Psi5s_deInitModule (IfxPsi5s_Psi5s *psi5s)
De-initialise the PSI5S module. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_initModule (IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
Initialise the PSI5S with the supplied configureation. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_initModuleConfig (IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
Initialise buffer with default PSI5S configuration. More...

Detailed Description

Function Documentation

◆ IfxPsi5s_Psi5s_deInitModule()

IFX_EXTERN void IfxPsi5s_Psi5s_deInitModule ( IfxPsi5s_Psi5s * psi5s )

De-initialise the PSI5S module.

Parameters
psi5s pointer to the PSI5S module
Returns
None

Definition at line 84 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_initModule()

IFX_EXTERN boolean IfxPsi5s_Psi5s_initModule | ( | IfxPsi5s_Psi5s * | psi5s,
 |  | const IfxPsi5s_Psi5s_Config * | config
 | ) |  |

Initialise the PSI5S with the supplied configureation.

Parameters
psi5s | pointer to the PSI5S module
config | pointer to the PSI5S configuration
Returns
TRUE if valid otherwise FALSE

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 271 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_initModuleConfig()

IFX_EXTERN void IfxPsi5s_Psi5s_initModuleConfig | ( | IfxPsi5s_Psi5s_Config * | config,
 |  | Ifx_PSI5S * | psi5s
 | ) |  |

Initialise buffer with default PSI5S configuration.

Parameters
config | pointer to the PSI5S module configuration buffer
psi5s | pointer to the PSI5S register space
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 389 of file IfxPsi5s_Psi5s.c.


iLLD_TC26B: Channel Functions

Functions
Channel Functions
iLLD » PSI5S » PSI5S
Collaboration diagram for Channel Functions:

Functions

IFX_INLINE void | IfxPsi5s_Psi5s_enableAscReceiver (IfxPsi5s_Psi5s *psi5s)
Enable ASC interface receiver. More...
IFX_INLINE void | IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters (IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channel trigger counters selected by mask parameter. More...
IFX_INLINE void | IfxPsi5s_Psi5s_enableDisableChannels (IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channels selected by mask parameter. More...
IFX_INLINE void | IfxPsi5s_Psi5s_startAscTransactions (IfxPsi5s_Psi5s *psi5s)
Start ASC transactions. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_initChannel (IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_initChannelConfig (IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
Initialise buffer with default channel configuration. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_readFrame (IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
Get the received psi5s frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_sendChannelData (IfxPsi5s_Psi5s_Channel *channel, uint32 data)
Transmit the data through the channel. More...

Detailed Description

Function Documentation

◆ IfxPsi5s_Psi5s_enableAscReceiver()

IFX_INLINE void IfxPsi5s_Psi5s_enableAscReceiver ( IfxPsi5s_Psi5s * psi5s )

Enable ASC interface receiver.

Parameters
psi5s pointer to the PSI5S module
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 575 of file IfxPsi5s_Psi5s.h.

◆ IfxPsi5s_Psi5s_enableDisableChannels()

IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannels | ( | IfxPsi5s_Psi5s * | psi5s,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

Access function to enable/disable any combination of channels selected by mask parameter.

Parameters
psi5s | pointer to the PSI5S module
channels | specifies the channels which should be enabled/disabled
mask | specifies the channels which should be modified
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 587 of file IfxPsi5s_Psi5s.h.

◆ IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters()

IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters | ( | IfxPsi5s_Psi5s * | psi5s,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

Access function to enable/disable any combination of channel trigger counters selected by mask parameter.

Parameters
psi5s | pointer to the PSI5S module
channels | specifies the channel trigger counters which should be enabled/disabled
mask | specifies the channel trigger counters which should be modified
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 581 of file IfxPsi5s_Psi5s.h.

◆ IfxPsi5s_Psi5s_initChannel()

IFX_EXTERN boolean IfxPsi5s_Psi5s_initChannel | ( | IfxPsi5s_Psi5s_Channel * | channel,
 |  | const IfxPsi5s_Psi5s_ChannelConfig * | config
 | ) |  |

Initialize the channel with the supplied configuration.

Parameters
channel | pointer to the PSI5S channel
config | pointer to the PSI5S channel configuration
Returns
TRUE on success & FALSE if configuration not valid (e.g. missing resource)

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 124 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_initChannelConfig()

IFX_EXTERN void IfxPsi5s_Psi5s_initChannelConfig | ( | IfxPsi5s_Psi5s_ChannelConfig * | config,
 |  | IfxPsi5s_Psi5s * | psi5s
 | ) |  |

Initialise buffer with default channel configuration.

Parameters
config | pointer to the PSI5S channel configuration
psi5s | pointer to the PSI5S module
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 214 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_readFrame()

IFX_EXTERN void IfxPsi5s_Psi5s_readFrame | ( | IfxPsi5s_Psi5s_Channel * | channel,
 |  | IfxPsi5s_Psi5s_Frame * | frame
 | ) |  |

Get the received psi5s frame for the channel.

Parameters
channel | pointer to the PSI5S module
frame | pointer to the PSI5S frame buffer
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 539 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_sendChannelData()

IFX_EXTERN boolean IfxPsi5s_Psi5s_sendChannelData | ( | IfxPsi5s_Psi5s_Channel * | channel,
 |  | uint32 | data
 | ) |  |

Transmit the data through the channel.

Parameters
channel | pointer to the PSI5S channel
data | data to be sent
Returns
TRUE if Sends data otherwise FALSE

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 566 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_startAscTransactions()

IFX_INLINE void IfxPsi5s_Psi5s_startAscTransactions ( IfxPsi5s_Psi5s * psi5s )

Start ASC transactions.

Parameters
psi5s pointer to the PSI5S module
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 593 of file IfxPsi5s_Psi5s.h.


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » PSI5S » PSI5S
Collaboration diagram for Utility Functions:

Functions

IFX_STATIC uint32 | IfxPsi5s_Psi5s_getFracDivClock (Ifx_PSI5S *psi5s)
get the fracDiv clock frequency More...
IFX_STATIC uint32 | IfxPsi5s_Psi5s_initializeClock (Ifx_PSI5S *psi5s, const IfxPsi5s_Psi5s_Clock *clock)
Configure the fracDiv clock. More...
IFX_STATIC uint32 | IfxPsi5s_Psi5s_setBaudrate (Ifx_PSI5S *psi5s, uint32 baudrate, IfxPsi5s_Psi5s_AscConfig *ascConfig)
Configure the baudrate at the ASC interface. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_enableModule (Ifx_PSI5S *psi5s)
Enable PSI5S kernel. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_resetModule (Ifx_PSI5S *psi5s)
Reset PSI5S kernel. More...

Detailed Description

Function Documentation

◆ IfxPsi5s_Psi5s_enableModule()

IFX_EXTERN void IfxPsi5s_Psi5s_enableModule ( Ifx_PSI5S * psi5s )

Enable PSI5S kernel.

Parameters
psi5s pointer to the base of PSI5S register space
Returns
None

Definition at line 91 of file IfxPsi5s_Psi5s.c.

Referenced by IfxPsi5s_Psi5s_initModule().

◆ IfxPsi5s_Psi5s_getFracDivClock()

IFX_STATIC uint32 IfxPsi5s_Psi5s_getFracDivClock ( Ifx_PSI5S * psi5s )

get the fracDiv clock frequency

Parameters
psi5s Pointer to the base of PSI5S register space
Returns
Returns the configured fracDiv psi5s clock frequency in Hz.

Definition at line 97 of file IfxPsi5s_Psi5s.c.

Referenced by IfxPsi5s_Psi5s_initializeClock().

◆ IfxPsi5s_Psi5s_initializeClock()

IFX_STATIC uint32 IfxPsi5s_Psi5s_initializeClock | ( | Ifx_PSI5S * | psi5s,
 |  | const IfxPsi5s_Psi5s_Clock * | clock
 | ) |  |

Configure the fracDiv clock.

Parameters
psi5s | Pointer to the base of PSI5S register space
clock | Specifies the required clock frequency in Hz.
Returns
Returns the configured clock frequency in Hz.

Definition at line 432 of file IfxPsi5s_Psi5s.c.

Referenced by IfxPsi5s_Psi5s_initModule().

◆ IfxPsi5s_Psi5s_resetModule()

IFX_EXTERN void IfxPsi5s_Psi5s_resetModule ( Ifx_PSI5S * psi5s )

Reset PSI5S kernel.

Parameters
psi5s pointer to the base of PSI5S registers
Returns
None

Definition at line 549 of file IfxPsi5s_Psi5s.c.

Referenced by IfxPsi5s_Psi5s_deInitModule().

◆ IfxPsi5s_Psi5s_setBaudrate()

IFX_STATIC uint32 IfxPsi5s_Psi5s_setBaudrate | ( | Ifx_PSI5S * | psi5s,
 |  | uint32 | baudrate,
 |  | IfxPsi5s_Psi5s_AscConfig * | ascConfig
 | ) |  |

Configure the baudrate at the ASC interface.

Parameters
psi5s | Pointer to the base of PSI5S register space
baudrate | Frequency Specifies the required baudrate frequency in Hz.
ascConfig | pointer to the configuration structure for ASC
Returns
Returns the configured baudrate frequency in Hz.

Definition at line 581 of file IfxPsi5s_Psi5s.c.

Referenced by IfxPsi5s_Psi5s_initModule().


iLLD_TC26B: Interrupt configuration Function

Interrupt configuration Function
iLLD » PSI5S » PSI5S
Collaboration diagram for Interrupt configuration Function:


iLLD_TC26B: IfxPsi5s_cfg.h File Reference

  • _Impl
Macros
IfxPsi5s_cfg.h File Reference
iLLD » PSI5S

PSI5S on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXPSI5S_NUM_CHANNELS 8
#define | IFXPSI5S_STEP_RANGE 1024
#define | IFXPSI5S_NUM_WDTS 7
#define | IFXPSI5S_NUM_SLOTS 6
#define | IFXPSI5S_ENABLE_CHANNELTRIGGER (1 << 8)
#define | IFXPSI5S_ENABLE_CHANNEL (1 << 16)
#define | IFXPSI5S_BG_RANGE 8192
#define | IFXPSI5S_FDV_RANGE 2048
#define | IFXPSI5S_BAUDRATE_1562500 1562500
#define | IFXPSI5S_GCR_CHANNELS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 16
//0x00FF0000 More...
#define | IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 8
#define | IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ 4000000
#define | IFXPSI5S_DEFAULT_FASTCLOCK_FREQ 6000000
#define | IFXPSI5S_DEFAULT_TIMESTAMP_FREQ 1000000
#define | IFXPSI5S_NUM_MODULES (1)

Detailed Description

PSI5S on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5s_cfg.h.

Macro Definition Documentation

◆ IFXPSI5S_BAUDRATE_1562500

#define IFXPSI5S_BAUDRATE_1562500 1562500

Definition at line 78 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_Psi5s_initModuleConfig().

◆ IFXPSI5S_BG_RANGE

#define IFXPSI5S_BG_RANGE 8192

Definition at line 74 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_Psi5s_setBaudrate().

◆ IFXPSI5S_DEFAULT_FASTCLOCK_FREQ

#define IFXPSI5S_DEFAULT_FASTCLOCK_FREQ 6000000

Definition at line 88 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ

#define IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ 4000000

Definition at line 86 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_DEFAULT_TIMESTAMP_FREQ

#define IFXPSI5S_DEFAULT_TIMESTAMP_FREQ 1000000

Definition at line 90 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_ENABLE_CHANNEL

#define IFXPSI5S_ENABLE_CHANNEL (1 << 16)

Definition at line 72 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_ENABLE_CHANNELTRIGGER

#define IFXPSI5S_ENABLE_CHANNELTRIGGER (1 << 8)

Definition at line 70 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_FDV_RANGE

#define IFXPSI5S_FDV_RANGE 2048

Definition at line 76 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_Psi5s_setBaudrate().

◆ IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK

#define IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 8

Definition at line 84 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_enableDisableChannelTriggerCounters().

◆ IFXPSI5S_GCR_CHANNELS_ENABLE_MASK

#define IFXPSI5S_GCR_CHANNELS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 16

//0x00FF0000

Definition at line 82 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_enableDisableChannels().

◆ IFXPSI5S_NUM_CHANNELS

#define IFXPSI5S_NUM_CHANNELS 8

Definition at line 62 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_NUM_MODULES

#define IFXPSI5S_NUM_MODULES (1)

Definition at line 92 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_NUM_SLOTS

#define IFXPSI5S_NUM_SLOTS 6

Definition at line 68 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_NUM_WDTS

#define IFXPSI5S_NUM_WDTS 7

Definition at line 66 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_STEP_RANGE

#define IFXPSI5S_STEP_RANGE 1024

Definition at line 64 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_Psi5s_getFracDivClock(), and IfxPsi5s_Psi5s_initializeClock().


iLLD_TC26B: IfxPsi5s_PinMap.c File Reference

  • _PinMap
Variables
IfxPsi5s_PinMap.c File Reference
iLLD » PSI5S

PSI5S I/O map. More...

#include "IfxPsi5s_PinMap.h"
Include dependency graph for IfxPsi5s_PinMap.c:

Go to the source code of this file.

Variables

IfxPsi5s_Clk_Out | IfxPsi5s_CLK_P02_4_OUT = {&MODULE_PSI5S, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt4}
IfxPsi5s_Clk_Out | IfxPsi5s_CLK_P33_10_OUT = {&MODULE_PSI5S, {&MODULE_P33,10}, IfxPort_OutputIdx_alt5}
IfxPsi5s_Rx_In | IfxPsi5s_RXA_P00_3_IN = {&MODULE_PSI5S, {&MODULE_P00, 3}, Ifx_RxSel_a}
IfxPsi5s_Rx_In | IfxPsi5s_RXB_P02_5_IN = {&MODULE_PSI5S, {&MODULE_P02, 5}, Ifx_RxSel_b}
IfxPsi5s_Rx_In | IfxPsi5s_RXC_P33_5_IN = {&MODULE_PSI5S, {&MODULE_P33, 5}, Ifx_RxSel_c}
IfxPsi5s_Tx_Out | IfxPsi5s_TX_P00_4_OUT = {&MODULE_PSI5S, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt2}
IfxPsi5s_Tx_Out | IfxPsi5s_TX_P02_6_OUT = {&MODULE_PSI5S, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt2}
IfxPsi5s_Tx_Out | IfxPsi5s_TX_P33_6_OUT = {&MODULE_PSI5S, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt7}
const IfxPsi5s_Clk_Out * | IfxPsi5s_Clk_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
const IfxPsi5s_Rx_In * | IfxPsi5s_Rx_In_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
const IfxPsi5s_Tx_Out * | IfxPsi5s_Tx_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]

Detailed Description

PSI5S I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5s_PinMap.c.

Variable Documentation

◆ IfxPsi5s_Clk_Out_pinTable

const IfxPsi5s_Clk_Out* IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxPsi5s_CLK_P02_4_OUT,
&IfxPsi5s_CLK_P33_10_OUT
}
}
IfxPsi5s_CLK_P33_10_OUT
IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT
Definition: IfxPsi5s_PinMap.c:46
IfxPsi5s_CLK_P02_4_OUT
IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT
Definition: IfxPsi5s_PinMap.c:45

Definition at line 55 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_CLK_P02_4_OUT

IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT = {&MODULE_PSI5S, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt4}

Definition at line 45 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_CLK_P33_10_OUT

IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT = {&MODULE_PSI5S, {&MODULE_P33,10}, IfxPort_OutputIdx_alt5}

Definition at line 46 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_Rx_In_pinTable

const IfxPsi5s_Rx_In* IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxPsi5s_RXA_P00_3_IN,
&IfxPsi5s_RXB_P02_5_IN,
&IfxPsi5s_RXC_P33_5_IN
}
}
IfxPsi5s_RXC_P33_5_IN
IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN
Definition: IfxPsi5s_PinMap.c:49
IfxPsi5s_RXA_P00_3_IN
IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN
Definition: IfxPsi5s_PinMap.c:47
IfxPsi5s_RXB_P02_5_IN
IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN
Definition: IfxPsi5s_PinMap.c:48

Definition at line 62 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_RXA_P00_3_IN

IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN = {&MODULE_PSI5S, {&MODULE_P00, 3}, Ifx_RxSel_a}

Definition at line 47 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_RXB_P02_5_IN

IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN = {&MODULE_PSI5S, {&MODULE_P02, 5}, Ifx_RxSel_b}

Definition at line 48 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_RXC_P33_5_IN

IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN = {&MODULE_PSI5S, {&MODULE_P33, 5}, Ifx_RxSel_c}

Definition at line 49 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_Tx_Out_pinTable

const IfxPsi5s_Tx_Out* IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxPsi5s_TX_P00_4_OUT,
&IfxPsi5s_TX_P02_6_OUT,
&IfxPsi5s_TX_P33_6_OUT
}
}
IfxPsi5s_TX_P33_6_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT
Definition: IfxPsi5s_PinMap.c:52
IfxPsi5s_TX_P02_6_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT
Definition: IfxPsi5s_PinMap.c:51
IfxPsi5s_TX_P00_4_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT
Definition: IfxPsi5s_PinMap.c:50

Definition at line 70 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_TX_P00_4_OUT

IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT = {&MODULE_PSI5S, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt2}

Definition at line 50 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_TX_P02_6_OUT

IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT = {&MODULE_PSI5S, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt2}

Definition at line 51 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_TX_P33_6_OUT

IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT = {&MODULE_PSI5S, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt7}

Definition at line 52 of file IfxPsi5s_PinMap.c.


iLLD_TC26B: IfxPsi5s_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxPsi5s_PinMap.h File Reference
iLLD » PSI5S

PSI5S I/O map. More...

#include <IfxPsi5s_reg.h>
#include <_Impl/IfxPsi5s_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxPsi5s_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxPsi5s_Rx_In
RX pin mapping structure. More...
struct | IfxPsi5s_Tx_Out
TX pin mapping structure. More...
struct | IfxPsi5s_Clk_Out
CLK pin mapping structure. More...

Macros

#define | IFXPSI5S_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS 2
#define | IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS 3
#define | IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT
PSI5S_CLK: PSI5-S output. More...
IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT
PSI5S_CLK: PSI5-S output. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN
PSI5S_RXA: PSI5-S input. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN
PSI5S_RXB: PSI5-S input. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN
PSI5S_RXC: PSI5-S input. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT
PSI5S_TX: PSI5-S output. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT
PSI5S_TX: PSI5-S output. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT
PSI5S_TX: PSI5-S output. More...
IFX_EXTERN const IfxPsi5s_Clk_Out * | IfxPsi5s_Clk_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
IfxPsi5s_Clk_Out table. More...
IFX_EXTERN const IfxPsi5s_Rx_In * | IfxPsi5s_Rx_In_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5s_Rx_In table. More...
IFX_EXTERN const IfxPsi5s_Tx_Out * | IfxPsi5s_Tx_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5s_Tx_Out table. More...

Detailed Description

PSI5S I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5s_PinMap.h.


iLLD_TC26B: IfxPsi5s_Psi5s.h File Reference

  • Psi5s
  • Psi5s
Data Structures | Functions
IfxPsi5s_Psi5s.h File Reference
iLLD » PSI5S

PSI5S PSI5S details. More...

#include "Psi5s/Std/IfxPsi5s.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxPsi5s_Psi5s.h:

Go to the source code of this file.

Data Structures

struct | IfxPsi5s_Psi5s_Clock
Clock configuration data structure. More...
struct | IfxPsi5s_Psi5s_ReceivedBits
Received individual bits. More...
struct | IfxPsi5s_Psi5s_ReceivedData
Receive data structure with different segments of data. More...
struct | IfxPsi5s_Psi5s_Timestamp
Received timestamp contents structure. More...
struct | IfxPsi5s_Psi5s
PSI5S handle data structure. More...
struct | IfxPsi5s_Psi5s_AscConfig
PSI5S module configuration structure. More...
struct | IfxPsi5s_Psi5s_ChannelTrigger
channel trigger configuration structure More...
struct | IfxPsi5s_Psi5s_GlobalControlConfig
PSI5S global control configuration structure. More...
struct | IfxPsi5s_Psi5s_Pins
Structure for PSI5S pin configuration. More...
struct | IfxPsi5s_Psi5s_PulseGeneration
Sync pulse generation configuration structure. More...
struct | IfxPsi5s_Psi5s_ReceiveControl
Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers. More...
union | IfxPsi5s_Psi5s_ReceiveData
"Received data" data structure More...
union | IfxPsi5s_Psi5s_ReceiveStatus
Receiver status data structure. More...
union | IfxPsi5s_Psi5s_ReceiveTimestamp
Receiver timestamp data structure. More...
struct | IfxPsi5s_Psi5s_TimeStampConfig
Timestamp configuration data structure. More...
struct | IfxPsi5s_Psi5s_TransmitControl
Transmit control configuration structure. More...
struct | IfxPsi5s_Psi5s_Channel
Channel handle data structure. More...
struct | IfxPsi5s_Psi5s_ChannelConfig
Channel configuration structure. More...
struct | IfxPsi5s_Psi5s_Config
PSI5S module configuration structure. More...
struct | IfxPsi5s_Psi5s_Frame
Psi5s frame data structure. More...

Functions

IFX_EXTERN void | IfxPsi5s_Psi5s_deInitModule (IfxPsi5s_Psi5s *psi5s)
De-initialise the PSI5S module. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_initModule (IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
Initialise the PSI5S with the supplied configureation. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_initModuleConfig (IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
Initialise buffer with default PSI5S configuration. More...
IFX_INLINE void | IfxPsi5s_Psi5s_enableAscReceiver (IfxPsi5s_Psi5s *psi5s)
Enable ASC interface receiver. More...
IFX_INLINE void | IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters (IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channel trigger counters selected by mask parameter. More...
IFX_INLINE void | IfxPsi5s_Psi5s_enableDisableChannels (IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channels selected by mask parameter. More...
IFX_INLINE void | IfxPsi5s_Psi5s_startAscTransactions (IfxPsi5s_Psi5s *psi5s)
Start ASC transactions. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_initChannel (IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_initChannelConfig (IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
Initialise buffer with default channel configuration. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_readFrame (IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
Get the received psi5s frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_sendChannelData (IfxPsi5s_Psi5s_Channel *channel, uint32 data)
Transmit the data through the channel. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_enableModule (Ifx_PSI5S *psi5s)
Enable PSI5S kernel. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_resetModule (Ifx_PSI5S *psi5s)
Reset PSI5S kernel. More...
IFX_INLINE boolean | IfxPsi5s_Psi5s_getReadFrameStatus (IfxPsi5s_Psi5s *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel. More...

Detailed Description

PSI5S PSI5S details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5s_Psi5s.h.

Function Documentation

◆ IfxPsi5s_Psi5s_getReadFrameStatus()

IFX_INLINE boolean IfxPsi5s_Psi5s_getReadFrameStatus | ( | IfxPsi5s_Psi5s * | psi5s,
 |  | IfxPsi5s_ChannelId | channelId
 | ) |  |

Get the received psi5s frame for the channel.

Parameters
psi5s | pointer to the PSI5S module
channelId | specifies channelID
Returns
return the status of Frame

Definition at line 599 of file IfxPsi5s_Psi5s.h.


iLLD_TC26B: IfxPsi5s.h File Reference

  • Psi5s
  • Std
Enumerations | Functions
IfxPsi5s.h File Reference
iLLD » PSI5S

PSI5S basic functionality. More...

#include "_Impl/IfxPsi5s_cfg.h"
#include "_PinMap/IfxPsi5s_PinMap.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxPsi5s_bf.h"
#include "IfxPsi5s_reg.h"
#include "Src/Std/IfxSrc.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxPsi5s.h:

Go to the source code of this file.

Enumerations

enum IfxPsi5s_AlternateInput {
IfxPsi5s_AlternateInput_0 = 0,
IfxPsi5s_AlternateInput_1,
IfxPsi5s_AlternateInput_2,
IfxPsi5s_AlternateInput_3
}
MODULE_PSI5S.IOCR.ALTI:Alternate input. More...
enum IfxPsi5s_AscBaudratePrescalar {
IfxPsi5s_AscBaudratePrescalar_divideBy2 = 0,
IfxPsi5s_AscBaudratePrescalar_divideBy3 = 1
}
MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select. More...
enum IfxPsi5s_AscMode {
IfxPsi5s_AscMode_sync = 0,
IfxPsi5s_AscMode_async_8bitData = 1,
IfxPsi5s_AscMode_async_7bitDataWithParity = 3,
IfxPsi5s_AscMode_async_9bitData = 4,
IfxPsi5s_AscMode_async_8bitDataWithWakeup = 5,
IfxPsi5s_AscMode_async_8bitDataWithParity = 7
}
MODULE_PSI5S.CON.M:ASC mode of operation. More...
enum IfxPsi5s_AscStopBits {
IfxPsi5s_AscStopBits_1 = 0,
IfxPsi5s_AscStopBits_2
}
MODULE_PSI5S.CON.STP: Number of stop bits. More...
enum IfxPsi5s_ChannelId {
IfxPsi5s_ChannelId_0 = 0,
IfxPsi5s_ChannelId_1,
IfxPsi5s_ChannelId_2,
IfxPsi5s_ChannelId_3,
IfxPsi5s_ChannelId_4,
IfxPsi5s_ChannelId_5,
IfxPsi5s_ChannelId_6,
IfxPsi5s_ChannelId_7,
IfxPsi5s_ChannelId_none = -1
}
PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID. More...
enum IfxPsi5s_ClockType {
IfxPsi5s_ClockType_fracDiv = 0,
IfxPsi5s_ClockType_timeStamp = 1,
IfxPsi5s_ClockType_ascFracDiv = 2,
IfxPsi5s_ClockType_ascOutput = 3
}
Clock Selection. More...
enum IfxPsi5s_CrcOrParity {
IfxPsi5s_CrcOrParity_parity = 0,
IfxPsi5s_CrcOrParity_crc = 1
}
MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity. More...
enum IfxPsi5s_DividerMode {
IfxPsi5s_DividerMode_spb = 0,
IfxPsi5s_DividerMode_normal = 1,
IfxPsi5s_DividerMode_fractional = 2,
IfxPsi5s_DividerMode_off = 3
}
MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode. More...
enum IfxPsi5s_EnhancedProtocol {
IfxPsi5s_EnhancedProtocol_toothGapMethod = 0,
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 = 1,
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 = 3
}
MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types. More...
enum IfxPsi5s_FrameId {
IfxPsi5s_FrameId_frameHeader = 0,
IfxPsi5s_FrameId_rollingNumber = 1
}
MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation. More...
enum IfxPsi5s_IdleTime {
IfxPsi5s_IdleTime_1 = 0,
IfxPsi5s_IdleTime_2,
IfxPsi5s_IdleTime_3,
IfxPsi5s_IdleTime_4,
IfxPsi5s_IdleTime_5,
IfxPsi5s_IdleTime_6,
IfxPsi5s_IdleTime_7,
IfxPsi5s_IdleTime_8,
IfxPsi5s_IdleTime_9,
IfxPsi5s_IdleTime_10,
IfxPsi5s_IdleTime_11,
IfxPsi5s_IdleTime_12,
IfxPsi5s_IdleTime_13,
IfxPsi5s_IdleTime_14,
IfxPsi5s_IdleTime_15,
IfxPsi5s_IdleTime_16
}
MODULE_PSI5S.GCR.IDT:Idle time bit count. More...
enum IfxPsi5s_LoopBackMode {
IfxPsi5s_LoopBackMode_disable = 0,
IfxPsi5s_LoopBackMode_enable = 1
}
Enable/Disable Loop back Mode. More...
enum IfxPsi5s_MessagingBits {
IfxPsi5s_MessagingBits_absent = 0,
IfxPsi5s_MessagingBits_present = 1
}
Messaging bits presence. More...
enum IfxPsi5s_NumberExpectedFrames {
IfxPsi5s_NumberExpectedFrames_1 = 1,
IfxPsi5s_NumberExpectedFrames_2,
IfxPsi5s_NumberExpectedFrames_3,
IfxPsi5s_NumberExpectedFrames_4,
IfxPsi5s_NumberExpectedFrames_5,
IfxPsi5s_NumberExpectedFrames_6
}
MODULE_PSI5S.NFC.NFx:Expected Psi5s frames. More...
enum IfxPsi5s_SleepMode {
IfxPsi5s_SleepMode_enable = 0,
IfxPsi5s_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_PSI5S.CLC.B.EDIS. More...
enum IfxPsi5s_SuspendMode {
IfxPsi5s_SuspendMode_none = 0,
IfxPsi5s_SuspendMode_hard = 1,
IfxPsi5s_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxPsi5s_TimeBase {
IfxPsi5s_TimeBase_internal = 0,
IfxPsi5s_TimeBase_external = 1
}
MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base. More...
enum IfxPsi5s_TimestampRegister {
IfxPsi5s_TimestampRegister_a = 0,
IfxPsi5s_TimestampRegister_b = 1
}
MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register. More...
enum IfxPsi5s_TimestampTrigger {
IfxPsi5s_TimestampTrigger_syncPulse = 0,
IfxPsi5s_TimestampTrigger_frame = 1
}
MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger. More...
enum IfxPsi5s_Trigger {
IfxPsi5s_Trigger_0 = 0,
IfxPsi5s_Trigger_1,
IfxPsi5s_Trigger_2,
IfxPsi5s_Trigger_3,
IfxPsi5s_Trigger_4,
IfxPsi5s_Trigger_5,
IfxPsi5s_Trigger_6,
IfxPsi5s_Trigger_7
}
MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id. More...
enum IfxPsi5s_TriggerType {
IfxPsi5s_TriggerType_periodic = 0,
IfxPsi5s_TriggerType_external = 1
}
Trigger type defined in. More...
enum IfxPsi5s_UartFrameCount {
IfxPsi5s_UartFrameCount_3 = 0,
IfxPsi5s_UartFrameCount_4,
IfxPsi5s_UartFrameCount_5,
IfxPsi5s_UartFrameCount_6
}
MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count. More...
enum IfxPsi5s_WatchdogTimerMode {
IfxPsi5s_WatchdogTimerMode_frame = 0,
IfxPsi5s_WatchdogTimerMode_syncPulse = 1
}
MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode. More...

Functions

IFX_EXTERN void | IfxPsi5s_disableAscReceiver (Ifx_PSI5S *psi5s)
Asc receiver is disabled. More...
IFX_EXTERN void | IfxPsi5s_enableAscReceiver (Ifx_PSI5S *psi5s)
Enable ASC receiver. More...
IFX_EXTERN void | IfxPsi5s_enableDisableChannelTriggerCounters (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter. More...
IFX_EXTERN void | IfxPsi5s_enableDisableChannels (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter. More...
IFX_EXTERN void | IfxPsi5s_startAscTransactions (Ifx_PSI5S *psi5s)
Start ASC transactions. More...
IFX_EXTERN void | IfxPsi5s_stopAscTransactions (Ifx_PSI5S *psi5s)
IFX_INLINE void | IfxPsi5s_initClkPin (const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a CLK output. More...
IFX_INLINE void | IfxPsi5s_initRxPin (const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxPsi5s_initTxPin (const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE void | IfxPsi5s_setRxInput (Ifx_PSI5S *psi5s, IfxPsi5s_AlternateInput alti)
Selects the alternate input for Rx signal. More...
IFX_INLINE boolean | IfxPsi5s_isModuleSuspended (Ifx_PSI5S *psi5s)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxPsi5s_setSleepMode (Ifx_PSI5S *psi5s, IfxPsi5s_SleepMode mode)
enable / disable sleep mode More...
IFX_INLINE void | IfxPsi5s_setSuspendMode (Ifx_PSI5S *psi5s, IfxPsi5s_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxPsi5s_disableModule (Ifx_PSI5S *psi5s)
Disable PSI5S kernel. More...
IFX_EXTERN boolean | IfxPsi5s_getReadFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5s_getSuccessfullyReceivedFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Indicates the successful reception of a frame. More...
IFX_EXTERN void | IfxPsi5s_resetModule (Ifx_PSI5S *psi5s)
resets PSI5S kernel More...

Detailed Description

PSI5S basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5s.h.


iLLD_TC26B: QSPI

Modules | Files
QSPI
iLLD
Collaboration diagram for QSPI:

Modules

Implementation
Standard Driver
QSPI Pin Mapping
How to use the SPI Master Interface driver?
SPI Master Driver
How to use the SPI Slave Interface driver?
SPI Slave Driver

Files

file | IfxQspi_cfg.h
QSPI on-chip implementation data.
file | IfxQspi_PinMap.c
QSPI I/O map.
file | IfxQspi_PinMap.h
QSPI I/O map.
file | IfxQspi_SpiMaster.h
QSPI SPIMASTER details.
file | IfxQspi_SpiSlave.h
QSPI SPISLAVE details.
file | IfxQspi.h
QSPI basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » QSPI
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
iLLD » QSPI » Implementation
Collaboration diagram for Enumerations:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » QSPI
Collaboration diagram for Standard Driver:

Modules

Enumerations
Operative Functions
Support Functions
Interrupt Functions
IO Pin Configuration Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » QSPI » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxQspi_ChannelId {
IfxQspi_ChannelId_0,
IfxQspi_ChannelId_1,
IfxQspi_ChannelId_2,
IfxQspi_ChannelId_3,
IfxQspi_ChannelId_4,
IfxQspi_ChannelId_5,
IfxQspi_ChannelId_6,
IfxQspi_ChannelId_7,
IfxQspi_ChannelId_8,
IfxQspi_ChannelId_9,
IfxQspi_ChannelId_10,
IfxQspi_ChannelId_11,
IfxQspi_ChannelId_12,
IfxQspi_ChannelId_13,
IfxQspi_ChannelId_14
}
QSPI channel Number (BACON.CS) More...
enum IfxQspi_DataLengthUnit {
IfxQspi_DataLengthUnit_bit = 0,
IfxQspi_DataLengthUnit_byte = 1
}
Data length unit of a frame (BACON.BYTE) More...
enum IfxQspi_Error {
IfxQspi_Error_none = 0,
IfxQspi_Error_parity = 1,
IfxQspi_Error_configuration = 2,
IfxQspi_Error_baudrate = 4,
IfxQspi_Error_txfifoOverflow = 8,
IfxQspi_Error_txfifoUnderflow = 16,
IfxQspi_Error_rxfifoOverflow = 32,
IfxQspi_Error_rxfifoUnderflow = 64,
IfxQspi_Error_expectTimeout = 128,
IfxQspi_Error_slsiMisplacedInactivation = 256
}
QSPI Error Flags (STATUS.ERRORFLAGS) More...
enum IfxQspi_ExpectTimeout {
IfxQspi_ExpectTimeout_64 = 0,
IfxQspi_ExpectTimeout_128 = 1,
IfxQspi_ExpectTimeout_256 = 2,
IfxQspi_ExpectTimeout_512 = 3,
IfxQspi_ExpectTimeout_1024 = 4,
IfxQspi_ExpectTimeout_2048 = 5,
IfxQspi_ExpectTimeout_4096 = 6,
IfxQspi_ExpectTimeout_8192 = 7,
IfxQspi_ExpectTimeout_16384 = 8,
IfxQspi_ExpectTimeout_32768 = 9,
IfxQspi_ExpectTimeout_65536 = 10,
IfxQspi_ExpectTimeout_131072 = 11,
IfxQspi_ExpectTimeout_262144 = 12,
IfxQspi_ExpectTimeout_524288 = 13,
IfxQspi_ExpectTimeout_1048576 = 14,
IfxQspi_ExpectTimeout_2097152 = 15
}
Frame Expect phase time out value. More...
enum IfxQspi_Mode {
IfxQspi_Mode_master = 0,
IfxQspi_Mode_pwmOverQspi = 1,
IfxQspi_Mode_slave = 2
}
QSPI controller mode (GLOBALCON.MODE) More...
enum IfxQspi_PauseRunTransition {
IfxQspi_PauseRunTransition_pause = 0,
IfxQspi_PauseRunTransition_run = 1
}
Request between pause and Run transition. More...
enum IfxQspi_Phase {
IfxQspi_Phase_wait = 0,
IfxQspi_Phase_idleA = 1,
IfxQspi_Phase_idleB = 2,
IfxQspi_Phase_lead = 3,
IfxQspi_Phase_data = 4,
IfxQspi_Phase_trail = 5,
IfxQspi_Phase_expect = 6,
IfxQspi_Phase_leadStrobe = 7,
IfxQspi_Phase_trailStrobe = 8
}
QSPI frame phase (STATUS.PHASE) More...
enum IfxQspi_PhaseTransitionEvent {
IfxQspi_PhaseTransitionEvent_endOfWait = 0,
IfxQspi_PhaseTransitionEvent_serialClockPolarityChange = 1,
IfxQspi_PhaseTransitionEvent_startOfFrame = 2,
IfxQspi_PhaseTransitionEvent_transmitBufferEmptied = 3,
IfxQspi_PhaseTransitionEvent_receiveBufferFilled = 4,
IfxQspi_PhaseTransitionEvent_endOfFrame = 5,
IfxQspi_PhaseTransitionEvent_dataNotAvailable = 6,
IfxQspi_PhaseTransitionEvent_endOfExpect = 7
}
Phase Transition Event. More...
enum IfxQspi_Reset {
IfxQspi_Reset_none = 0,
IfxQspi_Reset_stateMachineAndFifo = 7,
IfxQspi_Reset_kernel = 15
}
Reset Request (GLOBALCON.RESETS) More...
enum IfxQspi_RxFifoInt {
IfxQspi_RxFifoInt_0,
IfxQspi_RxFifoInt_1,
IfxQspi_RxFifoInt_2,
IfxQspi_RxFifoInt_3
}
Receive Fifo Interrupt Threshold. More...
enum IfxQspi_SleepMode {
IfxQspi_SleepMode_enable = 0,
IfxQspi_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_QSPI.CLC.B.EDIS. More...
enum IfxQspi_StrobeDelay {
IfxQspi_StrobeDelay_1,
IfxQspi_StrobeDelay_2,
IfxQspi_StrobeDelay_3,
IfxQspi_StrobeDelay_4,
IfxQspi_StrobeDelay_5,
IfxQspi_StrobeDelay_6,
IfxQspi_StrobeDelay_7,
IfxQspi_StrobeDelay_8,
IfxQspi_StrobeDelay_9,
IfxQspi_StrobeDelay_10,
IfxQspi_StrobeDelay_11,
IfxQspi_StrobeDelay_12,
IfxQspi_StrobeDelay_13,
IfxQspi_StrobeDelay_14,
IfxQspi_StrobeDelay_15,
IfxQspi_StrobeDelay_16,
IfxQspi_StrobeDelay_17,
IfxQspi_StrobeDelay_18,
IfxQspi_StrobeDelay_19,
IfxQspi_StrobeDelay_20,
IfxQspi_StrobeDelay_21,
IfxQspi_StrobeDelay_22,
IfxQspi_StrobeDelay_23,
IfxQspi_StrobeDelay_24,
IfxQspi_StrobeDelay_25,
IfxQspi_StrobeDelay_26,
IfxQspi_StrobeDelay_27,
IfxQspi_StrobeDelay_28,
IfxQspi_StrobeDelay_29,
IfxQspi_StrobeDelay_30,
IfxQspi_StrobeDelay_31,
IfxQspi_StrobeDelay_32
}
STROBE delay for SLSO in delayed mode (GLOBALCON.STROBE) More...
enum IfxQspi_TxFifoInt {
IfxQspi_TxFifoInt_1,
IfxQspi_TxFifoInt_2,
IfxQspi_TxFifoInt_3,
IfxQspi_TxFifoInt_4
}
Transmit Fifo Interrupt Threshold. More...

Detailed Description

Enumeration Type Documentation

◆ IfxQspi_ChannelId

enum IfxQspi_ChannelId

QSPI channel Number (BACON.CS)

Enumerator
IfxQspi_ChannelId_0 | Channel #0.
IfxQspi_ChannelId_1 | Channel #1.
IfxQspi_ChannelId_2 | Channel #2.
IfxQspi_ChannelId_3 | Channel #3.
IfxQspi_ChannelId_4 | Channel #4.
IfxQspi_ChannelId_5 | Channel #5.
IfxQspi_ChannelId_6 | Channel #6.
IfxQspi_ChannelId_7 | Channel #7.
IfxQspi_ChannelId_8 | Channel #8.
IfxQspi_ChannelId_9 | Channel #9.
IfxQspi_ChannelId_10 | Channel #10.
IfxQspi_ChannelId_11 | Channel #11.
IfxQspi_ChannelId_12 | Channel #12.
IfxQspi_ChannelId_13 | Channel #13.
IfxQspi_ChannelId_14 | Channel #14.

Definition at line 94 of file IfxQspi.h.

◆ IfxQspi_DataLengthUnit

enum IfxQspi_DataLengthUnit

Data length unit of a frame (BACON.BYTE)

Enumerator
IfxQspi_DataLengthUnit_bit | Data Length in Bits.
IfxQspi_DataLengthUnit_byte | Data length in Bytes.

Definition at line 115 of file IfxQspi.h.

◆ IfxQspi_Error

enum IfxQspi_Error

QSPI Error Flags (STATUS.ERRORFLAGS)

Enumerator
IfxQspi_Error_none | No Error.
IfxQspi_Error_parity | Parity Error.
IfxQspi_Error_configuration | Configuration Error.
IfxQspi_Error_baudrate | BaudRate Error.
IfxQspi_Error_txfifoOverflow | TX FIFO Overflow Error.
IfxQspi_Error_txfifoUnderflow | TX FIFO Underflow Error.
IfxQspi_Error_rxfifoOverflow | RX FIFO Overflow Error.
IfxQspi_Error_rxfifoUnderflow | RX FIFO Underflow Error.
IfxQspi_Error_expectTimeout | EXPECT Timeout Error.
IfxQspi_Error_slsiMisplacedInactivation | SLSI misplaced inactivation (slave mode)

Definition at line 123 of file IfxQspi.h.

◆ IfxQspi_ExpectTimeout

enum IfxQspi_ExpectTimeout

Frame Expect phase time out value.

Enumerator
IfxQspi_ExpectTimeout_64 | Expect phse time out 64.
IfxQspi_ExpectTimeout_128 | Expect phse time out 128.
IfxQspi_ExpectTimeout_256 | Expect phse time out 256.
IfxQspi_ExpectTimeout_512 | Expect phse time out 512.
IfxQspi_ExpectTimeout_1024 | Expect phse time out 1024.
IfxQspi_ExpectTimeout_2048 | Expect phse time out 2048.
IfxQspi_ExpectTimeout_4096 | Expect phse time out 4096.
IfxQspi_ExpectTimeout_8192 | Expect phse time out 8192.
IfxQspi_ExpectTimeout_16384 | Expect phse time out 16384.
IfxQspi_ExpectTimeout_32768 | Expect phse time out 32768.
IfxQspi_ExpectTimeout_65536 | Expect phse time out 65536.
IfxQspi_ExpectTimeout_131072 | Expect phse time out 131072.
IfxQspi_ExpectTimeout_262144 | Expect phse time out 262144.
IfxQspi_ExpectTimeout_524288 | Expect phse time out 524288.
IfxQspi_ExpectTimeout_1048576 | Expect phse time out 1048576.
IfxQspi_ExpectTimeout_2097152 | Expect phse time out 2097152.

Definition at line 139 of file IfxQspi.h.

◆ IfxQspi_Mode

enum IfxQspi_Mode

QSPI controller mode (GLOBALCON.MODE)

Enumerator
IfxQspi_Mode_master | QSPI in "master" mode.
IfxQspi_Mode_pwmOverQspi | QSPI in "PWM over QSPI" mode.
IfxQspi_Mode_slave | QSPI in "slave" mode.

Definition at line 161 of file IfxQspi.h.

◆ IfxQspi_PauseRunTransition

enum IfxQspi_PauseRunTransition

Request between pause and Run transition.

Enumerator
IfxQspi_PauseRunTransition_pause | Request value for pause.
IfxQspi_PauseRunTransition_run | Request value for Run.

Definition at line 170 of file IfxQspi.h.

◆ IfxQspi_Phase

enum IfxQspi_Phase

QSPI frame phase (STATUS.PHASE)

Enumerator
IfxQspi_Phase_wait | Frame wait phase.
IfxQspi_Phase_idleA | Frame idleA phase.
IfxQspi_Phase_idleB | frame idleB phase
IfxQspi_Phase_lead | Frame lead phase.
IfxQspi_Phase_data | Frame data phase.
IfxQspi_Phase_trail | Frame trail phase.
IfxQspi_Phase_expect | Frame expect phase.
IfxQspi_Phase_leadStrobe | Frame leadstrobe phase.
IfxQspi_Phase_trailStrobe | Frame trailstrobe phase.

Definition at line 178 of file IfxQspi.h.

◆ IfxQspi_PhaseTransitionEvent

enum IfxQspi_PhaseTransitionEvent

Phase Transition Event.

Enumerator
IfxQspi_PhaseTransitionEvent_endOfWait | BUSY (end of WAIT phase)
IfxQspi_PhaseTransitionEvent_serialClockPolarityChange | SCLKPC (serial clock polarity change)
IfxQspi_PhaseTransitionEvent_startOfFrame | SOF (Start Of Frame )
IfxQspi_PhaseTransitionEvent_transmitBufferEmptied | TBE (Transmit Buffer Emptied)
IfxQspi_PhaseTransitionEvent_receiveBufferFilled | RBF (Receive Buffer Filled)
IfxQspi_PhaseTransitionEvent_endOfFrame | EOF (End of Frame)
IfxQspi_PhaseTransitionEvent_dataNotAvailable | DNA (Data not Available = Start of Expect)
IfxQspi_PhaseTransitionEvent_endOfExpect | CONT (End of EXPECT phase)

Definition at line 193 of file IfxQspi.h.

◆ IfxQspi_Reset

enum IfxQspi_Reset

Reset Request (GLOBALCON.RESETS)

Enumerator
IfxQspi_Reset_none | No Reset.
IfxQspi_Reset_stateMachineAndFifo | State Machine, TXFIFO and RXFIFO reset, registers not reseted.
IfxQspi_Reset_kernel | Kernel / Module Reset.

Definition at line 207 of file IfxQspi.h.

◆ IfxQspi_RxFifoInt

enum IfxQspi_RxFifoInt

Receive Fifo Interrupt Threshold.

Enumerator
IfxQspi_RxFifoInt_0 | RxFifo Interrupt Threshold #0.
IfxQspi_RxFifoInt_1 | RxFifo Interrupt Threshold #1.
IfxQspi_RxFifoInt_2 | RxFifo Interrupt Threshold #2.
IfxQspi_RxFifoInt_3 | RxFifo Interrupt Threshold #3.

Definition at line 216 of file IfxQspi.h.

◆ IfxQspi_SleepMode

enum IfxQspi_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_QSPI.CLC.B.EDIS.

Enumerator
IfxQspi_SleepMode_enable | Sleep Mode enabled.
IfxQspi_SleepMode_disable | Sleep Mode disabled.

Definition at line 227 of file IfxQspi.h.

◆ IfxQspi_StrobeDelay

enum IfxQspi_StrobeDelay

STROBE delay for SLSO in delayed mode (GLOBALCON.STROBE)

Enumerator
IfxQspi_StrobeDelay_1 | SLSO delay 1 cycle(s)
IfxQspi_StrobeDelay_2 | SLSO delay 2 cycle(s)
IfxQspi_StrobeDelay_3 | SLSO delay 3 cycle(s)
IfxQspi_StrobeDelay_4 | SLSO delay 4 cycle(s)
IfxQspi_StrobeDelay_5 | SLSO delay 5 cycle(s)
IfxQspi_StrobeDelay_6 | SLSO delay 6 cycle(s)
IfxQspi_StrobeDelay_7 | SLSO delay 7 cycle(s)
IfxQspi_StrobeDelay_8 | SLSO delay 8 cycle(s)
IfxQspi_StrobeDelay_9 | SLSO delay 9 cycle(s)
IfxQspi_StrobeDelay_10 | SLSO delay 10 cycle(s)
IfxQspi_StrobeDelay_11 | SLSO delay 11 cycle(s)
IfxQspi_StrobeDelay_12 | SLSO delay 12 cycle(s)
IfxQspi_StrobeDelay_13 | SLSO delay 13 cycle(s)
IfxQspi_StrobeDelay_14 | SLSO delay 14 cycle(s)
IfxQspi_StrobeDelay_15 | SLSO delay 15 cycle(s)
IfxQspi_StrobeDelay_16 | SLSO delay 16 cycle(s)
IfxQspi_StrobeDelay_17 | SLSO delay 17 cycle(s)
IfxQspi_StrobeDelay_18 | SLSO delay 18 cycle(s)
IfxQspi_StrobeDelay_19 | SLSO delay 19 cycle(s)
IfxQspi_StrobeDelay_20 | SLSO delay 20 cycle(s)
IfxQspi_StrobeDelay_21 | SLSO delay 21 cycle(s)
IfxQspi_StrobeDelay_22 | SLSO delay 22 cycle(s)
IfxQspi_StrobeDelay_23 | SLSO delay 23 cycle(s)
IfxQspi_StrobeDelay_24 | SLSO delay 24 cycle(s)
IfxQspi_StrobeDelay_25 | SLSO delay 25 cycle(s)
IfxQspi_StrobeDelay_26 | SLSO delay 26 cycle(s)
IfxQspi_StrobeDelay_27 | SLSO delay 27 cycle(s)
IfxQspi_StrobeDelay_28 | SLSO delay 28 cycle(s)
IfxQspi_StrobeDelay_29 | SLSO delay 29 cycle(s)
IfxQspi_StrobeDelay_30 | SLSO delay 30 cycle(s)
IfxQspi_StrobeDelay_31 | SLSO delay 31 cycle(s)
IfxQspi_StrobeDelay_32 | SLSO delay 32 cycle(s)

Definition at line 235 of file IfxQspi.h.

◆ IfxQspi_TxFifoInt

enum IfxQspi_TxFifoInt

Transmit Fifo Interrupt Threshold.

Enumerator
IfxQspi_TxFifoInt_1 | TxFifo Interrupt Threshold #1.
IfxQspi_TxFifoInt_2 | TxFifo Interrupt Threshold #2.
IfxQspi_TxFifoInt_3 | TxFifo Interrupt Threshold #3.
IfxQspi_TxFifoInt_4 | TxFifo Interrupt Threshold #4.

Definition at line 273 of file IfxQspi.h.


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » QSPI » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxQspi_clearAllEventFlags (Ifx_QSPI *qspi)
Clear ALL service requests. More...
IFX_INLINE void | IfxQspi_clearRxReq (Ifx_QSPI *qspi)
Clear RX service requests. More...
IFX_INLINE void | IfxQspi_clearTxReq (Ifx_QSPI *qspi)
Clear TX service requests. More...
IFX_INLINE void | IfxQspi_configPT1Event (Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt1Config)
Configure PT1 event (also USR event depending if USREN=1 ) More...
IFX_INLINE void | IfxQspi_configPT2Event (Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt2Config)
Configure PT2 event. More...
IFX_INLINE void | IfxQspi_enableLoopbackMode (Ifx_QSPI *qspi, boolean enable)
Enable/Disable Loopback mode. More...
IFX_INLINE void | IfxQspi_enablePT1Event (Ifx_QSPI *qspi, boolean enable)
enable Phase Transition1 Event More...
IFX_INLINE void | IfxQspi_enablePT2Event (Ifx_QSPI *qspi, boolean enable)
enable Phase Transition2 Event More...
IFX_INLINE void | IfxQspi_enableUsrEvent (Ifx_QSPI *qspi, boolean enable)
enable User Event (Event selected by PT1) More...
IFX_INLINE uint16 | IfxQspi_getErrorFlags (Ifx_QSPI *qspi)
IFX_INLINE void | IfxQspi_pause (Ifx_QSPI *qspi)
Request for Module in Pause state no interrupts no communication. More...
IFX_INLINE uint32 | IfxQspi_readReceiveFifo (Ifx_QSPI *qspi)
Read the oldest data from RXFIFO. More...
IFX_INLINE void | IfxQspi_requestReset (Ifx_QSPI *qspi, IfxQspi_Reset reset)
Request reset (State Machine & FIFO / Register / Module) More...
IFX_INLINE void | IfxQspi_run (Ifx_QSPI *qspi)
Request for QSPI in Run state. More...
IFX_INLINE void | IfxQspi_setReceiveFifoInterrruptThreshold (Ifx_QSPI *qspi, IfxQspi_RxFifoInt rxFifoInt)
Set the threshold of RXFIFO for service request generation. More...
IFX_INLINE void | IfxQspi_writeTransmitFifo (Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register. More...
IFX_INLINE boolean | IfxQspi_isModuleSuspended (Ifx_QSPI *qspi)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxQspi_setSuspendMode (Ifx_QSPI *qspi, IfxQspi_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxQspi_read16 (Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_read32 (Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_read8 (Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_resetModule (Ifx_QSPI *qspi)
resets QSPI kernel More...
IFX_EXTERN void | IfxQspi_write16 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO. More...
IFX_EXTERN void | IfxQspi_write32 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO. More...
IFX_EXTERN void | IfxQspi_write8 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO. More...

Detailed Description

Function Documentation

◆ IfxQspi_clearAllEventFlags()

IFX_INLINE void IfxQspi_clearAllEventFlags ( Ifx_QSPI * qspi )

Clear ALL service requests.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 903 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_isrError(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_initModule(), IfxQspi_SpiSlave_isrError(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_clearRxReq()

IFX_INLINE void IfxQspi_clearRxReq ( Ifx_QSPI * qspi )

Clear RX service requests.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 909 of file IfxQspi.h.

◆ IfxQspi_clearTxReq()

IFX_INLINE void IfxQspi_clearTxReq ( Ifx_QSPI * qspi )

Clear TX service requests.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 915 of file IfxQspi.h.

◆ IfxQspi_configPT1Event()

IFX_INLINE void IfxQspi_configPT1Event | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_PhaseTransitionEvent | pt1Config
 | ) |  |

Configure PT1 event (also USR event depending if USREN=1 )

Parameters
qspi | Pointer to QSPI module registers
pt1Config | Phase Transition1 Event Config
Returns
None

Definition at line 921 of file IfxQspi.h.

◆ IfxQspi_configPT2Event()

IFX_INLINE void IfxQspi_configPT2Event | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_PhaseTransitionEvent | pt2Config
 | ) |  |

Configure PT2 event.

Parameters
qspi | Pointer to QSPI module registers
pt2Config | Phase Transition2 Event Config
Returns
None

Definition at line 927 of file IfxQspi.h.

◆ IfxQspi_enableLoopbackMode()

IFX_INLINE void IfxQspi_enableLoopbackMode | ( | Ifx_QSPI * | qspi,
 |  | boolean | enable
 | ) |  |

Enable/Disable Loopback mode.

Parameters
qspi | Pointer to QSPI module registers
enable | Enable / Disable loopback
Returns
None

Definition at line 933 of file IfxQspi.h.

◆ IfxQspi_enablePT1Event()

IFX_INLINE void IfxQspi_enablePT1Event | ( | Ifx_QSPI * | qspi,
 |  | boolean | enable
 | ) |  |

enable Phase Transition1 Event

Parameters
qspi | Pointer to QSPI module registers
enable | Enable (1) / Disable (0)
Returns
None

Definition at line 941 of file IfxQspi.h.

◆ IfxQspi_enablePT2Event()

IFX_INLINE void IfxQspi_enablePT2Event | ( | Ifx_QSPI * | qspi,
 |  | boolean | enable
 | ) |  |

enable Phase Transition2 Event

Parameters
qspi | Pointer to QSPI module registers
enable | Enable (1) / Disable (0)
Returns
None

Definition at line 947 of file IfxQspi.h.

◆ IfxQspi_enableUsrEvent()

IFX_INLINE void IfxQspi_enableUsrEvent | ( | Ifx_QSPI * | qspi,
 |  | boolean | enable
 | ) |  |

enable User Event (Event selected by PT1)

Parameters
qspi | Pointer to QSPI module registers
enable | Enable (1) / Disable (0)
Returns
None

Definition at line 953 of file IfxQspi.h.

◆ IfxQspi_getErrorFlags()

IFX_INLINE uint16 IfxQspi_getErrorFlags ( Ifx_QSPI * qspi )
Parameters
qspi Pointer to QSPI module registers
Returns
Error Flags

Definition at line 959 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_isrError(), and IfxQspi_SpiSlave_isrError().

◆ IfxQspi_isModuleSuspended()

IFX_INLINE boolean IfxQspi_isModuleSuspended ( Ifx_QSPI * qspi )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
qspi Pointer to QSPI module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 1248 of file IfxQspi.h.

◆ IfxQspi_pause()

IFX_INLINE void IfxQspi_pause ( Ifx_QSPI * qspi )

Request for Module in Pause state no interrupts no communication.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 1099 of file IfxQspi.h.

◆ IfxQspi_read16()

IFX_EXTERN void IfxQspi_read16 | ( | Ifx_QSPI * | qspi,
 |  | uint16 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Reads 16bit data from the Rx FIFO.

Parameters
qspi | Pointer to QSPI module registers
data | Received data will be copied into this array
count | Number of items to be received
Returns
None

Definition at line 313 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_read(), and IfxQspi_SpiSlave_read().

◆ IfxQspi_read32()

IFX_EXTERN void IfxQspi_read32 | ( | Ifx_QSPI * | qspi,
 |  | uint32 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Reads 32bit data from the Rx FIFO.

Parameters
qspi | Pointer to QSPI module registers
data | Received data will be copied into this array
count | Number of items to be received
Returns
None

Definition at line 325 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_read(), and IfxQspi_SpiSlave_read().

◆ IfxQspi_read8()

IFX_EXTERN void IfxQspi_read8 | ( | Ifx_QSPI * | qspi,
 |  | uint8 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Reads 8bit data from the Rx FIFO.

Parameters
qspi | Pointer to QSPI module registers
data | Received data will be copied into this array
count | Number of items to be received
Returns
None

Definition at line 337 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_read(), and IfxQspi_SpiSlave_read().

◆ IfxQspi_readReceiveFifo()

IFX_INLINE uint32 IfxQspi_readReceiveFifo ( Ifx_QSPI * qspi )

Read the oldest data from RXFIFO.

Parameters
qspi Pointer to QSPI module registers

Definition at line 1115 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_read(), IfxQspi_SpiMaster_readReceiveFifo(), IfxQspi_SpiSlave_read(), and IfxQspi_SpiSlave_readReceiveFifo().

◆ IfxQspi_requestReset()

IFX_INLINE void IfxQspi_requestReset | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_Reset | reset
 | ) |  |

Request reset (State Machine & FIFO / Register / Module)

Parameters
qspi | Pointer to QSPI module registers
reset | reset type (GLOBALCON.RESETS)
Returns
None

Definition at line 1121 of file IfxQspi.h.

◆ IfxQspi_resetModule()

IFX_EXTERN void IfxQspi_resetModule ( Ifx_QSPI * qspi )

resets QSPI kernel

Parameters
qspi pointer to QSPI registers
Returns
None

Definition at line 365 of file IfxQspi.c.

◆ IfxQspi_run()

IFX_INLINE void IfxQspi_run ( Ifx_QSPI * qspi )

Request for QSPI in Run state.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 1127 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_setReceiveFifoInterrruptThreshold()

IFX_INLINE void IfxQspi_setReceiveFifoInterrruptThreshold | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_RxFifoInt | rxFifoInt
 | ) |  |

Set the threshold of RXFIFO for service request generation.

Parameters
qspi | Pointer to QSPI module registers
rxFifoInt | RxFIFO Interrupt threshold to set
Returns
None

Definition at line 1166 of file IfxQspi.h.

◆ IfxQspi_setSuspendMode()

IFX_INLINE void IfxQspi_setSuspendMode | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
qspi | Pointer to QSPI module registers
mode | Module suspend mode
Returns
None

Definition at line 1260 of file IfxQspi.h.

◆ IfxQspi_write16()

IFX_EXTERN void IfxQspi_write16 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint16 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Writes 16bit data into the Tx FIFO.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
data | Array of data to be sent
count | Number of items to be sent
Returns
None

Definition at line 412 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_write32()

IFX_EXTERN void IfxQspi_write32 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint32 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Writes 32bit data into the Tx FIFO.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
data | Array of data to be sent
count | Number of items to be sent
Returns
None

Definition at line 425 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_write8()

IFX_EXTERN void IfxQspi_write8 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint8 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Writes 8bit data into the Tx FIFO.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
data | Array of data to be sent
count | Number of items to be sent
Returns
None

Definition at line 438 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_writeTransmitFifo()

IFX_INLINE void IfxQspi_writeTransmitFifo | ( | Ifx_QSPI * | qspi,
 |  | uint32 | data
 | ) |  |

Write Data into DATAENTRY register.

Parameters
qspi | Pointer to QSPI module registers
data | Data to be entered into TxFIFO
Returns
None

Definition at line 1242 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeTransmitFifo(), IfxQspi_SpiSlave_write(), and IfxQspi_SpiSlave_writeTransmitFifo().


iLLD_TC26B: Support Functions

Functions
Support Functions
iLLD » QSPI » Standard Driver
Collaboration diagram for Support Functions:

Functions

IFX_INLINE IfxQspi_Mode | IfxQspi_getMode (Ifx_QSPI *qspi)
Gets the current mode of QSPI. More...
IFX_INLINE float | IfxQspi_getModuleFrequency (Ifx_QSPI *qspi)
Specifies function to get module frequency. More...
IFX_INLINE IfxQspi_Phase | IfxQspi_getPhase (Ifx_QSPI *qspi)
Gets actual transmission phase. More...
IFX_INLINE uint8 | IfxQspi_getReceiveFifoLevel (Ifx_QSPI *qspi)
Gets the filling level of RXFIFO. More...
IFX_INLINE float | IfxQspi_getTimeQuantaFrequency (Ifx_QSPI *qspi)
Gets Time Quanta frequency. More...
IFX_INLINE uint8 | IfxQspi_getTransmitFifoLevel (Ifx_QSPI *qspi)
Gets the filling level of TXFIFO. More...
IFX_INLINE boolean | IfxQspi_isModuleEnabled (Ifx_QSPI *qspi)
Specifies the Module enable or disable status. More...
IFX_INLINE void | IfxQspi_setDisableModuleRequest (Ifx_QSPI *qspi)
Sets the disable module request. More...
IFX_INLINE void | IfxQspi_setEnableModuleRequest (Ifx_QSPI *qspi)
Sets the enable module request. More...
IFX_INLINE void | IfxQspi_setSleepMode (Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
Sets the disable module request. More...
IFX_INLINE void | IfxQspi_setTransmitFifoInterrruptThreshold (Ifx_QSPI *qspi, IfxQspi_TxFifoInt txFifoInt)
Set the threshold of TXFIFO for service request generation. More...
IFX_INLINE void | IfxQspi_writeBasicConfiguration (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register. More...
IFX_INLINE void | IfxQspi_writeBasicConfigurationBeginStream (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 0. More...
IFX_INLINE void | IfxQspi_writeBasicConfigurationEndStream (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 1. More...
IFX_INLINE void | IfxQspi_writeExtendedConfiguration (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal)
Writes channel timing configuration into ECON register. More...
IFX_INLINE void | IfxQspi_writeMixedDataTransmitFifo (Ifx_QSPI *qspi, uint32 mixEntryVal)
Writes Data and Configuration into MIXEDENTRY register. More...
IFX_EXTERN float | IfxQspi_calcRealBaudrate (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel. More...
IFX_EXTERN uint32 | IfxQspi_calculateBasicConfigurationValue (Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values. More...
IFX_EXTERN uint32 | IfxQspi_calculateExtendedConfigurationValue (Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values. More...
IFX_EXTERN uint32 | IfxQspi_calculatePrescaler (Ifx_QSPI *qspi, float baudrate)
Function to calculate prescaler. More...
IFX_EXTERN uint32 | IfxQspi_calculateTimeQuantumLength (Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length. More...
IFX_EXTERN Ifx_QSPI * | IfxQspi_getAddress (IfxQspi_Index qspi)
IFX_EXTERN IfxQspi_Index | IfxQspi_getIndex (Ifx_QSPI *qspi)
Specifies the function to get Index. More...
IFX_EXTERN uint32 | IfxQspi_recalcBasicConfiguration (uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
Re-calculated BACON from the oldBACON. More...
IFX_EXTERN void | IfxQspi_setSlaveSelectOutputControl (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
Configures a Slave Select Output. More...
IFX_EXTERN void | IfxQspi_calculateDelayConstants (const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
Calculates the Delay constants (pre and delay) from the user specified CS delays. More...

Detailed Description

Function Documentation

◆ IfxQspi_calcRealBaudrate()

IFX_EXTERN float IfxQspi_calcRealBaudrate | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId
 | ) |  |

Function to calculate baudrate of specified channel.

Parameters
qspi | Pointer to QSPI module registers
channelId | QSPI channel number
Returns
Actual baudrate in float

Definition at line 54 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_getChannelConfig(), IfxQspi_SpiMaster_initChannel(), and IfxQspi_SpiMaster_setChannelBaudrate().

◆ IfxQspi_calculateBasicConfigurationValue()

IFX_EXTERN uint32 IfxQspi_calculateBasicConfigurationValue | ( | Ifx_QSPI * | qspi,
 |  | const IfxQspi_ChannelId | channelId,
 |  | const SpiIf_ChMode * | chMode,
 |  | const float | baudrate
 | ) |  |

Function to calculate BACON register values.

Parameters
qspi | Pointer to QSPI module registers
channelId | QSPI Channel Number
chMode | Frame configuration
baudrate | The desired baudrate
Returns
Calculated BACON value

Definition at line 67 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_setChannelBaudrate(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_calculateDelayConstants()

IFX_EXTERN void IfxQspi_calculateDelayConstants | ( | const Ifx_QSPI * | qspi,
 |  | const IfxQspi_ChannelId | channelId,
 |  | const SpiIf_ChMode * | chMode,
 |  | IfxQspi_DelayConst * | delayConst
 | ) |  |

Calculates the Delay constants (pre and delay) from the user specified CS delays.

Parameters
qspi | pointer to QSPI SFR
channelId | Channel ID no.
chMode | Pointer to Channel Mode
delayConst | Pointer to the Delay Consant Array
Returns
None

Definition at line 451 of file IfxQspi.c.

Referenced by IfxQspi_calculateBasicConfigurationValue().

◆ IfxQspi_calculateExtendedConfigurationValue()

IFX_EXTERN uint32 IfxQspi_calculateExtendedConfigurationValue | ( | Ifx_QSPI * | qspi,
 |  | const uint8 | cs,
 |  | const SpiIf_ChConfig * | chConfig
 | ) |  |

Function to calculate ECON register values.

Parameters
qspi | Pointer to QSPI module registers
cs | QSPI channel Number : 8->0,9->1,.......
chConfig | SPI Channel Configuration
Returns
Calculated ECON[CS] value

Definition at line 96 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_setChannelBaudrate(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_calculatePrescaler()

IFX_EXTERN uint32 IfxQspi_calculatePrescaler | ( | Ifx_QSPI * | qspi,
 |  | float | baudrate
 | ) |  |

Function to calculate prescaler.

Parameters
qspi | Pointer to QSPI module registers
baudrate | Maximum baudrate in Float
Returns
Prescaler in integer

Definition at line 209 of file IfxQspi.c.

◆ IfxQspi_calculateTimeQuantumLength()

IFX_EXTERN uint32 IfxQspi_calculateTimeQuantumLength | ( | Ifx_QSPI * | qspi,
 |  | float | maxBaudrate
 | ) |  |

Specifies the function to calculate Time quantum length.

Parameters
qspi | Pointer to QSPI module registers
maxBaudrate | Maximum baudrate in Float
Returns
Time quantum length in integer

Definition at line 233 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_getAddress()

IFX_EXTERN Ifx_QSPI* IfxQspi_getAddress ( IfxQspi_Index qspi )
Parameters
qspi Pointer to QSPI module registers
Returns
QSPI module register address

Definition at line 276 of file IfxQspi.c.

◆ IfxQspi_getIndex()

IFX_EXTERN IfxQspi_Index IfxQspi_getIndex ( Ifx_QSPI * qspi )

Specifies the function to get Index.

Parameters
qspi Pointer to QSPI module registers
Returns
Index in Integer

Definition at line 293 of file IfxQspi.c.

Referenced by IfxQspi_getErrorSrc(), IfxQspi_getReceiveSrc(), and IfxQspi_getTransmitSrc().

◆ IfxQspi_getMode()

IFX_INLINE IfxQspi_Mode IfxQspi_getMode ( Ifx_QSPI * qspi )

Gets the current mode of QSPI.

Parameters
qspi Pointer to QSPI module registers
Returns
The current mode

Definition at line 972 of file IfxQspi.h.

◆ IfxQspi_getModuleFrequency()

IFX_INLINE float IfxQspi_getModuleFrequency ( Ifx_QSPI * qspi )

Specifies function to get module frequency.

Parameters
qspi Pointer to QSPI module registers
Returns
Module frequency in Float value

Definition at line 978 of file IfxQspi.h.

Referenced by IfxQspi_calculatePrescaler(), and IfxQspi_getTimeQuantaFrequency().

◆ IfxQspi_getPhase()

IFX_INLINE IfxQspi_Phase IfxQspi_getPhase ( Ifx_QSPI * qspi )

Gets actual transmission phase.

Parameters
qspi Pointer to QSPI module registers
Returns
Actual transmission phase

Definition at line 986 of file IfxQspi.h.

Referenced by IfxQspi_pause().

◆ IfxQspi_getReceiveFifoLevel()

IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel ( Ifx_QSPI * qspi )

Gets the filling level of RXFIFO.

Parameters
qspi Pointer to QSPI module registers
Returns
RxFIFO level

Definition at line 992 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_read(), and IfxQspi_SpiSlave_read().

◆ IfxQspi_getTimeQuantaFrequency()

IFX_INLINE float IfxQspi_getTimeQuantaFrequency ( Ifx_QSPI * qspi )

Gets Time Quanta frequency.

Parameters
qspi Pointer to QSPI module registers
Returns
TQ frequency in float

Definition at line 1011 of file IfxQspi.h.

Referenced by IfxQspi_calculateExtendedConfigurationValue().

◆ IfxQspi_getTransmitFifoLevel()

IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel ( Ifx_QSPI * qspi )

Gets the filling level of TXFIFO.

Parameters
qspi Pointer to QSPI module registers
Returns
TxFIFO level

Definition at line 1017 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_isModuleEnabled()

IFX_INLINE boolean IfxQspi_isModuleEnabled ( Ifx_QSPI * qspi )

Specifies the Module enable or disable status.

Parameters
qspi Pointer to QSPI module registers
Returns
TRUE if module is enabled otherwise FALSE

Definition at line 1093 of file IfxQspi.h.

◆ IfxQspi_recalcBasicConfiguration()

IFX_EXTERN uint32 IfxQspi_recalcBasicConfiguration | ( | uint32 | oldBACON,
 |  | Ifx_SizeT | numOfData,
 |  | boolean | shortData,
 |  | boolean | lastData
 | ) |  |

Re-calculated BACON from the oldBACON.

Parameters
oldBACON | Old BACON value
numOfData | numOfData in LONG or CONTINUOUS mode
shortData | Specifies SHORT mode (TRUE) or other modes (FALSE)
lastData | Specifies last data in LONG or CONTINUOUS
Returns
Re-calculated BACON

Definition at line 349 of file IfxQspi.c.

◆ IfxQspi_setDisableModuleRequest()

IFX_INLINE void IfxQspi_setDisableModuleRequest ( Ifx_QSPI * qspi )

Sets the disable module request.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 1154 of file IfxQspi.h.

◆ IfxQspi_setEnableModuleRequest()

IFX_INLINE void IfxQspi_setEnableModuleRequest ( Ifx_QSPI * qspi )

Sets the enable module request.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 1160 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_setSlaveSelectOutputControl()

IFX_EXTERN void IfxQspi_setSlaveSelectOutputControl | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | boolean | outputEnable,
 |  | boolean | activeLevel
 | ) |  |

Configures a Slave Select Output.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
outputEnable | chip select output will be enabled during transaction
activeLevel | TRUE: active-high, FALSE: active-low
Returns
None

Definition at line 383 of file IfxQspi.c.

◆ IfxQspi_setSleepMode()

IFX_INLINE void IfxQspi_setSleepMode | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_SleepMode | mode
 | ) |  |

Sets the disable module request.

Parameters
qspi | Pointer to QSPI module registers
mode | Sleep mode selection
Returns
None

Definition at line 1178 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_setTransmitFifoInterrruptThreshold()

IFX_INLINE void IfxQspi_setTransmitFifoInterrruptThreshold | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_TxFifoInt | txFifoInt
 | ) |  |

Set the threshold of TXFIFO for service request generation.

Parameters
qspi | Pointer to QSPI module registers
txFifoInt | TxFifo Interrupt threshold to set
Returns
None

Definition at line 1191 of file IfxQspi.h.

◆ IfxQspi_writeBasicConfiguration()

IFX_INLINE void IfxQspi_writeBasicConfiguration | ( | Ifx_QSPI * | qspi,
 |  | uint32 | baconVal
 | ) |  |

Write configuration into BACON register.

Parameters
qspi | Pointer to QSPI module registers
baconVal | baconVal Value to be entered in BACON register
Returns
None

Definition at line 1203 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_writeBasicConfiguration().

◆ IfxQspi_writeBasicConfigurationBeginStream()

IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream | ( | Ifx_QSPI * | qspi,
 |  | uint32 | baconVal
 | ) |  |

Write configuration into BACON register with .LAST flag set to 0.

Parameters
qspi | Pointer to QSPI module registers
baconVal | baconVal Value to be entered in BACON register
Returns
None

Definition at line 1209 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_writeBasicConfigurationEndStream()

IFX_INLINE void IfxQspi_writeBasicConfigurationEndStream | ( | Ifx_QSPI * | qspi,
 |  | uint32 | baconVal
 | ) |  |

Write configuration into BACON register with .LAST flag set to 1.

Parameters
qspi | Pointer to QSPI module registers
baconVal | baconVal Value to be entered in BACON register
Returns
None

Definition at line 1219 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_isrDmaTransmit(), and IfxQspi_SpiMaster_write().

◆ IfxQspi_writeExtendedConfiguration()

IFX_INLINE void IfxQspi_writeExtendedConfiguration | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint32 | econVal
 | ) |  |

Writes channel timing configuration into ECON register.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
econVal | Extended configuration value
Returns
None

Definition at line 1229 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_writeExtendedConfiguration().

◆ IfxQspi_writeMixedDataTransmitFifo()

IFX_INLINE void IfxQspi_writeMixedDataTransmitFifo | ( | Ifx_QSPI * | qspi,
 |  | uint32 | mixEntryVal
 | ) |  |

Writes Data and Configuration into MIXEDENTRY register.

Parameters
qspi | Pointer to QSPI module registers
mixEntryVal | Data and configuration in mixed
Returns
None

Definition at line 1236 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_writeMixedDataConfiguration().


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » QSPI » Standard Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getErrorSrc (Ifx_QSPI *qspi)
Gets the Error request value. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getReceiveSrc (Ifx_QSPI *qspi)
Gets the RXFIFO service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getTransmitSrc (Ifx_QSPI *qspi)
Gets the TXFIFO service request. More...

Detailed Description

Function Documentation

◆ IfxQspi_getErrorSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getErrorSrc ( Ifx_QSPI * qspi )

Gets the Error request value.

Parameters
qspi Pointer to QSPI module registers
Returns
Error request value

Definition at line 965 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_initModule(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_getReceiveSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getReceiveSrc ( Ifx_QSPI * qspi )

Gets the RXFIFO service request.

Parameters
qspi Pointer to QSPI module registers
Returns
Receive service request value

Definition at line 998 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_initModule(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_getTransmitSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getTransmitSrc ( Ifx_QSPI * qspi )

Gets the TXFIFO service request.

Parameters
qspi Pointer to QSPI module registers
Returns
Transmission service request value

Definition at line 1023 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_initModule(), and IfxQspi_SpiSlave_write().


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » QSPI » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxQspi_initMrstInPin (const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode)
Initializes a MRST input. More...
IFX_INLINE void | IfxQspi_initMrstOutPin (const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver)
Initializes a MRST output. More...
IFX_INLINE void | IfxQspi_initMtsrInPin (const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode)
Initializes a MTSR input. More...
IFX_INLINE void | IfxQspi_initMtsrOutPin (const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver)
Initializes a MTSR output. More...
IFX_INLINE void | IfxQspi_initSclkInPin (const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode)
Initializes a SCLK input. More...
IFX_INLINE void | IfxQspi_initSclkOutPin (const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output. More...
IFX_INLINE void | IfxQspi_initSlsi (const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode)
Initializes a SLSI input. More...
IFX_INLINE void | IfxQspi_initSlso (const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex)
Initializes a SLSO output. More...

Detailed Description

Function Documentation

◆ IfxQspi_initMrstInPin()

IFX_INLINE void IfxQspi_initMrstInPin | ( | const IfxQspi_Mrst_In * | mrstIn,
 |  | IfxPort_InputMode | mrstInMode
 | ) |  |

Initializes a MRST input.

Parameters
mrstIn | the MRST Pin which should be configured
mrstInMode | the pin input mode which should be configured
Returns
None

Definition at line 1036 of file IfxQspi.h.

◆ IfxQspi_initMrstOutPin()

IFX_INLINE void IfxQspi_initMrstOutPin | ( | const IfxQspi_Mrst_Out * | mrstOut,
 |  | IfxPort_OutputMode | mrstOutMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a MRST output.

Parameters
mrstOut | the MRST Pin which should be configured
mrstOutMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1043 of file IfxQspi.h.

Referenced by IfxQspi_SpiSlave_initModule().

◆ IfxQspi_initMtsrInPin()

IFX_INLINE void IfxQspi_initMtsrInPin | ( | const IfxQspi_Mtsr_In * | mtsrIn,
 |  | IfxPort_InputMode | mtsrInMode
 | ) |  |

Initializes a MTSR input.

Parameters
mtsrIn | the MTSR Pin which should be configured
mtsrInMode | the pin input mode which should be configured
Returns
None

Definition at line 1050 of file IfxQspi.h.

◆ IfxQspi_initMtsrOutPin()

IFX_INLINE void IfxQspi_initMtsrOutPin | ( | const IfxQspi_Mtsr_Out * | mtsrOut,
 |  | IfxPort_OutputMode | mtsrOutMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a MTSR output.

Parameters
mtsrOut | the MTSR Pin which should be configured
mtsrOutMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1057 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_initSclkInPin()

IFX_INLINE void IfxQspi_initSclkInPin | ( | const IfxQspi_Sclk_In * | sclkIn,
 |  | IfxPort_InputMode | sclkInMode
 | ) |  |

Initializes a SCLK input.

Parameters
sclkIn | the SCLK Pin which should be configured
sclkInMode | the pin input mode which should be configured
Returns
None

Definition at line 1064 of file IfxQspi.h.

◆ IfxQspi_initSclkOutPin()

IFX_INLINE void IfxQspi_initSclkOutPin | ( | const IfxQspi_Sclk_Out * | sclkOut,
 |  | IfxPort_OutputMode | sclkOutMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SCLK output.

Parameters
sclkOut | the SCLK Pin which should be configured
sclkOutMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1071 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_initSlsi()

IFX_INLINE void IfxQspi_initSlsi | ( | const IfxQspi_Slsi_In * | slsi,
 |  | IfxPort_InputMode | slsiMode
 | ) |  |

Initializes a SLSI input.

Parameters
slsi | the SLSI Pin which should be configured
slsiMode | the pin input mode which should be configured
Returns
None

Definition at line 1078 of file IfxQspi.h.

◆ IfxQspi_initSlso()

IFX_INLINE void IfxQspi_initSlso | ( | const IfxQspi_Slso_Out * | slso,
 |  | IfxPort_OutputMode | slsoMode,
 |  | IfxPort_PadDriver | padDriver,
 |  | IfxPort_OutputIdx | outIndex
 | ) |  |

Initializes a SLSO output.

Parameters
slso | the SLSO Pin which should be configured
slsoMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
outIndex | Pin Pad driver index
Returns
None

Definition at line 1086 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initChannel().


iLLD_TC26B: QSPI Pin Mapping

Data Structures | Macros | Variables
QSPI Pin Mapping
iLLD » QSPI
Collaboration diagram for QSPI Pin Mapping:

Data Structures

struct | IfxQspi_Mrst_In
MRST pin mapping structure. More...
struct | IfxQspi_Mtsr_In
MTSR pin mapping structure. More...
struct | IfxQspi_Sclk_In
SCLK pin mapping structure. More...
struct | IfxQspi_Slsi_In
SLSI pin mapping structure. More...
struct | IfxQspi_Hsicin_In
HSICIN pin mapping structure. More...
struct | IfxQspi_Mrst_Out
MRST pin mapping structure. More...
struct | IfxQspi_Mtsr_Out
MTSR pin mapping structure. More...
struct | IfxQspi_Sclk_Out
SCLK pin mapping structure. More...
struct | IfxQspi_Slso_Out
SLSO pin mapping structure. More...

Macros

#define | IFXQSPI_PINMAP_NUM_MODULES 4
Table dimensions. More...
#define | IFXQSPI_PINMAP_NUM_SLAVESELECTS 14
#define | IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS 2
#define | IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS 6
#define | IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS 4
#define | IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS 5
#define | IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS 6
#define | IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS 5
#define | IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS 6
#define | IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS 4
#define | IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN
QSPI2_HSICINA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN
QSPI2_HSICINB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN
QSPI3_HSICINA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN
QSPI3_HSICINB: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN
QSPI0_MRSTA: QSPI0 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN
QSPI1_MRSTA: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN
QSPI1_MRSTB: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN
QSPI2_MRSTA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN
QSPI2_MRSTB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN
QSPI2_MRSTCN: QSPI2 input (LVDS) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN
QSPI2_MRSTCP: QSPI2 input (LVDS) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN
QSPI2_MRSTE: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN
QSPI3_MRSTA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN
QSPI3_MRSTB: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN
QSPI3_MRSTD: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN
QSPI3_MRSTE: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN
QSPI3_MRSTFN: QSPI3 input (LVDS) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN
QSPI3_MRSTFP: QSPI3 input (LVDS) More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT
QSPI0_MRST: QSPI0 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT
QSPI1_MRST: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT
QSPI1_MRST: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT
QSPI1_MRST: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT
QSPI2_MRST: QSPI2 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT
QSPI2_MRST: QSPI2 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT
QSPI3_MRST: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT
QSPI3_MRST: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT
QSPI3_MRST: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT
QSPI3_MRST: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN
QSPI0_MTSRA: QSPI0 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN
QSPI1_MTSRA: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN
QSPI1_MTSRB: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN
QSPI1_MTSRC: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN
QSPI2_MTSRA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN
QSPI2_MTSRB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN
QSPI3_MTSRA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN
QSPI3_MTSRB: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN
QSPI3_MTSRD: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN
QSPI3_MTSRE: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT
QSPI0_MTSR: QSPI0 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT
QSPI0_MTSR: QSPI0 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT
QSPI1_MTSR: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT
QSPI1_MTSR: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT
QSPI1_MTSR: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT
QSPI1_MTSR: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT
QSPI2_MTSRN: QSPI2 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT
QSPI2_MTSRP: QSPI2 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT
QSPI2_MTSR: QSPI2 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT
QSPI2_MTSR: QSPI2 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT
QSPI3_MTSRN: QSPI3 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT
QSPI3_MTSRP: QSPI3 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT
QSPI3_MTSR: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT
QSPI3_MTSR: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT
QSPI3_MTSR: QSPI3 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT
QSPI3_MTSR: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN
QSPI0_SCLKA: QSPI0 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN
QSPI1_SCLKA: QSPI1 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN
QSPI1_SCLKB: QSPI1 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN
QSPI2_SCLKA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN
QSPI2_SCLKB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN
QSPI3_SCLKA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN
QSPI3_SCLKB: QSPI3 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN
QSPI3_SCLKD: QSPI3 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN
QSPI3_SCLKE: QSPI3 input. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT
QSPI0_SCLK: QSPI0 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT
QSPI0_SCLK: QSPI0 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT
QSPI1_SCLK: QSPI1 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT
QSPI1_SCLK: QSPI1 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT
QSPI2_SCLKN: QSPI2 output (LVDS) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT
QSPI2_SCLKP: QSPI2 output (LVDS) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT
QSPI2_SCLK: QSPI2 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT
QSPI2_SCLK: QSPI2 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT
QSPI2_SCLK: QSPI2 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT
QSPI3_SCLKN: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT
QSPI3_SCLKP: QSPI3 output (LVDS) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT
QSPI3_SCLK: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT
QSPI3_SCLK: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT
QSPI3_SCLK: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT
QSPI3_SCLK: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN
QSPI0_SLSIA: QSPI0 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN
QSPI0_SLSIB: QSPI0 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN
QSPI1_SLSIA: QSPI1 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN
QSPI2_SLSIA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN
QSPI2_SLSIB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN
QSPI3_SLSIA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN
QSPI3_SLSIC: QSPI3 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN
QSPI3_SLSID: QSPI3 input. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT
QSPI0_SLSO0: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT
QSPI0_SLSO13: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT
QSPI0_SLSO1: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT
QSPI0_SLSO2: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT
QSPI0_SLSO3: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT
QSPI0_SLSO4: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT
QSPI0_SLSO5: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT
QSPI0_SLSO6: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT
QSPI0_SLSO7: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT
QSPI0_SLSO8: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT
QSPI0_SLSO9: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT
QSPI1_SLSO0: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT
QSPI1_SLSO10: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT
QSPI1_SLSO1: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT
QSPI1_SLSO2: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT
QSPI1_SLSO3: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT
QSPI1_SLSO4: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT
QSPI1_SLSO5: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT
QSPI1_SLSO6: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT
QSPI1_SLSO7: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT
QSPI1_SLSO8: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT
QSPI1_SLSO9: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT
QSPI2_SLSO0: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT
QSPI2_SLSO1: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT
QSPI2_SLSO2: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT
QSPI2_SLSO3: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT
QSPI2_SLSO4: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT
QSPI2_SLSO5: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT
QSPI2_SLSO6: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT
QSPI2_SLSO7: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT
QSPI2_SLSO8: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT
QSPI2_SLSO9: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT
QSPI3_SLSO0: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT
QSPI3_SLSO11: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT
QSPI3_SLSO12: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT
QSPI3_SLSO13: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT
QSPI3_SLSO1: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT
QSPI3_SLSO1: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT
QSPI3_SLSO2: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT
QSPI3_SLSO2: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT
QSPI3_SLSO3: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT
QSPI3_SLSO4: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT
QSPI3_SLSO4: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT
QSPI3_SLSO5: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT
QSPI3_SLSO5: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT
QSPI3_SLSO6: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT
QSPI3_SLSO7: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT
QSPI3_SLSO7: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT
QSPI3_SLSO8: QSPI3 output. More...
IFX_EXTERN const IfxQspi_Hsicin_In * | IfxQspi_Hsicin_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS]
IfxQspi_Hsicin_In table. More...
IFX_EXTERN const IfxQspi_Mrst_In * | IfxQspi_Mrst_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]
IfxQspi_Mrst_In table. More...
IFX_EXTERN const IfxQspi_Mrst_Out * | IfxQspi_Mrst_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
IfxQspi_Mrst_Out table. More...
IFX_EXTERN const IfxQspi_Mtsr_In * | IfxQspi_Mtsr_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]
IfxQspi_Mtsr_In table. More...
IFX_EXTERN const IfxQspi_Mtsr_Out * | IfxQspi_Mtsr_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]
IfxQspi_Mtsr_Out table. More...
IFX_EXTERN const IfxQspi_Sclk_In * | IfxQspi_Sclk_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]
IfxQspi_Sclk_In table. More...
IFX_EXTERN const IfxQspi_Sclk_Out * | IfxQspi_Sclk_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxQspi_Sclk_Out table. More...
IFX_EXTERN const IfxQspi_Slsi_In * | IfxQspi_Slsi_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
IfxQspi_Slsi_In table. More...
IFX_EXTERN const IfxQspi_Slso_Out * | IfxQspi_Slso_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxQspi_Slso_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxQspi_Mrst_In

struct IfxQspi_Mrst_In

MRST pin mapping structure.

Definition at line 56 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Mrst_In:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxQspi_Mtsr_In

struct IfxQspi_Mtsr_In

MTSR pin mapping structure.

Definition at line 64 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Mtsr_In:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxQspi_Sclk_In

struct IfxQspi_Sclk_In

SCLK pin mapping structure.

Definition at line 72 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Sclk_In:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxQspi_Slsi_In

struct IfxQspi_Slsi_In

SLSI pin mapping structure.

Definition at line 80 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Slsi_In:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxQspi_Hsicin_In

struct IfxQspi_Hsicin_In

HSICIN pin mapping structure.

Definition at line 88 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Hsicin_In:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxQspi_Mrst_Out

struct IfxQspi_Mrst_Out

MRST pin mapping structure.

Definition at line 96 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Mrst_Out:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxQspi_Mtsr_Out

struct IfxQspi_Mtsr_Out

MTSR pin mapping structure.

Definition at line 104 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Mtsr_Out:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxQspi_Sclk_Out

struct IfxQspi_Sclk_Out

SCLK pin mapping structure.

Definition at line 112 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Sclk_Out:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxQspi_Slso_Out

struct IfxQspi_Slso_Out

SLSO pin mapping structure.

Definition at line 120 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Slso_Out:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.
sint32 | slsoNr | Slave Select.

Macro Definition Documentation

◆ IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS

#define IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS 2

Definition at line 267 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS

#define IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS 6

Definition at line 268 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS

#define IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS 4

Definition at line 269 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS

#define IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS 5

Definition at line 270 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS

#define IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS 6

Definition at line 271 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_NUM_MODULES

#define IFXQSPI_PINMAP_NUM_MODULES 4

Table dimensions.

Definition at line 265 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_NUM_SLAVESELECTS

#define IFXQSPI_PINMAP_NUM_SLAVESELECTS 14

Definition at line 266 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS

#define IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS 5

Definition at line 272 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS

#define IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS 6

Definition at line 273 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS

#define IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS 4

Definition at line 274 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS

#define IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS 2

Definition at line 275 of file IfxQspi_PinMap.h.

Variable Documentation

◆ IfxQspi0_MRST_P20_12_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT

QSPI0_MRST: QSPI0 output.

Definition at line 146 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MRSTA_P20_12_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN

QSPI0_MRSTA: QSPI0 input.

Definition at line 132 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MTSR_P20_12_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT

QSPI0_MTSR: QSPI0 output.

Definition at line 166 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MTSR_P20_14_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT

QSPI0_MTSR: QSPI0 output.

Definition at line 167 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MTSRA_P20_14_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN

QSPI0_MTSRA: QSPI0 input.

Definition at line 156 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SCLK_P20_11_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT

QSPI0_SCLK: QSPI0 output.

Definition at line 191 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SCLK_P20_13_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT

QSPI0_SCLK: QSPI0 output.

Definition at line 192 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SCLKA_P20_11_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN

QSPI0_SCLKA: QSPI0 input.

Definition at line 182 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSIA_P20_13_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN

QSPI0_SLSIA: QSPI0 input.

Definition at line 206 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSIB_P20_9_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN

QSPI0_SLSIB: QSPI0 input.

Definition at line 207 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO0_P20_8_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT

QSPI0_SLSO0: QSPI0 output.

Definition at line 214 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO13_P15_0_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT

QSPI0_SLSO13: QSPI0 output.

Definition at line 215 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO1_P20_9_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT

QSPI0_SLSO1: QSPI0 output.

Definition at line 216 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO2_P20_13_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT

QSPI0_SLSO2: QSPI0 output.

Definition at line 217 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO3_P11_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT

QSPI0_SLSO3: QSPI0 output.

Definition at line 218 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO4_P11_11_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT

QSPI0_SLSO4: QSPI0 output.

Definition at line 219 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO5_P11_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT

QSPI0_SLSO5: QSPI0 output.

Definition at line 220 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO6_P20_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT

QSPI0_SLSO6: QSPI0 output.

Definition at line 221 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO7_P33_5_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT

QSPI0_SLSO7: QSPI0 output.

Definition at line 222 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO8_P20_6_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT

QSPI0_SLSO8: QSPI0 output.

Definition at line 223 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO9_P20_3_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT

QSPI0_SLSO9: QSPI0 output.

Definition at line 224 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MRST_P10_1_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT

QSPI1_MRST: QSPI1 output.

Definition at line 147 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MRST_P10_6_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT

QSPI1_MRST: QSPI1 output.

Definition at line 148 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MRST_P11_3_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT

QSPI1_MRST: QSPI1 output.

Definition at line 149 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MRSTA_P10_1_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN

QSPI1_MRSTA: QSPI1 input.

Definition at line 133 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MRSTB_P11_3_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN

QSPI1_MRSTB: QSPI1 input.

Definition at line 134 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSR_P10_1_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT

QSPI1_MTSR: QSPI1 output.

Definition at line 168 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSR_P10_3_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT

QSPI1_MTSR: QSPI1 output.

Definition at line 169 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSR_P10_4_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT

QSPI1_MTSR: QSPI1 output.

Definition at line 170 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSR_P11_9_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT

QSPI1_MTSR: QSPI1 output.

Definition at line 171 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSRA_P10_3_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN

QSPI1_MTSRA: QSPI1 input.

Definition at line 157 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSRB_P11_9_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN

QSPI1_MTSRB: QSPI1 input.

Definition at line 158 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSRC_P10_4_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN

QSPI1_MTSRC: QSPI1 input.

Definition at line 159 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SCLK_P10_2_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT

QSPI1_SCLK: QSPI1 output.

Definition at line 193 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SCLK_P11_6_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT

QSPI1_SCLK: QSPI1 output.

Definition at line 194 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SCLKA_P10_2_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN

QSPI1_SCLKA: QSPI1 input.

Definition at line 183 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SCLKB_P11_6_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN

QSPI1_SCLKB: QSPI1 input.

Definition at line 184 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSIA_P11_10_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN

QSPI1_SLSIA: QSPI1 input.

Definition at line 208 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO0_P20_8_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT

QSPI1_SLSO0: QSPI1 output.

Definition at line 225 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO10_P10_0_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT

QSPI1_SLSO10: QSPI1 output.

Definition at line 226 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO1_P20_9_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT

QSPI1_SLSO1: QSPI1 output.

Definition at line 227 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO2_P20_13_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT

QSPI1_SLSO2: QSPI1 output.

Definition at line 228 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO3_P11_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT

QSPI1_SLSO3: QSPI1 output.

Definition at line 229 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO4_P11_11_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT

QSPI1_SLSO4: QSPI1 output.

Definition at line 230 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO5_P11_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT

QSPI1_SLSO5: QSPI1 output.

Definition at line 231 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO6_P33_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT

QSPI1_SLSO6: QSPI1 output.

Definition at line 232 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO7_P33_5_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT

QSPI1_SLSO7: QSPI1 output.

Definition at line 233 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO8_P10_4_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT

QSPI1_SLSO8: QSPI1 output.

Definition at line 234 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO9_P10_5_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT

QSPI1_SLSO9: QSPI1 output.

Definition at line 235 of file IfxQspi_PinMap.h.

◆ IfxQspi2_HSICINA_P15_2_IN

IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN

QSPI2_HSICINA: QSPI2 input.

Definition at line 128 of file IfxQspi_PinMap.h.

◆ IfxQspi2_HSICINB_P15_3_IN

IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN

QSPI2_HSICINB: QSPI2 input.

Definition at line 129 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRST_P15_4_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT

QSPI2_MRST: QSPI2 output.

Definition at line 150 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRST_P15_7_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT

QSPI2_MRST: QSPI2 output.

Definition at line 151 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTA_P15_4_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN

QSPI2_MRSTA: QSPI2 input.

Definition at line 135 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTB_P15_7_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN

QSPI2_MRSTB: QSPI2 input.

Definition at line 136 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTCN_P21_2_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN

QSPI2_MRSTCN: QSPI2 input (LVDS)

Definition at line 137 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTCP_P21_3_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN

QSPI2_MRSTCP: QSPI2 input (LVDS)

Definition at line 138 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTE_P15_2_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN

QSPI2_MRSTE: QSPI2 input.

Definition at line 139 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSR_P15_5_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT

QSPI2_MTSR: QSPI2 output.

Definition at line 174 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSR_P15_6_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT

QSPI2_MTSR: QSPI2 output.

Definition at line 175 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSRA_P15_5_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN

QSPI2_MTSRA: QSPI2 input.

Definition at line 160 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSRB_P15_6_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN

QSPI2_MTSRB: QSPI2 input.

Definition at line 161 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSRN_P13_2_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT

QSPI2_MTSRN: QSPI2 output (LVDS)

Definition at line 172 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSRP_P13_3_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT

QSPI2_MTSRP: QSPI2 output (LVDS)

Definition at line 173 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLK_P15_3_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT

QSPI2_SCLK: QSPI2 output.

Definition at line 197 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLK_P15_6_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT

QSPI2_SCLK: QSPI2 output.

Definition at line 198 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLK_P15_8_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT

QSPI2_SCLK: QSPI2 output.

Definition at line 199 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLKA_P15_3_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN

QSPI2_SCLKA: QSPI2 input.

Definition at line 185 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLKB_P15_8_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN

QSPI2_SCLKB: QSPI2 input.

Definition at line 186 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLKN_P13_0_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT

QSPI2_SCLKN: QSPI2 output (LVDS)

Definition at line 195 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLKP_P13_1_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT

QSPI2_SCLKP: QSPI2 output (LVDS)

Definition at line 196 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSIA_P15_2_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN

QSPI2_SLSIA: QSPI2 input.

Definition at line 209 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSIB_P15_1_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN

QSPI2_SLSIB: QSPI2 input.

Definition at line 210 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO0_P15_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT

QSPI2_SLSO0: QSPI2 output.

Definition at line 236 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO1_P14_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT

QSPI2_SLSO1: QSPI2 output.

Definition at line 237 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO2_P14_6_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT

QSPI2_SLSO2: QSPI2 output.

Definition at line 238 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO3_P14_3_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT

QSPI2_SLSO3: QSPI2 output.

Definition at line 239 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO4_P14_7_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT

QSPI2_SLSO4: QSPI2 output.

Definition at line 240 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO5_P15_1_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT

QSPI2_SLSO5: QSPI2 output.

Definition at line 241 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO6_P33_13_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT

QSPI2_SLSO6: QSPI2 output.

Definition at line 242 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO7_P20_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT

QSPI2_SLSO7: QSPI2 output.

Definition at line 243 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO8_P20_6_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT

QSPI2_SLSO8: QSPI2 output.

Definition at line 244 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO9_P20_3_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT

QSPI2_SLSO9: QSPI2 output.

Definition at line 245 of file IfxQspi_PinMap.h.

◆ IfxQspi3_HSICINA_P33_9_IN

IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN

QSPI3_HSICINA: QSPI3 input.

Definition at line 130 of file IfxQspi_PinMap.h.

◆ IfxQspi3_HSICINB_P33_10_IN

IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN

QSPI3_HSICINB: QSPI3 input.

Definition at line 131 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRST_P02_5_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT

QSPI3_MRST: QSPI3 output.

Definition at line 152 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRST_P10_7_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT

QSPI3_MRST: QSPI3 output.

Definition at line 153 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRST_P22_1_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT

QSPI3_MRST: QSPI3 output.

Definition at line 154 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRST_P33_13_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT

QSPI3_MRST: QSPI3 output.

Definition at line 155 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRSTA_P02_5_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN

QSPI3_MRSTA: QSPI3 input.

Definition at line 140 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRSTB_P10_7_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN

QSPI3_MRSTB: QSPI3 input.

Definition at line 141 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRSTD_P33_13_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN

QSPI3_MRSTD: QSPI3 input.

Definition at line 142 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRSTE_P22_1_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN

QSPI3_MRSTE: QSPI3 input.

Definition at line 143 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRSTFN_P21_2_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN

QSPI3_MRSTFN: QSPI3 input (LVDS)

Definition at line 144 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRSTFP_P21_3_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN

QSPI3_MRSTFP: QSPI3 input (LVDS)

Definition at line 145 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSR_P02_6_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT

QSPI3_MTSR: QSPI3 output.

Definition at line 178 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSR_P10_6_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT

QSPI3_MTSR: QSPI3 output.

Definition at line 179 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSR_P22_0_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT

QSPI3_MTSR: QSPI3 output (LVDS)

Definition at line 180 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSR_P33_12_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT

QSPI3_MTSR: QSPI3 output.

Definition at line 181 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSRA_P02_6_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN

QSPI3_MTSRA: QSPI3 input.

Definition at line 162 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSRB_P10_6_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN

QSPI3_MTSRB: QSPI3 input.

Definition at line 163 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSRD_P33_12_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN

QSPI3_MTSRD: QSPI3 input.

Definition at line 164 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSRE_P22_0_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN

QSPI3_MTSRE: QSPI3 input.

Definition at line 165 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSRN_P22_2_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT

QSPI3_MTSRN: QSPI3 output (LVDS)

Definition at line 176 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSRP_P22_3_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT

QSPI3_MTSRP: QSPI3 output (LVDS)

Definition at line 177 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLK_P02_7_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT

QSPI3_SCLK: QSPI3 output.

Definition at line 202 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLK_P10_8_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT

QSPI3_SCLK: QSPI3 output.

Definition at line 203 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLK_P22_3_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT

QSPI3_SCLK: QSPI3 output.

Definition at line 204 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLK_P33_11_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT

QSPI3_SCLK: QSPI3 output.

Definition at line 205 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLKA_P02_7_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN

QSPI3_SCLKA: QSPI3 input.

Definition at line 187 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLKB_P10_8_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN

QSPI3_SCLKB: QSPI3 input.

Definition at line 188 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLKD_P33_11_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN

QSPI3_SCLKD: QSPI3 input.

Definition at line 189 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLKE_P22_3_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN

QSPI3_SCLKE: QSPI3 input.

Definition at line 190 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLKN_P22_0_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT

QSPI3_SCLKN: QSPI3 output.

Definition at line 200 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLKP_P22_1_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT

QSPI3_SCLKP: QSPI3 output (LVDS)

Definition at line 201 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSIA_P02_4_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN

QSPI3_SLSIA: QSPI3 input.

Definition at line 211 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSIC_P33_10_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN

QSPI3_SLSIC: QSPI3 input.

Definition at line 212 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSID_P22_2_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN

QSPI3_SLSID: QSPI3 input.

Definition at line 213 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO0_P02_4_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT

QSPI3_SLSO0: QSPI3 output.

Definition at line 246 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO11_P33_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT

QSPI3_SLSO11: QSPI3 output.

Definition at line 247 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO12_P22_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT

QSPI3_SLSO12: QSPI3 output.

Definition at line 248 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO13_P23_1_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT

QSPI3_SLSO13: QSPI3 output.

Definition at line 249 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO1_P02_0_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT

QSPI3_SLSO1: QSPI3 output.

Definition at line 250 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO1_P33_9_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT

QSPI3_SLSO1: QSPI3 output.

Definition at line 251 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO2_P02_1_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT

QSPI3_SLSO2: QSPI3 output.

Definition at line 252 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO2_P33_8_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT

QSPI3_SLSO2: QSPI3 output.

Definition at line 253 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO3_P02_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT

QSPI3_SLSO3: QSPI3 output.

Definition at line 254 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO4_P02_3_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT

QSPI3_SLSO4: QSPI3 output.

Definition at line 255 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO4_P23_5_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT

QSPI3_SLSO4: QSPI3 output.

Definition at line 256 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO5_P02_8_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT

QSPI3_SLSO5: QSPI3 output.

Definition at line 257 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO5_P23_4_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT

QSPI3_SLSO5: QSPI3 output.

Definition at line 258 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO6_P00_8_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT

QSPI3_SLSO6: QSPI3 output.

Definition at line 259 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO7_P00_9_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT

QSPI3_SLSO7: QSPI3 output.

Definition at line 260 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO7_P33_7_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT

QSPI3_SLSO7: QSPI3 output.

Definition at line 261 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO8_P10_5_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT

QSPI3_SLSO8: QSPI3 output.

Definition at line 262 of file IfxQspi_PinMap.h.

◆ IfxQspi_Hsicin_In_pinTable

IFX_EXTERN const IfxQspi_Hsicin_In* IfxQspi_Hsicin_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS]

IfxQspi_Hsicin_In table.

Definition at line 279 of file IfxQspi_PinMap.h.

◆ IfxQspi_Mrst_In_pinTable

IFX_EXTERN const IfxQspi_Mrst_In* IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]

IfxQspi_Mrst_In table.

Definition at line 282 of file IfxQspi_PinMap.h.

◆ IfxQspi_Mrst_Out_pinTable

IFX_EXTERN const IfxQspi_Mrst_Out* IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]

IfxQspi_Mrst_Out table.

Definition at line 285 of file IfxQspi_PinMap.h.

◆ IfxQspi_Mtsr_In_pinTable

IFX_EXTERN const IfxQspi_Mtsr_In* IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]

IfxQspi_Mtsr_In table.

Definition at line 288 of file IfxQspi_PinMap.h.

◆ IfxQspi_Mtsr_Out_pinTable

IFX_EXTERN const IfxQspi_Mtsr_Out* IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]

IfxQspi_Mtsr_Out table.

Definition at line 291 of file IfxQspi_PinMap.h.

◆ IfxQspi_Sclk_In_pinTable

IFX_EXTERN const IfxQspi_Sclk_In* IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]

IfxQspi_Sclk_In table.

Definition at line 294 of file IfxQspi_PinMap.h.

◆ IfxQspi_Sclk_Out_pinTable

IFX_EXTERN const IfxQspi_Sclk_Out* IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]

IfxQspi_Sclk_Out table.

Definition at line 297 of file IfxQspi_PinMap.h.

◆ IfxQspi_Slsi_In_pinTable

IFX_EXTERN const IfxQspi_Slsi_In* IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]

IfxQspi_Slsi_In table.

Definition at line 300 of file IfxQspi_PinMap.h.

◆ IfxQspi_Slso_Out_pinTable

IFX_EXTERN const IfxQspi_Slso_Out* IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]

IfxQspi_Slso_Out table.

Definition at line 303 of file IfxQspi_PinMap.h.


iLLD_TC26B: How to use the SPI Master Interface driver?

How to use the SPI Master Interface driver?
iLLD » QSPI
Collaboration diagram for How to use the SPI Master Interface driver?:

The SPI Master interface driver provides a default QSPI configuration for a bidirectional serial communication of data words.

Data transactions are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the QSPI peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received. Optionally Dma can be used for data transfers. Only the interrupt configuration and Module initialisation are different when dma is used.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Qspi/SpiMaster/IfxQspi_SpiMaster.h>

Variables

Declare QSPI module and channel handles:

IfxQspi_SpiMaster spi;
IfxQspi_SpiMaster_Channel spiChannel;

In addition, declare global transmit and receive buffers for the data transfers:

#define SPI_BUFFER_SIZE 8
uint8 spiTxBuffer[SPI_BUFFER_SIZE];
uint8 spiRxBuffer[SPI_BUFFER_SIZE];

Interrupt Handler Installation (without dma use)

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_QSPI0_TX 1
#define IFX_INTPRIO_QSPI0_RX 2
#define IFX_INTPRIO_QSPI0_ER 5

Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(qspi0TxISR, 0, IFX_INTPRIO_QSPI0_TX)
{
IfxQspi_SpiMaster_isrTransmit(&spi);
}
IFX_INTERRUPT(qspi0RxISR, 0, IFX_INTPRIO_QSPI0_RX)
{
IfxQspi_SpiMaster_isrReceive(&spi);
}
IFX_INTERRUPT(qspi0ErISR, 0, IFX_INTPRIO_QSPI0_ER)
{
IfxQspi_SpiMaster_isrError(&spi);
// Process errors. Eg: parity Error is checked below
IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(&spi);
if( chHandle->errorFlags.parityError == 1)
{
// Parity Error
}
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&qspi0TxISR, IFX_INTPRIO_QSPI0_TX);
IfxCpu_Irq_installInterruptHandler(&qspi0RxISR, IFX_INTPRIO_QSPI0_RX);
IfxCpu_Irq_installInterruptHandler(&qspi0ErISR, IFX_INTPRIO_QSPI0_ER);
IfxCpu_enableInterrupts();

Interrupt Handler Installation (with dma use)

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// qspi priorities
#define IFX_INTPRIO_QSPI0_TX 1 // DMA channel 1
#define IFX_INTPRIO_QSPI0_RX 2 // DMA channel 2
#define IFX_INTPRIO_QSPI0_ER 0x30
// dma priorities
#define IFX_INTPRIO_DMA_CH1 10
#define IFX_INTPRIO_DMA_CH2 11

Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(qspi0DmaTxISR, 0, IFX_INTPRIO_DMA_CH1 )
{
IfxQspi_SpiMaster_isrDmaTransmit(&spi);
}
IFX_INTERRUPT(qspi0DmaRxISR, 0, IFX_INTPRIO_DMA_CH2)
{
IfxQspi_SpiMaster_isrDmaReceive(&spi);
}
IFX_INTERRUPT(qspi0ErISR, 0, IFX_INTPRIO_QSPI0_ER)
{
IfxQspi_SpiMaster_isrError(&spi);
// Process errors. Eg: parity Error is checked below
IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(&spi);
if( chHandle->errorFlags.parityError == 1)
{
// Parity Error
}
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&qspi0DmaTxISR, IFX_INTPRIO_DMA_CH1);
IfxCpu_Irq_installInterruptHandler(&qspi0DmaRxISR, IFX_INTPRIO_DMA_CH2);
IfxCpu_Irq_installInterruptHandler(&qspi0ErISR, IFX_INTPRIO_QSPI0_ER);
IfxCpu_enableInterrupts();

Module Initialisation (without dma use)

The module initialisation can be done in the same function.

Here an example for master mode:

// create module config
IfxQspi_SpiMaster_Config spiMasterConfig;
IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
// set the desired mode and maximum baudrate
spiMasterConfig.base.mode = SpiIf_Mode_master;
spiMasterConfig.base.maximumBaudrate = 10000000;
// ISR priorities and interrupt target
spiMasterConfig.base.txPriority = IFX_INTPRIO_QSPI0_TX;
spiMasterConfig.base.rxPriority = IFX_INTPRIO_QSPI0_RX;
spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
spiMasterConfig.base.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
// pin configuration
const IfxQspi_SpiMaster_Pins pins = {
&IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
&IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
&IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
};
spiMasterConfig.pins = &pins;
// initialize module
//IfxQspi_SpiMaster spi; // defined globally
IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);

Module Initialisation (with dma use)

The module initialisation can be done in the same function.

Here an example for master mode:

// create module config
IfxQspi_SpiMaster_Config spiMasterConfig;
IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
// set the desired mode and maximum baudrate
spiMasterConfig.base.mode = SpiIf_Mode_master;
spiMasterConfig.base.maximumBaudrate = 10000000;
// ISR priorities and interrupt target (with Dma usage)
spiMasterConfig.base.txPriority = IFX_INTPRIO_DMA_CH1;
spiMasterConfig.base.rxPriority = IFX_INTPRIO_DMA_CH2;
spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
// dma configuration.
spiMasterConfig.dma.txDmaChannelId = IfxDma_ChannelId_1;
spiMasterConfig.dma.rxDmaChannelId = IfxDma_ChannelId_2;
spiMasterConfig.dma.useDma = 1;
// pin configuration
const IfxQspi_SpiMaster_Pins pins = {
&IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
&IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
&IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
};
spiMasterConfig.pins = &Pins;
// initialize module
//IfxQspi_SpiMaster spi; // defined globally
IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);

SPI Channel Initialisation

After the module has been initialized, one or more SPI channels can be configured. Each channel has a dedicated select line.

Here an example for a SPI channel in master mode:

// create channel config
IfxQspi_SpiMaster_ChannelConfig spiMasterChannelConfig;
IfxQspi_SpiMaster_initChannelConfig(&spiMasterChannelConfig, &spi);
// set the baudrate for this channel
spiMasterChannelConfig.base.baudrate = 5000000;
// select pin configuration
const IfxQspi_SpiMaster_Output slsOutput = {
&IfxQspi0_SLSO7_P33_5_OUT,
IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
spiMasterChannelConfig.sls.output = (IfxQspi_SpiMaster_Output)slsOutput;
// initialize channel
//IfxQspi_SpiMaster_Channel spiChannel; // defined globally
IfxQspi_SpiMaster_initChannel(&spiChannel, &spiMasterChannelConfig);

The QSPI is ready for use now!

Data Transfers

In following examples we assume, that following buffers are declared globally:

// declared somewhere globally
#define SPI_BUFFER_SIZE 8
uint8 spiTxBuffer[SPI_BUFFER_SIZE] = { 1, 2, 3, 4, 5, 6, 7, 8 };
uint8 spiRxBuffer[SPI_BUFFER_SIZE] = { 0, 0, 0, 0, 0, 0, 0, 0 };

Sending and Receiving a data stream:

int i=0;
// wait until transfer of previous data stream is finished
while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
// send/receive new stream
IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);

Send only, discard received data:

// wait until transfer of previous data stream is finished
while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
// send new stream
IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], NULL_PTR, SPI_BUFFER_SIZE);

Receive only, send all-1

// wait until transfer of previous data stream is finished
while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
// receive new stream
IfxQspi_SpiMaster_exchange(&spiChannel, NULL_PTR, &spiRxBuffer[i], SPI_BUFFER_SIZE);

Phase transition and User Interrupt usage

Phase transition and user defined interrupts are not configured internal to Driver.

Example usage of Phase transition interrupt is given below

IfxCpu_Irq_installInterruptHandler(&qspi0PtISR, IFX_INTPRIO_QSPI0_PT);
IfxQspi_pause(&MODULE_QSPI0);
IfxQspi_configPT1Event(&MODULE_QSPI0, IfxQspi_PhaseTransitionEvent_startOfFrame); // Configured for PT1 SOF event
IfxQspi_enablePT1Event(&MODULE_QSPI0,TRUE);
IfxQspi_run(&MODULE_QSPI0);

Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(qspi0PtISR, 0, IFX_INTPRIO_QSPI0_PT )
{
IfxQspi_PhaseTransitionEvent event;
event = IfxQspi_SpiMaster_isrPhaseTransition(&spiMaster);
// process event
switch (event)
{
case IfxQspi_PhaseTransitionEvent_startOfFrame:
// SOF event
break;
// add other events if needed.
}
}

How to use XXL Mode with Dma

The Qspi XXL mode is similar to Short mode with the exception to configure mode to xxl before calling IfxQspi_SpiMaster_initChannel() function. The remaining usage is similar to Short / ShortContinuous Mode (default one) with Dma

spiMasterChannelConfig.mode = IfxQspi_SpiMaster_Mode_xxl;

How to use Long / Long Continuous Mode with Dma

The qspi Long mode is similar to short mode Except for below additional changes.

  1. Transmit buffer need to be defined (this is in addition to source/TX data buffer. This buffer is used to store the DATA + CONFIG for dma usage).
  2. Configure the Spi Channel configuration mode (new one) to long or longContinuous mode
  3. Preparing Transmit buffer content for long/long Continuous mode

Example Code is provided below.

Include Files

Include following header file into your C code:

#include <Qspi/SpiMaster/IfxQspi_SpiMaster.h>

Variables

Declare QSPI module and channel handles:

IfxQspi_SpiMaster spi;
IfxQspi_SpiMaster_Channel spiChannel;

In addition, declare global transmit and receive buffers for the data transfers:

#define SPI_BUFFER_SIZE 50
#define BACON_SIZE IFXQSPI_BACONSIZE(SPI_BUFFER_SIZE)
#define FIFO_SIZE IFXQSPI_FIFO32BITSIZE(SPI_BUFFER_SIZE)
// This should be 32 bit ; use addition of macros as shown
__attribute__ ((aligned(64))) uint32 spi0TxLongBuffer[BACON_SIZE + FIFO_SIZE];
uint8 spiTxBuffer[SPI_BUFFER_SIZE];
uint8 spiRxBuffer[SPI_BUFFER_SIZE];

Module Initialisation (with dma use)

The module initialisation can be done in the same function.

Here an example for master mode:

// create module config
IfxQspi_SpiMaster_Config spiMasterConfig;
IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
// set the desired mode and maximum baudrate
spiMasterConfig.base.mode = SpiIf_Mode_master;
spiMasterConfig.base.maximumBaudrate = 10000000;
// ISR priorities and interrupt target (with Dma usage)
spiMasterConfig.base.txPriority = IFX_INTPRIO_DMA_CH1;
spiMasterConfig.base.rxPriority = IFX_INTPRIO_DMA_CH2;
spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
// dma configuration.
spiMasterConfig.dma.txDmaChannelId = IfxDma_ChannelId_1;
spiMasterConfig.dma.rxDmaChannelId = IfxDma_ChannelId_2;
spiMasterConfig.dma.useDma = 1;
// pin configuration
const IfxQspi_SpiMaster_Pins pins = {
&IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
&IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
&IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
};
spiMasterConfig.pins = &Pins;
// initialize module
//IfxQspi_SpiMaster spi; // defined globally
IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);

SPI Channel Initialisation

After the module has been initialized, one or more SPI channels can be configured. Each channel has a dedicated select line.

Here an example for a SPI channel in master mode:

// create channel config
IfxQspi_SpiMaster_ChannelConfig spiMasterChannelConfig;
IfxQspi_SpiMaster_initChannelConfig(&spiMasterChannelConfig, &spi);
// set the baudrate for this channel
spiMasterChannelConfig.base.baudrate = 5000000;
// select pin configuration
const IfxQspi_SpiMaster_Output slsOutput = {
&IfxQspi0_SLSO7_P33_5_OUT,
IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
spiMasterChannelConfig.sls.output = (IfxQspi_SpiMaster_Output)slsOutput;
spiMasterChannelConfig.mode = IfxQspi_SpiMaster_Mode_longContinuous; // Select Long Continuous Mode
// initialize channel
//IfxQspi_SpiMaster_Channel spiChannel; // defined globally
IfxQspi_SpiMaster_initChannel(&spiChannel, &spiMasterChannelConfig);

Sending and Receiving a Long data stream:

int i=0;
// Pack data and Configuration to Transmit buffer (Only for Long / Long Continuous Mode(s))
IfxQspi_SpiMaster_packLongModeBuffer(&spiMasterChannel, spi0TxBuffer, spi0TxLongBuffer, SPI_BUFFER_SIZE);
// wait until transfer of previous data stream is finished
while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
// send/receive new stream
IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);

** NOTE for loopback mode ** In case you want to configure and test a SPI channel in loopback, you have to select: spiMasterChannelConfig.base.mode.loopback = 1

If an output pin is configured in loopback mode, the SPI channel number will be extracted from the pin map configuration.

If an output pin is not configured in loopback, the default SPI channel selected will be 0.


iLLD_TC26B: SPI Master Driver

Modules
SPI Master Driver
iLLD » QSPI
Collaboration diagram for SPI Master Driver:

Modules

Data Structures
Module Functions
Channel Functions
Support Functions
Communication
Interrupt Functions
Direct FIFO Access

Detailed Description


iLLD_TC26B: Data Structures

Data Structures | Enumerations
Data Structures
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxQspi_SpiMaster_Input
SLSI pin configuration structure. More...
struct | IfxQspi_SpiMaster_Output
SLSO pin configuration structure. More...
struct | IfxQspi_SpiMaster_Dma
Dma handle. More...
struct | IfxQspi_SpiMaster_DmaConfig
Dma configuration. More...
struct | IfxQspi_SpiMaster_ErrorFlags
Qspi Master Mode Error Flags. More...
union | IfxQspi_SpiMaster_InputOutput
Union of Slave Select pins. More...
struct | IfxQspi_SpiMaster_Pins
Master pin IO configuration structure. More...
struct | IfxQspi_SpiMaster
Module handle data structure. More...
struct | IfxQspi_SpiMaster_ChannelConfig
Module Channel configuration structure. More...
struct | IfxQspi_SpiMaster_Channel_s
Module Channel handle structure. More...
struct | IfxQspi_SpiMaster_Config
Module configuration structure. More...

Enumerations

enum IfxQspi_SpiMaster_ChannelBasedCs {
IfxQspi_SpiMaster_ChannelBasedCs_disabled = 0,
IfxQspi_SpiMaster_ChannelBasedCs_enabled = 1
}
enum IfxQspi_SpiMaster_Mode {
IfxQspi_SpiMaster_Mode_short = 0,
IfxQspi_SpiMaster_Mode_long = 1,
IfxQspi_SpiMaster_Mode_shortContinuous = 2,
IfxQspi_SpiMaster_Mode_longContinuous = 3,
IfxQspi_SpiMaster_Mode_xxl = 4
}

Detailed Description

Data Structure Documentation

◆ IfxQspi_SpiMaster_Input

struct IfxQspi_SpiMaster_Input

SLSI pin configuration structure.

Definition at line 554 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Input:
[legend]
Data Fields
IfxPort_InputMode | mode | The SLSI pin input mode.
IFX_CONST IfxQspi_Slsi_In * | pin | Pointer to SLSI in pin.

◆ IfxQspi_SpiMaster_Output

struct IfxQspi_SpiMaster_Output

SLSO pin configuration structure.

Definition at line 562 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Output:
[legend]
Data Fields
IfxPort_PadDriver | driver | The pad driver mode which should be configured.
IfxPort_OutputMode | mode | The SLSO pin output mode.
IFX_CONST IfxQspi_Slso_Out * | pin | Pointer to SLSO out pin.

◆ IfxQspi_SpiMaster_Dma

struct IfxQspi_SpiMaster_Dma

Dma handle.

Definition at line 575 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Dma:
[legend]
Data Fields
IfxDma_Dma_Channel | rxDmaChannel | receive DMA channel handle
IfxDma_ChannelId | rxDmaChannelId | DMA channel no for the Spi recieve.
IfxDma_Dma_Channel | txDmaChannel | transmit DMA channel handle
IfxDma_ChannelId | txDmaChannelId | DMA channel no for the Spi transmit.
boolean | useDma | use Dma for Data transfer/s

◆ IfxQspi_SpiMaster_DmaConfig

struct IfxQspi_SpiMaster_DmaConfig

Dma configuration.

Definition at line 586 of file IfxQspi_SpiMaster.h.

Data Fields
IfxDma_ChannelId | rxDmaChannelId | DMA channel no for the Spi recieve.
IfxDma_ChannelId | txDmaChannelId | DMA channel no for the Spi transmit.
boolean | useDma | use Dma for Data transfer/s

◆ IfxQspi_SpiMaster_ErrorFlags

struct IfxQspi_SpiMaster_ErrorFlags

Qspi Master Mode Error Flags.

Definition at line 595 of file IfxQspi_SpiMaster.h.

Data Fields
uint16 | baudrateError: 1 | [2:2] baudrate Error
uint16 | configurationError: 1 | [1:1] Configuration Error
uint16 | expectTimeoutError: 1 | [7:7] Expect Timeout Error
uint16 | parityError: 1 | [0:0] Parity Error
uint16 | rxFifoOverflowError: 1 | [5:5] RxFifo Overflow Error
uint16 | rxFifoUnderflowError: 1 | [6:6] RxFifo underflow Error
uint16 | txFifoOverflowError: 1 | [3:3] TxFifo Overflow Error
uint16 | txFifoUnderflowError: 1 | [4:4] TxFifo underflow Error

◆ IfxQspi_SpiMaster_InputOutput

union IfxQspi_SpiMaster_InputOutput

Union of Slave Select pins.

Definition at line 609 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_InputOutput:
[legend]
Data Fields
IfxQspi_SpiMaster_Input | input | SLSI pin configuration structure.
IfxQspi_SpiMaster_Output | output | SLSO pin configuration structure.

◆ IfxQspi_SpiMaster_Pins

struct IfxQspi_SpiMaster_Pins

Master pin IO configuration structure.

Definition at line 617 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Pins:
[legend]
Data Fields
IFX_CONST IfxQspi_Mrst_In * | mrst | Pointer to MRST in pin.
IfxPort_InputMode | mrstMode | The MRST pin input mode.
IFX_CONST IfxQspi_Mtsr_Out * | mtsr | Pointer to MTSR out pin.
IfxPort_OutputMode | mtsrMode | The MTSR pin output mode.
IfxPort_PadDriver | pinDriver | The pad driver mode which should be configured.
IFX_CONST IfxQspi_Sclk_Out * | sclk | Pointer to SLCK out pin.
IfxPort_OutputMode | sclkMode | The SCLK pin output mode.

◆ IfxQspi_SpiMaster

struct IfxQspi_SpiMaster

Module handle data structure.

Definition at line 634 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster:
[legend]
Data Fields
SpiIf | base | Module SPI interface handle.
IfxQspi_SpiMaster_Dma | dma | dma handle
float32 | maximumBaudrate | Maximum Baud Rate for the SPI Module.
Ifx_QSPI * | qspi | Pointer to QSPI module registers.

◆ IfxQspi_SpiMaster_ChannelConfig

struct IfxQspi_SpiMaster_ChannelConfig

Module Channel configuration structure.

Definition at line 644 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_ChannelConfig:
[legend]
Data Fields
SpiIf_ChConfig | base | SPI interface channel configuration structure.
IfxQspi_SpiMaster_ChannelBasedCs | channelBasedCs | define the slso behaviour
uint32 | dummyRxValue | Dummy RX value for transmit only modes.
uint32 | dummyTxValue | Dummy TX value to be sent for "recieve only" modes.
IfxQspi_SpiMaster_Mode | mode | Qspi Operating Mode.
IfxQspi_SpiMaster_InputOutput | sls | Union of Slave Select pins.

◆ IfxQspi_SpiMaster_Channel_s

struct IfxQspi_SpiMaster_Channel_s

Module Channel handle structure.

Definition at line 656 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Channel_s:
[legend]
Data Fields
IfxQspi_SpiMaster_AutoSlso | activateSlso | Specifies function for Auto SLSO activation.
Ifx_QSPI_BACON | bacon | basic configuration register
SpiIf_Ch | base | SPI interface channel handle structure.
IfxQspi_SpiMaster_ChannelBasedCs | channelBasedCs | define the slso behaviour
IfxQspi_ChannelId | channelId | QSPI channel Number.
uint8 | dataWidth | Number of bits which will be written into the FIFO.
IfxQspi_SpiMaster_AutoSlso | deactivateSlso | Specifies function for Auto SLSO deactivation.
uint32 | dummyRxValue | Dummy Rx value, for "transmit only" modes.
uint32 | dummyTxValue | Dummy TX value, which will be sent for "recieve only" mode.
IfxQspi_SpiMaster_ErrorFlags | errorFlags | Spi Master Error Flags.
boolean | firstWrite | Specifies whether the data id first write or not.
IfxQspi_SpiMaster_Mode | mode | Qspi Operating Mode.
IfxPort_Pin | slso | Defines SLSO pin.
Ifx_ActiveState | slsoActiveState | Specifies the current state of SLSO.

◆ IfxQspi_SpiMaster_Config

struct IfxQspi_SpiMaster_Config

Module configuration structure.

Definition at line 676 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Config:
[legend]
Data Fields
boolean | allowSleepMode | Specifies module sleep mode.
SpiIf_Config | base | SPI interface configuration structure.
IfxQspi_SpiMaster_DmaConfig | dma | Dma configuration.
boolean | pauseOnBaudrateSpikeErrors | Specifies module pause on baudrate or spike errors.
IfxQspi_PauseRunTransition | pauseRunTransition | Specifies module run or pause mode.
IFX_CONST IfxQspi_SpiMaster_Pins * | pins | structure for QSPI Master pins
Ifx_QSPI * | qspi | Pointer to QSPI module registers.
IfxQspi_FifoMode | rxFifoMode | Specifies the Receive FIFO mode.
IfxQspi_RxFifoInt | rxFifoThreshold | Specifies the RXFIFO interrupt threshold.
IfxQspi_FifoMode | txFifoMode | Specifies the transmit FIFO mode.
IfxQspi_TxFifoInt | txFifoThreshold | Specifies the TXFIFO interrupt threshold.

Enumeration Type Documentation

◆ IfxQspi_SpiMaster_ChannelBasedCs

enum IfxQspi_SpiMaster_ChannelBasedCs
Enumerator
IfxQspi_SpiMaster_ChannelBasedCs_disabled | Slso will be low for complete frame.
IfxQspi_SpiMaster_ChannelBasedCs_enabled | Slso will toggle with every byte.

Definition at line 529 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_Mode

enum IfxQspi_SpiMaster_Mode
Enumerator
IfxQspi_SpiMaster_Mode_short | Short Mode.
IfxQspi_SpiMaster_Mode_long | Long Mode.
IfxQspi_SpiMaster_Mode_shortContinuous | Short Continous Mode.
IfxQspi_SpiMaster_Mode_longContinuous | Long Continous Mode.
IfxQspi_SpiMaster_Mode_xxl | XXL Mode.

Definition at line 535 of file IfxQspi_SpiMaster.h.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxQspi_SpiMaster_initModule (IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxQspi_SpiMaster_initModuleConfig (IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_initModule()

IFX_EXTERN void IfxQspi_SpiMaster_initModule | ( | IfxQspi_SpiMaster * | handle,
 |  | const IfxQspi_SpiMaster_Config * | config
 | ) |  |

Initialises the module.

Parameters
handle | Module handle
config | Predefined configuration structure of the module
Returns
None

Usage example: see How to use the SPI Master Interface driver?

Definition at line 334 of file IfxQspi_SpiMaster.c.

◆ IfxQspi_SpiMaster_initModuleConfig()

IFX_EXTERN void IfxQspi_SpiMaster_initModuleConfig | ( | IfxQspi_SpiMaster_Config * | config,
 |  | Ifx_QSPI * | qspi
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure which should be initialized.
qspi | pointer to QSPI registers
Returns
None

Usage example: see How to use the SPI Master Interface driver?

Definition at line 546 of file IfxQspi_SpiMaster.c.


iLLD_TC26B: Channel Functions

Functions
Channel Functions
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Channel Functions:

Functions

IFX_STATIC IfxQspi_SpiMaster_Channel * | IfxQspi_SpiMaster_activeChannel (IfxQspi_SpiMaster *handle)
Gets current active channel. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_initChannel (IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
Initializes the channel. More...
IFX_EXTERN void | IfxQspi_SpiMaster_initChannelConfig (IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_activeChannel()

IFX_STATIC IfxQspi_SpiMaster_Channel * IfxQspi_SpiMaster_activeChannel ( IfxQspi_SpiMaster * handle )

Gets current active channel.

Parameters
handle Module handle
Returns
current active channel

Definition at line 127 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_isrDmaReceive(), IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiMaster_isrError(), IfxQspi_SpiMaster_isrReceive(), and IfxQspi_SpiMaster_isrTransmit().

◆ IfxQspi_SpiMaster_initChannel()

IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_initChannel | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | const IfxQspi_SpiMaster_ChannelConfig * | chConfig
 | ) |  |

Initializes the channel.

Parameters
chHandle | Module Channel handle
chConfig | Channel configuration structure
Returns
Status of Channel (busy or ok or failure)

Usage example: see How to use the SPI Master Interface driver?

  • Override the SLSO manually as general-purpose output

Definition at line 230 of file IfxQspi_SpiMaster.c.

◆ IfxQspi_SpiMaster_initChannelConfig()

IFX_EXTERN void IfxQspi_SpiMaster_initChannelConfig | ( | IfxQspi_SpiMaster_ChannelConfig * | chConfig,
 |  | IfxQspi_SpiMaster * | handle
 | ) |  |

Fills the config structure with default values.

Parameters
chConfig | Configuration structure which should be initialized.
handle | Module handle
Returns
None

Usage example: see How to use the SPI Master Interface driver?

Definition at line 319 of file IfxQspi_SpiMaster.c.


iLLD_TC26B: Support Functions

Functions
Support Functions
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Support Functions:

Functions

IFX_STATIC void | IfxQspi_SpiMaster_activateSlso (IfxQspi_SpiMaster_Channel *chHandle)
Active the SLSO pin. More...
IFX_STATIC void | IfxQspi_SpiMaster_deactivateSlso (IfxQspi_SpiMaster_Channel *chHandle)
Deactive the SLSO pin. More...
IFX_STATIC SpiIf_Status | IfxQspi_SpiMaster_lock (IfxQspi_SpiMaster *handle)
Locks the transfer and gets the current status of it. More...
IFX_STATIC void | IfxQspi_SpiMaster_read (IfxQspi_SpiMaster_Channel *chHandle)
Reads data from the Rx FIFO. More...
IFX_STATIC void | IfxQspi_SpiMaster_unlock (IfxQspi_SpiMaster *handle)
Unlocks the transfers. More...
IFX_STATIC void | IfxQspi_SpiMaster_write (IfxQspi_SpiMaster_Channel *chHandle)
Writes data into the Tx FIFO. More...
IFX_STATIC void | IfxQspi_SpiMaster_writeLong (IfxQspi_SpiMaster_Channel *chHandle)
Writes Long/xxl data into the Tx FIFO. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_activateSlso()

IFX_STATIC void IfxQspi_SpiMaster_activateSlso ( IfxQspi_SpiMaster_Channel * chHandle )

Active the SLSO pin.

Parameters
chHandle Module Channel handle
Returns
None

Definition at line 120 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initChannel().

◆ IfxQspi_SpiMaster_deactivateSlso()

IFX_STATIC void IfxQspi_SpiMaster_deactivateSlso ( IfxQspi_SpiMaster_Channel * chHandle )

Deactive the SLSO pin.

Parameters
chHandle Module Channel handle
Returns
None

Definition at line 133 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initChannel().

◆ IfxQspi_SpiMaster_lock()

IFX_STATIC SpiIf_Status IfxQspi_SpiMaster_lock ( IfxQspi_SpiMaster * handle )

Locks the transfer and gets the current status of it.

Parameters
handle Module handle
Returns
SpiIf_Status_ok if sending is done otherwise SpiIf_Status_busy.

Definition at line 761 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_exchange().

◆ IfxQspi_SpiMaster_read()

IFX_STATIC void IfxQspi_SpiMaster_read ( IfxQspi_SpiMaster_Channel * chHandle )

Reads data from the Rx FIFO.

Parameters
chHandle Module Channel handle
Returns
None

Definition at line 837 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initChannel().

◆ IfxQspi_SpiMaster_unlock()

IFX_STATIC void IfxQspi_SpiMaster_unlock ( IfxQspi_SpiMaster * handle )

Unlocks the transfers.

Parameters
handle Module handle
Returns
None

Definition at line 905 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_isrDmaReceive(), IfxQspi_SpiMaster_isrError(), and IfxQspi_SpiMaster_read().

◆ IfxQspi_SpiMaster_write()

IFX_STATIC void IfxQspi_SpiMaster_write ( IfxQspi_SpiMaster_Channel * chHandle )

Writes data into the Tx FIFO.

Parameters
chHandle Module Channel handle
Returns
None

Definition at line 911 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initChannel().

◆ IfxQspi_SpiMaster_writeLong()

IFX_STATIC void IfxQspi_SpiMaster_writeLong ( IfxQspi_SpiMaster_Channel * chHandle )

Writes Long/xxl data into the Tx FIFO.

Parameters
chHandle Module Channel handle
Returns
None

Definition at line 1216 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_exchange().


iLLD_TC26B: Communication

Functions
Communication
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Communication:

Functions

IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_exchange (IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_getStatus (IfxQspi_SpiMaster_Channel *chHandle)
Gets the transmission status. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_exchange()

IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_exchange | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | const void * | src,
 |  | void * | dest,
 |  | Ifx_SizeT | count
 | ) |  |

Exchanges data between source and data.

Parameters
chHandle | Module Channel handle
src | Source of data. Can be set to NULL_PTR if nothing to transmit (receive only) - in this case, all-1 will be sent.
dest | Destination to which to be sent.Can be set to NULL_PTR if nothing to receive(transmit only).
count | Number of data in pending
Returns
Status of exchange of data

Usage example: see How to use the SPI Master Interface driver?

Definition at line 140 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_getStatus()

IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_getStatus ( IfxQspi_SpiMaster_Channel * chHandle )

Gets the transmission status.

Parameters
chHandle Module Channel handle
Returns
Transmission status

Usage example: see How to use the SPI Master Interface driver?

Definition at line 217 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN void | IfxQspi_SpiMaster_isrDmaReceive (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrDmaTransmit (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrError (IfxQspi_SpiMaster *handle)
Error Interrupt handler. More...
IFX_EXTERN IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrPhaseTransition (IfxQspi_SpiMaster *handle)
Phase Transition interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrReceive (IfxQspi_SpiMaster *handle)
Receive Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrTransmit (IfxQspi_SpiMaster *handle)
Transmit interrupt handler. More...
IFX_EXTERN IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrUserDefined (IfxQspi_SpiMaster *handle)
User defined interrupt handler. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_isrDmaReceive()

IFX_EXTERN void IfxQspi_SpiMaster_isrDmaReceive ( IfxQspi_SpiMaster * qspiHandle )

Transmit interrupt handler.

Parameters
qspiHandle Module handle
Returns
None

Definition at line 565 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_isrDmaTransmit()

IFX_EXTERN void IfxQspi_SpiMaster_isrDmaTransmit ( IfxQspi_SpiMaster * qspiHandle )

Transmit interrupt handler.

Parameters
qspiHandle Module handle
Returns
None

Definition at line 586 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_isrError()

IFX_EXTERN void IfxQspi_SpiMaster_isrError ( IfxQspi_SpiMaster * handle )

Error Interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 641 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_isrPhaseTransition()

IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrPhaseTransition ( IfxQspi_SpiMaster * handle )

Phase Transition interrupt handler.

Parameters
handle Module handle
Returns
Phase Transition Event

Definition at line 710 of file IfxQspi_SpiMaster.c.

◆ IfxQspi_SpiMaster_isrReceive()

IFX_EXTERN void IfxQspi_SpiMaster_isrReceive ( IfxQspi_SpiMaster * handle )

Receive Interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 730 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_isrTransmit()

IFX_EXTERN void IfxQspi_SpiMaster_isrTransmit ( IfxQspi_SpiMaster * handle )

Transmit interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 738 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_isrUserDefined()

IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrUserDefined ( IfxQspi_SpiMaster * handle )

User defined interrupt handler.

Parameters
handle Module handle
Returns
User Event

Definition at line 746 of file IfxQspi_SpiMaster.c.


iLLD_TC26B: Direct FIFO Access

Functions
Direct FIFO Access
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Direct FIFO Access:

Functions

IFX_INLINE uint32 | IfxQspi_SpiMaster_readReceiveFifo (IfxQspi_SpiMaster *handle)
Reads data or status in RxFIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeBasicConfiguration (IfxQspi_SpiMaster *handle, uint32 baconVal)
Writes Basic configuration value to Tx FIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeExtendedConfiguration (IfxQspi_SpiMaster_Channel *chHandle, uint32 econVal)
Writes extended configuration of the channel. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeMixedDataConfiguration (IfxQspi_SpiMaster *handle, uint32 mixEntryVal)
Writes data and configuration mixed value to Tx FIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeTransmitFifo (IfxQspi_SpiMaster_Channel *chHandle, uint32 data)
Writes the data to TxFIFO. More...
IFX_EXTERN void | IfxQspi_SpiMaster_packLongModeBuffer (IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
pack data to Long mode buffer More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_packLongModeBuffer()

IFX_EXTERN void IfxQspi_SpiMaster_packLongModeBuffer | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | void * | data,
 |  | uint32 * | longFifoBuffer,
 |  | Ifx_SizeT | dataLength
 | ) |  |

pack data to Long mode buffer

Parameters
chHandle | Module Channel handle
data | source Data buffer to be packed
longFifoBuffer | destination buffer for data and configuration
dataLength | size of data in source buffer (in bytes)
Returns
None

Definition at line 768 of file IfxQspi_SpiMaster.c.

◆ IfxQspi_SpiMaster_readReceiveFifo()

IFX_INLINE uint32 IfxQspi_SpiMaster_readReceiveFifo ( IfxQspi_SpiMaster * handle )

Reads data or status in RxFIFO.

Parameters
handle Module handle
Returns
Data or Status in RxFIFO

Definition at line 909 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_writeBasicConfiguration()

IFX_INLINE void IfxQspi_SpiMaster_writeBasicConfiguration | ( | IfxQspi_SpiMaster * | handle,
 |  | uint32 | baconVal
 | ) |  |

Writes Basic configuration value to Tx FIFO.

Parameters
handle | Module handle
baconVal | Basic configuration value to be entered in TxFIFO
Returns
None

Definition at line 917 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_writeExtendedConfiguration()

IFX_INLINE void IfxQspi_SpiMaster_writeExtendedConfiguration | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | uint32 | econVal
 | ) |  |

Writes extended configuration of the channel.

Parameters
chHandle | Module Channel handle
econVal | Channel Timing configuration value
Returns
None

Definition at line 924 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_writeMixedDataConfiguration()

IFX_INLINE void IfxQspi_SpiMaster_writeMixedDataConfiguration | ( | IfxQspi_SpiMaster * | handle,
 |  | uint32 | mixEntryVal
 | ) |  |

Writes data and configuration mixed value to Tx FIFO.

Parameters
handle | Module handle
mixEntryVal | Mixed of Data and configuration
Returns
None

Definition at line 931 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_writeTransmitFifo()

IFX_INLINE void IfxQspi_SpiMaster_writeTransmitFifo | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | uint32 | data
 | ) |  |

Writes the data to TxFIFO.

Parameters
chHandle | Module Channel handle
data | Data to be entered in Tx FIFO
Returns
None

Definition at line 938 of file IfxQspi_SpiMaster.h.


iLLD_TC26B: How to use the SPI Slave Interface driver?

How to use the SPI Slave Interface driver?
iLLD » QSPI
Collaboration diagram for How to use the SPI Slave Interface driver?:

The SPI Slave interface driver provides a default QSPI configuration for a bidirectional serial communication of data words.

Data transactions are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the QSPI peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received. Optionally Dma can be used for data transfers. Only the interrupt configuration and Module initialisation are different when dma is used.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Qspi/SpiSlave/IfxQspi_SpiSlave.h>

Variables

Declare QSPI module handle:

IfxQspi_SpiSlave spi;

In addition, declare global transmit and receive buffers for the data transfers:

#define SPI_BUFFER_SIZE 8
uint8 spiTxBuffer[SPI_BUFFER_SIZE];
uint8 spiRxBuffer[SPI_BUFFER_SIZE];

Interrupt Handler Installation (without dma use)

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_QSPI2_TX 1
#define IFX_INTPRIO_QSPI2_RX 2
#define IFX_INTPRIO_QSPI2_ER 5

Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(qspi2TxISR, 0, IFX_INTPRIO_QSPI2_TX)
{
IfxQspi_SpiSlave_isrTransmit(&spi);
}
IFX_INTERRUPT(qspi2RxISR, 0, IFX_INTPRIO_QSPI2_RX)
{
IfxQspi_SpiSlave_isrReceive(&spi);
}
IFX_INTERRUPT(qspi2ErISR, 0, IFX_INTPRIO_QSPI2_ER)
{
IfxQspi_SpiSlave_isrError(&spi);
// Process errors. Eg: parity Error is checked below
if( spi.errorFlags.parityError == 1)
{
// Parity Error
}
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&qspi2TxISR, IFX_INTPRIO_QSPI2_TX);
IfxCpu_Irq_installInterruptHandler(&qspi2RxISR, IFX_INTPRIO_QSPI2_RX);
IfxCpu_Irq_installInterruptHandler(&qspi2ErISR, IFX_INTPRIO_QSPI2_ER);
IfxCpu_enableInterrupts();

Interrupt Handler Installation (with dma use)

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
// qspi priorities
#define IFX_INTPRIO_QSPI2_TX 3 // DMA channel 3
#define IFX_INTPRIO_QSPI2_RX 4 // DMA channel 4
#define IFX_INTPRIO_QSPI2_ER 0x31
// dma priorities
#define IFX_INTPRIO_DMA_CH3 12
#define IFX_INTPRIO_DMA_CH4 13

Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(qspi2DmaTxISR, 0, IFX_INTPRIO_DMA_CH3)
{
IfxQspi_SpiSlave_isrDmaTransmit(&spi);
}
IFX_INTERRUPT(qspi2DmaRxISR, 0, IFX_INTPRIO_DMA_CH4)
{
IfxQspi_SpiSlave_isrDmaReceive(&spi);
}
IFX_INTERRUPT(qspi2ErISR, 0, IFX_INTPRIO_QSPI2_ER)
{
IfxQspi_SpiSlave_isrError(&spi);
// Process errors. Eg: parity Error is checked below
if( spi.errorFlags.parityError == 1)
{
// Parity Error
}
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&qspi2DmaTxISR, IFX_INTPRIO_DMA_CH3);
IfxCpu_Irq_installInterruptHandler(&qspi2DmaRxISR, IFX_INTPRIO_DMA_CH4);
IfxCpu_Irq_installInterruptHandler(&qspi2ErISR, IFX_INTPRIO_QSPI2_ER);
IfxCpu_enableInterrupts();

Module Initialisation (without dma use)

The module initialisation can be done in the same function.

Here an example for slave mode:

// create module config
IfxQspi_SpiSlave_Config spiSlaveConfig;
IfxQspi_SpiSlave_initModuleConfig(&spiSlaveConfig, &MODULE_QSPI2);
// set the maximum baudrate
spiSlaveConfig.base.maximumBaudrate = 10000000;
// ISR priorities and interrupt target
spiSlaveConfig.base.txPriority = IFX_INTPRIO_QSPI2_TX;
spiSlaveConfig.base.rxPriority = IFX_INTPRIO_QSPI2_RX;
spiSlaveConfig.base.erPriority = IFX_INTPRIO_QSPI2_ER;
spiSlaveConfig.base.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
// pin configuration
const IfxQspi_SpiSlave_Pins slavePins = {
&IfxQspi2_SCLKA_P15_3_IN, IfxPort_InputMode_pullDown, // SCLK Pin
&IfxQspi2_MTSRA_P15_5_IN, IfxPort_InputMode_pullDown, // MTSR Pin
&IfxQspi2_MRST_P15_7_OUT, IfxPort_OutputMode_pushPull, // MRST Pin
&IfxQspi2_SLSIA_P15_2_IN, IfxPort_InputMode_pullDown, // SLSI Pin
IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
};
spiSlaveConfig.pins = &slavePins;
// initialize module
//IfxQspi_Spi spi; // defined globally
IfxQspi_SpiSlave_initModule(&spi, &spiSlaveConfig);

Module Initialisation (with dma use)

The module initialisation can be done in the same function.

Here an example for slave mode:

// create module config
IfxQspi_SpiSlave_Config spiSlaveConfig;
IfxQspi_SpiSlave_initModuleConfig(&spiSlaveConfig, &MODULE_QSPI2);
// set the maximum baudrate
spiSlaveConfig.base.maximumBaudrate = 10000000;
// ISR priorities and interrupt target (with dma usage)
spiSlaveConfig.base.txPriority = IFX_INTPRIO_DMA_CH3;
spiSlaveConfig.base.rxPriority = IFX_INTPRIO_DMA_CH4;
spiSlaveConfig.base.erPriority = IFX_INTPRIO_QSPI2_ER;
spiSlaveConfig.dma.txDmaChannelId = IfxDma_ChannelId_3;
spiSlaveConfig.dma.rxDmaChannelId = IfxDma_ChannelId_4;
spiSlaveConfig.dma.useDma = 1;
// pin configuration
const IfxQspi_SpiSlave_Pins slavePins = {
&IfxQspi2_SCLKA_P15_3_IN, IfxPort_InputMode_pullDown, // SCLK Pin
&IfxQspi2_MTSRA_P15_5_IN, IfxPort_InputMode_pullDown, // MTSR Pin
&IfxQspi2_MRST_P15_7_OUT, IfxPort_OutputMode_pushPull, // MRST Pin
&IfxQspi2_SLSIA_P15_2_IN, IfxPort_InputMode_pullDown, // SLSI Pin
IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
};
spiSlaveConfig.pins = &slavePins;
// initialize module
//IfxQspi_Spi spi; // defined globally
IfxQspi_SpiSlave_initModule(&spi, &spiSlaveConfig);

The QSPI is ready for use now!

Data Transfers

In following examples we assume, that following buffers are declared globally:

// declared somewhere globally
#define SPI_BUFFER_SIZE 8
uint8 spiTxBuffer[SPI_BUFFER_SIZE] = { 1, 2, 3, 4, 5, 6, 7, 8 };
uint8 spiRxBuffer[SPI_BUFFER_SIZE] = { 0, 0, 0, 0, 0, 0, 0, 0 };

Sending and Receiving a data stream:

int i = 0;
// wait until transfer of previous data stream is finished
while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
// send/receive new stream
IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);

Send only, discard received data:

// wait until transfer of previous data stream is finished
while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
// send new stream
IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], NULL_PTR, SPI_BUFFER_SIZE);

Receive only, send all-1

// wait until transfer of previous data stream is finished
while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
// receive new stream
IfxQspi_SpiSlave_exchange(&spi, NULL_PTR, &spiRxBuffer[i], SPI_BUFFER_SIZE);


iLLD_TC26B: SPI Slave Driver

Modules
SPI Slave Driver
iLLD » QSPI
Collaboration diagram for SPI Slave Driver:

Modules

Data Structures
Module Functions
Support Functions
Communication
Interrupt Functions
Direct FIFO Access

Detailed Description


iLLD_TC26B: Data Structures

Data Structures | Variables
Data Structures
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxQspi_SpiSlave_Dma
Dma handle. More...
struct | IfxQspi_SpiSlave_DmaConfig
Dma configuration. More...
struct | IfxQspi_SpiSlave_ErrorFlags
Qspi Slave Mode Error Flags. More...
struct | IfxQspi_SpiSlave_Pins
Slave pin IO configuration structure. More...
struct | IfxQspi_SpiSlave_Protocol
Configures the SPI Protocol. More...
struct | IfxQspi_SpiSlave
Module handle data structure. More...
struct | IfxQspi_SpiSlave_Config
Module configuration structure. More...

Variables

IFX_STATIC uint32 | IfxQspi_SpiSlave_dummyRxValue = 0
dummy variable where recived data is placed More...
IFX_STATIC IFX_CONST uint32 | IfxQspi_SpiSlave_dummyTxValue = ~0
dummy value to be transmitted More...

Detailed Description

Data Structure Documentation

◆ IfxQspi_SpiSlave_Dma

struct IfxQspi_SpiSlave_Dma

Dma handle.

Definition at line 319 of file IfxQspi_SpiSlave.h.

Collaboration diagram for IfxQspi_SpiSlave_Dma:
[legend]
Data Fields
IfxDma_Dma_Channel | rxDmaChannel | receive DMA channel handle
IfxDma_ChannelId | rxDmaChannelId | DMA channel no for the Spi recieve.
IfxDma_Dma_Channel | txDmaChannel | transmit DMA channel handle
IfxDma_ChannelId | txDmaChannelId | DMA channel no for the Spi transmit.
boolean | useDma | use Dma for Data transfers

◆ IfxQspi_SpiSlave_DmaConfig

struct IfxQspi_SpiSlave_DmaConfig

Dma configuration.

Definition at line 330 of file IfxQspi_SpiSlave.h.

Data Fields
IfxDma_ChannelId | rxDmaChannelId | DMA channel no for the Spi receive.
IfxDma_ChannelId | txDmaChannelId | DMA channel no for the Spi transmit.
boolean | useDma | use Dma for Data transfers

◆ IfxQspi_SpiSlave_ErrorFlags

struct IfxQspi_SpiSlave_ErrorFlags

Qspi Slave Mode Error Flags.

Definition at line 339 of file IfxQspi_SpiSlave.h.

Data Fields
uint16 | baudrateError: 1 | [2:2] baudrate Error
uint16 | configurationError: 1 | [1:1] Configuration Error
uint16 | expectTimeoutError: 1 | [7:7] Expect Timeout Error
uint16 | parityError: 1 | [0:0] Parity Error
uint16 | rxFifoOverflowError: 1 | [5:5] RxFifo Overflow Error
uint16 | rxFifoUnderflowError: 1 | [6:6] RxFifo underflow Error
uint16 | slsiMisplacedInactivation: 1 | [8:8] SLSI misplaced inactivation (slave mode)
uint16 | txFifoOverflowError: 1 | [3:3] TxFifo Overflow Error
uint16 | txFifoUnderflowError: 1 | [4:4] TxFifo underflow Error

◆ IfxQspi_SpiSlave_Pins

struct IfxQspi_SpiSlave_Pins

Slave pin IO configuration structure.

Definition at line 354 of file IfxQspi_SpiSlave.h.

Collaboration diagram for IfxQspi_SpiSlave_Pins:
[legend]
Data Fields
IFX_CONST IfxQspi_Mrst_Out * | mrst | Pointer to MRST out pin.
IfxPort_OutputMode | mrstMode | The MRST pin output mode.
IFX_CONST IfxQspi_Mtsr_In * | mtsr | Pointer to MTSR in pin.
IfxPort_InputMode | mtsrMode | The MTSR pin input mode.
IfxPort_PadDriver | pinDriver | The pad driver mode which should be configured.
IFX_CONST IfxQspi_Sclk_In * | sclk | Pointer to SLCK in pin.
IfxPort_InputMode | sclkMode | The SCLK pin input mode.
IFX_CONST IfxQspi_Slsi_In * | slsi | Pointer to SLSI in pin.
IfxPort_InputMode | slsiMode | The SLSI pin input mode.

◆ IfxQspi_SpiSlave_Protocol

struct IfxQspi_SpiSlave_Protocol

Configures the SPI Protocol.

Definition at line 369 of file IfxQspi_SpiSlave.h.

Data Fields
SpiIf_ClockPolarity | clockPolarity | Specifies the clock polarity.
SpiIf_DataHeading | dataHeading | Specifies MSB or LSB first.
uint8 | dataWidth | range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Ifx_ParityMode | parityMode | Specifies the parity mode.
SpiIf_ShiftClock | shiftClock | Specifies the clock phase.

◆ IfxQspi_SpiSlave

struct IfxQspi_SpiSlave

Module handle data structure.

Definition at line 384 of file IfxQspi_SpiSlave.h.

Collaboration diagram for IfxQspi_SpiSlave:
[legend]
Data Fields
SpiIf | base | Module SPI interface handle.
uint8 | dataWidth | Number of bits which will be written into the FIFO.
IfxQspi_SpiSlave_Dma | dma | Dma handle.
IfxQspi_SpiSlave_ErrorFlags | errorFlags | Spi Slave Error Flags.
boolean | onTransfer | set to TRUE during ongoing transfer
Ifx_QSPI * | qspi | Pointer to QSPI module registers.
SpiIf_Job | rxJob | Rx Stream which has been received.
SpiIf_Job | txJob | Tx Stream which should be sent.

◆ IfxQspi_SpiSlave_Config

struct IfxQspi_SpiSlave_Config

Module configuration structure.

Definition at line 398 of file IfxQspi_SpiSlave.h.

Collaboration diagram for IfxQspi_SpiSlave_Config:
[legend]
Data Fields
boolean | allowSleepMode | Specifies module sleep mode.
SpiIf_Config | base | SPI interface configuration structure.
IfxQspi_SpiSlave_DmaConfig | dma | Dma configuration.
boolean | pauseOnBaudrateSpikeErrors | Specifies module pause on baudrate or spike errors.
IfxQspi_PauseRunTransition | pauseRunTransition | Specifies module run or pause mode.
IFX_CONST IfxQspi_SpiSlave_Pins * | pins | structure for QSPI Slave pins
IfxQspi_SpiSlave_Protocol | protocol |
Ifx_QSPI * | qspi | Pointer to QSPI module registers.
IfxQspi_FifoMode | rxFifoMode | Specifies the receive FIFO mode.
IfxQspi_RxFifoInt | rxFifoThreshold | Specifies the RXFIFO interrupt threshold.
IfxQspi_FifoMode | txFifoMode | Specifies the transfer FIFO mode.
IfxQspi_TxFifoInt | txFifoThreshold | Specifies the TXFIFO interrupt threshold.

Variable Documentation

◆ IfxQspi_SpiSlave_dummyRxValue

IFX_STATIC uint32 IfxQspi_SpiSlave_dummyRxValue = 0

dummy variable where recived data is placed

Definition at line 80 of file IfxQspi_SpiSlave.c.

Referenced by IfxQspi_SpiSlave_write().

◆ IfxQspi_SpiSlave_dummyTxValue

IFX_STATIC IFX_CONST uint32 IfxQspi_SpiSlave_dummyTxValue = ~0

dummy value to be transmitted

Definition at line 84 of file IfxQspi_SpiSlave.c.

Referenced by IfxQspi_SpiSlave_write().


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxQspi_SpiSlave_initModule (IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxQspi_SpiSlave_initModuleConfig (IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiSlave_initModule()

IFX_EXTERN void IfxQspi_SpiSlave_initModule | ( | IfxQspi_SpiSlave * | handle,
 |  | const IfxQspi_SpiSlave_Config * | config
 | ) |  |

Initialises the module.

Parameters
handle | Module handle
config | Predefined configuration structure of the module
Returns
None

Usage example: see How to use the SPI Slave Interface driver?

Definition at line 126 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_initModuleConfig()

IFX_EXTERN void IfxQspi_SpiSlave_initModuleConfig | ( | IfxQspi_SpiSlave_Config * | config,
 |  | Ifx_QSPI * | qspi
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure which should be initialized.
qspi | pointer to QSPI registers
Returns
None

Usage example: see How to use the SPI Slave Interface driver?

Definition at line 352 of file IfxQspi_SpiSlave.c.


iLLD_TC26B: Support Functions

Functions
Support Functions
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Support Functions:

Functions

IFX_STATIC void | IfxQspi_SpiSlave_read (IfxQspi_SpiSlave *handle)
Reads data from the Rx FIFO. More...
IFX_STATIC void | IfxQspi_SpiSlave_write (IfxQspi_SpiSlave *handle)
Writes data into the Tx FIFO. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiSlave_read()

IFX_STATIC void IfxQspi_SpiSlave_read ( IfxQspi_SpiSlave * handle )

Reads data from the Rx FIFO.

Parameters
handle Module handle
Returns
None

Definition at line 484 of file IfxQspi_SpiSlave.c.

Referenced by IfxQspi_SpiSlave_isrReceive().

◆ IfxQspi_SpiSlave_write()

IFX_STATIC void IfxQspi_SpiSlave_write ( IfxQspi_SpiSlave * handle )

Writes data into the Tx FIFO.

Parameters
handle Module handle
Returns
None

Definition at line 529 of file IfxQspi_SpiSlave.c.

Referenced by IfxQspi_SpiSlave_exchange(), and IfxQspi_SpiSlave_isrTransmit().


iLLD_TC26B: Communication

Functions
Communication
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Communication:

Functions

IFX_EXTERN SpiIf_Status | IfxQspi_SpiSlave_exchange (IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiSlave_getStatus (IfxQspi_SpiSlave *handle)
Gets the transmission status. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiSlave_exchange()

IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_exchange | ( | IfxQspi_SpiSlave * | handle,
 |  | const void * | src,
 |  | void * | dest,
 |  | Ifx_SizeT | count
 | ) |  |

Exchanges data between source and data.

Parameters
handle | Module handle
src | Source of data. Can be set to NULL_PTR if nothing to receive (transmit only)
dest | Destination to which to be sent. Can be set to NULL_PTR if nothing to transmit (receive only) - in this case, all-1 will be sent.
count | Number of data in pending
Returns
Status of exchange of data

Usage example: see How to use the SPI Slave Interface driver?

Definition at line 92 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_getStatus()

IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_getStatus ( IfxQspi_SpiSlave * handle )

Gets the transmission status.

Parameters
handle Module handle
Returns
Transmission status

Usage example: see How to use the SPI Slave Interface driver?

Definition at line 113 of file IfxQspi_SpiSlave.c.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN void | IfxQspi_SpiSlave_isrDmaReceive (IfxQspi_SpiSlave *qspiHandle)
Dma receive interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrDmaTransmit (IfxQspi_SpiSlave *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrError (IfxQspi_SpiSlave *handle)
Error Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrReceive (IfxQspi_SpiSlave *handle)
Receive Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrTransmit (IfxQspi_SpiSlave *handle)
Transmit interrupt handler. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiSlave_isrDmaReceive()

IFX_EXTERN void IfxQspi_SpiSlave_isrDmaReceive ( IfxQspi_SpiSlave * qspiHandle )

Dma receive interrupt handler.

Parameters
qspiHandle Module handle
Returns
None

Definition at line 381 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_isrDmaTransmit()

IFX_EXTERN void IfxQspi_SpiSlave_isrDmaTransmit ( IfxQspi_SpiSlave * qspiHandle )

Transmit interrupt handler.

Parameters
qspiHandle Module handle
Returns
None

Definition at line 395 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_isrError()

IFX_EXTERN void IfxQspi_SpiSlave_isrError ( IfxQspi_SpiSlave * handle )

Error Interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 405 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_isrReceive()

IFX_EXTERN void IfxQspi_SpiSlave_isrReceive ( IfxQspi_SpiSlave * handle )

Receive Interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 472 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_isrTransmit()

IFX_EXTERN void IfxQspi_SpiSlave_isrTransmit ( IfxQspi_SpiSlave * handle )

Transmit interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 478 of file IfxQspi_SpiSlave.c.


iLLD_TC26B: Direct FIFO Access

Functions
Direct FIFO Access
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Direct FIFO Access:

Functions

IFX_INLINE uint32 | IfxQspi_SpiSlave_readReceiveFifo (IfxQspi_SpiSlave *handle)
Reads data or status in RxFIFO. More...
IFX_INLINE void | IfxQspi_SpiSlave_writeTransmitFifo (IfxQspi_SpiSlave *handle, uint32 data)
Writes the data to TxFIFO. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiSlave_readReceiveFifo()

IFX_INLINE uint32 IfxQspi_SpiSlave_readReceiveFifo ( IfxQspi_SpiSlave * handle )

Reads data or status in RxFIFO.

Parameters
handle QSpi Slave handle
Returns
Data or Status in RxFIFO

Definition at line 540 of file IfxQspi_SpiSlave.h.

◆ IfxQspi_SpiSlave_writeTransmitFifo()

IFX_INLINE void IfxQspi_SpiSlave_writeTransmitFifo | ( | IfxQspi_SpiSlave * | handle,
 |  | uint32 | data
 | ) |  |

Writes the data to TxFIFO.

Parameters
handle | QSpi slave handle
data | Data to be entered in Tx FIFO
Returns
None

Definition at line 548 of file IfxQspi_SpiSlave.h.


iLLD_TC26B: IfxQspi_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxQspi_cfg.h File Reference
iLLD » QSPI

QSPI on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxQspi_reg.h"
Include dependency graph for IfxQspi_cfg.h:

Go to the source code of this file.

Macros

#define | IFXQSPI_HWFIFO_DEPTH (4)
#define | IFXQSPI_NUM_MODULES (4)
#define | IFXQSPI_NUM_CHANNELS (16)

Enumerations

enum IfxQspi_Index {
IfxQspi_Index_none = -1,
IfxQspi_Index_0 = 0,
IfxQspi_Index_1,
IfxQspi_Index_2,
IfxQspi_Index_3
}
List of the available QSPI resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap [IFXQSPI_NUM_MODULES]

Detailed Description

QSPI on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi_cfg.h.

Macro Definition Documentation

◆ IFXQSPI_HWFIFO_DEPTH

#define IFXQSPI_HWFIFO_DEPTH (4)

Definition at line 67 of file IfxQspi_cfg.h.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_write().

◆ IFXQSPI_NUM_CHANNELS

#define IFXQSPI_NUM_CHANNELS (16)

Definition at line 71 of file IfxQspi_cfg.h.

◆ IFXQSPI_NUM_MODULES

#define IFXQSPI_NUM_MODULES (4)

Definition at line 69 of file IfxQspi_cfg.h.

Referenced by IfxQspi_getAddress(), and IfxQspi_getIndex().

Enumeration Type Documentation

◆ IfxQspi_Index

enum IfxQspi_Index

List of the available QSPI resources.

Enumerator
IfxQspi_Index_none | Not Selected.
IfxQspi_Index_0 | QSPI index 0.
IfxQspi_Index_1 | QSPI index 1.
IfxQspi_Index_2 | QSPI index 2.
IfxQspi_Index_3 | QSPI index 3.

Definition at line 79 of file IfxQspi_cfg.h.

Variable Documentation

◆ IfxQspi_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES]

Definition at line 91 of file IfxQspi_cfg.h.


iLLD_TC26B: IfxQspi_PinMap.c File Reference

  • _PinMap
Variables
IfxQspi_PinMap.c File Reference
iLLD » QSPI

QSPI I/O map. More...

#include "IfxQspi_PinMap.h"
Include dependency graph for IfxQspi_PinMap.c:

Go to the source code of this file.

Variables

IfxQspi_Hsicin_In | IfxQspi2_HSICINA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a}
IfxQspi_Hsicin_In | IfxQspi2_HSICINB_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_b}
IfxQspi_Hsicin_In | IfxQspi3_HSICINA_P33_9_IN = {&MODULE_QSPI3, {&MODULE_P33, 9}, Ifx_RxSel_a}
IfxQspi_Hsicin_In | IfxQspi3_HSICINB_P33_10_IN = {&MODULE_QSPI3, {&MODULE_P33,10}, Ifx_RxSel_b}
IfxQspi_Mrst_In | IfxQspi0_MRSTA_P20_12_IN = {&MODULE_QSPI0, {&MODULE_P20,12}, Ifx_RxSel_a}
IfxQspi_Mrst_In | IfxQspi1_MRSTA_P10_1_IN = {&MODULE_QSPI1, {&MODULE_P10, 1}, Ifx_RxSel_a}
IfxQspi_Mrst_In | IfxQspi1_MRSTB_P11_3_IN = {&MODULE_QSPI1, {&MODULE_P11, 3}, Ifx_RxSel_b}
IfxQspi_Mrst_In | IfxQspi2_MRSTA_P15_4_IN = {&MODULE_QSPI2, {&MODULE_P15, 4}, Ifx_RxSel_a}
IfxQspi_Mrst_In | IfxQspi2_MRSTB_P15_7_IN = {&MODULE_QSPI2, {&MODULE_P15, 7}, Ifx_RxSel_b}
IfxQspi_Mrst_In | IfxQspi2_MRSTCN_P21_2_IN = {&MODULE_QSPI2, {&MODULE_P21, 2}, Ifx_RxSel_c}
IfxQspi_Mrst_In | IfxQspi2_MRSTCP_P21_3_IN = {&MODULE_QSPI2, {&MODULE_P21, 3}, Ifx_RxSel_c}
IfxQspi_Mrst_In | IfxQspi2_MRSTE_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_e}
IfxQspi_Mrst_In | IfxQspi3_MRSTA_P02_5_IN = {&MODULE_QSPI3, {&MODULE_P02, 5}, Ifx_RxSel_a}
IfxQspi_Mrst_In | IfxQspi3_MRSTB_P10_7_IN = {&MODULE_QSPI3, {&MODULE_P10, 7}, Ifx_RxSel_b}
IfxQspi_Mrst_In | IfxQspi3_MRSTD_P33_13_IN = {&MODULE_QSPI3, {&MODULE_P33,13}, Ifx_RxSel_d}
IfxQspi_Mrst_In | IfxQspi3_MRSTE_P22_1_IN = {&MODULE_QSPI3, {&MODULE_P22, 1}, Ifx_RxSel_e}
IfxQspi_Mrst_In | IfxQspi3_MRSTFN_P21_2_IN = {&MODULE_QSPI3, {&MODULE_P21, 2}, Ifx_RxSel_f}
IfxQspi_Mrst_In | IfxQspi3_MRSTFP_P21_3_IN = {&MODULE_QSPI3, {&MODULE_P21, 3}, Ifx_RxSel_f}
IfxQspi_Mrst_Out | IfxQspi0_MRST_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi1_MRST_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi1_MRST_P10_6_OUT = {&MODULE_QSPI1, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt6}
IfxQspi_Mrst_Out | IfxQspi1_MRST_P11_3_OUT = {&MODULE_QSPI1, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi2_MRST_P15_4_OUT = {&MODULE_QSPI2, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi2_MRST_P15_7_OUT = {&MODULE_QSPI2, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi3_MRST_P02_5_OUT = {&MODULE_QSPI3, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi3_MRST_P10_7_OUT = {&MODULE_QSPI3, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi3_MRST_P22_1_OUT = {&MODULE_QSPI3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi3_MRST_P33_13_OUT = {&MODULE_QSPI3, {&MODULE_P33,13}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_In | IfxQspi0_MTSRA_P20_14_IN = {&MODULE_QSPI0, {&MODULE_P20,14}, Ifx_RxSel_a}
IfxQspi_Mtsr_In | IfxQspi1_MTSRA_P10_3_IN = {&MODULE_QSPI1, {&MODULE_P10, 3}, Ifx_RxSel_a}
IfxQspi_Mtsr_In | IfxQspi1_MTSRB_P11_9_IN = {&MODULE_QSPI1, {&MODULE_P11, 9}, Ifx_RxSel_b}
IfxQspi_Mtsr_In | IfxQspi1_MTSRC_P10_4_IN = {&MODULE_QSPI1, {&MODULE_P10, 4}, Ifx_RxSel_c}
IfxQspi_Mtsr_In | IfxQspi2_MTSRA_P15_5_IN = {&MODULE_QSPI2, {&MODULE_P15, 5}, Ifx_RxSel_a}
IfxQspi_Mtsr_In | IfxQspi2_MTSRB_P15_6_IN = {&MODULE_QSPI2, {&MODULE_P15, 6}, Ifx_RxSel_b}
IfxQspi_Mtsr_In | IfxQspi3_MTSRA_P02_6_IN = {&MODULE_QSPI3, {&MODULE_P02, 6}, Ifx_RxSel_a}
IfxQspi_Mtsr_In | IfxQspi3_MTSRB_P10_6_IN = {&MODULE_QSPI3, {&MODULE_P10, 6}, Ifx_RxSel_b}
IfxQspi_Mtsr_In | IfxQspi3_MTSRD_P33_12_IN = {&MODULE_QSPI3, {&MODULE_P33,12}, Ifx_RxSel_d}
IfxQspi_Mtsr_In | IfxQspi3_MTSRE_P22_0_IN = {&MODULE_QSPI3, {&MODULE_P22, 0}, Ifx_RxSel_e}
IfxQspi_Mtsr_Out | IfxQspi0_MTSR_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt4}
IfxQspi_Mtsr_Out | IfxQspi0_MTSR_P20_14_OUT = {&MODULE_QSPI0, {&MODULE_P20,14}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi1_MTSR_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt2}
IfxQspi_Mtsr_Out | IfxQspi1_MTSR_P10_3_OUT = {&MODULE_QSPI1, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi1_MTSR_P10_4_OUT = {&MODULE_QSPI1, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt4}
IfxQspi_Mtsr_Out | IfxQspi1_MTSR_P11_9_OUT = {&MODULE_QSPI1, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi2_MTSRN_P13_2_OUT = {&MODULE_QSPI2, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi2_MTSRP_P13_3_OUT = {&MODULE_QSPI2, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi2_MTSR_P15_5_OUT = {&MODULE_QSPI2, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi2_MTSR_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi3_MTSRN_P22_2_OUT = {&MODULE_QSPI3, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt4}
IfxQspi_Mtsr_Out | IfxQspi3_MTSRP_P22_3_OUT = {&MODULE_QSPI3, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt4}
IfxQspi_Mtsr_Out | IfxQspi3_MTSR_P02_6_OUT = {&MODULE_QSPI3, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi3_MTSR_P10_6_OUT = {&MODULE_QSPI3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi3_MTSR_P22_0_OUT = {&MODULE_QSPI3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi3_MTSR_P33_12_OUT = {&MODULE_QSPI3, {&MODULE_P33,12}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_In | IfxQspi0_SCLKA_P20_11_IN = {&MODULE_QSPI0, {&MODULE_P20,11}, Ifx_RxSel_a}
IfxQspi_Sclk_In | IfxQspi1_SCLKA_P10_2_IN = {&MODULE_QSPI1, {&MODULE_P10, 2}, Ifx_RxSel_a}
IfxQspi_Sclk_In | IfxQspi1_SCLKB_P11_6_IN = {&MODULE_QSPI1, {&MODULE_P11, 6}, Ifx_RxSel_b}
IfxQspi_Sclk_In | IfxQspi2_SCLKA_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_a}
IfxQspi_Sclk_In | IfxQspi2_SCLKB_P15_8_IN = {&MODULE_QSPI2, {&MODULE_P15, 8}, Ifx_RxSel_b}
IfxQspi_Sclk_In | IfxQspi3_SCLKA_P02_7_IN = {&MODULE_QSPI3, {&MODULE_P02, 7}, Ifx_RxSel_a}
IfxQspi_Sclk_In | IfxQspi3_SCLKB_P10_8_IN = {&MODULE_QSPI3, {&MODULE_P10, 8}, Ifx_RxSel_b}
IfxQspi_Sclk_In | IfxQspi3_SCLKD_P33_11_IN = {&MODULE_QSPI3, {&MODULE_P33,11}, Ifx_RxSel_d}
IfxQspi_Sclk_In | IfxQspi3_SCLKE_P22_3_IN = {&MODULE_QSPI3, {&MODULE_P22, 3}, Ifx_RxSel_e}
IfxQspi_Sclk_Out | IfxQspi0_SCLK_P20_11_OUT = {&MODULE_QSPI0, {&MODULE_P20,11}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi0_SCLK_P20_13_OUT = {&MODULE_QSPI0, {&MODULE_P20,13}, IfxPort_OutputIdx_alt5}
IfxQspi_Sclk_Out | IfxQspi1_SCLK_P10_2_OUT = {&MODULE_QSPI1, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi1_SCLK_P11_6_OUT = {&MODULE_QSPI1, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi2_SCLKN_P13_0_OUT = {&MODULE_QSPI2, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi2_SCLKP_P13_1_OUT = {&MODULE_QSPI2, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi2_SCLK_P15_3_OUT = {&MODULE_QSPI2, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi2_SCLK_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt5}
IfxQspi_Sclk_Out | IfxQspi2_SCLK_P15_8_OUT = {&MODULE_QSPI2, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi3_SCLKN_P22_0_OUT = {&MODULE_QSPI3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt4}
IfxQspi_Sclk_Out | IfxQspi3_SCLKP_P22_1_OUT = {&MODULE_QSPI3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt4}
IfxQspi_Sclk_Out | IfxQspi3_SCLK_P02_7_OUT = {&MODULE_QSPI3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi3_SCLK_P10_8_OUT = {&MODULE_QSPI3, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi3_SCLK_P22_3_OUT = {&MODULE_QSPI3, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi3_SCLK_P33_11_OUT = {&MODULE_QSPI3, {&MODULE_P33,11}, IfxPort_OutputIdx_alt3}
IfxQspi_Slsi_In | IfxQspi0_SLSIA_P20_13_IN = {&MODULE_QSPI0, {&MODULE_P20,13}, Ifx_RxSel_a}
IfxQspi_Slsi_In | IfxQspi0_SLSIB_P20_9_IN = {&MODULE_QSPI0, {&MODULE_P20, 9}, Ifx_RxSel_b}
IfxQspi_Slsi_In | IfxQspi1_SLSIA_P11_10_IN = {&MODULE_QSPI1, {&MODULE_P11,10}, Ifx_RxSel_a}
IfxQspi_Slsi_In | IfxQspi2_SLSIA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a}
IfxQspi_Slsi_In | IfxQspi2_SLSIB_P15_1_IN = {&MODULE_QSPI2, {&MODULE_P15, 1}, Ifx_RxSel_b}
IfxQspi_Slsi_In | IfxQspi3_SLSIA_P02_4_IN = {&MODULE_QSPI3, {&MODULE_P02, 4}, Ifx_RxSel_a}
IfxQspi_Slsi_In | IfxQspi3_SLSIC_P33_10_IN = {&MODULE_QSPI3, {&MODULE_P33,10}, Ifx_RxSel_c}
IfxQspi_Slsi_In | IfxQspi3_SLSID_P22_2_IN = {&MODULE_QSPI3, {&MODULE_P22, 2}, Ifx_RxSel_d}
IfxQspi_Slso_Out | IfxQspi0_SLSO0_P20_8_OUT = {&MODULE_QSPI0, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO13_P15_0_OUT = {&MODULE_QSPI0, 13, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO1_P20_9_OUT = {&MODULE_QSPI0, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO2_P20_13_OUT = {&MODULE_QSPI0, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO3_P11_10_OUT = {&MODULE_QSPI0, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO4_P11_11_OUT = {&MODULE_QSPI0, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO5_P11_2_OUT = {&MODULE_QSPI0, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO6_P20_10_OUT = {&MODULE_QSPI0, 6, {&MODULE_P20,10}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO7_P33_5_OUT = {&MODULE_QSPI0, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi0_SLSO8_P20_6_OUT = {&MODULE_QSPI0, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO9_P20_3_OUT = {&MODULE_QSPI0, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi1_SLSO0_P20_8_OUT = {&MODULE_QSPI1, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO10_P10_0_OUT = {&MODULE_QSPI1, 10, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi1_SLSO1_P20_9_OUT = {&MODULE_QSPI1, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO2_P20_13_OUT = {&MODULE_QSPI1, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO3_P11_10_OUT = {&MODULE_QSPI1, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO4_P11_11_OUT = {&MODULE_QSPI1, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO5_P11_2_OUT = {&MODULE_QSPI1, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO6_P33_10_OUT = {&MODULE_QSPI1, 6, {&MODULE_P33,10}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi1_SLSO7_P33_5_OUT = {&MODULE_QSPI1, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi1_SLSO8_P10_4_OUT = {&MODULE_QSPI1, 8, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi1_SLSO9_P10_5_OUT = {&MODULE_QSPI1, 9, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi2_SLSO0_P15_2_OUT = {&MODULE_QSPI2, 0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO1_P14_2_OUT = {&MODULE_QSPI2, 1, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO2_P14_6_OUT = {&MODULE_QSPI2, 2, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO3_P14_3_OUT = {&MODULE_QSPI2, 3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO4_P14_7_OUT = {&MODULE_QSPI2, 4, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO5_P15_1_OUT = {&MODULE_QSPI2, 5, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO6_P33_13_OUT = {&MODULE_QSPI2, 6, {&MODULE_P33,13}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi2_SLSO7_P20_10_OUT = {&MODULE_QSPI2, 7, {&MODULE_P20,10}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi2_SLSO8_P20_6_OUT = {&MODULE_QSPI2, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi2_SLSO9_P20_3_OUT = {&MODULE_QSPI2, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi3_SLSO0_P02_4_OUT = {&MODULE_QSPI3, 0, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO11_P33_10_OUT = {&MODULE_QSPI3, 11, {&MODULE_P33,10}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO12_P22_2_OUT = {&MODULE_QSPI3, 12, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO13_P23_1_OUT = {&MODULE_QSPI3, 13, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO1_P02_0_OUT = {&MODULE_QSPI3, 1, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO1_P33_9_OUT = {&MODULE_QSPI3, 1, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO2_P02_1_OUT = {&MODULE_QSPI3, 2, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO2_P33_8_OUT = {&MODULE_QSPI3, 2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO3_P02_2_OUT = {&MODULE_QSPI3, 3, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO4_P02_3_OUT = {&MODULE_QSPI3, 4, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO4_P23_5_OUT = {&MODULE_QSPI3, 4, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO5_P02_8_OUT = {&MODULE_QSPI3, 5, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi3_SLSO5_P23_4_OUT = {&MODULE_QSPI3, 5, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO6_P00_8_OUT = {&MODULE_QSPI3, 6, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi3_SLSO7_P00_9_OUT = {&MODULE_QSPI3, 7, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi3_SLSO7_P33_7_OUT = {&MODULE_QSPI3, 7, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO8_P10_5_OUT = {&MODULE_QSPI3, 8, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt3}
const IfxQspi_Hsicin_In * | IfxQspi_Hsicin_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS]
const IfxQspi_Mrst_In * | IfxQspi_Mrst_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]
const IfxQspi_Mrst_Out * | IfxQspi_Mrst_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
const IfxQspi_Mtsr_In * | IfxQspi_Mtsr_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]
const IfxQspi_Mtsr_Out * | IfxQspi_Mtsr_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]
const IfxQspi_Sclk_In * | IfxQspi_Sclk_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]
const IfxQspi_Sclk_Out * | IfxQspi_Sclk_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]
const IfxQspi_Slsi_In * | IfxQspi_Slsi_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
const IfxQspi_Slso_Out * | IfxQspi_Slso_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]

Detailed Description

QSPI I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi_PinMap.c.

Variable Documentation

◆ IfxQspi0_MRST_P20_12_OUT

IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt3}

Definition at line 63 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MRSTA_P20_12_IN

IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN = {&MODULE_QSPI0, {&MODULE_P20,12}, Ifx_RxSel_a}

Definition at line 49 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MTSR_P20_12_OUT

IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt4}

Definition at line 83 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MTSR_P20_14_OUT

IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT = {&MODULE_QSPI0, {&MODULE_P20,14}, IfxPort_OutputIdx_alt3}

Definition at line 84 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MTSRA_P20_14_IN

IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN = {&MODULE_QSPI0, {&MODULE_P20,14}, Ifx_RxSel_a}

Definition at line 73 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SCLK_P20_11_OUT

IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT = {&MODULE_QSPI0, {&MODULE_P20,11}, IfxPort_OutputIdx_alt3}

Definition at line 108 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SCLK_P20_13_OUT

IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT = {&MODULE_QSPI0, {&MODULE_P20,13}, IfxPort_OutputIdx_alt5}

Definition at line 109 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SCLKA_P20_11_IN

IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN = {&MODULE_QSPI0, {&MODULE_P20,11}, Ifx_RxSel_a}

Definition at line 99 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSIA_P20_13_IN

IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN = {&MODULE_QSPI0, {&MODULE_P20,13}, Ifx_RxSel_a}

Definition at line 123 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSIB_P20_9_IN

IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN = {&MODULE_QSPI0, {&MODULE_P20, 9}, Ifx_RxSel_b}

Definition at line 124 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO0_P20_8_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT = {&MODULE_QSPI0, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt3}

Definition at line 131 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO13_P15_0_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT = {&MODULE_QSPI0, 13, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt3}

Definition at line 132 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO1_P20_9_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT = {&MODULE_QSPI0, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt3}

Definition at line 133 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO2_P20_13_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT = {&MODULE_QSPI0, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt3}

Definition at line 134 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO3_P11_10_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT = {&MODULE_QSPI0, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt3}

Definition at line 135 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO4_P11_11_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT = {&MODULE_QSPI0, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt3}

Definition at line 136 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO5_P11_2_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT = {&MODULE_QSPI0, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt3}

Definition at line 137 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO6_P20_10_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT = {&MODULE_QSPI0, 6, {&MODULE_P20,10}, IfxPort_OutputIdx_alt3}

Definition at line 138 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO7_P33_5_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT = {&MODULE_QSPI0, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt2}

Definition at line 139 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO8_P20_6_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT = {&MODULE_QSPI0, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt3}

Definition at line 140 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO9_P20_3_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT = {&MODULE_QSPI0, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt3}

Definition at line 141 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MRST_P10_1_OUT

IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt3}

Definition at line 64 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MRST_P10_6_OUT

IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT = {&MODULE_QSPI1, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt6}

Definition at line 65 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MRST_P11_3_OUT

IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT = {&MODULE_QSPI1, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt3}

Definition at line 66 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MRSTA_P10_1_IN

IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN = {&MODULE_QSPI1, {&MODULE_P10, 1}, Ifx_RxSel_a}

Definition at line 50 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MRSTB_P11_3_IN

IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN = {&MODULE_QSPI1, {&MODULE_P11, 3}, Ifx_RxSel_b}

Definition at line 51 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSR_P10_1_OUT

IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt2}

Definition at line 85 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSR_P10_3_OUT

IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT = {&MODULE_QSPI1, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt3}

Definition at line 86 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSR_P10_4_OUT

IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT = {&MODULE_QSPI1, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt4}

Definition at line 87 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSR_P11_9_OUT

IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT = {&MODULE_QSPI1, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt3}

Definition at line 88 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSRA_P10_3_IN

IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN = {&MODULE_QSPI1, {&MODULE_P10, 3}, Ifx_RxSel_a}

Definition at line 74 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSRB_P11_9_IN

IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN = {&MODULE_QSPI1, {&MODULE_P11, 9}, Ifx_RxSel_b}

Definition at line 75 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSRC_P10_4_IN

IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN = {&MODULE_QSPI1, {&MODULE_P10, 4}, Ifx_RxSel_c}

Definition at line 76 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SCLK_P10_2_OUT

IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT = {&MODULE_QSPI1, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt3}

Definition at line 110 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SCLK_P11_6_OUT

IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT = {&MODULE_QSPI1, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt3}

Definition at line 111 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SCLKA_P10_2_IN

IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN = {&MODULE_QSPI1, {&MODULE_P10, 2}, Ifx_RxSel_a}

Definition at line 100 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SCLKB_P11_6_IN

IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN = {&MODULE_QSPI1, {&MODULE_P11, 6}, Ifx_RxSel_b}

Definition at line 101 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSIA_P11_10_IN

IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN = {&MODULE_QSPI1, {&MODULE_P11,10}, Ifx_RxSel_a}

Definition at line 125 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO0_P20_8_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT = {&MODULE_QSPI1, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt4}

Definition at line 142 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO10_P10_0_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT = {&MODULE_QSPI1, 10, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt3}

Definition at line 143 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO1_P20_9_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT = {&MODULE_QSPI1, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt4}

Definition at line 144 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO2_P20_13_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT = {&MODULE_QSPI1, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt4}

Definition at line 145 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO3_P11_10_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT = {&MODULE_QSPI1, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt4}

Definition at line 146 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO4_P11_11_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT = {&MODULE_QSPI1, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt4}

Definition at line 147 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO5_P11_2_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT = {&MODULE_QSPI1, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt4}

Definition at line 148 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO6_P33_10_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT = {&MODULE_QSPI1, 6, {&MODULE_P33,10}, IfxPort_OutputIdx_alt2}

Definition at line 149 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO7_P33_5_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT = {&MODULE_QSPI1, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt3}

Definition at line 150 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO8_P10_4_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT = {&MODULE_QSPI1, 8, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt3}

Definition at line 151 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO9_P10_5_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT = {&MODULE_QSPI1, 9, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt4}

Definition at line 152 of file IfxQspi_PinMap.c.

◆ IfxQspi2_HSICINA_P15_2_IN

IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a}

Definition at line 45 of file IfxQspi_PinMap.c.

◆ IfxQspi2_HSICINB_P15_3_IN

IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_b}

Definition at line 46 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRST_P15_4_OUT

IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT = {&MODULE_QSPI2, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt3}

Definition at line 67 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRST_P15_7_OUT

IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT = {&MODULE_QSPI2, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt3}

Definition at line 68 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTA_P15_4_IN

IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN = {&MODULE_QSPI2, {&MODULE_P15, 4}, Ifx_RxSel_a}

Definition at line 52 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTB_P15_7_IN

IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN = {&MODULE_QSPI2, {&MODULE_P15, 7}, Ifx_RxSel_b}

Definition at line 53 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTCN_P21_2_IN

IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN = {&MODULE_QSPI2, {&MODULE_P21, 2}, Ifx_RxSel_c}

Definition at line 54 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTCP_P21_3_IN

IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN = {&MODULE_QSPI2, {&MODULE_P21, 3}, Ifx_RxSel_c}

Definition at line 55 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTE_P15_2_IN

IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_e}

Definition at line 56 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSR_P15_5_OUT

IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT = {&MODULE_QSPI2, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt3}

Definition at line 91 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSR_P15_6_OUT

IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt3}

Definition at line 92 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSRA_P15_5_IN

IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN = {&MODULE_QSPI2, {&MODULE_P15, 5}, Ifx_RxSel_a}

Definition at line 77 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSRB_P15_6_IN

IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN = {&MODULE_QSPI2, {&MODULE_P15, 6}, Ifx_RxSel_b}

Definition at line 78 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSRN_P13_2_OUT

IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT = {&MODULE_QSPI2, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt3}

Definition at line 89 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSRP_P13_3_OUT

IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT = {&MODULE_QSPI2, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt3}

Definition at line 90 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLK_P15_3_OUT

IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT = {&MODULE_QSPI2, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt3}

Definition at line 114 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLK_P15_6_OUT

IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt5}

Definition at line 115 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLK_P15_8_OUT

IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT = {&MODULE_QSPI2, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt3}

Definition at line 116 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLKA_P15_3_IN

IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_a}

Definition at line 102 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLKB_P15_8_IN

IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN = {&MODULE_QSPI2, {&MODULE_P15, 8}, Ifx_RxSel_b}

Definition at line 103 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLKN_P13_0_OUT

IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT = {&MODULE_QSPI2, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt3}

Definition at line 112 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLKP_P13_1_OUT

IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT = {&MODULE_QSPI2, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt3}

Definition at line 113 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSIA_P15_2_IN

IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a}

Definition at line 126 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSIB_P15_1_IN

IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN = {&MODULE_QSPI2, {&MODULE_P15, 1}, Ifx_RxSel_b}

Definition at line 127 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO0_P15_2_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT = {&MODULE_QSPI2, 0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt3}

Definition at line 153 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO1_P14_2_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT = {&MODULE_QSPI2, 1, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt3}

Definition at line 154 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO2_P14_6_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT = {&MODULE_QSPI2, 2, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt3}

Definition at line 155 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO3_P14_3_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT = {&MODULE_QSPI2, 3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt3}

Definition at line 156 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO4_P14_7_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT = {&MODULE_QSPI2, 4, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt3}

Definition at line 157 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO5_P15_1_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT = {&MODULE_QSPI2, 5, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt3}

Definition at line 158 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO6_P33_13_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT = {&MODULE_QSPI2, 6, {&MODULE_P33,13}, IfxPort_OutputIdx_alt4}

Definition at line 159 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO7_P20_10_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT = {&MODULE_QSPI2, 7, {&MODULE_P20,10}, IfxPort_OutputIdx_alt4}

Definition at line 160 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO8_P20_6_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT = {&MODULE_QSPI2, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt4}

Definition at line 161 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO9_P20_3_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT = {&MODULE_QSPI2, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt4}

Definition at line 162 of file IfxQspi_PinMap.c.

◆ IfxQspi3_HSICINA_P33_9_IN

IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN = {&MODULE_QSPI3, {&MODULE_P33, 9}, Ifx_RxSel_a}

Definition at line 47 of file IfxQspi_PinMap.c.

◆ IfxQspi3_HSICINB_P33_10_IN

IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN = {&MODULE_QSPI3, {&MODULE_P33,10}, Ifx_RxSel_b}

Definition at line 48 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRST_P02_5_OUT

IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT = {&MODULE_QSPI3, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt3}

Definition at line 69 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRST_P10_7_OUT

IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT = {&MODULE_QSPI3, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt3}

Definition at line 70 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRST_P22_1_OUT

IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT = {&MODULE_QSPI3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt3}

Definition at line 71 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRST_P33_13_OUT

IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT = {&MODULE_QSPI3, {&MODULE_P33,13}, IfxPort_OutputIdx_alt3}

Definition at line 72 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRSTA_P02_5_IN

IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN = {&MODULE_QSPI3, {&MODULE_P02, 5}, Ifx_RxSel_a}

Definition at line 57 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRSTB_P10_7_IN

IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN = {&MODULE_QSPI3, {&MODULE_P10, 7}, Ifx_RxSel_b}

Definition at line 58 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRSTD_P33_13_IN

IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN = {&MODULE_QSPI3, {&MODULE_P33,13}, Ifx_RxSel_d}

Definition at line 59 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRSTE_P22_1_IN

IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN = {&MODULE_QSPI3, {&MODULE_P22, 1}, Ifx_RxSel_e}

Definition at line 60 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRSTFN_P21_2_IN

IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN = {&MODULE_QSPI3, {&MODULE_P21, 2}, Ifx_RxSel_f}

Definition at line 61 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRSTFP_P21_3_IN

IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN = {&MODULE_QSPI3, {&MODULE_P21, 3}, Ifx_RxSel_f}

Definition at line 62 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSR_P02_6_OUT

IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT = {&MODULE_QSPI3, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt3}

Definition at line 95 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSR_P10_6_OUT

IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT = {&MODULE_QSPI3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt3}

Definition at line 96 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSR_P22_0_OUT

IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT = {&MODULE_QSPI3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt3}

Definition at line 97 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSR_P33_12_OUT

IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT = {&MODULE_QSPI3, {&MODULE_P33,12}, IfxPort_OutputIdx_alt3}

Definition at line 98 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSRA_P02_6_IN

IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN = {&MODULE_QSPI3, {&MODULE_P02, 6}, Ifx_RxSel_a}

Definition at line 79 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSRB_P10_6_IN

IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN = {&MODULE_QSPI3, {&MODULE_P10, 6}, Ifx_RxSel_b}

Definition at line 80 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSRD_P33_12_IN

IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN = {&MODULE_QSPI3, {&MODULE_P33,12}, Ifx_RxSel_d}

Definition at line 81 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSRE_P22_0_IN

IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN = {&MODULE_QSPI3, {&MODULE_P22, 0}, Ifx_RxSel_e}

Definition at line 82 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSRN_P22_2_OUT

IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT = {&MODULE_QSPI3, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt4}

Definition at line 93 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSRP_P22_3_OUT

IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT = {&MODULE_QSPI3, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt4}

Definition at line 94 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLK_P02_7_OUT

IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT = {&MODULE_QSPI3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt3}

Definition at line 119 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLK_P10_8_OUT

IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT = {&MODULE_QSPI3, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt3}

Definition at line 120 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLK_P22_3_OUT

IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT = {&MODULE_QSPI3, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt3}

Definition at line 121 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLK_P33_11_OUT

IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT = {&MODULE_QSPI3, {&MODULE_P33,11}, IfxPort_OutputIdx_alt3}

Definition at line 122 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLKA_P02_7_IN

IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN = {&MODULE_QSPI3, {&MODULE_P02, 7}, Ifx_RxSel_a}

Definition at line 104 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLKB_P10_8_IN

IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN = {&MODULE_QSPI3, {&MODULE_P10, 8}, Ifx_RxSel_b}

Definition at line 105 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLKD_P33_11_IN

IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN = {&MODULE_QSPI3, {&MODULE_P33,11}, Ifx_RxSel_d}

Definition at line 106 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLKE_P22_3_IN

IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN = {&MODULE_QSPI3, {&MODULE_P22, 3}, Ifx_RxSel_e}

Definition at line 107 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLKN_P22_0_OUT

IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT = {&MODULE_QSPI3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt4}

Definition at line 117 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLKP_P22_1_OUT

IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT = {&MODULE_QSPI3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt4}

Definition at line 118 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSIA_P02_4_IN

IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN = {&MODULE_QSPI3, {&MODULE_P02, 4}, Ifx_RxSel_a}

Definition at line 128 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSIC_P33_10_IN

IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN = {&MODULE_QSPI3, {&MODULE_P33,10}, Ifx_RxSel_c}

Definition at line 129 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSID_P22_2_IN

IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN = {&MODULE_QSPI3, {&MODULE_P22, 2}, Ifx_RxSel_d}

Definition at line 130 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO0_P02_4_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT = {&MODULE_QSPI3, 0, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt3}

Definition at line 163 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO11_P33_10_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT = {&MODULE_QSPI3, 11, {&MODULE_P33,10}, IfxPort_OutputIdx_alt3}

Definition at line 164 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO12_P22_2_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT = {&MODULE_QSPI3, 12, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt3}

Definition at line 165 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO13_P23_1_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT = {&MODULE_QSPI3, 13, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt3}

Definition at line 166 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO1_P02_0_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT = {&MODULE_QSPI3, 1, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt3}

Definition at line 167 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO1_P33_9_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT = {&MODULE_QSPI3, 1, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt3}

Definition at line 168 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO2_P02_1_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT = {&MODULE_QSPI3, 2, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt3}

Definition at line 169 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO2_P33_8_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT = {&MODULE_QSPI3, 2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt3}

Definition at line 170 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO3_P02_2_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT = {&MODULE_QSPI3, 3, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt3}

Definition at line 171 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO4_P02_3_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT = {&MODULE_QSPI3, 4, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt3}

Definition at line 172 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO4_P23_5_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT = {&MODULE_QSPI3, 4, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt3}

Definition at line 173 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO5_P02_8_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT = {&MODULE_QSPI3, 5, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt2}

Definition at line 174 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO5_P23_4_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT = {&MODULE_QSPI3, 5, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt3}

Definition at line 175 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO6_P00_8_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT = {&MODULE_QSPI3, 6, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt2}

Definition at line 176 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO7_P00_9_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT = {&MODULE_QSPI3, 7, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt2}

Definition at line 177 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO7_P33_7_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT = {&MODULE_QSPI3, 7, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt3}

Definition at line 178 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO8_P10_5_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT = {&MODULE_QSPI3, 8, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt3}

Definition at line 179 of file IfxQspi_PinMap.c.

◆ IfxQspi_Hsicin_In_pinTable

const IfxQspi_Hsicin_In* IfxQspi_Hsicin_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS]
Initial value:
= {
{
NULL_PTR,
NULL_PTR
},
{
NULL_PTR,
NULL_PTR
},
{
&IfxQspi2_HSICINA_P15_2_IN,
&IfxQspi2_HSICINB_P15_3_IN
},
{
&IfxQspi3_HSICINA_P33_9_IN,
&IfxQspi3_HSICINB_P33_10_IN
}
}
IfxQspi2_HSICINA_P15_2_IN
IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN
Definition: IfxQspi_PinMap.c:45
IfxQspi2_HSICINB_P15_3_IN
IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN
Definition: IfxQspi_PinMap.c:46
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxQspi3_HSICINA_P33_9_IN
IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN
Definition: IfxQspi_PinMap.c:47
IfxQspi3_HSICINB_P33_10_IN
IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN
Definition: IfxQspi_PinMap.c:48

Definition at line 182 of file IfxQspi_PinMap.c.

◆ IfxQspi_Mrst_In_pinTable

const IfxQspi_Mrst_In* IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]

Definition at line 201 of file IfxQspi_PinMap.c.

◆ IfxQspi_Mrst_Out_pinTable

const IfxQspi_Mrst_Out* IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxQspi0_MRST_P20_12_OUT,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi1_MRST_P10_1_OUT,
&IfxQspi1_MRST_P10_6_OUT,
&IfxQspi1_MRST_P11_3_OUT,
NULL_PTR
},
{
&IfxQspi2_MRST_P15_4_OUT,
&IfxQspi2_MRST_P15_7_OUT,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi3_MRST_P02_5_OUT,
&IfxQspi3_MRST_P10_7_OUT,
&IfxQspi3_MRST_P22_1_OUT,
&IfxQspi3_MRST_P33_13_OUT
}
}
IfxQspi2_MRST_P15_7_OUT
IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT
Definition: IfxQspi_PinMap.c:68
IfxQspi1_MRST_P10_6_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT
Definition: IfxQspi_PinMap.c:65
IfxQspi3_MRST_P02_5_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT
Definition: IfxQspi_PinMap.c:69
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxQspi1_MRST_P11_3_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT
Definition: IfxQspi_PinMap.c:66
IfxQspi3_MRST_P10_7_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT
Definition: IfxQspi_PinMap.c:70
IfxQspi3_MRST_P33_13_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT
Definition: IfxQspi_PinMap.c:72
IfxQspi1_MRST_P10_1_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT
Definition: IfxQspi_PinMap.c:64
IfxQspi3_MRST_P22_1_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT
Definition: IfxQspi_PinMap.c:71
IfxQspi0_MRST_P20_12_OUT
IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT
Definition: IfxQspi_PinMap.c:63
IfxQspi2_MRST_P15_4_OUT
IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT
Definition: IfxQspi_PinMap.c:67

Definition at line 236 of file IfxQspi_PinMap.c.

◆ IfxQspi_Mtsr_In_pinTable

const IfxQspi_Mtsr_In* IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxQspi0_MTSRA_P20_14_IN,
NULL_PTR,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi1_MTSRA_P10_3_IN,
&IfxQspi1_MTSRB_P11_9_IN,
&IfxQspi1_MTSRC_P10_4_IN,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi2_MTSRA_P15_5_IN,
&IfxQspi2_MTSRB_P15_6_IN,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi3_MTSRA_P02_6_IN,
&IfxQspi3_MTSRB_P10_6_IN,
NULL_PTR,
&IfxQspi3_MTSRD_P33_12_IN,
&IfxQspi3_MTSRE_P22_0_IN
}
}
IfxQspi3_MTSRE_P22_0_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN
Definition: IfxQspi_PinMap.c:82
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxQspi3_MTSRB_P10_6_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN
Definition: IfxQspi_PinMap.c:80
IfxQspi2_MTSRA_P15_5_IN
IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN
Definition: IfxQspi_PinMap.c:77
IfxQspi1_MTSRB_P11_9_IN
IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN
Definition: IfxQspi_PinMap.c:75
IfxQspi3_MTSRD_P33_12_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN
Definition: IfxQspi_PinMap.c:81
IfxQspi2_MTSRB_P15_6_IN
IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN
Definition: IfxQspi_PinMap.c:78
IfxQspi1_MTSRC_P10_4_IN
IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN
Definition: IfxQspi_PinMap.c:76
IfxQspi1_MTSRA_P10_3_IN
IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN
Definition: IfxQspi_PinMap.c:74
IfxQspi0_MTSRA_P20_14_IN
IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN
Definition: IfxQspi_PinMap.c:73
IfxQspi3_MTSRA_P02_6_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN
Definition: IfxQspi_PinMap.c:79

Definition at line 263 of file IfxQspi_PinMap.c.

◆ IfxQspi_Mtsr_Out_pinTable

const IfxQspi_Mtsr_Out* IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]

Definition at line 294 of file IfxQspi_PinMap.c.

◆ IfxQspi_Sclk_In_pinTable

const IfxQspi_Sclk_In* IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxQspi0_SCLKA_P20_11_IN,
NULL_PTR,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi1_SCLKA_P10_2_IN,
&IfxQspi1_SCLKB_P11_6_IN,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi2_SCLKA_P15_3_IN,
&IfxQspi2_SCLKB_P15_8_IN,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi3_SCLKA_P02_7_IN,
&IfxQspi3_SCLKB_P10_8_IN,
NULL_PTR,
&IfxQspi3_SCLKD_P33_11_IN,
&IfxQspi3_SCLKE_P22_3_IN
}
}
IfxQspi2_SCLKB_P15_8_IN
IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN
Definition: IfxQspi_PinMap.c:103
IfxQspi3_SCLKE_P22_3_IN
IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN
Definition: IfxQspi_PinMap.c:107
IfxQspi1_SCLKB_P11_6_IN
IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN
Definition: IfxQspi_PinMap.c:101
IfxQspi3_SCLKD_P33_11_IN
IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN
Definition: IfxQspi_PinMap.c:106
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxQspi2_SCLKA_P15_3_IN
IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN
Definition: IfxQspi_PinMap.c:102
IfxQspi1_SCLKA_P10_2_IN
IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN
Definition: IfxQspi_PinMap.c:100
IfxQspi3_SCLKB_P10_8_IN
IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN
Definition: IfxQspi_PinMap.c:105
IfxQspi0_SCLKA_P20_11_IN
IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN
Definition: IfxQspi_PinMap.c:99
IfxQspi3_SCLKA_P02_7_IN
IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN
Definition: IfxQspi_PinMap.c:104

Definition at line 329 of file IfxQspi_PinMap.c.

◆ IfxQspi_Sclk_Out_pinTable

const IfxQspi_Sclk_Out* IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]

Definition at line 360 of file IfxQspi_PinMap.c.

◆ IfxQspi_Slsi_In_pinTable

const IfxQspi_Slsi_In* IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxQspi0_SLSIA_P20_13_IN,
&IfxQspi0_SLSIB_P20_9_IN,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi1_SLSIA_P11_10_IN,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi2_SLSIA_P15_2_IN,
&IfxQspi2_SLSIB_P15_1_IN,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi3_SLSIA_P02_4_IN,
NULL_PTR,
&IfxQspi3_SLSIC_P33_10_IN,
&IfxQspi3_SLSID_P22_2_IN
}
}
IfxQspi3_SLSIA_P02_4_IN
IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN
Definition: IfxQspi_PinMap.c:128
IfxQspi2_SLSIA_P15_2_IN
IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN
Definition: IfxQspi_PinMap.c:126
IfxQspi3_SLSIC_P33_10_IN
IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN
Definition: IfxQspi_PinMap.c:129
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxQspi0_SLSIB_P20_9_IN
IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN
Definition: IfxQspi_PinMap.c:124
IfxQspi0_SLSIA_P20_13_IN
IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN
Definition: IfxQspi_PinMap.c:123
IfxQspi3_SLSID_P22_2_IN
IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN
Definition: IfxQspi_PinMap.c:130
IfxQspi2_SLSIB_P15_1_IN
IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN
Definition: IfxQspi_PinMap.c:127
IfxQspi1_SLSIA_P11_10_IN
IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN
Definition: IfxQspi_PinMap.c:125

Definition at line 395 of file IfxQspi_PinMap.c.

◆ IfxQspi_Slso_Out_pinTable

const IfxQspi_Slso_Out* IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]

Definition at line 422 of file IfxQspi_PinMap.c.


iLLD_TC26B: IfxQspi_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxQspi_PinMap.h File Reference
iLLD » QSPI

QSPI I/O map. More...

#include <IfxQspi_reg.h>
#include <_Impl/IfxQspi_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxQspi_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxQspi_Mrst_In
MRST pin mapping structure. More...
struct | IfxQspi_Mtsr_In
MTSR pin mapping structure. More...
struct | IfxQspi_Sclk_In
SCLK pin mapping structure. More...
struct | IfxQspi_Slsi_In
SLSI pin mapping structure. More...
struct | IfxQspi_Hsicin_In
HSICIN pin mapping structure. More...
struct | IfxQspi_Mrst_Out
MRST pin mapping structure. More...
struct | IfxQspi_Mtsr_Out
MTSR pin mapping structure. More...
struct | IfxQspi_Sclk_Out
SCLK pin mapping structure. More...
struct | IfxQspi_Slso_Out
SLSO pin mapping structure. More...

Macros

#define | IFXQSPI_PINMAP_NUM_MODULES 4
Table dimensions. More...
#define | IFXQSPI_PINMAP_NUM_SLAVESELECTS 14
#define | IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS 2
#define | IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS 6
#define | IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS 4
#define | IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS 5
#define | IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS 6
#define | IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS 5
#define | IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS 6
#define | IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS 4
#define | IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN
QSPI2_HSICINA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN
QSPI2_HSICINB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN
QSPI3_HSICINA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN
QSPI3_HSICINB: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN
QSPI0_MRSTA: QSPI0 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN
QSPI1_MRSTA: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN
QSPI1_MRSTB: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN
QSPI2_MRSTA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN
QSPI2_MRSTB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN
QSPI2_MRSTCN: QSPI2 input (LVDS) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN
QSPI2_MRSTCP: QSPI2 input (LVDS) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN
QSPI2_MRSTE: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN
QSPI3_MRSTA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN
QSPI3_MRSTB: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN
QSPI3_MRSTD: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN
QSPI3_MRSTE: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN
QSPI3_MRSTFN: QSPI3 input (LVDS) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN
QSPI3_MRSTFP: QSPI3 input (LVDS) More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT
QSPI0_MRST: QSPI0 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT
QSPI1_MRST: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT
QSPI1_MRST: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT
QSPI1_MRST: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT
QSPI2_MRST: QSPI2 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT
QSPI2_MRST: QSPI2 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT
QSPI3_MRST: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT
QSPI3_MRST: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT
QSPI3_MRST: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT
QSPI3_MRST: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN
QSPI0_MTSRA: QSPI0 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN
QSPI1_MTSRA: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN
QSPI1_MTSRB: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN
QSPI1_MTSRC: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN
QSPI2_MTSRA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN
QSPI2_MTSRB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN
QSPI3_MTSRA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN
QSPI3_MTSRB: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN
QSPI3_MTSRD: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN
QSPI3_MTSRE: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT
QSPI0_MTSR: QSPI0 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT
QSPI0_MTSR: QSPI0 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT
QSPI1_MTSR: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT
QSPI1_MTSR: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT
QSPI1_MTSR: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT
QSPI1_MTSR: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT
QSPI2_MTSRN: QSPI2 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT
QSPI2_MTSRP: QSPI2 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT
QSPI2_MTSR: QSPI2 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT
QSPI2_MTSR: QSPI2 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT
QSPI3_MTSRN: QSPI3 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT
QSPI3_MTSRP: QSPI3 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT
QSPI3_MTSR: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT
QSPI3_MTSR: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT
QSPI3_MTSR: QSPI3 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT
QSPI3_MTSR: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN
QSPI0_SCLKA: QSPI0 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN
QSPI1_SCLKA: QSPI1 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN
QSPI1_SCLKB: QSPI1 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN
QSPI2_SCLKA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN
QSPI2_SCLKB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN
QSPI3_SCLKA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN
QSPI3_SCLKB: QSPI3 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN
QSPI3_SCLKD: QSPI3 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN
QSPI3_SCLKE: QSPI3 input. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT
QSPI0_SCLK: QSPI0 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT
QSPI0_SCLK: QSPI0 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT
QSPI1_SCLK: QSPI1 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT
QSPI1_SCLK: QSPI1 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT
QSPI2_SCLKN: QSPI2 output (LVDS) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT
QSPI2_SCLKP: QSPI2 output (LVDS) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT
QSPI2_SCLK: QSPI2 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT
QSPI2_SCLK: QSPI2 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT
QSPI2_SCLK: QSPI2 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT
QSPI3_SCLKN: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT
QSPI3_SCLKP: QSPI3 output (LVDS) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT
QSPI3_SCLK: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT
QSPI3_SCLK: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT
QSPI3_SCLK: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT
QSPI3_SCLK: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN
QSPI0_SLSIA: QSPI0 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN
QSPI0_SLSIB: QSPI0 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN
QSPI1_SLSIA: QSPI1 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN
QSPI2_SLSIA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN
QSPI2_SLSIB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN
QSPI3_SLSIA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN
QSPI3_SLSIC: QSPI3 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN
QSPI3_SLSID: QSPI3 input. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT
QSPI0_SLSO0: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT
QSPI0_SLSO13: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT
QSPI0_SLSO1: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT
QSPI0_SLSO2: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT
QSPI0_SLSO3: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT
QSPI0_SLSO4: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT
QSPI0_SLSO5: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT
QSPI0_SLSO6: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT
QSPI0_SLSO7: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT
QSPI0_SLSO8: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT
QSPI0_SLSO9: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT
QSPI1_SLSO0: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT
QSPI1_SLSO10: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT
QSPI1_SLSO1: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT
QSPI1_SLSO2: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT
QSPI1_SLSO3: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT
QSPI1_SLSO4: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT
QSPI1_SLSO5: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT
QSPI1_SLSO6: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT
QSPI1_SLSO7: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT
QSPI1_SLSO8: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT
QSPI1_SLSO9: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT
QSPI2_SLSO0: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT
QSPI2_SLSO1: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT
QSPI2_SLSO2: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT
QSPI2_SLSO3: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT
QSPI2_SLSO4: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT
QSPI2_SLSO5: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT
QSPI2_SLSO6: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT
QSPI2_SLSO7: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT
QSPI2_SLSO8: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT
QSPI2_SLSO9: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT
QSPI3_SLSO0: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT
QSPI3_SLSO11: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT
QSPI3_SLSO12: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT
QSPI3_SLSO13: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT
QSPI3_SLSO1: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT
QSPI3_SLSO1: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT
QSPI3_SLSO2: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT
QSPI3_SLSO2: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT
QSPI3_SLSO3: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT
QSPI3_SLSO4: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT
QSPI3_SLSO4: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT
QSPI3_SLSO5: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT
QSPI3_SLSO5: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT
QSPI3_SLSO6: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT
QSPI3_SLSO7: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT
QSPI3_SLSO7: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT
QSPI3_SLSO8: QSPI3 output. More...
IFX_EXTERN const IfxQspi_Hsicin_In * | IfxQspi_Hsicin_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS]
IfxQspi_Hsicin_In table. More...
IFX_EXTERN const IfxQspi_Mrst_In * | IfxQspi_Mrst_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]
IfxQspi_Mrst_In table. More...
IFX_EXTERN const IfxQspi_Mrst_Out * | IfxQspi_Mrst_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
IfxQspi_Mrst_Out table. More...
IFX_EXTERN const IfxQspi_Mtsr_In * | IfxQspi_Mtsr_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]
IfxQspi_Mtsr_In table. More...
IFX_EXTERN const IfxQspi_Mtsr_Out * | IfxQspi_Mtsr_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]
IfxQspi_Mtsr_Out table. More...
IFX_EXTERN const IfxQspi_Sclk_In * | IfxQspi_Sclk_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]
IfxQspi_Sclk_In table. More...
IFX_EXTERN const IfxQspi_Sclk_Out * | IfxQspi_Sclk_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxQspi_Sclk_Out table. More...
IFX_EXTERN const IfxQspi_Slsi_In * | IfxQspi_Slsi_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
IfxQspi_Slsi_In table. More...
IFX_EXTERN const IfxQspi_Slso_Out * | IfxQspi_Slso_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxQspi_Slso_Out table. More...

Detailed Description

QSPI I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi_PinMap.h.


iLLD_TC26B: IfxQspi_SpiMaster.h File Reference

  • Qspi
  • SpiMaster
Data Structures | Typedefs | Enumerations | Functions
IfxQspi_SpiMaster.h File Reference
iLLD » QSPI

QSPI SPIMASTER details. More...

#include "Cpu/Irq/IfxCpu_Irq.h"
#include "Dma/Dma/IfxDma_Dma.h"
#include "Qspi/Std/IfxQspi.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxQspi_SpiMaster.h:

Go to the source code of this file.

Data Structures

struct | IfxQspi_SpiMaster_Input
SLSI pin configuration structure. More...
struct | IfxQspi_SpiMaster_Output
SLSO pin configuration structure. More...
struct | IfxQspi_SpiMaster_Dma
Dma handle. More...
struct | IfxQspi_SpiMaster_DmaConfig
Dma configuration. More...
struct | IfxQspi_SpiMaster_ErrorFlags
Qspi Master Mode Error Flags. More...
union | IfxQspi_SpiMaster_InputOutput
Union of Slave Select pins. More...
struct | IfxQspi_SpiMaster_Pins
Master pin IO configuration structure. More...
struct | IfxQspi_SpiMaster
Module handle data structure. More...
struct | IfxQspi_SpiMaster_ChannelConfig
Module Channel configuration structure. More...
struct | IfxQspi_SpiMaster_Channel_s
Module Channel handle structure. More...
struct | IfxQspi_SpiMaster_Config
Module configuration structure. More...

Typedefs

typedef struct IfxQspi_SpiMaster_Channel_s | IfxQspi_SpiMaster_Channel
typedef void(* | IfxQspi_SpiMaster_AutoSlso) (IfxQspi_SpiMaster_Channel *chHandle)

Enumerations

enum IfxQspi_SpiMaster_ChannelBasedCs {
IfxQspi_SpiMaster_ChannelBasedCs_disabled = 0,
IfxQspi_SpiMaster_ChannelBasedCs_enabled = 1
}
enum IfxQspi_SpiMaster_Mode {
IfxQspi_SpiMaster_Mode_short = 0,
IfxQspi_SpiMaster_Mode_long = 1,
IfxQspi_SpiMaster_Mode_shortContinuous = 2,
IfxQspi_SpiMaster_Mode_longContinuous = 3,
IfxQspi_SpiMaster_Mode_xxl = 4
}

Functions

IFX_EXTERN void | IfxQspi_SpiMaster_initModule (IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxQspi_SpiMaster_initModuleConfig (IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_initChannel (IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
Initializes the channel. More...
IFX_EXTERN void | IfxQspi_SpiMaster_initChannelConfig (IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
Fills the config structure with default values. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_exchange (IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_getStatus (IfxQspi_SpiMaster_Channel *chHandle)
Gets the transmission status. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrDmaReceive (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrDmaTransmit (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrError (IfxQspi_SpiMaster *handle)
Error Interrupt handler. More...
IFX_EXTERN IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrPhaseTransition (IfxQspi_SpiMaster *handle)
Phase Transition interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrReceive (IfxQspi_SpiMaster *handle)
Receive Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrTransmit (IfxQspi_SpiMaster *handle)
Transmit interrupt handler. More...
IFX_EXTERN IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrUserDefined (IfxQspi_SpiMaster *handle)
User defined interrupt handler. More...
IFX_INLINE uint32 | IfxQspi_SpiMaster_readReceiveFifo (IfxQspi_SpiMaster *handle)
Reads data or status in RxFIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeBasicConfiguration (IfxQspi_SpiMaster *handle, uint32 baconVal)
Writes Basic configuration value to Tx FIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeExtendedConfiguration (IfxQspi_SpiMaster_Channel *chHandle, uint32 econVal)
Writes extended configuration of the channel. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeMixedDataConfiguration (IfxQspi_SpiMaster *handle, uint32 mixEntryVal)
Writes data and configuration mixed value to Tx FIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeTransmitFifo (IfxQspi_SpiMaster_Channel *chHandle, uint32 data)
Writes the data to TxFIFO. More...
IFX_EXTERN void | IfxQspi_SpiMaster_packLongModeBuffer (IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
pack data to Long mode buffer More...
IFX_EXTERN SpiIf_ChConfig | IfxQspi_SpiMaster_getChannelConfig (IfxQspi_SpiMaster_Channel *chHandle)
Gets the channel configuration. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_setChannelBaudrate (IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate)
Set the channel baudrate. More...

Detailed Description

QSPI SPIMASTER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi_SpiMaster.h.

Typedef Documentation

◆ IfxQspi_SpiMaster_AutoSlso

typedef void(* IfxQspi_SpiMaster_AutoSlso) (IfxQspi_SpiMaster_Channel *chHandle)

Definition at line 521 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_Channel

typedef struct IfxQspi_SpiMaster_Channel_s IfxQspi_SpiMaster_Channel

Definition at line 519 of file IfxQspi_SpiMaster.h.

Function Documentation

◆ IfxQspi_SpiMaster_getChannelConfig()

IFX_EXTERN SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig ( IfxQspi_SpiMaster_Channel * chHandle )

Gets the channel configuration.

Parameters
chHandle Module Channel handle
Returns
Channel configuration

Definition at line 182 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_setChannelBaudrate().

◆ IfxQspi_SpiMaster_setChannelBaudrate()

IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | float32 | baudrate
 | ) |  |

Set the channel baudrate.

Parameters
chHandle | Module Channel handle
baudrate | Baudrate to be configured (in Baud)
Returns
Status of Channel (busy or ok or failure)

Definition at line 890 of file IfxQspi_SpiMaster.c.


iLLD_TC26B: IfxQspi_SpiSlave.h File Reference

  • Qspi
  • SpiSlave
Data Structures | Functions
IfxQspi_SpiSlave.h File Reference
iLLD » QSPI

QSPI SPISLAVE details. More...

#include "Cpu/Irq/IfxCpu_Irq.h"
#include "Dma/Dma/IfxDma_Dma.h"
#include "Qspi/Std/IfxQspi.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxQspi_SpiSlave.h:

Go to the source code of this file.

Data Structures

struct | IfxQspi_SpiSlave_Dma
Dma handle. More...
struct | IfxQspi_SpiSlave_DmaConfig
Dma configuration. More...
struct | IfxQspi_SpiSlave_ErrorFlags
Qspi Slave Mode Error Flags. More...
struct | IfxQspi_SpiSlave_Pins
Slave pin IO configuration structure. More...
struct | IfxQspi_SpiSlave_Protocol
Configures the SPI Protocol. More...
struct | IfxQspi_SpiSlave
Module handle data structure. More...
struct | IfxQspi_SpiSlave_Config
Module configuration structure. More...

Functions

IFX_EXTERN void | IfxQspi_SpiSlave_initModule (IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxQspi_SpiSlave_initModuleConfig (IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiSlave_exchange (IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiSlave_getStatus (IfxQspi_SpiSlave *handle)
Gets the transmission status. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrDmaReceive (IfxQspi_SpiSlave *qspiHandle)
Dma receive interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrDmaTransmit (IfxQspi_SpiSlave *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrError (IfxQspi_SpiSlave *handle)
Error Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrReceive (IfxQspi_SpiSlave *handle)
Receive Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrTransmit (IfxQspi_SpiSlave *handle)
Transmit interrupt handler. More...
IFX_INLINE uint32 | IfxQspi_SpiSlave_readReceiveFifo (IfxQspi_SpiSlave *handle)
Reads data or status in RxFIFO. More...
IFX_INLINE void | IfxQspi_SpiSlave_writeTransmitFifo (IfxQspi_SpiSlave *handle, uint32 data)
Writes the data to TxFIFO. More...

Detailed Description

QSPI SPISLAVE details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi_SpiSlave.h.


iLLD_TC26B: IfxQspi.h File Reference

  • Qspi
  • Std
Data Structures | Macros | Enumerations | Functions
IfxQspi.h File Reference
iLLD » QSPI

QSPI basic functionality. More...

#include "_Impl/IfxQspi_cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "If/SpiIf.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Src/Std/IfxSrc.h"
#include "_PinMap/IfxQspi_PinMap.h"
Include dependency graph for IfxQspi.h:

Go to the source code of this file.

Data Structures

struct IfxQspi_DelayConst
Structure holding the "pre" and "delay" values. To be populated into BACON register after delay calculation. More...

Macros

#define | IFXQSPI_BACONSIZE(Datasize) (((((Datasize) % 16) == 0) ? ((uint8)((Datasize) / 16)) : ((uint8)((Datasize) / 16) + 1)))
Get Fifo size required for Long / Long continous mode interms 32-bit LONG MODE FIFO size (data size in bytes) = (size for Bacon) + (Datasize converted to 32-bit) More...
#define | IFXQSPI_FIFO32BITSIZE(Datasize) ((((Datasize) % 4) == 0) ? ((uint8)((Datasize) / 4)) : ((uint8)((Datasize) / 4) + 1))
#define | IFXQSPI_GETLONGMODEFIFOSIZE(Datasize) (IFXQSPI_BACONSIZE(Datasize) + IFXQSPI_FIFO32BITSIZE(Datasize))
#define | IFXQSPI_ERRORENABLEMASK ((uint32)0x1FF)
Errors enable mask for ERRORENS. More...

Enumerations

enum IfxQspi_ChannelId {
IfxQspi_ChannelId_0,
IfxQspi_ChannelId_1,
IfxQspi_ChannelId_2,
IfxQspi_ChannelId_3,
IfxQspi_ChannelId_4,
IfxQspi_ChannelId_5,
IfxQspi_ChannelId_6,
IfxQspi_ChannelId_7,
IfxQspi_ChannelId_8,
IfxQspi_ChannelId_9,
IfxQspi_ChannelId_10,
IfxQspi_ChannelId_11,
IfxQspi_ChannelId_12,
IfxQspi_ChannelId_13,
IfxQspi_ChannelId_14
}
QSPI channel Number (BACON.CS) More...
enum IfxQspi_DataLengthUnit {
IfxQspi_DataLengthUnit_bit = 0,
IfxQspi_DataLengthUnit_byte = 1
}
Data length unit of a frame (BACON.BYTE) More...
enum IfxQspi_Error {
IfxQspi_Error_none = 0,
IfxQspi_Error_parity = 1,
IfxQspi_Error_configuration = 2,
IfxQspi_Error_baudrate = 4,
IfxQspi_Error_txfifoOverflow = 8,
IfxQspi_Error_txfifoUnderflow = 16,
IfxQspi_Error_rxfifoOverflow = 32,
IfxQspi_Error_rxfifoUnderflow = 64,
IfxQspi_Error_expectTimeout = 128,
IfxQspi_Error_slsiMisplacedInactivation = 256
}
QSPI Error Flags (STATUS.ERRORFLAGS) More...
enum IfxQspi_ExpectTimeout {
IfxQspi_ExpectTimeout_64 = 0,
IfxQspi_ExpectTimeout_128 = 1,
IfxQspi_ExpectTimeout_256 = 2,
IfxQspi_ExpectTimeout_512 = 3,
IfxQspi_ExpectTimeout_1024 = 4,
IfxQspi_ExpectTimeout_2048 = 5,
IfxQspi_ExpectTimeout_4096 = 6,
IfxQspi_ExpectTimeout_8192 = 7,
IfxQspi_ExpectTimeout_16384 = 8,
IfxQspi_ExpectTimeout_32768 = 9,
IfxQspi_ExpectTimeout_65536 = 10,
IfxQspi_ExpectTimeout_131072 = 11,
IfxQspi_ExpectTimeout_262144 = 12,
IfxQspi_ExpectTimeout_524288 = 13,
IfxQspi_ExpectTimeout_1048576 = 14,
IfxQspi_ExpectTimeout_2097152 = 15
}
Frame Expect phase time out value. More...
enum IfxQspi_Mode {
IfxQspi_Mode_master = 0,
IfxQspi_Mode_pwmOverQspi = 1,
IfxQspi_Mode_slave = 2
}
QSPI controller mode (GLOBALCON.MODE) More...
enum IfxQspi_PauseRunTransition {
IfxQspi_PauseRunTransition_pause = 0,
IfxQspi_PauseRunTransition_run = 1
}
Request between pause and Run transition. More...
enum IfxQspi_Phase {
IfxQspi_Phase_wait = 0,
IfxQspi_Phase_idleA = 1,
IfxQspi_Phase_idleB = 2,
IfxQspi_Phase_lead = 3,
IfxQspi_Phase_data = 4,
IfxQspi_Phase_trail = 5,
IfxQspi_Phase_expect = 6,
IfxQspi_Phase_leadStrobe = 7,
IfxQspi_Phase_trailStrobe = 8
}
QSPI frame phase (STATUS.PHASE) More...
enum IfxQspi_PhaseTransitionEvent {
IfxQspi_PhaseTransitionEvent_endOfWait = 0,
IfxQspi_PhaseTransitionEvent_serialClockPolarityChange = 1,
IfxQspi_PhaseTransitionEvent_startOfFrame = 2,
IfxQspi_PhaseTransitionEvent_transmitBufferEmptied = 3,
IfxQspi_PhaseTransitionEvent_receiveBufferFilled = 4,
IfxQspi_PhaseTransitionEvent_endOfFrame = 5,
IfxQspi_PhaseTransitionEvent_dataNotAvailable = 6,
IfxQspi_PhaseTransitionEvent_endOfExpect = 7
}
Phase Transition Event. More...
enum IfxQspi_Reset {
IfxQspi_Reset_none = 0,
IfxQspi_Reset_stateMachineAndFifo = 7,
IfxQspi_Reset_kernel = 15
}
Reset Request (GLOBALCON.RESETS) More...
enum IfxQspi_RxFifoInt {
IfxQspi_RxFifoInt_0,
IfxQspi_RxFifoInt_1,
IfxQspi_RxFifoInt_2,
IfxQspi_RxFifoInt_3
}
Receive Fifo Interrupt Threshold. More...
enum IfxQspi_SleepMode {
IfxQspi_SleepMode_enable = 0,
IfxQspi_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_QSPI.CLC.B.EDIS. More...
enum IfxQspi_StrobeDelay {
IfxQspi_StrobeDelay_1,
IfxQspi_StrobeDelay_2,
IfxQspi_StrobeDelay_3,
IfxQspi_StrobeDelay_4,
IfxQspi_StrobeDelay_5,
IfxQspi_StrobeDelay_6,
IfxQspi_StrobeDelay_7,
IfxQspi_StrobeDelay_8,
IfxQspi_StrobeDelay_9,
IfxQspi_StrobeDelay_10,
IfxQspi_StrobeDelay_11,
IfxQspi_StrobeDelay_12,
IfxQspi_StrobeDelay_13,
IfxQspi_StrobeDelay_14,
IfxQspi_StrobeDelay_15,
IfxQspi_StrobeDelay_16,
IfxQspi_StrobeDelay_17,
IfxQspi_StrobeDelay_18,
IfxQspi_StrobeDelay_19,
IfxQspi_StrobeDelay_20,
IfxQspi_StrobeDelay_21,
IfxQspi_StrobeDelay_22,
IfxQspi_StrobeDelay_23,
IfxQspi_StrobeDelay_24,
IfxQspi_StrobeDelay_25,
IfxQspi_StrobeDelay_26,
IfxQspi_StrobeDelay_27,
IfxQspi_StrobeDelay_28,
IfxQspi_StrobeDelay_29,
IfxQspi_StrobeDelay_30,
IfxQspi_StrobeDelay_31,
IfxQspi_StrobeDelay_32
}
STROBE delay for SLSO in delayed mode (GLOBALCON.STROBE) More...
enum IfxQspi_TxFifoInt {
IfxQspi_TxFifoInt_1,
IfxQspi_TxFifoInt_2,
IfxQspi_TxFifoInt_3,
IfxQspi_TxFifoInt_4
}
Transmit Fifo Interrupt Threshold. More...
enum IfxQspi_FifoMode {
IfxQspi_FifoMode_combinedMove = 0,
IfxQspi_FifoMode_singleMove = 1,
IfxQspi_FifoMode_batchMove = 2
}
Transmit FIFO mode. More...
enum IfxQspi_SuspendMode {
IfxQspi_SuspendMode_none = 0,
IfxQspi_SuspendMode_hard = 1,
IfxQspi_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Functions

IFX_INLINE void | IfxQspi_clearAllEventFlags (Ifx_QSPI *qspi)
Clear ALL service requests. More...
IFX_INLINE void | IfxQspi_clearRxReq (Ifx_QSPI *qspi)
Clear RX service requests. More...
IFX_INLINE void | IfxQspi_clearTxReq (Ifx_QSPI *qspi)
Clear TX service requests. More...
IFX_INLINE void | IfxQspi_configPT1Event (Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt1Config)
Configure PT1 event (also USR event depending if USREN=1 ) More...
IFX_INLINE void | IfxQspi_configPT2Event (Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt2Config)
Configure PT2 event. More...
IFX_INLINE void | IfxQspi_enableLoopbackMode (Ifx_QSPI *qspi, boolean enable)
Enable/Disable Loopback mode. More...
IFX_INLINE void | IfxQspi_enablePT1Event (Ifx_QSPI *qspi, boolean enable)
enable Phase Transition1 Event More...
IFX_INLINE void | IfxQspi_enablePT2Event (Ifx_QSPI *qspi, boolean enable)
enable Phase Transition2 Event More...
IFX_INLINE void | IfxQspi_enableUsrEvent (Ifx_QSPI *qspi, boolean enable)
enable User Event (Event selected by PT1) More...
IFX_INLINE uint16 | IfxQspi_getErrorFlags (Ifx_QSPI *qspi)
IFX_INLINE void | IfxQspi_pause (Ifx_QSPI *qspi)
Request for Module in Pause state no interrupts no communication. More...
IFX_INLINE uint32 | IfxQspi_readReceiveFifo (Ifx_QSPI *qspi)
Read the oldest data from RXFIFO. More...
IFX_INLINE void | IfxQspi_requestReset (Ifx_QSPI *qspi, IfxQspi_Reset reset)
Request reset (State Machine & FIFO / Register / Module) More...
IFX_INLINE void | IfxQspi_run (Ifx_QSPI *qspi)
Request for QSPI in Run state. More...
IFX_INLINE void | IfxQspi_setReceiveFifoInterrruptThreshold (Ifx_QSPI *qspi, IfxQspi_RxFifoInt rxFifoInt)
Set the threshold of RXFIFO for service request generation. More...
IFX_INLINE void | IfxQspi_writeTransmitFifo (Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register. More...
IFX_INLINE boolean | IfxQspi_isModuleSuspended (Ifx_QSPI *qspi)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxQspi_setSuspendMode (Ifx_QSPI *qspi, IfxQspi_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxQspi_read16 (Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_read32 (Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_read8 (Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_resetModule (Ifx_QSPI *qspi)
resets QSPI kernel More...
IFX_EXTERN void | IfxQspi_write16 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO. More...
IFX_EXTERN void | IfxQspi_write32 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO. More...
IFX_EXTERN void | IfxQspi_write8 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO. More...
IFX_INLINE IfxQspi_Mode | IfxQspi_getMode (Ifx_QSPI *qspi)
Gets the current mode of QSPI. More...
IFX_INLINE float | IfxQspi_getModuleFrequency (Ifx_QSPI *qspi)
Specifies function to get module frequency. More...
IFX_INLINE IfxQspi_Phase | IfxQspi_getPhase (Ifx_QSPI *qspi)
Gets actual transmission phase. More...
IFX_INLINE uint8 | IfxQspi_getReceiveFifoLevel (Ifx_QSPI *qspi)
Gets the filling level of RXFIFO. More...
IFX_INLINE float | IfxQspi_getTimeQuantaFrequency (Ifx_QSPI *qspi)
Gets Time Quanta frequency. More...
IFX_INLINE uint8 | IfxQspi_getTransmitFifoLevel (Ifx_QSPI *qspi)
Gets the filling level of TXFIFO. More...
IFX_INLINE boolean | IfxQspi_isModuleEnabled (Ifx_QSPI *qspi)
Specifies the Module enable or disable status. More...
IFX_INLINE void | IfxQspi_setDisableModuleRequest (Ifx_QSPI *qspi)
Sets the disable module request. More...
IFX_INLINE void | IfxQspi_setEnableModuleRequest (Ifx_QSPI *qspi)
Sets the enable module request. More...
IFX_INLINE void | IfxQspi_setSleepMode (Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
Sets the disable module request. More...
IFX_INLINE void | IfxQspi_setTransmitFifoInterrruptThreshold (Ifx_QSPI *qspi, IfxQspi_TxFifoInt txFifoInt)
Set the threshold of TXFIFO for service request generation. More...
IFX_INLINE void | IfxQspi_writeBasicConfiguration (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register. More...
IFX_INLINE void | IfxQspi_writeBasicConfigurationBeginStream (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 0. More...
IFX_INLINE void | IfxQspi_writeBasicConfigurationEndStream (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 1. More...
IFX_INLINE void | IfxQspi_writeExtendedConfiguration (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal)
Writes channel timing configuration into ECON register. More...
IFX_INLINE void | IfxQspi_writeMixedDataTransmitFifo (Ifx_QSPI *qspi, uint32 mixEntryVal)
Writes Data and Configuration into MIXEDENTRY register. More...
IFX_EXTERN float | IfxQspi_calcRealBaudrate (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel. More...
IFX_EXTERN uint32 | IfxQspi_calculateBasicConfigurationValue (Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values. More...
IFX_EXTERN uint32 | IfxQspi_calculateExtendedConfigurationValue (Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values. More...
IFX_EXTERN uint32 | IfxQspi_calculatePrescaler (Ifx_QSPI *qspi, float baudrate)
Function to calculate prescaler. More...
IFX_EXTERN uint32 | IfxQspi_calculateTimeQuantumLength (Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length. More...
IFX_EXTERN Ifx_QSPI * | IfxQspi_getAddress (IfxQspi_Index qspi)
IFX_EXTERN IfxQspi_Index | IfxQspi_getIndex (Ifx_QSPI *qspi)
Specifies the function to get Index. More...
IFX_EXTERN uint32 | IfxQspi_recalcBasicConfiguration (uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
Re-calculated BACON from the oldBACON. More...
IFX_EXTERN void | IfxQspi_setSlaveSelectOutputControl (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
Configures a Slave Select Output. More...
IFX_EXTERN void | IfxQspi_calculateDelayConstants (const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
Calculates the Delay constants (pre and delay) from the user specified CS delays. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getErrorSrc (Ifx_QSPI *qspi)
Gets the Error request value. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getReceiveSrc (Ifx_QSPI *qspi)
Gets the RXFIFO service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getTransmitSrc (Ifx_QSPI *qspi)
Gets the TXFIFO service request. More...
IFX_INLINE void | IfxQspi_initMrstInPin (const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode)
Initializes a MRST input. More...
IFX_INLINE void | IfxQspi_initMrstOutPin (const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver)
Initializes a MRST output. More...
IFX_INLINE void | IfxQspi_initMtsrInPin (const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode)
Initializes a MTSR input. More...
IFX_INLINE void | IfxQspi_initMtsrOutPin (const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver)
Initializes a MTSR output. More...
IFX_INLINE void | IfxQspi_initSclkInPin (const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode)
Initializes a SCLK input. More...
IFX_INLINE void | IfxQspi_initSclkOutPin (const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output. More...
IFX_INLINE void | IfxQspi_initSlsi (const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode)
Initializes a SLSI input. More...
IFX_INLINE void | IfxQspi_initSlso (const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex)
Initializes a SLSO output. More...
IFX_INLINE IfxQspi_FifoMode | IfxQspi_getRxFifoMode (Ifx_QSPI *qspi)
Get the Receive FIFO mode. More...
IFX_INLINE IfxQspi_FifoMode | IfxQspi_getTxFifoMode (Ifx_QSPI *qspi)
Get the Transfer FIFO mode. More...
IFX_INLINE void | IfxQspi_permutateBigEndian (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bigEndian)
Permutate bytes to / from Big Endian. More...
IFX_INLINE void | IfxQspi_setBitsegment1 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment1)
Set the value of bit segment1 (A). More...
IFX_INLINE void | IfxQspi_setBitsegment2 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment2)
Set the value of bit segment2 (B). More...
IFX_INLINE void | IfxQspi_setBitsegment3 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment3)
Set the value of bit segment3 (C). More...
IFX_INLINE void | IfxQspi_setRxFifoMode (Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
IFX_INLINE void | IfxQspi_setTimeQuantum (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 timeQuantum)
Set the value of Time Quantum. More...
IFX_INLINE void | IfxQspi_setTxFifoMode (Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
Set the transfer FIFO mode. More...
IFX_INLINE void | IfxQspi_initMrstInPinWithPadLevel (const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MRSTIN pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxQspi_initMtsrInPinWithPadLevel (const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MTSRIN pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxQspi_initSclkInPinWithPadLevel (const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SCLKIN pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxQspi_initSlsiWithPadLevel (const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SLSI pin direction as input and configuring pad driver. More...

Detailed Description

QSPI basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi.h.

Data Structure Documentation

◆ IfxQspi_DelayConst

struct IfxQspi_DelayConst

Structure holding the "pre" and "delay" values. To be populated into BACON register after delay calculation.

Definition at line 308 of file IfxQspi.h.

Data Fields
uint8 | delay | delay multiplier
uint8 | pre | specifies the prescalar value

Macro Definition Documentation

◆ IFXQSPI_BACONSIZE

#define IFXQSPI_BACONSIZE ( Datasize ) (((((Datasize) % 16) == 0) ? ((uint8)((Datasize) / 16)) : ((uint8)((Datasize) / 16) + 1)))

Get Fifo size required for Long / Long continous mode interms 32-bit LONG MODE FIFO size (data size in bytes) = (size for Bacon) + (Datasize converted to 32-bit)

Definition at line 76 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_writeLong().

◆ IFXQSPI_ERRORENABLEMASK

#define IFXQSPI_ERRORENABLEMASK ((uint32)0x1FF)

Errors enable mask for ERRORENS.

Definition at line 84 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IFXQSPI_FIFO32BITSIZE

#define IFXQSPI_FIFO32BITSIZE ( Datasize ) ((((Datasize) % 4) == 0) ? ((uint8)((Datasize) / 4)) : ((uint8)((Datasize) / 4) + 1))

Definition at line 78 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_writeLong().

◆ IFXQSPI_GETLONGMODEFIFOSIZE

#define IFXQSPI_GETLONGMODEFIFOSIZE ( Datasize ) (IFXQSPI_BACONSIZE(Datasize) + IFXQSPI_FIFO32BITSIZE(Datasize))

Definition at line 80 of file IfxQspi.h.

Enumeration Type Documentation

◆ IfxQspi_FifoMode

enum IfxQspi_FifoMode

Transmit FIFO mode.

Enumerator
IfxQspi_FifoMode_combinedMove | Combined Move Mode.
IfxQspi_FifoMode_singleMove | Single Move Mode.
IfxQspi_FifoMode_batchMove | Batch Move Mode.

Definition at line 285 of file IfxQspi.h.

◆ IfxQspi_SuspendMode

enum IfxQspi_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxQspi_SuspendMode_none | No suspend.
IfxQspi_SuspendMode_hard | Hard Suspend.
IfxQspi_SuspendMode_soft | Soft Suspend.

Definition at line 294 of file IfxQspi.h.

Function Documentation

◆ IfxQspi_getRxFifoMode()

IFX_INLINE IfxQspi_FifoMode IfxQspi_getRxFifoMode ( Ifx_QSPI * qspi )

Get the Receive FIFO mode.

Parameters
qspi Pointer to QSPI module registers
Returns
Receive FIFO mode

Definition at line 1005 of file IfxQspi.h.

◆ IfxQspi_getTxFifoMode()

IFX_INLINE IfxQspi_FifoMode IfxQspi_getTxFifoMode ( Ifx_QSPI * qspi )

Get the Transfer FIFO mode.

Parameters
qspi Pointer to QSPI module registers
Returns
Transfer FIFO mode

Definition at line 1030 of file IfxQspi.h.

◆ IfxQspi_initMrstInPinWithPadLevel()

IFX_INLINE void IfxQspi_initMrstInPinWithPadLevel | ( | const IfxQspi_Mrst_In * | mrstIn,
 |  | IfxPort_InputMode | mrstInMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of MRSTIN pin direction as input and configuring pad driver.

Parameters
mrstIn | the MRST Pin which should be configured
mrstInMode | the pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1271 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_initMtsrInPinWithPadLevel()

IFX_INLINE void IfxQspi_initMtsrInPinWithPadLevel | ( | const IfxQspi_Mtsr_In * | mtsrIn,
 |  | IfxPort_InputMode | mtsrInMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of MTSRIN pin direction as input and configuring pad driver.

Parameters
mtsrIn | the MTSR Pin which should be configured
mtsrInMode | the pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1279 of file IfxQspi.h.

Referenced by IfxQspi_SpiSlave_initModule().

◆ IfxQspi_initSclkInPinWithPadLevel()

IFX_INLINE void IfxQspi_initSclkInPinWithPadLevel | ( | const IfxQspi_Sclk_In * | sclkIn,
 |  | IfxPort_InputMode | sclkInMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of SCLKIN pin direction as input and configuring pad driver.

Parameters
sclkIn | the SCLK Pin which should be configured
sclkInMode | the pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1287 of file IfxQspi.h.

Referenced by IfxQspi_SpiSlave_initModule().

◆ IfxQspi_initSlsiWithPadLevel()

IFX_INLINE void IfxQspi_initSlsiWithPadLevel | ( | const IfxQspi_Slsi_In * | slsi,
 |  | IfxPort_InputMode | slsiMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of SLSI pin direction as input and configuring pad driver.

Parameters
slsi | the SLSI Pin which should be configured
slsiMode | the pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1295 of file IfxQspi.h.

Referenced by IfxQspi_SpiSlave_initModule().

◆ IfxQspi_permutateBigEndian()

IFX_INLINE void IfxQspi_permutateBigEndian | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint8 | bigEndian
 | ) |  |

Permutate bytes to / from Big Endian.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
bigEndian | specifies to Permutate bytes to / from Big Endian
Returns
None

Definition at line 1108 of file IfxQspi.h.

◆ IfxQspi_setBitsegment1()

IFX_INLINE void IfxQspi_setBitsegment1 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint8 | bitSegment1
 | ) |  |

Set the value of bit segment1 (A).

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
bitSegment1 | Length expressed in time quantums of ECONz.Q.
Returns
None

Definition at line 1133 of file IfxQspi.h.

◆ IfxQspi_setBitsegment2()

IFX_INLINE void IfxQspi_setBitsegment2 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint8 | bitSegment2
 | ) |  |

Set the value of bit segment2 (B).

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
bitSegment2 | Length expressed in time quantums of ECONz.Q.
Returns
None

Definition at line 1140 of file IfxQspi.h.

◆ IfxQspi_setBitsegment3()

IFX_INLINE void IfxQspi_setBitsegment3 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint8 | bitSegment3
 | ) |  |

Set the value of bit segment3 (C).

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
bitSegment3 | Length expressed in time quantums of ECONz.Q.
Returns
None

Definition at line 1147 of file IfxQspi.h.

◆ IfxQspi_setRxFifoMode()

IFX_INLINE void IfxQspi_setRxFifoMode | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_FifoMode | mode
 | ) |  |
Parameters
qspi | Pointer to QSPI module registers
mode | select the transfer fifo mode
Returns
None

Definition at line 1172 of file IfxQspi.h.

◆ IfxQspi_setTimeQuantum()

IFX_INLINE void IfxQspi_setTimeQuantum | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint32 | timeQuantum
 | ) |  |

Set the value of Time Quantum.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
timeQuantum | specifies the value of Time Quantum.
Returns
None

Definition at line 1184 of file IfxQspi.h.

◆ IfxQspi_setTxFifoMode()

IFX_INLINE void IfxQspi_setTxFifoMode | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_FifoMode | mode
 | ) |  |

Set the transfer FIFO mode.

Parameters
qspi | Pointer to QSPI module registers
mode | select the transfer fifo mode
Returns
None

Definition at line 1197 of file IfxQspi.h.


iLLD_TC26B: SCU

Modules | Files
SCU
iLLD
Collaboration diagram for SCU:

Modules

Implementation
Standard Driver
SCU Pin Mapping
How to use the Scu Clock driver?

Files

file | IfxScu_cfg.h
SCU on-chip implementation data.
file | IfxScu_PinMap.c
SCU I/O map.
file | IfxScu_PinMap.h
SCU I/O map.
file | IfxScuCcu.h
SCU basic functionality.
file | IfxScuEru.h
SCU basic functionality.
file | IfxScuWdt.asm.h
SCU basic functionality.
file | IfxScuWdt.h
SCU basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » SCU
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » SCU
Collaboration diagram for Standard Driver:

Modules

Ccu Basic Functionality
Eru Basic Functionality
Wdt Basic Functionality

Detailed Description


iLLD_TC26B: Ccu Basic Functionality

Modules
Ccu Basic Functionality
iLLD » SCU » Standard Driver
Collaboration diagram for Ccu Basic Functionality:

Modules

Clock Control Functions
Clock Control Operative Functions
Clock Control Configuration Functions
Enumerations

Detailed Description


iLLD_TC26B: Clock Control Functions

Data Structures | Functions
Clock Control Functions
iLLD » SCU » Standard Driver » Ccu Basic Functionality
Collaboration diagram for Clock Control Functions:

Data Structures

struct | IfxScuCcu_CcuconRegConfig
Configuration structure type for CCUCON registers. More...
struct | IfxScuCcu_InitialStepConfig
Configuration structure type for the Pll initial step. This structure must be used to configure the P, N and K2 dividers for initial step. More...
struct | IfxScuCcu_PllStepsConfig
Configuration structure type for the Pll Steps for current jump control. More...
struct | IfxScuCcu_ClockDistributionConfig
Configuration structure type for all the CCUCON registers to configure clock distribution. More...
struct | IfxScuCcu_FlashWaitstateConfig
Configuration structure type for the Flash waitstate configuration. More...
struct | IfxScuCcu_SysPllConfig
Configuration structure type for the System Pll step. This structure must be used to configure the P, N and K1 dividers . More...
struct | IfxScuCcu_Config
Configuration structure SCU module. More...
struct | IfxScuCcu_ErayPllConfig
Configuration structure for E-ray PLL. More...

Functions

IFX_STATIC boolean | IfxScuCcu_isOscillatorStable (void)
Check if oscillator is stable. More...
IFX_STATIC void | IfxScuCcu_wait (float32 timeSec)
API to wait for requested duration. Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled. More...

Detailed Description

Data Structure Documentation

◆ IfxScuCcu_CcuconRegConfig

struct IfxScuCcu_CcuconRegConfig

Configuration structure type for CCUCON registers.

Definition at line 721 of file IfxScuCcu.h.

Data Fields
uint32 | mask | CCUCON Mask to select the bit fields to be updated.
uint32 | value | CCUCON Register value to be updated.

◆ IfxScuCcu_InitialStepConfig

struct IfxScuCcu_InitialStepConfig

Configuration structure type for the Pll initial step. This structure must be used to configure the P, N and K2 dividers for initial step.

Definition at line 730 of file IfxScuCcu.h.

Data Fields
uint8 | k2Initial | K2 divider value for basic (initial) step.
uint8 | nDivider | N divider value for basic (initial) step.
uint8 | pDivider | P divider value for basic (initial) step.
float32 | waitTime | Wait time for for basic (initial) step.

◆ IfxScuCcu_PllStepsConfig

struct IfxScuCcu_PllStepsConfig

Configuration structure type for the Pll Steps for current jump control.

Definition at line 740 of file IfxScuCcu.h.

Data Fields
IfxScuCcu_PllStepsFunctionHook | hookFunction | Hook function called at the end of this step.
uint8 | k2Step | K2 divider value for this step.
float32 | waitTime | Wait time for for this step.

◆ IfxScuCcu_ClockDistributionConfig

struct IfxScuCcu_ClockDistributionConfig

Configuration structure type for all the CCUCON registers to configure clock distribution.

Definition at line 753 of file IfxScuCcu.h.

Collaboration diagram for IfxScuCcu_ClockDistributionConfig:
[legend]
Data Fields
IfxScuCcu_CcuconRegConfig | ccucon0 | CCUCON0 Register configuration.
IfxScuCcu_CcuconRegConfig | ccucon1 | CCUCON1 Register configuration.
IfxScuCcu_CcuconRegConfig | ccucon2 | CCUCON2 Register configuration.
IfxScuCcu_CcuconRegConfig | ccucon5 | CCUCON5 Register configuration.
IfxScuCcu_CcuconRegConfig | ccucon6 | CCUCON6 Register configuration.
IfxScuCcu_CcuconRegConfig | ccucon7 | CCUCON7 Register configuration.

◆ IfxScuCcu_FlashWaitstateConfig

struct IfxScuCcu_FlashWaitstateConfig

Configuration structure type for the Flash waitstate configuration.

Definition at line 765 of file IfxScuCcu.h.

Data Fields
uint32 | mask | FLASH.FCON Mask to select the bit fields to be updated.
uint32 | value | FLASH.FCON Register value to be updated.

◆ IfxScuCcu_SysPllConfig

struct IfxScuCcu_SysPllConfig

Configuration structure type for the System Pll step. This structure must be used to configure the P, N and K1 dividers .

Definition at line 774 of file IfxScuCcu.h.

Collaboration diagram for IfxScuCcu_SysPllConfig:
[legend]
Data Fields
uint8 | numOfPllDividerSteps | Number of PLL divider steps during clock throttling.
IfxScuCcu_PllStepsConfig * | pllDividerStep | Pointer to the array of Pll divider step configuration.
IfxScuCcu_InitialStepConfig | pllInitialStep | Configuration of first step which is same as internal osc frequency.

◆ IfxScuCcu_Config

struct IfxScuCcu_Config

Configuration structure SCU module.

Definition at line 787 of file IfxScuCcu.h.

Collaboration diagram for IfxScuCcu_Config:
[legend]
Data Fields
IfxScuCcu_ClockDistributionConfig | clockDistribution | Configuration of of bus clocks and other module clock distribution.
IfxScuCcu_FlashWaitstateConfig | flashFconWaitStateConfig | Configuration of flash waitstate.
IfxScuCcu_SysPllConfig | sysPll | System PLL configuration.
uint32 | xtalFrequency | Xtal Frequency.

◆ IfxScuCcu_ErayPllConfig

struct IfxScuCcu_ErayPllConfig

Configuration structure for E-ray PLL.

Definition at line 797 of file IfxScuCcu.h.

Collaboration diagram for IfxScuCcu_ErayPllConfig:
[legend]
Data Fields
IfxScuCcu_InitialStepConfig pllInitialStep Configuration of first step which is same as internal osc frequency.

Function Documentation

◆ IfxScuCcu_isOscillatorStable()

IFX_STATIC boolean IfxScuCcu_isOscillatorStable ( void )

Check if oscillator is stable.

Returns
Status of oscillator stability
Return values
TRUE | Oscillator is unstable
FALSE | Oscillator is stable

Definition at line 1020 of file IfxScuCcu.c.

Referenced by IfxScuCcu_init().

◆ IfxScuCcu_wait()

IFX_STATIC void IfxScuCcu_wait ( float32 timeSec )

API to wait for requested duration. Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled.

Returns
None

Definition at line 1347 of file IfxScuCcu.c.

Referenced by IfxScuCcu_init(), IfxScuCcu_initErayPll(), and IfxScuCcu_switchToBackupClock().


iLLD_TC26B: Clock Control Operative Functions

Functions
Clock Control Operative Functions
iLLD » SCU » Standard Driver » Ccu Basic Functionality
Collaboration diagram for Clock Control Operative Functions:

Functions

IFX_INLINE float32 | IfxScuCcu_getEvrFrequency (void)
API to get EVR Oscillator frequency. This API returns the constant which is specific to the ScuCcu of the controller. More...
IFX_INLINE float32 | IfxScuCcu_getPll2ErayFrequency (void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2ERAY frequency based on the K3 divider value in PLLERAYCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock. More...
IFX_INLINE float32 | IfxScuCcu_getPll2Frequency (void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2 frequency based on the K3 divider value in PLLCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock. More...
IFX_INLINE IfxScu_CCUCON0_CLKSEL | IfxScuCcu_getSourceSelection (void)
Returns the clock source selection. More...
IFX_INLINE float32 | IfxScuCcu_getStmFrequency (void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_INLINE float32 | IfxScuCcu_getCanFrequency (void)
API to get CAN divider frequency. This API returns the fCAN frequency based on the divider value in CCUCON register and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_getBaud1Frequency (void)
API to get BAUD1 divider frequency. This API returns the based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getBaud2Frequency (void)
API to get BAUD2 divider frequency. This API returns the Baud2 frequency based on the divider value in CCUCON register and the fMAX. More...
IFX_EXTERN float32 | IfxScuCcu_getBbbFrequency (void)
API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getCpuFrequency (const IfxCpu_ResourceCpu cpu)
This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequency. More...
IFX_EXTERN float32 | IfxScuCcu_getFsi2Frequency (void)
API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getFsiFrequency (void)
API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getMaxFrequency (void)
API to get FMAX divider frequency. This API returns the fMax frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getModuleFrequency (void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
IFX_EXTERN float32 | IfxScuCcu_getOsc0Frequency (void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getOscFrequency (void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getPllErayFrequency (void)
API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getPllErayVcoFrequency (void)
API to get actual ERAY PLL Voltage Controlled Oscillator frequency. This API returns the based on the divider values in PLLERAYCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getPllFrequency (void)
API to get actual PLL output frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getPllVcoFrequency (void)
API to get actual PLL Voltage Controlled Oscillator frequency. This API returns the based on the divider values in PLLCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getSourceFrequency (void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
IFX_EXTERN float32 | IfxScuCcu_getSpbFrequency (void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider mode and/or SPBDIV divider value in CCUCON registers. More...
IFX_EXTERN float32 | IfxScuCcu_getSriFrequency (void)
API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in CCUCON registers and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_setCpuFrequency (IfxCpu_ResourceCpu cpu, float32 cpuFreq)
API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers. The actual frequency is always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setPll2ErayFrequency (float32 pll2ErayFreq)
API to configure PLL2ERAY (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setPll2Frequency (float32 pll2Freq)
API to configure PLL2 (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setSpbFrequency (float32 spbFreq)
API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setSriFrequency (float32 sriFreq)
API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...

Detailed Description

Function Documentation

◆ IfxScuCcu_getBaud1Frequency()

IFX_EXTERN float32 IfxScuCcu_getBaud1Frequency ( void )

API to get BAUD1 divider frequency. This API returns the based on the divider value in CCUCON register and the input oscillator.

Returns
Baud1 frequency in Hz

Definition at line 212 of file IfxScuCcu.c.

Referenced by IfxAsclin_getFaFrequency(), IfxI2c_getBaudrate(), and IfxI2c_setBaudrate().

◆ IfxScuCcu_getBaud2Frequency()

IFX_EXTERN float32 IfxScuCcu_getBaud2Frequency ( void )

API to get BAUD2 divider frequency. This API returns the Baud2 frequency based on the divider value in CCUCON register and the fMAX.

Returns
Baud2 frequency in Hz

Definition at line 230 of file IfxScuCcu.c.

Referenced by IfxAsclin_getFaFrequency(), and IfxPsi5s_Psi5s_setBaudrate().

◆ IfxScuCcu_getBbbFrequency()

IFX_EXTERN float32 IfxScuCcu_getBbbFrequency ( void )

API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider value in CCUCON register and the input oscillator.

Returns
BBB frequency (fBBB) in Hz

Definition at line 248 of file IfxScuCcu.c.

◆ IfxScuCcu_getCanFrequency()

IFX_INLINE float32 IfxScuCcu_getCanFrequency ( void )

API to get CAN divider frequency. This API returns the fCAN frequency based on the divider value in CCUCON register and fSOURCE.

Returns
STM frequency (fSTM) in Hz

Definition at line 1125 of file IfxScuCcu.h.

Referenced by IfxMultican_Can_getConfig().

◆ IfxScuCcu_getCpuFrequency()

IFX_EXTERN float32 IfxScuCcu_getCpuFrequency ( const IfxCpu_ResourceCpu cpu )

This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequency.

Parameters
cpu CPU number for which effective fCPU is sought
Returns
Cpu[x] frequency in Hz, where x is cpu number passed as parameter

Definition at line 290 of file IfxScuCcu.c.

◆ IfxScuCcu_getEvrFrequency()

IFX_INLINE float32 IfxScuCcu_getEvrFrequency ( void )

API to get EVR Oscillator frequency. This API returns the constant which is specific to the ScuCcu of the controller.

Returns
EVR Oscillator frequency (fBACK or fEVR) in Hz.

Definition at line 1082 of file IfxScuCcu.h.

Referenced by IfxScuCcu_getSourceFrequency().

◆ IfxScuCcu_getFsi2Frequency()

IFX_EXTERN float32 IfxScuCcu_getFsi2Frequency ( void )

API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider value in CCUCON register and the input oscillator.

Returns
FSI2 frequency (fFSI2) in Hz.

Definition at line 317 of file IfxScuCcu.c.

◆ IfxScuCcu_getFsiFrequency()

IFX_EXTERN float32 IfxScuCcu_getFsiFrequency ( void )

API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCON register and the input oscillator.

Returns
FSI frequency (fFSI) in Hz.

Definition at line 340 of file IfxScuCcu.c.

◆ IfxScuCcu_getMaxFrequency()

IFX_EXTERN float32 IfxScuCcu_getMaxFrequency ( void )

API to get FMAX divider frequency. This API returns the fMax frequency based on the divider value in CCUCON register and the input oscillator.

Returns
Max frequency (fMAX) in Hz.

Definition at line 363 of file IfxScuCcu.c.

Referenced by IfxQspi_calcRealBaudrate(), IfxQspi_calculateTimeQuantumLength(), IfxQspi_getModuleFrequency(), IfxScuCcu_getBaud1Frequency(), and IfxScuCcu_getBaud2Frequency().

◆ IfxScuCcu_getModuleFrequency()

IFX_EXTERN float32 IfxScuCcu_getModuleFrequency ( void )

get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration.

Returns
Module frequency in Hz

Definition at line 404 of file IfxScuCcu.c.

◆ IfxScuCcu_getOsc0Frequency()

IFX_EXTERN float32 IfxScuCcu_getOsc0Frequency ( void )

API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator.

Returns
Osc0 frequency (fOSC0) in Hz.

Definition at line 429 of file IfxScuCcu.c.

Referenced by IfxAsclin_getFaFrequency(), IfxDsadc_getModulatorInputClockFreq(), and IfxMultican_Can_getConfig().

◆ IfxScuCcu_getOscFrequency()

IFX_EXTERN float32 IfxScuCcu_getOscFrequency ( void )

API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator.

Returns
Osc frequency (fOSC) in Hz.

Definition at line 435 of file IfxScuCcu.c.

Referenced by IfxScuCcu_getPllErayFrequency(), IfxScuCcu_getPllErayVcoFrequency(), IfxScuCcu_getPllFrequency(), and IfxScuCcu_getPllVcoFrequency().

◆ IfxScuCcu_getPll2ErayFrequency()

IFX_INLINE float32 IfxScuCcu_getPll2ErayFrequency ( void )

API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2ERAY frequency based on the K3 divider value in PLLERAYCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock.

Returns
PLL2ERAY (K3 Divider for ADC clock) frequency in Hz

Definition at line 1094 of file IfxScuCcu.h.

Referenced by IfxMtu_waitForMbistDone(), and IfxScuCcu_setPll2ErayFrequency().

◆ IfxScuCcu_getPll2Frequency()

IFX_INLINE float32 IfxScuCcu_getPll2Frequency ( void )

API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2 frequency based on the K3 divider value in PLLCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock.

Returns
PLL2 (K3 Divider for ADC clock) frequency in Hz

Definition at line 1104 of file IfxScuCcu.h.

Referenced by IfxScuCcu_setPll2Frequency().

◆ IfxScuCcu_getPllErayFrequency()

IFX_EXTERN float32 IfxScuCcu_getPllErayFrequency ( void )

API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator.

Returns
frequency of Pll Eray (fPLLERAY) in Hz

Definition at line 457 of file IfxScuCcu.c.

Referenced by IfxAsclin_getFaFrequency(), IfxDsadc_getModulatorInputClockFreq(), and IfxMultican_Can_getConfig().

◆ IfxScuCcu_getPllErayVcoFrequency()

IFX_EXTERN float32 IfxScuCcu_getPllErayVcoFrequency ( void )

API to get actual ERAY PLL Voltage Controlled Oscillator frequency. This API returns the based on the divider values in PLLERAYCON registers and the input oscillator.

Returns
Pll (Eray) VCO frequency

Definition at line 485 of file IfxScuCcu.c.

Referenced by IfxScuCcu_getPll2ErayFrequency(), and IfxScuCcu_setPll2ErayFrequency().

◆ IfxScuCcu_getPllFrequency()

IFX_EXTERN float32 IfxScuCcu_getPllFrequency ( void )

API to get actual PLL output frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator.

Returns
Pll (fPLL) frequency in Hz

Definition at line 504 of file IfxScuCcu.c.

Referenced by IfxScuCcu_getSourceFrequency().

◆ IfxScuCcu_getPllVcoFrequency()

IFX_EXTERN float32 IfxScuCcu_getPllVcoFrequency ( void )

API to get actual PLL Voltage Controlled Oscillator frequency. This API returns the based on the divider values in PLLCON registers and the input oscillator.

Returns
Pll VCO frequency

Definition at line 532 of file IfxScuCcu.c.

Referenced by IfxScuCcu_getPll2Frequency(), and IfxScuCcu_setPll2Frequency().

◆ IfxScuCcu_getSourceFrequency()

IFX_EXTERN float32 IfxScuCcu_getSourceFrequency ( void )

get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration.

Returns
Effective fSOURCE in Hz

Definition at line 551 of file IfxScuCcu.c.

Referenced by IfxScuCcu_getBbbFrequency(), IfxScuCcu_getCanFrequency(), IfxScuCcu_getGtmFrequency(), IfxScuCcu_getMaxFrequency(), IfxScuCcu_getSpbFrequency(), IfxScuCcu_getSriFrequency(), IfxScuCcu_getStmFrequency(), IfxScuCcu_setGtmFrequency(), IfxScuCcu_setSpbFrequency(), and IfxScuCcu_setSriFrequency().

◆ IfxScuCcu_getSourceSelection()

IFX_INLINE IfxScu_CCUCON0_CLKSEL IfxScuCcu_getSourceSelection ( void )

Returns the clock source selection.

Returns
Clock source selection

Definition at line 1113 of file IfxScuCcu.h.

◆ IfxScuCcu_getSpbFrequency()

IFX_EXTERN float32 IfxScuCcu_getSpbFrequency ( void )

API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider mode and/or SPBDIV divider value in CCUCON registers.

Returns
SPB frequency (fSPB) in Hz

Definition at line 572 of file IfxScuCcu.c.

Referenced by IfxAsclin_getFaFrequency(), IfxCcu6_setT12Frequency(), IfxCcu6_setT13Frequency(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TimerWithTrigger_updateInputFrequency(), IfxDsadc_getModulatorInputClockFreq(), IfxGpt12_getModuleFrequency(), IfxIom_getFrequency(), IfxMsc_downstreamAbraBaudCalculator(), IfxMsc_downstreamFractionalBaudCalculator(), IfxMsc_downstreamNormalBaudCalculator(), IfxMsc_upstreamFractionalBaudCalculator(), IfxMsc_upstreamNormalBaudCalculator(), IfxMultican_Can_initModule(), IfxMultican_Can_initModuleConfig(), IfxPsi5_Psi5_getFracDivClock(), IfxPsi5_Psi5_initializeClock(), IfxPsi5_Psi5_initModuleConfig(), IfxPsi5s_Psi5s_getFracDivClock(), IfxPsi5s_Psi5s_initializeClock(), IfxPsi5s_Psi5s_initModuleConfig(), IfxScuCcu_getModuleFrequency(), IfxScuCcu_setSpbFrequency(), IfxSent_getModuleClock(), IfxVadc_Adc_initModuleConfig(), IfxVadc_getAdcAnalogFrequency(), IfxVadc_getAdcDigitalFrequency(), IfxVadc_getAdcModuleFrequency(), IfxVadc_initializeFAdcD(), and IfxVadc_initializeFAdcI().

◆ IfxScuCcu_getSriFrequency()

IFX_EXTERN float32 IfxScuCcu_getSriFrequency ( void )

API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in CCUCON registers and fSOURCE.

Returns
Sri frequency (fSRI) in Hz

Definition at line 614 of file IfxScuCcu.c.

Referenced by IfxMtu_waitForMbistDone(), IfxScuCcu_getCpuFrequency(), IfxScuCcu_getFsi2Frequency(), IfxScuCcu_getFsiFrequency(), IfxScuCcu_setCpuFrequency(), and IfxScuCcu_setSriFrequency().

◆ IfxScuCcu_getStmFrequency()

IFX_INLINE float32 IfxScuCcu_getStmFrequency ( void )

API to get STM divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE.

Returns
STM frequency (fSTM) in Hz

Definition at line 1119 of file IfxScuCcu.h.

Referenced by IfxCpu_waitEvent(), IfxScuCcu_wait(), and IfxStm_getFrequency().

◆ IfxScuCcu_setCpuFrequency()

IFX_EXTERN float32 IfxScuCcu_setCpuFrequency | ( | IfxCpu_ResourceCpu | cpu,
 |  | float32 | cpuFreq
 | ) |  |

API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers. The actual frequency is always depends on the feasibility with the divider value.

Parameters
cpu | CPU number for which fCPU to be configured
cpuFreq | Desired CPU frequency in Hz
Returns
Actual CPU[x] frequency in Hz, where x is the cpu number passed as parameter

Definition at line 1065 of file IfxScuCcu.c.

◆ IfxScuCcu_setPll2ErayFrequency()

IFX_EXTERN float32 IfxScuCcu_setPll2ErayFrequency ( float32 pll2ErayFreq )

API to configure PLL2ERAY (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value.

Parameters
pll2ErayFreq PLL2ERAY (K3 Divider for ADC clock) frequency in Hz
Returns
Actual PLL2 (K3 Divider for ADC clock) frequency in Hz

Definition at line 1148 of file IfxScuCcu.c.

◆ IfxScuCcu_setPll2Frequency()

IFX_EXTERN float32 IfxScuCcu_setPll2Frequency ( float32 pll2Freq )

API to configure PLL2 (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value.

Parameters
pll2Freq PLL2 (K3 Divider for ADC clock) frequency in Hz
Returns
Actual PLL2 (K3 Divider for ADC clock) frequency in Hz

Definition at line 1161 of file IfxScuCcu.c.

◆ IfxScuCcu_setSpbFrequency()

IFX_EXTERN float32 IfxScuCcu_setSpbFrequency ( float32 spbFreq )

API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
spbFreq Desired SPB frequency in Hz
Returns
Actual SPB frequency in Hz

Definition at line 1174 of file IfxScuCcu.c.

◆ IfxScuCcu_setSriFrequency()

IFX_EXTERN float32 IfxScuCcu_setSriFrequency ( float32 sriFreq )

API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
sriFreq Sri frequency (fSRI) in Hz
Returns
Actual Sri frequency (fSRI) in Hz

Definition at line 1223 of file IfxScuCcu.c.


iLLD_TC26B: Clock Control Configuration Functions

Functions
Clock Control Configuration Functions
iLLD » SCU » Standard Driver » Ccu Basic Functionality
Collaboration diagram for Clock Control Configuration Functions:

Functions

IFX_EXTERN boolean | IfxScuCcu_calculateSysPllDividers (IfxScuCcu_Config *cfg, uint32 fPll)
The api calculates the system PLL divider values P, N, K based on given xtal frequency and PLL frequency. More...
IFX_EXTERN boolean | IfxScuCcu_init (const IfxScuCcu_Config *cfg)
API to initialize the SCU Clock Control Unit. This API initialize the PLL with ramp steps, BUS dividers for the configuration provided by the configuration structure. More...
IFX_EXTERN void | IfxScuCcu_initConfig (IfxScuCcu_Config *cfg)
Initializes the clock configuration with default values. More...
IFX_EXTERN boolean | IfxScuCcu_initErayPll (const IfxScuCcu_ErayPllConfig *cfg)
API to initialize the SCU Eray Pll This API initialize the Eray PLL for the configuration provided by the configuration structure. More...
IFX_EXTERN void | IfxScuCcu_initErayPllConfig (IfxScuCcu_ErayPllConfig *cfg)
Initializes the clock configuration with default values. More...
IFX_EXTERN void | IfxScuCcu_switchToBackupClock (const IfxScuCcu_Config *cfg)
API to switch to Backup clock from the current PLL frequency. More...

Detailed Description

Function Documentation

◆ IfxScuCcu_calculateSysPllDividers()

IFX_EXTERN boolean IfxScuCcu_calculateSysPllDividers | ( | IfxScuCcu_Config * | cfg,
 |  | uint32 | fPll
 | ) |  |

The api calculates the system PLL divider values P, N, K based on given xtal frequency and PLL frequency.

Parameters
cfg | Pointer to the configuration structure of the ScuCcu
fPll | Desired PLL frequency.
Returns
0- Success, 1 - Failure

Definition at line 110 of file IfxScuCcu.c.

◆ IfxScuCcu_init()

IFX_EXTERN boolean IfxScuCcu_init ( const IfxScuCcu_Config * cfg )

API to initialize the SCU Clock Control Unit. This API initialize the PLL with ramp steps, BUS dividers for the configuration provided by the configuration structure.

Parameters
cfg Pointer to the configuration structure of the ScuCcu
Returns
Error status of the ScuCcu initialization process.
Return values
TRUE | If an error occurred during initialization.
FALSE | If initialization was successful.

Definition at line 656 of file IfxScuCcu.c.

◆ IfxScuCcu_initConfig()

IFX_EXTERN void IfxScuCcu_initConfig ( IfxScuCcu_Config * cfg )

Initializes the clock configuration with default values.

Parameters
cfg Pointer to the configuration structure of the ScuCcu
Returns
None

Definition at line 909 of file IfxScuCcu.c.

◆ IfxScuCcu_initErayPll()

IFX_EXTERN boolean IfxScuCcu_initErayPll ( const IfxScuCcu_ErayPllConfig * cfg )

API to initialize the SCU Eray Pll This API initialize the Eray PLL for the configuration provided by the configuration structure.

Parameters
cfg Pointer to the configuration structure of the Eray Pll
Returns
Error status of the ScuCcu Eray Pll initialization process.
Return values
TRUE | If an error occurred during initialization.
FALSE | If initialization was successful.

Definition at line 915 of file IfxScuCcu.c.

◆ IfxScuCcu_initErayPllConfig()

IFX_EXTERN void IfxScuCcu_initErayPllConfig ( IfxScuCcu_ErayPllConfig * cfg )

Initializes the clock configuration with default values.

Parameters
cfg Pointer to the configuration structure of the ScuCcuEray Pll
Returns
None

Definition at line 1014 of file IfxScuCcu.c.

◆ IfxScuCcu_switchToBackupClock()

IFX_EXTERN void IfxScuCcu_switchToBackupClock ( const IfxScuCcu_Config * cfg )

API to switch to Backup clock from the current PLL frequency.

Parameters
cfg Pointer to the configuration structure of the ScuCcu
Returns
None

Definition at line 1263 of file IfxScuCcu.c.


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » SCU » Standard Driver » Ccu Basic Functionality
Collaboration diagram for Enumerations:

Enumerations

enum IfxScuCcu_K1divider {
IfxScuCcu_K1divider_1 = 0,
IfxScuCcu_K1divider_2,
IfxScuCcu_K1divider_3,
IfxScuCcu_K1divider_4,
IfxScuCcu_K1divider_5,
IfxScuCcu_K1divider_6,
IfxScuCcu_K1divider_7,
IfxScuCcu_K1divider_8,
IfxScuCcu_K1divider_9,
IfxScuCcu_K1divider_10,
IfxScuCcu_K1divider_11,
IfxScuCcu_K1divider_12,
IfxScuCcu_K1divider_13,
IfxScuCcu_K1divider_14,
IfxScuCcu_K1divider_15,
IfxScuCcu_K1divider_16,
IfxScuCcu_K1divider_17,
IfxScuCcu_K1divider_18,
IfxScuCcu_K1divider_19,
IfxScuCcu_K1divider_20,
IfxScuCcu_K1divider_21,
IfxScuCcu_K1divider_22,
IfxScuCcu_K1divider_23,
IfxScuCcu_K1divider_24,
IfxScuCcu_K1divider_25,
IfxScuCcu_K1divider_26,
IfxScuCcu_K1divider_27,
IfxScuCcu_K1divider_28,
IfxScuCcu_K1divider_29,
IfxScuCcu_K1divider_30,
IfxScuCcu_K1divider_31,
IfxScuCcu_K1divider_32,
IfxScuCcu_K1divider_33,
IfxScuCcu_K1divider_34,
IfxScuCcu_K1divider_35,
IfxScuCcu_K1divider_36,
IfxScuCcu_K1divider_37,
IfxScuCcu_K1divider_38,
IfxScuCcu_K1divider_39,
IfxScuCcu_K1divider_40,
IfxScuCcu_K1divider_41,
IfxScuCcu_K1divider_42,
IfxScuCcu_K1divider_43,
IfxScuCcu_K1divider_44,
IfxScuCcu_K1divider_45,
IfxScuCcu_K1divider_46,
IfxScuCcu_K1divider_47,
IfxScuCcu_K1divider_48,
IfxScuCcu_K1divider_49,
IfxScuCcu_K1divider_50,
IfxScuCcu_K1divider_51,
IfxScuCcu_K1divider_52,
IfxScuCcu_K1divider_53,
IfxScuCcu_K1divider_54,
IfxScuCcu_K1divider_55,
IfxScuCcu_K1divider_56,
IfxScuCcu_K1divider_57,
IfxScuCcu_K1divider_58,
IfxScuCcu_K1divider_59,
IfxScuCcu_K1divider_60,
IfxScuCcu_K1divider_61,
IfxScuCcu_K1divider_62,
IfxScuCcu_K1divider_63,
IfxScuCcu_K1divider_64,
IfxScuCcu_K1divider_65,
IfxScuCcu_K1divider_66,
IfxScuCcu_K1divider_67,
IfxScuCcu_K1divider_68,
IfxScuCcu_K1divider_69,
IfxScuCcu_K1divider_70,
IfxScuCcu_K1divider_71,
IfxScuCcu_K1divider_72,
IfxScuCcu_K1divider_73,
IfxScuCcu_K1divider_74,
IfxScuCcu_K1divider_75,
IfxScuCcu_K1divider_76,
IfxScuCcu_K1divider_77,
IfxScuCcu_K1divider_78,
IfxScuCcu_K1divider_79,
IfxScuCcu_K1divider_80,
IfxScuCcu_K1divider_81,
IfxScuCcu_K1divider_82,
IfxScuCcu_K1divider_83,
IfxScuCcu_K1divider_84,
IfxScuCcu_K1divider_85,
IfxScuCcu_K1divider_86,
IfxScuCcu_K1divider_87,
IfxScuCcu_K1divider_88,
IfxScuCcu_K1divider_89,
IfxScuCcu_K1divider_90,
IfxScuCcu_K1divider_91,
IfxScuCcu_K1divider_92,
IfxScuCcu_K1divider_93,
IfxScuCcu_K1divider_94,
IfxScuCcu_K1divider_95,
IfxScuCcu_K1divider_96,
IfxScuCcu_K1divider_97,
IfxScuCcu_K1divider_98,
IfxScuCcu_K1divider_99,
IfxScuCcu_K1divider_100,
IfxScuCcu_K1divider_101,
IfxScuCcu_K1divider_102,
IfxScuCcu_K1divider_103,
IfxScuCcu_K1divider_104,
IfxScuCcu_K1divider_105,
IfxScuCcu_K1divider_106,
IfxScuCcu_K1divider_107,
IfxScuCcu_K1divider_108,
IfxScuCcu_K1divider_109,
IfxScuCcu_K1divider_110,
IfxScuCcu_K1divider_111,
IfxScuCcu_K1divider_112,
IfxScuCcu_K1divider_113,
IfxScuCcu_K1divider_114,
IfxScuCcu_K1divider_115,
IfxScuCcu_K1divider_116,
IfxScuCcu_K1divider_117,
IfxScuCcu_K1divider_118,
IfxScuCcu_K1divider_119,
IfxScuCcu_K1divider_120,
IfxScuCcu_K1divider_121,
IfxScuCcu_K1divider_122,
IfxScuCcu_K1divider_123,
IfxScuCcu_K1divider_124,
IfxScuCcu_K1divider_125,
IfxScuCcu_K1divider_126,
IfxScuCcu_K1divider_127,
IfxScuCcu_K1divider_128
}
MODULE_SCU.PLLCON1.B.K1DIV, specifies the K1-Divider. More...
enum IfxScuCcu_K2divider {
IfxScuCcu_K2divider_1 = 0,
IfxScuCcu_K2divider_2,
IfxScuCcu_K2divider_3,
IfxScuCcu_K2divider_4,
IfxScuCcu_K2divider_5,
IfxScuCcu_K2divider_6,
IfxScuCcu_K2divider_7,
IfxScuCcu_K2divider_8,
IfxScuCcu_K2divider_9,
IfxScuCcu_K2divider_10,
IfxScuCcu_K2divider_11,
IfxScuCcu_K2divider_12,
IfxScuCcu_K2divider_13,
IfxScuCcu_K2divider_14,
IfxScuCcu_K2divider_15,
IfxScuCcu_K2divider_16,
IfxScuCcu_K2divider_17,
IfxScuCcu_K2divider_18,
IfxScuCcu_K2divider_19,
IfxScuCcu_K2divider_20,
IfxScuCcu_K2divider_21,
IfxScuCcu_K2divider_22,
IfxScuCcu_K2divider_23,
IfxScuCcu_K2divider_24,
IfxScuCcu_K2divider_25,
IfxScuCcu_K2divider_26,
IfxScuCcu_K2divider_27,
IfxScuCcu_K2divider_28,
IfxScuCcu_K2divider_29,
IfxScuCcu_K2divider_30,
IfxScuCcu_K2divider_31,
IfxScuCcu_K2divider_32,
IfxScuCcu_K2divider_33,
IfxScuCcu_K2divider_34,
IfxScuCcu_K2divider_35,
IfxScuCcu_K2divider_36,
IfxScuCcu_K2divider_37,
IfxScuCcu_K2divider_38,
IfxScuCcu_K2divider_39,
IfxScuCcu_K2divider_40,
IfxScuCcu_K2divider_41,
IfxScuCcu_K2divider_42,
IfxScuCcu_K2divider_43,
IfxScuCcu_K2divider_44,
IfxScuCcu_K2divider_45,
IfxScuCcu_K2divider_46,
IfxScuCcu_K2divider_47,
IfxScuCcu_K2divider_48,
IfxScuCcu_K2divider_49,
IfxScuCcu_K2divider_50,
IfxScuCcu_K2divider_51,
IfxScuCcu_K2divider_52,
IfxScuCcu_K2divider_53,
IfxScuCcu_K2divider_54,
IfxScuCcu_K2divider_55,
IfxScuCcu_K2divider_56,
IfxScuCcu_K2divider_57,
IfxScuCcu_K2divider_58,
IfxScuCcu_K2divider_59,
IfxScuCcu_K2divider_60,
IfxScuCcu_K2divider_61,
IfxScuCcu_K2divider_62,
IfxScuCcu_K2divider_63,
IfxScuCcu_K2divider_64,
IfxScuCcu_K2divider_65,
IfxScuCcu_K2divider_66,
IfxScuCcu_K2divider_67,
IfxScuCcu_K2divider_68,
IfxScuCcu_K2divider_69,
IfxScuCcu_K2divider_70,
IfxScuCcu_K2divider_71,
IfxScuCcu_K2divider_72,
IfxScuCcu_K2divider_73,
IfxScuCcu_K2divider_74,
IfxScuCcu_K2divider_75,
IfxScuCcu_K2divider_76,
IfxScuCcu_K2divider_77,
IfxScuCcu_K2divider_78,
IfxScuCcu_K2divider_79,
IfxScuCcu_K2divider_80,
IfxScuCcu_K2divider_81,
IfxScuCcu_K2divider_82,
IfxScuCcu_K2divider_83,
IfxScuCcu_K2divider_84,
IfxScuCcu_K2divider_85,
IfxScuCcu_K2divider_86,
IfxScuCcu_K2divider_87,
IfxScuCcu_K2divider_88,
IfxScuCcu_K2divider_89,
IfxScuCcu_K2divider_90,
IfxScuCcu_K2divider_91,
IfxScuCcu_K2divider_92,
IfxScuCcu_K2divider_93,
IfxScuCcu_K2divider_94,
IfxScuCcu_K2divider_95,
IfxScuCcu_K2divider_96,
IfxScuCcu_K2divider_97,
IfxScuCcu_K2divider_98,
IfxScuCcu_K2divider_99,
IfxScuCcu_K2divider_100,
IfxScuCcu_K2divider_101,
IfxScuCcu_K2divider_102,
IfxScuCcu_K2divider_103,
IfxScuCcu_K2divider_104,
IfxScuCcu_K2divider_105,
IfxScuCcu_K2divider_106,
IfxScuCcu_K2divider_107,
IfxScuCcu_K2divider_108,
IfxScuCcu_K2divider_109,
IfxScuCcu_K2divider_110,
IfxScuCcu_K2divider_111,
IfxScuCcu_K2divider_112,
IfxScuCcu_K2divider_113,
IfxScuCcu_K2divider_114,
IfxScuCcu_K2divider_115,
IfxScuCcu_K2divider_116,
IfxScuCcu_K2divider_117,
IfxScuCcu_K2divider_118,
IfxScuCcu_K2divider_119,
IfxScuCcu_K2divider_120,
IfxScuCcu_K2divider_121,
IfxScuCcu_K2divider_122,
IfxScuCcu_K2divider_123,
IfxScuCcu_K2divider_124,
IfxScuCcu_K2divider_125,
IfxScuCcu_K2divider_126,
IfxScuCcu_K2divider_127,
IfxScuCcu_K2divider_128
}
MODULE_SCU.PLLCON1.B.K2DIV, specifies the K2-Divider. More...
enum IfxScuCcu_K3divider {
IfxScuCcu_K3divider_1 = 0,
IfxScuCcu_K3divider_2,
IfxScuCcu_K3divider_3,
IfxScuCcu_K3divider_4,
IfxScuCcu_K3divider_5,
IfxScuCcu_K3divider_6,
IfxScuCcu_K3divider_7,
IfxScuCcu_K3divider_8,
IfxScuCcu_K3divider_9,
IfxScuCcu_K3divider_10,
IfxScuCcu_K3divider_11,
IfxScuCcu_K3divider_12,
IfxScuCcu_K3divider_13,
IfxScuCcu_K3divider_14,
IfxScuCcu_K3divider_15,
IfxScuCcu_K3divider_16,
IfxScuCcu_K3divider_17,
IfxScuCcu_K3divider_18,
IfxScuCcu_K3divider_19,
IfxScuCcu_K3divider_20,
IfxScuCcu_K3divider_21,
IfxScuCcu_K3divider_22,
IfxScuCcu_K3divider_23,
IfxScuCcu_K3divider_24,
IfxScuCcu_K3divider_25,
IfxScuCcu_K3divider_26,
IfxScuCcu_K3divider_27,
IfxScuCcu_K3divider_28,
IfxScuCcu_K3divider_29,
IfxScuCcu_K3divider_30,
IfxScuCcu_K3divider_31,
IfxScuCcu_K3divider_32,
IfxScuCcu_K3divider_33,
IfxScuCcu_K3divider_34,
IfxScuCcu_K3divider_35,
IfxScuCcu_K3divider_36,
IfxScuCcu_K3divider_37,
IfxScuCcu_K3divider_38,
IfxScuCcu_K3divider_39,
IfxScuCcu_K3divider_40,
IfxScuCcu_K3divider_41,
IfxScuCcu_K3divider_42,
IfxScuCcu_K3divider_43,
IfxScuCcu_K3divider_44,
IfxScuCcu_K3divider_45,
IfxScuCcu_K3divider_46,
IfxScuCcu_K3divider_47,
IfxScuCcu_K3divider_48,
IfxScuCcu_K3divider_49,
IfxScuCcu_K3divider_50,
IfxScuCcu_K3divider_51,
IfxScuCcu_K3divider_52,
IfxScuCcu_K3divider_53,
IfxScuCcu_K3divider_54,
IfxScuCcu_K3divider_55,
IfxScuCcu_K3divider_56,
IfxScuCcu_K3divider_57,
IfxScuCcu_K3divider_58,
IfxScuCcu_K3divider_59,
IfxScuCcu_K3divider_60,
IfxScuCcu_K3divider_61,
IfxScuCcu_K3divider_62,
IfxScuCcu_K3divider_63,
IfxScuCcu_K3divider_64,
IfxScuCcu_K3divider_65,
IfxScuCcu_K3divider_66,
IfxScuCcu_K3divider_67,
IfxScuCcu_K3divider_68,
IfxScuCcu_K3divider_69,
IfxScuCcu_K3divider_70,
IfxScuCcu_K3divider_71,
IfxScuCcu_K3divider_72,
IfxScuCcu_K3divider_73,
IfxScuCcu_K3divider_74,
IfxScuCcu_K3divider_75,
IfxScuCcu_K3divider_76,
IfxScuCcu_K3divider_77,
IfxScuCcu_K3divider_78,
IfxScuCcu_K3divider_79,
IfxScuCcu_K3divider_80,
IfxScuCcu_K3divider_81,
IfxScuCcu_K3divider_82,
IfxScuCcu_K3divider_83,
IfxScuCcu_K3divider_84,
IfxScuCcu_K3divider_85,
IfxScuCcu_K3divider_86,
IfxScuCcu_K3divider_87,
IfxScuCcu_K3divider_88,
IfxScuCcu_K3divider_89,
IfxScuCcu_K3divider_90,
IfxScuCcu_K3divider_91,
IfxScuCcu_K3divider_92,
IfxScuCcu_K3divider_93,
IfxScuCcu_K3divider_94,
IfxScuCcu_K3divider_95,
IfxScuCcu_K3divider_96,
IfxScuCcu_K3divider_97,
IfxScuCcu_K3divider_98,
IfxScuCcu_K3divider_99,
IfxScuCcu_K3divider_100,
IfxScuCcu_K3divider_101,
IfxScuCcu_K3divider_102,
IfxScuCcu_K3divider_103,
IfxScuCcu_K3divider_104,
IfxScuCcu_K3divider_105,
IfxScuCcu_K3divider_106,
IfxScuCcu_K3divider_107,
IfxScuCcu_K3divider_108,
IfxScuCcu_K3divider_109,
IfxScuCcu_K3divider_110,
IfxScuCcu_K3divider_111,
IfxScuCcu_K3divider_112,
IfxScuCcu_K3divider_113,
IfxScuCcu_K3divider_114,
IfxScuCcu_K3divider_115,
IfxScuCcu_K3divider_116,
IfxScuCcu_K3divider_117,
IfxScuCcu_K3divider_118,
IfxScuCcu_K3divider_119,
IfxScuCcu_K3divider_120,
IfxScuCcu_K3divider_121,
IfxScuCcu_K3divider_122,
IfxScuCcu_K3divider_123,
IfxScuCcu_K3divider_124,
IfxScuCcu_K3divider_125,
IfxScuCcu_K3divider_126,
IfxScuCcu_K3divider_127,
IfxScuCcu_K3divider_128
}
MODULE_SCU.PLLCON1.B.K3DIV, specifies the K3-Divider. More...
enum IfxScuCcu_Ndivider {
IfxScuCcu_Ndivider_1 = 0,
IfxScuCcu_Ndivider_2,
IfxScuCcu_Ndivider_3,
IfxScuCcu_Ndivider_4,
IfxScuCcu_Ndivider_5,
IfxScuCcu_Ndivider_6,
IfxScuCcu_Ndivider_7,
IfxScuCcu_Ndivider_8,
IfxScuCcu_Ndivider_9,
IfxScuCcu_Ndivider_10,
IfxScuCcu_Ndivider_11,
IfxScuCcu_Ndivider_12,
IfxScuCcu_Ndivider_13,
IfxScuCcu_Ndivider_14,
IfxScuCcu_Ndivider_15,
IfxScuCcu_Ndivider_16,
IfxScuCcu_Ndivider_17,
IfxScuCcu_Ndivider_18,
IfxScuCcu_Ndivider_19,
IfxScuCcu_Ndivider_20,
IfxScuCcu_Ndivider_21,
IfxScuCcu_Ndivider_22,
IfxScuCcu_Ndivider_23,
IfxScuCcu_Ndivider_24,
IfxScuCcu_Ndivider_25,
IfxScuCcu_Ndivider_26,
IfxScuCcu_Ndivider_27,
IfxScuCcu_Ndivider_28,
IfxScuCcu_Ndivider_29,
IfxScuCcu_Ndivider_30,
IfxScuCcu_Ndivider_31,
IfxScuCcu_Ndivider_32,
IfxScuCcu_Ndivider_33,
IfxScuCcu_Ndivider_34,
IfxScuCcu_Ndivider_35,
IfxScuCcu_Ndivider_36,
IfxScuCcu_Ndivider_37,
IfxScuCcu_Ndivider_38,
IfxScuCcu_Ndivider_39,
IfxScuCcu_Ndivider_40,
IfxScuCcu_Ndivider_41,
IfxScuCcu_Ndivider_42,
IfxScuCcu_Ndivider_43,
IfxScuCcu_Ndivider_44,
IfxScuCcu_Ndivider_45,
IfxScuCcu_Ndivider_46,
IfxScuCcu_Ndivider_47,
IfxScuCcu_Ndivider_48,
IfxScuCcu_Ndivider_49,
IfxScuCcu_Ndivider_50,
IfxScuCcu_Ndivider_51,
IfxScuCcu_Ndivider_52,
IfxScuCcu_Ndivider_53,
IfxScuCcu_Ndivider_54,
IfxScuCcu_Ndivider_55,
IfxScuCcu_Ndivider_56,
IfxScuCcu_Ndivider_57,
IfxScuCcu_Ndivider_58,
IfxScuCcu_Ndivider_59,
IfxScuCcu_Ndivider_60,
IfxScuCcu_Ndivider_61,
IfxScuCcu_Ndivider_62,
IfxScuCcu_Ndivider_63,
IfxScuCcu_Ndivider_64,
IfxScuCcu_Ndivider_65,
IfxScuCcu_Ndivider_66,
IfxScuCcu_Ndivider_67,
IfxScuCcu_Ndivider_68,
IfxScuCcu_Ndivider_69,
IfxScuCcu_Ndivider_70,
IfxScuCcu_Ndivider_71,
IfxScuCcu_Ndivider_72,
IfxScuCcu_Ndivider_73,
IfxScuCcu_Ndivider_74,
IfxScuCcu_Ndivider_75,
IfxScuCcu_Ndivider_76,
IfxScuCcu_Ndivider_77,
IfxScuCcu_Ndivider_78,
IfxScuCcu_Ndivider_79,
IfxScuCcu_Ndivider_80,
IfxScuCcu_Ndivider_81,
IfxScuCcu_Ndivider_82,
IfxScuCcu_Ndivider_83,
IfxScuCcu_Ndivider_84,
IfxScuCcu_Ndivider_85,
IfxScuCcu_Ndivider_86,
IfxScuCcu_Ndivider_87,
IfxScuCcu_Ndivider_88,
IfxScuCcu_Ndivider_89,
IfxScuCcu_Ndivider_90,
IfxScuCcu_Ndivider_91,
IfxScuCcu_Ndivider_92,
IfxScuCcu_Ndivider_93,
IfxScuCcu_Ndivider_94,
IfxScuCcu_Ndivider_95,
IfxScuCcu_Ndivider_96,
IfxScuCcu_Ndivider_97,
IfxScuCcu_Ndivider_98,
IfxScuCcu_Ndivider_99,
IfxScuCcu_Ndivider_100,
IfxScuCcu_Ndivider_101,
IfxScuCcu_Ndivider_102,
IfxScuCcu_Ndivider_103,
IfxScuCcu_Ndivider_104,
IfxScuCcu_Ndivider_105,
IfxScuCcu_Ndivider_106,
IfxScuCcu_Ndivider_107,
IfxScuCcu_Ndivider_108,
IfxScuCcu_Ndivider_109,
IfxScuCcu_Ndivider_110,
IfxScuCcu_Ndivider_111,
IfxScuCcu_Ndivider_112,
IfxScuCcu_Ndivider_113,
IfxScuCcu_Ndivider_114,
IfxScuCcu_Ndivider_115,
IfxScuCcu_Ndivider_116,
IfxScuCcu_Ndivider_117,
IfxScuCcu_Ndivider_118,
IfxScuCcu_Ndivider_119,
IfxScuCcu_Ndivider_120,
IfxScuCcu_Ndivider_121,
IfxScuCcu_Ndivider_122,
IfxScuCcu_Ndivider_123,
IfxScuCcu_Ndivider_124,
IfxScuCcu_Ndivider_125,
IfxScuCcu_Ndivider_126,
IfxScuCcu_Ndivider_127,
IfxScuCcu_Ndivider_128
}
MODULE_SCU.PLLCON0.B.NDIV, specifies the N-Divider. More...
enum IfxScuCcu_Pdivider {
IfxScuCcu_Pdivider_1 = 0,
IfxScuCcu_Pdivider_2,
IfxScuCcu_Pdivider_3,
IfxScuCcu_Pdivider_4,
IfxScuCcu_Pdivider_5,
IfxScuCcu_Pdivider_6,
IfxScuCcu_Pdivider_7,
IfxScuCcu_Pdivider_8,
IfxScuCcu_Pdivider_9,
IfxScuCcu_Pdivider_10,
IfxScuCcu_Pdivider_11,
IfxScuCcu_Pdivider_12,
IfxScuCcu_Pdivider_13,
IfxScuCcu_Pdivider_14,
IfxScuCcu_Pdivider_15,
IfxScuCcu_Pdivider_16
}
MODULE_SCU.PLLCON0.B.PDIV, specifies the P-Divider. More...

Detailed Description

Enumeration Type Documentation

◆ IfxScuCcu_K1divider

enum IfxScuCcu_K1divider

MODULE_SCU.PLLCON1.B.K1DIV, specifies the K1-Divider.

Enumerator
IfxScuCcu_K1divider_1 | K1-Divider 1.
IfxScuCcu_K1divider_2 | K1-Divider 2.
IfxScuCcu_K1divider_3 | K1-Divider 3.
IfxScuCcu_K1divider_4 | K1-Divider 4.
IfxScuCcu_K1divider_5 | K1-Divider 5.
IfxScuCcu_K1divider_6 | K1-Divider 6.
IfxScuCcu_K1divider_7 | K1-Divider 7.
IfxScuCcu_K1divider_8 | K1-Divider 8.
IfxScuCcu_K1divider_9 | K1-Divider 9.
IfxScuCcu_K1divider_10 | K1-Divider 10.
IfxScuCcu_K1divider_11 | K1-Divider 11.
IfxScuCcu_K1divider_12 | K1-Divider 12.
IfxScuCcu_K1divider_13 | K1-Divider 13.
IfxScuCcu_K1divider_14 | K1-Divider 14.
IfxScuCcu_K1divider_15 | K1-Divider 15.
IfxScuCcu_K1divider_16 | K1-Divider 16.
IfxScuCcu_K1divider_17 | K1-Divider 17.
IfxScuCcu_K1divider_18 | K1-Divider 18.
IfxScuCcu_K1divider_19 | K1-Divider 19.
IfxScuCcu_K1divider_20 | K1-Divider 20.
IfxScuCcu_K1divider_21 | K1-Divider 21.
IfxScuCcu_K1divider_22 | K1-Divider 22.
IfxScuCcu_K1divider_23 | K1-Divider 23.
IfxScuCcu_K1divider_24 | K1-Divider 24.
IfxScuCcu_K1divider_25 | K1-Divider 25.
IfxScuCcu_K1divider_26 | K1-Divider 26.
IfxScuCcu_K1divider_27 | K1-Divider 27.
IfxScuCcu_K1divider_28 | K1-Divider 28.
IfxScuCcu_K1divider_29 | K1-Divider 29.
IfxScuCcu_K1divider_30 | K1-Divider 30.
IfxScuCcu_K1divider_31 | K1-Divider 31.
IfxScuCcu_K1divider_32 | K1-Divider 32.
IfxScuCcu_K1divider_33 | K1-Divider 33.
IfxScuCcu_K1divider_34 | K1-Divider 34.
IfxScuCcu_K1divider_35 | K1-Divider 35.
IfxScuCcu_K1divider_36 | K1-Divider 36.
IfxScuCcu_K1divider_37 | K1-Divider 37.
IfxScuCcu_K1divider_38 | K1-Divider 38.
IfxScuCcu_K1divider_39 | K1-Divider 39.
IfxScuCcu_K1divider_40 | K1-Divider 40.
IfxScuCcu_K1divider_41 | K1-Divider 41.
IfxScuCcu_K1divider_42 | K1-Divider 42.
IfxScuCcu_K1divider_43 | K1-Divider 43.
IfxScuCcu_K1divider_44 | K1-Divider 44.
IfxScuCcu_K1divider_45 | K1-Divider 45.
IfxScuCcu_K1divider_46 | K1-Divider 46.
IfxScuCcu_K1divider_47 | K1-Divider 47.
IfxScuCcu_K1divider_48 | K1-Divider 48.
IfxScuCcu_K1divider_49 | K1-Divider 49.
IfxScuCcu_K1divider_50 | K1-Divider 50.
IfxScuCcu_K1divider_51 | K1-Divider 51.
IfxScuCcu_K1divider_52 | K1-Divider 52.
IfxScuCcu_K1divider_53 | K1-Divider 53.
IfxScuCcu_K1divider_54 | K1-Divider 54.
IfxScuCcu_K1divider_55 | K1-Divider 55.
IfxScuCcu_K1divider_56 | K1-Divider 56.
IfxScuCcu_K1divider_57 | K1-Divider 57.
IfxScuCcu_K1divider_58 | K1-Divider 58.
IfxScuCcu_K1divider_59 | K1-Divider 59.
IfxScuCcu_K1divider_60 | K1-Divider 60.
IfxScuCcu_K1divider_61 | K1-Divider 61.
IfxScuCcu_K1divider_62 | K1-Divider 62.
IfxScuCcu_K1divider_63 | K1-Divider 63.
IfxScuCcu_K1divider_64 | K1-Divider 64.
IfxScuCcu_K1divider_65 | K1-Divider 65.
IfxScuCcu_K1divider_66 | K1-Divider 66.
IfxScuCcu_K1divider_67 | K1-Divider 67.
IfxScuCcu_K1divider_68 | K1-Divider 68.
IfxScuCcu_K1divider_69 | K1-Divider 69.
IfxScuCcu_K1divider_70 | K1-Divider 70.
IfxScuCcu_K1divider_71 | K1-Divider 71.
IfxScuCcu_K1divider_72 | K1-Divider 72.
IfxScuCcu_K1divider_73 | K1-Divider 73.
IfxScuCcu_K1divider_74 | K1-Divider 74.
IfxScuCcu_K1divider_75 | K1-Divider 75.
IfxScuCcu_K1divider_76 | K1-Divider 76.
IfxScuCcu_K1divider_77 | K1-Divider 77.
IfxScuCcu_K1divider_78 | K1-Divider 78.
IfxScuCcu_K1divider_79 | K1-Divider 79.
IfxScuCcu_K1divider_80 | K1-Divider 80.
IfxScuCcu_K1divider_81 | K1-Divider 81.
IfxScuCcu_K1divider_82 | K1-Divider 82.
IfxScuCcu_K1divider_83 | K1-Divider 83.
IfxScuCcu_K1divider_84 | K1-Divider 84.
IfxScuCcu_K1divider_85 | K1-Divider 85.
IfxScuCcu_K1divider_86 | K1-Divider 86.
IfxScuCcu_K1divider_87 | K1-Divider 87.
IfxScuCcu_K1divider_88 | K1-Divider 88.
IfxScuCcu_K1divider_89 | K1-Divider 89.
IfxScuCcu_K1divider_90 | K1-Divider 90.
IfxScuCcu_K1divider_91 | K1-Divider 91.
IfxScuCcu_K1divider_92 | K1-Divider 92.
IfxScuCcu_K1divider_93 | K1-Divider 93.
IfxScuCcu_K1divider_94 | K1-Divider 94.
IfxScuCcu_K1divider_95 | K1-Divider 95.
IfxScuCcu_K1divider_96 | K1-Divider 96.
IfxScuCcu_K1divider_97 | K1-Divider 97.
IfxScuCcu_K1divider_98 | K1-Divider 98.
IfxScuCcu_K1divider_99 | K1-Divider 99.
IfxScuCcu_K1divider_100 | K1-Divider 100.
IfxScuCcu_K1divider_101 | K1-Divider 101.
IfxScuCcu_K1divider_102 | K1-Divider 102.
IfxScuCcu_K1divider_103 | K1-Divider 103.
IfxScuCcu_K1divider_104 | K1-Divider 104.
IfxScuCcu_K1divider_105 | K1-Divider 105.
IfxScuCcu_K1divider_106 | K1-Divider 106.
IfxScuCcu_K1divider_107 | K1-Divider 107.
IfxScuCcu_K1divider_108 | K1-Divider 108.
IfxScuCcu_K1divider_109 | K1-Divider 109.
IfxScuCcu_K1divider_110 | K1-Divider 110.
IfxScuCcu_K1divider_111 | K1-Divider 111.
IfxScuCcu_K1divider_112 | K1-Divider 112.
IfxScuCcu_K1divider_113 | K1-Divider 113.
IfxScuCcu_K1divider_114 | K1-Divider 114.
IfxScuCcu_K1divider_115 | K1-Divider 115.
IfxScuCcu_K1divider_116 | K1-Divider 116.
IfxScuCcu_K1divider_117 | K1-Divider 117.
IfxScuCcu_K1divider_118 | K1-Divider 118.
IfxScuCcu_K1divider_119 | K1-Divider 119.
IfxScuCcu_K1divider_120 | K1-Divider 120.
IfxScuCcu_K1divider_121 | K1-Divider 121.
IfxScuCcu_K1divider_122 | K1-Divider 122.
IfxScuCcu_K1divider_123 | K1-Divider 123.
IfxScuCcu_K1divider_124 | K1-Divider 124.
IfxScuCcu_K1divider_125 | K1-Divider 125.
IfxScuCcu_K1divider_126 | K1-Divider 126.
IfxScuCcu_K1divider_127 | K1-Divider 127.
IfxScuCcu_K1divider_128 | K1-Divider 128.

Definition at line 155 of file IfxScuCcu.h.

◆ IfxScuCcu_K2divider

enum IfxScuCcu_K2divider

MODULE_SCU.PLLCON1.B.K2DIV, specifies the K2-Divider.

Enumerator
IfxScuCcu_K2divider_1 | K2-Divider 1.
IfxScuCcu_K2divider_2 | K2-Divider 2.
IfxScuCcu_K2divider_3 | K2-Divider 3.
IfxScuCcu_K2divider_4 | K2-Divider 4.
IfxScuCcu_K2divider_5 | K2-Divider 5.
IfxScuCcu_K2divider_6 | K2-Divider 6.
IfxScuCcu_K2divider_7 | K2-Divider 7.
IfxScuCcu_K2divider_8 | K2-Divider 8.
IfxScuCcu_K2divider_9 | K2-Divider 9.
IfxScuCcu_K2divider_10 | K2-Divider 10.
IfxScuCcu_K2divider_11 | K2-Divider 11.
IfxScuCcu_K2divider_12 | K2-Divider 12.
IfxScuCcu_K2divider_13 | K2-Divider 13.
IfxScuCcu_K2divider_14 | K2-Divider 14.
IfxScuCcu_K2divider_15 | K2-Divider 15.
IfxScuCcu_K2divider_16 | K2-Divider 16.
IfxScuCcu_K2divider_17 | K2-Divider 17.
IfxScuCcu_K2divider_18 | K2-Divider 18.
IfxScuCcu_K2divider_19 | K2-Divider 19.
IfxScuCcu_K2divider_20 | K2-Divider 20.
IfxScuCcu_K2divider_21 | K2-Divider 21.
IfxScuCcu_K2divider_22 | K2-Divider 22.
IfxScuCcu_K2divider_23 | K2-Divider 23.
IfxScuCcu_K2divider_24 | K2-Divider 24.
IfxScuCcu_K2divider_25 | K2-Divider 25.
IfxScuCcu_K2divider_26 | K2-Divider 26.
IfxScuCcu_K2divider_27 | K2-Divider 27.
IfxScuCcu_K2divider_28 | K2-Divider 28.
IfxScuCcu_K2divider_29 | K2-Divider 29.
IfxScuCcu_K2divider_30 | K2-Divider 30.
IfxScuCcu_K2divider_31 | K2-Divider 31.
IfxScuCcu_K2divider_32 | K2-Divider 32.
IfxScuCcu_K2divider_33 | K2-Divider 33.
IfxScuCcu_K2divider_34 | K2-Divider 34.
IfxScuCcu_K2divider_35 | K2-Divider 35.
IfxScuCcu_K2divider_36 | K2-Divider 36.
IfxScuCcu_K2divider_37 | K2-Divider 37.
IfxScuCcu_K2divider_38 | K2-Divider 38.
IfxScuCcu_K2divider_39 | K2-Divider 39.
IfxScuCcu_K2divider_40 | K2-Divider 40.
IfxScuCcu_K2divider_41 | K2-Divider 41.
IfxScuCcu_K2divider_42 | K2-Divider 42.
IfxScuCcu_K2divider_43 | K2-Divider 43.
IfxScuCcu_K2divider_44 | K2-Divider 44.
IfxScuCcu_K2divider_45 | K2-Divider 45.
IfxScuCcu_K2divider_46 | K2-Divider 46.
IfxScuCcu_K2divider_47 | K2-Divider 47.
IfxScuCcu_K2divider_48 | K2-Divider 48.
IfxScuCcu_K2divider_49 | K2-Divider 49.
IfxScuCcu_K2divider_50 | K2-Divider 50.
IfxScuCcu_K2divider_51 | K2-Divider 51.
IfxScuCcu_K2divider_52 | K2-Divider 52.
IfxScuCcu_K2divider_53 | K2-Divider 53.
IfxScuCcu_K2divider_54 | K2-Divider 54.
IfxScuCcu_K2divider_55 | K2-Divider 55.
IfxScuCcu_K2divider_56 | K2-Divider 56.
IfxScuCcu_K2divider_57 | K2-Divider 57.
IfxScuCcu_K2divider_58 | K2-Divider 58.
IfxScuCcu_K2divider_59 | K2-Divider 59.
IfxScuCcu_K2divider_60 | K2-Divider 60.
IfxScuCcu_K2divider_61 | K2-Divider 61.
IfxScuCcu_K2divider_62 | K2-Divider 62.
IfxScuCcu_K2divider_63 | K2-Divider 63.
IfxScuCcu_K2divider_64 | K2-Divider 64.
IfxScuCcu_K2divider_65 | K2-Divider 65.
IfxScuCcu_K2divider_66 | K2-Divider 66.
IfxScuCcu_K2divider_67 | K2-Divider 67.
IfxScuCcu_K2divider_68 | K2-Divider 68.
IfxScuCcu_K2divider_69 | K2-Divider 69.
IfxScuCcu_K2divider_70 | K2-Divider 70.
IfxScuCcu_K2divider_71 | K2-Divider 71.
IfxScuCcu_K2divider_72 | K2-Divider 72.
IfxScuCcu_K2divider_73 | K2-Divider 73.
IfxScuCcu_K2divider_74 | K2-Divider 74.
IfxScuCcu_K2divider_75 | K2-Divider 75.
IfxScuCcu_K2divider_76 | K2-Divider 76.
IfxScuCcu_K2divider_77 | K2-Divider 77.
IfxScuCcu_K2divider_78 | K2-Divider 78.
IfxScuCcu_K2divider_79 | K2-Divider 79.
IfxScuCcu_K2divider_80 | K2-Divider 80.
IfxScuCcu_K2divider_81 | K2-Divider 81.
IfxScuCcu_K2divider_82 | K2-Divider 82.
IfxScuCcu_K2divider_83 | K2-Divider 83.
IfxScuCcu_K2divider_84 | K2-Divider 84.
IfxScuCcu_K2divider_85 | K2-Divider 85.
IfxScuCcu_K2divider_86 | K2-Divider 86.
IfxScuCcu_K2divider_87 | K2-Divider 87.
IfxScuCcu_K2divider_88 | K2-Divider 88.
IfxScuCcu_K2divider_89 | K2-Divider 89.
IfxScuCcu_K2divider_90 | K2-Divider 90.
IfxScuCcu_K2divider_91 | K2-Divider 91.
IfxScuCcu_K2divider_92 | K2-Divider 92.
IfxScuCcu_K2divider_93 | K2-Divider 93.
IfxScuCcu_K2divider_94 | K2-Divider 94.
IfxScuCcu_K2divider_95 | K2-Divider 95.
IfxScuCcu_K2divider_96 | K2-Divider 96.
IfxScuCcu_K2divider_97 | K2-Divider 97.
IfxScuCcu_K2divider_98 | K2-Divider 98.
IfxScuCcu_K2divider_99 | K2-Divider 99.
IfxScuCcu_K2divider_100 | K2-Divider 100.
IfxScuCcu_K2divider_101 | K2-Divider 101.
IfxScuCcu_K2divider_102 | K2-Divider 102.
IfxScuCcu_K2divider_103 | K2-Divider 103.
IfxScuCcu_K2divider_104 | K2-Divider 104.
IfxScuCcu_K2divider_105 | K2-Divider 105.
IfxScuCcu_K2divider_106 | K2-Divider 106.
IfxScuCcu_K2divider_107 | K2-Divider 107.
IfxScuCcu_K2divider_108 | K2-Divider 108.
IfxScuCcu_K2divider_109 | K2-Divider 109.
IfxScuCcu_K2divider_110 | K2-Divider 110.
IfxScuCcu_K2divider_111 | K2-Divider 111.
IfxScuCcu_K2divider_112 | K2-Divider 112.
IfxScuCcu_K2divider_113 | K2-Divider 113.
IfxScuCcu_K2divider_114 | K2-Divider 114.
IfxScuCcu_K2divider_115 | K2-Divider 115.
IfxScuCcu_K2divider_116 | K2-Divider 116.
IfxScuCcu_K2divider_117 | K2-Divider 117.
IfxScuCcu_K2divider_118 | K2-Divider 118.
IfxScuCcu_K2divider_119 | K2-Divider 119.
IfxScuCcu_K2divider_120 | K2-Divider 120.
IfxScuCcu_K2divider_121 | K2-Divider 121.
IfxScuCcu_K2divider_122 | K2-Divider 122.
IfxScuCcu_K2divider_123 | K2-Divider 123.
IfxScuCcu_K2divider_124 | K2-Divider 124.
IfxScuCcu_K2divider_125 | K2-Divider 125.
IfxScuCcu_K2divider_126 | K2-Divider 126.
IfxScuCcu_K2divider_127 | K2-Divider 127.
IfxScuCcu_K2divider_128 | K2-Divider 128.

Definition at line 289 of file IfxScuCcu.h.

◆ IfxScuCcu_K3divider

enum IfxScuCcu_K3divider

MODULE_SCU.PLLCON1.B.K3DIV, specifies the K3-Divider.

Enumerator
IfxScuCcu_K3divider_1 | K3-Divider 1.
IfxScuCcu_K3divider_2 | K3-Divider 2.
IfxScuCcu_K3divider_3 | K3-Divider 3.
IfxScuCcu_K3divider_4 | K3-Divider 4.
IfxScuCcu_K3divider_5 | K3-Divider 5.
IfxScuCcu_K3divider_6 | K3-Divider 6.
IfxScuCcu_K3divider_7 | K3-Divider 7.
IfxScuCcu_K3divider_8 | K3-Divider 8.
IfxScuCcu_K3divider_9 | K3-Divider 9.
IfxScuCcu_K3divider_10 | K3-Divider 10.
IfxScuCcu_K3divider_11 | K3-Divider 11.
IfxScuCcu_K3divider_12 | K3-Divider 12.
IfxScuCcu_K3divider_13 | K3-Divider 13.
IfxScuCcu_K3divider_14 | K3-Divider 14.
IfxScuCcu_K3divider_15 | K3-Divider 15.
IfxScuCcu_K3divider_16 | K3-Divider 16.
IfxScuCcu_K3divider_17 | K3-Divider 17.
IfxScuCcu_K3divider_18 | K3-Divider 18.
IfxScuCcu_K3divider_19 | K3-Divider 19.
IfxScuCcu_K3divider_20 | K3-Divider 20.
IfxScuCcu_K3divider_21 | K3-Divider 21.
IfxScuCcu_K3divider_22 | K3-Divider 22.
IfxScuCcu_K3divider_23 | K3-Divider 23.
IfxScuCcu_K3divider_24 | K3-Divider 24.
IfxScuCcu_K3divider_25 | K3-Divider 25.
IfxScuCcu_K3divider_26 | K3-Divider 26.
IfxScuCcu_K3divider_27 | K3-Divider 27.
IfxScuCcu_K3divider_28 | K3-Divider 28.
IfxScuCcu_K3divider_29 | K3-Divider 29.
IfxScuCcu_K3divider_30 | K3-Divider 30.
IfxScuCcu_K3divider_31 | K3-Divider 31.
IfxScuCcu_K3divider_32 | K3-Divider 32.
IfxScuCcu_K3divider_33 | K3-Divider 33.
IfxScuCcu_K3divider_34 | K3-Divider 34.
IfxScuCcu_K3divider_35 | K3-Divider 35.
IfxScuCcu_K3divider_36 | K3-Divider 36.
IfxScuCcu_K3divider_37 | K3-Divider 37.
IfxScuCcu_K3divider_38 | K3-Divider 38.
IfxScuCcu_K3divider_39 | K3-Divider 39.
IfxScuCcu_K3divider_40 | K3-Divider 40.
IfxScuCcu_K3divider_41 | K3-Divider 41.
IfxScuCcu_K3divider_42 | K3-Divider 42.
IfxScuCcu_K3divider_43 | K3-Divider 43.
IfxScuCcu_K3divider_44 | K3-Divider 44.
IfxScuCcu_K3divider_45 | K3-Divider 45.
IfxScuCcu_K3divider_46 | K3-Divider 46.
IfxScuCcu_K3divider_47 | K3-Divider 47.
IfxScuCcu_K3divider_48 | K3-Divider 48.
IfxScuCcu_K3divider_49 | K3-Divider 49.
IfxScuCcu_K3divider_50 | K3-Divider 50.
IfxScuCcu_K3divider_51 | K3-Divider 51.
IfxScuCcu_K3divider_52 | K3-Divider 52.
IfxScuCcu_K3divider_53 | K3-Divider 53.
IfxScuCcu_K3divider_54 | K3-Divider 54.
IfxScuCcu_K3divider_55 | K3-Divider 55.
IfxScuCcu_K3divider_56 | K3-Divider 56.
IfxScuCcu_K3divider_57 | K3-Divider 57.
IfxScuCcu_K3divider_58 | K3-Divider 58.
IfxScuCcu_K3divider_59 | K3-Divider 59.
IfxScuCcu_K3divider_60 | K3-Divider 60.
IfxScuCcu_K3divider_61 | K3-Divider 61.
IfxScuCcu_K3divider_62 | K3-Divider 62.
IfxScuCcu_K3divider_63 | K3-Divider 63.
IfxScuCcu_K3divider_64 | K3-Divider 64.
IfxScuCcu_K3divider_65 | K3-Divider 65.
IfxScuCcu_K3divider_66 | K3-Divider 66.
IfxScuCcu_K3divider_67 | K3-Divider 67.
IfxScuCcu_K3divider_68 | K3-Divider 68.
IfxScuCcu_K3divider_69 | K3-Divider 69.
IfxScuCcu_K3divider_70 | K3-Divider 70.
IfxScuCcu_K3divider_71 | K3-Divider 71.
IfxScuCcu_K3divider_72 | K3-Divider 72.
IfxScuCcu_K3divider_73 | K3-Divider 73.
IfxScuCcu_K3divider_74 | K3-Divider 74.
IfxScuCcu_K3divider_75 | K3-Divider 75.
IfxScuCcu_K3divider_76 | K3-Divider 76.
IfxScuCcu_K3divider_77 | K3-Divider 77.
IfxScuCcu_K3divider_78 | K3-Divider 78.
IfxScuCcu_K3divider_79 | K3-Divider 79.
IfxScuCcu_K3divider_80 | K3-Divider 80.
IfxScuCcu_K3divider_81 | K3-Divider 81.
IfxScuCcu_K3divider_82 | K3-Divider 82.
IfxScuCcu_K3divider_83 | K3-Divider 83.
IfxScuCcu_K3divider_84 | K3-Divider 84.
IfxScuCcu_K3divider_85 | K3-Divider 85.
IfxScuCcu_K3divider_86 | K3-Divider 86.
IfxScuCcu_K3divider_87 | K3-Divider 87.
IfxScuCcu_K3divider_88 | K3-Divider 88.
IfxScuCcu_K3divider_89 | K3-Divider 89.
IfxScuCcu_K3divider_90 | K3-Divider 90.
IfxScuCcu_K3divider_91 | K3-Divider 91.
IfxScuCcu_K3divider_92 | K3-Divider 92.
IfxScuCcu_K3divider_93 | K3-Divider 93.
IfxScuCcu_K3divider_94 | K3-Divider 94.
IfxScuCcu_K3divider_95 | K3-Divider 95.
IfxScuCcu_K3divider_96 | K3-Divider 96.
IfxScuCcu_K3divider_97 | K3-Divider 97.
IfxScuCcu_K3divider_98 | K3-Divider 98.
IfxScuCcu_K3divider_99 | K3-Divider 99.
IfxScuCcu_K3divider_100 | K3-Divider 100.
IfxScuCcu_K3divider_101 | K3-Divider 101.
IfxScuCcu_K3divider_102 | K3-Divider 102.
IfxScuCcu_K3divider_103 | K3-Divider 103.
IfxScuCcu_K3divider_104 | K3-Divider 104.
IfxScuCcu_K3divider_105 | K3-Divider 105.
IfxScuCcu_K3divider_106 | K3-Divider 106.
IfxScuCcu_K3divider_107 | K3-Divider 107.
IfxScuCcu_K3divider_108 | K3-Divider 108.
IfxScuCcu_K3divider_109 | K3-Divider 109.
IfxScuCcu_K3divider_110 | K3-Divider 110.
IfxScuCcu_K3divider_111 | K3-Divider 111.
IfxScuCcu_K3divider_112 | K3-Divider 112.
IfxScuCcu_K3divider_113 | K3-Divider 113.
IfxScuCcu_K3divider_114 | K3-Divider 114.
IfxScuCcu_K3divider_115 | K3-Divider 115.
IfxScuCcu_K3divider_116 | K3-Divider 116.
IfxScuCcu_K3divider_117 | K3-Divider 117.
IfxScuCcu_K3divider_118 | K3-Divider 118.
IfxScuCcu_K3divider_119 | K3-Divider 119.
IfxScuCcu_K3divider_120 | K3-Divider 120.
IfxScuCcu_K3divider_121 | K3-Divider 121.
IfxScuCcu_K3divider_122 | K3-Divider 122.
IfxScuCcu_K3divider_123 | K3-Divider 123.
IfxScuCcu_K3divider_124 | K3-Divider 124.
IfxScuCcu_K3divider_125 | K3-Divider 125.
IfxScuCcu_K3divider_126 | K3-Divider 126.
IfxScuCcu_K3divider_127 | K3-Divider 127.
IfxScuCcu_K3divider_128 | K3-Divider 128.

Definition at line 423 of file IfxScuCcu.h.

◆ IfxScuCcu_Ndivider

enum IfxScuCcu_Ndivider

MODULE_SCU.PLLCON0.B.NDIV, specifies the N-Divider.

Enumerator
IfxScuCcu_Ndivider_1 | N-divider 1.
IfxScuCcu_Ndivider_2 | N-divider 2.
IfxScuCcu_Ndivider_3 | N-divider 3.
IfxScuCcu_Ndivider_4 | N-divider 4.
IfxScuCcu_Ndivider_5 | N-divider 5.
IfxScuCcu_Ndivider_6 | N-divider 6.
IfxScuCcu_Ndivider_7 | N-divider 7.
IfxScuCcu_Ndivider_8 | N-divider 8.
IfxScuCcu_Ndivider_9 | N-divider 9.
IfxScuCcu_Ndivider_10 | N-divider 10.
IfxScuCcu_Ndivider_11 | N-divider 11.
IfxScuCcu_Ndivider_12 | N-divider 12.
IfxScuCcu_Ndivider_13 | N-divider 13.
IfxScuCcu_Ndivider_14 | N-divider 14.
IfxScuCcu_Ndivider_15 | N-divider 15.
IfxScuCcu_Ndivider_16 | N-divider 16.
IfxScuCcu_Ndivider_17 | N-divider 17.
IfxScuCcu_Ndivider_18 | N-divider 18.
IfxScuCcu_Ndivider_19 | N-divider 19.
IfxScuCcu_Ndivider_20 | N-divider 20.
IfxScuCcu_Ndivider_21 | N-divider 21.
IfxScuCcu_Ndivider_22 | N-divider 22.
IfxScuCcu_Ndivider_23 | N-divider 23.
IfxScuCcu_Ndivider_24 | N-divider 24.
IfxScuCcu_Ndivider_25 | N-divider 25.
IfxScuCcu_Ndivider_26 | N-divider 26.
IfxScuCcu_Ndivider_27 | N-divider 27.
IfxScuCcu_Ndivider_28 | N-divider 28.
IfxScuCcu_Ndivider_29 | N-divider 29.
IfxScuCcu_Ndivider_30 | N-divider 30.
IfxScuCcu_Ndivider_31 | N-divider 31.
IfxScuCcu_Ndivider_32 | N-divider 32.
IfxScuCcu_Ndivider_33 | N-divider 33.
IfxScuCcu_Ndivider_34 | N-divider 34.
IfxScuCcu_Ndivider_35 | N-divider 35.
IfxScuCcu_Ndivider_36 | N-divider 36.
IfxScuCcu_Ndivider_37 | N-divider 37.
IfxScuCcu_Ndivider_38 | N-divider 38.
IfxScuCcu_Ndivider_39 | N-divider 39.
IfxScuCcu_Ndivider_40 | N-divider 40.
IfxScuCcu_Ndivider_41 | N-divider 41.
IfxScuCcu_Ndivider_42 | N-divider 42.
IfxScuCcu_Ndivider_43 | N-divider 43.
IfxScuCcu_Ndivider_44 | N-divider 44.
IfxScuCcu_Ndivider_45 | N-divider 45.
IfxScuCcu_Ndivider_46 | N-divider 46.
IfxScuCcu_Ndivider_47 | N-divider 47.
IfxScuCcu_Ndivider_48 | N-divider 48.
IfxScuCcu_Ndivider_49 | N-divider 49.
IfxScuCcu_Ndivider_50 | N-divider 50.
IfxScuCcu_Ndivider_51 | N-divider 51.
IfxScuCcu_Ndivider_52 | N-divider 52.
IfxScuCcu_Ndivider_53 | N-divider 53.
IfxScuCcu_Ndivider_54 | N-divider 54.
IfxScuCcu_Ndivider_55 | N-divider 55.
IfxScuCcu_Ndivider_56 | N-divider 56.
IfxScuCcu_Ndivider_57 | N-divider 57.
IfxScuCcu_Ndivider_58 | N-divider 58.
IfxScuCcu_Ndivider_59 | N-divider 59.
IfxScuCcu_Ndivider_60 | N-divider 60.
IfxScuCcu_Ndivider_61 | N-divider 61.
IfxScuCcu_Ndivider_62 | N-divider 62.
IfxScuCcu_Ndivider_63 | N-divider 63.
IfxScuCcu_Ndivider_64 | N-divider 64.
IfxScuCcu_Ndivider_65 | N-divider 65.
IfxScuCcu_Ndivider_66 | N-divider 66.
IfxScuCcu_Ndivider_67 | N-divider 67.
IfxScuCcu_Ndivider_68 | N-divider 68.
IfxScuCcu_Ndivider_69 | N-divider 69.
IfxScuCcu_Ndivider_70 | N-divider 70.
IfxScuCcu_Ndivider_71 | N-divider 71.
IfxScuCcu_Ndivider_72 | N-divider 72.
IfxScuCcu_Ndivider_73 | N-divider 73.
IfxScuCcu_Ndivider_74 | N-divider 74.
IfxScuCcu_Ndivider_75 | N-divider 75.
IfxScuCcu_Ndivider_76 | N-divider 76.
IfxScuCcu_Ndivider_77 | N-divider 77.
IfxScuCcu_Ndivider_78 | N-divider 78.
IfxScuCcu_Ndivider_79 | N-divider 79.
IfxScuCcu_Ndivider_80 | N-divider 80.
IfxScuCcu_Ndivider_81 | N-divider 81.
IfxScuCcu_Ndivider_82 | N-divider 82.
IfxScuCcu_Ndivider_83 | N-divider 83.
IfxScuCcu_Ndivider_84 | N-divider 84.
IfxScuCcu_Ndivider_85 | N-divider 85.
IfxScuCcu_Ndivider_86 | N-divider 86.
IfxScuCcu_Ndivider_87 | N-divider 87.
IfxScuCcu_Ndivider_88 | N-divider 88.
IfxScuCcu_Ndivider_89 | N-divider 89.
IfxScuCcu_Ndivider_90 | N-divider 90.
IfxScuCcu_Ndivider_91 | N-divider 91.
IfxScuCcu_Ndivider_92 | N-divider 92.
IfxScuCcu_Ndivider_93 | N-divider 93.
IfxScuCcu_Ndivider_94 | N-divider 94.
IfxScuCcu_Ndivider_95 | N-divider 95.
IfxScuCcu_Ndivider_96 | N-divider 96.
IfxScuCcu_Ndivider_97 | N-divider 97.
IfxScuCcu_Ndivider_98 | N-divider 98.
IfxScuCcu_Ndivider_99 | N-divider 99.
IfxScuCcu_Ndivider_100 | N-divider 100.
IfxScuCcu_Ndivider_101 | N-divider 101.
IfxScuCcu_Ndivider_102 | N-divider 102.
IfxScuCcu_Ndivider_103 | N-divider 103.
IfxScuCcu_Ndivider_104 | N-divider 104.
IfxScuCcu_Ndivider_105 | N-divider 105.
IfxScuCcu_Ndivider_106 | N-divider 106.
IfxScuCcu_Ndivider_107 | N-divider 107.
IfxScuCcu_Ndivider_108 | N-divider 108.
IfxScuCcu_Ndivider_109 | N-divider 109.
IfxScuCcu_Ndivider_110 | N-divider 110.
IfxScuCcu_Ndivider_111 | N-divider 111.
IfxScuCcu_Ndivider_112 | N-divider 112.
IfxScuCcu_Ndivider_113 | N-divider 113.
IfxScuCcu_Ndivider_114 | N-divider 114.
IfxScuCcu_Ndivider_115 | N-divider 115.
IfxScuCcu_Ndivider_116 | N-divider 116.
IfxScuCcu_Ndivider_117 | N-divider 117.
IfxScuCcu_Ndivider_118 | N-divider 118.
IfxScuCcu_Ndivider_119 | N-divider 119.
IfxScuCcu_Ndivider_120 | N-divider 120.
IfxScuCcu_Ndivider_121 | N-divider 121.
IfxScuCcu_Ndivider_122 | N-divider 122.
IfxScuCcu_Ndivider_123 | N-divider 123.
IfxScuCcu_Ndivider_124 | N-divider 124.
IfxScuCcu_Ndivider_125 | N-divider 125.
IfxScuCcu_Ndivider_126 | N-divider 126.
IfxScuCcu_Ndivider_127 | N-divider 127.
IfxScuCcu_Ndivider_128 | N-divider 128.

Definition at line 557 of file IfxScuCcu.h.

◆ IfxScuCcu_Pdivider

enum IfxScuCcu_Pdivider

MODULE_SCU.PLLCON0.B.PDIV, specifies the P-Divider.

Enumerator
IfxScuCcu_Pdivider_1 | P-divider 1.
IfxScuCcu_Pdivider_2 | P-divider 2.
IfxScuCcu_Pdivider_3 | P-divider 3.
IfxScuCcu_Pdivider_4 | P-divider 4.
IfxScuCcu_Pdivider_5 | P-divider 5.
IfxScuCcu_Pdivider_6 | P-divider 6.
IfxScuCcu_Pdivider_7 | P-divider 7.
IfxScuCcu_Pdivider_8 | P-divider 8.
IfxScuCcu_Pdivider_9 | P-divider 9.
IfxScuCcu_Pdivider_10 | P-divider 10.
IfxScuCcu_Pdivider_11 | P-divider 11.
IfxScuCcu_Pdivider_12 | P-divider 12.
IfxScuCcu_Pdivider_13 | P-divider 13.
IfxScuCcu_Pdivider_14 | P-divider 14.
IfxScuCcu_Pdivider_15 | P-divider 15.
IfxScuCcu_Pdivider_16 | P-divider 16.

Definition at line 691 of file IfxScuCcu.h.


iLLD_TC26B: Eru Basic Functionality

Modules
Eru Basic Functionality
iLLD » SCU » Standard Driver
Collaboration diagram for Eru Basic Functionality:

Modules

ERU: Enumerations
ERU: External Request Selection
ERU: Event Trigger Logic
ERU: Connecting Matrix
ERU: Output Gating Unit
ERU: Data Structures

Detailed Description


iLLD_TC26B: ERU: Enumerations

Enumerations
ERU: Enumerations
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: Enumerations:

Enumerations

enum IfxScuEru_ExternalInputSelection {
IfxScuEru_ExternalInputSelection_0 = 0,
IfxScuEru_ExternalInputSelection_1,
IfxScuEru_ExternalInputSelection_2,
IfxScuEru_ExternalInputSelection_3
}
Input line selection for input channel
Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_InputChannel {
IfxScuEru_InputChannel_0 = 0,
IfxScuEru_InputChannel_1,
IfxScuEru_InputChannel_2,
IfxScuEru_InputChannel_3,
IfxScuEru_InputChannel_4,
IfxScuEru_InputChannel_5,
IfxScuEru_InputChannel_6,
IfxScuEru_InputChannel_7
}
Input channel for input selection and conditioning of trigger or gating functions. More...
enum IfxScuEru_InputNodePointer {
IfxScuEru_InputNodePointer_0 = 0,
IfxScuEru_InputNodePointer_1,
IfxScuEru_InputNodePointer_2,
IfxScuEru_InputNodePointer_3,
IfxScuEru_InputNodePointer_4,
IfxScuEru_InputNodePointer_5,
IfxScuEru_InputNodePointer_6,
IfxScuEru_InputNodePointer_7
}
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)).
Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_InterruptGatingPattern {
IfxScuEru_InterruptGatingPattern_none = 0,
IfxScuEru_InterruptGatingPattern_alwaysActive = 1,
IfxScuEru_InterruptGatingPattern_patternMatch = 2,
IfxScuEru_InterruptGatingPattern_patternMiss = 3
}
Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy
Definition in Ifx_SCU.IGCR[i].B.IGP(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_OutputChannel {
IfxScuEru_OutputChannel_0 = 0,
IfxScuEru_OutputChannel_1,
IfxScuEru_OutputChannel_2,
IfxScuEru_OutputChannel_3,
IfxScuEru_OutputChannel_4,
IfxScuEru_OutputChannel_5,
IfxScuEru_OutputChannel_6,
IfxScuEru_OutputChannel_7
}
Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...) More...

Detailed Description

Enumeration Type Documentation

◆ IfxScuEru_ExternalInputSelection

enum IfxScuEru_ExternalInputSelection

Input line selection for input channel
Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0,1,2,3 and j = 0,1)

Enumerator
IfxScuEru_ExternalInputSelection_0 | External input 0 is selected.
IfxScuEru_ExternalInputSelection_1 | External input 1 is selected.
IfxScuEru_ExternalInputSelection_2 | External input 2 is selected.
IfxScuEru_ExternalInputSelection_3 | External input 3 is selected.

Definition at line 79 of file IfxScuEru.h.

◆ IfxScuEru_InputChannel

enum IfxScuEru_InputChannel

Input channel for input selection and conditioning of trigger or gating functions.

Enumerator
IfxScuEru_InputChannel_0 | External Input channel 0.
IfxScuEru_InputChannel_1 | External Input channel 1.
IfxScuEru_InputChannel_2 | External Input channel 2.
IfxScuEru_InputChannel_3 | External Input channel 3.
IfxScuEru_InputChannel_4 | External Input channel 4.
IfxScuEru_InputChannel_5 | External Input channel 5.
IfxScuEru_InputChannel_6 | External Input channel 6.
IfxScuEru_InputChannel_7 | External Input channel 7.

Definition at line 89 of file IfxScuEru.h.

◆ IfxScuEru_InputNodePointer

enum IfxScuEru_InputNodePointer

Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)).
Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1)

Enumerator
IfxScuEru_InputNodePointer_0 | Event from input ETLx triggers output OGU0 (signal TRx0)
IfxScuEru_InputNodePointer_1 | Event from input ETLx triggers output OGU1 (signal TRx1)
IfxScuEru_InputNodePointer_2 | Event from input ETLx triggers output OGU2 (signal TRx2)
IfxScuEru_InputNodePointer_3 | Event from input ETLx triggers output OGU3 (signal TRx3)
IfxScuEru_InputNodePointer_4 | Event from input ETLx triggers output OGU4 (signal TRx4)
IfxScuEru_InputNodePointer_5 | Event from input ETLx triggers output OGU5 (signal TRx5)
IfxScuEru_InputNodePointer_6 | Event from input ETLx triggers output OGU6 (signal TRx6)
IfxScuEru_InputNodePointer_7 | Event from input ETLx triggers output OGU7 (signal TRx7)

Definition at line 104 of file IfxScuEru.h.

◆ IfxScuEru_InterruptGatingPattern

enum IfxScuEru_InterruptGatingPattern

Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy
Definition in Ifx_SCU.IGCR[i].B.IGP(j) (i = 0,1,2,3 and j = 0,1)

Enumerator
IfxScuEru_InterruptGatingPattern_none | IOUTy is inactive, (the pattern is not considered)
IfxScuEru_InterruptGatingPattern_alwaysActive | IOUTy is activated in response to a trigger event, (the pattern is not considered)
IfxScuEru_InterruptGatingPattern_patternMatch | IOUTy is activated if a trigger event occures while the pattern is present, (the pattern is considered)
IfxScuEru_InterruptGatingPattern_patternMiss | IOUTy is activated if a trigger event occures while the pattern is not present, (the pattern is not considered)

Definition at line 119 of file IfxScuEru.h.

◆ IfxScuEru_OutputChannel

enum IfxScuEru_OutputChannel

Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)

Enumerator
IfxScuEru_OutputChannel_0 | Output channel 0.
IfxScuEru_OutputChannel_1 | Output channel 1.
IfxScuEru_OutputChannel_2 | Output channel 2.
IfxScuEru_OutputChannel_3 | Output channel 3.
IfxScuEru_OutputChannel_4 | Output channel 4.
IfxScuEru_OutputChannel_5 | Output channel 5.
IfxScuEru_OutputChannel_6 | Output channel 6.
IfxScuEru_OutputChannel_7 | Output channel 7.

Definition at line 129 of file IfxScuEru.h.


iLLD_TC26B: ERU: External Request Selection

Functions
ERU: External Request Selection
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: External Request Selection:

Functions

IFX_INLINE void | IfxScuEru_initReqPin (IfxScu_Req_In *req, IfxPort_InputMode inputMode)
Initialises the External request Pin. More...
IFX_EXTERN void | IfxScuEru_selectExternalInput (IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
Determines which input line is selcted for input channel x. More...

Detailed Description

Function Documentation

◆ IfxScuEru_initReqPin()

IFX_INLINE void IfxScuEru_initReqPin | ( | IfxScu_Req_In * | req,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises the External request Pin.

Parameters
req | External request pin
inputMode | Port Input mode
Returns
None

Definition at line 347 of file IfxScuEru.h.

◆ IfxScuEru_selectExternalInput()

IFX_EXTERN void IfxScuEru_selectExternalInput | ( | IfxScuEru_InputChannel | inputChannel,
 |  | IfxScuEru_ExternalInputSelection | inputSignal
 | ) |  |

Determines which input line is selcted for input channel x.

Parameters
inputChannel | Input channel for input selection and conditioning of trigger or gating functions
inputSignal | Input line selection for input channel
Returns
None

Definition at line 353 of file IfxScuEru.c.

Referenced by IfxScuEru_initReqPin().


iLLD_TC26B: ERU: Event Trigger Logic

Functions
ERU: Event Trigger Logic
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: Event Trigger Logic:

Functions

IFX_EXTERN void | IfxScuEru_clearAllEventFlags (void)
Clears the external event flag of input channel x (INTFx) More...
IFX_EXTERN void | IfxScuEru_clearEventFlag (IfxScuEru_InputChannel inputChannel)
Clears the external event flag of input channel x (INTFx) More...
IFX_EXTERN void | IfxScuEru_clearInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Clears all the configuration for the given input channel x. More...
IFX_EXTERN void | IfxScuEru_disableAutoClear (IfxScuEru_InputChannel inputChannel)
Disables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
IFX_EXTERN void | IfxScuEru_disableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the falling edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_disableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the rising edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_enableAutoClear (IfxScuEru_InputChannel inputChannel)
Enables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
IFX_EXTERN void | IfxScuEru_enableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the falling edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_enableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the rising edge of input channel to set the bit INTF x. More...
IFX_EXTERN uint32 | IfxScuEru_getAllEventFlagsStatus (void)
Returns the status of the flags of all input channels. More...
IFX_EXTERN boolean | IfxScuEru_getEventFlagStatus (IfxScuEru_InputChannel inputChannel)
Returns the status of the external event flag of input channel x (INTFx) More...
IFX_EXTERN uint32 | IfxScuEru_getInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Returns all the configuration for the given input channel x. More...
IFX_EXTERN void | IfxScuEru_setEventFlag (IfxScuEru_InputChannel inputChannel)
Sets the external event flag of input channel x (INTFx) More...

Detailed Description

Function Documentation

◆ IfxScuEru_clearAllEventFlags()

IFX_EXTERN void IfxScuEru_clearAllEventFlags ( void )

Clears the external event flag of input channel x (INTFx)

Returns
None

Definition at line 61 of file IfxScuEru.c.

◆ IfxScuEru_clearEventFlag()

IFX_EXTERN void IfxScuEru_clearEventFlag ( IfxScuEru_InputChannel inputChannel )

Clears the external event flag of input channel x (INTFx)

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 68 of file IfxScuEru.c.

◆ IfxScuEru_clearInputChannelConfiguration()

IFX_EXTERN void IfxScuEru_clearInputChannelConfiguration ( IfxScuEru_InputChannel inputChannel )

Clears all the configuration for the given input channel x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 75 of file IfxScuEru.c.

◆ IfxScuEru_disableAutoClear()

IFX_EXTERN void IfxScuEru_disableAutoClear ( IfxScuEru_InputChannel inputChannel )

Disables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 127 of file IfxScuEru.c.

◆ IfxScuEru_disableFallingEdgeDetection()

IFX_EXTERN void IfxScuEru_disableFallingEdgeDetection ( IfxScuEru_InputChannel inputChannel )

Disables the falling edge of input channel to set the bit INTF x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 143 of file IfxScuEru.c.

◆ IfxScuEru_disableRisingEdgeDetection()

IFX_EXTERN void IfxScuEru_disableRisingEdgeDetection ( IfxScuEru_InputChannel inputChannel )

Disables the rising edge of input channel to set the bit INTF x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 175 of file IfxScuEru.c.

◆ IfxScuEru_enableAutoClear()

IFX_EXTERN void IfxScuEru_enableAutoClear ( IfxScuEru_InputChannel inputChannel )

Enables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 207 of file IfxScuEru.c.

◆ IfxScuEru_enableFallingEdgeDetection()

IFX_EXTERN void IfxScuEru_enableFallingEdgeDetection ( IfxScuEru_InputChannel inputChannel )

Enables the falling edge of input channel to set the bit INTF x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 223 of file IfxScuEru.c.

◆ IfxScuEru_enableRisingEdgeDetection()

IFX_EXTERN void IfxScuEru_enableRisingEdgeDetection ( IfxScuEru_InputChannel inputChannel )

Enables the rising edge of input channel to set the bit INTF x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 255 of file IfxScuEru.c.

◆ IfxScuEru_getAllEventFlagsStatus()

IFX_EXTERN uint32 IfxScuEru_getAllEventFlagsStatus ( void )

Returns the status of the flags of all input channels.

Returns
All flags Status

Definition at line 287 of file IfxScuEru.c.

◆ IfxScuEru_getEventFlagStatus()

IFX_EXTERN boolean IfxScuEru_getEventFlagStatus ( IfxScuEru_InputChannel inputChannel )

Returns the status of the external event flag of input channel x (INTFx)

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
Status (TRUE / FALSE)

Definition at line 293 of file IfxScuEru.c.

◆ IfxScuEru_getInputChannelConfiguration()

IFX_EXTERN uint32 IfxScuEru_getInputChannelConfiguration ( IfxScuEru_InputChannel inputChannel )

Returns all the configuration for the given input channel x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
Input channel configuration

Definition at line 300 of file IfxScuEru.c.

◆ IfxScuEru_setEventFlag()

IFX_EXTERN void IfxScuEru_setEventFlag ( IfxScuEru_InputChannel inputChannel )

Sets the external event flag of input channel x (INTFx)

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 369 of file IfxScuEru.c.


iLLD_TC26B: ERU: Connecting Matrix

Functions
ERU: Connecting Matrix
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: Connecting Matrix:

Functions

IFX_EXTERN void | IfxScuEru_connectTrigger (IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1). More...
IFX_EXTERN void | IfxScuEru_disableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Disables the generation of a trigger event for input channel x when the selected edge is detected. More...
IFX_EXTERN void | IfxScuEru_enableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Enables the generation of a trigger event for input channel x when the selected edge is detected. More...
IFX_EXTERN void | IfxScuEru_setFlagPatternDetection (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
Enables the flag INTFx to take part in the pattern detection for output gating. More...

Detailed Description

Function Documentation

◆ IfxScuEru_connectTrigger()

IFX_EXTERN void IfxScuEru_connectTrigger | ( | IfxScuEru_InputChannel | inputChannel,
 |  | IfxScuEru_InputNodePointer | triggerSelect
 | ) |  |

Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1).

Parameters
inputChannel | Input channel for input selection and conditioning of trigger or gating functions
triggerSelect | Trigger event selection
Returns
None

Definition at line 111 of file IfxScuEru.c.

◆ IfxScuEru_disableTriggerPulse()

IFX_EXTERN void IfxScuEru_disableTriggerPulse ( IfxScuEru_InputChannel inputChannel )

Disables the generation of a trigger event for input channel x when the selected edge is detected.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 191 of file IfxScuEru.c.

◆ IfxScuEru_enableTriggerPulse()

IFX_EXTERN void IfxScuEru_enableTriggerPulse ( IfxScuEru_InputChannel inputChannel )

Enables the generation of a trigger event for input channel x when the selected edge is detected.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 271 of file IfxScuEru.c.

◆ IfxScuEru_setFlagPatternDetection()

IFX_EXTERN void IfxScuEru_setFlagPatternDetection | ( | IfxScuEru_OutputChannel | outputChannel,
 |  | IfxScuEru_InputChannel | inputChannel,
 |  | boolean | state
 | ) |  |

Enables the flag INTFx to take part in the pattern detection for output gating.

Parameters
outputChannel | Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
inputChannel | Input channel for input selection and conditioning of trigger or gating functions
state FALSE: the bit INTFx does not take part in the pattern detection IPENjy = 0
TRUE : the bit INTFx is taken into consideration for the pattern detection IPENjy = 1
Returns
None

Definition at line 376 of file IfxScuEru.c.


iLLD_TC26B: ERU: Output Gating Unit

Functions
ERU: Output Gating Unit
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: Output Gating Unit:

Functions

IFX_EXTERN void | IfxScuEru_clearOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
IFX_EXTERN void | IfxScuEru_disablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Disables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
IFX_EXTERN void | IfxScuEru_enablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Enables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
IFX_EXTERN uint32 | IfxScuEru_getOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
IFX_EXTERN boolean | IfxScuEru_getPatternDetectionResult (IfxScuEru_OutputChannel outputChannel)
Returns the status of the pattern detection result of output channel y (PDRy) More...
IFX_EXTERN uint32 | IfxScuEru_getWholePatternDetectionResult (void)
Returns the whole pattern detection result of all the selcted output channels. More...
IFX_EXTERN void | IfxScuEru_setInterruptGatingPattern (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the output lines GOUT and IOUT. More...

Detailed Description

Function Documentation

◆ IfxScuEru_clearOutputChannelConfiguration()

IFX_EXTERN void IfxScuEru_clearOutputChannelConfiguration ( IfxScuEru_OutputChannel outputChannel )

Clears all the configuration for the given input channel y.

Parameters
outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
Returns
None

Definition at line 93 of file IfxScuEru.c.

◆ IfxScuEru_disablePatternDetectionTrigger()

IFX_EXTERN void IfxScuEru_disablePatternDetectionTrigger ( IfxScuEru_OutputChannel outputChannel )

Disables the generation of a trigger event for output channel y when the result of the pattern detection changes.

Parameters
outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
Returns
None

Definition at line 159 of file IfxScuEru.c.

◆ IfxScuEru_enablePatternDetectionTrigger()

IFX_EXTERN void IfxScuEru_enablePatternDetectionTrigger ( IfxScuEru_OutputChannel outputChannel )

Enables the generation of a trigger event for output channel y when the result of the pattern detection changes.

Parameters
outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
Returns
None

Definition at line 239 of file IfxScuEru.c.

◆ IfxScuEru_getOutputChannelConfiguration()

IFX_EXTERN uint32 IfxScuEru_getOutputChannelConfiguration ( IfxScuEru_OutputChannel outputChannel )

Clears all the configuration for the given input channel y.

Parameters
outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
Returns
Output channel configuration

Definition at line 320 of file IfxScuEru.c.

◆ IfxScuEru_getPatternDetectionResult()

IFX_EXTERN boolean IfxScuEru_getPatternDetectionResult ( IfxScuEru_OutputChannel outputChannel )

Returns the status of the pattern detection result of output channel y (PDRy)

Parameters
outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
Returns
Status (TRUE / FALSE)

Definition at line 340 of file IfxScuEru.c.

◆ IfxScuEru_getWholePatternDetectionResult()

IFX_EXTERN uint32 IfxScuEru_getWholePatternDetectionResult ( void )

Returns the whole pattern detection result of all the selcted output channels.

Returns
Detected pattern

Definition at line 347 of file IfxScuEru.c.

◆ IfxScuEru_setInterruptGatingPattern()

IFX_EXTERN void IfxScuEru_setInterruptGatingPattern | ( | IfxScuEru_OutputChannel | outputChannel,
 |  | IfxScuEru_InterruptGatingPattern | gatingPattern
 | ) |  |

Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the output lines GOUT and IOUT.

Parameters
outputChannel | Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
gatingPattern | Interrupt gating pattern to determine how the pattern detection influences the ouput lines GOUT and IOUT
Returns
None

Definition at line 399 of file IfxScuEru.c.


iLLD_TC26B: ERU: Data Structures

ERU: Data Structures
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: Data Structures:


iLLD_TC26B: Wdt Basic Functionality

Modules
Wdt Basic Functionality
iLLD » SCU » Standard Driver
Collaboration diagram for Wdt Basic Functionality:

Modules

Wdt Operative Functionality
Watchdog Configuration functions
Watchdog Endinit functions
Watchdog Operative functions
How to use Endinit APIs?

Detailed Description


iLLD_TC26B: Wdt Operative Functionality

Macros | Functions
Wdt Operative Functionality
iLLD » SCU » Standard Driver » Wdt Basic Functionality
Collaboration diagram for Wdt Operative Functionality:

Macros

#define IFXSCUWDT_CALCULATELFSR(pwd) ((((((pwd) >> 13) ^ ((pwd) >> 12) ^ ((pwd) >> 11) ^ ((pwd) >> 1 )) & 1)) | (((pwd)<<1) & 0x3FFF))

Functions

IFX_INLINE uint16 IfxScuWdt_calculateLfsr (uint16 password)
SCUWDT Inline API utility to Calculte new 14-bit LFSR. More...

Detailed Description

Macro Definition Documentation

◆ IFXSCUWDT_CALCULATELFSR

#define IFXSCUWDT_CALCULATELFSR ( pwd ) ((((((pwd) >> 13) ^ ((pwd) >> 12) ^ ((pwd) >> 11) ^ ((pwd) >> 1 )) & 1)) | (((pwd)<<1) & 0x3FFF))

Definition at line 52 of file IfxScuWdt.asm.h.

Function Documentation

◆ IfxScuWdt_calculateLfsr()

IFX_INLINE uint16 IfxScuWdt_calculateLfsr ( uint16 password )

SCUWDT Inline API utility to Calculte new 14-bit LFSR.

This API will Calculte new 14-bit LFSR (Linear Feedback Shift Register) with characteristic polynomial x14+x13+x12+x2+1.

Parameters
password Password for which LFSR value to be calculated.
Returns
New LFSR.


iLLD_TC26B: Watchdog Configuration functions

Functions
Watchdog Configuration functions
iLLD » SCU » Standard Driver » Wdt Basic Functionality
Collaboration diagram for Watchdog Configuration functions:

Functions

IFX_EXTERN void | IfxScuWdt_initConfig (IfxScuWdt_Config *config)
SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt configuration structure to default values, these default values are for software specific, not necessarily hardware reset values. User must use this API call before IfxScuWdt_Init API call. More...
IFX_EXTERN void | IfxScuWdt_initCpuWatchdog (Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_initSafetyWatchdog (Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module. More...

Detailed Description

Function Documentation

◆ IfxScuWdt_initConfig()

IFX_EXTERN void IfxScuWdt_initConfig ( IfxScuWdt_Config * config )

SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt configuration structure to default values, these default values are for software specific, not necessarily hardware reset values. User must use this API call before IfxScuWdt_Init API call.

Parameters
config ScuWdt configuration structure to be initialized
Returns
None

Definition at line 259 of file IfxScuWdt.c.

◆ IfxScuWdt_initCpuWatchdog()

IFX_EXTERN void IfxScuWdt_initCpuWatchdog | ( | Ifx_SCU_WDTCPU * | wdt,
 |  | const IfxScuWdt_Config * | config
 | ) |  |

SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module.

This API initialize the ScuWdt software driver and corresponding CPU WDT hardware module. User can configure project specific Watchdog password, Watchdog timer period and other settings with this interface. API corresponds to one instance of the hardware module. User must use this API call for each instance of the WDT hardware module used.

Parameters
wdt | reference to register map of CPU WDT hardware instance
config | ScuWdt configuration structure
Returns
None

Definition at line 273 of file IfxScuWdt.c.

◆ IfxScuWdt_initSafetyWatchdog()

IFX_EXTERN void IfxScuWdt_initSafetyWatchdog | ( | Ifx_SCU_WDTS * | wdt,
 |  | const IfxScuWdt_Config * | config
 | ) |  |

SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module.

This API initialize the ScuWdt software driver and corresponding safety WDT hardware module. User can configure project specific Watchdog password, Watchdog timer period and other settings with this interface. API corresponds to one instance of the hardware module. User must use this API call for each instance of the WDT hardware module used.

Parameters
wdt | reference to register map of Safety WDT hardware instance
config | ScuWdt configuration structure
Returns
None

Definition at line 339 of file IfxScuWdt.c.


iLLD_TC26B: Watchdog Endinit functions

Functions
Watchdog Endinit functions
iLLD » SCU » Standard Driver » Wdt Basic Functionality
Collaboration diagram for Watchdog Endinit functions:

Functions

IFX_INLINE void | IfxScuWdt_clearCpuEndinitInline (Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_clearSafetyEndinitInline (uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_setCpuEndinitInline (Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_setSafetyEndinitInline (uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_clearCpuEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_clearSafetyEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_setCpuEndinit (uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_setSafetyEndinit (uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module. More...

Detailed Description

Function Documentation

◆ IfxScuWdt_clearCpuEndinit()

IFX_EXTERN void IfxScuWdt_clearCpuEndinit ( uint16 password )

SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.

This API will disable ENDINIT functionality provided by CPU WDT Hardware module. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword)

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 189 of file IfxScuWdt.c.

Referenced by IfxAsclin_Asc_disableModule(), IfxAsclin_disableModule(), IfxAsclin_enableModule(), IfxAsclin_Lin_disableModule(), IfxAsclin_resetModule(), IfxAsclin_setSleepMode(), IfxAsclin_Spi_disableModule(), IfxCcu6_disableModule(), IfxCcu6_enableModule(), IfxCcu6_resetModule(), IfxCcu6_setSleepMode(), IfxCif_resetModule(), IfxCif_setModuleStateRequest(), IfxCpu_invalidateProgramCache(), IfxCpu_setCoreMode(), IfxDma_setSleepMode(), IfxDsadc_Dsadc_initModule(), IfxDsadc_resetModule(), IfxDsadc_setSleepMode(), IfxEray_disableModule(), IfxEray_enableModule(), IfxEray_Eray_initModule(), IfxEray_resetModule(), IfxEray_setSleepMode(), IfxEth_disableModule(), IfxEth_enableModule(), IfxEth_resetModule(), IfxFce_Crc_initCrc(), IfxFce_disableModule(), IfxFce_enableModule(), IfxFce_resetModule(), IfxFft_disableModule(), IfxFft_enableModule(), IfxGpt12_disableModule(), IfxGpt12_enableModule(), IfxGpt12_resetModule(), IfxGpt12_setSleepMode(), IfxGtm_Cmu_setClkFrequency(), IfxGtm_Cmu_setEclkFrequency(), IfxGtm_Cmu_setGclkFrequency(), IfxGtm_disable(), IfxGtm_enable(), IfxHssl_disableHsctModule(), IfxHssl_disableHsslModule(), IfxHssl_enableHsctModule(), IfxHssl_enableHsslModule(), IfxHssl_Hssl_initHsctModule(), IfxHssl_resetHsctKernel(), IfxHssl_resetHsslKernel(), IfxHssl_setHsctSleepMode(), IfxHssl_setHsslSleepMode(), IfxI2c_disableModule(), IfxI2c_enableModule(), IfxI2c_resetModule(), IfxI2c_setBaudrate(), IfxIom_disableModule(), IfxIom_enableModule(), IfxIom_resetModule(), IfxIom_setSleepMode(), IfxMsc_clearReset(), IfxMsc_disableModule(), IfxMsc_Msc_initModule(), IfxMsc_resetModule(), IfxMsc_setFractionalDividerStep(), IfxMsc_setSleepMode(), IfxMtu_enableModule(), IfxMultican_Can_initModule(), IfxMultican_deinit(), IfxMultican_resetModule(), IfxMultican_setSleepMode(), IfxPort_resetESR(), IfxPort_setESR(), IfxPort_setGroupPadDriver(), IfxPort_setPinMode(), IfxPort_setPinModeLvdsHigh(), IfxPort_setPinModeLvdsMedium(), IfxPort_setPinPadDriver(), IfxPsi5_disableModule(), IfxPsi5_enableAllChannels(), IfxPsi5_enableModule(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initModule(), IfxPsi5_resetModule(), IfxPsi5_setFractionalDivider(), IfxPsi5_setRxInput(), IfxPsi5s_disableModule(), IfxPsi5s_Psi5s_initChannel(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_resetModule(), IfxPsi5s_setSleepMode(), IfxQspi_resetModule(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiSlave_initModule(), IfxScuCcu_init(), IfxScuCcu_initErayPll(), IfxScuCcu_isOscillatorStable(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_switchToBackupClock(), IfxSent_disableModule(), IfxSent_enableModule(), IfxSent_resetModule(), IfxSent_Sent_deInitModule(), IfxSent_Sent_initModule(), IfxSent_setSleepMode(), IfxStm_disableModule(), IfxStm_resetModule(), IfxStm_setSleepMode(), IfxVadc_disableModule(), IfxVadc_enableGroupSync(), IfxVadc_enableModule(), IfxVadc_resetKernel(), and IfxVadc_setSleepMode().

◆ IfxScuWdt_clearCpuEndinitInline()

IFX_INLINE void IfxScuWdt_clearCpuEndinitInline | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | uint16 | password
 | ) |  |

SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.

This Inline API will disable ENDINIT functionality provided by CPU WDT Hardware module. This API is only meant to be used with startup routines where function call is not possible. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
watchdog | pointer to the watchdog register map of CPU WDT hardware instance
password | Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 434 of file IfxScuWdt.h.

Referenced by _Core0_start(), _Core1_start(), IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_setDataCache(), IfxCpu_setProgramCache(), IfxScuWdt_clearCpuEndinit(), IfxScuWdt_disableCpuWatchdog(), and IfxScuWdt_enableCpuWatchdog().

◆ IfxScuWdt_clearSafetyEndinit()

IFX_EXTERN void IfxScuWdt_clearSafetyEndinit ( uint16 password )

SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.

This API will disable ENDINIT functionality provided by Safety WDT Hardware module. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 195 of file IfxScuWdt.c.

Referenced by IfxCpu_setCoreMode(), IfxEray_Eray_initModule(), IfxMtu_clearSram(), IfxMtu_runNonDestructiveInversionTest(), IfxMtu_writeSramAddress(), IfxPsi5_Psi5_resetModule(), IfxPsi5s_Psi5s_resetModule(), IfxScuCcu_init(), IfxScuCcu_initErayPll(), IfxScuCcu_setCpuFrequency(), IfxScuCcu_setGtmFrequency(), IfxScuCcu_setPll2ErayFrequency(), IfxScuCcu_setPll2Frequency(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_setSriFrequency(), IfxScuCcu_switchToBackupClock(), IfxSmu_clearAlarm(), IfxSmu_cmd(), IfxSmu_enableAlarmFsp(), IfxSmu_initFsp(), IfxSmu_lock(), IfxSmu_lockForever(), IfxSmu_setAlarmConfig(), IfxSmu_unlock(), IfxVadc_disableAccess(), and IfxVadc_enableAccess().

◆ IfxScuWdt_clearSafetyEndinitInline()

IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline ( uint16 password )

SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.

This API will disable ENDINIT functionality provided by Safety WDT Hardware module. This API is only meant to be used with startup routines where function call is not possible. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 457 of file IfxScuWdt.h.

Referenced by IfxDma_setChannelHardwareResourcePartition(), IfxScuWdt_clearSafetyEndinit(), IfxScuWdt_disableSafetyWatchdog(), and IfxScuWdt_enableSafetyWatchdog().

◆ IfxScuWdt_setCpuEndinit()

IFX_EXTERN void IfxScuWdt_setCpuEndinit ( uint16 password )

SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.

This API will enable ENDINIT functionality provided by CPU WDT Hardware module. User need to use this API call after modifying any ENDINIT protected register. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword)

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 418 of file IfxScuWdt.c.

Referenced by IfxAsclin_Asc_disableModule(), IfxAsclin_disableModule(), IfxAsclin_enableModule(), IfxAsclin_Lin_disableModule(), IfxAsclin_resetModule(), IfxAsclin_setSleepMode(), IfxAsclin_Spi_disableModule(), IfxCcu6_disableModule(), IfxCcu6_enableModule(), IfxCcu6_resetModule(), IfxCcu6_setSleepMode(), IfxCif_resetModule(), IfxCif_setModuleStateRequest(), IfxCpu_invalidateProgramCache(), IfxCpu_setCoreMode(), IfxDma_setSleepMode(), IfxDsadc_Dsadc_initModule(), IfxDsadc_resetModule(), IfxDsadc_setSleepMode(), IfxEray_disableModule(), IfxEray_enableModule(), IfxEray_Eray_initModule(), IfxEray_resetModule(), IfxEray_setSleepMode(), IfxEth_disableModule(), IfxEth_enableModule(), IfxEth_resetModule(), IfxFce_Crc_initCrc(), IfxFce_disableModule(), IfxFce_enableModule(), IfxFce_resetModule(), IfxFft_disableModule(), IfxFft_enableModule(), IfxGpt12_disableModule(), IfxGpt12_enableModule(), IfxGpt12_resetModule(), IfxGpt12_setSleepMode(), IfxGtm_Cmu_setClkFrequency(), IfxGtm_Cmu_setEclkFrequency(), IfxGtm_Cmu_setGclkFrequency(), IfxGtm_disable(), IfxGtm_enable(), IfxHssl_disableHsctModule(), IfxHssl_disableHsslModule(), IfxHssl_enableHsctModule(), IfxHssl_enableHsslModule(), IfxHssl_Hssl_initHsctModule(), IfxHssl_resetHsctKernel(), IfxHssl_resetHsslKernel(), IfxHssl_setHsctSleepMode(), IfxHssl_setHsslSleepMode(), IfxI2c_disableModule(), IfxI2c_enableModule(), IfxI2c_resetModule(), IfxI2c_setBaudrate(), IfxIom_disableModule(), IfxIom_enableModule(), IfxIom_resetModule(), IfxIom_setSleepMode(), IfxMsc_clearReset(), IfxMsc_disableModule(), IfxMsc_Msc_initModule(), IfxMsc_resetModule(), IfxMsc_setFractionalDividerStep(), IfxMsc_setSleepMode(), IfxMtu_enableModule(), IfxMultican_Can_initModule(), IfxMultican_deinit(), IfxMultican_resetModule(), IfxMultican_setSleepMode(), IfxPort_resetESR(), IfxPort_setESR(), IfxPort_setGroupPadDriver(), IfxPort_setPinMode(), IfxPort_setPinModeLvdsHigh(), IfxPort_setPinModeLvdsMedium(), IfxPort_setPinPadDriver(), IfxPsi5_disableModule(), IfxPsi5_enableAllChannels(), IfxPsi5_enableModule(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initModule(), IfxPsi5_resetModule(), IfxPsi5_setFractionalDivider(), IfxPsi5_setRxInput(), IfxPsi5s_disableModule(), IfxPsi5s_Psi5s_initChannel(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_resetModule(), IfxPsi5s_setSleepMode(), IfxQspi_resetModule(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiSlave_initModule(), IfxScuCcu_init(), IfxScuCcu_initErayPll(), IfxScuCcu_isOscillatorStable(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_switchToBackupClock(), IfxScuWdt_initCpuWatchdog(), IfxScuWdt_serviceCpuWatchdog(), IfxSent_disableModule(), IfxSent_enableModule(), IfxSent_resetModule(), IfxSent_Sent_deInitModule(), IfxSent_Sent_initModule(), IfxSent_setSleepMode(), IfxStm_disableModule(), IfxStm_resetModule(), IfxStm_setSleepMode(), IfxVadc_disableModule(), IfxVadc_enableGroupSync(), IfxVadc_enableModule(), IfxVadc_resetKernel(), and IfxVadc_setSleepMode().

◆ IfxScuWdt_setCpuEndinitInline()

IFX_INLINE void IfxScuWdt_setCpuEndinitInline | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | uint16 | password
 | ) |  |

SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.

This API will enable ENDINIT functionality provided by CPU WDT Hardware module. This API is only meant to be used with startup routines where function call is not possible. User need to use this API call after modifying any ENDINIT protected register. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
watchdog | pointer to the watchdog register map of CPU WDT hardware instance
password | Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 521 of file IfxScuWdt.h.

Referenced by _Core0_start(), _Core1_start(), IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_setDataCache(), IfxCpu_setProgramCache(), IfxScuWdt_disableCpuWatchdog(), IfxScuWdt_enableCpuWatchdog(), and IfxScuWdt_setCpuEndinit().

◆ IfxScuWdt_setSafetyEndinit()

IFX_EXTERN void IfxScuWdt_setSafetyEndinit ( uint16 password )

SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.

This API will enable ENDINIT functionality provided by Safety WDT Hardware module. User need to use this API call after modifying any ENDINIT protected register. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 424 of file IfxScuWdt.c.

Referenced by IfxCpu_setCoreMode(), IfxEray_Eray_initModule(), IfxMtu_clearSram(), IfxMtu_runNonDestructiveInversionTest(), IfxMtu_writeSramAddress(), IfxPsi5_Psi5_resetModule(), IfxPsi5s_Psi5s_resetModule(), IfxScuCcu_init(), IfxScuCcu_initErayPll(), IfxScuCcu_setCpuFrequency(), IfxScuCcu_setGtmFrequency(), IfxScuCcu_setPll2ErayFrequency(), IfxScuCcu_setPll2Frequency(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_setSriFrequency(), IfxScuCcu_switchToBackupClock(), IfxScuWdt_initSafetyWatchdog(), IfxScuWdt_serviceSafetyWatchdog(), IfxSmu_clearAlarm(), IfxSmu_cmd(), IfxSmu_enableAlarmFsp(), IfxSmu_initFsp(), IfxSmu_lock(), IfxSmu_lockForever(), IfxSmu_setAlarmConfig(), IfxSmu_unlock(), IfxVadc_disableAccess(), and IfxVadc_enableAccess().

◆ IfxScuWdt_setSafetyEndinitInline()

IFX_INLINE void IfxScuWdt_setSafetyEndinitInline ( uint16 password )

SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.

This API will enable ENDINIT functionality provided by Safety WDT Hardware module. This API is only meant to be used with startup routines where function call is not possible. User need to use this API call after modifying any ENDINIT protected register. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 544 of file IfxScuWdt.h.

Referenced by IfxDma_setChannelHardwareResourcePartition(), IfxScuWdt_disableSafetyWatchdog(), IfxScuWdt_enableSafetyWatchdog(), and IfxScuWdt_setSafetyEndinit().


iLLD_TC26B: Watchdog Operative functions

Functions
Watchdog Operative functions
iLLD » SCU » Standard Driver » Wdt Basic Functionality
Collaboration diagram for Watchdog Operative functions:

Functions

IFX_INLINE uint16 | IfxScuWdt_getCpuWatchdogPasswordInline (Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module. More...
IFX_INLINE boolean | IfxScuWdt_getCpuWatchdogEndInitInline (Ifx_SCU_WDTCPU *watchdog)
SCUWDT API to fetch current endinit of CPU Watchdog module. More...
IFX_INLINE boolean | IfxScuWdt_getSafetyWatchdogEndInit (void)
SCUWDT API to fetch current endinit of Safety/System Watchdog module. More...
IFX_INLINE uint16 | IfxScuWdt_getSafetyWatchdogPasswordInline (void)
SCUWDT Inline API to fetch current password of Safety Watchdog module. More...
IFX_EXTERN void | IfxScuWdt_changeCpuWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change CPU Watchdog password. More...
IFX_EXTERN void | IfxScuWdt_changeCpuWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change CPU Watchdog timer reload value. More...
IFX_EXTERN void | IfxScuWdt_changeSafetyWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change Safety Watchdog password. More...
IFX_EXTERN void | IfxScuWdt_changeSafetyWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change Safety Watchdog timer reload value. More...
IFX_EXTERN void | IfxScuWdt_disableCpuWatchdog (uint16 password)
SCUWDT API to disable CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_disableSafetyWatchdog (uint16 password)
SCUWDT API to disable Safety Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_enableCpuWatchdog (uint16 password)
SCUWDT API to enable CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_enableSafetyWatchdog (uint16 password)
SCUWDT API to enable Safety Watchdog functionality. More...
IFX_EXTERN uint16 | IfxScuWdt_getCpuWatchdogPassword (void)
SCUWDT API to fetch current password of CPU Watchdog module. More...
IFX_EXTERN boolean | IfxScuWdt_getCpuWatchdogEndInit (void)
SCUWDT API to fetch current endinit of CPU Watchdog module. More...
IFX_EXTERN uint16 | IfxScuWdt_getSafetyWatchdogPassword (void)
SCUWDT API to fetch current password of Safety Watchdog module. More...
IFX_EXTERN void | IfxScuWdt_serviceCpuWatchdog (uint16 password)
SCUWDT API to service CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_serviceSafetyWatchdog (uint16 password)
SCUWDT API to service Safety Watchdog functionality. More...

Detailed Description

Function Documentation

◆ IfxScuWdt_changeCpuWatchdogPassword()

IFX_EXTERN void IfxScuWdt_changeCpuWatchdogPassword | ( | uint16 | password,
 |  | uint16 | newPassword
 | ) |  |

SCUWDT API to change CPU Watchdog password.

This API will change password to new one for the corresponding to CPU WDT Hardware module. User need to have the old password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
password | Existing (Application specific) password for the Watchdog module.
newPassword | Application specific new password to be changed for the Watchdog module.
Returns
None

Definition at line 62 of file IfxScuWdt.c.

◆ IfxScuWdt_changeCpuWatchdogReload()

IFX_EXTERN void IfxScuWdt_changeCpuWatchdogReload | ( | uint16 | password,
 |  | uint16 | reload
 | ) |  |

SCUWDT API to change CPU Watchdog timer reload value.

This API will change Watchdog timer reload value to new one for CPU WDT Hardware module. The Watchdog timers will be reloaded with this value after every serice of Watchdog. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
password | Existing (Application specific) password for the Watchdog module.
reload | Reload value for the timer.
Returns
None

Definition at line 93 of file IfxScuWdt.c.

◆ IfxScuWdt_changeSafetyWatchdogPassword()

IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogPassword | ( | uint16 | password,
 |  | uint16 | newPassword
 | ) |  |

SCUWDT API to change Safety Watchdog password.

This API will change password to new one for the corresponding to Safety WDT Hardware module. User need to have the old password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password | Existing (Application specific) password for the Watchdog module.
newPassword | Application specific new password to be changed for the Watchdog module.
Returns
None

Definition at line 126 of file IfxScuWdt.c.

◆ IfxScuWdt_changeSafetyWatchdogReload()

IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogReload | ( | uint16 | password,
 |  | uint16 | reload
 | ) |  |

SCUWDT API to change Safety Watchdog timer reload value.

This API will change Watchdog timer reload value to new one for Safety WDT Hardware module. The Watchdog timers will be reloaded with this value after every serice of Watchdog. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password | Existing (Application specific) password for the Watchdog module.
reload | Reload value for the timer.
Returns
None

Definition at line 157 of file IfxScuWdt.c.

◆ IfxScuWdt_disableCpuWatchdog()

IFX_EXTERN void IfxScuWdt_disableCpuWatchdog ( uint16 password )

SCUWDT API to disable CPU Watchdog functionality.

This API will disable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers will stop counting after this API call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 201 of file IfxScuWdt.c.

Referenced by _Core0_start().

◆ IfxScuWdt_disableSafetyWatchdog()

IFX_EXTERN void IfxScuWdt_disableSafetyWatchdog ( uint16 password )

SCUWDT API to disable Safety Watchdog functionality.

This API will disable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers will stop counting after this API call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 213 of file IfxScuWdt.c.

Referenced by _Core0_start().

◆ IfxScuWdt_enableCpuWatchdog()

IFX_EXTERN void IfxScuWdt_enableCpuWatchdog ( uint16 password )

SCUWDT API to enable CPU Watchdog functionality.

This API will enable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers need to be serviced periodically after this API call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 221 of file IfxScuWdt.c.

Referenced by _Core0_start().

◆ IfxScuWdt_enableSafetyWatchdog()

IFX_EXTERN void IfxScuWdt_enableSafetyWatchdog ( uint16 password )

SCUWDT API to enable Safety Watchdog functionality.

This API will enable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers need to be serviced periodically after this API call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 233 of file IfxScuWdt.c.

Referenced by _Core0_start().

◆ IfxScuWdt_getCpuWatchdogEndInit()

IFX_EXTERN boolean IfxScuWdt_getCpuWatchdogEndInit ( void )

SCUWDT API to fetch current endinit of CPU Watchdog module.

Returns
Endinit status for the CPU Watchdog module.

Definition at line 247 of file IfxScuWdt.c.

Referenced by IfxMtu_enableModule().

◆ IfxScuWdt_getCpuWatchdogEndInitInline()

IFX_INLINE boolean IfxScuWdt_getCpuWatchdogEndInitInline ( Ifx_SCU_WDTCPU * watchdog )

SCUWDT API to fetch current endinit of CPU Watchdog module.

Parameters
watchdog pointer to the watchdog register map of CPU WDT hardware instance
Returns
Endinit status for the CPU Watchdog module.

Definition at line 494 of file IfxScuWdt.h.

Referenced by IfxScuWdt_getCpuWatchdogEndInit().

◆ IfxScuWdt_getCpuWatchdogPassword()

IFX_EXTERN uint16 IfxScuWdt_getCpuWatchdogPassword ( void )

SCUWDT API to fetch current password of CPU Watchdog module.

This API will fetch current Watchdog password for CPU WDT Hardware module. password is needed to be passed with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function or store the password globally in a global variable at the application memory.

Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 241 of file IfxScuWdt.c.

Referenced by IfxAsclin_Asc_disableModule(), IfxAsclin_disableModule(), IfxAsclin_enableModule(), IfxAsclin_Lin_disableModule(), IfxAsclin_resetModule(), IfxAsclin_setSleepMode(), IfxAsclin_Spi_disableModule(), IfxCcu6_disableModule(), IfxCcu6_enableModule(), IfxCcu6_resetModule(), IfxCcu6_setSleepMode(), IfxCif_resetModule(), IfxCif_setModuleStateRequest(), IfxCpu_invalidateProgramCache(), IfxCpu_setCoreMode(), IfxDma_setSleepMode(), IfxDsadc_Dsadc_initModule(), IfxDsadc_resetModule(), IfxDsadc_setSleepMode(), IfxEray_disableModule(), IfxEray_enableModule(), IfxEray_Eray_initModule(), IfxEray_resetModule(), IfxEray_setSleepMode(), IfxEth_disableModule(), IfxEth_enableModule(), IfxEth_resetModule(), IfxFce_Crc_initCrc(), IfxFce_disableModule(), IfxFce_enableModule(), IfxFce_resetModule(), IfxFft_disableModule(), IfxFft_enableModule(), IfxGpt12_disableModule(), IfxGpt12_enableModule(), IfxGpt12_resetModule(), IfxGpt12_setSleepMode(), IfxGtm_Cmu_setClkFrequency(), IfxGtm_Cmu_setEclkFrequency(), IfxGtm_Cmu_setGclkFrequency(), IfxGtm_disable(), IfxGtm_enable(), IfxHssl_disableHsctModule(), IfxHssl_disableHsslModule(), IfxHssl_enableHsctModule(), IfxHssl_enableHsslModule(), IfxHssl_Hssl_initHsctModule(), IfxHssl_resetHsctKernel(), IfxHssl_resetHsslKernel(), IfxHssl_setHsctSleepMode(), IfxHssl_setHsslSleepMode(), IfxI2c_disableModule(), IfxI2c_enableModule(), IfxI2c_resetModule(), IfxI2c_setBaudrate(), IfxIom_disableModule(), IfxIom_enableModule(), IfxIom_resetModule(), IfxIom_setSleepMode(), IfxMsc_clearReset(), IfxMsc_disableModule(), IfxMsc_Msc_initModule(), IfxMsc_resetModule(), IfxMsc_setFractionalDividerStep(), IfxMsc_setSleepMode(), IfxMtu_enableModule(), IfxMultican_Can_initModule(), IfxMultican_deinit(), IfxMultican_resetModule(), IfxMultican_setSleepMode(), IfxPort_resetESR(), IfxPort_setESR(), IfxPort_setGroupPadDriver(), IfxPort_setPinMode(), IfxPort_setPinModeLvdsHigh(), IfxPort_setPinModeLvdsMedium(), IfxPort_setPinPadDriver(), IfxPsi5_disableModule(), IfxPsi5_enableAllChannels(), IfxPsi5_enableModule(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initModule(), IfxPsi5_Psi5_resetModule(), IfxPsi5_resetModule(), IfxPsi5_setFractionalDivider(), IfxPsi5_setRxInput(), IfxPsi5s_disableModule(), IfxPsi5s_Psi5s_initChannel(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_Psi5s_resetModule(), IfxPsi5s_resetModule(), IfxPsi5s_setSleepMode(), IfxQspi_resetModule(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiSlave_initModule(), IfxScuCcu_init(), IfxScuCcu_initErayPll(), IfxScuCcu_isOscillatorStable(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_switchToBackupClock(), IfxSent_disableModule(), IfxSent_enableModule(), IfxSent_resetModule(), IfxSent_Sent_deInitModule(), IfxSent_Sent_initModule(), IfxSent_setSleepMode(), IfxStm_disableModule(), IfxStm_resetModule(), IfxStm_setSleepMode(), IfxVadc_disableModule(), IfxVadc_enableGroupSync(), IfxVadc_enableModule(), IfxVadc_resetKernel(), and IfxVadc_setSleepMode().

◆ IfxScuWdt_getCpuWatchdogPasswordInline()

IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline ( Ifx_SCU_WDTCPU * watchdog )

SCUWDT Inline API to fetch current password of CPU Watchdog module.

This API will fetch current Watchdog password for CPU WDT Hardware module. password is needed to be passed with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function or store the password globally in a global variable at the application memory. This API is only meant to be used with startup routines where function call is not possible.

Parameters
watchdog pointer to the watchdog register map of CPU WDT hardware instance
Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 480 of file IfxScuWdt.h.

Referenced by _Core0_start(), _Core1_start(), IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_setDataCache(), IfxCpu_setProgramCache(), and IfxScuWdt_getCpuWatchdogPassword().

◆ IfxScuWdt_getSafetyWatchdogEndInit()

IFX_INLINE boolean IfxScuWdt_getSafetyWatchdogEndInit ( void )

SCUWDT API to fetch current endinit of Safety/System Watchdog module.

Returns
Endinit status for the Safety Watchdog module.

Definition at line 500 of file IfxScuWdt.h.

Referenced by IfxMtu_clearSram(), IfxMtu_runNonDestructiveInversionTest(), and IfxMtu_writeSramAddress().

◆ IfxScuWdt_getSafetyWatchdogPassword()

IFX_EXTERN uint16 IfxScuWdt_getSafetyWatchdogPassword ( void )

SCUWDT API to fetch current password of Safety Watchdog module.

This API will fetch current Watchdog password for Safety WDT Hardware module. password is needed to be passed with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function or store the password globally in a global variable at the application memory.

Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 253 of file IfxScuWdt.c.

Referenced by _Core0_start(), IfxCpu_setCoreMode(), IfxEray_Eray_initModule(), IfxMtu_clearSram(), IfxMtu_runNonDestructiveInversionTest(), IfxMtu_writeSramAddress(), IfxScuCcu_init(), IfxScuCcu_initErayPll(), IfxScuCcu_setCpuFrequency(), IfxScuCcu_setGtmFrequency(), IfxScuCcu_setPll2ErayFrequency(), IfxScuCcu_setPll2Frequency(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_setSriFrequency(), IfxScuCcu_switchToBackupClock(), IfxSmu_clearAlarm(), IfxSmu_cmd(), IfxSmu_enableAlarmFsp(), IfxSmu_initFsp(), IfxSmu_lock(), IfxSmu_lockForever(), IfxSmu_setAlarmConfig(), IfxSmu_unlock(), IfxVadc_disableAccess(), and IfxVadc_enableAccess().

◆ IfxScuWdt_getSafetyWatchdogPasswordInline()

IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline ( void )

SCUWDT Inline API to fetch current password of Safety Watchdog module.

This API will fetch current Watchdog password for Safety WDT Hardware module. password is needed to be passed with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function or store the password globally in a global variable at the application memory. This API is only meant to be used with startup routines where function call is not possible.

Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 506 of file IfxScuWdt.h.

Referenced by IfxDma_setChannelHardwareResourcePartition(), and IfxScuWdt_getSafetyWatchdogPassword().

◆ IfxScuWdt_serviceCpuWatchdog()

IFX_EXTERN void IfxScuWdt_serviceCpuWatchdog ( uint16 password )

SCUWDT API to service CPU Watchdog functionality.

This API will service Watchdog functionality corresponding to CPU WDT Hardware module. User need to use this API call periodically. This API results in reloading of the Watchdog Timer. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 406 of file IfxScuWdt.c.

◆ IfxScuWdt_serviceSafetyWatchdog()

IFX_EXTERN void IfxScuWdt_serviceSafetyWatchdog ( uint16 password )

SCUWDT API to service Safety Watchdog functionality.

This API will service Watchdog functionality corresponding to Safety WDT Hardware module. User need to use this API call periodically. This API results in reloading of the Watchdog Timer. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 412 of file IfxScuWdt.c.


iLLD_TC26B: How to use Endinit APIs?

How to use Endinit APIs?
iLLD » SCU » Standard Driver » Wdt Basic Functionality
Collaboration diagram for How to use Endinit APIs?:


iLLD_TC26B: SCU Pin Mapping

Data Structures | Macros | Variables
SCU Pin Mapping
iLLD » SCU
Collaboration diagram for SCU Pin Mapping:

Data Structures

struct | IfxScu_Evrwup_In
EVR Wakeup pin mapping structure. More...
struct | IfxScu_Hwcfg_In
Hardware Configuration pin mapping structure. More...
struct | IfxScu_Req_In
External Request pin mapping structure. More...
struct | IfxScu_Dcdcsync_Out
DCDC Sync pin mapping structure. More...
struct | IfxScu_Emgstop_In
Emergency Stop pin mapping structure. More...
struct | IfxScu_Wdtlck_Out
Watchdog Timer Lock pin mapping structure. More...
struct | IfxScu_Extclk_Out
External Clock pin mapping structure. More...

Macros

#define | IFXSCU_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSCU_PINMAP_NUM_REQUESTS 8
#define | IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS 2
#define | IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS 2
#define | IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS 2
#define | IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS 3
#define | IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS 7
#define | IFXSCU_PINMAP_REQ_IN_NUM_ITEMS 4
#define | IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT
SCU_DCDCSYNC: SCU output. More...
IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT
SCU_DCDCSYNC: SCU output. More...
IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN
SCU_EMGSTOPA: SCU input. More...
IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN
SCU_EMGSTOPB: SCU input. More...
IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN
SCU_EVRWUPA: SCU input. More...
IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN
SCU_EVRWUPB: SCU input. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT
SCU_EXTCLK0: SCU output. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT
SCU_EXTCLK1: SCU output. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT
SCU_EXTCLK1: SCU output. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN
SCU_HWCFG0DCLDO: SCU input If EVR13 active, latched at cold power on reset to decide between LDO and SMPS mode. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN
SCU_HWCFG1EVR33: SCU input Latched at cold power on reset to decide EVR33 activation. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN
SCU_HWCFG2EVR13: SCU input Latched at cold power on reset to decide EVR13 activation. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN
SCU_HWCFG3_BMI: SCU input. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN
SCU_HWCFG4: SCU input. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN
SCU_HWCFG5: SCU input. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN
SCU_HWCFG6: SCU input Latched at cold power on reset to decide default pad reset state (PU or High-Z). More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ0_P15_4_IN
SCU_REQ0: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ10_P14_3_IN
SCU_REQ10: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ11_P20_9_IN
SCU_REQ11: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ12_P11_10_IN
SCU_REQ12: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ13_P15_5_IN
SCU_REQ13: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ14_P02_1_IN
SCU_REQ14: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ15_P14_1_IN
SCU_REQ15: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ16_P15_1_IN
SCU_REQ16: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ1_P15_8_IN
SCU_REQ1: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ2_P10_2_IN
SCU_REQ2: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ3_P10_3_IN
SCU_REQ3: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ4_P10_7_IN
SCU_REQ4: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ5_P10_8_IN
SCU_REQ5: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ6_P02_0_IN
SCU_REQ6: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ7_P00_4_IN
SCU_REQ7: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ8_P33_7_IN
SCU_REQ8: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ9_P20_0_IN
SCU_REQ9: SCU input. More...
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT
SCU_WDT0LCK: SCU output. More...
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT
SCU_WDT1LCK: SCU output. More...
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT
SCU_WDTSLCK: SCU output. More...
IFX_EXTERN const IfxScu_Dcdcsync_Out * | IfxScu_Dcdcsync_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
IfxScu_Dcdcsync_Out table. More...
IFX_EXTERN const IfxScu_Emgstop_In * | IfxScu_Emgstop_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
IfxScu_Emgstop_In table. More...
IFX_EXTERN const IfxScu_Evrwup_In * | IfxScu_Evrwup_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS]
IfxScu_Evrwup_In table. More...
IFX_EXTERN const IfxScu_Extclk_Out * | IfxScu_Extclk_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
IfxScu_Extclk_Out table. More...
IFX_EXTERN const IfxScu_Hwcfg_In * | IfxScu_Hwcfg_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS]
IfxScu_Hwcfg_In table. More...
IFX_EXTERN const IfxScu_Req_In * | IfxScu_Req_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]
IfxScu_Req_In table. More...
IFX_EXTERN const IfxScu_Wdtlck_Out * | IfxScu_Wdtlck_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS]
IfxScu_Wdtlck_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxScu_Evrwup_In

struct IfxScu_Evrwup_In

EVR Wakeup pin mapping structure.

Definition at line 56 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Evrwup_In:
[legend]
Data Fields
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxScu_Hwcfg_In

struct IfxScu_Hwcfg_In

Hardware Configuration pin mapping structure.

Definition at line 64 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Hwcfg_In:
[legend]
Data Fields
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.

◆ IfxScu_Req_In

struct IfxScu_Req_In

External Request pin mapping structure.

Definition at line 71 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Req_In:
[legend]
Data Fields
uint8 | channelId | ERU Channel ID.
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxScu_Dcdcsync_Out

struct IfxScu_Dcdcsync_Out

DCDC Sync pin mapping structure.

Definition at line 80 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Dcdcsync_Out:
[legend]
Data Fields
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxScu_Emgstop_In

struct IfxScu_Emgstop_In

Emergency Stop pin mapping structure.

Definition at line 88 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Emgstop_In:
[legend]
Data Fields
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxScu_Wdtlck_Out

struct IfxScu_Wdtlck_Out

Watchdog Timer Lock pin mapping structure.

Definition at line 96 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Wdtlck_Out:
[legend]
Data Fields
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxScu_Extclk_Out

struct IfxScu_Extclk_Out

External Clock pin mapping structure.

Definition at line 104 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Extclk_Out:
[legend]
Data Fields
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS

#define IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS 2

Definition at line 151 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS

#define IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS 2

Definition at line 152 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS

#define IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS 2

Definition at line 153 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS

#define IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS 3

Definition at line 154 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS

#define IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS 7

Definition at line 155 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_NUM_MODULES

#define IFXSCU_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 149 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_NUM_REQUESTS

#define IFXSCU_PINMAP_NUM_REQUESTS 8

Definition at line 150 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_REQ_IN_NUM_ITEMS

#define IFXSCU_PINMAP_REQ_IN_NUM_ITEMS 4

Definition at line 156 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS

#define IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS 3

Definition at line 157 of file IfxScu_PinMap.h.

Variable Documentation

◆ IfxScu_Dcdcsync_Out_pinTable

IFX_EXTERN const IfxScu_Dcdcsync_Out* IfxScu_Dcdcsync_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]

IfxScu_Dcdcsync_Out table.

Definition at line 161 of file IfxScu_PinMap.h.

◆ IfxScu_DCDCSYNC_P32_2_OUT

IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT

SCU_DCDCSYNC: SCU output.

Definition at line 111 of file IfxScu_PinMap.h.

◆ IfxScu_DCDCSYNC_P33_13_OUT

IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT

SCU_DCDCSYNC: SCU output.

Definition at line 112 of file IfxScu_PinMap.h.

◆ IfxScu_Emgstop_In_pinTable

IFX_EXTERN const IfxScu_Emgstop_In* IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]

IfxScu_Emgstop_In table.

Definition at line 164 of file IfxScu_PinMap.h.

◆ IfxScu_EMGSTOPA_P33_8_IN

IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN

SCU_EMGSTOPA: SCU input.

Definition at line 113 of file IfxScu_PinMap.h.

◆ IfxScu_EMGSTOPB_P21_2_IN

IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN

SCU_EMGSTOPB: SCU input.

Definition at line 114 of file IfxScu_PinMap.h.

◆ IfxScu_Evrwup_In_pinTable

IFX_EXTERN const IfxScu_Evrwup_In* IfxScu_Evrwup_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS]

IfxScu_Evrwup_In table.

Definition at line 167 of file IfxScu_PinMap.h.

◆ IfxScu_EVRWUPA_P14_1_IN

IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN

SCU_EVRWUPA: SCU input.

Definition at line 115 of file IfxScu_PinMap.h.

◆ IfxScu_EVRWUPB_P15_1_IN

IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN

SCU_EVRWUPB: SCU input.

Definition at line 116 of file IfxScu_PinMap.h.

◆ IfxScu_EXTCLK0_P23_1_OUT

IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT

SCU_EXTCLK0: SCU output.

Definition at line 117 of file IfxScu_PinMap.h.

◆ IfxScu_EXTCLK1_P11_12_OUT

IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT

SCU_EXTCLK1: SCU output.

Definition at line 118 of file IfxScu_PinMap.h.

◆ IfxScu_EXTCLK1_P32_4_OUT

IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT

SCU_EXTCLK1: SCU output.

Definition at line 119 of file IfxScu_PinMap.h.

◆ IfxScu_Extclk_Out_pinTable

IFX_EXTERN const IfxScu_Extclk_Out* IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]

IfxScu_Extclk_Out table.

Definition at line 170 of file IfxScu_PinMap.h.

◆ IfxScu_HWCFG0DCLDO_P14_6_IN

IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN

SCU_HWCFG0DCLDO: SCU input If EVR13 active, latched at cold power on reset to decide between LDO and SMPS mode.

Definition at line 120 of file IfxScu_PinMap.h.

◆ IfxScu_HWCFG1EVR33_P14_5_IN

IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN

SCU_HWCFG1EVR33: SCU input Latched at cold power on reset to decide EVR33 activation.

Definition at line 121 of file IfxScu_PinMap.h.

◆ IfxScu_HWCFG2EVR13_P14_2_IN

IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN

SCU_HWCFG2EVR13: SCU input Latched at cold power on reset to decide EVR13 activation.

Definition at line 122 of file IfxScu_PinMap.h.

◆ IfxScu_HWCFG3_BMI_P14_3_IN

IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN

SCU_HWCFG3_BMI: SCU input.

Definition at line 123 of file IfxScu_PinMap.h.

◆ IfxScu_HWCFG4_P10_5_IN

IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN

SCU_HWCFG4: SCU input.

Definition at line 124 of file IfxScu_PinMap.h.

◆ IfxScu_HWCFG5_P10_6_IN

IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN

SCU_HWCFG5: SCU input.

Definition at line 125 of file IfxScu_PinMap.h.

◆ IfxScu_HWCFG6_P14_4_IN

IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN

SCU_HWCFG6: SCU input Latched at cold power on reset to decide default pad reset state (PU or High-Z).

Definition at line 126 of file IfxScu_PinMap.h.

◆ IfxScu_Hwcfg_In_pinTable

IFX_EXTERN const IfxScu_Hwcfg_In* IfxScu_Hwcfg_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS]

IfxScu_Hwcfg_In table.

Definition at line 173 of file IfxScu_PinMap.h.

◆ IfxScu_REQ0_P15_4_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ0_P15_4_IN

SCU_REQ0: SCU input.

Definition at line 127 of file IfxScu_PinMap.h.

◆ IfxScu_REQ10_P14_3_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ10_P14_3_IN

SCU_REQ10: SCU input.

Definition at line 128 of file IfxScu_PinMap.h.

◆ IfxScu_REQ11_P20_9_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ11_P20_9_IN

SCU_REQ11: SCU input.

Definition at line 129 of file IfxScu_PinMap.h.

◆ IfxScu_REQ12_P11_10_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ12_P11_10_IN

SCU_REQ12: SCU input.

Definition at line 130 of file IfxScu_PinMap.h.

◆ IfxScu_REQ13_P15_5_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ13_P15_5_IN

SCU_REQ13: SCU input.

Definition at line 131 of file IfxScu_PinMap.h.

◆ IfxScu_REQ14_P02_1_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ14_P02_1_IN

SCU_REQ14: SCU input.

Definition at line 132 of file IfxScu_PinMap.h.

◆ IfxScu_REQ15_P14_1_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ15_P14_1_IN

SCU_REQ15: SCU input.

Definition at line 133 of file IfxScu_PinMap.h.

◆ IfxScu_REQ16_P15_1_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ16_P15_1_IN

SCU_REQ16: SCU input.

Definition at line 134 of file IfxScu_PinMap.h.

◆ IfxScu_REQ1_P15_8_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ1_P15_8_IN

SCU_REQ1: SCU input.

Definition at line 135 of file IfxScu_PinMap.h.

◆ IfxScu_REQ2_P10_2_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ2_P10_2_IN

SCU_REQ2: SCU input.

Definition at line 136 of file IfxScu_PinMap.h.

◆ IfxScu_REQ3_P10_3_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ3_P10_3_IN

SCU_REQ3: SCU input.

Definition at line 137 of file IfxScu_PinMap.h.

◆ IfxScu_REQ4_P10_7_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ4_P10_7_IN

SCU_REQ4: SCU input.

Definition at line 138 of file IfxScu_PinMap.h.

◆ IfxScu_REQ5_P10_8_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ5_P10_8_IN

SCU_REQ5: SCU input.

Definition at line 139 of file IfxScu_PinMap.h.

◆ IfxScu_REQ6_P02_0_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ6_P02_0_IN

SCU_REQ6: SCU input.

Definition at line 140 of file IfxScu_PinMap.h.

◆ IfxScu_REQ7_P00_4_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ7_P00_4_IN

SCU_REQ7: SCU input.

Definition at line 141 of file IfxScu_PinMap.h.

◆ IfxScu_REQ8_P33_7_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ8_P33_7_IN

SCU_REQ8: SCU input.

Definition at line 142 of file IfxScu_PinMap.h.

◆ IfxScu_REQ9_P20_0_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ9_P20_0_IN

SCU_REQ9: SCU input.

Definition at line 143 of file IfxScu_PinMap.h.

◆ IfxScu_Req_In_pinTable

IFX_EXTERN const IfxScu_Req_In* IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]

IfxScu_Req_In table.

Definition at line 176 of file IfxScu_PinMap.h.

◆ IfxScu_WDT0LCK_P20_8_OUT

IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT

SCU_WDT0LCK: SCU output.

Definition at line 144 of file IfxScu_PinMap.h.

◆ IfxScu_WDT1LCK_P20_7_OUT

IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT

SCU_WDT1LCK: SCU output.

Definition at line 145 of file IfxScu_PinMap.h.

◆ IfxScu_Wdtlck_Out_pinTable

IFX_EXTERN const IfxScu_Wdtlck_Out* IfxScu_Wdtlck_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS]

IfxScu_Wdtlck_Out table.

Definition at line 179 of file IfxScu_PinMap.h.

◆ IfxScu_WDTSLCK_P20_9_OUT

IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT

SCU_WDTSLCK: SCU output.

Definition at line 146 of file IfxScu_PinMap.h.


iLLD_TC26B: How to use the Scu Clock driver?

How to use the Scu Clock driver?
iLLD » SCU
Collaboration diagram for How to use the Scu Clock driver?:

The Scu Clock control unit driver provides a default configuration for pll and Clock initialisation and set of peripheral clock configuration functions.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Scu/Std/IfxScuCcu.h>

Variables

Declare the Clock Configuration variables in your C code:

// used globally
// configuration for the PLL steps
static IfxScuCcu_PllStepsConfig IfxScuCcu_testPllConfigSteps[] = {
IFXSCU_CFG_PLL_STEPS
};
// Default configuration for the Clock Configuration
IfxScuCcu_Config IfxScuCcu_testClockConfig = {
{
sizeof(IfxScuCcu_testPllConfigSteps) / sizeof(IfxScuCcu_PllStepsConfig),
(IfxScuCcu_PllStepsConfig *)IfxScuCcu_testPllConfigSteps,
IFXSCU_CFG_PLL_INITIAL_STEP,
},
IFXSCU_CFG_CLK_DISTRIBUTION,
IFXSCU_CFG_FLASH_WAITSTATE,
IFX_CFG_SCU_XTAL_FREQUENCY
};

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// standard PLL & clock initialisation
IfxScuCcu_init(&IfxScuCcu_testClockConfig);

The PLL and clocks are now initialised based on the IFXSCU_CFG_XTAL_FREQ and IFXSCU_CFG_PLL_FREQ values configured in Ifx_Cfg.h.


iLLD_TC26B: IfxScu_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxScu_cfg.h File Reference
iLLD » SCU

SCU on-chip implementation data. More...

#include "Ifx_Cfg.h"
#include "IfxScu_bf.h"
#include "IfxFlash_bf.h"
Include dependency graph for IfxScu_cfg.h:

Go to the source code of this file.

Macros

#define | IFX_CFG_SCU_XTAL_FREQUENCY 20000000
Default External oscillator frequency. More...
#define | IFX_CFG_SCU_PLL_FREQUENCY 200000000
Default PLL frequency. More...
#define | IFXSCU_VCO_BASE_FREQUENCY (100000000.0)
#define | IFXSCU_EVR_OSC_FREQUENCY (100000000.0)
#define | IFXSCU_PLL_FREERUNNING_FREQUENCY (100000000.0)
#define | IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ
Macros to configure Pll steps, Macros to configure the Pll steps for different profiles of Crystal frequency and target frequencies. This configuration is important for the current jump controll during clock throttling. IfxScuCcu_PllStepsConfig. More...
#define | IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ
Macro for Pll step for profile with 16MHz Crystal and 133MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ
Macro for Pll step for profile with 16MHz Crystal and 160MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ
Macro for Pll step for profile with 16MHz Crystal and 200MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ
Macro for Pll step for profile with 16MHz Crystal and 240MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ
Macro for Pll step for profile with 20MHz Crystal and 80MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ
Macro for Pll step for profile with 20MHz Crystal and 133MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ
Macro for Pll step for profile with 20MHz Crystal and 160MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ
Macro for Pll step for profile with 20MHz Crystal and 200MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ
Macro for Pll step for profile with 20MHz Crystal and 240MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ
Macro for Pll step for profile with 20MHz Crystal and 300MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ
Macro for Pll step for profile with 40MHz Crystal and 80MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ
Macro for Pll step for profile with 40MHz Crystal and 133MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ
Macro for Pll step for profile with 40MHz Crystal and 160MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ
Macro for Pll step for profile with 40MHz Crystal and 200MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ
Macro for Pll step for profile with 40MHz Crystal and 240MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ
Macro for Pll step for profile with 40MHz Crystal and 300MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ
Macro for Pll step for profile with 8MHz Crystal and 80MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ
Macro for Pll step for profile with 8MHz Crystal and 160MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ
Macro for Pll step for profile with 8MHz Crystal and 200MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ
Macros to configure Initial Pll step. Macros to configure the Pll initial step, where the configuration of PDIV, NDIV and K2DIV are done for the internal Oscillator frequency. IfxScuCcu_InitialStepConfig. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ
Macro for Initial Pll step, for profile with 16MHz Crystal and 133MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ
Macro for Initial Pll step, for profile with 16MHz Crystal and 160MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ
Macro for Initial Pll step, for profile with 16MHz Crystal and 200MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ
Macro for Initial Pll step, for profile with 16MHz Crystal and 240MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ
Macro for Initial Pll step, for profile with 20MHz Crystal and 80MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ
Macro for Initial Pll step, for profile with 20MHz Crystal and 133MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ
Macro for Initial Pll step, for profile with 20MHz Crystal and 160MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ
Macro for Initial Pll step, for profile with 20MHz Crystal and 200MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ
Macro for Initial Pll step, for profile with 20MHz Crystal and 240MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ
Macro for Initial Pll step, for profile with 20MHz Crystal and 300MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ
Macro for Initial Pll step, for profile with 40MHz Crystal and 80MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ
Macro for Initial Pll step, for profile with 40MHz Crystal and 133MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ
Macro for Initial Pll step, for profile with 40MHz Crystal and 160MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ
Macro for Initial Pll step, for profile with 40MHz Crystal and 200MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ
Macro for Initial Pll step, for profile with 40MHz Crystal and 240MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ
Macro for Initial Pll step, for profile with 40MHz Crystal and 300MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ
Macro for Initial Pll step, for profile with 8MHz Crystal and 80MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ
Macro for Initial Pll step, for profile with 8MHz Crystal and 160MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ
Macro for Initial Pll step, for profile with 8MHz Crystal and 200MHz target. More...
#define | IFXSCU_CFG_MAXDIV_80MHZ (1)
Macros to configure CCUCON registers. Macros to configure the Pll initial step, where the configuration of PDIV, NDIV and K2DIV are done for the internal Oscillator frequency. IfxScuCcu_InitialStepConfig. More...
#define | IFXSCU_CFG_MAXDIV_133MHZ (1)
Macro to configure MAXDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_MAXDIV_160MHZ (1)
Macro to configure MAXDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_MAXDIV_200MHZ (1)
Macro to configure MAXDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_MAXDIV_240MHZ (1)
Macro to configure MAXDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_MAXDIV_300MHZ (1)
Macro to configure MAXDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_SRIDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
Macro to configure SRIDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_SRIDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
Macro to configure SRIDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_SRIDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
Macro to configure SRIDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_SRIDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
Macro to configure SRIDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_SRIDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
Macro to configure SRIDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_SRIDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
Macro to configure SRIDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_BAUD1DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
Macro to configure BAUD1DIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_BAUD1DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
Macro to configure BAUD1DIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_BAUD1DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
Macro to configure BAUD1DIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_BAUD1DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
Macro to configure BAUD1DIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_BAUD1DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
Macro to configure BAUD1DIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_BAUD1DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
Macro to configure BAUD1DIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_BAUD2DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
Macro to configure BAUD2DIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_BAUD2DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
Macro to configure BAUD2DIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_BAUD2DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
Macro to configure BAUD2DIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_BAUD2DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
Macro to configure BAUD2DIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_BAUD2DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
Macro to configure BAUD2DIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_BAUD2DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
Macro to configure BAUD2DIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_SPBDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ * 2) /*Max: 100MHz */
Macro to configure SPBDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_SPBDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
Macro to configure SPBDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_SPBDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
Macro to configure SPBDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_SPBDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
Macro to configure SPBDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_SPBDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
Macro to configure SPBDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_SPBDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
Macro to configure SPBDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_FSI2DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
Macro to configure FSI2DIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_FSI2DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
Macro to configure FSI2DIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_FSI2DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
Macro to configure FSI2DIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_FSI2DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
Macro to configure FSI2DIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_FSI2DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
Macro to configure FSI2DIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_FSI2DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
Macro to configure FSI2DIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_FSIDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
Macro to configure FSIDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_FSIDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
Macro to configure FSIDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_FSIDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
Macro to configure FSIDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_FSIDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
Macro to configure FSIDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_FSIDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
Macro to configure FSIDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_FSIDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
Macro to configure FSIDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_CANDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
Macro to configure CANDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_CANDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
Macro to configure CANDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_CANDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
Macro to configure CANDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_CANDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
Macro to configure CANDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_CANDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
Macro to configure CANDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_CANDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
Macro to configure CANDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_ERAYDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 80MHz */
Macro to configure ERAYDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_ERAYDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 80MHz */
Macro to configure ERAYDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_ERAYDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 80MHz */
Macro to configure ERAYDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_ERAYDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 3) /*Max: 80MHz */
Macro to configure ERAYDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_ERAYDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 80MHz */
Macro to configure ERAYDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_ERAYDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 4) /*Max: 80MHz */
Macro to configure ERAYDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_STMDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
Macro to configure STMDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_STMDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
Macro to configure STMDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_STMDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
Macro to configure STMDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_STMDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
Macro to configure STMDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_STMDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
Macro to configure STMDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_STMDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
Macro to configure STMDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_GTMDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
Macro to configure GTMDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_GTMDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
Macro to configure GTMDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_GTMDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
Macro to configure GTMDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_GTMDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
Macro to configure GTMDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_GTMDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
Macro to configure GTMDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_GTMDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
Macro to configure GTMDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_ETHDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ * 2)
Macro to configure ETHDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_ETHDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 3)
Macro to configure ETHDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_ETHDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 4)
Macro to configure ETHDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_ETHDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 4)
Macro to configure ETHDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_ETHDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 5)
Macro to configure ETHDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_ETHDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 6)
Macro to configure ETHDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINFDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
Macro to configure ASCLINFDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINFDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
Macro to configure ASCLINFDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINFDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
Macro to configure ASCLINFDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINFDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
Macro to configure ASCLINFDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINFDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
Macro to configure ASCLINFDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINFDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
Macro to configure ASCLINFDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINSDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
Macro to configure ASCLINSDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINSDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
Macro to configure ASCLINSDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINSDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
Macro to configure ASCLINSDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINSDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
Macro to configure ASCLINSDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINSDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
Macro to configure ASCLINSDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINSDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
Macro to configure ASCLINSDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_BBBDIV_80MHZ (IFXSCU_CFG_SRIDIV_80MHZ * 2)
Macro to configure BBBDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_BBBDIV_133MHZ (IFXSCU_CFG_SRIDIV_133MHZ * 2)
Macro to configure BBBDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_BBBDIV_160MHZ (IFXSCU_CFG_SRIDIV_160MHZ * 2)
Macro to configure BBBDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_BBBDIV_200MHZ (IFXSCU_CFG_SRIDIV_200MHZ * 2)
Macro to configure BBBDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_BBBDIV_240MHZ (IFXSCU_CFG_SRIDIV_240MHZ * 2)
Macro to configure BBBDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_BBBDIV_300MHZ (IFXSCU_CFG_SRIDIV_300MHZ * 2)
Macro to configure BBBDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_CPU0DIV_80MHZ (0) /*Same as SRIDIV */
Macro to configure CPU0DIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_CPU0DIV_133MHZ (0) /*Same as SRIDIV */
Macro to configure CPU0DIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_CPU0DIV_160MHZ (0) /*Same as SRIDIV */
Macro to configure CPU0DIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_CPU0DIV_200MHZ (0) /*Same as SRIDIV */
Macro to configure CPU0DIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_CPU0DIV_240MHZ (0) /*Same as SRIDIV */
Macro to configure CPU0DIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_CPU0DIV_300MHZ (0) /*Same as SRIDIV */
Macro to configure CPU0DIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_CPU1DIV_80MHZ (0) /*Same as SRIDIV */
Macro to configure CPU1DIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_CPU1DIV_133MHZ (0) /*Same as SRIDIV */
Macro to configure CPU1DIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_CPU1DIV_160MHZ (0) /*Same as SRIDIV */
Macro to configure CPU1DIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_CPU1DIV_200MHZ (0) /*Same as SRIDIV */
Macro to configure CPU1DIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_CPU1DIV_240MHZ (0) /*Same as SRIDIV */
Macro to configure CPU1DIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_CPU1DIV_300MHZ (0) /*Same as SRIDIV */
Macro to configure CPU1DIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ (3 - 1)
Macros to configure FLASH.FCON register for flash waitstate configuration. IfxScuCcu_InitialStepConfig. More...
#define | IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ (4 - 1)
Macro to configure FCON.WSPFLASH at 133MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ (5 - 1)
Macro to configure FCON.WSPFLASH at 160MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ (6 - 1)
Macro to configure FCON.WSPFLASH at 200MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ (8 - 1)
Macro to configure FCON.WSPFLASH at 240MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ (9 - 1)
Macro to configure FCON.WSPFLASH at 300MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ (1 - 1)
Macro to configure FCON.WSECP_ at 80MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ (2 - 1)
Macro to configure FCON.WSECPF at 133MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ (2 - 1)
Macro to configure FCON.WSECPF at 160MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ (2 - 1)
Macro to configure FCON.WSECPF at 200MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ (3 - 1)
Macro to configure FCON.WSECPF_ at 240MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ (3 - 1)
Macro to configure FCON.WSECPF at 300MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ (16 - 1)
Macro to configure FCON.WSDFLASH at 80MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ (14 - 1)
Macro to configure FCON.WSDFLASH_ at 133MHz target frequency, where fSRI= 133/2= 66.5MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ (16 - 1)
Macro to configure FCON.WSDFLASH at 160MHz target frequency, where fSRI= 160/2= 80MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ (20 - 1)
Macro to configure FCON.WSDFLASH at 200MHz target frequency, where fSRI= 200/2= 100MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ (16 - 1)
Macro to configure FCON.WSDFLASH at 240MHz target frequency, where fSRI= 240/3= 80MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ (20 - 1)
Macro to configure FCON.WSDFLASH at 300MHz target frequency, where fSRI= 300/3= 100MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ (2 - 1)
Macro to configure FCON.WSECDF at 80MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ (2 - 1)
Macro to configure FCON.WSECDF at 133MHz target frequency, where fSRI= 133/2= 66.5MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ (2 - 1)
Macro to configure FCON.WSECDF at 160MHz target frequency, where fSRI= 160/2= 80MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ (2 - 1)
Macro to configure FCON.WSECDF at 200MHz target frequency, where fSRI= 200/2= 100MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ (2 - 1)
Macro to configure FCON.WSECDF at 240MHz target frequency, where fSRI= 240/3= 80MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ (2 - 1)
Macro to configure FCON.WSECDF at 300MHz target frequency, where fSRI= 300/3= 100MHZ. More...
#define | IFXSCU_CFG_FLASH_WAITSTATE_MSK
Macros to configure FLASH.FCON registers. More...
#define | IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_(pllFreq)
#define | IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC(pllFreq) IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_(pllFreq)
#define | IFXSCU_CFG_FLASH_WAITSTATE_VAL IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC(IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_CCUCON0_MASK
Macros to configure CCUCON0 Clock distribution. More...
#define | IFXSCU_CFG_CCUCON0_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON0_BASIC(pllFreq) IFXSCU_CFG_CCUCON0_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON0 IFXSCU_CFG_CCUCON0_BASIC(IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_CCUCON1_MASK
Macros to configure CCUCON1 Clock distribution. More...
#define | IFXSCU_CFG_CCUCON1_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON1_BASIC(pllFreq) IFXSCU_CFG_CCUCON1_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON1 IFXSCU_CFG_CCUCON1_BASIC(IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_CCUCON2_MASK
Macros to configure CCUCON2 Clock distribution. More...
#define | IFXSCU_CFG_CCUCON2_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON2_BASIC(pllFreq) IFXSCU_CFG_CCUCON2_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON2 IFXSCU_CFG_CCUCON2_BASIC(IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_CCUCON5_MASK
Macros to configure CCUCON5 Clock distribution. More...
#define | IFXSCU_CFG_CCUCON5_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON5_BASIC(pllFreq) IFXSCU_CFG_CCUCON5_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON5 IFXSCU_CFG_CCUCON5_BASIC(IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_CCUCON6_MASK
Macros to configure CCUCON6 Clock distribution. More...
#define | IFXSCU_CFG_CCUCON6_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON6_BASIC(pllFreq) IFXSCU_CFG_CCUCON6_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON6 IFXSCU_CFG_CCUCON6_BASIC(IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_CCUCON7_MASK
Macros to configure CCUCON7 Clock distribution. More...
#define | IFXSCU_CFG_CCUCON7_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON7_BASIC(pllFreq) IFXSCU_CFG_CCUCON7_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON7 IFXSCU_CFG_CCUCON7_BASIC(IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_CLK_DISTRIBUTION
#define | IFXSCU_CFG_PLL_STEPS_BASIC_(xtalFreq, pllFreq) IFXSCU_CFG_PLL_STEPS_##xtalFreq##_##pllFreq
#define | IFXSCU_CFG_PLL_STEPS_BASIC(xtalFreq, pllFreq) IFXSCU_CFG_PLL_STEPS_BASIC_(xtalFreq, pllFreq)
#define | IFXSCU_CFG_PLL_STEPS IFXSCU_CFG_PLL_STEPS_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_(xtalFreq, pllFreq) IFXSCU_CFG_PLL_INITIAL_STEP_##xtalFreq##_##pllFreq
#define | IFXSCU_CFG_PLL_INITIAL_STEP_BASIC(xtalFreq, pllFreq) IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_(xtalFreq, pllFreq)
#define | IFXSCU_CFG_PLL_INITIAL_STEP IFXSCU_CFG_PLL_INITIAL_STEP_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_FLASH_WAITSTATE
#define | IFXSCU_CFG_XTAL_FREQ 20MHZ
#define | IFXSCU_CFG_PLL_FREQ 200MHZ

Enumerations

enum IfxScu_CCUCON0_CLKSEL {
IfxScu_CCUCON0_CLKSEL_fBack = 0,
IfxScu_CCUCON0_CLKSEL_fPll = 1
}
enum IfxScu_CCUCON1_INSEL {
IfxScu_CCUCON1_INSEL_fOsc1 = 0,
IfxScu_CCUCON1_INSEL_fOsc0 = 1
}
enum IfxScu_WDTCON1_IR {
IfxScu_WDTCON1_IR_divBy16384 = 0,
IfxScu_WDTCON1_IR_divBy256 = 1,
IfxScu_WDTCON1_IR_divBy64 = 2
}
enum IfxScu_PMCSR_REQSLP {
IfxScu_PMCSR_REQSLP_Run = 0U,
IfxScu_PMCSR_REQSLP_Idle = 1U,
IfxScu_PMCSR_REQSLP_Sleep = 2U,
IfxScu_PMCSR_REQSLP_Stby = 3U
}

Detailed Description

SCU on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScu_cfg.h.

Macro Definition Documentation

◆ IFX_CFG_SCU_PLL_FREQUENCY

#define IFX_CFG_SCU_PLL_FREQUENCY 200000000

Default PLL frequency.

Definition at line 66 of file IfxScu_cfg.h.

◆ IFX_CFG_SCU_XTAL_FREQUENCY

#define IFX_CFG_SCU_XTAL_FREQUENCY 20000000

Default External oscillator frequency.

Definition at line 60 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINFDIV_133MHZ

#define IFXSCU_CFG_ASCLINFDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */

Macro to configure ASCLINFDIV at 133MHz target frequency.

Definition at line 943 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINFDIV_160MHZ

#define IFXSCU_CFG_ASCLINFDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */

Macro to configure ASCLINFDIV at 160MHz target frequency.

Definition at line 948 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINFDIV_200MHZ

#define IFXSCU_CFG_ASCLINFDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */

Macro to configure ASCLINFDIV at 200MHz target frequency.

Definition at line 953 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINFDIV_240MHZ

#define IFXSCU_CFG_ASCLINFDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */

Macro to configure ASCLINFDIV at 240MHz target frequency.

Definition at line 958 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINFDIV_300MHZ

#define IFXSCU_CFG_ASCLINFDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */

Macro to configure ASCLINFDIV at 300MHz target frequency.

Definition at line 963 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINFDIV_80MHZ

#define IFXSCU_CFG_ASCLINFDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */

Macro to configure ASCLINFDIV at 80MHz target frequency.

Definition at line 938 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINSDIV_133MHZ

#define IFXSCU_CFG_ASCLINSDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */

Macro to configure ASCLINSDIV at 133MHz target frequency.

Definition at line 973 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINSDIV_160MHZ

#define IFXSCU_CFG_ASCLINSDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */

Macro to configure ASCLINSDIV at 160MHz target frequency.

Definition at line 978 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINSDIV_200MHZ

#define IFXSCU_CFG_ASCLINSDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */

Macro to configure ASCLINSDIV at 200MHz target frequency.

Definition at line 983 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINSDIV_240MHZ

#define IFXSCU_CFG_ASCLINSDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */

Macro to configure ASCLINSDIV at 240MHz target frequency.

Definition at line 988 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINSDIV_300MHZ

#define IFXSCU_CFG_ASCLINSDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */

Macro to configure ASCLINSDIV at 300MHz target frequency.

Definition at line 993 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINSDIV_80MHZ

#define IFXSCU_CFG_ASCLINSDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */

Macro to configure ASCLINSDIV at 80MHz target frequency.

Definition at line 968 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD1DIV_133MHZ

#define IFXSCU_CFG_BAUD1DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */

Macro to configure BAUD1DIV at 133MHz target frequency.

Definition at line 643 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD1DIV_160MHZ

#define IFXSCU_CFG_BAUD1DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */

Macro to configure BAUD1DIV at 160MHz target frequency.

Definition at line 648 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD1DIV_200MHZ

#define IFXSCU_CFG_BAUD1DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */

Macro to configure BAUD1DIV at 200MHz target frequency.

Definition at line 653 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD1DIV_240MHZ

#define IFXSCU_CFG_BAUD1DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */

Macro to configure BAUD1DIV at 240MHz target frequency.

Definition at line 658 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD1DIV_300MHZ

#define IFXSCU_CFG_BAUD1DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */

Macro to configure BAUD1DIV at 300MHz target frequency.

Definition at line 663 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD1DIV_80MHZ

#define IFXSCU_CFG_BAUD1DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */

Macro to configure BAUD1DIV at 80MHz target frequency.

Definition at line 638 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD2DIV_133MHZ

#define IFXSCU_CFG_BAUD2DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */

Macro to configure BAUD2DIV at 133MHz target frequency.

Definition at line 673 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD2DIV_160MHZ

#define IFXSCU_CFG_BAUD2DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */

Macro to configure BAUD2DIV at 160MHz target frequency.

Definition at line 678 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD2DIV_200MHZ

#define IFXSCU_CFG_BAUD2DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */

Macro to configure BAUD2DIV at 200MHz target frequency.

Definition at line 683 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD2DIV_240MHZ

#define IFXSCU_CFG_BAUD2DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */

Macro to configure BAUD2DIV at 240MHz target frequency.

Definition at line 688 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD2DIV_300MHZ

#define IFXSCU_CFG_BAUD2DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */

Macro to configure BAUD2DIV at 300MHz target frequency.

Definition at line 693 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD2DIV_80MHZ

#define IFXSCU_CFG_BAUD2DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */

Macro to configure BAUD2DIV at 80MHz target frequency.

Definition at line 668 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BBBDIV_133MHZ

#define IFXSCU_CFG_BBBDIV_133MHZ (IFXSCU_CFG_SRIDIV_133MHZ * 2)

Macro to configure BBBDIV at 133MHz target frequency.

Definition at line 1003 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BBBDIV_160MHZ

#define IFXSCU_CFG_BBBDIV_160MHZ (IFXSCU_CFG_SRIDIV_160MHZ * 2)

Macro to configure BBBDIV at 160MHz target frequency.

Definition at line 1008 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BBBDIV_200MHZ

#define IFXSCU_CFG_BBBDIV_200MHZ (IFXSCU_CFG_SRIDIV_200MHZ * 2)

Macro to configure BBBDIV at 200MHz target frequency.

Definition at line 1013 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BBBDIV_240MHZ

#define IFXSCU_CFG_BBBDIV_240MHZ (IFXSCU_CFG_SRIDIV_240MHZ * 2)

Macro to configure BBBDIV at 240MHz target frequency.

Definition at line 1018 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BBBDIV_300MHZ

#define IFXSCU_CFG_BBBDIV_300MHZ (IFXSCU_CFG_SRIDIV_300MHZ * 2)

Macro to configure BBBDIV at 300MHz target frequency.

Definition at line 1023 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BBBDIV_80MHZ

#define IFXSCU_CFG_BBBDIV_80MHZ (IFXSCU_CFG_SRIDIV_80MHZ * 2)

Macro to configure BBBDIV at 80MHz target frequency.

Definition at line 998 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CANDIV_133MHZ

#define IFXSCU_CFG_CANDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */

Macro to configure CANDIV at 133MHz target frequency.

Definition at line 793 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CANDIV_160MHZ

#define IFXSCU_CFG_CANDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */

Macro to configure CANDIV at 160MHz target frequency.

Definition at line 798 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CANDIV_200MHZ

#define IFXSCU_CFG_CANDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */

Macro to configure CANDIV at 200MHz target frequency.

Definition at line 803 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CANDIV_240MHZ

#define IFXSCU_CFG_CANDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */

Macro to configure CANDIV at 240MHz target frequency.

Definition at line 808 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CANDIV_300MHZ

#define IFXSCU_CFG_CANDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */

Macro to configure CANDIV at 200MHz target frequency.

Definition at line 813 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CANDIV_80MHZ

#define IFXSCU_CFG_CANDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */

Macro to configure CANDIV at 80MHz target frequency.

Definition at line 788 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON0

#define IFXSCU_CFG_CCUCON0 IFXSCU_CFG_CCUCON0_BASIC(IFXSCU_CFG_PLL_FREQ)

Definition at line 1250 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON0_BASIC

#define IFXSCU_CFG_CCUCON0_BASIC ( pllFreq ) IFXSCU_CFG_CCUCON0_BASIC_(pllFreq)

Definition at line 1248 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON0_BASIC_

#define IFXSCU_CFG_CCUCON0_BASIC_ ( pllFreq )
Value:
(uint32)( \
(IFXSCU_CFG_BAUD1DIV_##pllFreq << IFX_SCU_CCUCON0_BAUD1DIV_OFF) | \
(IFXSCU_CFG_BAUD2DIV_##pllFreq << IFX_SCU_CCUCON0_BAUD2DIV_OFF) | \
(IFXSCU_CFG_SRIDIV_##pllFreq << IFX_SCU_CCUCON0_SRIDIV_OFF) | \
(IFXSCU_CFG_SPBDIV_##pllFreq << IFX_SCU_CCUCON0_SPBDIV_OFF) | \
(IFXSCU_CFG_FSI2DIV_##pllFreq << IFX_SCU_CCUCON0_FSI2DIV_OFF) | \
(IFXSCU_CFG_FSIDIV_##pllFreq << IFX_SCU_CCUCON0_FSIDIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1239 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON0_MASK

#define IFXSCU_CFG_CCUCON0_MASK
Value:
( \
(IFX_SCU_CCUCON0_BAUD1DIV_MSK << IFX_SCU_CCUCON0_BAUD1DIV_OFF) | \
(IFX_SCU_CCUCON0_BAUD2DIV_MSK << IFX_SCU_CCUCON0_BAUD2DIV_OFF) | \
(IFX_SCU_CCUCON0_SRIDIV_MSK << IFX_SCU_CCUCON0_SRIDIV_OFF) | \
(IFX_SCU_CCUCON0_SPBDIV_MSK << IFX_SCU_CCUCON0_SPBDIV_OFF) | \
(IFX_SCU_CCUCON0_FSI2DIV_MSK << IFX_SCU_CCUCON0_FSI2DIV_OFF) | \
(IFX_SCU_CCUCON0_FSIDIV_MSK << IFX_SCU_CCUCON0_FSIDIV_OFF))

Macros to configure CCUCON0 Clock distribution.

Definition at line 1230 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON1

#define IFXSCU_CFG_CCUCON1 IFXSCU_CFG_CCUCON1_BASIC(IFXSCU_CFG_PLL_FREQ)

Definition at line 1275 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON1_BASIC

#define IFXSCU_CFG_CCUCON1_BASIC ( pllFreq ) IFXSCU_CFG_CCUCON1_BASIC_(pllFreq)

Definition at line 1273 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON1_BASIC_

#define IFXSCU_CFG_CCUCON1_BASIC_ ( pllFreq )
Value:
(uint32)( \
(IFXSCU_CFG_CANDIV_##pllFreq << IFX_SCU_CCUCON1_CANDIV_OFF) | \
(IFXSCU_CFG_ERAYDIV_80MHZ << IFX_SCU_CCUCON1_ERAYDIV_OFF) | \
(IFXSCU_CFG_STMDIV_##pllFreq << IFX_SCU_CCUCON1_STMDIV_OFF) | \
(IFXSCU_CFG_GTMDIV_##pllFreq << IFX_SCU_CCUCON1_GTMDIV_OFF) | \
(IFXSCU_CFG_ETHDIV_##pllFreq << IFX_SCU_CCUCON1_ETHDIV_OFF) | \
(IFXSCU_CFG_ASCLINFDIV_##pllFreq << IFX_SCU_CCUCON1_ASCLINFDIV_OFF) | \
(IFXSCU_CFG_ASCLINSDIV_##pllFreq << IFX_SCU_CCUCON1_ASCLINSDIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IFXSCU_CFG_ERAYDIV_80MHZ
#define IFXSCU_CFG_ERAYDIV_80MHZ
Macro to configure ERAYDIV at 80MHz target frequency.
Definition: IfxScu_cfg.h:818

Definition at line 1263 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON1_MASK

#define IFXSCU_CFG_CCUCON1_MASK
Value:
( \
(IFX_SCU_CCUCON1_CANDIV_MSK << IFX_SCU_CCUCON1_CANDIV_OFF) | \
(IFX_SCU_CCUCON1_ERAYDIV_MSK << IFX_SCU_CCUCON1_ERAYDIV_OFF) | \
(IFX_SCU_CCUCON1_STMDIV_MSK << IFX_SCU_CCUCON1_STMDIV_OFF) | \
(IFX_SCU_CCUCON1_GTMDIV_MSK << IFX_SCU_CCUCON1_GTMDIV_OFF) | \
(IFX_SCU_CCUCON1_ETHDIV_MSK << IFX_SCU_CCUCON1_ETHDIV_OFF) | \
(IFX_SCU_CCUCON1_ASCLINFDIV_MSK << IFX_SCU_CCUCON1_ASCLINFDIV_OFF) | \
(IFX_SCU_CCUCON1_ASCLINSDIV_MSK << IFX_SCU_CCUCON1_ASCLINSDIV_OFF))

Macros to configure CCUCON1 Clock distribution.

Definition at line 1253 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON2

#define IFXSCU_CFG_CCUCON2 IFXSCU_CFG_CCUCON2_BASIC(IFXSCU_CFG_PLL_FREQ)

Definition at line 1288 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON2_BASIC

#define IFXSCU_CFG_CCUCON2_BASIC ( pllFreq ) IFXSCU_CFG_CCUCON2_BASIC_(pllFreq)

Definition at line 1286 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON2_BASIC_

#define IFXSCU_CFG_CCUCON2_BASIC_ ( pllFreq )
Value:
(uint32)( \
(IFXSCU_CFG_BBBDIV_##pllFreq << IFX_SCU_CCUCON2_BBBDIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1282 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON2_MASK

#define IFXSCU_CFG_CCUCON2_MASK
Value:
( \
(IFX_SCU_CCUCON2_BBBDIV_MSK << IFX_SCU_CCUCON2_BBBDIV_OFF))

Macros to configure CCUCON2 Clock distribution.

Definition at line 1278 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON5

#define IFXSCU_CFG_CCUCON5 IFXSCU_CFG_CCUCON5_BASIC(IFXSCU_CFG_PLL_FREQ)

Definition at line 1301 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON5_BASIC

#define IFXSCU_CFG_CCUCON5_BASIC ( pllFreq ) IFXSCU_CFG_CCUCON5_BASIC_(pllFreq)

Definition at line 1299 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON5_BASIC_

#define IFXSCU_CFG_CCUCON5_BASIC_ ( pllFreq )
Value:
(uint32)( \
(IFXSCU_CFG_MAXDIV_##pllFreq << IFX_SCU_CCUCON5_MAXDIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1295 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON5_MASK

#define IFXSCU_CFG_CCUCON5_MASK
Value:
( \
(IFX_SCU_CCUCON5_MAXDIV_MSK << IFX_SCU_CCUCON5_MAXDIV_OFF))

Macros to configure CCUCON5 Clock distribution.

Definition at line 1291 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON6

#define IFXSCU_CFG_CCUCON6 IFXSCU_CFG_CCUCON6_BASIC(IFXSCU_CFG_PLL_FREQ)

Definition at line 1314 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON6_BASIC

#define IFXSCU_CFG_CCUCON6_BASIC ( pllFreq ) IFXSCU_CFG_CCUCON6_BASIC_(pllFreq)

Definition at line 1312 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON6_BASIC_

#define IFXSCU_CFG_CCUCON6_BASIC_ ( pllFreq )
Value:
(uint32)( \
(IFXSCU_CFG_CPU0DIV_##pllFreq << IFX_SCU_CCUCON6_CPU0DIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1308 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON6_MASK

#define IFXSCU_CFG_CCUCON6_MASK
Value:
( \
(IFX_SCU_CCUCON6_CPU0DIV_MSK << IFX_SCU_CCUCON6_CPU0DIV_OFF))

Macros to configure CCUCON6 Clock distribution.

Definition at line 1304 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON7

#define IFXSCU_CFG_CCUCON7 IFXSCU_CFG_CCUCON7_BASIC(IFXSCU_CFG_PLL_FREQ)

Definition at line 1327 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON7_BASIC

#define IFXSCU_CFG_CCUCON7_BASIC ( pllFreq ) IFXSCU_CFG_CCUCON7_BASIC_(pllFreq)

Definition at line 1325 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON7_BASIC_

#define IFXSCU_CFG_CCUCON7_BASIC_ ( pllFreq )
Value:
(uint32)( \
(IFXSCU_CFG_CPU1DIV_##pllFreq << IFX_SCU_CCUCON7_CPU1DIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1321 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON7_MASK

#define IFXSCU_CFG_CCUCON7_MASK
Value:
( \
(IFX_SCU_CCUCON7_CPU1DIV_MSK << IFX_SCU_CCUCON7_CPU1DIV_OFF))

Macros to configure CCUCON7 Clock distribution.

Definition at line 1317 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CLK_DISTRIBUTION

#define IFXSCU_CFG_CLK_DISTRIBUTION
Value:
{ \
/* { uint32 value, uint32 mask }*/ \
{IFXSCU_CFG_CCUCON0, IFXSCU_CFG_CCUCON0_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon0;*/ \
{IFXSCU_CFG_CCUCON1, IFXSCU_CFG_CCUCON1_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon1;*/ \
{IFXSCU_CFG_CCUCON2, IFXSCU_CFG_CCUCON2_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon2;*/ \
{IFXSCU_CFG_CCUCON5, IFXSCU_CFG_CCUCON5_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon5;*/ \
{IFXSCU_CFG_CCUCON6, IFXSCU_CFG_CCUCON6_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon6;*/ \
{IFXSCU_CFG_CCUCON7, IFXSCU_CFG_CCUCON7_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon7;*/ \
}
IFXSCU_CFG_CCUCON0_MASK
#define IFXSCU_CFG_CCUCON0_MASK
Macros to configure CCUCON0 Clock distribution.
Definition: IfxScu_cfg.h:1230
IFXSCU_CFG_CCUCON6_MASK
#define IFXSCU_CFG_CCUCON6_MASK
Macros to configure CCUCON6 Clock distribution.
Definition: IfxScu_cfg.h:1304
IFXSCU_CFG_CCUCON2_MASK
#define IFXSCU_CFG_CCUCON2_MASK
Macros to configure CCUCON2 Clock distribution.
Definition: IfxScu_cfg.h:1278
IFXSCU_CFG_CCUCON5
#define IFXSCU_CFG_CCUCON5
Definition: IfxScu_cfg.h:1301
IFXSCU_CFG_CCUCON1
#define IFXSCU_CFG_CCUCON1
Definition: IfxScu_cfg.h:1275
IFXSCU_CFG_CCUCON7_MASK
#define IFXSCU_CFG_CCUCON7_MASK
Macros to configure CCUCON7 Clock distribution.
Definition: IfxScu_cfg.h:1317
IFXSCU_CFG_CCUCON5_MASK
#define IFXSCU_CFG_CCUCON5_MASK
Macros to configure CCUCON5 Clock distribution.
Definition: IfxScu_cfg.h:1291
IFXSCU_CFG_CCUCON6
#define IFXSCU_CFG_CCUCON6
Definition: IfxScu_cfg.h:1314
IFXSCU_CFG_CCUCON2
#define IFXSCU_CFG_CCUCON2
Definition: IfxScu_cfg.h:1288
IFXSCU_CFG_CCUCON7
#define IFXSCU_CFG_CCUCON7
Definition: IfxScu_cfg.h:1327
IFXSCU_CFG_CCUCON0
#define IFXSCU_CFG_CCUCON0
Definition: IfxScu_cfg.h:1250
IFXSCU_CFG_CCUCON1_MASK
#define IFXSCU_CFG_CCUCON1_MASK
Macros to configure CCUCON1 Clock distribution.
Definition: IfxScu_cfg.h:1253

Definition at line 1329 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU0DIV_133MHZ

#define IFXSCU_CFG_CPU0DIV_133MHZ (0) /*Same as SRIDIV */

Macro to configure CPU0DIV at 133MHz target frequency.

Definition at line 1033 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU0DIV_160MHZ

#define IFXSCU_CFG_CPU0DIV_160MHZ (0) /*Same as SRIDIV */

Macro to configure CPU0DIV at 160MHz target frequency.

Definition at line 1038 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU0DIV_200MHZ

#define IFXSCU_CFG_CPU0DIV_200MHZ (0) /*Same as SRIDIV */

Macro to configure CPU0DIV at 200MHz target frequency.

Definition at line 1043 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU0DIV_240MHZ

#define IFXSCU_CFG_CPU0DIV_240MHZ (0) /*Same as SRIDIV */

Macro to configure CPU0DIV at 240MHz target frequency.

Definition at line 1048 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU0DIV_300MHZ

#define IFXSCU_CFG_CPU0DIV_300MHZ (0) /*Same as SRIDIV */

Macro to configure CPU0DIV at 300MHz target frequency.

Definition at line 1053 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU0DIV_80MHZ

#define IFXSCU_CFG_CPU0DIV_80MHZ (0) /*Same as SRIDIV */

Macro to configure CPU0DIV at 80MHz target frequency.

Definition at line 1028 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU1DIV_133MHZ

#define IFXSCU_CFG_CPU1DIV_133MHZ (0) /*Same as SRIDIV */

Macro to configure CPU1DIV at 133MHz target frequency.

Definition at line 1063 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU1DIV_160MHZ

#define IFXSCU_CFG_CPU1DIV_160MHZ (0) /*Same as SRIDIV */

Macro to configure CPU1DIV at 160MHz target frequency.

Definition at line 1068 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU1DIV_200MHZ

#define IFXSCU_CFG_CPU1DIV_200MHZ (0) /*Same as SRIDIV */

Macro to configure CPU1DIV at 200MHz target frequency.

Definition at line 1073 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU1DIV_240MHZ

#define IFXSCU_CFG_CPU1DIV_240MHZ (0) /*Same as SRIDIV */

Macro to configure CPU1DIV at 240MHz target frequency.

Definition at line 1078 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU1DIV_300MHZ

#define IFXSCU_CFG_CPU1DIV_300MHZ (0) /*Same as SRIDIV */

Macro to configure CPU1DIV at 300MHz target frequency.

Definition at line 1083 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU1DIV_80MHZ

#define IFXSCU_CFG_CPU1DIV_80MHZ (0) /*Same as SRIDIV */

Macro to configure CPU1DIV at 80MHz target frequency.

Definition at line 1058 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ERAYDIV_133MHZ

#define IFXSCU_CFG_ERAYDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 80MHz */

Macro to configure ERAYDIV at 133MHz target frequency.

Definition at line 823 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ERAYDIV_160MHZ

#define IFXSCU_CFG_ERAYDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 80MHz */

Macro to configure ERAYDIV at 160MHz target frequency.

Definition at line 828 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ERAYDIV_200MHZ

#define IFXSCU_CFG_ERAYDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 3) /*Max: 80MHz */

Macro to configure ERAYDIV at 200MHz target frequency.

Definition at line 833 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ERAYDIV_240MHZ

#define IFXSCU_CFG_ERAYDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 80MHz */

Macro to configure ERAYDIV at 200MHz target frequency.

Definition at line 838 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ERAYDIV_300MHZ

#define IFXSCU_CFG_ERAYDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 4) /*Max: 80MHz */

Macro to configure ERAYDIV at 300MHz target frequency.

Definition at line 843 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ERAYDIV_80MHZ

#define IFXSCU_CFG_ERAYDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 80MHz */

Macro to configure ERAYDIV at 80MHz target frequency.

Definition at line 818 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ETHDIV_133MHZ

#define IFXSCU_CFG_ETHDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 3)

Macro to configure ETHDIV at 133MHz target frequency.

Definition at line 913 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ETHDIV_160MHZ

#define IFXSCU_CFG_ETHDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 4)

Macro to configure ETHDIV at 160MHz target frequency.

Definition at line 918 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ETHDIV_200MHZ

#define IFXSCU_CFG_ETHDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 4)

Macro to configure ETHDIV at 200MHz target frequency.

Definition at line 923 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ETHDIV_240MHZ

#define IFXSCU_CFG_ETHDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 5)

Macro to configure ETHDIV at 240MHz target frequency.

Definition at line 928 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ETHDIV_300MHZ

#define IFXSCU_CFG_ETHDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 6)

Macro to configure ETHDIV at 300MHz target frequency.

Definition at line 933 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ETHDIV_80MHZ

#define IFXSCU_CFG_ETHDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ * 2)

Macro to configure ETHDIV at 80MHz target frequency.

Definition at line 908 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ

#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ (14 - 1)

Macro to configure FCON.WSDFLASH_ at 133MHz target frequency, where fSRI= 133/2= 66.5MHZ.

Definition at line 1157 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ

#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ (16 - 1)

Macro to configure FCON.WSDFLASH at 160MHz target frequency, where fSRI= 160/2= 80MHZ.

Definition at line 1162 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ

#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ (20 - 1)

Macro to configure FCON.WSDFLASH at 200MHz target frequency, where fSRI= 200/2= 100MHZ.

Definition at line 1167 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ

#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ (16 - 1)

Macro to configure FCON.WSDFLASH at 240MHz target frequency, where fSRI= 240/3= 80MHZ.

Definition at line 1172 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ

#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ (20 - 1)

Macro to configure FCON.WSDFLASH at 300MHz target frequency, where fSRI= 300/3= 100MHZ.

Definition at line 1177 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ

#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ (16 - 1)

Macro to configure FCON.WSDFLASH at 80MHz target frequency.

Definition at line 1152 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ (2 - 1)

Macro to configure FCON.WSECDF at 133MHz target frequency, where fSRI= 133/2= 66.5MHZ.

Definition at line 1187 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ (2 - 1)

Macro to configure FCON.WSECDF at 160MHz target frequency, where fSRI= 160/2= 80MHZ.

Definition at line 1192 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ (2 - 1)

Macro to configure FCON.WSECDF at 200MHz target frequency, where fSRI= 200/2= 100MHZ.

Definition at line 1197 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ (2 - 1)

Macro to configure FCON.WSECDF at 240MHz target frequency, where fSRI= 240/3= 80MHZ.

Definition at line 1202 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ (2 - 1)

Macro to configure FCON.WSECDF at 300MHz target frequency, where fSRI= 300/3= 100MHZ.

Definition at line 1207 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ (2 - 1)

Macro to configure FCON.WSECDF at 80MHz target frequency.

Definition at line 1182 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ (2 - 1)

Macro to configure FCON.WSECPF at 133MHz target frequency.

Definition at line 1127 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ (2 - 1)

Macro to configure FCON.WSECPF at 160MHz target frequency.

Definition at line 1132 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ (2 - 1)

Macro to configure FCON.WSECPF at 200MHz target frequency.

Definition at line 1137 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ (3 - 1)

Macro to configure FCON.WSECPF_ at 240MHz target frequency.

Definition at line 1142 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ (3 - 1)

Macro to configure FCON.WSECPF at 300MHz target frequency.

Definition at line 1147 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ (1 - 1)

Macro to configure FCON.WSECP_ at 80MHz target frequency.

Definition at line 1122 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ

#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ (4 - 1)

Macro to configure FCON.WSPFLASH at 133MHz target frequency.

Definition at line 1097 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ

#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ (5 - 1)

Macro to configure FCON.WSPFLASH at 160MHz target frequency.

Definition at line 1102 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ

#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ (6 - 1)

Macro to configure FCON.WSPFLASH at 200MHz target frequency.

Definition at line 1107 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ

#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ (8 - 1)

Macro to configure FCON.WSPFLASH at 240MHz target frequency.

Definition at line 1112 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ

#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ (9 - 1)

Macro to configure FCON.WSPFLASH at 300MHz target frequency.

Definition at line 1117 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ

#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ (3 - 1)

Macros to configure FLASH.FCON register for flash waitstate configuration. IfxScuCcu_InitialStepConfig.

Macro to configure FCON.WSPFLASH at 80MHz target frequency

Definition at line 1092 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_WAITSTATE

#define IFXSCU_CFG_FLASH_WAITSTATE
Value:
/* { uint32 value, uint32 mask }*/\
{IFXSCU_CFG_FLASH_WAITSTATE_VAL, IFXSCU_CFG_FLASH_WAITSTATE_MSK}
IFXSCU_CFG_FLASH_WAITSTATE_VAL
#define IFXSCU_CFG_FLASH_WAITSTATE_VAL
Definition: IfxScu_cfg.h:1227
IFXSCU_CFG_FLASH_WAITSTATE_MSK
#define IFXSCU_CFG_FLASH_WAITSTATE_MSK
Macros to configure FLASH.FCON registers.
Definition: IfxScu_cfg.h:1211

Definition at line 1351 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_WAITSTATE_MSK

#define IFXSCU_CFG_FLASH_WAITSTATE_MSK
Value:
( \
(IFX_FLASH_FCON_WSPFLASH_MSK << IFX_FLASH_FCON_WSPFLASH_OFF) | \
(IFX_FLASH_FCON_WSECPF_MSK << IFX_FLASH_FCON_WSECPF_OFF) | \
(IFX_FLASH_FCON_WSDFLASH_MSK << IFX_FLASH_FCON_WSDFLASH_OFF) | \
(IFX_FLASH_FCON_WSECDF_MSK << IFX_FLASH_FCON_WSECDF_OFF))

Macros to configure FLASH.FCON registers.

Definition at line 1211 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_WAITSTATE_VAL

#define IFXSCU_CFG_FLASH_WAITSTATE_VAL IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC(IFXSCU_CFG_PLL_FREQ)

Definition at line 1227 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC

#define IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC ( pllFreq ) IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_(pllFreq)

Definition at line 1225 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_

#define IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_ ( pllFreq )
Value:
( \
(IFXSCU_CFG_FLASH_FCON_WSPFLASH_##pllFreq << IFX_FLASH_FCON_WSPFLASH_OFF) | \
(IFXSCU_CFG_FLASH_FCON_WSECPF_##pllFreq << IFX_FLASH_FCON_WSECPF_OFF) | \
(IFXSCU_CFG_FLASH_FCON_WSDFLASH_##pllFreq << IFX_FLASH_FCON_WSDFLASH_OFF) | \
(IFXSCU_CFG_FLASH_FCON_WSECDF_##pllFreq << IFX_FLASH_FCON_WSECDF_OFF))

Definition at line 1218 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSI2DIV_133MHZ

#define IFXSCU_CFG_FSI2DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */

Macro to configure FSI2DIV at 133MHz target frequency.

Definition at line 733 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSI2DIV_160MHZ

#define IFXSCU_CFG_FSI2DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */

Macro to configure FSI2DIV at 160MHz target frequency.

Definition at line 738 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSI2DIV_200MHZ

#define IFXSCU_CFG_FSI2DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */

Macro to configure FSI2DIV at 200MHz target frequency.

Definition at line 743 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSI2DIV_240MHZ

#define IFXSCU_CFG_FSI2DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */

Macro to configure FSI2DIV at 240MHz target frequency.

Definition at line 748 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSI2DIV_300MHZ

#define IFXSCU_CFG_FSI2DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */

Macro to configure FSI2DIV at 300MHz target frequency.

Definition at line 753 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSI2DIV_80MHZ

#define IFXSCU_CFG_FSI2DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */

Macro to configure FSI2DIV at 80MHz target frequency.

Definition at line 728 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSIDIV_133MHZ

#define IFXSCU_CFG_FSIDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */

Macro to configure FSIDIV at 133MHz target frequency.

Definition at line 763 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSIDIV_160MHZ

#define IFXSCU_CFG_FSIDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */

Macro to configure FSIDIV at 160MHz target frequency.

Definition at line 768 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSIDIV_200MHZ

#define IFXSCU_CFG_FSIDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */

Macro to configure FSIDIV at 200MHz target frequency.

Definition at line 773 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSIDIV_240MHZ

#define IFXSCU_CFG_FSIDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */

Macro to configure FSIDIV at 240MHz target frequency.

Definition at line 778 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSIDIV_300MHZ

#define IFXSCU_CFG_FSIDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */

Macro to configure FSIDIV at 300MHz target frequency.

Definition at line 783 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSIDIV_80MHZ

#define IFXSCU_CFG_FSIDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */

Macro to configure FSIDIV at 80MHz target frequency.

Definition at line 758 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GTMDIV_133MHZ

#define IFXSCU_CFG_GTMDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */

Macro to configure GTMDIV at 133MHz target frequency.

Definition at line 883 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GTMDIV_160MHZ

#define IFXSCU_CFG_GTMDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */

Macro to configure GTMDIV at 160MHz target frequency.

Definition at line 888 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GTMDIV_200MHZ

#define IFXSCU_CFG_GTMDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */

Macro to configure GTMDIV at 200MHz target frequency.

Definition at line 893 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GTMDIV_240MHZ

#define IFXSCU_CFG_GTMDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */

Macro to configure GTMDIV at 240MHz target frequency.

Definition at line 898 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GTMDIV_300MHZ

#define IFXSCU_CFG_GTMDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */

Macro to configure GTMDIV at 300MHz target frequency.

Definition at line 903 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GTMDIV_80MHZ

#define IFXSCU_CFG_GTMDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */

Macro to configure GTMDIV at 80MHz target frequency.

Definition at line 878 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MAXDIV_133MHZ

#define IFXSCU_CFG_MAXDIV_133MHZ (1)

Macro to configure MAXDIV at 133MHz target frequency.

Definition at line 583 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MAXDIV_160MHZ

#define IFXSCU_CFG_MAXDIV_160MHZ (1)

Macro to configure MAXDIV at 160MHz target frequency.

Definition at line 588 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MAXDIV_200MHZ

#define IFXSCU_CFG_MAXDIV_200MHZ (1)

Macro to configure MAXDIV at 200MHz target frequency.

Definition at line 593 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MAXDIV_240MHZ

#define IFXSCU_CFG_MAXDIV_240MHZ (1)

Macro to configure MAXDIV at 240MHz target frequency.

Definition at line 598 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MAXDIV_300MHZ

#define IFXSCU_CFG_MAXDIV_300MHZ (1)

Macro to configure MAXDIV at 300MHz target frequency.

Definition at line 603 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MAXDIV_80MHZ

#define IFXSCU_CFG_MAXDIV_80MHZ (1)

Macros to configure CCUCON registers. Macros to configure the Pll initial step, where the configuration of PDIV, NDIV and K2DIV are done for the internal Oscillator frequency. IfxScuCcu_InitialStepConfig.

Macros to configure CCUCON registers Macro to configure MAXDIV at 80MHz target frequency

Definition at line 578 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_FREQ

#define IFXSCU_CFG_PLL_FREQ 200MHZ

Definition at line 1375 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP

#define IFXSCU_CFG_PLL_INITIAL_STEP IFXSCU_CFG_PLL_INITIAL_STEP_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)

Definition at line 1349 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(1 - 1), (50 - 1), (8 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 16MHz Crystal and 133MHz target.

Definition at line 431 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(1 - 1), (40 - 1), (6 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 16MHz Crystal and 160MHz target.

Definition at line 438 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(1 - 1), (50 - 1), (8 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 16MHz Crystal and 200MHz target.

Definition at line 445 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(1 - 1), (45 - 1), (7 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 16MHz Crystal and 240MHz target.

Definition at line 452 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(1 - 1), (40 - 1), (7 - 1), 0.000200F}

Macros to configure Initial Pll step. Macros to configure the Pll initial step, where the configuration of PDIV, NDIV and K2DIV are done for the internal Oscillator frequency. IfxScuCcu_InitialStepConfig.

Macro for Initial Pll step, for profile with 16MHz Crystal and 80MHz target

Definition at line 424 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(2 - 1), (80 - 1), (8 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 20MHz Crystal and 133MHz target.

Definition at line 468 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(2 - 1), (64 - 1), (6 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 20MHz Crystal and 160MHz target.

Definition at line 475 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(2 - 1), (60 - 1), (6 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 20MHz Crystal and 200MHz target.

Definition at line 482 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(2 - 1), (72 - 1), (7 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 20MHz Crystal and 240MHz target.

Definition at line 489 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(2 - 1), (60 - 1), (6 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 20MHz Crystal and 300MHz target.

Definition at line 496 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(2 - 1), (64 - 1), (7 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 20MHz Crystal and 80MHz target.

Definition at line 461 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(4 - 1), (80 - 1), (8 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 40MHz Crystal and 133MHz target.

Definition at line 512 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(4 - 1), (64 - 1), (6 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 40MHz Crystal and 160MHz target.

Definition at line 519 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(4 - 1), (60 - 1), (6 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 40MHz Crystal and 200MHz target.

Definition at line 526 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(4 - 1), (72 - 1), (7 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 40MHz Crystal and 240MHz target.

Definition at line 533 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(4 - 1), (60 - 1), (6 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 40MHz Crystal and 300MHz target.

Definition at line 540 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(4 - 1), (64 - 1), (7 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 40MHz Crystal and 80MHz target.

Definition at line 505 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(1 - 1), (60 - 1), (5 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 8MHz Crystal and 160MHz target.

Definition at line 556 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(1 - 1), (75 - 1), (6 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 8MHz Crystal and 200MHz target.

Definition at line 563 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime } ??*/\
{(1 - 1), (50 - 1), (5 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 8MHz Crystal and 80MHz target.

Definition at line 549 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_BASIC

#define IFXSCU_CFG_PLL_INITIAL_STEP_BASIC | ( | xtalFreq,
 |  | pllFreq
 | ) | IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_(xtalFreq, pllFreq)

Definition at line 1348 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_

#define IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_ | ( | xtalFreq,
 |  | pllFreq
 | ) | IFXSCU_CFG_PLL_INITIAL_STEP_##xtalFreq##_##pllFreq

Definition at line 1347 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS

#define IFXSCU_CFG_PLL_STEPS IFXSCU_CFG_PLL_STEPS_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)

Definition at line 1344 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ

#define IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ
Value:
{ /*Step 0 Config: 114MHz*/ \
(7 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 133MHz*/ \
(6 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macro for Pll step for profile with 16MHz Crystal and 133MHz target.

Definition at line 98 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ

#define IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ
Value:
{ /*Step 1 Config: 128MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 160MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 16MHz Crystal and 160MHz target.

Definition at line 113 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ

#define IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ
Value:
{ /*Step 0 Config: 120MHz*/ \
(6 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 150MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 200MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 16MHz Crystal and 200MHz target.

Definition at line 128 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ

#define IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ
Value:
{ /*Step 0 Config: 144MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 180MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 240MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 16MHz Crystal and 240MHz target.

Definition at line 148 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ

#define IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ
Value:
{ /*Step 0 Config: 80MHz*/ \
(8 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macros to configure Pll steps, Macros to configure the Pll steps for different profiles of Crystal frequency and target frequencies. This configuration is important for the current jump controll during clock throttling. IfxScuCcu_PllStepsConfig.

Macro for Pll step for profile with 16MHz Crystal and 80MHz target

Definition at line 88 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ

#define IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ
Value:
{ /*Step 0 Config: 114MHz*/ \
(7 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 133MHz*/ \
(6 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macro for Pll step for profile with 20MHz Crystal and 133MHz target.

Definition at line 179 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ

#define IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ
Value:
{ /*Step 1 Config: 128MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 160MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 20MHz Crystal and 160MHz target.

Definition at line 194 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ

#define IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ
Value:
{ /*Step 0 Config: 120MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 150MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 200MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 20MHz Crystal and 200MHz target.

Definition at line 209 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ

#define IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ
Value:
{ /*Step 0 Config: 144MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 180MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 240MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 20MHz Crystal and 240MHz target.

Definition at line 229 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ

#define IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ
Value:
{ /*Step 0 Config: 150MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 200MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 300MHz*/ \
(2 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 20MHz Crystal and 300MHz target.

Definition at line 249 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ

#define IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ
Value:
{ /*Step 0 Config: 80MHz*/ \
(8 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macro for Pll step for profile with 20MHz Crystal and 80MHz target.

Definition at line 169 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ

#define IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ
Value:
{ /*Step 0 Config: 114MHz*/ \
(7 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 133MHz*/ \
(6 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macro for Pll step for profile with 40MHz Crystal and 133MHz target.

Definition at line 280 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ

#define IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ
Value:
{ /*Step 1 Config: 128MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 160MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 40MHz Crystal and 160MHz target.

Definition at line 295 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ

#define IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ
Value:
{ /*Step 0 Config: 120MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 150MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 200MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 40MHz Crystal and 200MHz target.

Definition at line 310 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ

#define IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ
Value:
{ /*Step 0 Config: 144MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 180MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 240MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 40MHz Crystal and 240MHz target.

Definition at line 330 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ

#define IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ
Value:
{ /*Step 0 Config: 150MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 200MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 300MHz*/ \
(2 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 40MHz Crystal and 300MHz target.

Definition at line 350 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ

#define IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ
Value:
{ /*Step 0 Config: 80MHz*/ \
(8 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macro for Pll step for profile with 40MHz Crystal and 80MHz target.

Definition at line 270 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ

#define IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ
Value:
{ /*Step 0 Config: 100MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 160MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macro for Pll step for profile with 8MHz Crystal and 160MHz target.

Definition at line 381 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ

#define IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ
Value:
{ /*Step 0 Config: 120MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 0 Config: 150MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 200MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macro for Pll step for profile with 8MHz Crystal and 200MHz target.

Definition at line 396 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ

#define IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ
Value:
{ /*Step 0 Config: 80MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macro for Pll step for profile with 8MHz Crystal and 80MHz target.

Definition at line 371 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_BASIC

#define IFXSCU_CFG_PLL_STEPS_BASIC | ( | xtalFreq,
 |  | pllFreq
 | ) | IFXSCU_CFG_PLL_STEPS_BASIC_(xtalFreq, pllFreq)

Definition at line 1343 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_BASIC_

#define IFXSCU_CFG_PLL_STEPS_BASIC_ | ( | xtalFreq,
 |  | pllFreq
 | ) | IFXSCU_CFG_PLL_STEPS_##xtalFreq##_##pllFreq

Definition at line 1342 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SPBDIV_133MHZ

#define IFXSCU_CFG_SPBDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */

Macro to configure SPBDIV at 133MHz target frequency.

Definition at line 703 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SPBDIV_160MHZ

#define IFXSCU_CFG_SPBDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */

Macro to configure SPBDIV at 160MHz target frequency.

Definition at line 708 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SPBDIV_200MHZ

#define IFXSCU_CFG_SPBDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */

Macro to configure SPBDIV at 200MHz target frequency.

Definition at line 713 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SPBDIV_240MHZ

#define IFXSCU_CFG_SPBDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */

Macro to configure SPBDIV at 240MHz target frequency.

Definition at line 718 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SPBDIV_300MHZ

#define IFXSCU_CFG_SPBDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */

Macro to configure SPBDIV at 300MHz target frequency.

Definition at line 723 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SPBDIV_80MHZ

#define IFXSCU_CFG_SPBDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ * 2) /*Max: 100MHz */

Macro to configure SPBDIV at 80MHz target frequency.

Definition at line 698 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SRIDIV_133MHZ

#define IFXSCU_CFG_SRIDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */

Macro to configure SRIDIV at 133MHz target frequency.

Definition at line 613 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SRIDIV_160MHZ

#define IFXSCU_CFG_SRIDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */

Macro to configure SRIDIV at 160MHz target frequency.

Definition at line 618 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SRIDIV_200MHZ

#define IFXSCU_CFG_SRIDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */

Macro to configure SRIDIV at 200MHz target frequency.

Definition at line 623 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SRIDIV_240MHZ

#define IFXSCU_CFG_SRIDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */

Macro to configure SRIDIV at 240MHz target frequency.

Definition at line 628 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SRIDIV_300MHZ

#define IFXSCU_CFG_SRIDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */

Macro to configure SRIDIV at 300MHz target frequency.

Definition at line 633 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SRIDIV_80MHZ

#define IFXSCU_CFG_SRIDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */

Macro to configure SRIDIV at 80MHz target frequency.

Definition at line 608 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_STMDIV_133MHZ

#define IFXSCU_CFG_STMDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */

Macro to configure STMDIV at 133MHz target frequency.

Definition at line 853 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_STMDIV_160MHZ

#define IFXSCU_CFG_STMDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */

Macro to configure STMDIV at 160MHz target frequency.

Definition at line 858 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_STMDIV_200MHZ

#define IFXSCU_CFG_STMDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */

Macro to configure STMDIV at 200MHz target frequency.

Definition at line 863 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_STMDIV_240MHZ

#define IFXSCU_CFG_STMDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */

Macro to configure STMDIV at 240MHz target frequency.

Definition at line 868 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_STMDIV_300MHZ

#define IFXSCU_CFG_STMDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */

Macro to configure STMDIV at 300MHz target frequency.

Definition at line 873 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_STMDIV_80MHZ

#define IFXSCU_CFG_STMDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */

Macro to configure STMDIV at 80MHz target frequency.

Definition at line 848 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_XTAL_FREQ

#define IFXSCU_CFG_XTAL_FREQ 20MHZ

Definition at line 1356 of file IfxScu_cfg.h.

◆ IFXSCU_EVR_OSC_FREQUENCY

#define IFXSCU_EVR_OSC_FREQUENCY (100000000.0)

Definition at line 70 of file IfxScu_cfg.h.

Referenced by IfxScuCcu_getEvrFrequency(), and IfxScuCcu_getOscFrequency().

◆ IFXSCU_PLL_FREERUNNING_FREQUENCY

#define IFXSCU_PLL_FREERUNNING_FREQUENCY (100000000.0)

Definition at line 75 of file IfxScu_cfg.h.

◆ IFXSCU_VCO_BASE_FREQUENCY

#define IFXSCU_VCO_BASE_FREQUENCY (100000000.0)

Definition at line 69 of file IfxScu_cfg.h.

Referenced by IfxScuCcu_getPllErayFrequency(), IfxScuCcu_getPllErayVcoFrequency(), IfxScuCcu_getPllFrequency(), and IfxScuCcu_getPllVcoFrequency().

Enumeration Type Documentation

◆ IfxScu_CCUCON0_CLKSEL

enum IfxScu_CCUCON0_CLKSEL

Clock selection

Enumerator
IfxScu_CCUCON0_CLKSEL_fBack
IfxScu_CCUCON0_CLKSEL_fPll

Definition at line 1385 of file IfxScu_cfg.h.

◆ IfxScu_CCUCON1_INSEL

enum IfxScu_CCUCON1_INSEL

Input selection for PLL and PLL ERAY

Enumerator
IfxScu_CCUCON1_INSEL_fOsc1
IfxScu_CCUCON1_INSEL_fOsc0

Definition at line 1392 of file IfxScu_cfg.h.

◆ IfxScu_PMCSR_REQSLP

enum IfxScu_PMCSR_REQSLP
Enumerator
IfxScu_PMCSR_REQSLP_Run
IfxScu_PMCSR_REQSLP_Idle
IfxScu_PMCSR_REQSLP_Sleep
IfxScu_PMCSR_REQSLP_Stby

Definition at line 1406 of file IfxScu_cfg.h.

◆ IfxScu_WDTCON1_IR

enum IfxScu_WDTCON1_IR

Input frequency request control

Enumerator
IfxScu_WDTCON1_IR_divBy16384
IfxScu_WDTCON1_IR_divBy256
IfxScu_WDTCON1_IR_divBy64

Definition at line 1399 of file IfxScu_cfg.h.


iLLD_TC26B: IfxScu_PinMap.c File Reference

  • _PinMap
Variables
IfxScu_PinMap.c File Reference
iLLD » SCU

SCU I/O map. More...

#include "IfxScu_PinMap.h"
Include dependency graph for IfxScu_PinMap.c:

Go to the source code of this file.

Variables

IfxScu_Dcdcsync_Out | IfxScu_DCDCSYNC_P32_2_OUT = {&MODULE_SCU, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt6}
IfxScu_Dcdcsync_Out | IfxScu_DCDCSYNC_P33_13_OUT = {&MODULE_SCU, {&MODULE_P33,13}, IfxPort_OutputIdx_alt6}
IfxScu_Emgstop_In | IfxScu_EMGSTOPA_P33_8_IN = {&MODULE_SCU, {&MODULE_P33, 8}, Ifx_RxSel_a}
IfxScu_Emgstop_In | IfxScu_EMGSTOPB_P21_2_IN = {&MODULE_SCU, {&MODULE_P21, 2}, Ifx_RxSel_b}
IfxScu_Evrwup_In | IfxScu_EVRWUPA_P14_1_IN = {&MODULE_SCU, {&MODULE_P14, 1}, Ifx_RxSel_a}
IfxScu_Evrwup_In | IfxScu_EVRWUPB_P15_1_IN = {&MODULE_SCU, {&MODULE_P15, 1}, Ifx_RxSel_b}
IfxScu_Extclk_Out | IfxScu_EXTCLK0_P23_1_OUT = {&MODULE_SCU, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt6}
IfxScu_Extclk_Out | IfxScu_EXTCLK1_P11_12_OUT = {&MODULE_SCU, {&MODULE_P11,12}, IfxPort_OutputIdx_alt6}
IfxScu_Extclk_Out | IfxScu_EXTCLK1_P32_4_OUT = {&MODULE_SCU, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt6}
IfxScu_Hwcfg_In | IfxScu_HWCFG0DCLDO_P14_6_IN = {&MODULE_SCU, {&MODULE_P14, 6}}
IfxScu_Hwcfg_In | IfxScu_HWCFG1EVR33_P14_5_IN = {&MODULE_SCU, {&MODULE_P14, 5}}
IfxScu_Hwcfg_In | IfxScu_HWCFG2EVR13_P14_2_IN = {&MODULE_SCU, {&MODULE_P14, 2}}
IfxScu_Hwcfg_In | IfxScu_HWCFG3_BMI_P14_3_IN = {&MODULE_SCU, {&MODULE_P14, 3}}
IfxScu_Hwcfg_In | IfxScu_HWCFG4_P10_5_IN = {&MODULE_SCU, {&MODULE_P10, 5}}
IfxScu_Hwcfg_In | IfxScu_HWCFG5_P10_6_IN = {&MODULE_SCU, {&MODULE_P10, 6}}
IfxScu_Hwcfg_In | IfxScu_HWCFG6_P14_4_IN = {&MODULE_SCU, {&MODULE_P14, 4}}
IfxScu_Req_In | IfxScu_REQ0_P15_4_IN = {&MODULE_SCU, 0, {&MODULE_P15, 4}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ10_P14_3_IN = {&MODULE_SCU, 1, {&MODULE_P14, 3}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ11_P20_9_IN = {&MODULE_SCU, 7, {&MODULE_P20, 9}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ12_P11_10_IN = {&MODULE_SCU, 6, {&MODULE_P11,10}, Ifx_RxSel_d}
IfxScu_Req_In | IfxScu_REQ13_P15_5_IN = {&MODULE_SCU, 4, {&MODULE_P15, 5}, Ifx_RxSel_d}
IfxScu_Req_In | IfxScu_REQ14_P02_1_IN = {&MODULE_SCU, 2, {&MODULE_P02, 1}, Ifx_RxSel_b}
IfxScu_Req_In | IfxScu_REQ15_P14_1_IN = {&MODULE_SCU, 3, {&MODULE_P14, 1}, Ifx_RxSel_b}
IfxScu_Req_In | IfxScu_REQ16_P15_1_IN = {&MODULE_SCU, 7, {&MODULE_P15, 1}, Ifx_RxSel_c}
IfxScu_Req_In | IfxScu_REQ1_P15_8_IN = {&MODULE_SCU, 5, {&MODULE_P15, 8}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ2_P10_2_IN = {&MODULE_SCU, 2, {&MODULE_P10, 2}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ3_P10_3_IN = {&MODULE_SCU, 3, {&MODULE_P10, 3}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ4_P10_7_IN = {&MODULE_SCU, 0, {&MODULE_P10, 7}, Ifx_RxSel_c}
IfxScu_Req_In | IfxScu_REQ5_P10_8_IN = {&MODULE_SCU, 1, {&MODULE_P10, 8}, Ifx_RxSel_c}
IfxScu_Req_In | IfxScu_REQ6_P02_0_IN = {&MODULE_SCU, 3, {&MODULE_P02, 0}, Ifx_RxSel_c}
IfxScu_Req_In | IfxScu_REQ7_P00_4_IN = {&MODULE_SCU, 2, {&MODULE_P00, 4}, Ifx_RxSel_c}
IfxScu_Req_In | IfxScu_REQ8_P33_7_IN = {&MODULE_SCU, 4, {&MODULE_P33, 7}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ9_P20_0_IN = {&MODULE_SCU, 6, {&MODULE_P20, 0}, Ifx_RxSel_a}
IfxScu_Wdtlck_Out | IfxScu_WDT0LCK_P20_8_OUT = {&MODULE_SCU, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt6}
IfxScu_Wdtlck_Out | IfxScu_WDT1LCK_P20_7_OUT = {&MODULE_SCU, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt6}
IfxScu_Wdtlck_Out | IfxScu_WDTSLCK_P20_9_OUT = {&MODULE_SCU, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt6}
const IfxScu_Dcdcsync_Out * | IfxScu_Dcdcsync_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
const IfxScu_Emgstop_In * | IfxScu_Emgstop_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
const IfxScu_Evrwup_In * | IfxScu_Evrwup_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS]
const IfxScu_Extclk_Out * | IfxScu_Extclk_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
const IfxScu_Hwcfg_In * | IfxScu_Hwcfg_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS]
const IfxScu_Req_In * | IfxScu_Req_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]
const IfxScu_Wdtlck_Out * | IfxScu_Wdtlck_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS]

Detailed Description

SCU I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScu_PinMap.c.

Variable Documentation

◆ IfxScu_Dcdcsync_Out_pinTable

const IfxScu_Dcdcsync_Out* IfxScu_Dcdcsync_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxScu_DCDCSYNC_P32_2_OUT,
&IfxScu_DCDCSYNC_P33_13_OUT
}
}
IfxScu_DCDCSYNC_P33_13_OUT
IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT
Definition: IfxScu_PinMap.c:46
IfxScu_DCDCSYNC_P32_2_OUT
IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT
Definition: IfxScu_PinMap.c:45

Definition at line 83 of file IfxScu_PinMap.c.

◆ IfxScu_DCDCSYNC_P32_2_OUT

IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT = {&MODULE_SCU, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt6}

Definition at line 45 of file IfxScu_PinMap.c.

◆ IfxScu_DCDCSYNC_P33_13_OUT

IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT = {&MODULE_SCU, {&MODULE_P33,13}, IfxPort_OutputIdx_alt6}

Definition at line 46 of file IfxScu_PinMap.c.

◆ IfxScu_Emgstop_In_pinTable

const IfxScu_Emgstop_In* IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxScu_EMGSTOPA_P33_8_IN,
&IfxScu_EMGSTOPB_P21_2_IN
}
}
IfxScu_EMGSTOPA_P33_8_IN
IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN
Definition: IfxScu_PinMap.c:47
IfxScu_EMGSTOPB_P21_2_IN
IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN
Definition: IfxScu_PinMap.c:48

Definition at line 90 of file IfxScu_PinMap.c.

◆ IfxScu_EMGSTOPA_P33_8_IN

IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN = {&MODULE_SCU, {&MODULE_P33, 8}, Ifx_RxSel_a}

Definition at line 47 of file IfxScu_PinMap.c.

◆ IfxScu_EMGSTOPB_P21_2_IN

IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN = {&MODULE_SCU, {&MODULE_P21, 2}, Ifx_RxSel_b}

Definition at line 48 of file IfxScu_PinMap.c.

◆ IfxScu_Evrwup_In_pinTable

const IfxScu_Evrwup_In* IfxScu_Evrwup_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxScu_EVRWUPA_P14_1_IN,
&IfxScu_EVRWUPB_P15_1_IN
}
}
IfxScu_EVRWUPB_P15_1_IN
IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN
Definition: IfxScu_PinMap.c:50
IfxScu_EVRWUPA_P14_1_IN
IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN
Definition: IfxScu_PinMap.c:49

Definition at line 97 of file IfxScu_PinMap.c.

◆ IfxScu_EVRWUPA_P14_1_IN

IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN = {&MODULE_SCU, {&MODULE_P14, 1}, Ifx_RxSel_a}

Definition at line 49 of file IfxScu_PinMap.c.

◆ IfxScu_EVRWUPB_P15_1_IN

IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN = {&MODULE_SCU, {&MODULE_P15, 1}, Ifx_RxSel_b}

Definition at line 50 of file IfxScu_PinMap.c.

◆ IfxScu_EXTCLK0_P23_1_OUT

IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT = {&MODULE_SCU, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt6}

Definition at line 51 of file IfxScu_PinMap.c.

◆ IfxScu_EXTCLK1_P11_12_OUT

IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT = {&MODULE_SCU, {&MODULE_P11,12}, IfxPort_OutputIdx_alt6}

Definition at line 52 of file IfxScu_PinMap.c.

◆ IfxScu_EXTCLK1_P32_4_OUT

IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT = {&MODULE_SCU, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt6}

Definition at line 53 of file IfxScu_PinMap.c.

◆ IfxScu_Extclk_Out_pinTable

const IfxScu_Extclk_Out* IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxScu_EXTCLK1_P11_12_OUT,
&IfxScu_EXTCLK0_P23_1_OUT,
&IfxScu_EXTCLK1_P32_4_OUT
}
}
IfxScu_EXTCLK1_P32_4_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT
Definition: IfxScu_PinMap.c:53
IfxScu_EXTCLK1_P11_12_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT
Definition: IfxScu_PinMap.c:52
IfxScu_EXTCLK0_P23_1_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT
Definition: IfxScu_PinMap.c:51

Definition at line 104 of file IfxScu_PinMap.c.

◆ IfxScu_HWCFG0DCLDO_P14_6_IN

IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN = {&MODULE_SCU, {&MODULE_P14, 6}}

Definition at line 54 of file IfxScu_PinMap.c.

◆ IfxScu_HWCFG1EVR33_P14_5_IN

IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN = {&MODULE_SCU, {&MODULE_P14, 5}}

Definition at line 55 of file IfxScu_PinMap.c.

◆ IfxScu_HWCFG2EVR13_P14_2_IN

IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN = {&MODULE_SCU, {&MODULE_P14, 2}}

Definition at line 56 of file IfxScu_PinMap.c.

◆ IfxScu_HWCFG3_BMI_P14_3_IN

IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN = {&MODULE_SCU, {&MODULE_P14, 3}}

Definition at line 57 of file IfxScu_PinMap.c.

◆ IfxScu_HWCFG4_P10_5_IN

IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN = {&MODULE_SCU, {&MODULE_P10, 5}}

Definition at line 58 of file IfxScu_PinMap.c.

◆ IfxScu_HWCFG5_P10_6_IN

IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN = {&MODULE_SCU, {&MODULE_P10, 6}}

Definition at line 59 of file IfxScu_PinMap.c.

◆ IfxScu_HWCFG6_P14_4_IN

IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN = {&MODULE_SCU, {&MODULE_P14, 4}}

Definition at line 60 of file IfxScu_PinMap.c.

◆ IfxScu_Hwcfg_In_pinTable

const IfxScu_Hwcfg_In* IfxScu_Hwcfg_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxScu_HWCFG4_P10_5_IN,
&IfxScu_HWCFG5_P10_6_IN,
&IfxScu_HWCFG2EVR13_P14_2_IN,
&IfxScu_HWCFG3_BMI_P14_3_IN,
&IfxScu_HWCFG6_P14_4_IN,
&IfxScu_HWCFG1EVR33_P14_5_IN,
&IfxScu_HWCFG0DCLDO_P14_6_IN
}
}
IfxScu_HWCFG0DCLDO_P14_6_IN
IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN
Definition: IfxScu_PinMap.c:54
IfxScu_HWCFG6_P14_4_IN
IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN
Definition: IfxScu_PinMap.c:60
IfxScu_HWCFG4_P10_5_IN
IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN
Definition: IfxScu_PinMap.c:58
IfxScu_HWCFG5_P10_6_IN
IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN
Definition: IfxScu_PinMap.c:59
IfxScu_HWCFG2EVR13_P14_2_IN
IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN
Definition: IfxScu_PinMap.c:56
IfxScu_HWCFG1EVR33_P14_5_IN
IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN
Definition: IfxScu_PinMap.c:55
IfxScu_HWCFG3_BMI_P14_3_IN
IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN
Definition: IfxScu_PinMap.c:57

Definition at line 112 of file IfxScu_PinMap.c.

◆ IfxScu_REQ0_P15_4_IN

IfxScu_Req_In IfxScu_REQ0_P15_4_IN = {&MODULE_SCU, 0, {&MODULE_P15, 4}, Ifx_RxSel_a}

Definition at line 61 of file IfxScu_PinMap.c.

◆ IfxScu_REQ10_P14_3_IN

IfxScu_Req_In IfxScu_REQ10_P14_3_IN = {&MODULE_SCU, 1, {&MODULE_P14, 3}, Ifx_RxSel_a}

Definition at line 62 of file IfxScu_PinMap.c.

◆ IfxScu_REQ11_P20_9_IN

IfxScu_Req_In IfxScu_REQ11_P20_9_IN = {&MODULE_SCU, 7, {&MODULE_P20, 9}, Ifx_RxSel_a}

Definition at line 63 of file IfxScu_PinMap.c.

◆ IfxScu_REQ12_P11_10_IN

IfxScu_Req_In IfxScu_REQ12_P11_10_IN = {&MODULE_SCU, 6, {&MODULE_P11,10}, Ifx_RxSel_d}

Definition at line 64 of file IfxScu_PinMap.c.

◆ IfxScu_REQ13_P15_5_IN

IfxScu_Req_In IfxScu_REQ13_P15_5_IN = {&MODULE_SCU, 4, {&MODULE_P15, 5}, Ifx_RxSel_d}

Definition at line 65 of file IfxScu_PinMap.c.

◆ IfxScu_REQ14_P02_1_IN

IfxScu_Req_In IfxScu_REQ14_P02_1_IN = {&MODULE_SCU, 2, {&MODULE_P02, 1}, Ifx_RxSel_b}

Definition at line 66 of file IfxScu_PinMap.c.

◆ IfxScu_REQ15_P14_1_IN

IfxScu_Req_In IfxScu_REQ15_P14_1_IN = {&MODULE_SCU, 3, {&MODULE_P14, 1}, Ifx_RxSel_b}

Definition at line 67 of file IfxScu_PinMap.c.

◆ IfxScu_REQ16_P15_1_IN

IfxScu_Req_In IfxScu_REQ16_P15_1_IN = {&MODULE_SCU, 7, {&MODULE_P15, 1}, Ifx_RxSel_c}

Definition at line 68 of file IfxScu_PinMap.c.

◆ IfxScu_REQ1_P15_8_IN

IfxScu_Req_In IfxScu_REQ1_P15_8_IN = {&MODULE_SCU, 5, {&MODULE_P15, 8}, Ifx_RxSel_a}

Definition at line 69 of file IfxScu_PinMap.c.

◆ IfxScu_REQ2_P10_2_IN

IfxScu_Req_In IfxScu_REQ2_P10_2_IN = {&MODULE_SCU, 2, {&MODULE_P10, 2}, Ifx_RxSel_a}

Definition at line 70 of file IfxScu_PinMap.c.

◆ IfxScu_REQ3_P10_3_IN

IfxScu_Req_In IfxScu_REQ3_P10_3_IN = {&MODULE_SCU, 3, {&MODULE_P10, 3}, Ifx_RxSel_a}

Definition at line 71 of file IfxScu_PinMap.c.

◆ IfxScu_REQ4_P10_7_IN

IfxScu_Req_In IfxScu_REQ4_P10_7_IN = {&MODULE_SCU, 0, {&MODULE_P10, 7}, Ifx_RxSel_c}

Definition at line 72 of file IfxScu_PinMap.c.

◆ IfxScu_REQ5_P10_8_IN

IfxScu_Req_In IfxScu_REQ5_P10_8_IN = {&MODULE_SCU, 1, {&MODULE_P10, 8}, Ifx_RxSel_c}

Definition at line 73 of file IfxScu_PinMap.c.

◆ IfxScu_REQ6_P02_0_IN

IfxScu_Req_In IfxScu_REQ6_P02_0_IN = {&MODULE_SCU, 3, {&MODULE_P02, 0}, Ifx_RxSel_c}

Definition at line 74 of file IfxScu_PinMap.c.

◆ IfxScu_REQ7_P00_4_IN

IfxScu_Req_In IfxScu_REQ7_P00_4_IN = {&MODULE_SCU, 2, {&MODULE_P00, 4}, Ifx_RxSel_c}

Definition at line 75 of file IfxScu_PinMap.c.

◆ IfxScu_REQ8_P33_7_IN

IfxScu_Req_In IfxScu_REQ8_P33_7_IN = {&MODULE_SCU, 4, {&MODULE_P33, 7}, Ifx_RxSel_a}

Definition at line 76 of file IfxScu_PinMap.c.

◆ IfxScu_REQ9_P20_0_IN

IfxScu_Req_In IfxScu_REQ9_P20_0_IN = {&MODULE_SCU, 6, {&MODULE_P20, 0}, Ifx_RxSel_a}

Definition at line 77 of file IfxScu_PinMap.c.

◆ IfxScu_Req_In_pinTable

const IfxScu_Req_In* IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]

Definition at line 124 of file IfxScu_PinMap.c.

◆ IfxScu_WDT0LCK_P20_8_OUT

IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT = {&MODULE_SCU, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt6}

Definition at line 78 of file IfxScu_PinMap.c.

◆ IfxScu_WDT1LCK_P20_7_OUT

IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT = {&MODULE_SCU, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt6}

Definition at line 79 of file IfxScu_PinMap.c.

◆ IfxScu_Wdtlck_Out_pinTable

const IfxScu_Wdtlck_Out* IfxScu_Wdtlck_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxScu_WDT1LCK_P20_7_OUT,
&IfxScu_WDT0LCK_P20_8_OUT,
&IfxScu_WDTSLCK_P20_9_OUT
}
}
IfxScu_WDT0LCK_P20_8_OUT
IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT
Definition: IfxScu_PinMap.c:78
IfxScu_WDTSLCK_P20_9_OUT
IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT
Definition: IfxScu_PinMap.c:80
IfxScu_WDT1LCK_P20_7_OUT
IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT
Definition: IfxScu_PinMap.c:79

Definition at line 177 of file IfxScu_PinMap.c.

◆ IfxScu_WDTSLCK_P20_9_OUT

IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT = {&MODULE_SCU, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt6}

Definition at line 80 of file IfxScu_PinMap.c.


iLLD_TC26B: IfxScu_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxScu_PinMap.h File Reference
iLLD » SCU

SCU I/O map. More...

#include <IfxScu_reg.h>
#include <_Impl/IfxScu_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxScu_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxScu_Evrwup_In
EVR Wakeup pin mapping structure. More...
struct | IfxScu_Hwcfg_In
Hardware Configuration pin mapping structure. More...
struct | IfxScu_Req_In
External Request pin mapping structure. More...
struct | IfxScu_Dcdcsync_Out
DCDC Sync pin mapping structure. More...
struct | IfxScu_Emgstop_In
Emergency Stop pin mapping structure. More...
struct | IfxScu_Wdtlck_Out
Watchdog Timer Lock pin mapping structure. More...
struct | IfxScu_Extclk_Out
External Clock pin mapping structure. More...

Macros

#define | IFXSCU_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSCU_PINMAP_NUM_REQUESTS 8
#define | IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS 2
#define | IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS 2
#define | IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS 2
#define | IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS 3
#define | IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS 7
#define | IFXSCU_PINMAP_REQ_IN_NUM_ITEMS 4
#define | IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT
SCU_DCDCSYNC: SCU output. More...
IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT
SCU_DCDCSYNC: SCU output. More...
IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN
SCU_EMGSTOPA: SCU input. More...
IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN
SCU_EMGSTOPB: SCU input. More...
IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN
SCU_EVRWUPA: SCU input. More...
IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN
SCU_EVRWUPB: SCU input. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT
SCU_EXTCLK0: SCU output. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT
SCU_EXTCLK1: SCU output. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT
SCU_EXTCLK1: SCU output. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN
SCU_HWCFG0DCLDO: SCU input If EVR13 active, latched at cold power on reset to decide between LDO and SMPS mode. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN
SCU_HWCFG1EVR33: SCU input Latched at cold power on reset to decide EVR33 activation. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN
SCU_HWCFG2EVR13: SCU input Latched at cold power on reset to decide EVR13 activation. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN
SCU_HWCFG3_BMI: SCU input. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN
SCU_HWCFG4: SCU input. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN
SCU_HWCFG5: SCU input. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN
SCU_HWCFG6: SCU input Latched at cold power on reset to decide default pad reset state (PU or High-Z). More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ0_P15_4_IN
SCU_REQ0: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ10_P14_3_IN
SCU_REQ10: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ11_P20_9_IN
SCU_REQ11: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ12_P11_10_IN
SCU_REQ12: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ13_P15_5_IN
SCU_REQ13: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ14_P02_1_IN
SCU_REQ14: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ15_P14_1_IN
SCU_REQ15: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ16_P15_1_IN
SCU_REQ16: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ1_P15_8_IN
SCU_REQ1: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ2_P10_2_IN
SCU_REQ2: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ3_P10_3_IN
SCU_REQ3: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ4_P10_7_IN
SCU_REQ4: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ5_P10_8_IN
SCU_REQ5: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ6_P02_0_IN
SCU_REQ6: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ7_P00_4_IN
SCU_REQ7: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ8_P33_7_IN
SCU_REQ8: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ9_P20_0_IN
SCU_REQ9: SCU input. More...
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT
SCU_WDT0LCK: SCU output. More...
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT
SCU_WDT1LCK: SCU output. More...
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT
SCU_WDTSLCK: SCU output. More...
IFX_EXTERN const IfxScu_Dcdcsync_Out * | IfxScu_Dcdcsync_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
IfxScu_Dcdcsync_Out table. More...
IFX_EXTERN const IfxScu_Emgstop_In * | IfxScu_Emgstop_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
IfxScu_Emgstop_In table. More...
IFX_EXTERN const IfxScu_Evrwup_In * | IfxScu_Evrwup_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS]
IfxScu_Evrwup_In table. More...
IFX_EXTERN const IfxScu_Extclk_Out * | IfxScu_Extclk_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
IfxScu_Extclk_Out table. More...
IFX_EXTERN const IfxScu_Hwcfg_In * | IfxScu_Hwcfg_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS]
IfxScu_Hwcfg_In table. More...
IFX_EXTERN const IfxScu_Req_In * | IfxScu_Req_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]
IfxScu_Req_In table. More...
IFX_EXTERN const IfxScu_Wdtlck_Out * | IfxScu_Wdtlck_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS]
IfxScu_Wdtlck_Out table. More...

Detailed Description

SCU I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScu_PinMap.h.


iLLD_TC26B: IfxScuCcu.h File Reference

  • Scu
  • Std
Data Structures | Macros | Typedefs | Enumerations | Functions | Variables
IfxScuCcu.h File Reference
iLLD » SCU

SCU basic functionality. More...

#include "_Impl/IfxScu_cfg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu.h"
#include "IfxStm_reg.h"
#include "IfxScu_reg.h"
#include "IfxFlash_reg.h"
#include "_PinMap/IfxScu_PinMap.h"
Include dependency graph for IfxScuCcu.h:

Go to the source code of this file.

Data Structures

struct | IfxScuCcu_CcuconRegConfig
Configuration structure type for CCUCON registers. More...
struct | IfxScuCcu_InitialStepConfig
Configuration structure type for the Pll initial step. This structure must be used to configure the P, N and K2 dividers for initial step. More...
struct | IfxScuCcu_PllStepsConfig
Configuration structure type for the Pll Steps for current jump control. More...
struct | IfxScuCcu_ClockDistributionConfig
Configuration structure type for all the CCUCON registers to configure clock distribution. More...
struct | IfxScuCcu_FlashWaitstateConfig
Configuration structure type for the Flash waitstate configuration. More...
struct | IfxScuCcu_SysPllConfig
Configuration structure type for the System Pll step. This structure must be used to configure the P, N and K1 dividers . More...
struct | IfxScuCcu_Config
Configuration structure SCU module. More...
struct | IfxScuCcu_ErayPllConfig
Configuration structure for E-ray PLL. More...

Macros

#define IFXSCUCCU_OSC_STABLECHK_TIME (640)
Oscillator stability check timeout count. More...

Typedefs

typedef void(* IfxScuCcu_PllStepsFunctionHook) (void)
Function pointer type for the hooks. More...

Enumerations

enum IfxScuCcu_K1divider {
IfxScuCcu_K1divider_1 = 0,
IfxScuCcu_K1divider_2,
IfxScuCcu_K1divider_3,
IfxScuCcu_K1divider_4,
IfxScuCcu_K1divider_5,
IfxScuCcu_K1divider_6,
IfxScuCcu_K1divider_7,
IfxScuCcu_K1divider_8,
IfxScuCcu_K1divider_9,
IfxScuCcu_K1divider_10,
IfxScuCcu_K1divider_11,
IfxScuCcu_K1divider_12,
IfxScuCcu_K1divider_13,
IfxScuCcu_K1divider_14,
IfxScuCcu_K1divider_15,
IfxScuCcu_K1divider_16,
IfxScuCcu_K1divider_17,
IfxScuCcu_K1divider_18,
IfxScuCcu_K1divider_19,
IfxScuCcu_K1divider_20,
IfxScuCcu_K1divider_21,
IfxScuCcu_K1divider_22,
IfxScuCcu_K1divider_23,
IfxScuCcu_K1divider_24,
IfxScuCcu_K1divider_25,
IfxScuCcu_K1divider_26,
IfxScuCcu_K1divider_27,
IfxScuCcu_K1divider_28,
IfxScuCcu_K1divider_29,
IfxScuCcu_K1divider_30,
IfxScuCcu_K1divider_31,
IfxScuCcu_K1divider_32,
IfxScuCcu_K1divider_33,
IfxScuCcu_K1divider_34,
IfxScuCcu_K1divider_35,
IfxScuCcu_K1divider_36,
IfxScuCcu_K1divider_37,
IfxScuCcu_K1divider_38,
IfxScuCcu_K1divider_39,
IfxScuCcu_K1divider_40,
IfxScuCcu_K1divider_41,
IfxScuCcu_K1divider_42,
IfxScuCcu_K1divider_43,
IfxScuCcu_K1divider_44,
IfxScuCcu_K1divider_45,
IfxScuCcu_K1divider_46,
IfxScuCcu_K1divider_47,
IfxScuCcu_K1divider_48,
IfxScuCcu_K1divider_49,
IfxScuCcu_K1divider_50,
IfxScuCcu_K1divider_51,
IfxScuCcu_K1divider_52,
IfxScuCcu_K1divider_53,
IfxScuCcu_K1divider_54,
IfxScuCcu_K1divider_55,
IfxScuCcu_K1divider_56,
IfxScuCcu_K1divider_57,
IfxScuCcu_K1divider_58,
IfxScuCcu_K1divider_59,
IfxScuCcu_K1divider_60,
IfxScuCcu_K1divider_61,
IfxScuCcu_K1divider_62,
IfxScuCcu_K1divider_63,
IfxScuCcu_K1divider_64,
IfxScuCcu_K1divider_65,
IfxScuCcu_K1divider_66,
IfxScuCcu_K1divider_67,
IfxScuCcu_K1divider_68,
IfxScuCcu_K1divider_69,
IfxScuCcu_K1divider_70,
IfxScuCcu_K1divider_71,
IfxScuCcu_K1divider_72,
IfxScuCcu_K1divider_73,
IfxScuCcu_K1divider_74,
IfxScuCcu_K1divider_75,
IfxScuCcu_K1divider_76,
IfxScuCcu_K1divider_77,
IfxScuCcu_K1divider_78,
IfxScuCcu_K1divider_79,
IfxScuCcu_K1divider_80,
IfxScuCcu_K1divider_81,
IfxScuCcu_K1divider_82,
IfxScuCcu_K1divider_83,
IfxScuCcu_K1divider_84,
IfxScuCcu_K1divider_85,
IfxScuCcu_K1divider_86,
IfxScuCcu_K1divider_87,
IfxScuCcu_K1divider_88,
IfxScuCcu_K1divider_89,
IfxScuCcu_K1divider_90,
IfxScuCcu_K1divider_91,
IfxScuCcu_K1divider_92,
IfxScuCcu_K1divider_93,
IfxScuCcu_K1divider_94,
IfxScuCcu_K1divider_95,
IfxScuCcu_K1divider_96,
IfxScuCcu_K1divider_97,
IfxScuCcu_K1divider_98,
IfxScuCcu_K1divider_99,
IfxScuCcu_K1divider_100,
IfxScuCcu_K1divider_101,
IfxScuCcu_K1divider_102,
IfxScuCcu_K1divider_103,
IfxScuCcu_K1divider_104,
IfxScuCcu_K1divider_105,
IfxScuCcu_K1divider_106,
IfxScuCcu_K1divider_107,
IfxScuCcu_K1divider_108,
IfxScuCcu_K1divider_109,
IfxScuCcu_K1divider_110,
IfxScuCcu_K1divider_111,
IfxScuCcu_K1divider_112,
IfxScuCcu_K1divider_113,
IfxScuCcu_K1divider_114,
IfxScuCcu_K1divider_115,
IfxScuCcu_K1divider_116,
IfxScuCcu_K1divider_117,
IfxScuCcu_K1divider_118,
IfxScuCcu_K1divider_119,
IfxScuCcu_K1divider_120,
IfxScuCcu_K1divider_121,
IfxScuCcu_K1divider_122,
IfxScuCcu_K1divider_123,
IfxScuCcu_K1divider_124,
IfxScuCcu_K1divider_125,
IfxScuCcu_K1divider_126,
IfxScuCcu_K1divider_127,
IfxScuCcu_K1divider_128
}
MODULE_SCU.PLLCON1.B.K1DIV, specifies the K1-Divider. More...
enum IfxScuCcu_K2divider {
IfxScuCcu_K2divider_1 = 0,
IfxScuCcu_K2divider_2,
IfxScuCcu_K2divider_3,
IfxScuCcu_K2divider_4,
IfxScuCcu_K2divider_5,
IfxScuCcu_K2divider_6,
IfxScuCcu_K2divider_7,
IfxScuCcu_K2divider_8,
IfxScuCcu_K2divider_9,
IfxScuCcu_K2divider_10,
IfxScuCcu_K2divider_11,
IfxScuCcu_K2divider_12,
IfxScuCcu_K2divider_13,
IfxScuCcu_K2divider_14,
IfxScuCcu_K2divider_15,
IfxScuCcu_K2divider_16,
IfxScuCcu_K2divider_17,
IfxScuCcu_K2divider_18,
IfxScuCcu_K2divider_19,
IfxScuCcu_K2divider_20,
IfxScuCcu_K2divider_21,
IfxScuCcu_K2divider_22,
IfxScuCcu_K2divider_23,
IfxScuCcu_K2divider_24,
IfxScuCcu_K2divider_25,
IfxScuCcu_K2divider_26,
IfxScuCcu_K2divider_27,
IfxScuCcu_K2divider_28,
IfxScuCcu_K2divider_29,
IfxScuCcu_K2divider_30,
IfxScuCcu_K2divider_31,
IfxScuCcu_K2divider_32,
IfxScuCcu_K2divider_33,
IfxScuCcu_K2divider_34,
IfxScuCcu_K2divider_35,
IfxScuCcu_K2divider_36,
IfxScuCcu_K2divider_37,
IfxScuCcu_K2divider_38,
IfxScuCcu_K2divider_39,
IfxScuCcu_K2divider_40,
IfxScuCcu_K2divider_41,
IfxScuCcu_K2divider_42,
IfxScuCcu_K2divider_43,
IfxScuCcu_K2divider_44,
IfxScuCcu_K2divider_45,
IfxScuCcu_K2divider_46,
IfxScuCcu_K2divider_47,
IfxScuCcu_K2divider_48,
IfxScuCcu_K2divider_49,
IfxScuCcu_K2divider_50,
IfxScuCcu_K2divider_51,
IfxScuCcu_K2divider_52,
IfxScuCcu_K2divider_53,
IfxScuCcu_K2divider_54,
IfxScuCcu_K2divider_55,
IfxScuCcu_K2divider_56,
IfxScuCcu_K2divider_57,
IfxScuCcu_K2divider_58,
IfxScuCcu_K2divider_59,
IfxScuCcu_K2divider_60,
IfxScuCcu_K2divider_61,
IfxScuCcu_K2divider_62,
IfxScuCcu_K2divider_63,
IfxScuCcu_K2divider_64,
IfxScuCcu_K2divider_65,
IfxScuCcu_K2divider_66,
IfxScuCcu_K2divider_67,
IfxScuCcu_K2divider_68,
IfxScuCcu_K2divider_69,
IfxScuCcu_K2divider_70,
IfxScuCcu_K2divider_71,
IfxScuCcu_K2divider_72,
IfxScuCcu_K2divider_73,
IfxScuCcu_K2divider_74,
IfxScuCcu_K2divider_75,
IfxScuCcu_K2divider_76,
IfxScuCcu_K2divider_77,
IfxScuCcu_K2divider_78,
IfxScuCcu_K2divider_79,
IfxScuCcu_K2divider_80,
IfxScuCcu_K2divider_81,
IfxScuCcu_K2divider_82,
IfxScuCcu_K2divider_83,
IfxScuCcu_K2divider_84,
IfxScuCcu_K2divider_85,
IfxScuCcu_K2divider_86,
IfxScuCcu_K2divider_87,
IfxScuCcu_K2divider_88,
IfxScuCcu_K2divider_89,
IfxScuCcu_K2divider_90,
IfxScuCcu_K2divider_91,
IfxScuCcu_K2divider_92,
IfxScuCcu_K2divider_93,
IfxScuCcu_K2divider_94,
IfxScuCcu_K2divider_95,
IfxScuCcu_K2divider_96,
IfxScuCcu_K2divider_97,
IfxScuCcu_K2divider_98,
IfxScuCcu_K2divider_99,
IfxScuCcu_K2divider_100,
IfxScuCcu_K2divider_101,
IfxScuCcu_K2divider_102,
IfxScuCcu_K2divider_103,
IfxScuCcu_K2divider_104,
IfxScuCcu_K2divider_105,
IfxScuCcu_K2divider_106,
IfxScuCcu_K2divider_107,
IfxScuCcu_K2divider_108,
IfxScuCcu_K2divider_109,
IfxScuCcu_K2divider_110,
IfxScuCcu_K2divider_111,
IfxScuCcu_K2divider_112,
IfxScuCcu_K2divider_113,
IfxScuCcu_K2divider_114,
IfxScuCcu_K2divider_115,
IfxScuCcu_K2divider_116,
IfxScuCcu_K2divider_117,
IfxScuCcu_K2divider_118,
IfxScuCcu_K2divider_119,
IfxScuCcu_K2divider_120,
IfxScuCcu_K2divider_121,
IfxScuCcu_K2divider_122,
IfxScuCcu_K2divider_123,
IfxScuCcu_K2divider_124,
IfxScuCcu_K2divider_125,
IfxScuCcu_K2divider_126,
IfxScuCcu_K2divider_127,
IfxScuCcu_K2divider_128
}
MODULE_SCU.PLLCON1.B.K2DIV, specifies the K2-Divider. More...
enum IfxScuCcu_K3divider {
IfxScuCcu_K3divider_1 = 0,
IfxScuCcu_K3divider_2,
IfxScuCcu_K3divider_3,
IfxScuCcu_K3divider_4,
IfxScuCcu_K3divider_5,
IfxScuCcu_K3divider_6,
IfxScuCcu_K3divider_7,
IfxScuCcu_K3divider_8,
IfxScuCcu_K3divider_9,
IfxScuCcu_K3divider_10,
IfxScuCcu_K3divider_11,
IfxScuCcu_K3divider_12,
IfxScuCcu_K3divider_13,
IfxScuCcu_K3divider_14,
IfxScuCcu_K3divider_15,
IfxScuCcu_K3divider_16,
IfxScuCcu_K3divider_17,
IfxScuCcu_K3divider_18,
IfxScuCcu_K3divider_19,
IfxScuCcu_K3divider_20,
IfxScuCcu_K3divider_21,
IfxScuCcu_K3divider_22,
IfxScuCcu_K3divider_23,
IfxScuCcu_K3divider_24,
IfxScuCcu_K3divider_25,
IfxScuCcu_K3divider_26,
IfxScuCcu_K3divider_27,
IfxScuCcu_K3divider_28,
IfxScuCcu_K3divider_29,
IfxScuCcu_K3divider_30,
IfxScuCcu_K3divider_31,
IfxScuCcu_K3divider_32,
IfxScuCcu_K3divider_33,
IfxScuCcu_K3divider_34,
IfxScuCcu_K3divider_35,
IfxScuCcu_K3divider_36,
IfxScuCcu_K3divider_37,
IfxScuCcu_K3divider_38,
IfxScuCcu_K3divider_39,
IfxScuCcu_K3divider_40,
IfxScuCcu_K3divider_41,
IfxScuCcu_K3divider_42,
IfxScuCcu_K3divider_43,
IfxScuCcu_K3divider_44,
IfxScuCcu_K3divider_45,
IfxScuCcu_K3divider_46,
IfxScuCcu_K3divider_47,
IfxScuCcu_K3divider_48,
IfxScuCcu_K3divider_49,
IfxScuCcu_K3divider_50,
IfxScuCcu_K3divider_51,
IfxScuCcu_K3divider_52,
IfxScuCcu_K3divider_53,
IfxScuCcu_K3divider_54,
IfxScuCcu_K3divider_55,
IfxScuCcu_K3divider_56,
IfxScuCcu_K3divider_57,
IfxScuCcu_K3divider_58,
IfxScuCcu_K3divider_59,
IfxScuCcu_K3divider_60,
IfxScuCcu_K3divider_61,
IfxScuCcu_K3divider_62,
IfxScuCcu_K3divider_63,
IfxScuCcu_K3divider_64,
IfxScuCcu_K3divider_65,
IfxScuCcu_K3divider_66,
IfxScuCcu_K3divider_67,
IfxScuCcu_K3divider_68,
IfxScuCcu_K3divider_69,
IfxScuCcu_K3divider_70,
IfxScuCcu_K3divider_71,
IfxScuCcu_K3divider_72,
IfxScuCcu_K3divider_73,
IfxScuCcu_K3divider_74,
IfxScuCcu_K3divider_75,
IfxScuCcu_K3divider_76,
IfxScuCcu_K3divider_77,
IfxScuCcu_K3divider_78,
IfxScuCcu_K3divider_79,
IfxScuCcu_K3divider_80,
IfxScuCcu_K3divider_81,
IfxScuCcu_K3divider_82,
IfxScuCcu_K3divider_83,
IfxScuCcu_K3divider_84,
IfxScuCcu_K3divider_85,
IfxScuCcu_K3divider_86,
IfxScuCcu_K3divider_87,
IfxScuCcu_K3divider_88,
IfxScuCcu_K3divider_89,
IfxScuCcu_K3divider_90,
IfxScuCcu_K3divider_91,
IfxScuCcu_K3divider_92,
IfxScuCcu_K3divider_93,
IfxScuCcu_K3divider_94,
IfxScuCcu_K3divider_95,
IfxScuCcu_K3divider_96,
IfxScuCcu_K3divider_97,
IfxScuCcu_K3divider_98,
IfxScuCcu_K3divider_99,
IfxScuCcu_K3divider_100,
IfxScuCcu_K3divider_101,
IfxScuCcu_K3divider_102,
IfxScuCcu_K3divider_103,
IfxScuCcu_K3divider_104,
IfxScuCcu_K3divider_105,
IfxScuCcu_K3divider_106,
IfxScuCcu_K3divider_107,
IfxScuCcu_K3divider_108,
IfxScuCcu_K3divider_109,
IfxScuCcu_K3divider_110,
IfxScuCcu_K3divider_111,
IfxScuCcu_K3divider_112,
IfxScuCcu_K3divider_113,
IfxScuCcu_K3divider_114,
IfxScuCcu_K3divider_115,
IfxScuCcu_K3divider_116,
IfxScuCcu_K3divider_117,
IfxScuCcu_K3divider_118,
IfxScuCcu_K3divider_119,
IfxScuCcu_K3divider_120,
IfxScuCcu_K3divider_121,
IfxScuCcu_K3divider_122,
IfxScuCcu_K3divider_123,
IfxScuCcu_K3divider_124,
IfxScuCcu_K3divider_125,
IfxScuCcu_K3divider_126,
IfxScuCcu_K3divider_127,
IfxScuCcu_K3divider_128
}
MODULE_SCU.PLLCON1.B.K3DIV, specifies the K3-Divider. More...
enum IfxScuCcu_Ndivider {
IfxScuCcu_Ndivider_1 = 0,
IfxScuCcu_Ndivider_2,
IfxScuCcu_Ndivider_3,
IfxScuCcu_Ndivider_4,
IfxScuCcu_Ndivider_5,
IfxScuCcu_Ndivider_6,
IfxScuCcu_Ndivider_7,
IfxScuCcu_Ndivider_8,
IfxScuCcu_Ndivider_9,
IfxScuCcu_Ndivider_10,
IfxScuCcu_Ndivider_11,
IfxScuCcu_Ndivider_12,
IfxScuCcu_Ndivider_13,
IfxScuCcu_Ndivider_14,
IfxScuCcu_Ndivider_15,
IfxScuCcu_Ndivider_16,
IfxScuCcu_Ndivider_17,
IfxScuCcu_Ndivider_18,
IfxScuCcu_Ndivider_19,
IfxScuCcu_Ndivider_20,
IfxScuCcu_Ndivider_21,
IfxScuCcu_Ndivider_22,
IfxScuCcu_Ndivider_23,
IfxScuCcu_Ndivider_24,
IfxScuCcu_Ndivider_25,
IfxScuCcu_Ndivider_26,
IfxScuCcu_Ndivider_27,
IfxScuCcu_Ndivider_28,
IfxScuCcu_Ndivider_29,
IfxScuCcu_Ndivider_30,
IfxScuCcu_Ndivider_31,
IfxScuCcu_Ndivider_32,
IfxScuCcu_Ndivider_33,
IfxScuCcu_Ndivider_34,
IfxScuCcu_Ndivider_35,
IfxScuCcu_Ndivider_36,
IfxScuCcu_Ndivider_37,
IfxScuCcu_Ndivider_38,
IfxScuCcu_Ndivider_39,
IfxScuCcu_Ndivider_40,
IfxScuCcu_Ndivider_41,
IfxScuCcu_Ndivider_42,
IfxScuCcu_Ndivider_43,
IfxScuCcu_Ndivider_44,
IfxScuCcu_Ndivider_45,
IfxScuCcu_Ndivider_46,
IfxScuCcu_Ndivider_47,
IfxScuCcu_Ndivider_48,
IfxScuCcu_Ndivider_49,
IfxScuCcu_Ndivider_50,
IfxScuCcu_Ndivider_51,
IfxScuCcu_Ndivider_52,
IfxScuCcu_Ndivider_53,
IfxScuCcu_Ndivider_54,
IfxScuCcu_Ndivider_55,
IfxScuCcu_Ndivider_56,
IfxScuCcu_Ndivider_57,
IfxScuCcu_Ndivider_58,
IfxScuCcu_Ndivider_59,
IfxScuCcu_Ndivider_60,
IfxScuCcu_Ndivider_61,
IfxScuCcu_Ndivider_62,
IfxScuCcu_Ndivider_63,
IfxScuCcu_Ndivider_64,
IfxScuCcu_Ndivider_65,
IfxScuCcu_Ndivider_66,
IfxScuCcu_Ndivider_67,
IfxScuCcu_Ndivider_68,
IfxScuCcu_Ndivider_69,
IfxScuCcu_Ndivider_70,
IfxScuCcu_Ndivider_71,
IfxScuCcu_Ndivider_72,
IfxScuCcu_Ndivider_73,
IfxScuCcu_Ndivider_74,
IfxScuCcu_Ndivider_75,
IfxScuCcu_Ndivider_76,
IfxScuCcu_Ndivider_77,
IfxScuCcu_Ndivider_78,
IfxScuCcu_Ndivider_79,
IfxScuCcu_Ndivider_80,
IfxScuCcu_Ndivider_81,
IfxScuCcu_Ndivider_82,
IfxScuCcu_Ndivider_83,
IfxScuCcu_Ndivider_84,
IfxScuCcu_Ndivider_85,
IfxScuCcu_Ndivider_86,
IfxScuCcu_Ndivider_87,
IfxScuCcu_Ndivider_88,
IfxScuCcu_Ndivider_89,
IfxScuCcu_Ndivider_90,
IfxScuCcu_Ndivider_91,
IfxScuCcu_Ndivider_92,
IfxScuCcu_Ndivider_93,
IfxScuCcu_Ndivider_94,
IfxScuCcu_Ndivider_95,
IfxScuCcu_Ndivider_96,
IfxScuCcu_Ndivider_97,
IfxScuCcu_Ndivider_98,
IfxScuCcu_Ndivider_99,
IfxScuCcu_Ndivider_100,
IfxScuCcu_Ndivider_101,
IfxScuCcu_Ndivider_102,
IfxScuCcu_Ndivider_103,
IfxScuCcu_Ndivider_104,
IfxScuCcu_Ndivider_105,
IfxScuCcu_Ndivider_106,
IfxScuCcu_Ndivider_107,
IfxScuCcu_Ndivider_108,
IfxScuCcu_Ndivider_109,
IfxScuCcu_Ndivider_110,
IfxScuCcu_Ndivider_111,
IfxScuCcu_Ndivider_112,
IfxScuCcu_Ndivider_113,
IfxScuCcu_Ndivider_114,
IfxScuCcu_Ndivider_115,
IfxScuCcu_Ndivider_116,
IfxScuCcu_Ndivider_117,
IfxScuCcu_Ndivider_118,
IfxScuCcu_Ndivider_119,
IfxScuCcu_Ndivider_120,
IfxScuCcu_Ndivider_121,
IfxScuCcu_Ndivider_122,
IfxScuCcu_Ndivider_123,
IfxScuCcu_Ndivider_124,
IfxScuCcu_Ndivider_125,
IfxScuCcu_Ndivider_126,
IfxScuCcu_Ndivider_127,
IfxScuCcu_Ndivider_128
}
MODULE_SCU.PLLCON0.B.NDIV, specifies the N-Divider. More...
enum IfxScuCcu_Pdivider {
IfxScuCcu_Pdivider_1 = 0,
IfxScuCcu_Pdivider_2,
IfxScuCcu_Pdivider_3,
IfxScuCcu_Pdivider_4,
IfxScuCcu_Pdivider_5,
IfxScuCcu_Pdivider_6,
IfxScuCcu_Pdivider_7,
IfxScuCcu_Pdivider_8,
IfxScuCcu_Pdivider_9,
IfxScuCcu_Pdivider_10,
IfxScuCcu_Pdivider_11,
IfxScuCcu_Pdivider_12,
IfxScuCcu_Pdivider_13,
IfxScuCcu_Pdivider_14,
IfxScuCcu_Pdivider_15,
IfxScuCcu_Pdivider_16
}
MODULE_SCU.PLLCON0.B.PDIV, specifies the P-Divider. More...

Functions

IFX_INLINE float32 | IfxScuCcu_getEvrFrequency (void)
API to get EVR Oscillator frequency. This API returns the constant which is specific to the ScuCcu of the controller. More...
IFX_INLINE float32 | IfxScuCcu_getPll2ErayFrequency (void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2ERAY frequency based on the K3 divider value in PLLERAYCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock. More...
IFX_INLINE float32 | IfxScuCcu_getPll2Frequency (void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2 frequency based on the K3 divider value in PLLCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock. More...
IFX_INLINE IfxScu_CCUCON0_CLKSEL | IfxScuCcu_getSourceSelection (void)
Returns the clock source selection. More...
IFX_INLINE float32 | IfxScuCcu_getStmFrequency (void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_INLINE float32 | IfxScuCcu_getCanFrequency (void)
API to get CAN divider frequency. This API returns the fCAN frequency based on the divider value in CCUCON register and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_getBaud1Frequency (void)
API to get BAUD1 divider frequency. This API returns the based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getBaud2Frequency (void)
API to get BAUD2 divider frequency. This API returns the Baud2 frequency based on the divider value in CCUCON register and the fMAX. More...
IFX_EXTERN float32 | IfxScuCcu_getBbbFrequency (void)
API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getCpuFrequency (const IfxCpu_ResourceCpu cpu)
This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequency. More...
IFX_EXTERN float32 | IfxScuCcu_getFsi2Frequency (void)
API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getFsiFrequency (void)
API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getMaxFrequency (void)
API to get FMAX divider frequency. This API returns the fMax frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getModuleFrequency (void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
IFX_EXTERN float32 | IfxScuCcu_getOsc0Frequency (void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getOscFrequency (void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getPllErayFrequency (void)
API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getPllErayVcoFrequency (void)
API to get actual ERAY PLL Voltage Controlled Oscillator frequency. This API returns the based on the divider values in PLLERAYCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getPllFrequency (void)
API to get actual PLL output frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getPllVcoFrequency (void)
API to get actual PLL Voltage Controlled Oscillator frequency. This API returns the based on the divider values in PLLCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getSourceFrequency (void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
IFX_EXTERN float32 | IfxScuCcu_getSpbFrequency (void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider mode and/or SPBDIV divider value in CCUCON registers. More...
IFX_EXTERN float32 | IfxScuCcu_getSriFrequency (void)
API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in CCUCON registers and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_setCpuFrequency (IfxCpu_ResourceCpu cpu, float32 cpuFreq)
API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers. The actual frequency is always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setPll2ErayFrequency (float32 pll2ErayFreq)
API to configure PLL2ERAY (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setPll2Frequency (float32 pll2Freq)
API to configure PLL2 (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setSpbFrequency (float32 spbFreq)
API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setSriFrequency (float32 sriFreq)
API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN boolean | IfxScuCcu_calculateSysPllDividers (IfxScuCcu_Config *cfg, uint32 fPll)
The api calculates the system PLL divider values P, N, K based on given xtal frequency and PLL frequency. More...
IFX_EXTERN boolean | IfxScuCcu_init (const IfxScuCcu_Config *cfg)
API to initialize the SCU Clock Control Unit. This API initialize the PLL with ramp steps, BUS dividers for the configuration provided by the configuration structure. More...
IFX_EXTERN void | IfxScuCcu_initConfig (IfxScuCcu_Config *cfg)
Initializes the clock configuration with default values. More...
IFX_EXTERN boolean | IfxScuCcu_initErayPll (const IfxScuCcu_ErayPllConfig *cfg)
API to initialize the SCU Eray Pll This API initialize the Eray PLL for the configuration provided by the configuration structure. More...
IFX_EXTERN void | IfxScuCcu_initErayPllConfig (IfxScuCcu_ErayPllConfig *cfg)
Initializes the clock configuration with default values. More...
IFX_EXTERN void | IfxScuCcu_switchToBackupClock (const IfxScuCcu_Config *cfg)
API to switch to Backup clock from the current PLL frequency. More...
IFX_INLINE float32 | IfxScuCcu_getGtmFrequency (void)
API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register and fSOURCE. return GTM frequency (fGTM) in Hz. More...
IFX_EXTERN float32 | IfxScuCcu_setGtmFrequency (float32 gtmFreq)
API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...

Variables

IFX_EXTERN IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig
Configuration structure for SCU CCU driver. The values of this structure are defined as # defined macros in the implementation of Scu. More...
IFX_EXTERN IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig
Configuration structure for SCU CCU driver. The values of this structure are defined as # defined macros in the implementation of Scu. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScuCcu.h.

Macro Definition Documentation

◆ IFXSCUCCU_OSC_STABLECHK_TIME

#define IFXSCUCCU_OSC_STABLECHK_TIME (640)

Oscillator stability check timeout count.

Definition at line 136 of file IfxScuCcu.h.

Referenced by IfxScuCcu_isOscillatorStable().

Typedef Documentation

◆ IfxScuCcu_PllStepsFunctionHook

typedef void(* IfxScuCcu_PllStepsFunctionHook) (void)

Function pointer type for the hooks.

Returns
None

Definition at line 145 of file IfxScuCcu.h.

Function Documentation

◆ IfxScuCcu_getGtmFrequency()

IFX_INLINE float32 IfxScuCcu_getGtmFrequency ( void )

API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register and fSOURCE. return GTM frequency (fGTM) in Hz.

Returns
Gtm Frequency

Definition at line 1088 of file IfxScuCcu.h.

Referenced by IfxGtm_getSysClkFrequency(), IfxIom_getFrequency(), and IfxScuCcu_setGtmFrequency().

◆ IfxScuCcu_setGtmFrequency()

IFX_EXTERN float32 IfxScuCcu_setGtmFrequency ( float32 gtmFreq )

API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
gtmFreq Desired GTM frequency in Hz
Returns
Actual GTM frequency in HZ

Definition at line 1112 of file IfxScuCcu.c.

Variable Documentation

◆ IfxScuCcu_defaultClockConfig

IFX_EXTERN IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig

Configuration structure for SCU CCU driver. The values of this structure are defined as # defined macros in the implementation of Scu.

Definition at line 1071 of file IfxScuCcu.h.

◆ IfxScuCcu_defaultErayPllConfig

IFX_EXTERN IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig

Configuration structure for SCU CCU driver. The values of this structure are defined as # defined macros in the implementation of Scu.

Definition at line 1076 of file IfxScuCcu.h.


iLLD_TC26B: IfxScuEru.h File Reference

  • Scu
  • Std
Enumerations | Functions
IfxScuEru.h File Reference
iLLD » SCU

SCU basic functionality. More...

#include "_Impl/IfxScu_cfg.h"
#include "IfxScu_reg.h"
#include "Cpu/Std/IfxCpu.h"
#include "_PinMap/IfxScu_PinMap.h"
Include dependency graph for IfxScuEru.h:

Go to the source code of this file.

Enumerations

enum IfxScuEru_ExternalInputSelection {
IfxScuEru_ExternalInputSelection_0 = 0,
IfxScuEru_ExternalInputSelection_1,
IfxScuEru_ExternalInputSelection_2,
IfxScuEru_ExternalInputSelection_3
}
Input line selection for input channel
Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_InputChannel {
IfxScuEru_InputChannel_0 = 0,
IfxScuEru_InputChannel_1,
IfxScuEru_InputChannel_2,
IfxScuEru_InputChannel_3,
IfxScuEru_InputChannel_4,
IfxScuEru_InputChannel_5,
IfxScuEru_InputChannel_6,
IfxScuEru_InputChannel_7
}
Input channel for input selection and conditioning of trigger or gating functions. More...
enum IfxScuEru_InputNodePointer {
IfxScuEru_InputNodePointer_0 = 0,
IfxScuEru_InputNodePointer_1,
IfxScuEru_InputNodePointer_2,
IfxScuEru_InputNodePointer_3,
IfxScuEru_InputNodePointer_4,
IfxScuEru_InputNodePointer_5,
IfxScuEru_InputNodePointer_6,
IfxScuEru_InputNodePointer_7
}
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)).
Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_InterruptGatingPattern {
IfxScuEru_InterruptGatingPattern_none = 0,
IfxScuEru_InterruptGatingPattern_alwaysActive = 1,
IfxScuEru_InterruptGatingPattern_patternMatch = 2,
IfxScuEru_InterruptGatingPattern_patternMiss = 3
}
Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy
Definition in Ifx_SCU.IGCR[i].B.IGP(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_OutputChannel {
IfxScuEru_OutputChannel_0 = 0,
IfxScuEru_OutputChannel_1,
IfxScuEru_OutputChannel_2,
IfxScuEru_OutputChannel_3,
IfxScuEru_OutputChannel_4,
IfxScuEru_OutputChannel_5,
IfxScuEru_OutputChannel_6,
IfxScuEru_OutputChannel_7
}
Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...) More...

Functions

IFX_INLINE void | IfxScuEru_initReqPin (IfxScu_Req_In *req, IfxPort_InputMode inputMode)
Initialises the External request Pin. More...
IFX_EXTERN void | IfxScuEru_selectExternalInput (IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
Determines which input line is selcted for input channel x. More...
IFX_EXTERN void | IfxScuEru_clearAllEventFlags (void)
Clears the external event flag of input channel x (INTFx) More...
IFX_EXTERN void | IfxScuEru_clearEventFlag (IfxScuEru_InputChannel inputChannel)
Clears the external event flag of input channel x (INTFx) More...
IFX_EXTERN void | IfxScuEru_clearInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Clears all the configuration for the given input channel x. More...
IFX_EXTERN void | IfxScuEru_disableAutoClear (IfxScuEru_InputChannel inputChannel)
Disables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
IFX_EXTERN void | IfxScuEru_disableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the falling edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_disableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the rising edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_enableAutoClear (IfxScuEru_InputChannel inputChannel)
Enables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
IFX_EXTERN void | IfxScuEru_enableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the falling edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_enableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the rising edge of input channel to set the bit INTF x. More...
IFX_EXTERN uint32 | IfxScuEru_getAllEventFlagsStatus (void)
Returns the status of the flags of all input channels. More...
IFX_EXTERN boolean | IfxScuEru_getEventFlagStatus (IfxScuEru_InputChannel inputChannel)
Returns the status of the external event flag of input channel x (INTFx) More...
IFX_EXTERN uint32 | IfxScuEru_getInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Returns all the configuration for the given input channel x. More...
IFX_EXTERN void | IfxScuEru_setEventFlag (IfxScuEru_InputChannel inputChannel)
Sets the external event flag of input channel x (INTFx) More...
IFX_EXTERN void | IfxScuEru_connectTrigger (IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1). More...
IFX_EXTERN void | IfxScuEru_disableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Disables the generation of a trigger event for input channel x when the selected edge is detected. More...
IFX_EXTERN void | IfxScuEru_enableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Enables the generation of a trigger event for input channel x when the selected edge is detected. More...
IFX_EXTERN void | IfxScuEru_setFlagPatternDetection (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
Enables the flag INTFx to take part in the pattern detection for output gating. More...
IFX_EXTERN void | IfxScuEru_clearOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
IFX_EXTERN void | IfxScuEru_disablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Disables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
IFX_EXTERN void | IfxScuEru_enablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Enables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
IFX_EXTERN uint32 | IfxScuEru_getOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
IFX_EXTERN boolean | IfxScuEru_getPatternDetectionResult (IfxScuEru_OutputChannel outputChannel)
Returns the status of the pattern detection result of output channel y (PDRy) More...
IFX_EXTERN uint32 | IfxScuEru_getWholePatternDetectionResult (void)
Returns the whole pattern detection result of all the selcted output channels. More...
IFX_EXTERN void | IfxScuEru_setInterruptGatingPattern (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the output lines GOUT and IOUT. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScuEru.h.


iLLD_TC26B: IfxScuWdt.asm.h File Reference

  • Scu
  • Std
Macros | Functions
IfxScuWdt.asm.h File Reference
iLLD » SCU

SCU basic functionality. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxScu_reg.h"
Include dependency graph for IfxScuWdt.asm.h:

Go to the source code of this file.

Macros

#define IFXSCUWDT_CALCULATELFSR(pwd) ((((((pwd) >> 13) ^ ((pwd) >> 12) ^ ((pwd) >> 11) ^ ((pwd) >> 1 )) & 1)) | (((pwd)<<1) & 0x3FFF))

Functions

IFX_INLINE uint16 IfxScuWdt_calculateLfsr (uint16 password)
SCUWDT Inline API utility to Calculte new 14-bit LFSR. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScuWdt.asm.h.


iLLD_TC26B: IfxScuWdt.h File Reference

  • Scu
  • Std
Data Structures | Macros | Functions
IfxScuWdt.h File Reference
iLLD » SCU

SCU basic functionality. More...

#include "_Impl/IfxScu_cfg.h"
#include "Cpu/Std/Ifx_Types.h"
#include "IfxScu_reg.h"
#include "IfxScu_bf.h"
#include "IfxScuWdt.asm.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxScuWdt.h:

Go to the source code of this file.

Data Structures

struct IfxScuWdt_Config
Configuration structure for Scu Watchdog. IfxScuWdt_Config is a type describing configuration structure of CPU and Safety WDT registers defined in IfxScuWdt.h file. More...

Macros

#define IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT (0x100)
Endinit operation Timeout counter. More...

Functions

IFX_EXTERN void | IfxScuWdt_initConfig (IfxScuWdt_Config *config)
SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt configuration structure to default values, these default values are for software specific, not necessarily hardware reset values. User must use this API call before IfxScuWdt_Init API call. More...
IFX_EXTERN void | IfxScuWdt_initCpuWatchdog (Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_initSafetyWatchdog (Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_clearCpuEndinitInline (Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_clearSafetyEndinitInline (uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_setCpuEndinitInline (Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_setSafetyEndinitInline (uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_clearCpuEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_clearSafetyEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_setCpuEndinit (uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_setSafetyEndinit (uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_INLINE uint16 | IfxScuWdt_getCpuWatchdogPasswordInline (Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module. More...
IFX_INLINE boolean | IfxScuWdt_getCpuWatchdogEndInitInline (Ifx_SCU_WDTCPU *watchdog)
SCUWDT API to fetch current endinit of CPU Watchdog module. More...
IFX_INLINE boolean | IfxScuWdt_getSafetyWatchdogEndInit (void)
SCUWDT API to fetch current endinit of Safety/System Watchdog module. More...
IFX_INLINE uint16 | IfxScuWdt_getSafetyWatchdogPasswordInline (void)
SCUWDT Inline API to fetch current password of Safety Watchdog module. More...
IFX_EXTERN void | IfxScuWdt_changeCpuWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change CPU Watchdog password. More...
IFX_EXTERN void | IfxScuWdt_changeCpuWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change CPU Watchdog timer reload value. More...
IFX_EXTERN void | IfxScuWdt_changeSafetyWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change Safety Watchdog password. More...
IFX_EXTERN void | IfxScuWdt_changeSafetyWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change Safety Watchdog timer reload value. More...
IFX_EXTERN void | IfxScuWdt_disableCpuWatchdog (uint16 password)
SCUWDT API to disable CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_disableSafetyWatchdog (uint16 password)
SCUWDT API to disable Safety Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_enableCpuWatchdog (uint16 password)
SCUWDT API to enable CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_enableSafetyWatchdog (uint16 password)
SCUWDT API to enable Safety Watchdog functionality. More...
IFX_EXTERN uint16 | IfxScuWdt_getCpuWatchdogPassword (void)
SCUWDT API to fetch current password of CPU Watchdog module. More...
IFX_EXTERN boolean | IfxScuWdt_getCpuWatchdogEndInit (void)
SCUWDT API to fetch current endinit of CPU Watchdog module. More...
IFX_EXTERN uint16 | IfxScuWdt_getSafetyWatchdogPassword (void)
SCUWDT API to fetch current password of Safety Watchdog module. More...
IFX_EXTERN void | IfxScuWdt_serviceCpuWatchdog (uint16 password)
SCUWDT API to service CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_serviceSafetyWatchdog (uint16 password)
SCUWDT API to service Safety Watchdog functionality. More...
IFX_EXTERN boolean | IfxScuWdt_enableWatchdogWithDebugger (void)
Enables the watchdog functionality with debugger connected,
debug interface will also be enabled, if not enabled already. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

This file contains the APIs for SCU Watchdog and Endinit related functions.

Definition in file IfxScuWdt.h.

Data Structure Documentation

◆ IfxScuWdt_Config

struct IfxScuWdt_Config

Configuration structure for Scu Watchdog. IfxScuWdt_Config is a type describing configuration structure of CPU and Safety WDT registers defined in IfxScuWdt.h file.

Definition at line 86 of file IfxScuWdt.h.

Data Fields
boolean | clrInternalResetFlag | Clear Internal Reset Flag.
boolean | disableWatchdog | Disable Request Control Bit.
boolean | enableAutomaticPasswordChange | Password Auto-sequence Request Bit.
boolean | enableSmuRestriction | Unlock Restriction Request Control Bit.
boolean | enableTimerCheck | Counter Check Request Bit.
boolean | enableTimerCheckTolerance | Timer Check Tolerance Request.
IfxScu_WDTCON1_IR | inputFrequency | input frequency of the WDT
uint16 | password | password for access to WDTxCON0 reg
uint16 | reload | WDT reload value.

Macro Definition Documentation

◆ IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT

#define IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT (0x100)

Endinit operation Timeout counter.

Definition at line 76 of file IfxScuWdt.h.

Function Documentation

◆ IfxScuWdt_enableWatchdogWithDebugger()

IFX_EXTERN boolean IfxScuWdt_enableWatchdogWithDebugger ( void )

Enables the watchdog functionality with debugger connected,
debug interface will also be enabled, if not enabled already.

Returns
Status, Success = 0, Failure = 1.

Definition at line 430 of file IfxScuWdt.c.


iLLD_TC26B: SENT

Modules | Files
SENT
iLLD
Collaboration diagram for SENT:

Modules

Implementation
Standard Driver
SENT Pin Mapping
How to use the SENT Interface driver?
Interface Driver

Files

file | IfxSent_cfg.h
SENT on-chip implementation data.
file | IfxSent_PinMap.c
SENT I/O map.
file | IfxSent_PinMap.h
SENT I/O map.
file | IfxSent_Sent.h
SENT SENT details.
file | IfxSent.h
SENT basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » SENT
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » SENT
Collaboration diagram for Standard Driver:

Modules

Enumerations
Configuration Functions
Interrupts
Operative Functions
Baudrate Configuration
IO Pin Configuration Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » SENT » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxSent_AlternateInput {
IfxSent_AlternateInput_0 = 0,
IfxSent_AlternateInput_1,
IfxSent_AlternateInput_2,
IfxSent_AlternateInput_3
}
SENT.CH[channelId].IOCR.ALTI , Specifies alternate input for channel. More...
enum IfxSent_ChannelStatus {
IfxSent_ChannelStatus_stop = 0,
IfxSent_ChannelStatus_initialize = 1,
IfxSent_ChannelStatus_running = 2,
IfxSent_ChannelStatus_synchronize = 3
}
SENT.CH[channelId].RSR.CST, Specifies the current channel status. More...
enum IfxSent_ClockDividerMode {
IfxSent_ClockDividerMode_off = 0,
IfxSent_ClockDividerMode_normal = 1,
IfxSent_ClockDividerMode_fractional = 2
}
SENT.FDR.DM , Specifies clock divider mode. More...
enum IfxSent_ConfigBit {
IfxSent_ConfigBit_0 = 0,
IfxSent_ConfigBit_1
}
SENT.CH[channelId].SDS.CON , Specifies received configuration bit value. More...
enum IfxSent_DigitalGlitchesLength {
IfxSent_DigitalGlitchesLength_off = 0,
IfxSent_DigitalGlitchesLength_1 = 1,
IfxSent_DigitalGlitchesLength_2,
IfxSent_DigitalGlitchesLength_3,
IfxSent_DigitalGlitchesLength_4,
IfxSent_DigitalGlitchesLength_5,
IfxSent_DigitalGlitchesLength_6,
IfxSent_DigitalGlitchesLength_7,
IfxSent_DigitalGlitchesLength_8,
IfxSent_DigitalGlitchesLength_9,
IfxSent_DigitalGlitchesLength_10,
IfxSent_DigitalGlitchesLength_11,
IfxSent_DigitalGlitchesLength_12,
IfxSent_DigitalGlitchesLength_13,
IfxSent_DigitalGlitchesLength_14,
IfxSent_DigitalGlitchesLength_15
}
SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples. More...
enum IfxSent_ExtendedSerialFrameMode {
IfxSent_ExtendedSerialFrameMode_standard = 0,
IfxSent_ExtendedSerialFrameMode_extended = 1
}
SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure. More...
enum IfxSent_ExternalTrigger {
IfxSent_ExternalTrigger_0 = 0,
IfxSent_ExternalTrigger_1,
IfxSent_ExternalTrigger_2,
IfxSent_ExternalTrigger_3,
IfxSent_ExternalTrigger_4,
IfxSent_ExternalTrigger_5,
IfxSent_ExternalTrigger_6,
IfxSent_ExternalTrigger_7,
IfxSent_ExternalTrigger_8,
IfxSent_ExternalTrigger_9
}
SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line. More...
enum IfxSent_FrameCheckMode {
IfxSent_FrameCheckMode_pastSyncPulse = 0,
IfxSent_FrameCheckMode_futureSuncPulse = 1
}
SENT.CH[channelId].RCR.CFC, Specifies received frame check mode. More...
enum IfxSent_InterruptNodePointer {
IfxSent_InterruptNodePointer_0 = 0,
IfxSent_InterruptNodePointer_1,
IfxSent_InterruptNodePointer_2,
IfxSent_InterruptNodePointer_3,
IfxSent_InterruptNodePointer_trigo0 = 4,
IfxSent_InterruptNodePointer_trigo1,
IfxSent_InterruptNodePointer_trigo2,
IfxSent_InterruptNodePointer_trigo3,
IfxSent_InterruptNodePointer_trigo4,
IfxSent_InterruptNodePointer_trigo5
}
SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for respective interrupt. More...
enum IfxSent_Nibble {
IfxSent_Nibble_0 = 0,
IfxSent_Nibble_1,
IfxSent_Nibble_2,
IfxSent_Nibble_3,
IfxSent_Nibble_4,
IfxSent_Nibble_5,
IfxSent_Nibble_6,
IfxSent_Nibble_7
}
SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer. More...
enum IfxSent_SleepMode {
IfxSent_SleepMode_enable = 0,
IfxSent_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_SENT.CLC.B.EDIS. More...
enum IfxSent_SpcMode {
IfxSent_SpcMode_sync = 0,
IfxSent_SpcMode_range = 1,
IfxSent_SpcMode_bidirectional = 2
}
Specifies the SENT SPC operational mode. More...
enum IfxSent_SuspendMode {
IfxSent_SuspendMode_none = 0,
IfxSent_SuspendMode_hard = 1,
IfxSent_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxSent_TimeBase {
IfxSent_TimeBase_measuredFrequency = 0,
IfxSent_TimeBase_nominalFrequency = 1
}
SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time. More...
enum IfxSent_TriggerSource {
IfxSent_TriggerSource_off = 0,
IfxSent_TriggerSource_immediate = 1,
IfxSent_TriggerSource_fallingEdge = 2,
IfxSent_TriggerSource_externalTrigger = 3
}
SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation. More...

Detailed Description

Enumeration Type Documentation

◆ IfxSent_AlternateInput

enum IfxSent_AlternateInput

SENT.CH[channelId].IOCR.ALTI , Specifies alternate input for channel.

Enumerator
IfxSent_AlternateInput_0 | Specifies alternate input 0.
IfxSent_AlternateInput_1 | Specifies alternate input 1.
IfxSent_AlternateInput_2 | Specifies alternate input 2.
IfxSent_AlternateInput_3 | Specifies alternate input 3.

Definition at line 87 of file IfxSent.h.

◆ IfxSent_ChannelStatus

enum IfxSent_ChannelStatus

SENT.CH[channelId].RSR.CST, Specifies the current channel status.

Enumerator
IfxSent_ChannelStatus_stop | Specifies the channel is stopped.
IfxSent_ChannelStatus_initialize | Specifies the channel is initialized.
IfxSent_ChannelStatus_running | Specifies the channel is running.
IfxSent_ChannelStatus_synchronize | Specifies the channel is synchronized.

Definition at line 97 of file IfxSent.h.

◆ IfxSent_ClockDividerMode

enum IfxSent_ClockDividerMode

SENT.FDR.DM , Specifies clock divider mode.

Enumerator
IfxSent_ClockDividerMode_off | Specifies clock divider mode off.
IfxSent_ClockDividerMode_normal | Specifies clock normal divider mode.
IfxSent_ClockDividerMode_fractional | Specifies clock fractional divider mode.

Definition at line 107 of file IfxSent.h.

◆ IfxSent_ConfigBit

enum IfxSent_ConfigBit

SENT.CH[channelId].SDS.CON , Specifies received configuration bit value.

Enumerator
IfxSent_ConfigBit_0 | Specifies received configuration bit value 0.
IfxSent_ConfigBit_1 | Specifies received configuration bit value 1.

Definition at line 116 of file IfxSent.h.

◆ IfxSent_DigitalGlitchesLength

enum IfxSent_DigitalGlitchesLength

SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples.

Enumerator
IfxSent_DigitalGlitchesLength_off | Specifies port input samples off.
IfxSent_DigitalGlitchesLength_1 | Specifies 1 port input samples.
IfxSent_DigitalGlitchesLength_2 | Specifies 2 port input samples.
IfxSent_DigitalGlitchesLength_3 | Specifies 3 port input samples.
IfxSent_DigitalGlitchesLength_4 | Specifies 4 port input samples.
IfxSent_DigitalGlitchesLength_5 | Specifies 5 port input samples.
IfxSent_DigitalGlitchesLength_6 | Specifies 6 port input samples.
IfxSent_DigitalGlitchesLength_7 | Specifies 7 port input samples.
IfxSent_DigitalGlitchesLength_8 | Specifies 8 port input samples.
IfxSent_DigitalGlitchesLength_9 | Specifies 9 port input samples.
IfxSent_DigitalGlitchesLength_10 | Specifies 10 port input samples.
IfxSent_DigitalGlitchesLength_11 | Specifies 11 port input samples.
IfxSent_DigitalGlitchesLength_12 | Specifies 12 port input samples.
IfxSent_DigitalGlitchesLength_13 | Specifies 13 port input samples.
IfxSent_DigitalGlitchesLength_14 | Specifies 14 port input samples.
IfxSent_DigitalGlitchesLength_15 | Specifies 15 port input samples.

Definition at line 124 of file IfxSent.h.

◆ IfxSent_ExtendedSerialFrameMode

enum IfxSent_ExtendedSerialFrameMode

SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure.

Enumerator
IfxSent_ExtendedSerialFrameMode_standard | Specifies the standard serial frame structure.
IfxSent_ExtendedSerialFrameMode_extended | Specifies the extended serial frame structure.

Definition at line 146 of file IfxSent.h.

◆ IfxSent_ExternalTrigger

enum IfxSent_ExternalTrigger

SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line.

Enumerator
IfxSent_ExternalTrigger_0 | Specifies the external trigger line 0.
IfxSent_ExternalTrigger_1 | Specifies the external trigger line 1.
IfxSent_ExternalTrigger_2 | Specifies the external trigger line 2.
IfxSent_ExternalTrigger_3 | Specifies the external trigger line 3.
IfxSent_ExternalTrigger_4 | Specifies the external trigger line 4.
IfxSent_ExternalTrigger_5 | Specifies the external trigger line 5.
IfxSent_ExternalTrigger_6 | Specifies the external trigger line 6.
IfxSent_ExternalTrigger_7 | Specifies the external trigger line 7.
IfxSent_ExternalTrigger_8 | Specifies the external trigger line 8.
IfxSent_ExternalTrigger_9 | Specifies the external trigger line 9.

Definition at line 154 of file IfxSent.h.

◆ IfxSent_FrameCheckMode

enum IfxSent_FrameCheckMode

SENT.CH[channelId].RCR.CFC, Specifies received frame check mode.

Enumerator
IfxSent_FrameCheckMode_pastSyncPulse | Specifies frame check mode against past sync pulse.
IfxSent_FrameCheckMode_futureSuncPulse | Specifies frame check mode against future sync pulse.

Definition at line 170 of file IfxSent.h.

◆ IfxSent_InterruptNodePointer

enum IfxSent_InterruptNodePointer

SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for respective interrupt.

Enumerator
IfxSent_InterruptNodePointer_0 | Specifies interrupt requested node 0.
IfxSent_InterruptNodePointer_1 | Specifies interrupt requested node 1.
IfxSent_InterruptNodePointer_2 | Specifies interrupt requested node 2.
IfxSent_InterruptNodePointer_3 | Specifies interrupt requested node 3.
IfxSent_InterruptNodePointer_trigo0 | Specifies interrupt requested node TRIGO 0.
IfxSent_InterruptNodePointer_trigo1 | Specifies interrupt requested node TRIGO 1.
IfxSent_InterruptNodePointer_trigo2 | Specifies interrupt requested node TRIGO 2.
IfxSent_InterruptNodePointer_trigo3 | Specifies interrupt requested node TRIGO 3.
IfxSent_InterruptNodePointer_trigo4 | Specifies interrupt requested node TRIGO 4.
IfxSent_InterruptNodePointer_trigo5 | Specifies interrupt requested node TRIGO 5.

Definition at line 178 of file IfxSent.h.

◆ IfxSent_Nibble

enum IfxSent_Nibble

SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer.

Enumerator
IfxSent_Nibble_0 | Specifies receive data target nibble pointer to nibble 0.
IfxSent_Nibble_1 | Specifies receive data target nibble pointer to nibble 1.
IfxSent_Nibble_2 | Specifies receive data target nibble pointer to nibble 2.
IfxSent_Nibble_3 | Specifies receive data target nibble pointer to nibble 3.
IfxSent_Nibble_4 | Specifies receive data target nibble pointer to nibble 4.
IfxSent_Nibble_5 | Specifies receive data target nibble pointer to nibble 5.
IfxSent_Nibble_6 | Specifies receive data target nibble pointer to nibble 6.
IfxSent_Nibble_7 | Specifies receive data target nibble pointer to nibble 7.

Definition at line 194 of file IfxSent.h.

◆ IfxSent_SleepMode

enum IfxSent_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_SENT.CLC.B.EDIS.

Enumerator
IfxSent_SleepMode_enable | enables sleep mode
IfxSent_SleepMode_disable | disables sleep mode

Definition at line 209 of file IfxSent.h.

◆ IfxSent_SpcMode

enum IfxSent_SpcMode

Specifies the SENT SPC operational mode.

Enumerator
IfxSent_SpcMode_sync | Specifies synchronous SPC mode.
IfxSent_SpcMode_range | Specifies range selection SPC mode.
IfxSent_SpcMode_bidirectional | Specifies bidirectional transmit SPC mode.

Definition at line 217 of file IfxSent.h.

◆ IfxSent_SuspendMode

enum IfxSent_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxSent_SuspendMode_none | No suspend.
IfxSent_SuspendMode_hard | Hard Suspend.
IfxSent_SuspendMode_soft | Soft Suspend.

Definition at line 226 of file IfxSent.h.

◆ IfxSent_TimeBase

enum IfxSent_TimeBase

SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time.

Enumerator
IfxSent_TimeBase_measuredFrequency | Specifies selection of pulse based on measured frequency.
IfxSent_TimeBase_nominalFrequency | Specifies selection of pulse based on nomianl frequency.

Definition at line 235 of file IfxSent.h.

◆ IfxSent_TriggerSource

enum IfxSent_TriggerSource

SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation.

Enumerator
IfxSent_TriggerSource_off | Specifies no pulse generation.
IfxSent_TriggerSource_immediate | Specifies immediate pulse generation.
IfxSent_TriggerSource_fallingEdge | Specifies pulse generation at fallingEdge.
IfxSent_TriggerSource_externalTrigger | Specifies pulse generation after each external trigger.

Definition at line 243 of file IfxSent.h.


iLLD_TC26B: Configuration Functions

Functions
Configuration Functions
iLLD » SENT » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxSent_setAltiInput (Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_AlternateInput alternateInput)
Sets the operation mode of SENT kernel. More...
IFX_INLINE void | IfxSent_setTimeStampPredivider (Ifx_SENT *sent, uint32 timeStampPreDivider)
Set the module time stamp pre-divider. More...

Detailed Description

Function Documentation

◆ IfxSent_setAltiInput()

IFX_INLINE void IfxSent_setAltiInput | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | IfxSent_AlternateInput | alternateInput
 | ) |  |

Sets the operation mode of SENT kernel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
alternateInput | alternate input/output pin for SENT operation
Returns
None

Definition at line 666 of file IfxSent.h.

Referenced by IfxSent_initSentPin().

◆ IfxSent_setTimeStampPredivider()

IFX_INLINE void IfxSent_setTimeStampPredivider | ( | Ifx_SENT * | sent,
 |  | uint32 | timeStampPreDivider
 | ) |  |

Set the module time stamp pre-divider.

Parameters
sent | base address of the SENT register space
timeStampPreDivider | time stamp pre-divider value
Returns
None

Definition at line 704 of file IfxSent.h.

Referenced by IfxSent_Sent_initModule().


iLLD_TC26B: Interrupts

Functions
Interrupts
iLLD » SENT » Standard Driver
Collaboration diagram for Interrupts:

Functions

IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_getAndClearInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware. More...
IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_getChannelInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Gets the current channel status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxSent_getChannelSrc (IfxSent_ChannelId channelId)
gets the source for channel interrupt handler More...

Detailed Description

Function Documentation

◆ IfxSent_getAndClearInterruptStatus()

IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getAndClearInterruptStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware.

This function should be used in an ISR to retrieve the events which triggered the interrupt.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
Interrupt flags which have been cleared.

Definition at line 610 of file IfxSent.h.

Referenced by IfxSent_Sent_getAndClearInterruptStatus().

◆ IfxSent_getChannelInterruptStatus()

IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getChannelInterruptStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Gets the current channel status.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
current channel interrupt status

Definition at line 619 of file IfxSent.h.

◆ IfxSent_getChannelSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxSent_getChannelSrc ( IfxSent_ChannelId channelId )

gets the source for channel interrupt handler

Parameters
channelId SENT channel number
Returns
interrupt source

Definition at line 627 of file IfxSent.h.

Referenced by IfxSent_Sent_initChannel().


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » SENT » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxSent_disableChannel (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Disable the channel with the channel number. More...
IFX_INLINE void | IfxSent_disableModule (Ifx_SENT *sent)
Disable the SENT module. More...
IFX_INLINE void | IfxSent_enableChannel (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Enable the channel with the channel number. More...
IFX_INLINE void | IfxSent_enableModule (Ifx_SENT *sent)
Enable the SENT module. More...
IFX_INLINE boolean | IfxSent_isModuleSuspended (Ifx_SENT *sent)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxSent_setSleepMode (Ifx_SENT *sent, IfxSent_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxSent_setSuspendMode (Ifx_SENT *sent, IfxSent_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxSent_resetModule (Ifx_SENT *sent)
Resets the SENT module. More...

Detailed Description

Function Documentation

◆ IfxSent_disableChannel()

IFX_INLINE void IfxSent_disableChannel | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Disable the channel with the channel number.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
None

Definition at line 577 of file IfxSent.h.

Referenced by IfxSent_Sent_initChannel().

◆ IfxSent_disableModule()

IFX_INLINE void IfxSent_disableModule ( Ifx_SENT * sent )

Disable the SENT module.

Parameters
sent base address of the SENT register space
Returns
None

Definition at line 583 of file IfxSent.h.

◆ IfxSent_enableChannel()

IFX_INLINE void IfxSent_enableChannel | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Enable the channel with the channel number.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
None

Definition at line 592 of file IfxSent.h.

Referenced by IfxSent_Sent_initChannel().

◆ IfxSent_enableModule()

IFX_INLINE void IfxSent_enableModule ( Ifx_SENT * sent )

Enable the SENT module.

Parameters
sent base address of the SENT register space
Returns
None

Definition at line 598 of file IfxSent.h.

Referenced by IfxSent_Sent_initModule().

◆ IfxSent_isModuleSuspended()

IFX_INLINE boolean IfxSent_isModuleSuspended ( Ifx_SENT * sent )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
sent Pointer to SENT module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 654 of file IfxSent.h.

◆ IfxSent_resetModule()

IFX_EXTERN void IfxSent_resetModule ( Ifx_SENT * sent )

Resets the SENT module.

Parameters
sent base address of the SENT register space
Returns
None

Definition at line 147 of file IfxSent.c.

Referenced by IfxSent_Sent_deInitModule().

◆ IfxSent_setSleepMode()

IFX_INLINE void IfxSent_setSleepMode | ( | Ifx_SENT * | sent,
 |  | IfxSent_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
sent | pointer to SENT registers
mode | mode selection (enable / disable)
Returns
None

Definition at line 684 of file IfxSent.h.

◆ IfxSent_setSuspendMode()

IFX_INLINE void IfxSent_setSuspendMode | ( | Ifx_SENT * | sent,
 |  | IfxSent_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
sent | Pointer to SENT module registers
mode | Module suspend mode
Returns
None

Definition at line 693 of file IfxSent.h.


iLLD_TC26B: Baudrate Configuration

Functions
Baudrate Configuration
iLLD » SENT » Standard Driver
Collaboration diagram for Baudrate Configuration:

Functions

IFX_INLINE void | IfxSent_setChannelFractionalDivider (Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider)
Sets the channel fractional baudrate divider. More...
IFX_INLINE void | IfxSent_setChannelPreDivider (Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider)
Sets the channel baudrate pre-divider. More...
IFX_EXTERN float32 | IfxSent_getModuleClock (Ifx_SENT *sent)
Returns the current module frequency in Hertz. More...
IFX_EXTERN void | IfxSent_initializeChannelUnitTime (Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channel. More...
IFX_EXTERN void | IfxSent_initializeModuleClock (Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel. More...

Detailed Description

Function Documentation

◆ IfxSent_getModuleClock()

IFX_EXTERN float32 IfxSent_getModuleClock ( Ifx_SENT * sent )

Returns the current module frequency in Hertz.

Parameters
sent base address of the SENT register space
Returns
The current module frequency in Hertz

Definition at line 74 of file IfxSent.c.

Referenced by IfxSent_getChannelUnitTime(), and IfxSent_initializeChannelUnitTime().

◆ IfxSent_initializeChannelUnitTime()

IFX_EXTERN void IfxSent_initializeChannelUnitTime | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | float32 | tUnit
 | ) |  |

Initializes the desired unit time (f_tick) for the external SENT device connected to the given channel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
tUnit | desired unit time (f_tick), e.g. 3E-6 for 3 uS
Returns
None

Definition at line 105 of file IfxSent.c.

Referenced by IfxSent_Sent_initChannel().

◆ IfxSent_initializeModuleClock()

IFX_EXTERN void IfxSent_initializeModuleClock | ( | Ifx_SENT * | sent,
 |  | IfxSent_ClockDividerMode | dividerMode,
 |  | uint16 | stepValue
 | ) |  |

Initialize and get the clock for SENT kernel.

Parameters
sent | base address of the SENT register space
dividerMode | Divider mode for clock output
stepValue | clock frequency for for module fractional divider
Returns
None

Definition at line 137 of file IfxSent.c.

Referenced by IfxSent_Sent_initModule().

◆ IfxSent_setChannelFractionalDivider()

IFX_INLINE void IfxSent_setChannelFractionalDivider | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | uint16 | divider
 | ) |  |

Sets the channel fractional baudrate divider.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
divider | channel baudrate fractional divider
Returns
None

Definition at line 672 of file IfxSent.h.

Referenced by IfxSent_initializeChannelUnitTime().

◆ IfxSent_setChannelPreDivider()

IFX_INLINE void IfxSent_setChannelPreDivider | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | uint16 | preDivider
 | ) |  |

Sets the channel baudrate pre-divider.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
preDivider | channel baudrate pre-divider
Returns
None

Definition at line 678 of file IfxSent.h.

Referenced by IfxSent_initializeChannelUnitTime().


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » SENT » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxSent_initSentPin (const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a SENT input. More...
IFX_INLINE void | IfxSent_initSpcPin (const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver)
Initializes a SPC output. More...

Detailed Description

Function Documentation

◆ IfxSent_initSentPin()

IFX_INLINE void IfxSent_initSentPin | ( | const IfxSent_Sent_In * | sentIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SENT input.

Parameters
sentIn | the SENT Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 633 of file IfxSent.h.

Referenced by IfxSent_Sent_initChannel().

◆ IfxSent_initSpcPin()

IFX_INLINE void IfxSent_initSpcPin | ( | const IfxSent_Spc_Out * | spcOut,
 |  | IfxPort_OutputMode | spcOutMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SPC output.

Parameters
spcOut | the SPC Pin which should be configured
spcOutMode | Port Output Mode
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 644 of file IfxSent.h.

Referenced by IfxSent_Sent_initChannel().


iLLD_TC26B: SENT Pin Mapping

Data Structures | Macros | Variables
SENT Pin Mapping
iLLD » SENT
Collaboration diagram for SENT Pin Mapping:

Data Structures

struct | IfxSent_Sent_In
SENT pin mapping structure. More...
struct | IfxSent_Spc_Out
SPC pin mapping structure. More...

Macros

#define | IFXSENT_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSENT_PINMAP_NUM_CHANNELS 6
#define | IFXSENT_PINMAP_SENT_IN_NUM_ITEMS 4
#define | IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS 1

Variables

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_AN24_IN
SENT_SENT0A: SENT input channel 0 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN
SENT_SENT0A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN
SENT_SENT0B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN
SENT_SENT0C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_AN25_IN
SENT_SENT1A: SENT input channel 1 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN
SENT_SENT1A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN
SENT_SENT1B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN
SENT_SENT1C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_AN26_IN
SENT_SENT2A: SENT input channel 2 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN
SENT_SENT2A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN
SENT_SENT2B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN
SENT_SENT2C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_AN36_IN
SENT_SENT2D: SENT input channel 2 pin D. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN
SENT_SENT2D: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_AN27_IN
SENT_SENT3A: SENT input channel 3 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN
SENT_SENT3A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN
SENT_SENT3B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN
SENT_SENT3C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_AN37_IN
SENT_SENT3D: SENT input channel 3 pin D. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN
SENT_SENT3D: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_AN38_IN
SENT_SENT4A: SENT input channel 4 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN
SENT_SENT4A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN
SENT_SENT4B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN
SENT_SENT4C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_AN39_IN
SENT_SENT5A: SENT input channel 5 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN
SENT_SENT5A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN
SENT_SENT5B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN
SENT_SENT5C: SENT input. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT
SENT_SPC0: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT
SENT_SPC1: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT
SENT_SPC2: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT
SENT_SPC3: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT
SENT_SPC4: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT
SENT_SPC5: SENT output. More...
IFX_EXTERN const IfxSent_Sent_In * | IfxSent_Sent_In_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]
IfxSent_Sent_In table. More...
IFX_EXTERN const IfxSent_Spc_Out * | IfxSent_Spc_Out_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]
IfxSent_Spc_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxSent_Sent_In

struct IfxSent_Sent_In

SENT pin mapping structure.

Definition at line 56 of file IfxSent_PinMap.h.

Collaboration diagram for IfxSent_Sent_In:
[legend]
Data Fields
IfxSent_ChannelId | channelId | Channel ID.
Ifx_SENT * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxSent_Spc_Out

struct IfxSent_Spc_Out

SPC pin mapping structure.

Definition at line 65 of file IfxSent_PinMap.h.

Collaboration diagram for IfxSent_Spc_Out:
[legend]
Data Fields
IfxSent_ChannelId | channelId | Channel ID.
Ifx_SENT * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXSENT_PINMAP_NUM_CHANNELS

#define IFXSENT_PINMAP_NUM_CHANNELS 6

Definition at line 110 of file IfxSent_PinMap.h.

◆ IFXSENT_PINMAP_NUM_MODULES

#define IFXSENT_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 109 of file IfxSent_PinMap.h.

◆ IFXSENT_PINMAP_SENT_IN_NUM_ITEMS

#define IFXSENT_PINMAP_SENT_IN_NUM_ITEMS 4

Definition at line 111 of file IfxSent_PinMap.h.

◆ IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS

#define IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS 1

Definition at line 112 of file IfxSent_PinMap.h.

Variable Documentation

◆ IfxSent_SENT0A_AN24_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_AN24_IN

SENT_SENT0A: SENT input channel 0 pin A.

Definition at line 73 of file IfxSent_PinMap.h.

◆ IfxSent_SENT0A_P40_0_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN

SENT_SENT0A: SENT input.

Definition at line 74 of file IfxSent_PinMap.h.

◆ IfxSent_SENT0B_P00_1_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN

SENT_SENT0B: SENT input.

Definition at line 75 of file IfxSent_PinMap.h.

◆ IfxSent_SENT0C_P02_8_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN

SENT_SENT0C: SENT input.

Definition at line 76 of file IfxSent_PinMap.h.

◆ IfxSent_SENT1A_AN25_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_AN25_IN

SENT_SENT1A: SENT input channel 1 pin A.

Definition at line 77 of file IfxSent_PinMap.h.

◆ IfxSent_SENT1A_P40_1_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN

SENT_SENT1A: SENT input.

Definition at line 78 of file IfxSent_PinMap.h.

◆ IfxSent_SENT1B_P00_2_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN

SENT_SENT1B: SENT input.

Definition at line 79 of file IfxSent_PinMap.h.

◆ IfxSent_SENT1C_P02_7_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN

SENT_SENT1C: SENT input.

Definition at line 80 of file IfxSent_PinMap.h.

◆ IfxSent_SENT2A_AN26_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_AN26_IN

SENT_SENT2A: SENT input channel 2 pin A.

Definition at line 81 of file IfxSent_PinMap.h.

◆ IfxSent_SENT2A_P40_2_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN

SENT_SENT2A: SENT input.

Definition at line 82 of file IfxSent_PinMap.h.

◆ IfxSent_SENT2B_P00_3_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN

SENT_SENT2B: SENT input.

Definition at line 83 of file IfxSent_PinMap.h.

◆ IfxSent_SENT2C_P02_6_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN

SENT_SENT2C: SENT input.

Definition at line 84 of file IfxSent_PinMap.h.

◆ IfxSent_SENT2D_AN36_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_AN36_IN

SENT_SENT2D: SENT input channel 2 pin D.

Definition at line 85 of file IfxSent_PinMap.h.

◆ IfxSent_SENT2D_P40_6_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN

SENT_SENT2D: SENT input.

Definition at line 86 of file IfxSent_PinMap.h.

◆ IfxSent_SENT3A_AN27_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_AN27_IN

SENT_SENT3A: SENT input channel 3 pin A.

Definition at line 87 of file IfxSent_PinMap.h.

◆ IfxSent_SENT3A_P40_3_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN

SENT_SENT3A: SENT input.

Definition at line 88 of file IfxSent_PinMap.h.

◆ IfxSent_SENT3B_P00_4_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN

SENT_SENT3B: SENT input.

Definition at line 89 of file IfxSent_PinMap.h.

◆ IfxSent_SENT3C_P02_5_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN

SENT_SENT3C: SENT input.

Definition at line 90 of file IfxSent_PinMap.h.

◆ IfxSent_SENT3D_AN37_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_AN37_IN

SENT_SENT3D: SENT input channel 3 pin D.

Definition at line 91 of file IfxSent_PinMap.h.

◆ IfxSent_SENT3D_P40_7_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN

SENT_SENT3D: SENT input.

Definition at line 92 of file IfxSent_PinMap.h.

◆ IfxSent_SENT4A_AN38_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_AN38_IN

SENT_SENT4A: SENT input channel 4 pin A.

Definition at line 93 of file IfxSent_PinMap.h.

◆ IfxSent_SENT4A_P40_8_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN

SENT_SENT4A: SENT input.

Definition at line 94 of file IfxSent_PinMap.h.

◆ IfxSent_SENT4B_P00_5_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN

SENT_SENT4B: SENT input.

Definition at line 95 of file IfxSent_PinMap.h.

◆ IfxSent_SENT4C_P33_6_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN

SENT_SENT4C: SENT input.

Definition at line 96 of file IfxSent_PinMap.h.

◆ IfxSent_SENT5A_AN39_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_AN39_IN

SENT_SENT5A: SENT input channel 5 pin A.

Definition at line 97 of file IfxSent_PinMap.h.

◆ IfxSent_SENT5A_P40_9_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN

SENT_SENT5A: SENT input.

Definition at line 98 of file IfxSent_PinMap.h.

◆ IfxSent_SENT5B_P00_6_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN

SENT_SENT5B: SENT input.

Definition at line 99 of file IfxSent_PinMap.h.

◆ IfxSent_SENT5C_P33_5_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN

SENT_SENT5C: SENT input.

Definition at line 100 of file IfxSent_PinMap.h.

◆ IfxSent_Sent_In_pinTable

IFX_EXTERN const IfxSent_Sent_In* IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]

IfxSent_Sent_In table.

Definition at line 116 of file IfxSent_PinMap.h.

◆ IfxSent_SPC0_P00_1_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT

SENT_SPC0: SENT output.

Definition at line 101 of file IfxSent_PinMap.h.

◆ IfxSent_SPC1_P02_7_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT

SENT_SPC1: SENT output.

Definition at line 102 of file IfxSent_PinMap.h.

◆ IfxSent_SPC2_P00_3_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT

SENT_SPC2: SENT output.

Definition at line 103 of file IfxSent_PinMap.h.

◆ IfxSent_SPC3_P00_4_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT

SENT_SPC3: SENT output.

Definition at line 104 of file IfxSent_PinMap.h.

◆ IfxSent_SPC4_P00_5_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT

SENT_SPC4: SENT output.

Definition at line 105 of file IfxSent_PinMap.h.

◆ IfxSent_SPC5_P00_6_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT

SENT_SPC5: SENT output.

Definition at line 106 of file IfxSent_PinMap.h.

◆ IfxSent_Spc_Out_pinTable

IFX_EXTERN const IfxSent_Spc_Out* IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]

IfxSent_Spc_Out table.

Definition at line 119 of file IfxSent_PinMap.h.


iLLD_TC26B: How to use the SENT Interface driver?

How to use the SENT Interface driver?
iLLD » SENT
Collaboration diagram for How to use the SENT Interface driver?:

This SENT interface driver provides functions to communicate with external sensors.

Preparation

Include Files

Include following header file into your C code:

#include <Sent/Sent/IfxSent_Sent.h>

Variables

Declare SENT module and channel handles as global variables in your C code. If multiple SENT channels should be serviced, it makes sense to declare the SENT channel handle as an array:

#define TESTED_SENT_CHANNELS 3
static IfxSent_Sent sent;
static IfxSent_Sent_Channel sentChannel[TESTED_SENT_CHANNELS];

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

#define IFX_INTPRIO_SENT_CHANNEL 1

Add the interrupt service routine to your C code. It has to call the SENT interrupt handler by passing the SENT channel handle:

void SentInterruptHandler(IfxSent_Sent_Channel *channel);
IFX_INTERRUPT(sentChannelISR, 0, IFX_INTPRIO_SENT_CHANNEL)
{
int i;
for(i=0; i<TESTED_SENT_CHANNELS; ++i)
{
SentInterruptHandler(&sentChannel[i]);
}
}

Note: the SentInterruptHandler function is not part of the interface driver, but has to be implemented in the application. A template can be found below under Interrupt Service Handler

Finally install the interrupt handlers in your initialisation function:

// install interrupt handler
IfxCpu_Irq_installInterruptHandler(&sentChannelISR, IFX_INTPRIO_SENT_CHANNEL);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example for SENT and SPC mode:

// create module config
IfxSent_Sent_Config sentConfig;
IfxSent_Sent_initModuleConfig(&sentConfig, &MODULE_SENT);
// initialize module
//IfxSent_Sent sent; // defined globally
IfxSent_Sent_initModule(&sent, &sentConfig);

Channel Initialisation

After the module has been initialized, one or more SENT channels can be configured.

Here an example for three SENT channels in SENT and SPC mode:

// create channel config
IfxSent_Sent_ChannelConfig sentChannelConfig;
IfxSent_Sent_initChannelConfig(&sentChannelConfig, &sent);
// define tUnit of the external sensor
sentChannelConfig.tUnit = 3.0E-6;
// ISR priorities and interrupt target
sentChannelConfig.interrupt.priority = IFX_INTPRIO_SENT_CHANNEL;
sentChannelConfig.interrupt.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
int i;
for(i=0; i<TESTED_SENT_CHANNELS; ++i)
{
// pin configuration
const IfxSent_Sent_Pins sentPins[TESTED_SENT_CHANNELS] =
{
{ // Channel 0
&IfxSent_SENT0C_P02_8_IN, IfxPort_InputMode_noPullDevice, // SENT input
&IfxSent_SPC0_P00_1_OUT, IfxPort_OutputMode_openDrain, // SENT output
IfxPort_PadDriver_cmosAutomotiveSpeed1
},
{ // Channel 1
&IfxSent_SENT1C_P02_7_IN, IfxPort_InputMode_noPullDevice, // SENT input
&IfxSent_SPC1_P02_7_OUT, IfxPort_OutputMode_openDrain, // SENT output
IfxPort_PadDriver_cmosAutomotiveSpeed1
},
{ // Channel 2
&IfxSent_SENT2C_P02_6_IN, IfxPort_InputMode_noPullDevice, // SENT input
&IfxSent_SPC2_P00_3_OUT, IfxPort_OutputMode_openDrain, // SENT output
IfxPort_PadDriver_cmosAutomotiveSpeed1
},
};
sentChannelConfig.pins = &sentPins[i];
// set channel
sentChannelConfig.channelId = (IfxSent_ChannelId)i;
// initialize channel
IfxSent_Sent_initChannel(&sentChannel[i], &sentChannelConfig);
}

Interrupt Service Handler

The ISR has to be implemented in the application. Following template can be used to react on the events:

void SentInterruptHandler(IfxSent_Sent_Channel *channel)
{
Ifx_SENT_CH_INTSTAT interruptStatus = IfxSent_Sent_getAndClearInterruptStatus(channel);
if( interruptStatus.U )
{
// check for error conditions
if (interruptStatus.U & IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS)
{
// * Receive Buffer Overflow
// * This bit is set after a frame has been received while the old one was
// * not read from RDRx. I.e. the kernel wants to set any of the two
// * interrupts RSI and RDI and finds any of these two interrupts already
// * set. The old data is overwritten by the new data.
// *
if (interruptStatus.B.RBI)
{
// insert your error handling code here
__debug();
}
// * Transmit Buffer Underflow
// * This bit is set after data has been completely transferred (PLEN
// * exceeded) and no new data was written to SCRx.
// *
if (interruptStatus.B.TBI)
{
// insert your error handling code here
__debug();
}
// * Frequency Range Error
// * This bit is set after a Synchronization / Calibration pulse was
// * received that deviates more than +- 25% from the nominal value.
// * The referring data is ignored.
// *
if (interruptStatus.B.FRI)
{
// insert your error handling code here
__debug();
}
// * Frequency Drift Error
// * This bit is set after a subsequent Synchronization / Calibration
// * pulse was received that deviates more than 1.5625% (1/64) from its
// * predecessor.
// *
if (interruptStatus.B.FDI)
{
// insert your error handling code here
__debug();
}
// * Wrong Number of Nibbles
// * This bit is set after a more nibbles have been received than expected
// * or a Synchronization / Calibration Pulse is received too early thus
// * too few nibbles have been received
// *
if (interruptStatus.B.NNI)
{
// insert your error handling code here
__debug();
}
// * Nibbles Value out of Range
// * This bit is set after a too long or too short nibble pulse has been
// * received. I.e. value < 0 or value > 15.
// *
if (interruptStatus.B.NVI)
{
// insert your error handling code here
__debug();
}
// * CRC Error
// * This bit is set if the CRC check fails.
// *
if (interruptStatus.B.CRCI)
{
// insert your error handling code here
__debug();
}
// * Wrong Status and Communication Nibble Error
// * In standard Serial Frame Mode (RCR.ESF is cleared), this bit is set
// * if the Status and Communication nibble shows a start bit in a frame
// * other than frame number n x 16.
// * In Extended Serial Frame Mode this bit is without function.
// *
if (interruptStatus.B.WSI)
{
// insert your error handling code here
__debug();
}
// * Serial Data CRC Error
// * This bit is set if the CRC of the serial message fails.
// * In Extended Serial Message Format, this includes a check of the Serial
// * Communication Nibble for correct 0 values of bit 3 in frames 7, 13 and 18.
// *
if (interruptStatus.B.SCRI)
{
// insert your error handling code here
__debug();
}
// * Watch Dog Error
// * This bit is set if the Watch Dog Timer of the channel expires.
// *
if (interruptStatus.B.WDI)
{
// insert your error handling code here
__debug();
}
}
// transaction events
// * Receive Data
// * RDI is activated when a received frame is moved to a Receive Data
// * Register RDR. Both RDI and RSI will be issued together in normal use
// * cases where the frame size is not bigger than 8 nibbles and CRC is
// * correct or not checked (if RCRx.CDIS is cleared).
// *
if (interruptStatus.B.RDI)
{
// * Ignore RDI bit, useful only when Frame Length is greater than
// * 8 nibbles since it can indicate that end of frame
// *
}
// * Receive Success
// * This bit is set at the successfully received end of a frame.
// * Depending on bit RCRx.CDIS this indicates a successful check of the CRC.
// *
if (interruptStatus.B.RSI)
{
// here you could handle the incoming frame:
IfxSent_Sent_Frame frame;
IfxSent_Sent_readChannelSerialDataFrame(channel, &frame);
// do something with the incoming data
}
// * Transfer Data
// * This bit is set after the trigger condition was detected. Data to be
// * transferred has been moved internally. Thus a new value can be written
// * to SCRx. This can be used for back to back transfers.
// *
if (interruptStatus.B.TDI)
{
}
// * Serial Data Received
// * This bit is set after all serial data bits have been received via the
// * Status and Communication nibble. Depending on bit RCRx.SCDIS this
// * indicates a successful check of the CRC.
// *
if (interruptStatus.B.SDI)
{
// here you could handle the incoming message:
// decode incoming message
IfxSent_Sent_SerialMessageFrame message;
IfxSent_Sent_readChannelSerialMessageFrame(channel, &message);
// do something with the incoming message
}
}
}

Frame Decoding

Following code snippet shows, how incoming data of a TLE4998S device can be decoded:

static void parseSensorData(IfxSent_Sent_Frame *frame)
{
uint32 data = frame->data;
uint8 statusNibble = frame->statusNibble;
// select B range [mT]
const uint8 rangeValTable[4] = { 200, 100, 50, 0 };
uint8 rangeVal = rangeValTable[statusNibble & 3];
uint16 hallVal = (short)((((data & 0xFFFF) * rangeVal) / 0x7FFF) - rangeVal);
uint16 temperature = ((short)((data >> 16) & 0x00FF) - 55);
// do something with the values here...
}


iLLD_TC26B: Interface Driver

Modules
Interface Driver
iLLD » SENT
Collaboration diagram for Interface Driver:

Modules

Data Structures
Module Functions
Channel Functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » SENT » Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxSent_Sent_Enable
Specifies the Interrupt type enables structure. More...
struct | IfxSent_Sent
Specifies SENT handle structure. More...
union | IfxSent_Sent_EnabledInterrupts
Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once via the ALL member. More...
struct | IfxSent_Sent_InputOutputControl
Specifies the input output control properties. More...
struct | IfxSent_Sent_Interrupt
Specifies the interrupt control properties. More...
struct | IfxSent_Sent_InterruptNodeControl
Specifies the interrupt control properties structure. More...
struct | IfxSent_Sent_NibbleControl
Specifies the received nibbles control properties. More...
struct | IfxSent_Sent_Pins
Specifies the pins configuration for SENT channel. More...
struct | IfxSent_Sent_ReceiveControl
Specifies the receive control properties. More...
struct | IfxSent_Sent_TransmitControl
Specifies the SPC channel properties structure. More...
struct | IfxSent_Sent_Channel
Specifies the SENT Channel handle structure. More...
struct | IfxSent_Sent_ChannelConfig
Specifies the SENT Channel configuration structure. More...
struct | IfxSent_Sent_Config
Specifies the SENT module configuration structure. More...
struct | IfxSent_Sent_Frame
Specifies the frame configuration structure for a channel. More...
struct | IfxSent_Sent_SerialMessageFrame
Specifies received message frame. More...

Detailed Description

Data Structure Documentation

◆ IfxSent_Sent_Enable

struct IfxSent_Sent_Enable

Specifies the Interrupt type enables structure.

Definition at line 396 of file IfxSent_Sent.h.

Data Fields
uint8 | crcErrorInterrupt | Specifies CRC error interrupt enable.
uint8 | frequencyDriftErrorInterrupt | Specifies frequency drift error interrupt enable.
uint8 | frequencyRangeErrorInterrupt | Specifies frequency not in the range error interrupt enable.
uint8 | nibblesValueOutOfRangeErrorInterrupt | Specifies nibble value out of range error interrupt enable.
uint8 | nibblesWrongErrorInterrupt | Specifies nibbles wrong error interrupt enable.
uint8 | receiveBufferOverflowInterrupt | Specifies receive buffer overflow interrupt enable.
uint8 | receiveDataInterrupt | Specifies receive data interrupt enable.
uint8 | receiveSuccessInterrupt | Specifies receive success interrupt enable.
uint8 | serialDataCrcErrorInterrupt | Specifies serial data CRC error interrupt enable.
uint8 | serialDataReceiveInterrupt | Specifies serial data interrupt enable.
uint8 | transferBufferUnderflowInterrupt | Specifies transfer buffer underflow interrupt enable.
uint8 | transferDataInterrupt | Specifies transfer data interrupt enable.
uint8 | watchdogErrorInterrupt | Specifies watchdog error interrupt enable.
uint8 | wrongStatusNibbleErrorInterrupt | Specifies wrong status nibble error interrupt enable.

◆ IfxSent_Sent

struct IfxSent_Sent

Specifies SENT handle structure.

Definition at line 420 of file IfxSent_Sent.h.

Data Fields
Ifx_SENT * sent Specifies pointer to SENT registers.

◆ IfxSent_Sent_EnabledInterrupts

union IfxSent_Sent_EnabledInterrupts

Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once via the ALL member.

Definition at line 427 of file IfxSent_Sent.h.

Collaboration diagram for IfxSent_Sent_EnabledInterrupts:
[legend]
Data Fields
uint32 | ALL | Specifies to write and read to/from all flags as once via the ALL member.
IfxSent_Sent_Enable | enable | Structure contains the interrupt flags.

◆ IfxSent_Sent_InputOutputControl

struct IfxSent_Sent_InputOutputControl

Specifies the input output control properties.

Definition at line 435 of file IfxSent_Sent.h.

Data Fields
IfxSent_DigitalGlitchesLength | digitalGlitchFilterDepth | Specifies the Digital Glitch Filter depth for input signal delay.
boolean | edgeCounterCleared | Specifies the edge counter reset.
IfxSent_ExternalTrigger | externalTrigger | Specifies the external trigger line source.
boolean | glitchFallingCleared | Specifies the glitch falling edge clear.
boolean | glitchRisingCleared | Specifies the glitch rising edge clear.
boolean | inputPulsePolarityHigh | Specifies the polarity of input of each channel.
boolean | outputPulsePolarityHigh | Specifies the polarity of input of each channel.
boolean | triggerMonitorCleared | Specifies the trigger monitor reset.

◆ IfxSent_Sent_Interrupt

struct IfxSent_Sent_Interrupt

Specifies the interrupt control properties.

Definition at line 449 of file IfxSent_Sent.h.

Data Fields
IfxSrc_Tos | isrProvider | Specifies the interrupt service provider. CPU or DMA.
uint16 | priority | Specifies the interrupt priority. Always 1 since all interrupts are handled at a time.

◆ IfxSent_Sent_InterruptNodeControl

struct IfxSent_Sent_InterruptNodeControl

Specifies the interrupt control properties structure.

Definition at line 457 of file IfxSent_Sent.h.

Data Fields
IfxSent_InterruptNodePointer | errorInterruptNode | Specifies the interrupt node for erri request.
IfxSent_InterruptNodePointer | receiveBufferOverflowInterruptNode | Specifies the interrupt node for rbi request.
IfxSent_InterruptNodePointer | receiveDataInterruptNode | Specifies the interrupt node for rdi request.
IfxSent_InterruptNodePointer | receiveSuccessInterruptNode | Specifies the interrupt node for rsi request.
IfxSent_InterruptNodePointer | serialDataReceiveInterruptNode | Specifies the interrupt node for sdi request.
IfxSent_InterruptNodePointer | transferBufferUnderflowInterruptNode | Specifies the interrupt node for tbi request.
IfxSent_InterruptNodePointer | transferDataInterruptNode | Specifies the interrupt node for tdi request.
IfxSent_InterruptNodePointer | watchdogErrorInterruptNode | Specifies the interrupt node for wdi request.

◆ IfxSent_Sent_NibbleControl

struct IfxSent_Sent_NibbleControl

Specifies the received nibbles control properties.

Definition at line 471 of file IfxSent_Sent.h.

Data Fields
IfxSent_Nibble | nibblePointer0 | Specifies the received nibble0 control.
IfxSent_Nibble | nibblePointer1 | Specifies the received nibble1 control.
IfxSent_Nibble | nibblePointer2 | Specifies the received nibble2 control.
IfxSent_Nibble | nibblePointer3 | Specifies the received nibble3 control.
IfxSent_Nibble | nibblePointer4 | Specifies the received nibble4 control.
IfxSent_Nibble | nibblePointer5 | Specifies the received nibble5 control.
IfxSent_Nibble | nibblePointer6 | Specifies the received nibble6 control.
IfxSent_Nibble | nibblePointer7 | Specifies the received nibble7 control.

◆ IfxSent_Sent_Pins

struct IfxSent_Sent_Pins

Specifies the pins configuration for SENT channel.

Definition at line 485 of file IfxSent_Sent.h.

Collaboration diagram for IfxSent_Sent_Pins:
[legend]
Data Fields
IFX_CONST IfxSent_Sent_In * | in | Specifies input pin configuration.
IfxPort_InputMode | inMode | Specifies input pin mode.
IFX_CONST IfxSent_Spc_Out * | out | Specifies output pin configuration.
IfxPort_OutputMode | outMode | Specifies output pin mode.
IfxPort_PadDriver | pinDriver | Pad driver mode definition.

◆ IfxSent_Sent_ReceiveControl

struct IfxSent_Sent_ReceiveControl

Specifies the receive control properties.

Definition at line 496 of file IfxSent_Sent.h.

Data Fields
boolean | alternateCrcSelected | Specifies the CRC is calculated for both fast and serial messages.
boolean | crcMethodDisabled | Specifies the CRC with zero nibbles disabled or enabled.
boolean | crcModeDisabled | Specifies the CRC mode disabled mode.
boolean | driftErrorsDisabled | Specifies the drift errors enabled or disabled.
boolean | endPulseIgnored | Specifies the pause pulse during synchronization.
IfxSent_ExtendedSerialFrameMode | extendedSerialFrameMode | Specifies the extended serial frame mode.
IfxSent_FrameCheckMode | frameCheckMode | Specifies the frame check mode for valid frame.
uint8 | frameLength | Specifies frame length in nibbles.
boolean | serialDataDisabledCrcDisabled | Specifies the CRC disable for serial data disabled mode.
boolean | serialDataProcessingEnabled | Specifies the serial data processing mode.
boolean | statusNibbleEnabled | Specifies the status nibble to include in CRC.
boolean | suspendTriggered | Specifies the suspend trigger disables the channel or not.

◆ IfxSent_Sent_TransmitControl

struct IfxSent_Sent_TransmitControl

Specifies the SPC channel properties structure.

Definition at line 514 of file IfxSent_Sent.h.

Data Fields
uint8 | pulseDelayLength | Specifies the pulse delay length.
uint8 | pulseLength | Specifies the pulse length in ticktimes.
IfxSent_SpcMode | spcMode | Specifies the SENT SPC operational mode.
IfxSent_TimeBase | timeBase | Specifies the pulse time base.
IfxSent_TriggerSource | triggerSource | Specifies the trigger source and mode.

◆ IfxSent_Sent_Channel

struct IfxSent_Sent_Channel

Specifies the SENT Channel handle structure.

Definition at line 529 of file IfxSent_Sent.h.

Collaboration diagram for IfxSent_Sent_Channel:
[legend]
Data Fields
Ifx_SENT_CH * | channel | Specifies the pointer SENT channel registers.
IfxSent_ChannelId | channelId | Specifies the SENT channel number.
IfxSent_Sent * | driver | Specifies the pointer to SENT module handler.

◆ IfxSent_Sent_ChannelConfig

struct IfxSent_Sent_ChannelConfig

Specifies the SENT Channel configuration structure.

Definition at line 538 of file IfxSent_Sent.h.

Collaboration diagram for IfxSent_Sent_ChannelConfig:
[legend]
Data Fields
IfxSent_ChannelId | channelId | Specifies the SENT channel number.
IfxSent_Sent * | driver | Specifies the pointer to SENT module handler.
IfxSent_Sent_EnabledInterrupts | enabledInterrupts |
IfxSent_Sent_InputOutputControl | inputOutputControl | Specifies the input output controllable properties.
IfxSent_Sent_Interrupt | interrupt | Specifies the interrupt control properties structure.
IfxSent_Sent_InterruptNodeControl | interuptNodeControl | Specifies the interrupt control properties structure.
IfxSent_Sent_NibbleControl | nibbleControl | Specifies the received nibbles control properties.
IFX_CONST IfxSent_Sent_Pins * | pins | Specifies the pins configuration for SENT channel.
IfxSent_Sent_ReceiveControl | receiveControl | Specifies the receive control properties.
boolean | spcModeOn | Specifies the SENT SPC mode enable/disable.
IfxSent_Sent_TransmitControl | transmitControl | Specifies the transmit control properties.
float32 | tUnit | desired unit time (f_tick), e.g. 3E-6 for 3 uS
uint16 | watchDogTimerLimit | Speciifes the enabled interrupts for each Channel.

◆ IfxSent_Sent_Config

struct IfxSent_Sent_Config

Specifies the SENT module configuration structure.

Definition at line 557 of file IfxSent_Sent.h.

Data Fields
Ifx_SENT * | module | Specifies pointer to SENT registers.
boolean | sleepModeEnabled | Specifies SENT enable/disable.
uint32 | timeStampPreDivider | Specifies the pre-divider to get clock in time stamp.

◆ IfxSent_Sent_Frame

struct IfxSent_Sent_Frame

Specifies the frame configuration structure for a channel.

Definition at line 566 of file IfxSent_Sent.h.

Data Fields
uint32 | data | Contains the data from last received frame.
uint8 | statusNibble | Contains the status and communication Nibble of last received frame.
uint32 | timeStamp | Contains the timestamp of last received frame.

◆ IfxSent_Sent_SerialMessageFrame

struct IfxSent_Sent_SerialMessageFrame

Specifies received message frame.

Definition at line 575 of file IfxSent_Sent.h.

Data Fields
IfxSent_ConfigBit | configBit | Contains the received configuration bit value.
uint8 | crc | Contains the received CRC value.
uint8 | messageId | Contains the received message ID value.
uint16 | serialData | Contains the received serial data value.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » SENT » Interface Driver
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxSent_Sent_deInitModule (IfxSent_Sent *driver)
Reset the SENT module. More...
IFX_EXTERN boolean | IfxSent_Sent_initModule (IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
Initialise the SENT with the supplied configureation. More...
IFX_EXTERN void | IfxSent_Sent_initModuleConfig (IfxSent_Sent_Config *config, Ifx_SENT *sent)
Initialise buffer with default SENT configuration. More...

Detailed Description

Function Documentation

◆ IfxSent_Sent_deInitModule()

IFX_EXTERN void IfxSent_Sent_deInitModule ( IfxSent_Sent * driver )

Reset the SENT module.

Parameters
driver pointer to the SENT module handler
Returns
None

Definition at line 55 of file IfxSent_Sent.c.

◆ IfxSent_Sent_initModule()

IFX_EXTERN boolean IfxSent_Sent_initModule | ( | IfxSent_Sent * | driver,
 |  | const IfxSent_Sent_Config * | config
 | ) |  |

Initialise the SENT with the supplied configureation.

Parameters
driver | pointer to the SENT module handler
config | pointer to the SENT module configuration
Returns
TRUE if valid configuration otherwise FALSE

Usage example: see How to use the SENT Interface driver?

Definition at line 284 of file IfxSent_Sent.c.

◆ IfxSent_Sent_initModuleConfig()

IFX_EXTERN void IfxSent_Sent_initModuleConfig | ( | IfxSent_Sent_Config * | config,
 |  | Ifx_SENT * | sent
 | ) |  |

Initialise buffer with default SENT configuration.

Parameters
config | pointer to the SENT module configuration
sent | base address of the SENT register space
Returns
None

Usage example: see How to use the SENT Interface driver?

Definition at line 310 of file IfxSent_Sent.c.


iLLD_TC26B: Channel Functions

Functions
Channel Functions
iLLD » SENT » Interface Driver
Collaboration diagram for Channel Functions:

Functions

IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_Sent_getAndClearInterruptStatus (IfxSent_Sent_Channel *channel)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware. More...
IFX_EXTERN boolean | IfxSent_Sent_initChannel (IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxSent_Sent_initChannelConfig (IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
Initialise channel buffer with default SENT channel configuration. More...
IFX_EXTERN boolean | IfxSent_Sent_readChannelSerialDataFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
Reads the nibbles recieved in the Data register. More...
IFX_EXTERN boolean | IfxSent_Sent_readChannelSerialMessageFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
reads the Serial data recieved and collected over several SENT frames More...

Detailed Description

Function Documentation

◆ IfxSent_Sent_getAndClearInterruptStatus()

IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_Sent_getAndClearInterruptStatus ( IfxSent_Sent_Channel * channel )

Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware.

This function should be used in an ISR to retrieve the events which triggered the interrupt.

Parameters
channel Specifies the SENT Channel handle structure
Returns
Interrupt flags which have been cleared.

Usage example: see How to use the SENT Interface driver?

Definition at line 688 of file IfxSent_Sent.h.

◆ IfxSent_Sent_initChannel()

IFX_EXTERN boolean IfxSent_Sent_initChannel | ( | IfxSent_Sent_Channel * | channel,
 |  | const IfxSent_Sent_ChannelConfig * | config
 | ) |  |

Initialize the channel with the supplied configuration.

Parameters
channel | pointer to the SENT channel
config | pointer to the SENT channel configuration
Returns
TRUE if valid configuration otherwise FALSE

Usage example: see How to use the SENT Interface driver?

Definition at line 65 of file IfxSent_Sent.c.

◆ IfxSent_Sent_initChannelConfig()

IFX_EXTERN void IfxSent_Sent_initChannelConfig | ( | IfxSent_Sent_ChannelConfig * | config,
 |  | IfxSent_Sent * | driver
 | ) |  |

Initialise channel buffer with default SENT channel configuration.

Parameters
config | pointer to the SENT channel configuration
driver | pointer to the SENT module handler
Returns
None

Usage example: see How to use the SENT Interface driver?

Definition at line 215 of file IfxSent_Sent.c.

◆ IfxSent_Sent_readChannelSerialDataFrame()

IFX_EXTERN boolean IfxSent_Sent_readChannelSerialDataFrame | ( | IfxSent_Sent_Channel * | channel,
 |  | IfxSent_Sent_Frame * | frame
 | ) |  |

Reads the nibbles recieved in the Data register.

Parameters
channel | SENT Channel whose data has to be read
frame | Data read from the SENT Channel
Returns
TRUE if data received otherwise false

Usage example: see How to use the SENT Interface driver?

Definition at line 323 of file IfxSent_Sent.c.

◆ IfxSent_Sent_readChannelSerialMessageFrame()

IFX_EXTERN boolean IfxSent_Sent_readChannelSerialMessageFrame | ( | IfxSent_Sent_Channel * | channel,
 |  | IfxSent_Sent_SerialMessageFrame * | message
 | ) |  |

reads the Serial data recieved and collected over several SENT frames

Parameters
channel | reads the Serial data recieved and collected over several SENT frames
message | Data pointer pointing to the serial data read from the SENT Channel
Returns
TRUE if serial message received otherwise false

Usage example: see How to use the SENT Interface driver?

Definition at line 337 of file IfxSent_Sent.c.


iLLD_TC26B: IfxSent_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxSent_cfg.h File Reference
iLLD » SENT

SENT on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXSENT_CFG_CHANNEL_INTEN (0x1FEDU)
Specifies all interrupt events. More...
#define | IFXSENT_CFG_STEP_RANGE (1024)
Specifies the step range for calculating module clock. More...
#define | IFXSENT_CFG_TIMEOUT_VALUE ((uint16)0xFFFFU)
Specifies timeout value in transmission. More...
#define | IFXSENT_NUM_CHANNELS (6)
#define | IFXSENT_NUM_MODULES (1)

Enumerations

enum IfxSent_ChannelId {
IfxSent_ChannelId_0 = 0,
IfxSent_ChannelId_1 = 1,
IfxSent_ChannelId_2 = 2,
IfxSent_ChannelId_3 = 3,
IfxSent_ChannelId_4 = 4,
IfxSent_ChannelId_5 = 5,
IfxSent_ChannelId_none = -1
}
Specifies the channel Id. More...

Detailed Description

SENT on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSent_cfg.h.

Macro Definition Documentation

◆ IFXSENT_CFG_CHANNEL_INTEN

#define IFXSENT_CFG_CHANNEL_INTEN (0x1FEDU)

Specifies all interrupt events.

Definition at line 65 of file IfxSent_cfg.h.

Referenced by IfxSent_Sent_initChannelConfig().

◆ IFXSENT_CFG_STEP_RANGE

#define IFXSENT_CFG_STEP_RANGE (1024)

Specifies the step range for calculating module clock.

Definition at line 69 of file IfxSent_cfg.h.

◆ IFXSENT_CFG_TIMEOUT_VALUE

#define IFXSENT_CFG_TIMEOUT_VALUE ((uint16)0xFFFFU)

Specifies timeout value in transmission.

Definition at line 73 of file IfxSent_cfg.h.

Referenced by IfxSent_Sent_initChannel().

◆ IFXSENT_NUM_CHANNELS

#define IFXSENT_NUM_CHANNELS (6)

Definition at line 75 of file IfxSent_cfg.h.

◆ IFXSENT_NUM_MODULES

#define IFXSENT_NUM_MODULES (1)

Definition at line 77 of file IfxSent_cfg.h.

Enumeration Type Documentation

◆ IfxSent_ChannelId

enum IfxSent_ChannelId

Specifies the channel Id.

Enumerator
IfxSent_ChannelId_0 | Specifies the channel Id 0.
IfxSent_ChannelId_1 | Specifies the channel Id 1.
IfxSent_ChannelId_2 | Specifies the channel Id 2.
IfxSent_ChannelId_3 | Specifies the channel Id 3.
IfxSent_ChannelId_4 | Specifies the channel Id 4.
IfxSent_ChannelId_5 | Specifies the channel Id 5.
IfxSent_ChannelId_none | None Sent channels.

Definition at line 85 of file IfxSent_cfg.h.


iLLD_TC26B: IfxSent_PinMap.c File Reference

  • _PinMap
Variables
IfxSent_PinMap.c File Reference
iLLD » SENT

SENT I/O map. More...

#include "IfxSent_PinMap.h"
Include dependency graph for IfxSent_PinMap.c:

Go to the source code of this file.

Variables

IfxSent_Sent_In | IfxSent_SENT0A_AN24_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {NULL_PTR,24}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT0A_P40_0_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P40, 0}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT0B_P00_1_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT0C_P02_8_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P02, 8}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT1A_AN25_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {NULL_PTR,25}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT1A_P40_1_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P40, 1}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT1B_P00_2_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P00, 2}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT1C_P02_7_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT2A_AN26_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {NULL_PTR,26}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT2A_P40_2_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P40, 2}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT2B_P00_3_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT2C_P02_6_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P02, 6}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT2D_AN36_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {NULL_PTR,36}, Ifx_RxSel_d}
IfxSent_Sent_In | IfxSent_SENT2D_P40_6_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P40, 6}, Ifx_RxSel_d}
IfxSent_Sent_In | IfxSent_SENT3A_AN27_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {NULL_PTR,27}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT3A_P40_3_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P40, 3}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT3B_P00_4_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT3C_P02_5_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P02, 5}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT3D_AN37_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {NULL_PTR,37}, Ifx_RxSel_d}
IfxSent_Sent_In | IfxSent_SENT3D_P40_7_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P40, 7}, Ifx_RxSel_d}
IfxSent_Sent_In | IfxSent_SENT4A_AN38_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {NULL_PTR,38}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT4A_P40_8_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P40, 8}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT4B_P00_5_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT4C_P33_6_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P33, 6}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT5A_AN39_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {NULL_PTR,39}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT5A_P40_9_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P40, 9}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT5B_P00_6_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT5C_P33_5_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P33, 5}, Ifx_RxSel_c}
IfxSent_Spc_Out | IfxSent_SPC0_P00_1_OUT = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC1_P02_7_OUT = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC2_P00_3_OUT = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC3_P00_4_OUT = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC4_P00_5_OUT = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC5_P00_6_OUT = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt6}
const IfxSent_Sent_In * | IfxSent_Sent_In_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]
const IfxSent_Spc_Out * | IfxSent_Spc_Out_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]

Detailed Description

SENT I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSent_PinMap.c.

Variable Documentation

◆ IfxSent_SENT0A_AN24_IN

IfxSent_Sent_In IfxSent_SENT0A_AN24_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {NULL_PTR,24}, Ifx_RxSel_a}

Definition at line 45 of file IfxSent_PinMap.c.

◆ IfxSent_SENT0A_P40_0_IN

IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P40, 0}, Ifx_RxSel_a}

Definition at line 46 of file IfxSent_PinMap.c.

◆ IfxSent_SENT0B_P00_1_IN

IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_b}

Definition at line 47 of file IfxSent_PinMap.c.

◆ IfxSent_SENT0C_P02_8_IN

IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P02, 8}, Ifx_RxSel_c}

Definition at line 48 of file IfxSent_PinMap.c.

◆ IfxSent_SENT1A_AN25_IN

IfxSent_Sent_In IfxSent_SENT1A_AN25_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {NULL_PTR,25}, Ifx_RxSel_a}

Definition at line 49 of file IfxSent_PinMap.c.

◆ IfxSent_SENT1A_P40_1_IN

IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P40, 1}, Ifx_RxSel_a}

Definition at line 50 of file IfxSent_PinMap.c.

◆ IfxSent_SENT1B_P00_2_IN

IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P00, 2}, Ifx_RxSel_b}

Definition at line 51 of file IfxSent_PinMap.c.

◆ IfxSent_SENT1C_P02_7_IN

IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, Ifx_RxSel_c}

Definition at line 52 of file IfxSent_PinMap.c.

◆ IfxSent_SENT2A_AN26_IN

IfxSent_Sent_In IfxSent_SENT2A_AN26_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {NULL_PTR,26}, Ifx_RxSel_a}

Definition at line 53 of file IfxSent_PinMap.c.

◆ IfxSent_SENT2A_P40_2_IN

IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P40, 2}, Ifx_RxSel_a}

Definition at line 54 of file IfxSent_PinMap.c.

◆ IfxSent_SENT2B_P00_3_IN

IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, Ifx_RxSel_b}

Definition at line 55 of file IfxSent_PinMap.c.

◆ IfxSent_SENT2C_P02_6_IN

IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P02, 6}, Ifx_RxSel_c}

Definition at line 56 of file IfxSent_PinMap.c.

◆ IfxSent_SENT2D_AN36_IN

IfxSent_Sent_In IfxSent_SENT2D_AN36_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {NULL_PTR,36}, Ifx_RxSel_d}

Definition at line 57 of file IfxSent_PinMap.c.

◆ IfxSent_SENT2D_P40_6_IN

IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P40, 6}, Ifx_RxSel_d}

Definition at line 58 of file IfxSent_PinMap.c.

◆ IfxSent_SENT3A_AN27_IN

IfxSent_Sent_In IfxSent_SENT3A_AN27_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {NULL_PTR,27}, Ifx_RxSel_a}

Definition at line 59 of file IfxSent_PinMap.c.

◆ IfxSent_SENT3A_P40_3_IN

IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P40, 3}, Ifx_RxSel_a}

Definition at line 60 of file IfxSent_PinMap.c.

◆ IfxSent_SENT3B_P00_4_IN

IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, Ifx_RxSel_b}

Definition at line 61 of file IfxSent_PinMap.c.

◆ IfxSent_SENT3C_P02_5_IN

IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P02, 5}, Ifx_RxSel_c}

Definition at line 62 of file IfxSent_PinMap.c.

◆ IfxSent_SENT3D_AN37_IN

IfxSent_Sent_In IfxSent_SENT3D_AN37_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {NULL_PTR,37}, Ifx_RxSel_d}

Definition at line 63 of file IfxSent_PinMap.c.

◆ IfxSent_SENT3D_P40_7_IN

IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P40, 7}, Ifx_RxSel_d}

Definition at line 64 of file IfxSent_PinMap.c.

◆ IfxSent_SENT4A_AN38_IN

IfxSent_Sent_In IfxSent_SENT4A_AN38_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {NULL_PTR,38}, Ifx_RxSel_a}

Definition at line 65 of file IfxSent_PinMap.c.

◆ IfxSent_SENT4A_P40_8_IN

IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P40, 8}, Ifx_RxSel_a}

Definition at line 66 of file IfxSent_PinMap.c.

◆ IfxSent_SENT4B_P00_5_IN

IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, Ifx_RxSel_b}

Definition at line 67 of file IfxSent_PinMap.c.

◆ IfxSent_SENT4C_P33_6_IN

IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P33, 6}, Ifx_RxSel_c}

Definition at line 68 of file IfxSent_PinMap.c.

◆ IfxSent_SENT5A_AN39_IN

IfxSent_Sent_In IfxSent_SENT5A_AN39_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {NULL_PTR,39}, Ifx_RxSel_a}

Definition at line 69 of file IfxSent_PinMap.c.

◆ IfxSent_SENT5A_P40_9_IN

IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P40, 9}, Ifx_RxSel_a}

Definition at line 70 of file IfxSent_PinMap.c.

◆ IfxSent_SENT5B_P00_6_IN

IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, Ifx_RxSel_b}

Definition at line 71 of file IfxSent_PinMap.c.

◆ IfxSent_SENT5C_P33_5_IN

IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P33, 5}, Ifx_RxSel_c}

Definition at line 72 of file IfxSent_PinMap.c.

◆ IfxSent_Sent_In_pinTable

const IfxSent_Sent_In* IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]

Definition at line 81 of file IfxSent_PinMap.c.

◆ IfxSent_SPC0_P00_1_OUT

IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt6}

Definition at line 73 of file IfxSent_PinMap.c.

◆ IfxSent_SPC1_P02_7_OUT

IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt6}

Definition at line 74 of file IfxSent_PinMap.c.

◆ IfxSent_SPC2_P00_3_OUT

IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt6}

Definition at line 75 of file IfxSent_PinMap.c.

◆ IfxSent_SPC3_P00_4_OUT

IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt6}

Definition at line 76 of file IfxSent_PinMap.c.

◆ IfxSent_SPC4_P00_5_OUT

IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt6}

Definition at line 77 of file IfxSent_PinMap.c.

◆ IfxSent_SPC5_P00_6_OUT

IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt6}

Definition at line 78 of file IfxSent_PinMap.c.

◆ IfxSent_Spc_Out_pinTable

const IfxSent_Spc_Out* IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]
Initial value:
= {
{
{
&IfxSent_SPC0_P00_1_OUT
},
{
&IfxSent_SPC1_P02_7_OUT
},
{
&IfxSent_SPC2_P00_3_OUT
},
{
&IfxSent_SPC3_P00_4_OUT
},
{
&IfxSent_SPC4_P00_5_OUT
},
{
&IfxSent_SPC5_P00_6_OUT
}
}
}
IfxSent_SPC5_P00_6_OUT
IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT
Definition: IfxSent_PinMap.c:78
IfxSent_SPC1_P02_7_OUT
IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT
Definition: IfxSent_PinMap.c:74
IfxSent_SPC4_P00_5_OUT
IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT
Definition: IfxSent_PinMap.c:77
IfxSent_SPC0_P00_1_OUT
IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT
Definition: IfxSent_PinMap.c:73
IfxSent_SPC2_P00_3_OUT
IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT
Definition: IfxSent_PinMap.c:75
IfxSent_SPC3_P00_4_OUT
IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT
Definition: IfxSent_PinMap.c:76

Definition at line 122 of file IfxSent_PinMap.c.


iLLD_TC26B: IfxSent_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxSent_PinMap.h File Reference
iLLD » SENT

SENT I/O map. More...

#include <IfxSent_reg.h>
#include <_Impl/IfxSent_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxSent_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxSent_Sent_In
SENT pin mapping structure. More...
struct | IfxSent_Spc_Out
SPC pin mapping structure. More...

Macros

#define | IFXSENT_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSENT_PINMAP_NUM_CHANNELS 6
#define | IFXSENT_PINMAP_SENT_IN_NUM_ITEMS 4
#define | IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS 1

Variables

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_AN24_IN
SENT_SENT0A: SENT input channel 0 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN
SENT_SENT0A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN
SENT_SENT0B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN
SENT_SENT0C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_AN25_IN
SENT_SENT1A: SENT input channel 1 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN
SENT_SENT1A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN
SENT_SENT1B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN
SENT_SENT1C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_AN26_IN
SENT_SENT2A: SENT input channel 2 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN
SENT_SENT2A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN
SENT_SENT2B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN
SENT_SENT2C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_AN36_IN
SENT_SENT2D: SENT input channel 2 pin D. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN
SENT_SENT2D: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_AN27_IN
SENT_SENT3A: SENT input channel 3 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN
SENT_SENT3A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN
SENT_SENT3B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN
SENT_SENT3C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_AN37_IN
SENT_SENT3D: SENT input channel 3 pin D. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN
SENT_SENT3D: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_AN38_IN
SENT_SENT4A: SENT input channel 4 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN
SENT_SENT4A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN
SENT_SENT4B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN
SENT_SENT4C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_AN39_IN
SENT_SENT5A: SENT input channel 5 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN
SENT_SENT5A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN
SENT_SENT5B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN
SENT_SENT5C: SENT input. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT
SENT_SPC0: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT
SENT_SPC1: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT
SENT_SPC2: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT
SENT_SPC3: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT
SENT_SPC4: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT
SENT_SPC5: SENT output. More...
IFX_EXTERN const IfxSent_Sent_In * | IfxSent_Sent_In_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]
IfxSent_Sent_In table. More...
IFX_EXTERN const IfxSent_Spc_Out * | IfxSent_Spc_Out_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]
IfxSent_Spc_Out table. More...

Detailed Description

SENT I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSent_PinMap.h.


iLLD_TC26B: IfxSent_Sent.h File Reference

  • Sent
  • Sent
Data Structures | Functions
IfxSent_Sent.h File Reference
iLLD » SENT

SENT SENT details. More...

#include "Scu/Std/IfxScuWdt.h"
#include "Sent/Std/IfxSent.h"
#include "Cpu/Irq/IfxCpu_Irq.h"
Include dependency graph for IfxSent_Sent.h:

Go to the source code of this file.

Data Structures

struct | IfxSent_Sent_Enable
Specifies the Interrupt type enables structure. More...
struct | IfxSent_Sent
Specifies SENT handle structure. More...
union | IfxSent_Sent_EnabledInterrupts
Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once via the ALL member. More...
struct | IfxSent_Sent_InputOutputControl
Specifies the input output control properties. More...
struct | IfxSent_Sent_Interrupt
Specifies the interrupt control properties. More...
struct | IfxSent_Sent_InterruptNodeControl
Specifies the interrupt control properties structure. More...
struct | IfxSent_Sent_NibbleControl
Specifies the received nibbles control properties. More...
struct | IfxSent_Sent_Pins
Specifies the pins configuration for SENT channel. More...
struct | IfxSent_Sent_ReceiveControl
Specifies the receive control properties. More...
struct | IfxSent_Sent_TransmitControl
Specifies the SPC channel properties structure. More...
struct | IfxSent_Sent_Channel
Specifies the SENT Channel handle structure. More...
struct | IfxSent_Sent_ChannelConfig
Specifies the SENT Channel configuration structure. More...
struct | IfxSent_Sent_Config
Specifies the SENT module configuration structure. More...
struct | IfxSent_Sent_Frame
Specifies the frame configuration structure for a channel. More...
struct | IfxSent_Sent_SerialMessageFrame
Specifies received message frame. More...

Functions

IFX_EXTERN void | IfxSent_Sent_deInitModule (IfxSent_Sent *driver)
Reset the SENT module. More...
IFX_EXTERN boolean | IfxSent_Sent_initModule (IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
Initialise the SENT with the supplied configureation. More...
IFX_EXTERN void | IfxSent_Sent_initModuleConfig (IfxSent_Sent_Config *config, Ifx_SENT *sent)
Initialise buffer with default SENT configuration. More...
IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_Sent_getAndClearInterruptStatus (IfxSent_Sent_Channel *channel)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware. More...
IFX_EXTERN boolean | IfxSent_Sent_initChannel (IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxSent_Sent_initChannelConfig (IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
Initialise channel buffer with default SENT channel configuration. More...
IFX_EXTERN boolean | IfxSent_Sent_readChannelSerialDataFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
Reads the nibbles recieved in the Data register. More...
IFX_EXTERN boolean | IfxSent_Sent_readChannelSerialMessageFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
reads the Serial data recieved and collected over several SENT frames More...

Detailed Description

SENT SENT details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSent_Sent.h.


iLLD_TC26B: IfxSent.h File Reference

  • Sent
  • Std
Macros | Enumerations | Functions
IfxSent.h File Reference
iLLD » SENT

SENT basic functionality. More...

#include "_Impl/IfxSent_cfg.h"
#include "Src/Std/IfxSrc.h"
#include "Scu/Std/IfxScuCcu.h"
#include "_PinMap/IfxSent_PinMap.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxSent_bf.h"
#include "IfxSent_reg.h"
Include dependency graph for IfxSent.h:

Go to the source code of this file.

Macros

#define IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS (0x000037f4)

Enumerations

enum IfxSent_AlternateInput {
IfxSent_AlternateInput_0 = 0,
IfxSent_AlternateInput_1,
IfxSent_AlternateInput_2,
IfxSent_AlternateInput_3
}
SENT.CH[channelId].IOCR.ALTI , Specifies alternate input for channel. More...
enum IfxSent_ChannelStatus {
IfxSent_ChannelStatus_stop = 0,
IfxSent_ChannelStatus_initialize = 1,
IfxSent_ChannelStatus_running = 2,
IfxSent_ChannelStatus_synchronize = 3
}
SENT.CH[channelId].RSR.CST, Specifies the current channel status. More...
enum IfxSent_ClockDividerMode {
IfxSent_ClockDividerMode_off = 0,
IfxSent_ClockDividerMode_normal = 1,
IfxSent_ClockDividerMode_fractional = 2
}
SENT.FDR.DM , Specifies clock divider mode. More...
enum IfxSent_ConfigBit {
IfxSent_ConfigBit_0 = 0,
IfxSent_ConfigBit_1
}
SENT.CH[channelId].SDS.CON , Specifies received configuration bit value. More...
enum IfxSent_DigitalGlitchesLength {
IfxSent_DigitalGlitchesLength_off = 0,
IfxSent_DigitalGlitchesLength_1 = 1,
IfxSent_DigitalGlitchesLength_2,
IfxSent_DigitalGlitchesLength_3,
IfxSent_DigitalGlitchesLength_4,
IfxSent_DigitalGlitchesLength_5,
IfxSent_DigitalGlitchesLength_6,
IfxSent_DigitalGlitchesLength_7,
IfxSent_DigitalGlitchesLength_8,
IfxSent_DigitalGlitchesLength_9,
IfxSent_DigitalGlitchesLength_10,
IfxSent_DigitalGlitchesLength_11,
IfxSent_DigitalGlitchesLength_12,
IfxSent_DigitalGlitchesLength_13,
IfxSent_DigitalGlitchesLength_14,
IfxSent_DigitalGlitchesLength_15
}
SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples. More...
enum IfxSent_ExtendedSerialFrameMode {
IfxSent_ExtendedSerialFrameMode_standard = 0,
IfxSent_ExtendedSerialFrameMode_extended = 1
}
SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure. More...
enum IfxSent_ExternalTrigger {
IfxSent_ExternalTrigger_0 = 0,
IfxSent_ExternalTrigger_1,
IfxSent_ExternalTrigger_2,
IfxSent_ExternalTrigger_3,
IfxSent_ExternalTrigger_4,
IfxSent_ExternalTrigger_5,
IfxSent_ExternalTrigger_6,
IfxSent_ExternalTrigger_7,
IfxSent_ExternalTrigger_8,
IfxSent_ExternalTrigger_9
}
SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line. More...
enum IfxSent_FrameCheckMode {
IfxSent_FrameCheckMode_pastSyncPulse = 0,
IfxSent_FrameCheckMode_futureSuncPulse = 1
}
SENT.CH[channelId].RCR.CFC, Specifies received frame check mode. More...
enum IfxSent_InterruptNodePointer {
IfxSent_InterruptNodePointer_0 = 0,
IfxSent_InterruptNodePointer_1,
IfxSent_InterruptNodePointer_2,
IfxSent_InterruptNodePointer_3,
IfxSent_InterruptNodePointer_trigo0 = 4,
IfxSent_InterruptNodePointer_trigo1,
IfxSent_InterruptNodePointer_trigo2,
IfxSent_InterruptNodePointer_trigo3,
IfxSent_InterruptNodePointer_trigo4,
IfxSent_InterruptNodePointer_trigo5
}
SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for respective interrupt. More...
enum IfxSent_Nibble {
IfxSent_Nibble_0 = 0,
IfxSent_Nibble_1,
IfxSent_Nibble_2,
IfxSent_Nibble_3,
IfxSent_Nibble_4,
IfxSent_Nibble_5,
IfxSent_Nibble_6,
IfxSent_Nibble_7
}
SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer. More...
enum IfxSent_SleepMode {
IfxSent_SleepMode_enable = 0,
IfxSent_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_SENT.CLC.B.EDIS. More...
enum IfxSent_SpcMode {
IfxSent_SpcMode_sync = 0,
IfxSent_SpcMode_range = 1,
IfxSent_SpcMode_bidirectional = 2
}
Specifies the SENT SPC operational mode. More...
enum IfxSent_SuspendMode {
IfxSent_SuspendMode_none = 0,
IfxSent_SuspendMode_hard = 1,
IfxSent_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxSent_TimeBase {
IfxSent_TimeBase_measuredFrequency = 0,
IfxSent_TimeBase_nominalFrequency = 1
}
SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time. More...
enum IfxSent_TriggerSource {
IfxSent_TriggerSource_off = 0,
IfxSent_TriggerSource_immediate = 1,
IfxSent_TriggerSource_fallingEdge = 2,
IfxSent_TriggerSource_externalTrigger = 3
}
SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation. More...
enum IfxSent_InterruptSource {
IfxSent_InterruptSource_rsi = 0,
IfxSent_InterruptSource_rdi = 1,
IfxSent_InterruptSource_rbi = 2,
IfxSent_InterruptSource_tdi = 3,
IfxSent_InterruptSource_tbi = 4,
IfxSent_InterruptSource_fri = 5,
IfxSent_InterruptSource_fdi = 6,
IfxSent_InterruptSource_nni = 7,
IfxSent_InterruptSource_nvi = 8,
IfxSent_InterruptSource_crci = 9,
IfxSent_InterruptSource_wsi = 10,
IfxSent_InterruptSource_sdi = 11,
IfxSent_InterruptSource_scri = 12,
IfxSent_InterruptSource_wdi = 13
}
Sent Interrupt Source. More...

Functions

IFX_INLINE void | IfxSent_setAltiInput (Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_AlternateInput alternateInput)
Sets the operation mode of SENT kernel. More...
IFX_INLINE void | IfxSent_setTimeStampPredivider (Ifx_SENT *sent, uint32 timeStampPreDivider)
Set the module time stamp pre-divider. More...
IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_getAndClearInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware. More...
IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_getChannelInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Gets the current channel status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxSent_getChannelSrc (IfxSent_ChannelId channelId)
gets the source for channel interrupt handler More...
IFX_INLINE void | IfxSent_disableChannel (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Disable the channel with the channel number. More...
IFX_INLINE void | IfxSent_disableModule (Ifx_SENT *sent)
Disable the SENT module. More...
IFX_INLINE void | IfxSent_enableChannel (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Enable the channel with the channel number. More...
IFX_INLINE void | IfxSent_enableModule (Ifx_SENT *sent)
Enable the SENT module. More...
IFX_INLINE boolean | IfxSent_isModuleSuspended (Ifx_SENT *sent)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxSent_setSleepMode (Ifx_SENT *sent, IfxSent_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxSent_setSuspendMode (Ifx_SENT *sent, IfxSent_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxSent_resetModule (Ifx_SENT *sent)
Resets the SENT module. More...
IFX_INLINE void | IfxSent_setChannelFractionalDivider (Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider)
Sets the channel fractional baudrate divider. More...
IFX_INLINE void | IfxSent_setChannelPreDivider (Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider)
Sets the channel baudrate pre-divider. More...
IFX_EXTERN float32 | IfxSent_getModuleClock (Ifx_SENT *sent)
Returns the current module frequency in Hertz. More...
IFX_EXTERN void | IfxSent_initializeChannelUnitTime (Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channel. More...
IFX_EXTERN void | IfxSent_initializeModuleClock (Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel. More...
IFX_INLINE void | IfxSent_initSentPin (const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a SENT input. More...
IFX_INLINE void | IfxSent_initSpcPin (const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver)
Initializes a SPC output. More...
IFX_INLINE void | IfxSent_setWatchDogTimerLimit (Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 watchDogTimerLimit)
Set the watch dog timer limit value for sent channel. More...
IFX_INLINE boolean | IfxSent_isModuleEnabled (Ifx_SENT *sent)
Return TRUE if SENT module is enabled. More...
IFX_INLINE boolean | IfxSent_getInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
Return the Interrupt Status of the SENT channel. More...
IFX_INLINE void | IfxSent_clearInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
IFX_INLINE uint32 | IfxSent_readReceivedData (Ifx_SENT *sent, IfxSent_ChannelId channelId)
IFX_INLINE uint32 | IfxSent_readReceivedStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Reads and returns value in RSR (Received Status Register). More...
IFX_INLINE uint8 | IfxSent_readReceivedCrc (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 4 bit CRC value in Receive Status Register. More...
IFX_INLINE uint8 | IfxSent_readReceivedChannelStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 2 bit CST value in Receive Status Register. More...
IFX_INLINE uint8 | IfxSent_readReceivedStatusAndCommunicationNibble (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 4 bit SCN value in Receive Status Register. More...
IFX_INLINE uint32 | IfxSent_readReceivedTimeStamp (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 32 bit Received Time Stamp Value. More...
IFX_INLINE uint8 | IfxSent_readSpcPulseLength (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 6 bit PLEN value in SCR Register. More...
IFX_INLINE uint8 | IfxSent_readSpcDelayLength (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 6 bit Delay length value in SCR Register. More...
IFX_EXTERN float32 | IfxSent_getChannelUnitTime (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns the current unit time (f_tick) of the given channel. More...

Detailed Description

SENT basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSent.h.

Macro Definition Documentation

◆ IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS

#define IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS (0x000037f4)

Definition at line 77 of file IfxSent.h.

Enumeration Type Documentation

◆ IfxSent_InterruptSource

enum IfxSent_InterruptSource

Sent Interrupt Source.

Enumerator
IfxSent_InterruptSource_rsi | Enable Interrupt Request RSI.
IfxSent_InterruptSource_rdi | Enable Interrupt Request RDI.
IfxSent_InterruptSource_rbi | Enable Interrupt Request RBI.
IfxSent_InterruptSource_tdi | Enable Interrupt Request TDI.
IfxSent_InterruptSource_tbi | Enable Interrupt Request TBI.
IfxSent_InterruptSource_fri | Enable Interrupt Request FRI.
IfxSent_InterruptSource_fdi | Enable Interrupt Request FDI.
IfxSent_InterruptSource_nni | Enable Interrupt Request NNI.
IfxSent_InterruptSource_nvi | Enable Interrupt Request NVI.
IfxSent_InterruptSource_crci | Enable Interrupt Request crci.
IfxSent_InterruptSource_wsi | Enable Interrupt Request wsi.
IfxSent_InterruptSource_sdi | Enable Interrupt Request sdi.
IfxSent_InterruptSource_scri | Enable Interrupt Request scri.
IfxSent_InterruptSource_wdi | Enable Interrupt Request wdi.

Definition at line 255 of file IfxSent.h.

Function Documentation

◆ IfxSent_clearInterruptStatus()

IFX_INLINE void IfxSent_clearInterruptStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | IfxSent_InterruptSource | source
 | ) |  |
Parameters
sent | base address of the SENT register space
channelId | SENT channel number
source | enable the interrupt source of any interrupt of SENT Channel
Returns
None

Definition at line 728 of file IfxSent.h.

◆ IfxSent_getChannelUnitTime()

IFX_EXTERN float32 IfxSent_getChannelUnitTime | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns the current unit time (f_tick) of the given channel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
The current unit time in seconds

Definition at line 55 of file IfxSent.c.

◆ IfxSent_getInterruptStatus()

IFX_INLINE boolean IfxSent_getInterruptStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | IfxSent_InterruptSource | source
 | ) |  |

Return the Interrupt Status of the SENT channel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
source | enable the interrupt source of any interrupt of SENT Channel
Returns
The Interrupt Status of SENT channel

Definition at line 722 of file IfxSent.h.

◆ IfxSent_isModuleEnabled()

IFX_INLINE boolean IfxSent_isModuleEnabled ( Ifx_SENT * sent )

Return TRUE if SENT module is enabled.

Parameters
sent base address of the SENT register space
Returns
The status of whether clock for sent is enabled or disabled

Definition at line 716 of file IfxSent.h.

Referenced by IfxSent_Sent_initModule().

◆ IfxSent_readReceivedChannelStatus()

IFX_INLINE uint8 IfxSent_readReceivedChannelStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 2 bit CST value in Receive Status Register.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
2 bit CST

Definition at line 752 of file IfxSent.h.

◆ IfxSent_readReceivedCrc()

IFX_INLINE uint8 IfxSent_readReceivedCrc | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 4 bit CRC value in Receive Status Register.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
4 bit CRC

Definition at line 746 of file IfxSent.h.

◆ IfxSent_readReceivedData()

IFX_INLINE uint32 IfxSent_readReceivedData | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |
Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
The Data content of a recieved Data Frame

Definition at line 734 of file IfxSent.h.

◆ IfxSent_readReceivedStatus()

IFX_INLINE uint32 IfxSent_readReceivedStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Reads and returns value in RSR (Received Status Register).

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
Returns 32 bit RSR

Definition at line 740 of file IfxSent.h.

◆ IfxSent_readReceivedStatusAndCommunicationNibble()

IFX_INLINE uint8 IfxSent_readReceivedStatusAndCommunicationNibble | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 4 bit SCN value in Receive Status Register.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
4 bit SCN

Definition at line 758 of file IfxSent.h.

◆ IfxSent_readReceivedTimeStamp()

IFX_INLINE uint32 IfxSent_readReceivedTimeStamp | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 32 bit Received Time Stamp Value.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
32 bit Time Stamp

Definition at line 764 of file IfxSent.h.

◆ IfxSent_readSpcDelayLength()

IFX_INLINE uint8 IfxSent_readSpcDelayLength | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 6 bit Delay length value in SCR Register.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
6 bit DEL

Definition at line 776 of file IfxSent.h.

◆ IfxSent_readSpcPulseLength()

IFX_INLINE uint8 IfxSent_readSpcPulseLength | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 6 bit PLEN value in SCR Register.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
6 bit PLEN

Definition at line 770 of file IfxSent.h.

◆ IfxSent_setWatchDogTimerLimit()

IFX_INLINE void IfxSent_setWatchDogTimerLimit | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | uint16 | watchDogTimerLimit
 | ) |  |

Set the watch dog timer limit value for sent channel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
watchDogTimerLimit | Specifies the watch dog timer limit value.
Returns
None

Definition at line 710 of file IfxSent.h.


iLLD_TC26B: SMU

Modules | Files
SMU
iLLD
Collaboration diagram for SMU:

Modules

Implementation
Standard Driver
SMU Pin Mapping

Files

file | IfxSmu_cfg.h
SMU on-chip implementation data.
file | IfxSmu_PinMap.c
SMU I/O map.
file | IfxSmu_PinMap.h
SMU I/O map.
file | IfxSmu.h
SMU basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » SMU
Collaboration diagram for Implementation:

Modules

Alarm Group Enumeration
List of Alarms Enumeration

Detailed Description


iLLD_TC26B: Alarm Group Enumeration

Enumerations
Alarm Group Enumeration
iLLD » SMU » Implementation
Collaboration diagram for Alarm Group Enumeration:

Enumerations

enum IfxSmu_AlarmGroup {
IfxSmu_AlarmGroup_0 = 0,
IfxSmu_AlarmGroup_1,
IfxSmu_AlarmGroup_2,
IfxSmu_AlarmGroup_3,
IfxSmu_AlarmGroup_4,
IfxSmu_AlarmGroup_5,
IfxSmu_AlarmGroup_6
}
Alarm group
More...
enum IfxSmu_RecoveryTimer {
IfxSmu_RecoveryTimer_0 = 0,
IfxSmu_RecoveryTimer_1
}
Recovery Timer
More...

Detailed Description

Enumeration Type Documentation

◆ IfxSmu_AlarmGroup

enum IfxSmu_AlarmGroup

Alarm group

Enumerator
IfxSmu_AlarmGroup_0 | Alarm group 0.
IfxSmu_AlarmGroup_1 | Alarm group 1.
IfxSmu_AlarmGroup_2 | Alarm group 2.
IfxSmu_AlarmGroup_3 | Alarm group 3.
IfxSmu_AlarmGroup_4 | Alarm group 4.
IfxSmu_AlarmGroup_5 | Alarm group 5.
IfxSmu_AlarmGroup_6 | Alarm group 6.

Definition at line 77 of file IfxSmu_cfg.h.

◆ IfxSmu_RecoveryTimer

enum IfxSmu_RecoveryTimer

Recovery Timer

Enumerator
IfxSmu_RecoveryTimer_0 | Recovery Timer 0.
IfxSmu_RecoveryTimer_1 | Recovery Timer 1.

Definition at line 90 of file IfxSmu_cfg.h.


iLLD_TC26B: List of Alarms Enumeration

Enumerations
List of Alarms Enumeration
iLLD » SMU » Implementation
Collaboration diagram for List of Alarms Enumeration:

Enumerations

enum IfxSmu_Alarm {
IfxSmu_Alarm_Cpu0LockstepComparatorError = (IfxSmu_AlarmGroup_0 << 8) | 0,
IfxSmu_Alarm_Cpu0BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_0 << 8) | 1,
IfxSmu_Alarm_Cpu0PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 3,
IfxSmu_Alarm_Cpu0PcacheTagAddressError = (IfxSmu_AlarmGroup_0 << 8) | 4,
IfxSmu_Alarm_Cpu0PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 5,
IfxSmu_Alarm_Cpu0UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_0 << 8) | 6,
IfxSmu_Alarm_Cpu0UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 7,
IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_0 << 8) | 8,
IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 9,
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_0 << 8) | 10,
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 11,
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_0 << 8) | 12,
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 13,
IfxSmu_Alarm_Cpu0CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_0 << 8) | 19,
IfxSmu_Alarm_Cpu1LockstepComparatorError = (IfxSmu_AlarmGroup_1 << 8) |0,
IfxSmu_Alarm_Cpu1BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_1 << 8) |1,
IfxSmu_Alarm_Cpu1PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |3,
IfxSmu_Alarm_Cpu1PcacheTagAddressError = (IfxSmu_AlarmGroup_1 << 8) |4,
IfxSmu_Alarm_Cpu1PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |5,
IfxSmu_Alarm_Cpu1UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_1 << 8) |6,
IfxSmu_Alarm_Cpu1UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |7,
IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_1 << 8) |8,
IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |9,
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_1 << 8) |10,
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |11,
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_1 << 8) |12,
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |13,
IfxSmu_Alarm_Cpu1DcacheTagSramCorrection = (IfxSmu_AlarmGroup_1 << 8) |14,
IfxSmu_Alarm_Cpu1DcacheTagSramUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |15,
IfxSmu_Alarm_Cpu1DcacheTagSramAddressError = (IfxSmu_AlarmGroup_1 << 8) |16,
IfxSmu_Alarm_Cpu1DcacheTagSramAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |17,
IfxSmu_Alarm_Cpu1CpuInstructionFetchSRIInterfaceEdcError = (IfxSmu_AlarmGroup_1 << 8) |18,
IfxSmu_Alarm_Cpu1CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_1 << 8) |19,
IfxSmu_Alarm_PmuSingleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 2,
IfxSmu_Alarm_PmuDoubleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 3,
IfxSmu_Alarm_PmuNonCorrectableMultipleBit = (IfxSmu_AlarmGroup_2 << 8) | 4,
IfxSmu_Alarm_PmuAddressingError = (IfxSmu_AlarmGroup_2 << 8) | 5,
IfxSmu_Alarm_PmuAddressBufferFull = (IfxSmu_AlarmGroup_2 << 8) | 6,
IfxSmu_Alarm_PmuPflashEccError = (IfxSmu_AlarmGroup_2 << 8) | 7,
IfxSmu_Alarm_PmuEdcComparatorError = (IfxSmu_AlarmGroup_2 << 8) | 8,
IfxSmu_Alarm_LmuEccError = (IfxSmu_AlarmGroup_2 << 8) | 15,
IfxSmu_Alarm_LmuRegisterAccessProtectionErrorBusLevelMpuError = (IfxSmu_AlarmGroup_2 << 8) | 16,
IfxSmu_Alarm_LmuSramSingleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 17,
IfxSmu_Alarm_LmuSramUncorrectableError = (IfxSmu_AlarmGroup_2 << 8) | 18,
IfxSmu_Alarm_LmuSramAddressError = (IfxSmu_AlarmGroup_2 << 8) | 19,
IfxSmu_Alarm_LmuSramAddressBufferOverflow = (IfxSmu_AlarmGroup_2 << 8) | 20,
IfxSmu_Alarm_SriEdcAddressPhaseError = (IfxSmu_AlarmGroup_2 << 8) | 21,
IfxSmu_Alarm_SriEdcWritePhaseError = (IfxSmu_AlarmGroup_2 << 8) | 22,
IfxSmu_Alarm_SriEdcReadPhaseError = (IfxSmu_AlarmGroup_2 << 8) | 23,
IfxSmu_Alarm_IrEdcError = (IfxSmu_AlarmGroup_2 << 8) | 25,
IfxSmu_Alarm_IomPinMismatchIndication = (IfxSmu_AlarmGroup_2 << 8) | 26,
IfxSmu_Alarm_SmuTimer0TimeOut = (IfxSmu_AlarmGroup_2 << 8) | 29,
IfxSmu_Alarm_SmuTimer1TimeOut = (IfxSmu_AlarmGroup_2 << 8) | 30,
IfxSmu_Alarm_SmuErrorPinFaultStateActivation = (IfxSmu_AlarmGroup_2 << 8) | 31,
IfxSmu_Alarm_ScuCguInputClockOutOfRange = (IfxSmu_AlarmGroup_3 << 8) | 0,
IfxSmu_Alarm_ScuCguSystemPllVcoLossOfLockEvent = (IfxSmu_AlarmGroup_3 << 8) | 1,
IfxSmu_Alarm_ScuCguPll_ErayVcoLossOfLockEvent = (IfxSmu_AlarmGroup_3 << 8) | 2,
IfxSmu_Alarm_ScuCguStmClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 3,
IfxSmu_Alarm_ScuCguPll_ErayOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 4,
IfxSmu_Alarm_ScuCguSystemPLLOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 5,
IfxSmu_Alarm_ScuCguSriClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 6,
IfxSmu_Alarm_ScuCguSpbClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 7,
IfxSmu_Alarm_ScuCguGtmClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 8,
IfxSmu_Alarm_ScuCguAdcClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 9,
IfxSmu_Alarm_ScuEvrEvr1Dot3VUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 11,
IfxSmu_Alarm_ScuEvrEvr1Dot3VOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 12,
IfxSmu_Alarm_ScuEvrEvr3Dot3VUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 13,
IfxSmu_Alarm_ScuEvrEvr3Dot3VOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 14,
IfxSmu_Alarm_ScuEvrExternalSupplyUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 15,
IfxSmu_Alarm_ScuEVRExternalSupplyOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 16,
IfxSmu_Alarm_ScuWdtsWatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 17,
IfxSmu_Alarm_ScuWdtCpu0WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 18,
IfxSmu_Alarm_ScuWdtCpu1WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 19,
IfxSmu_Alarm_ScuWdtCpu2WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 20,
IfxSmu_Alarm_ScuWdtWatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 21,
IfxSmu_Alarm_SpbAccessEnableError = (IfxSmu_AlarmGroup_3 << 8) | 22,
IfxSmu_Alarm_ScuDtsTemperatureUnderflow = (IfxSmu_AlarmGroup_3 << 8) | 25,
IfxSmu_Alarm_ScuDtsTemperatureOverflow = (IfxSmu_AlarmGroup_3 << 8) | 26,
IfxSmu_Alarm_ScuExternalEmergencyStopSignal = (IfxSmu_AlarmGroup_3 << 8) | 29,
IfxSmu_Alarm_SriBusError = (IfxSmu_AlarmGroup_3 << 8) | 30,
IfxSmu_Alarm_SpbBusError = (IfxSmu_AlarmGroup_3 << 8) | 31,
IfxSmu_Alarm_GtmSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 0,
IfxSmu_Alarm_GtmSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 1,
IfxSmu_Alarm_GtmSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 2,
IfxSmu_Alarm_GtmSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 3,
IfxSmu_Alarm_CanSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 4,
IfxSmu_Alarm_CanSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 5,
IfxSmu_Alarm_CanSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 6,
IfxSmu_Alarm_CanSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 7,
IfxSmu_Alarm_FlexraySramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 8,
IfxSmu_Alarm_FlexraySramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 9,
IfxSmu_Alarm_FlexraySramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 10,
IfxSmu_Alarm_FlexraySramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 11,
IfxSmu_Alarm_EmemSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 12,
IfxSmu_Alarm_EmemSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 13,
IfxSmu_Alarm_EmemSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 15,
IfxSmu_Alarm_SramsSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 16,
IfxSmu_Alarm_SramsSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 17,
IfxSmu_Alarm_SramsSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 18,
IfxSmu_Alarm_SramsSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 19,
IfxSmu_Alarm_SoftwareAlarm0 = (IfxSmu_AlarmGroup_5 << 8) | 0,
IfxSmu_Alarm_SoftwareAlarm1 = (IfxSmu_AlarmGroup_5 << 8) | 1,
IfxSmu_Alarm_SoftwareAlarm2 = (IfxSmu_AlarmGroup_5 << 8) | 2,
IfxSmu_Alarm_SoftwareAlarm3 = (IfxSmu_AlarmGroup_5 << 8) | 3,
IfxSmu_Alarm_SoftwareAlarm4 = (IfxSmu_AlarmGroup_5 << 8) | 4,
IfxSmu_Alarm_SoftwareAlarm5 = (IfxSmu_AlarmGroup_5 << 8) | 5,
IfxSmu_Alarm_SoftwareAlarm6 = (IfxSmu_AlarmGroup_5 << 8) | 6,
IfxSmu_Alarm_SoftwareAlarm7 = (IfxSmu_AlarmGroup_5 << 8) | 7,
IfxSmu_Alarm_SoftwareAlarm8 = (IfxSmu_AlarmGroup_5 << 8) | 8,
IfxSmu_Alarm_SoftwareAlarm9 = (IfxSmu_AlarmGroup_5 << 8) | 9,
IfxSmu_Alarm_SoftwareAlarm10 = (IfxSmu_AlarmGroup_5 << 8) | 10,
IfxSmu_Alarm_SoftwareAlarm11 = (IfxSmu_AlarmGroup_5 << 8) | 11,
IfxSmu_Alarm_SoftwareAlarm12 = (IfxSmu_AlarmGroup_5 << 8) | 12,
IfxSmu_Alarm_SoftwareAlarm13 = (IfxSmu_AlarmGroup_5 << 8) | 13,
IfxSmu_Alarm_SoftwareAlarm14 = (IfxSmu_AlarmGroup_5 << 8) | 14,
IfxSmu_Alarm_SoftwareAlarm15 = (IfxSmu_AlarmGroup_5 << 8) | 15,
IfxSmu_Alarm_Cpu2BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_6 << 8) | 1,
IfxSmu_Alarm_Cpu2PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 3,
IfxSmu_Alarm_Cpu2PcacheTagAddressError = (IfxSmu_AlarmGroup_6 << 8) | 4,
IfxSmu_Alarm_Cpu2PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 5,
IfxSmu_Alarm_Cpu2UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 6,
IfxSmu_Alarm_Cpu2UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 7,
IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_6 << 8) | 8,
IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 9,
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 10,
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 11,
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_6 << 8) | 12,
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 13,
IfxSmu_Alarm_Cpu2DcacheTagSramSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 14,
IfxSmu_Alarm_Cpu2DcacheTagSramUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 15,
IfxSmu_Alarm_Cpu2DcacheTagSramAddressError = (IfxSmu_AlarmGroup_6 << 8) | 16,
IfxSmu_Alarm_Cpu2DcacheTagSramAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 17,
IfxSmu_Alarm_Cpu2CpuInstructionFetchSRIInterfaceEdcError = (IfxSmu_AlarmGroup_6 << 8) | 18,
IfxSmu_Alarm_Cpu2CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_6 << 8) | 19,
IfxSmu_Alarm_noAlarm
}
SMU Alarm list
More...

Detailed Description

Enumeration Type Documentation

◆ IfxSmu_Alarm

enum IfxSmu_Alarm

SMU Alarm list

Enumerator
IfxSmu_Alarm_Cpu0LockstepComparatorError | CPU0 Lockstep Comparator Error.
IfxSmu_Alarm_Cpu0BusLevelMpuViolationAccessProtection | CPU0 Bus-level MPU violation / Access Protection violation.
IfxSmu_Alarm_Cpu0PcacheTagUncorrectableError | CPU0 PCACHE TAG uncorrectable error.
IfxSmu_Alarm_Cpu0PcacheTagAddressError | CPU0 PCACHE TAG address error.
IfxSmu_Alarm_Cpu0PcacheTagAddressBufferOverflow | CPU0 PCACHE TAG Address Buffer overflow.
IfxSmu_Alarm_Cpu0UnifiedPcachePsprSingleBitCorrection | CPU0 Unified PCACHE/PSPR single-bit correction.
IfxSmu_Alarm_Cpu0UnifiedPcachePsprUncorrectableError | CPU0 Unified PCACHE/PSPR uncorrectable error.
IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressError | CPU0 Unified PCACHE/PSPR Address error.
IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressBufferOverflow | CPU0 Unified PCACHE/PSPR Address Buffer overflow.
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprSingleBitCorrection | CPU0 Unified DCACHE/DSPR single-bit correction.
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprUncorrectableError | CPU0 Unified DCACHE/DSPR uncorrectable error.
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressError | CPU0 Unified DCACHE/DSPR address error.
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressBufferOverflow | CPU0 Unified DCACHE/DSPR Address Buffer overflow.
IfxSmu_Alarm_Cpu0CpuDataSriInterfaceEdcError | CPU0 CPU Data SRI Interface (Load/Store) EDC Error.
IfxSmu_Alarm_Cpu1LockstepComparatorError | CPU1 Lockstep Comparator Error.
IfxSmu_Alarm_Cpu1BusLevelMpuViolationAccessProtection | CPU1 Bus-level MPU violation / Access Protection violation.
IfxSmu_Alarm_Cpu1PcacheTagUncorrectableError | CPU1 PCACHE TAG uncorrectable error.
IfxSmu_Alarm_Cpu1PcacheTagAddressError | CPU1 PCACHE TAG address error.
IfxSmu_Alarm_Cpu1PcacheTagAddressBufferOverflow | CPU1 PCACHE TAG Address Buffer overflow.
IfxSmu_Alarm_Cpu1UnifiedPcachePsprSingleBitCorrection | CPU1 Unified PCACHE/PSPR single-bit correction.
IfxSmu_Alarm_Cpu1UnifiedPcachePsprUncorrectableError | CPU1 Unified PCACHE/PSPR uncorrectable error.
IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressError | CPU1 Unified PCACHE/PSPR Address error.
IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressBufferOverflow | CPU1 Unified PCACHE/PSPR Address Buffer overflow.
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprSingleBitCorrection | CPU1 Unified DCACHE/DSPR single-bit correction.
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprUncorrectableError | CPU1 Unified DCACHE/DSPR uncorrectable error.
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressError | CPU1 Unified DCACHE/DSPR address error.
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressBufferOverflow | CPU1 Unified DCACHE/DSPR Address Buffer overflow.
IfxSmu_Alarm_Cpu1DcacheTagSramCorrection | CPU1 DCACHE TAG SRAM correction.
IfxSmu_Alarm_Cpu1DcacheTagSramUncorrectableError | CPU1 DCACHE TAG SRAM uncorrectable error.
IfxSmu_Alarm_Cpu1DcacheTagSramAddressError | CPU1 DCACHE TAG SRAM address error.
IfxSmu_Alarm_Cpu1DcacheTagSramAddressBufferOverflow | CPU1 DCACHE TAG SRAM address buffer overflow.
IfxSmu_Alarm_Cpu1CpuInstructionFetchSRIInterfaceEdcError | CPU1 CPU Instruction Fetch SRI Interface EDC Error.
IfxSmu_Alarm_Cpu1CpuDataSriInterfaceEdcError | CPU1 CPU Data SRI Interface (Load/Store) EDC Error.
IfxSmu_Alarm_PmuSingleBitCorrection | PMU single bit correction.
IfxSmu_Alarm_PmuDoubleBitCorrection | PMU double bit correction.
IfxSmu_Alarm_PmuNonCorrectableMultipleBit | PMU non correctable multiple bit.
IfxSmu_Alarm_PmuAddressingError | PMU Addressing error.
IfxSmu_Alarm_PmuAddressBufferFull | PMU address buffer full.
IfxSmu_Alarm_PmuPflashEccError | PMU PFLASH ECC error.
IfxSmu_Alarm_PmuEdcComparatorError | PMU EDC comparator error.
IfxSmu_Alarm_LmuEccError | LMU ECC Error.
IfxSmu_Alarm_LmuRegisterAccessProtectionErrorBusLevelMpuError | LMU Register Access Protection error / Bus-level MPU error.
IfxSmu_Alarm_LmuSramSingleBitCorrection | LMU SRAM single-bit correction.
IfxSmu_Alarm_LmuSramUncorrectableError | LMU SRAM uncorrectable error.
IfxSmu_Alarm_LmuSramAddressError | LMU SRAM Address error.
IfxSmu_Alarm_LmuSramAddressBufferOverflow | LMU SRAM Address buffer overflow.
IfxSmu_Alarm_SriEdcAddressPhaseError | SRI EDC Address phase error.
IfxSmu_Alarm_SriEdcWritePhaseError | SRI EDC Write phase error.
IfxSmu_Alarm_SriEdcReadPhaseError | SRI EDC Read phase error.
IfxSmu_Alarm_IrEdcError | IR EDC error.
IfxSmu_Alarm_IomPinMismatchIndication | IOM Pin Mismatch Indication.
IfxSmu_Alarm_SmuTimer0TimeOut | SMU Timer 0 time-out.
IfxSmu_Alarm_SmuTimer1TimeOut | SMU Timer 1 time-out.
IfxSmu_Alarm_SmuErrorPinFaultStateActivation | SMU ErrorPin Fault State Activation.
IfxSmu_Alarm_ScuCguInputClockOutOfRange | SCU/CGU input clock out of range.
IfxSmu_Alarm_ScuCguSystemPllVcoLossOfLockEvent | SCU/CGU System PLL VCO Loss-of-Lock Event.
IfxSmu_Alarm_ScuCguPll_ErayVcoLossOfLockEvent | SCU/CGU PLL_ERAY VCO Loss-of-Lock Event.
IfxSmu_Alarm_ScuCguStmClockOutOfRangeFrequency | SCU/CGU STM clock out of range frequency.
IfxSmu_Alarm_ScuCguPll_ErayOutOfRangeFrequency | SCU/CGU PLL_ERAY out of range frequency.
IfxSmu_Alarm_ScuCguSystemPLLOutOfRangeFrequency | SCU/CGU System PLL out of range frequency.
IfxSmu_Alarm_ScuCguSriClockOutOfRangeFrequency | SCU/CGU SRI clock out of range frequency.
IfxSmu_Alarm_ScuCguSpbClockOutOfRangeFrequency | SCU/CGU SPB clock out of range frequency.
IfxSmu_Alarm_ScuCguGtmClockOutOfRangeFrequency | SCU/CGU GTM clock out of range frequency.
IfxSmu_Alarm_ScuCguAdcClockOutOfRangeFrequency | SCU/CGU ADC clock out of range frequency.
IfxSmu_Alarm_ScuEvrEvr1Dot3VUnderVoltage | SCU/EVR EVR 1.3V under voltage.
IfxSmu_Alarm_ScuEvrEvr1Dot3VOverVoltage | SCU/EVR EVR 1.3V over voltage.
IfxSmu_Alarm_ScuEvrEvr3Dot3VUnderVoltage | SCU/EVR EVR 3.3V under voltage.
IfxSmu_Alarm_ScuEvrEvr3Dot3VOverVoltage | SCU/EVR EVR 3.3V over voltage.
IfxSmu_Alarm_ScuEvrExternalSupplyUnderVoltage | SCU/EVR External Supply under voltage.
IfxSmu_Alarm_ScuEVRExternalSupplyOverVoltage | SCU/EVR External Supply over voltage.
IfxSmu_Alarm_ScuWdtsWatchdogTimeOut | SCU/WDTS watchdog time-out.
IfxSmu_Alarm_ScuWdtCpu0WatchdogTimeOut | SCU/WDTCPU0 watchdog time-out.
IfxSmu_Alarm_ScuWdtCpu1WatchdogTimeOut | SCU/WDTCPU1 watchdog time-out.
IfxSmu_Alarm_ScuWdtCpu2WatchdogTimeOut | SCU/WDTCPU2 watchdog time-out.
IfxSmu_Alarm_ScuWdtWatchdogTimeOut | SCU/WDT watchdog time-out.
IfxSmu_Alarm_SpbAccessEnableError | SPB Access Enable Error.
IfxSmu_Alarm_ScuDtsTemperatureUnderflow | SCU/DTS Temperature underflow.
IfxSmu_Alarm_ScuDtsTemperatureOverflow | SCU/DTS Temperature overflow.
IfxSmu_Alarm_ScuExternalEmergencyStopSignal | SCU External Emergency Stop Signal.
IfxSmu_Alarm_SriBusError | SRI Bus error.
IfxSmu_Alarm_SpbBusError | SPB Bus error.
IfxSmu_Alarm_GtmSramSingleBitCorrection | GTM SRAM single-bit correction.
IfxSmu_Alarm_GtmSramUncorrectableError | GTM SRAM uncorrectable error.
IfxSmu_Alarm_GtmSramAddressError | GTM SRAM address error.
IfxSmu_Alarm_GtmSramAddressBufferOverflow | GTM SRAM Address Buffer overflow.
IfxSmu_Alarm_CanSramSingleBitCorrection | CAN SRAM single-bit correction.
IfxSmu_Alarm_CanSramUncorrectableError | CAN SRAM uncorrectable error.
IfxSmu_Alarm_CanSramAddressError | CAN SRAM address error.
IfxSmu_Alarm_CanSramAddressBufferOverflow | CAN SRAM Address Buffer overflow.
IfxSmu_Alarm_FlexraySramSingleBitCorrection | FLEXRAY SRAM single-bit correction.
IfxSmu_Alarm_FlexraySramUncorrectableError | FLEXRAY SRAM uncorrectable error.
IfxSmu_Alarm_FlexraySramAddressError | FLEXRAY SRAM address error.
IfxSmu_Alarm_FlexraySramAddressBufferOverflow | FLEXRAY SRAM Address Buffer overflow.
IfxSmu_Alarm_EmemSramSingleBitCorrection | EMEM SRAM single-bit correction.
IfxSmu_Alarm_EmemSramUncorrectableError | EMEM SRAM uncorrectable error.
IfxSmu_Alarm_EmemSramAddressBufferOverflow | EMEM SRAM Address Buffer overflow.
IfxSmu_Alarm_SramsSramSingleBitCorrection | SRAMs SRAM single-bit correction.
IfxSmu_Alarm_SramsSramUncorrectableError | SRAMs SRAM uncorrectable error.
IfxSmu_Alarm_SramsSramAddressError | SRAMs SRAM address error.
IfxSmu_Alarm_SramsSramAddressBufferOverflow | SRAMs SRAM Address Buffer overflow.
IfxSmu_Alarm_SoftwareAlarm0 | Software Alarm 0.
IfxSmu_Alarm_SoftwareAlarm1 | Software Alarm 1.
IfxSmu_Alarm_SoftwareAlarm2 | Software Alarm 2.
IfxSmu_Alarm_SoftwareAlarm3 | Software Alarm 3.
IfxSmu_Alarm_SoftwareAlarm4 | Software Alarm 4.
IfxSmu_Alarm_SoftwareAlarm5 | Software Alarm 5.
IfxSmu_Alarm_SoftwareAlarm6 | Software Alarm 6.
IfxSmu_Alarm_SoftwareAlarm7 | Software Alarm 7.
IfxSmu_Alarm_SoftwareAlarm8 | Software Alarm 8.
IfxSmu_Alarm_SoftwareAlarm9 | Software Alarm 9.
IfxSmu_Alarm_SoftwareAlarm10 | Software Alarm 10.
IfxSmu_Alarm_SoftwareAlarm11 | Software Alarm 11.
IfxSmu_Alarm_SoftwareAlarm12 | Software Alarm 12.
IfxSmu_Alarm_SoftwareAlarm13 | Software Alarm 13.
IfxSmu_Alarm_SoftwareAlarm14 | Software Alarm 14.
IfxSmu_Alarm_SoftwareAlarm15 | Software Alarm 15.
IfxSmu_Alarm_Cpu2BusLevelMpuViolationAccessProtection | CPU2 Bus-level MPU violation / Access Protection violation.
IfxSmu_Alarm_Cpu2PcacheTagUncorrectableError | CPU2 PCACHE TAG uncorrectable error.
IfxSmu_Alarm_Cpu2PcacheTagAddressError | CPU2 PCACHE TAG address error.
IfxSmu_Alarm_Cpu2PcacheTagAddressBufferOverflow | CPU2 PCACHE TAG Address Buffer overflow.
IfxSmu_Alarm_Cpu2UnifiedPcachePsprSingleBitCorrection | CPU2 Unified PCACHE/PSPR single-bit correction.
IfxSmu_Alarm_Cpu2UnifiedPcachePsprUncorrectableError | CPU2 Unified PCACHE/PSPR uncorrectable error.
IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressError | CPU2 Unified PCACHE/PSPR Address error.
IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressBufferOverflow | CPU2 Unified PCACHE/PSPR Address Buffer overflow.
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprSingleBitCorrection | CPU2 Unified DCACHE/DSPR single-bit correction.
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprUncorrectableError | CPU2 Unified DCACHE/DSPR uncorrectable error.
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressError | CPU2 Unified DCACHE/DSPR address error.
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressBufferOverflow | CPU2 Unified DCACHE/DSPR Address Buffer overflow.
IfxSmu_Alarm_Cpu2DcacheTagSramSingleBitCorrection | CPU2 DCACHE TAG SRAM single-bit correction.
IfxSmu_Alarm_Cpu2DcacheTagSramUncorrectableError | CPU2 DCACHE TAG SRAM uncorrectable error.
IfxSmu_Alarm_Cpu2DcacheTagSramAddressError | CPU2 DCACHE TAG SRAM Address error.
IfxSmu_Alarm_Cpu2DcacheTagSramAddressBufferOverflow | CPU2 DCACHE TAG SRAM Address buffer overflow.
IfxSmu_Alarm_Cpu2CpuInstructionFetchSRIInterfaceEdcError | CPU2 CPU Instruction Fetch SRI Interface EDC Error.
IfxSmu_Alarm_Cpu2CpuDataSriInterfaceEdcError | CPU2 CPU Data SRI Interface (Load/Store) EDC Error.
IfxSmu_Alarm_noAlarm | Special flag to inform about no alarm (Software only)

Definition at line 102 of file IfxSmu_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » SMU
Collaboration diagram for Standard Driver:

Modules

FSP Functions
SMU Functions
Data Structures

Detailed Description


iLLD_TC26B: FSP Functions

Functions
FSP Functions
iLLD » SMU » Standard Driver
Collaboration diagram for FSP Functions:

Functions

IFX_INLINE boolean | IfxSmu_releaseFsp (Ifx_SMU *smu)
Turns the FSP into the fault free state. More...
IFX_INLINE void | IfxSmu_initFspConfig (IfxSmu_configFsp *config)
Initialize the FSP configuartion to default. More...
IFX_INLINE boolean | IfxSmu_activateFsp (Ifx_SMU *smu)
Activates the Fault Signaling Protocol. More...
IFX_EXTERN boolean | IfxSmu_initFsp (Ifx_SMU *smu, IfxSmu_configFsp *config)
Initialize the FSP. More...
IFX_EXTERN float32 | IfxSmu_getFspFaultFreeFrequency (Ifx_SMU *smu)
Return FSP frequency (Time switching only) More...
IFX_EXTERN float32 | IfxSmu_getFspFaultStateTime (Ifx_SMU *smu)
Return the minimal fault state time. More...
IFX_EXTERN void | IfxSmu_enableAlarmFsp (Ifx_SMU *smu, IfxSmu_Alarm alarm, boolean enabled)
Set the alarm FSP configuration. More...

Detailed Description

Function Documentation

◆ IfxSmu_activateFsp()

IFX_INLINE boolean IfxSmu_activateFsp ( Ifx_SMU * smu )

Activates the Fault Signaling Protocol.

Parameters
smu Pointer to SMU module registers

Definition at line 335 of file IfxSmu.h.

◆ IfxSmu_enableAlarmFsp()

IFX_EXTERN void IfxSmu_enableAlarmFsp | ( | Ifx_SMU * | smu,
 |  | IfxSmu_Alarm | alarm,
 |  | boolean | enabled
 | ) |  |

Set the alarm FSP configuration.

Parameters
smu | Pointer to SMU Module Registers
alarm | Alarm to be configured
enabled | If TRUE, the alarm event triggers the FSP, else no action
Returns
None

Definition at line 265 of file IfxSmu.c.

◆ IfxSmu_getFspFaultFreeFrequency()

IFX_EXTERN float32 IfxSmu_getFspFaultFreeFrequency ( Ifx_SMU * smu )

Return FSP frequency (Time switching only)

Parameters
smu Pointer to SMU module registers

Definition at line 184 of file IfxSmu.c.

◆ IfxSmu_getFspFaultStateTime()

IFX_EXTERN float32 IfxSmu_getFspFaultStateTime ( Ifx_SMU * smu )

Return the minimal fault state time.

Parameters
smu Pointer to SMU module registers

Definition at line 193 of file IfxSmu.c.

◆ IfxSmu_initFsp()

IFX_EXTERN boolean IfxSmu_initFsp | ( | Ifx_SMU * | smu,
 |  | IfxSmu_configFsp * | config
 | ) |  |

Initialize the FSP.

Fault state time >= tFSP_FS = tSMU_FS *(SMU_FSP.TFSP_HIGH[] & SMU_FSP.TFSP_LOW[] + 1) with tSMU_FS = <SMU_FSP.PRE1>. SMU_FSP.TFSP_HIGH[] / fBACK and SMU_FSP.PRE1 should enable tFSP_FS >= 500ms (Ref: TC27xC UM v2.2: SMU_FSP.TFSP_HIGH) Fault free state period (Time switching only) = tSMU_FFS = fBACK / <SMU_FSP.PRE2>

Note: TSMU_FS * SMU_FSP.TFSP_LOW > 250us

Parameters
smu | Pointer to SMU module registers
config | FSP Configuration Structure

Definition at line 53 of file IfxSmu.c.

◆ IfxSmu_initFspConfig()

IFX_INLINE void IfxSmu_initFspConfig ( IfxSmu_configFsp * config )

Initialize the FSP configuartion to default.

Parameters
config FSP Configuration Structure
Returns
None

Definition at line 324 of file IfxSmu.h.

◆ IfxSmu_releaseFsp()

IFX_INLINE boolean IfxSmu_releaseFsp ( Ifx_SMU * smu )

Turns the FSP into the fault free state.

Parameters
smu Pointer to SMU module registers

Definition at line 318 of file IfxSmu.h.


iLLD_TC26B: SMU Functions

Functions
SMU Functions
iLLD » SMU » Standard Driver
Collaboration diagram for SMU Functions:

Functions

IFX_INLINE boolean | IfxSmu_activatePes (Ifx_SMU *smu)
Triggers the activation of the Port Emergency Stop (PES). More...
IFX_INLINE boolean | IfxSmu_stopRecoveryTimer (Ifx_SMU *smu, IfxSmu_RecoveryTimer timer)
Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the product. More...
IFX_INLINE boolean | IfxSmu_enableClearAlarmStatus (Ifx_SMU *smu)
Alarm Status Clear Enable Command. More...
IFX_INLINE boolean | IfxSmu_triggerAlarm (Ifx_SMU *smu, IfxSmu_Alarm alarm)
Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "Alarm Mapping". More...
IFX_INLINE boolean | IfxSmu_start (Ifx_SMU *smu)
Forces the SSM to go to the RUN state from the START state. More...
IFX_EXTERN boolean | IfxSmu_cmd (Ifx_SMU *smu, uint8 cmd, uint8 arg)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.6 SMU Control Interface Ref: TC27xC UM v2.2: 9.5.2 SMU Configuration Registers. More...
IFX_EXTERN boolean | IfxSmu_unlock (Ifx_SMU *smu)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
IFX_EXTERN void | IfxSmu_lock (Ifx_SMU *smu)
Lock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
IFX_EXTERN void | IfxSmu_lockForever (Ifx_SMU *smu)
Lock the SMU configuration up to the next application reset Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
IFX_EXTERN void | IfxSmu_setAlarmConfig (Ifx_SMU *smu, IfxSmu_Alarm alarm, IfxSmu_AlarmConfig config)
Set the SMU alarm configuration. More...
IFX_EXTERN boolean | IfxSmu_isAlarmSet (Ifx_SMU *smu, IfxSmu_Alarm alarm)
Return the alarm status. More...
IFX_EXTERN IfxSmu_Alarm | IfxSmu_getAlarm (Ifx_SMU *smu)
Get the alarm flag. More...
IFX_EXTERN void | IfxSmu_clearAlarm (Ifx_SMU *smu, IfxSmu_Alarm alarm)
Clear the alarm flag. More...

Detailed Description

Function Documentation

◆ IfxSmu_activatePes()

IFX_INLINE boolean IfxSmu_activatePes ( Ifx_SMU * smu )

Triggers the activation of the Port Emergency Stop (PES).

Parameters
smu Pointer to SMU module registers

Definition at line 286 of file IfxSmu.h.

◆ IfxSmu_clearAlarm()

IFX_EXTERN void IfxSmu_clearAlarm | ( | Ifx_SMU * | smu,
 |  | IfxSmu_Alarm | alarm
 | ) |  |

Clear the alarm flag.

Parameters
smu | Pointer to SMU Module Registers
alarm | Alarm for which the flag should be cleared
Returns
None

Definition at line 308 of file IfxSmu.c.

◆ IfxSmu_cmd()

IFX_EXTERN boolean IfxSmu_cmd | ( | Ifx_SMU * | smu,
 |  | uint8 | cmd,
 |  | uint8 | arg
 | ) |  |

Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.6 SMU Control Interface Ref: TC27xC UM v2.2: 9.5.2 SMU Configuration Registers.

Parameters
smu | Pointer to SMU module registers
cmd | SMU Command
arg | Argument to be used with the command

Definition at line 164 of file IfxSmu.c.

Referenced by IfxSmu_activateFsp(), IfxSmu_activatePes(), IfxSmu_enableClearAlarmStatus(), IfxSmu_releaseFsp(), IfxSmu_start(), IfxSmu_stopRecoveryTimer(), and IfxSmu_triggerAlarm().

◆ IfxSmu_enableClearAlarmStatus()

IFX_INLINE boolean IfxSmu_enableClearAlarmStatus ( Ifx_SMU * smu )

Alarm Status Clear Enable Command.

Parameters
smu Pointer to SMU module registers

Definition at line 298 of file IfxSmu.h.

◆ IfxSmu_getAlarm()

IFX_EXTERN IfxSmu_Alarm IfxSmu_getAlarm ( Ifx_SMU * smu )

Get the alarm flag.

Parameters
smu Pointer to SMU Module Registers
Returns
Return the next set alarm, if no alarm is set , return IfxSmu_Alarm_noAlarm

Definition at line 289 of file IfxSmu.c.

◆ IfxSmu_isAlarmSet()

IFX_EXTERN boolean IfxSmu_isAlarmSet | ( | Ifx_SMU * | smu,
 |  | IfxSmu_Alarm | alarm
 | ) |  |

Return the alarm status.

Parameters
smu | Pointer to SMU Module Registers
alarm | Alarm for which to return the status
Returns
TRUE means the alarm is set and FALSE means the alarm is not set.

Definition at line 280 of file IfxSmu.c.

◆ IfxSmu_lock()

IFX_EXTERN void IfxSmu_lock ( Ifx_SMU * smu )

Lock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection.

Parameters
smu Pointer to SMU module registers
Returns
None

Definition at line 226 of file IfxSmu.c.

Referenced by IfxSmu_initFsp().

◆ IfxSmu_lockForever()

IFX_EXTERN void IfxSmu_lockForever ( Ifx_SMU * smu )

Lock the SMU configuration up to the next application reset Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection.

Parameters
smu Pointer to SMU module registers
Returns
None

Definition at line 236 of file IfxSmu.c.

◆ IfxSmu_setAlarmConfig()

IFX_EXTERN void IfxSmu_setAlarmConfig | ( | Ifx_SMU * | smu,
 |  | IfxSmu_Alarm | alarm,
 |  | IfxSmu_AlarmConfig | config
 | ) |  |

Set the SMU alarm configuration.

Parameters
smu | Pointer to SMU module registers
alarm | Alarm to be configured
config | Alarm configuration
Returns
None

Definition at line 246 of file IfxSmu.c.

◆ IfxSmu_start()

IFX_INLINE boolean IfxSmu_start ( Ifx_SMU * smu )

Forces the SSM to go to the RUN state from the START state.

Parameters
smu Pointer to SMU module registers

Definition at line 312 of file IfxSmu.h.

◆ IfxSmu_stopRecoveryTimer()

IFX_INLINE boolean IfxSmu_stopRecoveryTimer | ( | Ifx_SMU * | smu,
 |  | IfxSmu_RecoveryTimer | timer
 | ) |  |

Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the product.

Parameters
smu | Pointer to SMU module registers
timer | Recovery Timer

Definition at line 292 of file IfxSmu.h.

◆ IfxSmu_triggerAlarm()

IFX_INLINE boolean IfxSmu_triggerAlarm | ( | Ifx_SMU * | smu,
 |  | IfxSmu_Alarm | alarm
 | ) |  |

Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "Alarm Mapping".

Parameters
smu | Pointer to SMU module registers
alarm | Alarm list

Definition at line 304 of file IfxSmu.h.

◆ IfxSmu_unlock()

IFX_EXTERN boolean IfxSmu_unlock ( Ifx_SMU * smu )

Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection.

Parameters
smu Pointer to SMU module registers

Definition at line 204 of file IfxSmu.c.

Referenced by IfxSmu_initFsp().


iLLD_TC26B: Data Structures

Data Structures | Enumerations
Data Structures
iLLD » SMU » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct IfxSmu_configFsp
FSP Configuration Structure. More...

Enumerations

enum IfxSmu_AlarmConfig {
IfxSmu_AlarmConfig_noAction = 0,
IfxSmu_AlarmConfig_interruptSet0 = 2,
IfxSmu_AlarmConfig_interruptSet1 = 3,
IfxSmu_AlarmConfig_interruptSet2 = 4,
IfxSmu_AlarmConfig_nmi = 5,
IfxSmu_AlarmConfig_scuReset = 6,
IfxSmu_AlarmConfig_cpuIdle = 7
}
SMU Alarm Configuration Ifx_SMU.AGCF[][]. More...
enum IfxSmu_Cmd {
IfxSmu_Cmd_start = 0,
IfxSmu_Cmd_activateFsp = 1,
IfxSmu_Cmd_releaseFsp = 2,
IfxSmu_Cmd_activatePes = 3,
IfxSmu_Cmd_stopRecoveryTimer = 4,
IfxSmu_Cmd_enableClearAlarmStatus = 5,
IfxSmu_Cmd_triggerAlarm = 6
}
SMU Commands. More...
enum IfxSmu_Fsp_Mode {
IfxSmu_Fsp_Mode_bistable,
IfxSmu_Fsp_Mode_timeSwitching
}

Detailed Description

Data Structure Documentation

◆ IfxSmu_configFsp

struct IfxSmu_configFsp

FSP Configuration Structure.

Definition at line 113 of file IfxSmu.h.

Data Fields
boolean | emergencyStopEnabled | If TRUE, the emergency stop port is triggered on FSP fault state.
boolean | enableFaultToRunStateTransition | Enable Fault to Run State Transition.
float32 | faultFreeStateFrequencyMax | Max fault free state frequency in Hz, only valid if mode=IfxSmu_Fsp_Mode_timeSwitching.
float32 | faultFreeStateFrequencyMin | Min fault free state frequency in Hz, only valid if mode=IfxSmu_Fsp_Mode_timeSwitching.
float32 | faultStateTime | Minimal fault state time in sec.
IfxSmu_Fsp_Mode | mode | FSP mode.

Enumeration Type Documentation

◆ IfxSmu_AlarmConfig

enum IfxSmu_AlarmConfig

SMU Alarm Configuration Ifx_SMU.AGCF[][].

Enumerator
IfxSmu_AlarmConfig_noAction | No Action. Reset value. Alarm disabled.
IfxSmu_AlarmConfig_interruptSet0 | Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuration Set 0.
IfxSmu_AlarmConfig_interruptSet1 | Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuration Set 1.
IfxSmu_AlarmConfig_interruptSet2 | Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuration Set 2.
IfxSmu_AlarmConfig_nmi | Sends an NMI request to the SCU.
IfxSmu_AlarmConfig_scuReset | Sends a reset request to SCU.
IfxSmu_AlarmConfig_cpuIdle | Triggers a CPU idle request.

Definition at line 73 of file IfxSmu.h.

◆ IfxSmu_Cmd

enum IfxSmu_Cmd

SMU Commands.

Enumerator
IfxSmu_Cmd_start | Forces the SSM to go to the RUN state from the START state.
IfxSmu_Cmd_activateFsp | Activates the Fault Signaling Protocol.
IfxSmu_Cmd_releaseFsp | Turns the FSP into the fault free state.
IfxSmu_Cmd_activatePes | Triggers the activation of the Port Emergency Stop (PES).
IfxSmu_Cmd_stopRecoveryTimer | Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the product.
IfxSmu_Cmd_enableClearAlarmStatus | Alarm Status Clear Enable Command.
IfxSmu_Cmd_triggerAlarm | Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "Alarm Mapping".

Definition at line 86 of file IfxSmu.h.

◆ IfxSmu_Fsp_Mode

enum IfxSmu_Fsp_Mode
Enumerator
IfxSmu_Fsp_Mode_bistable | Bi-stable fault signalling protocol.
IfxSmu_Fsp_Mode_timeSwitching | Time switching protocol.

Definition at line 97 of file IfxSmu.h.


iLLD_TC26B: SMU Pin Mapping

Data Structures | Macros | Variables
SMU Pin Mapping
iLLD » SMU
Collaboration diagram for SMU Pin Mapping:

Data Structures

struct IfxSmu_Fsp_Out
Fault Signal Protocol Pin. More...

Macros

#define | IFXSMU_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS 1

Variables

IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT
SMU_FSP: SMU. More...
IFX_EXTERN const IfxSmu_Fsp_Out * IfxSmu_Fsp_Out_pinTable [IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]
IfxSmu_Fsp_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxSmu_Fsp_Out

struct IfxSmu_Fsp_Out

Fault Signal Protocol Pin.

Definition at line 55 of file IfxSmu_PinMap.h.

Collaboration diagram for IfxSmu_Fsp_Out:
[legend]
Data Fields
Ifx_SMU * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS

#define IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS 1

Definition at line 66 of file IfxSmu_PinMap.h.

◆ IFXSMU_PINMAP_NUM_MODULES

#define IFXSMU_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 65 of file IfxSmu_PinMap.h.

Variable Documentation

◆ IfxSmu_Fsp_Out_pinTable

IFX_EXTERN const IfxSmu_Fsp_Out* IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]

IfxSmu_Fsp_Out table.

Definition at line 70 of file IfxSmu_PinMap.h.

◆ IfxSmu_FSP_P33_8_OUT

IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT

SMU_FSP: SMU.

Definition at line 62 of file IfxSmu_PinMap.h.


iLLD_TC26B: IfxSmu_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxSmu_cfg.h File Reference
iLLD » SMU

SMU on-chip implementation data. More...

Go to the source code of this file.

Macros

#define IFXSMU_NUM_MODULES (1)

Enumerations

enum IfxSmu_AlarmGroup {
IfxSmu_AlarmGroup_0 = 0,
IfxSmu_AlarmGroup_1,
IfxSmu_AlarmGroup_2,
IfxSmu_AlarmGroup_3,
IfxSmu_AlarmGroup_4,
IfxSmu_AlarmGroup_5,
IfxSmu_AlarmGroup_6
}
Alarm group
More...
enum IfxSmu_RecoveryTimer {
IfxSmu_RecoveryTimer_0 = 0,
IfxSmu_RecoveryTimer_1
}
Recovery Timer
More...
enum IfxSmu_Alarm {
IfxSmu_Alarm_Cpu0LockstepComparatorError = (IfxSmu_AlarmGroup_0 << 8) | 0,
IfxSmu_Alarm_Cpu0BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_0 << 8) | 1,
IfxSmu_Alarm_Cpu0PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 3,
IfxSmu_Alarm_Cpu0PcacheTagAddressError = (IfxSmu_AlarmGroup_0 << 8) | 4,
IfxSmu_Alarm_Cpu0PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 5,
IfxSmu_Alarm_Cpu0UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_0 << 8) | 6,
IfxSmu_Alarm_Cpu0UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 7,
IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_0 << 8) | 8,
IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 9,
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_0 << 8) | 10,
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 11,
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_0 << 8) | 12,
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 13,
IfxSmu_Alarm_Cpu0CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_0 << 8) | 19,
IfxSmu_Alarm_Cpu1LockstepComparatorError = (IfxSmu_AlarmGroup_1 << 8) |0,
IfxSmu_Alarm_Cpu1BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_1 << 8) |1,
IfxSmu_Alarm_Cpu1PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |3,
IfxSmu_Alarm_Cpu1PcacheTagAddressError = (IfxSmu_AlarmGroup_1 << 8) |4,
IfxSmu_Alarm_Cpu1PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |5,
IfxSmu_Alarm_Cpu1UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_1 << 8) |6,
IfxSmu_Alarm_Cpu1UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |7,
IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_1 << 8) |8,
IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |9,
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_1 << 8) |10,
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |11,
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_1 << 8) |12,
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |13,
IfxSmu_Alarm_Cpu1DcacheTagSramCorrection = (IfxSmu_AlarmGroup_1 << 8) |14,
IfxSmu_Alarm_Cpu1DcacheTagSramUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |15,
IfxSmu_Alarm_Cpu1DcacheTagSramAddressError = (IfxSmu_AlarmGroup_1 << 8) |16,
IfxSmu_Alarm_Cpu1DcacheTagSramAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |17,
IfxSmu_Alarm_Cpu1CpuInstructionFetchSRIInterfaceEdcError = (IfxSmu_AlarmGroup_1 << 8) |18,
IfxSmu_Alarm_Cpu1CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_1 << 8) |19,
IfxSmu_Alarm_PmuSingleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 2,
IfxSmu_Alarm_PmuDoubleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 3,
IfxSmu_Alarm_PmuNonCorrectableMultipleBit = (IfxSmu_AlarmGroup_2 << 8) | 4,
IfxSmu_Alarm_PmuAddressingError = (IfxSmu_AlarmGroup_2 << 8) | 5,
IfxSmu_Alarm_PmuAddressBufferFull = (IfxSmu_AlarmGroup_2 << 8) | 6,
IfxSmu_Alarm_PmuPflashEccError = (IfxSmu_AlarmGroup_2 << 8) | 7,
IfxSmu_Alarm_PmuEdcComparatorError = (IfxSmu_AlarmGroup_2 << 8) | 8,
IfxSmu_Alarm_LmuEccError = (IfxSmu_AlarmGroup_2 << 8) | 15,
IfxSmu_Alarm_LmuRegisterAccessProtectionErrorBusLevelMpuError = (IfxSmu_AlarmGroup_2 << 8) | 16,
IfxSmu_Alarm_LmuSramSingleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 17,
IfxSmu_Alarm_LmuSramUncorrectableError = (IfxSmu_AlarmGroup_2 << 8) | 18,
IfxSmu_Alarm_LmuSramAddressError = (IfxSmu_AlarmGroup_2 << 8) | 19,
IfxSmu_Alarm_LmuSramAddressBufferOverflow = (IfxSmu_AlarmGroup_2 << 8) | 20,
IfxSmu_Alarm_SriEdcAddressPhaseError = (IfxSmu_AlarmGroup_2 << 8) | 21,
IfxSmu_Alarm_SriEdcWritePhaseError = (IfxSmu_AlarmGroup_2 << 8) | 22,
IfxSmu_Alarm_SriEdcReadPhaseError = (IfxSmu_AlarmGroup_2 << 8) | 23,
IfxSmu_Alarm_IrEdcError = (IfxSmu_AlarmGroup_2 << 8) | 25,
IfxSmu_Alarm_IomPinMismatchIndication = (IfxSmu_AlarmGroup_2 << 8) | 26,
IfxSmu_Alarm_SmuTimer0TimeOut = (IfxSmu_AlarmGroup_2 << 8) | 29,
IfxSmu_Alarm_SmuTimer1TimeOut = (IfxSmu_AlarmGroup_2 << 8) | 30,
IfxSmu_Alarm_SmuErrorPinFaultStateActivation = (IfxSmu_AlarmGroup_2 << 8) | 31,
IfxSmu_Alarm_ScuCguInputClockOutOfRange = (IfxSmu_AlarmGroup_3 << 8) | 0,
IfxSmu_Alarm_ScuCguSystemPllVcoLossOfLockEvent = (IfxSmu_AlarmGroup_3 << 8) | 1,
IfxSmu_Alarm_ScuCguPll_ErayVcoLossOfLockEvent = (IfxSmu_AlarmGroup_3 << 8) | 2,
IfxSmu_Alarm_ScuCguStmClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 3,
IfxSmu_Alarm_ScuCguPll_ErayOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 4,
IfxSmu_Alarm_ScuCguSystemPLLOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 5,
IfxSmu_Alarm_ScuCguSriClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 6,
IfxSmu_Alarm_ScuCguSpbClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 7,
IfxSmu_Alarm_ScuCguGtmClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 8,
IfxSmu_Alarm_ScuCguAdcClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 9,
IfxSmu_Alarm_ScuEvrEvr1Dot3VUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 11,
IfxSmu_Alarm_ScuEvrEvr1Dot3VOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 12,
IfxSmu_Alarm_ScuEvrEvr3Dot3VUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 13,
IfxSmu_Alarm_ScuEvrEvr3Dot3VOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 14,
IfxSmu_Alarm_ScuEvrExternalSupplyUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 15,
IfxSmu_Alarm_ScuEVRExternalSupplyOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 16,
IfxSmu_Alarm_ScuWdtsWatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 17,
IfxSmu_Alarm_ScuWdtCpu0WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 18,
IfxSmu_Alarm_ScuWdtCpu1WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 19,
IfxSmu_Alarm_ScuWdtCpu2WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 20,
IfxSmu_Alarm_ScuWdtWatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 21,
IfxSmu_Alarm_SpbAccessEnableError = (IfxSmu_AlarmGroup_3 << 8) | 22,
IfxSmu_Alarm_ScuDtsTemperatureUnderflow = (IfxSmu_AlarmGroup_3 << 8) | 25,
IfxSmu_Alarm_ScuDtsTemperatureOverflow = (IfxSmu_AlarmGroup_3 << 8) | 26,
IfxSmu_Alarm_ScuExternalEmergencyStopSignal = (IfxSmu_AlarmGroup_3 << 8) | 29,
IfxSmu_Alarm_SriBusError = (IfxSmu_AlarmGroup_3 << 8) | 30,
IfxSmu_Alarm_SpbBusError = (IfxSmu_AlarmGroup_3 << 8) | 31,
IfxSmu_Alarm_GtmSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 0,
IfxSmu_Alarm_GtmSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 1,
IfxSmu_Alarm_GtmSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 2,
IfxSmu_Alarm_GtmSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 3,
IfxSmu_Alarm_CanSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 4,
IfxSmu_Alarm_CanSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 5,
IfxSmu_Alarm_CanSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 6,
IfxSmu_Alarm_CanSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 7,
IfxSmu_Alarm_FlexraySramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 8,
IfxSmu_Alarm_FlexraySramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 9,
IfxSmu_Alarm_FlexraySramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 10,
IfxSmu_Alarm_FlexraySramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 11,
IfxSmu_Alarm_EmemSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 12,
IfxSmu_Alarm_EmemSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 13,
IfxSmu_Alarm_EmemSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 15,
IfxSmu_Alarm_SramsSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 16,
IfxSmu_Alarm_SramsSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 17,
IfxSmu_Alarm_SramsSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 18,
IfxSmu_Alarm_SramsSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 19,
IfxSmu_Alarm_SoftwareAlarm0 = (IfxSmu_AlarmGroup_5 << 8) | 0,
IfxSmu_Alarm_SoftwareAlarm1 = (IfxSmu_AlarmGroup_5 << 8) | 1,
IfxSmu_Alarm_SoftwareAlarm2 = (IfxSmu_AlarmGroup_5 << 8) | 2,
IfxSmu_Alarm_SoftwareAlarm3 = (IfxSmu_AlarmGroup_5 << 8) | 3,
IfxSmu_Alarm_SoftwareAlarm4 = (IfxSmu_AlarmGroup_5 << 8) | 4,
IfxSmu_Alarm_SoftwareAlarm5 = (IfxSmu_AlarmGroup_5 << 8) | 5,
IfxSmu_Alarm_SoftwareAlarm6 = (IfxSmu_AlarmGroup_5 << 8) | 6,
IfxSmu_Alarm_SoftwareAlarm7 = (IfxSmu_AlarmGroup_5 << 8) | 7,
IfxSmu_Alarm_SoftwareAlarm8 = (IfxSmu_AlarmGroup_5 << 8) | 8,
IfxSmu_Alarm_SoftwareAlarm9 = (IfxSmu_AlarmGroup_5 << 8) | 9,
IfxSmu_Alarm_SoftwareAlarm10 = (IfxSmu_AlarmGroup_5 << 8) | 10,
IfxSmu_Alarm_SoftwareAlarm11 = (IfxSmu_AlarmGroup_5 << 8) | 11,
IfxSmu_Alarm_SoftwareAlarm12 = (IfxSmu_AlarmGroup_5 << 8) | 12,
IfxSmu_Alarm_SoftwareAlarm13 = (IfxSmu_AlarmGroup_5 << 8) | 13,
IfxSmu_Alarm_SoftwareAlarm14 = (IfxSmu_AlarmGroup_5 << 8) | 14,
IfxSmu_Alarm_SoftwareAlarm15 = (IfxSmu_AlarmGroup_5 << 8) | 15,
IfxSmu_Alarm_Cpu2BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_6 << 8) | 1,
IfxSmu_Alarm_Cpu2PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 3,
IfxSmu_Alarm_Cpu2PcacheTagAddressError = (IfxSmu_AlarmGroup_6 << 8) | 4,
IfxSmu_Alarm_Cpu2PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 5,
IfxSmu_Alarm_Cpu2UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 6,
IfxSmu_Alarm_Cpu2UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 7,
IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_6 << 8) | 8,
IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 9,
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 10,
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 11,
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_6 << 8) | 12,
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 13,
IfxSmu_Alarm_Cpu2DcacheTagSramSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 14,
IfxSmu_Alarm_Cpu2DcacheTagSramUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 15,
IfxSmu_Alarm_Cpu2DcacheTagSramAddressError = (IfxSmu_AlarmGroup_6 << 8) | 16,
IfxSmu_Alarm_Cpu2DcacheTagSramAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 17,
IfxSmu_Alarm_Cpu2CpuInstructionFetchSRIInterfaceEdcError = (IfxSmu_AlarmGroup_6 << 8) | 18,
IfxSmu_Alarm_Cpu2CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_6 << 8) | 19,
IfxSmu_Alarm_noAlarm
}
SMU Alarm list
More...

Detailed Description

SMU on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSmu_cfg.h.

Macro Definition Documentation

◆ IFXSMU_NUM_MODULES

#define IFXSMU_NUM_MODULES (1)

Definition at line 65 of file IfxSmu_cfg.h.


iLLD_TC26B: IfxSmu_PinMap.c File Reference

  • _PinMap
Variables
IfxSmu_PinMap.c File Reference
iLLD » SMU

SMU I/O map. More...

#include "IfxSmu_PinMap.h"
Include dependency graph for IfxSmu_PinMap.c:

Go to the source code of this file.

Variables

IfxSmu_Fsp_Out | IfxSmu_FSP_P33_8_OUT = {&MODULE_SMU, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}
const IfxSmu_Fsp_Out * | IfxSmu_Fsp_Out_pinTable [IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]

Detailed Description

SMU I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSmu_PinMap.c.

Variable Documentation

◆ IfxSmu_Fsp_Out_pinTable

const IfxSmu_Fsp_Out* IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxSmu_FSP_P33_8_OUT
}
}
IfxSmu_FSP_P33_8_OUT
IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT
Definition: IfxSmu_PinMap.c:45

Definition at line 48 of file IfxSmu_PinMap.c.

Referenced by IfxSmu_initFsp().

◆ IfxSmu_FSP_P33_8_OUT

IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT = {&MODULE_SMU, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 45 of file IfxSmu_PinMap.c.


iLLD_TC26B: IfxSmu_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxSmu_PinMap.h File Reference
iLLD » SMU

SMU I/O map. More...

#include <IfxSmu_reg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxSmu_PinMap.h:

Go to the source code of this file.

Data Structures

struct IfxSmu_Fsp_Out
Fault Signal Protocol Pin. More...

Macros

#define | IFXSMU_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS 1

Variables

IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT
SMU_FSP: SMU. More...
IFX_EXTERN const IfxSmu_Fsp_Out * IfxSmu_Fsp_Out_pinTable [IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]
IfxSmu_Fsp_Out table. More...

Detailed Description

SMU I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSmu_PinMap.h.


iLLD_TC26B: IfxSmu.h File Reference

  • Smu
  • Std
Data Structures | Enumerations | Functions
IfxSmu.h File Reference
iLLD » SMU

SMU basic functionality. More...

#include "_Impl/IfxSmu_cfg.h"
#include "Cpu/Std/Ifx_Types.h"
#include "_PinMap/IfxSmu_PinMap.h"
#include "IfxSmu_reg.h"
#include "IfxSmu_regdef.h"
#include "IfxSmu_bf.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxSmu.h:

Go to the source code of this file.

Data Structures

struct IfxSmu_configFsp
FSP Configuration Structure. More...

Enumerations

enum IfxSmu_AlarmConfig {
IfxSmu_AlarmConfig_noAction = 0,
IfxSmu_AlarmConfig_interruptSet0 = 2,
IfxSmu_AlarmConfig_interruptSet1 = 3,
IfxSmu_AlarmConfig_interruptSet2 = 4,
IfxSmu_AlarmConfig_nmi = 5,
IfxSmu_AlarmConfig_scuReset = 6,
IfxSmu_AlarmConfig_cpuIdle = 7
}
SMU Alarm Configuration Ifx_SMU.AGCF[][]. More...
enum IfxSmu_Cmd {
IfxSmu_Cmd_start = 0,
IfxSmu_Cmd_activateFsp = 1,
IfxSmu_Cmd_releaseFsp = 2,
IfxSmu_Cmd_activatePes = 3,
IfxSmu_Cmd_stopRecoveryTimer = 4,
IfxSmu_Cmd_enableClearAlarmStatus = 5,
IfxSmu_Cmd_triggerAlarm = 6
}
SMU Commands. More...
enum IfxSmu_Fsp_Mode {
IfxSmu_Fsp_Mode_bistable,
IfxSmu_Fsp_Mode_timeSwitching
}

Functions

IFX_INLINE boolean | IfxSmu_releaseFsp (Ifx_SMU *smu)
Turns the FSP into the fault free state. More...
IFX_INLINE void | IfxSmu_initFspConfig (IfxSmu_configFsp *config)
Initialize the FSP configuartion to default. More...
IFX_INLINE boolean | IfxSmu_activateFsp (Ifx_SMU *smu)
Activates the Fault Signaling Protocol. More...
IFX_EXTERN boolean | IfxSmu_initFsp (Ifx_SMU *smu, IfxSmu_configFsp *config)
Initialize the FSP. More...
IFX_EXTERN float32 | IfxSmu_getFspFaultFreeFrequency (Ifx_SMU *smu)
Return FSP frequency (Time switching only) More...
IFX_EXTERN float32 | IfxSmu_getFspFaultStateTime (Ifx_SMU *smu)
Return the minimal fault state time. More...
IFX_EXTERN void | IfxSmu_enableAlarmFsp (Ifx_SMU *smu, IfxSmu_Alarm alarm, boolean enabled)
Set the alarm FSP configuration. More...
IFX_INLINE boolean | IfxSmu_activatePes (Ifx_SMU *smu)
Triggers the activation of the Port Emergency Stop (PES). More...
IFX_INLINE boolean | IfxSmu_stopRecoveryTimer (Ifx_SMU *smu, IfxSmu_RecoveryTimer timer)
Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the product. More...
IFX_INLINE boolean | IfxSmu_enableClearAlarmStatus (Ifx_SMU *smu)
Alarm Status Clear Enable Command. More...
IFX_INLINE boolean | IfxSmu_triggerAlarm (Ifx_SMU *smu, IfxSmu_Alarm alarm)
Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "Alarm Mapping". More...
IFX_INLINE boolean | IfxSmu_start (Ifx_SMU *smu)
Forces the SSM to go to the RUN state from the START state. More...
IFX_EXTERN boolean | IfxSmu_cmd (Ifx_SMU *smu, uint8 cmd, uint8 arg)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.6 SMU Control Interface Ref: TC27xC UM v2.2: 9.5.2 SMU Configuration Registers. More...
IFX_EXTERN boolean | IfxSmu_unlock (Ifx_SMU *smu)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
IFX_EXTERN void | IfxSmu_lock (Ifx_SMU *smu)
Lock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
IFX_EXTERN void | IfxSmu_lockForever (Ifx_SMU *smu)
Lock the SMU configuration up to the next application reset Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
IFX_EXTERN void | IfxSmu_setAlarmConfig (Ifx_SMU *smu, IfxSmu_Alarm alarm, IfxSmu_AlarmConfig config)
Set the SMU alarm configuration. More...
IFX_EXTERN boolean | IfxSmu_isAlarmSet (Ifx_SMU *smu, IfxSmu_Alarm alarm)
Return the alarm status. More...
IFX_EXTERN IfxSmu_Alarm | IfxSmu_getAlarm (Ifx_SMU *smu)
Get the alarm flag. More...
IFX_EXTERN void | IfxSmu_clearAlarm (Ifx_SMU *smu, IfxSmu_Alarm alarm)
Clear the alarm flag. More...

Detailed Description

SMU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSmu.h.


iLLD_TC26B: SRC

Modules | Files
SRC
iLLD
Collaboration diagram for SRC:

Modules

Implementation
Standard Driver
How to use Service Request Mechanism?

Files

file | IfxSrc_cfg.h
SRC on-chip implementation data.
file | IfxSrc.h
SRC basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » SRC
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » SRC » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxSrc_Tos {
IfxSrc_Tos_cpu0 = 0,
IfxSrc_Tos_cpu1 = 1,
IfxSrc_Tos_dma = 3
}
Identifier of interrupt service provider, which handles the interrupt service request. More...

Detailed Description

Enumeration Type Documentation

◆ IfxSrc_Tos

enum IfxSrc_Tos

Identifier of interrupt service provider, which handles the interrupt service request.

Enumerator
IfxSrc_Tos_cpu0 | CPU0 interrupt service provider, which handles the interrupt service request.
IfxSrc_Tos_cpu1 | CPU1 interrupt service provider, which handles the interrupt service request.
IfxSrc_Tos_dma | DMA interrupt service provider, which handles the interrupt service request.

Definition at line 66 of file IfxSrc_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » SRC
Collaboration diagram for Standard Driver:

Modules

Service Request Functions
Module Functions

Detailed Description


iLLD_TC26B: Service Request Functions

Functions
Service Request Functions
iLLD » SRC » Standard Driver
Collaboration diagram for Service Request Functions:

Functions

IFX_INLINE void | IfxSrc_clearOverrun (volatile Ifx_SRC_SRCR *src)
Resets the overrun flag of the Service Request. More...
IFX_INLINE void | IfxSrc_clearRequest (volatile Ifx_SRC_SRCR *src)
Resets a specific interrupt service by software. More...
IFX_INLINE boolean | IfxSrc_isOverrun (volatile Ifx_SRC_SRCR *src)
Gets the current overrun status. More...
IFX_INLINE boolean | IfxSrc_isRequested (volatile Ifx_SRC_SRCR *src)
Gets the current request status. More...
IFX_INLINE void | IfxSrc_setRequest (volatile Ifx_SRC_SRCR *src)
Requests a specific interrupt service by software. More...

Detailed Description

Function Documentation

◆ IfxSrc_clearOverrun()

IFX_INLINE void IfxSrc_clearOverrun ( volatile Ifx_SRC_SRCR * src )

Resets the overrun flag of the Service Request.

Parameters
src pointer to the Service Request Control register which the overrun flag should be cleared.
Returns
None

Usage example: see IfxSrc_init

Definition at line 241 of file IfxSrc.h.

◆ IfxSrc_clearRequest()

IFX_INLINE void IfxSrc_clearRequest ( volatile Ifx_SRC_SRCR * src )

Resets a specific interrupt service by software.

Parameters
src pointer to the Service Request Control register which the request should be cleared.
Returns
None

Usage example: see IfxSrc_init

Definition at line 247 of file IfxSrc.h.

Referenced by IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_write(), and IfxSrc_init().

◆ IfxSrc_isOverrun()

IFX_INLINE boolean IfxSrc_isOverrun ( volatile Ifx_SRC_SRCR * src )

Gets the current overrun status.

Parameters
src pointer to the Service Request Control register for which the overrun status should be returned.
Returns
current service request control overrun status.

Usage example: see IfxSrc_init

Definition at line 279 of file IfxSrc.h.

◆ IfxSrc_isRequested()

IFX_INLINE boolean IfxSrc_isRequested ( volatile Ifx_SRC_SRCR * src )

Gets the current request status.

Parameters
src pointer to the Service Request Control register for which the request status should be returned.
Returns
current service request control request status.

Usage example: see IfxSrc_init

Definition at line 285 of file IfxSrc.h.

◆ IfxSrc_setRequest()

IFX_INLINE void IfxSrc_setRequest ( volatile Ifx_SRC_SRCR * src )

Requests a specific interrupt service by software.

Parameters
src pointer to the Service Request Control register which the interrupt has to be requested.
Returns
None

Usage example: see IfxSrc_init

Definition at line 291 of file IfxSrc.h.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » SRC » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxSrc_deinit (volatile Ifx_SRC_SRCR *src)
DeInitializes the service request control register. More...
IFX_INLINE void | IfxSrc_disable (volatile Ifx_SRC_SRCR *src)
Disables a specific interrupt service request. More...
IFX_INLINE void | IfxSrc_enable (volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request. More...
IFX_INLINE void | IfxSrc_init (volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register. More...

Detailed Description

Function Documentation

◆ IfxSrc_deinit()

IFX_INLINE void IfxSrc_deinit ( volatile Ifx_SRC_SRCR * src )

DeInitializes the service request control register.

Parameters
src pointer to the Service Request Control register which should be deinitialised.
Returns
None

Usage example: see IfxSrc_init

Definition at line 253 of file IfxSrc.h.

◆ IfxSrc_disable()

IFX_INLINE void IfxSrc_disable ( volatile Ifx_SRC_SRCR * src )

Disables a specific interrupt service request.

Parameters
src pointer to the Service Request Control register for which the interrupt has to be disabled.
Returns
None

Usage example: see IfxSrc_init

Definition at line 259 of file IfxSrc.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxSrc_enable()

IFX_INLINE void IfxSrc_enable ( volatile Ifx_SRC_SRCR * src )

Enables a specific interrupt service request.

Parameters
src pointer to the Service Request Control register for which the interrupt has to be enabled.
Returns
None

Usage example: see IfxSrc_init

Definition at line 265 of file IfxSrc.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Spi_initModule(), IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), IfxCif_Cam_initCifIspUnit(), IfxDma_Dma_initChannel(), IfxDsadc_Rdc_initHwChannels(), IfxDts_Dts_initModule(), IfxEray_Eray_initModule(), IfxEth_init(), IfxFce_Crc_initModule(), IfxFft_Fft_initDma(), IfxFft_Fft_initModule(), IfxGpt12_IncrEnc_init(), IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Timer_init(), IfxGtm_Tim_In_init(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Timer_init(), IfxHssl_enableHsctInterrupt(), IfxHssl_enableHsslCOKInterrupt(), IfxHssl_enableHsslERRInterrupt(), IfxHssl_enableHsslEXIInterrupt(), IfxHssl_enableHsslRDIInterrupt(), IfxHssl_enableHsslTRGInterrupt(), IfxI2c_enableBurstDataTransferInterrupt(), IfxI2c_enableErrorInterrupt(), IfxI2c_enableLastBurstDataTransferInterrupt(), IfxI2c_enableLastSingleDataTransferInterrupt(), IfxI2c_enableProtocolInterrupt(), IfxI2c_enableSingleDataTransferInterrupt(), IfxMultican_Can_initModule(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiSlave_initModule(), IfxSent_Sent_initChannel(), IfxStm_initCompare(), IfxStm_Timer_init(), and IfxVadc_Adc_initChannel().

◆ IfxSrc_init()

IFX_INLINE void IfxSrc_init | ( | volatile Ifx_SRC_SRCR * | src,
 |  | IfxSrc_Tos | typOfService,
 |  | Ifx_Priority | priority
 | ) |  |

Initializes the service request control register.

Parameters
src | pointer to the Service Request Control register which should be initialised.
typOfService | type of interrupt service provider.
priority | Interrupt priority.
Returns
None

Get the peripheral service control register which request need to be serviced and assign this service to any of service providers.

//define the interrupt priority
#define IFXASCLIN0_TX_INTPRIO 2
//get the service request
volatile Ifx_SRC_SRCR *src = IfxAsclin_getSrcPointerRx( &MODULE_ASCLIN0 );
//initlaise the service request
IfxSrc_init( src, IfxSrc_Tos_cpu0, IFXASCLIN0_TX_INTPRIO );
// enable the service
IfxSrc_enable( src );
//check for service request flags and clear if they occur
if ( IfxSrc_isRequested( src ) == TRUE )
{
IfxSrc_clearRequest( src );
}
if ( IfxSrc_isOverrun( src ) == TRUE )
{
IfxSrc_clearOverrun( src );
}
// Atlast deinitialise the service control
IfxSrc_deinit( src );

Definition at line 271 of file IfxSrc.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Spi_initModule(), IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), IfxCif_Cam_initCifIspUnit(), IfxDma_Dma_initChannel(), IfxDsadc_Rdc_initHwChannels(), IfxDts_Dts_initModule(), IfxEray_Eray_initModule(), IfxEth_init(), IfxFce_Crc_initModule(), IfxFft_Fft_initDma(), IfxFft_Fft_initModule(), IfxGpt12_IncrEnc_init(), IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Timer_init(), IfxGtm_Tim_In_init(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Timer_init(), IfxHssl_enableHsctInterrupt(), IfxHssl_enableHsslCOKInterrupt(), IfxHssl_enableHsslERRInterrupt(), IfxHssl_enableHsslEXIInterrupt(), IfxHssl_enableHsslRDIInterrupt(), IfxHssl_enableHsslTRGInterrupt(), IfxI2c_enableBurstDataTransferInterrupt(), IfxI2c_enableErrorInterrupt(), IfxI2c_enableLastBurstDataTransferInterrupt(), IfxI2c_enableLastSingleDataTransferInterrupt(), IfxI2c_enableProtocolInterrupt(), IfxI2c_enableSingleDataTransferInterrupt(), IfxMultican_Can_initModule(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiSlave_initModule(), IfxSent_Sent_initChannel(), IfxStm_initCompare(), IfxStm_Timer_init(), and IfxVadc_Adc_initChannel().


iLLD_TC26B: How to use Service Request Mechanism?

How to use Service Request Mechanism?
iLLD » SRC
Collaboration diagram for How to use Service Request Mechanism?:

For Aurix controller peripherals that can generate service requests is connected to one or more Service Request Nodes (SRNs) in the central Interrupt Router(IR) module. Refer to Controller User Manual for more details
IfxSrc driver provides the APIs to configure and control service requests. Refer How to use Service Request Mechanism? for details of these APIs.

Initialize the Service Request Node

Service request node is initialized to configure the following,
1) Route the interrupt trigger to service provider, which are:
__a. One of the available CPUs or
__b. DMA controller
2) Priority of CPU Interrupt or DMA Trigger.

For Interrupt or DMA to be correctly triggered, following steps are to be done in the user code:

Step1: Configure the Node

User must configure the service request node in the application / driver files.

Step2: Enable the Trigger

Enable the service request node to connect the trigger event from the hardware to service provider.

Example: Following example show the configuration for STM0 Service request 0 trigger configured to trigger CPU1 with the priority specified by IFX_INTPRIO_STM0 (from the example at IfxCpu_Irq)

//file: myApplication.c
#include "Ifx_IntPrioDef.h" // to get the priority numbers
void myDriverInitFunction(void)
{
// driver init code
// Step1: Call the function to route the trigger from for SRC_STM0_SR0 to CPU1
// and priority specified at Ifx_IntPrioDef.h globally
IfxSrc_init(&MODULE_SRC.STM.STM[0].SR0, IfxSrc_Tos_cpu1, IFX_INTPRIO_STM0);
// Step2: Enable the service request node
IfxSrc_init(&MODULE_SRC.STM.STM[0].SR0);
}


iLLD_TC26B: IfxSrc_cfg.h File Reference

  • _Impl
Enumerations
IfxSrc_cfg.h File Reference
iLLD » SRC

SRC on-chip implementation data. More...

Go to the source code of this file.

Enumerations

enum IfxSrc_Tos {
IfxSrc_Tos_cpu0 = 0,
IfxSrc_Tos_cpu1 = 1,
IfxSrc_Tos_dma = 3
}
Identifier of interrupt service provider, which handles the interrupt service request. More...

Detailed Description

SRC on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSrc_cfg.h.


iLLD_TC26B: IfxSrc.h File Reference

  • Src
  • Std
Functions
IfxSrc.h File Reference
iLLD » SRC

SRC basic functionality. More...

#include "_Impl/IfxSrc_cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxSrc_reg.h"
Include dependency graph for IfxSrc.h:

Go to the source code of this file.

Functions

IFX_INLINE void | IfxSrc_clearOverrun (volatile Ifx_SRC_SRCR *src)
Resets the overrun flag of the Service Request. More...
IFX_INLINE void | IfxSrc_clearRequest (volatile Ifx_SRC_SRCR *src)
Resets a specific interrupt service by software. More...
IFX_INLINE boolean | IfxSrc_isOverrun (volatile Ifx_SRC_SRCR *src)
Gets the current overrun status. More...
IFX_INLINE boolean | IfxSrc_isRequested (volatile Ifx_SRC_SRCR *src)
Gets the current request status. More...
IFX_INLINE void | IfxSrc_setRequest (volatile Ifx_SRC_SRCR *src)
Requests a specific interrupt service by software. More...
IFX_INLINE void | IfxSrc_deinit (volatile Ifx_SRC_SRCR *src)
DeInitializes the service request control register. More...
IFX_INLINE void | IfxSrc_disable (volatile Ifx_SRC_SRCR *src)
Disables a specific interrupt service request. More...
IFX_INLINE void | IfxSrc_enable (volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request. More...
IFX_INLINE void | IfxSrc_init (volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register. More...

Detailed Description

SRC basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSrc.h.


iLLD_TC26B: STM

Modules | Files
STM
iLLD
Collaboration diagram for STM:

Modules

Implementation
Standard Driver
How to use the Stm driver?
STM Timer Interface

Files

file | IfxStm_cfg.h
STM on-chip implementation data.
file | IfxStm.h
STM basic functionality.
file | IfxStm_Timer.h
STM TIMER details.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » STM
Collaboration diagram for Implementation:

Modules

Enumerations
Global Variables

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » STM » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxStm_Index {
IfxStm_Index_none = -1,
IfxStm_Index_0 = 0,
IfxStm_Index_1
}
List of the available STM resources. More...

Detailed Description

Enumeration Type Documentation

◆ IfxStm_Index

enum IfxStm_Index

List of the available STM resources.

Enumerator
IfxStm_Index_none | Not Selected.
IfxStm_Index_0 | STM index 0.
IfxStm_Index_1 | STM index 1.

Definition at line 84 of file IfxStm_cfg.h.


iLLD_TC26B: Global Variables

Variables
Global Variables
iLLD » STM » Implementation
Collaboration diagram for Global Variables:

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap [IFXSTM_NUM_MODULES]

Detailed Description

Variable Documentation

◆ IfxStm_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES]

Definition at line 100 of file IfxStm_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » STM
Collaboration diagram for Standard Driver:

Modules

Enumerations
Data Structures
Module Functions
Timer Functions
Comparator Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » STM » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxStm_Comparator {
IfxStm_Comparator_0 = 0,
IfxStm_Comparator_1
}
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2) More...
enum IfxStm_ComparatorInterrupt {
IfxStm_ComparatorInterrupt_ir0 = 0,
IfxStm_ComparatorInterrupt_ir1 = 1
}
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1) More...
enum IfxStm_ComparatorOffset {
IfxStm_ComparatorOffset_0 = 0,
IfxStm_ComparatorOffset_1,
IfxStm_ComparatorOffset_2,
IfxStm_ComparatorOffset_3,
IfxStm_ComparatorOffset_4,
IfxStm_ComparatorOffset_5,
IfxStm_ComparatorOffset_6,
IfxStm_ComparatorOffset_7,
IfxStm_ComparatorOffset_8,
IfxStm_ComparatorOffset_9,
IfxStm_ComparatorOffset_10,
IfxStm_ComparatorOffset_11,
IfxStm_ComparatorOffset_12,
IfxStm_ComparatorOffset_13,
IfxStm_ComparatorOffset_14,
IfxStm_ComparatorOffset_15,
IfxStm_ComparatorOffset_16,
IfxStm_ComparatorOffset_17,
IfxStm_ComparatorOffset_18,
IfxStm_ComparatorOffset_19,
IfxStm_ComparatorOffset_20,
IfxStm_ComparatorOffset_21,
IfxStm_ComparatorOffset_22,
IfxStm_ComparatorOffset_23,
IfxStm_ComparatorOffset_24,
IfxStm_ComparatorOffset_25,
IfxStm_ComparatorOffset_26,
IfxStm_ComparatorOffset_27,
IfxStm_ComparatorOffset_28,
IfxStm_ComparatorOffset_29,
IfxStm_ComparatorOffset_30,
IfxStm_ComparatorOffset_31
}
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2) More...
enum IfxStm_ComparatorSize {
IfxStm_ComparatorSize_1Bit = 0,
IfxStm_ComparatorSize_2Bits = 1,
IfxStm_ComparatorSize_3Bits = 2,
IfxStm_ComparatorSize_4Bits = 3,
IfxStm_ComparatorSize_5Bits = 4,
IfxStm_ComparatorSize_6Bits = 5,
IfxStm_ComparatorSize_7Bits = 6,
IfxStm_ComparatorSize_8Bits = 7,
IfxStm_ComparatorSize_9Bits = 8,
IfxStm_ComparatorSize_10Bits = 9,
IfxStm_ComparatorSize_11Bits = 10,
IfxStm_ComparatorSize_12Bits = 11,
IfxStm_ComparatorSize_13Bits = 12,
IfxStm_ComparatorSize_14Bits = 13,
IfxStm_ComparatorSize_15Bits = 14,
IfxStm_ComparatorSize_16Bits = 15,
IfxStm_ComparatorSize_17Bits = 16,
IfxStm_ComparatorSize_18Bits = 17,
IfxStm_ComparatorSize_19Bits = 18,
IfxStm_ComparatorSize_20Bits = 19,
IfxStm_ComparatorSize_21Bits = 20,
IfxStm_ComparatorSize_22Bits = 21,
IfxStm_ComparatorSize_23Bits = 22,
IfxStm_ComparatorSize_24Bits = 23,
IfxStm_ComparatorSize_25Bits = 24,
IfxStm_ComparatorSize_26Bits = 25,
IfxStm_ComparatorSize_27Bits = 26,
IfxStm_ComparatorSize_28Bits = 27,
IfxStm_ComparatorSize_29Bits = 28,
IfxStm_ComparatorSize_30Bits = 29,
IfxStm_ComparatorSize_31Bits = 30,
IfxStm_ComparatorSize_32Bits = 31
}
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2) More...
enum IfxStm_SleepMode {
IfxStm_SleepMode_enable = 0,
IfxStm_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_STM.CLC.B.EDIS. More...
enum IfxStm_SuspendMode {
IfxStm_SuspendMode_none = 0,
IfxStm_SuspendMode_hard = 1,
IfxStm_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Detailed Description

Enumeration Type Documentation

◆ IfxStm_Comparator

enum IfxStm_Comparator

Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2)

Enumerator
IfxStm_Comparator_0 | Comparator Id 0.
IfxStm_Comparator_1 | Comparator Id 1.

Definition at line 157 of file IfxStm.h.

◆ IfxStm_ComparatorInterrupt

enum IfxStm_ComparatorInterrupt

Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1)

Enumerator
IfxStm_ComparatorInterrupt_ir0 | Select STMIR0.
IfxStm_ComparatorInterrupt_ir1 | Select STMIR1.

Definition at line 165 of file IfxStm.h.

◆ IfxStm_ComparatorOffset

enum IfxStm_ComparatorOffset

Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2)

Enumerator
IfxStm_ComparatorOffset_0 | Comparator start bit position 0 with 64 bit timer.
IfxStm_ComparatorOffset_1 | Comparator start bit position 1 with 64 bit timer.
IfxStm_ComparatorOffset_2 | Comparator start bit position 2 with 64 bit timer.
IfxStm_ComparatorOffset_3 | Comparator start bit position 3 with 64 bit timer.
IfxStm_ComparatorOffset_4 | Comparator start bit position 4 with 64 bit timer.
IfxStm_ComparatorOffset_5 | Comparator start bit position 5 with 64 bit timer.
IfxStm_ComparatorOffset_6 | Comparator start bit position 6 with 64 bit timer.
IfxStm_ComparatorOffset_7 | Comparator start bit position 7 with 64 bit timer.
IfxStm_ComparatorOffset_8 | Comparator start bit position 8 with 64 bit timer.
IfxStm_ComparatorOffset_9 | Comparator start bit position 9 with 64 bit timer.
IfxStm_ComparatorOffset_10 | Comparator start bit position 10 with 64 bit timer.
IfxStm_ComparatorOffset_11 | Comparator start bit position 11 with 64 bit timer.
IfxStm_ComparatorOffset_12 | Comparator start bit position 12 with 64 bit timer.
IfxStm_ComparatorOffset_13 | Comparator start bit position 13 with 64 bit timer.
IfxStm_ComparatorOffset_14 | Comparator start bit position 14 with 64 bit timer.
IfxStm_ComparatorOffset_15 | Comparator start bit position 15 with 64 bit timer.
IfxStm_ComparatorOffset_16 | Comparator start bit position 16 with 64 bit timer.
IfxStm_ComparatorOffset_17 | Comparator start bit position 17 with 64 bit timer.
IfxStm_ComparatorOffset_18 | Comparator start bit position 18 with 64 bit timer.
IfxStm_ComparatorOffset_19 | Comparator start bit position 19 with 64 bit timer.
IfxStm_ComparatorOffset_20 | Comparator start bit position 20 with 64 bit timer.
IfxStm_ComparatorOffset_21 | Comparator start bit position 21 with 64 bit timer.
IfxStm_ComparatorOffset_22 | Comparator start bit position 22 with 64 bit timer.
IfxStm_ComparatorOffset_23 | Comparator start bit position 23 with 64 bit timer.
IfxStm_ComparatorOffset_24 | Comparator start bit position 24 with 64 bit timer.
IfxStm_ComparatorOffset_25 | Comparator start bit position 25 with 64 bit timer.
IfxStm_ComparatorOffset_26 | Comparator start bit position 26 with 64 bit timer.
IfxStm_ComparatorOffset_27 | Comparator start bit position 27 with 64 bit timer.
IfxStm_ComparatorOffset_28 | Comparator start bit position 28 with 64 bit timer.
IfxStm_ComparatorOffset_29 | Comparator start bit position 29 with 64 bit timer.
IfxStm_ComparatorOffset_30 | Comparator start bit position 30 with 64 bit timer.
IfxStm_ComparatorOffset_31 | Comparator start bit position 31 with 64 bit timer.

Definition at line 173 of file IfxStm.h.

◆ IfxStm_ComparatorSize

enum IfxStm_ComparatorSize

Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2)

Enumerator
IfxStm_ComparatorSize_1Bit | Size of compare value to compare with timer: 1 bit.
IfxStm_ComparatorSize_2Bits | Size of compare value to compare with timer: 2 bits.
IfxStm_ComparatorSize_3Bits | Size of compare value to compare with timer: 3 bits.
IfxStm_ComparatorSize_4Bits | Size of compare value to compare with timer: 4 bits.
IfxStm_ComparatorSize_5Bits | Size of compare value to compare with timer: 5 bits.
IfxStm_ComparatorSize_6Bits | Size of compare value to compare with timer: 6 bits.
IfxStm_ComparatorSize_7Bits | Size of compare value to compare with timer: 7 bits.
IfxStm_ComparatorSize_8Bits | Size of compare value to compare with timer: 8 bits.
IfxStm_ComparatorSize_9Bits | Size of compare value to compare with timer: 9 bits.
IfxStm_ComparatorSize_10Bits | Size of compare value to compare with timer: 10 bits.
IfxStm_ComparatorSize_11Bits | Size of compare value to compare with timer: 11 bits.
IfxStm_ComparatorSize_12Bits | Size of compare value to compare with timer: 12 bits.
IfxStm_ComparatorSize_13Bits | Size of compare value to compare with timer: 13 bits.
IfxStm_ComparatorSize_14Bits | Size of compare value to compare with timer: 14 bits.
IfxStm_ComparatorSize_15Bits | Size of compare value to compare with timer: 15 bits.
IfxStm_ComparatorSize_16Bits | Size of compare value to compare with timer: 16 bits.
IfxStm_ComparatorSize_17Bits | Size of compare value to compare with timer: 17 bits.
IfxStm_ComparatorSize_18Bits | Size of compare value to compare with timer: 18 bits.
IfxStm_ComparatorSize_19Bits | Size of compare value to compare with timer: 19 bits.
IfxStm_ComparatorSize_20Bits | Size of compare value to compare with timer: 20 bits.
IfxStm_ComparatorSize_21Bits | Size of compare value to compare with timer: 21 bits.
IfxStm_ComparatorSize_22Bits | Size of compare value to compare with timer: 22 bits.
IfxStm_ComparatorSize_23Bits | Size of compare value to compare with timer: 23 bits.
IfxStm_ComparatorSize_24Bits | Size of compare value to compare with timer: 24 bits.
IfxStm_ComparatorSize_25Bits | Size of compare value to compare with timer: 25 bits.
IfxStm_ComparatorSize_26Bits | Size of compare value to compare with timer: 26 bits.
IfxStm_ComparatorSize_27Bits | Size of compare value to compare with timer: 27 bits.
IfxStm_ComparatorSize_28Bits | Size of compare value to compare with timer: 28 bits.
IfxStm_ComparatorSize_29Bits | Size of compare value to compare with timer: 29 bits.
IfxStm_ComparatorSize_30Bits | Size of compare value to compare with timer: 30 bits.
IfxStm_ComparatorSize_31Bits | Size of compare value to compare with timer: 31 bits.
IfxStm_ComparatorSize_32Bits | Size of compare value to compare with timer: 32 bits.

Definition at line 211 of file IfxStm.h.

◆ IfxStm_SleepMode

enum IfxStm_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_STM.CLC.B.EDIS.

Enumerator
IfxStm_SleepMode_enable | enables sleep mode
IfxStm_SleepMode_disable | disables sleep mode

Definition at line 250 of file IfxStm.h.

◆ IfxStm_SuspendMode

enum IfxStm_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxStm_SuspendMode_none | No suspend.
IfxStm_SuspendMode_hard | Hard Suspend.
IfxStm_SuspendMode_soft | Soft Suspend.

Definition at line 258 of file IfxStm.h.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » STM » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct IfxStm_CompareConfig
Comparator Configuration Structure. More...

Detailed Description

Data Structure Documentation

◆ IfxStm_CompareConfig

struct IfxStm_CompareConfig

Comparator Configuration Structure.

Definition at line 275 of file IfxStm.h.

Data Fields
IfxStm_Comparator | comparator | Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2).
IfxStm_ComparatorInterrupt | comparatorInterrupt | Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1).
IfxStm_ComparatorOffset | compareOffset | Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2).
IfxStm_ComparatorSize | compareSize | Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2).
uint32 | ticks | count for next comparison from current timer count.
Ifx_Priority | triggerPriority | Interrupt priority. Range = 0 .. 255. 0 = interrupt is disabled.
IfxSrc_Tos | typeOfService | Type of service.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » STM » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE uint64 | IfxStm_get (Ifx_STM *stm)
Returns system timer value. More...
IFX_INLINE float32 | IfxStm_getFrequency (Ifx_STM *stm)
Returns the system timer frequency. More...
IFX_INLINE boolean | IfxStm_isModuleSuspended (Ifx_STM *stm)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxStm_setSuspendMode (Ifx_STM *stm, IfxStm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxStm_disableModule (Ifx_STM *stm)
Disables the Stm module. More...
IFX_EXTERN void | IfxStm_enableOcdsSuspend (Ifx_STM *stm)
enable suspend by debugger. Note: The API will write into the OCS register only if OCDS is enabled More...
IFX_EXTERN Ifx_STM * | IfxStm_getAddress (IfxStm_Index stm)
Returns the module index of the selected STM module. More...
IFX_EXTERN IfxStm_Index | IfxStm_getIndex (Ifx_STM *stm)
API to get the resource index of the STM specified. More...

Detailed Description

Function Documentation

◆ IfxStm_disableModule()

IFX_EXTERN void IfxStm_disableModule ( Ifx_STM * stm )

Disables the Stm module.

Parameters
stm pointer to STM registers
Returns
None

Definition at line 78 of file IfxStm.c.

◆ IfxStm_enableOcdsSuspend()

IFX_EXTERN void IfxStm_enableOcdsSuspend ( Ifx_STM * stm )

enable suspend by debugger. Note: The API will write into the OCS register only if OCDS is enabled

Parameters
stm pointer to System timer module registers.
Returns
None

Definition at line 101 of file IfxStm.c.

◆ IfxStm_get()

IFX_INLINE uint64 IfxStm_get ( Ifx_STM * stm )

Returns system timer value.

Parameters
stm pointer to System timer module registers.
Returns
system timer value.

Definition at line 576 of file IfxStm.h.

Referenced by IfxStm_getOffsetTimer(), IfxStm_now(), IfxStm_Timer_run(), now(), and nowWithoutCriticalSection().

◆ IfxStm_getAddress()

IFX_EXTERN Ifx_STM* IfxStm_getAddress ( IfxStm_Index stm )

Returns the module index of the selected STM module.

Parameters
stm Pointer to STM module registers
Returns
STM module register address

Definition at line 116 of file IfxStm.c.

◆ IfxStm_getFrequency()

IFX_INLINE float32 IfxStm_getFrequency ( Ifx_STM * stm )

Returns the system timer frequency.

Parameters
stm pointer to System timer module registers.
Returns
the system timer frequency in Hz.

Definition at line 593 of file IfxStm.h.

Referenced by IfxStm_getTicksFromMicroseconds(), IfxStm_getTicksFromMilliseconds(), IfxStm_Timer_init(), and IfxStm_Timer_updateInputFrequency().

◆ IfxStm_getIndex()

IFX_EXTERN IfxStm_Index IfxStm_getIndex ( Ifx_STM * stm )

API to get the resource index of the STM specified.

Parameters
stm pointer to System timer module registers.
Returns
system timer module index.

Definition at line 133 of file IfxStm.c.

Referenced by IfxStm_getSrcPointer(), and IfxStm_initCompare().

◆ IfxStm_isModuleSuspended()

IFX_INLINE boolean IfxStm_isModuleSuspended ( Ifx_STM * stm )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
stm Pointer to STM module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 676 of file IfxStm.h.

◆ IfxStm_setSuspendMode()

IFX_INLINE void IfxStm_setSuspendMode | ( | Ifx_STM * | stm,
 |  | IfxStm_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
stm | Pointer to STM module registers
mode | Module suspend mode
Returns
None

Definition at line 697 of file IfxStm.h.


iLLD_TC26B: Timer Functions

Functions
Timer Functions
iLLD » STM » Standard Driver
Collaboration diagram for Timer Functions:

Functions

IFX_INLINE uint32 | IfxStm_getLower (Ifx_STM *stm)
Returns the lower system timer value. More...
IFX_INLINE uint32 | IfxStm_getOffset12Timer (Ifx_STM *stm)
Gets the TIM3 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset16Timer (Ifx_STM *stm)
Gets the TIM4 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset20Timer (Ifx_STM *stm)
Gets the TIM5 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset32Timer (Ifx_STM *stm)
Gets the TIM6 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset4Timer (Ifx_STM *stm)
Gets the TIM1 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset8Timer (Ifx_STM *stm)
Gets the TIM2 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffsetTimer (Ifx_STM *stm, uint8 offset)
Returns the timer value shifted right by offset. More...
IFX_INLINE void | IfxStm_waitTicks (Ifx_STM *stm, uint32 ticks)
Wait for requested time. The macro waits in while loop for the specified time in system timer ticks. More...

Detailed Description

Function Documentation

◆ IfxStm_getLower()

IFX_INLINE uint32 IfxStm_getLower ( Ifx_STM * stm )

Returns the lower system timer value.

Parameters
stm pointer to System timer module registers.
Returns
the lower system timer value.

Definition at line 604 of file IfxStm.h.

Referenced by IfxStm_waitTicks().

◆ IfxStm_getOffset12Timer()

IFX_INLINE uint32 IfxStm_getOffset12Timer ( Ifx_STM * stm )

Gets the TIM3 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM3 counter value.

Definition at line 610 of file IfxStm.h.

◆ IfxStm_getOffset16Timer()

IFX_INLINE uint32 IfxStm_getOffset16Timer ( Ifx_STM * stm )

Gets the TIM4 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM4 counter value.

Definition at line 616 of file IfxStm.h.

◆ IfxStm_getOffset20Timer()

IFX_INLINE uint32 IfxStm_getOffset20Timer ( Ifx_STM * stm )

Gets the TIM5 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM5 counter value.

Definition at line 622 of file IfxStm.h.

◆ IfxStm_getOffset32Timer()

IFX_INLINE uint32 IfxStm_getOffset32Timer ( Ifx_STM * stm )

Gets the TIM6 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM6 counter value.

Definition at line 628 of file IfxStm.h.

◆ IfxStm_getOffset4Timer()

IFX_INLINE uint32 IfxStm_getOffset4Timer ( Ifx_STM * stm )

Gets the TIM1 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM1 counter value.

Definition at line 634 of file IfxStm.h.

◆ IfxStm_getOffset8Timer()

IFX_INLINE uint32 IfxStm_getOffset8Timer ( Ifx_STM * stm )

Gets the TIM2 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM2 counter value.

Definition at line 640 of file IfxStm.h.

◆ IfxStm_getOffsetTimer()

IFX_INLINE uint32 IfxStm_getOffsetTimer | ( | Ifx_STM * | stm,
 |  | uint8 | offset
 | ) |  |

Returns the timer value shifted right by offset.

Parameters
stm | pointer to System timer module registers.
offset | offset value.
Returns
the lower system timer value shifted by offset.

Definition at line 646 of file IfxStm.h.

Referenced by IfxStm_initCompare().

◆ IfxStm_waitTicks()

IFX_INLINE void IfxStm_waitTicks | ( | Ifx_STM * | stm,
 |  | uint32 | ticks
 | ) |  |

Wait for requested time. The macro waits in while loop for the specified time in system timer ticks.

Parameters
stm | pointer to System timer module registers.
ticks | ticks Wait time in system timer ticks.
Returns
None

Definition at line 719 of file IfxStm.h.


iLLD_TC26B: Comparator Functions

Functions
Comparator Functions
iLLD » STM » Standard Driver
Collaboration diagram for Comparator Functions:

Functions

IFX_INLINE uint32 | IfxStm_getCompare (Ifx_STM *stm, IfxStm_Comparator comparator)
Returns the updated compare register value. More...
IFX_INLINE sint32 | IfxStm_getTicksFromMicroseconds (Ifx_STM *stm, uint32 microSeconds)
Returns the number of ticks for the selected micro seconds based on the STM frequency. More...
IFX_INLINE sint32 | IfxStm_getTicksFromMilliseconds (Ifx_STM *stm, uint32 milliSeconds)
Returns the number of ticks for the selected milli seconds based on the STM frequency. More...
IFX_INLINE void | IfxStm_increaseCompare (Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value increased with given ticks. More...
IFX_INLINE void | IfxStm_updateCompare (Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value. More...
IFX_EXTERN void | IfxStm_clearCompareFlag (Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag. More...
IFX_EXTERN void | IfxStm_disableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt. More...
IFX_EXTERN void | IfxStm_enableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt . More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxStm_getSrcPointer (Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator. More...
IFX_EXTERN boolean | IfxStm_initCompare (Ifx_STM *stm, const IfxStm_CompareConfig *config)
Initialise stm compare register. More...
IFX_EXTERN void | IfxStm_initCompareConfig (IfxStm_CompareConfig *config)
Initialise compare configuration with default values. More...
IFX_EXTERN boolean | IfxStm_isCompareFlagSet (Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set. More...
IFX_EXTERN void | IfxStm_setCompareControl (Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior. More...

Detailed Description

Function Documentation

◆ IfxStm_clearCompareFlag()

IFX_EXTERN void IfxStm_clearCompareFlag | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

Clear the compare interrupt flag.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
Returns
None

Definition at line 52 of file IfxStm.c.

Referenced by IfxStm_initCompare(), IfxStm_Timer_acknowledgeTimerIrq(), and IfxStm_Timer_init().

◆ IfxStm_disableComparatorInterrupt()

IFX_EXTERN void IfxStm_disableComparatorInterrupt | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

Disables the compare interrupt.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
Returns
None

Definition at line 65 of file IfxStm.c.

Referenced by IfxStm_Timer_acknowledgeTimerIrq(), and IfxStm_Timer_stop().

◆ IfxStm_enableComparatorInterrupt()

IFX_EXTERN void IfxStm_enableComparatorInterrupt | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

Enables the compare interrupt .

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
Returns
None

Definition at line 88 of file IfxStm.c.

Referenced by IfxStm_initCompare(), and IfxStm_Timer_run().

◆ IfxStm_getCompare()

IFX_INLINE uint32 IfxStm_getCompare | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

Returns the updated compare register value.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
Returns
The compare value

Definition at line 587 of file IfxStm.h.

◆ IfxStm_getSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxStm_getSrcPointer | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

get the interrupt source pointer for the comparator.

Parameters
stm | pointer to the STM registers
comparator | comparator selection comparator
Returns
pointer to the interrupt source

Definition at line 153 of file IfxStm.c.

Referenced by IfxStm_Timer_init().

◆ IfxStm_getTicksFromMicroseconds()

IFX_INLINE sint32 IfxStm_getTicksFromMicroseconds | ( | Ifx_STM * | stm,
 |  | uint32 | microSeconds
 | ) |  |

Returns the number of ticks for the selected micro seconds based on the STM frequency.

Parameters
stm | pointer to System timer module registers.
microSeconds | Number of micro seconds that need to be converted to ticks
Returns
ticks

Definition at line 656 of file IfxStm.h.

◆ IfxStm_getTicksFromMilliseconds()

IFX_INLINE sint32 IfxStm_getTicksFromMilliseconds | ( | Ifx_STM * | stm,
 |  | uint32 | milliSeconds
 | ) |  |

Returns the number of ticks for the selected milli seconds based on the STM frequency.

Parameters
stm | pointer to System timer module registers.
milliSeconds | Number of micro seconds that need to be converted to ticks
Returns
ticks

Definition at line 663 of file IfxStm.h.

◆ IfxStm_increaseCompare()

IFX_INLINE void IfxStm_increaseCompare | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator,
 |  | uint32 | ticks
 | ) |  |

Update the compare register value increased with given ticks.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
ticks | count for next comparison from current timer count.
Returns
None

Definition at line 670 of file IfxStm.h.

◆ IfxStm_initCompare()

IFX_EXTERN boolean IfxStm_initCompare | ( | Ifx_STM * | stm,
 |  | const IfxStm_CompareConfig * | config
 | ) |  |

Initialise stm compare register.

Parameters
stm | pointer to System timer module registers.
config | pointer to configuration structure.
Returns
TRUE if Comparator successful otherwise FLASE.

Definition at line 161 of file IfxStm.c.

◆ IfxStm_initCompareConfig()

IFX_EXTERN void IfxStm_initCompareConfig ( IfxStm_CompareConfig * config )

Initialise compare configuration with default values.

Parameters
config pointer to configuration structure.
Returns
None

Definition at line 227 of file IfxStm.c.

◆ IfxStm_isCompareFlagSet()

IFX_EXTERN boolean IfxStm_isCompareFlagSet | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

Indicates if the compare interrupt flag is set.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
Returns
TRUE if the comparator flag is set

Definition at line 239 of file IfxStm.c.

Referenced by IfxStm_Timer_acknowledgeTimerIrq().

◆ IfxStm_setCompareControl()

IFX_EXTERN void IfxStm_setCompareControl | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator,
 |  | IfxStm_ComparatorOffset | offset,
 |  | IfxStm_ComparatorSize | size,
 |  | IfxStm_ComparatorInterrupt | interrupt
 | ) |  |

Set the compare behavior.

Parameters
stm | pointer to System timer module registers
comparator | comparator selection comparator
offset | Comparator start bit position
size | Size of compare value to compare with timer
interrupt | Comparator Interrupt request source defined
Returns
None

Definition at line 272 of file IfxStm.c.

Referenced by IfxStm_Timer_init().

◆ IfxStm_updateCompare()

IFX_INLINE void IfxStm_updateCompare | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator,
 |  | uint32 | ticks
 | ) |  |

Update the compare register value.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
ticks | count for next comparison.
Returns
None

Definition at line 713 of file IfxStm.h.

Referenced by IfxStm_Timer_acknowledgeTimerIrq(), and IfxStm_Timer_run().


iLLD_TC26B: How to use the Stm driver?

How to use the Stm driver?
iLLD » STM
Collaboration diagram for How to use the Stm driver?:

The Stm Standard driver provides APIs to initialize, configure and control the Stm.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Stm/Std/IfxStm.h>

Variables

Declare STM variables :

Ifx_STM *stmSfr;
IfxStm_CompareConfig stmConfig;

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_STM0_SR0 10

Add the interrupt service routines to your C code. They have to call the Stm interrupt handlers: please take care in choosing number of ticks, the below example code will raise an interrupt evry time the specified number of ticks have been elapsed.

IFX_INTERRUPT(stm0Sr0ISR, 0, IFX_INTPRIO_STM0_SR0)
{
IfxStm_clearCompareFlag(stmSfr, stmConfig.comparator);
IfxStm_increaseCompare(stmSfr, stmConfig.comparator, stmConfig.ticks);
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&stm0Sr0ISR, IFX_INTPRIO_STM0_SR0);
IfxCpu_enableInterrupts();

Module Initialisation

The STM module can be configured to generate an interrupt at every compare match of the selected comaparator with the desired compare value, the interrupt can further be routed to other comparator.

The module initialisation can be done as followed.

stmSfr = &MODULE_STM0;
IfxStm_initCompareConfig(&stmConfig);
// configure to generate interrupt every 10 us
sint32 ticks = IfxStm_getTicksFromMicroseconds(10);
stmConfig.ticks = ticks;
stmConfig.triggerPriority = IFX_INTPRIO_STM0_SR0;
stmConfig.typeOfService = IfxSrc_Tos_cpu0;
IfxStm_initCompare(stmSfr, &stmConfig);

Now the Stm shall generate interrupts regularly based on the configured time !


iLLD_TC26B: STM Timer Interface

Modules
STM Timer Interface
iLLD » STM
Collaboration diagram for STM Timer Interface:

Modules

STM Timer Data Structures
global function

Detailed Description


iLLD_TC26B: STM Timer Data Structures

Data Structures
STM Timer Data Structures
iLLD » STM » STM Timer Interface
Collaboration diagram for STM Timer Data Structures:

Data Structures

struct | IfxStm_Timer_Base
Structure for the timer base. More...
struct | IfxStm_Timer
Timer interface. More...
struct | IfxStm_Timer_Config
configuration structure for Timer More...

Detailed Description

Data Structure Documentation

◆ IfxStm_Timer_Base

struct IfxStm_Timer_Base

Structure for the timer base.

Definition at line 126 of file IfxStm_Timer.h.

Data Fields
float32 | clockFreq | Timer input clock frequency (cached value)
IfxStdIf_Timer_CountDir | countDir | Timer counting mode.
Ifx_TimerValue | period | Timer period in ticks (cached value)
boolean | singleShot | If TRUE, the timer will stop after 1st event.
boolean | triggerEnabled | If TRUE, the trigger functionality is Initialized.

◆ IfxStm_Timer

struct IfxStm_Timer

Timer interface.

Definition at line 141 of file IfxStm_Timer.h.

Collaboration diagram for IfxStm_Timer:
[legend]
Data Fields
IfxStm_Timer_Base | base | Timer interface.
IfxStm_Comparator | comparator | Comparator used for the timer functionality.
uint8 | comparatorShift | Comparator shift.
uint32 | comparatorValue | Value of the comparator for the next event.
Ifx_STM * | stm | STM module used for the timer functionality.

◆ IfxStm_Timer_Config

struct IfxStm_Timer_Config

configuration structure for Timer

Definition at line 152 of file IfxStm_Timer.h.

Collaboration diagram for IfxStm_Timer_Config:
[legend]
Data Fields
IfxStdIf_Timer_Config | base | Standard interface timer configuration.
IfxStm_Comparator | comparator | Comparator used for the timer functionality.
Ifx_STM * | stm | STM module used for the timer functionality.


iLLD_TC26B: global function

Functions
global function
iLLD » STM » STM Timer Interface
Collaboration diagram for global function:

Functions

IFX_EXTERN boolean | IfxStm_Timer_acknowledgeTimerIrq (IfxStm_Timer *driver)
Returns the timer event see IfxStdIf_Timer_AckTimerIrq. More...
IFX_EXTERN float32 | IfxStm_Timer_getFrequency (IfxStm_Timer *driver)
Returns the frequency see IfxStdIf_Timer_GetFrequency. More...
IFX_EXTERN float32 | IfxStm_Timer_getInputFrequency (IfxStm_Timer *driver)
Returns the input frequency see IfxStdIf_Timer_GetInputFrequency. More...
IFX_EXTERN Ifx_TimerValue | IfxStm_Timer_getPeriod (IfxStm_Timer *driver)
Returns the period of the timer see IfxStdIf_Timer_GetPeriod. More...
IFX_EXTERN float32 | IfxStm_Timer_getResolution (IfxStm_Timer *driver)
Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution. More...
IFX_EXTERN void | IfxStm_Timer_run (IfxStm_Timer *driver)
Runs the timer see IfxStdIf_Timer_Run. More...
IFX_EXTERN boolean | IfxStm_Timer_setFrequency (IfxStm_Timer *driver, float32 frequency)
Sets the Frequency see IfxStdIf_Timer_SetFrequency. More...
IFX_EXTERN boolean | IfxStm_Timer_setPeriod (IfxStm_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer see IfxStdIf_Timer_SetPeriod. More...
IFX_EXTERN void | IfxStm_Timer_setSingleMode (IfxStm_Timer *driver, boolean enabled)
Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode. More...
IFX_EXTERN boolean | IfxStm_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxStm_Timer_stop (IfxStm_Timer *driver)
Stops the timer see IfxStdIf_Timer_Stop. More...
IFX_EXTERN void | IfxStm_Timer_updateInputFrequency (IfxStm_Timer *driver)
Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency. More...
IFX_EXTERN boolean | IfxStm_Timer_init (IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxStm_Timer_initConfig (IfxStm_Timer_Config *config, Ifx_STM *stm)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxStm_Timer_acknowledgeTimerIrq()

IFX_EXTERN boolean IfxStm_Timer_acknowledgeTimerIrq ( IfxStm_Timer * driver )

Returns the timer event see IfxStdIf_Timer_AckTimerIrq.

Parameters
driver STM Timer interface Handle
Returns
Timer interrupt event

Definition at line 53 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_getFrequency()

IFX_EXTERN float32 IfxStm_Timer_getFrequency ( IfxStm_Timer * driver )

Returns the frequency see IfxStdIf_Timer_GetFrequency.

Parameters
driver STM Timer interface Handle
Returns
Frequency

Definition at line 79 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_getInputFrequency()

IFX_EXTERN float32 IfxStm_Timer_getInputFrequency ( IfxStm_Timer * driver )

Returns the input frequency see IfxStdIf_Timer_GetInputFrequency.

Parameters
driver STM Timer interface Handle
Returns
Frequency

Definition at line 85 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_getPeriod()

IFX_EXTERN Ifx_TimerValue IfxStm_Timer_getPeriod ( IfxStm_Timer * driver )

Returns the period of the timer see IfxStdIf_Timer_GetPeriod.

Parameters
driver STM Timer interface Handle
Returns
Period

Definition at line 91 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_getResolution()

IFX_EXTERN float32 IfxStm_Timer_getResolution ( IfxStm_Timer * driver )

Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution.

Parameters
driver STM Timer interface handle
Returns
Resolution

Definition at line 97 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_init()

IFX_EXTERN boolean IfxStm_Timer_init | ( | IfxStm_Timer * | driver,
 |  | const IfxStm_Timer_Config * | config
 | ) |  |

Initialises the timer object.

Parameters
driver | STM Timer interface Handle
config | Configuration structure for STM Timer
Returns
TRUE on success else FALSE

Definition at line 180 of file IfxStm_Timer.c.

◆ IfxStm_Timer_initConfig()

IFX_EXTERN void IfxStm_Timer_initConfig | ( | IfxStm_Timer_Config * | config,
 |  | Ifx_STM * | stm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | Configuration structure for STM Timer
stm | Pointer to STM module
Returns
None

Definition at line 240 of file IfxStm_Timer.c.

◆ IfxStm_Timer_run()

IFX_EXTERN void IfxStm_Timer_run ( IfxStm_Timer * driver )

Runs the timer see IfxStdIf_Timer_Run.

Parameters
driver STM Timer interface Handle
Returns
None

Definition at line 103 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_setFrequency()

IFX_EXTERN boolean IfxStm_Timer_setFrequency | ( | IfxStm_Timer * | driver,
 |  | float32 | frequency
 | ) |  |

Sets the Frequency see IfxStdIf_Timer_SetFrequency.

Parameters
driver | STM Timer interface Handle
frequency | frequency
Returns
TRUE on success else FALSE

Definition at line 119 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_init(), and IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_setPeriod()

IFX_EXTERN boolean IfxStm_Timer_setPeriod | ( | IfxStm_Timer * | driver,
 |  | Ifx_TimerValue | period
 | ) |  |

Sets the period for the timer see IfxStdIf_Timer_SetPeriod.

Parameters
driver | STM Timer interface handle
period | Period value
Returns
TRUE on success else FALSE

Definition at line 127 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_setFrequency(), and IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_setSingleMode()

IFX_EXTERN void IfxStm_Timer_setSingleMode | ( | IfxStm_Timer * | driver,
 |  | boolean | enabled
 | ) |  |

Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode.

Parameters
driver | STM Timer interface Handle
enabled | If TRUE, sets the single shot mode
Returns
None

Definition at line 135 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_stdIfTimerInit()

IFX_EXTERN boolean IfxStm_Timer_stdIfTimerInit | ( | IfxStdIf_Timer * | stdif,
 |  | IfxStm_Timer * | driver
 | ) |  |

Initializes the standard interface timer.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | driver Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 141 of file IfxStm_Timer.c.

◆ IfxStm_Timer_stop()

IFX_EXTERN void IfxStm_Timer_stop ( IfxStm_Timer * driver )

Stops the timer see IfxStdIf_Timer_Stop.

Parameters
driver STM Timer interface Handle
Returns
None

Definition at line 166 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_updateInputFrequency()

IFX_EXTERN void IfxStm_Timer_updateInputFrequency ( IfxStm_Timer * driver )

Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency.

Parameters
driver STM Timer interface Handle
Returns
None

Definition at line 172 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_init(), and IfxStm_Timer_stdIfTimerInit().


iLLD_TC26B: IfxStm_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxStm_cfg.h File Reference
iLLD » STM

STM on-chip implementation data. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxStm_reg.h"
#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for IfxStm_cfg.h:

Go to the source code of this file.

Macros

#define | IFXSTM_NUM_MODULES 2
STM count. More...
#define | IFXSTM_NUM_COMPARATORS (2)
No Of Comparators per Stm. More...

Enumerations

enum IfxStm_Index {
IfxStm_Index_none = -1,
IfxStm_Index_0 = 0,
IfxStm_Index_1
}
List of the available STM resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap [IFXSTM_NUM_MODULES]

Detailed Description

STM on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStm_cfg.h.

Macro Definition Documentation

◆ IFXSTM_NUM_COMPARATORS

#define IFXSTM_NUM_COMPARATORS (2)

No Of Comparators per Stm.

Definition at line 74 of file IfxStm_cfg.h.

◆ IFXSTM_NUM_MODULES

#define IFXSTM_NUM_MODULES 2

STM count.

Definition at line 70 of file IfxStm_cfg.h.

Referenced by IfxStm_getAddress(), and IfxStm_getIndex().


iLLD_TC26B: IfxStm.h File Reference

  • Stm
  • Std
Data Structures | Macros | Enumerations | Functions
IfxStm.h File Reference
iLLD » STM

STM basic functionality. More...

#include "_Impl/IfxStm_cfg.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Src/Std/IfxSrc.h"
#include "IfxCbs_reg.h"
Include dependency graph for IfxStm.h:

Go to the source code of this file.

Data Structures

struct IfxStm_CompareConfig
Comparator Configuration Structure. More...

Macros

#define IFXSTM_DEFAULT_TIMER (&MODULE_STM0)

Enumerations

enum IfxStm_Comparator {
IfxStm_Comparator_0 = 0,
IfxStm_Comparator_1
}
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2) More...
enum IfxStm_ComparatorInterrupt {
IfxStm_ComparatorInterrupt_ir0 = 0,
IfxStm_ComparatorInterrupt_ir1 = 1
}
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1) More...
enum IfxStm_ComparatorOffset {
IfxStm_ComparatorOffset_0 = 0,
IfxStm_ComparatorOffset_1,
IfxStm_ComparatorOffset_2,
IfxStm_ComparatorOffset_3,
IfxStm_ComparatorOffset_4,
IfxStm_ComparatorOffset_5,
IfxStm_ComparatorOffset_6,
IfxStm_ComparatorOffset_7,
IfxStm_ComparatorOffset_8,
IfxStm_ComparatorOffset_9,
IfxStm_ComparatorOffset_10,
IfxStm_ComparatorOffset_11,
IfxStm_ComparatorOffset_12,
IfxStm_ComparatorOffset_13,
IfxStm_ComparatorOffset_14,
IfxStm_ComparatorOffset_15,
IfxStm_ComparatorOffset_16,
IfxStm_ComparatorOffset_17,
IfxStm_ComparatorOffset_18,
IfxStm_ComparatorOffset_19,
IfxStm_ComparatorOffset_20,
IfxStm_ComparatorOffset_21,
IfxStm_ComparatorOffset_22,
IfxStm_ComparatorOffset_23,
IfxStm_ComparatorOffset_24,
IfxStm_ComparatorOffset_25,
IfxStm_ComparatorOffset_26,
IfxStm_ComparatorOffset_27,
IfxStm_ComparatorOffset_28,
IfxStm_ComparatorOffset_29,
IfxStm_ComparatorOffset_30,
IfxStm_ComparatorOffset_31
}
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2) More...
enum IfxStm_ComparatorSize {
IfxStm_ComparatorSize_1Bit = 0,
IfxStm_ComparatorSize_2Bits = 1,
IfxStm_ComparatorSize_3Bits = 2,
IfxStm_ComparatorSize_4Bits = 3,
IfxStm_ComparatorSize_5Bits = 4,
IfxStm_ComparatorSize_6Bits = 5,
IfxStm_ComparatorSize_7Bits = 6,
IfxStm_ComparatorSize_8Bits = 7,
IfxStm_ComparatorSize_9Bits = 8,
IfxStm_ComparatorSize_10Bits = 9,
IfxStm_ComparatorSize_11Bits = 10,
IfxStm_ComparatorSize_12Bits = 11,
IfxStm_ComparatorSize_13Bits = 12,
IfxStm_ComparatorSize_14Bits = 13,
IfxStm_ComparatorSize_15Bits = 14,
IfxStm_ComparatorSize_16Bits = 15,
IfxStm_ComparatorSize_17Bits = 16,
IfxStm_ComparatorSize_18Bits = 17,
IfxStm_ComparatorSize_19Bits = 18,
IfxStm_ComparatorSize_20Bits = 19,
IfxStm_ComparatorSize_21Bits = 20,
IfxStm_ComparatorSize_22Bits = 21,
IfxStm_ComparatorSize_23Bits = 22,
IfxStm_ComparatorSize_24Bits = 23,
IfxStm_ComparatorSize_25Bits = 24,
IfxStm_ComparatorSize_26Bits = 25,
IfxStm_ComparatorSize_27Bits = 26,
IfxStm_ComparatorSize_28Bits = 27,
IfxStm_ComparatorSize_29Bits = 28,
IfxStm_ComparatorSize_30Bits = 29,
IfxStm_ComparatorSize_31Bits = 30,
IfxStm_ComparatorSize_32Bits = 31
}
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2) More...
enum IfxStm_SleepMode {
IfxStm_SleepMode_enable = 0,
IfxStm_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_STM.CLC.B.EDIS. More...
enum IfxStm_SuspendMode {
IfxStm_SuspendMode_none = 0,
IfxStm_SuspendMode_hard = 1,
IfxStm_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Functions

IFX_INLINE uint64 | IfxStm_get (Ifx_STM *stm)
Returns system timer value. More...
IFX_INLINE float32 | IfxStm_getFrequency (Ifx_STM *stm)
Returns the system timer frequency. More...
IFX_INLINE boolean | IfxStm_isModuleSuspended (Ifx_STM *stm)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxStm_setSuspendMode (Ifx_STM *stm, IfxStm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxStm_disableModule (Ifx_STM *stm)
Disables the Stm module. More...
IFX_EXTERN void | IfxStm_enableOcdsSuspend (Ifx_STM *stm)
enable suspend by debugger. Note: The API will write into the OCS register only if OCDS is enabled More...
IFX_EXTERN Ifx_STM * | IfxStm_getAddress (IfxStm_Index stm)
Returns the module index of the selected STM module. More...
IFX_EXTERN IfxStm_Index | IfxStm_getIndex (Ifx_STM *stm)
API to get the resource index of the STM specified. More...
IFX_INLINE uint32 | IfxStm_getLower (Ifx_STM *stm)
Returns the lower system timer value. More...
IFX_INLINE uint32 | IfxStm_getOffset12Timer (Ifx_STM *stm)
Gets the TIM3 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset16Timer (Ifx_STM *stm)
Gets the TIM4 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset20Timer (Ifx_STM *stm)
Gets the TIM5 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset32Timer (Ifx_STM *stm)
Gets the TIM6 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset4Timer (Ifx_STM *stm)
Gets the TIM1 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset8Timer (Ifx_STM *stm)
Gets the TIM2 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffsetTimer (Ifx_STM *stm, uint8 offset)
Returns the timer value shifted right by offset. More...
IFX_INLINE void | IfxStm_waitTicks (Ifx_STM *stm, uint32 ticks)
Wait for requested time. The macro waits in while loop for the specified time in system timer ticks. More...
IFX_INLINE uint32 | IfxStm_getCompare (Ifx_STM *stm, IfxStm_Comparator comparator)
Returns the updated compare register value. More...
IFX_INLINE sint32 | IfxStm_getTicksFromMicroseconds (Ifx_STM *stm, uint32 microSeconds)
Returns the number of ticks for the selected micro seconds based on the STM frequency. More...
IFX_INLINE sint32 | IfxStm_getTicksFromMilliseconds (Ifx_STM *stm, uint32 milliSeconds)
Returns the number of ticks for the selected milli seconds based on the STM frequency. More...
IFX_INLINE void | IfxStm_increaseCompare (Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value increased with given ticks. More...
IFX_INLINE void | IfxStm_updateCompare (Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value. More...
IFX_EXTERN void | IfxStm_clearCompareFlag (Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag. More...
IFX_EXTERN void | IfxStm_disableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt. More...
IFX_EXTERN void | IfxStm_enableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt . More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxStm_getSrcPointer (Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator. More...
IFX_EXTERN boolean | IfxStm_initCompare (Ifx_STM *stm, const IfxStm_CompareConfig *config)
Initialise stm compare register. More...
IFX_EXTERN void | IfxStm_initCompareConfig (IfxStm_CompareConfig *config)
Initialise compare configuration with default values. More...
IFX_EXTERN boolean | IfxStm_isCompareFlagSet (Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set. More...
IFX_EXTERN void | IfxStm_setCompareControl (Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior. More...
IFX_INLINE void | IfxStm_setSleepMode (Ifx_STM *stm, IfxStm_SleepMode mode)
IFX_INLINE sint64 | IfxStm_now (void)
Returns the STM counter value. More...
IFX_INLINE sint64 | IfxStm_getDeadLine (sint64 timeout)
Get the deadline value. More...
IFX_INLINE boolean | IfxStm_isDeadLine (sint64 deadLine)
Checked if deadline has occured. More...
IFX_INLINE void | IfxStm_wait (sint64 timeout)
Waits for a specific time. More...
IFX_EXTERN void | IfxStm_resetModule (Ifx_STM *stm)

Detailed Description

STM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStm.h.

Macro Definition Documentation

◆ IFXSTM_DEFAULT_TIMER

#define IFXSTM_DEFAULT_TIMER (&MODULE_STM0)

Definition at line 146 of file IfxStm.h.

Referenced by IfxStm_now().

Function Documentation

◆ IfxStm_getDeadLine()

IFX_INLINE sint64 IfxStm_getDeadLine ( sint64 timeout )

Get the deadline value.

Parameters
timeout timeout value
Returns
Return the deadline

Definition at line 746 of file IfxStm.h.

Referenced by Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_read(), Ifx_Fifo_write(), IfxAsclin_Asc_flushTx(), and IfxStm_wait().

◆ IfxStm_isDeadLine()

IFX_INLINE boolean IfxStm_isDeadLine ( sint64 deadLine )

Checked if deadline has occured.

Parameters
deadLine Deadline value
Returns
Return if deadline occured or not

Definition at line 763 of file IfxStm.h.

Referenced by Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), IfxAsclin_Asc_flushTx(), and IfxStm_wait().

◆ IfxStm_now()

IFX_INLINE sint64 IfxStm_now ( void )

Returns the STM counter value.

Returns
Returns the STM counter value

Definition at line 733 of file IfxStm.h.

Referenced by IfxAsclin_Asc_isrReceive(), IfxAsclin_Asc_isrTransmit(), IfxStm_getDeadLine(), and IfxStm_isDeadLine().

◆ IfxStm_resetModule()

IFX_EXTERN void IfxStm_resetModule ( Ifx_STM * stm )
Parameters
stm pointer to STM registers
Returns
None

Definition at line 252 of file IfxStm.c.

◆ IfxStm_setSleepMode()

IFX_INLINE void IfxStm_setSleepMode | ( | Ifx_STM * | stm,
 |  | IfxStm_SleepMode | mode
 | ) |  |
Parameters
stm | pointer STM registers
mode | mode selection (enable/ disable)
Returns
None

Definition at line 688 of file IfxStm.h.

◆ IfxStm_wait()

IFX_INLINE void IfxStm_wait ( sint64 timeout )

Waits for a specific time.

Parameters
timeout timeout value
Returns
None

Definition at line 780 of file IfxStm.h.


iLLD_TC26B: IfxStm_Timer.h File Reference

  • Stm
  • Timer
Data Structures | Functions
IfxStm_Timer.h File Reference
iLLD » STM

STM TIMER details. More...

#include "Stm/Std/IfxStm.h"
#include "StdIf/IfxStdIf_Timer.h"
Include dependency graph for IfxStm_Timer.h:

Go to the source code of this file.

Data Structures

struct | IfxStm_Timer_Base
Structure for the timer base. More...
struct | IfxStm_Timer
Timer interface. More...
struct | IfxStm_Timer_Config
configuration structure for Timer More...

Functions

IFX_EXTERN boolean | IfxStm_Timer_acknowledgeTimerIrq (IfxStm_Timer *driver)
Returns the timer event see IfxStdIf_Timer_AckTimerIrq. More...
IFX_EXTERN float32 | IfxStm_Timer_getFrequency (IfxStm_Timer *driver)
Returns the frequency see IfxStdIf_Timer_GetFrequency. More...
IFX_EXTERN float32 | IfxStm_Timer_getInputFrequency (IfxStm_Timer *driver)
Returns the input frequency see IfxStdIf_Timer_GetInputFrequency. More...
IFX_EXTERN Ifx_TimerValue | IfxStm_Timer_getPeriod (IfxStm_Timer *driver)
Returns the period of the timer see IfxStdIf_Timer_GetPeriod. More...
IFX_EXTERN float32 | IfxStm_Timer_getResolution (IfxStm_Timer *driver)
Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution. More...
IFX_EXTERN void | IfxStm_Timer_run (IfxStm_Timer *driver)
Runs the timer see IfxStdIf_Timer_Run. More...
IFX_EXTERN boolean | IfxStm_Timer_setFrequency (IfxStm_Timer *driver, float32 frequency)
Sets the Frequency see IfxStdIf_Timer_SetFrequency. More...
IFX_EXTERN boolean | IfxStm_Timer_setPeriod (IfxStm_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer see IfxStdIf_Timer_SetPeriod. More...
IFX_EXTERN void | IfxStm_Timer_setSingleMode (IfxStm_Timer *driver, boolean enabled)
Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode. More...
IFX_EXTERN boolean | IfxStm_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxStm_Timer_stop (IfxStm_Timer *driver)
Stops the timer see IfxStdIf_Timer_Stop. More...
IFX_EXTERN void | IfxStm_Timer_updateInputFrequency (IfxStm_Timer *driver)
Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency. More...
IFX_EXTERN boolean | IfxStm_Timer_init (IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxStm_Timer_initConfig (IfxStm_Timer_Config *config, Ifx_STM *stm)
Initializes the configuration structure to default. More...

Detailed Description

STM TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

The timer driver enabled the generation of periodical interrupt based on the STM module.

The driver is initialized with IfxStm_Timer_init(). After initialization, the timer is started with IfxStm_Timer_run() and stopped with IfxStm_Timer_stop(). Single shot can be set with IfxStm_Timer_setSingleMode(), in case the timer is already running it will stop after the next event, else the timer event will occur only once.

The timer interrupt must call the IfxStm_Timer_acknowledgeTimerIrq() function which clears the interrupt flag and set the next compare value.

Changing the period with IfxStm_Timer_setPeriod() or IfxStm_Timer_setFrequency() will take effect only after the next timer event.

This driver implements a subset of the functionalities defined by Standard interface: Timer. If does supports the timer with interrupt but not the trigger signal.

The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

For a detailed configuration of the microcontroller, see IfxStm_Timer_init().

Usage example

Initialization and interrupt:

#define ISR_PRIORITY_TIMER_1MS (2)
#define ISR_PROVIDER_TIMER_1MS IfxSrc_Tos_cpu0
#define INTERRUPT_TIMER_1MS ISR_ASSIGN(ISR_PRIORITY_TIMER_1MS, ISR_PROVIDER_TIMER_1MS)
IfxStm_Timer myTimer;
boolean AppInit_1ms(void)
{
boolean result = TRUE;
IfxStm_Timer_Config timerConfig;
IfxStm_Timer_initConfig(&timerConfig, &MODULE_STM0);
timerConfig.base.frequency = 1000;
timerConfig.base.isrPriority = ISR_PRIORITY(INTERRUPT_TIMER_1MS);
timerConfig.base.isrProvider = ISR_PROVIDER(INTERRUPT_TIMER_1MS);
timerConfig.base.minResolution = (1.0 / timerConfig.base.frequency) / 1000;
timerConfig.comparator = IfxStm_Comparator_0;
result = IfxStm_Timer_init(&myTimer, &timerConfig);
return result;
}
IFX_INTERRUPT(ISR_TIMER_1ms, 0, ISR_PRIORITY_TIMER_1MS)
{
__enable();
IfxStm_Timer_acknowledgeTimerIrq(&myTimer);
}

During run-time, the timer can be started / stopped as follow:

IfxStm_Timer_run(&myTimer);
IfxStm_Timer_stop(&myTimer);

Definition in file IfxStm_Timer.h.


iLLD_TC26B: VADC

Modules | Files
VADC
iLLD
Collaboration diagram for VADC:

Modules

Implementation
Standard Driver
VADC Pin Mapping
How to use the VADC ADC Interface driver?
Interface Driver

Files

file | IfxVadc_cfg.h
VADC on-chip implementation data.
file | IfxVadc_PinMap.c
VADC I/O map.
file | IfxVadc_PinMap.h
VADC I/O map.
file | IfxVadc_Adc.h
VADC ADC details.
file | IfxVadc.h
VADC basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » VADC
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » VADC
Collaboration diagram for Standard Driver:

Modules

Enumerations
Background Autoscan Functions
Channel Scan Functions
Queue Request Functions
IO Pin Configuration Functions
Frequency Calculation
Group Functions
Module Functions
Channel Functions
Emux Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » VADC » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxVadc_AnalogConverterMode {
IfxVadc_AnalogConverterMode_off = 0,
IfxVadc_AnalogConverterMode_slowStandby = 1,
IfxVadc_AnalogConverterMode_fastStandby = 2,
IfxVadc_AnalogConverterMode_normalOperation = 3
}
Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC. More...
enum IfxVadc_ArbitrationRounds {
IfxVadc_ArbitrationRounds_4_slots = 0,
IfxVadc_ArbitrationRounds_8_slots = 1,
IfxVadc_ArbitrationRounds_16_slots = 2,
IfxVadc_ArbitrationRounds_20_slots = 3
}
Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11) More...
enum IfxVadc_BoundaryExtension {
IfxVadc_BoundaryExtension_standard = 0,
IfxVadc_BoundaryExtension_fastCompareResult1 = 1,
IfxVadc_BoundaryExtension_fastCompareResult2 = 2,
IfxVadc_BoundaryExtension_fastCompareResult3 = 3,
IfxVadc_BoundaryExtension_fastCompareResult4 = 4,
IfxVadc_BoundaryExtension_fastCompareResult5 = 5,
IfxVadc_BoundaryExtension_fastCompareResult6 = 6,
IfxVadc_BoundaryExtension_fastCompareResult7 = 7,
IfxVadc_BoundaryExtension_fastCompareResult8 = 8,
IfxVadc_BoundaryExtension_fastCompareResult9 = 9,
IfxVadc_BoundaryExtension_fastCompareResult10 = 10,
IfxVadc_BoundaryExtension_fastCompareResult11 = 11,
IfxVadc_BoundaryExtension_fastCompareResult12 = 12,
IfxVadc_BoundaryExtension_fastCompareResult13 = 13,
IfxVadc_BoundaryExtension_fastCompareResult14 = 14,
IfxVadc_BoundaryExtension_fastCompareResult15 = 15
}
Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_BoundarySelection {
IfxVadc_BoundarySelection_group0 = 0,
IfxVadc_BoundarySelection_group1 = 1,
IfxVadc_BoundarySelection_global0 = 2,
IfxVadc_BoundarySelection_global1 = 3
}
BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_ChannelId {
IfxVadc_ChannelId_none = -1,
IfxVadc_ChannelId_0 = 0,
IfxVadc_ChannelId_1 = 1,
IfxVadc_ChannelId_2 = 2,
IfxVadc_ChannelId_3 = 3,
IfxVadc_ChannelId_4 = 4,
IfxVadc_ChannelId_5 = 5,
IfxVadc_ChannelId_6 = 6,
IfxVadc_ChannelId_7 = 7,
IfxVadc_ChannelId_8 = 8,
IfxVadc_ChannelId_9 = 9,
IfxVadc_ChannelId_10 = 10,
IfxVadc_ChannelId_11 = 11,
IfxVadc_ChannelId_12 = 12,
IfxVadc_ChannelId_13 = 13,
IfxVadc_ChannelId_14 = 14,
IfxVadc_ChannelId_15 = 15
}
VADC Channels. More...
enum IfxVadc_ChannelReference {
IfxVadc_ChannelReference_standard = 0,
IfxVadc_ChannelReference_channel0 = 1
}
ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_ChannelResolution {
IfxVadc_ChannelResolution_12bit = 0,
IfxVadc_ChannelResolution_10bit = 1,
IfxVadc_ChannelResolution_8bit = 2,
IfxVadc_ChannelResolution_10bitFast = 5
}
ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1) More...
enum IfxVadc_ChannelResult {
IfxVadc_ChannelResult_0 = 0,
IfxVadc_ChannelResult_1,
IfxVadc_ChannelResult_2,
IfxVadc_ChannelResult_3,
IfxVadc_ChannelResult_4,
IfxVadc_ChannelResult_5,
IfxVadc_ChannelResult_6,
IfxVadc_ChannelResult_7,
IfxVadc_ChannelResult_8,
IfxVadc_ChannelResult_9,
IfxVadc_ChannelResult_10,
IfxVadc_ChannelResult_11,
IfxVadc_ChannelResult_12,
IfxVadc_ChannelResult_13,
IfxVadc_ChannelResult_14,
IfxVadc_ChannelResult_15
}
Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_ChannelSelectionStyle {
IfxVadc_ChannelSelectionStyle_channelNumber = 0,
IfxVadc_ChannelSelectionStyle_binary = 1
}
External Multiplexer Channel Selection Style as defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCSS. More...
enum IfxVadc_ConversionType { IfxVadc_ConversionType_Compatible = 0 }
type of conversion More...
enum IfxVadc_EmuxCodingScheme {
IfxVadc_EmuxCodingScheme_binary = 0,
IfxVadc_EmuxCodingScheme_gray = 1
}
Specifies the External Coding scheme(binary/gray) defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD. More...
enum IfxVadc_EmuxInterface {
IfxVadc_EmuxInterface_0 = 0,
IfxVadc_EmuxInterface_1 = 1
}
Specifies the Emux interface. More...
enum IfxVadc_EmuxSampleTimeControl {
IfxVadc_EmuxSampleTimeControl_settingChanges = 0,
IfxVadc_EmuxSampleTimeControl_always = 1
}
External Multiplexer sample time control defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST. More...
enum IfxVadc_EmuxSelectValue {
IfxVadc_EmuxSelectValue_0 = 0,
IfxVadc_EmuxSelectValue_1,
IfxVadc_EmuxSelectValue_2,
IfxVadc_EmuxSelectValue_3,
IfxVadc_EmuxSelectValue_4,
IfxVadc_EmuxSelectValue_5,
IfxVadc_EmuxSelectValue_6,
IfxVadc_EmuxSelectValue_7
}
specifies the External Channel Start select value defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET More...
enum IfxVadc_ExternalMultiplexerMode {
IfxVadc_ExternalMultiplexerMode_softwareControl = 0,
IfxVadc_ExternalMultiplexerMode_steady = 1,
IfxVadc_ExternalMultiplexerMode_singleStep = 2,
IfxVadc_ExternalMultiplexerMode_sequence = 3
}
Specifies External Multiplexer Mode define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE. More...
enum IfxVadc_FifoMode {
IfxVadc_FifoMode_seperateResultRegister = 0,
IfxVadc_FifoMode_fifoStructure = 1,
IfxVadc_FifoMode_maximumMode = 2,
IfxVadc_FifoMode_minimumMode = 3
}
FIFO mode enable. More...
enum IfxVadc_GatingMode {
IfxVadc_GatingMode_disabled = 0,
IfxVadc_GatingMode_always = 1,
IfxVadc_GatingMode_gatingHigh = 2,
IfxVadc_GatingMode_gatingLow = 3
}
gating mode defined in MODULE_VADC.BRSMR.ENGT More...
enum IfxVadc_GatingSource {
IfxVadc_GatingSource_0 = 0,
IfxVadc_GatingSource_1,
IfxVadc_GatingSource_2,
IfxVadc_GatingSource_3,
IfxVadc_GatingSource_4,
IfxVadc_GatingSource_5,
IfxVadc_GatingSource_6,
IfxVadc_GatingSource_7,
IfxVadc_GatingSource_8,
IfxVadc_GatingSource_9,
IfxVadc_GatingSource_10,
IfxVadc_GatingSource_11,
IfxVadc_GatingSource_12,
IfxVadc_GatingSource_13,
IfxVadc_GatingSource_14,
IfxVadc_GatingSource_15
}
External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7) More...
enum IfxVadc_InputClasses {
IfxVadc_InputClasses_group0 = 0,
IfxVadc_InputClasses_group1 = 1,
IfxVadc_InputClasses_global0 = 2,
IfxVadc_InputClasses_global1 = 3
}
inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_LimitCheck {
IfxVadc_LimitCheck_noCheck = 0,
IfxVadc_LimitCheck_eventIfInArea = 1,
IfxVadc_LimitCheck_eventIfOutsideArea = 2,
IfxVadc_LimitCheck_always = 3
}
ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_LowSupplyVoltageSelect {
IfxVadc_LowSupplyVoltageSelect_5V = 0,
IfxVadc_LowSupplyVoltageSelect_3V = 1
}
Low Power Supply Voltage Select. More...
enum IfxVadc_Protection {
IfxVadc_Protection_channelControl0 = 0,
IfxVadc_Protection_channelControl1 = 1,
IfxVadc_Protection_channelControl2 = 2,
IfxVadc_Protection_channelControl3 = 3,
IfxVadc_Protection_channelControl4 = 4,
IfxVadc_Protection_channelControl5 = 5,
IfxVadc_Protection_channelControl6 = 6,
IfxVadc_Protection_channelControl7 = 7,
IfxVadc_Protection_channelControl8 = 8,
IfxVadc_Protection_channelControl9 = 9,
IfxVadc_Protection_channelControl10 = 10,
IfxVadc_Protection_channelControl11 = 11,
IfxVadc_Protection_channelControl12 = 12,
IfxVadc_Protection_channelControl13 = 13,
IfxVadc_Protection_channelControl14 = 14,
IfxVadc_Protection_externalMultiplexer = 15,
IfxVadc_Protection_initGroup0 = 16,
IfxVadc_Protection_initGroup1 = 17,
IfxVadc_Protection_initGroup2 = 18,
IfxVadc_Protection_initGroup3 = 19,
IfxVadc_Protection_initGroup4 = 20,
IfxVadc_Protection_initGroup5 = 21,
IfxVadc_Protection_initGroup6 = 22,
IfxVadc_Protection_initGroup7 = 23,
IfxVadc_Protection_initGroup8 = 24,
IfxVadc_Protection_initGroup9 = 25,
IfxVadc_Protection_initGroup10 = 26,
IfxVadc_Protection_initGroup11 = 27,
IfxVadc_Protection_initGroup12 = 28,
IfxVadc_Protection_initGroup13 = 29,
IfxVadc_Protection_initGroup14 = 30,
IfxVadc_Protection_globalConfig = 31,
IfxVadc_Protection_serviceGroup0 = 32,
IfxVadc_Protection_serviceGroup1 = 33,
IfxVadc_Protection_serviceGroup2 = 34,
IfxVadc_Protection_serviceGroup3 = 35,
IfxVadc_Protection_serviceGroup4 = 36,
IfxVadc_Protection_serviceGroup5 = 37,
IfxVadc_Protection_serviceGroup6 = 38,
IfxVadc_Protection_serviceGroup7 = 39,
IfxVadc_Protection_serviceGroup8 = 40,
IfxVadc_Protection_serviceGroup9 = 41,
IfxVadc_Protection_serviceGroup10 = 42,
IfxVadc_Protection_serviceGroup11 = 43,
IfxVadc_Protection_serviceGroup12 = 44,
IfxVadc_Protection_serviceGroup13 = 45,
IfxVadc_Protection_serviceGroup14 = 46,
IfxVadc_Protection_testFunction = 47,
IfxVadc_Protection_resultRegisterGroup0 = 48,
IfxVadc_Protection_resultRegisterGroup1 = 49,
IfxVadc_Protection_resultRegisterGroup2 = 50,
IfxVadc_Protection_resultRegisterGroup3 = 51,
IfxVadc_Protection_resultRegisterGroup4 = 52,
IfxVadc_Protection_resultRegisterGroup5 = 53,
IfxVadc_Protection_resultRegisterGroup6 = 54,
IfxVadc_Protection_resultRegisterGroup7 = 55,
IfxVadc_Protection_resultRegisterGroup8 = 56,
IfxVadc_Protection_resultRegisterGroup9 = 57,
IfxVadc_Protection_resultRegisterGroup10 = 58,
IfxVadc_Protection_resultRegisterGroup11 = 59,
IfxVadc_Protection_resultRegisterGroup12 = 60,
IfxVadc_Protection_resultRegisterGroup13 = 61,
IfxVadc_Protection_resultRegisterGroup14 = 62
}
Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U. More...
enum IfxVadc_RequestSlotPriority {
IfxVadc_RequestSlotPriority_lowest = 0,
IfxVadc_RequestSlotPriority_low = 1,
IfxVadc_RequestSlotPriority_high = 2,
IfxVadc_RequestSlotPriority_highest = 3
}
Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2) More...
enum IfxVadc_RequestSlotStartMode {
IfxVadc_RequestSlotStartMode_waitForStart = 0,
IfxVadc_RequestSlotStartMode_cancelInjectRepeat = 1
}
Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2) More...
enum IfxVadc_RequestSource {
IfxVadc_RequestSource_queue = 0,
IfxVadc_RequestSource_scan = 1,
IfxVadc_RequestSource_background = 2
}
Request sources. More...
enum IfxVadc_SleepMode {
IfxVadc_SleepMode_enable = 0,
IfxVadc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_VADC.CLC.B.EDIS. More...
enum IfxVadc_SrcNr {
IfxVadc_SrcNr_group0 = 0,
IfxVadc_SrcNr_group1 = 1,
IfxVadc_SrcNr_group2 = 2,
IfxVadc_SrcNr_group3 = 3,
IfxVadc_SrcNr_shared0 = 4,
IfxVadc_SrcNr_shared1 = 5,
IfxVadc_SrcNr_shared2 = 6,
IfxVadc_SrcNr_shared3 = 7
}
Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11) More...
enum IfxVadc_Status {
IfxVadc_Status_noError = 0,
IfxVadc_Status_notInitialised = 1,
IfxVadc_Status_invalidGroup = 2,
IfxVadc_Status_invalidChannel = 3,
IfxVadc_Status_queueFull = 4,
IfxVadc_Status_noAccess = 5,
IfxVadc_Status_channelsStillPending = 6
}
API return values defined in MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U MODULE_VADC.BRSPNDx More...
enum IfxVadc_TriggerMode {
IfxVadc_TriggerMode_noExternalTrigger = 0,
IfxVadc_TriggerMode_uponFallingEdge = 1,
IfxVadc_TriggerMode_uponRisingEdge = 2,
IfxVadc_TriggerMode_uponAnyEdge = 3
}
trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11) More...
enum IfxVadc_TriggerSource {
IfxVadc_TriggerSource_0 = 0,
IfxVadc_TriggerSource_1,
IfxVadc_TriggerSource_2,
IfxVadc_TriggerSource_3,
IfxVadc_TriggerSource_4,
IfxVadc_TriggerSource_5,
IfxVadc_TriggerSource_6,
IfxVadc_TriggerSource_7,
IfxVadc_TriggerSource_8,
IfxVadc_TriggerSource_9,
IfxVadc_TriggerSource_10,
IfxVadc_TriggerSource_11,
IfxVadc_TriggerSource_12,
IfxVadc_TriggerSource_13,
IfxVadc_TriggerSource_14,
IfxVadc_TriggerSource_15
}
Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7) More...

Detailed Description

Enumeration Type Documentation

◆ IfxVadc_AnalogConverterMode

enum IfxVadc_AnalogConverterMode

Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC.

Enumerator
IfxVadc_AnalogConverterMode_off | Analog Converter off.
IfxVadc_AnalogConverterMode_slowStandby | Slow Standby Mode.
IfxVadc_AnalogConverterMode_fastStandby | Fast Standby Mode.
IfxVadc_AnalogConverterMode_normalOperation | Normal operation mode.

Definition at line 87 of file IfxVadc.h.

◆ IfxVadc_ArbitrationRounds

enum IfxVadc_ArbitrationRounds

Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)

Enumerator
IfxVadc_ArbitrationRounds_4_slots | An arbitration round contains 4 arbitration slots.
IfxVadc_ArbitrationRounds_8_slots | An arbitration round contains 8 arbitration slots.
IfxVadc_ArbitrationRounds_16_slots | An arbitration round contains 16 arbitration slots.
IfxVadc_ArbitrationRounds_20_slots | An arbitration round contains 20 arbitration slots.

Definition at line 97 of file IfxVadc.h.

◆ IfxVadc_BoundaryExtension

enum IfxVadc_BoundaryExtension

Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxVadc_BoundaryExtension_standard | Boundary Standard mode. BNDSELU/BNDSELL as Boundaries.
IfxVadc_BoundaryExtension_fastCompareResult1 | Fast compare mode use as upper boundary Channel result 1.
IfxVadc_BoundaryExtension_fastCompareResult2 | Fast compare mode use as upper boundary Channel result 2.
IfxVadc_BoundaryExtension_fastCompareResult3 | Fast compare mode use as upper boundary Channel result 3.
IfxVadc_BoundaryExtension_fastCompareResult4 | Fast compare mode use as upper boundary Channel result 4.
IfxVadc_BoundaryExtension_fastCompareResult5 | Fast compare mode use as upper boundary Channel result 5.
IfxVadc_BoundaryExtension_fastCompareResult6 | Fast compare mode use as upper boundary Channel result 6.
IfxVadc_BoundaryExtension_fastCompareResult7 | Fast compare mode use as upper boundary Channel result 7.
IfxVadc_BoundaryExtension_fastCompareResult8 | Fast compare mode use as upper boundary Channel result 8.
IfxVadc_BoundaryExtension_fastCompareResult9 | Fast compare mode use as upper boundary Channel result 9.
IfxVadc_BoundaryExtension_fastCompareResult10 | Fast compare mode use as upper boundary Channel result 10.
IfxVadc_BoundaryExtension_fastCompareResult11 | Fast compare mode use as upper boundary Channel result 11.
IfxVadc_BoundaryExtension_fastCompareResult12 | Fast compare mode use as upper boundary Channel result 12.
IfxVadc_BoundaryExtension_fastCompareResult13 | Fast compare mode use as upper boundary Channel result 13.
IfxVadc_BoundaryExtension_fastCompareResult14 | Fast compare mode use as upper boundary Channel result 14.
IfxVadc_BoundaryExtension_fastCompareResult15 | Fast compare mode use as upper boundary Channel result 15.

Definition at line 107 of file IfxVadc.h.

◆ IfxVadc_BoundarySelection

enum IfxVadc_BoundarySelection

BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxVadc_BoundarySelection_group0 | Use group class 0.
IfxVadc_BoundarySelection_group1 | Use group class 1.
IfxVadc_BoundarySelection_global0 | Use global class 0.
IfxVadc_BoundarySelection_global1 | Use global class 1.

Definition at line 129 of file IfxVadc.h.

◆ IfxVadc_ChannelId

enum IfxVadc_ChannelId

VADC Channels.

Enumerator
IfxVadc_ChannelId_none | None of VADC channels.
IfxVadc_ChannelId_0 | Channel 0.
IfxVadc_ChannelId_1 | Channel 1.
IfxVadc_ChannelId_2 | Channel 2.
IfxVadc_ChannelId_3 | Channel 3.
IfxVadc_ChannelId_4 | Channel 4.
IfxVadc_ChannelId_5 | Channel 5.
IfxVadc_ChannelId_6 | Channel 6.
IfxVadc_ChannelId_7 | Channel 7.
IfxVadc_ChannelId_8 | Channel 8.
IfxVadc_ChannelId_9 | Channel 9.
IfxVadc_ChannelId_10 | Channel 10.
IfxVadc_ChannelId_11 | Channel 11.
IfxVadc_ChannelId_12 | Channel 12.
IfxVadc_ChannelId_13 | Channel 13.
IfxVadc_ChannelId_14 | Channel 14.
IfxVadc_ChannelId_15 | Channel 15.

Definition at line 139 of file IfxVadc.h.

◆ IfxVadc_ChannelReference

enum IfxVadc_ChannelReference

ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxVadc_ChannelReference_standard | use Varef as reference
IfxVadc_ChannelReference_channel0 | use CH0 as reference

Definition at line 162 of file IfxVadc.h.

◆ IfxVadc_ChannelResolution

enum IfxVadc_ChannelResolution

ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)

Enumerator
IfxVadc_ChannelResolution_12bit | 12-bit conversion
IfxVadc_ChannelResolution_10bit | 10-bit conversion
IfxVadc_ChannelResolution_8bit | 8-bit conversion
IfxVadc_ChannelResolution_10bitFast | 10-bit cfast compare mode

Definition at line 170 of file IfxVadc.h.

◆ IfxVadc_ChannelResult

enum IfxVadc_ChannelResult

Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxVadc_ChannelResult_0 | Use Channel result 0.
IfxVadc_ChannelResult_1 | Use Channel result 1.
IfxVadc_ChannelResult_2 | Use Channel result 2.
IfxVadc_ChannelResult_3 | Use Channel result 3.
IfxVadc_ChannelResult_4 | Use Channel result 4.
IfxVadc_ChannelResult_5 | Use Channel result 5.
IfxVadc_ChannelResult_6 | Use Channel result 6.
IfxVadc_ChannelResult_7 | Use Channel result 7.
IfxVadc_ChannelResult_8 | Use Channel result 8.
IfxVadc_ChannelResult_9 | Use Channel result 9.
IfxVadc_ChannelResult_10 | Use Channel result 10.
IfxVadc_ChannelResult_11 | Use Channel result 11.
IfxVadc_ChannelResult_12 | Use Channel result 12.
IfxVadc_ChannelResult_13 | Use Channel result 13.
IfxVadc_ChannelResult_14 | Use Channel result 14.
IfxVadc_ChannelResult_15 | Use Channel result 15.

Definition at line 180 of file IfxVadc.h.

◆ IfxVadc_ChannelSelectionStyle

enum IfxVadc_ChannelSelectionStyle

External Multiplexer Channel Selection Style as defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCSS.

Enumerator
IfxVadc_ChannelSelectionStyle_channelNumber | selects an arbitrary channel
IfxVadc_ChannelSelectionStyle_binary | Each bit of bitfield EMUXCH selects the associated channel for EMUX control.

Definition at line 203 of file IfxVadc.h.

◆ IfxVadc_ConversionType

enum IfxVadc_ConversionType

type of conversion

Enumerator
IfxVadc_ConversionType_Compatible

Compatible Timing Mode.

Definition at line 212 of file IfxVadc.h.

◆ IfxVadc_EmuxCodingScheme

enum IfxVadc_EmuxCodingScheme

Specifies the External Coding scheme(binary/gray) defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD.

Enumerator
IfxVadc_EmuxCodingScheme_binary | Output the Channel Number in Binary code.
IfxVadc_EmuxCodingScheme_gray | Output the channel number in gray code.

Definition at line 220 of file IfxVadc.h.

◆ IfxVadc_EmuxInterface

enum IfxVadc_EmuxInterface

Specifies the Emux interface.

Enumerator
IfxVadc_EmuxInterface_0 | Emux Interface 0.
IfxVadc_EmuxInterface_1 | Emux Interface 1.

Definition at line 228 of file IfxVadc.h.

◆ IfxVadc_EmuxSampleTimeControl

enum IfxVadc_EmuxSampleTimeControl

External Multiplexer sample time control defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST.

Enumerator
IfxVadc_EmuxSampleTimeControl_settingChanges | Use STCE Whenever Setting Changes.
IfxVadc_EmuxSampleTimeControl_always | Use STCE for each conversion of an external channel.

Definition at line 237 of file IfxVadc.h.

◆ IfxVadc_EmuxSelectValue

enum IfxVadc_EmuxSelectValue

specifies the External Channel Start select value defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET

Enumerator
IfxVadc_EmuxSelectValue_0 | Start Selection Value 0.
IfxVadc_EmuxSelectValue_1 | Start Selection Value 1.
IfxVadc_EmuxSelectValue_2 | Start Selection Value 2.
IfxVadc_EmuxSelectValue_3 | Start Selection Value 3.
IfxVadc_EmuxSelectValue_4 | Start Selection Value 4.
IfxVadc_EmuxSelectValue_5 | Start Selection Value 5.
IfxVadc_EmuxSelectValue_6 | Start Selection Value 6.
IfxVadc_EmuxSelectValue_7 | Start Selection Value 7.

Definition at line 246 of file IfxVadc.h.

◆ IfxVadc_ExternalMultiplexerMode

enum IfxVadc_ExternalMultiplexerMode

Specifies External Multiplexer Mode define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE.

Enumerator
IfxVadc_ExternalMultiplexerMode_softwareControl | Disable The Emux Control.
IfxVadc_ExternalMultiplexerMode_steady | select steady mode
IfxVadc_ExternalMultiplexerMode_singleStep | Select single step mode.
IfxVadc_ExternalMultiplexerMode_sequence | Select Sequence Mode.

Definition at line 261 of file IfxVadc.h.

◆ IfxVadc_FifoMode

enum IfxVadc_FifoMode

FIFO mode enable.

Enumerator
IfxVadc_FifoMode_seperateResultRegister | seperate Result Register
IfxVadc_FifoMode_fifoStructure | fifoStructure
IfxVadc_FifoMode_maximumMode | copy new result if bigger
IfxVadc_FifoMode_minimumMode | copy new result if it is smaller

Definition at line 271 of file IfxVadc.h.

◆ IfxVadc_GatingMode

enum IfxVadc_GatingMode

gating mode defined in MODULE_VADC.BRSMR.ENGT

Enumerator
IfxVadc_GatingMode_disabled | Gating is disabled, no conversion request are issued.
IfxVadc_GatingMode_always | Conversion request is issued if at least 1 conversion pending bit is set.
IfxVadc_GatingMode_gatingHigh | Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is high.
IfxVadc_GatingMode_gatingLow | Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is low.

Definition at line 281 of file IfxVadc.h.

◆ IfxVadc_GatingSource

enum IfxVadc_GatingSource

External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)

Enumerator
IfxVadc_GatingSource_0 | Input signal REQGTx_0.
IfxVadc_GatingSource_1 | Input signal REQGTx_1.
IfxVadc_GatingSource_2 | Input signal REQGTx_2.
IfxVadc_GatingSource_3 | Input signal REQGTx_3.
IfxVadc_GatingSource_4 | Input signal REQGTx_4.
IfxVadc_GatingSource_5 | Input signal REQGTx_5.
IfxVadc_GatingSource_6 | Input signal REQGTx_6.
IfxVadc_GatingSource_7 | Input signal REQGTx_7.
IfxVadc_GatingSource_8 | Input signal REQGTx_8.
IfxVadc_GatingSource_9 | Input signal REQGTx_9.
IfxVadc_GatingSource_10 | Input signal REQGTx_10.
IfxVadc_GatingSource_11 | Input signal REQGTx_11.
IfxVadc_GatingSource_12 | Input signal REQGTx_12.
IfxVadc_GatingSource_13 | Input signal REQGTx_13.
IfxVadc_GatingSource_14 | Input signal REQGTx_14.
IfxVadc_GatingSource_15 | Input signal REQGTx_15.

Definition at line 291 of file IfxVadc.h.

◆ IfxVadc_InputClasses

enum IfxVadc_InputClasses

inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxVadc_InputClasses_group0 | Use group class 0.
IfxVadc_InputClasses_group1 | Use group class 1.
IfxVadc_InputClasses_global0 | Use global class 0.
IfxVadc_InputClasses_global1 | Use global class 1.

Definition at line 313 of file IfxVadc.h.

◆ IfxVadc_LimitCheck

enum IfxVadc_LimitCheck

ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxVadc_LimitCheck_noCheck | Normal compare mode Event Never Fast Compare mode Event Never.
IfxVadc_LimitCheck_eventIfInArea | Normal compare mode Event If result is inside the boundary band Fast Compare mode Event If result switches to high (above comp. value)
IfxVadc_LimitCheck_eventIfOutsideArea | Normal compare mode Event If result is outside the boundary band Fast Compare mode Event If result switches to low (below comp. value)
IfxVadc_LimitCheck_always | Normal compare mode Event Always Fast Compare mode Event Always.

Definition at line 323 of file IfxVadc.h.

◆ IfxVadc_LowSupplyVoltageSelect

enum IfxVadc_LowSupplyVoltageSelect

Low Power Supply Voltage Select.

Enumerator
IfxVadc_LowSupplyVoltageSelect_5V | 5V Power Supply is Connected
IfxVadc_LowSupplyVoltageSelect_3V | 3.3V Power Supply is Connected

Definition at line 333 of file IfxVadc.h.

◆ IfxVadc_Protection

enum IfxVadc_Protection

Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U.

Enumerator
IfxVadc_Protection_channelControl0 | Access control for GxCHCTR0.
IfxVadc_Protection_channelControl1 | Access control for GxCHCTR1.
IfxVadc_Protection_channelControl2 | Access control for GxCHCTR2.
IfxVadc_Protection_channelControl3 | Access control for GxCHCTR3.
IfxVadc_Protection_channelControl4 | Access control for GxCHCTR4.
IfxVadc_Protection_channelControl5 | Access control for GxCHCTR5.
IfxVadc_Protection_channelControl6 | Access control for GxCHCTR6.
IfxVadc_Protection_channelControl7 | Access control for GxCHCTR7.
IfxVadc_Protection_channelControl8 | Access control for GxCHCTR8.
IfxVadc_Protection_channelControl9 | Access control for GxCHCTR9.
IfxVadc_Protection_channelControl10 | Access control for GxCHCTR10.
IfxVadc_Protection_channelControl11 | Access control for GxCHCTR11.
IfxVadc_Protection_channelControl12 | Access control for GxCHCTR12.
IfxVadc_Protection_channelControl13 | Access control for GxCHCTR13.
IfxVadc_Protection_channelControl14 | Access control for GxCHCTR14.
IfxVadc_Protection_externalMultiplexer | Access control for EMUXSEL, GxEMUXCTR.
IfxVadc_Protection_initGroup0 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup1 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup2 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup3 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup4 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup5 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup6 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup7 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup8 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup9 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup10 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup11 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup12 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup13 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup14 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_globalConfig | Access control for GLOBCFG.
IfxVadc_Protection_serviceGroup0 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup1 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup2 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup3 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup4 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup5 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup6 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup7 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup8 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup9 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup10 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup11 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup12 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup13 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup14 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_testFunction | Access control for GLOBTF.
IfxVadc_Protection_resultRegisterGroup0 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup1 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup2 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup3 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup4 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup5 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup6 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup7 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup8 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup9 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup10 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup11 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup12 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup13 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup14 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)

Definition at line 341 of file IfxVadc.h.

◆ IfxVadc_RequestSlotPriority

enum IfxVadc_RequestSlotPriority

Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)

Enumerator
IfxVadc_RequestSlotPriority_lowest | Lowest priority.
IfxVadc_RequestSlotPriority_low | Lowpriority.
IfxVadc_RequestSlotPriority_high | High priority.
IfxVadc_RequestSlotPriority_highest | Highest priority.

Definition at line 410 of file IfxVadc.h.

◆ IfxVadc_RequestSlotStartMode

enum IfxVadc_RequestSlotStartMode

Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)

Enumerator
IfxVadc_RequestSlotStartMode_waitForStart | Wait for start.
IfxVadc_RequestSlotStartMode_cancelInjectRepeat | Cancel-Inject-Repeat.

Definition at line 420 of file IfxVadc.h.

◆ IfxVadc_RequestSource

enum IfxVadc_RequestSource

Request sources.

Enumerator
IfxVadc_RequestSource_queue | 8 stage Queue request
IfxVadc_RequestSource_scan | scan request
IfxVadc_RequestSource_background | background scan request

Definition at line 428 of file IfxVadc.h.

◆ IfxVadc_SleepMode

enum IfxVadc_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_VADC.CLC.B.EDIS.

Enumerator
IfxVadc_SleepMode_enable | enables sleep mode
IfxVadc_SleepMode_disable | disables sleep mode

Definition at line 438 of file IfxVadc.h.

◆ IfxVadc_SrcNr

enum IfxVadc_SrcNr

Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)

Enumerator
IfxVadc_SrcNr_group0 | service request line 0 of group
IfxVadc_SrcNr_group1 | service request line 1 of group
IfxVadc_SrcNr_group2 | service request line 2 of group
IfxVadc_SrcNr_group3 | service request line 3 of group
IfxVadc_SrcNr_shared0 | Select shared service request line 0.
IfxVadc_SrcNr_shared1 | Select shared service request line 1.
IfxVadc_SrcNr_shared2 | Select shared service request line 2.
IfxVadc_SrcNr_shared3 | Select shared service request line 3.

Definition at line 446 of file IfxVadc.h.

◆ IfxVadc_Status

enum IfxVadc_Status

API return values defined in MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U MODULE_VADC.BRSPNDx

Enumerator
IfxVadc_Status_noError | No error during api execution.
IfxVadc_Status_notInitialised | Appropriate initialisation not done.
IfxVadc_Status_invalidGroup | Invalid group number.
IfxVadc_Status_invalidChannel | Invalid channel number.
IfxVadc_Status_queueFull | Queue is full.
IfxVadc_Status_noAccess | Access to the group/channel is disabled.
IfxVadc_Status_channelsStillPending | Conversion for some of the channels are still pending.

Definition at line 462 of file IfxVadc.h.

◆ IfxVadc_TriggerMode

enum IfxVadc_TriggerMode

trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)

Enumerator
IfxVadc_TriggerMode_noExternalTrigger | No external trigger.
IfxVadc_TriggerMode_uponFallingEdge | Trigger event upon a falling edge.
IfxVadc_TriggerMode_uponRisingEdge | Trigger event upon a rising edge.
IfxVadc_TriggerMode_uponAnyEdge | Trigger event upon any edge.

Definition at line 475 of file IfxVadc.h.

◆ IfxVadc_TriggerSource

enum IfxVadc_TriggerSource

Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)

Enumerator
IfxVadc_TriggerSource_0 | Input signal REQTRx_0.
IfxVadc_TriggerSource_1 | Input signal REQTRx_1.
IfxVadc_TriggerSource_2 | Input signal REQTRx_2.
IfxVadc_TriggerSource_3 | Input signal REQTRx_3.
IfxVadc_TriggerSource_4 | Input signal REQTRx_4.
IfxVadc_TriggerSource_5 | Input signal REQTRx_5.
IfxVadc_TriggerSource_6 | Input signal REQTRx_6.
IfxVadc_TriggerSource_7 | Input signal REQTRx_7.
IfxVadc_TriggerSource_8 | Input signal REQTRx_8.
IfxVadc_TriggerSource_9 | Input signal REQTRx_9.
IfxVadc_TriggerSource_10 | Input signal REQTRx_10.
IfxVadc_TriggerSource_11 | Input signal REQTRx_11.
IfxVadc_TriggerSource_12 | Input signal REQTRx_12.
IfxVadc_TriggerSource_13 | Input signal REQTRx_13.
IfxVadc_TriggerSource_14 | Input signal REQTRx_14.
IfxVadc_TriggerSource_15 | Input signal REQTRx_15.

Definition at line 485 of file IfxVadc.h.


iLLD_TC26B: Background Autoscan Functions

Functions
Background Autoscan Functions
iLLD » VADC » Standard Driver
Collaboration diagram for Background Autoscan Functions:

Functions

IFX_INLINE void | IfxVadc_configureWaitForReadMode (Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
access function to enable/disable wait for read mode for result registers More...
IFX_INLINE void | IfxVadc_configureWaitForReadModeForGlobalResultRegister (Ifx_VADC *vadc, boolean waitForRead)
access function to enable/disable wait for read mode for global result register More...
IFX_INLINE void | IfxVadc_enableBackgroundScanSlotExternalTrigger (Ifx_VADC *vadc)
Enables the background sacn external trigger. More...
IFX_INLINE IfxVadc_GatingMode | IfxVadc_getBackgroundScanGatingMode (Ifx_VADC *vadc)
Gets the background scan gating mode. More...
IFX_INLINE IfxVadc_GatingSource | IfxVadc_getBackgroundScanGatingSource (Ifx_VADC *vadc)
Gets the gating input selection. More...
IFX_INLINE IfxVadc_RequestSlotPriority | IfxVadc_getBackgroundScanSlotPriority (Ifx_VADC_G *vadcG)
Gets the requested background scan slot priority. More...
IFX_INLINE IfxVadc_RequestSlotStartMode | IfxVadc_getBackgroundScanSlotStartMode (Ifx_VADC_G *vadcG)
Gets the requested background scan slot start mode. More...
IFX_INLINE IfxVadc_TriggerSource | IfxVadc_getBackgroundScanTriggerInput (Ifx_VADC *vadc)
Gets the background scan trigger input. More...
IFX_INLINE IfxVadc_TriggerMode | IfxVadc_getBackgroundScanTriggerMode (Ifx_VADC *vadc)
Gets the background scan external trigger mode. More...
IFX_INLINE IfxVadc_ChannelResolution | IfxVadc_getGlobalResolution (Ifx_VADC *vadc, uint8 inputClassNum)
get global input class resolution More...
IFX_INLINE Ifx_VADC_GLOBRES | IfxVadc_getGlobalResult (Ifx_VADC *vadc)
return conversion result stored in the Global result Register More...
IFX_INLINE float32 | IfxVadc_getGlobalSampleTime (Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
get global input class sample time in sec More...
IFX_INLINE void | IfxVadc_getGroupResult (Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group. More...
IFX_INLINE Ifx_VADC_RES | IfxVadc_getResult (Ifx_VADC_G *group, uint32 resultIdx)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset. More...
IFX_INLINE boolean | IfxVadc_isAutoBackgroundScanEnabled (Ifx_VADC *vadc)
Returns the auto background scan status. More...
IFX_INLINE boolean | IfxVadc_isRequestBackgroundScanSlotEnabled (Ifx_VADC_G *vadcG)
Returns the background scan slot requested status. More...
IFX_INLINE void | IfxVadc_setAutoBackgroundScan (Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
Enables/Disables continuous background auto scan. More...
IFX_INLINE void | IfxVadc_setBackgroundScan (Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
configures a background scan; can also stop autoscan if all channels are 0 More...
IFX_INLINE void | IfxVadc_setBackgroundScanSlotGatingConfig (Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the background scan slot gating configurations. More...
IFX_INLINE void | IfxVadc_setBackgroundScanSlotTriggerConfig (Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the background scan exteranal trigger operating configurations. More...
IFX_INLINE void | IfxVadc_startBackgroundScan (Ifx_VADC *vadc)
Starts a background scan. More...
IFX_INLINE Ifx_VADC_RESD | IfxVadc_getDebugResult (Ifx_VADC_G *group, uint32 resultIdx)
Get debug conversion result. More...
IFX_EXTERN IfxVadc_Status | IfxVadc_getBackgroundScanStatus (Ifx_VADC *vadc)
Gives the background scan status for a group. More...
IFX_EXTERN Ifx_VADC_RES | IfxVadc_getResultBasedOnRequestSource (Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset. More...

Detailed Description

Function Documentation

◆ IfxVadc_configureWaitForReadMode()

IFX_INLINE void IfxVadc_configureWaitForReadMode | ( | Ifx_VADC_G * | group,
 |  | uint32 | resultIdx,
 |  | boolean | waitForRead
 | ) |  |

access function to enable/disable wait for read mode for result registers

Parameters
group | pointer to the VADC group
resultIdx | result register index
waitForRead | wait for read mode enabled/disabled
Returns
None

Definition at line 1771 of file IfxVadc.h.

Referenced by IfxVadc_Adc_configureWaitForReadMode().

◆ IfxVadc_configureWaitForReadModeForGlobalResultRegister()

IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister | ( | Ifx_VADC * | vadc,
 |  | boolean | waitForRead
 | ) |  |

access function to enable/disable wait for read mode for global result register

Parameters
vadc | pointer to the VADC
waitForRead | wait for read mode enabled/disabled
Returns
None

Definition at line 1777 of file IfxVadc.h.

Referenced by IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister().

◆ IfxVadc_enableBackgroundScanSlotExternalTrigger()

IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger ( Ifx_VADC * vadc )

Enables the background sacn external trigger.

Parameters
vadc pointer to the base of VADC registers.
Returns
None

Definition at line 1804 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_getBackgroundScanGatingMode()

IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode ( Ifx_VADC * vadc )

Gets the background scan gating mode.

Parameters
vadc pointer to the base of VADC registers.
Returns
background scan gating mode.

Definition at line 1866 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getBackgroundScanGatingSource()

IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource ( Ifx_VADC * vadc )

Gets the gating input selection.

Parameters
vadc pointer to the base of VADC registers.
Returns
background scan gating input selection.

Definition at line 1872 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getBackgroundScanSlotPriority()

IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority ( Ifx_VADC_G * vadcG )

Gets the requested background scan slot priority.

Parameters
vadcG pointer to VADC group registers.
Returns
requested background scan slot priority.

Definition at line 1878 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getBackgroundScanSlotStartMode()

IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode ( Ifx_VADC_G * vadcG )

Gets the requested background scan slot start mode.

Parameters
vadcG pointer to VADC group registers.
Returns
requested background scan slot start mode.

Definition at line 1884 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getBackgroundScanStatus()

IFX_EXTERN IfxVadc_Status IfxVadc_getBackgroundScanStatus ( Ifx_VADC * vadc )

Gives the background scan status for a group.

Parameters
vadc pointer to the VADC module
Returns
IfxVadc_Status

Definition at line 198 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getBackgroundScanStatus().

◆ IfxVadc_getBackgroundScanTriggerInput()

IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput ( Ifx_VADC * vadc )

Gets the background scan trigger input.

Parameters
vadc pointer to the base of VADC registers.
Returns
Gets the background scan external trigger source.

Definition at line 1890 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getBackgroundScanTriggerMode()

IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode ( Ifx_VADC * vadc )

Gets the background scan external trigger mode.

Parameters
vadc pointer to the base of VADC registers.
Returns
background scan external trigger mode.

Definition at line 1896 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getDebugResult()

IFX_INLINE Ifx_VADC_RESD IfxVadc_getDebugResult | ( | Ifx_VADC_G * | group,
 |  | uint32 | resultIdx
 | ) |  |

Get debug conversion result.

Parameters
group | pointer to the VADC group
resultIdx | result register index
Returns
Debug conversion result.

Definition at line 2483 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getDebugResult().

◆ IfxVadc_getGlobalResolution()

IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution | ( | Ifx_VADC * | vadc,
 |  | uint8 | inputClassNum
 | ) |  |

get global input class resolution

Parameters
vadc | Pointer to the VADC Group
inputClassNum | global input class number
Returns
ADC input class channel resolution.

Definition at line 1980 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getModuleConfig().

◆ IfxVadc_getGlobalResult()

IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult ( Ifx_VADC * vadc )

return conversion result stored in the Global result Register

Parameters
vadc pointer to the VADC module
Returns
global result register
Ifx_VADC* vadc = &MODULE_VADC; // module pointer
IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
//confiure wait for read mode for global result register
IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
// configure background scan
IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
// enable auto scan
IfxVadc_SetAutoBackgroundScan(vadc, TRUE);
// start the background scan
IfxVadc_startBackgroundScan(vadc);
Ifx_VADC_GLOBRES result;
result = IfxVadc_getGlobalResult (vadc);

Definition at line 1986 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGlobalResult().

◆ IfxVadc_getGlobalSampleTime()

IFX_INLINE float32 IfxVadc_getGlobalSampleTime | ( | Ifx_VADC * | vadc,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency
 | ) |  |

get global input class sample time in sec

Parameters
vadc | Pointer to the VADC Group Register space
inputClassNum | ADC input class number
analogFrequency | ADC module analog frequency in Hz.
Returns
ADC input class channel sample time in sec.

Definition at line 1996 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getModuleConfig().

◆ IfxVadc_getGroupResult()

IFX_INLINE void IfxVadc_getGroupResult | ( | Ifx_VADC_G * | group,
 |  | Ifx_VADC_RES * | results,
 |  | uint32 | resultOffset,
 |  | uint32 | numResults
 | ) |  |

Get conversion result for the group.

Parameters
group | pointer to the VADC group
results | pointer to scaled conversion results
resultOffset | offset for the first result
numResults | number of results
Returns
None
Ifx_VADC* vadc = &MODULE_VADC
Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
//confiure wait for read mode for global result register
IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
// configure scan
IfxVadc_setScan(group, channels, mask);
// enable auto scan
IfxVadc_setAutoScan(group, TRUE);
// start the scan
IfxVadc_startScan(group);
// wait for conversion to finish
// fetch the 2 results of conversion for group 0
Ifx_VADC_RES results[10];
result = IfxVadc_getGroupResult(group, results, 0, 2);

Definition at line 2015 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupResult().

◆ IfxVadc_getResult()

IFX_INLINE Ifx_VADC_RES IfxVadc_getResult | ( | Ifx_VADC_G * | group,
 |  | uint32 | resultIdx
 | ) |  |

Get conversion result (Function does not care about the alignment) value = raw * gain + offset.

Parameters
group | pointer to the VADC group
resultIdx | result register index
Returns
scaled Conversion result
Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
//confiure wait for read mode for global result register
IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
// configure scan
IfxVadc_setScan(group, channels, mask);
// enable auto scan
IfxVadc_setAutoScan(group, TRUE);
// start the scan
IfxVadc_startScan(group);
// wait for conversion to finish
// fetch the result of conversion from result register 0 for group 0
Ifx_VADC_RES result;
result = IfxVadc_getResult(group, IfxVadc_ChannelResult0);

Definition at line 2083 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getResult().

◆ IfxVadc_getResultBasedOnRequestSource()

IFX_EXTERN Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource | ( | Ifx_VADC * | vadc,
 |  | Ifx_VADC_G * | group,
 |  | IfxVadc_ChannelId | channel,
 |  | IfxVadc_RequestSource | sourceType
 | ) |  |

Get conversion result (Function does not care about the alignment) value = raw * gain + offset.

Parameters
vadc | VADC module pointer
group | pointer to the VADC group
channel | channel Id
sourceType | type of request source
Returns
scaled Conversion result
Ifx_VADC vadc;
vadc.vadc = &MODULE_VADC;
Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
//confiure wait for read mode for global result register
IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
// configure scan
IfxVadc_setScan(group, channels, mask);
// start the scan
IfxVadc_startScan(group);
// wait for conversion to finish
// fetch the result of conversion for channel 2 of group 0
Ifx_VADC_RESresult2;
result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId2, IfxVadc_RequestSource_scan);
Ifx_VADC_RESresult5;
result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId5, IfxVadc_RequestSource_scan);

Definition at line 302 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getResultBasedOnRequestSource().

◆ IfxVadc_isAutoBackgroundScanEnabled()

IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled ( Ifx_VADC * vadc )

Returns the auto background scan status.

Parameters
vadc pointer to the base of VADC registers.
Returns
TRUE if enabled otherwise FALSE.

Definition at line 2155 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_isRequestBackgroundScanSlotEnabled()

IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled ( Ifx_VADC_G * vadcG )

Returns the background scan slot requested status.

Parameters
vadcG pointer to VADC group registers.
Returns
background scan slot requested status.

Definition at line 2167 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_setAutoBackgroundScan()

IFX_INLINE void IfxVadc_setAutoBackgroundScan | ( | Ifx_VADC * | vadc,
 |  | boolean | autoBackgroundScanEnable
 | ) |  |

Enables/Disables continuous background auto scan.

Parameters
vadc | pointer to the base of VADC registers.
autoBackgroundScanEnable | whether auto background scan enabled or not.
Returns
None

Definition at line 2203 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setBackgroundScan()

IFX_INLINE void IfxVadc_setBackgroundScan | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_GroupId | groupId,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

configures a background scan; can also stop autoscan if all channels are 0

Parameters
vadc | pointer to the VADC module registers
groupId | group index
channels | specifies the channels which should be enabled/disabled
mask | specifies the channels which should be modified
Returns
None

Background scan can be enabled/disabled for the given channels which are selected with the mask

Ifx_VADC* vadc = &MODULE_VADC; // module pointer
IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
//confiure wait for read mode for global result register
IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
// configure background scan
IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
// enable auto scan
IfxVadc_setAutoBackgroundScan(vadc, TRUE);
// start the background scan
IfxVadc_startBackgroundScan(vadc);

Definition at line 2227 of file IfxVadc.h.

Referenced by IfxVadc_Adc_setBackgroundScan().

◆ IfxVadc_setBackgroundScanSlotGatingConfig()

IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_GatingSource | gatingSource,
 |  | IfxVadc_GatingMode | gatingMode
 | ) |  |

Sets the background scan slot gating configurations.

Parameters
vadc | pointer to the base of VADC registers.
gatingSource | gate input for group.
gatingMode | gating mode. High level, Low Level or Gating disabled.
Returns
None

Definition at line 2234 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setBackgroundScanSlotTriggerConfig()

IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_TriggerMode | triggerMode,
 |  | IfxVadc_TriggerSource | triggerSource
 | ) |  |

Sets the background scan exteranal trigger operating configurations.

Parameters
vadc | pointer to the base of VADC registers.
triggerMode | trigger mode. Rising, falling any edge leads to an trigger event.
triggerSource | trigger input for group.
Returns
None

Definition at line 2245 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_startBackgroundScan()

IFX_INLINE void IfxVadc_startBackgroundScan ( Ifx_VADC * vadc )

Starts a background scan.

Parameters
vadc pointer to the VADC module
Returns
None
See also
IfxVadc_setBackgroundScan

Definition at line 2459 of file IfxVadc.h.

Referenced by IfxVadc_Adc_startBackgroundScan().


iLLD_TC26B: Channel Scan Functions

Functions
Channel Scan Functions
iLLD » VADC » Standard Driver
Collaboration diagram for Channel Scan Functions:

Functions

IFX_INLINE void | IfxVadc_disableScanSlotExternalTrigger (Ifx_VADC_G *vadcG)
Disables the scan slot external trigger. More...
IFX_INLINE void | IfxVadc_enableScanSlotExternalTrigger (Ifx_VADC_G *vadcG)
Enables the scan slot external trigger. More...
IFX_INLINE IfxVadc_GatingMode | IfxVadc_getScanSlotGatingMode (Ifx_VADC_G *vadcG)
Gets the request scan slot gating mode. More...
IFX_INLINE IfxVadc_GatingSource | IfxVadc_getScanSlotGatingSource (Ifx_VADC_G *vadcG)
Gets the request scan slot gating input. More...
IFX_INLINE IfxVadc_RequestSlotPriority | IfxVadc_getScanSlotPriority (Ifx_VADC_G *vadcG)
Gets the request scan slot priority. More...
IFX_INLINE IfxVadc_RequestSlotStartMode | IfxVadc_getScanSlotStartMode (Ifx_VADC_G *vadcG)
Gets the request scan slot start mode. More...
IFX_INLINE IfxVadc_TriggerSource | IfxVadc_getScanSlotTriggerInput (Ifx_VADC_G *vadcG)
Gets the requested scan slot trigger input. More...
IFX_INLINE IfxVadc_TriggerMode | IfxVadc_getScanSlotTriggerMode (Ifx_VADC_G *vadcG)
Gets the requested scan slot trigger mode. More...
IFX_INLINE boolean | IfxVadc_isAutoScanEnabled (Ifx_VADC_G *vadcG)
Gets the auto scan enable status. More...
IFX_INLINE boolean | IfxVadc_isRequestScanSlotEnabled (Ifx_VADC_G *vadcG)
Returns the scan slot requested status. More...
IFX_INLINE void | IfxVadc_setAutoScan (Ifx_VADC_G *vadcG, boolean autoscanEnable)
Enables/Disables continuous auto scan. More...
IFX_INLINE void | IfxVadc_setScanSlotGatingConfig (Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the scan slot gating configuration. More...
IFX_INLINE void | IfxVadc_setScanSlotTriggerConfig (Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the scan slot trigger operating configurations. More...
IFX_INLINE void | IfxVadc_startScan (Ifx_VADC_G *group)
Starts an autoscan on the specified group. More...
IFX_EXTERN IfxVadc_Status | IfxVadc_getScanStatus (Ifx_VADC_G *group)
Gives the scan status for a group. More...
IFX_EXTERN void | IfxVadc_setScan (Ifx_VADC_G *group, uint32 channels, uint32 mask)
Configures an (auto-)scan. More...

Detailed Description

Function Documentation

◆ IfxVadc_disableScanSlotExternalTrigger()

IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger ( Ifx_VADC_G * vadcG )

Disables the scan slot external trigger.

Parameters
vadcG pointer to VADC group registers.
Returns
None

Definition at line 1798 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_enableScanSlotExternalTrigger()

IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger ( Ifx_VADC_G * vadcG )

Enables the scan slot external trigger.

Parameters
vadcG pointer to VADC group registers.
Returns
None

Definition at line 1832 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_getScanSlotGatingMode()

IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode ( Ifx_VADC_G * vadcG )

Gets the request scan slot gating mode.

Parameters
vadcG pointer to VADC group registers.
Returns
requested scan slot gating mode.

Definition at line 2093 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getScanSlotGatingSource()

IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource ( Ifx_VADC_G * vadcG )

Gets the request scan slot gating input.

Parameters
vadcG pointer to VADC group registers.
Returns
request scan slot gating input.

Definition at line 2099 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getScanSlotPriority()

IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority ( Ifx_VADC_G * vadcG )

Gets the request scan slot priority.

Parameters
vadcG pointer to VADC group registers.
Returns
request scan slot priority.

Definition at line 2105 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getScanSlotStartMode()

IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode ( Ifx_VADC_G * vadcG )

Gets the request scan slot start mode.

Parameters
vadcG pointer to VADC group registers.
Returns
request scan slot start mode.

Definition at line 2111 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getScanSlotTriggerInput()

IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput ( Ifx_VADC_G * vadcG )

Gets the requested scan slot trigger input.

Parameters
vadcG pointer to VADC group registers.
Returns
requested scan slot trigger input.

Definition at line 2117 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getScanSlotTriggerMode()

IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode ( Ifx_VADC_G * vadcG )

Gets the requested scan slot trigger mode.

Parameters
vadcG pointer to VADC group registers.
Returns
requested scan slot trigger mode.

Definition at line 2123 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getScanStatus()

IFX_EXTERN IfxVadc_Status IfxVadc_getScanStatus ( Ifx_VADC_G * group )

Gives the scan status for a group.

Parameters
group pointer to the VADC group
Returns
IfxVadc_Status

Definition at line 352 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getScanStatus().

◆ IfxVadc_isAutoScanEnabled()

IFX_INLINE boolean IfxVadc_isAutoScanEnabled ( Ifx_VADC_G * vadcG )

Gets the auto scan enable status.

Parameters
vadcG pointer to VADC group registers.
Returns
TRUE if auto scan enabled otherwise FALSE.

Definition at line 2161 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_isRequestScanSlotEnabled()

IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled ( Ifx_VADC_G * vadcG )

Returns the scan slot requested status.

Parameters
vadcG pointer to VADC group registers.
Returns
TRUE if scan slot request enabled otherwise FALSE.

Definition at line 2179 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_setAutoScan()

IFX_INLINE void IfxVadc_setAutoScan | ( | Ifx_VADC_G * | vadcG,
 |  | boolean | autoscanEnable
 | ) |  |

Enables/Disables continuous auto scan.

Parameters
vadcG | pointer to VADC group registers.
autoscanEnable | whether autoscan is enabled or not.
Returns
None

Definition at line 2209 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setScan()

IFX_EXTERN void IfxVadc_setScan | ( | Ifx_VADC_G * | group,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

Configures an (auto-)scan.

Parameters
group | pointer to the VADC group
channels | specifies the channels which should be enabled/disabled
mask | specifies the channels which should be modified
Returns
None

(Auto-)Scan can be enabled/disabled for the given channels which are selected with the mask

Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
// configure scan
IfxVadc_setScan(group, channels, mask);
// enable Auto-Scan
IfxVadc_setAutoScan(group, TRUE);
// start the scan
IfxVadc_startScan(group);

Definition at line 551 of file IfxVadc.c.

Referenced by IfxVadc_Adc_setScan().

◆ IfxVadc_setScanSlotGatingConfig()

IFX_INLINE void IfxVadc_setScanSlotGatingConfig | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_GatingSource | gatingSource,
 |  | IfxVadc_GatingMode | gatingMode
 | ) |  |

Sets the scan slot gating configuration.

Parameters
vadcG | pointer to VADC group registers.
gatingSource | gate input for group.
gatingMode | gating mode. High level, Low Level or Gating disabled.
Returns
None

Definition at line 2416 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setScanSlotTriggerConfig()

IFX_INLINE void IfxVadc_setScanSlotTriggerConfig | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_TriggerMode | triggerMode,
 |  | IfxVadc_TriggerSource | triggerSource
 | ) |  |

Sets the scan slot trigger operating configurations.

Parameters
vadcG | pointer to VADC group registers.
triggerMode | trigger mode. Rising, falling any edge leads to an trigger event.
triggerSource | trigger input for group.
Returns
None

Definition at line 2427 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_startScan()

IFX_INLINE void IfxVadc_startScan ( Ifx_VADC_G * group )

Starts an autoscan on the specified group.

Parameters
group pointer to the VADC group
Returns
None

See IfxVadc_setScan

Definition at line 2471 of file IfxVadc.h.

Referenced by IfxVadc_Adc_startScan().


iLLD_TC26B: Queue Request Functions

Functions
Queue Request Functions
iLLD » VADC » Standard Driver
Collaboration diagram for Queue Request Functions:

Functions

IFX_INLINE void | IfxVadc_addToQueue (Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill incase of aborted conversion source interrupt enable/disable external trigger control of the aborted conversion. More...
IFX_INLINE void | IfxVadc_clearQueue (Ifx_VADC_G *vadcG, boolean flushQueue)
Clears all the queue entries including backup stage. More...
IFX_INLINE void | IfxVadc_disableQueueSlotExternalTrigger (Ifx_VADC_G *vadcG)
Disables the external trigger. More...
IFX_INLINE void | IfxVadc_enableQueueSlotExternalTrigger (Ifx_VADC_G *vadcG)
Enables the external trigger. More...
IFX_INLINE IfxVadc_GatingMode | IfxVadc_getQueueSlotGatingMode (Ifx_VADC_G *vadcG)
Gets the requested queue slot gating mode. More...
IFX_INLINE IfxVadc_GatingSource | IfxVadc_getQueueSlotGatingSource (Ifx_VADC_G *vadcG)
Gets the requested queue slot gating input. More...
IFX_INLINE IfxVadc_RequestSlotPriority | IfxVadc_getQueueSlotPriority (Ifx_VADC_G *vadcG)
Gets the request queue slot priority. More...
IFX_INLINE IfxVadc_RequestSlotStartMode | IfxVadc_getQueueSlotStartMode (Ifx_VADC_G *vadcG)
Gets the requested queue slot start mode. More...
IFX_INLINE IfxVadc_TriggerSource | IfxVadc_getQueueSlotTriggerInput (Ifx_VADC_G *vadcG)
Gets the requested queue slot trigger input. More...
IFX_INLINE IfxVadc_TriggerMode | IfxVadc_getQueueSlotTriggerMode (Ifx_VADC_G *vadcG)
Gets the requested queue slot trigger mode. More...
IFX_INLINE boolean | IfxVadc_isRequestQueueSlotEnabled (Ifx_VADC_G *vadcG)
Returns the queue slot requested status. More...
IFX_INLINE void | IfxVadc_setQueueSlotGatingConfig (Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the gating configurations. More...
IFX_INLINE void | IfxVadc_setQueueSlotTriggerOperatingConfig (Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the trigger operating configurations. More...
IFX_INLINE void | IfxVadc_startQueue (Ifx_VADC_G *group)
Starts a queue of a group by generating a trigger event through software. More...
IFX_EXTERN IfxVadc_Status | IfxVadc_getQueueStatus (Ifx_VADC_G *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full. More...

Detailed Description

Function Documentation

◆ IfxVadc_addToQueue()

IFX_INLINE void IfxVadc_addToQueue | ( | Ifx_VADC_G * | group,
 |  | IfxVadc_ChannelId | channel,
 |  | uint32 | options
 | ) |  |

Add an entry to the queue of a group for the specified channel with the following options set: refill incase of aborted conversion source interrupt enable/disable external trigger control of the aborted conversion.

Parameters
group | pointer to the VADC group
channel | specifies channel Id
options | specifies the refill, source interrupt enable/disable and external trigger control selection
Returns
None
Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
IfxVadc_ChannelId channel = 1; // for channel 1
// Add channel 1 to queue of group 0 with the refill turned on
IfxVadc_addToQueue(qroup, channel, (1<<IFX_VADC_G_QBUR0_RF_OFF));

Definition at line 1730 of file IfxVadc.h.

Referenced by IfxVadc_Adc_addToQueue().

◆ IfxVadc_clearQueue()

IFX_INLINE void IfxVadc_clearQueue | ( | Ifx_VADC_G * | vadcG,
 |  | boolean | flushQueue
 | ) |  |

Clears all the queue entries including backup stage.

Parameters
vadcG | pointer to VADC group registers.
flushQueue | Whether queue is cleared or not.
Returns
None

Definition at line 1765 of file IfxVadc.h.

Referenced by IfxVadc_Adc_clearQueue(), and IfxVadc_Adc_initGroup().

◆ IfxVadc_disableQueueSlotExternalTrigger()

IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger ( Ifx_VADC_G * vadcG )

Disables the external trigger.

Parameters
vadcG pointer to VADC group registers.
Returns
None

Definition at line 1792 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_enableQueueSlotExternalTrigger()

IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger ( Ifx_VADC_G * vadcG )

Enables the external trigger.

Parameters
vadcG pointer to VADC group registers.
Returns
None

Definition at line 1826 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_getQueueSlotGatingMode()

IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode ( Ifx_VADC_G * vadcG )

Gets the requested queue slot gating mode.

Parameters
vadcG pointer to VADC group registers.
Returns
requested queue slot gating mode.

Definition at line 2047 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getQueueSlotGatingSource()

IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource ( Ifx_VADC_G * vadcG )

Gets the requested queue slot gating input.

Parameters
vadcG pointer to VADC group registers.
Returns
requested queue slot gating input.

Definition at line 2053 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getQueueSlotPriority()

IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority ( Ifx_VADC_G * vadcG )

Gets the request queue slot priority.

Parameters
vadcG pointer to VADC group registers.
Returns
requested queue slot priority.

Definition at line 2059 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getQueueSlotStartMode()

IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode ( Ifx_VADC_G * vadcG )

Gets the requested queue slot start mode.

Parameters
vadcG pointer to VADC group registers.
Returns
requested queue slot start mode.

Definition at line 2065 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getQueueSlotTriggerInput()

IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput ( Ifx_VADC_G * vadcG )

Gets the requested queue slot trigger input.

Parameters
vadcG pointer to VADC group registers.
Returns
requested queue slot trigger input.

Definition at line 2071 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getQueueSlotTriggerMode()

IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode ( Ifx_VADC_G * vadcG )

Gets the requested queue slot trigger mode.

Parameters
vadcG pointer to VADC group registers.
Returns
requested queue slot trigger mode.

Definition at line 2077 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getQueueStatus()

IFX_EXTERN IfxVadc_Status IfxVadc_getQueueStatus ( Ifx_VADC_G * group )

Gives the status of the Queue of a group by returning non zero value if the Queue is full.

Parameters
group pointer to the VADC group
Returns
status of the Queue
Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
boolean queueFull = (IfxVadc_getQueueStatus(group)==IfxVadc_Status_queueFull)?TRUE:FALSE; // get Queue status for group 0

Definition at line 284 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getQueueStatus().

◆ IfxVadc_isRequestQueueSlotEnabled()

IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled ( Ifx_VADC_G * vadcG )

Returns the queue slot requested status.

Parameters
vadcG pointer to VADC group registers.
Returns
TRUE if queue slot request enabled otherwise FALSE.

Definition at line 2173 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_setQueueSlotGatingConfig()

IFX_INLINE void IfxVadc_setQueueSlotGatingConfig | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_GatingSource | gatingSource,
 |  | IfxVadc_GatingMode | gatingMode
 | ) |  |

Sets the gating configurations.

Parameters
vadcG | pointer to VADC group registers.
gatingSource | gate input for group.
gatingMode | gating mode. High level, Low Level or Gating disabled.
Returns
None

Definition at line 2368 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setQueueSlotTriggerOperatingConfig()

IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_TriggerMode | triggerMode,
 |  | IfxVadc_TriggerSource | triggerSource
 | ) |  |

Sets the trigger operating configurations.

Parameters
vadcG | pointer to VADC group registers.
triggerMode | trigger mode. Rising, falling any edge leads to an trigger event.
triggerSource | trigger input for group.
Returns
None

Definition at line 2379 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_startQueue()

IFX_INLINE void IfxVadc_startQueue ( Ifx_VADC_G * group )

Starts a queue of a group by generating a trigger event through software.

Parameters
group pointer to the VADC group
Returns
None

Definition at line 2465 of file IfxVadc.h.

Referenced by IfxVadc_Adc_startQueue().


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » VADC » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxVadc_initEmuxPin (const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a EMUX output. More...
IFX_INLINE void | IfxVadc_initGxBflPin (const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a GxBFL output. More...

Detailed Description

Function Documentation

◆ IfxVadc_initEmuxPin()

IFX_INLINE void IfxVadc_initEmuxPin | ( | const IfxVadc_Emux_Out * | emux,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a EMUX output.

Parameters
emux | the Emux Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2135 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initExternalMultiplexerMode().

◆ IfxVadc_initGxBflPin()

IFX_INLINE void IfxVadc_initGxBflPin | ( | const IfxVadc_GxBfl_Out * | gxBfl,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a GxBFL output.

Parameters
gxBfl | the GxBFL Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2142 of file IfxVadc.h.


iLLD_TC26B: Frequency Calculation

Functions
Frequency Calculation
iLLD » VADC » Standard Driver
Collaboration diagram for Frequency Calculation:

Functions

IFX_INLINE uint32 | IfxVadc_calculateSampleTime (float32 analogFrequency, float32 sampleTime)
Calculate the time using analog frequency. More...
IFX_EXTERN float32 | IfxVadc_getAdcAnalogFrequency (Ifx_VADC *vadc)
Returns the configured Fadci VADC analog clock frequency in Hz. More...
IFX_EXTERN float32 | IfxVadc_getAdcDigitalFrequency (Ifx_VADC *vadc)
Returns the configured Fadcd VADC digital clock frequency in Hz. More...

Detailed Description

Function Documentation

◆ IfxVadc_calculateSampleTime()

IFX_INLINE uint32 IfxVadc_calculateSampleTime | ( | float32 | analogFrequency,
 |  | float32 | sampleTime
 | ) |  |

Calculate the time using analog frequency.

Parameters
analogFrequency | analog frequency in Hz.
sampleTime | sample time in sec.
Returns
sample time in sec.

Definition at line 1736 of file IfxVadc.h.

Referenced by IfxVadc_setEmuxGlobalSampleTime(), IfxVadc_setEmuxGroupSampletime(), IfxVadc_setGlobalSampleTime(), and IfxVadc_setGroupSampleTime().

◆ IfxVadc_getAdcAnalogFrequency()

IFX_EXTERN float32 IfxVadc_getAdcAnalogFrequency ( Ifx_VADC * vadc )

Returns the configured Fadci VADC analog clock frequency in Hz.

Parameters
vadc pointer to the base of VADC registers
Returns
Returns the configured Fadci VADC analog clock frequency in Hz.

Definition at line 180 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getChannelConversionTime(), IfxVadc_Adc_getGroupConfig(), IfxVadc_Adc_getModuleConfig(), IfxVadc_Adc_initGroup(), and IfxVadc_Adc_initModule().

◆ IfxVadc_getAdcDigitalFrequency()

IFX_EXTERN float32 IfxVadc_getAdcDigitalFrequency ( Ifx_VADC * vadc )

Returns the configured Fadcd VADC digital clock frequency in Hz.

Parameters
vadc pointer to the base of VADC registers
Returns
Returns the configured Fadcd VADC digital clock frequency in Hz.

Definition at line 186 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getModuleConfig(), and IfxVadc_Adc_initModuleConfig().


iLLD_TC26B: Group Functions

Functions
Group Functions
iLLD » VADC » Standard Driver
Collaboration diagram for Group Functions:

Functions

IFX_INLINE void | IfxVadc_clearAllResultRequests (Ifx_VADC_G *vadcG)
Clears the all group requests. More...
IFX_INLINE IfxVadc_ArbitrationRounds | IfxVadc_getArbiterRoundLength (Ifx_VADC_G *vadcG)
Gets the ADC group arbitration round length. More...
IFX_INLINE Ifx_VADC_G_REVNP0 | IfxVadc_getChannelResultServiceRequestNodePointer0 (Ifx_VADC_G *vadcG)
Gets the channel esult service request node pointer 0. More...
IFX_INLINE Ifx_VADC_G_REVNP1 | IfxVadc_getChannelResultServiceRequestNodePointer1 (Ifx_VADC_G *vadcG)
Gets the channel esult service request node pointer 1. More...
IFX_INLINE Ifx_VADC_G_CEVNP0 | IfxVadc_getChannelServiceRequestNodePointer0 (Ifx_VADC_G *vadcG)
Gets the channel service request node pointer. More...
IFX_INLINE uint8 | IfxVadc_getMasterIndex (Ifx_VADC_G *vadcG)
Gets the configured master index. More...
IFX_INLINE void | IfxVadc_resetGroup (Ifx_VADC_G *vadcG)
Resets the ADC group. More...
IFX_INLINE void | IfxVadc_setAnalogConvertControl (Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
Sets analog converter group number. More...
IFX_INLINE void | IfxVadc_setArbitrationRoundLength (Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength)
Sets the arbiter round length. More...
IFX_INLINE void | IfxVadc_setGroupResolution (Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
Sets the ADC input class channel resolution. More...
IFX_INLINE void | IfxVadc_setGroupSampleTime (Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time. More...
IFX_INLINE void | IfxVadc_setMasterIndex (Ifx_VADC_G *vadcG, uint8 masterIndex)
Sets the master index. More...
IFX_EXTERN void | IfxVadc_setArbiterPriority (Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot)
Sets the Arbiter slot configurations. More...

Detailed Description

Function Documentation

◆ IfxVadc_clearAllResultRequests()

IFX_INLINE void IfxVadc_clearAllResultRequests ( Ifx_VADC_G * vadcG )

Clears the all group requests.

Parameters
vadcG pointer to VADC group registers.
Returns
None

Definition at line 1753 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_getArbiterRoundLength()

IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength ( Ifx_VADC_G * vadcG )

Gets the ADC group arbitration round length.

Parameters
vadcG pointer to VADC group registers.
Returns
ADC group arbitration round length.

Definition at line 1852 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getChannelResultServiceRequestNodePointer0()

IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0 ( Ifx_VADC_G * vadcG )

Gets the channel esult service request node pointer 0.

Parameters
vadcG pointer to VADC group registers.
Returns
channel result service request node pointer 0.

Definition at line 1916 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getChannelConfig().

◆ IfxVadc_getChannelResultServiceRequestNodePointer1()

IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1 ( Ifx_VADC_G * vadcG )

Gets the channel esult service request node pointer 1.

Parameters
vadcG pointer to VADC group registers.
Returns
channel result service request node pointer 1.

Definition at line 1924 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getChannelConfig().

◆ IfxVadc_getChannelServiceRequestNodePointer0()

IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0 ( Ifx_VADC_G * vadcG )

Gets the channel service request node pointer.

Parameters
vadcG pointer to VADC group registers.
Returns
channel service request node pointer.

Definition at line 1932 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getChannelConfig().

◆ IfxVadc_getMasterIndex()

IFX_INLINE uint8 IfxVadc_getMasterIndex ( Ifx_VADC_G * vadcG )

Gets the configured master index.

Parameters
vadcG pointer to VADC group registers.
Returns
configured master kernel index.

Definition at line 2039 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_resetGroup()

IFX_INLINE void IfxVadc_resetGroup ( Ifx_VADC_G * vadcG )

Resets the ADC group.

Parameters
vadcG pointer to VADC group registers.
Returns
None

Definition at line 2185 of file IfxVadc.h.

Referenced by IfxVadc_Adc_deInitGroup().

◆ IfxVadc_setAnalogConvertControl()

IFX_INLINE void IfxVadc_setAnalogConvertControl | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_AnalogConverterMode | analogConverterMode
 | ) |  |

Sets analog converter group number.

Parameters
vadcG | pointer to VADC group registers.
analogConverterMode | group analog converter mode.
Returns
None

Definition at line 2191 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup(), and IfxVadc_Adc_initModule().

◆ IfxVadc_setArbiterPriority()

IFX_EXTERN void IfxVadc_setArbiterPriority | ( | Ifx_VADC_G * | vadcG,
 |  | boolean | slotEnable,
 |  | IfxVadc_RequestSlotPriority | prio,
 |  | IfxVadc_RequestSlotStartMode | mode,
 |  | IfxVadc_RequestSource | slot
 | ) |  |

Sets the Arbiter slot configurations.

Parameters
vadcG | pointer to VADC group registers.
slotEnable | enable/disable of slot.
prio | channel request priority.
mode | Channel Slot start mode.
slot | channel slot Request source.
Returns
None

Definition at line 527 of file IfxVadc.c.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setArbitrationRoundLength()

IFX_INLINE void IfxVadc_setArbitrationRoundLength | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ArbitrationRounds | arbiterRoundLength
 | ) |  |

Sets the arbiter round length.

Parameters
vadcG | pointer to VADC group registers.
arbiterRoundLength | arbiter round length.
Returns
None

Definition at line 2197 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setGroupResolution()

IFX_INLINE void IfxVadc_setGroupResolution | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | inputClassNum,
 |  | IfxVadc_ChannelResolution | resolution
 | ) |  |

Sets the ADC input class channel resolution.

Parameters
vadcG | pointer to VADC group registers.
inputClassNum | input class number.
resolution | ADC input class channel resolution.
Returns
None

Definition at line 2343 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setGroupSampleTime()

IFX_INLINE void IfxVadc_setGroupSampleTime | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency,
 |  | float32 | sampleTime
 | ) |  |

Sets the ADC input class sample time.

Parameters
vadcG | pointer to VADC group registers.
inputClassNum | input class number.
analogFrequency | ADC analog frequency in Hz.
sampleTime | request sample time in sec for input class.
Returns
None

Definition at line 2349 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setMasterIndex()

IFX_INLINE void IfxVadc_setMasterIndex | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | masterIndex
 | ) |  |

Sets the master index.

Parameters
vadcG | pointer to VADC group registers.
masterIndex | master index.
Returns
None

Definition at line 2361 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » VADC » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxVadc_disableModule (Ifx_VADC *vadc)
Disable VADC Module. More...
IFX_INLINE void | IfxVadc_enableModule (Ifx_VADC *vadc)
Enable VADC kernel. More...
IFX_INLINE uint8 | IfxVadc_getAdcCalibrationActiveState (Ifx_VADC *vadc, uint8 adcCalGroupNum)
gets ADC Calibration Flag CAL status. More...
IFX_INLINE Ifx_VADC_GLOBCFG | IfxVadc_getGlobalConfigValue (Ifx_VADC *vadc)
Gets the global control configuration value. More...
IFX_INLINE boolean | IfxVadc_getStartupCalibration (Ifx_VADC *vadc)
get SUCAL bit field status More...
IFX_INLINE void | IfxVadc_initiateStartupCalibration (Ifx_VADC *vadc)
initiates the calibration pulse phase. More...
IFX_INLINE void | IfxVadc_setGlobalResolution (Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
Sets the channel conversion mode. More...
IFX_INLINE void | IfxVadc_setGlobalSampleTime (Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time of ADC global class. More...
IFX_INLINE void | IfxVadc_setSleepMode (Ifx_VADC *vadc, IfxVadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN void | IfxVadc_disableAccess (Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Disable write access to the VADC config/control registers. More...
IFX_EXTERN void | IfxVadc_disablePostCalibration (Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable)
Disables the post calibration. More...
IFX_EXTERN void | IfxVadc_enableAccess (Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Enable write access to the VADC config/control registers. More...
IFX_EXTERN void | IfxVadc_enableGroupSync (Ifx_VADC *vadc, uint32 ccu6Num)
Enables the CCU6 based ADC group synchronisation as workaround for Erratum ADC_TC.068. More...
IFX_EXTERN float32 | IfxVadc_getAdcModuleFrequency (void)
Module Frequency in Hz. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxVadc_getSrcAddress (IfxVadc_GroupId group, IfxVadc_SrcNr index)
Gives the SRC source address. More...
IFX_EXTERN void | IfxVadc_initialiseAdcArbiterClock (Ifx_VADC *vadc, uint32 arbiterClockDivider)
Initialises ADC arbiter clock. More...
IFX_EXTERN void | IfxVadc_initialiseAdcConverterClock (Ifx_VADC *vadc, uint32 converterClockDivider)
Initialises the ADC Converter clock. More...
IFX_EXTERN uint32 | IfxVadc_initializeFAdcD (Ifx_VADC *vadc, uint32 fAdcD)
Configure the FadcD vadc digital clock. More...
IFX_EXTERN uint32 | IfxVadc_initializeFAdcI (Ifx_VADC *vadc, uint32 fAdcI)
Configure the ADC analog clock. More...
IFX_EXTERN boolean | IfxVadc_isPostCalibration (Ifx_VADC *vadc, IfxVadc_GroupId group)
Return the post calibration status. More...
IFX_EXTERN void | IfxVadc_resetKernel (Ifx_VADC *vadc)
Resets the kernel. More...
IFX_EXTERN void | IfxVadc_selectPowerSupplyVoltage (Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage)
Select Low Power Supply Voltage. More...
IFX_EXTERN void | IfxVadc_startupCalibration (Ifx_VADC *vadc)
Starts ADC calibration and wait for the end of the calibration process. More...

Detailed Description

Function Documentation

◆ IfxVadc_disableAccess()

IFX_EXTERN void IfxVadc_disableAccess | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_Protection | protectionSet
 | ) |  |

Disable write access to the VADC config/control registers.

Parameters
vadc | pointer to the base of VADC registers.
protectionSet | Index of the bit in the ACCPROTx {x=0/1} for which write access is to be disabled.
Returns
None

Definition at line 71 of file IfxVadc.c.

Referenced by IfxVadc_Adc_deInitGroup(), IfxVadc_Adc_initChannel(), IfxVadc_Adc_initGroup(), IfxVadc_Adc_initModule(), IfxVadc_configExternalMultiplexerMode(), IfxVadc_disablePostCalibration(), IfxVadc_enableGroupSync(), IfxVadc_initialiseAdcArbiterClock(), IfxVadc_initialiseAdcConverterClock(), IfxVadc_resetKernel(), IfxVadc_selectPowerSupplyVoltage(), and IfxVadc_startupCalibration().

◆ IfxVadc_disableModule()

IFX_INLINE void IfxVadc_disableModule ( Ifx_VADC * vadc )

Disable VADC Module.

Parameters
vadc Pointer to VADC Module
Returns
None

Definition at line 1783 of file IfxVadc.h.

Referenced by IfxVadc_Adc_disableModule().

◆ IfxVadc_disablePostCalibration()

IFX_EXTERN void IfxVadc_disablePostCalibration | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_GroupId | group,
 |  | boolean | disable
 | ) |  |

Disables the post calibration.

Parameters
vadc | pointer to the base of VADC registers.
group | Index of the group.
disable | disable or not.
Returns
None

Definition at line 89 of file IfxVadc.c.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_enableAccess()

IFX_EXTERN void IfxVadc_enableAccess | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_Protection | protectionSet
 | ) |  |

Enable write access to the VADC config/control registers.

Parameters
vadc | pointer to the base of VADC registers.
protectionSet | Index of the bit in the ACCPROTx {x=0/1} for which write access is to be enabled.
Returns
None

Definition at line 111 of file IfxVadc.c.

Referenced by IfxVadc_Adc_deInitGroup(), IfxVadc_Adc_initChannel(), IfxVadc_Adc_initGroup(), IfxVadc_Adc_initModule(), IfxVadc_configExternalMultiplexerMode(), IfxVadc_disablePostCalibration(), IfxVadc_enableGroupSync(), IfxVadc_initialiseAdcArbiterClock(), IfxVadc_initialiseAdcConverterClock(), IfxVadc_resetKernel(), IfxVadc_selectPowerSupplyVoltage(), and IfxVadc_startupCalibration().

◆ IfxVadc_enableGroupSync()

IFX_EXTERN void IfxVadc_enableGroupSync | ( | Ifx_VADC * | vadc,
 |  | uint32 | ccu6Num
 | ) |  |

Enables the CCU6 based ADC group synchronisation as workaround for Erratum ADC_TC.068.

Parameters
vadc | pointer to the base of VADC registers.
ccu6Num | selects CCU60 or CCU61
Returns
None

Definition at line 129 of file IfxVadc.c.

◆ IfxVadc_enableModule()

IFX_INLINE void IfxVadc_enableModule ( Ifx_VADC * vadc )

Enable VADC kernel.

Parameters
vadc pointer to the base of VADC registers.
Returns
None

Definition at line 1816 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initModule().

◆ IfxVadc_getAdcCalibrationActiveState()

IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState | ( | Ifx_VADC * | vadc,
 |  | uint8 | adcCalGroupNum
 | ) |  |

gets ADC Calibration Flag CAL status.

Parameters
vadc | pointer to VADC group registers.
adcCalGroupNum | ADC CAL group number.
Returns
CAL group status.

Definition at line 1844 of file IfxVadc.h.

Referenced by IfxVadc_startupCalibration().

◆ IfxVadc_getAdcModuleFrequency()

IFX_EXTERN float32 IfxVadc_getAdcModuleFrequency ( void )

Module Frequency in Hz.

Returns
Module Frequency in Hz.

Definition at line 192 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getChannelConversionTime(), and IfxVadc_Adc_getModuleConfig().

◆ IfxVadc_getGlobalConfigValue()

IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue ( Ifx_VADC * vadc )

Gets the global control configuration value.

Parameters
vadc pointer to the base of VADC registers.
Returns
global control configuration value.

Definition at line 1972 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getSrcAddress()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxVadc_getSrcAddress | ( | IfxVadc_GroupId | group,
 |  | IfxVadc_SrcNr | index
 | ) |  |

Gives the SRC source address.

Parameters
group | Index of the group
index | SRC number
Returns
SRC source address

Definition at line 367 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getChannelConfig(), and IfxVadc_Adc_initChannel().

◆ IfxVadc_getStartupCalibration()

IFX_INLINE boolean IfxVadc_getStartupCalibration ( Ifx_VADC * vadc )

get SUCAL bit field status

Parameters
vadc Pointer to VADC Module
Returns
Indicate the start-up calibration phase

Definition at line 2129 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getModuleConfig().

◆ IfxVadc_initialiseAdcArbiterClock()

IFX_EXTERN void IfxVadc_initialiseAdcArbiterClock | ( | Ifx_VADC * | vadc,
 |  | uint32 | arbiterClockDivider
 | ) |  |

Initialises ADC arbiter clock.

Parameters
vadc | pointer to the base of VADC registers
arbiterClockDivider | ADC arbiter clock divider.
Returns
None

Definition at line 395 of file IfxVadc.c.

Referenced by IfxVadc_initializeFAdcD().

◆ IfxVadc_initialiseAdcConverterClock()

IFX_EXTERN void IfxVadc_initialiseAdcConverterClock | ( | Ifx_VADC * | vadc,
 |  | uint32 | converterClockDivider
 | ) |  |

Initialises the ADC Converter clock.

Parameters
vadc | pointer to the base of VADC registers
converterClockDivider | ADC converter clock divider.
Returns
None

Definition at line 407 of file IfxVadc.c.

Referenced by IfxVadc_initializeFAdcI().

◆ IfxVadc_initializeFAdcD()

IFX_EXTERN uint32 IfxVadc_initializeFAdcD | ( | Ifx_VADC * | vadc,
 |  | uint32 | fAdcD
 | ) |  |

Configure the FadcD vadc digital clock.

Parameters
vadc | pointer to the base of VADC registers.
fAdcD | ADC digital clock frequency in Hz.
Returns
calculated ADC digital clock frequency in Hz.

Definition at line 419 of file IfxVadc.c.

Referenced by IfxVadc_Adc_initModule().

◆ IfxVadc_initializeFAdcI()

IFX_EXTERN uint32 IfxVadc_initializeFAdcI | ( | Ifx_VADC * | vadc,
 |  | uint32 | fAdcI
 | ) |  |

Configure the ADC analog clock.

Parameters
vadc | pointer to the base of VADC registers.
fAdcI | ADC analog clock clock frequency in Hz. Range = [5000000, 10000000].
Returns
ADC analog clock frequency in Hz.

Definition at line 435 of file IfxVadc.c.

Referenced by IfxVadc_Adc_initModule().

◆ IfxVadc_initiateStartupCalibration()

IFX_INLINE void IfxVadc_initiateStartupCalibration ( Ifx_VADC * vadc )

initiates the calibration pulse phase.

Parameters
vadc pointer to the base of VADC registers
Returns
None

Definition at line 2149 of file IfxVadc.h.

Referenced by IfxVadc_startupCalibration().

◆ IfxVadc_isPostCalibration()

IFX_EXTERN boolean IfxVadc_isPostCalibration | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_GroupId | group
 | ) |  |

Return the post calibration status.

Parameters
vadc | Pointer to VADC module
group | specifies Group ID
Returns
TRUE if the post calibration is enabled for the group else false

Definition at line 472 of file IfxVadc.c.

Referenced by IfxVadc_getChannelConversionTime().

◆ IfxVadc_resetKernel()

IFX_EXTERN void IfxVadc_resetKernel ( Ifx_VADC * vadc )

Resets the kernel.

Parameters
vadc pointer to the base of VADC registers.
Returns
None

Definition at line 494 of file IfxVadc.c.

Referenced by IfxVadc_Adc_deInitModule().

◆ IfxVadc_selectPowerSupplyVoltage()

IFX_EXTERN void IfxVadc_selectPowerSupplyVoltage | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_LowSupplyVoltageSelect | supplyVoltage
 | ) |  |

Select Low Power Supply Voltage.

Parameters
vadc | Pointer to Module space
supplyVoltage | Select Supply Voltage
Returns
None

Definition at line 515 of file IfxVadc.c.

Referenced by IfxVadc_Adc_initModule().

◆ IfxVadc_setGlobalResolution()

IFX_INLINE void IfxVadc_setGlobalResolution | ( | Ifx_VADC * | vadc,
 |  | uint8 | inputClassNum,
 |  | IfxVadc_ChannelResolution | resolution
 | ) |  |

Sets the channel conversion mode.

Parameters
vadc | pointer to VADC module registers.
inputClassNum | global input class number.
resolution | ADC channel resolution.
Returns
None

Definition at line 2325 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initModule().

◆ IfxVadc_setGlobalSampleTime()

IFX_INLINE void IfxVadc_setGlobalSampleTime | ( | Ifx_VADC * | vadc,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency,
 |  | float32 | sampleTime
 | ) |  |

Sets the sample time of ADC global class.

Parameters
vadc | pointer to VADC module registers.
inputClassNum | global input class number.
analogFrequency | ADC analog frequency in Hz.
sampleTime | the requested sample time for input class in sec.
Returns
None

Definition at line 2331 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initModule().

◆ IfxVadc_setSleepMode()

IFX_INLINE void IfxVadc_setSleepMode | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
vadc | pointer to VADC registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 2438 of file IfxVadc.h.

◆ IfxVadc_startupCalibration()

IFX_EXTERN void IfxVadc_startupCalibration ( Ifx_VADC * vadc )

Starts ADC calibration and wait for the end of the calibration process.

Parameters
vadc pointer to the base of VADC registers.
Returns
None

Definition at line 559 of file IfxVadc.c.

Referenced by IfxVadc_Adc_initModule().


iLLD_TC26B: Channel Functions

Functions
Channel Functions
iLLD » VADC » Standard Driver
Collaboration diagram for Channel Functions:

Functions

IFX_INLINE void | IfxVadc_clearChannelRequest (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId)
Clears the channel request. More...
IFX_INLINE void | IfxVadc_enableFifoMode (Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode)
Enables the FIFO mode. More...
IFX_INLINE void | IfxVadc_enableServiceRequest (Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
IFX_INLINE Ifx_VADC_G_CHASS | IfxVadc_getAssignedChannels (Ifx_VADC_G *vadcG)
Gets the group's assigned channels. More...
IFX_INLINE Ifx_VADC_CHCTR | IfxVadc_getChannelControlConfig (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Gets the current ADC channel control configurations. More...
IFX_INLINE IfxVadc_InputClasses | IfxVadc_getChannelInputClass (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Gets the channel input class. More...
IFX_INLINE IfxVadc_ChannelResolution | IfxVadc_getGroupResolution (Ifx_VADC_G *vadcG, uint8 inputClassNum)
Gets the ADC input class channel resolution. More...
IFX_INLINE float32 | IfxVadc_getGroupSampleTime (Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the ADC input class channel sample time. More...
IFX_INLINE void | IfxVadc_setBackgroundPriorityChannel (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Sets the channels with low priority as background channel. More...
IFX_INLINE void | IfxVadc_setBackgroundResultTarget (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
Sets the target for result background source. More...
IFX_INLINE void | IfxVadc_setBoundaryMode (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
Selects boundary extension. More...
IFX_INLINE void | IfxVadc_setChannelEventNodePointer0 (Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
Sets the channel event service request line. More...
IFX_INLINE void | IfxVadc_setChannelInputClass (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
Sets the channel input class. More...
IFX_INLINE void | IfxVadc_setChannelLimitCheckMode (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
Sets the channel event mode. More...
IFX_INLINE void | IfxVadc_setGroupPriorityChannel (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Sets channel as priority channel with in the group. More...
IFX_INLINE void | IfxVadc_setLowerBoundary (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
Sets group's lower boundary. More...
IFX_INLINE void | IfxVadc_setReferenceInput (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
Selects the refernce input. More...
IFX_INLINE void | IfxVadc_setResultNodeEventPointer0 (Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
Sets result event node pointer 0. More...
IFX_INLINE void | IfxVadc_setResultNodeEventPointer1 (Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
Sets result event node pointer 1. More...
IFX_INLINE void | IfxVadc_setResultPosition (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
Sets result store position. More...
IFX_INLINE void | IfxVadc_setSyncRequest (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
Sets channel synchronization request. More...
IFX_INLINE void | IfxVadc_setUpperBoundary (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
Sets group's upper boundary. More...
IFX_INLINE void | IfxVadc_storeGroupResult (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
Sets the group result register. More...
IFX_EXTERN float32 | IfxVadc_getChannelConversionTime (Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode)
get channel conversion timing More...

Detailed Description

Function Documentation

◆ IfxVadc_clearChannelRequest()

IFX_INLINE void IfxVadc_clearChannelRequest | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelId
 | ) |  |

Clears the channel request.

Parameters
vadcG | pointer to VADC group registers.
channelId | channel id whose request to be cleared.
Returns
None

Definition at line 1759 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_enableFifoMode()

IFX_INLINE void IfxVadc_enableFifoMode | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelResult | resultRegister,
 |  | IfxVadc_FifoMode | fifoMode
 | ) |  |

Enables the FIFO mode.

Parameters
vadcG | pointer to VADC group registers.
resultRegister | channel result register.
fifoMode | FIFO mode .
Returns
None

Definition at line 1810 of file IfxVadc.h.

◆ IfxVadc_enableServiceRequest()

IFX_INLINE void IfxVadc_enableServiceRequest | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelResult | resultRegister
 | ) |  |
Parameters
vadcG | pointer to VADC group registers.
resultRegister | channel result register.
Returns
None

Definition at line 1838 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_getAssignedChannels()

IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels ( Ifx_VADC_G * vadcG )

Gets the group's assigned channels.

Parameters
vadcG pointer to VADC group registers.
Returns
group's assigned channels.

Definition at line 1858 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getChannelConfig().

◆ IfxVadc_getChannelControlConfig()

IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex
 | ) |  |

Gets the current ADC channel control configurations.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | ADC channel number.
Returns
current ADC channel control configuration.

Definition at line 1902 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getChannelConfig().

◆ IfxVadc_getChannelConversionTime()

IFX_EXTERN float32 IfxVadc_getChannelConversionTime | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_GroupId | group,
 |  | IfxVadc_InputClasses | inputClass,
 |  | float32 | analogFrequency,
 |  | float32 | moduleFrequency,
 |  | IfxVadc_ConversionType | conversionMode
 | ) |  |

get channel conversion timing

Parameters
vadc | Pointer to VADC module
group | specifies the Group
inputClass | Input class used
analogFrequency | ADC module analog frequency fadci in Hz.
moduleFrequency | ADC module frequency fvadc in Hz.
conversionMode | specifies the conversion mode (Standard conversion mode)
Returns
Channel conversion Time in sec

Definition at line 219 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getChannelConversionTime().

◆ IfxVadc_getChannelInputClass()

IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex
 | ) |  |

Gets the channel input class.

Parameters
vadcG | pointer to VADC Group register space
channelIndex | specifies channel ID
Returns
Input class

Definition at line 1910 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getChannelConversionTime().

◆ IfxVadc_getGroupResolution()

IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | inputClassNum
 | ) |  |

Gets the ADC input class channel resolution.

Parameters
vadcG | pointer to VADC group registers.
inputClassNum | ADC input class number.
Returns
ADC input class channel resolution.

Definition at line 2009 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getGroupSampleTime()

IFX_INLINE float32 IfxVadc_getGroupSampleTime | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency
 | ) |  |

Gets the ADC input class channel sample time.

Parameters
vadcG | pointer to VADC group registers.
inputClassNum | ADC input class number.
analogFrequency | ADC module analog frequency in Hz.
Returns
ADC input class channel sample time in sec.

Definition at line 2026 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_setBackgroundPriorityChannel()

IFX_INLINE void IfxVadc_setBackgroundPriorityChannel | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex
 | ) |  |

Sets the channels with low priority as background channel.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
Returns
None

Definition at line 2215 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setBackgroundResultTarget()

IFX_INLINE void IfxVadc_setBackgroundResultTarget | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | boolean | globalResultUsage
 | ) |  |

Sets the target for result background source.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
globalResultUsage | whether storage in global result register.
Returns
None

Definition at line 2221 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setBoundaryMode()

IFX_INLINE void IfxVadc_setBoundaryMode | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | IfxVadc_BoundaryExtension | boundaryMode
 | ) |  |

Selects boundary extension.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
boundaryMode | boundary extension mode.
Returns
None

Definition at line 2256 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setChannelEventNodePointer0()

IFX_INLINE void IfxVadc_setChannelEventNodePointer0 | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_SrcNr | channelSrcNr,
 |  | IfxVadc_ChannelId | channel
 | ) |  |

Sets the channel event service request line.

Parameters
vadcG | pointer to VADC group registers.
channelSrcNr | channel event Service Node.
channel | channel number.
Returns
None

Definition at line 2262 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setChannelInputClass()

IFX_INLINE void IfxVadc_setChannelInputClass | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | IfxVadc_InputClasses | inputClass
 | ) |  |

Sets the channel input class.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
inputClass | group input class.
Returns
None

Definition at line 2276 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setChannelLimitCheckMode()

IFX_INLINE void IfxVadc_setChannelLimitCheckMode | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | IfxVadc_LimitCheck | limitCheck
 | ) |  |

Sets the channel event mode.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
limitCheck | channel event mode.
Returns
None

Definition at line 2282 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setGroupPriorityChannel()

IFX_INLINE void IfxVadc_setGroupPriorityChannel | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex
 | ) |  |

Sets channel as priority channel with in the group.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
Returns
None

Definition at line 2337 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setLowerBoundary()

IFX_INLINE void IfxVadc_setLowerBoundary | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | IfxVadc_BoundarySelection | lowerBoundary
 | ) |  |

Sets group's lower boundary.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
lowerBoundary | group lower boundary.
Returns
None

Definition at line 2355 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setReferenceInput()

IFX_INLINE void IfxVadc_setReferenceInput | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | IfxVadc_ChannelReference | reference
 | ) |  |

Selects the refernce input.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
reference | reference input.
Returns
None

Definition at line 2390 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setResultNodeEventPointer0()

IFX_INLINE void IfxVadc_setResultNodeEventPointer0 | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_SrcNr | resultSrcNr,
 |  | IfxVadc_ChannelResult | resultRegister
 | ) |  |

Sets result event node pointer 0.

Parameters
vadcG | pointer to VADC group registers.
resultSrcNr | channel result event service node.
resultRegister | channel result register.
Returns
None

Definition at line 2396 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setResultNodeEventPointer1()

IFX_INLINE void IfxVadc_setResultNodeEventPointer1 | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_SrcNr | resultSrcNr,
 |  | IfxVadc_ChannelResult | resultRegister
 | ) |  |

Sets result event node pointer 1.

Parameters
vadcG | pointer to VADC group registers.
resultSrcNr | channel result event service node.
resultRegister | channel result register.
Returns
None

Definition at line 2403 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setResultPosition()

IFX_INLINE void IfxVadc_setResultPosition | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | boolean | rightAlignedStorage
 | ) |  |

Sets result store position.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
rightAlignedStorage | result store position.
Returns
None

Definition at line 2410 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setSyncRequest()

IFX_INLINE void IfxVadc_setSyncRequest | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | boolean | synchonize
 | ) |  |

Sets channel synchronization request.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
synchonize | whether channel synchronize or stand alone operation.
Returns
None

Definition at line 2447 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setUpperBoundary()

IFX_INLINE void IfxVadc_setUpperBoundary | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | IfxVadc_BoundarySelection | upperBoundary
 | ) |  |

Sets group's upper boundary.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
upperBoundary | group upper boundary.
Returns
None

Definition at line 2453 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_storeGroupResult()

IFX_INLINE void IfxVadc_storeGroupResult | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | IfxVadc_ChannelResult | resultRegister
 | ) |  |

Sets the group result register.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
resultRegister | result register for group result storage.
Returns
None

Definition at line 2477 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().


iLLD_TC26B: Emux Functions

Functions
Emux Functions
iLLD » VADC » Standard Driver
Collaboration diagram for Emux Functions:

Functions

IFX_INLINE IfxVadc_ChannelResolution | IfxVadc_getEmuxGlobalResolution (Ifx_VADC *vadc, uint8 inputClassNum)
get global input class resolution More...
IFX_INLINE float32 | IfxVadc_getEmuxGlobalSampleTime (Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
Get the sample time of ADC global class for external channel. More...
IFX_INLINE IfxVadc_ChannelResolution | IfxVadc_getEmuxGroupResolution (Ifx_VADC_G *vadcG, uint8 inputClassNum)
get the external channel resolution More...
IFX_INLINE float32 | IfxVadc_getEmuxGroupSampleTime (Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the ADC input class sample time of external channel. More...
IFX_INLINE void | IfxVadc_setEmuxGlobalResolution (Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
set the external channel resolution of Global class More...
IFX_INLINE void | IfxVadc_setEmuxGlobalSampleTime (Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time of ADC global class for external channel. More...
IFX_INLINE void | IfxVadc_setEmuxGroupResolution (Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
set the external channel resolution of ADC input class More...
IFX_INLINE void | IfxVadc_setEmuxGroupSampletime (Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time for external channel. More...
IFX_INLINE void | IfxVadc_setEmuxInterfaceForGroup (Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group)
Sets the Emux Interface for a particular group. More...
IFX_EXTERN void | IfxVadc_configExternalMultiplexerMode (Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle)

Detailed Description

Function Documentation

◆ IfxVadc_configExternalMultiplexerMode()

IFX_EXTERN void IfxVadc_configExternalMultiplexerMode | ( | Ifx_VADC * | vadc,
 |  | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ExternalMultiplexerMode | mode,
 |  | uint8 | channels,
 |  | IfxVadc_EmuxSelectValue | startChannel,
 |  | IfxVadc_EmuxCodingScheme | code,
 |  | IfxVadc_EmuxSampleTimeControl | sampleTimeControl,
 |  | IfxVadc_ChannelSelectionStyle | channelSelectionStyle
 | ) |  |
Parameters
vadc | pointer to Module space
vadcG | Pointer to VADC group register space
mode | External Multiplexer mode
channels | Specifies channel Id
startChannel | specifies the external channel value from which conversion to be carried out
code | Output the channel number in binary code/gray code
sampleTimeControl | specifies when to use a sample time for external channel
channelSelectionStyle | External Multiplexer Channel Selection Style
Returns
None

Definition at line 52 of file IfxVadc.c.

Referenced by IfxVadc_Adc_initExternalMultiplexerMode().

◆ IfxVadc_getEmuxGlobalResolution()

IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution | ( | Ifx_VADC * | vadc,
 |  | uint8 | inputClassNum
 | ) |  |

get global input class resolution

Parameters
vadc | Pointer to VADC Module space
inputClassNum | global input class number
Returns
External channel resolution for global input class

Definition at line 1948 of file IfxVadc.h.

◆ IfxVadc_getEmuxGlobalSampleTime()

IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime | ( | Ifx_VADC * | vadc,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency
 | ) |  |

Get the sample time of ADC global class for external channel.

Parameters
vadc | pointer to VADC Module space
inputClassNum | Adc input class number
analogFrequency | ADC module analog frequency in Hz.
Returns
ADC input class external channel sample time in sec.

Definition at line 1954 of file IfxVadc.h.

◆ IfxVadc_getEmuxGroupResolution()

IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | inputClassNum
 | ) |  |

get the external channel resolution

Parameters
vadcG | Pointer to VADC group register space
inputClassNum | Adc input class number
Returns
Adc input class External channel resolution

Definition at line 1960 of file IfxVadc.h.

◆ IfxVadc_getEmuxGroupSampleTime()

IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency
 | ) |  |

Gets the ADC input class sample time of external channel.

Parameters
vadcG | Pointer to Register Group space
inputClassNum | ADC input class number
analogFrequency | ADC module analog frequency in Hz.
Returns
ADC input class external channel sample time in sec.

Definition at line 1966 of file IfxVadc.h.

◆ IfxVadc_setEmuxGlobalResolution()

IFX_INLINE void IfxVadc_setEmuxGlobalResolution | ( | Ifx_VADC * | vadc,
 |  | uint8 | inputClassNum,
 |  | IfxVadc_ChannelResolution | resolution
 | ) |  |

set the external channel resolution of Global class

Parameters
vadc | pointer to VADC Module space
inputClassNum | Global Input Class Number
resolution | External Channel resolution
Returns
None

Definition at line 2288 of file IfxVadc.h.

◆ IfxVadc_setEmuxGlobalSampleTime()

IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime | ( | Ifx_VADC * | vadc,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency,
 |  | float32 | sampleTime
 | ) |  |

Sets the sample time of ADC global class for external channel.

Parameters
vadc | Pointer to VADC Module space
inputClassNum | Adc input class number
analogFrequency | ADC analog Frequency in HZ
sampleTime | the requested sample time for input class in sec
Returns
None

Definition at line 2294 of file IfxVadc.h.

◆ IfxVadc_setEmuxGroupResolution()

IFX_INLINE void IfxVadc_setEmuxGroupResolution | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | inputClassNum,
 |  | IfxVadc_ChannelResolution | resolution
 | ) |  |

set the external channel resolution of ADC input class

Parameters
vadcG | pointer to VADC Group Register space
inputClassNum | input class number
resolution | input class external channel resolution
Returns
None

Definition at line 2300 of file IfxVadc.h.

◆ IfxVadc_setEmuxGroupSampletime()

IFX_INLINE void IfxVadc_setEmuxGroupSampletime | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency,
 |  | float32 | sampleTime
 | ) |  |

Sets the ADC input class sample time for external channel.

Parameters
vadcG | Pointer to VADC Group Register Space
inputClassNum | input class number
analogFrequency | ADC analog frequency in Hz.
sampleTime | request sample time in sec for input class.
Returns
None

Definition at line 2306 of file IfxVadc.h.

◆ IfxVadc_setEmuxInterfaceForGroup()

IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_EmuxInterface | emuxInterface,
 |  | IfxVadc_GroupId | group
 | ) |  |

Sets the Emux Interface for a particular group.

Parameters
vadc | Pointer to VADC Module Space
emuxInterface | specifies the EmuxInterface
group | specifies the group ID
Returns
None

Definition at line 2312 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initExternalMultiplexerMode().


iLLD_TC26B: VADC Pin Mapping

Data Structures | Macros | Variables
VADC Pin Mapping
iLLD » VADC
Collaboration diagram for VADC Pin Mapping:

Data Structures

struct | IfxVadc_GxBfl_Out
VADC Boundary Flag pin mapping structure. More...
struct | IfxVadc_Emux_Out
VADC External Mux pin mapping structure. More...
struct | IfxVadc_Vadcg_In
VADC Analog Input. More...

Macros

#define | IFXVADC_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXVADC_PINMAP_NUM_GROUPS 4
#define | IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS 12
#define | IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS 6
#define | IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS 16

Variables

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT
VADC_EMUX00: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT
VADC_EMUX00: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT
VADC_EMUX01: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT
VADC_EMUX01: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT
VADC_EMUX02: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT
VADC_EMUX02: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT
VADC_EMUX10: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT
VADC_EMUX10: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT
VADC_EMUX11: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT
VADC_EMUX11: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT
VADC_EMUX12: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT
VADC_EMUX12: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT
VADC_G0BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT
VADC_G0BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT
VADC_G0BFL2: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT
VADC_G0BFL3: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT
VADC_G1BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT
VADC_G1BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT
VADC_G1BFL2: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT
VADC_G1BFL3: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT
VADC_G2BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT
VADC_G2BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT
VADC_G2BFL2: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT
VADC_G2BFL3: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT
VADC_G3BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT
VADC_G3BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT
VADC_G3BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT
VADC_G3BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT
VADC_G3BFL2: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT
VADC_G3BFL3: VADC output. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN
VADC_G0_0: VADC input channel 0 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN
VADC_G0_10: VADC input channel 10 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN
VADC_G0_11: VADC input channel 11 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN
VADC_G0_12: VADC input channel 12 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN
VADC_G0_13: VADC input channel 13 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN
VADC_G0_1: VADC input channel 1 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN
VADC_G0_2: VADC input channel 2 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN
VADC_G0_3: VADC input channel 3 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN
VADC_G0_4: VADC input channel 4 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN
VADC_G0_5: VADC input channel 5 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN
VADC_G0_6: VADC input channel 6 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN
VADC_G0_7: VADC input channel 7 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN
VADC_G0_8: VADC input channel 8 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN
VADC_G1_0: VADC input channel 0 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN
VADC_G1_10: VADC input channel 10 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN
VADC_G1_10: VADC input channel 10 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN
VADC_G1_11: VADC input channel 11 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN
VADC_G1_11: VADC input channel 11 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN
VADC_G1_12: VADC input channel 12 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN
VADC_G1_13: VADC input channel 13 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN
VADC_G1_1: VADC input channel 1 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN
VADC_G1_2: VADC input channel 2 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN
VADC_G1_3: VADC input channel 3 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN
VADC_G1_4: VADC input channel 4 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN
VADC_G1_5: VADC input channel 5 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN
VADC_G1_8: VADC input channel 8 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN
VADC_G1_8: VADC input channel 8 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN
VADC_G1_9: VADC input channel 9of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN
VADC_G1_9: VADC input channel 9 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN
VADC_G2_0: VADC input channel 0 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN
VADC_G2_10: VADC input channel 10 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN
VADC_G2_11: VADC input channel 11 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN
VADC_G2_12: VADC input channel 12 of group 24. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN
VADC_G2_13: VADC input channel 13 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN
VADC_G2_14: VADC input channel 14 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN
VADC_G2_15: VADC input channel 15 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN
VADC_G2_1: VADC input channel 1 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN
VADC_G2_3: VADC input channel 3 of group 2 (mtm) More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN
VADC_G2_4: VADC input channel 4 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN
VADC_G2_4: VADC input channel 4 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN
VADC_G2_5: VADC input channel 5 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN
VADC_G2_5: VADC input channel 5 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN
VADC_G2_6: VADC input channel 6 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN
VADC_G2_6: VADC input channel 6 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN
VADC_G2_7: VADC input channel 7 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN
VADC_G2_7: VADC input channel 7 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN
VADC_G3_0: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN
VADC_G3_10: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN
VADC_G3_11: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN
VADC_G3_1: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN
VADC_G3_2: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN
VADC_G3_3: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN
VADC_G3_4: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN
VADC_G3_5: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN
VADC_G3_6: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN
VADC_G3_7: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN
VADC_G3_8: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN
VADC_G3_9: VADC input. More...
IFX_EXTERN const IfxVadc_Emux_Out * | IfxVadc_Emux_Out_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
IfxVadc_Emux_Out table. More...
IFX_EXTERN const IfxVadc_GxBfl_Out * | IfxVadc_GxBfl_Out_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]
IfxVadc_GxBfl_Out table. More...
IFX_EXTERN const IfxVadc_Vadcg_In * | IfxVadc_Vadcg_In_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS]
IfxVadc_Vadcg_In table. More...

Detailed Description

Data Structure Documentation

◆ IfxVadc_GxBfl_Out

struct IfxVadc_GxBfl_Out

VADC Boundary Flag pin mapping structure.

Definition at line 56 of file IfxVadc_PinMap.h.

Collaboration diagram for IfxVadc_GxBfl_Out:
[legend]
Data Fields
IfxVadc_GroupId | groupId | Group ID.
Ifx_VADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxVadc_Emux_Out

struct IfxVadc_Emux_Out

VADC External Mux pin mapping structure.

Definition at line 65 of file IfxVadc_PinMap.h.

Collaboration diagram for IfxVadc_Emux_Out:
[legend]
Data Fields
Ifx_VADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxVadc_Vadcg_In

struct IfxVadc_Vadcg_In

VADC Analog Input.

Definition at line 73 of file IfxVadc_PinMap.h.

Collaboration diagram for IfxVadc_Vadcg_In:
[legend]
Data Fields
uint8 | channelId | Channel ID.
IfxVadc_GroupId | groupId | Group ID.
Ifx_VADC * | module | Base address.
IfxPort_Pin | pin | Port pin.

Macro Definition Documentation

◆ IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS

#define IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS 12

Definition at line 173 of file IfxVadc_PinMap.h.

◆ IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS

#define IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS 6

Definition at line 174 of file IfxVadc_PinMap.h.

◆ IFXVADC_PINMAP_NUM_GROUPS

#define IFXVADC_PINMAP_NUM_GROUPS 4

Definition at line 172 of file IfxVadc_PinMap.h.

◆ IFXVADC_PINMAP_NUM_MODULES

#define IFXVADC_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 171 of file IfxVadc_PinMap.h.

◆ IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS

#define IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS 16

Definition at line 175 of file IfxVadc_PinMap.h.

Variable Documentation

◆ IfxVadc_EMUX00_P02_6_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT

VADC_EMUX00: VADC output.

Definition at line 81 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX00_P33_3_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT

VADC_EMUX00: VADC output.

Definition at line 82 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX01_P02_7_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT

VADC_EMUX01: VADC output.

Definition at line 83 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX01_P33_2_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT

VADC_EMUX01: VADC output.

Definition at line 84 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX02_P02_8_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT

VADC_EMUX02: VADC output.

Definition at line 85 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX02_P33_1_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT

VADC_EMUX02: VADC output.

Definition at line 86 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX10_P00_6_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT

VADC_EMUX10: VADC output.

Definition at line 87 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX10_P33_6_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT

VADC_EMUX10: VADC output.

Definition at line 88 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX11_P00_7_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT

VADC_EMUX11: VADC output.

Definition at line 89 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX11_P33_5_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT

VADC_EMUX11: VADC output.

Definition at line 90 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX12_P00_8_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT

VADC_EMUX12: VADC output.

Definition at line 91 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX12_P33_4_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT

VADC_EMUX12: VADC output.

Definition at line 92 of file IfxVadc_PinMap.h.

◆ IfxVadc_Emux_Out_pinTable

IFX_EXTERN const IfxVadc_Emux_Out* IfxVadc_Emux_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS]

IfxVadc_Emux_Out table.

Definition at line 179 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_0_AN0_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN

VADC_G0_0: VADC input channel 0 of group 0.

Definition at line 111 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_10_AN10_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN

VADC_G0_10: VADC input channel 10 of group 0.

Definition at line 112 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_11_AN11_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN

VADC_G0_11: VADC input channel 11 of group 0.

Definition at line 113 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_12_AN12_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN

VADC_G0_12: VADC input channel 12 of group 0.

Definition at line 114 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_13_AN13_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN

VADC_G0_13: VADC input channel 13 of group 0.

Definition at line 115 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_1_AN1_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN

VADC_G0_1: VADC input channel 1 of group 0.

Definition at line 116 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_2_AN2_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN

VADC_G0_2: VADC input channel 2 of group 0.

Definition at line 117 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_3_AN3_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN

VADC_G0_3: VADC input channel 3 of group 0.

Definition at line 118 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_4_AN4_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN

VADC_G0_4: VADC input channel 4 of group 0.

Definition at line 119 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_5_AN5_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN

VADC_G0_5: VADC input channel 5 of group 0.

Definition at line 120 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_6_AN6_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN

VADC_G0_6: VADC input channel 6 of group 0.

Definition at line 121 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_7_AN7_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN

VADC_G0_7: VADC input channel 7 of group 0.

Definition at line 122 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_8_AN8_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN

VADC_G0_8: VADC input channel 8 of group 0.

Definition at line 123 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0BFL0_P33_4_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT

VADC_G0BFL0: VADC output.

Definition at line 93 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0BFL1_P33_5_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT

VADC_G0BFL1: VADC output.

Definition at line 94 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0BFL2_P33_6_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT

VADC_G0BFL2: VADC output.

Definition at line 95 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0BFL3_P33_7_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT

VADC_G0BFL3: VADC output.

Definition at line 96 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_0_AN16_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN

VADC_G1_0: VADC input channel 0 of group 1.

Definition at line 124 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_10_AN26_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN

VADC_G1_10: VADC input channel 10 of group 1.

Definition at line 125 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_10_P40_2_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN

VADC_G1_10: VADC input channel 10 of group 1.

Definition at line 126 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_11_AN27_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN

VADC_G1_11: VADC input channel 11 of group 1.

Definition at line 127 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_11_P40_3_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN

VADC_G1_11: VADC input channel 11 of group 1.

Definition at line 128 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_12_AN28_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN

VADC_G1_12: VADC input channel 12 of group 1.

Definition at line 129 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_13_AN29_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN

VADC_G1_13: VADC input channel 13 of group 1.

Definition at line 130 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_1_AN17_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN

VADC_G1_1: VADC input channel 1 of group 1.

Definition at line 131 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_2_AN18_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN

VADC_G1_2: VADC input channel 2 of group 1.

Definition at line 132 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_3_AN19_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN

VADC_G1_3: VADC input channel 3 of group 1.

Definition at line 133 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_4_AN20_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN

VADC_G1_4: VADC input channel 4 of group 1.

Definition at line 134 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_5_AN21_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN

VADC_G1_5: VADC input channel 5 of group 1.

Definition at line 135 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_8_AN24_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN

VADC_G1_8: VADC input channel 8 of group 1.

Definition at line 136 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_8_P40_0_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN

VADC_G1_8: VADC input channel 8 of group 1.

Definition at line 137 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_9_AN25_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN

VADC_G1_9: VADC input channel 9of group 1.

Definition at line 138 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_9_P40_1_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN

VADC_G1_9: VADC input channel 9 of group 1.

Definition at line 139 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1BFL0_P33_0_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT

VADC_G1BFL0: VADC output.

Definition at line 97 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1BFL1_P33_1_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT

VADC_G1BFL1: VADC output.

Definition at line 98 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1BFL2_P33_2_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT

VADC_G1BFL2: VADC output.

Definition at line 99 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1BFL3_P33_3_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT

VADC_G1BFL3: VADC output.

Definition at line 100 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_0_AN32_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN

VADC_G2_0: VADC input channel 0 of group 2.

Definition at line 140 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_10_AN44_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN

VADC_G2_10: VADC input channel 10 of group 2.

Definition at line 141 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_11_AN45_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN

VADC_G2_11: VADC input channel 11 of group 2.

Definition at line 142 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_12_AN46_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN

VADC_G2_12: VADC input channel 12 of group 24.

Definition at line 143 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_13_AN47_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN

VADC_G2_13: VADC input channel 13 of group 2.

Definition at line 144 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_14_AN48_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN

VADC_G2_14: VADC input channel 14 of group 2.

Definition at line 145 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_15_AN49_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN

VADC_G2_15: VADC input channel 15 of group 2.

Definition at line 146 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_1_AN33_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN

VADC_G2_1: VADC input channel 1 of group 2.

Definition at line 147 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_3_AN35_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN

VADC_G2_3: VADC input channel 3 of group 2 (mtm)

Definition at line 148 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_4_AN36_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN

VADC_G2_4: VADC input channel 4 of group 2.

Definition at line 149 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_4_P40_6_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN

VADC_G2_4: VADC input channel 4 of group 2.

Definition at line 150 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_5_AN37_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN

VADC_G2_5: VADC input channel 5 of group 2.

Definition at line 151 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_5_P40_7_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN

VADC_G2_5: VADC input channel 5 of group 2.

Definition at line 152 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_6_AN38_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN

VADC_G2_6: VADC input channel 6 of group 2.

Definition at line 153 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_6_P40_8_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN

VADC_G2_6: VADC input channel 6 of group 2.

Definition at line 154 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_7_AN39_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN

VADC_G2_7: VADC input channel 7 of group 2.

Definition at line 155 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_7_P40_9_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN

VADC_G2_7: VADC input channel 7 of group 2.

Definition at line 156 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2BFL0_P00_4_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT

VADC_G2BFL0: VADC output.

Definition at line 101 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2BFL1_P00_5_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT

VADC_G2BFL1: VADC output.

Definition at line 102 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2BFL2_P00_6_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT

VADC_G2BFL2: VADC output.

Definition at line 103 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2BFL3_P00_7_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT

VADC_G2BFL3: VADC output.

Definition at line 104 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_0_P00_12_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN

VADC_G3_0: VADC input.

Definition at line 157 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_10_P00_2_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN

VADC_G3_10: VADC input.

Definition at line 158 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_11_P00_1_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN

VADC_G3_11: VADC input.

Definition at line 159 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_1_P00_11_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN

VADC_G3_1: VADC input.

Definition at line 160 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_2_P00_10_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN

VADC_G3_2: VADC input.

Definition at line 161 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_3_P00_9_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN

VADC_G3_3: VADC input.

Definition at line 162 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_4_P00_8_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN

VADC_G3_4: VADC input.

Definition at line 163 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_5_P00_7_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN

VADC_G3_5: VADC input.

Definition at line 164 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_6_P00_6_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN

VADC_G3_6: VADC input.

Definition at line 165 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_7_P00_5_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN

VADC_G3_7: VADC input.

Definition at line 166 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_8_P00_4_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN

VADC_G3_8: VADC input.

Definition at line 167 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_9_P00_3_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN

VADC_G3_9: VADC input.

Definition at line 168 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3BFL0_P10_0_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT

VADC_G3BFL0: VADC output.

Definition at line 105 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3BFL0_P10_6_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT

VADC_G3BFL0: VADC output.

Definition at line 106 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3BFL1_P10_1_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT

VADC_G3BFL1: VADC output.

Definition at line 107 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3BFL1_P10_7_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT

VADC_G3BFL1: VADC output.

Definition at line 108 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3BFL2_P10_2_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT

VADC_G3BFL2: VADC output.

Definition at line 109 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3BFL3_P10_3_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT

VADC_G3BFL3: VADC output.

Definition at line 110 of file IfxVadc_PinMap.h.

◆ IfxVadc_GxBfl_Out_pinTable

IFX_EXTERN const IfxVadc_GxBfl_Out* IfxVadc_GxBfl_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]

IfxVadc_GxBfl_Out table.

Definition at line 182 of file IfxVadc_PinMap.h.

◆ IfxVadc_Vadcg_In_pinTable

IFX_EXTERN const IfxVadc_Vadcg_In* IfxVadc_Vadcg_In_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS]

IfxVadc_Vadcg_In table.

Definition at line 185 of file IfxVadc_PinMap.h.


iLLD_TC26B: How to use the VADC ADC Interface driver?

How to use the VADC ADC Interface driver?
iLLD » VADC
Collaboration diagram for How to use the VADC ADC Interface driver?:

VADC comprises of independent analog channels with Analog/Digital converters to convert analog input to discrete digital output.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Vadc/Adc/IfxVadc_Adc.h>

Variables

// VADC handle
IfxVadc_Adc vadc;
IfxVadc_Adc_Group adcGroup;

Module Initialisation

The module initialisation can be done in the same function:

// create configuration
IfxVadc_Adc_Config adcConfig;
IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
// initialize module
// IfxVadc_Adc vadc; // declared globally
IfxVadc_Adc_initModule(&vadc, &adcConfig);

Group Initialisation

The group initialisation can be done in the same function:

// create group config
IfxVadc_Adc_GroupConfig adcGroupConfig;
IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
// change group (default is GroupId_0, change to GroupId_3)
adcGroupConfig.groupId = IfxVadc_GroupId_3;
// IMPORTANT: usually we use the same group as master!
adcGroupConfig.master = adcGroupConfig.groupId;
// enable all arbiter request sources
adcGroupConfig.arbiter.requestSlotQueueEnabled = TRUE; // enable Queue mode
adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE; // enable Scan mode
adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE; // enable Background scan
// enable all gates in "always" mode (no edge detection)
adcGroupConfig.queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
// enable auto scan
adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
adcGroupConfig.backgroundScanRequest.autoBackgroundScanEnabled = TRUE;
// initialize the group
IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);

Queued Transfers

Now, VADC is initialised. Here,Three channels are used for queued transfers

// IMPORTANT: for deterministic results we have to disable the queue gate
// while filling the queue, otherwise results could be output in the wrong order
IfxVadc_GatingMode savedGate = IfxVadc_getQueueSlotGatingMode(adcGroup.group);
IfxVadc_GatingSource gatingSource=IfxVadc_getQueueSlotGatingSource(adcGroup.group);
IfxVadc_setQueueSlotGatingConfig(adcGroup.group, gatingSource, IfxVadc_GatingMode_disabled );
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig[3];
IfxVadc_Adc_Channel adcChannel[3];
for(int chnIx=0; chnIx<3; ++chnIx) {
IfxVadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
adcChannelConfig[chnIx].channelId = (IfxVadc_ChannelId)(chnIx);
adcChannelConfig[chnIx].resultRegister = IfxVadc_ChannelResult_1; // use result register #1 for all channels
// initialize the channel
IfxVadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
// Add channel to queue with refill enabled
IfxVadc_Adc_addToQueue(&adcChannel[chnIx], IFXVADC_QUEUE_REFILL);
// restore previous gate config
IfxVadc_setQueueSlotGatingConfig(adcGroup.group, gatingSource, savedGate );
// start the Queue
IfxVadc_Adc_startQueue(&adcGroup); // just for the case that somebody copy&pastes the code - the queue has already been started in previous test
// get 10 results for all 3 channels and store in temporary buffer
// (the usage of a buffer is required, since the print statements used by the checks take more time than the conversions)
Ifx_VADC_RES resultTrace[3*10];
for(int i=0; i<3*10; ++i)
{
unsigned chnIx = i % 3;
// wait for valid result
Ifx_VADC_RES conversionResult;
do {
conversionResult = IfxVadc_Adc_getResult(&adcChannel[chnIx]);
} while( !conversionResult.B.VF );
// store result
resultTrace[i] = conversionResult;
}
// stop the queue
IfxVadc_Adc_clearQueue(&adcGroup);
// check results in buffer
// ...
}

Auto Scan

Autoscan of 5 channels

// create group config
IfxVadc_Adc_GroupConfig adcGroupConfig;
IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
// change group (default is GroupId_0, change to GroupId_3)
adcGroupConfig.groupId = IfxVadc_GroupId_3;
// IMPORTANT: usually we use the same group as master!
adcGroupConfig.master = adcGroupConfig.groupId;
// enable gate in "always" mode (no edge detection)
adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
// enable auto scan
adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE;
adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
// initialize the group
//IfxVadc_Adc_Group adcGroup; // no need to create a new one
IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
{
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig[5];
IfxVadc_Adc_Channel adcChannel[5];
for(int chnIx=0; chnIx<5; ++chnIx) {
IfxVadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
adcChannelConfig[chnIx].channelId = (IfxVadc_ChannelId)(chnIx);
adcChannelConfig[chnIx].resultRegister = (IfxVadc_ChannelResult)(chnIx); // use dedicated result register
// initialize the channel
IfxVadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
// add to scan
unsigned channels = (1 << adcChannelConfig[chnIx].channelId);
unsigned mask = channels;
IfxVadc_Adc_setScan(&adcGroup, channels, mask);
}
// start scan
IfxVadc_Adc_startScan(&adcGroup);
// check results
for(int chnIx=0; chnIx<5; ++chnIx) {
unsigned group = adcChannel[chnIx].group->groupId;
unsigned channel = adcChannel[chnIx].channel;
// wait for valid result
Ifx_VADC_RES conversionResult;
do {
conversionResult = IfxVadc_Adc_getResult(&adcChannel[chnIx]);
} while( !conversionResult.B.VF );
}
}

Background Scan

Background Scan of 2 channels

// create group config
IfxVadc_Adc_GroupConfig adcGroupConfig;
IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
// change group (default is GroupId_0, change to GroupId_3)
adcGroupConfig.groupId = IfxVadc_GroupId_3;
// IMPORTANT: usually we use the same group as master!
adcGroupConfig.master = adcGroupConfig.groupId;
// enable background scan
adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE;
adcGroupConfig.backgroundScanRequest.autoBackgroundScanEnabled = TRUE;
// enable gate in "always" mode (no edge detection)
adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig[2];
IfxVadc_Adc_Channel adcChannel[2];
for(int chnIx=0; chnIx<2; ++chnIx)
{
IfxVadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
adcChannelConfig[chnIx].channelId = (IfxVadc_ChannelId)(chnIx + 5);
adcChannelConfig[chnIx].resultRegister = (IfxVadc_ChannelResult)(5 + chnIx); // use register #5 and 6 for results
adcChannelConfig[chnIx].backgroundChannel = TRUE;
// initialize the channel
IfxVadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
// add to background scan
unsigned channels = (1 << adcChannelConfig[chnIx].channelId);
unsigned mask = channels;
IfxVadc_Adc_setBackgroundScan(&vadc, &adcGroup, channels, mask);
}
// start autoscan
IfxVadc_Adc_startBackgroundScan(&vadc);
// check results
for(int chnIx=0; chnIx<2; ++chnIx)
{
unsigned group = adcChannel[chnIx].group->groupId;
unsigned channel = adcChannel[chnIx].channel;
// wait for valid result
Ifx_VADC_RES conversionResult;
do
{
conversionResult = IfxVadc_Adc_getResult(&adcChannel[chnIx]);
} while( !conversionResult.B.VF );
// check with expected value
// ...
}

External Multiplexer Configuration

External Configuration of 3 channels at channel 3

IfxVadc_Adc_EmuxControl emuxConfig;
IfxVadc_Adc_initExternalMultiplexerModeConfig(&emuxConfig,vadc);
emuxConfig.groupId = IfxVadc_GroupId_1;
emuxConfig.channels = (uint8)IfxVadc_ChannelId_3;
emuxConfig.startChannel = IfxVadc_EmuxSelectValue_2; // it will take 0 to 2 external channel
emuxConfig.sampleTimeControl = IfxVadc_EmuxSampleTimeControl_always;
emuxConfig.mode = IfxVadc_ExternalMultiplexerMode_steady;
IfxVadc_Adc_EmuxPinConfig pinsConfig ={
.pins={ &IfxVadc_EMUX00_P02_6_OUT,
&IfxVadc_EMUX01_P02_7_OUT,
&IfxVadc_EMUX02_P02_8_OUT},
.outputMode = IfxPort_OutputMode_pushPull,
.padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1
};
emuxConfig.emuxOutPinConfig = pinsConfig;
IfxVadc_Adc_initExternalMultiplexerMode(vadc, &emuxConfig);
IfxVadc_setEmuxGroupResolution(&vadc->G[emuxConfig.groupId], 0, IfxVadc_ChannelResolution_12bit);
IfxVadc_setEmuxGroupSampletime(&vadc->G[emuxConfig.groupId], 0, 50000, 1.0e-6);


iLLD_TC26B: Interface Driver

Modules
Interface Driver
iLLD » VADC
Collaboration diagram for Interface Driver:

Modules

Data Structures
Module Functions
Group Functions
Channel Functions
Background Autoscan Functions
Channel Scan Functions
Queue Functions
Clock Functions
Interrupt Functions
Variables
Emux Functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » VADC » Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxVadc_Adc
VADC handle data structure. More...
struct | IfxVadc_Adc_GatingTriggerConfig
Gating/Trigger configuration structure. More...
struct | IfxVadc_Adc_ArbiterConfig
Arbiter configuration structure. More...
struct | IfxVadc_Adc_BackgroundScanConfig
Background scan mode configuration structure. More...
struct | IfxVadc_Adc_ClassConfig
Input class configuration structure. More...
struct | IfxVadc_Adc_Group
Group handle data structure. More...
struct | IfxVadc_Adc_QueueConfig
Queue configuration structure. More...
struct | IfxVadc_Adc_ScanConfig
Scan mode configuration structure. More...
struct | IfxVadc_Adc_Channel
Channel handle data structure. More...
struct | IfxVadc_Adc_ChannelConfig
Channel configuration structure. More...
struct | IfxVadc_Adc_Config
VADC module configuration structure. More...
struct | IfxVadc_Adc_EmuxControl
Emux Control Structure. More...
struct | IfxVadc_Adc_GroupConfig
Group configuration structure. More...

Detailed Description

Data Structure Documentation

◆ IfxVadc_Adc

struct IfxVadc_Adc

VADC handle data structure.

Definition at line 377 of file IfxVadc_Adc.h.

Data Fields
Ifx_VADC * vadc Specifies the pointer to the VADC module registers.

◆ IfxVadc_Adc_GatingTriggerConfig

struct IfxVadc_Adc_GatingTriggerConfig

Gating/Trigger configuration structure.

Definition at line 384 of file IfxVadc_Adc.h.

Data Fields
IfxVadc_GatingMode | gatingMode | Specifies gating mode. High level, Low Level or Gating disabled.
IfxVadc_GatingSource | gatingSource | Specifies used gate input for group.
IfxVadc_TriggerMode | triggerMode | Specifies trigger mode. Rising, falling any edge leads to an trigger event.
IfxVadc_TriggerSource | triggerSource | Specifies used Trigger input for group.

◆ IfxVadc_Adc_ArbiterConfig

struct IfxVadc_Adc_ArbiterConfig

Arbiter configuration structure.

Definition at line 398 of file IfxVadc_Adc.h.

Data Fields
IfxVadc_ArbitrationRounds | arbiterRoundLength | Specifies arbiter round length.
boolean | requestSlotBackgroundScanEnabled | request background scan if enabled.
boolean | requestSlotQueueEnabled | request queue if enabled.
boolean | requestSlotScanEnabled | request scan if enabled.

◆ IfxVadc_Adc_BackgroundScanConfig

struct IfxVadc_Adc_BackgroundScanConfig

Background scan mode configuration structure.

Definition at line 408 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_BackgroundScanConfig:
[legend]
Data Fields
boolean | autoBackgroundScanEnabled | background autoscan functionality enable or disable.
IfxVadc_RequestSlotPriority | requestSlotPrio | priority of used background scan request slot.
IfxVadc_RequestSlotStartMode | requestSlotStartMode | start mode for request background scan source.
IfxVadc_Adc_GatingTriggerConfig | triggerConfig | trigger and gating configuration.

◆ IfxVadc_Adc_ClassConfig

struct IfxVadc_Adc_ClassConfig

Input class configuration structure.

Definition at line 418 of file IfxVadc_Adc.h.

Data Fields
IfxVadc_ChannelResolution | resolution | Specifies the conversion Mode 8,10,12Bit or 10bit fast compare.
float32 | sampleTime | Specifies the requested sample time for input class.

◆ IfxVadc_Adc_Group

struct IfxVadc_Adc_Group

Group handle data structure.

Definition at line 426 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_Group:
[legend]
Data Fields
Ifx_VADC_G * | group | Pointer to the group registers.
IfxVadc_GroupId | groupId | Specifies the group index.
IfxVadc_Adc | module | The VADC handle structure.

◆ IfxVadc_Adc_QueueConfig

struct IfxVadc_Adc_QueueConfig

Queue configuration structure.

Definition at line 435 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_QueueConfig:
[legend]
Data Fields
boolean | flushQueueAfterInit | Specifies if the queue is flushed after configuration.
IfxVadc_RequestSlotPriority | requestSlotPrio | priority of used queue request slot.
IfxVadc_RequestSlotStartMode | requestSlotStartMode | start mode for request queue source.
IfxVadc_Adc_GatingTriggerConfig | triggerConfig | trigger and gating configuration.

◆ IfxVadc_Adc_ScanConfig

struct IfxVadc_Adc_ScanConfig

Scan mode configuration structure.

Definition at line 445 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_ScanConfig:
[legend]
Data Fields
boolean | autoscanEnabled | Specifies autoscan functionality.
IfxVadc_RequestSlotPriority | requestSlotPrio | priority of used scan request slot.
IfxVadc_RequestSlotStartMode | requestSlotStartMode | start mode for request scan source.
IfxVadc_Adc_GatingTriggerConfig | triggerConfig | Specifies trigger and gating configuration.

◆ IfxVadc_Adc_Channel

struct IfxVadc_Adc_Channel

Channel handle data structure.

Definition at line 466 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_Channel:
[legend]
Data Fields
IfxVadc_ChannelId | channel | Specifies the channel index.
IFX_CONST IfxVadc_Adc_Group * | group | Specifies the group of the channel.
IfxVadc_ChannelResult | resultreg | Specifies allocated result register.

◆ IfxVadc_Adc_ChannelConfig

struct IfxVadc_Adc_ChannelConfig

Channel configuration structure.

Definition at line 475 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_ChannelConfig:
[legend]
Data Fields
boolean | backgroundChannel | Specifies channel is used as background channel.
IfxVadc_BoundaryExtension | boundaryMode | Specifies Standard mode of fast compare mode.
IfxVadc_ChannelId | channelId | Specifies the channel index.
Ifx_Priority | channelPriority | Interrupt priority of the channel trigger interrupt, if 0 the interrupt is disable.
IfxSrc_Tos | channelServProvider | Interrupt service provider for the channel trigger interrupt.
IfxVadc_SrcNr | channelSrcNr | Service node of the channel trigger.
boolean | globalResultUsage | Specifies storage in global result register.
IFX_CONST IfxVadc_Adc_Group * | group | Specifies pointer to the IfxVadc_Adc_Group group handle.
IfxVadc_InputClasses | inputClass | Specifies input class selection.
IfxVadc_LimitCheck | limitCheck | Specifies boundary band selection upper/lower.
IfxVadc_BoundarySelection | lowerBoundary | Specifies lower boundary selection.
IfxVadc_ChannelReference | reference | Specifies Reference selection.
Ifx_Priority | resultPriority | Interrupt priority of the result trigger interrupt, if 0 the interrupt is disable.
IfxVadc_ChannelResult | resultRegister | Specifies Result register selection.
IfxSrc_Tos | resultServProvider | Interrupt service provider for the result trigger interrupt.
IfxVadc_SrcNr | resultSrcNr | Service node of the result trigger.
boolean | rightAlignedStorage | Specifies result is right aligned.
boolean | synchonize | Specifies synchronized conversion channel.
IfxVadc_BoundarySelection | upperBoundary | Specifies upper boundary selection.

◆ IfxVadc_Adc_Config

struct IfxVadc_Adc_Config

VADC module configuration structure.

Definition at line 500 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_Config:
[legend]
Data Fields
float32 | analogFrequency | Specifies analog ADC Frequency.
float32 | digitalFrequency | Specifies digital ADC Frequency.
IfxVadc_Adc_ClassConfig | globalInputClass[IFXVADC_NUM_GLOBAL_INPUTCLASSES] | Specifies the global conversion settings one and two.
float32 | moduleFrequency | module Frequency in Hz.
boolean | startupCalibration | Can be enabled to execute a startup calibration (disabled by default). Note that this option will also enable all converter groups. If this isn't desired, don't use this option, but execute IfxVadc_Adc_startupCalibration() after all ADC groups have been initialized.
IfxVadc_LowSupplyVoltageSelect | supplyVoltage | Select Low Power Supply Voltage.
Ifx_VADC * | vadc | Specifies the pointer to the VADC module registers.

◆ IfxVadc_Adc_EmuxControl

struct IfxVadc_Adc_EmuxControl

Emux Control Structure.

Definition at line 515 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_EmuxControl:
[legend]
Data Fields
uint8 | channels | specifies channel number
IfxVadc_ChannelSelectionStyle | channelSelectionStyle | External Multiplexer Channel Selection Style.
IfxVadc_EmuxCodingScheme | code | specifes binary/gray code
IfxVadc_EmuxInterface | emuxInterface | specifies the Emux interface
IfxVadc_Adc_EmuxPinConfig | emuxOutPinConfig | configure the emux output pin
IfxVadc_GroupId | groupId | specifies groupId
IfxVadc_ExternalMultiplexerMode | mode | Specifies the External Multiplexer mode.
IfxVadc_EmuxSampleTimeControl | sampleTimeControl | specifies when to use sample time control
IfxVadc_EmuxSelectValue | startChannel | specifies the external channel start value(EMUX[x:0]) x- specifies external channel number
Ifx_VADC * | vadc | pointer to Module Configuration

◆ IfxVadc_Adc_GroupConfig

struct IfxVadc_Adc_GroupConfig

Group configuration structure.

Definition at line 532 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_GroupConfig:
[legend]
Data Fields
IfxVadc_Adc_ArbiterConfig | arbiter | Arbiter configuration structure.
IfxVadc_Adc_BackgroundScanConfig | backgroundScanRequest | Specifies back ground scan configuration.
boolean | disablePostCalibration | Specifies if calibration after conversion (post calibration) should be disabled.
IfxVadc_GroupId | groupId | Specifies the group/kernel id.
IfxVadc_Adc_ClassConfig | inputClass[IFXVADC_NUM_INPUTCLASSES] | Specifies conversion settings one and two.
IfxVadc_GroupId | master | Specifies the master group. If master is different from groupId, then the group is configured as slave.
IFX_CONST IfxVadc_Adc * | module | Specifies pointer to the IfxVadc_Adc module handle.
IfxVadc_Adc_QueueConfig | queueRequest | Specifies queued mode configuration.
IfxVadc_Adc_ScanConfig | scanRequest | Specifies scan mode configuration.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxVadc_Adc_deInitModule (IfxVadc_Adc *vadc)
Reset the VADC module. More...
IFX_INLINE void | IfxVadc_Adc_getModuleConfig (IfxVadc_Adc *vadc, IfxVadc_Adc_Config *config)
Get the current VADC configuration (e.g. VADC frequency) More...
IFX_INLINE Ifx_VADC_RES | IfxVadc_Adc_getResultBasedOnRequestSource (IfxVadc_Adc_Group *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result based on the Request Source. (Function does not care about the alignment) value = raw * gain + offset. More...
IFX_EXTERN void | IfxVadc_Adc_disableModule (Ifx_VADC *vadc)
Disable VADC Module. More...
IFX_EXTERN IfxVadc_Status | IfxVadc_Adc_initModule (IfxVadc_Adc *vadc, const IfxVadc_Adc_Config *config)
Initialise the VADC to run with the expected frequency and calibration. More...
IFX_EXTERN void | IfxVadc_Adc_initModuleConfig (IfxVadc_Adc_Config *config, Ifx_VADC *vadc)
Initialise buffer with default VADC configuration. More...

Detailed Description

Function Documentation

◆ IfxVadc_Adc_deInitModule()

IFX_INLINE void IfxVadc_Adc_deInitModule ( IfxVadc_Adc * vadc )

Reset the VADC module.

Parameters
vadc pointer to the VADC module
Returns
None

Example Usage :How to use the VADC ADC Interface driver?

Definition at line 1198 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_disableModule()

IFX_EXTERN void IfxVadc_Adc_disableModule ( Ifx_VADC * vadc )

Disable VADC Module.

Parameters
vadc Pointer to VADC Module
Returns
None

Definition at line 141 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_getModuleConfig()

IFX_INLINE void IfxVadc_Adc_getModuleConfig | ( | IfxVadc_Adc * | vadc,
 |  | IfxVadc_Adc_Config * | config
 | ) |  |

Get the current VADC configuration (e.g. VADC frequency)

Parameters
vadc | pointer to the VADC module
config | pointer to the VADC module configuration
Returns
None

Example Usage :How to use the VADC ADC Interface driver?

Definition at line 1230 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_getResultBasedOnRequestSource()

IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResultBasedOnRequestSource | ( | IfxVadc_Adc_Group * | group,
 |  | IfxVadc_ChannelId | channel,
 |  | IfxVadc_RequestSource | sourceType
 | ) |  |

Get conversion result based on the Request Source. (Function does not care about the alignment) value = raw * gain + offset.

Parameters
group | pointer to the VADC group
channel | channel number
sourceType | type of request source
Returns
scaled Conversion result
// create configuration
IfxVadc_Adc_Config adcConfig;
IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
// initialize module
IfxVadc_Adc vadc;
IfxVadc_Adc_initModule(&vadc, &adcConfig);
// create group config
IfxVadc_Adc_GroupConfig adcGroupConfig;
IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
// change group (default is GroupId0, change to GroupId2)
adcGroupConfig.groupId = IfxVadc_GroupId2;
adcGroupConfig.master = adcGroupConfig.groupId;
// enable gate in "always" mode (no edge detection)
adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
// enable auto scan
adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE;
adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
// initialize the group
IfxVadc_Adc_Group adcGroup;
IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig;
IfxVadc_Adc_initChannelConfig(&adcChannelConfig, &adcGroup);
// change channel (default is ChannelId0, change to ChannelId2)
adcChannelConfig.channelId = IfxVadc_ChannelId2;
// initialize the channel
IfxVadc_Adc_Channel adcChannel;
IfxVadc_Adc_initChannel(&adcChannel, &adcChannelConfig);
uint32 channels = (1 << 2); // enable channel #2
uint32 mask = (1 << 7) | (1 << 2); // modify the selection for channel #7 and #2; channel #7 will be disabled
// configure wait for read mode
IfxVadc_Adc_configureWaitForReadMode(&adcChannel, TRUE);
// configure scan
IfxVadc_Adc_setScan(&adcGroup, channels, mask);
// start the scan
IfxVadc_Adc_startScan(&adcGroup);
// wait for valid result
Ifx_VADC_RES resultChannel;
do {
resultChannel = IfxVadc_Adc_getResultBasedOnRequestSource(&adcGroup, IfxVadc_ChannelId2, IfxVadc_RequestSource_scan);
} while( !resultChannel.B.VF );

Definition at line 1256 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_initModule()

IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initModule | ( | IfxVadc_Adc * | vadc,
 |  | const IfxVadc_Adc_Config * | config
 | ) |  |

Initialise the VADC to run with the expected frequency and calibration.

Parameters
vadc | pointer to the VADC handle
config | pointer to the VADC configuration
Returns
IfxVadc_Status

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 742 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_initModuleConfig()

IFX_EXTERN void IfxVadc_Adc_initModuleConfig | ( | IfxVadc_Adc_Config * | config,
 |  | Ifx_VADC * | vadc
 | ) |  |

Initialise buffer with default VADC configuration.

Parameters
config | pointer to the VADC module configuration
vadc | pointer to the VADC
Returns
None

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 797 of file IfxVadc_Adc.c.


iLLD_TC26B: Group Functions

Functions
Group Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Group Functions:

Functions

IFX_INLINE IfxVadc_GroupId | IfxVadc_Adc_getMasterId (IfxVadc_GroupId slave, IfxVadc_Adc_SYNCTR_STSEL masterIndex)
Gets the master id. More...
IFX_INLINE IfxVadc_Adc_SYNCTR_STSEL | IfxVadc_Adc_getMasterKernelIndex (IfxVadc_GroupId slave, IfxVadc_GroupId master)
Gets the current master kernel index. More...
IFX_INLINE Ifx_VADC_G * | IfxVadc_Adc_getGroupRegsFromGroup (const IfxVadc_Adc_Group *group)
Gets the current group register set. More...
IFX_INLINE void | IfxVadc_Adc_getGroupResult (IfxVadc_Adc_Group *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group. More...
IFX_INLINE Ifx_VADC * | IfxVadc_Adc_getVadcFromGroup (const IfxVadc_Adc_Group *group)
Gets the current group module register address. More...
IFX_EXTERN void | IfxVadc_Adc_deInitGroup (IfxVadc_Adc_Group *group)
Reset the VADC group. More...
IFX_EXTERN void | IfxVadc_Adc_getGroupConfig (IfxVadc_Adc_Group *group, IfxVadc_Adc_GroupConfig *config)
Get the current group configuration (e.g. vadc frequency) More...
IFX_EXTERN IfxVadc_Status | IfxVadc_Adc_initGroup (IfxVadc_Adc_Group *group, const IfxVadc_Adc_GroupConfig *config)
Initialise the VADC group (also autoscan and queue modes) Slave Groups must initialize first. More...
IFX_EXTERN void | IfxVadc_Adc_initGroupConfig (IfxVadc_Adc_GroupConfig *config, IfxVadc_Adc *vadc)
Initialise buffer with default VADC configuration. More...

Detailed Description

Function Documentation

◆ IfxVadc_Adc_deInitGroup()

IFX_EXTERN void IfxVadc_Adc_deInitGroup ( IfxVadc_Adc_Group * group )

Reset the VADC group.

Parameters
group pointer to the VADC group
Returns
None

Example Usage :How to use the VADC ADC Interface driver?

Definition at line 127 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_getGroupConfig()

IFX_EXTERN void IfxVadc_Adc_getGroupConfig | ( | IfxVadc_Adc_Group * | group,
 |  | IfxVadc_Adc_GroupConfig * | config
 | ) |  |

Get the current group configuration (e.g. vadc frequency)

Parameters
group | pointer to the VADC group
config | pointer to the VADC group configuration
Returns
None

Example Usage :How to use the VADC ADC Interface driver?

Definition at line 233 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_getGroupRegsFromGroup()

IFX_INLINE Ifx_VADC_G * IfxVadc_Adc_getGroupRegsFromGroup ( const IfxVadc_Adc_Group * group )

Gets the current group register set.

Parameters
group Group handle data structure
Returns
Group register set

Ifx_VADC* vadc = Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0

uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2 uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled

//confiure wait for read mode for global result register IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE); IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);

// configure scan IfxVadc_setScan(group, channels, mask);

// enable auto scan IfxVadc_setAutoScan(group, TRUE);

// start the scan IfxVadc_startScan(group);

// wait for conversion to finish

// fetch the 2 results of conversion for group 0 Ifx_VADC_RES results[10]; result = IfxVadc_getGroupResult(group, results, 0, 2);

Definition at line 1218 of file IfxVadc_Adc.h.

Referenced by IfxVadc_Adc_deInitGroup(), IfxVadc_Adc_getChannelConfig(), and IfxVadc_Adc_initChannel().

◆ IfxVadc_Adc_getGroupResult()

IFX_INLINE void IfxVadc_Adc_getGroupResult | ( | IfxVadc_Adc_Group * | group,
 |  | Ifx_VADC_RES * | results,
 |  | uint32 | resultOffset,
 |  | uint32 | numResults
 | ) |  |

Get conversion result for the group.

Parameters
group | pointer to the VADC group
results | pointer to scaled conversion results
resultOffset | offset for the first result
numResults | number of results
Returns
None
// create configuration
IfxVadc_Adc_Config adcConfig;
IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
// initialize module
IfxVadc_Adc vadc;
IfxVadc_Adc_initModule(&vadc, &adcConfig);
// create group config
IfxVadc_Adc_GroupConfig adcGroupConfig;
IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
// change group (default is GroupId0, change to GroupId2)
adcGroupConfig.groupId = IfxVadc_GroupId2;
adcGroupConfig.master = adcGroupConfig.groupId;
// enable gate in "always" mode (no edge detection)
adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
// enable auto scan
adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE;
adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
// initialize the group
IfxVadc_Adc_Group adcGroup;
IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig2;
IfxVadc_Adc_initChannelConfig(&adcChannelConfig2, &adcGroup);
// change channel (default is ChannelId0, change to ChannelId2)
adcChannelConfig2.channelId = IfxVadc_ChannelId2;
// initialize the channel
IfxVadc_Adc_Channel adcChannel2;
IfxVadc_Adc_initChannel(&adcChannel2, &adcChannelConfig2);
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig5;
IfxVadc_Adc_initChannelConfig(&adcChannelConfig5, &adcGroup);
// change channel (default is ChannelId0, change to ChannelId5)
adcChannelConfig5.channelId = IfxVadc_ChannelId5;
// change channel result register (default is ChannelResult0, change to ChannelResult1)
adcChannelConfig5.resultRegister = IfxVadc_ChannelResult1;
// initialize the channel
IfxVadc_Adc_Channel adcChannel5;
IfxVadc_Adc_initChannel(&adcChannel5, &adcChannelConfig5);
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
// configure wait for read mode
IfxVadc_Adc_configureWaitForReadMode(&adcChannel2, TRUE);
IfxVadc_Adc_configureWaitForReadMode(&adcChannel5, TRUE);
// configure scan
IfxVadc_Adc_setScan(&adcGroup, channels, mask);
// start the scan
IfxVadc_Adc_startScan(&adcGroup);
// wait for conversion to finish
IfxVadc_Status scanStatus;
do
{
scanStatus = IfxVadc_Adc_getScanStatus(&adcGroup);
} while(scanStatus==IfxVadc_Status_ChannelsStillPending);
// fetch the 2 results of conversion for group 0
Ifx_VADC_RES results[10];
IfxVadc_Adc_getGroupResult(&adcGroup, results, 0, 2);

Definition at line 1224 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_getMasterId()

IFX_INLINE IfxVadc_GroupId IfxVadc_Adc_getMasterId | ( | IfxVadc_GroupId | slave,
 |  | IfxVadc_Adc_SYNCTR_STSEL | masterIndex
 | ) |  |

Gets the master id.

Parameters
slave | Index of the group
masterIndex | master kernel index
Returns
Master Group Id

Definition at line 91 of file IfxVadc_Adc.c.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_Adc_getMasterKernelIndex()

IFX_INLINE IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_getMasterKernelIndex | ( | IfxVadc_GroupId | slave,
 |  | IfxVadc_GroupId | master
 | ) |  |

Gets the current master kernel index.

Parameters
slave | Index of the group
master | Index of the group
Returns
current master kernel index

Definition at line 117 of file IfxVadc_Adc.c.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_Adc_getVadcFromGroup()

IFX_INLINE Ifx_VADC * IfxVadc_Adc_getVadcFromGroup ( const IfxVadc_Adc_Group * group )

Gets the current group module register address.

Parameters
group Group handle data structure
Returns
Group module register base address

Definition at line 1268 of file IfxVadc_Adc.h.

Referenced by IfxVadc_Adc_deInitGroup(), and IfxVadc_Adc_initChannel().

◆ IfxVadc_Adc_initGroup()

IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initGroup | ( | IfxVadc_Adc_Group * | group,
 |  | const IfxVadc_Adc_GroupConfig * | config
 | ) |  |

Initialise the VADC group (also autoscan and queue modes) Slave Groups must initialize first.

Parameters
group | pointer to the VADC group
config | pointer to the VADC group configuration
Returns
IfxVadc_Status

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 469 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_initGroupConfig()

IFX_EXTERN void IfxVadc_Adc_initGroupConfig | ( | IfxVadc_Adc_GroupConfig * | config,
 |  | IfxVadc_Adc * | vadc
 | ) |  |

Initialise buffer with default VADC configuration.

Parameters
config | pointer to the VADC group configuration
vadc | pointer to the VADC module
Returns
None

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 691 of file IfxVadc_Adc.c.


iLLD_TC26B: Channel Functions

Functions
Channel Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Channel Functions:

Functions

IFX_INLINE void | IfxVadc_Adc_configureWaitForReadMode (IfxVadc_Adc_Channel *channel, boolean waitForRead)
pointer to the VADC channel More...
IFX_INLINE Ifx_VADC_RES | IfxVadc_Adc_getResult (IfxVadc_Adc_Channel *channel)
Get conversion result (Function does not care about the alignment) More...
IFX_INLINE Ifx_VADC_RESD | IfxVadc_Adc_getDebugResult (IfxVadc_Adc_Channel *channel)
Get debug result (Function does not care about the alignment) More...
IFX_EXTERN void | IfxVadc_Adc_getChannelConfig (IfxVadc_Adc_Channel *channel, IfxVadc_Adc_ChannelConfig *config)
Get the current channel configuration (e.g. sample settings) More...
IFX_EXTERN float32 | IfxVadc_Adc_getChannelConversionTime (IfxVadc_Adc_Channel *channel, IfxVadc_ConversionType conversionMode)
get the channel Conversion Time More...
IFX_EXTERN IfxVadc_Status | IfxVadc_Adc_initChannel (IfxVadc_Adc_Channel *channel, const IfxVadc_Adc_ChannelConfig *config)
Initialise one channel with given configuration. More...
IFX_EXTERN void | IfxVadc_Adc_initChannelConfig (IfxVadc_Adc_ChannelConfig *config, const IfxVadc_Adc_Group *group)
Initialise buffer with default channel configuration. More...

Detailed Description

Function Documentation

◆ IfxVadc_Adc_configureWaitForReadMode()

IFX_INLINE void IfxVadc_Adc_configureWaitForReadMode | ( | IfxVadc_Adc_Channel * | channel,
 |  | boolean | waitForRead
 | ) |  |

pointer to the VADC channel

Parameters
channel | pointer to the VADC channel
waitForRead | wait for read mode enabled/disable
Returns
None

For coding example see: IfxVadc_Adc_getGroupResult

Definition at line 1186 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_getChannelConfig()

IFX_EXTERN void IfxVadc_Adc_getChannelConfig | ( | IfxVadc_Adc_Channel * | channel,
 |  | IfxVadc_Adc_ChannelConfig * | config
 | ) |  |

Get the current channel configuration (e.g. sample settings)

Parameters
channel | pointer to the VADC channel
config | pointer to the VADC channel configuration
Returns
None

Example Usage :How to use the VADC ADC Interface driver?

Definition at line 147 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_getChannelConversionTime()

IFX_EXTERN float32 IfxVadc_Adc_getChannelConversionTime | ( | IfxVadc_Adc_Channel * | channel,
 |  | IfxVadc_ConversionType | conversionMode
 | ) |  |

get the channel Conversion Time

Parameters
channel | Channel
conversionMode | specifies Compatible mode(Standard Conversion mode).
Returns
channel conversion time in sec

Definition at line 227 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_getDebugResult()

IFX_INLINE Ifx_VADC_RESD IfxVadc_Adc_getDebugResult ( IfxVadc_Adc_Channel * channel )

Get debug result (Function does not care about the alignment)

Parameters
channel pointer to the VADC channel.
Returns
Debug Conversion result

Definition at line 1304 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_getResult()

IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResult ( IfxVadc_Adc_Channel * channel )

Get conversion result (Function does not care about the alignment)

Parameters
channel pointer to the VADC channel
Returns
scaled Conversion result

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 1250 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_initChannel()

IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initChannel | ( | IfxVadc_Adc_Channel * | channel,
 |  | const IfxVadc_Adc_ChannelConfig * | config
 | ) |  |

Initialise one channel with given configuration.

Parameters
channel | pointer to the VADC channel
config | pointer to the VADC channel configuration
Returns
IfxVadc_Status

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 347 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_initChannelConfig()

IFX_EXTERN void IfxVadc_Adc_initChannelConfig | ( | IfxVadc_Adc_ChannelConfig * | config,
 |  | const IfxVadc_Adc_Group * | group
 | ) |  |

Initialise buffer with default channel configuration.

Parameters
config | pointer to the VADC channel configuration
group | pointer to the VADC group
Returns
None

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 441 of file IfxVadc_Adc.c.


iLLD_TC26B: Background Autoscan Functions

Functions
Background Autoscan Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Background Autoscan Functions:

Functions

IFX_INLINE void | IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister (IfxVadc_Adc *vadc, boolean waitForRead)
access function to enable/disable wait for read mode for global result register More...
IFX_INLINE IfxVadc_Status | IfxVadc_Adc_getBackgroundScanStatus (IfxVadc_Adc *vadc)
Gives the background scan status for a group. More...
IFX_INLINE Ifx_VADC_GLOBRES | IfxVadc_Adc_getGlobalResult (IfxVadc_Adc *vadc)
returns result stored in global result register More...
IFX_INLINE void | IfxVadc_Adc_setBackgroundScan (IfxVadc_Adc *vadc, IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
configures a background scan More...
IFX_INLINE void | IfxVadc_Adc_startBackgroundScan (IfxVadc_Adc *vadc)
Starts a background scan. More...

Detailed Description

Function Documentation

◆ IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister()

IFX_INLINE void IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister | ( | IfxVadc_Adc * | vadc,
 |  | boolean | waitForRead
 | ) |  |

access function to enable/disable wait for read mode for global result register

Parameters
vadc | pointer to the VADC module
waitForRead | wait for read mode enabled/disabled
Returns
None

For coding example see: IfxVadc_Adc_getGlobalResult

Definition at line 1192 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_getBackgroundScanStatus()

IFX_INLINE IfxVadc_Status IfxVadc_Adc_getBackgroundScanStatus ( IfxVadc_Adc * vadc )

Gives the background scan status for a group.

Parameters
vadc pointer to the VADC module
Returns
IfxVadc_Status

Definition at line 1206 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_getGlobalResult()

IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_Adc_getGlobalResult ( IfxVadc_Adc * vadc )

returns result stored in global result register

Parameters
vadc pointer to the VADC module
Returns
global result register
// create configuration
IfxVadc_Adc_Config adcConfig;
IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
// initialize module
IfxVadc_Adc vadc;
IfxVadc_Adc_initModule(&vadc, &adcConfig);
// create group config
IfxVadc_Adc_GroupConfig adcGroupConfig;
IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
// change group (default is GroupId_0, change to GroupId_3)
adcGroupConfig.groupId = IfxVadc_GroupId_3;
// IMPORTANT: usually we use the same group as master!
adcGroupConfig.master = adcGroupConfig.groupId;
// enable background scan
adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE;
adcGroupConfig.backgroundScanRequest.autoBackgroundScanEnabled = TRUE;
// enable gate in "always" mode (no edge detection)
adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
// initialize the group
IfxVadc_Adc_Group adcGroup;
IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig2;
IfxVadc_Adc_initChannelConfig(&adcChannelConfig2, &adcGroup);
adcChannelConfig2.backgroundChannel = TRUE;
adcChannelConfig2.globalResultUsage = TRUE;
// change channel (default is ChannelId0, change to ChannelId2)
adcChannelConfig2.channelId = IfxVadc_ChannelId2;
// initialize the channel
IfxVadc_Adc_Channel adcChannel2;
IfxVadc_Adc_initChannel(&adcChannel2, &adcChannelConfig2);
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig5;
IfxVadc_Adc_initChannelConfig(&adcChannelConfig5, &adcGroup);
adcChannelConfig5.backgroundChannel = TRUE;
adcChannelConfig5.globalResultUsage = TRUE;
// change channel (default is ChannelId0, change to ChannelId5)
adcChannelConfig5.channelId = IfxVadc_ChannelId5;
// initialize the channel
IfxVadc_Adc_Channel adcChannel5;
IfxVadc_Adc_initChannel(&adcChannel5, &adcChannelConfig5);
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
//configure wait for read mode
IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister(&vadc, TRUE);
// configure background scan
IfxVadc_Adc_setBackgroundScan(&vadc, &adcGroupConfig, channels, mask);
// start the background scan
IfxVadc_Adc_startBackgroundScan(&vadc);
// wait for valid result for channel 2
Ifx_VADC_GLOBRES resultChannel2;
do {
resultChannel2 = IfxVadc_Adc_getGlobalResult(&vadc);
} while( !resultChannel2.B.VF );
// wait for valid result for channel 5
Ifx_VADC_GLOBRES resultChannel5;
do {
resultChannel5 = IfxVadc_Adc_getGlobalResult(&vadc);
} while( !resultChannel5.B.VF );

Definition at line 1212 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_setBackgroundScan()

IFX_INLINE void IfxVadc_Adc_setBackgroundScan | ( | IfxVadc_Adc * | vadc,
 |  | IfxVadc_Adc_Group * | group,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

configures a background scan

Parameters
vadc | pointer to the VADC module
group | pointer to the VADC group
channels | specifies the channels which should be enabled/disabled
mask | specifies the channels which should be modified
Returns
None

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 1274 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_startBackgroundScan()

IFX_INLINE void IfxVadc_Adc_startBackgroundScan ( IfxVadc_Adc * vadc )

Starts a background scan.

Parameters
vadc pointer to the VADC module
Returns
None

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 1286 of file IfxVadc_Adc.h.


iLLD_TC26B: Channel Scan Functions

Functions
Channel Scan Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Channel Scan Functions:

Functions

IFX_INLINE IfxVadc_Status | IfxVadc_Adc_getScanStatus (IfxVadc_Adc_Group *group)
Gives the scan status for a group. More...
IFX_INLINE void | IfxVadc_Adc_setScan (IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
Configures an autoscan. More...
IFX_INLINE void | IfxVadc_Adc_startScan (IfxVadc_Adc_Group *group)
Starts an autoscan on the specified group. More...

Detailed Description

Function Documentation

◆ IfxVadc_Adc_getScanStatus()

IFX_INLINE IfxVadc_Status IfxVadc_Adc_getScanStatus ( IfxVadc_Adc_Group * group )

Gives the scan status for a group.

Parameters
group pointer to the VADC group
Returns
IfxVadc_Status

For coding example see: IfxVadc_Adc_getResultBasedOnRequestSource

Definition at line 1262 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_setScan()

IFX_INLINE void IfxVadc_Adc_setScan | ( | IfxVadc_Adc_Group * | group,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

Configures an autoscan.

Parameters
group | pointer to the VADC group
channels | specifies the channels which should be enabled/disabled
mask | specifies the channels which should be modified
Returns
None

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 1280 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_startScan()

IFX_INLINE void IfxVadc_Adc_startScan ( IfxVadc_Adc_Group * group )

Starts an autoscan on the specified group.

Parameters
group pointer to the VADC group
Returns
None

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 1298 of file IfxVadc_Adc.h.


iLLD_TC26B: Queue Functions

Functions
Queue Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Queue Functions:

Functions

IFX_INLINE void | IfxVadc_Adc_addToQueue (IfxVadc_Adc_Channel *channel, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill source interrupt enable/disable external trigger control. More...
IFX_INLINE void | IfxVadc_Adc_clearQueue (IfxVadc_Adc_Group *group)
Flush the contents of the queue of a group. More...
IFX_INLINE IfxVadc_Status | IfxVadc_Adc_getQueueStatus (IfxVadc_Adc_Group *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full. More...
IFX_INLINE void | IfxVadc_Adc_startQueue (IfxVadc_Adc_Group *group)
Starts a queue of a group by generating a trigger event through software. More...

Detailed Description

Function Documentation

◆ IfxVadc_Adc_addToQueue()

IFX_INLINE void IfxVadc_Adc_addToQueue | ( | IfxVadc_Adc_Channel * | channel,
 |  | uint32 | options
 | ) |  |

Add an entry to the queue of a group for the specified channel with the following options set: refill source interrupt enable/disable external trigger control.

Parameters
channel | pointer to the VADC channel
options | options for channel
Returns
None

For coding example see: IfxVadc_Adc_getResult

Definition at line 1174 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_clearQueue()

IFX_INLINE void IfxVadc_Adc_clearQueue ( IfxVadc_Adc_Group * group )

Flush the contents of the queue of a group.

Parameters
group pointer to the VADC group
Returns
None

For coding example see: IfxVadc_Adc_getResult

Definition at line 1180 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_getQueueStatus()

IFX_INLINE IfxVadc_Status IfxVadc_Adc_getQueueStatus ( IfxVadc_Adc_Group * group )

Gives the status of the Queue of a group by returning non zero value if the Queue is full.

Parameters
group pointer to the VADC group
Returns
Queue status

For coding example see: IfxVadc_Adc_getResult

Definition at line 1244 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_startQueue()

IFX_INLINE void IfxVadc_Adc_startQueue ( IfxVadc_Adc_Group * group )

Starts a queue of a group by generating a trigger event through software.

Parameters
group pointer to the VADC group
Returns
None

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 1292 of file IfxVadc_Adc.h.


iLLD_TC26B: Clock Functions

Clock Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Clock Functions:


iLLD_TC26B: Interrupt Functions

Interrupt Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Interrupt Functions:


iLLD_TC26B: Variables

Variables
Variables
iLLD » VADC » Interface Driver
Collaboration diagram for Variables:

Variables

IFX_STATIC IFX_CONST IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_masterIndex [IFXVADC_NUM_ADC_CAL_GROUPS][IFXVADC_NUM_ADC_CAL_GROUPS]

Detailed Description

Variable Documentation

◆ IfxVadc_Adc_masterIndex

IFX_STATIC IFX_CONST IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_masterIndex[IFXVADC_NUM_ADC_CAL_GROUPS][IFXVADC_NUM_ADC_CAL_GROUPS]
Initial value:
= {
{0, 1, 2, 3},
{1, 0, 2, 3},
{1, 2, 0, 3},
{1, 2, 3, 0}
}

Definition at line 77 of file IfxVadc_Adc.c.

Referenced by IfxVadc_Adc_getMasterId(), and IfxVadc_Adc_getMasterKernelIndex().


iLLD_TC26B: Emux Functions

Functions
Emux Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Emux Functions:

Functions

IFX_EXTERN void | IfxVadc_Adc_initExternalMultiplexerModeConfig (IfxVadc_Adc_EmuxControl *emuxConfig, Ifx_VADC *vadc)
initialise default configuration for external multiplexer More...
IFX_EXTERN void | IfxVadc_Adc_initExternalMultiplexerMode (Ifx_VADC *vadc, const IfxVadc_Adc_EmuxControl *emuxControl)
initalise external multiplexer. More...

Detailed Description

Function Documentation

◆ IfxVadc_Adc_initExternalMultiplexerMode()

IFX_EXTERN void IfxVadc_Adc_initExternalMultiplexerMode | ( | Ifx_VADC * | vadc,
 |  | const IfxVadc_Adc_EmuxControl * | emuxControl
 | ) |  |

initalise external multiplexer.

Parameters
vadc | Pointer to VADC Module space
emuxControl | speciifies EMUX configuration
Returns
None

Definition at line 834 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_initExternalMultiplexerModeConfig()

IFX_EXTERN void IfxVadc_Adc_initExternalMultiplexerModeConfig | ( | IfxVadc_Adc_EmuxControl * | emuxConfig,
 |  | Ifx_VADC * | vadc
 | ) |  |

initialise default configuration for external multiplexer

Parameters
emuxConfig | speciifies EMUX configuration
vadc | pointer to VADC module space
Returns
None

Definition at line 813 of file IfxVadc_Adc.c.


iLLD_TC26B: IfxVadc_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxVadc_cfg.h File Reference
iLLD » VADC

VADC on-chip implementation data. More...

#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxVadc_cfg.h:

Go to the source code of this file.

Macros

#define | IFXVADC_NUM_ADC_GROUPS (4 )
Number of ADC Groups. More...
#define | IFXVADC_NUM_ADC_CAL_GROUPS (4 )
Number of calibrated ADC Groups. More...
#define | IFXVADC_ANALOG_FREQUENCY_MAX (20000000)
Maximum allowed analog frequency. More...
#define | IFXVADC_ANALOG_FREQUENCY_MIN (500000)
Minimum allowed analog frequency. More...
#define | IFXVADC_DEFAULT_ANALOG_FREQ (20000000)
Default analog frequency used in initModuleConfig function. More...
#define | IFXVADC_NUM_REQUESTSLOTS (3)
Number of Conversion request Slots. More...
#define | IFXVADC_NUM_INPUTCLASSES (2)
Number of group specific Input Class. More...
#define | IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER (32)
Maximum number of configurable bitfields in ACCPROT0 register. More...
#define | IFXVADC_QUEUE_REFILL (1 << IFX_VADC_G_QBUR0_RF_OFF)
#define | IFXVADC_NUM_GLOBAL_INPUTCLASSES (2)
Number of ADC group input classes. More...
#define | IFXVADC_NUM_ADC_COMMON_GROUPS (2)
#define | IFXVADC_SAMPLETIME_MIN (2)
#define | IFXVADC_NUM_EMUX_INTERFACE (2)
#define | IFXVADC_NUM_MODULES (1)

Enumerations

enum IfxVadc_GroupId {
IfxVadc_GroupId_0,
IfxVadc_GroupId_1,
IfxVadc_GroupId_2,
IfxVadc_GroupId_3,
IfxVadc_GroupId_global0,
IfxVadc_GroupId_global1
}
VADC Groups
More...

Variables

IFX_EXTERN IFX_CONST uint32 IfxVadc_cfg_srcAddresses [(IFXVADC_NUM_ADC_GROUPS *4)+(IFXVADC_NUM_ADC_COMMON_GROUPS *4)]

Detailed Description

VADC on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxVadc_cfg.h.

Macro Definition Documentation

◆ IFXVADC_ANALOG_FREQUENCY_MAX

#define IFXVADC_ANALOG_FREQUENCY_MAX (20000000)

Maximum allowed analog frequency.

Definition at line 72 of file IfxVadc_cfg.h.

Referenced by IfxVadc_initializeFAdcI().

◆ IFXVADC_ANALOG_FREQUENCY_MIN

#define IFXVADC_ANALOG_FREQUENCY_MIN (500000)

Minimum allowed analog frequency.

Definition at line 76 of file IfxVadc_cfg.h.

Referenced by IfxVadc_initializeFAdcI().

◆ IFXVADC_DEFAULT_ANALOG_FREQ

#define IFXVADC_DEFAULT_ANALOG_FREQ (20000000)

Default analog frequency used in initModuleConfig function.

Definition at line 80 of file IfxVadc_cfg.h.

Referenced by IfxVadc_Adc_initModuleConfig().

◆ IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER

#define IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER (32)

Maximum number of configurable bitfields in ACCPROT0 register.

Definition at line 92 of file IfxVadc_cfg.h.

Referenced by IfxVadc_disableAccess(), and IfxVadc_enableAccess().

◆ IFXVADC_NUM_ADC_CAL_GROUPS

#define IFXVADC_NUM_ADC_CAL_GROUPS (4 )

Number of calibrated ADC Groups.

Definition at line 68 of file IfxVadc_cfg.h.

Referenced by IfxVadc_disablePostCalibration(), and IfxVadc_startupCalibration().

◆ IFXVADC_NUM_ADC_COMMON_GROUPS

#define IFXVADC_NUM_ADC_COMMON_GROUPS (2)

Definition at line 100 of file IfxVadc_cfg.h.

◆ IFXVADC_NUM_ADC_GROUPS

#define IFXVADC_NUM_ADC_GROUPS (4 )

Number of ADC Groups.

Definition at line 64 of file IfxVadc_cfg.h.

Referenced by IfxVadc_Adc_initModule(), and IfxVadc_getBackgroundScanStatus().

◆ IFXVADC_NUM_EMUX_INTERFACE

#define IFXVADC_NUM_EMUX_INTERFACE (2)

Definition at line 104 of file IfxVadc_cfg.h.

◆ IFXVADC_NUM_GLOBAL_INPUTCLASSES

#define IFXVADC_NUM_GLOBAL_INPUTCLASSES (2)

Number of ADC group input classes.

Definition at line 98 of file IfxVadc_cfg.h.

Referenced by IfxVadc_Adc_initModule().

◆ IFXVADC_NUM_INPUTCLASSES

#define IFXVADC_NUM_INPUTCLASSES (2)

Number of group specific Input Class.

Definition at line 88 of file IfxVadc_cfg.h.

Referenced by IfxVadc_Adc_getGroupConfig(), and IfxVadc_Adc_initGroup().

◆ IFXVADC_NUM_MODULES

#define IFXVADC_NUM_MODULES (1)

Definition at line 106 of file IfxVadc_cfg.h.

◆ IFXVADC_NUM_REQUESTSLOTS

#define IFXVADC_NUM_REQUESTSLOTS (3)

Number of Conversion request Slots.

Definition at line 84 of file IfxVadc_cfg.h.

◆ IFXVADC_QUEUE_REFILL

#define IFXVADC_QUEUE_REFILL (1 << IFX_VADC_G_QBUR0_RF_OFF)

Definition at line 94 of file IfxVadc_cfg.h.

◆ IFXVADC_SAMPLETIME_MIN

#define IFXVADC_SAMPLETIME_MIN (2)

Definition at line 102 of file IfxVadc_cfg.h.

Referenced by IfxVadc_getEmuxGlobalSampleTime(), IfxVadc_getEmuxGroupSampleTime(), IfxVadc_getGlobalSampleTime(), and IfxVadc_getGroupSampleTime().

Enumeration Type Documentation

◆ IfxVadc_GroupId

enum IfxVadc_GroupId

VADC Groups

Enumerator
IfxVadc_GroupId_0 | VADC group 0.
IfxVadc_GroupId_1 | VADC group 1.
IfxVadc_GroupId_2 | VADC group 2.
IfxVadc_GroupId_3 | VADC group 3.
IfxVadc_GroupId_global0 | VADC group global0.
IfxVadc_GroupId_global1 | VADC group global1.

Definition at line 116 of file IfxVadc_cfg.h.

Variable Documentation

◆ IfxVadc_cfg_srcAddresses

IFX_EXTERN IFX_CONST uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS *4)+(IFXVADC_NUM_ADC_COMMON_GROUPS *4)]

Definition at line 131 of file IfxVadc_cfg.h.


iLLD_TC26B: IfxVadc_PinMap.c File Reference

  • _PinMap
Variables
IfxVadc_PinMap.c File Reference
iLLD » VADC

VADC I/O map. More...

#include "IfxVadc_PinMap.h"
Include dependency graph for IfxVadc_PinMap.c:

Go to the source code of this file.

Variables

IfxVadc_Emux_Out | IfxVadc_EMUX00_P02_6_OUT = {&MODULE_VADC, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX00_P33_3_OUT = {&MODULE_VADC, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX01_P02_7_OUT = {&MODULE_VADC, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX01_P33_2_OUT = {&MODULE_VADC, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX02_P02_8_OUT = {&MODULE_VADC, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX02_P33_1_OUT = {&MODULE_VADC, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX10_P00_6_OUT = {&MODULE_VADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX10_P33_6_OUT = {&MODULE_VADC, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX11_P00_7_OUT = {&MODULE_VADC, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX11_P33_5_OUT = {&MODULE_VADC, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX12_P00_8_OUT = {&MODULE_VADC, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX12_P33_4_OUT = {&MODULE_VADC, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt5}
IfxVadc_GxBfl_Out | IfxVadc_G0BFL0_P33_4_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt6}
IfxVadc_GxBfl_Out | IfxVadc_G0BFL1_P33_5_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt6}
IfxVadc_GxBfl_Out | IfxVadc_G0BFL2_P33_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt6}
IfxVadc_GxBfl_Out | IfxVadc_G0BFL3_P33_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt6}
IfxVadc_GxBfl_Out | IfxVadc_G1BFL0_P33_0_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt6}
IfxVadc_GxBfl_Out | IfxVadc_G1BFL1_P33_1_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt6}
IfxVadc_GxBfl_Out | IfxVadc_G1BFL2_P33_2_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt6}
IfxVadc_GxBfl_Out | IfxVadc_G1BFL3_P33_3_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt6}
IfxVadc_GxBfl_Out | IfxVadc_G2BFL0_P00_4_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt5}
IfxVadc_GxBfl_Out | IfxVadc_G2BFL1_P00_5_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt5}
IfxVadc_GxBfl_Out | IfxVadc_G2BFL2_P00_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt3}
IfxVadc_GxBfl_Out | IfxVadc_G2BFL3_P00_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt3}
IfxVadc_GxBfl_Out | IfxVadc_G3BFL0_P10_0_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt5}
IfxVadc_GxBfl_Out | IfxVadc_G3BFL0_P10_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt7}
IfxVadc_GxBfl_Out | IfxVadc_G3BFL1_P10_1_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt5}
IfxVadc_GxBfl_Out | IfxVadc_G3BFL1_P10_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt4}
IfxVadc_GxBfl_Out | IfxVadc_G3BFL2_P10_2_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt5}
IfxVadc_GxBfl_Out | IfxVadc_G3BFL3_P10_3_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt2}
IfxVadc_Vadcg_In | IfxVadc_G0_0_AN0_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 0}, 0}
IfxVadc_Vadcg_In | IfxVadc_G0_10_AN10_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,10}, 10}
IfxVadc_Vadcg_In | IfxVadc_G0_11_AN11_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,11}, 11}
IfxVadc_Vadcg_In | IfxVadc_G0_12_AN12_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,12}, 12}
IfxVadc_Vadcg_In | IfxVadc_G0_13_AN13_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,13}, 13}
IfxVadc_Vadcg_In | IfxVadc_G0_1_AN1_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 1}, 1}
IfxVadc_Vadcg_In | IfxVadc_G0_2_AN2_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 2}, 2}
IfxVadc_Vadcg_In | IfxVadc_G0_3_AN3_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 3}, 3}
IfxVadc_Vadcg_In | IfxVadc_G0_4_AN4_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 4}, 4}
IfxVadc_Vadcg_In | IfxVadc_G0_5_AN5_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 5}, 5}
IfxVadc_Vadcg_In | IfxVadc_G0_6_AN6_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 6}, 6}
IfxVadc_Vadcg_In | IfxVadc_G0_7_AN7_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 7}, 7}
IfxVadc_Vadcg_In | IfxVadc_G0_8_AN8_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 8}, 8}
IfxVadc_Vadcg_In | IfxVadc_G1_0_AN16_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,16}, 0}
IfxVadc_Vadcg_In | IfxVadc_G1_10_AN26_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,26}, 10}
IfxVadc_Vadcg_In | IfxVadc_G1_10_P40_2_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 2}, 10}
IfxVadc_Vadcg_In | IfxVadc_G1_11_AN27_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,27}, 11}
IfxVadc_Vadcg_In | IfxVadc_G1_11_P40_3_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 3}, 11}
IfxVadc_Vadcg_In | IfxVadc_G1_12_AN28_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,28}, 12}
IfxVadc_Vadcg_In | IfxVadc_G1_13_AN29_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,29}, 13}
IfxVadc_Vadcg_In | IfxVadc_G1_1_AN17_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,17}, 1}
IfxVadc_Vadcg_In | IfxVadc_G1_2_AN18_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,18}, 2}
IfxVadc_Vadcg_In | IfxVadc_G1_3_AN19_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,19}, 3}
IfxVadc_Vadcg_In | IfxVadc_G1_4_AN20_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,20}, 4}
IfxVadc_Vadcg_In | IfxVadc_G1_5_AN21_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,21}, 5}
IfxVadc_Vadcg_In | IfxVadc_G1_8_AN24_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,24}, 8}
IfxVadc_Vadcg_In | IfxVadc_G1_8_P40_0_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 0}, 8}
IfxVadc_Vadcg_In | IfxVadc_G1_9_AN25_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,25}, 9}
IfxVadc_Vadcg_In | IfxVadc_G1_9_P40_1_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 1}, 9}
IfxVadc_Vadcg_In | IfxVadc_G2_0_AN32_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,32}, 0}
IfxVadc_Vadcg_In | IfxVadc_G2_10_AN44_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,44}, 10}
IfxVadc_Vadcg_In | IfxVadc_G2_11_AN45_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,45}, 11}
IfxVadc_Vadcg_In | IfxVadc_G2_12_AN46_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,46}, 12}
IfxVadc_Vadcg_In | IfxVadc_G2_13_AN47_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,47}, 13}
IfxVadc_Vadcg_In | IfxVadc_G2_14_AN48_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,48}, 14}
IfxVadc_Vadcg_In | IfxVadc_G2_15_AN49_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,49}, 15}
IfxVadc_Vadcg_In | IfxVadc_G2_1_AN33_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,33}, 1}
IfxVadc_Vadcg_In | IfxVadc_G2_3_AN35_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,35}, 3}
IfxVadc_Vadcg_In | IfxVadc_G2_4_AN36_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,36}, 4}
IfxVadc_Vadcg_In | IfxVadc_G2_4_P40_6_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 6}, 4}
IfxVadc_Vadcg_In | IfxVadc_G2_5_AN37_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,37}, 5}
IfxVadc_Vadcg_In | IfxVadc_G2_5_P40_7_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 7}, 5}
IfxVadc_Vadcg_In | IfxVadc_G2_6_AN38_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,38}, 6}
IfxVadc_Vadcg_In | IfxVadc_G2_6_P40_8_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 8}, 6}
IfxVadc_Vadcg_In | IfxVadc_G2_7_AN39_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,39}, 7}
IfxVadc_Vadcg_In | IfxVadc_G2_7_P40_9_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 9}, 7}
IfxVadc_Vadcg_In | IfxVadc_G3_0_P00_12_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,12}, 0}
IfxVadc_Vadcg_In | IfxVadc_G3_10_P00_2_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 2}, 10}
IfxVadc_Vadcg_In | IfxVadc_G3_11_P00_1_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 1}, 11}
IfxVadc_Vadcg_In | IfxVadc_G3_1_P00_11_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,11}, 1}
IfxVadc_Vadcg_In | IfxVadc_G3_2_P00_10_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,10}, 2}
IfxVadc_Vadcg_In | IfxVadc_G3_3_P00_9_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 9}, 3}
IfxVadc_Vadcg_In | IfxVadc_G3_4_P00_8_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 8}, 4}
IfxVadc_Vadcg_In | IfxVadc_G3_5_P00_7_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 7}, 5}
IfxVadc_Vadcg_In | IfxVadc_G3_6_P00_6_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 6}, 6}
IfxVadc_Vadcg_In | IfxVadc_G3_7_P00_5_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 5}, 7}
IfxVadc_Vadcg_In | IfxVadc_G3_8_P00_4_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 4}, 8}
IfxVadc_Vadcg_In | IfxVadc_G3_9_P00_3_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 3}, 9}
const IfxVadc_Emux_Out * | IfxVadc_Emux_Out_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
const IfxVadc_GxBfl_Out * | IfxVadc_GxBfl_Out_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]
const IfxVadc_Vadcg_In * | IfxVadc_Vadcg_In_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS]

Detailed Description

VADC I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxVadc_PinMap.c.

Variable Documentation

◆ IfxVadc_EMUX00_P02_6_OUT

IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT = {&MODULE_VADC, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt5}

Definition at line 45 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX00_P33_3_OUT

IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT = {&MODULE_VADC, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt5}

Definition at line 46 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX01_P02_7_OUT

IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT = {&MODULE_VADC, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt5}

Definition at line 47 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX01_P33_2_OUT

IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT = {&MODULE_VADC, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt5}

Definition at line 48 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX02_P02_8_OUT

IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT = {&MODULE_VADC, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt5}

Definition at line 49 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX02_P33_1_OUT

IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT = {&MODULE_VADC, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt5}

Definition at line 50 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX10_P00_6_OUT

IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT = {&MODULE_VADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt5}

Definition at line 51 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX10_P33_6_OUT

IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT = {&MODULE_VADC, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt5}

Definition at line 52 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX11_P00_7_OUT

IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT = {&MODULE_VADC, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt5}

Definition at line 53 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX11_P33_5_OUT

IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT = {&MODULE_VADC, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt5}

Definition at line 54 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX12_P00_8_OUT

IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT = {&MODULE_VADC, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt5}

Definition at line 55 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX12_P33_4_OUT

IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT = {&MODULE_VADC, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt5}

Definition at line 56 of file IfxVadc_PinMap.c.

◆ IfxVadc_Emux_Out_pinTable

const IfxVadc_Emux_Out* IfxVadc_Emux_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxVadc_EMUX10_P00_6_OUT,
&IfxVadc_EMUX11_P00_7_OUT,
&IfxVadc_EMUX12_P00_8_OUT,
&IfxVadc_EMUX00_P02_6_OUT,
&IfxVadc_EMUX01_P02_7_OUT,
&IfxVadc_EMUX02_P02_8_OUT,
&IfxVadc_EMUX02_P33_1_OUT,
&IfxVadc_EMUX01_P33_2_OUT,
&IfxVadc_EMUX00_P33_3_OUT,
&IfxVadc_EMUX12_P33_4_OUT,
&IfxVadc_EMUX11_P33_5_OUT,
&IfxVadc_EMUX10_P33_6_OUT
}
}
IfxVadc_EMUX01_P33_2_OUT
IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT
Definition: IfxVadc_PinMap.c:48
IfxVadc_EMUX12_P00_8_OUT
IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT
Definition: IfxVadc_PinMap.c:55
IfxVadc_EMUX02_P33_1_OUT
IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT
Definition: IfxVadc_PinMap.c:50
IfxVadc_EMUX00_P02_6_OUT
IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT
Definition: IfxVadc_PinMap.c:45
IfxVadc_EMUX11_P00_7_OUT
IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT
Definition: IfxVadc_PinMap.c:53
IfxVadc_EMUX12_P33_4_OUT
IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT
Definition: IfxVadc_PinMap.c:56
IfxVadc_EMUX10_P00_6_OUT
IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT
Definition: IfxVadc_PinMap.c:51
IfxVadc_EMUX01_P02_7_OUT
IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT
Definition: IfxVadc_PinMap.c:47
IfxVadc_EMUX11_P33_5_OUT
IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT
Definition: IfxVadc_PinMap.c:54
IfxVadc_EMUX10_P33_6_OUT
IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT
Definition: IfxVadc_PinMap.c:52
IfxVadc_EMUX00_P33_3_OUT
IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT
Definition: IfxVadc_PinMap.c:46
IfxVadc_EMUX02_P02_8_OUT
IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT
Definition: IfxVadc_PinMap.c:49

Definition at line 135 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_0_AN0_IN

IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 0}, 0}

Definition at line 75 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_10_AN10_IN

IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,10}, 10}

Definition at line 76 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_11_AN11_IN

IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,11}, 11}

Definition at line 77 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_12_AN12_IN

IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,12}, 12}

Definition at line 78 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_13_AN13_IN

IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,13}, 13}

Definition at line 79 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_1_AN1_IN

IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 1}, 1}

Definition at line 80 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_2_AN2_IN

IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 2}, 2}

Definition at line 81 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_3_AN3_IN

IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 3}, 3}

Definition at line 82 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_4_AN4_IN

IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 4}, 4}

Definition at line 83 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_5_AN5_IN

IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 5}, 5}

Definition at line 84 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_6_AN6_IN

IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 6}, 6}

Definition at line 85 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_7_AN7_IN

IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 7}, 7}

Definition at line 86 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_8_AN8_IN

IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 8}, 8}

Definition at line 87 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0BFL0_P33_4_OUT

IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt6}

Definition at line 57 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0BFL1_P33_5_OUT

IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt6}

Definition at line 58 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0BFL2_P33_6_OUT

IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt6}

Definition at line 59 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0BFL3_P33_7_OUT

IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt6}

Definition at line 60 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_0_AN16_IN

IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,16}, 0}

Definition at line 88 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_10_AN26_IN

IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,26}, 10}

Definition at line 89 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_10_P40_2_IN

IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 2}, 10}

Definition at line 90 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_11_AN27_IN

IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,27}, 11}

Definition at line 91 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_11_P40_3_IN

IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 3}, 11}

Definition at line 92 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_12_AN28_IN

IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,28}, 12}

Definition at line 93 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_13_AN29_IN

IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,29}, 13}

Definition at line 94 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_1_AN17_IN

IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,17}, 1}

Definition at line 95 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_2_AN18_IN

IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,18}, 2}

Definition at line 96 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_3_AN19_IN

IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,19}, 3}

Definition at line 97 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_4_AN20_IN

IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,20}, 4}

Definition at line 98 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_5_AN21_IN

IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,21}, 5}

Definition at line 99 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_8_AN24_IN

IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,24}, 8}

Definition at line 100 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_8_P40_0_IN

IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 0}, 8}

Definition at line 101 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_9_AN25_IN

IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,25}, 9}

Definition at line 102 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_9_P40_1_IN

IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 1}, 9}

Definition at line 103 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1BFL0_P33_0_OUT

IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt6}

Definition at line 61 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1BFL1_P33_1_OUT

IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt6}

Definition at line 62 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1BFL2_P33_2_OUT

IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt6}

Definition at line 63 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1BFL3_P33_3_OUT

IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt6}

Definition at line 64 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_0_AN32_IN

IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,32}, 0}

Definition at line 104 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_10_AN44_IN

IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,44}, 10}

Definition at line 105 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_11_AN45_IN

IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,45}, 11}

Definition at line 106 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_12_AN46_IN

IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,46}, 12}

Definition at line 107 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_13_AN47_IN

IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,47}, 13}

Definition at line 108 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_14_AN48_IN

IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,48}, 14}

Definition at line 109 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_15_AN49_IN

IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,49}, 15}

Definition at line 110 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_1_AN33_IN

IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,33}, 1}

Definition at line 111 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_3_AN35_IN

IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,35}, 3}

Definition at line 112 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_4_AN36_IN

IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,36}, 4}

Definition at line 113 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_4_P40_6_IN

IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 6}, 4}

Definition at line 114 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_5_AN37_IN

IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,37}, 5}

Definition at line 115 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_5_P40_7_IN

IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 7}, 5}

Definition at line 116 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_6_AN38_IN

IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,38}, 6}

Definition at line 117 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_6_P40_8_IN

IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 8}, 6}

Definition at line 118 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_7_AN39_IN

IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,39}, 7}

Definition at line 119 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_7_P40_9_IN

IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 9}, 7}

Definition at line 120 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2BFL0_P00_4_OUT

IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt5}

Definition at line 65 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2BFL1_P00_5_OUT

IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt5}

Definition at line 66 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2BFL2_P00_6_OUT

IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt3}

Definition at line 67 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2BFL3_P00_7_OUT

IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt3}

Definition at line 68 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_0_P00_12_IN

IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,12}, 0}

Definition at line 121 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_10_P00_2_IN

IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 2}, 10}

Definition at line 122 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_11_P00_1_IN

IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 1}, 11}

Definition at line 123 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_1_P00_11_IN

IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,11}, 1}

Definition at line 124 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_2_P00_10_IN

IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,10}, 2}

Definition at line 125 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_3_P00_9_IN

IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 9}, 3}

Definition at line 126 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_4_P00_8_IN

IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 8}, 4}

Definition at line 127 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_5_P00_7_IN

IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 7}, 5}

Definition at line 128 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_6_P00_6_IN

IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 6}, 6}

Definition at line 129 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_7_P00_5_IN

IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 5}, 7}

Definition at line 130 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_8_P00_4_IN

IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 4}, 8}

Definition at line 131 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_9_P00_3_IN

IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 3}, 9}

Definition at line 132 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3BFL0_P10_0_OUT

IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt5}

Definition at line 69 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3BFL0_P10_6_OUT

IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt7}

Definition at line 70 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3BFL1_P10_1_OUT

IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt5}

Definition at line 71 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3BFL1_P10_7_OUT

IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt4}

Definition at line 72 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3BFL2_P10_2_OUT

IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt5}

Definition at line 73 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3BFL3_P10_3_OUT

IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt2}

Definition at line 74 of file IfxVadc_PinMap.c.

◆ IfxVadc_GxBfl_Out_pinTable

const IfxVadc_GxBfl_Out* IfxVadc_GxBfl_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]

Definition at line 152 of file IfxVadc_PinMap.c.

◆ IfxVadc_Vadcg_In_pinTable

const IfxVadc_Vadcg_In* IfxVadc_Vadcg_In_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS]

Definition at line 189 of file IfxVadc_PinMap.c.


iLLD_TC26B: IfxVadc_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxVadc_PinMap.h File Reference
iLLD » VADC

VADC I/O map. More...

#include <IfxVadc_reg.h>
#include <_Impl/IfxVadc_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxVadc_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxVadc_GxBfl_Out
VADC Boundary Flag pin mapping structure. More...
struct | IfxVadc_Emux_Out
VADC External Mux pin mapping structure. More...
struct | IfxVadc_Vadcg_In
VADC Analog Input. More...

Macros

#define | IFXVADC_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXVADC_PINMAP_NUM_GROUPS 4
#define | IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS 12
#define | IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS 6
#define | IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS 16

Variables

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT
VADC_EMUX00: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT
VADC_EMUX00: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT
VADC_EMUX01: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT
VADC_EMUX01: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT
VADC_EMUX02: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT
VADC_EMUX02: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT
VADC_EMUX10: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT
VADC_EMUX10: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT
VADC_EMUX11: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT
VADC_EMUX11: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT
VADC_EMUX12: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT
VADC_EMUX12: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT
VADC_G0BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT
VADC_G0BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT
VADC_G0BFL2: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT
VADC_G0BFL3: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT
VADC_G1BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT
VADC_G1BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT
VADC_G1BFL2: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT
VADC_G1BFL3: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT
VADC_G2BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT
VADC_G2BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT
VADC_G2BFL2: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT
VADC_G2BFL3: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT
VADC_G3BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT
VADC_G3BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT
VADC_G3BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT
VADC_G3BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT
VADC_G3BFL2: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT
VADC_G3BFL3: VADC output. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN
VADC_G0_0: VADC input channel 0 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN
VADC_G0_10: VADC input channel 10 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN
VADC_G0_11: VADC input channel 11 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN
VADC_G0_12: VADC input channel 12 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN
VADC_G0_13: VADC input channel 13 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN
VADC_G0_1: VADC input channel 1 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN
VADC_G0_2: VADC input channel 2 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN
VADC_G0_3: VADC input channel 3 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN
VADC_G0_4: VADC input channel 4 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN
VADC_G0_5: VADC input channel 5 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN
VADC_G0_6: VADC input channel 6 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN
VADC_G0_7: VADC input channel 7 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN
VADC_G0_8: VADC input channel 8 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN
VADC_G1_0: VADC input channel 0 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN
VADC_G1_10: VADC input channel 10 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN
VADC_G1_10: VADC input channel 10 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN
VADC_G1_11: VADC input channel 11 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN
VADC_G1_11: VADC input channel 11 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN
VADC_G1_12: VADC input channel 12 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN
VADC_G1_13: VADC input channel 13 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN
VADC_G1_1: VADC input channel 1 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN
VADC_G1_2: VADC input channel 2 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN
VADC_G1_3: VADC input channel 3 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN
VADC_G1_4: VADC input channel 4 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN
VADC_G1_5: VADC input channel 5 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN
VADC_G1_8: VADC input channel 8 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN
VADC_G1_8: VADC input channel 8 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN
VADC_G1_9: VADC input channel 9of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN
VADC_G1_9: VADC input channel 9 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN
VADC_G2_0: VADC input channel 0 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN
VADC_G2_10: VADC input channel 10 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN
VADC_G2_11: VADC input channel 11 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN
VADC_G2_12: VADC input channel 12 of group 24. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN
VADC_G2_13: VADC input channel 13 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN
VADC_G2_14: VADC input channel 14 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN
VADC_G2_15: VADC input channel 15 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN
VADC_G2_1: VADC input channel 1 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN
VADC_G2_3: VADC input channel 3 of group 2 (mtm) More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN
VADC_G2_4: VADC input channel 4 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN
VADC_G2_4: VADC input channel 4 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN
VADC_G2_5: VADC input channel 5 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN
VADC_G2_5: VADC input channel 5 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN
VADC_G2_6: VADC input channel 6 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN
VADC_G2_6: VADC input channel 6 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN
VADC_G2_7: VADC input channel 7 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN
VADC_G2_7: VADC input channel 7 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN
VADC_G3_0: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN
VADC_G3_10: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN
VADC_G3_11: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN
VADC_G3_1: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN
VADC_G3_2: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN
VADC_G3_3: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN
VADC_G3_4: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN
VADC_G3_5: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN
VADC_G3_6: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN
VADC_G3_7: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN
VADC_G3_8: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN
VADC_G3_9: VADC input. More...
IFX_EXTERN const IfxVadc_Emux_Out * | IfxVadc_Emux_Out_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
IfxVadc_Emux_Out table. More...
IFX_EXTERN const IfxVadc_GxBfl_Out * | IfxVadc_GxBfl_Out_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]
IfxVadc_GxBfl_Out table. More...
IFX_EXTERN const IfxVadc_Vadcg_In * | IfxVadc_Vadcg_In_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS]
IfxVadc_Vadcg_In table. More...

Detailed Description

VADC I/O map.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxVadc_PinMap.h.


iLLD_TC26B: IfxVadc_Adc.h File Reference

  • Vadc
  • Adc
Data Structures | Typedefs | Functions
IfxVadc_Adc.h File Reference
iLLD » VADC

VADC ADC details. More...

#include "Vadc/Std/IfxVadc.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxVadc_Adc.h:

Go to the source code of this file.

Data Structures

struct | IfxVadc_Adc
VADC handle data structure. More...
struct | IfxVadc_Adc_GatingTriggerConfig
Gating/Trigger configuration structure. More...
struct | IfxVadc_Adc_ArbiterConfig
Arbiter configuration structure. More...
struct | IfxVadc_Adc_BackgroundScanConfig
Background scan mode configuration structure. More...
struct | IfxVadc_Adc_ClassConfig
Input class configuration structure. More...
struct | IfxVadc_Adc_Group
Group handle data structure. More...
struct | IfxVadc_Adc_QueueConfig
Queue configuration structure. More...
struct | IfxVadc_Adc_ScanConfig
Scan mode configuration structure. More...
struct | IfxVadc_Adc_EmuxPinConfig
struct | IfxVadc_Adc_Channel
Channel handle data structure. More...
struct | IfxVadc_Adc_ChannelConfig
Channel configuration structure. More...
struct | IfxVadc_Adc_Config
VADC module configuration structure. More...
struct | IfxVadc_Adc_EmuxControl
Emux Control Structure. More...
struct | IfxVadc_Adc_GroupConfig
Group configuration structure. More...

Typedefs

typedef uint8 IfxVadc_Adc_SYNCTR_STSEL

Functions

IFX_INLINE void | IfxVadc_Adc_deInitModule (IfxVadc_Adc *vadc)
Reset the VADC module. More...
IFX_INLINE void | IfxVadc_Adc_getModuleConfig (IfxVadc_Adc *vadc, IfxVadc_Adc_Config *config)
Get the current VADC configuration (e.g. VADC frequency) More...
IFX_INLINE Ifx_VADC_RES | IfxVadc_Adc_getResultBasedOnRequestSource (IfxVadc_Adc_Group *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result based on the Request Source. (Function does not care about the alignment) value = raw * gain + offset. More...
IFX_EXTERN void | IfxVadc_Adc_disableModule (Ifx_VADC *vadc)
Disable VADC Module. More...
IFX_EXTERN IfxVadc_Status | IfxVadc_Adc_initModule (IfxVadc_Adc *vadc, const IfxVadc_Adc_Config *config)
Initialise the VADC to run with the expected frequency and calibration. More...
IFX_EXTERN void | IfxVadc_Adc_initModuleConfig (IfxVadc_Adc_Config *config, Ifx_VADC *vadc)
Initialise buffer with default VADC configuration. More...
IFX_INLINE Ifx_VADC_G * | IfxVadc_Adc_getGroupRegsFromGroup (const IfxVadc_Adc_Group *group)
Gets the current group register set. More...
IFX_INLINE void | IfxVadc_Adc_getGroupResult (IfxVadc_Adc_Group *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group. More...
IFX_INLINE Ifx_VADC * | IfxVadc_Adc_getVadcFromGroup (const IfxVadc_Adc_Group *group)
Gets the current group module register address. More...
IFX_EXTERN void | IfxVadc_Adc_deInitGroup (IfxVadc_Adc_Group *group)
Reset the VADC group. More...
IFX_EXTERN void | IfxVadc_Adc_getGroupConfig (IfxVadc_Adc_Group *group, IfxVadc_Adc_GroupConfig *config)
Get the current group configuration (e.g. vadc frequency) More...
IFX_EXTERN IfxVadc_Status | IfxVadc_Adc_initGroup (IfxVadc_Adc_Group *group, const IfxVadc_Adc_GroupConfig *config)
Initialise the VADC group (also autoscan and queue modes) Slave Groups must initialize first. More...
IFX_EXTERN void | IfxVadc_Adc_initGroupConfig (IfxVadc_Adc_GroupConfig *config, IfxVadc_Adc *vadc)
Initialise buffer with default VADC configuration. More...
IFX_INLINE void | IfxVadc_Adc_configureWaitForReadMode (IfxVadc_Adc_Channel *channel, boolean waitForRead)
pointer to the VADC channel More...
IFX_INLINE Ifx_VADC_RES | IfxVadc_Adc_getResult (IfxVadc_Adc_Channel *channel)
Get conversion result (Function does not care about the alignment) More...
IFX_INLINE Ifx_VADC_RESD | IfxVadc_Adc_getDebugResult (IfxVadc_Adc_Channel *channel)
Get debug result (Function does not care about the alignment) More...
IFX_EXTERN void | IfxVadc_Adc_getChannelConfig (IfxVadc_Adc_Channel *channel, IfxVadc_Adc_ChannelConfig *config)
Get the current channel configuration (e.g. sample settings) More...
IFX_EXTERN float32 | IfxVadc_Adc_getChannelConversionTime (IfxVadc_Adc_Channel *channel, IfxVadc_ConversionType conversionMode)
get the channel Conversion Time More...
IFX_EXTERN IfxVadc_Status | IfxVadc_Adc_initChannel (IfxVadc_Adc_Channel *channel, const IfxVadc_Adc_ChannelConfig *config)
Initialise one channel with given configuration. More...
IFX_EXTERN void | IfxVadc_Adc_initChannelConfig (IfxVadc_Adc_ChannelConfig *config, const IfxVadc_Adc_Group *group)
Initialise buffer with default channel configuration. More...
IFX_INLINE void | IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister (IfxVadc_Adc *vadc, boolean waitForRead)
access function to enable/disable wait for read mode for global result register More...
IFX_INLINE IfxVadc_Status | IfxVadc_Adc_getBackgroundScanStatus (IfxVadc_Adc *vadc)
Gives the background scan status for a group. More...
IFX_INLINE Ifx_VADC_GLOBRES | IfxVadc_Adc_getGlobalResult (IfxVadc_Adc *vadc)
returns result stored in global result register More...
IFX_INLINE void | IfxVadc_Adc_setBackgroundScan (IfxVadc_Adc *vadc, IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
configures a background scan More...
IFX_INLINE void | IfxVadc_Adc_startBackgroundScan (IfxVadc_Adc *vadc)
Starts a background scan. More...
IFX_INLINE IfxVadc_Status | IfxVadc_Adc_getScanStatus (IfxVadc_Adc_Group *group)
Gives the scan status for a group. More...
IFX_INLINE void | IfxVadc_Adc_setScan (IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
Configures an autoscan. More...
IFX_INLINE void | IfxVadc_Adc_startScan (IfxVadc_Adc_Group *group)
Starts an autoscan on the specified group. More...
IFX_INLINE void | IfxVadc_Adc_addToQueue (IfxVadc_Adc_Channel *channel, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill source interrupt enable/disable external trigger control. More...
IFX_INLINE void | IfxVadc_Adc_clearQueue (IfxVadc_Adc_Group *group)
Flush the contents of the queue of a group. More...
IFX_INLINE IfxVadc_Status | IfxVadc_Adc_getQueueStatus (IfxVadc_Adc_Group *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full. More...
IFX_INLINE void | IfxVadc_Adc_startQueue (IfxVadc_Adc_Group *group)
Starts a queue of a group by generating a trigger event through software. More...
IFX_EXTERN void | IfxVadc_Adc_initExternalMultiplexerModeConfig (IfxVadc_Adc_EmuxControl *emuxConfig, Ifx_VADC *vadc)
initialise default configuration for external multiplexer More...
IFX_EXTERN void | IfxVadc_Adc_initExternalMultiplexerMode (Ifx_VADC *vadc, const IfxVadc_Adc_EmuxControl *emuxControl)
initalise external multiplexer. More...

Detailed Description

VADC ADC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxVadc_Adc.h.

Data Structure Documentation

◆ IfxVadc_Adc_EmuxPinConfig

struct IfxVadc_Adc_EmuxPinConfig

Definition at line 455 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_EmuxPinConfig:
[legend]
Data Fields
IfxPort_OutputMode | outputMode | the pin output mode which should be configured
IfxPort_PadDriver | padDriver | Pad driver.
IfxVadc_Emux_Out * | pins[3] | Emux Pins configuration.

Typedef Documentation

◆ IfxVadc_Adc_SYNCTR_STSEL

typedef uint8 IfxVadc_Adc_SYNCTR_STSEL

Definition at line 367 of file IfxVadc_Adc.h.


iLLD_TC26B: IfxVadc.h File Reference

  • Vadc
  • Std
Enumerations | Functions
IfxVadc.h File Reference
iLLD » VADC

VADC basic functionality. More...

#include "_Impl/IfxVadc_cfg.h"
#include "_PinMap/IfxVadc_PinMap.h"
#include "IfxVadc_bf.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Scu/Std/IfxScuWdt.h"
#include "IfxCcu6_reg.h"
#include "IfxCcu6_bf.h"
Include dependency graph for IfxVadc.h:

Go to the source code of this file.

Enumerations

enum IfxVadc_AnalogConverterMode {
IfxVadc_AnalogConverterMode_off = 0,
IfxVadc_AnalogConverterMode_slowStandby = 1,
IfxVadc_AnalogConverterMode_fastStandby = 2,
IfxVadc_AnalogConverterMode_normalOperation = 3
}
Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC. More...
enum IfxVadc_ArbitrationRounds {
IfxVadc_ArbitrationRounds_4_slots = 0,
IfxVadc_ArbitrationRounds_8_slots = 1,
IfxVadc_ArbitrationRounds_16_slots = 2,
IfxVadc_ArbitrationRounds_20_slots = 3
}
Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11) More...
enum IfxVadc_BoundaryExtension {
IfxVadc_BoundaryExtension_standard = 0,
IfxVadc_BoundaryExtension_fastCompareResult1 = 1,
IfxVadc_BoundaryExtension_fastCompareResult2 = 2,
IfxVadc_BoundaryExtension_fastCompareResult3 = 3,
IfxVadc_BoundaryExtension_fastCompareResult4 = 4,
IfxVadc_BoundaryExtension_fastCompareResult5 = 5,
IfxVadc_BoundaryExtension_fastCompareResult6 = 6,
IfxVadc_BoundaryExtension_fastCompareResult7 = 7,
IfxVadc_BoundaryExtension_fastCompareResult8 = 8,
IfxVadc_BoundaryExtension_fastCompareResult9 = 9,
IfxVadc_BoundaryExtension_fastCompareResult10 = 10,
IfxVadc_BoundaryExtension_fastCompareResult11 = 11,
IfxVadc_BoundaryExtension_fastCompareResult12 = 12,
IfxVadc_BoundaryExtension_fastCompareResult13 = 13,
IfxVadc_BoundaryExtension_fastCompareResult14 = 14,
IfxVadc_BoundaryExtension_fastCompareResult15 = 15
}
Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_BoundarySelection {
IfxVadc_BoundarySelection_group0 = 0,
IfxVadc_BoundarySelection_group1 = 1,
IfxVadc_BoundarySelection_global0 = 2,
IfxVadc_BoundarySelection_global1 = 3
}
BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_ChannelId {
IfxVadc_ChannelId_none = -1,
IfxVadc_ChannelId_0 = 0,
IfxVadc_ChannelId_1 = 1,
IfxVadc_ChannelId_2 = 2,
IfxVadc_ChannelId_3 = 3,
IfxVadc_ChannelId_4 = 4,
IfxVadc_ChannelId_5 = 5,
IfxVadc_ChannelId_6 = 6,
IfxVadc_ChannelId_7 = 7,
IfxVadc_ChannelId_8 = 8,
IfxVadc_ChannelId_9 = 9,
IfxVadc_ChannelId_10 = 10,
IfxVadc_ChannelId_11 = 11,
IfxVadc_ChannelId_12 = 12,
IfxVadc_ChannelId_13 = 13,
IfxVadc_ChannelId_14 = 14,
IfxVadc_ChannelId_15 = 15
}
VADC Channels. More...
enum IfxVadc_ChannelReference {
IfxVadc_ChannelReference_standard = 0,
IfxVadc_ChannelReference_channel0 = 1
}
ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_ChannelResolution {
IfxVadc_ChannelResolution_12bit = 0,
IfxVadc_ChannelResolution_10bit = 1,
IfxVadc_ChannelResolution_8bit = 2,
IfxVadc_ChannelResolution_10bitFast = 5
}
ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1) More...
enum IfxVadc_ChannelResult {
IfxVadc_ChannelResult_0 = 0,
IfxVadc_ChannelResult_1,
IfxVadc_ChannelResult_2,
IfxVadc_ChannelResult_3,
IfxVadc_ChannelResult_4,
IfxVadc_ChannelResult_5,
IfxVadc_ChannelResult_6,
IfxVadc_ChannelResult_7,
IfxVadc_ChannelResult_8,
IfxVadc_ChannelResult_9,
IfxVadc_ChannelResult_10,
IfxVadc_ChannelResult_11,
IfxVadc_ChannelResult_12,
IfxVadc_ChannelResult_13,
IfxVadc_ChannelResult_14,
IfxVadc_ChannelResult_15
}
Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_ChannelSelectionStyle {
IfxVadc_ChannelSelectionStyle_channelNumber = 0,
IfxVadc_ChannelSelectionStyle_binary = 1
}
External Multiplexer Channel Selection Style as defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCSS. More...
enum IfxVadc_ConversionType { IfxVadc_ConversionType_Compatible = 0 }
type of conversion More...
enum IfxVadc_EmuxCodingScheme {
IfxVadc_EmuxCodingScheme_binary = 0,
IfxVadc_EmuxCodingScheme_gray = 1
}
Specifies the External Coding scheme(binary/gray) defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD. More...
enum IfxVadc_EmuxInterface {
IfxVadc_EmuxInterface_0 = 0,
IfxVadc_EmuxInterface_1 = 1
}
Specifies the Emux interface. More...
enum IfxVadc_EmuxSampleTimeControl {
IfxVadc_EmuxSampleTimeControl_settingChanges = 0,
IfxVadc_EmuxSampleTimeControl_always = 1
}
External Multiplexer sample time control defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST. More...
enum IfxVadc_EmuxSelectValue {
IfxVadc_EmuxSelectValue_0 = 0,
IfxVadc_EmuxSelectValue_1,
IfxVadc_EmuxSelectValue_2,
IfxVadc_EmuxSelectValue_3,
IfxVadc_EmuxSelectValue_4,
IfxVadc_EmuxSelectValue_5,
IfxVadc_EmuxSelectValue_6,
IfxVadc_EmuxSelectValue_7
}
specifies the External Channel Start select value defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET More...
enum IfxVadc_ExternalMultiplexerMode {
IfxVadc_ExternalMultiplexerMode_softwareControl = 0,
IfxVadc_ExternalMultiplexerMode_steady = 1,
IfxVadc_ExternalMultiplexerMode_singleStep = 2,
IfxVadc_ExternalMultiplexerMode_sequence = 3
}
Specifies External Multiplexer Mode define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE. More...
enum IfxVadc_FifoMode {
IfxVadc_FifoMode_seperateResultRegister = 0,
IfxVadc_FifoMode_fifoStructure = 1,
IfxVadc_FifoMode_maximumMode = 2,
IfxVadc_FifoMode_minimumMode = 3
}
FIFO mode enable. More...
enum IfxVadc_GatingMode {
IfxVadc_GatingMode_disabled = 0,
IfxVadc_GatingMode_always = 1,
IfxVadc_GatingMode_gatingHigh = 2,
IfxVadc_GatingMode_gatingLow = 3
}
gating mode defined in MODULE_VADC.BRSMR.ENGT More...
enum IfxVadc_GatingSource {
IfxVadc_GatingSource_0 = 0,
IfxVadc_GatingSource_1,
IfxVadc_GatingSource_2,
IfxVadc_GatingSource_3,
IfxVadc_GatingSource_4,
IfxVadc_GatingSource_5,
IfxVadc_GatingSource_6,
IfxVadc_GatingSource_7,
IfxVadc_GatingSource_8,
IfxVadc_GatingSource_9,
IfxVadc_GatingSource_10,
IfxVadc_GatingSource_11,
IfxVadc_GatingSource_12,
IfxVadc_GatingSource_13,
IfxVadc_GatingSource_14,
IfxVadc_GatingSource_15
}
External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7) More...
enum IfxVadc_InputClasses {
IfxVadc_InputClasses_group0 = 0,
IfxVadc_InputClasses_group1 = 1,
IfxVadc_InputClasses_global0 = 2,
IfxVadc_InputClasses_global1 = 3
}
inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_LimitCheck {
IfxVadc_LimitCheck_noCheck = 0,
IfxVadc_LimitCheck_eventIfInArea = 1,
IfxVadc_LimitCheck_eventIfOutsideArea = 2,
IfxVadc_LimitCheck_always = 3
}
ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_LowSupplyVoltageSelect {
IfxVadc_LowSupplyVoltageSelect_5V = 0,
IfxVadc_LowSupplyVoltageSelect_3V = 1
}
Low Power Supply Voltage Select. More...
enum IfxVadc_Protection {
IfxVadc_Protection_channelControl0 = 0,
IfxVadc_Protection_channelControl1 = 1,
IfxVadc_Protection_channelControl2 = 2,
IfxVadc_Protection_channelControl3 = 3,
IfxVadc_Protection_channelControl4 = 4,
IfxVadc_Protection_channelControl5 = 5,
IfxVadc_Protection_channelControl6 = 6,
IfxVadc_Protection_channelControl7 = 7,
IfxVadc_Protection_channelControl8 = 8,
IfxVadc_Protection_channelControl9 = 9,
IfxVadc_Protection_channelControl10 = 10,
IfxVadc_Protection_channelControl11 = 11,
IfxVadc_Protection_channelControl12 = 12,
IfxVadc_Protection_channelControl13 = 13,
IfxVadc_Protection_channelControl14 = 14,
IfxVadc_Protection_externalMultiplexer = 15,
IfxVadc_Protection_initGroup0 = 16,
IfxVadc_Protection_initGroup1 = 17,
IfxVadc_Protection_initGroup2 = 18,
IfxVadc_Protection_initGroup3 = 19,
IfxVadc_Protection_initGroup4 = 20,
IfxVadc_Protection_initGroup5 = 21,
IfxVadc_Protection_initGroup6 = 22,
IfxVadc_Protection_initGroup7 = 23,
IfxVadc_Protection_initGroup8 = 24,
IfxVadc_Protection_initGroup9 = 25,
IfxVadc_Protection_initGroup10 = 26,
IfxVadc_Protection_initGroup11 = 27,
IfxVadc_Protection_initGroup12 = 28,
IfxVadc_Protection_initGroup13 = 29,
IfxVadc_Protection_initGroup14 = 30,
IfxVadc_Protection_globalConfig = 31,
IfxVadc_Protection_serviceGroup0 = 32,
IfxVadc_Protection_serviceGroup1 = 33,
IfxVadc_Protection_serviceGroup2 = 34,
IfxVadc_Protection_serviceGroup3 = 35,
IfxVadc_Protection_serviceGroup4 = 36,
IfxVadc_Protection_serviceGroup5 = 37,
IfxVadc_Protection_serviceGroup6 = 38,
IfxVadc_Protection_serviceGroup7 = 39,
IfxVadc_Protection_serviceGroup8 = 40,
IfxVadc_Protection_serviceGroup9 = 41,
IfxVadc_Protection_serviceGroup10 = 42,
IfxVadc_Protection_serviceGroup11 = 43,
IfxVadc_Protection_serviceGroup12 = 44,
IfxVadc_Protection_serviceGroup13 = 45,
IfxVadc_Protection_serviceGroup14 = 46,
IfxVadc_Protection_testFunction = 47,
IfxVadc_Protection_resultRegisterGroup0 = 48,
IfxVadc_Protection_resultRegisterGroup1 = 49,
IfxVadc_Protection_resultRegisterGroup2 = 50,
IfxVadc_Protection_resultRegisterGroup3 = 51,
IfxVadc_Protection_resultRegisterGroup4 = 52,
IfxVadc_Protection_resultRegisterGroup5 = 53,
IfxVadc_Protection_resultRegisterGroup6 = 54,
IfxVadc_Protection_resultRegisterGroup7 = 55,
IfxVadc_Protection_resultRegisterGroup8 = 56,
IfxVadc_Protection_resultRegisterGroup9 = 57,
IfxVadc_Protection_resultRegisterGroup10 = 58,
IfxVadc_Protection_resultRegisterGroup11 = 59,
IfxVadc_Protection_resultRegisterGroup12 = 60,
IfxVadc_Protection_resultRegisterGroup13 = 61,
IfxVadc_Protection_resultRegisterGroup14 = 62
}
Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U. More...
enum IfxVadc_RequestSlotPriority {
IfxVadc_RequestSlotPriority_lowest = 0,
IfxVadc_RequestSlotPriority_low = 1,
IfxVadc_RequestSlotPriority_high = 2,
IfxVadc_RequestSlotPriority_highest = 3
}
Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2) More...
enum IfxVadc_RequestSlotStartMode {
IfxVadc_RequestSlotStartMode_waitForStart = 0,
IfxVadc_RequestSlotStartMode_cancelInjectRepeat = 1
}
Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2) More...
enum IfxVadc_RequestSource {
IfxVadc_RequestSource_queue = 0,
IfxVadc_RequestSource_scan = 1,
IfxVadc_RequestSource_background = 2
}
Request sources. More...
enum IfxVadc_SleepMode {
IfxVadc_SleepMode_enable = 0,
IfxVadc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_VADC.CLC.B.EDIS. More...
enum IfxVadc_SrcNr {
IfxVadc_SrcNr_group0 = 0,
IfxVadc_SrcNr_group1 = 1,
IfxVadc_SrcNr_group2 = 2,
IfxVadc_SrcNr_group3 = 3,
IfxVadc_SrcNr_shared0 = 4,
IfxVadc_SrcNr_shared1 = 5,
IfxVadc_SrcNr_shared2 = 6,
IfxVadc_SrcNr_shared3 = 7
}
Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11) More...
enum IfxVadc_Status {
IfxVadc_Status_noError = 0,
IfxVadc_Status_notInitialised = 1,
IfxVadc_Status_invalidGroup = 2,
IfxVadc_Status_invalidChannel = 3,
IfxVadc_Status_queueFull = 4,
IfxVadc_Status_noAccess = 5,
IfxVadc_Status_channelsStillPending = 6
}
API return values defined in MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U MODULE_VADC.BRSPNDx More...
enum IfxVadc_TriggerMode {
IfxVadc_TriggerMode_noExternalTrigger = 0,
IfxVadc_TriggerMode_uponFallingEdge = 1,
IfxVadc_TriggerMode_uponRisingEdge = 2,
IfxVadc_TriggerMode_uponAnyEdge = 3
}
trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11) More...
enum IfxVadc_TriggerSource {
IfxVadc_TriggerSource_0 = 0,
IfxVadc_TriggerSource_1,
IfxVadc_TriggerSource_2,
IfxVadc_TriggerSource_3,
IfxVadc_TriggerSource_4,
IfxVadc_TriggerSource_5,
IfxVadc_TriggerSource_6,
IfxVadc_TriggerSource_7,
IfxVadc_TriggerSource_8,
IfxVadc_TriggerSource_9,
IfxVadc_TriggerSource_10,
IfxVadc_TriggerSource_11,
IfxVadc_TriggerSource_12,
IfxVadc_TriggerSource_13,
IfxVadc_TriggerSource_14,
IfxVadc_TriggerSource_15
}
Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7) More...

Functions

IFX_INLINE void | IfxVadc_configureWaitForReadMode (Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
access function to enable/disable wait for read mode for result registers More...
IFX_INLINE void | IfxVadc_configureWaitForReadModeForGlobalResultRegister (Ifx_VADC *vadc, boolean waitForRead)
access function to enable/disable wait for read mode for global result register More...
IFX_INLINE void | IfxVadc_enableBackgroundScanSlotExternalTrigger (Ifx_VADC *vadc)
Enables the background sacn external trigger. More...
IFX_INLINE IfxVadc_GatingMode | IfxVadc_getBackgroundScanGatingMode (Ifx_VADC *vadc)
Gets the background scan gating mode. More...
IFX_INLINE IfxVadc_GatingSource | IfxVadc_getBackgroundScanGatingSource (Ifx_VADC *vadc)
Gets the gating input selection. More...
IFX_INLINE IfxVadc_RequestSlotPriority | IfxVadc_getBackgroundScanSlotPriority (Ifx_VADC_G *vadcG)
Gets the requested background scan slot priority. More...
IFX_INLINE IfxVadc_RequestSlotStartMode | IfxVadc_getBackgroundScanSlotStartMode (Ifx_VADC_G *vadcG)
Gets the requested background scan slot start mode. More...
IFX_INLINE IfxVadc_TriggerSource | IfxVadc_getBackgroundScanTriggerInput (Ifx_VADC *vadc)
Gets the background scan trigger input. More...
IFX_INLINE IfxVadc_TriggerMode | IfxVadc_getBackgroundScanTriggerMode (Ifx_VADC *vadc)
Gets the background scan external trigger mode. More...
IFX_INLINE IfxVadc_ChannelResolution | IfxVadc_getGlobalResolution (Ifx_VADC *vadc, uint8 inputClassNum)
get global input class resolution More...
IFX_INLINE Ifx_VADC_GLOBRES | IfxVadc_getGlobalResult (Ifx_VADC *vadc)
return conversion result stored in the Global result Register More...
IFX_INLINE float32 | IfxVadc_getGlobalSampleTime (Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
get global input class sample time in sec More...
IFX_INLINE void | IfxVadc_getGroupResult (Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group. More...
IFX_INLINE Ifx_VADC_RES | IfxVadc_getResult (Ifx_VADC_G *group, uint32 resultIdx)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset. More...
IFX_INLINE boolean | IfxVadc_isAutoBackgroundScanEnabled (Ifx_VADC *vadc)
Returns the auto background scan status. More...
IFX_INLINE boolean | IfxVadc_isRequestBackgroundScanSlotEnabled (Ifx_VADC_G *vadcG)
Returns the background scan slot requested status. More...
IFX_INLINE void | IfxVadc_setAutoBackgroundScan (Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
Enables/Disables continuous background auto scan. More...
IFX_INLINE void | IfxVadc_setBackgroundScan (Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
configures a background scan; can also stop autoscan if all channels are 0 More...
IFX_INLINE void | IfxVadc_setBackgroundScanSlotGatingConfig (Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the background scan slot gating configurations. More...
IFX_INLINE void | IfxVadc_setBackgroundScanSlotTriggerConfig (Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the background scan exteranal trigger operating configurations. More...
IFX_INLINE void | IfxVadc_startBackgroundScan (Ifx_VADC *vadc)
Starts a background scan. More...
IFX_INLINE Ifx_VADC_RESD | IfxVadc_getDebugResult (Ifx_VADC_G *group, uint32 resultIdx)
Get debug conversion result. More...
IFX_EXTERN IfxVadc_Status | IfxVadc_getBackgroundScanStatus (Ifx_VADC *vadc)
Gives the background scan status for a group. More...
IFX_EXTERN Ifx_VADC_RES | IfxVadc_getResultBasedOnRequestSource (Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset. More...
IFX_INLINE void | IfxVadc_disableScanSlotExternalTrigger (Ifx_VADC_G *vadcG)
Disables the scan slot external trigger. More...
IFX_INLINE void | IfxVadc_enableScanSlotExternalTrigger (Ifx_VADC_G *vadcG)
Enables the scan slot external trigger. More...
IFX_INLINE IfxVadc_GatingMode | IfxVadc_getScanSlotGatingMode (Ifx_VADC_G *vadcG)
Gets the request scan slot gating mode. More...
IFX_INLINE IfxVadc_GatingSource | IfxVadc_getScanSlotGatingSource (Ifx_VADC_G *vadcG)
Gets the request scan slot gating input. More...
IFX_INLINE IfxVadc_RequestSlotPriority | IfxVadc_getScanSlotPriority (Ifx_VADC_G *vadcG)
Gets the request scan slot priority. More...
IFX_INLINE IfxVadc_RequestSlotStartMode | IfxVadc_getScanSlotStartMode (Ifx_VADC_G *vadcG)
Gets the request scan slot start mode. More...
IFX_INLINE IfxVadc_TriggerSource | IfxVadc_getScanSlotTriggerInput (Ifx_VADC_G *vadcG)
Gets the requested scan slot trigger input. More...
IFX_INLINE IfxVadc_TriggerMode | IfxVadc_getScanSlotTriggerMode (Ifx_VADC_G *vadcG)
Gets the requested scan slot trigger mode. More...
IFX_INLINE boolean | IfxVadc_isAutoScanEnabled (Ifx_VADC_G *vadcG)
Gets the auto scan enable status. More...
IFX_INLINE boolean | IfxVadc_isRequestScanSlotEnabled (Ifx_VADC_G *vadcG)
Returns the scan slot requested status. More...
IFX_INLINE void | IfxVadc_setAutoScan (Ifx_VADC_G *vadcG, boolean autoscanEnable)
Enables/Disables continuous auto scan. More...
IFX_INLINE void | IfxVadc_setScanSlotGatingConfig (Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the scan slot gating configuration. More...
IFX_INLINE void | IfxVadc_setScanSlotTriggerConfig (Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the scan slot trigger operating configurations. More...
IFX_INLINE void | IfxVadc_startScan (Ifx_VADC_G *group)
Starts an autoscan on the specified group. More...
IFX_EXTERN IfxVadc_Status | IfxVadc_getScanStatus (Ifx_VADC_G *group)
Gives the scan status for a group. More...
IFX_EXTERN void | IfxVadc_setScan (Ifx_VADC_G *group, uint32 channels, uint32 mask)
Configures an (auto-)scan. More...
IFX_INLINE void | IfxVadc_addToQueue (Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill incase of aborted conversion source interrupt enable/disable external trigger control of the aborted conversion. More...
IFX_INLINE void | IfxVadc_clearQueue (Ifx_VADC_G *vadcG, boolean flushQueue)
Clears all the queue entries including backup stage. More...
IFX_INLINE void | IfxVadc_disableQueueSlotExternalTrigger (Ifx_VADC_G *vadcG)
Disables the external trigger. More...
IFX_INLINE void | IfxVadc_enableQueueSlotExternalTrigger (Ifx_VADC_G *vadcG)
Enables the external trigger. More...
IFX_INLINE IfxVadc_GatingMode | IfxVadc_getQueueSlotGatingMode (Ifx_VADC_G *vadcG)
Gets the requested queue slot gating mode. More...
IFX_INLINE IfxVadc_GatingSource | IfxVadc_getQueueSlotGatingSource (Ifx_VADC_G *vadcG)
Gets the requested queue slot gating input. More...
IFX_INLINE IfxVadc_RequestSlotPriority | IfxVadc_getQueueSlotPriority (Ifx_VADC_G *vadcG)
Gets the request queue slot priority. More...
IFX_INLINE IfxVadc_RequestSlotStartMode | IfxVadc_getQueueSlotStartMode (Ifx_VADC_G *vadcG)
Gets the requested queue slot start mode. More...
IFX_INLINE IfxVadc_TriggerSource | IfxVadc_getQueueSlotTriggerInput (Ifx_VADC_G *vadcG)
Gets the requested queue slot trigger input. More...
IFX_INLINE IfxVadc_TriggerMode | IfxVadc_getQueueSlotTriggerMode (Ifx_VADC_G *vadcG)
Gets the requested queue slot trigger mode. More...
IFX_INLINE boolean | IfxVadc_isRequestQueueSlotEnabled (Ifx_VADC_G *vadcG)
Returns the queue slot requested status. More...
IFX_INLINE void | IfxVadc_setQueueSlotGatingConfig (Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the gating configurations. More...
IFX_INLINE void | IfxVadc_setQueueSlotTriggerOperatingConfig (Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the trigger operating configurations. More...
IFX_INLINE void | IfxVadc_startQueue (Ifx_VADC_G *group)
Starts a queue of a group by generating a trigger event through software. More...
IFX_EXTERN IfxVadc_Status | IfxVadc_getQueueStatus (Ifx_VADC_G *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full. More...
IFX_INLINE void | IfxVadc_initEmuxPin (const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a EMUX output. More...
IFX_INLINE void | IfxVadc_initGxBflPin (const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a GxBFL output. More...
IFX_INLINE uint32 | IfxVadc_calculateSampleTime (float32 analogFrequency, float32 sampleTime)
Calculate the time using analog frequency. More...
IFX_EXTERN float32 | IfxVadc_getAdcAnalogFrequency (Ifx_VADC *vadc)
Returns the configured Fadci VADC analog clock frequency in Hz. More...
IFX_EXTERN float32 | IfxVadc_getAdcDigitalFrequency (Ifx_VADC *vadc)
Returns the configured Fadcd VADC digital clock frequency in Hz. More...
IFX_INLINE void | IfxVadc_clearAllResultRequests (Ifx_VADC_G *vadcG)
Clears the all group requests. More...
IFX_INLINE IfxVadc_ArbitrationRounds | IfxVadc_getArbiterRoundLength (Ifx_VADC_G *vadcG)
Gets the ADC group arbitration round length. More...
IFX_INLINE Ifx_VADC_G_REVNP0 | IfxVadc_getChannelResultServiceRequestNodePointer0 (Ifx_VADC_G *vadcG)
Gets the channel esult service request node pointer 0. More...
IFX_INLINE Ifx_VADC_G_REVNP1 | IfxVadc_getChannelResultServiceRequestNodePointer1 (Ifx_VADC_G *vadcG)
Gets the channel esult service request node pointer 1. More...
IFX_INLINE Ifx_VADC_G_CEVNP0 | IfxVadc_getChannelServiceRequestNodePointer0 (Ifx_VADC_G *vadcG)
Gets the channel service request node pointer. More...
IFX_INLINE uint8 | IfxVadc_getMasterIndex (Ifx_VADC_G *vadcG)
Gets the configured master index. More...
IFX_INLINE void | IfxVadc_resetGroup (Ifx_VADC_G *vadcG)
Resets the ADC group. More...
IFX_INLINE void | IfxVadc_setAnalogConvertControl (Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
Sets analog converter group number. More...
IFX_INLINE void | IfxVadc_setArbitrationRoundLength (Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength)
Sets the arbiter round length. More...
IFX_INLINE void | IfxVadc_setGroupResolution (Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
Sets the ADC input class channel resolution. More...
IFX_INLINE void | IfxVadc_setGroupSampleTime (Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time. More...
IFX_INLINE void | IfxVadc_setMasterIndex (Ifx_VADC_G *vadcG, uint8 masterIndex)
Sets the master index. More...
IFX_EXTERN void | IfxVadc_setArbiterPriority (Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot)
Sets the Arbiter slot configurations. More...
IFX_INLINE void | IfxVadc_disableModule (Ifx_VADC *vadc)
Disable VADC Module. More...
IFX_INLINE void | IfxVadc_enableModule (Ifx_VADC *vadc)
Enable VADC kernel. More...
IFX_INLINE uint8 | IfxVadc_getAdcCalibrationActiveState (Ifx_VADC *vadc, uint8 adcCalGroupNum)
gets ADC Calibration Flag CAL status. More...
IFX_INLINE Ifx_VADC_GLOBCFG | IfxVadc_getGlobalConfigValue (Ifx_VADC *vadc)
Gets the global control configuration value. More...
IFX_INLINE boolean | IfxVadc_getStartupCalibration (Ifx_VADC *vadc)
get SUCAL bit field status More...
IFX_INLINE void | IfxVadc_initiateStartupCalibration (Ifx_VADC *vadc)
initiates the calibration pulse phase. More...
IFX_INLINE void | IfxVadc_setGlobalResolution (Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
Sets the channel conversion mode. More...
IFX_INLINE void | IfxVadc_setGlobalSampleTime (Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time of ADC global class. More...
IFX_INLINE void | IfxVadc_setSleepMode (Ifx_VADC *vadc, IfxVadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN void | IfxVadc_disableAccess (Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Disable write access to the VADC config/control registers. More...
IFX_EXTERN void | IfxVadc_disablePostCalibration (Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable)
Disables the post calibration. More...
IFX_EXTERN void | IfxVadc_enableAccess (Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Enable write access to the VADC config/control registers. More...
IFX_EXTERN void | IfxVadc_enableGroupSync (Ifx_VADC *vadc, uint32 ccu6Num)
Enables the CCU6 based ADC group synchronisation as workaround for Erratum ADC_TC.068. More...
IFX_EXTERN float32 | IfxVadc_getAdcModuleFrequency (void)
Module Frequency in Hz. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxVadc_getSrcAddress (IfxVadc_GroupId group, IfxVadc_SrcNr index)
Gives the SRC source address. More...
IFX_EXTERN void | IfxVadc_initialiseAdcArbiterClock (Ifx_VADC *vadc, uint32 arbiterClockDivider)
Initialises ADC arbiter clock. More...
IFX_EXTERN void | IfxVadc_initialiseAdcConverterClock (Ifx_VADC *vadc, uint32 converterClockDivider)
Initialises the ADC Converter clock. More...
IFX_EXTERN uint32 | IfxVadc_initializeFAdcD (Ifx_VADC *vadc, uint32 fAdcD)
Configure the FadcD vadc digital clock. More...
IFX_EXTERN uint32 | IfxVadc_initializeFAdcI (Ifx_VADC *vadc, uint32 fAdcI)
Configure the ADC analog clock. More...
IFX_EXTERN boolean | IfxVadc_isPostCalibration (Ifx_VADC *vadc, IfxVadc_GroupId group)
Return the post calibration status. More...
IFX_EXTERN void | IfxVadc_resetKernel (Ifx_VADC *vadc)
Resets the kernel. More...
IFX_EXTERN void | IfxVadc_selectPowerSupplyVoltage (Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage)
Select Low Power Supply Voltage. More...
IFX_EXTERN void | IfxVadc_startupCalibration (Ifx_VADC *vadc)
Starts ADC calibration and wait for the end of the calibration process. More...
IFX_INLINE void | IfxVadc_clearChannelRequest (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId)
Clears the channel request. More...
IFX_INLINE void | IfxVadc_enableFifoMode (Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode)
Enables the FIFO mode. More...
IFX_INLINE void | IfxVadc_enableServiceRequest (Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
IFX_INLINE Ifx_VADC_G_CHASS | IfxVadc_getAssignedChannels (Ifx_VADC_G *vadcG)
Gets the group's assigned channels. More...
IFX_INLINE Ifx_VADC_CHCTR | IfxVadc_getChannelControlConfig (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Gets the current ADC channel control configurations. More...
IFX_INLINE IfxVadc_InputClasses | IfxVadc_getChannelInputClass (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Gets the channel input class. More...
IFX_INLINE IfxVadc_ChannelResolution | IfxVadc_getGroupResolution (Ifx_VADC_G *vadcG, uint8 inputClassNum)
Gets the ADC input class channel resolution. More...
IFX_INLINE float32 | IfxVadc_getGroupSampleTime (Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the ADC input class channel sample time. More...
IFX_INLINE void | IfxVadc_setBackgroundPriorityChannel (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Sets the channels with low priority as background channel. More...
IFX_INLINE void | IfxVadc_setBackgroundResultTarget (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
Sets the target for result background source. More...
IFX_INLINE void | IfxVadc_setBoundaryMode (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
Selects boundary extension. More...
IFX_INLINE void | IfxVadc_setChannelEventNodePointer0 (Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
Sets the channel event service request line. More...
IFX_INLINE void | IfxVadc_setChannelInputClass (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
Sets the channel input class. More...
IFX_INLINE void | IfxVadc_setChannelLimitCheckMode (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
Sets the channel event mode. More...
IFX_INLINE void | IfxVadc_setGroupPriorityChannel (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Sets channel as priority channel with in the group. More...
IFX_INLINE void | IfxVadc_setLowerBoundary (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
Sets group's lower boundary. More...
IFX_INLINE void | IfxVadc_setReferenceInput (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
Selects the refernce input. More...
IFX_INLINE void | IfxVadc_setResultNodeEventPointer0 (Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
Sets result event node pointer 0. More...
IFX_INLINE void | IfxVadc_setResultNodeEventPointer1 (Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
Sets result event node pointer 1. More...
IFX_INLINE void | IfxVadc_setResultPosition (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
Sets result store position. More...
IFX_INLINE void | IfxVadc_setSyncRequest (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
Sets channel synchronization request. More...
IFX_INLINE void | IfxVadc_setUpperBoundary (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
Sets group's upper boundary. More...
IFX_INLINE void | IfxVadc_storeGroupResult (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
Sets the group result register. More...
IFX_EXTERN float32 | IfxVadc_getChannelConversionTime (Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode)
get channel conversion timing More...
IFX_INLINE IfxVadc_ChannelResolution | IfxVadc_getEmuxGlobalResolution (Ifx_VADC *vadc, uint8 inputClassNum)
get global input class resolution More...
IFX_INLINE float32 | IfxVadc_getEmuxGlobalSampleTime (Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
Get the sample time of ADC global class for external channel. More...
IFX_INLINE IfxVadc_ChannelResolution | IfxVadc_getEmuxGroupResolution (Ifx_VADC_G *vadcG, uint8 inputClassNum)
get the external channel resolution More...
IFX_INLINE float32 | IfxVadc_getEmuxGroupSampleTime (Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the ADC input class sample time of external channel. More...
IFX_INLINE void | IfxVadc_setEmuxGlobalResolution (Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
set the external channel resolution of Global class More...
IFX_INLINE void | IfxVadc_setEmuxGlobalSampleTime (Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time of ADC global class for external channel. More...
IFX_INLINE void | IfxVadc_setEmuxGroupResolution (Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
set the external channel resolution of ADC input class More...
IFX_INLINE void | IfxVadc_setEmuxGroupSampletime (Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time for external channel. More...
IFX_INLINE void | IfxVadc_setEmuxInterfaceForGroup (Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group)
Sets the Emux Interface for a particular group. More...
IFX_EXTERN void | IfxVadc_configExternalMultiplexerMode (Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle)
IFX_INLINE Ifx_VADC_G_CEVNP1 | IfxVadc_getChannelServiceRequestNodePointer1 (Ifx_VADC_G *vadcG)
get channel service request node pointer More...
IFX_INLINE void | IfxVadc_setChannelEventNodePointer1 (Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
set channel event node pointer More...

Detailed Description

VADC basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxVadc.h.

Function Documentation

◆ IfxVadc_getChannelServiceRequestNodePointer1()

IFX_INLINE Ifx_VADC_G_CEVNP1 IfxVadc_getChannelServiceRequestNodePointer1 ( Ifx_VADC_G * vadcG )

get channel service request node pointer

Parameters
vadcG Pointer to VADC Group register space
Returns
channel service request node pointer

Definition at line 1940 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getChannelConfig().

◆ IfxVadc_setChannelEventNodePointer1()

IFX_INLINE void IfxVadc_setChannelEventNodePointer1 | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_SrcNr | channelSrcNr,
 |  | IfxVadc_ChannelId | channel
 | ) |  |

set channel event node pointer

Parameters
vadcG | Pointer to the Vadc group register space
channelSrcNr | Service request
channel | specifies channel
Returns
None

Definition at line 2269 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().


iLLD_TC26B: General functionalities

Modules
General functionalities
iLLD
Collaboration diagram for General functionalities:

Modules

Data handling
Internal Mux

Detailed Description


iLLD_TC26B: Data handling

Modules
Data handling
iLLD » General functionalities
Collaboration diagram for Data handling:

Modules

Circular buffer
FIFO

Detailed Description


iLLD_TC26B: Circular buffer

Functions
Circular buffer
iLLD » General functionalities » Data handling
Collaboration diagram for Circular buffer:

Functions

uint16 | Ifx_CircularBuffer_get16 (Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer. More...
uint32 | Ifx_CircularBuffer_get32 (Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer. More...
void * | Ifx_CircularBuffer_read8 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array. More...
void * | Ifx_CircularBuffer_read32 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array. More...
const void * | Ifx_CircularBuffer_write8 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer. More...
const void * | Ifx_CircularBuffer_write32 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer. More...

Detailed Description

This module implements circular buffer functions.

Function Documentation

◆ Ifx_CircularBuffer_get16()

uint16 Ifx_CircularBuffer_get16 ( Ifx_CircularBuffer * buffer )

Return the circular buffer 16 bit value, and post-increment the circular buffer pointer.

Parameters
buffer Specifies circular buffer.
Returns
Return the next circular buffer value.

Definition at line 61 of file Ifx_CircularBuffer.c.

◆ Ifx_CircularBuffer_get32()

uint32 Ifx_CircularBuffer_get32 ( Ifx_CircularBuffer * buffer )

Return the circular buffer 32 bit value, and post-increment the circular buffer pointer.

Parameters
buffer Specifies circular buffer.
Returns
Return the next circular buffer value.

Definition at line 46 of file Ifx_CircularBuffer.c.

◆ Ifx_CircularBuffer_read32()

void* Ifx_CircularBuffer_read32 | ( | Ifx_CircularBuffer * | buffer,
 |  | void * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Copy count 32 bit words from the circular buffer to the data array.

Parameters
buffer | Specifies circular buffer.
data | Specifies destination pointer.
count | Specifies number of 32 bit words to be copied. count MUST be >= 1.
Returns
Returns the updated data pointer data = ((uint32*)data) + count

Definition at line 116 of file Ifx_CircularBuffer.c.

◆ Ifx_CircularBuffer_read8()

void* Ifx_CircularBuffer_read8 | ( | Ifx_CircularBuffer * | buffer,
 |  | void * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Copy count bytes from the circular buffer to the data array.

Parameters
buffer | Specifies circular buffer.
data | Specifies destination pointer.
count | Specifies number of bytes to be copied. count MUST be >= 1.
Returns
Returns the updated data pointer data = ((uint8*)data) + count

Definition at line 95 of file Ifx_CircularBuffer.c.

◆ Ifx_CircularBuffer_write32()

const void* Ifx_CircularBuffer_write32 | ( | Ifx_CircularBuffer * | buffer,
 |  | const void * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Copy count 32 bit words from the data array to the circular buffer.

Parameters
buffer | Specifies circular buffer.
data | Specifies source pointer.
count | Specifies number of 32 bit words to be copied. count MUST be >= 1.
Returns
Returns the updated data pointer data = ((uint32*)data) + count

Definition at line 160 of file Ifx_CircularBuffer.c.

◆ Ifx_CircularBuffer_write8()

const void* Ifx_CircularBuffer_write8 | ( | Ifx_CircularBuffer * | buffer,
 |  | const void * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Copy count bytes from the data array to the circular buffer.

Parameters
buffer | Specifies circular buffer.
data | Specifies source pointer.
count | Specifies number of bytes to be copied. count MUST be >= 1.
Returns
Returns the updated data pointer data = ((uint8*)data) + count

Definition at line 139 of file Ifx_CircularBuffer.c.


iLLD_TC26B: FIFO

Files | Data Structures | Typedefs | Functions
FIFO
iLLD » General functionalities » Data handling
Collaboration diagram for FIFO:

Files

file Ifx_Fifo.h
FIFO buffer functions.

Data Structures

struct _Fifo

Typedefs

typedef struct _Fifo Ifx_Fifo

Functions

IFX_EXTERN boolean | Ifx_Fifo_canReadCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer. More...
IFX_EXTERN boolean | Ifx_Fifo_canWriteCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
IFX_EXTERN void | Ifx_Fifo_clear (Ifx_Fifo *fifo)
Clear fifo contents. More...
IFX_EXTERN Ifx_Fifo * | Ifx_Fifo_create (Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object. More...
IFX_EXTERN void | Ifx_Fifo_destroy (Ifx_Fifo *fifo)
Destroy the FIFO object. More...
IFX_EXTERN Ifx_Fifo * | Ifx_Fifo_init (void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object. More...
IFX_EXTERN Ifx_SizeT | Ifx_Fifo_read (Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer. More...
IFX_EXTERN Ifx_SizeT | Ifx_Fifo_write (Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo. More...
IFX_INLINE boolean | Ifx_Fifo_flush (Ifx_Fifo *fifo, Ifx_TickTime timeout)
Empty the fifo. More...
IFX_INLINE Ifx_SizeT | Ifx_Fifo_readCount (Ifx_Fifo *fifo)
Returns the size of the data in the buffer in bytes. More...
IFX_INLINE Ifx_SizeT | Ifx_Fifo_writeCount (Ifx_Fifo *fifo)
Returns the free size in bytes. More...
IFX_INLINE boolean | Ifx_Fifo_isEmpty (Ifx_Fifo *fifo)
Indicates if the fifo is empty. More...

Detailed Description

This module implements the FIFO buffer functionality.

Data Structure Documentation

◆ _Fifo

struct _Fifo

Fifo object

Definition at line 70 of file Ifx_Fifo.h.

Collaboration diagram for _Fifo:
[legend]
Data Fields
void * | buffer | aligned on 64 bit boundary
Ifx_SizeT | elementSize | minimum number of bytes (block) added / removed to / from the buffer
Ifx_SizeT | endIndex | buffer valid data end index
volatile boolean | eventReader | event set by the writer to signal the reader that the required data are available in the buffer
volatile boolean | eventWriter | event set by the reader to signal the writer that the required free space are available in the buffer
Ifx_Fifo_Shared | shared | data shared between reader / writer
Ifx_SizeT | size | multiple of 8 bit, max 0xFFF8
Ifx_SizeT | startIndex | buffer valid data start index

Typedef Documentation

◆ Ifx_Fifo

typedef struct _Fifo Ifx_Fifo

Fifo object

Function Documentation

◆ Ifx_Fifo_canReadCount()

IFX_EXTERN boolean Ifx_Fifo_canReadCount | ( | Ifx_Fifo * | fifo,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Indicates if the required number of bytes are available in the buffer.

Should not be called from an interrupt as this function may wait forever

Parameters
fifo | Pointer on the Fifo object
count | in bytes
timeout | in system timer ticks
Returns
TRUE if at least count bytes can be read from the buffer, else the Event is armed to be set when the buffer count is bigger or equal to the requested count

Definition at line 136 of file Ifx_Fifo.c.

Referenced by IfxAsclin_Asc_canReadCount().

◆ Ifx_Fifo_canWriteCount()

IFX_EXTERN boolean Ifx_Fifo_canWriteCount | ( | Ifx_Fifo * | fifo,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Indicates if there is enough free space to write the data in the buffer.

Should not be called from an interrupt as this function may wait forever

Parameters
fifo | Pointer on the Fifo object
count | in bytes
timeout | in system timer ticks
Returns
TRUE if at least count bytes can be written to the buffer, if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count

Definition at line 296 of file Ifx_Fifo.c.

Referenced by Ifx_Fifo_flush(), and IfxAsclin_Asc_canWriteCount().

◆ Ifx_Fifo_clear()

IFX_EXTERN void Ifx_Fifo_clear ( Ifx_Fifo * fifo )

Clear fifo contents.

Parameters
fifo Pointer on the Fifo object
Returns
void

Definition at line 259 of file Ifx_Fifo.c.

Referenced by IfxAsclin_Asc_clearRx(), and IfxAsclin_Asc_clearTx().

◆ Ifx_Fifo_create()

IFX_EXTERN Ifx_Fifo* Ifx_Fifo_create | ( | Ifx_SizeT | size,
 |  | Ifx_SizeT | elementSize
 | ) |  |

Create a Fifo object.

The memory required for the object is allocated dynamically.

Parameters
size | Specifies the FIFO buffer size in bytes
elementSize | Specifies data element size in bytes. size must be bigger or equal to elemenntSize.
Returns
returns a pointer to the FIFO object
See also
Ifx_Fifo_destroy()

Definition at line 68 of file Ifx_Fifo.c.

Referenced by IfxAsclin_Asc_initModule().

◆ Ifx_Fifo_destroy()

IFX_EXTERN void Ifx_Fifo_destroy ( Ifx_Fifo * fifo )

Destroy the FIFO object.

This function must be called to destroy the fifo object when created with Ifx_Fifo_create()

Parameters
fifo Pointer on the Fifo object
Returns
void
See also
Ifx_Fifo_create()

Definition at line 85 of file Ifx_Fifo.c.

◆ Ifx_Fifo_flush()

IFX_INLINE boolean Ifx_Fifo_flush | ( | Ifx_Fifo * | fifo,
 |  | Ifx_TickTime | timeout
 | ) |  |

Empty the fifo.

Parameters
fifo | Pointer on the Fifo object
timeout | in system timer ticks
Returns
TRUE if the buffer is emptied.

Definition at line 186 of file Ifx_Fifo.h.

Referenced by IfxAsclin_Asc_flushTx().

◆ Ifx_Fifo_init()

IFX_EXTERN Ifx_Fifo* Ifx_Fifo_init | ( | void * | buffer,
 |  | Ifx_SizeT | size,
 |  | Ifx_SizeT | elementSize
 | ) |  |

Initialize the FIFO buffer object.

Parameters
buffer | Specifies the FIFO object address.
size | Specifies the FIFO buffer size in bytes
elementSize | Specifies data element size in bytes. size must be bigger or equal to elemenntSize.
Returns
Returns a pointer on the FIFO object
Note
: The buffer parameter must point on a free memory location where the buffer object will be initialised. The size of this area must be at least equals to "size + sizeof(Ifx_Fifo) + 8". Not taking this in account may result in unpredictable behavior.

Definition at line 91 of file Ifx_Fifo.c.

Referenced by Ifx_Fifo_create(), and IfxAsclin_Asc_initModule().

◆ Ifx_Fifo_isEmpty()

IFX_INLINE boolean Ifx_Fifo_isEmpty ( Ifx_Fifo * fifo )

Indicates if the fifo is empty.

Parameters
fifo Pointer on the Ifx_Fifo object
Return values
TRUE | is the buffer is empty
FALSE | is the buffer is not empty

Definition at line 232 of file Ifx_Fifo.h.

Referenced by IfxAsclin_Asc_initiateTransmission(), and IfxAsclin_Asc_isrTransmit().

◆ Ifx_Fifo_read()

IFX_EXTERN Ifx_SizeT Ifx_Fifo_read | ( | Ifx_Fifo * | fifo,
 |  | void * | data,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Read data from a fifo and remove them from the buffer.

Only complete elements are returned, if count is not a multiple of elementSize then the incomplete element is not read/removed from the buffer.

Parameters
fifo | Pointer on the Fifo object
data | Pointer to the data buffer for storing values
count | in bytes
timeout | in system timer ticks
Returns
return the number of byte that could not be read

Definition at line 208 of file Ifx_Fifo.c.

Referenced by IfxAsclin_Asc_initiateTransmission(), IfxAsclin_Asc_isrTransmit(), and IfxAsclin_Asc_read().

◆ Ifx_Fifo_readCount()

IFX_INLINE Ifx_SizeT Ifx_Fifo_readCount ( Ifx_Fifo * fifo )

Returns the size of the data in the buffer in bytes.

Parameters
fifo Pointer on the Fifo object

Note as the Ifx_Fifo_write / Ifx_Fifo_read function does only write blocks which are a multiple of fifo->elementSize, the Ifx_Fifo_readCount / Ifx_Fifo_writeCount return a multiple of fifo->elementSize

Returns
Returns the size of the data in the buffer in bytes

Definition at line 203 of file Ifx_Fifo.h.

Referenced by Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_isEmpty(), Ifx_Fifo_writeCount(), IfxAsclin_Asc_getReadCount(), and IfxAsclin_Asc_isrTransmit().

◆ Ifx_Fifo_write()

IFX_EXTERN Ifx_SizeT Ifx_Fifo_write | ( | Ifx_Fifo * | fifo,
 |  | const void * | data,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Write data into a fifo.

Only complete elements are written to the buffer, if count is not a multiple of elementSize then the incomplete element are not written to the buffer.

Parameters
fifo | Pointer on the Fifo object
data | Pointer to the data buffer to write into the Fifo
count | in bytes
timeout | in system timer ticks

Definition at line 366 of file Ifx_Fifo.c.

Referenced by IfxAsclin_Asc_isrReceive(), and IfxAsclin_Asc_write().

◆ Ifx_Fifo_writeCount()

IFX_INLINE Ifx_SizeT Ifx_Fifo_writeCount ( Ifx_Fifo * fifo )

Returns the free size in bytes.

Parameters
fifo Pointer on the Fifo object

Note as the Ifx_Fifo_write / Ifx_Fifo_read function does only write blocks which are a multiple of fifo->elementSize, the Ifx_Fifo_readCount / Ifx_Fifo_writeCount return a multiple of fifo->elementSize

Returns
Returns the free size in bytes

Definition at line 219 of file Ifx_Fifo.h.

Referenced by IfxAsclin_Asc_getWriteCount().


iLLD_TC26B: Ifx_Fifo.h File Reference

  • _Lib
  • DataHandling
Data Structures | Typedefs | Functions
Ifx_Fifo.h File Reference
iLLD » General functionalities » Data handling » FIFO

FIFO buffer functions. More...

#include "Ifx_Cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_Fifo.h:

Go to the source code of this file.

Data Structures

struct | Ifx_Fifo_Shared
struct | _Fifo

Typedefs

typedef struct _Fifo Ifx_Fifo

Functions

IFX_EXTERN boolean | Ifx_Fifo_canReadCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer. More...
IFX_EXTERN boolean | Ifx_Fifo_canWriteCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
IFX_EXTERN void | Ifx_Fifo_clear (Ifx_Fifo *fifo)
Clear fifo contents. More...
IFX_EXTERN Ifx_Fifo * | Ifx_Fifo_create (Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object. More...
IFX_EXTERN void | Ifx_Fifo_destroy (Ifx_Fifo *fifo)
Destroy the FIFO object. More...
IFX_EXTERN Ifx_Fifo * | Ifx_Fifo_init (void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object. More...
IFX_EXTERN Ifx_SizeT | Ifx_Fifo_read (Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer. More...
IFX_EXTERN Ifx_SizeT | Ifx_Fifo_write (Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo. More...
IFX_INLINE boolean | Ifx_Fifo_flush (Ifx_Fifo *fifo, Ifx_TickTime timeout)
Empty the fifo. More...
IFX_INLINE Ifx_SizeT | Ifx_Fifo_readCount (Ifx_Fifo *fifo)
Returns the size of the data in the buffer in bytes. More...
IFX_INLINE Ifx_SizeT | Ifx_Fifo_writeCount (Ifx_Fifo *fifo)
Returns the free size in bytes. More...
IFX_INLINE boolean | Ifx_Fifo_isEmpty (Ifx_Fifo *fifo)
Indicates if the fifo is empty. More...

Detailed Description

FIFO buffer functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Fifo.h.

Data Structure Documentation

◆ Ifx_Fifo_Shared

struct Ifx_Fifo_Shared

Shared data of the FIFO

Definition at line 57 of file Ifx_Fifo.h.

Data Fields
Ifx_SizeT | count | number of bytes contained in the buffer
Ifx_SizeT | maxcount | Highest value seen in the count.
sint32 | readerWaitx | Number of bytes that the reader is waiting for. When the writer modify it to 0 the reader get signaled.
sint32 | writerWaitx | Number of byte that the writer expect to be free. When the reader modify it to 0 the reader get signaled.


iLLD_TC26B: Internal Mux

Modules
Internal Mux
iLLD » General functionalities
Collaboration diagram for Internal Mux:

Modules

FIFO

Detailed Description


iLLD_TC26B: FIFO

Data Structures | Functions
FIFO
iLLD » General functionalities » Internal Mux
Collaboration diagram for FIFO:

Data Structures

struct | Ifx_InternalMux_MuxConfig
struct | Ifx_InternalMux_Config

Functions

IFX_EXTERN void Ifx_InternalMux_init (const Ifx_InternalMux_Config *cfg)
Initialises the internal mux configuration. More...

Detailed Description

This module implements the Internal Mux functionality.

Data Structure Documentation

◆ Ifx_InternalMux_MuxConfig

struct Ifx_InternalMux_MuxConfig

Individual Mux configuration structure

Definition at line 62 of file Ifx_InternalMux.h.

Data Fields
uint32 | mask | Bit field position for the Mux/Demux selection.
volatile void * | regAddr | pointer to the register for Mux/Demux configuration
uint32 | value | Mux/Demux configuration value.

◆ Ifx_InternalMux_Config

struct Ifx_InternalMux_Config

Global/Combined Mux configuration object

Definition at line 72 of file Ifx_InternalMux.h.

Collaboration diagram for Ifx_InternalMux_Config:
[legend]
Data Fields
Ifx_InternalMux_MuxConfig * | muxConfig | pointer to the internal mux config array
uint32 | size | size of the internal mux configuration array

Function Documentation

◆ Ifx_InternalMux_init()

IFX_EXTERN void Ifx_InternalMux_init ( const Ifx_InternalMux_Config * cfg )

Initialises the internal mux configuration.

Parameters
cfg Pointer on the Global Mux Configuration object
Returns
None

Definition at line 53 of file Ifx_InternalMux.c.


iLLD_TC26B: IfxStdIf.h File Reference

  • Service
  • CpuGeneric
  • StdIf
Typedefs
IfxStdIf.h File Reference
iLLD

Standard interface types. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for IfxStdIf.h:

Go to the source code of this file.

Typedefs

typedef void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver. More...

Detailed Description

Standard interface types.

Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:23 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf.h.

Typedef Documentation

◆ IfxStdIf_InterfaceDriver

typedef void* IfxStdIf_InterfaceDriver

Pointer to the specific interface driver.

Definition at line 115 of file IfxStdIf.h.


iLLD_TC26B: Service software

Modules
Service software
Collaboration diagram for Service software:

Modules

Utilities
Standard interface (Obsolete)
Standard interface
System Engineering

Detailed Description


iLLD_TC26B: Utilities

Modules
Utilities
Service software
Collaboration diagram for Utilities:

Modules

Assertion

Detailed Description


iLLD_TC26B: Assertion

Files | Macros
Assertion
Service software » Utilities
Collaboration diagram for Assertion:

Files

file Ifx_Assert.h
Assert functions.

Macros

#define | IFX_VERBOSE_LEVEL_OFF (0)
Assertion level off, assertion is disabled. More...
#define | IFX_VERBOSE_LEVEL_FAILURE (1)
Assertion level failure, a debug instruction is inserted if enabled. More...
#define | IFX_VERBOSE_LEVEL_ERROR (2)
Assertion level error, a debug instruction is inserted if enabled. More...
#define | IFX_VERBOSE_LEVEL_WARNING (3)
Assertion level warning. More...
#define | IFX_VERBOSE_LEVEL_INFO (4)
Assertion level info. More...
#define | IFX_VERBOSE_LEVEL_DEBUG (5)
Assertion level debug. More...
#define | IFX_ASSERT_FEATURE_NOT_IMPLEMENTED (FALSE)
Constant to be used to indicate not implemented feature. More...
#define | IFX_ASSERT_FEATURE_NOT_AVAILABLE (FALSE)
Feature is not available on the selected hardware. More...
#define | IFX_ASSERT(level, expr) ((void)0)
#define | IFX_VALIDATE(level, expr) (expr)

Detailed Description

This module implements assertion functions.

Macro Definition Documentation

◆ IFX_ASSERT

#define IFX_ASSERT | ( | level,
 |  | expr
 | ) | ((void)0)

Definition at line 69 of file Ifx_Assert.h.

Referenced by Ifx_Console_print(), Ifx_Console_printAlign(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_init(), Ifx_Fifo_read(), Ifx_Fifo_write(), Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_process(), IfxAsclin_Asc_initModule(), IfxAsclin_Lin_receiveHeader(), IfxAsclin_Lin_receiveResponse(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), IfxAsclin_setBitTiming(), IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_init(), IfxCcu6_PwmHl_setMode(), IfxCcu6_setT12InputSignal(), IfxCcu6_setT13InputSignal(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), IfxCpu_setSafetyTaskIdentifier(), IfxDma_Dma_configureTransactionSet(), IfxEth_init(), IfxEth_initReceiveDescriptorsRingMode(), IfxEth_initTransmitDescriptorsRingMode(), IfxFft_Fft_initDma(), IfxFft_Fft_initJob(), IfxFft_Fft_initModule(), IfxFft_Fft_initWindow(), IfxFft_Fft_isrOutput(), IfxFlash_selectCorrectableErrorTracking(), IfxFlash_selectUncorrectableErrorTracking(), IfxGpt12_T2_setEudInput(), IfxGpt12_T2_setInput(), IfxGpt12_T3_setCounterInputMode(), IfxGpt12_T3_setMode(), IfxGpt12_T5_setEudInput(), IfxGpt12_T5_setInput(), IfxGpt12_T5_setMode(), IfxGpt12_T6_setCounterInputMode(), IfxGpt12_T6_setEudInput(), IfxGpt12_T6_setInput(), IfxGpt12_T6_setMode(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_PwmHl_setMode(), IfxGtm_Atom_Timer_init(), IfxGtm_Tim_In_init(), IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_setMode(), IfxGtm_Tom_Timer_init(), IfxGtm_Trig_toSent(), IfxGtm_Trig_toVadc(), IfxIom_Driver_initLam(), IfxMtu_clearSram(), IfxMtu_clearSramStart(), IfxMtu_runNonDestructiveInversionTest(), IfxMtu_writeSramAddress(), IfxMultican_Node_setBitTiming(), IfxMultican_Node_setFastBitTiming(), IfxMultican_Node_setNominalBitTiming(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_calculateTimeQuantumLength(), IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_packLongModeBuffer(), IfxQspi_SpiMaster_writeLong(), IfxScuWdt_enableWatchdogWithDebugger(), IfxSmu_triggerAlarm(), IfxStdIf_DPipe_print(), and IfxStm_Timer_init().

◆ IFX_ASSERT_FEATURE_NOT_AVAILABLE

#define IFX_ASSERT_FEATURE_NOT_AVAILABLE (FALSE)

Feature is not available on the selected hardware.

Definition at line 66 of file Ifx_Assert.h.

◆ IFX_ASSERT_FEATURE_NOT_IMPLEMENTED

#define IFX_ASSERT_FEATURE_NOT_IMPLEMENTED (FALSE)

Constant to be used to indicate not implemented feature.

Definition at line 64 of file Ifx_Assert.h.

Referenced by IfxQspi_SpiMaster_packLongModeBuffer(), and IfxQspi_SpiMaster_writeLong().

◆ IFX_VALIDATE

#define IFX_VALIDATE | ( | level,
 |  | expr
 | ) | (expr)

Definition at line 73 of file Ifx_Assert.h.

Referenced by Ifx_Fifo_create().

◆ IFX_VERBOSE_LEVEL_DEBUG

#define IFX_VERBOSE_LEVEL_DEBUG (5)

Assertion level debug.

Definition at line 61 of file Ifx_Assert.h.

◆ IFX_VERBOSE_LEVEL_ERROR

#define IFX_VERBOSE_LEVEL_ERROR (2)

Assertion level error, a debug instruction is inserted if enabled.

Definition at line 58 of file Ifx_Assert.h.

Referenced by Ifx_Assert_doLevel(), Ifx_Assert_doValidate(), Ifx_Console_print(), Ifx_Console_printAlign(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_create(), Ifx_Fifo_init(), Ifx_Fifo_read(), Ifx_Fifo_write(), Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_process(), IfxAsclin_Asc_initModule(), IfxAsclin_Lin_receiveHeader(), IfxAsclin_Lin_receiveResponse(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_init(), IfxCcu6_PwmHl_setMode(), IfxCcu6_setT12InputSignal(), IfxCcu6_setT13InputSignal(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), IfxCpu_setSafetyTaskIdentifier(), IfxDma_Dma_configureTransactionSet(), IfxEth_init(), IfxEth_initReceiveDescriptorsRingMode(), IfxEth_initTransmitDescriptorsRingMode(), IfxFft_Fft_initDma(), IfxFft_Fft_initJob(), IfxFft_Fft_initModule(), IfxFft_Fft_initWindow(), IfxFft_Fft_isrOutput(), IfxFlash_selectCorrectableErrorTracking(), IfxFlash_selectUncorrectableErrorTracking(), IfxGpt12_T2_setEudInput(), IfxGpt12_T2_setInput(), IfxGpt12_T3_setCounterInputMode(), IfxGpt12_T3_setMode(), IfxGpt12_T5_setEudInput(), IfxGpt12_T5_setInput(), IfxGpt12_T5_setMode(), IfxGpt12_T6_setCounterInputMode(), IfxGpt12_T6_setEudInput(), IfxGpt12_T6_setInput(), IfxGpt12_T6_setMode(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_PwmHl_setMode(), IfxGtm_Atom_Timer_init(), IfxGtm_Tim_In_init(), IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_setMode(), IfxGtm_Tom_Timer_init(), IfxGtm_Trig_toSent(), IfxGtm_Trig_toVadc(), IfxIom_Driver_initLam(), IfxMtu_clearSram(), IfxMtu_clearSramStart(), IfxMtu_runNonDestructiveInversionTest(), IfxMtu_writeSramAddress(), IfxMultican_Node_setBitTiming(), IfxMultican_Node_setFastBitTiming(), IfxMultican_Node_setNominalBitTiming(), IfxQspi_calculateTimeQuantumLength(), IfxQspi_SpiMaster_packLongModeBuffer(), IfxQspi_SpiMaster_writeLong(), IfxScuWdt_enableWatchdogWithDebugger(), IfxSmu_triggerAlarm(), IfxStdIf_DPipe_print(), and IfxStm_Timer_init().

◆ IFX_VERBOSE_LEVEL_FAILURE

#define IFX_VERBOSE_LEVEL_FAILURE (1)

Assertion level failure, a debug instruction is inserted if enabled.

Definition at line 57 of file Ifx_Assert.h.

◆ IFX_VERBOSE_LEVEL_INFO

#define IFX_VERBOSE_LEVEL_INFO (4)

Assertion level info.

Definition at line 60 of file Ifx_Assert.h.

◆ IFX_VERBOSE_LEVEL_OFF

#define IFX_VERBOSE_LEVEL_OFF (0)

Assertion level off, assertion is disabled.

Definition at line 56 of file Ifx_Assert.h.

◆ IFX_VERBOSE_LEVEL_WARNING

#define IFX_VERBOSE_LEVEL_WARNING (3)

Assertion level warning.

Definition at line 59 of file Ifx_Assert.h.

Referenced by IfxAsclin_setBitTiming(), IfxQspi_calculateExtendedConfigurationValue(), and IfxQspi_SpiMaster_initChannel().


iLLD_TC26B: Ifx_Assert.h File Reference

  • Service
  • CpuGeneric
  • _Utilities
Macros
Ifx_Assert.h File Reference
Service software » Utilities » Assertion

Assert functions. More...

#include "Ifx_Cfg.h"
#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_Assert.h:

Go to the source code of this file.

Macros

#define | IFX_VERBOSE_LEVEL_OFF (0)
Assertion level off, assertion is disabled. More...
#define | IFX_VERBOSE_LEVEL_FAILURE (1)
Assertion level failure, a debug instruction is inserted if enabled. More...
#define | IFX_VERBOSE_LEVEL_ERROR (2)
Assertion level error, a debug instruction is inserted if enabled. More...
#define | IFX_VERBOSE_LEVEL_WARNING (3)
Assertion level warning. More...
#define | IFX_VERBOSE_LEVEL_INFO (4)
Assertion level info. More...
#define | IFX_VERBOSE_LEVEL_DEBUG (5)
Assertion level debug. More...
#define | IFX_ASSERT_FEATURE_NOT_IMPLEMENTED (FALSE)
Constant to be used to indicate not implemented feature. More...
#define | IFX_ASSERT_FEATURE_NOT_AVAILABLE (FALSE)
Feature is not available on the selected hardware. More...
#define | IFX_ASSERT(level, expr) ((void)0)
#define | IFX_VALIDATE(level, expr) (expr)

Detailed Description

Assert functions.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:42 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Assert.h.


iLLD_TC26B: Standard interface (Obsolete)

Modules
Standard interface (Obsolete)
Service software
Collaboration diagram for Standard interface (Obsolete):

Modules

ICU interface
PWM HL interface
Timer interface
TPWM interface
SPI interface

Detailed Description

Use Standard interface instead


iLLD_TC26B: ICU interface

ICU interface
Service software » Standard interface (Obsolete)
Collaboration diagram for ICU interface:


iLLD_TC26B: PWM HL interface

PWM HL interface
Service software » Standard interface (Obsolete)
Collaboration diagram for PWM HL interface:


iLLD_TC26B: Timer interface

Timer interface
Service software » Standard interface (Obsolete)
Collaboration diagram for Timer interface:


iLLD_TC26B: TPWM interface

TPWM interface
Service software » Standard interface (Obsolete)
Collaboration diagram for TPWM interface:


iLLD_TC26B: SPI interface

Data Structures | Typedefs | Enumerations | Functions
SPI interface
Service software » Standard interface (Obsolete)
Collaboration diagram for SPI interface:

Data Structures

struct | SpiIf_Flags
struct | SpiIf_Job
struct | SpiIf_funcs
struct | SpiIf_
struct | SpiIf_Config
struct | Spi_ErrorChecks
struct | SpiIf_ChMode
struct | SpiIf_Ch_
struct | SpiIf_ChConfig_

Typedefs

typedef struct SpiIf_Ch_ | SpiIf_Ch
Alias to the channel structure. More...
typedef struct SpiIf_ChConfig_ | SpiIf_ChConfig
typedef struct SpiIf_ | SpiIf
typedef SpiIf_Status(* | SpiIf_Exchange) (SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
typedef SpiIf_Status(* | SpiIf_GetStatus) (SpiIf_Ch *handle)
typedef void(* | SpiIf_OnEvent) (SpiIf *handle)
typedef uint32 | SpiIf_SlsoTiming_HalfTsclk
typedef void(* | SpiIf_Cbk) (void *data)
SPI channel callback prototype. More...
typedef void(* | TxRxHandler) (SpiIf_Ch *handle)

Enumerations

enum SpiIf_Status {
SpiIf_Status_ok,
SpiIf_Status_busy,
SpiIf_Status_unknown
}
SPI Interface Status. More...
enum SpiIf_SlsoTiming {
SpiIf_SlsoTiming_0 = 0,
SpiIf_SlsoTiming_1,
SpiIf_SlsoTiming_2,
SpiIf_SlsoTiming_3,
SpiIf_SlsoTiming_4,
SpiIf_SlsoTiming_5,
SpiIf_SlsoTiming_6,
SpiIf_SlsoTiming_7
}
Slave select output timing. More...
enum SpiIf_DataHeading {
SpiIf_DataHeading_lsbFirst = 0,
SpiIf_DataHeading_msbFirst
}
Heading. More...
enum SpiIf_ShiftClock {
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge = 0,
SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge
}
Clock phase. More...
enum SpiIf_ClockPolarity {
SpiIf_ClockPolarity_idleLow = 0,
SpiIf_ClockPolarity_idleHigh
}
Clock polarity. More...
enum SpiIf_Mode {
SpiIf_Mode_master,
SpiIf_Mode_slave,
SpiIf_Mode_undefined
}

Functions

IFX_INLINE void | SpiIf_wait (SpiIf_Ch *handle)
IFX_EXTERN void | SpiIf_initConfig (SpiIf_Config *config)
IFX_EXTERN void | SpiIf_initChannelConfig (SpiIf_ChConfig *config, SpiIf *driver)

Virtual functions

These functions are implemented by a driver.

IFX_INLINE SpiIf_Status | SpiIf_exchange (SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
IFX_INLINE SpiIf_Status | SpiIf_getStatus (SpiIf_Ch *handle)

Detailed Description

Data Structure Documentation

◆ SpiIf_Flags

struct SpiIf_Flags

Definition at line 115 of file SpiIf.h.

Data Fields
uint32 | byteAccess: 1 | Channel status: 8bit / 16 bit access.
uint32 | onTransfer: 1 | Channel status: On transfer.

◆ SpiIf_Job

struct SpiIf_Job

Definition at line 121 of file SpiIf.h.

Data Fields
void * | data
Ifx_SizeT | remaining

◆ SpiIf_funcs

struct SpiIf_funcs

Definition at line 141 of file SpiIf.h.

Collaboration diagram for SpiIf_funcs:
[legend]
Data Fields
SpiIf_Exchange | exchange
SpiIf_GetStatus | getStatus
SpiIf_OnEvent | onError
SpiIf_OnEvent | onRx
SpiIf_OnEvent | onTx

◆ SpiIf_

struct SpiIf_

Definition at line 150 of file SpiIf.h.

Collaboration diagram for SpiIf_:
[legend]
Data Fields
SpiIf_Ch * | activeChannel | Channel actually transmitting / receiving.
pvoid | driver | Spi specific driver.
SpiIf_funcs | functions |
uint32 | rxCount |
uint32 | sending |
uint32 | txCount |

◆ SpiIf_Config

struct SpiIf_Config

Definition at line 160 of file SpiIf.h.

Data Fields
void * | buffer | Specifies the buffer location.The buffer parameter must point on a free memory location where the buffer object will be initialised. The Size of this area must be at least equals to "Size + sizeof(Ifx_Fifo) + 8", with "Size=config->bufferSize * Ifx_AlignOn32(sizeof(Spi_Ch*))". Not tacking this in account may result in unpredictable behaviour.
Ifx_SizeT | bufferSize | Specifies the number of channels that can be buffered. If 0, buffering is disabled.
Ifx_Priority | erPriority | Specifies the priority of the error interrupt.
IfxSrc_Tos | isrProvider | Specifies the handler of the interrupts.
float32 | maximumBaudrate | Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock.
SpiIf_Mode | mode | Specifies the interface operation mode.
Ifx_Priority | rxPriority | Specifies the priority of the receive interrupt.
Ifx_Priority | txPriority | Specifies the priority of the transmit interrupt.

◆ Spi_ErrorChecks

struct Spi_ErrorChecks

Definition at line 176 of file SpiIf.h.

Data Fields
uint32 | baudrate: 1 | TRUE = checked, FALSE = ignored.
uint32 | phase: 1 | TRUE = checked, FALSE = ignored.
uint32 | receive: 1 | TRUE = checked, FALSE = ignored.
uint32 | reserved: 28 |
uint32 | transmit: 1 | TRUE = checked, FALSE = ignored.

◆ SpiIf_ChMode

struct SpiIf_ChMode

Channel operation mode

Definition at line 186 of file SpiIf.h.

Data Fields
uint32 | autoCS: 1 | 1 = chip select is controlled by the hardware module or, 0 = by software.
uint32 | clockPolarity: 1 | SpiIf_ClockPolarity
uint32 | csActiveLevel: 1 | Ifx_ActiveState
SpiIf_SlsoTiming_HalfTsclk | csInactiveDelay | CS Inactive Delay in Tsclk/2 units.
SpiIf_SlsoTiming_HalfTsclk | csLeadDelay | CS Lead Delay in Tsclk/2 units.
SpiIf_SlsoTiming_HalfTsclk | csTrailDelay | CS Trail Delay in Tsclk/2 units.
uint32 | dataHeading: 1 | SpiIf_DataHeading
uint32 | dataWidth: 6 | range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
uint32 | enabled: 1 | 1 = channel enabled, 0 = channel disabled
uint32 | loopback: 1 | 0 = normal mode, 1 = loopback mode
uint32 | parityCheck: 1 | 0 = disabled, 1 = enabled
uint32 | parityMode: 1 | Ifx_ParityMode
uint32 | shiftClock: 1 | SpiIf_ShiftClock

◆ SpiIf_Ch_

struct SpiIf_Ch_

Definition at line 211 of file SpiIf.h.

Collaboration diagram for SpiIf_Ch_:
[legend]
Data Fields
sint32 | baudrate | Real baudrate.
void * | callbackData | Specifies pointer to the user specific data on transmit end.
SpiIf * | driver | Pointer to the SPI interface driver.
Spi_ErrorChecks | errorChecks | Error checks.
SpiIf_Flags | flags |
SpiIf_Cbk | onExchangeEnd | Specifies the callback function on end of exchange.
SpiIf_Job | rx |
TxRxHandler | rxHandler |
SpiIf_Job | tx |
TxRxHandler | txHandler |

◆ SpiIf_ChConfig_

struct SpiIf_ChConfig_

Definition at line 225 of file SpiIf.h.

Collaboration diagram for SpiIf_ChConfig_:
[legend]
Data Fields
float32 | baudrate | Specifies the SPI baudrate.
SpiIf * | driver | Pointer to an implementation of SPI interface driver, e.g. IfxQspi_SpiMaster_ChannelConfig.
Spi_ErrorChecks | errorChecks |
SpiIf_ChMode | mode |

Typedef Documentation

◆ SpiIf

typedef struct SpiIf_ SpiIf

Definition at line 113 of file SpiIf.h.

◆ SpiIf_Cbk

typedef void(* SpiIf_Cbk) (void *data)

SPI channel callback prototype.

Definition at line 208 of file SpiIf.h.

◆ SpiIf_Ch

typedef struct SpiIf_Ch_ SpiIf_Ch

Alias to the channel structure.

Definition at line 111 of file SpiIf.h.

◆ SpiIf_ChConfig

typedef struct SpiIf_ChConfig_ SpiIf_ChConfig

Definition at line 112 of file SpiIf.h.

◆ SpiIf_Exchange

typedef SpiIf_Status(* SpiIf_Exchange) (SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)

Definition at line 135 of file SpiIf.h.

◆ SpiIf_GetStatus

typedef SpiIf_Status(* SpiIf_GetStatus) (SpiIf_Ch *handle)

Definition at line 136 of file SpiIf.h.

◆ SpiIf_OnEvent

typedef void(* SpiIf_OnEvent) (SpiIf *handle)

Definition at line 137 of file SpiIf.h.

◆ SpiIf_SlsoTiming_HalfTsclk

typedef uint32 SpiIf_SlsoTiming_HalfTsclk

Definition at line 138 of file SpiIf.h.

◆ TxRxHandler

typedef void(* TxRxHandler) (SpiIf_Ch *handle)

Definition at line 209 of file SpiIf.h.

Enumeration Type Documentation

◆ SpiIf_ClockPolarity

enum SpiIf_ClockPolarity

Clock polarity.

Enumerator
SpiIf_ClockPolarity_idleLow | Idle clock line is low
SpiIf_ClockPolarity_idleHigh | Idle clock line is high

Definition at line 101 of file SpiIf.h.

◆ SpiIf_DataHeading

enum SpiIf_DataHeading

Heading.

Enumerator
SpiIf_DataHeading_lsbFirst | LSB first
SpiIf_DataHeading_msbFirst | MSB first

Definition at line 87 of file SpiIf.h.

◆ SpiIf_Mode

enum SpiIf_Mode

SPI operation modes

Enumerator
SpiIf_Mode_master | Master mode.
SpiIf_Mode_slave | Slave mode.
SpiIf_Mode_undefined | Undefined mode.

Definition at line 128 of file SpiIf.h.

◆ SpiIf_ShiftClock

enum SpiIf_ShiftClock

Clock phase.

Enumerator
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge | Shift Tx data on leading edge
SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge | Shift Tx data on training edge

Definition at line 94 of file SpiIf.h.

◆ SpiIf_SlsoTiming

enum SpiIf_SlsoTiming

Slave select output timing.

Enumerator
SpiIf_SlsoTiming_0 | zero delay clock
SpiIf_SlsoTiming_1 | 1 half-clock delay
SpiIf_SlsoTiming_2 | 2 half-clock delay
SpiIf_SlsoTiming_3 | 3 half-clock delay
SpiIf_SlsoTiming_4 | 4 half-clock delay
SpiIf_SlsoTiming_5 | 5 half-clock delay
SpiIf_SlsoTiming_6 | 6 half-clock delay
SpiIf_SlsoTiming_7 | 7 half-clock delay

Definition at line 74 of file SpiIf.h.

◆ SpiIf_Status

enum SpiIf_Status

SPI Interface Status.

Enumerator
SpiIf_Status_ok
SpiIf_Status_busy
SpiIf_Status_unknown

Definition at line 66 of file SpiIf.h.

Function Documentation

◆ SpiIf_exchange()

IFX_INLINE SpiIf_Status SpiIf_exchange | ( | SpiIf_Ch * | handle,
 |  | const void * | src,
 |  | void * | dest,
 |  | Ifx_SizeT | numOfData
 | ) |  |

Perform the SPI exchange operation.

Parameters
handle | Pointer to an implementation of SPI interface driver
src | Pointer to the start of data buffer for data to transmit
dest | Pointer to the start of data buffer for received data
numOfData | specifies number of byte/bit to transfer
Returns
STATUS of SPI
Note
the src and dest may be the same data location.

Definition at line 271 of file SpiIf.h.

◆ SpiIf_getStatus()

IFX_INLINE SpiIf_Status SpiIf_getStatus ( SpiIf_Ch * handle )

get the SPI status

  • Parameters
    handle Pointer to an implementation of SPI interface driver
    Returns
    STATUS of SPI

Definition at line 281 of file SpiIf.h.

◆ SpiIf_initChannelConfig()

IFX_EXTERN void SpiIf_initChannelConfig | ( | SpiIf_ChConfig * | config,
 |  | SpiIf * | driver
 | ) |  |

Definition at line 57 of file SpiIf.c.

Referenced by IfxQspi_SpiMaster_initChannelConfig(), and IfxQspi_SpiSlave_initModule().

◆ SpiIf_initConfig()

IFX_EXTERN void SpiIf_initConfig ( SpiIf_Config * config )

Definition at line 44 of file SpiIf.c.

Referenced by IfxQspi_SpiMaster_initModuleConfig(), and IfxQspi_SpiSlave_initModuleConfig().

◆ SpiIf_wait()

IFX_INLINE void SpiIf_wait ( SpiIf_Ch * handle )

Wait as long as the transmission is on-going

Note
This function blocks CPU for some-time

Definition at line 256 of file SpiIf.h.


iLLD_TC26B: Standard interface

Modules
Standard interface
Service software
Collaboration diagram for Standard interface:

Modules

Standard interface: Data Pipe
Standard interface: Position interface
Standard interface: Multi-channels, dual-complementary PWM interface
Standard interface: Timer

Detailed Description

Terms
Term | Descri
Standard Interface | Interface defined in this document
Interface Driver | Specific device driver as defined by the iLLD
Standard Interface Driver | Specific interface driver which implements the Standard Interface
API used at runtime | API that are used after initialization
Module | Hardware functional block / IP
Overview
The Standard Interface provides generic runtime API written in C for common use case application. It abstracts the underlaying Interface Driver, i.e. the runtime API is completely device independent. It provides generic API for common use case application.

Example of Standard Interface:

  • Serial communication interface
  • PWM interface
  • Position sensor interface
  • Timer interface
  • EEPROM interface

The target is to be able to exchange the microcontroller or external connected devices on which the application is based with a minimal impact on the application code, to reduce the application software development and maintenance effort. This is archived by the Standard Interface, for which, changing the hardware only requires the update of the device configuration settings and the device initialization code. The API used at runtime, which represents the majority and the complexitity of the related code keep unchanged.

Motivation: because the current software developed for the automotive applications mainly don’t use C++, the Standard Interface provides a common definition for the device driver and an alternative layer for different hardware instead of using C++ interface wrapper class.

The below figure shows the layers used and an example of APIs used by the application.

Standard interface layers
Standard interface example: Serial interface as data pipe
Standard interface example: Timer

The Standard Interface is implemented by Standard Interface wrapper by providing the function pointer to the custom functions. This gives the possibility to the programmer to use it or not. When used, it increases the code portability but slightly decreases the performance in term of run time execution and code size. When not used, the performance is not affected.

Definition
The standard interface requires the definition of at least two components: the standard interface component and the standard interface wrapper component. The standard interface component defines for each standard interface a standard interface object and a set of standard APIs used at runtime by the application. The standard interface wrapper component initializes the standard interface component by linking it to the interface driver.
Attention
: The application shall explicitly use the API provided by the standard interface component at runtime to access driver’s parameters (setter/ getter) or action (methods). Trying to access members of the standard interface component directly though the object may not guaranty future code compatibility. The same applies to the interface driver (reminder).
Convention

The Standard interface defines the following files:

Path/File | Description --—
1_SrvSw/StdIf/IfxStdIf.h | Global standard interface definitions
1_SrvSw/StdIf/IfxStdIf_<standard interface>.h | Specific standard interface definitions
TCxxx/<Module>/Ifx<Module>_<interface>.h/c | Specific standard interface wrapper initialization API are reconized by the name Ifx<Module>_<interface>_StdIf<std interface>Init()
TCxxx/<Module>/Ifx<Module>_<interface>.h/c | Specific standard interface wrapper function API are named according to the interface driver naming rules


iLLD_TC26B: Standard interface: Data Pipe

Functions
Standard interface: Data Pipe
Service software » Standard interface
Collaboration diagram for Standard interface: Data Pipe:

Functions

IFX_INLINE boolean | IfxStdIf_DPipe_write (IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe. More...
IFX_INLINE boolean | IfxStdIf_DPipe_read (IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object. More...
IFX_INLINE sint32 | IfxStdIf_DPipe_getReadCount (IfxStdIf_DPipe *stdIf)
Returns the number of bytes in the rx buffer. More...
IFX_INLINE sint32 | IfxStdIf_DPipe_getWriteCount (IfxStdIf_DPipe *stdIf)
Returns the number of free bytes (free space) in the tx buffer. More...
IFX_INLINE boolean | IfxStdIf_DPipe_canReadCount (IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer. More...
IFX_INLINE boolean | IfxStdIf_DPipe_canWriteCount (IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
IFX_INLINE IfxStdIf_DPipe_ReadEvent | IfxStdIf_DPipe_getReadEvent (IfxStdIf_DPipe *stdIf)
Returns read event object. More...
IFX_INLINE IfxStdIf_DPipe_WriteEvent | IfxStdIf_DPipe_getWriteEvent (IfxStdIf_DPipe *stdIf)
Returns write event object. More...
IFX_INLINE boolean | IfxStdIf_DPipe_flushTx (IfxStdIf_DPipe *stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data. More...
IFX_INLINE void | IfxStdIf_DPipe_clearTx (IfxStdIf_DPipe *stdIf)
Clears the TX buffer by removing all data. More...
IFX_INLINE void | IfxStdIf_DPipe_clearRx (IfxStdIf_DPipe *stdIf)
Clears the RX buffer by removing all data. More...
IFX_INLINE void | IfxStdIf_DPipe_onReceive (IfxStdIf_DPipe *stdIf)
handler called on reveive event More...
IFX_INLINE void | IfxStdIf_DPipe_onTransmit (IfxStdIf_DPipe *stdIf)
handler called on transmit event More...
IFX_INLINE void | IfxStdIf_DPipe_onError (IfxStdIf_DPipe *stdIf)
handler called on error event More...
IFX_INLINE uint32 | IfxStdIf_DPipe_getSendCount (IfxStdIf_DPipe *stdIf)
Returns number of bytes send. More...
IFX_INLINE Ifx_TickTime | IfxStdIf_DPipe_getTxTimeStamp (IfxStdIf_DPipe *stdIf)
Returns the time stamp of the last transmit data. More...
IFX_INLINE void | IfxStdIf_DPipe_resetSendCount (IfxStdIf_DPipe *stdIf)
Reset the sendCount counter. More...
IFX_EXTERN void | IfxStdIf_DPipe_print (IfxStdIf_DPipe *stdIf, pchar format,...)

Detailed Description

The standard interafce data pipe (DPipe) abstract the hardware used for data transfer. It provide, after proper initialization an hardware independant way to write and read data to/from as communciation channel.

Porting StandardIo to DPipe
replace all
  • StandardIo type with IfxStdIf_DPipe
  • StandardIo_print with IfxStdIf_DPipe_print delete StandardIo.c and StandardIo.h Include "StdIf/IfxStdIf_DPipe.h" instead of "SysSe/Bsp/StandardIo.h"

The following files are already ported: Ifx_Console, Ifx_Shell

Function Documentation

◆ IfxStdIf_DPipe_canReadCount()

IFX_INLINE boolean IfxStdIf_DPipe_canReadCount | ( | IfxStdIf_DPipe * | stdIf,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Indicates if the required number of bytes are available for read in the buffer.

Parameters
stdif | Pointer to the interface driver object
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes are available for read in the rx buffer, if not the Event is armed to be set when the buffer count is bigger or equal to the requested count

Definition at line 291 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_canWriteCount()

IFX_INLINE boolean IfxStdIf_DPipe_canWriteCount | ( | IfxStdIf_DPipe * | stdIf,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Indicates if there is enough free space to write the data in the buffer.

Parameters
stdif | Pointer to the interface driver object
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes can be written to the tx buffer, if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count

Definition at line 299 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_clearRx()

IFX_INLINE void IfxStdIf_DPipe_clearRx ( IfxStdIf_DPipe * stdIf )

Clears the RX buffer by removing all data.

Parameters
stdif Pointer to the interface driver object
Returns
void

Definition at line 339 of file IfxStdIf_DPipe.h.

Referenced by Ifx_Shell_enable().

◆ IfxStdIf_DPipe_clearTx()

IFX_INLINE void IfxStdIf_DPipe_clearTx ( IfxStdIf_DPipe * stdIf )

Clears the TX buffer by removing all data.

Parameters
stdif Pointer to the interface driver object
Returns
void

Definition at line 331 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_flushTx()

IFX_INLINE boolean IfxStdIf_DPipe_flushTx | ( | IfxStdIf_DPipe * | stdIf,
 |  | Ifx_TickTime | timeout
 | ) |  |

Flush the transmit buffer by transmitting all data.

Parameters
stdif | Pointer to the interface driver object
timeout | timeout for the flush operation
Returns
Returns TRUE if the FIFO is empty

Definition at line 323 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getReadCount()

IFX_INLINE sint32 IfxStdIf_DPipe_getReadCount ( IfxStdIf_DPipe * stdIf )

Returns the number of bytes in the rx buffer.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the number of bytes in the rx buffer

Definition at line 275 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getReadEvent()

IFX_INLINE IfxStdIf_DPipe_ReadEvent IfxStdIf_DPipe_getReadEvent ( IfxStdIf_DPipe * stdIf )

Returns read event object.

Parameters
stdif Pointer to the interface driver object
Returns
Returns read event object

Definition at line 307 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getSendCount()

IFX_INLINE uint32 IfxStdIf_DPipe_getSendCount ( IfxStdIf_DPipe * stdIf )

Returns number of bytes send.

Parameters
stdif Pointer to the interface driver object
Returns
Returns number of bytes send

Definition at line 371 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getTxTimeStamp()

IFX_INLINE Ifx_TickTime IfxStdIf_DPipe_getTxTimeStamp ( IfxStdIf_DPipe * stdIf )

Returns the time stamp of the last transmit data.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the time stamp of the last transmit data

Definition at line 379 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getWriteCount()

IFX_INLINE sint32 IfxStdIf_DPipe_getWriteCount ( IfxStdIf_DPipe * stdIf )

Returns the number of free bytes (free space) in the tx buffer.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the number of free bytes in the tx buffer

Definition at line 283 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getWriteEvent()

IFX_INLINE IfxStdIf_DPipe_WriteEvent IfxStdIf_DPipe_getWriteEvent ( IfxStdIf_DPipe * stdIf )

Returns write event object.

Parameters
stdif Pointer to the interface driver object
Returns
Returns write event object

Definition at line 315 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_onError()

IFX_INLINE void IfxStdIf_DPipe_onError ( IfxStdIf_DPipe * stdIf )

handler called on error event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 363 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_onReceive()

IFX_INLINE void IfxStdIf_DPipe_onReceive ( IfxStdIf_DPipe * stdIf )

handler called on reveive event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 347 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_onTransmit()

IFX_INLINE void IfxStdIf_DPipe_onTransmit ( IfxStdIf_DPipe * stdIf )

handler called on transmit event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 355 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_print()

IFX_EXTERN void IfxStdIf_DPipe_print | ( | IfxStdIf_DPipe * | stdIf,
 |  | pchar | format,
 |  |  | ...
 | ) |  |

Definition at line 50 of file IfxStdIf_DPipe.c.

Referenced by Ifx_Assert_doLevel(), Ifx_Assert_doValidate(), Ifx_Shell_bbProtocolStart(), Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_init(), Ifx_Shell_printSyntax(), Ifx_Shell_process(), Ifx_Shell_protocolStart(), Ifx_Shell_showHelpSingle(), Ifx_Shell_showHelpSingleCommand(), and IfxStdIf_Pos_printStatus().

◆ IfxStdIf_DPipe_read()

IFX_INLINE boolean IfxStdIf_DPipe_read | ( | IfxStdIf_DPipe * | stdIf,
 |  | void * | data,
 |  | Ifx_SizeT * | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Read data from the IfxStdIf_DPipe object.

Initially the parameter 'count' specifies count of data to read. After execution the data pointed by 'count' specifies the data actually read.

Parameters
stdif | Pointer to the interface driver object
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Return values
TRUE | Returns TRUE if all items could be read
FALSE | Returns FALSE if not all the items could be read

Definition at line 267 of file IfxStdIf_DPipe.h.

Referenced by Ifx_Shell_process().

◆ IfxStdIf_DPipe_resetSendCount()

IFX_INLINE void IfxStdIf_DPipe_resetSendCount ( IfxStdIf_DPipe * stdIf )

Reset the sendCount counter.

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 387 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_write()

IFX_INLINE boolean IfxStdIf_DPipe_write | ( | IfxStdIf_DPipe * | stdIf,
 |  | void * | data,
 |  | Ifx_SizeT * | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Write binary data into the IfxStdIf_DPipe.

Initially the parameter 'count' specifies count of data to write. After execution the data pointed by 'count' specifies the data actually written

Parameters
stdif | Pointer to the interface driver object
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Return values
TRUE | Returns TRUE if all items could be written
FALSE | Returns FALSE if not all the items could be written

Definition at line 259 of file IfxStdIf_DPipe.h.

Referenced by Ifx_Console_print(), Ifx_Console_printAlign(), and IfxStdIf_DPipe_print().


iLLD_TC26B: Standard interface: Position interface

Functions
Standard interface: Position interface
Service software » Standard interface
Collaboration diagram for Standard interface: Position interface:

Functions

IFX_INLINE void | IfxStdIf_Pos_onZeroIrq (IfxStdIf_Pos *stdIf)
Handles the zero interrupt. More...
IFX_INLINE float32 | IfxStdIf_Pos_getAbsolutePosition (IfxStdIf_Pos *stdIf)
Return the position, inclusive turns. More...
IFX_INLINE IfxStdIf_Pos_Status | IfxStdIf_Pos_getFault (IfxStdIf_Pos *stdIf)
Return the sensor status. MCMETILLD-521 More...
IFX_INLINE sint32 | IfxStdIf_Pos_getOffset (IfxStdIf_Pos *stdIf)
Return the raw position sensor offset. More...
IFX_INLINE float32 | IfxStdIf_Pos_getPosition (IfxStdIf_Pos *stdIf)
Return the position. More...
IFX_INLINE IfxStdIf_Pos_Dir | IfxStdIf_Pos_getDirection (IfxStdIf_Pos *stdIf)
Return the direction. More...
IFX_INLINE uint16 | IfxStdIf_Pos_getPeriodPerRotation (IfxStdIf_Pos *stdIf)
Return the period per rotation setting. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getRawPosition (IfxStdIf_Pos *stdIf)
Return the raw position in ticks. More...
IFX_INLINE float32 | IfxStdIf_Pos_getRefreshPeriod (IfxStdIf_Pos *stdIf)
Get the update period. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getResolution (IfxStdIf_Pos *stdIf)
Get the resolution. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getTurn (IfxStdIf_Pos *stdIf)
Return position in turn. More...
IFX_INLINE IfxStdIf_Pos_SensorType | IfxStdIf_Pos_getSensorType (IfxStdIf_Pos *stdIf)
Get the sensor type. More...
IFX_INLINE float32 | IfxStdIf_Pos_getSpeed (IfxStdIf_Pos *stdIf)
Return the speed. More...
IFX_INLINE boolean | IfxStdIf_Pos_isFault (IfxStdIf_Pos *stdIf)
IFX_INLINE void | IfxStdIf_Pos_onEventA (IfxStdIf_Pos *stdIf)
Handles the A sensor event Event A is a sensor defined event. it is optional. More...
IFX_INLINE void | IfxStdIf_Pos_update (IfxStdIf_Pos *stdIf)
Refresh the status. More...
IFX_INLINE void | IfxStdIf_Pos_reset (IfxStdIf_Pos *stdIf)
Reset the driver. More...
IFX_INLINE void | IfxStdIf_Pos_resetFaults (IfxStdIf_Pos *stdIf)
Reset the driver fault. More...
IFX_INLINE void | IfxStdIf_Pos_setOffset (IfxStdIf_Pos *stdIf, sint32 offset)
Set the sensor offset. More...
IFX_INLINE void | IfxStdIf_Pos_setPosition (IfxStdIf_Pos *stdIf, float32 position)
Set the sensor position (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setRawPosition (IfxStdIf_Pos *stdIf, sint32 position)
Set the sensor position (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setSpeed (IfxStdIf_Pos *stdIf, float32 speed)
Set the sensor speed (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setRefreshPeriod (IfxStdIf_Pos *stdIf, float32 updatePeriod)
Set the update period. More...

Detailed Description

The standard interface position interface (IfxStdIf_Pos) abstract the hardware used for position interface feature like encoder, hall, resolver, ... It provide, after proper initialization an hardware Independent way to interact with the position sensor like getting position, speed, direction, ...

The figure below shows the standard position interface.

Standard position interface

This interface defines the following features:

Function Documentation

◆ IfxStdIf_Pos_getAbsolutePosition()

IFX_INLINE float32 IfxStdIf_Pos_getAbsolutePosition ( IfxStdIf_Pos * stdIf )

Return the position, inclusive turns.

Return the sensor position in rad for rotating sensor inclusive turns, or in m for linear sensors. For linear sensor the effect is the same as IfxStdIf_Pos_GetPosition.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the position inclusive turns in rad
Parameters
stdIf Standard interface pointer

Definition at line 341 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getDirection()

IFX_INLINE IfxStdIf_Pos_Dir IfxStdIf_Pos_getDirection ( IfxStdIf_Pos * stdIf )

Return the direction.

Return the sensor direction.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the direction
Parameters
stdIf Standard interface pointer

Definition at line 377 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getFault()

IFX_INLINE IfxStdIf_Pos_Status IfxStdIf_Pos_getFault ( IfxStdIf_Pos * stdIf )

Return the sensor status. MCMETILLD-521

Parameters
stdIf Pointer to the interface driver object
Returns
Return the sensor status MCMETILLD-521
Parameters
stdIf Standard interface pointer

Definition at line 350 of file IfxStdIf_Pos.h.

Referenced by IfxStdIf_Pos_isFault(), and IfxStdIf_Pos_printStatus().

◆ IfxStdIf_Pos_getOffset()

IFX_INLINE sint32 IfxStdIf_Pos_getOffset ( IfxStdIf_Pos * stdIf )

Return the raw position sensor offset.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the raw position sensor offset sensor in ticks
Parameters
stdIf Standard interface pointer

Definition at line 359 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getPeriodPerRotation()

IFX_INLINE uint16 IfxStdIf_Pos_getPeriodPerRotation ( IfxStdIf_Pos * stdIf )

Return the period per rotation setting.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the period per rotation setting
Parameters
stdIf Standard interface pointer

Definition at line 386 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getPosition()

IFX_INLINE float32 IfxStdIf_Pos_getPosition ( IfxStdIf_Pos * stdIf )

Return the position.

Return the sensor position in rad for rotating sensor or in m for linear sensors. For rotating sensor, the position is always between 0 and 2*IFX_PI.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the position in rad or m
Parameters
stdIf Standard interface pointer

Definition at line 368 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getRawPosition()

IFX_INLINE sint32 IfxStdIf_Pos_getRawPosition ( IfxStdIf_Pos * stdIf )

Return the raw position in ticks.

Return the sensor raw position in ticks.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the raw position in ticks
Parameters
stdIf Standard interface pointer

Definition at line 395 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getRefreshPeriod()

IFX_INLINE float32 IfxStdIf_Pos_getRefreshPeriod ( IfxStdIf_Pos * stdIf )

Get the update period.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the update period in s
Parameters
stdIf Standard interface pointer

Definition at line 404 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getResolution()

IFX_INLINE sint32 IfxStdIf_Pos_getResolution ( IfxStdIf_Pos * stdIf )

Get the resolution.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the resolution
Parameters
stdIf Standard interface pointer

Definition at line 413 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getSensorType()

IFX_INLINE IfxStdIf_Pos_SensorType IfxStdIf_Pos_getSensorType ( IfxStdIf_Pos * stdIf )

Get the sensor type.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the sensor type
Parameters
stdIf Standard interface pointer

Definition at line 431 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getSpeed()

IFX_INLINE float32 IfxStdIf_Pos_getSpeed ( IfxStdIf_Pos * stdIf )

Return the speed.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the speed in rad/s or m/s
Parameters
stdIf Standard interface pointer

Definition at line 440 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getTurn()

IFX_INLINE sint32 IfxStdIf_Pos_getTurn ( IfxStdIf_Pos * stdIf )

Return position in turn.

Parameters
stdIf Pointer to the interface driver object
Returns
Return position in turn
Parameters
stdIf Standard interface pointer

Definition at line 422 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_isFault()

IFX_INLINE boolean IfxStdIf_Pos_isFault ( IfxStdIf_Pos * stdIf )

Check whether the sensor is faulty

Parameters
stdIf Standard interface pointer

Definition at line 449 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_onEventA()

IFX_INLINE void IfxStdIf_Pos_onEventA ( IfxStdIf_Pos * stdIf )

Handles the A sensor event Event A is a sensor defined event. it is optional.

Parameters
stdIf Pointer to the interface driver object
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 458 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_onZeroIrq()

IFX_INLINE void IfxStdIf_Pos_onZeroIrq ( IfxStdIf_Pos * stdIf )

Handles the zero interrupt.

Parameters
stdIf Pointer to the interface driver object
Returns
none

Definition at line 332 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_reset()

IFX_INLINE void IfxStdIf_Pos_reset ( IfxStdIf_Pos * stdIf )

Reset the driver.

Clear faults, reset speed and position to 0

Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 476 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_resetFaults()

IFX_INLINE void IfxStdIf_Pos_resetFaults ( IfxStdIf_Pos * stdIf )

Reset the driver fault.

Clear faults

Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 485 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_setOffset()

IFX_INLINE void IfxStdIf_Pos_setOffset | ( | IfxStdIf_Pos * | stdIf,
 |  | sint32 | offset
 | ) |  |

Set the sensor offset.

Parameters
stdIf | Pointer to the interface driver object
offset | Offset in sensor ticks
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 494 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_setPosition()

IFX_INLINE void IfxStdIf_Pos_setPosition | ( | IfxStdIf_Pos * | stdIf,
 |  | float32 | position
 | ) |  |

Set the sensor position (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
position | Position sensor rad
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 503 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_setRawPosition()

IFX_INLINE void IfxStdIf_Pos_setRawPosition | ( | IfxStdIf_Pos * | stdIf,
 |  | sint32 | position
 | ) |  |

Set the sensor position (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
position | Position sensor ticks
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 512 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_setRefreshPeriod()

IFX_INLINE void IfxStdIf_Pos_setRefreshPeriod | ( | IfxStdIf_Pos * | stdIf,
 |  | float32 | updatePeriod
 | ) |  |

Set the update period.

Parameters
stdIf | Pointer to the interface driver object
updatePeriod | Refresh period in s
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 530 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_setSpeed()

IFX_INLINE void IfxStdIf_Pos_setSpeed | ( | IfxStdIf_Pos * | stdIf,
 |  | float32 | speed
 | ) |  |

Set the sensor speed (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
speed | speed in rad/s
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 521 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_update()

IFX_INLINE void IfxStdIf_Pos_update ( IfxStdIf_Pos * stdIf )

Refresh the status.

Update the stdIf state like speed, position, status, taking into account the updatePeriod

Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 467 of file IfxStdIf_Pos.h.


iLLD_TC26B: Standard interface: Multi-channels, dual-complementary PWM interface

Functions | Variables
Standard interface: Multi-channels, dual-complementary PWM interface
Service software » Standard interface
Collaboration diagram for Standard interface: Multi-channels, dual-complementary PWM interface:

Functions

IFX_INLINE boolean | IfxStdIf_PwmHl_setDeadtime (IfxStdIf_PwmHl *stdIf, float32 deadtime)
Set the dead time in s. More...
IFX_INLINE float32 | IfxStdIf_PwmHl_getDeadtimetick (IfxStdIf_PwmHl *stdIf)
Set the dead time in s. More...
IFX_INLINE float32 | IfxStdIf_PwmHl_getDeadtime (IfxStdIf_PwmHl *stdIf)
Return the dead time in s. More...
IFX_INLINE boolean | IfxStdIf_PwmHl_setMinPulse (IfxStdIf_PwmHl *stdIf, float32 minPulse)
Set the minimum pulse time in s. More...
IFX_INLINE float32 | IfxStdIf_PwmHl_getMinPulse (IfxStdIf_PwmHl *stdIf)
Return the minimum pulse time in s. More...
IFX_INLINE Ifx_Pwm_Mode | IfxStdIf_PwmHl_getMode (IfxStdIf_PwmHl *stdIf)
Return the PWM mode. More...
IFX_INLINE boolean | IfxStdIf_PwmHl_setMode (IfxStdIf_PwmHl *stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode. More...
IFX_INLINE void | IfxStdIf_PwmHl_setOnTime (IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time. More...
IFX_INLINE void | IfxStdIf_PwmHl_setOnTimeAndShift (IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value. More...
IFX_INLINE void | IfxStdIf_PwmHl_setPulse (IfxStdIf_PwmHl *stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently. More...
IFX_INLINE void | IfxStdIf_PwmHl_setupChannels (IfxStdIf_PwmHl *stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...
IFX_INLINE IfxStdIf_Timer * | IfxStdIf_PwmHl_getTimer (IfxStdIf_PwmHl *stdIf)
Return the timer standard interface used by the IfxStdIf_PwmHl standard interface. More...
IFX_EXTERN void | IfxStdIf_PwmHl_initConfig (IfxStdIf_PwmHl_Config *config)

Variables

IfxStdIf_InterfaceDriver driver
Interface driver object. More...
IfxStdIf_PwmHl_SetDeadtime setDeadtime
IfxStdIf_PwmHl_SetDeadtime. More...
IfxStdIf_PwmHl_GetDeadtime getDeadtime
IfxStdIf_PwmHl_GetDeadtime. More...
IfxStdIf_PwmHl_GetDeadtimeTick getDeadtimeTick
IfxStdIf_PwmHl_SetMinPulse setMinPulse
IfxStdIf_PwmHl_SetMinPulse. More...
IfxStdIf_PwmHl_GetMinPulse getMinPulse
IfxStdIf_PwmHl_GetMinPulse. More...
IfxStdIf_PwmHl_GetMode getMode
IfxStdIf_PwmHl_GetMode. More...
IfxStdIf_PwmHl_SetMode setMode
IfxStdIf_PwmHl_SetMode. More...
IfxStdIf_PwmHl_SetOnTime setOnTime
IfxStdIf_PwmHl_SetOnTime. More...
IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTime. More...
IfxStdIf_PwmHl_SetPulse setPulse
IfxStdIf_PwmHl_Pulse. More...
IfxStdIf_PwmHl_SetupChannels setupChannels
IfxStdIf_PwmHl_SetupChannels. More...
IfxStdIf_Timer timer
Timer related standard interface. More...
float32 deadtime
Dead time between the top and bottom channels in seconds. More...
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds. More...
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel. More...
boolean emergencyEnabled
Specifies if the emergency stop should be enabled or not. More...
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins. More...
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins. More...
Ifx_ActiveState ccxOutputEnabled
Ifx_ActiveState coutxOutputEnabled
Ifx_ActiveState ccxActiveState
Top PWM active state. More...
Ifx_ActiveState coutxActiveState
Bottom PWM active state. More...

Detailed Description

The standard interface pwm high/low (PwmHl) abstract the hardware used for pwm feature. It provide, after proper initialization an hardware independant way to interact with the PWM functionallity like setting duty cycles, dead time,timer functionalities, ...

The figure below shows the standard Multi-channels, dual-complementary PWM interface.

Standard Multi-channels, dual-complementary PWM interface

This PWM interface provides multiple dual-complementary PWM channels. Each dual-complementary PWM channel is made of two PWM channels, a top channel CCx and a bottom channel COUTx. The interface implements the Standard interface: Timer.

This interface defines the following features:

  • Configurable duty cycle from 0% to 100%
  • Adjustable dead-time between top and bottom channels
  • Center aligned, left aligned, right aligned PWM
  • Optional minimal pulse cancellation
  • Optional emergency stop
  • Configurable signal active state for top and bottom PWM
  • Configurable output ports
  • Inherit the features from library_srvsw_stdif_timer

Example of signal generation in center aligned mode:

Standard Multi-channels, dual-complementary PWM interface - Center aligned mode

Function Documentation

◆ IfxStdIf_PwmHl_getDeadtime()

IFX_INLINE float32 IfxStdIf_PwmHl_getDeadtime ( IfxStdIf_PwmHl * stdIf )

Return the dead time in s.

It returns the last dead time values set by IfxStdIf_PwmHl_SetDeadtime() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the deadtime in second
Parameters
stdIf Standard interface pointer

Definition at line 242 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_getDeadtimetick()

IFX_INLINE float32 IfxStdIf_PwmHl_getDeadtimetick ( IfxStdIf_PwmHl * stdIf )

Set the dead time in s.

Parameters
stdIf | Pointer to the interface driver object
deadtime | deadtime in second
Return values
TRUE | In case of success
FALSE | In case of failure
Parameters
stdIf Standard interface pointer

Definition at line 234 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_getMinPulse()

IFX_INLINE float32 IfxStdIf_PwmHl_getMinPulse ( IfxStdIf_PwmHl * stdIf )

Return the minimum pulse time in s.

It returns the last minimum pulse time values set by IfxStdIf_PwmHl_SetMinPulse() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the minimum pulse time in second
Parameters
stdIf Standard interface pointer

Definition at line 260 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_getMode()

IFX_INLINE Ifx_Pwm_Mode IfxStdIf_PwmHl_getMode ( IfxStdIf_PwmHl * stdIf )

Return the PWM mode.

It returns the last pwm mode set by IfxStdIf_PwmHl_SetMode() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the pwm mode
Parameters
stdIf Standard interface pointer

Definition at line 269 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_getTimer()

IFX_INLINE IfxStdIf_Timer* IfxStdIf_PwmHl_getTimer ( IfxStdIf_PwmHl * stdIf )

Return the timer standard interface used by the IfxStdIf_PwmHl standard interface.

Parameters
stdIf Standard interface pointer
Returns
Returns the pointer to the IfxStdIf_Timer object

Definition at line 324 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_initConfig()

IFX_EXTERN void IfxStdIf_PwmHl_initConfig ( IfxStdIf_PwmHl_Config * config )

Initialize the configuration structure to default

Parameters
config Timer configuration. This parameter is initialised by the function

Definition at line 45 of file IfxStdIf_PwmHl.c.

Referenced by IfxCcu6_PwmHl_initConfig(), IfxGtm_Atom_PwmHl_initConfig(), and IfxGtm_Tom_PwmHl_initConfig().

◆ IfxStdIf_PwmHl_setDeadtime()

IFX_INLINE boolean IfxStdIf_PwmHl_setDeadtime | ( | IfxStdIf_PwmHl * | stdIf,
 |  | float32 | deadtime
 | ) |  |

Set the dead time in s.

Parameters
stdIf | Pointer to the interface driver object
deadtime | deadtime in second
Return values
TRUE | In case of success
FALSE | In case of failure
Parameters
stdIf Standard interface pointer

Definition at line 222 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setMinPulse()

IFX_INLINE boolean IfxStdIf_PwmHl_setMinPulse | ( | IfxStdIf_PwmHl * | stdIf,
 |  | float32 | minPulse
 | ) |  |

Set the minimum pulse time in s.

Parameters
stdIf | Pointer to the interface driver object
minPulse | minimal pulse in second
Return values
TRUE | In case of success
FALSE | In case of failure
Parameters
stdIf Standard interface pointer

Definition at line 251 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setMode()

IFX_INLINE boolean IfxStdIf_PwmHl_setMode | ( | IfxStdIf_PwmHl * | stdIf,
 |  | Ifx_Pwm_Mode | mode
 | ) |  |

Set the pwm mode.

Parameters
stdIf | Pointer to the interface driver object
mode | PWM mode
Return values
TRUE | In case of success
FALSE | In case of failure (feature not supported)
Parameters
stdIf Standard interface pointer

Definition at line 278 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setOnTime()

IFX_INLINE void IfxStdIf_PwmHl_setOnTime | ( | IfxStdIf_PwmHl * | stdIf,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Set the pwm ON time.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 287 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setOnTimeAndShift()

IFX_INLINE void IfxStdIf_PwmHl_setOnTimeAndShift | ( | IfxStdIf_PwmHl * | stdIf,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Set the pwm ON time and shift value.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
shift | Pointer to an array of shift values in ticks. The array size must be equal to the number of PWM channels
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 296 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setPulse()

IFX_INLINE void IfxStdIf_PwmHl_setPulse | ( | IfxStdIf_PwmHl * | stdIf,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Set the pwm pulse of all switched independently.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Pointer to an array of offset values in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 305 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setupChannels()

IFX_INLINE void IfxStdIf_PwmHl_setupChannels | ( | IfxStdIf_PwmHl * | stdIf,
 |  | boolean * | activeCh,
 |  | boolean * | stuckSt
 | ) |  |

Set channels which are generating PWM or in "stuck-at" state.

Parameters
stdIf | Pointer to the interface driver object
activeCh | Pointer to boolean array containing values for PWM channels. If FALSE, the channel will be in stuck-at state, else the channel will generate PWM.
stuckSt | Pointer to boolean array containing values for active channels. If FALSE, the stuck-at state is passive level, else the stuck-at state is active level.
Note
The values for the parameters are arranged as follows: index = 0 –> phase 0 top index = 1 –> phase 0 bottom index = 2 –> phase 1 top index = 3 –> phase 1 bottom index = 4 –> phase 2 top index = 5 –> phase 2 bottom

Definition at line 313 of file IfxStdIf_PwmHl.h.

Variable Documentation

◆ ccxActiveState

Ifx_ActiveState ccxActiveState

Top PWM active state.

Definition at line 211 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_init(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxStdIf_PwmHl_initConfig().

◆ ccxOutputEnabled

Ifx_ActiveState ccxOutputEnabled

Definition at line 209 of file IfxStdIf_PwmHl.h.

◆ channelCount

uint8 channelCount

Number of PWM channels, one channel is made of a top and bottom channel.

Definition at line 204 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_init(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxStdIf_PwmHl_initConfig().

◆ coutxActiveState

Ifx_ActiveState coutxActiveState

Bottom PWM active state.

Definition at line 212 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_init(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxStdIf_PwmHl_initConfig().

◆ coutxOutputEnabled

Ifx_ActiveState coutxOutputEnabled

Definition at line 210 of file IfxStdIf_PwmHl.h.

◆ deadtime

float32 deadtime

Dead time between the top and bottom channels in seconds.

Definition at line 202 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_init(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxStdIf_PwmHl_initConfig().

◆ driver

IfxStdIf_InterfaceDriver driver

Interface driver object.

Definition at line 181 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), IfxStdIf_PwmHl_getDeadtime(), IfxStdIf_PwmHl_getDeadtimetick(), IfxStdIf_PwmHl_getMinPulse(), IfxStdIf_PwmHl_getMode(), IfxStdIf_PwmHl_setDeadtime(), IfxStdIf_PwmHl_setMinPulse(), IfxStdIf_PwmHl_setMode(), IfxStdIf_PwmHl_setOnTime(), IfxStdIf_PwmHl_setOnTimeAndShift(), and IfxStdIf_PwmHl_setPulse().

◆ emergencyEnabled

boolean emergencyEnabled

Specifies if the emergency stop should be enabled or not.

Definition at line 205 of file IfxStdIf_PwmHl.h.

Referenced by IfxStdIf_PwmHl_initConfig().

◆ getDeadtime

IfxStdIf_PwmHl_GetDeadtime getDeadtime

IfxStdIf_PwmHl_GetDeadtime.

Definition at line 185 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_getDeadtime().

◆ getDeadtimeTick

IfxStdIf_PwmHl_GetDeadtimeTick getDeadtimeTick

IfxStdIf_PwmHl_GetDeadtimetick

Definition at line 186 of file IfxStdIf_PwmHl.h.

Referenced by IfxStdIf_PwmHl_getDeadtimetick().

◆ getMinPulse

IfxStdIf_PwmHl_GetMinPulse getMinPulse

IfxStdIf_PwmHl_GetMinPulse.

Definition at line 188 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_getMinPulse().

◆ getMode

IfxStdIf_PwmHl_GetMode getMode

IfxStdIf_PwmHl_GetMode.

Definition at line 189 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_getMode().

◆ minPulse

float32 minPulse

Min pulse allowed as active state for the top and bottom PWM in seconds.

Definition at line 203 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_init(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxStdIf_PwmHl_initConfig().

◆ outputDriver

IfxPort_PadDriver outputDriver

Output pad driver of ccx and coutx pins.

Definition at line 208 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_setOutputPins(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxStdIf_PwmHl_initConfig().

◆ outputMode

IfxPort_OutputMode outputMode

Output mode of ccx and coutx pins.

Definition at line 207 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_setOutputPins(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Tom_PwmHl_init(), and IfxStdIf_PwmHl_initConfig().

◆ setDeadtime

IfxStdIf_PwmHl_SetDeadtime setDeadtime

IfxStdIf_PwmHl_SetDeadtime.

Definition at line 184 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_setDeadtime().

◆ setMinPulse

IfxStdIf_PwmHl_SetMinPulse setMinPulse

IfxStdIf_PwmHl_SetMinPulse.

Definition at line 187 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_setMinPulse().

◆ setMode

IfxStdIf_PwmHl_SetMode setMode

IfxStdIf_PwmHl_SetMode.

Definition at line 190 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_setMode().

◆ setOnTime

IfxStdIf_PwmHl_SetOnTime setOnTime

IfxStdIf_PwmHl_SetOnTime.

Definition at line 191 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_setOnTime().

◆ setOnTimeAndShift

IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift

IfxStdIf_PwmHl_SetOnTime.

Definition at line 192 of file IfxStdIf_PwmHl.h.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_setOnTimeAndShift().

◆ setPulse

IfxStdIf_PwmHl_SetPulse setPulse

IfxStdIf_PwmHl_Pulse.

Definition at line 193 of file IfxStdIf_PwmHl.h.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_setPulse().

◆ setupChannels

IfxStdIf_PwmHl_SetupChannels setupChannels

IfxStdIf_PwmHl_SetupChannels.

Definition at line 194 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), and IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ timer

IfxStdIf_Timer timer

Timer related standard interface.

Definition at line 196 of file IfxStdIf_PwmHl.h.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), and IfxStdIf_PwmHl_getTimer().


iLLD_TC26B: Standard interface: Timer

Functions
Standard interface: Timer
Service software » Standard interface
Collaboration diagram for Standard interface: Timer:

Functions

IFX_INLINE float32 | IfxStdIf_Timer_getFrequency (IfxStdIf_Timer *stdIf)
Return the timer frequency in Hz. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_getPeriod (IfxStdIf_Timer *stdIf)
Return the timer period in ticks. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_getTrigger (IfxStdIf_Timer *stdIf)
Return the timer trigger point. More...
IFX_INLINE float32 | IfxStdIf_Timer_getResolution (IfxStdIf_Timer *stdIf)
Return the timer resolution in seconds. More...
IFX_INLINE boolean | IfxStdIf_Timer_setFrequency (IfxStdIf_Timer *stdIf, float32 frequency)
Set the timer frequency in Hz. More...
IFX_INLINE void | IfxStdIf_Timer_updateInputFrequency (IfxStdIf_Timer *stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account. More...
IFX_INLINE void | IfxStdIf_Timer_applyUpdate (IfxStdIf_Timer *stdIf)
Apply requested updates. More...
IFX_INLINE void | IfxStdIf_Timer_disableUpdate (IfxStdIf_Timer *stdIf)
Disable updates. More...
IFX_INLINE float32 | IfxStdIf_Timer_getInputFrequency (IfxStdIf_Timer *stdIf)
Return the timer input frequency in Hz. More...
IFX_INLINE void | IfxStdIf_Timer_run (IfxStdIf_Timer *stdIf)
Immediately start the timer. More...
IFX_INLINE boolean | IfxStdIf_Timer_setPeriod (IfxStdIf_Timer *stdIf, Ifx_TimerValue period)
Set the timer period. More...
IFX_INLINE void | IfxStdIf_Timer_setSingleMode (IfxStdIf_Timer *stdIf, boolean enabled)
Stop timer at the end of the period. More...
IFX_INLINE void | IfxStdIf_Timer_setTrigger (IfxStdIf_Timer *stdIf, Ifx_TimerValue triggerPoint)
Set trigger point. More...
IFX_INLINE void | IfxStdIf_Timer_stop (IfxStdIf_Timer *stdIf)
Immediately stops the timer. More...
IFX_INLINE boolean | IfxStdIf_Timer_ackTimerIrq (IfxStdIf_Timer *stdIf)
Return the timer interrupt flag and reset it. More...
IFX_INLINE boolean | IfxStdIf_Timer_ackTriggerIrq (IfxStdIf_Timer *stdIf)
Return the trigger interrupt flag and reset it. More...
IFX_INLINE float32 | IfxStdIf_Timer_tickToS (float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_sToTick (float32 clockFreq, float32 seconds)
Convert seconds to timer ticks. More...
IFX_INLINE float32 | IfxStdIf_Timer_getPeriodSecond (IfxStdIf_Timer *stdIf)
Return the timer period in second. More...

Detailed Description

The standard interface timer (Timer) abstract the hardware used for timer feature. It provide, after proper initialization an hardware independant way to interact with the timer functionallity like setting period, trigger points, ...

The figure below shows the standard timer interface.

Standard timer interface

This interface defines the following features:

  • Timer with configurable frequency
  • Configurable counting direction
  • Optional interrupt on timer event with configurable service request provider and priority
  • Optional trigger signal with:
    • Optional interrupt on trigger event with configurable service request provider and priority
    • Configurable trigger point
    • Configurable trigger edge
    • trigger signal can be internal only or forwarded to a port pin

Function Documentation

◆ IfxStdIf_Timer_ackTimerIrq()

IFX_INLINE boolean IfxStdIf_Timer_ackTimerIrq ( IfxStdIf_Timer * stdIf )

Return the timer interrupt flag and reset it.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer interrupt flag
Parameters
stdIf Standard interface pointer

Definition at line 415 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_ackTriggerIrq()

IFX_INLINE boolean IfxStdIf_Timer_ackTriggerIrq ( IfxStdIf_Timer * stdIf )

Return the trigger interrupt flag and reset it.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the trigger interrupt flag
Parameters
stdIf Standard interface pointer

Definition at line 424 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_applyUpdate()

IFX_INLINE void IfxStdIf_Timer_applyUpdate ( IfxStdIf_Timer * stdIf )

Apply requested updates.

Such requested update are calls to:

  • IfxStdIf_Timer_setSingleMode()
  • IfxStdIf_Timer_setTrigger()
  • IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency() as well as PWM generation related calls such as:
  • IfxStdIf_PwmHl_setDeadtime()
  • IfxStdIf_PwmHl_setMode()
  • IfxStdIf_PwmHl_setOnTime()
  • IfxStdIf_PwmHl_setupChannels()

It is important to note, that only one call to Timer_applyUpdate() is allowed within one timer period!!! In order to ensure correct update synchronisation, disableUpdate() should have been called previously.

Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 343 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_disableUpdate()

IFX_INLINE void IfxStdIf_Timer_disableUpdate ( IfxStdIf_Timer * stdIf )

Disable updates.

The following API action will not be taken in account before applyUpdate is called:

  • IfxStdIf_Timer_setSingleMode()
  • IfxStdIf_Timer_setTrigger()
  • IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency() as well as PWM generation related calls such as:
  • IfxStdIf_PwmHl_setDeadtime()
  • IfxStdIf_PwmHl_setMode()
  • IfxStdIf_PwmHl_setOnTime()
  • IfxStdIf_PwmHl_setupChannels()
Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 352 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_getFrequency()

IFX_INLINE float32 IfxStdIf_Timer_getFrequency ( IfxStdIf_Timer * stdIf )

Return the timer frequency in Hz.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer frequency in Hz
Parameters
stdIf Standard interface pointer

Definition at line 289 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_getInputFrequency()

IFX_INLINE float32 IfxStdIf_Timer_getInputFrequency ( IfxStdIf_Timer * stdIf )

Return the timer input frequency in Hz.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer input frequency in Hz
Parameters
stdIf Standard interface pointer

Definition at line 361 of file IfxStdIf_Timer.h.

Referenced by IfxStdIf_Timer_getPeriodSecond().

◆ IfxStdIf_Timer_getPeriod()

IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getPeriod ( IfxStdIf_Timer * stdIf )

Return the timer period in ticks.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer period in ticks
Parameters
stdIf Standard interface pointer

Definition at line 298 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_getPeriodSecond()

IFX_INLINE float32 IfxStdIf_Timer_getPeriodSecond ( IfxStdIf_Timer * stdIf )

Return the timer period in second.

Parameters
stdIf Pointer to the interface driver object

Definition at line 455 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_getResolution()

IFX_INLINE float32 IfxStdIf_Timer_getResolution ( IfxStdIf_Timer * stdIf )

Return the timer resolution in seconds.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer resolution in seconds
Parameters
stdIf Standard interface pointer

Definition at line 316 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_getTrigger()

IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getTrigger ( IfxStdIf_Timer * stdIf )

Return the timer trigger point.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer timer point
Parameters
stdIf Standard interface pointer

Definition at line 307 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_run()

IFX_INLINE void IfxStdIf_Timer_run ( IfxStdIf_Timer * stdIf )

Immediately start the timer.

Please note that other mechanism may avoid the timer to tick, such as when the global (input) clock to the timer block is inactive.

Parameters
stdIf Pointer to the interface driver object
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 370 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_setFrequency()

IFX_INLINE boolean IfxStdIf_Timer_setFrequency | ( | IfxStdIf_Timer * | stdIf,
 |  | float32 | frequency
 | ) |  |

Set the timer frequency in Hz.

Parameters
stdIf | Pointer to the interface driver object
frequency | Requested timer frequency in Hz
Return values
TRUE | The requested frequency could be set
FALSE | The requested frequency is out of range
Parameters
stdIf Standard interface pointer

Definition at line 325 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_setPeriod()

IFX_INLINE boolean IfxStdIf_Timer_setPeriod | ( | IfxStdIf_Timer * | stdIf,
 |  | Ifx_TimerValue | period
 | ) |  |

Set the timer period.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
period | Period value in ticks
Return values
TRUE | The requested period could be set
FALSE | The requested period is out of range
Parameters
stdIf Standard interface pointer

Definition at line 379 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_setSingleMode()

IFX_INLINE void IfxStdIf_Timer_setSingleMode | ( | IfxStdIf_Timer * | stdIf,
 |  | boolean | enabled
 | ) |  |

Stop timer at the end of the period.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
enabled | If TRUE, enable the single mode, else disable the single mode (continuous mode)
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 388 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_setTrigger()

IFX_INLINE void IfxStdIf_Timer_setTrigger | ( | IfxStdIf_Timer * | stdIf,
 |  | Ifx_TimerValue | triggerPoint
 | ) |  |

Set trigger point.

See also
Timer_OutputEvent for the definition of the output level. Active state is defined by Timer_Config::outputActiveState.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
triggerPoint | Trigger point in ticks from the period start.
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 397 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_stop()

IFX_INLINE void IfxStdIf_Timer_stop ( IfxStdIf_Timer * stdIf )

Immediately stops the timer.

Parameters
stdIf Pointer to the interface driver object
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 406 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_sToTick()

IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick | ( | float32 | clockFreq,
 |  | float32 | seconds
 | ) |  |

Convert seconds to timer ticks.

Parameters
clockFreq | Timer clock frequency
seconds | time value in seconds to be converted
Returns
Return the converted time in timer ticks

Definition at line 446 of file IfxStdIf_Timer.h.

Referenced by IfxCcu6_PwmHl_setDeadtime(), IfxCcu6_PwmHl_setMinPulse(), IfxCcu6_TimerWithTrigger_setFrequency(), IfxGtm_Atom_PwmHl_setDeadtime(), IfxGtm_Atom_PwmHl_setMinPulse(), IfxGtm_Atom_PwmHl_updatePulse(), IfxGtm_Atom_Timer_init(), IfxGtm_Atom_Timer_setFrequency(), IfxGtm_Tom_PwmHl_setDeadtime(), IfxGtm_Tom_PwmHl_setMinPulse(), IfxGtm_Tom_PwmHl_updatePulse(), IfxGtm_Tom_Timer_init(), IfxGtm_Tom_Timer_setFrequency(), and IfxStm_Timer_setFrequency().

◆ IfxStdIf_Timer_tickToS()

IFX_INLINE float32 IfxStdIf_Timer_tickToS | ( | float32 | clockFreq,
 |  | Ifx_TimerValue | ticks
 | ) |  |

Convert timer ticks to seconds.

Parameters
clockFreq | Timer clock frequency
ticks | time value in ticks to be converted
Returns
Return the converted time in s

Definition at line 435 of file IfxStdIf_Timer.h.

Referenced by IfxCcu6_PwmHl_getDeadtime(), IfxCcu6_PwmHl_getMinPulse(), IfxCcu6_TimerWithTrigger_getFrequency(), IfxGtm_Atom_PwmHl_getDeadtime(), IfxGtm_Atom_PwmHl_getMinPulse(), IfxGtm_Atom_Timer_getFrequency(), IfxGtm_Tom_PwmHl_getDeadtime(), IfxGtm_Tom_PwmHl_getMinPulse(), IfxGtm_Tom_Timer_getFrequency(), IfxStdIf_Timer_getPeriodSecond(), and IfxStm_Timer_getFrequency().

◆ IfxStdIf_Timer_updateInputFrequency()

IFX_INLINE void IfxStdIf_Timer_updateInputFrequency ( IfxStdIf_Timer * stdIf )

Indicates the stdIf that the imput frequency has changed and that it should be taken in account.

Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 334 of file IfxStdIf_Timer.h.


iLLD_TC26B: System Engineering

Modules
System Engineering
Service software
Collaboration diagram for System Engineering:

Modules

Board support package
Communication
General
Math
Time

Detailed Description


iLLD_TC26B: Board support package

Modules
Board support package
Service software » System Engineering
Collaboration diagram for Board support package:

Modules

Assertion
Board support package

Detailed Description


iLLD_TC26B: Assertion

Files | Macros | Functions
Assertion
Service software » System Engineering » Board support package
Collaboration diagram for Assertion:

Files

file Assert.h
Assert functions.

Macros

#define | IFX_CFG_ASSERT_STDIO (0)
If set to 1, the assert message is send to the Assert_io interface. More...
#define | IFX_CFG_ASSERT_STDIO (0)
If set to 1, the assert message is send to the Assert_io interface. More...
#define | IFX_CFG_ASSERT_USE_BREAKPOINT (0)
If set to 1, the assert function will break the execution (breakpoint) More...
#define | IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT (IFX_VERBOSE_LEVEL_INFO)
defines the assertion default level More...
#define | Ifx_Assert_setStandardIo(standardIo) ((void)0)
Set the standard output used for IFX_ASSERT and IFX_VALIDATE. More...
#define | IFX_ASSERT(level, expr) ((void)0)
Assertion function (assert) More...
#define | IFX_VALIDATE(level, expr) (expr)
Assertion function (validate) More...

Functions

IFX_EXTERN void | Ifx_Assert_doLevel (uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
IFX_EXTERN boolean | Ifx_Assert_doValidate (boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)

Detailed Description

This module implements assertion functions.

Global configuration settings (Ifx_Cfg.h) :

  • IFX_CFG_ASSERT_STDIO: if IFX_CFG_ASSERT_STDIO=1, the assertion is output to the io defined by Ifx_Assert_setStandardIo (). if IFX_CFG_ASSERT_STDIO=0, no text output is done. Default is IFX_CFG_ASSERT_STDIO=0
  • IFX_CFG_ASSERT_USE_BREAKPOINT: if IFX_CFG_ASSERT_USE_BREAKPOINT=1, a debug instruction is inserted in case an assertion occurs with a level of IFX_VERBOSE_LEVEL_FAILURE or IFX_VERBOSE_LEVEL_ERROR. If IFX_CFG_ASSERT_USE_BREAKPOINT=0 then no debug instruction is inserted. Default is IFX_CFG_ASSERT_USE_BREAKPOINT=0.
  • IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT: Set the assertion limit, assertion with a level below or equal to the limit are taken in account, other are ignored. range=[IFX_VERBOSE_LEVEL_OFF, IFX_VERBOSE_LEVEL_FAILURE, IFX_VERBOSE_LEVEL_ERROR, IFX_VERBOSE_LEVEL_WARNING, IFX_VERBOSE_LEVEL_INFO, IFX_VERBOSE_LEVEL_DEBUG] Default is IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT=IFX_VERBOSE_LEVEL_INFO.

Do not include this file but use # include "_Utilities/Ifx_Assert.h" instead

Macro Definition Documentation

◆ IFX_ASSERT

#define IFX_ASSERT | ( | level,
 |  | expr
 | ) | ((void)0)

Assertion function (assert)

If expr is FALSE, then an assertion message is displayed. The message indicates the assertion level, the file, line and function where the assertion occurred, and also display expr as text. In case the debug break point is enabled then a debug instruction will also be inserted so that the debugger stops

If expr is true, nothing is additional done.

The expr expression is ignored (code disabled) in case the assertion level set by IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT is IFX_VERBOSE_LEVEL_OFF.

The output needs to the be set with the function Ifx_Assert_setStandardIo() in order for the message to be displayed.

Parameters
level | level of the assertion, range=[IFX_VERBOSE_LEVEL_OFF, IFX_VERBOSE_LEVEL_FAILURE, IFX_VERBOSE_LEVEL_ERROR, IFX_VERBOSE_LEVEL_WARNING, IFX_VERBOSE_LEVEL_INFO, IFX_VERBOSE_LEVEL_DEBUG]
expr | expression to be tested. If FALSE the assertion is executed else nothing is done
Returns
void

Definition at line 173 of file Assert.h.

◆ Ifx_Assert_setStandardIo

#define Ifx_Assert_setStandardIo ( standardIo ) ((void)0)

Set the standard output used for IFX_ASSERT and IFX_VALIDATE.

For example the standard IO could redirect the output to a serial interface, CAN interface, ...

Parameters
standardIo Specifies the standard output used

Enable only if (IFX_CFG_ASSERT_STDIO!=0)

Returns
None.

Definition at line 105 of file Assert.h.

◆ IFX_CFG_ASSERT_STDIO [1/2]

#define IFX_CFG_ASSERT_STDIO (0)

If set to 1, the assert message is send to the Assert_io interface.

Definition at line 143 of file Assert.h.

◆ IFX_CFG_ASSERT_STDIO [2/2]

#define IFX_CFG_ASSERT_STDIO (0)

If set to 1, the assert message is send to the Assert_io interface.

Definition at line 143 of file Assert.h.

◆ IFX_CFG_ASSERT_USE_BREAKPOINT

#define IFX_CFG_ASSERT_USE_BREAKPOINT (0)

If set to 1, the assert function will break the execution (breakpoint)

Definition at line 81 of file Assert.h.

◆ IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT

#define IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT (IFX_VERBOSE_LEVEL_INFO)

defines the assertion default level

If not defined, the default assert level is set to IFX_VERBOSE_LEVEL_INFO

Definition at line 89 of file Assert.h.

◆ IFX_VALIDATE

#define IFX_VALIDATE | ( | level,
 |  | expr
 | ) | (expr)

Assertion function (validate)

If expr is FALSE, then an assertion message is displayed. The message indicates the assertion level, the file, line and function where the assertion occurred, and also display expr as text. In case the debug break point is enabled then a debug instruction will also be inserted so that the debugger stops.

IFX_VALIDATE differs from IFX_ASSERT in the way that the expr expression is evaluated whatever the assertion level set by IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT.

The output needs to the be set with the function Ifx_Assert_setStandardIo() in order for the message to be displayed.

Parameters
level | level of the assertion, range=[IFX_VERBOSE_LEVEL_OFF, IFX_VERBOSE_LEVEL_FAILURE, IFX_VERBOSE_LEVEL_ERROR, IFX_VERBOSE_LEVEL_WARNING, IFX_VERBOSE_LEVEL_INFO, IFX_VERBOSE_LEVEL_DEBUG]
expr | expression to be tested. If FALSE the assertion is executed else nothing is done
Returns
void

Definition at line 199 of file Assert.h.

Function Documentation

◆ Ifx_Assert_doLevel()

IFX_EXTERN void Ifx_Assert_doLevel | ( | uint8 | level,
 |  | pchar | __assertion,
 |  | pchar | __file,
 |  | unsigned int | __line,
 |  | pchar | __function
 | ) |  |

Definition at line 74 of file Assert.c.

◆ Ifx_Assert_doValidate()

IFX_EXTERN boolean Ifx_Assert_doValidate | ( | boolean | expr,
 |  | uint8 | level,
 |  | pchar | __assertion,
 |  | pchar | __file,
 |  | unsigned int | __line,
 |  | pchar | __function
 | ) |  |

Definition at line 97 of file Assert.c.


iLLD_TC26B: Assert.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Macros | Functions
Assert.h File Reference
Service software » System Engineering » Board support package » Assertion

Assert functions. More...

#include "_Utilities/Ifx_Assert.h"
Include dependency graph for Assert.h:

Go to the source code of this file.

Macros

#define | IFX_CFG_ASSERT_STDIO (0)
If set to 1, the assert message is send to the Assert_io interface. More...
#define | IFX_CFG_ASSERT_USE_BREAKPOINT (0)
If set to 1, the assert function will break the execution (breakpoint) More...
#define | IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT (IFX_VERBOSE_LEVEL_INFO)
defines the assertion default level More...
#define | Ifx_Assert_setStandardIo(standardIo) ((void)0)
Set the standard output used for IFX_ASSERT and IFX_VALIDATE. More...
#define | IFX_CFG_ASSERT_STDIO (0)
If set to 1, the assert message is send to the Assert_io interface. More...
#define | IFX_ASSERT(level, expr) ((void)0)
Assertion function (assert) More...
#define | IFX_VALIDATE(level, expr) (expr)
Assertion function (validate) More...

Functions

IFX_EXTERN void | Ifx_Assert_doLevel (uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
IFX_EXTERN boolean | Ifx_Assert_doValidate (boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)

Detailed Description

Assert functions.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:34 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Assert.h.


iLLD_TC26B: Board support package

Files
Board support package
Service software » System Engineering » Board support package
Collaboration diagram for Board support package:

Files

file | Bsp.c
Board support package.
file | Bsp.h
Board support package.

Interrupt APIs

IFX_INLINE boolean | areInterruptsEnabled (void)
Return the status of the global interrupts. More...
IFX_INLINE boolean | disableInterrupts (void)
Disable the global interrupts. More...
IFX_INLINE void | enableInterrupts (void)
enable the global interrupts More...
IFX_INLINE void | restoreInterrupts (boolean enabled)
Restore the state of the global interrupts. More...
IFX_INLINE void | forceDisableInterrupts (void)
Disable the global interrupts forcefully. More...

Time APIs

typedef void(* | WaitTimeFunction) (Ifx_TickTime timeout)
IFX_INLINE Ifx_TickTime | addTTime (Ifx_TickTime a, Ifx_TickTime b)
Add 2 Ifx_TickTime values and return the result. More...
IFX_INLINE Ifx_TickTime | elapsed (Ifx_TickTime since)
Return the elapsed time in ticks. More...
IFX_INLINE Ifx_TickTime | getDeadLine (Ifx_TickTime timeout)
Return the time dead line. More...
IFX_INLINE Ifx_TickTime | getTimeout (Ifx_TickTime deadline)
Return the time until the dead line. More...
IFX_EXTERN void | initTime (void)
time constant equal to 1s More...
IFX_INLINE boolean | isDeadLine (Ifx_TickTime deadLine)
Return TRUE if the dead line is over. More...
IFX_INLINE Ifx_TickTime | now (void)
Return system timer value (critical section). More...
IFX_INLINE Ifx_TickTime | nowWithoutCriticalSection (void)
Return system timer value (without critical section). More...
IFX_INLINE boolean | poll (volatile boolean *test, Ifx_TickTime timeout)
Poll a variable for a time. More...
IFX_INLINE Ifx_TickTime | timingNoInterruptEnd (Ifx_TickTime since, boolean interruptEnabled)
Return the elapsed time in system timer ticks, and enable the interrupts. More...
IFX_INLINE Ifx_TickTime | timingNoInterruptStart (boolean *interruptEnabled)
Disable the interrupt and return system timer value. More...
IFX_INLINE void | wait (Ifx_TickTime timeout)
Wait for a while. More...
IFX_EXTERN void | waitPoll (void)
Wait function. More...
IFX_EXTERN void | waitTime (Ifx_TickTime timeout)
Wait time function. More...
#define | TimeConst_0s ((Ifx_TickTime)0)
time constant equal to 1s More...
#define | TimeConst_10ns (TimeConst[TIMER_INDEX_10NS])
time constant equal to 10ns More...
#define | TimeConst_100ns (TimeConst[TIMER_INDEX_100NS])
time constant equal to 100ns More...
#define | TimeConst_1us (TimeConst[TIMER_INDEX_1US])
time constant equal to 1us More...
#define | TimeConst_10us (TimeConst[TIMER_INDEX_10US])
time constant equal to 10us More...
#define | TimeConst_100us (TimeConst[TIMER_INDEX_100US])
time constant equal to 100us More...
#define | TimeConst_1ms (TimeConst[TIMER_INDEX_1MS])
time constant equal to 1ms More...
#define | TimeConst_10ms (TimeConst[TIMER_INDEX_10MS])
time constant equal to 10ms More...
#define | TimeConst_100ms (TimeConst[TIMER_INDEX_100MS])
time constant equal to 100ms More...
#define | TimeConst_1s (TimeConst[TIMER_INDEX_1S])
time constant equal to 1s More...
#define | TimeConst_10s (TimeConst[TIMER_INDEX_10S])
time constant equal to 10s More...
#define | TimeConst_100s (TimeConst[TIMER_INDEX_100S])
time constant equal to 100s More...

Detailed Description

This module implements the board support package

Macro Definition Documentation

◆ TimeConst_0s

#define TimeConst_0s ((Ifx_TickTime)0)

time constant equal to 1s

Definition at line 192 of file Bsp.h.

◆ TimeConst_100ms

#define TimeConst_100ms (TimeConst[TIMER_INDEX_100MS])

time constant equal to 100ms

Definition at line 200 of file Bsp.h.

◆ TimeConst_100ns

#define TimeConst_100ns (TimeConst[TIMER_INDEX_100NS])

time constant equal to 100ns

Definition at line 194 of file Bsp.h.

◆ TimeConst_100s

#define TimeConst_100s (TimeConst[TIMER_INDEX_100S])

time constant equal to 100s

Definition at line 203 of file Bsp.h.

◆ TimeConst_100us

#define TimeConst_100us (TimeConst[TIMER_INDEX_100US])

time constant equal to 100us

Definition at line 197 of file Bsp.h.

◆ TimeConst_10ms

#define TimeConst_10ms (TimeConst[TIMER_INDEX_10MS])

time constant equal to 10ms

Definition at line 199 of file Bsp.h.

◆ TimeConst_10ns

#define TimeConst_10ns (TimeConst[TIMER_INDEX_10NS])

time constant equal to 10ns

Definition at line 193 of file Bsp.h.

◆ TimeConst_10s

#define TimeConst_10s (TimeConst[TIMER_INDEX_10S])

time constant equal to 10s

Definition at line 202 of file Bsp.h.

◆ TimeConst_10us

#define TimeConst_10us (TimeConst[TIMER_INDEX_10US])

time constant equal to 10us

Definition at line 196 of file Bsp.h.

◆ TimeConst_1ms

#define TimeConst_1ms (TimeConst[TIMER_INDEX_1MS])

time constant equal to 1ms

Definition at line 198 of file Bsp.h.

◆ TimeConst_1s

#define TimeConst_1s (TimeConst[TIMER_INDEX_1S])

time constant equal to 1s

Definition at line 201 of file Bsp.h.

Referenced by DateTime_get(), and DateTime_set().

◆ TimeConst_1us

#define TimeConst_1us (TimeConst[TIMER_INDEX_1US])

time constant equal to 1us

Definition at line 195 of file Bsp.h.

Typedef Documentation

◆ WaitTimeFunction

typedef void(* WaitTimeFunction) (Ifx_TickTime timeout)

Prototype for wait() functions

Definition at line 190 of file Bsp.h.

Function Documentation

◆ addTTime()

IFX_INLINE Ifx_TickTime addTTime | ( | Ifx_TickTime | a,
 |  | Ifx_TickTime | b
 | ) |  |

Add 2 Ifx_TickTime values and return the result.

Parameters
a | parameter a
b | parameter b
Returns
a + b. If either a or b is TIME_INFINITE, the result is TIME_INFINITE

Definition at line 254 of file Bsp.h.

◆ areInterruptsEnabled()

IFX_INLINE boolean areInterruptsEnabled ( void )

Return the status of the global interrupts.

Return values
TRUE | if the global interrupts are enabled.
FALSE | if the global interrupts are disabled.
See also
restoreInterrupts(), disableInterrupts()

Definition at line 92 of file Bsp.h.

◆ disableInterrupts()

IFX_INLINE boolean disableInterrupts ( void )

Disable the global interrupts.

Return values
TRUE | if the global interrupts were enabled before the call to the function.
FALSE | if the global interrupts are disabled before the call to the function.
See also
areInterruptsEnabled(), restoreInterrupts()

Definition at line 105 of file Bsp.h.

Referenced by now(), and timingNoInterruptStart().

◆ elapsed()

IFX_INLINE Ifx_TickTime elapsed ( Ifx_TickTime since )

Return the elapsed time in ticks.

Return the elapsed time between the current time and the time passed as parameter

Returns
Returns the elapsed time.

Definition at line 277 of file Bsp.h.

◆ enableInterrupts()

IFX_INLINE void enableInterrupts ( void )

enable the global interrupts

Definition at line 125 of file Bsp.h.

◆ forceDisableInterrupts()

IFX_INLINE void forceDisableInterrupts ( void )

Disable the global interrupts forcefully.

See also
areInterruptsEnabled(), restoreInterrupts()

Definition at line 116 of file Bsp.h.

◆ getDeadLine()

IFX_INLINE Ifx_TickTime getDeadLine ( Ifx_TickTime timeout )

Return the time dead line.

Parameters
timeout Specifies the dead line from now: Deadline = Now + Timeout
Returns
Return the time dead line.

Definition at line 289 of file Bsp.h.

Referenced by poll(), and wait().

◆ getTimeout()

IFX_INLINE Ifx_TickTime getTimeout ( Ifx_TickTime deadline )

Return the time until the dead line.

Parameters
deadline Specifies the dead line from now: Deadline = Now + Timeout
Returns
Return the time until the dead line.

Definition at line 312 of file Bsp.h.

◆ initTime()

IFX_EXTERN void initTime ( void )

time constant equal to 1s

◆ isDeadLine()

IFX_INLINE boolean isDeadLine ( Ifx_TickTime deadLine )

Return TRUE if the dead line is over.

Parameters
deadLine Specifies the dead line.
Return values
TRUE | Returns TRUE if the dead line is over
FALSE | Returns FALSE if the dead line is not yet over

Definition at line 336 of file Bsp.h.

Referenced by poll(), and wait().

◆ now()

IFX_INLINE Ifx_TickTime now ( void )

Return system timer value (critical section).

The function IfxStm_get() is called in a critical section, disabling the interrupts. The system timer value is limited to TIME_INFINITE.

Returns
Returns system timer value.

Definition at line 218 of file Bsp.h.

Referenced by DateTime_get(), DateTime_set(), elapsed(), getDeadLine(), getTimeout(), IfxStm_getOffsetTimer(), and isDeadLine().

◆ nowWithoutCriticalSection()

IFX_INLINE Ifx_TickTime nowWithoutCriticalSection ( void )

Return system timer value (without critical section).

The function IfxStm_get() is called. The system timer value is limited to TIME_INFINITE.

Returns
Returns system timer value.

Definition at line 237 of file Bsp.h.

Referenced by timingNoInterruptEnd(), and timingNoInterruptStart().

◆ poll()

IFX_INLINE boolean poll | ( | volatile boolean * | test,
 |  | Ifx_TickTime | timeout
 | ) |  |

Poll a variable for a time.

Parameters
test | Specifies the variable to test.
timeout | Specifies the maximal time the variable will be tested
Return values
TRUE | Returns TRUE if the variable gets TRUE before the timeout elapse
FALSE | Returns FALSE if the variable is FALSE as the timeout elapse

Definition at line 361 of file Bsp.h.

◆ restoreInterrupts()

IFX_INLINE void restoreInterrupts ( boolean enabled )

Restore the state of the global interrupts.

Parameters
enabled if TRUE, re-enable the global interrupts, else do nothing.
Returns
None.
See also
areInterruptsEnabled(), disableInterrupts()

Definition at line 139 of file Bsp.h.

Referenced by now(), and timingNoInterruptEnd().

◆ timingNoInterruptEnd()

IFX_INLINE Ifx_TickTime timingNoInterruptEnd | ( | Ifx_TickTime | since,
 |  | boolean | interruptEnabled
 | ) |  |

Return the elapsed time in system timer ticks, and enable the interrupts.

The interrupts are enable by the function

Parameters
since | time returned by timingNoInterruptStart()
interruptEnabled | If TRUE, the interrupts will be enabled before the function exit. This parameter should be set to the value returned by timingNoInterruptStart()
Returns
Returns the elapsed time.
See also
timingNoInterruptStart()

Definition at line 383 of file Bsp.h.

◆ timingNoInterruptStart()

IFX_INLINE Ifx_TickTime timingNoInterruptStart ( boolean * interruptEnabled )

Disable the interrupt and return system timer value.

The interrupt remains disabled after the function call

Returns
Returns system timer value.
See also
timingNoInterruptEnd()

Definition at line 402 of file Bsp.h.

◆ wait()

IFX_INLINE void wait ( Ifx_TickTime timeout )

Wait for a while.

Parameters
timeout Specifies the waiting time
Returns
None.

Definition at line 416 of file Bsp.h.

Referenced by waitTime().

◆ waitPoll()

IFX_EXTERN void waitPoll ( void )

Wait function.

This is an empty function that just spend some time waiting.

Returns
None.

Definition at line 52 of file Bsp.c.

◆ waitTime()

IFX_EXTERN void waitTime ( Ifx_TickTime timeout )

Wait time function.

This is an empty function that that returns after the timeout elapsed. The minimal time spend in the function is guaranteed, but not the max time.

Parameters
timeout Specifies the time the function waits for before returning
Returns
None.

Definition at line 64 of file Bsp.c.

Referenced by IfxMtu_waitForMbistDone().


iLLD_TC26B: Bsp.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Functions
Bsp.c File Reference
Service software » System Engineering » Board support package » Board support package

Board support package. More...

#include "Bsp.h"
Include dependency graph for Bsp.c:

Go to the source code of this file.

Functions

void | waitPoll (void)
Wait function. More...
void | waitTime (Ifx_TickTime timeout)
Wait time function. More...

Detailed Description

Board support package.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:34 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Bsp.c.


iLLD_TC26B: Bsp.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Macros | Variables
Bsp.h File Reference
Service software » System Engineering » Board support package » Board support package

Board support package. More...

#include "Ifx_Cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "_Utilities/Ifx_Assert.h"
#include "Cpu/Std/IfxCpu.h"
#include "Port/Std/IfxPort.h"
#include "Src/Std/IfxSrc.h"
#include "Stm/Std/IfxStm.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for Bsp.h:

Go to the source code of this file.

Macros

#define | BSP_DEFAULT_TIMER (&MODULE_STM0)
#define | TIMER_COUNT (11)
#define | TIMER_INDEX_10NS (0)
#define | TIMER_INDEX_100NS (1)
#define | TIMER_INDEX_1US (2)
#define | TIMER_INDEX_10US (3)
#define | TIMER_INDEX_100US (4)
#define | TIMER_INDEX_1MS (5)
#define | TIMER_INDEX_10MS (6)
#define | TIMER_INDEX_100MS (7)
#define | TIMER_INDEX_1S (8)
#define | TIMER_INDEX_10S (9)
#define | TIMER_INDEX_100S (10)
#define | PIN_DRIVER_STRONG_SHARP IfxPort_PadDriver_cmosAutomotiveSpeed1
#define | Pin_setState(pin, mode) IfxPort_setPinState((pin)->port, (pin)->pinIndex, (mode))
#define | Pin_setGroupState(pin, mask, data) IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))
#define | Pin_setMode(pin, mode) IfxPort_setPinMode((pin)->port, (pin)->pinIndex, (mode))
#define | Pin_setDriver(pin, mode) IfxPort_setPinPadDriver((pin)->port, (pin)->pinIndex, (mode))
#define | Pin_setStateHigh(pin) IfxPort_setPinHigh((pin)->port, (pin)->pinIndex)
#define | Pin_setStateLow(pin) IfxPort_setPinLow((pin)->port, (pin)->pinIndex)
#define | Pin_getState(pin) IfxPort_getPinState((pin)->port, (pin)->pinIndex)
#define | Pin_setGroupModeOutput(pin, mask, mode, outputIdx) IfxPort_setGroupModeOutput((pin)->port, (pin)->pinIndex, (mask), (mode), (outputIdx))
#define | Pin_setGroupModeInput(pin, mask, mode) IfxPort_setGroupModeInput((pin)->port, (pin)->pinIndex, (mask), (mode))
#define | Pin_setGroupState(pin, mask, data) IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))
#define | Pin_getGroupState(pin, mask) IfxPort_getGroupState((pin)->port, (pin)->pinIndex, (mask))
#define | Pin_enableEmgStop(pin) IfxPort_enableEmergencyStop((pin)->port, (pin)->pinIndex)

Functions

Interrupt APIs
IFX_INLINE boolean | areInterruptsEnabled (void)
Return the status of the global interrupts. More...
IFX_INLINE boolean | disableInterrupts (void)
Disable the global interrupts. More...
IFX_INLINE void | enableInterrupts (void)
enable the global interrupts More...
IFX_INLINE void | restoreInterrupts (boolean enabled)
Restore the state of the global interrupts. More...
IFX_INLINE void | forceDisableInterrupts (void)
Disable the global interrupts forcefully. More...

Variables

IFX_EXTERN Ifx_TickTime TimeConst [TIMER_COUNT]

Time APIs

#define | TimeConst_0s ((Ifx_TickTime)0)
time constant equal to 1s More...
#define | TimeConst_10ns (TimeConst[TIMER_INDEX_10NS])
time constant equal to 10ns More...
#define | TimeConst_100ns (TimeConst[TIMER_INDEX_100NS])
time constant equal to 100ns More...
#define | TimeConst_1us (TimeConst[TIMER_INDEX_1US])
time constant equal to 1us More...
#define | TimeConst_10us (TimeConst[TIMER_INDEX_10US])
time constant equal to 10us More...
#define | TimeConst_100us (TimeConst[TIMER_INDEX_100US])
time constant equal to 100us More...
#define | TimeConst_1ms (TimeConst[TIMER_INDEX_1MS])
time constant equal to 1ms More...
#define | TimeConst_10ms (TimeConst[TIMER_INDEX_10MS])
time constant equal to 10ms More...
#define | TimeConst_100ms (TimeConst[TIMER_INDEX_100MS])
time constant equal to 100ms More...
#define | TimeConst_1s (TimeConst[TIMER_INDEX_1S])
time constant equal to 1s More...
#define | TimeConst_10s (TimeConst[TIMER_INDEX_10S])
time constant equal to 10s More...
#define | TimeConst_100s (TimeConst[TIMER_INDEX_100S])
time constant equal to 100s More...
typedef void(* | WaitTimeFunction) (Ifx_TickTime timeout)
IFX_INLINE Ifx_TickTime | addTTime (Ifx_TickTime a, Ifx_TickTime b)
Add 2 Ifx_TickTime values and return the result. More...
IFX_INLINE Ifx_TickTime | elapsed (Ifx_TickTime since)
Return the elapsed time in ticks. More...
IFX_INLINE Ifx_TickTime | getDeadLine (Ifx_TickTime timeout)
Return the time dead line. More...
IFX_INLINE Ifx_TickTime | getTimeout (Ifx_TickTime deadline)
Return the time until the dead line. More...
IFX_EXTERN void | initTime (void)
time constant equal to 1s More...
IFX_INLINE boolean | isDeadLine (Ifx_TickTime deadLine)
Return TRUE if the dead line is over. More...
IFX_INLINE Ifx_TickTime | now (void)
Return system timer value (critical section). More...
IFX_INLINE Ifx_TickTime | nowWithoutCriticalSection (void)
Return system timer value (without critical section). More...
IFX_INLINE boolean | poll (volatile boolean *test, Ifx_TickTime timeout)
Poll a variable for a time. More...
IFX_INLINE Ifx_TickTime | timingNoInterruptEnd (Ifx_TickTime since, boolean interruptEnabled)
Return the elapsed time in system timer ticks, and enable the interrupts. More...
IFX_INLINE Ifx_TickTime | timingNoInterruptStart (boolean *interruptEnabled)
Disable the interrupt and return system timer value. More...
IFX_INLINE void | wait (Ifx_TickTime timeout)
Wait for a while. More...
IFX_EXTERN void | waitPoll (void)
Wait function. More...
IFX_EXTERN void | waitTime (Ifx_TickTime timeout)
Wait time function. More...

Detailed Description

Board support package.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:35 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Bsp.h.

Macro Definition Documentation

◆ BSP_DEFAULT_TIMER

#define BSP_DEFAULT_TIMER (&MODULE_STM0)

Defined the default timer used

Definition at line 62 of file Bsp.h.

Referenced by now(), and nowWithoutCriticalSection().

◆ PIN_DRIVER_STRONG_SHARP

#define PIN_DRIVER_STRONG_SHARP IfxPort_PadDriver_cmosAutomotiveSpeed1

Definition at line 425 of file Bsp.h.

◆ Pin_enableEmgStop

#define Pin_enableEmgStop ( pin ) IfxPort_enableEmergencyStop((pin)->port, (pin)->pinIndex)

Definition at line 437 of file Bsp.h.

◆ Pin_getGroupState

#define Pin_getGroupState | ( | pin,
 |  | mask
 | ) | IfxPort_getGroupState((pin)->port, (pin)->pinIndex, (mask))

Definition at line 436 of file Bsp.h.

◆ Pin_getState

#define Pin_getState ( pin ) IfxPort_getPinState((pin)->port, (pin)->pinIndex)

Definition at line 432 of file Bsp.h.

◆ Pin_setDriver

#define Pin_setDriver | ( | pin,
 |  | mode
 | ) | IfxPort_setPinPadDriver((pin)->port, (pin)->pinIndex, (mode))

Definition at line 429 of file Bsp.h.

◆ Pin_setGroupModeInput

#define Pin_setGroupModeInput | ( | pin,
 |  | mask,
 |  | mode
 | ) | IfxPort_setGroupModeInput((pin)->port, (pin)->pinIndex, (mask), (mode))

Definition at line 434 of file Bsp.h.

◆ Pin_setGroupModeOutput

#define Pin_setGroupModeOutput | ( | pin,
 |  | mask,
 |  | mode,
 |  | outputIdx
 | ) | IfxPort_setGroupModeOutput((pin)->port, (pin)->pinIndex, (mask), (mode), (outputIdx))

Definition at line 433 of file Bsp.h.

◆ Pin_setGroupState [1/2]

#define Pin_setGroupState | ( | pin,
 |  | mask,
 |  | data
 | ) | IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))

Definition at line 435 of file Bsp.h.

◆ Pin_setGroupState [2/2]

#define Pin_setGroupState | ( | pin,
 |  | mask,
 |  | data
 | ) | IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))

Definition at line 435 of file Bsp.h.

◆ Pin_setMode

#define Pin_setMode | ( | pin,
 |  | mode
 | ) | IfxPort_setPinMode((pin)->port, (pin)->pinIndex, (mode))

Definition at line 428 of file Bsp.h.

◆ Pin_setState

#define Pin_setState | ( | pin,
 |  | mode
 | ) | IfxPort_setPinState((pin)->port, (pin)->pinIndex, (mode))

Definition at line 426 of file Bsp.h.

◆ Pin_setStateHigh

#define Pin_setStateHigh ( pin ) IfxPort_setPinHigh((pin)->port, (pin)->pinIndex)

Definition at line 430 of file Bsp.h.

◆ Pin_setStateLow

#define Pin_setStateLow ( pin ) IfxPort_setPinLow((pin)->port, (pin)->pinIndex)

Definition at line 431 of file Bsp.h.

◆ TIMER_COUNT

#define TIMER_COUNT (11)

Definition at line 148 of file Bsp.h.

◆ TIMER_INDEX_100MS

#define TIMER_INDEX_100MS (7)

Definition at line 156 of file Bsp.h.

◆ TIMER_INDEX_100NS

#define TIMER_INDEX_100NS (1)

Definition at line 150 of file Bsp.h.

◆ TIMER_INDEX_100S

#define TIMER_INDEX_100S (10)

Definition at line 159 of file Bsp.h.

◆ TIMER_INDEX_100US

#define TIMER_INDEX_100US (4)

Definition at line 153 of file Bsp.h.

◆ TIMER_INDEX_10MS

#define TIMER_INDEX_10MS (6)

Definition at line 155 of file Bsp.h.

◆ TIMER_INDEX_10NS

#define TIMER_INDEX_10NS (0)

Definition at line 149 of file Bsp.h.

◆ TIMER_INDEX_10S

#define TIMER_INDEX_10S (9)

Definition at line 158 of file Bsp.h.

◆ TIMER_INDEX_10US

#define TIMER_INDEX_10US (3)

Definition at line 152 of file Bsp.h.

◆ TIMER_INDEX_1MS

#define TIMER_INDEX_1MS (5)

Definition at line 154 of file Bsp.h.

◆ TIMER_INDEX_1S

#define TIMER_INDEX_1S (8)

Definition at line 157 of file Bsp.h.

◆ TIMER_INDEX_1US

#define TIMER_INDEX_1US (2)

Definition at line 151 of file Bsp.h.

Variable Documentation

◆ TimeConst

IFX_EXTERN Ifx_TickTime TimeConst[TIMER_COUNT]

Definition at line 165 of file Bsp.h.


iLLD_TC26B: Communication

Modules
Communication
Service software » System Engineering
Collaboration diagram for Communication:

Modules

Console
Shell

Detailed Description


iLLD_TC26B: Console

Macros | Functions
Console
Service software » System Engineering » Communication
Collaboration diagram for Console:

Macros

#define CONSOLE Ifx_g_console
Alias Ifx_g_console object (by value) More...

Functions

IFX_INLINE IfxStdIf_DPipe * | Ifx_Console_getIo (void)
Return pointer to the default console object. More...
IFX_EXTERN void | Ifx_Console_init (IfxStdIf_DPipe *standardIo)
Initialize the Ifx_g_console object. More...
IFX_EXTERN boolean | Ifx_Console_print (pchar format,...)
Print formatted string into Ifx_g_console. More...
IFX_EXTERN boolean | Ifx_Console_printAlign (pchar format,...)
Print formatted string into Ifx_g_console. Indented with a number of spaces. More...
IFX_INLINE void | Ifx_Console_decrAlign (sint16 value)
Decrement the alignment/indentation using the given value. More...
IFX_INLINE void | Ifx_Console_incrAlign (sint16 value)
Increment the alignment/indentation using the given value. More...

Detailed Description

This module implements "Main Console" functions

Macro Definition Documentation

◆ CONSOLE

#define CONSOLE Ifx_g_console

Alias Ifx_g_console object (by value)

Definition at line 71 of file Ifx_Console.h.

Function Documentation

◆ Ifx_Console_decrAlign()

IFX_INLINE void Ifx_Console_decrAlign ( sint16 value )

Decrement the alignment/indentation using the given value.

Parameters
value the increment. If value == 0, IFX_CFG_CONSOLE_INDENT_SIZE will be used.

Definition at line 93 of file Ifx_Console.h.

◆ Ifx_Console_getIo()

IFX_INLINE IfxStdIf_DPipe* Ifx_Console_getIo ( void )

Return pointer to the default console object.

User can override this function by defining new CONSOLE macro and this function externally, e.g. inside Ifx_Cfg.h file.

Definition at line 77 of file Ifx_Console.h.

◆ Ifx_Console_incrAlign()

IFX_INLINE void Ifx_Console_incrAlign ( sint16 value )

Increment the alignment/indentation using the given value.

Parameters
value the increment. If value == 0, IFX_CFG_CONSOLE_INDENT_SIZE will be used.

Definition at line 104 of file Ifx_Console.h.

◆ Ifx_Console_init()

IFX_EXTERN void Ifx_Console_init ( IfxStdIf_DPipe * standardIo )

Initialize the Ifx_g_console object.

Parameters
standardIo Pointer to the IfxStdIf_DPipe object used by the Ifx_g_console.

Definition at line 56 of file Ifx_Console.c.

◆ Ifx_Console_print()

IFX_EXTERN boolean Ifx_Console_print | ( | pchar | format,
 |  |  | ...
 | ) |  |

Print formatted string into Ifx_g_console.

Parameters
format printf-compatible formatted string.
Return values
TRUE | if the string is printed successfully
FALSE | if the function failed.

Definition at line 69 of file Ifx_Console.c.

◆ Ifx_Console_printAlign()

IFX_EXTERN boolean Ifx_Console_printAlign | ( | pchar | format,
 |  |  | ...
 | ) |  |

Print formatted string into Ifx_g_console. Indented with a number of spaces.

Parameters
format printf-compatible formatted string.
Return values
TRUE | if the string is printed successfully
FALSE | if the function failed.

Definition at line 98 of file Ifx_Console.c.


iLLD_TC26B: Shell

Files
Shell
Service software » System Engineering » Communication
Collaboration diagram for Shell:

Files

file Ifx_Shell.h
Shell functions.

Basic functionality

void | Ifx_Shell_initConfig (Ifx_Shell_Config *config)
IFX_EXTERN boolean | Ifx_Shell_init (Ifx_Shell *shell, const Ifx_Shell_Config *config)
Initialize the shell. More...
IFX_EXTERN void | Ifx_Shell_deinit (Ifx_Shell *shell)
Deinitialise the shell. More...
IFX_EXTERN void | Ifx_Shell_enable (Ifx_Shell *shell)
Clear the receive buffer and enable the shell. More...
IFX_EXTERN void | Ifx_Shell_disable (Ifx_Shell *shell)
Disable the shell. More...
IFX_EXTERN void | Ifx_Shell_process (Ifx_Shell *shell)
Process the shell. More...

Parsing functions

IFX_EXTERN pchar | Ifx_Shell_skipWhitespace (pchar args)
Within the context of Shell.call, skip the whitespaces of the args string. More...
IFX_EXTERN boolean | Ifx_Shell_matchToken (pchar *argsPtr, pchar token)
Match string pointed by the *argsPtr with a given token. More...
IFX_EXTERN boolean | Ifx_Shell_parseToken (pchar *argsPtr, char *tokenBuffer, int bufferLength)
Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token. More...
IFX_EXTERN boolean | Ifx_Shell_parseAddress (pchar *argsPtr, void **address)
Parse an address. More...
IFX_EXTERN boolean | Ifx_Shell_parseSInt32 (pchar *argsPtr, sint32 *value)
Parse a signed 32-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseUInt32 (pchar *argsPtr, uint32 *value, boolean hex)
Parse an unsigned 32-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseSInt64 (pchar *argsPtr, sint64 *value)
Parse a signed 64-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseUInt64 (pchar *argsPtr, uint64 *value, boolean hex)
Parse an unsigned 64-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseFloat64 (pchar *argsPtr, float64 *value)
Parse a 64-bit (double precision) floating-point value. More...
IFX_EXTERN boolean | Ifx_Shell_parseFloat32 (pchar *argsPtr, float32 *value)
Parse a 32-bit (single precision) floating-point value. More...

Command list functions

IFX_EXTERN const Ifx_Shell_Command * | Ifx_Shell_commandFind (Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
Find command in command List. More...
IFX_EXTERN boolean | Ifx_Shell_showHelpSingle (Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
Implementation of Ifx_Shell_Call. Show the help menu from single command list. More...
IFX_EXTERN boolean | Ifx_Shell_showHelp (pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Show the help menu and list of commands. More...
IFX_EXTERN void | Ifx_Shell_printSyntax (const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. print the syntax. More...

Sub protocol functions

IFX_EXTERN boolean | Ifx_Shell_protocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the Shell protocol. More...
IFX_EXTERN boolean | Ifx_Shell_bbProtocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the ShellBb protocol. More...

Detailed Description

This module implements the Shell functions. It parses a command line and call the corresponding command execution. Multiple command list can be used in parallel.

Only full command match is accepted.

New feature / change:

  • Prefix can be defined for each command list
  • Help for a single command is displayed with "help <command>"
  • help for a command list is displayed with "help <listPrefix>"
  • command short cut is not allowed
  • command with identical start option "opt1 opt2" and "opt1 opt3" are accepted, and root to different handlers
  • Enhanced help info print

Help text xyntax:

  • /p indicates a parameter description, can be multi-line, lines must be separated with ENDL
  • /s Indicates a syntax help

Example of help list:

Ifx_Shell_Command Ifx_g_OsciShell_commands[] =
{
{IFX_OSCI_SHELL_PREFIX, " : Oscilloscope functions"
, NULL_PTR, NULL_PTR },
{"run", " : run the oscilloscope" ENDL
"/s run [single|auto|normal]"
, NULL_PTR, &Ifx_OsciShell_run },
{"stop", " : stop oscilloscope"
, NULL_PTR, &Ifx_OsciShell_stop },
{"trigger", " : trigger settings" ENDL
"/s trigger [force|single|level <value>|raising|falling|source <chNum>|interval <value>]" ENDL
"/p force: Force the trigger" ENDL
"/p single: Single the trigger" ENDL
"/p level <value>: Set trigger level to value" ENDL
"/p [raising|falling]: Set trigger to raising or falling edges" ENDL
"/p source <chNum>: Set trigger channel number" ENDL
"<chNum> can be obtained with 'channel' command" ENDL
"/p interval <value>: Set sampling interval to value"
, NULL_PTR, &Ifx_OsciShell_trigger },
{"status", " : display status"
, NULL_PTR, &Ifx_OsciShell_status },
{"channel", " : channel information" ENDL
"/s channel: Show the channels information" ENDL
"/s channel <ch> <sig>: Assign a signal to a channel"
, NULL_PTR, &Ifx_OsciShell_channel },
{"analyze", " : signal analysis of a ch" ENDL
"/s analyze <ch>: analyze the input channel <ch>"
, NULL_PTR, &Ifx_OsciShell_analyze },
{"simulate", " : simulate a signal" ENDL
"/s simulate <ch> <op> <wave> <freq> <ampl> <offs> <phase> : Simulate a signal generation" ENDL
"/p <ch> : {0 .. Channel count}" ENDL
"/p <op> : {add,sub,mul,clr}" ENDL
"/p <wave> : {sine,square}" ENDL
"/p <freq> : -INF .. INF" ENDL
"/p <offs> : -INF .. INF" ENDL
"/p <ampl> : -INF .. INF" ENDL
"/p <phase>: 0 .. 360 [degree]" ENDL
"/s simulate <ch> atan <ych> <xch>: Compute atan(ych/xch) and store in channel <ch>"
, NULL_PTR, &Ifx_OsciShell_simulate},
{"dump", " : dump values (all channels)" ENDL
"/s dump <ch> [hex]" ENDL
"/p <ch>: Dump the values of the channel <ch>" ENDL
"/p hex: If hex is specified, values will be in hexadecimal"
, NULL_PTR, &Ifx_OsciShell_dump },
IFX_SHELL_COMMAND_LIST_END,
};

To enable help command, include the below command in the main command list {"help", SHELL_HELP_DESCRIPTION_TEXT , &<Ifx_Shell>, &Ifx_Shell_showHelp, },

Function Documentation

◆ Ifx_Shell_bbProtocolStart()

IFX_EXTERN boolean Ifx_Shell_bbProtocolStart | ( | pchar | args,
 |  | void * | data,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Implementation of Ifx_Shell_Call. Start the ShellBb protocol.

Parameters
args | The argument null-terminated string
data | Pointer to Ifx_Shell object
io | Pointer to IfxStdIf_DPipe object

Definition at line 287 of file Ifx_Shell.c.

◆ Ifx_Shell_commandFind()

IFX_EXTERN const Ifx_Shell_Command* Ifx_Shell_commandFind | ( | Ifx_Shell_CommandListConst | commandList,
 |  | pchar | commandLine,
 |  | pchar * | args,
 |  | uint32 * | match
 | ) |  |

Find command in command List.

Parameters
commandList | Pointer to the first entry of an array of Ifx_Shell_Command
commandLine | Pointer to null-terminated string containings the command to search.
args | Pointer to the argument null-terminated string
match | Return the number of arguments that matches

Definition at line 945 of file Ifx_Shell.c.

Referenced by Ifx_Shell_commandListFind().

◆ Ifx_Shell_deinit()

IFX_EXTERN void Ifx_Shell_deinit ( Ifx_Shell * shell )

Deinitialise the shell.

Parameters
shell Pointer to the Ifx_Shell object

Definition at line 648 of file Ifx_Shell.c.

◆ Ifx_Shell_disable()

IFX_EXTERN void Ifx_Shell_disable ( Ifx_Shell * shell )

Disable the shell.

Parameters
shell Pointer to the Ifx_Shell object

Definition at line 1316 of file Ifx_Shell.c.

◆ Ifx_Shell_enable()

IFX_EXTERN void Ifx_Shell_enable ( Ifx_Shell * shell )

Clear the receive buffer and enable the shell.

Parameters
shell Pointer to the Ifx_Shell object

Definition at line 1307 of file Ifx_Shell.c.

◆ Ifx_Shell_init()

IFX_EXTERN boolean Ifx_Shell_init | ( | Ifx_Shell * | shell,
 |  | const Ifx_Shell_Config * | config
 | ) |  |

Initialize the shell.

Parameters
shell | Pointer to the Ifx_Shell object
config | Pointer to the configuration structure

Definition at line 331 of file Ifx_Shell.c.

◆ Ifx_Shell_initConfig()

void Ifx_Shell_initConfig ( Ifx_Shell_Config * config )

Set the config default parameter

Parameters
config Pointer to the configuration structure to be initialized

Definition at line 308 of file Ifx_Shell.c.

◆ Ifx_Shell_matchToken()

IFX_EXTERN boolean Ifx_Shell_matchToken | ( | pchar * | argsPtr,
 |  | pchar | token
 | ) |  |

Match string pointed by the *argsPtr with a given token.

Parameters
argsPtr | Pointer to the argument null-terminated string
token | Pointer to the token string to match
Return values
TRUE if the given token match with the string pointed by argsPtr

Definition at line 669 of file Ifx_Shell.c.

Referenced by Ifx_Shell_bbProtocolStart(), and Ifx_Shell_protocolStart().

◆ Ifx_Shell_parseAddress()

IFX_EXTERN boolean Ifx_Shell_parseAddress | ( | pchar * | argsPtr,
 |  | void ** | address
 | ) |  |

Parse an address.

Parameters
argsPtr | Pointer to the argument null-terminated string
address | Pointer to the value storage

Definition at line 788 of file Ifx_Shell.c.

◆ Ifx_Shell_parseFloat32()

IFX_EXTERN boolean Ifx_Shell_parseFloat32 | ( | pchar * | argsPtr,
 |  | float32 * | value
 | ) |  |

Parse a 32-bit (single precision) floating-point value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage

Definition at line 925 of file Ifx_Shell.c.

◆ Ifx_Shell_parseFloat64()

IFX_EXTERN boolean Ifx_Shell_parseFloat64 | ( | pchar * | argsPtr,
 |  | float64 * | value
 | ) |  |

Parse a 64-bit (double precision) floating-point value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage

Definition at line 905 of file Ifx_Shell.c.

◆ Ifx_Shell_parseSInt32()

IFX_EXTERN boolean Ifx_Shell_parseSInt32 | ( | pchar * | argsPtr,
 |  | sint32 * | value
 | ) |  |

Parse a signed 32-bit integer value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage

Definition at line 808 of file Ifx_Shell.c.

◆ Ifx_Shell_parseSInt64()

IFX_EXTERN boolean Ifx_Shell_parseSInt64 | ( | pchar * | argsPtr,
 |  | sint64 * | value
 | ) |  |

Parse a signed 64-bit integer value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage

Definition at line 850 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseSInt32().

◆ Ifx_Shell_parseToken()

IFX_EXTERN boolean Ifx_Shell_parseToken | ( | pchar * | argsPtr,
 |  | char * | tokenBuffer,
 |  | int | bufferLength
 | ) |  |

Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token.

Parameters
argsPtr | Pointer to the argument null-terminated string
tokenBuffer | Pointer to the value storage
bufferLength | Maximum parsing length

Definition at line 721 of file Ifx_Shell.c.

Referenced by Ifx_Shell_matchToken(), Ifx_Shell_parseAddress(), Ifx_Shell_parseFloat32(), Ifx_Shell_parseFloat64(), Ifx_Shell_parseSInt64(), and Ifx_Shell_parseUInt64().

◆ Ifx_Shell_parseUInt32()

IFX_EXTERN boolean Ifx_Shell_parseUInt32 | ( | pchar * | argsPtr,
 |  | uint32 * | value,
 |  | boolean | hex
 | ) |  |

Parse an unsigned 32-bit integer value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage
hex | if TRUE, hex parsing will be done, else decimal parsing

Definition at line 829 of file Ifx_Shell.c.

◆ Ifx_Shell_parseUInt64()

IFX_EXTERN boolean Ifx_Shell_parseUInt64 | ( | pchar * | argsPtr,
 |  | uint64 * | value,
 |  | boolean | hex
 | ) |  |

Parse an unsigned 64-bit integer value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage
hex | if TRUE, hex parsing will be done, else decimal parsing

Definition at line 870 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseUInt32().

◆ Ifx_Shell_printSyntax()

IFX_EXTERN void Ifx_Shell_printSyntax | ( | const Ifx_Shell_Syntax * | syntaxList,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Implementation of Ifx_Shell_Call. print the syntax.

Parameters
syntaxList | Pointer to syntax list
io | Pointer to IfxStdIf_DPipe object

Definition at line 1322 of file Ifx_Shell.c.

◆ Ifx_Shell_process()

IFX_EXTERN void Ifx_Shell_process ( Ifx_Shell * shell )

Process the shell.

This function shall be called within a loop or periodic timer to guarantee the correct processing of the incoming/received data.

Parameters
shell Pointer to the Ifx_Shell object

Definition at line 388 of file Ifx_Shell.c.

◆ Ifx_Shell_protocolStart()

IFX_EXTERN boolean Ifx_Shell_protocolStart | ( | pchar | args,
 |  | void * | data,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Implementation of Ifx_Shell_Call. Start the Shell protocol.

Parameters
args | The argument null-terminated string
data | Pointer to Ifx_Shell object
io | Pointer to IfxStdIf_DPipe object

Definition at line 253 of file Ifx_Shell.c.

Referenced by Ifx_Shell_bbProtocolStart().

◆ Ifx_Shell_showHelp()

IFX_EXTERN boolean Ifx_Shell_showHelp | ( | pchar | args,
 |  | void * | shellPtr,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Implementation of Ifx_Shell_Call. Show the help menu and list of commands.

Parameters
args | The argument null-terminated string
shellPtr | Pointer to a Shell object
io | Pointer to IfxStdIf_DPipe object

Definition at line 228 of file Ifx_Shell.c.

Referenced by Ifx_Shell_execute().

◆ Ifx_Shell_showHelpSingle()

IFX_EXTERN boolean Ifx_Shell_showHelpSingle | ( | Ifx_Shell_CommandListConst | commandList,
 |  | IfxStdIf_DPipe * | io,
 |  | boolean | briefOnly,
 |  | boolean | singleCommand
 | ) |  |

Implementation of Ifx_Shell_Call. Show the help menu from single command list.

Parameters
commandList | Pointer to an array of Ifx_Shell_Command
io | Pointer to the IfxStdIf_DPipe object
briefOnly | if TRUE, show only the brief description, else show the full description
singleCommand | If TRUE, only show the 1st command pointed by commandList, else show the full list

Definition at line 104 of file Ifx_Shell.c.

Referenced by Ifx_Shell_showHelp(), and Ifx_Shell_showHelpSingleCommand().

◆ Ifx_Shell_skipWhitespace()

IFX_EXTERN pchar Ifx_Shell_skipWhitespace ( pchar args )

Within the context of Shell.call, skip the whitespaces of the args string.

Parameters
args Pointer to the original string
Returns
Pointer to the string after skipping the whitespaces

Definition at line 655 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseToken().


iLLD_TC26B: Ifx_Shell.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Data Structures | Macros | Typedefs | Enumerations
Ifx_Shell.h File Reference
Service software » System Engineering » Communication » Shell

Shell functions. More...

#include "StdIf/IfxStdIf_DPipe.h"
#include "Ifx_Cfg.h"
Include dependency graph for Ifx_Shell.h:

Go to the source code of this file.

Data Structures

struct | Ifx_Shell_Command
Shell command object. More...
struct | Ifx_Shell_CmdLine
Command line editing state. More...
struct | Ifx_Shell_Protocol
Shell protocol configuration. More...
struct | Ifx_Shell_Flags
Shell control flags. More...
struct | Ifx_Shell_Runtime
internal Shell run-time data More...
struct | Ifx_Shell
Shell object definition. More...
struct | Ifx_Shell_Config
Shell configuration. More...
struct | Ifx_Shell_Syntax
Shell Syntax Description. More...

Macros

#define | IFX_SHELL_NULL_CHAR '\0'
#define | IFX_CFG_SHELL_CMD_HISTORY_SIZE (10)
Number of commands to store in history. More...
#define | IFX_CFG_SHELL_CMD_LINE_SIZE (128)
max command line IFX_CFG_SHELL_CMD_LINE_SIZE - 1 More...
#define | IFX_CFG_SHELL_COMMAND_LISTS (1)
Number of command lists. More...
#define | IFX_CFG_SHELL_PROMPT "Shell>"
Shell prompt. More...
#define | SHELL_HELP_DESCRIPTION_TEXT
#define | IFX_SHELL_COMMAND_LIST_END {0, 0, 0, 0}
Marker for end of command list, the end of list is detected by commandLine=NULL. More...
#define | IFX_SHELL_SYNTAX_LIST_END {0, 0}
Marker for end of syntax list. More...
#define | IFX_SHELL_CMD_HISTORY_NO_ITEM (-1)
Signifies no item in use in command history list. More...

Typedefs

typedef boolean(* | Ifx_Shell_Call) (pchar args, void *data, IfxStdIf_DPipe *io)
Definition of a callback function which handles a Shell command. More...
typedef Ifx_Shell_Command * | Ifx_Shell_CommandList
typedef const Ifx_Shell_Command * | Ifx_Shell_CommandListConst

Enumerations

enum Ifx_Shell_ResultCode {
Ifx_Shell_ResultCode_unknown = (128),
Ifx_Shell_ResultCode_nok = (129),
Ifx_Shell_ResultCode_undefined = (130),
Ifx_Shell_ResultCode_ok = (255)
}
Result code definition used after each executed Shell command. More...
enum Ifx_Shell_CmdState {
IFX_SHELL_CMD_STATE_NORMAL,
IFX_SHELL_CMD_STATE_ESCAPE,
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET,
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER
}
Shell command processing state. More...

Functions

Basic functionality
void | Ifx_Shell_initConfig (Ifx_Shell_Config *config)
IFX_EXTERN boolean | Ifx_Shell_init (Ifx_Shell *shell, const Ifx_Shell_Config *config)
Initialize the shell. More...
IFX_EXTERN void | Ifx_Shell_deinit (Ifx_Shell *shell)
Deinitialise the shell. More...
IFX_EXTERN void | Ifx_Shell_enable (Ifx_Shell *shell)
Clear the receive buffer and enable the shell. More...
IFX_EXTERN void | Ifx_Shell_disable (Ifx_Shell *shell)
Disable the shell. More...
IFX_EXTERN void | Ifx_Shell_process (Ifx_Shell *shell)
Process the shell. More...
Parsing functions
IFX_EXTERN pchar | Ifx_Shell_skipWhitespace (pchar args)
Within the context of Shell.call, skip the whitespaces of the args string. More...
IFX_EXTERN boolean | Ifx_Shell_matchToken (pchar *argsPtr, pchar token)
Match string pointed by the *argsPtr with a given token. More...
IFX_EXTERN boolean | Ifx_Shell_parseToken (pchar *argsPtr, char *tokenBuffer, int bufferLength)
Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token. More...
IFX_EXTERN boolean | Ifx_Shell_parseAddress (pchar *argsPtr, void **address)
Parse an address. More...
IFX_EXTERN boolean | Ifx_Shell_parseSInt32 (pchar *argsPtr, sint32 *value)
Parse a signed 32-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseUInt32 (pchar *argsPtr, uint32 *value, boolean hex)
Parse an unsigned 32-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseSInt64 (pchar *argsPtr, sint64 *value)
Parse a signed 64-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseUInt64 (pchar *argsPtr, uint64 *value, boolean hex)
Parse an unsigned 64-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseFloat64 (pchar *argsPtr, float64 *value)
Parse a 64-bit (double precision) floating-point value. More...
IFX_EXTERN boolean | Ifx_Shell_parseFloat32 (pchar *argsPtr, float32 *value)
Parse a 32-bit (single precision) floating-point value. More...
Command list functions
IFX_EXTERN const Ifx_Shell_Command * | Ifx_Shell_commandFind (Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
Find command in command List. More...
IFX_EXTERN boolean | Ifx_Shell_showHelpSingle (Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
Implementation of Ifx_Shell_Call. Show the help menu from single command list. More...
IFX_EXTERN boolean | Ifx_Shell_showHelp (pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Show the help menu and list of commands. More...
IFX_EXTERN void | Ifx_Shell_printSyntax (const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. print the syntax. More...
Sub protocol functions
IFX_EXTERN boolean | Ifx_Shell_protocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the Shell protocol. More...
IFX_EXTERN boolean | Ifx_Shell_bbProtocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the ShellBb protocol. More...

Detailed Description

Shell functions.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Shell.h.

Data Structure Documentation

◆ Ifx_Shell_Command

struct Ifx_Shell_Command

Shell command object.

Definition at line 169 of file Ifx_Shell.h.

Data Fields
Ifx_Shell_Call | call
pchar | commandLine
void * | data
pchar | help

◆ Ifx_Shell_CmdLine

struct Ifx_Shell_CmdLine

Command line editing state.

Definition at line 178 of file Ifx_Shell.h.

Data Fields
char * | cmdStr | Pointer to current string containing command line as so far processed.
Ifx_SizeT | cursor | Pointer to variable containing position of cursor in so-far-processed command line.
boolean | historyAdd | If TRUE, when Enter is pressed, the current cmdLine should be added to the command history (in parent)
Ifx_SizeT | historyItem | Item ID in command history list, or IFX_SHELL_CMD_HISTORY_NO_ITEM if not using list (e.g. new command)
Ifx_SizeT | length | Pointer to variable containing total length of command line.

◆ Ifx_Shell_Flags

struct Ifx_Shell_Flags

Shell control flags.

Definition at line 208 of file Ifx_Shell.h.

Data Fields
uint16 | echo: 1
uint16 | echoError: 1
uint16 | enabled: 1
uint16 | sendResultCode: 1
uint16 | showPrompt: 1

◆ Ifx_Shell_Runtime

struct Ifx_Shell_Runtime

internal Shell run-time data

Definition at line 218 of file Ifx_Shell.h.

Data Fields
Ifx_Shell_CmdState | cmdState
char | cmdStr[IFX_CFG_SHELL_CMD_LINE_SIZE]
char | echo[2]
char | escBracketNum
char | inputbuffer[IFX_CFG_SHELL_CMD_LINE_SIZE+1]

◆ Ifx_Shell

struct Ifx_Shell

Shell object definition.

Definition at line 232 of file Ifx_Shell.h.

Collaboration diagram for Ifx_Shell:
[legend]
Data Fields
Ifx_Shell_CmdLine | cmd | Current status of command line editing (saves passing many parameters around)
char * | cmdHistory[IFX_CFG_SHELL_CMD_HISTORY_SIZE] | Array of pointers to the history entries.
Ifx_Shell_CommandListConst | commandList[IFX_CFG_SHELL_COMMAND_LISTS] | Array of pointers to command list. The pointed location shall be constant during Shell lifetime, e.g. stored in non-volatile memory or as global variable. The 1st item in the list is use as a group command prefix if its "call" parameter is NULL pointer, else it is use as other entries. In case "call" is NULL, the corresponding 'data' is ignored, and the 'help' is displayed.
Ifx_Shell_Flags | control | control flags
IfxStdIf_DPipe * | io | Pointer to IfxStdIf_DPipe object used by the Shell.
Ifx_Shell_Runtime | locals | Runtime data.
Ifx_Shell_Protocol | protocol | Protocol handler data.

◆ Ifx_Shell_Config

struct Ifx_Shell_Config

Shell configuration.

Definition at line 261 of file Ifx_Shell.h.

Collaboration diagram for Ifx_Shell_Config:
[legend]
Data Fields
Ifx_Shell_CommandListConst | commandList[IFX_CFG_SHELL_COMMAND_LISTS] | Specifies pointer to the command list.
boolean | echo | Specifies whether each command shall be echoed back to user.
Ifx_Shell_Protocol | protocol | Configuration for the Ifx_Shell_Protocol.
boolean | sendResultCode | Specifies whether the Ifx_Shell_ResultCode shall be sent to user.
boolean | showPrompt | Specifies whether the IFX_CFG_SHELL_PROMPT shall be displayed after each command.
IfxStdIf_DPipe * | standardIo | Pointer to a IfxStdIf_DPipe object used by the Shell.

◆ Ifx_Shell_Syntax

struct Ifx_Shell_Syntax

Shell Syntax Description.

Definition at line 274 of file Ifx_Shell.h.

Data Fields
pchar | description | description
pchar | syntax | syntax

Macro Definition Documentation

◆ IFX_CFG_SHELL_CMD_HISTORY_SIZE

#define IFX_CFG_SHELL_CMD_HISTORY_SIZE (10)

Number of commands to store in history.

Definition at line 127 of file Ifx_Shell.h.

Referenced by Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_init(), and Ifx_Shell_process().

◆ IFX_CFG_SHELL_CMD_LINE_SIZE

#define IFX_CFG_SHELL_CMD_LINE_SIZE (128)

max command line IFX_CFG_SHELL_CMD_LINE_SIZE - 1

Definition at line 131 of file Ifx_Shell.h.

Referenced by Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_init(), and Ifx_Shell_process().

◆ IFX_CFG_SHELL_COMMAND_LISTS

#define IFX_CFG_SHELL_COMMAND_LISTS (1)

Number of command lists.

Definition at line 135 of file Ifx_Shell.h.

Referenced by Ifx_Shell_commandListFind(), Ifx_Shell_init(), Ifx_Shell_initConfig(), and Ifx_Shell_showHelp().

◆ IFX_CFG_SHELL_PROMPT

#define IFX_CFG_SHELL_PROMPT "Shell>"

Shell prompt.

Definition at line 139 of file Ifx_Shell.h.

Referenced by Ifx_Shell_init(), and Ifx_Shell_process().

◆ IFX_SHELL_CMD_HISTORY_NO_ITEM

#define IFX_SHELL_CMD_HISTORY_NO_ITEM (-1)

Signifies no item in use in command history list.

Definition at line 154 of file Ifx_Shell.h.

Referenced by Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_init(), and Ifx_Shell_process().

◆ IFX_SHELL_COMMAND_LIST_END

#define IFX_SHELL_COMMAND_LIST_END {0, 0, 0, 0}

Marker for end of command list, the end of list is detected by commandLine=NULL.

Definition at line 148 of file Ifx_Shell.h.

◆ IFX_SHELL_NULL_CHAR

#define IFX_SHELL_NULL_CHAR '\0'

Definition at line 124 of file Ifx_Shell.h.

Referenced by Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_init(), Ifx_Shell_isEndOfLine(), Ifx_Shell_parseAddress(), Ifx_Shell_parseFloat32(), Ifx_Shell_parseFloat64(), Ifx_Shell_parseSInt64(), Ifx_Shell_parseToken(), Ifx_Shell_parseUInt64(), Ifx_Shell_process(), Ifx_Shell_showHelp(), Ifx_Shell_showHelpSingle(), and Ifx_Shell_skipWhitespace().

◆ IFX_SHELL_SYNTAX_LIST_END

#define IFX_SHELL_SYNTAX_LIST_END {0, 0}

Marker for end of syntax list.

Definition at line 151 of file Ifx_Shell.h.

◆ SHELL_HELP_DESCRIPTION_TEXT

#define SHELL_HELP_DESCRIPTION_TEXT
Value:
" : Display command list, and command help." ENDL \
"/s help: show all commands" ENDL \
"/s help <command>: show the command details"
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:64

Definition at line 142 of file Ifx_Shell.h.

Typedef Documentation

◆ Ifx_Shell_Call

typedef boolean(* Ifx_Shell_Call) (pchar args, void *data, IfxStdIf_DPipe *io)

Definition of a callback function which handles a Shell command.

Definition at line 166 of file Ifx_Shell.h.

◆ Ifx_Shell_CommandList

typedef Ifx_Shell_Command* Ifx_Shell_CommandList

Definition at line 227 of file Ifx_Shell.h.

◆ Ifx_Shell_CommandListConst

typedef const Ifx_Shell_Command* Ifx_Shell_CommandListConst

Definition at line 228 of file Ifx_Shell.h.

Enumeration Type Documentation

◆ Ifx_Shell_CmdState

enum Ifx_Shell_CmdState

Shell command processing state.

Enumerator
IFX_SHELL_CMD_STATE_NORMAL | Normal - no special sequences being processed.
IFX_SHELL_CMD_STATE_ESCAPE | Escape character has been pressed.
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET | ESC [ pressed.
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER | ESC [ (number) pressed.

Definition at line 188 of file Ifx_Shell.h.

◆ Ifx_Shell_ResultCode

enum Ifx_Shell_ResultCode

Result code definition used after each executed Shell command.

Enumerator
Ifx_Shell_ResultCode_unknown
Ifx_Shell_ResultCode_nok
Ifx_Shell_ResultCode_undefined
Ifx_Shell_ResultCode_ok

Definition at line 157 of file Ifx_Shell.h.


iLLD_TC26B: General

Modules
General
Service software » System Engineering
Collaboration diagram for General:

Modules

Global resources

Detailed Description


iLLD_TC26B: Global resources

Functions
Global resources
Service software » System Engineering » General
Collaboration diagram for Global resources:

Functions

IFX_EXTERN void * | Ifx_GlobalResources_get (sint32 id)
IFX_EXTERN sint32 | Ifx_GlobalResources_getIndex (void *resource)
Returns the global resource index. More...
IFX_EXTERN const Ifx_GlobalResources_Item * | Ifx_GlobalResources_getItem (sint32 id)
IFX_EXTERN pchar | Ifx_GlobalResources_getName (sint32 id)
IFX_EXTERN boolean | Ifx_GlobalResources_init (const Ifx_GlobalResources_Item *table, uint32 size)

Detailed Description

This module implements the global resources handling

Function Documentation

◆ Ifx_GlobalResources_get()

IFX_EXTERN void* Ifx_GlobalResources_get ( sint32 id )

Return a pointer to the global resource

Parameters
id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
Returns
return Ifx_GlobalResources_Item.resource

Definition at line 55 of file Ifx_GlobalResources.c.

◆ Ifx_GlobalResources_getIndex()

IFX_EXTERN sint32 Ifx_GlobalResources_getIndex ( void * resource )

Returns the global resource index.

Returns
Returns the global resource index, -1 if not found

Definition at line 79 of file Ifx_GlobalResources.c.

◆ Ifx_GlobalResources_getItem()

IFX_EXTERN const Ifx_GlobalResources_Item* Ifx_GlobalResources_getItem ( sint32 id )

Return a pointer to the global resource item

Parameters
id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
Returns
return the Ifx_GlobalResources_Item

Definition at line 103 of file Ifx_GlobalResources.c.

◆ Ifx_GlobalResources_getName()

IFX_EXTERN pchar Ifx_GlobalResources_getName ( sint32 id )

Return a the resource name as an NULL terminated string

Parameters
id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
Returns
return Ifx_GlobalResources_Item.name

Definition at line 127 of file Ifx_GlobalResources.c.

◆ Ifx_GlobalResources_init()

IFX_EXTERN boolean Ifx_GlobalResources_init | ( | const Ifx_GlobalResources_Item * | table,
 |  | uint32 | size
 | ) |  |

Initialize the global resource handler

Parameters
table | pointer to an array of Ifx_GlobalResources_Item
size | number of item in the table corresponds to sizeof(table)

return returns TRUE in case of success else FALSE

Definition at line 151 of file Ifx_GlobalResources.c.


iLLD_TC26B: Math

Modules
Math
Service software » System Engineering
Collaboration diagram for Math:

Modules

CRC
Look-ups
Math 32bit floating point

Detailed Description


iLLD_TC26B: CRC

Functions
CRC
Service software » System Engineering » Math
Collaboration diagram for CRC:

Functions

boolean | Ifx_Crc_init (Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
boolean | Ifx_Crc_createTable (Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
uint32 | Ifx_Crc_tableFast (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_table (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBit (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBitFast (Ifc_Crc *driver, uint8 *p, uint32 len)

Detailed Description

This module implements CRC algorithm

Function Documentation

◆ Ifx_Crc_bitByBit()

uint32 Ifx_Crc_bitByBit | ( | Ifc_Crc * | driver,
 |  | uint8 * | p,
 |  | uint32 | len
 | ) |  |

Definition at line 432 of file Ifx_Crc.c.

◆ Ifx_Crc_bitByBitFast()

uint32 Ifx_Crc_bitByBitFast | ( | Ifc_Crc * | driver,
 |  | uint8 * | p,
 |  | uint32 | len
 | ) |  |

Definition at line 489 of file Ifx_Crc.c.

◆ Ifx_Crc_createTable()

boolean Ifx_Crc_createTable | ( | Ifc_Crc_Table * | table,
 |  | sint32 | order,
 |  | uint32 | polynom,
 |  | sint32 | refin
 | ) |  |
Parameters
table | pointer to the crc table
order | [1..32] is the CRC polynom order, counted without the leading '1' bit
polynom | is the CRC polynom without leading '1' bit
refin | [0,1] specifies if a data byte is reflected before processing (UART) or not

Definition at line 117 of file Ifx_Crc.c.

◆ Ifx_Crc_init()

boolean Ifx_Crc_init | ( | Ifc_Crc * | driver,
 |  | const Ifc_Crc_Table * | table,
 |  | sint32 | direct,
 |  | sint32 | refout,
 |  | uint32 | crcinit,
 |  | uint32 | crcxor
 | ) |  |
Parameters
direct | [0,1] specifies the kind of algorithm: 1=direct, no augmented zero bits
driver | pointer to the crc driver
table | pointer to crc table
direct | direct
crcinit | is the initial CRC value belonging to that algorithm
crcxor | is the final XOR value
refout | [0,1] specifies if the CRC will be reflected before XOR
table | pointer to the table: Ifc_Crc_Table8, Ifc_Crc_Table16, Ifc_Crc_Table32

Definition at line 45 of file Ifx_Crc.c.

◆ Ifx_Crc_table()

uint32 Ifx_Crc_table | ( | Ifc_Crc * | driver,
 |  | uint8 * | p,
 |  | uint32 | len
 | ) |  |

Definition at line 304 of file Ifx_Crc.c.

◆ Ifx_Crc_tableFast()

uint32 Ifx_Crc_tableFast | ( | Ifc_Crc * | driver,
 |  | uint8 * | p,
 |  | uint32 | len
 | ) |  |

Definition at line 221 of file Ifx_Crc.c.


iLLD_TC26B: Look-ups

Modules | Macros
Look-ups
Service software » System Engineering » Math
Collaboration diagram for Look-ups:

Modules

Look-ups float32

Macros

#define | IFX_LUT_ANGLE_BITS (12)
Define the resolution (in bits) of cosinus and sinus table. More...
#define | IFX_LUT_ANGLE_RESOLUTION (1 << IFX_LUT_ANGLE_BITS)
Define the cosinus and sinus table size. More...

Detailed Description

Macro Definition Documentation

◆ IFX_LUT_ANGLE_BITS

#define IFX_LUT_ANGLE_BITS (12)

Define the resolution (in bits) of cosinus and sinus table.

Definition at line 69 of file Ifx_Lut.h.

◆ IFX_LUT_ANGLE_RESOLUTION

#define IFX_LUT_ANGLE_RESOLUTION (1 << IFX_LUT_ANGLE_BITS)

Define the cosinus and sinus table size.

Definition at line 72 of file Ifx_Lut.h.

Referenced by Ifx_LutAtan2F32_fxpAngle(), Ifx_LutLSincosF32_sin(), Ifx_LutSincosF32_init(), and Ifx_LutSincosF32_sin().


iLLD_TC26B: Look-ups float32

Modules
Look-ups float32
Service software » System Engineering » Math » Look-ups
Collaboration diagram for Look-ups float32:

Modules

ATAN lookup table
Indexes look-up table (with linear interpolation)
Look-up table (with linear interpolation)
Linear trigonometric Look-ups
Sinus and cosinus Look-ups

Detailed Description


iLLD_TC26B: ATAN lookup table

Functions
ATAN lookup table
Service software » System Engineering » Math » Look-ups » Look-ups float32
Collaboration diagram for ATAN lookup table:

Functions

IFX_EXTERN void | Ifx_LutAtan2F32_init (void)
Initialise the lookup tables. More...
IFX_EXTERN Ifx_Lut_FxpAngle | Ifx_LutAtan2F32_fxpAngle (float32 x, float32 y)
Look-up arcus tangent value of y/x. More...

Detailed Description

Function Documentation

◆ Ifx_LutAtan2F32_fxpAngle()

IFX_EXTERN Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAngle | ( | float32 | x,
 |  | float32 | y
 | ) |  |

Look-up arcus tangent value of y/x.

Returns
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI

Definition at line 84 of file Ifx_LutAtan2F32.c.

◆ Ifx_LutAtan2F32_init()

IFX_EXTERN void Ifx_LutAtan2F32_init ( void )

Initialise the lookup tables.

Definition at line 46 of file Ifx_LutAtan2F32.c.


iLLD_TC26B: Indexes look-up table (with linear interpolation)

Functions
Indexes look-up table (with linear interpolation)
Service software » System Engineering » Math » Look-ups » Look-ups float32
Collaboration diagram for Indexes look-up table (with linear interpolation):

Functions

IFX_INLINE float32 Ifx_LutIndexedLinearF32_search (const Ifx_LutIndexedLinearF32 *ml, uint32 index)
Look-up table search. More...

Detailed Description

Function Documentation

◆ Ifx_LutIndexedLinearF32_search()

IFX_INLINE float32 Ifx_LutIndexedLinearF32_search | ( | const Ifx_LutIndexedLinearF32 * | ml,
 |  | uint32 | index
 | ) |  |

Look-up table search.

Parameters
ml pointer to the multi-segment object
index
Returns
interpolated value

Definition at line 84 of file Ifx_LutIndexedLinearF32.h.

Referenced by Ifx_LutLSincosF32_sin().


iLLD_TC26B: Look-up table (with linear interpolation)

Functions
Look-up table (with linear interpolation)
Service software » System Engineering » Math » Look-ups » Look-ups float32
Collaboration diagram for Look-up table (with linear interpolation):

Functions

IFX_EXTERN float32 | Ifx_LutLinearF32_searchBin (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with binary search implementation. More...
IFX_INLINE float32 | Ifx_LutLinearF32_searchNegSeq (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with negative sequential search implementation. More...
IFX_INLINE float32 | Ifx_LutLinearF32_searchPosSeq (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with positive sequential search implementation. More...

Detailed Description

Function Documentation

◆ Ifx_LutLinearF32_searchBin()

IFX_EXTERN float32 Ifx_LutLinearF32_searchBin | ( | const Ifx_LutLinearF32 * | ml,
 |  | float32 | index
 | ) |  |

Look-up table with binary search implementation.

Value inside table will be linearly interpolated. Value outside table will be linearly extrapolated.

Parameters
ml pointer to the multi-segment object
index
Returns
linear interpolated value

Definition at line 53 of file Ifx_LutLinearF32.c.

◆ Ifx_LutLinearF32_searchNegSeq()

IFX_INLINE float32 Ifx_LutLinearF32_searchNegSeq | ( | const Ifx_LutLinearF32 * | ml,
 |  | float32 | index
 | ) |  |

Look-up table with negative sequential search implementation.

Value inside table will be linearly interpolated Value outside table will be linearly extrapolated

Parameters
ml pointer to the multi-segment object
index
Returns
interpolated value

Definition at line 109 of file Ifx_LutLinearF32.h.

◆ Ifx_LutLinearF32_searchPosSeq()

IFX_INLINE float32 Ifx_LutLinearF32_searchPosSeq | ( | const Ifx_LutLinearF32 * | ml,
 |  | float32 | index
 | ) |  |

Look-up table with positive sequential search implementation.

Value inside table will be linearly interpolated Value outside table will be linearly extrapolated

Parameters
ml pointer to the multi-segment object
index
Returns
interpolated value

Definition at line 88 of file Ifx_LutLinearF32.h.


iLLD_TC26B: Linear trigonometric Look-ups

Files | Functions
Linear trigonometric Look-ups
Service software » System Engineering » Math » Look-ups » Look-ups float32
Collaboration diagram for Linear trigonometric Look-ups:

Files

file Ifx_LutLSincosF32.h
Sin/Cos linear approximated lookup functions with fixed-point angle data type.

Functions

IFX_INLINE float32 | Ifx_LutLSincosF32_sin (Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function. More...
IFX_INLINE float32 | Ifx_LutLSincosF32_cos (Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function. More...
IFX_INLINE cfloat32 | Ifx_LutLSincosF32_cossin (Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function. More...

Detailed Description

Function Documentation

◆ Ifx_LutLSincosF32_cos()

IFX_INLINE float32 Ifx_LutLSincosF32_cos ( Ifx_Lut_FxpAngle fxpAngle )

Cosine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
Returns
cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 81 of file Ifx_LutLSincosF32.h.

◆ Ifx_LutLSincosF32_cossin()

IFX_INLINE cfloat32 Ifx_LutLSincosF32_cossin ( Ifx_Lut_FxpAngle fxpAngle )

Sine and Cosine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
Return values
real | = cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
imag | = sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 94 of file Ifx_LutLSincosF32.h.

◆ Ifx_LutLSincosF32_sin()

IFX_INLINE float32 Ifx_LutLSincosF32_sin ( Ifx_Lut_FxpAngle fxpAngle )

Sine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1)
Returns
sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 67 of file Ifx_LutLSincosF32.h.

Referenced by Ifx_LutLSincosF32_cos(), and Ifx_LutLSincosF32_cossin().


iLLD_TC26B: Ifx_LutLSincosF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions | Variables
Ifx_LutLSincosF32.h File Reference
Service software » System Engineering » Math » Look-ups » Look-ups float32 » Linear trigonometric Look-ups

Sin/Cos linear approximated lookup functions with fixed-point angle data type. More...

#include "SysSe/Math/IFX_Cf32.h"
#include "Ifx_Lut.h"
#include "Ifx_LutIndexedLinearF32.h"
Include dependency graph for Ifx_LutLSincosF32.h:

Go to the source code of this file.

Functions

IFX_INLINE float32 | Ifx_LutLSincosF32_sin (Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function. More...
IFX_INLINE float32 | Ifx_LutLSincosF32_cos (Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function. More...
IFX_INLINE cfloat32 | Ifx_LutLSincosF32_cossin (Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function. More...

Variables

IFX_EXTERN const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32
Look-up table for sin. More...

Detailed Description

Sin/Cos linear approximated lookup functions with fixed-point angle data type.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutLSincosF32.h.

Variable Documentation

◆ Ifx_g_LutLSincosF32

IFX_EXTERN const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32

Look-up table for sin.

Definition at line 59 of file Ifx_LutLSincosF32.h.

Referenced by Ifx_LutLSincosF32_sin().


iLLD_TC26B: Sinus and cosinus Look-ups

Files | Functions
Sinus and cosinus Look-ups
Service software » System Engineering » Math » Look-ups » Look-ups float32
Collaboration diagram for Sinus and cosinus Look-ups:

Files

file Ifx_LutSincosF32.h
Sin/Cos lookup functions with fixed-point angle data type.

Functions

IFX_EXTERN void | Ifx_LutSincosF32_init (void)
Initialise the lookup tables. More...
IFX_EXTERN float32 | Ifx_LutSincosF32_sin (Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function. More...
IFX_INLINE float32 | Ifx_LutSincosF32_cos (Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function. More...
IFX_INLINE cfloat32 | Ifx_LutSincosF32_cossin (Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function. More...

Detailed Description

Function Documentation

◆ Ifx_LutSincosF32_cos()

IFX_INLINE float32 Ifx_LutSincosF32_cos ( Ifx_Lut_FxpAngle fxpAngle )

Cosine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
Returns
cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 81 of file Ifx_LutSincosF32.h.

◆ Ifx_LutSincosF32_cossin()

IFX_INLINE cfloat32 Ifx_LutSincosF32_cossin ( Ifx_Lut_FxpAngle fxpAngle )

Sine and Cosine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
Return values
real | = cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
imag | = sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 94 of file Ifx_LutSincosF32.h.

◆ Ifx_LutSincosF32_init()

IFX_EXTERN void Ifx_LutSincosF32_init ( void )

Initialise the lookup tables.

Note
This is not required if (IFX_LUT_TABLE_CONST == 1)

Definition at line 46 of file Ifx_LutSincosF32.c.

◆ Ifx_LutSincosF32_sin()

IFX_EXTERN float32 Ifx_LutSincosF32_sin ( Ifx_Lut_FxpAngle fxpAngle )

Sine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1)
Returns
sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 61 of file Ifx_LutSincosF32.c.

Referenced by Ifx_LutSincosF32_cos(), and Ifx_LutSincosF32_cossin().


iLLD_TC26B: Ifx_LutSincosF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions | Variables
Ifx_LutSincosF32.h File Reference
Service software » System Engineering » Math » Look-ups » Look-ups float32 » Sinus and cosinus Look-ups

Sin/Cos lookup functions with fixed-point angle data type. More...

#include "SysSe/Math/Ifx_Cf32.h"
#include "Ifx_Lut.h"
Include dependency graph for Ifx_LutSincosF32.h:

Go to the source code of this file.

Functions

IFX_EXTERN void | Ifx_LutSincosF32_init (void)
Initialise the lookup tables. More...
IFX_EXTERN float32 | Ifx_LutSincosF32_sin (Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function. More...
IFX_INLINE float32 | Ifx_LutSincosF32_cos (Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function. More...
IFX_INLINE cfloat32 | Ifx_LutSincosF32_cossin (Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function. More...

Variables

IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table [(IFX_LUT_ANGLE_PI/2)+1]
Look-up table for sin(IFX_PI*2*k/IFX_LUT_ANGLE_RESOLUTION), where k = 0..IFX_LUT_ANGLE_RESOLUTION. More...

Detailed Description

Sin/Cos lookup functions with fixed-point angle data type.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutSincosF32.h.

Variable Documentation

◆ Ifx_g_LutSincosF32_table

IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table[(IFX_LUT_ANGLE_PI/2)+1]

Look-up table for sin(IFX_PI*2*k/IFX_LUT_ANGLE_RESOLUTION), where k = 0..IFX_LUT_ANGLE_RESOLUTION.

Definition at line 59 of file Ifx_LutSincosF32.h.

Referenced by Ifx_LutSincosF32_init(), and Ifx_LutSincosF32_sin().


iLLD_TC26B: Math 32bit floating point

Modules
Math 32bit floating point
Service software » System Engineering » Math
Collaboration diagram for Math 32bit floating point:

Modules

Angle-Tracking Observer
Floating point signal, vector, and matrix library
Floating-point FFT
Discrete Integral Approximation
Low-pass Filter: Type PT1
Ramp
Window functions

Detailed Description


iLLD_TC26B: Angle-Tracking Observer

Functions
Angle-Tracking Observer
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Angle-Tracking Observer:

Functions

IFX_EXTERN float32 | Ifx_AngleTrkF32_getAbsolutePosition (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_Dir | Ifx_AngleTrkF32_getDirection (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_Status | Ifx_AngleTrkF32_getFault (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getOffset (Ifx_AngleTrkF32 *driver)
IFX_EXTERN uint16 | Ifx_AngleTrkF32_getPeriodPerRotation (Ifx_AngleTrkF32 *driver)
IFX_EXTERN float32 | Ifx_AngleTrkF32_getPosition (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_RawAngle | Ifx_AngleTrkF32_getRawPosition (Ifx_AngleTrkF32 *aObsv)
Returns the actual position. More...
IFX_EXTERN float32 | Ifx_AngleTrkF32_getRefreshPeriod (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getResolution (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getTurn (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_SensorType | Ifx_AngleTrkF32_getSensorType (Ifx_AngleTrkF32 *driver)
IFX_EXTERN float32 | Ifx_AngleTrkF32_getSpeed (Ifx_AngleTrkF32 *aObsv)
Returns the Speed. More...
IFX_EXTERN void | Ifx_AngleTrkF32_reset (Ifx_AngleTrkF32 *driver)
IFX_EXTERN void | Ifx_AngleTrkF32_resetFaults (Ifx_AngleTrkF32 *driver)
IFX_EXTERN void | Ifx_AngleTrkF32_setOffset (Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
Set the position offset (in ticks) More...
IFX_EXTERN void | Ifx_AngleTrkF32_setRefreshPeriod (Ifx_AngleTrkF32 *driver, float32 updatePeriod)
IFX_EXTERN void | Ifx_AngleTrkF32_update (Ifx_AngleTrkF32 *aObsv)
Update the object directly from its analog input. More...

Initialisation functions

Example use:

extern sint16 g_SinInput, g_CosInput;
Ifx_AngleTrkF32_Config driverConfig;
Ifx_AngleTrkF32 driverData;
Ifx_AngleTrkF32_initConfig(&driverConfig, &g_SinInput, g_CosInput);
driverConfig.errorThreshold = 5.0 / 180 * IFX_PI; // 5 degree error
driverConfig.sqrAmplMax = 1.01 * 1.01;
driverConfig.sqrAmplMin = 0.99 * 0.99;
driverConfig.speedLpfFc = 100;
driverConfig.periodPerRotation = 1;
driverConfig.reversed = FALSE;
driverConfig.offset = 0;
Ifx_AngleTrkF32_init(&driverData, &driverConfig);

Prototypes:

IFX_EXTERN void | Ifx_AngleTrkF32_init (Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
Initialize the Angle Tracking object. More...
IFX_EXTERN void | Ifx_AngleTrkF32_initConfig (Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
Fill config with default values. More...

Protected functions

These functions are not for end-user but may be used by another driver which extends the functionality of library_srvsw_sysse_math_f32_angletrk

IFX_EXTERN float32 | Ifx_AngleTrkF32_step (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisation (call to Ifx_AngleTrkF32_init()). More...
IFX_EXTERN void | Ifx_AngleTrkF32_updateStatus (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
Update the status flags. More...
IFX_INLINE float32 | Ifx_AngleTrkF32_getLoopSpeed (Ifx_AngleTrkF32 *aObsv)
get the speed. More...

Detailed Description

This driver implements Standard interface: Position interface using 3rd order Angle-Tracking Observer algorithm.

Function Documentation

◆ Ifx_AngleTrkF32_getAbsolutePosition()

IFX_EXTERN float32 Ifx_AngleTrkF32_getAbsolutePosition ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetAbsolutePosition
Parameters
driver driver handle
Returns
absolute position

Definition at line 335 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getAbsolutePosition().

◆ Ifx_AngleTrkF32_getDirection()

IFX_EXTERN IfxStdIf_Pos_Dir Ifx_AngleTrkF32_getDirection ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetDirection
Parameters
driver driver handle
Returns
direction

Definition at line 341 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getDirection().

◆ Ifx_AngleTrkF32_getFault()

IFX_EXTERN IfxStdIf_Pos_Status Ifx_AngleTrkF32_getFault ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetFault
Parameters
driver driver handle
Returns
Fault

Definition at line 347 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getFault().

◆ Ifx_AngleTrkF32_getLoopSpeed()

IFX_INLINE float32 Ifx_AngleTrkF32_getLoopSpeed ( Ifx_AngleTrkF32 * aObsv )

get the speed.

Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object

Definition at line 175 of file Ifx_AngleTrkF32.h.

Referenced by IfxDsadc_Rdc_update().

◆ Ifx_AngleTrkF32_getOffset()

IFX_EXTERN sint32 Ifx_AngleTrkF32_getOffset ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetOffset
Parameters
driver driver handle
Returns
offset address

Definition at line 353 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getOffset().

◆ Ifx_AngleTrkF32_getPeriodPerRotation()

IFX_EXTERN uint16 Ifx_AngleTrkF32_getPeriodPerRotation ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetPeriodPerRotation
Parameters
driver driver handle
Returns
Period per rotation

Definition at line 359 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getPeriodPerRotation().

◆ Ifx_AngleTrkF32_getPosition()

IFX_EXTERN float32 Ifx_AngleTrkF32_getPosition ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetPosition
Parameters
driver driver handle
Returns
position

Definition at line 365 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getPosition().

◆ Ifx_AngleTrkF32_getRawPosition()

IFX_EXTERN IfxStdIf_Pos_RawAngle Ifx_AngleTrkF32_getRawPosition ( Ifx_AngleTrkF32 * aObsv )

Returns the actual position.

See also
IfxStdIf_Pos_GetRawPosition
Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object
Returns
position in ticks
Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object
Note
This function returns the angular position in ticks 0 .. Ifx_AngleTrkF32.base.resolution-1

Definition at line 314 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getRawPosition().

◆ Ifx_AngleTrkF32_getRefreshPeriod()

IFX_EXTERN float32 Ifx_AngleTrkF32_getRefreshPeriod ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetRefreshPeriod
Parameters
driver driver handle
Returns
update period

Definition at line 371 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getRefreshPeriod().

◆ Ifx_AngleTrkF32_getResolution()

IFX_EXTERN sint32 Ifx_AngleTrkF32_getResolution ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetResolution
Parameters
driver driver handle
Returns
resolution

Definition at line 377 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getResolution().

◆ Ifx_AngleTrkF32_getSensorType()

IFX_EXTERN IfxStdIf_Pos_SensorType Ifx_AngleTrkF32_getSensorType ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetSensorType
Parameters
driver driver handle
Returns
sensor type

Definition at line 383 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_getSpeed()

IFX_EXTERN float32 Ifx_AngleTrkF32_getSpeed ( Ifx_AngleTrkF32 * aObsv )

Returns the Speed.

See also
IfxStdIf_Pos_GetSpeed
Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object
Returns
speed
Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object

Definition at line 324 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getSpeed().

◆ Ifx_AngleTrkF32_getTurn()

IFX_EXTERN sint32 Ifx_AngleTrkF32_getTurn ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetTurn
Parameters
driver driver handle
Returns
Returns the number of turns

Definition at line 390 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getTurn().

◆ Ifx_AngleTrkF32_init()

IFX_EXTERN void Ifx_AngleTrkF32_init | ( | Ifx_AngleTrkF32 * | aObsv,
 |  | const Ifx_AngleTrkF32_Config * | config,
 |  | float32 | Ts
 | ) |  |

Initialize the Angle Tracking object.

Parameters
aObsv | Pointer to the Ifx_AngleTrkF32 object
config | Pointer to the configuration data
Ts | sampling period in seconds

Definition at line 162 of file Ifx_AngleTrkF32.c.

Referenced by IfxDsadc_Rdc_init().

◆ Ifx_AngleTrkF32_initConfig()

IFX_EXTERN void Ifx_AngleTrkF32_initConfig | ( | Ifx_AngleTrkF32_Config * | config,
 |  | sint16 * | sinIn,
 |  | sint16 * | cosIn
 | ) |  |

Fill config with default values.

12-bit default resolution

Definition at line 130 of file Ifx_AngleTrkF32.c.

Referenced by IfxDsadc_Rdc_init().

◆ Ifx_AngleTrkF32_reset()

IFX_EXTERN void Ifx_AngleTrkF32_reset ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_Reset
Parameters
driver driver handle
Returns
None

Definition at line 408 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_reset().

◆ Ifx_AngleTrkF32_resetFaults()

IFX_EXTERN void Ifx_AngleTrkF32_resetFaults ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_ResetFaults
Parameters
driver driver handle
Returns
None

Definition at line 396 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_resetFaults().

◆ Ifx_AngleTrkF32_setOffset()

IFX_EXTERN void Ifx_AngleTrkF32_setOffset | ( | Ifx_AngleTrkF32 * | aObsv,
 |  | IfxStdIf_Pos_RawAngle | offset
 | ) |  |

Set the position offset (in ticks)

See also
IfxStdIf_Pos_SetOffset
Parameters
aObsv | driver handle
offset | offset
Returns
None
Parameters
aObsv | Pointer to the Ifx_AngleTrkF32 object
offset | Position offset in ticks

Definition at line 271 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_setOffset().

◆ Ifx_AngleTrkF32_setRefreshPeriod()

IFX_EXTERN void Ifx_AngleTrkF32_setRefreshPeriod | ( | Ifx_AngleTrkF32 * | driver,
 |  | float32 | updatePeriod
 | ) |  |
See also
IfxStdIf_Pos_SetRefreshPeriod
Parameters
driver | driver handle
updatePeriod | update period
Returns
None

Definition at line 402 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_setRefreshPeriod().

◆ Ifx_AngleTrkF32_step()

IFX_EXTERN float32 Ifx_AngleTrkF32_step | ( | Ifx_AngleTrkF32 * | aObsv,
 |  | sint16 | sinIn,
 |  | sint16 | cosIn,
 |  | float32 | phase
 | ) |  |

Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisation (call to Ifx_AngleTrkF32_init()).

Note
This function is automatically called by Ifx_AngleTrkF32_update()
Parameters
aObsv | Pointer to the Ifx_AngleTrkF32 object
sinIn | sine input signal. The offset shall be zero.
cosIn | cosine input signal. The offset shall be zero.
phase | phase of input signal.
Note
This function returns the angular position in radians
The amplitude of both sinIn and cosIn signal shall be the same.

Definition at line 220 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_update(), IfxDsadc_Rdc_onEventA(), and IfxDsadc_Rdc_update().

◆ Ifx_AngleTrkF32_update()

IFX_EXTERN void Ifx_AngleTrkF32_update ( Ifx_AngleTrkF32 * aObsv )

Update the object directly from its analog input.

See also
IfxStdIf_Pos_Update
Parameters
aObsv driver handle
Returns
None
Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object

Definition at line 297 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_updateStatus()

IFX_EXTERN void Ifx_AngleTrkF32_updateStatus | ( | Ifx_AngleTrkF32 * | aObsv,
 |  | sint16 | sinIn,
 |  | sint16 | cosIn
 | ) |  |

Update the status flags.

Parameters
aObsv | Pointer to the Ifx_AngleTrkF32 object
sinIn | Sinus value
cosIn | Cosinus value
Note
This function is automatically called by Ifx_AngleTrkF32_update()

Definition at line 284 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_update(), IfxDsadc_Rdc_onEventA(), and IfxDsadc_Rdc_update().


iLLD_TC26B: Floating point signal, vector, and matrix library

Floating point signal, vector, and matrix library
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Floating point signal, vector, and matrix library:


iLLD_TC26B: Floating-point FFT

Files
Floating-point FFT
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Floating-point FFT:

Files

file Ifx_FftF32.h
Floating-point Fast Fourier Transform.

Transform functions

IFX_EXTERN cfloat32 * | Ifx_FftF32_generateTwiddleFactor (cfloat32 *TF, sint16 nX)
Twiddle factor generator. More...
IFX_EXTERN cfloat32 * | Ifx_FftF32_radix2 (cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Fast-Fourier Transform. More...
IFX_EXTERN cfloat32 * | Ifx_FftF32_radix2I (cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Inverse Fast-Fourier Transform. More...

Utility functions

IFX_INLINE uint16 | Ifx_FftF32_lookUpReversedBits (uint16 n, unsigned bits)
Lookup from Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits. More...
IFX_INLINE cfloat32 | Ifx_FftF32_lookUpTwiddleFactor (sint32 N, sint32 k)
Lookup from Ifx_g_FftF32_twiddleTable the twiddle factor for N, k. More...
IFX_EXTERN uint16 | Ifx_FftF32_reverseBits (uint16 n, unsigned bits)
Calculate the bit-reversed <n> with <bits> as number of bits. More...

Detailed Description

This module implements the Fast Fourier Transform in single precision floating-point

Function Documentation

◆ Ifx_FftF32_generateTwiddleFactor()

IFX_EXTERN cfloat32* Ifx_FftF32_generateTwiddleFactor | ( | cfloat32 * | TF,
 |  | sint16 | nX
 | ) |  |

Twiddle factor generator.

Definition at line 48 of file Ifx_FftF32.c.

◆ Ifx_FftF32_lookUpReversedBits()

IFX_INLINE uint16 Ifx_FftF32_lookUpReversedBits | ( | uint16 | n,
 |  | unsigned | bits
 | ) |  |

Lookup from Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits.

Definition at line 90 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_radix2(), and Ifx_FftF32_radix2I().

◆ Ifx_FftF32_lookUpTwiddleFactor()

IFX_INLINE cfloat32 Ifx_FftF32_lookUpTwiddleFactor | ( | sint32 | N,
 |  | sint32 | k
 | ) |  |

Lookup from Ifx_g_FftF32_twiddleTable the twiddle factor for N, k.

Definition at line 99 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_radix2DecimationInTime().

◆ Ifx_FftF32_radix2()

IFX_EXTERN cfloat32* Ifx_FftF32_radix2 | ( | cfloat32 * | R,
 |  | const cfloat32 * | X,
 |  | uint16 | nX
 | ) |  |

Radix-2 Fast-Fourier Transform.

Definition at line 140 of file Ifx_FftF32.c.

◆ Ifx_FftF32_radix2I()

IFX_EXTERN cfloat32* Ifx_FftF32_radix2I | ( | cfloat32 * | R,
 |  | const cfloat32 * | X,
 |  | uint16 | nX
 | ) |  |

Radix-2 Inverse Fast-Fourier Transform.

Definition at line 159 of file Ifx_FftF32.c.

◆ Ifx_FftF32_reverseBits()

IFX_EXTERN uint16 Ifx_FftF32_reverseBits | ( | uint16 | n,
 |  | unsigned | bits
 | ) |  |

Calculate the bit-reversed <n> with <bits> as number of bits.

Definition at line 67 of file Ifx_FftF32.c.


iLLD_TC26B: Ifx_FftF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Variables
Ifx_FftF32.h File Reference
Service software » System Engineering » Math » Math 32bit floating point » Floating-point FFT

Floating-point Fast Fourier Transform. More...

#include "Ifx_Cf32.h"
Include dependency graph for Ifx_FftF32.h:

Go to the source code of this file.

Macros

#define | IFX_FFTF32_MAX_RESOLUTION (14)
Maximum FFT resolution (bits). If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable shall be regenerated. More...
#define | IFX_FFTF32_MAX_LENGTH (1U << IFX_FFTF32_MAX_RESOLUTION)
Maximum FFT length. If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable shall be regenerated. More...

Functions

Transform functions
IFX_EXTERN cfloat32 * | Ifx_FftF32_generateTwiddleFactor (cfloat32 *TF, sint16 nX)
Twiddle factor generator. More...
IFX_EXTERN cfloat32 * | Ifx_FftF32_radix2 (cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Fast-Fourier Transform. More...
IFX_EXTERN cfloat32 * | Ifx_FftF32_radix2I (cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Inverse Fast-Fourier Transform. More...
Utility functions
IFX_INLINE uint16 | Ifx_FftF32_lookUpReversedBits (uint16 n, unsigned bits)
Lookup from Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits. More...
IFX_INLINE cfloat32 | Ifx_FftF32_lookUpTwiddleFactor (sint32 N, sint32 k)
Lookup from Ifx_g_FftF32_twiddleTable the twiddle factor for N, k. More...
IFX_EXTERN uint16 | Ifx_FftF32_reverseBits (uint16 n, unsigned bits)
Calculate the bit-reversed <n> with <bits> as number of bits. More...

Variables

IFX_EXTERN IFX_CONST uint16 Ifx_g_FftF32_bitReverseTable [IFX_FFTF32_MAX_LENGTH]
Bit reversal table. More...
IFX_EXTERN IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable [IFX_FFTF32_MAX_LENGTH/2]
Twiddle factor table. More...

Detailed Description

Floating-point Fast Fourier Transform.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_FftF32.h.

Macro Definition Documentation

◆ IFX_FFTF32_MAX_LENGTH

#define IFX_FFTF32_MAX_LENGTH (1U << IFX_FFTF32_MAX_RESOLUTION)

Maximum FFT length. If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable shall be regenerated.

Definition at line 60 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_lookUpTwiddleFactor().

◆ IFX_FFTF32_MAX_RESOLUTION

#define IFX_FFTF32_MAX_RESOLUTION (14)

Maximum FFT resolution (bits). If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable shall be regenerated.

Definition at line 56 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_lookUpReversedBits().

Variable Documentation

◆ Ifx_g_FftF32_bitReverseTable

IFX_EXTERN IFX_CONST uint16 Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH]

Bit reversal table.

Definition at line 63 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_lookUpReversedBits().

◆ Ifx_g_FftF32_twiddleTable

IFX_EXTERN IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH/2]

Twiddle factor table.

Definition at line 66 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_lookUpTwiddleFactor().


iLLD_TC26B: Discrete Integral Approximation

Files | Functions
Discrete Integral Approximation
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Discrete Integral Approximation:

Files

file Ifx_IntegralF32.h
Discrete integral approximation.

Functions

void | Ifx_IntegralF32_init (Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
float32 | Ifx_IntegralF32_step (Ifx_IntegralF32 *ci, float32 ik)
Step function of the integrator object. More...
void | Ifx_IntegralF32_reset (Ifx_IntegralF32 *ci)
Reset the integrator object. More...
void | Ifx_ClpxFloat32_Integral_init (Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
cfloat32 | Ifx_ClpxFloat32_Integral_step (Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
Step function of the integrator object. More...
void | Ifx_ClpxFloat32_Integral_reset (Ifx_ClpxFloat32_Integral *ci)
Reset the integrator object. More...

Detailed Description

Function Documentation

◆ Ifx_ClpxFloat32_Integral_init()

void Ifx_ClpxFloat32_Integral_init | ( | Ifx_ClpxFloat32_Integral * | ci,
 |  | float32 | gain,
 |  | float32 | Ts
 | ) |  |

Initialize the integrator object.

Parameters
ci | Pointer to the integrator object
gain | Integrator gain
Ts | Sampling period

Definition at line 75 of file Ifx_IntegralF32.c.

◆ Ifx_ClpxFloat32_Integral_reset()

void Ifx_ClpxFloat32_Integral_reset ( Ifx_ClpxFloat32_Integral * ci )

Reset the integrator object.

Parameters
ci Pointer to the integrator object

Definition at line 66 of file Ifx_IntegralF32.c.

Referenced by Ifx_ClpxFloat32_Integral_init().

◆ Ifx_ClpxFloat32_Integral_step()

cfloat32 Ifx_ClpxFloat32_Integral_step | ( | Ifx_ClpxFloat32_Integral * | ci,
 |  | cfloat32 | ik
 | ) |  |

Step function of the integrator object.

Parameters
ci | Pointer to the integrator object
ik | input value
Returns
most actual integrator value

Definition at line 82 of file Ifx_IntegralF32.c.

◆ Ifx_IntegralF32_init()

void Ifx_IntegralF32_init | ( | Ifx_IntegralF32 * | ci,
 |  | float32 | gain,
 |  | float32 | Ts
 | ) |  |

Initialize the integrator object.

Parameters
ci | Pointer to the integrator object
gain | Integrator gain
Ts | Sampling period

Definition at line 51 of file Ifx_IntegralF32.c.

◆ Ifx_IntegralF32_reset()

void Ifx_IntegralF32_reset ( Ifx_IntegralF32 * ci )

Reset the integrator object.

Parameters
ci Pointer to the integrator object

Definition at line 44 of file Ifx_IntegralF32.c.

◆ Ifx_IntegralF32_step()

float32 Ifx_IntegralF32_step | ( | Ifx_IntegralF32 * | ci,
 |  | float32 | ik
 | ) |  |

Step function of the integrator object.

Parameters
ci | Pointer to the integrator object
ik | input value
Returns
most actual integrator value

Definition at line 57 of file Ifx_IntegralF32.c.


iLLD_TC26B: Ifx_IntegralF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Functions
Ifx_IntegralF32.h File Reference
Service software » System Engineering » Math » Math 32bit floating point » Discrete Integral Approximation

Discrete integral approximation. More...

#include "Ifx_Cf32.h"
Include dependency graph for Ifx_IntegralF32.h:

Go to the source code of this file.

Data Structures

struct | Ifx_IntegralF32
Integrator object for float32 data type. More...
struct | Ifx_ClpxFloat32_Integral
Integrator object for cfloat32 data type. More...

Functions

void | Ifx_IntegralF32_init (Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
float32 | Ifx_IntegralF32_step (Ifx_IntegralF32 *ci, float32 ik)
Step function of the integrator object. More...
void | Ifx_IntegralF32_reset (Ifx_IntegralF32 *ci)
Reset the integrator object. More...
void | Ifx_ClpxFloat32_Integral_init (Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
cfloat32 | Ifx_ClpxFloat32_Integral_step (Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
Step function of the integrator object. More...
void | Ifx_ClpxFloat32_Integral_reset (Ifx_ClpxFloat32_Integral *ci)
Reset the integrator object. More...

Detailed Description

Discrete integral approximation.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_IntegralF32.h.

Data Structure Documentation

◆ Ifx_IntegralF32

struct Ifx_IntegralF32

Integrator object for float32 data type.

Definition at line 54 of file Ifx_IntegralF32.h.

Data Fields
float32 | delta
float32 | ik
float32 | uk

◆ Ifx_ClpxFloat32_Integral

struct Ifx_ClpxFloat32_Integral

Integrator object for cfloat32 data type.

Definition at line 62 of file Ifx_IntegralF32.h.

Collaboration diagram for Ifx_ClpxFloat32_Integral:
[legend]
Data Fields
float32 | delta
cfloat32 | ik
cfloat32 | uk


iLLD_TC26B: Low-pass Filter: Type PT1

Functions
Low-pass Filter: Type PT1
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Low-pass Filter: Type PT1:

Functions

IFX_EXTERN void | Ifx_LowPassPt1F32_init (Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration. More...
IFX_INLINE void | Ifx_LowPassPt1F32_reset (Ifx_LowPassPt1F32 *filter)
Reset the internal filter variable. More...
IFX_EXTERN float32 | Ifx_LowPassPt1F32_do (Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter. More...

Detailed Description

This module implements a PT1 low pass filter. http://de.wikipedia.org/wiki/PT1-Glied

Formula:
$ y_k = y_{k-1} + a * x_k - b * y_{k-1} $
with [image], $(a = K*T^*)$, $(b = T^*)$ with $(T_s: Sample time)$, $(K: Gain)$,

Function Documentation

◆ Ifx_LowPassPt1F32_do()

IFX_EXTERN float32 Ifx_LowPassPt1F32_do | ( | Ifx_LowPassPt1F32 * | filter,
 |  | float32 | input
 | ) |  |

Execute the low pass filter.

Parameters
filter | Specifies PT1 filter.
input | Specifies the filter input.
Returns
Returns the filter output

Definition at line 73 of file Ifx_LowPassPt1F32.c.

Referenced by Ifx_AngleTrkF32_step().

◆ Ifx_LowPassPt1F32_init()

IFX_EXTERN void Ifx_LowPassPt1F32_init | ( | Ifx_LowPassPt1F32 * | filter,
 |  | const Ifx_LowPassPt1F32_Config * | config
 | ) |  |

Set the low pass filter configuration.

This function sets the low pass filter configuration and reset the filter output.

Parameters
filter | Specifies PT1 filter.
config | Specifies the PT1 filter configuration.
Returns
None

Definition at line 55 of file Ifx_LowPassPt1F32.c.

Referenced by Ifx_AngleTrkF32_init().

◆ Ifx_LowPassPt1F32_reset()

IFX_INLINE void Ifx_LowPassPt1F32_reset ( Ifx_LowPassPt1F32 * filter )

Reset the internal filter variable.

Parameters
filter Specifies PT1 filter.

Definition at line 90 of file Ifx_LowPassPt1F32.h.

Referenced by Ifx_AngleTrkF32_reset().


iLLD_TC26B: Ramp

Functions
Ramp
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Ramp:

Functions

IFX_INLINE void | Ifx_RampF32_init (Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Initialize the Ifx_RampF32 object. More...
IFX_INLINE void | Ifx_RampF32_reset (Ifx_RampF32 *ramp)
Reset internal values. More...
IFX_INLINE void | Ifx_RampF32_setSlewRate (Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Set the maximum slew rate. More...
IFX_INLINE void | Ifx_RampF32_setRef (Ifx_RampF32 *ramp, float32 ref)
Set the reference value. More...
IFX_INLINE float32 | Ifx_RampF32_getValue (Ifx_RampF32 *ramp)
Get the actual output value. More...
IFX_EXTERN float32 | Ifx_RampF32_step (Ifx_RampF32 *ramp)
Execute the Ramp function. More...

Detailed Description

Function Documentation

◆ Ifx_RampF32_getValue()

IFX_INLINE float32 Ifx_RampF32_getValue ( Ifx_RampF32 * ramp )

Get the actual output value.

Parameters
ramp Pointer to the Ifx_RampF32 object
Returns
Actual value

Definition at line 141 of file Ifx_RampF32.h.

◆ Ifx_RampF32_init()

IFX_INLINE void Ifx_RampF32_init | ( | Ifx_RampF32 * | ramp,
 |  | float32 | slewRate,
 |  | float32 | period
 | ) |  |

Initialize the Ifx_RampF32 object.

Parameters
ramp | Pointer to the Ifx_RampF32 object
slewRate | Maximum slew rate, value per second
period | Sampling period of the Ifx_RampF32_step() function

Definition at line 118 of file Ifx_RampF32.h.

◆ Ifx_RampF32_reset()

IFX_INLINE void Ifx_RampF32_reset ( Ifx_RampF32 * ramp )

Reset internal values.

Parameters
ramp Pointer to the Ifx_RampF32 object

Definition at line 82 of file Ifx_RampF32.h.

Referenced by Ifx_RampF32_init().

◆ Ifx_RampF32_setRef()

IFX_INLINE void Ifx_RampF32_setRef | ( | Ifx_RampF32 * | ramp,
 |  | float32 | ref
 | ) |  |

Set the reference value.

Parameters
ramp | Pointer to the Ifx_RampF32 object
ref | Reference value

Definition at line 130 of file Ifx_RampF32.h.

◆ Ifx_RampF32_setSlewRate()

IFX_INLINE void Ifx_RampF32_setSlewRate | ( | Ifx_RampF32 * | ramp,
 |  | float32 | slewRate,
 |  | float32 | period
 | ) |  |

Set the maximum slew rate.

Parameters
ramp | Pointer to the Ifx_RampF32 object
slewRate | Maximum slew rate, value per second
period | Sampling period of the Ifx_RampF32_step() function

Definition at line 106 of file Ifx_RampF32.h.

Referenced by Ifx_RampF32_init().

◆ Ifx_RampF32_step()

IFX_EXTERN float32 Ifx_RampF32_step ( Ifx_RampF32 * ramp )

Execute the Ramp function.

NOTE: shall be called every 'period'. The period was defined by Ifx_RampF32_init() or Ifx_RampF32_setSlewRate()

Parameters
ramp Pointer to the Ifx_RampF32 object
Returns
Actual value

Definition at line 54 of file Ifx_RampF32.c.


iLLD_TC26B: Window functions

Files | Functions | Variables
Window functions
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Window functions:

Files

file Ifx_WndF32.h
Windowing function.

Functions

IFX_INLINE void Ifx_WndF32_apply (cfloat32 *x, CONST_CFG float32 *window, short nX)
Apply a window to complex array x which has nX length. More...

Variables

IFX_EXTERN CONST_CFG float32 | Ifx_g_WndF32_hannTable [IFX_WNDF32_TABLE_LENGTH/2]
IFX_EXTERN CONST_CFG float32 | Ifx_g_WndF32_blackmanHarrisTable [IFX_WNDF32_TABLE_LENGTH/2]

Detailed Description

Function Documentation

◆ Ifx_WndF32_apply()

IFX_INLINE void Ifx_WndF32_apply | ( | cfloat32 * | x,
 |  | CONST_CFG float32 * | window,
 |  | short | nX
 | ) |  |

Apply a window to complex array x which has nX length.

Example: Ifx_WndF32_apply(x, Ifx_g_WndF32_hannTable, 1024);

Definition at line 63 of file Ifx_WndF32.h.

Variable Documentation

◆ Ifx_g_WndF32_blackmanHarrisTable

IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[IFX_WNDF32_TABLE_LENGTH/2]

Definition at line 58 of file Ifx_WndF32.h.

◆ Ifx_g_WndF32_hannTable

IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_hannTable[IFX_WNDF32_TABLE_LENGTH/2]

Definition at line 57 of file Ifx_WndF32.h.


iLLD_TC26B: Ifx_WndF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Functions | Variables
Ifx_WndF32.h File Reference
Service software » System Engineering » Math » Math 32bit floating point » Window functions

Windowing function. More...

#include "Ifx_Cf32.h"
Include dependency graph for Ifx_WndF32.h:

Go to the source code of this file.

Macros

#define IFX_WNDF32_TABLE_LENGTH (1024)

Functions

IFX_INLINE void Ifx_WndF32_apply (cfloat32 *x, CONST_CFG float32 *window, short nX)
Apply a window to complex array x which has nX length. More...

Variables

IFX_EXTERN CONST_CFG float32 | Ifx_g_WndF32_hannTable [IFX_WNDF32_TABLE_LENGTH/2]
IFX_EXTERN CONST_CFG float32 | Ifx_g_WndF32_blackmanHarrisTable [IFX_WNDF32_TABLE_LENGTH/2]

Detailed Description

Windowing function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_WndF32.h.

Macro Definition Documentation

◆ IFX_WNDF32_TABLE_LENGTH

#define IFX_WNDF32_TABLE_LENGTH (1024)

Definition at line 52 of file Ifx_WndF32.h.

Referenced by Ifx_WndF32_apply().


iLLD_TC26B: Time

Modules
Time
Service software » System Engineering
Collaboration diagram for Time:

Modules

DateTime

Detailed Description


iLLD_TC26B: DateTime

Functions
DateTime
Service software » System Engineering » Time
Collaboration diagram for DateTime:

Functions

IFX_EXTERN void | DateTime_set (Ifx_DateTime *time)
Set the real time. More...
IFX_EXTERN void | DateTime_get (Ifx_DateTime *time)
Get the real time Note that this function is valid only if DateTime_set() has been called. More...

Detailed Description

This module implements the Date-Time functions.

Function Documentation

◆ DateTime_get()

IFX_EXTERN void DateTime_get ( Ifx_DateTime * time )

Get the real time Note that this function is valid only if DateTime_set() has been called.

Definition at line 50 of file Ifx_DateTime.c.

◆ DateTime_set()

IFX_EXTERN void DateTime_set ( Ifx_DateTime * time )

Set the real time.

Definition at line 63 of file Ifx_DateTime.c.


iLLD_TC26B: Data Structures

Data Structures
Here are the data structures with brief descriptions:
C _Fifo |
C cfloat32 |
C cfract |
C csfract |
C csint16 |
C csint32 |
C Icu_Config | Configuration structure of the Icu interface
C Icu_Functions |
C Icu_s | Structure of the Icu interface
C Ifc_Crc |
C Ifc_Crc_Table |
C Ifc_Crc_Table16 |
C Ifc_Crc_Table32 |
C Ifc_Crc_Table8 |
C Ifx_AngleTrkF32 | Angle Tracking Observer object
C Ifx_AngleTrkF32_CfgData |
C Ifx_AngleTrkF32_Config | Angle Tracking Observer configuration
C Ifx_AngleTrkF32_PosIf |
C Ifx_CircularBuffer | Circular buffer definition
C Ifx_ClpxFloat32_Integral | Integrator object for cfloat32 data type
C Ifx_Console |
C Ifx_DataBufferMode_TimeStampSingle |
C Ifx_DateTime |
C Ifx_Fifo_Shared |
C Ifx_GlobalResources | Global resource object
C Ifx_GlobalResources_Item |
C Ifx_IntegralF32 | Integrator object for float32 data type
C Ifx_InternalMux_Config |
C Ifx_InternalMux_MuxConfig |
C Ifx_IsrSetting |
C Ifx_LowPassPt1F32 | PT1 object definition
C Ifx_LowPassPt1F32_Config | PT1 configuration
C Ifx_LutIndexedLinearF32 |
C Ifx_LutIndexedLinearF32_Item |
C Ifx_LutLinearF32 |
C Ifx_LutLinearF32_Item |
C Ifx_RampF32 | Ifx_RampF32 object definition
C Ifx_Shell | Shell object definition
C Ifx_Shell_CmdLine | Command line editing state
C Ifx_Shell_Command | Shell command object
C Ifx_Shell_Config | Shell configuration
C Ifx_Shell_Flags | Shell control flags
C Ifx_Shell_Protocol | Shell protocol configuration
C Ifx_Shell_Runtime | Internal Shell run-time data
C Ifx_Shell_Syntax | Shell Syntax Description
C IfxAsclin_Asc | Module Handle
C IfxAsclin_Asc_BaudRate | Structure for baudrate
C IfxAsclin_Asc_BitTimingControl | Structure for bit timings
C IfxAsclin_Asc_Config | Configuration structure of the module
C IfxAsclin_Asc_ErrorFlags | Structure for Error Flags
C IfxAsclin_Asc_ErrorFlagsUnion | This union contains the error flags. In addition it allows to write and read to/from all flags as once via the ALL member
C IfxAsclin_Asc_FifoControl | Structure for FIFO control
C IfxAsclin_Asc_FrameControl | Structure for frame control
C IfxAsclin_Asc_InterruptConfig | Structure for interrupt configuration
C IfxAsclin_Asc_Pins | Structure for ASC pin configuration
C IfxAsclin_Cts_In | CTS pin mapping structure
C IfxAsclin_Lin |
C IfxAsclin_Lin_AcknowledgementFlags | Structure for Acknowledgement Flags
C IfxAsclin_Lin_BaudrateDetection | Structure for Baudrate Detection
C IfxAsclin_Lin_BaudrateGeneration | Structure for Baudrate Generation
C IfxAsclin_Lin_BitSamplingControl | Structure for Bit Sampling
C IfxAsclin_Lin_BitTimingControl | Structure for Bit Timing
C IfxAsclin_Lin_Config | Configuration structure of the module
C IfxAsclin_Lin_DataControl | Structure for Data Control
C IfxAsclin_Lin_EnabledInterrupts | Structure to store interrupts which are enabled during initialisation
C IfxAsclin_Lin_ErrorFlags | Structure for Error Flags
C IfxAsclin_Lin_FifoControl | Structure for FIFO Control
C IfxAsclin_Lin_FrameControl | Structure for Frame Control
C IfxAsclin_Lin_FrameControlFlags | Structure for Lin Frame Control flags
C IfxAsclin_Lin_FrameDataControl | Structure for Frame Data and Control flags
C IfxAsclin_Lin_InterruptConfig | Structure for LIN Interrupt Configuration
C IfxAsclin_Lin_LinControl | Structure for lin Control
C IfxAsclin_Lin_PduType | Structure to hold Lin Pdu data
C IfxAsclin_Lin_Pins | Structure for LIN pin configuration
C IfxAsclin_Rts_Out | RTS pin mapping structure
C IfxAsclin_Rx_In | RX pin mapping structure
C IfxAsclin_Sclk_Out | SCLK pin mapping structure
C IfxAsclin_Slso_Out | SLSO pin mapping structure
C IfxAsclin_Spi | Module handle
C IfxAsclin_Spi_Baudrate | Structure for Baudrate Generation
C IfxAsclin_Spi_BitSamplingControl | Structure for Bit Sampling
C IfxAsclin_Spi_Config | Configuration structure of the module
C IfxAsclin_Spi_ErrorFlags | Structure for Error Flags
C IfxAsclin_Spi_FifoControl | Structure for FIFO Control
C IfxAsclin_Spi_FrameControl | Structure for Frame Control
C IfxAsclin_Spi_InputOutputControl | Structure for input output control
C IfxAsclin_Spi_InterruptConfig | Structure for interrupt configuration
C IfxAsclin_Spi_Job | Structure for data transfer jobs
C IfxAsclin_Spi_Pins | Structure for SPI pin configuration
C IfxAsclin_Tx_Out | TX pin mapping structure
C IfxCcu6_Cc60_Out | CC60 pin mapping structure
C IfxCcu6_Cc60in_In | CC60IN pin mapping structure
C IfxCcu6_Cc61_Out | CC61 pin mapping structure
C IfxCcu6_Cc61in_In | CC61IN pin mapping structure
C IfxCcu6_Cc62_Out | CC62 pin mapping structure
C IfxCcu6_Cc62in_In | CC62IN pin mapping structure
C IfxCcu6_Ccpos0_In | CCPOS0 pin mapping structure
C IfxCcu6_Ccpos1_In | CCPOS1 pin mapping structure
C IfxCcu6_Ccpos2_In | CCPOS2 pin mapping structure
C IfxCcu6_Cout60_Out | COUT60 pin mapping structure
C IfxCcu6_Cout61_Out | COUT61 pin mapping structure
C IfxCcu6_Cout62_Out | COUT62 pin mapping structure
C IfxCcu6_Cout63_Out | COUT63 pin mapping structure
C IfxCcu6_Ctrap_In | CTRAP pin mapping structure
C IfxCcu6_Icu | Module handle
C IfxCcu6_Icu_Channel | Channel handle
C IfxCcu6_Icu_ChannelConfig | Configuration structure of the channel
C IfxCcu6_Icu_Clock | Structure for clock configuration
C IfxCcu6_Icu_Config | Configuration structure of the module
C IfxCcu6_Icu_InterruptConfig | Structure for interrupt configuration
C IfxCcu6_Icu_Pins | Structure for capture input pins
C IfxCcu6_Icu_TriggerConfig | Configuration structure for external triggers
C IfxCcu6_PwmBc | Module handle
C IfxCcu6_PwmBc_Config | Configuration structure of the module
C IfxCcu6_PwmBc_InterruptConfig | Structure for interrupt configuration
C IfxCcu6_PwmBc_MultiChannelControl | Structure for multichannel mode control
C IfxCcu6_PwmBc_Pins | Structure for CCU6 output pin configuration
C IfxCcu6_PwmBc_Timer12 | Structure for Timer 12
C IfxCcu6_PwmBc_Timer13 | Structure for Timer 13
C IfxCcu6_PwmBc_TriggerConfig | Configuration structure for external triggers
C IfxCcu6_PwmHl_Base | Multi-channels PWM object definition (channels only)
C IfxCcu6_PwmHl_Config | CCU6: PWM HL configuration
C IfxCcu6_PwmHl_Mode | Structure for PWM configuration
C IfxCcu6_PwmHl_s | CCU6 PWM driver
C IfxCcu6_T12hr_In | T12HR pin mapping structure
C IfxCcu6_T13hr_In | T13HR pin mapping structure
C IfxCcu6_Timer | Module handle
C IfxCcu6_Timer_Clock | Structure for clock configuration
C IfxCcu6_Timer_Config | Configuration structure of the module
C IfxCcu6_Timer_InterruptConfig | Structure for interrupt configuration
C IfxCcu6_Timer_Pins | Structure for CCU6 output pin configuration
C IfxCcu6_Timer_Timer12 | Structure for Timer 12
C IfxCcu6_Timer_Timer13 | Structure for Timer 13
C IfxCcu6_Timer_TriggerConfig | Configuration structure for external triggers
C IfxCcu6_TimerWithTrigger | CCU6 Timer interface
C IfxCcu6_TimerWithTrigger_Base | Structure for the timer base
C IfxCcu6_TimerWithTrigger_Config | Configuration structure for T12 and T13 Timer
C IfxCcu6_TPwm | Module handle
C IfxCcu6_TPwm_Clock | Structure for clock configuration
C IfxCcu6_TPwm_Config | Configuration structure of the module
C IfxCcu6_TPwm_InterruptConfig | Structure for interrupt configuration
C IfxCcu6_TPwm_Pins | Structure for CCU6 output pin configuration
C IfxCcu6_TPwm_Timer12 | Structure for Timer 12
C IfxCcu6_TPwm_Timer13 | Structure for Timer 13
C IfxCcu6_TPwm_TriggerConfig | Configuration structure for external triggers
C IfxCif_Cam | Structure which is used as handle for the CIF-CAM functions. This stores cached variables useful for run-time operations
C IfxCif_Cam_Common | Common configuration
C IfxCif_Cam_Config | Camera specific configuration
C IfxCif_Cam_Downscaling | Downscaler configuration
C IfxCif_Cam_JfifHeader | JPEG JFIF header structure
C IfxCif_Cam_JpegTable | Single component JPEG tables
C IfxCif_Cam_JpegTables | JPEG tables for all components
C IfxCif_Cam_MemAreas | All paths memory partitioning
C IfxCif_Cam_MemConfig | Single path memory interface configuration (used in initialisation/configuration)
C IfxCif_Cam_MemInfo | Single path memory interface information (used in Runtime)
C IfxCif_Cam_PictureInfo | Picture info
C IfxCif_Cam_TableInfo |
C IfxCif_Clk_In | CLK pin mapping structure
C IfxCif_D_In | D pin mapping structure
C IfxCif_Hsnc_In | HSNC pin mapping structure
C IfxCif_Vsnc_In | VSNC pin mapping structure
C IfxCpu_Counter | Counter
C IfxCpu_Perf | Performance counter result
C IfxCpu_Trap | Structure to contain the trap information
C IfxCpu_Trap_Id | Union to abstract Identification numbers under Traps
C IfxDma_Dma | DMA base address data structure (Module handle)
C IfxDma_Dma_Channel | Channel handle
C IfxDma_Dma_ChannelConfig | Configuration data structure of the channel
C IfxDma_Dma_Config | Configuration data structure of the Module
C IfxDsadc_Cgpwm_Out | CGPWM pin mapping structure
C IfxDsadc_Cin_In | CIN pin mapping structure
C IfxDsadc_Cout_Out | COUT pin mapping structure
C IfxDsadc_Din_In | DIN pin mapping structure
C IfxDsadc_Dsadc | DSADC handle data structure
C IfxDsadc_Dsadc_AuxFilterConfig | Auxiliary comb filter configuration structure
C IfxDsadc_Dsadc_CarrierGenConfig | Carrier generation configuration structure
C IfxDsadc_Dsadc_Channel | Channel handle structure
C IfxDsadc_Dsadc_ChannelConfig | Single channel configuration structure
C IfxDsadc_Dsadc_ChannelPins | Channel Pins Configuration structure
C IfxDsadc_Dsadc_CombFilterConfig | Comb filter configuration structure
C IfxDsadc_Dsadc_Config | Clock configuration data structure
C IfxDsadc_Dsadc_DemodulatorConfig | Demodulator configuration structure
C IfxDsadc_Dsadc_FirFilterConfig | FIR filters configuration structure
C IfxDsadc_Dsadc_IntegratorConfig | Integrator configuration structure
C IfxDsadc_Dsadc_ModulatorConfig | Modulator configuration structure
C IfxDsadc_Dsadc_RectifierConfig | Rectifier configuration structure
C IfxDsadc_Dsn_In | DS negative pin mapping structure
C IfxDsadc_Dsp_In | DS positive pin mapping structure
C IfxDsadc_Itr_In | ITR pin mapping structure
C IfxDsadc_Rdc | DSADC RDC data structure
C IfxDsadc_Rdc_Config | DSADC RDC configuration structure Note: if ALL kp, ki, kd are zero, then the init function will use default value
C IfxDsadc_Rdc_ConfigHw | RDC hardware configuration
C IfxDsadc_Rdc_GtmTimestamp | DSADC timestamp helper using GTM
C IfxDsadc_Rdc_Hw | DSADC RDC hardware object structure
C IfxDsadc_Rdc_Ts |
C IfxDsadc_Sg_In | SG pin mapping structure
C IfxDts_Dts_Config | DTS module configuration structure
C IfxEray_Eray | ERAY Module handle
C IfxEray_Eray_BufferReconfig | Reconfigurable buffer structure
C IfxEray_Eray_Config | Module configuration structure
C IfxEray_Eray_ControllerConfig | Communication Controller configuration structure
C IfxEray_Eray_Gtu01Config | GTU01 configuration
C IfxEray_Eray_Gtu02Config | GTU02 configuration
C IfxEray_Eray_Gtu03Config | GTU03 configuration
C IfxEray_Eray_Gtu04Config | GTU04 configuration
C IfxEray_Eray_Gtu05Config | GTU05 configuration
C IfxEray_Eray_Gtu06Config | GTU06 configuration
C IfxEray_Eray_Gtu07Config | GTU07 configuration
C IfxEray_Eray_Gtu08Config | GTU08 configuration
C IfxEray_Eray_Gtu09Config | GTU09 configuration
C IfxEray_Eray_Gtu10Config | GTU10 configuration
C IfxEray_Eray_Gtu11Config | GTU11 configuration
C IfxEray_Eray_GTUConfig | Gloabl Timing Unit configuration structure
C IfxEray_Eray_Interrupt | Interrupt control properties
C IfxEray_Eray_MessageRAMConfig | Message RAM configuration structure
C IfxEray_Eray_NodeA | Pins configuration structure for Node A
C IfxEray_Eray_NodeB | Pins configuration structure for Node B
C IfxEray_Eray_NodeConfig | Node configuration structure
C IfxEray_Eray_Pins | Pins configuration structure
C IfxEray_Eray_Prtc1Control | Protocol operation control properties
C IfxEray_Eray_Prtc2Control | Wakeup symbol control properties
C IfxEray_Eray_ReceiveControl | Receive control properties structure
C IfxEray_Eray_ReceivedFrame | Received Frame
C IfxEray_Eray_Succ1Config | Communication controller control properties
C IfxEray_Eray_Succ2Config | Communication listen timeout properties
C IfxEray_Eray_Succ3Config | Clock correction fail properties
C IfxEray_Eray_TransmitControl | Transfer control in a slot
C IfxEray_Header | Header section in a frame
C IfxEray_ReceivedHeader | Received header in a frame
C IfxEray_Rxd_In | RXD pin mapping structure
C IfxEray_SlotConfig | Transmit control structure
C IfxEray_Txd_Out | TXD pin mapping structure
C IfxEray_Txen_Out | TXEN pin mapping structure
C IfxEth | ETH driver structure
C IfxEth_AltRxDescr0_Bits | Structure for Alternate/Enhanced RX descriptor DWORD 0 Bit field access
C IfxEth_AltRxDescr1_Bits | Structure for Alternate/Enhanced RX descriptor DWORD 1 Bit field access
C IfxEth_AltTxDescr0_Bits | Structure for Alternate/Enhanced TX descriptor DWORD 0 Bit field access
C IfxEth_AltTxDescr1_Bits | Structure for Alternate/Enhanced TX descriptor DWORD 1 Bit field access
C IfxEth_Col_In | COL pin mapping structure
C IfxEth_Config | ETH configuration structure
C IfxEth_Crs_In | CRS pin mapping structure
C IfxEth_Crsdv_In | CRSDV pin mapping structure
C IfxEth_Mdc_Out | MDC pin mapping structure
C IfxEth_Mdio_InOut | MDIO pin mapping structure
C IfxEth_MiiPins | Port pins for MII mode configuration
C IfxEth_Refclk_In | REFCLK pin mapping structure
C IfxEth_RingModeBuffersConfig | Configuration structure for Ring Mode descriptors
C IfxEth_RingModeRxBuffersConfig | Configuration structure for Ring Mode Receive Buffers
C IfxEth_RingModeTxBuffersConfig | Configuration structure for Ring Mode Transmit buffers
C IfxEth_RmiiPins | Port pins for RMII mode configuration
C IfxEth_Rxclk_In | RXCLK pin mapping structure
C IfxEth_Rxd_In | RXD pin mapping structure
C IfxEth_RxDescr | Normal RX descriptor
C IfxEth_RxDescr0 | Union for RX descriptor DWORD 0
C IfxEth_RxDescr0_Bits | Structure for RX descriptor DWORD 0 Bit field access
C IfxEth_RxDescr1 | Union for RX descriptor DWORD 1
C IfxEth_RxDescr1_Bits | Structure for RX descriptor DWORD 1 Bit field access
C IfxEth_RxDescr2 | Union for RX descriptor DWORD 2
C IfxEth_RxDescr3 | Union for RX descriptor DWORD 3
C IfxEth_RxDescrList |
C IfxEth_Rxdv_In | RXDV pin mapping structure
C IfxEth_Rxer_In | RXER pin mapping structure
C IfxEth_Txclk_In | TXCLK pin mapping structure
C IfxEth_Txd_Out | TXD pin mapping structure
C IfxEth_TxDescr | Normal TX descriptor
C IfxEth_TxDescr0 | Union for TX descriptor DWORD 0
C IfxEth_TxDescr0_Bits | Structure for TX descriptor DWORD 0 Bit field access
C IfxEth_TxDescr1 | Union for TX descriptor DWORD 1
C IfxEth_TxDescr1_Bits | Structure for TX descriptor DWORD 1 Bit field access
C IfxEth_TxDescr2 | Union for TX descriptor DWORD 2
C IfxEth_TxDescr3 | Union for TX descriptor DWORD 3
C IfxEth_TxDescrList |
C IfxEth_Txen_Out | TXEN pin mapping structure
C IfxEth_Txer_Out | TXER pin mapping structure
C IfxFce_Crc | FCE Module Handle;
C IfxFce_Crc_Config | Configuration structure of the module
C IfxFce_Crc_Crc | Specifies the pointer to FCE module handler
C IfxFce_Crc_CrcConfig | Specifies the module configuration structure
C IfxFce_Crc_EnabledInterrupts | Specifies the interrupt enable structure
C IfxFft_Fft | Module handle
C IfxFft_Fft_Config | Configuration structure of the module
C IfxFft_Fft_Count64 | Structure for counters
C IfxFft_Fft_Job_s | FFT job handle
C IfxFft_Fft_JobConfig | Configuration structure for the FFT job
C IfxFlash_ErrorTracking_Address | Error tracking address structure
C IfxFlash_flashSector | Start and end address of sectors
C IfxGpt12_Capin_In | CAPIN pin mapping structure
C IfxGpt12_IncrEnc | Incremental encoder object
C IfxGpt12_IncrEnc_Config | Configuration structure for GPT12
C IfxGpt12_TxEud_In | TxEUD pin mapping structure
C IfxGpt12_TxIn_In | TxIN pin mapping structure
C IfxGpt12_TxOut_Out | TxOUT pin mapping structure
C IfxGtm_Atom_Pwm_Config | Configuration structure
C IfxGtm_Atom_Pwm_Driver | Driver Handle
C IfxGtm_Atom_Pwm_Interrupt | Configuration structure for interrupts
C IfxGtm_Atom_Pwm_pin | Configuration structure for output pin
C IfxGtm_Atom_PwmHl_Base | Multi-channels PWM object definition (channels only)
C IfxGtm_Atom_PwmHl_Config | GTM ATOM: PWM HL configuration
C IfxGtm_Atom_PwmHl_Mode | Structure for PWM configuration
C IfxGtm_Atom_PwmHl_s | GTM ATOM PWM driver
C IfxGtm_Atom_Timer | TOM Timer interface
C IfxGtm_Atom_Timer_Base | Structure for the timer base
C IfxGtm_Atom_Timer_Config | Configuration structure for TOM Timer
C IfxGtm_Atom_ToutMap | ATOM TOUT pin mapping structure
C IfxGtm_Clk_Out | GTM Clock Output
C IfxGtm_Tim_In | Driver Handle
C IfxGtm_Tim_In_Config | Configuration structure for TIM input capture
C IfxGtm_Tim_In_ConfigCapture | Configuration structure for TIM capture
C IfxGtm_Tim_In_ConfigFilter | Configuration structure for TIM filter
C IfxGtm_Tim_In_ConfigTimeout | Configuration structure for TIM timeout
C IfxGtm_Tim_TinMap | TIN pin mapping structure
C IfxGtm_Tom_Pwm_Config | Configuration structure
C IfxGtm_Tom_Pwm_Driver | Driver Handle
C IfxGtm_Tom_Pwm_Interrupt | Configuration structure for interrupts
C IfxGtm_Tom_Pwm_pin | Configuration structure for output pin
C IfxGtm_Tom_PwmHl_Base | Multi-channels PWM object definition (channels only)
C IfxGtm_Tom_PwmHl_Config | GTM TOM: PWM HL configuration
C IfxGtm_Tom_PwmHl_Mode | Structure for PWM configuration
C IfxGtm_Tom_PwmHl_s | GTM TOM PWM driver
C IfxGtm_Tom_TGC | TOM TGC objects
C IfxGtm_Tom_Timer | TOM Timer interface Handle
C IfxGtm_Tom_Timer_Base | Structure for the timer base
C IfxGtm_Tom_Timer_Config | Configuration structure for TOM Timer
C IfxGtm_Tom_ToutMap | TOM TOUT pin mapping structure
C IfxGtm_Trig_AdcTrig_Table |
C IfxGtm_Trig_Channel |
C IfxGtm_Trig_Source |
C IfxGtm_Trig_Trigger |
C IfxHssl_Hsct | HSCT module handle
C IfxHssl_Hsct_Config | Configuration structure of the HSCT module
C IfxHssl_Hssl | HSSL Handle
C IfxHssl_Hssl_AccessWindow | Structure for access windows
C IfxHssl_Hssl_Channel | Channel handle
C IfxHssl_Hssl_ChannelConfig | Configuration structure for channel
C IfxHssl_Hssl_Config | Configuration structure of the HSSL module
C IfxHssl_Hssl_errorFlags | Structure for error flags
C IfxI2c_I2c | Handler
C IfxI2c_I2c_Config | Structure to configure the Module
C IfxI2c_I2c_Device | Structure with slave device data
C IfxI2c_I2c_deviceConfig | Structure to configure the device's data structure
C IfxI2c_Pins | Pin Structure
C IfxI2c_Scl_InOut | SCL input mapping structure
C IfxI2c_Sda_InOut | SDA input mapping structure
C IfxIom_Driver | IOM driver
C IfxIom_Driver_Config | IOM Driver Configuration
C IfxIom_Driver_Lam | IOM LAM object
C IfxIom_Driver_LamConfig | IOM LAM configuration
C IfxIom_Driver_LamEventConfig | IOM LAM event configuration
C IfxIom_Driver_LamEventWindowConfig | IOM LAM event window configuration
C IfxIom_Driver_LamFilterConfig | IOM LAM filter configuration
C IfxIom_Driver_LamMonConfig | IOM LAM monitor input configuration
C IfxIom_Driver_LamRefConfig | IOM LAM reference input configuration
C IfxModule_IndexMap | Module address and index map
C IfxMsc_En_Out | EN pin mapping structure
C IfxMsc_Fcln_Out | FCLN pin mapping structure
C IfxMsc_Fclp_Out | FCLP pin mapping structure
C IfxMsc_Inj_In | INJ pin mapping structure
C IfxMsc_Msc | MSC base address data Structure
C IfxMsc_Msc_Abra | ABRA block Configuration Structure
C IfxMsc_Msc_Clock | Clock configuration data Structure
C IfxMsc_Msc_Config | MSC Module Configuration Structure
C IfxMsc_Msc_DownstreamControlConfig | Downstream Control Configuration Structure
C IfxMsc_Msc_DownstreamControlExtensionConfig | Downstream Control Extension Configuration Structure
C IfxMsc_Msc_en |
C IfxMsc_Msc_fcln |
C IfxMsc_Msc_fclp |
C IfxMsc_Msc_inj0 |
C IfxMsc_Msc_inj1 |
C IfxMsc_Msc_InterruptConfig | Interrupt Configuration Structure
C IfxMsc_Msc_Io | MSC Pin Configuration Structure
C IfxMsc_Msc_OutputControlConfig | Output Control Configuration Structure
C IfxMsc_Msc_sdi |
C IfxMsc_Msc_son |
C IfxMsc_Msc_sop |
C IfxMsc_Msc_UpstreamStatusConfig | Upstream Control Configuration Structure
C IfxMsc_Sdi_In | SDI pin mapping structure
C IfxMsc_Son_Out | SON pin mapping structure
C IfxMsc_Sop_Out | SOP pin mapping structure
C IfxMtu_SramItem | Describes physical parameters of a SRAM memory
C IfxMultican_Can | CAN handle data structure
C IfxMultican_Can_Config | CAN module configuration
C IfxMultican_Can_FdConfig | Structure for CAN FD configuration
C IfxMultican_Can_GatewayConfig | Structure for gateway configuration
C IfxMultican_Can_InterruptConfig | Structure for interrupt configuration
C IfxMultican_Can_InterruptSource | Structure for interrupt source
C IfxMultican_Can_MsgObj | CAN message object handle data structure
C IfxMultican_Can_MsgObjConfig | CAN message object configuration
C IfxMultican_Can_MsgObjControl | Message object control
C IfxMultican_Can_Node | CAN node handle data structure
C IfxMultican_Can_NodeConfig | CAN Node configuration
C IfxMultican_Message | CAN message definition
C IfxMultican_MsgObjStat | Message object status bit-fields
C IfxMultican_Rxd_In | RXD pin mapping structure
C IfxMultican_Txd_Out | TXD pin mapping structure
C IfxPort_Esr_Masks | Used by IfxPort_Esr_Masks table
C IfxPort_Io_Config |
C IfxPort_Io_ConfigPin |
C IfxPort_Pin | Defines a pin
C IfxPort_Pin_Config | To configure pins
C IfxPsi5_Psi5 | PSI5 handle data structure
C IfxPsi5_Psi5_Channel | Channel handle data structure
C IfxPsi5_Psi5_ChannelConfig | Channel configuration structure
C IfxPsi5_Psi5_ChannelTrigger | Channel trigger configuration structure
C IfxPsi5_Psi5_Clock | Clock configuration data structure
C IfxPsi5_Psi5_Config | PSI5 module configuration structure
C IfxPsi5_Psi5_Frame | Psi5 frame data union
C IfxPsi5_Psi5_FrameData | Psi5 frame data structure with individual members
C IfxPsi5_Psi5_InputOutputControl | Input output configuration structure
C IfxPsi5_Psi5_Message | Psi5 serial message with individual members
C IfxPsi5_Psi5_PinsConfig | Pin Configuration structure
C IfxPsi5_Psi5_PulseGeneration | Sync pulse generation configuration structure
C IfxPsi5_Psi5_Rdm | Psi5 frame in double word format
C IfxPsi5_Psi5_Rds | Psi5 serial message as unsigned 32 bit value
C IfxPsi5_Psi5_ReceiveControl | Receive control configuration structure
C IfxPsi5_Psi5_SerialMessage | Psi5 serial message data structure
C IfxPsi5_Psi5_StartupOptions | Startup related options TBD
C IfxPsi5_Psi5_TimeStampConfig | Timestamp configuration data structure
C IfxPsi5_Psi5_TransmitControl | Transmit control configuration structure
C IfxPsi5_Rx_In | RX pin mapping structure
C IfxPsi5_Tx_Out | TX pin mapping structure
C IfxPsi5s_Clk_Out | CLK pin mapping structure
C IfxPsi5s_Psi5s | PSI5S handle data structure
C IfxPsi5s_Psi5s_AscConfig | PSI5S module configuration structure
C IfxPsi5s_Psi5s_Channel | Channel handle data structure
C IfxPsi5s_Psi5s_ChannelConfig | Channel configuration structure
C IfxPsi5s_Psi5s_ChannelTrigger | Channel trigger configuration structure
C IfxPsi5s_Psi5s_Clock | Clock configuration data structure
C IfxPsi5s_Psi5s_Config | PSI5S module configuration structure
C IfxPsi5s_Psi5s_Frame | Psi5s frame data structure
C IfxPsi5s_Psi5s_GlobalControlConfig | PSI5S global control configuration structure
C IfxPsi5s_Psi5s_Pins | Structure for PSI5S pin configuration
C IfxPsi5s_Psi5s_PulseGeneration | Sync pulse generation configuration structure
C IfxPsi5s_Psi5s_ReceiveControl | Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers
C IfxPsi5s_Psi5s_ReceiveData | "Received data" data structure
C IfxPsi5s_Psi5s_ReceivedBits | Received individual bits
C IfxPsi5s_Psi5s_ReceivedData | Receive data structure with different segments of data
C IfxPsi5s_Psi5s_ReceiveStatus | Receiver status data structure
C IfxPsi5s_Psi5s_ReceiveTimestamp | Receiver timestamp data structure
C IfxPsi5s_Psi5s_Timestamp | Received timestamp contents structure
C IfxPsi5s_Psi5s_TimeStampConfig | Timestamp configuration data structure
C IfxPsi5s_Psi5s_TransmitControl | Transmit control configuration structure
C IfxPsi5s_Rx_In | RX pin mapping structure
C IfxPsi5s_Tx_Out | TX pin mapping structure
C IfxQspi_DelayConst | Structure holding the "pre" and "delay" values. To be populated into BACON register after delay calculation
C IfxQspi_Hsicin_In | HSICIN pin mapping structure
C IfxQspi_Mrst_In | MRST pin mapping structure
C IfxQspi_Mrst_Out | MRST pin mapping structure
C IfxQspi_Mtsr_In | MTSR pin mapping structure
C IfxQspi_Mtsr_Out | MTSR pin mapping structure
C IfxQspi_Sclk_In | SCLK pin mapping structure
C IfxQspi_Sclk_Out | SCLK pin mapping structure
C IfxQspi_Slsi_In | SLSI pin mapping structure
C IfxQspi_Slso_Out | SLSO pin mapping structure
C IfxQspi_SpiMaster | Module handle data structure
C IfxQspi_SpiMaster_Channel_s | Module Channel handle structure
C IfxQspi_SpiMaster_ChannelConfig | Module Channel configuration structure
C IfxQspi_SpiMaster_Config | Module configuration structure
C IfxQspi_SpiMaster_Dma | Dma handle
C IfxQspi_SpiMaster_DmaConfig | Dma configuration
C IfxQspi_SpiMaster_ErrorFlags | Qspi Master Mode Error Flags
C IfxQspi_SpiMaster_Input | SLSI pin configuration structure
C IfxQspi_SpiMaster_InputOutput | Union of Slave Select pins
C IfxQspi_SpiMaster_Output | SLSO pin configuration structure
C IfxQspi_SpiMaster_Pins | Master pin IO configuration structure
C IfxQspi_SpiSlave | Module handle data structure
C IfxQspi_SpiSlave_Config | Module configuration structure
C IfxQspi_SpiSlave_Dma | Dma handle
C IfxQspi_SpiSlave_DmaConfig | Dma configuration
C IfxQspi_SpiSlave_ErrorFlags | Qspi Slave Mode Error Flags
C IfxQspi_SpiSlave_Pins | Slave pin IO configuration structure
C IfxQspi_SpiSlave_Protocol | Configures the SPI Protocol
C IfxScu_Dcdcsync_Out | DCDC Sync pin mapping structure
C IfxScu_Emgstop_In | Emergency Stop pin mapping structure
C IfxScu_Evrwup_In | EVR Wakeup pin mapping structure
C IfxScu_Extclk_Out | External Clock pin mapping structure
C IfxScu_Hwcfg_In | Hardware Configuration pin mapping structure
C IfxScu_Req_In | External Request pin mapping structure
C IfxScu_Wdtlck_Out | Watchdog Timer Lock pin mapping structure
C IfxScuCcu_CcuconRegConfig | Configuration structure type for CCUCON registers
C IfxScuCcu_ClockDistributionConfig | Configuration structure type for all the CCUCON registers to configure clock distribution
C IfxScuCcu_Config | Configuration structure SCU module
C IfxScuCcu_ErayPllConfig | Configuration structure for E-ray PLL
C IfxScuCcu_FlashWaitstateConfig | Configuration structure type for the Flash waitstate configuration
C IfxScuCcu_InitialStepConfig | Configuration structure type for the Pll initial step. This structure must be used to configure the P, N and K2 dividers for initial step
C IfxScuCcu_PllStepsConfig | Configuration structure type for the Pll Steps for current jump control
C IfxScuCcu_SysPllConfig | Configuration structure type for the System Pll step. This structure must be used to configure the P, N and K1 dividers
C IfxScuWdt_Config | Configuration structure for Scu Watchdog. IfxScuWdt_Config is a type describing configuration structure of CPU and Safety WDT registers defined in IfxScuWdt.h file
C IfxSent_Sent | Specifies SENT handle structure
C IfxSent_Sent_Channel | Specifies the SENT Channel handle structure
C IfxSent_Sent_ChannelConfig | Specifies the SENT Channel configuration structure
C IfxSent_Sent_Config | Specifies the SENT module configuration structure
C IfxSent_Sent_Enable | Specifies the Interrupt type enables structure
C IfxSent_Sent_EnabledInterrupts | Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once via the ALL member
C IfxSent_Sent_Frame | Specifies the frame configuration structure for a channel
C IfxSent_Sent_In | SENT pin mapping structure
C IfxSent_Sent_InputOutputControl | Specifies the input output control properties
C IfxSent_Sent_Interrupt | Specifies the interrupt control properties
C IfxSent_Sent_InterruptNodeControl | Specifies the interrupt control properties structure
C IfxSent_Sent_NibbleControl | Specifies the received nibbles control properties
C IfxSent_Sent_Pins | Specifies the pins configuration for SENT channel
C IfxSent_Sent_ReceiveControl | Specifies the receive control properties
C IfxSent_Sent_SerialMessageFrame | Specifies received message frame
C IfxSent_Sent_TransmitControl | Specifies the SPC channel properties structure
C IfxSent_Spc_Out | SPC pin mapping structure
C IfxSmu_configFsp | FSP Configuration Structure
C IfxSmu_Fsp_Out | Fault Signal Protocol Pin
C IfxStdIf_DPipe_ | Standard interface object
C IfxStdIf_Pos_ | Standard interface object
C IfxStdIf_Pos_Config | Position interface configuration
C IfxStdIf_Pos_Status | Position sensor status definition
C IfxStdIf_Pos_Status.B |
C IfxStdIf_PwmHl_ | Standard interface object
C IfxStdIf_PwmHl_Config | Multi-channels PWM object configuration
C IfxStdIf_Timer_ | Standard interface object
C IfxStdIf_Timer_Config | Timer configuration
C IfxStdIf_Timer_TrigConfig | Trigger configuration
C IfxStm_CompareConfig | Comparator Configuration Structure
C IfxStm_Timer | Timer interface
C IfxStm_Timer_Base | Structure for the timer base
C IfxStm_Timer_Config | Configuration structure for Timer
C IfxVadc_Adc | VADC handle data structure
C IfxVadc_Adc_ArbiterConfig | Arbiter configuration structure
C IfxVadc_Adc_BackgroundScanConfig | Background scan mode configuration structure
C IfxVadc_Adc_Channel | Channel handle data structure
C IfxVadc_Adc_ChannelConfig | Channel configuration structure
C IfxVadc_Adc_ClassConfig | Input class configuration structure
C IfxVadc_Adc_Config | VADC module configuration structure
C IfxVadc_Adc_EmuxControl | Emux Control Structure
C IfxVadc_Adc_EmuxPinConfig |
C IfxVadc_Adc_GatingTriggerConfig | Gating/Trigger configuration structure
C IfxVadc_Adc_Group | Group handle data structure
C IfxVadc_Adc_GroupConfig | Group configuration structure
C IfxVadc_Adc_QueueConfig | Queue configuration structure
C IfxVadc_Adc_ScanConfig | Scan mode configuration structure
C IfxVadc_Emux_Out | VADC External Mux pin mapping structure
C IfxVadc_GxBfl_Out | VADC Boundary Flag pin mapping structure
C IfxVadc_Vadcg_In | VADC Analog Input
C PwmHl_Config | Configuration structure of the TPwm interface
C PwmHl_Functions |
C PwmHl_s | Structure of the TPwm interface
C Spi_ErrorChecks |
C SpiIf_ |
C SpiIf_Ch_ |
C SpiIf_ChConfig_ |
C SpiIf_ChMode |
C SpiIf_Config |
C SpiIf_Flags |
C SpiIf_funcs |
C SpiIf_Job |
C Timer_Config | Configuration structure of the Timer interface
C Timer_Functions |
C Timer_s | Structure of the Timer interface
C TPwm_Config | Configuration structure of the TPwm interface
C TPwm_Functions |
C TPwm_s | Structure of the TPwm interface


iLLD_TC26B: Ifx_Types.h File Reference

  • Cpu
  • Std
Data Structures | Macros | Typedefs | Enumerations
Ifx_Types.h File Reference

This files defines all types used by the IFX HAL and libraries. More...

#include "Tricore/Compilers/Compilers.h"
#include "Platform_Types.h"
Include dependency graph for Ifx_Types.h:

Go to the source code of this file.

Data Structures

struct | cfloat32
struct | csint32
struct | csint16
struct | Ifx_CircularBuffer
Circular buffer definition. More...
struct | Ifx_IsrSetting
struct | IfxModule_IndexMap
Module address and index map. More...
struct | Ifx_DataBufferMode_TimeStampSingle
struct | cfract
struct | csfract

Macros

#define | TIME_INFINITE ((Ifx_TickTime)0x7FFFFFFFFFFFFFFFLL)
#define | TIME_NULL ((Ifx_TickTime)0x0000000000000000LL)
#define | IFX_ONES (0xFFFFFFFFFFFFFFFFU)
#define | IFX_ZEROS (0x0000000000000000U)
#define | IFX_SIZET_MAX (0x7FFF)
#define | IFX_PI (3.1415926535897932384626433832795f)
#define | IFX_TWO_OVER_PI (2.0 / IFX_PI)
#define | IFX_ONE_OVER_SQRT_THREE (0.57735026918962576450914878050196f)
#define | IFX_SQRT_TWO (1.4142135623730950488016887242097f)
#define | IFX_SQRT_THREE (1.7320508075688772935274463415059f)
#define | IFX_UNUSED_PARAMETER(x) if(x){}
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(but function signature maintained for legacy purposes). Another use case being usage of intrinsics wherein the compiler ignores it and copy pastes the statements using intrinsics directly to the object file and hence usage of arguments isn't visible to it.(eg: __mfcr() etc) More...

Typedefs

typedef const char * | pchar
const char pointer More...
typedef void * | pvoid
void pointer More...
typedef volatile void * | vvoid
volatile void pointer More...
typedef void(* | voidfuncvoid) (void)
void pointer which takes void argument More...
typedef sint64 | Ifx_TickTime
Time in ticks. More...
typedef sint16 | Ifx_SizeT
Type used for data stream size. More...
typedef uint16 | Ifx_Priority
Used in interrupt service priorities. More...
typedef uint32 | Ifx_TimerValue
Used in timer values. More...
typedef sint32 | Ifx_SignedTimerVal
Used in signed timer values. More...
typedef pvoid | Ifx_AddressValue
Used in address values. More...

Enumerations

enum Ifx_ActiveState {
Ifx_ActiveState_low = 0,
Ifx_ActiveState_high = 1
}
Signal active state definition. More...
enum Ifx_ParityMode {
Ifx_ParityMode_even = 0,
Ifx_ParityMode_odd = 1
}
enum Ifx_RxSel {
Ifx_RxSel_a,
Ifx_RxSel_b,
Ifx_RxSel_c,
Ifx_RxSel_d,
Ifx_RxSel_e,
Ifx_RxSel_f,
Ifx_RxSel_g,
Ifx_RxSel_h
}
input multiplexer definition used in PinMaps More...
enum Ifx_DataBufferMode {
Ifx_DataBufferMode_normal = 0,
Ifx_DataBufferMode_timeStampSingle
}
enum Ifx_Pwm_Mode {
Ifx_Pwm_Mode_centerAligned = 0,
Ifx_Pwm_Mode_centerAlignedInverted = 1,
Ifx_Pwm_Mode_leftAligned = 2,
Ifx_Pwm_Mode_rightAligned = 3,
Ifx_Pwm_Mode_off = 4,
Ifx_Pwm_Mode_init = 5,
Ifx_Pwm_Mode_count
}

Detailed Description

This files defines all types used by the IFX HAL and libraries.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Types.h.

Data Structure Documentation

◆ cfloat32

struct cfloat32

Definition at line 58 of file Ifx_Types.h.

Data Fields
float32 | imag | Imaginary part.
float32 | real | Real part.

◆ csint32

struct csint32

Definition at line 64 of file Ifx_Types.h.

Data Fields
sint32 | imag | Imaginary part.
sint32 | real | Real part.

◆ csint16

struct csint16

Definition at line 70 of file Ifx_Types.h.

Data Fields
sint16 | imag | Imaginary part.
sint16 | real | Real part.

◆ Ifx_CircularBuffer

struct Ifx_CircularBuffer

Circular buffer definition.

Definition at line 93 of file Ifx_Types.h.

Data Fields
void * | base | buffer base address
uint16 | index | buffer current index
uint16 | length | buffer length

◆ Ifx_IsrSetting

struct Ifx_IsrSetting

Definition at line 106 of file Ifx_Types.h.

Data Fields
uint16 | priority
uint16 | provider

◆ IfxModule_IndexMap

struct IfxModule_IndexMap

Module address and index map.

Definition at line 140 of file Ifx_Types.h.

Data Fields
sint32 | index | Module index.
volatile void * | module | Module address.

◆ Ifx_DataBufferMode_TimeStampSingle

struct Ifx_DataBufferMode_TimeStampSingle

Definition at line 146 of file Ifx_Types.h.

Data Fields
uint8 | data
Ifx_TickTime | timestamp

◆ cfract

struct cfract

Definition at line 205 of file Ifx_Types.h.

Data Fields
fract | imag | Imaginary part.
fract | real | Real part.

◆ csfract

struct csfract

Definition at line 211 of file Ifx_Types.h.

Data Fields
sfract | imag | Imaginary part.
sfract | real | Real part.

Macro Definition Documentation

◆ IFX_ONE_OVER_SQRT_THREE

#define IFX_ONE_OVER_SQRT_THREE (0.57735026918962576450914878050196f)

Definition at line 219 of file Ifx_Types.h.

◆ IFX_ONES

#define IFX_ONES (0xFFFFFFFFFFFFFFFFU)

Definition at line 80 of file Ifx_Types.h.

◆ IFX_PI

#define IFX_PI (3.1415926535897932384626433832795f)

Definition at line 217 of file Ifx_Types.h.

Referenced by Ifx_AngleTrkF32_bound(), Ifx_AngleTrkF32_getAbsolutePosition(), Ifx_AngleTrkF32_init(), Ifx_AngleTrkF32_initConfig(), Ifx_AngleTrkF32_update(), Ifx_FftF32_generateTwiddleFactor(), Ifx_LutAtan2F32_float32(), Ifx_LutSincosF32_init(), IfxDsadc_Rdc_initConfig(), IfxDsadc_Rdc_update(), IfxGpt12_IncrEnc_getAbsolutePosition(), IfxGpt12_IncrEnc_init(), IfxGpt12_IncrEnc_initConfig(), IfxGpt12_IncrEnc_setRefreshPeriod(), IfxStdIf_Pos_initConfig(), IfxStdIf_Pos_radsToRpm(), and IfxStdIf_Pos_rpmToRads().

◆ IFX_SIZET_MAX

#define IFX_SIZET_MAX (0x7FFF)

Definition at line 88 of file Ifx_Types.h.

Referenced by Ifx_Fifo_init().

◆ IFX_SQRT_THREE

#define IFX_SQRT_THREE (1.7320508075688772935274463415059f)

Definition at line 221 of file Ifx_Types.h.

◆ IFX_SQRT_TWO

#define IFX_SQRT_TWO (1.4142135623730950488016887242097f)

Definition at line 220 of file Ifx_Types.h.

◆ IFX_TWO_OVER_PI

#define IFX_TWO_OVER_PI (2.0 / IFX_PI)

Definition at line 218 of file Ifx_Types.h.

◆ IFX_UNUSED_PARAMETER

#define IFX_UNUSED_PARAMETER ( x ) if(x){}

Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(but function signature maintained for legacy purposes). Another use case being usage of intrinsics wherein the compiler ignores it and copy pastes the statements using intrinsics directly to the object file and hence usage of arguments isn't visible to it.(eg: __mfcr() etc)

Definition at line 222 of file Ifx_Types.h.

Referenced by Ifx_AngleTrkF32_bound(), Ifx_AngleTrkF32_getSensorType(), IfxCcu6_PwmHl_setOutputPins(), IfxCcu6_PwmHl_updateOff(), IfxCcu6_TimerWithTrigger_disableUpdate(), IfxCif_Cam_enableJpegEncoder(), IfxCif_setInputInterface(), IfxCpu_updatePerformanceCounter(), IfxDma_getErrPointer(), IfxDma_getSrcPointer(), IfxEray_getInputBufferBusySrcPtr(), IfxEray_getInterruptLine0SrcPtr(), IfxEray_getInterruptLine1SrcPtr(), IfxEray_getMessageBufferStatus0SrcPtr(), IfxEray_getMessageBufferStatus1SrcPtr(), IfxEray_getNewDataInterrupt0SrcPtr(), IfxEray_getNewDataInterrupt1SrcPtr(), IfxEray_getOutputBufferBusySrcPtr(), IfxEray_getTimerInterrupt0SrcPtr(), IfxEray_getTimerInterrupt1SrcPtr(), IfxEray_setNewDataInterruptDestination(), IfxFce_getSrcPointer(), IfxFlash_clearStatus(), IfxFlash_disableWriteProtection(), IfxFlash_loadPage(), IfxFlash_loadPage2X32(), IfxFlash_resetToRead(), IfxFlash_resumeProtection(), IfxGpt12_getCaptureSrc(), IfxGpt12_getModuleFrequency(), IfxGpt12_IncrEnc_getPeriodPerRotation(), IfxGpt12_IncrEnc_getSensorType(), IfxGpt12_T2_getSrc(), IfxGpt12_T3_getSrc(), IfxGpt12_T4_getSrc(), IfxGpt12_T5_getSrc(), IfxGpt12_T6_getSrc(), IfxGtm_Atom_Ch_getSrcPointer(), IfxGtm_Atom_PwmHl_setupChannels(), IfxGtm_Atom_PwmHl_updateAndShiftOff(), IfxGtm_Atom_PwmHl_updateOff(), IfxGtm_Atom_PwmHl_updatePulseOff(), IfxGtm_Dpll_getSubIncFrequency(), IfxGtm_Tim_Ch_getSrcPointer(), IfxGtm_Tom_Ch_getSrcPointer(), IfxGtm_Tom_PwmHl_setupChannels(), IfxGtm_Tom_PwmHl_updateAndShiftOff(), IfxGtm_Tom_PwmHl_updateOff(), IfxGtm_Tom_PwmHl_updatePulseOff(), IfxHssl_getHsctSrcPointer(), IfxHssl_getHsslCOKSrcPointer(), IfxHssl_getHsslERRSrcPointer(), IfxHssl_getHsslEXISrcPointer(), IfxHssl_getHsslRDISrcPointer(), IfxHssl_getHsslTRGSrcPointer(), IfxHssl_Hssl_delay(), IfxIom_getFrequency(), IfxMsc_downstreamFractionalBaudCalculator(), IfxMsc_downstreamNormalBaudCalculator(), IfxPort_setGroupModeOutput(), IfxPsi5_getSrcPointer(), IfxPsi5_Psi5_startupChannel(), IfxQspi_calculateBasicConfigurationValue(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_calculateTimeQuantumLength(), IfxQspi_enableLoopbackMode(), IfxQspi_getModuleFrequency(), IfxStdIf_PwmHl_setupChannels(), and IfxStm_getFrequency().

◆ IFX_ZEROS

#define IFX_ZEROS (0x0000000000000000U)

Definition at line 81 of file Ifx_Types.h.

Referenced by IfxGtm_Atom_Ch_setNotification(), and IfxGtm_Tom_Ch_setNotification().

◆ TIME_INFINITE

#define TIME_INFINITE ((Ifx_TickTime)0x7FFFFFFFFFFFFFFFLL)

Definition at line 77 of file Ifx_Types.h.

Referenced by addTTime(), getDeadLine(), getTimeout(), Ifx_Console_print(), Ifx_Console_printAlign(), IfxAsclin_Asc_blockingRead(), IfxAsclin_Asc_blockingWrite(), IfxStdIf_DPipe_print(), IfxStm_getDeadLine(), IfxStm_isDeadLine(), IfxStm_now(), isDeadLine(), now(), and nowWithoutCriticalSection().

◆ TIME_NULL

#define TIME_NULL ((Ifx_TickTime)0x0000000000000000LL)

Definition at line 78 of file Ifx_Types.h.

Referenced by Ifx_Shell_process(), IfxAsclin_Asc_initiateTransmission(), IfxAsclin_Asc_isrReceive(), and IfxAsclin_Asc_isrTransmit().

Typedef Documentation

◆ Ifx_AddressValue

typedef pvoid Ifx_AddressValue

Used in address values.

Definition at line 104 of file Ifx_Types.h.

◆ Ifx_Priority

typedef uint16 Ifx_Priority

Used in interrupt service priorities.

Definition at line 100 of file Ifx_Types.h.

◆ Ifx_SignedTimerVal

typedef sint32 Ifx_SignedTimerVal

Used in signed timer values.

Definition at line 102 of file Ifx_Types.h.

◆ Ifx_SizeT

typedef sint16 Ifx_SizeT

Type used for data stream size.

Definition at line 89 of file Ifx_Types.h.

◆ Ifx_TickTime

typedef sint64 Ifx_TickTime

Time in ticks.

Definition at line 76 of file Ifx_Types.h.

◆ Ifx_TimerValue

typedef uint32 Ifx_TimerValue

Used in timer values.

Definition at line 101 of file Ifx_Types.h.

◆ pchar

typedef const char* pchar

const char pointer

Definition at line 53 of file Ifx_Types.h.

◆ pvoid

typedef void* pvoid

void pointer

Definition at line 54 of file Ifx_Types.h.

◆ voidfuncvoid

typedef void(* voidfuncvoid) (void)

void pointer which takes void argument

Definition at line 56 of file Ifx_Types.h.

◆ vvoid

typedef volatile void* vvoid

volatile void pointer

Definition at line 55 of file Ifx_Types.h.

Enumeration Type Documentation

◆ Ifx_ActiveState

enum Ifx_ActiveState

Signal active state definition.

Enumerator
Ifx_ActiveState_low | The signal is low active.
Ifx_ActiveState_high | The signal is high active.

Definition at line 113 of file Ifx_Types.h.

◆ Ifx_DataBufferMode

enum Ifx_DataBufferMode
Enumerator
Ifx_DataBufferMode_normal | normal mode, each received byte is moved to the rx fifo
Ifx_DataBufferMode_timeStampSingle | Single byte type stamp mode. The rx fifo is filled in with Ifx_DataBufferMode_TimeStampSingle items.

Definition at line 161 of file Ifx_Types.h.

◆ Ifx_ParityMode

enum Ifx_ParityMode
Enumerator
Ifx_ParityMode_even
Ifx_ParityMode_odd

Definition at line 119 of file Ifx_Types.h.

◆ Ifx_Pwm_Mode

enum Ifx_Pwm_Mode

Defines the PWM modes

The 1st member shall start with value 0, and the next members value shall be the previous member +1 pwmMode_off shall be the member with the higher index

Note
enum order and values should not be modified, except Ifx_Pwm_Mode_init and Ifx_Pwm_Mode_count
Enumerator
Ifx_Pwm_Mode_centerAligned | Center aligned mode.
Ifx_Pwm_Mode_centerAlignedInverted | Center aligned inverted aligned mode.
Ifx_Pwm_Mode_leftAligned | Left aligned mode. The PWM period starts with a rising edge.
Ifx_Pwm_Mode_rightAligned | Right aligned mode. The PWM period starts with a falling edge.
Ifx_Pwm_Mode_off | All switch open.
Ifx_Pwm_Mode_init | Initialisation mode, do not use at run time.
Ifx_Pwm_Mode_count | Number of defined modes.

Definition at line 175 of file Ifx_Types.h.

◆ Ifx_RxSel

enum Ifx_RxSel

input multiplexer definition used in PinMaps

Enumerator
Ifx_RxSel_a
Ifx_RxSel_b
Ifx_RxSel_c
Ifx_RxSel_d
Ifx_RxSel_e
Ifx_RxSel_f
Ifx_RxSel_g
Ifx_RxSel_h

Definition at line 127 of file Ifx_Types.h.


iLLD_TC26B: Icu.h File Reference

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Data Structures | Typedefs
Icu.h File Reference

ICU interface. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Icu.h:

Go to the source code of this file.

Data Structures

struct | Icu_Functions
struct | Icu_s
Structure of the Icu interface. More...
struct | Icu_Config
Configuration structure of the Icu interface. More...

Typedefs

typedef struct Icu_s | Icu
typedef void(* | Icu_StartCapture) (Icu *handle)
typedef void(* | Icu_StopCapture) (Icu *handle)
typedef void(* | Icu_GetTimeStamp) (Icu *handle)

Detailed Description

ICU interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:18 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Icu.h.

Data Structure Documentation

◆ Icu_Functions

struct Icu_Functions

Definition at line 55 of file Icu.h.

Collaboration diagram for Icu_Functions:
[legend]
Data Fields
Icu_GetTimeStamp | getTimeStamp
Icu_StartCapture | startCapture
Icu_StopCapture | stopCapture

◆ Icu_s

struct Icu_s

Structure of the Icu interface.

Definition at line 63 of file Icu.h.

Data Fields
float32 frequency dummy member to avoid error

◆ Icu_Config

struct Icu_Config

Configuration structure of the Icu interface.

Definition at line 72 of file Icu.h.

Data Fields
float32 frequency dummy member to avoid error

Typedef Documentation

◆ Icu

typedef struct Icu_s Icu

Definition at line 50 of file Icu.h.

◆ Icu_GetTimeStamp

typedef void(* Icu_GetTimeStamp) (Icu *handle)

Definition at line 53 of file Icu.h.

◆ Icu_StartCapture

typedef void(* Icu_StartCapture) (Icu *handle)

Definition at line 51 of file Icu.h.

◆ Icu_StopCapture

typedef void(* Icu_StopCapture) (Icu *handle)

Definition at line 52 of file Icu.h.


iLLD_TC26B: Ifx_Crc.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Macros | Functions
Ifx_Crc.h File Reference

CRC algorithm. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_Crc.h:

Go to the source code of this file.

Data Structures

struct | Ifc_Crc_Table
struct | Ifc_Crc_Table8
struct | Ifc_Crc_Table16
struct | Ifc_Crc_Table32
struct | Ifc_Crc

Macros

#define CRC_ENABLE_DPIPE 0

Functions

boolean | Ifx_Crc_init (Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
boolean | Ifx_Crc_createTable (Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
uint32 | Ifx_Crc_tableFast (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_table (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBit (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBitFast (Ifc_Crc *driver, uint8 *p, uint32 len)

Detailed Description

CRC algorithm.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Crc.h.

Data Structure Documentation

◆ Ifc_Crc_Table

struct Ifc_Crc_Table

Definition at line 59 of file Ifx_Crc.h.

Data Fields
uint32 | crchighbit
uint32 | crcmask
sint32 | order
uint32 | polynom
sint32 | refin

◆ Ifc_Crc_Table8

struct Ifc_Crc_Table8

Definition at line 67 of file Ifx_Crc.h.

Collaboration diagram for Ifc_Crc_Table8:
[legend]
Data Fields
uint8 | crctab[256] | CRC Table, must be 2st member of the struct.
Ifc_Crc_Table | data | CRC data, must be 1st member of the struct.

◆ Ifc_Crc_Table16

struct Ifc_Crc_Table16

Definition at line 73 of file Ifx_Crc.h.

Collaboration diagram for Ifc_Crc_Table16:
[legend]
Data Fields
uint16 | crctab[256] | CRC Table, must be 2st member of the struct.
Ifc_Crc_Table | data | CRC data, must be 1st member of the struct.

◆ Ifc_Crc_Table32

struct Ifc_Crc_Table32

Definition at line 79 of file Ifx_Crc.h.

Collaboration diagram for Ifc_Crc_Table32:
[legend]
Data Fields
uint32 | crctab[256] | CRC Table, must be 2st member of the struct.
Ifc_Crc_Table | data | CRC data, must be 1st member of the struct.

◆ Ifc_Crc

struct Ifc_Crc

Definition at line 85 of file Ifx_Crc.h.

Collaboration diagram for Ifc_Crc:
[legend]
Data Fields
uint32 | crcinit_direct
uint32 | crcinit_nondirect
uint32 | crcxor
sint32 | refout
const Ifc_Crc_Table * | table

Macro Definition Documentation

◆ CRC_ENABLE_DPIPE

#define CRC_ENABLE_DPIPE 0

Definition at line 52 of file Ifx_Crc.h.


iLLD_TC26B: Ifx_AngleTrkF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Macros | Functions
Ifx_AngleTrkF32.h File Reference

Angle-tracking observer for sin/cos analog position sensor. More...

#include "StdIf/IfxStdIf_Pos.h"
#include "SysSe/Math/Ifx_LowPassPt1F32.h"
Include dependency graph for Ifx_AngleTrkF32.h:

Go to the source code of this file.

Data Structures

struct | Ifx_AngleTrkF32_Config
Angle Tracking Observer configuration. More...
struct | Ifx_AngleTrkF32_CfgData
struct | Ifx_AngleTrkF32_PosIf
struct | Ifx_AngleTrkF32
Angle Tracking Observer object. More...

Macros

#define | IFX_CFG_ANGLETRKF32_SPEED_FILTER (1)
#define | IFX_CFG_ANGLETRKF32_FILTERED_SPEED (1)
Specify whether the speed reading is filtered by low-pass filter or not. More...

Functions

IFX_EXTERN float32 | Ifx_AngleTrkF32_getAbsolutePosition (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_Dir | Ifx_AngleTrkF32_getDirection (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_Status | Ifx_AngleTrkF32_getFault (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getOffset (Ifx_AngleTrkF32 *driver)
IFX_EXTERN uint16 | Ifx_AngleTrkF32_getPeriodPerRotation (Ifx_AngleTrkF32 *driver)
IFX_EXTERN float32 | Ifx_AngleTrkF32_getPosition (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_RawAngle | Ifx_AngleTrkF32_getRawPosition (Ifx_AngleTrkF32 *aObsv)
Returns the actual position. More...
IFX_EXTERN float32 | Ifx_AngleTrkF32_getRefreshPeriod (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getResolution (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getTurn (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_SensorType | Ifx_AngleTrkF32_getSensorType (Ifx_AngleTrkF32 *driver)
IFX_EXTERN float32 | Ifx_AngleTrkF32_getSpeed (Ifx_AngleTrkF32 *aObsv)
Returns the Speed. More...
IFX_EXTERN void | Ifx_AngleTrkF32_reset (Ifx_AngleTrkF32 *driver)
IFX_EXTERN void | Ifx_AngleTrkF32_resetFaults (Ifx_AngleTrkF32 *driver)
IFX_EXTERN void | Ifx_AngleTrkF32_setOffset (Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
Set the position offset (in ticks) More...
IFX_EXTERN void | Ifx_AngleTrkF32_setRefreshPeriod (Ifx_AngleTrkF32 *driver, float32 updatePeriod)
IFX_EXTERN void | Ifx_AngleTrkF32_update (Ifx_AngleTrkF32 *aObsv)
Update the object directly from its analog input. More...
IFX_EXTERN boolean | Ifx_AngleTrkF32_stdIfPosInit (IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver)
Initializes the standard interface "Pos". More...
Initialisation functions

Example use:

extern sint16 g_SinInput, g_CosInput;
Ifx_AngleTrkF32_Config driverConfig;
Ifx_AngleTrkF32 driverData;
Ifx_AngleTrkF32_initConfig(&driverConfig, &g_SinInput, g_CosInput);
driverConfig.errorThreshold = 5.0 / 180 * IFX_PI; // 5 degree error
driverConfig.sqrAmplMax = 1.01 * 1.01;
driverConfig.sqrAmplMin = 0.99 * 0.99;
driverConfig.speedLpfFc = 100;
driverConfig.periodPerRotation = 1;
driverConfig.reversed = FALSE;
driverConfig.offset = 0;
Ifx_AngleTrkF32_init(&driverData, &driverConfig);

Prototypes:

IFX_EXTERN void | Ifx_AngleTrkF32_init (Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
Initialize the Angle Tracking object. More...
IFX_EXTERN void | Ifx_AngleTrkF32_initConfig (Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
Fill config with default values. More...
Protected functions

These functions are not for end-user but may be used by another driver which extends the functionality of library_srvsw_sysse_math_f32_angletrk

IFX_EXTERN float32 | Ifx_AngleTrkF32_step (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisation (call to Ifx_AngleTrkF32_init()). More...
IFX_EXTERN void | Ifx_AngleTrkF32_updateStatus (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
Update the status flags. More...
IFX_INLINE float32 | Ifx_AngleTrkF32_getLoopSpeed (Ifx_AngleTrkF32 *aObsv)
get the speed. More...

Detailed Description

Angle-tracking observer for sin/cos analog position sensor.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_AngleTrkF32.h.

Data Structure Documentation

◆ Ifx_AngleTrkF32_Config

struct Ifx_AngleTrkF32_Config

Angle Tracking Observer configuration.

Definition at line 73 of file Ifx_AngleTrkF32.h.

Data Fields
sint16 * | cosIn | Pointer to COS input variable.
float32 | errorThreshold | Threshold of error value in the tracking loop.
float32 | kd | Derivative gain.
float32 | ki | Integrator gain.
float32 | kp | Proportional gain.
IfxStdIf_Pos_RawAngle | offset | Offset in ticks. [0 .. (Ifx_AngleTrkF32_Config::resolution - 1)].
uint16 | periodPerRotation | Number of electrical periods per mechanical rotation.
sint32 | resolution | Sensor resolution.
boolean | reversed | TRUE: reversed direction, FALSE: straight direction.
sint16 * | sinIn | Pointer to SIN input variable.
float32 | speedLpfFc | Cut-off frequency of speed low-pass filter.
sint32 | sqrAmplMax | Maximum value for square of signal amplitudes.
sint32 | sqrAmplMin | Minimum value for square of signal amplitudes.

◆ Ifx_AngleTrkF32_CfgData

struct Ifx_AngleTrkF32_CfgData

Definition at line 90 of file Ifx_AngleTrkF32.h.

Data Fields
float32 | errorThreshold | Threshold of error value in the tracking loop.
float32 | kd | Derivative gain.
float32 | ki | Integrator gain.
float32 | kp | Proportional gain.
sint32 | sqrAmplMax | Maximum value for square of signal amplitudes.
sint32 | sqrAmplMin | Minimum value for square of signal amplitudes.

◆ Ifx_AngleTrkF32_PosIf

struct Ifx_AngleTrkF32_PosIf

Definition at line 100 of file Ifx_AngleTrkF32.h.

Collaboration diagram for Ifx_AngleTrkF32_PosIf:
[legend]
Data Fields
IfxStdIf_Pos_Dir | direction | rotation direction
IfxStdIf_Pos_RawAngle | offset | raw position offset
uint16 | periodPerRotation | sensor 'electrical' periods per mechanical rotation
float32 | positionConst | constant for calculating mechanical position (in rad) from raw position
IfxStdIf_Pos_RawAngle rawPosition raw position in ticks.
Note
: the value already contains the offset
IfxStdIf_Pos_RawAngle | resolution | resolution of this position sensor interface
boolean | reversed | reverse direction
IfxStdIf_Pos_Status | status | error code (0 = no error)
float32 | Ts | update period in seconds
sint32 | turn | number of mechanical turns. FIXME to be implemented

◆ Ifx_AngleTrkF32

struct Ifx_AngleTrkF32

Angle Tracking Observer object.

Definition at line 116 of file Ifx_AngleTrkF32.h.

Collaboration diagram for Ifx_AngleTrkF32:
[legend]
Data Fields
float32 | accelEst |
float32 | angleAtan |
float32 | angleErr |
float32 | angleEst |
float32 | angleRef |
Ifx_AngleTrkF32_PosIf | base |
Ifx_AngleTrkF32_CfgData | cfgData |
sint16 * | cosIn | Pointer to COS input variable.
float32 | halfTs |
sint16 * | sinIn | Pointer to SIN input variable.
float32 | speedEstA |
float32 | speedEstB |
Ifx_LowPassPt1F32 | speedLpf | Only used if IFX_CFG_ANGLETRKF32_SPEED_FILTER is set

Macro Definition Documentation

◆ IFX_CFG_ANGLETRKF32_FILTERED_SPEED

#define IFX_CFG_ANGLETRKF32_FILTERED_SPEED (1)

Specify whether the speed reading is filtered by low-pass filter or not.

Definition at line 66 of file Ifx_AngleTrkF32.h.

◆ IFX_CFG_ANGLETRKF32_SPEED_FILTER

#define IFX_CFG_ANGLETRKF32_SPEED_FILTER (1)

Definition at line 61 of file Ifx_AngleTrkF32.h.

Function Documentation

◆ Ifx_AngleTrkF32_stdIfPosInit()

IFX_EXTERN boolean Ifx_AngleTrkF32_stdIfPosInit | ( | IfxStdIf_Pos * | stdif,
 |  | Ifx_AngleTrkF32 * | driver
 | ) |  |

Initializes the standard interface "Pos".

Parameters
stdif | Standard interface position object
driver | Virtual position sensor
Returns
TRUE on success else FALSE

Definition at line 427 of file Ifx_AngleTrkF32.c.


iLLD_TC26B: Ifx_Console.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Data Structures | Macros | Functions | Variables
Ifx_Console.h File Reference

Main Console module header file. More...

#include "StdIf/IfxStdIf_DPipe.h"
Include dependency graph for Ifx_Console.h:

Go to the source code of this file.

Data Structures

struct Ifx_Console

Macros

#define | IFX_CFG_CONSOLE_INDENT_SIZE (4)
Default indentation/alignment size. More...
#define | CONSOLE Ifx_g_console
Alias Ifx_g_console object (by value) More...

Functions

IFX_INLINE IfxStdIf_DPipe * | Ifx_Console_getIo (void)
Return pointer to the default console object. More...
IFX_EXTERN void | Ifx_Console_init (IfxStdIf_DPipe *standardIo)
Initialize the Ifx_g_console object. More...
IFX_EXTERN boolean | Ifx_Console_print (pchar format,...)
Print formatted string into Ifx_g_console. More...
IFX_EXTERN boolean | Ifx_Console_printAlign (pchar format,...)
Print formatted string into Ifx_g_console. Indented with a number of spaces. More...
IFX_INLINE void | Ifx_Console_decrAlign (sint16 value)
Decrement the alignment/indentation using the given value. More...
IFX_INLINE void | Ifx_Console_incrAlign (sint16 value)
Increment the alignment/indentation using the given value. More...

Variables

IFX_EXTERN Ifx_Console Ifx_g_console
Default main console global variable. More...

Detailed Description

Main Console module header file.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:36 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Console.h.

Data Structure Documentation

◆ Ifx_Console

struct Ifx_Console

Definition at line 55 of file Ifx_Console.h.

Collaboration diagram for Ifx_Console:
[legend]
Data Fields
sint16 | align | Variable for storing the actual (left)indentation level of the Ifx_g_console.
IfxStdIf_DPipe * | standardIo | Pointer to the IfxStdIf_DPipe object used as general console.

Macro Definition Documentation

◆ IFX_CFG_CONSOLE_INDENT_SIZE

#define IFX_CFG_CONSOLE_INDENT_SIZE (4)

Default indentation/alignment size.

Definition at line 52 of file Ifx_Console.h.

Referenced by Ifx_Console_decrAlign(), and Ifx_Console_incrAlign().

Variable Documentation

◆ Ifx_g_console

IFX_EXTERN Ifx_Console Ifx_g_console

Default main console global variable.

Definition at line 61 of file Ifx_Console.h.

Referenced by Ifx_Console_decrAlign(), Ifx_Console_getIo(), and Ifx_Console_incrAlign().


iLLD_TC26B: Ifx_DateTime.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Time
Data Structures | Functions
Ifx_DateTime.h File Reference

Date and time functions. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_DateTime.h:

Go to the source code of this file.

Data Structures

struct Ifx_DateTime

Functions

IFX_EXTERN void | DateTime_set (Ifx_DateTime *time)
Set the real time. More...
IFX_EXTERN void | DateTime_get (Ifx_DateTime *time)
Get the real time Note that this function is valid only if DateTime_set() has been called. More...

Detailed Description

Date and time functions.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:40 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_DateTime.h.

Data Structure Documentation

◆ Ifx_DateTime

struct Ifx_DateTime

Definition at line 48 of file Ifx_DateTime.h.

Data Fields
sint32 | hours
sint32 | minutes
sint32 | seconds


iLLD_TC26B: Ifx_GlobalResources.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • General
Data Structures | Functions
Ifx_GlobalResources.c File Reference
#include "Ifx_GlobalResources.h"
Include dependency graph for Ifx_GlobalResources.c:

Go to the source code of this file.

Data Structures

struct Ifx_GlobalResources
Global resource object. More...

Functions

void * | Ifx_GlobalResources_get (sint32 id)
sint32 | Ifx_GlobalResources_getIndex (void *resource)
Returns the global resource index. More...
const Ifx_GlobalResources_Item * | Ifx_GlobalResources_getItem (sint32 id)
pchar | Ifx_GlobalResources_getName (sint32 id)
boolean | Ifx_GlobalResources_init (const Ifx_GlobalResources_Item *table, uint32 size)

Data Structure Documentation

◆ Ifx_GlobalResources

struct Ifx_GlobalResources

Global resource object.

Definition at line 44 of file Ifx_GlobalResources.c.

Collaboration diagram for Ifx_GlobalResources:
[legend]
Data Fields
sint32 | size | Size of the global resource table.
const Ifx_GlobalResources_Item * | table | Pointer to the global resource table.


iLLD_TC26B: Ifx_GlobalResources.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • General
Data Structures | Macros | Functions
Ifx_GlobalResources.h File Reference

Handling of global resources. More...

#include "Ifx_Cfg.h"
#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_GlobalResources.h:

Go to the source code of this file.

Data Structures

struct Ifx_GlobalResources_Item

Macros

#define IFX_CFG_GLOBAL_RESOURCES_ENABLED (0)

Functions

IFX_EXTERN void * | Ifx_GlobalResources_get (sint32 id)
IFX_EXTERN sint32 | Ifx_GlobalResources_getIndex (void *resource)
Returns the global resource index. More...
IFX_EXTERN const Ifx_GlobalResources_Item * | Ifx_GlobalResources_getItem (sint32 id)
IFX_EXTERN pchar | Ifx_GlobalResources_getName (sint32 id)
IFX_EXTERN boolean | Ifx_GlobalResources_init (const Ifx_GlobalResources_Item *table, uint32 size)

Detailed Description

Handling of global resources.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:36 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:39 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_GlobalResources.h.

Data Structure Documentation

◆ Ifx_GlobalResources_Item

struct Ifx_GlobalResources_Item

Definition at line 55 of file Ifx_GlobalResources.h.

Data Fields
pchar | name
void * | resource

Macro Definition Documentation

◆ IFX_CFG_GLOBAL_RESOURCES_ENABLED

#define IFX_CFG_GLOBAL_RESOURCES_ENABLED (0)

Definition at line 52 of file Ifx_GlobalResources.h.


iLLD_TC26B: Ifx_LowPassPt1F32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Functions
Ifx_LowPassPt1F32.h File Reference

Low pass filter PT1. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_LowPassPt1F32.h:

Go to the source code of this file.

Data Structures

struct | Ifx_LowPassPt1F32
PT1 object definition. More...
struct | Ifx_LowPassPt1F32_Config
PT1 configuration. More...

Functions

IFX_EXTERN void | Ifx_LowPassPt1F32_init (Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration. More...
IFX_INLINE void | Ifx_LowPassPt1F32_reset (Ifx_LowPassPt1F32 *filter)
Reset the internal filter variable. More...
IFX_EXTERN float32 | Ifx_LowPassPt1F32_do (Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter. More...

Detailed Description

Low pass filter PT1.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LowPassPt1F32.h.

Data Structure Documentation

◆ Ifx_LowPassPt1F32

struct Ifx_LowPassPt1F32

PT1 object definition.

Definition at line 61 of file Ifx_LowPassPt1F32.h.

Data Fields
float32 | a | a parameter
float32 | b | b parameter
float32 | out | last output

◆ Ifx_LowPassPt1F32_Config

struct Ifx_LowPassPt1F32_Config

PT1 configuration.

Definition at line 69 of file Ifx_LowPassPt1F32.h.

Data Fields
float32 | cutOffFrequency | Cut off frequency.
float32 | gain | Gain.
float32 | samplingTime | Sampling time.


iLLD_TC26B: Ifx_LutIndexedLinearF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Functions
Ifx_LutIndexedLinearF32.h File Reference

Look-up functionality. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_LutIndexedLinearF32.h:

Go to the source code of this file.

Data Structures

struct | Ifx_LutIndexedLinearF32_Item
struct | Ifx_LutIndexedLinearF32

Functions

IFX_INLINE float32 Ifx_LutIndexedLinearF32_search (const Ifx_LutIndexedLinearF32 *ml, uint32 index)
Look-up table search. More...

Detailed Description

Look-up functionality.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutIndexedLinearF32.h.

Data Structure Documentation

◆ Ifx_LutIndexedLinearF32_Item

struct Ifx_LutIndexedLinearF32_Item

Definition at line 54 of file Ifx_LutIndexedLinearF32.h.

Data Fields
float32 | gain | channel gain
float32 | offset | channel offset

◆ Ifx_LutIndexedLinearF32

struct Ifx_LutIndexedLinearF32

Definition at line 60 of file Ifx_LutIndexedLinearF32.h.

Collaboration diagram for Ifx_LutIndexedLinearF32:
[legend]
Data Fields
uint16 | segmentCount
const Ifx_LutIndexedLinearF32_Item * | segments
sint8 | shift


iLLD_TC26B: Ifx_LutLinearF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Functions
Ifx_LutLinearF32.h File Reference

Look-up functionality. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_LutLinearF32.h:

Go to the source code of this file.

Data Structures

struct | Ifx_LutLinearF32_Item
struct | Ifx_LutLinearF32

Functions

IFX_EXTERN float32 | Ifx_LutLinearF32_searchBin (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with binary search implementation. More...
IFX_INLINE float32 | Ifx_LutLinearF32_searchNegSeq (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with negative sequential search implementation. More...
IFX_INLINE float32 | Ifx_LutLinearF32_searchPosSeq (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with positive sequential search implementation. More...

Detailed Description

Look-up functionality.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutLinearF32.h.

Data Structure Documentation

◆ Ifx_LutLinearF32_Item

struct Ifx_LutLinearF32_Item

Definition at line 54 of file Ifx_LutLinearF32.h.

Data Fields
float32 | boundary | segment input upper limit
float32 | gain | channel gain
float32 | offset | channel offset

◆ Ifx_LutLinearF32

struct Ifx_LutLinearF32

Definition at line 61 of file Ifx_LutLinearF32.h.

Collaboration diagram for Ifx_LutLinearF32:
[legend]
Data Fields
sint8 | segmentCount
const Ifx_LutLinearF32_Item * | segments


iLLD_TC26B: Ifx_RampF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Functions
Ifx_RampF32.h File Reference

Ramp function. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_RampF32.h:

Go to the source code of this file.

Data Structures

struct Ifx_RampF32
Ifx_RampF32 object definition. More...

Functions

IFX_INLINE void | Ifx_RampF32_init (Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Initialize the Ifx_RampF32 object. More...
IFX_INLINE void | Ifx_RampF32_reset (Ifx_RampF32 *ramp)
Reset internal values. More...
IFX_INLINE void | Ifx_RampF32_setSlewRate (Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Set the maximum slew rate. More...
IFX_INLINE void | Ifx_RampF32_setRef (Ifx_RampF32 *ramp, float32 ref)
Set the reference value. More...
IFX_INLINE float32 | Ifx_RampF32_getValue (Ifx_RampF32 *ramp)
Get the actual output value. More...
IFX_EXTERN float32 | Ifx_RampF32_step (Ifx_RampF32 *ramp)
Execute the Ramp function. More...
IFX_INLINE float32 | Ifx_RampF32_getRef (Ifx_RampF32 *ramp)
Get the reference value. More...

Detailed Description

Ramp function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_RampF32.h.

Data Structure Documentation

◆ Ifx_RampF32

struct Ifx_RampF32

Ifx_RampF32 object definition.

Definition at line 55 of file Ifx_RampF32.h.

Data Fields
float32 | delta
float32 | ik
float32 | uk

Function Documentation

◆ Ifx_RampF32_getRef()

IFX_INLINE float32 Ifx_RampF32_getRef ( Ifx_RampF32 * ramp )

Get the reference value.

Parameters
ramp Pointer to the Ifx_RampF32 object
Returns
Returns the ref value

Definition at line 94 of file Ifx_RampF32.h.


iLLD_TC26B: Ifx_Shell_Protocol Struct Reference

Data Fields
Ifx_Shell_Protocol Struct Reference

Shell protocol configuration. More...

#include </home/illd.work/release/iLLD_1_0_1_12_0/External/Src/BaseSw/Service/CpuGeneric/SysSe/Comm/Ifx_Shell.h>

Data Fields

boolean(* | start )(void *protocol, IfxStdIf_DPipe *io)
void(* | execute )(void *protocol)
void(* | onStart )(void *protocol, void *data)
void * | onStartData
void * | object
boolean started

Detailed Description

Shell protocol configuration.

Definition at line 197 of file Ifx_Shell.h.

Field Documentation

◆ execute

void(* execute) (void *protocol)

Definition at line 200 of file Ifx_Shell.h.

Referenced by Ifx_Shell_initConfig(), and Ifx_Shell_process().

◆ object

void* object

Definition at line 203 of file Ifx_Shell.h.

Referenced by Ifx_Shell_initConfig(), Ifx_Shell_process(), and Ifx_Shell_protocolStart().

◆ onStart

void(* onStart) (void *protocol, void *data)

Definition at line 201 of file Ifx_Shell.h.

Referenced by Ifx_Shell_initConfig(), and Ifx_Shell_protocolStart().

◆ onStartData

void* onStartData

Definition at line 202 of file Ifx_Shell.h.

Referenced by Ifx_Shell_initConfig(), and Ifx_Shell_protocolStart().

◆ start

boolean(* start) (void *protocol, IfxStdIf_DPipe *io)

Definition at line 199 of file Ifx_Shell.h.

Referenced by Ifx_Shell_initConfig(), and Ifx_Shell_protocolStart().

◆ started

boolean started

Definition at line 204 of file Ifx_Shell.h.

Referenced by Ifx_Shell_init(), Ifx_Shell_initConfig(), Ifx_Shell_process(), and Ifx_Shell_protocolStart().

The documentation for this struct was generated from the following file:
  • Ifx_Shell.h


iLLD_TC26B: IfxStdIf_DPipe.h File Reference

  • Service
  • CpuGeneric
  • StdIf
Data Structures | Macros | Typedefs | Functions
IfxStdIf_DPipe.h File Reference

Standard interface: Data Pipe. More...

#include "IfxStdIf.h"
Include dependency graph for IfxStdIf_DPipe.h:

Go to the source code of this file.

Data Structures

struct IfxStdIf_DPipe_
Standard interface object. More...

Macros

#define | ENDL "\r\n"
#define | STDIF_DPIPE_MAX_PRINT_SIZE (255)
Size of the buffer allocated on the stack for the print function. More...

Typedefs

typedef struct IfxStdIf_DPipe_ | IfxStdIf_DPipe
Forward declaration. More...
typedef volatile boolean * | IfxStdIf_DPipe_WriteEvent
typedef volatile boolean * | IfxStdIf_DPipe_ReadEvent
typedef boolean(* | IfxStdIf_DPipe_Write) (IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe. More...
typedef boolean(* | IfxStdIf_DPipe_Read) (IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object. More...
typedef sint32(* | IfxStdIf_DPipe_GetReadCount) (IfxStdIf_InterfaceDriver stdIf)
Returns the number of bytes in the rx buffer. More...
typedef IfxStdIf_DPipe_ReadEvent(* | IfxStdIf_DPipe_GetReadEvent) (IfxStdIf_InterfaceDriver stdIf)
Returns read event object. More...
typedef uint32(* | IfxStdIf_DPipe_GetSendCount) (IfxStdIf_InterfaceDriver stdIf)
Returns number of bytes send. More...
typedef Ifx_TickTime(* | IfxStdIf_DPipe_GetTxTimeStamp) (IfxStdIf_InterfaceDriver stdIf)
Returns the time stamp of the last transmit data. More...
typedef sint32(* | IfxStdIf_DPipe_GetWriteCount) (IfxStdIf_InterfaceDriver stdIf)
Returns the number of free bytes (free space) in the tx buffer. More...
typedef IfxStdIf_DPipe_WriteEvent(* | IfxStdIf_DPipe_GetWriteEvent) (IfxStdIf_InterfaceDriver stdIf)
Returns write event object. More...
typedef boolean(* | IfxStdIf_DPipe_CanReadCount) (IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer. More...
typedef boolean(* | IfxStdIf_DPipe_CanWriteCount) (IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
typedef boolean(* | IfxStdIf_DPipe_FlushTx) (IfxStdIf_InterfaceDriver stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data. More...
typedef void(* | IfxStdIf_DPipe_ClearRx) (IfxStdIf_InterfaceDriver stdIf)
Clears the RX buffer by removing all data. More...
typedef void(* | IfxStdIf_DPipe_ClearTx) (IfxStdIf_InterfaceDriver stdIf)
Clears the TX buffer by removing all data. More...
typedef void(* | IfxStdIf_DPipe_OnReceive) (IfxStdIf_InterfaceDriver stdIf)
handler called on reveive event More...
typedef void(* | IfxStdIf_DPipe_OnTransmit) (IfxStdIf_InterfaceDriver stdIf)
handler called on transmit event More...
typedef void(* | IfxStdIf_DPipe_OnError) (IfxStdIf_InterfaceDriver stdIf)
handler called on error event More...
typedef void(* | IfxStdIf_DPipe_ResetSendCount) (IfxStdIf_InterfaceDriver stdIf)
Reset the sendCount counter. More...

Functions

IFX_INLINE boolean | IfxStdIf_DPipe_write (IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe. More...
IFX_INLINE boolean | IfxStdIf_DPipe_read (IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object. More...
IFX_INLINE sint32 | IfxStdIf_DPipe_getReadCount (IfxStdIf_DPipe *stdIf)
Returns the number of bytes in the rx buffer. More...
IFX_INLINE sint32 | IfxStdIf_DPipe_getWriteCount (IfxStdIf_DPipe *stdIf)
Returns the number of free bytes (free space) in the tx buffer. More...
IFX_INLINE boolean | IfxStdIf_DPipe_canReadCount (IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer. More...
IFX_INLINE boolean | IfxStdIf_DPipe_canWriteCount (IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
IFX_INLINE IfxStdIf_DPipe_ReadEvent | IfxStdIf_DPipe_getReadEvent (IfxStdIf_DPipe *stdIf)
Returns read event object. More...
IFX_INLINE IfxStdIf_DPipe_WriteEvent | IfxStdIf_DPipe_getWriteEvent (IfxStdIf_DPipe *stdIf)
Returns write event object. More...
IFX_INLINE boolean | IfxStdIf_DPipe_flushTx (IfxStdIf_DPipe *stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data. More...
IFX_INLINE void | IfxStdIf_DPipe_clearTx (IfxStdIf_DPipe *stdIf)
Clears the TX buffer by removing all data. More...
IFX_INLINE void | IfxStdIf_DPipe_clearRx (IfxStdIf_DPipe *stdIf)
Clears the RX buffer by removing all data. More...
IFX_INLINE void | IfxStdIf_DPipe_onReceive (IfxStdIf_DPipe *stdIf)
handler called on reveive event More...
IFX_INLINE void | IfxStdIf_DPipe_onTransmit (IfxStdIf_DPipe *stdIf)
handler called on transmit event More...
IFX_INLINE void | IfxStdIf_DPipe_onError (IfxStdIf_DPipe *stdIf)
handler called on error event More...
IFX_INLINE uint32 | IfxStdIf_DPipe_getSendCount (IfxStdIf_DPipe *stdIf)
Returns number of bytes send. More...
IFX_INLINE Ifx_TickTime | IfxStdIf_DPipe_getTxTimeStamp (IfxStdIf_DPipe *stdIf)
Returns the time stamp of the last transmit data. More...
IFX_INLINE void | IfxStdIf_DPipe_resetSendCount (IfxStdIf_DPipe *stdIf)
Reset the sendCount counter. More...
IFX_EXTERN void | IfxStdIf_DPipe_print (IfxStdIf_DPipe *stdIf, pchar format,...)

Detailed Description

Standard interface: Data Pipe.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:24 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf_DPipe.h.

Data Structure Documentation

◆ IfxStdIf_DPipe_

struct IfxStdIf_DPipe_

Standard interface object.

Definition at line 230 of file IfxStdIf_DPipe.h.

Data Fields
IfxStdIf_DPipe_CanReadCount canReadCount
See also
IfxStdIf_DPipe_CanReadCount
IfxStdIf_DPipe_CanWriteCount canWriteCount
See also
IfxStdIf_DPipe_CanWriteCount
IfxStdIf_DPipe_ClearRx clearRx
See also
IfxStdIf_DPipe_ClearRx
IfxStdIf_DPipe_ClearTx clearTx
See also
IfxStdIf_DPipe_ClearTx
IfxStdIf_InterfaceDriver | driver | Pointer to the specific driver object.
IfxStdIf_DPipe_FlushTx flushTx
See also
IfxStdIf_DPipe_FlushTx
IfxStdIf_DPipe_GetReadCount getReadCount
See also
IfxStdIf_DPipe_GetReadCount
IfxStdIf_DPipe_GetReadEvent getReadEvent
See also
IfxStdIf_DPipe_GetReadEvent
IfxStdIf_DPipe_GetSendCount getSendCount
See also
IfxStdIf_DPipe_GetSendCount
IfxStdIf_DPipe_GetTxTimeStamp getTxTimeStamp
See also
IfxStdIf_DPipe_GetTxTimeStamp
IfxStdIf_DPipe_GetWriteCount getWriteCount
See also
IfxStdIf_DPipe_GetWriteCount
IfxStdIf_DPipe_GetWriteEvent getWriteEvent
See also
IfxStdIf_DPipe_GetWriteEvent
IfxStdIf_DPipe_OnError onError
See also
IfxStdIf_DPipe_OnError
IfxStdIf_DPipe_OnReceive onReceive
See also
IfxStdIf_DPipe_OnReceive
IfxStdIf_DPipe_OnTransmit onTransmit
See also
IfxStdIf_DPipe_OnTransmit
IfxStdIf_DPipe_Read read
See also
IfxStdIf_DPipe_Read
IfxStdIf_DPipe_ResetSendCount resetSendCount
See also
IfxStdIf_DPipe_ResetSendCount
boolean | txDisabled | If disabled is set to TRUE, the output is disabled, else enabled.
IfxStdIf_DPipe_Write write
See also
IfxStdIf_DPipe_Write

Macro Definition Documentation

◆ ENDL

#define ENDL "\r\n"

Definition at line 64 of file IfxStdIf_DPipe.h.

Referenced by Ifx_Assert_doLevel(), Ifx_Assert_doValidate(), Ifx_Shell_bbProtocolStart(), Ifx_Shell_init(), Ifx_Shell_printSyntax(), Ifx_Shell_process(), Ifx_Shell_protocolStart(), and IfxStdIf_Pos_printStatus().

◆ STDIF_DPIPE_MAX_PRINT_SIZE

#define STDIF_DPIPE_MAX_PRINT_SIZE (255)

Size of the buffer allocated on the stack for the print function.

Definition at line 74 of file IfxStdIf_DPipe.h.

Referenced by Ifx_Console_print(), Ifx_Console_printAlign(), and IfxStdIf_DPipe_print().

Typedef Documentation

◆ IfxStdIf_DPipe

typedef struct IfxStdIf_DPipe_ IfxStdIf_DPipe

Forward declaration.

Definition at line 68 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_CanReadCount

typedef boolean(* IfxStdIf_DPipe_CanReadCount) (IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)

Indicates if the required number of bytes are available for read in the buffer.

Parameters
stdif | Pointer to the interface driver object
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes are available for read in the rx buffer, if not the Event is armed to be set when the buffer count is bigger or equal to the requested count

Definition at line 163 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_CanWriteCount

typedef boolean(* IfxStdIf_DPipe_CanWriteCount) (IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)

Indicates if there is enough free space to write the data in the buffer.

Parameters
stdif | Pointer to the interface driver object
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes can be written to the tx buffer, if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count

Definition at line 174 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_ClearRx

typedef void(* IfxStdIf_DPipe_ClearRx) (IfxStdIf_InterfaceDriver stdIf)

Clears the RX buffer by removing all data.

Parameters
stdif Pointer to the interface driver object
Returns
void

Definition at line 190 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_ClearTx

typedef void(* IfxStdIf_DPipe_ClearTx) (IfxStdIf_InterfaceDriver stdIf)

Clears the TX buffer by removing all data.

Parameters
stdif Pointer to the interface driver object
Returns
void

Definition at line 197 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_FlushTx

typedef boolean(* IfxStdIf_DPipe_FlushTx) (IfxStdIf_InterfaceDriver stdIf, Ifx_TickTime timeout)

Flush the transmit buffer by transmitting all data.

Parameters
stdif | Pointer to the interface driver object
timeout | timeout for the flush operation
Returns
Returns TRUE if the FIFO is empty

Definition at line 183 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetReadCount

typedef sint32(* IfxStdIf_DPipe_GetReadCount) (IfxStdIf_InterfaceDriver stdIf)

Returns the number of bytes in the rx buffer.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the number of bytes in the rx buffer

Definition at line 112 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetReadEvent

typedef IfxStdIf_DPipe_ReadEvent(* IfxStdIf_DPipe_GetReadEvent) (IfxStdIf_InterfaceDriver stdIf)

Returns read event object.

Parameters
stdif Pointer to the interface driver object
Returns
Returns read event object

Definition at line 120 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetSendCount

typedef uint32(* IfxStdIf_DPipe_GetSendCount) (IfxStdIf_InterfaceDriver stdIf)

Returns number of bytes send.

Parameters
stdif Pointer to the interface driver object
Returns
Returns number of bytes send

Definition at line 128 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetTxTimeStamp

typedef Ifx_TickTime(* IfxStdIf_DPipe_GetTxTimeStamp) (IfxStdIf_InterfaceDriver stdIf)

Returns the time stamp of the last transmit data.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the time stamp of the last transmit data

Definition at line 136 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetWriteCount

typedef sint32(* IfxStdIf_DPipe_GetWriteCount) (IfxStdIf_InterfaceDriver stdIf)

Returns the number of free bytes (free space) in the tx buffer.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the number of free bytes in the tx buffer

Definition at line 144 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetWriteEvent

typedef IfxStdIf_DPipe_WriteEvent(* IfxStdIf_DPipe_GetWriteEvent) (IfxStdIf_InterfaceDriver stdIf)

Returns write event object.

Parameters
stdif Pointer to the interface driver object
Returns
Returns write event object

Definition at line 152 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_OnError

typedef void(* IfxStdIf_DPipe_OnError) (IfxStdIf_InterfaceDriver stdIf)

handler called on error event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 219 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_OnReceive

typedef void(* IfxStdIf_DPipe_OnReceive) (IfxStdIf_InterfaceDriver stdIf)

handler called on reveive event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 205 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_OnTransmit

typedef void(* IfxStdIf_DPipe_OnTransmit) (IfxStdIf_InterfaceDriver stdIf)

handler called on transmit event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 212 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_Read

typedef boolean(* IfxStdIf_DPipe_Read) (IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)

Read data from the IfxStdIf_DPipe object.

Initially the parameter 'count' specifies count of data to read. After execution the data pointed by 'count' specifies the data actually read.

Parameters
stdif | Pointer to the interface driver object
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Return values
TRUE | Returns TRUE if all items could be read
FALSE | Returns FALSE if not all the items could be read

Definition at line 104 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_ReadEvent

typedef volatile boolean* IfxStdIf_DPipe_ReadEvent

Definition at line 71 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_ResetSendCount

typedef void(* IfxStdIf_DPipe_ResetSendCount) (IfxStdIf_InterfaceDriver stdIf)

Reset the sendCount counter.

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 226 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_Write

typedef boolean(* IfxStdIf_DPipe_Write) (IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)

Write binary data into the IfxStdIf_DPipe.

Initially the parameter 'count' specifies count of data to write. After execution the data pointed by 'count' specifies the data actually written

Parameters
stdif | Pointer to the interface driver object
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Return values
TRUE | Returns TRUE if all items could be written
FALSE | Returns FALSE if not all the items could be written

Definition at line 89 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_WriteEvent

typedef volatile boolean* IfxStdIf_DPipe_WriteEvent

Definition at line 70 of file IfxStdIf_DPipe.h.


iLLD_TC26B: IfxStdIf_Pos.h File Reference

  • Service
  • CpuGeneric
  • StdIf
Data Structures | Typedefs | Enumerations | Functions
IfxStdIf_Pos.h File Reference

Standard interface: Position interface. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxStdIf.h"
#include "IfxStdIf_DPipe.h"
Include dependency graph for IfxStdIf_Pos.h:

Go to the source code of this file.

Data Structures

union | IfxStdIf_Pos_Status
Position sensor status definition. More...
struct | IfxStdIf_Pos_
Standard interface object. More...
struct | IfxStdIf_Pos_Config
Position interface configuration. More...
struct | IfxStdIf_Pos_Status.B

Typedefs

typedef sint32 | IfxStdIf_Pos_RawAngle
typedef struct IfxStdIf_Pos_ | IfxStdIf_Pos
Forward declaration. More...
typedef float32(* | IfxStdIf_Pos_GetAbsolutePosition) (IfxStdIf_InterfaceDriver stdIf)
Return the position, inclusive turns. More...
typedef void(* | IfxStdIf_Pos_OnZeroIrq) (IfxStdIf_InterfaceDriver stdIf)
Handles the zero interrupt. More...
typedef sint32(* | IfxStdIf_Pos_GetOffset) (IfxStdIf_InterfaceDriver stdIf)
Return the raw position sensor offset. More...
typedef float32(* | IfxStdIf_Pos_GetPosition) (IfxStdIf_InterfaceDriver stdIf)
Return the position. More...
typedef IfxStdIf_Pos_Dir(* | IfxStdIf_Pos_GetDirection) (IfxStdIf_InterfaceDriver stdIf)
Return the direction. More...
typedef IfxStdIf_Pos_Status(* | IfxStdIf_Pos_GetFault) (IfxStdIf_InterfaceDriver stdIf)
Return the sensor status. More...
typedef uint16(* | IfxStdIf_Pos_GetPeriodPerRotation) (IfxStdIf_InterfaceDriver stdIf)
Return the period per rotation setting. More...
typedef sint32(* | IfxStdIf_Pos_GetRawPosition) (IfxStdIf_InterfaceDriver stdIf)
Return the raw position in ticks. More...
typedef float32(* | IfxStdIf_Pos_GetRefreshPeriod) (IfxStdIf_InterfaceDriver stdIf)
Get the update period. More...
typedef sint32(* | IfxStdIf_Pos_GetResolution) (IfxStdIf_InterfaceDriver stdIf)
Get the resolution. More...
typedef IfxStdIf_Pos_SensorType(* | IfxStdIf_Pos_GetSensorType) (IfxStdIf_InterfaceDriver stdIf)
Get the sensor type. More...
typedef float32(* | IfxStdIf_Pos_GetSpeed) (IfxStdIf_InterfaceDriver stdIf)
Return the speed. More...
typedef sint32(* | IfxStdIf_Pos_GetTurn) (IfxStdIf_InterfaceDriver stdIf)
Return position in turn. More...
typedef void(* | IfxStdIf_Pos_OnEventA) (IfxStdIf_InterfaceDriver stdIf)
Handles the A sensor event Event A is a sensor defined event. it is optional. More...
typedef void(* | IfxStdIf_Pos_Update) (IfxStdIf_InterfaceDriver stdIf)
Refresh the status. More...
typedef void(* | IfxStdIf_Pos_Reset) (IfxStdIf_InterfaceDriver stdIf)
Reset the driver. More...
typedef void(* | IfxStdIf_Pos_ResetFaults) (IfxStdIf_InterfaceDriver stdIf)
Reset the driver fault. More...
typedef void(* | IfxStdIf_Pos_SetOffset) (IfxStdIf_InterfaceDriver stdIf, sint32 offset)
Set the sensor offset. More...
typedef void(* | IfxStdIf_Pos_SetPosition) (IfxStdIf_InterfaceDriver stdIf, float32 position)
Set the sensor position (virtual sensor) More...
typedef void(* | IfxStdIf_Pos_SetRawPosition) (IfxStdIf_InterfaceDriver stdIf, sint32 position)
Set the sensor position (virtual sensor) More...
typedef void(* | IfxStdIf_Pos_SetSpeed) (IfxStdIf_InterfaceDriver stdIf, float32 speed)
Set the sensor speed (virtual sensor) More...
typedef void(* | IfxStdIf_Pos_SetRefreshPeriod) (IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod)
Set the update period. More...

Enumerations

enum IfxStdIf_Pos_MotionType {
IfxStdIf_Pos_MotionType_rotating,
IfxStdIf_Pos_MotionType_linear
}
Output event enable / disable. More...
enum IfxStdIf_Pos_ResolutionFactor {
IfxStdIf_Pos_ResolutionFactor_oneFold = 1,
IfxStdIf_Pos_ResolutionFactor_twoFold = 2,
IfxStdIf_Pos_ResolutionFactor_fourFold = 4
}
Output event enable / disable. More...
enum IfxStdIf_Pos_SensorType {
IfxStdIf_Pos_SensorType_encoder,
IfxStdIf_Pos_SensorType_hall,
IfxStdIf_Pos_SensorType_resolver,
IfxStdIf_Pos_SensorType_angletrk,
IfxStdIf_Pos_SensorType_igmr,
IfxStdIf_Pos_SensorType_virtual
}
Position sensor Types. More...
enum IfxStdIf_Pos_Dir {
IfxStdIf_Pos_Dir_forward,
IfxStdIf_Pos_Dir_backward,
IfxStdIf_Pos_Dir_unknown
}
Position sensor direction definition. More...

Functions

IFX_INLINE void | IfxStdIf_Pos_onZeroIrq (IfxStdIf_Pos *stdIf)
Handles the zero interrupt. More...
IFX_INLINE float32 | IfxStdIf_Pos_getAbsolutePosition (IfxStdIf_Pos *stdIf)
Return the position, inclusive turns. More...
IFX_INLINE IfxStdIf_Pos_Status | IfxStdIf_Pos_getFault (IfxStdIf_Pos *stdIf)
Return the sensor status. MCMETILLD-521 More...
IFX_INLINE sint32 | IfxStdIf_Pos_getOffset (IfxStdIf_Pos *stdIf)
Return the raw position sensor offset. More...
IFX_INLINE float32 | IfxStdIf_Pos_getPosition (IfxStdIf_Pos *stdIf)
Return the position. More...
IFX_INLINE IfxStdIf_Pos_Dir | IfxStdIf_Pos_getDirection (IfxStdIf_Pos *stdIf)
Return the direction. More...
IFX_INLINE uint16 | IfxStdIf_Pos_getPeriodPerRotation (IfxStdIf_Pos *stdIf)
Return the period per rotation setting. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getRawPosition (IfxStdIf_Pos *stdIf)
Return the raw position in ticks. More...
IFX_INLINE float32 | IfxStdIf_Pos_getRefreshPeriod (IfxStdIf_Pos *stdIf)
Get the update period. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getResolution (IfxStdIf_Pos *stdIf)
Get the resolution. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getTurn (IfxStdIf_Pos *stdIf)
Return position in turn. More...
IFX_INLINE IfxStdIf_Pos_SensorType | IfxStdIf_Pos_getSensorType (IfxStdIf_Pos *stdIf)
Get the sensor type. More...
IFX_INLINE float32 | IfxStdIf_Pos_getSpeed (IfxStdIf_Pos *stdIf)
Return the speed. More...
IFX_INLINE boolean | IfxStdIf_Pos_isFault (IfxStdIf_Pos *stdIf)
IFX_INLINE void | IfxStdIf_Pos_onEventA (IfxStdIf_Pos *stdIf)
Handles the A sensor event Event A is a sensor defined event. it is optional. More...
IFX_INLINE void | IfxStdIf_Pos_update (IfxStdIf_Pos *stdIf)
Refresh the status. More...
IFX_INLINE void | IfxStdIf_Pos_reset (IfxStdIf_Pos *stdIf)
Reset the driver. More...
IFX_INLINE void | IfxStdIf_Pos_resetFaults (IfxStdIf_Pos *stdIf)
Reset the driver fault. More...
IFX_INLINE void | IfxStdIf_Pos_setOffset (IfxStdIf_Pos *stdIf, sint32 offset)
Set the sensor offset. More...
IFX_INLINE void | IfxStdIf_Pos_setPosition (IfxStdIf_Pos *stdIf, float32 position)
Set the sensor position (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setRawPosition (IfxStdIf_Pos *stdIf, sint32 position)
Set the sensor position (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setSpeed (IfxStdIf_Pos *stdIf, float32 speed)
Set the sensor speed (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setRefreshPeriod (IfxStdIf_Pos *stdIf, float32 updatePeriod)
Set the update period. More...
IFX_INLINE float32 | IfxStdIf_Pos_radsToRpm (float32 speed)
Converts from rad/s to rpm. More...
IFX_INLINE float32 | IfxStdIf_Pos_rpmToRads (float32 speed)
Converts from rpm to rad/s. More...
IFX_EXTERN void | IfxStdIf_Pos_initConfig (IfxStdIf_Pos_Config *config)
IFX_EXTERN void | IfxStdIf_Pos_printStatus (IfxStdIf_Pos *driver, IfxStdIf_DPipe *io)
Print the device status. More...

Detailed Description

Standard interface: Position interface.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf_Pos.h.

Data Structure Documentation

◆ IfxStdIf_Pos_Status

union IfxStdIf_Pos_Status

Position sensor status definition.

Definition at line 100 of file IfxStdIf_Pos.h.

Data Fields
struct IfxStdIf_Pos_Status | B | Bitfielf status access.
uint32 | status | Global status access.

◆ IfxStdIf_Pos_

struct IfxStdIf_Pos_

Standard interface object.

Definition at line 283 of file IfxStdIf_Pos.h.

Collaboration diagram for IfxStdIf_Pos_:
[legend]
Data Fields
IfxStdIf_InterfaceDriver | driver | Interface driver object.
IfxStdIf_Pos_GetAbsolutePosition | getAbsolutePosition | Return the absolute position.
IfxStdIf_Pos_GetDirection getDirection
See also
IfxStdIf_Pos_GetDirection
IfxStdIf_Pos_GetFault getFault
See also
IfxStdIf_Pos_GetFault
IfxStdIf_Pos_GetOffset getOffset
See also
IfxStdIf_Pos_GetOffset
IfxStdIf_Pos_GetPeriodPerRotation getPeriodPerRotation
See also
IfxStdIf_Pos_GetPeriodPerRotation
IfxStdIf_Pos_GetPosition getPosition
See also
IfxStdIf_Pos_GetPosition
IfxStdIf_Pos_GetRawPosition getRawPosition
See also
IfxStdIf_Pos_GetRawPosition
IfxStdIf_Pos_GetRefreshPeriod getRefreshPeriod
See also
IfxStdIf_Pos_GetRefreshPeriod
IfxStdIf_Pos_GetResolution getResolution
See also
IfxStdIf_Pos_GetResolution
IfxStdIf_Pos_GetSensorType getSensorType
See also
IfxStdIf_Pos_GetSensorType
IfxStdIf_Pos_GetSpeed getSpeed
See also
IfxStdIf_Pos_GetSpeed
IfxStdIf_Pos_GetTurn getTurn
See also
IfxStdIf_Pos_GetTurn
IfxStdIf_Pos_OnEventA onEventA
See also
IfxStdIf_Pos_OnEventA
IfxStdIf_Pos_OnZeroIrq onZeroIrq
See also
IfxStdIf_Pos_OnZeroIrq
IfxStdIf_Pos_Reset reset
See also
IfxStdIf_Pos_Reset
IfxStdIf_Pos_ResetFaults resetFaults
See also
IfxStdIf_Pos_ResetFaults
IfxStdIf_Pos_SetOffset setOffset
See also
IfxStdIf_Pos_SetOffset
IfxStdIf_Pos_SetPosition setPosition
See also
IfxStdIf_Pos_SetPosition
IfxStdIf_Pos_SetRawPosition setRawPosition
See also
IfxStdIf_Pos_SetRawPosition
IfxStdIf_Pos_SetRefreshPeriod setRefreshPeriod
See also
IfxStdIf_Pos_SetRefreshPeriod
IfxStdIf_Pos_SetSpeed setSpeed
See also
IfxStdIf_Pos_SetSpeed
IfxStdIf_Pos_Update update
See also
IfxStdIf_Pos_Update

◆ IfxStdIf_Pos_Config

struct IfxStdIf_Pos_Config

Position interface configuration.

Definition at line 311 of file IfxStdIf_Pos.h.

Data Fields
float32 | maxSpeed | Absolute maximal allowed speed. Above speed is recognized as error.
float32 | minSpeed | Absolute minimal allowed speed. below speed is recognized as 0rad/s.
sint32 | offset | Position sensor offset.
uint16 | periodPerRotation | Number of period per rotation. Is usually 1 for encoder.
sint32 | resolution | Sensor resolution. For encoder with 1024 pulse per revolution, the value should be 1024.
IfxStdIf_Pos_ResolutionFactor | resolutionFactor | Resolution multiplier for encoder interface, valid is 2, 4.
boolean | reversed | If true, the sensor direction is reversed.
float32 | speedFilerCutOffFrequency | Speed low pass filter cut off frequency.
boolean | speedFilterEnabled | Enable / disable the speed low pass filter.
float32 | speedModeThreshold | Speed threshold used for the speed calculation mode. For encoder, above the threshold the pulse count mode is used, below the threshold, the time delta is used.
float32 | updatePeriod | period in seconds, at which the application calls IfxStdIf_Pos_update()

◆ IfxStdIf_Pos_Status.B

struct IfxStdIf_Pos_Status.B

Definition at line 103 of file IfxStdIf_Pos.h.

Data Fields
uint32 | commError: 1 | Communication error.
uint32 | notSynchronised: 1 | Sensor is not synchronized.
uint32 | signalDegradation: 1 | Signal degradation warning.
uint32 | signalLoss: 1 | Loss of signal error.
uint32 | trackingLoss: 1 | Tracking loss error.

Typedef Documentation

◆ IfxStdIf_Pos

typedef struct IfxStdIf_Pos_ IfxStdIf_Pos

Forward declaration.

Definition at line 116 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetAbsolutePosition

typedef float32(* IfxStdIf_Pos_GetAbsolutePosition) (IfxStdIf_InterfaceDriver stdIf)

Return the position, inclusive turns.

Return the sensor position in rad for rotating sensor inclusive turns, or in m for linear sensors. For linear sensor the effect is the same as IfxStdIf_Pos_GetPosition.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the position inclusive turns in rad

Definition at line 126 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetDirection

typedef IfxStdIf_Pos_Dir(* IfxStdIf_Pos_GetDirection) (IfxStdIf_InterfaceDriver stdIf)

Return the direction.

Return the sensor direction.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the direction

Definition at line 158 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetFault

typedef IfxStdIf_Pos_Status(* IfxStdIf_Pos_GetFault) (IfxStdIf_InterfaceDriver stdIf)

Return the sensor status.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the sensor status

Definition at line 165 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetOffset

typedef sint32(* IfxStdIf_Pos_GetOffset) (IfxStdIf_InterfaceDriver stdIf)

Return the raw position sensor offset.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the raw position sensor offset sensor in ticks

Definition at line 139 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetPeriodPerRotation

typedef uint16(* IfxStdIf_Pos_GetPeriodPerRotation) (IfxStdIf_InterfaceDriver stdIf)

Return the period per rotation setting.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the period per rotation setting

Definition at line 172 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetPosition

typedef float32(* IfxStdIf_Pos_GetPosition) (IfxStdIf_InterfaceDriver stdIf)

Return the position.

Return the sensor position in rad for rotating sensor or in m for linear sensors. For rotating sensor, the position is always between 0 and 2*IFX_PI.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the position in rad or m

Definition at line 149 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetRawPosition

typedef sint32(* IfxStdIf_Pos_GetRawPosition) (IfxStdIf_InterfaceDriver stdIf)

Return the raw position in ticks.

Return the sensor raw position in ticks.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the raw position in ticks

Definition at line 181 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetRefreshPeriod

typedef float32(* IfxStdIf_Pos_GetRefreshPeriod) (IfxStdIf_InterfaceDriver stdIf)

Get the update period.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the update period in s

Definition at line 187 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetResolution

typedef sint32(* IfxStdIf_Pos_GetResolution) (IfxStdIf_InterfaceDriver stdIf)

Get the resolution.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the resolution

Definition at line 193 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetSensorType

typedef IfxStdIf_Pos_SensorType(* IfxStdIf_Pos_GetSensorType) (IfxStdIf_InterfaceDriver stdIf)

Get the sensor type.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the sensor type

Definition at line 199 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetSpeed

typedef float32(* IfxStdIf_Pos_GetSpeed) (IfxStdIf_InterfaceDriver stdIf)

Return the speed.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the speed in rad/s or m/s

Definition at line 205 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetTurn

typedef sint32(* IfxStdIf_Pos_GetTurn) (IfxStdIf_InterfaceDriver stdIf)

Return position in turn.

Parameters
stdIf Pointer to the interface driver object
Returns
Return position in turn

Definition at line 211 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_OnEventA

typedef void(* IfxStdIf_Pos_OnEventA) (IfxStdIf_InterfaceDriver stdIf)

Handles the A sensor event Event A is a sensor defined event. it is optional.

Parameters
stdIf Pointer to the interface driver object
Returns
none

Definition at line 218 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_OnZeroIrq

typedef void(* IfxStdIf_Pos_OnZeroIrq) (IfxStdIf_InterfaceDriver stdIf)

Handles the zero interrupt.

Parameters
stdIf Pointer to the interface driver object
Returns
none

Definition at line 132 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_RawAngle

typedef sint32 IfxStdIf_Pos_RawAngle

Definition at line 113 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_Reset

typedef void(* IfxStdIf_Pos_Reset) (IfxStdIf_InterfaceDriver stdIf)

Reset the driver.

Clear faults, reset speed and position to 0

Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 236 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_ResetFaults

typedef void(* IfxStdIf_Pos_ResetFaults) (IfxStdIf_InterfaceDriver stdIf)

Reset the driver fault.

Clear faults

Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 245 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SetOffset

typedef void(* IfxStdIf_Pos_SetOffset) (IfxStdIf_InterfaceDriver stdIf, sint32 offset)

Set the sensor offset.

Parameters
stdIf | Pointer to the interface driver object
offset | Offset in sensor ticks
Returns
None

Definition at line 252 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SetPosition

typedef void(* IfxStdIf_Pos_SetPosition) (IfxStdIf_InterfaceDriver stdIf, float32 position)

Set the sensor position (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
position | Position sensor rad
Returns
None

Definition at line 259 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SetRawPosition

typedef void(* IfxStdIf_Pos_SetRawPosition) (IfxStdIf_InterfaceDriver stdIf, sint32 position)

Set the sensor position (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
position | Position sensor ticks
Returns
None

Definition at line 265 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SetRefreshPeriod

typedef void(* IfxStdIf_Pos_SetRefreshPeriod) (IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod)

Set the update period.

Parameters
stdIf | Pointer to the interface driver object
updatePeriod | Refresh period in s
Returns
None

Definition at line 279 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SetSpeed

typedef void(* IfxStdIf_Pos_SetSpeed) (IfxStdIf_InterfaceDriver stdIf, float32 speed)

Set the sensor speed (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
speed | speed in rad/s
Returns
None

Definition at line 272 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_Update

typedef void(* IfxStdIf_Pos_Update) (IfxStdIf_InterfaceDriver stdIf)

Refresh the status.

Update the stdIf state like speed, position, status, taking into account the updatePeriod

Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 227 of file IfxStdIf_Pos.h.

Enumeration Type Documentation

◆ IfxStdIf_Pos_Dir

enum IfxStdIf_Pos_Dir

Position sensor direction definition.

Enumerator
IfxStdIf_Pos_Dir_forward | Forward direction. For rotating position sensor, forward is clockwise rotation.
IfxStdIf_Pos_Dir_backward | Backward direction. For rotating position sensor, fackward is counter-clockwise rotation.
IfxStdIf_Pos_Dir_unknown | Unknown direction.

Definition at line 92 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_MotionType

enum IfxStdIf_Pos_MotionType

Output event enable / disable.

Enumerator
IfxStdIf_Pos_MotionType_rotating | Rotating sensor.
IfxStdIf_Pos_MotionType_linear | Linear sensor.

Definition at line 66 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_ResolutionFactor

enum IfxStdIf_Pos_ResolutionFactor

Output event enable / disable.

Enumerator
IfxStdIf_Pos_ResolutionFactor_oneFold | Default, no multipluication factor.
IfxStdIf_Pos_ResolutionFactor_twoFold | 2-fold resolution. Valid for encoder
IfxStdIf_Pos_ResolutionFactor_fourFold | 4-fold resolution. Valid for encoder

Definition at line 73 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SensorType

enum IfxStdIf_Pos_SensorType

Position sensor Types.

Enumerator
IfxStdIf_Pos_SensorType_encoder
IfxStdIf_Pos_SensorType_hall
IfxStdIf_Pos_SensorType_resolver
IfxStdIf_Pos_SensorType_angletrk
IfxStdIf_Pos_SensorType_igmr
IfxStdIf_Pos_SensorType_virtual

Definition at line 81 of file IfxStdIf_Pos.h.

Function Documentation

◆ IfxStdIf_Pos_initConfig()

IFX_EXTERN void IfxStdIf_Pos_initConfig ( IfxStdIf_Pos_Config * config )

Initialize the configuration structure to default

Parameters
config Position interface configuration. This parameter is initialized by the function

Definition at line 45 of file IfxStdIf_Pos.c.

Referenced by IfxGpt12_IncrEnc_initConfig().

◆ IfxStdIf_Pos_printStatus()

IFX_EXTERN void IfxStdIf_Pos_printStatus | ( | IfxStdIf_Pos * | driver,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Print the device status.

Parameters
driver | driver handle
io | Interface to which the status is output
Returns
none

Definition at line 61 of file IfxStdIf_Pos.c.

◆ IfxStdIf_Pos_radsToRpm()

IFX_INLINE float32 IfxStdIf_Pos_radsToRpm ( float32 speed )

Converts from rad/s to rpm.

Parameters
speed Specifies the speed in rad/s.
Returns
returns the converted speed in rpm.
See also
IfxStdIf_Pos_rpmToRads()

Definition at line 545 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_rpmToRads()

IFX_INLINE float32 IfxStdIf_Pos_rpmToRads ( float32 speed )

Converts from rpm to rad/s.

Parameters
speed Specifies the speed in rpm.
Returns
returns the converted speed in rad/s.
See also
IfxStdIf_Pos_radsToRpm()

Definition at line 558 of file IfxStdIf_Pos.h.


iLLD_TC26B: IfxStdIf_PwmHl.h File Reference

  • Service
  • CpuGeneric
  • StdIf
Data Structures | Typedefs | Functions
IfxStdIf_PwmHl.h File Reference

Standard interface: Multi-channels, dual-complementary PWM interface. More...

#include "IfxStdIf.h"
#include "IfxStdIf_Timer.h"
Include dependency graph for IfxStdIf_PwmHl.h:

Go to the source code of this file.

Data Structures

struct | IfxStdIf_PwmHl_
Standard interface object. More...
struct | IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration. More...

Typedefs

typedef struct IfxStdIf_PwmHl_ | IfxStdIf_PwmHl
Forward declaration. More...
typedef boolean(* | IfxStdIf_PwmHl_SetDeadtime) (IfxStdIf_InterfaceDriver stdIf, float32 deadtime)
Set the dead time in s. More...
typedef float32(* | IfxStdIf_PwmHl_GetDeadtime) (IfxStdIf_InterfaceDriver stdIf)
Return the dead time in s. More...
typedef float32(* | IfxStdIf_PwmHl_GetDeadtimeTick) (IfxStdIf_InterfaceDriver stdIf)
Return the dead time ticks in s. More...
typedef boolean(* | IfxStdIf_PwmHl_SetMinPulse) (IfxStdIf_InterfaceDriver stdIf, float32 minPulse)
Set the minimum pulse time in s. More...
typedef float32(* | IfxStdIf_PwmHl_GetMinPulse) (IfxStdIf_InterfaceDriver stdIf)
Return the minimum pulse time in s. More...
typedef Ifx_Pwm_Mode(* | IfxStdIf_PwmHl_GetMode) (IfxStdIf_InterfaceDriver stdIf)
Return the PWM mode. More...
typedef boolean(* | IfxStdIf_PwmHl_SetMode) (IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode. More...
typedef void(* | IfxStdIf_PwmHl_SetOnTime) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time. More...
typedef void(* | IfxStdIf_PwmHl_SetOnTimeAndShift) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value. More...
typedef void(* | IfxStdIf_PwmHl_SetPulse) (IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently. More...
typedef void(* | IfxStdIf_PwmHl_SetupChannels) (IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...

Functions

IFX_INLINE boolean | IfxStdIf_PwmHl_setDeadtime (IfxStdIf_PwmHl *stdIf, float32 deadtime)
Set the dead time in s. More...
IFX_INLINE float32 | IfxStdIf_PwmHl_getDeadtimetick (IfxStdIf_PwmHl *stdIf)
Set the dead time in s. More...
IFX_INLINE float32 | IfxStdIf_PwmHl_getDeadtime (IfxStdIf_PwmHl *stdIf)
Return the dead time in s. More...
IFX_INLINE boolean | IfxStdIf_PwmHl_setMinPulse (IfxStdIf_PwmHl *stdIf, float32 minPulse)
Set the minimum pulse time in s. More...
IFX_INLINE float32 | IfxStdIf_PwmHl_getMinPulse (IfxStdIf_PwmHl *stdIf)
Return the minimum pulse time in s. More...
IFX_INLINE Ifx_Pwm_Mode | IfxStdIf_PwmHl_getMode (IfxStdIf_PwmHl *stdIf)
Return the PWM mode. More...
IFX_INLINE boolean | IfxStdIf_PwmHl_setMode (IfxStdIf_PwmHl *stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode. More...
IFX_INLINE void | IfxStdIf_PwmHl_setOnTime (IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time. More...
IFX_INLINE void | IfxStdIf_PwmHl_setOnTimeAndShift (IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value. More...
IFX_INLINE void | IfxStdIf_PwmHl_setPulse (IfxStdIf_PwmHl *stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently. More...
IFX_INLINE void | IfxStdIf_PwmHl_setupChannels (IfxStdIf_PwmHl *stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...
IFX_INLINE IfxStdIf_Timer * | IfxStdIf_PwmHl_getTimer (IfxStdIf_PwmHl *stdIf)
Return the timer standard interface used by the IfxStdIf_PwmHl standard interface. More...
IFX_EXTERN void | IfxStdIf_PwmHl_initConfig (IfxStdIf_PwmHl_Config *config)

Detailed Description

Standard interface: Multi-channels, dual-complementary PWM interface.

Version
disabled
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf_PwmHl.h.

Data Structure Documentation

◆ IfxStdIf_PwmHl_

struct IfxStdIf_PwmHl_

Standard interface object.

Definition at line 179 of file IfxStdIf_PwmHl.h.

Collaboration diagram for IfxStdIf_PwmHl_:
[legend]
Data Fields
IfxStdIf_InterfaceDriver | driver | Interface driver object.
IfxStdIf_PwmHl_GetDeadtime | getDeadtime | IfxStdIf_PwmHl_GetDeadtime.
IfxStdIf_PwmHl_GetDeadtimeTick | getDeadtimeTick | IfxStdIf_PwmHl_GetDeadtimetick
IfxStdIf_PwmHl_GetMinPulse | getMinPulse | IfxStdIf_PwmHl_GetMinPulse.
IfxStdIf_PwmHl_GetMode | getMode | IfxStdIf_PwmHl_GetMode.
IfxStdIf_PwmHl_SetDeadtime | setDeadtime | IfxStdIf_PwmHl_SetDeadtime.
IfxStdIf_PwmHl_SetMinPulse | setMinPulse | IfxStdIf_PwmHl_SetMinPulse.
IfxStdIf_PwmHl_SetMode | setMode | IfxStdIf_PwmHl_SetMode.
IfxStdIf_PwmHl_SetOnTime | setOnTime | IfxStdIf_PwmHl_SetOnTime.
IfxStdIf_PwmHl_SetOnTimeAndShift | setOnTimeAndShift | IfxStdIf_PwmHl_SetOnTime.
IfxStdIf_PwmHl_SetPulse | setPulse | IfxStdIf_PwmHl_Pulse.
IfxStdIf_PwmHl_SetupChannels | setupChannels | IfxStdIf_PwmHl_SetupChannels.
IfxStdIf_Timer | timer | Timer related standard interface.

◆ IfxStdIf_PwmHl_Config

struct IfxStdIf_PwmHl_Config

Multi-channels PWM object configuration.

Definition at line 200 of file IfxStdIf_PwmHl.h.

Data Fields
Ifx_ActiveState | ccxActiveState | Top PWM active state.
Ifx_ActiveState | ccxOutputEnabled |
uint8 | channelCount | Number of PWM channels, one channel is made of a top and bottom channel.
Ifx_ActiveState | coutxActiveState | Bottom PWM active state.
Ifx_ActiveState | coutxOutputEnabled |
float32 | deadtime | Dead time between the top and bottom channels in seconds.
boolean | emergencyEnabled | Specifies if the emergency stop should be enabled or not.
float32 | minPulse | Min pulse allowed as active state for the top and bottom PWM in seconds.
IfxPort_PadDriver | outputDriver | Output pad driver of ccx and coutx pins.
IfxPort_OutputMode | outputMode | Output mode of ccx and coutx pins.

Typedef Documentation

◆ IfxStdIf_PwmHl

typedef struct IfxStdIf_PwmHl_ IfxStdIf_PwmHl

Forward declaration.

Definition at line 78 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_GetDeadtime

typedef float32(* IfxStdIf_PwmHl_GetDeadtime) (IfxStdIf_InterfaceDriver stdIf)

Return the dead time in s.

It returns the last dead time values set by IfxStdIf_PwmHl_SetDeadtime() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the deadtime in second

Definition at line 94 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_GetDeadtimeTick

typedef float32(* IfxStdIf_PwmHl_GetDeadtimeTick) (IfxStdIf_InterfaceDriver stdIf)

Return the dead time ticks in s.

It returns the last dead time tick values set by IfxStdIf_PwmHl_SetDeadtime() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the deadtime in second

Definition at line 102 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_GetMinPulse

typedef float32(* IfxStdIf_PwmHl_GetMinPulse) (IfxStdIf_InterfaceDriver stdIf)

Return the minimum pulse time in s.

It returns the last minimum pulse time values set by IfxStdIf_PwmHl_SetMinPulse() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the minimum pulse time in second

Definition at line 117 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_GetMode

typedef Ifx_Pwm_Mode(* IfxStdIf_PwmHl_GetMode) (IfxStdIf_InterfaceDriver stdIf)

Return the PWM mode.

It returns the last pwm mode set by IfxStdIf_PwmHl_SetMode() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the pwm mode

Definition at line 125 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetDeadtime

typedef boolean(* IfxStdIf_PwmHl_SetDeadtime) (IfxStdIf_InterfaceDriver stdIf, float32 deadtime)

Set the dead time in s.

Parameters
stdIf | Pointer to the interface driver object
deadtime | deadtime in second
Return values
TRUE | In case of success
FALSE | In case of failure

Definition at line 86 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetMinPulse

typedef boolean(* IfxStdIf_PwmHl_SetMinPulse) (IfxStdIf_InterfaceDriver stdIf, float32 minPulse)

Set the minimum pulse time in s.

Parameters
stdIf | Pointer to the interface driver object
minPulse | minimal pulse in second
Return values
TRUE | In case of success
FALSE | In case of failure

Definition at line 109 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetMode

typedef boolean(* IfxStdIf_PwmHl_SetMode) (IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)

Set the pwm mode.

Parameters
stdIf | Pointer to the interface driver object
mode | PWM mode
Return values
TRUE | In case of success
FALSE | In case of failure (feature not supported)

Definition at line 133 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetOnTime

typedef void(* IfxStdIf_PwmHl_SetOnTime) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)

Set the pwm ON time.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
Returns
none

Definition at line 140 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetOnTimeAndShift

typedef void(* IfxStdIf_PwmHl_SetOnTimeAndShift) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)

Set the pwm ON time and shift value.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
shift | Pointer to an array of shift values in ticks. The array size must be equal to the number of PWM channels
Returns
none

Definition at line 148 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetPulse

typedef void(* IfxStdIf_PwmHl_SetPulse) (IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset)

Set the pwm pulse of all switched independently.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Pointer to an array of offset values in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
none

Definition at line 156 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetupChannels

typedef void(* IfxStdIf_PwmHl_SetupChannels) (IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)

Set channels which are generating PWM or in "stuck-at" state.

Parameters
stdIf | Pointer to the interface driver object
activeCh | Pointer to boolean array containing values for PWM channels. If FALSE, the channel will be in stuck-at state, else the channel will generate PWM.
stuckSt | Pointer to boolean array containing values for active channels. If FALSE, the stuck-at state is passive level, else the stuck-at state is active level.
Note
The values for the parameters are arranged as follows: index = 0 –> phase 0 top index = 1 –> phase 0 bottom index = 2 –> phase 1 top index = 3 –> phase 1 bottom index = 4 –> phase 2 top index = 5 –> phase 2 bottom

Definition at line 175 of file IfxStdIf_PwmHl.h.


iLLD_TC26B: IfxStdIf_Timer.h File Reference

  • Service
  • CpuGeneric
  • StdIf
Data Structures | Typedefs | Enumerations | Functions
IfxStdIf_Timer.h File Reference

Standard interface: Timer. More...

#include "Cpu/Std/Ifx_Types.h"
#include "Src/Std/IfxSrc.h"
#include "Port/Std/IfxPort.h"
#include "IfxStdIf.h"
Include dependency graph for IfxStdIf_Timer.h:

Go to the source code of this file.

Data Structures

struct | IfxStdIf_Timer_
Standard interface object. More...
struct | IfxStdIf_Timer_TrigConfig
Trigger configuration. More...
struct | IfxStdIf_Timer_Config
Timer configuration. More...

Typedefs

typedef struct IfxStdIf_Timer_ | IfxStdIf_Timer
Forward declaration. More...
typedef float32(* | IfxStdIf_Timer_GetFrequency) (IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz. More...
typedef Ifx_TimerValue(* | IfxStdIf_Timer_GetPeriod) (IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks. More...
typedef float32(* | IfxStdIf_Timer_GetResolution) (IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds. More...
typedef Ifx_TimerValue(* | IfxStdIf_Timer_GetTrigger) (IfxStdIf_InterfaceDriver stdIf)
Return the timer trigger point. More...
typedef boolean(* | IfxStdIf_Timer_SetFrequency) (IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz. More...
typedef void(* | IfxStdIf_Timer_UpdateInputFrequency) (IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account. More...
typedef void(* | IfxStdIf_Timer_ApplyUpdate) (IfxStdIf_InterfaceDriver stdIf)
Apply requested updates. More...
typedef void(* | IfxStdIf_Timer_DisableUpdate) (IfxStdIf_InterfaceDriver stdIf)
Disable updates. More...
typedef float32(* | IfxStdIf_Timer_GetInputFrequency) (IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz. More...
typedef void(* | IfxStdIf_Timer_Run) (IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer. More...
typedef boolean(* | IfxStdIf_Timer_SetPeriod) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period. More...
typedef void(* | IfxStdIf_Timer_SetSingleMode) (IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period. More...
typedef void(* | IfxStdIf_Timer_SetTrigger) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
Set trigger point. More...
typedef void(* | IfxStdIf_Timer_Stop) (IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer. More...
typedef boolean(* | IfxStdIf_Timer_AckTimerIrq) (IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it. More...
typedef boolean(* | IfxStdIf_Timer_AckTriggerIrq) (IfxStdIf_InterfaceDriver stdIf)
Return the trigger interrupt flag and reset it. More...

Enumerations

enum IfxStdIf_Timer_OutputEvent {
IfxStdIf_Timer_Output_disabled,
IfxStdIf_Timer_Output_enabled
}
Output event enable / disable. More...
enum IfxStdIf_Timer_CountDir {
IfxStdIf_Timer_CountDir_up,
IfxStdIf_Timer_CountDir_upAndDown,
IfxStdIf_Timer_CountDir_down
}
Timer increment direction. More...

Functions

IFX_INLINE float32 | IfxStdIf_Timer_getFrequency (IfxStdIf_Timer *stdIf)
Return the timer frequency in Hz. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_getPeriod (IfxStdIf_Timer *stdIf)
Return the timer period in ticks. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_getTrigger (IfxStdIf_Timer *stdIf)
Return the timer trigger point. More...
IFX_INLINE float32 | IfxStdIf_Timer_getResolution (IfxStdIf_Timer *stdIf)
Return the timer resolution in seconds. More...
IFX_INLINE boolean | IfxStdIf_Timer_setFrequency (IfxStdIf_Timer *stdIf, float32 frequency)
Set the timer frequency in Hz. More...
IFX_INLINE void | IfxStdIf_Timer_updateInputFrequency (IfxStdIf_Timer *stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account. More...
IFX_INLINE void | IfxStdIf_Timer_applyUpdate (IfxStdIf_Timer *stdIf)
Apply requested updates. More...
IFX_INLINE void | IfxStdIf_Timer_disableUpdate (IfxStdIf_Timer *stdIf)
Disable updates. More...
IFX_INLINE float32 | IfxStdIf_Timer_getInputFrequency (IfxStdIf_Timer *stdIf)
Return the timer input frequency in Hz. More...
IFX_INLINE void | IfxStdIf_Timer_run (IfxStdIf_Timer *stdIf)
Immediately start the timer. More...
IFX_INLINE boolean | IfxStdIf_Timer_setPeriod (IfxStdIf_Timer *stdIf, Ifx_TimerValue period)
Set the timer period. More...
IFX_INLINE void | IfxStdIf_Timer_setSingleMode (IfxStdIf_Timer *stdIf, boolean enabled)
Stop timer at the end of the period. More...
IFX_INLINE void | IfxStdIf_Timer_setTrigger (IfxStdIf_Timer *stdIf, Ifx_TimerValue triggerPoint)
Set trigger point. More...
IFX_INLINE void | IfxStdIf_Timer_stop (IfxStdIf_Timer *stdIf)
Immediately stops the timer. More...
IFX_INLINE boolean | IfxStdIf_Timer_ackTimerIrq (IfxStdIf_Timer *stdIf)
Return the timer interrupt flag and reset it. More...
IFX_INLINE boolean | IfxStdIf_Timer_ackTriggerIrq (IfxStdIf_Timer *stdIf)
Return the trigger interrupt flag and reset it. More...
IFX_INLINE float32 | IfxStdIf_Timer_tickToS (float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_sToTick (float32 clockFreq, float32 seconds)
Convert seconds to timer ticks. More...
IFX_INLINE float32 | IfxStdIf_Timer_getPeriodSecond (IfxStdIf_Timer *stdIf)
Return the timer period in second. More...
IFX_EXTERN void | IfxStdIf_Timer_initConfig (IfxStdIf_Timer_Config *config)
IFX_EXTERN void | IfxStdIf_Timer_initStdIf (IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)

Detailed Description

Standard interface: Timer.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf_Timer.h.

Data Structure Documentation

◆ IfxStdIf_Timer_

struct IfxStdIf_Timer_

Standard interface object.

Definition at line 237 of file IfxStdIf_Timer.h.

Data Fields
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
See also
IfxStdIf_Timer_AckTimerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
See also
IfxStdIf_Timer_AckTriggerIrq
IfxStdIf_Timer_ApplyUpdate applyUpdate
See also
IfxStdIf_Timer_ApplyUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
See also
IfxStdIf_Timer_DisableUpdate
IfxStdIf_InterfaceDriver driver Interface driver object.
IfxStdIf_Timer_GetFrequency getFrequency
See also
IfxStdIf_Timer_GetFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
See also
IfxStdIf_Timer_GetInputFrequency
IfxStdIf_Timer_GetPeriod getPeriod
See also
IfxStdIf_Timer_GetPeriod
IfxStdIf_Timer_GetResolution getResolution
See also
IfxStdIf_Timer_GetResolution
IfxStdIf_Timer_GetTrigger getTrigger
See also
IfxStdIf_Timer_GetTrigger
IfxStdIf_Timer_Run run
See also
IfxStdIf_Timer_Run
IfxStdIf_Timer_SetFrequency setFrequency
See also
IfxStdIf_Timer_SetFrequency
IfxStdIf_Timer_SetPeriod setPeriod
See also
IfxStdIf_Timer_SetPeriod
IfxStdIf_Timer_SetSingleMode setSingleMode
See also
IfxStdIf_Timer_SetSingleMode
IfxStdIf_Timer_SetTrigger setTrigger
See also
IfxStdIf_Timer_SetTrigger
IfxStdIf_Timer_Stop stop
See also
IfxStdIf_Timer_Stop
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
See also
IfxStdIf_Timer_UpdateInputFrequency

◆ IfxStdIf_Timer_TrigConfig

struct IfxStdIf_Timer_TrigConfig

Trigger configuration.

Definition at line 259 of file IfxStdIf_Timer.h.

Data Fields
boolean | enabled | If true, the trigger functionality is Initialised, else ignored.
Ifx_Priority | isrPriority | Interrupt isrPriority of the trigger interrupt, if 0 the interrupt is disable.
IfxSrc_Tos | isrProvider | Interrupt service provider for the trigger interrupt.
IfxPort_PadDriver | outputDriver | Output pad driver.
boolean | outputEnabled | If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
IfxPort_OutputMode | outputMode | Output mode.
boolean | risingEdgeAtPeriod | Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset. When the timer is stopped, the output is set to high.
Ifx_TimerValue | triggerPoint | Trigger point in timer ticks.

◆ IfxStdIf_Timer_Config

struct IfxStdIf_Timer_Config

Timer configuration.

Definition at line 272 of file IfxStdIf_Timer.h.

Collaboration diagram for IfxStdIf_Timer_Config:
[legend]
Data Fields
IfxStdIf_Timer_CountDir | countDir | Timer counting mode.
float32 | frequency | PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Ifx_Priority | isrPriority | Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
IfxSrc_Tos | isrProvider | Interrupt service provider for the timer interrupt.
float32 | minResolution | Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration does not enable this setting a warning is given.
float32 | startOffset | FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
IfxStdIf_Timer_TrigConfig | trigger | Trigger configuration.

Typedef Documentation

◆ IfxStdIf_Timer

typedef struct IfxStdIf_Timer_ IfxStdIf_Timer

Forward declaration.

Definition at line 93 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_AckTimerIrq

typedef boolean(* IfxStdIf_Timer_AckTimerIrq) (IfxStdIf_InterfaceDriver stdIf)

Return the timer interrupt flag and reset it.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer interrupt flag

Definition at line 227 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_AckTriggerIrq

typedef boolean(* IfxStdIf_Timer_AckTriggerIrq) (IfxStdIf_InterfaceDriver stdIf)

Return the trigger interrupt flag and reset it.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the trigger interrupt flag

Definition at line 233 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_ApplyUpdate

typedef void(* IfxStdIf_Timer_ApplyUpdate) (IfxStdIf_InterfaceDriver stdIf)

Apply requested updates.

Such requested update are calls to:

  • IfxStdIf_Timer_setSingleMode()
  • IfxStdIf_Timer_setTrigger()
  • IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency() as well as PWM generation related calls such as:
  • IfxStdIf_PwmHl_setDeadtime()
  • IfxStdIf_PwmHl_setMode()
  • IfxStdIf_PwmHl_setOnTime()
  • IfxStdIf_PwmHl_setupChannels()

It is important to note, that only one call to Timer_applyUpdate() is allowed within one timer period!!! In order to ensure correct update synchronisation, disableUpdate() should have been called previously.

Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 152 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_DisableUpdate

typedef void(* IfxStdIf_Timer_DisableUpdate) (IfxStdIf_InterfaceDriver stdIf)

Disable updates.

The following API action will not be taken in account before applyUpdate is called:

  • IfxStdIf_Timer_setSingleMode()
  • IfxStdIf_Timer_setTrigger()
  • IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency() as well as PWM generation related calls such as:
  • IfxStdIf_PwmHl_setDeadtime()
  • IfxStdIf_PwmHl_setMode()
  • IfxStdIf_PwmHl_setOnTime()
  • IfxStdIf_PwmHl_setupChannels()
Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 169 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_GetFrequency

typedef float32(* IfxStdIf_Timer_GetFrequency) (IfxStdIf_InterfaceDriver stdIf)

Return the timer frequency in Hz.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer frequency in Hz

Definition at line 99 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_GetInputFrequency

typedef float32(* IfxStdIf_Timer_GetInputFrequency) (IfxStdIf_InterfaceDriver stdIf)

Return the timer input frequency in Hz.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer input frequency in Hz

Definition at line 175 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_GetPeriod

typedef Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod) (IfxStdIf_InterfaceDriver stdIf)

Return the timer period in ticks.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer period in ticks

Definition at line 105 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_GetResolution

typedef float32(* IfxStdIf_Timer_GetResolution) (IfxStdIf_InterfaceDriver stdIf)

Return the timer resolution in seconds.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer resolution in seconds

Definition at line 111 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_GetTrigger

typedef Ifx_TimerValue(* IfxStdIf_Timer_GetTrigger) (IfxStdIf_InterfaceDriver stdIf)

Return the timer trigger point.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer timer point

Definition at line 117 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_Run

typedef void(* IfxStdIf_Timer_Run) (IfxStdIf_InterfaceDriver stdIf)

Immediately start the timer.

Please note that other mechanism may avoid the timer to tick, such as when the global (input) clock to the timer block is inactive.

Parameters
stdIf Pointer to the interface driver object
Returns
none

Definition at line 184 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_SetFrequency

typedef boolean(* IfxStdIf_Timer_SetFrequency) (IfxStdIf_InterfaceDriver stdIf, float32 frequency)

Set the timer frequency in Hz.

Parameters
stdIf | Pointer to the interface driver object
frequency | Requested timer frequency in Hz
Return values
TRUE | The requested frequency could be set
FALSE | The requested frequency is out of range

Definition at line 125 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_SetPeriod

typedef boolean(* IfxStdIf_Timer_SetPeriod) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)

Set the timer period.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
period | Period value in ticks
Return values
TRUE | The requested period could be set
FALSE | The requested period is out of range

Definition at line 194 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_SetSingleMode

typedef void(* IfxStdIf_Timer_SetSingleMode) (IfxStdIf_InterfaceDriver stdIf, boolean enabled)

Stop timer at the end of the period.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
enabled | If TRUE, enable the single mode, else disable the single mode (continuous mode)
Returns
none

Definition at line 203 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_SetTrigger

typedef void(* IfxStdIf_Timer_SetTrigger) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)

Set trigger point.

See also
Timer_OutputEvent for the definition of the output level. Active state is defined by Timer_Config::outputActiveState.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
triggerPoint | Trigger point in ticks from the period start.
Returns
none

Definition at line 215 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_Stop

typedef void(* IfxStdIf_Timer_Stop) (IfxStdIf_InterfaceDriver stdIf)

Immediately stops the timer.

Parameters
stdIf Pointer to the interface driver object
Returns
none

Definition at line 221 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_UpdateInputFrequency

typedef void(* IfxStdIf_Timer_UpdateInputFrequency) (IfxStdIf_InterfaceDriver stdIf)

Indicates the stdIf that the imput frequency has changed and that it should be taken in account.

Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 131 of file IfxStdIf_Timer.h.

Enumeration Type Documentation

◆ IfxStdIf_Timer_CountDir

enum IfxStdIf_Timer_CountDir

Timer increment direction.

Enumerator
IfxStdIf_Timer_CountDir_up | Timer is counting up.
IfxStdIf_Timer_CountDir_upAndDown | Timer is counting up and down.
IfxStdIf_Timer_CountDir_down | Timer is counting down.

Definition at line 85 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_OutputEvent

enum IfxStdIf_Timer_OutputEvent

Output event enable / disable.

Enumerator
IfxStdIf_Timer_Output_disabled | Timer output is set to the inactive, no change in the output.
IfxStdIf_Timer_Output_enabled | In case the trigger is enabled, the output is set to active between time 0 to the trigger point, and is set to inactive between the trigger point and the period. In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_up, the output is toggled when the timer is reset In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_down, the output is toggled when the timer is reloaded In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_upAndDown, the output is toggled when the timer reach 0 In case the trigger is enabled the trigger is active before the trigger point and inactive after the trigger point.

Definition at line 71 of file IfxStdIf_Timer.h.

Function Documentation

◆ IfxStdIf_Timer_initConfig()

IFX_EXTERN void IfxStdIf_Timer_initConfig ( IfxStdIf_Timer_Config * config )

Initialize the configuration structure to default

Parameters
config Timer configuration. This parameter is initialised by the function

Definition at line 45 of file IfxStdIf_Timer.c.

Referenced by IfxCcu6_TimerWithTrigger_initConfig(), IfxGtm_Atom_Timer_initConfig(), IfxGtm_Tom_Timer_initConfig(), and IfxStm_Timer_initConfig().

◆ IfxStdIf_Timer_initStdIf()

IFX_EXTERN void IfxStdIf_Timer_initStdIf | ( | IfxStdIf_Timer * | stdIf,
 |  | IfxStdIf_InterfaceDriver | driver
 | ) |  |

Initialize the stdIf so that all call back function default to no operation

Parameters
stdIf | Pointer to the interface driver object
driver | Interface driver object

Definition at line 143 of file IfxStdIf_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().


iLLD_TC26B: PwmHl.h File Reference

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Data Structures | Typedefs
PwmHl.h File Reference

Multi-channels, dual-complementary PWM interface. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for PwmHl.h:

Go to the source code of this file.

Data Structures

struct | PwmHl_Functions
struct | PwmHl_s
Structure of the TPwm interface. More...
struct | PwmHl_Config
Configuration structure of the TPwm interface. More...

Typedefs

typedef struct PwmHl_s | PwmHl
typedef void(* | PwmHl_Start) (PwmHl *handle)
typedef void(* | PwmHl_Pause) (PwmHl *handle)
typedef void(* | PwmHl_Resume) (PwmHl *handle)
typedef void(* | PwmHl_Stop) (PwmHl *handle)

Detailed Description

Multi-channels, dual-complementary PWM interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:18 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file PwmHl.h.

Data Structure Documentation

◆ PwmHl_Functions

struct PwmHl_Functions

Definition at line 56 of file PwmHl.h.

Collaboration diagram for PwmHl_Functions:
[legend]
Data Fields
PwmHl_Start | start
PwmHl_Stop | stop

◆ PwmHl_s

struct PwmHl_s

Structure of the TPwm interface.

Definition at line 63 of file PwmHl.h.

Data Fields
float32 | t12Frequency | Actual timer12 frequency.
Ifx_TimerValue | t12Period | Actual timer 12 period.
float32 | t13Frequency | Actual timer13 frequency.
Ifx_TimerValue | t13Period | Actual timer 13 period.

◆ PwmHl_Config

struct PwmHl_Config

Configuration structure of the TPwm interface.

Definition at line 75 of file PwmHl.h.

Data Fields
Ifx_ActiveState | activeState | Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of waitingTicks.
Ifx_TimerValue | noiseFilter | Specify hall sensor noise filter.
Ifx_TimerValue | phaseDelay | Specify the ticks before before updating each ouput hall pattern.
float32 | t12Frequency | Specify expected T12 PWM frequency in Hertz.
Ifx_TimerValue | t12Period | Specify expected T12 PWM period in ticks.
float32 | t13Frequency | Specify expected T13 PWM frequency in Hertz.
Ifx_TimerValue | t13Period | Specify expected T13 PWM period in ticks.

Typedef Documentation

◆ PwmHl

typedef struct PwmHl_s PwmHl

Definition at line 50 of file PwmHl.h.

◆ PwmHl_Pause

typedef void(* PwmHl_Pause) (PwmHl *handle)

Definition at line 52 of file PwmHl.h.

◆ PwmHl_Resume

typedef void(* PwmHl_Resume) (PwmHl *handle)

Definition at line 53 of file PwmHl.h.

◆ PwmHl_Start

typedef void(* PwmHl_Start) (PwmHl *handle)

Definition at line 51 of file PwmHl.h.

◆ PwmHl_Stop

typedef void(* PwmHl_Stop) (PwmHl *handle)

Definition at line 54 of file PwmHl.h.


iLLD_TC26B: Timer.h File Reference

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Data Structures | Typedefs
Timer.h File Reference

Timer interface. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Timer.h:

Go to the source code of this file.

Data Structures

struct | Timer_Functions
struct | Timer_s
Structure of the Timer interface. More...
struct | Timer_Config
Configuration structure of the Timer interface. More...

Typedefs

typedef struct Timer_s | Timer
typedef void(* | Timer_Start) (Timer *handle)
typedef void(* | Timer_Stop) (Timer *handle)
typedef void(* | Timer_SynchronousStart) (Timer *handle)
typedef void(* | Timer_SynchronousStop) (Timer *handle)
typedef void(* | Timer_CountOneStep) (Timer *handle)
typedef void(* | Timer_StartSingleShotMode) (Timer *handle)

Detailed Description

Timer interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:19 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Timer.h.

Data Structure Documentation

◆ Timer_Functions

struct Timer_Functions

Definition at line 58 of file Timer.h.

Collaboration diagram for Timer_Functions:
[legend]
Data Fields
Timer_CountOneStep | countOneStep
Timer_Start | start
Timer_StartSingleShotMode | startSingleShotMode
Timer_Stop | stop
Timer_SynchronousStart | synchronousStart
Timer_SynchronousStop | synchronousStop

◆ Timer_s

struct Timer_s

Structure of the Timer interface.

Definition at line 69 of file Timer.h.

Data Fields
float32 | t12Frequency | Actual timer12 frequency.
Ifx_TimerValue | t12Period | Actual timer 12 period.
float32 | t13Frequency | Actual timer13 frequency.
Ifx_TimerValue | t13Period | Actual timer 13 period.

◆ Timer_Config

struct Timer_Config

Configuration structure of the Timer interface.

Definition at line 81 of file Timer.h.

Data Fields
Ifx_TimerValue | activeCount | Specify active PWM period (TCOUNT)
float32 | t12Frequency | Specify expected T12 PWM frequency in Hertz.
Ifx_TimerValue | t12Period | Specify expected T12 PWM period in ticks.
float32 | t13Frequency | Specify expected T13 PWM frequency in Hertz.
Ifx_TimerValue | t13Period | Specify expected T13 PWM period in ticks.
Ifx_TimerValue | waitingTime | Specify the expected ticks before timer starts (TWAIT)

Typedef Documentation

◆ Timer

typedef struct Timer_s Timer

Definition at line 50 of file Timer.h.

◆ Timer_CountOneStep

typedef void(* Timer_CountOneStep) (Timer *handle)

Definition at line 55 of file Timer.h.

◆ Timer_Start

typedef void(* Timer_Start) (Timer *handle)

Definition at line 51 of file Timer.h.

◆ Timer_StartSingleShotMode

typedef void(* Timer_StartSingleShotMode) (Timer *handle)

Definition at line 56 of file Timer.h.

◆ Timer_Stop

typedef void(* Timer_Stop) (Timer *handle)

Definition at line 52 of file Timer.h.

◆ Timer_SynchronousStart

typedef void(* Timer_SynchronousStart) (Timer *handle)

Definition at line 53 of file Timer.h.

◆ Timer_SynchronousStop

typedef void(* Timer_SynchronousStop) (Timer *handle)

Definition at line 54 of file Timer.h.


iLLD_TC26B: TPwm.h File Reference

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Data Structures | Typedefs
TPwm.h File Reference

TPWM interface. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for TPwm.h:

Go to the source code of this file.

Data Structures

struct | TPwm_Functions
struct | TPwm_s
Structure of the TPwm interface. More...
struct | TPwm_Config
Configuration structure of the TPwm interface. More...

Typedefs

typedef struct TPwm_s | TPwm
typedef void(* | TPwm_Start) (TPwm *handle)
typedef void(* | TPwm_Pause) (TPwm *handle)
typedef void(* | TPwm_Resume) (TPwm *handle)
typedef void(* | TPwm_Stop) (TPwm *handle)

Detailed Description

TPWM interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:18 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file TPwm.h.

Data Structure Documentation

◆ TPwm_Functions

struct TPwm_Functions

Definition at line 56 of file TPwm.h.

Collaboration diagram for TPwm_Functions:
[legend]
Data Fields
TPwm_Pause | pause
TPwm_Resume | resume
TPwm_Start | start
TPwm_Stop | stop

◆ TPwm_s

struct TPwm_s

Structure of the TPwm interface.

Definition at line 65 of file TPwm.h.

Data Fields
float32 | frequency | Actual frequency.
Ifx_TimerValue | period | Actual timer period.

◆ TPwm_Config

struct TPwm_Config

Configuration structure of the TPwm interface.

Definition at line 75 of file TPwm.h.

Data Fields
Ifx_TimerValue | activeCount | Specify active PWM period (TCOUNT)
Ifx_ActiveState | activeState | Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of waitingTicks.
float32 | frequency | Specify expected PWM frequency in Hertz.
Ifx_TimerValue | period | Specify expected PWM period in ticks.
Ifx_TimerValue | waitingTime | Specify the expected ticks before timer starts (TWAIT)

Typedef Documentation

◆ TPwm

typedef struct TPwm_s TPwm

Definition at line 50 of file TPwm.h.

◆ TPwm_Pause

typedef void(* TPwm_Pause) (TPwm *handle)

Definition at line 52 of file TPwm.h.

◆ TPwm_Resume

typedef void(* TPwm_Resume) (TPwm *handle)

Definition at line 53 of file TPwm.h.

◆ TPwm_Start

typedef void(* TPwm_Start) (TPwm *handle)

Definition at line 51 of file TPwm.h.

◆ TPwm_Stop

typedef void(* TPwm_Stop) (TPwm *handle)

Definition at line 54 of file TPwm.h.


iLLD_TC26B: Data Structure Index

Data Structure Index
_ | c | i | p | s | t
_
IfxCcu6_Icu_Config IfxEray_Eray_ReceivedFrame IfxI2c_I2c IfxQspi_Sclk_Out
IfxCcu6_Icu_InterruptConfig IfxEray_Eray_Succ1Config IfxI2c_I2c_Config IfxQspi_Slsi_In
_Fifo IfxCcu6_Icu_Pins IfxEray_Eray_Succ2Config IfxI2c_I2c_Device IfxQspi_Slso_Out
c
IfxCcu6_Icu_TriggerConfig IfxEray_Eray_Succ3Config IfxI2c_I2c_deviceConfig IfxQspi_SpiMaster
IfxCcu6_PwmBc IfxEray_Eray_TransmitControl IfxI2c_Pins IfxQspi_SpiMaster_Channel_s
cfloat32 IfxCcu6_PwmBc_Config IfxEray_Header IfxI2c_Scl_InOut IfxQspi_SpiMaster_ChannelConfig
cfract IfxCcu6_PwmBc_InterruptConfig IfxEray_ReceivedHeader IfxI2c_Sda_InOut IfxQspi_SpiMaster_Config
csfract IfxCcu6_PwmBc_MultiChannelControl IfxEray_Rxd_In IfxIom_Driver IfxQspi_SpiMaster_Dma
csint16 IfxCcu6_PwmBc_Pins IfxEray_SlotConfig IfxIom_Driver_Config IfxQspi_SpiMaster_DmaConfig
csint32 IfxCcu6_PwmBc_Timer12 IfxEray_Txd_Out IfxIom_Driver_Lam IfxQspi_SpiMaster_ErrorFlags
i
IfxCcu6_PwmBc_Timer13 IfxEray_Txen_Out IfxIom_Driver_LamConfig IfxQspi_SpiMaster_Input
IfxCcu6_PwmBc_TriggerConfig IfxEth IfxIom_Driver_LamEventConfig IfxQspi_SpiMaster_InputOutput
Icu_Config IfxCcu6_PwmHl_Base IfxEth_AltRxDescr0_Bits IfxIom_Driver_LamEventWindowConfig IfxQspi_SpiMaster_Output
Icu_Functions IfxCcu6_PwmHl_Config IfxEth_AltRxDescr1_Bits IfxIom_Driver_LamFilterConfig IfxQspi_SpiMaster_Pins
Icu_s IfxCcu6_PwmHl_Mode IfxEth_AltTxDescr0_Bits IfxIom_Driver_LamMonConfig IfxQspi_SpiSlave
Ifc_Crc IfxCcu6_PwmHl_s IfxEth_AltTxDescr1_Bits IfxIom_Driver_LamRefConfig IfxQspi_SpiSlave_Config
Ifc_Crc_Table IfxCcu6_T12hr_In IfxEth_Col_In IfxModule_IndexMap IfxQspi_SpiSlave_Dma
Ifc_Crc_Table16 IfxCcu6_T13hr_In IfxEth_Config IfxMsc_En_Out IfxQspi_SpiSlave_DmaConfig
Ifc_Crc_Table32 IfxCcu6_Timer IfxEth_Crs_In IfxMsc_Fcln_Out IfxQspi_SpiSlave_ErrorFlags
Ifc_Crc_Table8 IfxCcu6_Timer_Clock IfxEth_Crsdv_In IfxMsc_Fclp_Out IfxQspi_SpiSlave_Pins
Ifx_AngleTrkF32 IfxCcu6_Timer_Config IfxEth_Mdc_Out IfxMsc_Inj_In IfxQspi_SpiSlave_Protocol
Ifx_AngleTrkF32_CfgData IfxCcu6_Timer_InterruptConfig IfxEth_Mdio_InOut IfxMsc_Msc IfxScu_Dcdcsync_Out
Ifx_AngleTrkF32_Config IfxCcu6_Timer_Pins IfxEth_MiiPins IfxMsc_Msc_Abra IfxScu_Emgstop_In
Ifx_AngleTrkF32_PosIf IfxCcu6_Timer_Timer12 IfxEth_Refclk_In IfxMsc_Msc_Clock IfxScu_Evrwup_In
Ifx_CircularBuffer IfxCcu6_Timer_Timer13 IfxEth_RingModeBuffersConfig IfxMsc_Msc_Config IfxScu_Extclk_Out
Ifx_ClpxFloat32_Integral IfxCcu6_Timer_TriggerConfig IfxEth_RingModeRxBuffersConfig IfxMsc_Msc_DownstreamControlConfig IfxScu_Hwcfg_In
Ifx_Console IfxCcu6_TimerWithTrigger IfxEth_RingModeTxBuffersConfig IfxMsc_Msc_DownstreamControlExtensionConfig IfxScu_Req_In
Ifx_DataBufferMode_TimeStampSingle IfxCcu6_TimerWithTrigger_Base IfxEth_RmiiPins IfxMsc_Msc_en IfxScu_Wdtlck_Out
Ifx_DateTime IfxCcu6_TimerWithTrigger_Config IfxEth_Rxclk_In IfxMsc_Msc_fcln IfxScuCcu_CcuconRegConfig
Ifx_Fifo_Shared IfxCcu6_TPwm IfxEth_Rxd_In IfxMsc_Msc_fclp IfxScuCcu_ClockDistributionConfig
Ifx_GlobalResources IfxCcu6_TPwm_Clock IfxEth_RxDescr IfxMsc_Msc_inj0 IfxScuCcu_Config
Ifx_GlobalResources_Item IfxCcu6_TPwm_Config IfxEth_RxDescr0 IfxMsc_Msc_inj1 IfxScuCcu_ErayPllConfig
Ifx_IntegralF32 IfxCcu6_TPwm_InterruptConfig IfxEth_RxDescr0_Bits IfxMsc_Msc_InterruptConfig IfxScuCcu_FlashWaitstateConfig
Ifx_InternalMux_Config IfxCcu6_TPwm_Pins IfxEth_RxDescr1 IfxMsc_Msc_Io IfxScuCcu_InitialStepConfig
Ifx_InternalMux_MuxConfig IfxCcu6_TPwm_Timer12 IfxEth_RxDescr1_Bits IfxMsc_Msc_OutputControlConfig IfxScuCcu_PllStepsConfig
Ifx_IsrSetting IfxCcu6_TPwm_Timer13 IfxEth_RxDescr2 IfxMsc_Msc_sdi IfxScuCcu_SysPllConfig
Ifx_LowPassPt1F32 IfxCcu6_TPwm_TriggerConfig IfxEth_RxDescr3 IfxMsc_Msc_son IfxScuWdt_Config
Ifx_LowPassPt1F32_Config IfxCif_Cam IfxEth_RxDescrList IfxMsc_Msc_sop IfxSent_Sent
Ifx_LutIndexedLinearF32 IfxCif_Cam_Common IfxEth_Rxdv_In IfxMsc_Msc_UpstreamStatusConfig IfxSent_Sent_Channel
Ifx_LutIndexedLinearF32_Item IfxCif_Cam_Config IfxEth_Rxer_In IfxMsc_Sdi_In IfxSent_Sent_ChannelConfig
Ifx_LutLinearF32 IfxCif_Cam_Downscaling IfxEth_Txclk_In IfxMsc_Son_Out IfxSent_Sent_Config
Ifx_LutLinearF32_Item IfxCif_Cam_JfifHeader IfxEth_Txd_Out IfxMsc_Sop_Out IfxSent_Sent_Enable
Ifx_RampF32 IfxCif_Cam_JpegTable IfxEth_TxDescr IfxMtu_SramItem IfxSent_Sent_EnabledInterrupts
Ifx_Shell IfxCif_Cam_JpegTables IfxEth_TxDescr0 IfxMultican_Can IfxSent_Sent_Frame
Ifx_Shell_CmdLine IfxCif_Cam_MemAreas IfxEth_TxDescr0_Bits IfxMultican_Can_Config IfxSent_Sent_In
Ifx_Shell_Command IfxCif_Cam_MemConfig IfxEth_TxDescr1 IfxMultican_Can_FdConfig IfxSent_Sent_InputOutputControl
Ifx_Shell_Config IfxCif_Cam_MemInfo IfxEth_TxDescr1_Bits IfxMultican_Can_GatewayConfig IfxSent_Sent_Interrupt
Ifx_Shell_Flags IfxCif_Cam_PictureInfo IfxEth_TxDescr2 IfxMultican_Can_InterruptConfig IfxSent_Sent_InterruptNodeControl
Ifx_Shell_Protocol IfxCif_Cam_TableInfo IfxEth_TxDescr3 IfxMultican_Can_InterruptSource IfxSent_Sent_NibbleControl
Ifx_Shell_Runtime IfxCif_Clk_In IfxEth_TxDescrList IfxMultican_Can_MsgObj IfxSent_Sent_Pins
Ifx_Shell_Syntax IfxCif_D_In IfxEth_Txen_Out IfxMultican_Can_MsgObjConfig IfxSent_Sent_ReceiveControl
IfxAsclin_Asc IfxCif_Hsnc_In IfxEth_Txer_Out IfxMultican_Can_MsgObjControl IfxSent_Sent_SerialMessageFrame
IfxAsclin_Asc_BaudRate IfxCif_Vsnc_In IfxFce_Crc IfxMultican_Can_Node IfxSent_Sent_TransmitControl
IfxAsclin_Asc_BitTimingControl IfxCpu_Counter IfxFce_Crc_Config IfxMultican_Can_NodeConfig IfxSent_Spc_Out
IfxAsclin_Asc_Config IfxCpu_Perf IfxFce_Crc_Crc IfxMultican_Message IfxSmu_configFsp
IfxAsclin_Asc_ErrorFlags IfxCpu_Trap IfxFce_Crc_CrcConfig IfxMultican_MsgObjStat IfxSmu_Fsp_Out
IfxAsclin_Asc_ErrorFlagsUnion IfxCpu_Trap_Id IfxFce_Crc_EnabledInterrupts IfxMultican_Rxd_In IfxStdIf_DPipe_
IfxAsclin_Asc_FifoControl IfxDma_Dma IfxFft_Fft IfxMultican_Txd_Out IfxStdIf_Pos_
IfxAsclin_Asc_FrameControl IfxDma_Dma_Channel IfxFft_Fft_Config IfxPort_Esr_Masks IfxStdIf_Pos_Config
IfxAsclin_Asc_InterruptConfig IfxDma_Dma_ChannelConfig IfxFft_Fft_Count64 IfxPort_Io_Config IfxStdIf_Pos_Status
IfxAsclin_Asc_Pins IfxDma_Dma_Config IfxFft_Fft_Job_s IfxPort_Io_ConfigPin IfxStdIf_Pos_Status.B
IfxAsclin_Cts_In IfxDsadc_Cgpwm_Out IfxFft_Fft_JobConfig IfxPort_Pin IfxStdIf_PwmHl_
IfxAsclin_Lin IfxDsadc_Cin_In IfxFlash_ErrorTracking_Address IfxPort_Pin_Config IfxStdIf_PwmHl_Config
IfxAsclin_Lin_AcknowledgementFlags IfxDsadc_Cout_Out IfxFlash_flashSector IfxPsi5_Psi5 IfxStdIf_Timer_
IfxAsclin_Lin_BaudrateDetection IfxDsadc_Din_In IfxGpt12_Capin_In IfxPsi5_Psi5_Channel IfxStdIf_Timer_Config
IfxAsclin_Lin_BaudrateGeneration IfxDsadc_Dsadc IfxGpt12_IncrEnc IfxPsi5_Psi5_ChannelConfig IfxStdIf_Timer_TrigConfig
IfxAsclin_Lin_BitSamplingControl IfxDsadc_Dsadc_AuxFilterConfig IfxGpt12_IncrEnc_Config IfxPsi5_Psi5_ChannelTrigger IfxStm_CompareConfig
IfxAsclin_Lin_BitTimingControl IfxDsadc_Dsadc_CarrierGenConfig IfxGpt12_TxEud_In IfxPsi5_Psi5_Clock IfxStm_Timer
IfxAsclin_Lin_Config IfxDsadc_Dsadc_Channel IfxGpt12_TxIn_In IfxPsi5_Psi5_Config IfxStm_Timer_Base
IfxAsclin_Lin_DataControl IfxDsadc_Dsadc_ChannelConfig IfxGpt12_TxOut_Out IfxPsi5_Psi5_Frame IfxStm_Timer_Config
IfxAsclin_Lin_EnabledInterrupts IfxDsadc_Dsadc_ChannelPins IfxGtm_Atom_Pwm_Config IfxPsi5_Psi5_FrameData IfxVadc_Adc
IfxAsclin_Lin_ErrorFlags IfxDsadc_Dsadc_CombFilterConfig IfxGtm_Atom_Pwm_Driver IfxPsi5_Psi5_InputOutputControl IfxVadc_Adc_ArbiterConfig
IfxAsclin_Lin_FifoControl IfxDsadc_Dsadc_Config IfxGtm_Atom_Pwm_Interrupt IfxPsi5_Psi5_Message IfxVadc_Adc_BackgroundScanConfig
IfxAsclin_Lin_FrameControl IfxDsadc_Dsadc_DemodulatorConfig IfxGtm_Atom_Pwm_pin IfxPsi5_Psi5_PinsConfig IfxVadc_Adc_Channel
IfxAsclin_Lin_FrameControlFlags IfxDsadc_Dsadc_FirFilterConfig IfxGtm_Atom_PwmHl_Base IfxPsi5_Psi5_PulseGeneration IfxVadc_Adc_ChannelConfig
IfxAsclin_Lin_FrameDataControl IfxDsadc_Dsadc_IntegratorConfig IfxGtm_Atom_PwmHl_Config IfxPsi5_Psi5_Rdm IfxVadc_Adc_ClassConfig
IfxAsclin_Lin_InterruptConfig IfxDsadc_Dsadc_ModulatorConfig IfxGtm_Atom_PwmHl_Mode IfxPsi5_Psi5_Rds IfxVadc_Adc_Config
IfxAsclin_Lin_LinControl IfxDsadc_Dsadc_RectifierConfig IfxGtm_Atom_PwmHl_s IfxPsi5_Psi5_ReceiveControl IfxVadc_Adc_EmuxControl
IfxAsclin_Lin_PduType IfxDsadc_Dsn_In IfxGtm_Atom_Timer IfxPsi5_Psi5_SerialMessage IfxVadc_Adc_EmuxPinConfig
IfxAsclin_Lin_Pins IfxDsadc_Dsp_In IfxGtm_Atom_Timer_Base IfxPsi5_Psi5_StartupOptions IfxVadc_Adc_GatingTriggerConfig
IfxAsclin_Rts_Out IfxDsadc_Itr_In IfxGtm_Atom_Timer_Config IfxPsi5_Psi5_TimeStampConfig IfxVadc_Adc_Group
IfxAsclin_Rx_In IfxDsadc_Rdc IfxGtm_Atom_ToutMap IfxPsi5_Psi5_TransmitControl IfxVadc_Adc_GroupConfig
IfxAsclin_Sclk_Out IfxDsadc_Rdc_Config IfxGtm_Clk_Out IfxPsi5_Rx_In IfxVadc_Adc_QueueConfig
IfxAsclin_Slso_Out IfxDsadc_Rdc_ConfigHw IfxGtm_Tim_In IfxPsi5_Tx_Out IfxVadc_Adc_ScanConfig
IfxAsclin_Spi IfxDsadc_Rdc_GtmTimestamp IfxGtm_Tim_In_Config IfxPsi5s_Clk_Out IfxVadc_Emux_Out
IfxAsclin_Spi_Baudrate IfxDsadc_Rdc_Hw IfxGtm_Tim_In_ConfigCapture IfxPsi5s_Psi5s IfxVadc_GxBfl_Out
IfxAsclin_Spi_BitSamplingControl IfxDsadc_Rdc_Ts IfxGtm_Tim_In_ConfigFilter IfxPsi5s_Psi5s_AscConfig IfxVadc_Vadcg_In
IfxAsclin_Spi_Config IfxDsadc_Sg_In IfxGtm_Tim_In_ConfigTimeout IfxPsi5s_Psi5s_Channel
p
IfxAsclin_Spi_ErrorFlags IfxDts_Dts_Config IfxGtm_Tim_TinMap IfxPsi5s_Psi5s_ChannelConfig
IfxAsclin_Spi_FifoControl IfxEray_Eray IfxGtm_Tom_Pwm_Config IfxPsi5s_Psi5s_ChannelTrigger PwmHl_Config
IfxAsclin_Spi_FrameControl IfxEray_Eray_BufferReconfig IfxGtm_Tom_Pwm_Driver IfxPsi5s_Psi5s_Clock PwmHl_Functions
IfxAsclin_Spi_InputOutputControl IfxEray_Eray_Config IfxGtm_Tom_Pwm_Interrupt IfxPsi5s_Psi5s_Config PwmHl_s
IfxAsclin_Spi_InterruptConfig IfxEray_Eray_ControllerConfig IfxGtm_Tom_Pwm_pin IfxPsi5s_Psi5s_Frame
s
IfxAsclin_Spi_Job IfxEray_Eray_Gtu01Config IfxGtm_Tom_PwmHl_Base IfxPsi5s_Psi5s_GlobalControlConfig
IfxAsclin_Spi_Pins IfxEray_Eray_Gtu02Config IfxGtm_Tom_PwmHl_Config IfxPsi5s_Psi5s_Pins Spi_ErrorChecks
IfxAsclin_Tx_Out IfxEray_Eray_Gtu03Config IfxGtm_Tom_PwmHl_Mode IfxPsi5s_Psi5s_PulseGeneration SpiIf_
IfxCcu6_Cc60_Out IfxEray_Eray_Gtu04Config IfxGtm_Tom_PwmHl_s IfxPsi5s_Psi5s_ReceiveControl SpiIf_Ch_
IfxCcu6_Cc60in_In IfxEray_Eray_Gtu05Config IfxGtm_Tom_TGC IfxPsi5s_Psi5s_ReceiveData SpiIf_ChConfig_
IfxCcu6_Cc61_Out IfxEray_Eray_Gtu06Config IfxGtm_Tom_Timer IfxPsi5s_Psi5s_ReceivedBits SpiIf_ChMode
IfxCcu6_Cc61in_In IfxEray_Eray_Gtu07Config IfxGtm_Tom_Timer_Base IfxPsi5s_Psi5s_ReceivedData SpiIf_Config
IfxCcu6_Cc62_Out IfxEray_Eray_Gtu08Config IfxGtm_Tom_Timer_Config IfxPsi5s_Psi5s_ReceiveStatus SpiIf_Flags
IfxCcu6_Cc62in_In IfxEray_Eray_Gtu09Config IfxGtm_Tom_ToutMap IfxPsi5s_Psi5s_ReceiveTimestamp SpiIf_funcs
IfxCcu6_Ccpos0_In IfxEray_Eray_Gtu10Config IfxGtm_Trig_AdcTrig_Table IfxPsi5s_Psi5s_Timestamp SpiIf_Job
IfxCcu6_Ccpos1_In IfxEray_Eray_Gtu11Config IfxGtm_Trig_Channel IfxPsi5s_Psi5s_TimeStampConfig
t
IfxCcu6_Ccpos2_In IfxEray_Eray_GTUConfig IfxGtm_Trig_Source IfxPsi5s_Psi5s_TransmitControl
IfxCcu6_Cout60_Out IfxEray_Eray_Interrupt IfxGtm_Trig_Trigger IfxPsi5s_Rx_In Timer_Config
IfxCcu6_Cout61_Out IfxEray_Eray_MessageRAMConfig IfxHssl_Hsct IfxPsi5s_Tx_Out Timer_Functions
IfxCcu6_Cout62_Out IfxEray_Eray_NodeA IfxHssl_Hsct_Config IfxQspi_DelayConst Timer_s
IfxCcu6_Cout63_Out IfxEray_Eray_NodeB IfxHssl_Hssl IfxQspi_Hsicin_In TPwm_Config
IfxCcu6_Ctrap_In IfxEray_Eray_NodeConfig IfxHssl_Hssl_AccessWindow IfxQspi_Mrst_In TPwm_Functions
IfxCcu6_Icu IfxEray_Eray_Pins IfxHssl_Hssl_Channel IfxQspi_Mrst_Out TPwm_s
IfxCcu6_Icu_Channel IfxEray_Eray_Prtc1Control IfxHssl_Hssl_ChannelConfig IfxQspi_Mtsr_In
IfxCcu6_Icu_ChannelConfig IfxEray_Eray_Prtc2Control IfxHssl_Hssl_Config IfxQspi_Mtsr_Out
IfxCcu6_Icu_Clock IfxEray_Eray_ReceiveControl IfxHssl_Hssl_errorFlags IfxQspi_Sclk_In
_ | c | i | p | s | t


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- a -

  • a : Ifx_LowPassPt1F32
  • A : IfxEth_RxDescr0 , IfxEth_RxDescr1 , IfxEth_TxDescr0 , IfxEth_TxDescr1
  • a : IfxPsi5_Psi5_StartupOptions
  • abd : IfxAsclin_Lin_BaudrateDetection
  • abraBlockBypass : IfxMsc_Msc_Abra
  • abraConfig : IfxMsc_Msc_Config
  • abraDownstreamBlockBaudrate : IfxMsc_Msc_Abra
  • ac : IfxCif_Cam_JpegTable
  • accelEst : Ifx_AngleTrkF32
  • acceptanceMask : IfxMultican_Can_MsgObjConfig
  • acceptedStartupDeviation : IfxEray_Eray_Gtu06Config
  • accessWindow0 : IfxHssl_Hssl_Config
  • accessWindow1 : IfxHssl_Hssl_Config
  • accessWindow2 : IfxHssl_Hssl_Config
  • accessWindow3 : IfxHssl_Hssl_Config
  • accumulatedCounterIndex : IfxIom_Driver_Lam
  • accumulatedEventUsedMask : IfxIom_Driver
  • acknowledgmentFlags : IfxAsclin_Lin
  • ackTimerIrq : IfxStdIf_Timer_
  • ackTriggerIrq : IfxStdIf_Timer_
  • ACT_TB : IfxGtm_Tom_TGC
  • activateSlso : IfxQspi_SpiMaster_Channel_s
  • activeChannel : SpiIf_
  • activeCount : Timer_Config , TPwm_Config
  • activeState : PwmHl_Config , TPwm_Config
  • actualUartFrameCount : IfxPsi5s_Psi5s_ReceivedBits
  • address : IfxFlash_ErrorTracking_Address
  • AFM : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • agc : IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer
  • agcApplyUpdate : IfxGtm_Atom_Timer
  • agcDisableUpdate : IfxGtm_Atom_Timer
  • alertInterrupt : IfxMultican_Can_NodeConfig
  • align : Ifx_Console
  • ALL : IfxAsclin_Asc_ErrorFlagsUnion , IfxSent_Sent_EnabledInterrupts
  • allowSleepMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • alternateCrcSelected : IfxSent_Sent_ReceiveControl
  • alti : IfxAsclin_Lin_Config , IfxAsclin_Spi_InputOutputControl
  • analogFrequency : IfxVadc_Adc_Config
  • analyzerMode : IfxMultican_Can_NodeConfig
  • angleAtan : Ifx_AngleTrkF32
  • angleErr : Ifx_AngleTrkF32
  • angleEst : Ifx_AngleTrkF32
  • angleRef : Ifx_AngleTrkF32
  • angleTrk : IfxDsadc_Rdc
  • app0 : IfxCif_Cam_JfifHeader
  • applyUpdate : IfxStdIf_Timer_
  • arbiter : IfxVadc_Adc_GroupConfig
  • arbiterRoundLength : IfxVadc_Adc_ArbiterConfig
  • ascConfig : IfxPsi5s_Psi5s_Config
  • ascFramingErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • asclin : IfxAsclin_Asc , IfxAsclin_Asc_Config , IfxAsclin_Lin , IfxAsclin_Lin_Config , IfxAsclin_Spi , IfxAsclin_Spi_Config
  • ascOnlyMode : IfxPsi5s_Psi5s_GlobalControlConfig
  • ascOverrunErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • ascParityErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • assertion : IfxCpu_Trap_Id
  • asynchronousModeSelected : IfxPsi5_Psi5_ReceiveControl
  • atom : IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Atom_ToutMap
  • atomChannel : IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver
  • atomIndex : IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Timer
  • autoBackgroundScanEnabled : IfxVadc_Adc_BackgroundScanConfig
  • autoCS : SpiIf_ChMode
  • automaticLengthReload : IfxFce_Crc_CrcConfig
  • autoscanEnabled : IfxVadc_Adc_ScanConfig
  • auxFilter : IfxDsadc_Dsadc_ChannelConfig
  • availMemSize : IfxCif_Cam


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- b -

  • b : Ifx_LowPassPt1F32
  • B : IfxMultican_MsgObjStat
  • b : IfxPsi5_Psi5_StartupOptions
  • B : IfxStdIf_Pos_Status
  • backgroundChannel : IfxVadc_Adc_ChannelConfig
  • backgroundScanRequest : IfxVadc_Adc_GroupConfig
  • bacon : IfxQspi_SpiMaster_Channel_s
  • base : Ifx_AngleTrkF32 , Ifx_CircularBuffer , IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_PwmHl_Config , IfxCcu6_PwmHl_s , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TimerWithTrigger , IfxCcu6_TimerWithTrigger_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGpt12_IncrEnc_Config , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config , IfxQspi_SpiMaster , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config , IfxStm_Timer , IfxStm_Timer_Config
  • baudrate : IfxAsclin_Asc_BaudRate , IfxAsclin_Asc_Config , IfxAsclin_Lin_BaudrateGeneration , IfxAsclin_Spi_Baudrate , IfxAsclin_Spi_Config , IfxEray_Eray_Prtc1Control , IfxI2c_I2c , IfxI2c_I2c_Config , IfxMsc_Msc_Clock , IfxMultican_Can_NodeConfig , Spi_ErrorChecks , SpiIf_Ch_ , SpiIf_ChConfig_
  • baudrateError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • baudrateFrequency : IfxPsi5s_Psi5s_AscConfig
  • baudrateSelect : IfxPsi5_Psi5_ReceiveControl
  • baudrateSelection : IfxPsi5s_Psi5s_AscConfig
  • bitReversed : IfxDsadc_Dsadc_CarrierGenConfig
  • bitSampling : IfxAsclin_Spi_Config
  • bitStuffControl : IfxPsi5s_Psi5s_TransmitControl
  • bitStuffingEnabled : IfxPsi5_Psi5_TransmitControl
  • bitTiming : IfxAsclin_Asc_Config
  • blankoutTime : IfxPsi5_Psi5_PulseGeneration
  • blockMode : IfxDma_Dma_ChannelConfig
  • bottomMsgObjId : IfxMultican_Can_MsgObjControl
  • boundary : Ifx_LutLinearF32_Item
  • boundaryMode : IfxVadc_Adc_ChannelConfig
  • brd : IfxAsclin_Lin_Config
  • breakDetected : IfxAsclin_Lin_ErrorFlags
  • breakLength : IfxAsclin_Lin_LinControl
  • brg : IfxAsclin_Lin_Config
  • bsc : IfxAsclin_Lin_Config
  • btc : IfxAsclin_Lin_Config
  • buffer : _Fifo , SpiIf_Config
  • bufferDirection : IfxEray_Header
  • bufferIndex : IfxEray_Eray_ReceiveControl , IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • bufferReconfigEnabled : IfxEray_Eray_MessageRAMConfig
  • bufferServiceEnabled : IfxEray_Header
  • bufferSize : SpiIf_Config
  • buffMode : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • bus : IfxCpu_Trap_Id
  • busAccessError : IfxHssl_Hssl_errorFlags
  • busError : IfxFce_Crc_EnabledInterrupts
  • busPriority : IfxDma_Dma_ChannelConfig
  • busStatus : IfxI2c_I2c
  • bypassed : IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • byteAccess : SpiIf_Flags
  • byteSwap : IfxCif_Cam_MemConfig


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- c -

  • call : Ifx_Shell_Command
  • callbackData : SpiIf_Ch_
  • canReadCount : IfxStdIf_DPipe_
  • canWriteCount : IfxStdIf_DPipe_
  • capture : IfxGtm_Tim_In_Config
  • captureClockFrequency : IfxGtm_Tim_In
  • captureFrequency : IfxCcu6_Icu
  • carrierGen : IfxDsadc_Rdc_ConfigHw
  • carrierWaveformMode : IfxDsadc_Dsadc_CarrierGenConfig
  • cb : IfxCif_Cam_MemAreas
  • CC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • cc0 : IfxCcu6_PwmHl_Config
  • cc1 : IfxCcu6_PwmHl_Config
  • cc2 : IfxCcu6_PwmHl_Config
  • cc60In : IfxCcu6_Icu_Pins
  • cc60Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc61In : IfxCcu6_Icu_Pins
  • cc61Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc62In : IfxCcu6_Icu_Pins
  • cc62Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc6xInputMode : IfxCcu6_Icu_Pins
  • ccpos0 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccpos1 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccpos2 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccposxInputMode : IfxCcu6_Icu_Pins
  • ccu0Enabled : IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tom_Pwm_Interrupt
  • ccu1Enabled : IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tom_Pwm_Interrupt
  • ccu6 : IfxCcu6_Icu , IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_Icu_Config , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TimerWithTrigger , IfxCcu6_TimerWithTrigger_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config
  • ccucon0 : IfxScuCcu_ClockDistributionConfig
  • ccucon1 : IfxScuCcu_ClockDistributionConfig
  • ccucon2 : IfxScuCcu_ClockDistributionConfig
  • ccucon5 : IfxScuCcu_ClockDistributionConfig
  • ccucon6 : IfxScuCcu_ClockDistributionConfig
  • ccucon7 : IfxScuCcu_ClockDistributionConfig
  • ccx : IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s
  • ccxActiveState : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • ccxOutputEnabled : IfxStdIf_PwmHl_Config
  • ccxTemp : IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_s
  • CE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • cfgData : Ifx_AngleTrkF32
  • channel : IfxDma_Dma_Channel , IfxDsadc_Cin_In , IfxDsadc_Cout_Out , IfxDsadc_Din_In , IfxDsadc_Dsadc_Channel , IfxDsadc_Dsn_In , IfxDsadc_Dsp_In , IfxDsadc_Itr_In , IfxGtm_Atom_ToutMap , IfxGtm_Tim_In , IfxGtm_Tim_TinMap , IfxGtm_Tom_ToutMap , IfxGtm_Trig_Source , IfxIom_Driver_Lam , IfxIom_Driver_LamConfig , IfxPsi5_Psi5_Channel , IfxSent_Sent_Channel , IfxVadc_Adc_Channel
  • channelAConnectedNode : IfxEray_Eray_Succ1Config
  • channelAFiltered : IfxEray_Header
  • channelAMacrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelAMicrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelAReceptionDelay : IfxEray_Eray_Gtu05Config
  • channelASymbolTransmitted : IfxEray_Eray_Succ1Config
  • channelBasedCs : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • channelBConnectedNode : IfxEray_Eray_Succ1Config
  • channelBFiltered : IfxEray_Header
  • channelBMacrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelBMicrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelBReceptionDelay : IfxEray_Eray_Gtu05Config
  • channelBSymbolTransmitted : IfxEray_Eray_Succ1Config
  • channelCount : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • channelId : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_TPwm_Timer12 , IfxDma_Dma_Channel , IfxDma_Dma_ChannelConfig , IfxDsadc_Dsadc_Channel , IfxDsadc_Dsadc_ChannelConfig , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig , IfxPsi5_Psi5_Channel , IfxPsi5_Psi5_ChannelConfig , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Psi5s_Channel , IfxPsi5s_Psi5s_ChannelConfig , IfxPsi5s_Psi5s_ReceivedBits , IfxQspi_SpiMaster_Channel_s , IfxScu_Req_In , IfxSent_Sent_Channel , IfxSent_Sent_ChannelConfig , IfxSent_Sent_In , IfxSent_Spc_Out , IfxVadc_Adc_ChannelConfig , IfxVadc_Vadcg_In
  • channelIndex : IfxGtm_Tim_In , IfxGtm_Tim_In_Config
  • channelInterruptControl : IfxDma_Dma_ChannelConfig
  • channelInterruptEnabled : IfxDma_Dma_ChannelConfig
  • channelInterruptPriority : IfxDma_Dma_ChannelConfig
  • channelInterruptTypeOfService : IfxDma_Dma_ChannelConfig
  • channelMode : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_TPwm_Timer12
  • channelNumberCodeError : IfxHssl_Hssl_errorFlags
  • channelOut : IfxCcu6_TPwm , IfxCcu6_TPwm_Config
  • channelPins : IfxDsadc_Dsadc_ChannelConfig
  • channelPriority : IfxVadc_Adc_ChannelConfig
  • channels : IfxVadc_Adc_EmuxControl
  • channelSelectionStyle : IfxVadc_Adc_EmuxControl
  • channelServProvider : IfxVadc_Adc_ChannelConfig
  • channelsMask : IfxGtm_Atom_Timer , IfxGtm_Tom_Timer
  • channelSrcNr : IfxVadc_Adc_ChannelConfig
  • channelTrigger : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • channelTriggerCounter : IfxPsi5_Psi5_ChannelTrigger , IfxPsi5s_Psi5s_ChannelTrigger
  • channelTriggerValue : IfxPsi5_Psi5_ChannelTrigger , IfxPsi5s_Psi5s_ChannelTrigger
  • checksum : IfxAsclin_Lin_DataControl
  • checksumMode : IfxAsclin_Lin_PduType
  • CIC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • cif : IfxCif_Cam
  • cin : IfxDsadc_Dsadc_ChannelPins
  • cinMode : IfxDsadc_Dsadc_ChannelPins
  • clearEvent : IfxIom_Driver_LamEventWindowConfig
  • clearRx : IfxStdIf_DPipe_
  • clearTimerOnGlitch : IfxIom_Driver_LamFilterConfig
  • clearTx : IfxStdIf_DPipe_
  • clk : IfxPsi5s_Psi5s_Pins
  • clkMode : IfxPsi5s_Psi5s_Pins
  • clock : IfxCcu6_Icu_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config , IfxCpu_Perf , IfxGtm_Atom_Timer_Config , IfxGtm_Tim_In_ConfigCapture , IfxGtm_Tim_In_ConfigFilter , IfxGtm_Tim_In_ConfigTimeout , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Timer_Config
  • clockConfig : IfxMsc_Msc_Config
  • clockCorrectionCyclesHalt : IfxEray_Eray_Succ3Config
  • clockCorrectionCyclesPassive : IfxEray_Eray_Succ3Config
  • clockDistribution : IfxScuCcu_Config
  • clockFreq : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base
  • clockInput : IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • clockOutput : IfxPsi5s_Psi5s_AscConfig
  • clockPeriod : IfxDsadc_Rdc_Ts
  • clockPolarity : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • clockSelect : IfxMultican_Can_Config
  • clockSelectAbra : IfxMsc_Msc_Abra
  • clockSource : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config
  • clockSyncErrorHalt : IfxEray_Eray_Succ1Config
  • clrInternalResetFlag : IfxScuWdt_Config
  • clusterDrift : IfxEray_Eray_Gtu05Config
  • cmd : Ifx_Shell
  • cmdHistory : Ifx_Shell
  • cmdState : Ifx_Shell_Runtime
  • cmdStr : Ifx_Shell_CmdLine , Ifx_Shell_Runtime
  • code : IfxVadc_Adc_EmuxControl
  • codeforOne : IfxPsi5s_Psi5s_PulseGeneration
  • codeforZero : IfxPsi5s_Psi5s_PulseGeneration
  • col : IfxEth_MiiPins
  • collisionAvoidanceDuration : IfxEray_Eray_Prtc1Control
  • collisionDetectionEnable : IfxAsclin_Lin_FrameControl
  • collisionDetectionError : IfxAsclin_Lin_ErrorFlags
  • combFilter : IfxDsadc_Dsadc_ChannelConfig
  • combFilterShift : IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • combFilterType : IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • commandDataCommandReceptionMode : IfxMsc_Msc_DownstreamControlConfig
  • commandFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • commandFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • commandFrameLength : IfxMsc_Msc_DownstreamControlConfig
  • commandLine : Ifx_Shell_Command
  • commandList : Ifx_Shell , Ifx_Shell_Config
  • common : IfxCif_Cam_Config
  • commonModeVoltage : IfxDsadc_Dsadc_ModulatorConfig
  • comparator : IfxStm_CompareConfig , IfxStm_Timer , IfxStm_Timer_Config
  • comparatorInterrupt : IfxStm_CompareConfig
  • comparatorShift : IfxStm_Timer
  • comparatorValue : IfxStm_Timer
  • compareOffset : IfxStm_CompareConfig
  • compareSize : IfxStm_CompareConfig
  • compareValue : IfxCcu6_PwmBc_Timer13 , IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • config : IfxEth , IfxGtm_Trig_Channel
  • configBit : IfxSent_Sent_SerialMessageFrame
  • configError : IfxFce_Crc_EnabledInterrupts
  • configResult : IfxCif_Cam
  • configuration : IfxPsi5_Psi5_Message
  • configurationError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • contextManagement : IfxCpu_Trap_Id
  • control : Ifx_Shell , IfxMultican_Can_MsgObjConfig
  • controlFrameExtensionPassivePhaseLength : IfxMsc_Msc_DownstreamControlExtensionConfig
  • controllerConfig : IfxEray_Eray_NodeConfig
  • controlSource : IfxIom_Driver_LamEventWindowConfig
  • copyData : IfxMultican_Can_GatewayConfig
  • copyDataLengthCode : IfxMultican_Can_GatewayConfig
  • copyId : IfxMultican_Can_GatewayConfig
  • correctionOffset : IfxEray_Eray_Gtu04Config
  • cosIn : Ifx_AngleTrkF32 , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc
  • count : Ifx_Fifo_Shared
  • count64 : IfxFft_Fft_Job_s
  • countDir : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStdIf_Timer_Config , IfxStm_Timer_Base
  • counter : IfxCpu_Counter
  • counter1 : IfxCpu_Perf
  • counter2 : IfxCpu_Perf
  • counter3 : IfxCpu_Perf
  • counterValue : IfxCcu6_Icu_Config , IfxCcu6_PwmBc_Timer12 , IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer12 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • countingInputMode : IfxCcu6_Icu_Clock
  • countMode : IfxCcu6_Icu_Config , IfxCcu6_PwmBc_Timer12 , IfxCcu6_Timer_Timer12 , IfxCcu6_TPwm_Timer12
  • countOneStep : Timer_Functions
  • cout0 : IfxCcu6_PwmHl_Config
  • cout1 : IfxCcu6_PwmHl_Config
  • cout2 : IfxCcu6_PwmHl_Config
  • cout60 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout61 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout62 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout63 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • coutx : IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s
  • coutxActiveState : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • coutxOutputEnabled : IfxStdIf_PwmHl_Config
  • coutxTemp : IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_s
  • cpol : IfxAsclin_Spi_InputOutputControl
  • cr : IfxCif_Cam_MemAreas
  • crc : IfxPsi5_Psi5_FrameData , IfxPsi5_Psi5_Message , IfxPsi5s_Psi5s_ReceivedBits , IfxSent_Sent_SerialMessageFrame
  • crc32BitReflectionEnabled : IfxFce_Crc_CrcConfig
  • crc32Kernel : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • crcCheckCompared : IfxFce_Crc_CrcConfig
  • crcError : IfxHssl_Hssl_errorFlags , IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_ReceivedBits
  • crcErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • crcErrorInterrupt : IfxSent_Sent_Enable
  • crcGenerationControl : IfxPsi5s_Psi5s_TransmitControl
  • crcGenerationEnabled : IfxPsi5_Psi5_TransmitControl
  • crchighbit : Ifc_Crc_Table
  • crcinit_direct : Ifc_Crc
  • crcinit_nondirect : Ifc_Crc
  • crcmask : Ifc_Crc_Table
  • crcMethodDisabled : IfxSent_Sent_ReceiveControl
  • crcMismatch : IfxFce_Crc_EnabledInterrupts
  • crcMode : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • crcModeDisabled : IfxSent_Sent_ReceiveControl
  • crcOrParity : IfxPsi5_Psi5_ReceiveControl , IfxPsi5s_Psi5s_ReceiveControl
  • crcResultInverted : IfxFce_Crc_CrcConfig
  • crctab : Ifc_Crc_Table16 , Ifc_Crc_Table32 , Ifc_Crc_Table8
  • crcxor : Ifc_Crc
  • crs : IfxEth_MiiPins
  • crsDiv : IfxEth_RmiiPins
  • csActiveLevel : SpiIf_ChMode
  • csEnable : IfxAsclin_Lin_LinControl
  • csi : IfxAsclin_Lin_LinControl
  • csInactiveDelay : SpiIf_ChMode
  • csLeadDelay : SpiIf_ChMode
  • cslpPolarity : IfxMsc_Msc_OutputControlConfig
  • csr : IfxFft_Fft_Job_s
  • csTrailDelay : SpiIf_ChMode
  • cts : IfxAsclin_Asc_Pins
  • ctsMode : IfxAsclin_Asc_Pins
  • currentFrameRequest : IfxHssl_Hssl_Channel
  • cursor : Ifx_Shell_CmdLine
  • cutOffFrequency : Ifx_LowPassPt1F32_Config
  • cycleCode : IfxEray_Header
  • cycleNumber : IfxEray_ReceivedHeader


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- d -

  • data : Ifc_Crc_Table16 , Ifc_Crc_Table32 , Ifc_Crc_Table8 , Ifx_DataBufferMode_TimeStampSingle , Ifx_Shell_Command , IfxAsclin_Lin_Config , IfxAsclin_Spi_Job , IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig , IfxEray_Eray_ReceivedFrame , IfxMultican_Message , IfxPsi5s_Psi5s_Frame , IfxSent_Sent_Frame , SpiIf_Job
  • dataBufferMode : IfxAsclin_Asc , IfxAsclin_Asc_Config
  • dataByteReflectionEnabled : IfxFce_Crc_CrcConfig
  • dataCoherent : IfxGtm_Tim_In
  • dataFrameExtensionPassivePhaseLength : IfxMsc_Msc_DownstreamControlExtensionConfig
  • dataFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • dataFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • dataFramePassivePhaseLength : IfxMsc_Msc_DownstreamControlConfig
  • dataHeading : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • dataLength : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_DataControl , IfxAsclin_Lin_PduType , IfxAsclin_Spi_Config
  • dataLengthError : IfxHssl_Hssl_errorFlags
  • dataLost : IfxGtm_Tim_In
  • dataPointer : IfxEray_Header
  • dataPtr : IfxAsclin_Lin_PduType
  • dataReceived : IfxEray_Eray_ReceiveControl
  • dataShift : IfxDsadc_Dsadc_FirFilterConfig
  • dataSize : IfxMtu_SramItem
  • dataTransfered : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • dataWidth : IfxAsclin_Spi , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • DB : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • DBE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • dc : IfxCif_Cam_JpegTable
  • DC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • DE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • deactivateSlso : IfxQspi_SpiMaster_Channel_s
  • deadtime : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • deadTimeValue : IfxCcu6_TPwm_Timer12
  • debugPathEnabled : IfxCif_Cam_Common
  • decimationFactor : IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • decodingCorrection : IfxEray_Eray_Gtu05Config
  • delay : IfxQspi_DelayConst
  • delayLength : IfxPsi5_Psi5_PulseGeneration
  • delta : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • demodulator : IfxDsadc_Dsadc_ChannelConfig
  • denominator : IfxAsclin_Lin_BaudrateGeneration
  • density : IfxCif_Cam_JfifHeader
  • densityX : IfxCif_Cam_JfifHeader
  • densityY : IfxCif_Cam_JfifHeader
  • description : Ifx_Shell_Syntax
  • descriptorMode : IfxEth , IfxEth_Config
  • destinationAddress : IfxDma_Dma_ChannelConfig
  • destinationAddressCircularRange : IfxDma_Dma_ChannelConfig
  • destinationAddressIncrementDirection : IfxDma_Dma_ChannelConfig
  • destinationAddressIncrementStep : IfxDma_Dma_ChannelConfig
  • destinationCircularBufferEnabled : IfxDma_Dma_ChannelConfig
  • deviceAddress : IfxI2c_I2c_Device , IfxI2c_I2c_deviceConfig
  • DIC : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • digitalFrequency : IfxVadc_Adc_Config
  • digitalGlitchFilterDepth : IfxSent_Sent_InputOutputControl
  • digitalInputFilterDepth : IfxPsi5_Psi5_InputOutputControl
  • din : IfxDsadc_Dsadc_ChannelPins
  • dinMode : IfxDsadc_Dsadc_ChannelPins
  • direction : Ifx_AngleTrkF32_PosIf , IfxAsclin_Lin_PduType , IfxGpt12_IncrEnc
  • disablePostCalibration : IfxVadc_Adc_GroupConfig
  • disableUpdate : IfxStdIf_Timer_
  • disableWatchdog : IfxScuWdt_Config
  • discardCount : IfxDsadc_Dsadc_IntegratorConfig
  • discardDmaChannel : IfxFft_Fft
  • discardDmaChannelId : IfxFft_Fft_Config
  • dividerMode : IfxMsc_Msc_Clock
  • dma : IfxDma_Dma , IfxDma_Dma_Channel , IfxDma_Dma_Config , IfxQspi_SpiMaster , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config
  • downscaling : IfxCif_Cam_Config
  • downstreamConfig : IfxMsc_Msc_Config
  • downstreamDataSourcesHigh : IfxMsc_Msc_DownstreamControlConfig
  • downstreamDataSourcesLow : IfxMsc_Msc_DownstreamControlConfig
  • downstreamExtensionConfig : IfxMsc_Msc_Config
  • downstreamExtensionDataSourcesHigh : IfxMsc_Msc_DownstreamControlExtensionConfig
  • downstreamExtensionDataSourcesLow : IfxMsc_Msc_DownstreamControlExtensionConfig
  • DP : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • driftErrorsDisabled : IfxSent_Sent_ReceiveControl
  • driver : IfxQspi_SpiMaster_Output , IfxSent_Sent_Channel , IfxSent_Sent_ChannelConfig , IfxStdIf_DPipe_ , IfxStdIf_Pos_ , IfxStdIf_PwmHl_ , IfxStdIf_Timer_ , SpiIf_ , SpiIf_Ch_ , SpiIf_ChConfig_
  • dsadc : IfxDsadc_Dsadc , IfxDsadc_Dsadc_Config , IfxDsadc_Rdc_Config
  • dsn : IfxDsadc_Dsadc_ChannelPins
  • dsnMode : IfxDsadc_Dsadc_ChannelPins
  • dsp : IfxDsadc_Dsadc_ChannelPins
  • dspMode : IfxDsadc_Dsadc_ChannelPins
  • dummyRxValue : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • dummyTxValue : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • dutyCycle : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • dynamicActionPoint : IfxEray_Eray_Gtu09Config
  • dynamicSlotCount : IfxEray_Eray_Gtu08Config
  • dynamicSlotLength : IfxEray_Eray_Gtu08Config


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- e -

  • EC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • eccInvPos0 : IfxMtu_SramItem
  • eccInvPos1 : IfxMtu_SramItem
  • eccSize : IfxMtu_SramItem
  • echo : Ifx_Shell_Config , Ifx_Shell_Flags , Ifx_Shell_Runtime
  • echoError : Ifx_Shell_Flags
  • ED : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • edgeCount : IfxGtm_Tim_In
  • edgeCounterCleared : IfxSent_Sent_InputOutputControl
  • edgeCounterUpper : IfxGtm_Tim_In
  • elementSize : _Fifo
  • emem : IfxCif_Cam
  • emergencyEnabled : IfxStdIf_PwmHl_Config
  • emergencyStopEnableBits : IfxMsc_Msc_DownstreamControlConfig
  • emergencyStopEnabled : IfxSmu_configFsp
  • emergencyStopExtensionEnableBits : IfxMsc_Msc_DownstreamControlExtensionConfig
  • emuxInterface : IfxVadc_Adc_EmuxControl
  • emuxOutPinConfig : IfxVadc_Adc_EmuxControl
  • en0 : IfxMsc_Msc_Io
  • en1 : IfxMsc_Msc_Io
  • en2 : IfxMsc_Msc_Io
  • en3 : IfxMsc_Msc_Io
  • enable : IfxSent_Sent_EnabledInterrupts
  • enableAutomaticPasswordChange : IfxScuWdt_Config
  • enabled : Ifx_Shell_Flags , IfxCif_Cam_Downscaling , IfxDsadc_Dsadc_RectifierConfig , IfxDsadc_Rdc_Ts , IfxMultican_Can_InterruptSource , IfxStdIf_Timer_TrigConfig , SpiIf_ChMode
  • enabledInterrupt : IfxAsclin_Lin_InterruptConfig
  • enabledInterrupts : IfxFce_Crc_CrcConfig , IfxSent_Sent_ChannelConfig
  • enableFaultToRunStateTransition : IfxSmu_configFsp
  • enableSecureLock : IfxDts_Dts_Config
  • enableSmuRestriction : IfxScuWdt_Config
  • enableTimerCheck : IfxScuWdt_Config
  • enableTimerCheckTolerance : IfxScuWdt_Config
  • enableTransmit : IfxMultican_Can_GatewayConfig
  • end : IfxFlash_flashSector , IfxHssl_Hssl_AccessWindow
  • endIndex : _Fifo
  • ENDIS_CTRL : IfxGtm_Tom_TGC
  • ENDIS_STAT : IfxGtm_Tom_TGC
  • endPulseIgnored : IfxSent_Sent_ReceiveControl
  • enhancedProtocolSelected : IfxPsi5_Psi5_TransmitControl
  • enhancedProtocolSelection : IfxPsi5s_Psi5s_TransmitControl
  • entry : IfxCif_Cam_TableInfo
  • ep : IfxCif_Cam_MemAreas
  • eray : IfxEray_Eray
  • erPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • error : IfxEth
  • errorChecks : SpiIf_Ch_ , SpiIf_ChConfig_
  • errorFlag0 : IfxPsi5s_Psi5s_ReceivedBits
  • errorFlag1 : IfxPsi5s_Psi5s_ReceivedBits
  • errorFlags : IfxAsclin_Asc , IfxAsclin_Asc_Config , IfxAsclin_Spi , IfxHssl_Hssl , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiSlave
  • errorFlagsStatus : IfxAsclin_Lin
  • errorInterruptNode : IfxSent_Sent_InterruptNodeControl
  • errorThreshold : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • errorType : IfxFlash_ErrorTracking_Address
  • errorWarningLevel : IfxMultican_Can_NodeConfig
  • ES : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits
  • escBracketNum : Ifx_Shell_Runtime
  • ethSfr : IfxEth , IfxEth_Config
  • event : IfxIom_Driver_LamConfig
  • eventGate : IfxDsadc_Dsadc_AuxFilterConfig
  • eventReader : _Fifo
  • eventSelect : IfxDsadc_Dsadc_AuxFilterConfig
  • eventWindow : IfxIom_Driver_LamConfig
  • eventWriter : _Fifo
  • exBreakDetected : IfxAsclin_Lin_EnabledInterrupts
  • exchange : SpiIf_funcs
  • exCollisionDetectionError : IfxAsclin_Lin_EnabledInterrupts
  • execute : Ifx_Shell_Protocol
  • exFramingError : IfxAsclin_Lin_EnabledInterrupts
  • exHeaderTimeout : IfxAsclin_Lin_EnabledInterrupts
  • exLinAutobaudDetectionError : IfxAsclin_Lin_EnabledInterrupts
  • exLinChecksumError : IfxAsclin_Lin_EnabledInterrupts
  • exLinParityError : IfxAsclin_Lin_EnabledInterrupts
  • expect : IfxFft_Fft_Count64
  • expectedCrc : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • expectTimeoutError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • exPriority : IfxAsclin_Lin_InterruptConfig
  • exReceiveFIFOOverflow : IfxAsclin_Lin_EnabledInterrupts
  • exResponseTimeout : IfxAsclin_Lin_EnabledInterrupts
  • ext : IfxEth_AltRxDescr0_Bits
  • extClockEnabled : IfxCcu6_Icu_Clock
  • extClockInput : IfxCcu6_Icu_Clock
  • extendedFrame : IfxMultican_Can_MsgObjControl
  • extendedSerialFrameMode : IfxSent_Sent_ReceiveControl
  • extension : IfxMsc_Msc_DownstreamControlExtensionConfig
  • externalOffset : IfxEray_Eray_Gtu11Config
  • externalOffsetCorrection : IfxEray_Eray_Gtu11Config
  • externalRate : IfxEray_Eray_Gtu11Config
  • externalRateCorrection : IfxEray_Eray_Gtu11Config
  • externalSignalInjectionPin0 : IfxMsc_Msc_DownstreamControlConfig
  • externalSignalInjectionPin1 : IfxMsc_Msc_DownstreamControlConfig
  • externalTimeBaseSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5_Psi5_TimeStampConfig , IfxPsi5s_Psi5s_PulseGeneration , IfxPsi5s_Psi5s_TimeStampConfig
  • externalTrigger : IfxSent_Sent_InputOutputControl
  • externalTriggerSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5s_Psi5s_PulseGeneration
  • extInputTrigger : IfxCcu6_Icu_TriggerConfig
  • extInputTriggerMode : IfxCcu6_Icu_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • exTransmissionCompleted : IfxAsclin_Lin_EnabledInterrupts
  • exTransmitFIFOOverflow : IfxAsclin_Lin_EnabledInterrupts
  • extraPaths : IfxCif_Cam_Common


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- f -

  • fallingEdgeFilterTime : IfxGtm_Tim_In_ConfigFilter , IfxIom_Driver_LamFilterConfig
  • fallingEdgeMode : IfxGtm_Tim_In_ConfigFilter
  • fastBaudrate : IfxMultican_Can_FdConfig
  • fastBitRate : IfxMultican_Can_MsgObjControl , IfxMultican_Message
  • fastClock : IfxPsi5_Psi5_Config
  • fastNode : IfxMultican_Can_Node
  • fastSamplePoint : IfxMultican_Can_FdConfig
  • fastSynchJumpWidth : IfxMultican_Can_FdConfig
  • faultFreeStateFrequencyMax : IfxSmu_configFsp
  • faultFreeStateFrequencyMin : IfxSmu_configFsp
  • faultStateTime : IfxSmu_configFsp
  • fce : IfxFce_Crc , IfxFce_Crc_Config , IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • fclClockControl : IfxMsc_Msc_OutputControlConfig
  • fcln : IfxMsc_Msc_Io
  • fclp : IfxMsc_Msc_Io
  • fclpPolarity : IfxMsc_Msc_OutputControlConfig
  • fdConfig : IfxMultican_Can_NodeConfig
  • FF : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • fft : IfxFft_Fft , IfxFft_Fft_Config , IfxFft_Fft_Job_s , IfxFft_Fft_JobConfig
  • fftLength : IfxFft_Fft_JobConfig
  • fifo : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config
  • fifoBufferStartIndex : IfxEray_Eray_MessageRAMConfig
  • fifoConfigured : IfxEray_Eray_MessageRAMConfig
  • fifoDepth : IfxEray_Eray_MessageRAMConfig
  • fifoNullFramesRejected : IfxEray_Eray_MessageRAMConfig
  • fifoPointer : IfxMultican_Can_MsgObj
  • fifoWarningLevel : IfxPsi5_Psi5_ReceiveControl
  • filter : IfxGtm_Tim_In_Config , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig
  • filterDepth : IfxAsclin_Lin_BitSamplingControl
  • filteredCycleNumber : IfxEray_Eray_MessageRAMConfig
  • fir0Enabled : IfxDsadc_Dsadc_FirFilterConfig
  • fir1Enabled : IfxDsadc_Dsadc_FirFilterConfig
  • firFilter : IfxDsadc_Dsadc_ChannelConfig
  • firstDynamicBuffer : IfxEray_Eray_MessageRAMConfig
  • firstSlaveObjId : IfxMultican_Can_MsgObjConfig
  • firstWrite : IfxQspi_SpiMaster_Channel_s
  • FL : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • flags : IfxAsclin_Asc_ErrorFlagsUnion , IfxAsclin_Lin_FrameDataControl , IfxFft_Fft , SpiIf_Ch_
  • flashFconWaitStateConfig : IfxScuCcu_Config
  • flexibleDataRate : IfxMultican_Can_NodeConfig
  • flushQueueAfterInit : IfxVadc_Adc_QueueConfig
  • flushTx : IfxStdIf_DPipe_
  • fracDiv : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • fractionalDividerEnabled : IfxPsi5s_Psi5s_AscConfig
  • frame : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxMultican_Can_MsgObjConfig , IfxPsi5_Psi5_Frame
  • frameCheckMode : IfxSent_Sent_ReceiveControl
  • frameCounterInterrupt : IfxMultican_Can_NodeConfig
  • frameError : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • frameExpectation : IfxPsi5_Psi5_ReceiveControl
  • frameId : IfxEray_Header , IfxEray_ReceivedHeader , IfxPsi5s_Psi5s_ReceivedBits
  • frameIdFilter : IfxEray_Eray_MessageRAMConfig
  • frameIdSelect : IfxPsi5s_Psi5s_ReceiveControl
  • frameLength : IfxSent_Sent_ReceiveControl
  • frameMode : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config
  • frameTimestampSelect : IfxPsi5_Psi5_ReceiveControl
  • framingCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • framingErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • frequency : Icu_Config , Icu_s , IfxCcu6_Icu_Config , IfxDsadc_Dsadc_CarrierGenConfig , IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock , IfxStdIf_Timer_Config , TPwm_Config , TPwm_s
  • frequencyDriftErrorInterrupt : IfxSent_Sent_Enable
  • frequencyRangeErrorInterrupt : IfxSent_Sent_Enable
  • FS : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr1_Bits
  • FT : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • functions : SpiIf_
  • FUPD_CTRL : IfxGtm_Tom_TGC


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- g -

  • gain : Ifx_LowPassPt1F32_Config , Ifx_LutIndexedLinearF32_Item , Ifx_LutLinearF32_Item
  • gatewayConfig : IfxMultican_Can_MsgObjConfig
  • gatewayDstObjId : IfxMultican_Can_GatewayConfig
  • gatewayTransfers : IfxMultican_Can_MsgObjConfig
  • gatingMode : IfxVadc_Adc_GatingTriggerConfig
  • gatingSource : IfxVadc_Adc_GatingTriggerConfig
  • getAbsolutePosition : IfxStdIf_Pos_
  • getDeadtime : IfxStdIf_PwmHl_
  • getDeadtimeTick : IfxStdIf_PwmHl_
  • getDirection : IfxStdIf_Pos_
  • getFault : IfxStdIf_Pos_
  • getFrequency : IfxStdIf_Timer_
  • getInputFrequency : IfxStdIf_Timer_
  • getMinPulse : IfxStdIf_PwmHl_
  • getMode : IfxStdIf_PwmHl_
  • getOffset : IfxStdIf_Pos_
  • getPeriod : IfxStdIf_Timer_
  • getPeriodPerRotation : IfxStdIf_Pos_
  • getPosition : IfxStdIf_Pos_
  • getRawPosition : IfxStdIf_Pos_
  • getReadCount : IfxStdIf_DPipe_
  • getReadEvent : IfxStdIf_DPipe_
  • getRefreshPeriod : IfxStdIf_Pos_
  • getResolution : IfxStdIf_Pos_ , IfxStdIf_Timer_
  • getSendCount : IfxStdIf_DPipe_
  • getSensorType : IfxStdIf_Pos_
  • getSpeed : IfxStdIf_Pos_
  • getStatus : SpiIf_funcs
  • getTimeStamp : Icu_Functions
  • getTrigger : IfxStdIf_Timer_
  • getTurn : IfxStdIf_Pos_
  • getTxTimeStamp : IfxStdIf_DPipe_
  • getWriteCount : IfxStdIf_DPipe_
  • getWriteEvent : IfxStdIf_DPipe_
  • GLB_CTRL : IfxGtm_Tom_TGC
  • glitch : IfxGtm_Tim_In
  • glitchFallingCleared : IfxSent_Sent_InputOutputControl
  • glitchRisingCleared : IfxSent_Sent_InputOutputControl
  • globalControlConfig : IfxPsi5s_Psi5s_Config
  • globalInputClass : IfxVadc_Adc_Config
  • globalResultUsage : IfxVadc_Adc_ChannelConfig
  • group : IfxVadc_Adc_Channel , IfxVadc_Adc_ChannelConfig , IfxVadc_Adc_Group
  • groupDelay : IfxDsadc_Rdc
  • groupId : IfxVadc_Adc_EmuxControl , IfxVadc_Adc_Group , IfxVadc_Adc_GroupConfig , IfxVadc_GxBfl_Out , IfxVadc_Vadcg_In
  • gtm : IfxDsadc_Rdc_GtmTimestamp , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tim_In_Config , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config
  • gtmTimestamp : IfxDsadc_Rdc_ConfigHw
  • gtu01Config : IfxEray_Eray_GTUConfig
  • gtu02Config : IfxEray_Eray_GTUConfig
  • gtu03Config : IfxEray_Eray_GTUConfig
  • gtu04Config : IfxEray_Eray_GTUConfig
  • gtu05Config : IfxEray_Eray_GTUConfig
  • gtu06Config : IfxEray_Eray_GTUConfig
  • gtu07Config : IfxEray_Eray_GTUConfig
  • gtu08Config : IfxEray_Eray_GTUConfig
  • gtu09Config : IfxEray_Eray_GTUConfig
  • gtu10Config : IfxEray_Eray_GTUConfig
  • gtu11Config : IfxEray_Eray_GTUConfig
  • gtuConfig : IfxEray_Eray_ControllerConfig


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- h -

  • halfTs : Ifx_AngleTrkF32
  • hallPatternIndex : IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config
  • hallSyncEvent : IfxCcu6_PwmBc_Config
  • hardware : IfxDsadc_Rdc , IfxDsadc_Rdc_Config
  • hardwareRequestEnabled : IfxDma_Dma_ChannelConfig
  • header : IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig , IfxEray_Eray_ReceivedFrame
  • headerCrc : IfxEray_ReceivedHeader
  • headerErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • headerErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • headerID : IfxAsclin_Lin_FrameDataControl
  • headerOnly : IfxAsclin_Lin_DataControl
  • headerReceived : IfxEray_Eray_ReceiveControl
  • headerTimeout : IfxAsclin_Lin_ErrorFlags , IfxAsclin_Lin_LinControl
  • headerTransfered : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • help : Ifx_Shell_Command
  • hFactor : IfxCif_Cam_Downscaling
  • highPhaseOfShiftClock : IfxMsc_Msc_Abra
  • highSpeedMode : IfxHssl_Hsct_Config
  • highWord : IfxPsi5_Psi5_Rdm
  • historyAdd : Ifx_Shell_CmdLine
  • historyItem : Ifx_Shell_CmdLine
  • hMode : IfxCif_Cam_Downscaling
  • hOffset : IfxCif_Cam_MemConfig , IfxCif_Cam_PictureInfo
  • hookFunction : IfxScuCcu_PllStepsConfig
  • hours : Ifx_DateTime
  • hsct : IfxHssl_Hsct , IfxHssl_Hsct_Config , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • hSize : IfxCif_Cam_MemConfig , IfxCif_Cam_PictureInfo
  • hssl : IfxHssl_Hssl , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig , IfxHssl_Hssl_Config
  • hSyncPolarity : IfxCif_Cam_Config


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- i -

  • i2c : IfxI2c_I2c , IfxI2c_I2c_Config , IfxI2c_I2c_Device , IfxI2c_I2c_deviceConfig
  • ibusyIsrProvider : IfxEray_Eray_Interrupt
  • ibusyPriority : IfxEray_Eray_Interrupt
  • IC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • id : IfxMultican_Message
  • ident : IfxCif_Cam_JfifHeader
  • idleDelay : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • idleDynamicSlots : IfxEray_Eray_Gtu09Config
  • idleTime : IfxPsi5s_Psi5s_GlobalControlConfig
  • IHE : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • ik : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • imag : cfloat32 , cfract , csfract , csint16 , csint32
  • image : IfxCif_Cam_MemInfo
  • immediateStartEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • in : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • index : Ifx_CircularBuffer , IfxModule_IndexMap
  • inhibitingAutomaticTransferEnabled : IfxPsi5_Psi5_TransmitControl
  • initPins : IfxGpt12_IncrEnc_Config , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_Timer_Config
  • inj0 : IfxMsc_Msc_Io
  • inj1 : IfxMsc_Msc_Io
  • injectionPositionPin0 : IfxMsc_Msc_DownstreamControlConfig
  • injectionPositionPin1 : IfxMsc_Msc_DownstreamControlConfig
  • inMode : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • input : IfxFft_Fft_Count64 , IfxGtm_Tim_In_ConfigFilter , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig , IfxQspi_SpiMaster_InputOutput
  • inputbuffer : Ifx_Shell_Runtime
  • inputClass : IfxVadc_Adc_ChannelConfig , IfxVadc_Adc_GroupConfig
  • inputConfig : IfxDsadc_Rdc_ConfigHw
  • inputCos : IfxDsadc_Rdc_ConfigHw , IfxDsadc_Rdc_Hw
  • inputDataSource : IfxDsadc_Dsadc_DemodulatorConfig
  • inputDmaChannel : IfxFft_Fft
  • inputDmaChannelId : IfxFft_Fft_Config
  • inputFormat : IfxFft_Fft_JobConfig
  • inputFrequency : IfxScuWdt_Config
  • inputGain : IfxDsadc_Dsadc_ModulatorConfig
  • inputIdx : IfxFft_Fft
  • inputInterface : IfxCif_Cam_Common
  • inputInverterEnabled : IfxPsi5_Psi5_InputOutputControl
  • inputLength : IfxFft_Fft_JobConfig
  • inputMode : IfxCcu6_PwmBc_Pins
  • inputOutput : IfxAsclin_Spi_Config
  • inputOutputControl : IfxPsi5_Psi5_ChannelConfig , IfxSent_Sent_ChannelConfig
  • inputPin : IfxDsadc_Dsadc_ModulatorConfig , IfxGtm_Tim_In_ConfigFilter
  • inputPinMode : IfxGtm_Tim_In_ConfigFilter
  • inputPriority : IfxFft_Fft_Config
  • inputPtr : IfxFft_Fft_Job_s , IfxFft_Fft_JobConfig
  • inputPulsePolarityHigh : IfxSent_Sent_InputOutputControl
  • inputSin : IfxDsadc_Rdc_ConfigHw , IfxDsadc_Rdc_Hw
  • inSeconds : IfxDsadc_Rdc_Ts
  • inSelect : IfxEth_Mdio_InOut , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut
  • instruction : IfxCpu_Perf
  • instructionErrors : IfxCpu_Trap_Id
  • int0IsrProvider : IfxEray_Eray_Interrupt
  • int0Priority : IfxEray_Eray_Interrupt
  • int1IsrProvider : IfxEray_Eray_Interrupt
  • int1Priority : IfxEray_Eray_Interrupt
  • INT_TRIG : IfxGtm_Tom_TGC
  • integrationCount : IfxDsadc_Dsadc_IntegratorConfig
  • integrationCycles : IfxDsadc_Dsadc_IntegratorConfig
  • integrationTrigger : IfxDsadc_Dsadc_DemodulatorConfig
  • integrator : IfxDsadc_Dsadc_ChannelConfig
  • interfaceMode : IfxHssl_Hsct_Config
  • internalProtection : IfxCpu_Trap_Id
  • internalShift : IfxDsadc_Dsadc_FirFilterConfig
  • interrupt : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxEray_Eray_Config , IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config , IfxSent_Sent_ChannelConfig
  • interrupt1 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt2 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt3 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt4 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interruptConfig : IfxMsc_Msc_Config
  • interruptRaiseThreshold : IfxDma_Dma_ChannelConfig
  • interuptNodeControl : IfxSent_Sent_ChannelConfig
  • inTicks : IfxDsadc_Rdc_Ts
  • intraIdx : IfxFft_Fft
  • intraPriority : IfxFft_Fft_Config
  • inverted : IfxCcu6_PwmHl_Base , IfxCcu6_PwmHl_Mode , IfxDsadc_Dsadc_CarrierGenConfig , IfxGtm_Atom_PwmHl_Base , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Tom_PwmHl_Base , IfxGtm_Tom_PwmHl_Mode , IfxIom_Driver_LamEventWindowConfig , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig
  • inWidth : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • io : Ifx_Shell , IfxMsc_Msc_Config
  • iomDriver : IfxIom_Driver_Lam , IfxIom_Driver_LamConfig
  • IPC : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • irqMode : IfxGtm_Tim_In_Config
  • irqModeTimer : IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • irqModeTrigger : IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • irqOnCntOverflow : IfxGtm_Tim_In_ConfigCapture
  • irqOnDatalost : IfxGtm_Tim_In_ConfigCapture
  • irqOnEcntOverflow : IfxGtm_Tim_In_ConfigCapture
  • irqOnGlitch : IfxGtm_Tim_In_ConfigFilter
  • irqOnNewVal : IfxGtm_Tim_In_ConfigCapture
  • irqOnTimeout : IfxGtm_Tim_In_ConfigTimeout
  • isInterruptMode : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • ispBpp : IfxCif_Cam
  • ispIn : IfxCif_Cam_Common
  • ispInterrupt : IfxCif_Cam_Common
  • ispMode : IfxCif_Cam , IfxCif_Cam_Config
  • ispRawBpp : IfxCif_Cam_Config
  • isrCount : IfxEth
  • isrPriority : IfxDts_Dts_Config , IfxEth_Config , IfxFce_Crc_Config , IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tim_In_Config , IfxGtm_Tom_Pwm_Interrupt , IfxStdIf_Timer_Config , IfxStdIf_Timer_TrigConfig
  • isrProvider : IfxEth_Config , IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tim_In_Config , IfxGtm_Tom_Pwm_Interrupt , IfxSent_Sent_Interrupt , IfxStdIf_Timer_Config , IfxStdIf_Timer_TrigConfig , SpiIf_Config
  • isrRxCount : IfxEth
  • isrTxCount : IfxEth
  • isrTypeOfService : IfxDts_Dts_Config , IfxFce_Crc_Config
  • items : IfxEth_RxDescrList , IfxEth_TxDescrList
  • itr : IfxDsadc_Dsadc_ChannelPins
  • itrMode : IfxDsadc_Dsadc_ChannelPins


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- j -

  • jfif : IfxCif_Cam
  • job : IfxFft_Fft
  • jpegEnabled : IfxCif_Cam_Common
  • jpegTables : IfxCif_Cam_Common
  • JT : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- k -

  • k2Initial : IfxScuCcu_InitialStepConfig
  • k2Step : IfxScuCcu_PllStepsConfig
  • kd : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • ki : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • kp : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- l -

  • lamUsedMask : IfxIom_Driver
  • lastErrorCodeInterrupt : IfxMultican_Can_NodeConfig
  • latestTransmissionStart : IfxEray_Eray_ControllerConfig
  • LC : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits
  • LE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • leadDelay : IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • length : Ifx_CircularBuffer , Ifx_Shell_CmdLine , IfxCif_Cam_JfifHeader , IfxCif_Cam_TableInfo
  • lengthCode : IfxMultican_Message
  • lengthError : IfxFce_Crc_EnabledInterrupts
  • limitCheck : IfxVadc_Adc_ChannelConfig
  • lin : IfxAsclin_Lin_Config
  • linAutobaudDetectionError : IfxAsclin_Lin_ErrorFlags
  • linChecksumError : IfxAsclin_Lin_ErrorFlags
  • linFrameData : IfxAsclin_Lin
  • linMode : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • linParityError : IfxAsclin_Lin_ErrorFlags
  • listenTimeOut : IfxEray_Eray_Succ2Config
  • listenTimeOutNoise : IfxEray_Eray_Succ2Config
  • lmu : IfxFft_Fft , IfxFft_Fft_Config
  • LOC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • locals : Ifx_Shell
  • loopBack : IfxAsclin_Asc_Config , IfxAsclin_Spi_InputOutputControl , IfxHssl_Hsct , IfxHssl_Hsct_Config , IfxHssl_Hssl , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • loopback : SpiIf_ChMode
  • loopbackEnabled : IfxPsi5s_Psi5s_AscConfig
  • loopBackMode : IfxMultican_Can_NodeConfig
  • loopDelayOffset : IfxMultican_Can_FdConfig
  • lowerBoundary : IfxVadc_Adc_ChannelConfig
  • lowerLimit : IfxAsclin_Lin_BaudrateDetection
  • lowerTemperatureLimit : IfxDts_Dts_Config
  • lowPhaseOfShiftClock : IfxMsc_Msc_Abra
  • lowPowerSupply : IfxDsadc_Dsadc_Config
  • lowWord : IfxPsi5_Psi5_Rdm
  • LS : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr1_Bits


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- m -

  • macAddress : IfxEth_Config
  • macroticksPerCycle : IfxEray_Eray_Gtu02Config
  • mainPath : IfxCif_Cam_Common
  • mask : Ifx_InternalMux_MuxConfig , IfxScuCcu_CcuconRegConfig , IfxScuCcu_FlashWaitstateConfig
  • masks : IfxPort_Esr_Masks
  • master : IfxVadc_Adc_GroupConfig
  • matchingId : IfxMultican_Can_MsgObjControl
  • maxColdStartAttempts : IfxEray_Eray_Succ1Config
  • maxcount : Ifx_Fifo_Shared
  • maxDriftOffset : IfxEray_Eray_Gtu06Config
  • maximumBaudrate : IfxQspi_SpiMaster , SpiIf_Config
  • maxOffsetCorrection : IfxEray_Eray_Gtu10Config
  • maxPulse : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base
  • maxRateCorrection : IfxEray_Eray_Gtu10Config
  • maxSpeed : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • maxSyncFrames : IfxEray_Eray_Gtu02Config
  • maxTicks : IfxDsadc_Rdc_Ts
  • mbistDelay : IfxMtu_SramItem
  • mbsc0IsrProvider : IfxEray_Eray_Interrupt
  • mbsc0Priority : IfxEray_Eray_Interrupt
  • mbsc1IsrProvider : IfxEray_Eray_Interrupt
  • mbsc1Priority : IfxEray_Eray_Interrupt
  • mcan : IfxMultican_Can , IfxMultican_Can_Node
  • mdc : IfxEth_MiiPins , IfxEth_RmiiPins
  • mdio : IfxEth_MiiPins , IfxEth_RmiiPins
  • measured : IfxAsclin_Lin_BaudrateDetection
  • medianFilter : IfxAsclin_Asc_BitTimingControl , IfxAsclin_Lin_BitSamplingControl , IfxAsclin_Spi_BitSamplingControl
  • memAreas : IfxCif_Cam
  • memFactor : IfxCif_Cam_MemConfig
  • memoryAccessViolation : IfxHssl_Hssl_errorFlags
  • memoryManagement : IfxCpu_Trap_Id
  • message : IfxPsi5_Psi5_SerialMessage
  • messageId : IfxMultican_Can_MsgObjConfig , IfxPsi5_Psi5_Message , IfxSent_Sent_SerialMessageFrame
  • messageLen : IfxMultican_Can_MsgObjControl
  • messageRAMConfig : IfxEray_Eray_NodeConfig
  • messagingBitsError : IfxPsi5_Psi5_FrameData
  • messagingBitsPresence : IfxPsi5_Psi5_ReceiveControl
  • microticksPerCycle : IfxEray_Eray_Gtu01Config
  • miiPins : IfxEth_Config
  • minPulse : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • minResolution : IfxStdIf_Timer_Config
  • minSpeed : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • minutes : Ifx_DateTime
  • mode : IfxCcu6_PwmHl_Base , IfxCcu6_PwmHl_Mode , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Atom_PwmHl_Base , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Tim_In_ConfigCapture , IfxGtm_Tom_Pwm_Interrupt , IfxGtm_Tom_PwmHl_Base , IfxGtm_Tom_PwmHl_Mode , IfxIom_Driver_LamFilterConfig , IfxMsc_Msc_en , IfxMsc_Msc_fcln , IfxMsc_Msc_fclp , IfxMsc_Msc_inj0 , IfxMsc_Msc_inj1 , IfxMsc_Msc_sdi , IfxMsc_Msc_son , IfxMsc_Msc_sop , IfxPort_Io_ConfigPin , IfxPort_Pin_Config , IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig , IfxQspi_SpiMaster_Input , IfxQspi_SpiMaster_Output , IfxSmu_configFsp , IfxVadc_Adc_EmuxControl , SpiIf_ChConfig_ , SpiIf_Config
  • modulator : IfxDsadc_Dsadc_ChannelConfig
  • modulatorClockFreq : IfxDsadc_Dsadc_ModulatorConfig
  • modulatorClockSelect : IfxDsadc_Dsadc_Config
  • module : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxCif_Clk_In , IfxCif_D_In , IfxCif_Hsnc_In , IfxCif_Vsnc_In , IfxDma_Dma_ChannelConfig , IfxDsadc_Cgpwm_Out , IfxDsadc_Cin_In , IfxDsadc_Cout_Out , IfxDsadc_Din_In , IfxDsadc_Dsadc_Channel , IfxDsadc_Dsadc_ChannelConfig , IfxDsadc_Dsn_In , IfxDsadc_Dsp_In , IfxDsadc_Itr_In , IfxDsadc_Sg_In , IfxEray_Eray_Config , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEth_Col_In , IfxEth_Crs_In , IfxEth_Crsdv_In , IfxEth_Mdc_Out , IfxEth_Mdio_InOut , IfxEth_Refclk_In , IfxEth_Rxclk_In , IfxEth_Rxd_In , IfxEth_Rxdv_In , IfxEth_Rxer_In , IfxEth_Txclk_In , IfxEth_Txd_Out , IfxEth_Txen_Out , IfxEth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_IncrEnc , IfxGpt12_IncrEnc_Config , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Clk_Out , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut , IfxIom_Driver , IfxIom_Driver_Config , IfxModule_IndexMap , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxMultican_Can_Config , IfxMultican_Can_NodeConfig , IfxMultican_Rxd_In , IfxMultican_Txd_Out , IfxPsi5_Psi5_Channel , IfxPsi5_Psi5_ChannelConfig , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Psi5s_Channel , IfxPsi5s_Psi5s_ChannelConfig , IfxPsi5s_Psi5s_Config , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Hwcfg_In , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_Config , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out , IfxVadc_Adc_Group , IfxVadc_Adc_GroupConfig , IfxVadc_Emux_Out , IfxVadc_GxBfl_Out , IfxVadc_Vadcg_In
  • moduleFreq : IfxMultican_Can_Config
  • moduleFrequency : IfxVadc_Adc_Config
  • mon : IfxIom_Driver_LamConfig
  • monIndex : IfxIom_Driver_Lam
  • monInput : IfxIom_Driver_Lam
  • moveSize : IfxDma_Dma_ChannelConfig
  • mrst : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • mrstMode : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • msc : IfxMsc_Msc , IfxMsc_Msc_Config
  • msgObjCount : IfxMultican_Can_MsgObj , IfxMultican_Can_MsgObjConfig
  • msgObjId : IfxMultican_Can_MsgObj , IfxMultican_Can_MsgObjConfig
  • mtsr : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • mtsrMode : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • multiChannelControl : IfxCcu6_PwmBc_Config
  • multiInputCaptureEnabled : IfxCcu6_Icu_ChannelConfig
  • muxConfig : Ifx_InternalMux_Config


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- n -

  • name : Ifx_GlobalResources_Item
  • NC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • ndat0IsrProvider : IfxEray_Eray_Interrupt
  • ndat0Priority : IfxEray_Eray_Interrupt
  • ndat1IsrProvider : IfxEray_Eray_Interrupt
  • ndat1Priority : IfxEray_Eray_Interrupt
  • nDivider : IfxScuCcu_InitialStepConfig
  • nDividerAbra : IfxMsc_Msc_Abra
  • nDividerDownstream : IfxMsc_Msc_DownstreamControlExtensionConfig
  • negativeInput : IfxDsadc_Dsadc_ModulatorConfig
  • networkStartIdleTime : IfxEray_Eray_Gtu04Config
  • networkVectorLength : IfxEray_Eray_ControllerConfig
  • newData : IfxGtm_Tim_In
  • nextFreeAddress : IfxCif_Cam
  • nextJob : IfxFft_Fft_Job_s
  • nibbleControl : IfxSent_Sent_ChannelConfig
  • nibblePointer0 : IfxSent_Sent_NibbleControl
  • nibblePointer1 : IfxSent_Sent_NibbleControl
  • nibblePointer2 : IfxSent_Sent_NibbleControl
  • nibblePointer3 : IfxSent_Sent_NibbleControl
  • nibblePointer4 : IfxSent_Sent_NibbleControl
  • nibblePointer5 : IfxSent_Sent_NibbleControl
  • nibblePointer6 : IfxSent_Sent_NibbleControl
  • nibblePointer7 : IfxSent_Sent_NibbleControl
  • nibblesValueOutOfRangeErrorInterrupt : IfxSent_Sent_Enable
  • nibblesWrongErrorInterrupt : IfxSent_Sent_Enable
  • node : IfxMultican_Can_MsgObj , IfxMultican_Can_MsgObjConfig , IfxMultican_Can_Node
  • nodeAPins : IfxEray_Eray_Pins
  • nodeBPins : IfxEray_Eray_Pins
  • nodeId : IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxMultican_Can_Node , IfxMultican_Can_NodeConfig , IfxMultican_Rxd_In , IfxMultican_Txd_Out
  • nodePointer : IfxMultican_Can_Config
  • noFrameReceivedError : IfxPsi5_Psi5_FrameData
  • noiseFilter : PwmHl_Config
  • nominalBaudrate : IfxMultican_Can_FdConfig
  • nominalSamplePoint : IfxMultican_Can_FdConfig
  • nominalSynchJumpWidth : IfxMultican_Can_FdConfig
  • nonMaskableInterrupt : IfxCpu_Trap_Id
  • notAcknowledgeError : IfxHssl_Hssl_errorFlags
  • nullFrameIndicator : IfxEray_ReceivedHeader
  • numberOfBitsError : IfxPsi5_Psi5_FrameData
  • numberOfCyclePairsForActive : IfxEray_Eray_Succ1Config
  • numberOfFramesExpected : IfxPsi5s_Psi5s_ReceiveControl
  • numberOfMessageBuffers : IfxEray_Eray_MessageRAMConfig
  • numBlocks : IfxMtu_SramItem
  • numerator : IfxAsclin_Lin_BaudrateGeneration
  • numOfPllDividerSteps : IfxScuCcu_SysPllConfig


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- o -

  • object : Ifx_Shell_Protocol
  • obusyIsrProvider : IfxEray_Eray_Interrupt
  • obusyPriority : IfxEray_Eray_Interrupt
  • OE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • offset : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , Ifx_LutIndexedLinearF32_Item , Ifx_LutLinearF32_Item , IfxDsadc_Rdc_Config , IfxGpt12_IncrEnc , IfxGtm_Atom_Timer , IfxGtm_Tom_Timer , IfxStdIf_Pos_Config
  • offsetCompensation : IfxDsadc_Dsadc_FirFilterConfig
  • onError : IfxStdIf_DPipe_ , SpiIf_funcs
  • oneShotModeEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • onEventA : IfxStdIf_Pos_
  • onExchangeEnd : SpiIf_Ch_
  • onReceive : IfxStdIf_DPipe_
  • onRx : SpiIf_funcs
  • onStart : Ifx_Shell_Protocol
  • onStartData : Ifx_Shell_Protocol
  • onTransfer : IfxQspi_SpiSlave , SpiIf_Flags
  • onTransmit : IfxStdIf_DPipe_
  • onTx : SpiIf_funcs
  • onZeroIrq : IfxStdIf_Pos_
  • operation : IfxFft_Fft_JobConfig
  • operationMode : IfxDma_Dma_ChannelConfig
  • order : Ifc_Crc_Table
  • out : Ifx_LowPassPt1F32 , IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • OUTEN_CTRL : IfxGtm_Tom_TGC
  • OUTEN_STAT : IfxGtm_Tom_TGC
  • outMode : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • output : IfxFft_Fft_Count64 , IfxQspi_SpiMaster_InputOutput
  • outputClock : IfxDsadc_Rdc_ConfigHw
  • outputControlConfig : IfxMsc_Msc_Config
  • outputDmaChannel : IfxFft_Fft
  • outputDmaChannelId : IfxFft_Fft_Config
  • outputDriver : IfxStdIf_PwmHl_Config , IfxStdIf_Timer_TrigConfig
  • outputEnabled : IfxStdIf_Timer_TrigConfig
  • outputFormat : IfxFft_Fft_JobConfig
  • outputInverterEnabled : IfxPsi5_Psi5_InputOutputControl
  • outputLength : IfxFft_Fft_JobConfig
  • outputLine : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outputMode : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins , IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin , IfxStdIf_PwmHl_Config , IfxStdIf_Timer_TrigConfig , IfxVadc_Adc_EmuxPinConfig
  • outputPin : IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin
  • outputPriority : IfxFft_Fft_Config
  • outputPtr : IfxFft_Fft_Job_s , IfxFft_Fft_JobConfig
  • outputPulsePolarityHigh : IfxSent_Sent_InputOutputControl
  • outputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outputTriggerEnabled : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outSelect : IfxEth_Mdio_InOut , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut
  • outWidth : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • overflowCnt : IfxGtm_Tim_In
  • overflowInterrupt : IfxMsc_Msc_InterruptConfig
  • overflowInterruptNode : IfxMsc_Msc_InterruptConfig
  • overlfow : IfxCpu_Counter
  • overrunCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • overrunErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • oversampling : IfxAsclin_Asc_BaudRate , IfxAsclin_Lin_BitTimingControl , IfxAsclin_Spi_Baudrate
  • OWN : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- p -

  • packetFrameCount : IfxPsi5s_Psi5s_ReceivedBits , IfxPsi5s_Psi5s_ReceivedData , IfxPsi5s_Psi5s_Timestamp
  • padDriver : IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin , IfxI2c_Pins , IfxPort_Io_ConfigPin , IfxPort_Pin_Config , IfxVadc_Adc_EmuxPinConfig
  • parity : IfxMsc_Msc_UpstreamStatusConfig
  • parityBit : IfxAsclin_Asc_FrameControl
  • parityCheck : SpiIf_ChMode
  • parityCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • parityEnable : IfxAsclin_Lin_FrameControl
  • parityError : IfxAsclin_Asc_ErrorFlags , IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • parityErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • parityMode : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • parityType : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl
  • passiveTimeFrameCount : IfxMsc_Msc_DownstreamControlConfig
  • password : IfxScuWdt_Config
  • pattern : IfxDma_Dma_ChannelConfig
  • pause : TPwm_Functions
  • pauseOnBaudrateSpikeErrors : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • pauseRunTransition : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • payloadLength : IfxEray_Header , IfxEray_ReceivedHeader , IfxPsi5_Psi5_ReceiveControl , IfxPsi5_Psi5_TransmitControl , IfxPsi5s_Psi5s_ReceiveControl , IfxPsi5s_Psi5s_TransmitControl
  • payloadPreambleIndicator : IfxEray_ReceivedHeader
  • PCE : IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits
  • pDivider : IfxScuCcu_InitialStepConfig
  • pending : IfxAsclin_Spi_Job
  • period : IfxCcu6_Icu_Config , IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base , TPwm_Config , TPwm_s
  • periodicOrExternal : IfxPsi5s_Psi5s_PulseGeneration
  • periodicOrExternalOrBypass : IfxPsi5_Psi5_PulseGeneration
  • periodPerRotation : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxDsadc_Rdc_Config , IfxStdIf_Pos_Config
  • periodTick : IfxGtm_Tim_In
  • phase : Spi_ErrorChecks
  • phaseDelay : PwmHl_Config
  • phyInit : IfxEth_Config
  • phyInterfaceMode : IfxEth_Config
  • phyLink : IfxEth_Config
  • pid : IfxAsclin_Lin_PduType
  • pin : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxCif_Clk_In , IfxCif_D_In , IfxCif_Hsnc_In , IfxCif_Vsnc_In , IfxDsadc_Cgpwm_Out , IfxDsadc_Cin_In , IfxDsadc_Cout_Out , IfxDsadc_Din_In , IfxDsadc_Dsn_In , IfxDsadc_Dsp_In , IfxDsadc_Itr_In , IfxDsadc_Sg_In , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEth_Col_In , IfxEth_Crs_In , IfxEth_Crsdv_In , IfxEth_Mdc_Out , IfxEth_Mdio_InOut , IfxEth_Refclk_In , IfxEth_Rxclk_In , IfxEth_Rxd_In , IfxEth_Rxdv_In , IfxEth_Rxer_In , IfxEth_Txclk_In , IfxEth_Txd_Out , IfxEth_Txen_Out , IfxEth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_ToutMap , IfxGtm_Clk_Out , IfxGtm_Tim_TinMap , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_ToutMap , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Msc_en , IfxMsc_Msc_fcln , IfxMsc_Msc_fclp , IfxMsc_Msc_inj0 , IfxMsc_Msc_inj1 , IfxMsc_Msc_sdi , IfxMsc_Msc_son , IfxMsc_Msc_sop , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxMultican_Rxd_In , IfxMultican_Txd_Out , IfxPort_Io_ConfigPin , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxQspi_SpiMaster_Input , IfxQspi_SpiMaster_Output , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Hwcfg_In , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out , IfxVadc_Emux_Out , IfxVadc_GxBfl_Out , IfxVadc_Vadcg_In
  • pinA : IfxGpt12_IncrEnc_Config
  • pinB : IfxGpt12_IncrEnc_Config
  • pinDriver : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins , IfxDsadc_Dsadc_CarrierGenConfig , IfxDsadc_Dsadc_ChannelPins , IfxEray_Eray_NodeA , IfxEray_Eray_NodeB , IfxGpt12_IncrEnc_Config , IfxMsc_Msc_Io , IfxMultican_Can_NodeConfig , IfxPsi5_Psi5_PinsConfig , IfxPsi5s_Psi5s_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins , IfxSent_Sent_Pins
  • pinIndex : IfxPort_Pin , IfxPort_Pin_Config
  • pinMode : IfxDsadc_Dsadc_CarrierGenConfig , IfxGpt12_IncrEnc_Config
  • pinNeg : IfxDsadc_Dsadc_CarrierGenConfig
  • pinPos : IfxDsadc_Dsadc_CarrierGenConfig
  • pins : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config , IfxEray_Eray_NodeConfig , IfxI2c_I2c_Config , IfxPsi5s_Psi5s_Config , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config , IfxSent_Sent_ChannelConfig , IfxVadc_Adc_EmuxPinConfig
  • pinsConfig : IfxPsi5_Psi5_ChannelConfig
  • pinTable : IfxPort_Io_Config
  • pinZ : IfxGpt12_IncrEnc_Config
  • pllDividerStep : IfxScuCcu_SysPllConfig
  • pllInitialStep : IfxScuCcu_ErayPllConfig , IfxScuCcu_SysPllConfig
  • polynom : Ifc_Crc_Table
  • port : IfxPort_Esr_Masks , IfxPort_Pin , IfxPort_Pin_Config
  • positionConst : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • positiveInput : IfxDsadc_Dsadc_ModulatorConfig
  • pre : IfxQspi_DelayConst
  • preDivider : IfxHssl_Hssl_Config
  • prescaler : IfxAsclin_Asc_BaudRate , IfxAsclin_Lin_BitTimingControl , IfxAsclin_Spi_Baudrate
  • prescalerFactor : IfxIom_Driver_LamFilterConfig
  • priority : Ifx_IsrSetting , IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxMultican_Can_InterruptConfig , IfxMultican_Can_MsgObjConfig , IfxSent_Sent_Interrupt
  • protocol : Ifx_Shell , Ifx_Shell_Config , IfxQspi_SpiSlave_Config
  • provider : Ifx_IsrSetting
  • prtc1Control : IfxEray_Eray_ControllerConfig
  • prtc2Control : IfxEray_Eray_ControllerConfig
  • pRxDescr : IfxEth
  • psi5 : IfxPsi5_Psi5 , IfxPsi5_Psi5_Config
  • psi5s : IfxPsi5s_Psi5s
  • pTxDescr : IfxEth
  • pulseDelayLength : IfxSent_Sent_TransmitControl
  • pulseGeneration : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • pulseLength : IfxPsi5_Psi5_PulseGeneration , IfxSent_Sent_TransmitControl
  • pulseLengthTick : IfxGtm_Tim_In
  • pulseTimestampSelect : IfxPsi5_Psi5_ReceiveControl
  • pwm : IfxDsadc_Rdc_Ts
  • pwmTim : IfxDsadc_Rdc_GtmTimestamp
  • pwmTimCh : IfxDsadc_Rdc_Hw


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- q -

  • q : IfxCif_Cam_JpegTable
  • qspi : IfxQspi_SpiMaster , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config
  • queueRequest : IfxVadc_Adc_GroupConfig


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- r -

  • rawPosition : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • RBS1 : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • RBS2 : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • RCH : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • rdc : IfxDsadc_Rdc_Ts
  • rdcTim : IfxDsadc_Rdc_GtmTimestamp
  • rdcTimCh : IfxDsadc_Rdc_Hw
  • rdcTimChannel : IfxDsadc_Rdc_GtmTimestamp
  • rdcTimMuxValue : IfxDsadc_Rdc_GtmTimestamp
  • RDES0 : IfxEth_RxDescr
  • RDES1 : IfxEth_RxDescr
  • RDES2 : IfxEth_RxDescr
  • RDES3 : IfxEth_RxDescr
  • rdm : IfxPsi5_Psi5_Frame
  • rdr : IfxPsi5s_Psi5s_ReceiveData
  • rds : IfxPsi5_Psi5_SerialMessage , IfxPsi5s_Psi5s_ReceiveStatus
  • RE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • read : IfxStdIf_DPipe_
  • readData : IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_ReceivedData
  • readDataCrc : IfxDma_Dma_ChannelConfig
  • readerWaitx : Ifx_Fifo_Shared
  • real : cfloat32 , cfract , csfract , csint16 , csint32
  • receive : Spi_ErrorChecks
  • receiveBufferErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • receiveBufferOverflowFlag : IfxPsi5s_Psi5s_ReceivedBits
  • receiveBufferOverflowInterrupt : IfxSent_Sent_Enable
  • receiveBufferOverflowInterruptNode : IfxSent_Sent_InterruptNodeControl
  • receiveChannel : IfxEray_Eray_MessageRAMConfig
  • receiveControl : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig , IfxSent_Sent_ChannelConfig
  • receiveDataInterrupt : IfxMsc_Msc_InterruptConfig , IfxSent_Sent_Enable
  • receiveDataInterruptNode : IfxMsc_Msc_InterruptConfig , IfxSent_Sent_InterruptNodeControl
  • receiveDataRegisterTimestamp : IfxPsi5_Psi5_ReceiveControl
  • receivedBits : IfxPsi5s_Psi5s_ReceiveStatus
  • receivedData : IfxPsi5s_Psi5s_ReceiveData
  • receiveIdEnable : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • receiveMemoryOverflowError : IfxPsi5_Psi5_FrameData
  • receiveMode : IfxPsi5s_Psi5s_AscConfig
  • receiveRequested : IfxEray_Eray_ReceiveControl
  • receiverOddParityEnabled : IfxPsi5s_Psi5s_AscConfig
  • receiveSuccessInterrupt : IfxSent_Sent_Enable
  • receiveSuccessInterruptNode : IfxSent_Sent_InterruptNodeControl
  • receiveWakeupIdleTime : IfxEray_Eray_Prtc2Control
  • receiveWakeupLowTime : IfxEray_Eray_Prtc2Control
  • receiveWakeupTestDuration : IfxEray_Eray_Prtc1Control
  • rectifier : IfxDsadc_Dsadc_ChannelConfig
  • ref : IfxIom_Driver_LamConfig
  • refClk : IfxEth_RmiiPins
  • reference : IfxVadc_Adc_ChannelConfig
  • refin : Ifc_Crc_Table
  • refIndex : IfxIom_Driver_Lam
  • refInput : IfxIom_Driver_Lam
  • refout : Ifc_Crc
  • regAddr : Ifx_InternalMux_MuxConfig
  • rejectedFrameId : IfxEray_Eray_MessageRAMConfig
  • reload : IfxScuWdt_Config
  • remaining : SpiIf_Job
  • requestMode : IfxDma_Dma_ChannelConfig
  • requestSlotBackgroundScanEnabled : IfxVadc_Adc_ArbiterConfig
  • requestSlotPrio : IfxVadc_Adc_BackgroundScanConfig , IfxVadc_Adc_QueueConfig , IfxVadc_Adc_ScanConfig
  • requestSlotQueueEnabled : IfxVadc_Adc_ArbiterConfig
  • requestSlotScanEnabled : IfxVadc_Adc_ArbiterConfig
  • requestSlotStartMode : IfxVadc_Adc_BackgroundScanConfig , IfxVadc_Adc_QueueConfig , IfxVadc_Adc_ScanConfig
  • requestSource : IfxDma_Dma_ChannelConfig
  • RER : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • reserved : Spi_ErrorChecks
  • reset : IfxStdIf_Pos_
  • resetFaults : IfxStdIf_Pos_
  • resetSendCount : IfxStdIf_DPipe_
  • resolution : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxDsadc_Rdc_Config , IfxGpt12_IncrEnc , IfxStdIf_Pos_Config , IfxVadc_Adc_ClassConfig
  • resolutionFactor : IfxStdIf_Pos_Config
  • resource : Ifx_GlobalResources_Item
  • responseTimeout : IfxAsclin_Lin_DataControl , IfxAsclin_Lin_ErrorFlags
  • responseTimeoutMode : IfxAsclin_Lin_DataControl
  • result : IfxFft_Fft_Count64
  • resultPriority : IfxVadc_Adc_ChannelConfig
  • resultreg : IfxVadc_Adc_Channel
  • resultRegister : IfxVadc_Adc_ChannelConfig
  • resultServProvider : IfxVadc_Adc_ChannelConfig
  • resultSrcNr : IfxVadc_Adc_ChannelConfig
  • resume : TPwm_Functions
  • resv : IfxEth_AltRxDescr1_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr1_Bits , IfxEth_TxDescr0_Bits
  • resv1 : IfxEth_AltRxDescr1_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_AltTxDescr1_Bits
  • resv2 : IfxEth_AltTxDescr1_Bits , IfxEth_RxDescr1_Bits
  • reversed : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxDsadc_Rdc_Config , IfxStdIf_Pos_Config
  • rightAlignedStorage : IfxVadc_Adc_ChannelConfig
  • ringModeBuffersConfig : IfxEth_Config
  • risingEdgeAtPeriod : IfxStdIf_Timer_TrigConfig
  • risingEdgeFilterTime : IfxGtm_Tim_In_ConfigFilter , IfxIom_Driver_LamFilterConfig
  • risingEdgeMode : IfxGtm_Tim_In_ConfigFilter
  • rmiiPins : IfxEth_Config
  • rts : IfxAsclin_Asc_Pins
  • rtsMode : IfxAsclin_Asc_Pins
  • run : IfxIom_Driver_LamEventWindowConfig , IfxStdIf_Timer_
  • RWT : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • rx : IfxAsclin_Asc , IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins , SpiIf_Ch_
  • rxBuffer : IfxAsclin_Asc_Config
  • rxBuffer1Size : IfxEth_RingModeRxBuffersConfig
  • rxBuffer1StartAddress : IfxEth_RingModeRxBuffersConfig
  • rxBuffer2Size : IfxEth_RingModeRxBuffersConfig
  • rxBuffer2StartAddress : IfxEth_RingModeRxBuffersConfig
  • rxBufferSize : IfxAsclin_Asc_Config
  • rxBufferUsed : IfxEth , IfxEth_RingModeRxBuffersConfig
  • rxClk : IfxEth_MiiPins
  • rxConfig : IfxEth_RingModeBuffersConfig
  • rxCount : IfxEth , SpiIf_
  • rxd0 : IfxEth_MiiPins , IfxEth_RmiiPins
  • rxd1 : IfxEth_MiiPins , IfxEth_RmiiPins
  • rxd2 : IfxEth_MiiPins
  • rxd3 : IfxEth_MiiPins
  • rxDescr : IfxEth , IfxEth_Config
  • rxDiff : IfxEth
  • rxDmaChannel : IfxQspi_SpiMaster_Dma , IfxQspi_SpiSlave_Dma
  • rxDmaChannelId : IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • rxDv : IfxEth_MiiPins
  • rxEr : IfxEth_MiiPins
  • rxFifoInterruptLevel : IfxAsclin_Asc_FifoControl , IfxAsclin_Spi_FifoControl
  • rxFifoMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • rxFifoOverflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • rxFifoOverflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • rxFifoThreshold : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • rxFifoUnderflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • rxFifoUnderflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • rxHandler : SpiIf_Ch_
  • rxHeaderEnd : IfxAsclin_Lin_AcknowledgementFlags
  • rxHeaderErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • rxHeaderInProgress : IfxAsclin_Lin_FrameControlFlags
  • rxIn : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • rxInMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • rxInterrupt : IfxMultican_Can_MsgObjConfig
  • rxJob : IfxAsclin_Spi , IfxQspi_SpiSlave
  • rxMode : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins
  • rxPin : IfxMultican_Can_NodeConfig
  • rxPinMode : IfxMultican_Can_NodeConfig
  • rxPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • rxReceivedHeader : IfxAsclin_Lin_EnabledInterrupts
  • rxReceivedResponse : IfxAsclin_Lin_EnabledInterrupts
  • rxResponseData : IfxAsclin_Lin_FrameDataControl
  • rxResponseEnd : IfxAsclin_Lin_AcknowledgementFlags
  • rxResponseErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • rxResponseInProgress : IfxAsclin_Lin_FrameControlFlags
  • rxResponseLength : IfxAsclin_Lin_FrameDataControl
  • rxSwFifoOverflow : IfxAsclin_Asc


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- s -

  • SAF : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • sampleClockSource : IfxDsadc_Dsadc_DemodulatorConfig
  • samplePoint : IfxMultican_Can_NodeConfig
  • samplePointPosition : IfxAsclin_Asc_BitTimingControl , IfxAsclin_Lin_BitSamplingControl
  • sampleStrobe : IfxDsadc_Dsadc_DemodulatorConfig
  • sampleTime : IfxVadc_Adc_ClassConfig
  • sampleTimeControl : IfxVadc_Adc_EmuxControl
  • samplingEdge : IfxCif_Cam_Config
  • samplingTime : Ifx_LowPassPt1F32_Config
  • scanRequest : IfxVadc_Adc_GroupConfig
  • scl : IfxI2c_Pins
  • sclk : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • sclkMode : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • sda : IfxI2c_Pins
  • sdi : IfxMsc_Msc_Io
  • sdiLinePolarity : IfxMsc_Msc_OutputControlConfig
  • seconds : Ifx_DateTime
  • segmentCount : Ifx_LutIndexedLinearF32 , Ifx_LutLinearF32
  • segments : Ifx_LutIndexedLinearF32 , Ifx_LutLinearF32
  • select : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxDsadc_Cgpwm_Out , IfxDsadc_Cin_In , IfxDsadc_Cout_Out , IfxDsadc_Din_In , IfxDsadc_Dsn_In , IfxDsadc_Dsp_In , IfxDsadc_Itr_In , IfxDsadc_Sg_In , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEth_Col_In , IfxEth_Crs_In , IfxEth_Crsdv_In , IfxEth_Mdc_Out , IfxEth_Refclk_In , IfxEth_Rxclk_In , IfxEth_Rxd_In , IfxEth_Rxdv_In , IfxEth_Rxer_In , IfxEth_Txclk_In , IfxEth_Txd_Out , IfxEth_Txen_Out , IfxEth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_ToutMap , IfxGtm_Clk_Out , IfxGtm_Tim_TinMap , IfxGtm_Tom_ToutMap , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxMultican_Rxd_In , IfxMultican_Txd_Out , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out , IfxVadc_Emux_Out , IfxVadc_GxBfl_Out
  • sendControl : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • sendCount : IfxAsclin_Asc
  • sending : IfxAsclin_Spi , SpiIf_
  • sendResultCode : Ifx_Shell_Config , Ifx_Shell_Flags
  • sensorControlDisabled : IfxDts_Dts_Config
  • sent : IfxSent_Sent
  • serialData : IfxPsi5_Psi5_Message , IfxSent_Sent_SerialMessageFrame
  • serialDataCrcErrorInterrupt : IfxSent_Sent_Enable
  • serialDataDisabledCrcDisabled : IfxSent_Sent_ReceiveControl
  • serialDataProcessingEnabled : IfxSent_Sent_ReceiveControl
  • serialDataReceiveInterrupt : IfxSent_Sent_Enable
  • serialDataReceiveInterruptNode : IfxSent_Sent_InterruptNodeControl
  • serialMessageCRCFailedError : IfxPsi5_Psi5_Message
  • serviceReqNrPeriod : IfxCcu6_TimerWithTrigger_Config
  • serviceReqNrTrigger : IfxCcu6_TimerWithTrigger_Config
  • serviceRequest : IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • serviceRequestDelay : IfxMsc_Msc_UpstreamStatusConfig
  • servReqPriority : IfxDsadc_Rdc_ConfigHw
  • servReqProvider : IfxDsadc_Rdc_ConfigHw
  • setDeadtime : IfxStdIf_PwmHl_
  • setFrequency : IfxStdIf_Timer_
  • setMinPulse : IfxStdIf_PwmHl_
  • setMode : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_
  • setOffset : IfxStdIf_Pos_
  • setOnTime : IfxStdIf_PwmHl_
  • setOnTimeAndShift : IfxStdIf_PwmHl_
  • setPeriod : IfxStdIf_Timer_
  • setPosition : IfxStdIf_Pos_
  • setPulse : IfxStdIf_PwmHl_
  • setRawPosition : IfxStdIf_Pos_
  • setRefreshPeriod : IfxStdIf_Pos_
  • setSingleMode : IfxStdIf_Timer_
  • setSpeed : IfxStdIf_Pos_
  • setTrigger : IfxStdIf_Timer_
  • setupChannels : IfxStdIf_PwmHl_
  • setupDataCount : IfxCif_Cam_Config
  • setupDataTable : IfxCif_Cam_Config
  • shadowAddress : IfxDma_Dma_ChannelConfig
  • shadowControl : IfxDma_Dma_ChannelConfig
  • shared : _Fifo
  • shift : Ifx_LutIndexedLinearF32
  • shiftClock : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • shiftDir : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • showPrompt : Ifx_Shell_Config , Ifx_Shell_Flags
  • signalLevel : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • signDelay : IfxDsadc_Dsadc_RectifierConfig
  • signPeriod : IfxDsadc_Dsadc_RectifierConfig
  • signSource : IfxDsadc_Dsadc_RectifierConfig
  • singleDataTransfer : IfxMultican_Can_MsgObjControl
  • singleShot : IfxStm_Timer_Base
  • singleTransmitTrial : IfxMultican_Can_MsgObjControl
  • sinIn : Ifx_AngleTrkF32 , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc
  • size : _Fifo , Ifx_GlobalResources , Ifx_InternalMux_Config , IfxCif_Cam_MemInfo , IfxPort_Io_Config
  • sizeFactor : IfxCif_Cam_Downscaling
  • sleepModeEnabled : IfxSent_Sent_Config
  • slotControl : IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig
  • slotCounter : IfxPsi5_Psi5_FrameData
  • slowClock : IfxPsi5_Psi5_Config
  • sls : IfxQspi_SpiMaster_ChannelConfig
  • slsi : IfxQspi_SpiSlave_Pins
  • slsiMisplacedInactivation : IfxQspi_SpiSlave_ErrorFlags
  • slsiMode : IfxQspi_SpiSlave_Pins
  • slso : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Channel_s
  • slsoActiveState : IfxQspi_SpiMaster_Channel_s
  • slsoMode : IfxAsclin_Spi_Pins
  • slsoNr : IfxQspi_Slso_Out
  • son : IfxMsc_Msc_Io
  • sop : IfxMsc_Msc_Io
  • sopPolarity : IfxMsc_Msc_OutputControlConfig
  • sorPayloadLength : IfxPsi5_Psi5_TransmitControl
  • source : IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxGtm_Trig_Trigger , IfxIom_Driver_LamEventConfig
  • sourceAddress : IfxDma_Dma_ChannelConfig
  • sourceAddressCircularRange : IfxDma_Dma_ChannelConfig
  • sourceAddressIncrementDirection : IfxDma_Dma_ChannelConfig
  • sourceAddressIncrementStep : IfxDma_Dma_ChannelConfig
  • sourceCircularBufferEnabled : IfxDma_Dma_ChannelConfig
  • sourceDestinationAddressCrc : IfxDma_Dma_ChannelConfig
  • spcMode : IfxSent_Sent_TransmitControl
  • spcModeOn : IfxSent_Sent_ChannelConfig
  • speed : IfxGpt12_IncrEnc
  • speedConstPulseCount : IfxGpt12_IncrEnc
  • speedConstTimeDiff : IfxGpt12_IncrEnc
  • speedEstA : Ifx_AngleTrkF32
  • speedEstB : Ifx_AngleTrkF32
  • speedFilerCutOffFrequency : IfxStdIf_Pos_Config
  • speedFilterEnabled : IfxStdIf_Pos_Config
  • speedLpf : Ifx_AngleTrkF32
  • speedLpfFc : Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • speedModeThreshold : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • speedModeThresholdTick : IfxGpt12_IncrEnc
  • spol : IfxAsclin_Spi_InputOutputControl
  • sqrAmplMax : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • sqrAmplMin : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • srcId : IfxMultican_Can_InterruptSource
  • srcrOutDis : IfxFft_Fft
  • srcrOutEnd : IfxFft_Fft
  • srhActivePhaseSelection : IfxMsc_Msc_DownstreamControlConfig
  • srhBitsShiftedAtDataFramesExtension : IfxMsc_Msc_DownstreamControlExtensionConfig
  • srhDataFrameLength : IfxMsc_Msc_DownstreamControlConfig
  • srlActivePhaseSelection : IfxMsc_Msc_DownstreamControlConfig
  • srlBitsShiftedAtDataFramesExtension : IfxMsc_Msc_DownstreamControlExtensionConfig
  • srlDataFrameLength : IfxMsc_Msc_DownstreamControlConfig
  • ssrPayloadLength : IfxPsi5_Psi5_TransmitControl
  • standardIo : Ifx_Console , Ifx_Shell_Config
  • start : Ifx_Shell_Protocol , IfxCif_Cam_MemInfo , IfxFlash_flashSector , IfxHssl_Hssl_AccessWindow , PwmHl_Functions , Timer_Functions , TPwm_Functions
  • startCapture : Icu_Functions
  • startChannel : IfxVadc_Adc_EmuxControl
  • started : Ifx_Shell_Protocol
  • startIndex : _Fifo
  • startOffset : IfxStdIf_Timer_Config
  • startScan : IfxDsadc_Rdc_ConfigHw
  • startSequenceGenerationControl : IfxPsi5s_Psi5s_TransmitControl
  • startSequenceGenerationEnabled : IfxPsi5_Psi5_TransmitControl
  • startSingleShotMode : Timer_Functions
  • startupCalibration : IfxVadc_Adc_Config
  • startupFrame : IfxEray_ReceivedHeader
  • startupFrameIndicator : IfxEray_Header
  • startupFrameTransmitted : IfxEray_Eray_Succ1Config
  • startValue : IfxDsadc_Dsadc_CombFilterConfig
  • staticActionPoint : IfxEray_Eray_Gtu09Config
  • staticFifoDisabled : IfxEray_Eray_MessageRAMConfig
  • staticFramepayload : IfxEray_Eray_ControllerConfig
  • staticSlotLength : IfxEray_Eray_Gtu07Config
  • staticSlotsCount : IfxEray_Eray_Gtu07Config
  • status : Ifx_AngleTrkF32_PosIf , IfxEth , IfxGpt12_IncrEnc , IfxI2c_I2c , IfxPsi5s_Psi5s_Frame , IfxStdIf_Pos_Status
  • statusNibble : IfxSent_Sent_Frame
  • statusNibbleEnabled : IfxSent_Sent_ReceiveControl
  • step : IfxMsc_Msc_Clock
  • stm : IfxStm_Timer , IfxStm_Timer_Config
  • stop : IfxStdIf_Timer_ , PwmHl_Functions , Timer_Functions , TPwm_Functions
  • stopBit : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • stopBits : IfxPsi5s_Psi5s_AscConfig
  • stopCapture : Icu_Functions
  • streamingMode : IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • streamingModeOn : IfxHssl_Hssl_Channel
  • strobePosition : IfxEray_Eray_Prtc1Control
  • succ1Config : IfxEray_Eray_ControllerConfig
  • succ2Config : IfxEray_Eray_ControllerConfig
  • succ3Config : IfxEray_Eray_ControllerConfig
  • supplyVoltage : IfxVadc_Adc_Config
  • suspendTriggered : IfxSent_Sent_ReceiveControl
  • swapRequested : IfxEray_Eray_ReceiveControl
  • switchingSelect : IfxCcu6_PwmBc_MultiChannelControl
  • switchingSync : IfxCcu6_PwmBc_MultiChannelControl
  • syncFrame : IfxEray_ReceivedHeader
  • syncFrameIndicator : IfxEray_Header
  • syncFrameTransmitted : IfxEray_Eray_Succ1Config
  • synchJumpWidth : IfxMultican_Can_NodeConfig
  • synchonize : IfxVadc_Adc_ChannelConfig
  • synchronousOperation : IfxCcu6_Timer_Config
  • synchronousStart : Timer_Functions
  • synchronousStop : Timer_Functions
  • synchronousUpdateEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • syntax : Ifx_Shell_Syntax
  • sysPll : IfxScuCcu_Config
  • systemCall : IfxCpu_Trap_Id
  • systemEventTriggerThreshold : IfxIom_Driver_Lam , IfxIom_Driver_LamConfig


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- t -

  • t12countingInputMode : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtClockEnabled : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtClockInput : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtInputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t12ExtInputTriggerMode : IfxCcu6_PwmBc_TriggerConfig
  • t12Frequency : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t12hr : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • t12Period : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t12SyncDirection : IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer13
  • t12SyncEvent : IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer13
  • t13countingInputMode : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtClockEnabled : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtClockInput : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtInputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t13ExtInputTriggerMode : IfxCcu6_PwmBc_TriggerConfig
  • t13Frequency : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t13hr : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • t13InSyncWithT12 : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t13Period : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t1xhrInputMode : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • table : Ifc_Crc , Ifx_GlobalResources
  • tAddr : IfxCpu_Trap
  • target : IfxMsc_En_Out , IfxMsc_Msc_Config
  • TBS1 : IfxEth_AltTxDescr1_Bits , IfxEth_TxDescr1_Bits
  • TBS2 : IfxEth_AltTxDescr1_Bits , IfxEth_TxDescr1_Bits
  • TCH : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • tClass : IfxCpu_Trap
  • tCpu : IfxCpu_Trap
  • TDES0 : IfxEth_TxDescr
  • TDES1 : IfxEth_TxDescr
  • TDES2 : IfxEth_TxDescr
  • TDES3 : IfxEth_TxDescr
  • TER : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • tgc : IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer
  • tgcGlobalControlApplyUpdate : IfxGtm_Tom_Timer
  • tgcGlobalControlDisableUpdate : IfxGtm_Tom_Timer
  • threshold : IfxIom_Driver_LamEventWindowConfig
  • thumbData : IfxCif_Cam_JfifHeader
  • thumbX : IfxCif_Cam_JfifHeader
  • thumbY : IfxCif_Cam_JfifHeader
  • ticks : IfxStm_CompareConfig
  • tId : IfxCpu_Trap
  • tim : IfxGtm_Tim_TinMap
  • timeBase : IfxSent_Sent_TransmitControl
  • timeBaseSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5_Psi5_TimeStampConfig , IfxPsi5s_Psi5s_PulseGeneration , IfxPsi5s_Psi5s_TimeStampConfig
  • timeFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • timeFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • timeout : IfxGtm_Tim_In_Config , IfxGtm_Tim_In_ConfigTimeout
  • timeoutError : IfxHssl_Hssl_errorFlags
  • timer : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmHl_Config , IfxCcu6_PwmHl_s , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxStdIf_PwmHl_
  • timer12 : IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • timer13 : IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • timerChannel : IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config
  • timerInterrupt : IfxMultican_Can_NodeConfig
  • timeslotError : IfxPsi5_Psi5_FrameData
  • timestamp : Ifx_DataBufferMode_TimeStampSingle , IfxDsadc_Rdc , IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_Frame
  • timeStamp : IfxPsi5s_Psi5s_ReceiveTimestamp
  • timestamp : IfxPsi5s_Psi5s_Timestamp
  • timeStamp : IfxSent_Sent_Frame
  • timestampClock : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterA : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterB : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterC : IfxPsi5_Psi5_Config
  • timestampEnabled : IfxDma_Dma_ChannelConfig , IfxPsi5s_Psi5s_ReceiveControl
  • timeStampPreDivider : IfxSent_Sent_Config
  • timestampSelect : IfxPsi5s_Psi5s_ReceiveControl
  • timestampTrigger : IfxDsadc_Dsadc_DemodulatorConfig
  • timestampTriggerSelect : IfxPsi5s_Psi5s_ReceiveControl
  • timIndex : IfxGtm_Tim_In , IfxGtm_Tim_In_Config
  • tint0IsrProvider : IfxEray_Eray_Interrupt
  • tint0Priority : IfxEray_Eray_Interrupt
  • tint1IsrProvider : IfxEray_Eray_Interrupt
  • tint1Priority : IfxEray_Eray_Interrupt
  • tom : IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config , IfxGtm_Tom_ToutMap
  • tomChannel : IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver
  • tomIndex : IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_Timer
  • topMsgObjId : IfxMultican_Can_MsgObjControl
  • totalMemSize : IfxCif_Cam
  • toutn : IfxGtm_Atom_ToutMap , IfxGtm_Tom_ToutMap
  • toutSel : IfxGtm_Atom_ToutMap , IfxGtm_Tom_ToutMap
  • transactionRequestLostInterruptEnabled : IfxDma_Dma_ChannelConfig
  • transactionTagError : IfxHssl_Hssl_errorFlags
  • transferBufferUnderflowInterrupt : IfxSent_Sent_Enable
  • transferBufferUnderflowInterruptNode : IfxSent_Sent_InterruptNodeControl
  • transferCount : IfxDma_Dma_ChannelConfig
  • transferDataInterrupt : IfxSent_Sent_Enable
  • transferDataInterruptNode : IfxSent_Sent_InterruptNodeControl
  • transferInProgress : IfxAsclin_Spi
  • transferInterrupt : IfxMultican_Can_NodeConfig
  • transferRequested : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • transmissionMode : IfxEray_Header , IfxMsc_Msc_DownstreamControlConfig
  • transmissionSlotMode : IfxEray_Eray_Succ1Config
  • transmissionStartTime : IfxEray_Eray_Prtc1Control
  • transmit : Spi_ErrorChecks
  • transmitControl : IfxSent_Sent_ChannelConfig
  • transmitErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • transmitMode : IfxPsi5s_Psi5s_AscConfig
  • transmitPayloadIndicatior : IfxEray_Header
  • transmitterOddParityEnabled : IfxPsi5s_Psi5s_AscConfig
  • transmitWakeupIdleTime : IfxEray_Eray_Prtc2Control
  • transmitWakeupLowTime : IfxEray_Eray_Prtc2Control
  • transmitWakeupRepetitions : IfxEray_Eray_Prtc1Control
  • trigger : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGtm_Trig_AdcTrig_Table , IfxIom_Driver_LamEventConfig , IfxStdIf_Timer_Config
  • triggerChannel : IfxGtm_Atom_Timer , IfxGtm_Tom_Timer
  • triggerConfig : IfxVadc_Adc_BackgroundScanConfig , IfxVadc_Adc_QueueConfig , IfxVadc_Adc_ScanConfig
  • triggerEnabled : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base
  • triggerInput : IfxDsadc_Dsadc_DemodulatorConfig
  • triggerMode : IfxVadc_Adc_GatingTriggerConfig
  • triggerMonitorCleared : IfxSent_Sent_InputOutputControl
  • triggerOut : IfxCcu6_TimerWithTrigger_Config , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • triggerPoint : IfxStdIf_Timer_TrigConfig
  • triggerPriority : IfxStm_CompareConfig
  • triggerSource : IfxSent_Sent_TransmitControl , IfxVadc_Adc_GatingTriggerConfig
  • Ts : Ifx_AngleTrkF32_PosIf
  • tsm : IfxPsi5s_Psi5s_ReceiveTimestamp
  • TTSE : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • TTSS : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • tUnit : IfxSent_Sent_ChannelConfig
  • turn : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • tx : IfxAsclin_Asc , IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins , SpiIf_Ch_
  • txBuffer : IfxAsclin_Asc_Config
  • txBuffer1Size : IfxEth_RingModeTxBuffersConfig
  • txBuffer1StartAddress : IfxEth_RingModeTxBuffersConfig
  • txBuffer2Size : IfxEth_RingModeTxBuffersConfig
  • txBuffer2StartAddress : IfxEth_RingModeTxBuffersConfig
  • txBufferSize : IfxAsclin_Asc_Config
  • txBufferUsed : IfxEth , IfxEth_RingModeTxBuffersConfig
  • txClk : IfxEth_MiiPins
  • txCompleted : IfxAsclin_Lin_AcknowledgementFlags
  • txConfig : IfxEth_RingModeBuffersConfig
  • txCount : IfxEth , SpiIf_
  • txd0 : IfxEth_MiiPins , IfxEth_RmiiPins
  • txd1 : IfxEth_MiiPins , IfxEth_RmiiPins
  • txd2 : IfxEth_MiiPins
  • txd3 : IfxEth_MiiPins
  • txDescr : IfxEth , IfxEth_Config
  • txDiff : IfxEth
  • txDisabled : IfxStdIf_DPipe_
  • txDmaChannel : IfxQspi_SpiMaster_Dma , IfxQspi_SpiSlave_Dma
  • txDmaChannelId : IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • txEn : IfxEth_MiiPins , IfxEth_RmiiPins
  • txEnOut : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txEnOutMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txEr : IfxEth_MiiPins
  • txFifoInterruptLevel : IfxAsclin_Asc_FifoControl , IfxAsclin_Spi_FifoControl
  • txFifoMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • txFifoOverflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • txFifoOverflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • txFifoThreshold : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • txFifoUnderflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • txHandler : SpiIf_Ch_
  • txHeaderEnd : IfxAsclin_Lin_AcknowledgementFlags
  • txHeaderErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • txHeaderInProgress : IfxAsclin_Lin_FrameControlFlags
  • txInProgress : IfxAsclin_Asc
  • txInterrupt : IfxMultican_Can_MsgObjConfig
  • txJob : IfxAsclin_Spi , IfxQspi_SpiSlave
  • txMode : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins
  • txOut : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txOutMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txPin : IfxMultican_Can_NodeConfig
  • txPinMode : IfxMultican_Can_NodeConfig
  • txPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • txResponseEnd : IfxAsclin_Lin_AcknowledgementFlags
  • txResponseErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • txResponseInProgress : IfxAsclin_Lin_FrameControlFlags
  • txResponseLength : IfxAsclin_Lin_FrameDataControl
  • txSendHeaderOnly : IfxAsclin_Lin_FrameControlFlags
  • txSendResponse : IfxAsclin_Lin_FrameControlFlags
  • txTimestamp : IfxAsclin_Asc
  • txTransmittedHeader : IfxAsclin_Lin_EnabledInterrupts
  • txTransmittedResponse : IfxAsclin_Lin_EnabledInterrupts
  • type : IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock
  • typeOfService : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxFft_Fft_Config , IfxMultican_Can_InterruptConfig , IfxStm_CompareConfig


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- u -

  • U : IfxEth_RxDescr0 , IfxEth_RxDescr1 , IfxEth_RxDescr2 , IfxEth_RxDescr3 , IfxEth_RxDescrList , IfxEth_TxDescr0 , IfxEth_TxDescr1 , IfxEth_TxDescr2 , IfxEth_TxDescr3 , IfxEth_TxDescrList , IfxMultican_MsgObjStat
  • uartFrameCount : IfxPsi5s_Psi5s_ReceiveControl
  • UF : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • uk : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • underflowInterrupt : IfxMsc_Msc_InterruptConfig
  • underflowInterruptNode : IfxMsc_Msc_InterruptConfig
  • unexpectedError : IfxHssl_Hssl_errorFlags
  • unknown : IfxCif_Cam_JfifHeader
  • update : IfxCcu6_PwmHl_Mode , IfxCcu6_PwmHl_s , IfxGpt12_IncrEnc , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s , IfxStdIf_Pos_
  • updateAndShift : IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s
  • updateInputFrequency : IfxStdIf_Timer_
  • updatePeriod : IfxDsadc_Rdc , IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • updatePulse : IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s
  • upperBoundary : IfxVadc_Adc_ChannelConfig
  • upperLimit : IfxAsclin_Lin_BaudrateDetection
  • upperTemperatureLimit : IfxDts_Dts_Config
  • upstreamChannelFrameType : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamChannelReceivingRate : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamConfig : IfxMsc_Msc_Config
  • upstreamTimeoutInterrupt : IfxMsc_Msc_InterruptConfig
  • upstreamTimeoutInterruptNode : IfxMsc_Msc_InterruptConfig
  • upstreamTimeoutPrescaler : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamTimeoutValue : IfxMsc_Msc_UpstreamStatusConfig
  • useDma : IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • userTs : IfxDsadc_Rdc_Config
  • useWindowFunction : IfxFft_Fft_JobConfig
  • uv : IfxCif_Cam_JpegTables


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- v -

  • vadc : IfxVadc_Adc , IfxVadc_Adc_Config , IfxVadc_Adc_EmuxControl
  • value : Ifx_InternalMux_MuxConfig , IfxPsi5_Psi5_Rds , IfxScuCcu_CcuconRegConfig , IfxScuCcu_FlashWaitstateConfig
  • verbose : IfxPsi5_Psi5_ReceiveControl
  • verboseForAsynchronousMode : IfxPsi5_Psi5_ReceiveControl
  • version : IfxCif_Cam_JfifHeader
  • vFactor : IfxCif_Cam_Downscaling
  • VLAN : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits
  • vMode : IfxCif_Cam_Downscaling
  • vOffset : IfxCif_Cam_MemConfig , IfxCif_Cam_PictureInfo
  • vSize : IfxCif_Cam_MemConfig , IfxCif_Cam_PictureInfo
  • vSyncPolarity : IfxCif_Cam_Config


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- w -

  • waitingTime : Timer_Config , TPwm_Config
  • waitTime : IfxScuCcu_InitialStepConfig , IfxScuCcu_PllStepsConfig
  • wakeupPatternChannel : IfxEray_Eray_Succ1Config
  • watchdogEnabled : IfxCif_Cam_Common
  • watchdogErrorInterrupt : IfxSent_Sent_Enable
  • watchdogErrorInterruptNode : IfxSent_Sent_InterruptNodeControl
  • watchdogTimeoutErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • watchdogTimerLimit : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • watchDogTimerLimit : IfxSent_Sent_ChannelConfig
  • watchdogTimerModeSelect : IfxPsi5s_Psi5s_ReceiveControl
  • windowSize : IfxDsadc_Dsadc_IntegratorConfig
  • wrapDestinationInterruptEnabled : IfxDma_Dma_ChannelConfig
  • wrapSourceInterruptEnabled : IfxDma_Dma_ChannelConfig
  • write : IfxStdIf_DPipe_
  • writerWaitx : Ifx_Fifo_Shared
  • wrongStatusNibbleErrorInterrupt : IfxSent_Sent_Enable


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- x -

  • xcrc : IfxPsi5s_Psi5s_ReceivedBits
  • xcrcError : IfxPsi5s_Psi5s_ReceivedBits
  • xcrcErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • xtalFrequency : IfxScuCcu_Config
  • xxxCH1 : IfxGtm_Tom_TGC


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- y -

  • y : IfxCif_Cam_JpegTables , IfxCif_Cam_MemAreas


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- z -

  • zeroIsrPriority : IfxGpt12_IncrEnc_Config
  • zeroIsrProvider : IfxGpt12_IncrEnc_Config


iLLD_TC26B: Data Fields - Variables

- a -

  • a : Ifx_LowPassPt1F32
  • A : IfxEth_RxDescr0 , IfxEth_RxDescr1 , IfxEth_TxDescr0 , IfxEth_TxDescr1
  • a : IfxPsi5_Psi5_StartupOptions
  • abd : IfxAsclin_Lin_BaudrateDetection
  • abraBlockBypass : IfxMsc_Msc_Abra
  • abraConfig : IfxMsc_Msc_Config
  • abraDownstreamBlockBaudrate : IfxMsc_Msc_Abra
  • ac : IfxCif_Cam_JpegTable
  • accelEst : Ifx_AngleTrkF32
  • acceptanceMask : IfxMultican_Can_MsgObjConfig
  • acceptedStartupDeviation : IfxEray_Eray_Gtu06Config
  • accessWindow0 : IfxHssl_Hssl_Config
  • accessWindow1 : IfxHssl_Hssl_Config
  • accessWindow2 : IfxHssl_Hssl_Config
  • accessWindow3 : IfxHssl_Hssl_Config
  • accumulatedCounterIndex : IfxIom_Driver_Lam
  • accumulatedEventUsedMask : IfxIom_Driver
  • acknowledgmentFlags : IfxAsclin_Lin
  • ackTimerIrq : IfxStdIf_Timer_
  • ackTriggerIrq : IfxStdIf_Timer_
  • ACT_TB : IfxGtm_Tom_TGC
  • activateSlso : IfxQspi_SpiMaster_Channel_s
  • activeChannel : SpiIf_
  • activeCount : Timer_Config , TPwm_Config
  • activeState : PwmHl_Config , TPwm_Config
  • actualUartFrameCount : IfxPsi5s_Psi5s_ReceivedBits
  • address : IfxFlash_ErrorTracking_Address
  • AFM : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • agc : IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer
  • agcApplyUpdate : IfxGtm_Atom_Timer
  • agcDisableUpdate : IfxGtm_Atom_Timer
  • alertInterrupt : IfxMultican_Can_NodeConfig
  • align : Ifx_Console
  • ALL : IfxAsclin_Asc_ErrorFlagsUnion , IfxSent_Sent_EnabledInterrupts
  • allowSleepMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • alternateCrcSelected : IfxSent_Sent_ReceiveControl
  • alti : IfxAsclin_Lin_Config , IfxAsclin_Spi_InputOutputControl
  • analogFrequency : IfxVadc_Adc_Config
  • analyzerMode : IfxMultican_Can_NodeConfig
  • angleAtan : Ifx_AngleTrkF32
  • angleErr : Ifx_AngleTrkF32
  • angleEst : Ifx_AngleTrkF32
  • angleRef : Ifx_AngleTrkF32
  • angleTrk : IfxDsadc_Rdc
  • app0 : IfxCif_Cam_JfifHeader
  • applyUpdate : IfxStdIf_Timer_
  • arbiter : IfxVadc_Adc_GroupConfig
  • arbiterRoundLength : IfxVadc_Adc_ArbiterConfig
  • ascConfig : IfxPsi5s_Psi5s_Config
  • ascFramingErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • asclin : IfxAsclin_Asc , IfxAsclin_Asc_Config , IfxAsclin_Lin , IfxAsclin_Lin_Config , IfxAsclin_Spi , IfxAsclin_Spi_Config
  • ascOnlyMode : IfxPsi5s_Psi5s_GlobalControlConfig
  • ascOverrunErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • ascParityErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • assertion : IfxCpu_Trap_Id
  • asynchronousModeSelected : IfxPsi5_Psi5_ReceiveControl
  • atom : IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Atom_ToutMap
  • atomChannel : IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver
  • atomIndex : IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Timer
  • autoBackgroundScanEnabled : IfxVadc_Adc_BackgroundScanConfig
  • autoCS : SpiIf_ChMode
  • automaticLengthReload : IfxFce_Crc_CrcConfig
  • autoscanEnabled : IfxVadc_Adc_ScanConfig
  • auxFilter : IfxDsadc_Dsadc_ChannelConfig
  • availMemSize : IfxCif_Cam


iLLD_TC26B: Data Fields - Variables

- b -

  • b : Ifx_LowPassPt1F32
  • B : IfxMultican_MsgObjStat
  • b : IfxPsi5_Psi5_StartupOptions
  • B : IfxStdIf_Pos_Status
  • backgroundChannel : IfxVadc_Adc_ChannelConfig
  • backgroundScanRequest : IfxVadc_Adc_GroupConfig
  • bacon : IfxQspi_SpiMaster_Channel_s
  • base : Ifx_AngleTrkF32 , Ifx_CircularBuffer , IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_PwmHl_Config , IfxCcu6_PwmHl_s , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TimerWithTrigger , IfxCcu6_TimerWithTrigger_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGpt12_IncrEnc_Config , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config , IfxQspi_SpiMaster , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config , IfxStm_Timer , IfxStm_Timer_Config
  • baudrate : IfxAsclin_Asc_BaudRate , IfxAsclin_Asc_Config , IfxAsclin_Lin_BaudrateGeneration , IfxAsclin_Spi_Baudrate , IfxAsclin_Spi_Config , IfxEray_Eray_Prtc1Control , IfxI2c_I2c , IfxI2c_I2c_Config , IfxMsc_Msc_Clock , IfxMultican_Can_NodeConfig , Spi_ErrorChecks , SpiIf_Ch_ , SpiIf_ChConfig_
  • baudrateError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • baudrateFrequency : IfxPsi5s_Psi5s_AscConfig
  • baudrateSelect : IfxPsi5_Psi5_ReceiveControl
  • baudrateSelection : IfxPsi5s_Psi5s_AscConfig
  • bitReversed : IfxDsadc_Dsadc_CarrierGenConfig
  • bitSampling : IfxAsclin_Spi_Config
  • bitStuffControl : IfxPsi5s_Psi5s_TransmitControl
  • bitStuffingEnabled : IfxPsi5_Psi5_TransmitControl
  • bitTiming : IfxAsclin_Asc_Config
  • blankoutTime : IfxPsi5_Psi5_PulseGeneration
  • blockMode : IfxDma_Dma_ChannelConfig
  • bottomMsgObjId : IfxMultican_Can_MsgObjControl
  • boundary : Ifx_LutLinearF32_Item
  • boundaryMode : IfxVadc_Adc_ChannelConfig
  • brd : IfxAsclin_Lin_Config
  • breakDetected : IfxAsclin_Lin_ErrorFlags
  • breakLength : IfxAsclin_Lin_LinControl
  • brg : IfxAsclin_Lin_Config
  • bsc : IfxAsclin_Lin_Config
  • btc : IfxAsclin_Lin_Config
  • buffer : _Fifo , SpiIf_Config
  • bufferDirection : IfxEray_Header
  • bufferIndex : IfxEray_Eray_ReceiveControl , IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • bufferReconfigEnabled : IfxEray_Eray_MessageRAMConfig
  • bufferServiceEnabled : IfxEray_Header
  • bufferSize : SpiIf_Config
  • buffMode : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • bus : IfxCpu_Trap_Id
  • busAccessError : IfxHssl_Hssl_errorFlags
  • busError : IfxFce_Crc_EnabledInterrupts
  • busPriority : IfxDma_Dma_ChannelConfig
  • busStatus : IfxI2c_I2c
  • bypassed : IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • byteAccess : SpiIf_Flags
  • byteSwap : IfxCif_Cam_MemConfig


iLLD_TC26B: Data Fields - Variables

- c -

  • call : Ifx_Shell_Command
  • callbackData : SpiIf_Ch_
  • canReadCount : IfxStdIf_DPipe_
  • canWriteCount : IfxStdIf_DPipe_
  • capture : IfxGtm_Tim_In_Config
  • captureClockFrequency : IfxGtm_Tim_In
  • captureFrequency : IfxCcu6_Icu
  • carrierGen : IfxDsadc_Rdc_ConfigHw
  • carrierWaveformMode : IfxDsadc_Dsadc_CarrierGenConfig
  • cb : IfxCif_Cam_MemAreas
  • CC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • cc0 : IfxCcu6_PwmHl_Config
  • cc1 : IfxCcu6_PwmHl_Config
  • cc2 : IfxCcu6_PwmHl_Config
  • cc60In : IfxCcu6_Icu_Pins
  • cc60Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc61In : IfxCcu6_Icu_Pins
  • cc61Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc62In : IfxCcu6_Icu_Pins
  • cc62Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc6xInputMode : IfxCcu6_Icu_Pins
  • ccpos0 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccpos1 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccpos2 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccposxInputMode : IfxCcu6_Icu_Pins
  • ccu0Enabled : IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tom_Pwm_Interrupt
  • ccu1Enabled : IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tom_Pwm_Interrupt
  • ccu6 : IfxCcu6_Icu , IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_Icu_Config , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TimerWithTrigger , IfxCcu6_TimerWithTrigger_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config
  • ccucon0 : IfxScuCcu_ClockDistributionConfig
  • ccucon1 : IfxScuCcu_ClockDistributionConfig
  • ccucon2 : IfxScuCcu_ClockDistributionConfig
  • ccucon5 : IfxScuCcu_ClockDistributionConfig
  • ccucon6 : IfxScuCcu_ClockDistributionConfig
  • ccucon7 : IfxScuCcu_ClockDistributionConfig
  • ccx : IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s
  • ccxActiveState : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • ccxOutputEnabled : IfxStdIf_PwmHl_Config
  • ccxTemp : IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_s
  • CE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • cfgData : Ifx_AngleTrkF32
  • channel : IfxDma_Dma_Channel , IfxDsadc_Cin_In , IfxDsadc_Cout_Out , IfxDsadc_Din_In , IfxDsadc_Dsadc_Channel , IfxDsadc_Dsn_In , IfxDsadc_Dsp_In , IfxDsadc_Itr_In , IfxGtm_Atom_ToutMap , IfxGtm_Tim_In , IfxGtm_Tim_TinMap , IfxGtm_Tom_ToutMap , IfxGtm_Trig_Source , IfxIom_Driver_Lam , IfxIom_Driver_LamConfig , IfxPsi5_Psi5_Channel , IfxSent_Sent_Channel , IfxVadc_Adc_Channel
  • channelAConnectedNode : IfxEray_Eray_Succ1Config
  • channelAFiltered : IfxEray_Header
  • channelAMacrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelAMicrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelAReceptionDelay : IfxEray_Eray_Gtu05Config
  • channelASymbolTransmitted : IfxEray_Eray_Succ1Config
  • channelBasedCs : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • channelBConnectedNode : IfxEray_Eray_Succ1Config
  • channelBFiltered : IfxEray_Header
  • channelBMacrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelBMicrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelBReceptionDelay : IfxEray_Eray_Gtu05Config
  • channelBSymbolTransmitted : IfxEray_Eray_Succ1Config
  • channelCount : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • channelId : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_TPwm_Timer12 , IfxDma_Dma_Channel , IfxDma_Dma_ChannelConfig , IfxDsadc_Dsadc_Channel , IfxDsadc_Dsadc_ChannelConfig , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig , IfxPsi5_Psi5_Channel , IfxPsi5_Psi5_ChannelConfig , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Psi5s_Channel , IfxPsi5s_Psi5s_ChannelConfig , IfxPsi5s_Psi5s_ReceivedBits , IfxQspi_SpiMaster_Channel_s , IfxScu_Req_In , IfxSent_Sent_Channel , IfxSent_Sent_ChannelConfig , IfxSent_Sent_In , IfxSent_Spc_Out , IfxVadc_Adc_ChannelConfig , IfxVadc_Vadcg_In
  • channelIndex : IfxGtm_Tim_In , IfxGtm_Tim_In_Config
  • channelInterruptControl : IfxDma_Dma_ChannelConfig
  • channelInterruptEnabled : IfxDma_Dma_ChannelConfig
  • channelInterruptPriority : IfxDma_Dma_ChannelConfig
  • channelInterruptTypeOfService : IfxDma_Dma_ChannelConfig
  • channelMode : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_TPwm_Timer12
  • channelNumberCodeError : IfxHssl_Hssl_errorFlags
  • channelOut : IfxCcu6_TPwm , IfxCcu6_TPwm_Config
  • channelPins : IfxDsadc_Dsadc_ChannelConfig
  • channelPriority : IfxVadc_Adc_ChannelConfig
  • channels : IfxVadc_Adc_EmuxControl
  • channelSelectionStyle : IfxVadc_Adc_EmuxControl
  • channelServProvider : IfxVadc_Adc_ChannelConfig
  • channelsMask : IfxGtm_Atom_Timer , IfxGtm_Tom_Timer
  • channelSrcNr : IfxVadc_Adc_ChannelConfig
  • channelTrigger : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • channelTriggerCounter : IfxPsi5_Psi5_ChannelTrigger , IfxPsi5s_Psi5s_ChannelTrigger
  • channelTriggerValue : IfxPsi5_Psi5_ChannelTrigger , IfxPsi5s_Psi5s_ChannelTrigger
  • checksum : IfxAsclin_Lin_DataControl
  • checksumMode : IfxAsclin_Lin_PduType
  • CIC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • cif : IfxCif_Cam
  • cin : IfxDsadc_Dsadc_ChannelPins
  • cinMode : IfxDsadc_Dsadc_ChannelPins
  • clearEvent : IfxIom_Driver_LamEventWindowConfig
  • clearRx : IfxStdIf_DPipe_
  • clearTimerOnGlitch : IfxIom_Driver_LamFilterConfig
  • clearTx : IfxStdIf_DPipe_
  • clk : IfxPsi5s_Psi5s_Pins
  • clkMode : IfxPsi5s_Psi5s_Pins
  • clock : IfxCcu6_Icu_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config , IfxCpu_Perf , IfxGtm_Atom_Timer_Config , IfxGtm_Tim_In_ConfigCapture , IfxGtm_Tim_In_ConfigFilter , IfxGtm_Tim_In_ConfigTimeout , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Timer_Config
  • clockConfig : IfxMsc_Msc_Config
  • clockCorrectionCyclesHalt : IfxEray_Eray_Succ3Config
  • clockCorrectionCyclesPassive : IfxEray_Eray_Succ3Config
  • clockDistribution : IfxScuCcu_Config
  • clockFreq : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base
  • clockInput : IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • clockOutput : IfxPsi5s_Psi5s_AscConfig
  • clockPeriod : IfxDsadc_Rdc_Ts
  • clockPolarity : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • clockSelect : IfxMultican_Can_Config
  • clockSelectAbra : IfxMsc_Msc_Abra
  • clockSource : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config
  • clockSyncErrorHalt : IfxEray_Eray_Succ1Config
  • clrInternalResetFlag : IfxScuWdt_Config
  • clusterDrift : IfxEray_Eray_Gtu05Config
  • cmd : Ifx_Shell
  • cmdHistory : Ifx_Shell
  • cmdState : Ifx_Shell_Runtime
  • cmdStr : Ifx_Shell_CmdLine , Ifx_Shell_Runtime
  • code : IfxVadc_Adc_EmuxControl
  • codeforOne : IfxPsi5s_Psi5s_PulseGeneration
  • codeforZero : IfxPsi5s_Psi5s_PulseGeneration
  • col : IfxEth_MiiPins
  • collisionAvoidanceDuration : IfxEray_Eray_Prtc1Control
  • collisionDetectionEnable : IfxAsclin_Lin_FrameControl
  • collisionDetectionError : IfxAsclin_Lin_ErrorFlags
  • combFilter : IfxDsadc_Dsadc_ChannelConfig
  • combFilterShift : IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • combFilterType : IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • commandDataCommandReceptionMode : IfxMsc_Msc_DownstreamControlConfig
  • commandFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • commandFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • commandFrameLength : IfxMsc_Msc_DownstreamControlConfig
  • commandLine : Ifx_Shell_Command
  • commandList : Ifx_Shell , Ifx_Shell_Config
  • common : IfxCif_Cam_Config
  • commonModeVoltage : IfxDsadc_Dsadc_ModulatorConfig
  • comparator : IfxStm_CompareConfig , IfxStm_Timer , IfxStm_Timer_Config
  • comparatorInterrupt : IfxStm_CompareConfig
  • comparatorShift : IfxStm_Timer
  • comparatorValue : IfxStm_Timer
  • compareOffset : IfxStm_CompareConfig
  • compareSize : IfxStm_CompareConfig
  • compareValue : IfxCcu6_PwmBc_Timer13 , IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • config : IfxEth , IfxGtm_Trig_Channel
  • configBit : IfxSent_Sent_SerialMessageFrame
  • configError : IfxFce_Crc_EnabledInterrupts
  • configResult : IfxCif_Cam
  • configuration : IfxPsi5_Psi5_Message
  • configurationError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • contextManagement : IfxCpu_Trap_Id
  • control : Ifx_Shell , IfxMultican_Can_MsgObjConfig
  • controlFrameExtensionPassivePhaseLength : IfxMsc_Msc_DownstreamControlExtensionConfig
  • controllerConfig : IfxEray_Eray_NodeConfig
  • controlSource : IfxIom_Driver_LamEventWindowConfig
  • copyData : IfxMultican_Can_GatewayConfig
  • copyDataLengthCode : IfxMultican_Can_GatewayConfig
  • copyId : IfxMultican_Can_GatewayConfig
  • correctionOffset : IfxEray_Eray_Gtu04Config
  • cosIn : Ifx_AngleTrkF32 , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc
  • count : Ifx_Fifo_Shared
  • count64 : IfxFft_Fft_Job_s
  • countDir : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStdIf_Timer_Config , IfxStm_Timer_Base
  • counter : IfxCpu_Counter
  • counter1 : IfxCpu_Perf
  • counter2 : IfxCpu_Perf
  • counter3 : IfxCpu_Perf
  • counterValue : IfxCcu6_Icu_Config , IfxCcu6_PwmBc_Timer12 , IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer12 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • countingInputMode : IfxCcu6_Icu_Clock
  • countMode : IfxCcu6_Icu_Config , IfxCcu6_PwmBc_Timer12 , IfxCcu6_Timer_Timer12 , IfxCcu6_TPwm_Timer12
  • countOneStep : Timer_Functions
  • cout0 : IfxCcu6_PwmHl_Config
  • cout1 : IfxCcu6_PwmHl_Config
  • cout2 : IfxCcu6_PwmHl_Config
  • cout60 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout61 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout62 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout63 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • coutx : IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s
  • coutxActiveState : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • coutxOutputEnabled : IfxStdIf_PwmHl_Config
  • coutxTemp : IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_s
  • cpol : IfxAsclin_Spi_InputOutputControl
  • cr : IfxCif_Cam_MemAreas
  • crc : IfxPsi5_Psi5_FrameData , IfxPsi5_Psi5_Message , IfxPsi5s_Psi5s_ReceivedBits , IfxSent_Sent_SerialMessageFrame
  • crc32BitReflectionEnabled : IfxFce_Crc_CrcConfig
  • crc32Kernel : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • crcCheckCompared : IfxFce_Crc_CrcConfig
  • crcError : IfxHssl_Hssl_errorFlags , IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_ReceivedBits
  • crcErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • crcErrorInterrupt : IfxSent_Sent_Enable
  • crcGenerationControl : IfxPsi5s_Psi5s_TransmitControl
  • crcGenerationEnabled : IfxPsi5_Psi5_TransmitControl
  • crchighbit : Ifc_Crc_Table
  • crcinit_direct : Ifc_Crc
  • crcinit_nondirect : Ifc_Crc
  • crcmask : Ifc_Crc_Table
  • crcMethodDisabled : IfxSent_Sent_ReceiveControl
  • crcMismatch : IfxFce_Crc_EnabledInterrupts
  • crcMode : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • crcModeDisabled : IfxSent_Sent_ReceiveControl
  • crcOrParity : IfxPsi5_Psi5_ReceiveControl , IfxPsi5s_Psi5s_ReceiveControl
  • crcResultInverted : IfxFce_Crc_CrcConfig
  • crctab : Ifc_Crc_Table16 , Ifc_Crc_Table32 , Ifc_Crc_Table8
  • crcxor : Ifc_Crc
  • crs : IfxEth_MiiPins
  • crsDiv : IfxEth_RmiiPins
  • csActiveLevel : SpiIf_ChMode
  • csEnable : IfxAsclin_Lin_LinControl
  • csi : IfxAsclin_Lin_LinControl
  • csInactiveDelay : SpiIf_ChMode
  • csLeadDelay : SpiIf_ChMode
  • cslpPolarity : IfxMsc_Msc_OutputControlConfig
  • csr : IfxFft_Fft_Job_s
  • csTrailDelay : SpiIf_ChMode
  • cts : IfxAsclin_Asc_Pins
  • ctsMode : IfxAsclin_Asc_Pins
  • currentFrameRequest : IfxHssl_Hssl_Channel
  • cursor : Ifx_Shell_CmdLine
  • cutOffFrequency : Ifx_LowPassPt1F32_Config
  • cycleCode : IfxEray_Header
  • cycleNumber : IfxEray_ReceivedHeader


iLLD_TC26B: Data Fields - Variables

- d -

  • data : Ifc_Crc_Table16 , Ifc_Crc_Table32 , Ifc_Crc_Table8 , Ifx_DataBufferMode_TimeStampSingle , Ifx_Shell_Command , IfxAsclin_Lin_Config , IfxAsclin_Spi_Job , IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig , IfxEray_Eray_ReceivedFrame , IfxMultican_Message , IfxPsi5s_Psi5s_Frame , IfxSent_Sent_Frame , SpiIf_Job
  • dataBufferMode : IfxAsclin_Asc , IfxAsclin_Asc_Config
  • dataByteReflectionEnabled : IfxFce_Crc_CrcConfig
  • dataCoherent : IfxGtm_Tim_In
  • dataFrameExtensionPassivePhaseLength : IfxMsc_Msc_DownstreamControlExtensionConfig
  • dataFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • dataFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • dataFramePassivePhaseLength : IfxMsc_Msc_DownstreamControlConfig
  • dataHeading : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • dataLength : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_DataControl , IfxAsclin_Lin_PduType , IfxAsclin_Spi_Config
  • dataLengthError : IfxHssl_Hssl_errorFlags
  • dataLost : IfxGtm_Tim_In
  • dataPointer : IfxEray_Header
  • dataPtr : IfxAsclin_Lin_PduType
  • dataReceived : IfxEray_Eray_ReceiveControl
  • dataShift : IfxDsadc_Dsadc_FirFilterConfig
  • dataSize : IfxMtu_SramItem
  • dataTransfered : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • dataWidth : IfxAsclin_Spi , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • DB : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • DBE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • dc : IfxCif_Cam_JpegTable
  • DC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • DE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • deactivateSlso : IfxQspi_SpiMaster_Channel_s
  • deadtime : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • deadTimeValue : IfxCcu6_TPwm_Timer12
  • debugPathEnabled : IfxCif_Cam_Common
  • decimationFactor : IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • decodingCorrection : IfxEray_Eray_Gtu05Config
  • delay : IfxQspi_DelayConst
  • delayLength : IfxPsi5_Psi5_PulseGeneration
  • delta : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • demodulator : IfxDsadc_Dsadc_ChannelConfig
  • denominator : IfxAsclin_Lin_BaudrateGeneration
  • density : IfxCif_Cam_JfifHeader
  • densityX : IfxCif_Cam_JfifHeader
  • densityY : IfxCif_Cam_JfifHeader
  • description : Ifx_Shell_Syntax
  • descriptorMode : IfxEth , IfxEth_Config
  • destinationAddress : IfxDma_Dma_ChannelConfig
  • destinationAddressCircularRange : IfxDma_Dma_ChannelConfig
  • destinationAddressIncrementDirection : IfxDma_Dma_ChannelConfig
  • destinationAddressIncrementStep : IfxDma_Dma_ChannelConfig
  • destinationCircularBufferEnabled : IfxDma_Dma_ChannelConfig
  • deviceAddress : IfxI2c_I2c_Device , IfxI2c_I2c_deviceConfig
  • DIC : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • digitalFrequency : IfxVadc_Adc_Config
  • digitalGlitchFilterDepth : IfxSent_Sent_InputOutputControl
  • digitalInputFilterDepth : IfxPsi5_Psi5_InputOutputControl
  • din : IfxDsadc_Dsadc_ChannelPins
  • dinMode : IfxDsadc_Dsadc_ChannelPins
  • direction : Ifx_AngleTrkF32_PosIf , IfxAsclin_Lin_PduType , IfxGpt12_IncrEnc
  • disablePostCalibration : IfxVadc_Adc_GroupConfig
  • disableUpdate : IfxStdIf_Timer_
  • disableWatchdog : IfxScuWdt_Config
  • discardCount : IfxDsadc_Dsadc_IntegratorConfig
  • discardDmaChannel : IfxFft_Fft
  • discardDmaChannelId : IfxFft_Fft_Config
  • dividerMode : IfxMsc_Msc_Clock
  • dma : IfxDma_Dma , IfxDma_Dma_Channel , IfxDma_Dma_Config , IfxQspi_SpiMaster , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config
  • downscaling : IfxCif_Cam_Config
  • downstreamConfig : IfxMsc_Msc_Config
  • downstreamDataSourcesHigh : IfxMsc_Msc_DownstreamControlConfig
  • downstreamDataSourcesLow : IfxMsc_Msc_DownstreamControlConfig
  • downstreamExtensionConfig : IfxMsc_Msc_Config
  • downstreamExtensionDataSourcesHigh : IfxMsc_Msc_DownstreamControlExtensionConfig
  • downstreamExtensionDataSourcesLow : IfxMsc_Msc_DownstreamControlExtensionConfig
  • DP : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • driftErrorsDisabled : IfxSent_Sent_ReceiveControl
  • driver : IfxQspi_SpiMaster_Output , IfxSent_Sent_Channel , IfxSent_Sent_ChannelConfig , IfxStdIf_DPipe_ , IfxStdIf_Pos_ , IfxStdIf_PwmHl_ , IfxStdIf_Timer_ , SpiIf_ , SpiIf_Ch_ , SpiIf_ChConfig_
  • dsadc : IfxDsadc_Dsadc , IfxDsadc_Dsadc_Config , IfxDsadc_Rdc_Config
  • dsn : IfxDsadc_Dsadc_ChannelPins
  • dsnMode : IfxDsadc_Dsadc_ChannelPins
  • dsp : IfxDsadc_Dsadc_ChannelPins
  • dspMode : IfxDsadc_Dsadc_ChannelPins
  • dummyRxValue : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • dummyTxValue : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • dutyCycle : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • dynamicActionPoint : IfxEray_Eray_Gtu09Config
  • dynamicSlotCount : IfxEray_Eray_Gtu08Config
  • dynamicSlotLength : IfxEray_Eray_Gtu08Config


iLLD_TC26B: Data Fields - Variables

- e -

  • EC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • eccInvPos0 : IfxMtu_SramItem
  • eccInvPos1 : IfxMtu_SramItem
  • eccSize : IfxMtu_SramItem
  • echo : Ifx_Shell_Config , Ifx_Shell_Flags , Ifx_Shell_Runtime
  • echoError : Ifx_Shell_Flags
  • ED : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • edgeCount : IfxGtm_Tim_In
  • edgeCounterCleared : IfxSent_Sent_InputOutputControl
  • edgeCounterUpper : IfxGtm_Tim_In
  • elementSize : _Fifo
  • emem : IfxCif_Cam
  • emergencyEnabled : IfxStdIf_PwmHl_Config
  • emergencyStopEnableBits : IfxMsc_Msc_DownstreamControlConfig
  • emergencyStopEnabled : IfxSmu_configFsp
  • emergencyStopExtensionEnableBits : IfxMsc_Msc_DownstreamControlExtensionConfig
  • emuxInterface : IfxVadc_Adc_EmuxControl
  • emuxOutPinConfig : IfxVadc_Adc_EmuxControl
  • en0 : IfxMsc_Msc_Io
  • en1 : IfxMsc_Msc_Io
  • en2 : IfxMsc_Msc_Io
  • en3 : IfxMsc_Msc_Io
  • enable : IfxSent_Sent_EnabledInterrupts
  • enableAutomaticPasswordChange : IfxScuWdt_Config
  • enabled : Ifx_Shell_Flags , IfxCif_Cam_Downscaling , IfxDsadc_Dsadc_RectifierConfig , IfxDsadc_Rdc_Ts , IfxMultican_Can_InterruptSource , IfxStdIf_Timer_TrigConfig , SpiIf_ChMode
  • enabledInterrupt : IfxAsclin_Lin_InterruptConfig
  • enabledInterrupts : IfxFce_Crc_CrcConfig , IfxSent_Sent_ChannelConfig
  • enableFaultToRunStateTransition : IfxSmu_configFsp
  • enableSecureLock : IfxDts_Dts_Config
  • enableSmuRestriction : IfxScuWdt_Config
  • enableTimerCheck : IfxScuWdt_Config
  • enableTimerCheckTolerance : IfxScuWdt_Config
  • enableTransmit : IfxMultican_Can_GatewayConfig
  • end : IfxFlash_flashSector , IfxHssl_Hssl_AccessWindow
  • endIndex : _Fifo
  • ENDIS_CTRL : IfxGtm_Tom_TGC
  • ENDIS_STAT : IfxGtm_Tom_TGC
  • endPulseIgnored : IfxSent_Sent_ReceiveControl
  • enhancedProtocolSelected : IfxPsi5_Psi5_TransmitControl
  • enhancedProtocolSelection : IfxPsi5s_Psi5s_TransmitControl
  • entry : IfxCif_Cam_TableInfo
  • ep : IfxCif_Cam_MemAreas
  • eray : IfxEray_Eray
  • erPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • error : IfxEth
  • errorChecks : SpiIf_Ch_ , SpiIf_ChConfig_
  • errorFlag0 : IfxPsi5s_Psi5s_ReceivedBits
  • errorFlag1 : IfxPsi5s_Psi5s_ReceivedBits
  • errorFlags : IfxAsclin_Asc , IfxAsclin_Asc_Config , IfxAsclin_Spi , IfxHssl_Hssl , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiSlave
  • errorFlagsStatus : IfxAsclin_Lin
  • errorInterruptNode : IfxSent_Sent_InterruptNodeControl
  • errorThreshold : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • errorType : IfxFlash_ErrorTracking_Address
  • errorWarningLevel : IfxMultican_Can_NodeConfig
  • ES : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits
  • escBracketNum : Ifx_Shell_Runtime
  • ethSfr : IfxEth , IfxEth_Config
  • event : IfxIom_Driver_LamConfig
  • eventGate : IfxDsadc_Dsadc_AuxFilterConfig
  • eventReader : _Fifo
  • eventSelect : IfxDsadc_Dsadc_AuxFilterConfig
  • eventWindow : IfxIom_Driver_LamConfig
  • eventWriter : _Fifo
  • exBreakDetected : IfxAsclin_Lin_EnabledInterrupts
  • exchange : SpiIf_funcs
  • exCollisionDetectionError : IfxAsclin_Lin_EnabledInterrupts
  • execute : Ifx_Shell_Protocol
  • exFramingError : IfxAsclin_Lin_EnabledInterrupts
  • exHeaderTimeout : IfxAsclin_Lin_EnabledInterrupts
  • exLinAutobaudDetectionError : IfxAsclin_Lin_EnabledInterrupts
  • exLinChecksumError : IfxAsclin_Lin_EnabledInterrupts
  • exLinParityError : IfxAsclin_Lin_EnabledInterrupts
  • expect : IfxFft_Fft_Count64
  • expectedCrc : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • expectTimeoutError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • exPriority : IfxAsclin_Lin_InterruptConfig
  • exReceiveFIFOOverflow : IfxAsclin_Lin_EnabledInterrupts
  • exResponseTimeout : IfxAsclin_Lin_EnabledInterrupts
  • ext : IfxEth_AltRxDescr0_Bits
  • extClockEnabled : IfxCcu6_Icu_Clock
  • extClockInput : IfxCcu6_Icu_Clock
  • extendedFrame : IfxMultican_Can_MsgObjControl
  • extendedSerialFrameMode : IfxSent_Sent_ReceiveControl
  • extension : IfxMsc_Msc_DownstreamControlExtensionConfig
  • externalOffset : IfxEray_Eray_Gtu11Config
  • externalOffsetCorrection : IfxEray_Eray_Gtu11Config
  • externalRate : IfxEray_Eray_Gtu11Config
  • externalRateCorrection : IfxEray_Eray_Gtu11Config
  • externalSignalInjectionPin0 : IfxMsc_Msc_DownstreamControlConfig
  • externalSignalInjectionPin1 : IfxMsc_Msc_DownstreamControlConfig
  • externalTimeBaseSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5_Psi5_TimeStampConfig , IfxPsi5s_Psi5s_PulseGeneration , IfxPsi5s_Psi5s_TimeStampConfig
  • externalTrigger : IfxSent_Sent_InputOutputControl
  • externalTriggerSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5s_Psi5s_PulseGeneration
  • extInputTrigger : IfxCcu6_Icu_TriggerConfig
  • extInputTriggerMode : IfxCcu6_Icu_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • exTransmissionCompleted : IfxAsclin_Lin_EnabledInterrupts
  • exTransmitFIFOOverflow : IfxAsclin_Lin_EnabledInterrupts
  • extraPaths : IfxCif_Cam_Common


iLLD_TC26B: Data Fields - Variables

- f -

  • fallingEdgeFilterTime : IfxGtm_Tim_In_ConfigFilter , IfxIom_Driver_LamFilterConfig
  • fallingEdgeMode : IfxGtm_Tim_In_ConfigFilter
  • fastBaudrate : IfxMultican_Can_FdConfig
  • fastBitRate : IfxMultican_Can_MsgObjControl , IfxMultican_Message
  • fastClock : IfxPsi5_Psi5_Config
  • fastNode : IfxMultican_Can_Node
  • fastSamplePoint : IfxMultican_Can_FdConfig
  • fastSynchJumpWidth : IfxMultican_Can_FdConfig
  • faultFreeStateFrequencyMax : IfxSmu_configFsp
  • faultFreeStateFrequencyMin : IfxSmu_configFsp
  • faultStateTime : IfxSmu_configFsp
  • fce : IfxFce_Crc , IfxFce_Crc_Config , IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • fclClockControl : IfxMsc_Msc_OutputControlConfig
  • fcln : IfxMsc_Msc_Io
  • fclp : IfxMsc_Msc_Io
  • fclpPolarity : IfxMsc_Msc_OutputControlConfig
  • fdConfig : IfxMultican_Can_NodeConfig
  • FF : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • fft : IfxFft_Fft , IfxFft_Fft_Config , IfxFft_Fft_Job_s , IfxFft_Fft_JobConfig
  • fftLength : IfxFft_Fft_JobConfig
  • fifo : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config
  • fifoBufferStartIndex : IfxEray_Eray_MessageRAMConfig
  • fifoConfigured : IfxEray_Eray_MessageRAMConfig
  • fifoDepth : IfxEray_Eray_MessageRAMConfig
  • fifoNullFramesRejected : IfxEray_Eray_MessageRAMConfig
  • fifoPointer : IfxMultican_Can_MsgObj
  • fifoWarningLevel : IfxPsi5_Psi5_ReceiveControl
  • filter : IfxGtm_Tim_In_Config , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig
  • filterDepth : IfxAsclin_Lin_BitSamplingControl
  • filteredCycleNumber : IfxEray_Eray_MessageRAMConfig
  • fir0Enabled : IfxDsadc_Dsadc_FirFilterConfig
  • fir1Enabled : IfxDsadc_Dsadc_FirFilterConfig
  • firFilter : IfxDsadc_Dsadc_ChannelConfig
  • firstDynamicBuffer : IfxEray_Eray_MessageRAMConfig
  • firstSlaveObjId : IfxMultican_Can_MsgObjConfig
  • firstWrite : IfxQspi_SpiMaster_Channel_s
  • FL : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • flags : IfxAsclin_Asc_ErrorFlagsUnion , IfxAsclin_Lin_FrameDataControl , IfxFft_Fft , SpiIf_Ch_
  • flashFconWaitStateConfig : IfxScuCcu_Config
  • flexibleDataRate : IfxMultican_Can_NodeConfig
  • flushQueueAfterInit : IfxVadc_Adc_QueueConfig
  • flushTx : IfxStdIf_DPipe_
  • fracDiv : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • fractionalDividerEnabled : IfxPsi5s_Psi5s_AscConfig
  • frame : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxMultican_Can_MsgObjConfig , IfxPsi5_Psi5_Frame
  • frameCheckMode : IfxSent_Sent_ReceiveControl
  • frameCounterInterrupt : IfxMultican_Can_NodeConfig
  • frameError : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • frameExpectation : IfxPsi5_Psi5_ReceiveControl
  • frameId : IfxEray_Header , IfxEray_ReceivedHeader , IfxPsi5s_Psi5s_ReceivedBits
  • frameIdFilter : IfxEray_Eray_MessageRAMConfig
  • frameIdSelect : IfxPsi5s_Psi5s_ReceiveControl
  • frameLength : IfxSent_Sent_ReceiveControl
  • frameMode : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config
  • frameTimestampSelect : IfxPsi5_Psi5_ReceiveControl
  • framingCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • framingErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • frequency : Icu_Config , Icu_s , IfxCcu6_Icu_Config , IfxDsadc_Dsadc_CarrierGenConfig , IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock , IfxStdIf_Timer_Config , TPwm_Config , TPwm_s
  • frequencyDriftErrorInterrupt : IfxSent_Sent_Enable
  • frequencyRangeErrorInterrupt : IfxSent_Sent_Enable
  • FS : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr1_Bits
  • FT : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • functions : SpiIf_
  • FUPD_CTRL : IfxGtm_Tom_TGC


iLLD_TC26B: Data Fields - Variables

- g -

  • gain : Ifx_LowPassPt1F32_Config , Ifx_LutIndexedLinearF32_Item , Ifx_LutLinearF32_Item
  • gatewayConfig : IfxMultican_Can_MsgObjConfig
  • gatewayDstObjId : IfxMultican_Can_GatewayConfig
  • gatewayTransfers : IfxMultican_Can_MsgObjConfig
  • gatingMode : IfxVadc_Adc_GatingTriggerConfig
  • gatingSource : IfxVadc_Adc_GatingTriggerConfig
  • getAbsolutePosition : IfxStdIf_Pos_
  • getDeadtime : IfxStdIf_PwmHl_
  • getDeadtimeTick : IfxStdIf_PwmHl_
  • getDirection : IfxStdIf_Pos_
  • getFault : IfxStdIf_Pos_
  • getFrequency : IfxStdIf_Timer_
  • getInputFrequency : IfxStdIf_Timer_
  • getMinPulse : IfxStdIf_PwmHl_
  • getMode : IfxStdIf_PwmHl_
  • getOffset : IfxStdIf_Pos_
  • getPeriod : IfxStdIf_Timer_
  • getPeriodPerRotation : IfxStdIf_Pos_
  • getPosition : IfxStdIf_Pos_
  • getRawPosition : IfxStdIf_Pos_
  • getReadCount : IfxStdIf_DPipe_
  • getReadEvent : IfxStdIf_DPipe_
  • getRefreshPeriod : IfxStdIf_Pos_
  • getResolution : IfxStdIf_Pos_ , IfxStdIf_Timer_
  • getSendCount : IfxStdIf_DPipe_
  • getSensorType : IfxStdIf_Pos_
  • getSpeed : IfxStdIf_Pos_
  • getStatus : SpiIf_funcs
  • getTimeStamp : Icu_Functions
  • getTrigger : IfxStdIf_Timer_
  • getTurn : IfxStdIf_Pos_
  • getTxTimeStamp : IfxStdIf_DPipe_
  • getWriteCount : IfxStdIf_DPipe_
  • getWriteEvent : IfxStdIf_DPipe_
  • GLB_CTRL : IfxGtm_Tom_TGC
  • glitch : IfxGtm_Tim_In
  • glitchFallingCleared : IfxSent_Sent_InputOutputControl
  • glitchRisingCleared : IfxSent_Sent_InputOutputControl
  • globalControlConfig : IfxPsi5s_Psi5s_Config
  • globalInputClass : IfxVadc_Adc_Config
  • globalResultUsage : IfxVadc_Adc_ChannelConfig
  • group : IfxVadc_Adc_Channel , IfxVadc_Adc_ChannelConfig , IfxVadc_Adc_Group
  • groupDelay : IfxDsadc_Rdc
  • groupId : IfxVadc_Adc_EmuxControl , IfxVadc_Adc_Group , IfxVadc_Adc_GroupConfig , IfxVadc_GxBfl_Out , IfxVadc_Vadcg_In
  • gtm : IfxDsadc_Rdc_GtmTimestamp , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tim_In_Config , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config
  • gtmTimestamp : IfxDsadc_Rdc_ConfigHw
  • gtu01Config : IfxEray_Eray_GTUConfig
  • gtu02Config : IfxEray_Eray_GTUConfig
  • gtu03Config : IfxEray_Eray_GTUConfig
  • gtu04Config : IfxEray_Eray_GTUConfig
  • gtu05Config : IfxEray_Eray_GTUConfig
  • gtu06Config : IfxEray_Eray_GTUConfig
  • gtu07Config : IfxEray_Eray_GTUConfig
  • gtu08Config : IfxEray_Eray_GTUConfig
  • gtu09Config : IfxEray_Eray_GTUConfig
  • gtu10Config : IfxEray_Eray_GTUConfig
  • gtu11Config : IfxEray_Eray_GTUConfig
  • gtuConfig : IfxEray_Eray_ControllerConfig


iLLD_TC26B: Data Fields - Variables

- h -

  • halfTs : Ifx_AngleTrkF32
  • hallPatternIndex : IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config
  • hallSyncEvent : IfxCcu6_PwmBc_Config
  • hardware : IfxDsadc_Rdc , IfxDsadc_Rdc_Config
  • hardwareRequestEnabled : IfxDma_Dma_ChannelConfig
  • header : IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig , IfxEray_Eray_ReceivedFrame
  • headerCrc : IfxEray_ReceivedHeader
  • headerErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • headerErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • headerID : IfxAsclin_Lin_FrameDataControl
  • headerOnly : IfxAsclin_Lin_DataControl
  • headerReceived : IfxEray_Eray_ReceiveControl
  • headerTimeout : IfxAsclin_Lin_ErrorFlags , IfxAsclin_Lin_LinControl
  • headerTransfered : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • help : Ifx_Shell_Command
  • hFactor : IfxCif_Cam_Downscaling
  • highPhaseOfShiftClock : IfxMsc_Msc_Abra
  • highSpeedMode : IfxHssl_Hsct_Config
  • highWord : IfxPsi5_Psi5_Rdm
  • historyAdd : Ifx_Shell_CmdLine
  • historyItem : Ifx_Shell_CmdLine
  • hMode : IfxCif_Cam_Downscaling
  • hOffset : IfxCif_Cam_MemConfig , IfxCif_Cam_PictureInfo
  • hookFunction : IfxScuCcu_PllStepsConfig
  • hours : Ifx_DateTime
  • hsct : IfxHssl_Hsct , IfxHssl_Hsct_Config , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • hSize : IfxCif_Cam_MemConfig , IfxCif_Cam_PictureInfo
  • hssl : IfxHssl_Hssl , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig , IfxHssl_Hssl_Config
  • hSyncPolarity : IfxCif_Cam_Config


iLLD_TC26B: Data Fields - Variables

- i -

  • i2c : IfxI2c_I2c , IfxI2c_I2c_Config , IfxI2c_I2c_Device , IfxI2c_I2c_deviceConfig
  • ibusyIsrProvider : IfxEray_Eray_Interrupt
  • ibusyPriority : IfxEray_Eray_Interrupt
  • IC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • id : IfxMultican_Message
  • ident : IfxCif_Cam_JfifHeader
  • idleDelay : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • idleDynamicSlots : IfxEray_Eray_Gtu09Config
  • idleTime : IfxPsi5s_Psi5s_GlobalControlConfig
  • IHE : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • ik : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • imag : cfloat32 , cfract , csfract , csint16 , csint32
  • image : IfxCif_Cam_MemInfo
  • immediateStartEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • in : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • index : Ifx_CircularBuffer , IfxModule_IndexMap
  • inhibitingAutomaticTransferEnabled : IfxPsi5_Psi5_TransmitControl
  • initPins : IfxGpt12_IncrEnc_Config , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_Timer_Config
  • inj0 : IfxMsc_Msc_Io
  • inj1 : IfxMsc_Msc_Io
  • injectionPositionPin0 : IfxMsc_Msc_DownstreamControlConfig
  • injectionPositionPin1 : IfxMsc_Msc_DownstreamControlConfig
  • inMode : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • input : IfxFft_Fft_Count64 , IfxGtm_Tim_In_ConfigFilter , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig , IfxQspi_SpiMaster_InputOutput
  • inputbuffer : Ifx_Shell_Runtime
  • inputClass : IfxVadc_Adc_ChannelConfig , IfxVadc_Adc_GroupConfig
  • inputConfig : IfxDsadc_Rdc_ConfigHw
  • inputCos : IfxDsadc_Rdc_ConfigHw , IfxDsadc_Rdc_Hw
  • inputDataSource : IfxDsadc_Dsadc_DemodulatorConfig
  • inputDmaChannel : IfxFft_Fft
  • inputDmaChannelId : IfxFft_Fft_Config
  • inputFormat : IfxFft_Fft_JobConfig
  • inputFrequency : IfxScuWdt_Config
  • inputGain : IfxDsadc_Dsadc_ModulatorConfig
  • inputIdx : IfxFft_Fft
  • inputInterface : IfxCif_Cam_Common
  • inputInverterEnabled : IfxPsi5_Psi5_InputOutputControl
  • inputLength : IfxFft_Fft_JobConfig
  • inputMode : IfxCcu6_PwmBc_Pins
  • inputOutput : IfxAsclin_Spi_Config
  • inputOutputControl : IfxPsi5_Psi5_ChannelConfig , IfxSent_Sent_ChannelConfig
  • inputPin : IfxDsadc_Dsadc_ModulatorConfig , IfxGtm_Tim_In_ConfigFilter
  • inputPinMode : IfxGtm_Tim_In_ConfigFilter
  • inputPriority : IfxFft_Fft_Config
  • inputPtr : IfxFft_Fft_Job_s , IfxFft_Fft_JobConfig
  • inputPulsePolarityHigh : IfxSent_Sent_InputOutputControl
  • inputSin : IfxDsadc_Rdc_ConfigHw , IfxDsadc_Rdc_Hw
  • inSeconds : IfxDsadc_Rdc_Ts
  • inSelect : IfxEth_Mdio_InOut , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut
  • instruction : IfxCpu_Perf
  • instructionErrors : IfxCpu_Trap_Id
  • int0IsrProvider : IfxEray_Eray_Interrupt
  • int0Priority : IfxEray_Eray_Interrupt
  • int1IsrProvider : IfxEray_Eray_Interrupt
  • int1Priority : IfxEray_Eray_Interrupt
  • INT_TRIG : IfxGtm_Tom_TGC
  • integrationCount : IfxDsadc_Dsadc_IntegratorConfig
  • integrationCycles : IfxDsadc_Dsadc_IntegratorConfig
  • integrationTrigger : IfxDsadc_Dsadc_DemodulatorConfig
  • integrator : IfxDsadc_Dsadc_ChannelConfig
  • interfaceMode : IfxHssl_Hsct_Config
  • internalProtection : IfxCpu_Trap_Id
  • internalShift : IfxDsadc_Dsadc_FirFilterConfig
  • interrupt : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxEray_Eray_Config , IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config , IfxSent_Sent_ChannelConfig
  • interrupt1 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt2 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt3 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt4 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interruptConfig : IfxMsc_Msc_Config
  • interruptRaiseThreshold : IfxDma_Dma_ChannelConfig
  • interuptNodeControl : IfxSent_Sent_ChannelConfig
  • inTicks : IfxDsadc_Rdc_Ts
  • intraIdx : IfxFft_Fft
  • intraPriority : IfxFft_Fft_Config
  • inverted : IfxCcu6_PwmHl_Base , IfxCcu6_PwmHl_Mode , IfxDsadc_Dsadc_CarrierGenConfig , IfxGtm_Atom_PwmHl_Base , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Tom_PwmHl_Base , IfxGtm_Tom_PwmHl_Mode , IfxIom_Driver_LamEventWindowConfig , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig
  • inWidth : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • io : Ifx_Shell , IfxMsc_Msc_Config
  • iomDriver : IfxIom_Driver_Lam , IfxIom_Driver_LamConfig
  • IPC : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • irqMode : IfxGtm_Tim_In_Config
  • irqModeTimer : IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • irqModeTrigger : IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • irqOnCntOverflow : IfxGtm_Tim_In_ConfigCapture
  • irqOnDatalost : IfxGtm_Tim_In_ConfigCapture
  • irqOnEcntOverflow : IfxGtm_Tim_In_ConfigCapture
  • irqOnGlitch : IfxGtm_Tim_In_ConfigFilter
  • irqOnNewVal : IfxGtm_Tim_In_ConfigCapture
  • irqOnTimeout : IfxGtm_Tim_In_ConfigTimeout
  • isInterruptMode : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • ispBpp : IfxCif_Cam
  • ispIn : IfxCif_Cam_Common
  • ispInterrupt : IfxCif_Cam_Common
  • ispMode : IfxCif_Cam , IfxCif_Cam_Config
  • ispRawBpp : IfxCif_Cam_Config
  • isrCount : IfxEth
  • isrPriority : IfxDts_Dts_Config , IfxEth_Config , IfxFce_Crc_Config , IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tim_In_Config , IfxGtm_Tom_Pwm_Interrupt , IfxStdIf_Timer_Config , IfxStdIf_Timer_TrigConfig
  • isrProvider : IfxEth_Config , IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tim_In_Config , IfxGtm_Tom_Pwm_Interrupt , IfxSent_Sent_Interrupt , IfxStdIf_Timer_Config , IfxStdIf_Timer_TrigConfig , SpiIf_Config
  • isrRxCount : IfxEth
  • isrTxCount : IfxEth
  • isrTypeOfService : IfxDts_Dts_Config , IfxFce_Crc_Config
  • items : IfxEth_RxDescrList , IfxEth_TxDescrList
  • itr : IfxDsadc_Dsadc_ChannelPins
  • itrMode : IfxDsadc_Dsadc_ChannelPins


iLLD_TC26B: Data Fields - Variables

- j -

  • jfif : IfxCif_Cam
  • job : IfxFft_Fft
  • jpegEnabled : IfxCif_Cam_Common
  • jpegTables : IfxCif_Cam_Common
  • JT : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits


iLLD_TC26B: Data Fields - Variables

- k -

  • k2Initial : IfxScuCcu_InitialStepConfig
  • k2Step : IfxScuCcu_PllStepsConfig
  • kd : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • ki : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • kp : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config


iLLD_TC26B: Data Fields - Variables

- l -

  • lamUsedMask : IfxIom_Driver
  • lastErrorCodeInterrupt : IfxMultican_Can_NodeConfig
  • latestTransmissionStart : IfxEray_Eray_ControllerConfig
  • LC : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits
  • LE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • leadDelay : IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • length : Ifx_CircularBuffer , Ifx_Shell_CmdLine , IfxCif_Cam_JfifHeader , IfxCif_Cam_TableInfo
  • lengthCode : IfxMultican_Message
  • lengthError : IfxFce_Crc_EnabledInterrupts
  • limitCheck : IfxVadc_Adc_ChannelConfig
  • lin : IfxAsclin_Lin_Config
  • linAutobaudDetectionError : IfxAsclin_Lin_ErrorFlags
  • linChecksumError : IfxAsclin_Lin_ErrorFlags
  • linFrameData : IfxAsclin_Lin
  • linMode : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • linParityError : IfxAsclin_Lin_ErrorFlags
  • listenTimeOut : IfxEray_Eray_Succ2Config
  • listenTimeOutNoise : IfxEray_Eray_Succ2Config
  • lmu : IfxFft_Fft , IfxFft_Fft_Config
  • LOC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • locals : Ifx_Shell
  • loopBack : IfxAsclin_Asc_Config , IfxAsclin_Spi_InputOutputControl , IfxHssl_Hsct , IfxHssl_Hsct_Config , IfxHssl_Hssl , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • loopback : SpiIf_ChMode
  • loopbackEnabled : IfxPsi5s_Psi5s_AscConfig
  • loopBackMode : IfxMultican_Can_NodeConfig
  • loopDelayOffset : IfxMultican_Can_FdConfig
  • lowerBoundary : IfxVadc_Adc_ChannelConfig
  • lowerLimit : IfxAsclin_Lin_BaudrateDetection
  • lowerTemperatureLimit : IfxDts_Dts_Config
  • lowPhaseOfShiftClock : IfxMsc_Msc_Abra
  • lowPowerSupply : IfxDsadc_Dsadc_Config
  • lowWord : IfxPsi5_Psi5_Rdm
  • LS : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr1_Bits


iLLD_TC26B: Data Fields - Variables

- m -

  • macAddress : IfxEth_Config
  • macroticksPerCycle : IfxEray_Eray_Gtu02Config
  • mainPath : IfxCif_Cam_Common
  • mask : Ifx_InternalMux_MuxConfig , IfxScuCcu_CcuconRegConfig , IfxScuCcu_FlashWaitstateConfig
  • masks : IfxPort_Esr_Masks
  • master : IfxVadc_Adc_GroupConfig
  • matchingId : IfxMultican_Can_MsgObjControl
  • maxColdStartAttempts : IfxEray_Eray_Succ1Config
  • maxcount : Ifx_Fifo_Shared
  • maxDriftOffset : IfxEray_Eray_Gtu06Config
  • maximumBaudrate : IfxQspi_SpiMaster , SpiIf_Config
  • maxOffsetCorrection : IfxEray_Eray_Gtu10Config
  • maxPulse : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base
  • maxRateCorrection : IfxEray_Eray_Gtu10Config
  • maxSpeed : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • maxSyncFrames : IfxEray_Eray_Gtu02Config
  • maxTicks : IfxDsadc_Rdc_Ts
  • mbistDelay : IfxMtu_SramItem
  • mbsc0IsrProvider : IfxEray_Eray_Interrupt
  • mbsc0Priority : IfxEray_Eray_Interrupt
  • mbsc1IsrProvider : IfxEray_Eray_Interrupt
  • mbsc1Priority : IfxEray_Eray_Interrupt
  • mcan : IfxMultican_Can , IfxMultican_Can_Node
  • mdc : IfxEth_MiiPins , IfxEth_RmiiPins
  • mdio : IfxEth_MiiPins , IfxEth_RmiiPins
  • measured : IfxAsclin_Lin_BaudrateDetection
  • medianFilter : IfxAsclin_Asc_BitTimingControl , IfxAsclin_Lin_BitSamplingControl , IfxAsclin_Spi_BitSamplingControl
  • memAreas : IfxCif_Cam
  • memFactor : IfxCif_Cam_MemConfig
  • memoryAccessViolation : IfxHssl_Hssl_errorFlags
  • memoryManagement : IfxCpu_Trap_Id
  • message : IfxPsi5_Psi5_SerialMessage
  • messageId : IfxMultican_Can_MsgObjConfig , IfxPsi5_Psi5_Message , IfxSent_Sent_SerialMessageFrame
  • messageLen : IfxMultican_Can_MsgObjControl
  • messageRAMConfig : IfxEray_Eray_NodeConfig
  • messagingBitsError : IfxPsi5_Psi5_FrameData
  • messagingBitsPresence : IfxPsi5_Psi5_ReceiveControl
  • microticksPerCycle : IfxEray_Eray_Gtu01Config
  • miiPins : IfxEth_Config
  • minPulse : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • minResolution : IfxStdIf_Timer_Config
  • minSpeed : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • minutes : Ifx_DateTime
  • mode : IfxCcu6_PwmHl_Base , IfxCcu6_PwmHl_Mode , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Atom_PwmHl_Base , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Tim_In_ConfigCapture , IfxGtm_Tom_Pwm_Interrupt , IfxGtm_Tom_PwmHl_Base , IfxGtm_Tom_PwmHl_Mode , IfxIom_Driver_LamFilterConfig , IfxMsc_Msc_en , IfxMsc_Msc_fcln , IfxMsc_Msc_fclp , IfxMsc_Msc_inj0 , IfxMsc_Msc_inj1 , IfxMsc_Msc_sdi , IfxMsc_Msc_son , IfxMsc_Msc_sop , IfxPort_Io_ConfigPin , IfxPort_Pin_Config , IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig , IfxQspi_SpiMaster_Input , IfxQspi_SpiMaster_Output , IfxSmu_configFsp , IfxVadc_Adc_EmuxControl , SpiIf_ChConfig_ , SpiIf_Config
  • modulator : IfxDsadc_Dsadc_ChannelConfig
  • modulatorClockFreq : IfxDsadc_Dsadc_ModulatorConfig
  • modulatorClockSelect : IfxDsadc_Dsadc_Config
  • module : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxCif_Clk_In , IfxCif_D_In , IfxCif_Hsnc_In , IfxCif_Vsnc_In , IfxDma_Dma_ChannelConfig , IfxDsadc_Cgpwm_Out , IfxDsadc_Cin_In , IfxDsadc_Cout_Out , IfxDsadc_Din_In , IfxDsadc_Dsadc_Channel , IfxDsadc_Dsadc_ChannelConfig , IfxDsadc_Dsn_In , IfxDsadc_Dsp_In , IfxDsadc_Itr_In , IfxDsadc_Sg_In , IfxEray_Eray_Config , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEth_Col_In , IfxEth_Crs_In , IfxEth_Crsdv_In , IfxEth_Mdc_Out , IfxEth_Mdio_InOut , IfxEth_Refclk_In , IfxEth_Rxclk_In , IfxEth_Rxd_In , IfxEth_Rxdv_In , IfxEth_Rxer_In , IfxEth_Txclk_In , IfxEth_Txd_Out , IfxEth_Txen_Out , IfxEth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_IncrEnc , IfxGpt12_IncrEnc_Config , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Clk_Out , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut , IfxIom_Driver , IfxIom_Driver_Config , IfxModule_IndexMap , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxMultican_Can_Config , IfxMultican_Can_NodeConfig , IfxMultican_Rxd_In , IfxMultican_Txd_Out , IfxPsi5_Psi5_Channel , IfxPsi5_Psi5_ChannelConfig , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Psi5s_Channel , IfxPsi5s_Psi5s_ChannelConfig , IfxPsi5s_Psi5s_Config , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Hwcfg_In , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_Config , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out , IfxVadc_Adc_Group , IfxVadc_Adc_GroupConfig , IfxVadc_Emux_Out , IfxVadc_GxBfl_Out , IfxVadc_Vadcg_In
  • moduleFreq : IfxMultican_Can_Config
  • moduleFrequency : IfxVadc_Adc_Config
  • mon : IfxIom_Driver_LamConfig
  • monIndex : IfxIom_Driver_Lam
  • monInput : IfxIom_Driver_Lam
  • moveSize : IfxDma_Dma_ChannelConfig
  • mrst : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • mrstMode : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • msc : IfxMsc_Msc , IfxMsc_Msc_Config
  • msgObjCount : IfxMultican_Can_MsgObj , IfxMultican_Can_MsgObjConfig
  • msgObjId : IfxMultican_Can_MsgObj , IfxMultican_Can_MsgObjConfig
  • mtsr : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • mtsrMode : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • multiChannelControl : IfxCcu6_PwmBc_Config
  • multiInputCaptureEnabled : IfxCcu6_Icu_ChannelConfig
  • muxConfig : Ifx_InternalMux_Config


iLLD_TC26B: Data Fields - Variables

- n -

  • name : Ifx_GlobalResources_Item
  • NC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • ndat0IsrProvider : IfxEray_Eray_Interrupt
  • ndat0Priority : IfxEray_Eray_Interrupt
  • ndat1IsrProvider : IfxEray_Eray_Interrupt
  • ndat1Priority : IfxEray_Eray_Interrupt
  • nDivider : IfxScuCcu_InitialStepConfig
  • nDividerAbra : IfxMsc_Msc_Abra
  • nDividerDownstream : IfxMsc_Msc_DownstreamControlExtensionConfig
  • negativeInput : IfxDsadc_Dsadc_ModulatorConfig
  • networkStartIdleTime : IfxEray_Eray_Gtu04Config
  • networkVectorLength : IfxEray_Eray_ControllerConfig
  • newData : IfxGtm_Tim_In
  • nextFreeAddress : IfxCif_Cam
  • nextJob : IfxFft_Fft_Job_s
  • nibbleControl : IfxSent_Sent_ChannelConfig
  • nibblePointer0 : IfxSent_Sent_NibbleControl
  • nibblePointer1 : IfxSent_Sent_NibbleControl
  • nibblePointer2 : IfxSent_Sent_NibbleControl
  • nibblePointer3 : IfxSent_Sent_NibbleControl
  • nibblePointer4 : IfxSent_Sent_NibbleControl
  • nibblePointer5 : IfxSent_Sent_NibbleControl
  • nibblePointer6 : IfxSent_Sent_NibbleControl
  • nibblePointer7 : IfxSent_Sent_NibbleControl
  • nibblesValueOutOfRangeErrorInterrupt : IfxSent_Sent_Enable
  • nibblesWrongErrorInterrupt : IfxSent_Sent_Enable
  • node : IfxMultican_Can_MsgObj , IfxMultican_Can_MsgObjConfig , IfxMultican_Can_Node
  • nodeAPins : IfxEray_Eray_Pins
  • nodeBPins : IfxEray_Eray_Pins
  • nodeId : IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxMultican_Can_Node , IfxMultican_Can_NodeConfig , IfxMultican_Rxd_In , IfxMultican_Txd_Out
  • nodePointer : IfxMultican_Can_Config
  • noFrameReceivedError : IfxPsi5_Psi5_FrameData
  • noiseFilter : PwmHl_Config
  • nominalBaudrate : IfxMultican_Can_FdConfig
  • nominalSamplePoint : IfxMultican_Can_FdConfig
  • nominalSynchJumpWidth : IfxMultican_Can_FdConfig
  • nonMaskableInterrupt : IfxCpu_Trap_Id
  • notAcknowledgeError : IfxHssl_Hssl_errorFlags
  • nullFrameIndicator : IfxEray_ReceivedHeader
  • numberOfBitsError : IfxPsi5_Psi5_FrameData
  • numberOfCyclePairsForActive : IfxEray_Eray_Succ1Config
  • numberOfFramesExpected : IfxPsi5s_Psi5s_ReceiveControl
  • numberOfMessageBuffers : IfxEray_Eray_MessageRAMConfig
  • numBlocks : IfxMtu_SramItem
  • numerator : IfxAsclin_Lin_BaudrateGeneration
  • numOfPllDividerSteps : IfxScuCcu_SysPllConfig


iLLD_TC26B: Data Fields - Variables

- o -

  • object : Ifx_Shell_Protocol
  • obusyIsrProvider : IfxEray_Eray_Interrupt
  • obusyPriority : IfxEray_Eray_Interrupt
  • OE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • offset : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , Ifx_LutIndexedLinearF32_Item , Ifx_LutLinearF32_Item , IfxDsadc_Rdc_Config , IfxGpt12_IncrEnc , IfxGtm_Atom_Timer , IfxGtm_Tom_Timer , IfxStdIf_Pos_Config
  • offsetCompensation : IfxDsadc_Dsadc_FirFilterConfig
  • onError : IfxStdIf_DPipe_ , SpiIf_funcs
  • oneShotModeEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • onEventA : IfxStdIf_Pos_
  • onExchangeEnd : SpiIf_Ch_
  • onReceive : IfxStdIf_DPipe_
  • onRx : SpiIf_funcs
  • onStart : Ifx_Shell_Protocol
  • onStartData : Ifx_Shell_Protocol
  • onTransfer : IfxQspi_SpiSlave , SpiIf_Flags
  • onTransmit : IfxStdIf_DPipe_
  • onTx : SpiIf_funcs
  • onZeroIrq : IfxStdIf_Pos_
  • operation : IfxFft_Fft_JobConfig
  • operationMode : IfxDma_Dma_ChannelConfig
  • order : Ifc_Crc_Table
  • out : Ifx_LowPassPt1F32 , IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • OUTEN_CTRL : IfxGtm_Tom_TGC
  • OUTEN_STAT : IfxGtm_Tom_TGC
  • outMode : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • output : IfxFft_Fft_Count64 , IfxQspi_SpiMaster_InputOutput
  • outputClock : IfxDsadc_Rdc_ConfigHw
  • outputControlConfig : IfxMsc_Msc_Config
  • outputDmaChannel : IfxFft_Fft
  • outputDmaChannelId : IfxFft_Fft_Config
  • outputDriver : IfxStdIf_PwmHl_Config , IfxStdIf_Timer_TrigConfig
  • outputEnabled : IfxStdIf_Timer_TrigConfig
  • outputFormat : IfxFft_Fft_JobConfig
  • outputInverterEnabled : IfxPsi5_Psi5_InputOutputControl
  • outputLength : IfxFft_Fft_JobConfig
  • outputLine : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outputMode : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins , IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin , IfxStdIf_PwmHl_Config , IfxStdIf_Timer_TrigConfig , IfxVadc_Adc_EmuxPinConfig
  • outputPin : IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin
  • outputPriority : IfxFft_Fft_Config
  • outputPtr : IfxFft_Fft_Job_s , IfxFft_Fft_JobConfig
  • outputPulsePolarityHigh : IfxSent_Sent_InputOutputControl
  • outputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outputTriggerEnabled : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outSelect : IfxEth_Mdio_InOut , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut
  • outWidth : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • overflowCnt : IfxGtm_Tim_In
  • overflowInterrupt : IfxMsc_Msc_InterruptConfig
  • overflowInterruptNode : IfxMsc_Msc_InterruptConfig
  • overlfow : IfxCpu_Counter
  • overrunCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • overrunErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • oversampling : IfxAsclin_Asc_BaudRate , IfxAsclin_Lin_BitTimingControl , IfxAsclin_Spi_Baudrate
  • OWN : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits


iLLD_TC26B: Data Fields - Variables

- p -

  • packetFrameCount : IfxPsi5s_Psi5s_ReceivedBits , IfxPsi5s_Psi5s_ReceivedData , IfxPsi5s_Psi5s_Timestamp
  • padDriver : IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin , IfxI2c_Pins , IfxPort_Io_ConfigPin , IfxPort_Pin_Config , IfxVadc_Adc_EmuxPinConfig
  • parity : IfxMsc_Msc_UpstreamStatusConfig
  • parityBit : IfxAsclin_Asc_FrameControl
  • parityCheck : SpiIf_ChMode
  • parityCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • parityEnable : IfxAsclin_Lin_FrameControl
  • parityError : IfxAsclin_Asc_ErrorFlags , IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • parityErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • parityMode : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • parityType : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl
  • passiveTimeFrameCount : IfxMsc_Msc_DownstreamControlConfig
  • password : IfxScuWdt_Config
  • pattern : IfxDma_Dma_ChannelConfig
  • pause : TPwm_Functions
  • pauseOnBaudrateSpikeErrors : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • pauseRunTransition : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • payloadLength : IfxEray_Header , IfxEray_ReceivedHeader , IfxPsi5_Psi5_ReceiveControl , IfxPsi5_Psi5_TransmitControl , IfxPsi5s_Psi5s_ReceiveControl , IfxPsi5s_Psi5s_TransmitControl
  • payloadPreambleIndicator : IfxEray_ReceivedHeader
  • PCE : IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits
  • pDivider : IfxScuCcu_InitialStepConfig
  • pending : IfxAsclin_Spi_Job
  • period : IfxCcu6_Icu_Config , IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base , TPwm_Config , TPwm_s
  • periodicOrExternal : IfxPsi5s_Psi5s_PulseGeneration
  • periodicOrExternalOrBypass : IfxPsi5_Psi5_PulseGeneration
  • periodPerRotation : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxDsadc_Rdc_Config , IfxStdIf_Pos_Config
  • periodTick : IfxGtm_Tim_In
  • phase : Spi_ErrorChecks
  • phaseDelay : PwmHl_Config
  • phyInit : IfxEth_Config
  • phyInterfaceMode : IfxEth_Config
  • phyLink : IfxEth_Config
  • pid : IfxAsclin_Lin_PduType
  • pin : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxCif_Clk_In , IfxCif_D_In , IfxCif_Hsnc_In , IfxCif_Vsnc_In , IfxDsadc_Cgpwm_Out , IfxDsadc_Cin_In , IfxDsadc_Cout_Out , IfxDsadc_Din_In , IfxDsadc_Dsn_In , IfxDsadc_Dsp_In , IfxDsadc_Itr_In , IfxDsadc_Sg_In , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEth_Col_In , IfxEth_Crs_In , IfxEth_Crsdv_In , IfxEth_Mdc_Out , IfxEth_Mdio_InOut , IfxEth_Refclk_In , IfxEth_Rxclk_In , IfxEth_Rxd_In , IfxEth_Rxdv_In , IfxEth_Rxer_In , IfxEth_Txclk_In , IfxEth_Txd_Out , IfxEth_Txen_Out , IfxEth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_ToutMap , IfxGtm_Clk_Out , IfxGtm_Tim_TinMap , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_ToutMap , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Msc_en , IfxMsc_Msc_fcln , IfxMsc_Msc_fclp , IfxMsc_Msc_inj0 , IfxMsc_Msc_inj1 , IfxMsc_Msc_sdi , IfxMsc_Msc_son , IfxMsc_Msc_sop , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxMultican_Rxd_In , IfxMultican_Txd_Out , IfxPort_Io_ConfigPin , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxQspi_SpiMaster_Input , IfxQspi_SpiMaster_Output , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Hwcfg_In , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out , IfxVadc_Emux_Out , IfxVadc_GxBfl_Out , IfxVadc_Vadcg_In
  • pinA : IfxGpt12_IncrEnc_Config
  • pinB : IfxGpt12_IncrEnc_Config
  • pinDriver : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins , IfxDsadc_Dsadc_CarrierGenConfig , IfxDsadc_Dsadc_ChannelPins , IfxEray_Eray_NodeA , IfxEray_Eray_NodeB , IfxGpt12_IncrEnc_Config , IfxMsc_Msc_Io , IfxMultican_Can_NodeConfig , IfxPsi5_Psi5_PinsConfig , IfxPsi5s_Psi5s_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins , IfxSent_Sent_Pins
  • pinIndex : IfxPort_Pin , IfxPort_Pin_Config
  • pinMode : IfxDsadc_Dsadc_CarrierGenConfig , IfxGpt12_IncrEnc_Config
  • pinNeg : IfxDsadc_Dsadc_CarrierGenConfig
  • pinPos : IfxDsadc_Dsadc_CarrierGenConfig
  • pins : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config , IfxEray_Eray_NodeConfig , IfxI2c_I2c_Config , IfxPsi5s_Psi5s_Config , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config , IfxSent_Sent_ChannelConfig , IfxVadc_Adc_EmuxPinConfig
  • pinsConfig : IfxPsi5_Psi5_ChannelConfig
  • pinTable : IfxPort_Io_Config
  • pinZ : IfxGpt12_IncrEnc_Config
  • pllDividerStep : IfxScuCcu_SysPllConfig
  • pllInitialStep : IfxScuCcu_ErayPllConfig , IfxScuCcu_SysPllConfig
  • polynom : Ifc_Crc_Table
  • port : IfxPort_Esr_Masks , IfxPort_Pin , IfxPort_Pin_Config
  • positionConst : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • positiveInput : IfxDsadc_Dsadc_ModulatorConfig
  • pre : IfxQspi_DelayConst
  • preDivider : IfxHssl_Hssl_Config
  • prescaler : IfxAsclin_Asc_BaudRate , IfxAsclin_Lin_BitTimingControl , IfxAsclin_Spi_Baudrate
  • prescalerFactor : IfxIom_Driver_LamFilterConfig
  • priority : Ifx_IsrSetting , IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxMultican_Can_InterruptConfig , IfxMultican_Can_MsgObjConfig , IfxSent_Sent_Interrupt
  • protocol : Ifx_Shell , Ifx_Shell_Config , IfxQspi_SpiSlave_Config
  • provider : Ifx_IsrSetting
  • prtc1Control : IfxEray_Eray_ControllerConfig
  • prtc2Control : IfxEray_Eray_ControllerConfig
  • pRxDescr : IfxEth
  • psi5 : IfxPsi5_Psi5 , IfxPsi5_Psi5_Config
  • psi5s : IfxPsi5s_Psi5s
  • pTxDescr : IfxEth
  • pulseDelayLength : IfxSent_Sent_TransmitControl
  • pulseGeneration : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • pulseLength : IfxPsi5_Psi5_PulseGeneration , IfxSent_Sent_TransmitControl
  • pulseLengthTick : IfxGtm_Tim_In
  • pulseTimestampSelect : IfxPsi5_Psi5_ReceiveControl
  • pwm : IfxDsadc_Rdc_Ts
  • pwmTim : IfxDsadc_Rdc_GtmTimestamp
  • pwmTimCh : IfxDsadc_Rdc_Hw


iLLD_TC26B: Data Fields - Variables

- q -

  • q : IfxCif_Cam_JpegTable
  • qspi : IfxQspi_SpiMaster , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config
  • queueRequest : IfxVadc_Adc_GroupConfig


iLLD_TC26B: Data Fields - Variables

- r -

  • rawPosition : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • RBS1 : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • RBS2 : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • RCH : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • rdc : IfxDsadc_Rdc_Ts
  • rdcTim : IfxDsadc_Rdc_GtmTimestamp
  • rdcTimCh : IfxDsadc_Rdc_Hw
  • rdcTimChannel : IfxDsadc_Rdc_GtmTimestamp
  • rdcTimMuxValue : IfxDsadc_Rdc_GtmTimestamp
  • RDES0 : IfxEth_RxDescr
  • RDES1 : IfxEth_RxDescr
  • RDES2 : IfxEth_RxDescr
  • RDES3 : IfxEth_RxDescr
  • rdm : IfxPsi5_Psi5_Frame
  • rdr : IfxPsi5s_Psi5s_ReceiveData
  • rds : IfxPsi5_Psi5_SerialMessage , IfxPsi5s_Psi5s_ReceiveStatus
  • RE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • read : IfxStdIf_DPipe_
  • readData : IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_ReceivedData
  • readDataCrc : IfxDma_Dma_ChannelConfig
  • readerWaitx : Ifx_Fifo_Shared
  • real : cfloat32 , cfract , csfract , csint16 , csint32
  • receive : Spi_ErrorChecks
  • receiveBufferErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • receiveBufferOverflowFlag : IfxPsi5s_Psi5s_ReceivedBits
  • receiveBufferOverflowInterrupt : IfxSent_Sent_Enable
  • receiveBufferOverflowInterruptNode : IfxSent_Sent_InterruptNodeControl
  • receiveChannel : IfxEray_Eray_MessageRAMConfig
  • receiveControl : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig , IfxSent_Sent_ChannelConfig
  • receiveDataInterrupt : IfxMsc_Msc_InterruptConfig , IfxSent_Sent_Enable
  • receiveDataInterruptNode : IfxMsc_Msc_InterruptConfig , IfxSent_Sent_InterruptNodeControl
  • receiveDataRegisterTimestamp : IfxPsi5_Psi5_ReceiveControl
  • receivedBits : IfxPsi5s_Psi5s_ReceiveStatus
  • receivedData : IfxPsi5s_Psi5s_ReceiveData
  • receiveIdEnable : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • receiveMemoryOverflowError : IfxPsi5_Psi5_FrameData
  • receiveMode : IfxPsi5s_Psi5s_AscConfig
  • receiveRequested : IfxEray_Eray_ReceiveControl
  • receiverOddParityEnabled : IfxPsi5s_Psi5s_AscConfig
  • receiveSuccessInterrupt : IfxSent_Sent_Enable
  • receiveSuccessInterruptNode : IfxSent_Sent_InterruptNodeControl
  • receiveWakeupIdleTime : IfxEray_Eray_Prtc2Control
  • receiveWakeupLowTime : IfxEray_Eray_Prtc2Control
  • receiveWakeupTestDuration : IfxEray_Eray_Prtc1Control
  • rectifier : IfxDsadc_Dsadc_ChannelConfig
  • ref : IfxIom_Driver_LamConfig
  • refClk : IfxEth_RmiiPins
  • reference : IfxVadc_Adc_ChannelConfig
  • refin : Ifc_Crc_Table
  • refIndex : IfxIom_Driver_Lam
  • refInput : IfxIom_Driver_Lam
  • refout : Ifc_Crc
  • regAddr : Ifx_InternalMux_MuxConfig
  • rejectedFrameId : IfxEray_Eray_MessageRAMConfig
  • reload : IfxScuWdt_Config
  • remaining : SpiIf_Job
  • requestMode : IfxDma_Dma_ChannelConfig
  • requestSlotBackgroundScanEnabled : IfxVadc_Adc_ArbiterConfig
  • requestSlotPrio : IfxVadc_Adc_BackgroundScanConfig , IfxVadc_Adc_QueueConfig , IfxVadc_Adc_ScanConfig
  • requestSlotQueueEnabled : IfxVadc_Adc_ArbiterConfig
  • requestSlotScanEnabled : IfxVadc_Adc_ArbiterConfig
  • requestSlotStartMode : IfxVadc_Adc_BackgroundScanConfig , IfxVadc_Adc_QueueConfig , IfxVadc_Adc_ScanConfig
  • requestSource : IfxDma_Dma_ChannelConfig
  • RER : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • reserved : Spi_ErrorChecks
  • reset : IfxStdIf_Pos_
  • resetFaults : IfxStdIf_Pos_
  • resetSendCount : IfxStdIf_DPipe_
  • resolution : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxDsadc_Rdc_Config , IfxGpt12_IncrEnc , IfxStdIf_Pos_Config , IfxVadc_Adc_ClassConfig
  • resolutionFactor : IfxStdIf_Pos_Config
  • resource : Ifx_GlobalResources_Item
  • responseTimeout : IfxAsclin_Lin_DataControl , IfxAsclin_Lin_ErrorFlags
  • responseTimeoutMode : IfxAsclin_Lin_DataControl
  • result : IfxFft_Fft_Count64
  • resultPriority : IfxVadc_Adc_ChannelConfig
  • resultreg : IfxVadc_Adc_Channel
  • resultRegister : IfxVadc_Adc_ChannelConfig
  • resultServProvider : IfxVadc_Adc_ChannelConfig
  • resultSrcNr : IfxVadc_Adc_ChannelConfig
  • resume : TPwm_Functions
  • resv : IfxEth_AltRxDescr1_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr1_Bits , IfxEth_TxDescr0_Bits
  • resv1 : IfxEth_AltRxDescr1_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_AltTxDescr1_Bits
  • resv2 : IfxEth_AltTxDescr1_Bits , IfxEth_RxDescr1_Bits
  • reversed : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxDsadc_Rdc_Config , IfxStdIf_Pos_Config
  • rightAlignedStorage : IfxVadc_Adc_ChannelConfig
  • ringModeBuffersConfig : IfxEth_Config
  • risingEdgeAtPeriod : IfxStdIf_Timer_TrigConfig
  • risingEdgeFilterTime : IfxGtm_Tim_In_ConfigFilter , IfxIom_Driver_LamFilterConfig
  • risingEdgeMode : IfxGtm_Tim_In_ConfigFilter
  • rmiiPins : IfxEth_Config
  • rts : IfxAsclin_Asc_Pins
  • rtsMode : IfxAsclin_Asc_Pins
  • run : IfxIom_Driver_LamEventWindowConfig , IfxStdIf_Timer_
  • RWT : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • rx : IfxAsclin_Asc , IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins , SpiIf_Ch_
  • rxBuffer : IfxAsclin_Asc_Config
  • rxBuffer1Size : IfxEth_RingModeRxBuffersConfig
  • rxBuffer1StartAddress : IfxEth_RingModeRxBuffersConfig
  • rxBuffer2Size : IfxEth_RingModeRxBuffersConfig
  • rxBuffer2StartAddress : IfxEth_RingModeRxBuffersConfig
  • rxBufferSize : IfxAsclin_Asc_Config
  • rxBufferUsed : IfxEth , IfxEth_RingModeRxBuffersConfig
  • rxClk : IfxEth_MiiPins
  • rxConfig : IfxEth_RingModeBuffersConfig
  • rxCount : IfxEth , SpiIf_
  • rxd0 : IfxEth_MiiPins , IfxEth_RmiiPins
  • rxd1 : IfxEth_MiiPins , IfxEth_RmiiPins
  • rxd2 : IfxEth_MiiPins
  • rxd3 : IfxEth_MiiPins
  • rxDescr : IfxEth , IfxEth_Config
  • rxDiff : IfxEth
  • rxDmaChannel : IfxQspi_SpiMaster_Dma , IfxQspi_SpiSlave_Dma
  • rxDmaChannelId : IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • rxDv : IfxEth_MiiPins
  • rxEr : IfxEth_MiiPins
  • rxFifoInterruptLevel : IfxAsclin_Asc_FifoControl , IfxAsclin_Spi_FifoControl
  • rxFifoMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • rxFifoOverflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • rxFifoOverflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • rxFifoThreshold : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • rxFifoUnderflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • rxFifoUnderflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • rxHandler : SpiIf_Ch_
  • rxHeaderEnd : IfxAsclin_Lin_AcknowledgementFlags
  • rxHeaderErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • rxHeaderInProgress : IfxAsclin_Lin_FrameControlFlags
  • rxIn : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • rxInMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • rxInterrupt : IfxMultican_Can_MsgObjConfig
  • rxJob : IfxAsclin_Spi , IfxQspi_SpiSlave
  • rxMode : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins
  • rxPin : IfxMultican_Can_NodeConfig
  • rxPinMode : IfxMultican_Can_NodeConfig
  • rxPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • rxReceivedHeader : IfxAsclin_Lin_EnabledInterrupts
  • rxReceivedResponse : IfxAsclin_Lin_EnabledInterrupts
  • rxResponseData : IfxAsclin_Lin_FrameDataControl
  • rxResponseEnd : IfxAsclin_Lin_AcknowledgementFlags
  • rxResponseErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • rxResponseInProgress : IfxAsclin_Lin_FrameControlFlags
  • rxResponseLength : IfxAsclin_Lin_FrameDataControl
  • rxSwFifoOverflow : IfxAsclin_Asc


iLLD_TC26B: Data Fields - Variables

- s -

  • SAF : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • sampleClockSource : IfxDsadc_Dsadc_DemodulatorConfig
  • samplePoint : IfxMultican_Can_NodeConfig
  • samplePointPosition : IfxAsclin_Asc_BitTimingControl , IfxAsclin_Lin_BitSamplingControl
  • sampleStrobe : IfxDsadc_Dsadc_DemodulatorConfig
  • sampleTime : IfxVadc_Adc_ClassConfig
  • sampleTimeControl : IfxVadc_Adc_EmuxControl
  • samplingEdge : IfxCif_Cam_Config
  • samplingTime : Ifx_LowPassPt1F32_Config
  • scanRequest : IfxVadc_Adc_GroupConfig
  • scl : IfxI2c_Pins
  • sclk : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • sclkMode : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • sda : IfxI2c_Pins
  • sdi : IfxMsc_Msc_Io
  • sdiLinePolarity : IfxMsc_Msc_OutputControlConfig
  • seconds : Ifx_DateTime
  • segmentCount : Ifx_LutIndexedLinearF32 , Ifx_LutLinearF32
  • segments : Ifx_LutIndexedLinearF32 , Ifx_LutLinearF32
  • select : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxDsadc_Cgpwm_Out , IfxDsadc_Cin_In , IfxDsadc_Cout_Out , IfxDsadc_Din_In , IfxDsadc_Dsn_In , IfxDsadc_Dsp_In , IfxDsadc_Itr_In , IfxDsadc_Sg_In , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEth_Col_In , IfxEth_Crs_In , IfxEth_Crsdv_In , IfxEth_Mdc_Out , IfxEth_Refclk_In , IfxEth_Rxclk_In , IfxEth_Rxd_In , IfxEth_Rxdv_In , IfxEth_Rxer_In , IfxEth_Txclk_In , IfxEth_Txd_Out , IfxEth_Txen_Out , IfxEth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_ToutMap , IfxGtm_Clk_Out , IfxGtm_Tim_TinMap , IfxGtm_Tom_ToutMap , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxMultican_Rxd_In , IfxMultican_Txd_Out , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out , IfxVadc_Emux_Out , IfxVadc_GxBfl_Out
  • sendControl : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • sendCount : IfxAsclin_Asc
  • sending : IfxAsclin_Spi , SpiIf_
  • sendResultCode : Ifx_Shell_Config , Ifx_Shell_Flags
  • sensorControlDisabled : IfxDts_Dts_Config
  • sent : IfxSent_Sent
  • serialData : IfxPsi5_Psi5_Message , IfxSent_Sent_SerialMessageFrame
  • serialDataCrcErrorInterrupt : IfxSent_Sent_Enable
  • serialDataDisabledCrcDisabled : IfxSent_Sent_ReceiveControl
  • serialDataProcessingEnabled : IfxSent_Sent_ReceiveControl
  • serialDataReceiveInterrupt : IfxSent_Sent_Enable
  • serialDataReceiveInterruptNode : IfxSent_Sent_InterruptNodeControl
  • serialMessageCRCFailedError : IfxPsi5_Psi5_Message
  • serviceReqNrPeriod : IfxCcu6_TimerWithTrigger_Config
  • serviceReqNrTrigger : IfxCcu6_TimerWithTrigger_Config
  • serviceRequest : IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • serviceRequestDelay : IfxMsc_Msc_UpstreamStatusConfig
  • servReqPriority : IfxDsadc_Rdc_ConfigHw
  • servReqProvider : IfxDsadc_Rdc_ConfigHw
  • setDeadtime : IfxStdIf_PwmHl_
  • setFrequency : IfxStdIf_Timer_
  • setMinPulse : IfxStdIf_PwmHl_
  • setMode : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_
  • setOffset : IfxStdIf_Pos_
  • setOnTime : IfxStdIf_PwmHl_
  • setOnTimeAndShift : IfxStdIf_PwmHl_
  • setPeriod : IfxStdIf_Timer_
  • setPosition : IfxStdIf_Pos_
  • setPulse : IfxStdIf_PwmHl_
  • setRawPosition : IfxStdIf_Pos_
  • setRefreshPeriod : IfxStdIf_Pos_
  • setSingleMode : IfxStdIf_Timer_
  • setSpeed : IfxStdIf_Pos_
  • setTrigger : IfxStdIf_Timer_
  • setupChannels : IfxStdIf_PwmHl_
  • setupDataCount : IfxCif_Cam_Config
  • setupDataTable : IfxCif_Cam_Config
  • shadowAddress : IfxDma_Dma_ChannelConfig
  • shadowControl : IfxDma_Dma_ChannelConfig
  • shared : _Fifo
  • shift : Ifx_LutIndexedLinearF32
  • shiftClock : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • shiftDir : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • showPrompt : Ifx_Shell_Config , Ifx_Shell_Flags
  • signalLevel : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • signDelay : IfxDsadc_Dsadc_RectifierConfig
  • signPeriod : IfxDsadc_Dsadc_RectifierConfig
  • signSource : IfxDsadc_Dsadc_RectifierConfig
  • singleDataTransfer : IfxMultican_Can_MsgObjControl
  • singleShot : IfxStm_Timer_Base
  • singleTransmitTrial : IfxMultican_Can_MsgObjControl
  • sinIn : Ifx_AngleTrkF32 , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc
  • size : _Fifo , Ifx_GlobalResources , Ifx_InternalMux_Config , IfxCif_Cam_MemInfo , IfxPort_Io_Config
  • sizeFactor : IfxCif_Cam_Downscaling
  • sleepModeEnabled : IfxSent_Sent_Config
  • slotControl : IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig
  • slotCounter : IfxPsi5_Psi5_FrameData
  • slowClock : IfxPsi5_Psi5_Config
  • sls : IfxQspi_SpiMaster_ChannelConfig
  • slsi : IfxQspi_SpiSlave_Pins
  • slsiMisplacedInactivation : IfxQspi_SpiSlave_ErrorFlags
  • slsiMode : IfxQspi_SpiSlave_Pins
  • slso : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Channel_s
  • slsoActiveState : IfxQspi_SpiMaster_Channel_s
  • slsoMode : IfxAsclin_Spi_Pins
  • slsoNr : IfxQspi_Slso_Out
  • son : IfxMsc_Msc_Io
  • sop : IfxMsc_Msc_Io
  • sopPolarity : IfxMsc_Msc_OutputControlConfig
  • sorPayloadLength : IfxPsi5_Psi5_TransmitControl
  • source : IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxGtm_Trig_Trigger , IfxIom_Driver_LamEventConfig
  • sourceAddress : IfxDma_Dma_ChannelConfig
  • sourceAddressCircularRange : IfxDma_Dma_ChannelConfig
  • sourceAddressIncrementDirection : IfxDma_Dma_ChannelConfig
  • sourceAddressIncrementStep : IfxDma_Dma_ChannelConfig
  • sourceCircularBufferEnabled : IfxDma_Dma_ChannelConfig
  • sourceDestinationAddressCrc : IfxDma_Dma_ChannelConfig
  • spcMode : IfxSent_Sent_TransmitControl
  • spcModeOn : IfxSent_Sent_ChannelConfig
  • speed : IfxGpt12_IncrEnc
  • speedConstPulseCount : IfxGpt12_IncrEnc
  • speedConstTimeDiff : IfxGpt12_IncrEnc
  • speedEstA : Ifx_AngleTrkF32
  • speedEstB : Ifx_AngleTrkF32
  • speedFilerCutOffFrequency : IfxStdIf_Pos_Config
  • speedFilterEnabled : IfxStdIf_Pos_Config
  • speedLpf : Ifx_AngleTrkF32
  • speedLpfFc : Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • speedModeThreshold : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • speedModeThresholdTick : IfxGpt12_IncrEnc
  • spol : IfxAsclin_Spi_InputOutputControl
  • sqrAmplMax : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • sqrAmplMin : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • srcId : IfxMultican_Can_InterruptSource
  • srcrOutDis : IfxFft_Fft
  • srcrOutEnd : IfxFft_Fft
  • srhActivePhaseSelection : IfxMsc_Msc_DownstreamControlConfig
  • srhBitsShiftedAtDataFramesExtension : IfxMsc_Msc_DownstreamControlExtensionConfig
  • srhDataFrameLength : IfxMsc_Msc_DownstreamControlConfig
  • srlActivePhaseSelection : IfxMsc_Msc_DownstreamControlConfig
  • srlBitsShiftedAtDataFramesExtension : IfxMsc_Msc_DownstreamControlExtensionConfig
  • srlDataFrameLength : IfxMsc_Msc_DownstreamControlConfig
  • ssrPayloadLength : IfxPsi5_Psi5_TransmitControl
  • standardIo : Ifx_Console , Ifx_Shell_Config
  • start : Ifx_Shell_Protocol , IfxCif_Cam_MemInfo , IfxFlash_flashSector , IfxHssl_Hssl_AccessWindow , PwmHl_Functions , Timer_Functions , TPwm_Functions
  • startCapture : Icu_Functions
  • startChannel : IfxVadc_Adc_EmuxControl
  • started : Ifx_Shell_Protocol
  • startIndex : _Fifo
  • startOffset : IfxStdIf_Timer_Config
  • startScan : IfxDsadc_Rdc_ConfigHw
  • startSequenceGenerationControl : IfxPsi5s_Psi5s_TransmitControl
  • startSequenceGenerationEnabled : IfxPsi5_Psi5_TransmitControl
  • startSingleShotMode : Timer_Functions
  • startupCalibration : IfxVadc_Adc_Config
  • startupFrame : IfxEray_ReceivedHeader
  • startupFrameIndicator : IfxEray_Header
  • startupFrameTransmitted : IfxEray_Eray_Succ1Config
  • startValue : IfxDsadc_Dsadc_CombFilterConfig
  • staticActionPoint : IfxEray_Eray_Gtu09Config
  • staticFifoDisabled : IfxEray_Eray_MessageRAMConfig
  • staticFramepayload : IfxEray_Eray_ControllerConfig
  • staticSlotLength : IfxEray_Eray_Gtu07Config
  • staticSlotsCount : IfxEray_Eray_Gtu07Config
  • status : Ifx_AngleTrkF32_PosIf , IfxEth , IfxGpt12_IncrEnc , IfxI2c_I2c , IfxPsi5s_Psi5s_Frame , IfxStdIf_Pos_Status
  • statusNibble : IfxSent_Sent_Frame
  • statusNibbleEnabled : IfxSent_Sent_ReceiveControl
  • step : IfxMsc_Msc_Clock
  • stm : IfxStm_Timer , IfxStm_Timer_Config
  • stop : IfxStdIf_Timer_ , PwmHl_Functions , Timer_Functions , TPwm_Functions
  • stopBit : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • stopBits : IfxPsi5s_Psi5s_AscConfig
  • stopCapture : Icu_Functions
  • streamingMode : IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • streamingModeOn : IfxHssl_Hssl_Channel
  • strobePosition : IfxEray_Eray_Prtc1Control
  • succ1Config : IfxEray_Eray_ControllerConfig
  • succ2Config : IfxEray_Eray_ControllerConfig
  • succ3Config : IfxEray_Eray_ControllerConfig
  • supplyVoltage : IfxVadc_Adc_Config
  • suspendTriggered : IfxSent_Sent_ReceiveControl
  • swapRequested : IfxEray_Eray_ReceiveControl
  • switchingSelect : IfxCcu6_PwmBc_MultiChannelControl
  • switchingSync : IfxCcu6_PwmBc_MultiChannelControl
  • syncFrame : IfxEray_ReceivedHeader
  • syncFrameIndicator : IfxEray_Header
  • syncFrameTransmitted : IfxEray_Eray_Succ1Config
  • synchJumpWidth : IfxMultican_Can_NodeConfig
  • synchonize : IfxVadc_Adc_ChannelConfig
  • synchronousOperation : IfxCcu6_Timer_Config
  • synchronousStart : Timer_Functions
  • synchronousStop : Timer_Functions
  • synchronousUpdateEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • syntax : Ifx_Shell_Syntax
  • sysPll : IfxScuCcu_Config
  • systemCall : IfxCpu_Trap_Id
  • systemEventTriggerThreshold : IfxIom_Driver_Lam , IfxIom_Driver_LamConfig


iLLD_TC26B: Data Fields - Variables

- t -

  • t12countingInputMode : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtClockEnabled : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtClockInput : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtInputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t12ExtInputTriggerMode : IfxCcu6_PwmBc_TriggerConfig
  • t12Frequency : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t12hr : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • t12Period : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t12SyncDirection : IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer13
  • t12SyncEvent : IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer13
  • t13countingInputMode : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtClockEnabled : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtClockInput : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtInputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t13ExtInputTriggerMode : IfxCcu6_PwmBc_TriggerConfig
  • t13Frequency : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t13hr : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • t13InSyncWithT12 : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t13Period : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t1xhrInputMode : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • table : Ifc_Crc , Ifx_GlobalResources
  • tAddr : IfxCpu_Trap
  • target : IfxMsc_En_Out , IfxMsc_Msc_Config
  • TBS1 : IfxEth_AltTxDescr1_Bits , IfxEth_TxDescr1_Bits
  • TBS2 : IfxEth_AltTxDescr1_Bits , IfxEth_TxDescr1_Bits
  • TCH : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • tClass : IfxCpu_Trap
  • tCpu : IfxCpu_Trap
  • TDES0 : IfxEth_TxDescr
  • TDES1 : IfxEth_TxDescr
  • TDES2 : IfxEth_TxDescr
  • TDES3 : IfxEth_TxDescr
  • TER : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • tgc : IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer
  • tgcGlobalControlApplyUpdate : IfxGtm_Tom_Timer
  • tgcGlobalControlDisableUpdate : IfxGtm_Tom_Timer
  • threshold : IfxIom_Driver_LamEventWindowConfig
  • thumbData : IfxCif_Cam_JfifHeader
  • thumbX : IfxCif_Cam_JfifHeader
  • thumbY : IfxCif_Cam_JfifHeader
  • ticks : IfxStm_CompareConfig
  • tId : IfxCpu_Trap
  • tim : IfxGtm_Tim_TinMap
  • timeBase : IfxSent_Sent_TransmitControl
  • timeBaseSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5_Psi5_TimeStampConfig , IfxPsi5s_Psi5s_PulseGeneration , IfxPsi5s_Psi5s_TimeStampConfig
  • timeFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • timeFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • timeout : IfxGtm_Tim_In_Config , IfxGtm_Tim_In_ConfigTimeout
  • timeoutError : IfxHssl_Hssl_errorFlags
  • timer : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmHl_Config , IfxCcu6_PwmHl_s , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxStdIf_PwmHl_
  • timer12 : IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • timer13 : IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • timerChannel : IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config
  • timerInterrupt : IfxMultican_Can_NodeConfig
  • timeslotError : IfxPsi5_Psi5_FrameData
  • timestamp : Ifx_DataBufferMode_TimeStampSingle , IfxDsadc_Rdc , IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_Frame
  • timeStamp : IfxPsi5s_Psi5s_ReceiveTimestamp
  • timestamp : IfxPsi5s_Psi5s_Timestamp
  • timeStamp : IfxSent_Sent_Frame
  • timestampClock : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterA : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterB : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterC : IfxPsi5_Psi5_Config
  • timestampEnabled : IfxDma_Dma_ChannelConfig , IfxPsi5s_Psi5s_ReceiveControl
  • timeStampPreDivider : IfxSent_Sent_Config
  • timestampSelect : IfxPsi5s_Psi5s_ReceiveControl
  • timestampTrigger : IfxDsadc_Dsadc_DemodulatorConfig
  • timestampTriggerSelect : IfxPsi5s_Psi5s_ReceiveControl
  • timIndex : IfxGtm_Tim_In , IfxGtm_Tim_In_Config
  • tint0IsrProvider : IfxEray_Eray_Interrupt
  • tint0Priority : IfxEray_Eray_Interrupt
  • tint1IsrProvider : IfxEray_Eray_Interrupt
  • tint1Priority : IfxEray_Eray_Interrupt
  • tom : IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config , IfxGtm_Tom_ToutMap
  • tomChannel : IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver
  • tomIndex : IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_Timer
  • topMsgObjId : IfxMultican_Can_MsgObjControl
  • totalMemSize : IfxCif_Cam
  • toutn : IfxGtm_Atom_ToutMap , IfxGtm_Tom_ToutMap
  • toutSel : IfxGtm_Atom_ToutMap , IfxGtm_Tom_ToutMap
  • transactionRequestLostInterruptEnabled : IfxDma_Dma_ChannelConfig
  • transactionTagError : IfxHssl_Hssl_errorFlags
  • transferBufferUnderflowInterrupt : IfxSent_Sent_Enable
  • transferBufferUnderflowInterruptNode : IfxSent_Sent_InterruptNodeControl
  • transferCount : IfxDma_Dma_ChannelConfig
  • transferDataInterrupt : IfxSent_Sent_Enable
  • transferDataInterruptNode : IfxSent_Sent_InterruptNodeControl
  • transferInProgress : IfxAsclin_Spi
  • transferInterrupt : IfxMultican_Can_NodeConfig
  • transferRequested : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • transmissionMode : IfxEray_Header , IfxMsc_Msc_DownstreamControlConfig
  • transmissionSlotMode : IfxEray_Eray_Succ1Config
  • transmissionStartTime : IfxEray_Eray_Prtc1Control
  • transmit : Spi_ErrorChecks
  • transmitControl : IfxSent_Sent_ChannelConfig
  • transmitErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • transmitMode : IfxPsi5s_Psi5s_AscConfig
  • transmitPayloadIndicatior : IfxEray_Header
  • transmitterOddParityEnabled : IfxPsi5s_Psi5s_AscConfig
  • transmitWakeupIdleTime : IfxEray_Eray_Prtc2Control
  • transmitWakeupLowTime : IfxEray_Eray_Prtc2Control
  • transmitWakeupRepetitions : IfxEray_Eray_Prtc1Control
  • trigger : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGtm_Trig_AdcTrig_Table , IfxIom_Driver_LamEventConfig , IfxStdIf_Timer_Config
  • triggerChannel : IfxGtm_Atom_Timer , IfxGtm_Tom_Timer
  • triggerConfig : IfxVadc_Adc_BackgroundScanConfig , IfxVadc_Adc_QueueConfig , IfxVadc_Adc_ScanConfig
  • triggerEnabled : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base
  • triggerInput : IfxDsadc_Dsadc_DemodulatorConfig
  • triggerMode : IfxVadc_Adc_GatingTriggerConfig
  • triggerMonitorCleared : IfxSent_Sent_InputOutputControl
  • triggerOut : IfxCcu6_TimerWithTrigger_Config , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • triggerPoint : IfxStdIf_Timer_TrigConfig
  • triggerPriority : IfxStm_CompareConfig
  • triggerSource : IfxSent_Sent_TransmitControl , IfxVadc_Adc_GatingTriggerConfig
  • Ts : Ifx_AngleTrkF32_PosIf
  • tsm : IfxPsi5s_Psi5s_ReceiveTimestamp
  • TTSE : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • TTSS : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • tUnit : IfxSent_Sent_ChannelConfig
  • turn : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • tx : IfxAsclin_Asc , IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins , SpiIf_Ch_
  • txBuffer : IfxAsclin_Asc_Config
  • txBuffer1Size : IfxEth_RingModeTxBuffersConfig
  • txBuffer1StartAddress : IfxEth_RingModeTxBuffersConfig
  • txBuffer2Size : IfxEth_RingModeTxBuffersConfig
  • txBuffer2StartAddress : IfxEth_RingModeTxBuffersConfig
  • txBufferSize : IfxAsclin_Asc_Config
  • txBufferUsed : IfxEth , IfxEth_RingModeTxBuffersConfig
  • txClk : IfxEth_MiiPins
  • txCompleted : IfxAsclin_Lin_AcknowledgementFlags
  • txConfig : IfxEth_RingModeBuffersConfig
  • txCount : IfxEth , SpiIf_
  • txd0 : IfxEth_MiiPins , IfxEth_RmiiPins
  • txd1 : IfxEth_MiiPins , IfxEth_RmiiPins
  • txd2 : IfxEth_MiiPins
  • txd3 : IfxEth_MiiPins
  • txDescr : IfxEth , IfxEth_Config
  • txDiff : IfxEth
  • txDisabled : IfxStdIf_DPipe_
  • txDmaChannel : IfxQspi_SpiMaster_Dma , IfxQspi_SpiSlave_Dma
  • txDmaChannelId : IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • txEn : IfxEth_MiiPins , IfxEth_RmiiPins
  • txEnOut : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txEnOutMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txEr : IfxEth_MiiPins
  • txFifoInterruptLevel : IfxAsclin_Asc_FifoControl , IfxAsclin_Spi_FifoControl
  • txFifoMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • txFifoOverflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • txFifoOverflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • txFifoThreshold : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • txFifoUnderflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • txHandler : SpiIf_Ch_
  • txHeaderEnd : IfxAsclin_Lin_AcknowledgementFlags
  • txHeaderErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • txHeaderInProgress : IfxAsclin_Lin_FrameControlFlags
  • txInProgress : IfxAsclin_Asc
  • txInterrupt : IfxMultican_Can_MsgObjConfig
  • txJob : IfxAsclin_Spi , IfxQspi_SpiSlave
  • txMode : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins
  • txOut : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txOutMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txPin : IfxMultican_Can_NodeConfig
  • txPinMode : IfxMultican_Can_NodeConfig
  • txPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • txResponseEnd : IfxAsclin_Lin_AcknowledgementFlags
  • txResponseErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • txResponseInProgress : IfxAsclin_Lin_FrameControlFlags
  • txResponseLength : IfxAsclin_Lin_FrameDataControl
  • txSendHeaderOnly : IfxAsclin_Lin_FrameControlFlags
  • txSendResponse : IfxAsclin_Lin_FrameControlFlags
  • txTimestamp : IfxAsclin_Asc
  • txTransmittedHeader : IfxAsclin_Lin_EnabledInterrupts
  • txTransmittedResponse : IfxAsclin_Lin_EnabledInterrupts
  • type : IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock
  • typeOfService : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxFft_Fft_Config , IfxMultican_Can_InterruptConfig , IfxStm_CompareConfig


iLLD_TC26B: Data Fields - Variables

- u -

  • U : IfxEth_RxDescr0 , IfxEth_RxDescr1 , IfxEth_RxDescr2 , IfxEth_RxDescr3 , IfxEth_RxDescrList , IfxEth_TxDescr0 , IfxEth_TxDescr1 , IfxEth_TxDescr2 , IfxEth_TxDescr3 , IfxEth_TxDescrList , IfxMultican_MsgObjStat
  • uartFrameCount : IfxPsi5s_Psi5s_ReceiveControl
  • UF : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • uk : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • underflowInterrupt : IfxMsc_Msc_InterruptConfig
  • underflowInterruptNode : IfxMsc_Msc_InterruptConfig
  • unexpectedError : IfxHssl_Hssl_errorFlags
  • unknown : IfxCif_Cam_JfifHeader
  • update : IfxCcu6_PwmHl_Mode , IfxCcu6_PwmHl_s , IfxGpt12_IncrEnc , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s , IfxStdIf_Pos_
  • updateAndShift : IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s
  • updateInputFrequency : IfxStdIf_Timer_
  • updatePeriod : IfxDsadc_Rdc , IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • updatePulse : IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s
  • upperBoundary : IfxVadc_Adc_ChannelConfig
  • upperLimit : IfxAsclin_Lin_BaudrateDetection
  • upperTemperatureLimit : IfxDts_Dts_Config
  • upstreamChannelFrameType : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamChannelReceivingRate : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamConfig : IfxMsc_Msc_Config
  • upstreamTimeoutInterrupt : IfxMsc_Msc_InterruptConfig
  • upstreamTimeoutInterruptNode : IfxMsc_Msc_InterruptConfig
  • upstreamTimeoutPrescaler : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamTimeoutValue : IfxMsc_Msc_UpstreamStatusConfig
  • useDma : IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • userTs : IfxDsadc_Rdc_Config
  • useWindowFunction : IfxFft_Fft_JobConfig
  • uv : IfxCif_Cam_JpegTables


iLLD_TC26B: Data Fields - Variables

- v -

  • vadc : IfxVadc_Adc , IfxVadc_Adc_Config , IfxVadc_Adc_EmuxControl
  • value : Ifx_InternalMux_MuxConfig , IfxPsi5_Psi5_Rds , IfxScuCcu_CcuconRegConfig , IfxScuCcu_FlashWaitstateConfig
  • verbose : IfxPsi5_Psi5_ReceiveControl
  • verboseForAsynchronousMode : IfxPsi5_Psi5_ReceiveControl
  • version : IfxCif_Cam_JfifHeader
  • vFactor : IfxCif_Cam_Downscaling
  • VLAN : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits
  • vMode : IfxCif_Cam_Downscaling
  • vOffset : IfxCif_Cam_MemConfig , IfxCif_Cam_PictureInfo
  • vSize : IfxCif_Cam_MemConfig , IfxCif_Cam_PictureInfo
  • vSyncPolarity : IfxCif_Cam_Config


iLLD_TC26B: Data Fields - Variables

- w -

  • waitingTime : Timer_Config , TPwm_Config
  • waitTime : IfxScuCcu_InitialStepConfig , IfxScuCcu_PllStepsConfig
  • wakeupPatternChannel : IfxEray_Eray_Succ1Config
  • watchdogEnabled : IfxCif_Cam_Common
  • watchdogErrorInterrupt : IfxSent_Sent_Enable
  • watchdogErrorInterruptNode : IfxSent_Sent_InterruptNodeControl
  • watchdogTimeoutErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • watchdogTimerLimit : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • watchDogTimerLimit : IfxSent_Sent_ChannelConfig
  • watchdogTimerModeSelect : IfxPsi5s_Psi5s_ReceiveControl
  • windowSize : IfxDsadc_Dsadc_IntegratorConfig
  • wrapDestinationInterruptEnabled : IfxDma_Dma_ChannelConfig
  • wrapSourceInterruptEnabled : IfxDma_Dma_ChannelConfig
  • write : IfxStdIf_DPipe_
  • writerWaitx : Ifx_Fifo_Shared
  • wrongStatusNibbleErrorInterrupt : IfxSent_Sent_Enable


iLLD_TC26B: Data Fields - Variables

- x -

  • xcrc : IfxPsi5s_Psi5s_ReceivedBits
  • xcrcError : IfxPsi5s_Psi5s_ReceivedBits
  • xcrcErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • xtalFrequency : IfxScuCcu_Config
  • xxxCH1 : IfxGtm_Tom_TGC


iLLD_TC26B: Data Fields - Variables

- y -

  • y : IfxCif_Cam_JpegTables , IfxCif_Cam_MemAreas


iLLD_TC26B: Data Fields - Variables

- z -

  • zeroIsrPriority : IfxGpt12_IncrEnc_Config
  • zeroIsrProvider : IfxGpt12_IncrEnc_Config


iLLD_TC26B: File List

File List
Here is a list of all files with brief descriptions:
Assert.c | Assert functions
Assert.h | Assert functions
Bsp.c | Board support package
Bsp.h | Board support package
CompilerDcc.c |
CompilerDcc.h |
CompilerGhs.c |
CompilerGhs.h |
CompilerGnuc.c |
CompilerGnuc.h |
Compilers.h |
CompilerTasking.c |
CompilerTasking.h |
Icu.h | ICU interface
Ifx_AngleTrkF32.c | Angle-tracking observer for sin/cos analog position sensor
Ifx_AngleTrkF32.h | Angle-tracking observer for sin/cos analog position sensor
Ifx_Assert.h | Assert functions
Ifx_Cf32.c | Floating point signal, vector, and matrix library
Ifx_Cf32.h | Floating point signal, vector, and matrix library
Ifx_CircularBuffer.asm.c | Circular buffer functions (assembler implementation)
Ifx_CircularBuffer.c | Circular buffer functions in C language
Ifx_CircularBuffer.h | Circular buffer functions
Ifx_Console.c | Main Ifx_Console module implementation file
Ifx_Console.h | Main Console module header file
Ifx_Crc.c | CRC algorithm
Ifx_Crc.h | CRC algorithm
Ifx_DateTime.c | Date and time functions
Ifx_DateTime.h | Date and time functions
Ifx_FftF32.c | Floating-point Fast Fourier Transform
Ifx_FftF32.h | Floating-point Fast Fourier Transform
Ifx_FftF32_BitReverseTable.c | Bit-reversal lookup for Floating-point Fast Fourier Transform
Ifx_FftF32_TwiddleTable.c | Floating-point Fast Fourier Transform Twiddle-Factors
Ifx_Fifo.c | FIFO functions
Ifx_Fifo.h | FIFO buffer functions
Ifx_GlobalResources.c |
Ifx_GlobalResources.h | Handling of global resources
Ifx_IntegralF32.c | Discrete integral approximation
Ifx_IntegralF32.h | Discrete integral approximation
Ifx_InternalMux.c | Mux configuration functions
Ifx_InternalMux.h | Mux configuration functions
Ifx_LowPassPt1F32.c | Low pass filter PT1
Ifx_LowPassPt1F32.h | Low pass filter PT1
Ifx_Lut.h | Lookup defintion with fixed-point angle data type
Ifx_LutAtan2F32.c | ATAN2 lookup functions with fixed-point angle data type
Ifx_LutAtan2F32.h | Floating point signal, vector, and matrix library
Ifx_LutAtan2F32_Table.c | Table data for ATAN2 lookup functions
Ifx_LutIndexedLinearF32.h | Look-up functionality
Ifx_LutLinearF32.c | Linear look-up function
Ifx_LutLinearF32.h | Look-up functionality
Ifx_LutLSincosF32.c | Table data for linear interpolation Sin/Cos lookup functions
Ifx_LutLSincosF32.h | Sin/Cos linear approximated lookup functions with fixed-point angle data type
Ifx_LutSincosF32.c | Sin/Cos lookup functions with fixed-point angle data type
Ifx_LutSincosF32.h | Sin/Cos lookup functions with fixed-point angle data type
Ifx_LutSincosF32_Table.c | Table data for Sin/Cos lookup functions
Ifx_RampF32.c | Ramp function
Ifx_RampF32.h | Ramp function
Ifx_Shell.c | Shell functions
Ifx_Shell.h | Shell functions
Ifx_Types.h | This files defines all types used by the IFX HAL and libraries
Ifx_TypesDcc.h |
Ifx_TypesGhs.h |
Ifx_TypesGnuc.h |
Ifx_TypesTasking.h |
Ifx_WndF32.h | Windowing function
Ifx_WndF32_BlackmanHarrisTable.c | Lookup table for Blackman-Harris window function
Ifx_WndF32_HannTable.c | Lookup table for Hann window function
IfxAsclin.c | ASCLIN basic functionality
IfxAsclin.h | ASCLIN basic functionality
IfxAsclin_Asc.c | ASCLIN ASC details
IfxAsclin_Asc.h | ASCLIN ASC details
IfxAsclin_cfg.c | ASCLIN on-chip implementation data
IfxAsclin_cfg.h | ASCLIN on-chip implementation data
IfxAsclin_Lin.c | ASCLIN LIN details
IfxAsclin_Lin.h | ASCLIN LIN details
IfxAsclin_PinMap.c | ASCLIN I/O map
IfxAsclin_PinMap.h | ASCLIN I/O map
IfxAsclin_Spi.c | ASCLIN SPI details
IfxAsclin_Spi.h | ASCLIN SPI details
IfxCcu6.c | CCU6 basic functionality
IfxCcu6.h | CCU6 basic functionality
IfxCcu6_cfg.c | CCU6 on-chip implementation data
IfxCcu6_cfg.h | CCU6 on-chip implementation data
IfxCcu6_Icu.c | CCU6 ICU details
IfxCcu6_Icu.h | CCU6 ICU details
IfxCcu6_PinMap.c | CCU6 I/O map
IfxCcu6_PinMap.h | CCU6 I/O map
IfxCcu6_PwmBc.c | CCU6 PWMBC details
IfxCcu6_PwmBc.h | CCU6 PWMBC details
IfxCcu6_PwmHl.c | CCU6 PWMHL details
IfxCcu6_PwmHl.h | CCU6 PWMHL details
IfxCcu6_Timer.c | CCU6 TIMER details
IfxCcu6_Timer.h | CCU6 TIMER details
IfxCcu6_TimerWithTrigger.c | CCU6 TIMERWITHTRIGGER details
IfxCcu6_TimerWithTrigger.h | CCU6 TIMERWITHTRIGGER details
IfxCcu6_TPwm.c | CCU6 TPWM details
IfxCcu6_TPwm.h | CCU6 TPWM details
IfxCif.c | CIF basic functionality
IfxCif.h | CIF basic functionality
IfxCif_Cam.c | CIF CAM details
IfxCif_Cam.h | CIF CAM details
IfxCif_cfg.c | CIF on-chip implementation data
IfxCif_cfg.h | CIF on-chip implementation data
IfxCif_PinMap.c | CIF I/O map
IfxCif_PinMap.h | CIF I/O map
IfxCpu.c | CPU basic functionality
IfxCpu.h | CPU basic functionality
IfxCpu_cfg.c | CPU on-chip implementation data
IfxCpu_cfg.h | CPU on-chip implementation data
IfxCpu_CStart.h | This file contains the Core startup sequence
IfxCpu_CStart0.c | This file contains the Core startup sequence for Cpu0
IfxCpu_CStart1.c | This file contains the Core startup sequence for Cpu1
IfxCpu_Intrinsics.h |
IfxCpu_IntrinsicsDcc.h |
IfxCpu_IntrinsicsDcc2G.h |
IfxCpu_IntrinsicsGhs.h |
IfxCpu_IntrinsicsGhs2G.h |
IfxCpu_IntrinsicsGnuc.h |
IfxCpu_IntrinsicsGnuc2G.h |
IfxCpu_IntrinsicsTasking.h |
IfxCpu_IntrinsicsTasking2G.h |
IfxCpu_Irq.c | This file contains the APIs for Interrupt related functions
IfxCpu_Irq.h | This file contains the APIs for Interrupt related functions
IfxCpu_Trap.c | This file contains the APIs for Trap related functions
IfxCpu_Trap.h |
IfxDma.c | DMA basic functionality
IfxDma.h | DMA basic functionality
IfxDma_cfg.c | DMA on-chip implementation data
IfxDma_cfg.h | DMA on-chip implementation data
IfxDma_Dma.c | DMA DMA details
IfxDma_Dma.h | DMA DMA details
IfxDsadc.c | DSADC basic functionality
IfxDsadc.h | DSADC basic functionality
IfxDsadc_cfg.h | DSADC on-chip implementation data
IfxDsadc_Dsadc.c | DSADC DSADC details
IfxDsadc_Dsadc.h | DSADC DSADC details
IfxDsadc_PinMap.c | DSADC I/O map
IfxDsadc_PinMap.h | DSADC I/O map
IfxDsadc_Rdc.c | DSADC RDC details
IfxDsadc_Rdc.h | DSADC RDC details
IfxDts.c | DTS basic functionality
IfxDts.h | DTS basic functionality
IfxDts_cfg.h | DTS on-chip implementation data
IfxDts_Dts.c | DTS DTS details
IfxDts_Dts.h | DTS DTS details
IfxEmem.c | EMEM basic functionality
IfxEmem.h | EMEM basic functionality
IfxEmem_cfg.c | EMEM on-chip implementation data
IfxEmem_cfg.h | EMEM on-chip implementation data
IfxEray.c | ERAY basic functionality
IfxEray.h | ERAY basic functionality
IfxEray_cfg.c | ERAY on-chip implementation data
IfxEray_cfg.h | ERAY on-chip implementation data
IfxEray_Eray.c | ERAY ERAY details
IfxEray_Eray.h | ERAY ERAY details
IfxEray_PinMap.c | ERAY I/O map
IfxEray_PinMap.h | ERAY I/O map
IfxEth.c | ETH basic functionality
IfxEth.h | ETH basic functionality
IfxEth_cfg.h | ETH on-chip implementation data
IfxEth_Phy_Pef7071.c | ETH PHY_PEF7071 details
IfxEth_Phy_Pef7071.h | ETH PHY_PEF7071 details
IfxEth_PinMap.c | ETH I/O map
IfxEth_PinMap.h | ETH I/O map
IfxFce.c | FCE basic functionality
IfxFce.h | FCE basic functionality
IfxFce_cfg.h | FCE on-chip implementation data
IfxFce_Crc.c | FCE CRC details
IfxFce_Crc.h | FCE CRC details
IfxFft.c | FFT basic functionality
IfxFft.h | FFT basic functionality
IfxFft_cfg.h | FFT on-chip implementation data
IfxFft_Fft.c | FFT FFT details
IfxFft_Fft.h | FFT FFT details
IfxFlash.c | FLASH basic functionality
IfxFlash.h | FLASH basic functionality
IfxFlash_cfg.c | FLASH on-chip implementation data
IfxFlash_cfg.h | FLASH on-chip implementation data
IfxGlobal_cfg.h | Global definitions
IfxGpt12.c | GPT12 basic functionality
IfxGpt12.h | GPT12 basic functionality
IfxGpt12_cfg.h | GPT12 on-chip implementation data
IfxGpt12_IncrEnc.c | GPT12 INCRENC details
IfxGpt12_IncrEnc.h | GPT12 INCRENC details
IfxGpt12_PinMap.c | GPT12 I/O map
IfxGpt12_PinMap.h | GPT12 I/O map
IfxGtm.c | GTM basic functionality
IfxGtm.h | GTM basic functionality
IfxGtm_Atom.c | GTM basic functionality
IfxGtm_Atom.h | GTM basic functionality
IfxGtm_Atom_Pwm.c | GTM PWM details
IfxGtm_Atom_Pwm.h | GTM PWM details
IfxGtm_Atom_PwmHl.c | GTM PWMHL details
IfxGtm_Atom_PwmHl.h | GTM PWMHL details
IfxGtm_Atom_Timer.c | GTM TIMER details
IfxGtm_Atom_Timer.h | GTM TIMER details
IfxGtm_cfg.c | GTM on-chip implementation data
IfxGtm_cfg.h | GTM on-chip implementation data
IfxGtm_Cmu.c | GTM basic functionality
IfxGtm_Cmu.h | GTM basic functionality
IfxGtm_Dpll.c | GTM basic functionality
IfxGtm_Dpll.h | GTM basic functionality
IfxGtm_PinMap.c | GTM I/O map
IfxGtm_PinMap.h | GTM I/O map
IfxGtm_Tbu.c | GTM basic functionality
IfxGtm_Tbu.h | GTM basic functionality
IfxGtm_Tim.c | GTM basic functionality
IfxGtm_Tim.h | GTM basic functionality
IfxGtm_Tim_In.c | GTM IN details
IfxGtm_Tim_In.h | GTM IN details
IfxGtm_Tom.c | GTM basic functionality
IfxGtm_Tom.h | GTM basic functionality
IfxGtm_Tom_Pwm.c | GTM PWM details
IfxGtm_Tom_Pwm.h | GTM PWM details
IfxGtm_Tom_PwmHl.c | GTM PWMHL details
IfxGtm_Tom_PwmHl.h | GTM PWMHL details
IfxGtm_Tom_Timer.c | GTM TIMER details
IfxGtm_Tom_Timer.h | GTM TIMER details
IfxGtm_Trig.c | GTM TRIG details
IfxGtm_Trig.h | GTM TRIG details
IfxHssl.c | HSSL basic functionality
IfxHssl.h | HSSL basic functionality
IfxHssl_cfg.c | HSSL on-chip implementation data
IfxHssl_cfg.h | HSSL on-chip implementation data
IfxHssl_Hssl.c | HSSL HSSL details
IfxHssl_Hssl.h | HSSL HSSL details
IfxI2c.c | I2C basic functionality
IfxI2c.h | I2C basic functionality
IfxI2c_cfg.c | I2C on-chip implementation data
IfxI2c_cfg.h | I2C on-chip implementation data
IfxI2c_I2c.c | I2C I2C details
IfxI2c_I2c.h | I2C I2C details
IfxI2c_PinMap.c | I2C I/O map
IfxI2c_PinMap.h | I2C I/O map
IfxIom.c | IOM basic functionality
IfxIom.h | IOM basic functionality
IfxIom_cfg.h | IOM on-chip implementation data
IfxIom_Driver.c | IOM DRIVER details
IfxIom_Driver.h | IOM DRIVER details
IfxLldVersion.h |
IfxMsc.c | MSC basic functionality
IfxMsc.h | MSC basic functionality
IfxMsc_cfg.c | MSC on-chip implementation data
IfxMsc_cfg.h | MSC on-chip implementation data
IfxMsc_Msc.c | MSC MSC details
IfxMsc_Msc.h | MSC MSC details
IfxMsc_PinMap.c | MSC I/O map
IfxMsc_PinMap.h | MSC I/O map
IfxMtu.c | MTU basic functionality
IfxMtu.h | MTU basic functionality
IfxMtu_cfg.c | Mtu on-chip implementation data
IfxMtu_cfg.h | Mtu on-chip implementation data
IfxMultican.c | MULTICAN basic functionality
IfxMultican.h | MULTICAN basic functionality
IfxMultican_Can.c | MULTICAN CAN details
IfxMultican_Can.h | MULTICAN CAN details
IfxMultican_cfg.c | MULTICAN on-chip implementation data
IfxMultican_cfg.h | MULTICAN on-chip implementation data
IfxMultican_PinMap.c | MULTICAN I/O map
IfxMultican_PinMap.h | MULTICAN I/O map
IfxPort.c | PORT basic functionality
IfxPort.h | PORT basic functionality
IfxPort_cfg.c | PORT on-chip implementation data
IfxPort_cfg.h | PORT on-chip implementation data
IfxPort_Io.c | PORT IO details
IfxPort_Io.h | PORT IO details
IfxPort_PinMap.c | PORT I/O map
IfxPort_PinMap.h | PORT I/O map
IfxPsi5.c | PSI5 basic functionality
IfxPsi5.h | PSI5 basic functionality
IfxPsi5_cfg.c | PSI5 on-chip implementation data
IfxPsi5_cfg.h | PSI5 on-chip implementation data
IfxPsi5_PinMap.c | PSI5 I/O map
IfxPsi5_PinMap.h | PSI5 I/O map
IfxPsi5_Psi5.c | PSI5 PSI5 details
IfxPsi5_Psi5.h | PSI5 PSI5 details
IfxPsi5s.c | PSI5S basic functionality
IfxPsi5s.h | PSI5S basic functionality
IfxPsi5s_cfg.h | PSI5S on-chip implementation data
IfxPsi5s_PinMap.c | PSI5S I/O map
IfxPsi5s_PinMap.h | PSI5S I/O map
IfxPsi5s_Psi5s.c | PSI5S PSI5S details
IfxPsi5s_Psi5s.h | PSI5S PSI5S details
IfxQspi.c | QSPI basic functionality
IfxQspi.h | QSPI basic functionality
IfxQspi_cfg.c | QSPI on-chip implementation data
IfxQspi_cfg.h | QSPI on-chip implementation data
IfxQspi_PinMap.c | QSPI I/O map
IfxQspi_PinMap.h | QSPI I/O map
IfxQspi_SpiMaster.c | QSPI SPIMASTER details
IfxQspi_SpiMaster.h | QSPI SPIMASTER details
IfxQspi_SpiSlave.c | QSPI SPISLAVE details
IfxQspi_SpiSlave.h | QSPI SPISLAVE details
IfxScu_cfg.c | SCU on-chip implementation data
IfxScu_cfg.h | SCU on-chip implementation data
IfxScu_PinMap.c | SCU I/O map
IfxScu_PinMap.h | SCU I/O map
IfxScuCcu.c | SCU basic functionality
IfxScuCcu.h | SCU basic functionality
IfxScuEru.c | SCU basic functionality
IfxScuEru.h | SCU basic functionality
IfxScuWdt.asm.h | SCU basic functionality
IfxScuWdt.c | SCU basic functionality
IfxScuWdt.h | SCU basic functionality
IfxSent.c | SENT basic functionality
IfxSent.h | SENT basic functionality
IfxSent_cfg.c | SENT on-chip implementation data
IfxSent_cfg.h | SENT on-chip implementation data
IfxSent_PinMap.c | SENT I/O map
IfxSent_PinMap.h | SENT I/O map
IfxSent_Sent.c | SENT SENT details
IfxSent_Sent.h | SENT SENT details
IfxSmu.c | SMU basic functionality
IfxSmu.h | SMU basic functionality
IfxSmu_cfg.c | SMU on-chip implementation data
IfxSmu_cfg.h | SMU on-chip implementation data
IfxSmu_PinMap.c | SMU I/O map
IfxSmu_PinMap.h | SMU I/O map
IfxSrc.c | SRC basic functionality
IfxSrc.h | SRC basic functionality
IfxSrc_cfg.c | SRC on-chip implementation data
IfxSrc_cfg.h | SRC on-chip implementation data
IfxStdIf.h | Standard interface types
IfxStdIf_DPipe.c | Standard interface: Data Pipe
IfxStdIf_DPipe.h | Standard interface: Data Pipe
IfxStdIf_Pos.c | Standard interface: Position interface
IfxStdIf_Pos.h | Standard interface: Position interface
IfxStdIf_PwmHl.c | Standard interface: Multi-channels, dual-complementary PWM interface
IfxStdIf_PwmHl.h | Standard interface: Multi-channels, dual-complementary PWM interface
IfxStdIf_Timer.c | Standard interface: Timer
IfxStdIf_Timer.h | Standard interface: Timer
IfxStm.c | STM basic functionality
IfxStm.h | STM basic functionality
IfxStm_cfg.c | STM on-chip implementation data
IfxStm_cfg.h | STM on-chip implementation data
IfxStm_Timer.c | STM TIMER details
IfxStm_Timer.h | STM TIMER details
IfxVadc.c | VADC basic functionality
IfxVadc.h | VADC basic functionality
IfxVadc_Adc.c | VADC ADC details
IfxVadc_Adc.h | VADC ADC details
IfxVadc_cfg.c | VADC on-chip implementation data
IfxVadc_cfg.h | VADC on-chip implementation data
IfxVadc_PinMap.c | VADC I/O map
IfxVadc_PinMap.h | VADC I/O map
lld_api.c |
lld_codingRules.c |
lld_codingRules_codeFormating.c |
lld_codingRules_commonApis.c |
lld_conventions.c |
lld_conventionsDoxygen.c |
lld_dosanddont.c |
lld_dosanddont_enumUsage.c |
lld_dosanddont_namingConvention.c |
lld_dosanddont_optimisation.c |
lld_filesAndConfig.c |
lld_structure.c |
lld_versioning.c |
mainpage.c |
Platform_Types.h |
PwmHl.h | Multi-channels, dual-complementary PWM interface
SpiIf.c | SPI interface
SpiIf.h | SPI interface types
Timer.h | Timer interface
TPwm.h | TPWM interface


iLLD_TC26B: Assert.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Functions | Variables
Assert.c File Reference

Assert functions. More...

#include "Assert.h"
Include dependency graph for Assert.c:

Go to the source code of this file.

Functions

void | Ifx_Assert_doLevel (uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
boolean | Ifx_Assert_doValidate (boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)

Variables

const pchar Assert_level [6]

Detailed Description

Assert functions.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:29 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Assert.c.

Variable Documentation

◆ Assert_level

const pchar Assert_level[6]
Initial value:
= {
"OFF",
"FAILURE",
"ERROR",
"WARNING",
"INFO",
"DEBUG"
}

Definition at line 65 of file Assert.c.

Referenced by Ifx_Assert_doLevel(), and Ifx_Assert_doValidate().


iLLD_TC26B: CompilerDcc.c File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerDcc.c File Reference
#include "Cpu/Std/Ifx_Types.h"
#include "Compilers.h"
Include dependency graph for CompilerDcc.c:

Go to the source code of this file.

Detailed Description

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:39 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file CompilerDcc.c.


iLLD_TC26B: CompilerDcc.h File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
Macros
CompilerDcc.h File Reference
#include <stddef.h>
Include dependency graph for CompilerDcc.h:

Go to the source code of this file.

Macros

#define | IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu)
#define | __USTACK(cpu) __USTACK##cpu
#define | __ISTACK(cpu) __ISTACK##cpu
#define | __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
#define | __CSA(cpu) __CSA##cpu
#define | __CSA_END(cpu) __CSA##cpu##_END
#define | IFXCOMPILER_COMMON_LINKER_SYMBOLS() __asm("\t .weak __A8_MEM, __A9_MEM");
#define | __INTTAB(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
#define | __SDATA1(cpu) _SMALL_DATA_
#define | __SDATA2(cpu) _LITERAL_DATA_
#define | __SDATA3(cpu) __A8_MEM
#define | __SDATA4(cpu) __A9_MEM
#define | IFX_INLINE static __inline__
#define | IFX_PACKED
#define | COMPILER_NAME "DCC"
#define | COMPILER_VERSION __VERSION__
#define | COMPILER_REVISION 0
#define | IFX_INTERRUPT_FAST IFX_INTERRUPT
#define | IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) void __interrupt(prio) __vector_table(vectabNum) isr(void)
#define | IFX_INTERRUPT_LEGACY(isr, vectabNum, prio)
#define | IFX_ALIGN(n) __attribute__ ((aligned(n)))
#define | IFX_FAR_ABS
#define | IFX_NEAR_ABS
#define | IFX_REL_A0
#define | IFX_REL_A1
#define | IFX_REL_A8
#define | IFX_REL_A9

Detailed Description

Version
iLLD_New
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file CompilerDcc.h.

Macro Definition Documentation

◆ __CSA

#define __CSA ( cpu ) __CSA##cpu

Definition at line 74 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __CSA_END

#define __CSA_END ( cpu ) __CSA##cpu##_END

Definition at line 75 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __INTTAB

#define __INTTAB ( cpu ) __INTTAB_CPU##cpu

Definition at line 85 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __INTTAB_CPU

#define __INTTAB_CPU ( cpu ) __INTTAB_CPU##cpu

Definition at line 72 of file CompilerDcc.h.

◆ __ISTACK

#define __ISTACK ( cpu ) __ISTACK##cpu

Definition at line 71 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __SDATA1

#define __SDATA1 ( cpu ) _SMALL_DATA_

Definition at line 90 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __SDATA2

#define __SDATA2 ( cpu ) _LITERAL_DATA_

Definition at line 91 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __SDATA3

#define __SDATA3 ( cpu ) __A8_MEM

Definition at line 92 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __SDATA4

#define __SDATA4 ( cpu ) __A9_MEM

Definition at line 93 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __TRAPTAB

#define __TRAPTAB ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 88 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __TRAPTAB_CPU

#define __TRAPTAB_CPU ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 73 of file CompilerDcc.h.

◆ __USTACK

#define __USTACK ( cpu ) __USTACK##cpu

Definition at line 70 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ COMPILER_NAME

#define COMPILER_NAME "DCC"

Definition at line 103 of file CompilerDcc.h.

◆ COMPILER_REVISION

#define COMPILER_REVISION 0

Definition at line 106 of file CompilerDcc.h.

◆ COMPILER_VERSION

#define COMPILER_VERSION __VERSION__

Definition at line 104 of file CompilerDcc.h.

◆ IFX_ALIGN

#define IFX_ALIGN ( n ) __attribute__ ((aligned(n)))

Definition at line 145 of file CompilerDcc.h.

◆ IFX_FAR_ABS

#define IFX_FAR_ABS

Definition at line 150 of file CompilerDcc.h.

◆ IFX_INLINE

#define IFX_INLINE static __inline__

Definition at line 98 of file CompilerDcc.h.

◆ IFX_INTERRUPT

#define IFX_INTERRUPT | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)

Definition at line 119 of file CompilerDcc.h.

◆ IFX_INTERRUPT_FAST

#define IFX_INTERRUPT_FAST IFX_INTERRUPT

Definition at line 107 of file CompilerDcc.h.

◆ IFX_INTERRUPT_INTERNAL

#define IFX_INTERRUPT_INTERNAL | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | void __interrupt(prio) __vector_table(vectabNum) isr(void)

Definition at line 124 of file CompilerDcc.h.

◆ IFX_INTERRUPT_LEGACY

#define IFX_INTERRUPT_LEGACY | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) |
Value:
__asm ("\t.align\t 5\n\t\.section .int."#prio"\n \t.sectionlink .inttab"#vectabNum".intvec."#prio"\n\#$$bf\n\__intvec_tc"#vectabNum"_"#prio":\n\ movh.a\t %a14,"#isr"@ha\n\ lea\t %a14,[%a14]"#isr"@l\n\ ji\t %a14\n\#$$ef\n\t\.section .intend."#prio"\n \t.sectionlink .text");\
__interrupt__ void isr (void)

Definition at line 129 of file CompilerDcc.h.

◆ IFX_NEAR_ABS

#define IFX_NEAR_ABS

Definition at line 154 of file CompilerDcc.h.

◆ IFX_PACKED

#define IFX_PACKED

Definition at line 101 of file CompilerDcc.h.

◆ IFX_REL_A0

#define IFX_REL_A0

Definition at line 158 of file CompilerDcc.h.

◆ IFX_REL_A1

#define IFX_REL_A1

Definition at line 162 of file CompilerDcc.h.

◆ IFX_REL_A8

#define IFX_REL_A8

Definition at line 166 of file CompilerDcc.h.

◆ IFX_REL_A9

#define IFX_REL_A9

Definition at line 170 of file CompilerDcc.h.

◆ IFXCOMPILER_COMMON_LINKER_SYMBOLS

#define IFXCOMPILER_COMMON_LINKER_SYMBOLS ( ) __asm("\t .weak __A8_MEM, __A9_MEM");

ASM extern definitions

Definition at line 77 of file CompilerDcc.h.

◆ IFXCOMPILER_CORE_LINKER_SYMBOLS

#define IFXCOMPILER_CORE_LINKER_SYMBOLS ( cpu )
Value:
extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
extern unsigned int __INTTAB_CPU##cpu[]; /**< interrupt vector table */ \
extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap vector table */ \
extern unsigned int __CSA##cpu[]; /**< context save area begin */ \
extern unsigned int __CSA##cpu##_END[];
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerDcc.h:71
__INTTAB_CPU
#define __INTTAB_CPU(cpu)
Definition: CompilerDcc.h:72
__CSA
#define __CSA(cpu)
Definition: CompilerDcc.h:74
__USTACK
#define __USTACK(cpu)
Definition: CompilerDcc.h:70
__TRAPTAB_CPU
#define __TRAPTAB_CPU(cpu)
Definition: CompilerDcc.h:73

context save area end

Definition at line 56 of file CompilerDcc.h.


iLLD_TC26B: CompilerGhs.c File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerGhs.c File Reference
#include "Cpu/Std/Ifx_Types.h"
#include "Compilers.h"
Include dependency graph for CompilerGhs.c:

Go to the source code of this file.

Detailed Description

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:40 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file CompilerGhs.c.


iLLD_TC26B: CompilerGhs.h File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
Macros
CompilerGhs.h File Reference

Go to the source code of this file.

Macros

#define | IFXCOMPILER_COMMON_LINKER_SYMBOLS()
#define | IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu)
#define | __USTACK(cpu) __USTACK##cpu
#define | __ISTACK(cpu) __ISTACK##cpu
#define | __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
#define | __CSA(cpu) __CSA##cpu
#define | __CSA_END(cpu) __CSA##cpu##_END
#define | __INTTAB(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
#define | __SDATA1(cpu) __A0_MEM
#define | __SDATA2(cpu) __A1_MEM
#define | __SDATA3(cpu) __A8_MEM
#define | __SDATA4(cpu) __A9_MEM
#define | IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */
#define | IFX_PACKED __packed
#define | COMPILER_NAME "GHS"
#define | COMPILER_VERSION __GHS_VERSION_NUMBER
#define | COMPILER_REVISION __GHS_REVISION_VALUE
#define | IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_ALIGN(n) __attribute__ ((aligned(n)))
#define | IFX_FAR_ABS __attribute__((fardata))
#define | IFX_NEAR_ABS
#define | IFX_REL_A0
#define | IFX_REL_A1
#define | IFX_REL_A8
#define | IFX_REL_A9

Detailed Description

Version
iLLD_New
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file CompilerGhs.h.

Macro Definition Documentation

◆ __CSA

#define __CSA ( cpu ) __CSA##cpu

Definition at line 87 of file CompilerGhs.h.

◆ __CSA_END

#define __CSA_END ( cpu ) __CSA##cpu##_END

Definition at line 88 of file CompilerGhs.h.

◆ __INTTAB

#define __INTTAB ( cpu ) __INTTAB_CPU##cpu

Definition at line 94 of file CompilerGhs.h.

◆ __INTTAB_CPU

#define __INTTAB_CPU ( cpu ) __INTTAB_CPU##cpu

Definition at line 85 of file CompilerGhs.h.

◆ __ISTACK

#define __ISTACK ( cpu ) __ISTACK##cpu

Definition at line 84 of file CompilerGhs.h.

◆ __SDATA1

#define __SDATA1 ( cpu ) __A0_MEM

Definition at line 99 of file CompilerGhs.h.

◆ __SDATA2

#define __SDATA2 ( cpu ) __A1_MEM

Definition at line 100 of file CompilerGhs.h.

◆ __SDATA3

#define __SDATA3 ( cpu ) __A8_MEM

Definition at line 101 of file CompilerGhs.h.

◆ __SDATA4

#define __SDATA4 ( cpu ) __A9_MEM

Definition at line 102 of file CompilerGhs.h.

◆ __TRAPTAB

#define __TRAPTAB ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 97 of file CompilerGhs.h.

◆ __TRAPTAB_CPU

#define __TRAPTAB_CPU ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 86 of file CompilerGhs.h.

◆ __USTACK

#define __USTACK ( cpu ) __USTACK##cpu

Definition at line 83 of file CompilerGhs.h.

◆ COMPILER_NAME

#define COMPILER_NAME "GHS"

Definition at line 119 of file CompilerGhs.h.

◆ COMPILER_REVISION

#define COMPILER_REVISION __GHS_REVISION_VALUE

Definition at line 122 of file CompilerGhs.h.

◆ COMPILER_VERSION

#define COMPILER_VERSION __GHS_VERSION_NUMBER

Definition at line 120 of file CompilerGhs.h.

◆ IFX_ALIGN

#define IFX_ALIGN ( n ) __attribute__ ((aligned(n)))

Definition at line 151 of file CompilerGhs.h.

◆ IFX_FAR_ABS

#define IFX_FAR_ABS __attribute__((fardata))

Definition at line 156 of file CompilerGhs.h.

◆ IFX_INLINE

#define IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */

Definition at line 114 of file CompilerGhs.h.

◆ IFX_INTERRUPT

#define IFX_INTERRUPT | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)

Definition at line 134 of file CompilerGhs.h.

◆ IFX_INTERRUPT_INTERNAL

#define IFX_INTERRUPT_INTERNAL | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) |
Value:
__attribute__((section(".intvec_tc"#vectabNum"_"#prio))) void iVecEntry##vectabNum##_##prio(void) \
{ \
__asm__("movh.a a14, %hi("#isr") \n" \
"lea a14, [a14]%lo("#isr")\n" \
"ji a14"); \
} \
__interrupt void isr(void)

Definition at line 138 of file CompilerGhs.h.

◆ IFX_NEAR_ABS

#define IFX_NEAR_ABS

Definition at line 160 of file CompilerGhs.h.

◆ IFX_PACKED

#define IFX_PACKED __packed

Definition at line 117 of file CompilerGhs.h.

◆ IFX_REL_A0

#define IFX_REL_A0

Definition at line 164 of file CompilerGhs.h.

◆ IFX_REL_A1

#define IFX_REL_A1

Definition at line 168 of file CompilerGhs.h.

◆ IFX_REL_A8

#define IFX_REL_A8

Definition at line 172 of file CompilerGhs.h.

◆ IFX_REL_A9

#define IFX_REL_A9

Definition at line 176 of file CompilerGhs.h.

◆ IFXCOMPILER_COMMON_LINKER_SYMBOLS

#define IFXCOMPILER_COMMON_LINKER_SYMBOLS ( )
Value:
extern unsigned int __A0_MEM[]; /**< center of A0 addressable area */ \
extern unsigned int __A1_MEM[]; /**< center of A1 addressable area */ \
extern unsigned int __A8_MEM[]; /**< center of A8 addressable area */ \
extern unsigned int __A9_MEM[];

center of A9 addressable area

Definition at line 54 of file CompilerGhs.h.

◆ IFXCOMPILER_CORE_LINKER_SYMBOLS

#define IFXCOMPILER_CORE_LINKER_SYMBOLS ( cpu )
Value:
extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
extern unsigned int __INTTAB_CPU##cpu[]; /**< Interrupt vector table */ \
extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap table */ \
extern unsigned int __CSA##cpu[]; /**< context save area 1 begin */ \
extern unsigned int __CSA##cpu##_END[];
__INTTAB_CPU
#define __INTTAB_CPU(cpu)
Definition: CompilerGhs.h:85
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerGhs.h:84
__CSA
#define __CSA(cpu)
Definition: CompilerGhs.h:87
__USTACK
#define __USTACK(cpu)
Definition: CompilerGhs.h:83
__TRAPTAB_CPU
#define __TRAPTAB_CPU(cpu)
Definition: CompilerGhs.h:86

context save area 1 begin

Definition at line 69 of file CompilerGhs.h.


iLLD_TC26B: CompilerGnuc.c File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerGnuc.c File Reference
#include "Cpu/Std/Ifx_Types.h"
#include "Compilers.h"
Include dependency graph for CompilerGnuc.c:

Go to the source code of this file.

Detailed Description

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:40 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file CompilerGnuc.c.


iLLD_TC26B: CompilerGnuc.h File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
Macros
CompilerGnuc.h File Reference
#include <stddef.h>
Include dependency graph for CompilerGnuc.h:

Go to the source code of this file.

Macros

#define | IFXCOMPILER_COMMON_LINKER_SYMBOLS()
#define | IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu)
#define | __USTACK(cpu) __USTACK##cpu
#define | __ISTACK(cpu) __ISTACK##cpu
#define | __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
#define | __CSA(cpu) __CSA##cpu
#define | __CSA_END(cpu) __CSA##cpu##_END
#define | __INTTAB(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
#define | __SDATA1(cpu) __A0_MEM
#define | __SDATA2(cpu) __A1_MEM
#define | __SDATA3(cpu) __A8_MEM
#define | __SDATA4(cpu) __A9_MEM
#define | IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */
#define | IFX_PACKED __attribute__ ((packed))
#define | COMPILER_NAME "GNUC"
#define | COMPILER_VERSION __VERSION__
#define | COMPILER_REVISION 0
#define | IFX_INTERRUPT_FAST IFX_INTERRUPT
#define | IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_ALIGN(n) __attribute__ ((aligned(n)))
#define | IFX_FAR_ABS __attribute__((fardata))
#define | IFX_NEAR_ABS
#define | IFX_REL_A0
#define | IFX_REL_A1
#define | IFX_REL_A8
#define | IFX_REL_A9

Detailed Description

Version
iLLD_New
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file CompilerGnuc.h.

Macro Definition Documentation

◆ __CSA

#define __CSA ( cpu ) __CSA##cpu

Definition at line 87 of file CompilerGnuc.h.

◆ __CSA_END

#define __CSA_END ( cpu ) __CSA##cpu##_END

Definition at line 88 of file CompilerGnuc.h.

◆ __INTTAB

#define __INTTAB ( cpu ) __INTTAB_CPU##cpu

Definition at line 94 of file CompilerGnuc.h.

◆ __INTTAB_CPU

#define __INTTAB_CPU ( cpu ) __INTTAB_CPU##cpu

Definition at line 85 of file CompilerGnuc.h.

◆ __ISTACK

#define __ISTACK ( cpu ) __ISTACK##cpu

Definition at line 84 of file CompilerGnuc.h.

◆ __SDATA1

#define __SDATA1 ( cpu ) __A0_MEM

Definition at line 99 of file CompilerGnuc.h.

◆ __SDATA2

#define __SDATA2 ( cpu ) __A1_MEM

Definition at line 100 of file CompilerGnuc.h.

◆ __SDATA3

#define __SDATA3 ( cpu ) __A8_MEM

Definition at line 101 of file CompilerGnuc.h.

◆ __SDATA4

#define __SDATA4 ( cpu ) __A9_MEM

Definition at line 102 of file CompilerGnuc.h.

◆ __TRAPTAB

#define __TRAPTAB ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 97 of file CompilerGnuc.h.

◆ __TRAPTAB_CPU

#define __TRAPTAB_CPU ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 86 of file CompilerGnuc.h.

◆ __USTACK

#define __USTACK ( cpu ) __USTACK##cpu

Definition at line 83 of file CompilerGnuc.h.

◆ COMPILER_NAME

#define COMPILER_NAME "GNUC"

Definition at line 113 of file CompilerGnuc.h.

◆ COMPILER_REVISION

#define COMPILER_REVISION 0

Definition at line 116 of file CompilerGnuc.h.

◆ COMPILER_VERSION

#define COMPILER_VERSION __VERSION__

Definition at line 114 of file CompilerGnuc.h.

◆ IFX_ALIGN

#define IFX_ALIGN ( n ) __attribute__ ((aligned(n)))

Definition at line 164 of file CompilerGnuc.h.

◆ IFX_FAR_ABS

#define IFX_FAR_ABS __attribute__((fardata))

Definition at line 169 of file CompilerGnuc.h.

◆ IFX_INLINE

#define IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */

Definition at line 108 of file CompilerGnuc.h.

◆ IFX_INTERRUPT

#define IFX_INTERRUPT | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)

Definition at line 129 of file CompilerGnuc.h.

◆ IFX_INTERRUPT_FAST

#define IFX_INTERRUPT_FAST IFX_INTERRUPT

Definition at line 118 of file CompilerGnuc.h.

◆ IFX_INTERRUPT_INTERNAL

#define IFX_INTERRUPT_INTERNAL | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) |
Value:
__asm__ (".ifndef .intr.entry.include \n"\
".altmacro \n"\
".macro .int_entry.2 intEntryLabel, name # define the section and inttab entry code \n"\
" .pushsection .\\intEntryLabel,\"ax\",@progbits \n"\
" __\\intEntryLabel : \n"\
" svlcx \n"\
" movh.a %a14, hi:\\name \n"\
" lea %a14, [%a14]lo:\\name \n"\
" ji %a14 \n"\
" .popsection \n"\
".endm \n"\
".macro .int_entry.1 prio,vectabNum,u,name \n"\
".int_entry.2 intvec_tc\\vectabNum\\u\\prio,(name) # build the unique name \n"\
".endm \n"\
" \n"\
".macro .intr.entry name,vectabNum,prio \n"\
".int_entry.1 %(prio),%(vectabNum),_,name # evaluate the priority and the cpu number \n"\
".endm \n"\
".intr.entry.include: \n"\
".endif \n"\
".intr.entry "#isr","#vectabNum","#prio );\
IFX_EXTERN void __attribute__ ((interrupt_handler)) isr(); \
void isr (void)
__asm__
#define __asm__
Definition: Ifx_TypesTasking.h:45

Definition at line 134 of file CompilerGnuc.h.

◆ IFX_NEAR_ABS

#define IFX_NEAR_ABS

Definition at line 173 of file CompilerGnuc.h.

◆ IFX_PACKED

#define IFX_PACKED __attribute__ ((packed))

Definition at line 111 of file CompilerGnuc.h.

◆ IFX_REL_A0

#define IFX_REL_A0

Definition at line 177 of file CompilerGnuc.h.

◆ IFX_REL_A1

#define IFX_REL_A1

Definition at line 181 of file CompilerGnuc.h.

◆ IFX_REL_A8

#define IFX_REL_A8

Definition at line 185 of file CompilerGnuc.h.

◆ IFX_REL_A9

#define IFX_REL_A9

Definition at line 189 of file CompilerGnuc.h.

◆ IFXCOMPILER_COMMON_LINKER_SYMBOLS

#define IFXCOMPILER_COMMON_LINKER_SYMBOLS ( )
Value:
extern unsigned int __A0_MEM[]; /**< center of A0 addressable area */ \
extern unsigned int __A1_MEM[]; /**< center of A1 addressable area */ \
extern unsigned int __A8_MEM[]; /**< center of A8 addressable area */ \
extern unsigned int __A9_MEM[];

center of A9 addressable area

Definition at line 54 of file CompilerGnuc.h.

◆ IFXCOMPILER_CORE_LINKER_SYMBOLS

#define IFXCOMPILER_CORE_LINKER_SYMBOLS ( cpu )
Value:
extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
extern unsigned int __INTTAB_CPU##cpu[]; /**< Interrupt vector table */ \
extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap table */ \
extern unsigned int __CSA##cpu[]; /**< context save area 1 begin */ \
extern unsigned int __CSA##cpu##_END[];
__USTACK
#define __USTACK(cpu)
Definition: CompilerGnuc.h:83
__TRAPTAB_CPU
#define __TRAPTAB_CPU(cpu)
Definition: CompilerGnuc.h:86
__INTTAB_CPU
#define __INTTAB_CPU(cpu)
Definition: CompilerGnuc.h:85
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerGnuc.h:84
__CSA
#define __CSA(cpu)
Definition: CompilerGnuc.h:87

context save area 1 begin

Definition at line 69 of file CompilerGnuc.h.


iLLD_TC26B: Compilers.h File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
Macros | Functions
Compilers.h File Reference
#include "Ifx_Cfg.h"
Include dependency graph for Compilers.h:

Go to the source code of this file.

Macros

#define | IFX_STATIC static
#define | IFX_CONST const
#define | CONST_CFG const /* configuration constants are stored in ROM */
#define | IFX_EXTERN extern
#define | NULL_PTR ((void *)0)
#define | CFG_LONG_SIZE_T (0)
#define | IFX_INTERRUPT(isr, vectabNum, prio)
Macro to define Interrupt Service Routine. This macro makes following definitions:
1) Define linker section as .intvec_tc<vector number>_<interrupt priority>.
2) define compiler specific attribute for the interrupt functions.
3) define the Interrupt service routine as Isr function.
To get details about usage of this macro, refer How to define Interrupts?. More...

Functions

void Ifx_C_Init (void)

Detailed Description

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-04-07 12:13:19 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Compilers.h.

Macro Definition Documentation

◆ CFG_LONG_SIZE_T

#define CFG_LONG_SIZE_T (0)

Definition at line 75 of file Compilers.h.

◆ CONST_CFG

#define CONST_CFG const /* configuration constants are stored in ROM */

Definition at line 57 of file Compilers.h.

◆ IFX_CONST

#define IFX_CONST const

Definition at line 54 of file Compilers.h.

Referenced by IfxGtm_Trig_toSent(), and IfxGtm_Trig_toVadc().

◆ IFX_EXTERN

#define IFX_EXTERN extern

Definition at line 63 of file Compilers.h.

◆ IFX_STATIC

#define IFX_STATIC static

Definition at line 50 of file Compilers.h.

◆ NULL_PTR

#define NULL_PTR ((void *)0)

Definition at line 70 of file Compilers.h.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), Ifx_Assert_doLevel(), Ifx_Assert_doValidate(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_create(), Ifx_Fifo_init(), Ifx_Fifo_read(), Ifx_Fifo_write(), Ifx_GlobalResources_get(), Ifx_GlobalResources_getItem(), Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_commandFind(), Ifx_Shell_commandListFind(), Ifx_Shell_execute(), Ifx_Shell_init(), Ifx_Shell_initConfig(), Ifx_Shell_isEndOfLine(), Ifx_Shell_parseToken(), Ifx_Shell_printSyntax(), Ifx_Shell_process(), Ifx_Shell_protocolStart(), Ifx_Shell_showHelp(), Ifx_Shell_showHelpSingle(), Ifx_Shell_showHelpSingleCommand(), Ifx_Shell_skipWhitespace(), IfxAsclin_Asc_initModule(), IfxAsclin_Asc_initModuleConfig(), IfxAsclin_getAddress(), IfxAsclin_initCtsPin(), IfxAsclin_initRxPin(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_initModuleConfig(), IfxAsclin_Spi_initModule(), IfxAsclin_Spi_initModuleConfig(), IfxAsclin_Spi_read(), IfxAsclin_Spi_write(), IfxCcu6_getAddress(), IfxCcu6_Icu_initChannel(), IfxCcu6_Icu_initChannelConfig(), IfxCcu6_Icu_initModule(), IfxCcu6_Icu_initModuleConfig(), IfxCcu6_Icu_startCapture(), IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmBc_initModuleConfig(), IfxCcu6_PwmBc_start(), IfxCcu6_PwmBc_stop(), IfxCcu6_PwmHl_initConfig(), IfxCcu6_PwmHl_setMode(), IfxCcu6_PwmHl_setOutputPins(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_initModuleConfig(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_stop(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TimerWithTrigger_initConfig(), IfxCcu6_TPwm_initModule(), IfxCcu6_TPwm_initModuleConfig(), IfxCcu6_TPwm_start(), IfxCcu6_TPwm_stop(), IfxCif_Cam_getExtraPathPictureInfo(), IfxCif_Cam_initCif(), IfxCif_Cam_initCifDownscaler(), IfxCif_Cam_initMemSize(), IfxCpu_getAddress(), IfxDma_Dma_initChannelConfig(), IfxDsadc_Dsadc_initCarrierGen(), IfxDsadc_Dsadc_initCarrierGenConfig(), IfxDsadc_Dsadc_initChannel(), IfxDsadc_Dsadc_initChannelConfig(), IfxDsadc_initCinPin(), IfxDsadc_initCoutPin(), IfxDsadc_initDinPin(), IfxDsadc_initDsnPin(), IfxDsadc_initDspPin(), IfxDsadc_initItrPin(), IfxDsadc_initSgPin(), IfxDsadc_Rdc_initConfig(), IfxDsadc_Rdc_initHwChannels(), IfxDsadc_Rdc_stdIfPosInit(), IfxEray_Eray_Node_init(), IfxEray_Eray_Node_initConfig(), IfxEray_getAddress(), IfxEray_readData(), IfxEray_setSlot(), IfxEray_writeData(), IfxEth_getTransmitBuffer(), IfxEth_init(), IfxEth_initConfig(), IfxEth_setupMiiInputPins(), IfxEth_setupMiiOutputPins(), IfxEth_waitTransmitBuffer(), IfxFft_Fft_initJob(), IfxFft_Fft_initJobConfig(), IfxFft_Fft_isrInput(), IfxFft_Fft_isrOutput(), IfxFft_Fft_startJob(), IfxGpt12_IncrEnc_init(), IfxGpt12_IncrEnc_initConfig(), IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_initConfig(), IfxGtm_Atom_PwmHl_initConfig(), IfxGtm_Atom_PwmHl_setMode(), IfxGtm_Atom_PwmHl_updateAndShiftOff(), IfxGtm_Atom_PwmHl_updatePulseOff(), IfxGtm_Atom_Timer_init(), IfxGtm_Atom_Timer_initConfig(), IfxGtm_Tim_In_init(), IfxGtm_Tim_In_initConfig(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_initConfig(), IfxGtm_Tom_PwmHl_initConfig(), IfxGtm_Tom_PwmHl_setMode(), IfxGtm_Tom_PwmHl_updateAndShiftOff(), IfxGtm_Tom_PwmHl_updatePulseOff(), IfxGtm_Tom_Timer_init(), IfxGtm_Tom_Timer_initConfig(), IfxGtm_Trig_toSent(), IfxGtm_Trig_toVadc(), IfxHssl_getHsctAddress(), IfxHssl_getHsslAddress(), IfxI2c_getAddress(), IfxI2c_I2c_initConfig(), IfxI2c_I2c_initModule(), IfxMsc_getAddress(), IfxMsc_initEnPin(), IfxMsc_initFclnPin(), IfxMsc_initFclpPin(), IfxMsc_initInjPin(), IfxMsc_initSdiPin(), IfxMsc_initSonPin(), IfxMsc_initSopPin(), IfxMsc_Msc_initModule(), IfxMsc_Msc_initModuleConfig(), IfxMultican_Can_Node_init(), IfxMultican_Can_Node_initConfig(), IfxMultican_getAddress(), IfxPort_getAddress(), IfxPsi5_initRxPin(), IfxPsi5_initTxPin(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initChannelConfig(), IfxPsi5s_initClkPin(), IfxPsi5s_initRxPin(), IfxPsi5s_initTxPin(), IfxPsi5s_Psi5s_initChannelConfig(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_Psi5s_initModuleConfig(), IfxQspi_getAddress(), IfxQspi_SpiMaster_exchange(), IfxQspi_SpiMaster_getChannelConfig(), IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_initChannelConfig(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_initModuleConfig(), IfxQspi_SpiMaster_isrDmaReceive(), IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiMaster_isrError(), IfxQspi_SpiMaster_read(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_initModule(), IfxQspi_SpiSlave_initModuleConfig(), IfxQspi_SpiSlave_read(), IfxQspi_SpiSlave_write(), IfxSent_initSentPin(), IfxSent_initSpcPin(), IfxSent_Sent_initChannel(), IfxSent_Sent_initChannelConfig(), IfxSent_Sent_initModuleConfig(), IfxStm_getAddress(), IfxVadc_Adc_initChannelConfig(), IfxVadc_Adc_initExternalMultiplexerMode(), IfxVadc_Adc_initExternalMultiplexerModeConfig(), and SpiIf_initConfig().

Function Documentation

◆ Ifx_C_Init()

void Ifx_C_Init ( void )

Referenced by _Core0_start().


iLLD_TC26B: CompilerTasking.c File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerTasking.c File Reference
#include "Cpu/Std/Ifx_Types.h"
#include "Compilers.h"
Include dependency graph for CompilerTasking.c:

Go to the source code of this file.

Detailed Description

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:41 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file CompilerTasking.c.


iLLD_TC26B: CompilerTasking.h File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
Macros
CompilerTasking.h File Reference
#include <stddef.h>
Include dependency graph for CompilerTasking.h:

Go to the source code of this file.

Macros

#define | IFXCOMPILER_COMMON_LINKER_SYMBOLS() __asm("\t .extern _SMALL_DATA_, _LITERAL_DATA_, _A8_DATA_, _A9_DATA_");
#define | IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu)
#define | __USTACK(cpu) __USTACK##cpu
#define | __ISTACK(cpu) __ISTACK##cpu
#define | __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
#define | __CSA(cpu) __CSA##cpu
#define | __CSA_END(cpu) __CSA##cpu##_END
#define | __INTTAB(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
#define | __SDATA1(cpu) _SMALL_DATA_
#define | __SDATA2(cpu) _LITERAL_DATA_
#define | __SDATA3(cpu) _A8_DATA_
#define | __SDATA4(cpu) _A9_DATA_
#define | IFX_INLINE static inline
#define | IFX_PACKED
#define | COMPILER_NAME "TASKING"
#define | COMPILER_VERSION __VERSION__
#define | COMPILER_REVISION __REVISION__
#define | IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_INTERRUPT_FAST(isr, vectabNum, prio) void __interrupt_fast(prio) __vector_table(vectabNum) isr(void)
#define | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) void __interrupt(prio) __vector_table(vectabNum) isr(void)
#define | IFX_ALIGN(n) __attribute__ ((__align(n)))
#define | IFX_FAR_ABS __far
#define | IFX_NEAR_ABS __near
#define | IFX_REL_A0 __a0
#define | IFX_REL_A1 __a1
#define | IFX_REL_A8 __a8
#define | IFX_REL_A9 __a9

Detailed Description

Version
iLLD_New
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file CompilerTasking.h.

Macro Definition Documentation

◆ __CSA

#define __CSA ( cpu ) __CSA##cpu

Definition at line 81 of file CompilerTasking.h.

◆ __CSA_END

#define __CSA_END ( cpu ) __CSA##cpu##_END

Definition at line 82 of file CompilerTasking.h.

◆ __INTTAB

#define __INTTAB ( cpu ) __INTTAB_CPU##cpu

Definition at line 88 of file CompilerTasking.h.

◆ __INTTAB_CPU

#define __INTTAB_CPU ( cpu ) __INTTAB_CPU##cpu

Definition at line 79 of file CompilerTasking.h.

◆ __ISTACK

#define __ISTACK ( cpu ) __ISTACK##cpu

Definition at line 78 of file CompilerTasking.h.

◆ __SDATA1

#define __SDATA1 ( cpu ) _SMALL_DATA_

Definition at line 93 of file CompilerTasking.h.

◆ __SDATA2

#define __SDATA2 ( cpu ) _LITERAL_DATA_

Definition at line 94 of file CompilerTasking.h.

◆ __SDATA3

#define __SDATA3 ( cpu ) _A8_DATA_

Definition at line 95 of file CompilerTasking.h.

◆ __SDATA4

#define __SDATA4 ( cpu ) _A9_DATA_

Definition at line 96 of file CompilerTasking.h.

◆ __TRAPTAB

#define __TRAPTAB ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 91 of file CompilerTasking.h.

◆ __TRAPTAB_CPU

#define __TRAPTAB_CPU ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 80 of file CompilerTasking.h.

◆ __USTACK

#define __USTACK ( cpu ) __USTACK##cpu

Definition at line 77 of file CompilerTasking.h.

◆ COMPILER_NAME

#define COMPILER_NAME "TASKING"

Definition at line 110 of file CompilerTasking.h.

◆ COMPILER_REVISION

#define COMPILER_REVISION __REVISION__

Definition at line 114 of file CompilerTasking.h.

◆ COMPILER_VERSION

#define COMPILER_VERSION __VERSION__

Definition at line 111 of file CompilerTasking.h.

◆ IFX_ALIGN

#define IFX_ALIGN ( n ) __attribute__ ((__align(n)))

Definition at line 139 of file CompilerTasking.h.

◆ IFX_FAR_ABS

#define IFX_FAR_ABS __far

Definition at line 144 of file CompilerTasking.h.

◆ IFX_INLINE

#define IFX_INLINE static inline

Definition at line 104 of file CompilerTasking.h.

◆ IFX_INTERRUPT

#define IFX_INTERRUPT | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)

Definition at line 127 of file CompilerTasking.h.

◆ IFX_INTERRUPT_FAST

#define IFX_INTERRUPT_FAST | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | void __interrupt_fast(prio) __vector_table(vectabNum) isr(void)

Definition at line 129 of file CompilerTasking.h.

◆ IFX_INTERRUPT_INTERNAL

#define IFX_INTERRUPT_INTERNAL | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | void __interrupt(prio) __vector_table(vectabNum) isr(void)

Definition at line 133 of file CompilerTasking.h.

◆ IFX_NEAR_ABS

#define IFX_NEAR_ABS __near

Definition at line 148 of file CompilerTasking.h.

◆ IFX_PACKED

#define IFX_PACKED

Definition at line 108 of file CompilerTasking.h.

◆ IFX_REL_A0

#define IFX_REL_A0 __a0

Definition at line 152 of file CompilerTasking.h.

◆ IFX_REL_A1

#define IFX_REL_A1 __a1

Definition at line 156 of file CompilerTasking.h.

◆ IFX_REL_A8

#define IFX_REL_A8 __a8

Definition at line 160 of file CompilerTasking.h.

◆ IFX_REL_A9

#define IFX_REL_A9 __a9

Definition at line 164 of file CompilerTasking.h.

◆ IFXCOMPILER_COMMON_LINKER_SYMBOLS

#define IFXCOMPILER_COMMON_LINKER_SYMBOLS ( ) __asm("\t .extern _SMALL_DATA_, _LITERAL_DATA_, _A8_DATA_, _A9_DATA_");

Definition at line 55 of file CompilerTasking.h.

◆ IFXCOMPILER_CORE_LINKER_SYMBOLS

#define IFXCOMPILER_CORE_LINKER_SYMBOLS ( cpu )
Value:
__asm("\t .extern __USTACK"#cpu); /**< user stack end is required as asm to be used with setreg macro */ \
extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
extern unsigned int __INTTAB_CPU##cpu[]; /**< interrupt vector table */ \
extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap vector table */ \
extern unsigned int __CSA##cpu[]; /**< context save area begin */ \
extern unsigned int __CSA##cpu##_END[];
__CSA
#define __CSA(cpu)
Definition: CompilerTasking.h:81
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerTasking.h:78
__TRAPTAB_CPU
#define __TRAPTAB_CPU(cpu)
Definition: CompilerTasking.h:80
__INTTAB_CPU
#define __INTTAB_CPU(cpu)
Definition: CompilerTasking.h:79

context save area end

Definition at line 62 of file CompilerTasking.h.


iLLD_TC26B: Ifx_AngleTrkF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Functions
Ifx_AngleTrkF32.c File Reference

Angle-tracking observer for sin/cos analog position sensor. More...

#include "Ifx_AngleTrkF32.h"
#include <math.h>
#include "string.h"
#include "Ifx_LutAtan2F32.h"
Include dependency graph for Ifx_AngleTrkF32.c:

Go to the source code of this file.

Macros

#define | IFX_ANGLETRKF32_ATAN2F Ifx_LutAtan2F32_float32
#define | ATO_T (15e-3f)
#define | ATO_K (39.05f)
#define | ATO_PSI (1.5f * IFX_PI)

Functions

void | Ifx_AngleTrkF32_setUserSampling (Ifx_AngleTrkF32 *aObsv, float32 Ts)
IFX_INLINE float32 | Ifx_AngleTrkF32_bound (float32 angle, float32 periodPerRotation)
IFX_INLINE float32 | Ifx_AngleTrkF32_boundInput (float32 input)
float32 | round_f (float32 val)
void | Ifx_AngleTrkF32_setControlGains (Ifx_AngleTrkF32_CfgData *cfgData, float32 K, float32 T, float32 psi)
void | Ifx_AngleTrkF32_initConfig (Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
Fill config with default values. More...
void | Ifx_AngleTrkF32_init (Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
Initialize the Angle Tracking object. More...
float32 | Ifx_AngleTrkF32_step (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisation (call to Ifx_AngleTrkF32_init()). More...
void | Ifx_AngleTrkF32_setOffset (Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
Set the position offset (in ticks) More...
void | Ifx_AngleTrkF32_updateStatus (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
Update the status flags. More...
void | Ifx_AngleTrkF32_update (Ifx_AngleTrkF32 *aObsv)
Update the object directly from its analog input. More...
IfxStdIf_Pos_RawAngle | Ifx_AngleTrkF32_getRawPosition (Ifx_AngleTrkF32 *aObsv)
Returns the actual position. More...
float32 | Ifx_AngleTrkF32_getSpeed (Ifx_AngleTrkF32 *aObsv)
Returns the Speed. More...
float32 | Ifx_AngleTrkF32_getAbsolutePosition (Ifx_AngleTrkF32 *driver)
IfxStdIf_Pos_Dir | Ifx_AngleTrkF32_getDirection (Ifx_AngleTrkF32 *driver)
IfxStdIf_Pos_Status | Ifx_AngleTrkF32_getFault (Ifx_AngleTrkF32 *driver)
sint32 | Ifx_AngleTrkF32_getOffset (Ifx_AngleTrkF32 *driver)
uint16 | Ifx_AngleTrkF32_getPeriodPerRotation (Ifx_AngleTrkF32 *driver)
float32 | Ifx_AngleTrkF32_getPosition (Ifx_AngleTrkF32 *driver)
float32 | Ifx_AngleTrkF32_getRefreshPeriod (Ifx_AngleTrkF32 *driver)
sint32 | Ifx_AngleTrkF32_getResolution (Ifx_AngleTrkF32 *driver)
IfxStdIf_Pos_SensorType | Ifx_AngleTrkF32_getSensorType (Ifx_AngleTrkF32 *driver)
sint32 | Ifx_AngleTrkF32_getTurn (Ifx_AngleTrkF32 *driver)
void | Ifx_AngleTrkF32_resetFaults (Ifx_AngleTrkF32 *driver)
void | Ifx_AngleTrkF32_setRefreshPeriod (Ifx_AngleTrkF32 *driver, float32 updatePeriod)
void | Ifx_AngleTrkF32_reset (Ifx_AngleTrkF32 *driver)
boolean | Ifx_AngleTrkF32_stdIfPosInit (IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver)
Initializes the standard interface "Pos". More...

Detailed Description

Angle-tracking observer for sin/cos analog position sensor.

Version
disabled
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_AngleTrkF32.c.

Macro Definition Documentation

◆ ATO_K

#define ATO_K (39.05f)

Definition at line 118 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_init(), and Ifx_AngleTrkF32_initConfig().

◆ ATO_PSI

#define ATO_PSI (1.5f * IFX_PI)

Definition at line 119 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_init(), and Ifx_AngleTrkF32_initConfig().

◆ ATO_T

#define ATO_T (15e-3f)

Definition at line 117 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_init(), and Ifx_AngleTrkF32_initConfig().

◆ IFX_ANGLETRKF32_ATAN2F

#define IFX_ANGLETRKF32_ATAN2F Ifx_LutAtan2F32_float32

Definition at line 54 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_step().

Function Documentation

◆ Ifx_AngleTrkF32_bound()

IFX_INLINE float32 Ifx_AngleTrkF32_bound | ( | float32 | angle,
 |  | float32 | periodPerRotation
 | ) |  |

Definition at line 70 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_boundInput().

◆ Ifx_AngleTrkF32_boundInput()

IFX_INLINE float32 Ifx_AngleTrkF32_boundInput ( float32 input )

Definition at line 90 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_step().

◆ Ifx_AngleTrkF32_setControlGains()

void Ifx_AngleTrkF32_setControlGains | ( | Ifx_AngleTrkF32_CfgData * | cfgData,
 |  | float32 | K,
 |  | float32 | T,
 |  | float32 | psi
 | ) |  |

Definition at line 121 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_init(), and Ifx_AngleTrkF32_initConfig().

◆ Ifx_AngleTrkF32_setUserSampling()

void Ifx_AngleTrkF32_setUserSampling | ( | Ifx_AngleTrkF32 * | aObsv,
 |  | float32 | Ts
 | ) |  |

Definition at line 150 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_init().

◆ Ifx_AngleTrkF32_stdIfPosInit()

boolean Ifx_AngleTrkF32_stdIfPosInit | ( | IfxStdIf_Pos * | stdif,
 |  | Ifx_AngleTrkF32 * | driver
 | ) |  |

Initializes the standard interface "Pos".

Parameters
stdif | Standard interface position object
driver | Virtual position sensor
Returns
TRUE on success else FALSE

Definition at line 427 of file Ifx_AngleTrkF32.c.

◆ round_f()

float32 round_f ( float32 val )

Definition at line 96 of file Ifx_AngleTrkF32.c.


iLLD_TC26B: Ifx_Cf32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_Cf32.c File Reference

Floating point signal, vector, and matrix library. More...

#include "Ifx_Cf32.h"
#include <float.h>
#include <stdio.h>
Include dependency graph for Ifx_Cf32.c:

Go to the source code of this file.

Functions

void | CplxVecRst_f32 (cfloat32 *X, short nX)
void | CplxVecCpy_f32S (cfloat32 *X, short *S, short nS, short incrS)
void | CplxVecCpy_f32 (cfloat32 *X, cfloat32 *S, short nS)
float32 * | CplxVecPwr_f32 (cfloat32 *X, short nX)
float32 * | CplxVecMag_f32 (cfloat32 *X, short nX)
void | CplxVecMul_f32 (cfloat32 *X, const cfloat32 *mul, short nX)
void | VecPwrdB_f32 (float32 *X, short nX)
void | VecPwrdB_SF (sint16 *R, float32 *X, short nX)
float32 | VecMaxIdx_f32 (float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
float32 | VecMinIdx_f32 (float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
void | VecOfs_f32 (float32 *X, float32 offset, short nX)
void | VecGain_f32 (float32 *X, float32 gain, short nX)
float32 | VecSum_f32 (float32 *X, short nX)
float32 | VecAvg_f32 (float32 *X, short nX)
float32 | VecMax_f32 (float32 *X, short nX)
float32 | VecMin_f32 (float32 *X, short nX)
void | VecHalfSwap_f32 (float32 *X, short nX)
void | VecWin_f32 (float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)

Detailed Description

Floating point signal, vector, and matrix library.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Cf32.c.

Function Documentation

◆ CplxVecCpy_f32()

void CplxVecCpy_f32 | ( | cfloat32 * | X,
 |  | cfloat32 * | S,
 |  | short | nS
 | ) |  |

Definition at line 67 of file Ifx_Cf32.c.

◆ CplxVecCpy_f32S()

void CplxVecCpy_f32S | ( | cfloat32 * | X,
 |  | short * | S,
 |  | short | nS,
 |  | short | incrS
 | ) |  |

Definition at line 56 of file Ifx_Cf32.c.

◆ CplxVecMag_f32()

float32* CplxVecMag_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 92 of file Ifx_Cf32.c.

◆ CplxVecMul_f32()

void CplxVecMul_f32 | ( | cfloat32 * | X,
 |  | const cfloat32 * | mul,
 |  | short | nX
 | ) |  |

Definition at line 107 of file Ifx_Cf32.c.

◆ CplxVecPwr_f32()

float32* CplxVecPwr_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 77 of file Ifx_Cf32.c.

◆ CplxVecRst_f32()

void CplxVecRst_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 46 of file Ifx_Cf32.c.

◆ VecAvg_f32()

float32 VecAvg_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 230 of file Ifx_Cf32.c.

◆ VecGain_f32()

void VecGain_f32 | ( | float32 * | X,
 |  | float32 | gain,
 |  | short | nX
 | ) |  |

Definition at line 203 of file Ifx_Cf32.c.

◆ VecHalfSwap_f32()

void VecHalfSwap_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 266 of file Ifx_Cf32.c.

◆ VecMax_f32()

float32 VecMax_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 236 of file Ifx_Cf32.c.

◆ VecMaxIdx_f32()

float32 VecMaxIdx_f32 | ( | float32 * | X,
 |  | short | nX,
 |  | sint16 * | minIdx,
 |  | sint16 * | maxIdx
 | ) |  |

Definition at line 141 of file Ifx_Cf32.c.

◆ VecMin_f32()

float32 VecMin_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 251 of file Ifx_Cf32.c.

◆ VecMinIdx_f32()

float32 VecMinIdx_f32 | ( | float32 * | X,
 |  | short | nX,
 |  | sint16 * | minIdx,
 |  | sint16 * | maxIdx
 | ) |  |

Definition at line 166 of file Ifx_Cf32.c.

◆ VecOfs_f32()

void VecOfs_f32 | ( | float32 * | X,
 |  | float32 | offset,
 |  | short | nX
 | ) |  |

Definition at line 191 of file Ifx_Cf32.c.

◆ VecPwrdB_f32()

void VecPwrdB_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 117 of file Ifx_Cf32.c.

◆ VecPwrdB_SF()

void VecPwrdB_SF | ( | sint16 * | R,
 |  | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 129 of file Ifx_Cf32.c.

◆ VecSum_f32()

float32 VecSum_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 215 of file Ifx_Cf32.c.

Referenced by VecAvg_f32().

◆ VecWin_f32()

void VecWin_f32 | ( | float32 * | X,
 |  | const float32 * | W,
 |  | short | nX,
 |  | short | nW,
 |  | short | incrX,
 |  | short | symW
 | ) |  |

Definition at line 285 of file Ifx_Cf32.c.

Referenced by Ifx_WndF32_apply().


iLLD_TC26B: Ifx_Cf32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Functions
Ifx_Cf32.h File Reference

Floating point signal, vector, and matrix library. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include <math.h>
Include dependency graph for Ifx_Cf32.h:

Go to the source code of this file.

Macros

#define | _DATAF(val) ((float32)(val))
#define | Cplx_f32_printf(...)

Functions

IFX_INLINE cfloat32 | IFX_Cf32_exp (const cfloat32 *c)
IFX_INLINE cfloat32 | IFX_Cf32_mul (const cfloat32 *a, const cfloat32 *b)
IFX_INLINE cfloat32 | IFX_Cf32_amp (const cfloat32 *a, float32 gain)
IFX_INLINE float32 | IFX_Cf32_dot (const cfloat32 *b)
IFX_INLINE float32 | IFX_Cf32_mag (const cfloat32 *c)
IFX_INLINE cfloat32 | IFX_Cf32_div (const cfloat32 *a, const cfloat32 *b)
IFX_INLINE cfloat32 | IFX_Cf32_add (const cfloat32 *a, const cfloat32 *b)
IFX_INLINE cfloat32 | IFX_Cf32_sub (const cfloat32 *a, const cfloat32 *b)
IFX_INLINE void | IFX_Cf32_set (cfloat32 *a, float32 re, float32 im)
IFX_INLINE void | IFX_Cf32_reset (cfloat32 *a)
IFX_INLINE cfloat32 | IFX_Cf32_saturate (cfloat32 *a, float32 *ampl, float32 limit)
IFX_EXTERN void | CplxVecCpy_f32S (cfloat32 *X, short *S, short nS, short incrS)
IFX_EXTERN void | CplxVecRst_f32 (cfloat32 *X, short nX)
IFX_EXTERN void | CplxVecCpy_f32 (cfloat32 *X, cfloat32 *S, short nS)
IFX_EXTERN float32 * | CplxVecPwr_f32 (cfloat32 *X, short nX)
IFX_EXTERN float32 * | CplxVecMag_f32 (cfloat32 *X, short nX)
IFX_EXTERN void | CplxVecMul_f32 (cfloat32 *X, const cfloat32 *mul, short nX)
IFX_EXTERN void | VecWin_f32 (float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)
IFX_EXTERN void | VecPwrdB_f32 (float32 *X, short nX)
IFX_EXTERN void | VecPwrdB_SF (sint16 *R, float32 *X, short nX)
IFX_EXTERN void | VecGain_f32 (float32 *X, float32 gain, short nX)
IFX_EXTERN void | VecOfs_f32 (float32 *X, float32 offset, short nX)
IFX_EXTERN float32 | VecSum_f32 (float32 *X, short nX)
IFX_EXTERN float32 | VecAvg_f32 (float32 *X, short nX)
IFX_EXTERN float32 | VecMax_f32 (float32 *X, short nX)
IFX_EXTERN float32 | VecMin_f32 (float32 *X, short nX)
IFX_EXTERN float32 | VecMinIdx_f32 (float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
IFX_EXTERN float32 | VecMaxIdx_f32 (float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
IFX_EXTERN void | VecHalfSwap_f32 (float32 *X, short nX)

Detailed Description

Floating point signal, vector, and matrix library.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Cf32.h.

Macro Definition Documentation

◆ _DATAF

#define _DATAF ( val ) ((float32)(val))

Definition at line 51 of file Ifx_Cf32.h.

◆ Cplx_f32_printf

#define Cplx_f32_printf ( ... )

Definition at line 178 of file Ifx_Cf32.h.

Function Documentation

◆ CplxVecCpy_f32()

IFX_EXTERN void CplxVecCpy_f32 | ( | cfloat32 * | X,
 |  | cfloat32 * | S,
 |  | short | nS
 | ) |  |

Definition at line 67 of file Ifx_Cf32.c.

◆ CplxVecCpy_f32S()

IFX_EXTERN void CplxVecCpy_f32S | ( | cfloat32 * | X,
 |  | short * | S,
 |  | short | nS,
 |  | short | incrS
 | ) |  |

Definition at line 56 of file Ifx_Cf32.c.

◆ CplxVecMag_f32()

IFX_EXTERN float32* CplxVecMag_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 92 of file Ifx_Cf32.c.

◆ CplxVecMul_f32()

IFX_EXTERN void CplxVecMul_f32 | ( | cfloat32 * | X,
 |  | const cfloat32 * | mul,
 |  | short | nX
 | ) |  |

Definition at line 107 of file Ifx_Cf32.c.

◆ CplxVecPwr_f32()

IFX_EXTERN float32* CplxVecPwr_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 77 of file Ifx_Cf32.c.

◆ CplxVecRst_f32()

IFX_EXTERN void CplxVecRst_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 46 of file Ifx_Cf32.c.

◆ IFX_Cf32_add()

IFX_INLINE cfloat32 IFX_Cf32_add | ( | const cfloat32 * | a,
 |  | const cfloat32 * | b
 | ) |  |

Definition at line 104 of file Ifx_Cf32.h.

Referenced by Ifx_FftF32_radix2DecimationInTime().

◆ IFX_Cf32_amp()

IFX_INLINE cfloat32 IFX_Cf32_amp | ( | const cfloat32 * | a,
 |  | float32 | gain
 | ) |  |

Definition at line 73 of file Ifx_Cf32.h.

◆ IFX_Cf32_div()

IFX_INLINE cfloat32 IFX_Cf32_div | ( | const cfloat32 * | a,
 |  | const cfloat32 * | b
 | ) |  |

Definition at line 94 of file Ifx_Cf32.h.

◆ IFX_Cf32_dot()

IFX_INLINE float32 IFX_Cf32_dot ( const cfloat32 * b )

Definition at line 82 of file Ifx_Cf32.h.

Referenced by CplxVecPwr_f32(), IFX_Cf32_div(), and IFX_Cf32_mag().

◆ IFX_Cf32_exp()

IFX_INLINE cfloat32 IFX_Cf32_exp ( const cfloat32 * c )

Definition at line 54 of file Ifx_Cf32.h.

◆ IFX_Cf32_mag()

IFX_INLINE float32 IFX_Cf32_mag ( const cfloat32 * c )

Definition at line 88 of file Ifx_Cf32.h.

Referenced by CplxVecMag_f32(), and IFX_Cf32_saturate().

◆ IFX_Cf32_mul()

IFX_INLINE cfloat32 IFX_Cf32_mul | ( | const cfloat32 * | a,
 |  | const cfloat32 * | b
 | ) |  |

Definition at line 64 of file Ifx_Cf32.h.

Referenced by CplxVecMul_f32(), and Ifx_FftF32_radix2DecimationInTime().

◆ IFX_Cf32_reset()

IFX_INLINE void IFX_Cf32_reset ( cfloat32 * a )

Definition at line 129 of file Ifx_Cf32.h.

◆ IFX_Cf32_saturate()

IFX_INLINE cfloat32 IFX_Cf32_saturate | ( | cfloat32 * | a,
 |  | float32 * | ampl,
 |  | float32 | limit
 | ) |  |

Definition at line 135 of file Ifx_Cf32.h.

◆ IFX_Cf32_set()

IFX_INLINE void IFX_Cf32_set | ( | cfloat32 * | a,
 |  | float32 | re,
 |  | float32 | im
 | ) |  |

Definition at line 122 of file Ifx_Cf32.h.

Referenced by IFX_Cf32_reset().

◆ IFX_Cf32_sub()

IFX_INLINE cfloat32 IFX_Cf32_sub | ( | const cfloat32 * | a,
 |  | const cfloat32 * | b
 | ) |  |

Definition at line 113 of file Ifx_Cf32.h.

Referenced by Ifx_FftF32_radix2DecimationInTime().

◆ VecAvg_f32()

IFX_EXTERN float32 VecAvg_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 230 of file Ifx_Cf32.c.

◆ VecGain_f32()

IFX_EXTERN void VecGain_f32 | ( | float32 * | X,
 |  | float32 | gain,
 |  | short | nX
 | ) |  |

Definition at line 203 of file Ifx_Cf32.c.

◆ VecHalfSwap_f32()

IFX_EXTERN void VecHalfSwap_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 266 of file Ifx_Cf32.c.

◆ VecMax_f32()

IFX_EXTERN float32 VecMax_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 236 of file Ifx_Cf32.c.

◆ VecMaxIdx_f32()

IFX_EXTERN float32 VecMaxIdx_f32 | ( | float32 * | X,
 |  | short | nX,
 |  | sint16 * | minIdx,
 |  | sint16 * | maxIdx
 | ) |  |

Definition at line 141 of file Ifx_Cf32.c.

◆ VecMin_f32()

IFX_EXTERN float32 VecMin_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 251 of file Ifx_Cf32.c.

◆ VecMinIdx_f32()

IFX_EXTERN float32 VecMinIdx_f32 | ( | float32 * | X,
 |  | short | nX,
 |  | sint16 * | minIdx,
 |  | sint16 * | maxIdx
 | ) |  |

Definition at line 166 of file Ifx_Cf32.c.

◆ VecOfs_f32()

IFX_EXTERN void VecOfs_f32 | ( | float32 * | X,
 |  | float32 | offset,
 |  | short | nX
 | ) |  |

Definition at line 191 of file Ifx_Cf32.c.

◆ VecPwrdB_f32()

IFX_EXTERN void VecPwrdB_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 117 of file Ifx_Cf32.c.

◆ VecPwrdB_SF()

IFX_EXTERN void VecPwrdB_SF | ( | sint16 * | R,
 |  | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 129 of file Ifx_Cf32.c.

◆ VecSum_f32()

IFX_EXTERN float32 VecSum_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 215 of file Ifx_Cf32.c.

Referenced by VecAvg_f32().

◆ VecWin_f32()

IFX_EXTERN void VecWin_f32 | ( | float32 * | X,
 |  | const float32 * | W,
 |  | short | nX,
 |  | short | nW,
 |  | short | incrX,
 |  | short | symW
 | ) |  |

Definition at line 285 of file Ifx_Cf32.c.

Referenced by Ifx_WndF32_apply().


iLLD_TC26B: Ifx_CircularBuffer.asm.c File Reference

  • _Lib
  • DataHandling
Ifx_CircularBuffer.asm.c File Reference

Circular buffer functions (assembler implementation). More...

#include "Ifx_CircularBuffer.h"
Include dependency graph for Ifx_CircularBuffer.asm.c:

Go to the source code of this file.

Detailed Description

Circular buffer functions (assembler implementation).

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_CircularBuffer.asm.c.


iLLD_TC26B: Ifx_CircularBuffer.c File Reference

  • _Lib
  • DataHandling
Functions
Ifx_CircularBuffer.c File Reference

Circular buffer functions in C language. More...

#include "Ifx_CircularBuffer.h"
Include dependency graph for Ifx_CircularBuffer.c:

Go to the source code of this file.

Functions

uint32 | Ifx_CircularBuffer_get32 (Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer. More...
uint16 | Ifx_CircularBuffer_get16 (Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer. More...
void | Ifx_CircularBuffer_addDataIncr (Ifx_CircularBuffer *buffer, uint32 data)
Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer. More...
void * | Ifx_CircularBuffer_read8 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array. More...
void * | Ifx_CircularBuffer_read32 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array. More...
const void * | Ifx_CircularBuffer_write8 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer. More...
const void * | Ifx_CircularBuffer_write32 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer. More...

Detailed Description

Circular buffer functions in C language.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_CircularBuffer.c.

Function Documentation

◆ Ifx_CircularBuffer_addDataIncr()

void Ifx_CircularBuffer_addDataIncr | ( | Ifx_CircularBuffer * | buffer,
 |  | uint32 | data
 | ) |  |

Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer.

Parameters
buffer | Specifies circular buffer.
data | Specifies value to be added to the buffer.
Returns
None.

Definition at line 83 of file Ifx_CircularBuffer.c.


iLLD_TC26B: Ifx_CircularBuffer.h File Reference

  • _Lib
  • DataHandling
Macros | Functions
Ifx_CircularBuffer.h File Reference

Circular buffer functions. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_CircularBuffer.h:

Go to the source code of this file.

Macros

#define IFX_CFG_CIRCULARBUFFER_C (1)

Functions

uint16 | Ifx_CircularBuffer_get16 (Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer. More...
uint32 | Ifx_CircularBuffer_get32 (Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer. More...
void * | Ifx_CircularBuffer_read8 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array. More...
void * | Ifx_CircularBuffer_read32 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array. More...
const void * | Ifx_CircularBuffer_write8 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer. More...
const void * | Ifx_CircularBuffer_write32 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer. More...

Detailed Description

Circular buffer functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_CircularBuffer.h.

Macro Definition Documentation

◆ IFX_CFG_CIRCULARBUFFER_C

#define IFX_CFG_CIRCULARBUFFER_C (1)

Definition at line 54 of file Ifx_CircularBuffer.h.


iLLD_TC26B: Ifx_Console.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Functions | Variables
Ifx_Console.c File Reference

Main Ifx_Console module implementation file. More...

#include <string.h>
#include <stdio.h>
#include <stdarg.h>
#include "Ifx_Console.h"
#include "_Utilities/Ifx_Assert.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_Console.c:

Go to the source code of this file.

Functions

void | Ifx_Console_init (IfxStdIf_DPipe *standardIo)
Initialize the Ifx_g_console object. More...
boolean | Ifx_Console_print (pchar format,...)
Print formatted string into Ifx_g_console. More...
boolean | Ifx_Console_printAlign (pchar format,...)
Print formatted string into Ifx_g_console. Indented with a number of spaces. More...

Variables

Ifx_Console Ifx_g_console

Detailed Description

Main Ifx_Console module implementation file.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-03-13 15:49:47 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Console.c.

Variable Documentation

◆ Ifx_g_console

Ifx_Console Ifx_g_console

Definition at line 50 of file Ifx_Console.c.

Referenced by Ifx_Console_init(), Ifx_Console_print(), and Ifx_Console_printAlign().


iLLD_TC26B: Ifx_Crc.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_Crc.c File Reference

CRC algorithm. More...

#include "Ifx_Crc.h"
Include dependency graph for Ifx_Crc.c:

Go to the source code of this file.

Functions

uint32 | Ifx_Crc_reflect (uint32 crc, sint32 bitnum)
boolean | Ifx_Crc_init (Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
boolean | Ifx_Crc_createTable (Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
uint32 | Ifx_Crc_tableFast (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_table (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBit (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBitFast (Ifc_Crc *driver, uint8 *p, uint32 len)

Detailed Description

CRC algorithm.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Crc.c.

Function Documentation

◆ Ifx_Crc_reflect()

uint32 Ifx_Crc_reflect | ( | uint32 | crc,
 |  | sint32 | bitnum
 | ) |  |

Definition at line 201 of file Ifx_Crc.c.

Referenced by Ifx_Crc_bitByBit(), Ifx_Crc_bitByBitFast(), Ifx_Crc_createTable(), Ifx_Crc_table(), and Ifx_Crc_tableFast().


iLLD_TC26B: Ifx_DateTime.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Time
Functions | Variables
Ifx_DateTime.c File Reference

Date and time functions. More...

#include "Ifx_DateTime.h"
#include "SysSe/Bsp/Bsp.h"
Include dependency graph for Ifx_DateTime.c:

Go to the source code of this file.

Functions

void | DateTime_get (Ifx_DateTime *dt)
Get the real time Note that this function is valid only if DateTime_set() has been called. More...
void | DateTime_set (Ifx_DateTime *dt)
Set the real time. More...

Variables

sint32 g_DateTimeOffset

Detailed Description

Date and time functions.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:37 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_DateTime.c.

Variable Documentation

◆ g_DateTimeOffset

sint32 g_DateTimeOffset

Definition at line 46 of file Ifx_DateTime.c.

Referenced by DateTime_get(), and DateTime_set().


iLLD_TC26B: Ifx_FftF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_FftF32.c File Reference

Floating-point Fast Fourier Transform. More...

#include "Ifx_FftF32.h"
#include <math.h>
Include dependency graph for Ifx_FftF32.c:

Go to the source code of this file.

Functions

cfloat32 * | Ifx_FftF32_generateTwiddleFactor (cfloat32 *TF, short nX)
Twiddle factor generator. More...
unsigned short | Ifx_FftF32_reverseBits (unsigned short n, unsigned bits)
Calculate the bit-reversed <n> with <bits> as number of bits. More...
void | Ifx_FftF32_radix2DecimationInTime (cfloat32 *R, unsigned long p)
cfloat32 * | Ifx_FftF32_radix2 (cfloat32 *R, const cfloat32 *X, unsigned short nX)
Radix-2 Fast-Fourier Transform. More...
cfloat32 * | Ifx_FftF32_radix2I (cfloat32 *R, const cfloat32 *X, unsigned short nX)
Radix-2 Inverse Fast-Fourier Transform. More...

Detailed Description

Floating-point Fast Fourier Transform.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_FftF32.c.

Function Documentation

◆ Ifx_FftF32_radix2DecimationInTime()

void Ifx_FftF32_radix2DecimationInTime | ( | cfloat32 * | R,
 |  | unsigned long | p
 | ) |  |

Definition at line 91 of file Ifx_FftF32.c.

Referenced by Ifx_FftF32_radix2(), and Ifx_FftF32_radix2I().


iLLD_TC26B: Ifx_FftF32_BitReverseTable.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_FftF32_BitReverseTable.c File Reference

Bit-reversal lookup for Floating-point Fast Fourier Transform. More...

#include "Ifx_FftF32.h"
Include dependency graph for Ifx_FftF32_BitReverseTable.c:

Go to the source code of this file.

Variables

CONST_CFG unsigned short Ifx_g_FftF32_bitReverseTable [IFX_FFTF32_MAX_LENGTH]

Detailed Description

Bit-reversal lookup for Floating-point Fast Fourier Transform.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_FftF32_BitReverseTable.c.

Variable Documentation

◆ Ifx_g_FftF32_bitReverseTable

CONST_CFG unsigned short Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH]

Definition at line 46 of file Ifx_FftF32_BitReverseTable.c.


iLLD_TC26B: Ifx_FftF32_TwiddleTable.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_FftF32_TwiddleTable.c File Reference

Floating-point Fast Fourier Transform Twiddle-Factors. More...

#include "Ifx_FftF32.h"
Include dependency graph for Ifx_FftF32_TwiddleTable.c:

Go to the source code of this file.

Variables

IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable [IFX_FFTF32_MAX_LENGTH/2]

Detailed Description

Floating-point Fast Fourier Transform Twiddle-Factors.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_FftF32_TwiddleTable.c.

Variable Documentation

◆ Ifx_g_FftF32_twiddleTable

IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH/2]

Definition at line 46 of file Ifx_FftF32_TwiddleTable.c.


iLLD_TC26B: Ifx_Fifo.c File Reference

  • _Lib
  • DataHandling
Functions
Ifx_Fifo.c File Reference

FIFO functions. More...

#include "Ifx_Fifo.h"
#include <stdlib.h>
#include "Ifx_CircularBuffer.h"
#include "_Utilities/Ifx_Assert.h"
#include "Cpu/Std/IfxCpu.h"
#include "Stm/Std/IfxStm.h"
Include dependency graph for Ifx_Fifo.c:

Go to the source code of this file.

Functions

Ifx_Fifo * | Ifx_Fifo_create (Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object. More...
void | Ifx_Fifo_destroy (Ifx_Fifo *fifo)
Destroy the FIFO object. More...
Ifx_Fifo * | Ifx_Fifo_init (void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object. More...
boolean | Ifx_Fifo_canReadCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer. More...
Ifx_SizeT | Ifx_Fifo_read (Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer. More...
void | Ifx_Fifo_clear (Ifx_Fifo *fifo)
Clear fifo contents. More...
boolean | Ifx_Fifo_canWriteCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
Ifx_SizeT | Ifx_Fifo_write (Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo. More...

Detailed Description

FIFO functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Fifo.c.


iLLD_TC26B: Ifx_IntegralF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_IntegralF32.c File Reference

Discrete integral approximation. More...

#include "Ifx_IntegralF32.h"
Include dependency graph for Ifx_IntegralF32.c:

Go to the source code of this file.

Functions

void | Ifx_IntegralF32_reset (Ifx_IntegralF32 *ci)
Reset the integrator object. More...
void | Ifx_IntegralF32_init (Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
float32 | Ifx_IntegralF32_step (Ifx_IntegralF32 *ci, float32 ik)
Step function of the integrator object. More...
void | Ifx_ClpxFloat32_Integral_reset (Ifx_ClpxFloat32_Integral *ci)
Reset the integrator object. More...
void | Ifx_ClpxFloat32_Integral_init (Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
cfloat32 | Ifx_ClpxFloat32_Integral_step (Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
Step function of the integrator object. More...

Detailed Description

Discrete integral approximation.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_IntegralF32.c.


iLLD_TC26B: Ifx_InternalMux.c File Reference

  • _Lib
  • InternalMux
Functions
Ifx_InternalMux.c File Reference

Mux configuration functions. More...

#include "Ifx_InternalMux.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_InternalMux.c:

Go to the source code of this file.

Functions

void Ifx_InternalMux_init (const Ifx_InternalMux_Config *cfg)
Initialises the internal mux configuration. More...

Detailed Description

Mux configuration functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_InternalMux.c.


iLLD_TC26B: Ifx_InternalMux.h File Reference

  • _Lib
  • InternalMux
Data Structures | Functions
Ifx_InternalMux.h File Reference

Mux configuration functions. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_InternalMux.h:

Go to the source code of this file.

Data Structures

struct | Ifx_InternalMux_MuxConfig
struct | Ifx_InternalMux_Config

Functions

IFX_EXTERN void Ifx_InternalMux_init (const Ifx_InternalMux_Config *cfg)
Initialises the internal mux configuration. More...

Detailed Description

Mux configuration functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2015 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_InternalMux.h.


iLLD_TC26B: Ifx_LowPassPt1F32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_LowPassPt1F32.c File Reference

Low pass filter PT1. More...

#include "SysSe/Math/Ifx_LowPassPt1F32.h"
Include dependency graph for Ifx_LowPassPt1F32.c:

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Functions

void | Ifx_LowPassPt1F32_init (Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration. More...
float32 | Ifx_LowPassPt1F32_do (Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter. More...

Detailed Description

Low pass filter PT1.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LowPassPt1F32.c.


iLLD_TC26B: Ifx_Lut.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Typedefs
Ifx_Lut.h File Reference

Lookup defintion with fixed-point angle data type. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_Lut.h:

Go to the source code of this file.

Macros

#define | IFX_LUT_TABLE_CONST (1)
0 = Lookup tables are generated and stored in RAM, 1 = Lookup tables are precompiled and stored in FLASH More...
#define | IFX_LUT_TABLE const
Lookup table type modifier (stored in ROM) More...
#define | IFX_LUT_ANGLE_BITS (12)
Define the resolution (in bits) of cosinus and sinus table. More...
#define | IFX_LUT_ANGLE_RESOLUTION (1 << IFX_LUT_ANGLE_BITS)
Define the cosinus and sinus table size. More...
#define | IFX_LUT_ANGLE_PI (IFX_LUT_ANGLE_RESOLUTION / 2)
Value used as 180 degree angle. More...
#define | IFX_LUT_F32_TO_FXPANGLE(f) ((Ifx_Lut_FxpAngle)(f / IFX_PI * IFX_LUT_ANGLE_PI))
Convert from float32 angle in radian into fixed-point angle type. More...
#define | IFX_LUT_FXPANGLE_TO_F32(fx) ((float32)fx * IFX_PI / IFX_LUT_ANGLE_PI)
Convert from fixed-point angle type to float32 angle in radian. More...

Typedefs

typedef sint32 Ifx_Lut_FxpAngle
Fixed-point angle type. More...

Detailed Description

Lookup defintion with fixed-point angle data type.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Lut.h.

Macro Definition Documentation

◆ IFX_LUT_ANGLE_PI

#define IFX_LUT_ANGLE_PI (IFX_LUT_ANGLE_RESOLUTION / 2)

Value used as 180 degree angle.

Definition at line 75 of file Ifx_Lut.h.

Referenced by Ifx_LutAtan2F32_fxpAngle(), Ifx_LutLSincosF32_cos(), Ifx_LutLSincosF32_cossin(), Ifx_LutSincosF32_cos(), Ifx_LutSincosF32_cossin(), Ifx_LutSincosF32_init(), and Ifx_LutSincosF32_sin().

◆ IFX_LUT_F32_TO_FXPANGLE

#define IFX_LUT_F32_TO_FXPANGLE ( f ) ((Ifx_Lut_FxpAngle)(f / IFX_PI * IFX_LUT_ANGLE_PI))

Convert from float32 angle in radian into fixed-point angle type.

Definition at line 84 of file Ifx_Lut.h.

Referenced by Ifx_LutAtan2F32_init().

◆ IFX_LUT_FXPANGLE_TO_F32

#define IFX_LUT_FXPANGLE_TO_F32 ( fx ) ((float32)fx * IFX_PI / IFX_LUT_ANGLE_PI)

Convert from fixed-point angle type to float32 angle in radian.

Definition at line 87 of file Ifx_Lut.h.

◆ IFX_LUT_TABLE

#define IFX_LUT_TABLE const

Lookup table type modifier (stored in ROM)

Definition at line 62 of file Ifx_Lut.h.

◆ IFX_LUT_TABLE_CONST

#define IFX_LUT_TABLE_CONST (1)

0 = Lookup tables are generated and stored in RAM, 1 = Lookup tables are precompiled and stored in FLASH

Definition at line 57 of file Ifx_Lut.h.

Typedef Documentation

◆ Ifx_Lut_FxpAngle

typedef sint32 Ifx_Lut_FxpAngle

Fixed-point angle type.

Resolution is defined by IFX_LUT_ANGLE_RESOLUTION

Definition at line 81 of file Ifx_Lut.h.


iLLD_TC26B: Ifx_LutAtan2F32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_LutAtan2F32.c File Reference

ATAN2 lookup functions with fixed-point angle data type. More...

#include "Ifx_LutAtan2F32.h"
#include <math.h>
Include dependency graph for Ifx_LutAtan2F32.c:

Go to the source code of this file.

Functions

void | Ifx_LutAtan2F32_init (void)
Initialise the lookup tables. More...
IFX_INLINE Ifx_Lut_FxpAngle | Ifx_LutAtan2F32_fxpAnglePrivate (float32 valf)
IFX_INLINE float32 | Ifx_LutAtan2F32_float32Private (float32 val)
Ifx_Lut_FxpAngle | Ifx_LutAtan2F32_fxpAngle (float32 x, float32 y)
Look-up arcus tangent value of y/x. More...
float32 | Ifx_LutAtan2F32_float32 (float32 y, float32 x)

Detailed Description

ATAN2 lookup functions with fixed-point angle data type.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutAtan2F32.c.

Function Documentation

◆ Ifx_LutAtan2F32_float32()

float32 Ifx_LutAtan2F32_float32 | ( | float32 | y,
 |  | float32 | x
 | ) |  |

Definition at line 145 of file Ifx_LutAtan2F32.c.

◆ Ifx_LutAtan2F32_float32Private()

IFX_INLINE float32 Ifx_LutAtan2F32_float32Private ( float32 val )

Definition at line 78 of file Ifx_LutAtan2F32.c.

Referenced by Ifx_LutAtan2F32_float32().

◆ Ifx_LutAtan2F32_fxpAnglePrivate()

IFX_INLINE Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAnglePrivate ( float32 valf )

Definition at line 63 of file Ifx_LutAtan2F32.c.

Referenced by Ifx_LutAtan2F32_fxpAngle().


iLLD_TC26B: Ifx_LutAtan2F32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Functions | Variables
Ifx_LutAtan2F32.h File Reference

Floating point signal, vector, and matrix library. More...

#include "Ifx_Lut.h"
Include dependency graph for Ifx_LutAtan2F32.h:

Go to the source code of this file.

Macros

#define IFX_LUTATAN2F32_SIZE (1024)
size of Ifx_LutAtan2F32 table More...

Functions

IFX_EXTERN void | Ifx_LutAtan2F32_init (void)
Initialise the lookup tables. More...
IFX_EXTERN Ifx_Lut_FxpAngle | Ifx_LutAtan2F32_fxpAngle (float32 x, float32 y)
Look-up arcus tangent value of y/x. More...
IFX_EXTERN float32 | Ifx_LutAtan2F32_float32 (float32 y, float32 x)

Variables

IFX_EXTERN IFX_LUT_TABLE Ifx_Lut_FxpAngle | Ifx_g_LutAtan2F32_FxpAngle_table [IFX_LUTATAN2F32_SIZE+1]
Table I for Ifx_LutAtan2F32_fxpAngle() More...
IFX_EXTERN IFX_LUT_TABLE float32 | Ifx_g_LutAtan2F32_table [IFX_LUTATAN2F32_SIZE+1]

Detailed Description

Floating point signal, vector, and matrix library.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutAtan2F32.h.

Macro Definition Documentation

◆ IFX_LUTATAN2F32_SIZE

#define IFX_LUTATAN2F32_SIZE (1024)

size of Ifx_LutAtan2F32 table

Definition at line 52 of file Ifx_LutAtan2F32.h.

Referenced by Ifx_LutAtan2F32_float32Private(), Ifx_LutAtan2F32_fxpAnglePrivate(), and Ifx_LutAtan2F32_init().

Function Documentation

◆ Ifx_LutAtan2F32_float32()

IFX_EXTERN float32 Ifx_LutAtan2F32_float32 | ( | float32 | y,
 |  | float32 | x
 | ) |  |

Definition at line 145 of file Ifx_LutAtan2F32.c.

Variable Documentation

◆ Ifx_g_LutAtan2F32_FxpAngle_table

IFX_EXTERN IFX_LUT_TABLE Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[IFX_LUTATAN2F32_SIZE+1]

Table I for Ifx_LutAtan2F32_fxpAngle()

Definition at line 57 of file Ifx_LutAtan2F32.h.

Referenced by Ifx_LutAtan2F32_fxpAnglePrivate(), and Ifx_LutAtan2F32_init().

◆ Ifx_g_LutAtan2F32_table

IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE+1]

Definition at line 58 of file Ifx_LutAtan2F32.h.

Referenced by Ifx_LutAtan2F32_float32Private().


iLLD_TC26B: Ifx_LutAtan2F32_Table.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_LutAtan2F32_Table.c File Reference

Table data for ATAN2 lookup functions. More...

#include "Ifx_LutAtan2F32.h"
Include dependency graph for Ifx_LutAtan2F32_Table.c:

Go to the source code of this file.

Variables

const Ifx_Lut_FxpAngle | Ifx_g_LutAtan2F32_FxpAngle_table [1024+1]
const float32 | Ifx_g_LutAtan2F32_table [IFX_LUTATAN2F32_SIZE+1]

Detailed Description

Table data for ATAN2 lookup functions.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutAtan2F32_Table.c.

Variable Documentation

◆ Ifx_g_LutAtan2F32_FxpAngle_table

const Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[1024+1]

Definition at line 54 of file Ifx_LutAtan2F32_Table.c.

◆ Ifx_g_LutAtan2F32_table

const float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE+1]

Definition at line 1083 of file Ifx_LutAtan2F32_Table.c.


iLLD_TC26B: Ifx_LutLinearF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_LutLinearF32.c File Reference

Linear look-up function. More...

#include "Ifx_LutLinearF32.h"
Include dependency graph for Ifx_LutLinearF32.c:

Go to the source code of this file.

Functions

float32 Ifx_LutLinearF32_searchBin (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with binary search implementation. More...

Detailed Description

Linear look-up function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutLinearF32.c.


iLLD_TC26B: Ifx_LutLSincosF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Variables
Ifx_LutLSincosF32.c File Reference

Table data for linear interpolation Sin/Cos lookup functions. More...

#include "Ifx_Lut.h"
#include "Ifx_LutIndexedLinearF32.h"
Include dependency graph for Ifx_LutLSincosF32.c:

Go to the source code of this file.

Macros

#define IFX_F32_LUTL_SINCOS_ELEMENT_COUNT (128)

Variables

const Ifx_LutIndexedLinearF32_Item | Ifx_g_LutLSincosF32_table [128]
const Ifx_LutIndexedLinearF32 | Ifx_g_LutLSincosF32

Detailed Description

Table data for linear interpolation Sin/Cos lookup functions.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Revision
614
Date
2013-03-04 14:09:48 +0100 (Mon, 04 Mar 2013)

Definition in file Ifx_LutLSincosF32.c.

Macro Definition Documentation

◆ IFX_F32_LUTL_SINCOS_ELEMENT_COUNT

#define IFX_F32_LUTL_SINCOS_ELEMENT_COUNT (128)

Definition at line 60 of file Ifx_LutLSincosF32.c.

Variable Documentation

◆ Ifx_g_LutLSincosF32

const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32
Initial value:
= {
.segmentCount = IFX_F32_LUTL_SINCOS_ELEMENT_COUNT,
.shift = 5,
.segments = Ifx_g_LutLSincosF32_table
}
Ifx_g_LutLSincosF32_table
const Ifx_LutIndexedLinearF32_Item Ifx_g_LutLSincosF32_table[128]
Definition: Ifx_LutLSincosF32.c:62
IFX_F32_LUTL_SINCOS_ELEMENT_COUNT
#define IFX_F32_LUTL_SINCOS_ELEMENT_COUNT
Definition: Ifx_LutLSincosF32.c:60

Definition at line 193 of file Ifx_LutLSincosF32.c.

◆ Ifx_g_LutLSincosF32_table

const Ifx_LutIndexedLinearF32_Item Ifx_g_LutLSincosF32_table[128]

Definition at line 62 of file Ifx_LutLSincosF32.c.


iLLD_TC26B: Ifx_LutSincosF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_LutSincosF32.c File Reference

Sin/Cos lookup functions with fixed-point angle data type. More...

#include "Ifx_LutSincosF32.h"
#include <math.h>
Include dependency graph for Ifx_LutSincosF32.c:

Go to the source code of this file.

Functions

void | Ifx_LutSincosF32_init (void)
Initialise the lookup tables. More...
float32 | Ifx_LutSincosF32_sin (Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function. More...

Detailed Description

Sin/Cos lookup functions with fixed-point angle data type.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_LutSincosF32.c.


iLLD_TC26B: Ifx_LutSincosF32_Table.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_LutSincosF32_Table.c File Reference

Table data for Sin/Cos lookup functions. More...

#include "Ifx_Lut.h"
Include dependency graph for Ifx_LutSincosF32_Table.c:

Go to the source code of this file.

Variables

const float32 Ifx_g_LutSincosF32_table [1025]

Detailed Description

Table data for Sin/Cos lookup functions.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Revision
614
Date
2013-03-04 14:09:48 +0100 (Mon, 04 Mar 2013)

Definition in file Ifx_LutSincosF32_Table.c.

Variable Documentation

◆ Ifx_g_LutSincosF32_table

const float32 Ifx_g_LutSincosF32_table[1025]

Definition at line 58 of file Ifx_LutSincosF32_Table.c.


iLLD_TC26B: Ifx_RampF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_RampF32.c File Reference

Ramp function. More...

#include "SysSe/Math/Ifx_RampF32.h"
Include dependency graph for Ifx_RampF32.c:

Go to the source code of this file.

Functions

float32 Ifx_RampF32_step (Ifx_RampF32 *ramp)
Execute the Ramp function. More...

Detailed Description

Ramp function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_RampF32.c.


iLLD_TC26B: Ifx_Shell.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Macros | Functions | Variables
Ifx_Shell.c File Reference

shell functions. More...

#include "Ifx_Shell.h"
#include "_Utilities/Ifx_Assert.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include <string.h>
#include <stdlib.h>
#include <stdio.h>
Include dependency graph for Ifx_Shell.c:

Go to the source code of this file.

Macros

#define | IFX_SHELL_LLD "%lld "
#define | IFX_SHELL_LLX "%llx "
#define | IFX_SHELL_LLU "%llu "
#define | IFX_SHELL_MAX_MESSAGE_SIZE 255
#define | ISSPACE(c) (((c) == ' ') || ((c) == '\t'))
#define | IFX_SHELL_IF_ECHO(X) {if (shell->control.echo) {X; }}
#define | IFX_SHELL_WRITE_SPACES(X) {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, " "); }}
#define | IFX_SHELL_WRITE_BACKSPACES(X) {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, "\b"); }}

Functions

void | Ifx_Shell_execute (Ifx_Shell *shell, pchar commandLine)
void | Ifx_Shell_cmdEscapeProcess (Ifx_Shell *shell, char EscapeChar1, char EscapeChar2)
const Ifx_Shell_Command * | Ifx_Shell_commandListFind (Ifx_Shell *shell, pchar commandLine, pchar *args, Ifx_Shell_CommandListConst *commandList)
boolean | Ifx_Shell_isEndOfLine (pchar args)
Check whether the args is already at the end. More...
boolean | Ifx_Shell_showHelpSingle (Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
Implementation of Ifx_Shell_Call. Show the help menu from single command list. More...
boolean | Ifx_Shell_showHelpSingleCommand (pchar args, void *shellPtr, IfxStdIf_DPipe *io)
boolean | Ifx_Shell_showHelp (pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Show the help menu and list of commands. More...
boolean | Ifx_Shell_protocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the Shell protocol. More...
boolean | Ifx_Shell_bbProtocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the ShellBb protocol. More...
void | Ifx_Shell_initConfig (Ifx_Shell_Config *config)
boolean | Ifx_Shell_init (Ifx_Shell *shell, const Ifx_Shell_Config *config)
Initialize the shell. More...
void | Ifx_Shell_process (Ifx_Shell *shell)
Process the shell. More...
void | Ifx_Shell_deinit (Ifx_Shell *shell)
Deinitialise the shell. More...
pchar | Ifx_Shell_skipWhitespace (pchar args)
Within the context of Shell.call, skip the whitespaces of the args string. More...
boolean | Ifx_Shell_matchToken (pchar *argsPtr, pchar token)
Match string pointed by the *argsPtr with a given token. More...
boolean | Ifx_Shell_parseToken (pchar *argsPtr, char *tokenBuffer, int bufferLength)
Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token. More...
boolean | Ifx_Shell_parseAddress (pchar *argsPtr, void **address)
Parse an address. More...
boolean | Ifx_Shell_parseSInt32 (pchar *argsPtr, sint32 *value)
Parse a signed 32-bit integer value. More...
boolean | Ifx_Shell_parseUInt32 (pchar *argsPtr, uint32 *value, boolean hex)
Parse an unsigned 32-bit integer value. More...
boolean | Ifx_Shell_parseSInt64 (pchar *argsPtr, sint64 *value)
Parse a signed 64-bit integer value. More...
boolean | Ifx_Shell_parseUInt64 (pchar *argsPtr, uint64 *value, boolean hex)
Parse an unsigned 64-bit integer value. More...
boolean | Ifx_Shell_parseFloat64 (pchar *argsPtr, float64 *value)
Parse a 64-bit (double precision) floating-point value. More...
boolean | Ifx_Shell_parseFloat32 (pchar *argsPtr, float32 *value)
Parse a 32-bit (single precision) floating-point value. More...
const Ifx_Shell_Command * | Ifx_Shell_commandFind (Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
Find command in command List. More...
void | Ifx_Shell_enable (Ifx_Shell *shell)
Clear the receive buffer and enable the shell. More...
void | Ifx_Shell_disable (Ifx_Shell *shell)
Disable the shell. More...
void | Ifx_Shell_printSyntax (const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. print the syntax. More...

Variables

char Ifx_Shell_cmdBuffer [IFX_CFG_SHELL_CMD_LINE_SIZE *IFX_CFG_SHELL_CMD_HISTORY_SIZE]

Detailed Description

shell functions.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_Shell.c.

Macro Definition Documentation

◆ IFX_SHELL_IF_ECHO

#define IFX_SHELL_IF_ECHO ( X ) {if (shell->control.echo) {X; }}

Definition at line 63 of file Ifx_Shell.c.

Referenced by Ifx_Shell_cmdEscapeProcess(), and Ifx_Shell_process().

◆ IFX_SHELL_LLD

#define IFX_SHELL_LLD "%lld "

Definition at line 51 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseSInt64().

◆ IFX_SHELL_LLU

#define IFX_SHELL_LLU "%llu "

Definition at line 53 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseUInt64().

◆ IFX_SHELL_LLX

#define IFX_SHELL_LLX "%llx "

Definition at line 52 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseUInt64().

◆ IFX_SHELL_MAX_MESSAGE_SIZE

#define IFX_SHELL_MAX_MESSAGE_SIZE 255

Definition at line 56 of file Ifx_Shell.c.

◆ IFX_SHELL_WRITE_BACKSPACES

#define IFX_SHELL_WRITE_BACKSPACES ( X ) {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, "\b"); }}

Definition at line 70 of file Ifx_Shell.c.

Referenced by Ifx_Shell_cmdEscapeProcess(), and Ifx_Shell_process().

◆ IFX_SHELL_WRITE_SPACES

#define IFX_SHELL_WRITE_SPACES ( X ) {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, " "); }}

Definition at line 66 of file Ifx_Shell.c.

Referenced by Ifx_Shell_cmdEscapeProcess().

◆ ISSPACE

#define ISSPACE ( c ) (((c) == ' ') || ((c) == '\t'))

Definition at line 60 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseToken(), and Ifx_Shell_skipWhitespace().

Function Documentation

◆ Ifx_Shell_cmdEscapeProcess()

void Ifx_Shell_cmdEscapeProcess | ( | Ifx_Shell * | shell,
 |  | char | EscapeChar1,
 |  | char | EscapeChar2
 | ) |  |

Definition at line 1090 of file Ifx_Shell.c.

Referenced by Ifx_Shell_process().

◆ Ifx_Shell_commandListFind()

const Ifx_Shell_Command * Ifx_Shell_commandListFind | ( | Ifx_Shell * | shell,
 |  | pchar | commandLine,
 |  | pchar * | args,
 |  | Ifx_Shell_CommandListConst * | commandList
 | ) |  |

Definition at line 1000 of file Ifx_Shell.c.

Referenced by Ifx_Shell_execute(), and Ifx_Shell_showHelpSingleCommand().

◆ Ifx_Shell_execute()

void Ifx_Shell_execute | ( | Ifx_Shell * | shell,
 |  | pchar | commandLine
 | ) |  |

Definition at line 1027 of file Ifx_Shell.c.

Referenced by Ifx_Shell_process().

◆ Ifx_Shell_isEndOfLine()

boolean Ifx_Shell_isEndOfLine ( pchar args )

Check whether the args is already at the end.

Parameters
args The argument null-terminated string

Definition at line 86 of file Ifx_Shell.c.

◆ Ifx_Shell_showHelpSingleCommand()

boolean Ifx_Shell_showHelpSingleCommand | ( | pchar | args,
 |  | void * | shellPtr,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Definition at line 197 of file Ifx_Shell.c.

Referenced by Ifx_Shell_showHelp().

Variable Documentation

◆ Ifx_Shell_cmdBuffer

char Ifx_Shell_cmdBuffer[IFX_CFG_SHELL_CMD_LINE_SIZE *IFX_CFG_SHELL_CMD_HISTORY_SIZE]

Definition at line 74 of file Ifx_Shell.c.

Referenced by Ifx_Shell_init().


iLLD_TC26B: Ifx_TypesDcc.h File Reference

  • Cpu
  • Std
Macros | Typedefs
Ifx_TypesDcc.h File Reference

Go to the source code of this file.

Macros

#define FRACT_MAX 0x7fffffff

Typedefs

typedef long | fract
typedef short | sfract
typedef long long | laccum
typedef long | __packb
typedef unsigned long | __upackb
typedef long | __packhw
typedef unsigned long | __upackhw
typedef unsigned long long | circ_t

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_TypesDcc.h.

Macro Definition Documentation

◆ FRACT_MAX

#define FRACT_MAX 0x7fffffff

Definition at line 42 of file Ifx_TypesDcc.h.

Typedef Documentation

◆ __packb

typedef long __packb

Definition at line 47 of file Ifx_TypesDcc.h.

◆ __packhw

typedef long __packhw

Definition at line 49 of file Ifx_TypesDcc.h.

◆ __upackb

typedef unsigned long __upackb

Definition at line 48 of file Ifx_TypesDcc.h.

◆ __upackhw

typedef unsigned long __upackhw

Definition at line 50 of file Ifx_TypesDcc.h.

◆ circ_t

typedef unsigned long long circ_t

Definition at line 52 of file Ifx_TypesDcc.h.

◆ fract

typedef long fract

Definition at line 44 of file Ifx_TypesDcc.h.

◆ laccum

typedef long long laccum

Definition at line 46 of file Ifx_TypesDcc.h.

◆ sfract

typedef short sfract

Definition at line 45 of file Ifx_TypesDcc.h.


iLLD_TC26B: Ifx_TypesGhs.h File Reference

  • Cpu
  • Std
Macros | Typedefs
Ifx_TypesGhs.h File Reference

Go to the source code of this file.

Macros

#define | FRACT_MAX 0x7fffffff
#define | __interrupt(intno)

Typedefs

typedef long | fract
typedef short | sfract
typedef long long | laccum
typedef long | __packb
typedef unsigned long | __upackb
typedef long | __packhw
typedef unsigned long | __upackhw

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_TypesGhs.h.

Macro Definition Documentation

◆ __interrupt

#define __interrupt ( intno )

Definition at line 44 of file Ifx_TypesGhs.h.

◆ FRACT_MAX

#define FRACT_MAX 0x7fffffff

Definition at line 42 of file Ifx_TypesGhs.h.

Typedef Documentation

◆ __packb

typedef long __packb

Definition at line 49 of file Ifx_TypesGhs.h.

◆ __packhw

typedef long __packhw

Definition at line 51 of file Ifx_TypesGhs.h.

◆ __upackb

typedef unsigned long __upackb

Definition at line 50 of file Ifx_TypesGhs.h.

◆ __upackhw

typedef unsigned long __upackhw

Definition at line 52 of file Ifx_TypesGhs.h.

◆ fract

typedef long fract

Definition at line 46 of file Ifx_TypesGhs.h.

◆ laccum

typedef long long laccum

Definition at line 48 of file Ifx_TypesGhs.h.

◆ sfract

typedef short sfract

Definition at line 47 of file Ifx_TypesGhs.h.


iLLD_TC26B: Ifx_TypesGnuc.h File Reference

  • Cpu
  • Std
Macros | Typedefs
Ifx_TypesGnuc.h File Reference
#include <machine/cint.h>
Include dependency graph for Ifx_TypesGnuc.h:

Go to the source code of this file.

Macros

#define | FRACT_MAX 0x7fffffff
#define | __interrupt(intno)

Typedefs

typedef long | fract
typedef short | sfract
typedef long long | laccum
typedef long | __packb
typedef unsigned long | __upackb
typedef long | __packhw
typedef unsigned long | __upackhw

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_TypesGnuc.h.

Macro Definition Documentation

◆ __interrupt

#define __interrupt ( intno )

Definition at line 45 of file Ifx_TypesGnuc.h.

◆ FRACT_MAX

#define FRACT_MAX 0x7fffffff

Definition at line 42 of file Ifx_TypesGnuc.h.

Typedef Documentation

◆ __packb

typedef long __packb

Definition at line 50 of file Ifx_TypesGnuc.h.

◆ __packhw

typedef long __packhw

Definition at line 52 of file Ifx_TypesGnuc.h.

◆ __upackb

typedef unsigned long __upackb

Definition at line 51 of file Ifx_TypesGnuc.h.

◆ __upackhw

typedef unsigned long __upackhw

Definition at line 53 of file Ifx_TypesGnuc.h.

◆ fract

typedef long fract

Definition at line 47 of file Ifx_TypesGnuc.h.

◆ laccum

typedef long long laccum

Definition at line 49 of file Ifx_TypesGnuc.h.

◆ sfract

typedef short sfract

Definition at line 48 of file Ifx_TypesGnuc.h.


iLLD_TC26B: Ifx_TypesTasking.h File Reference

  • Cpu
  • Std
Macros
Ifx_TypesTasking.h File Reference

Go to the source code of this file.

Macros

#define | fract __fract
#define | sfract __sfract
#define | laccum __laccum
#define | __asm__ __asm

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_TypesTasking.h.

Macro Definition Documentation

◆ __asm__

#define __asm__ __asm

Definition at line 45 of file Ifx_TypesTasking.h.

Referenced by Ifx__absb(), Ifx__absdif(), Ifx__absh(), Ifx__abss(), Ifx__abssh(), Ifx__adds(), Ifx__addsu(), Ifx__cacheai(), Ifx__cacheawi(), Ifx__cacheawi_bo_post_inc(), Ifx__cacheiwi(), Ifx__clo(), Ifx__cls(), Ifx__clssf(), Ifx__cmpAndSwap(), Ifx__crc32(), Ifx__debug(), Ifx__disable_and_save(), Ifx__dsync(), Ifx__extr(), Ifx__extractbyte1(), Ifx__extractbyte2(), Ifx__extractbyte3(), Ifx__extractbyte4(), Ifx__extracthw1(), Ifx__extracthw2(), Ifx__extractubyte1(), Ifx__extractubyte2(), Ifx__extractubyte3(), Ifx__extractubyte4(), Ifx__extractuhw1(), Ifx__extractuhw2(), Ifx__extru(), Ifx__fabs(), Ifx__fabsf(), Ifx__fixpoint_to_float32(), Ifx__float_to_fract(), Ifx__fract_to_float(), Ifx__fract_to_sfract(), Ifx__getA11(), Ifx__getbyte1(), Ifx__getbyte2(), Ifx__getbyte3(), Ifx__getbyte4(), Ifx__getDataParamRet(), Ifx__getfract(), Ifx__gethw1(), Ifx__gethw2(), Ifx__getubyte1(), Ifx__getubyte2(), Ifx__getubyte3(), Ifx__getubyte4(), Ifx__getuhw1(), Ifx__getuhw2(), Ifx__initpackb(), Ifx__initpackhw(), Ifx__initupackb(), Ifx__initupackhw(), Ifx__ins(), Ifx__insert(), Ifx__insertbyte1(), Ifx__insertbyte2(), Ifx__insertbyte3(), Ifx__insertbyte4(), Ifx__inserthw1(), Ifx__inserthw2(), Ifx__insertubyte1(), Ifx__insertubyte2(), Ifx__insertubyte3(), Ifx__insertubyte4(), Ifx__insertuhw1(), Ifx__insertuhw2(), Ifx__insn(), Ifx__isync(), Ifx__jump_and_link(), Ifx__jumpBackToLink(), Ifx__ldmst(), Ifx__mac_r_sf(), Ifx__mac_sf(), Ifx__max(), Ifx__maxs(), Ifx__maxu(), Ifx__min(), Ifx__minb(), Ifx__minbu(), Ifx__minh(), Ifx__minhu(), Ifx__mins(), Ifx__minu(), Ifx__moveToAddrParam0(), Ifx__moveToDataParam0(), Ifx__moveToDataParamRet(), Ifx__mulfractfract(), Ifx__mulfractlong(), Ifx__mulsc(), Ifx__nop(), Ifx__nops(), Ifx__parity(), Ifx__popcnt(), Ifx__restore(), Ifx__rol(), Ifx__ror(), Ifx__round16(), Ifx__rslcx(), Ifx__s16_to_sfract(), Ifx__satb(), Ifx__satbu(), Ifx__sath(), Ifx__sathu(), Ifx__setbyte1(), Ifx__setbyte2(), Ifx__setbyte3(), Ifx__setbyte4(), Ifx__sethw1(), Ifx__sethw2(), Ifx__setStackPointer(), Ifx__setubyte1(), Ifx__setubyte2(), Ifx__setubyte3(), Ifx__setubyte4(), Ifx__setuhw1(), Ifx__setuhw2(), Ifx__sfract_to_s16(), Ifx__sfract_to_u16(), Ifx__shaaccum(), Ifx__shafracts(), Ifx__shasfracts(), Ifx__stopPerfCounters(), Ifx__subs(), Ifx__subsu(), Ifx__svlcx(), Ifx__swap(), Ifx__u16_to_sfract(), and IfxCpu_calculateCrc32().

◆ fract

#define fract __fract

Definition at line 42 of file Ifx_TypesTasking.h.

◆ laccum

#define laccum __laccum

Definition at line 44 of file Ifx_TypesTasking.h.

◆ sfract

#define sfract __sfract

Definition at line 43 of file Ifx_TypesTasking.h.


iLLD_TC26B: Ifx_WndF32_BlackmanHarrisTable.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_WndF32_BlackmanHarrisTable.c File Reference

Lookup table for Blackman-Harris window function. More...

#include "Ifx_WndF32.h"
Include dependency graph for Ifx_WndF32_BlackmanHarrisTable.c:

Go to the source code of this file.

Variables

CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable [(IFX_WNDF32_TABLE_LENGTH/2)]

Detailed Description

Lookup table for Blackman-Harris window function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_WndF32_BlackmanHarrisTable.c.

Variable Documentation

◆ Ifx_g_WndF32_blackmanHarrisTable

CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[(IFX_WNDF32_TABLE_LENGTH/2)]

Definition at line 49 of file Ifx_WndF32_BlackmanHarrisTable.c.


iLLD_TC26B: Ifx_WndF32_HannTable.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_WndF32_HannTable.c File Reference

Lookup table for Hann window function. More...

#include "Ifx_WndF32.h"
Include dependency graph for Ifx_WndF32_HannTable.c:

Go to the source code of this file.

Variables

CONST_CFG float32 Ifx_g_WndF32_hannTable [(IFX_WNDF32_TABLE_LENGTH/2)]

Detailed Description

Lookup table for Hann window function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Ifx_WndF32_HannTable.c.

Variable Documentation

◆ Ifx_g_WndF32_hannTable

CONST_CFG float32 Ifx_g_WndF32_hannTable[(IFX_WNDF32_TABLE_LENGTH/2)]

Definition at line 49 of file Ifx_WndF32_HannTable.c.


iLLD_TC26B: IfxAsclin.c File Reference

  • Asclin
  • Std
Functions
IfxAsclin.c File Reference

ASCLIN basic functionality. More...

#include "IfxAsclin.h"
Include dependency graph for IfxAsclin.c:

Go to the source code of this file.

Functions

void | IfxAsclin_disableModule (Ifx_ASCLIN *asclin)
Disables the module. More...
void | IfxAsclin_enableAscErrorFlags (Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
Enables the ASC error interrupt Flags. More...
void | IfxAsclin_enableModule (Ifx_ASCLIN *asclin)
Enables the module. More...
Ifx_ASCLIN * | IfxAsclin_getAddress (IfxAsclin_Index asclin)
API to get the address for ASCLIN HW module register memory map. More...
float32 | IfxAsclin_getFaFrequency (Ifx_ASCLIN *asclin)
Returns the ASCLIN module FA frequency in Hz. More...
IfxAsclin_Index | IfxAsclin_getIndex (Ifx_ASCLIN *asclin)
API to get the resource index of the ASCLIN specified. More...
float32 | IfxAsclin_getOvsFrequency (Ifx_ASCLIN *asclin)
Returns the OVS frequency. More...
float32 | IfxAsclin_getPdFrequency (Ifx_ASCLIN *asclin)
Returns the PD frequency. More...
float32 | IfxAsclin_getShiftFrequency (Ifx_ASCLIN *asclin)
Returns the SHIFT frequency. More...
volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerEr (Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR. More...
volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerRx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx. More...
volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerTx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx. More...
uint32 | IfxAsclin_read16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits. More...
uint32 | IfxAsclin_read32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Reads data up to 32 bits. More...
uint32 | IfxAsclin_read8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits. More...
void | IfxAsclin_resetModule (Ifx_ASCLIN *asclin)
resets Asclin kernel More...
void | IfxAsclin_setBaudrateBitFields (Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
Sets the baudrate bit fields. More...
boolean | IfxAsclin_setBitTiming (Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing. More...
void | IfxAsclin_setClockSource (Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source. More...
uint32 | IfxAsclin_write16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits. More...
uint32 | IfxAsclin_write32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Writes data up to 32 bits. More...
uint32 | IfxAsclin_write8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits. More...

Detailed Description

ASCLIN basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin.c.


iLLD_TC26B: IfxAsclin_Asc.c File Reference

  • Asclin
  • Asc
Functions
IfxAsclin_Asc.c File Reference

ASCLIN ASC details. More...

#include "IfxAsclin_Asc.h"
#include "string.h"
Include dependency graph for IfxAsclin_Asc.c:

Go to the source code of this file.

Functions

uint8 | IfxAsclin_Asc_blockingRead (IfxAsclin_Asc *asclin)
Reads data from the Rx FIFO. More...
boolean | IfxAsclin_Asc_blockingWrite (IfxAsclin_Asc *asclin, uint8 data)
Writes data into the Tx FIFO. More...
boolean | IfxAsclin_Asc_canReadCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
boolean | IfxAsclin_Asc_canWriteCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
void | IfxAsclin_Asc_clearRx (IfxAsclin_Asc *asclin)
void | IfxAsclin_Asc_clearTx (IfxAsclin_Asc *asclin)
void | IfxAsclin_Asc_disableModule (IfxAsclin_Asc *asclin)
Disables the module. More...
boolean | IfxAsclin_Asc_flushTx (IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
sint32 | IfxAsclin_Asc_getReadCount (IfxAsclin_Asc *asclin)
IfxStdIf_DPipe_ReadEvent | IfxAsclin_Asc_getReadEvent (IfxAsclin_Asc *asclin)
uint32 | IfxAsclin_Asc_getSendCount (IfxAsclin_Asc *asclin)
Ifx_TickTime | IfxAsclin_Asc_getTxTimeStamp (IfxAsclin_Asc *asclin)
sint32 | IfxAsclin_Asc_getWriteCount (IfxAsclin_Asc *asclin)
IfxStdIf_DPipe_WriteEvent | IfxAsclin_Asc_getWriteEvent (IfxAsclin_Asc *asclin)
IfxAsclin_Status | IfxAsclin_Asc_initModule (IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
Initialises the module. More...
void | IfxAsclin_Asc_initModuleConfig (IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...
void | IfxAsclin_Asc_initiateTransmission (IfxAsclin_Asc *asclin)
Initiate the data transmission. More...
void | IfxAsclin_Asc_isrError (IfxAsclin_Asc *asclin)
ISR error routine. More...
void | IfxAsclin_Asc_isrReceive (IfxAsclin_Asc *asclin)
ISR receive routine. More...
void | IfxAsclin_Asc_isrTransmit (IfxAsclin_Asc *asclin)
ISR transmit routine. More...
boolean | IfxAsclin_Asc_read (IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
void | IfxAsclin_Asc_resetSendCount (IfxAsclin_Asc *asclin)
boolean | IfxAsclin_Asc_stdIfDPipeInit (IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin)
Initialize the standard interface to the device driver. More...
boolean | IfxAsclin_Asc_write (IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)

Detailed Description

ASCLIN ASC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_Asc.c.

Function Documentation

◆ IfxAsclin_Asc_initiateTransmission()

void IfxAsclin_Asc_initiateTransmission ( IfxAsclin_Asc * asclin )

Initiate the data transmission.

Parameters
asclin module handle
Returns
None

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 402 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_write().

◆ IfxAsclin_Asc_stdIfDPipeInit()

boolean IfxAsclin_Asc_stdIfDPipeInit | ( | IfxStdIf_DPipe * | stdif,
 |  | IfxAsclin_Asc * | asclin
 | ) |  |

Initialize the standard interface to the device driver.

Parameters
stdif | standard interface object, will be initialized by the function
asclin | device driver object used by the standard interface. must be initialised separately
Returns
TRUE on success, else FALSE

Definition at line 580 of file IfxAsclin_Asc.c.


iLLD_TC26B: IfxAsclin_cfg.c File Reference

  • _Impl
Variables
IfxAsclin_cfg.c File Reference

ASCLIN on-chip implementation data. More...

#include "IfxAsclin_cfg.h"
Include dependency graph for IfxAsclin_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap [IFXASCLIN_NUM_MODULES]

Detailed Description

ASCLIN on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_cfg.c.

Variable Documentation

◆ IfxAsclin_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES]
Initial value:
= {
{&MODULE_ASCLIN0, (uint32)IfxAsclin_Index_0},
{&MODULE_ASCLIN1, (uint32)IfxAsclin_Index_1},
{&MODULE_ASCLIN2, (uint32)IfxAsclin_Index_2},
{&MODULE_ASCLIN3, (uint32)IfxAsclin_Index_3}
}
IfxAsclin_Index_0
ASCLIN Index 0.
Definition: IfxAsclin_cfg.h:80
IfxAsclin_Index_2
ASCLIN Index 2.
Definition: IfxAsclin_cfg.h:82
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxAsclin_Index_3
ASCLIN Index 3.
Definition: IfxAsclin_cfg.h:83
IfxAsclin_Index_1
ASCLIN Index 1.
Definition: IfxAsclin_cfg.h:81

Definition at line 54 of file IfxAsclin_cfg.c.

Referenced by IfxAsclin_getAddress(), and IfxAsclin_getIndex().


iLLD_TC26B: IfxAsclin_Lin.c File Reference

  • Asclin
  • Lin
Functions
IfxAsclin_Lin.c File Reference

ASCLIN LIN details. More...

#include "IfxAsclin_Lin.h"
Include dependency graph for IfxAsclin_Lin.c:

Go to the source code of this file.

Functions

void | IfxAsclin_Lin_checkForReceivedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received header More...
void | IfxAsclin_Lin_checkForReceivedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received response More...
void | IfxAsclin_Lin_checkForTransmittedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted header More...
void | IfxAsclin_Lin_checkForTransmittedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted response More...
void | IfxAsclin_Lin_clearFlagsStatus (IfxAsclin_Lin *asclin)
clears the flags status structures More...
void | IfxAsclin_Lin_disableModule (IfxAsclin_Lin *asclin)
Disables the module. More...
void | IfxAsclin_Lin_ignoreHeader (IfxAsclin_Lin *asclin)
Ignores the latest header. More...
IfxAsclin_Status | IfxAsclin_Lin_initModule (IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
Initialises the module. More...
void | IfxAsclin_Lin_initModuleConfig (IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...
void | IfxAsclin_Lin_receiveHeader (IfxAsclin_Lin *asclin, uint8 *id)
Receives the header. More...
void | IfxAsclin_Lin_receiveResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Receives the response. More...
void | IfxAsclin_Lin_sendHeader (IfxAsclin_Lin *asclin, uint8 *id)
Sends the header. More...
void | IfxAsclin_Lin_sendResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
sends the response More...
boolean | IfxAsclin_Lin_waitForReceivedHeader (IfxAsclin_Lin *asclin)
waits until receive header end acknowledgemnet or an error has been detected More...
boolean | IfxAsclin_Lin_waitForReceivedResponse (IfxAsclin_Lin *asclin)
waits until receive response end acknowledgemnet or an error has been detected More...
boolean | IfxAsclin_Lin_waitForTransmittedHeader (IfxAsclin_Lin *asclin)
waits until transmit header end acknowledgemnet or an error has been detected More...
boolean | IfxAsclin_Lin_waitForTransmittedResponse (IfxAsclin_Lin *asclin)
waits until transmit response end acknowledgemnet or an error has been detected More...
void | IfxAsclin_Lin_isrError (IfxAsclin_Lin *asclin)
ISR error routine. More...
void | IfxAsclin_Lin_isrReceive (IfxAsclin_Lin *asclin)
ISR receive routine. More...
void | IfxAsclin_Lin_isrTransmit (IfxAsclin_Lin *asclin)
ISR transmit routine. More...
void | IfxAsclin_Lin_sendFrame (IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Response 3.Send Header and Receive Response. More...

Detailed Description

ASCLIN LIN details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_Lin.c.


iLLD_TC26B: IfxAsclin_Spi.c File Reference

  • Asclin
  • Spi
Functions
IfxAsclin_Spi.c File Reference

ASCLIN SPI details. More...

#include "IfxAsclin_Spi.h"
Include dependency graph for IfxAsclin_Spi.c:

Go to the source code of this file.

Functions

IFX_STATIC IfxAsclin_Spi_Status | IfxAsclin_Spi_lock (IfxAsclin_Spi *asclin)
IFX_STATIC void | IfxAsclin_Spi_unlock (IfxAsclin_Spi *asclin)
void | IfxAsclin_Spi_disableModule (IfxAsclin_Spi *asclin)
Disables the module. More...
IfxAsclin_Spi_Status | IfxAsclin_Spi_exchange (IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
starts the data exchange More...
IfxAsclin_Spi_Status | IfxAsclin_Spi_getStatus (IfxAsclin_Spi *asclin)
IfxAsclin_Status | IfxAsclin_Spi_initModule (IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
Initialises the module. More...
void | IfxAsclin_Spi_initModuleConfig (IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
Fills the configuration structure with default values. More...
void | IfxAsclin_Spi_isrError (IfxAsclin_Spi *asclin)
ISR error routine. More...
void | IfxAsclin_Spi_isrReceive (IfxAsclin_Spi *asclin)
ISR receive routine. More...
void | IfxAsclin_Spi_isrTransmit (IfxAsclin_Spi *asclin)
ISR transmit routine. More...
void | IfxAsclin_Spi_read (IfxAsclin_Spi *asclin)
Reads data from the Rx FIFO based on the outlet width. More...
void | IfxAsclin_Spi_write (IfxAsclin_Spi *asclin)
Writes data into the Tx FIFO based on the inlet width. More...

Detailed Description

ASCLIN SPI details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxAsclin_Spi.c.

Function Documentation

◆ IfxAsclin_Spi_getStatus()

IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus ( IfxAsclin_Spi * asclin )
Parameters
asclin module handle
Returns
status of the on going job

Definition at line 99 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_lock()

IFX_STATIC IfxAsclin_Spi_Status IfxAsclin_Spi_lock ( IfxAsclin_Spi * asclin )
Parameters
asclin module handle
Returns
status of the on going job

Definition at line 370 of file IfxAsclin_Spi.c.

Referenced by IfxAsclin_Spi_exchange().

◆ IfxAsclin_Spi_unlock()

IFX_STATIC void IfxAsclin_Spi_unlock ( IfxAsclin_Spi * asclin )
Parameters
asclin module handle
Returns
None

Definition at line 422 of file IfxAsclin_Spi.c.

Referenced by IfxAsclin_Spi_read().


iLLD_TC26B: IfxCcu6.c File Reference

  • Ccu6
  • Std
Functions
IfxCcu6.c File Reference

CCU6 basic functionality. More...

#include "IfxCcu6.h"
Include dependency graph for IfxCcu6.c:

Go to the source code of this file.

Functions

void | IfxCcu6_connectTrigger (Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
void | IfxCcu6_disableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
void | IfxCcu6_disableModule (Ifx_CCU6 *ccu6)
Disables the selected CCU6 kernel. More...
void | IfxCcu6_enableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
void | IfxCcu6_enableModule (Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel. More...
Ifx_CCU6 * | IfxCcu6_getAddress (IfxCcu6_Index ccu6)
Returns the module index of the selected CCU6 module. More...
uint32 | IfxCcu6_getCaptureRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel. More...
uint32 | IfxCcu6_getCaptureShadowRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel. More...
IfxCcu6_Index | IfxCcu6_getIndex (Ifx_CCU6 *ccu6)
Returns CCU6 index. More...
volatile Ifx_SRC_SRCR * | IfxCcu6_getSrcAddress (Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register. More...
uint32 | IfxCcu6_readTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the current value of the timer register. More...
void | IfxCcu6_resetModule (Ifx_CCU6 *ccu6)
void | IfxCcu6_routeInterruptNode (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests. More...
void | IfxCcu6_setOutputPassiveLevel (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module. More...
void | IfxCcu6_setT12CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xST (x=0,1,2) More...
void | IfxCcu6_setT12CompareValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers) More...
float32 | IfxCcu6_setT12Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : CaptureFrequency. More...
void | IfxCcu6_setT12InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs. More...
void | IfxCcu6_setT13CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63ST. More...
float32 | IfxCcu6_setT13Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : captureFrequency. More...
void | IfxCcu6_setT13InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs. More...

Detailed Description

CCU6 basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6.c.

Function Documentation

◆ IfxCcu6_resetModule()

void IfxCcu6_resetModule ( Ifx_CCU6 * ccu6 )
Parameters
ccu6 pointer to ccu6 registers
Returns
None

Definition at line 264 of file IfxCcu6.c.


iLLD_TC26B: IfxCcu6_cfg.c File Reference

  • _Impl
Macros | Variables
IfxCcu6_cfg.c File Reference

CCU6 on-chip implementation data. More...

#include "IfxCcu6_cfg.h"
Include dependency graph for IfxCcu6_cfg.c:

Go to the source code of this file.

Macros

#define IFXCCU6_EMPTY_OUTPUT_SLOT (0, 0, IfxPort_OutputIdx_alt7)

Variables

IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap [IFXCCU6_NUM_MODULES]

Detailed Description

CCU6 on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_cfg.c.

Macro Definition Documentation

◆ IFXCCU6_EMPTY_OUTPUT_SLOT

#define IFXCCU6_EMPTY_OUTPUT_SLOT (0, 0, IfxPort_OutputIdx_alt7)

Definition at line 52 of file IfxCcu6_cfg.c.

Variable Documentation

◆ IfxCcu6_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES]
Initial value:
= {
{&MODULE_CCU60, IfxCcu6_Index_0},
{&MODULE_CCU61, IfxCcu6_Index_1}
}
IfxCcu6_Index_1
CCU6 index 1.
Definition: IfxCcu6_cfg.h:84
IfxCcu6_Index_0
CCU6 index 0.
Definition: IfxCcu6_cfg.h:83

Definition at line 58 of file IfxCcu6_cfg.c.

Referenced by IfxCcu6_getAddress(), and IfxCcu6_getIndex().


iLLD_TC26B: IfxCcu6_Icu.c File Reference

  • Ccu6
  • Icu
Functions
IfxCcu6_Icu.c File Reference

CCU6 ICU details. More...

#include "IfxCcu6_Icu.h"
Include dependency graph for IfxCcu6_Icu.c:

Go to the source code of this file.

Functions

uint32 | IfxCcu6_Icu_getTimeStamp (IfxCcu6_Icu_Channel *channel)
Returns the cuurent value stored in the Compare Shadow register (current time stamp) More...
void | IfxCcu6_Icu_initChannel (IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
Initialises the channel. More...
void | IfxCcu6_Icu_initChannelConfig (IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
Fills the channel config structure with default values. More...
void | IfxCcu6_Icu_initModule (IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
Initialises the module with default configuration. More...
void | IfxCcu6_Icu_initModuleConfig (IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
void | IfxCcu6_Icu_startCapture (IfxCcu6_Icu_Channel *channel)
Starts the input capture. More...
void | IfxCcu6_Icu_stopCapture (IfxCcu6_Icu_Channel *channel)
Stops the input capture. More...

Detailed Description

CCU6 ICU details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_Icu.c.


iLLD_TC26B: IfxCcu6_PwmBc.c File Reference

  • Ccu6
  • PwmBc
Functions
IfxCcu6_PwmBc.c File Reference

CCU6 PWMBC details. More...

#include "IfxCcu6_PwmBc.h"
Include dependency graph for IfxCcu6_PwmBc.c:

Go to the source code of this file.

Functions

uint32 | IfxCcu6_PwmBc_getMotorSpeed (IfxCcu6_PwmBc *pwmBc)
returns the current motor speed More...
void | IfxCcu6_PwmBc_initModule (IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
Initialises the module with default configuration. More...
void | IfxCcu6_PwmBc_initModuleConfig (IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
void | IfxCcu6_PwmBc_start (IfxCcu6_PwmBc *pwmBc)
Starts the Hall sensored based PWM. More...
void | IfxCcu6_PwmBc_stop (IfxCcu6_PwmBc *pwmBc)
Stops the Hall sensored based PWM. More...
void | IfxCcu6_PwmBc_updateHallPattern (IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
Updates the Hall pattern. More...

Detailed Description

CCU6 PWMBC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_PwmBc.c.


iLLD_TC26B: IfxCcu6_PwmHl.c File Reference

  • Ccu6
  • PwmHl
Functions | Variables
IfxCcu6_PwmHl.c File Reference

CCU6 PWMHL details. More...

#include "IfxCcu6_PwmHl.h"
#include "_Utilities/Ifx_Assert.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxCcu6_PwmHl.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxCcu6_PwmHl_disable (IfxCcu6_PwmHl *driver)
Turn-off the complementary PWM generation mode. More...
IFX_STATIC void | IfxCcu6_PwmHl_enable (IfxCcu6_PwmHl *driver)
Turn-on the complementary PWM generation mode. More...
IFX_STATIC void | IfxCcu6_PwmHl_setOutputPins (Ifx_CCU6 *module, const IfxCcu6_PwmHl_Config *config)
Sets up the output pins. More...
IFX_STATIC void | IfxCcu6_PwmHl_updateCenterAligned (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxCcu6_PwmHl_updateEdgeAligned (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxCcu6_PwmHl_updateOff (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
float32 | IfxCcu6_PwmHl_getDeadtime (IfxCcu6_PwmHl *driver)
Returns the dead time. More...
float32 | IfxCcu6_PwmHl_getMinPulse (IfxCcu6_PwmHl *driver)
Returns the minimum pulse. More...
Ifx_Pwm_Mode | IfxCcu6_PwmHl_getMode (IfxCcu6_PwmHl *driver)
Returns Pwm mode. More...
boolean | IfxCcu6_PwmHl_init (IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
Initializes the timer object. More...
void | IfxCcu6_PwmHl_initConfig (IfxCcu6_PwmHl_Config *config)
Initialize the configuration structure to default. More...
boolean | IfxCcu6_PwmHl_setDeadtime (IfxCcu6_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
boolean | IfxCcu6_PwmHl_setMinPulse (IfxCcu6_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
boolean | IfxCcu6_PwmHl_setMode (IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
void | IfxCcu6_PwmHl_setOnTime (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are complementary. More...
void | IfxCcu6_PwmHl_setupChannels (IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...
boolean | IfxCcu6_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Variables

IFX_STATIC IFX_CONST IfxCcu6_PwmHl_Mode IfxCcu6_PwmHl_modes [Ifx_Pwm_Mode_off+1]

Detailed Description

CCU6 PWMHL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_PwmHl.c.

Variable Documentation

◆ IfxCcu6_PwmHl_modes

IFX_STATIC IFX_CONST IfxCcu6_PwmHl_Mode IfxCcu6_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Initial value:
= {
{Ifx_Pwm_Mode_centerAligned, FALSE, &IfxCcu6_PwmHl_updateCenterAligned},
{Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxCcu6_PwmHl_updateCenterAligned},
{Ifx_Pwm_Mode_leftAligned, FALSE, &IfxCcu6_PwmHl_updateEdgeAligned },
{Ifx_Pwm_Mode_rightAligned, TRUE, &IfxCcu6_PwmHl_updateEdgeAligned },
{Ifx_Pwm_Mode_off, FALSE, &IfxCcu6_PwmHl_updateOff }
}
IfxCcu6_PwmHl_updateOff
IFX_STATIC void IfxCcu6_PwmHl_updateOff(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxCcu6_PwmHl.c:512
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
IfxCcu6_PwmHl_updateEdgeAligned
IFX_STATIC void IfxCcu6_PwmHl_updateEdgeAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxCcu6_PwmHl.c:506
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCcu6_PwmHl_updateCenterAligned
IFX_STATIC void IfxCcu6_PwmHl_updateCenterAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxCcu6_PwmHl.c:500
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
TRUE
#define TRUE
Definition: Platform_Types.h:90

Definition at line 114 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_setMode().


iLLD_TC26B: IfxCcu6_Timer.c File Reference

  • Ccu6
  • Timer
Functions
IfxCcu6_Timer.c File Reference

CCU6 TIMER details. More...

#include "IfxCcu6_Timer.h"
Include dependency graph for IfxCcu6_Timer.c:

Go to the source code of this file.

Functions

void | IfxCcu6_Timer_countOneStep (IfxCcu6_Timer *timer)
Counts the timer one step. More...
void | IfxCcu6_Timer_initModule (IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
Initialises the module with default configuration. More...
void | IfxCcu6_Timer_initModuleConfig (IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
void | IfxCcu6_Timer_start (IfxCcu6_Timer *timer)
Starts the timer. More...
void | IfxCcu6_Timer_startSingleShotMode (IfxCcu6_Timer *timer)
Starts the single shot mode of the timer. More...
void | IfxCcu6_Timer_stop (IfxCcu6_Timer *timer)
Stops the timer. More...
void | IfxCcu6_Timer_synchronousStart (IfxCcu6_Timer *timer)
Starts both the timers together. More...
void | IfxCcu6_Timer_synchronousStop (IfxCcu6_Timer *timer)
Starts both the timers together. More...

Detailed Description

CCU6 TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_Timer.c.


iLLD_TC26B: IfxCcu6_TimerWithTrigger.c File Reference

  • Ccu6
  • TimerWithTrigger
Functions
IfxCcu6_TimerWithTrigger.c File Reference

CCU6 TIMERWITHTRIGGER details. More...

#include "IfxCcu6_TimerWithTrigger.h"
#include "_Utilities/Ifx_Assert.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxCcu6_TimerWithTrigger.c:

Go to the source code of this file.

Functions

boolean | IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the timer event. More...
boolean | IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the trigger event. More...
void | IfxCcu6_TimerWithTrigger_applyUpdate (IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers. More...
void | IfxCcu6_TimerWithTrigger_disableUpdate (IfxCcu6_TimerWithTrigger *driver)
Disables the upadte
This function is has an empty body as the updated is disabled automatically after the shadow transfer. More...
float32 | IfxCcu6_TimerWithTrigger_getFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the frequency. More...
float32 | IfxCcu6_TimerWithTrigger_getInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the Input frequncy. More...
Ifx_TimerValue | IfxCcu6_TimerWithTrigger_getPeriod (IfxCcu6_TimerWithTrigger *driver)
Returns the period of the timer. More...
volatile uint32 * | IfxCcu6_TimerWithTrigger_getPointer (IfxCcu6_TimerWithTrigger *driver)
Returns the pointer to timer channel. More...
float32 | IfxCcu6_TimerWithTrigger_getResolution (IfxCcu6_TimerWithTrigger *driver)
Returns the resolution. More...
boolean | IfxCcu6_TimerWithTrigger_init (IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
Initialises the timer object
T12 is configured as timer, T13 is optionally configured as trigger
T12CLK, T12PRE and T12PR are chosen to achieve maximum PWM resolution
Note: To achieve maximum PWM resolution, the requested T12 frequency should be the
lowest PWM frequency.
. More...
void | IfxCcu6_TimerWithTrigger_initConfig (IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
Initializes the configuration structure to default. More...
void | IfxCcu6_TimerWithTrigger_run (IfxCcu6_TimerWithTrigger *driver)
Runs the timer. More...
boolean | IfxCcu6_TimerWithTrigger_setFrequency (IfxCcu6_TimerWithTrigger *driver, float32 frequency)
Sets the frequency. More...
boolean | IfxCcu6_TimerWithTrigger_setPeriod (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
void | IfxCcu6_TimerWithTrigger_setSingleMode (IfxCcu6_TimerWithTrigger *driver, boolean enabled)
Sets the single shot mode of the timer. More...
void | IfxCcu6_TimerWithTrigger_setTrigger (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
boolean | IfxCcu6_TimerWithTrigger_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer. More...
void | IfxCcu6_TimerWithTrigger_stop (IfxCcu6_TimerWithTrigger *driver)
Stops the timer. More...
void | IfxCcu6_TimerWithTrigger_updateInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Updates the input frequency. More...

Detailed Description

CCU6 TIMERWITHTRIGGER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_TimerWithTrigger.c.


iLLD_TC26B: IfxCcu6_TPwm.c File Reference

  • Ccu6
  • TPwm
Functions
IfxCcu6_TPwm.c File Reference

CCU6 TPWM details. More...

#include "IfxCcu6_TPwm.h"
Include dependency graph for IfxCcu6_TPwm.c:

Go to the source code of this file.

Functions

void | IfxCcu6_TPwm_initModule (IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
Initialises the module with default configuration. More...
void | IfxCcu6_TPwm_initModuleConfig (IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
void | IfxCcu6_TPwm_pause (IfxCcu6_TPwm *tPwm)
Pauses the triggered PWM. More...
void | IfxCcu6_TPwm_resume (IfxCcu6_TPwm *tPwm)
Resumes the triggered PWM. More...
void | IfxCcu6_TPwm_start (IfxCcu6_TPwm *tPwm)
Starts the triggered PWM. More...
void | IfxCcu6_TPwm_stop (IfxCcu6_TPwm *tPwm)
Stops the triggered PWM. More...

Detailed Description

CCU6 TPWM details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCcu6_TPwm.c.


iLLD_TC26B: IfxCif.c File Reference

  • Cif
  • Std
Functions
IfxCif.c File Reference

CIF basic functionality. More...

#include "IfxCif.h"
Include dependency graph for IfxCif.c:

Go to the source code of this file.

Functions

void | IfxCif_clearEpError (IfxCif_EpErrorClearSources source)
Function to clear one extra path error. More...
void | IfxCif_clearEpInterrupt (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to clear an interrupt. More...
void | IfxCif_clearIspError (IfxCif_IspErrorSources errorSource)
Function to clear the error status bit for an error source. More...
void | IfxCif_clearIspInterrupt (IfxCif_IspInterruptSources interruptSource)
Function to clear an interrupt. More...
void | IfxCif_clearJpeInterrupt (IfxCif_JpeInterruptSources interruptSource)
Function to clear an interrupt. More...
void | IfxCif_clearMiInterrupt (IfxCif_MiInterruptSources interruptSource)
Function to clear an interrupt. More...
void | IfxCif_clearMiStatus (IfxCif_MiStatusClearSources source)
Function to clear the status information of one status clear source of the memory interface submodule. More...
void | IfxCif_clearSecurityWatchdogInterrupt (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to clear an interrupt. More...
void | IfxCif_dpResetCounter (IfxCif_DpCounters counter)
Function to reset one debug path counter. More...
void | IfxCif_epForceConfigurationUpdate (IfxCif_ExtraPath z)
Function to trigger an immediate configuration update for one extra path. More...
void | IfxCif_epSkipPicture (IfxCif_ExtraPath z)
Function to skip one picture of one extra path. More...
uint16 | IfxCif_getCurrentIspPictureOffset (IfxCif_ImageTiers tier)
Function to query the current ISP picture offset for one tier. More...
uint16 | IfxCif_getCurrentIspPictureSize (IfxCif_ImageTiers tier)
Function to query the current ISP picture size for one tier. More...
IfxCif_State | IfxCif_getDpControlEnableState (IfxCif_DpControlSources source)
Function to query the transmission enabled state of one debug path control source. More...
uint32 | IfxCif_getDpCounter (IfxCif_DpCounters counter)
Function to query the current counter value of one debug path counter. More...
uint16 | IfxCif_getDpUserDefinedSymbol (uint8 x)
Function to query the value of one user defined debug symbol. More...
uint32 | IfxCif_getEpBaseAddress (IfxCif_ExtraPath z)
Function to query the current base address of the ring buffer of one extra path. More...
uint32 | IfxCif_getEpBaseInitAddress (IfxCif_ExtraPath z)
Function to query the initial base address of the ring buffer of one extra path. More...
uint16 | IfxCif_getEpCroppingCameraDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping camera displacement of one tier of one extra path. More...
uint16 | IfxCif_getEpCroppingCurrentPictureOffset (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture offset of one tier of one extra path. More...
uint16 | IfxCif_getEpCroppingCurrentPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture size of one tier of one extra path. More...
IfxCif_State | IfxCif_getEpCroppingEnableState (IfxCif_ExtraPath z)
Function to query the image cropping enabled state of one extra path. More...
uint16 | IfxCif_getEpCroppingMaximumDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the maximum displacement of one tier of one extra path. More...
uint16 | IfxCif_getEpCroppingOffsetOutputWindow (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping offset of the output window of one tier of one extra path. More...
uint16 | IfxCif_getEpCroppingPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping picture size of one tier of one extra path. More...
IfxCif_State | IfxCif_getEpCroppingRecenterState (IfxCif_ExtraPath z)
Function to query the enabled state of the recenter feature of one extra path. More...
IfxCif_ErrorState | IfxCif_getEpErrorState (IfxCif_EpErrorSources source)
Function to query the state of an extra path error source. More...
IfxCif_State | IfxCif_getEpFeatureEnableState (IfxCif_ExtraPath z, IfxCif_EpFeatures feature)
Function to query the enabled state of one feature of one extra path. More...
uint32 | IfxCif_getEpInitSize (IfxCif_ExtraPath z)
Function to query the initial size of the ring buffer of one extra path. More...
uint32 | IfxCif_getEpInitialFillLevelInterruptOffset (IfxCif_ExtraPath z)
Function to query the initial filling level interrupt offset of one extra path. More...
uint32 | IfxCif_getEpInitialOffsetCounter (IfxCif_ExtraPath z)
Function to query the initial offset counter of one extra path. More...
IfxCif_State | IfxCif_getEpInputEnableState (IfxCif_ExtraPath z)
Function to query the current input enable state of one extra path. More...
IfxCif_State | IfxCif_getEpInterruptEnableState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the enabled state of an interrupt. More...
uint32 | IfxCif_getEpInterruptOffset (IfxCif_ExtraPath z)
Function to query the current interrupt offset of one extra path. More...
uint32 | IfxCif_getEpOffsetCounter (IfxCif_ExtraPath z)
Function to query the current offset counter of one extra path. More...
uint32 | IfxCif_getEpOffsetCounterStart (IfxCif_ExtraPath z)
Function to query the initial offset counter start value of one extra path. More...
IfxCif_State | IfxCif_getEpOutputEnableState (IfxCif_ExtraPath z)
Function to query the current output enable state of one extra path. More...
uint8 | IfxCif_getEpRecenterValue (IfxCif_ExtraPath z)
Function to query the current recenter value of one extra path. More...
uint32 | IfxCif_getEpSize (IfxCif_ExtraPath z)
Function to query the current ring buffer size of one extra path. More...
IfxCif_EpWriteFormat | IfxCif_getEpWriteFormat (IfxCif_ExtraPath z)
Function to query the write format of one extra path. More...
uint8 | IfxCif_getHuffmanAcTableLength (IfxCif_HuffmanTables table)
Function to query the currently set Huffman Table length for AC values. More...
IfxCif_State | IfxCif_getHuffmanAcTableSelectorState (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for AC values. More...
uint8 | IfxCif_getHuffmanDcTableLength (IfxCif_HuffmanTables table)
Function to query the current Huffman Table length for DC values. More...
IfxCif_State | IfxCif_getHuffmanDcTableSelectorState (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for DC values. More...
IfxCif_State | IfxCif_getInternalClockMode (IfxCif_Submodules submodule)
Function to query the clock state of a submodule. More...
uint16 | IfxCif_getIspAcquisitionOffset (IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition offset of one tier. More...
uint16 | IfxCif_getIspAcquisitionSize (IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition size of one tier. More...
IfxCif_ErrorState | IfxCif_getIspErrorState (IfxCif_IspErrorSources errorSource)
Function to query the error state of an error source. More...
IfxCif_State | IfxCif_getIspInputSelectionAppendState (void)
Function to query the append state. More...
IfxCif_State | IfxCif_getIspInterruptEnableState (IfxCif_IspInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
uint16 | IfxCif_getIspOutputWindowOffset (IfxCif_ImageTiers tier)
Function to query the currently set ISP output window offset for one tier. More...
uint16 | IfxCif_getIspPictureSize (IfxCif_ImageTiers tier)
Function to query the currently set ISP picture size of one tier. More...
uint16 | IfxCif_getIspisCameraDisplacement (IfxCif_ImageTiers tier)
Function to query the current camera displacement for one tier. More...
uint16 | IfxCif_getIspisCurrentPictureOffset (IfxCif_ImageTiers tier)
Function to query the offset of the current picture for one tier. More...
uint16 | IfxCif_getIspisCurrentPictureSize (IfxCif_ImageTiers tier)
Function to query the picture size of the current picture for one tier. More...
uint16 | IfxCif_getIspisMaximumDisplacement (IfxCif_ImageTiers tier)
Function to query the current maximum displacement for one tier. More...
uint16 | IfxCif_getIspisOffsetOutputWindow (IfxCif_ImageTiers tier)
Function to query the current image stabilization offset of the output window of one tier. More...
uint16 | IfxCif_getIspisPictureSize (IfxCif_ImageTiers tier)
Function to query the current picture size for one tier. More...
IfxCif_State | IfxCif_getIspisRecenterEnableState (void)
Function to query the enabled state of image stabilization recenter feature. More...
IfxCif_JpeDebugSignalState | IfxCif_getJpeDebugSignalState (IfxCif_JpeDebugSignalSources source)
Function to query the state of one JPE debug signal source. More...
IfxCif_State | IfxCif_getJpeInterruptEnableState (IfxCif_JpeInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IfxCif_JpeQTableSelector | IfxCif_getJpeQTableSelector (IfxCif_JpeQTableSelectorComponents component)
Function to query the currently selected Q-Table for one component. More...
IfxCif_State | IfxCif_getJpeScalingEnableState (IfxCif_JpeScalingValueSources source)
Function to query the current enabled state of the scaling of an input value source. More...
uint16 | IfxCif_getJpegCodecImageSize (IfxCif_ImageTiers tier)
Function to query the currently set JPEG codec image size of one tier. More...
IfxCif_State | IfxCif_getKernelResetRequestState (void)
Function to query the state of the kernel reset request bit. More...
IfxCif_State | IfxCif_getLinearDownscalerEnableState (IfxCif_ImageTiers tier)
Function to query the current state of the linear downscaler for one tier. More...
uint8 | IfxCif_getLinearDownscalerScalingFactor (IfxCif_ImageTiers tier)
Function to query the currently set scaling factor of the linear downscaler of one tier. More...
IfxCif_LinearDownscalerScalingMode | IfxCif_getLinearDownscalerScalingMode (IfxCif_ImageTiers tier)
Function to query the currently set scaling mode of one tier. More...
uint32 | IfxCif_getMainPictureComponentBaseInitAddress (IfxCif_MiMainPicturePathComponents component)
Function to query the initial base address of the ring buffer of one main picture path component. More...
IfxCif_InterruptTriggeredState | IfxCif_getMaskedEpInterruptTriggeredState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to get the masked state of an interrupt. More...
IfxCif_InterruptTriggeredState | IfxCif_getMaskedIspInterruptTriggeredState (IfxCif_IspInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IfxCif_InterruptTriggeredState | IfxCif_getMaskedJpeInterruptTriggeredState (IfxCif_JpeInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IfxCif_InterruptTriggeredState | IfxCif_getMaskedMiInterruptTriggeredState (IfxCif_MiInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IfxCif_InterruptTriggeredState | IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the masked state of an interrupt. More...
IfxCif_State | IfxCif_getMiDataPathInputEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface input. More...
IfxCif_State | IfxCif_getMiDataPathOutputEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface output. More...
IfxCif_State | IfxCif_getMiFeatureEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of a memory interface data path. More...
IfxCif_State | IfxCif_getMiInterruptEnableState (IfxCif_MiInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
uint32 | IfxCif_getMiMainPictureComponentBaseAddress (IfxCif_MiMainPicturePathComponents component)
Function to query the current base address of the ring buffer of one main picture path component. More...
uint32 | IfxCif_getMiMainPictureComponentInitSize (IfxCif_MiMainPicturePathComponents component)
Function to query the initial size of the ring buffer of one main picture path component. More...
uint32 | IfxCif_getMiMainPictureComponentInitialOffsetCounter (IfxCif_MiMainPicturePathComponents component)
Function to query the initial offset counter inside the ring buffer of one main picture path compoent. More...
uint32 | IfxCif_getMiMainPictureComponentOffsetCounter (IfxCif_MiMainPicturePathComponents component)
Function to query the current offset counter within the ring buffer of one main picture path component. More...
uint32 | IfxCif_getMiMainPictureComponentOffsetCounterStart (IfxCif_MiMainPicturePathComponents component)
Function to query the offset counter which points to the start address of the previously processed picture for one main picture path component. More...
uint32 | IfxCif_getMiMainPictureComponentSize (IfxCif_MiMainPicturePathComponents component)
Function to query the current size of the ring buffer of one main picture path component. More...
IfxCif_ErrorState | IfxCif_getMiStatusInformation (IfxCif_MiStatusInformationSources source)
Function to query the status information of one status information source of the memory interface module. More...
IfxCif_InterruptTriggeredState | IfxCif_getRawEpInterruptTriggeredState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the raw state of an interrupt. More...
IfxCif_InterruptTriggeredState | IfxCif_getRawIspInterruptTriggeredState (IfxCif_IspInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IfxCif_InterruptTriggeredState | IfxCif_getRawJpeInterruptTriggeredState (IfxCif_JpeInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IfxCif_InterruptTriggeredState | IfxCif_getRawMiInterruptTriggeredState (IfxCif_MiInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IfxCif_InterruptTriggeredState | IfxCif_getRawSecurityWatchdogInterruptTriggeredState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the raw state of an interrupt. More...
IfxCif_State | IfxCif_getSecurityWatchdogInterruptEnableState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
uint16 | IfxCif_getSecurityWatchdogTimeout (IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter)
Function to query the current value of a timeout counter of one tier. More...
IfxCif_State | IfxCif_getSoftwareResetMode (IfxCif_Submodules submodule)
Function to query the reset mode of a submodule. More...
void | IfxCif_programJpeTable (IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length)
void | IfxCif_resetModule (Ifx_CIF_BBB *cifBbb)
resets CIF kernel More...
void | IfxCif_resetSecurityWatchdogCounter (IfxCif_SecurityWatchdogCounters counter)
Function to reset one watchdog counter. More...
void | IfxCif_setDpControlEnableState (IfxCif_DpControlSources source, IfxCif_State enableState)
Function to enable or disable transmission of one debug path control source. More...
void | IfxCif_setDpCounter (IfxCif_DpCounters counter, uint32 counterValue)
Function to set one debug path counter to a counter value. More...
void | IfxCif_setDpUserDefinedSymbol (uint8 x, uint16 value)
Function to set one user defined debug symbol. More...
void | IfxCif_setEpBaseInitAddress (IfxCif_ExtraPath z, Ifx_AddressValue baseAddress)
Function to set the initial base address of the ring buffer of one extra path. More...
void | IfxCif_setEpCroppingCameraDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the image cropping camera displacement of one tier of one extra path. More...
void | IfxCif_setEpCroppingEnableState (IfxCif_ExtraPath z, uint32 enableState)
Function to enable or disable image cropping of one extra path. More...
void | IfxCif_setEpCroppingMaximumDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement of one tier of one extra path. More...
void | IfxCif_setEpCroppingOffsetOutputWindow (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 offset)
Function to set the image cropping offset of the output window of one tier of one extra path. More...
void | IfxCif_setEpCroppingOffsetsOutputWindow (IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset)
Function to set the image cropping offsets of the output window of one extra path. More...
void | IfxCif_setEpCroppingPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 size)
Function to set the image cropping picture size of one tier of one extra path. More...
void | IfxCif_setEpCroppingPictureSizes (IfxCif_ExtraPath z, uint16 hSize, uint16 vSize)
Function to set the image cropping picture sizes one extra path. More...
void | IfxCif_setEpFeatureEnableState (IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState)
Function to enable or disable one feature of one extra path. More...
void | IfxCif_setEpInitSize (IfxCif_ExtraPath z, uint32 size)
Function to set the initial size of the ring buffer of one extra path. More...
void | IfxCif_setEpInitialFillLevelInterruptOffset (uint32 z, uint32 interruptOffset)
Function to set the initial filling level interrupt offset of one extra path. More...
void | IfxCif_setEpInitialOffsetCounter (IfxCif_ExtraPath z, uint32 offsetCounter)
Function to set the initial offset counter of one extra path. More...
void | IfxCif_setEpInterruptEnableState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
void | IfxCif_setEpInterruptRequestBit (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
void | IfxCif_setEpOffsetCounterStart (uint32 z, uint32 offsetCounter)
Function to set the initial offset counter start value of one extra path. More...
void | IfxCif_setEpRecenterValue (IfxCif_ExtraPath z, uint8 value)
Function to set the recenter value of one extra path (0 to switch the recenter feature off, for all other values recentering is active (cur_h/v_offs-H/V_OFFS)/2power(recenter)) More...
void | IfxCif_setEpWriteFormat (IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat)
Function to set the write format for one extra path. More...
void | IfxCif_setHuffmanAcTableLength (IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for AC values. More...
void | IfxCif_setHuffmanAcTableSelector (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for AC Values. More...
void | IfxCif_setHuffmanDcTableLength (IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for DC values. More...
void | IfxCif_setHuffmanDcTableSelector (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for DC values. More...
void | IfxCif_setInternalClockMode (IfxCif_Submodules submodule, IfxCif_State clockState)
Function to enable or disable the clock of a submodule. More...
void | IfxCif_setIspAcquisitionOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP acquisition offset of one tier. More...
void | IfxCif_setIspAcquisitionSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the ISP acquisition size of one tier. More...
void | IfxCif_setIspInputSelectionAppendState (IfxCif_State appendState)
Function to enable or disable appending of bits to the input signal. More...
void | IfxCif_setIspInterruptEnableState (IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
void | IfxCif_setIspInterruptRequestBit (IfxCif_IspInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
void | IfxCif_setIspOutputWindowOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP output window offset for one tier. More...
void | IfxCif_setIspPictureSize (IfxCif_ImageTiers tier, uint16 pictureSize)
Function to set the ISP picture size of one tier. More...
void | IfxCif_setIspisCameraDisplacement (uint16 tier, uint16 displacement)
Function to set the camera displacement for one tier. More...
void | IfxCif_setIspisMaximumDisplacement (IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement for one tier. More...
void | IfxCif_setIspisOutputWindowOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the image stabilization offset of the output window of one tier. More...
void | IfxCif_setIspisPictureSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the picture size for one tier. More...
void | IfxCif_setJpeInterruptEnableState (IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
void | IfxCif_setJpeInterruptRequestBit (IfxCif_JpeInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
void | IfxCif_setJpeQTableSelector (IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector)
Function to set the Q-Table selector for one component. More...
void | IfxCif_setJpeScalingEnableState (IfxCif_JpeScalingValueSources source, IfxCif_State scalingEnable)
Function to enable or disable scaling of one input value source. More...
void | IfxCif_setJpegCodecImageSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the JPEG codec image size of one tier. More...
void | IfxCif_setLinearDownscalerEnableState (IfxCif_ImageTiers tier, IfxCif_State enableState)
Function to enable or disable the linear downscaler for one tier. More...
void | IfxCif_setLinearDownscalerScalingFactor (IfxCif_ImageTiers tier, uint8 factor)
Function to set the scaling factor of the linear downscaler of one tier. More...
void | IfxCif_setLinearDownscalerScalingFactors (uint8 horizFactor, uint8 vertFactor)
Function to set the scaling factors of the linear downscaler. More...
void | IfxCif_setLinearDownscalerScalingMode (IfxCif_ImageTiers tier, IfxCif_LinearDownscalerScalingMode mode)
Function to set the scaling mode of one tier. More...
void | IfxCif_setLinearDownscalerScalingModes (IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode)
Function to set the scaling mode of one tier. More...
void | IfxCif_setMiFeatureEnableState (IfxCif_MiDataPaths dataPath, IfxCif_State enableState)
Function to enable or disable one memory interface data path. More...
void | IfxCif_setMiInterruptEnableState (IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
void | IfxCif_setMiInterruptRequestBit (IfxCif_MiInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
void | IfxCif_setMiLuminanceBurstLength (IfxCif_MiBurstLength burstLength)
Function to set the burst length for Y, JPEG, or RAW data. More...
void | IfxCif_setMiMainPictureComponentBaseInitAddress (IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address)
Function to set the initial base address of the ring buffer for one main picture path component. More...
void | IfxCif_setMiMainPictureComponentInitSize (IfxCif_MiMainPicturePathComponents component, uint32 size)
Function to set the initial size of the ring buffer for one main picture path component. More...
void | IfxCif_setMiMainPictureComponentInitialOffsetCounter (IfxCif_MiMainPicturePathComponents component, uint32 offsetCounter)
Function to set the initial offset counter inside the ring buffer for one main picture path component. More...
void | IfxCif_setModuleStateRequest (IfxCif_State state)
Function to request enabling or disabling of the CIF module. More...
void | IfxCif_setSecurityWatchdogInterruptEnableState (IfxCif_SecurityWatchdogInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
void | IfxCif_setSecurityWatchdogInterruptRequestBit (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
void | IfxCif_setSecurityWatchdogTimeout (IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter, uint16 timeout)
Function to set the timeout for a watchdog timeout counter of one tier. A value of 0 disables the timeout. More...
void | IfxCif_setSoftwareResetMode (IfxCif_Submodules submodule, IfxCif_State resetMode)
Function to enable or disable the reset mode of a submodule. More...

Detailed Description

CIF basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCif.c.


iLLD_TC26B: IfxCif_Cam.c File Reference

  • Cif
  • Cam
Macros | Functions
IfxCif_Cam.c File Reference

CIF CAM details. More...

#include "IfxCif_Cam.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxCif_Cam.c:

Go to the source code of this file.

Macros

#define | IFXCIF_CAM_ALIGN(size, align) ((((size) / (align)) * (align)) + ((((size) % (align)) != 0) ? (align) : 0))
#define | IFXCIF_CAM_MEM_ALIGN(size) IFXCIF_CAM_ALIGN(size, IFXCIF_CAM_MEM_ALIGN_SIZE)

Functions

IFX_STATIC IfxCif_Cam_Status | IfxCif_Cam_initMemSize (IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
IFX_INLINE uint32 | IfxCif_Cam_calcMem (uint32 bytes, float32 frames)
IFX_INLINE void | IfxCif_Cam_initPictInfo (IfxCif_Cam_PictureInfo *m, const IfxCif_Cam_MemConfig *mcfg)
IFX_INLINE void | IfxCif_Cam_initPortPins (IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
initializes GPIO Ports for image capturing More...
IFX_INLINE boolean | IfxCif_Cam_isEmulationExtensionAvailable (void)
IFX_INLINE uint32 | IfxCif_Cam_yuvMemSize (const IfxCif_Cam *cam)
IFX_STATIC IfxCif_Cam_Status | IfxCif_Cam_initCamera (const IfxCif_Cam_Config *config)
OVT OV10630 sensor Camera SensorcConfig subroutine , Config file is preloaded to pflash. More...
IFX_STATIC void | IfxCif_Cam_initCif (const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
Initialises the CIF for image capturing. More...
IFX_STATIC void | IfxCif_Cam_initCifDownscaler (const IfxCif_Cam_Downscaling *ds)
IFX_STATIC void | IfxCif_Cam_initCifExtraPath (const IfxCif_Cam *cam, IfxCif_ExtraPath ep, const IfxCif_Cam_Config *config)
IFX_STATIC void | IfxCif_Cam_initCifIspUnit (const IfxCif_Cam_Config *config)
IFX_STATIC void | IfxCif_Cam_initCifJpegEncoder (const IfxCif_Cam_Config *config)
IFX_STATIC void | IfxCif_Cam_initCifMemInterface (const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
IFX_STATIC void | IfxCif_Cam_initEmem (void)
Enables CIF and EMEM and initialises all memory to 0. More...
void | IfxCif_Cam_clearAllFlags (const IfxCif_Cam *cam)
Clear all CIF module notification flags. More...
void | IfxCif_Cam_disableJpegEncoder (const IfxCif_Cam *cam)
Disable the JPEG encoder and route the acquisition path accordingly to the 'original' configuration, i.e. RAW or main path. More...
void | IfxCif_Cam_enableJpegEncoder (const IfxCif_Cam *cam)
Enable the JPEG encoder and route the acquisition path accordingly. More...
IFX_CONST IfxCif_Cam_PictureInfo * | IfxCif_Cam_getExtraPathPictureInfo (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns pointer to the variable storing picture info of an extra-path. More...
boolean | IfxCif_Cam_getLastJpegEncodingInfo (IfxCif_Cam *cam, Ifx_AddressValue *address, sint32 *size)
Returns pointer to the memory structure storing last JPEG encoding process. More...
IfxCif_Cam_Status | IfxCif_Cam_init (IfxCif_Cam *cam, const IfxCif_Cam_Config *config, boolean initCam)
Initialise the CIF, EMEM, PORT, I2C and the camera itself. More...
void | IfxCif_Cam_restartCapture (const IfxCif_Cam *cam, uint8 frames)
Restart capture by enabling the ISP output. More...
void | IfxCif_Cam_startCapture (const IfxCif_Cam *cam, uint8 frames)
Start capture by enabling the ISP output and initialising the MI counter. More...
void | IfxCif_Cam_stopCapture (const IfxCif_Cam *cam)
Stop capture by disabling the ISP output. More...

Detailed Description

CIF CAM details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCif_Cam.c.

Macro Definition Documentation

◆ IFXCIF_CAM_ALIGN

#define IFXCIF_CAM_ALIGN | ( | size,
 |  | align
 | ) | ((((size) / (align)) * (align)) + ((((size) % (align)) != 0) ? (align) : 0))

Definition at line 53 of file IfxCif_Cam.c.

◆ IFXCIF_CAM_MEM_ALIGN

#define IFXCIF_CAM_MEM_ALIGN ( size ) IFXCIF_CAM_ALIGN(size, IFXCIF_CAM_MEM_ALIGN_SIZE)

Definition at line 55 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initMemSize().


iLLD_TC26B: IfxCif_cfg.c File Reference

  • _Impl
IfxCif_cfg.c File Reference

CIF on-chip implementation data. More...

#include "IfxCif_cfg.h"
Include dependency graph for IfxCif_cfg.c:

Go to the source code of this file.

Detailed Description

CIF on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCif_cfg.c.


iLLD_TC26B: IfxCpu.c File Reference

  • Cpu
  • Std
Functions
IfxCpu.c File Reference

CPU basic functionality. More...

#include "IfxCpu.h"
Include dependency graph for IfxCpu.c:

Go to the source code of this file.

Functions

boolean | IfxCpu_acquireMutex (IfxCpu_mutexLock *lock)
API to acquire the mutex (binary semaphore). More...
IfxCpu_CoreMode | IfxCpu_getCoreMode (Ifx_CPU *cpu)
API to get current mode of CPU. More...
IfxCpu_ResourceCpu | IfxCpu_getIndex (Ifx_CPU *cpu)
API to get current mode of CPU. More...
uint32 | IfxCpu_getRandomValue (uint32 *seed)
API to get random value. More...
uint32 | IfxCpu_getRandomValueWithinRange (uint32 *seed, uint32 min, uint32 max)
API to get random value with in the range. More...
void | IfxCpu_releaseMutex (IfxCpu_mutexLock *lock)
API to unlock the mutex . More...
void | IfxCpu_resetSpinLock (IfxCpu_spinLock *lock)
API to unlock the resource . More...
boolean | IfxCpu_setCoreMode (Ifx_CPU *cpu, IfxCpu_CoreMode mode)
API to set mode of the CPU. More...
boolean | IfxCpu_setProgramCounter (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified. More...
boolean | IfxCpu_setSpinLock (IfxCpu_spinLock *lock, uint32 timeoutCount)
API to lock the resource in spin mode with the given timeout. More...
boolean | IfxCpu_startCore (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified and start the CPU. More...
boolean | IfxCpu_waitEvent (IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation. More...
void | IfxCpu_emitEvent (IfxCpu_syncEvent *event)
This function sets a bit corresponding to the core in the event. More...

Detailed Description

CPU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu.c.


iLLD_TC26B: IfxCpu_cfg.c File Reference

  • _Impl
Variables
IfxCpu_cfg.c File Reference

CPU on-chip implementation data. More...

#include "IfxCpu_cfg.h"
Include dependency graph for IfxCpu_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap [IFXCPU_NUM_MODULES]

Detailed Description

CPU on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_cfg.c.

Variable Documentation

◆ IfxCpu_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]
Initial value:
= {
{&MODULE_CPU0, (uint32)IfxCpu_ResourceCpu_0},
{&MODULE_CPU1, (uint32)IfxCpu_ResourceCpu_1}
}
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCpu_ResourceCpu_0
CPU 0.
Definition: IfxCpu_cfg.h:155
IfxCpu_ResourceCpu_1
CPU 1.
Definition: IfxCpu_cfg.h:156

Definition at line 52 of file IfxCpu_cfg.c.

Referenced by IfxCpu_getAddress(), and IfxCpu_getIndex().


iLLD_TC26B: IfxCpu_CStart.h File Reference

  • Cpu
  • CStart
Macros | Functions
IfxCpu_CStart.h File Reference

This file contains the Core startup sequence. More...

#include "Ifx_Cfg.h"
#include "Cpu/Std/Ifx_Types.h"
#include "Tricore/Compilers/Compilers.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxCpu_CStart.h:

Go to the source code of this file.

Macros

#define IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu)
Configuration for pre initialization hook function. More...

Functions

void | _Core1_start (void)
void | _Core2_start (void)

Detailed Description

This file contains the Core startup sequence.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_CStart.h.

Macro Definition Documentation

◆ IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK

#define IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK ( cpu )

Configuration for pre initialization hook function.

Hook function is empty if not configured

Definition at line 73 of file IfxCpu_CStart.h.

Referenced by _Core0_start(), and _Core1_start().

Function Documentation

◆ _Core1_start()

void _Core1_start ( void )

Definition at line 89 of file IfxCpu_CStart1.c.

Referenced by _Core0_start().

◆ _Core2_start()

void _Core2_start ( void )


iLLD_TC26B: IfxCpu_CStart0.c File Reference

  • Cpu
  • CStart
Macros | Functions | Variables
IfxCpu_CStart0.c File Reference

This file contains the Core startup sequence for Cpu0. More...

#include "Ifx_Cfg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Cpu/Std/IfxCpu.h"
#include "Cpu/CStart/IfxCpu_CStart.h"
#include "IfxScu_reg.h"
#include "IfxCpu_reg.h"
Include dependency graph for IfxCpu_CStart0.c:

Go to the source code of this file.

Macros

#define | IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 (1)
Configuration for CpuX enable. More...
#define | IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 (1)
#define | IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE (1)
Configuration for cache enable. More...
#define | IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE (1)
#define | IFXCPU_CSTART_CCU_INIT_HOOK() (void)IfxScuCcu_init(&IfxScuCcu_defaultClockConfig); /*The status returned by Ccu init is ignored */
#define | IFXCSTART0_PSW_DEFAULT (0x00000980u)
#define | IFXCSTART0_PCX_O_S_DEFAULT (0xfff00000u)

Functions

IFX_EXTERN void | core0_main (void)
void | _Core0_start (void)
void | _START (void)

Variables

const uint32 | BootModeHeader_0 []
Boot Mode Header 0 Boot mode header at memory location 0c8000 0000. More...
const uint32 | BootModeHeader_1 []
Boot Mode Header 1 Boot mode header at memory location 0c8002 0000. More...

Detailed Description

This file contains the Core startup sequence for Cpu0.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_CStart0.c.

Macro Definition Documentation

◆ IFX_CFG_CPU_CSTART_ENABLE_TRICORE0

#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 (1)

Configuration for CpuX enable.

Cpu0 enabled by default

Definition at line 60 of file IfxCpu_CStart0.c.

◆ IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE

#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE (1)

Data Cache enabled by default

Definition at line 73 of file IfxCpu_CStart0.c.

Referenced by _Core0_start().

◆ IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE

#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE (1)

Configuration for cache enable.

Program Cache enabled by default

Definition at line 70 of file IfxCpu_CStart0.c.

Referenced by _Core0_start().

◆ IFX_CFG_CPU_CSTART_ENABLE_TRICORE1

#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 (1)

Cpu1 enabled by default

Definition at line 63 of file IfxCpu_CStart0.c.

◆ IFXCPU_CSTART_CCU_INIT_HOOK

#define IFXCPU_CSTART_CCU_INIT_HOOK ( ) (void)IfxScuCcu_init(&IfxScuCcu_defaultClockConfig); /*The status returned by Ccu init is ignored */

Definition at line 77 of file IfxCpu_CStart0.c.

Referenced by _Core0_start().

◆ IFXCSTART0_PCX_O_S_DEFAULT

#define IFXCSTART0_PCX_O_S_DEFAULT (0xfff00000u)

Definition at line 95 of file IfxCpu_CStart0.c.

Referenced by _Core0_start().

◆ IFXCSTART0_PSW_DEFAULT

#define IFXCSTART0_PSW_DEFAULT (0x00000980u)

Definition at line 94 of file IfxCpu_CStart0.c.

Referenced by _Core0_start().

Function Documentation

◆ _Core0_start()

void _Core0_start ( void )

Definition at line 104 of file IfxCpu_CStart0.c.

Referenced by _START().

◆ _START()

void _START ( void )

Definition at line 202 of file IfxCpu_CStart0.c.

◆ core0_main()

IFX_EXTERN void core0_main ( void )

Referenced by _Core0_start().

Variable Documentation

◆ BootModeHeader_0

const uint32 BootModeHeader_0[]
Initial value:
= {
0x00000000u,
0xb3590070u,
0x00000000u,
0x00000000u,
0x00000000u,
0x00000000u,
0x791eb864u,
0x86e1479bu
}
u
uint32 min u
Definition: IfxCpu_IntrinsicsDcc.h:143

Boot Mode Header 0 Boot mode header at memory location 0c8000 0000.

Definition at line 240 of file IfxCpu_CStart0.c.

◆ BootModeHeader_1

const uint32 BootModeHeader_1[]
Initial value:
= {
0x00000000u,
0xB3590070u,
0x00000000u,
0x00000000u,
0x00000000u,
0x00000000u,
0x791eb864u,
0x86e1479bu
}
u
uint32 min u
Definition: IfxCpu_IntrinsicsDcc.h:143

Boot Mode Header 1 Boot mode header at memory location 0c8002 0000.

Definition at line 280 of file IfxCpu_CStart0.c.


iLLD_TC26B: IfxCpu_CStart1.c File Reference

  • Cpu
  • CStart
Macros | Functions
IfxCpu_CStart1.c File Reference

This file contains the Core startup sequence for Cpu1. More...

#include "Ifx_Cfg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu.h"
#include "Cpu/CStart/IfxCpu_CStart.h"
#include "IfxScu_reg.h"
#include "IfxCpu_reg.h"
Include dependency graph for IfxCpu_CStart1.c:

Go to the source code of this file.

Macros

#define | IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE (1)
Configuration for cache enable. More...
#define | IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE (1)
#define | IFXCSTART1_PSW_DEFAULT (0x00000980u)
#define | IFXCSTART1_PCX_O_S_DEFAULT (0xfff00000u)

Functions

IFX_EXTERN void | core1_main (void)
void | _Core1_start (void)

Detailed Description

This file contains the Core startup sequence for Cpu1.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_CStart1.c.

Macro Definition Documentation

◆ IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE

#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE (1)

Data Cache enabled by default

Definition at line 63 of file IfxCpu_CStart1.c.

Referenced by _Core1_start().

◆ IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE

#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE (1)

Configuration for cache enable.

Program Cache enabled by default

Definition at line 60 of file IfxCpu_CStart1.c.

Referenced by _Core1_start().

◆ IFXCSTART1_PCX_O_S_DEFAULT

#define IFXCSTART1_PCX_O_S_DEFAULT (0xfff00000u)

Definition at line 80 of file IfxCpu_CStart1.c.

Referenced by _Core1_start().

◆ IFXCSTART1_PSW_DEFAULT

#define IFXCSTART1_PSW_DEFAULT (0x00000980u)

Definition at line 79 of file IfxCpu_CStart1.c.

Referenced by _Core1_start().

Function Documentation

◆ _Core1_start()

void _Core1_start ( void )

Definition at line 89 of file IfxCpu_CStart1.c.

Referenced by _Core0_start().

◆ core1_main()

IFX_EXTERN void core1_main ( void )

Referenced by _Core1_start().


iLLD_TC26B: IfxCpu_IntrinsicsDcc.h File Reference

  • Cpu
  • Std
Macros | Functions | Variables
IfxCpu_IntrinsicsDcc.h File Reference
#include "Ifx_Types.h"
Include dependency graph for IfxCpu_IntrinsicsDcc.h:

Go to the source code of this file.

Macros

#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__min __min
#define | Ifx__mins __mins
#define | Ifx__minu __minu
#define | Ifx__max __max
#define | Ifx__maxs __maxs
#define | Ifx__maxu __maxu
#define | Ifx__saturate(X, Min, Max) ( __minf(__maxf(X, Min), Max) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( __minf(__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__fract_to_sfract Ifx__round16
#define | Ifx__extr __extr
#define | Ifx__extru __extru
#define | Ifx__getbit(address, bitoffset) __extru( *(address), bitoffset, 1 )
#define | Ifx__ins __ins
#define | Ifx__insert __insert
#define | Ifx__insn __insn
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address,value,bitoffset,1)
#define | Ifx__bisr __bisr
#define | Ifx__disable __disable
#define | Ifx__enable __enable
#define | Ifx__restore __restore
#define | Ifx__syscall __syscall
#define | Ifx__cacheawi __cacheawi
#define | Ifx__abs __abs
#define | Ifx__absdif __absdif
#define | Ifx__abss __abss
#define | Ifx__clo __clo
#define | Ifx__cls __cls
#define | Ifx__clz __clz
#define | Ifx__mfcr __mfcr
#define | Ifx__mtcr __mtcr
#define | Ifx__adds __adds
#define | Ifx__debug __debug
#define | Ifx__dsync __dsync
#define | Ifx__isync __isync
#define | Ifx__mem_barrier __scheduling_barrier
#define | Ifx__nop __nop
#define | Ifx__NOP __nops
#define | Ifx__rslcx
#define | Ifx__svlcx
#define | Ifx__setareg(areg, val) ___setareg(areg,val)
#define | ___setareg(areg, val)
#define | __non_return_call Ifx__non_return_call
#define | __jump_and_link Ifx__jump_and_link
#define | __moveToDataParam0 Ifx__moveToDataParam0
#define | __moveToDataParamRet Ifx__moveToDataParamRet
#define | __getDataParamRet Ifx__getDataParamRet
#define | __moveToAddrParam0 Ifx__moveToAddrParam0
#define | __jumpToFunction Ifx__jumpToFunction
#define | __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
#define | __jumpBackToLink Ifx__jumpBackToLink
#define | __minX Ifx__minX
#define | __maxX Ifx__maxX
#define | __saturateX Ifx__saturateX
#define | __checkrangeX Ifx__checkrangeX
#define | __saturate Ifx__saturate
#define | __sqrf Ifx__sqrf
#define | __sqrtf Ifx__sqrtf
#define | __checkrange Ifx__checkrange
#define | __roundf Ifx__roundf
#define | __absf Ifx__absf
#define | __minf Ifx__minf
#define | __maxf Ifx__maxf
#define | __saturatef Ifx__saturatef
#define | __checkrangef Ifx__checkrangef
#define | __abs_stdreal Ifx__abs_stdreal
#define | __min_stdreal Ifx__min_stdreal
#define | __max_stdreal Ifx__max_stdreal
#define | __saturate_stdreal Ifx__saturate_stdreal
#define | __neqf Ifx__neqf
#define | __leqf Ifx__leqf
#define | __geqf Ifx__geqf
#define | __clssf Ifx__clssf
#define | __float_to_fract Ifx__float_to_fract
#define | __fract_to_float Ifx__fract_to_float
#define | __getfract Ifx__getfract
#define | __mac_r_sf Ifx__mac_r_sf
#define | __mac_sf Ifx__mac_sf
#define | __mulfractfract Ifx__mulfractfract
#define | __mulfractlong Ifx__mulfractlong
#define | __round16 Ifx__round16
#define | __fract_to_sfract Ifx__fract_to_sfract
#define | __s16_to_sfract Ifx__s16_to_sfract
#define | __sfract_to_s16 Ifx__sfract_to_s16
#define | __sfract_to_u16 Ifx__sfract_to_u16
#define | __shaaccum Ifx__shaaccum
#define | __shafracts Ifx__shafracts
#define | __shasfracts Ifx__shasfracts
#define | __u16_to_sfract Ifx__u16_to_sfract
#define | __getbit Ifx__getbit
#define | __imaskldmst Ifx__imaskldmst
#define | __putbit Ifx__putbit
#define | __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
#define | __cacheiwi Ifx__cacheiwi
#define | __mulsc Ifx__mulsc
#define | __rol Ifx__rol
#define | __ror Ifx__ror
#define | __absb Ifx__absb
#define | __absh Ifx__absh
#define | __abssh Ifx__abssh
#define | __extractbyte1 Ifx__extractbyte1
#define | __extractbyte2 Ifx__extractbyte2
#define | __extractbyte3 Ifx__extractbyte3
#define | __extractbyte4 Ifx__extractbyte4
#define | __extracthw1 Ifx__extracthw1
#define | __extracthw2 Ifx__extracthw2
#define | __extractubyte1 Ifx__extractubyte1
#define | __extractubyte2 Ifx__extractubyte2
#define | __extractubyte3 Ifx__extractubyte3
#define | __extractubyte4 Ifx__extractubyte4
#define | __extractuhw1 Ifx__extractuhw1
#define | __extractuhw2 Ifx__extractuhw2
#define | __getbyte1 Ifx__getbyte1
#define | __getbyte2 Ifx__getbyte2
#define | __getbyte3 Ifx__getbyte3
#define | __getbyte4 Ifx__getbyte4
#define | __gethw1 Ifx__gethw1
#define | __gethw2 Ifx__gethw2
#define | __getubyte1 Ifx__getubyte1
#define | __getubyte2 Ifx__getubyte2
#define | __getubyte3 Ifx__getubyte3
#define | __getubyte4 Ifx__getubyte4
#define | __getuhw1 Ifx__getuhw1
#define | __getuhw2 Ifx__getuhw2
#define | __initpackb Ifx__initpackb
#define | __initpackbl Ifx__initpackbl
#define | __initpackhw Ifx__initpackhw
#define | __initpackhwl Ifx__initpackhwl
#define | __initupackb Ifx__initupackb
#define | __initupackhw Ifx__initupackhw
#define | __insertbyte1 Ifx__insertbyte1
#define | __insertbyte2 Ifx__insertbyte2
#define | __insertbyte3 Ifx__insertbyte3
#define | __insertbyte4 Ifx__insertbyte4
#define | __inserthw1 Ifx__inserthw1
#define | __inserthw2 Ifx__inserthw2
#define | __insertubyte1 Ifx__insertubyte1
#define | __insertubyte2 Ifx__insertubyte2
#define | __insertubyte3 Ifx__insertubyte3
#define | __insertubyte4 Ifx__insertubyte4
#define | __insertuhw1 Ifx__insertuhw1
#define | __insertuhw2 Ifx__insertuhw2
#define | __minb Ifx__minb
#define | __minbu Ifx__minbu
#define | __minh Ifx__minh
#define | __minhu Ifx__minhu
#define | __setbyte1 Ifx__setbyte1
#define | __setbyte2 Ifx__setbyte2
#define | __setbyte3 Ifx__setbyte3
#define | __setbyte4 Ifx__setbyte4
#define | __sethw1 Ifx__sethw1
#define | __sethw2 Ifx__sethw2
#define | __setubyte1 Ifx__setubyte1
#define | __setubyte2 Ifx__setubyte2
#define | __setubyte3 Ifx__setubyte3
#define | __setubyte4 Ifx__setubyte4
#define | __setuhw1 Ifx__setuhw1
#define | __setuhw2 Ifx__setuhw2
#define | __fabs Ifx__fabs
#define | __fabsf Ifx__fabsf
#define | __parity Ifx__parity
#define | __satb Ifx__satb
#define | __satbu Ifx__satbu
#define | __sath Ifx__sath
#define | __sathu Ifx__sathu
#define | __addsu Ifx__addsu
#define | __subs Ifx__subs
#define | __subsu Ifx__subsu
#define | __ldmst Ifx__ldmst
#define | __mem_barrier Ifx__mem_barrier
#define | NOP Ifx__NOP
#define | __nops Ifx__nops
#define | __nops1000 Ifx__nops1000
#define | __swap Ifx__swap
#define | __cmpAndSwap Ifx__cmpAndSwap
#define | __setareg Ifx__setareg
#define | __stopPerfCounters Ifx__stopPerfCounters
#define | __fixpoint_to_float32 Ifx__fixpoint_to_float32
#define | __getA11 Ifx__getA11
#define | __setStackPointer Ifx__setStackPointer
#define | __crc32 Ifx__crc32

Functions

asm volatile void | Ifx__non_return_call (void(*fun)(void))
asm volatile void | Ifx__jump_and_link (void(*fun)(void))
asm volatile void | Ifx__moveToDataParam0 (unsigned int var)
asm volatile void | Ifx__moveToDataParamRet (unsigned int var)
asm volatile unsigned int | Ifx__getDataParamRet (void)
asm volatile void | Ifx__moveToAddrParam0 (const void *var)
IFX_INLINE void | Ifx__jumpToFunction (const void *fun)
IFX_INLINE void | Ifx__jumpToFunctionWithLink (const void *fun)
asm volatile void | Ifx__jumpBackToLink (void)
sint32 | __min (sint32, sint32) __attribute__((intrinsic_pseudo(3
sint32 | __mins (sint32, sint32) __attribute__((intrinsic_function(0x10b
uint32 | __minu (uint32, uint32) __attribute__((intrinsic_pseudo(3
sint32 | __max (sint32, sint32) __attribute__((intrinsic_pseudo(3
uint32 | __maxs (uint32, uint32) __attribute__((intrinsic_function(0x10b
uint32 | __maxu (uint32, uint32) __attribute__((intrinsic_pseudo(3
asm short | Ifx__clssf (sfract a)
asm fract | Ifx__float_to_fract (float a)
asm float | Ifx__fract_to_float (fract a)
Convert fract to float. More...
asm fract | Ifx__getfract (laccum a)
asm sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
asm sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
asm long | Ifx__mulfractfract (fract a, fract b)
asm long | Ifx__mulfractlong (fract a, long b)
asm sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | __float_to_sfract (float a)
asm sfract | Ifx__s16_to_sfract (short a)
asm short | Ifx__sfract_to_s16 (sfract a)
asm volatile uint16 | Ifx__sfract_to_u16 (sfract a)
asm laccum | Ifx__shaaccum (laccum a, sint32 b)
asm fract | Ifx__shafracts (fract a, sint32 b)
asm sfract | Ifx__shasfracts (sfract a, sint32 b)
asm sfract | Ifx__u16_to_sfract (uint16 a)
sint32 | __extr (sint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
uint32 | __extru (uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
uint32 | __ins (uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
uint32 | __insert (uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109
uint32 | __insn (uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
asm volatile void | Ifx__imaskldmst (void *a, sint32 b, sint32 p, const sint32 w)
void | __bisr (const uint32) __attribute__((intrinsic_function(0x100
void | __disable (void) __attribute__((intrinsic_function(0x103
void | __enable (void) __attribute__((intrinsic_function(0x103
void | __restore (sint32) __attribute__((intrinsic_function(0x104
void | __syscall (const uint32) __attribute__((intrinsic_function(0x100
void | __cacheawi (void *) __attribute__((intrinsic_function(0x110
asm volatile uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
asm volatile void | Ifx__cacheiwi (uint8 *p)
asm circ_t | __initcirc (void *buf, uint16 bufsize, uint16 byteindex)
asm volatile sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
asm volatile uint32 | Ifx__rol (uint32 operand, uint32 count)
asm volatile uint32 | Ifx__ror (uint32 operand, uint32 count)
asm __packb | Ifx__absb (__packb a)
asm __packhw | Ifx__absh (__packhw a)
asm __packhw | Ifx__abssh (__packhw a)
asm sint8 | Ifx__extractbyte1 (__packb a)
Extract first byte from a __packb. More...
asm sint8 | Ifx__extractbyte2 (__packb a)
Extract second byte from a __packb. More...
asm sint8 | Ifx__extractbyte3 (__packb a)
Extract third byte from a __packb. More...
asm sint8 | Ifx__extractbyte4 (__packb a)
Extract fourth byte from a __packb. More...
asm short | Ifx__extracthw1 (__packhw a)
Extract first short from a __packhw. More...
asm short | Ifx__extracthw2 (__packhw a)
Extract second short from a __packhw. More...
asm volatile uint8 | Ifx__extractubyte1 (__upackb a)
asm volatile uint8 | Ifx__extractubyte2 (__upackb a)
asm volatile uint8 | Ifx__extractubyte3 (__upackb a)
asm volatile uint8 | Ifx__extractubyte4 (__upackb a)
asm volatile uint16 | Ifx__extractuhw1 (__upackhw a)
asm volatile uint16 | Ifx__extractuhw2 (__upackhw a)
asm sint8 | Ifx__getbyte1 (__packb *a)
asm sint8 | Ifx__getbyte2 (__packb *a)
asm sint8 | Ifx__getbyte3 (__packb *a)
asm sint8 | Ifx__getbyte4 (__packb *a)
asm short | Ifx__gethw1 (__packhw *a)
asm short | Ifx__gethw2 (__packhw *a)
asm volatile uint8 | Ifx__getubyte1 (__upackb *a)
asm volatile uint8 | Ifx__getubyte2 (__upackb *a)
asm volatile uint8 | Ifx__getubyte3 (__upackb *a)
asm volatile uint8 | Ifx__getubyte4 (__upackb *a)
asm volatile uint16 | Ifx__getuhw1 (__upackhw *a)
asm volatile uint16 | Ifx__getuhw2 (__upackhw *a)
asm __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
asm __packb | Ifx__initpackbl (long a)
asm __packhw | Ifx__initpackhw (short a, short b)
Initialize __packhw with two integers. More...
asm __packhw | Ifx__initpackhwl (long a)
asm __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
asm __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
asm __packb | Ifx__insertbyte1 (__packb a, sint8 b)
Insert sint8 into first byte of a __packb. More...
asm __packb | Ifx__insertbyte2 (__packb a, sint8 b)
Insert sint8 into second byte of a __packb. More...
asm __packb | Ifx__insertbyte3 (__packb a, sint8 b)
Insert sint8 into third byte of a __packb. More...
asm __packb | Ifx__insertbyte4 (__packb a, sint8 b)
Insert sint8 into fourth byte of a __packb. More...
asm __packhw | Ifx__inserthw1 (__packhw a, short b)
asm __packhw | Ifx__inserthw2 (__packhw a, short b)
asm __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
Insert uint8 into first unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
Insert uint8 into second unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
Insert uint8 into third unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
Insert uint8 into fourth unsigned byte of a __packb. More...
asm __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
asm __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
asm __packb | Ifx__minb (__packb a, __packb b)
asm __upackb | Ifx__minbu (__upackb a, __upackb b)
asm __packhw | Ifx__minh (__packhw a, __packhw b)
asm __upackhw | Ifx__minhu (__upackhw a, __upackhw b)
asm volatile void | Ifx__setbyte1 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte2 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte3 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte4 (__packb *a, sint8 b)
asm volatile void | Ifx__sethw1 (__packhw *a, short b)
asm volatile void | Ifx__sethw2 (__packhw *a, short b)
asm volatile void | Ifx__setubyte1 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte2 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte3 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte4 (__upackb *a, uint8 b)
asm volatile void | Ifx__setuhw1 (__upackhw *a, uint16 b)
asm volatile void | Ifx__setuhw2 (__upackhw *a, uint16 b)
sint32 | __abs (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __absdif (sint32, sint32) __attribute__((intrinsic_pseudo(1
sint32 | __abss (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __clo (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __cls (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __clz (sint32) __attribute__((intrinsic_pseudo(1
asm double | Ifx__fabs (double d)
asm float | Ifx__fabsf (float f)
sint32 | __mfcr (const uint32) __attribute__((intrinsic_function(0x101
void | __mtcr (const uint32, sint32) __attribute__((intrinsic_function(0x102
asm volatile sint32 | Ifx__parity (sint32 a)
asm sint8 | Ifx__satb (sint32 a)
asm volatile uint8 | Ifx__satbu (sint32 a)
asm short | Ifx__sath (sint32 a)
asm volatile uint16 | Ifx__sathu (sint32 a)
sint32 | __adds (sint32, sint32) __attribute__((intrinsic_pseudo(1
asm volatile uint32 | Ifx__addsu (uint32 a, uint32 b)
asm volatile sint32 | Ifx__subs (sint32 a, sint32 b)
asm volatile uint32 | Ifx__subsu (uint32 a, uint32 b)
void | __debug (void) __attribute__((intrinsic_function(0x103
void | __dsync (void) __attribute__((intrinsic_function(0x103
void | __isync (void) __attribute__((intrinsic_function(0x103
asm volatile void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
void | __scheduling_barrier (void) __attribute__((intrinsic_function(9
void | __nop (void) __attribute__((intrinsic_function(0x103
asm volatile void | Ifx__nops (uint32 cnt)
asm volatile void | Ifx__nops1000 (uint32 x)
void | __rslcx (void) __attribute__((intrinsic_function(0x103
void | __svlcx (void) __attribute__((intrinsic_function(0x103
asm volatile uint32 | Ifx__swap (void *place, uint32 value)
asm volatile unsigned int | Ifx__cmpAndSwap (unsigned int *address, unsigned long value, unsigned long CmpVal)
asm volatile void | Ifx__stopPerfCounters (void)
asm float | Ifx__fixpoint_to_float32 (fract value, sint32 shift)
Convert a fixpoint value to float32. More...
asm volatile void * | Ifx__getA11 (void)
asm void | Ifx__setStackPointer (void *stackAddr)
asm volatile unsigned int | Ifx__crc32 (uint32 b, uint32 a)
IFX_INLINE unsigned int | IfxCpu_calculateCrc32 (uint32 *startaddress, uint8 length)
asm volatile uint32 | IfxCpu_getRandomVal (uint32 a, uint32 x, uint32 m)
Generate the Random value. More...

Variables

sint32 min
sint32 min h
uint32 min u
sint32 max
sint32 extr
uint32 ins | t
uint32 insert
void | bisr
void | disable
void | enable
void | restore
void | syscall
void cachea | wi
sint32 abs
sint32 absdif
sint32 abss
sint32 clo
sint32 cls
sint32 clz
sint32 mfcr
void | mtcr
sint32 adds
void | debug
void | dsync
void | isync
void | $ $sb
void | nop
void | rslcx
void | svlcx

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_IntrinsicsDcc.h.

Macro Definition Documentation

◆ ___setareg

#define ___setareg | ( | areg,
 |  | val
 | ) |
Value:
{ __asm ("#$$bp"); \
__asm (" movh.a\t %a15,"#val"@ha\n"); \
__asm (" lea\t %a15,[%a15]"#val"@l\n"); \
__asm (" mov.aa %"#areg", %a15\n"); \
__asm ("#$$ep"); }

Definition at line 1457 of file IfxCpu_IntrinsicsDcc.h.

◆ __abs_stdreal

#define __abs_stdreal Ifx__abs_stdreal

Definition at line 1649 of file IfxCpu_IntrinsicsDcc.h.

◆ __absb

#define __absb Ifx__absb

Definition at line 1781 of file IfxCpu_IntrinsicsDcc.h.

◆ __absf

#define __absf Ifx__absf

Definition at line 1629 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx_AngleTrkF32_updateStatus(), IfxAsclin_setBitTiming(), IfxDsadc_Dsadc_calcDIVx(), IfxMultican_Can_initModule(), IfxMultican_Node_setBitTiming(), IfxMultican_Node_setFastBitTiming(), IfxMultican_Node_setNominalBitTiming(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_calculatePrescaler(), and IfxQspi_calculateTimeQuantumLength().

◆ __absh

#define __absh Ifx__absh

Definition at line 1785 of file IfxCpu_IntrinsicsDcc.h.

◆ __abssh

#define __abssh Ifx__abssh

Definition at line 1789 of file IfxCpu_IntrinsicsDcc.h.

◆ __addsu

#define __addsu Ifx__addsu

Definition at line 2053 of file IfxCpu_IntrinsicsDcc.h.

◆ __cacheawi_bo_post_inc

#define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc

Definition at line 1761 of file IfxCpu_IntrinsicsDcc.h.

◆ __cacheiwi

#define __cacheiwi Ifx__cacheiwi

Definition at line 1765 of file IfxCpu_IntrinsicsDcc.h.

◆ __checkrange

#define __checkrange Ifx__checkrange

Definition at line 1621 of file IfxCpu_IntrinsicsDcc.h.

◆ __checkrangef

#define __checkrangef Ifx__checkrangef

Definition at line 1645 of file IfxCpu_IntrinsicsDcc.h.

◆ __checkrangeX

#define __checkrangeX Ifx__checkrangeX

Definition at line 1605 of file IfxCpu_IntrinsicsDcc.h.

◆ __clssf

#define __clssf Ifx__clssf

Definition at line 1677 of file IfxCpu_IntrinsicsDcc.h.

◆ __cmpAndSwap

#define __cmpAndSwap Ifx__cmpAndSwap

Definition at line 2089 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_acquireMutex(), and IfxCpu_setSpinLock().

◆ __crc32

#define __crc32 Ifx__crc32

Definition at line 2113 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractbyte1

#define __extractbyte1 Ifx__extractbyte1

Definition at line 1793 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractbyte2

#define __extractbyte2 Ifx__extractbyte2

Definition at line 1797 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractbyte3

#define __extractbyte3 Ifx__extractbyte3

Definition at line 1801 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractbyte4

#define __extractbyte4 Ifx__extractbyte4

Definition at line 1805 of file IfxCpu_IntrinsicsDcc.h.

◆ __extracthw1

#define __extracthw1 Ifx__extracthw1

Definition at line 1809 of file IfxCpu_IntrinsicsDcc.h.

◆ __extracthw2

#define __extracthw2 Ifx__extracthw2

Definition at line 1813 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractubyte1

#define __extractubyte1 Ifx__extractubyte1

Definition at line 1817 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractubyte2

#define __extractubyte2 Ifx__extractubyte2

Definition at line 1821 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractubyte3

#define __extractubyte3 Ifx__extractubyte3

Definition at line 1825 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractubyte4

#define __extractubyte4 Ifx__extractubyte4

Definition at line 1829 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractuhw1

#define __extractuhw1 Ifx__extractuhw1

Definition at line 1833 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractuhw2

#define __extractuhw2 Ifx__extractuhw2

Definition at line 1837 of file IfxCpu_IntrinsicsDcc.h.

◆ __fabs

#define __fabs Ifx__fabs

Definition at line 2025 of file IfxCpu_IntrinsicsDcc.h.

◆ __fabsf

#define __fabsf Ifx__fabsf

Definition at line 2029 of file IfxCpu_IntrinsicsDcc.h.

◆ __fixpoint_to_float32

#define __fixpoint_to_float32 Ifx__fixpoint_to_float32

Definition at line 2101 of file IfxCpu_IntrinsicsDcc.h.

◆ __float_to_fract

#define __float_to_fract Ifx__float_to_fract

Definition at line 1681 of file IfxCpu_IntrinsicsDcc.h.

◆ __fract_to_float

#define __fract_to_float Ifx__fract_to_float

Definition at line 1685 of file IfxCpu_IntrinsicsDcc.h.

◆ __fract_to_sfract

#define __fract_to_sfract Ifx__fract_to_sfract

Definition at line 1713 of file IfxCpu_IntrinsicsDcc.h.

◆ __geqf

#define __geqf Ifx__geqf

Definition at line 1673 of file IfxCpu_IntrinsicsDcc.h.

◆ __getA11

#define __getA11 Ifx__getA11

Definition at line 2105 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_Trap_extractTrapInfo().

◆ __getbit

#define __getbit Ifx__getbit

Definition at line 1749 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxPort_getPinState().

◆ __getbyte1

#define __getbyte1 Ifx__getbyte1

Definition at line 1841 of file IfxCpu_IntrinsicsDcc.h.

◆ __getbyte2

#define __getbyte2 Ifx__getbyte2

Definition at line 1845 of file IfxCpu_IntrinsicsDcc.h.

◆ __getbyte3

#define __getbyte3 Ifx__getbyte3

Definition at line 1849 of file IfxCpu_IntrinsicsDcc.h.

◆ __getbyte4

#define __getbyte4 Ifx__getbyte4

Definition at line 1853 of file IfxCpu_IntrinsicsDcc.h.

◆ __getDataParamRet

#define __getDataParamRet Ifx__getDataParamRet

Definition at line 1573 of file IfxCpu_IntrinsicsDcc.h.

◆ __getfract

#define __getfract Ifx__getfract

Definition at line 1689 of file IfxCpu_IntrinsicsDcc.h.

◆ __gethw1

#define __gethw1 Ifx__gethw1

Definition at line 1857 of file IfxCpu_IntrinsicsDcc.h.

◆ __gethw2

#define __gethw2 Ifx__gethw2

Definition at line 1861 of file IfxCpu_IntrinsicsDcc.h.

◆ __getubyte1

#define __getubyte1 Ifx__getubyte1

Definition at line 1865 of file IfxCpu_IntrinsicsDcc.h.

◆ __getubyte2

#define __getubyte2 Ifx__getubyte2

Definition at line 1869 of file IfxCpu_IntrinsicsDcc.h.

◆ __getubyte3

#define __getubyte3 Ifx__getubyte3

Definition at line 1873 of file IfxCpu_IntrinsicsDcc.h.

◆ __getubyte4

#define __getubyte4 Ifx__getubyte4

Definition at line 1877 of file IfxCpu_IntrinsicsDcc.h.

◆ __getuhw1

#define __getuhw1 Ifx__getuhw1

Definition at line 1881 of file IfxCpu_IntrinsicsDcc.h.

◆ __getuhw2

#define __getuhw2 Ifx__getuhw2

Definition at line 1885 of file IfxCpu_IntrinsicsDcc.h.

◆ __imaskldmst

#define __imaskldmst Ifx__imaskldmst

Definition at line 1753 of file IfxCpu_IntrinsicsDcc.h.

◆ __initpackb

#define __initpackb Ifx__initpackb

Definition at line 1889 of file IfxCpu_IntrinsicsDcc.h.

◆ __initpackbl

#define __initpackbl Ifx__initpackbl

Definition at line 1893 of file IfxCpu_IntrinsicsDcc.h.

◆ __initpackhw

#define __initpackhw Ifx__initpackhw

Definition at line 1897 of file IfxCpu_IntrinsicsDcc.h.

◆ __initpackhwl

#define __initpackhwl Ifx__initpackhwl

Definition at line 1901 of file IfxCpu_IntrinsicsDcc.h.

◆ __initupackb

#define __initupackb Ifx__initupackb

Definition at line 1905 of file IfxCpu_IntrinsicsDcc.h.

◆ __initupackhw

#define __initupackhw Ifx__initupackhw

Definition at line 1909 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertbyte1

#define __insertbyte1 Ifx__insertbyte1

Definition at line 1913 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertbyte2

#define __insertbyte2 Ifx__insertbyte2

Definition at line 1917 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertbyte3

#define __insertbyte3 Ifx__insertbyte3

Definition at line 1921 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertbyte4

#define __insertbyte4 Ifx__insertbyte4

Definition at line 1925 of file IfxCpu_IntrinsicsDcc.h.

◆ __inserthw1

#define __inserthw1 Ifx__inserthw1

Definition at line 1929 of file IfxCpu_IntrinsicsDcc.h.

◆ __inserthw2

#define __inserthw2 Ifx__inserthw2

Definition at line 1933 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertubyte1

#define __insertubyte1 Ifx__insertubyte1

Definition at line 1937 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertubyte2

#define __insertubyte2 Ifx__insertubyte2

Definition at line 1941 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertubyte3

#define __insertubyte3 Ifx__insertubyte3

Definition at line 1945 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertubyte4

#define __insertubyte4 Ifx__insertubyte4

Definition at line 1949 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertuhw1

#define __insertuhw1 Ifx__insertuhw1

Definition at line 1953 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertuhw2

#define __insertuhw2 Ifx__insertuhw2

Definition at line 1957 of file IfxCpu_IntrinsicsDcc.h.

◆ __jump_and_link

#define __jump_and_link Ifx__jump_and_link

Definition at line 1561 of file IfxCpu_IntrinsicsDcc.h.

◆ __jumpBackToLink

#define __jumpBackToLink Ifx__jumpBackToLink

Definition at line 1589 of file IfxCpu_IntrinsicsDcc.h.

◆ __jumpToFunction

#define __jumpToFunction Ifx__jumpToFunction

Definition at line 1581 of file IfxCpu_IntrinsicsDcc.h.

◆ __jumpToFunctionWithLink

#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink

Definition at line 1585 of file IfxCpu_IntrinsicsDcc.h.

◆ __ldmst

#define __ldmst Ifx__ldmst

Definition at line 2065 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx_InternalMux_init(), IfxPort_resetESR(), IfxPort_setESR(), IfxPort_setGroupModeInput(), IfxPort_setGroupModeOutput(), IfxPort_setGroupPadDriver(), IfxPort_setPinMode(), IfxPort_setPinPadDriver(), and IfxQspi_SpiMaster_initChannel().

◆ __leqf

#define __leqf Ifx__leqf

Definition at line 1669 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxDsadc_Dsadc_calcDIVx(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_calculatePrescaler(), and IfxQspi_calculateTimeQuantumLength().

◆ __mac_r_sf

#define __mac_r_sf Ifx__mac_r_sf

Definition at line 1693 of file IfxCpu_IntrinsicsDcc.h.

◆ __mac_sf

#define __mac_sf Ifx__mac_sf

Definition at line 1697 of file IfxCpu_IntrinsicsDcc.h.

◆ __max_stdreal

#define __max_stdreal Ifx__max_stdreal

Definition at line 1657 of file IfxCpu_IntrinsicsDcc.h.

◆ __maxf

#define __maxf Ifx__maxf

Definition at line 1637 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx_RampF32_step(), IfxMultican_Can_initModule(), and VecMax_f32().

◆ __maxX

#define __maxX Ifx__maxX

Definition at line 1597 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxGtm_Atom_PwmHl_updateShiftCenterAligned(), and IfxGtm_Tom_PwmHl_updateShiftCenterAligned().

◆ __mem_barrier

#define __mem_barrier Ifx__mem_barrier

Definition at line 2069 of file IfxCpu_IntrinsicsDcc.h.

◆ __min_stdreal

#define __min_stdreal Ifx__min_stdreal

Definition at line 1653 of file IfxCpu_IntrinsicsDcc.h.

◆ __minb

#define __minb Ifx__minb

Definition at line 1961 of file IfxCpu_IntrinsicsDcc.h.

◆ __minbu

#define __minbu Ifx__minbu

Definition at line 1965 of file IfxCpu_IntrinsicsDcc.h.

◆ __minf

#define __minf Ifx__minf

Definition at line 1633 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx_RampF32_step(), IfxMultican_Can_initModule(), and VecMin_f32().

◆ __minh

#define __minh Ifx__minh

Definition at line 1969 of file IfxCpu_IntrinsicsDcc.h.

◆ __minhu

#define __minhu Ifx__minhu

Definition at line 1973 of file IfxCpu_IntrinsicsDcc.h.

◆ __minX

#define __minX Ifx__minX

Definition at line 1593 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxGtm_Atom_PwmHl_updateShiftCenterAligned(), and IfxGtm_Tom_PwmHl_updateShiftCenterAligned().

◆ __moveToAddrParam0

#define __moveToAddrParam0 Ifx__moveToAddrParam0

Definition at line 1577 of file IfxCpu_IntrinsicsDcc.h.

◆ __moveToDataParam0

#define __moveToDataParam0 Ifx__moveToDataParam0

Definition at line 1565 of file IfxCpu_IntrinsicsDcc.h.

◆ __moveToDataParamRet

#define __moveToDataParamRet Ifx__moveToDataParamRet

Definition at line 1569 of file IfxCpu_IntrinsicsDcc.h.

◆ __mulfractfract

#define __mulfractfract Ifx__mulfractfract

Definition at line 1701 of file IfxCpu_IntrinsicsDcc.h.

◆ __mulfractlong

#define __mulfractlong Ifx__mulfractlong

Definition at line 1705 of file IfxCpu_IntrinsicsDcc.h.

◆ __mulsc

#define __mulsc Ifx__mulsc

Definition at line 1769 of file IfxCpu_IntrinsicsDcc.h.

◆ __neqf

#define __neqf Ifx__neqf

Definition at line 1665 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx_AngleTrkF32_init(), IfxDsadc_Dsadc_calcDIVx(), and IfxQspi_calculateExtendedConfigurationValue().

◆ __non_return_call

#define __non_return_call Ifx__non_return_call

Definition at line 1557 of file IfxCpu_IntrinsicsDcc.h.

Referenced by _Core0_start(), _Core1_start(), and _START().

◆ __nops

#define __nops Ifx__nops

Definition at line 2077 of file IfxCpu_IntrinsicsDcc.h.

◆ __nops1000

#define __nops1000 Ifx__nops1000

Definition at line 2081 of file IfxCpu_IntrinsicsDcc.h.

◆ __parity

#define __parity Ifx__parity

Definition at line 2033 of file IfxCpu_IntrinsicsDcc.h.

◆ __putbit

#define __putbit Ifx__putbit

Definition at line 1757 of file IfxCpu_IntrinsicsDcc.h.

◆ __rol

#define __rol Ifx__rol

Definition at line 1773 of file IfxCpu_IntrinsicsDcc.h.

◆ __ror

#define __ror Ifx__ror

Definition at line 1777 of file IfxCpu_IntrinsicsDcc.h.

◆ __round16

#define __round16 Ifx__round16

Definition at line 1709 of file IfxCpu_IntrinsicsDcc.h.

◆ __roundf

#define __roundf Ifx__roundf

Definition at line 1625 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCif_Cam_calcMem(), IfxQspi_calculateTimeQuantumLength(), IfxScuCcu_setGtmFrequency(), and IfxScuCcu_setSriFrequency().

◆ __s16_to_sfract

#define __s16_to_sfract Ifx__s16_to_sfract

Definition at line 1721 of file IfxCpu_IntrinsicsDcc.h.

◆ __satb

#define __satb Ifx__satb

Definition at line 2037 of file IfxCpu_IntrinsicsDcc.h.

◆ __satbu

#define __satbu Ifx__satbu

Definition at line 2041 of file IfxCpu_IntrinsicsDcc.h.

◆ __sath

#define __sath Ifx__sath

Definition at line 2045 of file IfxCpu_IntrinsicsDcc.h.

◆ __sathu

#define __sathu Ifx__sathu

Definition at line 2049 of file IfxCpu_IntrinsicsDcc.h.

◆ __saturate

#define __saturate Ifx__saturate

Definition at line 1609 of file IfxCpu_IntrinsicsDcc.h.

◆ __saturate_stdreal

#define __saturate_stdreal Ifx__saturate_stdreal

Definition at line 1661 of file IfxCpu_IntrinsicsDcc.h.

◆ __saturatef

#define __saturatef Ifx__saturatef

Definition at line 1641 of file IfxCpu_IntrinsicsDcc.h.

◆ __saturateX

#define __saturateX Ifx__saturateX

Definition at line 1601 of file IfxCpu_IntrinsicsDcc.h.

◆ __setareg

#define __setareg Ifx__setareg

Definition at line 2093 of file IfxCpu_IntrinsicsDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __setbyte1

#define __setbyte1 Ifx__setbyte1

Definition at line 1977 of file IfxCpu_IntrinsicsDcc.h.

◆ __setbyte2

#define __setbyte2 Ifx__setbyte2

Definition at line 1981 of file IfxCpu_IntrinsicsDcc.h.

◆ __setbyte3

#define __setbyte3 Ifx__setbyte3

Definition at line 1985 of file IfxCpu_IntrinsicsDcc.h.

◆ __setbyte4

#define __setbyte4 Ifx__setbyte4

Definition at line 1989 of file IfxCpu_IntrinsicsDcc.h.

◆ __sethw1

#define __sethw1 Ifx__sethw1

Definition at line 1993 of file IfxCpu_IntrinsicsDcc.h.

◆ __sethw2

#define __sethw2 Ifx__sethw2

Definition at line 1997 of file IfxCpu_IntrinsicsDcc.h.

◆ __setStackPointer

#define __setStackPointer Ifx__setStackPointer

Definition at line 2109 of file IfxCpu_IntrinsicsDcc.h.

◆ __setubyte1

#define __setubyte1 Ifx__setubyte1

Definition at line 2001 of file IfxCpu_IntrinsicsDcc.h.

◆ __setubyte2

#define __setubyte2 Ifx__setubyte2

Definition at line 2005 of file IfxCpu_IntrinsicsDcc.h.

◆ __setubyte3

#define __setubyte3 Ifx__setubyte3

Definition at line 2009 of file IfxCpu_IntrinsicsDcc.h.

◆ __setubyte4

#define __setubyte4 Ifx__setubyte4

Definition at line 2013 of file IfxCpu_IntrinsicsDcc.h.

◆ __setuhw1

#define __setuhw1 Ifx__setuhw1

Definition at line 2017 of file IfxCpu_IntrinsicsDcc.h.

◆ __setuhw2

#define __setuhw2 Ifx__setuhw2

Definition at line 2021 of file IfxCpu_IntrinsicsDcc.h.

◆ __sfract_to_s16

#define __sfract_to_s16 Ifx__sfract_to_s16

Definition at line 1725 of file IfxCpu_IntrinsicsDcc.h.

◆ __sfract_to_u16

#define __sfract_to_u16 Ifx__sfract_to_u16

Definition at line 1729 of file IfxCpu_IntrinsicsDcc.h.

◆ __shaaccum

#define __shaaccum Ifx__shaaccum

Definition at line 1733 of file IfxCpu_IntrinsicsDcc.h.

◆ __shafracts

#define __shafracts Ifx__shafracts

Definition at line 1737 of file IfxCpu_IntrinsicsDcc.h.

◆ __shasfracts

#define __shasfracts Ifx__shasfracts

Definition at line 1741 of file IfxCpu_IntrinsicsDcc.h.

◆ __sqrf

#define __sqrf Ifx__sqrf

Definition at line 1613 of file IfxCpu_IntrinsicsDcc.h.

◆ __sqrtf

#define __sqrtf Ifx__sqrtf

Definition at line 1617 of file IfxCpu_IntrinsicsDcc.h.

◆ __stopPerfCounters

#define __stopPerfCounters Ifx__stopPerfCounters

Definition at line 2097 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_stopCounters().

◆ __subs

#define __subs Ifx__subs

Definition at line 2057 of file IfxCpu_IntrinsicsDcc.h.

◆ __subsu

#define __subsu Ifx__subsu

Definition at line 2061 of file IfxCpu_IntrinsicsDcc.h.

◆ __swap

#define __swap Ifx__swap

Definition at line 2085 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxAsclin_Spi_lock(), and IfxQspi_SpiMaster_lock().

◆ __u16_to_sfract

#define __u16_to_sfract Ifx__u16_to_sfract

Definition at line 1745 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setareg

#define Ifx__setareg | ( | areg,
 |  | val
 | ) | ___setareg(areg,val)

Insert n NOP instruction

Definition at line 1455 of file IfxCpu_IntrinsicsDcc.h.

◆ NOP

#define NOP Ifx__NOP

Definition at line 2073 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ Ifx__crc32()

asm volatile unsigned int Ifx__crc32 | ( | uint32 | b,
 |  | uint32 | a
 | ) |  |

Definition at line 1504 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_calculateCrc32().

◆ Ifx__fixpoint_to_float32()

asm float Ifx__fixpoint_to_float32 | ( | fract | value,
 |  | sint32 | shift
 | ) |  |

Convert a fixpoint value to float32.

This function converts a value from a fixpoint format to a float32 format.

Parameters
value | value to be converted.
shift | position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
Returns
Returns the converted value in the float32 format.

Definition at line 1484 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getA11()

asm volatile void* Ifx__getA11 ( void )

Definition at line 1491 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getDataParamRet()

asm volatile unsigned int Ifx__getDataParamRet ( void )

Definition at line 88 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__jumpBackToLink()

asm volatile void Ifx__jumpBackToLink ( void )

Definition at line 111 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__jumpToFunction()

IFX_INLINE void Ifx__jumpToFunction ( const void * fun )

Definition at line 101 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__jumpToFunctionWithLink()

IFX_INLINE void Ifx__jumpToFunctionWithLink ( const void * fun )

Definition at line 106 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__moveToAddrParam0()

asm volatile void Ifx__moveToAddrParam0 ( const void * var )

Definition at line 94 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__moveToDataParam0()

asm volatile void Ifx__moveToDataParam0 ( unsigned int var )

Definition at line 74 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__moveToDataParamRet()

asm volatile void Ifx__moveToDataParamRet ( unsigned int var )

Definition at line 81 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setStackPointer()

asm void Ifx__setStackPointer ( void * stackAddr )

Definition at line 1497 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__stopPerfCounters()

IFX_INLINE void Ifx__stopPerfCounters ( void )

Definition at line 1465 of file IfxCpu_IntrinsicsDcc.h.

◆ IfxCpu_calculateCrc32()

IFX_INLINE unsigned int IfxCpu_calculateCrc32 | ( | uint32 * | startaddress,
 |  | uint8 | length
 | ) |  |

Definition at line 1511 of file IfxCpu_IntrinsicsDcc.h.

◆ IfxCpu_getRandomVal()

asm volatile uint32 IfxCpu_getRandomVal | ( | uint32 | a,
 |  | uint32 | x,
 |  | uint32 | m
 | ) |  |

Generate the Random value.

This function generates the random value by taking a valid seed and limits.

Parameters
a | lower limit.
x | valid seed value.
m | upper limit.
Returns
Returns the random value.

Definition at line 1534 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_getRandomValue().


iLLD_TC26B: IfxCpu_IntrinsicsDcc2G.h File Reference

  • Cpu
  • Std
Macros | Functions | Variables
IfxCpu_IntrinsicsDcc2G.h File Reference
#include "Ifx_Types.h"
Include dependency graph for IfxCpu_IntrinsicsDcc2G.h:

Go to the source code of this file.

Macros

#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__min __min
#define | Ifx__mins __mins
#define | Ifx__minu __minu
#define | Ifx__max __max
#define | Ifx__maxs __maxs
#define | Ifx__maxu __maxu
#define | Ifx__saturate(X, Min, Max) ( __minf(__maxf(X, Min), Max) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( __minf(__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__fract_to_sfract Ifx__round16
#define | Ifx__extr __extr
#define | Ifx__extru __extru
#define | Ifx__getbit(address, bitoffset) __extru( *(address), bitoffset, 1 )
#define | Ifx__ins __ins
#define | Ifx__insert __insert
#define | Ifx__insn __insn
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address,value,bitoffset,1)
#define | Ifx__bisr __bisr
#define | Ifx__disable __disable
#define | Ifx__enable __enable
#define | Ifx__restore __restore
#define | Ifx__syscall __syscall
#define | Ifx__cacheawi __cacheawi
#define | Ifx__abs __abs
#define | Ifx__absdif __absdif
#define | Ifx__abss __abss
#define | Ifx__clo __clo
#define | Ifx__cls __cls
#define | Ifx__clz __clz
#define | Ifx__mfcr __mfcr
#define | Ifx__mtcr __mtcr
#define | Ifx__adds __adds
#define | Ifx__debug __debug
#define | Ifx__dsync __dsync
#define | Ifx__isync __isync
#define | Ifx__mem_barrier __scheduling_barrier
#define | Ifx__nop __nop
#define | Ifx__NOP __nops
#define | Ifx__rslcx
#define | Ifx__svlcx
#define | Ifx__setareg(areg, val) ___setareg(areg,val)
#define | ___setareg(areg, val)
#define | __non_return_call Ifx__non_return_call
#define | __jump_and_link Ifx__jump_and_link
#define | __moveToDataParam0 Ifx__moveToDataParam0
#define | __moveToDataParamRet Ifx__moveToDataParamRet
#define | __getDataParamRet Ifx__getDataParamRet
#define | __moveToAddrParam0 Ifx__moveToAddrParam0
#define | __jumpToFunction Ifx__jumpToFunction
#define | __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
#define | __jumpBackToLink Ifx__jumpBackToLink
#define | __minX Ifx__minX
#define | __maxX Ifx__maxX
#define | __saturateX Ifx__saturateX
#define | __checkrangeX Ifx__checkrangeX
#define | __saturate Ifx__saturate
#define | __sqrf Ifx__sqrf
#define | __sqrtf Ifx__sqrtf
#define | __checkrange Ifx__checkrange
#define | __roundf Ifx__roundf
#define | __absf Ifx__absf
#define | __minf Ifx__minf
#define | __maxf Ifx__maxf
#define | __saturatef Ifx__saturatef
#define | __checkrangef Ifx__checkrangef
#define | __abs_stdreal Ifx__abs_stdreal
#define | __min_stdreal Ifx__min_stdreal
#define | __max_stdreal Ifx__max_stdreal
#define | __saturate_stdreal Ifx__saturate_stdreal
#define | __neqf Ifx__neqf
#define | __leqf Ifx__leqf
#define | __geqf Ifx__geqf
#define | __clssf Ifx__clssf
#define | __float_to_fract Ifx__float_to_fract
#define | __fract_to_float Ifx__fract_to_float
#define | __getfract Ifx__getfract
#define | __mac_r_sf Ifx__mac_r_sf
#define | __mac_sf Ifx__mac_sf
#define | __mulfractfract Ifx__mulfractfract
#define | __mulfractlong Ifx__mulfractlong
#define | __round16 Ifx__round16
#define | __fract_to_sfract Ifx__fract_to_sfract
#define | __s16_to_sfract Ifx__s16_to_sfract
#define | __sfract_to_s16 Ifx__sfract_to_s16
#define | __sfract_to_u16 Ifx__sfract_to_u16
#define | __shaaccum Ifx__shaaccum
#define | __shafracts Ifx__shafracts
#define | __shasfracts Ifx__shasfracts
#define | __u16_to_sfract Ifx__u16_to_sfract
#define | __getbit Ifx__getbit
#define | __imaskldmst Ifx__imaskldmst
#define | __putbit Ifx__putbit
#define | __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
#define | __cacheiwi Ifx__cacheiwi
#define | __mulsc Ifx__mulsc
#define | __rol Ifx__rol
#define | __ror Ifx__ror
#define | __absb Ifx__absb
#define | __absh Ifx__absh
#define | __abssh Ifx__abssh
#define | __extractbyte1 Ifx__extractbyte1
#define | __extractbyte2 Ifx__extractbyte2
#define | __extractbyte3 Ifx__extractbyte3
#define | __extractbyte4 Ifx__extractbyte4
#define | __extracthw1 Ifx__extracthw1
#define | __extracthw2 Ifx__extracthw2
#define | __extractubyte1 Ifx__extractubyte1
#define | __extractubyte2 Ifx__extractubyte2
#define | __extractubyte3 Ifx__extractubyte3
#define | __extractubyte4 Ifx__extractubyte4
#define | __extractuhw1 Ifx__extractuhw1
#define | __extractuhw2 Ifx__extractuhw2
#define | __getbyte1 Ifx__getbyte1
#define | __getbyte2 Ifx__getbyte2
#define | __getbyte3 Ifx__getbyte3
#define | __getbyte4 Ifx__getbyte4
#define | __gethw1 Ifx__gethw1
#define | __gethw2 Ifx__gethw2
#define | __getubyte1 Ifx__getubyte1
#define | __getubyte2 Ifx__getubyte2
#define | __getubyte3 Ifx__getubyte3
#define | __getubyte4 Ifx__getubyte4
#define | __getuhw1 Ifx__getuhw1
#define | __getuhw2 Ifx__getuhw2
#define | __initpackb Ifx__initpackb
#define | __initpackbl Ifx__initpackbl
#define | __initpackhw Ifx__initpackhw
#define | __initpackhwl Ifx__initpackhwl
#define | __initupackb Ifx__initupackb
#define | __initupackhw Ifx__initupackhw
#define | __insertbyte1 Ifx__insertbyte1
#define | __insertbyte2 Ifx__insertbyte2
#define | __insertbyte3 Ifx__insertbyte3
#define | __insertbyte4 Ifx__insertbyte4
#define | __inserthw1 Ifx__inserthw1
#define | __inserthw2 Ifx__inserthw2
#define | __insertubyte1 Ifx__insertubyte1
#define | __insertubyte2 Ifx__insertubyte2
#define | __insertubyte3 Ifx__insertubyte3
#define | __insertubyte4 Ifx__insertubyte4
#define | __insertuhw1 Ifx__insertuhw1
#define | __insertuhw2 Ifx__insertuhw2
#define | __minb Ifx__minb
#define | __minbu Ifx__minbu
#define | __minh Ifx__minh
#define | __minhu Ifx__minhu
#define | __setbyte1 Ifx__setbyte1
#define | __setbyte2 Ifx__setbyte2
#define | __setbyte3 Ifx__setbyte3
#define | __setbyte4 Ifx__setbyte4
#define | __sethw1 Ifx__sethw1
#define | __sethw2 Ifx__sethw2
#define | __setubyte1 Ifx__setubyte1
#define | __setubyte2 Ifx__setubyte2
#define | __setubyte3 Ifx__setubyte3
#define | __setubyte4 Ifx__setubyte4
#define | __setuhw1 Ifx__setuhw1
#define | __setuhw2 Ifx__setuhw2
#define | __fabs Ifx__fabs
#define | __fabsf Ifx__fabsf
#define | __parity Ifx__parity
#define | __satb Ifx__satb
#define | __satbu Ifx__satbu
#define | __sath Ifx__sath
#define | __sathu Ifx__sathu
#define | __addsu Ifx__addsu
#define | __subs Ifx__subs
#define | __subsu Ifx__subsu
#define | __ldmst Ifx__ldmst
#define | __mem_barrier Ifx__mem_barrier
#define | NOP Ifx__NOP
#define | __nops Ifx__nops
#define | __nops1000 Ifx__nops1000
#define | __swap Ifx__swap
#define | __cmpAndSwap Ifx__cmpAndSwap
#define | __setareg Ifx__setareg
#define | __stopPerfCounters Ifx__stopPerfCounters
#define | __fixpoint_to_float32 Ifx__fixpoint_to_float32
#define | __getA11 Ifx__getA11
#define | __setStackPointer Ifx__setStackPointer
#define | __crc32 Ifx__crc32

Functions

asm volatile void | Ifx__non_return_call (void(*fun)(void))
asm volatile void | Ifx__jump_and_link (void(*fun)(void))
asm volatile void | Ifx__moveToDataParam0 (unsigned int var)
asm volatile void | Ifx__moveToDataParamRet (unsigned int var)
asm volatile unsigned int | Ifx__getDataParamRet (void)
asm volatile void | Ifx__moveToAddrParam0 (const void *var)
IFX_INLINE void | Ifx__jumpToFunction (const void *fun)
IFX_INLINE void | Ifx__jumpToFunctionWithLink (const void *fun)
asm volatile void | Ifx__jumpBackToLink (void)
sint32 | __min (sint32, sint32) __attribute__((intrinsic_pseudo(3
sint32 | __mins (sint32, sint32) __attribute__((intrinsic_function(0x10b
uint32 | __minu (uint32, uint32) __attribute__((intrinsic_pseudo(3
sint32 | __max (sint32, sint32) __attribute__((intrinsic_pseudo(3
uint32 | __maxs (uint32, uint32) __attribute__((intrinsic_function(0x10b
uint32 | __maxu (uint32, uint32) __attribute__((intrinsic_pseudo(3
asm short | Ifx__clssf (sfract a)
asm fract | Ifx__float_to_fract (float a)
asm float | Ifx__fract_to_float (fract a)
Convert fract to float. More...
asm fract | Ifx__getfract (laccum a)
asm sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
asm sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
asm long | Ifx__mulfractfract (fract a, fract b)
asm long | Ifx__mulfractlong (fract a, long b)
asm sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | __float_to_sfract (float a)
asm sfract | Ifx__s16_to_sfract (short a)
asm short | Ifx__sfract_to_s16 (sfract a)
asm volatile uint16 | Ifx__sfract_to_u16 (sfract a)
asm laccum | Ifx__shaaccum (laccum a, sint32 b)
asm fract | Ifx__shafracts (fract a, sint32 b)
asm sfract | Ifx__shasfracts (sfract a, sint32 b)
asm sfract | Ifx__u16_to_sfract (uint16 a)
sint32 | __extr (sint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
uint32 | __extru (uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
uint32 | __ins (uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
uint32 | __insert (uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109
uint32 | __insn (uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
asm volatile void | Ifx__imaskldmst (void *a, sint32 b, sint32 p, const sint32 w)
void | __bisr (const uint32) __attribute__((intrinsic_function(0x100
void | __disable (void) __attribute__((intrinsic_function(0x103
void | __enable (void) __attribute__((intrinsic_function(0x103
void | __restore (sint32) __attribute__((intrinsic_function(0x104
void | __syscall (const uint32) __attribute__((intrinsic_function(0x100
void | __cacheawi (void *) __attribute__((intrinsic_function(0x110
asm volatile uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
asm volatile void | Ifx__cacheiwi (uint8 *p)
asm circ_t | __initcirc (void *buf, uint16 bufsize, uint16 byteindex)
asm volatile sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
asm volatile uint32 | Ifx__rol (uint32 operand, uint32 count)
asm volatile uint32 | Ifx__ror (uint32 operand, uint32 count)
asm __packb | Ifx__absb (__packb a)
asm __packhw | Ifx__absh (__packhw a)
asm __packhw | Ifx__abssh (__packhw a)
asm sint8 | Ifx__extractbyte1 (__packb a)
Extract first byte from a __packb. More...
asm sint8 | Ifx__extractbyte2 (__packb a)
Extract second byte from a __packb. More...
asm sint8 | Ifx__extractbyte3 (__packb a)
Extract third byte from a __packb. More...
asm sint8 | Ifx__extractbyte4 (__packb a)
Extract fourth byte from a __packb. More...
asm short | Ifx__extracthw1 (__packhw a)
Extract first short from a __packhw. More...
asm short | Ifx__extracthw2 (__packhw a)
Extract second short from a __packhw. More...
asm volatile uint8 | Ifx__extractubyte1 (__upackb a)
asm volatile uint8 | Ifx__extractubyte2 (__upackb a)
asm volatile uint8 | Ifx__extractubyte3 (__upackb a)
asm volatile uint8 | Ifx__extractubyte4 (__upackb a)
asm volatile uint16 | Ifx__extractuhw1 (__upackhw a)
asm volatile uint16 | Ifx__extractuhw2 (__upackhw a)
asm sint8 | Ifx__getbyte1 (__packb *a)
asm sint8 | Ifx__getbyte2 (__packb *a)
asm sint8 | Ifx__getbyte3 (__packb *a)
asm sint8 | Ifx__getbyte4 (__packb *a)
asm short | Ifx__gethw1 (__packhw *a)
asm short | Ifx__gethw2 (__packhw *a)
asm volatile uint8 | Ifx__getubyte1 (__upackb *a)
asm volatile uint8 | Ifx__getubyte2 (__upackb *a)
asm volatile uint8 | Ifx__getubyte3 (__upackb *a)
asm volatile uint8 | Ifx__getubyte4 (__upackb *a)
asm volatile uint16 | Ifx__getuhw1 (__upackhw *a)
asm volatile uint16 | Ifx__getuhw2 (__upackhw *a)
asm __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
asm __packb | Ifx__initpackbl (long a)
asm __packhw | Ifx__initpackhw (short a, short b)
Initialize __packhw with two integers. More...
asm __packhw | Ifx__initpackhwl (long a)
asm __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
asm __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
asm __packb | Ifx__insertbyte1 (__packb a, sint8 b)
Insert sint8 into first byte of a __packb. More...
asm __packb | Ifx__insertbyte2 (__packb a, sint8 b)
Insert sint8 into second byte of a __packb. More...
asm __packb | Ifx__insertbyte3 (__packb a, sint8 b)
Insert sint8 into third byte of a __packb. More...
asm __packb | Ifx__insertbyte4 (__packb a, sint8 b)
Insert sint8 into fourth byte of a __packb. More...
asm __packhw | Ifx__inserthw1 (__packhw a, short b)
asm __packhw | Ifx__inserthw2 (__packhw a, short b)
asm __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
Insert uint8 into first unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
Insert uint8 into second unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
Insert uint8 into third unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
Insert uint8 into fourth unsigned byte of a __packb. More...
asm __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
asm __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
asm __packb | Ifx__minb (__packb a, __packb b)
asm __upackb | Ifx__minbu (__upackb a, __upackb b)
asm __packhw | Ifx__minh (__packhw a, __packhw b)
asm __upackhw | Ifx__minhu (__upackhw a, __upackhw b)
asm volatile void | Ifx__setbyte1 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte2 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte3 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte4 (__packb *a, sint8 b)
asm volatile void | Ifx__sethw1 (__packhw *a, short b)
asm volatile void | Ifx__sethw2 (__packhw *a, short b)
asm volatile void | Ifx__setubyte1 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte2 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte3 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte4 (__upackb *a, uint8 b)
asm volatile void | Ifx__setuhw1 (__upackhw *a, uint16 b)
asm volatile void | Ifx__setuhw2 (__upackhw *a, uint16 b)
sint32 | __abs (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __absdif (sint32, sint32) __attribute__((intrinsic_pseudo(1
sint32 | __abss (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __clo (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __cls (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __clz (sint32) __attribute__((intrinsic_pseudo(1
asm double | Ifx__fabs (double d)
asm float | Ifx__fabsf (float f)
sint32 | __mfcr (const uint32) __attribute__((intrinsic_function(0x101
void | __mtcr (const uint32, sint32) __attribute__((intrinsic_function(0x102
asm volatile sint32 | Ifx__parity (sint32 a)
asm sint8 | Ifx__satb (sint32 a)
asm volatile uint8 | Ifx__satbu (sint32 a)
asm short | Ifx__sath (sint32 a)
asm volatile uint16 | Ifx__sathu (sint32 a)
sint32 | __adds (sint32, sint32) __attribute__((intrinsic_pseudo(1
asm volatile uint32 | Ifx__addsu (uint32 a, uint32 b)
asm volatile sint32 | Ifx__subs (sint32 a, sint32 b)
asm volatile uint32 | Ifx__subsu (uint32 a, uint32 b)
void | __debug (void) __attribute__((intrinsic_function(0x103
void | __dsync (void) __attribute__((intrinsic_function(0x103
void | __isync (void) __attribute__((intrinsic_function(0x103
asm volatile void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
void | __scheduling_barrier (void) __attribute__((intrinsic_function(9
void | __nop (void) __attribute__((intrinsic_function(0x103
asm volatile void | Ifx__nops (uint32 cnt)
asm volatile void | Ifx__nops1000 (uint32 x)
void | __rslcx (void) __attribute__((intrinsic_function(0x103
void | __svlcx (void) __attribute__((intrinsic_function(0x103
asm volatile uint32 | Ifx__swap (void *place, uint32 value)
asm volatile unsigned int | Ifx__cmpAndSwap (unsigned int *address, unsigned long value, unsigned long CmpVal)
asm volatile void | Ifx__stopPerfCounters (void)
asm float | Ifx__fixpoint_to_float32 (fract value, sint32 shift)
Convert a fixpoint value to float32. More...
asm volatile void * | Ifx__getA11 (void)
asm void | Ifx__setStackPointer (void *stackAddr)
asm volatile unsigned int | Ifx__crc32 (uint32 b, uint32 a)
IFX_INLINE unsigned int | IfxCpu_calculateCrc32 (uint32 *startaddress, uint8 length)
asm volatile uint32 | IfxCpu_getRandomVal (uint32 a, uint32 x, uint32 m)
Generate the Random value. More...

Variables

sint32 min
sint32 min h
uint32 min u
sint32 max
sint32 extr
uint32 ins | t
uint32 insert
void | bisr
void | disable
void | enable
void | restore
void | syscall
void cachea | wi
sint32 abs
sint32 absdif
sint32 abss
sint32 clo
sint32 cls
sint32 clz
sint32 mfcr
void | mtcr
sint32 adds
void | debug
void | dsync
void | isync
void | $ $sb
void | nop
void | rslcx
void | svlcx

Macro Definition Documentation

◆ ___setareg

#define ___setareg | ( | areg,
 |  | val
 | ) |
Value:
{ __asm ("#$$bp"); \
__asm (" movh.a\t %a15,"#val"@ha\n"); \
__asm (" lea\t %a15,[%a15]"#val"@l\n"); \
__asm (" mov.aa %"#areg", %a15\n"); \
__asm ("#$$ep"); }

Definition at line 1457 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __abs_stdreal

#define __abs_stdreal Ifx__abs_stdreal

Definition at line 1649 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __absb

#define __absb Ifx__absb

Definition at line 1781 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __absf

#define __absf Ifx__absf

Definition at line 1629 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __absh

#define __absh Ifx__absh

Definition at line 1785 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __abssh

#define __abssh Ifx__abssh

Definition at line 1789 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __addsu

#define __addsu Ifx__addsu

Definition at line 2053 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __cacheawi_bo_post_inc

#define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc

Definition at line 1761 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __cacheiwi

#define __cacheiwi Ifx__cacheiwi

Definition at line 1765 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __checkrange

#define __checkrange Ifx__checkrange

Definition at line 1621 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __checkrangef

#define __checkrangef Ifx__checkrangef

Definition at line 1645 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __checkrangeX

#define __checkrangeX Ifx__checkrangeX

Definition at line 1605 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __clssf

#define __clssf Ifx__clssf

Definition at line 1677 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __cmpAndSwap

#define __cmpAndSwap Ifx__cmpAndSwap

Definition at line 2089 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __crc32

#define __crc32 Ifx__crc32

Definition at line 2113 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __extractbyte1

#define __extractbyte1 Ifx__extractbyte1

Definition at line 1793 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __extractbyte2

#define __extractbyte2 Ifx__extractbyte2

Definition at line 1797 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __extractbyte3

#define __extractbyte3 Ifx__extractbyte3

Definition at line 1801 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __extractbyte4

#define __extractbyte4 Ifx__extractbyte4

Definition at line 1805 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __extracthw1

#define __extracthw1 Ifx__extracthw1

Definition at line 1809 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __extracthw2

#define __extracthw2 Ifx__extracthw2

Definition at line 1813 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __extractubyte1

#define __extractubyte1 Ifx__extractubyte1

Definition at line 1817 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __extractubyte2

#define __extractubyte2 Ifx__extractubyte2

Definition at line 1821 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __extractubyte3

#define __extractubyte3 Ifx__extractubyte3

Definition at line 1825 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __extractubyte4

#define __extractubyte4 Ifx__extractubyte4

Definition at line 1829 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __extractuhw1

#define __extractuhw1 Ifx__extractuhw1

Definition at line 1833 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __extractuhw2

#define __extractuhw2 Ifx__extractuhw2

Definition at line 1837 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __fabs

#define __fabs Ifx__fabs

Definition at line 2025 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __fabsf

#define __fabsf Ifx__fabsf

Definition at line 2029 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __fixpoint_to_float32

#define __fixpoint_to_float32 Ifx__fixpoint_to_float32

Definition at line 2101 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __float_to_fract

#define __float_to_fract Ifx__float_to_fract

Definition at line 1681 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __fract_to_float

#define __fract_to_float Ifx__fract_to_float

Definition at line 1685 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __fract_to_sfract

#define __fract_to_sfract Ifx__fract_to_sfract

Definition at line 1713 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __geqf

#define __geqf Ifx__geqf

Definition at line 1673 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __getA11

#define __getA11 Ifx__getA11

Definition at line 2105 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __getbit

#define __getbit Ifx__getbit

Definition at line 1749 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __getbyte1

#define __getbyte1 Ifx__getbyte1

Definition at line 1841 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __getbyte2

#define __getbyte2 Ifx__getbyte2

Definition at line 1845 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __getbyte3

#define __getbyte3 Ifx__getbyte3

Definition at line 1849 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __getbyte4

#define __getbyte4 Ifx__getbyte4

Definition at line 1853 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __getDataParamRet

#define __getDataParamRet Ifx__getDataParamRet

Definition at line 1573 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __getfract

#define __getfract Ifx__getfract

Definition at line 1689 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __gethw1

#define __gethw1 Ifx__gethw1

Definition at line 1857 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __gethw2

#define __gethw2 Ifx__gethw2

Definition at line 1861 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __getubyte1

#define __getubyte1 Ifx__getubyte1

Definition at line 1865 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __getubyte2

#define __getubyte2 Ifx__getubyte2

Definition at line 1869 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __getubyte3

#define __getubyte3 Ifx__getubyte3

Definition at line 1873 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __getubyte4

#define __getubyte4 Ifx__getubyte4

Definition at line 1877 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __getuhw1

#define __getuhw1 Ifx__getuhw1

Definition at line 1881 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __getuhw2

#define __getuhw2 Ifx__getuhw2

Definition at line 1885 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __imaskldmst

#define __imaskldmst Ifx__imaskldmst

Definition at line 1753 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __initpackb

#define __initpackb Ifx__initpackb

Definition at line 1889 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __initpackbl

#define __initpackbl Ifx__initpackbl

Definition at line 1893 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __initpackhw

#define __initpackhw Ifx__initpackhw

Definition at line 1897 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __initpackhwl

#define __initpackhwl Ifx__initpackhwl

Definition at line 1901 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __initupackb

#define __initupackb Ifx__initupackb

Definition at line 1905 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __initupackhw

#define __initupackhw Ifx__initupackhw

Definition at line 1909 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __insertbyte1

#define __insertbyte1 Ifx__insertbyte1

Definition at line 1913 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __insertbyte2

#define __insertbyte2 Ifx__insertbyte2

Definition at line 1917 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __insertbyte3

#define __insertbyte3 Ifx__insertbyte3

Definition at line 1921 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __insertbyte4

#define __insertbyte4 Ifx__insertbyte4

Definition at line 1925 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __inserthw1

#define __inserthw1 Ifx__inserthw1

Definition at line 1929 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __inserthw2

#define __inserthw2 Ifx__inserthw2

Definition at line 1933 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __insertubyte1

#define __insertubyte1 Ifx__insertubyte1

Definition at line 1937 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __insertubyte2

#define __insertubyte2 Ifx__insertubyte2

Definition at line 1941 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __insertubyte3

#define __insertubyte3 Ifx__insertubyte3

Definition at line 1945 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __insertubyte4

#define __insertubyte4 Ifx__insertubyte4

Definition at line 1949 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __insertuhw1

#define __insertuhw1 Ifx__insertuhw1

Definition at line 1953 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __insertuhw2

#define __insertuhw2 Ifx__insertuhw2

Definition at line 1957 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __jump_and_link

#define __jump_and_link Ifx__jump_and_link

Definition at line 1561 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __jumpBackToLink

#define __jumpBackToLink Ifx__jumpBackToLink

Definition at line 1589 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __jumpToFunction

#define __jumpToFunction Ifx__jumpToFunction

Definition at line 1581 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __jumpToFunctionWithLink

#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink

Definition at line 1585 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __ldmst

#define __ldmst Ifx__ldmst

Definition at line 2065 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __leqf

#define __leqf Ifx__leqf

Definition at line 1669 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __mac_r_sf

#define __mac_r_sf Ifx__mac_r_sf

Definition at line 1693 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __mac_sf

#define __mac_sf Ifx__mac_sf

Definition at line 1697 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __max_stdreal

#define __max_stdreal Ifx__max_stdreal

Definition at line 1657 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __maxf

#define __maxf Ifx__maxf

Definition at line 1637 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __maxX

#define __maxX Ifx__maxX

Definition at line 1597 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __mem_barrier

#define __mem_barrier Ifx__mem_barrier

Definition at line 2069 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __min_stdreal

#define __min_stdreal Ifx__min_stdreal

Definition at line 1653 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __minb

#define __minb Ifx__minb

Definition at line 1961 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __minbu

#define __minbu Ifx__minbu

Definition at line 1965 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __minf

#define __minf Ifx__minf

Definition at line 1633 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __minh

#define __minh Ifx__minh

Definition at line 1969 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __minhu

#define __minhu Ifx__minhu

Definition at line 1973 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __minX

#define __minX Ifx__minX

Definition at line 1593 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __moveToAddrParam0

#define __moveToAddrParam0 Ifx__moveToAddrParam0

Definition at line 1577 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __moveToDataParam0

#define __moveToDataParam0 Ifx__moveToDataParam0

Definition at line 1565 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __moveToDataParamRet

#define __moveToDataParamRet Ifx__moveToDataParamRet

Definition at line 1569 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __mulfractfract

#define __mulfractfract Ifx__mulfractfract

Definition at line 1701 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __mulfractlong

#define __mulfractlong Ifx__mulfractlong

Definition at line 1705 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __mulsc

#define __mulsc Ifx__mulsc

Definition at line 1769 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __neqf

#define __neqf Ifx__neqf

Definition at line 1665 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __non_return_call

#define __non_return_call Ifx__non_return_call

Definition at line 1557 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __nops

#define __nops Ifx__nops

Definition at line 2077 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __nops1000

#define __nops1000 Ifx__nops1000

Definition at line 2081 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __parity

#define __parity Ifx__parity

Definition at line 2033 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __putbit

#define __putbit Ifx__putbit

Definition at line 1757 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __rol

#define __rol Ifx__rol

Definition at line 1773 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __ror

#define __ror Ifx__ror

Definition at line 1777 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __round16

#define __round16 Ifx__round16

Definition at line 1709 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __roundf

#define __roundf Ifx__roundf

Definition at line 1625 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __s16_to_sfract

#define __s16_to_sfract Ifx__s16_to_sfract

Definition at line 1721 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __satb

#define __satb Ifx__satb

Definition at line 2037 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __satbu

#define __satbu Ifx__satbu

Definition at line 2041 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __sath

#define __sath Ifx__sath

Definition at line 2045 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __sathu

#define __sathu Ifx__sathu

Definition at line 2049 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __saturate

#define __saturate Ifx__saturate

Definition at line 1609 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __saturate_stdreal

#define __saturate_stdreal Ifx__saturate_stdreal

Definition at line 1661 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __saturatef

#define __saturatef Ifx__saturatef

Definition at line 1641 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __saturateX

#define __saturateX Ifx__saturateX

Definition at line 1601 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __setareg

#define __setareg Ifx__setareg

Definition at line 2093 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __setbyte1

#define __setbyte1 Ifx__setbyte1

Definition at line 1977 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __setbyte2

#define __setbyte2 Ifx__setbyte2

Definition at line 1981 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __setbyte3

#define __setbyte3 Ifx__setbyte3

Definition at line 1985 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __setbyte4

#define __setbyte4 Ifx__setbyte4

Definition at line 1989 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __sethw1

#define __sethw1 Ifx__sethw1

Definition at line 1993 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __sethw2

#define __sethw2 Ifx__sethw2

Definition at line 1997 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __setStackPointer

#define __setStackPointer Ifx__setStackPointer

Definition at line 2109 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __setubyte1

#define __setubyte1 Ifx__setubyte1

Definition at line 2001 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __setubyte2

#define __setubyte2 Ifx__setubyte2

Definition at line 2005 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __setubyte3

#define __setubyte3 Ifx__setubyte3

Definition at line 2009 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __setubyte4

#define __setubyte4 Ifx__setubyte4

Definition at line 2013 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __setuhw1

#define __setuhw1 Ifx__setuhw1

Definition at line 2017 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __setuhw2

#define __setuhw2 Ifx__setuhw2

Definition at line 2021 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __sfract_to_s16

#define __sfract_to_s16 Ifx__sfract_to_s16

Definition at line 1725 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __sfract_to_u16

#define __sfract_to_u16 Ifx__sfract_to_u16

Definition at line 1729 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __shaaccum

#define __shaaccum Ifx__shaaccum

Definition at line 1733 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __shafracts

#define __shafracts Ifx__shafracts

Definition at line 1737 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __shasfracts

#define __shasfracts Ifx__shasfracts

Definition at line 1741 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __sqrf

#define __sqrf Ifx__sqrf

Definition at line 1613 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __sqrtf

#define __sqrtf Ifx__sqrtf

Definition at line 1617 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __stopPerfCounters

#define __stopPerfCounters Ifx__stopPerfCounters

Definition at line 2097 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __subs

#define __subs Ifx__subs

Definition at line 2057 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __subsu

#define __subsu Ifx__subsu

Definition at line 2061 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __swap

#define __swap Ifx__swap

Definition at line 2085 of file IfxCpu_IntrinsicsDcc2G.h.

◆ __u16_to_sfract

#define __u16_to_sfract Ifx__u16_to_sfract

Definition at line 1745 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__setareg

#define Ifx__setareg | ( | areg,
 |  | val
 | ) | ___setareg(areg,val)

Insert n NOP instruction

Definition at line 1455 of file IfxCpu_IntrinsicsDcc2G.h.

◆ NOP

#define NOP Ifx__NOP

Definition at line 2073 of file IfxCpu_IntrinsicsDcc2G.h.

Function Documentation

◆ Ifx__crc32()

asm volatile unsigned int Ifx__crc32 | ( | uint32 | b,
 |  | uint32 | a
 | ) |  |

Definition at line 1504 of file IfxCpu_IntrinsicsDcc2G.h.

Referenced by IfxCpu_calculateCrc32().

◆ Ifx__fixpoint_to_float32()

asm float Ifx__fixpoint_to_float32 | ( | fract | value,
 |  | sint32 | shift
 | ) |  |

Convert a fixpoint value to float32.

This function converts a value from a fixpoint format to a float32 format.

Parameters
value | value to be converted.
shift | position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
Returns
Returns the converted value in the float32 format.

Definition at line 1484 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__getA11()

asm volatile void* Ifx__getA11 ( void )

Definition at line 1491 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__getDataParamRet()

asm volatile unsigned int Ifx__getDataParamRet ( void )

Definition at line 88 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__jumpBackToLink()

asm volatile void Ifx__jumpBackToLink ( void )

Definition at line 111 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__jumpToFunction()

IFX_INLINE void Ifx__jumpToFunction ( const void * fun )

Definition at line 101 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__jumpToFunctionWithLink()

IFX_INLINE void Ifx__jumpToFunctionWithLink ( const void * fun )

Definition at line 106 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__moveToAddrParam0()

asm volatile void Ifx__moveToAddrParam0 ( const void * var )

Definition at line 94 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__moveToDataParam0()

asm volatile void Ifx__moveToDataParam0 ( unsigned int var )

Definition at line 74 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__moveToDataParamRet()

asm volatile void Ifx__moveToDataParamRet ( unsigned int var )

Definition at line 81 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__setStackPointer()

asm void Ifx__setStackPointer ( void * stackAddr )

Definition at line 1497 of file IfxCpu_IntrinsicsDcc2G.h.

◆ Ifx__stopPerfCounters()

asm volatile void Ifx__stopPerfCounters ( void )

Definition at line 1465 of file IfxCpu_IntrinsicsDcc2G.h.

◆ IfxCpu_calculateCrc32()

IFX_INLINE unsigned int IfxCpu_calculateCrc32 | ( | uint32 * | startaddress,
 |  | uint8 | length
 | ) |  |

Definition at line 1511 of file IfxCpu_IntrinsicsDcc2G.h.

◆ IfxCpu_getRandomVal()

asm volatile uint32 IfxCpu_getRandomVal | ( | uint32 | a,
 |  | uint32 | x,
 |  | uint32 | m
 | ) |  |

Generate the Random value.

This function generates the random value by taking a valid seed and limits.

Parameters
a | lower limit.
x | valid seed value.
m | upper limit.
Returns
Returns the random value.

Definition at line 1534 of file IfxCpu_IntrinsicsDcc2G.h.


iLLD_TC26B: IfxCpu_IntrinsicsGhs.h File Reference

  • Cpu
  • Std
Macros | Typedefs | Functions
IfxCpu_IntrinsicsGhs.h File Reference
#include "Ifx_Types.h"
#include <intrinsics.h>
Include dependency graph for IfxCpu_IntrinsicsGhs.h:

Go to the source code of this file.

Macros

#define | STRINGIFY(x) #x
#define | Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
#define | Ifx__mem_barrier __asm__ volatile("":::"memory");
#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__saturate(X, Min, Max) ( __min(__max(X, Min), Max) )
#define | Ifx__saturateu(X, Min, Max) ( __minu(__maxu(X, Min), Max) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__fract_to_sfract Ifx__round16
#define | Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
#define | Ifx__imaskldmst(address, value, bitoffset, bits) __imaskldmst((int *)address, value, bitoffset, bits)
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address, value, bitoffset,1)
#define | Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
#define | Ifx__setareg(areg, val)
#define | __non_return_call Ifx__non_return_call
#define | __jump_and_link Ifx__jump_and_link
#define | __moveToDataParam0 Ifx__moveToDataParam0
#define | __moveToDataParamRet Ifx__moveToDataParamRet
#define | __getDataParamRet Ifx__getDataParamRet
#define | __moveToAddrParam0 Ifx__moveToAddrParam0
#define | __jumpToFunction Ifx__jumpToFunction
#define | __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
#define | __jumpBackToLink Ifx__jumpBackToLink
#define | __mem_barrier Ifx__mem_barrier
#define | __minX Ifx__minX
#define | __maxX Ifx__maxX
#define | __saturateX Ifx__saturateX
#define | __checkrangeX Ifx__checkrangeX
#define | __saturate Ifx__saturate
#define | __saturateu Ifx__saturateu
#define | __sqrf Ifx__sqrf
#define | __sqrtf Ifx__sqrtf
#define | __checkrange Ifx__checkrange
#define | __roundf Ifx__roundf
#define | __absf Ifx__absf
#define | __minf Ifx__minf
#define | __maxf Ifx__maxf
#define | __saturatef Ifx__saturatef
#define | __checkrangef Ifx__checkrangef
#define | __abs_stdreal Ifx__abs_stdreal
#define | __min_stdreal Ifx__min_stdreal
#define | __max_stdreal Ifx__max_stdreal
#define | __saturate_stdreal Ifx__saturate_stdreal
#define | __neqf Ifx__neqf
#define | __leqf Ifx__leqf
#define | __geqf Ifx__geqf
#define | __clssf Ifx__clssf
#define | __fract_to_float Ifx__fract_to_float
#define | __float_to_fract Ifx__float_to_fract
#define | __getfract Ifx__getfract
#define | __mac_r_sf Ifx__mac_r_sf
#define | __mac_sf Ifx__mac_sf
#define | __mulfractfract Ifx__mulfractfract
#define | __mulfractlong Ifx__mulfractlong
#define | __round16 Ifx__round16
#define | __fract_to_sfract Ifx__fract_to_sfract
#define | __float_to_sfract Ifx__float_to_sfract
#define | __s16_to_sfract Ifx__s16_to_sfract
#define | __sfract_to_s16 Ifx__sfract_to_s16
#define | __sfract_to_u16 Ifx__sfract_to_u16
#define | __shaaccum Ifx__shaaccum
#define | __shafracts Ifx__shafracts
#define | __shasfracts Ifx__shasfracts
#define | __u16_to_sfract Ifx__u16_to_sfract
#define | __extr Ifx__extr
#define | __extru Ifx__extru
#define | __getbit Ifx__getbit
#define | __insert Ifx__insert
#define | __putbit Ifx__putbit
#define | __cacheawi Ifx__cacheawi
#define | __cacheiwi Ifx__cacheiwi
#define | __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
#define | __mulsc Ifx__mulsc
#define | __rol Ifx__rol
#define | __ror Ifx__ror
#define | __extractbyte1 Ifx__extractbyte1
#define | __extractbyte2 Ifx__extractbyte2
#define | __extractbyte3 Ifx__extractbyte3
#define | __extractbyte4 Ifx__extractbyte4
#define | __extracthw1 Ifx__extracthw1
#define | __extracthw2 Ifx__extracthw2
#define | __extractubyte1 Ifx__extractubyte1
#define | __extractubyte2 Ifx__extractubyte2
#define | __extractubyte3 Ifx__extractubyte3
#define | __extractubyte4 Ifx__extractubyte4
#define | __extractuhw1 Ifx__extractuhw1
#define | __extractuhw2 Ifx__extractuhw2
#define | __getbyte1 Ifx__getbyte1
#define | __getbyte2 Ifx__getbyte2
#define | __getbyte3 Ifx__getbyte3
#define | __getbyte4 Ifx__getbyte4
#define | __gethw1 Ifx__gethw1
#define | __gethw2 Ifx__gethw2
#define | __getubyte1 Ifx__getubyte1
#define | __getubyte2 Ifx__getubyte2
#define | __getubyte3 Ifx__getubyte3
#define | __getubyte4 Ifx__getubyte4
#define | __getuhw1 Ifx__getuhw1
#define | __getuhw2 Ifx__getuhw2
#define | __initpackb Ifx__initpackb
#define | __initpackbl Ifx__initpackbl
#define | __initpackhw Ifx__initpackhw
#define | __initpackhwl Ifx__initpackhwl
#define | __initupackb Ifx__initupackb
#define | __initupackhw Ifx__initupackhw
#define | __insertbyte1 Ifx__insertbyte1
#define | __insertbyte2 Ifx__insertbyte2
#define | __insertbyte3 Ifx__insertbyte3
#define | __insertbyte4 Ifx__insertbyte4
#define | __insertubyte1 Ifx__insertubyte1
#define | __insertubyte2 Ifx__insertubyte2
#define | __insertubyte3 Ifx__insertubyte3
#define | __insertubyte4 Ifx__insertubyte4
#define | __inserthw1 Ifx__inserthw1
#define | __inserthw2 Ifx__inserthw2
#define | __insertuhw1 Ifx__insertuhw1
#define | __insertuhw2 Ifx__insertuhw2
#define | __setbyte1 Ifx__setbyte1
#define | __setbyte2 Ifx__setbyte2
#define | __setbyte3 Ifx__setbyte3
#define | __setbyte4 Ifx__setbyte4
#define | __sethw1 Ifx__sethw1
#define | __sethw2 Ifx__sethw2
#define | __setubyte1 Ifx__setubyte1
#define | __setubyte2 Ifx__setubyte2
#define | __setubyte3 Ifx__setubyte3
#define | __setubyte4 Ifx__setubyte4
#define | __setuhw1 Ifx__setuhw1
#define | __setuhw2 Ifx__setuhw2
#define | __ldmst Ifx__ldmst
#define | __nops Ifx__nops
#define | __swap Ifx__swap
#define | NOP Ifx__NOP
#define | __setareg Ifx__setareg
#define | __stopPerfCounters Ifx__stopPerfCounters
#define | __cmpAndSwap Ifx__cmpAndSwap
#define | __fixpoint_to_float32 Ifx__fixpoint_to_float32
#define | __getA11 Ifx__getA11
#define | __setStackPointer Ifx__setStackPointer
#define | __popcnt Ifx__popcnt
#define | __cacheai Ifx__cacheai

Typedefs

typedef void(* voidfunc) ()

Functions

IFX_INLINE void | Ifx__jump_and_link (void(*fun)(void))
IFX_INLINE void | Ifx__moveToDataParam0 (unsigned int var)
IFX_INLINE void | Ifx__moveToDataParamRet (unsigned int var)
IFX_INLINE unsigned int | Ifx__getDataParamRet (void)
IFX_INLINE void | Ifx__moveToAddrParam0 (const void *var)
IFX_INLINE void | Ifx__jumpToFunction (void(*fun)(void))
IFX_INLINE void | Ifx__jumpToFunctionWithLink (void(*fun)(void))
IFX_INLINE void | Ifx__jumpBackToLink (void)
IFX_INLINE sint16 | Ifx__clssf (sfract a)
IFX_INLINE float | Ifx__fract_to_float (fract a)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE fract | Ifx__getfract (laccum a)
IFX_INLINE sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
IFX_INLINE sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
IFX_INLINE long | Ifx__mulfractfract (fract a, fract b)
IFX_INLINE long | Ifx__mulfractlong (fract a, long b)
IFX_INLINE sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE sfract | Ifx__s16_to_sfract (sint16 a)
IFX_INLINE sint16 | Ifx__sfract_to_s16 (sfract a)
IFX_INLINE uint16 | Ifx__sfract_to_u16 (sfract a)
__asm__ laccum | Ifx__shaaccum (laccum a, sint32 b)
IFX_INLINE fract | Ifx__shafracts (fract a, sint32 b)
IFX_INLINE sfract | Ifx__shasfracts (sfract a, sint32 b)
IFX_INLINE sfract | Ifx__u16_to_sfract (uint16 a)
IFX_INLINE sint32 | Ifx__extr (sint32 a, uint32 p, uint32 w)
IFX_INLINE uint32 | Ifx__extru (uint32 a, uint32 p, uint32 w)
IFX_INLINE sint32 | Ifx__insert (sint32 a, sint32 b, sint32 p, const sint32 w)
IFX_INLINE void | Ifx__cacheawi (uint8 *p)
IFX_INLINE void | Ifx__cacheiwi (uint8 *p)
IFX_INLINE uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
IFX_INLINE sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
IFX_INLINE uint32 | Ifx__rol (uint32 operand, uint32 count)
IFX_INLINE uint32 | Ifx__ror (uint32 operand, uint32 count)
IFX_INLINE sint8 | Ifx__extractbyte1 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte2 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte3 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte4 (__packb a)
IFX_INLINE sint16 | Ifx__extracthw1 (__packhw a)
IFX_INLINE sint16 | Ifx__extracthw2 (__packhw a)
IFX_INLINE uint8 | Ifx__extractubyte1 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte2 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte3 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte4 (__upackb a)
IFX_INLINE uint16 | Ifx__extractuhw1 (__upackhw a)
IFX_INLINE uint16 | Ifx__extractuhw2 (__upackhw a)
IFX_INLINE sint8 | Ifx__getbyte1 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte2 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte3 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte4 (__packb *a)
IFX_INLINE sint16 | Ifx__gethw1 (__packhw *a)
IFX_INLINE sint16 | Ifx__gethw2 (__packhw *a)
IFX_INLINE uint8 | Ifx__getubyte1 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte2 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte3 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte4 (__upackb *a)
IFX_INLINE uint16 | Ifx__getuhw1 (__upackhw *a)
IFX_INLINE uint16 | Ifx__getuhw2 (__upackhw *a)
IFX_INLINE __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
IFX_INLINE __packb | Ifx__initpackbl (long a)
IFX_INLINE __packhw | Ifx__initpackhw (sint16 a, sint16 b)
IFX_INLINE __packhw | Ifx__initpackhwl (long a)
IFX_INLINE __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
IFX_INLINE __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
IFX_INLINE __packb | Ifx__insertbyte1 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte2 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte3 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte4 (__packb a, sint8 b)
IFX_INLINE __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
IFX_INLINE __packhw | Ifx__inserthw1 (__packhw a, sint16 b)
IFX_INLINE __packhw | Ifx__inserthw2 (__packhw a, sint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
IFX_INLINE void | Ifx__setbyte1 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte2 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte3 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte4 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__sethw1 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__sethw2 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__setubyte1 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte2 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte3 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte4 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setuhw1 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__setuhw2 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE uint32 | Ifx__swap (void *place, uint32 value)
IFX_INLINE void | Ifx__stopPerfCounters (void)
IFX_INLINE unsigned int | Ifx__cmpAndSwap (unsigned int volatile *address, unsigned int value, unsigned int condition)
This function is a implementation of a binary semaphore using compare and swap instruction. More...
IFX_INLINE float32 | Ifx__fixpoint_to_float32 (fract value, sint32 shift)
Convert a fixpoint value to float32. More...
IFX_INLINE void * | Ifx__getA11 (void)
IFX_INLINE void | Ifx__setStackPointer (void *stackAddr)
IFX_INLINE uint32 | IfxCpu_calculateCrc32 (uint32 *startaddress, uint8 length)
IFX_INLINE uint32 | IfxCpu_getRandomVal (uint32 a, uint32 x, uint32 m)
IFX_INLINE void | Ifx__cacheai (uint8 *p)

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_IntrinsicsGhs.h.

Macro Definition Documentation

◆ __abs_stdreal

#define __abs_stdreal Ifx__abs_stdreal

Definition at line 1294 of file IfxCpu_IntrinsicsGhs.h.

◆ __absf

#define __absf Ifx__absf

Definition at line 1274 of file IfxCpu_IntrinsicsGhs.h.

◆ __cacheai

#define __cacheai Ifx__cacheai

Definition at line 1698 of file IfxCpu_IntrinsicsGhs.h.

◆ __cacheawi

#define __cacheawi Ifx__cacheawi

Definition at line 1414 of file IfxCpu_IntrinsicsGhs.h.

◆ __cacheawi_bo_post_inc

#define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc

Definition at line 1422 of file IfxCpu_IntrinsicsGhs.h.

◆ __cacheiwi

#define __cacheiwi Ifx__cacheiwi

Definition at line 1418 of file IfxCpu_IntrinsicsGhs.h.

◆ __checkrange

#define __checkrange Ifx__checkrange

Definition at line 1266 of file IfxCpu_IntrinsicsGhs.h.

◆ __checkrangef

#define __checkrangef Ifx__checkrangef

Definition at line 1290 of file IfxCpu_IntrinsicsGhs.h.

◆ __checkrangeX

#define __checkrangeX Ifx__checkrangeX

Definition at line 1246 of file IfxCpu_IntrinsicsGhs.h.

◆ __clssf

#define __clssf Ifx__clssf

Definition at line 1322 of file IfxCpu_IntrinsicsGhs.h.

◆ __cmpAndSwap

#define __cmpAndSwap Ifx__cmpAndSwap

Definition at line 1678 of file IfxCpu_IntrinsicsGhs.h.

◆ __extr

#define __extr Ifx__extr

Definition at line 1394 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractbyte1

#define __extractbyte1 Ifx__extractbyte1

Definition at line 1438 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractbyte2

#define __extractbyte2 Ifx__extractbyte2

Definition at line 1442 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractbyte3

#define __extractbyte3 Ifx__extractbyte3

Definition at line 1446 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractbyte4

#define __extractbyte4 Ifx__extractbyte4

Definition at line 1450 of file IfxCpu_IntrinsicsGhs.h.

◆ __extracthw1

#define __extracthw1 Ifx__extracthw1

Definition at line 1454 of file IfxCpu_IntrinsicsGhs.h.

◆ __extracthw2

#define __extracthw2 Ifx__extracthw2

Definition at line 1458 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractubyte1

#define __extractubyte1 Ifx__extractubyte1

Definition at line 1462 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractubyte2

#define __extractubyte2 Ifx__extractubyte2

Definition at line 1466 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractubyte3

#define __extractubyte3 Ifx__extractubyte3

Definition at line 1470 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractubyte4

#define __extractubyte4 Ifx__extractubyte4

Definition at line 1474 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractuhw1

#define __extractuhw1 Ifx__extractuhw1

Definition at line 1478 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractuhw2

#define __extractuhw2 Ifx__extractuhw2

Definition at line 1482 of file IfxCpu_IntrinsicsGhs.h.

◆ __extru

#define __extru Ifx__extru

Definition at line 1398 of file IfxCpu_IntrinsicsGhs.h.

◆ __fixpoint_to_float32

#define __fixpoint_to_float32 Ifx__fixpoint_to_float32

Definition at line 1682 of file IfxCpu_IntrinsicsGhs.h.

◆ __float_to_fract

#define __float_to_fract Ifx__float_to_fract

Definition at line 1330 of file IfxCpu_IntrinsicsGhs.h.

◆ __float_to_sfract

#define __float_to_sfract Ifx__float_to_sfract

Definition at line 1362 of file IfxCpu_IntrinsicsGhs.h.

◆ __fract_to_float

#define __fract_to_float Ifx__fract_to_float

Definition at line 1326 of file IfxCpu_IntrinsicsGhs.h.

◆ __fract_to_sfract

#define __fract_to_sfract Ifx__fract_to_sfract

Definition at line 1358 of file IfxCpu_IntrinsicsGhs.h.

◆ __geqf

#define __geqf Ifx__geqf

Definition at line 1318 of file IfxCpu_IntrinsicsGhs.h.

◆ __getA11

#define __getA11 Ifx__getA11

Definition at line 1686 of file IfxCpu_IntrinsicsGhs.h.

◆ __getbit

#define __getbit Ifx__getbit

Definition at line 1402 of file IfxCpu_IntrinsicsGhs.h.

◆ __getbyte1

#define __getbyte1 Ifx__getbyte1

Definition at line 1486 of file IfxCpu_IntrinsicsGhs.h.

◆ __getbyte2

#define __getbyte2 Ifx__getbyte2

Definition at line 1490 of file IfxCpu_IntrinsicsGhs.h.

◆ __getbyte3

#define __getbyte3 Ifx__getbyte3

Definition at line 1494 of file IfxCpu_IntrinsicsGhs.h.

◆ __getbyte4

#define __getbyte4 Ifx__getbyte4

Definition at line 1498 of file IfxCpu_IntrinsicsGhs.h.

◆ __getDataParamRet

#define __getDataParamRet Ifx__getDataParamRet

Definition at line 1210 of file IfxCpu_IntrinsicsGhs.h.

◆ __getfract

#define __getfract Ifx__getfract

Definition at line 1334 of file IfxCpu_IntrinsicsGhs.h.

◆ __gethw1

#define __gethw1 Ifx__gethw1

Definition at line 1502 of file IfxCpu_IntrinsicsGhs.h.

◆ __gethw2

#define __gethw2 Ifx__gethw2

Definition at line 1506 of file IfxCpu_IntrinsicsGhs.h.

◆ __getubyte1

#define __getubyte1 Ifx__getubyte1

Definition at line 1510 of file IfxCpu_IntrinsicsGhs.h.

◆ __getubyte2

#define __getubyte2 Ifx__getubyte2

Definition at line 1514 of file IfxCpu_IntrinsicsGhs.h.

◆ __getubyte3

#define __getubyte3 Ifx__getubyte3

Definition at line 1518 of file IfxCpu_IntrinsicsGhs.h.

◆ __getubyte4

#define __getubyte4 Ifx__getubyte4

Definition at line 1522 of file IfxCpu_IntrinsicsGhs.h.

◆ __getuhw1

#define __getuhw1 Ifx__getuhw1

Definition at line 1526 of file IfxCpu_IntrinsicsGhs.h.

◆ __getuhw2

#define __getuhw2 Ifx__getuhw2

Definition at line 1530 of file IfxCpu_IntrinsicsGhs.h.

◆ __initpackb

#define __initpackb Ifx__initpackb

Definition at line 1534 of file IfxCpu_IntrinsicsGhs.h.

◆ __initpackbl

#define __initpackbl Ifx__initpackbl

Definition at line 1538 of file IfxCpu_IntrinsicsGhs.h.

◆ __initpackhw

#define __initpackhw Ifx__initpackhw

Definition at line 1542 of file IfxCpu_IntrinsicsGhs.h.

◆ __initpackhwl

#define __initpackhwl Ifx__initpackhwl

Definition at line 1546 of file IfxCpu_IntrinsicsGhs.h.

◆ __initupackb

#define __initupackb Ifx__initupackb

Definition at line 1550 of file IfxCpu_IntrinsicsGhs.h.

◆ __initupackhw

#define __initupackhw Ifx__initupackhw

Definition at line 1554 of file IfxCpu_IntrinsicsGhs.h.

◆ __insert

#define __insert Ifx__insert

Definition at line 1406 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertbyte1

#define __insertbyte1 Ifx__insertbyte1

Definition at line 1558 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertbyte2

#define __insertbyte2 Ifx__insertbyte2

Definition at line 1562 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertbyte3

#define __insertbyte3 Ifx__insertbyte3

Definition at line 1566 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertbyte4

#define __insertbyte4 Ifx__insertbyte4

Definition at line 1570 of file IfxCpu_IntrinsicsGhs.h.

◆ __inserthw1

#define __inserthw1 Ifx__inserthw1

Definition at line 1590 of file IfxCpu_IntrinsicsGhs.h.

◆ __inserthw2

#define __inserthw2 Ifx__inserthw2

Definition at line 1594 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertubyte1

#define __insertubyte1 Ifx__insertubyte1

Definition at line 1574 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertubyte2

#define __insertubyte2 Ifx__insertubyte2

Definition at line 1578 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertubyte3

#define __insertubyte3 Ifx__insertubyte3

Definition at line 1582 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertubyte4

#define __insertubyte4 Ifx__insertubyte4

Definition at line 1586 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertuhw1

#define __insertuhw1 Ifx__insertuhw1

Definition at line 1598 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertuhw2

#define __insertuhw2 Ifx__insertuhw2

Definition at line 1602 of file IfxCpu_IntrinsicsGhs.h.

◆ __jump_and_link

#define __jump_and_link Ifx__jump_and_link

Definition at line 1198 of file IfxCpu_IntrinsicsGhs.h.

◆ __jumpBackToLink

#define __jumpBackToLink Ifx__jumpBackToLink

Definition at line 1226 of file IfxCpu_IntrinsicsGhs.h.

◆ __jumpToFunction

#define __jumpToFunction Ifx__jumpToFunction

Definition at line 1218 of file IfxCpu_IntrinsicsGhs.h.

◆ __jumpToFunctionWithLink

#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink

Definition at line 1222 of file IfxCpu_IntrinsicsGhs.h.

◆ __ldmst

#define __ldmst Ifx__ldmst

Definition at line 1654 of file IfxCpu_IntrinsicsGhs.h.

◆ __leqf

#define __leqf Ifx__leqf

Definition at line 1314 of file IfxCpu_IntrinsicsGhs.h.

◆ __mac_r_sf

#define __mac_r_sf Ifx__mac_r_sf

Definition at line 1338 of file IfxCpu_IntrinsicsGhs.h.

◆ __mac_sf

#define __mac_sf Ifx__mac_sf

Definition at line 1342 of file IfxCpu_IntrinsicsGhs.h.

◆ __max_stdreal

#define __max_stdreal Ifx__max_stdreal

Definition at line 1302 of file IfxCpu_IntrinsicsGhs.h.

◆ __maxf

#define __maxf Ifx__maxf

Definition at line 1282 of file IfxCpu_IntrinsicsGhs.h.

◆ __maxX

#define __maxX Ifx__maxX

Definition at line 1238 of file IfxCpu_IntrinsicsGhs.h.

◆ __mem_barrier

#define __mem_barrier Ifx__mem_barrier

Definition at line 1230 of file IfxCpu_IntrinsicsGhs.h.

◆ __min_stdreal

#define __min_stdreal Ifx__min_stdreal

Definition at line 1298 of file IfxCpu_IntrinsicsGhs.h.

◆ __minf

#define __minf Ifx__minf

Definition at line 1278 of file IfxCpu_IntrinsicsGhs.h.

◆ __minX

#define __minX Ifx__minX

Definition at line 1234 of file IfxCpu_IntrinsicsGhs.h.

◆ __moveToAddrParam0

#define __moveToAddrParam0 Ifx__moveToAddrParam0

Definition at line 1214 of file IfxCpu_IntrinsicsGhs.h.

◆ __moveToDataParam0

#define __moveToDataParam0 Ifx__moveToDataParam0

Definition at line 1202 of file IfxCpu_IntrinsicsGhs.h.

◆ __moveToDataParamRet

#define __moveToDataParamRet Ifx__moveToDataParamRet

Definition at line 1206 of file IfxCpu_IntrinsicsGhs.h.

◆ __mulfractfract

#define __mulfractfract Ifx__mulfractfract

Definition at line 1346 of file IfxCpu_IntrinsicsGhs.h.

◆ __mulfractlong

#define __mulfractlong Ifx__mulfractlong

Definition at line 1350 of file IfxCpu_IntrinsicsGhs.h.

◆ __mulsc

#define __mulsc Ifx__mulsc

Definition at line 1426 of file IfxCpu_IntrinsicsGhs.h.

◆ __neqf

#define __neqf Ifx__neqf

Definition at line 1310 of file IfxCpu_IntrinsicsGhs.h.

◆ __non_return_call

#define __non_return_call Ifx__non_return_call

Definition at line 1194 of file IfxCpu_IntrinsicsGhs.h.

◆ __nops

#define __nops Ifx__nops

Definition at line 1658 of file IfxCpu_IntrinsicsGhs.h.

◆ __popcnt

#define __popcnt Ifx__popcnt

Definition at line 1694 of file IfxCpu_IntrinsicsGhs.h.

◆ __putbit

#define __putbit Ifx__putbit

Definition at line 1410 of file IfxCpu_IntrinsicsGhs.h.

◆ __rol

#define __rol Ifx__rol

Definition at line 1430 of file IfxCpu_IntrinsicsGhs.h.

◆ __ror

#define __ror Ifx__ror

Definition at line 1434 of file IfxCpu_IntrinsicsGhs.h.

◆ __round16

#define __round16 Ifx__round16

Definition at line 1354 of file IfxCpu_IntrinsicsGhs.h.

◆ __roundf

#define __roundf Ifx__roundf

Definition at line 1270 of file IfxCpu_IntrinsicsGhs.h.

◆ __s16_to_sfract

#define __s16_to_sfract Ifx__s16_to_sfract

Definition at line 1366 of file IfxCpu_IntrinsicsGhs.h.

◆ __saturate

#define __saturate Ifx__saturate

Definition at line 1250 of file IfxCpu_IntrinsicsGhs.h.

◆ __saturate_stdreal

#define __saturate_stdreal Ifx__saturate_stdreal

Definition at line 1306 of file IfxCpu_IntrinsicsGhs.h.

◆ __saturatef

#define __saturatef Ifx__saturatef

Definition at line 1286 of file IfxCpu_IntrinsicsGhs.h.

◆ __saturateu

#define __saturateu Ifx__saturateu

Definition at line 1254 of file IfxCpu_IntrinsicsGhs.h.

◆ __saturateX

#define __saturateX Ifx__saturateX

Definition at line 1242 of file IfxCpu_IntrinsicsGhs.h.

◆ __setareg

#define __setareg Ifx__setareg

Definition at line 1670 of file IfxCpu_IntrinsicsGhs.h.

◆ __setbyte1

#define __setbyte1 Ifx__setbyte1

Definition at line 1606 of file IfxCpu_IntrinsicsGhs.h.

◆ __setbyte2

#define __setbyte2 Ifx__setbyte2

Definition at line 1610 of file IfxCpu_IntrinsicsGhs.h.

◆ __setbyte3

#define __setbyte3 Ifx__setbyte3

Definition at line 1614 of file IfxCpu_IntrinsicsGhs.h.

◆ __setbyte4

#define __setbyte4 Ifx__setbyte4

Definition at line 1618 of file IfxCpu_IntrinsicsGhs.h.

◆ __sethw1

#define __sethw1 Ifx__sethw1

Definition at line 1622 of file IfxCpu_IntrinsicsGhs.h.

◆ __sethw2

#define __sethw2 Ifx__sethw2

Definition at line 1626 of file IfxCpu_IntrinsicsGhs.h.

◆ __setStackPointer

#define __setStackPointer Ifx__setStackPointer

Definition at line 1690 of file IfxCpu_IntrinsicsGhs.h.

◆ __setubyte1

#define __setubyte1 Ifx__setubyte1

Definition at line 1630 of file IfxCpu_IntrinsicsGhs.h.

◆ __setubyte2

#define __setubyte2 Ifx__setubyte2

Definition at line 1634 of file IfxCpu_IntrinsicsGhs.h.

◆ __setubyte3

#define __setubyte3 Ifx__setubyte3

Definition at line 1638 of file IfxCpu_IntrinsicsGhs.h.

◆ __setubyte4

#define __setubyte4 Ifx__setubyte4

Definition at line 1642 of file IfxCpu_IntrinsicsGhs.h.

◆ __setuhw1

#define __setuhw1 Ifx__setuhw1

Definition at line 1646 of file IfxCpu_IntrinsicsGhs.h.

◆ __setuhw2

#define __setuhw2 Ifx__setuhw2

Definition at line 1650 of file IfxCpu_IntrinsicsGhs.h.

◆ __sfract_to_s16

#define __sfract_to_s16 Ifx__sfract_to_s16

Definition at line 1370 of file IfxCpu_IntrinsicsGhs.h.

◆ __sfract_to_u16

#define __sfract_to_u16 Ifx__sfract_to_u16

Definition at line 1374 of file IfxCpu_IntrinsicsGhs.h.

◆ __shaaccum

#define __shaaccum Ifx__shaaccum

Definition at line 1378 of file IfxCpu_IntrinsicsGhs.h.

◆ __shafracts

#define __shafracts Ifx__shafracts

Definition at line 1382 of file IfxCpu_IntrinsicsGhs.h.

◆ __shasfracts

#define __shasfracts Ifx__shasfracts

Definition at line 1386 of file IfxCpu_IntrinsicsGhs.h.

◆ __sqrf

#define __sqrf Ifx__sqrf

Definition at line 1258 of file IfxCpu_IntrinsicsGhs.h.

◆ __sqrtf

#define __sqrtf Ifx__sqrtf

Definition at line 1262 of file IfxCpu_IntrinsicsGhs.h.

◆ __stopPerfCounters

#define __stopPerfCounters Ifx__stopPerfCounters

Definition at line 1674 of file IfxCpu_IntrinsicsGhs.h.

◆ __swap

#define __swap Ifx__swap

Definition at line 1662 of file IfxCpu_IntrinsicsGhs.h.

◆ __u16_to_sfract

#define __u16_to_sfract Ifx__u16_to_sfract

Definition at line 1390 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mem_barrier

#define Ifx__mem_barrier __asm__ volatile("":::"memory");

Insert a memory barrier

Definition at line 108 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__non_return_call

#define Ifx__non_return_call ( fun ) __asm__ volatile ("ji %0"::"a"(fun))

Function call without return

Definition at line 60 of file IfxCpu_IntrinsicsGhs.h.

Referenced by Ifx__jumpToFunction().

◆ Ifx__setareg

#define Ifx__setareg | ( | areg,
 |  | val
 | ) |
Value:
{ uint32 reg_val= (uint32)val; \
asm volatile (" mov.a\t %"#areg",%0"::"d"(reg_val)); }
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1082 of file IfxCpu_IntrinsicsGhs.h.

◆ NOP

#define NOP Ifx__NOP

Definition at line 1666 of file IfxCpu_IntrinsicsGhs.h.

◆ STRINGIFY

#define STRINGIFY ( x ) #x

Definition at line 54 of file IfxCpu_IntrinsicsGhs.h.

Typedef Documentation

◆ voidfunc

typedef void(* voidfunc) ()

Definition at line 56 of file IfxCpu_IntrinsicsGhs.h.

Function Documentation

◆ Ifx__cacheai()

IFX_INLINE void Ifx__cacheai ( uint8 * p )

Invalidate cache address "p". Generates CACHEA.I [Ab].

Definition at line 1185 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__cmpAndSwap()

IFX_INLINE unsigned int Ifx__cmpAndSwap | ( | unsigned int volatile * | address,
 |  | unsigned int | value,
 |  | unsigned int | condition
 | ) |  |

This function is a implementation of a binary semaphore using compare and swap instruction.

Parameters
address | address of resource.
value | This variable is updated with status of address
condition | if the value of address matches with the value of condition, then swap of value & address occurs.

Definition at line 1102 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__fixpoint_to_float32()

IFX_INLINE float32 Ifx__fixpoint_to_float32 | ( | fract | value,
 |  | sint32 | shift
 | ) |  |

Convert a fixpoint value to float32.

This function converts a value from a fixpoint format to a float32 format.

Parameters
value | value to be converted.
shift | position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
Returns
Returns the converted value in the float32 format.

Definition at line 1126 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getA11()

IFX_INLINE void* Ifx__getA11 ( void )

Definition at line 1134 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getDataParamRet()

IFX_INLINE unsigned int Ifx__getDataParamRet ( void )

Definition at line 79 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__jump_and_link()

IFX_INLINE void Ifx__jump_and_link ( void(*)(void) fun )

Jump and link

Definition at line 64 of file IfxCpu_IntrinsicsGhs.h.

Referenced by Ifx__jumpToFunctionWithLink().

◆ Ifx__jumpBackToLink()

IFX_INLINE void Ifx__jumpBackToLink ( void )

Definition at line 101 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__jumpToFunction()

IFX_INLINE void Ifx__jumpToFunction ( void(*)(void) fun )

Definition at line 91 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__jumpToFunctionWithLink()

IFX_INLINE void Ifx__jumpToFunctionWithLink ( void(*)(void) fun )

Definition at line 96 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__moveToAddrParam0()

IFX_INLINE void Ifx__moveToAddrParam0 ( const void * var )

Definition at line 86 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__moveToDataParam0()

IFX_INLINE void Ifx__moveToDataParam0 ( unsigned int var )

Definition at line 69 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__moveToDataParamRet()

IFX_INLINE void Ifx__moveToDataParamRet ( unsigned int var )

Definition at line 74 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setStackPointer()

IFX_INLINE void Ifx__setStackPointer ( void * stackAddr )

Definition at line 1141 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__stopPerfCounters()

IFX_INLINE void Ifx__stopPerfCounters ( void )

__mtcr (CPU_CCTRL, 0);

Definition at line 1088 of file IfxCpu_IntrinsicsGhs.h.

◆ IfxCpu_calculateCrc32()

IFX_INLINE uint32 IfxCpu_calculateCrc32 | ( | uint32 * | startaddress,
 |  | uint8 | length
 | ) |  |

Definition at line 1146 of file IfxCpu_IntrinsicsGhs.h.

◆ IfxCpu_getRandomVal()

IFX_INLINE uint32 IfxCpu_getRandomVal | ( | uint32 | a,
 |  | uint32 | x,
 |  | uint32 | m
 | ) |  |

Definition at line 1158 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC26B: IfxCpu_IntrinsicsGhs2G.h File Reference

  • Cpu
  • Std
Macros | Typedefs | Functions
IfxCpu_IntrinsicsGhs2G.h File Reference
#include "Ifx_Types.h"
#include <intrinsics.h>
Include dependency graph for IfxCpu_IntrinsicsGhs2G.h:

Go to the source code of this file.

Macros

#define | STRINGIFY(x) #x
#define | Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
#define | Ifx__mem_barrier __asm__ volatile("":::"memory");
#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__saturate(X, Min, Max) ( __min(__max(X, Min), Max) )
#define | Ifx__saturateu(X, Min, Max) ( __minu(__maxu(X, Min), Max) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__fract_to_sfract Ifx__round16
#define | Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
#define | Ifx__imaskldmst(address, value, bitoffset, bits) __imaskldmst((int *)address, value, bitoffset, bits)
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address, value, bitoffset,1)
#define | Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
#define | Ifx__setareg(areg, val)
#define | __non_return_call Ifx__non_return_call
#define | __jump_and_link Ifx__jump_and_link
#define | __moveToDataParam0 Ifx__moveToDataParam0
#define | __moveToDataParamRet Ifx__moveToDataParamRet
#define | __getDataParamRet Ifx__getDataParamRet
#define | __moveToAddrParam0 Ifx__moveToAddrParam0
#define | __jumpToFunction Ifx__jumpToFunction
#define | __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
#define | __jumpBackToLink Ifx__jumpBackToLink
#define | __mem_barrier Ifx__mem_barrier
#define | __minX Ifx__minX
#define | __maxX Ifx__maxX
#define | __saturateX Ifx__saturateX
#define | __checkrangeX Ifx__checkrangeX
#define | __saturate Ifx__saturate
#define | __saturateu Ifx__saturateu
#define | __sqrf Ifx__sqrf
#define | __sqrtf Ifx__sqrtf
#define | __checkrange Ifx__checkrange
#define | __roundf Ifx__roundf
#define | __absf Ifx__absf
#define | __minf Ifx__minf
#define | __maxf Ifx__maxf
#define | __saturatef Ifx__saturatef
#define | __checkrangef Ifx__checkrangef
#define | __abs_stdreal Ifx__abs_stdreal
#define | __min_stdreal Ifx__min_stdreal
#define | __max_stdreal Ifx__max_stdreal
#define | __saturate_stdreal Ifx__saturate_stdreal
#define | __neqf Ifx__neqf
#define | __leqf Ifx__leqf
#define | __geqf Ifx__geqf
#define | __clssf Ifx__clssf
#define | __fract_to_float Ifx__fract_to_float
#define | __float_to_fract Ifx__float_to_fract
#define | __getfract Ifx__getfract
#define | __mac_r_sf Ifx__mac_r_sf
#define | __mac_sf Ifx__mac_sf
#define | __mulfractfract Ifx__mulfractfract
#define | __mulfractlong Ifx__mulfractlong
#define | __round16 Ifx__round16
#define | __fract_to_sfract Ifx__fract_to_sfract
#define | __float_to_sfract Ifx__float_to_sfract
#define | __s16_to_sfract Ifx__s16_to_sfract
#define | __sfract_to_s16 Ifx__sfract_to_s16
#define | __sfract_to_u16 Ifx__sfract_to_u16
#define | __shaaccum Ifx__shaaccum
#define | __shafracts Ifx__shafracts
#define | __shasfracts Ifx__shasfracts
#define | __u16_to_sfract Ifx__u16_to_sfract
#define | __extr Ifx__extr
#define | __extru Ifx__extru
#define | __getbit Ifx__getbit
#define | __insert Ifx__insert
#define | __putbit Ifx__putbit
#define | __cacheawi Ifx__cacheawi
#define | __cacheiwi Ifx__cacheiwi
#define | __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
#define | __mulsc Ifx__mulsc
#define | __rol Ifx__rol
#define | __ror Ifx__ror
#define | __extractbyte1 Ifx__extractbyte1
#define | __extractbyte2 Ifx__extractbyte2
#define | __extractbyte3 Ifx__extractbyte3
#define | __extractbyte4 Ifx__extractbyte4
#define | __extracthw1 Ifx__extracthw1
#define | __extracthw2 Ifx__extracthw2
#define | __extractubyte1 Ifx__extractubyte1
#define | __extractubyte2 Ifx__extractubyte2
#define | __extractubyte3 Ifx__extractubyte3
#define | __extractubyte4 Ifx__extractubyte4
#define | __extractuhw1 Ifx__extractuhw1
#define | __extractuhw2 Ifx__extractuhw2
#define | __getbyte1 Ifx__getbyte1
#define | __getbyte2 Ifx__getbyte2
#define | __getbyte3 Ifx__getbyte3
#define | __getbyte4 Ifx__getbyte4
#define | __gethw1 Ifx__gethw1
#define | __gethw2 Ifx__gethw2
#define | __getubyte1 Ifx__getubyte1
#define | __getubyte2 Ifx__getubyte2
#define | __getubyte3 Ifx__getubyte3
#define | __getubyte4 Ifx__getubyte4
#define | __getuhw1 Ifx__getuhw1
#define | __getuhw2 Ifx__getuhw2
#define | __initpackb Ifx__initpackb
#define | __initpackbl Ifx__initpackbl
#define | __initpackhw Ifx__initpackhw
#define | __initpackhwl Ifx__initpackhwl
#define | __initupackb Ifx__initupackb
#define | __initupackhw Ifx__initupackhw
#define | __insertbyte1 Ifx__insertbyte1
#define | __insertbyte2 Ifx__insertbyte2
#define | __insertbyte3 Ifx__insertbyte3
#define | __insertbyte4 Ifx__insertbyte4
#define | __insertubyte1 Ifx__insertubyte1
#define | __insertubyte2 Ifx__insertubyte2
#define | __insertubyte3 Ifx__insertubyte3
#define | __insertubyte4 Ifx__insertubyte4
#define | __inserthw1 Ifx__inserthw1
#define | __inserthw2 Ifx__inserthw2
#define | __insertuhw1 Ifx__insertuhw1
#define | __insertuhw2 Ifx__insertuhw2
#define | __setbyte1 Ifx__setbyte1
#define | __setbyte2 Ifx__setbyte2
#define | __setbyte3 Ifx__setbyte3
#define | __setbyte4 Ifx__setbyte4
#define | __sethw1 Ifx__sethw1
#define | __sethw2 Ifx__sethw2
#define | __setubyte1 Ifx__setubyte1
#define | __setubyte2 Ifx__setubyte2
#define | __setubyte3 Ifx__setubyte3
#define | __setubyte4 Ifx__setubyte4
#define | __setuhw1 Ifx__setuhw1
#define | __setuhw2 Ifx__setuhw2
#define | __ldmst Ifx__ldmst
#define | __nops Ifx__nops
#define | __swap Ifx__swap
#define | NOP Ifx__NOP
#define | __setareg Ifx__setareg
#define | __stopPerfCounters Ifx__stopPerfCounters
#define | __cmpAndSwap Ifx__cmpAndSwap
#define | __fixpoint_to_float32 Ifx__fixpoint_to_float32
#define | __getA11 Ifx__getA11
#define | __setStackPointer Ifx__setStackPointer
#define | __popcnt Ifx__popcnt
#define | __cacheai Ifx__cacheai

Typedefs

typedef void(* voidfunc) ()

Functions

IFX_INLINE void | Ifx__jump_and_link (void(*fun)(void))
IFX_INLINE void | Ifx__moveToDataParam0 (unsigned int var)
IFX_INLINE void | Ifx__moveToDataParamRet (unsigned int var)
IFX_INLINE unsigned int | Ifx__getDataParamRet (void)
IFX_INLINE void | Ifx__moveToAddrParam0 (const void *var)
IFX_INLINE void | Ifx__jumpToFunction (void(*fun)(void))
IFX_INLINE void | Ifx__jumpToFunctionWithLink (void(*fun)(void))
IFX_INLINE void | Ifx__jumpBackToLink (void)
IFX_INLINE sint16 | Ifx__clssf (sfract a)
IFX_INLINE float | Ifx__fract_to_float (fract a)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE fract | Ifx__getfract (laccum a)
IFX_INLINE sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
IFX_INLINE sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
IFX_INLINE long | Ifx__mulfractfract (fract a, fract b)
IFX_INLINE long | Ifx__mulfractlong (fract a, long b)
IFX_INLINE sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE sfract | Ifx__s16_to_sfract (sint16 a)
IFX_INLINE sint16 | Ifx__sfract_to_s16 (sfract a)
IFX_INLINE uint16 | Ifx__sfract_to_u16 (sfract a)
__asm__ laccum | Ifx__shaaccum (laccum a, sint32 b)
IFX_INLINE fract | Ifx__shafracts (fract a, sint32 b)
IFX_INLINE sfract | Ifx__shasfracts (sfract a, sint32 b)
IFX_INLINE sfract | Ifx__u16_to_sfract (uint16 a)
IFX_INLINE sint32 | Ifx__extr (sint32 a, uint32 p, uint32 w)
IFX_INLINE uint32 | Ifx__extru (uint32 a, uint32 p, uint32 w)
IFX_INLINE sint32 | Ifx__insert (sint32 a, sint32 b, sint32 p, const sint32 w)
IFX_INLINE void | Ifx__cacheawi (uint8 *p)
IFX_INLINE void | Ifx__cacheiwi (uint8 *p)
IFX_INLINE uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
IFX_INLINE sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
IFX_INLINE uint32 | Ifx__rol (uint32 operand, uint32 count)
IFX_INLINE uint32 | Ifx__ror (uint32 operand, uint32 count)
IFX_INLINE sint8 | Ifx__extractbyte1 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte2 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte3 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte4 (__packb a)
IFX_INLINE sint16 | Ifx__extracthw1 (__packhw a)
IFX_INLINE sint16 | Ifx__extracthw2 (__packhw a)
IFX_INLINE uint8 | Ifx__extractubyte1 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte2 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte3 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte4 (__upackb a)
IFX_INLINE uint16 | Ifx__extractuhw1 (__upackhw a)
IFX_INLINE uint16 | Ifx__extractuhw2 (__upackhw a)
IFX_INLINE sint8 | Ifx__getbyte1 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte2 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte3 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte4 (__packb *a)
IFX_INLINE sint16 | Ifx__gethw1 (__packhw *a)
IFX_INLINE sint16 | Ifx__gethw2 (__packhw *a)
IFX_INLINE uint8 | Ifx__getubyte1 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte2 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte3 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte4 (__upackb *a)
IFX_INLINE uint16 | Ifx__getuhw1 (__upackhw *a)
IFX_INLINE uint16 | Ifx__getuhw2 (__upackhw *a)
IFX_INLINE __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
IFX_INLINE __packb | Ifx__initpackbl (long a)
IFX_INLINE __packhw | Ifx__initpackhw (sint16 a, sint16 b)
IFX_INLINE __packhw | Ifx__initpackhwl (long a)
IFX_INLINE __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
IFX_INLINE __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
IFX_INLINE __packb | Ifx__insertbyte1 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte2 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte3 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte4 (__packb a, sint8 b)
IFX_INLINE __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
IFX_INLINE __packhw | Ifx__inserthw1 (__packhw a, sint16 b)
IFX_INLINE __packhw | Ifx__inserthw2 (__packhw a, sint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
IFX_INLINE void | Ifx__setbyte1 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte2 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte3 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte4 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__sethw1 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__sethw2 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__setubyte1 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte2 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte3 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte4 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setuhw1 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__setuhw2 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE uint32 | Ifx__swap (void *place, uint32 value)
IFX_INLINE void | Ifx__stopPerfCounters (void)
IFX_INLINE unsigned int | Ifx__cmpAndSwap (unsigned int volatile *address, unsigned int value, unsigned int condition)
This function is a implementation of a binary semaphore using compare and swap instruction. More...
IFX_INLINE float32 | Ifx__fixpoint_to_float32 (fract value, sint32 shift)
Convert a fixpoint value to float32. More...
IFX_INLINE void * | Ifx__getA11 (void)
IFX_INLINE void | Ifx__setStackPointer (void *stackAddr)
IFX_INLINE uint32 | IfxCpu_calculateCrc32 (uint32 *startaddress, uint8 length)
IFX_INLINE uint32 | IfxCpu_getRandomVal (uint32 a, uint32 x, uint32 m)
IFX_INLINE void | Ifx__cacheai (uint8 *p)

Macro Definition Documentation

◆ __abs_stdreal

#define __abs_stdreal Ifx__abs_stdreal

Definition at line 1294 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __absf

#define __absf Ifx__absf

Definition at line 1274 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __cacheai

#define __cacheai Ifx__cacheai

Definition at line 1698 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __cacheawi

#define __cacheawi Ifx__cacheawi

Definition at line 1414 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __cacheawi_bo_post_inc

#define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc

Definition at line 1422 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __cacheiwi

#define __cacheiwi Ifx__cacheiwi

Definition at line 1418 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __checkrange

#define __checkrange Ifx__checkrange

Definition at line 1266 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __checkrangef

#define __checkrangef Ifx__checkrangef

Definition at line 1290 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __checkrangeX

#define __checkrangeX Ifx__checkrangeX

Definition at line 1246 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __clssf

#define __clssf Ifx__clssf

Definition at line 1322 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __cmpAndSwap

#define __cmpAndSwap Ifx__cmpAndSwap

Definition at line 1678 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __extr

#define __extr Ifx__extr

Definition at line 1394 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __extractbyte1

#define __extractbyte1 Ifx__extractbyte1

Definition at line 1438 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __extractbyte2

#define __extractbyte2 Ifx__extractbyte2

Definition at line 1442 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __extractbyte3

#define __extractbyte3 Ifx__extractbyte3

Definition at line 1446 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __extractbyte4

#define __extractbyte4 Ifx__extractbyte4

Definition at line 1450 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __extracthw1

#define __extracthw1 Ifx__extracthw1

Definition at line 1454 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __extracthw2

#define __extracthw2 Ifx__extracthw2

Definition at line 1458 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __extractubyte1

#define __extractubyte1 Ifx__extractubyte1

Definition at line 1462 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __extractubyte2

#define __extractubyte2 Ifx__extractubyte2

Definition at line 1466 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __extractubyte3

#define __extractubyte3 Ifx__extractubyte3

Definition at line 1470 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __extractubyte4

#define __extractubyte4 Ifx__extractubyte4

Definition at line 1474 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __extractuhw1

#define __extractuhw1 Ifx__extractuhw1

Definition at line 1478 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __extractuhw2

#define __extractuhw2 Ifx__extractuhw2

Definition at line 1482 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __extru

#define __extru Ifx__extru

Definition at line 1398 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __fixpoint_to_float32

#define __fixpoint_to_float32 Ifx__fixpoint_to_float32

Definition at line 1682 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __float_to_fract

#define __float_to_fract Ifx__float_to_fract

Definition at line 1330 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __float_to_sfract

#define __float_to_sfract Ifx__float_to_sfract

Definition at line 1362 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __fract_to_float

#define __fract_to_float Ifx__fract_to_float

Definition at line 1326 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __fract_to_sfract

#define __fract_to_sfract Ifx__fract_to_sfract

Definition at line 1358 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __geqf

#define __geqf Ifx__geqf

Definition at line 1318 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __getA11

#define __getA11 Ifx__getA11

Definition at line 1686 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __getbit

#define __getbit Ifx__getbit

Definition at line 1402 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __getbyte1

#define __getbyte1 Ifx__getbyte1

Definition at line 1486 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __getbyte2

#define __getbyte2 Ifx__getbyte2

Definition at line 1490 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __getbyte3

#define __getbyte3 Ifx__getbyte3

Definition at line 1494 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __getbyte4

#define __getbyte4 Ifx__getbyte4

Definition at line 1498 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __getDataParamRet

#define __getDataParamRet Ifx__getDataParamRet

Definition at line 1210 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __getfract

#define __getfract Ifx__getfract

Definition at line 1334 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __gethw1

#define __gethw1 Ifx__gethw1

Definition at line 1502 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __gethw2

#define __gethw2 Ifx__gethw2

Definition at line 1506 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __getubyte1

#define __getubyte1 Ifx__getubyte1

Definition at line 1510 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __getubyte2

#define __getubyte2 Ifx__getubyte2

Definition at line 1514 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __getubyte3

#define __getubyte3 Ifx__getubyte3

Definition at line 1518 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __getubyte4

#define __getubyte4 Ifx__getubyte4

Definition at line 1522 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __getuhw1

#define __getuhw1 Ifx__getuhw1

Definition at line 1526 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __getuhw2

#define __getuhw2 Ifx__getuhw2

Definition at line 1530 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __initpackb

#define __initpackb Ifx__initpackb

Definition at line 1534 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __initpackbl

#define __initpackbl Ifx__initpackbl

Definition at line 1538 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __initpackhw

#define __initpackhw Ifx__initpackhw

Definition at line 1542 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __initpackhwl

#define __initpackhwl Ifx__initpackhwl

Definition at line 1546 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __initupackb

#define __initupackb Ifx__initupackb

Definition at line 1550 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __initupackhw

#define __initupackhw Ifx__initupackhw

Definition at line 1554 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __insert

#define __insert Ifx__insert

Definition at line 1406 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __insertbyte1

#define __insertbyte1 Ifx__insertbyte1

Definition at line 1558 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __insertbyte2

#define __insertbyte2 Ifx__insertbyte2

Definition at line 1562 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __insertbyte3

#define __insertbyte3 Ifx__insertbyte3

Definition at line 1566 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __insertbyte4

#define __insertbyte4 Ifx__insertbyte4

Definition at line 1570 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __inserthw1

#define __inserthw1 Ifx__inserthw1

Definition at line 1590 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __inserthw2

#define __inserthw2 Ifx__inserthw2

Definition at line 1594 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __insertubyte1

#define __insertubyte1 Ifx__insertubyte1

Definition at line 1574 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __insertubyte2

#define __insertubyte2 Ifx__insertubyte2

Definition at line 1578 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __insertubyte3

#define __insertubyte3 Ifx__insertubyte3

Definition at line 1582 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __insertubyte4

#define __insertubyte4 Ifx__insertubyte4

Definition at line 1586 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __insertuhw1

#define __insertuhw1 Ifx__insertuhw1

Definition at line 1598 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __insertuhw2

#define __insertuhw2 Ifx__insertuhw2

Definition at line 1602 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __jump_and_link

#define __jump_and_link Ifx__jump_and_link

Definition at line 1198 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __jumpBackToLink

#define __jumpBackToLink Ifx__jumpBackToLink

Definition at line 1226 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __jumpToFunction

#define __jumpToFunction Ifx__jumpToFunction

Definition at line 1218 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __jumpToFunctionWithLink

#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink

Definition at line 1222 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __ldmst

#define __ldmst Ifx__ldmst

Definition at line 1654 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __leqf

#define __leqf Ifx__leqf

Definition at line 1314 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __mac_r_sf

#define __mac_r_sf Ifx__mac_r_sf

Definition at line 1338 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __mac_sf

#define __mac_sf Ifx__mac_sf

Definition at line 1342 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __max_stdreal

#define __max_stdreal Ifx__max_stdreal

Definition at line 1302 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __maxf

#define __maxf Ifx__maxf

Definition at line 1282 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __maxX

#define __maxX Ifx__maxX

Definition at line 1238 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __mem_barrier

#define __mem_barrier Ifx__mem_barrier

Definition at line 1230 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __min_stdreal

#define __min_stdreal Ifx__min_stdreal

Definition at line 1298 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __minf

#define __minf Ifx__minf

Definition at line 1278 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __minX

#define __minX Ifx__minX

Definition at line 1234 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __moveToAddrParam0

#define __moveToAddrParam0 Ifx__moveToAddrParam0

Definition at line 1214 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __moveToDataParam0

#define __moveToDataParam0 Ifx__moveToDataParam0

Definition at line 1202 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __moveToDataParamRet

#define __moveToDataParamRet Ifx__moveToDataParamRet

Definition at line 1206 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __mulfractfract

#define __mulfractfract Ifx__mulfractfract

Definition at line 1346 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __mulfractlong

#define __mulfractlong Ifx__mulfractlong

Definition at line 1350 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __mulsc

#define __mulsc Ifx__mulsc

Definition at line 1426 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __neqf

#define __neqf Ifx__neqf

Definition at line 1310 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __non_return_call

#define __non_return_call Ifx__non_return_call

Definition at line 1194 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __nops

#define __nops Ifx__nops

Definition at line 1658 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __popcnt

#define __popcnt Ifx__popcnt

Definition at line 1694 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __putbit

#define __putbit Ifx__putbit

Definition at line 1410 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __rol

#define __rol Ifx__rol

Definition at line 1430 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __ror

#define __ror Ifx__ror

Definition at line 1434 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __round16

#define __round16 Ifx__round16

Definition at line 1354 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __roundf

#define __roundf Ifx__roundf

Definition at line 1270 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __s16_to_sfract

#define __s16_to_sfract Ifx__s16_to_sfract

Definition at line 1366 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __saturate

#define __saturate Ifx__saturate

Definition at line 1250 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __saturate_stdreal

#define __saturate_stdreal Ifx__saturate_stdreal

Definition at line 1306 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __saturatef

#define __saturatef Ifx__saturatef

Definition at line 1286 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __saturateu

#define __saturateu Ifx__saturateu

Definition at line 1254 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __saturateX

#define __saturateX Ifx__saturateX

Definition at line 1242 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __setareg

#define __setareg Ifx__setareg

Definition at line 1670 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __setbyte1

#define __setbyte1 Ifx__setbyte1

Definition at line 1606 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __setbyte2

#define __setbyte2 Ifx__setbyte2

Definition at line 1610 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __setbyte3

#define __setbyte3 Ifx__setbyte3

Definition at line 1614 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __setbyte4

#define __setbyte4 Ifx__setbyte4

Definition at line 1618 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __sethw1

#define __sethw1 Ifx__sethw1

Definition at line 1622 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __sethw2

#define __sethw2 Ifx__sethw2

Definition at line 1626 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __setStackPointer

#define __setStackPointer Ifx__setStackPointer

Definition at line 1690 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __setubyte1

#define __setubyte1 Ifx__setubyte1

Definition at line 1630 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __setubyte2

#define __setubyte2 Ifx__setubyte2

Definition at line 1634 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __setubyte3

#define __setubyte3 Ifx__setubyte3

Definition at line 1638 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __setubyte4

#define __setubyte4 Ifx__setubyte4

Definition at line 1642 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __setuhw1

#define __setuhw1 Ifx__setuhw1

Definition at line 1646 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __setuhw2

#define __setuhw2 Ifx__setuhw2

Definition at line 1650 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __sfract_to_s16

#define __sfract_to_s16 Ifx__sfract_to_s16

Definition at line 1370 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __sfract_to_u16

#define __sfract_to_u16 Ifx__sfract_to_u16

Definition at line 1374 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __shaaccum

#define __shaaccum Ifx__shaaccum

Definition at line 1378 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __shafracts

#define __shafracts Ifx__shafracts

Definition at line 1382 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __shasfracts

#define __shasfracts Ifx__shasfracts

Definition at line 1386 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __sqrf

#define __sqrf Ifx__sqrf

Definition at line 1258 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __sqrtf

#define __sqrtf Ifx__sqrtf

Definition at line 1262 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __stopPerfCounters

#define __stopPerfCounters Ifx__stopPerfCounters

Definition at line 1674 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __swap

#define __swap Ifx__swap

Definition at line 1662 of file IfxCpu_IntrinsicsGhs2G.h.

◆ __u16_to_sfract

#define __u16_to_sfract Ifx__u16_to_sfract

Definition at line 1390 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__mem_barrier

#define Ifx__mem_barrier __asm__ volatile("":::"memory");

Insert a memory barrier

Definition at line 108 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__non_return_call

#define Ifx__non_return_call ( fun ) __asm__ volatile ("ji %0"::"a"(fun))

Function call without return

Definition at line 60 of file IfxCpu_IntrinsicsGhs2G.h.

Referenced by Ifx__jumpToFunction().

◆ Ifx__setareg

#define Ifx__setareg | ( | areg,
 |  | val
 | ) |
Value:
{ uint32 reg_val= (uint32)val; \
asm volatile (" mov.a\t %"#areg",%0"::"d"(reg_val)); }
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1082 of file IfxCpu_IntrinsicsGhs2G.h.

◆ NOP

#define NOP Ifx__NOP

Definition at line 1666 of file IfxCpu_IntrinsicsGhs2G.h.

◆ STRINGIFY

#define STRINGIFY ( x ) #x

Definition at line 54 of file IfxCpu_IntrinsicsGhs2G.h.

Typedef Documentation

◆ voidfunc

typedef void(* voidfunc) ()

Definition at line 56 of file IfxCpu_IntrinsicsGhs2G.h.

Function Documentation

◆ Ifx__cacheai()

IFX_INLINE void Ifx__cacheai ( uint8 * p )

Invalidate cache address "p". Generates CACHEA.I [Ab].

Definition at line 1185 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__cmpAndSwap()

IFX_INLINE unsigned int Ifx__cmpAndSwap | ( | unsigned int volatile * | address,
 |  | unsigned int | value,
 |  | unsigned int | condition
 | ) |  |

This function is a implementation of a binary semaphore using compare and swap instruction.

Parameters
address | address of resource.
value | This variable is updated with status of address
condition | if the value of address matches with the value of condition, then swap of value & address occurs.

Definition at line 1102 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__fixpoint_to_float32()

IFX_INLINE float32 Ifx__fixpoint_to_float32 | ( | fract | value,
 |  | sint32 | shift
 | ) |  |

Convert a fixpoint value to float32.

This function converts a value from a fixpoint format to a float32 format.

Parameters
value | value to be converted.
shift | position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
Returns
Returns the converted value in the float32 format.

Definition at line 1126 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__getA11()

IFX_INLINE void* Ifx__getA11 ( void )

Definition at line 1134 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__getDataParamRet()

IFX_INLINE unsigned int Ifx__getDataParamRet ( void )

Definition at line 79 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__jump_and_link()

IFX_INLINE void Ifx__jump_and_link ( void(*)(void) fun )

Jump and link

Definition at line 64 of file IfxCpu_IntrinsicsGhs2G.h.

Referenced by Ifx__jumpToFunctionWithLink().

◆ Ifx__jumpBackToLink()

IFX_INLINE void Ifx__jumpBackToLink ( void )

Definition at line 101 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__jumpToFunction()

IFX_INLINE void Ifx__jumpToFunction ( void(*)(void) fun )

Definition at line 91 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__jumpToFunctionWithLink()

IFX_INLINE void Ifx__jumpToFunctionWithLink ( void(*)(void) fun )

Definition at line 96 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__moveToAddrParam0()

IFX_INLINE void Ifx__moveToAddrParam0 ( const void * var )

Definition at line 86 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__moveToDataParam0()

IFX_INLINE void Ifx__moveToDataParam0 ( unsigned int var )

Definition at line 69 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__moveToDataParamRet()

IFX_INLINE void Ifx__moveToDataParamRet ( unsigned int var )

Definition at line 74 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__setStackPointer()

IFX_INLINE void Ifx__setStackPointer ( void * stackAddr )

Definition at line 1141 of file IfxCpu_IntrinsicsGhs2G.h.

◆ Ifx__stopPerfCounters()

IFX_INLINE void Ifx__stopPerfCounters ( void )

__mtcr (CPU_CCTRL, 0);

Definition at line 1088 of file IfxCpu_IntrinsicsGhs2G.h.

◆ IfxCpu_calculateCrc32()

IFX_INLINE uint32 IfxCpu_calculateCrc32 | ( | uint32 * | startaddress,
 |  | uint8 | length
 | ) |  |

Definition at line 1146 of file IfxCpu_IntrinsicsGhs2G.h.

◆ IfxCpu_getRandomVal()

IFX_INLINE uint32 IfxCpu_getRandomVal | ( | uint32 | a,
 |  | uint32 | x,
 |  | uint32 | m
 | ) |  |

Definition at line 1158 of file IfxCpu_IntrinsicsGhs2G.h.


iLLD_TC26B: IfxCpu_IntrinsicsGnuc.h File Reference

  • Cpu
  • Std
Macros | Functions
IfxCpu_IntrinsicsGnuc.h File Reference
#include "Ifx_Types.h"
#include "machine/intrinsics.h"
Include dependency graph for IfxCpu_IntrinsicsGnuc.h:

Go to the source code of this file.

Macros

#define | IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 1
#define | STRINGIFY(x) #x
#define | Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__saturate(X, Min, Max) ( Ifx__min(Ifx__max(X, Min), Max) )
#define | Ifx__saturateu(X, Min, Max) ( Ifx__minu(Ifx__maxu(X, Min), Max) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
#define | Ifx__imaskldmst(address, value, bitoffset, bits)
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address, value, bitoffset,1)
#define | Ifx__disable() __asm__ volatile ("disable" : : : "memory")
#define | Ifx__enable() __asm__ volatile ("enable" : : : "memory")
#define | Ifx__abs(a) __builtin_abs(a)
#define | Ifx__clz(a) __builtin_clz(a)
#define | Ifx__mem_barrier __asm__ volatile("":::"memory");
#define | Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
#define | Ifx__setareg(areg, val)
#define | __non_return_call Ifx__non_return_call
#define | __jump_and_link Ifx__jump_and_link
#define | __moveToDataParam0 Ifx__moveToDataParam0
#define | __moveToDataParamRet Ifx__moveToDataParamRet
#define | __getDataParamRet Ifx__getDataParamRet
#define | __moveToAddrParam0 Ifx__moveToAddrParam0
#define | __jumpToFunction Ifx__jumpToFunction
#define | __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
#define | __jumpBackToLink Ifx__jumpBackToLink
#define | __minX Ifx__minX
#define | __maxX Ifx__maxX
#define | __saturateX Ifx__saturateX
#define | __checkrangeX Ifx__checkrangeX
#define | __saturate Ifx__saturate
#define | __saturateu Ifx__saturateu
#define | __max Ifx__max
#define | __maxs Ifx__maxs
#define | __maxu Ifx__maxu
#define | __min Ifx__min
#define | __mins Ifx__mins
#define | __minu Ifx__minu
#define | __sqrtf Ifx__sqrtf
#define | __sqrf Ifx__sqrf
#define | __checkrange Ifx__checkrange
#define | __roundf Ifx__roundf
#define | __absf Ifx__absf
#define | __saturatef Ifx__saturatef
#define | __minf Ifx__minf
#define | __maxf Ifx__maxf
#define | __checkrangef Ifx__checkrangef
#define | __abs_stdreal Ifx__abs_stdreal
#define | __saturate_stdreal Ifx__saturate_stdreal
#define | __min_stdreal Ifx__min_stdreal
#define | __max_stdreal Ifx__max_stdreal
#define | __neqf Ifx__neqf
#define | __leqf Ifx__leqf
#define | __geqf Ifx__geqf
#define | __clssf Ifx__clssf
#define | __fract_to_float Ifx__fract_to_float
#define | __fract_to_sfract Ifx__fract_to_sfract
#define | __float_to_sfract Ifx__float_to_sfract
#define | __float_to_fract Ifx__float_to_fract
#define | __getfract Ifx__getfract
#define | __mac_r_sf Ifx__mac_r_sf
#define | __mac_sf Ifx__mac_sf
#define | __mulfractfract Ifx__mulfractfract
#define | __mulfractlong Ifx__mulfractlong
#define | __round16 Ifx__round16
#define | __s16_to_sfract Ifx__s16_to_sfract
#define | __sfract_to_s16 Ifx__sfract_to_s16
#define | __sfract_to_u16 Ifx__sfract_to_u16
#define | __shaaccum Ifx__shaaccum
#define | __shafracts Ifx__shafracts
#define | __shasfracts Ifx__shasfracts
#define | __u16_to_sfract Ifx__u16_to_sfract
#define | __extr Ifx__extr
#define | __extru Ifx__extru
#define | __getbit Ifx__getbit
#define | __ins Ifx__ins
#define | __insert Ifx__insert
#define | __insn Ifx__insn
#define | __putbit Ifx__putbit
#define | __imaskldmst Ifx__imaskldmst
#define | __bisr Ifx__bisr
#define | __disable Ifx__disable
#define | __disable_and_save Ifx__disable_and_save
#define | __enable Ifx__enable
#define | __restore Ifx__restore
#define | __syscall Ifx__syscall
#define | __tric_syscall Ifx__tric_syscall
#define | __cacheawi Ifx__cacheawi
#define | __cacheiwi Ifx__cacheiwi
#define | __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
#define | __mulsc Ifx__mulsc
#define | __rol Ifx__rol
#define | __ror Ifx__ror
#define | __extractbyte1 Ifx__extractbyte1
#define | __extractbyte2 Ifx__extractbyte2
#define | __extractbyte3 Ifx__extractbyte3
#define | __extractbyte4 Ifx__extractbyte4
#define | __extracthw1 Ifx__extracthw1
#define | __extracthw2 Ifx__extracthw2
#define | __extractubyte1 Ifx__extractubyte1
#define | __extractubyte2 Ifx__extractubyte2
#define | __extractubyte3 Ifx__extractubyte3
#define | __extractubyte4 Ifx__extractubyte4
#define | __extractuhw1 Ifx__extractuhw1
#define | __extractuhw2 Ifx__extractuhw2
#define | __getbyte1 Ifx__getbyte1
#define | __getbyte2 Ifx__getbyte2
#define | __getbyte3 Ifx__getbyte3
#define | __getbyte4 Ifx__getbyte4
#define | __gethw1 Ifx__gethw1
#define | __gethw2 Ifx__gethw2
#define | __getubyte1 Ifx__getubyte1
#define | __getubyte2 Ifx__getubyte2
#define | __getubyte3 Ifx__getubyte3
#define | __getubyte4 Ifx__getubyte4
#define | __getuhw1 Ifx__getuhw1
#define | __getuhw2 Ifx__getuhw2
#define | __setbyte1 Ifx__setbyte1
#define | __setbyte2 Ifx__setbyte2
#define | __setbyte3 Ifx__setbyte3
#define | __setbyte4 Ifx__setbyte4
#define | __sethw1 Ifx__sethw1
#define | __sethw2 Ifx__sethw2
#define | __setubyte1 Ifx__setubyte1
#define | __setubyte2 Ifx__setubyte2
#define | __setubyte3 Ifx__setubyte3
#define | __setubyte4 Ifx__setubyte4
#define | __setuhw1 Ifx__setuhw1
#define | __setuhw2 Ifx__setuhw2
#define | __minhu Ifx__minhu
#define | __minh Ifx__minh
#define | __minbu Ifx__minbu
#define | __minb Ifx__minb
#define | __insertuhw2 Ifx__insertuhw2
#define | __insertuhw1 Ifx__insertuhw1
#define | __inserthw2 Ifx__inserthw2
#define | __inserthw1 Ifx__inserthw1
#define | __insertubyte4 Ifx__insertubyte4
#define | __insertubyte3 Ifx__insertubyte3
#define | __insertubyte2 Ifx__insertubyte2
#define | __insertubyte1 Ifx__insertubyte1
#define | __insertbyte4 Ifx__insertbyte4
#define | __insertbyte3 Ifx__insertbyte3
#define | __insertbyte2 Ifx__insertbyte2
#define | __insertbyte1 Ifx__insertbyte1
#define | __initupackhw Ifx__initupackhw
#define | __initupackb Ifx__initupackb
#define | __initpackhwl Ifx__initpackhwl
#define | __initpackhw Ifx__initpackhw
#define | __initpackbl Ifx__initpackbl
#define | __initpackb Ifx__initpackb
#define | __absb Ifx__absb
#define | __absh Ifx__absh
#define | __abssh Ifx__abssh
#define | __abs Ifx__abs
#define | __absdif Ifx__absdif
#define | __abss Ifx__abss
#define | __clo Ifx__clo
#define | __cls Ifx__cls
#define | __clz Ifx__clz
#define | __fabs Ifx__fabs
#define | __fabsf Ifx__fabsf
#define | __mfcr Ifx__mfcr
#define | __mtcr Ifx__mtcr
#define | __parity Ifx__parity
#define | __satb Ifx__satb
#define | __satbu Ifx__satbu
#define | __sath Ifx__sath
#define | __sathu Ifx__sathu
#define | __adds Ifx__adds
#define | __addsu Ifx__addsu
#define | __subs Ifx__subs
#define | __subsu Ifx__subsu
#define | __debug Ifx__debug
#define | __mem_barrier Ifx__mem_barrier
#define | __dsync Ifx__dsync
#define | __isync Ifx__isync
#define | __ldmst Ifx__ldmst
#define | __nop Ifx__nop
#define | __nops Ifx__nops
#define | __rslcx Ifx__rslcx
#define | __svlcx Ifx__svlcx
#define | __swap Ifx__swap
#define | NOP Ifx__NOP
#define | __setareg Ifx__setareg
#define | __stopPerfCounters Ifx__stopPerfCounters
#define | __cmpAndSwap Ifx__cmpAndSwap
#define | __fixpoint_to_float32 Ifx__fixpoint_to_float32
#define | __getA11 Ifx__getA11
#define | __setStackPointer Ifx__setStackPointer
#define | __crc32 Ifx__crc32
#define | __popcnt Ifx__popcnt
#define | __cacheai Ifx__cacheai

Functions

IFX_INLINE void | Ifx__jump_and_link (void(*fun)(void))
IFX_INLINE void | Ifx__moveToDataParam0 (unsigned int var)
IFX_INLINE void | Ifx__moveToDataParamRet (unsigned int var)
IFX_INLINE unsigned int | Ifx__getDataParamRet (void)
IFX_INLINE void | Ifx__moveToAddrParam0 (const void *var)
IFX_INLINE void | Ifx__jumpToFunction (const void *fun)
IFX_INLINE void | Ifx__jumpToFunctionWithLink (const void *fun)
IFX_INLINE void | Ifx__jumpBackToLink (void)
IFX_INLINE sint32 | Ifx__max (sint32 a, sint32 b)
IFX_INLINE sint32 | Ifx__maxs (sint16 a, sint16 b)
IFX_INLINE uint32 | Ifx__maxu (uint32 a, uint32 b)
IFX_INLINE sint32 | Ifx__min (sint32 a, sint32 b)
IFX_INLINE sint16 | Ifx__mins (sint16 a, sint16 b)
IFX_INLINE uint32 | Ifx__minu (uint32 a, uint32 b)
IFX_INLINE sint16 | Ifx__clssf (sfract a)
IFX_INLINE float | Ifx__fract_to_float (fract a)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE sfract | Ifx__fract_to_sfract (fract a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE fract | Ifx__getfract (laccum a)
IFX_INLINE sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
IFX_INLINE sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
IFX_INLINE long | Ifx__mulfractfract (fract a, fract b)
IFX_INLINE long | Ifx__mulfractlong (fract a, long b)
IFX_INLINE sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | Ifx__s16_to_sfract (sint16 a)
IFX_INLINE sint16 | Ifx__sfract_to_s16 (sfract a)
IFX_INLINE uint16 | Ifx__sfract_to_u16 (sfract a)
IFX_INLINE laccum | Ifx__shaaccum (laccum a, sint32 b)
IFX_INLINE fract | Ifx__shafracts (fract a, sint32 b)
IFX_INLINE sfract | Ifx__shasfracts (sfract a, sint32 b)
IFX_INLINE sfract | Ifx__u16_to_sfract (uint16 a)
IFX_INLINE sint32 | Ifx__extr (sint32 a, uint32 p, uint32 w)
IFX_INLINE uint32 | Ifx__extru (uint32 a, uint32 p, uint32 w)
IFX_INLINE sint32 | Ifx__ins (sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
IFX_INLINE sint32 | Ifx__insert (sint32 a, sint32 b, sint32 p, const sint32 w)
IFX_INLINE sint32 | Ifx__insn (sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
IFX_INLINE sint32 | Ifx__disable_and_save (void)
IFX_INLINE void | Ifx__restore (sint32 ie)
IFX_INLINE void | Ifx__cacheawi (uint8 *p)
IFX_INLINE void | Ifx__cacheiwi (uint8 *p)
IFX_INLINE uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
IFX_INLINE sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
IFX_INLINE uint32 | Ifx__rol (uint32 operand, uint32 count)
IFX_INLINE uint32 | Ifx__ror (uint32 operand, uint32 count)
IFX_INLINE __packb | Ifx__absb (__packb a)
IFX_INLINE __packhw | Ifx__absh (__packhw a)
IFX_INLINE __packhw | Ifx__abssh (__packhw a)
IFX_INLINE sint8 | Ifx__extractbyte1 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte2 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte3 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte4 (__packb a)
IFX_INLINE sint16 | Ifx__extracthw1 (__packhw a)
IFX_INLINE sint16 | Ifx__extracthw2 (__packhw a)
IFX_INLINE uint8 | Ifx__extractubyte1 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte2 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte3 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte4 (__upackb a)
IFX_INLINE uint16 | Ifx__extractuhw1 (__upackhw a)
IFX_INLINE uint16 | Ifx__extractuhw2 (__upackhw a)
IFX_INLINE sint8 | Ifx__getbyte1 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte2 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte3 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte4 (__packb *a)
IFX_INLINE sint16 | Ifx__gethw1 (__packhw *a)
IFX_INLINE sint16 | Ifx__gethw2 (__packhw *a)
IFX_INLINE uint8 | Ifx__getubyte1 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte2 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte3 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte4 (__upackb *a)
IFX_INLINE uint16 | Ifx__getuhw1 (__upackhw *a)
IFX_INLINE uint16 | Ifx__getuhw2 (__upackhw *a)
IFX_INLINE __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
IFX_INLINE __packb | Ifx__initpackbl (long a)
IFX_INLINE __packhw | Ifx__initpackhw (sint16 a, sint16 b)
IFX_INLINE __packhw | Ifx__initpackhwl (long a)
IFX_INLINE __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
IFX_INLINE __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
IFX_INLINE __packb | Ifx__insertbyte1 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte2 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte3 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte4 (__packb a, sint8 b)
IFX_INLINE __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
IFX_INLINE __packhw | Ifx__inserthw1 (__packhw a, sint16 b)
IFX_INLINE __packhw | Ifx__inserthw2 (__packhw a, sint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
IFX_INLINE __packb | Ifx__minb (__packb a, __packb b)
IFX_INLINE __upackb | Ifx__minbu (__upackb a, __upackb b)
IFX_INLINE __packhw | Ifx__minh (__packhw a, __packhw b)
IFX_INLINE __upackhw | Ifx__minhu (__upackhw a, __upackhw b)
IFX_INLINE void | Ifx__setbyte1 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte2 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte3 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte4 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__sethw1 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__sethw2 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__setubyte1 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte2 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte3 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte4 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setuhw1 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__setuhw2 (__upackhw *a, uint16 b)
IFX_INLINE sint32 | Ifx__absdif (sint32 a, sint32 b)
IFX_INLINE sint32 | Ifx__abss (sint32 a)
IFX_INLINE sint32 | Ifx__clo (sint32 a)
IFX_INLINE sint32 | Ifx__cls (sint32 a)
IFX_INLINE double | Ifx__fabs (double d)
IFX_INLINE float | Ifx__fabsf (float f)
IFX_INLINE sint32 | Ifx__parity (sint32 a)
IFX_INLINE sint8 | Ifx__satb (sint32 a)
IFX_INLINE uint8 | Ifx__satbu (sint32 a)
IFX_INLINE sint16 | Ifx__sath (sint32 a)
IFX_INLINE uint16 | Ifx__sathu (sint32 a)
IFX_INLINE sint32 | Ifx__adds (sint32 a, sint32 b)
IFX_INLINE uint32 | Ifx__addsu (uint32 a, uint32 b)
IFX_INLINE sint32 | Ifx__subs (sint32 a, sint32 b)
IFX_INLINE uint32 | Ifx__subsu (uint32 a, uint32 b)
IFX_INLINE void | Ifx__debug (void)
IFX_INLINE void | Ifx__dsync (void)
IFX_INLINE void | Ifx__isync (void)
IFX_INLINE void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
IFX_INLINE void | Ifx__nop (void)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE void | Ifx__rslcx (void)
IFX_INLINE void | Ifx__svlcx (void)
IFX_INLINE uint32 | Ifx__swap (void *place, uint32 value)
IFX_INLINE void | Ifx__stopPerfCounters (void)
IFX_INLINE unsigned int | Ifx__cmpAndSwap (unsigned int volatile *address, unsigned int value, unsigned int condition)
This function is a implementation of a binary semaphore using compare and swap instruction. More...
IFX_INLINE float32 | Ifx__fixpoint_to_float32 (fract value, sint32 shift)
Convert a fixpoint value to float32. More...
IFX_INLINE void * | Ifx__getA11 (void)
IFX_INLINE void | Ifx__setStackPointer (void *stackAddr)
IFX_INLINE uint32 | Ifx__crc32 (uint32 b, uint32 a)
IFX_INLINE uint32 | IfxCpu_calculateCrc32 (uint32 *startaddress, uint8 length)
IFX_INLINE uint32 | IfxCpu_getRandomVal (uint32 a, uint32 x, uint32 m)
IFX_INLINE sint32 | Ifx__popcnt (sint32 a)
IFX_INLINE void | Ifx__cacheai (uint8 *p)

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_IntrinsicsGnuc.h.

Macro Definition Documentation

◆ __abs

#define __abs Ifx__abs

Definition at line 2169 of file IfxCpu_IntrinsicsGnuc.h.

◆ __abs_stdreal

#define __abs_stdreal Ifx__abs_stdreal

Definition at line 1740 of file IfxCpu_IntrinsicsGnuc.h.

◆ __absb

#define __absb Ifx__absb

Definition at line 2156 of file IfxCpu_IntrinsicsGnuc.h.

◆ __absdif

#define __absdif Ifx__absdif

Definition at line 2173 of file IfxCpu_IntrinsicsGnuc.h.

◆ __absf

#define __absf Ifx__absf

Definition at line 1720 of file IfxCpu_IntrinsicsGnuc.h.

◆ __absh

#define __absh Ifx__absh

Definition at line 2160 of file IfxCpu_IntrinsicsGnuc.h.

◆ __abss

#define __abss Ifx__abss

Definition at line 2177 of file IfxCpu_IntrinsicsGnuc.h.

◆ __abssh

#define __abssh Ifx__abssh

Definition at line 2164 of file IfxCpu_IntrinsicsGnuc.h.

◆ __adds

#define __adds Ifx__adds

Definition at line 2229 of file IfxCpu_IntrinsicsGnuc.h.

◆ __addsu

#define __addsu Ifx__addsu

Definition at line 2233 of file IfxCpu_IntrinsicsGnuc.h.

◆ __bisr

#define __bisr Ifx__bisr

Definition at line 1872 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cacheai

#define __cacheai Ifx__cacheai

Definition at line 2321 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cacheawi

#define __cacheawi Ifx__cacheawi

Definition at line 1900 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cacheawi_bo_post_inc

#define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc

Definition at line 1908 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cacheiwi

#define __cacheiwi Ifx__cacheiwi

Definition at line 1904 of file IfxCpu_IntrinsicsGnuc.h.

◆ __checkrange

#define __checkrange Ifx__checkrange

Definition at line 1712 of file IfxCpu_IntrinsicsGnuc.h.

◆ __checkrangef

#define __checkrangef Ifx__checkrangef

Definition at line 1736 of file IfxCpu_IntrinsicsGnuc.h.

◆ __checkrangeX

#define __checkrangeX Ifx__checkrangeX

Definition at line 1668 of file IfxCpu_IntrinsicsGnuc.h.

◆ __clo

#define __clo Ifx__clo

Definition at line 2181 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cls

#define __cls Ifx__cls

Definition at line 2185 of file IfxCpu_IntrinsicsGnuc.h.

◆ __clssf

#define __clssf Ifx__clssf

Definition at line 1768 of file IfxCpu_IntrinsicsGnuc.h.

◆ __clz

#define __clz Ifx__clz

Definition at line 2189 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cmpAndSwap

#define __cmpAndSwap Ifx__cmpAndSwap

Definition at line 2297 of file IfxCpu_IntrinsicsGnuc.h.

◆ __crc32

#define __crc32 Ifx__crc32

Definition at line 2313 of file IfxCpu_IntrinsicsGnuc.h.

◆ __debug

#define __debug Ifx__debug

Definition at line 2245 of file IfxCpu_IntrinsicsGnuc.h.

◆ __disable

#define __disable Ifx__disable

Definition at line 1876 of file IfxCpu_IntrinsicsGnuc.h.

◆ __disable_and_save

#define __disable_and_save Ifx__disable_and_save

Definition at line 1880 of file IfxCpu_IntrinsicsGnuc.h.

◆ __dsync

#define __dsync Ifx__dsync

Definition at line 2253 of file IfxCpu_IntrinsicsGnuc.h.

◆ __enable

#define __enable Ifx__enable

Definition at line 1884 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extr

#define __extr Ifx__extr

Definition at line 1840 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractbyte1

#define __extractbyte1 Ifx__extractbyte1

Definition at line 1924 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractbyte2

#define __extractbyte2 Ifx__extractbyte2

Definition at line 1928 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractbyte3

#define __extractbyte3 Ifx__extractbyte3

Definition at line 1932 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractbyte4

#define __extractbyte4 Ifx__extractbyte4

Definition at line 1936 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extracthw1

#define __extracthw1 Ifx__extracthw1

Definition at line 1940 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extracthw2

#define __extracthw2 Ifx__extracthw2

Definition at line 1944 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractubyte1

#define __extractubyte1 Ifx__extractubyte1

Definition at line 1948 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractubyte2

#define __extractubyte2 Ifx__extractubyte2

Definition at line 1952 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractubyte3

#define __extractubyte3 Ifx__extractubyte3

Definition at line 1956 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractubyte4

#define __extractubyte4 Ifx__extractubyte4

Definition at line 1960 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractuhw1

#define __extractuhw1 Ifx__extractuhw1

Definition at line 1964 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractuhw2

#define __extractuhw2 Ifx__extractuhw2

Definition at line 1968 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extru

#define __extru Ifx__extru

Definition at line 1844 of file IfxCpu_IntrinsicsGnuc.h.

◆ __fabs

#define __fabs Ifx__fabs

Definition at line 2193 of file IfxCpu_IntrinsicsGnuc.h.

◆ __fabsf

#define __fabsf Ifx__fabsf

Definition at line 2197 of file IfxCpu_IntrinsicsGnuc.h.

◆ __fixpoint_to_float32

#define __fixpoint_to_float32 Ifx__fixpoint_to_float32

Definition at line 2301 of file IfxCpu_IntrinsicsGnuc.h.

◆ __float_to_fract

#define __float_to_fract Ifx__float_to_fract

Definition at line 1784 of file IfxCpu_IntrinsicsGnuc.h.

◆ __float_to_sfract

#define __float_to_sfract Ifx__float_to_sfract

Definition at line 1780 of file IfxCpu_IntrinsicsGnuc.h.

◆ __fract_to_float

#define __fract_to_float Ifx__fract_to_float

Definition at line 1772 of file IfxCpu_IntrinsicsGnuc.h.

◆ __fract_to_sfract

#define __fract_to_sfract Ifx__fract_to_sfract

Definition at line 1776 of file IfxCpu_IntrinsicsGnuc.h.

◆ __geqf

#define __geqf Ifx__geqf

Definition at line 1764 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getA11

#define __getA11 Ifx__getA11

Definition at line 2305 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getbit

#define __getbit Ifx__getbit

Definition at line 1848 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getbyte1

#define __getbyte1 Ifx__getbyte1

Definition at line 1972 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getbyte2

#define __getbyte2 Ifx__getbyte2

Definition at line 1976 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getbyte3

#define __getbyte3 Ifx__getbyte3

Definition at line 1980 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getbyte4

#define __getbyte4 Ifx__getbyte4

Definition at line 1984 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getDataParamRet

#define __getDataParamRet Ifx__getDataParamRet

Definition at line 1636 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getfract

#define __getfract Ifx__getfract

Definition at line 1788 of file IfxCpu_IntrinsicsGnuc.h.

◆ __gethw1

#define __gethw1 Ifx__gethw1

Definition at line 1988 of file IfxCpu_IntrinsicsGnuc.h.

◆ __gethw2

#define __gethw2 Ifx__gethw2

Definition at line 1992 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getubyte1

#define __getubyte1 Ifx__getubyte1

Definition at line 1996 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getubyte2

#define __getubyte2 Ifx__getubyte2

Definition at line 2000 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getubyte3

#define __getubyte3 Ifx__getubyte3

Definition at line 2004 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getubyte4

#define __getubyte4 Ifx__getubyte4

Definition at line 2008 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getuhw1

#define __getuhw1 Ifx__getuhw1

Definition at line 2012 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getuhw2

#define __getuhw2 Ifx__getuhw2

Definition at line 2016 of file IfxCpu_IntrinsicsGnuc.h.

◆ __imaskldmst

#define __imaskldmst Ifx__imaskldmst

Definition at line 1868 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initpackb

#define __initpackb Ifx__initpackb

Definition at line 2152 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initpackbl

#define __initpackbl Ifx__initpackbl

Definition at line 2148 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initpackhw

#define __initpackhw Ifx__initpackhw

Definition at line 2144 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initpackhwl

#define __initpackhwl Ifx__initpackhwl

Definition at line 2140 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initupackb

#define __initupackb Ifx__initupackb

Definition at line 2136 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initupackhw

#define __initupackhw Ifx__initupackhw

Definition at line 2132 of file IfxCpu_IntrinsicsGnuc.h.

◆ __ins

#define __ins Ifx__ins

Definition at line 1852 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insert

#define __insert Ifx__insert

Definition at line 1856 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertbyte1

#define __insertbyte1 Ifx__insertbyte1

Definition at line 2128 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertbyte2

#define __insertbyte2 Ifx__insertbyte2

Definition at line 2124 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertbyte3

#define __insertbyte3 Ifx__insertbyte3

Definition at line 2120 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertbyte4

#define __insertbyte4 Ifx__insertbyte4

Definition at line 2116 of file IfxCpu_IntrinsicsGnuc.h.

◆ __inserthw1

#define __inserthw1 Ifx__inserthw1

Definition at line 2096 of file IfxCpu_IntrinsicsGnuc.h.

◆ __inserthw2

#define __inserthw2 Ifx__inserthw2

Definition at line 2092 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertubyte1

#define __insertubyte1 Ifx__insertubyte1

Definition at line 2112 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertubyte2

#define __insertubyte2 Ifx__insertubyte2

Definition at line 2108 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertubyte3

#define __insertubyte3 Ifx__insertubyte3

Definition at line 2104 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertubyte4

#define __insertubyte4 Ifx__insertubyte4

Definition at line 2100 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertuhw1

#define __insertuhw1 Ifx__insertuhw1

Definition at line 2088 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertuhw2

#define __insertuhw2 Ifx__insertuhw2

Definition at line 2084 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insn

#define __insn Ifx__insn

Definition at line 1860 of file IfxCpu_IntrinsicsGnuc.h.

◆ __isync

#define __isync Ifx__isync

Definition at line 2257 of file IfxCpu_IntrinsicsGnuc.h.

◆ __jump_and_link

#define __jump_and_link Ifx__jump_and_link

Definition at line 1624 of file IfxCpu_IntrinsicsGnuc.h.

◆ __jumpBackToLink

#define __jumpBackToLink Ifx__jumpBackToLink

Definition at line 1652 of file IfxCpu_IntrinsicsGnuc.h.

◆ __jumpToFunction

#define __jumpToFunction Ifx__jumpToFunction

Definition at line 1644 of file IfxCpu_IntrinsicsGnuc.h.

◆ __jumpToFunctionWithLink

#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink

Definition at line 1648 of file IfxCpu_IntrinsicsGnuc.h.

◆ __ldmst

#define __ldmst Ifx__ldmst

Definition at line 2261 of file IfxCpu_IntrinsicsGnuc.h.

◆ __leqf

#define __leqf Ifx__leqf

Definition at line 1760 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mac_r_sf

#define __mac_r_sf Ifx__mac_r_sf

Definition at line 1792 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mac_sf

#define __mac_sf Ifx__mac_sf

Definition at line 1796 of file IfxCpu_IntrinsicsGnuc.h.

◆ __max

#define __max Ifx__max

Definition at line 1680 of file IfxCpu_IntrinsicsGnuc.h.

◆ __max_stdreal

#define __max_stdreal Ifx__max_stdreal

Definition at line 1752 of file IfxCpu_IntrinsicsGnuc.h.

◆ __maxf

#define __maxf Ifx__maxf

Definition at line 1732 of file IfxCpu_IntrinsicsGnuc.h.

◆ __maxs

#define __maxs Ifx__maxs

Definition at line 1684 of file IfxCpu_IntrinsicsGnuc.h.

◆ __maxu

#define __maxu Ifx__maxu

Definition at line 1688 of file IfxCpu_IntrinsicsGnuc.h.

◆ __maxX

#define __maxX Ifx__maxX

Definition at line 1660 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mem_barrier

#define __mem_barrier Ifx__mem_barrier

Definition at line 2249 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mfcr

#define __mfcr Ifx__mfcr

Definition at line 2201 of file IfxCpu_IntrinsicsGnuc.h.

◆ __min

#define __min Ifx__min

Definition at line 1692 of file IfxCpu_IntrinsicsGnuc.h.

◆ __min_stdreal

#define __min_stdreal Ifx__min_stdreal

Definition at line 1748 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minb

#define __minb Ifx__minb

Definition at line 2080 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minbu

#define __minbu Ifx__minbu

Definition at line 2076 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minf

#define __minf Ifx__minf

Definition at line 1728 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minh

#define __minh Ifx__minh

Definition at line 2072 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minhu

#define __minhu Ifx__minhu

Definition at line 2068 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mins

#define __mins Ifx__mins

Definition at line 1696 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minu

#define __minu Ifx__minu

Definition at line 1700 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minX

#define __minX Ifx__minX

Definition at line 1656 of file IfxCpu_IntrinsicsGnuc.h.

◆ __moveToAddrParam0

#define __moveToAddrParam0 Ifx__moveToAddrParam0

Definition at line 1640 of file IfxCpu_IntrinsicsGnuc.h.

◆ __moveToDataParam0

#define __moveToDataParam0 Ifx__moveToDataParam0

Definition at line 1628 of file IfxCpu_IntrinsicsGnuc.h.

◆ __moveToDataParamRet

#define __moveToDataParamRet Ifx__moveToDataParamRet

Definition at line 1632 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mtcr

#define __mtcr Ifx__mtcr

Definition at line 2205 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mulfractfract

#define __mulfractfract Ifx__mulfractfract

Definition at line 1800 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mulfractlong

#define __mulfractlong Ifx__mulfractlong

Definition at line 1804 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mulsc

#define __mulsc Ifx__mulsc

Definition at line 1912 of file IfxCpu_IntrinsicsGnuc.h.

◆ __neqf

#define __neqf Ifx__neqf

Definition at line 1756 of file IfxCpu_IntrinsicsGnuc.h.

◆ __non_return_call

#define __non_return_call Ifx__non_return_call

Definition at line 1620 of file IfxCpu_IntrinsicsGnuc.h.

◆ __nop

#define __nop Ifx__nop

Definition at line 2265 of file IfxCpu_IntrinsicsGnuc.h.

◆ __nops

#define __nops Ifx__nops

Definition at line 2269 of file IfxCpu_IntrinsicsGnuc.h.

◆ __parity

#define __parity Ifx__parity

Definition at line 2209 of file IfxCpu_IntrinsicsGnuc.h.

◆ __popcnt

#define __popcnt Ifx__popcnt

Definition at line 2317 of file IfxCpu_IntrinsicsGnuc.h.

◆ __putbit

#define __putbit Ifx__putbit

Definition at line 1864 of file IfxCpu_IntrinsicsGnuc.h.

◆ __restore

#define __restore Ifx__restore

Definition at line 1888 of file IfxCpu_IntrinsicsGnuc.h.

◆ __rol

#define __rol Ifx__rol

Definition at line 1916 of file IfxCpu_IntrinsicsGnuc.h.

◆ __ror

#define __ror Ifx__ror

Definition at line 1920 of file IfxCpu_IntrinsicsGnuc.h.

◆ __round16

#define __round16 Ifx__round16

Definition at line 1808 of file IfxCpu_IntrinsicsGnuc.h.

◆ __roundf

#define __roundf Ifx__roundf

Definition at line 1716 of file IfxCpu_IntrinsicsGnuc.h.

◆ __rslcx

#define __rslcx Ifx__rslcx

Definition at line 2273 of file IfxCpu_IntrinsicsGnuc.h.

◆ __s16_to_sfract

#define __s16_to_sfract Ifx__s16_to_sfract

Definition at line 1812 of file IfxCpu_IntrinsicsGnuc.h.

◆ __satb

#define __satb Ifx__satb

Definition at line 2213 of file IfxCpu_IntrinsicsGnuc.h.

◆ __satbu

#define __satbu Ifx__satbu

Definition at line 2217 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sath

#define __sath Ifx__sath

Definition at line 2221 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sathu

#define __sathu Ifx__sathu

Definition at line 2225 of file IfxCpu_IntrinsicsGnuc.h.

◆ __saturate

#define __saturate Ifx__saturate

Definition at line 1672 of file IfxCpu_IntrinsicsGnuc.h.

◆ __saturate_stdreal

#define __saturate_stdreal Ifx__saturate_stdreal

Definition at line 1744 of file IfxCpu_IntrinsicsGnuc.h.

◆ __saturatef

#define __saturatef Ifx__saturatef

Definition at line 1724 of file IfxCpu_IntrinsicsGnuc.h.

◆ __saturateu

#define __saturateu Ifx__saturateu

Definition at line 1676 of file IfxCpu_IntrinsicsGnuc.h.

◆ __saturateX

#define __saturateX Ifx__saturateX

Definition at line 1664 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setareg

#define __setareg Ifx__setareg

Definition at line 2289 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setbyte1

#define __setbyte1 Ifx__setbyte1

Definition at line 2020 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setbyte2

#define __setbyte2 Ifx__setbyte2

Definition at line 2024 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setbyte3

#define __setbyte3 Ifx__setbyte3

Definition at line 2028 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setbyte4

#define __setbyte4 Ifx__setbyte4

Definition at line 2032 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sethw1

#define __sethw1 Ifx__sethw1

Definition at line 2036 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sethw2

#define __sethw2 Ifx__sethw2

Definition at line 2040 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setStackPointer

#define __setStackPointer Ifx__setStackPointer

Definition at line 2309 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setubyte1

#define __setubyte1 Ifx__setubyte1

Definition at line 2044 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setubyte2

#define __setubyte2 Ifx__setubyte2

Definition at line 2048 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setubyte3

#define __setubyte3 Ifx__setubyte3

Definition at line 2052 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setubyte4

#define __setubyte4 Ifx__setubyte4

Definition at line 2056 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setuhw1

#define __setuhw1 Ifx__setuhw1

Definition at line 2060 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setuhw2

#define __setuhw2 Ifx__setuhw2

Definition at line 2064 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sfract_to_s16

#define __sfract_to_s16 Ifx__sfract_to_s16

Definition at line 1816 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sfract_to_u16

#define __sfract_to_u16 Ifx__sfract_to_u16

Definition at line 1820 of file IfxCpu_IntrinsicsGnuc.h.

◆ __shaaccum

#define __shaaccum Ifx__shaaccum

Definition at line 1824 of file IfxCpu_IntrinsicsGnuc.h.

◆ __shafracts

#define __shafracts Ifx__shafracts

Definition at line 1828 of file IfxCpu_IntrinsicsGnuc.h.

◆ __shasfracts

#define __shasfracts Ifx__shasfracts

Definition at line 1832 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sqrf

#define __sqrf Ifx__sqrf

Definition at line 1708 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sqrtf

#define __sqrtf Ifx__sqrtf

Definition at line 1704 of file IfxCpu_IntrinsicsGnuc.h.

◆ __stopPerfCounters

#define __stopPerfCounters Ifx__stopPerfCounters

Definition at line 2293 of file IfxCpu_IntrinsicsGnuc.h.

◆ __subs

#define __subs Ifx__subs

Definition at line 2237 of file IfxCpu_IntrinsicsGnuc.h.

◆ __subsu

#define __subsu Ifx__subsu

Definition at line 2241 of file IfxCpu_IntrinsicsGnuc.h.

◆ __svlcx

#define __svlcx Ifx__svlcx

Definition at line 2277 of file IfxCpu_IntrinsicsGnuc.h.

◆ __swap

#define __swap Ifx__swap

Definition at line 2281 of file IfxCpu_IntrinsicsGnuc.h.

◆ __syscall

#define __syscall Ifx__syscall

Definition at line 1892 of file IfxCpu_IntrinsicsGnuc.h.

◆ __tric_syscall

#define __tric_syscall Ifx__tric_syscall

Definition at line 1896 of file IfxCpu_IntrinsicsGnuc.h.

◆ __u16_to_sfract

#define __u16_to_sfract Ifx__u16_to_sfract

Definition at line 1836 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__non_return_call

#define Ifx__non_return_call ( fun ) __asm__ volatile ("ji %0"::"a"(fun))

Function call without return

Definition at line 68 of file IfxCpu_IntrinsicsGnuc.h.

Referenced by Ifx__jumpToFunction().

◆ Ifx__setareg

#define Ifx__setareg | ( | areg,
 |  | val
 | ) |
Value:
{ uint32 reg_val= (uint32)val; \
__asm__ volatile (" mov.a\t %%"#areg",%0"::"d"(reg_val)); }
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1499 of file IfxCpu_IntrinsicsGnuc.h.

◆ IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS

#define IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 1

Definition at line 52 of file IfxCpu_IntrinsicsGnuc.h.

◆ NOP

#define NOP Ifx__NOP

Definition at line 2285 of file IfxCpu_IntrinsicsGnuc.h.

◆ STRINGIFY

#define STRINGIFY ( x ) #x

Definition at line 64 of file IfxCpu_IntrinsicsGnuc.h.

Function Documentation

◆ Ifx__cacheai()

IFX_INLINE void Ifx__cacheai ( uint8 * p )

Invalidate cache address "p". Generates CACHEA.I [Ab].

Definition at line 1611 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__cmpAndSwap()

IFX_INLINE unsigned int Ifx__cmpAndSwap | ( | unsigned int volatile * | address,
 |  | unsigned int | value,
 |  | unsigned int | condition
 | ) |  |

This function is a implementation of a binary semaphore using compare and swap instruction.

Parameters
address | address of resource.
value | This variable is updated with status of address
condition | if the value of address matches with the value of condition, then swap of value & address occurs.

Definition at line 1519 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__crc32()

IFX_INLINE uint32 Ifx__crc32 | ( | uint32 | b,
 |  | uint32 | a
 | ) |  |

Definition at line 1564 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__fixpoint_to_float32()

IFX_INLINE float32 Ifx__fixpoint_to_float32 | ( | fract | value,
 |  | sint32 | shift
 | ) |  |

Convert a fixpoint value to float32.

This function converts a value from a fixpoint format to a float32 format.

Parameters
value | value to be converted.
shift | position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
Returns
Returns the converted value in the float32 format.

Definition at line 1544 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getA11()

IFX_INLINE void* Ifx__getA11 ( void )

Definition at line 1552 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getDataParamRet()

IFX_INLINE unsigned int Ifx__getDataParamRet ( void )

Definition at line 87 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__jump_and_link()

IFX_INLINE void Ifx__jump_and_link ( void(*)(void) fun )

Jump and link

Definition at line 72 of file IfxCpu_IntrinsicsGnuc.h.

Referenced by Ifx__jumpToFunctionWithLink().

◆ Ifx__jumpBackToLink()

IFX_INLINE void Ifx__jumpBackToLink ( void )

Definition at line 109 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__jumpToFunction()

IFX_INLINE void Ifx__jumpToFunction ( const void * fun )

Definition at line 99 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__jumpToFunctionWithLink()

IFX_INLINE void Ifx__jumpToFunctionWithLink ( const void * fun )

Definition at line 104 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__moveToAddrParam0()

IFX_INLINE void Ifx__moveToAddrParam0 ( const void * var )

Definition at line 94 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__moveToDataParam0()

IFX_INLINE void Ifx__moveToDataParam0 ( unsigned int var )

Definition at line 77 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__moveToDataParamRet()

IFX_INLINE void Ifx__moveToDataParamRet ( unsigned int var )

Definition at line 82 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__popcnt()

IFX_INLINE sint32 Ifx__popcnt ( sint32 a )

Definition at line 1602 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setStackPointer()

IFX_INLINE void Ifx__setStackPointer ( void * stackAddr )

Definition at line 1559 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__stopPerfCounters()

IFX_INLINE void Ifx__stopPerfCounters ( void )

__mtcr (CPU_CCTRL, 0);

Definition at line 1505 of file IfxCpu_IntrinsicsGnuc.h.

◆ IfxCpu_calculateCrc32()

IFX_INLINE uint32 IfxCpu_calculateCrc32 | ( | uint32 * | startaddress,
 |  | uint8 | length
 | ) |  |

Definition at line 1573 of file IfxCpu_IntrinsicsGnuc.h.

◆ IfxCpu_getRandomVal()

IFX_INLINE uint32 IfxCpu_getRandomVal | ( | uint32 | a,
 |  | uint32 | x,
 |  | uint32 | m
 | ) |  |

Definition at line 1585 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: IfxCpu_IntrinsicsGnuc2G.h File Reference

  • Cpu
  • Std
Macros | Functions
IfxCpu_IntrinsicsGnuc2G.h File Reference
#include "Ifx_Types.h"
#include "machine/intrinsics.h"
Include dependency graph for IfxCpu_IntrinsicsGnuc2G.h:

Go to the source code of this file.

Macros

#define | IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 1
#define | STRINGIFY(x) #x
#define | Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__saturate(X, Min, Max) ( Ifx__min(Ifx__max(X, Min), Max) )
#define | Ifx__saturateu(X, Min, Max) ( Ifx__minu(Ifx__maxu(X, Min), Max) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
#define | Ifx__imaskldmst(address, value, bitoffset, bits)
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address, value, bitoffset,1)
#define | Ifx__disable() __asm__ volatile ("disable" : : : "memory")
#define | Ifx__enable() __asm__ volatile ("enable" : : : "memory")
#define | Ifx__abs(a) __builtin_abs(a)
#define | Ifx__clz(a) __builtin_clz(a)
#define | Ifx__mem_barrier __asm__ volatile("":::"memory");
#define | Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
#define | Ifx__setareg(areg, val)
#define | __non_return_call Ifx__non_return_call
#define | __jump_and_link Ifx__jump_and_link
#define | __moveToDataParam0 Ifx__moveToDataParam0
#define | __moveToDataParamRet Ifx__moveToDataParamRet
#define | __getDataParamRet Ifx__getDataParamRet
#define | __moveToAddrParam0 Ifx__moveToAddrParam0
#define | __jumpToFunction Ifx__jumpToFunction
#define | __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
#define | __jumpBackToLink Ifx__jumpBackToLink
#define | __minX Ifx__minX
#define | __maxX Ifx__maxX
#define | __saturateX Ifx__saturateX
#define | __checkrangeX Ifx__checkrangeX
#define | __saturate Ifx__saturate
#define | __saturateu Ifx__saturateu
#define | __max Ifx__max
#define | __maxs Ifx__maxs
#define | __maxu Ifx__maxu
#define | __min Ifx__min
#define | __mins Ifx__mins
#define | __minu Ifx__minu
#define | __sqrtf Ifx__sqrtf
#define | __sqrf Ifx__sqrf
#define | __checkrange Ifx__checkrange
#define | __roundf Ifx__roundf
#define | __absf Ifx__absf
#define | __saturatef Ifx__saturatef
#define | __minf Ifx__minf
#define | __maxf Ifx__maxf
#define | __checkrangef Ifx__checkrangef
#define | __abs_stdreal Ifx__abs_stdreal
#define | __saturate_stdreal Ifx__saturate_stdreal
#define | __min_stdreal Ifx__min_stdreal
#define | __max_stdreal Ifx__max_stdreal
#define | __neqf Ifx__neqf
#define | __leqf Ifx__leqf
#define | __geqf Ifx__geqf
#define | __clssf Ifx__clssf
#define | __fract_to_float Ifx__fract_to_float
#define | __fract_to_sfract Ifx__fract_to_sfract
#define | __float_to_sfract Ifx__float_to_sfract
#define | __float_to_fract Ifx__float_to_fract
#define | __getfract Ifx__getfract
#define | __mac_r_sf Ifx__mac_r_sf
#define | __mac_sf Ifx__mac_sf
#define | __mulfractfract Ifx__mulfractfract
#define | __mulfractlong Ifx__mulfractlong
#define | __round16 Ifx__round16
#define | __s16_to_sfract Ifx__s16_to_sfract
#define | __sfract_to_s16 Ifx__sfract_to_s16
#define | __sfract_to_u16 Ifx__sfract_to_u16
#define | __shaaccum Ifx__shaaccum
#define | __shafracts Ifx__shafracts
#define | __shasfracts Ifx__shasfracts
#define | __u16_to_sfract Ifx__u16_to_sfract
#define | __extr Ifx__extr
#define | __extru Ifx__extru
#define | __getbit Ifx__getbit
#define | __ins Ifx__ins
#define | __insert Ifx__insert
#define | __insn Ifx__insn
#define | __putbit Ifx__putbit
#define | __imaskldmst Ifx__imaskldmst
#define | __bisr Ifx__bisr
#define | __disable Ifx__disable
#define | __disable_and_save Ifx__disable_and_save
#define | __enable Ifx__enable
#define | __restore Ifx__restore
#define | __syscall Ifx__syscall
#define | __tric_syscall Ifx__tric_syscall
#define | __cacheawi Ifx__cacheawi
#define | __cacheiwi Ifx__cacheiwi
#define | __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
#define | __mulsc Ifx__mulsc
#define | __rol Ifx__rol
#define | __ror Ifx__ror
#define | __extractbyte1 Ifx__extractbyte1
#define | __extractbyte2 Ifx__extractbyte2
#define | __extractbyte3 Ifx__extractbyte3
#define | __extractbyte4 Ifx__extractbyte4
#define | __extracthw1 Ifx__extracthw1
#define | __extracthw2 Ifx__extracthw2
#define | __extractubyte1 Ifx__extractubyte1
#define | __extractubyte2 Ifx__extractubyte2
#define | __extractubyte3 Ifx__extractubyte3
#define | __extractubyte4 Ifx__extractubyte4
#define | __extractuhw1 Ifx__extractuhw1
#define | __extractuhw2 Ifx__extractuhw2
#define | __getbyte1 Ifx__getbyte1
#define | __getbyte2 Ifx__getbyte2
#define | __getbyte3 Ifx__getbyte3
#define | __getbyte4 Ifx__getbyte4
#define | __gethw1 Ifx__gethw1
#define | __gethw2 Ifx__gethw2
#define | __getubyte1 Ifx__getubyte1
#define | __getubyte2 Ifx__getubyte2
#define | __getubyte3 Ifx__getubyte3
#define | __getubyte4 Ifx__getubyte4
#define | __getuhw1 Ifx__getuhw1
#define | __getuhw2 Ifx__getuhw2
#define | __setbyte1 Ifx__setbyte1
#define | __setbyte2 Ifx__setbyte2
#define | __setbyte3 Ifx__setbyte3
#define | __setbyte4 Ifx__setbyte4
#define | __sethw1 Ifx__sethw1
#define | __sethw2 Ifx__sethw2
#define | __setubyte1 Ifx__setubyte1
#define | __setubyte2 Ifx__setubyte2
#define | __setubyte3 Ifx__setubyte3
#define | __setubyte4 Ifx__setubyte4
#define | __setuhw1 Ifx__setuhw1
#define | __setuhw2 Ifx__setuhw2
#define | __minhu Ifx__minhu
#define | __minh Ifx__minh
#define | __minbu Ifx__minbu
#define | __minb Ifx__minb
#define | __insertuhw2 Ifx__insertuhw2
#define | __insertuhw1 Ifx__insertuhw1
#define | __inserthw2 Ifx__inserthw2
#define | __inserthw1 Ifx__inserthw1
#define | __insertubyte4 Ifx__insertubyte4
#define | __insertubyte3 Ifx__insertubyte3
#define | __insertubyte2 Ifx__insertubyte2
#define | __insertubyte1 Ifx__insertubyte1
#define | __insertbyte4 Ifx__insertbyte4
#define | __insertbyte3 Ifx__insertbyte3
#define | __insertbyte2 Ifx__insertbyte2
#define | __insertbyte1 Ifx__insertbyte1
#define | __initupackhw Ifx__initupackhw
#define | __initupackb Ifx__initupackb
#define | __initpackhwl Ifx__initpackhwl
#define | __initpackhw Ifx__initpackhw
#define | __initpackbl Ifx__initpackbl
#define | __initpackb Ifx__initpackb
#define | __absb Ifx__absb
#define | __absh Ifx__absh
#define | __abssh Ifx__abssh
#define | __abs Ifx__abs
#define | __absdif Ifx__absdif
#define | __abss Ifx__abss
#define | __clo Ifx__clo
#define | __cls Ifx__cls
#define | __clz Ifx__clz
#define | __fabs Ifx__fabs
#define | __fabsf Ifx__fabsf
#define | __mfcr Ifx__mfcr
#define | __mtcr Ifx__mtcr
#define | __parity Ifx__parity
#define | __satb Ifx__satb
#define | __satbu Ifx__satbu
#define | __sath Ifx__sath
#define | __sathu Ifx__sathu
#define | __adds Ifx__adds
#define | __addsu Ifx__addsu
#define | __subs Ifx__subs
#define | __subsu Ifx__subsu
#define | __debug Ifx__debug
#define | __mem_barrier Ifx__mem_barrier
#define | __dsync Ifx__dsync
#define | __isync Ifx__isync
#define | __ldmst Ifx__ldmst
#define | __nop Ifx__nop
#define | __nops Ifx__nops
#define | __rslcx Ifx__rslcx
#define | __svlcx Ifx__svlcx
#define | __swap Ifx__swap
#define | NOP Ifx__NOP
#define | __setareg Ifx__setareg
#define | __stopPerfCounters Ifx__stopPerfCounters
#define | __cmpAndSwap Ifx__cmpAndSwap
#define | __fixpoint_to_float32 Ifx__fixpoint_to_float32
#define | __getA11 Ifx__getA11
#define | __setStackPointer Ifx__setStackPointer
#define | __crc32 Ifx__crc32
#define | __popcnt Ifx__popcnt
#define | __cacheai Ifx__cacheai

Functions

IFX_INLINE void | Ifx__jump_and_link (void(*fun)(void))
IFX_INLINE void | Ifx__moveToDataParam0 (unsigned int var)
IFX_INLINE void | Ifx__moveToDataParamRet (unsigned int var)
IFX_INLINE unsigned int | Ifx__getDataParamRet (void)
IFX_INLINE void | Ifx__moveToAddrParam0 (const void *var)
IFX_INLINE void | Ifx__jumpToFunction (const void *fun)
IFX_INLINE void | Ifx__jumpToFunctionWithLink (const void *fun)
IFX_INLINE void | Ifx__jumpBackToLink (void)
IFX_INLINE sint32 | Ifx__max (sint32 a, sint32 b)
IFX_INLINE sint32 | Ifx__maxs (sint16 a, sint16 b)
IFX_INLINE uint32 | Ifx__maxu (uint32 a, uint32 b)
IFX_INLINE sint32 | Ifx__min (sint32 a, sint32 b)
IFX_INLINE sint16 | Ifx__mins (sint16 a, sint16 b)
IFX_INLINE uint32 | Ifx__minu (uint32 a, uint32 b)
IFX_INLINE sint16 | Ifx__clssf (sfract a)
IFX_INLINE float | Ifx__fract_to_float (fract a)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE sfract | Ifx__fract_to_sfract (fract a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE fract | Ifx__getfract (laccum a)
IFX_INLINE sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
IFX_INLINE sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
IFX_INLINE long | Ifx__mulfractfract (fract a, fract b)
IFX_INLINE long | Ifx__mulfractlong (fract a, long b)
IFX_INLINE sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | Ifx__s16_to_sfract (sint16 a)
IFX_INLINE sint16 | Ifx__sfract_to_s16 (sfract a)
IFX_INLINE uint16 | Ifx__sfract_to_u16 (sfract a)
IFX_INLINE laccum | Ifx__shaaccum (laccum a, sint32 b)
IFX_INLINE fract | Ifx__shafracts (fract a, sint32 b)
IFX_INLINE sfract | Ifx__shasfracts (sfract a, sint32 b)
IFX_INLINE sfract | Ifx__u16_to_sfract (uint16 a)
IFX_INLINE sint32 | Ifx__extr (sint32 a, uint32 p, uint32 w)
IFX_INLINE uint32 | Ifx__extru (uint32 a, uint32 p, uint32 w)
IFX_INLINE sint32 | Ifx__ins (sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
IFX_INLINE sint32 | Ifx__insert (sint32 a, sint32 b, sint32 p, const sint32 w)
IFX_INLINE sint32 | Ifx__insn (sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
IFX_INLINE sint32 | Ifx__disable_and_save (void)
IFX_INLINE void | Ifx__restore (sint32 ie)
IFX_INLINE void | Ifx__cacheawi (uint8 *p)
IFX_INLINE void | Ifx__cacheiwi (uint8 *p)
IFX_INLINE uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
IFX_INLINE sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
IFX_INLINE uint32 | Ifx__rol (uint32 operand, uint32 count)
IFX_INLINE uint32 | Ifx__ror (uint32 operand, uint32 count)
IFX_INLINE __packb | Ifx__absb (__packb a)
IFX_INLINE __packhw | Ifx__absh (__packhw a)
IFX_INLINE __packhw | Ifx__abssh (__packhw a)
IFX_INLINE sint8 | Ifx__extractbyte1 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte2 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte3 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte4 (__packb a)
IFX_INLINE sint16 | Ifx__extracthw1 (__packhw a)
IFX_INLINE sint16 | Ifx__extracthw2 (__packhw a)
IFX_INLINE uint8 | Ifx__extractubyte1 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte2 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte3 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte4 (__upackb a)
IFX_INLINE uint16 | Ifx__extractuhw1 (__upackhw a)
IFX_INLINE uint16 | Ifx__extractuhw2 (__upackhw a)
IFX_INLINE sint8 | Ifx__getbyte1 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte2 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte3 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte4 (__packb *a)
IFX_INLINE sint16 | Ifx__gethw1 (__packhw *a)
IFX_INLINE sint16 | Ifx__gethw2 (__packhw *a)
IFX_INLINE uint8 | Ifx__getubyte1 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte2 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte3 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte4 (__upackb *a)
IFX_INLINE uint16 | Ifx__getuhw1 (__upackhw *a)
IFX_INLINE uint16 | Ifx__getuhw2 (__upackhw *a)
IFX_INLINE __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
IFX_INLINE __packb | Ifx__initpackbl (long a)
IFX_INLINE __packhw | Ifx__initpackhw (sint16 a, sint16 b)
IFX_INLINE __packhw | Ifx__initpackhwl (long a)
IFX_INLINE __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
IFX_INLINE __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
IFX_INLINE __packb | Ifx__insertbyte1 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte2 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte3 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte4 (__packb a, sint8 b)
IFX_INLINE __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
IFX_INLINE __packhw | Ifx__inserthw1 (__packhw a, sint16 b)
IFX_INLINE __packhw | Ifx__inserthw2 (__packhw a, sint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
IFX_INLINE __packb | Ifx__minb (__packb a, __packb b)
IFX_INLINE __upackb | Ifx__minbu (__upackb a, __upackb b)
IFX_INLINE __packhw | Ifx__minh (__packhw a, __packhw b)
IFX_INLINE __upackhw | Ifx__minhu (__upackhw a, __upackhw b)
IFX_INLINE void | Ifx__setbyte1 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte2 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte3 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte4 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__sethw1 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__sethw2 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__setubyte1 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte2 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte3 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte4 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setuhw1 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__setuhw2 (__upackhw *a, uint16 b)
IFX_INLINE sint32 | Ifx__absdif (sint32 a, sint32 b)
IFX_INLINE sint32 | Ifx__abss (sint32 a)
IFX_INLINE sint32 | Ifx__clo (sint32 a)
IFX_INLINE sint32 | Ifx__cls (sint32 a)
IFX_INLINE double | Ifx__fabs (double d)
IFX_INLINE float | Ifx__fabsf (float f)
IFX_INLINE sint32 | Ifx__parity (sint32 a)
IFX_INLINE sint8 | Ifx__satb (sint32 a)
IFX_INLINE uint8 | Ifx__satbu (sint32 a)
IFX_INLINE sint16 | Ifx__sath (sint32 a)
IFX_INLINE uint16 | Ifx__sathu (sint32 a)
IFX_INLINE sint32 | Ifx__adds (sint32 a, sint32 b)
IFX_INLINE uint32 | Ifx__addsu (uint32 a, uint32 b)
IFX_INLINE sint32 | Ifx__subs (sint32 a, sint32 b)
IFX_INLINE uint32 | Ifx__subsu (uint32 a, uint32 b)
IFX_INLINE void | Ifx__debug (void)
IFX_INLINE void | Ifx__dsync (void)
IFX_INLINE void | Ifx__isync (void)
IFX_INLINE void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
IFX_INLINE void | Ifx__nop (void)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE void | Ifx__rslcx (void)
IFX_INLINE void | Ifx__svlcx (void)
IFX_INLINE uint32 | Ifx__swap (void *place, uint32 value)
IFX_INLINE void | Ifx__stopPerfCounters (void)
IFX_INLINE unsigned int | Ifx__cmpAndSwap (unsigned int volatile *address, unsigned int value, unsigned int condition)
This function is a implementation of a binary semaphore using compare and swap instruction. More...
IFX_INLINE float32 | Ifx__fixpoint_to_float32 (fract value, sint32 shift)
Convert a fixpoint value to float32. More...
IFX_INLINE void * | Ifx__getA11 (void)
IFX_INLINE void | Ifx__setStackPointer (void *stackAddr)
IFX_INLINE uint32 | Ifx__crc32 (uint32 b, uint32 a)
IFX_INLINE uint32 | IfxCpu_calculateCrc32 (uint32 *startaddress, uint8 length)
IFX_INLINE uint32 | IfxCpu_getRandomVal (uint32 a, uint32 x, uint32 m)
IFX_INLINE sint32 | Ifx__popcnt (sint32 a)
IFX_INLINE void | Ifx__cacheai (uint8 *p)

Macro Definition Documentation

◆ __abs

#define __abs Ifx__abs

Definition at line 2169 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __abs_stdreal

#define __abs_stdreal Ifx__abs_stdreal

Definition at line 1740 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __absb

#define __absb Ifx__absb

Definition at line 2156 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __absdif

#define __absdif Ifx__absdif

Definition at line 2173 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __absf

#define __absf Ifx__absf

Definition at line 1720 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __absh

#define __absh Ifx__absh

Definition at line 2160 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __abss

#define __abss Ifx__abss

Definition at line 2177 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __abssh

#define __abssh Ifx__abssh

Definition at line 2164 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __adds

#define __adds Ifx__adds

Definition at line 2229 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __addsu

#define __addsu Ifx__addsu

Definition at line 2233 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __bisr

#define __bisr Ifx__bisr

Definition at line 1872 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __cacheai

#define __cacheai Ifx__cacheai

Definition at line 2321 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __cacheawi

#define __cacheawi Ifx__cacheawi

Definition at line 1900 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __cacheawi_bo_post_inc

#define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc

Definition at line 1908 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __cacheiwi

#define __cacheiwi Ifx__cacheiwi

Definition at line 1904 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __checkrange

#define __checkrange Ifx__checkrange

Definition at line 1712 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __checkrangef

#define __checkrangef Ifx__checkrangef

Definition at line 1736 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __checkrangeX

#define __checkrangeX Ifx__checkrangeX

Definition at line 1668 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __clo

#define __clo Ifx__clo

Definition at line 2181 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __cls

#define __cls Ifx__cls

Definition at line 2185 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __clssf

#define __clssf Ifx__clssf

Definition at line 1768 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __clz

#define __clz Ifx__clz

Definition at line 2189 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __cmpAndSwap

#define __cmpAndSwap Ifx__cmpAndSwap

Definition at line 2297 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __crc32

#define __crc32 Ifx__crc32

Definition at line 2313 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __debug

#define __debug Ifx__debug

Definition at line 2245 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __disable

#define __disable Ifx__disable

Definition at line 1876 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __disable_and_save

#define __disable_and_save Ifx__disable_and_save

Definition at line 1880 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __dsync

#define __dsync Ifx__dsync

Definition at line 2253 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __enable

#define __enable Ifx__enable

Definition at line 1884 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __extr

#define __extr Ifx__extr

Definition at line 1840 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __extractbyte1

#define __extractbyte1 Ifx__extractbyte1

Definition at line 1924 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __extractbyte2

#define __extractbyte2 Ifx__extractbyte2

Definition at line 1928 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __extractbyte3

#define __extractbyte3 Ifx__extractbyte3

Definition at line 1932 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __extractbyte4

#define __extractbyte4 Ifx__extractbyte4

Definition at line 1936 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __extracthw1

#define __extracthw1 Ifx__extracthw1

Definition at line 1940 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __extracthw2

#define __extracthw2 Ifx__extracthw2

Definition at line 1944 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __extractubyte1

#define __extractubyte1 Ifx__extractubyte1

Definition at line 1948 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __extractubyte2

#define __extractubyte2 Ifx__extractubyte2

Definition at line 1952 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __extractubyte3

#define __extractubyte3 Ifx__extractubyte3

Definition at line 1956 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __extractubyte4

#define __extractubyte4 Ifx__extractubyte4

Definition at line 1960 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __extractuhw1

#define __extractuhw1 Ifx__extractuhw1

Definition at line 1964 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __extractuhw2

#define __extractuhw2 Ifx__extractuhw2

Definition at line 1968 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __extru

#define __extru Ifx__extru

Definition at line 1844 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __fabs

#define __fabs Ifx__fabs

Definition at line 2193 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __fabsf

#define __fabsf Ifx__fabsf

Definition at line 2197 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __fixpoint_to_float32

#define __fixpoint_to_float32 Ifx__fixpoint_to_float32

Definition at line 2301 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __float_to_fract

#define __float_to_fract Ifx__float_to_fract

Definition at line 1784 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __float_to_sfract

#define __float_to_sfract Ifx__float_to_sfract

Definition at line 1780 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __fract_to_float

#define __fract_to_float Ifx__fract_to_float

Definition at line 1772 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __fract_to_sfract

#define __fract_to_sfract Ifx__fract_to_sfract

Definition at line 1776 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __geqf

#define __geqf Ifx__geqf

Definition at line 1764 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __getA11

#define __getA11 Ifx__getA11

Definition at line 2305 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __getbit

#define __getbit Ifx__getbit

Definition at line 1848 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __getbyte1

#define __getbyte1 Ifx__getbyte1

Definition at line 1972 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __getbyte2

#define __getbyte2 Ifx__getbyte2

Definition at line 1976 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __getbyte3

#define __getbyte3 Ifx__getbyte3

Definition at line 1980 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __getbyte4

#define __getbyte4 Ifx__getbyte4

Definition at line 1984 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __getDataParamRet

#define __getDataParamRet Ifx__getDataParamRet

Definition at line 1636 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __getfract

#define __getfract Ifx__getfract

Definition at line 1788 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __gethw1

#define __gethw1 Ifx__gethw1

Definition at line 1988 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __gethw2

#define __gethw2 Ifx__gethw2

Definition at line 1992 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __getubyte1

#define __getubyte1 Ifx__getubyte1

Definition at line 1996 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __getubyte2

#define __getubyte2 Ifx__getubyte2

Definition at line 2000 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __getubyte3

#define __getubyte3 Ifx__getubyte3

Definition at line 2004 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __getubyte4

#define __getubyte4 Ifx__getubyte4

Definition at line 2008 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __getuhw1

#define __getuhw1 Ifx__getuhw1

Definition at line 2012 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __getuhw2

#define __getuhw2 Ifx__getuhw2

Definition at line 2016 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __imaskldmst

#define __imaskldmst Ifx__imaskldmst

Definition at line 1868 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __initpackb

#define __initpackb Ifx__initpackb

Definition at line 2152 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __initpackbl

#define __initpackbl Ifx__initpackbl

Definition at line 2148 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __initpackhw

#define __initpackhw Ifx__initpackhw

Definition at line 2144 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __initpackhwl

#define __initpackhwl Ifx__initpackhwl

Definition at line 2140 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __initupackb

#define __initupackb Ifx__initupackb

Definition at line 2136 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __initupackhw

#define __initupackhw Ifx__initupackhw

Definition at line 2132 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __ins

#define __ins Ifx__ins

Definition at line 1852 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __insert

#define __insert Ifx__insert

Definition at line 1856 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __insertbyte1

#define __insertbyte1 Ifx__insertbyte1

Definition at line 2128 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __insertbyte2

#define __insertbyte2 Ifx__insertbyte2

Definition at line 2124 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __insertbyte3

#define __insertbyte3 Ifx__insertbyte3

Definition at line 2120 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __insertbyte4

#define __insertbyte4 Ifx__insertbyte4

Definition at line 2116 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __inserthw1

#define __inserthw1 Ifx__inserthw1

Definition at line 2096 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __inserthw2

#define __inserthw2 Ifx__inserthw2

Definition at line 2092 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __insertubyte1

#define __insertubyte1 Ifx__insertubyte1

Definition at line 2112 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __insertubyte2

#define __insertubyte2 Ifx__insertubyte2

Definition at line 2108 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __insertubyte3

#define __insertubyte3 Ifx__insertubyte3

Definition at line 2104 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __insertubyte4

#define __insertubyte4 Ifx__insertubyte4

Definition at line 2100 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __insertuhw1

#define __insertuhw1 Ifx__insertuhw1

Definition at line 2088 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __insertuhw2

#define __insertuhw2 Ifx__insertuhw2

Definition at line 2084 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __insn

#define __insn Ifx__insn

Definition at line 1860 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __isync

#define __isync Ifx__isync

Definition at line 2257 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __jump_and_link

#define __jump_and_link Ifx__jump_and_link

Definition at line 1624 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __jumpBackToLink

#define __jumpBackToLink Ifx__jumpBackToLink

Definition at line 1652 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __jumpToFunction

#define __jumpToFunction Ifx__jumpToFunction

Definition at line 1644 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __jumpToFunctionWithLink

#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink

Definition at line 1648 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __ldmst

#define __ldmst Ifx__ldmst

Definition at line 2261 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __leqf

#define __leqf Ifx__leqf

Definition at line 1760 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __mac_r_sf

#define __mac_r_sf Ifx__mac_r_sf

Definition at line 1792 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __mac_sf

#define __mac_sf Ifx__mac_sf

Definition at line 1796 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __max

#define __max Ifx__max

Definition at line 1680 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __max_stdreal

#define __max_stdreal Ifx__max_stdreal

Definition at line 1752 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __maxf

#define __maxf Ifx__maxf

Definition at line 1732 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __maxs

#define __maxs Ifx__maxs

Definition at line 1684 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __maxu

#define __maxu Ifx__maxu

Definition at line 1688 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __maxX

#define __maxX Ifx__maxX

Definition at line 1660 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __mem_barrier

#define __mem_barrier Ifx__mem_barrier

Definition at line 2249 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __mfcr

#define __mfcr Ifx__mfcr

Definition at line 2201 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __min

#define __min Ifx__min

Definition at line 1692 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __min_stdreal

#define __min_stdreal Ifx__min_stdreal

Definition at line 1748 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __minb

#define __minb Ifx__minb

Definition at line 2080 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __minbu

#define __minbu Ifx__minbu

Definition at line 2076 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __minf

#define __minf Ifx__minf

Definition at line 1728 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __minh

#define __minh Ifx__minh

Definition at line 2072 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __minhu

#define __minhu Ifx__minhu

Definition at line 2068 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __mins

#define __mins Ifx__mins

Definition at line 1696 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __minu

#define __minu Ifx__minu

Definition at line 1700 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __minX

#define __minX Ifx__minX

Definition at line 1656 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __moveToAddrParam0

#define __moveToAddrParam0 Ifx__moveToAddrParam0

Definition at line 1640 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __moveToDataParam0

#define __moveToDataParam0 Ifx__moveToDataParam0

Definition at line 1628 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __moveToDataParamRet

#define __moveToDataParamRet Ifx__moveToDataParamRet

Definition at line 1632 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __mtcr

#define __mtcr Ifx__mtcr

Definition at line 2205 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __mulfractfract

#define __mulfractfract Ifx__mulfractfract

Definition at line 1800 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __mulfractlong

#define __mulfractlong Ifx__mulfractlong

Definition at line 1804 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __mulsc

#define __mulsc Ifx__mulsc

Definition at line 1912 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __neqf

#define __neqf Ifx__neqf

Definition at line 1756 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __non_return_call

#define __non_return_call Ifx__non_return_call

Definition at line 1620 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __nop

#define __nop Ifx__nop

Definition at line 2265 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __nops

#define __nops Ifx__nops

Definition at line 2269 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __parity

#define __parity Ifx__parity

Definition at line 2209 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __popcnt

#define __popcnt Ifx__popcnt

Definition at line 2317 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __putbit

#define __putbit Ifx__putbit

Definition at line 1864 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __restore

#define __restore Ifx__restore

Definition at line 1888 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __rol

#define __rol Ifx__rol

Definition at line 1916 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __ror

#define __ror Ifx__ror

Definition at line 1920 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __round16

#define __round16 Ifx__round16

Definition at line 1808 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __roundf

#define __roundf Ifx__roundf

Definition at line 1716 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __rslcx

#define __rslcx Ifx__rslcx

Definition at line 2273 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __s16_to_sfract

#define __s16_to_sfract Ifx__s16_to_sfract

Definition at line 1812 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __satb

#define __satb Ifx__satb

Definition at line 2213 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __satbu

#define __satbu Ifx__satbu

Definition at line 2217 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __sath

#define __sath Ifx__sath

Definition at line 2221 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __sathu

#define __sathu Ifx__sathu

Definition at line 2225 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __saturate

#define __saturate Ifx__saturate

Definition at line 1672 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __saturate_stdreal

#define __saturate_stdreal Ifx__saturate_stdreal

Definition at line 1744 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __saturatef

#define __saturatef Ifx__saturatef

Definition at line 1724 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __saturateu

#define __saturateu Ifx__saturateu

Definition at line 1676 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __saturateX

#define __saturateX Ifx__saturateX

Definition at line 1664 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __setareg

#define __setareg Ifx__setareg

Definition at line 2289 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __setbyte1

#define __setbyte1 Ifx__setbyte1

Definition at line 2020 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __setbyte2

#define __setbyte2 Ifx__setbyte2

Definition at line 2024 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __setbyte3

#define __setbyte3 Ifx__setbyte3

Definition at line 2028 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __setbyte4

#define __setbyte4 Ifx__setbyte4

Definition at line 2032 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __sethw1

#define __sethw1 Ifx__sethw1

Definition at line 2036 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __sethw2

#define __sethw2 Ifx__sethw2

Definition at line 2040 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __setStackPointer

#define __setStackPointer Ifx__setStackPointer

Definition at line 2309 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __setubyte1

#define __setubyte1 Ifx__setubyte1

Definition at line 2044 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __setubyte2

#define __setubyte2 Ifx__setubyte2

Definition at line 2048 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __setubyte3

#define __setubyte3 Ifx__setubyte3

Definition at line 2052 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __setubyte4

#define __setubyte4 Ifx__setubyte4

Definition at line 2056 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __setuhw1

#define __setuhw1 Ifx__setuhw1

Definition at line 2060 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __setuhw2

#define __setuhw2 Ifx__setuhw2

Definition at line 2064 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __sfract_to_s16

#define __sfract_to_s16 Ifx__sfract_to_s16

Definition at line 1816 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __sfract_to_u16

#define __sfract_to_u16 Ifx__sfract_to_u16

Definition at line 1820 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __shaaccum

#define __shaaccum Ifx__shaaccum

Definition at line 1824 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __shafracts

#define __shafracts Ifx__shafracts

Definition at line 1828 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __shasfracts

#define __shasfracts Ifx__shasfracts

Definition at line 1832 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __sqrf

#define __sqrf Ifx__sqrf

Definition at line 1708 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __sqrtf

#define __sqrtf Ifx__sqrtf

Definition at line 1704 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __stopPerfCounters

#define __stopPerfCounters Ifx__stopPerfCounters

Definition at line 2293 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __subs

#define __subs Ifx__subs

Definition at line 2237 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __subsu

#define __subsu Ifx__subsu

Definition at line 2241 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __svlcx

#define __svlcx Ifx__svlcx

Definition at line 2277 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __swap

#define __swap Ifx__swap

Definition at line 2281 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __syscall

#define __syscall Ifx__syscall

Definition at line 1892 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __tric_syscall

#define __tric_syscall Ifx__tric_syscall

Definition at line 1896 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ __u16_to_sfract

#define __u16_to_sfract Ifx__u16_to_sfract

Definition at line 1836 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__non_return_call

#define Ifx__non_return_call ( fun ) __asm__ volatile ("ji %0"::"a"(fun))

Function call without return

Definition at line 68 of file IfxCpu_IntrinsicsGnuc2G.h.

Referenced by Ifx__jumpToFunction().

◆ Ifx__setareg

#define Ifx__setareg | ( | areg,
 |  | val
 | ) |
Value:
{ uint32 reg_val= (uint32)val; \
__asm__ volatile (" mov.a\t %%"#areg",%0"::"d"(reg_val)); }
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 1499 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS

#define IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 1

Definition at line 52 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ NOP

#define NOP Ifx__NOP

Definition at line 2285 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ STRINGIFY

#define STRINGIFY ( x ) #x

Definition at line 64 of file IfxCpu_IntrinsicsGnuc2G.h.

Function Documentation

◆ Ifx__cacheai()

IFX_INLINE void Ifx__cacheai ( uint8 * p )

Invalidate cache address "p". Generates CACHEA.I [Ab].

Definition at line 1611 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__cmpAndSwap()

IFX_INLINE unsigned int Ifx__cmpAndSwap | ( | unsigned int volatile * | address,
 |  | unsigned int | value,
 |  | unsigned int | condition
 | ) |  |

This function is a implementation of a binary semaphore using compare and swap instruction.

Parameters
address | address of resource.
value | This variable is updated with status of address
condition | if the value of address matches with the value of condition, then swap of value & address occurs.

Definition at line 1519 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__crc32()

IFX_INLINE uint32 Ifx__crc32 | ( | uint32 | b,
 |  | uint32 | a
 | ) |  |

Definition at line 1564 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__fixpoint_to_float32()

IFX_INLINE float32 Ifx__fixpoint_to_float32 | ( | fract | value,
 |  | sint32 | shift
 | ) |  |

Convert a fixpoint value to float32.

This function converts a value from a fixpoint format to a float32 format.

Parameters
value | value to be converted.
shift | position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
Returns
Returns the converted value in the float32 format.

Definition at line 1544 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__getA11()

IFX_INLINE void* Ifx__getA11 ( void )

Definition at line 1552 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__getDataParamRet()

IFX_INLINE unsigned int Ifx__getDataParamRet ( void )

Definition at line 87 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__jump_and_link()

IFX_INLINE void Ifx__jump_and_link ( void(*)(void) fun )

Jump and link

Definition at line 72 of file IfxCpu_IntrinsicsGnuc2G.h.

Referenced by Ifx__jumpToFunctionWithLink().

◆ Ifx__jumpBackToLink()

IFX_INLINE void Ifx__jumpBackToLink ( void )

Definition at line 109 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__jumpToFunction()

IFX_INLINE void Ifx__jumpToFunction ( const void * fun )

Definition at line 99 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__jumpToFunctionWithLink()

IFX_INLINE void Ifx__jumpToFunctionWithLink ( const void * fun )

Definition at line 104 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__moveToAddrParam0()

IFX_INLINE void Ifx__moveToAddrParam0 ( const void * var )

Definition at line 94 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__moveToDataParam0()

IFX_INLINE void Ifx__moveToDataParam0 ( unsigned int var )

Definition at line 77 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__moveToDataParamRet()

IFX_INLINE void Ifx__moveToDataParamRet ( unsigned int var )

Definition at line 82 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__popcnt()

IFX_INLINE sint32 Ifx__popcnt ( sint32 a )

Definition at line 1602 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__setStackPointer()

IFX_INLINE void Ifx__setStackPointer ( void * stackAddr )

Definition at line 1559 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ Ifx__stopPerfCounters()

IFX_INLINE void Ifx__stopPerfCounters ( void )

__mtcr (CPU_CCTRL, 0);

Definition at line 1505 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ IfxCpu_calculateCrc32()

IFX_INLINE uint32 IfxCpu_calculateCrc32 | ( | uint32 * | startaddress,
 |  | uint8 | length
 | ) |  |

Definition at line 1573 of file IfxCpu_IntrinsicsGnuc2G.h.

◆ IfxCpu_getRandomVal()

IFX_INLINE uint32 IfxCpu_getRandomVal | ( | uint32 | a,
 |  | uint32 | x,
 |  | uint32 | m
 | ) |  |

Definition at line 1585 of file IfxCpu_IntrinsicsGnuc2G.h.


iLLD_TC26B: IfxCpu_IntrinsicsTasking.h File Reference

  • Cpu
  • Std
Macros | Functions
IfxCpu_IntrinsicsTasking.h File Reference
#include "Ifx_Types.h"
Include dependency graph for IfxCpu_IntrinsicsTasking.h:

Go to the source code of this file.

Macros

#define | Ifx__non_return_call(fun) __asm("\tji %0"::"a"(fun))
#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__saturate(X, Min, Max) ( __min(__max(X, Min), Max) )
#define | Ifx__saturateu(X, Min, Max) ( __minu(__maxu(X, Min), Max) )
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__roundf(X) ((((X) - (int)(X)) > 0.5) ? (1 + (int)(X)) : ((int)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(_Ifx_maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__fract_to_float(value) ((float)(value))
#define | Ifx__mulfractlong __mulfractlong
#define | Ifx__mulfractfract(fractvalue1, fractvalue2) ((fractvalue1)*(fractvalue2))
#define | Ifx__extru(a, p, w) __extru(a,p,w)
#define | Ifx__extr(a, p, w) __extr(a,p,w)
#define | Ifx__imaskldmst(a, v, b, p) __imaskldmst((int*)a, v, b, p)
#define | Ifx__insert(a, b, p, w) __insert(a,b,p,w)
#define | Ifx__disable_and_save __disable_and_save
#define | Ifx__restore __restore
#define | Ifx__mtcr_no_isync(reg, val) __asm("mtcr %0,%1"::"i"(reg),"d"(val));
#define | Ifx__adds(a, b) ((__sat int)(a)+(__sat int)(b))
#define | Ifx__addsu(a, b) ((__sat unsigned int)(a)+(__sat unsigned int)(b))
#define | Ifx__subs(a, b) ((__sat int)(a)-(__sat int)(b))
#define | Ifx__subsu(a, b) ((__sat unsigned int )(a)-(__sat unsigned int )(b))
#define | Ifx__NOP(n) __asm(".DUP " #n "\n\tnop16\n\t.ENDM\n")
#define | Ifx__mem_barrier __asm("":::"memory");
#define | Ifx__fract_to_sfract __round16
#define | Ifx__ldmst(addr, mask, data) Ifx__ldmstAsm(addr, mask, data)
#define | Ifx___setareg(areg, val) { __asm (" movh.a\t "#areg",#@his("#val")\n lea\t "#areg",["#areg"]@los("#val")"); }
#define | Ifx__setareg(areg, val) Ifx___setareg(areg,val)
#define | Ifx__cmpAndSwap(address, value, condition) __cmpswapw((address), ((unsigned long)value), (condition) )
This function is a implementation of a binary semaphore using compare and swap instruction. More...
#define | __non_return_call Ifx__non_return_call
#define | __jump_and_link Ifx__jump_and_link
#define | __moveToDataParam0 Ifx__moveToDataParam0
#define | __moveToAddrParam0 Ifx__moveToAddrParam0
#define | __getDataParamRet Ifx__getDataParamRet
#define | __moveToDataParamRet Ifx__moveToDataParamRet
#define | __jumpToFunction Ifx__jumpToFunction
#define | __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
#define | __jumpBackToLink Ifx__jumpBackToLink
#define | __minX Ifx__minX
#define | __maxX Ifx__maxX
#define | __saturateX Ifx__saturateX
#define | __checkrangeX Ifx__checkrangeX
#define | __saturate Ifx__saturate
#define | __saturateu Ifx__saturateu
#define | __checkrange Ifx__checkrange
#define | __sqrtf Ifx__sqrtf
#define | __sqrf Ifx__sqrf
#define | __roundf Ifx__roundf
#define | __absf Ifx__absf
#define | __maxf Ifx__maxf
#define | __saturatef Ifx__saturatef
#define | __minf Ifx__minf
#define | __checkrangef Ifx__checkrangef
#define | __abs_stdreal Ifx__abs_stdreal
#define | __saturate_stdreal Ifx__saturate_stdreal
#define | __min_stdreal Ifx__min_stdreal
#define | __max_stdreal Ifx__max_stdreal
#define | __neqf Ifx__neqf
#define | __leqf Ifx__leqf
#define | __geqf Ifx__geqf
#define | __fract_to_float Ifx__fract_to_float
#define | __mulfractlong Ifx__mulfractlong
#define | __mulfractfract Ifx__mulfractfract
#define | __disable_and_save Ifx__disable_and_save
#define | __restore Ifx__restore
#define | __mtcr_no_isync Ifx__mtcr_no_isync
#define | __adds Ifx__adds
#define | __addsu Ifx__addsu
#define | __subs Ifx__subs
#define | __subsu Ifx__subsu
#define | __nops Ifx__nops
#define | NOP Ifx__NOP
#define | __mem_barrier Ifx__mem_barrier
#define | __ldmst Ifx__ldmst
#define | __ldmstC Ifx__ldmstC
#define | __float_to_sfract Ifx__float_to_sfract
#define | __float_to_fract Ifx__float_to_fract
#define | __fract_to_sfract Ifx__fract_to_sfract
#define | __ldmstAsm Ifx__ldmstAsm
#define | __stopPerfCounters Ifx__stopPerfCounters
#define | __setareg Ifx__setareg
#define | ___setareg Ifx___setareg
#define | __cmpAndSwap Ifx__cmpAndSwap
#define | __fixpoint_to_float32 Ifx__fixpoint_to_float32
#define | __getA11 Ifx__getA11
#define | __setStackPointer Ifx__setStackPointer
#define | __popcnt Ifx__popcnt

Functions

IFX_INLINE void | Ifx__jump_and_link (void(*fun)(void))
IFX_INLINE void | Ifx__moveToDataParam0 (unsigned int var)
IFX_INLINE void | Ifx__moveToAddrParam0 (const void *var)
IFX_INLINE unsigned int | Ifx__getDataParamRet (void)
IFX_INLINE void | Ifx__moveToDataParamRet (unsigned int var)
IFX_INLINE void | Ifx__jumpToFunction (const void *fun)
IFX_INLINE void | Ifx__jumpToFunctionWithLink (const void *fun)
IFX_INLINE void | Ifx__jumpBackToLink (void)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE void | Ifx__ldmstAsm (volatile void *addr, uint32 mask, uint32 data)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE void | Ifx__stopPerfCounters (void)
IFX_INLINE float32 | Ifx__fixpoint_to_float32 (fract value, sint32 shift)
Convert a fixpoint value to float32. More...
IFX_INLINE void * | Ifx__getA11 (void)
IFX_INLINE void | Ifx__setStackPointer (void *stackAddr)
IFX_INLINE uint32 | IfxCpu_calculateCrc32 (uint32 *startaddress, uint8 length)
IFX_INLINE uint32 | IfxCpu_getRandomVal (uint32 a, uint32 x, uint32 m)
IFX_INLINE sint32 | Ifx__popcnt (sint32 a)

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_IntrinsicsTasking.h.

Macro Definition Documentation

◆ ___setareg

#define ___setareg Ifx___setareg

Definition at line 609 of file IfxCpu_IntrinsicsTasking.h.

◆ __abs_stdreal

#define __abs_stdreal Ifx__abs_stdreal

Definition at line 497 of file IfxCpu_IntrinsicsTasking.h.

◆ __absf

#define __absf Ifx__absf

Definition at line 477 of file IfxCpu_IntrinsicsTasking.h.

◆ __adds

#define __adds Ifx__adds

Definition at line 549 of file IfxCpu_IntrinsicsTasking.h.

◆ __addsu

#define __addsu Ifx__addsu

Definition at line 553 of file IfxCpu_IntrinsicsTasking.h.

◆ __checkrange

#define __checkrange Ifx__checkrange

Definition at line 461 of file IfxCpu_IntrinsicsTasking.h.

◆ __checkrangef

#define __checkrangef Ifx__checkrangef

Definition at line 493 of file IfxCpu_IntrinsicsTasking.h.

◆ __checkrangeX

#define __checkrangeX Ifx__checkrangeX

Definition at line 449 of file IfxCpu_IntrinsicsTasking.h.

◆ __cmpAndSwap

#define __cmpAndSwap Ifx__cmpAndSwap

Definition at line 613 of file IfxCpu_IntrinsicsTasking.h.

◆ __disable_and_save

#define __disable_and_save Ifx__disable_and_save

Definition at line 537 of file IfxCpu_IntrinsicsTasking.h.

◆ __fixpoint_to_float32

#define __fixpoint_to_float32 Ifx__fixpoint_to_float32

Definition at line 617 of file IfxCpu_IntrinsicsTasking.h.

◆ __float_to_fract

#define __float_to_fract Ifx__float_to_fract

Definition at line 589 of file IfxCpu_IntrinsicsTasking.h.

◆ __float_to_sfract

#define __float_to_sfract Ifx__float_to_sfract

Definition at line 585 of file IfxCpu_IntrinsicsTasking.h.

◆ __fract_to_float

#define __fract_to_float Ifx__fract_to_float

Definition at line 525 of file IfxCpu_IntrinsicsTasking.h.

◆ __fract_to_sfract

#define __fract_to_sfract Ifx__fract_to_sfract

Definition at line 593 of file IfxCpu_IntrinsicsTasking.h.

◆ __geqf

#define __geqf Ifx__geqf

Definition at line 521 of file IfxCpu_IntrinsicsTasking.h.

◆ __getA11

#define __getA11 Ifx__getA11

Definition at line 621 of file IfxCpu_IntrinsicsTasking.h.

◆ __getDataParamRet

#define __getDataParamRet Ifx__getDataParamRet

Definition at line 417 of file IfxCpu_IntrinsicsTasking.h.

◆ __jump_and_link

#define __jump_and_link Ifx__jump_and_link

Definition at line 405 of file IfxCpu_IntrinsicsTasking.h.

◆ __jumpBackToLink

#define __jumpBackToLink Ifx__jumpBackToLink

Definition at line 433 of file IfxCpu_IntrinsicsTasking.h.

◆ __jumpToFunction

#define __jumpToFunction Ifx__jumpToFunction

Definition at line 425 of file IfxCpu_IntrinsicsTasking.h.

◆ __jumpToFunctionWithLink

#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink

Definition at line 429 of file IfxCpu_IntrinsicsTasking.h.

◆ __ldmst

#define __ldmst Ifx__ldmst

Definition at line 577 of file IfxCpu_IntrinsicsTasking.h.

◆ __ldmstAsm

#define __ldmstAsm Ifx__ldmstAsm

Definition at line 597 of file IfxCpu_IntrinsicsTasking.h.

◆ __ldmstC

#define __ldmstC Ifx__ldmstC

Definition at line 581 of file IfxCpu_IntrinsicsTasking.h.

◆ __leqf

#define __leqf Ifx__leqf

Definition at line 517 of file IfxCpu_IntrinsicsTasking.h.

◆ __max_stdreal

#define __max_stdreal Ifx__max_stdreal

Definition at line 509 of file IfxCpu_IntrinsicsTasking.h.

◆ __maxf

#define __maxf Ifx__maxf

Definition at line 481 of file IfxCpu_IntrinsicsTasking.h.

◆ __maxX

#define __maxX Ifx__maxX

Definition at line 441 of file IfxCpu_IntrinsicsTasking.h.

◆ __mem_barrier

#define __mem_barrier Ifx__mem_barrier

Definition at line 573 of file IfxCpu_IntrinsicsTasking.h.

◆ __min_stdreal

#define __min_stdreal Ifx__min_stdreal

Definition at line 505 of file IfxCpu_IntrinsicsTasking.h.

◆ __minf

#define __minf Ifx__minf

Definition at line 489 of file IfxCpu_IntrinsicsTasking.h.

◆ __minX

#define __minX Ifx__minX

Definition at line 437 of file IfxCpu_IntrinsicsTasking.h.

◆ __moveToAddrParam0

#define __moveToAddrParam0 Ifx__moveToAddrParam0

Definition at line 413 of file IfxCpu_IntrinsicsTasking.h.

◆ __moveToDataParam0

#define __moveToDataParam0 Ifx__moveToDataParam0

Definition at line 409 of file IfxCpu_IntrinsicsTasking.h.

◆ __moveToDataParamRet

#define __moveToDataParamRet Ifx__moveToDataParamRet

Definition at line 421 of file IfxCpu_IntrinsicsTasking.h.

◆ __mtcr_no_isync

#define __mtcr_no_isync Ifx__mtcr_no_isync

Definition at line 545 of file IfxCpu_IntrinsicsTasking.h.

◆ __mulfractfract

#define __mulfractfract Ifx__mulfractfract

Definition at line 533 of file IfxCpu_IntrinsicsTasking.h.

◆ __mulfractlong

#define __mulfractlong Ifx__mulfractlong

Definition at line 529 of file IfxCpu_IntrinsicsTasking.h.

◆ __neqf

#define __neqf Ifx__neqf

Definition at line 513 of file IfxCpu_IntrinsicsTasking.h.

◆ __non_return_call

#define __non_return_call Ifx__non_return_call

Definition at line 401 of file IfxCpu_IntrinsicsTasking.h.

◆ __nops

#define __nops Ifx__nops

Definition at line 565 of file IfxCpu_IntrinsicsTasking.h.

◆ __popcnt

#define __popcnt Ifx__popcnt

Definition at line 629 of file IfxCpu_IntrinsicsTasking.h.

◆ __restore

#define __restore Ifx__restore

Definition at line 541 of file IfxCpu_IntrinsicsTasking.h.

◆ __roundf

#define __roundf Ifx__roundf

Definition at line 473 of file IfxCpu_IntrinsicsTasking.h.

◆ __saturate

#define __saturate Ifx__saturate

Definition at line 453 of file IfxCpu_IntrinsicsTasking.h.

◆ __saturate_stdreal

#define __saturate_stdreal Ifx__saturate_stdreal

Definition at line 501 of file IfxCpu_IntrinsicsTasking.h.

◆ __saturatef

#define __saturatef Ifx__saturatef

Definition at line 485 of file IfxCpu_IntrinsicsTasking.h.

◆ __saturateu

#define __saturateu Ifx__saturateu

Definition at line 457 of file IfxCpu_IntrinsicsTasking.h.

◆ __saturateX

#define __saturateX Ifx__saturateX

Definition at line 445 of file IfxCpu_IntrinsicsTasking.h.

◆ __setareg

#define __setareg Ifx__setareg

Definition at line 605 of file IfxCpu_IntrinsicsTasking.h.

◆ __setStackPointer

#define __setStackPointer Ifx__setStackPointer

Definition at line 625 of file IfxCpu_IntrinsicsTasking.h.

◆ __sqrf

#define __sqrf Ifx__sqrf

Definition at line 469 of file IfxCpu_IntrinsicsTasking.h.

◆ __sqrtf

#define __sqrtf Ifx__sqrtf

Definition at line 465 of file IfxCpu_IntrinsicsTasking.h.

◆ __stopPerfCounters

#define __stopPerfCounters Ifx__stopPerfCounters

Definition at line 601 of file IfxCpu_IntrinsicsTasking.h.

◆ __subs

#define __subs Ifx__subs

Definition at line 557 of file IfxCpu_IntrinsicsTasking.h.

◆ __subsu

#define __subsu Ifx__subsu

Definition at line 561 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx___setareg

#define Ifx___setareg | ( | areg,
 |  | val
 | ) | { __asm (" movh.a\t "#areg",#@his("#val")\n lea\t "#areg",["#areg"]@los("#val")"); }

Definition at line 310 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__cmpAndSwap

#define Ifx__cmpAndSwap | ( | address,
 |  | value,
 |  | condition
 | ) | __cmpswapw((address), ((unsigned long)value), (condition) )

This function is a implementation of a binary semaphore using compare and swap instruction.

Parameters
address | address of resource.
value | This variable is updated with status of address
condition | if the value of address matches with the value of condition, then swap of value & address occurs.

Definition at line 320 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__non_return_call

#define Ifx__non_return_call ( fun ) __asm("\tji %0"::"a"(fun))

Function call without return

Definition at line 54 of file IfxCpu_IntrinsicsTasking.h.

Referenced by Ifx__jumpToFunction().

◆ Ifx__setareg

#define Ifx__setareg | ( | areg,
 |  | val
 | ) | Ifx___setareg(areg,val)

Definition at line 312 of file IfxCpu_IntrinsicsTasking.h.

◆ NOP

#define NOP Ifx__NOP

Definition at line 569 of file IfxCpu_IntrinsicsTasking.h.

Function Documentation

◆ Ifx__fixpoint_to_float32()

IFX_INLINE float32 Ifx__fixpoint_to_float32 | ( | fract | value,
 |  | sint32 | shift
 | ) |  |

Convert a fixpoint value to float32.

This function converts a value from a fixpoint format to a float32 format.

Parameters
value | value to be converted.
shift | position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
Returns
Returns the converted value in the float32 format.

Definition at line 334 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__getA11()

IFX_INLINE void* Ifx__getA11 ( void )

Definition at line 345 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__getDataParamRet()

IFX_INLINE unsigned int Ifx__getDataParamRet ( void )

Definition at line 73 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__jump_and_link()

IFX_INLINE void Ifx__jump_and_link ( void(*)(void) fun )

Jump and link

Definition at line 58 of file IfxCpu_IntrinsicsTasking.h.

Referenced by Ifx__jumpToFunctionWithLink().

◆ Ifx__jumpBackToLink()

IFX_INLINE void Ifx__jumpBackToLink ( void )

Definition at line 95 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__jumpToFunction()

IFX_INLINE void Ifx__jumpToFunction ( const void * fun )

Definition at line 85 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__jumpToFunctionWithLink()

IFX_INLINE void Ifx__jumpToFunctionWithLink ( const void * fun )

Definition at line 90 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__moveToAddrParam0()

IFX_INLINE void Ifx__moveToAddrParam0 ( const void * var )

Definition at line 68 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__moveToDataParam0()

IFX_INLINE void Ifx__moveToDataParam0 ( unsigned int var )

Definition at line 63 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__moveToDataParamRet()

IFX_INLINE void Ifx__moveToDataParamRet ( unsigned int var )

Definition at line 80 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__popcnt()

IFX_INLINE sint32 Ifx__popcnt ( sint32 a )

Definition at line 389 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__setStackPointer()

IFX_INLINE void Ifx__setStackPointer ( void * stackAddr )

Definition at line 352 of file IfxCpu_IntrinsicsTasking.h.

◆ IfxCpu_calculateCrc32()

IFX_INLINE uint32 IfxCpu_calculateCrc32 | ( | uint32 * | startaddress,
 |  | uint8 | length
 | ) |  |

Definition at line 357 of file IfxCpu_IntrinsicsTasking.h.

◆ IfxCpu_getRandomVal()

IFX_INLINE uint32 IfxCpu_getRandomVal | ( | uint32 | a,
 |  | uint32 | x,
 |  | uint32 | m
 | ) |  |

Definition at line 372 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC26B: IfxCpu_IntrinsicsTasking2G.h File Reference

  • Cpu
  • Std
Macros | Functions
IfxCpu_IntrinsicsTasking2G.h File Reference
#include "Ifx_Types.h"
Include dependency graph for IfxCpu_IntrinsicsTasking2G.h:

Go to the source code of this file.

Macros

#define | Ifx__non_return_call(fun) __asm("\tji %0"::"a"(fun))
#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__saturate(X, Min, Max) ( __min(__max(X, Min), Max) )
#define | Ifx__saturateu(X, Min, Max) ( __minu(__maxu(X, Min), Max) )
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__roundf(X) ((((X) - (int)(X)) > 0.5) ? (1 + (int)(X)) : ((int)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(_Ifx_maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__fract_to_float(value) ((float)(value))
#define | Ifx__mulfractlong __mulfractlong
#define | Ifx__mulfractfract(fractvalue1, fractvalue2) ((fractvalue1)*(fractvalue2))
#define | Ifx__extru(a, p, w) __extru(a,p,w)
#define | Ifx__extr(a, p, w) __extr(a,p,w)
#define | Ifx__imaskldmst(a, v, b, p) __imaskldmst((int*)a, v, b, p)
#define | Ifx__insert(a, b, p, w) __insert(a,b,p,w)
#define | Ifx__disable_and_save __disable_and_save
#define | Ifx__restore __restore
#define | Ifx__mtcr_no_isync(reg, val) __asm("mtcr %0,%1"::"i"(reg),"d"(val));
#define | Ifx__adds(a, b) ((__sat int)(a)+(__sat int)(b))
#define | Ifx__addsu(a, b) ((__sat unsigned int)(a)+(__sat unsigned int)(b))
#define | Ifx__subs(a, b) ((__sat int)(a)-(__sat int)(b))
#define | Ifx__subsu(a, b) ((__sat unsigned int )(a)-(__sat unsigned int )(b))
#define | Ifx__NOP(n) __asm(".DUP " #n "\n\tnop16\n\t.ENDM\n")
#define | Ifx__mem_barrier __asm("":::"memory");
#define | Ifx__fract_to_sfract __round16
#define | Ifx__ldmst(addr, mask, data) Ifx__ldmstAsm(addr, mask, data)
#define | Ifx___setareg(areg, val) { __asm (" movh.a\t "#areg",#@his("#val")\n lea\t "#areg",["#areg"]@los("#val")"); }
#define | Ifx__setareg(areg, val) Ifx___setareg(areg,val)
#define | Ifx__cmpAndSwap(address, value, condition) __cmpswapw((address), ((unsigned long)value), (condition) )
This function is a implementation of a binary semaphore using compare and swap instruction. More...
#define | __non_return_call Ifx__non_return_call
#define | __jump_and_link Ifx__jump_and_link
#define | __moveToDataParam0 Ifx__moveToDataParam0
#define | __moveToAddrParam0 Ifx__moveToAddrParam0
#define | __getDataParamRet Ifx__getDataParamRet
#define | __moveToDataParamRet Ifx__moveToDataParamRet
#define | __jumpToFunction Ifx__jumpToFunction
#define | __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
#define | __jumpBackToLink Ifx__jumpBackToLink
#define | __minX Ifx__minX
#define | __maxX Ifx__maxX
#define | __saturateX Ifx__saturateX
#define | __checkrangeX Ifx__checkrangeX
#define | __saturate Ifx__saturate
#define | __saturateu Ifx__saturateu
#define | __checkrange Ifx__checkrange
#define | __sqrtf Ifx__sqrtf
#define | __sqrf Ifx__sqrf
#define | __roundf Ifx__roundf
#define | __absf Ifx__absf
#define | __maxf Ifx__maxf
#define | __saturatef Ifx__saturatef
#define | __minf Ifx__minf
#define | __checkrangef Ifx__checkrangef
#define | __abs_stdreal Ifx__abs_stdreal
#define | __saturate_stdreal Ifx__saturate_stdreal
#define | __min_stdreal Ifx__min_stdreal
#define | __max_stdreal Ifx__max_stdreal
#define | __neqf Ifx__neqf
#define | __leqf Ifx__leqf
#define | __geqf Ifx__geqf
#define | __fract_to_float Ifx__fract_to_float
#define | __mulfractlong Ifx__mulfractlong
#define | __mulfractfract Ifx__mulfractfract
#define | __disable_and_save Ifx__disable_and_save
#define | __restore Ifx__restore
#define | __mtcr_no_isync Ifx__mtcr_no_isync
#define | __adds Ifx__adds
#define | __addsu Ifx__addsu
#define | __subs Ifx__subs
#define | __subsu Ifx__subsu
#define | __nops Ifx__nops
#define | NOP Ifx__NOP
#define | __mem_barrier Ifx__mem_barrier
#define | __ldmst Ifx__ldmst
#define | __ldmstC Ifx__ldmstC
#define | __float_to_sfract Ifx__float_to_sfract
#define | __float_to_fract Ifx__float_to_fract
#define | __fract_to_sfract Ifx__fract_to_sfract
#define | __ldmstAsm Ifx__ldmstAsm
#define | __stopPerfCounters Ifx__stopPerfCounters
#define | __setareg Ifx__setareg
#define | ___setareg Ifx___setareg
#define | __cmpAndSwap Ifx__cmpAndSwap
#define | __fixpoint_to_float32 Ifx__fixpoint_to_float32
#define | __getA11 Ifx__getA11
#define | __setStackPointer Ifx__setStackPointer
#define | __popcnt Ifx__popcnt

Functions

IFX_INLINE void | Ifx__jump_and_link (void(*fun)(void))
IFX_INLINE void | Ifx__moveToDataParam0 (unsigned int var)
IFX_INLINE void | Ifx__moveToAddrParam0 (const void *var)
IFX_INLINE unsigned int | Ifx__getDataParamRet (void)
IFX_INLINE void | Ifx__moveToDataParamRet (unsigned int var)
IFX_INLINE void | Ifx__jumpToFunction (const void *fun)
IFX_INLINE void | Ifx__jumpToFunctionWithLink (const void *fun)
IFX_INLINE void | Ifx__jumpBackToLink (void)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE void | Ifx__ldmstAsm (volatile void *addr, uint32 mask, uint32 data)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE void | Ifx__stopPerfCounters (void)
IFX_INLINE float32 | Ifx__fixpoint_to_float32 (fract value, sint32 shift)
Convert a fixpoint value to float32. More...
IFX_INLINE void * | Ifx__getA11 (void)
IFX_INLINE void | Ifx__setStackPointer (void *stackAddr)
IFX_INLINE uint32 | IfxCpu_calculateCrc32 (uint32 *startaddress, uint8 length)
IFX_INLINE uint32 | IfxCpu_getRandomVal (uint32 a, uint32 x, uint32 m)
IFX_INLINE sint32 | Ifx__popcnt (sint32 a)

Macro Definition Documentation

◆ ___setareg

#define ___setareg Ifx___setareg

Definition at line 609 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __abs_stdreal

#define __abs_stdreal Ifx__abs_stdreal

Definition at line 497 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __absf

#define __absf Ifx__absf

Definition at line 477 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __adds

#define __adds Ifx__adds

Definition at line 549 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __addsu

#define __addsu Ifx__addsu

Definition at line 553 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __checkrange

#define __checkrange Ifx__checkrange

Definition at line 461 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __checkrangef

#define __checkrangef Ifx__checkrangef

Definition at line 493 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __checkrangeX

#define __checkrangeX Ifx__checkrangeX

Definition at line 449 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __cmpAndSwap

#define __cmpAndSwap Ifx__cmpAndSwap

Definition at line 613 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __disable_and_save

#define __disable_and_save Ifx__disable_and_save

Definition at line 537 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __fixpoint_to_float32

#define __fixpoint_to_float32 Ifx__fixpoint_to_float32

Definition at line 617 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __float_to_fract

#define __float_to_fract Ifx__float_to_fract

Definition at line 589 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __float_to_sfract

#define __float_to_sfract Ifx__float_to_sfract

Definition at line 585 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __fract_to_float

#define __fract_to_float Ifx__fract_to_float

Definition at line 525 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __fract_to_sfract

#define __fract_to_sfract Ifx__fract_to_sfract

Definition at line 593 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __geqf

#define __geqf Ifx__geqf

Definition at line 521 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __getA11

#define __getA11 Ifx__getA11

Definition at line 621 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __getDataParamRet

#define __getDataParamRet Ifx__getDataParamRet

Definition at line 417 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __jump_and_link

#define __jump_and_link Ifx__jump_and_link

Definition at line 405 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __jumpBackToLink

#define __jumpBackToLink Ifx__jumpBackToLink

Definition at line 433 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __jumpToFunction

#define __jumpToFunction Ifx__jumpToFunction

Definition at line 425 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __jumpToFunctionWithLink

#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink

Definition at line 429 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __ldmst

#define __ldmst Ifx__ldmst

Definition at line 577 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __ldmstAsm

#define __ldmstAsm Ifx__ldmstAsm

Definition at line 597 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __ldmstC

#define __ldmstC Ifx__ldmstC

Definition at line 581 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __leqf

#define __leqf Ifx__leqf

Definition at line 517 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __max_stdreal

#define __max_stdreal Ifx__max_stdreal

Definition at line 509 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __maxf

#define __maxf Ifx__maxf

Definition at line 481 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __maxX

#define __maxX Ifx__maxX

Definition at line 441 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __mem_barrier

#define __mem_barrier Ifx__mem_barrier

Definition at line 573 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __min_stdreal

#define __min_stdreal Ifx__min_stdreal

Definition at line 505 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __minf

#define __minf Ifx__minf

Definition at line 489 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __minX

#define __minX Ifx__minX

Definition at line 437 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __moveToAddrParam0

#define __moveToAddrParam0 Ifx__moveToAddrParam0

Definition at line 413 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __moveToDataParam0

#define __moveToDataParam0 Ifx__moveToDataParam0

Definition at line 409 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __moveToDataParamRet

#define __moveToDataParamRet Ifx__moveToDataParamRet

Definition at line 421 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __mtcr_no_isync

#define __mtcr_no_isync Ifx__mtcr_no_isync

Definition at line 545 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __mulfractfract

#define __mulfractfract Ifx__mulfractfract

Definition at line 533 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __mulfractlong

#define __mulfractlong Ifx__mulfractlong

Definition at line 529 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __neqf

#define __neqf Ifx__neqf

Definition at line 513 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __non_return_call

#define __non_return_call Ifx__non_return_call

Definition at line 401 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __nops

#define __nops Ifx__nops

Definition at line 565 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __popcnt

#define __popcnt Ifx__popcnt

Definition at line 629 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __restore

#define __restore Ifx__restore

Definition at line 541 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __roundf

#define __roundf Ifx__roundf

Definition at line 473 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __saturate

#define __saturate Ifx__saturate

Definition at line 453 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __saturate_stdreal

#define __saturate_stdreal Ifx__saturate_stdreal

Definition at line 501 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __saturatef

#define __saturatef Ifx__saturatef

Definition at line 485 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __saturateu

#define __saturateu Ifx__saturateu

Definition at line 457 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __saturateX

#define __saturateX Ifx__saturateX

Definition at line 445 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __setareg

#define __setareg Ifx__setareg

Definition at line 605 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __setStackPointer

#define __setStackPointer Ifx__setStackPointer

Definition at line 625 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __sqrf

#define __sqrf Ifx__sqrf

Definition at line 469 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __sqrtf

#define __sqrtf Ifx__sqrtf

Definition at line 465 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __stopPerfCounters

#define __stopPerfCounters Ifx__stopPerfCounters

Definition at line 601 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __subs

#define __subs Ifx__subs

Definition at line 557 of file IfxCpu_IntrinsicsTasking2G.h.

◆ __subsu

#define __subsu Ifx__subsu

Definition at line 561 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx___setareg

#define Ifx___setareg | ( | areg,
 |  | val
 | ) | { __asm (" movh.a\t "#areg",#@his("#val")\n lea\t "#areg",["#areg"]@los("#val")"); }

Definition at line 310 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__cmpAndSwap

#define Ifx__cmpAndSwap | ( | address,
 |  | value,
 |  | condition
 | ) | __cmpswapw((address), ((unsigned long)value), (condition) )

This function is a implementation of a binary semaphore using compare and swap instruction.

Parameters
address | address of resource.
value | This variable is updated with status of address
condition | if the value of address matches with the value of condition, then swap of value & address occurs.

Definition at line 320 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__non_return_call

#define Ifx__non_return_call ( fun ) __asm("\tji %0"::"a"(fun))

Function call without return

Definition at line 54 of file IfxCpu_IntrinsicsTasking2G.h.

Referenced by Ifx__jumpToFunction().

◆ Ifx__setareg

#define Ifx__setareg | ( | areg,
 |  | val
 | ) | Ifx___setareg(areg,val)

Definition at line 312 of file IfxCpu_IntrinsicsTasking2G.h.

◆ NOP

#define NOP Ifx__NOP

Definition at line 569 of file IfxCpu_IntrinsicsTasking2G.h.

Function Documentation

◆ Ifx__fixpoint_to_float32()

IFX_INLINE float32 Ifx__fixpoint_to_float32 | ( | fract | value,
 |  | sint32 | shift
 | ) |  |

Convert a fixpoint value to float32.

This function converts a value from a fixpoint format to a float32 format.

Parameters
value | value to be converted.
shift | position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
Returns
Returns the converted value in the float32 format.

Definition at line 334 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__getA11()

IFX_INLINE void* Ifx__getA11 ( void )

Definition at line 345 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__getDataParamRet()

IFX_INLINE unsigned int Ifx__getDataParamRet ( void )

Definition at line 73 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__jump_and_link()

IFX_INLINE void Ifx__jump_and_link ( void(*)(void) fun )

Jump and link

Definition at line 58 of file IfxCpu_IntrinsicsTasking2G.h.

Referenced by Ifx__jumpToFunctionWithLink().

◆ Ifx__jumpBackToLink()

IFX_INLINE void Ifx__jumpBackToLink ( void )

Definition at line 95 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__jumpToFunction()

IFX_INLINE void Ifx__jumpToFunction ( const void * fun )

Definition at line 85 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__jumpToFunctionWithLink()

IFX_INLINE void Ifx__jumpToFunctionWithLink ( const void * fun )

Definition at line 90 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__moveToAddrParam0()

IFX_INLINE void Ifx__moveToAddrParam0 ( const void * var )

Definition at line 68 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__moveToDataParam0()

IFX_INLINE void Ifx__moveToDataParam0 ( unsigned int var )

Definition at line 63 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__moveToDataParamRet()

IFX_INLINE void Ifx__moveToDataParamRet ( unsigned int var )

Definition at line 80 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__popcnt()

IFX_INLINE sint32 Ifx__popcnt ( sint32 a )

Definition at line 389 of file IfxCpu_IntrinsicsTasking2G.h.

◆ Ifx__setStackPointer()

IFX_INLINE void Ifx__setStackPointer ( void * stackAddr )

Definition at line 352 of file IfxCpu_IntrinsicsTasking2G.h.

◆ IfxCpu_calculateCrc32()

IFX_INLINE uint32 IfxCpu_calculateCrc32 | ( | uint32 * | startaddress,
 |  | uint8 | length
 | ) |  |

Definition at line 357 of file IfxCpu_IntrinsicsTasking2G.h.

◆ IfxCpu_getRandomVal()

IFX_INLINE uint32 IfxCpu_getRandomVal | ( | uint32 | a,
 |  | uint32 | x,
 |  | uint32 | m
 | ) |  |

Definition at line 372 of file IfxCpu_IntrinsicsTasking2G.h.


iLLD_TC26B: IfxCpu_Irq.c File Reference

  • Cpu
  • Irq
IfxCpu_Irq.c File Reference

This file contains the APIs for Interrupt related functions. More...

#include "Cpu/Irq/IfxCpu_Irq.h"
#include "Tricore/Compilers/Compilers.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxCpu_reg.h"
Include dependency graph for IfxCpu_Irq.c:

Go to the source code of this file.

Detailed Description

This file contains the APIs for Interrupt related functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_Irq.c.


iLLD_TC26B: IfxCpu_Irq.h File Reference

  • Cpu
  • Irq
Functions
IfxCpu_Irq.h File Reference

This file contains the APIs for Interrupt related functions. More...

#include "Ifx_Cfg.h"
#include "Cpu/Std/Ifx_Types.h"
#include "Cpu/Std/IfxCpu.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxCpu_Irq.h:

Go to the source code of this file.

Functions

IFX_INLINE IfxSrc_Tos IfxCpu_Irq_getTos (IfxCpu_ResourceCpu coreId)
API to get type of service of the caller CPU. More...

Detailed Description

This file contains the APIs for Interrupt related functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_Irq.h.


iLLD_TC26B: IfxCpu_Trap.c File Reference

  • Cpu
  • Trap
Macros | Functions
IfxCpu_Trap.c File Reference

This file contains the APIs for Trap related functions. More...

#include "IfxCpu_Trap.h"
#include "Cpu/Std/IfxCpu.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxCpu_reg.h"
#include "Ifx_Cfg.h"
Include dependency graph for IfxCpu_Trap.c:

Go to the source code of this file.

Macros

#define | IFX_CFG_CPU_TRAP_TSR_HOOK(trapWatch)
Configuration for CpuX enable. More...
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_NMI_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_MME_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_IPE_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_IE_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_CME_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_BE_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_ASSERT_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_DEBUG __debug()

Functions

IFX_INLINE IfxCpu_Trap | IfxCpu_Trap_extractTrapInfo (uint8 trapClass, uint32 tin)
void | IfxCpu_Trap_memoryManagementError (uint32 tin)
void | IfxCpu_Trap_internalProtectionError (uint32 tin)
void | IfxCpu_Trap_instructionError (uint32 tin)
void | IfxCpu_Trap_contextManagementError (uint32 tin)
void | IfxCpu_Trap_busError (uint32 tin)
void | IfxCpu_Trap_assertion (uint32 tin)
void | IfxCpu_Trap_systemCall_Cpu0 (uint32 tin)
void | IfxCpu_Trap_nonMaskableInterrupt (uint32 tin)
void | IfxCpu_Trap_vectorTable0 (void)

Detailed Description

This file contains the APIs for Trap related functions.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxCpu_Trap.c.

Macro Definition Documentation

◆ IFX_CFG_CPU_TRAP_ASSERT_HOOK

#define IFX_CFG_CPU_TRAP_ASSERT_HOOK ( trapWatch ) ((void)trapWatch)

By default assertion is empty

Definition at line 102 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_assertion().

◆ IFX_CFG_CPU_TRAP_BE_HOOK

#define IFX_CFG_CPU_TRAP_BE_HOOK ( trapWatch ) ((void)trapWatch)

By default bus Error macro is empty

Definition at line 99 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_busError().

◆ IFX_CFG_CPU_TRAP_CME_HOOK

#define IFX_CFG_CPU_TRAP_CME_HOOK ( trapWatch ) ((void)trapWatch)

By default context Management Error macro is empty

Definition at line 96 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_contextManagementError().

◆ IFX_CFG_CPU_TRAP_DEBUG

#define IFX_CFG_CPU_TRAP_DEBUG __debug()

Definition at line 106 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_assertion(), IfxCpu_Trap_busError(), IfxCpu_Trap_contextManagementError(), IfxCpu_Trap_instructionError(), IfxCpu_Trap_internalProtectionError(), and IfxCpu_Trap_memoryManagementError().

◆ IFX_CFG_CPU_TRAP_IE_HOOK

#define IFX_CFG_CPU_TRAP_IE_HOOK ( trapWatch ) ((void)trapWatch)

By default instruction Error macro is empty

Definition at line 93 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_instructionError().

◆ IFX_CFG_CPU_TRAP_IPE_HOOK

#define IFX_CFG_CPU_TRAP_IPE_HOOK ( trapWatch ) ((void)trapWatch)

By default internal Protection Error macro is empty

Definition at line 90 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_internalProtectionError().

◆ IFX_CFG_CPU_TRAP_MME_HOOK

#define IFX_CFG_CPU_TRAP_MME_HOOK ( trapWatch ) ((void)trapWatch)

By default memory Management Error macro is empty

Definition at line 87 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_memoryManagementError().

◆ IFX_CFG_CPU_TRAP_NMI_HOOK

#define IFX_CFG_CPU_TRAP_NMI_HOOK ( trapWatch ) ((void)trapWatch)

By default NMI macro is empty

Definition at line 84 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_nonMaskableInterrupt().

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 66 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_systemCall_Cpu0().

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 69 of file IfxCpu_Trap.c.

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 72 of file IfxCpu_Trap.c.

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 75 of file IfxCpu_Trap.c.

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 78 of file IfxCpu_Trap.c.

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 81 of file IfxCpu_Trap.c.

◆ IFX_CFG_CPU_TRAP_TSR_HOOK

#define IFX_CFG_CPU_TRAP_TSR_HOOK ( trapWatch )

Configuration for CpuX enable.

By default macro is empty

Definition at line 63 of file IfxCpu_Trap.c.

Function Documentation

◆ IfxCpu_Trap_assertion()

void IfxCpu_Trap_assertion ( uint32 tin )

Definition at line 181 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_busError()

void IfxCpu_Trap_busError ( uint32 tin )

Definition at line 170 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_contextManagementError()

void IfxCpu_Trap_contextManagementError ( uint32 tin )

Definition at line 159 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_extractTrapInfo()

IFX_INLINE IfxCpu_Trap IfxCpu_Trap_extractTrapInfo | ( | uint8 | trapClass,
 |  | uint32 | tin
 | ) |  |

Definition at line 115 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_assertion(), IfxCpu_Trap_busError(), IfxCpu_Trap_contextManagementError(), IfxCpu_Trap_instructionError(), IfxCpu_Trap_internalProtectionError(), IfxCpu_Trap_memoryManagementError(), IfxCpu_Trap_nonMaskableInterrupt(), and IfxCpu_Trap_systemCall_Cpu0().

◆ IfxCpu_Trap_instructionError()

void IfxCpu_Trap_instructionError ( uint32 tin )

Definition at line 148 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_internalProtectionError()

void IfxCpu_Trap_internalProtectionError ( uint32 tin )

Definition at line 137 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_memoryManagementError()

void IfxCpu_Trap_memoryManagementError ( uint32 tin )

Definition at line 126 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_nonMaskableInterrupt()

void IfxCpu_Trap_nonMaskableInterrupt ( uint32 tin )

Definition at line 256 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_systemCall_Cpu0()

void IfxCpu_Trap_systemCall_Cpu0 ( uint32 tin )

Definition at line 192 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_vectorTable0()

void IfxCpu_Trap_vectorTable0 ( void )

Definition at line 283 of file IfxCpu_Trap.c.


iLLD_TC26B: IfxCpu_Trap.h File Reference

  • Cpu
  • Trap
Data Structures | Typedefs | Enumerations
IfxCpu_Trap.h File Reference
#include "Cpu/Std/Ifx_Types.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Ifx_Cfg.h"
Include dependency graph for IfxCpu_Trap.h:

Go to the source code of this file.

Data Structures

union | IfxCpu_Trap_Id
Union to abstract Identification numbers under Traps. More...
struct | IfxCpu_Trap
Structure to contain the trap information. More...

Typedefs

typedef sint32 | IfxCpu_Trap_SystemCall_Id
Type for Identification numbers under SystemCall Trap. More...
typedef sint32 | IfxCpu_Trap_NonMaskableInterrupt_Id
Type for Identification number for Non Maskable Interrupt Trap. More...

Enumerations

enum IfxCpu_Trap_Class {
IfxCpu_Trap_Class_memoryManagement = 0U,
IfxCpu_Trap_Class_internalProtection = 1U,
IfxCpu_Trap_Class_instructionErrors = 2U,
IfxCpu_Trap_Class_contextManagement = 3U,
IfxCpu_Trap_Class_bus = 4U,
IfxCpu_Trap_Class_assertion = 5U,
IfxCpu_Trap_Class_systemCall = 6U,
IfxCpu_Trap_Class_nonMaskableInterrupt = 7U
}
Enum for available Trap classes. More...
enum IfxCpu_Trap_MemoryManagement_Id {
IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill = 0U,
IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection = 1U
}
Enum for available Identification numbers under Memory Management Trap. More...
enum IfxCpu_Trap_InternalProtection_Id {
IfxCpu_Trap_InternalProtection_Id_privilegeViolation = 1U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead = 2U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite = 3U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute = 4U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess = 5U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress = 6U,
IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection = 7U
}
Enum for available Identification numbers under Internal Protection Trap. More...
enum IfxCpu_Trap_InstructionErrors_Id {
IfxCpu_Trap_InstructionErrors_Id_illegalOpcode = 1U,
IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode = 2U,
IfxCpu_Trap_InstructionErrors_Id_invalidOperand = 3U,
IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment = 4U,
IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress = 5U
}
Enum for available Identification numbers under Instruction Errors Trap. More...
enum IfxCpu_Trap_ContextManagement_Id {
IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion = 1U,
IfxCpu_Trap_ContextManagement_Id_callDepthOverflow = 2U,
IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow = 3U,
IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow = 4U,
IfxCpu_Trap_ContextManagement_Id_callStackUnderflow = 5U,
IfxCpu_Trap_ContextManagement_Id_contextType = 6U,
IfxCpu_Trap_ContextManagement_Id_nestingError = 7U
}
Enum for available Identification numbers under Context Management Trap. More...
enum IfxCpu_Trap_Bus_Id {
IfxCpu_Trap_Bus_Id_programFetchSynchronousError = 1U,
IfxCpu_Trap_Bus_Id_dataAccessSynchronousError = 2U,
IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError = 3U,
IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError = 4U,
IfxCpu_Trap_Bus_Id_programMemoryIntegrityError = 5U,
IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError = 6U,
IfxCpu_Trap_Bus_Id_temporalAsynchronousError = 7U
}
Enum for available Identification numbers under Bus Trap. More...
enum IfxCpu_Trap_Assertion_Id {
IfxCpu_Trap_Assertion_Id_arithmeticOverflow = 1U,
IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow = 2U
}
Enum for available Identification numbers under Assertion Trap. More...


iLLD_TC26B: IfxDma.c File Reference

  • Dma
  • Std
IfxDma.c File Reference

DMA basic functionality. More...

#include "IfxDma.h"
Include dependency graph for IfxDma.c:

Go to the source code of this file.

Detailed Description

DMA basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDma.c.


iLLD_TC26B: IfxDma_cfg.c File Reference

  • _Impl
IfxDma_cfg.c File Reference

DMA on-chip implementation data. More...

#include "IfxDma_cfg.h"
Include dependency graph for IfxDma_cfg.c:

Go to the source code of this file.

Detailed Description

DMA on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDma_cfg.c.


iLLD_TC26B: IfxDma_Dma.c File Reference

  • Dma
  • Dma
Functions
IfxDma_Dma.c File Reference

DMA DMA details. More...

#include "IfxDma_Dma.h"
Include dependency graph for IfxDma_Dma.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxDma_Dma_configureTransactionSet (Ifx_DMA_CH *channel, const IfxDma_Dma_ChannelConfig *config)
local function to copy a transaction set into DMA channel SFRs or memory location (for linked lists) More...
void | IfxDma_Dma_createModuleHandle (IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it's ensure that the DMA module is already initialized, and a DMA handle isn't globally available. More...
void | IfxDma_Dma_deInitChannel (IfxDma_Dma *dma, IfxDma_ChannelId channel)
de-initialize the DMA channel More...
void | IfxDma_Dma_initChannel (IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel More...
void | IfxDma_Dma_initChannelConfig (IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration More...
void | IfxDma_Dma_initLinkedListEntry (void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
linked list functionality within the DMA module More...
void | IfxDma_Dma_initModule (IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
Initialize the DMA module. More...
void | IfxDma_Dma_initModuleConfig (IfxDma_Dma_Config *config, Ifx_DMA *dma)
initialize the DMA module configuration More...

Detailed Description

DMA DMA details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDma_Dma.c.

Function Documentation

◆ IfxDma_Dma_configureTransactionSet()

IFX_STATIC void IfxDma_Dma_configureTransactionSet | ( | Ifx_DMA_CH * | channel,
 |  | const IfxDma_Dma_ChannelConfig * | config
 | ) |  |

local function to copy a transaction set into DMA channel SFRs or memory location (for linked lists)

Parameters
channel | Specifies the pointer to DMA channel registers
config | pointer to the DMA default channel configuration structure
Returns
None

Definition at line 63 of file IfxDma_Dma.c.

Referenced by IfxDma_Dma_initChannel(), and IfxDma_Dma_initLinkedListEntry().


iLLD_TC26B: IfxDsadc.c File Reference

  • Dsadc
  • Std
Functions
IfxDsadc.c File Reference

DSADC basic functionality. More...

#include "IfxDsadc.h"
Include dependency graph for IfxDsadc.c:

Go to the source code of this file.

Functions

volatile Ifx_SRC_SRCR * | IfxDsadc_getAuxSrc (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Address/pointer to the interrupt source register. More...
float32 | IfxDsadc_getIntegratorOutFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the integrator output in Hz. More...
float32 | IfxDsadc_getMainCombOutFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the main COMB filter output in Hz. More...
float32 | IfxDsadc_getMainGroupDelay (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Estimate the group delay of main-chain filters in seconds. More...
volatile Ifx_SRC_SRCR * | IfxDsadc_getMainSrc (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the interrupt source register for a Main event. More...
float32 | IfxDsadc_getModulatorClockFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the modulator clock frequency in Hz. More...
float32 | IfxDsadc_getModulatorInputClockFreq (Ifx_DSADC *dsadc)
Get the input frequency of DSADC in Hz. More...
void | IfxDsadc_resetModule (Ifx_DSADC *dsadc)
resets the DSADC kernel More...

Detailed Description

DSADC basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDsadc.c.


iLLD_TC26B: IfxDsadc_Dsadc.c File Reference

  • Dsadc
  • Dsadc
Functions
IfxDsadc_Dsadc.c File Reference

DSADC DSADC details. More...

#include "IfxDsadc_Dsadc.h"
Include dependency graph for IfxDsadc_Dsadc.c:

Go to the source code of this file.

Functions

IFX_STATIC sint32 | IfxDsadc_Dsadc_calcDIVx (float32 sourceFreq, float32 *targetFreq)
calculate division factor More...
IFX_STATIC void | IfxDsadc_Dsadc_initAuxFilter (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_AuxFilterConfig *config)
Initialises the auxilary filter. More...
IFX_STATIC void | IfxDsadc_Dsadc_initCombFilter (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_CombFilterConfig *config)
Initialises the comb filter. More...
IFX_STATIC void | IfxDsadc_Dsadc_initDemodulator (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_DemodulatorConfig *config)
Initialises the demodulator. More...
IFX_STATIC void | IfxDsadc_Dsadc_initFirFilter (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_FirFilterConfig *config)
Initialises the fir filter. More...
IFX_STATIC void | IfxDsadc_Dsadc_initIntegrator (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_IntegratorConfig *config)
Initialises the integrator. More...
IFX_STATIC void | IfxDsadc_Dsadc_initModulator (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ModulatorConfig *config)
Initialises the modulator. More...
IFX_STATIC void | IfxDsadc_Dsadc_initRectifier (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_RectifierConfig *config)
Initialises the rectifier. More...
sint16 | IfxDsadc_Dsadc_getAuxResult (IfxDsadc_Dsadc_Channel *channel)
Get result from the auxilary chain. More...
void | IfxDsadc_Dsadc_initCarrierGen (IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_CarrierGenConfig *config)
Initialise the DSADC carrier generator. More...
void | IfxDsadc_Dsadc_initChannel (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ChannelConfig *config)
Initialise a DSADC channel with the supplied configuration. More...
void | IfxDsadc_Dsadc_initChannelConfig (IfxDsadc_Dsadc_ChannelConfig *config, IfxDsadc_Dsadc *dsadc)
Initialise the config struct with default DSADC channel configuration. More...
void | IfxDsadc_Dsadc_initModule (IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_Config *config)
Initialise the DSADC with the supplied configuration. More...
void | IfxDsadc_Dsadc_initModuleConfig (IfxDsadc_Dsadc_Config *config, Ifx_DSADC *dsadc)
Initialise the config struct with default DSADC configuration. More...
void | IfxDsadc_Dsadc_initCarrierGenConfig (IfxDsadc_Dsadc_CarrierGenConfig *config)

Detailed Description

DSADC DSADC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDsadc_Dsadc.c.

Function Documentation

◆ IfxDsadc_Dsadc_calcDIVx()

IFX_STATIC sint32 IfxDsadc_Dsadc_calcDIVx | ( | float32 | sourceFreq,
 |  | float32 * | targetFreq
 | ) |  |

calculate division factor

Parameters
sourceFreq | Source frequency
targetFreq | Target frequency
Returns
division factor

Definition at line 112 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Dsadc_initCarrierGen(), and IfxDsadc_Dsadc_initModulator().

◆ IfxDsadc_Dsadc_initAuxFilter()

IFX_STATIC void IfxDsadc_Dsadc_initAuxFilter | ( | IfxDsadc_Dsadc_Channel * | channel,
 |  | const IfxDsadc_Dsadc_AuxFilterConfig * | config
 | ) |  |

Initialises the auxilary filter.

Parameters
channel | Pointer to the DSADC channel handle
config | pointer to the DSADC fir auxilary filter configuration
Returns
None

Definition at line 146 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_Dsadc_initCarrierGenConfig()

void IfxDsadc_Dsadc_initCarrierGenConfig ( IfxDsadc_Dsadc_CarrierGenConfig * config )
Parameters
config Pointer to DSADC Carrier Configuration
Returns
None

Definition at line 480 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Rdc_initConfig().

◆ IfxDsadc_Dsadc_initCombFilter()

IFX_STATIC void IfxDsadc_Dsadc_initCombFilter | ( | IfxDsadc_Dsadc_Channel * | channel,
 |  | const IfxDsadc_Dsadc_CombFilterConfig * | config
 | ) |  |

Initialises the comb filter.

Parameters
channel | Pointer to the DSADC channel handle
config | pointer to the DSADC comb filter configuration
Returns
None

Definition at line 327 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_Dsadc_initDemodulator()

IFX_STATIC void IfxDsadc_Dsadc_initDemodulator | ( | IfxDsadc_Dsadc_Channel * | channel,
 |  | const IfxDsadc_Dsadc_DemodulatorConfig * | config
 | ) |  |

Initialises the demodulator.

Parameters
channel | Pointer to the DSADC channel handle
config | pointer to the DSADC demodulator configuration
Returns
None

Definition at line 346 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_Dsadc_initFirFilter()

IFX_STATIC void IfxDsadc_Dsadc_initFirFilter | ( | IfxDsadc_Dsadc_Channel * | channel,
 |  | const IfxDsadc_Dsadc_FirFilterConfig * | config
 | ) |  |

Initialises the fir filter.

Parameters
channel | Pointer to the DSADC channel handle
config | pointer to the DSADC fir filter configuration
Returns
None

Definition at line 368 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_Dsadc_initIntegrator()

IFX_STATIC void IfxDsadc_Dsadc_initIntegrator | ( | IfxDsadc_Dsadc_Channel * | channel,
 |  | const IfxDsadc_Dsadc_IntegratorConfig * | config
 | ) |  |

Initialises the integrator.

Parameters
channel | Pointer to the DSADC channel handle
config | pointer to the DSADC fir integrator configuration
Returns
None

Definition at line 384 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_Dsadc_initModulator()

IFX_STATIC void IfxDsadc_Dsadc_initModulator | ( | IfxDsadc_Dsadc_Channel * | channel,
 |  | const IfxDsadc_Dsadc_ModulatorConfig * | config
 | ) |  |

Initialises the modulator.

Parameters
channel | Pointer to the DSADC channel handle
config | pointer to the DSADC modulator configuration
Returns
None

Definition at line 399 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_Dsadc_initRectifier()

IFX_STATIC void IfxDsadc_Dsadc_initRectifier | ( | IfxDsadc_Dsadc_Channel * | channel,
 |  | const IfxDsadc_Dsadc_RectifierConfig * | config
 | ) |  |

Initialises the rectifier.

Parameters
channel | Pointer to the DSADC channel handle
config | pointer to the DSADC fir rectifier configuration
Returns
None

Definition at line 466 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Dsadc_initChannel().


iLLD_TC26B: IfxDsadc_Rdc.c File Reference

  • Dsadc
  • Rdc
Functions | Variables
IfxDsadc_Rdc.c File Reference

DSADC RDC details. More...

#include "IfxDsadc_Rdc.h"
#include "string.h"
#include "Gtm/Trig/IfxGtm_Trig.h"
Include dependency graph for IfxDsadc_Rdc.c:

Go to the source code of this file.

Functions

IFX_STATIC Ifx_GTM_TIM_CH * | IfxDsadc_Rdc_initGtmTim (Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch timCh, boolean risingEdge)
IFX_STATIC boolean | IfxDsadc_Rdc_initHwChannels (IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the DSADC hardware channels. More...
IFX_STATIC void | IfxDsadc_Rdc_initHwTimestamp (IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the GTM timestamp hardware resources. More...
IFX_INLINE void | IfxDsadc_Rdc_updateTimestamp (IfxDsadc_Rdc *driver)
Updating RDC timestamps. More...
IFX_STATIC float32 | IfxDsadc_Rdc_calculateGroupDelay (IfxDsadc_Rdc *driver)
Group Dalay calculation. More...
IFX_STATIC float32 | IfxDsadc_Rdc_calculateTimestampPeriod (const IfxDsadc_Rdc_Config *config)
IFX_STATIC float32 | IfxDsadc_Rdc_getUpdatePeriod (IfxDsadc_Rdc *driver)
Return the update period. More...
float32 | IfxDsadc_Rdc_getAbsolutePosition (IfxDsadc_Rdc *driver)
see IfxStdIf_Pos_GetAbsolutePosition More...
IfxStdIf_Pos_Dir | IfxDsadc_Rdc_getDirection (IfxDsadc_Rdc *driver)
sint32 | IfxDsadc_Rdc_getOffset (IfxDsadc_Rdc *driver)
float32 | IfxDsadc_Rdc_getPosition (IfxDsadc_Rdc *driver)
float32 | IfxDsadc_Rdc_getRefreshPeriod (IfxDsadc_Rdc *driver)
sint32 | IfxDsadc_Rdc_getResolution (IfxDsadc_Rdc *driver)
IfxStdIf_Pos_SensorType | IfxDsadc_Rdc_getSensorType (IfxDsadc_Rdc *driver)
sint32 | IfxDsadc_Rdc_getTurn (IfxDsadc_Rdc *driver)
boolean | IfxDsadc_Rdc_init (IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the DSADC RDC driver by initialising: More...
void | IfxDsadc_Rdc_initConfig (IfxDsadc_Rdc_Config *config)
void | IfxDsadc_Rdc_onEventA (IfxDsadc_Rdc *driver)
void | IfxDsadc_Rdc_reset (IfxDsadc_Rdc *driver)
void | IfxDsadc_Rdc_resetFaults (IfxDsadc_Rdc *driver)
void | IfxDsadc_Rdc_setOffset (IfxDsadc_Rdc *driver, sint32 offset)
void | IfxDsadc_Rdc_setRefreshPeriod (IfxDsadc_Rdc *driver, float32 updatePeriod)
void | IfxDsadc_Rdc_startConversion (IfxDsadc_Rdc *driver)
Synchronously start of both DSADC H/W channels. More...
boolean | IfxDsadc_Rdc_stdIfPosInit (IfxStdIf_Pos *stdif, IfxDsadc_Rdc *driver)
Initializes the standard interface "Pos". More...
void | IfxDsadc_Rdc_update (IfxDsadc_Rdc *driver)

Variables

IFX_STATIC IFX_CONST Ifx_GTM_TIM_CH_CTRL_Bits IfxDsadc_Rdc_GtmTimCfg
GTM TIM Configuration settings. More...

Detailed Description

DSADC RDC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDsadc_Rdc.c.


iLLD_TC26B: IfxDts.c File Reference

  • Dts
  • Std
Functions
IfxDts.c File Reference

DTS basic functionality. More...

#include "IfxDts.h"
Include dependency graph for IfxDts.c:

Go to the source code of this file.

Functions

boolean IfxDts_isReady (void)
Returns the current READY status of the Sensor. More...

Detailed Description

DTS basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDts.c.

Function Documentation

◆ IfxDts_isReady()

boolean IfxDts_isReady ( void )

Returns the current READY status of the Sensor.

Returns
TRUE if Sensor is ready for measuring temperature otherwise FALSE

Definition at line 52 of file IfxDts.c.

Referenced by IfxDts_Dts_initModule().


iLLD_TC26B: IfxDts_Dts.c File Reference

  • Dts
  • Dts
Functions
IfxDts_Dts.c File Reference

DTS DTS details. More...

#include "IfxDts_Dts.h"
Include dependency graph for IfxDts_Dts.c:

Go to the source code of this file.

Functions

uint16 | IfxDts_Dts_convertFromCelsius (float32 temperatureValue)
Converts a temperature value in Celsius to DTS value. More...
float32 | IfxDts_Dts_convertToCelsius (uint16 dtsValue)
Converts the measurement value returned from DTS to Celsius. More...
void | IfxDts_Dts_initModule (const IfxDts_Dts_Config *config)
Initialise the DTS with supplied configuration. More...
void | IfxDts_Dts_initModuleConfig (IfxDts_Dts_Config *config)
Intialises the module configuration buffer with default configuration. More...

Detailed Description

DTS DTS details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxDts_Dts.c.


iLLD_TC26B: IfxEmem.c File Reference

  • Emem
  • Std
Functions
IfxEmem.c File Reference

EMEM basic functionality. More...

#include "IfxEmem.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxEmem.c:

Go to the source code of this file.

Functions

IfxEmem_LockedState | IfxEmem_getLockedState (void)
Gets the EMEM stand RAM lock state. More...
void | IfxEmem_setClockEnableState (const IfxEmem_State state)
Sets state of the EMEM module clock. Note: Do not use this API for enabling and disabling EMEM without handling Endinit protection in application. for complete enable and disable of EMEM with endint protection handling, please use the following APIs /ref IfxEmem_enableModule /ref IfxEmem_disableModule. More...

Detailed Description

EMEM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEmem.c.


iLLD_TC26B: IfxEmem_cfg.c File Reference

  • _Impl
IfxEmem_cfg.c File Reference

EMEM on-chip implementation data. More...

#include "IfxEmem_cfg.h"
Include dependency graph for IfxEmem_cfg.c:

Go to the source code of this file.

Detailed Description

EMEM on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEmem_cfg.c.


iLLD_TC26B: IfxEray.c File Reference

  • Eray
  • Std
Functions
IfxEray.c File Reference

ERAY basic functionality. More...

#include "IfxEray.h"
Include dependency graph for IfxEray.c:

Go to the source code of this file.

Functions

uint16 | IfxEray_calcHeaderCrc (uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
Calculate and returns the CRC for frame. More...
boolean | IfxEray_changePocState (Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state. More...
void | IfxEray_clearAllFlags (Ifx_ERAY *eray)
Clears all the error flags. More...
void | IfxEray_enableInterruptLines (Ifx_ERAY *eray)
Enables all the Interrupt lines. More...
Ifx_ERAY * | IfxEray_getAddress (IfxEray_Index eray)
IfxEray_Index | IfxEray_getIndex (Ifx_ERAY *eray)
API to get the resource index of the ERAY specified. More...
void | IfxEray_readData (Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers. More...
void | IfxEray_readFrame (Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers. More...
void | IfxEray_resetModule (Ifx_ERAY *eray)
Resets the ERAY kernel. More...
void | IfxEray_setMessageBufferInterruptDestination (Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination. More...
void | IfxEray_setNewDataInterruptDestination (Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination. More...
void | IfxEray_setPocReady (Ifx_ERAY *eray)
Sets the POC state to Ready state. More...
void | IfxEray_setSlot (Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots. More...
void | IfxEray_writeData (Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers. More...

Detailed Description

ERAY basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEray.c.


iLLD_TC26B: IfxEray_cfg.c File Reference

  • _Impl
Variables
IfxEray_cfg.c File Reference

ERAY on-chip implementation data. More...

#include "IfxEray_cfg.h"
Include dependency graph for IfxEray_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap [IFXERAY_NUM_MODULES]

Detailed Description

ERAY on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEray_cfg.c.

Variable Documentation

◆ IfxEray_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES]
Initial value:
= {
{&MODULE_ERAY0, (uint32)IfxEray_Index_0},
}
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEray_Index_0
ERAY index 0.
Definition: IfxEray_cfg.h:82

Definition at line 52 of file IfxEray_cfg.c.

Referenced by IfxEray_getAddress(), and IfxEray_getIndex().


iLLD_TC26B: IfxEray_Eray.c File Reference

  • Eray
  • Eray
Functions
IfxEray_Eray.c File Reference

ERAY ERAY details. More...

#include "IfxEray_Eray.h"
#include "Mtu/Std/IfxMtu.h"
Include dependency graph for IfxEray_Eray.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxEray_Eray_Node_initCommunicationController (IfxEray_Eray *eray, const IfxEray_Eray_ControllerConfig *config)
Inialises the communication controller. More...
IFX_STATIC void | IfxEray_Eray_Node_initGTU (IfxEray_Eray *eray, const IfxEray_Eray_GTUConfig *config)
Initialises the Global Timing Unit. More...
IFX_STATIC void | IfxEray_Eray_Node_initMessageRAM (IfxEray_Eray *eray, const IfxEray_Eray_MessageRAMConfig *config)
Inialises the message RAM. More...
void | IfxEray_Eray_Node_init (IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
Initialises the Node with supplied configuration. More...
void | IfxEray_Eray_Node_initConfig (IfxEray_Eray_NodeConfig *config)
Initialises the default node configuration buffer. More...
void | IfxEray_Eray_initModule (IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
Initialises the ERAY module with supplied configuration. More...
void | IfxEray_Eray_initModuleConfig (IfxEray_Eray_Config *config, Ifx_ERAY *eray)
Inialises the default module configuration buffer. More...
void | IfxEray_Eray_receiveFifoFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers frame from fifo in message RAM to Output buffer. More...
void | IfxEray_Eray_receiveFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers header and data from message buffer to output buffer. More...
void | IfxEray_Eray_transmitFrame (IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
Transfers the frame in given slot. More...

Detailed Description

ERAY ERAY details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEray_Eray.c.


iLLD_TC26B: IfxEth.c File Reference

  • Eth
  • Std
Functions | Variables
IfxEth.c File Reference

ETH basic functionality. More...

#include "IfxEth.h"
Include dependency graph for IfxEth.c:

Go to the source code of this file.

Functions

void | IfxEth_disableModule (void)
Disable ETH Module. More...
void | IfxEth_enableModule (void)
Enable ETH Module. More...
void | IfxEth_freeReceiveBuffer (IfxEth *eth)
Free the receive buffer, enabling it for the further reception. More...
void * | IfxEth_getReceiveBuffer (IfxEth *eth)
Gets receive buffer
note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffer has been processed. More...
void * | IfxEth_getTransmitBuffer (IfxEth *eth)
Get a free transmit buffer. More...
void | IfxEth_init (IfxEth *eth, const IfxEth_Config *config)
Initialises the driver. More...
void | IfxEth_initConfig (IfxEth_Config *config, Ifx_ETH *ethSfr)
Initialises the configuration Structure. More...
void | IfxEth_initReceiveDescriptors (IfxEth *eth)
Initialises the receive descriptors. More...
void | IfxEth_initReceiveDescriptorsRingMode (IfxEth *eth, const IfxEth_RingModeRxBuffersConfig *config)
Initialises the receive descriptors. More...
void | IfxEth_initTransmitDescriptors (IfxEth *eth)
Initialises transmit descriptors. More...
void | IfxEth_initTransmitDescriptorsRingMode (IfxEth *eth, const IfxEth_RingModeTxBuffersConfig *config)
Initialises transmit descriptors. More...
void | IfxEth_readMacAddress (IfxEth *eth, uint8 *macAddress)
Reads the MAC address from module register. More...
void | IfxEth_resetModule (void)
resets Ethernet kernel More...
void | IfxEth_sendTransmitBuffer (IfxEth *eth, uint16 len)
Request to send the transmit buffer. More...
void | IfxEth_sendTransmitBuffersRingMode (IfxEth *eth, uint16 buffer1Length, uint16 buffer2Length)
Request to send the transmit buffer. More...
void | IfxEth_setAndSendTransmitBuffer (IfxEth *eth, void *buffer, uint16 len)
void | IfxEth_setMacAddress (IfxEth *eth, const uint8 *macAddress)
Sets the MAC address. More...
void | IfxEth_setupChecksumEngine (IfxEth *eth, IfxEth_ChecksumMode mode)
Set up checksum Engine. More...
void | IfxEth_setupMiiInputPins (IfxEth *eth, const IfxEth_MiiPins *miiPins)
Set up MII mode input pins. More...
void | IfxEth_setupMiiOutputPins (IfxEth *eth, const IfxEth_MiiPins *miiPins)
setup MII mode output pins More...
void | IfxEth_setupRmiiInputPins (IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
Set up input pins. More...
void | IfxEth_setupRmiiOutputPins (IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
set output pin of port More...
void | IfxEth_shuffleRxDescriptor (IfxEth *eth)
Shuffle to next RX descriptor. More...
void | IfxEth_shuffleTxDescriptor (IfxEth *eth)
Shuffle to next TX descriptor. More...
void | IfxEth_startReceiver (IfxEth *eth)
Start the receiver functions. More...
void | IfxEth_startTransmitter (IfxEth *eth)
Start the transmitter functions. More...
void | IfxEth_stopReceiver (IfxEth *eth)
Stops the receiver functions. More...
void | IfxEth_stopTransmitter (IfxEth *eth)
Stop the transmitter functions. More...
void | IfxEth_wakeupReceiver (IfxEth *eth)
Wakeup the receiver functions. More...
void | IfxEth_wakeupTransmitter (IfxEth *eth)
Wakeup the transmitter functions. More...
void | IfxEth_writeHeader (IfxEth *eth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 packetSize)
writes the header format into buffrer More...

Variables

uint8 IfxEth_rxBuffer [IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]
IfxEth_RxDescrList IfxEth_rxDescr
uint8 IfxEth_txBuffer [IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]
IfxEth_TxDescrList IfxEth_txDescr

Detailed Description

ETH basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEth.c.

Variable Documentation

◆ IfxEth_rxBuffer

uint8 IfxEth_rxBuffer[IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]

Definition at line 52 of file IfxEth.c.

Referenced by IfxEth_initReceiveDescriptors().

◆ IfxEth_rxDescr

IfxEth_RxDescrList IfxEth_rxDescr

Definition at line 54 of file IfxEth.c.

Referenced by IfxEth_initConfig().

◆ IfxEth_txBuffer

uint8 IfxEth_txBuffer[IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]

Definition at line 56 of file IfxEth.c.

Referenced by IfxEth_initTransmitDescriptors().

◆ IfxEth_txDescr

IfxEth_TxDescrList IfxEth_txDescr

Definition at line 58 of file IfxEth.c.

Referenced by IfxEth_initConfig().


iLLD_TC26B: IfxEth_Phy_Pef7071.c File Reference

  • Eth
  • Phy_Pef7071
Macros | Functions | Variables
IfxEth_Phy_Pef7071.c File Reference

ETH PHY_PEF7071 details. More...

#include "IfxEth_Phy_Pef7071.h"
Include dependency graph for IfxEth_Phy_Pef7071.c:

Go to the source code of this file.

Macros

#define | IFXETH_PHY_PEF7071_MDIO_CTRL 0x00
#define | IFXETH_PHY_PEF7071_MDIO_STAT 0x01
#define | IFXETH_PHY_PEF7071_MDIO_PHYID1 0x02
#define | IFXETH_PHY_PEF7071_MDIO_PHYID2 0x03
#define | IFXETH_PHY_PEF7071_MDIO_AN_ADV 0x04
#define | IFXETH_PHY_PEF7071_MDIO_AN_LPA 0x05
#define | IFXETH_PHY_PEF7071_MDIO_AN_EXP 0x06
#define | IFXETH_PHY_PEF7071_MDIO_AN_NPTX 0x07
#define | IFXETH_PHY_PEF7071_MDIO_AN_NPRX 0x08
#define | IFXETH_PHY_PEF7071_MDIO_GCTRL 0x09
#define | IFXETH_PHY_PEF7071_MDIO_GSTAT 0x0A
#define | IFXETH_PHY_PEF7071_MDIO_RES11 0x0B
#define | IFXETH_PHY_PEF7071_MDIO_RES12 0x0C
#define | IFXETH_PHY_PEF7071_MDIO_MMDCTRL 0x0D
#define | IFXETH_PHY_PEF7071_MDIO_MMDDATA 0x0E
#define | IFXETH_PHY_PEF7071_MDIO_XSTAT 0x0F
#define | IFXETH_PHY_PEF7071_MDIO_PHYPERF 0x10
#define | IFXETH_PHY_PEF7071_MDIO_PHYSTAT1 0x11
#define | IFXETH_PHY_PEF7071_MDIO_PHYSTAT2 0x12
#define | IFXETH_PHY_PEF7071_MDIO_PHYCTL1 0x13
#define | IFXETH_PHY_PEF7071_MDIO_PHYCTL2 0x14
#define | IFXETH_PHY_PEF7071_MDIO_ERRCNT 0x15
#define | IFXETH_PHY_PEF7071_MDIO_EECTRL 0x16
#define | IFXETH_PHY_PEF7071_MDIO_MIICTRL 0x17
#define | IFXETH_PHY_PEF7071_MDIO_MIISTAT 0x18
#define | IFXETH_PHY_PEF7071_MDIO_IMASK 0x19
#define | IFXETH_PHY_PEF7071_MDIO_ISTAT 0x1A
#define | IFXETH_PHY_PEF7071_MDIO_LED 0x1B
#define | IFXETH_PHY_PEF7071_MDIO_TPGCTRL 0x1C
#define | IFXETH_PHY_PEF7071_MDIO_TPGDATA 0x1D
#define | IFXETH_PHY_PEF7071_MDIO_FWV 0x1E
#define | IFXETH_PHY_PEF7071_MDIO_RES1F 0x1F
#define | IFXETH_PHY_PEF7071_WAIT_GMII_READY() while (ETH_GMII_ADDRESS.B.GB) {}
#define | IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR 0x00
Access type for indirectly accessing Address Type of MMD register in PHY. More...
#define | IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA 0x4000
Access type for indirectly accessing Data Type of MMD register in PHY. More...
#define | IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA_PI 0x8000
Access type for indirectly accessing Data Type with post increment of MMD register in PHY. More...

Functions

uint32 | IfxEth_Phy_Pef7071_init (void)
boolean | IfxEth_Phy_Pef7071_link (void)
void | IfxEth_Phy_Pef7071_read_mdio_reg (uint32 layeraddr, uint32 regaddr, uint32 *pdata)
void | IfxEth_Phy_Pef7071_write_mdio_reg (uint32 layeraddr, uint32 regaddr, uint32 data)
void | IfxEth_Phy_Pef7071_write_mmd_indirect (uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Write the data into the MMD register of PHY. More...
void | IfxEth_Phy_Pef7071_read_mmd_indirect (uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Read data from MMD register of PHY. More...

Variables

uint32 IfxEth_Phy_Pef7071_iPhyInitDone = 0

Detailed Description

ETH PHY_PEF7071 details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxEth_Phy_Pef7071.c.

Macro Definition Documentation

◆ IFXETH_PHY_PEF7071_MDIO_AN_ADV

#define IFXETH_PHY_PEF7071_MDIO_AN_ADV 0x04

Definition at line 60 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_init().

◆ IFXETH_PHY_PEF7071_MDIO_AN_EXP

#define IFXETH_PHY_PEF7071_MDIO_AN_EXP 0x06

Definition at line 64 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_AN_LPA

#define IFXETH_PHY_PEF7071_MDIO_AN_LPA 0x05

Definition at line 62 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_AN_NPRX

#define IFXETH_PHY_PEF7071_MDIO_AN_NPRX 0x08

Definition at line 68 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_AN_NPTX

#define IFXETH_PHY_PEF7071_MDIO_AN_NPTX 0x07

Definition at line 66 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_CTRL

#define IFXETH_PHY_PEF7071_MDIO_CTRL 0x00

Definition at line 52 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_init().

◆ IFXETH_PHY_PEF7071_MDIO_EECTRL

#define IFXETH_PHY_PEF7071_MDIO_EECTRL 0x16

Definition at line 96 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_ERRCNT

#define IFXETH_PHY_PEF7071_MDIO_ERRCNT 0x15

Definition at line 94 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_FWV

#define IFXETH_PHY_PEF7071_MDIO_FWV 0x1E

Definition at line 112 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_GCTRL

#define IFXETH_PHY_PEF7071_MDIO_GCTRL 0x09

Definition at line 70 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_init().

◆ IFXETH_PHY_PEF7071_MDIO_GSTAT

#define IFXETH_PHY_PEF7071_MDIO_GSTAT 0x0A

Definition at line 72 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_IMASK

#define IFXETH_PHY_PEF7071_MDIO_IMASK 0x19

Definition at line 102 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_ISTAT

#define IFXETH_PHY_PEF7071_MDIO_ISTAT 0x1A

Definition at line 104 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_LED

#define IFXETH_PHY_PEF7071_MDIO_LED 0x1B

Definition at line 106 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_MIICTRL

#define IFXETH_PHY_PEF7071_MDIO_MIICTRL 0x17

Definition at line 98 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_init().

◆ IFXETH_PHY_PEF7071_MDIO_MIISTAT

#define IFXETH_PHY_PEF7071_MDIO_MIISTAT 0x18

Definition at line 100 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_MMDCTRL

#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL 0x0D

Definition at line 78 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_read_mmd_indirect(), and IfxEth_Phy_Pef7071_write_mmd_indirect().

◆ IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR

#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR 0x00

Access type for indirectly accessing Address Type of MMD register in PHY.

Definition at line 120 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_read_mmd_indirect(), and IfxEth_Phy_Pef7071_write_mmd_indirect().

◆ IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA

#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA 0x4000

Access type for indirectly accessing Data Type of MMD register in PHY.

Definition at line 124 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_read_mmd_indirect(), and IfxEth_Phy_Pef7071_write_mmd_indirect().

◆ IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA_PI

#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA_PI 0x8000

Access type for indirectly accessing Data Type with post increment of MMD register in PHY.

Definition at line 128 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_MMDDATA

#define IFXETH_PHY_PEF7071_MDIO_MMDDATA 0x0E

Definition at line 80 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_read_mmd_indirect(), and IfxEth_Phy_Pef7071_write_mmd_indirect().

◆ IFXETH_PHY_PEF7071_MDIO_PHYCTL1

#define IFXETH_PHY_PEF7071_MDIO_PHYCTL1 0x13

Definition at line 90 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_PHYCTL2

#define IFXETH_PHY_PEF7071_MDIO_PHYCTL2 0x14

Definition at line 92 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_PHYID1

#define IFXETH_PHY_PEF7071_MDIO_PHYID1 0x02

Definition at line 56 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_PHYID2

#define IFXETH_PHY_PEF7071_MDIO_PHYID2 0x03

Definition at line 58 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_PHYPERF

#define IFXETH_PHY_PEF7071_MDIO_PHYPERF 0x10

Definition at line 84 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_PHYSTAT1

#define IFXETH_PHY_PEF7071_MDIO_PHYSTAT1 0x11

Definition at line 86 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_PHYSTAT2

#define IFXETH_PHY_PEF7071_MDIO_PHYSTAT2 0x12

Definition at line 88 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_RES11

#define IFXETH_PHY_PEF7071_MDIO_RES11 0x0B

Definition at line 74 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_RES12

#define IFXETH_PHY_PEF7071_MDIO_RES12 0x0C

Definition at line 76 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_RES1F

#define IFXETH_PHY_PEF7071_MDIO_RES1F 0x1F

Definition at line 114 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_STAT

#define IFXETH_PHY_PEF7071_MDIO_STAT 0x01

Definition at line 54 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_link().

◆ IFXETH_PHY_PEF7071_MDIO_TPGCTRL

#define IFXETH_PHY_PEF7071_MDIO_TPGCTRL 0x1C

Definition at line 108 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_TPGDATA

#define IFXETH_PHY_PEF7071_MDIO_TPGDATA 0x1D

Definition at line 110 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_XSTAT

#define IFXETH_PHY_PEF7071_MDIO_XSTAT 0x0F

Definition at line 82 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_WAIT_GMII_READY

#define IFXETH_PHY_PEF7071_WAIT_GMII_READY ( ) while (ETH_GMII_ADDRESS.B.GB) {}

Definition at line 116 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_init(), IfxEth_Phy_Pef7071_read_mdio_reg(), and IfxEth_Phy_Pef7071_write_mdio_reg().

Variable Documentation

◆ IfxEth_Phy_Pef7071_iPhyInitDone

uint32 IfxEth_Phy_Pef7071_iPhyInitDone = 0

Definition at line 134 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_init(), and IfxEth_Phy_Pef7071_link().


iLLD_TC26B: IfxFce.c File Reference

  • Fce
  • Std
Functions
IfxFce.c File Reference

FCE basic functionality. More...

#include "IfxFce.h"
Include dependency graph for IfxFce.c:

Go to the source code of this file.

Functions

Ifx_FCE_STS | IfxFce_getCrc16InterruptStatus (Ifx_FCE *fce)
Gets the CRC-16 interrupt status. More...
Ifx_FCE_STS | IfxFce_getCrc32InterruptStatus (Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Gets the CRC-32 interrupt status. More...
Ifx_FCE_STS | IfxFce_getCrc8InterruptStatus (Ifx_FCE *fce)
Gets the CRC-8 interrupt status. More...
uint32 | IfxFce_reflectCrc32 (uint32 crcStartValue, uint8 crcLength)
Reflects the CRC data and returns it. More...
void | IfxFce_resetModule (Ifx_FCE *fce)
Reset the module by clearing the kernel. More...

Detailed Description

FCE basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFce.c.


iLLD_TC26B: IfxFce_Crc.c File Reference

  • Fce
  • Crc
Functions
IfxFce_Crc.c File Reference

FCE CRC details. More...

#include "IfxFce_Crc.h"
Include dependency graph for IfxFce_Crc.c:

Go to the source code of this file.

Functions

uint16 | IfxFce_Crc_calculateCrc16 (IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue)
Calculate the XORed 16-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...
uint32 | IfxFce_Crc_calculateCrc32 (IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue)
Calculate the XORed 32-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...
uint8 | IfxFce_Crc_calculateCrc8 (IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue)
Calculate the XORed 8-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...
void | IfxFce_Crc_clearErrorFlags (IfxFce_Crc_Crc *fce)
Clears the error flags. More...
void | IfxFce_Crc_deInitModule (IfxFce_Crc_Crc *fce)
Deinitialises the FCE module. More...
Ifx_FCE_STS | IfxFce_Crc_getInterruptStatus (IfxFce_Crc_Crc *fce)
Gets the current CRC interrupt status. More...
void | IfxFce_Crc_initCrc (IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
Initialise the FCE module for CRC computation according to CRC mode. More...
void | IfxFce_Crc_initCrcConfig (IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
Initialises the default CRC configuration buffer. More...
void | IfxFce_Crc_initModule (IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
Usage Example: see How to use the FCE CRC Interface driver?. More...
void | IfxFce_Crc_initModuleConfig (IfxFce_Crc_Config *config, Ifx_FCE *fce)
Fills the config structure with default values. More...

Detailed Description

FCE CRC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFce_Crc.c.


iLLD_TC26B: IfxFft.c File Reference

  • Fft
  • Std
IfxFft.c File Reference

FFT basic functionality. More...

#include "IfxFft.h"
Include dependency graph for IfxFft.c:

Go to the source code of this file.

Detailed Description

FFT basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFft.c.


iLLD_TC26B: IfxFft_Fft.c File Reference

  • Fft
  • Fft
Macros | Functions | Variables
IfxFft_Fft.c File Reference

FFT FFT details. More...

#include "IfxFft_Fft.h"
Include dependency graph for IfxFft_Fft.c:

Go to the source code of this file.

Macros

#define | IFXFFT_FFT_DATA_TRANSFER (*((volatile uint64 *)IFXFFT_DATA_SPACE))
#define | IFXFFT_FFT_WINDOW_TRANSFER (*((volatile uint64 *)IFXFFT_WINDOW_SPACE))
#define | IFXFFT_FFT_DMADISCARDCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE + 2)
#define | IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE + 1)
#define | IFXFFT_FFT_DMAINPUTCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE)
#define | IFXFFT_FFT_DMADISCARDCHANNELID (dmaDiscard->channelId)
#define | IFXFFT_FFT_DMAOUTPUTCHANNELID (dmaOutput->channelId)
#define | IFXFFT_FFT_DMAINPUTCHANNELID (dmaInput->channelId)
#define | IFXFFT_FFT_MOVE_BTR4 1
#define | IFXFFT_FFT_MOVE_SIZE IfxDma_ChannelMoveSize_256bit
#define | IFXFFT_FFT_MOVE_DIV 4
#define | IFXFFT_FFT_ISALIGNED(address) ((Ifx_AlignOn256((uint32)address) == (uint32)address))

Functions

IFX_STATIC uint32 | IfxFft_Fft_calcCSR (const IfxFft_Fft_JobConfig *config)
Configures the CSR register. More...
IFX_STATIC void | IfxFft_Fft_unloadOutput (IfxFft_Fft_Job *job)
Unloads output data from the FFT engine. More...
IFX_STATIC void | IfxFft_Fft_loadInput (IfxFft_Fft_Job *job)
Loads input data into the FFT engine. More...
IFX_STATIC void | IfxFft_Fft_calcCounters (IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
Calculates the input counters and output counters. More...
void | IfxFft_Fft_cloneAndLinkJobs (IfxFft_Fft_Job *originalJob, IfxFft_Fft_Job *newJob)
Clones and links the jobs. More...
void | IfxFft_Fft_initJob (IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
Initialises the FFT job. More...
void | IfxFft_Fft_initJobConfig (IfxFft_Fft_JobConfig *config, IfxFft_Fft *fft)
Fills the job configuration structure with default values. More...
void | IfxFft_Fft_initModule (IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialises the module. More...
void | IfxFft_Fft_initModuleConfig (IfxFft_Fft_Config *config, Ifx_FFT *fft, Ifx_LMU *lmu)
Fills the config structure with default values. More...
void | IfxFft_Fft_initWindow (IfxFft_Fft *fft, const uint64 *windowData)
Initialises the window transfer. More...
void | IfxFft_Fft_isrInput (IfxFft_Fft *fft)
ISR input routine. More...
void | IfxFft_Fft_isrOutput (IfxFft_Fft *fft)
ISR output routine. More...
void | IfxFft_Fft_modifyDataPointers (IfxFft_Fft_Job *job, const void *inputPtr, void *outputPtr)
Updates the input and output pointers in the FFT job handle. More...
boolean | IfxFft_Fft_startJob (IfxFft_Fft_Job *job)
Starts the FFT job. More...
void | IfxFft_Fft_isrIntra (IfxFft_Fft *fft)
void | IfxFft_Fft_initDma (IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialization of DMA. More...

Variables

IFX_STATIC uint64 IfxFft_Fft_dummy256 [IFXFFT_FFT_MOVE_DIV]

Detailed Description

FFT FFT details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFft_Fft.c.

Macro Definition Documentation

◆ IFXFFT_FFT_DATA_TRANSFER

#define IFXFFT_FFT_DATA_TRANSFER (*((volatile uint64 *)IFXFFT_DATA_SPACE))

Definition at line 52 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_loadInput(), and IfxFft_Fft_unloadOutput().

◆ IFXFFT_FFT_DMADISCARDCHANNELID

#define IFXFFT_FFT_DMADISCARDCHANNELID (dmaDiscard->channelId)

Definition at line 62 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_unloadOutput().

◆ IFXFFT_FFT_DMADISCARDCHANNELID_OPT

#define IFXFFT_FFT_DMADISCARDCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE + 2)

Definition at line 56 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_unloadOutput().

◆ IFXFFT_FFT_DMAINPUTCHANNELID

#define IFXFFT_FFT_DMAINPUTCHANNELID (dmaInput->channelId)

Definition at line 66 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_loadInput().

◆ IFXFFT_FFT_DMAINPUTCHANNELID_OPT

#define IFXFFT_FFT_DMAINPUTCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE)

Definition at line 60 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_loadInput().

◆ IFXFFT_FFT_DMAOUTPUTCHANNELID

#define IFXFFT_FFT_DMAOUTPUTCHANNELID (dmaOutput->channelId)

Definition at line 64 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_unloadOutput().

◆ IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT

#define IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE + 1)

Definition at line 58 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_unloadOutput().

◆ IFXFFT_FFT_ISALIGNED

#define IFXFFT_FFT_ISALIGNED ( address ) ((Ifx_AlignOn256((uint32)address) == (uint32)address))

Definition at line 74 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_initJob().

◆ IFXFFT_FFT_MOVE_BTR4

#define IFXFFT_FFT_MOVE_BTR4 1

Definition at line 68 of file IfxFft_Fft.c.

◆ IFXFFT_FFT_MOVE_DIV

#define IFXFFT_FFT_MOVE_DIV 4

Definition at line 72 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_calcCounters().

◆ IFXFFT_FFT_MOVE_SIZE

#define IFXFFT_FFT_MOVE_SIZE IfxDma_ChannelMoveSize_256bit

Definition at line 70 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_initDma().

◆ IFXFFT_FFT_WINDOW_TRANSFER

#define IFXFFT_FFT_WINDOW_TRANSFER (*((volatile uint64 *)IFXFFT_WINDOW_SPACE))

Definition at line 54 of file IfxFft_Fft.c.

Function Documentation

◆ IfxFft_Fft_calcCounters()

IFX_STATIC void IfxFft_Fft_calcCounters | ( | IfxFft_Fft_Job * | job,
 |  | const IfxFft_Fft_JobConfig * | jobConfig
 | ) |  |

Calculates the input counters and output counters.

Parameters
job | job FFT job
jobConfig | jobConfig Pointer to the job configuration
Returns
None

Definition at line 568 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_initJob().

◆ IfxFft_Fft_initDma()

void IfxFft_Fft_initDma | ( | IfxFft_Fft * | fft,
 |  | const IfxFft_Fft_Config * | config
 | ) |  |

Initialization of DMA.

Parameters
fft | fft Module handle
config | pointing to config strucuture of fft
Returns
None

Definition at line 640 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_initModule().

◆ IfxFft_Fft_isrIntra()

void IfxFft_Fft_isrIntra ( IfxFft_Fft * fft )
Returns
None

Definition at line 606 of file IfxFft_Fft.c.

Variable Documentation

◆ IfxFft_Fft_dummy256

IFX_STATIC uint64 IfxFft_Fft_dummy256[IFXFFT_FFT_MOVE_DIV]

Definition at line 127 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_unloadOutput().


iLLD_TC26B: IfxFlash.c File Reference

  • Flash
  • Std
Functions
IfxFlash.c File Reference

FLASH basic functionality. More...

#include "IfxFlash.h"
Include dependency graph for IfxFlash.c:

Go to the source code of this file.

Functions

void | IfxFlash_clearCorrectableErrorTracking (IfxFlash_PortId portId)
Clear the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register. More...
void | IfxFlash_clearUncorrectableErrorTracking (IfxFlash_PortId portId)
Select the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register. More...
void | IfxFlash_disableCorrectableErrorTracking (IfxFlash_PortId portId, boolean disable)
Disable the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register. More...
void | IfxFlash_disableUncorrectableErrorTracking (IfxFlash_PortId portId, boolean disable)
Clear the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register. More...
void | IfxFlash_disableWriteProtection (uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled. The command fails by setting PROER when any of the supplied PWs does not match. In this case until the next application reset all further calls of "Disable Protection" fail with PROER independent of the supplied password. More...
uint32 | IfxFlash_getTrackedCorrectableErrors (IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked correctable error addresses, error types and number of errors which are stored in the CBAB registers. More...
uint32 | IfxFlash_getTrackedUncorrectableErrors (IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked uncorrectable error addresses, error types and number of errors which are stored in the UBAB registers. More...
void | IfxFlash_selectCorrectableErrorTracking (IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for correctable flash errors. More...
void | IfxFlash_selectUncorrectableErrorTracking (IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for uncorrectable flash errors. More...

Detailed Description

FLASH basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFlash.c.


iLLD_TC26B: IfxFlash_cfg.c File Reference

  • _Impl
Variables
IfxFlash_cfg.c File Reference

FLASH on-chip implementation data. More...

#include "IfxFlash_cfg.h"
Include dependency graph for IfxFlash_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog [IFXFLASH_DFLASH_NUM_LOG_SECTORS]
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys [IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog [IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]
IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog [IFXFLASH_PFLASH_NUM_LOG_SECTORS]
IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys [IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]

Detailed Description

FLASH on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxFlash_cfg.c.

Variable Documentation

◆ IfxFlash_dFlashTableEepLog

IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS]
Initial value:
= {
{0xAF000000 + 0 * 0x2000, 0xAF000000 + 1 * 0x2000 - 1 },
{0xAF000000 + 1 * 0x2000, 0xAF000000 + 2 * 0x2000 - 1 },
{0xAF000000 + 2 * 0x2000, 0xAF000000 + 3 * 0x2000 - 1 },
{0xAF000000 + 3 * 0x2000, 0xAF000000 + 4 * 0x2000 - 1 },
{0xAF000000 + 4 * 0x2000, 0xAF000000 + 5 * 0x2000 - 1 },
{0xAF000000 + 5 * 0x2000, 0xAF000000 + 6 * 0x2000 - 1 },
{0xAF000000 + 6 * 0x2000, 0xAF000000 + 7 * 0x2000 - 1 },
{0xAF000000 + 7 * 0x2000, 0xAF000000 + 8 * 0x2000 - 1 },
{0xAF000000 + 8 * 0x2000, 0xAF000000 + 9 * 0x2000 - 1 },
{0xAF000000 + 9 * 0x2000, 0xAF000000 + 10 * 0x2000 - 1},
{0xAF000000 + 10 * 0x2000, 0xAF000000 + 11 * 0x2000 - 1},
{0xAF000000 + 11 * 0x2000, 0xAF000000 + 12 * 0x2000 - 1},
}

Definition at line 52 of file IfxFlash_cfg.c.

◆ IfxFlash_dFlashTablePhys

IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]
Initial value:
= {
{IFXFLASH_DFLASH_START, IFXFLASH_DFLASH_END},
}
IFXFLASH_DFLASH_START
#define IFXFLASH_DFLASH_START
Definition: IfxFlash_cfg.h:97
IFXFLASH_DFLASH_END
#define IFXFLASH_DFLASH_END
Definition: IfxFlash_cfg.h:81

Definition at line 67 of file IfxFlash_cfg.c.

◆ IfxFlash_dFlashTableUcbLog

IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]
Initial value:
= {
{0xaf100000, 0xaf1003ff},
{0xaf100400, 0xaf1007ff},
{0xaf100800, 0xaf100bff},
{0xaf100c00, 0xaf100fff},
{0xaf101000, 0xaf1013ff},
{0xaf101400, 0xaf1017ff},
{0xaf101800, 0xaf101bff},
{0xaf101c00, 0xaf101fff},
{0xaf102000, 0xaf1023ff},
{0xaf102400, 0xaf1027ff},
{0xaf102800, 0xaf102bff},
{0xaf102c00, 0xaf102fff},
{0xaf103000, 0xaf1033ff},
{0xaf103400, 0xaf1037ff},
{0xaf103800, 0xaf103bff},
{0xaf103c00, 0xaf103fff},
}

Definition at line 71 of file IfxFlash_cfg.c.

◆ IfxFlash_pFlashTableLog

IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS]

Definition at line 90 of file IfxFlash_cfg.c.

◆ IfxFlash_pFlashTablePhys

IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]
Initial value:
= {
{0xa0000000, 0xa007ffff},
{0xa0080000, 0xa00fffff},
{0xa0100000, 0xa017ffff},
{0xa0180000, 0xa01fffff},
{0xa0200000, 0xa027ffff},
}

Definition at line 142 of file IfxFlash_cfg.c.


iLLD_TC26B: IfxGpt12.c File Reference

  • Gpt12
  • Std
Functions
IfxGpt12.c File Reference

GPT12 basic functionality. More...

#include "IfxGpt12.h"
Include dependency graph for IfxGpt12.c:

Go to the source code of this file.

Functions

float32 | IfxGpt12_T2_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T2 timer. More...
float32 | IfxGpt12_T3_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T3 timer. More...
float32 | IfxGpt12_T4_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T4 timer. More...
float32 | IfxGpt12_T5_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer. More...
float32 | IfxGpt12_T6_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T6 timer. More...
void | IfxGpt12_disableModule (Ifx_GPT12 *gpt12)
Disables the module. More...
void | IfxGpt12_enableModule (Ifx_GPT12 *gpt12)
Enables the module. More...
void | IfxGpt12_initTxEudInPin (const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
Initializes a TxEUDIn_IN input. More...
void | IfxGpt12_initTxEudInPinWithPadLevel (const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver. More...
void | IfxGpt12_initTxInPin (const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
Initializes a TxIn input. More...
void | IfxGpt12_initTxInPinWithPadLevel (const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXIN pin direction as input and configuring pad driver. More...
void | IfxGpt12_resetModule (Ifx_GPT12 *gpt12)
resets GPT12 kernel More...

Detailed Description

GPT12 basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGpt12.c.

Function Documentation

◆ IfxGpt12_initTxEudInPinWithPadLevel()

void IfxGpt12_initTxEudInPinWithPadLevel | ( | const IfxGpt12_TxEud_In * | txEudIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver.

Parameters
txEudIn | the TxEUD_IN Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 302 of file IfxGpt12.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_initTxInPinWithPadLevel()

void IfxGpt12_initTxInPinWithPadLevel | ( | const IfxGpt12_TxIn_In * | txIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of TXIN pin direction as input and configuring pad driver.

Parameters
txIn | the TxIn Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 357 of file IfxGpt12.c.

Referenced by IfxGpt12_IncrEnc_init().


iLLD_TC26B: IfxGpt12_IncrEnc.c File Reference

  • Gpt12
  • IncrEnc
Functions
IfxGpt12_IncrEnc.c File Reference

GPT12 INCRENC details. More...

#include "IfxGpt12_IncrEnc.h"
Include dependency graph for IfxGpt12_IncrEnc.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxGpt12_IncrEnc_updateFromT2 (IfxGpt12_IncrEnc *driver)
Update internal data when incremental mode is using T2.
This function shall be periodically called. More...
IFX_STATIC void | IfxGpt12_IncrEnc_updateFromT3 (IfxGpt12_IncrEnc *driver)
Update internal data when incremental mode is using T3.
This function shall be periodically called. More...
IFX_STATIC void | IfxGpt12_IncrEnc_updateSpeedFromT2 (IfxGpt12_IncrEnc *driver, sint32 newPosition)
Updates the speed. More...
IFX_STATIC void | IfxGpt12_IncrEnc_updateSpeedFromT3 (IfxGpt12_IncrEnc *driver, sint32 newPosition)
Updates the speed. More...
float32 | IfxGpt12_IncrEnc_getAbsolutePosition (IfxGpt12_IncrEnc *driver)
IfxStdIf_Pos_Dir | IfxGpt12_IncrEnc_getDirection (IfxGpt12_IncrEnc *driver)
IfxStdIf_Pos_Status | IfxGpt12_IncrEnc_getFault (IfxGpt12_IncrEnc *driver)
sint32 | IfxGpt12_IncrEnc_getOffset (IfxGpt12_IncrEnc *driver)
uint16 | IfxGpt12_IncrEnc_getPeriodPerRotation (IfxGpt12_IncrEnc *driver)
float32 | IfxGpt12_IncrEnc_getPosition (IfxGpt12_IncrEnc *driver)
sint32 | IfxGpt12_IncrEnc_getRawPosition (IfxGpt12_IncrEnc *driver)
float32 | IfxGpt12_IncrEnc_getRefreshPeriod (IfxGpt12_IncrEnc *driver)
sint32 | IfxGpt12_IncrEnc_getResolution (IfxGpt12_IncrEnc *driver)
IfxStdIf_Pos_SensorType | IfxGpt12_IncrEnc_getSensorType (IfxGpt12_IncrEnc *driver)
float32 | IfxGpt12_IncrEnc_getSpeed (IfxGpt12_IncrEnc *driver)
sint32 | IfxGpt12_IncrEnc_getTurn (IfxGpt12_IncrEnc *driver)
boolean | IfxGpt12_IncrEnc_init (IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
Initialises the Incremental interface. More...
void | IfxGpt12_IncrEnc_initConfig (IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
Initializes the configuration structure to default. More...
void | IfxGpt12_IncrEnc_onZeroIrq (IfxGpt12_IncrEnc *driver)
void | IfxGpt12_IncrEnc_reset (IfxGpt12_IncrEnc *driver)
void | IfxGpt12_IncrEnc_resetFaults (IfxGpt12_IncrEnc *driver)
void | IfxGpt12_IncrEnc_setOffset (IfxGpt12_IncrEnc *driver, sint32 offset)
void | IfxGpt12_IncrEnc_setRefreshPeriod (IfxGpt12_IncrEnc *driver, float32 updatePeriod)
boolean | IfxGpt12_IncrEnc_stdIfPosInit (IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver)
Initializes the standard interface "Pos". More...
void | IfxGpt12_IncrEnc_update (IfxGpt12_IncrEnc *driver)

Detailed Description

GPT12 INCRENC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGpt12_IncrEnc.c.

Function Documentation

◆ IfxGpt12_IncrEnc_stdIfPosInit()

boolean IfxGpt12_IncrEnc_stdIfPosInit | ( | IfxStdIf_Pos * | stdif,
 |  | IfxGpt12_IncrEnc * | driver
 | ) |  |

Initializes the standard interface "Pos".

Parameters
stdif | Standard interface position object
driver | incremental encoder interface Handle
Returns
TRUE on success else FALSE

Definition at line 366 of file IfxGpt12_IncrEnc.c.

◆ IfxGpt12_IncrEnc_updateFromT2()

IFX_STATIC void IfxGpt12_IncrEnc_updateFromT2 ( IfxGpt12_IncrEnc * driver )

Update internal data when incremental mode is using T2.
This function shall be periodically called.

Parameters
driver driver handle
Returns
None

Definition at line 406 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_IncrEnc_updateFromT3()

IFX_STATIC void IfxGpt12_IncrEnc_updateFromT3 ( IfxGpt12_IncrEnc * driver )

Update internal data when incremental mode is using T3.
This function shall be periodically called.

Parameters
driver driver handle
Returns
None

Definition at line 430 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_IncrEnc_updateSpeedFromT2()

IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT2 | ( | IfxGpt12_IncrEnc * | driver,
 |  | sint32 | newPosition
 | ) |  |

Updates the speed.

Parameters
driver | driver handle
newPosition | new position
Returns
None

Definition at line 454 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_updateFromT2().

◆ IfxGpt12_IncrEnc_updateSpeedFromT3()

IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT3 | ( | IfxGpt12_IncrEnc * | driver,
 |  | sint32 | newPosition
 | ) |  |

Updates the speed.

Parameters
driver | driver handle
newPosition | new position
Returns
None

Definition at line 480 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_updateFromT3().


iLLD_TC26B: IfxGtm.c File Reference

  • Gtm
  • Std
Functions
IfxGtm.c File Reference

GTM basic functionality. More...

#include "IfxGtm.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxGtm.c:

Go to the source code of this file.

Functions

void | IfxGtm_disable (Ifx_GTM *gtm)
Disables the module. More...
void | IfxGtm_enable (Ifx_GTM *gtm)
Enables the module. More...
float32 | IfxGtm_getSysClkFrequency (void)
returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm.c.

Function Documentation

◆ IfxGtm_getSysClkFrequency()

float32 IfxGtm_getSysClkFrequency ( void )

returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK.

Returns
sysFreq

Definition at line 74 of file IfxGtm.c.

Referenced by IfxGtm_Cmu_getModuleFrequency().


iLLD_TC26B: IfxGtm_Atom.c File Reference

  • Gtm
  • Std
Macros | Functions
IfxGtm_Atom.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Atom.h"
#include "IfxGtm_bf.h"
Include dependency graph for IfxGtm_Atom.c:

Go to the source code of this file.

Macros

#define IFXGTM_ATOM_NUM_AGC_CHANNELS (8)
Number of channels per ATOM AGC. More...

Functions

uint32 | IfxGtm_Atom_Agc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
uint32 | IfxGtm_Atom_Agc_buildFeatureForChannel (IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
void | IfxGtm_Atom_Agc_enableChannel (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
void | IfxGtm_Atom_Agc_enableChannelOutput (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
void | IfxGtm_Atom_Agc_enableChannelUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
void | IfxGtm_Atom_Agc_enableChannels (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
void | IfxGtm_Atom_Agc_enableChannelsOutput (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
void | IfxGtm_Atom_Agc_enableChannelsTrigger (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
void | IfxGtm_Atom_Agc_enableChannelsUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
void | IfxGtm_Atom_Agc_enableTimeTrigger (Ifx_GTM_ATOM_AGC *agc, boolean enabled)
Enable/disable the time base trigger. More...
void | IfxGtm_Atom_Agc_resetChannels (Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
Reset one or more channels. More...
void | IfxGtm_Atom_Agc_setChannelForceUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
void | IfxGtm_Atom_Agc_setChannelsForceUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
void | IfxGtm_Atom_Agc_setTimeTrigger (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
void | IfxGtm_Atom_Agc_trigger (Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...
void | IfxGtm_Atom_Ch_clearOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification. More...
void | IfxGtm_Atom_Ch_clearZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification. More...
void | IfxGtm_Atom_Ch_configurePwmMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
float32 | IfxGtm_Atom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz. More...
IfxGtm_Cmu_Clk | IfxGtm_Atom_Ch_getClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source. More...
uint32 | IfxGtm_Atom_Ch_getCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value. More...
volatile uint32 * | IfxGtm_Atom_Ch_getCompareOnePointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer. More...
uint32 | IfxGtm_Atom_Ch_getCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero value. More...
volatile uint32 * | IfxGtm_Atom_Ch_getCompareZeroPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero pointer. More...
boolean | IfxGtm_Atom_Ch_getOutputLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Gets the ATOM output level. More...
volatile Ifx_SRC_SRCR * | IfxGtm_Atom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC. More...
volatile uint32 * | IfxGtm_Atom_Ch_getTimerPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer. More...
boolean | IfxGtm_Atom_Ch_isOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification. More...
boolean | IfxGtm_Atom_Ch_isZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification. More...
void | IfxGtm_Atom_Ch_raiseInterruptOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 1. More...
void | IfxGtm_Atom_Ch_raiseInterruptZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 0. More...
void | IfxGtm_Atom_Ch_setClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
Sets the channel clock source. More...
void | IfxGtm_Atom_Ch_setCompare (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
void | IfxGtm_Atom_Ch_setCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
void | IfxGtm_Atom_Ch_setCompareOneShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
void | IfxGtm_Atom_Ch_setCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
void | IfxGtm_Atom_Ch_setCompareZeroShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
void | IfxGtm_Atom_Ch_setCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value. More...
void | IfxGtm_Atom_Ch_setMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode More...
void | IfxGtm_Atom_Ch_setNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
void | IfxGtm_Atom_Ch_setOneShotMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
void | IfxGtm_Atom_Ch_setResetSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
void | IfxGtm_Atom_Ch_setSignalLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
void | IfxGtm_Atom_Ch_setTriggerOutput (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...
void | IfxGtm_Atom_Ch_setAruInput (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
enable/disable ARU input for the ATOM channel specified. More...
uint32 | IfxGtm_Atom_Ch_getCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Get the counter value. More...
void | IfxGtm_Atom_Ch_setSomcControl (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control)
sets the SOMC control bits for the specified ATOM channel More...
void | IfxGtm_Atom_Ch_setSomcSignalLevelControl (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl)
sets the SL control for SOMC mode. More...
void | IfxGtm_Atom_Ch_setAruReadAddress0 (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 0 More...
void | IfxGtm_Atom_Ch_setAruReadAddress1 (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 1 More...
uint32 | IfxGtm_Atom_getShadowZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow zero value. More...
volatile uint32 * | IfxGtm_Atom_getShadowZeroPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow zero pointer. More...
uint32 | IfxGtm_Atom_getShadowOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow one value. More...
volatile uint32 * | IfxGtm_Atom_getShadowOnePointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow One pointer. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom.c.

Macro Definition Documentation

◆ IFXGTM_ATOM_NUM_AGC_CHANNELS

#define IFXGTM_ATOM_NUM_AGC_CHANNELS (8)

Number of channels per ATOM AGC.

Definition at line 55 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Agc_buildFeature(), and IfxGtm_Atom_Agc_resetChannels().

Function Documentation

◆ IfxGtm_Atom_Ch_setAruInput()

void IfxGtm_Atom_Ch_setAruInput | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

enable/disable ARU input for the ATOM channel specified.

Parameters
atom | pointer to the ATOM instance
channel | index of ATOM channel
enabled | ARU enable status
Returns
None

Definition at line 521 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setAruReadAddress0()

void IfxGtm_Atom_Ch_setAruReadAddress0 | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | address
 | ) |  |

set the ARU read address 0

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
address | ARU read address 0
Returns
None

Definition at line 553 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setAruReadAddress1()

void IfxGtm_Atom_Ch_setAruReadAddress1 | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | address
 | ) |  |

set the ARU read address 1

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
address | ARU read address 1
Returns
None

Definition at line 560 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setSomcControl()

void IfxGtm_Atom_Ch_setSomcControl | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_SomcControl | control
 | ) |  |

sets the SOMC control bits for the specified ATOM channel

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
control | SOMC control mode enum
Returns
None

Definition at line 537 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setSomcSignalLevelControl()

void IfxGtm_Atom_Ch_setSomcSignalLevelControl | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_SomcSignalLevelControl | ctrl
 | ) |  |

sets the SL control for SOMC mode.

Parameters
atom | pointer to the ATOM instance
channel | index of ATOM channel
ctrl | SIgnal level control
Returns
None

Definition at line 545 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_getShadowOne()

uint32 IfxGtm_Atom_getShadowOne | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the shadow one value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
shadow one value

Definition at line 583 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_getShadowOnePointer()

volatile uint32* IfxGtm_Atom_getShadowOnePointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the shadow One pointer.

Parameters
atom | Pointer to the ATOM object
channel | channel index
Returns
shadow One pointer

Definition at line 591 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_getShadowZero()

uint32 IfxGtm_Atom_getShadowZero | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the shadow zero value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
shadow zero value

Definition at line 567 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_getShadowZeroPointer()

volatile uint32* IfxGtm_Atom_getShadowZeroPointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the shadow zero pointer.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
shadow zero value

Definition at line 575 of file IfxGtm_Atom.c.


iLLD_TC26B: IfxGtm_Atom_Pwm.c File Reference

  • Gtm
  • Atom
  • Pwm
Functions
IfxGtm_Atom_Pwm.c File Reference

GTM PWM details. More...

#include "IfxGtm_Atom_Pwm.h"
Include dependency graph for IfxGtm_Atom_Pwm.c:

Go to the source code of this file.

Functions

boolean | IfxGtm_Atom_Pwm_init (IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
Initialises the Timer object. More...
void | IfxGtm_Atom_Pwm_initConfig (IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
void | IfxGtm_Atom_Pwm_start (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Starts the PWM generation from the configured channel. More...
void | IfxGtm_Atom_Pwm_stop (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel. More...

Detailed Description

GTM PWM details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom_Pwm.c.


iLLD_TC26B: IfxGtm_Atom_PwmHl.c File Reference

  • Gtm
  • Atom
  • PwmHl
Functions | Variables
IfxGtm_Atom_PwmHl.c File Reference

GTM PWMHL details. More...

#include "IfxGtm_Atom_PwmHl.h"
#include "_Utilities/Ifx_Assert.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxGtm_Atom_PwmHl.c:

Go to the source code of this file.

Functions

IFX_INLINE Ifx_ActiveState | IfxGtm_Atom_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateAndShiftOff (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateCenterAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateEdgeAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateOff (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updatePulse (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updatePulseOff (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateShiftCenterAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned. More...
float32 | IfxGtm_Atom_PwmHl_getDeadtime (IfxGtm_Atom_PwmHl *driver)
Returns the dead time. More...
float32 | IfxGtm_Atom_PwmHl_getMinPulse (IfxGtm_Atom_PwmHl *driver)
Returns the minimum pulse. More...
Ifx_Pwm_Mode | IfxGtm_Atom_PwmHl_getMode (IfxGtm_Atom_PwmHl *driver)
Returns Pwm mode. More...
boolean | IfxGtm_Atom_PwmHl_init (IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. More...
void | IfxGtm_Atom_PwmHl_initConfig (IfxGtm_Atom_PwmHl_Config *config)
Initialize the configuration structure to default. More...
boolean | IfxGtm_Atom_PwmHl_setDeadtime (IfxGtm_Atom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
boolean | IfxGtm_Atom_PwmHl_setMinPulse (IfxGtm_Atom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
boolean | IfxGtm_Atom_PwmHl_setMode (IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
void | IfxGtm_Atom_PwmHl_setOnTime (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
void | IfxGtm_Atom_PwmHl_setOnTimeAndShift (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
void | IfxGtm_Atom_PwmHl_setPulse (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
void | IfxGtm_Atom_PwmHl_setupChannels (IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
boolean | IfxGtm_Atom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Variables

IFX_STATIC IFX_CONST IfxGtm_Atom_PwmHl_Mode IfxGtm_Atom_PwmHl_modes [Ifx_Pwm_Mode_off+1]

Detailed Description

GTM PWMHL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom_PwmHl.c.

Variable Documentation

◆ IfxGtm_Atom_PwmHl_modes

IFX_STATIC IFX_CONST IfxGtm_Atom_PwmHl_Mode IfxGtm_Atom_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Initial value:
= {
{Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Atom_PwmHl_updateCenterAligned, &IfxGtm_Atom_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Atom_PwmHl_updateCenterAligned, &IfxGtm_Atom_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Atom_PwmHl_updateEdgeAligned, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Atom_PwmHl_updateEdgeAligned, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Atom_PwmHl_updateOff, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulseOff},
}
IfxGtm_Atom_PwmHl_updateAndShiftOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updateAndShiftOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF.
Definition: IfxGtm_Atom_PwmHl.c:414
IfxGtm_Atom_PwmHl_updateShiftCenterAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateShiftCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned.
Definition: IfxGtm_Atom_PwmHl.c:674
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
IfxGtm_Atom_PwmHl_updateEdgeAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateEdgeAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxGtm_Atom_PwmHl.c:482
FALSE
#define FALSE
Definition: Platform_Types.h:93
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
IfxGtm_Atom_PwmHl_updateCenterAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxGtm_Atom_PwmHl.c:422
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
IfxGtm_Atom_PwmHl_updatePulse
IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse.
Definition: IfxGtm_Atom_PwmHl.c:558
IfxGtm_Atom_PwmHl_updatePulseOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulseOff(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF.
Definition: IfxGtm_Atom_PwmHl.c:665
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Atom_PwmHl_updateOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updateOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxGtm_Atom_PwmHl.c:542

Definition at line 126 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_setMode().


iLLD_TC26B: IfxGtm_Atom_Timer.c File Reference

  • Gtm
  • Atom
  • Timer
Functions
IfxGtm_Atom_Timer.c File Reference

GTM TIMER details. More...

#include "IfxGtm_Atom_Timer.h"
#include "_Utilities/Ifx_Assert.h"
#include "IfxGtm_bf.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxGtm_Atom_Timer.c:

Go to the source code of this file.

Functions

boolean | IfxGtm_Atom_Timer_acknowledgeTimerIrq (IfxGtm_Atom_Timer *driver)
Returns the timer event. More...
boolean | IfxGtm_Atom_Timer_acknowledgeTriggerIrq (IfxGtm_Atom_Timer *driver)
Returns the trigger event. More...
void | IfxGtm_Atom_Timer_addToChannelMask (IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run. More...
void | IfxGtm_Atom_Timer_applyUpdate (IfxGtm_Atom_Timer *driver)
Enables the transfer of the shadow registers. More...
void | IfxGtm_Atom_Timer_disableUpdate (IfxGtm_Atom_Timer *driver)
Disables the upadte. More...
float32 | IfxGtm_Atom_Timer_getFrequency (IfxGtm_Atom_Timer *driver)
Returns the frequency. More...
float32 | IfxGtm_Atom_Timer_getInputFrequency (IfxGtm_Atom_Timer *driver)
Returns the Input frequncy. More...
Ifx_TimerValue | IfxGtm_Atom_Timer_getOffset (IfxGtm_Atom_Timer *driver)
Returns the initial timer offset in ticks. More...
Ifx_TimerValue | IfxGtm_Atom_Timer_getPeriod (IfxGtm_Atom_Timer *driver)
Returns the period of the timer. More...
volatile uint32 * | IfxGtm_Atom_Timer_getPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to timer channel. More...
float32 | IfxGtm_Atom_Timer_getResolution (IfxGtm_Atom_Timer *driver)
Returns the resolution. More...
Ifx_TimerValue | IfxGtm_Atom_Timer_getTrigger (IfxGtm_Atom_Timer *driver)
Returns the trigger point. More...
volatile uint32 * | IfxGtm_Atom_Timer_getTriggerPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to trigger channel. More...
boolean | IfxGtm_Atom_Timer_init (IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
Initialises the timer object. More...
void | IfxGtm_Atom_Timer_initConfig (IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
void | IfxGtm_Atom_Timer_run (IfxGtm_Atom_Timer *driver)
Runs the timer. More...
boolean | IfxGtm_Atom_Timer_setFrequency (IfxGtm_Atom_Timer *driver, float32 frequency)
Sets the frequency. More...
boolean | IfxGtm_Atom_Timer_setPeriod (IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
void | IfxGtm_Atom_Timer_setSingleMode (IfxGtm_Atom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
void | IfxGtm_Atom_Timer_setTrigger (IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
boolean | IfxGtm_Atom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer. More...
void | IfxGtm_Atom_Timer_stop (IfxGtm_Atom_Timer *driver)
Stops the timer. More...
void | IfxGtm_Atom_Timer_updateInputFrequency (IfxGtm_Atom_Timer *driver)
Updates the input frequency. More...

Detailed Description

GTM TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Atom_Timer.c.


iLLD_TC26B: IfxGtm_cfg.c File Reference

  • _Impl
IfxGtm_cfg.c File Reference

GTM on-chip implementation data. More...

#include "IfxGtm_cfg.h"
Include dependency graph for IfxGtm_cfg.c:

Go to the source code of this file.

Detailed Description

GTM on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_cfg.c.


iLLD_TC26B: IfxGtm_Cmu.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Cmu.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Cmu.h"
#include "IfxGtm_Dpll.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Scu/Std/IfxScuWdt.h"
#include "math.h"
#include "IfxGtm_bf.h"
#include "IfxGtm.h"
Include dependency graph for IfxGtm_Cmu.c:

Go to the source code of this file.

Functions

void | IfxGtm_Cmu_enableClocks (Ifx_GTM *gtm, uint32 clkMask)
Enable / Disable the configurable, fixed, and external clocks. More...
float32 | IfxGtm_Cmu_getClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz. More...
float32 | IfxGtm_Cmu_getEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
Returns the GTM external clock frequency in Hz. More...
float32 | IfxGtm_Cmu_getFxClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz. More...
float32 | IfxGtm_Cmu_getGclkFrequency (Ifx_GTM *gtm)
Returns the GTM global clock frequency in Hz. More...
float32 | IfxGtm_Cmu_getModuleFrequency (Ifx_GTM *gtm)
returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency: IfxGtm_getSysClkFrequency() is to be used. More...
boolean | IfxGtm_Cmu_isClkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
Returns the configurable clock enable status. More...
boolean | IfxGtm_Cmu_isEclkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
Returns the external clock enable status. More...
boolean | IfxGtm_Cmu_isFxClockEnabled (Ifx_GTM *gtm)
Returns the fixed clock enable status. More...
void | IfxGtm_Cmu_selectClkInput (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the corresponding clock is disabled using IfxGtm_Cmu_enableClocks() More...
void | IfxGtm_Cmu_setClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
Set the GTM configurable clock frequency in Hz. More...
void | IfxGtm_Cmu_setEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
Set the GTM external clock frequency in Hz. More...
void | IfxGtm_Cmu_setGclkFrequency (Ifx_GTM *gtm, float32 frequency)
Set the GTM global clock frequency in Hz. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Cmu.c.


iLLD_TC26B: IfxGtm_Dpll.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Dpll.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Dpll.h"
Include dependency graph for IfxGtm_Dpll.c:

Go to the source code of this file.

Functions

float32 IfxGtm_Dpll_getSubIncFrequency (Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Dpll.c.


iLLD_TC26B: IfxGtm_Tbu.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Tbu.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Tbu.h"
#include "IfxGtm_Cmu.h"
Include dependency graph for IfxGtm_Tbu.c:

Go to the source code of this file.

Functions

float32 IfxGtm_Tbu_getClockFrequency (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Returns the clock frequency. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tbu.c.


iLLD_TC26B: IfxGtm_Tim.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Tim.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Tim.h"
Include dependency graph for IfxGtm_Tim.c:

Go to the source code of this file.

Functions

float32 | IfxGtm_Tim_Ch_getCaptureClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency. More...
IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getCaptureClockSource (Ifx_GTM_TIM_CH *channel)
Returns the capture clock source selected. More...
float32 | IfxGtm_Tim_Ch_getFilterClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency. More...
IfxGtm_Cmu_Tim_Filter_Clk | IfxGtm_Tim_Ch_getFilterClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Filter clock source selected. More...
float32 | IfxGtm_Tim_Ch_getTimeoutClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency. More...
IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getTimeoutClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Timeout clock source selected. More...
void | IfxGtm_Tim_Ch_setChannelNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification. More...
void | IfxGtm_Tim_Ch_setClockSource (Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source. More...
void | IfxGtm_Tim_Ch_setFilterNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification. More...
void | IfxGtm_Tim_Ch_setNotificationMode (Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode. More...
void | IfxGtm_Tim_Ch_setTimeoutNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tim.c.


iLLD_TC26B: IfxGtm_Tim_In.c File Reference

  • Gtm
  • Tim
  • In
Functions
IfxGtm_Tim_In.c File Reference

GTM IN details. More...

#include "IfxGtm_Tim_In.h"
#include "IfxGtm_bf.h"
#include "string.h"
Include dependency graph for IfxGtm_Tim_In.c:

Go to the source code of this file.

Functions

boolean | IfxGtm_Tim_In_init (IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
Initializes the input capture object. More...
void | IfxGtm_Tim_In_initConfig (IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
void | IfxGtm_Tim_In_onIsr (IfxGtm_Tim_In *driver)
will update the driver state
To be called in the interrupt generated by the IfxGtm_Tim_In driver More...
void | IfxGtm_Tim_In_update (IfxGtm_Tim_In *driver)
Updates the period and duty cycle. More...

Detailed Description

GTM IN details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tim_In.c.


iLLD_TC26B: IfxGtm_Tom.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Tom.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Tom.h"
#include "IfxGtm_bf.h"
#include "IfxGtm_Cmu.h"
Include dependency graph for IfxGtm_Tom.c:

Go to the source code of this file.

Functions

void | IfxGtm_Tom_Ch_clearOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification. More...
void | IfxGtm_Tom_Ch_clearZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification. More...
float32 | IfxGtm_Tom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz. More...
IfxGtm_Tom_Ch_ClkSrc | IfxGtm_Tom_Ch_getClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source. More...
uint32 | IfxGtm_Tom_Ch_getCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value. More...
volatile uint32 * | IfxGtm_Tom_Ch_getCompareOnePointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer. More...
uint32 | IfxGtm_Tom_Ch_getCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero value. More...
volatile uint32 * | IfxGtm_Tom_Ch_getCompareZeroPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero pointer. More...
boolean | IfxGtm_Tom_Ch_getOutputLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Gets the TOM output level. More...
volatile Ifx_SRC_SRCR * | IfxGtm_Tom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC. More...
Ifx_GTM_TOM_TGC * | IfxGtm_Tom_Ch_getTgcPointer (Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer. More...
volatile uint32 * | IfxGtm_Tom_Ch_getTimerPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer. More...
boolean | IfxGtm_Tom_Ch_isOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification. More...
boolean | IfxGtm_Tom_Ch_isZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification. More...
void | IfxGtm_Tom_Ch_raiseInterruptOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 1. More...
void | IfxGtm_Tom_Ch_raiseInterruptZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 0. More...
void | IfxGtm_Tom_Ch_setClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source. More...
void | IfxGtm_Tom_Ch_setCompare (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
void | IfxGtm_Tom_Ch_setCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
void | IfxGtm_Tom_Ch_setCompareOneShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
void | IfxGtm_Tom_Ch_setCompareShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values. More...
void | IfxGtm_Tom_Ch_setCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
void | IfxGtm_Tom_Ch_setCompareZeroShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
void | IfxGtm_Tom_Ch_setCounterValue (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value. More...
void | IfxGtm_Tom_Ch_setGatedCounter (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the gated counter mode (channel 0 to 7 only) More...
void | IfxGtm_Tom_Ch_setNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
void | IfxGtm_Tom_Ch_setOneShotMode (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
void | IfxGtm_Tom_Ch_setPcm (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the PCM mode (channel 15 only) More...
void | IfxGtm_Tom_Ch_setResetSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
void | IfxGtm_Tom_Ch_setSignalLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
void | IfxGtm_Tom_Ch_setSpe (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the SPE mode (channel 0 to 7 only) More...
void | IfxGtm_Tom_Ch_setTriggerOutput (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...
uint32 | IfxGtm_Tom_Tgc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
uint32 | IfxGtm_Tom_Tgc_buildFeatureForChannel (IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
void | IfxGtm_Tom_Tgc_enableChannel (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
void | IfxGtm_Tom_Tgc_enableChannelOutput (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
void | IfxGtm_Tom_Tgc_enableChannelUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
void | IfxGtm_Tom_Tgc_enableChannels (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
void | IfxGtm_Tom_Tgc_enableChannelsOutput (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
void | IfxGtm_Tom_Tgc_enableChannelsTrigger (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
void | IfxGtm_Tom_Tgc_enableChannelsUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
void | IfxGtm_Tom_Tgc_enableTimeTrigger (Ifx_GTM_TOM_TGC *tgc, boolean enabled)
Enable/disable the time base trigger. More...
void | IfxGtm_Tom_Tgc_resetChannels (Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
Reset one or more channels. More...
void | IfxGtm_Tom_Tgc_setChannelForceUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
void | IfxGtm_Tom_Tgc_setChannelsForceUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
void | IfxGtm_Tom_Tgc_setTimeTrigger (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
void | IfxGtm_Tom_Tgc_trigger (Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom.c.


iLLD_TC26B: IfxGtm_Tom_Pwm.c File Reference

  • Gtm
  • Tom
  • Pwm
Functions
IfxGtm_Tom_Pwm.c File Reference

GTM PWM details. More...

#include "IfxGtm_Tom_Pwm.h"
Include dependency graph for IfxGtm_Tom_Pwm.c:

Go to the source code of this file.

Functions

boolean | IfxGtm_Tom_Pwm_init (IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
Initialises the Timer object. More...
void | IfxGtm_Tom_Pwm_initConfig (IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
void | IfxGtm_Tom_Pwm_start (IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
starts the PWM generation from the configured channel More...
void | IfxGtm_Tom_Pwm_stop (IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel. More...

Detailed Description

GTM PWM details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom_Pwm.c.

Function Documentation

◆ IfxGtm_Tom_Pwm_start()

void IfxGtm_Tom_Pwm_start | ( | IfxGtm_Tom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

starts the PWM generation from the configured channel

Parameters
driver | handle for the PWM device
immediate | immediate start or not
Returns
None

Definition at line 149 of file IfxGtm_Tom_Pwm.c.

◆ IfxGtm_Tom_Pwm_stop()

void IfxGtm_Tom_Pwm_stop | ( | IfxGtm_Tom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

Stops the PWM generation from the configured channel.

Parameters
driver | handle for the PWM device
immediate | immediate start or not.
Returns
None

Definition at line 160 of file IfxGtm_Tom_Pwm.c.


iLLD_TC26B: IfxGtm_Tom_PwmHl.c File Reference

  • Gtm
  • Tom
  • PwmHl
Functions | Variables
IfxGtm_Tom_PwmHl.c File Reference

GTM PWMHL details. More...

#include "IfxGtm_Tom_PwmHl.h"
#include "_Utilities/Ifx_Assert.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxGtm_Tom_PwmHl.c:

Go to the source code of this file.

Functions

IFX_INLINE Ifx_ActiveState | IfxGtm_Tom_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateAndShiftOff (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateCenterAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateEdgeAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateOff (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updatePulse (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updatePulseOff (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateShiftCenterAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned. More...
float32 | IfxGtm_Tom_PwmHl_getDeadtime (IfxGtm_Tom_PwmHl *driver)
Returns the dead time. More...
float32 | IfxGtm_Tom_PwmHl_getMinPulse (IfxGtm_Tom_PwmHl *driver)
Returns the minimum pulse. More...
Ifx_Pwm_Mode | IfxGtm_Tom_PwmHl_getMode (IfxGtm_Tom_PwmHl *driver)
Returns Pwm mode. More...
boolean | IfxGtm_Tom_PwmHl_init (IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. Note: all PWM channels must use the same TGC Note: the current implementation must use the same TGC for the timer and PWM channels. More...
void | IfxGtm_Tom_PwmHl_initConfig (IfxGtm_Tom_PwmHl_Config *config)
Initialize the configuration structure to default. More...
boolean | IfxGtm_Tom_PwmHl_setDeadtime (IfxGtm_Tom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
boolean | IfxGtm_Tom_PwmHl_setMinPulse (IfxGtm_Tom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
boolean | IfxGtm_Tom_PwmHl_setMode (IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
void | IfxGtm_Tom_PwmHl_setOnTime (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
void | IfxGtm_Tom_PwmHl_setOnTimeAndShift (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
void | IfxGtm_Tom_PwmHl_setPulse (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
void | IfxGtm_Tom_PwmHl_setupChannels (IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
boolean | IfxGtm_Tom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Variables

IFX_STATIC IFX_CONST IfxGtm_Tom_PwmHl_Mode IfxGtm_Tom_PwmHl_modes [Ifx_Pwm_Mode_off+1]

Detailed Description

GTM PWMHL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom_PwmHl.c.

Variable Documentation

◆ IfxGtm_Tom_PwmHl_modes

IFX_STATIC IFX_CONST IfxGtm_Tom_PwmHl_Mode IfxGtm_Tom_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Initial value:
= {
{Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Tom_PwmHl_updateCenterAligned, &IfxGtm_Tom_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Tom_PwmHl_updateCenterAligned, &IfxGtm_Tom_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Tom_PwmHl_updateEdgeAligned, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Tom_PwmHl_updateEdgeAligned, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Tom_PwmHl_updateOff, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulseOff}
}
IfxGtm_Tom_PwmHl_updatePulse
IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse.
Definition: IfxGtm_Tom_PwmHl.c:587
IfxGtm_Tom_PwmHl_updateCenterAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxGtm_Tom_PwmHl.c:450
IfxGtm_Tom_PwmHl_updateAndShiftOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updateAndShiftOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF.
Definition: IfxGtm_Tom_PwmHl.c:441
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
FALSE
#define FALSE
Definition: Platform_Types.h:93
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
IfxGtm_Tom_PwmHl_updatePulseOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulseOff(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF.
Definition: IfxGtm_Tom_PwmHl.c:694
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
IfxGtm_Tom_PwmHl_updateShiftCenterAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateShiftCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned.
Definition: IfxGtm_Tom_PwmHl.c:702
IfxGtm_Tom_PwmHl_updateEdgeAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateEdgeAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxGtm_Tom_PwmHl.c:510
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Tom_PwmHl_updateOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updateOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxGtm_Tom_PwmHl.c:570

Definition at line 126 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_setMode().


iLLD_TC26B: IfxGtm_Tom_Timer.c File Reference

  • Gtm
  • Tom
  • Timer
Functions
IfxGtm_Tom_Timer.c File Reference

GTM TIMER details. More...

#include "IfxGtm_Tom_Timer.h"
#include "_Utilities/Ifx_Assert.h"
#include "IfxGtm_bf.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxGtm_Tom_Timer.c:

Go to the source code of this file.

Functions

boolean | IfxGtm_Tom_Timer_acknowledgeTimerIrq (IfxGtm_Tom_Timer *driver)
Returns the timer event. More...
boolean | IfxGtm_Tom_Timer_acknowledgeTriggerIrq (IfxGtm_Tom_Timer *driver)
Returns the trigger event. More...
void | IfxGtm_Tom_Timer_addToChannelMask (IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run. More...
void | IfxGtm_Tom_Timer_applyUpdate (IfxGtm_Tom_Timer *driver)
Enables the transfer of the shadow registers. More...
void | IfxGtm_Tom_Timer_disableUpdate (IfxGtm_Tom_Timer *driver)
Disables the upadte. More...
float32 | IfxGtm_Tom_Timer_getFrequency (IfxGtm_Tom_Timer *driver)
Returns the frequency. More...
float32 | IfxGtm_Tom_Timer_getInputFrequency (IfxGtm_Tom_Timer *driver)
Returns the Input frequncy. More...
Ifx_TimerValue | IfxGtm_Tom_Timer_getOffset (IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks. More...
Ifx_TimerValue | IfxGtm_Tom_Timer_getPeriod (IfxGtm_Tom_Timer *driver)
Returns the period of the timer. More...
volatile uint32 * | IfxGtm_Tom_Timer_getPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to timer channel. More...
float32 | IfxGtm_Tom_Timer_getResolution (IfxGtm_Tom_Timer *driver)
Returns the resolution. More...
Ifx_TimerValue | IfxGtm_Tom_Timer_getTrigger (IfxGtm_Tom_Timer *driver)
Returns the trigger point. More...
volatile uint32 * | IfxGtm_Tom_Timer_getTriggerPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to trigger channel. More...
boolean | IfxGtm_Tom_Timer_init (IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
Initialises the timer object. More...
void | IfxGtm_Tom_Timer_initConfig (IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
void | IfxGtm_Tom_Timer_run (IfxGtm_Tom_Timer *driver)
Runs the timer. More...
boolean | IfxGtm_Tom_Timer_setFrequency (IfxGtm_Tom_Timer *driver, float32 frequency)
Sets the frequency. More...
boolean | IfxGtm_Tom_Timer_setPeriod (IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
void | IfxGtm_Tom_Timer_setSingleMode (IfxGtm_Tom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
void | IfxGtm_Tom_Timer_setTrigger (IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
boolean | IfxGtm_Tom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer. More...
void | IfxGtm_Tom_Timer_stop (IfxGtm_Tom_Timer *driver)
Stops the timer. More...
void | IfxGtm_Tom_Timer_updateInputFrequency (IfxGtm_Tom_Timer *driver)
Updates the input frequency. More...

Detailed Description

GTM TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Tom_Timer.c.


iLLD_TC26B: IfxGtm_Trig.c File Reference

  • Gtm
  • Trig
Data Structures | Functions | Variables
IfxGtm_Trig.c File Reference

GTM TRIG details. More...

#include "IfxGtm_Trig.h"
#include "_Utilities/Ifx_Assert.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxGtm_Trig.c:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Trig_Channel
struct | IfxGtm_Trig_Source
struct | IfxGtm_Trig_Trigger
struct | IfxGtm_Trig_AdcTrig_Table

Functions

boolean | IfxGtm_Trig_fromDsadc (Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
void | IfxGtm_Trig_toDsadc (Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Trig_DsadcTrig dsadcTrig, IfxGtm_Trig_DsadcTrigSource sel)
boolean | IfxGtm_Trig_toVadc (Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
boolean | IfxGtm_Trig_toSent (Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)

Variables

IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc0_1_2
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc3_4
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_SentTrig_table
Trigger table for SENT triggers. More...

Detailed Description

GTM TRIG details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxGtm_Trig.c.

Variable Documentation

◆ IfxGtm_Trig_AdcTrig_tableAdc0_1_2

IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc0_1_2
Initial value:
= {
.trigger = {
{.source = {
{.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
}},
{.source = {
{.channel = { {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x09}, {.config = 0x0A}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}},
}}
}
}

Definition at line 94 of file IfxGtm_Trig.c.

Referenced by IfxGtm_Trig_toSent(), and IfxGtm_Trig_toVadc().

◆ IfxGtm_Trig_AdcTrig_tableAdc3_4

IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc3_4
Initial value:
= {
.trigger = {
{.source = {
{.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x09}, {.config = 0x0A}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
}},
{.source = {
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}},
}}
}
}

Definition at line 119 of file IfxGtm_Trig.c.

Referenced by IfxGtm_Trig_toSent(), and IfxGtm_Trig_toVadc().

◆ IfxGtm_Trig_SentTrig_table

IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_SentTrig_table
Initial value:
= {
.trigger = {
{.source = {
{.channel = { {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x00}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
}},
{.source = {
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
}}
}
}

Trigger table for SENT triggers.

Definition at line 147 of file IfxGtm_Trig.c.

Referenced by IfxGtm_Trig_toSent().


iLLD_TC26B: IfxHssl.c File Reference

  • Hssl
  • Std
Functions
IfxHssl.c File Reference

HSSL basic functionality. More...

#include "IfxHssl.h"
Include dependency graph for IfxHssl.c:

Go to the source code of this file.

Functions

void | IfxHssl_disableHsctModule (Ifx_HSCT *hsct)
Disables hsct module. More...
void | IfxHssl_disableHsslModule (Ifx_HSSL *hssl)
DIsables the hssl module. More...
void | IfxHssl_enableHsctModule (Ifx_HSCT *hsct)
Enables hsct module. More...
void | IfxHssl_enableHsslModule (Ifx_HSSL *hssl)
Enables the hssl module. More...
Ifx_HSCT * | IfxHssl_getHsctAddress (IfxHssl_hsctIndex hsct)
IfxHssl_hsctIndex | IfxHssl_getHsctIndex (Ifx_HSCT *hsct)
API to get the resource index of the HSCT specified. More...
volatile Ifx_SRC_SRCR * | IfxHssl_getHsctSrcPointer (Ifx_HSCT *hsct)
Returns the SRC pointer for HSCT. More...
Ifx_HSSL * | IfxHssl_getHsslAddress (IfxHssl_hsslIndex hssl)
volatile Ifx_SRC_SRCR * | IfxHssl_getHsslCOKSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
volatile Ifx_SRC_SRCR * | IfxHssl_getHsslERRSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL ERR of specified channel. More...
volatile Ifx_SRC_SRCR * | IfxHssl_getHsslEXISrcPointer (Ifx_HSSL *hssl)
Returns the SRC pointer for HSSL EXI interrupt. More...
IfxHssl_hsslIndex | IfxHssl_getHsslIndex (Ifx_HSSL *hssl)
API to get the resource index of the HSSL specified. More...
volatile Ifx_SRC_SRCR * | IfxHssl_getHsslRDISrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
volatile Ifx_SRC_SRCR * | IfxHssl_getHsslTRGSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL TRG of specified channel. More...
void | IfxHssl_resetHsctKernel (Ifx_HSCT *hsct)
resets HSCT kernel More...
void | IfxHssl_resetHsslKernel (Ifx_HSSL *hssl)
resets the HSSL kernel More...

Detailed Description

HSSL basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxHssl.c.


iLLD_TC26B: IfxHssl_cfg.c File Reference

  • _Impl
Variables
IfxHssl_cfg.c File Reference

HSSL on-chip implementation data. More...

#include "IfxHssl_cfg.h"
Include dependency graph for IfxHssl_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap [IFXHSSL_NUM_MODULES]
IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap [IFXHSSL_NUM_MODULES]

Detailed Description

HSSL on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxHssl_cfg.c.

Variable Documentation

◆ IfxHssl_cfg_hsctIndexMap

IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES]
Initial value:
= {
{&MODULE_HSCT, (uint32)IfxHssl_hsctIndex_0}
}
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxHssl_hsctIndex_0
HSCT index 0.
Definition: IfxHssl_cfg.h:83

Definition at line 52 of file IfxHssl_cfg.c.

Referenced by IfxHssl_getHsctAddress(), and IfxHssl_getHsctIndex().

◆ IfxHssl_cfg_hsslIndexMap

IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES]
Initial value:
= {
{&MODULE_HSSL, (uint32)IfxHssl_hsslIndex_0}
}
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxHssl_hsslIndex_0
HSSL index 0.
Definition: IfxHssl_cfg.h:91

Definition at line 56 of file IfxHssl_cfg.c.

Referenced by IfxHssl_getHsslAddress(), and IfxHssl_getHsslIndex().


iLLD_TC26B: IfxHssl_Hssl.c File Reference

  • Hssl
  • Hssl
Functions
IfxHssl_Hssl.c File Reference

HSSL HSSL details. More...

#include "IfxHssl_Hssl.h"
Include dependency graph for IfxHssl_Hssl.c:

Go to the source code of this file.

Functions

void | IfxHssl_Hssl_checkErrors (IfxHssl_Hssl *hssl)
stores the status of errors in the respective members of the error flags structure More...
void | IfxHssl_Hssl_clearErrorFlags (IfxHssl_Hssl *hssl)
clears the status of members in the error flags structure More...
void | IfxHssl_Hssl_delay (IfxHssl_Hsct *hsct)
a simple software delay More...
void | IfxHssl_Hssl_initChannel (IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
Initialises the channel. More...
void | IfxHssl_Hssl_initChannelConfig (IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
Fills the channel config structure with default values. More...
void | IfxHssl_Hssl_initHsctModule (IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
Initialises the module. More...
void | IfxHssl_Hssl_initHsctModuleConfig (IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
Fills the config structure with default values. More...
void | IfxHssl_Hssl_initHsslModule (IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
Initialises the Hssl module. More...
void | IfxHssl_Hssl_initHsslModuleConfig (IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
Fills the config structure with default values. More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_prepareStream (IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
Prepares the target device for streaming. More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_read (IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
Initiates read request. More...
void | IfxHssl_Hssl_sendControlCommand (IfxHssl_Hsct *hsct, uint8 command)
sends a predefined command from master to slave More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_singleFrameRequest (IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
serves the frame request (read, write, trigger frame and read id) More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_waitAcknowledge (IfxHssl_Hssl_Channel *channel)
waits until the current transaction is done More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_write (IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
writes single frame of data into the specified address More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_writeStream (IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
transfers one memory block of data useful for transfering huge data from one location to another and between devices. NOTE: This function should be called only for IfxHssl_ChannelId_2 More...

Detailed Description

HSSL HSSL details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxHssl_Hssl.c.


iLLD_TC26B: IfxI2c.c File Reference

  • I2c
  • Std
Functions
IfxI2c.c File Reference

I2C basic functionality. More...

#include "IfxI2c.h"
Include dependency graph for IfxI2c.c:

Go to the source code of this file.

Functions

void | IfxI2c_configureAsMaster (Ifx_I2C *i2c)
Configures the Module as Master. More...
void | IfxI2c_disableModule (Ifx_I2C *i2c)
Disables the I2c Module. More...
void | IfxI2c_enableBurstDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Burst data transfer interrupt. More...
void | IfxI2c_enableErrorInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Error interrupt. More...
void | IfxI2c_enableLastBurstDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last burst data transfer interrupt More...
void | IfxI2c_enableLastSingleDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last single data transfer interrupt More...
void | IfxI2c_enableModule (Ifx_I2C *i2c)
Enables the I2c Module. More...
void | IfxI2c_enableProtocolInterrupt (void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the protocol interrupt. More...
void | IfxI2c_enableSingleDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the single data transfer interrupt More...
Ifx_I2C * | IfxI2c_getAddress (IfxI2c_Index i2c)
float32 | IfxI2c_getBaudrate (Ifx_I2C *i2c)
Returns the real Baudrate. More...
IfxI2c_Index | IfxI2c_getIndex (Ifx_I2C *i2c)
API to get the resource index of the I2C specified. More...
void | IfxI2c_initSclSdaPin (const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
void | IfxI2c_releaseBus (Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus. More...
void | IfxI2c_resetFifo (Ifx_I2C *i2c)
void | IfxI2c_resetModule (Ifx_I2C *i2c)
resets the I2c kernel More...
void | IfxI2c_setBaudrate (Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate. More...

Detailed Description

I2C basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxI2c.c.


iLLD_TC26B: IfxI2c_cfg.c File Reference

  • _Impl
Variables
IfxI2c_cfg.c File Reference

I2C on-chip implementation data. More...

#include "IfxI2c_cfg.h"
Include dependency graph for IfxI2c_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap [IFXI2C_NUM_MODULES]

Detailed Description

I2C on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxI2c_cfg.c.

Variable Documentation

◆ IfxI2c_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES]
Initial value:
= {
{&MODULE_I2C0, (uint32)IfxI2c_Index_0}
}
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxI2c_Index_0
I2C Index 0.
Definition: IfxI2c_cfg.h:80

Definition at line 54 of file IfxI2c_cfg.c.

Referenced by IfxI2c_getAddress(), and IfxI2c_getIndex().


iLLD_TC26B: IfxI2c_I2c.c File Reference

  • I2c
  • I2c
Functions
IfxI2c_I2c.c File Reference

I2C I2C details. More...

#include "IfxI2c_I2c.h"
Include dependency graph for IfxI2c_I2c.c:

Go to the source code of this file.

Functions

void | IfxI2c_I2c_initConfig (IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
Fills the config structure with default values. More...
void | IfxI2c_I2c_initDevice (IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
Initializes the device Handler. More...
void | IfxI2c_I2c_initDeviceConfig (IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
Fills the config structure of the slave device with default values. More...
void | IfxI2c_I2c_initModule (IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
Initializes the Module. More...
IfxI2c_I2c_Status | IfxI2c_I2c_read (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
reads the I2c device More...
IfxI2c_I2c_Status | IfxI2c_I2c_write (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
writes to the I2c device More...

Detailed Description

I2C I2C details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxI2c_I2c.c.


iLLD_TC26B: IfxIom.c File Reference

  • Iom
  • Std
Functions
IfxIom.c File Reference

IOM basic functionality. More...

#include "IfxIom.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxIom.c:

Go to the source code of this file.

Functions

float32 | IfxIom_getFrequency (Ifx_IOM *iom)
Return the frequency used for the filter and timers clock. More...
void | IfxIom_resetModule (Ifx_IOM *iom)
Reset the IOM module. More...

Detailed Description

IOM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxIom.c.


iLLD_TC26B: IfxIom_Driver.c File Reference

  • Iom
  • Driver
Macros | Functions
IfxIom_Driver.c File Reference

IOM DRIVER details. More...

#include "IfxIom_Driver.h"
#include "IfxIom_bf.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxIom_Driver.c:

Go to the source code of this file.

Macros

#define | IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL(refInput) ((IfxIom_RefInputSignal)((refInput >> 8) & 0xFF))
#define | IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL(monInput) ((IfxIom_MonInputSignal)((monInput >> 8) & 0xFF))
#define | IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(refInput) ((refInput >> 0) & 0xFF)
#define | IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(monInput) ((monInput >> 0) & 0xFF)

Functions

void | IfxIom_Driver_clearAllGlitch (IfxIom_Driver *driver)
Clear all LAM monitor and reference glitch flags. More...
void | IfxIom_Driver_clearHistory (IfxIom_Driver *driver)
Clear the IOM event history. More...
void | IfxIom_Driver_clearLamMonGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM monitor signal glitch flag. More...
void | IfxIom_Driver_clearLamRefGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM reference signal glitch flag. More...
uint32 | IfxIom_Driver_disableEvents (IfxIom_Driver *driver)
Disable all event generation. More...
void | IfxIom_Driver_disableLamEvent (IfxIom_Driver_Lam *driver)
Disable the event generation for the LAM. More...
void | IfxIom_Driver_enableLamEvent (IfxIom_Driver_Lam *driver)
Enable the event genration for the LAM. More...
void | IfxIom_Driver_getHistory (IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ... More...
boolean | IfxIom_Driver_init (IfxIom_Driver *driver, IfxIom_Driver_Config *config)
Initialize the IOM Must be called before IfxIom_Driver_initLam() More...
void | IfxIom_Driver_initConfig (IfxIom_Driver_Config *config, Ifx_IOM *module)
Set the IOM default configuration. More...
boolean | IfxIom_Driver_initLam (IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
Initialize the LAM channel. More...
void | IfxIom_Driver_initLamConfig (IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
Set the LAM default configuration. More...
void | IfxIom_Driver_isLamMonGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM monitor glitch flags. More...
void | IfxIom_Driver_isLamRefGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM reference glitch flags. More...
void | IfxIom_Driver_restoreEvents (IfxIom_Driver *driver, uint32 mask)
Restore the IOM event mask. More...

Detailed Description

IOM DRIVER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxIom_Driver.c.

Macro Definition Documentation

◆ IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX

#define IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX ( monInput ) ((monInput >> 0) & 0xFF)

Definition at line 60 of file IfxIom_Driver.c.

Referenced by IfxIom_Driver_initLam().

◆ IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL

#define IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL ( monInput ) ((IfxIom_MonInputSignal)((monInput >> 8) & 0xFF))

Definition at line 56 of file IfxIom_Driver.c.

Referenced by IfxIom_Driver_initLam().

◆ IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX

#define IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX ( refInput ) ((refInput >> 0) & 0xFF)

Definition at line 58 of file IfxIom_Driver.c.

Referenced by IfxIom_Driver_initLam().

◆ IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL

#define IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL ( refInput ) ((IfxIom_RefInputSignal)((refInput >> 8) & 0xFF))

Definition at line 54 of file IfxIom_Driver.c.

Referenced by IfxIom_Driver_initLam().


iLLD_TC26B: IfxLldVersion.h File Reference

Macros
IfxLldVersion.h File Reference

Go to the source code of this file.

Macros

#define | IFX_LLD_VERSION_GENERATION 1
Indicates the driver generation. More...
#define | IFX_LLD_VERSION_MAJOR 0
Informs about changes which could lead to incompatibilities. More...
#define | IFX_LLD_VERSION_MAJOR_UPDATE 1
Informs about a release for a new derivative without further API changes. More...
#define | IFX_LLD_VERSION_MINOR 12
Informs about new additions to the library. More...
#define | IFX_LLD_VERSION_REVISION 0
Informs about patches and/or documentation changes. More...

Macro Definition Documentation

◆ IFX_LLD_VERSION_GENERATION

#define IFX_LLD_VERSION_GENERATION 1

Indicates the driver generation.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition at line 43 of file IfxLldVersion.h.

◆ IFX_LLD_VERSION_MAJOR

#define IFX_LLD_VERSION_MAJOR 0

Informs about changes which could lead to incompatibilities.

Definition at line 44 of file IfxLldVersion.h.

◆ IFX_LLD_VERSION_MAJOR_UPDATE

#define IFX_LLD_VERSION_MAJOR_UPDATE 1

Informs about a release for a new derivative without further API changes.

Definition at line 45 of file IfxLldVersion.h.

◆ IFX_LLD_VERSION_MINOR

#define IFX_LLD_VERSION_MINOR 12

Informs about new additions to the library.

Definition at line 46 of file IfxLldVersion.h.

◆ IFX_LLD_VERSION_REVISION

#define IFX_LLD_VERSION_REVISION 0

Informs about patches and/or documentation changes.

Definition at line 47 of file IfxLldVersion.h.


iLLD_TC26B: IfxMsc.c File Reference

  • Msc
  • Std
Functions
IfxMsc.c File Reference

MSC basic functionality. More...

#include "IfxMsc.h"
Include dependency graph for IfxMsc.c:

Go to the source code of this file.

Functions

void | IfxMsc_clearDataFrameInterruptFlag (Ifx_MSC *msc)
clear data frame interrupt flag More...
void | IfxMsc_clearReset (Ifx_MSC *msc)
Clear reset bit of MSC kernel. More...
void | IfxMsc_disableModule (Ifx_MSC *msc)
Disable MSC kernel. More...
uint32 | IfxMsc_downstreamAbraBaudCalculator (uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled. More...
uint64 | IfxMsc_downstreamFractionalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional for downstream. More...
uint32 | IfxMsc_downstreamNormalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal for downstream. More...
void | IfxMsc_enableModule (Ifx_MSC *msc)
Enable MSC kernel. More...
boolean | IfxMsc_getActiveDataFrameStatus (Ifx_MSC *msc)
get the status of the active data frame More...
Ifx_MSC * | IfxMsc_getAddress (IfxMsc_Index msc)
boolean | IfxMsc_getDataFrameInterruptFlag (Ifx_MSC *msc)
get the status of the data frame interrupt flag More...
IfxMsc_Index | IfxMsc_getIndex (Ifx_MSC *msc)
API to get the resource index of the MSC specified. More...
void | IfxMsc_resetModule (Ifx_MSC *msc)
Reset MSC kernel. More...
uint64 | IfxMsc_upstreamFractionalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional. More...
uint32 | IfxMsc_upstreamNormalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal. More...

Detailed Description

MSC basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMsc.c.

Function Documentation

◆ IfxMsc_clearDataFrameInterruptFlag()

void IfxMsc_clearDataFrameInterruptFlag ( Ifx_MSC * msc )

clear data frame interrupt flag

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 54 of file IfxMsc.c.

Referenced by IfxMsc_Msc_clearDataFrameInterrupt().

◆ IfxMsc_downstreamFractionalBaudCalculator()

uint64 IfxMsc_downstreamFractionalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is fractional for downstream.

Parameters
msc | pointer to the base of MSC registers
baud | Required baud rate
Returns
Step Value

Definition at line 99 of file IfxMsc.c.

◆ IfxMsc_downstreamNormalBaudCalculator()

uint32 IfxMsc_downstreamNormalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is normal for downstream.

Parameters
msc | Select DataType Ref
baud | Required baud rate
Returns
Step value

Definition at line 112 of file IfxMsc.c.

◆ IfxMsc_getActiveDataFrameStatus()

boolean IfxMsc_getActiveDataFrameStatus ( Ifx_MSC * msc )

get the status of the active data frame

Parameters
msc pointer to the base of MSC registers
Returns
Status TRUE or FALSE

Definition at line 134 of file IfxMsc.c.

Referenced by IfxMsc_Msc_getActiveDataFrameStatus().

◆ IfxMsc_getDataFrameInterruptFlag()

boolean IfxMsc_getDataFrameInterruptFlag ( Ifx_MSC * msc )

get the status of the data frame interrupt flag

Parameters
msc pointer to the base of MSC registers
Returns
Status TRUE or FALSE

Definition at line 157 of file IfxMsc.c.

Referenced by IfxMsc_Msc_getDataFrameInterruptStatus().


iLLD_TC26B: IfxMsc_cfg.c File Reference

  • _Impl
Variables
IfxMsc_cfg.c File Reference

MSC on-chip implementation data. More...

#include "IfxMsc_cfg.h"
Include dependency graph for IfxMsc_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap [IFXMSC_NUM_MODULES]

Detailed Description

MSC on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMsc_cfg.c.

Variable Documentation

◆ IfxMsc_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES]
Initial value:
= {
{&MODULE_MSC0, IfxMsc_Index_0},
{&MODULE_MSC1, IfxMsc_Index_1}
}
IfxMsc_Index_0
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:82
IfxMsc_Index_1
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:83

Definition at line 54 of file IfxMsc_cfg.c.

Referenced by IfxMsc_getAddress(), and IfxMsc_getIndex().


iLLD_TC26B: IfxMsc_Msc.c File Reference

  • Msc
  • Msc
Functions
IfxMsc_Msc.c File Reference

MSC MSC details. More...

#include "IfxMsc_Msc.h"
Include dependency graph for IfxMsc_Msc.c:

Go to the source code of this file.

Functions

void | IfxMsc_Msc_deInitModule (IfxMsc_Msc *msc)
de-initialize MSC module More...
IfxMsc_Target | IfxMsc_Msc_getTarget (IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
get the target during high and low phase More...
void | IfxMsc_Msc_initModule (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC module More...
void | IfxMsc_Msc_initModuleConfig (IfxMsc_Msc_Config *config, Ifx_MSC *msc)
initialize the MSC module configuration More...
void | IfxMsc_Msc_initializeAbra (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the ABRA block More...
void | IfxMsc_Msc_initializeDataExtension (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC data extension block for 64bit operation More...
uint32 | IfxMsc_Msc_receiveData (IfxMsc_Msc *msc, uint8 upstreamIdx)
receive upstream data More...
void | IfxMsc_Msc_sendCommand (IfxMsc_Msc *msc, uint32 command)
send downstream command More...
void | IfxMsc_Msc_sendData (IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
send complete downstream data, both high and low More...
void | IfxMsc_Msc_sendDataExtension (IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
Send downstream data extension (64bit) More...
void | IfxMsc_Msc_sendDataHigh (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...
void | IfxMsc_Msc_sendDataLow (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...
void | IfxMsc_Msc_setCommandTarget (IfxMsc_Msc *msc, IfxMsc_Target enX)
set the command for target More...
void | IfxMsc_Msc_setDataTarget (IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
set the target data to be transmitted during low and high phase More...

Detailed Description

MSC MSC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMsc_Msc.c.


iLLD_TC26B: IfxMtu.c File Reference

  • Mtu
  • Std
Functions
IfxMtu.c File Reference

MTU basic functionality. More...

#include "IfxMtu.h"
Include dependency graph for IfxMtu.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxMtu_waitForMbistDone (uint32 towerDepth, uint8 numInstructions, IfxMtu_MbistSel mbistSel)
API to wait for requested tower depth. More...
void | IfxMtu_clearErrorTracking (IfxMtu_MbistSel mbistSel)
Clears the error tracking registers (ETRR), valid and overflow bits. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005). More...
void | IfxMtu_clearSram (IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. More...
void | IfxMtu_clearSramContinue (IfxMtu_MbistSel mbistSel)
This Function should be called after MBIST Clear SRAM operation is completed. Note: The function should be called with safety endinit bit cleared. More...
void | IfxMtu_clearSramStart (IfxMtu_MbistSel mbistSel)
This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn't wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared. More...
void | IfxMtu_enableErrorTracking (IfxMtu_MbistSel mbistSel, boolean enable)
Enables the tracking of SRAM errors. More...
uint32 | IfxMtu_getSystemAddress (IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR trackedSramAddress)
Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (SRAM address and block) More...
uint8 | IfxMtu_getTrackedSramAddresses (IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR *trackedSramAddresses)
Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registers. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005). More...
void | IfxMtu_readSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)
uint8 | IfxMtu_runNonDestructiveInversionTest (IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can be considered as a simple linear test that is able to find all Stuck-At faults (the cell remains stuck at a value for any operation) without destroying any user data. The test accesses every Word in the address range defined by the RANGE register, four times. Test Steps: More...
void | IfxMtu_writeSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)

Detailed Description

MTU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMtu.c.


iLLD_TC26B: IfxMtu_cfg.c File Reference

  • _Impl
Variables
IfxMtu_cfg.c File Reference

Mtu on-chip implementation data. More...

#include "IfxMtu_cfg.h"
#include "Mtu/Std/IfxMtu.h"
Include dependency graph for IfxMtu_cfg.c:

Go to the source code of this file.

Variables

const IfxMtu_SramItem IfxMtu_sramTable [IFXMTU_NUM_MBIST_TABLE_ITEMS]

Detailed Description

Mtu on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMtu_cfg.c.

Variable Documentation

◆ IfxMtu_sramTable

const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS]

Definition at line 53 of file IfxMtu_cfg.c.

Referenced by IfxMtu_clearSram(), IfxMtu_clearSramStart(), IfxMtu_runNonDestructiveInversionTest(), and IfxMtu_writeSramAddress().


iLLD_TC26B: IfxMultican.c File Reference

  • Multican
  • Std
Functions
IfxMultican.c File Reference

MULTICAN basic functionality. More...

#include "IfxMultican.h"
Include dependency graph for IfxMultican.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxMultican_MsgObj_doReadLongFrame (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Do actual long frame reading from the message object. More...
IFX_STATIC void | IfxMultican_MsgObj_doReadMessage (Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
Do actual message reading from the message object. More...
boolean | IfxMultican_MsgObj_cancelSend (Ifx_CAN_MO *hwObj)
Cancel pending TX request by invalidating the request, only when frame transmission has not been started. More...
void | IfxMultican_MsgObj_clearStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Clears the selected status flag of a message object. More...
void | IfxMultican_MsgObj_deinit (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Reset the message object
Append the message object to the end of idle list and reset message object registers. More...
IfxMultican_MsgObjId | IfxMultican_MsgObj_getPendingId (Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group. More...
IfxMultican_MsgObjStat | IfxMultican_MsgObj_getStatus (Ifx_CAN_MO *hwObj)
Get the message object status. More...
boolean | IfxMultican_MsgObj_getStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Gets the status of the selected status flag of a message object. More...
IfxMultican_Status | IfxMultican_MsgObj_readLongFrame (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Read a received CAN long frame. More...
IfxMultican_Status | IfxMultican_MsgObj_readMessage (Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
Read a received CAN message. More...
IfxMultican_Status | IfxMultican_MsgObj_sendLongFrame (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Send a CAN Long frame message. More...
IfxMultican_Status | IfxMultican_MsgObj_sendMessage (Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message. More...
IfxMultican_Status | IfxMultican_MsgObj_writeTxfifo (Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message. More...
void | IfxMultican_MsgObj_setFilter (Ifx_CAN_MO *hwObj, boolean extend, uint32 id, uint32 accMask)
Set message object filter. More...
void | IfxMultican_MsgObj_setStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Sets the selected status flag of a message object. More...
void | IfxMultican_Node_deinit (Ifx_CAN_N *hwNode)
Reset the CAN node. More...
boolean | IfxMultican_Node_initRxPin (Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin. More...
boolean | IfxMultican_Node_initTxPin (Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin. More...
IfxMultican_Status | IfxMultican_Node_recoverBusOff (Ifx_CAN_N *hwNode)
Recovers the CAN node from bus off. More...
void | IfxMultican_Node_setBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTR register. More...
void | IfxMultican_Node_setFastBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures FBTR register. More...
void | IfxMultican_Node_setNominalBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTEVR register. More...
void | IfxMultican_calcTimingFromBTR (float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth)
Returns the CAN node timing. More...
void | IfxMultican_deinit (Ifx_CAN *mcan)
Reset the CAN module
Reset and disable the CAN module, inclusive message object and node registers. More...
volatile Ifx_SRC_SRCR * | IfxMultican_getSrcPointer (Ifx_CAN *mcan, IfxMultican_SrcId srcId)
Get the interrupt source register. More...
void | IfxMultican_resetModule (Ifx_CAN *can)
resets Multican kernel More...
void | IfxMultican_setListCommand (Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1)
Execute a command from the command panel. More...
IfxMultican_Index | IfxMultican_getIndex (Ifx_CAN *multican)
API to get the resource index of the CAN specified. More...
Ifx_CAN * | IfxMultican_getAddress (IfxMultican_Index multican)

Detailed Description

MULTICAN basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMultican.c.

Function Documentation

◆ IfxMultican_MsgObj_doReadLongFrame()

IFX_STATIC void IfxMultican_MsgObj_doReadLongFrame | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_MsgObjId | msgObjId,
 |  | IfxMultican_Message * | msg,
 |  | uint32 * | data
 | ) |  |

Do actual long frame reading from the message object.

Parameters
mcan | Specifies the CAN module
msgObjId | Specifies the message object index. Range = [0, IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
msg | This parameter is filled in by the function with the received message. Also when reading is not successful.
data | Pointer to data (in words)
Returns
None

Definition at line 121 of file IfxMultican.c.

Referenced by IfxMultican_MsgObj_readLongFrame().

◆ IfxMultican_MsgObj_doReadMessage()

IFX_STATIC void IfxMultican_MsgObj_doReadMessage | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_Message * | msg
 | ) |  |

Do actual message reading from the message object.

Parameters
hwObj | Pointer to CAN message object registers
msg | This parameter is filled in by the function with the received message. Also when reading is not successful.
Returns
None

Definition at line 197 of file IfxMultican.c.

Referenced by IfxMultican_MsgObj_readMessage().


iLLD_TC26B: IfxMultican_Can.c File Reference

  • Multican
  • Can
Functions
IfxMultican_Can.c File Reference

MULTICAN CAN details. More...

#include "IfxMultican_Can.h"
Include dependency graph for IfxMultican_Can.c:

Go to the source code of this file.

Functions

void | IfxMultican_Can_MsgObj_getConfig (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Can_MsgObjConfig *config)
Get the actual message object configuration. More...
IfxMultican_Status | IfxMultican_Can_MsgObj_init (IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Can_MsgObjConfig *config)
Initialize the message object. More...
void | IfxMultican_Can_MsgObj_initConfig (IfxMultican_Can_MsgObjConfig *config, IfxMultican_Can_Node *node)
Initialise message config with default values and the given parameters. More...
boolean | IfxMultican_Can_MsgObj_isRxPending (IfxMultican_Can_MsgObj *msgObj)
Returns the RX pending flag of a message object. More...
boolean | IfxMultican_Can_MsgObj_isTransmitRequested (IfxMultican_Can_MsgObj *msgObj)
Returns the TX Request flag of a message object. More...
boolean | IfxMultican_Can_MsgObj_isTxPending (IfxMultican_Can_MsgObj *msgObj)
Returns the TX pending flag of a message object. More...
IfxMultican_Status | IfxMultican_Can_MsgObj_readMessage (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg)
Read a received CAN message. More...
IfxMultican_Status | IfxMultican_Can_MsgObj_sendMessage (IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Message *msg)
Send a CAN message. More...
void | IfxMultican_Can_Node_getConfig (IfxMultican_Can_Node *node, IfxMultican_Can_NodeConfig *config)
Get the actual message object configuration. More...
IfxMultican_Status | IfxMultican_Can_Node_init (IfxMultican_Can_Node *node, const IfxMultican_Can_NodeConfig *config)
Initialize the CAN node. More...
void | IfxMultican_Can_Node_initConfig (IfxMultican_Can_NodeConfig *config, IfxMultican_Can *mcan)
Get default CAN node configuration. More...
void | IfxMultican_Can_Node_sendToBusOff (IfxMultican_Can_Node *node)
Sends the CAN node into bus off. More...
void | IfxMultican_Can_getConfig (IfxMultican_Can *mcan, IfxMultican_Can_Config *config)
Return the actual CAN module configuration. More...
float32 | IfxMultican_Can_getModuleFrequency (IfxMultican_Can *mcan)
Get the module frequency. More...
IfxMultican_Status | IfxMultican_Can_initModule (IfxMultican_Can *mcan, const IfxMultican_Can_Config *config)
Initialize the CAN module
The following configuration is used:
. More...
void | IfxMultican_Can_initModuleConfig (IfxMultican_Can_Config *config, Ifx_CAN *mcan)
Return the default MULTICAN configuration. More...

Detailed Description

MULTICAN CAN details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMultican_Can.c.


iLLD_TC26B: IfxMultican_cfg.c File Reference

  • _Impl
Variables
IfxMultican_cfg.c File Reference

MULTICAN on-chip implementation data. More...

#include "IfxMultican_cfg.h"
Include dependency graph for IfxMultican_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap [IFXMULTICAN_NUM_MODULES]

Detailed Description

MULTICAN on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxMultican_cfg.c.

Variable Documentation

◆ IfxMultican_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap[IFXMULTICAN_NUM_MODULES]
Initial value:
= {
{&MODULE_CAN, (uint32)IfxMultican_Index_0}
}
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxMultican_Index_0
MULTICAN index 0.
Definition: IfxMultican_cfg.h:92

Definition at line 52 of file IfxMultican_cfg.c.

Referenced by IfxMultican_getAddress(), and IfxMultican_getIndex().


iLLD_TC26B: IfxPort.c File Reference

  • Port
  • Std
Functions
IfxPort.c File Reference

PORT basic functionality. More...

#include "IfxPort.h"
Include dependency graph for IfxPort.c:

Go to the source code of this file.

Functions

boolean | IfxPort_disableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality. More...
boolean | IfxPort_enableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality. More...
Ifx_P * | IfxPort_getAddress (IfxPort_Index port)
Returns the module address of the selected Port module. More...
IfxPort_Index | IfxPort_getIndex (Ifx_P *port)
Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c) More...
void | IfxPort_resetESR (Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality. More...
void | IfxPort_setESR (Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality. More...
void | IfxPort_setGroupModeInput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
Set pin modes to input at the pin location specified by '1' by the mask. More...
void | IfxPort_setGroupModeOutput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Set pin modes to output at the pin location specified by '1' by the mask starting at pinIndex. More...
void | IfxPort_setGroupPadDriver (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
Set pad driver strength at the pin location specified by '1' by the mask. More...
void | IfxPort_setPinMode (Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality which bydefault support analog functionality. More...
void | IfxPort_setPinModeLvdsHigh (Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode, IfxPort_ControlledBy enablePortControlled)
set LVDSH mode (configured for Port21) More...
void | IfxPort_setPinModeLvdsMedium (Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver lvdsPadDriver, IfxPort_PadSupply padSupply)
set LVDSM mode More...
void | IfxPort_setPinPadDriver (Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode. More...

Detailed Description

PORT basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPort.c.

Function Documentation

◆ IfxPort_resetESR()

void IfxPort_resetESR | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be disabled.
Returns
None
See also
IfxPort_disableEmergencyStop()

Definition at line 135 of file IfxPort.c.

Referenced by IfxPort_disableEmergencyStop().

◆ IfxPort_setESR()

void IfxPort_setESR | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be enabled.
Returns
None
See also
IfxPort_enableEmergencyStop()

Definition at line 145 of file IfxPort.c.

Referenced by IfxPort_enableEmergencyStop().


iLLD_TC26B: IfxPort_cfg.c File Reference

  • _Impl
Variables
IfxPort_cfg.c File Reference

PORT on-chip implementation data. More...

#include "IfxPort_cfg.h"
Include dependency graph for IfxPort_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks [IFXPORT_NUM_MODULES]
IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap [IFXPORT_NUM_MODULES]

Detailed Description

PORT on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPort_cfg.c.

Variable Documentation

◆ IfxPort_cfg_esrMasks

IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES]
Initial value:
= {
{&MODULE_P00, 0x0000FFFFUL},
{&MODULE_P02, 0x0000FFFFUL},
{&MODULE_P10, 0x0000FFFFUL},
{&MODULE_P11, 0x0000FFFFUL},
{&MODULE_P13, 0x0000FFFFUL},
{&MODULE_P14, 0x0000FFFFUL},
{&MODULE_P15, 0x0000FFFFUL},
{&MODULE_P20, 0x0000FFFFUL},
{&MODULE_P21, 0x0000FFFFUL},
{&MODULE_P22, 0x0000FFFFUL},
{&MODULE_P23, 0x0000FFFFUL},
{&MODULE_P32, 0x0000FFFFUL},
{&MODULE_P33, 0x0000FFFFUL},
}

Definition at line 53 of file IfxPort_cfg.c.

Referenced by IfxPort_disableEmergencyStop(), and IfxPort_enableEmergencyStop().

◆ IfxPort_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES]
Initial value:
= {
{&MODULE_P00, IfxPort_Index_00},
{&MODULE_P02, IfxPort_Index_02},
{&MODULE_P10, IfxPort_Index_10},
{&MODULE_P11, IfxPort_Index_11},
{&MODULE_P13, IfxPort_Index_13},
{&MODULE_P14, IfxPort_Index_14},
{&MODULE_P15, IfxPort_Index_15},
{&MODULE_P20, IfxPort_Index_20},
{&MODULE_P21, IfxPort_Index_21},
{&MODULE_P22, IfxPort_Index_22},
{&MODULE_P23, IfxPort_Index_23},
{&MODULE_P32, IfxPort_Index_32},
{&MODULE_P33, IfxPort_Index_33}
}
IfxPort_Index_13
PORT 13.
Definition: IfxPort_cfg.h:82
IfxPort_Index_10
PORT 10.
Definition: IfxPort_cfg.h:80
IfxPort_Index_00
PORT 00.
Definition: IfxPort_cfg.h:78
IfxPort_Index_23
PORT 23.
Definition: IfxPort_cfg.h:88
IfxPort_Index_33
PORT 33.
Definition: IfxPort_cfg.h:90
IfxPort_Index_21
PORT 21.
Definition: IfxPort_cfg.h:86
IfxPort_Index_15
PORT 15.
Definition: IfxPort_cfg.h:84
IfxPort_Index_14
PORT 14.
Definition: IfxPort_cfg.h:83
IfxPort_Index_20
PORT 20.
Definition: IfxPort_cfg.h:85
IfxPort_Index_32
PORT 32.
Definition: IfxPort_cfg.h:89
IfxPort_Index_22
PORT 22.
Definition: IfxPort_cfg.h:87
IfxPort_Index_02
PORT 02.
Definition: IfxPort_cfg.h:79
IfxPort_Index_11
PORT 11.
Definition: IfxPort_cfg.h:81

Definition at line 70 of file IfxPort_cfg.c.

Referenced by IfxPort_getAddress(), and IfxPort_getIndex().


iLLD_TC26B: IfxPort_Io.c File Reference

  • Port
  • Io
Functions
IfxPort_Io.c File Reference

PORT IO details. More...

#include "IfxPort_Io.h"
Include dependency graph for IfxPort_Io.c:

Go to the source code of this file.

Functions

void IfxPort_Io_initModule (const IfxPort_Io_Config *config)

Detailed Description

PORT IO details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPort_Io.c.


iLLD_TC26B: IfxPsi5.c File Reference

  • Psi5
  • Std
Functions
IfxPsi5.c File Reference

PSI5 basic functionality. More...

#include "IfxPsi5.h"
Include dependency graph for IfxPsi5.c:

Go to the source code of this file.

Functions

void | IfxPsi5_disableModule (Ifx_PSI5 *psi5)
Disable PSI5 kernel. More...
void | IfxPsi5_resetModule (Ifx_PSI5 *psi5)
resets PSI5 kernel More...
void | IfxPsi5_enableModule (Ifx_PSI5 *psi5)

Detailed Description

PSI5 basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5.c.

Function Documentation

◆ IfxPsi5_enableModule()

void IfxPsi5_enableModule ( Ifx_PSI5 * psi5 )
Returns
None

Definition at line 81 of file IfxPsi5.c.


iLLD_TC26B: IfxPsi5_cfg.c File Reference

  • _Impl
IfxPsi5_cfg.c File Reference

PSI5 on-chip implementation data. More...

#include "IfxPsi5_cfg.h"
Include dependency graph for IfxPsi5_cfg.c:

Go to the source code of this file.

Detailed Description

PSI5 on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5_cfg.c.


iLLD_TC26B: IfxPsi5_Psi5.c File Reference

  • Psi5
  • Psi5
Functions
IfxPsi5_Psi5.c File Reference

PSI5 PSI5 details. More...

#include "IfxPsi5_Psi5.h"
Include dependency graph for IfxPsi5_Psi5.c:

Go to the source code of this file.

Functions

void | IfxPsi5_Psi5_deInitModule (IfxPsi5_Psi5 *psi5)
Resets the PSI5 module. More...
void | IfxPsi5_Psi5_enableModule (Ifx_PSI5 *psi5)
Enable PSI5 kernel. More...
uint32 | IfxPsi5_Psi5_getFracDivClock (Ifx_PSI5 *psi5)
Returns the configured fracDiv psi5 clock frequency in Hz. More...
boolean | IfxPsi5_Psi5_initChannel (IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
void | IfxPsi5_Psi5_initChannelConfig (IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
Get the current channel configuration (e.g. sample settings) More...
boolean | IfxPsi5_Psi5_initModule (IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
Initialise the PSI5 with the supplied configureation. More...
void | IfxPsi5_Psi5_initModuleConfig (IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
Initialise buffer with default PSI5 configuration. More...
uint32 | IfxPsi5_Psi5_initializeClock (Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
Configure the fracDiv clock. More...
boolean | IfxPsi5_Psi5_readChannelFrame (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
Gets the received psi5 frame for the channel. More...
boolean | IfxPsi5_Psi5_readChannelSerialMessage (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
Get the received serial message for the channel. More...
void | IfxPsi5_Psi5_resetModule (Ifx_PSI5 *psi5)
Reset PSI5 kernel. More...
boolean | IfxPsi5_Psi5_sendChannelData (IfxPsi5_Psi5_Channel *channel, uint64 data)
Transmit the data through the channel. More...

Detailed Description

PSI5 PSI5 details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5_Psi5.c.


iLLD_TC26B: IfxPsi5s.c File Reference

  • Psi5s
  • Std
Functions
IfxPsi5s.c File Reference

PSI5S basic functionality. More...

#include "IfxPsi5s.h"
Include dependency graph for IfxPsi5s.c:

Go to the source code of this file.

Functions

void | IfxPsi5s_disableAscReceiver (Ifx_PSI5S *psi5s)
Asc receiver is disabled. More...
void | IfxPsi5s_disableModule (Ifx_PSI5S *psi5s)
Disable PSI5S kernel. More...
void | IfxPsi5s_enableAscReceiver (Ifx_PSI5S *psi5s)
Enable ASC receiver. More...
void | IfxPsi5s_enableDisableChannelTriggerCounters (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter. More...
void | IfxPsi5s_enableDisableChannels (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter. More...
boolean | IfxPsi5s_getReadFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel. More...
boolean | IfxPsi5s_getSuccessfullyReceivedFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Indicates the successful reception of a frame. More...
void | IfxPsi5s_resetModule (Ifx_PSI5S *psi5s)
resets PSI5S kernel More...
void | IfxPsi5s_startAscTransactions (Ifx_PSI5S *psi5s)
Start ASC transactions. More...
void | IfxPsi5s_stopAscTransactions (Ifx_PSI5S *psi5s)

Detailed Description

PSI5S basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5s.c.


iLLD_TC26B: IfxPsi5s_Psi5s.c File Reference

  • Psi5s
  • Psi5s
Functions
IfxPsi5s_Psi5s.c File Reference

PSI5S PSI5S details. More...

#include "IfxPsi5s_Psi5s.h"
Include dependency graph for IfxPsi5s_Psi5s.c:

Go to the source code of this file.

Functions

IFX_STATIC uint32 | IfxPsi5s_Psi5s_getFracDivClock (Ifx_PSI5S *psi5s)
get the fracDiv clock frequency More...
IFX_STATIC uint32 | IfxPsi5s_Psi5s_initializeClock (Ifx_PSI5S *psi5s, const IfxPsi5s_Psi5s_Clock *clock)
Configure the fracDiv clock. More...
IFX_STATIC uint32 | IfxPsi5s_Psi5s_setBaudrate (Ifx_PSI5S *psi5s, uint32 baudrate, IfxPsi5s_Psi5s_AscConfig *ascConfig)
Configure the baudrate at the ASC interface. More...
void | IfxPsi5s_Psi5s_deInitModule (IfxPsi5s_Psi5s *psi5s)
De-initialise the PSI5S module. More...
void | IfxPsi5s_Psi5s_enableModule (Ifx_PSI5S *psi5s)
Enable PSI5S kernel. More...
boolean | IfxPsi5s_Psi5s_initChannel (IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
void | IfxPsi5s_Psi5s_initChannelConfig (IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
Initialise buffer with default channel configuration. More...
boolean | IfxPsi5s_Psi5s_initModule (IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
Initialise the PSI5S with the supplied configureation. More...
void | IfxPsi5s_Psi5s_initModuleConfig (IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
Initialise buffer with default PSI5S configuration. More...
void | IfxPsi5s_Psi5s_readFrame (IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
Get the received psi5s frame for the channel. More...
void | IfxPsi5s_Psi5s_resetModule (Ifx_PSI5S *psi5s)
Reset PSI5S kernel. More...
boolean | IfxPsi5s_Psi5s_sendChannelData (IfxPsi5s_Psi5s_Channel *channel, uint32 data)
Transmit the data through the channel. More...

Detailed Description

PSI5S PSI5S details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxPsi5s_Psi5s.c.


iLLD_TC26B: IfxQspi.c File Reference

  • Qspi
  • Std
Macros | Functions
IfxQspi.c File Reference

QSPI basic functionality. More...

#include "IfxQspi.h"
Include dependency graph for IfxQspi.c:

Go to the source code of this file.

Macros

#define | ABCQMIN (4)
#define | ABCQMAX (8 * 63)

Functions

float | IfxQspi_calcRealBaudrate (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel. More...
uint32 | IfxQspi_calculateBasicConfigurationValue (Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values. More...
uint32 | IfxQspi_calculateExtendedConfigurationValue (Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values. More...
uint32 | IfxQspi_calculatePrescaler (Ifx_QSPI *qspi, float baudrate)
Function to calculate prescaler. More...
uint32 | IfxQspi_calculateTimeQuantumLength (Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length. More...
Ifx_QSPI * | IfxQspi_getAddress (IfxQspi_Index qspi)
IfxQspi_Index | IfxQspi_getIndex (Ifx_QSPI *qspi)
Specifies the function to get Index. More...
void | IfxQspi_read16 (Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO. More...
void | IfxQspi_read32 (Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO. More...
void | IfxQspi_read8 (Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO. More...
uint32 | IfxQspi_recalcBasicConfiguration (uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
Re-calculated BACON from the oldBACON. More...
void | IfxQspi_resetModule (Ifx_QSPI *qspi)
resets QSPI kernel More...
void | IfxQspi_setSlaveSelectOutputControl (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
Configures a Slave Select Output. More...
void | IfxQspi_write16 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO. More...
void | IfxQspi_write32 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO. More...
void | IfxQspi_write8 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO. More...
void | IfxQspi_calculateDelayConstants (const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
Calculates the Delay constants (pre and delay) from the user specified CS delays. More...

Detailed Description

QSPI basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi.c.

Macro Definition Documentation

◆ ABCQMAX

#define ABCQMAX (8 * 63)

Referenced by IfxQspi_calculateTimeQuantumLength().

◆ ABCQMIN

#define ABCQMIN (4)

Referenced by IfxQspi_calculateTimeQuantumLength().


iLLD_TC26B: IfxQspi_cfg.c File Reference

  • _Impl
Variables
IfxQspi_cfg.c File Reference

QSPI on-chip implementation data. More...

#include "IfxQspi_cfg.h"
Include dependency graph for IfxQspi_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap [IFXQSPI_NUM_MODULES]

Detailed Description

QSPI on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi_cfg.c.

Variable Documentation

◆ IfxQspi_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES]
Initial value:
= {
{&MODULE_QSPI0, IfxQspi_Index_0},
{&MODULE_QSPI1, IfxQspi_Index_1},
{&MODULE_QSPI2, IfxQspi_Index_2},
{&MODULE_QSPI3, IfxQspi_Index_3}
}
IfxQspi_Index_2
QSPI index 2.
Definition: IfxQspi_cfg.h:84
IfxQspi_Index_1
QSPI index 1.
Definition: IfxQspi_cfg.h:83
IfxQspi_Index_3
QSPI index 3.
Definition: IfxQspi_cfg.h:85
IfxQspi_Index_0
QSPI index 0.
Definition: IfxQspi_cfg.h:82

Definition at line 54 of file IfxQspi_cfg.c.

Referenced by IfxQspi_getAddress(), and IfxQspi_getIndex().


iLLD_TC26B: IfxQspi_SpiMaster.c File Reference

  • Qspi
  • SpiMaster
Functions
IfxQspi_SpiMaster.c File Reference

QSPI SPIMASTER details. More...

#include "IfxQspi_SpiMaster.h"
Include dependency graph for IfxQspi_SpiMaster.c:

Go to the source code of this file.

Functions

IFX_STATIC IfxQspi_SpiMaster_Channel * | IfxQspi_SpiMaster_activeChannel (IfxQspi_SpiMaster *handle)
Gets current active channel. More...
IFX_STATIC void | IfxQspi_SpiMaster_activateSlso (IfxQspi_SpiMaster_Channel *chHandle)
Active the SLSO pin. More...
IFX_STATIC void | IfxQspi_SpiMaster_deactivateSlso (IfxQspi_SpiMaster_Channel *chHandle)
Deactive the SLSO pin. More...
IFX_STATIC SpiIf_Status | IfxQspi_SpiMaster_lock (IfxQspi_SpiMaster *handle)
Locks the transfer and gets the current status of it. More...
IFX_STATIC void | IfxQspi_SpiMaster_read (IfxQspi_SpiMaster_Channel *chHandle)
Reads data from the Rx FIFO. More...
IFX_STATIC void | IfxQspi_SpiMaster_unlock (IfxQspi_SpiMaster *handle)
Unlocks the transfers. More...
IFX_STATIC void | IfxQspi_SpiMaster_write (IfxQspi_SpiMaster_Channel *chHandle)
Writes data into the Tx FIFO. More...
IFX_STATIC void | IfxQspi_SpiMaster_writeLong (IfxQspi_SpiMaster_Channel *chHandle)
Writes Long/xxl data into the Tx FIFO. More...
SpiIf_Status | IfxQspi_SpiMaster_exchange (IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
SpiIf_ChConfig | IfxQspi_SpiMaster_getChannelConfig (IfxQspi_SpiMaster_Channel *chHandle)
Gets the channel configuration. More...
SpiIf_Status | IfxQspi_SpiMaster_getStatus (IfxQspi_SpiMaster_Channel *chHandle)
Gets the transmission status. More...
SpiIf_Status | IfxQspi_SpiMaster_initChannel (IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
Initializes the channel. More...
void | IfxQspi_SpiMaster_initChannelConfig (IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
Fills the config structure with default values. More...
void | IfxQspi_SpiMaster_initModule (IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
Initialises the module. More...
void | IfxQspi_SpiMaster_initModuleConfig (IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...
void | IfxQspi_SpiMaster_isrDmaReceive (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
void | IfxQspi_SpiMaster_isrDmaTransmit (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
void | IfxQspi_SpiMaster_isrError (IfxQspi_SpiMaster *handle)
Error Interrupt handler. More...
IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrPhaseTransition (IfxQspi_SpiMaster *handle)
Phase Transition interrupt handler. More...
void | IfxQspi_SpiMaster_isrReceive (IfxQspi_SpiMaster *handle)
Receive Interrupt handler. More...
void | IfxQspi_SpiMaster_isrTransmit (IfxQspi_SpiMaster *handle)
Transmit interrupt handler. More...
IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrUserDefined (IfxQspi_SpiMaster *handle)
User defined interrupt handler. More...
void | IfxQspi_SpiMaster_packLongModeBuffer (IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
pack data to Long mode buffer More...
SpiIf_Status | IfxQspi_SpiMaster_setChannelBaudrate (IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate)
Set the channel baudrate. More...

Detailed Description

QSPI SPIMASTER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi_SpiMaster.c.

Function Documentation

◆ IfxQspi_SpiMaster_getChannelConfig()

SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig ( IfxQspi_SpiMaster_Channel * chHandle )

Gets the channel configuration.

Parameters
chHandle Module Channel handle
Returns
Channel configuration

Definition at line 182 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_setChannelBaudrate().

◆ IfxQspi_SpiMaster_setChannelBaudrate()

SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | float32 | baudrate
 | ) |  |

Set the channel baudrate.

Parameters
chHandle | Module Channel handle
baudrate | Baudrate to be configured (in Baud)
Returns
Status of Channel (busy or ok or failure)

Definition at line 890 of file IfxQspi_SpiMaster.c.


iLLD_TC26B: IfxQspi_SpiSlave.c File Reference

  • Qspi
  • SpiSlave
Functions | Variables
IfxQspi_SpiSlave.c File Reference

QSPI SPISLAVE details. More...

#include "IfxQspi_SpiSlave.h"
Include dependency graph for IfxQspi_SpiSlave.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxQspi_SpiSlave_read (IfxQspi_SpiSlave *handle)
Reads data from the Rx FIFO. More...
IFX_STATIC void | IfxQspi_SpiSlave_write (IfxQspi_SpiSlave *handle)
Writes data into the Tx FIFO. More...
SpiIf_Status | IfxQspi_SpiSlave_exchange (IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
SpiIf_Status | IfxQspi_SpiSlave_getStatus (IfxQspi_SpiSlave *handle)
Gets the transmission status. More...
void | IfxQspi_SpiSlave_initModule (IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
Initialises the module. More...
void | IfxQspi_SpiSlave_initModuleConfig (IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...
void | IfxQspi_SpiSlave_isrDmaReceive (IfxQspi_SpiSlave *qspiHandle)
Dma receive interrupt handler. More...
void | IfxQspi_SpiSlave_isrDmaTransmit (IfxQspi_SpiSlave *qspiHandle)
Transmit interrupt handler. More...
void | IfxQspi_SpiSlave_isrError (IfxQspi_SpiSlave *handle)
Error Interrupt handler. More...
void | IfxQspi_SpiSlave_isrReceive (IfxQspi_SpiSlave *handle)
Receive Interrupt handler. More...
void | IfxQspi_SpiSlave_isrTransmit (IfxQspi_SpiSlave *handle)
Transmit interrupt handler. More...

Variables

IFX_STATIC uint32 | IfxQspi_SpiSlave_dummyRxValue = 0
dummy variable where recived data is placed More...
IFX_STATIC IFX_CONST uint32 | IfxQspi_SpiSlave_dummyTxValue = ~0
dummy value to be transmitted More...

Detailed Description

QSPI SPISLAVE details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxQspi_SpiSlave.c.


iLLD_TC26B: IfxScu_cfg.c File Reference

  • _Impl
IfxScu_cfg.c File Reference

SCU on-chip implementation data. More...

#include "IfxScu_cfg.h"
Include dependency graph for IfxScu_cfg.c:

Go to the source code of this file.

Detailed Description

SCU on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScu_cfg.c.


iLLD_TC26B: IfxScuCcu.c File Reference

  • Scu
  • Std
Functions | Variables
IfxScuCcu.c File Reference

SCU basic functionality. More...

#include "IfxScuCcu.h"
Include dependency graph for IfxScuCcu.c:

Go to the source code of this file.

Functions

IFX_STATIC boolean | IfxScuCcu_isOscillatorStable (void)
Check if oscillator is stable. More...
IFX_STATIC void | IfxScuCcu_wait (float32 timeSec)
API to wait for requested duration. Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled. More...
boolean | IfxScuCcu_calculateSysPllDividers (IfxScuCcu_Config *cfg, uint32 fPll)
The api calculates the system PLL divider values P, N, K based on given xtal frequency and PLL frequency. More...
float32 | IfxScuCcu_getBaud1Frequency (void)
API to get BAUD1 divider frequency. This API returns the based on the divider value in CCUCON register and the input oscillator. More...
float32 | IfxScuCcu_getBaud2Frequency (void)
API to get BAUD2 divider frequency. This API returns the Baud2 frequency based on the divider value in CCUCON register and the fMAX. More...
float32 | IfxScuCcu_getBbbFrequency (void)
API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider value in CCUCON register and the input oscillator. More...
float32 | IfxScuCcu_getCpuFrequency (const IfxCpu_ResourceCpu cpu)
This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequency. More...
float32 | IfxScuCcu_getFsi2Frequency (void)
API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider value in CCUCON register and the input oscillator. More...
float32 | IfxScuCcu_getFsiFrequency (void)
API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCON register and the input oscillator. More...
float32 | IfxScuCcu_getMaxFrequency (void)
API to get FMAX divider frequency. This API returns the fMax frequency based on the divider value in CCUCON register and the input oscillator. More...
float32 | IfxScuCcu_getModuleFrequency (void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
float32 | IfxScuCcu_getOsc0Frequency (void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator. More...
float32 | IfxScuCcu_getOscFrequency (void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator. More...
float32 | IfxScuCcu_getPllErayFrequency (void)
API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator. More...
float32 | IfxScuCcu_getPllErayVcoFrequency (void)
API to get actual ERAY PLL Voltage Controlled Oscillator frequency. This API returns the based on the divider values in PLLERAYCON registers and the input oscillator. More...
float32 | IfxScuCcu_getPllFrequency (void)
API to get actual PLL output frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator. More...
float32 | IfxScuCcu_getPllVcoFrequency (void)
API to get actual PLL Voltage Controlled Oscillator frequency. This API returns the based on the divider values in PLLCON registers and the input oscillator. More...
float32 | IfxScuCcu_getSourceFrequency (void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
float32 | IfxScuCcu_getSpbFrequency (void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider mode and/or SPBDIV divider value in CCUCON registers. More...
float32 | IfxScuCcu_getSriFrequency (void)
API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in CCUCON registers and fSOURCE. More...
boolean | IfxScuCcu_init (const IfxScuCcu_Config *cfg)
API to initialize the SCU Clock Control Unit. This API initialize the PLL with ramp steps, BUS dividers for the configuration provided by the configuration structure. More...
void | IfxScuCcu_initConfig (IfxScuCcu_Config *cfg)
Initializes the clock configuration with default values. More...
boolean | IfxScuCcu_initErayPll (const IfxScuCcu_ErayPllConfig *cfg)
API to initialize the SCU Eray Pll This API initialize the Eray PLL for the configuration provided by the configuration structure. More...
void | IfxScuCcu_initErayPllConfig (IfxScuCcu_ErayPllConfig *cfg)
Initializes the clock configuration with default values. More...
float32 | IfxScuCcu_setCpuFrequency (IfxCpu_ResourceCpu cpu, float32 cpuFreq)
API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers. The actual frequency is always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setGtmFrequency (float32 gtmFreq)
API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setPll2ErayFrequency (float32 pll2ErayFreq)
API to configure PLL2ERAY (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setPll2Frequency (float32 pll2Freq)
API to configure PLL2 (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setSpbFrequency (float32 spbFreq)
API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setSriFrequency (float32 sriFreq)
API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
void | IfxScuCcu_switchToBackupClock (const IfxScuCcu_Config *cfg)
API to switch to Backup clock from the current PLL frequency. More...

Variables

IFX_STATIC IFX_CONST IfxScuCcu_PllStepsConfig IfxScuCcu_aDefaultPllConfigSteps []
Default configuration for the PLL initial steps This is a structure array and the values are defined at the Scu implementation as a macro. More...
IFX_STATIC uint32 IfxScuCcu_xtalFrequency = IFX_CFG_SCU_XTAL_FREQUENCY
Crystal Frequency. More...
IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig
IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScuCcu.c.

Function Documentation

◆ IfxScuCcu_setGtmFrequency()

float32 IfxScuCcu_setGtmFrequency ( float32 gtmFreq )

API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
gtmFreq Desired GTM frequency in Hz
Returns
Actual GTM frequency in HZ

Definition at line 1112 of file IfxScuCcu.c.

Variable Documentation

◆ IfxScuCcu_aDefaultPllConfigSteps

IFX_STATIC IFX_CONST IfxScuCcu_PllStepsConfig IfxScuCcu_aDefaultPllConfigSteps[]
Initial value:
= {
IFXSCU_CFG_PLL_STEPS
}
IFXSCU_CFG_PLL_STEPS
#define IFXSCU_CFG_PLL_STEPS
Definition: IfxScu_cfg.h:1344

Default configuration for the PLL initial steps This is a structure array and the values are defined at the Scu implementation as a macro.

Definition at line 78 of file IfxScuCcu.c.

◆ IfxScuCcu_defaultClockConfig

IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig
Initial value:
= {
{
sizeof(IfxScuCcu_aDefaultPllConfigSteps) / sizeof(IfxScuCcu_PllStepsConfig),
(IfxScuCcu_PllStepsConfig *)IfxScuCcu_aDefaultPllConfigSteps,
IFXSCU_CFG_PLL_INITIAL_STEP,
},
IFXSCU_CFG_CLK_DISTRIBUTION,
IFXSCU_CFG_FLASH_WAITSTATE,
IFX_CFG_SCU_XTAL_FREQUENCY,
}
IFXSCU_CFG_FLASH_WAITSTATE
#define IFXSCU_CFG_FLASH_WAITSTATE
Definition: IfxScu_cfg.h:1351
IFXSCU_CFG_CLK_DISTRIBUTION
#define IFXSCU_CFG_CLK_DISTRIBUTION
Definition: IfxScu_cfg.h:1329
IFXSCU_CFG_PLL_INITIAL_STEP
#define IFXSCU_CFG_PLL_INITIAL_STEP
Definition: IfxScu_cfg.h:1349
IFX_CFG_SCU_XTAL_FREQUENCY
#define IFX_CFG_SCU_XTAL_FREQUENCY
Default External oscillator frequency.
Definition: IfxScu_cfg.h:60
IfxScuCcu_PllStepsConfig
Configuration structure type for the Pll Steps for current jump control.
Definition: IfxScuCcu.h:740
IfxScuCcu_aDefaultPllConfigSteps
IFX_STATIC IFX_CONST IfxScuCcu_PllStepsConfig IfxScuCcu_aDefaultPllConfigSteps[]
Default configuration for the PLL initial steps This is a structure array and the values are defined ...
Definition: IfxScuCcu.c:78

Definition at line 90 of file IfxScuCcu.c.

Referenced by IfxScuCcu_initConfig().

◆ IfxScuCcu_defaultErayPllConfig

IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig
Initial value:
= {
{(1 - 1), (24 - 1), (6 - 1), 0}
}

Definition at line 101 of file IfxScuCcu.c.

Referenced by IfxScuCcu_initErayPllConfig().

◆ IfxScuCcu_xtalFrequency

IFX_STATIC uint32 IfxScuCcu_xtalFrequency = IFX_CFG_SCU_XTAL_FREQUENCY

Crystal Frequency.

Definition at line 84 of file IfxScuCcu.c.

Referenced by IfxScuCcu_getOsc0Frequency(), IfxScuCcu_getOscFrequency(), IfxScuCcu_init(), and IfxScuCcu_isOscillatorStable().


iLLD_TC26B: IfxScuEru.c File Reference

  • Scu
  • Std
Macros | Functions
IfxScuEru.c File Reference

SCU basic functionality. More...

#include "IfxScuEru.h"
Include dependency graph for IfxScuEru.c:

Go to the source code of this file.

Macros

#define | IFXSCUERU_CHANNEL_NUMBER_ODD 1
#define | IFXSCUERU_TO_REGISTER_BASE 1

Functions

void | IfxScuEru_clearAllEventFlags (void)
Clears the external event flag of input channel x (INTFx) More...
void | IfxScuEru_clearEventFlag (IfxScuEru_InputChannel inputChannel)
Clears the external event flag of input channel x (INTFx) More...
void | IfxScuEru_clearInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Clears all the configuration for the given input channel x. More...
void | IfxScuEru_clearOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
void | IfxScuEru_connectTrigger (IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1). More...
void | IfxScuEru_disableAutoClear (IfxScuEru_InputChannel inputChannel)
Disables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
void | IfxScuEru_disableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the falling edge of input channel to set the bit INTF x. More...
void | IfxScuEru_disablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Disables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
void | IfxScuEru_disableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the rising edge of input channel to set the bit INTF x. More...
void | IfxScuEru_disableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Disables the generation of a trigger event for input channel x when the selected edge is detected. More...
void | IfxScuEru_enableAutoClear (IfxScuEru_InputChannel inputChannel)
Enables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
void | IfxScuEru_enableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the falling edge of input channel to set the bit INTF x. More...
void | IfxScuEru_enablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Enables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
void | IfxScuEru_enableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the rising edge of input channel to set the bit INTF x. More...
void | IfxScuEru_enableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Enables the generation of a trigger event for input channel x when the selected edge is detected. More...
uint32 | IfxScuEru_getAllEventFlagsStatus (void)
Returns the status of the flags of all input channels. More...
boolean | IfxScuEru_getEventFlagStatus (IfxScuEru_InputChannel inputChannel)
Returns the status of the external event flag of input channel x (INTFx) More...
uint32 | IfxScuEru_getInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Returns all the configuration for the given input channel x. More...
uint32 | IfxScuEru_getOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
boolean | IfxScuEru_getPatternDetectionResult (IfxScuEru_OutputChannel outputChannel)
Returns the status of the pattern detection result of output channel y (PDRy) More...
uint32 | IfxScuEru_getWholePatternDetectionResult (void)
Returns the whole pattern detection result of all the selcted output channels. More...
void | IfxScuEru_selectExternalInput (IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
Determines which input line is selcted for input channel x. More...
void | IfxScuEru_setEventFlag (IfxScuEru_InputChannel inputChannel)
Sets the external event flag of input channel x (INTFx) More...
void | IfxScuEru_setFlagPatternDetection (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
Enables the flag INTFx to take part in the pattern detection for output gating. More...
void | IfxScuEru_setInterruptGatingPattern (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the output lines GOUT and IOUT. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScuEru.c.

Macro Definition Documentation

◆ IFXSCUERU_CHANNEL_NUMBER_ODD

#define IFXSCUERU_CHANNEL_NUMBER_ODD 1

Definition at line 53 of file IfxScuEru.c.

Referenced by IfxScuEru_clearInputChannelConfiguration(), IfxScuEru_clearOutputChannelConfiguration(), IfxScuEru_connectTrigger(), IfxScuEru_disableAutoClear(), IfxScuEru_disableFallingEdgeDetection(), IfxScuEru_disablePatternDetectionTrigger(), IfxScuEru_disableRisingEdgeDetection(), IfxScuEru_disableTriggerPulse(), IfxScuEru_enableAutoClear(), IfxScuEru_enableFallingEdgeDetection(), IfxScuEru_enablePatternDetectionTrigger(), IfxScuEru_enableRisingEdgeDetection(), IfxScuEru_enableTriggerPulse(), IfxScuEru_getInputChannelConfiguration(), IfxScuEru_getOutputChannelConfiguration(), IfxScuEru_selectExternalInput(), IfxScuEru_setFlagPatternDetection(), and IfxScuEru_setInterruptGatingPattern().

◆ IFXSCUERU_TO_REGISTER_BASE

#define IFXSCUERU_TO_REGISTER_BASE 1

Definition at line 55 of file IfxScuEru.c.

Referenced by IfxScuEru_clearInputChannelConfiguration(), IfxScuEru_clearOutputChannelConfiguration(), IfxScuEru_connectTrigger(), IfxScuEru_disableAutoClear(), IfxScuEru_disableFallingEdgeDetection(), IfxScuEru_disablePatternDetectionTrigger(), IfxScuEru_disableRisingEdgeDetection(), IfxScuEru_disableTriggerPulse(), IfxScuEru_enableAutoClear(), IfxScuEru_enableFallingEdgeDetection(), IfxScuEru_enablePatternDetectionTrigger(), IfxScuEru_enableRisingEdgeDetection(), IfxScuEru_enableTriggerPulse(), IfxScuEru_getInputChannelConfiguration(), IfxScuEru_getOutputChannelConfiguration(), IfxScuEru_selectExternalInput(), IfxScuEru_setFlagPatternDetection(), and IfxScuEru_setInterruptGatingPattern().


iLLD_TC26B: IfxScuWdt.c File Reference

  • Scu
  • Std
Macros | Functions
IfxScuWdt.c File Reference

SCU basic functionality. More...

#include "IfxScuWdt.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxScuWdt.c:

Go to the source code of this file.

Macros

#define IFXSCUWDT_RESET_PASSWORD (0x3CU)
Reset password of watchdog module. More...

Functions

void | IfxScuWdt_changeCpuWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change CPU Watchdog password. More...
void | IfxScuWdt_changeCpuWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change CPU Watchdog timer reload value. More...
void | IfxScuWdt_changeSafetyWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change Safety Watchdog password. More...
void | IfxScuWdt_changeSafetyWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change Safety Watchdog timer reload value. More...
void | IfxScuWdt_clearCpuEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module. More...
void | IfxScuWdt_clearSafetyEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module. More...
void | IfxScuWdt_disableCpuWatchdog (uint16 password)
SCUWDT API to disable CPU Watchdog functionality. More...
void | IfxScuWdt_disableSafetyWatchdog (uint16 password)
SCUWDT API to disable Safety Watchdog functionality. More...
void | IfxScuWdt_enableCpuWatchdog (uint16 password)
SCUWDT API to enable CPU Watchdog functionality. More...
void | IfxScuWdt_enableSafetyWatchdog (uint16 password)
SCUWDT API to enable Safety Watchdog functionality. More...
uint16 | IfxScuWdt_getCpuWatchdogPassword (void)
SCUWDT API to fetch current password of CPU Watchdog module. More...
boolean | IfxScuWdt_getCpuWatchdogEndInit (void)
SCUWDT API to fetch current endinit of CPU Watchdog module. More...
uint16 | IfxScuWdt_getSafetyWatchdogPassword (void)
SCUWDT API to fetch current password of Safety Watchdog module. More...
void | IfxScuWdt_initConfig (IfxScuWdt_Config *config)
SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt configuration structure to default values, these default values are for software specific, not necessarily hardware reset values. User must use this API call before IfxScuWdt_Init API call. More...
void | IfxScuWdt_initCpuWatchdog (Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module. More...
void | IfxScuWdt_initSafetyWatchdog (Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module. More...
void | IfxScuWdt_serviceCpuWatchdog (uint16 password)
SCUWDT API to service CPU Watchdog functionality. More...
void | IfxScuWdt_serviceSafetyWatchdog (uint16 password)
SCUWDT API to service Safety Watchdog functionality. More...
void | IfxScuWdt_setCpuEndinit (uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module. More...
void | IfxScuWdt_setSafetyEndinit (uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module. More...
boolean | IfxScuWdt_enableWatchdogWithDebugger (void)
Enables the watchdog functionality with debugger connected,
debug interface will also be enabled, if not enabled already. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxScuWdt.c.

Macro Definition Documentation

◆ IFXSCUWDT_RESET_PASSWORD

#define IFXSCUWDT_RESET_PASSWORD (0x3CU)

Reset password of watchdog module.

Definition at line 56 of file IfxScuWdt.c.

Referenced by IfxScuWdt_initConfig().

Function Documentation

◆ IfxScuWdt_enableWatchdogWithDebugger()

boolean IfxScuWdt_enableWatchdogWithDebugger ( void )

Enables the watchdog functionality with debugger connected,
debug interface will also be enabled, if not enabled already.

Returns
Status, Success = 0, Failure = 1.

Definition at line 430 of file IfxScuWdt.c.


iLLD_TC26B: IfxSent.c File Reference

  • Sent
  • Std
Functions
IfxSent.c File Reference

SENT basic functionality. More...

#include "IfxSent.h"
Include dependency graph for IfxSent.c:

Go to the source code of this file.

Functions

float32 | IfxSent_getChannelUnitTime (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns the current unit time (f_tick) of the given channel. More...
float32 | IfxSent_getModuleClock (Ifx_SENT *sent)
Returns the current module frequency in Hertz. More...
void | IfxSent_initializeChannelUnitTime (Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channel. More...
void | IfxSent_initializeModuleClock (Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel. More...
void | IfxSent_resetModule (Ifx_SENT *sent)
Resets the SENT module. More...

Detailed Description

SENT basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSent.c.

Function Documentation

◆ IfxSent_getChannelUnitTime()

float32 IfxSent_getChannelUnitTime | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns the current unit time (f_tick) of the given channel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
The current unit time in seconds

Definition at line 55 of file IfxSent.c.


iLLD_TC26B: IfxSent_cfg.c File Reference

  • _Impl
IfxSent_cfg.c File Reference

SENT on-chip implementation data. More...

#include "IfxSent_cfg.h"
Include dependency graph for IfxSent_cfg.c:

Go to the source code of this file.

Detailed Description

SENT on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSent_cfg.c.


iLLD_TC26B: IfxSent_Sent.c File Reference

  • Sent
  • Sent
Functions
IfxSent_Sent.c File Reference

SENT SENT details. More...

#include "IfxSent_Sent.h"
Include dependency graph for IfxSent_Sent.c:

Go to the source code of this file.

Functions

void | IfxSent_Sent_deInitModule (IfxSent_Sent *driver)
Reset the SENT module. More...
boolean | IfxSent_Sent_initChannel (IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
void | IfxSent_Sent_initChannelConfig (IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
Initialise channel buffer with default SENT channel configuration. More...
boolean | IfxSent_Sent_initModule (IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
Initialise the SENT with the supplied configureation. More...
void | IfxSent_Sent_initModuleConfig (IfxSent_Sent_Config *config, Ifx_SENT *sent)
Initialise buffer with default SENT configuration. More...
boolean | IfxSent_Sent_readChannelSerialDataFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
Reads the nibbles recieved in the Data register. More...
boolean | IfxSent_Sent_readChannelSerialMessageFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
reads the Serial data recieved and collected over several SENT frames More...

Detailed Description

SENT SENT details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSent_Sent.c.


iLLD_TC26B: IfxSmu.c File Reference

  • Smu
  • Std
Functions
IfxSmu.c File Reference

SMU basic functionality. More...

#include "IfxSmu.h"
#include "Port/Std/IfxPort.h"
Include dependency graph for IfxSmu.c:

Go to the source code of this file.

Functions

boolean | IfxSmu_initFsp (Ifx_SMU *smu, IfxSmu_configFsp *config)
Initialize the FSP. More...
boolean | IfxSmu_cmd (Ifx_SMU *smu, uint8 cmd, uint8 arg)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.6 SMU Control Interface Ref: TC27xC UM v2.2: 9.5.2 SMU Configuration Registers. More...
float32 | IfxSmu_getFspFaultFreeFrequency (Ifx_SMU *smu)
Return FSP frequency (Time switching only) More...
float32 | IfxSmu_getFspFaultStateTime (Ifx_SMU *smu)
Return the minimal fault state time. More...
boolean | IfxSmu_unlock (Ifx_SMU *smu)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
void | IfxSmu_lock (Ifx_SMU *smu)
Lock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
void | IfxSmu_lockForever (Ifx_SMU *smu)
Lock the SMU configuration up to the next application reset Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
void | IfxSmu_setAlarmConfig (Ifx_SMU *smu, IfxSmu_Alarm alarm, IfxSmu_AlarmConfig config)
Set the SMU alarm configuration. More...
void | IfxSmu_enableAlarmFsp (Ifx_SMU *smu, IfxSmu_Alarm alarm, boolean enabled)
Set the alarm FSP configuration. More...
boolean | IfxSmu_isAlarmSet (Ifx_SMU *smu, IfxSmu_Alarm alarm)
Return the alarm status. More...
IfxSmu_Alarm | IfxSmu_getAlarm (Ifx_SMU *smu)
Get the alarm flag. More...
void | IfxSmu_clearAlarm (Ifx_SMU *smu, IfxSmu_Alarm alarm)
Clear the alarm flag. More...

Detailed Description

SMU basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSmu.c.


iLLD_TC26B: IfxSmu_cfg.c File Reference

  • _Impl
IfxSmu_cfg.c File Reference

SMU on-chip implementation data. More...

#include "IfxSmu_cfg.h"
Include dependency graph for IfxSmu_cfg.c:

Go to the source code of this file.

Detailed Description

SMU on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSmu_cfg.c.


iLLD_TC26B: IfxSrc.c File Reference

  • Src
  • Std
IfxSrc.c File Reference

SRC basic functionality. More...

#include "IfxSrc.h"
Include dependency graph for IfxSrc.c:

Go to the source code of this file.

Detailed Description

SRC basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSrc.c.


iLLD_TC26B: IfxSrc_cfg.c File Reference

  • _Impl
IfxSrc_cfg.c File Reference

SRC on-chip implementation data. More...

#include "IfxSrc_cfg.h"
Include dependency graph for IfxSrc_cfg.c:

Go to the source code of this file.

Detailed Description

SRC on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxSrc_cfg.c.


iLLD_TC26B: IfxStdIf_DPipe.c File Reference

  • Service
  • CpuGeneric
  • StdIf
Functions
IfxStdIf_DPipe.c File Reference

Standard interface: Data Pipe. More...

#include "IfxStdIf_DPipe.h"
#include "_Utilities/Ifx_Assert.h"
#include <string.h>
#include <stdio.h>
#include <stdarg.h>
Include dependency graph for IfxStdIf_DPipe.c:

Go to the source code of this file.

Functions

void IfxStdIf_DPipe_print (IfxStdIf_DPipe *stdIf, pchar format,...)

Detailed Description

Standard interface: Data Pipe.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:23 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf_DPipe.c.


iLLD_TC26B: IfxStdIf_Pos.c File Reference

  • Service
  • CpuGeneric
  • StdIf
Functions
IfxStdIf_Pos.c File Reference

Standard interface: Position interface. More...

#include "IfxStdIf_Pos.h"
Include dependency graph for IfxStdIf_Pos.c:

Go to the source code of this file.

Functions

void | IfxStdIf_Pos_initConfig (IfxStdIf_Pos_Config *config)
void | IfxStdIf_Pos_printStatus (IfxStdIf_Pos *driver, IfxStdIf_DPipe *io)
Print the device status. More...

Detailed Description

Standard interface: Position interface.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf_Pos.c.

Function Documentation

◆ IfxStdIf_Pos_initConfig()

void IfxStdIf_Pos_initConfig ( IfxStdIf_Pos_Config * config )

Initialize the configuration structure to default

Parameters
config Position interface configuration. This parameter is initialized by the function

Definition at line 45 of file IfxStdIf_Pos.c.

Referenced by IfxGpt12_IncrEnc_initConfig().

◆ IfxStdIf_Pos_printStatus()

void IfxStdIf_Pos_printStatus | ( | IfxStdIf_Pos * | driver,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Print the device status.

Parameters
driver | driver handle
io | Interface to which the status is output
Returns
none

Definition at line 61 of file IfxStdIf_Pos.c.


iLLD_TC26B: IfxStdIf_PwmHl.c File Reference

  • Service
  • CpuGeneric
  • StdIf
Functions
IfxStdIf_PwmHl.c File Reference

Standard interface: Multi-channels, dual-complementary PWM interface. More...

#include "IfxStdIf_PwmHl.h"
Include dependency graph for IfxStdIf_PwmHl.c:

Go to the source code of this file.

Functions

void IfxStdIf_PwmHl_initConfig (IfxStdIf_PwmHl_Config *config)

Detailed Description

Standard interface: Multi-channels, dual-complementary PWM interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:24 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf_PwmHl.c.


iLLD_TC26B: IfxStdIf_Timer.c File Reference

  • Service
  • CpuGeneric
  • StdIf
Functions
IfxStdIf_Timer.c File Reference

Standard interface: Timer. More...

#include "IfxStdIf_Timer.h"
Include dependency graph for IfxStdIf_Timer.c:

Go to the source code of this file.

Functions

void | IfxStdIf_Timer_initConfig (IfxStdIf_Timer_Config *config)
void | IfxStdIf_Timer_initStdIf (IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)

Detailed Description

Standard interface: Timer.

Version
disabled
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStdIf_Timer.c.

Function Documentation

◆ IfxStdIf_Timer_initConfig()

void IfxStdIf_Timer_initConfig ( IfxStdIf_Timer_Config * config )

Initialize the configuration structure to default

Parameters
config Timer configuration. This parameter is initialised by the function

Definition at line 45 of file IfxStdIf_Timer.c.

Referenced by IfxCcu6_TimerWithTrigger_initConfig(), IfxGtm_Atom_Timer_initConfig(), IfxGtm_Tom_Timer_initConfig(), and IfxStm_Timer_initConfig().

◆ IfxStdIf_Timer_initStdIf()

void IfxStdIf_Timer_initStdIf | ( | IfxStdIf_Timer * | stdIf,
 |  | IfxStdIf_InterfaceDriver | driver
 | ) |  |

Initialize the stdIf so that all call back function default to no operation

Parameters
stdIf | Pointer to the interface driver object
driver | Interface driver object

Definition at line 143 of file IfxStdIf_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().


iLLD_TC26B: IfxStm.c File Reference

  • Stm
  • Std
Functions
IfxStm.c File Reference

STM basic functionality. More...

#include "IfxStm.h"
Include dependency graph for IfxStm.c:

Go to the source code of this file.

Functions

void | IfxStm_clearCompareFlag (Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag. More...
void | IfxStm_disableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt. More...
void | IfxStm_disableModule (Ifx_STM *stm)
Disables the Stm module. More...
void | IfxStm_enableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt . More...
void | IfxStm_enableOcdsSuspend (Ifx_STM *stm)
enable suspend by debugger. Note: The API will write into the OCS register only if OCDS is enabled More...
Ifx_STM * | IfxStm_getAddress (IfxStm_Index stm)
Returns the module index of the selected STM module. More...
IfxStm_Index | IfxStm_getIndex (Ifx_STM *stm)
API to get the resource index of the STM specified. More...
volatile Ifx_SRC_SRCR * | IfxStm_getSrcPointer (Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator. More...
boolean | IfxStm_initCompare (Ifx_STM *stm, const IfxStm_CompareConfig *config)
Initialise stm compare register. More...
void | IfxStm_initCompareConfig (IfxStm_CompareConfig *config)
Initialise compare configuration with default values. More...
boolean | IfxStm_isCompareFlagSet (Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set. More...
void | IfxStm_resetModule (Ifx_STM *stm)
void | IfxStm_setCompareControl (Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior. More...

Detailed Description

STM basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStm.c.

Function Documentation

◆ IfxStm_resetModule()

void IfxStm_resetModule ( Ifx_STM * stm )
Parameters
stm pointer to STM registers
Returns
None

Definition at line 252 of file IfxStm.c.


iLLD_TC26B: IfxStm_cfg.c File Reference

  • _Impl
Variables
IfxStm_cfg.c File Reference

STM on-chip implementation data. More...

#include "IfxStm_cfg.h"
Include dependency graph for IfxStm_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap [IFXSTM_NUM_MODULES]

Detailed Description

STM on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStm_cfg.c.

Variable Documentation

◆ IfxStm_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES]
Initial value:
= {
{&MODULE_STM0, IfxStm_Index_0},
{&MODULE_STM1, IfxStm_Index_1}
}
IfxStm_Index_1
STM index 1.
Definition: IfxStm_cfg.h:88
IfxStm_Index_0
STM index 0.
Definition: IfxStm_cfg.h:87

Definition at line 52 of file IfxStm_cfg.c.

Referenced by IfxStm_getAddress(), and IfxStm_getIndex().


iLLD_TC26B: IfxStm_Timer.c File Reference

  • Stm
  • Timer
Functions
IfxStm_Timer.c File Reference

STM TIMER details. More...

#include "IfxStm_Timer.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxStm_Timer.c:

Go to the source code of this file.

Functions

boolean | IfxStm_Timer_acknowledgeTimerIrq (IfxStm_Timer *driver)
Returns the timer event see IfxStdIf_Timer_AckTimerIrq. More...
float32 | IfxStm_Timer_getFrequency (IfxStm_Timer *driver)
Returns the frequency see IfxStdIf_Timer_GetFrequency. More...
float32 | IfxStm_Timer_getInputFrequency (IfxStm_Timer *driver)
Returns the input frequency see IfxStdIf_Timer_GetInputFrequency. More...
Ifx_TimerValue | IfxStm_Timer_getPeriod (IfxStm_Timer *driver)
Returns the period of the timer see IfxStdIf_Timer_GetPeriod. More...
float32 | IfxStm_Timer_getResolution (IfxStm_Timer *driver)
Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution. More...
void | IfxStm_Timer_run (IfxStm_Timer *driver)
Runs the timer see IfxStdIf_Timer_Run. More...
boolean | IfxStm_Timer_setFrequency (IfxStm_Timer *driver, float32 frequency)
Sets the Frequency see IfxStdIf_Timer_SetFrequency. More...
boolean | IfxStm_Timer_setPeriod (IfxStm_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer see IfxStdIf_Timer_SetPeriod. More...
void | IfxStm_Timer_setSingleMode (IfxStm_Timer *driver, boolean enabled)
Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode. More...
boolean | IfxStm_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
Initializes the standard interface timer. More...
void | IfxStm_Timer_stop (IfxStm_Timer *driver)
Stops the timer see IfxStdIf_Timer_Stop. More...
void | IfxStm_Timer_updateInputFrequency (IfxStm_Timer *driver)
Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency. More...
boolean | IfxStm_Timer_init (IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
Initialises the timer object. More...
void | IfxStm_Timer_initConfig (IfxStm_Timer_Config *config, Ifx_STM *stm)
Initializes the configuration structure to default. More...

Detailed Description

STM TIMER details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxStm_Timer.c.


iLLD_TC26B: IfxVadc.c File Reference

  • Vadc
  • Std
Functions
IfxVadc.c File Reference

VADC basic functionality. More...

#include "IfxVadc.h"
Include dependency graph for IfxVadc.c:

Go to the source code of this file.

Functions

void | IfxVadc_configExternalMultiplexerMode (Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle)
void | IfxVadc_disableAccess (Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Disable write access to the VADC config/control registers. More...
void | IfxVadc_disablePostCalibration (Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable)
Disables the post calibration. More...
void | IfxVadc_enableAccess (Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Enable write access to the VADC config/control registers. More...
void | IfxVadc_enableGroupSync (Ifx_VADC *vadc, uint32 ccu6Num)
Enables the CCU6 based ADC group synchronisation as workaround for Erratum ADC_TC.068. More...
float32 | IfxVadc_getAdcAnalogFrequency (Ifx_VADC *vadc)
Returns the configured Fadci VADC analog clock frequency in Hz. More...
float32 | IfxVadc_getAdcDigitalFrequency (Ifx_VADC *vadc)
Returns the configured Fadcd VADC digital clock frequency in Hz. More...
float32 | IfxVadc_getAdcModuleFrequency (void)
Module Frequency in Hz. More...
IfxVadc_Status | IfxVadc_getBackgroundScanStatus (Ifx_VADC *vadc)
Gives the background scan status for a group. More...
float32 | IfxVadc_getChannelConversionTime (Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode)
get channel conversion timing More...
IfxVadc_Status | IfxVadc_getQueueStatus (Ifx_VADC_G *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full. More...
Ifx_VADC_RES | IfxVadc_getResultBasedOnRequestSource (Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset. More...
IfxVadc_Status | IfxVadc_getScanStatus (Ifx_VADC_G *group)
Gives the scan status for a group. More...
volatile Ifx_SRC_SRCR * | IfxVadc_getSrcAddress (IfxVadc_GroupId group, IfxVadc_SrcNr index)
Gives the SRC source address. More...
void | IfxVadc_initialiseAdcArbiterClock (Ifx_VADC *vadc, uint32 arbiterClockDivider)
Initialises ADC arbiter clock. More...
void | IfxVadc_initialiseAdcConverterClock (Ifx_VADC *vadc, uint32 converterClockDivider)
Initialises the ADC Converter clock. More...
uint32 | IfxVadc_initializeFAdcD (Ifx_VADC *vadc, uint32 fAdcD)
Configure the FadcD vadc digital clock. More...
uint32 | IfxVadc_initializeFAdcI (Ifx_VADC *vadc, uint32 fAdcI)
Configure the ADC analog clock. More...
boolean | IfxVadc_isPostCalibration (Ifx_VADC *vadc, IfxVadc_GroupId group)
Return the post calibration status. More...
void | IfxVadc_resetKernel (Ifx_VADC *vadc)
Resets the kernel. More...
void | IfxVadc_selectPowerSupplyVoltage (Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage)
Select Low Power Supply Voltage. More...
void | IfxVadc_setArbiterPriority (Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot)
Sets the Arbiter slot configurations. More...
void | IfxVadc_setScan (Ifx_VADC_G *group, uint32 channels, uint32 mask)
Configures an (auto-)scan. More...
void | IfxVadc_startupCalibration (Ifx_VADC *vadc)
Starts ADC calibration and wait for the end of the calibration process. More...

Detailed Description

VADC basic functionality.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxVadc.c.


iLLD_TC26B: IfxVadc_Adc.c File Reference

  • Vadc
  • Adc
Functions | Variables
IfxVadc_Adc.c File Reference

VADC ADC details. More...

#include "IfxVadc_Adc.h"
Include dependency graph for IfxVadc_Adc.c:

Go to the source code of this file.

Functions

IFX_INLINE IfxVadc_GroupId | IfxVadc_Adc_getMasterId (IfxVadc_GroupId slave, IfxVadc_Adc_SYNCTR_STSEL masterIndex)
Gets the master id. More...
IFX_INLINE IfxVadc_Adc_SYNCTR_STSEL | IfxVadc_Adc_getMasterKernelIndex (IfxVadc_GroupId slave, IfxVadc_GroupId master)
Gets the current master kernel index. More...
void | IfxVadc_Adc_deInitGroup (IfxVadc_Adc_Group *group)
Reset the VADC group. More...
void | IfxVadc_Adc_disableModule (Ifx_VADC *vadc)
Disable VADC Module. More...
void | IfxVadc_Adc_getChannelConfig (IfxVadc_Adc_Channel *channel, IfxVadc_Adc_ChannelConfig *config)
Get the current channel configuration (e.g. sample settings) More...
float32 | IfxVadc_Adc_getChannelConversionTime (IfxVadc_Adc_Channel *channel, IfxVadc_ConversionType conversionMode)
get the channel Conversion Time More...
void | IfxVadc_Adc_getGroupConfig (IfxVadc_Adc_Group *group, IfxVadc_Adc_GroupConfig *config)
Get the current group configuration (e.g. vadc frequency) More...
IfxVadc_Status | IfxVadc_Adc_initChannel (IfxVadc_Adc_Channel *channel, const IfxVadc_Adc_ChannelConfig *config)
Initialise one channel with given configuration. More...
void | IfxVadc_Adc_initChannelConfig (IfxVadc_Adc_ChannelConfig *config, const IfxVadc_Adc_Group *group)
Initialise buffer with default channel configuration. More...
IfxVadc_Status | IfxVadc_Adc_initGroup (IfxVadc_Adc_Group *group, const IfxVadc_Adc_GroupConfig *config)
Initialise the VADC group (also autoscan and queue modes) Slave Groups must initialize first. More...
void | IfxVadc_Adc_initGroupConfig (IfxVadc_Adc_GroupConfig *config, IfxVadc_Adc *vadc)
Initialise buffer with default VADC configuration. More...
IfxVadc_Status | IfxVadc_Adc_initModule (IfxVadc_Adc *vadc, const IfxVadc_Adc_Config *config)
Initialise the VADC to run with the expected frequency and calibration. More...
void | IfxVadc_Adc_initModuleConfig (IfxVadc_Adc_Config *config, Ifx_VADC *vadc)
Initialise buffer with default VADC configuration. More...
void | IfxVadc_Adc_initExternalMultiplexerModeConfig (IfxVadc_Adc_EmuxControl *emuxConfig, Ifx_VADC *vadc)
initialise default configuration for external multiplexer More...
void | IfxVadc_Adc_initExternalMultiplexerMode (Ifx_VADC *vadc, const IfxVadc_Adc_EmuxControl *emuxControl)
initalise external multiplexer. More...

Variables

IFX_STATIC IFX_CONST IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_masterIndex [IFXVADC_NUM_ADC_CAL_GROUPS][IFXVADC_NUM_ADC_CAL_GROUPS]

Detailed Description

VADC ADC details.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxVadc_Adc.c.


iLLD_TC26B: IfxVadc_cfg.c File Reference

  • _Impl
Variables
IfxVadc_cfg.c File Reference

VADC on-chip implementation data. More...

#include "IfxVadc_cfg.h"
Include dependency graph for IfxVadc_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST uint32 IfxVadc_cfg_srcAddresses [(IFXVADC_NUM_ADC_GROUPS *4)+(IFXVADC_NUM_ADC_COMMON_GROUPS *4)]

Detailed Description

VADC on-chip implementation data.

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file IfxVadc_cfg.c.

Variable Documentation

◆ IfxVadc_cfg_srcAddresses

IFX_CONST uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS *4)+(IFXVADC_NUM_ADC_COMMON_GROUPS *4)]
Initial value:
= {
(uint32)&SRC_VADC_G0_SR0,
(uint32)&SRC_VADC_G0_SR1,
(uint32)&SRC_VADC_G0_SR2,
(uint32)&SRC_VADC_G0_SR3,
(uint32)&SRC_VADC_G1_SR0,
(uint32)&SRC_VADC_G1_SR1,
(uint32)&SRC_VADC_G1_SR2,
(uint32)&SRC_VADC_G1_SR3,
(uint32)&SRC_VADC_G2_SR0,
(uint32)&SRC_VADC_G2_SR1,
(uint32)&SRC_VADC_G2_SR2,
(uint32)&SRC_VADC_G2_SR3,
(uint32)&SRC_VADC_G3_SR0,
(uint32)&SRC_VADC_G3_SR1,
(uint32)&SRC_VADC_G3_SR2,
(uint32)&SRC_VADC_G3_SR3,
(uint32)&SRC_VADC_CG0_SR0,
(uint32)&SRC_VADC_CG0_SR1,
(uint32)&SRC_VADC_CG0_SR2,
(uint32)&SRC_VADC_CG0_SR3,
(uint32)&SRC_VADC_CG1_SR0,
(uint32)&SRC_VADC_CG1_SR1,
(uint32)&SRC_VADC_CG1_SR2,
(uint32)&SRC_VADC_CG1_SR3
}
uint32
unsigned long uint32
Definition: Platform_Types.h:116

Definition at line 52 of file IfxVadc_cfg.c.

Referenced by IfxVadc_getSrcAddress().


iLLD_TC26B: lld_api.c File Reference

  • bollusai
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lld_api.c File Reference

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iLLD_TC26B: lld_codingRules.c File Reference

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  • codingRules
lld_codingRules.c File Reference

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iLLD_TC26B: lld_codingRules_codeFormating.c File Reference

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  • codingRules
lld_codingRules_codeFormating.c File Reference

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iLLD_TC26B: lld_codingRules_commonApis.c File Reference

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lld_codingRules_commonApis.c File Reference

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iLLD_TC26B: lld_conventions.c File Reference

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lld_conventions.c File Reference

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iLLD_TC26B: lld_conventionsDoxygen.c File Reference

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lld_conventionsDoxygen.c File Reference

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iLLD_TC26B: lld_dosanddont.c File Reference

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lld_dosanddont.c File Reference

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iLLD_TC26B: lld_dosanddont_enumUsage.c File Reference

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lld_dosanddont_enumUsage.c File Reference

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iLLD_TC26B: lld_dosanddont_namingConvention.c File Reference

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  • dosAndDont
lld_dosanddont_namingConvention.c File Reference

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iLLD_TC26B: lld_dosanddont_optimisation.c File Reference

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lld_dosanddont_optimisation.c File Reference

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iLLD_TC26B: lld_filesAndConfig.c File Reference

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lld_filesAndConfig.c File Reference

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iLLD_TC26B: lld_structure.c File Reference

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lld_structure.c File Reference

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iLLD_TC26B: lld_versioning.c File Reference

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lld_versioning.c File Reference

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iLLD_TC26B: mainpage.c File Reference

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mainpage.c File Reference

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iLLD_TC26B: Platform_Types.h File Reference

  • Cpu
  • Std
Macros | Typedefs
Platform_Types.h File Reference

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Macros

#define | PLATFORM_VENDOR_ID (17u)
#define | PLATFORM_AR_RELEASE_MAJOR_VERSION (4u)
#define | PLATFORM_AR_RELEASE_MINOR_VERSION (2u)
#define | PLATFORM_AR_RELEASE_REVISION_VERSION (2u)
#define | PLATFORM_SW_MAJOR_VERSION (1u)
#define | PLATFORM_SW_MINOR_VERSION (0u)
#define | PLATFORM_SW_PATCH_VERSION (0u)
#define | CPU_TYPE_8 (8u)
#define | CPU_TYPE_16 (16u)
#define | CPU_TYPE_32 (32u)
#define | CPU_TYPE CPU_TYPE_32 /* 32 bit */
#define | MSB_FIRST (0u) /* Big Endian bit ordering */
#define | LSB_FIRST (1u) /* Little Endian bit ordering */
#define | CPU_BIT_ORDER LSB_FIRST /* Little Endian */
#define | HIGH_BYTE_FIRST (0u) /* Big Endian byte ordering */
#define | LOW_BYTE_FIRST (1u) /* Little Endian byte ordering */
#define | CPU_BYTE_ORDER LOW_BYTE_FIRST /* Little Endian */
#define | TRUE (1u)
#define | FALSE (0u)

Typedefs

typedef unsigned char | boolean
typedef unsigned char | uint8
typedef unsigned short | uint16
typedef unsigned long | uint32
typedef unsigned long long | uint64
typedef signed char | sint8
typedef short | sint16
typedef long | sint32
typedef long long | sint64
typedef unsigned long | uint8_least
typedef unsigned long | uint16_least
typedef unsigned long | uint32_least
typedef signed long | sint8_least
typedef signed long | sint16_least
typedef signed long | sint32_least
typedef float | float32
typedef double | float64

Detailed Description

Version
iLLD_1_0_1_12_0
Copyright
Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Platform_Types.h.

Macro Definition Documentation

◆ CPU_BIT_ORDER

#define CPU_BIT_ORDER LSB_FIRST /* Little Endian */

Definition at line 74 of file Platform_Types.h.

◆ CPU_BYTE_ORDER

#define CPU_BYTE_ORDER LOW_BYTE_FIRST /* Little Endian */

Definition at line 83 of file Platform_Types.h.

◆ CPU_TYPE

#define CPU_TYPE CPU_TYPE_32 /* 32 bit */

Definition at line 65 of file Platform_Types.h.

◆ CPU_TYPE_16

#define CPU_TYPE_16 (16u)

Definition at line 62 of file Platform_Types.h.

◆ CPU_TYPE_32

#define CPU_TYPE_32 (32u)

Definition at line 63 of file Platform_Types.h.

◆ CPU_TYPE_8

#define CPU_TYPE_8 (8u)

Definition at line 61 of file Platform_Types.h.

◆ FALSE

#define FALSE (0u)

Definition at line 93 of file Platform_Types.h.

Referenced by Ifx_AngleTrkF32_initConfig(), Ifx_AngleTrkF32_step(), Ifx_Crc_createTable(), Ifx_Crc_init(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_clear(), Ifx_Fifo_init(), Ifx_Fifo_isEmpty(), Ifx_Fifo_read(), Ifx_Fifo_write(), Ifx_GlobalResources_init(), Ifx_Shell_bbProtocolStart(), Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_execute(), Ifx_Shell_init(), Ifx_Shell_initConfig(), Ifx_Shell_isEndOfLine(), Ifx_Shell_matchToken(), Ifx_Shell_parseAddress(), Ifx_Shell_parseFloat32(), Ifx_Shell_parseFloat64(), Ifx_Shell_parseSInt32(), Ifx_Shell_parseSInt64(), Ifx_Shell_parseToken(), Ifx_Shell_parseUInt32(), Ifx_Shell_parseUInt64(), Ifx_Shell_process(), Ifx_Shell_protocolStart(), Ifx_Shell_showHelp(), Ifx_Shell_showHelpSingle(), Ifx_Shell_showHelpSingleCommand(), IfxAsclin_Asc_initiateTransmission(), IfxAsclin_Asc_initModule(), IfxAsclin_Asc_initModuleConfig(), IfxAsclin_Asc_isrTransmit(), IfxAsclin_Asc_stdIfDPipeInit(), IfxAsclin_Lin_ignoreHeader(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_initModuleConfig(), IfxAsclin_Lin_isrError(), IfxAsclin_Lin_isrReceive(), IfxAsclin_Lin_isrTransmit(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_receiveHeader(), IfxAsclin_Lin_receiveResponse(), IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), IfxAsclin_setBitTiming(), IfxAsclin_Spi_initModule(), IfxAsclin_Spi_initModuleConfig(), IfxCcu6_disableDelayBypass(), IfxCcu6_disableModulationOutput(), IfxCcu6_disableMultiChannelMode(), IfxCcu6_disableT13InvertedModulation(), IfxCcu6_disableTrapPin(), IfxCcu6_enableModule(), IfxCcu6_getDeadTimeStatus(), IfxCcu6_getHallPatternSampleState(), IfxCcu6_getInterruptStatusFlag(), IfxCcu6_getShadowTransferStatus(), IfxCcu6_getT12CaptureCompareState(), IfxCcu6_getT12CountDirection(), IfxCcu6_getTimerAvailabilityStatus(), IfxCcu6_getTimerRunStatus(), IfxCcu6_Icu_initChannelConfig(), IfxCcu6_Icu_initModule(), IfxCcu6_Icu_initModuleConfig(), IfxCcu6_Icu_startCapture(), IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmBc_initModuleConfig(), IfxCcu6_PwmBc_start(), IfxCcu6_PwmHl_disable(), IfxCcu6_PwmHl_init(), IfxCcu6_PwmHl_setMode(), IfxCcu6_PwmHl_setupChannels(), IfxCcu6_setT12Frequency(), IfxCcu6_setT13Frequency(), IfxCcu6_Timer_countOneStep(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_initModuleConfig(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_stop(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TimerWithTrigger_run(), IfxCcu6_TPwm_initModule(), IfxCcu6_TPwm_initModuleConfig(), IfxCcu6_TPwm_start(), IfxCcu6_TPwm_stop(), IfxCif_Cam_getLastJpegEncodingInfo(), IfxCif_Cam_init(), IfxCif_Cam_isEmulationExtensionAvailable(), IfxCif_programJpeTable(), IfxCpu_acquireMutex(), IfxCpu_isAddressCachable(), IfxCpu_restoreInterrupts(), IfxCpu_setCoreMode(), IfxCpu_setProgramCounter(), IfxCpu_setSpinLock(), IfxDma_Dma_initChannelConfig(), IfxDma_getDoubleBufferRead(), IfxDsadc_Dsadc_initCarrierGen(), IfxDsadc_Dsadc_initCarrierGenConfig(), IfxDsadc_Dsadc_initChannelConfig(), IfxDsadc_Dsadc_initCombFilter(), IfxDsadc_Dsadc_initFirFilter(), IfxDsadc_Rdc_initConfig(), IfxDsadc_Rdc_initGtmTim(), IfxDsadc_Rdc_initHwChannels(), IfxDsadc_Rdc_update(), IfxDts_Dts_initModuleConfig(), IfxDts_isBusy(), IfxDts_isReady(), IfxEmem_isModuleEnabled(), IfxEray_changePocState(), IfxEray_Eray_Node_initConfig(), IfxEray_getInputBufferBusyHostStatus(), IfxEray_getInputBufferBusyShadowStatus(), IfxEray_getMessageBufferInterruptStatus(), IfxEray_getNewDataInterruptStatus(), IfxEray_getOutputBufferBusyShadowStatus(), IfxEray_setMessageBufferInterruptDestination(), IfxEray_setNewDataInterruptDestination(), IfxEth_getLoopbackMode(), IfxEth_getRxDataLength(), IfxEth_Phy_Pef7071_link(), IfxEth_TxDescr_isAvailable(), IfxFce_Crc_initCrcConfig(), IfxFft_Fft_initDma(), IfxFft_Fft_initJobConfig(), IfxFft_Fft_initModule(), IfxFft_Fft_startJob(), IfxGpt12_IncrEnc_init(), IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_initConfig(), IfxGtm_Atom_Pwm_stop(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_PwmHl_setMode(), IfxGtm_Atom_PwmHl_updateCenterAligned(), IfxGtm_Atom_PwmHl_updateEdgeAligned(), IfxGtm_Atom_PwmHl_updatePulse(), IfxGtm_Atom_PwmHl_updateShiftCenterAligned(), IfxGtm_Atom_Timer_init(), IfxGtm_Cmu_getClkFrequency(), IfxGtm_Cmu_getEclkFrequency(), IfxGtm_Cmu_getFxClkFrequency(), IfxGtm_Cmu_setEclkFrequency(), IfxGtm_Cmu_setGclkFrequency(), IfxGtm_Tim_In_clearNewData(), IfxGtm_Tim_In_init(), IfxGtm_Tim_In_initConfig(), IfxGtm_Tim_In_update(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_initConfig(), IfxGtm_Tom_Pwm_stop(), IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_setMode(), IfxGtm_Tom_PwmHl_updateCenterAligned(), IfxGtm_Tom_PwmHl_updateEdgeAligned(), IfxGtm_Tom_PwmHl_updatePulse(), IfxGtm_Tom_PwmHl_updateShiftCenterAligned(), IfxGtm_Tom_Timer_init(), IfxGtm_Trig_fromDsadc(), IfxGtm_Trig_toVadc(), IfxHssl_Hssl_initChannel(), IfxHssl_Hssl_initHsctModule(), IfxHssl_Hssl_initHsctModuleConfig(), IfxI2c_busIsFree(), IfxI2c_getErrorInterruptSourceStatus(), IfxI2c_getProtocolInterruptSourceStatus(), IfxI2c_I2c_read(), IfxI2c_I2c_write(), IfxI2c_isFifoRequest(), IfxI2c_releaseBus(), IfxIom_Driver_initLam(), IfxIom_Driver_initLamConfig(), IfxIom_Driver_isLamMonGlitch(), IfxIom_Driver_isLamRefGlitch(), IfxMtu_enableErrorTracking(), IfxMtu_isErrorTrackingEnabled(), IfxMtu_isErrorTrackingOverflow(), IfxMultican_Can_initModule(), IfxMultican_Can_MsgObj_init(), IfxMultican_Can_MsgObj_initConfig(), IfxMultican_Can_Node_getConfig(), IfxMultican_Can_Node_init(), IfxMultican_Can_Node_initConfig(), IfxMultican_Message_init(), IfxMultican_MsgObj_cancelSend(), IfxMultican_MsgObj_getStatusFlag(), IfxMultican_MsgObj_isRxPending(), IfxMultican_MsgObj_isTransmitRequested(), IfxMultican_MsgObj_isTxPending(), IfxMultican_MsgObj_readLongFrame(), IfxMultican_MsgObj_sendLongFrame(), IfxMultican_Node_setAnalyzerMode(), IfxMultican_Node_setBitTiming(), IfxMultican_Node_setFastBitTiming(), IfxMultican_Node_setLoopBackMode(), IfxMultican_Node_setNominalBitTiming(), IfxPort_disableEmergencyStop(), IfxPort_enableEmergencyStop(), IfxPort_getPinState(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initChannelConfig(), IfxPsi5_Psi5_initModule(), IfxPsi5_Psi5_readChannelFrame(), IfxPsi5_Psi5_sendChannelData(), IfxPsi5s_Psi5s_initChannel(), IfxPsi5s_Psi5s_initChannelConfig(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_Psi5s_initModuleConfig(), IfxPsi5s_Psi5s_sendChannelData(), IfxPsi5s_Psi5s_setBaudrate(), IfxQspi_calculateDelayConstants(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_calculateTimeQuantumLength(), IfxQspi_isModuleEnabled(), IfxQspi_recalcBasicConfiguration(), IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_initModuleConfig(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_exchange(), IfxQspi_SpiSlave_initModule(), IfxQspi_SpiSlave_initModuleConfig(), IfxQspi_SpiSlave_isrDmaReceive(), IfxQspi_SpiSlave_isrError(), IfxQspi_SpiSlave_read(), IfxScuEru_disableAutoClear(), IfxScuEru_disableFallingEdgeDetection(), IfxScuEru_disablePatternDetectionTrigger(), IfxScuEru_disableRisingEdgeDetection(), IfxScuEru_disableTriggerPulse(), IfxScuEru_getEventFlagStatus(), IfxScuEru_getPatternDetectionResult(), IfxScuWdt_initConfig(), IfxSent_Sent_initChannelConfig(), IfxSent_Sent_initModule(), IfxSmu_initFsp(), IfxSmu_initFspConfig(), IfxSmu_unlock(), IfxSrc_isOverrun(), IfxSrc_isRequested(), IfxStdIf_Pos_initConfig(), IfxStdIf_PwmHl_initConfig(), IfxStdIf_Timer_initConfig(), IfxStm_initCompare(), IfxStm_isDeadLine(), IfxStm_Timer_init(), IfxStm_wait(), IfxVadc_Adc_getChannelConfig(), IfxVadc_Adc_getGroupConfig(), IfxVadc_Adc_initChannel(), IfxVadc_Adc_initChannelConfig(), IfxVadc_Adc_initGroup(), IfxVadc_Adc_initGroupConfig(), IfxVadc_Adc_initModuleConfig(), IfxVadc_isPostCalibration(), IfxVadc_setArbiterPriority(), IfxVadc_startupCalibration(), isDeadLine(), poll(), SpiIf_wait(), and wait().

◆ HIGH_BYTE_FIRST

#define HIGH_BYTE_FIRST (0u) /* Big Endian byte ordering */

Definition at line 80 of file Platform_Types.h.

◆ LOW_BYTE_FIRST

#define LOW_BYTE_FIRST (1u) /* Little Endian byte ordering */

Definition at line 81 of file Platform_Types.h.

◆ LSB_FIRST

#define LSB_FIRST (1u) /* Little Endian bit ordering */

Definition at line 72 of file Platform_Types.h.

◆ MSB_FIRST

#define MSB_FIRST (0u) /* Big Endian bit ordering */

Definition at line 71 of file Platform_Types.h.

◆ PLATFORM_AR_RELEASE_MAJOR_VERSION

#define PLATFORM_AR_RELEASE_MAJOR_VERSION (4u)

Definition at line 52 of file Platform_Types.h.

◆ PLATFORM_AR_RELEASE_MINOR_VERSION

#define PLATFORM_AR_RELEASE_MINOR_VERSION (2u)

Definition at line 53 of file Platform_Types.h.

◆ PLATFORM_AR_RELEASE_REVISION_VERSION

#define PLATFORM_AR_RELEASE_REVISION_VERSION (2u)

Definition at line 54 of file Platform_Types.h.

◆ PLATFORM_SW_MAJOR_VERSION

#define PLATFORM_SW_MAJOR_VERSION (1u)

Definition at line 55 of file Platform_Types.h.

◆ PLATFORM_SW_MINOR_VERSION

#define PLATFORM_SW_MINOR_VERSION (0u)

Definition at line 56 of file Platform_Types.h.

◆ PLATFORM_SW_PATCH_VERSION

#define PLATFORM_SW_PATCH_VERSION (0u)

Definition at line 57 of file Platform_Types.h.

◆ PLATFORM_VENDOR_ID

#define PLATFORM_VENDOR_ID (17u)

Definition at line 51 of file Platform_Types.h.

◆ TRUE

#define TRUE (1u)

Definition at line 90 of file Platform_Types.h.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), Ifx_Console_print(), Ifx_Console_printAlign(), Ifx_Crc_createTable(), Ifx_Crc_init(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_clear(), Ifx_Fifo_init(), Ifx_Fifo_isEmpty(), Ifx_GlobalResources_init(), Ifx_Shell_bbProtocolStart(), Ifx_Shell_init(), Ifx_Shell_initConfig(), Ifx_Shell_isEndOfLine(), Ifx_Shell_matchToken(), Ifx_Shell_parseSInt32(), Ifx_Shell_parseToken(), Ifx_Shell_parseUInt32(), Ifx_Shell_parseUInt64(), Ifx_Shell_process(), Ifx_Shell_protocolStart(), Ifx_Shell_showHelp(), Ifx_Shell_showHelpSingleCommand(), IfxAsclin_Asc_blockingRead(), IfxAsclin_Asc_initiateTransmission(), IfxAsclin_Asc_initModule(), IfxAsclin_Asc_isrReceive(), IfxAsclin_Asc_stdIfDPipeInit(), IfxAsclin_Asc_write(), IfxAsclin_initCtsPin(), IfxAsclin_Lin_initModuleConfig(), IfxAsclin_Lin_isrError(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), IfxAsclin_setBitTiming(), IfxAsclin_Spi_initModule(), IfxCcu6_clearDeadTimeCounters(), IfxCcu6_disableModule(), IfxCcu6_enableDelayBypass(), IfxCcu6_enableHallPatternShadowTransfer(), IfxCcu6_enableModulationOutput(), IfxCcu6_enableMultiChannelMode(), IfxCcu6_enableMultiChannelPwmPatternShadowTransfer(), IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer(), IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer(), IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer(), IfxCcu6_enableT13InvertedModulation(), IfxCcu6_enableTrapPin(), IfxCcu6_getDeadTimeStatus(), IfxCcu6_getHallPatternSampleState(), IfxCcu6_getInterruptStatusFlag(), IfxCcu6_getShadowTransferStatus(), IfxCcu6_getT12CaptureCompareState(), IfxCcu6_getT12CountDirection(), IfxCcu6_getTimerAvailabilityStatus(), IfxCcu6_getTimerRunStatus(), IfxCcu6_Icu_startCapture(), IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_initModuleConfig(), IfxCcu6_PwmBc_start(), IfxCcu6_PwmBc_stop(), IfxCcu6_PwmHl_enable(), IfxCcu6_PwmHl_init(), IfxCcu6_PwmHl_setDeadtime(), IfxCcu6_PwmHl_setMinPulse(), IfxCcu6_PwmHl_setMode(), IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxCcu6_setT12Frequency(), IfxCcu6_setT13Frequency(), IfxCcu6_Timer_countOneStep(), IfxCcu6_Timer_initModuleConfig(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_stop(), IfxCcu6_Timer_synchronousStart(), IfxCcu6_Timer_synchronousStop(), IfxCcu6_TimerWithTrigger_applyUpdate(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TimerWithTrigger_run(), IfxCcu6_TimerWithTrigger_setPeriod(), IfxCcu6_TimerWithTrigger_stdIfTimerInit(), IfxCcu6_TimerWithTrigger_stop(), IfxCcu6_TPwm_initModuleConfig(), IfxCcu6_TPwm_start(), IfxCcu6_TPwm_stop(), IfxCif_Cam_getLastJpegEncodingInfo(), IfxCif_Cam_isEmulationExtensionAvailable(), IfxCif_programJpeTable(), IfxCpu_acquireMutex(), IfxCpu_isAddressCachable(), IfxCpu_setCoreMode(), IfxCpu_setProgramCounter(), IfxCpu_setSpinLock(), IfxCpu_startCore(), IfxDma_getAndClearChannelInterrupt(), IfxDma_getAndClearChannelPatternDetectionInterrupt(), IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(), IfxDma_getAndClearChannelWrapSourceBufferInterrupt(), IfxDsadc_Dsadc_initChannelConfig(), IfxDsadc_Rdc_init(), IfxDsadc_Rdc_initHwChannels(), IfxDsadc_Rdc_initHwTimestamp(), IfxDsadc_Rdc_stdIfPosInit(), IfxDts_Dts_initModule(), IfxDts_isBusy(), IfxDts_isReady(), IfxEmem_isModuleEnabled(), IfxEray_changePocState(), IfxEray_Eray_Node_initConfig(), IfxEray_Eray_Node_initMessageRAM(), IfxEray_Eray_receiveFifoFrame(), IfxEray_Eray_receiveFrame(), IfxEray_Eray_transmitFrame(), IfxEray_Eray_wakeUpChannel(), IfxEray_getInputBufferBusyHostStatus(), IfxEray_getInputBufferBusyShadowStatus(), IfxEray_getMessageBufferInterruptStatus(), IfxEray_getNewDataInterruptStatus(), IfxEray_getOutputBufferBusyShadowStatus(), IfxEray_setSlot(), IfxEth_getLoopbackMode(), IfxEth_Phy_Pef7071_link(), IfxEth_TxDescr_isAvailable(), IfxFce_Crc_initCrcConfig(), IfxFft_Fft_initDma(), IfxGpt12_IncrEnc_init(), IfxGpt12_IncrEnc_initConfig(), IfxGpt12_IncrEnc_stdIfPosInit(), IfxGtm_Atom_Ch_getClockFrequency(), IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_initConfig(), IfxGtm_Atom_Pwm_start(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_PwmHl_initConfig(), IfxGtm_Atom_PwmHl_setDeadtime(), IfxGtm_Atom_PwmHl_setMinPulse(), IfxGtm_Atom_PwmHl_setMode(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_Timer_init(), IfxGtm_Atom_Timer_initConfig(), IfxGtm_Atom_Timer_run(), IfxGtm_Atom_Timer_setPeriod(), IfxGtm_Atom_Timer_stdIfTimerInit(), IfxGtm_Atom_Timer_stop(), IfxGtm_Cmu_setEclkFrequency(), IfxGtm_Cmu_setGclkFrequency(), IfxGtm_Tbu_getClockFrequency(), IfxGtm_Tim_Ch_getCaptureClockFrequency(), IfxGtm_Tim_Ch_getFilterClockFrequency(), IfxGtm_Tim_Ch_getTimeoutClockFrequency(), IfxGtm_Tim_In_init(), IfxGtm_Tom_Ch_getClockFrequency(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_initConfig(), IfxGtm_Tom_Pwm_start(), IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_initConfig(), IfxGtm_Tom_PwmHl_setDeadtime(), IfxGtm_Tom_PwmHl_setMinPulse(), IfxGtm_Tom_PwmHl_setMode(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_Timer_init(), IfxGtm_Tom_Timer_initConfig(), IfxGtm_Tom_Timer_run(), IfxGtm_Tom_Timer_setPeriod(), IfxGtm_Tom_Timer_stdIfTimerInit(), IfxGtm_Tom_Timer_stop(), IfxHssl_Hssl_prepareStream(), IfxI2c_busIsFree(), IfxI2c_getErrorInterruptSourceStatus(), IfxI2c_getProtocolInterruptSourceStatus(), IfxI2c_I2c_write(), IfxI2c_isFifoRequest(), IfxIom_Driver_init(), IfxIom_Driver_initLam(), IfxMtu_isErrorTrackingEnabled(), IfxMtu_isErrorTrackingOverflow(), IfxMultican_Can_MsgObj_init(), IfxMultican_Can_MsgObj_initConfig(), IfxMultican_Can_Node_getConfig(), IfxMultican_Can_Node_init(), IfxMultican_MsgObj_cancelSend(), IfxMultican_MsgObj_getStatusFlag(), IfxMultican_MsgObj_isRxPending(), IfxMultican_MsgObj_isTransmitRequested(), IfxMultican_MsgObj_isTxPending(), IfxMultican_MsgObj_readLongFrame(), IfxMultican_MsgObj_sendLongFrame(), IfxMultican_Node_initRxPin(), IfxMultican_Node_initTxPin(), IfxPort_disableEmergencyStop(), IfxPort_enableEmergencyStop(), IfxPort_getPinState(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initModule(), IfxPsi5_Psi5_readChannelFrame(), IfxPsi5_Psi5_readChannelSerialMessage(), IfxPsi5_Psi5_sendChannelData(), IfxPsi5_Psi5_startupChannel(), IfxPsi5s_Psi5s_initChannel(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_Psi5s_initModuleConfig(), IfxPsi5s_Psi5s_sendChannelData(), IfxQspi_calculateDelayConstants(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_isModuleEnabled(), IfxQspi_SpiMaster_exchange(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_exchange(), IfxQspi_SpiSlave_initModule(), IfxScuCcu_initErayPll(), IfxScuEru_enableAutoClear(), IfxScuEru_enableFallingEdgeDetection(), IfxScuEru_enablePatternDetectionTrigger(), IfxScuEru_enableRisingEdgeDetection(), IfxScuEru_enableTriggerPulse(), IfxScuEru_getEventFlagStatus(), IfxScuEru_getPatternDetectionResult(), IfxSent_Sent_initChannel(), IfxSent_Sent_initChannelConfig(), IfxSent_Sent_initModule(), IfxSent_Sent_initModuleConfig(), IfxSent_Sent_readChannelSerialDataFrame(), IfxSent_Sent_readChannelSerialMessageFrame(), IfxSmu_initFsp(), IfxSmu_unlock(), IfxSrc_isOverrun(), IfxSrc_isRequested(), IfxStm_initCompare(), IfxStm_Timer_init(), IfxStm_Timer_setPeriod(), IfxStm_Timer_stdIfTimerInit(), IfxVadc_Adc_clearQueue(), IfxVadc_Adc_getChannelConfig(), IfxVadc_Adc_getGroupConfig(), IfxVadc_Adc_initGroup(), IfxVadc_Adc_initGroupConfig(), IfxVadc_Adc_initModule(), IfxVadc_disablePostCalibration(), and IfxVadc_startupCalibration().

Typedef Documentation

◆ boolean

typedef unsigned char boolean

Definition at line 104 of file Platform_Types.h.

◆ float32

typedef float float32

Definition at line 170 of file Platform_Types.h.

◆ float64

typedef double float64

Definition at line 175 of file Platform_Types.h.

◆ sint16

typedef short sint16

Definition at line 129 of file Platform_Types.h.

◆ sint16_least

typedef signed long sint16_least

Definition at line 161 of file Platform_Types.h.

◆ sint32

typedef long sint32

Definition at line 134 of file Platform_Types.h.

◆ sint32_least

typedef signed long sint32_least

Definition at line 165 of file Platform_Types.h.

◆ sint64

typedef long long sint64

Definition at line 141 of file Platform_Types.h.

◆ sint8

typedef signed char sint8

Definition at line 125 of file Platform_Types.h.

◆ sint8_least

typedef signed long sint8_least

Definition at line 157 of file Platform_Types.h.

◆ uint16

typedef unsigned short uint16

Definition at line 112 of file Platform_Types.h.

◆ uint16_least

typedef unsigned long uint16_least

Definition at line 149 of file Platform_Types.h.

◆ uint32

typedef unsigned long uint32

Definition at line 116 of file Platform_Types.h.

◆ uint32_least

typedef unsigned long uint32_least

Definition at line 153 of file Platform_Types.h.

◆ uint64

typedef unsigned long long uint64

Definition at line 121 of file Platform_Types.h.

◆ uint8

typedef unsigned char uint8

Definition at line 108 of file Platform_Types.h.

◆ uint8_least

typedef unsigned long uint8_least

Definition at line 145 of file Platform_Types.h.


iLLD_TC26B: SpiIf.c File Reference

  • Service
  • CpuGeneric
  • If
Functions
SpiIf.c File Reference

SPI interface. More...

#include "SpiIf.h"
Include dependency graph for SpiIf.c:

Go to the source code of this file.

Functions

void | SpiIf_initConfig (SpiIf_Config *config)
void | SpiIf_initChannelConfig (SpiIf_ChConfig *config, SpiIf *driver)

Detailed Description

SPI interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:21 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file SpiIf.c.


iLLD_TC26B: SpiIf.h File Reference

  • Service
  • CpuGeneric
  • If
Data Structures | Typedefs | Enumerations | Functions
SpiIf.h File Reference

SPI interface types. More...

#include "Src/Std/IfxSrc.h"
Include dependency graph for SpiIf.h:

Go to the source code of this file.

Data Structures

struct | SpiIf_Flags
struct | SpiIf_Job
struct | SpiIf_funcs
struct | SpiIf_
struct | SpiIf_Config
struct | Spi_ErrorChecks
struct | SpiIf_ChMode
struct | SpiIf_Ch_
struct | SpiIf_ChConfig_

Typedefs

typedef struct SpiIf_Ch_ | SpiIf_Ch
Alias to the channel structure. More...
typedef struct SpiIf_ChConfig_ | SpiIf_ChConfig
typedef struct SpiIf_ | SpiIf
typedef SpiIf_Status(* | SpiIf_Exchange) (SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
typedef SpiIf_Status(* | SpiIf_GetStatus) (SpiIf_Ch *handle)
typedef void(* | SpiIf_OnEvent) (SpiIf *handle)
typedef uint32 | SpiIf_SlsoTiming_HalfTsclk
typedef void(* | SpiIf_Cbk) (void *data)
SPI channel callback prototype. More...
typedef void(* | TxRxHandler) (SpiIf_Ch *handle)

Enumerations

enum SpiIf_Status {
SpiIf_Status_ok,
SpiIf_Status_busy,
SpiIf_Status_unknown
}
SPI Interface Status. More...
enum SpiIf_SlsoTiming {
SpiIf_SlsoTiming_0 = 0,
SpiIf_SlsoTiming_1,
SpiIf_SlsoTiming_2,
SpiIf_SlsoTiming_3,
SpiIf_SlsoTiming_4,
SpiIf_SlsoTiming_5,
SpiIf_SlsoTiming_6,
SpiIf_SlsoTiming_7
}
Slave select output timing. More...
enum SpiIf_DataHeading {
SpiIf_DataHeading_lsbFirst = 0,
SpiIf_DataHeading_msbFirst
}
Heading. More...
enum SpiIf_ShiftClock {
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge = 0,
SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge
}
Clock phase. More...
enum SpiIf_ClockPolarity {
SpiIf_ClockPolarity_idleLow = 0,
SpiIf_ClockPolarity_idleHigh
}
Clock polarity. More...
enum SpiIf_Mode {
SpiIf_Mode_master,
SpiIf_Mode_slave,
SpiIf_Mode_undefined
}

Functions

IFX_INLINE void | SpiIf_wait (SpiIf_Ch *handle)
IFX_EXTERN void | SpiIf_initConfig (SpiIf_Config *config)
IFX_EXTERN void | SpiIf_initChannelConfig (SpiIf_ChConfig *config, SpiIf *driver)
Virtual functions

These functions are implemented by a driver.

IFX_INLINE SpiIf_Status | SpiIf_exchange (SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
IFX_INLINE SpiIf_Status | SpiIf_getStatus (SpiIf_Ch *handle)

Detailed Description

SPI interface types.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:22 GMT
                            IMPORTANT NOTICE

Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use are agreed, use of this file is subject to following:

Boost Software License - Version 1.0 - August 17th, 2003

Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following:

The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file SpiIf.h.


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- $ -

  • $ $sb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- _ -

  • ___setareg : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsTasking.h
  • __abs : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __abs_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __absb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __absdif : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __absf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __absh : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __abss : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __abssh : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __addr_to_cx() : IfxCpu_Intrinsics.h
  • __adds : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h
  • __addsu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __asm__ : Ifx_TypesTasking.h
  • __bisr : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __cacheai : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __cacheawi : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h
  • __cacheawi_bo_post_inc : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __cacheiwi : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __checkrange : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __checkrangef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __checkrangeX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __clo : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __cls : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __clssf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __clz : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __cmpAndSwap : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __crc32 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • __CSA : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __CSA_END : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __cx_to_addr() : IfxCpu_Intrinsics.h
  • __debug : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __disable : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __disable_and_save : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __dsync : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __enable : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __extr : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __extractbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extracthw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extracthw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractubyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extru : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __fabs : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __fabsf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __fixpoint_to_float32 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __float_to_fract : IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h
  • __float_to_sfract : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h
  • __fract_to_float : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __fract_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __geqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __getA11 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __getbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getDataParamRet : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __getfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __gethw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __gethw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getubyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __imaskldmst : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __initcirc() : IfxCpu_IntrinsicsDcc.h
  • __initpackb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __initpackbl : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __initpackhw : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __initpackhwl : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __initupackb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __initupackhw : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __ins : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __insert : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __insertbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __inserthw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __inserthw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertubyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertuhw2 : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h
  • __insn : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __interrupt : Ifx_TypesGhs.h , Ifx_TypesGnuc.h
  • __INTTAB : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __INTTAB_CPU : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __ISTACK : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __isync : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __jump_and_link : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __jumpBackToLink : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __jumpToFunction : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __jumpToFunctionWithLink : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __ld32() : IfxCpu_Intrinsics.h
  • __ld64() : IfxCpu_Intrinsics.h
  • __ld64_lu() : IfxCpu_Intrinsics.h
  • __ldmst : IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h
  • __ldmst_c() : IfxCpu_Intrinsics.h
  • __ldmstAsm : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __ldmstC : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __leqf : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking2G.h
  • __mac_r_sf : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __mac_sf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h
  • __max : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __max_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __maxf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __maxs : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __maxu : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __maxX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc2G.h
  • __mem_barrier : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc2G.h
  • __mfcr : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __min : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __min_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __minb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __minbu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __minf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __minh : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __minhu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __mins : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __minu : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __minX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc2G.h
  • __moveToAddrParam0 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc2G.h
  • __moveToDataParam0 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc2G.h
  • __moveToDataParamRet : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc2G.h
  • __mtcr : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __mtcr_no_isync : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __mulfractfract : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __mulfractlong : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __mulsc : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __neqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc.h
  • __non_return_call : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h
  • __nop : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __nops : IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc2G.h
  • __nops1000 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • __packb : Ifx_TypesGhs.h , Ifx_TypesDcc.h , Ifx_TypesGnuc.h
  • __packhw : Ifx_TypesGnuc.h , Ifx_TypesGhs.h , Ifx_TypesDcc.h
  • __parity : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc2G.h
  • __popcnt : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __putbit : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __restore : IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc2G.h
  • __rol : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h
  • __ror : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc2G.h
  • __round16 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • __roundf : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h
  • __rslcx() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __s16_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h
  • __satb : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • __satbu : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __sath : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • __sathu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __saturate : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking2G.h
  • __saturate_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc2G.h
  • __saturatef : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc2G.h
  • __saturateu : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __saturateX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking2G.h
  • __scheduling_barrier() : IfxCpu_IntrinsicsDcc.h
  • __SDATA1 : CompilerGhs.h , CompilerDcc.h , CompilerGnuc.h , CompilerTasking.h
  • __SDATA2 : CompilerGnuc.h , CompilerTasking.h , CompilerGhs.h , CompilerDcc.h
  • __SDATA3 : CompilerTasking.h , CompilerGnuc.h , CompilerGhs.h , CompilerDcc.h
  • __SDATA4 : CompilerTasking.h , CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h
  • __setareg : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __setbyte1 : IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h
  • __setbyte2 : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs2G.h
  • __setbyte3 : IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h
  • __setbyte4 : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs2G.h
  • __sethw1 : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h
  • __sethw2 : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h
  • __setStackPointer : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h
  • __setubyte1 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • __setubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs2G.h
  • __setubyte3 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc2G.h
  • __setubyte4 : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs2G.h
  • __setuhw1 : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h
  • __setuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc2G.h
  • __sfract_to_s16 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc2G.h
  • __sfract_to_u16 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc2G.h
  • __shaaccum : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc2G.h
  • __shafracts : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h
  • __shasfracts : IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __sqrf : IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc2G.h
  • __sqrtf : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs2G.h
  • __st32() : IfxCpu_Intrinsics.h
  • __st64() : IfxCpu_Intrinsics.h
  • __st64_lu() : IfxCpu_Intrinsics.h
  • __stopPerfCounters : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __subs : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking2G.h
  • __subsu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h
  • __svlcx : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __swap : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc.h
  • __syscall : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __TRAPTAB : CompilerGnuc.h , CompilerGhs.h , CompilerTasking.h , CompilerDcc.h
  • __TRAPTAB_CPU : CompilerGnuc.h , CompilerDcc.h , CompilerGhs.h , CompilerTasking.h
  • __tric_syscall : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __u16_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __upackb : Ifx_TypesGhs.h , Ifx_TypesGnuc.h , Ifx_TypesDcc.h
  • __upackhw : Ifx_TypesGnuc.h , Ifx_TypesDcc.h , Ifx_TypesGhs.h
  • __USTACK : CompilerTasking.h , CompilerDcc.h , CompilerGnuc.h , CompilerGhs.h
  • _Core0_start() : IfxCpu_CStart0.c
  • _Core1_start() : IfxCpu_CStart1.c , IfxCpu_CStart.h
  • _Core2_start() : IfxCpu_CStart.h
  • _DATAF : Ifx_Cf32.h
  • _START() : IfxCpu_CStart0.c


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- a -

  • ABCQMAX : IfxQspi.c
  • ABCQMIN : IfxQspi.c
  • abs : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • absdif : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • abss : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • adds : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • addTTime() : Bsp.h
  • areInterruptsEnabled() : Bsp.h
  • Assert_level : Assert.c
  • ATO_K : Ifx_AngleTrkF32.c
  • ATO_PSI : Ifx_AngleTrkF32.c
  • ATO_T : Ifx_AngleTrkF32.c


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- b -

  • bisr : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • boolean : Platform_Types.h
  • BootModeHeader_0 : IfxCpu_CStart0.c
  • BootModeHeader_1 : IfxCpu_CStart0.c
  • BSP_DEFAULT_TIMER : Bsp.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- c -

  • CFG_LONG_SIZE_T : Compilers.h
  • circ_t : Ifx_TypesDcc.h
  • clo : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • cls : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • clz : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • COMPILER_NAME : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • COMPILER_REVISION : CompilerTasking.h , CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h
  • COMPILER_VERSION : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • CONSOLE : Ifx_Console.h
  • CONST_CFG : Compilers.h
  • core0_main() : IfxCpu_CStart0.c
  • core1_main() : IfxCpu_CStart1.c
  • Cplx_f32_printf : Ifx_Cf32.h
  • CplxVecCpy_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • CplxVecCpy_f32S() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecMag_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • CplxVecMul_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecPwr_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • CplxVecRst_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • CPU_BIT_ORDER : Platform_Types.h
  • CPU_BYTE_ORDER : Platform_Types.h
  • CPU_TYPE : Platform_Types.h
  • CPU_TYPE_16 : Platform_Types.h
  • CPU_TYPE_32 : Platform_Types.h
  • CPU_TYPE_8 : Platform_Types.h
  • CRC_ENABLE_DPIPE : Ifx_Crc.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- d -

  • DateTime_get() : Ifx_DateTime.c , Ifx_DateTime.h
  • DateTime_set() : Ifx_DateTime.h , Ifx_DateTime.c
  • debug : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • disable : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • disableInterrupts() : Bsp.h
  • dsync : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- e -

  • elapsed() : Bsp.h
  • enable : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • enableInterrupts() : Bsp.h
  • ENDL : IfxStdIf_DPipe.h
  • extr : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- f -

  • FALSE : Platform_Types.h
  • float32 : Platform_Types.h
  • float64 : Platform_Types.h
  • forceDisableInterrupts() : Bsp.h
  • fract : Ifx_TypesGnuc.h , Ifx_TypesGhs.h , Ifx_TypesTasking.h , Ifx_TypesDcc.h
  • FRACT_MAX : Ifx_TypesDcc.h , Ifx_TypesGnuc.h , Ifx_TypesGhs.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- g -

  • g_DateTimeOffset : Ifx_DateTime.c
  • getDeadLine() : Bsp.h
  • getTimeout() : Bsp.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- h -

  • h : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • HIGH_BYTE_FIRST : Platform_Types.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- i -

Icu : Icu.h

Icu_GetTimeStamp : Icu.h

Icu_StartCapture : Icu.h

Icu_StopCapture : Icu.h

Ifx___setareg : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__abs : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h

Ifx__abs_stdreal : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__absb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__absdif : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__absf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__absh() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__abss : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__abssh() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__adds : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__addsu : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__bisr : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h

Ifx__cacheai() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h

Ifx__cacheawi : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__cacheawi_bo_post_inc() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__cacheiwi() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__checkrange : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__checkrangef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__checkrangeX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__clo : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__cls : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__clssf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__clz : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h

Ifx__cmpAndSwap : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h

Ifx__crc32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h

Ifx__debug : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__disable : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h

Ifx__disable_and_save : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__dsync : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__enable : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extr : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extracthw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extracthw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extractuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__extru : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__fabs() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__fabsf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__fixpoint_to_float32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__float_to_fract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__float_to_sfract() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__fract_to_float : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__fract_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__geqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__getA11() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__getbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h

Ifx__getbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getDataParamRet() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__getfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__gethw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__gethw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__getuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__imaskldmst : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h

Ifx__initpackb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__initpackbl() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__initpackhw() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__initpackhwl() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__initupackb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__initupackhw() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__ins : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insert : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__inserthw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__inserthw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insertuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__insn : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__isync : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__jump_and_link() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__jumpBackToLink() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__jumpToFunction() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__jumpToFunctionWithLink() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__ldmst : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__ldmstAsm() : IfxCpu_IntrinsicsTasking.h

Ifx__leqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__mac_r_sf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__mac_sf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__max : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__max_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__maxf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__maxs : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__maxu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__maxX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__mem_barrier : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__mfcr : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h

Ifx__min : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__min_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__minb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__minbu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__minf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__minh() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__minhu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__mins : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__minu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__minX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__moveToAddrParam0() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__moveToDataParam0() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__moveToDataParamRet() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__mtcr : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h

Ifx__mtcr_no_isync : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__mulfractfract : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__mulfractlong : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__mulsc() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__neqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__non_return_call : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h

Ifx__nop : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__NOP : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__nops() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h

Ifx__nops1000() : IfxCpu_IntrinsicsDcc.h

Ifx__parity() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__popcnt() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__putbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h

Ifx__restore : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__rol() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__ror() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__round16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__roundf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__rslcx : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__s16_to_sfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__satb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__satbu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__sath() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__sathu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__saturate : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__saturate_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__saturatef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__saturateu : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__saturateX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__setareg : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__setbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__sethw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__sethw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setStackPointer() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__setubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__setuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__sfract_to_s16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__sfract_to_u16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__shaaccum() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__shafracts() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__shasfracts() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__sqrf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__sqrtf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

Ifx__stopPerfCounters() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h

Ifx__subs : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__subsu : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h

Ifx__svlcx : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h

Ifx__swap() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx__syscall : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h

Ifx__u16_to_sfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h

Ifx_ActiveState : Ifx_Types.h

Ifx_ActiveState_high : Ifx_Types.h

Ifx_ActiveState_low : Ifx_Types.h

Ifx_AddressValue : Ifx_Types.h

IFX_ALIGN : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

IFX_ALIGN_128 : IfxCpu_Intrinsics.h

IFX_ALIGN_16 : IfxCpu_Intrinsics.h

IFX_ALIGN_256 : IfxCpu_Intrinsics.h

IFX_ALIGN_32 : IfxCpu_Intrinsics.h

IFX_ALIGN_64 : IfxCpu_Intrinsics.h

IFX_ALIGN_8 : IfxCpu_Intrinsics.h

Ifx_AlignOn128 : IfxCpu_Intrinsics.h

Ifx_AlignOn16 : IfxCpu_Intrinsics.h

Ifx_AlignOn256 : IfxCpu_Intrinsics.h

Ifx_AlignOn32 : IfxCpu_Intrinsics.h

Ifx_AlignOn64 : IfxCpu_Intrinsics.h

Ifx_AlignOn8 : IfxCpu_Intrinsics.h

IFX_ANGLETRKF32_ATAN2F : Ifx_AngleTrkF32.c

Ifx_AngleTrkF32_bound() : Ifx_AngleTrkF32.c

Ifx_AngleTrkF32_boundInput() : Ifx_AngleTrkF32.c

Ifx_AngleTrkF32_getAbsolutePosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getDirection() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getFault() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getLoopSpeed() : Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getOffset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getPeriodPerRotation() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getPosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getRawPosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getRefreshPeriod() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getResolution() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getSensorType() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getSpeed() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_getTurn() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_init() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_initConfig() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_reset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_resetFaults() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_setControlGains() : Ifx_AngleTrkF32.c

Ifx_AngleTrkF32_setOffset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_setRefreshPeriod() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_setUserSampling() : Ifx_AngleTrkF32.c

Ifx_AngleTrkF32_stdIfPosInit() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_step() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_update() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

Ifx_AngleTrkF32_updateStatus() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h

IFX_ASSERT : Ifx_Assert.h , Assert.h

Ifx_Assert_doLevel() : Assert.c , Assert.h

Ifx_Assert_doValidate() : Assert.c , Assert.h

IFX_ASSERT_FEATURE_NOT_AVAILABLE : Ifx_Assert.h

IFX_ASSERT_FEATURE_NOT_IMPLEMENTED : Ifx_Assert.h

Ifx_Assert_setStandardIo : Assert.h

Ifx_C_Init() : Compilers.h

IFX_Cf32_add() : Ifx_Cf32.h

IFX_Cf32_amp() : Ifx_Cf32.h

IFX_Cf32_div() : Ifx_Cf32.h

IFX_Cf32_dot() : Ifx_Cf32.h

IFX_Cf32_exp() : Ifx_Cf32.h

IFX_Cf32_mag() : Ifx_Cf32.h

IFX_Cf32_mul() : Ifx_Cf32.h

IFX_Cf32_reset() : Ifx_Cf32.h

IFX_Cf32_saturate() : Ifx_Cf32.h

IFX_Cf32_set() : Ifx_Cf32.h

IFX_Cf32_sub() : Ifx_Cf32.h

IFX_CFG_ANGLETRKF32_FILTERED_SPEED : Ifx_AngleTrkF32.h

IFX_CFG_ANGLETRKF32_SPEED_FILTER : Ifx_AngleTrkF32.h

IFX_CFG_ASSERT_STDIO : Assert.h

IFX_CFG_ASSERT_USE_BREAKPOINT : Assert.h

IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT : Assert.h

IFX_CFG_CIRCULARBUFFER_C : Ifx_CircularBuffer.h

IFX_CFG_CONSOLE_INDENT_SIZE : Ifx_Console.h

IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 : IfxCpu_CStart0.c

IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE : IfxCpu_CStart0.c

IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE : IfxCpu_CStart0.c

IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 : IfxCpu_CStart0.c

IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE : IfxCpu_CStart1.c

IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE : IfxCpu_CStart1.c

IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK : IfxCpu_CStart.h

IFX_CFG_CPU_TRAP_ASSERT_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_BE_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_CME_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_DEBUG : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_IE_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_IPE_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_MME_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_NMI_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK : IfxCpu_Trap.c

IFX_CFG_CPU_TRAP_TSR_HOOK : IfxCpu_Trap.c

IFX_CFG_GLOBAL_RESOURCES_ENABLED : Ifx_GlobalResources.h

IFX_CFG_SCU_PLL_FREQUENCY : IfxScu_cfg.h

IFX_CFG_SCU_XTAL_FREQUENCY : IfxScu_cfg.h

IFX_CFG_SHELL_CMD_HISTORY_SIZE : Ifx_Shell.h

IFX_CFG_SHELL_CMD_LINE_SIZE : Ifx_Shell.h

IFX_CFG_SHELL_COMMAND_LISTS : Ifx_Shell.h

IFX_CFG_SHELL_PROMPT : Ifx_Shell.h

Ifx_CircularBuffer_addDataIncr() : Ifx_CircularBuffer.c

Ifx_CircularBuffer_get16() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h

Ifx_CircularBuffer_get32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h

Ifx_CircularBuffer_read32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h

Ifx_CircularBuffer_read8() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h

Ifx_CircularBuffer_write32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h

Ifx_CircularBuffer_write8() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h

Ifx_ClpxFloat32_Integral_init() : Ifx_IntegralF32.c , Ifx_IntegralF32.h

Ifx_ClpxFloat32_Integral_reset() : Ifx_IntegralF32.c , Ifx_IntegralF32.h

Ifx_ClpxFloat32_Integral_step() : Ifx_IntegralF32.c , Ifx_IntegralF32.h

Ifx_Console_decrAlign() : Ifx_Console.h

Ifx_Console_getIo() : Ifx_Console.h

Ifx_Console_incrAlign() : Ifx_Console.h

Ifx_Console_init() : Ifx_Console.c , Ifx_Console.h

Ifx_Console_print() : Ifx_Console.c , Ifx_Console.h

Ifx_Console_printAlign() : Ifx_Console.c , Ifx_Console.h

IFX_CONST : Compilers.h

Ifx_COUNTOF : IfxCpu_Intrinsics.h

Ifx_Crc_bitByBit() : Ifx_Crc.c , Ifx_Crc.h

Ifx_Crc_bitByBitFast() : Ifx_Crc.c , Ifx_Crc.h

Ifx_Crc_createTable() : Ifx_Crc.c , Ifx_Crc.h

Ifx_Crc_init() : Ifx_Crc.c , Ifx_Crc.h

Ifx_Crc_reflect() : Ifx_Crc.c

Ifx_Crc_table() : Ifx_Crc.c , Ifx_Crc.h

Ifx_Crc_tableFast() : Ifx_Crc.c , Ifx_Crc.h

Ifx_DataBufferMode : Ifx_Types.h

Ifx_DataBufferMode_normal : Ifx_Types.h

Ifx_DataBufferMode_timeStampSingle : Ifx_Types.h

IFX_EXTERN : Compilers.h

IFX_F32_LUTL_SINCOS_ELEMENT_COUNT : Ifx_LutLSincosF32.c

IFX_FAR_ABS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

Ifx_FftF32_generateTwiddleFactor() : Ifx_FftF32.c , Ifx_FftF32.h

Ifx_FftF32_lookUpReversedBits() : Ifx_FftF32.h

Ifx_FftF32_lookUpTwiddleFactor() : Ifx_FftF32.h

IFX_FFTF32_MAX_LENGTH : Ifx_FftF32.h

IFX_FFTF32_MAX_RESOLUTION : Ifx_FftF32.h

Ifx_FftF32_radix2() : Ifx_FftF32.c , Ifx_FftF32.h

Ifx_FftF32_radix2DecimationInTime() : Ifx_FftF32.c

Ifx_FftF32_radix2I() : Ifx_FftF32.c , Ifx_FftF32.h

Ifx_FftF32_reverseBits() : Ifx_FftF32.c , Ifx_FftF32.h

Ifx_Fifo : Ifx_Fifo.h

Ifx_Fifo_canReadCount() : Ifx_Fifo.c , Ifx_Fifo.h

Ifx_Fifo_canWriteCount() : Ifx_Fifo.c , Ifx_Fifo.h

Ifx_Fifo_clear() : Ifx_Fifo.c , Ifx_Fifo.h

Ifx_Fifo_create() : Ifx_Fifo.c , Ifx_Fifo.h

Ifx_Fifo_destroy() : Ifx_Fifo.c , Ifx_Fifo.h

Ifx_Fifo_flush() : Ifx_Fifo.h

Ifx_Fifo_init() : Ifx_Fifo.c , Ifx_Fifo.h

Ifx_Fifo_isEmpty() : Ifx_Fifo.h

Ifx_Fifo_read() : Ifx_Fifo.c , Ifx_Fifo.h

Ifx_Fifo_readCount() : Ifx_Fifo.h

Ifx_Fifo_write() : Ifx_Fifo.c , Ifx_Fifo.h

Ifx_Fifo_writeCount() : Ifx_Fifo.h

Ifx_g_console : Ifx_Console.c , Ifx_Console.h

Ifx_g_FftF32_bitReverseTable : Ifx_FftF32.h , Ifx_FftF32_BitReverseTable.c

Ifx_g_FftF32_twiddleTable : Ifx_FftF32.h , Ifx_FftF32_TwiddleTable.c

Ifx_g_LutAtan2F32_FxpAngle_table : Ifx_LutAtan2F32.h , Ifx_LutAtan2F32_Table.c

Ifx_g_LutAtan2F32_table : Ifx_LutAtan2F32.h , Ifx_LutAtan2F32_Table.c

Ifx_g_LutLSincosF32 : Ifx_LutLSincosF32.c , Ifx_LutLSincosF32.h

Ifx_g_LutLSincosF32_table : Ifx_LutLSincosF32.c

Ifx_g_LutSincosF32_table : Ifx_LutSincosF32.h , Ifx_LutSincosF32_Table.c

Ifx_g_WndF32_blackmanHarrisTable : Ifx_WndF32.h , Ifx_WndF32_BlackmanHarrisTable.c

Ifx_g_WndF32_hannTable : Ifx_WndF32.h , Ifx_WndF32_HannTable.c

Ifx_GlobalResources_get() : Ifx_GlobalResources.c , Ifx_GlobalResources.h

Ifx_GlobalResources_getIndex() : Ifx_GlobalResources.c , Ifx_GlobalResources.h

Ifx_GlobalResources_getItem() : Ifx_GlobalResources.c , Ifx_GlobalResources.h

Ifx_GlobalResources_getName() : Ifx_GlobalResources.c , Ifx_GlobalResources.h

Ifx_GlobalResources_init() : Ifx_GlobalResources.c , Ifx_GlobalResources.h

Ifx_GTM_TOM_TGC : IfxGtm_cfg.h

IFX_INLINE : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

Ifx_IntegralF32_init() : Ifx_IntegralF32.c , Ifx_IntegralF32.h

Ifx_IntegralF32_reset() : Ifx_IntegralF32.c , Ifx_IntegralF32.h

Ifx_IntegralF32_step() : Ifx_IntegralF32.c , Ifx_IntegralF32.h

Ifx_InternalMux_init() : Ifx_InternalMux.c , Ifx_InternalMux.h

IFX_INTERRUPT : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , Compilers.h , CompilerTasking.h

IFX_INTERRUPT_FAST : CompilerDcc.h , CompilerGnuc.h , CompilerTasking.h

IFX_INTERRUPT_INTERNAL : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

IFX_INTERRUPT_LEGACY : CompilerDcc.h

IFX_LLD_VERSION_GENERATION : IfxLldVersion.h

IFX_LLD_VERSION_MAJOR : IfxLldVersion.h

IFX_LLD_VERSION_MAJOR_UPDATE : IfxLldVersion.h

IFX_LLD_VERSION_MINOR : IfxLldVersion.h

IFX_LLD_VERSION_REVISION : IfxLldVersion.h

Ifx_LowPassPt1F32_do() : Ifx_LowPassPt1F32.c , Ifx_LowPassPt1F32.h

Ifx_LowPassPt1F32_init() : Ifx_LowPassPt1F32.c , Ifx_LowPassPt1F32.h

Ifx_LowPassPt1F32_reset() : Ifx_LowPassPt1F32.h

IFX_LUT_ANGLE_BITS : Ifx_Lut.h

IFX_LUT_ANGLE_PI : Ifx_Lut.h

IFX_LUT_ANGLE_RESOLUTION : Ifx_Lut.h

IFX_LUT_F32_TO_FXPANGLE : Ifx_Lut.h

Ifx_Lut_FxpAngle : Ifx_Lut.h

IFX_LUT_FXPANGLE_TO_F32 : Ifx_Lut.h

IFX_LUT_TABLE : Ifx_Lut.h

IFX_LUT_TABLE_CONST : Ifx_Lut.h

Ifx_LutAtan2F32_float32() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h

Ifx_LutAtan2F32_float32Private() : Ifx_LutAtan2F32.c

Ifx_LutAtan2F32_fxpAngle() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h

Ifx_LutAtan2F32_fxpAnglePrivate() : Ifx_LutAtan2F32.c

Ifx_LutAtan2F32_init() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h

IFX_LUTATAN2F32_SIZE : Ifx_LutAtan2F32.h

Ifx_LutIndexedLinearF32_search() : Ifx_LutIndexedLinearF32.h

Ifx_LutLinearF32_searchBin() : Ifx_LutLinearF32.c , Ifx_LutLinearF32.h

Ifx_LutLinearF32_searchNegSeq() : Ifx_LutLinearF32.h

Ifx_LutLinearF32_searchPosSeq() : Ifx_LutLinearF32.h

Ifx_LutLSincosF32_cos() : Ifx_LutLSincosF32.h

Ifx_LutLSincosF32_cossin() : Ifx_LutLSincosF32.h

Ifx_LutLSincosF32_sin() : Ifx_LutLSincosF32.h

Ifx_LutSincosF32_cos() : Ifx_LutSincosF32.h

Ifx_LutSincosF32_cossin() : Ifx_LutSincosF32.h

Ifx_LutSincosF32_init() : Ifx_LutSincosF32.c , Ifx_LutSincosF32.h

Ifx_LutSincosF32_sin() : Ifx_LutSincosF32.c , Ifx_LutSincosF32.h

IFX_NEAR_ABS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

IFX_ONE_OVER_SQRT_THREE : Ifx_Types.h

IFX_ONES : Ifx_Types.h

IFX_PACKED : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

Ifx_ParityMode : Ifx_Types.h

Ifx_ParityMode_even : Ifx_Types.h

Ifx_ParityMode_odd : Ifx_Types.h

IFX_PI : Ifx_Types.h

Ifx_Priority : Ifx_Types.h

Ifx_Pwm_Mode : Ifx_Types.h

Ifx_Pwm_Mode_centerAligned : Ifx_Types.h

Ifx_Pwm_Mode_centerAlignedInverted : Ifx_Types.h

Ifx_Pwm_Mode_count : Ifx_Types.h

Ifx_Pwm_Mode_init : Ifx_Types.h

Ifx_Pwm_Mode_leftAligned : Ifx_Types.h

Ifx_Pwm_Mode_off : Ifx_Types.h

Ifx_Pwm_Mode_rightAligned : Ifx_Types.h

Ifx_RampF32_getRef() : Ifx_RampF32.h

Ifx_RampF32_getValue() : Ifx_RampF32.h

Ifx_RampF32_init() : Ifx_RampF32.h

Ifx_RampF32_reset() : Ifx_RampF32.h

Ifx_RampF32_setRef() : Ifx_RampF32.h

Ifx_RampF32_setSlewRate() : Ifx_RampF32.h

Ifx_RampF32_step() : Ifx_RampF32.c , Ifx_RampF32.h

IFX_REL_A0 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

IFX_REL_A1 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

IFX_REL_A8 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

IFX_REL_A9 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

Ifx_RxSel : Ifx_Types.h

Ifx_RxSel_a : Ifx_Types.h

Ifx_RxSel_b : Ifx_Types.h

Ifx_RxSel_c : Ifx_Types.h

Ifx_RxSel_d : Ifx_Types.h

Ifx_RxSel_e : Ifx_Types.h

Ifx_RxSel_f : Ifx_Types.h

Ifx_RxSel_g : Ifx_Types.h

Ifx_RxSel_h : Ifx_Types.h

Ifx_Shell_bbProtocolStart() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_Call : Ifx_Shell.h

IFX_SHELL_CMD_HISTORY_NO_ITEM : Ifx_Shell.h

IFX_SHELL_CMD_STATE_ESCAPE : Ifx_Shell.h

IFX_SHELL_CMD_STATE_ESCAPE_BRACKET : Ifx_Shell.h

IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER : Ifx_Shell.h

IFX_SHELL_CMD_STATE_NORMAL : Ifx_Shell.h

Ifx_Shell_cmdBuffer : Ifx_Shell.c

Ifx_Shell_cmdEscapeProcess() : Ifx_Shell.c

Ifx_Shell_CmdState : Ifx_Shell.h

IFX_SHELL_COMMAND_LIST_END : Ifx_Shell.h

Ifx_Shell_commandFind() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_CommandList : Ifx_Shell.h

Ifx_Shell_CommandListConst : Ifx_Shell.h

Ifx_Shell_commandListFind() : Ifx_Shell.c

Ifx_Shell_deinit() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_disable() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_enable() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_execute() : Ifx_Shell.c

IFX_SHELL_IF_ECHO : Ifx_Shell.c

Ifx_Shell_init() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_initConfig() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_isEndOfLine() : Ifx_Shell.c

IFX_SHELL_LLD : Ifx_Shell.c

IFX_SHELL_LLU : Ifx_Shell.c

IFX_SHELL_LLX : Ifx_Shell.c

Ifx_Shell_matchToken() : Ifx_Shell.c , Ifx_Shell.h

IFX_SHELL_MAX_MESSAGE_SIZE : Ifx_Shell.c

IFX_SHELL_NULL_CHAR : Ifx_Shell.h

Ifx_Shell_parseAddress() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_parseFloat32() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_parseFloat64() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_parseSInt32() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_parseSInt64() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_parseToken() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_parseUInt32() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_parseUInt64() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_printSyntax() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_process() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_protocolStart() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_ResultCode : Ifx_Shell.h

Ifx_Shell_ResultCode_nok : Ifx_Shell.h

Ifx_Shell_ResultCode_ok : Ifx_Shell.h

Ifx_Shell_ResultCode_undefined : Ifx_Shell.h

Ifx_Shell_ResultCode_unknown : Ifx_Shell.h

Ifx_Shell_showHelp() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_showHelpSingle() : Ifx_Shell.c , Ifx_Shell.h

Ifx_Shell_showHelpSingleCommand() : Ifx_Shell.c

Ifx_Shell_skipWhitespace() : Ifx_Shell.c , Ifx_Shell.h

IFX_SHELL_SYNTAX_LIST_END : Ifx_Shell.h

IFX_SHELL_WRITE_BACKSPACES : Ifx_Shell.c

IFX_SHELL_WRITE_SPACES : Ifx_Shell.c

Ifx_SignedTimerVal : Ifx_Types.h

Ifx_SizeT : Ifx_Types.h

IFX_SIZET_MAX : Ifx_Types.h

IFX_SQRT_THREE : Ifx_Types.h

IFX_SQRT_TWO : Ifx_Types.h

IFX_STATIC : Compilers.h

Ifx_TickTime : Ifx_Types.h

Ifx_TimerValue : Ifx_Types.h

IFX_TWO_OVER_PI : Ifx_Types.h

IFX_UNUSED_PARAMETER : Ifx_Types.h

IFX_VALIDATE : Ifx_Assert.h , Assert.h

IFX_VERBOSE_LEVEL_DEBUG : Ifx_Assert.h

IFX_VERBOSE_LEVEL_ERROR : Ifx_Assert.h

IFX_VERBOSE_LEVEL_FAILURE : Ifx_Assert.h

IFX_VERBOSE_LEVEL_INFO : Ifx_Assert.h

IFX_VERBOSE_LEVEL_OFF : Ifx_Assert.h

IFX_VERBOSE_LEVEL_WARNING : Ifx_Assert.h

Ifx_WndF32_apply() : Ifx_WndF32.h

IFX_WNDF32_TABLE_LENGTH : Ifx_WndF32.h

IFX_ZEROS : Ifx_Types.h

IfxAsclin0_CTSA_P14_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_RTS_P14_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_RXA_P14_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_RXB_P15_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_SCLK_P14_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_SCLK_P15_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_TX_P14_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_TX_P14_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_TX_P15_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin0_TX_P15_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_CTSA_P20_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_CTSB_P32_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RTS_P20_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RTS_P23_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RXA_P15_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RXB_P15_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RXC_P20_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RXD_P14_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RXE_P11_10_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RXF_P33_13_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_RXG_P02_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_SCLK_P15_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_SCLK_P20_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_SCLK_P33_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_SCLK_P33_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_SLSO_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_SLSO_P20_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_SLSO_P33_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P02_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P11_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P14_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P15_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P15_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P15_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P15_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P20_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P33_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin1_TX_P33_13_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_CTSA_P10_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_CTSB_P33_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_RTS_P10_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_RTS_P33_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_RXA_P14_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_RXB_P02_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_RXD_P10_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_RXE_P33_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_RXG_P02_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_SCLK_P02_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_SCLK_P10_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_SCLK_P14_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_SCLK_P33_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_SCLK_P33_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_SLSO_P02_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_SLSO_P10_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_SLSO_P33_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_TX_P02_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_TX_P10_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_TX_P14_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_TX_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_TX_P33_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin2_TX_P33_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_CTSA_P00_12_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_RTS_P00_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_RXA_P15_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_RXC_P20_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_RXD_P32_2_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_RXE_P00_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_RXF_P21_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P00_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P00_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P15_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P15_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P20_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P21_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P21_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P32_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SCLK_P33_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SLSO_P00_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SLSO_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SLSO_P21_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SLSO_P21_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_SLSO_P33_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P00_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P00_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P15_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P15_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P20_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P20_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P21_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P32_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin3_TX_P32_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin_Asc_blockingRead() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_blockingWrite() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_canReadCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_canWriteCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_clearRx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_clearTx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_disableModule() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_flushTx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_getReadCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_getReadEvent() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_getSendCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_getTxTimeStamp() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_getWriteCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_getWriteEvent() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_initiateTransmission() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_initModule() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_initModuleConfig() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_isrError() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_isrReceive() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_isrTransmit() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_read() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_resetSendCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_stdIfDPipeInit() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_Asc_write() : IfxAsclin_Asc.c , IfxAsclin_Asc.h

IfxAsclin_cfg_indexMap : IfxAsclin_cfg.c , IfxAsclin_cfg.h

IfxAsclin_Checksum : IfxAsclin.h

IfxAsclin_Checksum_classic : IfxAsclin.h

IfxAsclin_Checksum_enhanced : IfxAsclin.h

IfxAsclin_ChecksumInjection : IfxAsclin.h

IfxAsclin_ChecksumInjection_notWritten : IfxAsclin.h

IfxAsclin_ChecksumInjection_written : IfxAsclin.h

IfxAsclin_clearAllFlags() : IfxAsclin.h

IfxAsclin_clearBreakDetectedFlag() : IfxAsclin.h

IfxAsclin_clearCollisionDetectionErrorFlag() : IfxAsclin.h

IfxAsclin_clearFallingEdgeDetectedFlag() : IfxAsclin.h

IfxAsclin_clearFrameErrorFlag() : IfxAsclin.h

IfxAsclin_clearHeaderTimeoutFlag() : IfxAsclin.h

IfxAsclin_clearKernelResetStatus() : IfxAsclin.h

IfxAsclin_clearLinAutoBaudDetectionErrorFlag() : IfxAsclin.h

IfxAsclin_clearLinChecksumErrorFlag() : IfxAsclin.h

IfxAsclin_clearLinParityErrorFlag() : IfxAsclin.h

IfxAsclin_clearParityErrorFlag() : IfxAsclin.h

IfxAsclin_clearRaisingEdgeDetectedFlag() : IfxAsclin.h

IfxAsclin_clearResponseTimeoutFlag() : IfxAsclin.h

IfxAsclin_clearRxFifoFillLevelFlag() : IfxAsclin.h

IfxAsclin_clearRxFifoOverflowFlag() : IfxAsclin.h

IfxAsclin_clearRxFifoUnderflowFlag() : IfxAsclin.h

IfxAsclin_clearRxHeaderEndFlag() : IfxAsclin.h

IfxAsclin_clearRxResponseEndFlag() : IfxAsclin.h

IfxAsclin_clearTransmissionCompletedFlag() : IfxAsclin.h

IfxAsclin_clearTxFifoFillLevelFlag() : IfxAsclin.h

IfxAsclin_clearTxFifoOverflowFlag() : IfxAsclin.h

IfxAsclin_clearTxHeaderEndFlag() : IfxAsclin.h

IfxAsclin_clearTxResponseEndFlag() : IfxAsclin.h

IfxAsclin_ClockPolarity : IfxAsclin.h

IfxAsclin_ClockPolarity_idleHigh : IfxAsclin.h

IfxAsclin_ClockPolarity_idleLow : IfxAsclin.h

IfxAsclin_ClockSource : IfxAsclin.h

IfxAsclin_ClockSource_ascFastClock : IfxAsclin.h

IfxAsclin_ClockSource_ascSlowClock : IfxAsclin.h

IfxAsclin_ClockSource_flexRayClock : IfxAsclin.h

IfxAsclin_ClockSource_kernelClock : IfxAsclin.h

IfxAsclin_ClockSource_noClock : IfxAsclin.h

IfxAsclin_ClockSource_oscillatorClock : IfxAsclin.h

IfxAsclin_Cts_In_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin_CtsInputSelect : IfxAsclin.h

IfxAsclin_CtsInputSelect_0 : IfxAsclin.h

IfxAsclin_CtsInputSelect_1 : IfxAsclin.h

IfxAsclin_CtsInputSelect_2 : IfxAsclin.h

IfxAsclin_CtsInputSelect_3 : IfxAsclin.h

IfxAsclin_DataLength : IfxAsclin.h

IfxAsclin_DataLength_1 : IfxAsclin.h

IfxAsclin_DataLength_10 : IfxAsclin.h

IfxAsclin_DataLength_11 : IfxAsclin.h

IfxAsclin_DataLength_12 : IfxAsclin.h

IfxAsclin_DataLength_13 : IfxAsclin.h

IfxAsclin_DataLength_14 : IfxAsclin.h

IfxAsclin_DataLength_15 : IfxAsclin.h

IfxAsclin_DataLength_16 : IfxAsclin.h

IfxAsclin_DataLength_2 : IfxAsclin.h

IfxAsclin_DataLength_3 : IfxAsclin.h

IfxAsclin_DataLength_4 : IfxAsclin.h

IfxAsclin_DataLength_5 : IfxAsclin.h

IfxAsclin_DataLength_6 : IfxAsclin.h

IfxAsclin_DataLength_7 : IfxAsclin.h

IfxAsclin_DataLength_8 : IfxAsclin.h

IfxAsclin_DataLength_9 : IfxAsclin.h

IfxAsclin_disableAllFlags() : IfxAsclin.h

IfxAsclin_disableModule() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_enableAscErrorFlags() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_enableAutoBaudrateDetection() : IfxAsclin.h

IfxAsclin_enableBreakDetectedFlag() : IfxAsclin.h

IfxAsclin_enableCollisionDetection() : IfxAsclin.h

IfxAsclin_enableCollisionDetectionErrorFlag() : IfxAsclin.h

IfxAsclin_enableCts() : IfxAsclin.h

IfxAsclin_enableFallingEdgeDetectedFlag() : IfxAsclin.h

IfxAsclin_enableFrameErrorFlag() : IfxAsclin.h

IfxAsclin_enableHardwareChecksum() : IfxAsclin.h

IfxAsclin_enableHeaderTimeoutFlag() : IfxAsclin.h

IfxAsclin_enableLinAutoBaudDetectionErrorFlag() : IfxAsclin.h

IfxAsclin_enableLinChecksumErrorFlag() : IfxAsclin.h

IfxAsclin_enableLinParityErrorFlag() : IfxAsclin.h

IfxAsclin_enableLoopBackMode() : IfxAsclin.h

IfxAsclin_enableModule() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_enableParity() : IfxAsclin.h

IfxAsclin_enableParityErrorFlag() : IfxAsclin.h

IfxAsclin_enableRaisingEdgeDetectedFlag() : IfxAsclin.h

IfxAsclin_enableResponseTimeoutFlag() : IfxAsclin.h

IfxAsclin_enableRxFifoFillLevelFlag() : IfxAsclin.h

IfxAsclin_enableRxFifoInlet() : IfxAsclin.h

IfxAsclin_enableRxFifoOverflowFlag() : IfxAsclin.h

IfxAsclin_enableRxFifoUnderflowFlag() : IfxAsclin.h

IfxAsclin_enableRxHeaderEndFlag() : IfxAsclin.h

IfxAsclin_enableRxResponseEndFlag() : IfxAsclin.h

IfxAsclin_enableTransmissionCompletedFlag() : IfxAsclin.h

IfxAsclin_enableTxFifoFillLevelFlag() : IfxAsclin.h

IfxAsclin_enableTxFifoOutlet() : IfxAsclin.h

IfxAsclin_enableTxFifoOverflowFlag() : IfxAsclin.h

IfxAsclin_enableTxHeaderEndFlag() : IfxAsclin.h

IfxAsclin_enableTxResponseEndFlag() : IfxAsclin.h

IfxAsclin_flushRxFifo() : IfxAsclin.h

IfxAsclin_flushTxFifo() : IfxAsclin.h

IfxAsclin_FrameMode : IfxAsclin.h

IfxAsclin_FrameMode_asc : IfxAsclin.h

IfxAsclin_FrameMode_initialise : IfxAsclin.h

IfxAsclin_FrameMode_lin : IfxAsclin.h

IfxAsclin_FrameMode_spi : IfxAsclin.h

IfxAsclin_getAddress() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getAllErrorFlagsStatus() : IfxAsclin.h

IfxAsclin_getBreakDetectedFlagStatus() : IfxAsclin.h

IfxAsclin_getClockSource() : IfxAsclin.h

IfxAsclin_getClockStatus() : IfxAsclin.h

IfxAsclin_getCollisionDetectionErrorFlagStatus() : IfxAsclin.h

IfxAsclin_getFaFrequency() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getFallingEdgeDetectedFlagStatus() : IfxAsclin.h

IfxAsclin_getFrameErrorFlagStatus() : IfxAsclin.h

IfxAsclin_getHeaderTimeoutFlagStatus() : IfxAsclin.h

IfxAsclin_getIndex() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getKernelResetStatus() : IfxAsclin.h

IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus() : IfxAsclin.h

IfxAsclin_getLinChecksumErrorFlagStatus() : IfxAsclin.h

IfxAsclin_getLinParityErrorFlagStatus() : IfxAsclin.h

IfxAsclin_getModuleStatus() : IfxAsclin.h

IfxAsclin_getOvsFrequency() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getParityErrorFlagStatus() : IfxAsclin.h

IfxAsclin_getPdFrequency() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getPrescaler() : IfxAsclin.h

IfxAsclin_getRaisingEdgeDetectedFlagStatus() : IfxAsclin.h

IfxAsclin_getReceiveSignalStatus() : IfxAsclin.h

IfxAsclin_getResponseTimeoutFlagStatus() : IfxAsclin.h

IfxAsclin_getRxFifoFillLevel() : IfxAsclin.h

IfxAsclin_getRxFifoFillLevelFlagStatus() : IfxAsclin.h

IfxAsclin_getRxFifoOutletWidth() : IfxAsclin.h

IfxAsclin_getRxFifoOverflowFlagStatus() : IfxAsclin.h

IfxAsclin_getRxFifoUnderflowFlagStatus() : IfxAsclin.h

IfxAsclin_getRxHeaderEndFlagStatus() : IfxAsclin.h

IfxAsclin_getRxResponseEndFlagStatus() : IfxAsclin.h

IfxAsclin_getShiftFrequency() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getSrcPointerEr() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getSrcPointerRx() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getSrcPointerTx() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_getTransmissionCompletedFlagStatus() : IfxAsclin.h

IfxAsclin_getTransmitSignalStatus() : IfxAsclin.h

IfxAsclin_getTxFifoFillLevel() : IfxAsclin.h

IfxAsclin_getTxFifoFillLevelFlagStatus() : IfxAsclin.h

IfxAsclin_getTxFifoInletWidth() : IfxAsclin.h

IfxAsclin_getTxFifoOverflowFlagStatus() : IfxAsclin.h

IfxAsclin_getTxHeaderEndFlagStatus() : IfxAsclin.h

IfxAsclin_getTxResponseEndFlagStatus() : IfxAsclin.h

IfxAsclin_HeaderResponseSelect : IfxAsclin.h

IfxAsclin_HeaderResponseSelect_headerAndResponse : IfxAsclin.h

IfxAsclin_HeaderResponseSelect_headerOnly : IfxAsclin.h

IfxAsclin_IdleDelay : IfxAsclin.h

IfxAsclin_IdleDelay_0 : IfxAsclin.h

IfxAsclin_IdleDelay_1 : IfxAsclin.h

IfxAsclin_IdleDelay_2 : IfxAsclin.h

IfxAsclin_IdleDelay_3 : IfxAsclin.h

IfxAsclin_IdleDelay_4 : IfxAsclin.h

IfxAsclin_IdleDelay_5 : IfxAsclin.h

IfxAsclin_IdleDelay_6 : IfxAsclin.h

IfxAsclin_IdleDelay_7 : IfxAsclin.h

IfxAsclin_Index : IfxAsclin_cfg.h

IfxAsclin_Index_0 : IfxAsclin_cfg.h

IfxAsclin_Index_1 : IfxAsclin_cfg.h

IfxAsclin_Index_2 : IfxAsclin_cfg.h

IfxAsclin_Index_3 : IfxAsclin_cfg.h

IfxAsclin_Index_none : IfxAsclin_cfg.h

IfxAsclin_initCtsPin() : IfxAsclin.h

IfxAsclin_initRtsPin() : IfxAsclin.h

IfxAsclin_initRxPin() : IfxAsclin.h

IfxAsclin_initSclkPin() : IfxAsclin.h

IfxAsclin_initSlsoPin() : IfxAsclin.h

IfxAsclin_initTxPin() : IfxAsclin.h

IfxAsclin_isModuleSuspended() : IfxAsclin.h

IfxAsclin_LeadDelay : IfxAsclin.h

IfxAsclin_LeadDelay_0 : IfxAsclin.h

IfxAsclin_LeadDelay_1 : IfxAsclin.h

IfxAsclin_LeadDelay_2 : IfxAsclin.h

IfxAsclin_LeadDelay_3 : IfxAsclin.h

IfxAsclin_LeadDelay_4 : IfxAsclin.h

IfxAsclin_LeadDelay_5 : IfxAsclin.h

IfxAsclin_LeadDelay_6 : IfxAsclin.h

IfxAsclin_LeadDelay_7 : IfxAsclin.h

IfxAsclin_Lin_checkForReceivedHeaderFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_checkForReceivedResponseFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_checkForTransmittedHeaderFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_checkForTransmittedResponseFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_clearFlagsStatus() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_Direction : IfxAsclin_Lin.h

IfxAsclin_Lin_Direction_TransmitHeader : IfxAsclin_Lin.h

IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse : IfxAsclin_Lin.h

IfxAsclin_Lin_Direction_TransmitHeaderAndResponse : IfxAsclin_Lin.h

IfxAsclin_Lin_disableModule() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_ignoreHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_initModule() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_initModuleConfig() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_isrError() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_isrReceive() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_isrTransmit() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_prepareHeaderReception() : IfxAsclin_Lin.h

IfxAsclin_Lin_prepareResponseReception() : IfxAsclin_Lin.h

IfxAsclin_Lin_readHeader() : IfxAsclin_Lin.h

IfxAsclin_Lin_readResponse() : IfxAsclin_Lin.h

IFXASCLIN_LIN_RECEIVE_RESPONSE : IfxAsclin_Lin.h

IfxAsclin_Lin_receiveHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_receiveResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IFXASCLIN_LIN_SEND_RESPONSE : IfxAsclin_Lin.h

IfxAsclin_Lin_sendFrame() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_sendHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_sendResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_waitForReceivedHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_waitForReceivedResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_waitForTransmittedHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_Lin_waitForTransmittedResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h

IfxAsclin_LinMode : IfxAsclin.h

IfxAsclin_LinMode_master : IfxAsclin.h

IfxAsclin_LinMode_slave : IfxAsclin.h

IfxAsclin_LinResponseTimeoutMode : IfxAsclin.h

IfxAsclin_LinResponseTimeoutMode_frameTimeout : IfxAsclin.h

IfxAsclin_LinResponseTimeoutMode_responseTimeout : IfxAsclin.h

IFXASCLIN_NUM_MODULES : IfxAsclin_cfg.h

IfxAsclin_OversamplingFactor : IfxAsclin.h

IfxAsclin_OversamplingFactor_10 : IfxAsclin.h

IfxAsclin_OversamplingFactor_11 : IfxAsclin.h

IfxAsclin_OversamplingFactor_12 : IfxAsclin.h

IfxAsclin_OversamplingFactor_13 : IfxAsclin.h

IfxAsclin_OversamplingFactor_14 : IfxAsclin.h

IfxAsclin_OversamplingFactor_15 : IfxAsclin.h

IfxAsclin_OversamplingFactor_16 : IfxAsclin.h

IfxAsclin_OversamplingFactor_4 : IfxAsclin.h

IfxAsclin_OversamplingFactor_5 : IfxAsclin.h

IfxAsclin_OversamplingFactor_6 : IfxAsclin.h

IfxAsclin_OversamplingFactor_7 : IfxAsclin.h

IfxAsclin_OversamplingFactor_8 : IfxAsclin.h

IfxAsclin_OversamplingFactor_9 : IfxAsclin.h

IfxAsclin_ParityType : IfxAsclin.h

IfxAsclin_ParityType_even : IfxAsclin.h

IfxAsclin_ParityType_odd : IfxAsclin.h

IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS : IfxAsclin_PinMap.h

IFXASCLIN_PINMAP_NUM_MODULES : IfxAsclin_PinMap.h

IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS : IfxAsclin_PinMap.h

IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS : IfxAsclin_PinMap.h

IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS : IfxAsclin_PinMap.h

IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS : IfxAsclin_PinMap.h

IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS : IfxAsclin_PinMap.h

IfxAsclin_read16() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_read32() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_read8() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_readRxData() : IfxAsclin.h

IfxAsclin_ReceiveBufferMode : IfxAsclin.h

IfxAsclin_ReceiveBufferMode_rxBuffer : IfxAsclin.h

IfxAsclin_ReceiveBufferMode_rxFifo : IfxAsclin.h

IfxAsclin_resetModule() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_Rts_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin_RtsCtsPolarity : IfxAsclin.h

IfxAsclin_RtsCtsPolarity_activeHigh : IfxAsclin.h

IfxAsclin_RtsCtsPolarity_activeLow : IfxAsclin.h

IfxAsclin_Rx_In_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin_RxFifoInterruptLevel : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_1 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_10 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_11 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_12 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_13 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_14 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_15 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_16 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_2 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_3 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_4 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_5 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_6 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_7 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_8 : IfxAsclin.h

IfxAsclin_RxFifoInterruptLevel_9 : IfxAsclin.h

IfxAsclin_RxFifoOutletWidth : IfxAsclin.h

IfxAsclin_RxFifoOutletWidth_0 : IfxAsclin.h

IfxAsclin_RxFifoOutletWidth_1 : IfxAsclin.h

IfxAsclin_RxFifoOutletWidth_2 : IfxAsclin.h

IfxAsclin_RxFifoOutletWidth_3 : IfxAsclin.h

IfxAsclin_RxInputSelect : IfxAsclin.h

IfxAsclin_RxInputSelect_0 : IfxAsclin.h

IfxAsclin_RxInputSelect_1 : IfxAsclin.h

IfxAsclin_RxInputSelect_2 : IfxAsclin.h

IfxAsclin_RxInputSelect_3 : IfxAsclin.h

IfxAsclin_RxInputSelect_4 : IfxAsclin.h

IfxAsclin_RxInputSelect_5 : IfxAsclin.h

IfxAsclin_RxInputSelect_6 : IfxAsclin.h

IfxAsclin_RxInputSelect_7 : IfxAsclin.h

IfxAsclin_SamplePointPosition : IfxAsclin.h

IfxAsclin_SamplePointPosition_1 : IfxAsclin.h

IfxAsclin_SamplePointPosition_10 : IfxAsclin.h

IfxAsclin_SamplePointPosition_11 : IfxAsclin.h

IfxAsclin_SamplePointPosition_12 : IfxAsclin.h

IfxAsclin_SamplePointPosition_13 : IfxAsclin.h

IfxAsclin_SamplePointPosition_14 : IfxAsclin.h

IfxAsclin_SamplePointPosition_15 : IfxAsclin.h

IfxAsclin_SamplePointPosition_2 : IfxAsclin.h

IfxAsclin_SamplePointPosition_3 : IfxAsclin.h

IfxAsclin_SamplePointPosition_4 : IfxAsclin.h

IfxAsclin_SamplePointPosition_5 : IfxAsclin.h

IfxAsclin_SamplePointPosition_6 : IfxAsclin.h

IfxAsclin_SamplePointPosition_7 : IfxAsclin.h

IfxAsclin_SamplePointPosition_8 : IfxAsclin.h

IfxAsclin_SamplePointPosition_9 : IfxAsclin.h

IfxAsclin_SamplesPerBit : IfxAsclin.h

IfxAsclin_SamplesPerBit_one : IfxAsclin.h

IfxAsclin_SamplesPerBit_three : IfxAsclin.h

IfxAsclin_Sclk_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin_setBaudrateBitFields() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_setBitTiming() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_setBrdLowerlimt() : IfxAsclin.h

IfxAsclin_setBrdUpperlimt() : IfxAsclin.h

IfxAsclin_setChecksumInjection() : IfxAsclin.h

IfxAsclin_setChecksumMode() : IfxAsclin.h

IfxAsclin_setClockPolarity() : IfxAsclin.h

IfxAsclin_setClockSource() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_setCtsInput() : IfxAsclin.h

IfxAsclin_setDataLength() : IfxAsclin.h

IfxAsclin_setDenominator() : IfxAsclin.h

IfxAsclin_setDisableModuleRequest() : IfxAsclin.h

IfxAsclin_setEnableModuleRequest() : IfxAsclin.h

IfxAsclin_setFilterDepth() : IfxAsclin.h

IfxAsclin_setFrameMode() : IfxAsclin.h

IfxAsclin_setHeaderResponseSelect() : IfxAsclin.h

IfxAsclin_setIdleDelay() : IfxAsclin.h

IfxAsclin_setKernelResetOne() : IfxAsclin.h

IfxAsclin_setKernelResetZero() : IfxAsclin.h

IfxAsclin_setLeadDelay() : IfxAsclin.h

IfxAsclin_setLinBreakLength() : IfxAsclin.h

IfxAsclin_setLinHeaderTimeout() : IfxAsclin.h

IfxAsclin_setLinMode() : IfxAsclin.h

IfxAsclin_setLinResponseTimeoutMode() : IfxAsclin.h

IfxAsclin_setLinResponseTimeoutThreshold() : IfxAsclin.h

IfxAsclin_setNumerator() : IfxAsclin.h

IfxAsclin_setOversampling() : IfxAsclin.h

IfxAsclin_setParityType() : IfxAsclin.h

IfxAsclin_setPrescaler() : IfxAsclin.h

IfxAsclin_setRtsCtsPolarity() : IfxAsclin.h

IfxAsclin_setRxBufferMode() : IfxAsclin.h

IfxAsclin_setRxFifoInterruptLevel() : IfxAsclin.h

IfxAsclin_setRxFifoOutletWidth() : IfxAsclin.h

IfxAsclin_setRxInput() : IfxAsclin.h

IfxAsclin_setSampleMode() : IfxAsclin.h

IfxAsclin_setSamplePointPosition() : IfxAsclin.h

IfxAsclin_setShiftDirection() : IfxAsclin.h

IfxAsclin_setSlavePolarity() : IfxAsclin.h

IfxAsclin_setSleepMode() : IfxAsclin.h

IfxAsclin_setStopBit() : IfxAsclin.h

IfxAsclin_setSuspendMode() : IfxAsclin.h

IfxAsclin_setTransmitHeaderRequestFlag() : IfxAsclin.h

IfxAsclin_setTransmitResponseRequestFlag() : IfxAsclin.h

IfxAsclin_setTransmitWakeRequestFlag() : IfxAsclin.h

IfxAsclin_setTxFifoInletWidth() : IfxAsclin.h

IfxAsclin_setTxFifoInterruptLevel() : IfxAsclin.h

IfxAsclin_ShiftDirection : IfxAsclin.h

IfxAsclin_ShiftDirection_lsbFirst : IfxAsclin.h

IfxAsclin_ShiftDirection_msbFirst : IfxAsclin.h

IfxAsclin_SlavePolarity : IfxAsclin.h

IfxAsclin_SlavePolarity_idlehigh : IfxAsclin.h

IfxAsclin_SlavePolarity_idleLow : IfxAsclin.h

IfxAsclin_SleepMode : IfxAsclin.h

IfxAsclin_SleepMode_disable : IfxAsclin.h

IfxAsclin_SleepMode_enable : IfxAsclin.h

IfxAsclin_Slso_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin_Spi_disableModule() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_exchange() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_getStatus() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_initModule() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_initModuleConfig() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_isrError() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_isrReceive() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_isrTransmit() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_lock() : IfxAsclin_Spi.c

IfxAsclin_Spi_read() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Spi_Status : IfxAsclin_Spi.h

IfxAsclin_Spi_Status_busy : IfxAsclin_Spi.h

IfxAsclin_Spi_Status_ok : IfxAsclin_Spi.h

IfxAsclin_Spi_Status_unknown : IfxAsclin_Spi.h

IfxAsclin_Spi_unlock() : IfxAsclin_Spi.c

IfxAsclin_Spi_write() : IfxAsclin_Spi.c , IfxAsclin_Spi.h

IfxAsclin_Status : IfxAsclin.h

IfxAsclin_Status_configurationError : IfxAsclin.h

IfxAsclin_Status_noError : IfxAsclin.h

IfxAsclin_StopBit : IfxAsclin.h

IfxAsclin_StopBit_0 : IfxAsclin.h

IfxAsclin_StopBit_1 : IfxAsclin.h

IfxAsclin_StopBit_2 : IfxAsclin.h

IfxAsclin_StopBit_3 : IfxAsclin.h

IfxAsclin_StopBit_4 : IfxAsclin.h

IfxAsclin_StopBit_5 : IfxAsclin.h

IfxAsclin_StopBit_6 : IfxAsclin.h

IfxAsclin_StopBit_7 : IfxAsclin.h

IfxAsclin_SuspendMode : IfxAsclin.h

IfxAsclin_SuspendMode_hard : IfxAsclin.h

IfxAsclin_SuspendMode_none : IfxAsclin.h

IfxAsclin_SuspendMode_soft : IfxAsclin.h

IfxAsclin_Tx_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h

IfxAsclin_TxFifoInletWidth : IfxAsclin.h

IfxAsclin_TxFifoInletWidth_0 : IfxAsclin.h

IfxAsclin_TxFifoInletWidth_1 : IfxAsclin.h

IfxAsclin_TxFifoInletWidth_2 : IfxAsclin.h

IfxAsclin_TxFifoInletWidth_3 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_0 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_1 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_10 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_11 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_12 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_13 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_14 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_15 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_2 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_3 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_4 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_5 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_6 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_7 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_8 : IfxAsclin.h

IfxAsclin_TxFifoInterruptLevel_9 : IfxAsclin.h

IfxAsclin_write16() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_write32() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_write8() : IfxAsclin.c , IfxAsclin.h

IfxAsclin_writeTxData() : IfxAsclin.h

IfxCcu60_CC60_P02_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC60_P02_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC60_P11_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC60_P15_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC60INA_P02_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC60INB_P00_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC60INC_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC61_P02_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC61_P02_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC61_P11_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC61_P15_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC61INA_P02_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC61INB_P00_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC61INC_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC62_P02_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC62_P02_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC62_P11_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC62_P15_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC62INA_P02_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC62INB_P00_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CC62INC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS0A_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS0C_P10_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS0D_P40_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS1A_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS1B_P40_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS1C_P10_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS1D_P40_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS2A_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS2B_P40_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CCPOS2C_P10_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT60_P02_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT60_P11_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT60_P15_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT61_P02_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT61_P11_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT61_P15_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT62_P02_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT62_P11_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT62_P14_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT63_P00_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT63_P11_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT63_P14_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_COUT63_P32_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_CTRAPA_P00_11_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_T12HRB_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_T12HRC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_T12HRE_P00_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_T13HRB_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu60_T13HRC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC60_P00_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC60_P00_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC60_P20_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC60_P33_13_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC60INA_P00_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC60INB_P02_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC60INC_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC61_P00_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC61_P00_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC61_P20_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC61_P33_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC61INA_P00_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC61INB_P02_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC61INC_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC62_P00_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC62_P00_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC62_P20_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC62_P33_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC62INA_P00_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC62INB_P02_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CC62INC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS0A_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS0C_P33_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS1A_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS1B_P40_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS1C_P33_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS1D_P40_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS2A_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS2B_P40_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS2C_P33_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CCPOS2D_P40_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT60_P00_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT60_P20_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT60_P33_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT61_P00_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT61_P20_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT61_P33_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT62_P00_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT62_P20_13_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT62_P33_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT63_P00_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT63_P00_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_COUT63_P20_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CTRAPA_P00_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_CTRAPC_P33_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_T12HRB_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_T12HRC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_T12HRE_P00_11_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_T13HRB_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu61_T13HRC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_CaptureCompareInput : IfxCcu6.h

IfxCcu6_CaptureCompareInput_cC60 : IfxCcu6.h

IfxCcu6_CaptureCompareInput_cC61 : IfxCcu6.h

IfxCcu6_CaptureCompareInput_cC62 : IfxCcu6.h

IfxCcu6_CaptureCompareInput_cCPOS0 : IfxCcu6.h

IfxCcu6_CaptureCompareInput_cCPOS1 : IfxCcu6.h

IfxCcu6_CaptureCompareInput_cCPOS2 : IfxCcu6.h

IfxCcu6_CaptureCompareInput_cTRAP : IfxCcu6.h

IfxCcu6_CaptureCompareInputSignal : IfxCcu6.h

IfxCcu6_CaptureCompareInputSignal_a : IfxCcu6.h

IfxCcu6_CaptureCompareInputSignal_b : IfxCcu6.h

IfxCcu6_CaptureCompareInputSignal_c : IfxCcu6.h

IfxCcu6_CaptureCompareInputSignal_d : IfxCcu6.h

IfxCcu6_CaptureCompareState : IfxCcu6.h

IfxCcu6_CaptureCompareState_clear : IfxCcu6.h

IfxCcu6_CaptureCompareState_set : IfxCcu6.h

IfxCcu6_CaptureCompareState_toggle : IfxCcu6.h

IfxCcu6_Cc60_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Cc60in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Cc61_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Cc61in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Cc62_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Cc62in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Ccpos0_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Ccpos1_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Ccpos2_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_cfg_indexMap : IfxCcu6_cfg.c , IfxCcu6_cfg.h

IfxCcu6_ChannelOut : IfxCcu6.h

IfxCcu6_ChannelOut_cc0 : IfxCcu6.h

IfxCcu6_ChannelOut_cc1 : IfxCcu6.h

IfxCcu6_ChannelOut_cc2 : IfxCcu6.h

IfxCcu6_ChannelOut_cout0 : IfxCcu6.h

IfxCcu6_ChannelOut_cout1 : IfxCcu6.h

IfxCcu6_ChannelOut_cout2 : IfxCcu6.h

IfxCcu6_ChannelOut_cout3 : IfxCcu6.h

IfxCcu6_clearAllInterruptStatusFlags() : IfxCcu6.h

IfxCcu6_clearCounter() : IfxCcu6.h

IfxCcu6_clearDeadTimeCounters() : IfxCcu6.h

IfxCcu6_clearInterruptStatusFlag() : IfxCcu6.h

IfxCcu6_clearT12OneNotification() : IfxCcu6.h

IfxCcu6_clearT12PeriodNotification() : IfxCcu6.h

IfxCcu6_clearT13CompareNotification() : IfxCcu6.h

IfxCcu6_connectTrigger() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_CountingInputMode : IfxCcu6.h

IfxCcu6_CountingInputMode_externalFalling : IfxCcu6.h

IfxCcu6_CountingInputMode_externalRising : IfxCcu6.h

IfxCcu6_CountingInputMode_internal : IfxCcu6.h

IfxCcu6_CountingInputMode_manual : IfxCcu6.h

IfxCcu6_Cout60_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Cout61_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Cout62_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Cout63_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_Ctrap_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_DelayBypass : IfxCcu6.h

IfxCcu6_DelayBypass_active : IfxCcu6.h

IfxCcu6_DelayBypass_notActive : IfxCcu6.h

IfxCcu6_disableAdditionalPrescaler() : IfxCcu6.h

IfxCcu6_disableDeadTime() : IfxCcu6.h

IfxCcu6_disableDelayBypass() : IfxCcu6.h

IfxCcu6_disableInterrupt() : IfxCcu6.h

IfxCcu6_disableModulationOutput() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_disableModule() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_disableMultiChannelMode() : IfxCcu6.h

IfxCcu6_disableShadowTransfer() : IfxCcu6.h

IfxCcu6_disableSingleShotMode() : IfxCcu6.h

IfxCcu6_disableT13InvertedModulation() : IfxCcu6.h

IfxCcu6_disableTimer() : IfxCcu6.h

IfxCcu6_disableTrap() : IfxCcu6.h

IfxCcu6_disableTrapPin() : IfxCcu6.h

IFXCCU6_EMPTY_OUTPUT_SLOT : IfxCcu6_cfg.c

IfxCcu6_enableAdditionalPrescaler() : IfxCcu6.h

IfxCcu6_enableCountEvent() : IfxCcu6.h

IfxCcu6_enableDeadTime() : IfxCcu6.h

IfxCcu6_enableDelayBypass() : IfxCcu6.h

IfxCcu6_enableHallPatternShadowTransfer() : IfxCcu6.h

IfxCcu6_enableInterrupt() : IfxCcu6.h

IfxCcu6_enableModulationOutput() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_enableModule() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_enableMultiChannelMode() : IfxCcu6.h

IfxCcu6_enableMultiChannelModeAvailability() : IfxCcu6.h

IfxCcu6_enableMultiChannelPwmPatternShadowTransfer() : IfxCcu6.h

IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer() : IfxCcu6.h

IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer() : IfxCcu6.h

IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer() : IfxCcu6.h

IfxCcu6_enableShadowTransfer() : IfxCcu6.h

IfxCcu6_enableSingleShotMode() : IfxCcu6.h

IfxCcu6_enableT13InvertedModulation() : IfxCcu6.h

IfxCcu6_enableTimer() : IfxCcu6.h

IfxCcu6_enableTrap() : IfxCcu6.h

IfxCcu6_enableTrapPin() : IfxCcu6.h

IfxCcu6_ExternalTriggerMode : IfxCcu6.h

IfxCcu6_ExternalTriggerMode_anyEdge : IfxCcu6.h

IfxCcu6_ExternalTriggerMode_disable : IfxCcu6.h

IfxCcu6_ExternalTriggerMode_fallingEdge : IfxCcu6.h

IfxCcu6_ExternalTriggerMode_risingEdge : IfxCcu6.h

IfxCcu6_getAddress() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_getCaptureRegisterValue() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_getCaptureShadowRegisterValue() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_getDeadTimeStatus() : IfxCcu6.h

IfxCcu6_getHallPatternSampleState() : IfxCcu6.h

IfxCcu6_getIndex() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_getInterruptStatusFlag() : IfxCcu6.h

IfxCcu6_getMultiChannelModeAvailabilityStatus() : IfxCcu6.h

IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus() : IfxCcu6.h

IfxCcu6_getShadowTransferStatus() : IfxCcu6.h

IfxCcu6_getSrcAddress() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_getT12CaptureCompareState() : IfxCcu6.h

IfxCcu6_getT12CountDirection() : IfxCcu6.h

IfxCcu6_getT12TimerPointer() : IfxCcu6.h

IfxCcu6_getT13CaptureCompareState() : IfxCcu6.h

IfxCcu6_getTimerAvailabilityStatus() : IfxCcu6.h

IfxCcu6_getTimerRunStatus() : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode_cM61CountingDown : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode_cM61CountingUp : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode_cM63 : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode_off : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode_permanentCheck : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode_t12OMCountingDown : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode_t12PMCountingUp : IfxCcu6.h

IfxCcu6_HallSensorTriggerMode_t13PM : IfxCcu6.h

IfxCcu6_Icu_getTimeStamp() : IfxCcu6_Icu.c , IfxCcu6_Icu.h

IfxCcu6_Icu_initChannel() : IfxCcu6_Icu.c , IfxCcu6_Icu.h

IfxCcu6_Icu_initChannelConfig() : IfxCcu6_Icu.c , IfxCcu6_Icu.h

IfxCcu6_Icu_initModule() : IfxCcu6_Icu.c , IfxCcu6_Icu.h

IfxCcu6_Icu_initModuleConfig() : IfxCcu6_Icu.c , IfxCcu6_Icu.h

IfxCcu6_Icu_startCapture() : IfxCcu6_Icu.c , IfxCcu6_Icu.h

IfxCcu6_Icu_stopCapture() : IfxCcu6_Icu.c , IfxCcu6_Icu.h

IfxCcu6_Index : IfxCcu6_cfg.h

IfxCcu6_Index_0 : IfxCcu6_cfg.h

IfxCcu6_Index_1 : IfxCcu6_cfg.h

IfxCcu6_Index_none : IfxCcu6_cfg.h

IfxCcu6_initCc60InPin() : IfxCcu6.h

IfxCcu6_initCc60InPinWithPadLevel() : IfxCcu6.h

IfxCcu6_initCc60OutPin() : IfxCcu6.h

IfxCcu6_initCc61InPin() : IfxCcu6.h

IfxCcu6_initCc61InPinWithPadLevel() : IfxCcu6.h

IfxCcu6_initCc61OutPin() : IfxCcu6.h

IfxCcu6_initCc62InPin() : IfxCcu6.h

IfxCcu6_initCc62InPinWithPadLevel() : IfxCcu6.h

IfxCcu6_initCc62OutPin() : IfxCcu6.h

IfxCcu6_initCcpos0Pin() : IfxCcu6.h

IfxCcu6_initCcpos0PinWithPadLevel() : IfxCcu6.h

IfxCcu6_initCcpos1Pin() : IfxCcu6.h

IfxCcu6_initCcpos1PinWithPadLevel() : IfxCcu6.h

IfxCcu6_initCcpos2Pin() : IfxCcu6.h

IfxCcu6_initCcpos2PinWithPadLevel() : IfxCcu6.h

IfxCcu6_initCout60Pin() : IfxCcu6.h

IfxCcu6_initCout61Pin() : IfxCcu6.h

IfxCcu6_initCout62Pin() : IfxCcu6.h

IfxCcu6_initCout63Pin() : IfxCcu6.h

IfxCcu6_initCtrapPin() : IfxCcu6.h

IfxCcu6_initCtrapPinWithPadLevel() : IfxCcu6.h

IfxCcu6_initT12hrPin() : IfxCcu6.h

IfxCcu6_initT12hrPinWithPadLevel() : IfxCcu6.h

IfxCcu6_initT13hrPin() : IfxCcu6.h

IfxCcu6_initT13hrPinWithPadLevel() : IfxCcu6.h

IfxCcu6_InterruptSource : IfxCcu6.h

IfxCcu6_InterruptSource_cc60FallingEdge : IfxCcu6.h

IfxCcu6_InterruptSource_cc60RisingEdge : IfxCcu6.h

IfxCcu6_InterruptSource_cc61FallingEdge : IfxCcu6.h

IfxCcu6_InterruptSource_cc61RisingEdge : IfxCcu6.h

IfxCcu6_InterruptSource_cc62FallingEdge : IfxCcu6.h

IfxCcu6_InterruptSource_cc62RisingEdge : IfxCcu6.h

IfxCcu6_InterruptSource_correctHallEvent : IfxCcu6.h

IfxCcu6_InterruptSource_t12OneMatch : IfxCcu6.h

IfxCcu6_InterruptSource_t12PeriodMatch : IfxCcu6.h

IfxCcu6_InterruptSource_t13CompareMatch : IfxCcu6.h

IfxCcu6_InterruptSource_t13PeriodMatch : IfxCcu6.h

IfxCcu6_InterruptSource_trap : IfxCcu6.h

IfxCcu6_InterruptSource_wrongHallEvent : IfxCcu6.h

IfxCcu6_isModuleEnabled() : IfxCcu6.h

IfxCcu6_isModuleSuspended() : IfxCcu6.h

IfxCcu6_isT12OneNotification() : IfxCcu6.h

IfxCcu6_isT12PeriodNotification() : IfxCcu6.h

IfxCcu6_isT13CompareNotification() : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSelect : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSelect_noEvent : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSync : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSync_direct : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch : IfxCcu6.h

IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch : IfxCcu6.h

IFXCCU6_NUM_MODULES : IfxCcu6_cfg.h

IFXCCU6_NUM_SERVICE_REQUESTS : IfxCcu6_cfg.h

IFXCCU6_NUM_T12_CHANNELS : IfxCcu6_cfg.h

IFXCCU6_NUM_T13_CHANNELS : IfxCcu6_cfg.h

IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_NUM_MODULES : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS : IfxCcu6_PinMap.h

IfxCcu6_PwmBc_getMotorSpeed() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h

IfxCcu6_PwmBc_initModule() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h

IfxCcu6_PwmBc_initModuleConfig() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h

IfxCcu6_PwmBc_start() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h

IfxCcu6_PwmBc_stop() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h

IfxCcu6_PwmBc_updateHallPattern() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h

IfxCcu6_PwmHl : IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_disable() : IfxCcu6_PwmHl.c

IfxCcu6_PwmHl_enable() : IfxCcu6_PwmHl.c

IfxCcu6_PwmHl_getDeadtime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_getMinPulse() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_getMode() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_init() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_initConfig() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_invertActiveState() : IfxCcu6_PwmHl.h

IFXCCU6_PWMHL_MAX_CHANNELS : IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_modes : IfxCcu6_PwmHl.c

IfxCcu6_PwmHl_setDeadtime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_setMinPulse() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_setMode() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_setOnTime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_setOutputPins() : IfxCcu6_PwmHl.c

IfxCcu6_PwmHl_setupChannels() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_stdIfPwmHlInit() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_Update : IfxCcu6_PwmHl.h

IfxCcu6_PwmHl_updateCenterAligned() : IfxCcu6_PwmHl.c

IfxCcu6_PwmHl_updateEdgeAligned() : IfxCcu6_PwmHl.c

IfxCcu6_PwmHl_updateOff() : IfxCcu6_PwmHl.c

IfxCcu6_readTimer() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_resetModule() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_routeInterruptNode() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_ServiceRequest : IfxCcu6.h

IfxCcu6_ServiceRequest_0 : IfxCcu6.h

IfxCcu6_ServiceRequest_1 : IfxCcu6.h

IfxCcu6_ServiceRequest_2 : IfxCcu6.h

IfxCcu6_ServiceRequest_3 : IfxCcu6.h

IfxCcu6_setCaptureCompareInputSignal() : IfxCcu6.h

IfxCcu6_setCountingInputMode() : IfxCcu6.h

IfxCcu6_setCurrentHallPattern() : IfxCcu6.h

IfxCcu6_setDeadTimeValue() : IfxCcu6.h

IfxCcu6_setExpectedHallPattern() : IfxCcu6.h

IfxCcu6_setExternalRunMode() : IfxCcu6.h

IfxCcu6_setHallSensorTriggerMode() : IfxCcu6.h

IfxCcu6_setInputClockFrequency() : IfxCcu6.h

IfxCcu6_setInterruptStatusFlag() : IfxCcu6.h

IfxCcu6_setMultiChannelPwmPattern() : IfxCcu6.h

IfxCcu6_setMultiChannelSwitchingMode() : IfxCcu6.h

IfxCcu6_setMultiChannelSwitchingSync() : IfxCcu6.h

IfxCcu6_setOutputPassiveLevel() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_setOutputPassiveState() : IfxCcu6.h

IfxCcu6_setSingleShotModeEnable() : IfxCcu6.h

IfxCcu6_setSleepMode() : IfxCcu6.h

IfxCcu6_setSuspendMode() : IfxCcu6.h

IfxCcu6_setT12CaptureCompareState() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_setT12ChannelMode() : IfxCcu6.h

IfxCcu6_setT12CompareValue() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_setT12CounterValue() : IfxCcu6.h

IfxCcu6_setT12CountMode() : IfxCcu6.h

IfxCcu6_setT12Frequency() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_setT12InputSignal() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_setT12PeriodValue() : IfxCcu6.h

IfxCcu6_setT13CaptureCompareState() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_setT13CompareValue() : IfxCcu6.h

IfxCcu6_setT13CounterValue() : IfxCcu6.h

IfxCcu6_setT13Frequency() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_setT13InputSignal() : IfxCcu6.c , IfxCcu6.h

IfxCcu6_setT13PeriodValue() : IfxCcu6.h

IfxCcu6_setT13TriggerEventDirection() : IfxCcu6.h

IfxCcu6_setT13TriggerEventMode() : IfxCcu6.h

IfxCcu6_setTrapMode() : IfxCcu6.h

IfxCcu6_setTrapState() : IfxCcu6.h

IfxCcu6_SleepMode : IfxCcu6.h

IfxCcu6_SleepMode_disable : IfxCcu6.h

IfxCcu6_SleepMode_enable : IfxCcu6.h

IfxCcu6_startTimer() : IfxCcu6.h

IfxCcu6_stopTimer() : IfxCcu6.h

IfxCcu6_SuspendMode : IfxCcu6.h

IfxCcu6_SuspendMode_hard : IfxCcu6.h

IfxCcu6_SuspendMode_none : IfxCcu6.h

IfxCcu6_SuspendMode_soft : IfxCcu6.h

IfxCcu6_T12Channel : IfxCcu6.h

IfxCcu6_T12Channel_0 : IfxCcu6.h

IfxCcu6_T12Channel_1 : IfxCcu6.h

IfxCcu6_T12Channel_2 : IfxCcu6.h

IfxCcu6_T12ChannelMode : IfxCcu6.h

IfxCcu6_T12ChannelMode_compareMode : IfxCcu6.h

IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny : IfxCcu6.h

IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling : IfxCcu6.h

IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising : IfxCcu6.h

IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling : IfxCcu6.h

IfxCcu6_T12ChannelMode_hallSensor : IfxCcu6.h

IfxCcu6_T12ChannelMode_hysteresisLikecompare : IfxCcu6.h

IfxCcu6_T12ChannelMode_multiInputCaptureAny : IfxCcu6.h

IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling : IfxCcu6.h

IfxCcu6_T12ChannelMode_multiInputCaptureBothRising : IfxCcu6.h

IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising : IfxCcu6.h

IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling : IfxCcu6.h

IfxCcu6_T12ChannelMode_off : IfxCcu6.h

IfxCcu6_T12CountDirection : IfxCcu6.h

IfxCcu6_T12CountDirection_down : IfxCcu6.h

IfxCcu6_T12CountDirection_up : IfxCcu6.h

IfxCcu6_T12CountMode : IfxCcu6.h

IfxCcu6_T12CountMode_centerAligned : IfxCcu6.h

IfxCcu6_T12CountMode_edgeAligned : IfxCcu6.h

IfxCcu6_T12hr_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_T13hr_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h

IfxCcu6_T13TriggerDirection : IfxCcu6.h

IfxCcu6_T13TriggerDirection_anyT12 : IfxCcu6.h

IfxCcu6_T13TriggerDirection_noAction : IfxCcu6.h

IfxCcu6_T13TriggerDirection_onT12CountingDown : IfxCcu6.h

IfxCcu6_T13TriggerDirection_onT12CountingUp : IfxCcu6.h

IfxCcu6_T13TriggerEvent : IfxCcu6.h

IfxCcu6_T13TriggerEvent_noAction : IfxCcu6.h

IfxCcu6_T13TriggerEvent_onAnyT12Compare : IfxCcu6.h

IfxCcu6_T13TriggerEvent_onCC60RCompare : IfxCcu6.h

IfxCcu6_T13TriggerEvent_onCC61RCompare : IfxCcu6.h

IfxCcu6_T13TriggerEvent_onCC62RCompare : IfxCcu6.h

IfxCcu6_T13TriggerEvent_onCCPOSxEdge : IfxCcu6.h

IfxCcu6_T13TriggerEvent_onT12Period : IfxCcu6.h

IfxCcu6_T13TriggerEvent_onT12Zero : IfxCcu6.h

IfxCcu6_Timer_countOneStep() : IfxCcu6_Timer.c , IfxCcu6_Timer.h

IfxCcu6_Timer_initModule() : IfxCcu6_Timer.c , IfxCcu6_Timer.h

IfxCcu6_Timer_initModuleConfig() : IfxCcu6_Timer.c , IfxCcu6_Timer.h

IfxCcu6_Timer_start() : IfxCcu6_Timer.c , IfxCcu6_Timer.h

IfxCcu6_Timer_startSingleShotMode() : IfxCcu6_Timer.c , IfxCcu6_Timer.h

IfxCcu6_Timer_stop() : IfxCcu6_Timer.c , IfxCcu6_Timer.h

IfxCcu6_Timer_synchronousStart() : IfxCcu6_Timer.c , IfxCcu6_Timer.h

IfxCcu6_Timer_synchronousStop() : IfxCcu6_Timer.c , IfxCcu6_Timer.h

IfxCcu6_TimerId : IfxCcu6.h

IfxCcu6_TimerId_t12 : IfxCcu6.h

IfxCcu6_TimerId_t13 : IfxCcu6.h

IfxCcu6_TimerInputClock : IfxCcu6.h

IfxCcu6_TimerInputClock_fcc6 : IfxCcu6.h

IfxCcu6_TimerInputClock_fcc6By128 : IfxCcu6.h

IfxCcu6_TimerInputClock_fcc6By16 : IfxCcu6.h

IfxCcu6_TimerInputClock_fcc6By2 : IfxCcu6.h

IfxCcu6_TimerInputClock_fcc6By32 : IfxCcu6.h

IfxCcu6_TimerInputClock_fcc6By4 : IfxCcu6.h

IfxCcu6_TimerInputClock_fcc6By64 : IfxCcu6.h

IfxCcu6_TimerInputClock_fcc6By8 : IfxCcu6.h

IfxCcu6_TimerInputSignal : IfxCcu6.h

IfxCcu6_TimerInputSignal_a : IfxCcu6.h

IfxCcu6_TimerInputSignal_b : IfxCcu6.h

IfxCcu6_TimerInputSignal_c : IfxCcu6.h

IfxCcu6_TimerInputSignal_d : IfxCcu6.h

IfxCcu6_TimerInputSignal_e : IfxCcu6.h

IfxCcu6_TimerInputSignal_f : IfxCcu6.h

IfxCcu6_TimerInputSignal_g : IfxCcu6.h

IfxCcu6_TimerInputSignal_h : IfxCcu6.h

IfxCcu6_TimerRunStatus : IfxCcu6.h

IfxCcu6_TimerRunStatus_running : IfxCcu6.h

IfxCcu6_TimerRunStatus_stopped : IfxCcu6.h

IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_applyUpdate() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_disableUpdate() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_getFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_getInputFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_getPeriod() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_getPointer() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_getResolution() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_init() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_initConfig() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_run() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_setFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_setPeriod() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_setSingleMode() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_setTrigger() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_stdIfTimerInit() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_stop() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TimerWithTrigger_updateInputFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h

IfxCcu6_TPwm_initModule() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h

IfxCcu6_TPwm_initModuleConfig() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h

IfxCcu6_TPwm_pause() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h

IfxCcu6_TPwm_resume() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h

IfxCcu6_TPwm_start() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h

IfxCcu6_TPwm_stop() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h

IfxCcu6_TrapMode : IfxCcu6.h

IfxCcu6_TrapMode_automatic : IfxCcu6.h

IfxCcu6_TrapMode_manual : IfxCcu6.h

IfxCcu6_TrapState : IfxCcu6.h

IfxCcu6_TrapState_immediate : IfxCcu6.h

IfxCcu6_TrapState_t12Sync : IfxCcu6.h

IfxCcu6_TrapState_t13Sync : IfxCcu6.h

IfxCcu6_TrigOut : IfxCcu6_cfg.h

IfxCcu6_TrigOut_0 : IfxCcu6_cfg.h

IfxCcu6_TrigOut_1 : IfxCcu6_cfg.h

IfxCcu6_TrigOut_2 : IfxCcu6_cfg.h

IfxCcu6_TrigSel : IfxCcu6_cfg.h

IfxCcu6_TrigSel_cc60 : IfxCcu6_cfg.h

IfxCcu6_TrigSel_cc61 : IfxCcu6_cfg.h

IfxCcu6_TrigSel_cc62 : IfxCcu6_cfg.h

IfxCcu6_TrigSel_cout63 : IfxCcu6_cfg.h

IfxCcu6_TrigSel_sr1 : IfxCcu6_cfg.h

IfxCcu6_TrigSel_sr3 : IfxCcu6_cfg.h

IfxCcu6_updateHallPattern() : IfxCcu6.h

IFXCIF_CAM_ALIGN : IfxCif_Cam.c

IfxCif_Cam_calcMem() : IfxCif_Cam.c

IfxCif_Cam_clearAllFlags() : IfxCif_Cam.c , IfxCif_Cam.h

IfxCif_Cam_clearFrameReceptionFlag() : IfxCif_Cam.h

IfxCif_Cam_clearJpegEncodingCompleteFlag() : IfxCif_Cam.h

IfxCif_Cam_disableJpegEncoder() : IfxCif_Cam.c , IfxCif_Cam.h

IfxCif_Cam_enableJpegEncoder() : IfxCif_Cam.c , IfxCif_Cam.h

IfxCif_Cam_getBbbAddress() : IfxCif_Cam.h

IfxCif_Cam_getExtraFrameSize() : IfxCif_Cam.h

IfxCif_Cam_getExtraPathMemInfo() : IfxCif_Cam.h

IfxCif_Cam_getExtraPathPictureInfo() : IfxCif_Cam.c , IfxCif_Cam.h

IfxCif_Cam_getFrameSize() : IfxCif_Cam.h

IfxCif_Cam_getJpegEncodedSize() : IfxCif_Cam.h

IfxCif_Cam_getLastExtraAddress() : IfxCif_Cam.h

IfxCif_Cam_getLastExtraCaptureInfo() : IfxCif_Cam.h

IfxCif_Cam_getLastFrameAddress() : IfxCif_Cam.h

IfxCif_Cam_getLastFrameCaptureInfo() : IfxCif_Cam.h

IfxCif_Cam_getLastJpegEncodingInfo() : IfxCif_Cam.c , IfxCif_Cam.h

IfxCif_Cam_getNextFrameAddress() : IfxCif_Cam.h

IfxCif_Cam_getNextJpegFrameAddress() : IfxCif_Cam.h

IfxCif_Cam_incrementAddress() : IfxCif_Cam.h

IfxCif_Cam_init() : IfxCif_Cam.c , IfxCif_Cam.h

IfxCif_Cam_initCamera() : IfxCif_Cam.c

IfxCif_Cam_initCif() : IfxCif_Cam.c

IfxCif_Cam_initCifDownscaler() : IfxCif_Cam.c

IfxCif_Cam_initCifExtraPath() : IfxCif_Cam.c

IfxCif_Cam_initCifIspUnit() : IfxCif_Cam.c

IfxCif_Cam_initCifJpegEncoder() : IfxCif_Cam.c

IfxCif_Cam_initCifMemInterface() : IfxCif_Cam.c

IfxCif_Cam_initEmem() : IfxCif_Cam.c

IfxCif_Cam_initMemSize() : IfxCif_Cam.c

IfxCif_Cam_initPictInfo() : IfxCif_Cam.c

IfxCif_Cam_initPortPins() : IfxCif_Cam.c

IfxCif_Cam_isEmulationExtensionAvailable() : IfxCif_Cam.c

IfxCif_Cam_isFrameReceptionComplete() : IfxCif_Cam.h

IfxCif_Cam_isJpegEncodingComplete() : IfxCif_Cam.h

IfxCif_Cam_IspMode : IfxCif_Cam.h

IfxCif_Cam_IspMode_raw : IfxCif_Cam.h

IfxCif_Cam_IspMode_undefined : IfxCif_Cam.h

IfxCif_Cam_IspMode_yuvInterleaved : IfxCif_Cam.h

IfxCif_Cam_IspMode_yuvPlanar : IfxCif_Cam.h

IFXCIF_CAM_MEM_ALIGN : IfxCif_Cam.c

IFXCIF_CAM_MEM_ALIGN_SIZE : IfxCif_Cam.h

IFXCIF_CAM_MEM_GAPSIZE : IfxCif_Cam.h

IfxCif_Cam_restartCapture() : IfxCif_Cam.c , IfxCif_Cam.h

IfxCif_Cam_skipPicture() : IfxCif_Cam.h

IfxCif_Cam_startCapture() : IfxCif_Cam.c , IfxCif_Cam.h

IfxCif_Cam_State : IfxCif_Cam.h

IfxCif_Cam_State_running : IfxCif_Cam.h

IfxCif_Cam_State_stopped : IfxCif_Cam.h

IfxCif_Cam_Status : IfxCif_Cam.h

IfxCif_Cam_Status_cameraCommError : IfxCif_Cam.h

IfxCif_Cam_Status_notAvailable : IfxCif_Cam.h

IfxCif_Cam_Status_notEnoughMemory : IfxCif_Cam.h

IfxCif_Cam_Status_ok : IfxCif_Cam.h

IfxCif_Cam_stopCapture() : IfxCif_Cam.c , IfxCif_Cam.h

IfxCif_Cam_yuvMemSize() : IfxCif_Cam.c

IfxCif_clearEpError() : IfxCif.c , IfxCif.h

IfxCif_clearEpInterrupt() : IfxCif.c , IfxCif.h

IfxCif_clearIspError() : IfxCif.c , IfxCif.h

IfxCif_clearIspInterrupt() : IfxCif.c , IfxCif.h

IfxCif_clearJpeInterrupt() : IfxCif.c , IfxCif.h

IfxCif_clearKernelResetState() : IfxCif.h

IfxCif_clearMiInterrupt() : IfxCif.c , IfxCif.h

IfxCif_clearMiStatus() : IfxCif.c , IfxCif.h

IfxCif_clearSecurityWatchdogInterrupt() : IfxCif.c , IfxCif.h

IfxCif_CLK_P00_7_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_D0_P02_0_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_D10_P00_1_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_D11_P00_2_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_D12_P00_3_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_D13_P00_4_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_D14_P00_5_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_D15_P00_6_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_D1_P02_1_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_D2_P02_2_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_D3_P02_3_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_D4_P02_4_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_D5_P02_5_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_D6_P02_6_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_D7_P02_7_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_D8_P02_8_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_D9_P00_0_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_DataPathSelectorForMainPath : IfxCif.h

IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder : IfxCif.h

IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed : IfxCif.h

IfxCif_DataPathSelectorForMainPath_Disabled : IfxCif.h

IFXCIF_DEBUG : IfxCif_cfg.h

IfxCif_DpControlSources : IfxCif.h

IfxCif_DpControlSources_FrameNumberCounter : IfxCif.h

IfxCif_DpControlSources_LineNumberCounter : IfxCif.h

IfxCif_DpControlSources_TimestampCounter : IfxCif.h

IfxCif_DpControlSources_UserDefinedSymbol1 : IfxCif.h

IfxCif_DpControlSources_UserDefinedSymbol2 : IfxCif.h

IfxCif_DpControlSources_UserDefinedSymbol3 : IfxCif.h

IfxCif_DpControlSources_UserDefinedSymbol4 : IfxCif.h

IfxCif_DpControlSources_UserDefinedSymbol5 : IfxCif.h

IfxCif_DpControlSources_UserDefinedSymbol6 : IfxCif.h

IfxCif_DpControlSources_UserDefinedSymbol7 : IfxCif.h

IfxCif_DpControlSources_UserDefinedSymbol8 : IfxCif.h

IfxCif_DpCounters : IfxCif.h

IfxCif_DpCounters_FrameNumberCounter : IfxCif.h

IfxCif_DpCounters_LineNumberCounter : IfxCif.h

IfxCif_DpCounters_PredividerCounter : IfxCif.h

IfxCif_DpCounters_TimestampCounter : IfxCif.h

IfxCif_dpResetCounter() : IfxCif.c , IfxCif.h

IfxCif_DpSourcePath : IfxCif.h

IfxCif_DpSourcePath_ExtraPath1 : IfxCif.h

IfxCif_DpSourcePath_ExtraPath2 : IfxCif.h

IfxCif_DpSourcePath_ExtraPath4 : IfxCif.h

IfxCif_DpSourcePath_ExtraPath5 : IfxCif.h

IfxCif_DpSourcePath_MainPath : IfxCif.h

IfxCif_EpErrorClearSources : IfxCif.h

IfxCif_EpErrorClearSources_ExtraPath1SizeError : IfxCif.h

IfxCif_EpErrorClearSources_ExtraPath2SizeError : IfxCif.h

IfxCif_EpErrorClearSources_ExtraPath3SizeError : IfxCif.h

IfxCif_EpErrorClearSources_ExtraPath4SizeError : IfxCif.h

IfxCif_EpErrorClearSources_ExtraPath5SizeError : IfxCif.h

IfxCif_EpErrorSources : IfxCif.h

IfxCif_EpErrorSources_ExtraPath1FifoFull : IfxCif.h

IfxCif_EpErrorSources_ExtraPath1SizeError : IfxCif.h

IfxCif_EpErrorSources_ExtraPath2FifoFull : IfxCif.h

IfxCif_EpErrorSources_ExtraPath2SizeError : IfxCif.h

IfxCif_EpErrorSources_ExtraPath3FifoFull : IfxCif.h

IfxCif_EpErrorSources_ExtraPath3SizeError : IfxCif.h

IfxCif_EpErrorSources_ExtraPath4FifoFull : IfxCif.h

IfxCif_EpErrorSources_ExtraPath4SizeError : IfxCif.h

IfxCif_EpErrorSources_ExtraPath5FifoFull : IfxCif.h

IfxCif_EpErrorSources_ExtraPath5SizeError : IfxCif.h

IfxCif_EpFeatures : IfxCif.h

IfxCif_EpFeatures_ByteSwap : IfxCif.h

IfxCif_EpFeatures_InitBaseAddress : IfxCif.h

IfxCif_EpFeatures_InitOffsetCounter : IfxCif.h

IfxCif_EpFeatures_PictureDataPath : IfxCif.h

IfxCif_epForceConfigurationUpdate() : IfxCif.c , IfxCif.h

IfxCif_EpInterrupts : IfxCif.h

IfxCif_EpInterrupts_Count : IfxCif.h

IfxCif_EpInterrupts_FillLevel : IfxCif.h

IfxCif_EpInterrupts_FrameEnd : IfxCif.h

IfxCif_EpInterrupts_MacroBlockLine : IfxCif.h

IfxCif_EpInterrupts_WrapAround : IfxCif.h

IfxCif_epSkipPicture() : IfxCif.c , IfxCif.h

IfxCif_EpWriteFormat : IfxCif.h

IfxCif_EpWriteFormat_Raw8Bit : IfxCif.h

IfxCif_EpWriteFormat_RawAndData : IfxCif.h

IfxCif_EpWriteFormat_RawGreater : IfxCif.h

IfxCif_EpWriteFormat_YCbCr : IfxCif.h

IfxCif_ErrorState : IfxCif.h

IfxCif_ErrorState_Error : IfxCif.h

IfxCif_ErrorState_NoError : IfxCif.h

IFXCIF_EXTRA_PATHS : IfxCif_cfg.h

IfxCif_ExtraPath : IfxCif.h

IfxCif_ExtraPath_1 : IfxCif.h

IfxCif_ExtraPath_2 : IfxCif.h

IfxCif_ExtraPath_3 : IfxCif.h

IfxCif_ExtraPath_4 : IfxCif.h

IfxCif_ExtraPath_5 : IfxCif.h

IfxCif_generateIspFrameSynchronousConfigUpdateSignal() : IfxCif.h

IfxCif_generateIspImmediateConfigUpdateSignal() : IfxCif.h

IfxCif_generateMiImmediateConfigUpdateSignal() : IfxCif.h

IfxCif_getBaseAddressInitializationEnableState() : IfxCif.h

IfxCif_getCifModuleId() : IfxCif.h

IfxCif_getCifModulePortInputSelection() : IfxCif.h

IfxCif_getCifModuleRevision() : IfxCif.h

IfxCif_getCifModuleType() : IfxCif.h

IfxCif_getClockControlLogicState() : IfxCif.h

IfxCif_getCurrentIspFrameCount() : IfxCif.h

IfxCif_getCurrentIspInformFieldInformation() : IfxCif.h

IfxCif_getCurrentIspInputFormatterState() : IfxCif.h

IfxCif_getCurrentIspPictureOffset() : IfxCif.c , IfxCif.h

IfxCif_getCurrentIspPictureSize() : IfxCif.c , IfxCif.h

IfxCif_getDataPathSelectorForMainPath() : IfxCif.h

IfxCif_getDpControlEnableState() : IfxCif.c , IfxCif.h

IfxCif_getDpCounter() : IfxCif.c , IfxCif.h

IfxCif_getDpEnableState() : IfxCif.h

IfxCif_getDpSourcePath() : IfxCif.h

IfxCif_getDpUserDefinedSymbol() : IfxCif.c , IfxCif.h

IfxCif_getEpBaseAddress() : IfxCif.c , IfxCif.h

IfxCif_getEpBaseInitAddress() : IfxCif.c , IfxCif.h

IfxCif_getEpCroppingCameraDisplacement() : IfxCif.c , IfxCif.h

IfxCif_getEpCroppingCurrentPictureOffset() : IfxCif.c , IfxCif.h

IfxCif_getEpCroppingCurrentPictureSize() : IfxCif.c , IfxCif.h

IfxCif_getEpCroppingEnableState() : IfxCif.c , IfxCif.h

IfxCif_getEpCroppingMaximumDisplacement() : IfxCif.c , IfxCif.h

IfxCif_getEpCroppingOffsetOutputWindow() : IfxCif.c , IfxCif.h

IfxCif_getEpCroppingPictureSize() : IfxCif.c , IfxCif.h

IfxCif_getEpCroppingRecenterState() : IfxCif.c , IfxCif.h

IfxCif_getEpErrorState() : IfxCif.c , IfxCif.h

IfxCif_getEpFeatureEnableState() : IfxCif.c , IfxCif.h

IfxCif_getEpInitialFillLevelInterruptOffset() : IfxCif.c , IfxCif.h

IfxCif_getEpInitialOffsetCounter() : IfxCif.c , IfxCif.h

IfxCif_getEpInitSize() : IfxCif.c , IfxCif.h

IfxCif_getEpInputEnableState() : IfxCif.c , IfxCif.h

IfxCif_getEpInterruptEnableState() : IfxCif.c , IfxCif.h

IfxCif_getEpInterruptOffset() : IfxCif.c , IfxCif.h

IfxCif_getEpOffsetCounter() : IfxCif.c , IfxCif.h

IfxCif_getEpOffsetCounterStart() : IfxCif.c , IfxCif.h

IfxCif_getEpOutputEnableState() : IfxCif.c , IfxCif.h

IfxCif_getEpRecenterValue() : IfxCif.c , IfxCif.h

IfxCif_getEpSize() : IfxCif.c , IfxCif.h

IfxCif_getEpWriteFormat() : IfxCif.c , IfxCif.h

IfxCif_getHuffmanAcTableLength() : IfxCif.c , IfxCif.h

IfxCif_getHuffmanAcTableSelectorState() : IfxCif.c , IfxCif.h

IfxCif_getHuffmanDcTableLength() : IfxCif.c , IfxCif.h

IfxCif_getHuffmanDcTableSelectorState() : IfxCif.c , IfxCif.h

IfxCif_getInputInterface() : IfxCif.h

IfxCif_getInternalClockMode() : IfxCif.c , IfxCif.h

IfxCif_getIspAcquisitionOffset() : IfxCif.c , IfxCif.h

IfxCif_getIspAcquisitionSize() : IfxCif.c , IfxCif.h

IfxCif_getIspCcirSequence() : IfxCif.h

IfxCif_getIspColorSpaceMatrixCrominanceClippingRange() : IfxCif.h

IfxCif_getIspColorSpaceMatrixLuminanceClippingRange() : IfxCif.h

IfxCif_getIspErrorState() : IfxCif.c , IfxCif.h

IfxCif_getIspFieldInvertState() : IfxCif.h

IfxCif_getIspFieldSelection() : IfxCif.h

IfxCif_getIspHSyncPolarity() : IfxCif.h

IfxCif_getIspInputFormatterState() : IfxCif.h

IfxCif_getIspInputInterface() : IfxCif.h

IfxCif_getIspInputPortSDataState() : IfxCif.h

IfxCif_getIspInputPortSHSyncState() : IfxCif.h

IfxCif_getIspInputPortSVSyncState() : IfxCif.h

IfxCif_getIspInputSelectionAppendState() : IfxCif.c , IfxCif.h

IfxCif_getIspInterruptEnableState() : IfxCif.c , IfxCif.h

IfxCif_getIspisCameraDisplacement() : IfxCif.c , IfxCif.h

IfxCif_getIspisCurrentPictureOffset() : IfxCif.c , IfxCif.h

IfxCif_getIspisCurrentPictureSize() : IfxCif.c , IfxCif.h

IfxCif_getIspisEnableState() : IfxCif.h

IfxCif_getIspisMaximumDisplacement() : IfxCif.c , IfxCif.h

IfxCif_getIspisOffsetOutputWindow() : IfxCif.c , IfxCif.h

IfxCif_getIspisPictureSize() : IfxCif.c , IfxCif.h

IfxCif_getIspisRecenterEnableState() : IfxCif.c , IfxCif.h

IfxCif_getIspisRecenterValue() : IfxCif.h

IfxCif_getIspMode() : IfxCif.h

IfxCif_getIspOutputState() : IfxCif.h

IfxCif_getIspOutputWindowOffset() : IfxCif.c , IfxCif.h

IfxCif_getIspPictureSize() : IfxCif.c , IfxCif.h

IfxCif_getIspSamplingEdge() : IfxCif.h

IfxCif_getIspState() : IfxCif.h

IfxCif_getIspVSyncPolarity() : IfxCif.h

IfxCif_getJpeDebugSignalState() : IfxCif.c , IfxCif.h

IfxCif_getJpegCodecImageSize() : IfxCif.c , IfxCif.h

IfxCif_getJpegJfifStreamEncoderContinuousMode() : IfxCif.h

IfxCif_getJpegPictureEncodingFormat() : IfxCif.h

IfxCif_getJpeHeaderGenerationMode() : IfxCif.h

IfxCif_getJpeHeaderMode() : IfxCif.h

IfxCif_getJpeInterruptEnableState() : IfxCif.c , IfxCif.h

IfxCif_getJpeMode() : IfxCif.h

IfxCif_getJpeQTableSelector() : IfxCif.c , IfxCif.h

IfxCif_getJpeRestartInterval() : IfxCif.h

IfxCif_getJpeScalingEnableState() : IfxCif.c , IfxCif.h

IfxCif_getJpeState() : IfxCif.h

IfxCif_getJpeTableId() : IfxCif.h

IfxCif_getKernelResetRequestState() : IfxCif.c , IfxCif.h

IfxCif_getKernelResetStatus() : IfxCif.h

IfxCif_getLinearDownscalerEnableState() : IfxCif.c , IfxCif.h

IfxCif_getLinearDownscalerScalingFactor() : IfxCif.c , IfxCif.h

IfxCif_getLinearDownscalerScalingMode() : IfxCif.c , IfxCif.h

IfxCif_getMainPictureComponentBaseInitAddress() : IfxCif.c , IfxCif.h

IfxCif_getMaskedEpInterruptTriggeredState() : IfxCif.c , IfxCif.h

IfxCif_getMaskedIspInterruptTriggeredState() : IfxCif.c , IfxCif.h

IfxCif_getMaskedJpeInterruptTriggeredState() : IfxCif.c , IfxCif.h

IfxCif_getMaskedMiInterruptTriggeredState() : IfxCif.c , IfxCif.h

IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState() : IfxCif.c , IfxCif.h

IfxCif_getMiByteCount() : IfxCif.h

IfxCif_getMiByteSwapEnableState() : IfxCif.h

IfxCif_getMiChrominanceBurstLength() : IfxCif.h

IfxCif_getMiDataPathInputEnableState() : IfxCif.c , IfxCif.h

IfxCif_getMiDataPathOutputEnableState() : IfxCif.c , IfxCif.h

IfxCif_getMiFeatureEnableState() : IfxCif.c , IfxCif.h

IfxCif_getMiInterruptEnableState() : IfxCif.c , IfxCif.h

IfxCif_getMiLuminanceBurstLength() : IfxCif.h

IfxCif_getMiMainPictureComponentBaseAddress() : IfxCif.c , IfxCif.h

IfxCif_getMiMainPictureComponentInitialOffsetCounter() : IfxCif.c , IfxCif.h

IfxCif_getMiMainPictureComponentInitSize() : IfxCif.c , IfxCif.h

IfxCif_getMiMainPictureComponentOffsetCounter() : IfxCif.c , IfxCif.h

IfxCif_getMiMainPictureComponentOffsetCounterStart() : IfxCif.c , IfxCif.h

IfxCif_getMiMainPictureComponentSize() : IfxCif.c , IfxCif.h

IfxCif_getMiMainPictureWriteFormat() : IfxCif.h

IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset() : IfxCif.h

IfxCif_getMiMainPictureYInterruptOffset() : IfxCif.h

IfxCif_getMiOffsetCounterInitializationEnableState() : IfxCif.h

IfxCif_getMiStatusInformation() : IfxCif.c , IfxCif.h

IfxCif_getModuleNumber() : IfxCif.h

IfxCif_getModuleRevisionNumber() : IfxCif.h

IfxCif_getModuleState() : IfxCif.h

IfxCif_getModuleType() : IfxCif.h

IfxCif_getNumberOfAcquisitionFrames() : IfxCif.h

IfxCif_getRawEpInterruptTriggeredState() : IfxCif.c , IfxCif.h

IfxCif_getRawIspInterruptTriggeredState() : IfxCif.c , IfxCif.h

IfxCif_getRawJpeInterruptTriggeredState() : IfxCif.c , IfxCif.h

IfxCif_getRawMiInterruptTriggeredState() : IfxCif.c , IfxCif.h

IfxCif_getRawSecurityWatchdogInterruptTriggeredState() : IfxCif.c , IfxCif.h

IfxCif_getSecurityWatchdogCounterPredivider() : IfxCif.h

IfxCif_getSecurityWatchdogEnableState() : IfxCif.h

IfxCif_getSecurityWatchdogInterruptEnableState() : IfxCif.c , IfxCif.h

IfxCif_getSecurityWatchdogTimeout() : IfxCif.c , IfxCif.h

IfxCif_getSoftwareResetMode() : IfxCif.c , IfxCif.h

IfxCif_getYCSplitterChannelMode() : IfxCif.h

IfxCif_HSNC_P00_9_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_HuffmanTableComponents : IfxCif.h

IfxCif_HuffmanTableComponents_Component0 : IfxCif.h

IfxCif_HuffmanTableComponents_Component1 : IfxCif.h

IfxCif_HuffmanTableComponents_Component2 : IfxCif.h

IfxCif_HuffmanTables : IfxCif.h

IfxCif_HuffmanTables_Table0 : IfxCif.h

IfxCif_HuffmanTables_Table1 : IfxCif.h

IfxCif_ImageTiers : IfxCif.h

IfxCif_ImageTiers_Horizontal : IfxCif.h

IfxCif_ImageTiers_Vertical : IfxCif.h

IfxCif_initJpegEncoder() : IfxCif.h

IfxCif_InputInterface : IfxCif.h

IfxCif_InputInterface_ParallelInterface : IfxCif.h

IfxCif_InterruptTriggeredState : IfxCif.h

IfxCif_InterruptTriggeredState_NotTriggered : IfxCif.h

IfxCif_InterruptTriggeredState_Triggered : IfxCif.h

IfxCif_IspCcirSequence : IfxCif.h

IfxCif_IspCcirSequence_CbYCrY : IfxCif.h

IfxCif_IspCcirSequence_YCbYCr : IfxCif.h

IfxCif_IspCcirSequence_YCrYCb : IfxCif.h

IfxCif_IspColorSpaceMatrixCrominanceClippingRange : IfxCif.h

IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255 : IfxCif.h

IfxCif_IspColorSpaceMatrixCrominanceClippingRange_16To240 : IfxCif.h

IfxCif_IspColorSpaceMatrixLuminanceClippingRange : IfxCif.h

IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255 : IfxCif.h

IfxCif_IspColorSpaceMatrixLuminanceClippingRange_16To235 : IfxCif.h

IfxCif_IspErrorSources : IfxCif.h

IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule : IfxCif.h

IfxCif_IspErrorSources_SizeErrorInInformSubmodule : IfxCif.h

IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule : IfxCif.h

IfxCif_IspFieldSelection : IfxCif.h

IfxCif_IspFieldSelection_AllFields : IfxCif.h

IfxCif_IspFieldSelection_OnlyEvenFields : IfxCif.h

IfxCif_IspFieldSelection_OnlyOddFields : IfxCif.h

IfxCif_IspInformFieldInformation : IfxCif.h

IfxCif_IspInformFieldInformation_Even : IfxCif.h

IfxCif_IspInformFieldInformation_Odd : IfxCif.h

IfxCif_IspInputInterface : IfxCif.h

IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb : IfxCif.h

IfxCif_IspInputInterface_10BitExternalInterfaceAppendZeros : IfxCif.h

IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb : IfxCif.h

IfxCif_IspInputInterface_12BitExternalInterfaceAppendZeros : IfxCif.h

IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb : IfxCif.h

IfxCif_IspInputInterface_14BitExternalInterfaceAppendZeros : IfxCif.h

IfxCif_IspInputInterface_16BitExternalInterface : IfxCif.h

IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb : IfxCif.h

IfxCif_IspInputInterface_8BitExternalInterfaceAppendZeros : IfxCif.h

IfxCif_IspInterruptSources : IfxCif.h

IfxCif_IspInterruptSources_FrameCompletelyPutOut : IfxCif.h

IfxCif_IspInterruptSources_IspTurnedOff : IfxCif.h

IfxCif_IspInterruptSources_LossOfData : IfxCif.h

IfxCif_IspInterruptSources_PictureSizeViolationOccurred : IfxCif.h

IfxCif_IspInterruptSources_SampledInputFrameComplete : IfxCif.h

IfxCif_IspInterruptSources_SecurityWatchdogTimeout : IfxCif.h

IfxCif_IspInterruptSources_StartEdgeOfHSync : IfxCif.h

IfxCif_IspInterruptSources_StartEdgeOfVSync : IfxCif.h

IfxCif_IspMode : IfxCif.h

IfxCif_IspMode_DataMode : IfxCif.h

IfxCif_IspMode_ItuRBT601 : IfxCif.h

IfxCif_IspMode_ItuRBT656 : IfxCif.h

IfxCif_IspMode_RawPicture : IfxCif.h

IfxCif_IspMode_RawPictureWithItuRBT656Sync : IfxCif.h

IfxCif_IspSamplingEdge : IfxCif.h

IfxCif_IspSamplingEdge_NegativeEdge : IfxCif.h

IfxCif_IspSamplingEdge_PositiveEdge : IfxCif.h

IfxCif_IspSyncPolarity : IfxCif.h

IfxCif_IspSyncPolarity_HighActive : IfxCif.h

IfxCif_IspSyncPolarity_LowActive : IfxCif.h

IfxCif_JpeDebugSignalSources : IfxCif.h

IfxCif_JpeDebugSignalSources_BadTableAccess : IfxCif.h

IfxCif_JpeDebugSignalSources_QiqTableAccess : IfxCif.h

IfxCif_JpeDebugSignalSources_R2BMemoryFull : IfxCif.h

IfxCif_JpeDebugSignalSources_VlcEncodeBusy : IfxCif.h

IfxCif_JpeDebugSignalSources_VlcTableBusy : IfxCif.h

IfxCif_JpeDebugSignalState : IfxCif.h

IfxCif_JpeDebugSignalState_Active : IfxCif.h

IfxCif_JpeDebugSignalState_Inactive : IfxCif.h

IfxCif_jpeGenerateHeader() : IfxCif.h

IfxCif_JpegJfifStreamEncoderContinuousMode : IfxCif.h

IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically : IfxCif.h

IfxCif_JpegJfifStreamEncoderContinuousMode_StartAutomatically : IfxCif.h

IfxCif_JpegJfifStreamEncoderContinuousMode_StopAtFrameEnd : IfxCif.h

IfxCif_JpegPictureEncodingFormat : IfxCif.h

IfxCif_JpegPictureEncodingFormat_400 : IfxCif.h

IfxCif_JpegPictureEncodingFormat_422 : IfxCif.h

IfxCif_JpeHeaderGenerationMode : IfxCif.h

IfxCif_JpeHeaderGenerationMode_TransmitLastHeaderBytes : IfxCif.h

IfxCif_JpeHeaderGenerationMode_WaitForEncodedImage : IfxCif.h

IfxCif_JpeHeaderMode : IfxCif.h

IfxCif_JpeHeaderMode_JfifHeader : IfxCif.h

IfxCif_JpeHeaderMode_NoAppnHeader : IfxCif.h

IfxCif_JpeInterruptSources : IfxCif.h

IfxCif_JpeInterruptSources_DcTableError : IfxCif.h

IfxCif_JpeInterruptSources_EncodingComplete : IfxCif.h

IfxCif_JpeInterruptSources_HeaderGenerationComplete : IfxCif.h

IfxCif_JpeInterruptSources_R2BImageSizeError : IfxCif.h

IfxCif_JpeInterruptSources_VlcSymbolError : IfxCif.h

IfxCif_JpeInterruptSources_VlcTableError : IfxCif.h

IfxCif_JpeQTableSelector : IfxCif.h

IfxCif_JpeQTableSelector_Table0 : IfxCif.h

IfxCif_JpeQTableSelector_Table1 : IfxCif.h

IfxCif_JpeQTableSelector_Table2 : IfxCif.h

IfxCif_JpeQTableSelector_Table3 : IfxCif.h

IfxCif_JpeQTableSelectorComponents : IfxCif.h

IfxCif_JpeQTableSelectorComponents_U : IfxCif.h

IfxCif_JpeQTableSelectorComponents_V : IfxCif.h

IfxCif_JpeQTableSelectorComponents_Y : IfxCif.h

IfxCif_JpeScalingValueSources : IfxCif.h

IfxCif_JpeScalingValueSources_CbCr : IfxCif.h

IfxCif_JpeScalingValueSources_Y : IfxCif.h

IfxCif_JpeState : IfxCif.h

IfxCif_JpeState_Busy : IfxCif.h

IfxCif_JpeState_Free : IfxCif.h

IfxCif_JpeTableId : IfxCif.h

IfxCif_JpeTableId_QTable0 : IfxCif.h

IfxCif_JpeTableId_QTable1 : IfxCif.h

IfxCif_JpeTableId_QTable2 : IfxCif.h

IfxCif_JpeTableId_QTable3 : IfxCif.h

IfxCif_JpeTableId_VlcAcTable0 : IfxCif.h

IfxCif_JpeTableId_VlcAcTable1 : IfxCif.h

IfxCif_JpeTableId_VlcDcTable0 : IfxCif.h

IfxCif_JpeTableId_VlcDcTable1 : IfxCif.h

IfxCif_LinearDownscalerScalingMode : IfxCif.h

IfxCif_LinearDownscalerScalingMode_Disabled : IfxCif.h

IfxCif_LinearDownscalerScalingMode_DoublePass : IfxCif.h

IfxCif_LinearDownscalerScalingMode_DoubleSkip : IfxCif.h

IfxCif_LinearDownscalerScalingMode_SinglePass : IfxCif.h

IfxCif_LinearDownscalerScalingMode_SingleSkip : IfxCif.h

IFXCIF_MAX_I2CNAK : IfxCif_cfg.h

IfxCif_MiBurstLength : IfxCif.h

IfxCif_MiBurstLength_4BeatBursts : IfxCif.h

IfxCif_MiBurstLength_8BeatBursts : IfxCif.h

IfxCif_MiDataPaths : IfxCif.h

IfxCif_MiDataPaths_JpegData : IfxCif.h

IfxCif_MiDataPaths_MainPictureData : IfxCif.h

IfxCif_MiDataPaths_RawData : IfxCif.h

IfxCif_MiInterruptSources : IfxCif.h

IfxCif_MiInterruptSources_BusError : IfxCif.h

IfxCif_MiInterruptSources_FillMainPictureY : IfxCif.h

IfxCif_MiInterruptSources_MacroBlockLine : IfxCif.h

IfxCif_MiInterruptSources_MainPictureFrameEnd : IfxCif.h

IfxCif_MiInterruptSources_WrapMainPictureCb : IfxCif.h

IfxCif_MiInterruptSources_WrapMainPictureCr : IfxCif.h

IfxCif_MiInterruptSources_WrapMainPictureY : IfxCif.h

IfxCif_MiMainPicturePathComponents : IfxCif.h

IfxCif_MiMainPicturePathComponents_Cb : IfxCif.h

IfxCif_MiMainPicturePathComponents_Cr : IfxCif.h

IfxCif_MiMainPicturePathComponents_Y : IfxCif.h

IfxCif_MiMainPictureWriteFormat : IfxCif.h

IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit : IfxCif.h

IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit : IfxCif.h

IfxCif_MiMainPictureWriteFormat_SemiPlanarOrData8Bit : IfxCif.h

IfxCif_miSkipPicture() : IfxCif.h

IfxCif_MiStatusClearSources : IfxCif.h

IfxCif_MiStatusClearSources_BusWriteError : IfxCif.h

IfxCif_MiStatusClearSources_ExtraPath1FifoFull : IfxCif.h

IfxCif_MiStatusClearSources_ExtraPath2FifoFull : IfxCif.h

IfxCif_MiStatusClearSources_ExtraPath3FifoFull : IfxCif.h

IfxCif_MiStatusClearSources_ExtraPath4FifoFull : IfxCif.h

IfxCif_MiStatusClearSources_ExtraPath5FifoFull : IfxCif.h

IfxCif_MiStatusClearSources_MainPictureCbFifoFull : IfxCif.h

IfxCif_MiStatusClearSources_MainPictureCrFifoFull : IfxCif.h

IfxCif_MiStatusClearSources_MainPictureYFifoFull : IfxCif.h

IfxCif_MiStatusInformationSources : IfxCif.h

IfxCif_MiStatusInformationSources_BusWriteError : IfxCif.h

IfxCif_MiStatusInformationSources_MainPictureCbFifoFull : IfxCif.h

IfxCif_MiStatusInformationSources_MainPictureCrFifoFull : IfxCif.h

IfxCif_MiStatusInformationSources_MainPictureYFifoFull : IfxCif.h

IFXCIF_NUM_MODULES : IfxCif_cfg.h

IfxCif_PortInputSelection : IfxCif.h

IfxCif_PortInputSelection_PinMapping0 : IfxCif.h

IfxCif_PortInputSelection_PinMapping1 : IfxCif.h

IfxCif_programJpeTable() : IfxCif.c , IfxCif.h

IfxCif_resetModule() : IfxCif.c , IfxCif.h

IfxCif_resetSecurityWatchdogCounter() : IfxCif.c , IfxCif.h

IfxCif_SecurityWatchdogCounters : IfxCif.h

IfxCif_SecurityWatchdogCounters_Horizontal : IfxCif.h

IfxCif_SecurityWatchdogCounters_Predivider : IfxCif.h

IfxCif_SecurityWatchdogCounters_Vertical : IfxCif.h

IfxCif_SecurityWatchdogInterruptSources : IfxCif.h

IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout : IfxCif.h

IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout : IfxCif.h

IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout : IfxCif.h

IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout : IfxCif.h

IfxCif_SecurityWatchdogTimeoutCounters : IfxCif.h

IfxCif_SecurityWatchdogTimeoutCounters_EndStart : IfxCif.h

IfxCif_SecurityWatchdogTimeoutCounters_StartEnd : IfxCif.h

IfxCif_setClockControlLogicState() : IfxCif.h

IfxCif_setDataPathSelectorForMainPath() : IfxCif.h

IfxCif_setDpControlEnableState() : IfxCif.c , IfxCif.h

IfxCif_setDpCounter() : IfxCif.c , IfxCif.h

IfxCif_setDpEnableState() : IfxCif.h

IfxCif_setDpSourcePath() : IfxCif.h

IfxCif_setDpUserDefinedSymbol() : IfxCif.c , IfxCif.h

IfxCif_setEpBaseInitAddress() : IfxCif.c , IfxCif.h

IfxCif_setEpCroppingCameraDisplacement() : IfxCif.c , IfxCif.h

IfxCif_setEpCroppingEnableState() : IfxCif.c , IfxCif.h

IfxCif_setEpCroppingMaximumDisplacement() : IfxCif.c , IfxCif.h

IfxCif_setEpCroppingOffsetOutputWindow() : IfxCif.c , IfxCif.h

IfxCif_setEpCroppingOffsetsOutputWindow() : IfxCif.c , IfxCif.h

IfxCif_setEpCroppingPictureSize() : IfxCif.c , IfxCif.h

IfxCif_setEpCroppingPictureSizes() : IfxCif.c , IfxCif.h

IfxCif_setEpFeatureEnableState() : IfxCif.c , IfxCif.h

IfxCif_setEpInitialFillLevelInterruptOffset() : IfxCif.c , IfxCif.h

IfxCif_setEpInitialOffsetCounter() : IfxCif.c , IfxCif.h

IfxCif_setEpInitSize() : IfxCif.c , IfxCif.h

IfxCif_setEpInterruptEnableState() : IfxCif.c , IfxCif.h

IfxCif_setEpInterruptRequestBit() : IfxCif.c , IfxCif.h

IfxCif_setEpOffsetCounterStart() : IfxCif.c , IfxCif.h

IfxCif_setEpRecenterValue() : IfxCif.c , IfxCif.h

IfxCif_setEpWriteFormat() : IfxCif.c , IfxCif.h

IfxCif_setHuffmanAcTableLength() : IfxCif.c , IfxCif.h

IfxCif_setHuffmanAcTableSelector() : IfxCif.c , IfxCif.h

IfxCif_setHuffmanDcTableLength() : IfxCif.c , IfxCif.h

IfxCif_setHuffmanDcTableSelector() : IfxCif.c , IfxCif.h

IfxCif_setInputInterface() : IfxCif.h

IfxCif_setInternalClockMode() : IfxCif.c , IfxCif.h

IfxCif_setIspAcquisitionOffset() : IfxCif.c , IfxCif.h

IfxCif_setIspAcquisitionOffsets() : IfxCif.h

IfxCif_setIspAcquisitionSize() : IfxCif.c , IfxCif.h

IfxCif_setIspAcquisitionSizes() : IfxCif.h

IfxCif_setIspCcirSequence() : IfxCif.h

IfxCif_setIspColorSpaceMatrixCrominanceClippingRange() : IfxCif.h

IfxCif_setIspColorSpaceMatrixLuminanceClippingRange() : IfxCif.h

IfxCif_setIspFieldInvertState() : IfxCif.h

IfxCif_setIspFieldSelection() : IfxCif.h

IfxCif_setIspHSyncPolarity() : IfxCif.h

IfxCif_setIspInputFormatterState() : IfxCif.h

IfxCif_setIspInputInterface() : IfxCif.h

IfxCif_setIspInputSelectionAppendState() : IfxCif.c , IfxCif.h

IfxCif_setIspInterruptEnableState() : IfxCif.c , IfxCif.h

IfxCif_setIspInterruptRequestBit() : IfxCif.c , IfxCif.h

IfxCif_setIspisCameraDisplacement() : IfxCif.c , IfxCif.h

IfxCif_setIspisEnableState() : IfxCif.h

IfxCif_setIspisMaximumDisplacement() : IfxCif.c , IfxCif.h

IfxCif_setIspisOutputWindowOffset() : IfxCif.c , IfxCif.h

IfxCif_setIspisOutputWindowOffsets() : IfxCif.h

IfxCif_setIspisPictureSize() : IfxCif.c , IfxCif.h

IfxCif_setIspisPictureSizes() : IfxCif.h

IfxCif_setIspisRecenterValue() : IfxCif.h

IfxCif_setIspMode() : IfxCif.h

IfxCif_setIspOutputState() : IfxCif.h

IfxCif_setIspOutputWindowOffset() : IfxCif.c , IfxCif.h

IfxCif_setIspOutputWindowOffsets() : IfxCif.h

IfxCif_setIspPictureSize() : IfxCif.c , IfxCif.h

IfxCif_setIspPictureSizes() : IfxCif.h

IfxCif_setIspSamplingEdge() : IfxCif.h

IfxCif_setIspVSyncPolarity() : IfxCif.h

IfxCif_setJpegCodecImageSize() : IfxCif.c , IfxCif.h

IfxCif_setJpegCodecImageSizes() : IfxCif.h

IfxCif_setJpegJfifStreamEncoderContinuousMode() : IfxCif.h

IfxCif_setJpegPictureEncodingFormat() : IfxCif.h

IfxCif_setJpeHeaderGenerationMode() : IfxCif.h

IfxCif_setJpeHeaderMode() : IfxCif.h

IfxCif_setJpeInterruptEnableState() : IfxCif.c , IfxCif.h

IfxCif_setJpeInterruptRequestBit() : IfxCif.c , IfxCif.h

IfxCif_setJpeQTableSelector() : IfxCif.c , IfxCif.h

IfxCif_setJpeRestartInterval() : IfxCif.h

IfxCif_setJpeScalingEnableState() : IfxCif.c , IfxCif.h

IfxCif_setJpeTableDataLsb() : IfxCif.h

IfxCif_setJpeTableDataMsb() : IfxCif.h

IfxCif_setJpeTableId() : IfxCif.h

IfxCif_setKernelResetRequestState() : IfxCif.h

IfxCif_setLinearDownscalerEnableState() : IfxCif.c , IfxCif.h

IfxCif_setLinearDownscalerScalingFactor() : IfxCif.c , IfxCif.h

IfxCif_setLinearDownscalerScalingFactors() : IfxCif.c , IfxCif.h

IfxCif_setLinearDownscalerScalingMode() : IfxCif.c , IfxCif.h

IfxCif_setLinearDownscalerScalingModes() : IfxCif.c , IfxCif.h

IfxCif_setMiBaseAddressInitializationEnableState() : IfxCif.h

IfxCif_setMiByteSwapEnableState() : IfxCif.h

IfxCif_setMiChrominanceBurstLength() : IfxCif.h

IfxCif_setMiFeatureEnableState() : IfxCif.c , IfxCif.h

IfxCif_setMiInterruptEnableState() : IfxCif.c , IfxCif.h

IfxCif_setMiInterruptRequestBit() : IfxCif.c , IfxCif.h

IfxCif_setMiLuminanceBurstLength() : IfxCif.c , IfxCif.h

IfxCif_setMiMainPictureComponentBaseInitAddress() : IfxCif.c , IfxCif.h

IfxCif_setMiMainPictureComponentInitialOffsetCounter() : IfxCif.c , IfxCif.h

IfxCif_setMiMainPictureComponentInitSize() : IfxCif.c , IfxCif.h

IfxCif_setMiMainPictureWriteFormat() : IfxCif.h

IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset() : IfxCif.h

IfxCif_setMiOffsetCounterInitializationEnableState() : IfxCif.h

IfxCif_setModuleStateRequest() : IfxCif.c , IfxCif.h

IfxCif_setNumberOfAcquisitionFrames() : IfxCif.h

IfxCif_setSecurityWatchdogCounterPredivider() : IfxCif.h

IfxCif_setSecurityWatchdogEnableState() : IfxCif.h

IfxCif_setSecurityWatchdogInterruptEnableState() : IfxCif.c , IfxCif.h

IfxCif_setSecurityWatchdogInterruptRequestBit() : IfxCif.c , IfxCif.h

IfxCif_setSecurityWatchdogTimeout() : IfxCif.c , IfxCif.h

IfxCif_setSoftwareResetMode() : IfxCif.c , IfxCif.h

IfxCif_setYCSplitterChannelMode() : IfxCif.h

IfxCif_startJpegJfifStreamEncoder() : IfxCif.h

IfxCif_State : IfxCif.h

IfxCif_State_Disabled : IfxCif.h

IfxCif_State_Enabled : IfxCif.h

IfxCif_Submodules : IfxCif.h

IfxCif_Submodules_AllModules : IfxCif.h

IfxCif_Submodules_Debug : IfxCif.h

IfxCif_Submodules_ExtraPaths : IfxCif.h

IfxCif_Submodules_ImageSignalProcessing : IfxCif.h

IfxCif_Submodules_JpegEncoder : IfxCif.h

IfxCif_Submodules_LinearDownscaler : IfxCif.h

IfxCif_Submodules_MemoryInterface : IfxCif.h

IfxCif_Submodules_SecurityWatchdog : IfxCif.h

IfxCif_Submodules_YCSplitter : IfxCif.h

IfxCif_VSNC_P00_8_IN : IfxCif_PinMap.c , IfxCif_PinMap.h

IfxCif_YCSplitterChannelMode : IfxCif.h

IfxCif_YCSplitterChannelMode_Disabled : IfxCif.h

IfxCif_YCSplitterChannelMode_MainPathAndRawMode : IfxCif.h

IFXCOMPILER_COMMON_LINKER_SYMBOLS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

IFXCOMPILER_CORE_LINKER_SYMBOLS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h

IfxCpu_acquireMutex() : IfxCpu.c , IfxCpu.h

IFXCPU_ALLCORE_DONE : IfxCpu_cfg.h

IfxCpu_areInterruptsEnabled() : IfxCpu.h

IFXCPU_CACHABLE_FLASH_SEGMENT : IfxCpu_cfg.h

IFXCPU_CACHABLE_LMU_SEGMENT : IfxCpu_cfg.h

IfxCpu_calculateCrc32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

IFXCPU_CFG_ALLCORE_DONE : IfxCpu_cfg.h

IfxCpu_cfg_indexMap : IfxCpu_cfg.c , IfxCpu_cfg.h

IfxCpu_CoreMode : IfxCpu.h

IfxCpu_CoreMode_halt : IfxCpu.h

IfxCpu_CoreMode_idle : IfxCpu.h

IfxCpu_CoreMode_run : IfxCpu.h

IfxCpu_CoreMode_sleep : IfxCpu.h

IfxCpu_CoreMode_stby : IfxCpu.h

IfxCpu_CoreMode_unknown : IfxCpu.h

IfxCpu_CounterMode : IfxCpu.h

IfxCpu_CounterMode_normal : IfxCpu.h

IfxCpu_CounterMode_task : IfxCpu.h

IFXCPU_CSTART_CCU_INIT_HOOK : IfxCpu_CStart0.c

IfxCpu_DBGST_HALT : IfxCpu_cfg.h

IfxCpu_DBGST_HALT_halt : IfxCpu_cfg.h

IfxCpu_DBGST_HALT_run : IfxCpu_cfg.h

IfxCpu_disableInterrupts() : IfxCpu.h

IfxCpu_emitEvent() : IfxCpu.c , IfxCpu.h

IfxCpu_enableInterrupts() : IfxCpu.h

IfxCpu_enableSegmentSpecificDataAccessCacheability() : IfxCpu.h

IfxCpu_enableSegmentSpecificInstructionAccessCacheability() : IfxCpu.h

IfxCpu_forceDisableInterrupts() : IfxCpu.h

IfxCpu_getAddress() : IfxCpu.h

IfxCpu_getClockCounter() : IfxCpu.h

IfxCpu_getClockCounterStickyOverflow() : IfxCpu.h

IfxCpu_getCoreId() : IfxCpu.h

IfxCpu_getCoreIndex() : IfxCpu.h

IfxCpu_getCoreMode() : IfxCpu.c , IfxCpu.h

IfxCpu_getIndex() : IfxCpu.c , IfxCpu.h

IfxCpu_getInstructionCounter() : IfxCpu.h

IfxCpu_getInstructionCounterStickyOverflow() : IfxCpu.h

IfxCpu_getPerformanceCounter() : IfxCpu.h

IfxCpu_getPerformanceCounterStickyOverflow() : IfxCpu.h

IfxCpu_getRandomVal() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h

IfxCpu_getRandomValue() : IfxCpu.c , IfxCpu.h

IfxCpu_getRandomValueWithinRange() : IfxCpu.c , IfxCpu.h

IFXCPU_GLB_ADDR_DSPR : IfxCpu.h

IFXCPU_GLB_ADDR_PSPR : IfxCpu.h

IfxCpu_Id : IfxCpu_cfg.h

IfxCpu_Id_0 : IfxCpu_cfg.h

IfxCpu_Id_1 : IfxCpu_cfg.h

IfxCpu_Id_none : IfxCpu_cfg.h

IfxCpu_Index : IfxCpu_cfg.h

IfxCpu_Index_0 : IfxCpu_cfg.h

IfxCpu_Index_1 : IfxCpu_cfg.h

IfxCpu_Index_none : IfxCpu_cfg.h

IfxCpu_initCSA() : IfxCpu.h

IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h

IfxCpu_invalidateProgramCache() : IfxCpu.h

IfxCpu_Irq_getTos() : IfxCpu_Irq.h

IfxCpu_isAddressCachable() : IfxCpu.h

IfxCpu_mutexLock : IfxCpu.h

IFXCPU_NUM_MODULES : IfxCpu_cfg.h

IfxCpu_PMCSR_PMST : IfxCpu_cfg.h

IfxCpu_PMCSR_PMST_idleMode : IfxCpu_cfg.h

IfxCpu_PMCSR_PMST_idleModeRequest : IfxCpu_cfg.h

IfxCpu_PMCSR_PMST_normalMode : IfxCpu_cfg.h

IfxCpu_PMCSR_PMST_sleepModeRequest : IfxCpu_cfg.h

IfxCpu_PMCSR_PMST_standbyModeRequest : IfxCpu_cfg.h

IfxCpu_releaseMutex() : IfxCpu.c , IfxCpu.h

IfxCpu_resetAndStartCounters() : IfxCpu.h

IfxCpu_resetSpinLock() : IfxCpu.c , IfxCpu.h

IfxCpu_ResourceCpu : IfxCpu_cfg.h

IfxCpu_ResourceCpu_0 : IfxCpu_cfg.h

IfxCpu_ResourceCpu_1 : IfxCpu_cfg.h

IfxCpu_ResourceCpu_none : IfxCpu_cfg.h

IfxCpu_restoreInterrupts() : IfxCpu.h

IfxCpu_setCoreMode() : IfxCpu.c , IfxCpu.h

IfxCpu_setDataCache() : IfxCpu.h

IfxCpu_setPerformanceCountersEnableBit() : IfxCpu.h

IfxCpu_setProgramCache() : IfxCpu.h

IfxCpu_setProgramCounter() : IfxCpu.c , IfxCpu.h

IfxCpu_setSafetyTaskIdentifier() : IfxCpu.h

IfxCpu_setSpinLock() : IfxCpu.c , IfxCpu.h

IfxCpu_spinLock : IfxCpu.h

IfxCpu_startCore() : IfxCpu.c , IfxCpu.h

IfxCpu_stopCounters() : IfxCpu.h

IfxCpu_syncEvent : IfxCpu.h

IfxCpu_Trap_assertion() : IfxCpu_Trap.c

IfxCpu_Trap_Assertion_Id : IfxCpu_Trap.h

IfxCpu_Trap_Assertion_Id_arithmeticOverflow : IfxCpu_Trap.h

IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow : IfxCpu_Trap.h

IfxCpu_Trap_Bus_Id : IfxCpu_Trap.h

IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError : IfxCpu_Trap.h

IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError : IfxCpu_Trap.h

IfxCpu_Trap_Bus_Id_dataAccessSynchronousError : IfxCpu_Trap.h

IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError : IfxCpu_Trap.h

IfxCpu_Trap_Bus_Id_programFetchSynchronousError : IfxCpu_Trap.h

IfxCpu_Trap_Bus_Id_programMemoryIntegrityError : IfxCpu_Trap.h

IfxCpu_Trap_Bus_Id_temporalAsynchronousError : IfxCpu_Trap.h

IfxCpu_Trap_busError() : IfxCpu_Trap.c

IfxCpu_Trap_Class : IfxCpu_Trap.h

IfxCpu_Trap_Class_assertion : IfxCpu_Trap.h

IfxCpu_Trap_Class_bus : IfxCpu_Trap.h

IfxCpu_Trap_Class_contextManagement : IfxCpu_Trap.h

IfxCpu_Trap_Class_instructionErrors : IfxCpu_Trap.h

IfxCpu_Trap_Class_internalProtection : IfxCpu_Trap.h

IfxCpu_Trap_Class_memoryManagement : IfxCpu_Trap.h

IfxCpu_Trap_Class_nonMaskableInterrupt : IfxCpu_Trap.h

IfxCpu_Trap_Class_systemCall : IfxCpu_Trap.h

IfxCpu_Trap_ContextManagement_Id : IfxCpu_Trap.h

IfxCpu_Trap_ContextManagement_Id_callDepthOverflow : IfxCpu_Trap.h

IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow : IfxCpu_Trap.h

IfxCpu_Trap_ContextManagement_Id_callStackUnderflow : IfxCpu_Trap.h

IfxCpu_Trap_ContextManagement_Id_contextType : IfxCpu_Trap.h

IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion : IfxCpu_Trap.h

IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow : IfxCpu_Trap.h

IfxCpu_Trap_ContextManagement_Id_nestingError : IfxCpu_Trap.h

IfxCpu_Trap_contextManagementError() : IfxCpu_Trap.c

IfxCpu_Trap_extractTrapInfo() : IfxCpu_Trap.c

IfxCpu_Trap_instructionError() : IfxCpu_Trap.c

IfxCpu_Trap_InstructionErrors_Id : IfxCpu_Trap.h

IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment : IfxCpu_Trap.h

IfxCpu_Trap_InstructionErrors_Id_illegalOpcode : IfxCpu_Trap.h

IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress : IfxCpu_Trap.h

IfxCpu_Trap_InstructionErrors_Id_invalidOperand : IfxCpu_Trap.h

IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode : IfxCpu_Trap.h

IfxCpu_Trap_InternalProtection_Id : IfxCpu_Trap.h

IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection : IfxCpu_Trap.h

IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute : IfxCpu_Trap.h

IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress : IfxCpu_Trap.h

IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess : IfxCpu_Trap.h

IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead : IfxCpu_Trap.h

IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite : IfxCpu_Trap.h

IfxCpu_Trap_InternalProtection_Id_privilegeViolation : IfxCpu_Trap.h

IfxCpu_Trap_internalProtectionError() : IfxCpu_Trap.c

IfxCpu_Trap_MemoryManagement_Id : IfxCpu_Trap.h

IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill : IfxCpu_Trap.h

IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection : IfxCpu_Trap.h

IfxCpu_Trap_memoryManagementError() : IfxCpu_Trap.c

IfxCpu_Trap_nonMaskableInterrupt() : IfxCpu_Trap.c

IfxCpu_Trap_NonMaskableInterrupt_Id : IfxCpu_Trap.h

IfxCpu_Trap_systemCall_Cpu0() : IfxCpu_Trap.c

IfxCpu_Trap_SystemCall_Id : IfxCpu_Trap.h

IfxCpu_Trap_vectorTable0() : IfxCpu_Trap.c

IfxCpu_triggerSwReset() : IfxCpu.h

IfxCpu_updateClockCounter() : IfxCpu.h

IfxCpu_updateInstructionCounter() : IfxCpu.h

IfxCpu_updatePerformanceCounter() : IfxCpu.h

IfxCpu_waitEvent() : IfxCpu.c , IfxCpu.h

IFXCSTART0_PCX_O_S_DEFAULT : IfxCpu_CStart0.c

IFXCSTART0_PSW_DEFAULT : IfxCpu_CStart0.c

IFXCSTART1_PCX_O_S_DEFAULT : IfxCpu_CStart1.c

IFXCSTART1_PSW_DEFAULT : IfxCpu_CStart1.c

IfxDma_BusMasterMode : IfxDma.h

IfxDma_BusMasterMode_supervisor : IfxDma.h

IfxDma_BusMasterMode_user : IfxDma.h

IfxDma_ChannelBusPriority : IfxDma.h

IfxDma_ChannelBusPriority_high : IfxDma.h

IfxDma_ChannelBusPriority_low : IfxDma.h

IfxDma_ChannelBusPriority_medium : IfxDma.h

IfxDma_ChannelId : IfxDma_cfg.h

IfxDma_ChannelId_0 : IfxDma_cfg.h

IfxDma_ChannelId_1 : IfxDma_cfg.h

IfxDma_ChannelId_10 : IfxDma_cfg.h

IfxDma_ChannelId_11 : IfxDma_cfg.h

IfxDma_ChannelId_12 : IfxDma_cfg.h

IfxDma_ChannelId_13 : IfxDma_cfg.h

IfxDma_ChannelId_14 : IfxDma_cfg.h

IfxDma_ChannelId_15 : IfxDma_cfg.h

IfxDma_ChannelId_16 : IfxDma_cfg.h

IfxDma_ChannelId_17 : IfxDma_cfg.h

IfxDma_ChannelId_18 : IfxDma_cfg.h

IfxDma_ChannelId_19 : IfxDma_cfg.h

IfxDma_ChannelId_2 : IfxDma_cfg.h

IfxDma_ChannelId_20 : IfxDma_cfg.h

IfxDma_ChannelId_21 : IfxDma_cfg.h

IfxDma_ChannelId_22 : IfxDma_cfg.h

IfxDma_ChannelId_23 : IfxDma_cfg.h

IfxDma_ChannelId_24 : IfxDma_cfg.h

IfxDma_ChannelId_25 : IfxDma_cfg.h

IfxDma_ChannelId_26 : IfxDma_cfg.h

IfxDma_ChannelId_27 : IfxDma_cfg.h

IfxDma_ChannelId_28 : IfxDma_cfg.h

IfxDma_ChannelId_29 : IfxDma_cfg.h

IfxDma_ChannelId_3 : IfxDma_cfg.h

IfxDma_ChannelId_30 : IfxDma_cfg.h

IfxDma_ChannelId_31 : IfxDma_cfg.h

IfxDma_ChannelId_32 : IfxDma_cfg.h

IfxDma_ChannelId_33 : IfxDma_cfg.h

IfxDma_ChannelId_34 : IfxDma_cfg.h

IfxDma_ChannelId_35 : IfxDma_cfg.h

IfxDma_ChannelId_36 : IfxDma_cfg.h

IfxDma_ChannelId_37 : IfxDma_cfg.h

IfxDma_ChannelId_38 : IfxDma_cfg.h

IfxDma_ChannelId_39 : IfxDma_cfg.h

IfxDma_ChannelId_4 : IfxDma_cfg.h

IfxDma_ChannelId_40 : IfxDma_cfg.h

IfxDma_ChannelId_41 : IfxDma_cfg.h

IfxDma_ChannelId_42 : IfxDma_cfg.h

IfxDma_ChannelId_43 : IfxDma_cfg.h

IfxDma_ChannelId_44 : IfxDma_cfg.h

IfxDma_ChannelId_45 : IfxDma_cfg.h

IfxDma_ChannelId_46 : IfxDma_cfg.h

IfxDma_ChannelId_47 : IfxDma_cfg.h

IfxDma_ChannelId_5 : IfxDma_cfg.h

IfxDma_ChannelId_6 : IfxDma_cfg.h

IfxDma_ChannelId_7 : IfxDma_cfg.h

IfxDma_ChannelId_8 : IfxDma_cfg.h

IfxDma_ChannelId_9 : IfxDma_cfg.h

IfxDma_ChannelId_none : IfxDma_cfg.h

IfxDma_ChannelIncrementCircular : IfxDma.h

IfxDma_ChannelIncrementCircular_1024 : IfxDma.h

IfxDma_ChannelIncrementCircular_128 : IfxDma.h

IfxDma_ChannelIncrementCircular_16 : IfxDma.h

IfxDma_ChannelIncrementCircular_16384 : IfxDma.h

IfxDma_ChannelIncrementCircular_2 : IfxDma.h

IfxDma_ChannelIncrementCircular_2048 : IfxDma.h

IfxDma_ChannelIncrementCircular_256 : IfxDma.h

IfxDma_ChannelIncrementCircular_32 : IfxDma.h

IfxDma_ChannelIncrementCircular_32768 : IfxDma.h

IfxDma_ChannelIncrementCircular_4 : IfxDma.h

IfxDma_ChannelIncrementCircular_4096 : IfxDma.h

IfxDma_ChannelIncrementCircular_512 : IfxDma.h

IfxDma_ChannelIncrementCircular_64 : IfxDma.h

IfxDma_ChannelIncrementCircular_8 : IfxDma.h

IfxDma_ChannelIncrementCircular_8192 : IfxDma.h

IfxDma_ChannelIncrementCircular_none : IfxDma.h

IfxDma_ChannelIncrementDirection : IfxDma.h

IfxDma_ChannelIncrementDirection_negative : IfxDma.h

IfxDma_ChannelIncrementDirection_positive : IfxDma.h

IfxDma_ChannelIncrementStep : IfxDma.h

IfxDma_ChannelIncrementStep_1 : IfxDma.h

IfxDma_ChannelIncrementStep_128 : IfxDma.h

IfxDma_ChannelIncrementStep_16 : IfxDma.h

IfxDma_ChannelIncrementStep_2 : IfxDma.h

IfxDma_ChannelIncrementStep_32 : IfxDma.h

IfxDma_ChannelIncrementStep_4 : IfxDma.h

IfxDma_ChannelIncrementStep_64 : IfxDma.h

IfxDma_ChannelIncrementStep_8 : IfxDma.h

IfxDma_ChannelInterruptControl : IfxDma.h

IfxDma_ChannelInterruptControl_thresholdLimitMatch : IfxDma.h

IfxDma_ChannelInterruptControl_transferCountDecremented : IfxDma.h

IfxDma_ChannelMove : IfxDma.h

IfxDma_ChannelMove_1 : IfxDma.h

IfxDma_ChannelMove_16 : IfxDma.h

IfxDma_ChannelMove_2 : IfxDma.h

IfxDma_ChannelMove_3 : IfxDma.h

IfxDma_ChannelMove_4 : IfxDma.h

IfxDma_ChannelMove_5 : IfxDma.h

IfxDma_ChannelMove_8 : IfxDma.h

IfxDma_ChannelMove_9 : IfxDma.h

IfxDma_ChannelMoveSize : IfxDma.h

IfxDma_ChannelMoveSize_128bit : IfxDma.h

IfxDma_ChannelMoveSize_16bit : IfxDma.h

IfxDma_ChannelMoveSize_256bit : IfxDma.h

IfxDma_ChannelMoveSize_32bit : IfxDma.h

IfxDma_ChannelMoveSize_64bit : IfxDma.h

IfxDma_ChannelMoveSize_8bit : IfxDma.h

IfxDma_ChannelOperationMode : IfxDma.h

IfxDma_ChannelOperationMode_continuous : IfxDma.h

IfxDma_ChannelOperationMode_single : IfxDma.h

IfxDma_ChannelPattern : IfxDma.h

IfxDma_ChannelPattern_0_disable : IfxDma.h

IfxDma_ChannelPattern_0_mode1 : IfxDma.h

IfxDma_ChannelPattern_0_mode2 : IfxDma.h

IfxDma_ChannelPattern_0_mode3 : IfxDma.h

IfxDma_ChannelPattern_1_disable : IfxDma.h

IfxDma_ChannelPattern_1_mode1 : IfxDma.h

IfxDma_ChannelPattern_1_mode2 : IfxDma.h

IfxDma_ChannelPattern_1_mode3 : IfxDma.h

IfxDma_ChannelPriority : IfxDma.h

IfxDma_ChannelPriority_high : IfxDma.h

IfxDma_ChannelPriority_low : IfxDma.h

IfxDma_ChannelPriority_medium : IfxDma.h

IfxDma_ChannelRequestMode : IfxDma.h

IfxDma_ChannelRequestMode_completeTransactionPerRequest : IfxDma.h

IfxDma_ChannelRequestMode_oneTransferPerRequest : IfxDma.h

IfxDma_ChannelRequestSource : IfxDma.h

IfxDma_ChannelRequestSource_daisyChain : IfxDma.h

IfxDma_ChannelRequestSource_peripheral : IfxDma.h

IfxDma_ChannelShadow : IfxDma.h

IfxDma_ChannelShadow_accumulatedLinkedList : IfxDma.h

IfxDma_ChannelShadow_conditionalLinkedList : IfxDma.h

IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch : IfxDma.h

IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch : IfxDma.h

IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch : IfxDma.h

IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch : IfxDma.h

IfxDma_ChannelShadow_dst : IfxDma.h

IfxDma_ChannelShadow_dstDirectWrite : IfxDma.h

IfxDma_ChannelShadow_linkedList : IfxDma.h

IfxDma_ChannelShadow_none : IfxDma.h

IfxDma_ChannelShadow_safeLinkedList : IfxDma.h

IfxDma_ChannelShadow_src : IfxDma.h

IfxDma_ChannelShadow_srcDirectWrite : IfxDma.h

IfxDma_clearChannelHalt() : IfxDma.h

IfxDma_clearChannelInterrupt() : IfxDma.h

IfxDma_clearChannelTransactionRequestLost() : IfxDma.h

IfxDma_clearErrorFlags() : IfxDma.h

IfxDma_disableChannelInterrupt() : IfxDma.h

IfxDma_disableChannelTransaction() : IfxDma.h

IfxDma_disableChannelTransactionLostError() : IfxDma.h

IfxDma_disableMoveEngineDestinationError() : IfxDma.h

IfxDma_disableMoveEngineSourceError() : IfxDma.h

IfxDma_Dma_clearChannelInterrupt() : IfxDma_Dma.h

IfxDma_Dma_configureTransactionSet() : IfxDma_Dma.c

IfxDma_Dma_createModuleHandle() : IfxDma_Dma.c , IfxDma_Dma.h

IfxDma_Dma_deInitChannel() : IfxDma_Dma.c , IfxDma_Dma.h

IfxDma_Dma_getAndClearChannelInterrupt() : IfxDma_Dma.h

IfxDma_Dma_getChannelInterrupt() : IfxDma_Dma.h

IfxDma_Dma_getSrcPointer() : IfxDma_Dma.h

IfxDma_Dma_initChannel() : IfxDma_Dma.c , IfxDma_Dma.h

IfxDma_Dma_initChannelConfig() : IfxDma_Dma.c , IfxDma_Dma.h

IfxDma_Dma_initLinkedListEntry() : IfxDma_Dma.c , IfxDma_Dma.h

IfxDma_Dma_initModule() : IfxDma_Dma.c , IfxDma_Dma.h

IfxDma_Dma_initModuleConfig() : IfxDma_Dma.c , IfxDma_Dma.h

IfxDma_Dma_isChannelTransactionPending() : IfxDma_Dma.h

IfxDma_Dma_setChannelDestinationAddress() : IfxDma_Dma.h

IfxDma_Dma_setChannelSourceAddress() : IfxDma_Dma.h

IfxDma_Dma_setChannelTransferCount() : IfxDma_Dma.h

IfxDma_Dma_startChannelTransaction() : IfxDma_Dma.h

IfxDma_enableChannelInterrupt() : IfxDma.h

IfxDma_enableChannelTransaction() : IfxDma.h

IfxDma_enableChannelTransactionLostError() : IfxDma.h

IfxDma_enableDestinationCircularBuffer() : IfxDma.h

IfxDma_enableMoveEngineDestinationError() : IfxDma.h

IfxDma_enableMoveEngineSourceError() : IfxDma.h

IfxDma_enableSourceCircularBuffer() : IfxDma.h

IFXDMA_ERROR_D : IfxDma_cfg.h

IFXDMA_ERROR_DLL : IfxDma_cfg.h

IFXDMA_ERROR_RAM : IfxDma_cfg.h

IFXDMA_ERROR_S : IfxDma_cfg.h

IFXDMA_ERROR_SLL : IfxDma_cfg.h

IFXDMA_ERROR_SPB : IfxDma_cfg.h

IFXDMA_ERROR_SRI : IfxDma_cfg.h

IfxDma_getAndClearChannelInterrupt() : IfxDma.h

IfxDma_getAndClearChannelPatternDetectionInterrupt() : IfxDma.h

IfxDma_getAndClearChannelWrapDestinationBufferInterrupt() : IfxDma.h

IfxDma_getAndClearChannelWrapSourceBufferInterrupt() : IfxDma.h

IfxDma_getChannelDestinationAddress() : IfxDma.h

IfxDma_getChannelHalt() : IfxDma.h

IfxDma_getChannelInterrupt() : IfxDma.h

IfxDma_getChannelPatternDetectionOldValue() : IfxDma.h

IfxDma_getChannelSourceAddress() : IfxDma.h

IfxDma_getChannelSuspendModeStatus() : IfxDma.h

IfxDma_getChannelTransactionRequestLost() : IfxDma.h

IfxDma_getChannelTransferCount() : IfxDma.h

IfxDma_getCircularRangeCode() : IfxDma.h

IfxDma_getDataCRC() : IfxDma.h

IfxDma_getDoubleBufferRead() : IfxDma.h

IfxDma_getDoubleBufferSelection() : IfxDma.h

IfxDma_getErrorFlags() : IfxDma.h

IfxDma_getErrPointer() : IfxDma.h

IfxDma_getSourceAndDestinationCRC() : IfxDma.h

IfxDma_getSrcPointer() : IfxDma.h

IfxDma_getTimestamp() : IfxDma.h

IfxDma_HardwareResourcePartition : IfxDma.h

IfxDma_HardwareResourcePartition_0 : IfxDma.h

IfxDma_HardwareResourcePartition_1 : IfxDma.h

IfxDma_HardwareResourcePartition_2 : IfxDma.h

IfxDma_HardwareResourcePartition_3 : IfxDma.h

IfxDma_isChannelReset() : IfxDma.h

IfxDma_isChannelTransactionEnabled() : IfxDma.h

IfxDma_isChannelTransactionPending() : IfxDma.h

IfxDma_keepDoubleBufferActive() : IfxDma.h

IfxDma_MoveEngine : IfxDma.h

IfxDma_MoveEngine_0 : IfxDma.h

IfxDma_MoveEngine_1 : IfxDma.h

IFXDMA_NUM_CHANNELS : IfxDma_cfg.h

IFXDMA_NUM_MODULES : IfxDma_cfg.h

IfxDma_resetChannel() : IfxDma.h

IfxDma_setChannelBlockMode() : IfxDma.h

IfxDma_setChannelContinuousMode() : IfxDma.h

IfxDma_setChannelDestinationAddress() : IfxDma.h

IfxDma_setChannelDestinationIncrementStep() : IfxDma.h

IfxDma_setChannelHalt() : IfxDma.h

IfxDma_setChannelHardwareResourcePartition() : IfxDma.h

IfxDma_setChannelInterruptServiceRequest() : IfxDma.h

IfxDma_setChannelMoveSize() : IfxDma.h

IfxDma_setChannelShadow() : IfxDma.h

IfxDma_setChannelSingleMode() : IfxDma.h

IfxDma_setChannelSingleTransaction() : IfxDma.h

IfxDma_setChannelSingleTransfer() : IfxDma.h

IfxDma_setChannelSourceAddress() : IfxDma.h

IfxDma_setChannelSourceIncrementStep() : IfxDma.h

IfxDma_setChannelSuspendEnable() : IfxDma.h

IfxDma_setChannelTransferCount() : IfxDma.h

IfxDma_setCircularBufferDestinationLength() : IfxDma.h

IfxDma_setCircularBufferSourceLength() : IfxDma.h

IfxDma_setInterruptControlValue() : IfxDma.h

IfxDma_setSleepMode() : IfxDma.h

IfxDma_SleepMode : IfxDma.h

IfxDma_SleepMode_disable : IfxDma.h

IfxDma_SleepMode_enable : IfxDma.h

IfxDma_startChannelTransaction() : IfxDma.h

IfxDma_switchDoubleBuffer() : IfxDma.h

IfxDma_writeChannelShadowDisable() : IfxDma.h

IfxDma_writeChannelShadowEnable() : IfxDma.h

IfxDsadc_AuxCombFilterShift : IfxDsadc.h

IfxDsadc_AuxCombFilterShift_noShift : IfxDsadc.h

IfxDsadc_AuxCombFilterShift_shiftBy1 : IfxDsadc.h

IfxDsadc_AuxCombFilterShift_shiftBy2 : IfxDsadc.h

IfxDsadc_AuxCombFilterShift_shiftBy3 : IfxDsadc.h

IfxDsadc_AuxCombFilterType : IfxDsadc.h

IfxDsadc_AuxCombFilterType_comb1 : IfxDsadc.h

IfxDsadc_AuxCombFilterType_comb2 : IfxDsadc.h

IfxDsadc_AuxCombFilterType_comb3 : IfxDsadc.h

IfxDsadc_AuxCombFilterType_combF : IfxDsadc.h

IfxDsadc_AuxEvent : IfxDsadc.h

IfxDsadc_AuxEvent_everyNewResult : IfxDsadc.h

IfxDsadc_AuxEvent_insideBoundary : IfxDsadc.h

IfxDsadc_AuxEvent_outsideBoundary : IfxDsadc.h

IfxDsadc_AuxGate : IfxDsadc.h

IfxDsadc_AuxGate_coupledToIntegrator : IfxDsadc.h

IfxDsadc_AuxGate_definedByESEL : IfxDsadc.h

IfxDsadc_AuxServiceRequest : IfxDsadc.h

IfxDsadc_AuxServiceRequest_altSource : IfxDsadc.h

IfxDsadc_AuxServiceRequest_auxFilter : IfxDsadc.h

IfxDsadc_AuxServiceRequest_never : IfxDsadc.h

IfxDsadc_CarrierWaveformMode : IfxDsadc.h

IfxDsadc_CarrierWaveformMode_sine : IfxDsadc.h

IfxDsadc_CarrierWaveformMode_square : IfxDsadc.h

IfxDsadc_CarrierWaveformMode_stopped : IfxDsadc.h

IfxDsadc_CarrierWaveformMode_triangle : IfxDsadc.h

IfxDsadc_Cgpwm_Out_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_CGPWMN_P00_5_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_CGPWMN_P02_0_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_CGPWMN_P33_11_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_CGPWMP_P00_6_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_CGPWMP_P02_1_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_CGPWMP_P33_12_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_ChannelId : IfxDsadc.h

IfxDsadc_ChannelId_0 : IfxDsadc.h

IfxDsadc_ChannelId_2 : IfxDsadc.h

IfxDsadc_ChannelId_3 : IfxDsadc.h

IfxDsadc_CIN0A_P00_1_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_CIN0B_P33_5_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_CIN2A_P00_5_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_CIN2B_P33_1_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_CIN3A_P00_3_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_CIN3B_P02_7_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_Cin_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_CommonModeVoltage : IfxDsadc.h

IfxDsadc_CommonModeVoltage_a : IfxDsadc.h

IfxDsadc_CommonModeVoltage_b : IfxDsadc.h

IfxDsadc_CommonModeVoltage_c : IfxDsadc.h

IfxDsadc_COUT0_P00_11_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_COUT0_P00_1_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_COUT0_P33_5_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_COUT2_P00_5_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_COUT2_P33_1_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_COUT3_P00_3_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_COUT3_P02_7_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_Cout_Out_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DIN0A_P00_2_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DIN0B_P33_6_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DIN2A_P00_6_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DIN2B_P33_2_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DIN3A_P00_4_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DIN3B_P02_8_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_Din_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS0NA_AN3_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS0NB_AN1_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS0PA_AN2_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS0PB_AN0_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS2NA_AN21_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS2PA_AN20_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS3NA_AN37_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS3NA_P40_7_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS3NB_AN39_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS3NB_P40_9_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS3NC_AN45_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS3ND_AN47_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS3PA_AN36_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS3PA_P40_6_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS3PB_AN38_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS3PB_P40_8_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS3PC_AN44_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_DS3PD_AN46_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_Dsadc_calcDIVx() : IfxDsadc_Dsadc.c

IfxDsadc_Dsadc_getAuxResult() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h

IfxDsadc_Dsadc_getAuxSrc() : IfxDsadc_Dsadc.h

IfxDsadc_Dsadc_getMainResult() : IfxDsadc_Dsadc.h

IfxDsadc_Dsadc_getMainSrc() : IfxDsadc_Dsadc.h

IfxDsadc_Dsadc_initAuxFilter() : IfxDsadc_Dsadc.c

IfxDsadc_Dsadc_initCarrierGen() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h

IfxDsadc_Dsadc_initCarrierGenConfig() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h

IfxDsadc_Dsadc_initChannel() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h

IfxDsadc_Dsadc_initChannelConfig() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h

IfxDsadc_Dsadc_initCombFilter() : IfxDsadc_Dsadc.c

IfxDsadc_Dsadc_initDemodulator() : IfxDsadc_Dsadc.c

IfxDsadc_Dsadc_initFirFilter() : IfxDsadc_Dsadc.c

IfxDsadc_Dsadc_initIntegrator() : IfxDsadc_Dsadc.c

IfxDsadc_Dsadc_initModulator() : IfxDsadc_Dsadc.c

IfxDsadc_Dsadc_initModule() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h

IfxDsadc_Dsadc_initModuleConfig() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h

IfxDsadc_Dsadc_initRectifier() : IfxDsadc_Dsadc.c

IfxDsadc_Dsadc_startScan() : IfxDsadc_Dsadc.h

IfxDsadc_Dsadc_stopScan() : IfxDsadc_Dsadc.h

IfxDsadc_Dsn_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_Dsp_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_FirDataShift : IfxDsadc.h

IfxDsadc_FirDataShift_noShift : IfxDsadc.h

IfxDsadc_FirDataShift_shiftBy1 : IfxDsadc.h

IfxDsadc_FirDataShift_shiftBy2 : IfxDsadc.h

IfxDsadc_FirDataShift_shiftBy3 : IfxDsadc.h

IfxDsadc_FirInternalShift : IfxDsadc.h

IfxDsadc_FirInternalShift_noShift : IfxDsadc.h

IfxDsadc_FirInternalShift_shiftBy1 : IfxDsadc.h

IfxDsadc_getAuxResult() : IfxDsadc.h

IfxDsadc_getAuxSrc() : IfxDsadc.c , IfxDsadc.h

IfxDsadc_getIntegratorOutFreq() : IfxDsadc.c , IfxDsadc.h

IfxDsadc_getMainCombDecimation() : IfxDsadc.h

IfxDsadc_getMainCombOutFreq() : IfxDsadc.c , IfxDsadc.h

IfxDsadc_getMainGroupDelay() : IfxDsadc.c , IfxDsadc.h

IfxDsadc_getMainResult() : IfxDsadc.h

IfxDsadc_getMainSrc() : IfxDsadc.c , IfxDsadc.h

IfxDsadc_getModulatorClockFreq() : IfxDsadc.c , IfxDsadc.h

IfxDsadc_getModulatorInputClockFreq() : IfxDsadc.c , IfxDsadc.h

IfxDsadc_initCgPwmPin() : IfxDsadc.h

IfxDsadc_initCinPin() : IfxDsadc.h

IfxDsadc_initCoutPin() : IfxDsadc.h

IfxDsadc_initDinPin() : IfxDsadc.h

IfxDsadc_initDsnPin() : IfxDsadc.h

IfxDsadc_initDspPin() : IfxDsadc.h

IfxDsadc_initItrPin() : IfxDsadc.h

IfxDsadc_initSgPin() : IfxDsadc.h

IfxDsadc_InputConfig : IfxDsadc.h

IfxDsadc_InputConfig_commonModeVoltage : IfxDsadc.h

IfxDsadc_InputConfig_inputPin : IfxDsadc.h

IfxDsadc_InputConfig_referenceGround : IfxDsadc.h

IfxDsadc_InputConfig_supplyVoltage : IfxDsadc.h

IfxDsadc_InputDataSource : IfxDsadc.h

IfxDsadc_InputDataSource_directInputA : IfxDsadc.h

IfxDsadc_InputDataSource_directInputB : IfxDsadc.h

IfxDsadc_InputDataSource_invertedInputA : IfxDsadc.h

IfxDsadc_InputDataSource_invertedInputB : IfxDsadc.h

IfxDsadc_InputDataSource_onChipCombined : IfxDsadc.h

IfxDsadc_InputDataSource_onChipStandAlone : IfxDsadc.h

IfxDsadc_InputGain : IfxDsadc.h

IfxDsadc_InputGain_factor1 : IfxDsadc.h

IfxDsadc_InputGain_factor16 : IfxDsadc.h

IfxDsadc_InputGain_factor2 : IfxDsadc.h

IfxDsadc_InputGain_factor4 : IfxDsadc.h

IfxDsadc_InputGain_factor8 : IfxDsadc.h

IfxDsadc_InputPin : IfxDsadc.h

IfxDsadc_InputPin_a : IfxDsadc.h

IfxDsadc_InputPin_b : IfxDsadc.h

IfxDsadc_InputPin_c : IfxDsadc.h

IfxDsadc_InputPin_d : IfxDsadc.h

IfxDsadc_IntegrationWindowSize : IfxDsadc.h

IfxDsadc_IntegrationWindowSize_externalControl : IfxDsadc.h

IfxDsadc_IntegrationWindowSize_internalControl : IfxDsadc.h

IfxDsadc_IntegratorTrigger : IfxDsadc.h

IfxDsadc_IntegratorTrigger_alwaysActive : IfxDsadc.h

IfxDsadc_IntegratorTrigger_bypassed : IfxDsadc.h

IfxDsadc_IntegratorTrigger_fallingEdge : IfxDsadc.h

IfxDsadc_IntegratorTrigger_risingEdge : IfxDsadc.h

IfxDsadc_isModuleEnabled() : IfxDsadc.h

IfxDsadc_ITR0E_P33_0_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_ITR0F_P33_4_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_ITR2E_P33_2_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_ITR2F_P33_6_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_ITR3E_P02_8_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_ITR3F_P00_9_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_Itr_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_LowPowerSupply : IfxDsadc.h

IfxDsadc_LowPowerSupply_3_3V : IfxDsadc.h

IfxDsadc_LowPowerSupply_5V : IfxDsadc.h

IfxDsadc_MainCombFilterShift : IfxDsadc.h

IfxDsadc_MainCombFilterShift_noShift : IfxDsadc.h

IfxDsadc_MainCombFilterShift_shiftBy1 : IfxDsadc.h

IfxDsadc_MainCombFilterShift_shiftBy2 : IfxDsadc.h

IfxDsadc_MainCombFilterShift_shiftBy3 : IfxDsadc.h

IfxDsadc_MainCombFilterType : IfxDsadc.h

IfxDsadc_MainCombFilterType_comb1 : IfxDsadc.h

IfxDsadc_MainCombFilterType_comb2 : IfxDsadc.h

IfxDsadc_MainCombFilterType_comb3 : IfxDsadc.h

IfxDsadc_MainCombFilterType_combF : IfxDsadc.h

IfxDsadc_MainServiceRequest : IfxDsadc.h

IfxDsadc_MainServiceRequest_everyNewResult : IfxDsadc.h

IfxDsadc_MainServiceRequest_highGateSignal : IfxDsadc.h

IfxDsadc_MainServiceRequest_lowGateSignal : IfxDsadc.h

IfxDsadc_MainServiceRequest_never : IfxDsadc.h

IfxDsadc_ModulatorClock : IfxDsadc.h

IfxDsadc_ModulatorClock_fDSD : IfxDsadc.h

IfxDsadc_ModulatorClock_fERAY : IfxDsadc.h

IfxDsadc_ModulatorClock_fOSC0 : IfxDsadc.h

IfxDsadc_ModulatorClock_off : IfxDsadc.h

IfxDsadc_ModulatorClockDivider : IfxDsadc.h

IfxDsadc_ModulatorClockDivider_div10 : IfxDsadc.h

IfxDsadc_ModulatorClockDivider_div12 : IfxDsadc.h

IfxDsadc_ModulatorClockDivider_div14 : IfxDsadc.h

IfxDsadc_ModulatorClockDivider_div16 : IfxDsadc.h

IfxDsadc_ModulatorClockDivider_div18 : IfxDsadc.h

IfxDsadc_ModulatorClockDivider_div2 : IfxDsadc.h

IfxDsadc_ModulatorClockDivider_div20 : IfxDsadc.h

IfxDsadc_ModulatorClockDivider_div22 : IfxDsadc.h

IfxDsadc_ModulatorClockDivider_div24 : IfxDsadc.h

IfxDsadc_ModulatorClockDivider_div26 : IfxDsadc.h

IfxDsadc_ModulatorClockDivider_div28 : IfxDsadc.h

IfxDsadc_ModulatorClockDivider_div30 : IfxDsadc.h

IfxDsadc_ModulatorClockDivider_div32 : IfxDsadc.h

IfxDsadc_ModulatorClockDivider_div4 : IfxDsadc.h

IfxDsadc_ModulatorClockDivider_div6 : IfxDsadc.h

IfxDsadc_ModulatorClockDivider_div8 : IfxDsadc.h

IFXDSADC_NUM_CHANNELS : IfxDsadc_cfg.h

IFXDSADC_NUM_MODULES : IfxDsadc_cfg.h

IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS : IfxDsadc_PinMap.h

IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS : IfxDsadc_PinMap.h

IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS : IfxDsadc_PinMap.h

IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS : IfxDsadc_PinMap.h

IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS : IfxDsadc_PinMap.h

IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS : IfxDsadc_PinMap.h

IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS : IfxDsadc_PinMap.h

IFXDSADC_PINMAP_NUM_CHANNELS : IfxDsadc_PinMap.h

IFXDSADC_PINMAP_NUM_MODULES : IfxDsadc_PinMap.h

IFXDSADC_PINMAP_SG_IN_NUM_ITEMS : IfxDsadc_PinMap.h

IfxDsadc_Rdc_calculateGroupDelay() : IfxDsadc_Rdc.c

IfxDsadc_Rdc_calculateTimestampPeriod() : IfxDsadc_Rdc.c

IFXDSADC_RDC_CFG_DEBUG : IfxDsadc_Rdc.h

IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION : IfxDsadc_Rdc.h

IfxDsadc_Rdc_getAbsolutePosition() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_getDirection() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_getFault() : IfxDsadc_Rdc.h

IfxDsadc_Rdc_getOffset() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_getPeriodPerRotation() : IfxDsadc_Rdc.h

IfxDsadc_Rdc_getPosition() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_getRawPosition() : IfxDsadc_Rdc.h

IfxDsadc_Rdc_getRefreshPeriod() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_getResolution() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_getSensorType() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_getSpeed() : IfxDsadc_Rdc.h

IfxDsadc_Rdc_getTimestamp() : IfxDsadc_Rdc.h

IfxDsadc_Rdc_getTurn() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_getUpdatePeriod() : IfxDsadc_Rdc.c

IfxDsadc_Rdc_GtmTimCfg : IfxDsadc_Rdc.c

IfxDsadc_Rdc_init() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_initConfig() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_initGtmTim() : IfxDsadc_Rdc.c

IfxDsadc_Rdc_initHwChannels() : IfxDsadc_Rdc.c

IfxDsadc_Rdc_initHwTimestamp() : IfxDsadc_Rdc.c

IfxDsadc_Rdc_onEventA() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_reset() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_resetFaults() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_setOffset() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_setRefreshPeriod() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_startConversion() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_stdIfPosInit() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_update() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h

IfxDsadc_Rdc_updateTimestamp() : IfxDsadc_Rdc.c

IfxDsadc_RectifierSignSource : IfxDsadc.h

IfxDsadc_RectifierSignSource_externalA : IfxDsadc.h

IfxDsadc_RectifierSignSource_externalB : IfxDsadc.h

IfxDsadc_RectifierSignSource_nextChannel : IfxDsadc.h

IfxDsadc_RectifierSignSource_onChipGenerator : IfxDsadc.h

IfxDsadc_resetModule() : IfxDsadc.c , IfxDsadc.h

IfxDsadc_SampleClockSource : IfxDsadc.h

IfxDsadc_SampleClockSource_inputA : IfxDsadc.h

IfxDsadc_SampleClockSource_inputB : IfxDsadc.h

IfxDsadc_SampleClockSource_inputC : IfxDsadc.h

IfxDsadc_SampleClockSource_internal : IfxDsadc.h

IfxDsadc_SampleStrobe : IfxDsadc.h

IfxDsadc_SampleStrobe_noDataStrobe : IfxDsadc.h

IfxDsadc_SampleStrobe_reserved : IfxDsadc.h

IfxDsadc_SampleStrobe_sampleOnBothEdges : IfxDsadc.h

IfxDsadc_SampleStrobe_sampleOnFallingEdge : IfxDsadc.h

IfxDsadc_SampleStrobe_sampleOnRisingEdge : IfxDsadc.h

IfxDsadc_SampleStrobe_sampleOnTwoFallingEdges : IfxDsadc.h

IfxDsadc_SampleStrobe_sampleOnTwoRisingEdges : IfxDsadc.h

IfxDsadc_setCarrierMode() : IfxDsadc.h

IfxDsadc_setSleepMode() : IfxDsadc.h

IfxDsadc_Sg_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_SGNA_P00_4_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_SGNB_P33_13_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h

IfxDsadc_SleepMode : IfxDsadc.h

IfxDsadc_SleepMode_disable : IfxDsadc.h

IfxDsadc_SleepMode_enable : IfxDsadc.h

IfxDsadc_startScan() : IfxDsadc.h

IfxDsadc_stopScan() : IfxDsadc.h

IfxDsadc_TimestampTrigger : IfxDsadc.h

IfxDsadc_TimestampTrigger_eachEdge : IfxDsadc.h

IfxDsadc_TimestampTrigger_fallingEdge : IfxDsadc.h

IfxDsadc_TimestampTrigger_noTrigger : IfxDsadc.h

IfxDsadc_TimestampTrigger_risingEdge : IfxDsadc.h

IfxDsadc_TriggerInput : IfxDsadc.h

IfxDsadc_TriggerInput_a : IfxDsadc.h

IfxDsadc_TriggerInput_b : IfxDsadc.h

IfxDsadc_TriggerInput_c : IfxDsadc.h

IfxDsadc_TriggerInput_d : IfxDsadc.h

IfxDsadc_TriggerInput_e : IfxDsadc.h

IfxDsadc_TriggerInput_f : IfxDsadc.h

IfxDsadc_TriggerInput_g : IfxDsadc.h

IfxDsadc_TriggerInput_h : IfxDsadc.h

IfxDts_disableSensorControl() : IfxDts.h

IfxDts_Dts_convertFromCelsius() : IfxDts_Dts.c , IfxDts_Dts.h

IfxDts_Dts_convertToCelsius() : IfxDts_Dts.c , IfxDts_Dts.h

IfxDts_Dts_getTemperatureCelsius() : IfxDts_Dts.h

IfxDts_Dts_getTemperatureValue() : IfxDts_Dts.h

IfxDts_Dts_initModule() : IfxDts_Dts.c , IfxDts_Dts.h

IfxDts_Dts_initModuleConfig() : IfxDts_Dts.c , IfxDts_Dts.h

IfxDts_Dts_isBusy() : IfxDts_Dts.h

IfxDts_Dts_startSensor() : IfxDts_Dts.h

IfxDts_enableSensor() : IfxDts.h

IfxDts_getSrcPointer() : IfxDts.h

IfxDts_getTemperatureValue() : IfxDts.h

IfxDts_isBusy() : IfxDts.h

IfxDts_isReady() : IfxDts.c , IfxDts.h

IFXDTS_NUM_MODULES : IfxDts_cfg.h

IfxDts_startSensor() : IfxDts.h

IfxEmem_getLockedState() : IfxEmem.c , IfxEmem.h

IfxEmem_isModuleEnabled() : IfxEmem.h

IfxEmem_LockedState : IfxEmem.h

IfxEmem_LockedState_locked : IfxEmem.h

IfxEmem_LockedState_unlocked : IfxEmem.h

IFXEMEM_NUM_MODULES : IfxEmem_cfg.h

IfxEmem_setClockEnableState() : IfxEmem.c , IfxEmem.h

IfxEmem_setTileConfigMode() : IfxEmem.h

IfxEmem_setUnlockStandbyLockFlag() : IfxEmem.h

IFXEMEM_SIZE : IfxEmem_cfg.h

IFXEMEM_START_ADDR_BBB : IfxEmem_cfg.h

IFXEMEM_START_ADDR_CPU : IfxEmem_cfg.h

IFXEMEM_START_ADDR_CPU_CACHED : IfxEmem_cfg.h

IfxEmem_State : IfxEmem.h

IfxEmem_State_disabled : IfxEmem.h

IfxEmem_State_enabled : IfxEmem.h

IfxEmem_TileConfigMode : IfxEmem.h

IfxEmem_TileConfigMode_calibMode : IfxEmem.h

IfxEmem_TileNumber : IfxEmem.h

IfxEmem_TileNumber_0 : IfxEmem.h

IfxEmem_TileNumber_1 : IfxEmem.h

IfxEmem_TileNumber_10 : IfxEmem.h

IfxEmem_TileNumber_11 : IfxEmem.h

IfxEmem_TileNumber_12 : IfxEmem.h

IfxEmem_TileNumber_13 : IfxEmem.h

IfxEmem_TileNumber_14 : IfxEmem.h

IfxEmem_TileNumber_15 : IfxEmem.h

IfxEmem_TileNumber_2 : IfxEmem.h

IfxEmem_TileNumber_3 : IfxEmem.h

IfxEmem_TileNumber_4 : IfxEmem.h

IfxEmem_TileNumber_5 : IfxEmem.h

IfxEmem_TileNumber_6 : IfxEmem.h

IfxEmem_TileNumber_7 : IfxEmem.h

IfxEmem_TileNumber_8 : IfxEmem.h

IfxEmem_TileNumber_9 : IfxEmem.h

IfxEray0_RXDA0_P14_8_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_RXDA1_P11_9_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_RXDA2_P02_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_RXDA3_P14_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_RXDB0_P14_7_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_RXDB1_P11_10_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_RXDB2_P02_3_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_RXDB3_P14_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXDA_P02_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXDA_P11_3_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXDA_P14_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXDA_P14_10_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXDB_P02_2_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXDB_P11_12_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXDB_P14_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXDB_P14_5_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXENA_P02_4_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXENA_P11_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXENA_P14_9_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXENB_P02_5_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXENB_P11_11_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXENB_P11_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXENB_P14_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray0_TXENB_P14_9_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray_Baudrate : IfxEray.h

IfxEray_Baudrate_10 : IfxEray.h

IfxEray_Baudrate_2_5 : IfxEray.h

IfxEray_Baudrate_5 : IfxEray.h

IfxEray_BufferDirection : IfxEray.h

IfxEray_BufferDirection_receive : IfxEray.h

IfxEray_BufferDirection_transmit : IfxEray.h

IfxEray_calcHeaderCrc() : IfxEray.c , IfxEray.h

IfxEray_cfg_indexMap : IfxEray_cfg.c , IfxEray_cfg.h

IfxEray_changePocState() : IfxEray.c , IfxEray.h

IfxEray_Channel : IfxEray.h

IfxEray_Channel_a : IfxEray.h

IfxEray_Channel_b : IfxEray.h

IfxEray_clearAllFlags() : IfxEray.c , IfxEray.h

IfxEray_ClearErrorFlag : IfxEray.h

IfxEray_clearErrorFlag() : IfxEray.h

IfxEray_ClearErrorFlag_ccf : IfxEray.h

IfxEray_ClearErrorFlag_ccl : IfxEray.h

IfxEray_ClearErrorFlag_cna : IfxEray.h

IfxEray_ClearErrorFlag_eda : IfxEray.h

IfxEray_ClearErrorFlag_edb : IfxEray.h

IfxEray_ClearErrorFlag_eerr : IfxEray.h

IfxEray_ClearErrorFlag_efa : IfxEray.h

IfxEray_ClearErrorFlag_iiba : IfxEray.h

IfxEray_ClearErrorFlag_ioba : IfxEray.h

IfxEray_ClearErrorFlag_ltva : IfxEray.h

IfxEray_ClearErrorFlag_ltvb : IfxEray.h

IfxEray_ClearErrorFlag_mhf : IfxEray.h

IfxEray_ClearErrorFlag_pemc : IfxEray.h

IfxEray_ClearErrorFlag_rfo : IfxEray.h

IfxEray_ClearErrorFlag_sfbm : IfxEray.h

IfxEray_ClearErrorFlag_sfo : IfxEray.h

IfxEray_ClearErrorFlag_taba : IfxEray.h

IfxEray_ClearErrorFlag_tabb : IfxEray.h

IfxEray_ClearStatusFlag : IfxEray.h

IfxEray_clearStatusFlag() : IfxEray.h

IfxEray_ClearStatusFlag_cas : IfxEray.h

IfxEray_ClearStatusFlag_cycs : IfxEray.h

IfxEray_ClearStatusFlag_mbsi : IfxEray.h

IfxEray_ClearStatusFlag_mtsa : IfxEray.h

IfxEray_ClearStatusFlag_mtsb : IfxEray.h

IfxEray_ClearStatusFlag_nmvc : IfxEray.h

IfxEray_ClearStatusFlag_rfcl : IfxEray.h

IfxEray_ClearStatusFlag_rfne : IfxEray.h

IfxEray_ClearStatusFlag_rxi : IfxEray.h

IfxEray_ClearStatusFlag_sds : IfxEray.h

IfxEray_ClearStatusFlag_sucs : IfxEray.h

IfxEray_ClearStatusFlag_swe : IfxEray.h

IfxEray_ClearStatusFlag_ti0 : IfxEray.h

IfxEray_ClearStatusFlag_ti1 : IfxEray.h

IfxEray_ClearStatusFlag_tibc : IfxEray.h

IfxEray_ClearStatusFlag_tobc : IfxEray.h

IfxEray_ClearStatusFlag_txi : IfxEray.h

IfxEray_ClearStatusFlag_wst : IfxEray.h

IfxEray_ClearStatusFlag_wupa : IfxEray.h

IfxEray_ClearStatusFlag_wupb : IfxEray.h

IfxEray_ClockDivider : IfxEray.h

IfxEray_ClockDivider_1 : IfxEray.h

IfxEray_ClockDivider_2 : IfxEray.h

IfxEray_ClockDivider_3 : IfxEray.h

IfxEray_ClockDivider_4 : IfxEray.h

IfxEray_ClockDivider_5 : IfxEray.h

IfxEray_ClockDivider_6 : IfxEray.h

IfxEray_ClockDivider_7 : IfxEray.h

IfxEray_ClockDivider_none : IfxEray.h

IfxEray_disableModule() : IfxEray.h

IfxEray_enableInterruptLines() : IfxEray.c , IfxEray.h

IfxEray_enableModule() : IfxEray.h

IfxEray_Eray_allowColdStart() : IfxEray_Eray.h

IfxEray_Eray_bufferReconfig() : IfxEray_Eray.h

IfxEray_Eray_changePocState() : IfxEray_Eray.h

IfxEray_Eray_clearErrorFlag() : IfxEray_Eray.h

IfxEray_Eray_clearStatusFlag() : IfxEray_Eray.h

IfxEray_Eray_deInitModule() : IfxEray_Eray.h

IfxEray_Eray_getErrorInterrupts() : IfxEray_Eray.h

IfxEray_Eray_getMessageBufferInterruptStatus() : IfxEray_Eray.h

IfxEray_Eray_getNewDataInterruptStatus() : IfxEray_Eray.h

IfxEray_Eray_getPocState() : IfxEray_Eray.h

IfxEray_Eray_getStatusInterrupts() : IfxEray_Eray.h

IfxEray_Eray_getWakeupPatternReceivedChannel() : IfxEray_Eray.h

IfxEray_Eray_initModule() : IfxEray_Eray.c , IfxEray_Eray.h

IfxEray_Eray_initModuleConfig() : IfxEray_Eray.c , IfxEray_Eray.h

IfxEray_Eray_Node_init() : IfxEray_Eray.c , IfxEray_Eray.h

IfxEray_Eray_Node_initCommunicationController() : IfxEray_Eray.c

IfxEray_Eray_Node_initConfig() : IfxEray_Eray.c , IfxEray_Eray.h

IfxEray_Eray_Node_initGTU() : IfxEray_Eray.c

IfxEray_Eray_Node_initMessageRAM() : IfxEray_Eray.c

IfxEray_Eray_readData() : IfxEray_Eray.h

IfxEray_Eray_readFrame() : IfxEray_Eray.h

IfxEray_Eray_receiveFifoFrame() : IfxEray_Eray.c , IfxEray_Eray.h

IfxEray_Eray_receiveFrame() : IfxEray_Eray.c , IfxEray_Eray.h

IfxEray_Eray_setMessageBufferInterruptDestination() : IfxEray_Eray.h

IfxEray_Eray_setNewDataInterruptDestination() : IfxEray_Eray.h

IfxEray_Eray_setPocAllSlots() : IfxEray_Eray.h

IfxEray_Eray_startCommunication() : IfxEray_Eray.h

IfxEray_Eray_transmitFrame() : IfxEray_Eray.c , IfxEray_Eray.h

IfxEray_Eray_wakeUpChannel() : IfxEray_Eray.h

IfxEray_Eray_wakeUpCluster() : IfxEray_Eray.h

IfxEray_Eray_writeData() : IfxEray_Eray.h

IfxEray_ExternalOffset : IfxEray.h

IfxEray_ExternalOffset_correctionAdded : IfxEray.h

IfxEray_ExternalOffset_correctionSubtracted : IfxEray.h

IfxEray_ExternalOffset_noCorrection : IfxEray.h

IfxEray_ExternalOffsetCorrection : IfxEray.h

IfxEray_ExternalOffsetCorrection_0 : IfxEray.h

IfxEray_ExternalOffsetCorrection_1 : IfxEray.h

IfxEray_ExternalOffsetCorrection_2 : IfxEray.h

IfxEray_ExternalOffsetCorrection_3 : IfxEray.h

IfxEray_ExternalOffsetCorrection_4 : IfxEray.h

IfxEray_ExternalOffsetCorrection_5 : IfxEray.h

IfxEray_ExternalOffsetCorrection_6 : IfxEray.h

IfxEray_ExternalOffsetCorrection_7 : IfxEray.h

IfxEray_ExternalRate : IfxEray.h

IfxEray_ExternalRate_correctionAdded : IfxEray.h

IfxEray_ExternalRate_correctionSubtracted : IfxEray.h

IfxEray_ExternalRate_noCorrection : IfxEray.h

IfxEray_ExternalRateCorrection : IfxEray.h

IfxEray_ExternalRateCorrection_0 : IfxEray.h

IfxEray_ExternalRateCorrection_1 : IfxEray.h

IfxEray_ExternalRateCorrection_2 : IfxEray.h

IfxEray_ExternalRateCorrection_3 : IfxEray.h

IfxEray_ExternalRateCorrection_4 : IfxEray.h

IfxEray_ExternalRateCorrection_5 : IfxEray.h

IfxEray_ExternalRateCorrection_6 : IfxEray.h

IfxEray_ExternalRateCorrection_7 : IfxEray.h

IfxEray_getAddress() : IfxEray.c , IfxEray.h

IfxEray_getErrorInterrupts() : IfxEray.h

IfxEray_getFifoIndex() : IfxEray.h

IfxEray_getFifoStatus() : IfxEray.h

IfxEray_getIndex() : IfxEray.c , IfxEray.h

IfxEray_getInputBufferBusyHostStatus() : IfxEray.h

IfxEray_getInputBufferBusyShadowStatus() : IfxEray.h

IfxEray_getInputBufferBusySrcPtr() : IfxEray.h

IfxEray_getInterruptLine0SrcPtr() : IfxEray.h

IfxEray_getInterruptLine1SrcPtr() : IfxEray.h

IfxEray_getMessageBufferInterruptStatus() : IfxEray.h

IfxEray_getMessageBufferStatus0SrcPtr() : IfxEray.h

IfxEray_getMessageBufferStatus1SrcPtr() : IfxEray.h

IfxEray_getNewDataInterrupt0SrcPtr() : IfxEray.h

IfxEray_getNewDataInterrupt1SrcPtr() : IfxEray.h

IfxEray_getNewDataInterruptStatus() : IfxEray.h

IfxEray_getOutputBuffer() : IfxEray.h

IfxEray_getOutputBufferBusyShadowStatus() : IfxEray.h

IfxEray_getOutputBufferBusySrcPtr() : IfxEray.h

IfxEray_getPocState() : IfxEray.h

IfxEray_getStatusInterrupts() : IfxEray.h

IfxEray_getTimerInterrupt0SrcPtr() : IfxEray.h

IfxEray_getTimerInterrupt1SrcPtr() : IfxEray.h

IfxEray_getWakeupPatternReceivedChannel() : IfxEray.h

IfxEray_IdleDynamicSlots : IfxEray.h

IfxEray_IdleDynamicSlots_0 : IfxEray.h

IfxEray_IdleDynamicSlots_1 : IfxEray.h

IfxEray_IdleDynamicSlots_2 : IfxEray.h

IfxEray_Index : IfxEray_cfg.h

IfxEray_Index_0 : IfxEray_cfg.h

IfxEray_Index_none : IfxEray_cfg.h

IfxEray_initRxPin() : IfxEray.h

IfxEray_initRxPinWithPadLevel() : IfxEray.h

IfxEray_initTxEnPin() : IfxEray.h

IfxEray_initTxPin() : IfxEray.h

IfxEray_isModuleSuspended() : IfxEray.h

IfxEray_ListenTimeOutNoise : IfxEray.h

IfxEray_ListenTimeOutNoise_10 : IfxEray.h

IfxEray_ListenTimeOutNoise_11 : IfxEray.h

IfxEray_ListenTimeOutNoise_12 : IfxEray.h

IfxEray_ListenTimeOutNoise_13 : IfxEray.h

IfxEray_ListenTimeOutNoise_14 : IfxEray.h

IfxEray_ListenTimeOutNoise_15 : IfxEray.h

IfxEray_ListenTimeOutNoise_16 : IfxEray.h

IfxEray_ListenTimeOutNoise_2 : IfxEray.h

IfxEray_ListenTimeOutNoise_3 : IfxEray.h

IfxEray_ListenTimeOutNoise_4 : IfxEray.h

IfxEray_ListenTimeOutNoise_5 : IfxEray.h

IfxEray_ListenTimeOutNoise_6 : IfxEray.h

IfxEray_ListenTimeOutNoise_7 : IfxEray.h

IfxEray_ListenTimeOutNoise_8 : IfxEray.h

IfxEray_ListenTimeOutNoise_9 : IfxEray.h

IfxEray_MaxSynchFrames : IfxEray.h

IfxEray_MaxSynchFrames_10 : IfxEray.h

IfxEray_MaxSynchFrames_11 : IfxEray.h

IfxEray_MaxSynchFrames_12 : IfxEray.h

IfxEray_MaxSynchFrames_13 : IfxEray.h

IfxEray_MaxSynchFrames_14 : IfxEray.h

IfxEray_MaxSynchFrames_15 : IfxEray.h

IfxEray_MaxSynchFrames_2 : IfxEray.h

IfxEray_MaxSynchFrames_3 : IfxEray.h

IfxEray_MaxSynchFrames_4 : IfxEray.h

IfxEray_MaxSynchFrames_5 : IfxEray.h

IfxEray_MaxSynchFrames_6 : IfxEray.h

IfxEray_MaxSynchFrames_7 : IfxEray.h

IfxEray_MaxSynchFrames_8 : IfxEray.h

IfxEray_MaxSynchFrames_9 : IfxEray.h

IfxEray_NodeId : IfxEray_cfg.h

IfxEray_NodeId_a : IfxEray_cfg.h

IfxEray_NodeId_b : IfxEray_cfg.h

IfxEray_NodeId_none : IfxEray_cfg.h

IFXERAY_NUM_CHANNELS : IfxEray_cfg.h

IFXERAY_NUM_MODULES : IfxEray_cfg.h

IFXERAY_NUM_SLOTS : IfxEray_cfg.h

IFXERAY_PINMAP_NUM_MODULES : IfxEray_PinMap.h

IFXERAY_PINMAP_NUM_NODES : IfxEray_PinMap.h

IFXERAY_PINMAP_RXD_IN_NUM_ITEMS : IfxEray_PinMap.h

IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS : IfxEray_PinMap.h

IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS : IfxEray_PinMap.h

IfxEray_PocCommand : IfxEray.h

IfxEray_PocCommand_allSlots : IfxEray.h

IfxEray_PocCommand_clearRam : IfxEray.h

IfxEray_PocCommand_coldStart : IfxEray.h

IfxEray_PocCommand_config : IfxEray.h

IfxEray_PocCommand_freeze : IfxEray.h

IfxEray_PocCommand_halt : IfxEray.h

IfxEray_PocCommand_monitor : IfxEray.h

IfxEray_PocCommand_notAccepted : IfxEray.h

IfxEray_PocCommand_ready : IfxEray.h

IfxEray_PocCommand_reset : IfxEray.h

IfxEray_PocCommand_run : IfxEray.h

IfxEray_PocCommand_sendMts : IfxEray.h

IfxEray_PocCommand_wakeup : IfxEray.h

IfxEray_PocState : IfxEray.h

IfxEray_PocState_coldStartListen : IfxEray.h

IfxEray_PocState_collisionResolution : IfxEray.h

IfxEray_PocState_config : IfxEray.h

IfxEray_PocState_consistencyCheck : IfxEray.h

IfxEray_PocState_defaultConfig : IfxEray.h

IfxEray_PocState_gap : IfxEray.h

IfxEray_PocState_halt : IfxEray.h

IfxEray_PocState_initializeSchedule : IfxEray.h

IfxEray_PocState_integrationCheck : IfxEray.h

IfxEray_PocState_integrationConsistencyCheck : IfxEray.h

IfxEray_PocState_integrationListen : IfxEray.h

IfxEray_PocState_join : IfxEray.h

IfxEray_PocState_monitor : IfxEray.h

IfxEray_PocState_normalActive : IfxEray.h

IfxEray_PocState_normalPassive : IfxEray.h

IfxEray_PocState_ready : IfxEray.h

IfxEray_PocState_startup : IfxEray.h

IfxEray_PocState_startupSucced : IfxEray.h

IfxEray_PocState_staruAborted : IfxEray.h

IfxEray_PocState_wakeupDetect : IfxEray.h

IfxEray_PocState_wakeupListen : IfxEray.h

IfxEray_PocState_wakeupSend : IfxEray.h

IfxEray_PocState_wakeupStandby : IfxEray.h

IfxEray_readData() : IfxEray.c , IfxEray.h

IfxEray_readFrame() : IfxEray.c , IfxEray.h

IfxEray_ReceiveChannel : IfxEray.h

IfxEray_ReceiveChannel_a : IfxEray.h

IfxEray_ReceiveChannel_b : IfxEray.h

IfxEray_ReceiveChannel_both : IfxEray.h

IfxEray_ReceiveChannel_none : IfxEray.h

IfxEray_receiveData() : IfxEray.h

IfxEray_receiveHeader() : IfxEray.h

IfxEray_resetModule() : IfxEray.c , IfxEray.h

IfxEray_Rxd_In_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray_sendData() : IfxEray.h

IfxEray_sendHeader() : IfxEray.h

IfxEray_setActiveCyclePairs() : IfxEray.h

IfxEray_setAutoDelayBuffers() : IfxEray.h

IfxEray_setBaudrate() : IfxEray.h

IfxEray_setBufferReconfigSecure() : IfxEray.h

IfxEray_setChannelAInitialOffsets() : IfxEray.h

IfxEray_setChannelBInitialOffsets() : IfxEray.h

IfxEray_setChannelsReceiveDelay() : IfxEray.h

IfxEray_setClockCorrectionCycles() : IfxEray.h

IfxEray_setClockSynchErrorHalt() : IfxEray.h

IfxEray_setClusterDriftValues() : IfxEray.h

IfxEray_setClusterStartupDeviation() : IfxEray.h

IfxEray_setCollisionAvoidanceDuration() : IfxEray.h

IfxEray_setCycleDurationMacroticks() : IfxEray.h

IfxEray_setCycleDurationMicroticks() : IfxEray.h

IfxEray_setDecodingCorrectionValue() : IfxEray.h

IfxEray_setDynamicSlots() : IfxEray.h

IfxEray_setExternalCorrectionControl() : IfxEray.h

IfxEray_setExternalCorrectionValues() : IfxEray.h

IfxEray_setFifoBufferStartIndex() : IfxEray.h

IfxEray_setFifoFilterConfigurations() : IfxEray.h

IfxEray_setFifoMessageBufferConfigurations() : IfxEray.h

IfxEray_setFirstDynamicBuffer() : IfxEray.h

IfxEray_setListenTimeOuts() : IfxEray.h

IfxEray_setMaxColdStartAttempts() : IfxEray.h

IfxEray_setMaxCorrectionValues() : IfxEray.h

IfxEray_setMaxSynchFrames() : IfxEray.h

IfxEray_setMessageBufferCount() : IfxEray.h

IfxEray_setMessageBufferInterruptDestination() : IfxEray.c , IfxEray.h

IfxEray_setMessageHandlerConfigurations() : IfxEray.h

IfxEray_setNetworkStartIdleTime() : IfxEray.h

IfxEray_setNetworkVectorLength() : IfxEray.h

IfxEray_setNewDataInterruptDestination() : IfxEray.c , IfxEray.h

IfxEray_setNodeChannels() : IfxEray.h

IfxEray_setOffsetCorrection() : IfxEray.h

IfxEray_setPocReady() : IfxEray.c , IfxEray.h

IfxEray_setReceiveRequest() : IfxEray.h

IfxEray_setReceiveWakeupTimes() : IfxEray.h

IfxEray_setRxBufferNumber() : IfxEray.h

IfxEray_setSleepMode() : IfxEray.h

IfxEray_setSlot() : IfxEray.c , IfxEray.h

IfxEray_setSlotActionPoints() : IfxEray.h

IfxEray_setStaticSlots() : IfxEray.h

IfxEray_setStrobePosition() : IfxEray.h

IfxEray_setSuspendMode() : IfxEray.h

IfxEray_setSymbolChannels() : IfxEray.h

IfxEray_setTransmissionSlotMode() : IfxEray.h

IfxEray_setTransmissionStartTime() : IfxEray.h

IfxEray_setTransmitRequest() : IfxEray.h

IfxEray_setTransmittedFrames() : IfxEray.h

IfxEray_setTransmitWakeupTimes() : IfxEray.h

IfxEray_setTxBufferNumber() : IfxEray.h

IfxEray_setViewData() : IfxEray.h

IfxEray_setWakeupPatternChannel() : IfxEray.h

IfxEray_SleepMode : IfxEray.h

IfxEray_SleepMode_disable : IfxEray.h

IfxEray_SleepMode_enable : IfxEray.h

IfxEray_StrobePosition : IfxEray.h

IfxEray_StrobePosition_4 : IfxEray.h

IfxEray_StrobePosition_5 : IfxEray.h

IfxEray_StrobePosition_6 : IfxEray.h

IfxEray_SuspendMode : IfxEray.h

IfxEray_SuspendMode_hard : IfxEray.h

IfxEray_SuspendMode_none : IfxEray.h

IfxEray_SuspendMode_soft : IfxEray.h

IfxEray_TransmissionMode : IfxEray.h

IfxEray_TransmissionMode_continuous : IfxEray.h

IfxEray_TransmissionMode_singleShot : IfxEray.h

IfxEray_TransmissionSlotMode : IfxEray.h

IfxEray_TransmissionSlotMode_all : IfxEray.h

IfxEray_TransmissionSlotMode_single : IfxEray.h

IfxEray_Txd_Out_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray_Txen_Out_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h

IfxEray_waitForPocState() : IfxEray.h

IfxEray_WakeupChannel : IfxEray.h

IfxEray_WakeupChannel_a : IfxEray.h

IfxEray_WakeupChannel_b : IfxEray.h

IfxEray_writeData() : IfxEray.c , IfxEray.h

IfxEth_applySoftwareReset() : IfxEth.h

IfxEth_ChecksumMode : IfxEth.h

IfxEth_ChecksumMode_bypass : IfxEth.h

IfxEth_ChecksumMode_ipv4 : IfxEth.h

IfxEth_ChecksumMode_tcpUdpIcmpFull : IfxEth.h

IfxEth_ChecksumMode_tcpUdpIcmpSegment : IfxEth.h

IfxEth_clearEriInterrupt() : IfxEth.h

IfxEth_clearMacConfiguration() : IfxEth.h

IfxEth_clearRxInterrupt() : IfxEth.h

IfxEth_clearTuInterrupt() : IfxEth.h

IfxEth_clearTxInterrupt() : IfxEth.h

IfxEth_Crsdv_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_CRSDVA_P11_11_IN : IfxEth_PinMap.c , IfxEth_PinMap.h

IFXETH_DESCR_SIZE : IfxEth.h

IfxEth_DescriptorMode : IfxEth.h

IfxEth_DescriptorMode_chain : IfxEth.h

IfxEth_DescriptorMode_ring : IfxEth.h

IfxEth_disableModule() : IfxEth.c , IfxEth.h

IfxEth_disableTimeStampCoarseUpdate() : IfxEth.h

IfxEth_disableTimeStampForIpv4Frames() : IfxEth.h

IfxEth_enableMmcCounter() : IfxEth.h

IfxEth_enableModule() : IfxEth.c , IfxEth.h

IfxEth_enableTimeStamp() : IfxEth.h

IfxEth_enableTimeStampCoarseUpdate() : IfxEth.h

IfxEth_enableTimeStampForAllFrames() : IfxEth.h

IfxEth_enableTimeStampForEthFrames() : IfxEth.h

IfxEth_enableTimeStampForIpv4Frames() : IfxEth.h

IfxEth_enableTimeStampForVer2Format() : IfxEth.h

IfxEth_freeReceiveBuffer() : IfxEth.c , IfxEth.h

IfxEth_getActualRxDescriptor() : IfxEth.h

IfxEth_getActualRxIndex() : IfxEth.h

IfxEth_getActualTxDescriptor() : IfxEth.h

IfxEth_getBaseRxDescriptor() : IfxEth.h

IfxEth_getBaseTxDescriptor() : IfxEth.h

IfxEth_getLoopbackMode() : IfxEth.h

IfxEth_getMacAddressPointer() : IfxEth.h

IfxEth_getReceiveBuffer() : IfxEth.c , IfxEth.h

IfxEth_getReceiveProcessState() : IfxEth.h

IfxEth_getRxDataLength() : IfxEth.h

IfxEth_getSrcPointer() : IfxEth.h

IfxEth_getTimeStampInitialiseStatus() : IfxEth.h

IfxEth_getTimeStampUpdateStatus() : IfxEth.h

IfxEth_getTransmitBuffer() : IfxEth.c , IfxEth.h

IfxEth_getTransmitProcessState() : IfxEth.h

IfxEth_init() : IfxEth.c , IfxEth.h

IfxEth_initConfig() : IfxEth.c , IfxEth.h

IfxEth_initialiseTimeStamp() : IfxEth.h

IfxEth_initReceiveDescriptors() : IfxEth.c , IfxEth.h

IfxEth_initReceiveDescriptorsRingMode() : IfxEth.c , IfxEth.h

IfxEth_initTransmitDescriptors() : IfxEth.c , IfxEth.h

IfxEth_initTransmitDescriptorsRingMode() : IfxEth.c , IfxEth.h

IfxEth_isEriInterrupt() : IfxEth.h

IfxEth_isLinkActive() : IfxEth.h

IfxEth_isNisInterrupt() : IfxEth.h

IfxEth_isRxChecksumError() : IfxEth.h

IfxEth_isRxDataAvailable() : IfxEth.h

IfxEth_isRxInterrupt() : IfxEth.h

IfxEth_isSoftwareResetDone() : IfxEth.h

IfxEth_isTuInterrupt() : IfxEth.h

IfxEth_isTxInterrupt() : IfxEth.h

IFXETH_MAX_RX_BUFFERS : IfxEth.h

IFXETH_MAX_TIMEOUT_VALUE : IfxEth_cfg.h

IFXETH_MAX_TX_BUFFERS : IfxEth.h

IfxEth_Mdc_Out_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_MDC_P02_8_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_MDC_P21_0_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_MDC_P21_2_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_Mdio_InOut_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_MDIO_P21_1_INOUT : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_MDIOA_P00_0_INOUT : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_MDIOD_P21_3_INOUT : IfxEth_PinMap.c , IfxEth_PinMap.h

IFXETH_NUM_MODULES : IfxEth_cfg.h

IfxEth_Phy_Pef7071_init() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h

IfxEth_Phy_Pef7071_iPhyInitDone : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h

IfxEth_Phy_Pef7071_link() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h

IFXETH_PHY_PEF7071_MDIO_AN_ADV : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_AN_EXP : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_AN_LPA : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_AN_NPRX : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_AN_NPTX : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_CTRL : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_EECTRL : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_ERRCNT : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_FWV : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_GCTRL : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_GSTAT : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_IMASK : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_ISTAT : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_LED : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_MIICTRL : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_MIISTAT : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_MMDCTRL : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA_PI : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_MMDDATA : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_PHYCTL1 : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_PHYCTL2 : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_PHYID1 : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_PHYID2 : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_PHYPERF : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_PHYSTAT1 : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_PHYSTAT2 : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_RES11 : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_RES12 : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_RES1F : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_STAT : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_TPGCTRL : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_TPGDATA : IfxEth_Phy_Pef7071.c

IFXETH_PHY_PEF7071_MDIO_XSTAT : IfxEth_Phy_Pef7071.c

IfxEth_Phy_Pef7071_read_mdio_reg() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h

IfxEth_Phy_Pef7071_read_mmd_indirect() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h

IFXETH_PHY_PEF7071_WAIT_GMII_READY : IfxEth_Phy_Pef7071.c

IfxEth_Phy_Pef7071_write_mdio_reg() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h

IfxEth_Phy_Pef7071_write_mmd_indirect() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h

IfxEth_PhyInterfaceMode : IfxEth.h

IfxEth_PhyInterfaceMode_mii : IfxEth.h

IfxEth_PhyInterfaceMode_rmii : IfxEth.h

IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS : IfxEth_PinMap.h

IFXETH_PINMAP_MDC_OUT_NUM_ITEMS : IfxEth_PinMap.h

IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS : IfxEth_PinMap.h

IFXETH_PINMAP_NUM_MODULES : IfxEth_PinMap.h

IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS : IfxEth_PinMap.h

IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS : IfxEth_PinMap.h

IFXETH_PINMAP_RXD_IN_NUM_ITEMS : IfxEth_PinMap.h

IFXETH_PINMAP_RXER_IN_NUM_ITEMS : IfxEth_PinMap.h

IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS : IfxEth_PinMap.h

IFXETH_PINMAP_TXD_OUT_NUM_ITEMS : IfxEth_PinMap.h

IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS : IfxEth_PinMap.h

IfxEth_readAllFlags() : IfxEth.h

IfxEth_readMacAddress() : IfxEth.c , IfxEth.h

IfxEth_ReceiveProcessState : IfxEth.h

IfxEth_ReceiveProcessState_closing : IfxEth.h

IfxEth_ReceiveProcessState_fetching : IfxEth.h

IfxEth_ReceiveProcessState_none : IfxEth.h

IfxEth_ReceiveProcessState_reset : IfxEth.h

IfxEth_ReceiveProcessState_suspended : IfxEth.h

IfxEth_ReceiveProcessState_timestampWrite : IfxEth.h

IfxEth_ReceiveProcessState_transfering : IfxEth.h

IfxEth_ReceiveProcessState_waiting : IfxEth.h

IfxEth_Refclk_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_REFCLK_P11_12_IN : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_resetModule() : IfxEth.c , IfxEth.h

IfxEth_RingModeBufferUsed : IfxEth.h

IfxEth_RingModeBufferUsed_bothBuffers : IfxEth.h

IfxEth_RingModeBufferUsed_buffer1 : IfxEth.h

IfxEth_RingModeBufferUsed_buffer2 : IfxEth.h

IFXETH_RTX_BUFFER_SIZE : IfxEth.h

IfxEth_rxBuffer : IfxEth.c , IfxEth.h

IfxEth_Rxclk_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_RXCLKA_P11_12_IN : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_RXD0_P11_10_IN : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_RXD1_P11_9_IN : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_Rxd_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_rxDescr : IfxEth.c , IfxEth.h

IfxEth_RxDescr_getNext() : IfxEth.h

IfxEth_RxDescr_release() : IfxEth.h

IfxEth_RxDescr_setBuffer() : IfxEth.h

IfxEth_Rxer_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_RXERB_P21_7_IN : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_sendTransmitBuffer() : IfxEth.c , IfxEth.h

IfxEth_sendTransmitBuffersRingMode() : IfxEth.c , IfxEth.h

IfxEth_setAddToTimeUpdate() : IfxEth.h

IfxEth_setAndSendTransmitBuffer() : IfxEth.c , IfxEth.h

IfxEth_setBinaryRolloverControl() : IfxEth.h

IfxEth_setLoopbackMode() : IfxEth.h

IfxEth_setMacAddress() : IfxEth.c , IfxEth.h

IfxEth_setNanoSecondsUpdateValue() : IfxEth.h

IfxEth_setPhyInterfaceMode() : IfxEth.h

IfxEth_setReceiveBuffer1RingMode() : IfxEth.h

IfxEth_setReceiveBuffer2RingMode() : IfxEth.h

IfxEth_setReceiveDescriptorAddress() : IfxEth.h

IfxEth_setSecondsUpdateValue() : IfxEth.h

IfxEth_setSubSecondIncrementValue() : IfxEth.h

IfxEth_setSubtractToTimeUpdate() : IfxEth.h

IfxEth_setTransmitBuffer1RingMode() : IfxEth.h

IfxEth_setTransmitBuffer2RingMode() : IfxEth.h

IfxEth_setTransmitDescriptorAddress() : IfxEth.h

IfxEth_setupChecksumEngine() : IfxEth.c , IfxEth.h

IfxEth_setupMiiInputPins() : IfxEth.c , IfxEth.h

IfxEth_setupMiiOutputPins() : IfxEth.c , IfxEth.h

IfxEth_setupRmiiInputPins() : IfxEth.c , IfxEth.h

IfxEth_setupRmiiOutputPins() : IfxEth.c , IfxEth.h

IfxEth_shuffleRxDescriptor() : IfxEth.c , IfxEth.h

IfxEth_shuffleTxDescriptor() : IfxEth.c , IfxEth.h

IfxEth_startReceiver() : IfxEth.c , IfxEth.h

IfxEth_startTransmitter() : IfxEth.c , IfxEth.h

IfxEth_stopReceiver() : IfxEth.c , IfxEth.h

IfxEth_stopTransmitter() : IfxEth.c , IfxEth.h

IfxEth_TransmitProcessState : IfxEth.h

IfxEth_TransmitProcessState_closing : IfxEth.h

IfxEth_TransmitProcessState_fetching : IfxEth.h

IfxEth_TransmitProcessState_none : IfxEth.h

IfxEth_TransmitProcessState_reading : IfxEth.h

IfxEth_TransmitProcessState_reset : IfxEth.h

IfxEth_TransmitProcessState_suspended : IfxEth.h

IfxEth_TransmitProcessState_timestampWrite : IfxEth.h

IfxEth_TransmitProcessState_waiting : IfxEth.h

IfxEth_txBuffer : IfxEth.c , IfxEth.h

IfxEth_Txclk_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_TXCLKB_P11_12_IN : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_TXD0_P11_3_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_TXD1_P11_2_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_Txd_Out_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_txDescr : IfxEth.c , IfxEth.h

IfxEth_TxDescr_getNext() : IfxEth.h

IfxEth_TxDescr_isAvailable() : IfxEth.h

IfxEth_TxDescr_release() : IfxEth.h

IfxEth_TxDescr_setBuffer() : IfxEth.h

IfxEth_TxDescr_setup() : IfxEth.h

IfxEth_Txen_Out_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_TXEN_P11_6_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h

IfxEth_updateTimeStamp() : IfxEth.h

IfxEth_waitTransmitBuffer() : IfxEth.h

IfxEth_wakeupReceiver() : IfxEth.c , IfxEth.h

IfxEth_wakeupTransmitter() : IfxEth.c , IfxEth.h

IfxEth_writeHeader() : IfxEth.c , IfxEth.h

IfxFce_clearCrc16ErrorFlags() : IfxFce.h

IfxFce_clearCrc32ErrorFlags() : IfxFce.h

IfxFce_clearCrc8ErrorFlags() : IfxFce.h

IfxFce_Crc32Kernel : IfxFce.h

IfxFce_Crc32Kernel_0 : IfxFce.h

IfxFce_Crc32Kernel_1 : IfxFce.h

IfxFce_Crc_calculateCrc16() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_Crc_calculateCrc32() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_Crc_calculateCrc8() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_Crc_clearErrorFlags() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_Crc_deInitModule() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_Crc_getInterruptStatus() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_Crc_initCrc() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_Crc_initCrcConfig() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_Crc_initModule() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_Crc_initModuleConfig() : IfxFce_Crc.c , IfxFce_Crc.h

IfxFce_CrcMode : IfxFce.h

IfxFce_CrcMode_16 : IfxFce.h

IfxFce_CrcMode_32 : IfxFce.h

IfxFce_CrcMode_8 : IfxFce.h

IfxFce_disableModule() : IfxFce.h

IfxFce_enableModule() : IfxFce.h

IfxFce_getCrc16InterruptStatus() : IfxFce.c , IfxFce.h

IfxFce_getCrc32InterruptStatus() : IfxFce.c , IfxFce.h

IfxFce_getCrc8InterruptStatus() : IfxFce.c , IfxFce.h

IfxFce_getSrcPointer() : IfxFce.h

IFXFCE_NUM_KERNEL : IfxFce_cfg.h

IFXFCE_NUM_MODULES : IfxFce_cfg.h

IfxFce_reflectCrc32() : IfxFce.c , IfxFce.h

IfxFce_resetModule() : IfxFce.c , IfxFce.h

IFXFFT_DATA_SPACE : IfxFft_cfg.h

IfxFft_disableModule() : IfxFft.h

IfxFft_enableModule() : IfxFft.h

IfxFft_Fft_calcCounters() : IfxFft_Fft.c

IfxFft_Fft_calcCSR() : IfxFft_Fft.c

IfxFft_Fft_cloneAndLinkJobs() : IfxFft_Fft.c , IfxFft_Fft.h

IFXFFT_FFT_DATA_TRANSFER : IfxFft_Fft.c

IFXFFT_FFT_DMA_CHANNEL_BASE : IfxFft_cfg.h

IFXFFT_FFT_DMA_SUPPORT : IfxFft_cfg.h

IFXFFT_FFT_DMADISCARDCHANNELID : IfxFft_Fft.c

IFXFFT_FFT_DMADISCARDCHANNELID_OPT : IfxFft_Fft.c

IFXFFT_FFT_DMAINPUTCHANNELID : IfxFft_Fft.c

IFXFFT_FFT_DMAINPUTCHANNELID_OPT : IfxFft_Fft.c

IFXFFT_FFT_DMAOUTPUTCHANNELID : IfxFft_Fft.c

IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT : IfxFft_Fft.c

IfxFft_Fft_dummy256 : IfxFft_Fft.c

IFXFFT_FFT_FLAG_DONE : IfxFft_Fft.h

IFXFFT_FFT_FLAG_INPUT : IfxFft_Fft.h

IFXFFT_FFT_HW_EXEC : IfxFft_Fft.h

IfxFft_Fft_initDma() : IfxFft_Fft.c , IfxFft_Fft.h

IfxFft_Fft_initJob() : IfxFft_Fft.c , IfxFft_Fft.h

IfxFft_Fft_initJobConfig() : IfxFft_Fft.c , IfxFft_Fft.h

IfxFft_Fft_initModule() : IfxFft_Fft.c , IfxFft_Fft.h

IfxFft_Fft_initModuleConfig() : IfxFft_Fft.c , IfxFft_Fft.h

IfxFft_Fft_initWindow() : IfxFft_Fft.c , IfxFft_Fft.h

IFXFFT_FFT_ISALIGNED : IfxFft_Fft.c

IfxFft_Fft_isrInput() : IfxFft_Fft.c , IfxFft_Fft.h

IfxFft_Fft_isrIntra() : IfxFft_Fft.c , IfxFft_Fft.h

IfxFft_Fft_isrOutput() : IfxFft_Fft.c , IfxFft_Fft.h

IfxFft_Fft_Job : IfxFft_Fft.h

IfxFft_Fft_loadInput() : IfxFft_Fft.c

IfxFft_Fft_modifyDataPointers() : IfxFft_Fft.c , IfxFft_Fft.h

IFXFFT_FFT_MOVE_BTR4 : IfxFft_Fft.c

IFXFFT_FFT_MOVE_DIV : IfxFft_Fft.c

IFXFFT_FFT_MOVE_SIZE : IfxFft_Fft.c

IFXFFT_FFT_NUM_JOBS : IfxFft_cfg.h

IFXFFT_FFT_OPTIMIZED : IfxFft_cfg.h

IFXFFT_FFT_PIPELINED : IfxFft_cfg.h

IfxFft_Fft_startJob() : IfxFft_Fft.c , IfxFft_Fft.h

IfxFft_Fft_triggerEngine() : IfxFft_Fft.h

IfxFft_Fft_unloadOutput() : IfxFft_Fft.c

IFXFFT_FFT_WINDOW_TRANSFER : IfxFft_Fft.c

IfxFft_getInputFormat() : IfxFft.h

IfxFft_getLength() : IfxFft.h

IfxFft_getLengthCode() : IfxFft.h

IfxFft_getLengthFromCode() : IfxFft.h

IfxFft_getOutputFormat() : IfxFft.h

IfxFft_getSrcPointerDone() : IfxFft.h

IfxFft_getSrcPointerRfs() : IfxFft.h

IfxFft_getTransformLength() : IfxFft.h

IfxFft_Input : IfxFft.h

IfxFft_Input_complexSInt16 : IfxFft.h

IfxFft_Input_complexSInt32 : IfxFft.h

IfxFft_Input_realSInt16 : IfxFft.h

IfxFft_Input_realSInt32 : IfxFft.h

IfxFft_isEngineBusy() : IfxFft.h

IfxFft_isModuleEnabled() : IfxFft.h

IfxFft_isModuleSuspended() : IfxFft.h

IfxFft_isReadyForStart() : IfxFft.h

IfxFft_Length : IfxFft.h

IfxFft_Length_1024 : IfxFft.h

IfxFft_Length_128 : IfxFft.h

IfxFft_Length_16 : IfxFft.h

IfxFft_Length_256 : IfxFft.h

IfxFft_Length_32 : IfxFft.h

IfxFft_Length_512 : IfxFft.h

IfxFft_Length_64 : IfxFft.h

IfxFft_Length_8 : IfxFft.h

IFXFFT_MAX_LENGTH : IfxFft_cfg.h

IFXFFT_MAX_WINDOW_LENGTH : IfxFft_cfg.h

IFXFFT_NUM_MODULES : IfxFft_cfg.h

IfxFft_Operation : IfxFft.h

IfxFft_Operation_fft : IfxFft.h

IfxFft_Operation_ifft : IfxFft.h

IfxFft_Output : IfxFft.h

IfxFft_Output_complexSInt16 : IfxFft.h

IfxFft_Output_complexSInt32 : IfxFft.h

IfxFft_setSuspendMode() : IfxFft.h

IfxFft_SuspendMode : IfxFft.h

IfxFft_SuspendMode_hard : IfxFft.h

IfxFft_SuspendMode_none : IfxFft.h

IfxFft_SuspendMode_soft : IfxFft.h

IFXFFT_WINDOW_SPACE : IfxFft_cfg.h

IfxFlash_clearCorrectableErrorTracking() : IfxFlash.c , IfxFlash.h

IfxFlash_clearStatus() : IfxFlash.h

IfxFlash_clearUncorrectableErrorTracking() : IfxFlash.c , IfxFlash.h

IFXFLASH_CMD_BASE_ADDRESS : IfxFlash_cfg.h

IFXFLASH_CMD_BASE_OFFSET : IfxFlash_cfg.h

IFXFLASH_DFLASH_BANKS : IfxFlash_cfg.h

IFXFLASH_DFLASH_BURST_LENGTH : IfxFlash_cfg.h

IFXFLASH_DFLASH_END : IfxFlash_cfg.h

IFXFLASH_DFLASH_NUM_LOG_SECTORS : IfxFlash_cfg.h

IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS : IfxFlash_cfg.h

IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS : IfxFlash_cfg.h

IFXFLASH_DFLASH_PAGE_LENGTH : IfxFlash_cfg.h

IFXFLASH_DFLASH_SIZE : IfxFlash_cfg.h

IFXFLASH_DFLASH_START : IfxFlash_cfg.h

IfxFlash_dFlashTableEepLog : IfxFlash_cfg.c , IfxFlash_cfg.h

IfxFlash_dFlashTablePhys : IfxFlash_cfg.c , IfxFlash_cfg.h

IfxFlash_dFlashTableUcbLog : IfxFlash_cfg.c , IfxFlash_cfg.h

IfxFlash_disableCorrectableErrorTracking() : IfxFlash.c , IfxFlash.h

IfxFlash_disableUncorrectableErrorTracking() : IfxFlash.c , IfxFlash.h

IfxFlash_disableWriteProtection() : IfxFlash.c , IfxFlash.h

IfxFlash_enterPageMode() : IfxFlash.h

IfxFlash_eraseMultiplePhysicalSectors() : IfxFlash.h

IfxFlash_eraseMultipleSectors() : IfxFlash.h

IfxFlash_erasePhysicalSector() : IfxFlash.h

IfxFlash_eraseSector() : IfxFlash.h

IfxFlash_eraseVerifyMultipleSectors() : IfxFlash.h

IfxFlash_eraseVerifySector() : IfxFlash.h

IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS : IfxFlash_cfg.h

IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS : IfxFlash_cfg.h

IfxFlash_ErrorTracking : IfxFlash.h

IfxFlash_ErrorTracking_correctedDoubleBitError : IfxFlash.h

IfxFlash_ErrorTracking_correctedSingleBitError : IfxFlash.h

IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError : IfxFlash.h

IfxFlash_ErrorTracking_none : IfxFlash.h

IfxFlash_ErrorTracking_uncorrectableMultiBitError : IfxFlash.h

IfxFlash_FlashType : IfxFlash_cfg.h

IfxFlash_FlashType_D0 : IfxFlash_cfg.h

IfxFlash_FlashType_D1 : IfxFlash_cfg.h

IfxFlash_FlashType_Fa : IfxFlash_cfg.h

IfxFlash_FlashType_P0 : IfxFlash_cfg.h

IfxFlash_FlashType_P1 : IfxFlash_cfg.h

IfxFlash_FlashType_P2 : IfxFlash_cfg.h

IfxFlash_FlashType_P3 : IfxFlash_cfg.h

IfxFlash_getTrackedCorrectableErrors() : IfxFlash.c , IfxFlash.h

IfxFlash_getTrackedUncorrectableErrors() : IfxFlash.c , IfxFlash.h

IfxFlash_loadPage() : IfxFlash.h

IfxFlash_loadPage2X32() : IfxFlash.h

IFXFLASH_NUM_FLASH_MODULES : IfxFlash_cfg.h

IFXFLASH_NUM_MODULES : IfxFlash_cfg.h

IFXFLASH_PFLASH_BANKS : IfxFlash_cfg.h

IFXFLASH_PFLASH_BURST_LENGTH : IfxFlash_cfg.h

IFXFLASH_PFLASH_END : IfxFlash_cfg.h

IFXFLASH_PFLASH_NUM_LOG_SECTORS : IfxFlash_cfg.h

IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS : IfxFlash_cfg.h

IFXFLASH_PFLASH_OFFSET : IfxFlash_cfg.h

IFXFLASH_PFLASH_PAGE_LENGTH : IfxFlash_cfg.h

IFXFLASH_PFLASH_SIZE : IfxFlash_cfg.h

IFXFLASH_PFLASH_START : IfxFlash_cfg.h

IfxFlash_pFlashTableLog : IfxFlash_cfg.c , IfxFlash_cfg.h

IfxFlash_pFlashTablePhys : IfxFlash_cfg.c , IfxFlash_cfg.h

IfxFlash_PortId : IfxFlash.h

IfxFlash_PortId_PortId_0 : IfxFlash.h

IfxFlash_PortId_PortId_1 : IfxFlash.h

IfxFlash_resetToRead() : IfxFlash.h

IfxFlash_resumeProtection() : IfxFlash.h

IfxFlash_selectCorrectableErrorTracking() : IfxFlash.c , IfxFlash.h

IfxFlash_selectUncorrectableErrorTracking() : IfxFlash.c , IfxFlash.h

IfxFlash_suspendResumeMultipleSectors() : IfxFlash.h

IfxFlash_suspendResumeSector() : IfxFlash.h

IfxFlash_UcbType : IfxFlash_cfg.h

IfxFlash_UcbType_ucb0 : IfxFlash_cfg.h

IfxFlash_UcbType_ucb1 : IfxFlash_cfg.h

IfxFlash_UcbType_ucbHsmc : IfxFlash_cfg.h

IfxFlash_waitUnbusy() : IfxFlash.h

IfxFlash_waitUnbusyAll() : IfxFlash.h

IfxFlash_writeBurst() : IfxFlash.h

IfxFlash_writePage() : IfxFlash.h

IfxFlash_writePageOnce() : IfxFlash.h

IFXGLOBAL_DERIVATIVE_NAME : IfxGlobal_cfg.h

IFXGLOBAL_DERIVATIVE_TC26xB : IfxGlobal_cfg.h

IfxGpt120_CAPINA_P13_2_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T2EUDA_P00_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T2EUDB_P33_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T2INA_P00_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T2INB_P33_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T3EUDA_P02_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T3EUDB_P10_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T3INA_P02_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T3INB_P10_4_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T3OUT_P10_6_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T3OUT_P21_6_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T4EUDA_P00_9_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T4EUDB_P33_5_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T4INA_P02_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T4INB_P10_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T5EUDA_P21_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T5EUDB_P10_1_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T5INA_P21_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T5INB_P10_3_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T6EUDA_P20_0_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T6EUDB_P10_0_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T6INA_P20_3_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T6INB_P10_2_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T6OUT_P10_5_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt120_T6OUT_P21_7_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt12_Capin_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt12_CaptureInput : IfxGpt12.h

IfxGpt12_CaptureInput_A : IfxGpt12.h

IfxGpt12_CaptureInput_B : IfxGpt12.h

IfxGpt12_CaptureInput_C : IfxGpt12.h

IfxGpt12_CaptureInput_D : IfxGpt12.h

IfxGpt12_CaptureInputMode : IfxGpt12.h

IfxGpt12_CaptureInputMode_bothEdgesTxIN : IfxGpt12.h

IfxGpt12_CaptureInputMode_fallingEdgeTxIN : IfxGpt12.h

IfxGpt12_CaptureInputMode_none : IfxGpt12.h

IfxGpt12_CaptureInputMode_risingEdgeTxIN : IfxGpt12.h

IfxGpt12_CaptureTrigger : IfxGpt12.h

IfxGpt12_CaptureTrigger_capin : IfxGpt12.h

IfxGpt12_CaptureTrigger_t3inOrT3EUD : IfxGpt12.h

IfxGpt12_CaptureTriggerMode : IfxGpt12.h

IfxGpt12_CaptureTriggerMode_disabled : IfxGpt12.h

IfxGpt12_CaptureTriggerMode_fallingEdge : IfxGpt12.h

IfxGpt12_CaptureTriggerMode_randomEdge : IfxGpt12.h

IfxGpt12_CaptureTriggerMode_risingEdge : IfxGpt12.h

IfxGpt12_CounterInputMode : IfxGpt12.h

IfxGpt12_CounterInputMode_bothEdgesTxIN : IfxGpt12.h

IfxGpt12_CounterInputMode_bothEdgesTxOTL : IfxGpt12.h

IfxGpt12_CounterInputMode_counterDisabled : IfxGpt12.h

IfxGpt12_CounterInputMode_fallingEdgeTxIN : IfxGpt12.h

IfxGpt12_CounterInputMode_fallingEdgeTxOTL : IfxGpt12.h

IfxGpt12_CounterInputMode_risingEdgeTxIN : IfxGpt12.h

IfxGpt12_CounterInputMode_risingEdgeTxOTL : IfxGpt12.h

IfxGpt12_disableModule() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_enableModule() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_EudInput : IfxGpt12.h

IfxGpt12_EudInput_A : IfxGpt12.h

IfxGpt12_EudInput_B : IfxGpt12.h

IfxGpt12_EudInput_C : IfxGpt12.h

IfxGpt12_EudInput_D : IfxGpt12.h

IfxGpt12_getCaptureSrc() : IfxGpt12.h

IfxGpt12_getModuleFrequency() : IfxGpt12.h

IfxGpt12_Gpt1BlockPrescaler : IfxGpt12.h

IfxGpt12_Gpt1BlockPrescaler_16 : IfxGpt12.h

IfxGpt12_Gpt1BlockPrescaler_32 : IfxGpt12.h

IfxGpt12_Gpt1BlockPrescaler_4 : IfxGpt12.h

IfxGpt12_Gpt1BlockPrescaler_8 : IfxGpt12.h

IfxGpt12_Gpt2BlockPrescaler : IfxGpt12.h

IfxGpt12_Gpt2BlockPrescaler_16 : IfxGpt12.h

IfxGpt12_Gpt2BlockPrescaler_2 : IfxGpt12.h

IfxGpt12_Gpt2BlockPrescaler_4 : IfxGpt12.h

IfxGpt12_Gpt2BlockPrescaler_8 : IfxGpt12.h

IfxGpt12_IncrementalInterfaceInputMode : IfxGpt12.h

IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD : IfxGpt12.h

IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN : IfxGpt12.h

IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD : IfxGpt12.h

IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx : IfxGpt12.h

IfxGpt12_IncrEnc_getAbsolutePosition() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getDirection() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getFault() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getOffset() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getPeriodPerRotation() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getPosition() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getRawPosition() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getRefreshPeriod() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getResolution() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getSensorType() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getSpeed() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_getTurn() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_init() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_initConfig() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_onZeroIrq() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_reset() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_resetFaults() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_setOffset() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_setRefreshPeriod() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_stdIfPosInit() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_update() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_Update : IfxGpt12_IncrEnc.h

IfxGpt12_IncrEnc_updateFromT2() : IfxGpt12_IncrEnc.c

IfxGpt12_IncrEnc_updateFromT3() : IfxGpt12_IncrEnc.c

IfxGpt12_IncrEnc_updateSpeedFromT2() : IfxGpt12_IncrEnc.c

IfxGpt12_IncrEnc_updateSpeedFromT3() : IfxGpt12_IncrEnc.c

IfxGpt12_initCapInPin() : IfxGpt12.h

IfxGpt12_initCapInPinWithPadLevel() : IfxGpt12.h

IfxGpt12_initTxEudInPin() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_initTxEudInPinWithPadLevel() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_initTxInPin() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_initTxInPinWithPadLevel() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_initTxOutPin() : IfxGpt12.h

IfxGpt12_Input : IfxGpt12.h

IfxGpt12_Input_A : IfxGpt12.h

IfxGpt12_Input_B : IfxGpt12.h

IfxGpt12_Input_C : IfxGpt12.h

IfxGpt12_Input_D : IfxGpt12.h

IfxGpt12_isModuleSuspended() : IfxGpt12.h

IfxGpt12_Mode : IfxGpt12.h

IfxGpt12_Mode_capture : IfxGpt12.h

IfxGpt12_Mode_counter : IfxGpt12.h

IfxGpt12_Mode_highGatedTimer : IfxGpt12.h

IfxGpt12_Mode_incrementalInterfaceEdgeDetection : IfxGpt12.h

IfxGpt12_Mode_incrementalInterfaceRotationDetection : IfxGpt12.h

IfxGpt12_Mode_lowGatedTimer : IfxGpt12.h

IfxGpt12_Mode_reload : IfxGpt12.h

IfxGpt12_Mode_timer : IfxGpt12.h

IFXGPT12_NUM_MODULES : IfxGpt12_cfg.h

IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS : IfxGpt12_PinMap.h

IFXGPT12_PINMAP_NUM_MODULES : IfxGpt12_PinMap.h

IFXGPT12_PINMAP_NUM_TIMERS : IfxGpt12_PinMap.h

IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS : IfxGpt12_PinMap.h

IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS : IfxGpt12_PinMap.h

IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS : IfxGpt12_PinMap.h

IfxGpt12_ReloadInputMode : IfxGpt12.h

IfxGpt12_ReloadInputMode_bothEdgesTxIN : IfxGpt12.h

IfxGpt12_ReloadInputMode_bothEdgesTxOTL : IfxGpt12.h

IfxGpt12_ReloadInputMode_counterDisabled : IfxGpt12.h

IfxGpt12_ReloadInputMode_fallingEdgeTxIN : IfxGpt12.h

IfxGpt12_ReloadInputMode_fallingEdgeTxOTL : IfxGpt12.h

IfxGpt12_ReloadInputMode_risingEdgeTxIN : IfxGpt12.h

IfxGpt12_ReloadInputMode_risingEdgeTxOTL : IfxGpt12.h

IfxGpt12_resetModule() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_setCaptureInput() : IfxGpt12.h

IfxGpt12_setCaptureReload() : IfxGpt12.h

IfxGpt12_setGpt1BlockPrescaler() : IfxGpt12.h

IfxGpt12_setGpt2BlockPrescaler() : IfxGpt12.h

IfxGpt12_setSleepMode() : IfxGpt12.h

IfxGpt12_setSuspendMode() : IfxGpt12.h

IfxGpt12_SleepMode : IfxGpt12.h

IfxGpt12_SleepMode_disable : IfxGpt12.h

IfxGpt12_SleepMode_enable : IfxGpt12.h

IfxGpt12_SuspendMode : IfxGpt12.h

IfxGpt12_SuspendMode_hard : IfxGpt12.h

IfxGpt12_SuspendMode_none : IfxGpt12.h

IfxGpt12_SuspendMode_soft : IfxGpt12.h

IfxGpt12_T2_getFrequency() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_T2_getMode() : IfxGpt12.h

IfxGpt12_T2_getSrc() : IfxGpt12.h

IfxGpt12_T2_getTimerValue() : IfxGpt12.h

IfxGpt12_T2_run() : IfxGpt12.h

IfxGpt12_T2_setCaptureInputMode() : IfxGpt12.h

IfxGpt12_T2_setCounterInputMode() : IfxGpt12.h

IfxGpt12_T2_setDirectionSource() : IfxGpt12.h

IfxGpt12_T2_setEudInput() : IfxGpt12.h

IfxGpt12_T2_setIncrementalInterfaceInputMode() : IfxGpt12.h

IfxGpt12_T2_setInput() : IfxGpt12.h

IfxGpt12_T2_setInterruptEnable() : IfxGpt12.h

IfxGpt12_T2_setMode() : IfxGpt12.h

IfxGpt12_T2_setReloadInputMode() : IfxGpt12.h

IfxGpt12_T2_setRemoteControl() : IfxGpt12.h

IfxGpt12_T2_setTimerDirection() : IfxGpt12.h

IfxGpt12_T2_setTimerPrescaler() : IfxGpt12.h

IfxGpt12_T2_setTimerValue() : IfxGpt12.h

IfxGpt12_T3_enableOutput() : IfxGpt12.h

IfxGpt12_T3_getFrequency() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_T3_getMode() : IfxGpt12.h

IfxGpt12_T3_getSrc() : IfxGpt12.h

IfxGpt12_T3_getTimerValue() : IfxGpt12.h

IfxGpt12_T3_run() : IfxGpt12.h

IfxGpt12_T3_setCounterInputMode() : IfxGpt12.h

IfxGpt12_T3_setDirectionSource() : IfxGpt12.h

IfxGpt12_T3_setEudInput() : IfxGpt12.h

IfxGpt12_T3_setIncrementalInterfaceInputMode() : IfxGpt12.h

IfxGpt12_T3_setInput() : IfxGpt12.h

IfxGpt12_T3_setMode() : IfxGpt12.h

IfxGpt12_T3_setTimerDirection() : IfxGpt12.h

IfxGpt12_T3_setTimerPrescaler() : IfxGpt12.h

IfxGpt12_T3_setTimerValue() : IfxGpt12.h

IfxGpt12_T4_enableClearTimerT2() : IfxGpt12.h

IfxGpt12_T4_enableClearTimerT3() : IfxGpt12.h

IfxGpt12_T4_getFrequency() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_T4_getMode() : IfxGpt12.h

IfxGpt12_T4_getSrc() : IfxGpt12.h

IfxGpt12_T4_getTimerValue() : IfxGpt12.h

IfxGpt12_T4_run() : IfxGpt12.h

IfxGpt12_T4_setCaptureInputMode() : IfxGpt12.h

IfxGpt12_T4_setCounterInputMode() : IfxGpt12.h

IfxGpt12_T4_setDirectionSource() : IfxGpt12.h

IfxGpt12_T4_setEudInput() : IfxGpt12.h

IfxGpt12_T4_setIncrementalInterfaceInputMode() : IfxGpt12.h

IfxGpt12_T4_setInput() : IfxGpt12.h

IfxGpt12_T4_setInterruptEnable() : IfxGpt12.h

IfxGpt12_T4_setMode() : IfxGpt12.h

IfxGpt12_T4_setReloadInputMode() : IfxGpt12.h

IfxGpt12_T4_setRemoteControl() : IfxGpt12.h

IfxGpt12_T4_setTimerDirection() : IfxGpt12.h

IfxGpt12_T4_setTimerPrescaler() : IfxGpt12.h

IfxGpt12_T4_setTimerValue() : IfxGpt12.h

IfxGpt12_T5_enableClearTimer() : IfxGpt12.h

IfxGpt12_T5_getFrequency() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_T5_getMode() : IfxGpt12.h

IfxGpt12_T5_getSrc() : IfxGpt12.h

IfxGpt12_T5_getTimerValue() : IfxGpt12.h

IfxGpt12_T5_run() : IfxGpt12.h

IfxGpt12_T5_setCaptureTrigger() : IfxGpt12.h

IfxGpt12_T5_setCaptureTriggerEnable() : IfxGpt12.h

IfxGpt12_T5_setCaptureTriggerMode() : IfxGpt12.h

IfxGpt12_T5_setCounterInputMode() : IfxGpt12.h

IfxGpt12_T5_setDirectionSource() : IfxGpt12.h

IfxGpt12_T5_setEudInput() : IfxGpt12.h

IfxGpt12_T5_setInput() : IfxGpt12.h

IfxGpt12_T5_setMode() : IfxGpt12.h

IfxGpt12_T5_setRemoteControl() : IfxGpt12.h

IfxGpt12_T5_setTimerDirection() : IfxGpt12.h

IfxGpt12_T5_setTimerPrescaler() : IfxGpt12.h

IfxGpt12_T5_setTimerValue() : IfxGpt12.h

IfxGpt12_T6_enableClearTimer() : IfxGpt12.h

IfxGpt12_T6_getFrequency() : IfxGpt12.c , IfxGpt12.h

IfxGpt12_T6_getMode() : IfxGpt12.h

IfxGpt12_T6_getSrc() : IfxGpt12.h

IfxGpt12_T6_getTimerValue() : IfxGpt12.h

IfxGpt12_T6_run() : IfxGpt12.h

IfxGpt12_T6_setCounterInputMode() : IfxGpt12.h

IfxGpt12_T6_setDirectionSource() : IfxGpt12.h

IfxGpt12_T6_setEudInput() : IfxGpt12.h

IfxGpt12_T6_setInput() : IfxGpt12.h

IfxGpt12_T6_setMode() : IfxGpt12.h

IfxGpt12_T6_setReloadMode() : IfxGpt12.h

IfxGpt12_T6_setTimerDirection() : IfxGpt12.h

IfxGpt12_T6_setTimerPrescaler() : IfxGpt12.h

IfxGpt12_T6_setTimerValue() : IfxGpt12.h

IfxGpt12_TimerDirection : IfxGpt12.h

IfxGpt12_TimerDirection_down : IfxGpt12.h

IfxGpt12_TimerDirection_up : IfxGpt12.h

IfxGpt12_TimerDirectionSource : IfxGpt12.h

IfxGpt12_TimerDirectionSource_external : IfxGpt12.h

IfxGpt12_TimerDirectionSource_internal : IfxGpt12.h

IfxGpt12_TimerInputPrescaler : IfxGpt12.h

IfxGpt12_TimerInputPrescaler_1 : IfxGpt12.h

IfxGpt12_TimerInputPrescaler_128 : IfxGpt12.h

IfxGpt12_TimerInputPrescaler_16 : IfxGpt12.h

IfxGpt12_TimerInputPrescaler_2 : IfxGpt12.h

IfxGpt12_TimerInputPrescaler_32 : IfxGpt12.h

IfxGpt12_TimerInputPrescaler_4 : IfxGpt12.h

IfxGpt12_TimerInputPrescaler_64 : IfxGpt12.h

IfxGpt12_TimerInputPrescaler_8 : IfxGpt12.h

IfxGpt12_TimerReloadMode : IfxGpt12.h

IfxGpt12_TimerReloadMode_disable : IfxGpt12.h

IfxGpt12_TimerReloadMode_enable : IfxGpt12.h

IfxGpt12_TimerRemoteControl : IfxGpt12.h

IfxGpt12_TimerRemoteControl_off : IfxGpt12.h

IfxGpt12_TimerRemoteControl_on : IfxGpt12.h

IfxGpt12_TimerRun : IfxGpt12.h

IfxGpt12_TimerRun_start : IfxGpt12.h

IfxGpt12_TimerRun_stop : IfxGpt12.h

IfxGpt12_TxEud_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt12_TxIn_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGpt12_TxOut_Out_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h

IfxGtm_Atom : IfxGtm_cfg.h

IfxGtm_ATOM0_0_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_1_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_2_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_3_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_5_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_6_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM0_7_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_2_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM1_7_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_6_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_6_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_6_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_7_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_7_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM2_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_6_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_6_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_7_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_ATOM3_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_Atom_0 : IfxGtm_cfg.h

IfxGtm_Atom_1 : IfxGtm_cfg.h

IfxGtm_Atom_2 : IfxGtm_cfg.h

IfxGtm_Atom_3 : IfxGtm_cfg.h

IfxGtm_Atom_Agc_buildFeature() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_buildFeatureForChannel() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_enableChannel() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_enableChannelOutput() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_enableChannels() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_enableChannelsOutput() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_enableChannelsTrigger() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_enableChannelsUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_enableChannelUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_enableTimeTrigger() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_resetChannels() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_setChannelForceUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_setChannelsForceUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_setChannelsUpdate() : IfxGtm_Atom.h

IfxGtm_Atom_Agc_setTimeTrigger() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Agc_trigger() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_AruInput : IfxGtm_Atom.h

IfxGtm_Atom_AruInput_disabled : IfxGtm_Atom.h

IfxGtm_Atom_AruInput_enabled : IfxGtm_Atom.h

IfxGtm_Atom_Ch : IfxGtm_cfg.h

IfxGtm_Atom_Ch_0 : IfxGtm_cfg.h

IfxGtm_Atom_Ch_1 : IfxGtm_cfg.h

IfxGtm_Atom_Ch_2 : IfxGtm_cfg.h

IfxGtm_Atom_Ch_3 : IfxGtm_cfg.h

IfxGtm_Atom_Ch_4 : IfxGtm_cfg.h

IfxGtm_Atom_Ch_5 : IfxGtm_cfg.h

IfxGtm_Atom_Ch_6 : IfxGtm_cfg.h

IfxGtm_Atom_Ch_7 : IfxGtm_cfg.h

IfxGtm_Atom_Ch_clearOneNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_clearZeroNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_configurePwmMode() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getChannelPointer() : IfxGtm_Atom.h

IfxGtm_Atom_Ch_getClockFrequency() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getClockSource() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getCompareOne() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getCompareOnePointer() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getCompareZero() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getCompareZeroPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getCounterValue() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getOutputLevel() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getSrcPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_getTimerPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_isOneNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_isZeroNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_none : IfxGtm_cfg.h

IfxGtm_Atom_Ch_OutputTrigger : IfxGtm_Atom.h

IfxGtm_Atom_Ch_OutputTrigger_forward : IfxGtm_Atom.h

IfxGtm_Atom_Ch_OutputTrigger_generate : IfxGtm_Atom.h

IfxGtm_Atom_Ch_raiseInterruptOne() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_raiseInterruptZero() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_ResetEvent : IfxGtm_Atom.h

IfxGtm_Atom_Ch_ResetEvent_onCm0 : IfxGtm_Atom.h

IfxGtm_Atom_Ch_ResetEvent_onTrigger : IfxGtm_Atom.h

IfxGtm_Atom_Ch_setAruInput() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setAruReadAddress0() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setAruReadAddress1() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setClockSource() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setCompare() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setCompareOne() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setCompareOneShadow() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setCompareShadow() : IfxGtm_Atom.h

IfxGtm_Atom_Ch_setCompareZero() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setCompareZeroShadow() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setCounterValue() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setMode() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setOneShotMode() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setResetSource() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setSignalLevel() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setSomcControl() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setSomcSignalLevelControl() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Ch_setTriggerOutput() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_getShadowOne() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_getShadowOnePointer() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_getShadowZero() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_getShadowZeroPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h

IfxGtm_Atom_Mode : IfxGtm_Atom.h

IfxGtm_Atom_Mode_outputCompare : IfxGtm_Atom.h

IfxGtm_Atom_Mode_outputImmediate : IfxGtm_Atom.h

IfxGtm_Atom_Mode_outputPwm : IfxGtm_Atom.h

IfxGtm_Atom_Mode_outputSerial : IfxGtm_Atom.h

IFXGTM_ATOM_NUM_AGC_CHANNELS : IfxGtm_Atom.c

IfxGtm_Atom_Pwm_init() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h

IfxGtm_Atom_Pwm_initConfig() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h

IfxGtm_Atom_Pwm_start() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h

IfxGtm_Atom_Pwm_stop() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h

IfxGtm_Atom_PwmHl : IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_getDeadtime() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_getMinPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_getMode() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_init() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_initConfig() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_invertActiveState() : IfxGtm_Atom_PwmHl.c

IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS : IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_modes : IfxGtm_Atom_PwmHl.c

IfxGtm_Atom_PwmHl_setDeadtime() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_setMinPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_setMode() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_setOnTime() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_setOnTimeAndShift() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_setPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_setupChannels() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_stdIfPwmHlInit() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_Update : IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_updateAndShiftOff() : IfxGtm_Atom_PwmHl.c

IfxGtm_Atom_PwmHl_updateCenterAligned() : IfxGtm_Atom_PwmHl.c

IfxGtm_Atom_PwmHl_updateEdgeAligned() : IfxGtm_Atom_PwmHl.c

IfxGtm_Atom_PwmHl_updateOff() : IfxGtm_Atom_PwmHl.c

IfxGtm_Atom_PwmHl_UpdatePulse : IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_updatePulse() : IfxGtm_Atom_PwmHl.c

IfxGtm_Atom_PwmHl_updatePulseOff() : IfxGtm_Atom_PwmHl.c

IfxGtm_Atom_PwmHl_UpdateShift : IfxGtm_Atom_PwmHl.h

IfxGtm_Atom_PwmHl_updateShiftCenterAligned() : IfxGtm_Atom_PwmHl.c

IfxGtm_Atom_SomcControl : IfxGtm_Atom.h

IfxGtm_Atom_SomcControl_cancelCompare : IfxGtm_Atom.h

IfxGtm_Atom_SomcControl_ccu0ccu1Ts0 : IfxGtm_Atom.h

IfxGtm_Atom_SomcControl_ccu0ccu1Ts12 : IfxGtm_Atom.h

IfxGtm_Atom_SomcControl_ccu0Ts0 : IfxGtm_Atom.h

IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12 : IfxGtm_Atom.h

IfxGtm_Atom_SomcControl_ccu1Ts12 : IfxGtm_Atom.h

IfxGtm_Atom_SomcControl_compareBoth : IfxGtm_Atom.h

IfxGtm_Atom_SomcControl_compareBoth1 : IfxGtm_Atom.h

IfxGtm_Atom_SomcSignalLevelControl : IfxGtm_Atom.h

IfxGtm_Atom_SomcSignalLevelControl_noChange : IfxGtm_Atom.h

IfxGtm_Atom_SomcSignalLevelControl_sl0out0 : IfxGtm_Atom.h

IfxGtm_Atom_SomcSignalLevelControl_sl0out1 : IfxGtm_Atom.h

IfxGtm_Atom_SomcSignalLevelControl_toggle : IfxGtm_Atom.h

IfxGtm_Atom_Timer_acknowledgeTimerIrq() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_acknowledgeTriggerIrq() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_addToChannelMask() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_applyUpdate() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_disableUpdate() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_getFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_getInputFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_getOffset() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_getPeriod() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_getPointer() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_getResolution() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_getTrigger() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_getTriggerPointer() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_init() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_initConfig() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_run() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_setFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_setPeriod() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_setSingleMode() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_setTrigger() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_stdIfTimerInit() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_stop() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_Timer_updateInputFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h

IfxGtm_Atom_ToutMapP : IfxGtm_PinMap.h

IfxGtm_ChXSel : IfxGtm_PinMap.h

IfxGtm_ChXSel_a : IfxGtm_PinMap.h

IfxGtm_ChXSel_b : IfxGtm_PinMap.h

IfxGtm_ChXSel_c : IfxGtm_PinMap.h

IfxGtm_ChXSel_d : IfxGtm_PinMap.h

IfxGtm_ChXSel_e : IfxGtm_PinMap.h

IfxGtm_ChXSel_f : IfxGtm_PinMap.h

IfxGtm_ChXSel_g : IfxGtm_PinMap.h

IfxGtm_ChXSel_h : IfxGtm_PinMap.h

IfxGtm_ChXSel_i : IfxGtm_PinMap.h

IfxGtm_ChXSel_j : IfxGtm_PinMap.h

IfxGtm_ChXSel_k : IfxGtm_PinMap.h

IfxGtm_ChXSel_l : IfxGtm_PinMap.h

IfxGtm_ChXSel_m : IfxGtm_PinMap.h

IfxGtm_ChXSel_n : IfxGtm_PinMap.h

IfxGtm_ChXSel_o : IfxGtm_PinMap.h

IfxGtm_ChXSel_p : IfxGtm_PinMap.h

IfxGtm_CLK0_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_CLK1_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_CLK2_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_Cmu_Clk : IfxGtm_Cmu.h

IfxGtm_Cmu_Clk_0 : IfxGtm_Cmu.h

IfxGtm_Cmu_Clk_1 : IfxGtm_Cmu.h

IfxGtm_Cmu_Clk_2 : IfxGtm_Cmu.h

IfxGtm_Cmu_Clk_3 : IfxGtm_Cmu.h

IfxGtm_Cmu_Clk_4 : IfxGtm_Cmu.h

IfxGtm_Cmu_Clk_5 : IfxGtm_Cmu.h

IfxGtm_Cmu_Clk_6 : IfxGtm_Cmu.h

IfxGtm_Cmu_Clk_7 : IfxGtm_Cmu.h

IFXGTM_CMU_CLKDIS_ALL : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_CLK0 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_CLK1 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_CLK2 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_CLK3 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_CLK4 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_CLK5 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_CLK6 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_CLK7 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_ECLK0 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_ECLK1 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_ECLK2 : IfxGtm_cfg.h

IFXGTM_CMU_CLKDIS_FXCLK : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_ALL : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_CLK0 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_CLK1 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_CLK2 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_CLK3 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_CLK4 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_CLK5 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_CLK6 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_CLK7 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_ECLK0 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_ECLK1 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_ECLK2 : IfxGtm_cfg.h

IFXGTM_CMU_CLKEN_FXCLK : IfxGtm_cfg.h

IfxGtm_Cmu_Eclk : IfxGtm_Cmu.h

IfxGtm_Cmu_Eclk_0 : IfxGtm_Cmu.h

IfxGtm_Cmu_Eclk_1 : IfxGtm_Cmu.h

IfxGtm_Cmu_Eclk_2 : IfxGtm_Cmu.h

IfxGtm_Cmu_enableClocks() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_Fxclk : IfxGtm_Cmu.h

IfxGtm_Cmu_Fxclk_0 : IfxGtm_Cmu.h

IfxGtm_Cmu_Fxclk_1 : IfxGtm_Cmu.h

IfxGtm_Cmu_Fxclk_2 : IfxGtm_Cmu.h

IfxGtm_Cmu_Fxclk_3 : IfxGtm_Cmu.h

IfxGtm_Cmu_Fxclk_4 : IfxGtm_Cmu.h

IfxGtm_Cmu_getClkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_getEclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_getFxClkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_getGclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_getModuleFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_isClkClockEnabled() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_isEclkClockEnabled() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_isFxClockEnabled() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_selectClkInput() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_setClkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_setEclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_setGclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h

IfxGtm_Cmu_Tim_Filter_Clk : IfxGtm_Cmu.h

IfxGtm_Cmu_Tim_Filter_Clk_0 : IfxGtm_Cmu.h

IfxGtm_Cmu_Tim_Filter_Clk_1 : IfxGtm_Cmu.h

IfxGtm_Cmu_Tim_Filter_Clk_6 : IfxGtm_Cmu.h

IfxGtm_Cmu_Tim_Filter_Clk_7 : IfxGtm_Cmu.h

IfxGtm_disable() : IfxGtm.c , IfxGtm.h

IfxGtm_Dpll_getSubIncFrequency() : IfxGtm_Dpll.c , IfxGtm_Dpll.h

IfxGtm_Dpll_SubInc : IfxGtm_cfg.h

IfxGtm_Dpll_SubInc_1 : IfxGtm_cfg.h

IfxGtm_Dpll_SubInc_2 : IfxGtm_cfg.h

IfxGtm_enable() : IfxGtm.c , IfxGtm.h

IfxGtm_FeatureControl : IfxGtm_cfg.h

IfxGtm_FeatureControl_disable : IfxGtm_cfg.h

IfxGtm_FeatureControl_disabled : IfxGtm_cfg.h

IfxGtm_FeatureControl_enable : IfxGtm_cfg.h

IfxGtm_FeatureControl_enabled : IfxGtm_cfg.h

IfxGtm_getSysClkFrequency() : IfxGtm.c , IfxGtm.h

IfxGtm_IrqMode : IfxGtm.h

IfxGtm_IrqMode_level : IfxGtm.h

IfxGtm_IrqMode_pulse : IfxGtm.h

IfxGtm_IrqMode_pulseNotify : IfxGtm.h

IfxGtm_IrqMode_singlePulse : IfxGtm.h

IfxGtm_isEnabled() : IfxGtm.h

IfxGtm_isModuleSuspended() : IfxGtm.h

IFXGTM_NUM_ATOM_CHANNELS : IfxGtm_cfg.h

IFXGTM_NUM_ATOM_OBJECTS : IfxGtm_cfg.h

IFXGTM_NUM_MODULES : IfxGtm_cfg.h

IFXGTM_NUM_TIM_CHANNELS : IfxGtm_cfg.h

IFXGTM_NUM_TOM_CHANNELS : IfxGtm_cfg.h

IFXGTM_NUM_TOM_OBJECTS : IfxGtm_cfg.h

IfxGtm_PinMap_setAtomTout() : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_PinMap_setTimTin() : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_PinMap_setTomTout() : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_setSuspendMode() : IfxGtm.h

IfxGtm_SuspendMode : IfxGtm.h

IfxGtm_SuspendMode_hard : IfxGtm.h

IfxGtm_SuspendMode_none : IfxGtm.h

IfxGtm_SuspendMode_soft : IfxGtm.h

IfxGtm_Tbu_enableChannel() : IfxGtm_Tbu.h

IfxGtm_Tbu_getClockFrequency() : IfxGtm_Tbu.c , IfxGtm_Tbu.h

IfxGtm_Tbu_isChannelEnabled() : IfxGtm_Tbu.h

IfxGtm_Tbu_Ts : IfxGtm_Tbu.h

IfxGtm_Tbu_Ts_0 : IfxGtm_Tbu.h

IfxGtm_Tbu_Ts_1 : IfxGtm_Tbu.h

IfxGtm_Tbu_Ts_2 : IfxGtm_Tbu.h

IfxGtm_Tim : IfxGtm_cfg.h

IfxGtm_TIM0_0_TIN0_P02_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_TIN109_P10_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_TIN18_P00_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_TIN26_P33_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_TIN32_P33_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_TIN34_P33_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_TIN48_P22_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_TIN53_P21_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_TIN77_P15_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_TIN85_P14_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_TIN87_P14_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_TIN8_P02_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_0_TIN9_P00_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_TIN103_P10_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_TIN10_P00_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_TIN11_P00_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_TIN19_P00_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_TIN1_P02_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_TIN27_P33_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_TIN31_P33_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_TIN35_P33_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_TIN47_P22_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_TIN54_P21_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_TIN78_P15_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_1_TIN86_P14_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_TIN104_P10_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_TIN107_P10_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_TIN20_P00_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_TIN28_P33_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_TIN2_P02_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_TIN33_P33_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_TIN36_P32_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_TIN46_P23_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_TIN55_P21_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_2_TIN79_P15_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_3_TIN105_P10_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_3_TIN108_P10_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_3_TIN21_P00_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_3_TIN29_P33_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_3_TIN38_P32_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_3_TIN3_P02_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_3_TIN49_P22_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_3_TIN51_P21_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_3_TIN56_P21_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_3_TIN60_P20_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_3_TIN80_P14_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_4_TIN102_P10_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_4_TIN22_P33_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_4_TIN30_P33_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_4_TIN39_P32_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_4_TIN4_P02_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_4_TIN50_P22_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_4_TIN52_P21_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_4_TIN57_P21_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_4_TIN61_P20_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_4_TIN81_P14_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_5_TIN110_P10_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_5_TIN23_P33_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_5_TIN40_P32_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_5_TIN41_P23_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_5_TIN58_P21_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_5_TIN5_P02_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_5_TIN82_P14_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_6_TIN106_P10_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_6_TIN24_P33_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_6_TIN42_P23_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_6_TIN43_P23_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_6_TIN59_P20_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_6_TIN62_P20_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_6_TIN83_P14_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_7_TIN25_P33_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_7_TIN44_P23_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_7_TIN45_P23_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_7_TIN63_P20_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_7_TIN64_P20_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_7_TIN7_P02_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM0_7_TIN84_P14_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_TIN0_P02_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_TIN109_P10_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_TIN18_P00_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_TIN26_P33_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_TIN32_P33_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_TIN48_P22_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_TIN53_P21_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_TIN68_P20_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_TIN76_P15_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_TIN77_P15_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_TIN85_P14_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_TIN87_P14_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_0_TIN94_P13_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_1_TIN103_P10_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_1_TIN19_P00_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_1_TIN1_P02_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_1_TIN27_P33_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_1_TIN31_P33_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_1_TIN47_P22_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_1_TIN54_P21_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_1_TIN69_P20_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_1_TIN78_P15_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_1_TIN86_P14_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_1_TIN95_P11_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_TIN104_P10_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_TIN107_P10_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_TIN12_P00_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_TIN20_P00_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_TIN28_P33_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_TIN2_P02_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_TIN33_P33_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_TIN46_P23_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_TIN55_P21_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_TIN70_P20_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_TIN79_P15_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_2_TIN96_P11_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_TIN105_P10_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_TIN108_P10_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_TIN13_P00_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_TIN21_P00_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_TIN29_P33_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_TIN38_P32_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_TIN3_P02_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_TIN49_P22_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_TIN56_P21_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_TIN71_P15_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_TIN80_P14_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_3_TIN97_P11_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_4_TIN102_P10_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_4_TIN14_P00_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_4_TIN22_P33_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_4_TIN30_P33_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_4_TIN39_P32_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_4_TIN4_P02_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_4_TIN50_P22_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_4_TIN57_P21_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_4_TIN72_P15_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_4_TIN81_P14_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_4_TIN98_P11_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_5_TIN110_P10_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_5_TIN15_P00_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_5_TIN40_P32_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_5_TIN41_P23_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_5_TIN58_P21_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_5_TIN5_P02_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_5_TIN65_P20_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_5_TIN73_P15_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_5_TIN82_P14_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_5_TIN91_P13_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_5_TIN99_P11_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_6_TIN100_P11_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_6_TIN106_P10_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_6_TIN16_P00_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_6_TIN24_P33_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_6_TIN42_P23_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_6_TIN43_P23_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_6_TIN59_P20_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_6_TIN66_P20_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_6_TIN6_P02_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_6_TIN74_P15_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_6_TIN83_P14_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_6_TIN92_P13_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_7_TIN101_P11_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_7_TIN17_P00_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_7_TIN25_P33_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_7_TIN44_P23_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_7_TIN45_P23_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_7_TIN64_P20_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_7_TIN67_P20_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_7_TIN75_P15_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_7_TIN7_P02_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_7_TIN84_P14_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM1_7_TIN93_P13_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_0_TIN34_P33_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_0_TIN68_P20_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_0_TIN76_P15_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_0_TIN8_P02_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_0_TIN94_P13_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_0_TIN9_P00_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_1_TIN10_P00_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_1_TIN11_P00_2_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_1_TIN35_P33_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_1_TIN69_P20_13_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_1_TIN95_P11_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_2_TIN12_P00_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_2_TIN36_P32_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_2_TIN70_P20_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_2_TIN88_P14_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_2_TIN96_P11_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_3_TIN13_P00_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_3_TIN60_P20_1_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_3_TIN71_P15_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_3_TIN89_P14_9_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_3_TIN97_P11_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_4_TIN14_P00_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_4_TIN51_P21_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_4_TIN61_P20_3_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_4_TIN72_P15_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_4_TIN90_P14_10_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_4_TIN98_P11_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_5_TIN15_P00_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_5_TIN52_P21_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_5_TIN65_P20_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_5_TIN73_P15_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_5_TIN91_P13_0_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_5_TIN99_P11_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_6_TIN100_P11_11_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_6_TIN16_P00_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_6_TIN62_P20_6_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_6_TIN66_P20_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_6_TIN74_P15_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_6_TIN92_P13_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_7_TIN101_P11_12_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_7_TIN17_P00_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_7_TIN63_P20_7_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_7_TIN67_P20_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TIM2_7_TIN75_P15_4_IN : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TIM2_7_TIN93_P13_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_Tim_0 : IfxGtm_cfg.h

IfxGtm_Tim_1 : IfxGtm_cfg.h

IfxGtm_Tim_2 : IfxGtm_cfg.h

IfxGtm_Tim_Ch : IfxGtm_cfg.h

IfxGtm_Tim_Ch_0 : IfxGtm_cfg.h

IfxGtm_Tim_Ch_1 : IfxGtm_cfg.h

IfxGtm_Tim_Ch_2 : IfxGtm_cfg.h

IfxGtm_Tim_Ch_3 : IfxGtm_cfg.h

IfxGtm_Tim_Ch_4 : IfxGtm_cfg.h

IfxGtm_Tim_Ch_5 : IfxGtm_cfg.h

IfxGtm_Tim_Ch_6 : IfxGtm_cfg.h

IfxGtm_Tim_Ch_7 : IfxGtm_cfg.h

IfxGtm_Tim_Ch_clearCntOverflowEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_clearDataLostEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_clearEcntOverflowEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_clearGlitchEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_clearNewValueEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_getCaptureClockFrequency() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_getCaptureClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_getFilterClockFrequency() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_getFilterClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_getSrcPointer() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_getTimeoutClockFrequency() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_getTimeoutClockSource() : IfxGtm_Tim.h , IfxGtm_Tim.c

IfxGtm_Tim_Ch_isCntOverflowEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_isDataLostEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_isEcntOverflowEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_isGlitchEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_isNewValueEvent() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_resetChannel() : IfxGtm_Tim.h

IfxGtm_Tim_Ch_setChannelNotification() : IfxGtm_Tim.h , IfxGtm_Tim.c

IfxGtm_Tim_Ch_setClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_setFilterNotification() : IfxGtm_Tim.h , IfxGtm_Tim.c

IfxGtm_Tim_Ch_setNotificationMode() : IfxGtm_Tim.c , IfxGtm_Tim.h

IfxGtm_Tim_Ch_setTimeoutNotification() : IfxGtm_Tim.h , IfxGtm_Tim.c

IfxGtm_Tim_CntsSel : IfxGtm_Tim.h

IfxGtm_Tim_CntsSel_cntReg : IfxGtm_Tim.h

IfxGtm_Tim_CntsSel_tbuTs0 : IfxGtm_Tim.h

IfxGtm_Tim_FilterCounter : IfxGtm_Tim.h

IfxGtm_Tim_FilterCounter_hold : IfxGtm_Tim.h

IfxGtm_Tim_FilterCounter_upDown : IfxGtm_Tim.h

IfxGtm_Tim_FilterMode : IfxGtm_Tim.h

IfxGtm_Tim_FilterMode_immediateEdgePropagation : IfxGtm_Tim.h

IfxGtm_Tim_FilterMode_individualDeglitchTime : IfxGtm_Tim.h

IfxGtm_Tim_getChannel() : IfxGtm_Tim.h

IfxGtm_Tim_GprSel : IfxGtm_Tim.h

IfxGtm_Tim_GprSel_cnts : IfxGtm_Tim.h

IfxGtm_Tim_GprSel_tbuTs0 : IfxGtm_Tim.h

IfxGtm_Tim_GprSel_tbuTs1 : IfxGtm_Tim.h

IfxGtm_Tim_GprSel_tbuTs2 : IfxGtm_Tim.h

IfxGtm_Tim_In_clearNewData() : IfxGtm_Tim_In.h

IfxGtm_Tim_In_ConfigFilterMode : IfxGtm_Tim_In.h

IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation : IfxGtm_Tim_In.h

IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold : IfxGtm_Tim_In.h

IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown : IfxGtm_Tim_In.h

IfxGtm_Tim_In_ConfigFilterMode_none : IfxGtm_Tim_In.h

IfxGtm_Tim_In_getDutyPercent() : IfxGtm_Tim_In.h

IfxGtm_Tim_In_getPeriodSecond() : IfxGtm_Tim_In.h

IfxGtm_Tim_In_getPeriodTicks() : IfxGtm_Tim_In.h

IfxGtm_Tim_In_getPulseLengthTick() : IfxGtm_Tim_In.h

IfxGtm_Tim_In_init() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h

IfxGtm_Tim_In_initConfig() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h

IfxGtm_Tim_In_Input : IfxGtm_Tim_In.h

IfxGtm_Tim_In_Input_adjacentChannel : IfxGtm_Tim_In.h

IfxGtm_Tim_In_Input_aux : IfxGtm_Tim_In.h

IfxGtm_Tim_In_Input_currentChannel : IfxGtm_Tim_In.h

IfxGtm_Tim_In_isDataLost() : IfxGtm_Tim_In.h

IfxGtm_Tim_In_isNewData() : IfxGtm_Tim_In.h

IfxGtm_Tim_In_onIsr() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h

IfxGtm_Tim_In_update() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h

IfxGtm_Tim_Input : IfxGtm_Tim.h

IfxGtm_Tim_Input_adjacentChannel : IfxGtm_Tim.h

IfxGtm_Tim_Input_currentChannel : IfxGtm_Tim.h

IfxGtm_Tim_Mode : IfxGtm_Tim.h

IfxGtm_Tim_Mode_bitCompression : IfxGtm_Tim.h

IfxGtm_Tim_Mode_inputEvent : IfxGtm_Tim.h

IfxGtm_Tim_Mode_inputPrescaler : IfxGtm_Tim.h

IfxGtm_Tim_Mode_pulseIntegration : IfxGtm_Tim.h

IfxGtm_Tim_Mode_pwmMeasurement : IfxGtm_Tim.h

IfxGtm_Tim_Timeout : IfxGtm_Tim.h

IfxGtm_Tim_Timeout_bothEdge : IfxGtm_Tim.h

IfxGtm_Tim_Timeout_disabled : IfxGtm_Tim.h

IfxGtm_Tim_Timeout_fallingEdge : IfxGtm_Tim.h

IfxGtm_Tim_Timeout_risingEdge : IfxGtm_Tim.h

IfxGtm_Tom : IfxGtm_cfg.h

IfxGtm_TOM0_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_10_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_10_TOUT2_P02_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_10_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_10_TOUT46_P23_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_10_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_10_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_10_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_11_TOUT13_P00_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_11_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_11_TOUT43_P23_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_11_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_11_TOUT63_P20_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_11_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_11_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_12_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_12_TOUT34_P33_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_12_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_12_TOUT4_P02_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_12_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_12_TOUT72_P15_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_12_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_13_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_13_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_13_TOUT5_P02_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_13_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_13_TOUT73_P15_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_13_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_14_TOUT100_P11_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_14_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_14_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_14_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_14_TOUT6_P02_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_14_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_15_TOUT101_P11_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_15_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_15_TOUT42_P23_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_15_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_15_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_15_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_2_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_5_TOUT82_P14_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_6_TOUT83_P14_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_8_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_8_TOUT48_P22_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_8_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_8_TOUT68_P20_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_8_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_8_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_8_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_8_TOUT9_P00_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_9_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_9_TOUT11_P00_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_9_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_9_TOUT47_P22_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM0_9_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM0_9_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_10_TOUT104_P10_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_10_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_10_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_10_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_11_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_11_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_11_TOUT3_P02_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_11_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_11_TOUT63_P20_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_12_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_12_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_12_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_12_TOUT61_P20_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_13_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_13_TOUT35_P33_13_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_13_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_13_TOUT65_P20_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_14_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_14_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_14_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_15_TOUT67_P20_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_15_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_2_TOUT79_P15_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_5_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6_TOUT43_P23_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_6_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7_TOUT44_P23_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_7_TOUT84_P14_4_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_8_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_8_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_8_TOUT51_P21_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_9_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_TOM1_9_TOUT1_P02_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c

IfxGtm_TOM1_9_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h

IfxGtm_Tom_0 : IfxGtm_cfg.h

IfxGtm_Tom_1 : IfxGtm_cfg.h

IfxGtm_Tom_Ch : IfxGtm_cfg.h

IfxGtm_Tom_Ch_0 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_1 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_10 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_11 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_12 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_13 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_14 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_15 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_2 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_3 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_4 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_5 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_6 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_7 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_8 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_9 : IfxGtm_cfg.h

IfxGtm_Tom_Ch_clearOneNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_clearZeroNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_ClkSrc : IfxGtm_Tom.h

IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 : IfxGtm_Tom.h

IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 : IfxGtm_Tom.h

IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 : IfxGtm_Tom.h

IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 : IfxGtm_Tom.h

IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 : IfxGtm_Tom.h

IfxGtm_Tom_Ch_ClkSrc_noClock : IfxGtm_Tom.h

IfxGtm_Tom_Ch_getChannelPointer() : IfxGtm_Tom.h

IfxGtm_Tom_Ch_getClockFrequency() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_getClockSource() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_getCompareOne() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_getCompareOnePointer() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_getCompareZero() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_getCompareZeroPointer() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_getOutputLevel() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_getSrcPointer() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_getTgcPointer() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_getTimerPointer() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_isOneNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_isZeroNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_none : IfxGtm_cfg.h

IfxGtm_Tom_Ch_OutputTrigger : IfxGtm_Tom.h

IfxGtm_Tom_Ch_OutputTrigger_forward : IfxGtm_Tom.h

IfxGtm_Tom_Ch_OutputTrigger_generate : IfxGtm_Tom.h

IfxGtm_Tom_Ch_raiseInterruptOne() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_raiseInterruptZero() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_ResetEvent : IfxGtm_Tom.h

IfxGtm_Tom_Ch_ResetEvent_onCm0 : IfxGtm_Tom.h

IfxGtm_Tom_Ch_ResetEvent_onTrigger : IfxGtm_Tom.h

IfxGtm_Tom_Ch_setClockSource() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setCompare() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setCompareOne() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setCompareOneShadow() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setCompareShadow() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setCompareZero() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Ch_setCompareZeroShadow() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setCounterValue() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Ch_setGatedCounter() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setOneShotMode() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setPcm() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Ch_setResetSource() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setSignalLevel() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Ch_setSpe() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Ch_setTriggerOutput() : IfxGtm_Tom.h , IfxGtm_Tom.c

IFXGTM_TOM_NUM_TGC_CHANNELS : IfxGtm_Tom.h

IfxGtm_Tom_Pwm_init() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h

IfxGtm_Tom_Pwm_initConfig() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h

IfxGtm_Tom_Pwm_start() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h

IfxGtm_Tom_Pwm_stop() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h

IfxGtm_Tom_PwmHl : IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_getDeadtime() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_getMinPulse() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_getMode() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_init() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_initConfig() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_invertActiveState() : IfxGtm_Tom_PwmHl.c

IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS : IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_modes : IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_setDeadtime() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_setMinPulse() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_setMode() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_setOnTime() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_setOnTimeAndShift() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_setPulse() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_setupChannels() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_stdIfPwmHlInit() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_Update : IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_updateAndShiftOff() : IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_updateCenterAligned() : IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_updateEdgeAligned() : IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_updateOff() : IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_UpdatePulse : IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_updatePulse() : IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_updatePulseOff() : IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_PwmHl_UpdateShift : IfxGtm_Tom_PwmHl.h

IfxGtm_Tom_PwmHl_updateShiftCenterAligned() : IfxGtm_Tom_PwmHl.c

IfxGtm_Tom_Tgc : IfxGtm_cfg.h

IfxGtm_Tom_Tgc_0 : IfxGtm_cfg.h

IfxGtm_Tom_Tgc_1 : IfxGtm_cfg.h

IfxGtm_Tom_Tgc_buildFeature() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_buildFeatureForChannel() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Tgc_enableChannel() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_enableChannelOutput() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Tgc_enableChannels() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_enableChannelsOutput() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Tgc_enableChannelsTrigger() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_enableChannelsUpdate() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_enableChannelUpdate() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_enableTimeTrigger() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Tgc_resetChannels() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_setChannelForceUpdate() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Tgc_setChannelsForceUpdate() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_setTimeTrigger() : IfxGtm_Tom.h , IfxGtm_Tom.c

IfxGtm_Tom_Tgc_trigger() : IfxGtm_Tom.c , IfxGtm_Tom.h

IfxGtm_Tom_Tgc_writeGlobalControl() : IfxGtm_Tom.h

IfxGtm_Tom_Timer_acknowledgeTimerIrq() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_acknowledgeTriggerIrq() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_addToChannelMask() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_applyUpdate() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_disableUpdate() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_getFrequency() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_getInputFrequency() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_getOffset() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_getPeriod() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_getPointer() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_getResolution() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_getTrigger() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_getTriggerPointer() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_init() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_initConfig() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_run() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_setFrequency() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_setPeriod() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_setSingleMode() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_setTrigger() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_stdIfTimerInit() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_stop() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_Timer_updateInputFrequency() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h

IfxGtm_Tom_ToutMapP : IfxGtm_PinMap.h

IfxGtm_ToutSel : IfxGtm_PinMap.h

IfxGtm_ToutSel_a : IfxGtm_PinMap.h

IfxGtm_ToutSel_b : IfxGtm_PinMap.h

IfxGtm_ToutSel_c : IfxGtm_PinMap.h

IfxGtm_ToutSel_d : IfxGtm_PinMap.h

IfxGtm_ToutSel_e : IfxGtm_PinMap.h

IfxGtm_Trig_AdcGroup : IfxGtm_Trig.h

IfxGtm_Trig_AdcGroup_0 : IfxGtm_Trig.h

IfxGtm_Trig_AdcGroup_1 : IfxGtm_Trig.h

IfxGtm_Trig_AdcGroup_2 : IfxGtm_Trig.h

IfxGtm_Trig_AdcGroup_3 : IfxGtm_Trig.h

IfxGtm_Trig_AdcGroup_4 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrig : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrig_0 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrig_1 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrig_count : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrig_tableAdc0_1_2 : IfxGtm_Trig.c

IfxGtm_Trig_AdcTrig_tableAdc3_4 : IfxGtm_Trig.c

IfxGtm_Trig_AdcTrigChannel : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_13 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_14 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_15 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_4 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_5 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_6 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_7 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigChannel_count : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_atom0 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_atom1 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_atom2 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_atom3 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_count : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_tom0 : IfxGtm_Trig.h

IfxGtm_Trig_AdcTrigSource_tom1 : IfxGtm_Trig.h

IfxGtm_Trig_DsadcTrig : IfxGtm_Trig.h

IfxGtm_Trig_DsadcTrig_0 : IfxGtm_Trig.h

IfxGtm_Trig_DsadcTrig_1 : IfxGtm_Trig.h

IfxGtm_Trig_DsadcTrigSource : IfxGtm_Trig.h

IfxGtm_Trig_DsadcTrigSource_atomX_4 : IfxGtm_Trig.h

IfxGtm_Trig_DsadcTrigSource_atomX_5 : IfxGtm_Trig.h

IfxGtm_Trig_DsadcTrigSource_atomX_6 : IfxGtm_Trig.h

IfxGtm_Trig_DsadcTrigSource_atomX_7 : IfxGtm_Trig.h

IfxGtm_Trig_DsadcTrigSource_tomX_13 : IfxGtm_Trig.h

IfxGtm_Trig_DsadcTrigSource_tomX_14 : IfxGtm_Trig.h

IfxGtm_Trig_DsadcTrigSource_tomX_6 : IfxGtm_Trig.h

IfxGtm_Trig_DsadcTrigSource_tomX_7 : IfxGtm_Trig.h

IfxGtm_Trig_fromDsadc() : IfxGtm_Trig.c , IfxGtm_Trig.h

IfxGtm_Trig_SentGroup : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_0 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_1 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_2 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_3 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_4 : IfxGtm_Trig.h

IfxGtm_Trig_SentGroup_5 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrig : IfxGtm_Trig.h

IfxGtm_Trig_SentTrig_0 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrig_table : IfxGtm_Trig.c

IfxGtm_Trig_SentTrigChannel : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_13 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_14 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_15 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_4 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_5 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_6 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_7 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigChannel_count : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_atom0 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_atom1 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_atom2 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_atom3 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_count : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_tom0 : IfxGtm_Trig.h

IfxGtm_Trig_SentTrigSource_tom1 : IfxGtm_Trig.h

IfxGtm_Trig_toDsadc() : IfxGtm_Trig.h , IfxGtm_Trig.c

IfxGtm_Trig_toSent() : IfxGtm_Trig.c , IfxGtm_Trig.h

IfxGtm_Trig_toVadc() : IfxGtm_Trig.c , IfxGtm_Trig.h

IfxHssl_cfg_hsctIndexMap : IfxHssl_cfg.c , IfxHssl_cfg.h

IfxHssl_cfg_hsslIndexMap : IfxHssl_cfg.h , IfxHssl_cfg.c

IfxHssl_ChannelId : IfxHssl.h

IfxHssl_ChannelId_0 : IfxHssl.h

IfxHssl_ChannelId_1 : IfxHssl.h

IfxHssl_ChannelId_2 : IfxHssl.h

IfxHssl_ChannelId_3 : IfxHssl.h

IfxHssl_clearHsctInterruptFlag() : IfxHssl.h

IfxHssl_clearHsslChannelErrorInterruptFlag() : IfxHssl.h

IfxHssl_clearHsslGlobalErrorInterruptFlag() : IfxHssl.h

IfxHssl_clearInitialiseModeFlag() : IfxHssl.h

IfxHssl_ClockFrequencyRate : IfxHssl.h

IfxHssl_ClockFrequencyRate_10Mhz : IfxHssl.h

IfxHssl_ClockFrequencyRate_20Mhz : IfxHssl.h

IfxHssl_Command : IfxHssl.h

IfxHssl_Command_noAction : IfxHssl.h

IfxHssl_Command_readFrame : IfxHssl.h

IfxHssl_Command_triggerFrame : IfxHssl.h

IfxHssl_Command_writeFrame : IfxHssl.h

IfxHssl_ControlCommand : IfxHssl.h

IfxHssl_ControlCommand_disableReception : IfxHssl.h

IfxHssl_ControlCommand_enableReception : IfxHssl.h

IfxHssl_ControlCommand_highSpeedClockStart : IfxHssl.h

IfxHssl_ControlCommand_highSpeedClockStop : IfxHssl.h

IfxHssl_ControlCommand_highSpeedReception : IfxHssl.h

IfxHssl_ControlCommand_highSpeedTransmission : IfxHssl.h

IfxHssl_ControlCommand_lowSpeedReception : IfxHssl.h

IfxHssl_ControlCommand_lowSpeedTransmission : IfxHssl.h

IfxHssl_ControlCommand_mediumSpeedReception : IfxHssl.h

IfxHssl_ControlCommand_ping : IfxHssl.h

IfxHssl_ControlCommand_turnOffClockTestMode : IfxHssl.h

IfxHssl_ControlCommand_turnOnClockTestMode : IfxHssl.h

IfxHssl_ControlCommand_turnOnPayloadLoopback : IfxHssl.h

IfxHssl_DataLength : IfxHssl.h

IfxHssl_DataLength_16bit : IfxHssl.h

IfxHssl_DataLength_32bit : IfxHssl.h

IfxHssl_DataLength_8bit : IfxHssl.h

IfxHssl_disableHsctInterruptFlag() : IfxHssl.h

IfxHssl_disableHsctModule() : IfxHssl.c , IfxHssl.h

IfxHssl_disableHsctReceivePath() : IfxHssl.h

IfxHssl_disableHsctTransmitPath() : IfxHssl.h

IfxHssl_disableHsslChannelErrorInterruptFlag() : IfxHssl.h

IfxHssl_disableHsslGlobalErrorInterruptFlag() : IfxHssl.h

IfxHssl_disableHsslModule() : IfxHssl.c , IfxHssl.h

IfxHssl_enableAllErrorFlags() : IfxHssl.h

IfxHssl_enableHsctInterrupt() : IfxHssl.h

IfxHssl_enableHsctInterruptFlag() : IfxHssl.h

IfxHssl_enableHsctModule() : IfxHssl.c , IfxHssl.h

IfxHssl_enableHsctReceivePath() : IfxHssl.h

IfxHssl_enableHsctTransmitPath() : IfxHssl.h

IfxHssl_enableHsslChannelErrorInterruptFlag() : IfxHssl.h

IfxHssl_enableHsslCOKInterrupt() : IfxHssl.h

IfxHssl_enableHsslERRInterrupt() : IfxHssl.h

IfxHssl_enableHsslEXIInterrupt() : IfxHssl.h

IfxHssl_enableHsslGlobalErrorInterruptFlag() : IfxHssl.h

IfxHssl_enableHsslModule() : IfxHssl.c , IfxHssl.h

IfxHssl_enableHsslRDIInterrupt() : IfxHssl.h

IfxHssl_enableHsslTRGInterrupt() : IfxHssl.h

IfxHssl_getAllMflagsStatus() : IfxHssl.h

IfxHssl_getCurrentCount() : IfxHssl.h

IfxHssl_getHsctAddress() : IfxHssl.h , IfxHssl.c

IfxHssl_getHsctIndex() : IfxHssl.c , IfxHssl.h

IfxHssl_getHsctInterruptFlagStatus() : IfxHssl.h

IfxHssl_getHsctSrcPointer() : IfxHssl.c , IfxHssl.h

IfxHssl_getHsctUnsolicitedStatusMessage() : IfxHssl.h

IfxHssl_getHsslAddress() : IfxHssl.h , IfxHssl.c

IfxHssl_getHsslChannelErrorInterruptFlagStatus() : IfxHssl.h

IfxHssl_getHsslCOKSrcPointer() : IfxHssl.c , IfxHssl.h

IfxHssl_getHsslERRSrcPointer() : IfxHssl.c , IfxHssl.h

IfxHssl_getHsslEXISrcPointer() : IfxHssl.c , IfxHssl.h

IfxHssl_getHsslGloabalErrorInterruptFlagStatus() : IfxHssl.h

IfxHssl_getHsslIndex() : IfxHssl.c , IfxHssl.h

IfxHssl_getHsslRDISrcPointer() : IfxHssl.h , IfxHssl.c

IfxHssl_getHsslTRGSrcPointer() : IfxHssl.c , IfxHssl.h

IfxHssl_getInitialiseModeFlagStatus() : IfxHssl.h

IfxHssl_getReloadCount() : IfxHssl.h

IfxHssl_Hsct_InterruptSource : IfxHssl.h

IfxHssl_Hsct_InterruptSource_commandError : IfxHssl.h

IfxHssl_Hsct_InterruptSource_headerError : IfxHssl.h

IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend : IfxHssl.h

IfxHssl_Hsct_InterruptSource_payloadError : IfxHssl.h

IfxHssl_Hsct_InterruptSource_pingAnswerReceived : IfxHssl.h

IfxHssl_Hsct_InterruptSource_pllLockLosterror : IfxHssl.h

IfxHssl_Hsct_InterruptSource_speedModeSwitchError : IfxHssl.h

IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow : IfxHssl.h

IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow : IfxHssl.h

IfxHssl_Hsct_InterruptSource_txTransferError : IfxHssl.h

IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived : IfxHssl.h

IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished : IfxHssl.h

IfxHssl_Hsct_SleepMode : IfxHssl.h

IfxHssl_Hsct_SleepMode_disable : IfxHssl.h

IfxHssl_Hsct_SleepMode_enable : IfxHssl.h

IfxHssl_hsctIndex : IfxHssl_cfg.h

IfxHssl_hsctIndex_0 : IfxHssl_cfg.h

IfxHssl_hsctIndex_none : IfxHssl_cfg.h

IfxHssl_Hssl_checkErrors() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_clearErrorFlags() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_delay() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_ERRInterruptSource : IfxHssl.h

IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError : IfxHssl.h

IfxHssl_Hssl_ERRInterruptSource_timeoutError : IfxHssl.h

IfxHssl_Hssl_ERRInterruptSource_transactionTagError : IfxHssl.h

IfxHssl_Hssl_ERRInterruptSource_unexpectedError : IfxHssl.h

IfxHssl_Hssl_EXIInterruptSource : IfxHssl.h

IfxHssl_Hssl_EXIInterruptSource_busAccessError : IfxHssl.h

IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError : IfxHssl.h

IfxHssl_Hssl_EXIInterruptSource_crcError : IfxHssl.h

IfxHssl_Hssl_EXIInterruptSource_dataLengthError : IfxHssl.h

IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation : IfxHssl.h

IfxHssl_Hssl_FrameRequest : IfxHssl_Hssl.h

IfxHssl_Hssl_FrameRequest_noAction : IfxHssl_Hssl.h

IfxHssl_Hssl_FrameRequest_readFrame : IfxHssl_Hssl.h

IfxHssl_Hssl_FrameRequest_readId : IfxHssl_Hssl.h

IfxHssl_Hssl_FrameRequest_triggerFrame : IfxHssl_Hssl.h

IfxHssl_Hssl_FrameRequest_writeFrame : IfxHssl_Hssl.h

IfxHssl_Hssl_getReadData() : IfxHssl_Hssl.h

IfxHssl_Hssl_initChannel() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_initChannelConfig() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_initHsctModule() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_initHsctModuleConfig() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_initHsslModule() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_initHsslModuleConfig() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_prepareStream() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_read() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_sendControlCommand() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_singleFrameRequest() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_SleepMode : IfxHssl.h

IfxHssl_Hssl_SleepMode_disable : IfxHssl.h

IfxHssl_Hssl_SleepMode_enable : IfxHssl.h

IfxHssl_Hssl_Status : IfxHssl_Hssl.h

IfxHssl_Hssl_Status_busy : IfxHssl_Hssl.h

IfxHssl_Hssl_Status_error : IfxHssl_Hssl.h

IfxHssl_Hssl_Status_ok : IfxHssl_Hssl.h

IfxHssl_Hssl_waitAcknowledge() : IfxHssl_Hssl.h , IfxHssl_Hssl.c

IfxHssl_Hssl_write() : IfxHssl_Hssl.c , IfxHssl_Hssl.h

IfxHssl_Hssl_writeStream() : IfxHssl_Hssl.h , IfxHssl_Hssl.c

IfxHssl_hsslIndex : IfxHssl_cfg.h

IfxHssl_hsslIndex_0 : IfxHssl_cfg.h

IfxHssl_hsslIndex_none : IfxHssl_cfg.h

IfxHssl_InterfaceMode : IfxHssl.h

IfxHssl_InterfaceMode_master : IfxHssl.h

IfxHssl_InterfaceMode_slave : IfxHssl.h

IfxHssl_isModuleSuspended() : IfxHssl.h

IFXHSSL_JTAG_ID_ADDRESS : IfxHssl_cfg.h

IfxHssl_MasterModeRxSpeed : IfxHssl.h

IfxHssl_MasterModeRxSpeed_highSpeed : IfxHssl.h

IfxHssl_MasterModeRxSpeed_lowSpeed : IfxHssl.h

IfxHssl_MasterModeRxSpeed_mediumSpeed : IfxHssl.h

IfxHssl_MasterModeTxSpeed : IfxHssl.h

IfxHssl_MasterModeTxSpeed_highSpeed : IfxHssl.h

IfxHssl_MasterModeTxSpeed_lowSpeed : IfxHssl.h

IFXHSSL_NUM_CHANNELS : IfxHssl_cfg.h

IFXHSSL_NUM_MODULES : IfxHssl_cfg.h

IfxHssl_PllReferenceClock : IfxHssl.h

IfxHssl_PllReferenceClock_hsctSystemClockInput : IfxHssl.h

IfxHssl_PllReferenceClock_oscillatorInput : IfxHssl.h

IfxHssl_resetHsctKernel() : IfxHssl.c , IfxHssl.h

IfxHssl_resetHsslKernel() : IfxHssl.c , IfxHssl.h

IfxHssl_sendHsctUnsolicitedStatusMessage() : IfxHssl.h

IfxHssl_setHsctRxLinkSpeed() : IfxHssl.h

IfxHssl_setHsctSleepMode() : IfxHssl.h

IfxHssl_setHsctTxLinkSpeed() : IfxHssl.h

IfxHssl_setHsslSleepMode() : IfxHssl.h

IfxHssl_setInitialiseModeFlag() : IfxHssl.h

IfxHssl_setReloadCount() : IfxHssl.h

IfxHssl_setSuspendMode() : IfxHssl.h

IfxHssl_setTimeoutReloadValue() : IfxHssl.h

IfxHssl_StreamingMode : IfxHssl.h

IfxHssl_StreamingMode_continuous : IfxHssl.h

IfxHssl_StreamingMode_single : IfxHssl.h

IfxHssl_SuspendMode : IfxHssl.h

IfxHssl_SuspendMode_hard : IfxHssl.h

IfxHssl_SuspendMode_none : IfxHssl.h

IfxHssl_SuspendMode_soft : IfxHssl.h

IfxI2c0_SCL_P02_5_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h

IfxI2c0_SCL_P13_1_INOUT : IfxI2c_PinMap.h , IfxI2c_PinMap.c

IfxI2c0_SCL_P15_4_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h

IfxI2c0_SDA_P02_4_INOUT : IfxI2c_PinMap.h , IfxI2c_PinMap.c

IfxI2c0_SDA_P13_2_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h

IfxI2c0_SDA_P15_5_INOUT : IfxI2c_PinMap.h , IfxI2c_PinMap.c

IfxI2c_busIsFree() : IfxI2c.h

IfxI2c_BusStatus : IfxI2c.h

IfxI2c_BusStatus_busyMaster : IfxI2c.h

IfxI2c_BusStatus_idle : IfxI2c.h

IfxI2c_BusStatus_remoteSlave : IfxI2c.h

IfxI2c_BusStatus_started : IfxI2c.h

IfxI2c_cfg_indexMap : IfxI2c_cfg.h , IfxI2c_cfg.c

IfxI2c_clearAllDtrInterruptSources() : IfxI2c.h

IfxI2c_clearAllErrorInterruptSources() : IfxI2c.h

IfxI2c_clearAllProtocolInterruptSources() : IfxI2c.h

IfxI2c_clearBurstRequestInterruptSource() : IfxI2c.h

IfxI2c_clearErrorInterruptSource() : IfxI2c.h

IfxI2c_clearLastBurstRequestInterruptSource() : IfxI2c.h

IfxI2c_clearLastSingleRequestInterruptSource() : IfxI2c.h

IfxI2c_clearProtocolInterruptSource() : IfxI2c.h

IfxI2c_clearSingleRequestInterruptSource() : IfxI2c.h

IfxI2c_configureAsMaster() : IfxI2c.c , IfxI2c.h

IfxI2c_disableBurstRequestInterruptSource() : IfxI2c.h

IfxI2c_disableErrorInterruptFlag() : IfxI2c.h

IfxI2c_disableErrorInterruptSource() : IfxI2c.h

IfxI2c_disableLastBurstRequestInterruptSource() : IfxI2c.h

IfxI2c_disableLastSingleRequestInterruptSource() : IfxI2c.h

IfxI2c_disableModule() : IfxI2c.c , IfxI2c.h

IfxI2c_disableProtocolInterruptFlag() : IfxI2c.h

IfxI2c_disableProtocolInterruptSource() : IfxI2c.h

IfxI2c_disableSingleRequestInterruptSource() : IfxI2c.h

IfxI2c_enableBurstDataTransferInterrupt() : IfxI2c.c , IfxI2c.h

IfxI2c_enableBurstRequestInterruptSource() : IfxI2c.h

IfxI2c_enableErrorInterrupt() : IfxI2c.c , IfxI2c.h

IfxI2c_enableErrorInterruptFlag() : IfxI2c.h

IfxI2c_enableErrorInterruptSource() : IfxI2c.h

IfxI2c_enableLastBurstDataTransferInterrupt() : IfxI2c.c , IfxI2c.h

IfxI2c_enableLastBurstRequestInterruptSource() : IfxI2c.h

IfxI2c_enableLastSingleDataTransferInterrupt() : IfxI2c.c , IfxI2c.h

IfxI2c_enableLastSingleRequestInterruptSource() : IfxI2c.h

IfxI2c_enableModule() : IfxI2c.h , IfxI2c.c

IfxI2c_enableProtocolInterrupt() : IfxI2c.c , IfxI2c.h

IfxI2c_enableProtocolInterruptFlag() : IfxI2c.h

IfxI2c_enableProtocolInterruptSource() : IfxI2c.h

IfxI2c_enableSingleDataTransferInterrupt() : IfxI2c.c , IfxI2c.h

IfxI2c_enableSingleRequestInterruptSource() : IfxI2c.h

IfxI2c_ErrorInterruptSource : IfxI2c.h

IfxI2c_ErrorInterruptSource_rxFifoOverflow : IfxI2c.h

IfxI2c_ErrorInterruptSource_rxFifoUnderflow : IfxI2c.h

IfxI2c_ErrorInterruptSource_txFifoOverflow : IfxI2c.h

IfxI2c_ErrorInterruptSource_txFifoUnderflow : IfxI2c.h

IfxI2c_getAddress() : IfxI2c.c , IfxI2c.h

IfxI2c_getBaudrate() : IfxI2c.h , IfxI2c.c

IfxI2c_getBurstDataTransferSrcPointer() : IfxI2c.h

IfxI2c_getBurstRequestInterruptSourceStatus() : IfxI2c.h

IfxI2c_getBusStatus() : IfxI2c.h

IfxI2c_getErrorInterruptFlagStatus() : IfxI2c.h

IfxI2c_getErrorInterruptSourceStatus() : IfxI2c.h

IfxI2c_getErrorSrcPointer() : IfxI2c.h

IfxI2c_getIndex() : IfxI2c.c , IfxI2c.h

IfxI2c_getLastBurstDataTransferSrcPointer() : IfxI2c.h

IfxI2c_getLastBurstRequestInterruptSourceStatus() : IfxI2c.h

IfxI2c_getLastSingleDataTransferSrcPointer() : IfxI2c.h

IfxI2c_getLastSingleRequestInterruptSourceStatus() : IfxI2c.h

IfxI2c_getProtocolInterruptFlagStatus() : IfxI2c.h

IfxI2c_getProtocolInterruptSourceStatus() : IfxI2c.h

IfxI2c_getProtocolSrcPointer() : IfxI2c.h

IfxI2c_getSingleDataTransferSrcPointer() : IfxI2c.h

IfxI2c_getSingleRequestInterruptSourceStatus() : IfxI2c.h

IfxI2c_I2c_initConfig() : IfxI2c_I2c.c , IfxI2c_I2c.h

IfxI2c_I2c_initDevice() : IfxI2c_I2c.c , IfxI2c_I2c.h

IfxI2c_I2c_initDeviceConfig() : IfxI2c_I2c.c , IfxI2c_I2c.h

IfxI2c_I2c_initModule() : IfxI2c_I2c.c , IfxI2c_I2c.h

IfxI2c_I2c_read() : IfxI2c_I2c.c , IfxI2c_I2c.h

IfxI2c_I2c_Status : IfxI2c_I2c.h

IfxI2c_I2c_Status_al : IfxI2c_I2c.h

IfxI2c_I2c_Status_busNotFree : IfxI2c_I2c.h

IfxI2c_I2c_Status_error : IfxI2c_I2c.h

IfxI2c_I2c_Status_nak : IfxI2c_I2c.h

IfxI2c_I2c_Status_ok : IfxI2c_I2c.h

IfxI2c_I2c_write() : IfxI2c_I2c.c , IfxI2c_I2c.h

IfxI2c_Index : IfxI2c_cfg.h

IfxI2c_Index_0 : IfxI2c_cfg.h

IfxI2c_Index_none : IfxI2c_cfg.h

IfxI2c_initSclSdaPin() : IfxI2c.c , IfxI2c.h

IfxI2c_isFifoRequest() : IfxI2c.h

IFXI2C_NUM_MODULES : IfxI2c_cfg.h

IFXI2C_PINMAP_NUM_MODULES : IfxI2c_PinMap.h

IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS : IfxI2c_PinMap.h

IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS : IfxI2c_PinMap.h

IfxI2c_PinSelect : IfxI2c.h

IfxI2c_PinSelect_a : IfxI2c.h

IfxI2c_PinSelect_b : IfxI2c.h

IfxI2c_PinSelect_c : IfxI2c.h

IfxI2c_PinSelect_d : IfxI2c.h

IfxI2c_PinSelect_e : IfxI2c.h

IfxI2c_PinSelect_f : IfxI2c.h

IfxI2c_PinSelect_g : IfxI2c.h

IfxI2c_PinSelect_h : IfxI2c.h

IfxI2c_ProtocolInterruptSource : IfxI2c.h

IfxI2c_ProtocolInterruptSource_addressMatch : IfxI2c.h

IfxI2c_ProtocolInterruptSource_arbitrationLost : IfxI2c.h

IfxI2c_ProtocolInterruptSource_generalCall : IfxI2c.h

IfxI2c_ProtocolInterruptSource_masterCode : IfxI2c.h

IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived : IfxI2c.h

IfxI2c_ProtocolInterruptSource_receiveMode : IfxI2c.h

IfxI2c_ProtocolInterruptSource_transmissionEnd : IfxI2c.h

IfxI2c_releaseBus() : IfxI2c.h , IfxI2c.c

IfxI2c_resetFifo() : IfxI2c.c , IfxI2c.h

IfxI2c_resetModule() : IfxI2c.h , IfxI2c.c

IfxI2c_run() : IfxI2c.h

IfxI2c_Scl_InOut_pinTable : IfxI2c_PinMap.c , IfxI2c_PinMap.h

IfxI2c_Sda_InOut_pinTable : IfxI2c_PinMap.c , IfxI2c_PinMap.h

IfxI2c_setBaudrate() : IfxI2c.c , IfxI2c.h

IfxI2c_setPinSelection() : IfxI2c.h

IfxI2c_setReceivePacketSize() : IfxI2c.h

IfxI2c_setSlaveDeviceAddress() : IfxI2c.h

IfxI2c_setSleepMode() : IfxI2c.h

IfxI2c_setTransmitPacketSize() : IfxI2c.h

IfxI2c_SleepMode : IfxI2c.h

IfxI2c_SleepMode_disable : IfxI2c.h

IfxI2c_SleepMode_enable : IfxI2c.h

IfxI2c_stop() : IfxI2c.h

IfxI2c_waitBusFree() : IfxI2c.h

IfxI2c_writeFifo() : IfxI2c.h

IfxIom_disableModule() : IfxIom.h

IfxIom_Driver_clearAllGlitch() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_clearHistory() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_clearLamMonGlitch() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_clearLamRefGlitch() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_disableEvents() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_disableLamEvent() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_enableLamEvent() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_getHistory() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_init() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_initConfig() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_initLam() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_initLamConfig() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_isLamMonGlitch() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_Driver_isLamRefGlitch() : IfxIom_Driver.c , IfxIom_Driver.h

IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX : IfxIom_Driver.c

IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL : IfxIom_Driver.c

IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX : IfxIom_Driver.c

IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL : IfxIom_Driver.c

IfxIom_Driver_restoreEvents() : IfxIom_Driver.c , IfxIom_Driver.h

IfxIom_enableModule() : IfxIom.h

IfxIom_getFrequency() : IfxIom.h , IfxIom.c

IfxIom_LamEventSource : IfxIom.h

IfxIom_LamEventSource_mon : IfxIom.h

IfxIom_LamEventSource_monXorRef : IfxIom.h

IfxIom_LamEventTrigger : IfxIom.h

IfxIom_LamEventTrigger_anyEdge : IfxIom.h

IfxIom_LamEventTrigger_fallingEdge : IfxIom.h

IfxIom_LamEventTrigger_none : IfxIom.h

IfxIom_LamEventTrigger_risingEdge : IfxIom.h

IfxIom_LamEventWindowClearEvent : IfxIom.h

IfxIom_LamEventWindowClearEvent_anyEdge : IfxIom.h

IfxIom_LamEventWindowClearEvent_fallingEdge : IfxIom.h

IfxIom_LamEventWindowClearEvent_none : IfxIom.h

IfxIom_LamEventWindowClearEvent_risingEdge : IfxIom.h

IfxIom_LamEventWindowControlSource : IfxIom.h

IfxIom_LamEventWindowControlSource_mon : IfxIom.h

IfxIom_LamEventWindowControlSource_ref : IfxIom.h

IfxIom_LamEventWindowRunControl : IfxIom.h

IfxIom_LamEventWindowRunControl_freeRunning : IfxIom.h

IfxIom_LamEventWindowRunControl_gated : IfxIom.h

IfxIom_LamFilterMode : IfxIom.h

IfxIom_LamFilterMode_delayDebounceBothEdge : IfxIom.h

IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge : IfxIom.h

IfxIom_LamFilterMode_immediateDebounceBothEdge : IfxIom.h

IfxIom_LamFilterMode_immediateDebounceFallingEdge : IfxIom.h

IfxIom_LamFilterMode_immediateDebounceRisingEdge : IfxIom.h

IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge : IfxIom.h

IfxIom_LamFilterMode_noFilter : IfxIom.h

IfxIom_LamFilterMode_prescalerOnFallingEdge : IfxIom.h

IfxIom_LamFilterMode_prescalerOnRisingEdge : IfxIom.h

IfxIom_LamId : IfxIom.h

IfxIom_LamId_0 : IfxIom.h

IfxIom_LamId_1 : IfxIom.h

IfxIom_LamId_10 : IfxIom.h

IfxIom_LamId_11 : IfxIom.h

IfxIom_LamId_12 : IfxIom.h

IfxIom_LamId_13 : IfxIom.h

IfxIom_LamId_14 : IfxIom.h

IfxIom_LamId_15 : IfxIom.h

IfxIom_LamId_2 : IfxIom.h

IfxIom_LamId_3 : IfxIom.h

IfxIom_LamId_4 : IfxIom.h

IfxIom_LamId_5 : IfxIom.h

IfxIom_LamId_6 : IfxIom.h

IfxIom_LamId_7 : IfxIom.h

IfxIom_LamId_8 : IfxIom.h

IfxIom_LamId_9 : IfxIom.h

IfxIom_MonInput : IfxIom_cfg.h

IfxIom_MonInput_asclin0Atx : IfxIom_cfg.h

IfxIom_MonInput_asclin1Atx : IfxIom_cfg.h

IfxIom_MonInput_asclin2Atx : IfxIom_cfg.h

IfxIom_MonInput_asclin3Atx : IfxIom_cfg.h

IfxIom_MonInput_canNode0Txd : IfxIom_cfg.h

IfxIom_MonInput_canNode1Txd : IfxIom_cfg.h

IfxIom_MonInput_canNode2Txd : IfxIom_cfg.h

IfxIom_MonInput_canNode3Txd : IfxIom_cfg.h

IfxIom_MonInput_ccu60Cc60 : IfxIom_cfg.h

IfxIom_MonInput_ccu60Cc61 : IfxIom_cfg.h

IfxIom_MonInput_ccu60Cc62 : IfxIom_cfg.h

IfxIom_MonInput_ccu60Cout60 : IfxIom_cfg.h

IfxIom_MonInput_ccu60Cout61 : IfxIom_cfg.h

IfxIom_MonInput_ccu60Cout62 : IfxIom_cfg.h

IfxIom_MonInput_ccu60Cout63 : IfxIom_cfg.h

IfxIom_MonInput_ccu61Cc60 : IfxIom_cfg.h

IfxIom_MonInput_ccu61Cc61 : IfxIom_cfg.h

IfxIom_MonInput_ccu61Cc62 : IfxIom_cfg.h

IfxIom_MonInput_ccu61Cout60 : IfxIom_cfg.h

IfxIom_MonInput_ccu61Cout61 : IfxIom_cfg.h

IfxIom_MonInput_ccu61Cout62 : IfxIom_cfg.h

IfxIom_MonInput_ccu61Cout63 : IfxIom_cfg.h

IfxIom_MonInput_gnd : IfxIom_cfg.h

IfxIom_MonInput_gtmTout104 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout105 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout106 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout22 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout23 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout24 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout25 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout26 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout27 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout28 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout29 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout30 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout31 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout32 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout33 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout34 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout68 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout69 : IfxIom_cfg.h

IfxIom_MonInput_gtmTout70 : IfxIom_cfg.h

IfxIom_MonInput_p20_12 : IfxIom_cfg.h

IfxIom_MonInput_p20_13 : IfxIom_cfg.h

IfxIom_MonInput_p20_14 : IfxIom_cfg.h

IfxIom_MonInput_p33_0 : IfxIom_cfg.h

IfxIom_MonInput_p33_1 : IfxIom_cfg.h

IfxIom_MonInput_p33_10 : IfxIom_cfg.h

IfxIom_MonInput_p33_11 : IfxIom_cfg.h

IfxIom_MonInput_p33_12 : IfxIom_cfg.h

IfxIom_MonInput_p33_2 : IfxIom_cfg.h

IfxIom_MonInput_p33_3 : IfxIom_cfg.h

IfxIom_MonInput_p33_4 : IfxIom_cfg.h

IfxIom_MonInput_p33_5 : IfxIom_cfg.h

IfxIom_MonInput_p33_6 : IfxIom_cfg.h

IfxIom_MonInput_p33_7 : IfxIom_cfg.h

IfxIom_MonInput_p33_8 : IfxIom_cfg.h

IfxIom_MonInput_p33_9 : IfxIom_cfg.h

IfxIom_MonInput_psi5Psitx0 : IfxIom_cfg.h

IfxIom_MonInput_psi5Psitx1 : IfxIom_cfg.h

IfxIom_MonInput_qspi0Mrst : IfxIom_cfg.h

IfxIom_MonInput_qspi1Mrst : IfxIom_cfg.h

IfxIom_MonInput_qspi2Mrst : IfxIom_cfg.h

IfxIom_MonInput_qspi3Mrst : IfxIom_cfg.h

IfxIom_MonInputSignal : IfxIom_cfg.h

IfxIom_MonInputSignal_0 : IfxIom_cfg.h

IfxIom_MonInputSignal_1 : IfxIom_cfg.h

IfxIom_MonInputSignal_2 : IfxIom_cfg.h

IfxIom_MonInputSignal_p : IfxIom_cfg.h

IFXIOM_NUM_CHANNELS : IfxIom_cfg.h

IfxIom_RefInput : IfxIom_cfg.h

IfxIom_RefInput_asclin0Atx : IfxIom_cfg.h

IfxIom_RefInput_asclin1Atx : IfxIom_cfg.h

IfxIom_RefInput_asclin2Atx : IfxIom_cfg.h

IfxIom_RefInput_asclin3Atx : IfxIom_cfg.h

IfxIom_RefInput_canNode0Txd : IfxIom_cfg.h

IfxIom_RefInput_canNode1Txd : IfxIom_cfg.h

IfxIom_RefInput_canNode2Txd : IfxIom_cfg.h

IfxIom_RefInput_canNode3Txd : IfxIom_cfg.h

IfxIom_RefInput_ccu60Cc60 : IfxIom_cfg.h

IfxIom_RefInput_ccu60Cc61 : IfxIom_cfg.h

IfxIom_RefInput_ccu60Cc62 : IfxIom_cfg.h

IfxIom_RefInput_ccu60Cout60 : IfxIom_cfg.h

IfxIom_RefInput_ccu60Cout61 : IfxIom_cfg.h

IfxIom_RefInput_ccu60Cout62 : IfxIom_cfg.h

IfxIom_RefInput_ccu60Cout63 : IfxIom_cfg.h

IfxIom_RefInput_ccu61Cc60 : IfxIom_cfg.h

IfxIom_RefInput_ccu61Cc61 : IfxIom_cfg.h

IfxIom_RefInput_ccu61Cc62 : IfxIom_cfg.h

IfxIom_RefInput_ccu61Cout60 : IfxIom_cfg.h

IfxIom_RefInput_ccu61Cout61 : IfxIom_cfg.h

IfxIom_RefInput_ccu61Cout62 : IfxIom_cfg.h

IfxIom_RefInput_ccu61Cout63 : IfxIom_cfg.h

IfxIom_RefInput_exorCombiner : IfxIom_cfg.h

IfxIom_RefInput_gnd : IfxIom_cfg.h

IfxIom_RefInput_gtmTout0 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout1 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout10 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout107 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout108 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout109 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout11 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout12 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout13 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout14 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout15 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout2 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout3 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout4 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout5 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout6 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout7 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout8 : IfxIom_cfg.h

IfxIom_RefInput_gtmTout9 : IfxIom_cfg.h

IfxIom_RefInput_p20_12 : IfxIom_cfg.h

IfxIom_RefInput_p20_13 : IfxIom_cfg.h

IfxIom_RefInput_p20_14 : IfxIom_cfg.h

IfxIom_RefInput_p33_0 : IfxIom_cfg.h

IfxIom_RefInput_p33_1 : IfxIom_cfg.h

IfxIom_RefInput_p33_10 : IfxIom_cfg.h

IfxIom_RefInput_p33_11 : IfxIom_cfg.h

IfxIom_RefInput_p33_12 : IfxIom_cfg.h

IfxIom_RefInput_p33_2 : IfxIom_cfg.h

IfxIom_RefInput_p33_3 : IfxIom_cfg.h

IfxIom_RefInput_p33_4 : IfxIom_cfg.h

IfxIom_RefInput_p33_5 : IfxIom_cfg.h

IfxIom_RefInput_p33_6 : IfxIom_cfg.h

IfxIom_RefInput_p33_7 : IfxIom_cfg.h

IfxIom_RefInput_p33_8 : IfxIom_cfg.h

IfxIom_RefInput_p33_9 : IfxIom_cfg.h

IfxIom_RefInput_psi5Psitx0 : IfxIom_cfg.h

IfxIom_RefInput_psi5Psitx2 : IfxIom_cfg.h

IfxIom_RefInput_qspi0Mrst : IfxIom_cfg.h

IfxIom_RefInput_qspi1Mrst : IfxIom_cfg.h

IfxIom_RefInput_qspi2Mrst : IfxIom_cfg.h

IfxIom_RefInput_qspi3Mrst : IfxIom_cfg.h

IfxIom_RefInputSignal : IfxIom_cfg.h

IfxIom_RefInputSignal_0 : IfxIom_cfg.h

IfxIom_RefInputSignal_1 : IfxIom_cfg.h

IfxIom_RefInputSignal_2 : IfxIom_cfg.h

IfxIom_RefInputSignal_p : IfxIom_cfg.h

IfxIom_RefInputSignal_xorCombiner : IfxIom_cfg.h

IfxIom_resetModule() : IfxIom.c , IfxIom.h

IfxIom_setSleepMode() : IfxIom.h

IfxIom_SleepMode : IfxIom.h

IfxIom_SleepMode_disable : IfxIom.h

IfxIom_SleepMode_enable : IfxIom.h

IfxMsc0_EN0_P10_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_EN0_P10_3_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_EN0_P10_4_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_EN0_P11_11_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_EN0_P14_10_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_EN0_P15_5_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_EN1_P10_1_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_EN1_P11_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_EN1_P13_0_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_EN1_P14_9_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_EN1_P15_3_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_END2_P10_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_END2_P10_3_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_END2_P10_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_END2_P11_11_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_END2_P14_10_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_END2_P15_5_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_END3_P10_1_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_END3_P11_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_END3_P13_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_END3_P14_9_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_END3_P15_3_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_FCLN_P13_0_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_FCLND_P13_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_FCLP_P11_6_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_FCLP_P13_1_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_FCLP_P13_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_INJ0_P00_0_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_INJ1_P10_5_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_SDI0_P11_10_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_SDI1_P10_2_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_SDI2_P14_3_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_SDI3_P11_3_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_SON_P13_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_SOND_P13_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc0_SOP_P11_9_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc0_SOP_P13_3_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc1_EN0_P23_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc1_EN0_P32_4_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc1_EN1_P23_5_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc1_END2_P23_4_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc1_END2_P32_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc1_END3_P23_5_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc1_FCLN_P22_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc1_FCLND_P22_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc1_FCLP_P22_1_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc1_INJ0_P23_3_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc1_INJ1_P33_13_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc1_SDI0_P23_1_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc1_SDI1_P02_3_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc1_SDI2_P32_4_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc1_SON_P22_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc1_SOND_P22_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc1_SOP_P22_3_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc_ActivePhaseSelection : IfxMsc.h

IfxMsc_ActivePhaseSelection_lowLevel : IfxMsc.h

IfxMsc_ActivePhaseSelection_none : IfxMsc.h

IfxMsc_AsynchronousBlock : IfxMsc.h

IfxMsc_AsynchronousBlock_bypassed : IfxMsc.h

IfxMsc_AsynchronousBlock_noBypassed : IfxMsc.h

IfxMsc_cfg_indexMap : IfxMsc_cfg.c , IfxMsc_cfg.h

IfxMsc_ChipSelectActiveState : IfxMsc.h

IfxMsc_ChipSelectActiveState_high : IfxMsc.h

IfxMsc_ChipSelectActiveState_low : IfxMsc.h

IfxMsc_clearAbraOverflowFlag() : IfxMsc.h

IfxMsc_clearAbraUnderflowFlag() : IfxMsc.h

IfxMsc_clearDataFrameInterruptFlag() : IfxMsc.c , IfxMsc.h

IfxMsc_clearRecieveDataInterruptFlag() : IfxMsc.h

IfxMsc_clearReset() : IfxMsc.h , IfxMsc.c

IfxMsc_clearUpstreamTimeout() : IfxMsc.h

IfxMsc_clearUpstreamValidFlag() : IfxMsc.h

IfxMsc_clearValidbit() : IfxMsc.h

IfxMsc_ClockSelect : IfxMsc.h

IfxMsc_ClockSelect_feray : IfxMsc.h

IfxMsc_ClockSelect_fspb : IfxMsc.h

IfxMsc_ClockSelect_fsri : IfxMsc.h

IfxMsc_ClockSelect_noClock : IfxMsc.h

IfxMsc_CommandDataCommandRepetitionMode : IfxMsc.h

IfxMsc_CommandDataCommandRepetitionMode_disabled : IfxMsc.h

IfxMsc_CommandDataCommandRepetitionMode_enabled : IfxMsc.h

IfxMsc_CommandFrameInterrupt : IfxMsc.h

IfxMsc_CommandFrameInterrupt_disabled : IfxMsc.h

IfxMsc_CommandFrameInterrupt_enabled : IfxMsc.h

IfxMsc_CommandFrameInterruptNode : IfxMsc.h

IfxMsc_CommandFrameInterruptNode_SR0 : IfxMsc.h

IfxMsc_CommandFrameInterruptNode_SR1 : IfxMsc.h

IfxMsc_CommandFrameInterruptNode_SR2 : IfxMsc.h

IfxMsc_CommandFrameInterruptNode_SR3 : IfxMsc.h

IfxMsc_CommandFrameLength : IfxMsc.h

IfxMsc_CommandFrameLength_0 : IfxMsc.h

IfxMsc_CommandFrameLength_1 : IfxMsc.h

IfxMsc_CommandFrameLength_10 : IfxMsc.h

IfxMsc_CommandFrameLength_11 : IfxMsc.h

IfxMsc_CommandFrameLength_12 : IfxMsc.h

IfxMsc_CommandFrameLength_13 : IfxMsc.h

IfxMsc_CommandFrameLength_14 : IfxMsc.h

IfxMsc_CommandFrameLength_15 : IfxMsc.h

IfxMsc_CommandFrameLength_16 : IfxMsc.h

IfxMsc_CommandFrameLength_17 : IfxMsc.h

IfxMsc_CommandFrameLength_18 : IfxMsc.h

IfxMsc_CommandFrameLength_19 : IfxMsc.h

IfxMsc_CommandFrameLength_2 : IfxMsc.h

IfxMsc_CommandFrameLength_20 : IfxMsc.h

IfxMsc_CommandFrameLength_21 : IfxMsc.h

IfxMsc_CommandFrameLength_22 : IfxMsc.h

IfxMsc_CommandFrameLength_23 : IfxMsc.h

IfxMsc_CommandFrameLength_24 : IfxMsc.h

IfxMsc_CommandFrameLength_25 : IfxMsc.h

IfxMsc_CommandFrameLength_26 : IfxMsc.h

IfxMsc_CommandFrameLength_27 : IfxMsc.h

IfxMsc_CommandFrameLength_28 : IfxMsc.h

IfxMsc_CommandFrameLength_29 : IfxMsc.h

IfxMsc_CommandFrameLength_3 : IfxMsc.h

IfxMsc_CommandFrameLength_30 : IfxMsc.h

IfxMsc_CommandFrameLength_31 : IfxMsc.h

IfxMsc_CommandFrameLength_32 : IfxMsc.h

IfxMsc_CommandFrameLength_4 : IfxMsc.h

IfxMsc_CommandFrameLength_5 : IfxMsc.h

IfxMsc_CommandFrameLength_6 : IfxMsc.h

IfxMsc_CommandFrameLength_7 : IfxMsc.h

IfxMsc_CommandFrameLength_8 : IfxMsc.h

IfxMsc_CommandFrameLength_9 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_0 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_1 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_10 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_100 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_101 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_102 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_103 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_104 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_105 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_106 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_107 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_108 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_109 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_11 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_110 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_111 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_112 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_113 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_114 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_115 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_116 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_117 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_118 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_119 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_12 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_120 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_121 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_122 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_123 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_124 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_125 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_126 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_127 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_13 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_14 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_15 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_16 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_17 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_18 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_19 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_2 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_20 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_21 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_22 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_23 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_24 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_25 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_26 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_27 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_28 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_29 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_3 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_30 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_31 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_32 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_33 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_34 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_35 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_36 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_37 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_38 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_39 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_4 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_40 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_41 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_42 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_43 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_44 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_45 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_46 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_47 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_48 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_49 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_5 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_50 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_51 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_52 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_53 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_54 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_55 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_56 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_57 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_58 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_59 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_6 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_60 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_61 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_62 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_63 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_64 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_65 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_66 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_67 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_68 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_69 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_7 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_70 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_71 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_72 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_73 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_74 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_75 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_76 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_77 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_78 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_79 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_8 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_80 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_81 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_82 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_83 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_84 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_85 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_86 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_87 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_88 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_89 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_9 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_90 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_91 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_92 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_93 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_94 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_95 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_96 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_97 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_98 : IfxMsc.h

IfxMsc_ControlFrameExtensionPassivePhaseLength_99 : IfxMsc.h

IfxMsc_DataFrameExtensionPassivePhaseLength : IfxMsc.h

IfxMsc_DataFrameExtensionPassivePhaseLength_0 : IfxMsc.h

IfxMsc_DataFrameExtensionPassivePhaseLength_1 : IfxMsc.h

IfxMsc_DataFrameExtensionPassivePhaseLength_2 : IfxMsc.h

IfxMsc_DataFrameExtensionPassivePhaseLength_3 : IfxMsc.h

IfxMsc_DataFrameInterrupt : IfxMsc.h

IfxMsc_DataFrameInterrupt_atFirstDataBit : IfxMsc.h

IfxMsc_DataFrameInterrupt_atLastDataBit : IfxMsc.h

IfxMsc_DataFrameInterrupt_disabled : IfxMsc.h

IfxMsc_DataFrameInterruptNode : IfxMsc.h

IfxMsc_DataFrameInterruptNode_SR0 : IfxMsc.h

IfxMsc_DataFrameInterruptNode_SR1 : IfxMsc.h

IfxMsc_DataFrameInterruptNode_SR2 : IfxMsc.h

IfxMsc_DataFrameInterruptNode_SR3 : IfxMsc.h

IfxMsc_DataFrameLength : IfxMsc.h

IfxMsc_DataFrameLength_0 : IfxMsc.h

IfxMsc_DataFrameLength_1 : IfxMsc.h

IfxMsc_DataFrameLength_10 : IfxMsc.h

IfxMsc_DataFrameLength_11 : IfxMsc.h

IfxMsc_DataFrameLength_12 : IfxMsc.h

IfxMsc_DataFrameLength_13 : IfxMsc.h

IfxMsc_DataFrameLength_14 : IfxMsc.h

IfxMsc_DataFrameLength_15 : IfxMsc.h

IfxMsc_DataFrameLength_16 : IfxMsc.h

IfxMsc_DataFrameLength_2 : IfxMsc.h

IfxMsc_DataFrameLength_3 : IfxMsc.h

IfxMsc_DataFrameLength_4 : IfxMsc.h

IfxMsc_DataFrameLength_5 : IfxMsc.h

IfxMsc_DataFrameLength_6 : IfxMsc.h

IfxMsc_DataFrameLength_7 : IfxMsc.h

IfxMsc_DataFrameLength_8 : IfxMsc.h

IfxMsc_DataFrameLength_9 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_10 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_11 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_12 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_13 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_14 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_15 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_16 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_17 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_18 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_19 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_2 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_20 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_21 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_22 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_23 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_24 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_25 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_26 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_27 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_28 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_29 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_3 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_30 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_31 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_32 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_4 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_5 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_6 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_7 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_8 : IfxMsc.h

IfxMsc_DataFramePassivePhaseLength_9 : IfxMsc.h

IfxMsc_disableModule() : IfxMsc.h , IfxMsc.c

IfxMsc_disableUpstreamTimeoutInterrupt() : IfxMsc.h

IfxMsc_DividerMode : IfxMsc.h

IfxMsc_DividerMode_fractional : IfxMsc.h

IfxMsc_DividerMode_normal : IfxMsc.h

IfxMsc_downstreamAbraBaudCalculator() : IfxMsc.c , IfxMsc.h

IfxMsc_downstreamFractionalBaudCalculator() : IfxMsc.h , IfxMsc.c

IfxMsc_downstreamNormalBaudCalculator() : IfxMsc.c , IfxMsc.h

IfxMsc_EmergencyStop : IfxMsc.h

IfxMsc_EmergencyStop_disabled : IfxMsc.h

IfxMsc_EmergencyStop_enabled : IfxMsc.h

IfxMsc_En_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc_enableModule() : IfxMsc.c , IfxMsc.h

IfxMsc_enableUpstreamTimeoutInterrupt() : IfxMsc.h

IfxMsc_Extension : IfxMsc.h

IfxMsc_Extension_disabled : IfxMsc.h

IfxMsc_Extension_enabled : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_0 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_1 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_10 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_11 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_12 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_13 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_14 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_15 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_16 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_17 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_18 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_19 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_2 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_20 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_21 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_22 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_23 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_24 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_25 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_26 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_27 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_28 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_29 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_3 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_30 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_31 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_32 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_33 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_34 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_35 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_36 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_37 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_38 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_39 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_4 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_40 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_41 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_42 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_43 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_44 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_45 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_46 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_47 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_48 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_49 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_5 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_50 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_51 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_52 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_53 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_54 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_55 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_56 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_57 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_58 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_59 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_6 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_60 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_61 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_62 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_63 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_7 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_8 : IfxMsc.h

IfxMsc_ExternalBitInjectionPosition_9 : IfxMsc.h

IfxMsc_ExternalSignalInjection : IfxMsc.h

IfxMsc_ExternalSignalInjection_disabled : IfxMsc.h

IfxMsc_ExternalSignalInjection_enabled : IfxMsc.h

IfxMsc_FclClockControlEnabled : IfxMsc.h

IfxMsc_FclClockControlEnabled_activePhaseOnly : IfxMsc.h

IfxMsc_FclClockControlEnabled_always : IfxMsc.h

IfxMsc_FclLinePolarity : IfxMsc.h

IfxMsc_FclLinePolarity_inverted : IfxMsc.h

IfxMsc_FclLinePolarity_nonInverted : IfxMsc.h

IfxMsc_Fcln_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc_Fclp_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc_getActiveDataFrameStatus() : IfxMsc.c , IfxMsc.h

IfxMsc_getAddress() : IfxMsc.c , IfxMsc.h

IfxMsc_getAsyncClockBypass() : IfxMsc.h

IfxMsc_getData() : IfxMsc.h

IfxMsc_getDataFrameInterruptFlag() : IfxMsc.c , IfxMsc.h

IfxMsc_getDataHighTarget() : IfxMsc.h

IfxMsc_getDataLowTarget() : IfxMsc.h

IfxMsc_getDownStreamExtension() : IfxMsc.h

IfxMsc_getIndex() : IfxMsc.h , IfxMsc.c

IfxMsc_getRecieveDataInterruptFlag() : IfxMsc.h

IfxMsc_getSrcPointer() : IfxMsc.h

IfxMsc_getUpstreamData() : IfxMsc.h

IfxMsc_getUpstreamParityErrorFlag() : IfxMsc.h

IfxMsc_getUpstreamTimeoutFlag() : IfxMsc.h

IfxMsc_getUpstreamValidFlag() : IfxMsc.h

IfxMsc_HardwareClock : IfxMsc.h

IfxMsc_HardwareClock_disabled : IfxMsc.h

IfxMsc_HardwareClock_enabled : IfxMsc.h

IfxMsc_Index : IfxMsc_cfg.h

IfxMsc_Index_0 : IfxMsc_cfg.h

IfxMsc_Index_1 : IfxMsc_cfg.h

IfxMsc_Index_none : IfxMsc_cfg.h

IfxMsc_initEnPin() : IfxMsc.h

IfxMsc_initFclnPin() : IfxMsc.h

IfxMsc_initFclpPin() : IfxMsc.h

IfxMsc_initInjPin() : IfxMsc.h

IfxMsc_initSdiPin() : IfxMsc.h

IfxMsc_initSonPin() : IfxMsc.h

IfxMsc_initSopPin() : IfxMsc.h

IfxMsc_Inj_In_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc_InterruptServiceRequest : IfxMsc.h

IfxMsc_InterruptServiceRequest_0 : IfxMsc.h

IfxMsc_InterruptServiceRequest_1 : IfxMsc.h

IfxMsc_InterruptServiceRequest_2 : IfxMsc.h

IfxMsc_InterruptServiceRequest_3 : IfxMsc.h

IfxMsc_InterruptServiceRequest_4 : IfxMsc.h

IfxMsc_isModuleSuspended() : IfxMsc.h

IfxMsc_ModuleSuspendRequestBit : IfxMsc.h

IfxMsc_ModuleSuspendRequestBit_hardSuspend : IfxMsc.h

IfxMsc_ModuleSuspendRequestBit_noSuspend : IfxMsc.h

IfxMsc_ModuleSuspendRequestBit_softSuspend : IfxMsc.h

IfxMsc_MsbBitDataExtension : IfxMsc.h

IfxMsc_MsbBitDataExtension_notPresent : IfxMsc.h

IfxMsc_MsbBitDataExtension_present : IfxMsc.h

IfxMsc_Msc_clearDataFrameInterrupt() : IfxMsc_Msc.h

IfxMsc_Msc_deInitModule() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_getActiveDataFrameStatus() : IfxMsc_Msc.h

IfxMsc_Msc_getDataFrameInterruptStatus() : IfxMsc_Msc.h

IfxMsc_Msc_getTarget() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_initializeAbra() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_initializeDataExtension() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_initModule() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_initModuleConfig() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_receiveData() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_sendCommand() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_sendData() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_sendDataExtension() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_sendDataHigh() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_sendDataLow() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_setCommandTarget() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_setDataTarget() : IfxMsc_Msc.c , IfxMsc_Msc.h

IfxMsc_Msc_Target : IfxMsc_Msc.h

IfxMsc_Msc_Target_high : IfxMsc_Msc.h

IfxMsc_Msc_Target_low : IfxMsc_Msc.h

IfxMsc_NDividerAbra : IfxMsc.h

IfxMsc_NDividerAbra_1 : IfxMsc.h

IfxMsc_NDividerAbra_2 : IfxMsc.h

IfxMsc_NDividerAbra_3 : IfxMsc.h

IfxMsc_NDividerAbra_4 : IfxMsc.h

IfxMsc_NDividerAbra_5 : IfxMsc.h

IfxMsc_NDividerAbra_6 : IfxMsc.h

IfxMsc_NDividerAbra_7 : IfxMsc.h

IfxMsc_NDividerAbra_8 : IfxMsc.h

IfxMsc_NDividerDownstream : IfxMsc.h

IfxMsc_NDividerDownstream_1 : IfxMsc.h

IfxMsc_NDividerDownstream_10 : IfxMsc.h

IfxMsc_NDividerDownstream_11 : IfxMsc.h

IfxMsc_NDividerDownstream_12 : IfxMsc.h

IfxMsc_NDividerDownstream_13 : IfxMsc.h

IfxMsc_NDividerDownstream_14 : IfxMsc.h

IfxMsc_NDividerDownstream_15 : IfxMsc.h

IfxMsc_NDividerDownstream_16 : IfxMsc.h

IfxMsc_NDividerDownstream_2 : IfxMsc.h

IfxMsc_NDividerDownstream_3 : IfxMsc.h

IfxMsc_NDividerDownstream_4 : IfxMsc.h

IfxMsc_NDividerDownstream_5 : IfxMsc.h

IfxMsc_NDividerDownstream_6 : IfxMsc.h

IfxMsc_NDividerDownstream_7 : IfxMsc.h

IfxMsc_NDividerDownstream_8 : IfxMsc.h

IfxMsc_NDividerDownstream_9 : IfxMsc.h

IFXMSC_NUM_ENABLE_SELECT_LINES : IfxMsc_cfg.h

IFXMSC_NUM_MODULES : IfxMsc_cfg.h

IfxMsc_OverflowInterrupt : IfxMsc.h

IfxMsc_OverflowInterrupt_disabled : IfxMsc.h

IfxMsc_OverflowInterrupt_enabled : IfxMsc.h

IfxMsc_OverflowInterruptNode : IfxMsc.h

IfxMsc_OverflowInterruptNode_SR0 : IfxMsc.h

IfxMsc_OverflowInterruptNode_SR1 : IfxMsc.h

IfxMsc_OverflowInterruptNode_SR2 : IfxMsc.h

IfxMsc_OverflowInterruptNode_SR3 : IfxMsc.h

IfxMsc_OverflowInterruptNode_SR4 : IfxMsc.h

IfxMsc_Parity : IfxMsc.h

IfxMsc_Parity_even : IfxMsc.h

IfxMsc_Parity_odd : IfxMsc.h

IfxMsc_PassiveTimeFrameCount : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_0 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_1 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_10 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_11 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_12 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_13 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_14 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_15 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_2 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_3 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_4 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_5 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_6 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_7 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_8 : IfxMsc.h

IfxMsc_PassiveTimeFrameCount_9 : IfxMsc.h

IFXMSC_PINMAP_EN_OUT_NUM_ITEMS : IfxMsc_PinMap.h

IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS : IfxMsc_PinMap.h

IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS : IfxMsc_PinMap.h

IFXMSC_PINMAP_INJ_IN_NUM_ITEMS : IfxMsc_PinMap.h

IFXMSC_PINMAP_NUM_MODULES : IfxMsc_PinMap.h

IFXMSC_PINMAP_NUM_TARGETS : IfxMsc_PinMap.h

IFXMSC_PINMAP_SDI_IN_NUM_ITEMS : IfxMsc_PinMap.h

IFXMSC_PINMAP_SON_OUT_NUM_ITEMS : IfxMsc_PinMap.h

IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS : IfxMsc_PinMap.h

IfxMsc_ReceiveDataInterrupt : IfxMsc.h

IfxMsc_ReceiveDataInterrupt_disabled : IfxMsc.h

IfxMsc_ReceiveDataInterrupt_onDataReceive : IfxMsc.h

IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 : IfxMsc.h

IfxMsc_ReceiveDataInterrupt_onRdieSet : IfxMsc.h

IfxMsc_ReceiveDataInterruptNode : IfxMsc.h

IfxMsc_ReceiveDataInterruptNode_SR0 : IfxMsc.h

IfxMsc_ReceiveDataInterruptNode_SR1 : IfxMsc.h

IfxMsc_ReceiveDataInterruptNode_SR2 : IfxMsc.h

IfxMsc_ReceiveDataInterruptNode_SR3 : IfxMsc.h

IfxMsc_resetModule() : IfxMsc.c , IfxMsc.h

IfxMsc_Sdi_In_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc_SdiLinePolarity : IfxMsc.h

IfxMsc_SdiLinePolarity_invertedSi : IfxMsc.h

IfxMsc_SdiLinePolarity_likeSi : IfxMsc.h

IfxMsc_SerialDataInput : IfxMsc.h

IfxMsc_SerialDataInput_0 : IfxMsc.h

IfxMsc_SerialDataInput_1 : IfxMsc.h

IfxMsc_SerialDataInput_2 : IfxMsc.h

IfxMsc_SerialDataInput_3 : IfxMsc.h

IfxMsc_SerialDataInput_4 : IfxMsc.h

IfxMsc_SerialDataInput_5 : IfxMsc.h

IfxMsc_SerialDataInput_6 : IfxMsc.h

IfxMsc_SerialDataInput_7 : IfxMsc.h

IfxMsc_ServiceRequestDelay : IfxMsc.h

IfxMsc_ServiceRequestDelay_1bit : IfxMsc.h

IfxMsc_ServiceRequestDelay_noDelay : IfxMsc.h

IfxMsc_setAsyncClockBypass() : IfxMsc.h

IfxMsc_setCommandTarget() : IfxMsc.h

IfxMsc_setDataHighTarget() : IfxMsc.h

IfxMsc_setDataLowTarget() : IfxMsc.h

IfxMsc_setDownStreamData() : IfxMsc.h

IfxMsc_setDownStreamExtension() : IfxMsc.h

IfxMsc_setDownStreamExtensionData() : IfxMsc.h

IfxMsc_setFractionalDividerStep() : IfxMsc.h

IfxMsc_setNdividerDownstream() : IfxMsc.h

IfxMsc_setSerialDataInputSelect() : IfxMsc.h

IfxMsc_setSleepMode() : IfxMsc.h

IfxMsc_setSuspendMode() : IfxMsc.h

IfxMsc_setTransmissionMode() : IfxMsc.h

IfxMsc_setUpstreamChannelRecieveRate() : IfxMsc.h

IfxMsc_setUpstreamTimeout() : IfxMsc.h

IfxMsc_setUpstreamTimeoutPrescalar() : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_1 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_10 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_11 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_12 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_13 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_14 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_15 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_16 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_2 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_3 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_4 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_5 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_6 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_7 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_8 : IfxMsc.h

IfxMsc_ShiftClockPhaseDuration_9 : IfxMsc.h

IfxMsc_SleepMode : IfxMsc.h

IfxMsc_SleepMode_disable : IfxMsc.h

IfxMsc_SleepMode_enable : IfxMsc.h

IfxMsc_SoLinePolarity : IfxMsc.h

IfxMsc_SoLinePolarity_inverted : IfxMsc.h

IfxMsc_SoLinePolarity_nonInverted : IfxMsc.h

IfxMsc_Son_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h

IfxMsc_Sop_Out_pinTable : IfxMsc_PinMap.h , IfxMsc_PinMap.c

IfxMsc_Source : IfxMsc.h

IfxMsc_Source_alternateInputLine : IfxMsc.h

IfxMsc_Source_alternateInputLineInverted : IfxMsc.h

IfxMsc_Source_downstreamDataRegister : IfxMsc.h

IfxMsc_SuspendMode : IfxMsc.h

IfxMsc_SuspendMode_hard : IfxMsc.h

IfxMsc_SuspendMode_none : IfxMsc.h

IfxMsc_SuspendMode_soft : IfxMsc.h

IfxMsc_Target : IfxMsc.h

IfxMsc_Target_en0 : IfxMsc.h

IfxMsc_Target_en1 : IfxMsc.h

IfxMsc_Target_en2 : IfxMsc.h

IfxMsc_Target_en3 : IfxMsc.h

IfxMsc_TimeFrameInterrupt : IfxMsc.h

IfxMsc_TimeFrameInterrupt_disabled : IfxMsc.h

IfxMsc_TimeFrameInterrupt_enabled : IfxMsc.h

IfxMsc_TimeFrameInterruptNode : IfxMsc.h

IfxMsc_TimeFrameInterruptNode_SR0 : IfxMsc.h

IfxMsc_TimeFrameInterruptNode_SR1 : IfxMsc.h

IfxMsc_TimeFrameInterruptNode_SR2 : IfxMsc.h

IfxMsc_TimeFrameInterruptNode_SR3 : IfxMsc.h

IfxMsc_TransmissionMode : IfxMsc.h

IfxMsc_TransmissionMode_dataRepetition : IfxMsc.h

IfxMsc_TransmissionMode_triggered : IfxMsc.h

IfxMsc_UnderflowInterrupt : IfxMsc.h

IfxMsc_UnderflowInterrupt_disabled : IfxMsc.h

IfxMsc_UnderflowInterrupt_enabled : IfxMsc.h

IfxMsc_UnderflowInterruptNode : IfxMsc.h

IfxMsc_UnderflowInterruptNode_SR0 : IfxMsc.h

IfxMsc_UnderflowInterruptNode_SR1 : IfxMsc.h

IfxMsc_UnderflowInterruptNode_SR2 : IfxMsc.h

IfxMsc_UnderflowInterruptNode_SR3 : IfxMsc.h

IfxMsc_UnderflowInterruptNode_SR4 : IfxMsc.h

IfxMsc_UpstreamChannelFrameType : IfxMsc.h

IfxMsc_UpstreamChannelFrameType_12bit : IfxMsc.h

IfxMsc_UpstreamChannelFrameType_16bit : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate_128 : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate_16 : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate_256 : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate_32 : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate_4 : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate_64 : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate_8 : IfxMsc.h

IfxMsc_UpstreamChannelReceivingRate_disabled : IfxMsc.h

IfxMsc_upstreamFractionalBaudCalculator() : IfxMsc.c , IfxMsc.h

IfxMsc_upstreamNormalBaudCalculator() : IfxMsc.c , IfxMsc.h

IfxMsc_UpstreamTimeoutInterrupt : IfxMsc.h

IfxMsc_UpstreamTimeoutInterrupt_disabled : IfxMsc.h

IfxMsc_UpstreamTimeoutInterrupt_enabled : IfxMsc.h

IfxMsc_UpstreamTimeoutInterruptNode : IfxMsc.h

IfxMsc_UpstreamTimeoutInterruptNode_SR0 : IfxMsc.h

IfxMsc_UpstreamTimeoutInterruptNode_SR1 : IfxMsc.h

IfxMsc_UpstreamTimeoutInterruptNode_SR2 : IfxMsc.h

IfxMsc_UpstreamTimeoutInterruptNode_SR3 : IfxMsc.h

IfxMsc_UpstreamTimeoutInterruptNode_SR4 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_1 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_1024 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_128 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_16 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_16384 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_2 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_2048 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_256 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_32 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_32768 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_4 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_4096 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_512 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_64 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_8 : IfxMsc.h

IfxMsc_UpstreamTimeoutPrescaler_8192 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_1 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_10 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_11 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_12 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_13 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_14 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_15 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_16 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_2 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_3 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_4 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_5 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_6 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_7 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_8 : IfxMsc.h

IfxMsc_UpstreamTimeoutValue_9 : IfxMsc.h

IfxMtu_checkErrorFlags() : IfxMtu.h

IfxMtu_clearErrorTracking() : IfxMtu.c , IfxMtu.h

IfxMtu_clearSram() : IfxMtu.c , IfxMtu.h

IfxMtu_clearSramContinue() : IfxMtu.h , IfxMtu.c

IfxMtu_clearSramStart() : IfxMtu.c , IfxMtu.h

IfxMtu_disableMbistShell() : IfxMtu.h

IfxMtu_enableErrorTracking() : IfxMtu.h , IfxMtu.c

IfxMtu_enableMbistShell() : IfxMtu.h

IfxMtu_enableModule() : IfxMtu.h

IFXMTU_ERROR_FLAGS_MASK : IfxMtu.h

IfxMtu_getSystemAddress() : IfxMtu.h , IfxMtu.c

IfxMtu_getTrackedSramAddresses() : IfxMtu.c , IfxMtu.h

IfxMtu_isAutoInitRunning() : IfxMtu.h

IfxMtu_isErrorTrackingEnabled() : IfxMtu.h

IfxMtu_isErrorTrackingOverflow() : IfxMtu.h

IfxMtu_isMbistDone() : IfxMtu.h

IfxMtu_isModuleEnabled() : IfxMtu.h

IFXMTU_MAX_TRACKED_ADDRESSES : IfxMtu_cfg.h

IfxMtu_MbistSel : IfxMtu_cfg.h

IfxMtu_MbistSel_cifCif : IfxMtu_cfg.h

IfxMtu_MbistSel_cifJpeg1_4 : IfxMtu_cfg.h

IfxMtu_MbistSel_cifJpeg3 : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu0Dspr : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu0Pspr : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu0Ptag : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu1Dspr : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu1Dtag : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu1Pspr : IfxMtu_cfg.h

IfxMtu_MbistSel_cpu1Ptag : IfxMtu_cfg.h

IfxMtu_MbistSel_dma : IfxMtu_cfg.h

IfxMtu_MbistSel_emem0 : IfxMtu_cfg.h

IfxMtu_MbistSel_emem1 : IfxMtu_cfg.h

IfxMtu_MbistSel_emem2 : IfxMtu_cfg.h

IfxMtu_MbistSel_emem3 : IfxMtu_cfg.h

IfxMtu_MbistSel_emem4 : IfxMtu_cfg.h

IfxMtu_MbistSel_emem5 : IfxMtu_cfg.h

IfxMtu_MbistSel_emem6 : IfxMtu_cfg.h

IfxMtu_MbistSel_emem7 : IfxMtu_cfg.h

IfxMtu_MbistSel_ememXtm0 : IfxMtu_cfg.h

IfxMtu_MbistSel_ememXtm1 : IfxMtu_cfg.h

IfxMtu_MbistSel_erayIbfTbf : IfxMtu_cfg.h

IfxMtu_MbistSel_erayMbf : IfxMtu_cfg.h

IfxMtu_MbistSel_erayObf : IfxMtu_cfg.h

IfxMtu_MbistSel_ethermac : IfxMtu_cfg.h

IfxMtu_MbistSel_fft0 : IfxMtu_cfg.h

IfxMtu_MbistSel_fft1 : IfxMtu_cfg.h

IfxMtu_MbistSel_gtmDpll1a : IfxMtu_cfg.h

IfxMtu_MbistSel_gtmDpll1b : IfxMtu_cfg.h

IfxMtu_MbistSel_gtmDpll2 : IfxMtu_cfg.h

IfxMtu_MbistSel_gtmFifo : IfxMtu_cfg.h

IfxMtu_MbistSel_gtmMcs0 : IfxMtu_cfg.h

IfxMtu_MbistSel_gtmMcs1 : IfxMtu_cfg.h

IfxMtu_MbistSel_mcan : IfxMtu_cfg.h

IfxMtu_MbistSel_mcds : IfxMtu_cfg.h

IfxMtu_MbistSel_mod4 : IfxMtu_cfg.h

IfxMtu_MbistSel_none : IfxMtu_cfg.h

IfxMtu_MbistSel_psi5 : IfxMtu_cfg.h

IfxMtu_MbistSel_stdbyRam1 : IfxMtu_cfg.h

IfxMtu_MbistSel_stdbyRam2 : IfxMtu_cfg.h

IFXMTU_MC_ADDRESS_BASE : IfxMtu_cfg.h

IFXMTU_NUM_MBIST_TABLE_ITEMS : IfxMtu_cfg.h

IfxMtu_readSramAddress() : IfxMtu.h , IfxMtu.c

IfxMtu_runNonDestructiveInversionTest() : IfxMtu.c , IfxMtu.h

IfxMtu_sramTable : IfxMtu_cfg.h , IfxMtu_cfg.c

IfxMtu_waitForMbistDone() : IfxMtu.c

IfxMtu_writeSramAddress() : IfxMtu.h , IfxMtu.c

IfxMultican_calcTimingFromBTR() : IfxMultican.c , IfxMultican.h

IfxMultican_Can_deinit() : IfxMultican_Can.h

IfxMultican_Can_getConfig() : IfxMultican_Can.c , IfxMultican_Can.h

IfxMultican_Can_getModuleFrequency() : IfxMultican_Can.h , IfxMultican_Can.c

IfxMultican_Can_initModule() : IfxMultican_Can.c , IfxMultican_Can.h

IfxMultican_Can_initModuleConfig() : IfxMultican_Can.h , IfxMultican_Can.c

IfxMultican_Can_MsgObj_cancelSend() : IfxMultican_Can.h

IfxMultican_Can_MsgObj_clearRxPending() : IfxMultican_Can.h

IfxMultican_Can_MsgObj_clearTxPending() : IfxMultican_Can.h

IfxMultican_Can_MsgObj_deinit() : IfxMultican_Can.h

IfxMultican_Can_MsgObj_getConfig() : IfxMultican_Can.h , IfxMultican_Can.c

IfxMultican_Can_MsgObj_getPendingId() : IfxMultican_Can.h

IfxMultican_Can_MsgObj_getStatus() : IfxMultican_Can.h

IfxMultican_Can_MsgObj_init() : IfxMultican_Can.c , IfxMultican_Can.h

IfxMultican_Can_MsgObj_initConfig() : IfxMultican_Can.h , IfxMultican_Can.c

IfxMultican_Can_MsgObj_isRxPending() : IfxMultican_Can.c , IfxMultican_Can.h

IfxMultican_Can_MsgObj_isTransmitRequested() : IfxMultican_Can.c , IfxMultican_Can.h

IfxMultican_Can_MsgObj_isTxPending() : IfxMultican_Can.h , IfxMultican_Can.c

IfxMultican_Can_MsgObj_readLongFrame() : IfxMultican_Can.h

IfxMultican_Can_MsgObj_readMessage() : IfxMultican_Can.h , IfxMultican_Can.c

IfxMultican_Can_MsgObj_sendLongFrame() : IfxMultican_Can.h

IfxMultican_Can_MsgObj_sendMessage() : IfxMultican_Can.h , IfxMultican_Can.c

IfxMultican_Can_Node_activate() : IfxMultican_Can.h

IfxMultican_Can_Node_deactivate() : IfxMultican_Can.h

IfxMultican_Can_Node_deinit() : IfxMultican_Can.h

IfxMultican_Can_Node_getConfig() : IfxMultican_Can.c , IfxMultican_Can.h

IfxMultican_Can_Node_init() : IfxMultican_Can.c , IfxMultican_Can.h

IfxMultican_Can_Node_initConfig() : IfxMultican_Can.c , IfxMultican_Can.h

IfxMultican_Can_Node_recoverBusOff() : IfxMultican_Can.h

IfxMultican_Can_Node_sendToBusOff() : IfxMultican_Can.h , IfxMultican_Can.c

IfxMultican_cfg_indexMap : IfxMultican_cfg.h , IfxMultican_cfg.c

IfxMultican_clearMessagePendingSeletor() : IfxMultican.h

IfxMultican_clearPendingMessageNotification() : IfxMultican.h

IfxMultican_ClockSelect : IfxMultican.h

IfxMultican_ClockSelect_fclc : IfxMultican.h

IfxMultican_ClockSelect_fErayPll : IfxMultican.h

IfxMultican_ClockSelect_fosc0 : IfxMultican.h

IfxMultican_ClockSelect_noClock : IfxMultican.h

IfxMultican_DataLengthCode : IfxMultican.h

IfxMultican_DataLengthCode_0 : IfxMultican.h

IfxMultican_DataLengthCode_1 : IfxMultican.h

IfxMultican_DataLengthCode_12 : IfxMultican.h

IfxMultican_DataLengthCode_16 : IfxMultican.h

IfxMultican_DataLengthCode_2 : IfxMultican.h

IfxMultican_DataLengthCode_20 : IfxMultican.h

IfxMultican_DataLengthCode_24 : IfxMultican.h

IfxMultican_DataLengthCode_3 : IfxMultican.h

IfxMultican_DataLengthCode_32 : IfxMultican.h

IfxMultican_DataLengthCode_4 : IfxMultican.h

IfxMultican_DataLengthCode_48 : IfxMultican.h

IfxMultican_DataLengthCode_5 : IfxMultican.h

IfxMultican_DataLengthCode_6 : IfxMultican.h

IfxMultican_DataLengthCode_64 : IfxMultican.h

IfxMultican_DataLengthCode_7 : IfxMultican.h

IfxMultican_DataLengthCode_8 : IfxMultican.h

IfxMultican_deinit() : IfxMultican.h , IfxMultican.c

IfxMultican_disableModule() : IfxMultican.h

IfxMultican_disableSleepMode() : IfxMultican.h

IfxMultican_enableModule() : IfxMultican.h

IfxMultican_enableSleepMode() : IfxMultican.h

IfxMultican_Frame : IfxMultican.h

IfxMultican_Frame_receive : IfxMultican.h

IfxMultican_Frame_remoteAnswer : IfxMultican.h

IfxMultican_Frame_remoteRequest : IfxMultican.h

IfxMultican_Frame_transmit : IfxMultican.h

IfxMultican_FrameCounterMode : IfxMultican.h

IfxMultican_FrameCounterMode_bitTimingMode : IfxMultican.h

IfxMultican_FrameCounterMode_errorCountMode : IfxMultican.h

IfxMultican_FrameCounterMode_frameCountMode : IfxMultican.h

IfxMultican_FrameCounterMode_timeStampMode : IfxMultican.h

IfxMultican_getAddress() : IfxMultican.c , IfxMultican.h

IfxMultican_getFractionalDividerMode() : IfxMultican.h

IfxMultican_getFractionalDividerStepValue() : IfxMultican.h

IfxMultican_getIndex() : IfxMultican.h , IfxMultican.c

IfxMultican_getInputClock() : IfxMultican.h

IfxMultican_getSrcPointer() : IfxMultican.c , IfxMultican.h

IfxMultican_Index : IfxMultican_cfg.h

IfxMultican_Index_0 : IfxMultican_cfg.h

IfxMultican_Index_none : IfxMultican_cfg.h

IfxMultican_isModuleEnabled() : IfxMultican.h

IfxMultican_isModuleSuspended() : IfxMultican.h

IfxMultican_Message_init() : IfxMultican.h

IfxMultican_Message_longFrameInit() : IfxMultican.h

IfxMultican_MsgObj_cancelSend() : IfxMultican.h , IfxMultican.c

IfxMultican_MsgObj_clearDataRegisters() : IfxMultican.h

IfxMultican_MsgObj_clearFifoGatewayPointers() : IfxMultican.h

IfxMultican_MsgObj_clearRxPending() : IfxMultican.h

IfxMultican_MsgObj_clearStatusFlag() : IfxMultican.c , IfxMultican.h

IfxMultican_MsgObj_clearTxPending() : IfxMultican.h

IfxMultican_MsgObj_deinit() : IfxMultican.h , IfxMultican.c

IfxMultican_MsgObj_doReadLongFrame() : IfxMultican.c

IfxMultican_MsgObj_doReadMessage() : IfxMultican.c

IfxMultican_MsgObj_getBottomObjectPointer() : IfxMultican.h

IfxMultican_MsgObj_getDataLengthCode() : IfxMultican.h

IfxMultican_MsgObj_getMessageId() : IfxMultican.h

IfxMultican_MsgObj_getNextObjectPointer() : IfxMultican.h

IfxMultican_MsgObj_getPendingId() : IfxMultican.c , IfxMultican.h

IfxMultican_MsgObj_getPointer() : IfxMultican.h

IfxMultican_MsgObj_getStatus() : IfxMultican.c , IfxMultican.h

IfxMultican_MsgObj_getStatusFlag() : IfxMultican.h , IfxMultican.c

IfxMultican_MsgObj_isExtendedFrame() : IfxMultican.h

IfxMultican_MsgObj_isRxPending() : IfxMultican.h

IfxMultican_MsgObj_isTransmitRequested() : IfxMultican.h

IfxMultican_MsgObj_isTxPending() : IfxMultican.h

IfxMultican_MsgObj_readLongFrame() : IfxMultican.c , IfxMultican.h

IfxMultican_MsgObj_readMessage() : IfxMultican.c , IfxMultican.h

IfxMultican_MsgObj_sendLongFrame() : IfxMultican.c , IfxMultican.h

IfxMultican_MsgObj_sendMessage() : IfxMultican.c , IfxMultican.h

IfxMultican_MsgObj_setAcceptanceMask() : IfxMultican.h

IfxMultican_MsgObj_setBitRateSwitch() : IfxMultican.h

IfxMultican_MsgObj_setBottomObjectPointer() : IfxMultican.h

IfxMultican_MsgObj_setCurrentObjectPointer() : IfxMultican.h

IfxMultican_MsgObj_setDataCopy() : IfxMultican.h

IfxMultican_MsgObj_setDataLengthCode() : IfxMultican.h

IfxMultican_MsgObj_setDataLengthCodeCopy() : IfxMultican.h

IfxMultican_MsgObj_setExtendedDataLength() : IfxMultican.h

IfxMultican_MsgObj_setFilter() : IfxMultican.c , IfxMultican.h

IfxMultican_MsgObj_setGatewayDataFrameSend() : IfxMultican.h

IfxMultican_MsgObj_setIdentifierCopy() : IfxMultican.h

IfxMultican_MsgObj_setIdentifierExtension() : IfxMultican.h

IfxMultican_MsgObj_setMatchingId() : IfxMultican.h

IfxMultican_MsgObj_setMessageId() : IfxMultican.h

IfxMultican_MsgObj_setMessageMode() : IfxMultican.h

IfxMultican_MsgObj_setMessagePendingNumber() : IfxMultican.h

IfxMultican_MsgObj_setOverflowInterrupt() : IfxMultican.h

IfxMultican_MsgObj_setPriorityClass() : IfxMultican.h

IfxMultican_MsgObj_setReceiveInterrupt() : IfxMultican.h

IfxMultican_MsgObj_setReceiveInterruptNodePointer() : IfxMultican.h

IfxMultican_MsgObj_setRemoteMonitoring() : IfxMultican.h

IfxMultican_MsgObj_setSelectObjectPointer() : IfxMultican.h

IfxMultican_MsgObj_setSingleDataTransfer() : IfxMultican.h

IfxMultican_MsgObj_setSingleTransmitTrial() : IfxMultican.h

IfxMultican_MsgObj_setStatusFlag() : IfxMultican.h , IfxMultican.c

IfxMultican_MsgObj_setTopObjectPointer() : IfxMultican.h

IfxMultican_MsgObj_setTransmitInterrupt() : IfxMultican.h

IfxMultican_MsgObj_setTransmitInterruptNodePointer() : IfxMultican.h

IfxMultican_MsgObj_writeTxfifo() : IfxMultican.c , IfxMultican.h

IfxMultican_MsgObjGroup : IfxMultican.h

IfxMultican_MsgObjGroup_0 : IfxMultican.h

IfxMultican_MsgObjGroup_1 : IfxMultican.h

IfxMultican_MsgObjGroup_2 : IfxMultican.h

IfxMultican_MsgObjGroup_3 : IfxMultican.h

IfxMultican_MsgObjGroup_4 : IfxMultican.h

IfxMultican_MsgObjGroup_5 : IfxMultican.h

IfxMultican_MsgObjGroup_6 : IfxMultican.h

IfxMultican_MsgObjGroup_7 : IfxMultican.h

IfxMultican_MsgObjId : IfxMultican.h

IfxMultican_MsgObjMode : IfxMultican.h

IfxMultican_MsgObjMode_canFD64 : IfxMultican.h

IfxMultican_MsgObjMode_gatewaySource : IfxMultican.h

IfxMultican_MsgObjMode_receiveFifoBase : IfxMultican.h

IfxMultican_MsgObjMode_standard : IfxMultican.h

IfxMultican_MsgObjMode_transmitFifoBase : IfxMultican.h

IfxMultican_MsgObjMode_transmitFifoSlave : IfxMultican.h

IfxMultican_MsgObjStatusFlag : IfxMultican.h

IfxMultican_MsgObjStatusFlag_messageDirection : IfxMultican.h

IfxMultican_MsgObjStatusFlag_messageLost : IfxMultican.h

IfxMultican_MsgObjStatusFlag_messageValid : IfxMultican.h

IfxMultican_MsgObjStatusFlag_newData : IfxMultican.h

IfxMultican_MsgObjStatusFlag_receiveEnable : IfxMultican.h

IfxMultican_MsgObjStatusFlag_receivePending : IfxMultican.h

IfxMultican_MsgObjStatusFlag_receiveTransmitSelected : IfxMultican.h

IfxMultican_MsgObjStatusFlag_receiveUpdating : IfxMultican.h

IfxMultican_MsgObjStatusFlag_transmitEnable0 : IfxMultican.h

IfxMultican_MsgObjStatusFlag_transmitEnable1 : IfxMultican.h

IfxMultican_MsgObjStatusFlag_transmitPending : IfxMultican.h

IfxMultican_MsgObjStatusFlag_transmitRequest : IfxMultican.h

IfxMultican_Node_activate() : IfxMultican.h

IfxMultican_Node_deactivate() : IfxMultican.h

IfxMultican_Node_deinit() : IfxMultican.c , IfxMultican.h

IfxMultican_Node_disableConfigurationChange() : IfxMultican.h

IfxMultican_Node_enableConfigurationChange() : IfxMultican.h

IfxMultican_Node_getCodeFromDataLength() : IfxMultican.h

IfxMultican_Node_getDataLengthFromCode() : IfxMultican.h

IfxMultican_Node_getPointer() : IfxMultican.h

IfxMultican_Node_initRxPin() : IfxMultican.c , IfxMultican.h

IfxMultican_Node_initTxPin() : IfxMultican.h , IfxMultican.c

IfxMultican_Node_recoverBusOff() : IfxMultican.c , IfxMultican.h

IfxMultican_Node_resetControlRegister() : IfxMultican.h

IfxMultican_Node_resetErrorCounters() : IfxMultican.h

IfxMultican_Node_resetInterruptPointers() : IfxMultican.h

IfxMultican_Node_setAlertInterrupt() : IfxMultican.h

IfxMultican_Node_setAlertInterruptPointer() : IfxMultican.h

IfxMultican_Node_setAnalyzerMode() : IfxMultican.h

IfxMultican_Node_setBitTiming() : IfxMultican.c , IfxMultican.h

IfxMultican_Node_setErrorWarningLevel() : IfxMultican.h

IfxMultican_Node_setFastBitTiming() : IfxMultican.h , IfxMultican.c

IfxMultican_Node_setFastNode() : IfxMultican.h

IfxMultican_Node_setFrameCounterInterrupt() : IfxMultican.h

IfxMultican_Node_setFrameCounterInterruptPointer() : IfxMultican.h

IfxMultican_Node_setFrameCounterMode() : IfxMultican.h

IfxMultican_Node_setLastErrorCodeInterrupt() : IfxMultican.h

IfxMultican_Node_setLastErrorCodeInterruptPointer() : IfxMultican.h

IfxMultican_Node_setLoopBackMode() : IfxMultican.h

IfxMultican_Node_setNominalBitTiming() : IfxMultican.h , IfxMultican.c

IfxMultican_Node_setReceiveErrorCounter() : IfxMultican.h

IfxMultican_Node_setTimerEventInterruptPointer() : IfxMultican.h

IfxMultican_Node_setTransceiverDelayCompensation() : IfxMultican.h

IfxMultican_Node_setTransceiverDelayCompensationOffset() : IfxMultican.h

IfxMultican_Node_setTransferInterrupt() : IfxMultican.h

IfxMultican_Node_setTransferInterruptPointer() : IfxMultican.h

IfxMultican_Node_setTransmitErrorCounter() : IfxMultican.h

IfxMultican_NodeId : IfxMultican_cfg.h

IfxMultican_NodeId_0 : IfxMultican_cfg.h

IfxMultican_NodeId_1 : IfxMultican_cfg.h

IfxMultican_NodeId_2 : IfxMultican_cfg.h

IfxMultican_NodeId_3 : IfxMultican_cfg.h

IfxMultican_NodeId_none : IfxMultican_cfg.h

IFXMULTICAN_NUM_MESSAGE_OBJECTS : IfxMultican_cfg.h

IFXMULTICAN_NUM_MODULES : IfxMultican_cfg.h

IFXMULTICAN_NUM_NODES : IfxMultican_cfg.h

IFXMULTICAN_NUM_SRC : IfxMultican_cfg.h

IFXMULTICAN_PINMAP_NUM_MODULES : IfxMultican_PinMap.h

IFXMULTICAN_PINMAP_NUM_NODES : IfxMultican_PinMap.h

IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS : IfxMultican_PinMap.h

IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS : IfxMultican_PinMap.h

IfxMultican_Priority : IfxMultican.h

IfxMultican_Priority_CAN_ID : IfxMultican.h

IfxMultican_Priority_ListOrder : IfxMultican.h

IFXMULTICAN_R_NUM_SRC : IfxMultican_cfg.h

IfxMultican_resetModule() : IfxMultican.c , IfxMultican.h

IfxMultican_RXD0A_P02_1_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_RXD0B_P20_7_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_RXD0D_P02_4_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_RXD0E_P33_7_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_RXD1A_P15_3_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_RXD1B_P14_1_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_RXD1D_P00_1_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_RXD2A_P15_1_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_RXD2B_P02_3_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_RXD2D_P14_8_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c

IfxMultican_RXD2E_P10_2_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_RXD3A_P00_3_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_RXD3B_P32_2_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_RXD3C_P20_0_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_RXD3D_P11_10_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_RXD3E_P20_9_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_Rxd_In_pinTable : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_setFractionalDividerMode() : IfxMultican.h

IfxMultican_setFractionalDividerStepValue() : IfxMultican.h

IfxMultican_setInputClock() : IfxMultican.h

IfxMultican_setListCommand() : IfxMultican.h , IfxMultican.c

IfxMultican_setMessageIndexMask() : IfxMultican.h

IfxMultican_setSleepMode() : IfxMultican.h

IfxMultican_setSuspendMode() : IfxMultican.h

IfxMultican_SleepMode : IfxMultican.h

IfxMultican_SleepMode_disable : IfxMultican.h

IfxMultican_SleepMode_enable : IfxMultican.h

IfxMultican_SrcId : IfxMultican_cfg.h

IfxMultican_SrcId_0 : IfxMultican_cfg.h

IfxMultican_SrcId_1 : IfxMultican_cfg.h

IfxMultican_SrcId_10 : IfxMultican_cfg.h

IfxMultican_SrcId_11 : IfxMultican_cfg.h

IfxMultican_SrcId_12 : IfxMultican_cfg.h

IfxMultican_SrcId_13 : IfxMultican_cfg.h

IfxMultican_SrcId_14 : IfxMultican_cfg.h

IfxMultican_SrcId_15 : IfxMultican_cfg.h

IfxMultican_SrcId_2 : IfxMultican_cfg.h

IfxMultican_SrcId_3 : IfxMultican_cfg.h

IfxMultican_SrcId_4 : IfxMultican_cfg.h

IfxMultican_SrcId_5 : IfxMultican_cfg.h

IfxMultican_SrcId_6 : IfxMultican_cfg.h

IfxMultican_SrcId_7 : IfxMultican_cfg.h

IfxMultican_SrcId_8 : IfxMultican_cfg.h

IfxMultican_SrcId_9 : IfxMultican_cfg.h

IfxMultican_Status : IfxMultican.h

IfxMultican_Status_busHeavy : IfxMultican.h

IfxMultican_Status_busOff : IfxMultican.h

IfxMultican_Status_messageLost : IfxMultican.h

IfxMultican_Status_newData : IfxMultican.h

IfxMultican_Status_newDataButOneLost : IfxMultican.h

IfxMultican_Status_notInitialised : IfxMultican.h

IfxMultican_Status_notSentBusy : IfxMultican.h

IfxMultican_Status_ok : IfxMultican.h

IfxMultican_Status_receiveEmpty : IfxMultican.h

IfxMultican_Status_wrongParam : IfxMultican.h

IfxMultican_Status_wrongPin : IfxMultican.h

IfxMultican_SuspendMode : IfxMultican.h

IfxMultican_SuspendMode_hard : IfxMultican.h

IfxMultican_SuspendMode_none : IfxMultican.h

IfxMultican_SuspendMode_soft : IfxMultican.h

IfxMultican_TXD0_P02_0_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_TXD0_P02_5_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_TXD0_P20_8_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c

IfxMultican_TXD0_P33_8_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_TXD1_P00_0_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_TXD1_P14_0_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_TXD1_P15_2_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_TXD2_P02_2_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_TXD2_P10_3_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_TXD2_P14_10_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_TXD2_P15_0_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_TXD3_P00_2_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_TXD3_P11_12_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_TXD3_P20_10_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_TXD3_P20_3_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_TXD3_P32_3_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_Txd_Out_pinTable : IfxMultican_PinMap.c , IfxMultican_PinMap.h

IfxMultican_waitListReady() : IfxMultican.h

IfxPort_cfg_esrMasks : IfxPort_cfg.h , IfxPort_cfg.c

IfxPort_cfg_indexMap : IfxPort_cfg.h , IfxPort_cfg.c

IfxPort_ControlledBy : IfxPort.h

IfxPort_ControlledBy_hsct : IfxPort.h

IfxPort_ControlledBy_port : IfxPort.h

IfxPort_disableEmergencyStop() : IfxPort.c , IfxPort.h

IfxPort_enableEmergencyStop() : IfxPort.c , IfxPort.h

IfxPort_getAddress() : IfxPort.c , IfxPort.h

IfxPort_getGroupState() : IfxPort.h

IfxPort_getIndex() : IfxPort.c , IfxPort.h

IfxPort_getPinState() : IfxPort.h

IfxPort_Index : IfxPort_cfg.h

IfxPort_Index_00 : IfxPort_cfg.h

IfxPort_Index_02 : IfxPort_cfg.h

IfxPort_Index_10 : IfxPort_cfg.h

IfxPort_Index_11 : IfxPort_cfg.h

IfxPort_Index_13 : IfxPort_cfg.h

IfxPort_Index_14 : IfxPort_cfg.h

IfxPort_Index_15 : IfxPort_cfg.h

IfxPort_Index_20 : IfxPort_cfg.h

IfxPort_Index_21 : IfxPort_cfg.h

IfxPort_Index_22 : IfxPort_cfg.h

IfxPort_Index_23 : IfxPort_cfg.h

IfxPort_Index_32 : IfxPort_cfg.h

IfxPort_Index_33 : IfxPort_cfg.h

IfxPort_Index_none : IfxPort_cfg.h

IfxPort_InputMode : IfxPort.h

IfxPort_InputMode_noPullDevice : IfxPort.h

IfxPort_InputMode_pullDown : IfxPort.h

IfxPort_InputMode_pullUp : IfxPort.h

IfxPort_InputMode_undefined : IfxPort.h

IfxPort_Io_initModule() : IfxPort_Io.c , IfxPort_Io.h

IfxPort_Mode : IfxPort.h

IfxPort_Mode_inputNoPullDevice : IfxPort.h

IfxPort_Mode_inputPullDown : IfxPort.h

IfxPort_Mode_inputPullUp : IfxPort.h

IfxPort_Mode_outputOpenDrainAlt1 : IfxPort.h

IfxPort_Mode_outputOpenDrainAlt2 : IfxPort.h

IfxPort_Mode_outputOpenDrainAlt3 : IfxPort.h

IfxPort_Mode_outputOpenDrainAlt4 : IfxPort.h

IfxPort_Mode_outputOpenDrainAlt5 : IfxPort.h

IfxPort_Mode_outputOpenDrainAlt6 : IfxPort.h

IfxPort_Mode_outputOpenDrainAlt7 : IfxPort.h

IfxPort_Mode_outputOpenDrainGeneral : IfxPort.h

IfxPort_Mode_outputPushPullAlt1 : IfxPort.h

IfxPort_Mode_outputPushPullAlt2 : IfxPort.h

IfxPort_Mode_outputPushPullAlt3 : IfxPort.h

IfxPort_Mode_outputPushPullAlt4 : IfxPort.h

IfxPort_Mode_outputPushPullAlt5 : IfxPort.h

IfxPort_Mode_outputPushPullAlt6 : IfxPort.h

IfxPort_Mode_outputPushPullAlt7 : IfxPort.h

IfxPort_Mode_outputPushPullGeneral : IfxPort.h

IFXPORT_NUM_MODULES : IfxPort_cfg.h

IFXPORT_OUTOUTFEATURE_NONE : IfxPort_cfg.h

IfxPort_OutputIdx : IfxPort.h

IfxPort_OutputIdx_alt1 : IfxPort.h

IfxPort_OutputIdx_alt2 : IfxPort.h

IfxPort_OutputIdx_alt3 : IfxPort.h

IfxPort_OutputIdx_alt4 : IfxPort.h

IfxPort_OutputIdx_alt5 : IfxPort.h

IfxPort_OutputIdx_alt6 : IfxPort.h

IfxPort_OutputIdx_alt7 : IfxPort.h

IfxPort_OutputIdx_general : IfxPort.h

IfxPort_OutputMode : IfxPort.h

IfxPort_OutputMode_none : IfxPort.h

IfxPort_OutputMode_openDrain : IfxPort.h

IfxPort_OutputMode_pushPull : IfxPort.h

IfxPort_P00_0 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_10 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_11 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_12 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_4 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_5 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_6 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P00_8 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P00_9 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P02_0 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P02_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P02_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P02_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P02_4 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P02_5 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P02_6 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P02_7 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P02_8 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P10_0 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P10_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P10_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P10_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P10_4 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P10_5 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P10_6 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P10_7 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P10_8 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P11_10 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P11_11 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P11_12 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P11_2 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P11_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P11_6 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P11_9 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P13_0 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P13_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P13_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P13_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P14_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P14_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P14_10 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P14_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P14_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P14_4 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P14_5 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P14_6 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P14_7 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P14_8 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P14_9 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P15_0 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P15_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P15_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P15_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P15_4 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P15_5 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P15_6 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P15_7 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P15_8 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P20_0 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P20_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P20_10 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P20_11 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P20_12 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P20_13 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P20_14 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P20_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P20_6 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P20_7 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P20_8 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P20_9 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P21_0 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P21_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P21_2 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P21_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P21_4 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P21_5 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P21_6 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P21_7 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P22_0 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P22_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P22_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P22_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P23_0 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P23_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P23_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P23_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P23_4 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P23_5 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P32_0 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P32_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P32_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P32_4 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P33_0 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P33_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P33_10 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P33_11 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P33_12 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P33_13 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P33_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P33_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P33_4 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P33_5 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P33_6 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P33_7 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P33_8 : IfxPort_PinMap.c , IfxPort_PinMap.h

IfxPort_P33_9 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P40_0 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P40_1 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P40_2 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P40_3 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P40_6 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P40_7 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P40_8 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_P40_9 : IfxPort_PinMap.h , IfxPort_PinMap.c

IfxPort_PadDriver : IfxPort.h

IfxPort_PadDriver_cmosAutomotiveSpeed1 : IfxPort.h

IfxPort_PadDriver_cmosAutomotiveSpeed2 : IfxPort.h

IfxPort_PadDriver_cmosAutomotiveSpeed3 : IfxPort.h

IfxPort_PadDriver_cmosAutomotiveSpeed4 : IfxPort.h

IfxPort_PadDriver_lvdsSpeed1 : IfxPort.h

IfxPort_PadDriver_lvdsSpeed2 : IfxPort.h

IfxPort_PadDriver_lvdsSpeed3 : IfxPort.h

IfxPort_PadDriver_lvdsSpeed4 : IfxPort.h

IfxPort_PadDriver_ttlSpeed1 : IfxPort.h

IfxPort_PadDriver_ttlSpeed2 : IfxPort.h

IfxPort_PadDriver_ttlSpeed3 : IfxPort.h

IfxPort_PadDriver_ttlSpeed4 : IfxPort.h

IfxPort_PadSupply : IfxPort.h

IfxPort_PadSupply_3v : IfxPort.h

IfxPort_PadSupply_5v : IfxPort.h

IfxPort_Pin_pinTable : IfxPort_PinMap.h , IfxPort_PinMap.c

IFXPORT_PINMAP_NUM_MODULES : IfxPort_PinMap.h

IFXPORT_PINMAP_PIN_NUM_ITEMS : IfxPort_PinMap.h

IfxPort_resetESR() : IfxPort.h , IfxPort.c

IfxPort_setESR() : IfxPort.h , IfxPort.c

IfxPort_setGroupModeInput() : IfxPort.h , IfxPort.c

IfxPort_setGroupModeOutput() : IfxPort.h , IfxPort.c

IfxPort_setGroupPadDriver() : IfxPort.h , IfxPort.c

IfxPort_setGroupState() : IfxPort.h

IfxPort_setPinHigh() : IfxPort.h

IfxPort_setPinLow() : IfxPort.h

IfxPort_setPinMode() : IfxPort.c , IfxPort.h

IfxPort_setPinModeInput() : IfxPort.h

IfxPort_setPinModeLvdsHigh() : IfxPort.h , IfxPort.c

IfxPort_setPinModeLvdsMedium() : IfxPort.h , IfxPort.c

IfxPort_setPinModeOutput() : IfxPort.h

IfxPort_setPinPadDriver() : IfxPort.c , IfxPort.h

IfxPort_setPinState() : IfxPort.h

IfxPort_State : IfxPort.h

IfxPort_State_high : IfxPort.h

IfxPort_State_low : IfxPort.h

IfxPort_State_notChanged : IfxPort.h

IfxPort_State_toggled : IfxPort.h

IfxPort_togglePin() : IfxPort.h

IfxPsi5_AlternateInput : IfxPsi5.h

IfxPsi5_AlternateInput_0 : IfxPsi5.h

IfxPsi5_AlternateInput_1 : IfxPsi5.h

IfxPsi5_AlternateInput_2 : IfxPsi5.h

IfxPsi5_AlternateInput_3 : IfxPsi5.h

IfxPsi5_BaudRate : IfxPsi5.h

IfxPsi5_BaudRate_125 : IfxPsi5.h

IfxPsi5_BaudRate_189 : IfxPsi5.h

IfxPsi5_ChannelId : IfxPsi5_cfg.h

IfxPsi5_ChannelId_0 : IfxPsi5_cfg.h

IfxPsi5_ChannelId_1 : IfxPsi5_cfg.h

IfxPsi5_ChannelId_2 : IfxPsi5_cfg.h

IfxPsi5_ChannelId_none : IfxPsi5_cfg.h

IfxPsi5_ClockType : IfxPsi5.h

IfxPsi5_ClockType_fastClock_189 : IfxPsi5.h

IfxPsi5_ClockType_fracDiv : IfxPsi5.h

IfxPsi5_ClockType_slowClock_125 : IfxPsi5.h

IfxPsi5_ClockType_timeStamp : IfxPsi5.h

IfxPsi5_CRCorParity : IfxPsi5.h

IfxPsi5_CRCorParity_crc : IfxPsi5.h

IfxPsi5_CRCorParity_parity : IfxPsi5.h

IFXPSI5_DEFAULT_FASTCLOCK_FREQ : IfxPsi5_cfg.h

IFXPSI5_DEFAULT_SLOWCLOCK_FREQ : IfxPsi5_cfg.h

IFXPSI5_DEFAULT_TIMESTAMP_FREQ : IfxPsi5_cfg.h

IfxPsi5_DigitalInputFilterDepth : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_0 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_1 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_10 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_11 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_12 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_13 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_14 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_15 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_2 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_3 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_4 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_5 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_6 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_7 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_8 : IfxPsi5.h

IfxPsi5_DigitalInputFilterDepth_9 : IfxPsi5.h

IfxPsi5_disableModule() : IfxPsi5.c , IfxPsi5.h

IfxPsi5_DividerMode : IfxPsi5.h

IfxPsi5_DividerMode_fractional : IfxPsi5.h

IfxPsi5_DividerMode_normal : IfxPsi5.h

IfxPsi5_DividerMode_off : IfxPsi5.h

IfxPsi5_DividerMode_spb : IfxPsi5.h

IFXPSI5_ENABLE_CHANNEL : IfxPsi5_cfg.h

IFXPSI5_ENABLE_CHANNELTRIGGER : IfxPsi5_cfg.h

IfxPsi5_enableAllChannels() : IfxPsi5.h

IfxPsi5_enableModule() : IfxPsi5.c , IfxPsi5.h

IfxPsi5_FractionalDividerRegister : IfxPsi5.h

IfxPsi5_FractionalDividerRegister_highbitrate : IfxPsi5.h

IfxPsi5_FractionalDividerRegister_lowbitrate : IfxPsi5.h

IfxPsi5_FractionalDividerRegister_normal : IfxPsi5.h

IfxPsi5_FractionalDividerRegister_timestamp : IfxPsi5.h

IfxPsi5_FrameExpectation : IfxPsi5.h

IfxPsi5_FrameExpectation_expected : IfxPsi5.h

IfxPsi5_FrameExpectation_notExpected : IfxPsi5.h

IfxPsi5_getSrcPointer() : IfxPsi5.h

IfxPsi5_getStatusCrci() : IfxPsi5.h

IfxPsi5_getStatusMei() : IfxPsi5.h

IfxPsi5_getStatusNbi() : IfxPsi5.h

IfxPsi5_getStatusNfi() : IfxPsi5.h

IfxPsi5_getStatusRdi() : IfxPsi5.h

IfxPsi5_getStatusRmi() : IfxPsi5.h

IfxPsi5_getStatusRsi() : IfxPsi5.h

IfxPsi5_getStatusTei() : IfxPsi5.h

IfxPsi5_initRxPin() : IfxPsi5.h

IfxPsi5_initTxPin() : IfxPsi5.h

IfxPsi5_InterruptServiceRequest : IfxPsi5.h

IfxPsi5_InterruptServiceRequest_0 : IfxPsi5.h

IfxPsi5_InterruptServiceRequest_1 : IfxPsi5.h

IfxPsi5_InterruptServiceRequest_2 : IfxPsi5.h

IfxPsi5_InterruptServiceRequest_3 : IfxPsi5.h

IfxPsi5_InterruptServiceRequest_4 : IfxPsi5.h

IfxPsi5_InterruptServiceRequest_5 : IfxPsi5.h

IfxPsi5_InterruptServiceRequest_6 : IfxPsi5.h

IfxPsi5_InterruptServiceRequest_7 : IfxPsi5.h

IfxPsi5_InterruptStatusRegister : IfxPsi5.h

IfxPsi5_InterruptStatusRegister_a : IfxPsi5.h

IfxPsi5_InterruptStatusRegister_b : IfxPsi5.h

IfxPsi5_isModuleSuspended() : IfxPsi5.h

IfxPsi5_MessagingBits : IfxPsi5.h

IfxPsi5_MessagingBits_absent : IfxPsi5.h

IfxPsi5_MessagingBits_present : IfxPsi5.h

IFXPSI5_NUM_CHANNELS : IfxPsi5_cfg.h

IFXPSI5_NUM_MODULES : IfxPsi5_cfg.h

IFXPSI5_NUM_SLOTS : IfxPsi5_cfg.h

IFXPSI5_NUM_WDTS : IfxPsi5_cfg.h

IFXPSI5_PINMAP_NUM_CHANNELS : IfxPsi5_PinMap.h

IFXPSI5_PINMAP_NUM_MODULES : IfxPsi5_PinMap.h

IFXPSI5_PINMAP_RX_IN_NUM_ITEMS : IfxPsi5_PinMap.h

IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS : IfxPsi5_PinMap.h

IfxPsi5_Psi5_deInitModule() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c

IfxPsi5_Psi5_enableModule() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c

IfxPsi5_Psi5_getFracDivClock() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c

IfxPsi5_Psi5_initChannel() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c

IfxPsi5_Psi5_initChannelConfig() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c

IfxPsi5_Psi5_initializeClock() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c

IfxPsi5_Psi5_initModule() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c

IfxPsi5_Psi5_initModuleConfig() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c

IfxPsi5_Psi5_readChannelFrame() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c

IfxPsi5_Psi5_readChannelSerialMessage() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c

IfxPsi5_Psi5_resetModule() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c

IfxPsi5_Psi5_sendChannelData() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h

IfxPsi5_Psi5_startupChannel() : IfxPsi5_Psi5.h

IfxPsi5_ReceiveDataRegisterTimestamp : IfxPsi5.h

IfxPsi5_ReceiveDataRegisterTimestamp_frame : IfxPsi5.h

IfxPsi5_ReceiveDataRegisterTimestamp_pulse : IfxPsi5.h

IfxPsi5_ReceiverControlRegister : IfxPsi5.h

IfxPsi5_ReceiverControlRegister_a : IfxPsi5.h

IfxPsi5_ReceiverControlRegister_b : IfxPsi5.h

IfxPsi5_ReceiverControlRegister_c : IfxPsi5.h

IfxPsi5_resetModule() : IfxPsi5.h , IfxPsi5.c

IfxPsi5_RX0A_P00_1_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_RX0B_P02_3_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_RX0C_P33_1_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_RX1A_P00_3_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_RX1B_P02_5_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_RX1C_P33_3_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_RX2A_P00_5_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_RX2B_P02_7_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_RX2C_P33_5_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_Rx_In_pinTable : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_setFractionalDivider() : IfxPsi5.h

IfxPsi5_setRxInput() : IfxPsi5.h

IfxPsi5_setSuspendMode() : IfxPsi5.h

IfxPsi5_Slot : IfxPsi5.h

IfxPsi5_Slot_0 : IfxPsi5.h

IfxPsi5_Slot_1 : IfxPsi5.h

IfxPsi5_Slot_2 : IfxPsi5.h

IfxPsi5_Slot_3 : IfxPsi5.h

IfxPsi5_Slot_4 : IfxPsi5.h

IfxPsi5_Slot_5 : IfxPsi5.h

IFXPSI5_STEP_RANGE : IfxPsi5_cfg.h

IfxPsi5_SuspendMode : IfxPsi5.h

IfxPsi5_SuspendMode_hard : IfxPsi5.h

IfxPsi5_SuspendMode_none : IfxPsi5.h

IfxPsi5_SuspendMode_soft : IfxPsi5.h

IfxPsi5_TimeBase : IfxPsi5.h

IfxPsi5_TimeBase_external : IfxPsi5.h

IfxPsi5_TimeBase_internal : IfxPsi5.h

IfxPsi5_TimestampRegister : IfxPsi5.h

IfxPsi5_TimestampRegister_a : IfxPsi5.h

IfxPsi5_TimestampRegister_b : IfxPsi5.h

IfxPsi5_TimestampRegister_c : IfxPsi5.h

IfxPsi5_Trigger : IfxPsi5.h

IfxPsi5_Trigger_0 : IfxPsi5.h

IfxPsi5_Trigger_1 : IfxPsi5.h

IfxPsi5_Trigger_2 : IfxPsi5.h

IfxPsi5_Trigger_3 : IfxPsi5.h

IfxPsi5_Trigger_4 : IfxPsi5.h

IfxPsi5_Trigger_5 : IfxPsi5.h

IfxPsi5_TriggerType : IfxPsi5.h

IfxPsi5_TriggerType_bypass : IfxPsi5.h

IfxPsi5_TriggerType_external : IfxPsi5.h

IfxPsi5_TriggerType_periodic : IfxPsi5.h

IfxPsi5_TX0_P00_2_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_TX0_P02_2_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c

IfxPsi5_TX0_P33_2_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_TX1_P00_4_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_TX1_P02_6_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_TX1_P33_4_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_TX2_P00_6_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_TX2_P02_8_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_TX2_P33_6_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_Tx_Out_pinTable : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h

IfxPsi5_Verbose : IfxPsi5.h

IfxPsi5_Verbose_off : IfxPsi5.h

IfxPsi5_Verbose_on : IfxPsi5.h

IfxPsi5s_AlternateInput : IfxPsi5s.h

IfxPsi5s_AlternateInput_0 : IfxPsi5s.h

IfxPsi5s_AlternateInput_1 : IfxPsi5s.h

IfxPsi5s_AlternateInput_2 : IfxPsi5s.h

IfxPsi5s_AlternateInput_3 : IfxPsi5s.h

IfxPsi5s_AscBaudratePrescalar : IfxPsi5s.h

IfxPsi5s_AscBaudratePrescalar_divideBy2 : IfxPsi5s.h

IfxPsi5s_AscBaudratePrescalar_divideBy3 : IfxPsi5s.h

IfxPsi5s_AscMode : IfxPsi5s.h

IfxPsi5s_AscMode_async_7bitDataWithParity : IfxPsi5s.h

IfxPsi5s_AscMode_async_8bitData : IfxPsi5s.h

IfxPsi5s_AscMode_async_8bitDataWithParity : IfxPsi5s.h

IfxPsi5s_AscMode_async_8bitDataWithWakeup : IfxPsi5s.h

IfxPsi5s_AscMode_async_9bitData : IfxPsi5s.h

IfxPsi5s_AscMode_sync : IfxPsi5s.h

IfxPsi5s_AscStopBits : IfxPsi5s.h

IfxPsi5s_AscStopBits_1 : IfxPsi5s.h

IfxPsi5s_AscStopBits_2 : IfxPsi5s.h

IFXPSI5S_BAUDRATE_1562500 : IfxPsi5s_cfg.h

IFXPSI5S_BG_RANGE : IfxPsi5s_cfg.h

IfxPsi5s_ChannelId : IfxPsi5s.h

IfxPsi5s_ChannelId_0 : IfxPsi5s.h

IfxPsi5s_ChannelId_1 : IfxPsi5s.h

IfxPsi5s_ChannelId_2 : IfxPsi5s.h

IfxPsi5s_ChannelId_3 : IfxPsi5s.h

IfxPsi5s_ChannelId_4 : IfxPsi5s.h

IfxPsi5s_ChannelId_5 : IfxPsi5s.h

IfxPsi5s_ChannelId_6 : IfxPsi5s.h

IfxPsi5s_ChannelId_7 : IfxPsi5s.h

IfxPsi5s_ChannelId_none : IfxPsi5s.h

IfxPsi5s_Clk_Out_pinTable : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c

IfxPsi5s_CLK_P02_4_OUT : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c

IfxPsi5s_CLK_P33_10_OUT : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c

IfxPsi5s_ClockType : IfxPsi5s.h

IfxPsi5s_ClockType_ascFracDiv : IfxPsi5s.h

IfxPsi5s_ClockType_ascOutput : IfxPsi5s.h

IfxPsi5s_ClockType_fracDiv : IfxPsi5s.h

IfxPsi5s_ClockType_timeStamp : IfxPsi5s.h

IfxPsi5s_CrcOrParity : IfxPsi5s.h

IfxPsi5s_CrcOrParity_crc : IfxPsi5s.h

IfxPsi5s_CrcOrParity_parity : IfxPsi5s.h

IFXPSI5S_DEFAULT_FASTCLOCK_FREQ : IfxPsi5s_cfg.h

IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ : IfxPsi5s_cfg.h

IFXPSI5S_DEFAULT_TIMESTAMP_FREQ : IfxPsi5s_cfg.h

IfxPsi5s_disableAscReceiver() : IfxPsi5s.c , IfxPsi5s.h

IfxPsi5s_disableModule() : IfxPsi5s.c , IfxPsi5s.h

IfxPsi5s_DividerMode : IfxPsi5s.h

IfxPsi5s_DividerMode_fractional : IfxPsi5s.h

IfxPsi5s_DividerMode_normal : IfxPsi5s.h

IfxPsi5s_DividerMode_off : IfxPsi5s.h

IfxPsi5s_DividerMode_spb : IfxPsi5s.h

IFXPSI5S_ENABLE_CHANNEL : IfxPsi5s_cfg.h

IFXPSI5S_ENABLE_CHANNELTRIGGER : IfxPsi5s_cfg.h

IfxPsi5s_enableAscReceiver() : IfxPsi5s.h , IfxPsi5s.c

IfxPsi5s_enableDisableChannels() : IfxPsi5s.c , IfxPsi5s.h

IfxPsi5s_enableDisableChannelTriggerCounters() : IfxPsi5s.h , IfxPsi5s.c

IfxPsi5s_EnhancedProtocol : IfxPsi5s.h

IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 : IfxPsi5s.h

IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 : IfxPsi5s.h

IfxPsi5s_EnhancedProtocol_toothGapMethod : IfxPsi5s.h

IFXPSI5S_FDV_RANGE : IfxPsi5s_cfg.h

IfxPsi5s_FrameId : IfxPsi5s.h

IfxPsi5s_FrameId_frameHeader : IfxPsi5s.h

IfxPsi5s_FrameId_rollingNumber : IfxPsi5s.h

IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK : IfxPsi5s_cfg.h

IFXPSI5S_GCR_CHANNELS_ENABLE_MASK : IfxPsi5s_cfg.h

IfxPsi5s_getReadFrameStatus() : IfxPsi5s.h , IfxPsi5s.c

IfxPsi5s_getSuccessfullyReceivedFrameStatus() : IfxPsi5s.h , IfxPsi5s.c

IfxPsi5s_IdleTime : IfxPsi5s.h

IfxPsi5s_IdleTime_1 : IfxPsi5s.h

IfxPsi5s_IdleTime_10 : IfxPsi5s.h

IfxPsi5s_IdleTime_11 : IfxPsi5s.h

IfxPsi5s_IdleTime_12 : IfxPsi5s.h

IfxPsi5s_IdleTime_13 : IfxPsi5s.h

IfxPsi5s_IdleTime_14 : IfxPsi5s.h

IfxPsi5s_IdleTime_15 : IfxPsi5s.h

IfxPsi5s_IdleTime_16 : IfxPsi5s.h

IfxPsi5s_IdleTime_2 : IfxPsi5s.h

IfxPsi5s_IdleTime_3 : IfxPsi5s.h

IfxPsi5s_IdleTime_4 : IfxPsi5s.h

IfxPsi5s_IdleTime_5 : IfxPsi5s.h

IfxPsi5s_IdleTime_6 : IfxPsi5s.h

IfxPsi5s_IdleTime_7 : IfxPsi5s.h

IfxPsi5s_IdleTime_8 : IfxPsi5s.h

IfxPsi5s_IdleTime_9 : IfxPsi5s.h

IfxPsi5s_initClkPin() : IfxPsi5s.h

IfxPsi5s_initRxPin() : IfxPsi5s.h

IfxPsi5s_initTxPin() : IfxPsi5s.h

IfxPsi5s_isModuleSuspended() : IfxPsi5s.h

IfxPsi5s_LoopBackMode : IfxPsi5s.h

IfxPsi5s_LoopBackMode_disable : IfxPsi5s.h

IfxPsi5s_LoopBackMode_enable : IfxPsi5s.h

IfxPsi5s_MessagingBits : IfxPsi5s.h

IfxPsi5s_MessagingBits_absent : IfxPsi5s.h

IfxPsi5s_MessagingBits_present : IfxPsi5s.h

IFXPSI5S_NUM_CHANNELS : IfxPsi5s_cfg.h

IFXPSI5S_NUM_MODULES : IfxPsi5s_cfg.h

IFXPSI5S_NUM_SLOTS : IfxPsi5s_cfg.h

IFXPSI5S_NUM_WDTS : IfxPsi5s_cfg.h

IfxPsi5s_NumberExpectedFrames : IfxPsi5s.h

IfxPsi5s_NumberExpectedFrames_1 : IfxPsi5s.h

IfxPsi5s_NumberExpectedFrames_2 : IfxPsi5s.h

IfxPsi5s_NumberExpectedFrames_3 : IfxPsi5s.h

IfxPsi5s_NumberExpectedFrames_4 : IfxPsi5s.h

IfxPsi5s_NumberExpectedFrames_5 : IfxPsi5s.h

IfxPsi5s_NumberExpectedFrames_6 : IfxPsi5s.h

IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS : IfxPsi5s_PinMap.h

IFXPSI5S_PINMAP_NUM_MODULES : IfxPsi5s_PinMap.h

IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS : IfxPsi5s_PinMap.h

IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS : IfxPsi5s_PinMap.h

IfxPsi5s_Psi5s_deInitModule() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h

IfxPsi5s_Psi5s_enableAscReceiver() : IfxPsi5s_Psi5s.h

IfxPsi5s_Psi5s_enableDisableChannels() : IfxPsi5s_Psi5s.h

IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters() : IfxPsi5s_Psi5s.h

IfxPsi5s_Psi5s_enableModule() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h

IfxPsi5s_Psi5s_getFracDivClock() : IfxPsi5s_Psi5s.c

IfxPsi5s_Psi5s_getReadFrameStatus() : IfxPsi5s_Psi5s.h

IfxPsi5s_Psi5s_initChannel() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h

IfxPsi5s_Psi5s_initChannelConfig() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h

IfxPsi5s_Psi5s_initializeClock() : IfxPsi5s_Psi5s.c

IfxPsi5s_Psi5s_initModule() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c

IfxPsi5s_Psi5s_initModuleConfig() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h

IfxPsi5s_Psi5s_readFrame() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c

IfxPsi5s_Psi5s_resetModule() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c

IfxPsi5s_Psi5s_sendChannelData() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c

IfxPsi5s_Psi5s_setBaudrate() : IfxPsi5s_Psi5s.c

IfxPsi5s_Psi5s_startAscTransactions() : IfxPsi5s_Psi5s.h

IfxPsi5s_resetModule() : IfxPsi5s.h , IfxPsi5s.c

IfxPsi5s_Rx_In_pinTable : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h

IfxPsi5s_RXA_P00_3_IN : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c

IfxPsi5s_RXB_P02_5_IN : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c

IfxPsi5s_RXC_P33_5_IN : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c

IfxPsi5s_setRxInput() : IfxPsi5s.h

IfxPsi5s_setSleepMode() : IfxPsi5s.h

IfxPsi5s_setSuspendMode() : IfxPsi5s.h

IfxPsi5s_SleepMode : IfxPsi5s.h

IfxPsi5s_SleepMode_disable : IfxPsi5s.h

IfxPsi5s_SleepMode_enable : IfxPsi5s.h

IfxPsi5s_startAscTransactions() : IfxPsi5s.h , IfxPsi5s.c

IFXPSI5S_STEP_RANGE : IfxPsi5s_cfg.h

IfxPsi5s_stopAscTransactions() : IfxPsi5s.c , IfxPsi5s.h

IfxPsi5s_SuspendMode : IfxPsi5s.h

IfxPsi5s_SuspendMode_hard : IfxPsi5s.h

IfxPsi5s_SuspendMode_none : IfxPsi5s.h

IfxPsi5s_SuspendMode_soft : IfxPsi5s.h

IfxPsi5s_TimeBase : IfxPsi5s.h

IfxPsi5s_TimeBase_external : IfxPsi5s.h

IfxPsi5s_TimeBase_internal : IfxPsi5s.h

IfxPsi5s_TimestampRegister : IfxPsi5s.h

IfxPsi5s_TimestampRegister_a : IfxPsi5s.h

IfxPsi5s_TimestampRegister_b : IfxPsi5s.h

IfxPsi5s_TimestampTrigger : IfxPsi5s.h

IfxPsi5s_TimestampTrigger_frame : IfxPsi5s.h

IfxPsi5s_TimestampTrigger_syncPulse : IfxPsi5s.h

IfxPsi5s_Trigger : IfxPsi5s.h

IfxPsi5s_Trigger_0 : IfxPsi5s.h

IfxPsi5s_Trigger_1 : IfxPsi5s.h

IfxPsi5s_Trigger_2 : IfxPsi5s.h

IfxPsi5s_Trigger_3 : IfxPsi5s.h

IfxPsi5s_Trigger_4 : IfxPsi5s.h

IfxPsi5s_Trigger_5 : IfxPsi5s.h

IfxPsi5s_Trigger_6 : IfxPsi5s.h

IfxPsi5s_Trigger_7 : IfxPsi5s.h

IfxPsi5s_TriggerType : IfxPsi5s.h

IfxPsi5s_TriggerType_external : IfxPsi5s.h

IfxPsi5s_TriggerType_periodic : IfxPsi5s.h

IfxPsi5s_Tx_Out_pinTable : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c

IfxPsi5s_TX_P00_4_OUT : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c

IfxPsi5s_TX_P02_6_OUT : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h

IfxPsi5s_TX_P33_6_OUT : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c

IfxPsi5s_UartFrameCount : IfxPsi5s.h

IfxPsi5s_UartFrameCount_3 : IfxPsi5s.h

IfxPsi5s_UartFrameCount_4 : IfxPsi5s.h

IfxPsi5s_UartFrameCount_5 : IfxPsi5s.h

IfxPsi5s_UartFrameCount_6 : IfxPsi5s.h

IfxPsi5s_WatchdogTimerMode : IfxPsi5s.h

IfxPsi5s_WatchdogTimerMode_frame : IfxPsi5s.h

IfxPsi5s_WatchdogTimerMode_syncPulse : IfxPsi5s.h

IfxQspi0_MRST_P20_12_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_MRSTA_P20_12_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_MTSR_P20_12_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_MTSR_P20_14_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_MTSRA_P20_14_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SCLK_P20_11_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SCLK_P20_13_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SCLKA_P20_11_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SLSIA_P20_13_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SLSIB_P20_9_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SLSO0_P20_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SLSO13_P15_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SLSO1_P20_9_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SLSO2_P20_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SLSO3_P11_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SLSO4_P11_11_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SLSO5_P11_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SLSO6_P20_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SLSO7_P33_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi0_SLSO8_P20_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi0_SLSO9_P20_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_MRST_P10_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_MRST_P10_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_MRST_P11_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_MRSTA_P10_1_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_MRSTB_P11_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_MTSR_P10_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_MTSR_P10_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_MTSR_P10_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_MTSR_P11_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_MTSRA_P10_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_MTSRB_P11_9_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_MTSRC_P10_4_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SCLK_P10_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SCLK_P11_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_SCLKA_P10_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SCLKB_P11_6_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SLSIA_P11_10_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SLSO0_P20_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_SLSO10_P10_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SLSO1_P20_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SLSO2_P20_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SLSO3_P11_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_SLSO4_P11_11_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SLSO5_P11_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_SLSO6_P33_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SLSO7_P33_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi1_SLSO8_P10_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi1_SLSO9_P10_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_HSICINA_P15_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_HSICINB_P15_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_MRST_P15_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MRST_P15_7_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MRSTA_P15_4_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MRSTB_P15_7_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_MRSTCN_P21_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MRSTCP_P21_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MRSTE_P15_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MTSR_P15_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_MTSR_P15_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MTSRA_P15_5_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_MTSRB_P15_6_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MTSRN_P13_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_MTSRP_P13_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SCLK_P15_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SCLK_P15_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SCLK_P15_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_SCLKA_P15_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SCLKB_P15_8_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_SCLKN_P13_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SCLKP_P13_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_SLSIA_P15_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSIB_P15_1_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO0_P15_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO1_P14_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_SLSO2_P14_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO3_P14_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi2_SLSO4_P14_7_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO5_P15_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO6_P33_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO7_P20_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO8_P20_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi2_SLSO9_P20_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_HSICINA_P33_9_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_HSICINB_P33_10_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_MRST_P02_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MRST_P10_7_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_MRST_P22_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MRST_P33_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MRSTA_P02_5_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MRSTB_P10_7_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_MRSTD_P33_13_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MRSTE_P22_1_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_MRSTFN_P21_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MRSTFP_P21_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MTSR_P02_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MTSR_P10_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MTSR_P22_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MTSR_P33_12_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_MTSRA_P02_6_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MTSRB_P10_6_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MTSRD_P33_12_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MTSRE_P22_0_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_MTSRN_P22_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_MTSRP_P22_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SCLK_P02_7_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SCLK_P10_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SCLK_P22_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SCLK_P33_11_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SCLKA_P02_7_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SCLKB_P10_8_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SCLKD_P33_11_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SCLKE_P22_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SCLKN_P22_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SCLKP_P22_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SLSIA_P02_4_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSIC_P33_10_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SLSID_P22_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO0_P02_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SLSO11_P33_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO12_P22_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO13_P23_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO1_P02_0_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SLSO1_P33_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO2_P02_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SLSO2_P33_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO3_P02_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO4_P02_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO4_P23_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO5_P02_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO5_P23_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SLSO6_P00_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO7_P00_9_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi3_SLSO7_P33_7_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi3_SLSO8_P10_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IFXQSPI_BACONSIZE : IfxQspi.h

IfxQspi_calcRealBaudrate() : IfxQspi.c , IfxQspi.h

IfxQspi_calculateBasicConfigurationValue() : IfxQspi.c , IfxQspi.h

IfxQspi_calculateDelayConstants() : IfxQspi.c , IfxQspi.h

IfxQspi_calculateExtendedConfigurationValue() : IfxQspi.c , IfxQspi.h

IfxQspi_calculatePrescaler() : IfxQspi.c , IfxQspi.h

IfxQspi_calculateTimeQuantumLength() : IfxQspi.c , IfxQspi.h

IfxQspi_cfg_indexMap : IfxQspi_cfg.c , IfxQspi_cfg.h

IfxQspi_ChannelId : IfxQspi.h

IfxQspi_ChannelId_0 : IfxQspi.h

IfxQspi_ChannelId_1 : IfxQspi.h

IfxQspi_ChannelId_10 : IfxQspi.h

IfxQspi_ChannelId_11 : IfxQspi.h

IfxQspi_ChannelId_12 : IfxQspi.h

IfxQspi_ChannelId_13 : IfxQspi.h

IfxQspi_ChannelId_14 : IfxQspi.h

IfxQspi_ChannelId_2 : IfxQspi.h

IfxQspi_ChannelId_3 : IfxQspi.h

IfxQspi_ChannelId_4 : IfxQspi.h

IfxQspi_ChannelId_5 : IfxQspi.h

IfxQspi_ChannelId_6 : IfxQspi.h

IfxQspi_ChannelId_7 : IfxQspi.h

IfxQspi_ChannelId_8 : IfxQspi.h

IfxQspi_ChannelId_9 : IfxQspi.h

IfxQspi_clearAllEventFlags() : IfxQspi.h

IfxQspi_clearRxReq() : IfxQspi.h

IfxQspi_clearTxReq() : IfxQspi.h

IfxQspi_configPT1Event() : IfxQspi.h

IfxQspi_configPT2Event() : IfxQspi.h

IfxQspi_DataLengthUnit : IfxQspi.h

IfxQspi_DataLengthUnit_bit : IfxQspi.h

IfxQspi_DataLengthUnit_byte : IfxQspi.h

IfxQspi_enableLoopbackMode() : IfxQspi.h

IfxQspi_enablePT1Event() : IfxQspi.h

IfxQspi_enablePT2Event() : IfxQspi.h

IfxQspi_enableUsrEvent() : IfxQspi.h

IfxQspi_Error : IfxQspi.h

IfxQspi_Error_baudrate : IfxQspi.h

IfxQspi_Error_configuration : IfxQspi.h

IfxQspi_Error_expectTimeout : IfxQspi.h

IfxQspi_Error_none : IfxQspi.h

IfxQspi_Error_parity : IfxQspi.h

IfxQspi_Error_rxfifoOverflow : IfxQspi.h

IfxQspi_Error_rxfifoUnderflow : IfxQspi.h

IfxQspi_Error_slsiMisplacedInactivation : IfxQspi.h

IfxQspi_Error_txfifoOverflow : IfxQspi.h

IfxQspi_Error_txfifoUnderflow : IfxQspi.h

IFXQSPI_ERRORENABLEMASK : IfxQspi.h

IfxQspi_ExpectTimeout : IfxQspi.h

IfxQspi_ExpectTimeout_1024 : IfxQspi.h

IfxQspi_ExpectTimeout_1048576 : IfxQspi.h

IfxQspi_ExpectTimeout_128 : IfxQspi.h

IfxQspi_ExpectTimeout_131072 : IfxQspi.h

IfxQspi_ExpectTimeout_16384 : IfxQspi.h

IfxQspi_ExpectTimeout_2048 : IfxQspi.h

IfxQspi_ExpectTimeout_2097152 : IfxQspi.h

IfxQspi_ExpectTimeout_256 : IfxQspi.h

IfxQspi_ExpectTimeout_262144 : IfxQspi.h

IfxQspi_ExpectTimeout_32768 : IfxQspi.h

IfxQspi_ExpectTimeout_4096 : IfxQspi.h

IfxQspi_ExpectTimeout_512 : IfxQspi.h

IfxQspi_ExpectTimeout_524288 : IfxQspi.h

IfxQspi_ExpectTimeout_64 : IfxQspi.h

IfxQspi_ExpectTimeout_65536 : IfxQspi.h

IfxQspi_ExpectTimeout_8192 : IfxQspi.h

IFXQSPI_FIFO32BITSIZE : IfxQspi.h

IfxQspi_FifoMode : IfxQspi.h

IfxQspi_FifoMode_batchMove : IfxQspi.h

IfxQspi_FifoMode_combinedMove : IfxQspi.h

IfxQspi_FifoMode_singleMove : IfxQspi.h

IfxQspi_getAddress() : IfxQspi.c , IfxQspi.h

IfxQspi_getErrorFlags() : IfxQspi.h

IfxQspi_getErrorSrc() : IfxQspi.h

IfxQspi_getIndex() : IfxQspi.c , IfxQspi.h

IFXQSPI_GETLONGMODEFIFOSIZE : IfxQspi.h

IfxQspi_getMode() : IfxQspi.h

IfxQspi_getModuleFrequency() : IfxQspi.h

IfxQspi_getPhase() : IfxQspi.h

IfxQspi_getReceiveFifoLevel() : IfxQspi.h

IfxQspi_getReceiveSrc() : IfxQspi.h

IfxQspi_getRxFifoMode() : IfxQspi.h

IfxQspi_getTimeQuantaFrequency() : IfxQspi.h

IfxQspi_getTransmitFifoLevel() : IfxQspi.h

IfxQspi_getTransmitSrc() : IfxQspi.h

IfxQspi_getTxFifoMode() : IfxQspi.h

IfxQspi_Hsicin_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IFXQSPI_HWFIFO_DEPTH : IfxQspi_cfg.h

IfxQspi_Index : IfxQspi_cfg.h

IfxQspi_Index_0 : IfxQspi_cfg.h

IfxQspi_Index_1 : IfxQspi_cfg.h

IfxQspi_Index_2 : IfxQspi_cfg.h

IfxQspi_Index_3 : IfxQspi_cfg.h

IfxQspi_Index_none : IfxQspi_cfg.h

IfxQspi_initMrstInPin() : IfxQspi.h

IfxQspi_initMrstInPinWithPadLevel() : IfxQspi.h

IfxQspi_initMrstOutPin() : IfxQspi.h

IfxQspi_initMtsrInPin() : IfxQspi.h

IfxQspi_initMtsrInPinWithPadLevel() : IfxQspi.h

IfxQspi_initMtsrOutPin() : IfxQspi.h

IfxQspi_initSclkInPin() : IfxQspi.h

IfxQspi_initSclkInPinWithPadLevel() : IfxQspi.h

IfxQspi_initSclkOutPin() : IfxQspi.h

IfxQspi_initSlsi() : IfxQspi.h

IfxQspi_initSlsiWithPadLevel() : IfxQspi.h

IfxQspi_initSlso() : IfxQspi.h

IfxQspi_isModuleEnabled() : IfxQspi.h

IfxQspi_isModuleSuspended() : IfxQspi.h

IfxQspi_Mode : IfxQspi.h

IfxQspi_Mode_master : IfxQspi.h

IfxQspi_Mode_pwmOverQspi : IfxQspi.h

IfxQspi_Mode_slave : IfxQspi.h

IfxQspi_Mrst_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi_Mrst_Out_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi_Mtsr_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi_Mtsr_Out_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IFXQSPI_NUM_CHANNELS : IfxQspi_cfg.h

IFXQSPI_NUM_MODULES : IfxQspi_cfg.h

IfxQspi_pause() : IfxQspi.h

IfxQspi_PauseRunTransition : IfxQspi.h

IfxQspi_PauseRunTransition_pause : IfxQspi.h

IfxQspi_PauseRunTransition_run : IfxQspi.h

IfxQspi_permutateBigEndian() : IfxQspi.h

IfxQspi_Phase : IfxQspi.h

IfxQspi_Phase_data : IfxQspi.h

IfxQspi_Phase_expect : IfxQspi.h

IfxQspi_Phase_idleA : IfxQspi.h

IfxQspi_Phase_idleB : IfxQspi.h

IfxQspi_Phase_lead : IfxQspi.h

IfxQspi_Phase_leadStrobe : IfxQspi.h

IfxQspi_Phase_trail : IfxQspi.h

IfxQspi_Phase_trailStrobe : IfxQspi.h

IfxQspi_Phase_wait : IfxQspi.h

IfxQspi_PhaseTransitionEvent : IfxQspi.h

IfxQspi_PhaseTransitionEvent_dataNotAvailable : IfxQspi.h

IfxQspi_PhaseTransitionEvent_endOfExpect : IfxQspi.h

IfxQspi_PhaseTransitionEvent_endOfFrame : IfxQspi.h

IfxQspi_PhaseTransitionEvent_endOfWait : IfxQspi.h

IfxQspi_PhaseTransitionEvent_receiveBufferFilled : IfxQspi.h

IfxQspi_PhaseTransitionEvent_serialClockPolarityChange : IfxQspi.h

IfxQspi_PhaseTransitionEvent_startOfFrame : IfxQspi.h

IfxQspi_PhaseTransitionEvent_transmitBufferEmptied : IfxQspi.h

IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS : IfxQspi_PinMap.h

IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS : IfxQspi_PinMap.h

IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS : IfxQspi_PinMap.h

IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS : IfxQspi_PinMap.h

IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS : IfxQspi_PinMap.h

IFXQSPI_PINMAP_NUM_MODULES : IfxQspi_PinMap.h

IFXQSPI_PINMAP_NUM_SLAVESELECTS : IfxQspi_PinMap.h

IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS : IfxQspi_PinMap.h

IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS : IfxQspi_PinMap.h

IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS : IfxQspi_PinMap.h

IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS : IfxQspi_PinMap.h

IfxQspi_read16() : IfxQspi.c , IfxQspi.h

IfxQspi_read32() : IfxQspi.h , IfxQspi.c

IfxQspi_read8() : IfxQspi.c , IfxQspi.h

IfxQspi_readReceiveFifo() : IfxQspi.h

IfxQspi_recalcBasicConfiguration() : IfxQspi.c , IfxQspi.h

IfxQspi_requestReset() : IfxQspi.h

IfxQspi_Reset : IfxQspi.h

IfxQspi_Reset_kernel : IfxQspi.h

IfxQspi_Reset_none : IfxQspi.h

IfxQspi_Reset_stateMachineAndFifo : IfxQspi.h

IfxQspi_resetModule() : IfxQspi.h , IfxQspi.c

IfxQspi_run() : IfxQspi.h

IfxQspi_RxFifoInt : IfxQspi.h

IfxQspi_RxFifoInt_0 : IfxQspi.h

IfxQspi_RxFifoInt_1 : IfxQspi.h

IfxQspi_RxFifoInt_2 : IfxQspi.h

IfxQspi_RxFifoInt_3 : IfxQspi.h

IfxQspi_Sclk_In_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c

IfxQspi_Sclk_Out_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi_setBitsegment1() : IfxQspi.h

IfxQspi_setBitsegment2() : IfxQspi.h

IfxQspi_setBitsegment3() : IfxQspi.h

IfxQspi_setDisableModuleRequest() : IfxQspi.h

IfxQspi_setEnableModuleRequest() : IfxQspi.h

IfxQspi_setReceiveFifoInterrruptThreshold() : IfxQspi.h

IfxQspi_setRxFifoMode() : IfxQspi.h

IfxQspi_setSlaveSelectOutputControl() : IfxQspi.c , IfxQspi.h

IfxQspi_setSleepMode() : IfxQspi.h

IfxQspi_setSuspendMode() : IfxQspi.h

IfxQspi_setTimeQuantum() : IfxQspi.h

IfxQspi_setTransmitFifoInterrruptThreshold() : IfxQspi.h

IfxQspi_setTxFifoMode() : IfxQspi.h

IfxQspi_SleepMode : IfxQspi.h

IfxQspi_SleepMode_disable : IfxQspi.h

IfxQspi_SleepMode_enable : IfxQspi.h

IfxQspi_Slsi_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi_Slso_Out_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h

IfxQspi_SpiMaster_activateSlso() : IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_activeChannel() : IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_AutoSlso : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_Channel : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_ChannelBasedCs : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_ChannelBasedCs_disabled : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_ChannelBasedCs_enabled : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_deactivateSlso() : IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_exchange() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_getChannelConfig() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_getStatus() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_initChannel() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_initChannelConfig() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_initModule() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_initModuleConfig() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_isrDmaReceive() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_isrDmaTransmit() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_isrError() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_isrPhaseTransition() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_isrReceive() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_isrTransmit() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_isrUserDefined() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_lock() : IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_Mode : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_Mode_long : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_Mode_longContinuous : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_Mode_short : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_Mode_shortContinuous : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_Mode_xxl : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_packLongModeBuffer() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_read() : IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_readReceiveFifo() : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_setChannelBaudrate() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_unlock() : IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_write() : IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_writeBasicConfiguration() : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_writeExtendedConfiguration() : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_writeLong() : IfxQspi_SpiMaster.c

IfxQspi_SpiMaster_writeMixedDataConfiguration() : IfxQspi_SpiMaster.h

IfxQspi_SpiMaster_writeTransmitFifo() : IfxQspi_SpiMaster.h

IfxQspi_SpiSlave_dummyRxValue : IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_dummyTxValue : IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_exchange() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_getStatus() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h

IfxQspi_SpiSlave_initModule() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_initModuleConfig() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h

IfxQspi_SpiSlave_isrDmaReceive() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_isrDmaTransmit() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h

IfxQspi_SpiSlave_isrError() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h

IfxQspi_SpiSlave_isrReceive() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h

IfxQspi_SpiSlave_isrTransmit() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_read() : IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_readReceiveFifo() : IfxQspi_SpiSlave.h

IfxQspi_SpiSlave_write() : IfxQspi_SpiSlave.c

IfxQspi_SpiSlave_writeTransmitFifo() : IfxQspi_SpiSlave.h

IfxQspi_StrobeDelay : IfxQspi.h

IfxQspi_StrobeDelay_1 : IfxQspi.h

IfxQspi_StrobeDelay_10 : IfxQspi.h

IfxQspi_StrobeDelay_11 : IfxQspi.h

IfxQspi_StrobeDelay_12 : IfxQspi.h

IfxQspi_StrobeDelay_13 : IfxQspi.h

IfxQspi_StrobeDelay_14 : IfxQspi.h

IfxQspi_StrobeDelay_15 : IfxQspi.h

IfxQspi_StrobeDelay_16 : IfxQspi.h

IfxQspi_StrobeDelay_17 : IfxQspi.h

IfxQspi_StrobeDelay_18 : IfxQspi.h

IfxQspi_StrobeDelay_19 : IfxQspi.h

IfxQspi_StrobeDelay_2 : IfxQspi.h

IfxQspi_StrobeDelay_20 : IfxQspi.h

IfxQspi_StrobeDelay_21 : IfxQspi.h

IfxQspi_StrobeDelay_22 : IfxQspi.h

IfxQspi_StrobeDelay_23 : IfxQspi.h

IfxQspi_StrobeDelay_24 : IfxQspi.h

IfxQspi_StrobeDelay_25 : IfxQspi.h

IfxQspi_StrobeDelay_26 : IfxQspi.h

IfxQspi_StrobeDelay_27 : IfxQspi.h

IfxQspi_StrobeDelay_28 : IfxQspi.h

IfxQspi_StrobeDelay_29 : IfxQspi.h

IfxQspi_StrobeDelay_3 : IfxQspi.h

IfxQspi_StrobeDelay_30 : IfxQspi.h

IfxQspi_StrobeDelay_31 : IfxQspi.h

IfxQspi_StrobeDelay_32 : IfxQspi.h

IfxQspi_StrobeDelay_4 : IfxQspi.h

IfxQspi_StrobeDelay_5 : IfxQspi.h

IfxQspi_StrobeDelay_6 : IfxQspi.h

IfxQspi_StrobeDelay_7 : IfxQspi.h

IfxQspi_StrobeDelay_8 : IfxQspi.h

IfxQspi_StrobeDelay_9 : IfxQspi.h

IfxQspi_SuspendMode : IfxQspi.h

IfxQspi_SuspendMode_hard : IfxQspi.h

IfxQspi_SuspendMode_none : IfxQspi.h

IfxQspi_SuspendMode_soft : IfxQspi.h

IfxQspi_TxFifoInt : IfxQspi.h

IfxQspi_TxFifoInt_1 : IfxQspi.h

IfxQspi_TxFifoInt_2 : IfxQspi.h

IfxQspi_TxFifoInt_3 : IfxQspi.h

IfxQspi_TxFifoInt_4 : IfxQspi.h

IfxQspi_write16() : IfxQspi.h , IfxQspi.c

IfxQspi_write32() : IfxQspi.c , IfxQspi.h

IfxQspi_write8() : IfxQspi.c , IfxQspi.h

IfxQspi_writeBasicConfiguration() : IfxQspi.h

IfxQspi_writeBasicConfigurationBeginStream() : IfxQspi.h

IfxQspi_writeBasicConfigurationEndStream() : IfxQspi.h

IfxQspi_writeExtendedConfiguration() : IfxQspi.h

IfxQspi_writeMixedDataTransmitFifo() : IfxQspi.h

IfxQspi_writeTransmitFifo() : IfxQspi.h

IfxScu_CCUCON0_CLKSEL : IfxScu_cfg.h

IfxScu_CCUCON0_CLKSEL_fBack : IfxScu_cfg.h

IfxScu_CCUCON0_CLKSEL_fPll : IfxScu_cfg.h

IfxScu_CCUCON1_INSEL : IfxScu_cfg.h

IfxScu_CCUCON1_INSEL_fOsc0 : IfxScu_cfg.h

IfxScu_CCUCON1_INSEL_fOsc1 : IfxScu_cfg.h

IFXSCU_CFG_ASCLINFDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_ASCLINFDIV_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_ASCLINFDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_ASCLINFDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_ASCLINFDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_ASCLINFDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_ASCLINSDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_ASCLINSDIV_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_ASCLINSDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_ASCLINSDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_ASCLINSDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_ASCLINSDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_BAUD1DIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_BAUD1DIV_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_BAUD1DIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_BAUD1DIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_BAUD1DIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_BAUD1DIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_BAUD2DIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_BAUD2DIV_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_BAUD2DIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_BAUD2DIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_BAUD2DIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_BAUD2DIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_BBBDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_BBBDIV_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_BBBDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_BBBDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_BBBDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_BBBDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_CANDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_CANDIV_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_CANDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_CANDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_CANDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_CANDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_CCUCON0 : IfxScu_cfg.h

IFXSCU_CFG_CCUCON0_BASIC : IfxScu_cfg.h

IFXSCU_CFG_CCUCON0_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_CCUCON0_MASK : IfxScu_cfg.h

IFXSCU_CFG_CCUCON1 : IfxScu_cfg.h

IFXSCU_CFG_CCUCON1_BASIC : IfxScu_cfg.h

IFXSCU_CFG_CCUCON1_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_CCUCON1_MASK : IfxScu_cfg.h

IFXSCU_CFG_CCUCON2 : IfxScu_cfg.h

IFXSCU_CFG_CCUCON2_BASIC : IfxScu_cfg.h

IFXSCU_CFG_CCUCON2_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_CCUCON2_MASK : IfxScu_cfg.h

IFXSCU_CFG_CCUCON5 : IfxScu_cfg.h

IFXSCU_CFG_CCUCON5_BASIC : IfxScu_cfg.h

IFXSCU_CFG_CCUCON5_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_CCUCON5_MASK : IfxScu_cfg.h

IFXSCU_CFG_CCUCON6 : IfxScu_cfg.h

IFXSCU_CFG_CCUCON6_BASIC : IfxScu_cfg.h

IFXSCU_CFG_CCUCON6_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_CCUCON6_MASK : IfxScu_cfg.h

IFXSCU_CFG_CCUCON7 : IfxScu_cfg.h

IFXSCU_CFG_CCUCON7_BASIC : IfxScu_cfg.h

IFXSCU_CFG_CCUCON7_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_CCUCON7_MASK : IfxScu_cfg.h

IFXSCU_CFG_CLK_DISTRIBUTION : IfxScu_cfg.h

IFXSCU_CFG_CPU0DIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU0DIV_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU0DIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU0DIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU0DIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU0DIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU1DIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU1DIV_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU1DIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU1DIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU1DIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_CPU1DIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_ERAYDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_ERAYDIV_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_ERAYDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_ERAYDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_ERAYDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_ERAYDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_ETHDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_ETHDIV_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_ETHDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_ETHDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_ETHDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_ETHDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_FLASH_WAITSTATE : IfxScu_cfg.h

IFXSCU_CFG_FLASH_WAITSTATE_MSK : IfxScu_cfg.h

IFXSCU_CFG_FLASH_WAITSTATE_VAL : IfxScu_cfg.h

IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC : IfxScu_cfg.h

IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_FSI2DIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSI2DIV_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSI2DIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSI2DIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSI2DIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSI2DIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSIDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSIDIV_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSIDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSIDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSIDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_FSIDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_GTMDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_GTMDIV_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_GTMDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_GTMDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_GTMDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_GTMDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_MAXDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_MAXDIV_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_MAXDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_MAXDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_MAXDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_MAXDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_FREQ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_BASIC : IfxScu_cfg.h

IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_BASIC : IfxScu_cfg.h

IFXSCU_CFG_PLL_STEPS_BASIC_ : IfxScu_cfg.h

IFXSCU_CFG_SPBDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_SPBDIV_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_SPBDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_SPBDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_SPBDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_SPBDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_SRIDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_SRIDIV_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_SRIDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_SRIDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_SRIDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_SRIDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_STMDIV_133MHZ : IfxScu_cfg.h

IFXSCU_CFG_STMDIV_160MHZ : IfxScu_cfg.h

IFXSCU_CFG_STMDIV_200MHZ : IfxScu_cfg.h

IFXSCU_CFG_STMDIV_240MHZ : IfxScu_cfg.h

IFXSCU_CFG_STMDIV_300MHZ : IfxScu_cfg.h

IFXSCU_CFG_STMDIV_80MHZ : IfxScu_cfg.h

IFXSCU_CFG_XTAL_FREQ : IfxScu_cfg.h

IfxScu_Dcdcsync_Out_pinTable : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_DCDCSYNC_P32_2_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_DCDCSYNC_P33_13_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_Emgstop_In_pinTable : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_EMGSTOPA_P33_8_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_EMGSTOPB_P21_2_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IFXSCU_EVR_OSC_FREQUENCY : IfxScu_cfg.h

IfxScu_Evrwup_In_pinTable : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_EVRWUPA_P14_1_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_EVRWUPB_P15_1_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_EXTCLK0_P23_1_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_EXTCLK1_P11_12_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_EXTCLK1_P32_4_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_Extclk_Out_pinTable : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_HWCFG0DCLDO_P14_6_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_HWCFG1EVR33_P14_5_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_HWCFG2EVR13_P14_2_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_HWCFG3_BMI_P14_3_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_HWCFG4_P10_5_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_HWCFG5_P10_6_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_HWCFG6_P14_4_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_Hwcfg_In_pinTable : IfxScu_PinMap.h , IfxScu_PinMap.c

IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS : IfxScu_PinMap.h

IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS : IfxScu_PinMap.h

IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS : IfxScu_PinMap.h

IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS : IfxScu_PinMap.h

IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS : IfxScu_PinMap.h

IFXSCU_PINMAP_NUM_MODULES : IfxScu_PinMap.h

IFXSCU_PINMAP_NUM_REQUESTS : IfxScu_PinMap.h

IFXSCU_PINMAP_REQ_IN_NUM_ITEMS : IfxScu_PinMap.h

IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS : IfxScu_PinMap.h

IFXSCU_PLL_FREERUNNING_FREQUENCY : IfxScu_cfg.h

IfxScu_PMCSR_REQSLP : IfxScu_cfg.h

IfxScu_PMCSR_REQSLP_Idle : IfxScu_cfg.h

IfxScu_PMCSR_REQSLP_Run : IfxScu_cfg.h

IfxScu_PMCSR_REQSLP_Sleep : IfxScu_cfg.h

IfxScu_PMCSR_REQSLP_Stby : IfxScu_cfg.h

IfxScu_REQ0_P15_4_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_REQ10_P14_3_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_REQ11_P20_9_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_REQ12_P11_10_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_REQ13_P15_5_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_REQ14_P02_1_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_REQ15_P14_1_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_REQ16_P15_1_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_REQ1_P15_8_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_REQ2_P10_2_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_REQ3_P10_3_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_REQ4_P10_7_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_REQ5_P10_8_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_REQ6_P02_0_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_REQ7_P00_4_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_REQ8_P33_7_IN : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_REQ9_P20_0_IN : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_Req_In_pinTable : IfxScu_PinMap.h , IfxScu_PinMap.c

IFXSCU_VCO_BASE_FREQUENCY : IfxScu_cfg.h

IfxScu_WDT0LCK_P20_8_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_WDT1LCK_P20_7_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScu_WDTCON1_IR : IfxScu_cfg.h

IfxScu_WDTCON1_IR_divBy16384 : IfxScu_cfg.h

IfxScu_WDTCON1_IR_divBy256 : IfxScu_cfg.h

IfxScu_WDTCON1_IR_divBy64 : IfxScu_cfg.h

IfxScu_Wdtlck_Out_pinTable : IfxScu_PinMap.c , IfxScu_PinMap.h

IfxScu_WDTSLCK_P20_9_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c

IfxScuCcu_aDefaultPllConfigSteps : IfxScuCcu.c

IfxScuCcu_calculateSysPllDividers() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_defaultClockConfig : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_defaultErayPllConfig : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_getBaud1Frequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_getBaud2Frequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_getBbbFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_getCanFrequency() : IfxScuCcu.h

IfxScuCcu_getCpuFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_getEvrFrequency() : IfxScuCcu.h

IfxScuCcu_getFsi2Frequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_getFsiFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_getGtmFrequency() : IfxScuCcu.h

IfxScuCcu_getMaxFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_getModuleFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_getOsc0Frequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_getOscFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_getPll2ErayFrequency() : IfxScuCcu.h

IfxScuCcu_getPll2Frequency() : IfxScuCcu.h

IfxScuCcu_getPllErayFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_getPllErayVcoFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_getPllFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_getPllVcoFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_getSourceFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_getSourceSelection() : IfxScuCcu.h

IfxScuCcu_getSpbFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_getSriFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_getStmFrequency() : IfxScuCcu.h

IfxScuCcu_init() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_initConfig() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_initErayPll() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_initErayPllConfig() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_isOscillatorStable() : IfxScuCcu.c

IfxScuCcu_K1divider : IfxScuCcu.h

IfxScuCcu_K1divider_1 : IfxScuCcu.h

IfxScuCcu_K1divider_10 : IfxScuCcu.h

IfxScuCcu_K1divider_100 : IfxScuCcu.h

IfxScuCcu_K1divider_101 : IfxScuCcu.h

IfxScuCcu_K1divider_102 : IfxScuCcu.h

IfxScuCcu_K1divider_103 : IfxScuCcu.h

IfxScuCcu_K1divider_104 : IfxScuCcu.h

IfxScuCcu_K1divider_105 : IfxScuCcu.h

IfxScuCcu_K1divider_106 : IfxScuCcu.h

IfxScuCcu_K1divider_107 : IfxScuCcu.h

IfxScuCcu_K1divider_108 : IfxScuCcu.h

IfxScuCcu_K1divider_109 : IfxScuCcu.h

IfxScuCcu_K1divider_11 : IfxScuCcu.h

IfxScuCcu_K1divider_110 : IfxScuCcu.h

IfxScuCcu_K1divider_111 : IfxScuCcu.h

IfxScuCcu_K1divider_112 : IfxScuCcu.h

IfxScuCcu_K1divider_113 : IfxScuCcu.h

IfxScuCcu_K1divider_114 : IfxScuCcu.h

IfxScuCcu_K1divider_115 : IfxScuCcu.h

IfxScuCcu_K1divider_116 : IfxScuCcu.h

IfxScuCcu_K1divider_117 : IfxScuCcu.h

IfxScuCcu_K1divider_118 : IfxScuCcu.h

IfxScuCcu_K1divider_119 : IfxScuCcu.h

IfxScuCcu_K1divider_12 : IfxScuCcu.h

IfxScuCcu_K1divider_120 : IfxScuCcu.h

IfxScuCcu_K1divider_121 : IfxScuCcu.h

IfxScuCcu_K1divider_122 : IfxScuCcu.h

IfxScuCcu_K1divider_123 : IfxScuCcu.h

IfxScuCcu_K1divider_124 : IfxScuCcu.h

IfxScuCcu_K1divider_125 : IfxScuCcu.h

IfxScuCcu_K1divider_126 : IfxScuCcu.h

IfxScuCcu_K1divider_127 : IfxScuCcu.h

IfxScuCcu_K1divider_128 : IfxScuCcu.h

IfxScuCcu_K1divider_13 : IfxScuCcu.h

IfxScuCcu_K1divider_14 : IfxScuCcu.h

IfxScuCcu_K1divider_15 : IfxScuCcu.h

IfxScuCcu_K1divider_16 : IfxScuCcu.h

IfxScuCcu_K1divider_17 : IfxScuCcu.h

IfxScuCcu_K1divider_18 : IfxScuCcu.h

IfxScuCcu_K1divider_19 : IfxScuCcu.h

IfxScuCcu_K1divider_2 : IfxScuCcu.h

IfxScuCcu_K1divider_20 : IfxScuCcu.h

IfxScuCcu_K1divider_21 : IfxScuCcu.h

IfxScuCcu_K1divider_22 : IfxScuCcu.h

IfxScuCcu_K1divider_23 : IfxScuCcu.h

IfxScuCcu_K1divider_24 : IfxScuCcu.h

IfxScuCcu_K1divider_25 : IfxScuCcu.h

IfxScuCcu_K1divider_26 : IfxScuCcu.h

IfxScuCcu_K1divider_27 : IfxScuCcu.h

IfxScuCcu_K1divider_28 : IfxScuCcu.h

IfxScuCcu_K1divider_29 : IfxScuCcu.h

IfxScuCcu_K1divider_3 : IfxScuCcu.h

IfxScuCcu_K1divider_30 : IfxScuCcu.h

IfxScuCcu_K1divider_31 : IfxScuCcu.h

IfxScuCcu_K1divider_32 : IfxScuCcu.h

IfxScuCcu_K1divider_33 : IfxScuCcu.h

IfxScuCcu_K1divider_34 : IfxScuCcu.h

IfxScuCcu_K1divider_35 : IfxScuCcu.h

IfxScuCcu_K1divider_36 : IfxScuCcu.h

IfxScuCcu_K1divider_37 : IfxScuCcu.h

IfxScuCcu_K1divider_38 : IfxScuCcu.h

IfxScuCcu_K1divider_39 : IfxScuCcu.h

IfxScuCcu_K1divider_4 : IfxScuCcu.h

IfxScuCcu_K1divider_40 : IfxScuCcu.h

IfxScuCcu_K1divider_41 : IfxScuCcu.h

IfxScuCcu_K1divider_42 : IfxScuCcu.h

IfxScuCcu_K1divider_43 : IfxScuCcu.h

IfxScuCcu_K1divider_44 : IfxScuCcu.h

IfxScuCcu_K1divider_45 : IfxScuCcu.h

IfxScuCcu_K1divider_46 : IfxScuCcu.h

IfxScuCcu_K1divider_47 : IfxScuCcu.h

IfxScuCcu_K1divider_48 : IfxScuCcu.h

IfxScuCcu_K1divider_49 : IfxScuCcu.h

IfxScuCcu_K1divider_5 : IfxScuCcu.h

IfxScuCcu_K1divider_50 : IfxScuCcu.h

IfxScuCcu_K1divider_51 : IfxScuCcu.h

IfxScuCcu_K1divider_52 : IfxScuCcu.h

IfxScuCcu_K1divider_53 : IfxScuCcu.h

IfxScuCcu_K1divider_54 : IfxScuCcu.h

IfxScuCcu_K1divider_55 : IfxScuCcu.h

IfxScuCcu_K1divider_56 : IfxScuCcu.h

IfxScuCcu_K1divider_57 : IfxScuCcu.h

IfxScuCcu_K1divider_58 : IfxScuCcu.h

IfxScuCcu_K1divider_59 : IfxScuCcu.h

IfxScuCcu_K1divider_6 : IfxScuCcu.h

IfxScuCcu_K1divider_60 : IfxScuCcu.h

IfxScuCcu_K1divider_61 : IfxScuCcu.h

IfxScuCcu_K1divider_62 : IfxScuCcu.h

IfxScuCcu_K1divider_63 : IfxScuCcu.h

IfxScuCcu_K1divider_64 : IfxScuCcu.h

IfxScuCcu_K1divider_65 : IfxScuCcu.h

IfxScuCcu_K1divider_66 : IfxScuCcu.h

IfxScuCcu_K1divider_67 : IfxScuCcu.h

IfxScuCcu_K1divider_68 : IfxScuCcu.h

IfxScuCcu_K1divider_69 : IfxScuCcu.h

IfxScuCcu_K1divider_7 : IfxScuCcu.h

IfxScuCcu_K1divider_70 : IfxScuCcu.h

IfxScuCcu_K1divider_71 : IfxScuCcu.h

IfxScuCcu_K1divider_72 : IfxScuCcu.h

IfxScuCcu_K1divider_73 : IfxScuCcu.h

IfxScuCcu_K1divider_74 : IfxScuCcu.h

IfxScuCcu_K1divider_75 : IfxScuCcu.h

IfxScuCcu_K1divider_76 : IfxScuCcu.h

IfxScuCcu_K1divider_77 : IfxScuCcu.h

IfxScuCcu_K1divider_78 : IfxScuCcu.h

IfxScuCcu_K1divider_79 : IfxScuCcu.h

IfxScuCcu_K1divider_8 : IfxScuCcu.h

IfxScuCcu_K1divider_80 : IfxScuCcu.h

IfxScuCcu_K1divider_81 : IfxScuCcu.h

IfxScuCcu_K1divider_82 : IfxScuCcu.h

IfxScuCcu_K1divider_83 : IfxScuCcu.h

IfxScuCcu_K1divider_84 : IfxScuCcu.h

IfxScuCcu_K1divider_85 : IfxScuCcu.h

IfxScuCcu_K1divider_86 : IfxScuCcu.h

IfxScuCcu_K1divider_87 : IfxScuCcu.h

IfxScuCcu_K1divider_88 : IfxScuCcu.h

IfxScuCcu_K1divider_89 : IfxScuCcu.h

IfxScuCcu_K1divider_9 : IfxScuCcu.h

IfxScuCcu_K1divider_90 : IfxScuCcu.h

IfxScuCcu_K1divider_91 : IfxScuCcu.h

IfxScuCcu_K1divider_92 : IfxScuCcu.h

IfxScuCcu_K1divider_93 : IfxScuCcu.h

IfxScuCcu_K1divider_94 : IfxScuCcu.h

IfxScuCcu_K1divider_95 : IfxScuCcu.h

IfxScuCcu_K1divider_96 : IfxScuCcu.h

IfxScuCcu_K1divider_97 : IfxScuCcu.h

IfxScuCcu_K1divider_98 : IfxScuCcu.h

IfxScuCcu_K1divider_99 : IfxScuCcu.h

IfxScuCcu_K2divider : IfxScuCcu.h

IfxScuCcu_K2divider_1 : IfxScuCcu.h

IfxScuCcu_K2divider_10 : IfxScuCcu.h

IfxScuCcu_K2divider_100 : IfxScuCcu.h

IfxScuCcu_K2divider_101 : IfxScuCcu.h

IfxScuCcu_K2divider_102 : IfxScuCcu.h

IfxScuCcu_K2divider_103 : IfxScuCcu.h

IfxScuCcu_K2divider_104 : IfxScuCcu.h

IfxScuCcu_K2divider_105 : IfxScuCcu.h

IfxScuCcu_K2divider_106 : IfxScuCcu.h

IfxScuCcu_K2divider_107 : IfxScuCcu.h

IfxScuCcu_K2divider_108 : IfxScuCcu.h

IfxScuCcu_K2divider_109 : IfxScuCcu.h

IfxScuCcu_K2divider_11 : IfxScuCcu.h

IfxScuCcu_K2divider_110 : IfxScuCcu.h

IfxScuCcu_K2divider_111 : IfxScuCcu.h

IfxScuCcu_K2divider_112 : IfxScuCcu.h

IfxScuCcu_K2divider_113 : IfxScuCcu.h

IfxScuCcu_K2divider_114 : IfxScuCcu.h

IfxScuCcu_K2divider_115 : IfxScuCcu.h

IfxScuCcu_K2divider_116 : IfxScuCcu.h

IfxScuCcu_K2divider_117 : IfxScuCcu.h

IfxScuCcu_K2divider_118 : IfxScuCcu.h

IfxScuCcu_K2divider_119 : IfxScuCcu.h

IfxScuCcu_K2divider_12 : IfxScuCcu.h

IfxScuCcu_K2divider_120 : IfxScuCcu.h

IfxScuCcu_K2divider_121 : IfxScuCcu.h

IfxScuCcu_K2divider_122 : IfxScuCcu.h

IfxScuCcu_K2divider_123 : IfxScuCcu.h

IfxScuCcu_K2divider_124 : IfxScuCcu.h

IfxScuCcu_K2divider_125 : IfxScuCcu.h

IfxScuCcu_K2divider_126 : IfxScuCcu.h

IfxScuCcu_K2divider_127 : IfxScuCcu.h

IfxScuCcu_K2divider_128 : IfxScuCcu.h

IfxScuCcu_K2divider_13 : IfxScuCcu.h

IfxScuCcu_K2divider_14 : IfxScuCcu.h

IfxScuCcu_K2divider_15 : IfxScuCcu.h

IfxScuCcu_K2divider_16 : IfxScuCcu.h

IfxScuCcu_K2divider_17 : IfxScuCcu.h

IfxScuCcu_K2divider_18 : IfxScuCcu.h

IfxScuCcu_K2divider_19 : IfxScuCcu.h

IfxScuCcu_K2divider_2 : IfxScuCcu.h

IfxScuCcu_K2divider_20 : IfxScuCcu.h

IfxScuCcu_K2divider_21 : IfxScuCcu.h

IfxScuCcu_K2divider_22 : IfxScuCcu.h

IfxScuCcu_K2divider_23 : IfxScuCcu.h

IfxScuCcu_K2divider_24 : IfxScuCcu.h

IfxScuCcu_K2divider_25 : IfxScuCcu.h

IfxScuCcu_K2divider_26 : IfxScuCcu.h

IfxScuCcu_K2divider_27 : IfxScuCcu.h

IfxScuCcu_K2divider_28 : IfxScuCcu.h

IfxScuCcu_K2divider_29 : IfxScuCcu.h

IfxScuCcu_K2divider_3 : IfxScuCcu.h

IfxScuCcu_K2divider_30 : IfxScuCcu.h

IfxScuCcu_K2divider_31 : IfxScuCcu.h

IfxScuCcu_K2divider_32 : IfxScuCcu.h

IfxScuCcu_K2divider_33 : IfxScuCcu.h

IfxScuCcu_K2divider_34 : IfxScuCcu.h

IfxScuCcu_K2divider_35 : IfxScuCcu.h

IfxScuCcu_K2divider_36 : IfxScuCcu.h

IfxScuCcu_K2divider_37 : IfxScuCcu.h

IfxScuCcu_K2divider_38 : IfxScuCcu.h

IfxScuCcu_K2divider_39 : IfxScuCcu.h

IfxScuCcu_K2divider_4 : IfxScuCcu.h

IfxScuCcu_K2divider_40 : IfxScuCcu.h

IfxScuCcu_K2divider_41 : IfxScuCcu.h

IfxScuCcu_K2divider_42 : IfxScuCcu.h

IfxScuCcu_K2divider_43 : IfxScuCcu.h

IfxScuCcu_K2divider_44 : IfxScuCcu.h

IfxScuCcu_K2divider_45 : IfxScuCcu.h

IfxScuCcu_K2divider_46 : IfxScuCcu.h

IfxScuCcu_K2divider_47 : IfxScuCcu.h

IfxScuCcu_K2divider_48 : IfxScuCcu.h

IfxScuCcu_K2divider_49 : IfxScuCcu.h

IfxScuCcu_K2divider_5 : IfxScuCcu.h

IfxScuCcu_K2divider_50 : IfxScuCcu.h

IfxScuCcu_K2divider_51 : IfxScuCcu.h

IfxScuCcu_K2divider_52 : IfxScuCcu.h

IfxScuCcu_K2divider_53 : IfxScuCcu.h

IfxScuCcu_K2divider_54 : IfxScuCcu.h

IfxScuCcu_K2divider_55 : IfxScuCcu.h

IfxScuCcu_K2divider_56 : IfxScuCcu.h

IfxScuCcu_K2divider_57 : IfxScuCcu.h

IfxScuCcu_K2divider_58 : IfxScuCcu.h

IfxScuCcu_K2divider_59 : IfxScuCcu.h

IfxScuCcu_K2divider_6 : IfxScuCcu.h

IfxScuCcu_K2divider_60 : IfxScuCcu.h

IfxScuCcu_K2divider_61 : IfxScuCcu.h

IfxScuCcu_K2divider_62 : IfxScuCcu.h

IfxScuCcu_K2divider_63 : IfxScuCcu.h

IfxScuCcu_K2divider_64 : IfxScuCcu.h

IfxScuCcu_K2divider_65 : IfxScuCcu.h

IfxScuCcu_K2divider_66 : IfxScuCcu.h

IfxScuCcu_K2divider_67 : IfxScuCcu.h

IfxScuCcu_K2divider_68 : IfxScuCcu.h

IfxScuCcu_K2divider_69 : IfxScuCcu.h

IfxScuCcu_K2divider_7 : IfxScuCcu.h

IfxScuCcu_K2divider_70 : IfxScuCcu.h

IfxScuCcu_K2divider_71 : IfxScuCcu.h

IfxScuCcu_K2divider_72 : IfxScuCcu.h

IfxScuCcu_K2divider_73 : IfxScuCcu.h

IfxScuCcu_K2divider_74 : IfxScuCcu.h

IfxScuCcu_K2divider_75 : IfxScuCcu.h

IfxScuCcu_K2divider_76 : IfxScuCcu.h

IfxScuCcu_K2divider_77 : IfxScuCcu.h

IfxScuCcu_K2divider_78 : IfxScuCcu.h

IfxScuCcu_K2divider_79 : IfxScuCcu.h

IfxScuCcu_K2divider_8 : IfxScuCcu.h

IfxScuCcu_K2divider_80 : IfxScuCcu.h

IfxScuCcu_K2divider_81 : IfxScuCcu.h

IfxScuCcu_K2divider_82 : IfxScuCcu.h

IfxScuCcu_K2divider_83 : IfxScuCcu.h

IfxScuCcu_K2divider_84 : IfxScuCcu.h

IfxScuCcu_K2divider_85 : IfxScuCcu.h

IfxScuCcu_K2divider_86 : IfxScuCcu.h

IfxScuCcu_K2divider_87 : IfxScuCcu.h

IfxScuCcu_K2divider_88 : IfxScuCcu.h

IfxScuCcu_K2divider_89 : IfxScuCcu.h

IfxScuCcu_K2divider_9 : IfxScuCcu.h

IfxScuCcu_K2divider_90 : IfxScuCcu.h

IfxScuCcu_K2divider_91 : IfxScuCcu.h

IfxScuCcu_K2divider_92 : IfxScuCcu.h

IfxScuCcu_K2divider_93 : IfxScuCcu.h

IfxScuCcu_K2divider_94 : IfxScuCcu.h

IfxScuCcu_K2divider_95 : IfxScuCcu.h

IfxScuCcu_K2divider_96 : IfxScuCcu.h

IfxScuCcu_K2divider_97 : IfxScuCcu.h

IfxScuCcu_K2divider_98 : IfxScuCcu.h

IfxScuCcu_K2divider_99 : IfxScuCcu.h

IfxScuCcu_K3divider : IfxScuCcu.h

IfxScuCcu_K3divider_1 : IfxScuCcu.h

IfxScuCcu_K3divider_10 : IfxScuCcu.h

IfxScuCcu_K3divider_100 : IfxScuCcu.h

IfxScuCcu_K3divider_101 : IfxScuCcu.h

IfxScuCcu_K3divider_102 : IfxScuCcu.h

IfxScuCcu_K3divider_103 : IfxScuCcu.h

IfxScuCcu_K3divider_104 : IfxScuCcu.h

IfxScuCcu_K3divider_105 : IfxScuCcu.h

IfxScuCcu_K3divider_106 : IfxScuCcu.h

IfxScuCcu_K3divider_107 : IfxScuCcu.h

IfxScuCcu_K3divider_108 : IfxScuCcu.h

IfxScuCcu_K3divider_109 : IfxScuCcu.h

IfxScuCcu_K3divider_11 : IfxScuCcu.h

IfxScuCcu_K3divider_110 : IfxScuCcu.h

IfxScuCcu_K3divider_111 : IfxScuCcu.h

IfxScuCcu_K3divider_112 : IfxScuCcu.h

IfxScuCcu_K3divider_113 : IfxScuCcu.h

IfxScuCcu_K3divider_114 : IfxScuCcu.h

IfxScuCcu_K3divider_115 : IfxScuCcu.h

IfxScuCcu_K3divider_116 : IfxScuCcu.h

IfxScuCcu_K3divider_117 : IfxScuCcu.h

IfxScuCcu_K3divider_118 : IfxScuCcu.h

IfxScuCcu_K3divider_119 : IfxScuCcu.h

IfxScuCcu_K3divider_12 : IfxScuCcu.h

IfxScuCcu_K3divider_120 : IfxScuCcu.h

IfxScuCcu_K3divider_121 : IfxScuCcu.h

IfxScuCcu_K3divider_122 : IfxScuCcu.h

IfxScuCcu_K3divider_123 : IfxScuCcu.h

IfxScuCcu_K3divider_124 : IfxScuCcu.h

IfxScuCcu_K3divider_125 : IfxScuCcu.h

IfxScuCcu_K3divider_126 : IfxScuCcu.h

IfxScuCcu_K3divider_127 : IfxScuCcu.h

IfxScuCcu_K3divider_128 : IfxScuCcu.h

IfxScuCcu_K3divider_13 : IfxScuCcu.h

IfxScuCcu_K3divider_14 : IfxScuCcu.h

IfxScuCcu_K3divider_15 : IfxScuCcu.h

IfxScuCcu_K3divider_16 : IfxScuCcu.h

IfxScuCcu_K3divider_17 : IfxScuCcu.h

IfxScuCcu_K3divider_18 : IfxScuCcu.h

IfxScuCcu_K3divider_19 : IfxScuCcu.h

IfxScuCcu_K3divider_2 : IfxScuCcu.h

IfxScuCcu_K3divider_20 : IfxScuCcu.h

IfxScuCcu_K3divider_21 : IfxScuCcu.h

IfxScuCcu_K3divider_22 : IfxScuCcu.h

IfxScuCcu_K3divider_23 : IfxScuCcu.h

IfxScuCcu_K3divider_24 : IfxScuCcu.h

IfxScuCcu_K3divider_25 : IfxScuCcu.h

IfxScuCcu_K3divider_26 : IfxScuCcu.h

IfxScuCcu_K3divider_27 : IfxScuCcu.h

IfxScuCcu_K3divider_28 : IfxScuCcu.h

IfxScuCcu_K3divider_29 : IfxScuCcu.h

IfxScuCcu_K3divider_3 : IfxScuCcu.h

IfxScuCcu_K3divider_30 : IfxScuCcu.h

IfxScuCcu_K3divider_31 : IfxScuCcu.h

IfxScuCcu_K3divider_32 : IfxScuCcu.h

IfxScuCcu_K3divider_33 : IfxScuCcu.h

IfxScuCcu_K3divider_34 : IfxScuCcu.h

IfxScuCcu_K3divider_35 : IfxScuCcu.h

IfxScuCcu_K3divider_36 : IfxScuCcu.h

IfxScuCcu_K3divider_37 : IfxScuCcu.h

IfxScuCcu_K3divider_38 : IfxScuCcu.h

IfxScuCcu_K3divider_39 : IfxScuCcu.h

IfxScuCcu_K3divider_4 : IfxScuCcu.h

IfxScuCcu_K3divider_40 : IfxScuCcu.h

IfxScuCcu_K3divider_41 : IfxScuCcu.h

IfxScuCcu_K3divider_42 : IfxScuCcu.h

IfxScuCcu_K3divider_43 : IfxScuCcu.h

IfxScuCcu_K3divider_44 : IfxScuCcu.h

IfxScuCcu_K3divider_45 : IfxScuCcu.h

IfxScuCcu_K3divider_46 : IfxScuCcu.h

IfxScuCcu_K3divider_47 : IfxScuCcu.h

IfxScuCcu_K3divider_48 : IfxScuCcu.h

IfxScuCcu_K3divider_49 : IfxScuCcu.h

IfxScuCcu_K3divider_5 : IfxScuCcu.h

IfxScuCcu_K3divider_50 : IfxScuCcu.h

IfxScuCcu_K3divider_51 : IfxScuCcu.h

IfxScuCcu_K3divider_52 : IfxScuCcu.h

IfxScuCcu_K3divider_53 : IfxScuCcu.h

IfxScuCcu_K3divider_54 : IfxScuCcu.h

IfxScuCcu_K3divider_55 : IfxScuCcu.h

IfxScuCcu_K3divider_56 : IfxScuCcu.h

IfxScuCcu_K3divider_57 : IfxScuCcu.h

IfxScuCcu_K3divider_58 : IfxScuCcu.h

IfxScuCcu_K3divider_59 : IfxScuCcu.h

IfxScuCcu_K3divider_6 : IfxScuCcu.h

IfxScuCcu_K3divider_60 : IfxScuCcu.h

IfxScuCcu_K3divider_61 : IfxScuCcu.h

IfxScuCcu_K3divider_62 : IfxScuCcu.h

IfxScuCcu_K3divider_63 : IfxScuCcu.h

IfxScuCcu_K3divider_64 : IfxScuCcu.h

IfxScuCcu_K3divider_65 : IfxScuCcu.h

IfxScuCcu_K3divider_66 : IfxScuCcu.h

IfxScuCcu_K3divider_67 : IfxScuCcu.h

IfxScuCcu_K3divider_68 : IfxScuCcu.h

IfxScuCcu_K3divider_69 : IfxScuCcu.h

IfxScuCcu_K3divider_7 : IfxScuCcu.h

IfxScuCcu_K3divider_70 : IfxScuCcu.h

IfxScuCcu_K3divider_71 : IfxScuCcu.h

IfxScuCcu_K3divider_72 : IfxScuCcu.h

IfxScuCcu_K3divider_73 : IfxScuCcu.h

IfxScuCcu_K3divider_74 : IfxScuCcu.h

IfxScuCcu_K3divider_75 : IfxScuCcu.h

IfxScuCcu_K3divider_76 : IfxScuCcu.h

IfxScuCcu_K3divider_77 : IfxScuCcu.h

IfxScuCcu_K3divider_78 : IfxScuCcu.h

IfxScuCcu_K3divider_79 : IfxScuCcu.h

IfxScuCcu_K3divider_8 : IfxScuCcu.h

IfxScuCcu_K3divider_80 : IfxScuCcu.h

IfxScuCcu_K3divider_81 : IfxScuCcu.h

IfxScuCcu_K3divider_82 : IfxScuCcu.h

IfxScuCcu_K3divider_83 : IfxScuCcu.h

IfxScuCcu_K3divider_84 : IfxScuCcu.h

IfxScuCcu_K3divider_85 : IfxScuCcu.h

IfxScuCcu_K3divider_86 : IfxScuCcu.h

IfxScuCcu_K3divider_87 : IfxScuCcu.h

IfxScuCcu_K3divider_88 : IfxScuCcu.h

IfxScuCcu_K3divider_89 : IfxScuCcu.h

IfxScuCcu_K3divider_9 : IfxScuCcu.h

IfxScuCcu_K3divider_90 : IfxScuCcu.h

IfxScuCcu_K3divider_91 : IfxScuCcu.h

IfxScuCcu_K3divider_92 : IfxScuCcu.h

IfxScuCcu_K3divider_93 : IfxScuCcu.h

IfxScuCcu_K3divider_94 : IfxScuCcu.h

IfxScuCcu_K3divider_95 : IfxScuCcu.h

IfxScuCcu_K3divider_96 : IfxScuCcu.h

IfxScuCcu_K3divider_97 : IfxScuCcu.h

IfxScuCcu_K3divider_98 : IfxScuCcu.h

IfxScuCcu_K3divider_99 : IfxScuCcu.h

IfxScuCcu_Ndivider : IfxScuCcu.h

IfxScuCcu_Ndivider_1 : IfxScuCcu.h

IfxScuCcu_Ndivider_10 : IfxScuCcu.h

IfxScuCcu_Ndivider_100 : IfxScuCcu.h

IfxScuCcu_Ndivider_101 : IfxScuCcu.h

IfxScuCcu_Ndivider_102 : IfxScuCcu.h

IfxScuCcu_Ndivider_103 : IfxScuCcu.h

IfxScuCcu_Ndivider_104 : IfxScuCcu.h

IfxScuCcu_Ndivider_105 : IfxScuCcu.h

IfxScuCcu_Ndivider_106 : IfxScuCcu.h

IfxScuCcu_Ndivider_107 : IfxScuCcu.h

IfxScuCcu_Ndivider_108 : IfxScuCcu.h

IfxScuCcu_Ndivider_109 : IfxScuCcu.h

IfxScuCcu_Ndivider_11 : IfxScuCcu.h

IfxScuCcu_Ndivider_110 : IfxScuCcu.h

IfxScuCcu_Ndivider_111 : IfxScuCcu.h

IfxScuCcu_Ndivider_112 : IfxScuCcu.h

IfxScuCcu_Ndivider_113 : IfxScuCcu.h

IfxScuCcu_Ndivider_114 : IfxScuCcu.h

IfxScuCcu_Ndivider_115 : IfxScuCcu.h

IfxScuCcu_Ndivider_116 : IfxScuCcu.h

IfxScuCcu_Ndivider_117 : IfxScuCcu.h

IfxScuCcu_Ndivider_118 : IfxScuCcu.h

IfxScuCcu_Ndivider_119 : IfxScuCcu.h

IfxScuCcu_Ndivider_12 : IfxScuCcu.h

IfxScuCcu_Ndivider_120 : IfxScuCcu.h

IfxScuCcu_Ndivider_121 : IfxScuCcu.h

IfxScuCcu_Ndivider_122 : IfxScuCcu.h

IfxScuCcu_Ndivider_123 : IfxScuCcu.h

IfxScuCcu_Ndivider_124 : IfxScuCcu.h

IfxScuCcu_Ndivider_125 : IfxScuCcu.h

IfxScuCcu_Ndivider_126 : IfxScuCcu.h

IfxScuCcu_Ndivider_127 : IfxScuCcu.h

IfxScuCcu_Ndivider_128 : IfxScuCcu.h

IfxScuCcu_Ndivider_13 : IfxScuCcu.h

IfxScuCcu_Ndivider_14 : IfxScuCcu.h

IfxScuCcu_Ndivider_15 : IfxScuCcu.h

IfxScuCcu_Ndivider_16 : IfxScuCcu.h

IfxScuCcu_Ndivider_17 : IfxScuCcu.h

IfxScuCcu_Ndivider_18 : IfxScuCcu.h

IfxScuCcu_Ndivider_19 : IfxScuCcu.h

IfxScuCcu_Ndivider_2 : IfxScuCcu.h

IfxScuCcu_Ndivider_20 : IfxScuCcu.h

IfxScuCcu_Ndivider_21 : IfxScuCcu.h

IfxScuCcu_Ndivider_22 : IfxScuCcu.h

IfxScuCcu_Ndivider_23 : IfxScuCcu.h

IfxScuCcu_Ndivider_24 : IfxScuCcu.h

IfxScuCcu_Ndivider_25 : IfxScuCcu.h

IfxScuCcu_Ndivider_26 : IfxScuCcu.h

IfxScuCcu_Ndivider_27 : IfxScuCcu.h

IfxScuCcu_Ndivider_28 : IfxScuCcu.h

IfxScuCcu_Ndivider_29 : IfxScuCcu.h

IfxScuCcu_Ndivider_3 : IfxScuCcu.h

IfxScuCcu_Ndivider_30 : IfxScuCcu.h

IfxScuCcu_Ndivider_31 : IfxScuCcu.h

IfxScuCcu_Ndivider_32 : IfxScuCcu.h

IfxScuCcu_Ndivider_33 : IfxScuCcu.h

IfxScuCcu_Ndivider_34 : IfxScuCcu.h

IfxScuCcu_Ndivider_35 : IfxScuCcu.h

IfxScuCcu_Ndivider_36 : IfxScuCcu.h

IfxScuCcu_Ndivider_37 : IfxScuCcu.h

IfxScuCcu_Ndivider_38 : IfxScuCcu.h

IfxScuCcu_Ndivider_39 : IfxScuCcu.h

IfxScuCcu_Ndivider_4 : IfxScuCcu.h

IfxScuCcu_Ndivider_40 : IfxScuCcu.h

IfxScuCcu_Ndivider_41 : IfxScuCcu.h

IfxScuCcu_Ndivider_42 : IfxScuCcu.h

IfxScuCcu_Ndivider_43 : IfxScuCcu.h

IfxScuCcu_Ndivider_44 : IfxScuCcu.h

IfxScuCcu_Ndivider_45 : IfxScuCcu.h

IfxScuCcu_Ndivider_46 : IfxScuCcu.h

IfxScuCcu_Ndivider_47 : IfxScuCcu.h

IfxScuCcu_Ndivider_48 : IfxScuCcu.h

IfxScuCcu_Ndivider_49 : IfxScuCcu.h

IfxScuCcu_Ndivider_5 : IfxScuCcu.h

IfxScuCcu_Ndivider_50 : IfxScuCcu.h

IfxScuCcu_Ndivider_51 : IfxScuCcu.h

IfxScuCcu_Ndivider_52 : IfxScuCcu.h

IfxScuCcu_Ndivider_53 : IfxScuCcu.h

IfxScuCcu_Ndivider_54 : IfxScuCcu.h

IfxScuCcu_Ndivider_55 : IfxScuCcu.h

IfxScuCcu_Ndivider_56 : IfxScuCcu.h

IfxScuCcu_Ndivider_57 : IfxScuCcu.h

IfxScuCcu_Ndivider_58 : IfxScuCcu.h

IfxScuCcu_Ndivider_59 : IfxScuCcu.h

IfxScuCcu_Ndivider_6 : IfxScuCcu.h

IfxScuCcu_Ndivider_60 : IfxScuCcu.h

IfxScuCcu_Ndivider_61 : IfxScuCcu.h

IfxScuCcu_Ndivider_62 : IfxScuCcu.h

IfxScuCcu_Ndivider_63 : IfxScuCcu.h

IfxScuCcu_Ndivider_64 : IfxScuCcu.h

IfxScuCcu_Ndivider_65 : IfxScuCcu.h

IfxScuCcu_Ndivider_66 : IfxScuCcu.h

IfxScuCcu_Ndivider_67 : IfxScuCcu.h

IfxScuCcu_Ndivider_68 : IfxScuCcu.h

IfxScuCcu_Ndivider_69 : IfxScuCcu.h

IfxScuCcu_Ndivider_7 : IfxScuCcu.h

IfxScuCcu_Ndivider_70 : IfxScuCcu.h

IfxScuCcu_Ndivider_71 : IfxScuCcu.h

IfxScuCcu_Ndivider_72 : IfxScuCcu.h

IfxScuCcu_Ndivider_73 : IfxScuCcu.h

IfxScuCcu_Ndivider_74 : IfxScuCcu.h

IfxScuCcu_Ndivider_75 : IfxScuCcu.h

IfxScuCcu_Ndivider_76 : IfxScuCcu.h

IfxScuCcu_Ndivider_77 : IfxScuCcu.h

IfxScuCcu_Ndivider_78 : IfxScuCcu.h

IfxScuCcu_Ndivider_79 : IfxScuCcu.h

IfxScuCcu_Ndivider_8 : IfxScuCcu.h

IfxScuCcu_Ndivider_80 : IfxScuCcu.h

IfxScuCcu_Ndivider_81 : IfxScuCcu.h

IfxScuCcu_Ndivider_82 : IfxScuCcu.h

IfxScuCcu_Ndivider_83 : IfxScuCcu.h

IfxScuCcu_Ndivider_84 : IfxScuCcu.h

IfxScuCcu_Ndivider_85 : IfxScuCcu.h

IfxScuCcu_Ndivider_86 : IfxScuCcu.h

IfxScuCcu_Ndivider_87 : IfxScuCcu.h

IfxScuCcu_Ndivider_88 : IfxScuCcu.h

IfxScuCcu_Ndivider_89 : IfxScuCcu.h

IfxScuCcu_Ndivider_9 : IfxScuCcu.h

IfxScuCcu_Ndivider_90 : IfxScuCcu.h

IfxScuCcu_Ndivider_91 : IfxScuCcu.h

IfxScuCcu_Ndivider_92 : IfxScuCcu.h

IfxScuCcu_Ndivider_93 : IfxScuCcu.h

IfxScuCcu_Ndivider_94 : IfxScuCcu.h

IfxScuCcu_Ndivider_95 : IfxScuCcu.h

IfxScuCcu_Ndivider_96 : IfxScuCcu.h

IfxScuCcu_Ndivider_97 : IfxScuCcu.h

IfxScuCcu_Ndivider_98 : IfxScuCcu.h

IfxScuCcu_Ndivider_99 : IfxScuCcu.h

IFXSCUCCU_OSC_STABLECHK_TIME : IfxScuCcu.h

IfxScuCcu_Pdivider : IfxScuCcu.h

IfxScuCcu_Pdivider_1 : IfxScuCcu.h

IfxScuCcu_Pdivider_10 : IfxScuCcu.h

IfxScuCcu_Pdivider_11 : IfxScuCcu.h

IfxScuCcu_Pdivider_12 : IfxScuCcu.h

IfxScuCcu_Pdivider_13 : IfxScuCcu.h

IfxScuCcu_Pdivider_14 : IfxScuCcu.h

IfxScuCcu_Pdivider_15 : IfxScuCcu.h

IfxScuCcu_Pdivider_16 : IfxScuCcu.h

IfxScuCcu_Pdivider_2 : IfxScuCcu.h

IfxScuCcu_Pdivider_3 : IfxScuCcu.h

IfxScuCcu_Pdivider_4 : IfxScuCcu.h

IfxScuCcu_Pdivider_5 : IfxScuCcu.h

IfxScuCcu_Pdivider_6 : IfxScuCcu.h

IfxScuCcu_Pdivider_7 : IfxScuCcu.h

IfxScuCcu_Pdivider_8 : IfxScuCcu.h

IfxScuCcu_Pdivider_9 : IfxScuCcu.h

IfxScuCcu_PllStepsFunctionHook : IfxScuCcu.h

IfxScuCcu_setCpuFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_setGtmFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_setPll2ErayFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_setPll2Frequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_setSpbFrequency() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_setSriFrequency() : IfxScuCcu.h , IfxScuCcu.c

IfxScuCcu_switchToBackupClock() : IfxScuCcu.c , IfxScuCcu.h

IfxScuCcu_wait() : IfxScuCcu.c

IfxScuCcu_xtalFrequency : IfxScuCcu.c

IFXSCUERU_CHANNEL_NUMBER_ODD : IfxScuEru.c

IfxScuEru_clearAllEventFlags() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_clearEventFlag() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_clearInputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_clearOutputChannelConfiguration() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_connectTrigger() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_disableAutoClear() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_disableFallingEdgeDetection() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_disablePatternDetectionTrigger() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_disableRisingEdgeDetection() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_disableTriggerPulse() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_enableAutoClear() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_enableFallingEdgeDetection() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_enablePatternDetectionTrigger() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_enableRisingEdgeDetection() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_enableTriggerPulse() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_ExternalInputSelection : IfxScuEru.h

IfxScuEru_ExternalInputSelection_0 : IfxScuEru.h

IfxScuEru_ExternalInputSelection_1 : IfxScuEru.h

IfxScuEru_ExternalInputSelection_2 : IfxScuEru.h

IfxScuEru_ExternalInputSelection_3 : IfxScuEru.h

IfxScuEru_getAllEventFlagsStatus() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_getEventFlagStatus() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_getInputChannelConfiguration() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_getOutputChannelConfiguration() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_getPatternDetectionResult() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_getWholePatternDetectionResult() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_initReqPin() : IfxScuEru.h

IfxScuEru_InputChannel : IfxScuEru.h

IfxScuEru_InputChannel_0 : IfxScuEru.h

IfxScuEru_InputChannel_1 : IfxScuEru.h

IfxScuEru_InputChannel_2 : IfxScuEru.h

IfxScuEru_InputChannel_3 : IfxScuEru.h

IfxScuEru_InputChannel_4 : IfxScuEru.h

IfxScuEru_InputChannel_5 : IfxScuEru.h

IfxScuEru_InputChannel_6 : IfxScuEru.h

IfxScuEru_InputChannel_7 : IfxScuEru.h

IfxScuEru_InputNodePointer : IfxScuEru.h

IfxScuEru_InputNodePointer_0 : IfxScuEru.h

IfxScuEru_InputNodePointer_1 : IfxScuEru.h

IfxScuEru_InputNodePointer_2 : IfxScuEru.h

IfxScuEru_InputNodePointer_3 : IfxScuEru.h

IfxScuEru_InputNodePointer_4 : IfxScuEru.h

IfxScuEru_InputNodePointer_5 : IfxScuEru.h

IfxScuEru_InputNodePointer_6 : IfxScuEru.h

IfxScuEru_InputNodePointer_7 : IfxScuEru.h

IfxScuEru_InterruptGatingPattern : IfxScuEru.h

IfxScuEru_InterruptGatingPattern_alwaysActive : IfxScuEru.h

IfxScuEru_InterruptGatingPattern_none : IfxScuEru.h

IfxScuEru_InterruptGatingPattern_patternMatch : IfxScuEru.h

IfxScuEru_InterruptGatingPattern_patternMiss : IfxScuEru.h

IfxScuEru_OutputChannel : IfxScuEru.h

IfxScuEru_OutputChannel_0 : IfxScuEru.h

IfxScuEru_OutputChannel_1 : IfxScuEru.h

IfxScuEru_OutputChannel_2 : IfxScuEru.h

IfxScuEru_OutputChannel_3 : IfxScuEru.h

IfxScuEru_OutputChannel_4 : IfxScuEru.h

IfxScuEru_OutputChannel_5 : IfxScuEru.h

IfxScuEru_OutputChannel_6 : IfxScuEru.h

IfxScuEru_OutputChannel_7 : IfxScuEru.h

IfxScuEru_selectExternalInput() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_setEventFlag() : IfxScuEru.h , IfxScuEru.c

IfxScuEru_setFlagPatternDetection() : IfxScuEru.c , IfxScuEru.h

IfxScuEru_setInterruptGatingPattern() : IfxScuEru.h , IfxScuEru.c

IFXSCUERU_TO_REGISTER_BASE : IfxScuEru.c

IFXSCUWDT_CALCULATELFSR : IfxScuWdt.asm.h

IfxScuWdt_calculateLfsr() : IfxScuWdt.asm.h

IfxScuWdt_changeCpuWatchdogPassword() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_changeCpuWatchdogReload() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_changeSafetyWatchdogPassword() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_changeSafetyWatchdogReload() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_clearCpuEndinit() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_clearCpuEndinitInline() : IfxScuWdt.h

IfxScuWdt_clearSafetyEndinit() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_clearSafetyEndinitInline() : IfxScuWdt.h

IfxScuWdt_disableCpuWatchdog() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_disableSafetyWatchdog() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_enableCpuWatchdog() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_enableSafetyWatchdog() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_enableWatchdogWithDebugger() : IfxScuWdt.h , IfxScuWdt.c

IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT : IfxScuWdt.h

IfxScuWdt_getCpuWatchdogEndInit() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_getCpuWatchdogEndInitInline() : IfxScuWdt.h

IfxScuWdt_getCpuWatchdogPassword() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_getCpuWatchdogPasswordInline() : IfxScuWdt.h

IfxScuWdt_getSafetyWatchdogEndInit() : IfxScuWdt.h

IfxScuWdt_getSafetyWatchdogPassword() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_getSafetyWatchdogPasswordInline() : IfxScuWdt.h

IfxScuWdt_initConfig() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_initCpuWatchdog() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_initSafetyWatchdog() : IfxScuWdt.c , IfxScuWdt.h

IFXSCUWDT_RESET_PASSWORD : IfxScuWdt.c

IfxScuWdt_serviceCpuWatchdog() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_serviceSafetyWatchdog() : IfxScuWdt.c , IfxScuWdt.h

IfxScuWdt_setCpuEndinit() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_setCpuEndinitInline() : IfxScuWdt.h

IfxScuWdt_setSafetyEndinit() : IfxScuWdt.h , IfxScuWdt.c

IfxScuWdt_setSafetyEndinitInline() : IfxScuWdt.h

IfxSent_AlternateInput : IfxSent.h

IfxSent_AlternateInput_0 : IfxSent.h

IfxSent_AlternateInput_1 : IfxSent.h

IfxSent_AlternateInput_2 : IfxSent.h

IfxSent_AlternateInput_3 : IfxSent.h

IFXSENT_CFG_CHANNEL_INTEN : IfxSent_cfg.h

IFXSENT_CFG_STEP_RANGE : IfxSent_cfg.h

IFXSENT_CFG_TIMEOUT_VALUE : IfxSent_cfg.h

IfxSent_ChannelId : IfxSent_cfg.h

IfxSent_ChannelId_0 : IfxSent_cfg.h

IfxSent_ChannelId_1 : IfxSent_cfg.h

IfxSent_ChannelId_2 : IfxSent_cfg.h

IfxSent_ChannelId_3 : IfxSent_cfg.h

IfxSent_ChannelId_4 : IfxSent_cfg.h

IfxSent_ChannelId_5 : IfxSent_cfg.h

IfxSent_ChannelId_none : IfxSent_cfg.h

IfxSent_ChannelStatus : IfxSent.h

IfxSent_ChannelStatus_initialize : IfxSent.h

IfxSent_ChannelStatus_running : IfxSent.h

IfxSent_ChannelStatus_stop : IfxSent.h

IfxSent_ChannelStatus_synchronize : IfxSent.h

IfxSent_clearInterruptStatus() : IfxSent.h

IfxSent_ClockDividerMode : IfxSent.h

IfxSent_ClockDividerMode_fractional : IfxSent.h

IfxSent_ClockDividerMode_normal : IfxSent.h

IfxSent_ClockDividerMode_off : IfxSent.h

IfxSent_ConfigBit : IfxSent.h

IfxSent_ConfigBit_0 : IfxSent.h

IfxSent_ConfigBit_1 : IfxSent.h

IfxSent_DigitalGlitchesLength : IfxSent.h

IfxSent_DigitalGlitchesLength_1 : IfxSent.h

IfxSent_DigitalGlitchesLength_10 : IfxSent.h

IfxSent_DigitalGlitchesLength_11 : IfxSent.h

IfxSent_DigitalGlitchesLength_12 : IfxSent.h

IfxSent_DigitalGlitchesLength_13 : IfxSent.h

IfxSent_DigitalGlitchesLength_14 : IfxSent.h

IfxSent_DigitalGlitchesLength_15 : IfxSent.h

IfxSent_DigitalGlitchesLength_2 : IfxSent.h

IfxSent_DigitalGlitchesLength_3 : IfxSent.h

IfxSent_DigitalGlitchesLength_4 : IfxSent.h

IfxSent_DigitalGlitchesLength_5 : IfxSent.h

IfxSent_DigitalGlitchesLength_6 : IfxSent.h

IfxSent_DigitalGlitchesLength_7 : IfxSent.h

IfxSent_DigitalGlitchesLength_8 : IfxSent.h

IfxSent_DigitalGlitchesLength_9 : IfxSent.h

IfxSent_DigitalGlitchesLength_off : IfxSent.h

IfxSent_disableChannel() : IfxSent.h

IfxSent_disableModule() : IfxSent.h

IfxSent_enableChannel() : IfxSent.h

IfxSent_enableModule() : IfxSent.h

IfxSent_ExtendedSerialFrameMode : IfxSent.h

IfxSent_ExtendedSerialFrameMode_extended : IfxSent.h

IfxSent_ExtendedSerialFrameMode_standard : IfxSent.h

IfxSent_ExternalTrigger : IfxSent.h

IfxSent_ExternalTrigger_0 : IfxSent.h

IfxSent_ExternalTrigger_1 : IfxSent.h

IfxSent_ExternalTrigger_2 : IfxSent.h

IfxSent_ExternalTrigger_3 : IfxSent.h

IfxSent_ExternalTrigger_4 : IfxSent.h

IfxSent_ExternalTrigger_5 : IfxSent.h

IfxSent_ExternalTrigger_6 : IfxSent.h

IfxSent_ExternalTrigger_7 : IfxSent.h

IfxSent_ExternalTrigger_8 : IfxSent.h

IfxSent_ExternalTrigger_9 : IfxSent.h

IfxSent_FrameCheckMode : IfxSent.h

IfxSent_FrameCheckMode_futureSuncPulse : IfxSent.h

IfxSent_FrameCheckMode_pastSyncPulse : IfxSent.h

IfxSent_getAndClearInterruptStatus() : IfxSent.h

IfxSent_getChannelInterruptStatus() : IfxSent.h

IfxSent_getChannelSrc() : IfxSent.h

IfxSent_getChannelUnitTime() : IfxSent.c , IfxSent.h

IfxSent_getInterruptStatus() : IfxSent.h

IfxSent_getModuleClock() : IfxSent.c , IfxSent.h

IfxSent_initializeChannelUnitTime() : IfxSent.h , IfxSent.c

IfxSent_initializeModuleClock() : IfxSent.c , IfxSent.h

IfxSent_initSentPin() : IfxSent.h

IfxSent_initSpcPin() : IfxSent.h

IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS : IfxSent.h

IfxSent_InterruptNodePointer : IfxSent.h

IfxSent_InterruptNodePointer_0 : IfxSent.h

IfxSent_InterruptNodePointer_1 : IfxSent.h

IfxSent_InterruptNodePointer_2 : IfxSent.h

IfxSent_InterruptNodePointer_3 : IfxSent.h

IfxSent_InterruptNodePointer_trigo0 : IfxSent.h

IfxSent_InterruptNodePointer_trigo1 : IfxSent.h

IfxSent_InterruptNodePointer_trigo2 : IfxSent.h

IfxSent_InterruptNodePointer_trigo3 : IfxSent.h

IfxSent_InterruptNodePointer_trigo4 : IfxSent.h

IfxSent_InterruptNodePointer_trigo5 : IfxSent.h

IfxSent_InterruptSource : IfxSent.h

IfxSent_InterruptSource_crci : IfxSent.h

IfxSent_InterruptSource_fdi : IfxSent.h

IfxSent_InterruptSource_fri : IfxSent.h

IfxSent_InterruptSource_nni : IfxSent.h

IfxSent_InterruptSource_nvi : IfxSent.h

IfxSent_InterruptSource_rbi : IfxSent.h

IfxSent_InterruptSource_rdi : IfxSent.h

IfxSent_InterruptSource_rsi : IfxSent.h

IfxSent_InterruptSource_scri : IfxSent.h

IfxSent_InterruptSource_sdi : IfxSent.h

IfxSent_InterruptSource_tbi : IfxSent.h

IfxSent_InterruptSource_tdi : IfxSent.h

IfxSent_InterruptSource_wdi : IfxSent.h

IfxSent_InterruptSource_wsi : IfxSent.h

IfxSent_isModuleEnabled() : IfxSent.h

IfxSent_isModuleSuspended() : IfxSent.h

IfxSent_Nibble : IfxSent.h

IfxSent_Nibble_0 : IfxSent.h

IfxSent_Nibble_1 : IfxSent.h

IfxSent_Nibble_2 : IfxSent.h

IfxSent_Nibble_3 : IfxSent.h

IfxSent_Nibble_4 : IfxSent.h

IfxSent_Nibble_5 : IfxSent.h

IfxSent_Nibble_6 : IfxSent.h

IfxSent_Nibble_7 : IfxSent.h

IFXSENT_NUM_CHANNELS : IfxSent_cfg.h

IFXSENT_NUM_MODULES : IfxSent_cfg.h

IFXSENT_PINMAP_NUM_CHANNELS : IfxSent_PinMap.h

IFXSENT_PINMAP_NUM_MODULES : IfxSent_PinMap.h

IFXSENT_PINMAP_SENT_IN_NUM_ITEMS : IfxSent_PinMap.h

IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS : IfxSent_PinMap.h

IfxSent_readReceivedChannelStatus() : IfxSent.h

IfxSent_readReceivedCrc() : IfxSent.h

IfxSent_readReceivedData() : IfxSent.h

IfxSent_readReceivedStatus() : IfxSent.h

IfxSent_readReceivedStatusAndCommunicationNibble() : IfxSent.h

IfxSent_readReceivedTimeStamp() : IfxSent.h

IfxSent_readSpcDelayLength() : IfxSent.h

IfxSent_readSpcPulseLength() : IfxSent.h

IfxSent_resetModule() : IfxSent.c , IfxSent.h

IfxSent_SENT0A_AN24_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT0A_P40_0_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT0B_P00_1_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT0C_P02_8_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT1A_AN25_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT1A_P40_1_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT1B_P00_2_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT1C_P02_7_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT2A_AN26_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT2A_P40_2_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT2B_P00_3_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT2C_P02_6_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT2D_AN36_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT2D_P40_6_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT3A_AN27_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT3A_P40_3_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT3B_P00_4_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT3C_P02_5_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT3D_AN37_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT3D_P40_7_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT4A_AN38_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT4A_P40_8_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT4B_P00_5_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT4C_P33_6_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT5A_AN39_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SENT5A_P40_9_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT5B_P00_6_IN : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SENT5C_P33_5_IN : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_Sent_deInitModule() : IfxSent_Sent.c , IfxSent_Sent.h

IfxSent_Sent_getAndClearInterruptStatus() : IfxSent_Sent.h

IfxSent_Sent_In_pinTable : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_Sent_initChannel() : IfxSent_Sent.h , IfxSent_Sent.c

IfxSent_Sent_initChannelConfig() : IfxSent_Sent.c , IfxSent_Sent.h

IfxSent_Sent_initModule() : IfxSent_Sent.c , IfxSent_Sent.h

IfxSent_Sent_initModuleConfig() : IfxSent_Sent.c , IfxSent_Sent.h

IfxSent_Sent_readChannelSerialDataFrame() : IfxSent_Sent.h , IfxSent_Sent.c

IfxSent_Sent_readChannelSerialMessageFrame() : IfxSent_Sent.h , IfxSent_Sent.c

IfxSent_setAltiInput() : IfxSent.h

IfxSent_setChannelFractionalDivider() : IfxSent.h

IfxSent_setChannelPreDivider() : IfxSent.h

IfxSent_setSleepMode() : IfxSent.h

IfxSent_setSuspendMode() : IfxSent.h

IfxSent_setTimeStampPredivider() : IfxSent.h

IfxSent_setWatchDogTimerLimit() : IfxSent.h

IfxSent_SleepMode : IfxSent.h

IfxSent_SleepMode_disable : IfxSent.h

IfxSent_SleepMode_enable : IfxSent.h

IfxSent_SPC0_P00_1_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SPC1_P02_7_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SPC2_P00_3_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SPC3_P00_4_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h

IfxSent_SPC4_P00_5_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SPC5_P00_6_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_Spc_Out_pinTable : IfxSent_PinMap.h , IfxSent_PinMap.c

IfxSent_SpcMode : IfxSent.h

IfxSent_SpcMode_bidirectional : IfxSent.h

IfxSent_SpcMode_range : IfxSent.h

IfxSent_SpcMode_sync : IfxSent.h

IfxSent_SuspendMode : IfxSent.h

IfxSent_SuspendMode_hard : IfxSent.h

IfxSent_SuspendMode_none : IfxSent.h

IfxSent_SuspendMode_soft : IfxSent.h

IfxSent_TimeBase : IfxSent.h

IfxSent_TimeBase_measuredFrequency : IfxSent.h

IfxSent_TimeBase_nominalFrequency : IfxSent.h

IfxSent_TriggerSource : IfxSent.h

IfxSent_TriggerSource_externalTrigger : IfxSent.h

IfxSent_TriggerSource_fallingEdge : IfxSent.h

IfxSent_TriggerSource_immediate : IfxSent.h

IfxSent_TriggerSource_off : IfxSent.h

IfxSmu_activateFsp() : IfxSmu.h

IfxSmu_activatePes() : IfxSmu.h

IfxSmu_Alarm : IfxSmu_cfg.h

IfxSmu_Alarm_CanSramAddressBufferOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_CanSramAddressError : IfxSmu_cfg.h

IfxSmu_Alarm_CanSramSingleBitCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_CanSramUncorrectableError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu0BusLevelMpuViolationAccessProtection : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu0CpuDataSriInterfaceEdcError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu0LockstepComparatorError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu0PcacheTagAddressBufferOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu0PcacheTagAddressError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu0PcacheTagUncorrectableError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressBufferOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu0UnifiedDcacheDsprSingleBitCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu0UnifiedDcacheDsprUncorrectableError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressBufferOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu0UnifiedPcachePsprSingleBitCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu0UnifiedPcachePsprUncorrectableError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1BusLevelMpuViolationAccessProtection : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1CpuDataSriInterfaceEdcError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1CpuInstructionFetchSRIInterfaceEdcError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1DcacheTagSramAddressBufferOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1DcacheTagSramAddressError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1DcacheTagSramCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1DcacheTagSramUncorrectableError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1LockstepComparatorError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1PcacheTagAddressBufferOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1PcacheTagAddressError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1PcacheTagUncorrectableError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressBufferOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1UnifiedDcacheDsprSingleBitCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1UnifiedDcacheDsprUncorrectableError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressBufferOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1UnifiedPcachePsprSingleBitCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu1UnifiedPcachePsprUncorrectableError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2BusLevelMpuViolationAccessProtection : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2CpuDataSriInterfaceEdcError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2CpuInstructionFetchSRIInterfaceEdcError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2DcacheTagSramAddressBufferOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2DcacheTagSramAddressError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2DcacheTagSramSingleBitCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2DcacheTagSramUncorrectableError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2PcacheTagAddressBufferOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2PcacheTagAddressError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2PcacheTagUncorrectableError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressBufferOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2UnifiedDcacheDsprSingleBitCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2UnifiedDcacheDsprUncorrectableError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressBufferOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressError : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2UnifiedPcachePsprSingleBitCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_Cpu2UnifiedPcachePsprUncorrectableError : IfxSmu_cfg.h

IfxSmu_Alarm_EmemSramAddressBufferOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_EmemSramSingleBitCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_EmemSramUncorrectableError : IfxSmu_cfg.h

IfxSmu_Alarm_FlexraySramAddressBufferOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_FlexraySramAddressError : IfxSmu_cfg.h

IfxSmu_Alarm_FlexraySramSingleBitCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_FlexraySramUncorrectableError : IfxSmu_cfg.h

IfxSmu_Alarm_GtmSramAddressBufferOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_GtmSramAddressError : IfxSmu_cfg.h

IfxSmu_Alarm_GtmSramSingleBitCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_GtmSramUncorrectableError : IfxSmu_cfg.h

IfxSmu_Alarm_IomPinMismatchIndication : IfxSmu_cfg.h

IfxSmu_Alarm_IrEdcError : IfxSmu_cfg.h

IfxSmu_Alarm_LmuEccError : IfxSmu_cfg.h

IfxSmu_Alarm_LmuRegisterAccessProtectionErrorBusLevelMpuError : IfxSmu_cfg.h

IfxSmu_Alarm_LmuSramAddressBufferOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_LmuSramAddressError : IfxSmu_cfg.h

IfxSmu_Alarm_LmuSramSingleBitCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_LmuSramUncorrectableError : IfxSmu_cfg.h

IfxSmu_Alarm_noAlarm : IfxSmu_cfg.h

IfxSmu_Alarm_PmuAddressBufferFull : IfxSmu_cfg.h

IfxSmu_Alarm_PmuAddressingError : IfxSmu_cfg.h

IfxSmu_Alarm_PmuDoubleBitCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_PmuEdcComparatorError : IfxSmu_cfg.h

IfxSmu_Alarm_PmuNonCorrectableMultipleBit : IfxSmu_cfg.h

IfxSmu_Alarm_PmuPflashEccError : IfxSmu_cfg.h

IfxSmu_Alarm_PmuSingleBitCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_ScuCguAdcClockOutOfRangeFrequency : IfxSmu_cfg.h

IfxSmu_Alarm_ScuCguGtmClockOutOfRangeFrequency : IfxSmu_cfg.h

IfxSmu_Alarm_ScuCguInputClockOutOfRange : IfxSmu_cfg.h

IfxSmu_Alarm_ScuCguPll_ErayOutOfRangeFrequency : IfxSmu_cfg.h

IfxSmu_Alarm_ScuCguPll_ErayVcoLossOfLockEvent : IfxSmu_cfg.h

IfxSmu_Alarm_ScuCguSpbClockOutOfRangeFrequency : IfxSmu_cfg.h

IfxSmu_Alarm_ScuCguSriClockOutOfRangeFrequency : IfxSmu_cfg.h

IfxSmu_Alarm_ScuCguStmClockOutOfRangeFrequency : IfxSmu_cfg.h

IfxSmu_Alarm_ScuCguSystemPLLOutOfRangeFrequency : IfxSmu_cfg.h

IfxSmu_Alarm_ScuCguSystemPllVcoLossOfLockEvent : IfxSmu_cfg.h

IfxSmu_Alarm_ScuDtsTemperatureOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_ScuDtsTemperatureUnderflow : IfxSmu_cfg.h

IfxSmu_Alarm_ScuEvrEvr1Dot3VOverVoltage : IfxSmu_cfg.h

IfxSmu_Alarm_ScuEvrEvr1Dot3VUnderVoltage : IfxSmu_cfg.h

IfxSmu_Alarm_ScuEvrEvr3Dot3VOverVoltage : IfxSmu_cfg.h

IfxSmu_Alarm_ScuEvrEvr3Dot3VUnderVoltage : IfxSmu_cfg.h

IfxSmu_Alarm_ScuEVRExternalSupplyOverVoltage : IfxSmu_cfg.h

IfxSmu_Alarm_ScuEvrExternalSupplyUnderVoltage : IfxSmu_cfg.h

IfxSmu_Alarm_ScuExternalEmergencyStopSignal : IfxSmu_cfg.h

IfxSmu_Alarm_ScuWdtCpu0WatchdogTimeOut : IfxSmu_cfg.h

IfxSmu_Alarm_ScuWdtCpu1WatchdogTimeOut : IfxSmu_cfg.h

IfxSmu_Alarm_ScuWdtCpu2WatchdogTimeOut : IfxSmu_cfg.h

IfxSmu_Alarm_ScuWdtsWatchdogTimeOut : IfxSmu_cfg.h

IfxSmu_Alarm_ScuWdtWatchdogTimeOut : IfxSmu_cfg.h

IfxSmu_Alarm_SmuErrorPinFaultStateActivation : IfxSmu_cfg.h

IfxSmu_Alarm_SmuTimer0TimeOut : IfxSmu_cfg.h

IfxSmu_Alarm_SmuTimer1TimeOut : IfxSmu_cfg.h

IfxSmu_Alarm_SoftwareAlarm0 : IfxSmu_cfg.h

IfxSmu_Alarm_SoftwareAlarm1 : IfxSmu_cfg.h

IfxSmu_Alarm_SoftwareAlarm10 : IfxSmu_cfg.h

IfxSmu_Alarm_SoftwareAlarm11 : IfxSmu_cfg.h

IfxSmu_Alarm_SoftwareAlarm12 : IfxSmu_cfg.h

IfxSmu_Alarm_SoftwareAlarm13 : IfxSmu_cfg.h

IfxSmu_Alarm_SoftwareAlarm14 : IfxSmu_cfg.h

IfxSmu_Alarm_SoftwareAlarm15 : IfxSmu_cfg.h

IfxSmu_Alarm_SoftwareAlarm2 : IfxSmu_cfg.h

IfxSmu_Alarm_SoftwareAlarm3 : IfxSmu_cfg.h

IfxSmu_Alarm_SoftwareAlarm4 : IfxSmu_cfg.h

IfxSmu_Alarm_SoftwareAlarm5 : IfxSmu_cfg.h

IfxSmu_Alarm_SoftwareAlarm6 : IfxSmu_cfg.h

IfxSmu_Alarm_SoftwareAlarm7 : IfxSmu_cfg.h

IfxSmu_Alarm_SoftwareAlarm8 : IfxSmu_cfg.h

IfxSmu_Alarm_SoftwareAlarm9 : IfxSmu_cfg.h

IfxSmu_Alarm_SpbAccessEnableError : IfxSmu_cfg.h

IfxSmu_Alarm_SpbBusError : IfxSmu_cfg.h

IfxSmu_Alarm_SramsSramAddressBufferOverflow : IfxSmu_cfg.h

IfxSmu_Alarm_SramsSramAddressError : IfxSmu_cfg.h

IfxSmu_Alarm_SramsSramSingleBitCorrection : IfxSmu_cfg.h

IfxSmu_Alarm_SramsSramUncorrectableError : IfxSmu_cfg.h

IfxSmu_Alarm_SriBusError : IfxSmu_cfg.h

IfxSmu_Alarm_SriEdcAddressPhaseError : IfxSmu_cfg.h

IfxSmu_Alarm_SriEdcReadPhaseError : IfxSmu_cfg.h

IfxSmu_Alarm_SriEdcWritePhaseError : IfxSmu_cfg.h

IfxSmu_AlarmConfig : IfxSmu.h

IfxSmu_AlarmConfig_cpuIdle : IfxSmu.h

IfxSmu_AlarmConfig_interruptSet0 : IfxSmu.h

IfxSmu_AlarmConfig_interruptSet1 : IfxSmu.h

IfxSmu_AlarmConfig_interruptSet2 : IfxSmu.h

IfxSmu_AlarmConfig_nmi : IfxSmu.h

IfxSmu_AlarmConfig_noAction : IfxSmu.h

IfxSmu_AlarmConfig_scuReset : IfxSmu.h

IfxSmu_AlarmGroup : IfxSmu_cfg.h

IfxSmu_AlarmGroup_0 : IfxSmu_cfg.h

IfxSmu_AlarmGroup_1 : IfxSmu_cfg.h

IfxSmu_AlarmGroup_2 : IfxSmu_cfg.h

IfxSmu_AlarmGroup_3 : IfxSmu_cfg.h

IfxSmu_AlarmGroup_4 : IfxSmu_cfg.h

IfxSmu_AlarmGroup_5 : IfxSmu_cfg.h

IfxSmu_AlarmGroup_6 : IfxSmu_cfg.h

IfxSmu_clearAlarm() : IfxSmu.h , IfxSmu.c

IfxSmu_cmd() : IfxSmu.h , IfxSmu.c

IfxSmu_Cmd : IfxSmu.h

IfxSmu_Cmd_activateFsp : IfxSmu.h

IfxSmu_Cmd_activatePes : IfxSmu.h

IfxSmu_Cmd_enableClearAlarmStatus : IfxSmu.h

IfxSmu_Cmd_releaseFsp : IfxSmu.h

IfxSmu_Cmd_start : IfxSmu.h

IfxSmu_Cmd_stopRecoveryTimer : IfxSmu.h

IfxSmu_Cmd_triggerAlarm : IfxSmu.h

IfxSmu_enableAlarmFsp() : IfxSmu.c , IfxSmu.h

IfxSmu_enableClearAlarmStatus() : IfxSmu.h

IfxSmu_Fsp_Mode : IfxSmu.h

IfxSmu_Fsp_Mode_bistable : IfxSmu.h

IfxSmu_Fsp_Mode_timeSwitching : IfxSmu.h

IfxSmu_Fsp_Out_pinTable : IfxSmu_PinMap.h , IfxSmu_PinMap.c

IfxSmu_FSP_P33_8_OUT : IfxSmu_PinMap.h , IfxSmu_PinMap.c

IfxSmu_getAlarm() : IfxSmu.c , IfxSmu.h

IfxSmu_getFspFaultFreeFrequency() : IfxSmu.h , IfxSmu.c

IfxSmu_getFspFaultStateTime() : IfxSmu.c , IfxSmu.h

IfxSmu_initFsp() : IfxSmu.c , IfxSmu.h

IfxSmu_initFspConfig() : IfxSmu.h

IfxSmu_isAlarmSet() : IfxSmu.h , IfxSmu.c

IfxSmu_lock() : IfxSmu.c , IfxSmu.h

IfxSmu_lockForever() : IfxSmu.h , IfxSmu.c

IFXSMU_NUM_MODULES : IfxSmu_cfg.h

IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS : IfxSmu_PinMap.h

IFXSMU_PINMAP_NUM_MODULES : IfxSmu_PinMap.h

IfxSmu_RecoveryTimer : IfxSmu_cfg.h

IfxSmu_RecoveryTimer_0 : IfxSmu_cfg.h

IfxSmu_RecoveryTimer_1 : IfxSmu_cfg.h

IfxSmu_releaseFsp() : IfxSmu.h

IfxSmu_setAlarmConfig() : IfxSmu.c , IfxSmu.h

IfxSmu_start() : IfxSmu.h

IfxSmu_stopRecoveryTimer() : IfxSmu.h

IfxSmu_triggerAlarm() : IfxSmu.h

IfxSmu_unlock() : IfxSmu.c , IfxSmu.h

IfxSrc_clearOverrun() : IfxSrc.h

IfxSrc_clearRequest() : IfxSrc.h

IfxSrc_deinit() : IfxSrc.h

IfxSrc_disable() : IfxSrc.h

IfxSrc_enable() : IfxSrc.h

IfxSrc_init() : IfxSrc.h

IfxSrc_isOverrun() : IfxSrc.h

IfxSrc_isRequested() : IfxSrc.h

IfxSrc_setRequest() : IfxSrc.h

IfxSrc_Tos : IfxSrc_cfg.h

IfxSrc_Tos_cpu0 : IfxSrc_cfg.h

IfxSrc_Tos_cpu1 : IfxSrc_cfg.h

IfxSrc_Tos_dma : IfxSrc_cfg.h

IfxStdIf_DPipe : IfxStdIf_DPipe.h

IfxStdIf_DPipe_canReadCount() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_CanReadCount : IfxStdIf_DPipe.h

IfxStdIf_DPipe_CanWriteCount : IfxStdIf_DPipe.h

IfxStdIf_DPipe_canWriteCount() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_clearRx() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_ClearRx : IfxStdIf_DPipe.h

IfxStdIf_DPipe_clearTx() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_ClearTx : IfxStdIf_DPipe.h

IfxStdIf_DPipe_FlushTx : IfxStdIf_DPipe.h

IfxStdIf_DPipe_flushTx() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_GetReadCount : IfxStdIf_DPipe.h

IfxStdIf_DPipe_getReadCount() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_GetReadEvent : IfxStdIf_DPipe.h

IfxStdIf_DPipe_getReadEvent() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_getSendCount() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_GetSendCount : IfxStdIf_DPipe.h

IfxStdIf_DPipe_getTxTimeStamp() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_GetTxTimeStamp : IfxStdIf_DPipe.h

IfxStdIf_DPipe_GetWriteCount : IfxStdIf_DPipe.h

IfxStdIf_DPipe_getWriteCount() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_getWriteEvent() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_GetWriteEvent : IfxStdIf_DPipe.h

IfxStdIf_DPipe_OnError : IfxStdIf_DPipe.h

IfxStdIf_DPipe_onError() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_onReceive() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_OnReceive : IfxStdIf_DPipe.h

IfxStdIf_DPipe_onTransmit() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_OnTransmit : IfxStdIf_DPipe.h

IfxStdIf_DPipe_print() : IfxStdIf_DPipe.h , IfxStdIf_DPipe.c

IfxStdIf_DPipe_Read : IfxStdIf_DPipe.h

IfxStdIf_DPipe_read() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_ReadEvent : IfxStdIf_DPipe.h

IfxStdIf_DPipe_ResetSendCount : IfxStdIf_DPipe.h

IfxStdIf_DPipe_resetSendCount() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_write() : IfxStdIf_DPipe.h

IfxStdIf_DPipe_Write : IfxStdIf_DPipe.h

IfxStdIf_DPipe_WriteEvent : IfxStdIf_DPipe.h

IfxStdIf_InterfaceDriver : IfxStdIf.h

IfxStdIf_Pos : IfxStdIf_Pos.h

IfxStdIf_Pos_Dir : IfxStdIf_Pos.h

IfxStdIf_Pos_Dir_backward : IfxStdIf_Pos.h

IfxStdIf_Pos_Dir_forward : IfxStdIf_Pos.h

IfxStdIf_Pos_Dir_unknown : IfxStdIf_Pos.h

IfxStdIf_Pos_getAbsolutePosition() : IfxStdIf_Pos.h

IfxStdIf_Pos_GetAbsolutePosition : IfxStdIf_Pos.h

IfxStdIf_Pos_GetDirection : IfxStdIf_Pos.h

IfxStdIf_Pos_getDirection() : IfxStdIf_Pos.h

IfxStdIf_Pos_getFault() : IfxStdIf_Pos.h

IfxStdIf_Pos_GetFault : IfxStdIf_Pos.h

IfxStdIf_Pos_GetOffset : IfxStdIf_Pos.h

IfxStdIf_Pos_getOffset() : IfxStdIf_Pos.h

IfxStdIf_Pos_GetPeriodPerRotation : IfxStdIf_Pos.h

IfxStdIf_Pos_getPeriodPerRotation() : IfxStdIf_Pos.h

IfxStdIf_Pos_GetPosition : IfxStdIf_Pos.h

IfxStdIf_Pos_getPosition() : IfxStdIf_Pos.h

IfxStdIf_Pos_GetRawPosition : IfxStdIf_Pos.h

IfxStdIf_Pos_getRawPosition() : IfxStdIf_Pos.h

IfxStdIf_Pos_getRefreshPeriod() : IfxStdIf_Pos.h

IfxStdIf_Pos_GetRefreshPeriod : IfxStdIf_Pos.h

IfxStdIf_Pos_GetResolution : IfxStdIf_Pos.h

IfxStdIf_Pos_getResolution() : IfxStdIf_Pos.h

IfxStdIf_Pos_getSensorType() : IfxStdIf_Pos.h

IfxStdIf_Pos_GetSensorType : IfxStdIf_Pos.h

IfxStdIf_Pos_GetSpeed : IfxStdIf_Pos.h

IfxStdIf_Pos_getSpeed() : IfxStdIf_Pos.h

IfxStdIf_Pos_getTurn() : IfxStdIf_Pos.h

IfxStdIf_Pos_GetTurn : IfxStdIf_Pos.h

IfxStdIf_Pos_initConfig() : IfxStdIf_Pos.c , IfxStdIf_Pos.h

IfxStdIf_Pos_isFault() : IfxStdIf_Pos.h

IfxStdIf_Pos_MotionType : IfxStdIf_Pos.h

IfxStdIf_Pos_MotionType_linear : IfxStdIf_Pos.h

IfxStdIf_Pos_MotionType_rotating : IfxStdIf_Pos.h

IfxStdIf_Pos_onEventA() : IfxStdIf_Pos.h

IfxStdIf_Pos_OnEventA : IfxStdIf_Pos.h

IfxStdIf_Pos_OnZeroIrq : IfxStdIf_Pos.h

IfxStdIf_Pos_onZeroIrq() : IfxStdIf_Pos.h

IfxStdIf_Pos_printStatus() : IfxStdIf_Pos.c , IfxStdIf_Pos.h

IfxStdIf_Pos_radsToRpm() : IfxStdIf_Pos.h

IfxStdIf_Pos_RawAngle : IfxStdIf_Pos.h

IfxStdIf_Pos_reset() : IfxStdIf_Pos.h

IfxStdIf_Pos_Reset : IfxStdIf_Pos.h

IfxStdIf_Pos_resetFaults() : IfxStdIf_Pos.h

IfxStdIf_Pos_ResetFaults : IfxStdIf_Pos.h

IfxStdIf_Pos_ResolutionFactor : IfxStdIf_Pos.h

IfxStdIf_Pos_ResolutionFactor_fourFold : IfxStdIf_Pos.h

IfxStdIf_Pos_ResolutionFactor_oneFold : IfxStdIf_Pos.h

IfxStdIf_Pos_ResolutionFactor_twoFold : IfxStdIf_Pos.h

IfxStdIf_Pos_rpmToRads() : IfxStdIf_Pos.h

IfxStdIf_Pos_SensorType : IfxStdIf_Pos.h

IfxStdIf_Pos_SensorType_angletrk : IfxStdIf_Pos.h

IfxStdIf_Pos_SensorType_encoder : IfxStdIf_Pos.h

IfxStdIf_Pos_SensorType_hall : IfxStdIf_Pos.h

IfxStdIf_Pos_SensorType_igmr : IfxStdIf_Pos.h

IfxStdIf_Pos_SensorType_resolver : IfxStdIf_Pos.h

IfxStdIf_Pos_SensorType_virtual : IfxStdIf_Pos.h

IfxStdIf_Pos_SetOffset : IfxStdIf_Pos.h

IfxStdIf_Pos_setOffset() : IfxStdIf_Pos.h

IfxStdIf_Pos_setPosition() : IfxStdIf_Pos.h

IfxStdIf_Pos_SetPosition : IfxStdIf_Pos.h

IfxStdIf_Pos_setRawPosition() : IfxStdIf_Pos.h

IfxStdIf_Pos_SetRawPosition : IfxStdIf_Pos.h

IfxStdIf_Pos_setRefreshPeriod() : IfxStdIf_Pos.h

IfxStdIf_Pos_SetRefreshPeriod : IfxStdIf_Pos.h

IfxStdIf_Pos_setSpeed() : IfxStdIf_Pos.h

IfxStdIf_Pos_SetSpeed : IfxStdIf_Pos.h

IfxStdIf_Pos_update() : IfxStdIf_Pos.h

IfxStdIf_Pos_Update : IfxStdIf_Pos.h

IfxStdIf_PwmHl : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_getDeadtime() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_GetDeadtime : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_GetDeadtimeTick : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_getDeadtimetick() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_GetMinPulse : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_getMinPulse() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_getMode() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_GetMode : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_getTimer() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_initConfig() : IfxStdIf_PwmHl.h , IfxStdIf_PwmHl.c

IfxStdIf_PwmHl_setDeadtime() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_SetDeadtime : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_SetMinPulse : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_setMinPulse() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_setMode() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_SetMode : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_SetOnTime : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_setOnTime() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_setOnTimeAndShift() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_SetOnTimeAndShift : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_setPulse() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_SetPulse : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_setupChannels() : IfxStdIf_PwmHl.h

IfxStdIf_PwmHl_SetupChannels : IfxStdIf_PwmHl.h

IfxStdIf_Timer : IfxStdIf_Timer.h

IfxStdIf_Timer_AckTimerIrq : IfxStdIf_Timer.h

IfxStdIf_Timer_ackTimerIrq() : IfxStdIf_Timer.h

IfxStdIf_Timer_AckTriggerIrq : IfxStdIf_Timer.h

IfxStdIf_Timer_ackTriggerIrq() : IfxStdIf_Timer.h

IfxStdIf_Timer_applyUpdate() : IfxStdIf_Timer.h

IfxStdIf_Timer_ApplyUpdate : IfxStdIf_Timer.h

IfxStdIf_Timer_CountDir : IfxStdIf_Timer.h

IfxStdIf_Timer_CountDir_down : IfxStdIf_Timer.h

IfxStdIf_Timer_CountDir_up : IfxStdIf_Timer.h

IfxStdIf_Timer_CountDir_upAndDown : IfxStdIf_Timer.h

IfxStdIf_Timer_disableUpdate() : IfxStdIf_Timer.h

IfxStdIf_Timer_DisableUpdate : IfxStdIf_Timer.h

IfxStdIf_Timer_getFrequency() : IfxStdIf_Timer.h

IfxStdIf_Timer_GetFrequency : IfxStdIf_Timer.h

IfxStdIf_Timer_getInputFrequency() : IfxStdIf_Timer.h

IfxStdIf_Timer_GetInputFrequency : IfxStdIf_Timer.h

IfxStdIf_Timer_getPeriod() : IfxStdIf_Timer.h

IfxStdIf_Timer_GetPeriod : IfxStdIf_Timer.h

IfxStdIf_Timer_getPeriodSecond() : IfxStdIf_Timer.h

IfxStdIf_Timer_GetResolution : IfxStdIf_Timer.h

IfxStdIf_Timer_getResolution() : IfxStdIf_Timer.h

IfxStdIf_Timer_GetTrigger : IfxStdIf_Timer.h

IfxStdIf_Timer_getTrigger() : IfxStdIf_Timer.h

IfxStdIf_Timer_initConfig() : IfxStdIf_Timer.h , IfxStdIf_Timer.c

IfxStdIf_Timer_initStdIf() : IfxStdIf_Timer.h , IfxStdIf_Timer.c

IfxStdIf_Timer_Output_disabled : IfxStdIf_Timer.h

IfxStdIf_Timer_Output_enabled : IfxStdIf_Timer.h

IfxStdIf_Timer_OutputEvent : IfxStdIf_Timer.h

IfxStdIf_Timer_Run : IfxStdIf_Timer.h

IfxStdIf_Timer_run() : IfxStdIf_Timer.h

IfxStdIf_Timer_setFrequency() : IfxStdIf_Timer.h

IfxStdIf_Timer_SetFrequency : IfxStdIf_Timer.h

IfxStdIf_Timer_setPeriod() : IfxStdIf_Timer.h

IfxStdIf_Timer_SetPeriod : IfxStdIf_Timer.h

IfxStdIf_Timer_setSingleMode() : IfxStdIf_Timer.h

IfxStdIf_Timer_SetSingleMode : IfxStdIf_Timer.h

IfxStdIf_Timer_SetTrigger : IfxStdIf_Timer.h

IfxStdIf_Timer_setTrigger() : IfxStdIf_Timer.h

IfxStdIf_Timer_stop() : IfxStdIf_Timer.h

IfxStdIf_Timer_Stop : IfxStdIf_Timer.h

IfxStdIf_Timer_sToTick() : IfxStdIf_Timer.h

IfxStdIf_Timer_tickToS() : IfxStdIf_Timer.h

IfxStdIf_Timer_updateInputFrequency() : IfxStdIf_Timer.h

IfxStdIf_Timer_UpdateInputFrequency : IfxStdIf_Timer.h

IfxStm_cfg_indexMap : IfxStm_cfg.c , IfxStm_cfg.h

IfxStm_clearCompareFlag() : IfxStm.h , IfxStm.c

IfxStm_Comparator : IfxStm.h

IfxStm_Comparator_0 : IfxStm.h

IfxStm_Comparator_1 : IfxStm.h

IfxStm_ComparatorInterrupt : IfxStm.h

IfxStm_ComparatorInterrupt_ir0 : IfxStm.h

IfxStm_ComparatorInterrupt_ir1 : IfxStm.h

IfxStm_ComparatorOffset : IfxStm.h

IfxStm_ComparatorOffset_0 : IfxStm.h

IfxStm_ComparatorOffset_1 : IfxStm.h

IfxStm_ComparatorOffset_10 : IfxStm.h

IfxStm_ComparatorOffset_11 : IfxStm.h

IfxStm_ComparatorOffset_12 : IfxStm.h

IfxStm_ComparatorOffset_13 : IfxStm.h

IfxStm_ComparatorOffset_14 : IfxStm.h

IfxStm_ComparatorOffset_15 : IfxStm.h

IfxStm_ComparatorOffset_16 : IfxStm.h

IfxStm_ComparatorOffset_17 : IfxStm.h

IfxStm_ComparatorOffset_18 : IfxStm.h

IfxStm_ComparatorOffset_19 : IfxStm.h

IfxStm_ComparatorOffset_2 : IfxStm.h

IfxStm_ComparatorOffset_20 : IfxStm.h

IfxStm_ComparatorOffset_21 : IfxStm.h

IfxStm_ComparatorOffset_22 : IfxStm.h

IfxStm_ComparatorOffset_23 : IfxStm.h

IfxStm_ComparatorOffset_24 : IfxStm.h

IfxStm_ComparatorOffset_25 : IfxStm.h

IfxStm_ComparatorOffset_26 : IfxStm.h

IfxStm_ComparatorOffset_27 : IfxStm.h

IfxStm_ComparatorOffset_28 : IfxStm.h

IfxStm_ComparatorOffset_29 : IfxStm.h

IfxStm_ComparatorOffset_3 : IfxStm.h

IfxStm_ComparatorOffset_30 : IfxStm.h

IfxStm_ComparatorOffset_31 : IfxStm.h

IfxStm_ComparatorOffset_4 : IfxStm.h

IfxStm_ComparatorOffset_5 : IfxStm.h

IfxStm_ComparatorOffset_6 : IfxStm.h

IfxStm_ComparatorOffset_7 : IfxStm.h

IfxStm_ComparatorOffset_8 : IfxStm.h

IfxStm_ComparatorOffset_9 : IfxStm.h

IfxStm_ComparatorSize : IfxStm.h

IfxStm_ComparatorSize_10Bits : IfxStm.h

IfxStm_ComparatorSize_11Bits : IfxStm.h

IfxStm_ComparatorSize_12Bits : IfxStm.h

IfxStm_ComparatorSize_13Bits : IfxStm.h

IfxStm_ComparatorSize_14Bits : IfxStm.h

IfxStm_ComparatorSize_15Bits : IfxStm.h

IfxStm_ComparatorSize_16Bits : IfxStm.h

IfxStm_ComparatorSize_17Bits : IfxStm.h

IfxStm_ComparatorSize_18Bits : IfxStm.h

IfxStm_ComparatorSize_19Bits : IfxStm.h

IfxStm_ComparatorSize_1Bit : IfxStm.h

IfxStm_ComparatorSize_20Bits : IfxStm.h

IfxStm_ComparatorSize_21Bits : IfxStm.h

IfxStm_ComparatorSize_22Bits : IfxStm.h

IfxStm_ComparatorSize_23Bits : IfxStm.h

IfxStm_ComparatorSize_24Bits : IfxStm.h

IfxStm_ComparatorSize_25Bits : IfxStm.h

IfxStm_ComparatorSize_26Bits : IfxStm.h

IfxStm_ComparatorSize_27Bits : IfxStm.h

IfxStm_ComparatorSize_28Bits : IfxStm.h

IfxStm_ComparatorSize_29Bits : IfxStm.h

IfxStm_ComparatorSize_2Bits : IfxStm.h

IfxStm_ComparatorSize_30Bits : IfxStm.h

IfxStm_ComparatorSize_31Bits : IfxStm.h

IfxStm_ComparatorSize_32Bits : IfxStm.h

IfxStm_ComparatorSize_3Bits : IfxStm.h

IfxStm_ComparatorSize_4Bits : IfxStm.h

IfxStm_ComparatorSize_5Bits : IfxStm.h

IfxStm_ComparatorSize_6Bits : IfxStm.h

IfxStm_ComparatorSize_7Bits : IfxStm.h

IfxStm_ComparatorSize_8Bits : IfxStm.h

IfxStm_ComparatorSize_9Bits : IfxStm.h

IFXSTM_DEFAULT_TIMER : IfxStm.h

IfxStm_disableComparatorInterrupt() : IfxStm.c , IfxStm.h

IfxStm_disableModule() : IfxStm.c , IfxStm.h

IfxStm_enableComparatorInterrupt() : IfxStm.h , IfxStm.c

IfxStm_enableOcdsSuspend() : IfxStm.c , IfxStm.h

IfxStm_get() : IfxStm.h

IfxStm_getAddress() : IfxStm.c , IfxStm.h

IfxStm_getCompare() : IfxStm.h

IfxStm_getDeadLine() : IfxStm.h

IfxStm_getFrequency() : IfxStm.h

IfxStm_getIndex() : IfxStm.c , IfxStm.h

IfxStm_getLower() : IfxStm.h

IfxStm_getOffset12Timer() : IfxStm.h

IfxStm_getOffset16Timer() : IfxStm.h

IfxStm_getOffset20Timer() : IfxStm.h

IfxStm_getOffset32Timer() : IfxStm.h

IfxStm_getOffset4Timer() : IfxStm.h

IfxStm_getOffset8Timer() : IfxStm.h

IfxStm_getOffsetTimer() : IfxStm.h

IfxStm_getSrcPointer() : IfxStm.c , IfxStm.h

IfxStm_getTicksFromMicroseconds() : IfxStm.h

IfxStm_getTicksFromMilliseconds() : IfxStm.h

IfxStm_increaseCompare() : IfxStm.h

IfxStm_Index : IfxStm_cfg.h

IfxStm_Index_0 : IfxStm_cfg.h

IfxStm_Index_1 : IfxStm_cfg.h

IfxStm_Index_none : IfxStm_cfg.h

IfxStm_initCompare() : IfxStm.c , IfxStm.h

IfxStm_initCompareConfig() : IfxStm.c , IfxStm.h

IfxStm_isCompareFlagSet() : IfxStm.c , IfxStm.h

IfxStm_isDeadLine() : IfxStm.h

IfxStm_isModuleSuspended() : IfxStm.h

IfxStm_now() : IfxStm.h

IFXSTM_NUM_COMPARATORS : IfxStm_cfg.h

IFXSTM_NUM_MODULES : IfxStm_cfg.h

IfxStm_resetModule() : IfxStm.h , IfxStm.c

IfxStm_setCompareControl() : IfxStm.h , IfxStm.c

IfxStm_setSleepMode() : IfxStm.h

IfxStm_setSuspendMode() : IfxStm.h

IfxStm_SleepMode : IfxStm.h

IfxStm_SleepMode_disable : IfxStm.h

IfxStm_SleepMode_enable : IfxStm.h

IfxStm_SuspendMode : IfxStm.h

IfxStm_SuspendMode_hard : IfxStm.h

IfxStm_SuspendMode_none : IfxStm.h

IfxStm_SuspendMode_soft : IfxStm.h

IfxStm_Timer_acknowledgeTimerIrq() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_getFrequency() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_getInputFrequency() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_getPeriod() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_getResolution() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_init() : IfxStm_Timer.h , IfxStm_Timer.c

IfxStm_Timer_initConfig() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_run() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_setFrequency() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_setPeriod() : IfxStm_Timer.h , IfxStm_Timer.c

IfxStm_Timer_setSingleMode() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_stdIfTimerInit() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_Timer_stop() : IfxStm_Timer.h , IfxStm_Timer.c

IfxStm_Timer_updateInputFrequency() : IfxStm_Timer.c , IfxStm_Timer.h

IfxStm_updateCompare() : IfxStm.h

IfxStm_wait() : IfxStm.h

IfxStm_waitTicks() : IfxStm.h

IfxVadc_Adc_addToQueue() : IfxVadc_Adc.h

IfxVadc_Adc_clearQueue() : IfxVadc_Adc.h

IfxVadc_Adc_configureWaitForReadMode() : IfxVadc_Adc.h

IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister() : IfxVadc_Adc.h

IfxVadc_Adc_deInitGroup() : IfxVadc_Adc.c , IfxVadc_Adc.h

IfxVadc_Adc_deInitModule() : IfxVadc_Adc.h

IfxVadc_Adc_disableModule() : IfxVadc_Adc.c , IfxVadc_Adc.h

IfxVadc_Adc_getBackgroundScanStatus() : IfxVadc_Adc.h

IfxVadc_Adc_getChannelConfig() : IfxVadc_Adc.c , IfxVadc_Adc.h

IfxVadc_Adc_getChannelConversionTime() : IfxVadc_Adc.h , IfxVadc_Adc.c

IfxVadc_Adc_getDebugResult() : IfxVadc_Adc.h

IfxVadc_Adc_getGlobalResult() : IfxVadc_Adc.h

IfxVadc_Adc_getGroupConfig() : IfxVadc_Adc.c , IfxVadc_Adc.h

IfxVadc_Adc_getGroupRegsFromGroup() : IfxVadc_Adc.h

IfxVadc_Adc_getGroupResult() : IfxVadc_Adc.h

IfxVadc_Adc_getMasterId() : IfxVadc_Adc.c

IfxVadc_Adc_getMasterKernelIndex() : IfxVadc_Adc.c

IfxVadc_Adc_getModuleConfig() : IfxVadc_Adc.h

IfxVadc_Adc_getQueueStatus() : IfxVadc_Adc.h

IfxVadc_Adc_getResult() : IfxVadc_Adc.h

IfxVadc_Adc_getResultBasedOnRequestSource() : IfxVadc_Adc.h

IfxVadc_Adc_getScanStatus() : IfxVadc_Adc.h

IfxVadc_Adc_getVadcFromGroup() : IfxVadc_Adc.h

IfxVadc_Adc_initChannel() : IfxVadc_Adc.h , IfxVadc_Adc.c

IfxVadc_Adc_initChannelConfig() : IfxVadc_Adc.h , IfxVadc_Adc.c

IfxVadc_Adc_initExternalMultiplexerMode() : IfxVadc_Adc.h , IfxVadc_Adc.c

IfxVadc_Adc_initExternalMultiplexerModeConfig() : IfxVadc_Adc.c , IfxVadc_Adc.h

IfxVadc_Adc_initGroup() : IfxVadc_Adc.h , IfxVadc_Adc.c

IfxVadc_Adc_initGroupConfig() : IfxVadc_Adc.h , IfxVadc_Adc.c

IfxVadc_Adc_initModule() : IfxVadc_Adc.h , IfxVadc_Adc.c

IfxVadc_Adc_initModuleConfig() : IfxVadc_Adc.h , IfxVadc_Adc.c

IfxVadc_Adc_masterIndex : IfxVadc_Adc.c

IfxVadc_Adc_setBackgroundScan() : IfxVadc_Adc.h

IfxVadc_Adc_setScan() : IfxVadc_Adc.h

IfxVadc_Adc_startBackgroundScan() : IfxVadc_Adc.h

IfxVadc_Adc_startQueue() : IfxVadc_Adc.h

IfxVadc_Adc_startScan() : IfxVadc_Adc.h

IfxVadc_Adc_SYNCTR_STSEL : IfxVadc_Adc.h

IfxVadc_addToQueue() : IfxVadc.h

IFXVADC_ANALOG_FREQUENCY_MAX : IfxVadc_cfg.h

IFXVADC_ANALOG_FREQUENCY_MIN : IfxVadc_cfg.h

IfxVadc_AnalogConverterMode : IfxVadc.h

IfxVadc_AnalogConverterMode_fastStandby : IfxVadc.h

IfxVadc_AnalogConverterMode_normalOperation : IfxVadc.h

IfxVadc_AnalogConverterMode_off : IfxVadc.h

IfxVadc_AnalogConverterMode_slowStandby : IfxVadc.h

IfxVadc_ArbitrationRounds : IfxVadc.h

IfxVadc_ArbitrationRounds_16_slots : IfxVadc.h

IfxVadc_ArbitrationRounds_20_slots : IfxVadc.h

IfxVadc_ArbitrationRounds_4_slots : IfxVadc.h

IfxVadc_ArbitrationRounds_8_slots : IfxVadc.h

IfxVadc_BoundaryExtension : IfxVadc.h

IfxVadc_BoundaryExtension_fastCompareResult1 : IfxVadc.h

IfxVadc_BoundaryExtension_fastCompareResult10 : IfxVadc.h

IfxVadc_BoundaryExtension_fastCompareResult11 : IfxVadc.h

IfxVadc_BoundaryExtension_fastCompareResult12 : IfxVadc.h

IfxVadc_BoundaryExtension_fastCompareResult13 : IfxVadc.h

IfxVadc_BoundaryExtension_fastCompareResult14 : IfxVadc.h

IfxVadc_BoundaryExtension_fastCompareResult15 : IfxVadc.h

IfxVadc_BoundaryExtension_fastCompareResult2 : IfxVadc.h

IfxVadc_BoundaryExtension_fastCompareResult3 : IfxVadc.h

IfxVadc_BoundaryExtension_fastCompareResult4 : IfxVadc.h

IfxVadc_BoundaryExtension_fastCompareResult5 : IfxVadc.h

IfxVadc_BoundaryExtension_fastCompareResult6 : IfxVadc.h

IfxVadc_BoundaryExtension_fastCompareResult7 : IfxVadc.h

IfxVadc_BoundaryExtension_fastCompareResult8 : IfxVadc.h

IfxVadc_BoundaryExtension_fastCompareResult9 : IfxVadc.h

IfxVadc_BoundaryExtension_standard : IfxVadc.h

IfxVadc_BoundarySelection : IfxVadc.h

IfxVadc_BoundarySelection_global0 : IfxVadc.h

IfxVadc_BoundarySelection_global1 : IfxVadc.h

IfxVadc_BoundarySelection_group0 : IfxVadc.h

IfxVadc_BoundarySelection_group1 : IfxVadc.h

IfxVadc_calculateSampleTime() : IfxVadc.h

IfxVadc_cfg_srcAddresses : IfxVadc_cfg.h , IfxVadc_cfg.c

IfxVadc_ChannelId : IfxVadc.h

IfxVadc_ChannelId_0 : IfxVadc.h

IfxVadc_ChannelId_1 : IfxVadc.h

IfxVadc_ChannelId_10 : IfxVadc.h

IfxVadc_ChannelId_11 : IfxVadc.h

IfxVadc_ChannelId_12 : IfxVadc.h

IfxVadc_ChannelId_13 : IfxVadc.h

IfxVadc_ChannelId_14 : IfxVadc.h

IfxVadc_ChannelId_15 : IfxVadc.h

IfxVadc_ChannelId_2 : IfxVadc.h

IfxVadc_ChannelId_3 : IfxVadc.h

IfxVadc_ChannelId_4 : IfxVadc.h

IfxVadc_ChannelId_5 : IfxVadc.h

IfxVadc_ChannelId_6 : IfxVadc.h

IfxVadc_ChannelId_7 : IfxVadc.h

IfxVadc_ChannelId_8 : IfxVadc.h

IfxVadc_ChannelId_9 : IfxVadc.h

IfxVadc_ChannelId_none : IfxVadc.h

IfxVadc_ChannelReference : IfxVadc.h

IfxVadc_ChannelReference_channel0 : IfxVadc.h

IfxVadc_ChannelReference_standard : IfxVadc.h

IfxVadc_ChannelResolution : IfxVadc.h

IfxVadc_ChannelResolution_10bit : IfxVadc.h

IfxVadc_ChannelResolution_10bitFast : IfxVadc.h

IfxVadc_ChannelResolution_12bit : IfxVadc.h

IfxVadc_ChannelResolution_8bit : IfxVadc.h

IfxVadc_ChannelResult : IfxVadc.h

IfxVadc_ChannelResult_0 : IfxVadc.h

IfxVadc_ChannelResult_1 : IfxVadc.h

IfxVadc_ChannelResult_10 : IfxVadc.h

IfxVadc_ChannelResult_11 : IfxVadc.h

IfxVadc_ChannelResult_12 : IfxVadc.h

IfxVadc_ChannelResult_13 : IfxVadc.h

IfxVadc_ChannelResult_14 : IfxVadc.h

IfxVadc_ChannelResult_15 : IfxVadc.h

IfxVadc_ChannelResult_2 : IfxVadc.h

IfxVadc_ChannelResult_3 : IfxVadc.h

IfxVadc_ChannelResult_4 : IfxVadc.h

IfxVadc_ChannelResult_5 : IfxVadc.h

IfxVadc_ChannelResult_6 : IfxVadc.h

IfxVadc_ChannelResult_7 : IfxVadc.h

IfxVadc_ChannelResult_8 : IfxVadc.h

IfxVadc_ChannelResult_9 : IfxVadc.h

IfxVadc_ChannelSelectionStyle : IfxVadc.h

IfxVadc_ChannelSelectionStyle_binary : IfxVadc.h

IfxVadc_ChannelSelectionStyle_channelNumber : IfxVadc.h

IfxVadc_clearAllResultRequests() : IfxVadc.h

IfxVadc_clearChannelRequest() : IfxVadc.h

IfxVadc_clearQueue() : IfxVadc.h

IfxVadc_configExternalMultiplexerMode() : IfxVadc.h , IfxVadc.c

IfxVadc_configureWaitForReadMode() : IfxVadc.h

IfxVadc_configureWaitForReadModeForGlobalResultRegister() : IfxVadc.h

IfxVadc_ConversionType : IfxVadc.h

IfxVadc_ConversionType_Compatible : IfxVadc.h

IFXVADC_DEFAULT_ANALOG_FREQ : IfxVadc_cfg.h

IfxVadc_disableAccess() : IfxVadc.h , IfxVadc.c

IfxVadc_disableModule() : IfxVadc.h

IfxVadc_disablePostCalibration() : IfxVadc.h , IfxVadc.c

IfxVadc_disableQueueSlotExternalTrigger() : IfxVadc.h

IfxVadc_disableScanSlotExternalTrigger() : IfxVadc.h

IfxVadc_EMUX00_P02_6_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_EMUX00_P33_3_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_EMUX01_P02_7_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_EMUX01_P33_2_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_EMUX02_P02_8_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_EMUX02_P33_1_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_EMUX10_P00_6_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_EMUX10_P33_6_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_EMUX11_P00_7_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_EMUX11_P33_5_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_EMUX12_P00_8_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_EMUX12_P33_4_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_Emux_Out_pinTable : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_EmuxCodingScheme : IfxVadc.h

IfxVadc_EmuxCodingScheme_binary : IfxVadc.h

IfxVadc_EmuxCodingScheme_gray : IfxVadc.h

IfxVadc_EmuxInterface : IfxVadc.h

IfxVadc_EmuxInterface_0 : IfxVadc.h

IfxVadc_EmuxInterface_1 : IfxVadc.h

IfxVadc_EmuxSampleTimeControl : IfxVadc.h

IfxVadc_EmuxSampleTimeControl_always : IfxVadc.h

IfxVadc_EmuxSampleTimeControl_settingChanges : IfxVadc.h

IfxVadc_EmuxSelectValue : IfxVadc.h

IfxVadc_EmuxSelectValue_0 : IfxVadc.h

IfxVadc_EmuxSelectValue_1 : IfxVadc.h

IfxVadc_EmuxSelectValue_2 : IfxVadc.h

IfxVadc_EmuxSelectValue_3 : IfxVadc.h

IfxVadc_EmuxSelectValue_4 : IfxVadc.h

IfxVadc_EmuxSelectValue_5 : IfxVadc.h

IfxVadc_EmuxSelectValue_6 : IfxVadc.h

IfxVadc_EmuxSelectValue_7 : IfxVadc.h

IfxVadc_enableAccess() : IfxVadc.c , IfxVadc.h

IfxVadc_enableBackgroundScanSlotExternalTrigger() : IfxVadc.h

IfxVadc_enableFifoMode() : IfxVadc.h

IfxVadc_enableGroupSync() : IfxVadc.c , IfxVadc.h

IfxVadc_enableModule() : IfxVadc.h

IfxVadc_enableQueueSlotExternalTrigger() : IfxVadc.h

IfxVadc_enableScanSlotExternalTrigger() : IfxVadc.h

IfxVadc_enableServiceRequest() : IfxVadc.h

IfxVadc_ExternalMultiplexerMode : IfxVadc.h

IfxVadc_ExternalMultiplexerMode_sequence : IfxVadc.h

IfxVadc_ExternalMultiplexerMode_singleStep : IfxVadc.h

IfxVadc_ExternalMultiplexerMode_softwareControl : IfxVadc.h

IfxVadc_ExternalMultiplexerMode_steady : IfxVadc.h

IfxVadc_FifoMode : IfxVadc.h

IfxVadc_FifoMode_fifoStructure : IfxVadc.h

IfxVadc_FifoMode_maximumMode : IfxVadc.h

IfxVadc_FifoMode_minimumMode : IfxVadc.h

IfxVadc_FifoMode_seperateResultRegister : IfxVadc.h

IfxVadc_G0_0_AN0_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G0_10_AN10_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G0_11_AN11_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G0_12_AN12_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G0_13_AN13_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G0_1_AN1_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G0_2_AN2_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G0_3_AN3_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G0_4_AN4_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G0_5_AN5_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G0_6_AN6_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G0_7_AN7_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G0_8_AN8_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G0BFL0_P33_4_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G0BFL1_P33_5_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G0BFL2_P33_6_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G0BFL3_P33_7_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G1_0_AN16_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G1_10_AN26_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G1_10_P40_2_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G1_11_AN27_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G1_11_P40_3_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G1_12_AN28_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G1_13_AN29_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G1_1_AN17_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G1_2_AN18_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G1_3_AN19_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G1_4_AN20_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G1_5_AN21_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G1_8_AN24_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G1_8_P40_0_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G1_9_AN25_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G1_9_P40_1_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G1BFL0_P33_0_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G1BFL1_P33_1_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G1BFL2_P33_2_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G1BFL3_P33_3_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G2_0_AN32_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G2_10_AN44_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G2_11_AN45_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G2_12_AN46_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G2_13_AN47_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G2_14_AN48_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G2_15_AN49_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G2_1_AN33_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G2_3_AN35_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G2_4_AN36_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G2_4_P40_6_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G2_5_AN37_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G2_5_P40_7_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G2_6_AN38_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G2_6_P40_8_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G2_7_AN39_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G2_7_P40_9_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G2BFL0_P00_4_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G2BFL1_P00_5_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G2BFL2_P00_6_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G2BFL3_P00_7_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G3_0_P00_12_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G3_10_P00_2_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G3_11_P00_1_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G3_1_P00_11_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G3_2_P00_10_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G3_3_P00_9_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G3_4_P00_8_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G3_5_P00_7_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G3_6_P00_6_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G3_7_P00_5_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G3_8_P00_4_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G3_9_P00_3_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G3BFL0_P10_0_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G3BFL0_P10_6_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G3BFL1_P10_1_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G3BFL1_P10_7_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h

IfxVadc_G3BFL2_P10_2_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_G3BFL3_P10_3_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_GatingMode : IfxVadc.h

IfxVadc_GatingMode_always : IfxVadc.h

IfxVadc_GatingMode_disabled : IfxVadc.h

IfxVadc_GatingMode_gatingHigh : IfxVadc.h

IfxVadc_GatingMode_gatingLow : IfxVadc.h

IfxVadc_GatingSource : IfxVadc.h

IfxVadc_GatingSource_0 : IfxVadc.h

IfxVadc_GatingSource_1 : IfxVadc.h

IfxVadc_GatingSource_10 : IfxVadc.h

IfxVadc_GatingSource_11 : IfxVadc.h

IfxVadc_GatingSource_12 : IfxVadc.h

IfxVadc_GatingSource_13 : IfxVadc.h

IfxVadc_GatingSource_14 : IfxVadc.h

IfxVadc_GatingSource_15 : IfxVadc.h

IfxVadc_GatingSource_2 : IfxVadc.h

IfxVadc_GatingSource_3 : IfxVadc.h

IfxVadc_GatingSource_4 : IfxVadc.h

IfxVadc_GatingSource_5 : IfxVadc.h

IfxVadc_GatingSource_6 : IfxVadc.h

IfxVadc_GatingSource_7 : IfxVadc.h

IfxVadc_GatingSource_8 : IfxVadc.h

IfxVadc_GatingSource_9 : IfxVadc.h

IfxVadc_getAdcAnalogFrequency() : IfxVadc.c , IfxVadc.h

IfxVadc_getAdcCalibrationActiveState() : IfxVadc.h

IfxVadc_getAdcDigitalFrequency() : IfxVadc.c , IfxVadc.h

IfxVadc_getAdcModuleFrequency() : IfxVadc.c , IfxVadc.h

IfxVadc_getArbiterRoundLength() : IfxVadc.h

IfxVadc_getAssignedChannels() : IfxVadc.h

IfxVadc_getBackgroundScanGatingMode() : IfxVadc.h

IfxVadc_getBackgroundScanGatingSource() : IfxVadc.h

IfxVadc_getBackgroundScanSlotPriority() : IfxVadc.h

IfxVadc_getBackgroundScanSlotStartMode() : IfxVadc.h

IfxVadc_getBackgroundScanStatus() : IfxVadc.h , IfxVadc.c

IfxVadc_getBackgroundScanTriggerInput() : IfxVadc.h

IfxVadc_getBackgroundScanTriggerMode() : IfxVadc.h

IfxVadc_getChannelControlConfig() : IfxVadc.h

IfxVadc_getChannelConversionTime() : IfxVadc.c , IfxVadc.h

IfxVadc_getChannelInputClass() : IfxVadc.h

IfxVadc_getChannelResultServiceRequestNodePointer0() : IfxVadc.h

IfxVadc_getChannelResultServiceRequestNodePointer1() : IfxVadc.h

IfxVadc_getChannelServiceRequestNodePointer0() : IfxVadc.h

IfxVadc_getChannelServiceRequestNodePointer1() : IfxVadc.h

IfxVadc_getDebugResult() : IfxVadc.h

IfxVadc_getEmuxGlobalResolution() : IfxVadc.h

IfxVadc_getEmuxGlobalSampleTime() : IfxVadc.h

IfxVadc_getEmuxGroupResolution() : IfxVadc.h

IfxVadc_getEmuxGroupSampleTime() : IfxVadc.h

IfxVadc_getGlobalConfigValue() : IfxVadc.h

IfxVadc_getGlobalResolution() : IfxVadc.h

IfxVadc_getGlobalResult() : IfxVadc.h

IfxVadc_getGlobalSampleTime() : IfxVadc.h

IfxVadc_getGroupResolution() : IfxVadc.h

IfxVadc_getGroupResult() : IfxVadc.h

IfxVadc_getGroupSampleTime() : IfxVadc.h

IfxVadc_getMasterIndex() : IfxVadc.h

IfxVadc_getQueueSlotGatingMode() : IfxVadc.h

IfxVadc_getQueueSlotGatingSource() : IfxVadc.h

IfxVadc_getQueueSlotPriority() : IfxVadc.h

IfxVadc_getQueueSlotStartMode() : IfxVadc.h

IfxVadc_getQueueSlotTriggerInput() : IfxVadc.h

IfxVadc_getQueueSlotTriggerMode() : IfxVadc.h

IfxVadc_getQueueStatus() : IfxVadc.h , IfxVadc.c

IfxVadc_getResult() : IfxVadc.h

IfxVadc_getResultBasedOnRequestSource() : IfxVadc.c , IfxVadc.h

IfxVadc_getScanSlotGatingMode() : IfxVadc.h

IfxVadc_getScanSlotGatingSource() : IfxVadc.h

IfxVadc_getScanSlotPriority() : IfxVadc.h

IfxVadc_getScanSlotStartMode() : IfxVadc.h

IfxVadc_getScanSlotTriggerInput() : IfxVadc.h

IfxVadc_getScanSlotTriggerMode() : IfxVadc.h

IfxVadc_getScanStatus() : IfxVadc.c , IfxVadc.h

IfxVadc_getSrcAddress() : IfxVadc.c , IfxVadc.h

IfxVadc_getStartupCalibration() : IfxVadc.h

IfxVadc_GroupId : IfxVadc_cfg.h

IfxVadc_GroupId_0 : IfxVadc_cfg.h

IfxVadc_GroupId_1 : IfxVadc_cfg.h

IfxVadc_GroupId_2 : IfxVadc_cfg.h

IfxVadc_GroupId_3 : IfxVadc_cfg.h

IfxVadc_GroupId_global0 : IfxVadc_cfg.h

IfxVadc_GroupId_global1 : IfxVadc_cfg.h

IfxVadc_GxBfl_Out_pinTable : IfxVadc_PinMap.h , IfxVadc_PinMap.c

IfxVadc_initEmuxPin() : IfxVadc.h

IfxVadc_initGxBflPin() : IfxVadc.h

IfxVadc_initialiseAdcArbiterClock() : IfxVadc.h , IfxVadc.c

IfxVadc_initialiseAdcConverterClock() : IfxVadc.h , IfxVadc.c

IfxVadc_initializeFAdcD() : IfxVadc.c , IfxVadc.h

IfxVadc_initializeFAdcI() : IfxVadc.c , IfxVadc.h

IfxVadc_initiateStartupCalibration() : IfxVadc.h

IfxVadc_InputClasses : IfxVadc.h

IfxVadc_InputClasses_global0 : IfxVadc.h

IfxVadc_InputClasses_global1 : IfxVadc.h

IfxVadc_InputClasses_group0 : IfxVadc.h

IfxVadc_InputClasses_group1 : IfxVadc.h

IfxVadc_isAutoBackgroundScanEnabled() : IfxVadc.h

IfxVadc_isAutoScanEnabled() : IfxVadc.h

IfxVadc_isPostCalibration() : IfxVadc.h , IfxVadc.c

IfxVadc_isRequestBackgroundScanSlotEnabled() : IfxVadc.h

IfxVadc_isRequestQueueSlotEnabled() : IfxVadc.h

IfxVadc_isRequestScanSlotEnabled() : IfxVadc.h

IfxVadc_LimitCheck : IfxVadc.h

IfxVadc_LimitCheck_always : IfxVadc.h

IfxVadc_LimitCheck_eventIfInArea : IfxVadc.h

IfxVadc_LimitCheck_eventIfOutsideArea : IfxVadc.h

IfxVadc_LimitCheck_noCheck : IfxVadc.h

IfxVadc_LowSupplyVoltageSelect : IfxVadc.h

IfxVadc_LowSupplyVoltageSelect_3V : IfxVadc.h

IfxVadc_LowSupplyVoltageSelect_5V : IfxVadc.h

IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER : IfxVadc_cfg.h

IFXVADC_NUM_ADC_CAL_GROUPS : IfxVadc_cfg.h

IFXVADC_NUM_ADC_COMMON_GROUPS : IfxVadc_cfg.h

IFXVADC_NUM_ADC_GROUPS : IfxVadc_cfg.h

IFXVADC_NUM_EMUX_INTERFACE : IfxVadc_cfg.h

IFXVADC_NUM_GLOBAL_INPUTCLASSES : IfxVadc_cfg.h

IFXVADC_NUM_INPUTCLASSES : IfxVadc_cfg.h

IFXVADC_NUM_MODULES : IfxVadc_cfg.h

IFXVADC_NUM_REQUESTSLOTS : IfxVadc_cfg.h

IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS : IfxVadc_PinMap.h

IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS : IfxVadc_PinMap.h

IFXVADC_PINMAP_NUM_GROUPS : IfxVadc_PinMap.h

IFXVADC_PINMAP_NUM_MODULES : IfxVadc_PinMap.h

IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS : IfxVadc_PinMap.h

IfxVadc_Protection : IfxVadc.h

IfxVadc_Protection_channelControl0 : IfxVadc.h

IfxVadc_Protection_channelControl1 : IfxVadc.h

IfxVadc_Protection_channelControl10 : IfxVadc.h

IfxVadc_Protection_channelControl11 : IfxVadc.h

IfxVadc_Protection_channelControl12 : IfxVadc.h

IfxVadc_Protection_channelControl13 : IfxVadc.h

IfxVadc_Protection_channelControl14 : IfxVadc.h

IfxVadc_Protection_channelControl2 : IfxVadc.h

IfxVadc_Protection_channelControl3 : IfxVadc.h

IfxVadc_Protection_channelControl4 : IfxVadc.h

IfxVadc_Protection_channelControl5 : IfxVadc.h

IfxVadc_Protection_channelControl6 : IfxVadc.h

IfxVadc_Protection_channelControl7 : IfxVadc.h

IfxVadc_Protection_channelControl8 : IfxVadc.h

IfxVadc_Protection_channelControl9 : IfxVadc.h

IfxVadc_Protection_externalMultiplexer : IfxVadc.h

IfxVadc_Protection_globalConfig : IfxVadc.h

IfxVadc_Protection_initGroup0 : IfxVadc.h

IfxVadc_Protection_initGroup1 : IfxVadc.h

IfxVadc_Protection_initGroup10 : IfxVadc.h

IfxVadc_Protection_initGroup11 : IfxVadc.h

IfxVadc_Protection_initGroup12 : IfxVadc.h

IfxVadc_Protection_initGroup13 : IfxVadc.h

IfxVadc_Protection_initGroup14 : IfxVadc.h

IfxVadc_Protection_initGroup2 : IfxVadc.h

IfxVadc_Protection_initGroup3 : IfxVadc.h

IfxVadc_Protection_initGroup4 : IfxVadc.h

IfxVadc_Protection_initGroup5 : IfxVadc.h

IfxVadc_Protection_initGroup6 : IfxVadc.h

IfxVadc_Protection_initGroup7 : IfxVadc.h

IfxVadc_Protection_initGroup8 : IfxVadc.h

IfxVadc_Protection_initGroup9 : IfxVadc.h

IfxVadc_Protection_resultRegisterGroup0 : IfxVadc.h

IfxVadc_Protection_resultRegisterGroup1 : IfxVadc.h

IfxVadc_Protection_resultRegisterGroup10 : IfxVadc.h

IfxVadc_Protection_resultRegisterGroup11 : IfxVadc.h

IfxVadc_Protection_resultRegisterGroup12 : IfxVadc.h

IfxVadc_Protection_resultRegisterGroup13 : IfxVadc.h

IfxVadc_Protection_resultRegisterGroup14 : IfxVadc.h

IfxVadc_Protection_resultRegisterGroup2 : IfxVadc.h

IfxVadc_Protection_resultRegisterGroup3 : IfxVadc.h

IfxVadc_Protection_resultRegisterGroup4 : IfxVadc.h

IfxVadc_Protection_resultRegisterGroup5 : IfxVadc.h

IfxVadc_Protection_resultRegisterGroup6 : IfxVadc.h

IfxVadc_Protection_resultRegisterGroup7 : IfxVadc.h

IfxVadc_Protection_resultRegisterGroup8 : IfxVadc.h

IfxVadc_Protection_resultRegisterGroup9 : IfxVadc.h

IfxVadc_Protection_serviceGroup0 : IfxVadc.h

IfxVadc_Protection_serviceGroup1 : IfxVadc.h

IfxVadc_Protection_serviceGroup10 : IfxVadc.h

IfxVadc_Protection_serviceGroup11 : IfxVadc.h

IfxVadc_Protection_serviceGroup12 : IfxVadc.h

IfxVadc_Protection_serviceGroup13 : IfxVadc.h

IfxVadc_Protection_serviceGroup14 : IfxVadc.h

IfxVadc_Protection_serviceGroup2 : IfxVadc.h

IfxVadc_Protection_serviceGroup3 : IfxVadc.h

IfxVadc_Protection_serviceGroup4 : IfxVadc.h

IfxVadc_Protection_serviceGroup5 : IfxVadc.h

IfxVadc_Protection_serviceGroup6 : IfxVadc.h

IfxVadc_Protection_serviceGroup7 : IfxVadc.h

IfxVadc_Protection_serviceGroup8 : IfxVadc.h

IfxVadc_Protection_serviceGroup9 : IfxVadc.h

IfxVadc_Protection_testFunction : IfxVadc.h

IFXVADC_QUEUE_REFILL : IfxVadc_cfg.h

IfxVadc_RequestSlotPriority : IfxVadc.h

IfxVadc_RequestSlotPriority_high : IfxVadc.h

IfxVadc_RequestSlotPriority_highest : IfxVadc.h

IfxVadc_RequestSlotPriority_low : IfxVadc.h

IfxVadc_RequestSlotPriority_lowest : IfxVadc.h

IfxVadc_RequestSlotStartMode : IfxVadc.h

IfxVadc_RequestSlotStartMode_cancelInjectRepeat : IfxVadc.h

IfxVadc_RequestSlotStartMode_waitForStart : IfxVadc.h

IfxVadc_RequestSource : IfxVadc.h

IfxVadc_RequestSource_background : IfxVadc.h

IfxVadc_RequestSource_queue : IfxVadc.h

IfxVadc_RequestSource_scan : IfxVadc.h

IfxVadc_resetGroup() : IfxVadc.h

IfxVadc_resetKernel() : IfxVadc.c , IfxVadc.h

IFXVADC_SAMPLETIME_MIN : IfxVadc_cfg.h

IfxVadc_selectPowerSupplyVoltage() : IfxVadc.h , IfxVadc.c

IfxVadc_setAnalogConvertControl() : IfxVadc.h

IfxVadc_setArbiterPriority() : IfxVadc.c , IfxVadc.h

IfxVadc_setArbitrationRoundLength() : IfxVadc.h

IfxVadc_setAutoBackgroundScan() : IfxVadc.h

IfxVadc_setAutoScan() : IfxVadc.h

IfxVadc_setBackgroundPriorityChannel() : IfxVadc.h

IfxVadc_setBackgroundResultTarget() : IfxVadc.h

IfxVadc_setBackgroundScan() : IfxVadc.h

IfxVadc_setBackgroundScanSlotGatingConfig() : IfxVadc.h

IfxVadc_setBackgroundScanSlotTriggerConfig() : IfxVadc.h

IfxVadc_setBoundaryMode() : IfxVadc.h

IfxVadc_setChannelEventNodePointer0() : IfxVadc.h

IfxVadc_setChannelEventNodePointer1() : IfxVadc.h

IfxVadc_setChannelInputClass() : IfxVadc.h

IfxVadc_setChannelLimitCheckMode() : IfxVadc.h

IfxVadc_setEmuxGlobalResolution() : IfxVadc.h

IfxVadc_setEmuxGlobalSampleTime() : IfxVadc.h

IfxVadc_setEmuxGroupResolution() : IfxVadc.h

IfxVadc_setEmuxGroupSampletime() : IfxVadc.h

IfxVadc_setEmuxInterfaceForGroup() : IfxVadc.h

IfxVadc_setGlobalResolution() : IfxVadc.h

IfxVadc_setGlobalSampleTime() : IfxVadc.h

IfxVadc_setGroupPriorityChannel() : IfxVadc.h

IfxVadc_setGroupResolution() : IfxVadc.h

IfxVadc_setGroupSampleTime() : IfxVadc.h

IfxVadc_setLowerBoundary() : IfxVadc.h

IfxVadc_setMasterIndex() : IfxVadc.h

IfxVadc_setQueueSlotGatingConfig() : IfxVadc.h

IfxVadc_setQueueSlotTriggerOperatingConfig() : IfxVadc.h

IfxVadc_setReferenceInput() : IfxVadc.h

IfxVadc_setResultNodeEventPointer0() : IfxVadc.h

IfxVadc_setResultNodeEventPointer1() : IfxVadc.h

IfxVadc_setResultPosition() : IfxVadc.h

IfxVadc_setScan() : IfxVadc.h , IfxVadc.c

IfxVadc_setScanSlotGatingConfig() : IfxVadc.h

IfxVadc_setScanSlotTriggerConfig() : IfxVadc.h

IfxVadc_setSleepMode() : IfxVadc.h

IfxVadc_setSyncRequest() : IfxVadc.h

IfxVadc_setUpperBoundary() : IfxVadc.h

IfxVadc_SleepMode : IfxVadc.h

IfxVadc_SleepMode_disable : IfxVadc.h

IfxVadc_SleepMode_enable : IfxVadc.h

IfxVadc_SrcNr : IfxVadc.h

IfxVadc_SrcNr_group0 : IfxVadc.h

IfxVadc_SrcNr_group1 : IfxVadc.h

IfxVadc_SrcNr_group2 : IfxVadc.h

IfxVadc_SrcNr_group3 : IfxVadc.h

IfxVadc_SrcNr_shared0 : IfxVadc.h

IfxVadc_SrcNr_shared1 : IfxVadc.h

IfxVadc_SrcNr_shared2 : IfxVadc.h

IfxVadc_SrcNr_shared3 : IfxVadc.h

IfxVadc_startBackgroundScan() : IfxVadc.h

IfxVadc_startQueue() : IfxVadc.h

IfxVadc_startScan() : IfxVadc.h

IfxVadc_startupCalibration() : IfxVadc.c , IfxVadc.h

IfxVadc_Status : IfxVadc.h

IfxVadc_Status_channelsStillPending : IfxVadc.h

IfxVadc_Status_invalidChannel : IfxVadc.h

IfxVadc_Status_invalidGroup : IfxVadc.h

IfxVadc_Status_noAccess : IfxVadc.h

IfxVadc_Status_noError : IfxVadc.h

IfxVadc_Status_notInitialised : IfxVadc.h

IfxVadc_Status_queueFull : IfxVadc.h

IfxVadc_storeGroupResult() : IfxVadc.h

IfxVadc_TriggerMode : IfxVadc.h

IfxVadc_TriggerMode_noExternalTrigger : IfxVadc.h

IfxVadc_TriggerMode_uponAnyEdge : IfxVadc.h

IfxVadc_TriggerMode_uponFallingEdge : IfxVadc.h

IfxVadc_TriggerMode_uponRisingEdge : IfxVadc.h

IfxVadc_TriggerSource : IfxVadc.h

IfxVadc_TriggerSource_0 : IfxVadc.h

IfxVadc_TriggerSource_1 : IfxVadc.h

IfxVadc_TriggerSource_10 : IfxVadc.h

IfxVadc_TriggerSource_11 : IfxVadc.h

IfxVadc_TriggerSource_12 : IfxVadc.h

IfxVadc_TriggerSource_13 : IfxVadc.h

IfxVadc_TriggerSource_14 : IfxVadc.h

IfxVadc_TriggerSource_15 : IfxVadc.h

IfxVadc_TriggerSource_2 : IfxVadc.h

IfxVadc_TriggerSource_3 : IfxVadc.h

IfxVadc_TriggerSource_4 : IfxVadc.h

IfxVadc_TriggerSource_5 : IfxVadc.h

IfxVadc_TriggerSource_6 : IfxVadc.h

IfxVadc_TriggerSource_7 : IfxVadc.h

IfxVadc_TriggerSource_8 : IfxVadc.h

IfxVadc_TriggerSource_9 : IfxVadc.h

IfxVadc_Vadcg_In_pinTable : IfxVadc_PinMap.c , IfxVadc_PinMap.h

initTime() : Bsp.h

insert : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h

isDeadLine() : Bsp.h

ISSPACE : Ifx_Shell.c

isync : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- l -

  • laccum : Ifx_TypesTasking.h , Ifx_TypesDcc.h , Ifx_TypesGnuc.h , Ifx_TypesGhs.h
  • LOW_BYTE_FIRST : Platform_Types.h
  • LSB_FIRST : Platform_Types.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- m -

  • max : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • mfcr : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • min : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • MSB_FIRST : Platform_Types.h
  • mtcr : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- n -

  • NOP : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsTasking2G.h
  • nop : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • NOP : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs.h
  • now() : Bsp.h
  • nowWithoutCriticalSection() : Bsp.h
  • NULL_PTR : Compilers.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- p -

  • pchar : Ifx_Types.h
  • PIN_DRIVER_STRONG_SHARP : Bsp.h
  • Pin_enableEmgStop : Bsp.h
  • Pin_getGroupState : Bsp.h
  • Pin_getState : Bsp.h
  • Pin_setDriver : Bsp.h
  • Pin_setGroupModeInput : Bsp.h
  • Pin_setGroupModeOutput : Bsp.h
  • Pin_setGroupState : Bsp.h
  • Pin_setMode : Bsp.h
  • Pin_setState : Bsp.h
  • Pin_setStateHigh : Bsp.h
  • Pin_setStateLow : Bsp.h
  • PLATFORM_AR_RELEASE_MAJOR_VERSION : Platform_Types.h
  • PLATFORM_AR_RELEASE_MINOR_VERSION : Platform_Types.h
  • PLATFORM_AR_RELEASE_REVISION_VERSION : Platform_Types.h
  • PLATFORM_SW_MAJOR_VERSION : Platform_Types.h
  • PLATFORM_SW_MINOR_VERSION : Platform_Types.h
  • PLATFORM_SW_PATCH_VERSION : Platform_Types.h
  • PLATFORM_VENDOR_ID : Platform_Types.h
  • poll() : Bsp.h
  • pvoid : Ifx_Types.h
  • PwmHl : PwmHl.h
  • PwmHl_Pause : PwmHl.h
  • PwmHl_Resume : PwmHl.h
  • PwmHl_Start : PwmHl.h
  • PwmHl_Stop : PwmHl.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- r -

  • restore : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • restoreInterrupts() : Bsp.h
  • round_f() : Ifx_AngleTrkF32.c
  • rslcx : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- s -

  • sfract : Ifx_TypesTasking.h , Ifx_TypesDcc.h , Ifx_TypesGnuc.h , Ifx_TypesGhs.h
  • SHELL_HELP_DESCRIPTION_TEXT : Ifx_Shell.h
  • sint16 : Platform_Types.h
  • sint16_least : Platform_Types.h
  • sint32 : Platform_Types.h
  • sint32_least : Platform_Types.h
  • sint64 : Platform_Types.h
  • sint8 : Platform_Types.h
  • sint8_least : Platform_Types.h
  • SpiIf : SpiIf.h
  • SpiIf_Cbk : SpiIf.h
  • SpiIf_Ch : SpiIf.h
  • SpiIf_ChConfig : SpiIf.h
  • SpiIf_ClockPolarity : SpiIf.h
  • SpiIf_ClockPolarity_idleHigh : SpiIf.h
  • SpiIf_ClockPolarity_idleLow : SpiIf.h
  • SpiIf_DataHeading : SpiIf.h
  • SpiIf_DataHeading_lsbFirst : SpiIf.h
  • SpiIf_DataHeading_msbFirst : SpiIf.h
  • SpiIf_Exchange : SpiIf.h
  • SpiIf_exchange() : SpiIf.h
  • SpiIf_getStatus() : SpiIf.h
  • SpiIf_GetStatus : SpiIf.h
  • SpiIf_initChannelConfig() : SpiIf.c , SpiIf.h
  • SpiIf_initConfig() : SpiIf.c , SpiIf.h
  • SpiIf_Mode : SpiIf.h
  • SpiIf_Mode_master : SpiIf.h
  • SpiIf_Mode_slave : SpiIf.h
  • SpiIf_Mode_undefined : SpiIf.h
  • SpiIf_OnEvent : SpiIf.h
  • SpiIf_ShiftClock : SpiIf.h
  • SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge : SpiIf.h
  • SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge : SpiIf.h
  • SpiIf_SlsoTiming : SpiIf.h
  • SpiIf_SlsoTiming_0 : SpiIf.h
  • SpiIf_SlsoTiming_1 : SpiIf.h
  • SpiIf_SlsoTiming_2 : SpiIf.h
  • SpiIf_SlsoTiming_3 : SpiIf.h
  • SpiIf_SlsoTiming_4 : SpiIf.h
  • SpiIf_SlsoTiming_5 : SpiIf.h
  • SpiIf_SlsoTiming_6 : SpiIf.h
  • SpiIf_SlsoTiming_7 : SpiIf.h
  • SpiIf_SlsoTiming_HalfTsclk : SpiIf.h
  • SpiIf_Status : SpiIf.h
  • SpiIf_Status_busy : SpiIf.h
  • SpiIf_Status_ok : SpiIf.h
  • SpiIf_Status_unknown : SpiIf.h
  • SpiIf_wait() : SpiIf.h
  • STDIF_DPIPE_MAX_PRINT_SIZE : IfxStdIf_DPipe.h
  • STRINGIFY : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs2G.h
  • svlcx : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • syscall : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- t -

  • t : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • TIME_INFINITE : Ifx_Types.h
  • TIME_NULL : Ifx_Types.h
  • TimeConst : Bsp.h
  • TimeConst_0s : Bsp.h
  • TimeConst_100ms : Bsp.h
  • TimeConst_100ns : Bsp.h
  • TimeConst_100s : Bsp.h
  • TimeConst_100us : Bsp.h
  • TimeConst_10ms : Bsp.h
  • TimeConst_10ns : Bsp.h
  • TimeConst_10s : Bsp.h
  • TimeConst_10us : Bsp.h
  • TimeConst_1ms : Bsp.h
  • TimeConst_1s : Bsp.h
  • TimeConst_1us : Bsp.h
  • Timer : Timer.h
  • TIMER_COUNT : Bsp.h
  • Timer_CountOneStep : Timer.h
  • TIMER_INDEX_100MS : Bsp.h
  • TIMER_INDEX_100NS : Bsp.h
  • TIMER_INDEX_100S : Bsp.h
  • TIMER_INDEX_100US : Bsp.h
  • TIMER_INDEX_10MS : Bsp.h
  • TIMER_INDEX_10NS : Bsp.h
  • TIMER_INDEX_10S : Bsp.h
  • TIMER_INDEX_10US : Bsp.h
  • TIMER_INDEX_1MS : Bsp.h
  • TIMER_INDEX_1S : Bsp.h
  • TIMER_INDEX_1US : Bsp.h
  • Timer_Start : Timer.h
  • Timer_StartSingleShotMode : Timer.h
  • Timer_Stop : Timer.h
  • Timer_SynchronousStart : Timer.h
  • Timer_SynchronousStop : Timer.h
  • timingNoInterruptEnd() : Bsp.h
  • timingNoInterruptStart() : Bsp.h
  • TPwm : TPwm.h
  • TPwm_Pause : TPwm.h
  • TPwm_Resume : TPwm.h
  • TPwm_Start : TPwm.h
  • TPwm_Stop : TPwm.h
  • TRUE : Platform_Types.h
  • TxRxHandler : SpiIf.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- u -

  • u : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • uint16 : Platform_Types.h
  • uint16_least : Platform_Types.h
  • uint32 : Platform_Types.h
  • uint32_least : Platform_Types.h
  • uint64 : Platform_Types.h
  • uint8 : Platform_Types.h
  • uint8_least : Platform_Types.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- v -

  • VecAvg_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecGain_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • VecHalfSwap_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMax_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • VecMaxIdx_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMin_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMinIdx_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecOfs_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • VecPwrdB_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecPwrdB_SF() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecSum_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecWin_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • voidfunc : IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGhs.h
  • voidfuncvoid : Ifx_Types.h
  • vvoid : Ifx_Types.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- w -

  • wait() : Bsp.h
  • waitPoll() : Bsp.c , Bsp.h
  • waitTime() : Bsp.c , Bsp.h
  • WaitTimeFunction : Bsp.h
  • wi : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

- _ -

  • __abs() : IfxCpu_IntrinsicsDcc.h
  • __absdif() : IfxCpu_IntrinsicsDcc.h
  • __abss() : IfxCpu_IntrinsicsDcc.h
  • __addr_to_cx() : IfxCpu_Intrinsics.h
  • __adds() : IfxCpu_IntrinsicsDcc.h
  • __bisr() : IfxCpu_IntrinsicsDcc.h
  • __cacheawi() : IfxCpu_IntrinsicsDcc.h
  • __clo() : IfxCpu_IntrinsicsDcc.h
  • __cls() : IfxCpu_IntrinsicsDcc.h
  • __clz() : IfxCpu_IntrinsicsDcc.h
  • __cx_to_addr() : IfxCpu_Intrinsics.h
  • __debug() : IfxCpu_IntrinsicsDcc.h
  • __disable() : IfxCpu_IntrinsicsDcc.h
  • __dsync() : IfxCpu_IntrinsicsDcc.h
  • __enable() : IfxCpu_IntrinsicsDcc.h
  • __extr() : IfxCpu_IntrinsicsDcc.h
  • __extru() : IfxCpu_IntrinsicsDcc.h
  • __float_to_sfract() : IfxCpu_IntrinsicsDcc.h
  • __initcirc() : IfxCpu_IntrinsicsDcc.h
  • __ins() : IfxCpu_IntrinsicsDcc.h
  • __insert() : IfxCpu_IntrinsicsDcc.h
  • __insn() : IfxCpu_IntrinsicsDcc.h
  • __isync() : IfxCpu_IntrinsicsDcc.h
  • __ld32() : IfxCpu_Intrinsics.h
  • __ld64() : IfxCpu_Intrinsics.h
  • __ld64_lu() : IfxCpu_Intrinsics.h
  • __ldmst_c() : IfxCpu_Intrinsics.h
  • __max() : IfxCpu_IntrinsicsDcc.h
  • __maxs() : IfxCpu_IntrinsicsDcc.h
  • __maxu() : IfxCpu_IntrinsicsDcc.h
  • __mfcr() : IfxCpu_IntrinsicsDcc.h
  • __min() : IfxCpu_IntrinsicsDcc.h
  • __mins() : IfxCpu_IntrinsicsDcc.h
  • __minu() : IfxCpu_IntrinsicsDcc.h
  • __mtcr() : IfxCpu_IntrinsicsDcc.h
  • __nop() : IfxCpu_IntrinsicsDcc.h
  • __restore() : IfxCpu_IntrinsicsDcc.h
  • __rslcx() : IfxCpu_IntrinsicsDcc.h
  • __scheduling_barrier() : IfxCpu_IntrinsicsDcc.h
  • __st32() : IfxCpu_Intrinsics.h
  • __st64() : IfxCpu_Intrinsics.h
  • __st64_lu() : IfxCpu_Intrinsics.h
  • __svlcx() : IfxCpu_IntrinsicsDcc.h
  • __syscall() : IfxCpu_IntrinsicsDcc.h
  • _Core0_start() : IfxCpu_CStart0.c
  • _Core1_start() : IfxCpu_CStart1.c , IfxCpu_CStart.h
  • _Core2_start() : IfxCpu_CStart.h
  • _START() : IfxCpu_CStart0.c


iLLD_TC26B: Globals

- a -

  • addTTime() : Bsp.h
  • areInterruptsEnabled() : Bsp.h


iLLD_TC26B: Globals

- c -

  • core0_main() : IfxCpu_CStart0.c
  • core1_main() : IfxCpu_CStart1.c
  • CplxVecCpy_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • CplxVecCpy_f32S() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecMag_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • CplxVecMul_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecPwr_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecRst_f32() : Ifx_Cf32.h , Ifx_Cf32.c


iLLD_TC26B: Globals

- d -

  • DateTime_get() : Ifx_DateTime.c , Ifx_DateTime.h
  • DateTime_set() : Ifx_DateTime.h , Ifx_DateTime.c
  • disableInterrupts() : Bsp.h


iLLD_TC26B: Globals

- e -

  • elapsed() : Bsp.h
  • enableInterrupts() : Bsp.h


iLLD_TC26B: Globals

- f -

  • forceDisableInterrupts() : Bsp.h


iLLD_TC26B: Globals

- g -

  • getDeadLine() : Bsp.h
  • getTimeout() : Bsp.h


iLLD_TC26B: Globals

- i -

  • Ifx__absb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__absdif() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__absh() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__abss() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__abssh() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • Ifx__adds() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__addsu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cacheai() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • Ifx__cacheawi() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cacheawi_bo_post_inc() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cacheiwi() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__clo() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__cls() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__clssf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cmpAndSwap() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h
  • Ifx__crc32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • Ifx__debug() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__disable_and_save() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__dsync() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__extr() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extracthw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extracthw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extru() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__fabs() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__fabsf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__fixpoint_to_float32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__float_to_fract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__float_to_sfract() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__fract_to_float() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__fract_to_sfract() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__getA11() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__getbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getDataParamRet() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h
  • Ifx__getfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__gethw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__gethw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__imaskldmst() : IfxCpu_IntrinsicsDcc.h
  • Ifx__initpackb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initpackbl() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initpackhw() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initpackhwl() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initupackb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initupackhw() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__ins() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__insert() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__inserthw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__inserthw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insn() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__isync() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__jump_and_link() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__jumpBackToLink() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__jumpToFunction() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__jumpToFunctionWithLink() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__ldmst() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__ldmstAsm() : IfxCpu_IntrinsicsTasking.h
  • Ifx__mac_r_sf() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • Ifx__mac_sf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__max() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__maxs() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__maxu() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__min() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__minb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__minbu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__minh() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__minhu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__mins() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__minu() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__moveToAddrParam0() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__moveToDataParam0() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__moveToDataParamRet() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__mulfractfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__mulfractlong() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__mulsc() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__non_return_call() : IfxCpu_IntrinsicsDcc.h
  • Ifx__nop() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__nops() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__nops1000() : IfxCpu_IntrinsicsDcc.h
  • Ifx__parity() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__popcnt() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__restore() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__rol() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__ror() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__round16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__rslcx() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__s16_to_sfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__satb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__satbu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sath() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sathu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sethw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sethw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setStackPointer() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__setubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sfract_to_s16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sfract_to_u16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__shaaccum() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__shafracts() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__shasfracts() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__stopPerfCounters() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__subs() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__subsu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__svlcx() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__swap() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__u16_to_sfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx_AngleTrkF32_bound() : Ifx_AngleTrkF32.c
  • Ifx_AngleTrkF32_boundInput() : Ifx_AngleTrkF32.c
  • Ifx_AngleTrkF32_getAbsolutePosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getDirection() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getFault() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getLoopSpeed() : Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getOffset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getPeriodPerRotation() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getPosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getRawPosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getRefreshPeriod() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getResolution() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getSensorType() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getSpeed() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getTurn() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_init() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_initConfig() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_reset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_resetFaults() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_setControlGains() : Ifx_AngleTrkF32.c
  • Ifx_AngleTrkF32_setOffset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_setRefreshPeriod() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_setUserSampling() : Ifx_AngleTrkF32.c
  • Ifx_AngleTrkF32_stdIfPosInit() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_step() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_update() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_updateStatus() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_Assert_doLevel() : Assert.c , Assert.h
  • Ifx_Assert_doValidate() : Assert.c , Assert.h
  • Ifx_C_Init() : Compilers.h
  • IFX_Cf32_add() : Ifx_Cf32.h
  • IFX_Cf32_amp() : Ifx_Cf32.h
  • IFX_Cf32_div() : Ifx_Cf32.h
  • IFX_Cf32_dot() : Ifx_Cf32.h
  • IFX_Cf32_exp() : Ifx_Cf32.h
  • IFX_Cf32_mag() : Ifx_Cf32.h
  • IFX_Cf32_mul() : Ifx_Cf32.h
  • IFX_Cf32_reset() : Ifx_Cf32.h
  • IFX_Cf32_saturate() : Ifx_Cf32.h
  • IFX_Cf32_set() : Ifx_Cf32.h
  • IFX_Cf32_sub() : Ifx_Cf32.h
  • Ifx_CircularBuffer_addDataIncr() : Ifx_CircularBuffer.c
  • Ifx_CircularBuffer_get16() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_get32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_read32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_read8() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_write32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_write8() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_ClpxFloat32_Integral_init() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_ClpxFloat32_Integral_reset() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_ClpxFloat32_Integral_step() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_Console_decrAlign() : Ifx_Console.h
  • Ifx_Console_getIo() : Ifx_Console.h
  • Ifx_Console_incrAlign() : Ifx_Console.h
  • Ifx_Console_init() : Ifx_Console.c , Ifx_Console.h
  • Ifx_Console_print() : Ifx_Console.c , Ifx_Console.h
  • Ifx_Console_printAlign() : Ifx_Console.c , Ifx_Console.h
  • Ifx_Crc_bitByBit() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_bitByBitFast() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_createTable() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_init() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_reflect() : Ifx_Crc.c
  • Ifx_Crc_table() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_tableFast() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_FftF32_generateTwiddleFactor() : Ifx_FftF32.c , Ifx_FftF32.h
  • Ifx_FftF32_lookUpReversedBits() : Ifx_FftF32.h
  • Ifx_FftF32_lookUpTwiddleFactor() : Ifx_FftF32.h
  • Ifx_FftF32_radix2() : Ifx_FftF32.c , Ifx_FftF32.h
  • Ifx_FftF32_radix2DecimationInTime() : Ifx_FftF32.c
  • Ifx_FftF32_radix2I() : Ifx_FftF32.c , Ifx_FftF32.h
  • Ifx_FftF32_reverseBits() : Ifx_FftF32.c , Ifx_FftF32.h
  • Ifx_Fifo_canReadCount() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_canWriteCount() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_clear() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_create() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_destroy() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_flush() : Ifx_Fifo.h
  • Ifx_Fifo_init() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_isEmpty() : Ifx_Fifo.h
  • Ifx_Fifo_read() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_readCount() : Ifx_Fifo.h
  • Ifx_Fifo_write() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_writeCount() : Ifx_Fifo.h
  • Ifx_GlobalResources_get() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_GlobalResources_getIndex() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_GlobalResources_getItem() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_GlobalResources_getName() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_GlobalResources_init() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_IntegralF32_init() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_IntegralF32_reset() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_IntegralF32_step() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_InternalMux_init() : Ifx_InternalMux.c , Ifx_InternalMux.h
  • Ifx_LowPassPt1F32_do() : Ifx_LowPassPt1F32.c , Ifx_LowPassPt1F32.h
  • Ifx_LowPassPt1F32_init() : Ifx_LowPassPt1F32.c , Ifx_LowPassPt1F32.h
  • Ifx_LowPassPt1F32_reset() : Ifx_LowPassPt1F32.h
  • Ifx_LutAtan2F32_float32() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h
  • Ifx_LutAtan2F32_float32Private() : Ifx_LutAtan2F32.c
  • Ifx_LutAtan2F32_fxpAngle() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h
  • Ifx_LutAtan2F32_fxpAnglePrivate() : Ifx_LutAtan2F32.c
  • Ifx_LutAtan2F32_init() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h
  • Ifx_LutIndexedLinearF32_search() : Ifx_LutIndexedLinearF32.h
  • Ifx_LutLinearF32_searchBin() : Ifx_LutLinearF32.c , Ifx_LutLinearF32.h
  • Ifx_LutLinearF32_searchNegSeq() : Ifx_LutLinearF32.h
  • Ifx_LutLinearF32_searchPosSeq() : Ifx_LutLinearF32.h
  • Ifx_LutLSincosF32_cos() : Ifx_LutLSincosF32.h
  • Ifx_LutLSincosF32_cossin() : Ifx_LutLSincosF32.h
  • Ifx_LutLSincosF32_sin() : Ifx_LutLSincosF32.h
  • Ifx_LutSincosF32_cos() : Ifx_LutSincosF32.h
  • Ifx_LutSincosF32_cossin() : Ifx_LutSincosF32.h
  • Ifx_LutSincosF32_init() : Ifx_LutSincosF32.c , Ifx_LutSincosF32.h
  • Ifx_LutSincosF32_sin() : Ifx_LutSincosF32.c , Ifx_LutSincosF32.h
  • Ifx_RampF32_getRef() : Ifx_RampF32.h
  • Ifx_RampF32_getValue() : Ifx_RampF32.h
  • Ifx_RampF32_init() : Ifx_RampF32.h
  • Ifx_RampF32_reset() : Ifx_RampF32.h
  • Ifx_RampF32_setRef() : Ifx_RampF32.h
  • Ifx_RampF32_setSlewRate() : Ifx_RampF32.h
  • Ifx_RampF32_step() : Ifx_RampF32.c , Ifx_RampF32.h
  • Ifx_Shell_bbProtocolStart() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_cmdEscapeProcess() : Ifx_Shell.c
  • Ifx_Shell_commandFind() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_commandListFind() : Ifx_Shell.c
  • Ifx_Shell_deinit() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_disable() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_enable() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_execute() : Ifx_Shell.c
  • Ifx_Shell_init() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_initConfig() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_isEndOfLine() : Ifx_Shell.c
  • Ifx_Shell_matchToken() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseAddress() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseFloat32() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseFloat64() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseSInt32() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseSInt64() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseToken() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseUInt32() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseUInt64() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_printSyntax() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_process() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_protocolStart() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_showHelp() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_showHelpSingle() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_showHelpSingleCommand() : Ifx_Shell.c
  • Ifx_Shell_skipWhitespace() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_WndF32_apply() : Ifx_WndF32.h
  • IfxAsclin_Asc_blockingRead() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_blockingWrite() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_canReadCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_canWriteCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_clearRx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_clearTx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_disableModule() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_flushTx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getReadCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getReadEvent() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getSendCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getTxTimeStamp() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getWriteCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getWriteEvent() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_initiateTransmission() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_initModule() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_initModuleConfig() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_isrError() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_isrReceive() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_isrTransmit() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_read() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_resetSendCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_stdIfDPipeInit() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_write() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_clearAllFlags() : IfxAsclin.h
  • IfxAsclin_clearBreakDetectedFlag() : IfxAsclin.h
  • IfxAsclin_clearCollisionDetectionErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearFallingEdgeDetectedFlag() : IfxAsclin.h
  • IfxAsclin_clearFrameErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearHeaderTimeoutFlag() : IfxAsclin.h
  • IfxAsclin_clearKernelResetStatus() : IfxAsclin.h
  • IfxAsclin_clearLinAutoBaudDetectionErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearLinChecksumErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearLinParityErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearParityErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearRaisingEdgeDetectedFlag() : IfxAsclin.h
  • IfxAsclin_clearResponseTimeoutFlag() : IfxAsclin.h
  • IfxAsclin_clearRxFifoFillLevelFlag() : IfxAsclin.h
  • IfxAsclin_clearRxFifoOverflowFlag() : IfxAsclin.h
  • IfxAsclin_clearRxFifoUnderflowFlag() : IfxAsclin.h
  • IfxAsclin_clearRxHeaderEndFlag() : IfxAsclin.h
  • IfxAsclin_clearRxResponseEndFlag() : IfxAsclin.h
  • IfxAsclin_clearTransmissionCompletedFlag() : IfxAsclin.h
  • IfxAsclin_clearTxFifoFillLevelFlag() : IfxAsclin.h
  • IfxAsclin_clearTxFifoOverflowFlag() : IfxAsclin.h
  • IfxAsclin_clearTxHeaderEndFlag() : IfxAsclin.h
  • IfxAsclin_clearTxResponseEndFlag() : IfxAsclin.h
  • IfxAsclin_disableAllFlags() : IfxAsclin.h
  • IfxAsclin_disableModule() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_enableAscErrorFlags() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_enableAutoBaudrateDetection() : IfxAsclin.h
  • IfxAsclin_enableBreakDetectedFlag() : IfxAsclin.h
  • IfxAsclin_enableCollisionDetection() : IfxAsclin.h
  • IfxAsclin_enableCollisionDetectionErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableCts() : IfxAsclin.h
  • IfxAsclin_enableFallingEdgeDetectedFlag() : IfxAsclin.h
  • IfxAsclin_enableFrameErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableHardwareChecksum() : IfxAsclin.h
  • IfxAsclin_enableHeaderTimeoutFlag() : IfxAsclin.h
  • IfxAsclin_enableLinAutoBaudDetectionErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableLinChecksumErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableLinParityErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableLoopBackMode() : IfxAsclin.h
  • IfxAsclin_enableModule() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_enableParity() : IfxAsclin.h
  • IfxAsclin_enableParityErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableRaisingEdgeDetectedFlag() : IfxAsclin.h
  • IfxAsclin_enableResponseTimeoutFlag() : IfxAsclin.h
  • IfxAsclin_enableRxFifoFillLevelFlag() : IfxAsclin.h
  • IfxAsclin_enableRxFifoInlet() : IfxAsclin.h
  • IfxAsclin_enableRxFifoOverflowFlag() : IfxAsclin.h
  • IfxAsclin_enableRxFifoUnderflowFlag() : IfxAsclin.h
  • IfxAsclin_enableRxHeaderEndFlag() : IfxAsclin.h
  • IfxAsclin_enableRxResponseEndFlag() : IfxAsclin.h
  • IfxAsclin_enableTransmissionCompletedFlag() : IfxAsclin.h
  • IfxAsclin_enableTxFifoFillLevelFlag() : IfxAsclin.h
  • IfxAsclin_enableTxFifoOutlet() : IfxAsclin.h
  • IfxAsclin_enableTxFifoOverflowFlag() : IfxAsclin.h
  • IfxAsclin_enableTxHeaderEndFlag() : IfxAsclin.h
  • IfxAsclin_enableTxResponseEndFlag() : IfxAsclin.h
  • IfxAsclin_flushRxFifo() : IfxAsclin.h
  • IfxAsclin_flushTxFifo() : IfxAsclin.h
  • IfxAsclin_getAddress() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getAllErrorFlagsStatus() : IfxAsclin.h
  • IfxAsclin_getBreakDetectedFlagStatus() : IfxAsclin.h
  • IfxAsclin_getClockSource() : IfxAsclin.h
  • IfxAsclin_getClockStatus() : IfxAsclin.h
  • IfxAsclin_getCollisionDetectionErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getFaFrequency() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getFallingEdgeDetectedFlagStatus() : IfxAsclin.h
  • IfxAsclin_getFrameErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getHeaderTimeoutFlagStatus() : IfxAsclin.h
  • IfxAsclin_getIndex() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getKernelResetStatus() : IfxAsclin.h
  • IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getLinChecksumErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getLinParityErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getModuleStatus() : IfxAsclin.h
  • IfxAsclin_getOvsFrequency() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getParityErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getPdFrequency() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getPrescaler() : IfxAsclin.h
  • IfxAsclin_getRaisingEdgeDetectedFlagStatus() : IfxAsclin.h
  • IfxAsclin_getReceiveSignalStatus() : IfxAsclin.h
  • IfxAsclin_getResponseTimeoutFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxFifoFillLevel() : IfxAsclin.h
  • IfxAsclin_getRxFifoFillLevelFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxFifoOutletWidth() : IfxAsclin.h
  • IfxAsclin_getRxFifoOverflowFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxFifoUnderflowFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxHeaderEndFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxResponseEndFlagStatus() : IfxAsclin.h
  • IfxAsclin_getShiftFrequency() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getSrcPointerEr() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getSrcPointerRx() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getSrcPointerTx() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getTransmissionCompletedFlagStatus() : IfxAsclin.h
  • IfxAsclin_getTransmitSignalStatus() : IfxAsclin.h
  • IfxAsclin_getTxFifoFillLevel() : IfxAsclin.h
  • IfxAsclin_getTxFifoFillLevelFlagStatus() : IfxAsclin.h
  • IfxAsclin_getTxFifoInletWidth() : IfxAsclin.h
  • IfxAsclin_getTxFifoOverflowFlagStatus() : IfxAsclin.h
  • IfxAsclin_getTxHeaderEndFlagStatus() : IfxAsclin.h
  • IfxAsclin_getTxResponseEndFlagStatus() : IfxAsclin.h
  • IfxAsclin_initCtsPin() : IfxAsclin.h
  • IfxAsclin_initRtsPin() : IfxAsclin.h
  • IfxAsclin_initRxPin() : IfxAsclin.h
  • IfxAsclin_initSclkPin() : IfxAsclin.h
  • IfxAsclin_initSlsoPin() : IfxAsclin.h
  • IfxAsclin_initTxPin() : IfxAsclin.h
  • IfxAsclin_isModuleSuspended() : IfxAsclin.h
  • IfxAsclin_Lin_checkForReceivedHeaderFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_checkForReceivedResponseFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_checkForTransmittedHeaderFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_checkForTransmittedResponseFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_clearFlagsStatus() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_disableModule() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_ignoreHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_initModule() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_initModuleConfig() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_isrError() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_isrReceive() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_isrTransmit() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_prepareHeaderReception() : IfxAsclin_Lin.h
  • IfxAsclin_Lin_prepareResponseReception() : IfxAsclin_Lin.h
  • IfxAsclin_Lin_readHeader() : IfxAsclin_Lin.h
  • IfxAsclin_Lin_readResponse() : IfxAsclin_Lin.h
  • IfxAsclin_Lin_receiveHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_receiveResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_sendFrame() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_sendHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_sendResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_waitForReceivedHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_waitForReceivedResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_waitForTransmittedHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_waitForTransmittedResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_read16() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_read32() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_read8() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_readRxData() : IfxAsclin.h
  • IfxAsclin_resetModule() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_setBaudrateBitFields() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_setBitTiming() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_setBrdLowerlimt() : IfxAsclin.h
  • IfxAsclin_setBrdUpperlimt() : IfxAsclin.h
  • IfxAsclin_setChecksumInjection() : IfxAsclin.h
  • IfxAsclin_setChecksumMode() : IfxAsclin.h
  • IfxAsclin_setClockPolarity() : IfxAsclin.h
  • IfxAsclin_setClockSource() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_setCtsInput() : IfxAsclin.h
  • IfxAsclin_setDataLength() : IfxAsclin.h
  • IfxAsclin_setDenominator() : IfxAsclin.h
  • IfxAsclin_setDisableModuleRequest() : IfxAsclin.h
  • IfxAsclin_setEnableModuleRequest() : IfxAsclin.h
  • IfxAsclin_setFilterDepth() : IfxAsclin.h
  • IfxAsclin_setFrameMode() : IfxAsclin.h
  • IfxAsclin_setHeaderResponseSelect() : IfxAsclin.h
  • IfxAsclin_setIdleDelay() : IfxAsclin.h
  • IfxAsclin_setKernelResetOne() : IfxAsclin.h
  • IfxAsclin_setKernelResetZero() : IfxAsclin.h
  • IfxAsclin_setLeadDelay() : IfxAsclin.h
  • IfxAsclin_setLinBreakLength() : IfxAsclin.h
  • IfxAsclin_setLinHeaderTimeout() : IfxAsclin.h
  • IfxAsclin_setLinMode() : IfxAsclin.h
  • IfxAsclin_setLinResponseTimeoutMode() : IfxAsclin.h
  • IfxAsclin_setLinResponseTimeoutThreshold() : IfxAsclin.h
  • IfxAsclin_setNumerator() : IfxAsclin.h
  • IfxAsclin_setOversampling() : IfxAsclin.h
  • IfxAsclin_setParityType() : IfxAsclin.h
  • IfxAsclin_setPrescaler() : IfxAsclin.h
  • IfxAsclin_setRtsCtsPolarity() : IfxAsclin.h
  • IfxAsclin_setRxBufferMode() : IfxAsclin.h
  • IfxAsclin_setRxFifoInterruptLevel() : IfxAsclin.h
  • IfxAsclin_setRxFifoOutletWidth() : IfxAsclin.h
  • IfxAsclin_setRxInput() : IfxAsclin.h
  • IfxAsclin_setSampleMode() : IfxAsclin.h
  • IfxAsclin_setSamplePointPosition() : IfxAsclin.h
  • IfxAsclin_setShiftDirection() : IfxAsclin.h
  • IfxAsclin_setSlavePolarity() : IfxAsclin.h
  • IfxAsclin_setSleepMode() : IfxAsclin.h
  • IfxAsclin_setStopBit() : IfxAsclin.h
  • IfxAsclin_setSuspendMode() : IfxAsclin.h
  • IfxAsclin_setTransmitHeaderRequestFlag() : IfxAsclin.h
  • IfxAsclin_setTransmitResponseRequestFlag() : IfxAsclin.h
  • IfxAsclin_setTransmitWakeRequestFlag() : IfxAsclin.h
  • IfxAsclin_setTxFifoInletWidth() : IfxAsclin.h
  • IfxAsclin_setTxFifoInterruptLevel() : IfxAsclin.h
  • IfxAsclin_Spi_disableModule() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_exchange() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_getStatus() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_initModule() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_initModuleConfig() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_isrError() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_isrReceive() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_isrTransmit() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_lock() : IfxAsclin_Spi.c
  • IfxAsclin_Spi_read() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_unlock() : IfxAsclin_Spi.c
  • IfxAsclin_Spi_write() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_write16() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_write32() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_write8() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_writeTxData() : IfxAsclin.h
  • IfxCcu6_clearAllInterruptStatusFlags() : IfxCcu6.h
  • IfxCcu6_clearCounter() : IfxCcu6.h
  • IfxCcu6_clearDeadTimeCounters() : IfxCcu6.h
  • IfxCcu6_clearInterruptStatusFlag() : IfxCcu6.h
  • IfxCcu6_clearT12OneNotification() : IfxCcu6.h
  • IfxCcu6_clearT12PeriodNotification() : IfxCcu6.h
  • IfxCcu6_clearT13CompareNotification() : IfxCcu6.h
  • IfxCcu6_connectTrigger() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_disableAdditionalPrescaler() : IfxCcu6.h
  • IfxCcu6_disableDeadTime() : IfxCcu6.h
  • IfxCcu6_disableDelayBypass() : IfxCcu6.h
  • IfxCcu6_disableInterrupt() : IfxCcu6.h
  • IfxCcu6_disableModulationOutput() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_disableModule() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_disableMultiChannelMode() : IfxCcu6.h
  • IfxCcu6_disableShadowTransfer() : IfxCcu6.h
  • IfxCcu6_disableSingleShotMode() : IfxCcu6.h
  • IfxCcu6_disableT13InvertedModulation() : IfxCcu6.h
  • IfxCcu6_disableTimer() : IfxCcu6.h
  • IfxCcu6_disableTrap() : IfxCcu6.h
  • IfxCcu6_disableTrapPin() : IfxCcu6.h
  • IfxCcu6_enableAdditionalPrescaler() : IfxCcu6.h
  • IfxCcu6_enableCountEvent() : IfxCcu6.h
  • IfxCcu6_enableDeadTime() : IfxCcu6.h
  • IfxCcu6_enableDelayBypass() : IfxCcu6.h
  • IfxCcu6_enableHallPatternShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableInterrupt() : IfxCcu6.h
  • IfxCcu6_enableModulationOutput() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_enableModule() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_enableMultiChannelMode() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelModeAvailability() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelPwmPatternShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableSingleShotMode() : IfxCcu6.h
  • IfxCcu6_enableT13InvertedModulation() : IfxCcu6.h
  • IfxCcu6_enableTimer() : IfxCcu6.h
  • IfxCcu6_enableTrap() : IfxCcu6.h
  • IfxCcu6_enableTrapPin() : IfxCcu6.h
  • IfxCcu6_getAddress() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getCaptureRegisterValue() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getCaptureShadowRegisterValue() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getDeadTimeStatus() : IfxCcu6.h
  • IfxCcu6_getHallPatternSampleState() : IfxCcu6.h
  • IfxCcu6_getIndex() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getInterruptStatusFlag() : IfxCcu6.h
  • IfxCcu6_getMultiChannelModeAvailabilityStatus() : IfxCcu6.h
  • IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus() : IfxCcu6.h
  • IfxCcu6_getShadowTransferStatus() : IfxCcu6.h
  • IfxCcu6_getSrcAddress() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getT12CaptureCompareState() : IfxCcu6.h
  • IfxCcu6_getT12CountDirection() : IfxCcu6.h
  • IfxCcu6_getT12TimerPointer() : IfxCcu6.h
  • IfxCcu6_getT13CaptureCompareState() : IfxCcu6.h
  • IfxCcu6_getTimerAvailabilityStatus() : IfxCcu6.h
  • IfxCcu6_getTimerRunStatus() : IfxCcu6.h
  • IfxCcu6_Icu_getTimeStamp() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_initChannel() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_initChannelConfig() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_initModule() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_initModuleConfig() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_startCapture() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_stopCapture() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_initCc60InPin() : IfxCcu6.h
  • IfxCcu6_initCc60InPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCc60OutPin() : IfxCcu6.h
  • IfxCcu6_initCc61InPin() : IfxCcu6.h
  • IfxCcu6_initCc61InPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCc61OutPin() : IfxCcu6.h
  • IfxCcu6_initCc62InPin() : IfxCcu6.h
  • IfxCcu6_initCc62InPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCc62OutPin() : IfxCcu6.h
  • IfxCcu6_initCcpos0Pin() : IfxCcu6.h
  • IfxCcu6_initCcpos0PinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCcpos1Pin() : IfxCcu6.h
  • IfxCcu6_initCcpos1PinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCcpos2Pin() : IfxCcu6.h
  • IfxCcu6_initCcpos2PinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCout60Pin() : IfxCcu6.h
  • IfxCcu6_initCout61Pin() : IfxCcu6.h
  • IfxCcu6_initCout62Pin() : IfxCcu6.h
  • IfxCcu6_initCout63Pin() : IfxCcu6.h
  • IfxCcu6_initCtrapPin() : IfxCcu6.h
  • IfxCcu6_initCtrapPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initT12hrPin() : IfxCcu6.h
  • IfxCcu6_initT12hrPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initT13hrPin() : IfxCcu6.h
  • IfxCcu6_initT13hrPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_isModuleEnabled() : IfxCcu6.h
  • IfxCcu6_isModuleSuspended() : IfxCcu6.h
  • IfxCcu6_isT12OneNotification() : IfxCcu6.h
  • IfxCcu6_isT12PeriodNotification() : IfxCcu6.h
  • IfxCcu6_isT13CompareNotification() : IfxCcu6.h
  • IfxCcu6_PwmBc_getMotorSpeed() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_initModule() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_initModuleConfig() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_start() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_stop() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_updateHallPattern() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmHl_disable() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_enable() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_getDeadtime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_getMinPulse() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_getMode() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_init() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_initConfig() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_invertActiveState() : IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setDeadtime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setMinPulse() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setMode() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setOnTime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setOutputPins() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_setupChannels() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_stdIfPwmHlInit() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_updateCenterAligned() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_updateEdgeAligned() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_updateOff() : IfxCcu6_PwmHl.c
  • IfxCcu6_readTimer() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_resetModule() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_routeInterruptNode() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setCaptureCompareInputSignal() : IfxCcu6.h
  • IfxCcu6_setCountingInputMode() : IfxCcu6.h
  • IfxCcu6_setCurrentHallPattern() : IfxCcu6.h
  • IfxCcu6_setDeadTimeValue() : IfxCcu6.h
  • IfxCcu6_setExpectedHallPattern() : IfxCcu6.h
  • IfxCcu6_setExternalRunMode() : IfxCcu6.h
  • IfxCcu6_setHallSensorTriggerMode() : IfxCcu6.h
  • IfxCcu6_setInputClockFrequency() : IfxCcu6.h
  • IfxCcu6_setInterruptStatusFlag() : IfxCcu6.h
  • IfxCcu6_setMultiChannelPwmPattern() : IfxCcu6.h
  • IfxCcu6_setMultiChannelSwitchingMode() : IfxCcu6.h
  • IfxCcu6_setMultiChannelSwitchingSync() : IfxCcu6.h
  • IfxCcu6_setOutputPassiveLevel() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setOutputPassiveState() : IfxCcu6.h
  • IfxCcu6_setSingleShotModeEnable() : IfxCcu6.h
  • IfxCcu6_setSleepMode() : IfxCcu6.h
  • IfxCcu6_setSuspendMode() : IfxCcu6.h
  • IfxCcu6_setT12CaptureCompareState() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT12ChannelMode() : IfxCcu6.h
  • IfxCcu6_setT12CompareValue() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT12CounterValue() : IfxCcu6.h
  • IfxCcu6_setT12CountMode() : IfxCcu6.h
  • IfxCcu6_setT12Frequency() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT12InputSignal() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT12PeriodValue() : IfxCcu6.h
  • IfxCcu6_setT13CaptureCompareState() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT13CompareValue() : IfxCcu6.h
  • IfxCcu6_setT13CounterValue() : IfxCcu6.h
  • IfxCcu6_setT13Frequency() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT13InputSignal() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT13PeriodValue() : IfxCcu6.h
  • IfxCcu6_setT13TriggerEventDirection() : IfxCcu6.h
  • IfxCcu6_setT13TriggerEventMode() : IfxCcu6.h
  • IfxCcu6_setTrapMode() : IfxCcu6.h
  • IfxCcu6_setTrapState() : IfxCcu6.h
  • IfxCcu6_startTimer() : IfxCcu6.h
  • IfxCcu6_stopTimer() : IfxCcu6.h
  • IfxCcu6_Timer_countOneStep() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_initModule() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_initModuleConfig() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_start() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_startSingleShotMode() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_stop() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_synchronousStart() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_synchronousStop() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_applyUpdate() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_disableUpdate() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getInputFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getPeriod() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getPointer() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getResolution() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_init() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_initConfig() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_run() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_setFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_setPeriod() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_setSingleMode() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_setTrigger() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_stdIfTimerInit() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_stop() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_updateInputFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TPwm_initModule() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_initModuleConfig() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_pause() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_resume() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_start() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_stop() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_updateHallPattern() : IfxCcu6.h
  • IfxCif_Cam_calcMem() : IfxCif_Cam.c
  • IfxCif_Cam_clearAllFlags() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_clearFrameReceptionFlag() : IfxCif_Cam.h
  • IfxCif_Cam_clearJpegEncodingCompleteFlag() : IfxCif_Cam.h
  • IfxCif_Cam_disableJpegEncoder() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_enableJpegEncoder() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_getBbbAddress() : IfxCif_Cam.h
  • IfxCif_Cam_getExtraFrameSize() : IfxCif_Cam.h
  • IfxCif_Cam_getExtraPathMemInfo() : IfxCif_Cam.h
  • IfxCif_Cam_getExtraPathPictureInfo() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_getFrameSize() : IfxCif_Cam.h
  • IfxCif_Cam_getJpegEncodedSize() : IfxCif_Cam.h
  • IfxCif_Cam_getLastExtraAddress() : IfxCif_Cam.h
  • IfxCif_Cam_getLastExtraCaptureInfo() : IfxCif_Cam.h
  • IfxCif_Cam_getLastFrameAddress() : IfxCif_Cam.h
  • IfxCif_Cam_getLastFrameCaptureInfo() : IfxCif_Cam.h
  • IfxCif_Cam_getLastJpegEncodingInfo() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_getNextFrameAddress() : IfxCif_Cam.h
  • IfxCif_Cam_getNextJpegFrameAddress() : IfxCif_Cam.h
  • IfxCif_Cam_incrementAddress() : IfxCif_Cam.h
  • IfxCif_Cam_init() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_initCamera() : IfxCif_Cam.c
  • IfxCif_Cam_initCif() : IfxCif_Cam.c
  • IfxCif_Cam_initCifDownscaler() : IfxCif_Cam.c
  • IfxCif_Cam_initCifExtraPath() : IfxCif_Cam.c
  • IfxCif_Cam_initCifIspUnit() : IfxCif_Cam.c
  • IfxCif_Cam_initCifJpegEncoder() : IfxCif_Cam.c
  • IfxCif_Cam_initCifMemInterface() : IfxCif_Cam.c
  • IfxCif_Cam_initEmem() : IfxCif_Cam.c
  • IfxCif_Cam_initMemSize() : IfxCif_Cam.c
  • IfxCif_Cam_initPictInfo() : IfxCif_Cam.c
  • IfxCif_Cam_initPortPins() : IfxCif_Cam.c
  • IfxCif_Cam_isEmulationExtensionAvailable() : IfxCif_Cam.c
  • IfxCif_Cam_isFrameReceptionComplete() : IfxCif_Cam.h
  • IfxCif_Cam_isJpegEncodingComplete() : IfxCif_Cam.h
  • IfxCif_Cam_restartCapture() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_skipPicture() : IfxCif_Cam.h
  • IfxCif_Cam_startCapture() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_stopCapture() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_yuvMemSize() : IfxCif_Cam.c
  • IfxCif_clearEpError() : IfxCif.c , IfxCif.h
  • IfxCif_clearEpInterrupt() : IfxCif.c , IfxCif.h
  • IfxCif_clearIspError() : IfxCif.c , IfxCif.h
  • IfxCif_clearIspInterrupt() : IfxCif.c , IfxCif.h
  • IfxCif_clearJpeInterrupt() : IfxCif.c , IfxCif.h
  • IfxCif_clearKernelResetState() : IfxCif.h
  • IfxCif_clearMiInterrupt() : IfxCif.c , IfxCif.h
  • IfxCif_clearMiStatus() : IfxCif.c , IfxCif.h
  • IfxCif_clearSecurityWatchdogInterrupt() : IfxCif.c , IfxCif.h
  • IfxCif_dpResetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_epForceConfigurationUpdate() : IfxCif.c , IfxCif.h
  • IfxCif_epSkipPicture() : IfxCif.c , IfxCif.h
  • IfxCif_generateIspFrameSynchronousConfigUpdateSignal() : IfxCif.h
  • IfxCif_generateIspImmediateConfigUpdateSignal() : IfxCif.h
  • IfxCif_generateMiImmediateConfigUpdateSignal() : IfxCif.h
  • IfxCif_getBaseAddressInitializationEnableState() : IfxCif.h
  • IfxCif_getCifModuleId() : IfxCif.h
  • IfxCif_getCifModulePortInputSelection() : IfxCif.h
  • IfxCif_getCifModuleRevision() : IfxCif.h
  • IfxCif_getCifModuleType() : IfxCif.h
  • IfxCif_getClockControlLogicState() : IfxCif.h
  • IfxCif_getCurrentIspFrameCount() : IfxCif.h
  • IfxCif_getCurrentIspInformFieldInformation() : IfxCif.h
  • IfxCif_getCurrentIspInputFormatterState() : IfxCif.h
  • IfxCif_getCurrentIspPictureOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getCurrentIspPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getDataPathSelectorForMainPath() : IfxCif.h
  • IfxCif_getDpControlEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getDpCounter() : IfxCif.c , IfxCif.h
  • IfxCif_getDpEnableState() : IfxCif.h
  • IfxCif_getDpSourcePath() : IfxCif.h
  • IfxCif_getDpUserDefinedSymbol() : IfxCif.c , IfxCif.h
  • IfxCif_getEpBaseAddress() : IfxCif.c , IfxCif.h
  • IfxCif_getEpBaseInitAddress() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingCameraDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingCurrentPictureOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingCurrentPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingMaximumDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingOffsetOutputWindow() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingRecenterState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpErrorState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpFeatureEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInitialFillLevelInterruptOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInitialOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInitSize() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInputEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInterruptOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getEpOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_getEpOffsetCounterStart() : IfxCif.c , IfxCif.h
  • IfxCif_getEpOutputEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpRecenterValue() : IfxCif.c , IfxCif.h
  • IfxCif_getEpSize() : IfxCif.c , IfxCif.h
  • IfxCif_getEpWriteFormat() : IfxCif.c , IfxCif.h
  • IfxCif_getHuffmanAcTableLength() : IfxCif.c , IfxCif.h
  • IfxCif_getHuffmanAcTableSelectorState() : IfxCif.c , IfxCif.h
  • IfxCif_getHuffmanDcTableLength() : IfxCif.c , IfxCif.h
  • IfxCif_getHuffmanDcTableSelectorState() : IfxCif.c , IfxCif.h
  • IfxCif_getInputInterface() : IfxCif.h
  • IfxCif_getInternalClockMode() : IfxCif.c , IfxCif.h
  • IfxCif_getIspAcquisitionOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getIspAcquisitionSize() : IfxCif.c , IfxCif.h
  • IfxCif_getIspCcirSequence() : IfxCif.h
  • IfxCif_getIspColorSpaceMatrixCrominanceClippingRange() : IfxCif.h
  • IfxCif_getIspColorSpaceMatrixLuminanceClippingRange() : IfxCif.h
  • IfxCif_getIspErrorState() : IfxCif.c , IfxCif.h
  • IfxCif_getIspFieldInvertState() : IfxCif.h
  • IfxCif_getIspFieldSelection() : IfxCif.h
  • IfxCif_getIspHSyncPolarity() : IfxCif.h
  • IfxCif_getIspInputFormatterState() : IfxCif.h
  • IfxCif_getIspInputInterface() : IfxCif.h
  • IfxCif_getIspInputPortSDataState() : IfxCif.h
  • IfxCif_getIspInputPortSHSyncState() : IfxCif.h
  • IfxCif_getIspInputPortSVSyncState() : IfxCif.h
  • IfxCif_getIspInputSelectionAppendState() : IfxCif.c , IfxCif.h
  • IfxCif_getIspInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisCameraDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisCurrentPictureOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisCurrentPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisEnableState() : IfxCif.h
  • IfxCif_getIspisMaximumDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisOffsetOutputWindow() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisRecenterEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisRecenterValue() : IfxCif.h
  • IfxCif_getIspMode() : IfxCif.h
  • IfxCif_getIspOutputState() : IfxCif.h
  • IfxCif_getIspOutputWindowOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getIspPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getIspSamplingEdge() : IfxCif.h
  • IfxCif_getIspState() : IfxCif.h
  • IfxCif_getIspVSyncPolarity() : IfxCif.h
  • IfxCif_getJpeDebugSignalState() : IfxCif.c , IfxCif.h
  • IfxCif_getJpegCodecImageSize() : IfxCif.c , IfxCif.h
  • IfxCif_getJpegJfifStreamEncoderContinuousMode() : IfxCif.h
  • IfxCif_getJpegPictureEncodingFormat() : IfxCif.h
  • IfxCif_getJpeHeaderGenerationMode() : IfxCif.h
  • IfxCif_getJpeHeaderMode() : IfxCif.h
  • IfxCif_getJpeInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getJpeMode() : IfxCif.h
  • IfxCif_getJpeQTableSelector() : IfxCif.c , IfxCif.h
  • IfxCif_getJpeRestartInterval() : IfxCif.h
  • IfxCif_getJpeScalingEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getJpeState() : IfxCif.h
  • IfxCif_getJpeTableId() : IfxCif.h
  • IfxCif_getKernelResetRequestState() : IfxCif.c , IfxCif.h
  • IfxCif_getKernelResetStatus() : IfxCif.h
  • IfxCif_getLinearDownscalerEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getLinearDownscalerScalingFactor() : IfxCif.c , IfxCif.h
  • IfxCif_getLinearDownscalerScalingMode() : IfxCif.c , IfxCif.h
  • IfxCif_getMainPictureComponentBaseInitAddress() : IfxCif.c , IfxCif.h
  • IfxCif_getMaskedEpInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getMaskedIspInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getMaskedJpeInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getMaskedMiInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getMiByteCount() : IfxCif.h
  • IfxCif_getMiByteSwapEnableState() : IfxCif.h
  • IfxCif_getMiChrominanceBurstLength() : IfxCif.h
  • IfxCif_getMiDataPathInputEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getMiDataPathOutputEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getMiFeatureEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getMiInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getMiLuminanceBurstLength() : IfxCif.h
  • IfxCif_getMiMainPictureComponentBaseAddress() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureComponentInitialOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureComponentInitSize() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureComponentOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureComponentOffsetCounterStart() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureComponentSize() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureWriteFormat() : IfxCif.h
  • IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset() : IfxCif.h
  • IfxCif_getMiMainPictureYInterruptOffset() : IfxCif.h
  • IfxCif_getMiOffsetCounterInitializationEnableState() : IfxCif.h
  • IfxCif_getMiStatusInformation() : IfxCif.c , IfxCif.h
  • IfxCif_getModuleNumber() : IfxCif.h
  • IfxCif_getModuleRevisionNumber() : IfxCif.h
  • IfxCif_getModuleState() : IfxCif.h
  • IfxCif_getModuleType() : IfxCif.h
  • IfxCif_getNumberOfAcquisitionFrames() : IfxCif.h
  • IfxCif_getRawEpInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getRawIspInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getRawJpeInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getRawMiInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getRawSecurityWatchdogInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getSecurityWatchdogCounterPredivider() : IfxCif.h
  • IfxCif_getSecurityWatchdogEnableState() : IfxCif.h
  • IfxCif_getSecurityWatchdogInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getSecurityWatchdogTimeout() : IfxCif.c , IfxCif.h
  • IfxCif_getSoftwareResetMode() : IfxCif.c , IfxCif.h
  • IfxCif_getYCSplitterChannelMode() : IfxCif.h
  • IfxCif_initJpegEncoder() : IfxCif.h
  • IfxCif_jpeGenerateHeader() : IfxCif.h
  • IfxCif_miSkipPicture() : IfxCif.h
  • IfxCif_programJpeTable() : IfxCif.c , IfxCif.h
  • IfxCif_resetModule() : IfxCif.c , IfxCif.h
  • IfxCif_resetSecurityWatchdogCounter() : IfxCif.c , IfxCif.h
  • IfxCif_setClockControlLogicState() : IfxCif.h
  • IfxCif_setDataPathSelectorForMainPath() : IfxCif.h
  • IfxCif_setDpControlEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setDpCounter() : IfxCif.c , IfxCif.h
  • IfxCif_setDpEnableState() : IfxCif.h
  • IfxCif_setDpSourcePath() : IfxCif.h
  • IfxCif_setDpUserDefinedSymbol() : IfxCif.c , IfxCif.h
  • IfxCif_setEpBaseInitAddress() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingCameraDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingMaximumDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingOffsetOutputWindow() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingOffsetsOutputWindow() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingPictureSizes() : IfxCif.c , IfxCif.h
  • IfxCif_setEpFeatureEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setEpInitialFillLevelInterruptOffset() : IfxCif.c , IfxCif.h
  • IfxCif_setEpInitialOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_setEpInitSize() : IfxCif.c , IfxCif.h
  • IfxCif_setEpInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setEpInterruptRequestBit() : IfxCif.c , IfxCif.h
  • IfxCif_setEpOffsetCounterStart() : IfxCif.c , IfxCif.h
  • IfxCif_setEpRecenterValue() : IfxCif.c , IfxCif.h
  • IfxCif_setEpWriteFormat() : IfxCif.c , IfxCif.h
  • IfxCif_setHuffmanAcTableLength() : IfxCif.c , IfxCif.h
  • IfxCif_setHuffmanAcTableSelector() : IfxCif.c , IfxCif.h
  • IfxCif_setHuffmanDcTableLength() : IfxCif.c , IfxCif.h
  • IfxCif_setHuffmanDcTableSelector() : IfxCif.c , IfxCif.h
  • IfxCif_setInputInterface() : IfxCif.h
  • IfxCif_setInternalClockMode() : IfxCif.c , IfxCif.h
  • IfxCif_setIspAcquisitionOffset() : IfxCif.c , IfxCif.h
  • IfxCif_setIspAcquisitionOffsets() : IfxCif.h
  • IfxCif_setIspAcquisitionSize() : IfxCif.c , IfxCif.h
  • IfxCif_setIspAcquisitionSizes() : IfxCif.h
  • IfxCif_setIspCcirSequence() : IfxCif.h
  • IfxCif_setIspColorSpaceMatrixCrominanceClippingRange() : IfxCif.h
  • IfxCif_setIspColorSpaceMatrixLuminanceClippingRange() : IfxCif.h
  • IfxCif_setIspFieldInvertState() : IfxCif.h
  • IfxCif_setIspFieldSelection() : IfxCif.h
  • IfxCif_setIspHSyncPolarity() : IfxCif.h
  • IfxCif_setIspInputFormatterState() : IfxCif.h
  • IfxCif_setIspInputInterface() : IfxCif.h
  • IfxCif_setIspInputSelectionAppendState() : IfxCif.c , IfxCif.h
  • IfxCif_setIspInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setIspInterruptRequestBit() : IfxCif.c , IfxCif.h
  • IfxCif_setIspisCameraDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_setIspisEnableState() : IfxCif.h
  • IfxCif_setIspisMaximumDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_setIspisOutputWindowOffset() : IfxCif.c , IfxCif.h
  • IfxCif_setIspisOutputWindowOffsets() : IfxCif.h
  • IfxCif_setIspisPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_setIspisPictureSizes() : IfxCif.h
  • IfxCif_setIspisRecenterValue() : IfxCif.h
  • IfxCif_setIspMode() : IfxCif.h
  • IfxCif_setIspOutputState() : IfxCif.h
  • IfxCif_setIspOutputWindowOffset() : IfxCif.c , IfxCif.h
  • IfxCif_setIspOutputWindowOffsets() : IfxCif.h
  • IfxCif_setIspPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_setIspPictureSizes() : IfxCif.h
  • IfxCif_setIspSamplingEdge() : IfxCif.h
  • IfxCif_setIspVSyncPolarity() : IfxCif.h
  • IfxCif_setJpegCodecImageSize() : IfxCif.c , IfxCif.h
  • IfxCif_setJpegCodecImageSizes() : IfxCif.h
  • IfxCif_setJpegJfifStreamEncoderContinuousMode() : IfxCif.h
  • IfxCif_setJpegPictureEncodingFormat() : IfxCif.h
  • IfxCif_setJpeHeaderGenerationMode() : IfxCif.h
  • IfxCif_setJpeHeaderMode() : IfxCif.h
  • IfxCif_setJpeInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setJpeInterruptRequestBit() : IfxCif.c , IfxCif.h
  • IfxCif_setJpeQTableSelector() : IfxCif.c , IfxCif.h
  • IfxCif_setJpeRestartInterval() : IfxCif.h
  • IfxCif_setJpeScalingEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setJpeTableDataLsb() : IfxCif.h
  • IfxCif_setJpeTableDataMsb() : IfxCif.h
  • IfxCif_setJpeTableId() : IfxCif.h
  • IfxCif_setKernelResetRequestState() : IfxCif.h
  • IfxCif_setLinearDownscalerEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setLinearDownscalerScalingFactor() : IfxCif.c , IfxCif.h
  • IfxCif_setLinearDownscalerScalingFactors() : IfxCif.c , IfxCif.h
  • IfxCif_setLinearDownscalerScalingMode() : IfxCif.c , IfxCif.h
  • IfxCif_setLinearDownscalerScalingModes() : IfxCif.c , IfxCif.h
  • IfxCif_setMiBaseAddressInitializationEnableState() : IfxCif.h
  • IfxCif_setMiByteSwapEnableState() : IfxCif.h
  • IfxCif_setMiChrominanceBurstLength() : IfxCif.h
  • IfxCif_setMiFeatureEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setMiInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setMiInterruptRequestBit() : IfxCif.c , IfxCif.h
  • IfxCif_setMiLuminanceBurstLength() : IfxCif.c , IfxCif.h
  • IfxCif_setMiMainPictureComponentBaseInitAddress() : IfxCif.c , IfxCif.h
  • IfxCif_setMiMainPictureComponentInitialOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_setMiMainPictureComponentInitSize() : IfxCif.c , IfxCif.h
  • IfxCif_setMiMainPictureWriteFormat() : IfxCif.h
  • IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset() : IfxCif.h
  • IfxCif_setMiOffsetCounterInitializationEnableState() : IfxCif.h
  • IfxCif_setModuleStateRequest() : IfxCif.c , IfxCif.h
  • IfxCif_setNumberOfAcquisitionFrames() : IfxCif.h
  • IfxCif_setSecurityWatchdogCounterPredivider() : IfxCif.h
  • IfxCif_setSecurityWatchdogEnableState() : IfxCif.h
  • IfxCif_setSecurityWatchdogInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setSecurityWatchdogInterruptRequestBit() : IfxCif.c , IfxCif.h
  • IfxCif_setSecurityWatchdogTimeout() : IfxCif.c , IfxCif.h
  • IfxCif_setSoftwareResetMode() : IfxCif.c , IfxCif.h
  • IfxCif_setYCSplitterChannelMode() : IfxCif.h
  • IfxCif_startJpegJfifStreamEncoder() : IfxCif.h
  • IfxCpu_acquireMutex() : IfxCpu.c , IfxCpu.h
  • IfxCpu_areInterruptsEnabled() : IfxCpu.h
  • IfxCpu_calculateCrc32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • IfxCpu_disableInterrupts() : IfxCpu.h
  • IfxCpu_emitEvent() : IfxCpu.c , IfxCpu.h
  • IfxCpu_enableInterrupts() : IfxCpu.h
  • IfxCpu_enableSegmentSpecificDataAccessCacheability() : IfxCpu.h
  • IfxCpu_enableSegmentSpecificInstructionAccessCacheability() : IfxCpu.h
  • IfxCpu_forceDisableInterrupts() : IfxCpu.h
  • IfxCpu_getAddress() : IfxCpu.h
  • IfxCpu_getClockCounter() : IfxCpu.h
  • IfxCpu_getClockCounterStickyOverflow() : IfxCpu.h
  • IfxCpu_getCoreId() : IfxCpu.h
  • IfxCpu_getCoreIndex() : IfxCpu.h
  • IfxCpu_getCoreMode() : IfxCpu.c , IfxCpu.h
  • IfxCpu_getIndex() : IfxCpu.c , IfxCpu.h
  • IfxCpu_getInstructionCounter() : IfxCpu.h
  • IfxCpu_getInstructionCounterStickyOverflow() : IfxCpu.h
  • IfxCpu_getPerformanceCounter() : IfxCpu.h
  • IfxCpu_getPerformanceCounterStickyOverflow() : IfxCpu.h
  • IfxCpu_getRandomVal() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • IfxCpu_getRandomValue() : IfxCpu.c , IfxCpu.h
  • IfxCpu_getRandomValueWithinRange() : IfxCpu.c , IfxCpu.h
  • IfxCpu_initCSA() : IfxCpu.h
  • IfxCpu_invalidateProgramCache() : IfxCpu.h
  • IfxCpu_Irq_getTos() : IfxCpu_Irq.h
  • IfxCpu_isAddressCachable() : IfxCpu.h
  • IfxCpu_releaseMutex() : IfxCpu.c , IfxCpu.h
  • IfxCpu_resetAndStartCounters() : IfxCpu.h
  • IfxCpu_resetSpinLock() : IfxCpu.c , IfxCpu.h
  • IfxCpu_restoreInterrupts() : IfxCpu.h
  • IfxCpu_setCoreMode() : IfxCpu.c , IfxCpu.h
  • IfxCpu_setDataCache() : IfxCpu.h
  • IfxCpu_setPerformanceCountersEnableBit() : IfxCpu.h
  • IfxCpu_setProgramCache() : IfxCpu.h
  • IfxCpu_setProgramCounter() : IfxCpu.c , IfxCpu.h
  • IfxCpu_setSafetyTaskIdentifier() : IfxCpu.h
  • IfxCpu_setSpinLock() : IfxCpu.c , IfxCpu.h
  • IfxCpu_startCore() : IfxCpu.c , IfxCpu.h
  • IfxCpu_stopCounters() : IfxCpu.h
  • IfxCpu_Trap_assertion() : IfxCpu_Trap.c
  • IfxCpu_Trap_busError() : IfxCpu_Trap.c
  • IfxCpu_Trap_contextManagementError() : IfxCpu_Trap.c
  • IfxCpu_Trap_extractTrapInfo() : IfxCpu_Trap.c
  • IfxCpu_Trap_instructionError() : IfxCpu_Trap.c
  • IfxCpu_Trap_internalProtectionError() : IfxCpu_Trap.c
  • IfxCpu_Trap_memoryManagementError() : IfxCpu_Trap.c
  • IfxCpu_Trap_nonMaskableInterrupt() : IfxCpu_Trap.c
  • IfxCpu_Trap_systemCall_Cpu0() : IfxCpu_Trap.c
  • IfxCpu_Trap_vectorTable0() : IfxCpu_Trap.c
  • IfxCpu_triggerSwReset() : IfxCpu.h
  • IfxCpu_updateClockCounter() : IfxCpu.h
  • IfxCpu_updateInstructionCounter() : IfxCpu.h
  • IfxCpu_updatePerformanceCounter() : IfxCpu.h
  • IfxCpu_waitEvent() : IfxCpu.c , IfxCpu.h
  • IfxDma_clearChannelHalt() : IfxDma.h
  • IfxDma_clearChannelInterrupt() : IfxDma.h
  • IfxDma_clearChannelTransactionRequestLost() : IfxDma.h
  • IfxDma_clearErrorFlags() : IfxDma.h
  • IfxDma_disableChannelInterrupt() : IfxDma.h
  • IfxDma_disableChannelTransaction() : IfxDma.h
  • IfxDma_disableChannelTransactionLostError() : IfxDma.h
  • IfxDma_disableMoveEngineDestinationError() : IfxDma.h
  • IfxDma_disableMoveEngineSourceError() : IfxDma.h
  • IfxDma_Dma_clearChannelInterrupt() : IfxDma_Dma.h
  • IfxDma_Dma_configureTransactionSet() : IfxDma_Dma.c
  • IfxDma_Dma_createModuleHandle() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_deInitChannel() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_getAndClearChannelInterrupt() : IfxDma_Dma.h
  • IfxDma_Dma_getChannelInterrupt() : IfxDma_Dma.h
  • IfxDma_Dma_getSrcPointer() : IfxDma_Dma.h
  • IfxDma_Dma_initChannel() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_initChannelConfig() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_initLinkedListEntry() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_initModule() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_initModuleConfig() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_isChannelTransactionPending() : IfxDma_Dma.h
  • IfxDma_Dma_setChannelDestinationAddress() : IfxDma_Dma.h
  • IfxDma_Dma_setChannelSourceAddress() : IfxDma_Dma.h
  • IfxDma_Dma_setChannelTransferCount() : IfxDma_Dma.h
  • IfxDma_Dma_startChannelTransaction() : IfxDma_Dma.h
  • IfxDma_enableChannelInterrupt() : IfxDma.h
  • IfxDma_enableChannelTransaction() : IfxDma.h
  • IfxDma_enableChannelTransactionLostError() : IfxDma.h
  • IfxDma_enableDestinationCircularBuffer() : IfxDma.h
  • IfxDma_enableMoveEngineDestinationError() : IfxDma.h
  • IfxDma_enableMoveEngineSourceError() : IfxDma.h
  • IfxDma_enableSourceCircularBuffer() : IfxDma.h
  • IfxDma_getAndClearChannelInterrupt() : IfxDma.h
  • IfxDma_getAndClearChannelPatternDetectionInterrupt() : IfxDma.h
  • IfxDma_getAndClearChannelWrapDestinationBufferInterrupt() : IfxDma.h
  • IfxDma_getAndClearChannelWrapSourceBufferInterrupt() : IfxDma.h
  • IfxDma_getChannelDestinationAddress() : IfxDma.h
  • IfxDma_getChannelHalt() : IfxDma.h
  • IfxDma_getChannelInterrupt() : IfxDma.h
  • IfxDma_getChannelPatternDetectionOldValue() : IfxDma.h
  • IfxDma_getChannelSourceAddress() : IfxDma.h
  • IfxDma_getChannelSuspendModeStatus() : IfxDma.h
  • IfxDma_getChannelTransactionRequestLost() : IfxDma.h
  • IfxDma_getChannelTransferCount() : IfxDma.h
  • IfxDma_getCircularRangeCode() : IfxDma.h
  • IfxDma_getDataCRC() : IfxDma.h
  • IfxDma_getDoubleBufferRead() : IfxDma.h
  • IfxDma_getDoubleBufferSelection() : IfxDma.h
  • IfxDma_getErrorFlags() : IfxDma.h
  • IfxDma_getErrPointer() : IfxDma.h
  • IfxDma_getSourceAndDestinationCRC() : IfxDma.h
  • IfxDma_getSrcPointer() : IfxDma.h
  • IfxDma_getTimestamp() : IfxDma.h
  • IfxDma_isChannelReset() : IfxDma.h
  • IfxDma_isChannelTransactionEnabled() : IfxDma.h
  • IfxDma_isChannelTransactionPending() : IfxDma.h
  • IfxDma_keepDoubleBufferActive() : IfxDma.h
  • IfxDma_resetChannel() : IfxDma.h
  • IfxDma_setChannelBlockMode() : IfxDma.h
  • IfxDma_setChannelContinuousMode() : IfxDma.h
  • IfxDma_setChannelDestinationAddress() : IfxDma.h
  • IfxDma_setChannelDestinationIncrementStep() : IfxDma.h
  • IfxDma_setChannelHalt() : IfxDma.h
  • IfxDma_setChannelHardwareResourcePartition() : IfxDma.h
  • IfxDma_setChannelInterruptServiceRequest() : IfxDma.h
  • IfxDma_setChannelMoveSize() : IfxDma.h
  • IfxDma_setChannelShadow() : IfxDma.h
  • IfxDma_setChannelSingleMode() : IfxDma.h
  • IfxDma_setChannelSingleTransaction() : IfxDma.h
  • IfxDma_setChannelSingleTransfer() : IfxDma.h
  • IfxDma_setChannelSourceAddress() : IfxDma.h
  • IfxDma_setChannelSourceIncrementStep() : IfxDma.h
  • IfxDma_setChannelSuspendEnable() : IfxDma.h
  • IfxDma_setChannelTransferCount() : IfxDma.h
  • IfxDma_setCircularBufferDestinationLength() : IfxDma.h
  • IfxDma_setCircularBufferSourceLength() : IfxDma.h
  • IfxDma_setInterruptControlValue() : IfxDma.h
  • IfxDma_setSleepMode() : IfxDma.h
  • IfxDma_startChannelTransaction() : IfxDma.h
  • IfxDma_switchDoubleBuffer() : IfxDma.h
  • IfxDma_writeChannelShadowDisable() : IfxDma.h
  • IfxDma_writeChannelShadowEnable() : IfxDma.h
  • IfxDsadc_Dsadc_calcDIVx() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_getAuxResult() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_getAuxSrc() : IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_getMainResult() : IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_getMainSrc() : IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initAuxFilter() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initCarrierGen() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initCarrierGenConfig() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initChannel() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initChannelConfig() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initCombFilter() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initDemodulator() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initFirFilter() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initIntegrator() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initModulator() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initModule() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initModuleConfig() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initRectifier() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_startScan() : IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_stopScan() : IfxDsadc_Dsadc.h
  • IfxDsadc_getAuxResult() : IfxDsadc.h
  • IfxDsadc_getAuxSrc() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getIntegratorOutFreq() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getMainCombDecimation() : IfxDsadc.h
  • IfxDsadc_getMainCombOutFreq() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getMainGroupDelay() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getMainResult() : IfxDsadc.h
  • IfxDsadc_getMainSrc() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getModulatorClockFreq() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getModulatorInputClockFreq() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_initCgPwmPin() : IfxDsadc.h
  • IfxDsadc_initCinPin() : IfxDsadc.h
  • IfxDsadc_initCoutPin() : IfxDsadc.h
  • IfxDsadc_initDinPin() : IfxDsadc.h
  • IfxDsadc_initDsnPin() : IfxDsadc.h
  • IfxDsadc_initDspPin() : IfxDsadc.h
  • IfxDsadc_initItrPin() : IfxDsadc.h
  • IfxDsadc_initSgPin() : IfxDsadc.h
  • IfxDsadc_isModuleEnabled() : IfxDsadc.h
  • IfxDsadc_Rdc_calculateGroupDelay() : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_calculateTimestampPeriod() : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_getAbsolutePosition() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getDirection() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getFault() : IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getOffset() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getPeriodPerRotation() : IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getPosition() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getRawPosition() : IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getRefreshPeriod() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getResolution() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getSensorType() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getSpeed() : IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getTimestamp() : IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getTurn() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getUpdatePeriod() : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_init() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_initConfig() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_initGtmTim() : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_initHwChannels() : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_initHwTimestamp() : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_onEventA() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_reset() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_resetFaults() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_setOffset() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_setRefreshPeriod() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_startConversion() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_stdIfPosInit() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_update() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_updateTimestamp() : IfxDsadc_Rdc.c
  • IfxDsadc_resetModule() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_setCarrierMode() : IfxDsadc.h
  • IfxDsadc_setSleepMode() : IfxDsadc.h
  • IfxDsadc_startScan() : IfxDsadc.h
  • IfxDsadc_stopScan() : IfxDsadc.h
  • IfxDts_disableSensorControl() : IfxDts.h
  • IfxDts_Dts_convertFromCelsius() : IfxDts_Dts.c , IfxDts_Dts.h
  • IfxDts_Dts_convertToCelsius() : IfxDts_Dts.c , IfxDts_Dts.h
  • IfxDts_Dts_getTemperatureCelsius() : IfxDts_Dts.h
  • IfxDts_Dts_getTemperatureValue() : IfxDts_Dts.h
  • IfxDts_Dts_initModule() : IfxDts_Dts.c , IfxDts_Dts.h
  • IfxDts_Dts_initModuleConfig() : IfxDts_Dts.c , IfxDts_Dts.h
  • IfxDts_Dts_isBusy() : IfxDts_Dts.h
  • IfxDts_Dts_startSensor() : IfxDts_Dts.h
  • IfxDts_enableSensor() : IfxDts.h
  • IfxDts_getSrcPointer() : IfxDts.h
  • IfxDts_getTemperatureValue() : IfxDts.h
  • IfxDts_isBusy() : IfxDts.h
  • IfxDts_isReady() : IfxDts.c , IfxDts.h
  • IfxDts_startSensor() : IfxDts.h
  • IfxEmem_getLockedState() : IfxEmem.c , IfxEmem.h
  • IfxEmem_isModuleEnabled() : IfxEmem.h
  • IfxEmem_setClockEnableState() : IfxEmem.c , IfxEmem.h
  • IfxEmem_setTileConfigMode() : IfxEmem.h
  • IfxEmem_setUnlockStandbyLockFlag() : IfxEmem.h
  • IfxEray_calcHeaderCrc() : IfxEray.c , IfxEray.h
  • IfxEray_changePocState() : IfxEray.c , IfxEray.h
  • IfxEray_clearAllFlags() : IfxEray.c , IfxEray.h
  • IfxEray_clearErrorFlag() : IfxEray.h
  • IfxEray_clearStatusFlag() : IfxEray.h
  • IfxEray_disableModule() : IfxEray.h
  • IfxEray_enableInterruptLines() : IfxEray.c , IfxEray.h
  • IfxEray_enableModule() : IfxEray.h
  • IfxEray_Eray_allowColdStart() : IfxEray_Eray.h
  • IfxEray_Eray_bufferReconfig() : IfxEray_Eray.h
  • IfxEray_Eray_changePocState() : IfxEray_Eray.h
  • IfxEray_Eray_clearErrorFlag() : IfxEray_Eray.h
  • IfxEray_Eray_clearStatusFlag() : IfxEray_Eray.h
  • IfxEray_Eray_deInitModule() : IfxEray_Eray.h
  • IfxEray_Eray_getErrorInterrupts() : IfxEray_Eray.h
  • IfxEray_Eray_getMessageBufferInterruptStatus() : IfxEray_Eray.h
  • IfxEray_Eray_getNewDataInterruptStatus() : IfxEray_Eray.h
  • IfxEray_Eray_getPocState() : IfxEray_Eray.h
  • IfxEray_Eray_getStatusInterrupts() : IfxEray_Eray.h
  • IfxEray_Eray_getWakeupPatternReceivedChannel() : IfxEray_Eray.h
  • IfxEray_Eray_initModule() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_initModuleConfig() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_Node_init() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_Node_initCommunicationController() : IfxEray_Eray.c
  • IfxEray_Eray_Node_initConfig() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_Node_initGTU() : IfxEray_Eray.c
  • IfxEray_Eray_Node_initMessageRAM() : IfxEray_Eray.c
  • IfxEray_Eray_readData() : IfxEray_Eray.h
  • IfxEray_Eray_readFrame() : IfxEray_Eray.h
  • IfxEray_Eray_receiveFifoFrame() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_receiveFrame() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_setMessageBufferInterruptDestination() : IfxEray_Eray.h
  • IfxEray_Eray_setNewDataInterruptDestination() : IfxEray_Eray.h
  • IfxEray_Eray_setPocAllSlots() : IfxEray_Eray.h
  • IfxEray_Eray_startCommunication() : IfxEray_Eray.h
  • IfxEray_Eray_transmitFrame() : IfxEray_Eray.h , IfxEray_Eray.c
  • IfxEray_Eray_wakeUpChannel() : IfxEray_Eray.h
  • IfxEray_Eray_wakeUpCluster() : IfxEray_Eray.h
  • IfxEray_Eray_writeData() : IfxEray_Eray.h
  • IfxEray_getAddress() : IfxEray.c , IfxEray.h
  • IfxEray_getErrorInterrupts() : IfxEray.h
  • IfxEray_getFifoIndex() : IfxEray.h
  • IfxEray_getFifoStatus() : IfxEray.h
  • IfxEray_getIndex() : IfxEray.c , IfxEray.h
  • IfxEray_getInputBufferBusyHostStatus() : IfxEray.h
  • IfxEray_getInputBufferBusyShadowStatus() : IfxEray.h
  • IfxEray_getInputBufferBusySrcPtr() : IfxEray.h
  • IfxEray_getInterruptLine0SrcPtr() : IfxEray.h
  • IfxEray_getInterruptLine1SrcPtr() : IfxEray.h
  • IfxEray_getMessageBufferInterruptStatus() : IfxEray.h
  • IfxEray_getMessageBufferStatus0SrcPtr() : IfxEray.h
  • IfxEray_getMessageBufferStatus1SrcPtr() : IfxEray.h
  • IfxEray_getNewDataInterrupt0SrcPtr() : IfxEray.h
  • IfxEray_getNewDataInterrupt1SrcPtr() : IfxEray.h
  • IfxEray_getNewDataInterruptStatus() : IfxEray.h
  • IfxEray_getOutputBuffer() : IfxEray.h
  • IfxEray_getOutputBufferBusyShadowStatus() : IfxEray.h
  • IfxEray_getOutputBufferBusySrcPtr() : IfxEray.h
  • IfxEray_getPocState() : IfxEray.h
  • IfxEray_getStatusInterrupts() : IfxEray.h
  • IfxEray_getTimerInterrupt0SrcPtr() : IfxEray.h
  • IfxEray_getTimerInterrupt1SrcPtr() : IfxEray.h
  • IfxEray_getWakeupPatternReceivedChannel() : IfxEray.h
  • IfxEray_initRxPin() : IfxEray.h
  • IfxEray_initRxPinWithPadLevel() : IfxEray.h
  • IfxEray_initTxEnPin() : IfxEray.h
  • IfxEray_initTxPin() : IfxEray.h
  • IfxEray_isModuleSuspended() : IfxEray.h
  • IfxEray_readData() : IfxEray.c , IfxEray.h
  • IfxEray_readFrame() : IfxEray.c , IfxEray.h
  • IfxEray_receiveData() : IfxEray.h
  • IfxEray_receiveHeader() : IfxEray.h
  • IfxEray_resetModule() : IfxEray.c , IfxEray.h
  • IfxEray_sendData() : IfxEray.h
  • IfxEray_sendHeader() : IfxEray.h
  • IfxEray_setActiveCyclePairs() : IfxEray.h
  • IfxEray_setAutoDelayBuffers() : IfxEray.h
  • IfxEray_setBaudrate() : IfxEray.h
  • IfxEray_setBufferReconfigSecure() : IfxEray.h
  • IfxEray_setChannelAInitialOffsets() : IfxEray.h
  • IfxEray_setChannelBInitialOffsets() : IfxEray.h
  • IfxEray_setChannelsReceiveDelay() : IfxEray.h
  • IfxEray_setClockCorrectionCycles() : IfxEray.h
  • IfxEray_setClockSynchErrorHalt() : IfxEray.h
  • IfxEray_setClusterDriftValues() : IfxEray.h
  • IfxEray_setClusterStartupDeviation() : IfxEray.h
  • IfxEray_setCollisionAvoidanceDuration() : IfxEray.h
  • IfxEray_setCycleDurationMacroticks() : IfxEray.h
  • IfxEray_setCycleDurationMicroticks() : IfxEray.h
  • IfxEray_setDecodingCorrectionValue() : IfxEray.h
  • IfxEray_setDynamicSlots() : IfxEray.h
  • IfxEray_setExternalCorrectionControl() : IfxEray.h
  • IfxEray_setExternalCorrectionValues() : IfxEray.h
  • IfxEray_setFifoBufferStartIndex() : IfxEray.h
  • IfxEray_setFifoFilterConfigurations() : IfxEray.h
  • IfxEray_setFifoMessageBufferConfigurations() : IfxEray.h
  • IfxEray_setFirstDynamicBuffer() : IfxEray.h
  • IfxEray_setListenTimeOuts() : IfxEray.h
  • IfxEray_setMaxColdStartAttempts() : IfxEray.h
  • IfxEray_setMaxCorrectionValues() : IfxEray.h
  • IfxEray_setMaxSynchFrames() : IfxEray.h
  • IfxEray_setMessageBufferCount() : IfxEray.h
  • IfxEray_setMessageBufferInterruptDestination() : IfxEray.c , IfxEray.h
  • IfxEray_setMessageHandlerConfigurations() : IfxEray.h
  • IfxEray_setNetworkStartIdleTime() : IfxEray.h
  • IfxEray_setNetworkVectorLength() : IfxEray.h
  • IfxEray_setNewDataInterruptDestination() : IfxEray.c , IfxEray.h
  • IfxEray_setNodeChannels() : IfxEray.h
  • IfxEray_setOffsetCorrection() : IfxEray.h
  • IfxEray_setPocReady() : IfxEray.c , IfxEray.h
  • IfxEray_setReceiveRequest() : IfxEray.h
  • IfxEray_setReceiveWakeupTimes() : IfxEray.h
  • IfxEray_setRxBufferNumber() : IfxEray.h
  • IfxEray_setSleepMode() : IfxEray.h
  • IfxEray_setSlot() : IfxEray.c , IfxEray.h
  • IfxEray_setSlotActionPoints() : IfxEray.h
  • IfxEray_setStaticSlots() : IfxEray.h
  • IfxEray_setStrobePosition() : IfxEray.h
  • IfxEray_setSuspendMode() : IfxEray.h
  • IfxEray_setSymbolChannels() : IfxEray.h
  • IfxEray_setTransmissionSlotMode() : IfxEray.h
  • IfxEray_setTransmissionStartTime() : IfxEray.h
  • IfxEray_setTransmitRequest() : IfxEray.h
  • IfxEray_setTransmittedFrames() : IfxEray.h
  • IfxEray_setTransmitWakeupTimes() : IfxEray.h
  • IfxEray_setTxBufferNumber() : IfxEray.h
  • IfxEray_setViewData() : IfxEray.h
  • IfxEray_setWakeupPatternChannel() : IfxEray.h
  • IfxEray_waitForPocState() : IfxEray.h
  • IfxEray_writeData() : IfxEray.c , IfxEray.h
  • IfxEth_applySoftwareReset() : IfxEth.h
  • IfxEth_clearEriInterrupt() : IfxEth.h
  • IfxEth_clearMacConfiguration() : IfxEth.h
  • IfxEth_clearRxInterrupt() : IfxEth.h
  • IfxEth_clearTuInterrupt() : IfxEth.h
  • IfxEth_clearTxInterrupt() : IfxEth.h
  • IfxEth_disableModule() : IfxEth.c , IfxEth.h
  • IfxEth_disableTimeStampCoarseUpdate() : IfxEth.h
  • IfxEth_disableTimeStampForIpv4Frames() : IfxEth.h
  • IfxEth_enableMmcCounter() : IfxEth.h
  • IfxEth_enableModule() : IfxEth.c , IfxEth.h
  • IfxEth_enableTimeStamp() : IfxEth.h
  • IfxEth_enableTimeStampCoarseUpdate() : IfxEth.h
  • IfxEth_enableTimeStampForAllFrames() : IfxEth.h
  • IfxEth_enableTimeStampForEthFrames() : IfxEth.h
  • IfxEth_enableTimeStampForIpv4Frames() : IfxEth.h
  • IfxEth_enableTimeStampForVer2Format() : IfxEth.h
  • IfxEth_freeReceiveBuffer() : IfxEth.c , IfxEth.h
  • IfxEth_getActualRxDescriptor() : IfxEth.h
  • IfxEth_getActualRxIndex() : IfxEth.h
  • IfxEth_getActualTxDescriptor() : IfxEth.h
  • IfxEth_getBaseRxDescriptor() : IfxEth.h
  • IfxEth_getBaseTxDescriptor() : IfxEth.h
  • IfxEth_getLoopbackMode() : IfxEth.h
  • IfxEth_getMacAddressPointer() : IfxEth.h
  • IfxEth_getReceiveBuffer() : IfxEth.c , IfxEth.h
  • IfxEth_getReceiveProcessState() : IfxEth.h
  • IfxEth_getRxDataLength() : IfxEth.h
  • IfxEth_getSrcPointer() : IfxEth.h
  • IfxEth_getTimeStampInitialiseStatus() : IfxEth.h
  • IfxEth_getTimeStampUpdateStatus() : IfxEth.h
  • IfxEth_getTransmitBuffer() : IfxEth.c , IfxEth.h
  • IfxEth_getTransmitProcessState() : IfxEth.h
  • IfxEth_init() : IfxEth.c , IfxEth.h
  • IfxEth_initConfig() : IfxEth.c , IfxEth.h
  • IfxEth_initialiseTimeStamp() : IfxEth.h
  • IfxEth_initReceiveDescriptors() : IfxEth.c , IfxEth.h
  • IfxEth_initReceiveDescriptorsRingMode() : IfxEth.c , IfxEth.h
  • IfxEth_initTransmitDescriptors() : IfxEth.c , IfxEth.h
  • IfxEth_initTransmitDescriptorsRingMode() : IfxEth.c , IfxEth.h
  • IfxEth_isEriInterrupt() : IfxEth.h
  • IfxEth_isLinkActive() : IfxEth.h
  • IfxEth_isNisInterrupt() : IfxEth.h
  • IfxEth_isRxChecksumError() : IfxEth.h
  • IfxEth_isRxDataAvailable() : IfxEth.h
  • IfxEth_isRxInterrupt() : IfxEth.h
  • IfxEth_isSoftwareResetDone() : IfxEth.h
  • IfxEth_isTuInterrupt() : IfxEth.h
  • IfxEth_isTxInterrupt() : IfxEth.h
  • IfxEth_Phy_Pef7071_init() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_Phy_Pef7071_link() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_Phy_Pef7071_read_mdio_reg() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_Phy_Pef7071_read_mmd_indirect() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_Phy_Pef7071_write_mdio_reg() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_Phy_Pef7071_write_mmd_indirect() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_readAllFlags() : IfxEth.h
  • IfxEth_readMacAddress() : IfxEth.c , IfxEth.h
  • IfxEth_resetModule() : IfxEth.c , IfxEth.h
  • IfxEth_RxDescr_getNext() : IfxEth.h
  • IfxEth_RxDescr_release() : IfxEth.h
  • IfxEth_RxDescr_setBuffer() : IfxEth.h
  • IfxEth_sendTransmitBuffer() : IfxEth.c , IfxEth.h
  • IfxEth_sendTransmitBuffersRingMode() : IfxEth.c , IfxEth.h
  • IfxEth_setAddToTimeUpdate() : IfxEth.h
  • IfxEth_setAndSendTransmitBuffer() : IfxEth.c , IfxEth.h
  • IfxEth_setBinaryRolloverControl() : IfxEth.h
  • IfxEth_setLoopbackMode() : IfxEth.h
  • IfxEth_setMacAddress() : IfxEth.c , IfxEth.h
  • IfxEth_setNanoSecondsUpdateValue() : IfxEth.h
  • IfxEth_setPhyInterfaceMode() : IfxEth.h
  • IfxEth_setReceiveBuffer1RingMode() : IfxEth.h
  • IfxEth_setReceiveBuffer2RingMode() : IfxEth.h
  • IfxEth_setReceiveDescriptorAddress() : IfxEth.h
  • IfxEth_setSecondsUpdateValue() : IfxEth.h
  • IfxEth_setSubSecondIncrementValue() : IfxEth.h
  • IfxEth_setSubtractToTimeUpdate() : IfxEth.h
  • IfxEth_setTransmitBuffer1RingMode() : IfxEth.h
  • IfxEth_setTransmitBuffer2RingMode() : IfxEth.h
  • IfxEth_setTransmitDescriptorAddress() : IfxEth.h
  • IfxEth_setupChecksumEngine() : IfxEth.c , IfxEth.h
  • IfxEth_setupMiiInputPins() : IfxEth.c , IfxEth.h
  • IfxEth_setupMiiOutputPins() : IfxEth.c , IfxEth.h
  • IfxEth_setupRmiiInputPins() : IfxEth.c , IfxEth.h
  • IfxEth_setupRmiiOutputPins() : IfxEth.c , IfxEth.h
  • IfxEth_shuffleRxDescriptor() : IfxEth.c , IfxEth.h
  • IfxEth_shuffleTxDescriptor() : IfxEth.c , IfxEth.h
  • IfxEth_startReceiver() : IfxEth.c , IfxEth.h
  • IfxEth_startTransmitter() : IfxEth.c , IfxEth.h
  • IfxEth_stopReceiver() : IfxEth.c , IfxEth.h
  • IfxEth_stopTransmitter() : IfxEth.c , IfxEth.h
  • IfxEth_TxDescr_getNext() : IfxEth.h
  • IfxEth_TxDescr_isAvailable() : IfxEth.h
  • IfxEth_TxDescr_release() : IfxEth.h
  • IfxEth_TxDescr_setBuffer() : IfxEth.h
  • IfxEth_TxDescr_setup() : IfxEth.h
  • IfxEth_updateTimeStamp() : IfxEth.h
  • IfxEth_waitTransmitBuffer() : IfxEth.h
  • IfxEth_wakeupReceiver() : IfxEth.c , IfxEth.h
  • IfxEth_wakeupTransmitter() : IfxEth.h , IfxEth.c
  • IfxEth_writeHeader() : IfxEth.c , IfxEth.h
  • IfxFce_clearCrc16ErrorFlags() : IfxFce.h
  • IfxFce_clearCrc32ErrorFlags() : IfxFce.h
  • IfxFce_clearCrc8ErrorFlags() : IfxFce.h
  • IfxFce_Crc_calculateCrc16() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_calculateCrc32() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_calculateCrc8() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_clearErrorFlags() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_deInitModule() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_getInterruptStatus() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_initCrc() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_initCrcConfig() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_initModule() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_initModuleConfig() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_disableModule() : IfxFce.h
  • IfxFce_enableModule() : IfxFce.h
  • IfxFce_getCrc16InterruptStatus() : IfxFce.c , IfxFce.h
  • IfxFce_getCrc32InterruptStatus() : IfxFce.c , IfxFce.h
  • IfxFce_getCrc8InterruptStatus() : IfxFce.c , IfxFce.h
  • IfxFce_getSrcPointer() : IfxFce.h
  • IfxFce_reflectCrc32() : IfxFce.c , IfxFce.h
  • IfxFce_resetModule() : IfxFce.c , IfxFce.h
  • IfxFft_disableModule() : IfxFft.h
  • IfxFft_enableModule() : IfxFft.h
  • IfxFft_Fft_calcCounters() : IfxFft_Fft.c
  • IfxFft_Fft_calcCSR() : IfxFft_Fft.c
  • IfxFft_Fft_cloneAndLinkJobs() : IfxFft_Fft.h , IfxFft_Fft.c
  • IfxFft_Fft_initDma() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_initJob() : IfxFft_Fft.h , IfxFft_Fft.c
  • IfxFft_Fft_initJobConfig() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_initModule() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_initModuleConfig() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_initWindow() : IfxFft_Fft.h , IfxFft_Fft.c
  • IfxFft_Fft_isrInput() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_isrIntra() : IfxFft_Fft.h , IfxFft_Fft.c
  • IfxFft_Fft_isrOutput() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_loadInput() : IfxFft_Fft.c
  • IfxFft_Fft_modifyDataPointers() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_startJob() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_triggerEngine() : IfxFft_Fft.h
  • IfxFft_Fft_unloadOutput() : IfxFft_Fft.c
  • IfxFft_getInputFormat() : IfxFft.h
  • IfxFft_getLength() : IfxFft.h
  • IfxFft_getLengthCode() : IfxFft.h
  • IfxFft_getLengthFromCode() : IfxFft.h
  • IfxFft_getOutputFormat() : IfxFft.h
  • IfxFft_getSrcPointerDone() : IfxFft.h
  • IfxFft_getSrcPointerRfs() : IfxFft.h
  • IfxFft_getTransformLength() : IfxFft.h
  • IfxFft_isEngineBusy() : IfxFft.h
  • IfxFft_isModuleEnabled() : IfxFft.h
  • IfxFft_isModuleSuspended() : IfxFft.h
  • IfxFft_isReadyForStart() : IfxFft.h
  • IfxFft_setSuspendMode() : IfxFft.h
  • IfxFlash_clearCorrectableErrorTracking() : IfxFlash.c , IfxFlash.h
  • IfxFlash_clearStatus() : IfxFlash.h
  • IfxFlash_clearUncorrectableErrorTracking() : IfxFlash.c , IfxFlash.h
  • IfxFlash_disableCorrectableErrorTracking() : IfxFlash.c , IfxFlash.h
  • IfxFlash_disableUncorrectableErrorTracking() : IfxFlash.c , IfxFlash.h
  • IfxFlash_disableWriteProtection() : IfxFlash.c , IfxFlash.h
  • IfxFlash_enterPageMode() : IfxFlash.h
  • IfxFlash_eraseMultiplePhysicalSectors() : IfxFlash.h
  • IfxFlash_eraseMultipleSectors() : IfxFlash.h
  • IfxFlash_erasePhysicalSector() : IfxFlash.h
  • IfxFlash_eraseSector() : IfxFlash.h
  • IfxFlash_eraseVerifyMultipleSectors() : IfxFlash.h
  • IfxFlash_eraseVerifySector() : IfxFlash.h
  • IfxFlash_getTrackedCorrectableErrors() : IfxFlash.c , IfxFlash.h
  • IfxFlash_getTrackedUncorrectableErrors() : IfxFlash.h , IfxFlash.c
  • IfxFlash_loadPage() : IfxFlash.h
  • IfxFlash_loadPage2X32() : IfxFlash.h
  • IfxFlash_resetToRead() : IfxFlash.h
  • IfxFlash_resumeProtection() : IfxFlash.h
  • IfxFlash_selectCorrectableErrorTracking() : IfxFlash.c , IfxFlash.h
  • IfxFlash_selectUncorrectableErrorTracking() : IfxFlash.h , IfxFlash.c
  • IfxFlash_suspendResumeMultipleSectors() : IfxFlash.h
  • IfxFlash_suspendResumeSector() : IfxFlash.h
  • IfxFlash_waitUnbusy() : IfxFlash.h
  • IfxFlash_waitUnbusyAll() : IfxFlash.h
  • IfxFlash_writeBurst() : IfxFlash.h
  • IfxFlash_writePage() : IfxFlash.h
  • IfxFlash_writePageOnce() : IfxFlash.h
  • IfxGpt12_disableModule() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_enableModule() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_getCaptureSrc() : IfxGpt12.h
  • IfxGpt12_getModuleFrequency() : IfxGpt12.h
  • IfxGpt12_IncrEnc_getAbsolutePosition() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getDirection() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getFault() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getOffset() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getPeriodPerRotation() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getPosition() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getRawPosition() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getRefreshPeriod() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getResolution() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getSensorType() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getSpeed() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getTurn() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_init() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_initConfig() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_onZeroIrq() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_reset() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_resetFaults() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_setOffset() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_setRefreshPeriod() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_stdIfPosInit() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_update() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_updateFromT2() : IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_updateFromT3() : IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_updateSpeedFromT2() : IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_updateSpeedFromT3() : IfxGpt12_IncrEnc.c
  • IfxGpt12_initCapInPin() : IfxGpt12.h
  • IfxGpt12_initCapInPinWithPadLevel() : IfxGpt12.h
  • IfxGpt12_initTxEudInPin() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_initTxEudInPinWithPadLevel() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_initTxInPin() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_initTxInPinWithPadLevel() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_initTxOutPin() : IfxGpt12.h
  • IfxGpt12_isModuleSuspended() : IfxGpt12.h
  • IfxGpt12_resetModule() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_setCaptureInput() : IfxGpt12.h
  • IfxGpt12_setCaptureReload() : IfxGpt12.h
  • IfxGpt12_setGpt1BlockPrescaler() : IfxGpt12.h
  • IfxGpt12_setGpt2BlockPrescaler() : IfxGpt12.h
  • IfxGpt12_setSleepMode() : IfxGpt12.h
  • IfxGpt12_setSuspendMode() : IfxGpt12.h
  • IfxGpt12_T2_getFrequency() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_T2_getMode() : IfxGpt12.h
  • IfxGpt12_T2_getSrc() : IfxGpt12.h
  • IfxGpt12_T2_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T2_run() : IfxGpt12.h
  • IfxGpt12_T2_setCaptureInputMode() : IfxGpt12.h
  • IfxGpt12_T2_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T2_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T2_setEudInput() : IfxGpt12.h
  • IfxGpt12_T2_setIncrementalInterfaceInputMode() : IfxGpt12.h
  • IfxGpt12_T2_setInput() : IfxGpt12.h
  • IfxGpt12_T2_setInterruptEnable() : IfxGpt12.h
  • IfxGpt12_T2_setMode() : IfxGpt12.h
  • IfxGpt12_T2_setReloadInputMode() : IfxGpt12.h
  • IfxGpt12_T2_setRemoteControl() : IfxGpt12.h
  • IfxGpt12_T2_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T2_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T2_setTimerValue() : IfxGpt12.h
  • IfxGpt12_T3_enableOutput() : IfxGpt12.h
  • IfxGpt12_T3_getFrequency() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_T3_getMode() : IfxGpt12.h
  • IfxGpt12_T3_getSrc() : IfxGpt12.h
  • IfxGpt12_T3_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T3_run() : IfxGpt12.h
  • IfxGpt12_T3_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T3_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T3_setEudInput() : IfxGpt12.h
  • IfxGpt12_T3_setIncrementalInterfaceInputMode() : IfxGpt12.h
  • IfxGpt12_T3_setInput() : IfxGpt12.h
  • IfxGpt12_T3_setMode() : IfxGpt12.h
  • IfxGpt12_T3_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T3_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T3_setTimerValue() : IfxGpt12.h
  • IfxGpt12_T4_enableClearTimerT2() : IfxGpt12.h
  • IfxGpt12_T4_enableClearTimerT3() : IfxGpt12.h
  • IfxGpt12_T4_getFrequency() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_T4_getMode() : IfxGpt12.h
  • IfxGpt12_T4_getSrc() : IfxGpt12.h
  • IfxGpt12_T4_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T4_run() : IfxGpt12.h
  • IfxGpt12_T4_setCaptureInputMode() : IfxGpt12.h
  • IfxGpt12_T4_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T4_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T4_setEudInput() : IfxGpt12.h
  • IfxGpt12_T4_setIncrementalInterfaceInputMode() : IfxGpt12.h
  • IfxGpt12_T4_setInput() : IfxGpt12.h
  • IfxGpt12_T4_setInterruptEnable() : IfxGpt12.h
  • IfxGpt12_T4_setMode() : IfxGpt12.h
  • IfxGpt12_T4_setReloadInputMode() : IfxGpt12.h
  • IfxGpt12_T4_setRemoteControl() : IfxGpt12.h
  • IfxGpt12_T4_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T4_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T4_setTimerValue() : IfxGpt12.h
  • IfxGpt12_T5_enableClearTimer() : IfxGpt12.h
  • IfxGpt12_T5_getFrequency() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_T5_getMode() : IfxGpt12.h
  • IfxGpt12_T5_getSrc() : IfxGpt12.h
  • IfxGpt12_T5_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T5_run() : IfxGpt12.h
  • IfxGpt12_T5_setCaptureTrigger() : IfxGpt12.h
  • IfxGpt12_T5_setCaptureTriggerEnable() : IfxGpt12.h
  • IfxGpt12_T5_setCaptureTriggerMode() : IfxGpt12.h
  • IfxGpt12_T5_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T5_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T5_setEudInput() : IfxGpt12.h
  • IfxGpt12_T5_setInput() : IfxGpt12.h
  • IfxGpt12_T5_setMode() : IfxGpt12.h
  • IfxGpt12_T5_setRemoteControl() : IfxGpt12.h
  • IfxGpt12_T5_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T5_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T5_setTimerValue() : IfxGpt12.h
  • IfxGpt12_T6_enableClearTimer() : IfxGpt12.h
  • IfxGpt12_T6_getFrequency() : IfxGpt12.h , IfxGpt12.c
  • IfxGpt12_T6_getMode() : IfxGpt12.h
  • IfxGpt12_T6_getSrc() : IfxGpt12.h
  • IfxGpt12_T6_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T6_run() : IfxGpt12.h
  • IfxGpt12_T6_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T6_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T6_setEudInput() : IfxGpt12.h
  • IfxGpt12_T6_setInput() : IfxGpt12.h
  • IfxGpt12_T6_setMode() : IfxGpt12.h
  • IfxGpt12_T6_setReloadMode() : IfxGpt12.h
  • IfxGpt12_T6_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T6_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T6_setTimerValue() : IfxGpt12.h
  • IfxGtm_Atom_Agc_buildFeature() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_buildFeatureForChannel() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannel() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelOutput() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannels() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelsOutput() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelsTrigger() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelsUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableTimeTrigger() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_resetChannels() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_setChannelForceUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_setChannelsForceUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_setChannelsUpdate() : IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_setTimeTrigger() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_trigger() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_Ch_clearOneNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_clearZeroNotification() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_Ch_configurePwmMode() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getChannelPointer() : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getClockFrequency() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getClockSource() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCompareOne() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCompareOnePointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCompareZero() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCompareZeroPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCounterValue() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getOutputLevel() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getSrcPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getTimerPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_isOneNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_isZeroNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_raiseInterruptOne() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_raiseInterruptZero() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setAruInput() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setAruReadAddress0() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setAruReadAddress1() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setClockSource() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompare() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareOne() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareOneShadow() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareShadow() : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareZero() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_Ch_setCompareZeroShadow() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCounterValue() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_Ch_setMode() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setOneShotMode() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setResetSource() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_Ch_setSignalLevel() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setSomcControl() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_Ch_setSomcSignalLevelControl() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setTriggerOutput() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_getShadowOne() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_getShadowOnePointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_getShadowZero() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_getShadowZeroPointer() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_Pwm_init() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h
  • IfxGtm_Atom_Pwm_initConfig() : IfxGtm_Atom_Pwm.h , IfxGtm_Atom_Pwm.c
  • IfxGtm_Atom_Pwm_start() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h
  • IfxGtm_Atom_Pwm_stop() : IfxGtm_Atom_Pwm.h , IfxGtm_Atom_Pwm.c
  • IfxGtm_Atom_PwmHl_getDeadtime() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_getMinPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_getMode() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_init() : IfxGtm_Atom_PwmHl.h , IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_initConfig() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_invertActiveState() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_setDeadtime() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setMinPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setMode() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setOnTime() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setOnTimeAndShift() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setupChannels() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_stdIfPwmHlInit() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_updateAndShiftOff() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updateCenterAligned() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updateEdgeAligned() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updateOff() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updatePulse() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updatePulseOff() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updateShiftCenterAligned() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_Timer_acknowledgeTimerIrq() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_acknowledgeTriggerIrq() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_addToChannelMask() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_applyUpdate() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_disableUpdate() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_getFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getInputFrequency() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_getOffset() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getPeriod() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getPointer() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getResolution() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_getTrigger() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getTriggerPointer() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_init() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_initConfig() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_run() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_setFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_setPeriod() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_setSingleMode() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_setTrigger() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_stdIfTimerInit() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_stop() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_updateInputFrequency() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Cmu_enableClocks() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_getClkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_getEclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_getFxClkFrequency() : IfxGtm_Cmu.h , IfxGtm_Cmu.c
  • IfxGtm_Cmu_getGclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_getModuleFrequency() : IfxGtm_Cmu.h , IfxGtm_Cmu.c
  • IfxGtm_Cmu_isClkClockEnabled() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_isEclkClockEnabled() : IfxGtm_Cmu.h , IfxGtm_Cmu.c
  • IfxGtm_Cmu_isFxClockEnabled() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_selectClkInput() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_setClkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_setEclkFrequency() : IfxGtm_Cmu.h , IfxGtm_Cmu.c
  • IfxGtm_Cmu_setGclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_disable() : IfxGtm.h , IfxGtm.c
  • IfxGtm_Dpll_getSubIncFrequency() : IfxGtm_Dpll.c , IfxGtm_Dpll.h
  • IfxGtm_enable() : IfxGtm.h , IfxGtm.c
  • IfxGtm_getSysClkFrequency() : IfxGtm.c , IfxGtm.h
  • IfxGtm_isEnabled() : IfxGtm.h
  • IfxGtm_isModuleSuspended() : IfxGtm.h
  • IfxGtm_PinMap_setAtomTout() : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_PinMap_setTimTin() : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_PinMap_setTomTout() : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_setSuspendMode() : IfxGtm.h
  • IfxGtm_Tbu_enableChannel() : IfxGtm_Tbu.h
  • IfxGtm_Tbu_getClockFrequency() : IfxGtm_Tbu.c , IfxGtm_Tbu.h
  • IfxGtm_Tbu_isChannelEnabled() : IfxGtm_Tbu.h
  • IfxGtm_Tim_Ch_clearCntOverflowEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearDataLostEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearEcntOverflowEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearGlitchEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearNewValueEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getCaptureClockFrequency() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getCaptureClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getFilterClockFrequency() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getFilterClockSource() : IfxGtm_Tim.h , IfxGtm_Tim.c
  • IfxGtm_Tim_Ch_getSrcPointer() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getTimeoutClockFrequency() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getTimeoutClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isCntOverflowEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isDataLostEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isEcntOverflowEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isGlitchEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isNewValueEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_resetChannel() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setChannelNotification() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setFilterNotification() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setNotificationMode() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setTimeoutNotification() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_getChannel() : IfxGtm_Tim.h
  • IfxGtm_Tim_In_clearNewData() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_getDutyPercent() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_getPeriodSecond() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_getPeriodTicks() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_getPulseLengthTick() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_init() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_initConfig() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_isDataLost() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_isNewData() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_onIsr() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_update() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h
  • IfxGtm_Tom_Ch_clearOneNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_clearZeroNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getChannelPointer() : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getClockFrequency() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_getClockSource() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getCompareOne() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_getCompareOnePointer() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getCompareZero() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_getCompareZeroPointer() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getOutputLevel() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getSrcPointer() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getTgcPointer() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_getTimerPointer() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_isOneNotification() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_isZeroNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_raiseInterruptOne() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_raiseInterruptZero() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setClockSource() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompare() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompareOne() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_setCompareOneShadow() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompareShadow() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_setCompareZero() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompareZeroShadow() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_setCounterValue() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setGatedCounter() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setOneShotMode() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_setPcm() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setResetSource() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_setSignalLevel() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setSpe() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_setTriggerOutput() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Pwm_init() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h
  • IfxGtm_Tom_Pwm_initConfig() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h
  • IfxGtm_Tom_Pwm_start() : IfxGtm_Tom_Pwm.h , IfxGtm_Tom_Pwm.c
  • IfxGtm_Tom_Pwm_stop() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h
  • IfxGtm_Tom_PwmHl_getDeadtime() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_getMinPulse() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_getMode() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_init() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_initConfig() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_invertActiveState() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_setDeadtime() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setMinPulse() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setMode() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setOnTime() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setOnTimeAndShift() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setPulse() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setupChannels() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_stdIfPwmHlInit() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_updateAndShiftOff() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updateCenterAligned() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updateEdgeAligned() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updateOff() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updatePulse() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updatePulseOff() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updateShiftCenterAligned() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_Tgc_buildFeature() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_buildFeatureForChannel() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Tgc_enableChannel() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannelOutput() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannels() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannelsOutput() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Tgc_enableChannelsTrigger() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannelsUpdate() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Tgc_enableChannelUpdate() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableTimeTrigger() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Tgc_resetChannels() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_setChannelForceUpdate() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_setChannelsForceUpdate() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_setTimeTrigger() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Tgc_trigger() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_writeGlobalControl() : IfxGtm_Tom.h
  • IfxGtm_Tom_Timer_acknowledgeTimerIrq() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_acknowledgeTriggerIrq() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_addToChannelMask() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_applyUpdate() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_disableUpdate() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getFrequency() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getInputFrequency() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getOffset() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getPeriod() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getPointer() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getResolution() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getTrigger() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getTriggerPointer() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_init() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_initConfig() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_run() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_setFrequency() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_setPeriod() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_setSingleMode() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_setTrigger() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_stdIfTimerInit() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_stop() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_updateInputFrequency() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Trig_fromDsadc() : IfxGtm_Trig.c , IfxGtm_Trig.h
  • IfxGtm_Trig_toDsadc() : IfxGtm_Trig.h , IfxGtm_Trig.c
  • IfxGtm_Trig_toSent() : IfxGtm_Trig.c , IfxGtm_Trig.h
  • IfxGtm_Trig_toVadc() : IfxGtm_Trig.c , IfxGtm_Trig.h
  • IfxHssl_clearHsctInterruptFlag() : IfxHssl.h
  • IfxHssl_clearHsslChannelErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_clearHsslGlobalErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_clearInitialiseModeFlag() : IfxHssl.h
  • IfxHssl_disableHsctInterruptFlag() : IfxHssl.h
  • IfxHssl_disableHsctModule() : IfxHssl.c , IfxHssl.h
  • IfxHssl_disableHsctReceivePath() : IfxHssl.h
  • IfxHssl_disableHsctTransmitPath() : IfxHssl.h
  • IfxHssl_disableHsslChannelErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_disableHsslGlobalErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_disableHsslModule() : IfxHssl.c , IfxHssl.h
  • IfxHssl_enableAllErrorFlags() : IfxHssl.h
  • IfxHssl_enableHsctInterrupt() : IfxHssl.h
  • IfxHssl_enableHsctInterruptFlag() : IfxHssl.h
  • IfxHssl_enableHsctModule() : IfxHssl.c , IfxHssl.h
  • IfxHssl_enableHsctReceivePath() : IfxHssl.h
  • IfxHssl_enableHsctTransmitPath() : IfxHssl.h
  • IfxHssl_enableHsslChannelErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_enableHsslCOKInterrupt() : IfxHssl.h
  • IfxHssl_enableHsslERRInterrupt() : IfxHssl.h
  • IfxHssl_enableHsslEXIInterrupt() : IfxHssl.h
  • IfxHssl_enableHsslGlobalErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_enableHsslModule() : IfxHssl.h , IfxHssl.c
  • IfxHssl_enableHsslRDIInterrupt() : IfxHssl.h
  • IfxHssl_enableHsslTRGInterrupt() : IfxHssl.h
  • IfxHssl_getAllMflagsStatus() : IfxHssl.h
  • IfxHssl_getCurrentCount() : IfxHssl.h
  • IfxHssl_getHsctAddress() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsctIndex() : IfxHssl.h , IfxHssl.c
  • IfxHssl_getHsctInterruptFlagStatus() : IfxHssl.h
  • IfxHssl_getHsctSrcPointer() : IfxHssl.h , IfxHssl.c
  • IfxHssl_getHsctUnsolicitedStatusMessage() : IfxHssl.h
  • IfxHssl_getHsslAddress() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslChannelErrorInterruptFlagStatus() : IfxHssl.h
  • IfxHssl_getHsslCOKSrcPointer() : IfxHssl.h , IfxHssl.c
  • IfxHssl_getHsslERRSrcPointer() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslEXISrcPointer() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslGloabalErrorInterruptFlagStatus() : IfxHssl.h
  • IfxHssl_getHsslIndex() : IfxHssl.h , IfxHssl.c
  • IfxHssl_getHsslRDISrcPointer() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslTRGSrcPointer() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getInitialiseModeFlagStatus() : IfxHssl.h
  • IfxHssl_getReloadCount() : IfxHssl.h
  • IfxHssl_Hssl_checkErrors() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_clearErrorFlags() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_delay() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_getReadData() : IfxHssl_Hssl.h
  • IfxHssl_Hssl_initChannel() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_initChannelConfig() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_initHsctModule() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_initHsctModuleConfig() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_initHsslModule() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_initHsslModuleConfig() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_prepareStream() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_read() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_sendControlCommand() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_singleFrameRequest() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_waitAcknowledge() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_write() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_writeStream() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_isModuleSuspended() : IfxHssl.h
  • IfxHssl_resetHsctKernel() : IfxHssl.c , IfxHssl.h
  • IfxHssl_resetHsslKernel() : IfxHssl.h , IfxHssl.c
  • IfxHssl_sendHsctUnsolicitedStatusMessage() : IfxHssl.h
  • IfxHssl_setHsctRxLinkSpeed() : IfxHssl.h
  • IfxHssl_setHsctSleepMode() : IfxHssl.h
  • IfxHssl_setHsctTxLinkSpeed() : IfxHssl.h
  • IfxHssl_setHsslSleepMode() : IfxHssl.h
  • IfxHssl_setInitialiseModeFlag() : IfxHssl.h
  • IfxHssl_setReloadCount() : IfxHssl.h
  • IfxHssl_setSuspendMode() : IfxHssl.h
  • IfxHssl_setTimeoutReloadValue() : IfxHssl.h
  • IfxI2c_busIsFree() : IfxI2c.h
  • IfxI2c_clearAllDtrInterruptSources() : IfxI2c.h
  • IfxI2c_clearAllErrorInterruptSources() : IfxI2c.h
  • IfxI2c_clearAllProtocolInterruptSources() : IfxI2c.h
  • IfxI2c_clearBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_clearErrorInterruptSource() : IfxI2c.h
  • IfxI2c_clearLastBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_clearLastSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_clearProtocolInterruptSource() : IfxI2c.h
  • IfxI2c_clearSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_configureAsMaster() : IfxI2c.h , IfxI2c.c
  • IfxI2c_disableBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_disableErrorInterruptFlag() : IfxI2c.h
  • IfxI2c_disableErrorInterruptSource() : IfxI2c.h
  • IfxI2c_disableLastBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_disableLastSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_disableModule() : IfxI2c.h , IfxI2c.c
  • IfxI2c_disableProtocolInterruptFlag() : IfxI2c.h
  • IfxI2c_disableProtocolInterruptSource() : IfxI2c.h
  • IfxI2c_disableSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_enableBurstDataTransferInterrupt() : IfxI2c.c , IfxI2c.h
  • IfxI2c_enableBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_enableErrorInterrupt() : IfxI2c.h , IfxI2c.c
  • IfxI2c_enableErrorInterruptFlag() : IfxI2c.h
  • IfxI2c_enableErrorInterruptSource() : IfxI2c.h
  • IfxI2c_enableLastBurstDataTransferInterrupt() : IfxI2c.c , IfxI2c.h
  • IfxI2c_enableLastBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_enableLastSingleDataTransferInterrupt() : IfxI2c.c , IfxI2c.h
  • IfxI2c_enableLastSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_enableModule() : IfxI2c.c , IfxI2c.h
  • IfxI2c_enableProtocolInterrupt() : IfxI2c.h , IfxI2c.c
  • IfxI2c_enableProtocolInterruptFlag() : IfxI2c.h
  • IfxI2c_enableProtocolInterruptSource() : IfxI2c.h
  • IfxI2c_enableSingleDataTransferInterrupt() : IfxI2c.h , IfxI2c.c
  • IfxI2c_enableSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_getAddress() : IfxI2c.h , IfxI2c.c
  • IfxI2c_getBaudrate() : IfxI2c.h , IfxI2c.c
  • IfxI2c_getBurstDataTransferSrcPointer() : IfxI2c.h
  • IfxI2c_getBurstRequestInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getBusStatus() : IfxI2c.h
  • IfxI2c_getErrorInterruptFlagStatus() : IfxI2c.h
  • IfxI2c_getErrorInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getErrorSrcPointer() : IfxI2c.h
  • IfxI2c_getIndex() : IfxI2c.c , IfxI2c.h
  • IfxI2c_getLastBurstDataTransferSrcPointer() : IfxI2c.h
  • IfxI2c_getLastBurstRequestInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getLastSingleDataTransferSrcPointer() : IfxI2c.h
  • IfxI2c_getLastSingleRequestInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getProtocolInterruptFlagStatus() : IfxI2c.h
  • IfxI2c_getProtocolInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getProtocolSrcPointer() : IfxI2c.h
  • IfxI2c_getSingleDataTransferSrcPointer() : IfxI2c.h
  • IfxI2c_getSingleRequestInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_I2c_initConfig() : IfxI2c_I2c.h , IfxI2c_I2c.c
  • IfxI2c_I2c_initDevice() : IfxI2c_I2c.c , IfxI2c_I2c.h
  • IfxI2c_I2c_initDeviceConfig() : IfxI2c_I2c.h , IfxI2c_I2c.c
  • IfxI2c_I2c_initModule() : IfxI2c_I2c.c , IfxI2c_I2c.h
  • IfxI2c_I2c_read() : IfxI2c_I2c.h , IfxI2c_I2c.c
  • IfxI2c_I2c_write() : IfxI2c_I2c.c , IfxI2c_I2c.h
  • IfxI2c_initSclSdaPin() : IfxI2c.c , IfxI2c.h
  • IfxI2c_isFifoRequest() : IfxI2c.h
  • IfxI2c_releaseBus() : IfxI2c.c , IfxI2c.h
  • IfxI2c_resetFifo() : IfxI2c.h , IfxI2c.c
  • IfxI2c_resetModule() : IfxI2c.c , IfxI2c.h
  • IfxI2c_run() : IfxI2c.h
  • IfxI2c_setBaudrate() : IfxI2c.h , IfxI2c.c
  • IfxI2c_setPinSelection() : IfxI2c.h
  • IfxI2c_setReceivePacketSize() : IfxI2c.h
  • IfxI2c_setSlaveDeviceAddress() : IfxI2c.h
  • IfxI2c_setSleepMode() : IfxI2c.h
  • IfxI2c_setTransmitPacketSize() : IfxI2c.h
  • IfxI2c_stop() : IfxI2c.h
  • IfxI2c_waitBusFree() : IfxI2c.h
  • IfxI2c_writeFifo() : IfxI2c.h
  • IfxIom_disableModule() : IfxIom.h
  • IfxIom_Driver_clearAllGlitch() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_clearHistory() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_clearLamMonGlitch() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_clearLamRefGlitch() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_disableEvents() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_disableLamEvent() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_enableLamEvent() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_getHistory() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_init() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_initConfig() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_initLam() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_initLamConfig() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_isLamMonGlitch() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_isLamRefGlitch() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_restoreEvents() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_enableModule() : IfxIom.h
  • IfxIom_getFrequency() : IfxIom.h , IfxIom.c
  • IfxIom_resetModule() : IfxIom.c , IfxIom.h
  • IfxIom_setSleepMode() : IfxIom.h
  • IfxMsc_clearAbraOverflowFlag() : IfxMsc.h
  • IfxMsc_clearAbraUnderflowFlag() : IfxMsc.h
  • IfxMsc_clearDataFrameInterruptFlag() : IfxMsc.c , IfxMsc.h
  • IfxMsc_clearRecieveDataInterruptFlag() : IfxMsc.h
  • IfxMsc_clearReset() : IfxMsc.c , IfxMsc.h
  • IfxMsc_clearUpstreamTimeout() : IfxMsc.h
  • IfxMsc_clearUpstreamValidFlag() : IfxMsc.h
  • IfxMsc_clearValidbit() : IfxMsc.h
  • IfxMsc_disableModule() : IfxMsc.h , IfxMsc.c
  • IfxMsc_disableUpstreamTimeoutInterrupt() : IfxMsc.h
  • IfxMsc_downstreamAbraBaudCalculator() : IfxMsc.h , IfxMsc.c
  • IfxMsc_downstreamFractionalBaudCalculator() : IfxMsc.c , IfxMsc.h
  • IfxMsc_downstreamNormalBaudCalculator() : IfxMsc.h , IfxMsc.c
  • IfxMsc_enableModule() : IfxMsc.c , IfxMsc.h
  • IfxMsc_enableUpstreamTimeoutInterrupt() : IfxMsc.h
  • IfxMsc_getActiveDataFrameStatus() : IfxMsc.c , IfxMsc.h
  • IfxMsc_getAddress() : IfxMsc.h , IfxMsc.c
  • IfxMsc_getAsyncClockBypass() : IfxMsc.h
  • IfxMsc_getData() : IfxMsc.h
  • IfxMsc_getDataFrameInterruptFlag() : IfxMsc.h , IfxMsc.c
  • IfxMsc_getDataHighTarget() : IfxMsc.h
  • IfxMsc_getDataLowTarget() : IfxMsc.h
  • IfxMsc_getDownStreamExtension() : IfxMsc.h
  • IfxMsc_getIndex() : IfxMsc.c , IfxMsc.h
  • IfxMsc_getRecieveDataInterruptFlag() : IfxMsc.h
  • IfxMsc_getSrcPointer() : IfxMsc.h
  • IfxMsc_getUpstreamData() : IfxMsc.h
  • IfxMsc_getUpstreamParityErrorFlag() : IfxMsc.h
  • IfxMsc_getUpstreamTimeoutFlag() : IfxMsc.h
  • IfxMsc_getUpstreamValidFlag() : IfxMsc.h
  • IfxMsc_initEnPin() : IfxMsc.h
  • IfxMsc_initFclnPin() : IfxMsc.h
  • IfxMsc_initFclpPin() : IfxMsc.h
  • IfxMsc_initInjPin() : IfxMsc.h
  • IfxMsc_initSdiPin() : IfxMsc.h
  • IfxMsc_initSonPin() : IfxMsc.h
  • IfxMsc_initSopPin() : IfxMsc.h
  • IfxMsc_isModuleSuspended() : IfxMsc.h
  • IfxMsc_Msc_clearDataFrameInterrupt() : IfxMsc_Msc.h
  • IfxMsc_Msc_deInitModule() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_getActiveDataFrameStatus() : IfxMsc_Msc.h
  • IfxMsc_Msc_getDataFrameInterruptStatus() : IfxMsc_Msc.h
  • IfxMsc_Msc_getTarget() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_initializeAbra() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_initializeDataExtension() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_initModule() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_initModuleConfig() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_receiveData() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_sendCommand() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_sendData() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_sendDataExtension() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_sendDataHigh() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_sendDataLow() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_setCommandTarget() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_setDataTarget() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_resetModule() : IfxMsc.c , IfxMsc.h
  • IfxMsc_setAsyncClockBypass() : IfxMsc.h
  • IfxMsc_setCommandTarget() : IfxMsc.h
  • IfxMsc_setDataHighTarget() : IfxMsc.h
  • IfxMsc_setDataLowTarget() : IfxMsc.h
  • IfxMsc_setDownStreamData() : IfxMsc.h
  • IfxMsc_setDownStreamExtension() : IfxMsc.h
  • IfxMsc_setDownStreamExtensionData() : IfxMsc.h
  • IfxMsc_setFractionalDividerStep() : IfxMsc.h
  • IfxMsc_setNdividerDownstream() : IfxMsc.h
  • IfxMsc_setSerialDataInputSelect() : IfxMsc.h
  • IfxMsc_setSleepMode() : IfxMsc.h
  • IfxMsc_setSuspendMode() : IfxMsc.h
  • IfxMsc_setTransmissionMode() : IfxMsc.h
  • IfxMsc_setUpstreamChannelRecieveRate() : IfxMsc.h
  • IfxMsc_setUpstreamTimeout() : IfxMsc.h
  • IfxMsc_setUpstreamTimeoutPrescalar() : IfxMsc.h
  • IfxMsc_upstreamFractionalBaudCalculator() : IfxMsc.h , IfxMsc.c
  • IfxMsc_upstreamNormalBaudCalculator() : IfxMsc.h , IfxMsc.c
  • IfxMtu_checkErrorFlags() : IfxMtu.h
  • IfxMtu_clearErrorTracking() : IfxMtu.c , IfxMtu.h
  • IfxMtu_clearSram() : IfxMtu.c , IfxMtu.h
  • IfxMtu_clearSramContinue() : IfxMtu.c , IfxMtu.h
  • IfxMtu_clearSramStart() : IfxMtu.h , IfxMtu.c
  • IfxMtu_disableMbistShell() : IfxMtu.h
  • IfxMtu_enableErrorTracking() : IfxMtu.c , IfxMtu.h
  • IfxMtu_enableMbistShell() : IfxMtu.h
  • IfxMtu_enableModule() : IfxMtu.h
  • IfxMtu_getSystemAddress() : IfxMtu.h , IfxMtu.c
  • IfxMtu_getTrackedSramAddresses() : IfxMtu.h , IfxMtu.c
  • IfxMtu_isAutoInitRunning() : IfxMtu.h
  • IfxMtu_isErrorTrackingEnabled() : IfxMtu.h
  • IfxMtu_isErrorTrackingOverflow() : IfxMtu.h
  • IfxMtu_isMbistDone() : IfxMtu.h
  • IfxMtu_isModuleEnabled() : IfxMtu.h
  • IfxMtu_readSramAddress() : IfxMtu.c , IfxMtu.h
  • IfxMtu_runNonDestructiveInversionTest() : IfxMtu.c , IfxMtu.h
  • IfxMtu_waitForMbistDone() : IfxMtu.c
  • IfxMtu_writeSramAddress() : IfxMtu.h , IfxMtu.c
  • IfxMultican_calcTimingFromBTR() : IfxMultican.h , IfxMultican.c
  • IfxMultican_Can_deinit() : IfxMultican_Can.h
  • IfxMultican_Can_getConfig() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_getModuleFrequency() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_initModule() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_initModuleConfig() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_cancelSend() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_clearRxPending() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_clearTxPending() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_deinit() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_getConfig() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_getPendingId() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_getStatus() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_init() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_initConfig() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_isRxPending() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_isTransmitRequested() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_isTxPending() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_readLongFrame() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_readMessage() : IfxMultican_Can.h , IfxMultican_Can.c
  • IfxMultican_Can_MsgObj_sendLongFrame() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_sendMessage() : IfxMultican_Can.h , IfxMultican_Can.c
  • IfxMultican_Can_Node_activate() : IfxMultican_Can.h
  • IfxMultican_Can_Node_deactivate() : IfxMultican_Can.h
  • IfxMultican_Can_Node_deinit() : IfxMultican_Can.h
  • IfxMultican_Can_Node_getConfig() : IfxMultican_Can.h , IfxMultican_Can.c
  • IfxMultican_Can_Node_init() : IfxMultican_Can.h , IfxMultican_Can.c
  • IfxMultican_Can_Node_initConfig() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_Node_recoverBusOff() : IfxMultican_Can.h
  • IfxMultican_Can_Node_sendToBusOff() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_clearMessagePendingSeletor() : IfxMultican.h
  • IfxMultican_clearPendingMessageNotification() : IfxMultican.h
  • IfxMultican_deinit() : IfxMultican.c , IfxMultican.h
  • IfxMultican_disableModule() : IfxMultican.h
  • IfxMultican_disableSleepMode() : IfxMultican.h
  • IfxMultican_enableModule() : IfxMultican.h
  • IfxMultican_enableSleepMode() : IfxMultican.h
  • IfxMultican_getAddress() : IfxMultican.c , IfxMultican.h
  • IfxMultican_getFractionalDividerMode() : IfxMultican.h
  • IfxMultican_getFractionalDividerStepValue() : IfxMultican.h
  • IfxMultican_getIndex() : IfxMultican.c , IfxMultican.h
  • IfxMultican_getInputClock() : IfxMultican.h
  • IfxMultican_getSrcPointer() : IfxMultican.h , IfxMultican.c
  • IfxMultican_isModuleEnabled() : IfxMultican.h
  • IfxMultican_isModuleSuspended() : IfxMultican.h
  • IfxMultican_Message_init() : IfxMultican.h
  • IfxMultican_Message_longFrameInit() : IfxMultican.h
  • IfxMultican_MsgObj_cancelSend() : IfxMultican.h , IfxMultican.c
  • IfxMultican_MsgObj_clearDataRegisters() : IfxMultican.h
  • IfxMultican_MsgObj_clearFifoGatewayPointers() : IfxMultican.h
  • IfxMultican_MsgObj_clearRxPending() : IfxMultican.h
  • IfxMultican_MsgObj_clearStatusFlag() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_clearTxPending() : IfxMultican.h
  • IfxMultican_MsgObj_deinit() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_doReadLongFrame() : IfxMultican.c
  • IfxMultican_MsgObj_doReadMessage() : IfxMultican.c
  • IfxMultican_MsgObj_getBottomObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_getDataLengthCode() : IfxMultican.h
  • IfxMultican_MsgObj_getMessageId() : IfxMultican.h
  • IfxMultican_MsgObj_getNextObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_getPendingId() : IfxMultican.h , IfxMultican.c
  • IfxMultican_MsgObj_getPointer() : IfxMultican.h
  • IfxMultican_MsgObj_getStatus() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_getStatusFlag() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_isExtendedFrame() : IfxMultican.h
  • IfxMultican_MsgObj_isRxPending() : IfxMultican.h
  • IfxMultican_MsgObj_isTransmitRequested() : IfxMultican.h
  • IfxMultican_MsgObj_isTxPending() : IfxMultican.h
  • IfxMultican_MsgObj_readLongFrame() : IfxMultican.h , IfxMultican.c
  • IfxMultican_MsgObj_readMessage() : IfxMultican.h , IfxMultican.c
  • IfxMultican_MsgObj_sendLongFrame() : IfxMultican.h , IfxMultican.c
  • IfxMultican_MsgObj_sendMessage() : IfxMultican.h , IfxMultican.c
  • IfxMultican_MsgObj_setAcceptanceMask() : IfxMultican.h
  • IfxMultican_MsgObj_setBitRateSwitch() : IfxMultican.h
  • IfxMultican_MsgObj_setBottomObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_setCurrentObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_setDataCopy() : IfxMultican.h
  • IfxMultican_MsgObj_setDataLengthCode() : IfxMultican.h
  • IfxMultican_MsgObj_setDataLengthCodeCopy() : IfxMultican.h
  • IfxMultican_MsgObj_setExtendedDataLength() : IfxMultican.h
  • IfxMultican_MsgObj_setFilter() : IfxMultican.h , IfxMultican.c
  • IfxMultican_MsgObj_setGatewayDataFrameSend() : IfxMultican.h
  • IfxMultican_MsgObj_setIdentifierCopy() : IfxMultican.h
  • IfxMultican_MsgObj_setIdentifierExtension() : IfxMultican.h
  • IfxMultican_MsgObj_setMatchingId() : IfxMultican.h
  • IfxMultican_MsgObj_setMessageId() : IfxMultican.h
  • IfxMultican_MsgObj_setMessageMode() : IfxMultican.h
  • IfxMultican_MsgObj_setMessagePendingNumber() : IfxMultican.h
  • IfxMultican_MsgObj_setOverflowInterrupt() : IfxMultican.h
  • IfxMultican_MsgObj_setPriorityClass() : IfxMultican.h
  • IfxMultican_MsgObj_setReceiveInterrupt() : IfxMultican.h
  • IfxMultican_MsgObj_setReceiveInterruptNodePointer() : IfxMultican.h
  • IfxMultican_MsgObj_setRemoteMonitoring() : IfxMultican.h
  • IfxMultican_MsgObj_setSelectObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_setSingleDataTransfer() : IfxMultican.h
  • IfxMultican_MsgObj_setSingleTransmitTrial() : IfxMultican.h
  • IfxMultican_MsgObj_setStatusFlag() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_setTopObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_setTransmitInterrupt() : IfxMultican.h
  • IfxMultican_MsgObj_setTransmitInterruptNodePointer() : IfxMultican.h
  • IfxMultican_MsgObj_writeTxfifo() : IfxMultican.h , IfxMultican.c
  • IfxMultican_Node_activate() : IfxMultican.h
  • IfxMultican_Node_deactivate() : IfxMultican.h
  • IfxMultican_Node_deinit() : IfxMultican.c , IfxMultican.h
  • IfxMultican_Node_disableConfigurationChange() : IfxMultican.h
  • IfxMultican_Node_enableConfigurationChange() : IfxMultican.h
  • IfxMultican_Node_getCodeFromDataLength() : IfxMultican.h
  • IfxMultican_Node_getDataLengthFromCode() : IfxMultican.h
  • IfxMultican_Node_getPointer() : IfxMultican.h
  • IfxMultican_Node_initRxPin() : IfxMultican.c , IfxMultican.h
  • IfxMultican_Node_initTxPin() : IfxMultican.c , IfxMultican.h
  • IfxMultican_Node_recoverBusOff() : IfxMultican.c , IfxMultican.h
  • IfxMultican_Node_resetControlRegister() : IfxMultican.h
  • IfxMultican_Node_resetErrorCounters() : IfxMultican.h
  • IfxMultican_Node_resetInterruptPointers() : IfxMultican.h
  • IfxMultican_Node_setAlertInterrupt() : IfxMultican.h
  • IfxMultican_Node_setAlertInterruptPointer() : IfxMultican.h
  • IfxMultican_Node_setAnalyzerMode() : IfxMultican.h
  • IfxMultican_Node_setBitTiming() : IfxMultican.c , IfxMultican.h
  • IfxMultican_Node_setErrorWarningLevel() : IfxMultican.h
  • IfxMultican_Node_setFastBitTiming() : IfxMultican.h , IfxMultican.c
  • IfxMultican_Node_setFastNode() : IfxMultican.h
  • IfxMultican_Node_setFrameCounterInterrupt() : IfxMultican.h
  • IfxMultican_Node_setFrameCounterInterruptPointer() : IfxMultican.h
  • IfxMultican_Node_setFrameCounterMode() : IfxMultican.h
  • IfxMultican_Node_setLastErrorCodeInterrupt() : IfxMultican.h
  • IfxMultican_Node_setLastErrorCodeInterruptPointer() : IfxMultican.h
  • IfxMultican_Node_setLoopBackMode() : IfxMultican.h
  • IfxMultican_Node_setNominalBitTiming() : IfxMultican.c , IfxMultican.h
  • IfxMultican_Node_setReceiveErrorCounter() : IfxMultican.h
  • IfxMultican_Node_setTimerEventInterruptPointer() : IfxMultican.h
  • IfxMultican_Node_setTransceiverDelayCompensation() : IfxMultican.h
  • IfxMultican_Node_setTransceiverDelayCompensationOffset() : IfxMultican.h
  • IfxMultican_Node_setTransferInterrupt() : IfxMultican.h
  • IfxMultican_Node_setTransferInterruptPointer() : IfxMultican.h
  • IfxMultican_Node_setTransmitErrorCounter() : IfxMultican.h
  • IfxMultican_resetModule() : IfxMultican.h , IfxMultican.c
  • IfxMultican_setFractionalDividerMode() : IfxMultican.h
  • IfxMultican_setFractionalDividerStepValue() : IfxMultican.h
  • IfxMultican_setInputClock() : IfxMultican.h
  • IfxMultican_setListCommand() : IfxMultican.c , IfxMultican.h
  • IfxMultican_setMessageIndexMask() : IfxMultican.h
  • IfxMultican_setSleepMode() : IfxMultican.h
  • IfxMultican_setSuspendMode() : IfxMultican.h
  • IfxMultican_waitListReady() : IfxMultican.h
  • IfxPort_disableEmergencyStop() : IfxPort.c , IfxPort.h
  • IfxPort_enableEmergencyStop() : IfxPort.c , IfxPort.h
  • IfxPort_getAddress() : IfxPort.h , IfxPort.c
  • IfxPort_getGroupState() : IfxPort.h
  • IfxPort_getIndex() : IfxPort.h , IfxPort.c
  • IfxPort_getPinState() : IfxPort.h
  • IfxPort_Io_initModule() : IfxPort_Io.c , IfxPort_Io.h
  • IfxPort_resetESR() : IfxPort.c , IfxPort.h
  • IfxPort_setESR() : IfxPort.h , IfxPort.c
  • IfxPort_setGroupModeInput() : IfxPort.c , IfxPort.h
  • IfxPort_setGroupModeOutput() : IfxPort.c , IfxPort.h
  • IfxPort_setGroupPadDriver() : IfxPort.c , IfxPort.h
  • IfxPort_setGroupState() : IfxPort.h
  • IfxPort_setPinHigh() : IfxPort.h
  • IfxPort_setPinLow() : IfxPort.h
  • IfxPort_setPinMode() : IfxPort.c , IfxPort.h
  • IfxPort_setPinModeInput() : IfxPort.h
  • IfxPort_setPinModeLvdsHigh() : IfxPort.h , IfxPort.c
  • IfxPort_setPinModeLvdsMedium() : IfxPort.c , IfxPort.h
  • IfxPort_setPinModeOutput() : IfxPort.h
  • IfxPort_setPinPadDriver() : IfxPort.h , IfxPort.c
  • IfxPort_setPinState() : IfxPort.h
  • IfxPort_togglePin() : IfxPort.h
  • IfxPsi5_disableModule() : IfxPsi5.c , IfxPsi5.h
  • IfxPsi5_enableAllChannels() : IfxPsi5.h
  • IfxPsi5_enableModule() : IfxPsi5.c , IfxPsi5.h
  • IfxPsi5_getSrcPointer() : IfxPsi5.h
  • IfxPsi5_getStatusCrci() : IfxPsi5.h
  • IfxPsi5_getStatusMei() : IfxPsi5.h
  • IfxPsi5_getStatusNbi() : IfxPsi5.h
  • IfxPsi5_getStatusNfi() : IfxPsi5.h
  • IfxPsi5_getStatusRdi() : IfxPsi5.h
  • IfxPsi5_getStatusRmi() : IfxPsi5.h
  • IfxPsi5_getStatusRsi() : IfxPsi5.h
  • IfxPsi5_getStatusTei() : IfxPsi5.h
  • IfxPsi5_initRxPin() : IfxPsi5.h
  • IfxPsi5_initTxPin() : IfxPsi5.h
  • IfxPsi5_isModuleSuspended() : IfxPsi5.h
  • IfxPsi5_Psi5_deInitModule() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_enableModule() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_getFracDivClock() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h
  • IfxPsi5_Psi5_initChannel() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_initChannelConfig() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h
  • IfxPsi5_Psi5_initializeClock() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_initModule() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_initModuleConfig() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_readChannelFrame() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_readChannelSerialMessage() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_resetModule() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h
  • IfxPsi5_Psi5_sendChannelData() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_startupChannel() : IfxPsi5_Psi5.h
  • IfxPsi5_resetModule() : IfxPsi5.c , IfxPsi5.h
  • IfxPsi5_setFractionalDivider() : IfxPsi5.h
  • IfxPsi5_setRxInput() : IfxPsi5.h
  • IfxPsi5_setSuspendMode() : IfxPsi5.h
  • IfxPsi5s_disableAscReceiver() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_disableModule() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_enableAscReceiver() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_enableDisableChannels() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_enableDisableChannelTriggerCounters() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_getReadFrameStatus() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_getSuccessfullyReceivedFrameStatus() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_initClkPin() : IfxPsi5s.h
  • IfxPsi5s_initRxPin() : IfxPsi5s.h
  • IfxPsi5s_initTxPin() : IfxPsi5s.h
  • IfxPsi5s_isModuleSuspended() : IfxPsi5s.h
  • IfxPsi5s_Psi5s_deInitModule() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_enableAscReceiver() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_enableDisableChannels() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_enableModule() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_getFracDivClock() : IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_getReadFrameStatus() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_initChannel() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_initChannelConfig() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_initializeClock() : IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_initModule() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_initModuleConfig() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_readFrame() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_resetModule() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_sendChannelData() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_setBaudrate() : IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_startAscTransactions() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_resetModule() : IfxPsi5s.c , IfxPsi5s.h
  • IfxPsi5s_setRxInput() : IfxPsi5s.h
  • IfxPsi5s_setSleepMode() : IfxPsi5s.h
  • IfxPsi5s_setSuspendMode() : IfxPsi5s.h
  • IfxPsi5s_startAscTransactions() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_stopAscTransactions() : IfxPsi5s.c , IfxPsi5s.h
  • IfxQspi_calcRealBaudrate() : IfxQspi.c , IfxQspi.h
  • IfxQspi_calculateBasicConfigurationValue() : IfxQspi.c , IfxQspi.h
  • IfxQspi_calculateDelayConstants() : IfxQspi.c , IfxQspi.h
  • IfxQspi_calculateExtendedConfigurationValue() : IfxQspi.c , IfxQspi.h
  • IfxQspi_calculatePrescaler() : IfxQspi.c , IfxQspi.h
  • IfxQspi_calculateTimeQuantumLength() : IfxQspi.h , IfxQspi.c
  • IfxQspi_clearAllEventFlags() : IfxQspi.h
  • IfxQspi_clearRxReq() : IfxQspi.h
  • IfxQspi_clearTxReq() : IfxQspi.h
  • IfxQspi_configPT1Event() : IfxQspi.h
  • IfxQspi_configPT2Event() : IfxQspi.h
  • IfxQspi_enableLoopbackMode() : IfxQspi.h
  • IfxQspi_enablePT1Event() : IfxQspi.h
  • IfxQspi_enablePT2Event() : IfxQspi.h
  • IfxQspi_enableUsrEvent() : IfxQspi.h
  • IfxQspi_getAddress() : IfxQspi.c , IfxQspi.h
  • IfxQspi_getErrorFlags() : IfxQspi.h
  • IfxQspi_getErrorSrc() : IfxQspi.h
  • IfxQspi_getIndex() : IfxQspi.c , IfxQspi.h
  • IfxQspi_getMode() : IfxQspi.h
  • IfxQspi_getModuleFrequency() : IfxQspi.h
  • IfxQspi_getPhase() : IfxQspi.h
  • IfxQspi_getReceiveFifoLevel() : IfxQspi.h
  • IfxQspi_getReceiveSrc() : IfxQspi.h
  • IfxQspi_getRxFifoMode() : IfxQspi.h
  • IfxQspi_getTimeQuantaFrequency() : IfxQspi.h
  • IfxQspi_getTransmitFifoLevel() : IfxQspi.h
  • IfxQspi_getTransmitSrc() : IfxQspi.h
  • IfxQspi_getTxFifoMode() : IfxQspi.h
  • IfxQspi_initMrstInPin() : IfxQspi.h
  • IfxQspi_initMrstInPinWithPadLevel() : IfxQspi.h
  • IfxQspi_initMrstOutPin() : IfxQspi.h
  • IfxQspi_initMtsrInPin() : IfxQspi.h
  • IfxQspi_initMtsrInPinWithPadLevel() : IfxQspi.h
  • IfxQspi_initMtsrOutPin() : IfxQspi.h
  • IfxQspi_initSclkInPin() : IfxQspi.h
  • IfxQspi_initSclkInPinWithPadLevel() : IfxQspi.h
  • IfxQspi_initSclkOutPin() : IfxQspi.h
  • IfxQspi_initSlsi() : IfxQspi.h
  • IfxQspi_initSlsiWithPadLevel() : IfxQspi.h
  • IfxQspi_initSlso() : IfxQspi.h
  • IfxQspi_isModuleEnabled() : IfxQspi.h
  • IfxQspi_isModuleSuspended() : IfxQspi.h
  • IfxQspi_pause() : IfxQspi.h
  • IfxQspi_permutateBigEndian() : IfxQspi.h
  • IfxQspi_read16() : IfxQspi.c , IfxQspi.h
  • IfxQspi_read32() : IfxQspi.h , IfxQspi.c
  • IfxQspi_read8() : IfxQspi.c , IfxQspi.h
  • IfxQspi_readReceiveFifo() : IfxQspi.h
  • IfxQspi_recalcBasicConfiguration() : IfxQspi.h , IfxQspi.c
  • IfxQspi_requestReset() : IfxQspi.h
  • IfxQspi_resetModule() : IfxQspi.h , IfxQspi.c
  • IfxQspi_run() : IfxQspi.h
  • IfxQspi_setBitsegment1() : IfxQspi.h
  • IfxQspi_setBitsegment2() : IfxQspi.h
  • IfxQspi_setBitsegment3() : IfxQspi.h
  • IfxQspi_setDisableModuleRequest() : IfxQspi.h
  • IfxQspi_setEnableModuleRequest() : IfxQspi.h
  • IfxQspi_setReceiveFifoInterrruptThreshold() : IfxQspi.h
  • IfxQspi_setRxFifoMode() : IfxQspi.h
  • IfxQspi_setSlaveSelectOutputControl() : IfxQspi.h , IfxQspi.c
  • IfxQspi_setSleepMode() : IfxQspi.h
  • IfxQspi_setSuspendMode() : IfxQspi.h
  • IfxQspi_setTimeQuantum() : IfxQspi.h
  • IfxQspi_setTransmitFifoInterrruptThreshold() : IfxQspi.h
  • IfxQspi_setTxFifoMode() : IfxQspi.h
  • IfxQspi_SpiMaster_activateSlso() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_activeChannel() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_deactivateSlso() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_exchange() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_getChannelConfig() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_getStatus() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_initChannel() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_initChannelConfig() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_initModule() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_initModuleConfig() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_isrDmaReceive() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_isrDmaTransmit() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_isrError() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_isrPhaseTransition() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_isrReceive() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_isrTransmit() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_isrUserDefined() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_lock() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_packLongModeBuffer() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_read() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_readReceiveFifo() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_setChannelBaudrate() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_unlock() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_write() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_writeBasicConfiguration() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_writeExtendedConfiguration() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_writeLong() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_writeMixedDataConfiguration() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_writeTransmitFifo() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiSlave_exchange() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_getStatus() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_initModule() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_initModuleConfig() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_isrDmaReceive() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_isrDmaTransmit() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_isrError() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_isrReceive() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_isrTransmit() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_read() : IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_readReceiveFifo() : IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_write() : IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_writeTransmitFifo() : IfxQspi_SpiSlave.h
  • IfxQspi_write16() : IfxQspi.h , IfxQspi.c
  • IfxQspi_write32() : IfxQspi.h , IfxQspi.c
  • IfxQspi_write8() : IfxQspi.h , IfxQspi.c
  • IfxQspi_writeBasicConfiguration() : IfxQspi.h
  • IfxQspi_writeBasicConfigurationBeginStream() : IfxQspi.h
  • IfxQspi_writeBasicConfigurationEndStream() : IfxQspi.h
  • IfxQspi_writeExtendedConfiguration() : IfxQspi.h
  • IfxQspi_writeMixedDataTransmitFifo() : IfxQspi.h
  • IfxQspi_writeTransmitFifo() : IfxQspi.h
  • IfxScuCcu_calculateSysPllDividers() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getBaud1Frequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getBaud2Frequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getBbbFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getCanFrequency() : IfxScuCcu.h
  • IfxScuCcu_getCpuFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getEvrFrequency() : IfxScuCcu.h
  • IfxScuCcu_getFsi2Frequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getFsiFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getGtmFrequency() : IfxScuCcu.h
  • IfxScuCcu_getMaxFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getModuleFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getOsc0Frequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getOscFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getPll2ErayFrequency() : IfxScuCcu.h
  • IfxScuCcu_getPll2Frequency() : IfxScuCcu.h
  • IfxScuCcu_getPllErayFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getPllErayVcoFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getPllFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getPllVcoFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getSourceFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getSourceSelection() : IfxScuCcu.h
  • IfxScuCcu_getSpbFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getSriFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getStmFrequency() : IfxScuCcu.h
  • IfxScuCcu_init() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_initConfig() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_initErayPll() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_initErayPllConfig() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_isOscillatorStable() : IfxScuCcu.c
  • IfxScuCcu_setCpuFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setGtmFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setPll2ErayFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setPll2Frequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setSpbFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setSriFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_switchToBackupClock() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_wait() : IfxScuCcu.c
  • IfxScuEru_clearAllEventFlags() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_clearEventFlag() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_clearInputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_clearOutputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_connectTrigger() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_disableAutoClear() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_disableFallingEdgeDetection() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_disablePatternDetectionTrigger() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_disableRisingEdgeDetection() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_disableTriggerPulse() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_enableAutoClear() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_enableFallingEdgeDetection() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_enablePatternDetectionTrigger() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_enableRisingEdgeDetection() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_enableTriggerPulse() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_getAllEventFlagsStatus() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_getEventFlagStatus() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_getInputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_getOutputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_getPatternDetectionResult() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_getWholePatternDetectionResult() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_initReqPin() : IfxScuEru.h
  • IfxScuEru_selectExternalInput() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_setEventFlag() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_setFlagPatternDetection() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_setInterruptGatingPattern() : IfxScuEru.c , IfxScuEru.h
  • IfxScuWdt_calculateLfsr() : IfxScuWdt.asm.h
  • IfxScuWdt_changeCpuWatchdogPassword() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_changeCpuWatchdogReload() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_changeSafetyWatchdogPassword() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_changeSafetyWatchdogReload() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_clearCpuEndinit() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_clearCpuEndinitInline() : IfxScuWdt.h
  • IfxScuWdt_clearSafetyEndinit() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_clearSafetyEndinitInline() : IfxScuWdt.h
  • IfxScuWdt_disableCpuWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_disableSafetyWatchdog() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_enableCpuWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_enableSafetyWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_enableWatchdogWithDebugger() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_getCpuWatchdogEndInit() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_getCpuWatchdogEndInitInline() : IfxScuWdt.h
  • IfxScuWdt_getCpuWatchdogPassword() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_getCpuWatchdogPasswordInline() : IfxScuWdt.h
  • IfxScuWdt_getSafetyWatchdogEndInit() : IfxScuWdt.h
  • IfxScuWdt_getSafetyWatchdogPassword() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_getSafetyWatchdogPasswordInline() : IfxScuWdt.h
  • IfxScuWdt_initConfig() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_initCpuWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_initSafetyWatchdog() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_serviceCpuWatchdog() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_serviceSafetyWatchdog() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_setCpuEndinit() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_setCpuEndinitInline() : IfxScuWdt.h
  • IfxScuWdt_setSafetyEndinit() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_setSafetyEndinitInline() : IfxScuWdt.h
  • IfxSent_clearInterruptStatus() : IfxSent.h
  • IfxSent_disableChannel() : IfxSent.h
  • IfxSent_disableModule() : IfxSent.h
  • IfxSent_enableChannel() : IfxSent.h
  • IfxSent_enableModule() : IfxSent.h
  • IfxSent_getAndClearInterruptStatus() : IfxSent.h
  • IfxSent_getChannelInterruptStatus() : IfxSent.h
  • IfxSent_getChannelSrc() : IfxSent.h
  • IfxSent_getChannelUnitTime() : IfxSent.h , IfxSent.c
  • IfxSent_getInterruptStatus() : IfxSent.h
  • IfxSent_getModuleClock() : IfxSent.c , IfxSent.h
  • IfxSent_initializeChannelUnitTime() : IfxSent.c , IfxSent.h
  • IfxSent_initializeModuleClock() : IfxSent.c , IfxSent.h
  • IfxSent_initSentPin() : IfxSent.h
  • IfxSent_initSpcPin() : IfxSent.h
  • IfxSent_isModuleEnabled() : IfxSent.h
  • IfxSent_isModuleSuspended() : IfxSent.h
  • IfxSent_readReceivedChannelStatus() : IfxSent.h
  • IfxSent_readReceivedCrc() : IfxSent.h
  • IfxSent_readReceivedData() : IfxSent.h
  • IfxSent_readReceivedStatus() : IfxSent.h
  • IfxSent_readReceivedStatusAndCommunicationNibble() : IfxSent.h
  • IfxSent_readReceivedTimeStamp() : IfxSent.h
  • IfxSent_readSpcDelayLength() : IfxSent.h
  • IfxSent_readSpcPulseLength() : IfxSent.h
  • IfxSent_resetModule() : IfxSent.h , IfxSent.c
  • IfxSent_Sent_deInitModule() : IfxSent_Sent.c , IfxSent_Sent.h
  • IfxSent_Sent_getAndClearInterruptStatus() : IfxSent_Sent.h
  • IfxSent_Sent_initChannel() : IfxSent_Sent.c , IfxSent_Sent.h
  • IfxSent_Sent_initChannelConfig() : IfxSent_Sent.h , IfxSent_Sent.c
  • IfxSent_Sent_initModule() : IfxSent_Sent.c , IfxSent_Sent.h
  • IfxSent_Sent_initModuleConfig() : IfxSent_Sent.c , IfxSent_Sent.h
  • IfxSent_Sent_readChannelSerialDataFrame() : IfxSent_Sent.h , IfxSent_Sent.c
  • IfxSent_Sent_readChannelSerialMessageFrame() : IfxSent_Sent.c , IfxSent_Sent.h
  • IfxSent_setAltiInput() : IfxSent.h
  • IfxSent_setChannelFractionalDivider() : IfxSent.h
  • IfxSent_setChannelPreDivider() : IfxSent.h
  • IfxSent_setSleepMode() : IfxSent.h
  • IfxSent_setSuspendMode() : IfxSent.h
  • IfxSent_setTimeStampPredivider() : IfxSent.h
  • IfxSent_setWatchDogTimerLimit() : IfxSent.h
  • IfxSmu_activateFsp() : IfxSmu.h
  • IfxSmu_activatePes() : IfxSmu.h
  • IfxSmu_clearAlarm() : IfxSmu.h , IfxSmu.c
  • IfxSmu_cmd() : IfxSmu.h , IfxSmu.c
  • IfxSmu_enableAlarmFsp() : IfxSmu.h , IfxSmu.c
  • IfxSmu_enableClearAlarmStatus() : IfxSmu.h
  • IfxSmu_getAlarm() : IfxSmu.h , IfxSmu.c
  • IfxSmu_getFspFaultFreeFrequency() : IfxSmu.c , IfxSmu.h
  • IfxSmu_getFspFaultStateTime() : IfxSmu.c , IfxSmu.h
  • IfxSmu_initFsp() : IfxSmu.h , IfxSmu.c
  • IfxSmu_initFspConfig() : IfxSmu.h
  • IfxSmu_isAlarmSet() : IfxSmu.h , IfxSmu.c
  • IfxSmu_lock() : IfxSmu.h , IfxSmu.c
  • IfxSmu_lockForever() : IfxSmu.h , IfxSmu.c
  • IfxSmu_releaseFsp() : IfxSmu.h
  • IfxSmu_setAlarmConfig() : IfxSmu.h , IfxSmu.c
  • IfxSmu_start() : IfxSmu.h
  • IfxSmu_stopRecoveryTimer() : IfxSmu.h
  • IfxSmu_triggerAlarm() : IfxSmu.h
  • IfxSmu_unlock() : IfxSmu.c , IfxSmu.h
  • IfxSrc_clearOverrun() : IfxSrc.h
  • IfxSrc_clearRequest() : IfxSrc.h
  • IfxSrc_deinit() : IfxSrc.h
  • IfxSrc_disable() : IfxSrc.h
  • IfxSrc_enable() : IfxSrc.h
  • IfxSrc_init() : IfxSrc.h
  • IfxSrc_isOverrun() : IfxSrc.h
  • IfxSrc_isRequested() : IfxSrc.h
  • IfxSrc_setRequest() : IfxSrc.h
  • IfxStdIf_DPipe_canReadCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_canWriteCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_clearRx() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_clearTx() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_flushTx() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getReadCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getReadEvent() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getSendCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getTxTimeStamp() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getWriteCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getWriteEvent() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_onError() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_onReceive() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_onTransmit() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_print() : IfxStdIf_DPipe.h , IfxStdIf_DPipe.c
  • IfxStdIf_DPipe_read() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_resetSendCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_write() : IfxStdIf_DPipe.h
  • IfxStdIf_Pos_getAbsolutePosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getDirection() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getFault() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getOffset() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getPeriodPerRotation() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getPosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getRawPosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getRefreshPeriod() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getResolution() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getSensorType() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getSpeed() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getTurn() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_initConfig() : IfxStdIf_Pos.h , IfxStdIf_Pos.c
  • IfxStdIf_Pos_isFault() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_onEventA() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_onZeroIrq() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_printStatus() : IfxStdIf_Pos.h , IfxStdIf_Pos.c
  • IfxStdIf_Pos_radsToRpm() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_reset() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_resetFaults() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_rpmToRads() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setOffset() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setPosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setRawPosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setRefreshPeriod() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setSpeed() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_update() : IfxStdIf_Pos.h
  • IfxStdIf_PwmHl_getDeadtime() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_getDeadtimetick() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_getMinPulse() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_getMode() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_getTimer() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_initConfig() : IfxStdIf_PwmHl.h , IfxStdIf_PwmHl.c
  • IfxStdIf_PwmHl_setDeadtime() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setMinPulse() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setMode() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setOnTime() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setOnTimeAndShift() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setPulse() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setupChannels() : IfxStdIf_PwmHl.h
  • IfxStdIf_Timer_ackTimerIrq() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_ackTriggerIrq() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_applyUpdate() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_disableUpdate() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getFrequency() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getInputFrequency() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getPeriod() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getPeriodSecond() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getResolution() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getTrigger() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_initConfig() : IfxStdIf_Timer.h , IfxStdIf_Timer.c
  • IfxStdIf_Timer_initStdIf() : IfxStdIf_Timer.h , IfxStdIf_Timer.c
  • IfxStdIf_Timer_run() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_setFrequency() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_setPeriod() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_setSingleMode() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_setTrigger() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_stop() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_sToTick() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_tickToS() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_updateInputFrequency() : IfxStdIf_Timer.h
  • IfxStm_clearCompareFlag() : IfxStm.h , IfxStm.c
  • IfxStm_disableComparatorInterrupt() : IfxStm.c , IfxStm.h
  • IfxStm_disableModule() : IfxStm.h , IfxStm.c
  • IfxStm_enableComparatorInterrupt() : IfxStm.c , IfxStm.h
  • IfxStm_enableOcdsSuspend() : IfxStm.c , IfxStm.h
  • IfxStm_get() : IfxStm.h
  • IfxStm_getAddress() : IfxStm.h , IfxStm.c
  • IfxStm_getCompare() : IfxStm.h
  • IfxStm_getDeadLine() : IfxStm.h
  • IfxStm_getFrequency() : IfxStm.h
  • IfxStm_getIndex() : IfxStm.c , IfxStm.h
  • IfxStm_getLower() : IfxStm.h
  • IfxStm_getOffset12Timer() : IfxStm.h
  • IfxStm_getOffset16Timer() : IfxStm.h
  • IfxStm_getOffset20Timer() : IfxStm.h
  • IfxStm_getOffset32Timer() : IfxStm.h
  • IfxStm_getOffset4Timer() : IfxStm.h
  • IfxStm_getOffset8Timer() : IfxStm.h
  • IfxStm_getOffsetTimer() : IfxStm.h
  • IfxStm_getSrcPointer() : IfxStm.c , IfxStm.h
  • IfxStm_getTicksFromMicroseconds() : IfxStm.h
  • IfxStm_getTicksFromMilliseconds() : IfxStm.h
  • IfxStm_increaseCompare() : IfxStm.h
  • IfxStm_initCompare() : IfxStm.c , IfxStm.h
  • IfxStm_initCompareConfig() : IfxStm.c , IfxStm.h
  • IfxStm_isCompareFlagSet() : IfxStm.c , IfxStm.h
  • IfxStm_isDeadLine() : IfxStm.h
  • IfxStm_isModuleSuspended() : IfxStm.h
  • IfxStm_now() : IfxStm.h
  • IfxStm_resetModule() : IfxStm.c , IfxStm.h
  • IfxStm_setCompareControl() : IfxStm.h , IfxStm.c
  • IfxStm_setSleepMode() : IfxStm.h
  • IfxStm_setSuspendMode() : IfxStm.h
  • IfxStm_Timer_acknowledgeTimerIrq() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_getFrequency() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_getInputFrequency() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_getPeriod() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_getResolution() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_init() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_initConfig() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_run() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_setFrequency() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_setPeriod() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_setSingleMode() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_stdIfTimerInit() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_stop() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_updateInputFrequency() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_updateCompare() : IfxStm.h
  • IfxStm_wait() : IfxStm.h
  • IfxStm_waitTicks() : IfxStm.h
  • IfxVadc_Adc_addToQueue() : IfxVadc_Adc.h
  • IfxVadc_Adc_clearQueue() : IfxVadc_Adc.h
  • IfxVadc_Adc_configureWaitForReadMode() : IfxVadc_Adc.h
  • IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister() : IfxVadc_Adc.h
  • IfxVadc_Adc_deInitGroup() : IfxVadc_Adc.h , IfxVadc_Adc.c
  • IfxVadc_Adc_deInitModule() : IfxVadc_Adc.h
  • IfxVadc_Adc_disableModule() : IfxVadc_Adc.h , IfxVadc_Adc.c
  • IfxVadc_Adc_getBackgroundScanStatus() : IfxVadc_Adc.h
  • IfxVadc_Adc_getChannelConfig() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_getChannelConversionTime() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_getDebugResult() : IfxVadc_Adc.h
  • IfxVadc_Adc_getGlobalResult() : IfxVadc_Adc.h
  • IfxVadc_Adc_getGroupConfig() : IfxVadc_Adc.h , IfxVadc_Adc.c
  • IfxVadc_Adc_getGroupRegsFromGroup() : IfxVadc_Adc.h
  • IfxVadc_Adc_getGroupResult() : IfxVadc_Adc.h
  • IfxVadc_Adc_getMasterId() : IfxVadc_Adc.c
  • IfxVadc_Adc_getMasterKernelIndex() : IfxVadc_Adc.c
  • IfxVadc_Adc_getModuleConfig() : IfxVadc_Adc.h
  • IfxVadc_Adc_getQueueStatus() : IfxVadc_Adc.h
  • IfxVadc_Adc_getResult() : IfxVadc_Adc.h
  • IfxVadc_Adc_getResultBasedOnRequestSource() : IfxVadc_Adc.h
  • IfxVadc_Adc_getScanStatus() : IfxVadc_Adc.h
  • IfxVadc_Adc_getVadcFromGroup() : IfxVadc_Adc.h
  • IfxVadc_Adc_initChannel() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_initChannelConfig() : IfxVadc_Adc.h , IfxVadc_Adc.c
  • IfxVadc_Adc_initExternalMultiplexerMode() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_initExternalMultiplexerModeConfig() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_initGroup() : IfxVadc_Adc.h , IfxVadc_Adc.c
  • IfxVadc_Adc_initGroupConfig() : IfxVadc_Adc.h , IfxVadc_Adc.c
  • IfxVadc_Adc_initModule() : IfxVadc_Adc.h , IfxVadc_Adc.c
  • IfxVadc_Adc_initModuleConfig() : IfxVadc_Adc.h , IfxVadc_Adc.c
  • IfxVadc_Adc_setBackgroundScan() : IfxVadc_Adc.h
  • IfxVadc_Adc_setScan() : IfxVadc_Adc.h
  • IfxVadc_Adc_startBackgroundScan() : IfxVadc_Adc.h
  • IfxVadc_Adc_startQueue() : IfxVadc_Adc.h
  • IfxVadc_Adc_startScan() : IfxVadc_Adc.h
  • IfxVadc_addToQueue() : IfxVadc.h
  • IfxVadc_calculateSampleTime() : IfxVadc.h
  • IfxVadc_clearAllResultRequests() : IfxVadc.h
  • IfxVadc_clearChannelRequest() : IfxVadc.h
  • IfxVadc_clearQueue() : IfxVadc.h
  • IfxVadc_configExternalMultiplexerMode() : IfxVadc.h , IfxVadc.c
  • IfxVadc_configureWaitForReadMode() : IfxVadc.h
  • IfxVadc_configureWaitForReadModeForGlobalResultRegister() : IfxVadc.h
  • IfxVadc_disableAccess() : IfxVadc.c , IfxVadc.h
  • IfxVadc_disableModule() : IfxVadc.h
  • IfxVadc_disablePostCalibration() : IfxVadc.c , IfxVadc.h
  • IfxVadc_disableQueueSlotExternalTrigger() : IfxVadc.h
  • IfxVadc_disableScanSlotExternalTrigger() : IfxVadc.h
  • IfxVadc_enableAccess() : IfxVadc.h , IfxVadc.c
  • IfxVadc_enableBackgroundScanSlotExternalTrigger() : IfxVadc.h
  • IfxVadc_enableFifoMode() : IfxVadc.h
  • IfxVadc_enableGroupSync() : IfxVadc.h , IfxVadc.c
  • IfxVadc_enableModule() : IfxVadc.h
  • IfxVadc_enableQueueSlotExternalTrigger() : IfxVadc.h
  • IfxVadc_enableScanSlotExternalTrigger() : IfxVadc.h
  • IfxVadc_enableServiceRequest() : IfxVadc.h
  • IfxVadc_getAdcAnalogFrequency() : IfxVadc.h , IfxVadc.c
  • IfxVadc_getAdcCalibrationActiveState() : IfxVadc.h
  • IfxVadc_getAdcDigitalFrequency() : IfxVadc.h , IfxVadc.c
  • IfxVadc_getAdcModuleFrequency() : IfxVadc.c , IfxVadc.h
  • IfxVadc_getArbiterRoundLength() : IfxVadc.h
  • IfxVadc_getAssignedChannels() : IfxVadc.h
  • IfxVadc_getBackgroundScanGatingMode() : IfxVadc.h
  • IfxVadc_getBackgroundScanGatingSource() : IfxVadc.h
  • IfxVadc_getBackgroundScanSlotPriority() : IfxVadc.h
  • IfxVadc_getBackgroundScanSlotStartMode() : IfxVadc.h
  • IfxVadc_getBackgroundScanStatus() : IfxVadc.h , IfxVadc.c
  • IfxVadc_getBackgroundScanTriggerInput() : IfxVadc.h
  • IfxVadc_getBackgroundScanTriggerMode() : IfxVadc.h
  • IfxVadc_getChannelControlConfig() : IfxVadc.h
  • IfxVadc_getChannelConversionTime() : IfxVadc.h , IfxVadc.c
  • IfxVadc_getChannelInputClass() : IfxVadc.h
  • IfxVadc_getChannelResultServiceRequestNodePointer0() : IfxVadc.h
  • IfxVadc_getChannelResultServiceRequestNodePointer1() : IfxVadc.h
  • IfxVadc_getChannelServiceRequestNodePointer0() : IfxVadc.h
  • IfxVadc_getChannelServiceRequestNodePointer1() : IfxVadc.h
  • IfxVadc_getDebugResult() : IfxVadc.h
  • IfxVadc_getEmuxGlobalResolution() : IfxVadc.h
  • IfxVadc_getEmuxGlobalSampleTime() : IfxVadc.h
  • IfxVadc_getEmuxGroupResolution() : IfxVadc.h
  • IfxVadc_getEmuxGroupSampleTime() : IfxVadc.h
  • IfxVadc_getGlobalConfigValue() : IfxVadc.h
  • IfxVadc_getGlobalResolution() : IfxVadc.h
  • IfxVadc_getGlobalResult() : IfxVadc.h
  • IfxVadc_getGlobalSampleTime() : IfxVadc.h
  • IfxVadc_getGroupResolution() : IfxVadc.h
  • IfxVadc_getGroupResult() : IfxVadc.h
  • IfxVadc_getGroupSampleTime() : IfxVadc.h
  • IfxVadc_getMasterIndex() : IfxVadc.h
  • IfxVadc_getQueueSlotGatingMode() : IfxVadc.h
  • IfxVadc_getQueueSlotGatingSource() : IfxVadc.h
  • IfxVadc_getQueueSlotPriority() : IfxVadc.h
  • IfxVadc_getQueueSlotStartMode() : IfxVadc.h
  • IfxVadc_getQueueSlotTriggerInput() : IfxVadc.h
  • IfxVadc_getQueueSlotTriggerMode() : IfxVadc.h
  • IfxVadc_getQueueStatus() : IfxVadc.h , IfxVadc.c
  • IfxVadc_getResult() : IfxVadc.h
  • IfxVadc_getResultBasedOnRequestSource() : IfxVadc.h , IfxVadc.c
  • IfxVadc_getScanSlotGatingMode() : IfxVadc.h
  • IfxVadc_getScanSlotGatingSource() : IfxVadc.h
  • IfxVadc_getScanSlotPriority() : IfxVadc.h
  • IfxVadc_getScanSlotStartMode() : IfxVadc.h
  • IfxVadc_getScanSlotTriggerInput() : IfxVadc.h
  • IfxVadc_getScanSlotTriggerMode() : IfxVadc.h
  • IfxVadc_getScanStatus() : IfxVadc.h , IfxVadc.c
  • IfxVadc_getSrcAddress() : IfxVadc.h , IfxVadc.c
  • IfxVadc_getStartupCalibration() : IfxVadc.h
  • IfxVadc_initEmuxPin() : IfxVadc.h
  • IfxVadc_initGxBflPin() : IfxVadc.h
  • IfxVadc_initialiseAdcArbiterClock() : IfxVadc.h , IfxVadc.c
  • IfxVadc_initialiseAdcConverterClock() : IfxVadc.h , IfxVadc.c
  • IfxVadc_initializeFAdcD() : IfxVadc.h , IfxVadc.c
  • IfxVadc_initializeFAdcI() : IfxVadc.c , IfxVadc.h
  • IfxVadc_initiateStartupCalibration() : IfxVadc.h
  • IfxVadc_isAutoBackgroundScanEnabled() : IfxVadc.h
  • IfxVadc_isAutoScanEnabled() : IfxVadc.h
  • IfxVadc_isPostCalibration() : IfxVadc.c , IfxVadc.h
  • IfxVadc_isRequestBackgroundScanSlotEnabled() : IfxVadc.h
  • IfxVadc_isRequestQueueSlotEnabled() : IfxVadc.h
  • IfxVadc_isRequestScanSlotEnabled() : IfxVadc.h
  • IfxVadc_resetGroup() : IfxVadc.h
  • IfxVadc_resetKernel() : IfxVadc.c , IfxVadc.h
  • IfxVadc_selectPowerSupplyVoltage() : IfxVadc.c , IfxVadc.h
  • IfxVadc_setAnalogConvertControl() : IfxVadc.h
  • IfxVadc_setArbiterPriority() : IfxVadc.h , IfxVadc.c
  • IfxVadc_setArbitrationRoundLength() : IfxVadc.h
  • IfxVadc_setAutoBackgroundScan() : IfxVadc.h
  • IfxVadc_setAutoScan() : IfxVadc.h
  • IfxVadc_setBackgroundPriorityChannel() : IfxVadc.h
  • IfxVadc_setBackgroundResultTarget() : IfxVadc.h
  • IfxVadc_setBackgroundScan() : IfxVadc.h
  • IfxVadc_setBackgroundScanSlotGatingConfig() : IfxVadc.h
  • IfxVadc_setBackgroundScanSlotTriggerConfig() : IfxVadc.h
  • IfxVadc_setBoundaryMode() : IfxVadc.h
  • IfxVadc_setChannelEventNodePointer0() : IfxVadc.h
  • IfxVadc_setChannelEventNodePointer1() : IfxVadc.h
  • IfxVadc_setChannelInputClass() : IfxVadc.h
  • IfxVadc_setChannelLimitCheckMode() : IfxVadc.h
  • IfxVadc_setEmuxGlobalResolution() : IfxVadc.h
  • IfxVadc_setEmuxGlobalSampleTime() : IfxVadc.h
  • IfxVadc_setEmuxGroupResolution() : IfxVadc.h
  • IfxVadc_setEmuxGroupSampletime() : IfxVadc.h
  • IfxVadc_setEmuxInterfaceForGroup() : IfxVadc.h
  • IfxVadc_setGlobalResolution() : IfxVadc.h
  • IfxVadc_setGlobalSampleTime() : IfxVadc.h
  • IfxVadc_setGroupPriorityChannel() : IfxVadc.h
  • IfxVadc_setGroupResolution() : IfxVadc.h
  • IfxVadc_setGroupSampleTime() : IfxVadc.h
  • IfxVadc_setLowerBoundary() : IfxVadc.h
  • IfxVadc_setMasterIndex() : IfxVadc.h
  • IfxVadc_setQueueSlotGatingConfig() : IfxVadc.h
  • IfxVadc_setQueueSlotTriggerOperatingConfig() : IfxVadc.h
  • IfxVadc_setReferenceInput() : IfxVadc.h
  • IfxVadc_setResultNodeEventPointer0() : IfxVadc.h
  • IfxVadc_setResultNodeEventPointer1() : IfxVadc.h
  • IfxVadc_setResultPosition() : IfxVadc.h
  • IfxVadc_setScan() : IfxVadc.c , IfxVadc.h
  • IfxVadc_setScanSlotGatingConfig() : IfxVadc.h
  • IfxVadc_setScanSlotTriggerConfig() : IfxVadc.h
  • IfxVadc_setSleepMode() : IfxVadc.h
  • IfxVadc_setSyncRequest() : IfxVadc.h
  • IfxVadc_setUpperBoundary() : IfxVadc.h
  • IfxVadc_startBackgroundScan() : IfxVadc.h
  • IfxVadc_startQueue() : IfxVadc.h
  • IfxVadc_startScan() : IfxVadc.h
  • IfxVadc_startupCalibration() : IfxVadc.h , IfxVadc.c
  • IfxVadc_storeGroupResult() : IfxVadc.h
  • initTime() : Bsp.h
  • isDeadLine() : Bsp.h


iLLD_TC26B: Globals

- n -

  • now() : Bsp.h
  • nowWithoutCriticalSection() : Bsp.h


iLLD_TC26B: Globals

- p -

  • poll() : Bsp.h


iLLD_TC26B: Globals

- r -

  • restoreInterrupts() : Bsp.h
  • round_f() : Ifx_AngleTrkF32.c


iLLD_TC26B: Globals

- s -

  • SpiIf_exchange() : SpiIf.h
  • SpiIf_getStatus() : SpiIf.h
  • SpiIf_initChannelConfig() : SpiIf.h , SpiIf.c
  • SpiIf_initConfig() : SpiIf.h , SpiIf.c
  • SpiIf_wait() : SpiIf.h


iLLD_TC26B: Globals

- t -

  • timingNoInterruptEnd() : Bsp.h
  • timingNoInterruptStart() : Bsp.h


iLLD_TC26B: Globals

- v -

  • VecAvg_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecGain_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • VecHalfSwap_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMax_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • VecMaxIdx_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMin_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMinIdx_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecOfs_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecPwrdB_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecPwrdB_SF() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecSum_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecWin_f32() : Ifx_Cf32.h , Ifx_Cf32.c


iLLD_TC26B: Globals

- w -

  • wait() : Bsp.h
  • waitPoll() : Bsp.c , Bsp.h
  • waitTime() : Bsp.c , Bsp.h


iLLD_TC26B: Globals

- $ -

  • $ $sb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h


iLLD_TC26B: Globals

- a -

  • abs : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • absdif : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • abss : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • adds : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • Assert_level : Assert.c


iLLD_TC26B: Globals

- b -

  • bisr : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • BootModeHeader_0 : IfxCpu_CStart0.c
  • BootModeHeader_1 : IfxCpu_CStart0.c


iLLD_TC26B: Globals

- c -

  • clo : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • cls : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • clz : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

- d -

  • debug : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • disable : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • dsync : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

- e -

  • enable : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • extr : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h


iLLD_TC26B: Globals

- g -

  • g_DateTimeOffset : Ifx_DateTime.c


iLLD_TC26B: Globals

- h -

  • h : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h


iLLD_TC26B: Globals

- i -

  • Ifx_g_console : Ifx_Console.c , Ifx_Console.h
  • Ifx_g_FftF32_bitReverseTable : Ifx_FftF32_BitReverseTable.c , Ifx_FftF32.h
  • Ifx_g_FftF32_twiddleTable : Ifx_FftF32.h , Ifx_FftF32_TwiddleTable.c
  • Ifx_g_LutAtan2F32_FxpAngle_table : Ifx_LutAtan2F32_Table.c , Ifx_LutAtan2F32.h
  • Ifx_g_LutAtan2F32_table : Ifx_LutAtan2F32.h , Ifx_LutAtan2F32_Table.c
  • Ifx_g_LutLSincosF32 : Ifx_LutLSincosF32.c , Ifx_LutLSincosF32.h
  • Ifx_g_LutLSincosF32_table : Ifx_LutLSincosF32.c
  • Ifx_g_LutSincosF32_table : Ifx_LutSincosF32.h , Ifx_LutSincosF32_Table.c
  • Ifx_g_WndF32_blackmanHarrisTable : Ifx_WndF32.h , Ifx_WndF32_BlackmanHarrisTable.c
  • Ifx_g_WndF32_hannTable : Ifx_WndF32.h , Ifx_WndF32_HannTable.c
  • Ifx_Shell_cmdBuffer : Ifx_Shell.c
  • IfxAsclin0_CTSA_P14_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_RTS_P14_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_RXA_P14_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_RXB_P15_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_SCLK_P14_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_SCLK_P15_2_OUT : IfxAsclin_PinMap.h , IfxAsclin_PinMap.c
  • IfxAsclin0_TX_P14_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_TX_P14_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_TX_P15_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_TX_P15_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_CTSA_P20_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_CTSB_P32_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RTS_P20_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RTS_P23_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXA_P15_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXB_P15_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXC_P20_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXD_P14_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXE_P11_10_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXF_P33_13_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXG_P02_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SCLK_P15_0_OUT : IfxAsclin_PinMap.h , IfxAsclin_PinMap.c
  • IfxAsclin1_SCLK_P20_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SCLK_P33_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SCLK_P33_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SLSO_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SLSO_P20_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SLSO_P33_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P02_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P11_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P14_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P15_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P15_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P15_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P15_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P20_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P33_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P33_13_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_CTSA_P10_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_CTSB_P33_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RTS_P10_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RTS_P33_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXA_P14_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXB_P02_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXD_P10_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXE_P33_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXG_P02_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P02_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P10_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P14_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P33_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P33_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SLSO_P02_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SLSO_P10_5_OUT : IfxAsclin_PinMap.h , IfxAsclin_PinMap.c
  • IfxAsclin2_SLSO_P33_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P02_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P10_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P14_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P33_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P33_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_CTSA_P00_12_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RTS_P00_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXA_P15_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXC_P20_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXD_P32_2_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXE_P00_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXF_P21_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P00_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P00_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P15_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P15_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P20_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P21_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P21_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P32_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P33_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P00_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P21_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P21_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P33_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P00_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P00_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P15_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P15_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P20_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P20_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P21_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P32_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P32_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_cfg_indexMap : IfxAsclin_cfg.c , IfxAsclin_cfg.h
  • IfxAsclin_Cts_In_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_Rts_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_Rx_In_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_Sclk_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_Slso_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_Tx_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxCcu60_CC60_P02_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60_P02_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60_P11_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60_P15_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60INA_P02_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60INB_P00_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60INC_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61_P02_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61_P02_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61_P11_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61_P15_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61INA_P02_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61INB_P00_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61INC_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62_P02_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62_P02_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62_P11_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62_P15_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62INA_P02_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62INB_P00_5_IN : IfxCcu6_PinMap.h , IfxCcu6_PinMap.c
  • IfxCcu60_CC62INC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS0A_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS0C_P10_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS0D_P40_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS1A_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS1B_P40_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS1C_P10_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS1D_P40_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS2A_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS2B_P40_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS2C_P10_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT60_P02_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT60_P11_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT60_P15_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT61_P02_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT61_P11_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT61_P15_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT62_P02_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT62_P11_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT62_P14_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT63_P00_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT63_P11_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT63_P14_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT63_P32_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CTRAPA_P00_11_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T12HRB_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T12HRC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T12HRE_P00_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T13HRB_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T13HRC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60_P00_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60_P00_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60_P20_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60_P33_13_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60INA_P00_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60INB_P02_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60INC_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61_P00_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61_P00_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61_P20_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61_P33_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61INA_P00_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61INB_P02_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61INC_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62_P00_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62_P00_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62_P20_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62_P33_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62INA_P00_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62INB_P02_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62INC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS0A_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS0C_P33_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS1A_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS1B_P40_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS1C_P33_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS1D_P40_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS2A_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS2B_P40_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS2C_P33_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS2D_P40_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT60_P00_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT60_P20_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT60_P33_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT61_P00_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT61_P20_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT61_P33_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT62_P00_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT62_P20_13_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT62_P33_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT63_P00_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT63_P00_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT63_P20_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CTRAPA_P00_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CTRAPC_P33_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T12HRB_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T12HRC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T12HRE_P00_11_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T13HRB_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T13HRC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc60_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc60in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc61_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc61in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc62_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc62in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Ccpos0_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Ccpos1_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Ccpos2_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_cfg_indexMap : IfxCcu6_cfg.c , IfxCcu6_cfg.h
  • IfxCcu6_Cout60_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cout61_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cout62_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cout63_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Ctrap_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_PwmHl_modes : IfxCcu6_PwmHl.c
  • IfxCcu6_T12hr_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_T13hr_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCif_CLK_P00_7_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D0_P02_0_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D10_P00_1_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D11_P00_2_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D12_P00_3_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D13_P00_4_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D14_P00_5_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D15_P00_6_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D1_P02_1_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D2_P02_2_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D3_P02_3_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D4_P02_4_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D5_P02_5_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D6_P02_6_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D7_P02_7_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D8_P02_8_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D9_P00_0_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_HSNC_P00_9_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_VSNC_P00_8_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCpu_cfg_indexMap : IfxCpu_cfg.c , IfxCpu_cfg.h
  • IfxDsadc_Cgpwm_Out_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMN_P00_5_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMN_P02_0_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMN_P33_11_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMP_P00_6_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMP_P02_1_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMP_P33_12_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CIN0A_P00_1_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CIN0B_P33_5_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CIN2A_P00_5_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CIN2B_P33_1_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CIN3A_P00_3_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CIN3B_P02_7_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Cin_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT0_P00_11_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT0_P00_1_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT0_P33_5_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT2_P00_5_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT2_P33_1_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT3_P00_3_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT3_P02_7_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Cout_Out_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN0A_P00_2_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN0B_P33_6_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN2A_P00_6_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN2B_P33_2_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN3A_P00_4_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN3B_P02_8_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Din_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS0NA_AN3_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS0NB_AN1_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS0PA_AN2_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS0PB_AN0_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS2NA_AN21_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS2PA_AN20_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3NA_AN37_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3NA_P40_7_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3NB_AN39_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3NB_P40_9_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3NC_AN45_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3ND_AN47_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PA_AN36_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PA_P40_6_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PB_AN38_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PB_P40_8_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PC_AN44_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PD_AN46_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Dsn_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Dsp_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ITR0E_P33_0_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ITR0F_P33_4_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ITR2E_P33_2_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ITR2F_P33_6_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ITR3E_P02_8_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ITR3F_P00_9_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Itr_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Rdc_GtmTimCfg : IfxDsadc_Rdc.c
  • IfxDsadc_Sg_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_SGNA_P00_4_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_SGNB_P33_13_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxEray0_RXDA0_P14_8_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDA1_P11_9_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDA2_P02_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDA3_P14_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDB0_P14_7_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDB1_P11_10_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDB2_P02_3_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDB3_P14_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDA_P02_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDA_P11_3_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDA_P14_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDA_P14_10_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDB_P02_2_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDB_P11_12_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDB_P14_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDB_P14_5_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENA_P02_4_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENA_P11_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENA_P14_9_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P02_5_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P11_11_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P11_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P14_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P14_9_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray_cfg_indexMap : IfxEray_cfg.c , IfxEray_cfg.h
  • IfxEray_Rxd_In_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray_Txd_Out_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray_Txen_Out_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEth_Crsdv_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_CRSDVA_P11_11_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_Mdc_Out_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDC_P02_8_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDC_P21_0_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDC_P21_2_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_Mdio_InOut_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDIO_P21_1_INOUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDIOA_P00_0_INOUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDIOD_P21_3_INOUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_Phy_Pef7071_iPhyInitDone : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_Refclk_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_REFCLK_P11_12_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_rxBuffer : IfxEth.c , IfxEth.h
  • IfxEth_Rxclk_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_RXCLKA_P11_12_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_RXD0_P11_10_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_RXD1_P11_9_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_Rxd_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_rxDescr : IfxEth.c , IfxEth.h
  • IfxEth_Rxer_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_RXERB_P21_7_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_txBuffer : IfxEth.c , IfxEth.h
  • IfxEth_Txclk_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_TXCLKB_P11_12_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_TXD0_P11_3_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_TXD1_P11_2_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_Txd_Out_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_txDescr : IfxEth.c , IfxEth.h
  • IfxEth_Txen_Out_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_TXEN_P11_6_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxFft_Fft_dummy256 : IfxFft_Fft.c
  • IfxFlash_dFlashTableEepLog : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_dFlashTablePhys : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_dFlashTableUcbLog : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_pFlashTableLog : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_pFlashTablePhys : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxGpt120_CAPINA_P13_2_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T2EUDA_P00_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T2EUDB_P33_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T2INA_P00_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T2INB_P33_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3EUDA_P02_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3EUDB_P10_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3INA_P02_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3INB_P10_4_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3OUT_P10_6_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3OUT_P21_6_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T4EUDA_P00_9_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T4EUDB_P33_5_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T4INA_P02_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T4INB_P10_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T5EUDA_P21_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T5EUDB_P10_1_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T5INA_P21_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T5INB_P10_3_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6EUDA_P20_0_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6EUDB_P10_0_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6INA_P20_3_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6INB_P10_2_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6OUT_P10_5_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6OUT_P21_7_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt12_Capin_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt12_TxEud_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt12_TxIn_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt12_TxOut_Out_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGtm_ATOM0_0_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_Atom_PwmHl_modes : IfxGtm_Atom_PwmHl.c
  • IfxGtm_CLK0_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_CLK1_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_CLK2_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN0_P02_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN109_P10_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN18_P00_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN26_P33_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN32_P33_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN34_P33_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN48_P22_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN53_P21_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN77_P15_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN85_P14_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN87_P14_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN8_P02_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN9_P00_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN103_P10_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN10_P00_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN11_P00_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN19_P00_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN1_P02_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN27_P33_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN31_P33_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN35_P33_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN47_P22_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN54_P21_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN78_P15_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN86_P14_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN104_P10_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN107_P10_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN20_P00_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN28_P33_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN2_P02_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN33_P33_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN36_P32_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN46_P23_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN55_P21_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN79_P15_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN105_P10_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN108_P10_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN21_P00_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN29_P33_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN38_P32_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN3_P02_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN49_P22_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN51_P21_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN56_P21_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN60_P20_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN80_P14_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN102_P10_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN22_P33_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN30_P33_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN39_P32_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN4_P02_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN50_P22_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN52_P21_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN57_P21_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN61_P20_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN81_P14_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN110_P10_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN23_P33_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN40_P32_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN41_P23_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN58_P21_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN5_P02_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN82_P14_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN106_P10_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN24_P33_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN42_P23_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN43_P23_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN59_P20_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN62_P20_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN83_P14_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN25_P33_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN44_P23_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN45_P23_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN63_P20_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN64_P20_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN7_P02_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN84_P14_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN0_P02_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN109_P10_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN18_P00_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN26_P33_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN32_P33_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN48_P22_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN53_P21_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN68_P20_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN76_P15_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN77_P15_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN85_P14_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN87_P14_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN94_P13_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN103_P10_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN19_P00_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN1_P02_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN27_P33_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN31_P33_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN47_P22_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN54_P21_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN69_P20_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN78_P15_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN86_P14_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN95_P11_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN104_P10_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN107_P10_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN12_P00_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN20_P00_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN28_P33_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN2_P02_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN33_P33_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN46_P23_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN55_P21_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN70_P20_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN79_P15_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN96_P11_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN105_P10_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN108_P10_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN13_P00_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN21_P00_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN29_P33_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN38_P32_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN3_P02_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN49_P22_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN56_P21_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN71_P15_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN80_P14_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN97_P11_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN102_P10_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN14_P00_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN22_P33_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN30_P33_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN39_P32_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN4_P02_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN50_P22_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN57_P21_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN72_P15_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN81_P14_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN98_P11_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN110_P10_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN15_P00_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN40_P32_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN41_P23_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN58_P21_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN5_P02_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN65_P20_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN73_P15_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN82_P14_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN91_P13_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN99_P11_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN100_P11_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN106_P10_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN16_P00_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN24_P33_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN42_P23_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN43_P23_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN59_P20_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN66_P20_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN6_P02_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN74_P15_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN83_P14_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN92_P13_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN101_P11_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN17_P00_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN25_P33_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN44_P23_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN45_P23_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN64_P20_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN67_P20_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN75_P15_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN7_P02_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN84_P14_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN93_P13_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN34_P33_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN68_P20_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN76_P15_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN8_P02_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN94_P13_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN9_P00_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_TIN10_P00_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_TIN11_P00_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_TIN35_P33_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_TIN69_P20_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_TIN95_P11_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_TIN12_P00_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_TIN36_P32_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_TIN70_P20_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_TIN88_P14_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_TIN96_P11_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_TIN13_P00_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_TIN60_P20_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_TIN71_P15_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_TIN89_P14_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_TIN97_P11_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN14_P00_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN51_P21_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN61_P20_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN72_P15_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN90_P14_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN98_P11_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN15_P00_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN52_P21_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN65_P20_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN73_P15_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN91_P13_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN99_P11_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN100_P11_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN16_P00_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN62_P20_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN66_P20_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN74_P15_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN92_P13_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN101_P11_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN17_P00_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN63_P20_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN67_P20_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN75_P15_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN93_P13_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_10_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_10_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_10_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_10_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_12_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_12_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_12_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_12_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_13_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_13_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_13_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_13_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_14_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_14_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_14_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_15_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_15_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_5_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT43_P23_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_6_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT44_P23_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_8_TOUT0_P02_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_8_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_8_TOUT51_P21_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_9_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_9_TOUT1_P02_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_9_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_Tom_PwmHl_modes : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Trig_AdcTrig_tableAdc0_1_2 : IfxGtm_Trig.c
  • IfxGtm_Trig_AdcTrig_tableAdc3_4 : IfxGtm_Trig.c
  • IfxGtm_Trig_SentTrig_table : IfxGtm_Trig.c
  • IfxHssl_cfg_hsctIndexMap : IfxHssl_cfg.h , IfxHssl_cfg.c
  • IfxHssl_cfg_hsslIndexMap : IfxHssl_cfg.c , IfxHssl_cfg.h
  • IfxI2c0_SCL_P02_5_INOUT : IfxI2c_PinMap.h , IfxI2c_PinMap.c
  • IfxI2c0_SCL_P13_1_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c0_SCL_P15_4_INOUT : IfxI2c_PinMap.h , IfxI2c_PinMap.c
  • IfxI2c0_SDA_P02_4_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c0_SDA_P13_2_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c0_SDA_P15_5_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c_cfg_indexMap : IfxI2c_cfg.h , IfxI2c_cfg.c
  • IfxI2c_Scl_InOut_pinTable : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c_Sda_InOut_pinTable : IfxI2c_PinMap.h , IfxI2c_PinMap.c
  • IfxMsc0_EN0_P10_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN0_P10_3_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN0_P10_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN0_P11_11_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN0_P14_10_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN0_P15_5_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN1_P10_1_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN1_P11_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN1_P13_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN1_P14_9_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN1_P15_3_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END2_P10_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END2_P10_3_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END2_P10_4_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_END2_P11_11_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END2_P14_10_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_END2_P15_5_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END3_P10_1_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_END3_P11_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END3_P13_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END3_P14_9_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END3_P15_3_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_FCLN_P13_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_FCLND_P13_0_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_FCLP_P11_6_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_FCLP_P13_1_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_FCLP_P13_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_INJ0_P00_0_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_INJ1_P10_5_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_SDI0_P11_10_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_SDI1_P10_2_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_SDI2_P14_3_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_SDI3_P11_3_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_SON_P13_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_SOND_P13_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_SOP_P11_9_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_SOP_P13_3_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_EN0_P23_4_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_EN0_P32_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_EN1_P23_5_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_END2_P23_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_END2_P32_4_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_END3_P23_5_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_FCLN_P22_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_FCLND_P22_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_FCLP_P22_1_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_INJ0_P23_3_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_INJ1_P33_13_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_SDI0_P23_1_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_SDI1_P02_3_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_SDI2_P32_4_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_SON_P22_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_SOND_P22_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_SOP_P22_3_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc_cfg_indexMap : IfxMsc_cfg.c , IfxMsc_cfg.h
  • IfxMsc_En_Out_pinTable : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc_Fcln_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_Fclp_Out_pinTable : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc_Inj_In_pinTable : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc_Sdi_In_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_Son_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_Sop_Out_pinTable : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMtu_sramTable : IfxMtu_cfg.c , IfxMtu_cfg.h
  • IfxMultican_cfg_indexMap : IfxMultican_cfg.h , IfxMultican_cfg.c
  • IfxMultican_RXD0A_P02_1_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_RXD0B_P20_7_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD0D_P02_4_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD0E_P33_7_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD1A_P15_3_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD1B_P14_1_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD1D_P00_1_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD2A_P15_1_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD2B_P02_3_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_RXD2D_P14_8_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD2E_P10_2_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_RXD3A_P00_3_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD3B_P32_2_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_RXD3C_P20_0_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD3D_P11_10_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD3E_P20_9_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_Rxd_In_pinTable : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_TXD0_P02_0_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD0_P02_5_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_TXD0_P20_8_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD0_P33_8_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_TXD1_P00_0_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD1_P14_0_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD1_P15_2_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD2_P02_2_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_TXD2_P10_3_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD2_P14_10_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD2_P15_0_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD3_P00_2_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_TXD3_P11_12_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD3_P20_10_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD3_P20_3_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD3_P32_3_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_Txd_Out_pinTable : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxPort_cfg_esrMasks : IfxPort_cfg.h , IfxPort_cfg.c
  • IfxPort_cfg_indexMap : IfxPort_cfg.h , IfxPort_cfg.c
  • IfxPort_P00_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_11 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_12 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P00_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_3 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P00_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_5 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P00_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_9 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P02_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_1 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P02_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_7 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P02_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_2 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P10_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P10_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_11 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_12 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P11_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P13_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_10 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P14_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_3 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P14_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_5 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P14_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_9 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P15_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_3 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P15_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_7 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P15_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P20_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_11 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_12 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_13 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_14 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P20_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P20_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P20_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_2 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P21_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_4 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P21_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P21_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P22_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P22_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P22_2 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P22_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P23_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_2 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P23_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P32_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P32_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P32_3 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P32_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P33_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_11 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_12 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P33_13 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_2 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P33_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_4 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P33_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P33_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P40_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P40_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P40_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_Pin_pinTable : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPsi5_RX0A_P00_1_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX0B_P02_3_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_RX0C_P33_1_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX1A_P00_3_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX1B_P02_5_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX1C_P33_3_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_RX2A_P00_5_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX2B_P02_7_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_RX2C_P33_5_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_Rx_In_pinTable : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX0_P00_2_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX0_P02_2_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX0_P33_2_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX1_P00_4_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX1_P02_6_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX1_P33_4_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX2_P00_6_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX2_P02_8_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX2_P33_6_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_Tx_Out_pinTable : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5s_Clk_Out_pinTable : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_CLK_P02_4_OUT : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_CLK_P33_10_OUT : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_Rx_In_pinTable : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_RXA_P00_3_IN : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_RXB_P02_5_IN : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_RXC_P33_5_IN : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_Tx_Out_pinTable : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_TX_P00_4_OUT : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_TX_P02_6_OUT : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_TX_P33_6_OUT : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxQspi0_MRST_P20_12_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_MRSTA_P20_12_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_MTSR_P20_12_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_MTSR_P20_14_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_MTSRA_P20_14_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SCLK_P20_11_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SCLK_P20_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SCLKA_P20_11_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSIA_P20_13_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSIB_P20_9_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO0_P20_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO13_P15_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO1_P20_9_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSO2_P20_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO3_P11_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO4_P11_11_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO5_P11_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO6_P20_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO7_P33_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO8_P20_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO9_P20_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MRST_P10_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MRST_P10_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MRST_P11_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MRSTA_P10_1_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_MRSTB_P11_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSR_P10_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_MTSR_P10_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSR_P10_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSR_P11_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSRA_P10_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSRB_P11_9_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_MTSRC_P10_4_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SCLK_P10_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SCLK_P11_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SCLKA_P10_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SCLKB_P11_6_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSIA_P11_10_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO0_P20_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO10_P10_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO1_P20_9_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SLSO2_P20_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO3_P11_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO4_P11_11_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO5_P11_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO6_P33_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO7_P33_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO8_P10_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SLSO9_P10_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_HSICINA_P15_2_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_HSICINB_P15_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MRST_P15_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRST_P15_7_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRSTA_P15_4_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRSTB_P15_7_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRSTCN_P21_2_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRSTCP_P21_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRSTE_P15_2_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MTSR_P15_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MTSR_P15_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MTSRA_P15_5_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MTSRB_P15_6_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MTSRN_P13_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MTSRP_P13_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SCLK_P15_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SCLK_P15_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SCLK_P15_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SCLKA_P15_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SCLKB_P15_8_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SCLKN_P13_0_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SCLKP_P13_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSIA_P15_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSIB_P15_1_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO0_P15_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO1_P14_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO2_P14_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO3_P14_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO4_P14_7_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO5_P15_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO6_P33_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO7_P20_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO8_P20_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO9_P20_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_HSICINA_P33_9_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_HSICINB_P33_10_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRST_P02_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MRST_P10_7_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRST_P22_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRST_P33_13_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MRSTA_P02_5_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRSTB_P10_7_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRSTD_P33_13_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRSTE_P22_1_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRSTFN_P21_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRSTFP_P21_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSR_P02_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MTSR_P10_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MTSR_P22_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSR_P33_12_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MTSRA_P02_6_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSRB_P10_6_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MTSRD_P33_12_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSRE_P22_0_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MTSRN_P22_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSRP_P22_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SCLK_P02_7_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SCLK_P10_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SCLK_P22_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLK_P33_11_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLKA_P02_7_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLKB_P10_8_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SCLKD_P33_11_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLKE_P22_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SCLKN_P22_0_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SCLKP_P22_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSIA_P02_4_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSIC_P33_10_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSID_P22_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO0_P02_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO11_P33_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO12_P22_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO13_P23_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO1_P02_0_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO1_P33_9_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO2_P02_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO2_P33_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO3_P02_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO4_P02_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO4_P23_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO5_P02_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO5_P23_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO6_P00_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO7_P00_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO7_P33_7_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO8_P10_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi_cfg_indexMap : IfxQspi_cfg.c , IfxQspi_cfg.h
  • IfxQspi_Hsicin_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Mrst_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Mrst_Out_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi_Mtsr_In_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi_Mtsr_Out_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi_Sclk_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Sclk_Out_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi_Slsi_In_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi_Slso_Out_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_SpiSlave_dummyRxValue : IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_dummyTxValue : IfxQspi_SpiSlave.c
  • IfxScu_Dcdcsync_Out_pinTable : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_DCDCSYNC_P32_2_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_DCDCSYNC_P33_13_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_Emgstop_In_pinTable : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EMGSTOPA_P33_8_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EMGSTOPB_P21_2_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_Evrwup_In_pinTable : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EVRWUPA_P14_1_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EVRWUPB_P15_1_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EXTCLK0_P23_1_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_EXTCLK1_P11_12_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_EXTCLK1_P32_4_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_Extclk_Out_pinTable : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_HWCFG0DCLDO_P14_6_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_HWCFG1EVR33_P14_5_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_HWCFG2EVR13_P14_2_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_HWCFG3_BMI_P14_3_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_HWCFG4_P10_5_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_HWCFG5_P10_6_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_HWCFG6_P14_4_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_Hwcfg_In_pinTable : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ0_P15_4_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ10_P14_3_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ11_P20_9_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ12_P11_10_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ13_P15_5_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ14_P02_1_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ15_P14_1_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ16_P15_1_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ1_P15_8_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ2_P10_2_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ3_P10_3_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ4_P10_7_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ5_P10_8_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ6_P02_0_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ7_P00_4_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ8_P33_7_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ9_P20_0_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_Req_In_pinTable : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_WDT0LCK_P20_8_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_WDT1LCK_P20_7_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_Wdtlck_Out_pinTable : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_WDTSLCK_P20_9_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScuCcu_aDefaultPllConfigSteps : IfxScuCcu.c
  • IfxScuCcu_defaultClockConfig : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_defaultErayPllConfig : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_xtalFrequency : IfxScuCcu.c
  • IfxSent_SENT0A_AN24_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT0A_P40_0_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT0B_P00_1_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT0C_P02_8_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT1A_AN25_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT1A_P40_1_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT1B_P00_2_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT1C_P02_7_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT2A_AN26_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT2A_P40_2_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT2B_P00_3_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT2C_P02_6_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT2D_AN36_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT2D_P40_6_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT3A_AN27_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT3A_P40_3_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT3B_P00_4_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT3C_P02_5_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT3D_AN37_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT3D_P40_7_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT4A_AN38_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT4A_P40_8_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT4B_P00_5_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT4C_P33_6_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT5A_AN39_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT5A_P40_9_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT5B_P00_6_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT5C_P33_5_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_Sent_In_pinTable : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SPC0_P00_1_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SPC1_P02_7_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SPC2_P00_3_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SPC3_P00_4_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SPC4_P00_5_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SPC5_P00_6_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_Spc_Out_pinTable : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSmu_Fsp_Out_pinTable : IfxSmu_PinMap.h , IfxSmu_PinMap.c
  • IfxSmu_FSP_P33_8_OUT : IfxSmu_PinMap.h , IfxSmu_PinMap.c
  • IfxStm_cfg_indexMap : IfxStm_cfg.h , IfxStm_cfg.c
  • IfxVadc_Adc_masterIndex : IfxVadc_Adc.c
  • IfxVadc_cfg_srcAddresses : IfxVadc_cfg.c , IfxVadc_cfg.h
  • IfxVadc_EMUX00_P02_6_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_EMUX00_P33_3_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_EMUX01_P02_7_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_EMUX01_P33_2_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_EMUX02_P02_8_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_EMUX02_P33_1_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_EMUX10_P00_6_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_EMUX10_P33_6_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_EMUX11_P00_7_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_EMUX11_P33_5_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_EMUX12_P00_8_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_EMUX12_P33_4_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_Emux_Out_pinTable : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0_0_AN0_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_10_AN10_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_11_AN11_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0_12_AN12_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_13_AN13_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0_1_AN1_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0_2_AN2_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0_3_AN3_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0_4_AN4_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_5_AN5_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0_6_AN6_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_7_AN7_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0_8_AN8_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0BFL0_P33_4_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0BFL1_P33_5_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0BFL2_P33_6_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0BFL3_P33_7_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_0_AN16_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_10_AN26_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_10_P40_2_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_11_AN27_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_11_P40_3_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_12_AN28_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_13_AN29_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_1_AN17_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_2_AN18_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_3_AN19_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_4_AN20_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_5_AN21_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_8_AN24_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_8_P40_0_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_9_AN25_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_9_P40_1_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1BFL0_P33_0_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1BFL1_P33_1_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1BFL2_P33_2_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1BFL3_P33_3_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_0_AN32_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_10_AN44_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_11_AN45_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_12_AN46_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_13_AN47_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_14_AN48_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_15_AN49_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_1_AN33_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_3_AN35_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_4_AN36_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_4_P40_6_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_5_AN37_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_5_P40_7_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_6_AN38_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_6_P40_8_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_7_AN39_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_7_P40_9_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2BFL0_P00_4_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2BFL1_P00_5_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2BFL2_P00_6_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2BFL3_P00_7_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_0_P00_12_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_10_P00_2_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3_11_P00_1_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_1_P00_11_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_2_P00_10_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_3_P00_9_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_4_P00_8_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_5_P00_7_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3_6_P00_6_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_7_P00_5_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_8_P00_4_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3_9_P00_3_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3BFL0_P10_0_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3BFL0_P10_6_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3BFL1_P10_1_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3BFL1_P10_7_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3BFL2_P10_2_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3BFL3_P10_3_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_GxBfl_Out_pinTable : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_Vadcg_In_pinTable : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • insert : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • isync : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h


iLLD_TC26B: Globals

- m -

  • max : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • mfcr : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • min : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • mtcr : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

- n -

  • nop : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h


iLLD_TC26B: Globals

- r -

  • restore : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • rslcx : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h


iLLD_TC26B: Globals

- s -

  • svlcx : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • syscall : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h


iLLD_TC26B: Globals

- t -

  • t : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • TimeConst : Bsp.h


iLLD_TC26B: Globals

- u -

  • u : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h


iLLD_TC26B: Globals

- w -

  • wi : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h


iLLD_TC26B: Globals

- _ -

  • __packb : Ifx_TypesDcc.h , Ifx_TypesGhs.h , Ifx_TypesGnuc.h
  • __packhw : Ifx_TypesDcc.h , Ifx_TypesGhs.h , Ifx_TypesGnuc.h
  • __upackb : Ifx_TypesDcc.h , Ifx_TypesGhs.h , Ifx_TypesGnuc.h
  • __upackhw : Ifx_TypesDcc.h , Ifx_TypesGhs.h , Ifx_TypesGnuc.h

- b -

  • boolean : Platform_Types.h

- c -

  • circ_t : Ifx_TypesDcc.h

- f -

  • float32 : Platform_Types.h
  • float64 : Platform_Types.h
  • fract : Ifx_TypesDcc.h , Ifx_TypesGhs.h , Ifx_TypesGnuc.h

- i -

  • Icu : Icu.h
  • Icu_GetTimeStamp : Icu.h
  • Icu_StartCapture : Icu.h
  • Icu_StopCapture : Icu.h
  • Ifx_AddressValue : Ifx_Types.h
  • Ifx_Fifo : Ifx_Fifo.h
  • Ifx_GTM_TOM_TGC : IfxGtm_cfg.h
  • Ifx_Lut_FxpAngle : Ifx_Lut.h
  • Ifx_Priority : Ifx_Types.h
  • Ifx_Shell_Call : Ifx_Shell.h
  • Ifx_Shell_CommandList : Ifx_Shell.h
  • Ifx_Shell_CommandListConst : Ifx_Shell.h
  • Ifx_SignedTimerVal : Ifx_Types.h
  • Ifx_SizeT : Ifx_Types.h
  • Ifx_TickTime : Ifx_Types.h
  • Ifx_TimerValue : Ifx_Types.h
  • IfxCcu6_PwmHl : IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_Update : IfxCcu6_PwmHl.h
  • IfxCpu_mutexLock : IfxCpu.h
  • IfxCpu_spinLock : IfxCpu.h
  • IfxCpu_syncEvent : IfxCpu.h
  • IfxCpu_Trap_NonMaskableInterrupt_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_SystemCall_Id : IfxCpu_Trap.h
  • IfxFft_Fft_Job : IfxFft_Fft.h
  • IfxGpt12_IncrEnc_Update : IfxGpt12_IncrEnc.h
  • IfxGtm_Atom_PwmHl : IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_Update : IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_UpdatePulse : IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_UpdateShift : IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_ToutMapP : IfxGtm_PinMap.h
  • IfxGtm_Tom_PwmHl : IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_Update : IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_UpdatePulse : IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_UpdateShift : IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_ToutMapP : IfxGtm_PinMap.h
  • IfxMultican_MsgObjId : IfxMultican.h
  • IfxQspi_SpiMaster_AutoSlso : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Channel : IfxQspi_SpiMaster.h
  • IfxScuCcu_PllStepsFunctionHook : IfxScuCcu.h
  • IfxStdIf_DPipe : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_CanReadCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_CanWriteCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_ClearRx : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_ClearTx : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_FlushTx : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetReadCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetReadEvent : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetSendCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetTxTimeStamp : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetWriteCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetWriteEvent : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_OnError : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_OnReceive : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_OnTransmit : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_Read : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_ReadEvent : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_ResetSendCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_Write : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_WriteEvent : IfxStdIf_DPipe.h
  • IfxStdIf_InterfaceDriver : IfxStdIf.h
  • IfxStdIf_Pos : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetAbsolutePosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetDirection : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetFault : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetOffset : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetPeriodPerRotation : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetPosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetRawPosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetRefreshPeriod : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetResolution : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetSensorType : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetSpeed : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetTurn : IfxStdIf_Pos.h
  • IfxStdIf_Pos_OnEventA : IfxStdIf_Pos.h
  • IfxStdIf_Pos_OnZeroIrq : IfxStdIf_Pos.h
  • IfxStdIf_Pos_RawAngle : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Reset : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResetFaults : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetOffset : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetPosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetRawPosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetRefreshPeriod : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetSpeed : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Update : IfxStdIf_Pos.h
  • IfxStdIf_PwmHl : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_GetDeadtime : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_GetDeadtimeTick : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_GetMinPulse : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_GetMode : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetDeadtime : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetMinPulse : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetMode : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetOnTime : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetOnTimeAndShift : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetPulse : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetupChannels : IfxStdIf_PwmHl.h
  • IfxStdIf_Timer : IfxStdIf_Timer.h
  • IfxStdIf_Timer_AckTimerIrq : IfxStdIf_Timer.h
  • IfxStdIf_Timer_AckTriggerIrq : IfxStdIf_Timer.h
  • IfxStdIf_Timer_ApplyUpdate : IfxStdIf_Timer.h
  • IfxStdIf_Timer_DisableUpdate : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetFrequency : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetInputFrequency : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetPeriod : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetResolution : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetTrigger : IfxStdIf_Timer.h
  • IfxStdIf_Timer_Run : IfxStdIf_Timer.h
  • IfxStdIf_Timer_SetFrequency : IfxStdIf_Timer.h
  • IfxStdIf_Timer_SetPeriod : IfxStdIf_Timer.h
  • IfxStdIf_Timer_SetSingleMode : IfxStdIf_Timer.h
  • IfxStdIf_Timer_SetTrigger : IfxStdIf_Timer.h
  • IfxStdIf_Timer_Stop : IfxStdIf_Timer.h
  • IfxStdIf_Timer_UpdateInputFrequency : IfxStdIf_Timer.h
  • IfxVadc_Adc_SYNCTR_STSEL : IfxVadc_Adc.h

- l -

  • laccum : Ifx_TypesDcc.h , Ifx_TypesGhs.h , Ifx_TypesGnuc.h

- p -

  • pchar : Ifx_Types.h
  • pvoid : Ifx_Types.h
  • PwmHl : PwmHl.h
  • PwmHl_Pause : PwmHl.h
  • PwmHl_Resume : PwmHl.h
  • PwmHl_Start : PwmHl.h
  • PwmHl_Stop : PwmHl.h

- s -

  • sfract : Ifx_TypesDcc.h , Ifx_TypesGhs.h , Ifx_TypesGnuc.h
  • sint16 : Platform_Types.h
  • sint16_least : Platform_Types.h
  • sint32 : Platform_Types.h
  • sint32_least : Platform_Types.h
  • sint64 : Platform_Types.h
  • sint8 : Platform_Types.h
  • sint8_least : Platform_Types.h
  • SpiIf : SpiIf.h
  • SpiIf_Cbk : SpiIf.h
  • SpiIf_Ch : SpiIf.h
  • SpiIf_ChConfig : SpiIf.h
  • SpiIf_Exchange : SpiIf.h
  • SpiIf_GetStatus : SpiIf.h
  • SpiIf_OnEvent : SpiIf.h
  • SpiIf_SlsoTiming_HalfTsclk : SpiIf.h

- t -

  • Timer : Timer.h
  • Timer_CountOneStep : Timer.h
  • Timer_Start : Timer.h
  • Timer_StartSingleShotMode : Timer.h
  • Timer_Stop : Timer.h
  • Timer_SynchronousStart : Timer.h
  • Timer_SynchronousStop : Timer.h
  • TPwm : TPwm.h
  • TPwm_Pause : TPwm.h
  • TPwm_Resume : TPwm.h
  • TPwm_Start : TPwm.h
  • TPwm_Stop : TPwm.h
  • TxRxHandler : SpiIf.h

- u -

  • uint16 : Platform_Types.h
  • uint16_least : Platform_Types.h
  • uint32 : Platform_Types.h
  • uint32_least : Platform_Types.h
  • uint64 : Platform_Types.h
  • uint8 : Platform_Types.h
  • uint8_least : Platform_Types.h

- v -

  • voidfunc : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h
  • voidfuncvoid : Ifx_Types.h
  • vvoid : Ifx_Types.h

- w -

  • WaitTimeFunction : Bsp.h


iLLD_TC26B: Globals

- i -

  • Ifx_ActiveState : Ifx_Types.h
  • Ifx_DataBufferMode : Ifx_Types.h
  • Ifx_ParityMode : Ifx_Types.h
  • Ifx_Pwm_Mode : Ifx_Types.h
  • Ifx_RxSel : Ifx_Types.h
  • Ifx_Shell_CmdState : Ifx_Shell.h
  • Ifx_Shell_ResultCode : Ifx_Shell.h
  • IfxAsclin_Checksum : IfxAsclin.h
  • IfxAsclin_ChecksumInjection : IfxAsclin.h
  • IfxAsclin_ClockPolarity : IfxAsclin.h
  • IfxAsclin_ClockSource : IfxAsclin.h
  • IfxAsclin_CtsInputSelect : IfxAsclin.h
  • IfxAsclin_DataLength : IfxAsclin.h
  • IfxAsclin_FrameMode : IfxAsclin.h
  • IfxAsclin_HeaderResponseSelect : IfxAsclin.h
  • IfxAsclin_IdleDelay : IfxAsclin.h
  • IfxAsclin_Index : IfxAsclin_cfg.h
  • IfxAsclin_LeadDelay : IfxAsclin.h
  • IfxAsclin_Lin_Direction : IfxAsclin_Lin.h
  • IfxAsclin_LinMode : IfxAsclin.h
  • IfxAsclin_LinResponseTimeoutMode : IfxAsclin.h
  • IfxAsclin_OversamplingFactor : IfxAsclin.h
  • IfxAsclin_ParityType : IfxAsclin.h
  • IfxAsclin_ReceiveBufferMode : IfxAsclin.h
  • IfxAsclin_RtsCtsPolarity : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth : IfxAsclin.h
  • IfxAsclin_RxInputSelect : IfxAsclin.h
  • IfxAsclin_SamplePointPosition : IfxAsclin.h
  • IfxAsclin_SamplesPerBit : IfxAsclin.h
  • IfxAsclin_ShiftDirection : IfxAsclin.h
  • IfxAsclin_SlavePolarity : IfxAsclin.h
  • IfxAsclin_SleepMode : IfxAsclin.h
  • IfxAsclin_Spi_Status : IfxAsclin_Spi.h
  • IfxAsclin_Status : IfxAsclin.h
  • IfxAsclin_StopBit : IfxAsclin.h
  • IfxAsclin_SuspendMode : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel : IfxAsclin.h
  • IfxCcu6_CaptureCompareInput : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal : IfxCcu6.h
  • IfxCcu6_CaptureCompareState : IfxCcu6.h
  • IfxCcu6_ChannelOut : IfxCcu6.h
  • IfxCcu6_CountingInputMode : IfxCcu6.h
  • IfxCcu6_DelayBypass : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode : IfxCcu6.h
  • IfxCcu6_Index : IfxCcu6_cfg.h
  • IfxCcu6_InterruptSource : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSync : IfxCcu6.h
  • IfxCcu6_ServiceRequest : IfxCcu6.h
  • IfxCcu6_SleepMode : IfxCcu6.h
  • IfxCcu6_SuspendMode : IfxCcu6.h
  • IfxCcu6_T12Channel : IfxCcu6.h
  • IfxCcu6_T12ChannelMode : IfxCcu6.h
  • IfxCcu6_T12CountDirection : IfxCcu6.h
  • IfxCcu6_T12CountMode : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent : IfxCcu6.h
  • IfxCcu6_TimerId : IfxCcu6.h
  • IfxCcu6_TimerInputClock : IfxCcu6.h
  • IfxCcu6_TimerInputSignal : IfxCcu6.h
  • IfxCcu6_TimerRunStatus : IfxCcu6.h
  • IfxCcu6_TrapMode : IfxCcu6.h
  • IfxCcu6_TrapState : IfxCcu6.h
  • IfxCcu6_TrigOut : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel : IfxCcu6_cfg.h
  • IfxCif_Cam_IspMode : IfxCif_Cam.h
  • IfxCif_Cam_State : IfxCif_Cam.h
  • IfxCif_Cam_Status : IfxCif_Cam.h
  • IfxCif_DataPathSelectorForMainPath : IfxCif.h
  • IfxCif_DpControlSources : IfxCif.h
  • IfxCif_DpCounters : IfxCif.h
  • IfxCif_DpSourcePath : IfxCif.h
  • IfxCif_EpErrorClearSources : IfxCif.h
  • IfxCif_EpErrorSources : IfxCif.h
  • IfxCif_EpFeatures : IfxCif.h
  • IfxCif_EpInterrupts : IfxCif.h
  • IfxCif_EpWriteFormat : IfxCif.h
  • IfxCif_ErrorState : IfxCif.h
  • IfxCif_ExtraPath : IfxCif.h
  • IfxCif_HuffmanTableComponents : IfxCif.h
  • IfxCif_HuffmanTables : IfxCif.h
  • IfxCif_ImageTiers : IfxCif.h
  • IfxCif_InputInterface : IfxCif.h
  • IfxCif_InterruptTriggeredState : IfxCif.h
  • IfxCif_IspCcirSequence : IfxCif.h
  • IfxCif_IspColorSpaceMatrixCrominanceClippingRange : IfxCif.h
  • IfxCif_IspColorSpaceMatrixLuminanceClippingRange : IfxCif.h
  • IfxCif_IspErrorSources : IfxCif.h
  • IfxCif_IspFieldSelection : IfxCif.h
  • IfxCif_IspInformFieldInformation : IfxCif.h
  • IfxCif_IspInputInterface : IfxCif.h
  • IfxCif_IspInterruptSources : IfxCif.h
  • IfxCif_IspMode : IfxCif.h
  • IfxCif_IspSamplingEdge : IfxCif.h
  • IfxCif_IspSyncPolarity : IfxCif.h
  • IfxCif_JpeDebugSignalSources : IfxCif.h
  • IfxCif_JpeDebugSignalState : IfxCif.h
  • IfxCif_JpegJfifStreamEncoderContinuousMode : IfxCif.h
  • IfxCif_JpegPictureEncodingFormat : IfxCif.h
  • IfxCif_JpeHeaderGenerationMode : IfxCif.h
  • IfxCif_JpeHeaderMode : IfxCif.h
  • IfxCif_JpeInterruptSources : IfxCif.h
  • IfxCif_JpeQTableSelector : IfxCif.h
  • IfxCif_JpeQTableSelectorComponents : IfxCif.h
  • IfxCif_JpeScalingValueSources : IfxCif.h
  • IfxCif_JpeState : IfxCif.h
  • IfxCif_JpeTableId : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode : IfxCif.h
  • IfxCif_MiBurstLength : IfxCif.h
  • IfxCif_MiDataPaths : IfxCif.h
  • IfxCif_MiInterruptSources : IfxCif.h
  • IfxCif_MiMainPicturePathComponents : IfxCif.h
  • IfxCif_MiMainPictureWriteFormat : IfxCif.h
  • IfxCif_MiStatusClearSources : IfxCif.h
  • IfxCif_MiStatusInformationSources : IfxCif.h
  • IfxCif_PortInputSelection : IfxCif.h
  • IfxCif_SecurityWatchdogCounters : IfxCif.h
  • IfxCif_SecurityWatchdogInterruptSources : IfxCif.h
  • IfxCif_SecurityWatchdogTimeoutCounters : IfxCif.h
  • IfxCif_State : IfxCif.h
  • IfxCif_Submodules : IfxCif.h
  • IfxCif_YCSplitterChannelMode : IfxCif.h
  • IfxCpu_CoreMode : IfxCpu.h
  • IfxCpu_CounterMode : IfxCpu.h
  • IfxCpu_DBGST_HALT : IfxCpu_cfg.h
  • IfxCpu_Id : IfxCpu_cfg.h
  • IfxCpu_Index : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST : IfxCpu_cfg.h
  • IfxCpu_ResourceCpu : IfxCpu_cfg.h
  • IfxCpu_Trap_Assertion_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_Class : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_MemoryManagement_Id : IfxCpu_Trap.h
  • IfxDma_BusMasterMode : IfxDma.h
  • IfxDma_ChannelBusPriority : IfxDma.h
  • IfxDma_ChannelId : IfxDma_cfg.h
  • IfxDma_ChannelIncrementCircular : IfxDma.h
  • IfxDma_ChannelIncrementDirection : IfxDma.h
  • IfxDma_ChannelIncrementStep : IfxDma.h
  • IfxDma_ChannelInterruptControl : IfxDma.h
  • IfxDma_ChannelMove : IfxDma.h
  • IfxDma_ChannelMoveSize : IfxDma.h
  • IfxDma_ChannelOperationMode : IfxDma.h
  • IfxDma_ChannelPattern : IfxDma.h
  • IfxDma_ChannelPriority : IfxDma.h
  • IfxDma_ChannelRequestMode : IfxDma.h
  • IfxDma_ChannelRequestSource : IfxDma.h
  • IfxDma_ChannelShadow : IfxDma.h
  • IfxDma_HardwareResourcePartition : IfxDma.h
  • IfxDma_MoveEngine : IfxDma.h
  • IfxDma_SleepMode : IfxDma.h
  • IfxDsadc_AuxCombFilterShift : IfxDsadc.h
  • IfxDsadc_AuxCombFilterType : IfxDsadc.h
  • IfxDsadc_AuxEvent : IfxDsadc.h
  • IfxDsadc_AuxGate : IfxDsadc.h
  • IfxDsadc_AuxServiceRequest : IfxDsadc.h
  • IfxDsadc_CarrierWaveformMode : IfxDsadc.h
  • IfxDsadc_ChannelId : IfxDsadc.h
  • IfxDsadc_CommonModeVoltage : IfxDsadc.h
  • IfxDsadc_FirDataShift : IfxDsadc.h
  • IfxDsadc_FirInternalShift : IfxDsadc.h
  • IfxDsadc_InputConfig : IfxDsadc.h
  • IfxDsadc_InputDataSource : IfxDsadc.h
  • IfxDsadc_InputGain : IfxDsadc.h
  • IfxDsadc_InputPin : IfxDsadc.h
  • IfxDsadc_IntegrationWindowSize : IfxDsadc.h
  • IfxDsadc_IntegratorTrigger : IfxDsadc.h
  • IfxDsadc_LowPowerSupply : IfxDsadc.h
  • IfxDsadc_MainCombFilterShift : IfxDsadc.h
  • IfxDsadc_MainCombFilterType : IfxDsadc.h
  • IfxDsadc_MainServiceRequest : IfxDsadc.h
  • IfxDsadc_ModulatorClock : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider : IfxDsadc.h
  • IfxDsadc_RectifierSignSource : IfxDsadc.h
  • IfxDsadc_SampleClockSource : IfxDsadc.h
  • IfxDsadc_SampleStrobe : IfxDsadc.h
  • IfxDsadc_SleepMode : IfxDsadc.h
  • IfxDsadc_TimestampTrigger : IfxDsadc.h
  • IfxDsadc_TriggerInput : IfxDsadc.h
  • IfxEmem_LockedState : IfxEmem.h
  • IfxEmem_State : IfxEmem.h
  • IfxEmem_TileConfigMode : IfxEmem.h
  • IfxEmem_TileNumber : IfxEmem.h
  • IfxEray_Baudrate : IfxEray.h
  • IfxEray_BufferDirection : IfxEray.h
  • IfxEray_Channel : IfxEray.h
  • IfxEray_ClearErrorFlag : IfxEray.h
  • IfxEray_ClearStatusFlag : IfxEray.h
  • IfxEray_ClockDivider : IfxEray.h
  • IfxEray_ExternalOffset : IfxEray.h
  • IfxEray_ExternalOffsetCorrection : IfxEray.h
  • IfxEray_ExternalRate : IfxEray.h
  • IfxEray_ExternalRateCorrection : IfxEray.h
  • IfxEray_IdleDynamicSlots : IfxEray.h
  • IfxEray_Index : IfxEray_cfg.h
  • IfxEray_ListenTimeOutNoise : IfxEray.h
  • IfxEray_MaxSynchFrames : IfxEray.h
  • IfxEray_NodeId : IfxEray_cfg.h
  • IfxEray_PocCommand : IfxEray.h
  • IfxEray_PocState : IfxEray.h
  • IfxEray_ReceiveChannel : IfxEray.h
  • IfxEray_SleepMode : IfxEray.h
  • IfxEray_StrobePosition : IfxEray.h
  • IfxEray_SuspendMode : IfxEray.h
  • IfxEray_TransmissionMode : IfxEray.h
  • IfxEray_TransmissionSlotMode : IfxEray.h
  • IfxEray_WakeupChannel : IfxEray.h
  • IfxEth_ChecksumMode : IfxEth.h
  • IfxEth_DescriptorMode : IfxEth.h
  • IfxEth_PhyInterfaceMode : IfxEth.h
  • IfxEth_ReceiveProcessState : IfxEth.h
  • IfxEth_RingModeBufferUsed : IfxEth.h
  • IfxEth_TransmitProcessState : IfxEth.h
  • IfxFce_Crc32Kernel : IfxFce.h
  • IfxFce_CrcMode : IfxFce.h
  • IfxFft_Input : IfxFft.h
  • IfxFft_Length : IfxFft.h
  • IfxFft_Operation : IfxFft.h
  • IfxFft_Output : IfxFft.h
  • IfxFft_SuspendMode : IfxFft.h
  • IfxFlash_ErrorTracking : IfxFlash.h
  • IfxFlash_FlashType : IfxFlash_cfg.h
  • IfxFlash_PortId : IfxFlash.h
  • IfxFlash_UcbType : IfxFlash_cfg.h
  • IfxGpt12_CaptureInput : IfxGpt12.h
  • IfxGpt12_CaptureInputMode : IfxGpt12.h
  • IfxGpt12_CaptureTrigger : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode : IfxGpt12.h
  • IfxGpt12_CounterInputMode : IfxGpt12.h
  • IfxGpt12_EudInput : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode : IfxGpt12.h
  • IfxGpt12_Input : IfxGpt12.h
  • IfxGpt12_Mode : IfxGpt12.h
  • IfxGpt12_ReloadInputMode : IfxGpt12.h
  • IfxGpt12_SleepMode : IfxGpt12.h
  • IfxGpt12_SuspendMode : IfxGpt12.h
  • IfxGpt12_TimerDirection : IfxGpt12.h
  • IfxGpt12_TimerDirectionSource : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler : IfxGpt12.h
  • IfxGpt12_TimerReloadMode : IfxGpt12.h
  • IfxGpt12_TimerRemoteControl : IfxGpt12.h
  • IfxGpt12_TimerRun : IfxGpt12.h
  • IfxGtm_Atom : IfxGtm_cfg.h
  • IfxGtm_Atom_AruInput : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_OutputTrigger : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_ResetEvent : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl : IfxGtm_Atom.h
  • IfxGtm_ChXSel : IfxGtm_PinMap.h
  • IfxGtm_Cmu_Clk : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Eclk : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk : IfxGtm_Cmu.h
  • IfxGtm_Dpll_SubInc : IfxGtm_cfg.h
  • IfxGtm_FeatureControl : IfxGtm_cfg.h
  • IfxGtm_IrqMode : IfxGtm.h
  • IfxGtm_SuspendMode : IfxGtm.h
  • IfxGtm_Tbu_Ts : IfxGtm_Tbu.h
  • IfxGtm_Tim : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch : IfxGtm_cfg.h
  • IfxGtm_Tim_CntsSel : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterCounter : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterMode : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel : IfxGtm_Tim.h
  • IfxGtm_Tim_In_ConfigFilterMode : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_Input : IfxGtm_Tim_In.h
  • IfxGtm_Tim_Input : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout : IfxGtm_Tim.h
  • IfxGtm_Tom : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_ClkSrc : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_OutputTrigger : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ResetEvent : IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc : IfxGtm_cfg.h
  • IfxGtm_ToutSel : IfxGtm_PinMap.h
  • IfxGtm_Trig_AdcGroup : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrig : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrig : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource : IfxGtm_Trig.h
  • IfxHssl_ChannelId : IfxHssl.h
  • IfxHssl_ClockFrequencyRate : IfxHssl.h
  • IfxHssl_Command : IfxHssl.h
  • IfxHssl_ControlCommand : IfxHssl.h
  • IfxHssl_DataLength : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource : IfxHssl.h
  • IfxHssl_Hsct_SleepMode : IfxHssl.h
  • IfxHssl_hsctIndex : IfxHssl_cfg.h
  • IfxHssl_Hssl_ERRInterruptSource : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource : IfxHssl.h
  • IfxHssl_Hssl_FrameRequest : IfxHssl_Hssl.h
  • IfxHssl_Hssl_SleepMode : IfxHssl.h
  • IfxHssl_Hssl_Status : IfxHssl_Hssl.h
  • IfxHssl_hsslIndex : IfxHssl_cfg.h
  • IfxHssl_InterfaceMode : IfxHssl.h
  • IfxHssl_MasterModeRxSpeed : IfxHssl.h
  • IfxHssl_MasterModeTxSpeed : IfxHssl.h
  • IfxHssl_PllReferenceClock : IfxHssl.h
  • IfxHssl_StreamingMode : IfxHssl.h
  • IfxHssl_SuspendMode : IfxHssl.h
  • IfxI2c_BusStatus : IfxI2c.h
  • IfxI2c_ErrorInterruptSource : IfxI2c.h
  • IfxI2c_I2c_Status : IfxI2c_I2c.h
  • IfxI2c_Index : IfxI2c_cfg.h
  • IfxI2c_PinSelect : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource : IfxI2c.h
  • IfxI2c_SleepMode : IfxI2c.h
  • IfxIom_LamEventSource : IfxIom.h
  • IfxIom_LamEventTrigger : IfxIom.h
  • IfxIom_LamEventWindowClearEvent : IfxIom.h
  • IfxIom_LamEventWindowControlSource : IfxIom.h
  • IfxIom_LamEventWindowRunControl : IfxIom.h
  • IfxIom_LamFilterMode : IfxIom.h
  • IfxIom_LamId : IfxIom.h
  • IfxIom_MonInput : IfxIom_cfg.h
  • IfxIom_MonInputSignal : IfxIom_cfg.h
  • IfxIom_RefInput : IfxIom_cfg.h
  • IfxIom_RefInputSignal : IfxIom_cfg.h
  • IfxIom_SleepMode : IfxIom.h
  • IfxMsc_ActivePhaseSelection : IfxMsc.h
  • IfxMsc_AsynchronousBlock : IfxMsc.h
  • IfxMsc_ChipSelectActiveState : IfxMsc.h
  • IfxMsc_ClockSelect : IfxMsc.h
  • IfxMsc_CommandDataCommandRepetitionMode : IfxMsc.h
  • IfxMsc_CommandFrameInterrupt : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode : IfxMsc.h
  • IfxMsc_CommandFrameLength : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength : IfxMsc.h
  • IfxMsc_DataFrameInterrupt : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode : IfxMsc.h
  • IfxMsc_DataFrameLength : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength : IfxMsc.h
  • IfxMsc_DividerMode : IfxMsc.h
  • IfxMsc_EmergencyStop : IfxMsc.h
  • IfxMsc_Extension : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition : IfxMsc.h
  • IfxMsc_ExternalSignalInjection : IfxMsc.h
  • IfxMsc_FclClockControlEnabled : IfxMsc.h
  • IfxMsc_FclLinePolarity : IfxMsc.h
  • IfxMsc_HardwareClock : IfxMsc.h
  • IfxMsc_Index : IfxMsc_cfg.h
  • IfxMsc_InterruptServiceRequest : IfxMsc.h
  • IfxMsc_ModuleSuspendRequestBit : IfxMsc.h
  • IfxMsc_MsbBitDataExtension : IfxMsc.h
  • IfxMsc_Msc_Target : IfxMsc_Msc.h
  • IfxMsc_NDividerAbra : IfxMsc.h
  • IfxMsc_NDividerDownstream : IfxMsc.h
  • IfxMsc_OverflowInterrupt : IfxMsc.h
  • IfxMsc_OverflowInterruptNode : IfxMsc.h
  • IfxMsc_Parity : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode : IfxMsc.h
  • IfxMsc_SdiLinePolarity : IfxMsc.h
  • IfxMsc_SerialDataInput : IfxMsc.h
  • IfxMsc_ServiceRequestDelay : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration : IfxMsc.h
  • IfxMsc_SleepMode : IfxMsc.h
  • IfxMsc_SoLinePolarity : IfxMsc.h
  • IfxMsc_Source : IfxMsc.h
  • IfxMsc_SuspendMode : IfxMsc.h
  • IfxMsc_Target : IfxMsc.h
  • IfxMsc_TimeFrameInterrupt : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode : IfxMsc.h
  • IfxMsc_TransmissionMode : IfxMsc.h
  • IfxMsc_UnderflowInterrupt : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode : IfxMsc.h
  • IfxMsc_UpstreamChannelFrameType : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterrupt : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue : IfxMsc.h
  • IfxMtu_MbistSel : IfxMtu_cfg.h
  • IfxMultican_ClockSelect : IfxMultican.h
  • IfxMultican_DataLengthCode : IfxMultican.h
  • IfxMultican_Frame : IfxMultican.h
  • IfxMultican_FrameCounterMode : IfxMultican.h
  • IfxMultican_Index : IfxMultican_cfg.h
  • IfxMultican_MsgObjGroup : IfxMultican.h
  • IfxMultican_MsgObjMode : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag : IfxMultican.h
  • IfxMultican_NodeId : IfxMultican_cfg.h
  • IfxMultican_Priority : IfxMultican.h
  • IfxMultican_SleepMode : IfxMultican.h
  • IfxMultican_SrcId : IfxMultican_cfg.h
  • IfxMultican_Status : IfxMultican.h
  • IfxMultican_SuspendMode : IfxMultican.h
  • IfxPort_ControlledBy : IfxPort.h
  • IfxPort_Index : IfxPort_cfg.h
  • IfxPort_InputMode : IfxPort.h
  • IfxPort_Mode : IfxPort.h
  • IfxPort_OutputIdx : IfxPort.h
  • IfxPort_OutputMode : IfxPort.h
  • IfxPort_PadDriver : IfxPort.h
  • IfxPort_PadSupply : IfxPort.h
  • IfxPort_State : IfxPort.h
  • IfxPsi5_AlternateInput : IfxPsi5.h
  • IfxPsi5_BaudRate : IfxPsi5.h
  • IfxPsi5_ChannelId : IfxPsi5_cfg.h
  • IfxPsi5_ClockType : IfxPsi5.h
  • IfxPsi5_CRCorParity : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth : IfxPsi5.h
  • IfxPsi5_DividerMode : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister : IfxPsi5.h
  • IfxPsi5_FrameExpectation : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest : IfxPsi5.h
  • IfxPsi5_InterruptStatusRegister : IfxPsi5.h
  • IfxPsi5_MessagingBits : IfxPsi5.h
  • IfxPsi5_ReceiveDataRegisterTimestamp : IfxPsi5.h
  • IfxPsi5_ReceiverControlRegister : IfxPsi5.h
  • IfxPsi5_Slot : IfxPsi5.h
  • IfxPsi5_SuspendMode : IfxPsi5.h
  • IfxPsi5_TimeBase : IfxPsi5.h
  • IfxPsi5_TimestampRegister : IfxPsi5.h
  • IfxPsi5_Trigger : IfxPsi5.h
  • IfxPsi5_TriggerType : IfxPsi5.h
  • IfxPsi5_Verbose : IfxPsi5.h
  • IfxPsi5s_AlternateInput : IfxPsi5s.h
  • IfxPsi5s_AscBaudratePrescalar : IfxPsi5s.h
  • IfxPsi5s_AscMode : IfxPsi5s.h
  • IfxPsi5s_AscStopBits : IfxPsi5s.h
  • IfxPsi5s_ChannelId : IfxPsi5s.h
  • IfxPsi5s_ClockType : IfxPsi5s.h
  • IfxPsi5s_CrcOrParity : IfxPsi5s.h
  • IfxPsi5s_DividerMode : IfxPsi5s.h
  • IfxPsi5s_EnhancedProtocol : IfxPsi5s.h
  • IfxPsi5s_FrameId : IfxPsi5s.h
  • IfxPsi5s_IdleTime : IfxPsi5s.h
  • IfxPsi5s_LoopBackMode : IfxPsi5s.h
  • IfxPsi5s_MessagingBits : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames : IfxPsi5s.h
  • IfxPsi5s_SleepMode : IfxPsi5s.h
  • IfxPsi5s_SuspendMode : IfxPsi5s.h
  • IfxPsi5s_TimeBase : IfxPsi5s.h
  • IfxPsi5s_TimestampRegister : IfxPsi5s.h
  • IfxPsi5s_TimestampTrigger : IfxPsi5s.h
  • IfxPsi5s_Trigger : IfxPsi5s.h
  • IfxPsi5s_TriggerType : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount : IfxPsi5s.h
  • IfxPsi5s_WatchdogTimerMode : IfxPsi5s.h
  • IfxQspi_ChannelId : IfxQspi.h
  • IfxQspi_DataLengthUnit : IfxQspi.h
  • IfxQspi_Error : IfxQspi.h
  • IfxQspi_ExpectTimeout : IfxQspi.h
  • IfxQspi_FifoMode : IfxQspi.h
  • IfxQspi_Index : IfxQspi_cfg.h
  • IfxQspi_Mode : IfxQspi.h
  • IfxQspi_PauseRunTransition : IfxQspi.h
  • IfxQspi_Phase : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent : IfxQspi.h
  • IfxQspi_Reset : IfxQspi.h
  • IfxQspi_RxFifoInt : IfxQspi.h
  • IfxQspi_SleepMode : IfxQspi.h
  • IfxQspi_SpiMaster_ChannelBasedCs : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode : IfxQspi_SpiMaster.h
  • IfxQspi_StrobeDelay : IfxQspi.h
  • IfxQspi_SuspendMode : IfxQspi.h
  • IfxQspi_TxFifoInt : IfxQspi.h
  • IfxScu_CCUCON0_CLKSEL : IfxScu_cfg.h
  • IfxScu_CCUCON1_INSEL : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP : IfxScu_cfg.h
  • IfxScu_WDTCON1_IR : IfxScu_cfg.h
  • IfxScuCcu_K1divider : IfxScuCcu.h
  • IfxScuCcu_K2divider : IfxScuCcu.h
  • IfxScuCcu_K3divider : IfxScuCcu.h
  • IfxScuCcu_Ndivider : IfxScuCcu.h
  • IfxScuCcu_Pdivider : IfxScuCcu.h
  • IfxScuEru_ExternalInputSelection : IfxScuEru.h
  • IfxScuEru_InputChannel : IfxScuEru.h
  • IfxScuEru_InputNodePointer : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern : IfxScuEru.h
  • IfxScuEru_OutputChannel : IfxScuEru.h
  • IfxSent_AlternateInput : IfxSent.h
  • IfxSent_ChannelId : IfxSent_cfg.h
  • IfxSent_ChannelStatus : IfxSent.h
  • IfxSent_ClockDividerMode : IfxSent.h
  • IfxSent_ConfigBit : IfxSent.h
  • IfxSent_DigitalGlitchesLength : IfxSent.h
  • IfxSent_ExtendedSerialFrameMode : IfxSent.h
  • IfxSent_ExternalTrigger : IfxSent.h
  • IfxSent_FrameCheckMode : IfxSent.h
  • IfxSent_InterruptNodePointer : IfxSent.h
  • IfxSent_InterruptSource : IfxSent.h
  • IfxSent_Nibble : IfxSent.h
  • IfxSent_SleepMode : IfxSent.h
  • IfxSent_SpcMode : IfxSent.h
  • IfxSent_SuspendMode : IfxSent.h
  • IfxSent_TimeBase : IfxSent.h
  • IfxSent_TriggerSource : IfxSent.h
  • IfxSmu_Alarm : IfxSmu_cfg.h
  • IfxSmu_AlarmConfig : IfxSmu.h
  • IfxSmu_AlarmGroup : IfxSmu_cfg.h
  • IfxSmu_Cmd : IfxSmu.h
  • IfxSmu_Fsp_Mode : IfxSmu.h
  • IfxSmu_RecoveryTimer : IfxSmu_cfg.h
  • IfxSrc_Tos : IfxSrc_cfg.h
  • IfxStdIf_Pos_Dir : IfxStdIf_Pos.h
  • IfxStdIf_Pos_MotionType : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResolutionFactor : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType : IfxStdIf_Pos.h
  • IfxStdIf_Timer_CountDir : IfxStdIf_Timer.h
  • IfxStdIf_Timer_OutputEvent : IfxStdIf_Timer.h
  • IfxStm_Comparator : IfxStm.h
  • IfxStm_ComparatorInterrupt : IfxStm.h
  • IfxStm_ComparatorOffset : IfxStm.h
  • IfxStm_ComparatorSize : IfxStm.h
  • IfxStm_Index : IfxStm_cfg.h
  • IfxStm_SleepMode : IfxStm.h
  • IfxStm_SuspendMode : IfxStm.h
  • IfxVadc_AnalogConverterMode : IfxVadc.h
  • IfxVadc_ArbitrationRounds : IfxVadc.h
  • IfxVadc_BoundaryExtension : IfxVadc.h
  • IfxVadc_BoundarySelection : IfxVadc.h
  • IfxVadc_ChannelId : IfxVadc.h
  • IfxVadc_ChannelReference : IfxVadc.h
  • IfxVadc_ChannelResolution : IfxVadc.h
  • IfxVadc_ChannelResult : IfxVadc.h
  • IfxVadc_ChannelSelectionStyle : IfxVadc.h
  • IfxVadc_ConversionType : IfxVadc.h
  • IfxVadc_EmuxCodingScheme : IfxVadc.h
  • IfxVadc_EmuxInterface : IfxVadc.h
  • IfxVadc_EmuxSampleTimeControl : IfxVadc.h
  • IfxVadc_EmuxSelectValue : IfxVadc.h
  • IfxVadc_ExternalMultiplexerMode : IfxVadc.h
  • IfxVadc_FifoMode : IfxVadc.h
  • IfxVadc_GatingMode : IfxVadc.h
  • IfxVadc_GatingSource : IfxVadc.h
  • IfxVadc_GroupId : IfxVadc_cfg.h
  • IfxVadc_InputClasses : IfxVadc.h
  • IfxVadc_LimitCheck : IfxVadc.h
  • IfxVadc_LowSupplyVoltageSelect : IfxVadc.h
  • IfxVadc_Protection : IfxVadc.h
  • IfxVadc_RequestSlotPriority : IfxVadc.h
  • IfxVadc_RequestSlotStartMode : IfxVadc.h
  • IfxVadc_RequestSource : IfxVadc.h
  • IfxVadc_SleepMode : IfxVadc.h
  • IfxVadc_SrcNr : IfxVadc.h
  • IfxVadc_Status : IfxVadc.h
  • IfxVadc_TriggerMode : IfxVadc.h
  • IfxVadc_TriggerSource : IfxVadc.h


iLLD_TC26B: Globals

- s -

  • SpiIf_ClockPolarity : SpiIf.h
  • SpiIf_DataHeading : SpiIf.h
  • SpiIf_Mode : SpiIf.h
  • SpiIf_ShiftClock : SpiIf.h
  • SpiIf_SlsoTiming : SpiIf.h
  • SpiIf_Status : SpiIf.h


iLLD_TC26B: Globals

- i -

  • Ifx_ActiveState_high : Ifx_Types.h
  • Ifx_ActiveState_low : Ifx_Types.h
  • Ifx_DataBufferMode_normal : Ifx_Types.h
  • Ifx_DataBufferMode_timeStampSingle : Ifx_Types.h
  • Ifx_ParityMode_even : Ifx_Types.h
  • Ifx_ParityMode_odd : Ifx_Types.h
  • Ifx_Pwm_Mode_centerAligned : Ifx_Types.h
  • Ifx_Pwm_Mode_centerAlignedInverted : Ifx_Types.h
  • Ifx_Pwm_Mode_count : Ifx_Types.h
  • Ifx_Pwm_Mode_init : Ifx_Types.h
  • Ifx_Pwm_Mode_leftAligned : Ifx_Types.h
  • Ifx_Pwm_Mode_off : Ifx_Types.h
  • Ifx_Pwm_Mode_rightAligned : Ifx_Types.h
  • Ifx_RxSel_a : Ifx_Types.h
  • Ifx_RxSel_b : Ifx_Types.h
  • Ifx_RxSel_c : Ifx_Types.h
  • Ifx_RxSel_d : Ifx_Types.h
  • Ifx_RxSel_e : Ifx_Types.h
  • Ifx_RxSel_f : Ifx_Types.h
  • Ifx_RxSel_g : Ifx_Types.h
  • Ifx_RxSel_h : Ifx_Types.h
  • IFX_SHELL_CMD_STATE_ESCAPE : Ifx_Shell.h
  • IFX_SHELL_CMD_STATE_ESCAPE_BRACKET : Ifx_Shell.h
  • IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER : Ifx_Shell.h
  • IFX_SHELL_CMD_STATE_NORMAL : Ifx_Shell.h
  • Ifx_Shell_ResultCode_nok : Ifx_Shell.h
  • Ifx_Shell_ResultCode_ok : Ifx_Shell.h
  • Ifx_Shell_ResultCode_undefined : Ifx_Shell.h
  • Ifx_Shell_ResultCode_unknown : Ifx_Shell.h
  • IfxAsclin_Checksum_classic : IfxAsclin.h
  • IfxAsclin_Checksum_enhanced : IfxAsclin.h
  • IfxAsclin_ChecksumInjection_notWritten : IfxAsclin.h
  • IfxAsclin_ChecksumInjection_written : IfxAsclin.h
  • IfxAsclin_ClockPolarity_idleHigh : IfxAsclin.h
  • IfxAsclin_ClockPolarity_idleLow : IfxAsclin.h
  • IfxAsclin_ClockSource_ascFastClock : IfxAsclin.h
  • IfxAsclin_ClockSource_ascSlowClock : IfxAsclin.h
  • IfxAsclin_ClockSource_flexRayClock : IfxAsclin.h
  • IfxAsclin_ClockSource_kernelClock : IfxAsclin.h
  • IfxAsclin_ClockSource_noClock : IfxAsclin.h
  • IfxAsclin_ClockSource_oscillatorClock : IfxAsclin.h
  • IfxAsclin_CtsInputSelect_0 : IfxAsclin.h
  • IfxAsclin_CtsInputSelect_1 : IfxAsclin.h
  • IfxAsclin_CtsInputSelect_2 : IfxAsclin.h
  • IfxAsclin_CtsInputSelect_3 : IfxAsclin.h
  • IfxAsclin_DataLength_1 : IfxAsclin.h
  • IfxAsclin_DataLength_10 : IfxAsclin.h
  • IfxAsclin_DataLength_11 : IfxAsclin.h
  • IfxAsclin_DataLength_12 : IfxAsclin.h
  • IfxAsclin_DataLength_13 : IfxAsclin.h
  • IfxAsclin_DataLength_14 : IfxAsclin.h
  • IfxAsclin_DataLength_15 : IfxAsclin.h
  • IfxAsclin_DataLength_16 : IfxAsclin.h
  • IfxAsclin_DataLength_2 : IfxAsclin.h
  • IfxAsclin_DataLength_3 : IfxAsclin.h
  • IfxAsclin_DataLength_4 : IfxAsclin.h
  • IfxAsclin_DataLength_5 : IfxAsclin.h
  • IfxAsclin_DataLength_6 : IfxAsclin.h
  • IfxAsclin_DataLength_7 : IfxAsclin.h
  • IfxAsclin_DataLength_8 : IfxAsclin.h
  • IfxAsclin_DataLength_9 : IfxAsclin.h
  • IfxAsclin_FrameMode_asc : IfxAsclin.h
  • IfxAsclin_FrameMode_initialise : IfxAsclin.h
  • IfxAsclin_FrameMode_lin : IfxAsclin.h
  • IfxAsclin_FrameMode_spi : IfxAsclin.h
  • IfxAsclin_HeaderResponseSelect_headerAndResponse : IfxAsclin.h
  • IfxAsclin_HeaderResponseSelect_headerOnly : IfxAsclin.h
  • IfxAsclin_IdleDelay_0 : IfxAsclin.h
  • IfxAsclin_IdleDelay_1 : IfxAsclin.h
  • IfxAsclin_IdleDelay_2 : IfxAsclin.h
  • IfxAsclin_IdleDelay_3 : IfxAsclin.h
  • IfxAsclin_IdleDelay_4 : IfxAsclin.h
  • IfxAsclin_IdleDelay_5 : IfxAsclin.h
  • IfxAsclin_IdleDelay_6 : IfxAsclin.h
  • IfxAsclin_IdleDelay_7 : IfxAsclin.h
  • IfxAsclin_Index_0 : IfxAsclin_cfg.h
  • IfxAsclin_Index_1 : IfxAsclin_cfg.h
  • IfxAsclin_Index_2 : IfxAsclin_cfg.h
  • IfxAsclin_Index_3 : IfxAsclin_cfg.h
  • IfxAsclin_Index_none : IfxAsclin_cfg.h
  • IfxAsclin_LeadDelay_0 : IfxAsclin.h
  • IfxAsclin_LeadDelay_1 : IfxAsclin.h
  • IfxAsclin_LeadDelay_2 : IfxAsclin.h
  • IfxAsclin_LeadDelay_3 : IfxAsclin.h
  • IfxAsclin_LeadDelay_4 : IfxAsclin.h
  • IfxAsclin_LeadDelay_5 : IfxAsclin.h
  • IfxAsclin_LeadDelay_6 : IfxAsclin.h
  • IfxAsclin_LeadDelay_7 : IfxAsclin.h
  • IfxAsclin_Lin_Direction_TransmitHeader : IfxAsclin_Lin.h
  • IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse : IfxAsclin_Lin.h
  • IfxAsclin_Lin_Direction_TransmitHeaderAndResponse : IfxAsclin_Lin.h
  • IfxAsclin_LinMode_master : IfxAsclin.h
  • IfxAsclin_LinMode_slave : IfxAsclin.h
  • IfxAsclin_LinResponseTimeoutMode_frameTimeout : IfxAsclin.h
  • IfxAsclin_LinResponseTimeoutMode_responseTimeout : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_10 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_11 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_12 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_13 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_14 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_15 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_16 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_4 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_5 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_6 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_7 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_8 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_9 : IfxAsclin.h
  • IfxAsclin_ParityType_even : IfxAsclin.h
  • IfxAsclin_ParityType_odd : IfxAsclin.h
  • IfxAsclin_ReceiveBufferMode_rxBuffer : IfxAsclin.h
  • IfxAsclin_ReceiveBufferMode_rxFifo : IfxAsclin.h
  • IfxAsclin_RtsCtsPolarity_activeHigh : IfxAsclin.h
  • IfxAsclin_RtsCtsPolarity_activeLow : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_1 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_10 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_11 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_12 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_13 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_14 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_15 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_16 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_2 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_3 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_4 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_5 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_6 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_7 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_8 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_9 : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth_0 : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth_1 : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth_2 : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth_3 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_0 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_1 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_2 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_3 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_4 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_5 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_6 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_7 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_1 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_10 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_11 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_12 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_13 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_14 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_15 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_2 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_3 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_4 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_5 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_6 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_7 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_8 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_9 : IfxAsclin.h
  • IfxAsclin_SamplesPerBit_one : IfxAsclin.h
  • IfxAsclin_SamplesPerBit_three : IfxAsclin.h
  • IfxAsclin_ShiftDirection_lsbFirst : IfxAsclin.h
  • IfxAsclin_ShiftDirection_msbFirst : IfxAsclin.h
  • IfxAsclin_SlavePolarity_idlehigh : IfxAsclin.h
  • IfxAsclin_SlavePolarity_idleLow : IfxAsclin.h
  • IfxAsclin_SleepMode_disable : IfxAsclin.h
  • IfxAsclin_SleepMode_enable : IfxAsclin.h
  • IfxAsclin_Spi_Status_busy : IfxAsclin_Spi.h
  • IfxAsclin_Spi_Status_ok : IfxAsclin_Spi.h
  • IfxAsclin_Spi_Status_unknown : IfxAsclin_Spi.h
  • IfxAsclin_Status_configurationError : IfxAsclin.h
  • IfxAsclin_Status_noError : IfxAsclin.h
  • IfxAsclin_StopBit_0 : IfxAsclin.h
  • IfxAsclin_StopBit_1 : IfxAsclin.h
  • IfxAsclin_StopBit_2 : IfxAsclin.h
  • IfxAsclin_StopBit_3 : IfxAsclin.h
  • IfxAsclin_StopBit_4 : IfxAsclin.h
  • IfxAsclin_StopBit_5 : IfxAsclin.h
  • IfxAsclin_StopBit_6 : IfxAsclin.h
  • IfxAsclin_StopBit_7 : IfxAsclin.h
  • IfxAsclin_SuspendMode_hard : IfxAsclin.h
  • IfxAsclin_SuspendMode_none : IfxAsclin.h
  • IfxAsclin_SuspendMode_soft : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth_0 : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth_1 : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth_2 : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth_3 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_0 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_1 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_10 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_11 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_12 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_13 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_14 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_15 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_2 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_3 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_4 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_5 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_6 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_7 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_8 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_9 : IfxAsclin.h
  • IfxCcu6_CaptureCompareInput_cC60 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cC61 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cC62 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cCPOS0 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cCPOS1 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cCPOS2 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cTRAP : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal_a : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal_b : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal_c : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal_d : IfxCcu6.h
  • IfxCcu6_CaptureCompareState_clear : IfxCcu6.h
  • IfxCcu6_CaptureCompareState_set : IfxCcu6.h
  • IfxCcu6_CaptureCompareState_toggle : IfxCcu6.h
  • IfxCcu6_ChannelOut_cc0 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cc1 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cc2 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cout0 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cout1 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cout2 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cout3 : IfxCcu6.h
  • IfxCcu6_CountingInputMode_externalFalling : IfxCcu6.h
  • IfxCcu6_CountingInputMode_externalRising : IfxCcu6.h
  • IfxCcu6_CountingInputMode_internal : IfxCcu6.h
  • IfxCcu6_CountingInputMode_manual : IfxCcu6.h
  • IfxCcu6_DelayBypass_active : IfxCcu6.h
  • IfxCcu6_DelayBypass_notActive : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode_anyEdge : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode_disable : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode_fallingEdge : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode_risingEdge : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_cM61CountingDown : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_cM61CountingUp : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_cM63 : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_off : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_permanentCheck : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_t12OMCountingDown : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_t12PMCountingUp : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_t13PM : IfxCcu6.h
  • IfxCcu6_Index_0 : IfxCcu6_cfg.h
  • IfxCcu6_Index_1 : IfxCcu6_cfg.h
  • IfxCcu6_Index_none : IfxCcu6_cfg.h
  • IfxCcu6_InterruptSource_cc60FallingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc60RisingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc61FallingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc61RisingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc62FallingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc62RisingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_correctHallEvent : IfxCcu6.h
  • IfxCcu6_InterruptSource_t12OneMatch : IfxCcu6.h
  • IfxCcu6_InterruptSource_t12PeriodMatch : IfxCcu6.h
  • IfxCcu6_InterruptSource_t13CompareMatch : IfxCcu6.h
  • IfxCcu6_InterruptSource_t13PeriodMatch : IfxCcu6.h
  • IfxCcu6_InterruptSource_trap : IfxCcu6.h
  • IfxCcu6_InterruptSource_wrongHallEvent : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_noEvent : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSync_direct : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch : IfxCcu6.h
  • IfxCcu6_ServiceRequest_0 : IfxCcu6.h
  • IfxCcu6_ServiceRequest_1 : IfxCcu6.h
  • IfxCcu6_ServiceRequest_2 : IfxCcu6.h
  • IfxCcu6_ServiceRequest_3 : IfxCcu6.h
  • IfxCcu6_SleepMode_disable : IfxCcu6.h
  • IfxCcu6_SleepMode_enable : IfxCcu6.h
  • IfxCcu6_SuspendMode_hard : IfxCcu6.h
  • IfxCcu6_SuspendMode_none : IfxCcu6.h
  • IfxCcu6_SuspendMode_soft : IfxCcu6.h
  • IfxCcu6_T12Channel_0 : IfxCcu6.h
  • IfxCcu6_T12Channel_1 : IfxCcu6.h
  • IfxCcu6_T12Channel_2 : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_compareMode : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_hallSensor : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_hysteresisLikecompare : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureAny : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureBothRising : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_off : IfxCcu6.h
  • IfxCcu6_T12CountDirection_down : IfxCcu6.h
  • IfxCcu6_T12CountDirection_up : IfxCcu6.h
  • IfxCcu6_T12CountMode_centerAligned : IfxCcu6.h
  • IfxCcu6_T12CountMode_edgeAligned : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection_anyT12 : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection_noAction : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection_onT12CountingDown : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection_onT12CountingUp : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_noAction : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onAnyT12Compare : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onCC60RCompare : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onCC61RCompare : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onCC62RCompare : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onCCPOSxEdge : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onT12Period : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onT12Zero : IfxCcu6.h
  • IfxCcu6_TimerId_t12 : IfxCcu6.h
  • IfxCcu6_TimerId_t13 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By128 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By16 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By2 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By32 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By4 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By64 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By8 : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_a : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_b : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_c : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_d : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_e : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_f : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_g : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_h : IfxCcu6.h
  • IfxCcu6_TimerRunStatus_running : IfxCcu6.h
  • IfxCcu6_TimerRunStatus_stopped : IfxCcu6.h
  • IfxCcu6_TrapMode_automatic : IfxCcu6.h
  • IfxCcu6_TrapMode_manual : IfxCcu6.h
  • IfxCcu6_TrapState_immediate : IfxCcu6.h
  • IfxCcu6_TrapState_t12Sync : IfxCcu6.h
  • IfxCcu6_TrapState_t13Sync : IfxCcu6.h
  • IfxCcu6_TrigOut_0 : IfxCcu6_cfg.h
  • IfxCcu6_TrigOut_1 : IfxCcu6_cfg.h
  • IfxCcu6_TrigOut_2 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_cc60 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_cc61 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_cc62 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_cout63 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_sr1 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_sr3 : IfxCcu6_cfg.h
  • IfxCif_Cam_IspMode_raw : IfxCif_Cam.h
  • IfxCif_Cam_IspMode_undefined : IfxCif_Cam.h
  • IfxCif_Cam_IspMode_yuvInterleaved : IfxCif_Cam.h
  • IfxCif_Cam_IspMode_yuvPlanar : IfxCif_Cam.h
  • IfxCif_Cam_State_running : IfxCif_Cam.h
  • IfxCif_Cam_State_stopped : IfxCif_Cam.h
  • IfxCif_Cam_Status_cameraCommError : IfxCif_Cam.h
  • IfxCif_Cam_Status_notAvailable : IfxCif_Cam.h
  • IfxCif_Cam_Status_notEnoughMemory : IfxCif_Cam.h
  • IfxCif_Cam_Status_ok : IfxCif_Cam.h
  • IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder : IfxCif.h
  • IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed : IfxCif.h
  • IfxCif_DataPathSelectorForMainPath_Disabled : IfxCif.h
  • IfxCif_DpControlSources_FrameNumberCounter : IfxCif.h
  • IfxCif_DpControlSources_LineNumberCounter : IfxCif.h
  • IfxCif_DpControlSources_TimestampCounter : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol1 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol2 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol3 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol4 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol5 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol6 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol7 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol8 : IfxCif.h
  • IfxCif_DpCounters_FrameNumberCounter : IfxCif.h
  • IfxCif_DpCounters_LineNumberCounter : IfxCif.h
  • IfxCif_DpCounters_PredividerCounter : IfxCif.h
  • IfxCif_DpCounters_TimestampCounter : IfxCif.h
  • IfxCif_DpSourcePath_ExtraPath1 : IfxCif.h
  • IfxCif_DpSourcePath_ExtraPath2 : IfxCif.h
  • IfxCif_DpSourcePath_ExtraPath4 : IfxCif.h
  • IfxCif_DpSourcePath_ExtraPath5 : IfxCif.h
  • IfxCif_DpSourcePath_MainPath : IfxCif.h
  • IfxCif_EpErrorClearSources_ExtraPath1SizeError : IfxCif.h
  • IfxCif_EpErrorClearSources_ExtraPath2SizeError : IfxCif.h
  • IfxCif_EpErrorClearSources_ExtraPath3SizeError : IfxCif.h
  • IfxCif_EpErrorClearSources_ExtraPath4SizeError : IfxCif.h
  • IfxCif_EpErrorClearSources_ExtraPath5SizeError : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath1FifoFull : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath1SizeError : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath2FifoFull : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath2SizeError : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath3FifoFull : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath3SizeError : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath4FifoFull : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath4SizeError : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath5FifoFull : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath5SizeError : IfxCif.h
  • IfxCif_EpFeatures_ByteSwap : IfxCif.h
  • IfxCif_EpFeatures_InitBaseAddress : IfxCif.h
  • IfxCif_EpFeatures_InitOffsetCounter : IfxCif.h
  • IfxCif_EpFeatures_PictureDataPath : IfxCif.h
  • IfxCif_EpInterrupts_Count : IfxCif.h
  • IfxCif_EpInterrupts_FillLevel : IfxCif.h
  • IfxCif_EpInterrupts_FrameEnd : IfxCif.h
  • IfxCif_EpInterrupts_MacroBlockLine : IfxCif.h
  • IfxCif_EpInterrupts_WrapAround : IfxCif.h
  • IfxCif_EpWriteFormat_Raw8Bit : IfxCif.h
  • IfxCif_EpWriteFormat_RawAndData : IfxCif.h
  • IfxCif_EpWriteFormat_RawGreater : IfxCif.h
  • IfxCif_EpWriteFormat_YCbCr : IfxCif.h
  • IfxCif_ErrorState_Error : IfxCif.h
  • IfxCif_ErrorState_NoError : IfxCif.h
  • IfxCif_ExtraPath_1 : IfxCif.h
  • IfxCif_ExtraPath_2 : IfxCif.h
  • IfxCif_ExtraPath_3 : IfxCif.h
  • IfxCif_ExtraPath_4 : IfxCif.h
  • IfxCif_ExtraPath_5 : IfxCif.h
  • IfxCif_HuffmanTableComponents_Component0 : IfxCif.h
  • IfxCif_HuffmanTableComponents_Component1 : IfxCif.h
  • IfxCif_HuffmanTableComponents_Component2 : IfxCif.h
  • IfxCif_HuffmanTables_Table0 : IfxCif.h
  • IfxCif_HuffmanTables_Table1 : IfxCif.h
  • IfxCif_ImageTiers_Horizontal : IfxCif.h
  • IfxCif_ImageTiers_Vertical : IfxCif.h
  • IfxCif_InputInterface_ParallelInterface : IfxCif.h
  • IfxCif_InterruptTriggeredState_NotTriggered : IfxCif.h
  • IfxCif_InterruptTriggeredState_Triggered : IfxCif.h
  • IfxCif_IspCcirSequence_CbYCrY : IfxCif.h
  • IfxCif_IspCcirSequence_YCbYCr : IfxCif.h
  • IfxCif_IspCcirSequence_YCrYCb : IfxCif.h
  • IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255 : IfxCif.h
  • IfxCif_IspColorSpaceMatrixCrominanceClippingRange_16To240 : IfxCif.h
  • IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255 : IfxCif.h
  • IfxCif_IspColorSpaceMatrixLuminanceClippingRange_16To235 : IfxCif.h
  • IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule : IfxCif.h
  • IfxCif_IspErrorSources_SizeErrorInInformSubmodule : IfxCif.h
  • IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule : IfxCif.h
  • IfxCif_IspFieldSelection_AllFields : IfxCif.h
  • IfxCif_IspFieldSelection_OnlyEvenFields : IfxCif.h
  • IfxCif_IspFieldSelection_OnlyOddFields : IfxCif.h
  • IfxCif_IspInformFieldInformation_Even : IfxCif.h
  • IfxCif_IspInformFieldInformation_Odd : IfxCif.h
  • IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb : IfxCif.h
  • IfxCif_IspInputInterface_10BitExternalInterfaceAppendZeros : IfxCif.h
  • IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb : IfxCif.h
  • IfxCif_IspInputInterface_12BitExternalInterfaceAppendZeros : IfxCif.h
  • IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb : IfxCif.h
  • IfxCif_IspInputInterface_14BitExternalInterfaceAppendZeros : IfxCif.h
  • IfxCif_IspInputInterface_16BitExternalInterface : IfxCif.h
  • IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb : IfxCif.h
  • IfxCif_IspInputInterface_8BitExternalInterfaceAppendZeros : IfxCif.h
  • IfxCif_IspInterruptSources_FrameCompletelyPutOut : IfxCif.h
  • IfxCif_IspInterruptSources_IspTurnedOff : IfxCif.h
  • IfxCif_IspInterruptSources_LossOfData : IfxCif.h
  • IfxCif_IspInterruptSources_PictureSizeViolationOccurred : IfxCif.h
  • IfxCif_IspInterruptSources_SampledInputFrameComplete : IfxCif.h
  • IfxCif_IspInterruptSources_SecurityWatchdogTimeout : IfxCif.h
  • IfxCif_IspInterruptSources_StartEdgeOfHSync : IfxCif.h
  • IfxCif_IspInterruptSources_StartEdgeOfVSync : IfxCif.h
  • IfxCif_IspMode_DataMode : IfxCif.h
  • IfxCif_IspMode_ItuRBT601 : IfxCif.h
  • IfxCif_IspMode_ItuRBT656 : IfxCif.h
  • IfxCif_IspMode_RawPicture : IfxCif.h
  • IfxCif_IspMode_RawPictureWithItuRBT656Sync : IfxCif.h
  • IfxCif_IspSamplingEdge_NegativeEdge : IfxCif.h
  • IfxCif_IspSamplingEdge_PositiveEdge : IfxCif.h
  • IfxCif_IspSyncPolarity_HighActive : IfxCif.h
  • IfxCif_IspSyncPolarity_LowActive : IfxCif.h
  • IfxCif_JpeDebugSignalSources_BadTableAccess : IfxCif.h
  • IfxCif_JpeDebugSignalSources_QiqTableAccess : IfxCif.h
  • IfxCif_JpeDebugSignalSources_R2BMemoryFull : IfxCif.h
  • IfxCif_JpeDebugSignalSources_VlcEncodeBusy : IfxCif.h
  • IfxCif_JpeDebugSignalSources_VlcTableBusy : IfxCif.h
  • IfxCif_JpeDebugSignalState_Active : IfxCif.h
  • IfxCif_JpeDebugSignalState_Inactive : IfxCif.h
  • IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically : IfxCif.h
  • IfxCif_JpegJfifStreamEncoderContinuousMode_StartAutomatically : IfxCif.h
  • IfxCif_JpegJfifStreamEncoderContinuousMode_StopAtFrameEnd : IfxCif.h
  • IfxCif_JpegPictureEncodingFormat_400 : IfxCif.h
  • IfxCif_JpegPictureEncodingFormat_422 : IfxCif.h
  • IfxCif_JpeHeaderGenerationMode_TransmitLastHeaderBytes : IfxCif.h
  • IfxCif_JpeHeaderGenerationMode_WaitForEncodedImage : IfxCif.h
  • IfxCif_JpeHeaderMode_JfifHeader : IfxCif.h
  • IfxCif_JpeHeaderMode_NoAppnHeader : IfxCif.h
  • IfxCif_JpeInterruptSources_DcTableError : IfxCif.h
  • IfxCif_JpeInterruptSources_EncodingComplete : IfxCif.h
  • IfxCif_JpeInterruptSources_HeaderGenerationComplete : IfxCif.h
  • IfxCif_JpeInterruptSources_R2BImageSizeError : IfxCif.h
  • IfxCif_JpeInterruptSources_VlcSymbolError : IfxCif.h
  • IfxCif_JpeInterruptSources_VlcTableError : IfxCif.h
  • IfxCif_JpeQTableSelector_Table0 : IfxCif.h
  • IfxCif_JpeQTableSelector_Table1 : IfxCif.h
  • IfxCif_JpeQTableSelector_Table2 : IfxCif.h
  • IfxCif_JpeQTableSelector_Table3 : IfxCif.h
  • IfxCif_JpeQTableSelectorComponents_U : IfxCif.h
  • IfxCif_JpeQTableSelectorComponents_V : IfxCif.h
  • IfxCif_JpeQTableSelectorComponents_Y : IfxCif.h
  • IfxCif_JpeScalingValueSources_CbCr : IfxCif.h
  • IfxCif_JpeScalingValueSources_Y : IfxCif.h
  • IfxCif_JpeState_Busy : IfxCif.h
  • IfxCif_JpeState_Free : IfxCif.h
  • IfxCif_JpeTableId_QTable0 : IfxCif.h
  • IfxCif_JpeTableId_QTable1 : IfxCif.h
  • IfxCif_JpeTableId_QTable2 : IfxCif.h
  • IfxCif_JpeTableId_QTable3 : IfxCif.h
  • IfxCif_JpeTableId_VlcAcTable0 : IfxCif.h
  • IfxCif_JpeTableId_VlcAcTable1 : IfxCif.h
  • IfxCif_JpeTableId_VlcDcTable0 : IfxCif.h
  • IfxCif_JpeTableId_VlcDcTable1 : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode_Disabled : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode_DoublePass : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode_DoubleSkip : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode_SinglePass : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode_SingleSkip : IfxCif.h
  • IfxCif_MiBurstLength_4BeatBursts : IfxCif.h
  • IfxCif_MiBurstLength_8BeatBursts : IfxCif.h
  • IfxCif_MiDataPaths_JpegData : IfxCif.h
  • IfxCif_MiDataPaths_MainPictureData : IfxCif.h
  • IfxCif_MiDataPaths_RawData : IfxCif.h
  • IfxCif_MiInterruptSources_BusError : IfxCif.h
  • IfxCif_MiInterruptSources_FillMainPictureY : IfxCif.h
  • IfxCif_MiInterruptSources_MacroBlockLine : IfxCif.h
  • IfxCif_MiInterruptSources_MainPictureFrameEnd : IfxCif.h
  • IfxCif_MiInterruptSources_WrapMainPictureCb : IfxCif.h
  • IfxCif_MiInterruptSources_WrapMainPictureCr : IfxCif.h
  • IfxCif_MiInterruptSources_WrapMainPictureY : IfxCif.h
  • IfxCif_MiMainPicturePathComponents_Cb : IfxCif.h
  • IfxCif_MiMainPicturePathComponents_Cr : IfxCif.h
  • IfxCif_MiMainPicturePathComponents_Y : IfxCif.h
  • IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit : IfxCif.h
  • IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit : IfxCif.h
  • IfxCif_MiMainPictureWriteFormat_SemiPlanarOrData8Bit : IfxCif.h
  • IfxCif_MiStatusClearSources_BusWriteError : IfxCif.h
  • IfxCif_MiStatusClearSources_ExtraPath1FifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_ExtraPath2FifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_ExtraPath3FifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_ExtraPath4FifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_ExtraPath5FifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_MainPictureCbFifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_MainPictureCrFifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_MainPictureYFifoFull : IfxCif.h
  • IfxCif_MiStatusInformationSources_BusWriteError : IfxCif.h
  • IfxCif_MiStatusInformationSources_MainPictureCbFifoFull : IfxCif.h
  • IfxCif_MiStatusInformationSources_MainPictureCrFifoFull : IfxCif.h
  • IfxCif_MiStatusInformationSources_MainPictureYFifoFull : IfxCif.h
  • IfxCif_PortInputSelection_PinMapping0 : IfxCif.h
  • IfxCif_PortInputSelection_PinMapping1 : IfxCif.h
  • IfxCif_SecurityWatchdogCounters_Horizontal : IfxCif.h
  • IfxCif_SecurityWatchdogCounters_Predivider : IfxCif.h
  • IfxCif_SecurityWatchdogCounters_Vertical : IfxCif.h
  • IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout : IfxCif.h
  • IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout : IfxCif.h
  • IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout : IfxCif.h
  • IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout : IfxCif.h
  • IfxCif_SecurityWatchdogTimeoutCounters_EndStart : IfxCif.h
  • IfxCif_SecurityWatchdogTimeoutCounters_StartEnd : IfxCif.h
  • IfxCif_State_Disabled : IfxCif.h
  • IfxCif_State_Enabled : IfxCif.h
  • IfxCif_Submodules_AllModules : IfxCif.h
  • IfxCif_Submodules_Debug : IfxCif.h
  • IfxCif_Submodules_ExtraPaths : IfxCif.h
  • IfxCif_Submodules_ImageSignalProcessing : IfxCif.h
  • IfxCif_Submodules_JpegEncoder : IfxCif.h
  • IfxCif_Submodules_LinearDownscaler : IfxCif.h
  • IfxCif_Submodules_MemoryInterface : IfxCif.h
  • IfxCif_Submodules_SecurityWatchdog : IfxCif.h
  • IfxCif_Submodules_YCSplitter : IfxCif.h
  • IfxCif_YCSplitterChannelMode_Disabled : IfxCif.h
  • IfxCif_YCSplitterChannelMode_MainPathAndRawMode : IfxCif.h
  • IfxCpu_CoreMode_halt : IfxCpu.h
  • IfxCpu_CoreMode_idle : IfxCpu.h
  • IfxCpu_CoreMode_run : IfxCpu.h
  • IfxCpu_CoreMode_sleep : IfxCpu.h
  • IfxCpu_CoreMode_stby : IfxCpu.h
  • IfxCpu_CoreMode_unknown : IfxCpu.h
  • IfxCpu_CounterMode_normal : IfxCpu.h
  • IfxCpu_CounterMode_task : IfxCpu.h
  • IfxCpu_DBGST_HALT_halt : IfxCpu_cfg.h
  • IfxCpu_DBGST_HALT_run : IfxCpu_cfg.h
  • IfxCpu_Id_0 : IfxCpu_cfg.h
  • IfxCpu_Id_1 : IfxCpu_cfg.h
  • IfxCpu_Id_none : IfxCpu_cfg.h
  • IfxCpu_Index_0 : IfxCpu_cfg.h
  • IfxCpu_Index_1 : IfxCpu_cfg.h
  • IfxCpu_Index_none : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_idleMode : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_idleModeRequest : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_normalMode : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_sleepModeRequest : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_standbyModeRequest : IfxCpu_cfg.h
  • IfxCpu_ResourceCpu_0 : IfxCpu_cfg.h
  • IfxCpu_ResourceCpu_1 : IfxCpu_cfg.h
  • IfxCpu_ResourceCpu_none : IfxCpu_cfg.h
  • IfxCpu_Trap_Assertion_Id_arithmeticOverflow : IfxCpu_Trap.h
  • IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_dataAccessSynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_programFetchSynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_programMemoryIntegrityError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_temporalAsynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_assertion : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_bus : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_contextManagement : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_instructionErrors : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_internalProtection : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_memoryManagement : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_nonMaskableInterrupt : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_systemCall : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_callDepthOverflow : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_callStackUnderflow : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_contextType : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_nestingError : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_illegalOpcode : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_invalidOperand : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_privilegeViolation : IfxCpu_Trap.h
  • IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill : IfxCpu_Trap.h
  • IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection : IfxCpu_Trap.h
  • IfxDma_BusMasterMode_supervisor : IfxDma.h
  • IfxDma_BusMasterMode_user : IfxDma.h
  • IfxDma_ChannelBusPriority_high : IfxDma.h
  • IfxDma_ChannelBusPriority_low : IfxDma.h
  • IfxDma_ChannelBusPriority_medium : IfxDma.h
  • IfxDma_ChannelId_0 : IfxDma_cfg.h
  • IfxDma_ChannelId_1 : IfxDma_cfg.h
  • IfxDma_ChannelId_10 : IfxDma_cfg.h
  • IfxDma_ChannelId_11 : IfxDma_cfg.h
  • IfxDma_ChannelId_12 : IfxDma_cfg.h
  • IfxDma_ChannelId_13 : IfxDma_cfg.h
  • IfxDma_ChannelId_14 : IfxDma_cfg.h
  • IfxDma_ChannelId_15 : IfxDma_cfg.h
  • IfxDma_ChannelId_16 : IfxDma_cfg.h
  • IfxDma_ChannelId_17 : IfxDma_cfg.h
  • IfxDma_ChannelId_18 : IfxDma_cfg.h
  • IfxDma_ChannelId_19 : IfxDma_cfg.h
  • IfxDma_ChannelId_2 : IfxDma_cfg.h
  • IfxDma_ChannelId_20 : IfxDma_cfg.h
  • IfxDma_ChannelId_21 : IfxDma_cfg.h
  • IfxDma_ChannelId_22 : IfxDma_cfg.h
  • IfxDma_ChannelId_23 : IfxDma_cfg.h
  • IfxDma_ChannelId_24 : IfxDma_cfg.h
  • IfxDma_ChannelId_25 : IfxDma_cfg.h
  • IfxDma_ChannelId_26 : IfxDma_cfg.h
  • IfxDma_ChannelId_27 : IfxDma_cfg.h
  • IfxDma_ChannelId_28 : IfxDma_cfg.h
  • IfxDma_ChannelId_29 : IfxDma_cfg.h
  • IfxDma_ChannelId_3 : IfxDma_cfg.h
  • IfxDma_ChannelId_30 : IfxDma_cfg.h
  • IfxDma_ChannelId_31 : IfxDma_cfg.h
  • IfxDma_ChannelId_32 : IfxDma_cfg.h
  • IfxDma_ChannelId_33 : IfxDma_cfg.h
  • IfxDma_ChannelId_34 : IfxDma_cfg.h
  • IfxDma_ChannelId_35 : IfxDma_cfg.h
  • IfxDma_ChannelId_36 : IfxDma_cfg.h
  • IfxDma_ChannelId_37 : IfxDma_cfg.h
  • IfxDma_ChannelId_38 : IfxDma_cfg.h
  • IfxDma_ChannelId_39 : IfxDma_cfg.h
  • IfxDma_ChannelId_4 : IfxDma_cfg.h
  • IfxDma_ChannelId_40 : IfxDma_cfg.h
  • IfxDma_ChannelId_41 : IfxDma_cfg.h
  • IfxDma_ChannelId_42 : IfxDma_cfg.h
  • IfxDma_ChannelId_43 : IfxDma_cfg.h
  • IfxDma_ChannelId_44 : IfxDma_cfg.h
  • IfxDma_ChannelId_45 : IfxDma_cfg.h
  • IfxDma_ChannelId_46 : IfxDma_cfg.h
  • IfxDma_ChannelId_47 : IfxDma_cfg.h
  • IfxDma_ChannelId_5 : IfxDma_cfg.h
  • IfxDma_ChannelId_6 : IfxDma_cfg.h
  • IfxDma_ChannelId_7 : IfxDma_cfg.h
  • IfxDma_ChannelId_8 : IfxDma_cfg.h
  • IfxDma_ChannelId_9 : IfxDma_cfg.h
  • IfxDma_ChannelId_none : IfxDma_cfg.h
  • IfxDma_ChannelIncrementCircular_1024 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_128 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_16 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_16384 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_2 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_2048 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_256 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_32 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_32768 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_4 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_4096 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_512 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_64 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_8 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_8192 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_none : IfxDma.h
  • IfxDma_ChannelIncrementDirection_negative : IfxDma.h
  • IfxDma_ChannelIncrementDirection_positive : IfxDma.h
  • IfxDma_ChannelIncrementStep_1 : IfxDma.h
  • IfxDma_ChannelIncrementStep_128 : IfxDma.h
  • IfxDma_ChannelIncrementStep_16 : IfxDma.h
  • IfxDma_ChannelIncrementStep_2 : IfxDma.h
  • IfxDma_ChannelIncrementStep_32 : IfxDma.h
  • IfxDma_ChannelIncrementStep_4 : IfxDma.h
  • IfxDma_ChannelIncrementStep_64 : IfxDma.h
  • IfxDma_ChannelIncrementStep_8 : IfxDma.h
  • IfxDma_ChannelInterruptControl_thresholdLimitMatch : IfxDma.h
  • IfxDma_ChannelInterruptControl_transferCountDecremented : IfxDma.h
  • IfxDma_ChannelMove_1 : IfxDma.h
  • IfxDma_ChannelMove_16 : IfxDma.h
  • IfxDma_ChannelMove_2 : IfxDma.h
  • IfxDma_ChannelMove_3 : IfxDma.h
  • IfxDma_ChannelMove_4 : IfxDma.h
  • IfxDma_ChannelMove_5 : IfxDma.h
  • IfxDma_ChannelMove_8 : IfxDma.h
  • IfxDma_ChannelMove_9 : IfxDma.h
  • IfxDma_ChannelMoveSize_128bit : IfxDma.h
  • IfxDma_ChannelMoveSize_16bit : IfxDma.h
  • IfxDma_ChannelMoveSize_256bit : IfxDma.h
  • IfxDma_ChannelMoveSize_32bit : IfxDma.h
  • IfxDma_ChannelMoveSize_64bit : IfxDma.h
  • IfxDma_ChannelMoveSize_8bit : IfxDma.h
  • IfxDma_ChannelOperationMode_continuous : IfxDma.h
  • IfxDma_ChannelOperationMode_single : IfxDma.h
  • IfxDma_ChannelPattern_0_disable : IfxDma.h
  • IfxDma_ChannelPattern_0_mode1 : IfxDma.h
  • IfxDma_ChannelPattern_0_mode2 : IfxDma.h
  • IfxDma_ChannelPattern_0_mode3 : IfxDma.h
  • IfxDma_ChannelPattern_1_disable : IfxDma.h
  • IfxDma_ChannelPattern_1_mode1 : IfxDma.h
  • IfxDma_ChannelPattern_1_mode2 : IfxDma.h
  • IfxDma_ChannelPattern_1_mode3 : IfxDma.h
  • IfxDma_ChannelPriority_high : IfxDma.h
  • IfxDma_ChannelPriority_low : IfxDma.h
  • IfxDma_ChannelPriority_medium : IfxDma.h
  • IfxDma_ChannelRequestMode_completeTransactionPerRequest : IfxDma.h
  • IfxDma_ChannelRequestMode_oneTransferPerRequest : IfxDma.h
  • IfxDma_ChannelRequestSource_daisyChain : IfxDma.h
  • IfxDma_ChannelRequestSource_peripheral : IfxDma.h
  • IfxDma_ChannelShadow_accumulatedLinkedList : IfxDma.h
  • IfxDma_ChannelShadow_conditionalLinkedList : IfxDma.h
  • IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch : IfxDma.h
  • IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch : IfxDma.h
  • IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch : IfxDma.h
  • IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch : IfxDma.h
  • IfxDma_ChannelShadow_dst : IfxDma.h
  • IfxDma_ChannelShadow_dstDirectWrite : IfxDma.h
  • IfxDma_ChannelShadow_linkedList : IfxDma.h
  • IfxDma_ChannelShadow_none : IfxDma.h
  • IfxDma_ChannelShadow_safeLinkedList : IfxDma.h
  • IfxDma_ChannelShadow_src : IfxDma.h
  • IfxDma_ChannelShadow_srcDirectWrite : IfxDma.h
  • IfxDma_HardwareResourcePartition_0 : IfxDma.h
  • IfxDma_HardwareResourcePartition_1 : IfxDma.h
  • IfxDma_HardwareResourcePartition_2 : IfxDma.h
  • IfxDma_HardwareResourcePartition_3 : IfxDma.h
  • IfxDma_MoveEngine_0 : IfxDma.h
  • IfxDma_MoveEngine_1 : IfxDma.h
  • IfxDma_SleepMode_disable : IfxDma.h
  • IfxDma_SleepMode_enable : IfxDma.h
  • IfxDsadc_AuxCombFilterShift_noShift : IfxDsadc.h
  • IfxDsadc_AuxCombFilterShift_shiftBy1 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterShift_shiftBy2 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterShift_shiftBy3 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterType_comb1 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterType_comb2 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterType_comb3 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterType_combF : IfxDsadc.h
  • IfxDsadc_AuxEvent_everyNewResult : IfxDsadc.h
  • IfxDsadc_AuxEvent_insideBoundary : IfxDsadc.h
  • IfxDsadc_AuxEvent_outsideBoundary : IfxDsadc.h
  • IfxDsadc_AuxGate_coupledToIntegrator : IfxDsadc.h
  • IfxDsadc_AuxGate_definedByESEL : IfxDsadc.h
  • IfxDsadc_AuxServiceRequest_altSource : IfxDsadc.h
  • IfxDsadc_AuxServiceRequest_auxFilter : IfxDsadc.h
  • IfxDsadc_AuxServiceRequest_never : IfxDsadc.h
  • IfxDsadc_CarrierWaveformMode_sine : IfxDsadc.h
  • IfxDsadc_CarrierWaveformMode_square : IfxDsadc.h
  • IfxDsadc_CarrierWaveformMode_stopped : IfxDsadc.h
  • IfxDsadc_CarrierWaveformMode_triangle : IfxDsadc.h
  • IfxDsadc_ChannelId_0 : IfxDsadc.h
  • IfxDsadc_ChannelId_2 : IfxDsadc.h
  • IfxDsadc_ChannelId_3 : IfxDsadc.h
  • IfxDsadc_CommonModeVoltage_a : IfxDsadc.h
  • IfxDsadc_CommonModeVoltage_b : IfxDsadc.h
  • IfxDsadc_CommonModeVoltage_c : IfxDsadc.h
  • IfxDsadc_FirDataShift_noShift : IfxDsadc.h
  • IfxDsadc_FirDataShift_shiftBy1 : IfxDsadc.h
  • IfxDsadc_FirDataShift_shiftBy2 : IfxDsadc.h
  • IfxDsadc_FirDataShift_shiftBy3 : IfxDsadc.h
  • IfxDsadc_FirInternalShift_noShift : IfxDsadc.h
  • IfxDsadc_FirInternalShift_shiftBy1 : IfxDsadc.h
  • IfxDsadc_InputConfig_commonModeVoltage : IfxDsadc.h
  • IfxDsadc_InputConfig_inputPin : IfxDsadc.h
  • IfxDsadc_InputConfig_referenceGround : IfxDsadc.h
  • IfxDsadc_InputConfig_supplyVoltage : IfxDsadc.h
  • IfxDsadc_InputDataSource_directInputA : IfxDsadc.h
  • IfxDsadc_InputDataSource_directInputB : IfxDsadc.h
  • IfxDsadc_InputDataSource_invertedInputA : IfxDsadc.h
  • IfxDsadc_InputDataSource_invertedInputB : IfxDsadc.h
  • IfxDsadc_InputDataSource_onChipCombined : IfxDsadc.h
  • IfxDsadc_InputDataSource_onChipStandAlone : IfxDsadc.h
  • IfxDsadc_InputGain_factor1 : IfxDsadc.h
  • IfxDsadc_InputGain_factor16 : IfxDsadc.h
  • IfxDsadc_InputGain_factor2 : IfxDsadc.h
  • IfxDsadc_InputGain_factor4 : IfxDsadc.h
  • IfxDsadc_InputGain_factor8 : IfxDsadc.h
  • IfxDsadc_InputPin_a : IfxDsadc.h
  • IfxDsadc_InputPin_b : IfxDsadc.h
  • IfxDsadc_InputPin_c : IfxDsadc.h
  • IfxDsadc_InputPin_d : IfxDsadc.h
  • IfxDsadc_IntegrationWindowSize_externalControl : IfxDsadc.h
  • IfxDsadc_IntegrationWindowSize_internalControl : IfxDsadc.h
  • IfxDsadc_IntegratorTrigger_alwaysActive : IfxDsadc.h
  • IfxDsadc_IntegratorTrigger_bypassed : IfxDsadc.h
  • IfxDsadc_IntegratorTrigger_fallingEdge : IfxDsadc.h
  • IfxDsadc_IntegratorTrigger_risingEdge : IfxDsadc.h
  • IfxDsadc_LowPowerSupply_3_3V : IfxDsadc.h
  • IfxDsadc_LowPowerSupply_5V : IfxDsadc.h
  • IfxDsadc_MainCombFilterShift_noShift : IfxDsadc.h
  • IfxDsadc_MainCombFilterShift_shiftBy1 : IfxDsadc.h
  • IfxDsadc_MainCombFilterShift_shiftBy2 : IfxDsadc.h
  • IfxDsadc_MainCombFilterShift_shiftBy3 : IfxDsadc.h
  • IfxDsadc_MainCombFilterType_comb1 : IfxDsadc.h
  • IfxDsadc_MainCombFilterType_comb2 : IfxDsadc.h
  • IfxDsadc_MainCombFilterType_comb3 : IfxDsadc.h
  • IfxDsadc_MainCombFilterType_combF : IfxDsadc.h
  • IfxDsadc_MainServiceRequest_everyNewResult : IfxDsadc.h
  • IfxDsadc_MainServiceRequest_highGateSignal : IfxDsadc.h
  • IfxDsadc_MainServiceRequest_lowGateSignal : IfxDsadc.h
  • IfxDsadc_MainServiceRequest_never : IfxDsadc.h
  • IfxDsadc_ModulatorClock_fDSD : IfxDsadc.h
  • IfxDsadc_ModulatorClock_fERAY : IfxDsadc.h
  • IfxDsadc_ModulatorClock_fOSC0 : IfxDsadc.h
  • IfxDsadc_ModulatorClock_off : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div10 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div12 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div14 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div16 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div18 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div2 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div20 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div22 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div24 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div26 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div28 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div30 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div32 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div4 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div6 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div8 : IfxDsadc.h
  • IfxDsadc_RectifierSignSource_externalA : IfxDsadc.h
  • IfxDsadc_RectifierSignSource_externalB : IfxDsadc.h
  • IfxDsadc_RectifierSignSource_nextChannel : IfxDsadc.h
  • IfxDsadc_RectifierSignSource_onChipGenerator : IfxDsadc.h
  • IfxDsadc_SampleClockSource_inputA : IfxDsadc.h
  • IfxDsadc_SampleClockSource_inputB : IfxDsadc.h
  • IfxDsadc_SampleClockSource_inputC : IfxDsadc.h
  • IfxDsadc_SampleClockSource_internal : IfxDsadc.h
  • IfxDsadc_SampleStrobe_noDataStrobe : IfxDsadc.h
  • IfxDsadc_SampleStrobe_reserved : IfxDsadc.h
  • IfxDsadc_SampleStrobe_sampleOnBothEdges : IfxDsadc.h
  • IfxDsadc_SampleStrobe_sampleOnFallingEdge : IfxDsadc.h
  • IfxDsadc_SampleStrobe_sampleOnRisingEdge : IfxDsadc.h
  • IfxDsadc_SampleStrobe_sampleOnTwoFallingEdges : IfxDsadc.h
  • IfxDsadc_SampleStrobe_sampleOnTwoRisingEdges : IfxDsadc.h
  • IfxDsadc_SleepMode_disable : IfxDsadc.h
  • IfxDsadc_SleepMode_enable : IfxDsadc.h
  • IfxDsadc_TimestampTrigger_eachEdge : IfxDsadc.h
  • IfxDsadc_TimestampTrigger_fallingEdge : IfxDsadc.h
  • IfxDsadc_TimestampTrigger_noTrigger : IfxDsadc.h
  • IfxDsadc_TimestampTrigger_risingEdge : IfxDsadc.h
  • IfxDsadc_TriggerInput_a : IfxDsadc.h
  • IfxDsadc_TriggerInput_b : IfxDsadc.h
  • IfxDsadc_TriggerInput_c : IfxDsadc.h
  • IfxDsadc_TriggerInput_d : IfxDsadc.h
  • IfxDsadc_TriggerInput_e : IfxDsadc.h
  • IfxDsadc_TriggerInput_f : IfxDsadc.h
  • IfxDsadc_TriggerInput_g : IfxDsadc.h
  • IfxDsadc_TriggerInput_h : IfxDsadc.h
  • IfxEmem_LockedState_locked : IfxEmem.h
  • IfxEmem_LockedState_unlocked : IfxEmem.h
  • IfxEmem_State_disabled : IfxEmem.h
  • IfxEmem_State_enabled : IfxEmem.h
  • IfxEmem_TileConfigMode_calibMode : IfxEmem.h
  • IfxEmem_TileNumber_0 : IfxEmem.h
  • IfxEmem_TileNumber_1 : IfxEmem.h
  • IfxEmem_TileNumber_10 : IfxEmem.h
  • IfxEmem_TileNumber_11 : IfxEmem.h
  • IfxEmem_TileNumber_12 : IfxEmem.h
  • IfxEmem_TileNumber_13 : IfxEmem.h
  • IfxEmem_TileNumber_14 : IfxEmem.h
  • IfxEmem_TileNumber_15 : IfxEmem.h
  • IfxEmem_TileNumber_2 : IfxEmem.h
  • IfxEmem_TileNumber_3 : IfxEmem.h
  • IfxEmem_TileNumber_4 : IfxEmem.h
  • IfxEmem_TileNumber_5 : IfxEmem.h
  • IfxEmem_TileNumber_6 : IfxEmem.h
  • IfxEmem_TileNumber_7 : IfxEmem.h
  • IfxEmem_TileNumber_8 : IfxEmem.h
  • IfxEmem_TileNumber_9 : IfxEmem.h
  • IfxEray_Baudrate_10 : IfxEray.h
  • IfxEray_Baudrate_2_5 : IfxEray.h
  • IfxEray_Baudrate_5 : IfxEray.h
  • IfxEray_BufferDirection_receive : IfxEray.h
  • IfxEray_BufferDirection_transmit : IfxEray.h
  • IfxEray_Channel_a : IfxEray.h
  • IfxEray_Channel_b : IfxEray.h
  • IfxEray_ClearErrorFlag_ccf : IfxEray.h
  • IfxEray_ClearErrorFlag_ccl : IfxEray.h
  • IfxEray_ClearErrorFlag_cna : IfxEray.h
  • IfxEray_ClearErrorFlag_eda : IfxEray.h
  • IfxEray_ClearErrorFlag_edb : IfxEray.h
  • IfxEray_ClearErrorFlag_eerr : IfxEray.h
  • IfxEray_ClearErrorFlag_efa : IfxEray.h
  • IfxEray_ClearErrorFlag_iiba : IfxEray.h
  • IfxEray_ClearErrorFlag_ioba : IfxEray.h
  • IfxEray_ClearErrorFlag_ltva : IfxEray.h
  • IfxEray_ClearErrorFlag_ltvb : IfxEray.h
  • IfxEray_ClearErrorFlag_mhf : IfxEray.h
  • IfxEray_ClearErrorFlag_pemc : IfxEray.h
  • IfxEray_ClearErrorFlag_rfo : IfxEray.h
  • IfxEray_ClearErrorFlag_sfbm : IfxEray.h
  • IfxEray_ClearErrorFlag_sfo : IfxEray.h
  • IfxEray_ClearErrorFlag_taba : IfxEray.h
  • IfxEray_ClearErrorFlag_tabb : IfxEray.h
  • IfxEray_ClearStatusFlag_cas : IfxEray.h
  • IfxEray_ClearStatusFlag_cycs : IfxEray.h
  • IfxEray_ClearStatusFlag_mbsi : IfxEray.h
  • IfxEray_ClearStatusFlag_mtsa : IfxEray.h
  • IfxEray_ClearStatusFlag_mtsb : IfxEray.h
  • IfxEray_ClearStatusFlag_nmvc : IfxEray.h
  • IfxEray_ClearStatusFlag_rfcl : IfxEray.h
  • IfxEray_ClearStatusFlag_rfne : IfxEray.h
  • IfxEray_ClearStatusFlag_rxi : IfxEray.h
  • IfxEray_ClearStatusFlag_sds : IfxEray.h
  • IfxEray_ClearStatusFlag_sucs : IfxEray.h
  • IfxEray_ClearStatusFlag_swe : IfxEray.h
  • IfxEray_ClearStatusFlag_ti0 : IfxEray.h
  • IfxEray_ClearStatusFlag_ti1 : IfxEray.h
  • IfxEray_ClearStatusFlag_tibc : IfxEray.h
  • IfxEray_ClearStatusFlag_tobc : IfxEray.h
  • IfxEray_ClearStatusFlag_txi : IfxEray.h
  • IfxEray_ClearStatusFlag_wst : IfxEray.h
  • IfxEray_ClearStatusFlag_wupa : IfxEray.h
  • IfxEray_ClearStatusFlag_wupb : IfxEray.h
  • IfxEray_ClockDivider_1 : IfxEray.h
  • IfxEray_ClockDivider_2 : IfxEray.h
  • IfxEray_ClockDivider_3 : IfxEray.h
  • IfxEray_ClockDivider_4 : IfxEray.h
  • IfxEray_ClockDivider_5 : IfxEray.h
  • IfxEray_ClockDivider_6 : IfxEray.h
  • IfxEray_ClockDivider_7 : IfxEray.h
  • IfxEray_ClockDivider_none : IfxEray.h
  • IfxEray_ExternalOffset_correctionAdded : IfxEray.h
  • IfxEray_ExternalOffset_correctionSubtracted : IfxEray.h
  • IfxEray_ExternalOffset_noCorrection : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_0 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_1 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_2 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_3 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_4 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_5 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_6 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_7 : IfxEray.h
  • IfxEray_ExternalRate_correctionAdded : IfxEray.h
  • IfxEray_ExternalRate_correctionSubtracted : IfxEray.h
  • IfxEray_ExternalRate_noCorrection : IfxEray.h
  • IfxEray_ExternalRateCorrection_0 : IfxEray.h
  • IfxEray_ExternalRateCorrection_1 : IfxEray.h
  • IfxEray_ExternalRateCorrection_2 : IfxEray.h
  • IfxEray_ExternalRateCorrection_3 : IfxEray.h
  • IfxEray_ExternalRateCorrection_4 : IfxEray.h
  • IfxEray_ExternalRateCorrection_5 : IfxEray.h
  • IfxEray_ExternalRateCorrection_6 : IfxEray.h
  • IfxEray_ExternalRateCorrection_7 : IfxEray.h
  • IfxEray_IdleDynamicSlots_0 : IfxEray.h
  • IfxEray_IdleDynamicSlots_1 : IfxEray.h
  • IfxEray_IdleDynamicSlots_2 : IfxEray.h
  • IfxEray_Index_0 : IfxEray_cfg.h
  • IfxEray_Index_none : IfxEray_cfg.h
  • IfxEray_ListenTimeOutNoise_10 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_11 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_12 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_13 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_14 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_15 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_16 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_2 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_3 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_4 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_5 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_6 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_7 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_8 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_9 : IfxEray.h
  • IfxEray_MaxSynchFrames_10 : IfxEray.h
  • IfxEray_MaxSynchFrames_11 : IfxEray.h
  • IfxEray_MaxSynchFrames_12 : IfxEray.h
  • IfxEray_MaxSynchFrames_13 : IfxEray.h
  • IfxEray_MaxSynchFrames_14 : IfxEray.h
  • IfxEray_MaxSynchFrames_15 : IfxEray.h
  • IfxEray_MaxSynchFrames_2 : IfxEray.h
  • IfxEray_MaxSynchFrames_3 : IfxEray.h
  • IfxEray_MaxSynchFrames_4 : IfxEray.h
  • IfxEray_MaxSynchFrames_5 : IfxEray.h
  • IfxEray_MaxSynchFrames_6 : IfxEray.h
  • IfxEray_MaxSynchFrames_7 : IfxEray.h
  • IfxEray_MaxSynchFrames_8 : IfxEray.h
  • IfxEray_MaxSynchFrames_9 : IfxEray.h
  • IfxEray_NodeId_a : IfxEray_cfg.h
  • IfxEray_NodeId_b : IfxEray_cfg.h
  • IfxEray_NodeId_none : IfxEray_cfg.h
  • IfxEray_PocCommand_allSlots : IfxEray.h
  • IfxEray_PocCommand_clearRam : IfxEray.h
  • IfxEray_PocCommand_coldStart : IfxEray.h
  • IfxEray_PocCommand_config : IfxEray.h
  • IfxEray_PocCommand_freeze : IfxEray.h
  • IfxEray_PocCommand_halt : IfxEray.h
  • IfxEray_PocCommand_monitor : IfxEray.h
  • IfxEray_PocCommand_notAccepted : IfxEray.h
  • IfxEray_PocCommand_ready : IfxEray.h
  • IfxEray_PocCommand_reset : IfxEray.h
  • IfxEray_PocCommand_run : IfxEray.h
  • IfxEray_PocCommand_sendMts : IfxEray.h
  • IfxEray_PocCommand_wakeup : IfxEray.h
  • IfxEray_PocState_coldStartListen : IfxEray.h
  • IfxEray_PocState_collisionResolution : IfxEray.h
  • IfxEray_PocState_config : IfxEray.h
  • IfxEray_PocState_consistencyCheck : IfxEray.h
  • IfxEray_PocState_defaultConfig : IfxEray.h
  • IfxEray_PocState_gap : IfxEray.h
  • IfxEray_PocState_halt : IfxEray.h
  • IfxEray_PocState_initializeSchedule : IfxEray.h
  • IfxEray_PocState_integrationCheck : IfxEray.h
  • IfxEray_PocState_integrationConsistencyCheck : IfxEray.h
  • IfxEray_PocState_integrationListen : IfxEray.h
  • IfxEray_PocState_join : IfxEray.h
  • IfxEray_PocState_monitor : IfxEray.h
  • IfxEray_PocState_normalActive : IfxEray.h
  • IfxEray_PocState_normalPassive : IfxEray.h
  • IfxEray_PocState_ready : IfxEray.h
  • IfxEray_PocState_startup : IfxEray.h
  • IfxEray_PocState_startupSucced : IfxEray.h
  • IfxEray_PocState_staruAborted : IfxEray.h
  • IfxEray_PocState_wakeupDetect : IfxEray.h
  • IfxEray_PocState_wakeupListen : IfxEray.h
  • IfxEray_PocState_wakeupSend : IfxEray.h
  • IfxEray_PocState_wakeupStandby : IfxEray.h
  • IfxEray_ReceiveChannel_a : IfxEray.h
  • IfxEray_ReceiveChannel_b : IfxEray.h
  • IfxEray_ReceiveChannel_both : IfxEray.h
  • IfxEray_ReceiveChannel_none : IfxEray.h
  • IfxEray_SleepMode_disable : IfxEray.h
  • IfxEray_SleepMode_enable : IfxEray.h
  • IfxEray_StrobePosition_4 : IfxEray.h
  • IfxEray_StrobePosition_5 : IfxEray.h
  • IfxEray_StrobePosition_6 : IfxEray.h
  • IfxEray_SuspendMode_hard : IfxEray.h
  • IfxEray_SuspendMode_none : IfxEray.h
  • IfxEray_SuspendMode_soft : IfxEray.h
  • IfxEray_TransmissionMode_continuous : IfxEray.h
  • IfxEray_TransmissionMode_singleShot : IfxEray.h
  • IfxEray_TransmissionSlotMode_all : IfxEray.h
  • IfxEray_TransmissionSlotMode_single : IfxEray.h
  • IfxEray_WakeupChannel_a : IfxEray.h
  • IfxEray_WakeupChannel_b : IfxEray.h
  • IfxEth_ChecksumMode_bypass : IfxEth.h
  • IfxEth_ChecksumMode_ipv4 : IfxEth.h
  • IfxEth_ChecksumMode_tcpUdpIcmpFull : IfxEth.h
  • IfxEth_ChecksumMode_tcpUdpIcmpSegment : IfxEth.h
  • IfxEth_DescriptorMode_chain : IfxEth.h
  • IfxEth_DescriptorMode_ring : IfxEth.h
  • IfxEth_PhyInterfaceMode_mii : IfxEth.h
  • IfxEth_PhyInterfaceMode_rmii : IfxEth.h
  • IfxEth_ReceiveProcessState_closing : IfxEth.h
  • IfxEth_ReceiveProcessState_fetching : IfxEth.h
  • IfxEth_ReceiveProcessState_none : IfxEth.h
  • IfxEth_ReceiveProcessState_reset : IfxEth.h
  • IfxEth_ReceiveProcessState_suspended : IfxEth.h
  • IfxEth_ReceiveProcessState_timestampWrite : IfxEth.h
  • IfxEth_ReceiveProcessState_transfering : IfxEth.h
  • IfxEth_ReceiveProcessState_waiting : IfxEth.h
  • IfxEth_RingModeBufferUsed_bothBuffers : IfxEth.h
  • IfxEth_RingModeBufferUsed_buffer1 : IfxEth.h
  • IfxEth_RingModeBufferUsed_buffer2 : IfxEth.h
  • IfxEth_TransmitProcessState_closing : IfxEth.h
  • IfxEth_TransmitProcessState_fetching : IfxEth.h
  • IfxEth_TransmitProcessState_none : IfxEth.h
  • IfxEth_TransmitProcessState_reading : IfxEth.h
  • IfxEth_TransmitProcessState_reset : IfxEth.h
  • IfxEth_TransmitProcessState_suspended : IfxEth.h
  • IfxEth_TransmitProcessState_timestampWrite : IfxEth.h
  • IfxEth_TransmitProcessState_waiting : IfxEth.h
  • IfxFce_Crc32Kernel_0 : IfxFce.h
  • IfxFce_Crc32Kernel_1 : IfxFce.h
  • IfxFce_CrcMode_16 : IfxFce.h
  • IfxFce_CrcMode_32 : IfxFce.h
  • IfxFce_CrcMode_8 : IfxFce.h
  • IfxFft_Input_complexSInt16 : IfxFft.h
  • IfxFft_Input_complexSInt32 : IfxFft.h
  • IfxFft_Input_realSInt16 : IfxFft.h
  • IfxFft_Input_realSInt32 : IfxFft.h
  • IfxFft_Length_1024 : IfxFft.h
  • IfxFft_Length_128 : IfxFft.h
  • IfxFft_Length_16 : IfxFft.h
  • IfxFft_Length_256 : IfxFft.h
  • IfxFft_Length_32 : IfxFft.h
  • IfxFft_Length_512 : IfxFft.h
  • IfxFft_Length_64 : IfxFft.h
  • IfxFft_Length_8 : IfxFft.h
  • IfxFft_Operation_fft : IfxFft.h
  • IfxFft_Operation_ifft : IfxFft.h
  • IfxFft_Output_complexSInt16 : IfxFft.h
  • IfxFft_Output_complexSInt32 : IfxFft.h
  • IfxFft_SuspendMode_hard : IfxFft.h
  • IfxFft_SuspendMode_none : IfxFft.h
  • IfxFft_SuspendMode_soft : IfxFft.h
  • IfxFlash_ErrorTracking_correctedDoubleBitError : IfxFlash.h
  • IfxFlash_ErrorTracking_correctedSingleBitError : IfxFlash.h
  • IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError : IfxFlash.h
  • IfxFlash_ErrorTracking_none : IfxFlash.h
  • IfxFlash_ErrorTracking_uncorrectableMultiBitError : IfxFlash.h
  • IfxFlash_FlashType_D0 : IfxFlash_cfg.h
  • IfxFlash_FlashType_D1 : IfxFlash_cfg.h
  • IfxFlash_FlashType_Fa : IfxFlash_cfg.h
  • IfxFlash_FlashType_P0 : IfxFlash_cfg.h
  • IfxFlash_FlashType_P1 : IfxFlash_cfg.h
  • IfxFlash_FlashType_P2 : IfxFlash_cfg.h
  • IfxFlash_FlashType_P3 : IfxFlash_cfg.h
  • IfxFlash_PortId_PortId_0 : IfxFlash.h
  • IfxFlash_PortId_PortId_1 : IfxFlash.h
  • IfxFlash_UcbType_ucb0 : IfxFlash_cfg.h
  • IfxFlash_UcbType_ucb1 : IfxFlash_cfg.h
  • IfxFlash_UcbType_ucbHsmc : IfxFlash_cfg.h
  • IfxGpt12_CaptureInput_A : IfxGpt12.h
  • IfxGpt12_CaptureInput_B : IfxGpt12.h
  • IfxGpt12_CaptureInput_C : IfxGpt12.h
  • IfxGpt12_CaptureInput_D : IfxGpt12.h
  • IfxGpt12_CaptureInputMode_bothEdgesTxIN : IfxGpt12.h
  • IfxGpt12_CaptureInputMode_fallingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_CaptureInputMode_none : IfxGpt12.h
  • IfxGpt12_CaptureInputMode_risingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_CaptureTrigger_capin : IfxGpt12.h
  • IfxGpt12_CaptureTrigger_t3inOrT3EUD : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode_disabled : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode_fallingEdge : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode_randomEdge : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode_risingEdge : IfxGpt12.h
  • IfxGpt12_CounterInputMode_bothEdgesTxIN : IfxGpt12.h
  • IfxGpt12_CounterInputMode_bothEdgesTxOTL : IfxGpt12.h
  • IfxGpt12_CounterInputMode_counterDisabled : IfxGpt12.h
  • IfxGpt12_CounterInputMode_fallingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_CounterInputMode_fallingEdgeTxOTL : IfxGpt12.h
  • IfxGpt12_CounterInputMode_risingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_CounterInputMode_risingEdgeTxOTL : IfxGpt12.h
  • IfxGpt12_EudInput_A : IfxGpt12.h
  • IfxGpt12_EudInput_B : IfxGpt12.h
  • IfxGpt12_EudInput_C : IfxGpt12.h
  • IfxGpt12_EudInput_D : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler_16 : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler_32 : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler_4 : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler_8 : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler_16 : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler_2 : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler_4 : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler_8 : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx : IfxGpt12.h
  • IfxGpt12_Input_A : IfxGpt12.h
  • IfxGpt12_Input_B : IfxGpt12.h
  • IfxGpt12_Input_C : IfxGpt12.h
  • IfxGpt12_Input_D : IfxGpt12.h
  • IfxGpt12_Mode_capture : IfxGpt12.h
  • IfxGpt12_Mode_counter : IfxGpt12.h
  • IfxGpt12_Mode_highGatedTimer : IfxGpt12.h
  • IfxGpt12_Mode_incrementalInterfaceEdgeDetection : IfxGpt12.h
  • IfxGpt12_Mode_incrementalInterfaceRotationDetection : IfxGpt12.h
  • IfxGpt12_Mode_lowGatedTimer : IfxGpt12.h
  • IfxGpt12_Mode_reload : IfxGpt12.h
  • IfxGpt12_Mode_timer : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_bothEdgesTxIN : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_bothEdgesTxOTL : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_counterDisabled : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_fallingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_fallingEdgeTxOTL : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_risingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_risingEdgeTxOTL : IfxGpt12.h
  • IfxGpt12_SleepMode_disable : IfxGpt12.h
  • IfxGpt12_SleepMode_enable : IfxGpt12.h
  • IfxGpt12_SuspendMode_hard : IfxGpt12.h
  • IfxGpt12_SuspendMode_none : IfxGpt12.h
  • IfxGpt12_SuspendMode_soft : IfxGpt12.h
  • IfxGpt12_TimerDirection_down : IfxGpt12.h
  • IfxGpt12_TimerDirection_up : IfxGpt12.h
  • IfxGpt12_TimerDirectionSource_external : IfxGpt12.h
  • IfxGpt12_TimerDirectionSource_internal : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_1 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_128 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_16 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_2 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_32 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_4 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_64 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_8 : IfxGpt12.h
  • IfxGpt12_TimerReloadMode_disable : IfxGpt12.h
  • IfxGpt12_TimerReloadMode_enable : IfxGpt12.h
  • IfxGpt12_TimerRemoteControl_off : IfxGpt12.h
  • IfxGpt12_TimerRemoteControl_on : IfxGpt12.h
  • IfxGpt12_TimerRun_start : IfxGpt12.h
  • IfxGpt12_TimerRun_stop : IfxGpt12.h
  • IfxGtm_Atom_0 : IfxGtm_cfg.h
  • IfxGtm_Atom_1 : IfxGtm_cfg.h
  • IfxGtm_Atom_2 : IfxGtm_cfg.h
  • IfxGtm_Atom_3 : IfxGtm_cfg.h
  • IfxGtm_Atom_AruInput_disabled : IfxGtm_Atom.h
  • IfxGtm_Atom_AruInput_enabled : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_0 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_1 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_2 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_3 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_4 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_5 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_6 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_7 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_none : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_OutputTrigger_forward : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_OutputTrigger_generate : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_ResetEvent_onCm0 : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_ResetEvent_onTrigger : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode_outputCompare : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode_outputImmediate : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode_outputPwm : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode_outputSerial : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_cancelCompare : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu0ccu1Ts0 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu0ccu1Ts12 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu0Ts0 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu1Ts12 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_compareBoth : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_compareBoth1 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl_noChange : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl_sl0out0 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl_sl0out1 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl_toggle : IfxGtm_Atom.h
  • IfxGtm_ChXSel_a : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_b : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_c : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_d : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_e : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_f : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_g : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_h : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_i : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_j : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_k : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_l : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_m : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_n : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_o : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_p : IfxGtm_PinMap.h
  • IfxGtm_Cmu_Clk_0 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_1 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_2 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_3 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_4 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_5 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_6 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_7 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Eclk_0 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Eclk_1 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Eclk_2 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_0 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_1 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_2 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_3 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_4 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk_0 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk_1 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk_6 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk_7 : IfxGtm_Cmu.h
  • IfxGtm_Dpll_SubInc_1 : IfxGtm_cfg.h
  • IfxGtm_Dpll_SubInc_2 : IfxGtm_cfg.h
  • IfxGtm_FeatureControl_disable : IfxGtm_cfg.h
  • IfxGtm_FeatureControl_disabled : IfxGtm_cfg.h
  • IfxGtm_FeatureControl_enable : IfxGtm_cfg.h
  • IfxGtm_FeatureControl_enabled : IfxGtm_cfg.h
  • IfxGtm_IrqMode_level : IfxGtm.h
  • IfxGtm_IrqMode_pulse : IfxGtm.h
  • IfxGtm_IrqMode_pulseNotify : IfxGtm.h
  • IfxGtm_IrqMode_singlePulse : IfxGtm.h
  • IfxGtm_SuspendMode_hard : IfxGtm.h
  • IfxGtm_SuspendMode_none : IfxGtm.h
  • IfxGtm_SuspendMode_soft : IfxGtm.h
  • IfxGtm_Tbu_Ts_0 : IfxGtm_Tbu.h
  • IfxGtm_Tbu_Ts_1 : IfxGtm_Tbu.h
  • IfxGtm_Tbu_Ts_2 : IfxGtm_Tbu.h
  • IfxGtm_Tim_0 : IfxGtm_cfg.h
  • IfxGtm_Tim_1 : IfxGtm_cfg.h
  • IfxGtm_Tim_2 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_0 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_1 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_2 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_3 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_4 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_5 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_6 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_7 : IfxGtm_cfg.h
  • IfxGtm_Tim_CntsSel_cntReg : IfxGtm_Tim.h
  • IfxGtm_Tim_CntsSel_tbuTs0 : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterCounter_hold : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterCounter_upDown : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterMode_immediateEdgePropagation : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterMode_individualDeglitchTime : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel_cnts : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel_tbuTs0 : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel_tbuTs1 : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel_tbuTs2 : IfxGtm_Tim.h
  • IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_ConfigFilterMode_none : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_Input_adjacentChannel : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_Input_aux : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_Input_currentChannel : IfxGtm_Tim_In.h
  • IfxGtm_Tim_Input_adjacentChannel : IfxGtm_Tim.h
  • IfxGtm_Tim_Input_currentChannel : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_bitCompression : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_inputEvent : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_inputPrescaler : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_pulseIntegration : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_pwmMeasurement : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout_bothEdge : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout_disabled : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout_fallingEdge : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout_risingEdge : IfxGtm_Tim.h
  • IfxGtm_Tom_0 : IfxGtm_cfg.h
  • IfxGtm_Tom_1 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_0 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_1 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_10 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_11 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_12 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_13 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_14 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_15 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_2 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_3 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_4 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_5 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_6 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_7 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_8 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_9 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_noClock : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_none : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_OutputTrigger_forward : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_OutputTrigger_generate : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ResetEvent_onCm0 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ResetEvent_onTrigger : IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_0 : IfxGtm_cfg.h
  • IfxGtm_Tom_Tgc_1 : IfxGtm_cfg.h
  • IfxGtm_ToutSel_a : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_b : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_c : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_d : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_e : IfxGtm_PinMap.h
  • IfxGtm_Trig_AdcGroup_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig_count : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_15 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_count : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom2 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom3 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_count : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_tom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_tom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrig_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrig_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_atomX_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_atomX_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_atomX_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_atomX_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_tomX_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_tomX_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_tomX_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_tomX_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrig_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_15 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_count : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom2 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom3 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_count : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_tom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_tom1 : IfxGtm_Trig.h
  • IfxHssl_ChannelId_0 : IfxHssl.h
  • IfxHssl_ChannelId_1 : IfxHssl.h
  • IfxHssl_ChannelId_2 : IfxHssl.h
  • IfxHssl_ChannelId_3 : IfxHssl.h
  • IfxHssl_ClockFrequencyRate_10Mhz : IfxHssl.h
  • IfxHssl_ClockFrequencyRate_20Mhz : IfxHssl.h
  • IfxHssl_Command_noAction : IfxHssl.h
  • IfxHssl_Command_readFrame : IfxHssl.h
  • IfxHssl_Command_triggerFrame : IfxHssl.h
  • IfxHssl_Command_writeFrame : IfxHssl.h
  • IfxHssl_ControlCommand_disableReception : IfxHssl.h
  • IfxHssl_ControlCommand_enableReception : IfxHssl.h
  • IfxHssl_ControlCommand_highSpeedClockStart : IfxHssl.h
  • IfxHssl_ControlCommand_highSpeedClockStop : IfxHssl.h
  • IfxHssl_ControlCommand_highSpeedReception : IfxHssl.h
  • IfxHssl_ControlCommand_highSpeedTransmission : IfxHssl.h
  • IfxHssl_ControlCommand_lowSpeedReception : IfxHssl.h
  • IfxHssl_ControlCommand_lowSpeedTransmission : IfxHssl.h
  • IfxHssl_ControlCommand_mediumSpeedReception : IfxHssl.h
  • IfxHssl_ControlCommand_ping : IfxHssl.h
  • IfxHssl_ControlCommand_turnOffClockTestMode : IfxHssl.h
  • IfxHssl_ControlCommand_turnOnClockTestMode : IfxHssl.h
  • IfxHssl_ControlCommand_turnOnPayloadLoopback : IfxHssl.h
  • IfxHssl_DataLength_16bit : IfxHssl.h
  • IfxHssl_DataLength_32bit : IfxHssl.h
  • IfxHssl_DataLength_8bit : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_commandError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_headerError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_payloadError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_pingAnswerReceived : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_pllLockLosterror : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_speedModeSwitchError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_txTransferError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished : IfxHssl.h
  • IfxHssl_Hsct_SleepMode_disable : IfxHssl.h
  • IfxHssl_Hsct_SleepMode_enable : IfxHssl.h
  • IfxHssl_hsctIndex_0 : IfxHssl_cfg.h
  • IfxHssl_hsctIndex_none : IfxHssl_cfg.h
  • IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError : IfxHssl.h
  • IfxHssl_Hssl_ERRInterruptSource_timeoutError : IfxHssl.h
  • IfxHssl_Hssl_ERRInterruptSource_transactionTagError : IfxHssl.h
  • IfxHssl_Hssl_ERRInterruptSource_unexpectedError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_busAccessError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_crcError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_dataLengthError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation : IfxHssl.h
  • IfxHssl_Hssl_FrameRequest_noAction : IfxHssl_Hssl.h
  • IfxHssl_Hssl_FrameRequest_readFrame : IfxHssl_Hssl.h
  • IfxHssl_Hssl_FrameRequest_readId : IfxHssl_Hssl.h
  • IfxHssl_Hssl_FrameRequest_triggerFrame : IfxHssl_Hssl.h
  • IfxHssl_Hssl_FrameRequest_writeFrame : IfxHssl_Hssl.h
  • IfxHssl_Hssl_SleepMode_disable : IfxHssl.h
  • IfxHssl_Hssl_SleepMode_enable : IfxHssl.h
  • IfxHssl_Hssl_Status_busy : IfxHssl_Hssl.h
  • IfxHssl_Hssl_Status_error : IfxHssl_Hssl.h
  • IfxHssl_Hssl_Status_ok : IfxHssl_Hssl.h
  • IfxHssl_hsslIndex_0 : IfxHssl_cfg.h
  • IfxHssl_hsslIndex_none : IfxHssl_cfg.h
  • IfxHssl_InterfaceMode_master : IfxHssl.h
  • IfxHssl_InterfaceMode_slave : IfxHssl.h
  • IfxHssl_MasterModeRxSpeed_highSpeed : IfxHssl.h
  • IfxHssl_MasterModeRxSpeed_lowSpeed : IfxHssl.h
  • IfxHssl_MasterModeRxSpeed_mediumSpeed : IfxHssl.h
  • IfxHssl_MasterModeTxSpeed_highSpeed : IfxHssl.h
  • IfxHssl_MasterModeTxSpeed_lowSpeed : IfxHssl.h
  • IfxHssl_PllReferenceClock_hsctSystemClockInput : IfxHssl.h
  • IfxHssl_PllReferenceClock_oscillatorInput : IfxHssl.h
  • IfxHssl_StreamingMode_continuous : IfxHssl.h
  • IfxHssl_StreamingMode_single : IfxHssl.h
  • IfxHssl_SuspendMode_hard : IfxHssl.h
  • IfxHssl_SuspendMode_none : IfxHssl.h
  • IfxHssl_SuspendMode_soft : IfxHssl.h
  • IfxI2c_BusStatus_busyMaster : IfxI2c.h
  • IfxI2c_BusStatus_idle : IfxI2c.h
  • IfxI2c_BusStatus_remoteSlave : IfxI2c.h
  • IfxI2c_BusStatus_started : IfxI2c.h
  • IfxI2c_ErrorInterruptSource_rxFifoOverflow : IfxI2c.h
  • IfxI2c_ErrorInterruptSource_rxFifoUnderflow : IfxI2c.h
  • IfxI2c_ErrorInterruptSource_txFifoOverflow : IfxI2c.h
  • IfxI2c_ErrorInterruptSource_txFifoUnderflow : IfxI2c.h
  • IfxI2c_I2c_Status_al : IfxI2c_I2c.h
  • IfxI2c_I2c_Status_busNotFree : IfxI2c_I2c.h
  • IfxI2c_I2c_Status_error : IfxI2c_I2c.h
  • IfxI2c_I2c_Status_nak : IfxI2c_I2c.h
  • IfxI2c_I2c_Status_ok : IfxI2c_I2c.h
  • IfxI2c_Index_0 : IfxI2c_cfg.h
  • IfxI2c_Index_none : IfxI2c_cfg.h
  • IfxI2c_PinSelect_a : IfxI2c.h
  • IfxI2c_PinSelect_b : IfxI2c.h
  • IfxI2c_PinSelect_c : IfxI2c.h
  • IfxI2c_PinSelect_d : IfxI2c.h
  • IfxI2c_PinSelect_e : IfxI2c.h
  • IfxI2c_PinSelect_f : IfxI2c.h
  • IfxI2c_PinSelect_g : IfxI2c.h
  • IfxI2c_PinSelect_h : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_addressMatch : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_arbitrationLost : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_generalCall : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_masterCode : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_receiveMode : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_transmissionEnd : IfxI2c.h
  • IfxI2c_SleepMode_disable : IfxI2c.h
  • IfxI2c_SleepMode_enable : IfxI2c.h
  • IfxIom_LamEventSource_mon : IfxIom.h
  • IfxIom_LamEventSource_monXorRef : IfxIom.h
  • IfxIom_LamEventTrigger_anyEdge : IfxIom.h
  • IfxIom_LamEventTrigger_fallingEdge : IfxIom.h
  • IfxIom_LamEventTrigger_none : IfxIom.h
  • IfxIom_LamEventTrigger_risingEdge : IfxIom.h
  • IfxIom_LamEventWindowClearEvent_anyEdge : IfxIom.h
  • IfxIom_LamEventWindowClearEvent_fallingEdge : IfxIom.h
  • IfxIom_LamEventWindowClearEvent_none : IfxIom.h
  • IfxIom_LamEventWindowClearEvent_risingEdge : IfxIom.h
  • IfxIom_LamEventWindowControlSource_mon : IfxIom.h
  • IfxIom_LamEventWindowControlSource_ref : IfxIom.h
  • IfxIom_LamEventWindowRunControl_freeRunning : IfxIom.h
  • IfxIom_LamEventWindowRunControl_gated : IfxIom.h
  • IfxIom_LamFilterMode_delayDebounceBothEdge : IfxIom.h
  • IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge : IfxIom.h
  • IfxIom_LamFilterMode_immediateDebounceBothEdge : IfxIom.h
  • IfxIom_LamFilterMode_immediateDebounceFallingEdge : IfxIom.h
  • IfxIom_LamFilterMode_immediateDebounceRisingEdge : IfxIom.h
  • IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge : IfxIom.h
  • IfxIom_LamFilterMode_noFilter : IfxIom.h
  • IfxIom_LamFilterMode_prescalerOnFallingEdge : IfxIom.h
  • IfxIom_LamFilterMode_prescalerOnRisingEdge : IfxIom.h
  • IfxIom_LamId_0 : IfxIom.h
  • IfxIom_LamId_1 : IfxIom.h
  • IfxIom_LamId_10 : IfxIom.h
  • IfxIom_LamId_11 : IfxIom.h
  • IfxIom_LamId_12 : IfxIom.h
  • IfxIom_LamId_13 : IfxIom.h
  • IfxIom_LamId_14 : IfxIom.h
  • IfxIom_LamId_15 : IfxIom.h
  • IfxIom_LamId_2 : IfxIom.h
  • IfxIom_LamId_3 : IfxIom.h
  • IfxIom_LamId_4 : IfxIom.h
  • IfxIom_LamId_5 : IfxIom.h
  • IfxIom_LamId_6 : IfxIom.h
  • IfxIom_LamId_7 : IfxIom.h
  • IfxIom_LamId_8 : IfxIom.h
  • IfxIom_LamId_9 : IfxIom.h
  • IfxIom_MonInput_asclin0Atx : IfxIom_cfg.h
  • IfxIom_MonInput_asclin1Atx : IfxIom_cfg.h
  • IfxIom_MonInput_asclin2Atx : IfxIom_cfg.h
  • IfxIom_MonInput_asclin3Atx : IfxIom_cfg.h
  • IfxIom_MonInput_canNode0Txd : IfxIom_cfg.h
  • IfxIom_MonInput_canNode1Txd : IfxIom_cfg.h
  • IfxIom_MonInput_canNode2Txd : IfxIom_cfg.h
  • IfxIom_MonInput_canNode3Txd : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cc60 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cc61 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cc62 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cout60 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cout61 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cout62 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cout63 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cc60 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cc61 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cc62 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cout60 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cout61 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cout62 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cout63 : IfxIom_cfg.h
  • IfxIom_MonInput_gnd : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout104 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout105 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout106 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout22 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout23 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout24 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout25 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout26 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout27 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout28 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout29 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout30 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout31 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout32 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout33 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout34 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout68 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout69 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout70 : IfxIom_cfg.h
  • IfxIom_MonInput_p20_12 : IfxIom_cfg.h
  • IfxIom_MonInput_p20_13 : IfxIom_cfg.h
  • IfxIom_MonInput_p20_14 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_0 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_1 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_10 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_11 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_12 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_2 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_3 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_4 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_5 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_6 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_7 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_8 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_9 : IfxIom_cfg.h
  • IfxIom_MonInput_psi5Psitx0 : IfxIom_cfg.h
  • IfxIom_MonInput_psi5Psitx1 : IfxIom_cfg.h
  • IfxIom_MonInput_qspi0Mrst : IfxIom_cfg.h
  • IfxIom_MonInput_qspi1Mrst : IfxIom_cfg.h
  • IfxIom_MonInput_qspi2Mrst : IfxIom_cfg.h
  • IfxIom_MonInput_qspi3Mrst : IfxIom_cfg.h
  • IfxIom_MonInputSignal_0 : IfxIom_cfg.h
  • IfxIom_MonInputSignal_1 : IfxIom_cfg.h
  • IfxIom_MonInputSignal_2 : IfxIom_cfg.h
  • IfxIom_MonInputSignal_p : IfxIom_cfg.h
  • IfxIom_RefInput_asclin0Atx : IfxIom_cfg.h
  • IfxIom_RefInput_asclin1Atx : IfxIom_cfg.h
  • IfxIom_RefInput_asclin2Atx : IfxIom_cfg.h
  • IfxIom_RefInput_asclin3Atx : IfxIom_cfg.h
  • IfxIom_RefInput_canNode0Txd : IfxIom_cfg.h
  • IfxIom_RefInput_canNode1Txd : IfxIom_cfg.h
  • IfxIom_RefInput_canNode2Txd : IfxIom_cfg.h
  • IfxIom_RefInput_canNode3Txd : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cc60 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cc61 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cc62 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cout60 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cout61 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cout62 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cout63 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cc60 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cc61 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cc62 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cout60 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cout61 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cout62 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cout63 : IfxIom_cfg.h
  • IfxIom_RefInput_exorCombiner : IfxIom_cfg.h
  • IfxIom_RefInput_gnd : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout0 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout1 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout10 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout107 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout108 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout109 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout11 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout12 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout13 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout14 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout15 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout2 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout3 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout4 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout5 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout6 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout7 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout8 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout9 : IfxIom_cfg.h
  • IfxIom_RefInput_p20_12 : IfxIom_cfg.h
  • IfxIom_RefInput_p20_13 : IfxIom_cfg.h
  • IfxIom_RefInput_p20_14 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_0 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_1 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_10 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_11 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_12 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_2 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_3 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_4 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_5 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_6 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_7 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_8 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_9 : IfxIom_cfg.h
  • IfxIom_RefInput_psi5Psitx0 : IfxIom_cfg.h
  • IfxIom_RefInput_psi5Psitx2 : IfxIom_cfg.h
  • IfxIom_RefInput_qspi0Mrst : IfxIom_cfg.h
  • IfxIom_RefInput_qspi1Mrst : IfxIom_cfg.h
  • IfxIom_RefInput_qspi2Mrst : IfxIom_cfg.h
  • IfxIom_RefInput_qspi3Mrst : IfxIom_cfg.h
  • IfxIom_RefInputSignal_0 : IfxIom_cfg.h
  • IfxIom_RefInputSignal_1 : IfxIom_cfg.h
  • IfxIom_RefInputSignal_2 : IfxIom_cfg.h
  • IfxIom_RefInputSignal_p : IfxIom_cfg.h
  • IfxIom_RefInputSignal_xorCombiner : IfxIom_cfg.h
  • IfxIom_SleepMode_disable : IfxIom.h
  • IfxIom_SleepMode_enable : IfxIom.h
  • IfxMsc_ActivePhaseSelection_lowLevel : IfxMsc.h
  • IfxMsc_ActivePhaseSelection_none : IfxMsc.h
  • IfxMsc_AsynchronousBlock_bypassed : IfxMsc.h
  • IfxMsc_AsynchronousBlock_noBypassed : IfxMsc.h
  • IfxMsc_ChipSelectActiveState_high : IfxMsc.h
  • IfxMsc_ChipSelectActiveState_low : IfxMsc.h
  • IfxMsc_ClockSelect_feray : IfxMsc.h
  • IfxMsc_ClockSelect_fspb : IfxMsc.h
  • IfxMsc_ClockSelect_fsri : IfxMsc.h
  • IfxMsc_ClockSelect_noClock : IfxMsc.h
  • IfxMsc_CommandDataCommandRepetitionMode_disabled : IfxMsc.h
  • IfxMsc_CommandDataCommandRepetitionMode_enabled : IfxMsc.h
  • IfxMsc_CommandFrameInterrupt_disabled : IfxMsc.h
  • IfxMsc_CommandFrameInterrupt_enabled : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_CommandFrameLength_0 : IfxMsc.h
  • IfxMsc_CommandFrameLength_1 : IfxMsc.h
  • IfxMsc_CommandFrameLength_10 : IfxMsc.h
  • IfxMsc_CommandFrameLength_11 : IfxMsc.h
  • IfxMsc_CommandFrameLength_12 : IfxMsc.h
  • IfxMsc_CommandFrameLength_13 : IfxMsc.h
  • IfxMsc_CommandFrameLength_14 : IfxMsc.h
  • IfxMsc_CommandFrameLength_15 : IfxMsc.h
  • IfxMsc_CommandFrameLength_16 : IfxMsc.h
  • IfxMsc_CommandFrameLength_17 : IfxMsc.h
  • IfxMsc_CommandFrameLength_18 : IfxMsc.h
  • IfxMsc_CommandFrameLength_19 : IfxMsc.h
  • IfxMsc_CommandFrameLength_2 : IfxMsc.h
  • IfxMsc_CommandFrameLength_20 : IfxMsc.h
  • IfxMsc_CommandFrameLength_21 : IfxMsc.h
  • IfxMsc_CommandFrameLength_22 : IfxMsc.h
  • IfxMsc_CommandFrameLength_23 : IfxMsc.h
  • IfxMsc_CommandFrameLength_24 : IfxMsc.h
  • IfxMsc_CommandFrameLength_25 : IfxMsc.h
  • IfxMsc_CommandFrameLength_26 : IfxMsc.h
  • IfxMsc_CommandFrameLength_27 : IfxMsc.h
  • IfxMsc_CommandFrameLength_28 : IfxMsc.h
  • IfxMsc_CommandFrameLength_29 : IfxMsc.h
  • IfxMsc_CommandFrameLength_3 : IfxMsc.h
  • IfxMsc_CommandFrameLength_30 : IfxMsc.h
  • IfxMsc_CommandFrameLength_31 : IfxMsc.h
  • IfxMsc_CommandFrameLength_32 : IfxMsc.h
  • IfxMsc_CommandFrameLength_4 : IfxMsc.h
  • IfxMsc_CommandFrameLength_5 : IfxMsc.h
  • IfxMsc_CommandFrameLength_6 : IfxMsc.h
  • IfxMsc_CommandFrameLength_7 : IfxMsc.h
  • IfxMsc_CommandFrameLength_8 : IfxMsc.h
  • IfxMsc_CommandFrameLength_9 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_0 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_1 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_10 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_100 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_101 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_102 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_103 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_104 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_105 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_106 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_107 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_108 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_109 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_11 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_110 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_111 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_112 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_113 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_114 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_115 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_116 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_117 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_118 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_119 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_12 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_120 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_121 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_122 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_123 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_124 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_125 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_126 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_127 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_13 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_14 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_15 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_16 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_17 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_18 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_19 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_2 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_20 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_21 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_22 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_23 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_24 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_25 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_26 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_27 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_28 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_29 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_3 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_30 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_31 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_32 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_33 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_34 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_35 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_36 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_37 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_38 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_39 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_4 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_40 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_41 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_42 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_43 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_44 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_45 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_46 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_47 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_48 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_49 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_5 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_50 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_51 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_52 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_53 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_54 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_55 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_56 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_57 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_58 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_59 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_6 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_60 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_61 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_62 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_63 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_64 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_65 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_66 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_67 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_68 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_69 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_7 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_70 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_71 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_72 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_73 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_74 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_75 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_76 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_77 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_78 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_79 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_8 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_80 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_81 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_82 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_83 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_84 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_85 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_86 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_87 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_88 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_89 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_9 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_90 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_91 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_92 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_93 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_94 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_95 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_96 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_97 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_98 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_99 : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength_0 : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength_1 : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength_2 : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength_3 : IfxMsc.h
  • IfxMsc_DataFrameInterrupt_atFirstDataBit : IfxMsc.h
  • IfxMsc_DataFrameInterrupt_atLastDataBit : IfxMsc.h
  • IfxMsc_DataFrameInterrupt_disabled : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_DataFrameLength_0 : IfxMsc.h
  • IfxMsc_DataFrameLength_1 : IfxMsc.h
  • IfxMsc_DataFrameLength_10 : IfxMsc.h
  • IfxMsc_DataFrameLength_11 : IfxMsc.h
  • IfxMsc_DataFrameLength_12 : IfxMsc.h
  • IfxMsc_DataFrameLength_13 : IfxMsc.h
  • IfxMsc_DataFrameLength_14 : IfxMsc.h
  • IfxMsc_DataFrameLength_15 : IfxMsc.h
  • IfxMsc_DataFrameLength_16 : IfxMsc.h
  • IfxMsc_DataFrameLength_2 : IfxMsc.h
  • IfxMsc_DataFrameLength_3 : IfxMsc.h
  • IfxMsc_DataFrameLength_4 : IfxMsc.h
  • IfxMsc_DataFrameLength_5 : IfxMsc.h
  • IfxMsc_DataFrameLength_6 : IfxMsc.h
  • IfxMsc_DataFrameLength_7 : IfxMsc.h
  • IfxMsc_DataFrameLength_8 : IfxMsc.h
  • IfxMsc_DataFrameLength_9 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_10 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_11 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_12 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_13 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_14 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_15 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_16 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_17 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_18 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_19 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_2 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_20 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_21 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_22 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_23 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_24 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_25 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_26 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_27 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_28 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_29 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_3 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_30 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_31 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_32 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_4 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_5 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_6 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_7 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_8 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_9 : IfxMsc.h
  • IfxMsc_DividerMode_fractional : IfxMsc.h
  • IfxMsc_DividerMode_normal : IfxMsc.h
  • IfxMsc_EmergencyStop_disabled : IfxMsc.h
  • IfxMsc_EmergencyStop_enabled : IfxMsc.h
  • IfxMsc_Extension_disabled : IfxMsc.h
  • IfxMsc_Extension_enabled : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_0 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_1 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_10 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_11 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_12 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_13 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_14 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_15 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_16 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_17 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_18 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_19 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_2 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_20 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_21 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_22 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_23 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_24 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_25 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_26 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_27 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_28 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_29 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_3 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_30 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_31 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_32 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_33 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_34 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_35 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_36 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_37 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_38 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_39 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_4 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_40 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_41 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_42 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_43 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_44 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_45 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_46 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_47 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_48 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_49 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_5 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_50 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_51 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_52 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_53 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_54 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_55 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_56 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_57 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_58 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_59 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_6 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_60 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_61 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_62 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_63 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_7 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_8 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_9 : IfxMsc.h
  • IfxMsc_ExternalSignalInjection_disabled : IfxMsc.h
  • IfxMsc_ExternalSignalInjection_enabled : IfxMsc.h
  • IfxMsc_FclClockControlEnabled_activePhaseOnly : IfxMsc.h
  • IfxMsc_FclClockControlEnabled_always : IfxMsc.h
  • IfxMsc_FclLinePolarity_inverted : IfxMsc.h
  • IfxMsc_FclLinePolarity_nonInverted : IfxMsc.h
  • IfxMsc_HardwareClock_disabled : IfxMsc.h
  • IfxMsc_HardwareClock_enabled : IfxMsc.h
  • IfxMsc_Index_0 : IfxMsc_cfg.h
  • IfxMsc_Index_1 : IfxMsc_cfg.h
  • IfxMsc_Index_none : IfxMsc_cfg.h
  • IfxMsc_InterruptServiceRequest_0 : IfxMsc.h
  • IfxMsc_InterruptServiceRequest_1 : IfxMsc.h
  • IfxMsc_InterruptServiceRequest_2 : IfxMsc.h
  • IfxMsc_InterruptServiceRequest_3 : IfxMsc.h
  • IfxMsc_InterruptServiceRequest_4 : IfxMsc.h
  • IfxMsc_ModuleSuspendRequestBit_hardSuspend : IfxMsc.h
  • IfxMsc_ModuleSuspendRequestBit_noSuspend : IfxMsc.h
  • IfxMsc_ModuleSuspendRequestBit_softSuspend : IfxMsc.h
  • IfxMsc_MsbBitDataExtension_notPresent : IfxMsc.h
  • IfxMsc_MsbBitDataExtension_present : IfxMsc.h
  • IfxMsc_Msc_Target_high : IfxMsc_Msc.h
  • IfxMsc_Msc_Target_low : IfxMsc_Msc.h
  • IfxMsc_NDividerAbra_1 : IfxMsc.h
  • IfxMsc_NDividerAbra_2 : IfxMsc.h
  • IfxMsc_NDividerAbra_3 : IfxMsc.h
  • IfxMsc_NDividerAbra_4 : IfxMsc.h
  • IfxMsc_NDividerAbra_5 : IfxMsc.h
  • IfxMsc_NDividerAbra_6 : IfxMsc.h
  • IfxMsc_NDividerAbra_7 : IfxMsc.h
  • IfxMsc_NDividerAbra_8 : IfxMsc.h
  • IfxMsc_NDividerDownstream_1 : IfxMsc.h
  • IfxMsc_NDividerDownstream_10 : IfxMsc.h
  • IfxMsc_NDividerDownstream_11 : IfxMsc.h
  • IfxMsc_NDividerDownstream_12 : IfxMsc.h
  • IfxMsc_NDividerDownstream_13 : IfxMsc.h
  • IfxMsc_NDividerDownstream_14 : IfxMsc.h
  • IfxMsc_NDividerDownstream_15 : IfxMsc.h
  • IfxMsc_NDividerDownstream_16 : IfxMsc.h
  • IfxMsc_NDividerDownstream_2 : IfxMsc.h
  • IfxMsc_NDividerDownstream_3 : IfxMsc.h
  • IfxMsc_NDividerDownstream_4 : IfxMsc.h
  • IfxMsc_NDividerDownstream_5 : IfxMsc.h
  • IfxMsc_NDividerDownstream_6 : IfxMsc.h
  • IfxMsc_NDividerDownstream_7 : IfxMsc.h
  • IfxMsc_NDividerDownstream_8 : IfxMsc.h
  • IfxMsc_NDividerDownstream_9 : IfxMsc.h
  • IfxMsc_OverflowInterrupt_disabled : IfxMsc.h
  • IfxMsc_OverflowInterrupt_enabled : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR4 : IfxMsc.h
  • IfxMsc_Parity_even : IfxMsc.h
  • IfxMsc_Parity_odd : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_0 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_1 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_10 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_11 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_12 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_13 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_14 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_15 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_2 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_3 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_4 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_5 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_6 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_7 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_8 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_9 : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt_disabled : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt_onDataReceive : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt_onRdieSet : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_SdiLinePolarity_invertedSi : IfxMsc.h
  • IfxMsc_SdiLinePolarity_likeSi : IfxMsc.h
  • IfxMsc_SerialDataInput_0 : IfxMsc.h
  • IfxMsc_SerialDataInput_1 : IfxMsc.h
  • IfxMsc_SerialDataInput_2 : IfxMsc.h
  • IfxMsc_SerialDataInput_3 : IfxMsc.h
  • IfxMsc_SerialDataInput_4 : IfxMsc.h
  • IfxMsc_SerialDataInput_5 : IfxMsc.h
  • IfxMsc_SerialDataInput_6 : IfxMsc.h
  • IfxMsc_SerialDataInput_7 : IfxMsc.h
  • IfxMsc_ServiceRequestDelay_1bit : IfxMsc.h
  • IfxMsc_ServiceRequestDelay_noDelay : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_1 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_10 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_11 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_12 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_13 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_14 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_15 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_16 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_2 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_3 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_4 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_5 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_6 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_7 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_8 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_9 : IfxMsc.h
  • IfxMsc_SleepMode_disable : IfxMsc.h
  • IfxMsc_SleepMode_enable : IfxMsc.h
  • IfxMsc_SoLinePolarity_inverted : IfxMsc.h
  • IfxMsc_SoLinePolarity_nonInverted : IfxMsc.h
  • IfxMsc_Source_alternateInputLine : IfxMsc.h
  • IfxMsc_Source_alternateInputLineInverted : IfxMsc.h
  • IfxMsc_Source_downstreamDataRegister : IfxMsc.h
  • IfxMsc_SuspendMode_hard : IfxMsc.h
  • IfxMsc_SuspendMode_none : IfxMsc.h
  • IfxMsc_SuspendMode_soft : IfxMsc.h
  • IfxMsc_Target_en0 : IfxMsc.h
  • IfxMsc_Target_en1 : IfxMsc.h
  • IfxMsc_Target_en2 : IfxMsc.h
  • IfxMsc_Target_en3 : IfxMsc.h
  • IfxMsc_TimeFrameInterrupt_disabled : IfxMsc.h
  • IfxMsc_TimeFrameInterrupt_enabled : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_TransmissionMode_dataRepetition : IfxMsc.h
  • IfxMsc_TransmissionMode_triggered : IfxMsc.h
  • IfxMsc_UnderflowInterrupt_disabled : IfxMsc.h
  • IfxMsc_UnderflowInterrupt_enabled : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR4 : IfxMsc.h
  • IfxMsc_UpstreamChannelFrameType_12bit : IfxMsc.h
  • IfxMsc_UpstreamChannelFrameType_16bit : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_128 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_16 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_256 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_32 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_4 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_64 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_8 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_disabled : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterrupt_disabled : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterrupt_enabled : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR4 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_1 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_1024 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_128 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_16 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_16384 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_2 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_2048 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_256 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_32 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_32768 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_4 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_4096 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_512 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_64 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_8 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_8192 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_1 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_10 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_11 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_12 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_13 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_14 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_15 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_16 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_2 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_3 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_4 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_5 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_6 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_7 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_8 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_9 : IfxMsc.h
  • IfxMtu_MbistSel_cifCif : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cifJpeg1_4 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cifJpeg3 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu0Dspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu0Pspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu0Ptag : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Dspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Dtag : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Pspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Ptag : IfxMtu_cfg.h
  • IfxMtu_MbistSel_dma : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem0 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem2 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem3 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem4 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem5 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem6 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem7 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_ememXtm0 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_ememXtm1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_erayIbfTbf : IfxMtu_cfg.h
  • IfxMtu_MbistSel_erayMbf : IfxMtu_cfg.h
  • IfxMtu_MbistSel_erayObf : IfxMtu_cfg.h
  • IfxMtu_MbistSel_ethermac : IfxMtu_cfg.h
  • IfxMtu_MbistSel_fft0 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_fft1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmDpll1a : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmDpll1b : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmDpll2 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmFifo : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmMcs0 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmMcs1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_mcan : IfxMtu_cfg.h
  • IfxMtu_MbistSel_mcds : IfxMtu_cfg.h
  • IfxMtu_MbistSel_mod4 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_none : IfxMtu_cfg.h
  • IfxMtu_MbistSel_psi5 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_stdbyRam1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_stdbyRam2 : IfxMtu_cfg.h
  • IfxMultican_ClockSelect_fclc : IfxMultican.h
  • IfxMultican_ClockSelect_fErayPll : IfxMultican.h
  • IfxMultican_ClockSelect_fosc0 : IfxMultican.h
  • IfxMultican_ClockSelect_noClock : IfxMultican.h
  • IfxMultican_DataLengthCode_0 : IfxMultican.h
  • IfxMultican_DataLengthCode_1 : IfxMultican.h
  • IfxMultican_DataLengthCode_12 : IfxMultican.h
  • IfxMultican_DataLengthCode_16 : IfxMultican.h
  • IfxMultican_DataLengthCode_2 : IfxMultican.h
  • IfxMultican_DataLengthCode_20 : IfxMultican.h
  • IfxMultican_DataLengthCode_24 : IfxMultican.h
  • IfxMultican_DataLengthCode_3 : IfxMultican.h
  • IfxMultican_DataLengthCode_32 : IfxMultican.h
  • IfxMultican_DataLengthCode_4 : IfxMultican.h
  • IfxMultican_DataLengthCode_48 : IfxMultican.h
  • IfxMultican_DataLengthCode_5 : IfxMultican.h
  • IfxMultican_DataLengthCode_6 : IfxMultican.h
  • IfxMultican_DataLengthCode_64 : IfxMultican.h
  • IfxMultican_DataLengthCode_7 : IfxMultican.h
  • IfxMultican_DataLengthCode_8 : IfxMultican.h
  • IfxMultican_Frame_receive : IfxMultican.h
  • IfxMultican_Frame_remoteAnswer : IfxMultican.h
  • IfxMultican_Frame_remoteRequest : IfxMultican.h
  • IfxMultican_Frame_transmit : IfxMultican.h
  • IfxMultican_FrameCounterMode_bitTimingMode : IfxMultican.h
  • IfxMultican_FrameCounterMode_errorCountMode : IfxMultican.h
  • IfxMultican_FrameCounterMode_frameCountMode : IfxMultican.h
  • IfxMultican_FrameCounterMode_timeStampMode : IfxMultican.h
  • IfxMultican_Index_0 : IfxMultican_cfg.h
  • IfxMultican_Index_none : IfxMultican_cfg.h
  • IfxMultican_MsgObjGroup_0 : IfxMultican.h
  • IfxMultican_MsgObjGroup_1 : IfxMultican.h
  • IfxMultican_MsgObjGroup_2 : IfxMultican.h
  • IfxMultican_MsgObjGroup_3 : IfxMultican.h
  • IfxMultican_MsgObjGroup_4 : IfxMultican.h
  • IfxMultican_MsgObjGroup_5 : IfxMultican.h
  • IfxMultican_MsgObjGroup_6 : IfxMultican.h
  • IfxMultican_MsgObjGroup_7 : IfxMultican.h
  • IfxMultican_MsgObjMode_canFD64 : IfxMultican.h
  • IfxMultican_MsgObjMode_gatewaySource : IfxMultican.h
  • IfxMultican_MsgObjMode_receiveFifoBase : IfxMultican.h
  • IfxMultican_MsgObjMode_standard : IfxMultican.h
  • IfxMultican_MsgObjMode_transmitFifoBase : IfxMultican.h
  • IfxMultican_MsgObjMode_transmitFifoSlave : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_messageDirection : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_messageLost : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_messageValid : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_newData : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_receiveEnable : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_receivePending : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_receiveTransmitSelected : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_receiveUpdating : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_transmitEnable0 : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_transmitEnable1 : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_transmitPending : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_transmitRequest : IfxMultican.h
  • IfxMultican_NodeId_0 : IfxMultican_cfg.h
  • IfxMultican_NodeId_1 : IfxMultican_cfg.h
  • IfxMultican_NodeId_2 : IfxMultican_cfg.h
  • IfxMultican_NodeId_3 : IfxMultican_cfg.h
  • IfxMultican_NodeId_none : IfxMultican_cfg.h
  • IfxMultican_Priority_CAN_ID : IfxMultican.h
  • IfxMultican_Priority_ListOrder : IfxMultican.h
  • IfxMultican_SleepMode_disable : IfxMultican.h
  • IfxMultican_SleepMode_enable : IfxMultican.h
  • IfxMultican_SrcId_0 : IfxMultican_cfg.h
  • IfxMultican_SrcId_1 : IfxMultican_cfg.h
  • IfxMultican_SrcId_10 : IfxMultican_cfg.h
  • IfxMultican_SrcId_11 : IfxMultican_cfg.h
  • IfxMultican_SrcId_12 : IfxMultican_cfg.h
  • IfxMultican_SrcId_13 : IfxMultican_cfg.h
  • IfxMultican_SrcId_14 : IfxMultican_cfg.h
  • IfxMultican_SrcId_15 : IfxMultican_cfg.h
  • IfxMultican_SrcId_2 : IfxMultican_cfg.h
  • IfxMultican_SrcId_3 : IfxMultican_cfg.h
  • IfxMultican_SrcId_4 : IfxMultican_cfg.h
  • IfxMultican_SrcId_5 : IfxMultican_cfg.h
  • IfxMultican_SrcId_6 : IfxMultican_cfg.h
  • IfxMultican_SrcId_7 : IfxMultican_cfg.h
  • IfxMultican_SrcId_8 : IfxMultican_cfg.h
  • IfxMultican_SrcId_9 : IfxMultican_cfg.h
  • IfxMultican_Status_busHeavy : IfxMultican.h
  • IfxMultican_Status_busOff : IfxMultican.h
  • IfxMultican_Status_messageLost : IfxMultican.h
  • IfxMultican_Status_newData : IfxMultican.h
  • IfxMultican_Status_newDataButOneLost : IfxMultican.h
  • IfxMultican_Status_notInitialised : IfxMultican.h
  • IfxMultican_Status_notSentBusy : IfxMultican.h
  • IfxMultican_Status_ok : IfxMultican.h
  • IfxMultican_Status_receiveEmpty : IfxMultican.h
  • IfxMultican_Status_wrongParam : IfxMultican.h
  • IfxMultican_Status_wrongPin : IfxMultican.h
  • IfxMultican_SuspendMode_hard : IfxMultican.h
  • IfxMultican_SuspendMode_none : IfxMultican.h
  • IfxMultican_SuspendMode_soft : IfxMultican.h
  • IfxPort_ControlledBy_hsct : IfxPort.h
  • IfxPort_ControlledBy_port : IfxPort.h
  • IfxPort_Index_00 : IfxPort_cfg.h
  • IfxPort_Index_02 : IfxPort_cfg.h
  • IfxPort_Index_10 : IfxPort_cfg.h
  • IfxPort_Index_11 : IfxPort_cfg.h
  • IfxPort_Index_13 : IfxPort_cfg.h
  • IfxPort_Index_14 : IfxPort_cfg.h
  • IfxPort_Index_15 : IfxPort_cfg.h
  • IfxPort_Index_20 : IfxPort_cfg.h
  • IfxPort_Index_21 : IfxPort_cfg.h
  • IfxPort_Index_22 : IfxPort_cfg.h
  • IfxPort_Index_23 : IfxPort_cfg.h
  • IfxPort_Index_32 : IfxPort_cfg.h
  • IfxPort_Index_33 : IfxPort_cfg.h
  • IfxPort_Index_none : IfxPort_cfg.h
  • IfxPort_InputMode_noPullDevice : IfxPort.h
  • IfxPort_InputMode_pullDown : IfxPort.h
  • IfxPort_InputMode_pullUp : IfxPort.h
  • IfxPort_InputMode_undefined : IfxPort.h
  • IfxPort_Mode_inputNoPullDevice : IfxPort.h
  • IfxPort_Mode_inputPullDown : IfxPort.h
  • IfxPort_Mode_inputPullUp : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt1 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt2 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt3 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt4 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt5 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt6 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt7 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainGeneral : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt1 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt2 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt3 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt4 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt5 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt6 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt7 : IfxPort.h
  • IfxPort_Mode_outputPushPullGeneral : IfxPort.h
  • IfxPort_OutputIdx_alt1 : IfxPort.h
  • IfxPort_OutputIdx_alt2 : IfxPort.h
  • IfxPort_OutputIdx_alt3 : IfxPort.h
  • IfxPort_OutputIdx_alt4 : IfxPort.h
  • IfxPort_OutputIdx_alt5 : IfxPort.h
  • IfxPort_OutputIdx_alt6 : IfxPort.h
  • IfxPort_OutputIdx_alt7 : IfxPort.h
  • IfxPort_OutputIdx_general : IfxPort.h
  • IfxPort_OutputMode_none : IfxPort.h
  • IfxPort_OutputMode_openDrain : IfxPort.h
  • IfxPort_OutputMode_pushPull : IfxPort.h
  • IfxPort_PadDriver_cmosAutomotiveSpeed1 : IfxPort.h
  • IfxPort_PadDriver_cmosAutomotiveSpeed2 : IfxPort.h
  • IfxPort_PadDriver_cmosAutomotiveSpeed3 : IfxPort.h
  • IfxPort_PadDriver_cmosAutomotiveSpeed4 : IfxPort.h
  • IfxPort_PadDriver_lvdsSpeed1 : IfxPort.h
  • IfxPort_PadDriver_lvdsSpeed2 : IfxPort.h
  • IfxPort_PadDriver_lvdsSpeed3 : IfxPort.h
  • IfxPort_PadDriver_lvdsSpeed4 : IfxPort.h
  • IfxPort_PadDriver_ttlSpeed1 : IfxPort.h
  • IfxPort_PadDriver_ttlSpeed2 : IfxPort.h
  • IfxPort_PadDriver_ttlSpeed3 : IfxPort.h
  • IfxPort_PadDriver_ttlSpeed4 : IfxPort.h
  • IfxPort_PadSupply_3v : IfxPort.h
  • IfxPort_PadSupply_5v : IfxPort.h
  • IfxPort_State_high : IfxPort.h
  • IfxPort_State_low : IfxPort.h
  • IfxPort_State_notChanged : IfxPort.h
  • IfxPort_State_toggled : IfxPort.h
  • IfxPsi5_AlternateInput_0 : IfxPsi5.h
  • IfxPsi5_AlternateInput_1 : IfxPsi5.h
  • IfxPsi5_AlternateInput_2 : IfxPsi5.h
  • IfxPsi5_AlternateInput_3 : IfxPsi5.h
  • IfxPsi5_BaudRate_125 : IfxPsi5.h
  • IfxPsi5_BaudRate_189 : IfxPsi5.h
  • IfxPsi5_ChannelId_0 : IfxPsi5_cfg.h
  • IfxPsi5_ChannelId_1 : IfxPsi5_cfg.h
  • IfxPsi5_ChannelId_2 : IfxPsi5_cfg.h
  • IfxPsi5_ChannelId_none : IfxPsi5_cfg.h
  • IfxPsi5_ClockType_fastClock_189 : IfxPsi5.h
  • IfxPsi5_ClockType_fracDiv : IfxPsi5.h
  • IfxPsi5_ClockType_slowClock_125 : IfxPsi5.h
  • IfxPsi5_ClockType_timeStamp : IfxPsi5.h
  • IfxPsi5_CRCorParity_crc : IfxPsi5.h
  • IfxPsi5_CRCorParity_parity : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_0 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_1 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_10 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_11 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_12 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_13 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_14 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_15 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_2 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_3 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_4 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_5 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_6 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_7 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_8 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_9 : IfxPsi5.h
  • IfxPsi5_DividerMode_fractional : IfxPsi5.h
  • IfxPsi5_DividerMode_normal : IfxPsi5.h
  • IfxPsi5_DividerMode_off : IfxPsi5.h
  • IfxPsi5_DividerMode_spb : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister_highbitrate : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister_lowbitrate : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister_normal : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister_timestamp : IfxPsi5.h
  • IfxPsi5_FrameExpectation_expected : IfxPsi5.h
  • IfxPsi5_FrameExpectation_notExpected : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_0 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_1 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_2 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_3 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_4 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_5 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_6 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_7 : IfxPsi5.h
  • IfxPsi5_InterruptStatusRegister_a : IfxPsi5.h
  • IfxPsi5_InterruptStatusRegister_b : IfxPsi5.h
  • IfxPsi5_MessagingBits_absent : IfxPsi5.h
  • IfxPsi5_MessagingBits_present : IfxPsi5.h
  • IfxPsi5_ReceiveDataRegisterTimestamp_frame : IfxPsi5.h
  • IfxPsi5_ReceiveDataRegisterTimestamp_pulse : IfxPsi5.h
  • IfxPsi5_ReceiverControlRegister_a : IfxPsi5.h
  • IfxPsi5_ReceiverControlRegister_b : IfxPsi5.h
  • IfxPsi5_ReceiverControlRegister_c : IfxPsi5.h
  • IfxPsi5_Slot_0 : IfxPsi5.h
  • IfxPsi5_Slot_1 : IfxPsi5.h
  • IfxPsi5_Slot_2 : IfxPsi5.h
  • IfxPsi5_Slot_3 : IfxPsi5.h
  • IfxPsi5_Slot_4 : IfxPsi5.h
  • IfxPsi5_Slot_5 : IfxPsi5.h
  • IfxPsi5_SuspendMode_hard : IfxPsi5.h
  • IfxPsi5_SuspendMode_none : IfxPsi5.h
  • IfxPsi5_SuspendMode_soft : IfxPsi5.h
  • IfxPsi5_TimeBase_external : IfxPsi5.h
  • IfxPsi5_TimeBase_internal : IfxPsi5.h
  • IfxPsi5_TimestampRegister_a : IfxPsi5.h
  • IfxPsi5_TimestampRegister_b : IfxPsi5.h
  • IfxPsi5_TimestampRegister_c : IfxPsi5.h
  • IfxPsi5_Trigger_0 : IfxPsi5.h
  • IfxPsi5_Trigger_1 : IfxPsi5.h
  • IfxPsi5_Trigger_2 : IfxPsi5.h
  • IfxPsi5_Trigger_3 : IfxPsi5.h
  • IfxPsi5_Trigger_4 : IfxPsi5.h
  • IfxPsi5_Trigger_5 : IfxPsi5.h
  • IfxPsi5_TriggerType_bypass : IfxPsi5.h
  • IfxPsi5_TriggerType_external : IfxPsi5.h
  • IfxPsi5_TriggerType_periodic : IfxPsi5.h
  • IfxPsi5_Verbose_off : IfxPsi5.h
  • IfxPsi5_Verbose_on : IfxPsi5.h
  • IfxPsi5s_AlternateInput_0 : IfxPsi5s.h
  • IfxPsi5s_AlternateInput_1 : IfxPsi5s.h
  • IfxPsi5s_AlternateInput_2 : IfxPsi5s.h
  • IfxPsi5s_AlternateInput_3 : IfxPsi5s.h
  • IfxPsi5s_AscBaudratePrescalar_divideBy2 : IfxPsi5s.h
  • IfxPsi5s_AscBaudratePrescalar_divideBy3 : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_7bitDataWithParity : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_8bitData : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_8bitDataWithParity : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_8bitDataWithWakeup : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_9bitData : IfxPsi5s.h
  • IfxPsi5s_AscMode_sync : IfxPsi5s.h
  • IfxPsi5s_AscStopBits_1 : IfxPsi5s.h
  • IfxPsi5s_AscStopBits_2 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_0 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_1 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_2 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_3 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_4 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_5 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_6 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_7 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_none : IfxPsi5s.h
  • IfxPsi5s_ClockType_ascFracDiv : IfxPsi5s.h
  • IfxPsi5s_ClockType_ascOutput : IfxPsi5s.h
  • IfxPsi5s_ClockType_fracDiv : IfxPsi5s.h
  • IfxPsi5s_ClockType_timeStamp : IfxPsi5s.h
  • IfxPsi5s_CrcOrParity_crc : IfxPsi5s.h
  • IfxPsi5s_CrcOrParity_parity : IfxPsi5s.h
  • IfxPsi5s_DividerMode_fractional : IfxPsi5s.h
  • IfxPsi5s_DividerMode_normal : IfxPsi5s.h
  • IfxPsi5s_DividerMode_off : IfxPsi5s.h
  • IfxPsi5s_DividerMode_spb : IfxPsi5s.h
  • IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 : IfxPsi5s.h
  • IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 : IfxPsi5s.h
  • IfxPsi5s_EnhancedProtocol_toothGapMethod : IfxPsi5s.h
  • IfxPsi5s_FrameId_frameHeader : IfxPsi5s.h
  • IfxPsi5s_FrameId_rollingNumber : IfxPsi5s.h
  • IfxPsi5s_IdleTime_1 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_10 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_11 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_12 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_13 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_14 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_15 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_16 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_2 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_3 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_4 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_5 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_6 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_7 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_8 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_9 : IfxPsi5s.h
  • IfxPsi5s_LoopBackMode_disable : IfxPsi5s.h
  • IfxPsi5s_LoopBackMode_enable : IfxPsi5s.h
  • IfxPsi5s_MessagingBits_absent : IfxPsi5s.h
  • IfxPsi5s_MessagingBits_present : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_1 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_2 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_3 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_4 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_5 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_6 : IfxPsi5s.h
  • IfxPsi5s_SleepMode_disable : IfxPsi5s.h
  • IfxPsi5s_SleepMode_enable : IfxPsi5s.h
  • IfxPsi5s_SuspendMode_hard : IfxPsi5s.h
  • IfxPsi5s_SuspendMode_none : IfxPsi5s.h
  • IfxPsi5s_SuspendMode_soft : IfxPsi5s.h
  • IfxPsi5s_TimeBase_external : IfxPsi5s.h
  • IfxPsi5s_TimeBase_internal : IfxPsi5s.h
  • IfxPsi5s_TimestampRegister_a : IfxPsi5s.h
  • IfxPsi5s_TimestampRegister_b : IfxPsi5s.h
  • IfxPsi5s_TimestampTrigger_frame : IfxPsi5s.h
  • IfxPsi5s_TimestampTrigger_syncPulse : IfxPsi5s.h
  • IfxPsi5s_Trigger_0 : IfxPsi5s.h
  • IfxPsi5s_Trigger_1 : IfxPsi5s.h
  • IfxPsi5s_Trigger_2 : IfxPsi5s.h
  • IfxPsi5s_Trigger_3 : IfxPsi5s.h
  • IfxPsi5s_Trigger_4 : IfxPsi5s.h
  • IfxPsi5s_Trigger_5 : IfxPsi5s.h
  • IfxPsi5s_Trigger_6 : IfxPsi5s.h
  • IfxPsi5s_Trigger_7 : IfxPsi5s.h
  • IfxPsi5s_TriggerType_external : IfxPsi5s.h
  • IfxPsi5s_TriggerType_periodic : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount_3 : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount_4 : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount_5 : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount_6 : IfxPsi5s.h
  • IfxPsi5s_WatchdogTimerMode_frame : IfxPsi5s.h
  • IfxPsi5s_WatchdogTimerMode_syncPulse : IfxPsi5s.h
  • IfxQspi_ChannelId_0 : IfxQspi.h
  • IfxQspi_ChannelId_1 : IfxQspi.h
  • IfxQspi_ChannelId_10 : IfxQspi.h
  • IfxQspi_ChannelId_11 : IfxQspi.h
  • IfxQspi_ChannelId_12 : IfxQspi.h
  • IfxQspi_ChannelId_13 : IfxQspi.h
  • IfxQspi_ChannelId_14 : IfxQspi.h
  • IfxQspi_ChannelId_2 : IfxQspi.h
  • IfxQspi_ChannelId_3 : IfxQspi.h
  • IfxQspi_ChannelId_4 : IfxQspi.h
  • IfxQspi_ChannelId_5 : IfxQspi.h
  • IfxQspi_ChannelId_6 : IfxQspi.h
  • IfxQspi_ChannelId_7 : IfxQspi.h
  • IfxQspi_ChannelId_8 : IfxQspi.h
  • IfxQspi_ChannelId_9 : IfxQspi.h
  • IfxQspi_DataLengthUnit_bit : IfxQspi.h
  • IfxQspi_DataLengthUnit_byte : IfxQspi.h
  • IfxQspi_Error_baudrate : IfxQspi.h
  • IfxQspi_Error_configuration : IfxQspi.h
  • IfxQspi_Error_expectTimeout : IfxQspi.h
  • IfxQspi_Error_none : IfxQspi.h
  • IfxQspi_Error_parity : IfxQspi.h
  • IfxQspi_Error_rxfifoOverflow : IfxQspi.h
  • IfxQspi_Error_rxfifoUnderflow : IfxQspi.h
  • IfxQspi_Error_slsiMisplacedInactivation : IfxQspi.h
  • IfxQspi_Error_txfifoOverflow : IfxQspi.h
  • IfxQspi_Error_txfifoUnderflow : IfxQspi.h
  • IfxQspi_ExpectTimeout_1024 : IfxQspi.h
  • IfxQspi_ExpectTimeout_1048576 : IfxQspi.h
  • IfxQspi_ExpectTimeout_128 : IfxQspi.h
  • IfxQspi_ExpectTimeout_131072 : IfxQspi.h
  • IfxQspi_ExpectTimeout_16384 : IfxQspi.h
  • IfxQspi_ExpectTimeout_2048 : IfxQspi.h
  • IfxQspi_ExpectTimeout_2097152 : IfxQspi.h
  • IfxQspi_ExpectTimeout_256 : IfxQspi.h
  • IfxQspi_ExpectTimeout_262144 : IfxQspi.h
  • IfxQspi_ExpectTimeout_32768 : IfxQspi.h
  • IfxQspi_ExpectTimeout_4096 : IfxQspi.h
  • IfxQspi_ExpectTimeout_512 : IfxQspi.h
  • IfxQspi_ExpectTimeout_524288 : IfxQspi.h
  • IfxQspi_ExpectTimeout_64 : IfxQspi.h
  • IfxQspi_ExpectTimeout_65536 : IfxQspi.h
  • IfxQspi_ExpectTimeout_8192 : IfxQspi.h
  • IfxQspi_FifoMode_batchMove : IfxQspi.h
  • IfxQspi_FifoMode_combinedMove : IfxQspi.h
  • IfxQspi_FifoMode_singleMove : IfxQspi.h
  • IfxQspi_Index_0 : IfxQspi_cfg.h
  • IfxQspi_Index_1 : IfxQspi_cfg.h
  • IfxQspi_Index_2 : IfxQspi_cfg.h
  • IfxQspi_Index_3 : IfxQspi_cfg.h
  • IfxQspi_Index_none : IfxQspi_cfg.h
  • IfxQspi_Mode_master : IfxQspi.h
  • IfxQspi_Mode_pwmOverQspi : IfxQspi.h
  • IfxQspi_Mode_slave : IfxQspi.h
  • IfxQspi_PauseRunTransition_pause : IfxQspi.h
  • IfxQspi_PauseRunTransition_run : IfxQspi.h
  • IfxQspi_Phase_data : IfxQspi.h
  • IfxQspi_Phase_expect : IfxQspi.h
  • IfxQspi_Phase_idleA : IfxQspi.h
  • IfxQspi_Phase_idleB : IfxQspi.h
  • IfxQspi_Phase_lead : IfxQspi.h
  • IfxQspi_Phase_leadStrobe : IfxQspi.h
  • IfxQspi_Phase_trail : IfxQspi.h
  • IfxQspi_Phase_trailStrobe : IfxQspi.h
  • IfxQspi_Phase_wait : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_dataNotAvailable : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_endOfExpect : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_endOfFrame : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_endOfWait : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_receiveBufferFilled : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_serialClockPolarityChange : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_startOfFrame : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_transmitBufferEmptied : IfxQspi.h
  • IfxQspi_Reset_kernel : IfxQspi.h
  • IfxQspi_Reset_none : IfxQspi.h
  • IfxQspi_Reset_stateMachineAndFifo : IfxQspi.h
  • IfxQspi_RxFifoInt_0 : IfxQspi.h
  • IfxQspi_RxFifoInt_1 : IfxQspi.h
  • IfxQspi_RxFifoInt_2 : IfxQspi.h
  • IfxQspi_RxFifoInt_3 : IfxQspi.h
  • IfxQspi_SleepMode_disable : IfxQspi.h
  • IfxQspi_SleepMode_enable : IfxQspi.h
  • IfxQspi_SpiMaster_ChannelBasedCs_disabled : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_ChannelBasedCs_enabled : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_long : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_longContinuous : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_short : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_shortContinuous : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_xxl : IfxQspi_SpiMaster.h
  • IfxQspi_StrobeDelay_1 : IfxQspi.h
  • IfxQspi_StrobeDelay_10 : IfxQspi.h
  • IfxQspi_StrobeDelay_11 : IfxQspi.h
  • IfxQspi_StrobeDelay_12 : IfxQspi.h
  • IfxQspi_StrobeDelay_13 : IfxQspi.h
  • IfxQspi_StrobeDelay_14 : IfxQspi.h
  • IfxQspi_StrobeDelay_15 : IfxQspi.h
  • IfxQspi_StrobeDelay_16 : IfxQspi.h
  • IfxQspi_StrobeDelay_17 : IfxQspi.h
  • IfxQspi_StrobeDelay_18 : IfxQspi.h
  • IfxQspi_StrobeDelay_19 : IfxQspi.h
  • IfxQspi_StrobeDelay_2 : IfxQspi.h
  • IfxQspi_StrobeDelay_20 : IfxQspi.h
  • IfxQspi_StrobeDelay_21 : IfxQspi.h
  • IfxQspi_StrobeDelay_22 : IfxQspi.h
  • IfxQspi_StrobeDelay_23 : IfxQspi.h
  • IfxQspi_StrobeDelay_24 : IfxQspi.h
  • IfxQspi_StrobeDelay_25 : IfxQspi.h
  • IfxQspi_StrobeDelay_26 : IfxQspi.h
  • IfxQspi_StrobeDelay_27 : IfxQspi.h
  • IfxQspi_StrobeDelay_28 : IfxQspi.h
  • IfxQspi_StrobeDelay_29 : IfxQspi.h
  • IfxQspi_StrobeDelay_3 : IfxQspi.h
  • IfxQspi_StrobeDelay_30 : IfxQspi.h
  • IfxQspi_StrobeDelay_31 : IfxQspi.h
  • IfxQspi_StrobeDelay_32 : IfxQspi.h
  • IfxQspi_StrobeDelay_4 : IfxQspi.h
  • IfxQspi_StrobeDelay_5 : IfxQspi.h
  • IfxQspi_StrobeDelay_6 : IfxQspi.h
  • IfxQspi_StrobeDelay_7 : IfxQspi.h
  • IfxQspi_StrobeDelay_8 : IfxQspi.h
  • IfxQspi_StrobeDelay_9 : IfxQspi.h
  • IfxQspi_SuspendMode_hard : IfxQspi.h
  • IfxQspi_SuspendMode_none : IfxQspi.h
  • IfxQspi_SuspendMode_soft : IfxQspi.h
  • IfxQspi_TxFifoInt_1 : IfxQspi.h
  • IfxQspi_TxFifoInt_2 : IfxQspi.h
  • IfxQspi_TxFifoInt_3 : IfxQspi.h
  • IfxQspi_TxFifoInt_4 : IfxQspi.h
  • IfxScu_CCUCON0_CLKSEL_fBack : IfxScu_cfg.h
  • IfxScu_CCUCON0_CLKSEL_fPll : IfxScu_cfg.h
  • IfxScu_CCUCON1_INSEL_fOsc0 : IfxScu_cfg.h
  • IfxScu_CCUCON1_INSEL_fOsc1 : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP_Idle : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP_Run : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP_Sleep : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP_Stby : IfxScu_cfg.h
  • IfxScu_WDTCON1_IR_divBy16384 : IfxScu_cfg.h
  • IfxScu_WDTCON1_IR_divBy256 : IfxScu_cfg.h
  • IfxScu_WDTCON1_IR_divBy64 : IfxScu_cfg.h
  • IfxScuCcu_K1divider_1 : IfxScuCcu.h
  • IfxScuCcu_K1divider_10 : IfxScuCcu.h
  • IfxScuCcu_K1divider_100 : IfxScuCcu.h
  • IfxScuCcu_K1divider_101 : IfxScuCcu.h
  • IfxScuCcu_K1divider_102 : IfxScuCcu.h
  • IfxScuCcu_K1divider_103 : IfxScuCcu.h
  • IfxScuCcu_K1divider_104 : IfxScuCcu.h
  • IfxScuCcu_K1divider_105 : IfxScuCcu.h
  • IfxScuCcu_K1divider_106 : IfxScuCcu.h
  • IfxScuCcu_K1divider_107 : IfxScuCcu.h
  • IfxScuCcu_K1divider_108 : IfxScuCcu.h
  • IfxScuCcu_K1divider_109 : IfxScuCcu.h
  • IfxScuCcu_K1divider_11 : IfxScuCcu.h
  • IfxScuCcu_K1divider_110 : IfxScuCcu.h
  • IfxScuCcu_K1divider_111 : IfxScuCcu.h
  • IfxScuCcu_K1divider_112 : IfxScuCcu.h
  • IfxScuCcu_K1divider_113 : IfxScuCcu.h
  • IfxScuCcu_K1divider_114 : IfxScuCcu.h
  • IfxScuCcu_K1divider_115 : IfxScuCcu.h
  • IfxScuCcu_K1divider_116 : IfxScuCcu.h
  • IfxScuCcu_K1divider_117 : IfxScuCcu.h
  • IfxScuCcu_K1divider_118 : IfxScuCcu.h
  • IfxScuCcu_K1divider_119 : IfxScuCcu.h
  • IfxScuCcu_K1divider_12 : IfxScuCcu.h
  • IfxScuCcu_K1divider_120 : IfxScuCcu.h
  • IfxScuCcu_K1divider_121 : IfxScuCcu.h
  • IfxScuCcu_K1divider_122 : IfxScuCcu.h
  • IfxScuCcu_K1divider_123 : IfxScuCcu.h
  • IfxScuCcu_K1divider_124 : IfxScuCcu.h
  • IfxScuCcu_K1divider_125 : IfxScuCcu.h
  • IfxScuCcu_K1divider_126 : IfxScuCcu.h
  • IfxScuCcu_K1divider_127 : IfxScuCcu.h
  • IfxScuCcu_K1divider_128 : IfxScuCcu.h
  • IfxScuCcu_K1divider_13 : IfxScuCcu.h
  • IfxScuCcu_K1divider_14 : IfxScuCcu.h
  • IfxScuCcu_K1divider_15 : IfxScuCcu.h
  • IfxScuCcu_K1divider_16 : IfxScuCcu.h
  • IfxScuCcu_K1divider_17 : IfxScuCcu.h
  • IfxScuCcu_K1divider_18 : IfxScuCcu.h
  • IfxScuCcu_K1divider_19 : IfxScuCcu.h
  • IfxScuCcu_K1divider_2 : IfxScuCcu.h
  • IfxScuCcu_K1divider_20 : IfxScuCcu.h
  • IfxScuCcu_K1divider_21 : IfxScuCcu.h
  • IfxScuCcu_K1divider_22 : IfxScuCcu.h
  • IfxScuCcu_K1divider_23 : IfxScuCcu.h
  • IfxScuCcu_K1divider_24 : IfxScuCcu.h
  • IfxScuCcu_K1divider_25 : IfxScuCcu.h
  • IfxScuCcu_K1divider_26 : IfxScuCcu.h
  • IfxScuCcu_K1divider_27 : IfxScuCcu.h
  • IfxScuCcu_K1divider_28 : IfxScuCcu.h
  • IfxScuCcu_K1divider_29 : IfxScuCcu.h
  • IfxScuCcu_K1divider_3 : IfxScuCcu.h
  • IfxScuCcu_K1divider_30 : IfxScuCcu.h
  • IfxScuCcu_K1divider_31 : IfxScuCcu.h
  • IfxScuCcu_K1divider_32 : IfxScuCcu.h
  • IfxScuCcu_K1divider_33 : IfxScuCcu.h
  • IfxScuCcu_K1divider_34 : IfxScuCcu.h
  • IfxScuCcu_K1divider_35 : IfxScuCcu.h
  • IfxScuCcu_K1divider_36 : IfxScuCcu.h
  • IfxScuCcu_K1divider_37 : IfxScuCcu.h
  • IfxScuCcu_K1divider_38 : IfxScuCcu.h
  • IfxScuCcu_K1divider_39 : IfxScuCcu.h
  • IfxScuCcu_K1divider_4 : IfxScuCcu.h
  • IfxScuCcu_K1divider_40 : IfxScuCcu.h
  • IfxScuCcu_K1divider_41 : IfxScuCcu.h
  • IfxScuCcu_K1divider_42 : IfxScuCcu.h
  • IfxScuCcu_K1divider_43 : IfxScuCcu.h
  • IfxScuCcu_K1divider_44 : IfxScuCcu.h
  • IfxScuCcu_K1divider_45 : IfxScuCcu.h
  • IfxScuCcu_K1divider_46 : IfxScuCcu.h
  • IfxScuCcu_K1divider_47 : IfxScuCcu.h
  • IfxScuCcu_K1divider_48 : IfxScuCcu.h
  • IfxScuCcu_K1divider_49 : IfxScuCcu.h
  • IfxScuCcu_K1divider_5 : IfxScuCcu.h
  • IfxScuCcu_K1divider_50 : IfxScuCcu.h
  • IfxScuCcu_K1divider_51 : IfxScuCcu.h
  • IfxScuCcu_K1divider_52 : IfxScuCcu.h
  • IfxScuCcu_K1divider_53 : IfxScuCcu.h
  • IfxScuCcu_K1divider_54 : IfxScuCcu.h
  • IfxScuCcu_K1divider_55 : IfxScuCcu.h
  • IfxScuCcu_K1divider_56 : IfxScuCcu.h
  • IfxScuCcu_K1divider_57 : IfxScuCcu.h
  • IfxScuCcu_K1divider_58 : IfxScuCcu.h
  • IfxScuCcu_K1divider_59 : IfxScuCcu.h
  • IfxScuCcu_K1divider_6 : IfxScuCcu.h
  • IfxScuCcu_K1divider_60 : IfxScuCcu.h
  • IfxScuCcu_K1divider_61 : IfxScuCcu.h
  • IfxScuCcu_K1divider_62 : IfxScuCcu.h
  • IfxScuCcu_K1divider_63 : IfxScuCcu.h
  • IfxScuCcu_K1divider_64 : IfxScuCcu.h
  • IfxScuCcu_K1divider_65 : IfxScuCcu.h
  • IfxScuCcu_K1divider_66 : IfxScuCcu.h
  • IfxScuCcu_K1divider_67 : IfxScuCcu.h
  • IfxScuCcu_K1divider_68 : IfxScuCcu.h
  • IfxScuCcu_K1divider_69 : IfxScuCcu.h
  • IfxScuCcu_K1divider_7 : IfxScuCcu.h
  • IfxScuCcu_K1divider_70 : IfxScuCcu.h
  • IfxScuCcu_K1divider_71 : IfxScuCcu.h
  • IfxScuCcu_K1divider_72 : IfxScuCcu.h
  • IfxScuCcu_K1divider_73 : IfxScuCcu.h
  • IfxScuCcu_K1divider_74 : IfxScuCcu.h
  • IfxScuCcu_K1divider_75 : IfxScuCcu.h
  • IfxScuCcu_K1divider_76 : IfxScuCcu.h
  • IfxScuCcu_K1divider_77 : IfxScuCcu.h
  • IfxScuCcu_K1divider_78 : IfxScuCcu.h
  • IfxScuCcu_K1divider_79 : IfxScuCcu.h
  • IfxScuCcu_K1divider_8 : IfxScuCcu.h
  • IfxScuCcu_K1divider_80 : IfxScuCcu.h
  • IfxScuCcu_K1divider_81 : IfxScuCcu.h
  • IfxScuCcu_K1divider_82 : IfxScuCcu.h
  • IfxScuCcu_K1divider_83 : IfxScuCcu.h
  • IfxScuCcu_K1divider_84 : IfxScuCcu.h
  • IfxScuCcu_K1divider_85 : IfxScuCcu.h
  • IfxScuCcu_K1divider_86 : IfxScuCcu.h
  • IfxScuCcu_K1divider_87 : IfxScuCcu.h
  • IfxScuCcu_K1divider_88 : IfxScuCcu.h
  • IfxScuCcu_K1divider_89 : IfxScuCcu.h
  • IfxScuCcu_K1divider_9 : IfxScuCcu.h
  • IfxScuCcu_K1divider_90 : IfxScuCcu.h
  • IfxScuCcu_K1divider_91 : IfxScuCcu.h
  • IfxScuCcu_K1divider_92 : IfxScuCcu.h
  • IfxScuCcu_K1divider_93 : IfxScuCcu.h
  • IfxScuCcu_K1divider_94 : IfxScuCcu.h
  • IfxScuCcu_K1divider_95 : IfxScuCcu.h
  • IfxScuCcu_K1divider_96 : IfxScuCcu.h
  • IfxScuCcu_K1divider_97 : IfxScuCcu.h
  • IfxScuCcu_K1divider_98 : IfxScuCcu.h
  • IfxScuCcu_K1divider_99 : IfxScuCcu.h
  • IfxScuCcu_K2divider_1 : IfxScuCcu.h
  • IfxScuCcu_K2divider_10 : IfxScuCcu.h
  • IfxScuCcu_K2divider_100 : IfxScuCcu.h
  • IfxScuCcu_K2divider_101 : IfxScuCcu.h
  • IfxScuCcu_K2divider_102 : IfxScuCcu.h
  • IfxScuCcu_K2divider_103 : IfxScuCcu.h
  • IfxScuCcu_K2divider_104 : IfxScuCcu.h
  • IfxScuCcu_K2divider_105 : IfxScuCcu.h
  • IfxScuCcu_K2divider_106 : IfxScuCcu.h
  • IfxScuCcu_K2divider_107 : IfxScuCcu.h
  • IfxScuCcu_K2divider_108 : IfxScuCcu.h
  • IfxScuCcu_K2divider_109 : IfxScuCcu.h
  • IfxScuCcu_K2divider_11 : IfxScuCcu.h
  • IfxScuCcu_K2divider_110 : IfxScuCcu.h
  • IfxScuCcu_K2divider_111 : IfxScuCcu.h
  • IfxScuCcu_K2divider_112 : IfxScuCcu.h
  • IfxScuCcu_K2divider_113 : IfxScuCcu.h
  • IfxScuCcu_K2divider_114 : IfxScuCcu.h
  • IfxScuCcu_K2divider_115 : IfxScuCcu.h
  • IfxScuCcu_K2divider_116 : IfxScuCcu.h
  • IfxScuCcu_K2divider_117 : IfxScuCcu.h
  • IfxScuCcu_K2divider_118 : IfxScuCcu.h
  • IfxScuCcu_K2divider_119 : IfxScuCcu.h
  • IfxScuCcu_K2divider_12 : IfxScuCcu.h
  • IfxScuCcu_K2divider_120 : IfxScuCcu.h
  • IfxScuCcu_K2divider_121 : IfxScuCcu.h
  • IfxScuCcu_K2divider_122 : IfxScuCcu.h
  • IfxScuCcu_K2divider_123 : IfxScuCcu.h
  • IfxScuCcu_K2divider_124 : IfxScuCcu.h
  • IfxScuCcu_K2divider_125 : IfxScuCcu.h
  • IfxScuCcu_K2divider_126 : IfxScuCcu.h
  • IfxScuCcu_K2divider_127 : IfxScuCcu.h
  • IfxScuCcu_K2divider_128 : IfxScuCcu.h
  • IfxScuCcu_K2divider_13 : IfxScuCcu.h
  • IfxScuCcu_K2divider_14 : IfxScuCcu.h
  • IfxScuCcu_K2divider_15 : IfxScuCcu.h
  • IfxScuCcu_K2divider_16 : IfxScuCcu.h
  • IfxScuCcu_K2divider_17 : IfxScuCcu.h
  • IfxScuCcu_K2divider_18 : IfxScuCcu.h
  • IfxScuCcu_K2divider_19 : IfxScuCcu.h
  • IfxScuCcu_K2divider_2 : IfxScuCcu.h
  • IfxScuCcu_K2divider_20 : IfxScuCcu.h
  • IfxScuCcu_K2divider_21 : IfxScuCcu.h
  • IfxScuCcu_K2divider_22 : IfxScuCcu.h
  • IfxScuCcu_K2divider_23 : IfxScuCcu.h
  • IfxScuCcu_K2divider_24 : IfxScuCcu.h
  • IfxScuCcu_K2divider_25 : IfxScuCcu.h
  • IfxScuCcu_K2divider_26 : IfxScuCcu.h
  • IfxScuCcu_K2divider_27 : IfxScuCcu.h
  • IfxScuCcu_K2divider_28 : IfxScuCcu.h
  • IfxScuCcu_K2divider_29 : IfxScuCcu.h
  • IfxScuCcu_K2divider_3 : IfxScuCcu.h
  • IfxScuCcu_K2divider_30 : IfxScuCcu.h
  • IfxScuCcu_K2divider_31 : IfxScuCcu.h
  • IfxScuCcu_K2divider_32 : IfxScuCcu.h
  • IfxScuCcu_K2divider_33 : IfxScuCcu.h
  • IfxScuCcu_K2divider_34 : IfxScuCcu.h
  • IfxScuCcu_K2divider_35 : IfxScuCcu.h
  • IfxScuCcu_K2divider_36 : IfxScuCcu.h
  • IfxScuCcu_K2divider_37 : IfxScuCcu.h
  • IfxScuCcu_K2divider_38 : IfxScuCcu.h
  • IfxScuCcu_K2divider_39 : IfxScuCcu.h
  • IfxScuCcu_K2divider_4 : IfxScuCcu.h
  • IfxScuCcu_K2divider_40 : IfxScuCcu.h
  • IfxScuCcu_K2divider_41 : IfxScuCcu.h
  • IfxScuCcu_K2divider_42 : IfxScuCcu.h
  • IfxScuCcu_K2divider_43 : IfxScuCcu.h
  • IfxScuCcu_K2divider_44 : IfxScuCcu.h
  • IfxScuCcu_K2divider_45 : IfxScuCcu.h
  • IfxScuCcu_K2divider_46 : IfxScuCcu.h
  • IfxScuCcu_K2divider_47 : IfxScuCcu.h
  • IfxScuCcu_K2divider_48 : IfxScuCcu.h
  • IfxScuCcu_K2divider_49 : IfxScuCcu.h
  • IfxScuCcu_K2divider_5 : IfxScuCcu.h
  • IfxScuCcu_K2divider_50 : IfxScuCcu.h
  • IfxScuCcu_K2divider_51 : IfxScuCcu.h
  • IfxScuCcu_K2divider_52 : IfxScuCcu.h
  • IfxScuCcu_K2divider_53 : IfxScuCcu.h
  • IfxScuCcu_K2divider_54 : IfxScuCcu.h
  • IfxScuCcu_K2divider_55 : IfxScuCcu.h
  • IfxScuCcu_K2divider_56 : IfxScuCcu.h
  • IfxScuCcu_K2divider_57 : IfxScuCcu.h
  • IfxScuCcu_K2divider_58 : IfxScuCcu.h
  • IfxScuCcu_K2divider_59 : IfxScuCcu.h
  • IfxScuCcu_K2divider_6 : IfxScuCcu.h
  • IfxScuCcu_K2divider_60 : IfxScuCcu.h
  • IfxScuCcu_K2divider_61 : IfxScuCcu.h
  • IfxScuCcu_K2divider_62 : IfxScuCcu.h
  • IfxScuCcu_K2divider_63 : IfxScuCcu.h
  • IfxScuCcu_K2divider_64 : IfxScuCcu.h
  • IfxScuCcu_K2divider_65 : IfxScuCcu.h
  • IfxScuCcu_K2divider_66 : IfxScuCcu.h
  • IfxScuCcu_K2divider_67 : IfxScuCcu.h
  • IfxScuCcu_K2divider_68 : IfxScuCcu.h
  • IfxScuCcu_K2divider_69 : IfxScuCcu.h
  • IfxScuCcu_K2divider_7 : IfxScuCcu.h
  • IfxScuCcu_K2divider_70 : IfxScuCcu.h
  • IfxScuCcu_K2divider_71 : IfxScuCcu.h
  • IfxScuCcu_K2divider_72 : IfxScuCcu.h
  • IfxScuCcu_K2divider_73 : IfxScuCcu.h
  • IfxScuCcu_K2divider_74 : IfxScuCcu.h
  • IfxScuCcu_K2divider_75 : IfxScuCcu.h
  • IfxScuCcu_K2divider_76 : IfxScuCcu.h
  • IfxScuCcu_K2divider_77 : IfxScuCcu.h
  • IfxScuCcu_K2divider_78 : IfxScuCcu.h
  • IfxScuCcu_K2divider_79 : IfxScuCcu.h
  • IfxScuCcu_K2divider_8 : IfxScuCcu.h
  • IfxScuCcu_K2divider_80 : IfxScuCcu.h
  • IfxScuCcu_K2divider_81 : IfxScuCcu.h
  • IfxScuCcu_K2divider_82 : IfxScuCcu.h
  • IfxScuCcu_K2divider_83 : IfxScuCcu.h
  • IfxScuCcu_K2divider_84 : IfxScuCcu.h
  • IfxScuCcu_K2divider_85 : IfxScuCcu.h
  • IfxScuCcu_K2divider_86 : IfxScuCcu.h
  • IfxScuCcu_K2divider_87 : IfxScuCcu.h
  • IfxScuCcu_K2divider_88 : IfxScuCcu.h
  • IfxScuCcu_K2divider_89 : IfxScuCcu.h
  • IfxScuCcu_K2divider_9 : IfxScuCcu.h
  • IfxScuCcu_K2divider_90 : IfxScuCcu.h
  • IfxScuCcu_K2divider_91 : IfxScuCcu.h
  • IfxScuCcu_K2divider_92 : IfxScuCcu.h
  • IfxScuCcu_K2divider_93 : IfxScuCcu.h
  • IfxScuCcu_K2divider_94 : IfxScuCcu.h
  • IfxScuCcu_K2divider_95 : IfxScuCcu.h
  • IfxScuCcu_K2divider_96 : IfxScuCcu.h
  • IfxScuCcu_K2divider_97 : IfxScuCcu.h
  • IfxScuCcu_K2divider_98 : IfxScuCcu.h
  • IfxScuCcu_K2divider_99 : IfxScuCcu.h
  • IfxScuCcu_K3divider_1 : IfxScuCcu.h
  • IfxScuCcu_K3divider_10 : IfxScuCcu.h
  • IfxScuCcu_K3divider_100 : IfxScuCcu.h
  • IfxScuCcu_K3divider_101 : IfxScuCcu.h
  • IfxScuCcu_K3divider_102 : IfxScuCcu.h
  • IfxScuCcu_K3divider_103 : IfxScuCcu.h
  • IfxScuCcu_K3divider_104 : IfxScuCcu.h
  • IfxScuCcu_K3divider_105 : IfxScuCcu.h
  • IfxScuCcu_K3divider_106 : IfxScuCcu.h
  • IfxScuCcu_K3divider_107 : IfxScuCcu.h
  • IfxScuCcu_K3divider_108 : IfxScuCcu.h
  • IfxScuCcu_K3divider_109 : IfxScuCcu.h
  • IfxScuCcu_K3divider_11 : IfxScuCcu.h
  • IfxScuCcu_K3divider_110 : IfxScuCcu.h
  • IfxScuCcu_K3divider_111 : IfxScuCcu.h
  • IfxScuCcu_K3divider_112 : IfxScuCcu.h
  • IfxScuCcu_K3divider_113 : IfxScuCcu.h
  • IfxScuCcu_K3divider_114 : IfxScuCcu.h
  • IfxScuCcu_K3divider_115 : IfxScuCcu.h
  • IfxScuCcu_K3divider_116 : IfxScuCcu.h
  • IfxScuCcu_K3divider_117 : IfxScuCcu.h
  • IfxScuCcu_K3divider_118 : IfxScuCcu.h
  • IfxScuCcu_K3divider_119 : IfxScuCcu.h
  • IfxScuCcu_K3divider_12 : IfxScuCcu.h
  • IfxScuCcu_K3divider_120 : IfxScuCcu.h
  • IfxScuCcu_K3divider_121 : IfxScuCcu.h
  • IfxScuCcu_K3divider_122 : IfxScuCcu.h
  • IfxScuCcu_K3divider_123 : IfxScuCcu.h
  • IfxScuCcu_K3divider_124 : IfxScuCcu.h
  • IfxScuCcu_K3divider_125 : IfxScuCcu.h
  • IfxScuCcu_K3divider_126 : IfxScuCcu.h
  • IfxScuCcu_K3divider_127 : IfxScuCcu.h
  • IfxScuCcu_K3divider_128 : IfxScuCcu.h
  • IfxScuCcu_K3divider_13 : IfxScuCcu.h
  • IfxScuCcu_K3divider_14 : IfxScuCcu.h
  • IfxScuCcu_K3divider_15 : IfxScuCcu.h
  • IfxScuCcu_K3divider_16 : IfxScuCcu.h
  • IfxScuCcu_K3divider_17 : IfxScuCcu.h
  • IfxScuCcu_K3divider_18 : IfxScuCcu.h
  • IfxScuCcu_K3divider_19 : IfxScuCcu.h
  • IfxScuCcu_K3divider_2 : IfxScuCcu.h
  • IfxScuCcu_K3divider_20 : IfxScuCcu.h
  • IfxScuCcu_K3divider_21 : IfxScuCcu.h
  • IfxScuCcu_K3divider_22 : IfxScuCcu.h
  • IfxScuCcu_K3divider_23 : IfxScuCcu.h
  • IfxScuCcu_K3divider_24 : IfxScuCcu.h
  • IfxScuCcu_K3divider_25 : IfxScuCcu.h
  • IfxScuCcu_K3divider_26 : IfxScuCcu.h
  • IfxScuCcu_K3divider_27 : IfxScuCcu.h
  • IfxScuCcu_K3divider_28 : IfxScuCcu.h
  • IfxScuCcu_K3divider_29 : IfxScuCcu.h
  • IfxScuCcu_K3divider_3 : IfxScuCcu.h
  • IfxScuCcu_K3divider_30 : IfxScuCcu.h
  • IfxScuCcu_K3divider_31 : IfxScuCcu.h
  • IfxScuCcu_K3divider_32 : IfxScuCcu.h
  • IfxScuCcu_K3divider_33 : IfxScuCcu.h
  • IfxScuCcu_K3divider_34 : IfxScuCcu.h
  • IfxScuCcu_K3divider_35 : IfxScuCcu.h
  • IfxScuCcu_K3divider_36 : IfxScuCcu.h
  • IfxScuCcu_K3divider_37 : IfxScuCcu.h
  • IfxScuCcu_K3divider_38 : IfxScuCcu.h
  • IfxScuCcu_K3divider_39 : IfxScuCcu.h
  • IfxScuCcu_K3divider_4 : IfxScuCcu.h
  • IfxScuCcu_K3divider_40 : IfxScuCcu.h
  • IfxScuCcu_K3divider_41 : IfxScuCcu.h
  • IfxScuCcu_K3divider_42 : IfxScuCcu.h
  • IfxScuCcu_K3divider_43 : IfxScuCcu.h
  • IfxScuCcu_K3divider_44 : IfxScuCcu.h
  • IfxScuCcu_K3divider_45 : IfxScuCcu.h
  • IfxScuCcu_K3divider_46 : IfxScuCcu.h
  • IfxScuCcu_K3divider_47 : IfxScuCcu.h
  • IfxScuCcu_K3divider_48 : IfxScuCcu.h
  • IfxScuCcu_K3divider_49 : IfxScuCcu.h
  • IfxScuCcu_K3divider_5 : IfxScuCcu.h
  • IfxScuCcu_K3divider_50 : IfxScuCcu.h
  • IfxScuCcu_K3divider_51 : IfxScuCcu.h
  • IfxScuCcu_K3divider_52 : IfxScuCcu.h
  • IfxScuCcu_K3divider_53 : IfxScuCcu.h
  • IfxScuCcu_K3divider_54 : IfxScuCcu.h
  • IfxScuCcu_K3divider_55 : IfxScuCcu.h
  • IfxScuCcu_K3divider_56 : IfxScuCcu.h
  • IfxScuCcu_K3divider_57 : IfxScuCcu.h
  • IfxScuCcu_K3divider_58 : IfxScuCcu.h
  • IfxScuCcu_K3divider_59 : IfxScuCcu.h
  • IfxScuCcu_K3divider_6 : IfxScuCcu.h
  • IfxScuCcu_K3divider_60 : IfxScuCcu.h
  • IfxScuCcu_K3divider_61 : IfxScuCcu.h
  • IfxScuCcu_K3divider_62 : IfxScuCcu.h
  • IfxScuCcu_K3divider_63 : IfxScuCcu.h
  • IfxScuCcu_K3divider_64 : IfxScuCcu.h
  • IfxScuCcu_K3divider_65 : IfxScuCcu.h
  • IfxScuCcu_K3divider_66 : IfxScuCcu.h
  • IfxScuCcu_K3divider_67 : IfxScuCcu.h
  • IfxScuCcu_K3divider_68 : IfxScuCcu.h
  • IfxScuCcu_K3divider_69 : IfxScuCcu.h
  • IfxScuCcu_K3divider_7 : IfxScuCcu.h
  • IfxScuCcu_K3divider_70 : IfxScuCcu.h
  • IfxScuCcu_K3divider_71 : IfxScuCcu.h
  • IfxScuCcu_K3divider_72 : IfxScuCcu.h
  • IfxScuCcu_K3divider_73 : IfxScuCcu.h
  • IfxScuCcu_K3divider_74 : IfxScuCcu.h
  • IfxScuCcu_K3divider_75 : IfxScuCcu.h
  • IfxScuCcu_K3divider_76 : IfxScuCcu.h
  • IfxScuCcu_K3divider_77 : IfxScuCcu.h
  • IfxScuCcu_K3divider_78 : IfxScuCcu.h
  • IfxScuCcu_K3divider_79 : IfxScuCcu.h
  • IfxScuCcu_K3divider_8 : IfxScuCcu.h
  • IfxScuCcu_K3divider_80 : IfxScuCcu.h
  • IfxScuCcu_K3divider_81 : IfxScuCcu.h
  • IfxScuCcu_K3divider_82 : IfxScuCcu.h
  • IfxScuCcu_K3divider_83 : IfxScuCcu.h
  • IfxScuCcu_K3divider_84 : IfxScuCcu.h
  • IfxScuCcu_K3divider_85 : IfxScuCcu.h
  • IfxScuCcu_K3divider_86 : IfxScuCcu.h
  • IfxScuCcu_K3divider_87 : IfxScuCcu.h
  • IfxScuCcu_K3divider_88 : IfxScuCcu.h
  • IfxScuCcu_K3divider_89 : IfxScuCcu.h
  • IfxScuCcu_K3divider_9 : IfxScuCcu.h
  • IfxScuCcu_K3divider_90 : IfxScuCcu.h
  • IfxScuCcu_K3divider_91 : IfxScuCcu.h
  • IfxScuCcu_K3divider_92 : IfxScuCcu.h
  • IfxScuCcu_K3divider_93 : IfxScuCcu.h
  • IfxScuCcu_K3divider_94 : IfxScuCcu.h
  • IfxScuCcu_K3divider_95 : IfxScuCcu.h
  • IfxScuCcu_K3divider_96 : IfxScuCcu.h
  • IfxScuCcu_K3divider_97 : IfxScuCcu.h
  • IfxScuCcu_K3divider_98 : IfxScuCcu.h
  • IfxScuCcu_K3divider_99 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_1 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_10 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_100 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_101 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_102 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_103 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_104 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_105 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_106 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_107 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_108 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_109 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_11 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_110 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_111 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_112 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_113 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_114 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_115 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_116 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_117 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_118 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_119 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_12 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_120 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_121 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_122 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_123 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_124 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_125 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_126 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_127 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_128 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_13 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_14 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_15 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_16 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_17 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_18 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_19 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_2 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_20 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_21 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_22 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_23 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_24 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_25 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_26 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_27 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_28 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_29 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_3 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_30 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_31 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_32 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_33 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_34 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_35 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_36 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_37 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_38 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_39 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_4 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_40 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_41 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_42 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_43 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_44 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_45 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_46 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_47 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_48 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_49 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_5 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_50 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_51 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_52 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_53 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_54 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_55 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_56 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_57 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_58 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_59 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_6 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_60 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_61 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_62 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_63 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_64 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_65 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_66 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_67 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_68 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_69 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_7 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_70 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_71 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_72 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_73 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_74 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_75 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_76 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_77 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_78 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_79 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_8 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_80 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_81 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_82 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_83 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_84 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_85 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_86 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_87 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_88 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_89 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_9 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_90 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_91 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_92 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_93 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_94 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_95 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_96 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_97 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_98 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_99 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_1 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_10 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_11 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_12 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_13 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_14 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_15 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_16 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_2 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_3 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_4 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_5 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_6 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_7 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_8 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_9 : IfxScuCcu.h
  • IfxScuEru_ExternalInputSelection_0 : IfxScuEru.h
  • IfxScuEru_ExternalInputSelection_1 : IfxScuEru.h
  • IfxScuEru_ExternalInputSelection_2 : IfxScuEru.h
  • IfxScuEru_ExternalInputSelection_3 : IfxScuEru.h
  • IfxScuEru_InputChannel_0 : IfxScuEru.h
  • IfxScuEru_InputChannel_1 : IfxScuEru.h
  • IfxScuEru_InputChannel_2 : IfxScuEru.h
  • IfxScuEru_InputChannel_3 : IfxScuEru.h
  • IfxScuEru_InputChannel_4 : IfxScuEru.h
  • IfxScuEru_InputChannel_5 : IfxScuEru.h
  • IfxScuEru_InputChannel_6 : IfxScuEru.h
  • IfxScuEru_InputChannel_7 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_0 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_1 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_2 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_3 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_4 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_5 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_6 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_7 : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern_alwaysActive : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern_none : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern_patternMatch : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern_patternMiss : IfxScuEru.h
  • IfxScuEru_OutputChannel_0 : IfxScuEru.h
  • IfxScuEru_OutputChannel_1 : IfxScuEru.h
  • IfxScuEru_OutputChannel_2 : IfxScuEru.h
  • IfxScuEru_OutputChannel_3 : IfxScuEru.h
  • IfxScuEru_OutputChannel_4 : IfxScuEru.h
  • IfxScuEru_OutputChannel_5 : IfxScuEru.h
  • IfxScuEru_OutputChannel_6 : IfxScuEru.h
  • IfxScuEru_OutputChannel_7 : IfxScuEru.h
  • IfxSent_AlternateInput_0 : IfxSent.h
  • IfxSent_AlternateInput_1 : IfxSent.h
  • IfxSent_AlternateInput_2 : IfxSent.h
  • IfxSent_AlternateInput_3 : IfxSent.h
  • IfxSent_ChannelId_0 : IfxSent_cfg.h
  • IfxSent_ChannelId_1 : IfxSent_cfg.h
  • IfxSent_ChannelId_2 : IfxSent_cfg.h
  • IfxSent_ChannelId_3 : IfxSent_cfg.h
  • IfxSent_ChannelId_4 : IfxSent_cfg.h
  • IfxSent_ChannelId_5 : IfxSent_cfg.h
  • IfxSent_ChannelId_none : IfxSent_cfg.h
  • IfxSent_ChannelStatus_initialize : IfxSent.h
  • IfxSent_ChannelStatus_running : IfxSent.h
  • IfxSent_ChannelStatus_stop : IfxSent.h
  • IfxSent_ChannelStatus_synchronize : IfxSent.h
  • IfxSent_ClockDividerMode_fractional : IfxSent.h
  • IfxSent_ClockDividerMode_normal : IfxSent.h
  • IfxSent_ClockDividerMode_off : IfxSent.h
  • IfxSent_ConfigBit_0 : IfxSent.h
  • IfxSent_ConfigBit_1 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_1 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_10 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_11 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_12 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_13 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_14 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_15 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_2 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_3 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_4 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_5 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_6 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_7 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_8 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_9 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_off : IfxSent.h
  • IfxSent_ExtendedSerialFrameMode_extended : IfxSent.h
  • IfxSent_ExtendedSerialFrameMode_standard : IfxSent.h
  • IfxSent_ExternalTrigger_0 : IfxSent.h
  • IfxSent_ExternalTrigger_1 : IfxSent.h
  • IfxSent_ExternalTrigger_2 : IfxSent.h
  • IfxSent_ExternalTrigger_3 : IfxSent.h
  • IfxSent_ExternalTrigger_4 : IfxSent.h
  • IfxSent_ExternalTrigger_5 : IfxSent.h
  • IfxSent_ExternalTrigger_6 : IfxSent.h
  • IfxSent_ExternalTrigger_7 : IfxSent.h
  • IfxSent_ExternalTrigger_8 : IfxSent.h
  • IfxSent_ExternalTrigger_9 : IfxSent.h
  • IfxSent_FrameCheckMode_futureSuncPulse : IfxSent.h
  • IfxSent_FrameCheckMode_pastSyncPulse : IfxSent.h
  • IfxSent_InterruptNodePointer_0 : IfxSent.h
  • IfxSent_InterruptNodePointer_1 : IfxSent.h
  • IfxSent_InterruptNodePointer_2 : IfxSent.h
  • IfxSent_InterruptNodePointer_3 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo0 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo1 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo2 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo3 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo4 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo5 : IfxSent.h
  • IfxSent_InterruptSource_crci : IfxSent.h
  • IfxSent_InterruptSource_fdi : IfxSent.h
  • IfxSent_InterruptSource_fri : IfxSent.h
  • IfxSent_InterruptSource_nni : IfxSent.h
  • IfxSent_InterruptSource_nvi : IfxSent.h
  • IfxSent_InterruptSource_rbi : IfxSent.h
  • IfxSent_InterruptSource_rdi : IfxSent.h
  • IfxSent_InterruptSource_rsi : IfxSent.h
  • IfxSent_InterruptSource_scri : IfxSent.h
  • IfxSent_InterruptSource_sdi : IfxSent.h
  • IfxSent_InterruptSource_tbi : IfxSent.h
  • IfxSent_InterruptSource_tdi : IfxSent.h
  • IfxSent_InterruptSource_wdi : IfxSent.h
  • IfxSent_InterruptSource_wsi : IfxSent.h
  • IfxSent_Nibble_0 : IfxSent.h
  • IfxSent_Nibble_1 : IfxSent.h
  • IfxSent_Nibble_2 : IfxSent.h
  • IfxSent_Nibble_3 : IfxSent.h
  • IfxSent_Nibble_4 : IfxSent.h
  • IfxSent_Nibble_5 : IfxSent.h
  • IfxSent_Nibble_6 : IfxSent.h
  • IfxSent_Nibble_7 : IfxSent.h
  • IfxSent_SleepMode_disable : IfxSent.h
  • IfxSent_SleepMode_enable : IfxSent.h
  • IfxSent_SpcMode_bidirectional : IfxSent.h
  • IfxSent_SpcMode_range : IfxSent.h
  • IfxSent_SpcMode_sync : IfxSent.h
  • IfxSent_SuspendMode_hard : IfxSent.h
  • IfxSent_SuspendMode_none : IfxSent.h
  • IfxSent_SuspendMode_soft : IfxSent.h
  • IfxSent_TimeBase_measuredFrequency : IfxSent.h
  • IfxSent_TimeBase_nominalFrequency : IfxSent.h
  • IfxSent_TriggerSource_externalTrigger : IfxSent.h
  • IfxSent_TriggerSource_fallingEdge : IfxSent.h
  • IfxSent_TriggerSource_immediate : IfxSent.h
  • IfxSent_TriggerSource_off : IfxSent.h
  • IfxSmu_Alarm_CanSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_CanSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CanSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CanSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0BusLevelMpuViolationAccessProtection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0CpuDataSriInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0LockstepComparatorError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0PcacheTagAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0PcacheTagAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0PcacheTagUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedDcacheDsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedDcacheDsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedPcachePsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedPcachePsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1BusLevelMpuViolationAccessProtection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1CpuDataSriInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1CpuInstructionFetchSRIInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1DcacheTagSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1DcacheTagSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1DcacheTagSramCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1DcacheTagSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1LockstepComparatorError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1PcacheTagAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1PcacheTagAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1PcacheTagUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedDcacheDsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedDcacheDsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedPcachePsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedPcachePsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2BusLevelMpuViolationAccessProtection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2CpuDataSriInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2CpuInstructionFetchSRIInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2DcacheTagSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2DcacheTagSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2DcacheTagSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2DcacheTagSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2PcacheTagAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2PcacheTagAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2PcacheTagUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedDcacheDsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedDcacheDsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedPcachePsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedPcachePsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_EmemSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_EmemSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_EmemSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_FlexraySramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_FlexraySramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_FlexraySramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_FlexraySramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_GtmSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_GtmSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_GtmSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_GtmSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_IomPinMismatchIndication : IfxSmu_cfg.h
  • IfxSmu_Alarm_IrEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuEccError : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuRegisterAccessProtectionErrorBusLevelMpuError : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_noAlarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuAddressBufferFull : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuAddressingError : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuDoubleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuEdcComparatorError : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuNonCorrectableMultipleBit : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuPflashEccError : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguAdcClockOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguGtmClockOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguInputClockOutOfRange : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguPll_ErayOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguPll_ErayVcoLossOfLockEvent : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguSpbClockOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguSriClockOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguStmClockOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguSystemPLLOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguSystemPllVcoLossOfLockEvent : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuDtsTemperatureOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuDtsTemperatureUnderflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEvrEvr1Dot3VOverVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEvrEvr1Dot3VUnderVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEvrEvr3Dot3VOverVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEvrEvr3Dot3VUnderVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEVRExternalSupplyOverVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEvrExternalSupplyUnderVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuExternalEmergencyStopSignal : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuWdtCpu0WatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuWdtCpu1WatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuWdtCpu2WatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuWdtsWatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuWdtWatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_SmuErrorPinFaultStateActivation : IfxSmu_cfg.h
  • IfxSmu_Alarm_SmuTimer0TimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_SmuTimer1TimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm0 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm1 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm10 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm11 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm12 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm13 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm14 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm15 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm2 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm3 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm4 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm5 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm6 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm7 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm8 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm9 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SpbAccessEnableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SpbBusError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SramsSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_SramsSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SramsSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_SramsSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SriBusError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SriEdcAddressPhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SriEdcReadPhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SriEdcWritePhaseError : IfxSmu_cfg.h
  • IfxSmu_AlarmConfig_cpuIdle : IfxSmu.h
  • IfxSmu_AlarmConfig_interruptSet0 : IfxSmu.h
  • IfxSmu_AlarmConfig_interruptSet1 : IfxSmu.h
  • IfxSmu_AlarmConfig_interruptSet2 : IfxSmu.h
  • IfxSmu_AlarmConfig_nmi : IfxSmu.h
  • IfxSmu_AlarmConfig_noAction : IfxSmu.h
  • IfxSmu_AlarmConfig_scuReset : IfxSmu.h
  • IfxSmu_AlarmGroup_0 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_1 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_2 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_3 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_4 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_5 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_6 : IfxSmu_cfg.h
  • IfxSmu_Cmd_activateFsp : IfxSmu.h
  • IfxSmu_Cmd_activatePes : IfxSmu.h
  • IfxSmu_Cmd_enableClearAlarmStatus : IfxSmu.h
  • IfxSmu_Cmd_releaseFsp : IfxSmu.h
  • IfxSmu_Cmd_start : IfxSmu.h
  • IfxSmu_Cmd_stopRecoveryTimer : IfxSmu.h
  • IfxSmu_Cmd_triggerAlarm : IfxSmu.h
  • IfxSmu_Fsp_Mode_bistable : IfxSmu.h
  • IfxSmu_Fsp_Mode_timeSwitching : IfxSmu.h
  • IfxSmu_RecoveryTimer_0 : IfxSmu_cfg.h
  • IfxSmu_RecoveryTimer_1 : IfxSmu_cfg.h
  • IfxSrc_Tos_cpu0 : IfxSrc_cfg.h
  • IfxSrc_Tos_cpu1 : IfxSrc_cfg.h
  • IfxSrc_Tos_dma : IfxSrc_cfg.h
  • IfxStdIf_Pos_Dir_backward : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Dir_forward : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Dir_unknown : IfxStdIf_Pos.h
  • IfxStdIf_Pos_MotionType_linear : IfxStdIf_Pos.h
  • IfxStdIf_Pos_MotionType_rotating : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResolutionFactor_fourFold : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResolutionFactor_oneFold : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResolutionFactor_twoFold : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_angletrk : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_encoder : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_hall : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_igmr : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_resolver : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_virtual : IfxStdIf_Pos.h
  • IfxStdIf_Timer_CountDir_down : IfxStdIf_Timer.h
  • IfxStdIf_Timer_CountDir_up : IfxStdIf_Timer.h
  • IfxStdIf_Timer_CountDir_upAndDown : IfxStdIf_Timer.h
  • IfxStdIf_Timer_Output_disabled : IfxStdIf_Timer.h
  • IfxStdIf_Timer_Output_enabled : IfxStdIf_Timer.h
  • IfxStm_Comparator_0 : IfxStm.h
  • IfxStm_Comparator_1 : IfxStm.h
  • IfxStm_ComparatorInterrupt_ir0 : IfxStm.h
  • IfxStm_ComparatorInterrupt_ir1 : IfxStm.h
  • IfxStm_ComparatorOffset_0 : IfxStm.h
  • IfxStm_ComparatorOffset_1 : IfxStm.h
  • IfxStm_ComparatorOffset_10 : IfxStm.h
  • IfxStm_ComparatorOffset_11 : IfxStm.h
  • IfxStm_ComparatorOffset_12 : IfxStm.h
  • IfxStm_ComparatorOffset_13 : IfxStm.h
  • IfxStm_ComparatorOffset_14 : IfxStm.h
  • IfxStm_ComparatorOffset_15 : IfxStm.h
  • IfxStm_ComparatorOffset_16 : IfxStm.h
  • IfxStm_ComparatorOffset_17 : IfxStm.h
  • IfxStm_ComparatorOffset_18 : IfxStm.h
  • IfxStm_ComparatorOffset_19 : IfxStm.h
  • IfxStm_ComparatorOffset_2 : IfxStm.h
  • IfxStm_ComparatorOffset_20 : IfxStm.h
  • IfxStm_ComparatorOffset_21 : IfxStm.h
  • IfxStm_ComparatorOffset_22 : IfxStm.h
  • IfxStm_ComparatorOffset_23 : IfxStm.h
  • IfxStm_ComparatorOffset_24 : IfxStm.h
  • IfxStm_ComparatorOffset_25 : IfxStm.h
  • IfxStm_ComparatorOffset_26 : IfxStm.h
  • IfxStm_ComparatorOffset_27 : IfxStm.h
  • IfxStm_ComparatorOffset_28 : IfxStm.h
  • IfxStm_ComparatorOffset_29 : IfxStm.h
  • IfxStm_ComparatorOffset_3 : IfxStm.h
  • IfxStm_ComparatorOffset_30 : IfxStm.h
  • IfxStm_ComparatorOffset_31 : IfxStm.h
  • IfxStm_ComparatorOffset_4 : IfxStm.h
  • IfxStm_ComparatorOffset_5 : IfxStm.h
  • IfxStm_ComparatorOffset_6 : IfxStm.h
  • IfxStm_ComparatorOffset_7 : IfxStm.h
  • IfxStm_ComparatorOffset_8 : IfxStm.h
  • IfxStm_ComparatorOffset_9 : IfxStm.h
  • IfxStm_ComparatorSize_10Bits : IfxStm.h
  • IfxStm_ComparatorSize_11Bits : IfxStm.h
  • IfxStm_ComparatorSize_12Bits : IfxStm.h
  • IfxStm_ComparatorSize_13Bits : IfxStm.h
  • IfxStm_ComparatorSize_14Bits : IfxStm.h
  • IfxStm_ComparatorSize_15Bits : IfxStm.h
  • IfxStm_ComparatorSize_16Bits : IfxStm.h
  • IfxStm_ComparatorSize_17Bits : IfxStm.h
  • IfxStm_ComparatorSize_18Bits : IfxStm.h
  • IfxStm_ComparatorSize_19Bits : IfxStm.h
  • IfxStm_ComparatorSize_1Bit : IfxStm.h
  • IfxStm_ComparatorSize_20Bits : IfxStm.h
  • IfxStm_ComparatorSize_21Bits : IfxStm.h
  • IfxStm_ComparatorSize_22Bits : IfxStm.h
  • IfxStm_ComparatorSize_23Bits : IfxStm.h
  • IfxStm_ComparatorSize_24Bits : IfxStm.h
  • IfxStm_ComparatorSize_25Bits : IfxStm.h
  • IfxStm_ComparatorSize_26Bits : IfxStm.h
  • IfxStm_ComparatorSize_27Bits : IfxStm.h
  • IfxStm_ComparatorSize_28Bits : IfxStm.h
  • IfxStm_ComparatorSize_29Bits : IfxStm.h
  • IfxStm_ComparatorSize_2Bits : IfxStm.h
  • IfxStm_ComparatorSize_30Bits : IfxStm.h
  • IfxStm_ComparatorSize_31Bits : IfxStm.h
  • IfxStm_ComparatorSize_32Bits : IfxStm.h
  • IfxStm_ComparatorSize_3Bits : IfxStm.h
  • IfxStm_ComparatorSize_4Bits : IfxStm.h
  • IfxStm_ComparatorSize_5Bits : IfxStm.h
  • IfxStm_ComparatorSize_6Bits : IfxStm.h
  • IfxStm_ComparatorSize_7Bits : IfxStm.h
  • IfxStm_ComparatorSize_8Bits : IfxStm.h
  • IfxStm_ComparatorSize_9Bits : IfxStm.h
  • IfxStm_Index_0 : IfxStm_cfg.h
  • IfxStm_Index_1 : IfxStm_cfg.h
  • IfxStm_Index_none : IfxStm_cfg.h
  • IfxStm_SleepMode_disable : IfxStm.h
  • IfxStm_SleepMode_enable : IfxStm.h
  • IfxStm_SuspendMode_hard : IfxStm.h
  • IfxStm_SuspendMode_none : IfxStm.h
  • IfxStm_SuspendMode_soft : IfxStm.h
  • IfxVadc_AnalogConverterMode_fastStandby : IfxVadc.h
  • IfxVadc_AnalogConverterMode_normalOperation : IfxVadc.h
  • IfxVadc_AnalogConverterMode_off : IfxVadc.h
  • IfxVadc_AnalogConverterMode_slowStandby : IfxVadc.h
  • IfxVadc_ArbitrationRounds_16_slots : IfxVadc.h
  • IfxVadc_ArbitrationRounds_20_slots : IfxVadc.h
  • IfxVadc_ArbitrationRounds_4_slots : IfxVadc.h
  • IfxVadc_ArbitrationRounds_8_slots : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult1 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult10 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult11 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult12 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult13 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult14 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult15 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult2 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult3 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult4 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult5 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult6 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult7 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult8 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult9 : IfxVadc.h
  • IfxVadc_BoundaryExtension_standard : IfxVadc.h
  • IfxVadc_BoundarySelection_global0 : IfxVadc.h
  • IfxVadc_BoundarySelection_global1 : IfxVadc.h
  • IfxVadc_BoundarySelection_group0 : IfxVadc.h
  • IfxVadc_BoundarySelection_group1 : IfxVadc.h
  • IfxVadc_ChannelId_0 : IfxVadc.h
  • IfxVadc_ChannelId_1 : IfxVadc.h
  • IfxVadc_ChannelId_10 : IfxVadc.h
  • IfxVadc_ChannelId_11 : IfxVadc.h
  • IfxVadc_ChannelId_12 : IfxVadc.h
  • IfxVadc_ChannelId_13 : IfxVadc.h
  • IfxVadc_ChannelId_14 : IfxVadc.h
  • IfxVadc_ChannelId_15 : IfxVadc.h
  • IfxVadc_ChannelId_2 : IfxVadc.h
  • IfxVadc_ChannelId_3 : IfxVadc.h
  • IfxVadc_ChannelId_4 : IfxVadc.h
  • IfxVadc_ChannelId_5 : IfxVadc.h
  • IfxVadc_ChannelId_6 : IfxVadc.h
  • IfxVadc_ChannelId_7 : IfxVadc.h
  • IfxVadc_ChannelId_8 : IfxVadc.h
  • IfxVadc_ChannelId_9 : IfxVadc.h
  • IfxVadc_ChannelId_none : IfxVadc.h
  • IfxVadc_ChannelReference_channel0 : IfxVadc.h
  • IfxVadc_ChannelReference_standard : IfxVadc.h
  • IfxVadc_ChannelResolution_10bit : IfxVadc.h
  • IfxVadc_ChannelResolution_10bitFast : IfxVadc.h
  • IfxVadc_ChannelResolution_12bit : IfxVadc.h
  • IfxVadc_ChannelResolution_8bit : IfxVadc.h
  • IfxVadc_ChannelResult_0 : IfxVadc.h
  • IfxVadc_ChannelResult_1 : IfxVadc.h
  • IfxVadc_ChannelResult_10 : IfxVadc.h
  • IfxVadc_ChannelResult_11 : IfxVadc.h
  • IfxVadc_ChannelResult_12 : IfxVadc.h
  • IfxVadc_ChannelResult_13 : IfxVadc.h
  • IfxVadc_ChannelResult_14 : IfxVadc.h
  • IfxVadc_ChannelResult_15 : IfxVadc.h
  • IfxVadc_ChannelResult_2 : IfxVadc.h
  • IfxVadc_ChannelResult_3 : IfxVadc.h
  • IfxVadc_ChannelResult_4 : IfxVadc.h
  • IfxVadc_ChannelResult_5 : IfxVadc.h
  • IfxVadc_ChannelResult_6 : IfxVadc.h
  • IfxVadc_ChannelResult_7 : IfxVadc.h
  • IfxVadc_ChannelResult_8 : IfxVadc.h
  • IfxVadc_ChannelResult_9 : IfxVadc.h
  • IfxVadc_ChannelSelectionStyle_binary : IfxVadc.h
  • IfxVadc_ChannelSelectionStyle_channelNumber : IfxVadc.h
  • IfxVadc_ConversionType_Compatible : IfxVadc.h
  • IfxVadc_EmuxCodingScheme_binary : IfxVadc.h
  • IfxVadc_EmuxCodingScheme_gray : IfxVadc.h
  • IfxVadc_EmuxInterface_0 : IfxVadc.h
  • IfxVadc_EmuxInterface_1 : IfxVadc.h
  • IfxVadc_EmuxSampleTimeControl_always : IfxVadc.h
  • IfxVadc_EmuxSampleTimeControl_settingChanges : IfxVadc.h
  • IfxVadc_EmuxSelectValue_0 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_1 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_2 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_3 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_4 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_5 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_6 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_7 : IfxVadc.h
  • IfxVadc_ExternalMultiplexerMode_sequence : IfxVadc.h
  • IfxVadc_ExternalMultiplexerMode_singleStep : IfxVadc.h
  • IfxVadc_ExternalMultiplexerMode_softwareControl : IfxVadc.h
  • IfxVadc_ExternalMultiplexerMode_steady : IfxVadc.h
  • IfxVadc_FifoMode_fifoStructure : IfxVadc.h
  • IfxVadc_FifoMode_maximumMode : IfxVadc.h
  • IfxVadc_FifoMode_minimumMode : IfxVadc.h
  • IfxVadc_FifoMode_seperateResultRegister : IfxVadc.h
  • IfxVadc_GatingMode_always : IfxVadc.h
  • IfxVadc_GatingMode_disabled : IfxVadc.h
  • IfxVadc_GatingMode_gatingHigh : IfxVadc.h
  • IfxVadc_GatingMode_gatingLow : IfxVadc.h
  • IfxVadc_GatingSource_0 : IfxVadc.h
  • IfxVadc_GatingSource_1 : IfxVadc.h
  • IfxVadc_GatingSource_10 : IfxVadc.h
  • IfxVadc_GatingSource_11 : IfxVadc.h
  • IfxVadc_GatingSource_12 : IfxVadc.h
  • IfxVadc_GatingSource_13 : IfxVadc.h
  • IfxVadc_GatingSource_14 : IfxVadc.h
  • IfxVadc_GatingSource_15 : IfxVadc.h
  • IfxVadc_GatingSource_2 : IfxVadc.h
  • IfxVadc_GatingSource_3 : IfxVadc.h
  • IfxVadc_GatingSource_4 : IfxVadc.h
  • IfxVadc_GatingSource_5 : IfxVadc.h
  • IfxVadc_GatingSource_6 : IfxVadc.h
  • IfxVadc_GatingSource_7 : IfxVadc.h
  • IfxVadc_GatingSource_8 : IfxVadc.h
  • IfxVadc_GatingSource_9 : IfxVadc.h
  • IfxVadc_GroupId_0 : IfxVadc_cfg.h
  • IfxVadc_GroupId_1 : IfxVadc_cfg.h
  • IfxVadc_GroupId_2 : IfxVadc_cfg.h
  • IfxVadc_GroupId_3 : IfxVadc_cfg.h
  • IfxVadc_GroupId_global0 : IfxVadc_cfg.h
  • IfxVadc_GroupId_global1 : IfxVadc_cfg.h
  • IfxVadc_InputClasses_global0 : IfxVadc.h
  • IfxVadc_InputClasses_global1 : IfxVadc.h
  • IfxVadc_InputClasses_group0 : IfxVadc.h
  • IfxVadc_InputClasses_group1 : IfxVadc.h
  • IfxVadc_LimitCheck_always : IfxVadc.h
  • IfxVadc_LimitCheck_eventIfInArea : IfxVadc.h
  • IfxVadc_LimitCheck_eventIfOutsideArea : IfxVadc.h
  • IfxVadc_LimitCheck_noCheck : IfxVadc.h
  • IfxVadc_LowSupplyVoltageSelect_3V : IfxVadc.h
  • IfxVadc_LowSupplyVoltageSelect_5V : IfxVadc.h
  • IfxVadc_Protection_channelControl0 : IfxVadc.h
  • IfxVadc_Protection_channelControl1 : IfxVadc.h
  • IfxVadc_Protection_channelControl10 : IfxVadc.h
  • IfxVadc_Protection_channelControl11 : IfxVadc.h
  • IfxVadc_Protection_channelControl12 : IfxVadc.h
  • IfxVadc_Protection_channelControl13 : IfxVadc.h
  • IfxVadc_Protection_channelControl14 : IfxVadc.h
  • IfxVadc_Protection_channelControl2 : IfxVadc.h
  • IfxVadc_Protection_channelControl3 : IfxVadc.h
  • IfxVadc_Protection_channelControl4 : IfxVadc.h
  • IfxVadc_Protection_channelControl5 : IfxVadc.h
  • IfxVadc_Protection_channelControl6 : IfxVadc.h
  • IfxVadc_Protection_channelControl7 : IfxVadc.h
  • IfxVadc_Protection_channelControl8 : IfxVadc.h
  • IfxVadc_Protection_channelControl9 : IfxVadc.h
  • IfxVadc_Protection_externalMultiplexer : IfxVadc.h
  • IfxVadc_Protection_globalConfig : IfxVadc.h
  • IfxVadc_Protection_initGroup0 : IfxVadc.h
  • IfxVadc_Protection_initGroup1 : IfxVadc.h
  • IfxVadc_Protection_initGroup10 : IfxVadc.h
  • IfxVadc_Protection_initGroup11 : IfxVadc.h
  • IfxVadc_Protection_initGroup12 : IfxVadc.h
  • IfxVadc_Protection_initGroup13 : IfxVadc.h
  • IfxVadc_Protection_initGroup14 : IfxVadc.h
  • IfxVadc_Protection_initGroup2 : IfxVadc.h
  • IfxVadc_Protection_initGroup3 : IfxVadc.h
  • IfxVadc_Protection_initGroup4 : IfxVadc.h
  • IfxVadc_Protection_initGroup5 : IfxVadc.h
  • IfxVadc_Protection_initGroup6 : IfxVadc.h
  • IfxVadc_Protection_initGroup7 : IfxVadc.h
  • IfxVadc_Protection_initGroup8 : IfxVadc.h
  • IfxVadc_Protection_initGroup9 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup0 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup1 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup10 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup11 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup12 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup13 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup14 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup2 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup3 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup4 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup5 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup6 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup7 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup8 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup9 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup0 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup1 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup10 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup11 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup12 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup13 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup14 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup2 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup3 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup4 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup5 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup6 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup7 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup8 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup9 : IfxVadc.h
  • IfxVadc_Protection_testFunction : IfxVadc.h
  • IfxVadc_RequestSlotPriority_high : IfxVadc.h
  • IfxVadc_RequestSlotPriority_highest : IfxVadc.h
  • IfxVadc_RequestSlotPriority_low : IfxVadc.h
  • IfxVadc_RequestSlotPriority_lowest : IfxVadc.h
  • IfxVadc_RequestSlotStartMode_cancelInjectRepeat : IfxVadc.h
  • IfxVadc_RequestSlotStartMode_waitForStart : IfxVadc.h
  • IfxVadc_RequestSource_background : IfxVadc.h
  • IfxVadc_RequestSource_queue : IfxVadc.h
  • IfxVadc_RequestSource_scan : IfxVadc.h
  • IfxVadc_SleepMode_disable : IfxVadc.h
  • IfxVadc_SleepMode_enable : IfxVadc.h
  • IfxVadc_SrcNr_group0 : IfxVadc.h
  • IfxVadc_SrcNr_group1 : IfxVadc.h
  • IfxVadc_SrcNr_group2 : IfxVadc.h
  • IfxVadc_SrcNr_group3 : IfxVadc.h
  • IfxVadc_SrcNr_shared0 : IfxVadc.h
  • IfxVadc_SrcNr_shared1 : IfxVadc.h
  • IfxVadc_SrcNr_shared2 : IfxVadc.h
  • IfxVadc_SrcNr_shared3 : IfxVadc.h
  • IfxVadc_Status_channelsStillPending : IfxVadc.h
  • IfxVadc_Status_invalidChannel : IfxVadc.h
  • IfxVadc_Status_invalidGroup : IfxVadc.h
  • IfxVadc_Status_noAccess : IfxVadc.h
  • IfxVadc_Status_noError : IfxVadc.h
  • IfxVadc_Status_notInitialised : IfxVadc.h
  • IfxVadc_Status_queueFull : IfxVadc.h
  • IfxVadc_TriggerMode_noExternalTrigger : IfxVadc.h
  • IfxVadc_TriggerMode_uponAnyEdge : IfxVadc.h
  • IfxVadc_TriggerMode_uponFallingEdge : IfxVadc.h
  • IfxVadc_TriggerMode_uponRisingEdge : IfxVadc.h
  • IfxVadc_TriggerSource_0 : IfxVadc.h
  • IfxVadc_TriggerSource_1 : IfxVadc.h
  • IfxVadc_TriggerSource_10 : IfxVadc.h
  • IfxVadc_TriggerSource_11 : IfxVadc.h
  • IfxVadc_TriggerSource_12 : IfxVadc.h
  • IfxVadc_TriggerSource_13 : IfxVadc.h
  • IfxVadc_TriggerSource_14 : IfxVadc.h
  • IfxVadc_TriggerSource_15 : IfxVadc.h
  • IfxVadc_TriggerSource_2 : IfxVadc.h
  • IfxVadc_TriggerSource_3 : IfxVadc.h
  • IfxVadc_TriggerSource_4 : IfxVadc.h
  • IfxVadc_TriggerSource_5 : IfxVadc.h
  • IfxVadc_TriggerSource_6 : IfxVadc.h
  • IfxVadc_TriggerSource_7 : IfxVadc.h
  • IfxVadc_TriggerSource_8 : IfxVadc.h
  • IfxVadc_TriggerSource_9 : IfxVadc.h


iLLD_TC26B: Globals

- s -

  • SpiIf_ClockPolarity_idleHigh : SpiIf.h
  • SpiIf_ClockPolarity_idleLow : SpiIf.h
  • SpiIf_DataHeading_lsbFirst : SpiIf.h
  • SpiIf_DataHeading_msbFirst : SpiIf.h
  • SpiIf_Mode_master : SpiIf.h
  • SpiIf_Mode_slave : SpiIf.h
  • SpiIf_Mode_undefined : SpiIf.h
  • SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge : SpiIf.h
  • SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge : SpiIf.h
  • SpiIf_SlsoTiming_0 : SpiIf.h
  • SpiIf_SlsoTiming_1 : SpiIf.h
  • SpiIf_SlsoTiming_2 : SpiIf.h
  • SpiIf_SlsoTiming_3 : SpiIf.h
  • SpiIf_SlsoTiming_4 : SpiIf.h
  • SpiIf_SlsoTiming_5 : SpiIf.h
  • SpiIf_SlsoTiming_6 : SpiIf.h
  • SpiIf_SlsoTiming_7 : SpiIf.h
  • SpiIf_Status_busy : SpiIf.h
  • SpiIf_Status_ok : SpiIf.h
  • SpiIf_Status_unknown : SpiIf.h


iLLD_TC26B: Globals

- _ -

  • ___setareg : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsTasking.h
  • __abs : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __abs_stdreal : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking2G.h
  • __absb : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __absdif : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __absf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __absh : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h
  • __abss : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __abssh : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __adds : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __addsu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __asm__ : Ifx_TypesTasking.h
  • __bisr : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __cacheai : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __cacheawi : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __cacheawi_bo_post_inc : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h
  • __cacheiwi : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __checkrange : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __checkrangef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __checkrangeX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __clo : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __cls : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __clssf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __clz : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __cmpAndSwap : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __crc32 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __CSA : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __CSA_END : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __debug : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __disable : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __disable_and_save : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __dsync : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __enable : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extr : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extracthw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extracthw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractubyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extractuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __extru : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __fabs : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __fabsf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __fixpoint_to_float32 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __float_to_fract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __float_to_sfract : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __fract_to_float : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __fract_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __geqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __getA11 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __getbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getDataParamRet : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __getfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __gethw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __gethw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getubyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __getuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __imaskldmst : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __initpackb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __initpackbl : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __initpackhw : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __initpackhwl : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __initupackb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __initupackhw : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __ins : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insert : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __inserthw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __inserthw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertubyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insertuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __insn : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __interrupt : Ifx_TypesGhs.h , Ifx_TypesGnuc.h
  • __INTTAB : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __INTTAB_CPU : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __ISTACK : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __isync : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __jump_and_link : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • __jumpBackToLink : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __jumpToFunction : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __jumpToFunctionWithLink : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc2G.h
  • __ldmst : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc2G.h
  • __ldmstAsm : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __ldmstC : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __leqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc2G.h
  • __mac_r_sf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __mac_sf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __max : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __max_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __maxf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __maxs : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __maxu : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __maxX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __mem_barrier : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __mfcr : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __min : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __min_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __minb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __minbu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __minf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsTasking2G.h
  • __minh : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __minhu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __mins : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __minu : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __minX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __moveToAddrParam0 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __moveToDataParam0 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __moveToDataParamRet : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __mtcr : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __mtcr_no_isync : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __mulfractfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • __mulfractlong : IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc2G.h
  • __mulsc : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs2G.h
  • __neqf : IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking2G.h
  • __non_return_call : IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h
  • __nop : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __nops : IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc2G.h
  • __nops1000 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • __parity : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc2G.h
  • __popcnt : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsTasking2G.h
  • __putbit : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc2G.h
  • __restore : IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc2G.h
  • __rol : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __ror : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc2G.h
  • __round16 : IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h
  • __roundf : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsTasking2G.h
  • __rslcx : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __s16_to_sfract : IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __satb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h
  • __satbu : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __sath : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __sathu : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h
  • __saturate : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc2G.h
  • __saturate_stdreal : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __saturatef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc2G.h
  • __saturateu : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc2G.h
  • __saturateX : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsTasking2G.h
  • __SDATA1 : CompilerDcc.h , CompilerGnuc.h , CompilerGhs.h , CompilerTasking.h
  • __SDATA2 : CompilerTasking.h , CompilerGnuc.h , CompilerGhs.h , CompilerDcc.h
  • __SDATA3 : CompilerTasking.h , CompilerGnuc.h , CompilerDcc.h , CompilerGhs.h
  • __SDATA4 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __setareg : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc2G.h
  • __setbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h
  • __setbyte2 : IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h
  • __setbyte3 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h
  • __setbyte4 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs2G.h
  • __sethw1 : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __sethw2 : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __setStackPointer : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h
  • __setubyte1 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __setubyte2 : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h
  • __setubyte3 : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs2G.h
  • __setubyte4 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __setuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __setuhw2 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • __sfract_to_s16 : IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __sfract_to_u16 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h
  • __shaaccum : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc2G.h
  • __shafracts : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc2G.h
  • __shasfracts : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h
  • __sqrf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs2G.h
  • __sqrtf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h
  • __stopPerfCounters : IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h
  • __subs : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc2G.h
  • __subsu : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __svlcx : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h
  • __swap : IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __syscall : IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h
  • __TRAPTAB : CompilerDcc.h , CompilerTasking.h , CompilerGhs.h , CompilerGnuc.h
  • __TRAPTAB_CPU : CompilerTasking.h , CompilerDcc.h , CompilerGnuc.h , CompilerGhs.h
  • __tric_syscall : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • __u16_to_sfract : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs2G.h
  • __USTACK : CompilerGnuc.h , CompilerGhs.h , CompilerTasking.h , CompilerDcc.h
  • _DATAF : Ifx_Cf32.h


iLLD_TC26B: Globals

- a -

  • ABCQMAX : IfxQspi.c
  • ABCQMIN : IfxQspi.c
  • ATO_K : Ifx_AngleTrkF32.c
  • ATO_PSI : Ifx_AngleTrkF32.c
  • ATO_T : Ifx_AngleTrkF32.c


iLLD_TC26B: Globals

- b -

  • BSP_DEFAULT_TIMER : Bsp.h


iLLD_TC26B: Globals

- c -

  • CFG_LONG_SIZE_T : Compilers.h
  • COMPILER_NAME : CompilerDcc.h , CompilerGnuc.h , CompilerTasking.h , CompilerGhs.h
  • COMPILER_REVISION : CompilerGnuc.h , CompilerTasking.h , CompilerDcc.h , CompilerGhs.h
  • COMPILER_VERSION : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • CONSOLE : Ifx_Console.h
  • CONST_CFG : Compilers.h
  • Cplx_f32_printf : Ifx_Cf32.h
  • CPU_BIT_ORDER : Platform_Types.h
  • CPU_BYTE_ORDER : Platform_Types.h
  • CPU_TYPE : Platform_Types.h
  • CPU_TYPE_16 : Platform_Types.h
  • CPU_TYPE_32 : Platform_Types.h
  • CPU_TYPE_8 : Platform_Types.h
  • CRC_ENABLE_DPIPE : Ifx_Crc.h


iLLD_TC26B: Globals

- e -

  • ENDL : IfxStdIf_DPipe.h


iLLD_TC26B: Globals

- f -

  • FALSE : Platform_Types.h
  • fract : Ifx_TypesTasking.h
  • FRACT_MAX : Ifx_TypesGhs.h , Ifx_TypesDcc.h , Ifx_TypesGnuc.h


iLLD_TC26B: Globals

- h -

  • HIGH_BYTE_FIRST : Platform_Types.h


iLLD_TC26B: Globals

- i -

  • Ifx___setareg : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__abs : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc2G.h
  • Ifx__abs_stdreal : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__absdif : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • Ifx__absf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__abss : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__adds : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__addsu : IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__bisr : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__cacheawi : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__checkrange : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__checkrangef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__checkrangeX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__clo : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__cls : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • Ifx__clz : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • Ifx__cmpAndSwap : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__debug : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__disable : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • Ifx__disable_and_save : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__dsync : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__enable : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • Ifx__extr : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__extru : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__fract_to_float : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__fract_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__geqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__getbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • Ifx__imaskldmst : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__ins : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__insert : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__insn : IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsDcc.h
  • Ifx__isync : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__ldmst : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__leqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__max : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__max_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__maxf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__maxs : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__maxu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__maxX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__mem_barrier : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__mfcr : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__min : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__min_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__minf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__mins : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__minu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__minX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__mtcr : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__mtcr_no_isync : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__mulfractfract : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__mulfractlong : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__neqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__non_return_call : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__nop : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__NOP : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__putbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • Ifx__restore : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__roundf : IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h
  • Ifx__rslcx : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__saturate : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__saturate_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__saturatef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__saturateu : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__saturateX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__setareg : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__sqrf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__sqrtf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__subs : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__subsu : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsTasking2G.h
  • Ifx__svlcx : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • Ifx__syscall : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h
  • IFX_ALIGN : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_ALIGN_128 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_16 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_256 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_32 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_64 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_8 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn128 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn16 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn256 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn32 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn64 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn8 : IfxCpu_Intrinsics.h
  • IFX_ANGLETRKF32_ATAN2F : Ifx_AngleTrkF32.c
  • IFX_ASSERT : Ifx_Assert.h , Assert.h
  • IFX_ASSERT_FEATURE_NOT_AVAILABLE : Ifx_Assert.h
  • IFX_ASSERT_FEATURE_NOT_IMPLEMENTED : Ifx_Assert.h
  • Ifx_Assert_setStandardIo : Assert.h
  • IFX_CFG_ANGLETRKF32_FILTERED_SPEED : Ifx_AngleTrkF32.h
  • IFX_CFG_ANGLETRKF32_SPEED_FILTER : Ifx_AngleTrkF32.h
  • IFX_CFG_ASSERT_STDIO : Assert.h
  • IFX_CFG_ASSERT_USE_BREAKPOINT : Assert.h
  • IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT : Assert.h
  • IFX_CFG_CIRCULARBUFFER_C : Ifx_CircularBuffer.h
  • IFX_CFG_CONSOLE_INDENT_SIZE : Ifx_Console.h
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 : IfxCpu_CStart0.c
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE : IfxCpu_CStart0.c
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE : IfxCpu_CStart0.c
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 : IfxCpu_CStart0.c
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE : IfxCpu_CStart1.c
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE : IfxCpu_CStart1.c
  • IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK : IfxCpu_CStart.h
  • IFX_CFG_CPU_TRAP_ASSERT_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_BE_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_CME_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_DEBUG : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_IE_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_IPE_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_MME_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_NMI_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_TSR_HOOK : IfxCpu_Trap.c
  • IFX_CFG_GLOBAL_RESOURCES_ENABLED : Ifx_GlobalResources.h
  • IFX_CFG_SCU_PLL_FREQUENCY : IfxScu_cfg.h
  • IFX_CFG_SCU_XTAL_FREQUENCY : IfxScu_cfg.h
  • IFX_CFG_SHELL_CMD_HISTORY_SIZE : Ifx_Shell.h
  • IFX_CFG_SHELL_CMD_LINE_SIZE : Ifx_Shell.h
  • IFX_CFG_SHELL_COMMAND_LISTS : Ifx_Shell.h
  • IFX_CFG_SHELL_PROMPT : Ifx_Shell.h
  • IFX_CONST : Compilers.h
  • Ifx_COUNTOF : IfxCpu_Intrinsics.h
  • IFX_EXTERN : Compilers.h
  • IFX_F32_LUTL_SINCOS_ELEMENT_COUNT : Ifx_LutLSincosF32.c
  • IFX_FAR_ABS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_FFTF32_MAX_LENGTH : Ifx_FftF32.h
  • IFX_FFTF32_MAX_RESOLUTION : Ifx_FftF32.h
  • IFX_INLINE : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_INTERRUPT : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , Compilers.h , CompilerTasking.h
  • IFX_INTERRUPT_FAST : CompilerDcc.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_INTERRUPT_INTERNAL : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_INTERRUPT_LEGACY : CompilerDcc.h
  • IFX_LLD_VERSION_GENERATION : IfxLldVersion.h
  • IFX_LLD_VERSION_MAJOR : IfxLldVersion.h
  • IFX_LLD_VERSION_MAJOR_UPDATE : IfxLldVersion.h
  • IFX_LLD_VERSION_MINOR : IfxLldVersion.h
  • IFX_LLD_VERSION_REVISION : IfxLldVersion.h
  • IFX_LUT_ANGLE_BITS : Ifx_Lut.h
  • IFX_LUT_ANGLE_PI : Ifx_Lut.h
  • IFX_LUT_ANGLE_RESOLUTION : Ifx_Lut.h
  • IFX_LUT_F32_TO_FXPANGLE : Ifx_Lut.h
  • IFX_LUT_FXPANGLE_TO_F32 : Ifx_Lut.h
  • IFX_LUT_TABLE : Ifx_Lut.h
  • IFX_LUT_TABLE_CONST : Ifx_Lut.h
  • IFX_LUTATAN2F32_SIZE : Ifx_LutAtan2F32.h
  • IFX_NEAR_ABS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_ONE_OVER_SQRT_THREE : Ifx_Types.h
  • IFX_ONES : Ifx_Types.h
  • IFX_PACKED : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_PI : Ifx_Types.h
  • IFX_REL_A0 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_REL_A1 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_REL_A8 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_REL_A9 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_SHELL_CMD_HISTORY_NO_ITEM : Ifx_Shell.h
  • IFX_SHELL_COMMAND_LIST_END : Ifx_Shell.h
  • IFX_SHELL_IF_ECHO : Ifx_Shell.c
  • IFX_SHELL_LLD : Ifx_Shell.c
  • IFX_SHELL_LLU : Ifx_Shell.c
  • IFX_SHELL_LLX : Ifx_Shell.c
  • IFX_SHELL_MAX_MESSAGE_SIZE : Ifx_Shell.c
  • IFX_SHELL_NULL_CHAR : Ifx_Shell.h
  • IFX_SHELL_SYNTAX_LIST_END : Ifx_Shell.h
  • IFX_SHELL_WRITE_BACKSPACES : Ifx_Shell.c
  • IFX_SHELL_WRITE_SPACES : Ifx_Shell.c
  • IFX_SIZET_MAX : Ifx_Types.h
  • IFX_SQRT_THREE : Ifx_Types.h
  • IFX_SQRT_TWO : Ifx_Types.h
  • IFX_STATIC : Compilers.h
  • IFX_TWO_OVER_PI : Ifx_Types.h
  • IFX_UNUSED_PARAMETER : Ifx_Types.h
  • IFX_VALIDATE : Ifx_Assert.h , Assert.h
  • IFX_VERBOSE_LEVEL_DEBUG : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_ERROR : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_FAILURE : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_INFO : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_OFF : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_WARNING : Ifx_Assert.h
  • IFX_WNDF32_TABLE_LENGTH : Ifx_WndF32.h
  • IFX_ZEROS : Ifx_Types.h
  • IFXASCLIN_LIN_RECEIVE_RESPONSE : IfxAsclin_Lin.h
  • IFXASCLIN_LIN_SEND_RESPONSE : IfxAsclin_Lin.h
  • IFXASCLIN_NUM_MODULES : IfxAsclin_cfg.h
  • IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_NUM_MODULES : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXCCU6_EMPTY_OUTPUT_SLOT : IfxCcu6_cfg.c
  • IFXCCU6_NUM_MODULES : IfxCcu6_cfg.h
  • IFXCCU6_NUM_SERVICE_REQUESTS : IfxCcu6_cfg.h
  • IFXCCU6_NUM_T12_CHANNELS : IfxCcu6_cfg.h
  • IFXCCU6_NUM_T13_CHANNELS : IfxCcu6_cfg.h
  • IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_NUM_MODULES : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PWMHL_MAX_CHANNELS : IfxCcu6_PwmHl.h
  • IFXCIF_CAM_ALIGN : IfxCif_Cam.c
  • IFXCIF_CAM_MEM_ALIGN : IfxCif_Cam.c
  • IFXCIF_CAM_MEM_ALIGN_SIZE : IfxCif_Cam.h
  • IFXCIF_CAM_MEM_GAPSIZE : IfxCif_Cam.h
  • IFXCIF_DEBUG : IfxCif_cfg.h
  • IFXCIF_EXTRA_PATHS : IfxCif_cfg.h
  • IFXCIF_MAX_I2CNAK : IfxCif_cfg.h
  • IFXCIF_NUM_MODULES : IfxCif_cfg.h
  • IFXCOMPILER_COMMON_LINKER_SYMBOLS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFXCOMPILER_CORE_LINKER_SYMBOLS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFXCPU_ALLCORE_DONE : IfxCpu_cfg.h
  • IFXCPU_CACHABLE_FLASH_SEGMENT : IfxCpu_cfg.h
  • IFXCPU_CACHABLE_LMU_SEGMENT : IfxCpu_cfg.h
  • IFXCPU_CFG_ALLCORE_DONE : IfxCpu_cfg.h
  • IFXCPU_CSTART_CCU_INIT_HOOK : IfxCpu_CStart0.c
  • IFXCPU_GLB_ADDR_DSPR : IfxCpu.h
  • IFXCPU_GLB_ADDR_PSPR : IfxCpu.h
  • IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h
  • IFXCPU_NUM_MODULES : IfxCpu_cfg.h
  • IFXCSTART0_PCX_O_S_DEFAULT : IfxCpu_CStart0.c
  • IFXCSTART0_PSW_DEFAULT : IfxCpu_CStart0.c
  • IFXCSTART1_PCX_O_S_DEFAULT : IfxCpu_CStart1.c
  • IFXCSTART1_PSW_DEFAULT : IfxCpu_CStart1.c
  • IFXDMA_ERROR_D : IfxDma_cfg.h
  • IFXDMA_ERROR_DLL : IfxDma_cfg.h
  • IFXDMA_ERROR_RAM : IfxDma_cfg.h
  • IFXDMA_ERROR_S : IfxDma_cfg.h
  • IFXDMA_ERROR_SLL : IfxDma_cfg.h
  • IFXDMA_ERROR_SPB : IfxDma_cfg.h
  • IFXDMA_ERROR_SRI : IfxDma_cfg.h
  • IFXDMA_NUM_CHANNELS : IfxDma_cfg.h
  • IFXDMA_NUM_MODULES : IfxDma_cfg.h
  • IFXDSADC_NUM_CHANNELS : IfxDsadc_cfg.h
  • IFXDSADC_NUM_MODULES : IfxDsadc_cfg.h
  • IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_NUM_CHANNELS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_NUM_MODULES : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_SG_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_RDC_CFG_DEBUG : IfxDsadc_Rdc.h
  • IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION : IfxDsadc_Rdc.h
  • IFXDTS_NUM_MODULES : IfxDts_cfg.h
  • IFXEMEM_NUM_MODULES : IfxEmem_cfg.h
  • IFXEMEM_SIZE : IfxEmem_cfg.h
  • IFXEMEM_START_ADDR_BBB : IfxEmem_cfg.h
  • IFXEMEM_START_ADDR_CPU : IfxEmem_cfg.h
  • IFXEMEM_START_ADDR_CPU_CACHED : IfxEmem_cfg.h
  • IFXERAY_NUM_CHANNELS : IfxEray_cfg.h
  • IFXERAY_NUM_MODULES : IfxEray_cfg.h
  • IFXERAY_NUM_SLOTS : IfxEray_cfg.h
  • IFXERAY_PINMAP_NUM_MODULES : IfxEray_PinMap.h
  • IFXERAY_PINMAP_NUM_NODES : IfxEray_PinMap.h
  • IFXERAY_PINMAP_RXD_IN_NUM_ITEMS : IfxEray_PinMap.h
  • IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS : IfxEray_PinMap.h
  • IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS : IfxEray_PinMap.h
  • IFXETH_DESCR_SIZE : IfxEth.h
  • IFXETH_MAX_RX_BUFFERS : IfxEth.h
  • IFXETH_MAX_TIMEOUT_VALUE : IfxEth_cfg.h
  • IFXETH_MAX_TX_BUFFERS : IfxEth.h
  • IFXETH_NUM_MODULES : IfxEth_cfg.h
  • IFXETH_PHY_PEF7071_MDIO_AN_ADV : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_AN_EXP : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_AN_LPA : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_AN_NPRX : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_AN_NPTX : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_CTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_EECTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_ERRCNT : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_FWV : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_GCTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_GSTAT : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_IMASK : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_ISTAT : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_LED : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MIICTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MIISTAT : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MMDCTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA_PI : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MMDDATA : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYCTL1 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYCTL2 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYID1 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYID2 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYPERF : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYSTAT1 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYSTAT2 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_RES11 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_RES12 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_RES1F : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_STAT : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_TPGCTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_TPGDATA : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_XSTAT : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_WAIT_GMII_READY : IfxEth_Phy_Pef7071.c
  • IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_MDC_OUT_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_NUM_MODULES : IfxEth_PinMap.h
  • IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_RXD_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_RXER_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_TXD_OUT_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_RTX_BUFFER_SIZE : IfxEth.h
  • IFXFCE_NUM_KERNEL : IfxFce_cfg.h
  • IFXFCE_NUM_MODULES : IfxFce_cfg.h
  • IFXFFT_DATA_SPACE : IfxFft_cfg.h
  • IFXFFT_FFT_DATA_TRANSFER : IfxFft_Fft.c
  • IFXFFT_FFT_DMA_CHANNEL_BASE : IfxFft_cfg.h
  • IFXFFT_FFT_DMA_SUPPORT : IfxFft_cfg.h
  • IFXFFT_FFT_DMADISCARDCHANNELID : IfxFft_Fft.c
  • IFXFFT_FFT_DMADISCARDCHANNELID_OPT : IfxFft_Fft.c
  • IFXFFT_FFT_DMAINPUTCHANNELID : IfxFft_Fft.c
  • IFXFFT_FFT_DMAINPUTCHANNELID_OPT : IfxFft_Fft.c
  • IFXFFT_FFT_DMAOUTPUTCHANNELID : IfxFft_Fft.c
  • IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT : IfxFft_Fft.c
  • IFXFFT_FFT_FLAG_DONE : IfxFft_Fft.h
  • IFXFFT_FFT_FLAG_INPUT : IfxFft_Fft.h
  • IFXFFT_FFT_HW_EXEC : IfxFft_Fft.h
  • IFXFFT_FFT_ISALIGNED : IfxFft_Fft.c
  • IFXFFT_FFT_MOVE_BTR4 : IfxFft_Fft.c
  • IFXFFT_FFT_MOVE_DIV : IfxFft_Fft.c
  • IFXFFT_FFT_MOVE_SIZE : IfxFft_Fft.c
  • IFXFFT_FFT_NUM_JOBS : IfxFft_cfg.h
  • IFXFFT_FFT_OPTIMIZED : IfxFft_cfg.h
  • IFXFFT_FFT_PIPELINED : IfxFft_cfg.h
  • IFXFFT_FFT_WINDOW_TRANSFER : IfxFft_Fft.c
  • IFXFFT_MAX_LENGTH : IfxFft_cfg.h
  • IFXFFT_MAX_WINDOW_LENGTH : IfxFft_cfg.h
  • IFXFFT_NUM_MODULES : IfxFft_cfg.h
  • IFXFFT_WINDOW_SPACE : IfxFft_cfg.h
  • IFXFLASH_CMD_BASE_ADDRESS : IfxFlash_cfg.h
  • IFXFLASH_CMD_BASE_OFFSET : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_BANKS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_BURST_LENGTH : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_END : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_NUM_LOG_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_PAGE_LENGTH : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_SIZE : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_START : IfxFlash_cfg.h
  • IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS : IfxFlash_cfg.h
  • IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS : IfxFlash_cfg.h
  • IFXFLASH_NUM_FLASH_MODULES : IfxFlash_cfg.h
  • IFXFLASH_NUM_MODULES : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_BANKS : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_BURST_LENGTH : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_END : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_NUM_LOG_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_OFFSET : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_PAGE_LENGTH : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_SIZE : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_START : IfxFlash_cfg.h
  • IFXGLOBAL_DERIVATIVE_NAME : IfxGlobal_cfg.h
  • IFXGLOBAL_DERIVATIVE_TC26xB : IfxGlobal_cfg.h
  • IFXGPT12_NUM_MODULES : IfxGpt12_cfg.h
  • IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_NUM_MODULES : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_NUM_TIMERS : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS : IfxGpt12_PinMap.h
  • IFXGTM_ATOM_NUM_AGC_CHANNELS : IfxGtm_Atom.c
  • IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS : IfxGtm_Atom_PwmHl.h
  • IFXGTM_CMU_CLKDIS_ALL : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK0 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK1 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK2 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK3 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK4 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK5 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK6 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK7 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_ECLK0 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_ECLK1 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_ECLK2 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_FXCLK : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_ALL : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK0 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK1 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK2 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK3 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK4 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK5 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK6 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK7 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_ECLK0 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_ECLK1 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_ECLK2 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_FXCLK : IfxGtm_cfg.h
  • IFXGTM_NUM_ATOM_CHANNELS : IfxGtm_cfg.h
  • IFXGTM_NUM_ATOM_OBJECTS : IfxGtm_cfg.h
  • IFXGTM_NUM_MODULES : IfxGtm_cfg.h
  • IFXGTM_NUM_TIM_CHANNELS : IfxGtm_cfg.h
  • IFXGTM_NUM_TOM_CHANNELS : IfxGtm_cfg.h
  • IFXGTM_NUM_TOM_OBJECTS : IfxGtm_cfg.h
  • IFXGTM_TOM_NUM_TGC_CHANNELS : IfxGtm_Tom.h
  • IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS : IfxGtm_Tom_PwmHl.h
  • IFXHSSL_JTAG_ID_ADDRESS : IfxHssl_cfg.h
  • IFXHSSL_NUM_CHANNELS : IfxHssl_cfg.h
  • IFXHSSL_NUM_MODULES : IfxHssl_cfg.h
  • IFXI2C_NUM_MODULES : IfxI2c_cfg.h
  • IFXI2C_PINMAP_NUM_MODULES : IfxI2c_PinMap.h
  • IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS : IfxI2c_PinMap.h
  • IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS : IfxI2c_PinMap.h
  • IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX : IfxIom_Driver.c
  • IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL : IfxIom_Driver.c
  • IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX : IfxIom_Driver.c
  • IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL : IfxIom_Driver.c
  • IFXIOM_NUM_CHANNELS : IfxIom_cfg.h
  • IFXMSC_NUM_ENABLE_SELECT_LINES : IfxMsc_cfg.h
  • IFXMSC_NUM_MODULES : IfxMsc_cfg.h
  • IFXMSC_PINMAP_EN_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_INJ_IN_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_NUM_MODULES : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_NUM_TARGETS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_SDI_IN_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_SON_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMTU_ERROR_FLAGS_MASK : IfxMtu.h
  • IFXMTU_MAX_TRACKED_ADDRESSES : IfxMtu_cfg.h
  • IFXMTU_MC_ADDRESS_BASE : IfxMtu_cfg.h
  • IFXMTU_NUM_MBIST_TABLE_ITEMS : IfxMtu_cfg.h
  • IFXMULTICAN_NUM_MESSAGE_OBJECTS : IfxMultican_cfg.h
  • IFXMULTICAN_NUM_MODULES : IfxMultican_cfg.h
  • IFXMULTICAN_NUM_NODES : IfxMultican_cfg.h
  • IFXMULTICAN_NUM_SRC : IfxMultican_cfg.h
  • IFXMULTICAN_PINMAP_NUM_MODULES : IfxMultican_PinMap.h
  • IFXMULTICAN_PINMAP_NUM_NODES : IfxMultican_PinMap.h
  • IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS : IfxMultican_PinMap.h
  • IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS : IfxMultican_PinMap.h
  • IFXMULTICAN_R_NUM_SRC : IfxMultican_cfg.h
  • IFXPORT_NUM_MODULES : IfxPort_cfg.h
  • IFXPORT_OUTOUTFEATURE_NONE : IfxPort_cfg.h
  • IFXPORT_PINMAP_NUM_MODULES : IfxPort_PinMap.h
  • IFXPORT_PINMAP_PIN_NUM_ITEMS : IfxPort_PinMap.h
  • IFXPSI5_DEFAULT_FASTCLOCK_FREQ : IfxPsi5_cfg.h
  • IFXPSI5_DEFAULT_SLOWCLOCK_FREQ : IfxPsi5_cfg.h
  • IFXPSI5_DEFAULT_TIMESTAMP_FREQ : IfxPsi5_cfg.h
  • IFXPSI5_ENABLE_CHANNEL : IfxPsi5_cfg.h
  • IFXPSI5_ENABLE_CHANNELTRIGGER : IfxPsi5_cfg.h
  • IFXPSI5_NUM_CHANNELS : IfxPsi5_cfg.h
  • IFXPSI5_NUM_MODULES : IfxPsi5_cfg.h
  • IFXPSI5_NUM_SLOTS : IfxPsi5_cfg.h
  • IFXPSI5_NUM_WDTS : IfxPsi5_cfg.h
  • IFXPSI5_PINMAP_NUM_CHANNELS : IfxPsi5_PinMap.h
  • IFXPSI5_PINMAP_NUM_MODULES : IfxPsi5_PinMap.h
  • IFXPSI5_PINMAP_RX_IN_NUM_ITEMS : IfxPsi5_PinMap.h
  • IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS : IfxPsi5_PinMap.h
  • IFXPSI5_STEP_RANGE : IfxPsi5_cfg.h
  • IFXPSI5S_BAUDRATE_1562500 : IfxPsi5s_cfg.h
  • IFXPSI5S_BG_RANGE : IfxPsi5s_cfg.h
  • IFXPSI5S_DEFAULT_FASTCLOCK_FREQ : IfxPsi5s_cfg.h
  • IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ : IfxPsi5s_cfg.h
  • IFXPSI5S_DEFAULT_TIMESTAMP_FREQ : IfxPsi5s_cfg.h
  • IFXPSI5S_ENABLE_CHANNEL : IfxPsi5s_cfg.h
  • IFXPSI5S_ENABLE_CHANNELTRIGGER : IfxPsi5s_cfg.h
  • IFXPSI5S_FDV_RANGE : IfxPsi5s_cfg.h
  • IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK : IfxPsi5s_cfg.h
  • IFXPSI5S_GCR_CHANNELS_ENABLE_MASK : IfxPsi5s_cfg.h
  • IFXPSI5S_NUM_CHANNELS : IfxPsi5s_cfg.h
  • IFXPSI5S_NUM_MODULES : IfxPsi5s_cfg.h
  • IFXPSI5S_NUM_SLOTS : IfxPsi5s_cfg.h
  • IFXPSI5S_NUM_WDTS : IfxPsi5s_cfg.h
  • IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS : IfxPsi5s_PinMap.h
  • IFXPSI5S_PINMAP_NUM_MODULES : IfxPsi5s_PinMap.h
  • IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS : IfxPsi5s_PinMap.h
  • IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS : IfxPsi5s_PinMap.h
  • IFXPSI5S_STEP_RANGE : IfxPsi5s_cfg.h
  • IFXQSPI_BACONSIZE : IfxQspi.h
  • IFXQSPI_ERRORENABLEMASK : IfxQspi.h
  • IFXQSPI_FIFO32BITSIZE : IfxQspi.h
  • IFXQSPI_GETLONGMODEFIFOSIZE : IfxQspi.h
  • IFXQSPI_HWFIFO_DEPTH : IfxQspi_cfg.h
  • IFXQSPI_NUM_CHANNELS : IfxQspi_cfg.h
  • IFXQSPI_NUM_MODULES : IfxQspi_cfg.h
  • IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_NUM_MODULES : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_NUM_SLAVESELECTS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXSCU_CFG_ASCLINFDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINFDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINFDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINFDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINFDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINFDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON0 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON0_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON0_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON0_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON1 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON1_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON1_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON1_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON2 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON2_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON2_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON2_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON5 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON5_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON5_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON5_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON6 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON6_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON6_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON6_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON7 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON7_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON7_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON7_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CLK_DISTRIBUTION : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE_MSK : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE_VAL : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_FREQ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_XTAL_FREQ : IfxScu_cfg.h
  • IFXSCU_EVR_OSC_FREQUENCY : IfxScu_cfg.h
  • IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_NUM_MODULES : IfxScu_PinMap.h
  • IFXSCU_PINMAP_NUM_REQUESTS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_REQ_IN_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PLL_FREERUNNING_FREQUENCY : IfxScu_cfg.h
  • IFXSCU_VCO_BASE_FREQUENCY : IfxScu_cfg.h
  • IFXSCUCCU_OSC_STABLECHK_TIME : IfxScuCcu.h
  • IFXSCUERU_CHANNEL_NUMBER_ODD : IfxScuEru.c
  • IFXSCUERU_TO_REGISTER_BASE : IfxScuEru.c
  • IFXSCUWDT_CALCULATELFSR : IfxScuWdt.asm.h
  • IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT : IfxScuWdt.h
  • IFXSCUWDT_RESET_PASSWORD : IfxScuWdt.c
  • IFXSENT_CFG_CHANNEL_INTEN : IfxSent_cfg.h
  • IFXSENT_CFG_STEP_RANGE : IfxSent_cfg.h
  • IFXSENT_CFG_TIMEOUT_VALUE : IfxSent_cfg.h
  • IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS : IfxSent.h
  • IFXSENT_NUM_CHANNELS : IfxSent_cfg.h
  • IFXSENT_NUM_MODULES : IfxSent_cfg.h
  • IFXSENT_PINMAP_NUM_CHANNELS : IfxSent_PinMap.h
  • IFXSENT_PINMAP_NUM_MODULES : IfxSent_PinMap.h
  • IFXSENT_PINMAP_SENT_IN_NUM_ITEMS : IfxSent_PinMap.h
  • IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS : IfxSent_PinMap.h
  • IFXSMU_NUM_MODULES : IfxSmu_cfg.h
  • IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS : IfxSmu_PinMap.h
  • IFXSMU_PINMAP_NUM_MODULES : IfxSmu_PinMap.h
  • IFXSTM_DEFAULT_TIMER : IfxStm.h
  • IFXSTM_NUM_COMPARATORS : IfxStm_cfg.h
  • IFXSTM_NUM_MODULES : IfxStm_cfg.h
  • IFXVADC_ANALOG_FREQUENCY_MAX : IfxVadc_cfg.h
  • IFXVADC_ANALOG_FREQUENCY_MIN : IfxVadc_cfg.h
  • IFXVADC_DEFAULT_ANALOG_FREQ : IfxVadc_cfg.h
  • IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER : IfxVadc_cfg.h
  • IFXVADC_NUM_ADC_CAL_GROUPS : IfxVadc_cfg.h
  • IFXVADC_NUM_ADC_COMMON_GROUPS : IfxVadc_cfg.h
  • IFXVADC_NUM_ADC_GROUPS : IfxVadc_cfg.h
  • IFXVADC_NUM_EMUX_INTERFACE : IfxVadc_cfg.h
  • IFXVADC_NUM_GLOBAL_INPUTCLASSES : IfxVadc_cfg.h
  • IFXVADC_NUM_INPUTCLASSES : IfxVadc_cfg.h
  • IFXVADC_NUM_MODULES : IfxVadc_cfg.h
  • IFXVADC_NUM_REQUESTSLOTS : IfxVadc_cfg.h
  • IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS : IfxVadc_PinMap.h
  • IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS : IfxVadc_PinMap.h
  • IFXVADC_PINMAP_NUM_GROUPS : IfxVadc_PinMap.h
  • IFXVADC_PINMAP_NUM_MODULES : IfxVadc_PinMap.h
  • IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS : IfxVadc_PinMap.h
  • IFXVADC_QUEUE_REFILL : IfxVadc_cfg.h
  • IFXVADC_SAMPLETIME_MIN : IfxVadc_cfg.h
  • ISSPACE : Ifx_Shell.c


iLLD_TC26B: Globals

- l -

  • laccum : Ifx_TypesTasking.h
  • LOW_BYTE_FIRST : Platform_Types.h
  • LSB_FIRST : Platform_Types.h


iLLD_TC26B: Globals

- m -

  • MSB_FIRST : Platform_Types.h


iLLD_TC26B: Globals

- n -

  • NOP : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsDcc2G.h , IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc2G.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking2G.h , IfxCpu_IntrinsicsGhs.h
  • NULL_PTR : Compilers.h


iLLD_TC26B: Globals

- p -

  • PIN_DRIVER_STRONG_SHARP : Bsp.h
  • Pin_enableEmgStop : Bsp.h
  • Pin_getGroupState : Bsp.h
  • Pin_getState : Bsp.h
  • Pin_setDriver : Bsp.h
  • Pin_setGroupModeInput : Bsp.h
  • Pin_setGroupModeOutput : Bsp.h
  • Pin_setGroupState : Bsp.h
  • Pin_setMode : Bsp.h
  • Pin_setState : Bsp.h
  • Pin_setStateHigh : Bsp.h
  • Pin_setStateLow : Bsp.h
  • PLATFORM_AR_RELEASE_MAJOR_VERSION : Platform_Types.h
  • PLATFORM_AR_RELEASE_MINOR_VERSION : Platform_Types.h
  • PLATFORM_AR_RELEASE_REVISION_VERSION : Platform_Types.h
  • PLATFORM_SW_MAJOR_VERSION : Platform_Types.h
  • PLATFORM_SW_MINOR_VERSION : Platform_Types.h
  • PLATFORM_SW_PATCH_VERSION : Platform_Types.h
  • PLATFORM_VENDOR_ID : Platform_Types.h


iLLD_TC26B: Globals

- s -

  • sfract : Ifx_TypesTasking.h
  • SHELL_HELP_DESCRIPTION_TEXT : Ifx_Shell.h
  • STDIF_DPIPE_MAX_PRINT_SIZE : IfxStdIf_DPipe.h
  • STRINGIFY : IfxCpu_IntrinsicsGhs2G.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGnuc2G.h


iLLD_TC26B: Globals

- t -

  • TIME_INFINITE : Ifx_Types.h
  • TIME_NULL : Ifx_Types.h
  • TimeConst_0s : Bsp.h
  • TimeConst_100ms : Bsp.h
  • TimeConst_100ns : Bsp.h
  • TimeConst_100s : Bsp.h
  • TimeConst_100us : Bsp.h
  • TimeConst_10ms : Bsp.h
  • TimeConst_10ns : Bsp.h
  • TimeConst_10s : Bsp.h
  • TimeConst_10us : Bsp.h
  • TimeConst_1ms : Bsp.h
  • TimeConst_1s : Bsp.h
  • TimeConst_1us : Bsp.h
  • TIMER_COUNT : Bsp.h
  • TIMER_INDEX_100MS : Bsp.h
  • TIMER_INDEX_100NS : Bsp.h
  • TIMER_INDEX_100S : Bsp.h
  • TIMER_INDEX_100US : Bsp.h
  • TIMER_INDEX_10MS : Bsp.h
  • TIMER_INDEX_10NS : Bsp.h
  • TIMER_INDEX_10S : Bsp.h
  • TIMER_INDEX_10US : Bsp.h
  • TIMER_INDEX_1MS : Bsp.h
  • TIMER_INDEX_1S : Bsp.h
  • TIMER_INDEX_1US : Bsp.h
  • TRUE : Platform_Types.h


iLLD_TC26B: Assert.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Assert.c
Go to the documentation of this file.
1 /**
2 * \file Assert.c
3 * \brief Assert functions.
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:29 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #include "Assert.h"
43
44 #if IFX_CFG_ASSERT_STDIO == 1
45 /** Current standard IO used for the IFX_ASSERT and IFX_VALIDATE */
46 IfxStdIf_DPipe *Assert_io = NULL_PTR;
47 #endif
48
49 #if IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT > IFX_VERBOSE_LEVEL_OFF
50 uint32 Assert_verboseLevel = IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT;
51 #endif
52
53 #if IFX_CFG_ASSERT_STDIO == 1
54 void Ifx_Assert_setStandardIo(IfxStdIf_DPipe *standardIo)
55 {
56 Assert_io = standardIo;
57 }
58
59
60 #endif
61
62 /** \internal
63 * Text used to display the king of assertion
64 */
65 const pchar Assert_level[6] = {
66 "OFF",
67 "FAILURE",
68 "ERROR",
69 "WARNING",
70 "INFO",
71 "DEBUG"
72 };
73
74 void Ifx_Assert_doLevel(uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
75 {
76 #if IFX_CFG_ASSERT_USE_BREAKPOINT == 1
77
78 if (level <= IFX_VERBOSE_LEVEL_ERROR)
79 {
80 __debug();
81 }
82
83 #endif
84
85 #if IFX_CFG_ASSERT_STDIO == 1
86
87 if (Assert_io != NULL_PTR)
88 {
89 IfxStdIf_DPipe_print(Assert_io, "ASSERTION %s '%s' in %s:%u (function '%s()')" ENDL, Assert_level[level],
90 __assertion, __file, __line, __function);
91 }
92
93 #endif
94 }
95
96
97 boolean Ifx_Assert_doValidate(boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
98 {
99 if (!((expr) || (level > Assert_verboseLevel)))
100 {
101 #if IFX_CFG_ASSERT_USE_BREAKPOINT == 1
102
103 if (level <= IFX_VERBOSE_LEVEL_ERROR)
104 {
105 __debug();
106 }
107
108 #endif
109
110 #if IFX_CFG_ASSERT_STDIO == 1
111
112 if (Assert_io != NULL_PTR)
113 {
114 IfxStdIf_DPipe_print(Assert_io, "VALIDATION %s '%s' in %s:%u (function '%s()')" ENDL, Assert_level[level],
115 __assertion, __file, __line, __function);
116 }
117
118 #endif
119 }
120 else
121 {}
122
123 return expr;
124 }
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
uint32
unsigned long uint32
Definition: Platform_Types.h:116
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:64
Assert.h
Assert functions.
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxStdIf_DPipe_print
void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:50
IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT
#define IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT
defines the assertion default level
Definition: Assert.h:89
__debug
void __debug(void) __attribute__((intrinsic_function(0x103
Assert_level
const pchar Assert_level[6]
Definition: Assert.c:65
Ifx_Assert_doValidate
boolean Ifx_Assert_doValidate(boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
Definition: Assert.c:97
Ifx_Assert_doLevel
void Ifx_Assert_doLevel(uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
Definition: Assert.c:74
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx_Assert_setStandardIo
#define Ifx_Assert_setStandardIo(standardIo)
Set the standard output used for IFX_ASSERT and IFX_VALIDATE.
Definition: Assert.h:105


iLLD_TC26B: Assert.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Assert.h
Go to the documentation of this file.
1 /**
2 * \file Assert.h
3 * \brief Assert functions.
4 * \ingroup library_srvsw_sysse_bsp_assert
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-28 14:15:34 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup library_srvsw_sysse_bsp_assert Assertion
42 * This module implements assertion functions.
43 * \ingroup library_srvsw_sysse_bsp
44 */
45
46 #ifndef ASSERT_H
47 #define ASSERT_H 1
48
49 #include "_Utilities/Ifx_Assert.h"
50
51 /** \addtogroup library_srvsw_sysse_bsp_assert
52 * Global configuration settings (Ifx_Cfg.h) :
53 * - IFX_CFG_ASSERT_STDIO: if IFX_CFG_ASSERT_STDIO=1, the assertion is output to the io
54 * defined by \ref Ifx_Assert_setStandardIo (). if IFX_CFG_ASSERT_STDIO=0, no text
55 * output is done.
56 * Default is IFX_CFG_ASSERT_STDIO=0
57 * - IFX_CFG_ASSERT_USE_BREAKPOINT: if IFX_CFG_ASSERT_USE_BREAKPOINT=1, a debug instruction is
58 * inserted in case an assertion occurs with a level of
59 * \ref IFX_VERBOSE_LEVEL_FAILURE or \ref IFX_VERBOSE_LEVEL_ERROR. If IFX_CFG_ASSERT_USE_BREAKPOINT=0 then
60 * no debug instruction is inserted.
61 * Default is IFX_CFG_ASSERT_USE_BREAKPOINT=0.
62 * - IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT: Set the assertion limit,
63 * assertion with a level below or equal to the limit are taken in
64 * account, other are ignored. range=[\ref IFX_VERBOSE_LEVEL_OFF, \ref IFX_VERBOSE_LEVEL_FAILURE,
65 * \ref IFX_VERBOSE_LEVEL_ERROR, \ref IFX_VERBOSE_LEVEL_WARNING, \ref IFX_VERBOSE_LEVEL_INFO,
66 * \ref IFX_VERBOSE_LEVEL_DEBUG]
67 * Default is IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT=\ref IFX_VERBOSE_LEVEL_INFO.
68 *
69 * Do not include this file but use # include "_Utilities/Ifx_Assert.h" instead
70 * \{ */
71
72 #ifndef IFX_CFG_ASSERT_STDIO
73 # define IFX_CFG_ASSERT_STDIO (0) /**< \brief If set to 1, the assert message is send to the Assert_io interface */
74 #endif
75
76 #if IFX_CFG_ASSERT_STDIO == 1
77 # include "StdIf/IfxStdIf_DPipe.h"
78 #endif
79
80 #ifndef IFX_CFG_ASSERT_USE_BREAKPOINT
81 # define IFX_CFG_ASSERT_USE_BREAKPOINT (0) /**< \brief If set to 1, the assert function will break the execution (breakpoint) */
82 #endif
83
84 #ifndef IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT
85 /** \brief defines the assertion default level
86 *
87 * If not defined, the default assert level is set to IFX_VERBOSE_LEVEL_INFO
88 * */
89 #define IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT (IFX_VERBOSE_LEVEL_INFO)
90 #endif
91
92 /** \brief Set the standard output used for \ref IFX_ASSERT and \ref IFX_VALIDATE
93 *
94 * For example the standard IO could redirect the output to a serial interface, CAN interface, ...
95 *
96 * \param standardIo Specifies the standard output used
97 *
98 * Enable only if (IFX_CFG_ASSERT_STDIO!=0)
99 *
100 * \return None.
101 */
102 #if IFX_CFG_ASSERT_STDIO == 1
103 IFX_EXTERN void Ifx_Assert_setStandardIo(IfxStdIf_DPipe *standardIo);
104 #else
105 #define Ifx_Assert_setStandardIo(standardIo) ((void)0)
106 #endif
107
108 /** \internal
109 * \brief Execute the assertion and display the assertion message
110 *
111 * Do not call this function directly, use IFX_ASSERT() instead
112 *
113 * \param level assertion level
114 * \param __assertion test as string, is displayed with the assertion message
115 * \param __file file in which the assertion occurred
116 * \param __line line number where the assertion occurred
117 * \param __function name of the function in which the assertion occurred
118 * \return void
119 */
120 IFX_EXTERN void Ifx_Assert_doLevel(uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function);
121
122 /** \internal
123 * \brief Execute the assertion and display the assertion message.
124 *
125 * Do not call this function directly, use IFX_VALIDATE() instead
126 *
127 * \param expr expression value, assertion occurs if FALSE
128 * \param level assertion level
129 * \param __assertion test as string, is displayed with the assertion message
130 * \param __file file in which the assertion occurred
131 * \param __line line number where the assertion occurred
132 * \param __function name of the function in which the assertion occurred
133 * \return expr
134 */
135 IFX_EXTERN boolean Ifx_Assert_doValidate(boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function);
136
137 #if IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT > IFX_VERBOSE_LEVEL_OFF
138 IFX_EXTERN uint32 Assert_verboseLevel; /**< \bri-ef Current verbose level, this value is initialised to IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT */
139
140 #else
141
142 # undef IFX_CFG_ASSERT_STDIO
143 # define IFX_CFG_ASSERT_STDIO (0)
144
145 #endif
146
147 #undef IFX_ASSERT
148 #undef IFX_VALIDATE
149
150 /** \brief Assertion function (assert)
151 *
152 * If expr is FALSE, then an assertion message is displayed. The message
153 * indicates the assertion level, the file, line and function where the
154 * assertion occurred, and also display expr as text. In case the debug break
155 * point is enabled then a debug instruction will also be inserted so that the debugger stops
156 *
157 * If expr is true, nothing is additional done.
158 *
159 * The expr expression is ignored (code disabled) in case the assertion level set by IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT is \ref IFX_VERBOSE_LEVEL_OFF.
160 *
161 * The output needs to the be set with the function Ifx_Assert_setStandardIo() in order for the message to be displayed.
162 *
163 * \param level level of the assertion, range=[\ref IFX_VERBOSE_LEVEL_OFF, \ref IFX_VERBOSE_LEVEL_FAILURE,
164 * \ref IFX_VERBOSE_LEVEL_ERROR, \ref IFX_VERBOSE_LEVEL_WARNING, \ref IFX_VERBOSE_LEVEL_INFO,
165 * \ref IFX_VERBOSE_LEVEL_DEBUG]
166 * \param expr expression to be tested. If FALSE the assertion is executed else nothing is done
167 *
168 * \return void
169 */
170 #if IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT > IFX_VERBOSE_LEVEL_OFF
171 # define IFX_ASSERT(level, expr) (((expr) || (level > Assert_verboseLevel)) ? ((void)0) : Ifx_Assert_doLevel(level,#expr, __FILE__, __LINE__, __func__))
172 #else
173 # define IFX_ASSERT(level, expr) ((void)0)
174 #endif
175
176 /** \brief Assertion function (validate)
177 *
178 * If expr is FALSE, then an assertion message is displayed. The message
179 * indicates the assertion level, the file, line and function where the
180 * assertion occurred, and also display expr as text. In case the debug
181 * break point is enabled then a debug instruction will also be inserted so
182 * that the debugger stops.
183 *
184 * \ref IFX_VALIDATE differs from \ref IFX_ASSERT in the way that the expr expression is
185 * evaluated whatever the assertion level set by IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT.
186 *
187 * The output needs to the be set with the function Ifx_Assert_setStandardIo() in order for the message to be displayed.
188 *
189 * \param level level of the assertion, range=[\ref IFX_VERBOSE_LEVEL_OFF, \ref IFX_VERBOSE_LEVEL_FAILURE,
190 * \ref IFX_VERBOSE_LEVEL_ERROR, \ref IFX_VERBOSE_LEVEL_WARNING, \ref IFX_VERBOSE_LEVEL_INFO,
191 * \ref IFX_VERBOSE_LEVEL_DEBUG]
192 * \param expr expression to be tested. If FALSE the assertion is executed else nothing is done
193 *
194 * \return void
195 */
196 #if IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT > IFX_VERBOSE_LEVEL_OFF
197 # define IFX_VALIDATE(level, expr) (Ifx_Assert_doValidate(expr, level,#expr, __FILE__, __LINE__, __func__))
198 #else
199 # define IFX_VALIDATE(level, expr) (expr)
200 #endif
201
202 /** \} */
203
204 //#include "_Utilities/Ifx_Assert.h" /* Needs to be at the end of the file */
205
206 #endif
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_Assert.h
Assert functions.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
Ifx_Assert_doValidate
IFX_EXTERN boolean Ifx_Assert_doValidate(boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
Definition: Assert.c:97
Ifx_Assert_doLevel
IFX_EXTERN void Ifx_Assert_doLevel(uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
Definition: Assert.c:74
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx_Assert_setStandardIo
#define Ifx_Assert_setStandardIo(standardIo)
Set the standard output used for IFX_ASSERT and IFX_VALIDATE.
Definition: Assert.h:105


iLLD_TC26B: Bsp.c Source File

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Bsp.c
Go to the documentation of this file.
1 /**
2 * \file Bsp.c
3 * \brief Board support package
4 * \ingroup library_srvsw_sysse_bsp_bsp
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-28 14:15:34 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "Bsp.h"
44
45
46 /** \brief Wait function.
47 *
48 * This is an empty function that just spend some time waiting.
49 *
50 * \return None.
51 */
52 void waitPoll(void)
53 {}
54
55 /** \brief Wait time function.
56 *
57 * This is an empty function that that returns after the timeout elapsed. The
58 * minimal time spend in the function is guaranteed, but not the max time.
59 *
60 * \param timeout Specifies the time the function waits for before returning
61 *
62 * \return None.
63 */
64 void waitTime(Ifx_TickTime timeout)
65 {
66 wait(timeout);
67 }
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
waitTime
void waitTime(Ifx_TickTime timeout)
Wait time function.
Definition: Bsp.c:64
Bsp.h
Board support package.
wait
IFX_INLINE void wait(Ifx_TickTime timeout)
Wait for a while.
Definition: Bsp.h:416
waitPoll
void waitPoll(void)
Wait function.
Definition: Bsp.c:52


iLLD_TC26B: Bsp.h Source File

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Bsp.h
Go to the documentation of this file.
1 /**
2 * \file Bsp.h
3 * \brief Board support package
4 * \ingroup library_srvsw_sysse_bsp_bsp
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-28 14:15:35 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup library_srvsw_sysse_bsp_bsp Board support package
42 * This module implements the board support package
43 * \ingroup library_srvsw_sysse_bsp
44 *
45 */
46
47 #ifndef BSP_H
48 #define BSP_H 1
49
50 #include "Ifx_Cfg.h" /* Do not remove this include */
51 #include "Cpu/Std/IfxCpu_Intrinsics.h" /* Do not remove this include */
52 #include "_Utilities/Ifx_Assert.h" /* Do not remove this include */
53
54 #include "Cpu/Std/IfxCpu.h"
55 #include "Port/Std/IfxPort.h"
56 #include "Src/Std/IfxSrc.h"
57 #include "Stm/Std/IfxStm.h"
58 #include "Scu/Std/IfxScuCcu.h"
59
60 #ifndef BSP_DEFAULT_TIMER
61 /** Defined the default timer used */
62 #define BSP_DEFAULT_TIMER (&MODULE_STM0)
63 #endif
64
65 /******************************************************************************/
66 /* Function prototypes */
67 /******************************************************************************/
68
69 /** \addtogroup library_srvsw_sysse_bsp_bsp
70 * \{ */
71 /** \name Interrupt APIs
72 * \{ */
73 IFX_INLINE boolean areInterruptsEnabled(void);
74 IFX_INLINE boolean disableInterrupts(void);
75 IFX_INLINE void enableInterrupts(void);
76 IFX_INLINE void restoreInterrupts(boolean enabled);
77 IFX_INLINE void forceDisableInterrupts(void);
78 /** \} */
79 /** \} */
80
81 /******************************************************************************/
82 /* Functions */
83 /******************************************************************************/
84
85 /** \brief Return the status of the global interrupts
86 *
87 * \retval TRUE if the global interrupts are enabled.
88 * \retval FALSE if the global interrupts are disabled.
89 *
90 * \see restoreInterrupts(), disableInterrupts()
91 */
92 IFX_INLINE boolean areInterruptsEnabled(void)
93 {
94 return IfxCpu_areInterruptsEnabled();
95 }
96
97
98 /** \brief Disable the global interrupts
99 *
100 * \retval TRUE if the global interrupts were enabled before the call to the function.
101 * \retval FALSE if the global interrupts are disabled before the call to the function.
102 *
103 * \see areInterruptsEnabled(), restoreInterrupts()
104 */
105 IFX_INLINE boolean disableInterrupts(void)
106 {
107 return IfxCpu_disableInterrupts();
108 }
109
110
111 /** \brief Disable the global interrupts forcefully
112 *
113 *
114 * \see areInterruptsEnabled(), restoreInterrupts()
115 */
116 IFX_INLINE void forceDisableInterrupts(void)
117 {
118 IfxCpu_forceDisableInterrupts();
119 }
120
121
122 /** \brief enable the global interrupts
123 *
124 */
125 IFX_INLINE void enableInterrupts(void)
126 {
127 IfxCpu_enableInterrupts();
128 }
129
130
131 /** \brief Restore the state of the global interrupts.
132 *
133 * \param enabled if TRUE, re-enable the global interrupts, else do nothing.
134 *
135 * \return None.
136 *
137 * \see areInterruptsEnabled(), disableInterrupts()
138 */
139 IFX_INLINE void restoreInterrupts(boolean enabled)
140 {
141 IfxCpu_restoreInterrupts(enabled);
142 }
143
144
145 /******************************************************************************/
146 /* Macros */
147 /******************************************************************************/
148 #define TIMER_COUNT (11) /**< \internal \brief number of timer values defined */
149 #define TIMER_INDEX_10NS (0) /**< \internal \brief Index of the time value 10ns*/
150 #define TIMER_INDEX_100NS (1) /**< \internal \brief Index of the time value 100ns*/
151 #define TIMER_INDEX_1US (2) /**< \internal \brief Index of the time value 1us*/
152 #define TIMER_INDEX_10US (3) /**< \internal \brief Index of the time value 10us*/
153 #define TIMER_INDEX_100US (4) /**< \internal \brief Index of the time value 100us*/
154 #define TIMER_INDEX_1MS (5) /**< \internal \brief Index of the time value 1ms*/
155 #define TIMER_INDEX_10MS (6) /**< \internal \brief Index of the time value 10ms*/
156 #define TIMER_INDEX_100MS (7) /**< \internal \brief Index of the time value 100ms*/
157 #define TIMER_INDEX_1S (8) /**< \internal \brief Index of the time value 1s*/
158 #define TIMER_INDEX_10S (9) /**< \internal \brief Index of the time value 10s*/
159 #define TIMER_INDEX_100S (10) /**< \internal \brief Index of the time value 100s*/
160
161 /** \internal
162 * Array containing the time constants. This variable should not be used in the application. TimeConst_0s, TimeConst_10ns, ... should be used instead
163 *
164 */
165 IFX_EXTERN Ifx_TickTime TimeConst[TIMER_COUNT];
166
167 /******************************************************************************/
168 /* Function prototypes */
169 /******************************************************************************/
170 /** \addtogroup library_srvsw_sysse_bsp_bsp
171 * \{ */
172 /** \name Time APIs
173 * \{ */
174 IFX_INLINE Ifx_TickTime addTTime(Ifx_TickTime a, Ifx_TickTime b);
175 IFX_INLINE Ifx_TickTime elapsed(Ifx_TickTime since);
176 IFX_INLINE Ifx_TickTime getDeadLine(Ifx_TickTime timeout);
177 IFX_INLINE Ifx_TickTime getTimeout(Ifx_TickTime deadline);
178 IFX_EXTERN void initTime(void);
179 IFX_INLINE boolean isDeadLine(Ifx_TickTime deadLine);
180 IFX_INLINE Ifx_TickTime now(void);
181 IFX_INLINE Ifx_TickTime nowWithoutCriticalSection(void);
182 IFX_INLINE boolean poll(volatile boolean *test, Ifx_TickTime timeout);
183 IFX_INLINE Ifx_TickTime timingNoInterruptEnd(Ifx_TickTime since, boolean interruptEnabled);
184 IFX_INLINE Ifx_TickTime timingNoInterruptStart(boolean *interruptEnabled);
185 IFX_INLINE void wait(Ifx_TickTime timeout);
186 IFX_EXTERN void waitPoll(void);
187 IFX_EXTERN void waitTime(Ifx_TickTime timeout);
188
189 /** Prototype for wait() functions */
190 typedef void (*WaitTimeFunction)(Ifx_TickTime timeout);
191
192 #define TimeConst_0s ((Ifx_TickTime)0) /**< \brief time constant equal to 1s */
193 #define TimeConst_10ns (TimeConst[TIMER_INDEX_10NS]) /**< \brief time constant equal to 10ns */
194 #define TimeConst_100ns (TimeConst[TIMER_INDEX_100NS]) /**< \brief time constant equal to 100ns */
195 #define TimeConst_1us (TimeConst[TIMER_INDEX_1US]) /**< \brief time constant equal to 1us */
196 #define TimeConst_10us (TimeConst[TIMER_INDEX_10US]) /**< \brief time constant equal to 10us */
197 #define TimeConst_100us (TimeConst[TIMER_INDEX_100US]) /**< \brief time constant equal to 100us */
198 #define TimeConst_1ms (TimeConst[TIMER_INDEX_1MS]) /**< \brief time constant equal to 1ms */
199 #define TimeConst_10ms (TimeConst[TIMER_INDEX_10MS]) /**< \brief time constant equal to 10ms */
200 #define TimeConst_100ms (TimeConst[TIMER_INDEX_100MS]) /**< \brief time constant equal to 100ms */
201 #define TimeConst_1s (TimeConst[TIMER_INDEX_1S]) /**< \brief time constant equal to 1s */
202 #define TimeConst_10s (TimeConst[TIMER_INDEX_10S]) /**< \brief time constant equal to 10s */
203 #define TimeConst_100s (TimeConst[TIMER_INDEX_100S]) /**< \brief time constant equal to 100s */
204
205 /**\}*/
206 /**\}*/
207 /******************************************************************************/
208 /* Functions */
209 /******************************************************************************/
210
211 /** \brief Return system timer value (critical section).
212 *
213 * The function IfxStm_get() is called in a critical section, disabling
214 * the interrupts. The system timer value is limited to TIME_INFINITE.
215 *
216 * \return Returns system timer value.
217 */
218 IFX_INLINE Ifx_TickTime now(void)
219 {
220 Ifx_TickTime stmNow;
221 boolean interruptState;
222
223 interruptState = disableInterrupts();
224 stmNow = (Ifx_TickTime)IfxStm_get(BSP_DEFAULT_TIMER) & TIME_INFINITE;
225 restoreInterrupts(interruptState);
226
227 return stmNow;
228 }
229
230
231 /** \brief Return system timer value (without critical section).
232 *
233 * The function IfxStm_get() is called. The system timer value is limited to TIME_INFINITE.
234 *
235 * \return Returns system timer value.
236 */
237 IFX_INLINE Ifx_TickTime nowWithoutCriticalSection(void)
238 {
239 Ifx_TickTime stmNow;
240
241 stmNow = (Ifx_TickTime)IfxStm_get(BSP_DEFAULT_TIMER) & TIME_INFINITE;
242
243 return stmNow;
244 }
245
246
247 /** \brief Add 2 Ifx_TickTime values and return the result
248 *
249 * \param a parameter a
250 * \param b parameter b
251 *
252 * \return a + b. If either a or b is TIME_INFINITE, the result is TIME_INFINITE
253 */
254 IFX_INLINE Ifx_TickTime addTTime(Ifx_TickTime a, Ifx_TickTime b)
255 {
256 Ifx_TickTime result;
257
258 if ((a == TIME_INFINITE) || (b == TIME_INFINITE))
259 {
260 result = TIME_INFINITE;
261 }
262 else
263 {
264 result = a + b; /* FIXME check for overflow */
265 }
266
267 return result;
268 }
269
270
271 /** \brief Return the elapsed time in ticks.
272 *
273 * Return the elapsed time between the current time and the time passed as parameter
274 *
275 * \return Returns the elapsed time.
276 */
277 IFX_INLINE Ifx_TickTime elapsed(Ifx_TickTime since)
278 {
279 return now() - since;
280 }
281
282
283 /** \brief Return the time dead line.
284 *
285 * \param timeout Specifies the dead line from now: Deadline = Now + Timeout
286 *
287 * \return Return the time dead line.
288 */
289 IFX_INLINE Ifx_TickTime getDeadLine(Ifx_TickTime timeout)
290 {
291 Ifx_TickTime deadLine;
292
293 if (timeout == TIME_INFINITE)
294 {
295 deadLine = TIME_INFINITE;
296 }
297 else
298 {
299 deadLine = now() + timeout;
300 }
301
302 return deadLine;
303 }
304
305
306 /** \brief Return the time until the dead line.
307 *
308 * \param deadline Specifies the dead line from now: Deadline = Now + Timeout
309 *
310 * \return Return the time until the dead line.
311 */
312 IFX_INLINE Ifx_TickTime getTimeout(Ifx_TickTime deadline)
313 {
314 Ifx_TickTime timeout;
315
316 if (deadline == TIME_INFINITE)
317 {
318 timeout = TIME_INFINITE;
319 }
320 else
321 {
322 timeout = deadline - now();
323 }
324
325 return timeout;
326 }
327
328
329 /** \brief Return TRUE if the dead line is over.
330 *
331 * \param deadLine Specifies the dead line.
332 *
333 * \retval TRUE Returns TRUE if the dead line is over
334 * \retval FALSE Returns FALSE if the dead line is not yet over
335 */
336 IFX_INLINE boolean isDeadLine(Ifx_TickTime deadLine)
337 {
338 boolean result;
339
340 if (deadLine == TIME_INFINITE)
341 {
342 result = FALSE;
343 }
344 else
345 {
346 result = now() >= deadLine;
347 }
348
349 return result;
350 }
351
352
353 /** \brief Poll a variable for a time.
354 *
355 * \param test Specifies the variable to test.
356 * \param timeout Specifies the maximal time the variable will be tested
357 *
358 * \retval TRUE Returns TRUE if the variable gets TRUE before the timeout elapse
359 * \retval FALSE Returns FALSE if the variable is FALSE as the timeout elapse
360 */
361 IFX_INLINE boolean poll(volatile boolean *test, Ifx_TickTime timeout)
362 {
363 Ifx_TickTime deadLine = getDeadLine(timeout);
364
365 while ((*test == FALSE) && (isDeadLine(deadLine) == FALSE))
366 {}
367
368 return *test;
369 }
370
371
372 /** \brief Return the elapsed time in system timer ticks, and enable the interrupts.
373 *
374 * The interrupts are enable by the function
375 *
376 * \param since time returned by timingNoInterruptStart()
377 * \param interruptEnabled If TRUE, the interrupts will be enabled before the function exit. This parameter should be set to the value returned by \ref timingNoInterruptStart()
378 *
379 * \return Returns the elapsed time.
380 *
381 * \see timingNoInterruptStart()
382 */
383 IFX_INLINE Ifx_TickTime timingNoInterruptEnd(Ifx_TickTime since, boolean interruptEnabled)
384 {
385 Ifx_TickTime stmNow;
386
387 stmNow = nowWithoutCriticalSection();
388 restoreInterrupts(interruptEnabled);
389
390 return stmNow - since;
391 }
392
393
394 /** \brief Disable the interrupt and return system timer value.
395 *
396 * The interrupt remains disabled after the function call
397 *
398 * \return Returns system timer value.
399 *
400 * \see timingNoInterruptEnd()
401 */
402 IFX_INLINE Ifx_TickTime timingNoInterruptStart(boolean *interruptEnabled)
403 {
404 *interruptEnabled = disableInterrupts();
405
406 return nowWithoutCriticalSection();
407 }
408
409
410 /** \brief Wait for a while.
411 *
412 * \param timeout Specifies the waiting time
413 *
414 * \return None.
415 */
416 IFX_INLINE void wait(Ifx_TickTime timeout)
417 {
418 Ifx_TickTime deadLine = getDeadLine(timeout);
419
420 while (isDeadLine(deadLine) == FALSE)
421 {}
422 }
423
424
425 #define PIN_DRIVER_STRONG_SHARP IfxPort_PadDriver_cmosAutomotiveSpeed1
426 #define Pin_setState(pin, mode) IfxPort_setPinState((pin)->port, (pin)->pinIndex, (mode))
427 #define Pin_setGroupState(pin, mask, data) IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))
428 #define Pin_setMode(pin, mode) IfxPort_setPinMode((pin)->port, (pin)->pinIndex, (mode))
429 #define Pin_setDriver(pin, mode) IfxPort_setPinPadDriver((pin)->port, (pin)->pinIndex, (mode))
430 #define Pin_setStateHigh(pin) IfxPort_setPinHigh((pin)->port, (pin)->pinIndex)
431 #define Pin_setStateLow(pin) IfxPort_setPinLow((pin)->port, (pin)->pinIndex)
432 #define Pin_getState(pin) IfxPort_getPinState((pin)->port, (pin)->pinIndex)
433 #define Pin_setGroupModeOutput(pin, mask, mode, outputIdx) IfxPort_setGroupModeOutput((pin)->port, (pin)->pinIndex, (mask), (mode), (outputIdx))
434 #define Pin_setGroupModeInput(pin, mask, mode) IfxPort_setGroupModeInput((pin)->port, (pin)->pinIndex, (mask), (mode))
435 #define Pin_setGroupState(pin, mask, data) IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))
436 #define Pin_getGroupState(pin, mask) IfxPort_getGroupState((pin)->port, (pin)->pinIndex, (mask))
437 #define Pin_enableEmgStop(pin) IfxPort_enableEmergencyStop((pin)->port, (pin)->pinIndex)
438 //------------------------------------------------------------------------------
439
440 #endif /* BSP_H */
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
nowWithoutCriticalSection
IFX_INLINE Ifx_TickTime nowWithoutCriticalSection(void)
Return system timer value (without critical section).
Definition: Bsp.h:237
IfxStm.h
STM basic functionality.
forceDisableInterrupts
IFX_INLINE void forceDisableInterrupts(void)
Disable the global interrupts forcefully.
Definition: Bsp.h:116
now
IFX_INLINE Ifx_TickTime now(void)
Return system timer value (critical section).
Definition: Bsp.h:218
timingNoInterruptEnd
IFX_INLINE Ifx_TickTime timingNoInterruptEnd(Ifx_TickTime since, boolean interruptEnabled)
Return the elapsed time in system timer ticks, and enable the interrupts.
Definition: Bsp.h:383
disableInterrupts
IFX_INLINE boolean disableInterrupts(void)
Disable the global interrupts.
Definition: Bsp.h:105
IfxCpu_enableInterrupts
IFX_INLINE void IfxCpu_enableInterrupts(void)
API to enable global interrupt. This API simply enables the global interrupt.
Definition: IfxCpu.h:666
Ifx_Assert.h
Assert functions.
enableInterrupts
IFX_INLINE void enableInterrupts(void)
enable the global interrupts
Definition: Bsp.h:125
IfxSrc.h
SRC basic functionality.
waitTime
IFX_EXTERN void waitTime(Ifx_TickTime timeout)
Wait time function.
Definition: Bsp.c:64
IfxCpu_Intrinsics.h
TIMER_COUNT
#define TIMER_COUNT
Definition: Bsp.h:148
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:933
getDeadLine
IFX_INLINE Ifx_TickTime getDeadLine(Ifx_TickTime timeout)
Return the time dead line.
Definition: Bsp.h:289
TimeConst
IFX_EXTERN Ifx_TickTime TimeConst[TIMER_COUNT]
Definition: Bsp.h:165
elapsed
IFX_INLINE Ifx_TickTime elapsed(Ifx_TickTime since)
Return the elapsed time in ticks.
Definition: Bsp.h:277
FALSE
#define FALSE
Definition: Platform_Types.h:93
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:656
wait
IFX_INLINE void wait(Ifx_TickTime timeout)
Wait for a while.
Definition: Bsp.h:416
isDeadLine
IFX_INLINE boolean isDeadLine(Ifx_TickTime deadLine)
Return TRUE if the dead line is over.
Definition: Bsp.h:336
IfxCpu.h
CPU basic functionality.
initTime
IFX_EXTERN void initTime(void)
time constant equal to 1s
restoreInterrupts
IFX_INLINE void restoreInterrupts(boolean enabled)
Restore the state of the global interrupts.
Definition: Bsp.h:139
WaitTimeFunction
void(* WaitTimeFunction)(Ifx_TickTime timeout)
Definition: Bsp.h:190
addTTime
IFX_INLINE Ifx_TickTime addTTime(Ifx_TickTime a, Ifx_TickTime b)
Add 2 Ifx_TickTime values and return the result.
Definition: Bsp.h:254
TIME_INFINITE
#define TIME_INFINITE
Definition: Ifx_Types.h:77
waitPoll
IFX_EXTERN void waitPoll(void)
Wait function.
Definition: Bsp.c:52
IfxScuCcu.h
SCU basic functionality.
IfxCpu_areInterruptsEnabled
IFX_INLINE boolean IfxCpu_areInterruptsEnabled(void)
API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API p...
Definition: IfxCpu.h:648
timingNoInterruptStart
IFX_INLINE Ifx_TickTime timingNoInterruptStart(boolean *interruptEnabled)
Disable the interrupt and return system timer value.
Definition: Bsp.h:402
areInterruptsEnabled
IFX_INLINE boolean areInterruptsEnabled(void)
Return the status of the global interrupts.
Definition: Bsp.h:92
BSP_DEFAULT_TIMER
#define BSP_DEFAULT_TIMER
Definition: Bsp.h:62
IfxStm_get
IFX_INLINE uint64 IfxStm_get(Ifx_STM *stm)
Returns system timer value.
Definition: IfxStm.h:576
IfxCpu_forceDisableInterrupts
IFX_INLINE void IfxCpu_forceDisableInterrupts(void)
Disable the Global Interrupt.
Definition: IfxCpu.h:734
getTimeout
IFX_INLINE Ifx_TickTime getTimeout(Ifx_TickTime deadline)
Return the time until the dead line.
Definition: Bsp.h:312
IfxPort.h
PORT basic functionality.
poll
IFX_INLINE boolean poll(volatile boolean *test, Ifx_TickTime timeout)
Poll a variable for a time.
Definition: Bsp.h:361


iLLD_TC26B: CompilerDcc.c Source File

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CompilerDcc.c
Go to the documentation of this file.
1 /**
2 * \file CompilerDcc.c
3 *
4 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
5 *
6 * $Date: 2014-02-27 20:08:39 GMT$
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "Compilers.h"
43
44 #if defined(__DCC__)
45 /*!
46 * \brief Initializes C variables
47 *
48 * This function is called in the startup. This function initialize the all variables in .data section
49 * and clears the .bss section
50 *
51 * Parameters: Nil
52 * Return: Nil
53 */
54 void Ifx_C_Init(void)
55 {
56 extern void __init_main(void);
57
58 __init_main(); /* initialize data */
59 }
60
61
62 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
63 /*Dummy main function
64 * This function is required only for the Windriver, which looks for main while linking
65 * ! DO NOT USE THIS FUNCTION !*/
66 int main(void)
67 {
68 return 0;
69 }
70
71
72 #endif /*IFX_CFG_USE_COMPILER_DEFAULT_LINKER */
73 #endif
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Compilers.h
Ifx_C_Init
void Ifx_C_Init(void)


iLLD_TC26B: CompilerDcc.h Source File

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CompilerDcc.h
Go to the documentation of this file.
1 /**
2 * \file CompilerDcc.h
3 *
4 * \version iLLD_New
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #ifndef COMPILERDCC_H
42 #define COMPILERDCC_H 1
43
44 /******************************************************************************/
45
46 #include <stddef.h>
47
48 /*Linker definitions which are specific to Dcc */
49 /* IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h
50 * to use the default compiler linker varaibles and startup */
51 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
52
53 /*Start: Core 0 definitions ********************************************** */
54
55 /*C extern defintions */
56 #define IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu) \
57 extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
58 extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
59 extern unsigned int __INTTAB_CPU##cpu[]; /**< interrupt vector table */ \
60 extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap vector table */ \
61 extern unsigned int __CSA##cpu[]; /**< context save area begin */ \
62 extern unsigned int __CSA##cpu##_END[]; /**< context save area end */
63
64 #define __USTACK(cpu) __USTACK##cpu
65 #define __ISTACK(cpu) __ISTACK##cpu
66 #define __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
67 #define __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
68 #define __CSA(cpu) __CSA##cpu
69 #define __CSA_END(cpu) __CSA##cpu##_END
70
71 #define IFXCOMPILER_COMMON_LINKER_SYMBOLS() \
72 __asm("\t .weak __A8_MEM, __A9_MEM"); /**< ASM extern definitions */
73
74 /*Wrapper macros for the tool specific definitions */
75 #if defined(IFX_USE_SW_MANAGED_INT)
76 #define __INTTAB(cpu) ((unsigned int)__INTTAB_CPU##cpu | (unsigned int)0x1FE0)
77 #else
78 #define __INTTAB(cpu) __INTTAB_CPU##cpu
79 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
80
81 #define __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
82
83 #define __SDATA1(cpu) _SMALL_DATA_
84 #define __SDATA2(cpu) _LITERAL_DATA_
85 #define __SDATA3(cpu) __A8_MEM
86 #define __SDATA4(cpu) __A9_MEM
87
88 #endif /*IFX_CFG_USE_COMPILER_DEFAULT_LINKER*/
89
90 /******************************************************************************/
91 #define IFX_INLINE static __inline__
92
93 /* FXIME check how to pack structure members */
94 #define IFX_PACKED
95
96 #define COMPILER_NAME "DCC"
97 #define COMPILER_VERSION __VERSION__
98
99 #define COMPILER_REVISION 0
100 #define IFX_INTERRUPT_FAST IFX_INTERRUPT
101
102 #if defined(IFX_USE_SW_MANAGED_INT)
103
104 #ifndef IFX_INTERRUPT
105 #define IFX_INTERRUPT(isr, vectabNum, prio) void isr(void)
106 #endif
107
108 #else
109 /* *INDENT-OFF* */
110
111 #ifndef IFX_INTERRUPT
112 #define IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
113 #endif
114 #endif /*defined(IFX_USE_SW_MANAGED_INT)*/
115
116 #ifndef IFX_INTERRUPT_INTERNAL
117 #define IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) \
118 void __interrupt(prio) __vector_table(vectabNum) isr(void)
119 #endif
120
121 /*Macro IFX_INTERRUPT_LEGACY is to be used for compiler version pror to 5.9.3.0*/
122 #define IFX_INTERRUPT_LEGACY(isr, vectabNum, prio) \
123 __asm ("\t.align\t 5\n\t\
124 .section .int."#prio"\n \t.sectionlink .inttab"#vectabNum".intvec."#prio"\n\
125 #$$bf\n\
126 __intvec_tc"#vectabNum"_"#prio":\n\
127 movh.a\t %a14,"#isr"@ha\n\
128 lea\t %a14,[%a14]"#isr"@l\n\
129 ji\t %a14\n\
130 #$$ef\n\t\
131 .section .intend."#prio"\n \t.sectionlink .text");\
132 __interrupt__ void isr (void)
133
134 /* *INDENT-ON* */
135
136 /******************************************************************************/
137
138 #define IFX_ALIGN(n) __attribute__ ((aligned(n)))
139
140 /******************************************************************************/
141 /*Memory qualifiers*/
142 #ifndef IFX_FAR_ABS
143 #define IFX_FAR_ABS
144 #endif
145
146 #ifndef IFX_NEAR_ABS
147 #define IFX_NEAR_ABS
148 #endif
149
150 #ifndef IFX_REL_A0
151 #define IFX_REL_A0
152 #endif
153
154 #ifndef IFX_REL_A1
155 #define IFX_REL_A1
156 #endif
157
158 #ifndef IFX_REL_A8
159 #define IFX_REL_A8
160 #endif
161
162 #ifndef IFX_REL_A9
163 #define IFX_REL_A9
164 #endif
165 /******************************************************************************/
166
167 #endif /* COMPILERDCC_H */


iLLD_TC26B: CompilerGhs.c Source File

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CompilerGhs.c
Go to the documentation of this file.
1 /**
2 * \file CompilerGhs.c
3 *
4 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
5 *
6 * $Date: 2014-02-27 20:08:40 GMT$
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "Compilers.h"
43
44 #if defined(__ghs__) && !defined(WIN32)
45
46 typedef int ptrdiff_t;
47 typedef unsigned int syze_t;
48 typedef signed int signed_size_t;
49 #define size_t syze_t
50
51 extern void *memcpy(void *s1, const void *s2, syze_t n);
52 extern void *memset(void *s, int c, syze_t n);
53
54 /* rodata is absolute */
55 typedef const char rodata_ptr[];
56 # define PIRBASE 0
57
58 #define CONST_FUNCP *const
59
60 /*!
61 * \brief Initializes C variables.
62 *
63 * This function is called in the startup. This function initialize the all variables in .data section
64 * and clears the .bss section
65 *
66 * Parameters: Nil
67 * Return: Nil
68 */
69 void Ifx_C_Init(void)
70 {
71 /*----------------------------------------------------------------------*/
72 /* */
73 /* Clear BSS */
74 /* */
75 /*----------------------------------------------------------------------*/
76 { /* The .secinfo section is in text; declare functions to force PIC */
77
78 #pragma ghs rodata
79 extern rodata_ptr __ghsbinfo_clear;
80 #pragma ghs rodata
81 extern rodata_ptr __ghseinfo_clear;
82
83 void **b = (void **) ((char *)__ghsbinfo_clear);
84 void **e = (void **) ((char *)__ghseinfo_clear);
85
86 while (b != e) {
87 void * t; /* target pointer */
88 ptrdiff_t v; /* value to set */
89 size_t n; /* set n bytes */
90 t = (char *)(*b++);
91 v = *((ptrdiff_t *) b); b++;
92 n = *((size_t *) b); b++;
93 memset(t, v, n);
94 }
95 }
96
97 /*----------------*/
98 /* initialize iob */
99 /*----------------*/
100 {
101 #pragma weak __gh_iob_init
102 extern void __gh_iob_init(void);
103 static void (CONST_FUNCP iob_init_funcp)(void) = __gh_iob_init;
104 /* if cciob.c is loaded, initialize _iob for stdin,stdout,stderr */
105 if (iob_init_funcp) __gh_iob_init();
106 }
107 }
108
109
110 #endif
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
t
uint32 ins t
Definition: IfxCpu_IntrinsicsDcc.h:414
Compilers.h
Ifx_C_Init
void Ifx_C_Init(void)


iLLD_TC26B: CompilerGhs.h Source File

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CompilerGhs.h
Go to the documentation of this file.
1 /**
2 * \file CompilerGhs.h
3 *
4 * \version iLLD_New
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #ifndef COMPILERGHS_H
42 #define COMPILERGHS_H 1
43
44 /******************************************************************************/
45
46 // #include <stddef.h>
47
48 /*Linker definitions which are specific to Ghs */
49 /* IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h
50 * to use the default compiler linker varaibles and startup */
51 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
52
53 /*Start: Common definitions ********************************************** */
54 #define IFXCOMPILER_COMMON_LINKER_SYMBOLS() \
55 extern unsigned int __A0_MEM[]; /**< center of A0 addressable area */ \
56 extern unsigned int __A1_MEM[]; /**< center of A1 addressable area */ \
57 extern unsigned int __A8_MEM[]; /**< center of A8 addressable area */ \
58 extern unsigned int __A9_MEM[]; /**< center of A9 addressable area */
59
60 /*End: Common definitions ************************************************ */
61
62 /*Start: Core 0 definitions ********************************************** */
63
64 /*C extern defintions */
65 #define IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu) \
66 extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
67 extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
68 extern unsigned int __INTTAB_CPU##cpu[]; /**< Interrupt vector table */ \
69 extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap table */ \
70 extern unsigned int __CSA##cpu[]; /**< context save area 1 begin */ \
71 extern unsigned int __CSA##cpu##_END[]; /**< context save area 1 begin */
72
73 #define __USTACK(cpu) __USTACK##cpu
74 #define __ISTACK(cpu) __ISTACK##cpu
75 #define __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
76 #define __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
77 #define __CSA(cpu) __CSA##cpu
78 #define __CSA_END(cpu) __CSA##cpu##_END
79
80 /*Wrapper macros for the tool specific definitions */
81 #if defined(IFX_USE_SW_MANAGED_INT)
82 #define __INTTAB(cpu) ((unsigned int)__INTTAB_CPU##cpu | (unsigned int)0x1FE0)
83 #else
84 #define __INTTAB(cpu) __INTTAB_CPU##cpu
85 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
86
87 #define __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
88
89 #define __SDATA1(cpu) __A0_MEM
90 #define __SDATA2(cpu) __A1_MEM
91 #define __SDATA3(cpu) __A8_MEM
92 #define __SDATA4(cpu) __A9_MEM
93
94 /* MHWS+
95 #define __SDATA1(cpu) __A0_MEM
96 #define __SDATA2(cpu) __A1_MEM
97 #define __SDATA3(cpu) __A8_MEM
98 #define __SDATA4(cpu) __A9_MEM
99 MHWS- */
100 #endif /*IFX_CFG_USE_COMPILER_DEFAULT_LINKER*/
101
102 /******************************************************************************/
103 #ifndef IFX_INLINE
104 #define IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */
105 #endif
106
107 #define IFX_PACKED __packed
108
109 #define COMPILER_NAME "GHS"
110 #define COMPILER_VERSION __GHS_VERSION_NUMBER
111
112 #define COMPILER_REVISION __GHS_REVISION_VALUE
113
114 #if defined(IFX_USE_SW_MANAGED_INT)
115
116 #ifndef IFX_INTERRUPT
117 #define IFX_INTERRUPT(isr, vectabNum, prio) void isr(void)
118 #endif
119
120 #else
121 /* *INDENT-OFF* */
122
123 #ifndef IFX_INTERRUPT
124 #define IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
125 #endif
126 #endif /*defined(IFX_USE_SW_MANAGED_INT)*/
127
128 #define IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) \
129 __attribute__((section(".intvec_tc"#vectabNum"_"#prio))) void iVecEntry##vectabNum##_##prio(void) \
130 { \
131 __asm__("movh.a a14, %hi("#isr") \n" \
132 "lea a14, [a14]%lo("#isr")\n" \
133 "ji a14"); \
134 } \
135 __interrupt void isr(void)
136
137 /* *INDENT-ON* */
138
139 /******************************************************************************/
140
141 #define IFX_ALIGN(n) __attribute__ ((aligned(n)))
142
143 /******************************************************************************/
144 /*Memory qualifiers*/
145 #ifndef IFX_FAR_ABS
146 #define IFX_FAR_ABS __attribute__((fardata))
147 #endif
148
149 #ifndef IFX_NEAR_ABS
150 #define IFX_NEAR_ABS
151 #endif
152
153 #ifndef IFX_REL_A0
154 #define IFX_REL_A0
155 #endif
156
157 #ifndef IFX_REL_A1
158 #define IFX_REL_A1
159 #endif
160
161 #ifndef IFX_REL_A8
162 #define IFX_REL_A8
163 #endif
164
165 #ifndef IFX_REL_A9
166 #define IFX_REL_A9
167 #endif
168 /******************************************************************************/
169
170 #endif /* COMPILERGHS_H */


iLLD_TC26B: CompilerGnuc.c Source File

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CompilerGnuc.c
Go to the documentation of this file.
1 /**
2 * \file CompilerGnuc.c
3 *
4 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
5 *
6 * $Date: 2014-02-27 20:08:40 GMT$
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "Compilers.h"
43
44 #if defined(__HIGHTEC__) && !defined(WIN32)
45 /*!
46 * \brief Data s C variables.
47 */
48 extern uint32 __clear_table[]; /**< clear table entry */
49 extern uint32 __copy_table[]; /**< copy table entry */
50
51 typedef volatile union
52 {
53 uint8 *ucPtr;
54 uint16 *usPtr;
55 uint32 *uiPtr;
56 unsigned long long *ullPtr;
57 } IfxStart_CTablePtr;
58
59 /*!
60 * \brief Initializes C variables.
61 *
62 * This function is called in the startup. This function initialize the all variables in .data section
63 * and clears the .bss section
64 *
65 * Parameters: Nil
66 * Return: Nil
67 */
68 void Ifx_C_Init(void)
69 {
70 IfxStart_CTablePtr pBlockDest, pBlockSrc;
71 uint32 uiLength, uiCnt;
72 uint32 *pTable;
73 /* clear table */
74 pTable = (uint32 *)&__clear_table;
75
76 while (pTable)
77 {
78 pBlockDest.uiPtr = (uint32 *)*pTable++;
79 uiLength = *pTable++;
80
81 /* we are finished when length == -1 */
82 if (uiLength == 0xFFFFFFFF)
83 {
84 break;
85 }
86
87 uiCnt = uiLength / 8;
88
89 while (uiCnt--)
90 {
91 *pBlockDest.ullPtr++ = 0;
92 }
93
94 if (uiLength & 0x4)
95 {
96 *pBlockDest.uiPtr++ = 0;
97 }
98
99 if (uiLength & 0x2)
100 {
101 *pBlockDest.usPtr++ = 0;
102 }
103
104 if (uiLength & 0x1)
105 {
106 *pBlockDest.ucPtr = 0;
107 }
108 }
109
110 /* copy table */
111 pTable = (uint32 *)&__copy_table;
112
113 while (pTable)
114 {
115 pBlockSrc.uiPtr = (uint32 *)*pTable++;
116 pBlockDest.uiPtr = (uint32 *)*pTable++;
117 uiLength = *pTable++;
118
119 /* we are finished when length == -1 */
120 if (uiLength == 0xFFFFFFFF)
121 {
122 break;
123 }
124
125 uiCnt = uiLength / 8;
126
127 while (uiCnt--)
128 {
129 *pBlockDest.ullPtr++ = *pBlockSrc.ullPtr++;
130 }
131
132 if (uiLength & 0x4)
133 {
134 *pBlockDest.uiPtr++ = *pBlockSrc.uiPtr++;
135 }
136
137 if (uiLength & 0x2)
138 {
139 *pBlockDest.usPtr++ = *pBlockSrc.usPtr++;
140 }
141
142 if (uiLength & 0x1)
143 {
144 *pBlockDest.ucPtr = *pBlockSrc.ucPtr;
145 }
146 }
147 }
148
149
150 #endif
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Compilers.h
uint16
unsigned short uint16
Definition: Platform_Types.h:112
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx_C_Init
void Ifx_C_Init(void)


iLLD_TC26B: CompilerGnuc.h Source File

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CompilerGnuc.h
Go to the documentation of this file.
1 /**
2 * \file CompilerGnuc.h
3 *
4 * \version iLLD_New
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #ifndef COMPILERGNUC_H
42 #define COMPILERGNUC_H 1
43
44 /******************************************************************************/
45
46 #include <stddef.h>
47
48 /*Linker definitions which are specific to Gnuc */
49 /* IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h
50 * to use the default compiler linker varaibles and startup */
51 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
52
53 /*Start: Common definitions ********************************************** */
54 #define IFXCOMPILER_COMMON_LINKER_SYMBOLS() \
55 extern unsigned int __A0_MEM[]; /**< center of A0 addressable area */ \
56 extern unsigned int __A1_MEM[]; /**< center of A1 addressable area */ \
57 extern unsigned int __A8_MEM[]; /**< center of A8 addressable area */ \
58 extern unsigned int __A9_MEM[]; /**< center of A9 addressable area */
59
60 /*End: Common definitions ************************************************ */
61
62 /*Start: Core 0 definitions ********************************************** */
63
64 /*C extern defintions */
65 #define IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu) \
66 extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
67 extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
68 extern unsigned int __INTTAB_CPU##cpu[]; /**< Interrupt vector table */ \
69 extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap table */ \
70 extern unsigned int __CSA##cpu[]; /**< context save area 1 begin */ \
71 extern unsigned int __CSA##cpu##_END[]; /**< context save area 1 begin */
72
73 #define __USTACK(cpu) __USTACK##cpu
74 #define __ISTACK(cpu) __ISTACK##cpu
75 #define __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
76 #define __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
77 #define __CSA(cpu) __CSA##cpu
78 #define __CSA_END(cpu) __CSA##cpu##_END
79
80 /*Wrapper macros for the tool specific definitions */
81 #if defined(IFX_USE_SW_MANAGED_INT)
82 #define __INTTAB(cpu) ((unsigned int)__INTTAB_CPU##cpu | (unsigned int)0x1FE0)
83 #else
84 #define __INTTAB(cpu) __INTTAB_CPU##cpu
85 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
86
87 #define __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
88
89 #define __SDATA1(cpu) __A0_MEM
90 #define __SDATA2(cpu) __A1_MEM
91 #define __SDATA3(cpu) __A8_MEM
92 #define __SDATA4(cpu) __A9_MEM
93
94 #endif /*IFX_CFG_USE_COMPILER_DEFAULT_LINKER*/
95
96 /******************************************************************************/
97 #ifndef IFX_INLINE
98 #define IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */
99 #endif
100
101 #define IFX_PACKED __attribute__ ((packed))
102
103 #define COMPILER_NAME "GNUC"
104 #define COMPILER_VERSION __VERSION__
105
106 #define COMPILER_REVISION 0
107
108 #define IFX_INTERRUPT_FAST IFX_INTERRUPT
109
110 #if defined(IFX_USE_SW_MANAGED_INT)
111
112 #ifndef IFX_INTERRUPT
113 #define IFX_INTERRUPT(isr, vectabNum, prio) void isr(void)
114 #endif
115
116 #else
117 /* *INDENT-OFF* */
118 #ifndef IFX_INTERRUPT
119 #define IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
120 #endif
121 #endif /*defined(IFX_USE_SW_MANAGED_INT)*/
122
123 #ifndef IFX_INTERRUPT_INTERNAL
124 #define IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) \
125 __asm__ (".ifndef .intr.entry.include \n"\
126 ".altmacro \n"\
127 ".macro .int_entry.2 intEntryLabel, name # define the section and inttab entry code \n"\
128 " .pushsection .\\intEntryLabel,\"ax\",@progbits \n"\
129 " __\\intEntryLabel : \n"\
130 " svlcx \n"\
131 " movh.a %a14, hi:\\name \n"\
132 " lea %a14, [%a14]lo:\\name \n"\
133 " ji %a14 \n"\
134 " .popsection \n"\
135 ".endm \n"\
136 ".macro .int_entry.1 prio,vectabNum,u,name \n"\
137 ".int_entry.2 intvec_tc\\vectabNum\\u\\prio,(name) # build the unique name \n"\
138 ".endm \n"\
139 " \n"\
140 ".macro .intr.entry name,vectabNum,prio \n"\
141 ".int_entry.1 %(prio),%(vectabNum),_,name # evaluate the priority and the cpu number \n"\
142 ".endm \n"\
143 ".intr.entry.include: \n"\
144 ".endif \n"\
145 ".intr.entry "#isr","#vectabNum","#prio );\
146 IFX_EXTERN void __attribute__ ((interrupt_handler)) isr(); \
147 void isr (void)
148 #endif /* IFX_INTERRUPT_INTERNAL */
149
150 /* *INDENT-ON* */
151
152 /******************************************************************************/
153
154 #define IFX_ALIGN(n) __attribute__ ((aligned(n)))
155
156 /******************************************************************************/
157 /*Memory qualifiers*/
158 #ifndef IFX_FAR_ABS
159 #define IFX_FAR_ABS __attribute__((fardata))
160 #endif
161
162 #ifndef IFX_NEAR_ABS
163 #define IFX_NEAR_ABS
164 #endif
165
166 #ifndef IFX_REL_A0
167 #define IFX_REL_A0
168 #endif
169
170 #ifndef IFX_REL_A1
171 #define IFX_REL_A1
172 #endif
173
174 #ifndef IFX_REL_A8
175 #define IFX_REL_A8
176 #endif
177
178 #ifndef IFX_REL_A9
179 #define IFX_REL_A9
180 #endif
181 /******************************************************************************/
182
183 #endif /* COMPILERGNUC_H */


iLLD_TC26B: CompilerTasking.c Source File

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CompilerTasking.c
Go to the documentation of this file.
1 /**
2 * \file CompilerTasking.c
3 *
4 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
5 *
6 * $Date: 2014-02-27 20:08:41 GMT$
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "Compilers.h"
43
44 #if defined(__TASKING__)
45 /*!
46 * \brief Initializes C variables
47 *
48 * This function is called in the startup. This function initialize the all variables in .data section
49 * and clears the .bss section
50 *
51 * Parameters: Nil
52 * Return: Nil
53 */
54 void Ifx_C_Init(void)
55 {
56 extern void _c_init(void);
57
58 _c_init(); /* initialize data */
59 }
60
61
62 #endif
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Compilers.h
Ifx_C_Init
void Ifx_C_Init(void)


iLLD_TC26B: CompilerTasking.h Source File

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CompilerTasking.h
Go to the documentation of this file.
1 /**
2 * \file CompilerTasking.h
3 *
4 * \version iLLD_New
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #ifndef COMPILERTASKING_H
42 #define COMPILERTASKING_H 1
43
44 /******************************************************************************/
45
46 #include <stddef.h>
47
48 /*Linker definitions which are specific to Tasking */
49 /* IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h
50 * to use the default compiler linker varaibles and startup */
51 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
52
53 #ifndef __cplusplus
54 /*Start: Common definitions ********************************************** */
55 #define IFXCOMPILER_COMMON_LINKER_SYMBOLS() \
56 __asm("\t .extern _SMALL_DATA_, _LITERAL_DATA_, _A8_DATA_, _A9_DATA_");
57
58 /*End: Common definitions ********************************************** */
59
60 /*Start: Core 0 definitions ********************************************** */
61
62 #define IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu) \
63 __asm("\t .extern __USTACK"#cpu); /**< user stack end is required as asm to be used with setreg macro */ \
64 extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
65 extern unsigned int __INTTAB_CPU##cpu[]; /**< interrupt vector table */ \
66 extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap vector table */ \
67 extern unsigned int __CSA##cpu[]; /**< context save area begin */ \
68 extern unsigned int __CSA##cpu##_END[]; /**< context save area end */
69 #endif
70
71 #define __USTACK(cpu) __USTACK##cpu
72 #define __ISTACK(cpu) __ISTACK##cpu
73 #define __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
74 #define __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
75 #define __CSA(cpu) __CSA##cpu
76 #define __CSA_END(cpu) __CSA##cpu##_END
77
78 /*Wrapper macros for the tool specific definitions */
79 #if defined(IFX_USE_SW_MANAGED_INT)
80 #define __INTTAB(cpu) ((unsigned int)__INTTAB_CPU##cpu | (unsigned int)0x1FE0)
81 #else
82 #define __INTTAB(cpu) __INTTAB_CPU##cpu
83 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
84
85 #define __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
86
87 #define __SDATA1(cpu) _SMALL_DATA_
88 #define __SDATA2(cpu) _LITERAL_DATA_
89 #define __SDATA3(cpu) _A8_DATA_
90 #define __SDATA4(cpu) _A9_DATA_
91
92 #endif /*IFX_CFG_USE_COMPILER_DEFAULT_LINKER*/
93
94 /******************************************************************************/
95 #ifdef __cplusplus
96 #define IFX_INLINE static inline
97 #else
98 #define IFX_INLINE static inline
99 #endif
100
101 /* FXIME check how to pack structure members */
102 #define IFX_PACKED
103
104 #define COMPILER_NAME "TASKING"
105 #define COMPILER_VERSION __VERSION__
106
107 /* Note that __REVISION__ is only available for tasking compiler! */
108 #define COMPILER_REVISION __REVISION__
109
110 /******************************************************************************/
111
112 #if defined(IFX_USE_SW_MANAGED_INT)
113
114 #ifndef IFX_INTERRUPT
115 #define IFX_INTERRUPT(isr, vectabNum, prio) void isr(void)
116 #endif
117
118 #else
119 /* *INDENT-OFF* */
120 #ifndef IFX_INTERRUPT
121 #define IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
122 #endif
123 #define IFX_INTERRUPT_FAST(isr, vectabNum, prio) void __interrupt_fast(prio) __vector_table(vectabNum) isr(void)
124
125 #endif /*defined(IFX_USE_SW_MANAGED_INT)*/
126
127 #define IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) void __interrupt(prio) __vector_table(vectabNum) isr(void)
128
129 /* *INDENT-ON* */
130
131 /******************************************************************************/
132
133 #define IFX_ALIGN(n) __attribute__ ((__align(n)))
134
135 /******************************************************************************/
136 /*Memory qualifiers*/
137 #ifndef IFX_FAR_ABS
138 #define IFX_FAR_ABS __far
139 #endif
140
141 #ifndef IFX_NEAR_ABS
142 #define IFX_NEAR_ABS __near
143 #endif
144
145 #ifndef IFX_REL_A0
146 #define IFX_REL_A0 __a0
147 #endif
148
149 #ifndef IFX_REL_A1
150 #define IFX_REL_A1 __a1
151 #endif
152
153 #ifndef IFX_REL_A8
154 #define IFX_REL_A8 __a8
155 #endif
156
157 #ifndef IFX_REL_A9
158 #define IFX_REL_A9 __a9
159 #endif
160 /******************************************************************************/
161
162 #endif /* COMPILERTASKING_H */


iLLD_TC26B: Compilers.h Source File

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  • Compilers
Compilers.h
Go to the documentation of this file.
1 /**
2 * \file Compilers.h
3 *
4 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
5 *
6 * $Date: 2014-04-07 12:13:19 GMT$
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40
41 #ifndef COMPILERS_H
42 #define COMPILERS_H 1
43
44 /******************************************************************************/
45
46 #include "Ifx_Cfg.h"
47
48 /*this file shall not be modified by the user, IFX_XXXX defines shall be defined in Ifx_Cfg.h */
49 #ifndef IFX_STATIC
50 #define IFX_STATIC static
51 #endif
52
53 #ifndef IFX_CONST
54 #define IFX_CONST const
55 #endif
56 #ifndef CONST_CFG
57 #define CONST_CFG const /* configuration constants are stored in ROM */
58 #endif
59
60 #ifdef __cplusplus
61 #define IFX_EXTERN extern "C"
62 #else
63 #define IFX_EXTERN extern
64 #endif
65
66 #ifndef NULL_PTR
67 #ifdef __cplusplus
68 #define NULL_PTR (0)
69 #else /*#ifdef __cplusplus */
70 #define NULL_PTR ((void *)0)
71 #endif /*#ifdef __cplusplus */
72 #endif /*#ifndef NULL_PTR */
73
74 #ifndef CFG_LONG_SIZE_T
75 #define CFG_LONG_SIZE_T (0)
76 #endif
77
78 #if defined(__DCC__)
79 #include "CompilerDcc.h"
80
81 #elif defined(__HIGHTEC__)
82 #include "CompilerGnuc.h"
83
84 #elif defined(__TASKING__)
85 #include "CompilerTasking.h"
86
87 #elif defined(__ghs__)
88 #include "CompilerGhs.h"
89
90 #elif defined(__MSVC__)
91 #include "CompilerMsvc.h"
92
93 #else
94
95 /** \addtogroup IfxLld_Cpu_Std_Interrupt
96 * \{ */
97 /** \brief Macro to define Interrupt Service Routine.
98 * This macro makes following definitions:\n
99 * 1) Define linker section as .intvec_tc<vector number>_<interrupt priority>.\n
100 * 2) define compiler specific attribute for the interrupt functions.\n
101 * 3) define the Interrupt service routine as Isr function.\n
102 * To get details about usage of this macro, refer \ref IfxLld_Cpu_Irq_Usage
103 *
104 * \param isr Name of the Isr function.
105 * \param vectabNum Vector table number.
106 * \param prio Interrupt priority. Refer Usage of Interrupt Macro for more details.
107 */
108 #define IFX_INTERRUPT(isr, vectabNum, prio)
109
110 /** \} */
111 #error "Compiler unsupported"
112 #endif
113
114 #if defined(__HIGHTEC__)
115 #define BEGIN_DATA_SECTION(sec) DATA_SECTION(section #sec aw 4)
116 #define DATA_SECTION(sec) _Pragma(#sec)
117 #define END_DATA_SECTION DATA_SECTION(section)
118 #elif defined(__TASKING__)
119 #define BEGIN_DATA_SECTION(sec) DATA_SECTION(section farbss #sec)
120 #define DATA_SECTION(sec) _Pragma(#sec)
121 #define END_DATA_SECTION DATA_SECTION(section farbss align restore) \
122 DATA_SECTION(section farbss)
123 #elif defined(__DCC__)
124 #define BEGIN_DATA_SECTION(sec) DATA_SECTION(section #sec WX)
125 #define DATA_SECTION(sec) _Pragma(#sec)
126 #define END_DATA_SECTION DATA_SECTION(section DATA X)
127 #elif defined(__ghs__)
128 #define BEGIN_DATA_SECTION(sec) DATA_SECTION(section #sec WX)
129 #define DATA_SECTION(sec) _Pragma(#sec)
130 #define END_DATA_SECTION DATA_SECTION(section DATA X)
131 #else
132 #error "Please specify compiler."
133 #endif
134
135 /* Functions prototypes */
136 /******************************************************************************/
137 void Ifx_C_Init(void);
138 /******************************************************************************/
139
140
141 #endif /* COMPILERS_H */
CompilerTasking.h
CompilerGhs.h
CompilerDcc.h
CompilerGnuc.h
Ifx_C_Init
void Ifx_C_Init(void)


iLLD_TC26B: Icu.h Source File

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Icu.h
Go to the documentation of this file.
1 /**
2 * \file Icu.h
3 * \brief ICU interface
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:18 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_if_icu ICU interface
41 * \ingroup library_srvsw_if
42 *
43 */
44
45 #ifndef ICU_H_
46 #define ICU_H_ 1
47
48 #include "Cpu/Std/Ifx_Types.h"
49
50 typedef struct Icu_s Icu;
51 typedef void (*Icu_StartCapture)(Icu *handle);
52 typedef void (*Icu_StopCapture)(Icu *handle);
53 typedef void (*Icu_GetTimeStamp)(Icu *handle);
54
55 typedef struct
56 {
57 Icu_StartCapture startCapture;
58 Icu_StopCapture stopCapture;
59 Icu_GetTimeStamp getTimeStamp;
60 } Icu_Functions;
61
62 /** \brief Structure of the Icu interface */
63 struct Icu_s
64 {
65 float32 frequency; /**< \brief dummy member to avoid error */
66 #if IFX_CFG_USE_STANDARD_INTERFACE
67 Icu_Functions functions; /**< \brief Actual timer period */
68 #endif
69 };
70
71 /** \brief Configuration structure of the Icu interface */
72 typedef struct
73 {
74 float32 frequency; /**< \brief dummy member to avoid error */
75 // IfxCcu6_Timer *timer;
76 } Icu_Config;
77
78 #if IFX_CFG_USE_STANDARD_INTERFACE
79 IFX_INLINE void Icu_startCapture(Icu *handle) {handle->functions.startCapture(handle); }
80 IFX_INLINE void Icu_stopCapture(Icu *handle) {handle->functions.stopCapture(handle); }
81 IFX_INLINE void Icu_getTimeStamp(Icu *handle) {handle->functions.getTimeStamp(handle); }
82 #endif
83
84 #endif /* ICU_H_ */
Icu_Config
Configuration structure of the Icu interface.
Definition: Icu.h:72
Icu_Functions::stopCapture
Icu_StopCapture stopCapture
Definition: Icu.h:58
float32
float float32
Definition: Platform_Types.h:170
Icu_Functions
Definition: Icu.h:55
Icu_StartCapture
void(* Icu_StartCapture)(Icu *handle)
Definition: Icu.h:51
Icu_s::frequency
float32 frequency
dummy member to avoid error
Definition: Icu.h:65
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Icu_Functions::startCapture
Icu_StartCapture startCapture
Definition: Icu.h:57
Icu_StopCapture
void(* Icu_StopCapture)(Icu *handle)
Definition: Icu.h:52
Icu_Functions::getTimeStamp
Icu_GetTimeStamp getTimeStamp
Definition: Icu.h:59
Icu_s
Structure of the Icu interface.
Definition: Icu.h:63
Icu_GetTimeStamp
void(* Icu_GetTimeStamp)(Icu *handle)
Definition: Icu.h:53


iLLD_TC26B: Ifx_AngleTrkF32.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_AngleTrkF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_AngleTrkF32.c
3 * \brief Angle-tracking observer for sin/cos analog position sensor
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 //________________________________________________________________________________________
44 // INCLUDES
45
46 #include "Ifx_AngleTrkF32.h"
47 #include <math.h>
48 #include "string.h"
49 #include "Ifx_LutAtan2F32.h"
50
51 //________________________________________________________________________________________
52 // LOCAL DEFINITIONS
53
54 #define IFX_ANGLETRKF32_ATAN2F Ifx_LutAtan2F32_float32
55
56 //________________________________________________________________________________________
57 // LOCAL FUNCTION PROTOTYPES
58
59 void Ifx_AngleTrkF32_setUserSampling(Ifx_AngleTrkF32 *aObsv, float32 Ts);
60
61 //________________________________________________________________________________________
62 // GLOBAL VARIABLES
63
64 //________________________________________________________________________________________
65 // LOCAL VARIABLES
66
67 //________________________________________________________________________________________
68 // LOCAL FUNCTION IMPLEMENTATIONS
69
70 IFX_INLINE float32 Ifx_AngleTrkF32_bound(float32 angle, float32 periodPerRotation)
71 {
72 IFX_UNUSED_PARAMETER(periodPerRotation);
73 float32 fullPeriod = 2 * IFX_PI;
74
75 if (angle >= (fullPeriod / 2))
76 {
77 angle = angle - fullPeriod;
78 }
79 else if (angle < (-fullPeriod / 2))
80 {
81 angle = angle + fullPeriod;
82 }
83 else
84 {}
85
86 return angle;
87 }
88
89
90 IFX_INLINE float32 Ifx_AngleTrkF32_boundInput(float32 input)
91 {
92 return Ifx_AngleTrkF32_bound(input, 1);
93 }
94
95
96 float32 round_f(float32 val)
97 {
98 /*lint -e632 -e633 -e524*/
99 sint32 val_i = (sint32)val;
100
101 /*lint +e632 +e633 +e524*/
102 if ((val - (float32)val_i) > 0.5)
103 {
104 val = (float32)(val_i + 1);
105 }
106 else
107 {
108 val = (float32)val_i;
109 }
110
111 return val;
112 }
113
114
115 //________________________________________________________________________________________
116 // PUBLIC FUNCTION IMPLEMENTATIONS
117 #define ATO_T (15e-3f)
118 #define ATO_K (39.05f)
119 #define ATO_PSI (1.5f * IFX_PI)
120
121 void Ifx_AngleTrkF32_setControlGains(Ifx_AngleTrkF32_CfgData *cfgData, float32 K, float32 T, float32 psi)
122 {
123 cfgData->kp = ((2 * K) + (psi * psi) + 1) / (T * T);
124 cfgData->ki = K * ((psi * psi) + 1) / (T * T * T);
125 cfgData->kd = (K + 2) / T;
126 }
127
128
129 /** \brief Fill config with default values */
130 void Ifx_AngleTrkF32_initConfig(Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
131 {
132 Ifx_AngleTrkF32_CfgData cfgData;
133 Ifx_AngleTrkF32_setControlGains(&cfgData, ATO_K, ATO_T, ATO_PSI);
134 config->kp = cfgData.kp;
135 config->ki = cfgData.ki;
136 config->kd = cfgData.kd;
137 config->sinIn = sinIn;
138 config->cosIn = cosIn;
139 config->errorThreshold = 5.0f / 180 * IFX_PI;
140 config->sqrAmplMax = (sint32)((1.01f * 1.01f) * 2048);
141 config->sqrAmplMin = (sint32)((0.99f * 0.99f) * 2048);
142 config->speedLpfFc = 100;
143 config->periodPerRotation = 1;
144 config->reversed = FALSE;
145 config->offset = 0;
146 config->resolution = (1UL << 12);/** \brief 12-bit default resolution */
147 }
148
149
150 void Ifx_AngleTrkF32_setUserSampling(Ifx_AngleTrkF32 *aObsv, float32 Ts)
151 {
152 aObsv->base.Ts = Ts;
153 aObsv->halfTs = aObsv->base.Ts / 2.0F;
154 }
155
156
157 /** \brief Initialize the Angle Tracking object
158 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
159 * \param config Pointer to the configuration data
160 * \param Ts sampling period in seconds
161 */
162 void Ifx_AngleTrkF32_init(Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
163 {
164 aObsv->base.offset = config->offset;
165 aObsv->base.resolution = config->resolution;
166 aObsv->base.reversed = config->reversed;
167 aObsv->base.Ts = Ts;
168 aObsv->base.rawPosition = 0;
169 aObsv->base.direction = IfxStdIf_Pos_Dir_unknown;
170 aObsv->base.turn = 0;
171 aObsv->base.status.status = 0;
172 aObsv->base.periodPerRotation = config->periodPerRotation;
173 aObsv->base.positionConst = 1.0 / (float32)aObsv->base.resolution * 2.0 * IFX_PI;
174
175 aObsv->cfgData.kd = config->kd;
176 aObsv->cfgData.ki = config->ki;
177 aObsv->cfgData.kp = config->kp;
178 aObsv->cfgData.errorThreshold = config->errorThreshold;
179 aObsv->cfgData.sqrAmplMax = config->sqrAmplMax;
180 aObsv->cfgData.sqrAmplMin = config->sqrAmplMin;
181 aObsv->sinIn = config->sinIn;
182 aObsv->cosIn = config->cosIn;
183
184 if (!__neqf(config->kp, 0) && !__neqf(config->ki, 0) && !__neqf(config->kp, 0))
185 { /* all gains are zero, use default */
186 /* FIXME might not be requied as set by Ifx_AngleTrkF32_initConfig() */
187 Ifx_AngleTrkF32_setControlGains(&aObsv->cfgData, ATO_K, ATO_T, ATO_PSI);
188 }
189
190 Ifx_AngleTrkF32_setUserSampling(aObsv, Ts);
191 aObsv->angleErr = 0.0F;
192 aObsv->angleEst = 0.0F;
193 aObsv->accelEst = 0.0F;
194 aObsv->speedEstA = 0.0F;
195 aObsv->speedEstB = 0.0F;
196 aObsv->angleRef = 0.0F;
197 {
198 #if IFX_CFG_ANGLETRKF32_SPEED_FILTER
199 Ifx_LowPassPt1F32_Config lpfConfig;
200 lpfConfig.gain = 1.0F;
201 lpfConfig.cutOffFrequency = (2 * IFX_PI * config->speedLpfFc);
202 lpfConfig.samplingTime = Ts;
203 Ifx_LowPassPt1F32_init(&aObsv->speedLpf, &lpfConfig);
204 #endif
205 }
206 }
207
208
209 /** \brief Step function of Ifx_AngleTrkF32 should be called at every sampling period provided
210 * during initialisation (call to Ifx_AngleTrkF32_init()).
211 *
212 * \note This function is automatically called by Ifx_AngleTrkF32_update()
213 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
214 * \param sinIn sine input signal. The offset shall be zero.
215 * \param cosIn cosine input signal. The offset shall be zero.
216 * \param phase phase of input signal.
217 * \note This function returns the angular position in radians
218 * \note The amplitude of both sinIn and cosIn signal shall be the same.
219 */
220 float32 Ifx_AngleTrkF32_step(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
221 {
222 float32 angleRef, angleEst, dAccel, dSpeed, dAngle;
223
224 if (aObsv->base.reversed != FALSE)
225 {
226 angleRef = IFX_ANGLETRKF32_ATAN2F((float32)cosIn, (float32)sinIn);
227 }
228 else
229 {
230 angleRef = IFX_ANGLETRKF32_ATAN2F((float32)sinIn, (float32)cosIn);
231 }
232
233 aObsv->angleAtan = angleRef;
234 angleRef = angleRef + phase;
235
236 aObsv->angleRef = angleRef;
237
238 // Acceleration, zero-order-hold integrator:
239 dAccel = aObsv->cfgData.ki * aObsv->angleErr;
240 aObsv->accelEst = aObsv->accelEst + (dAccel * aObsv->base.Ts);
241
242 // Speed, zero-order-hold integrator:
243 dSpeed = ((aObsv->cfgData.kp * aObsv->angleErr) + aObsv->accelEst);
244 aObsv->speedEstA = aObsv->speedEstA + (dSpeed * aObsv->base.Ts);
245
246 // Angle, first-order-hold integrator:
247 dAngle = ((aObsv->cfgData.kd * aObsv->angleErr) + aObsv->speedEstA);
248 angleEst = aObsv->angleEst + ((dAngle + aObsv->speedEstB) * aObsv->halfTs);
249 aObsv->speedEstB = dAngle;
250
251 aObsv->angleEst = Ifx_AngleTrkF32_boundInput(angleEst);
252
253 // Error, is calculated here to compensate one period delay
254 aObsv->angleErr = Ifx_AngleTrkF32_boundInput(aObsv->angleRef - aObsv->angleEst);
255
256 aObsv->base.direction = aObsv->speedEstB > 0 ? IfxStdIf_Pos_Dir_forward : IfxStdIf_Pos_Dir_backward;
257
258 #if IFX_CFG_ANGLETRKF32_SPEED_FILTER
259 // Filter speed:
260 Ifx_LowPassPt1F32_do(&aObsv->speedLpf, aObsv->speedEstB);
261 #endif
262
263 return aObsv->angleEst;
264 }
265
266
267 /** \brief Set the position offset (in ticks)
268 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
269 * \param offset Position offset in ticks
270 */
271 void Ifx_AngleTrkF32_setOffset(Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
272 {
273 Ifx_AngleTrkF32_PosIf *base = &aObsv->base;
274 base->offset = offset;
275 }
276
277
278 /** \brief Update the status flags.
279 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
280 * \param sinIn Sinus value
281 * \param cosIn Cosinus value
282 * \note This function is automatically called by Ifx_AngleTrkF32_update()
283 */
284 void Ifx_AngleTrkF32_updateStatus(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
285 {
286 Ifx_AngleTrkF32_PosIf *base = &aObsv->base;
287 sint32 sqrAmpl = ((sint32)sinIn * (sint32)sinIn) + ((sint32)cosIn * (sint32)cosIn);
288 base->status.B.signalLoss = (sqrAmpl < aObsv->cfgData.sqrAmplMin);
289 base->status.B.signalDegradation = (sqrAmpl > aObsv->cfgData.sqrAmplMax);
290 base->status.B.trackingLoss = __absf(aObsv->angleErr) > aObsv->cfgData.errorThreshold;
291 }
292
293
294 /** \brief Update the object directly from its analog input
295 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
296 */
297 void Ifx_AngleTrkF32_update(Ifx_AngleTrkF32 *aObsv)
298 {
299 Ifx_AngleTrkF32_PosIf *base = &aObsv->base;
300 float32 angleEst = Ifx_AngleTrkF32_step(aObsv, *aObsv->sinIn, *aObsv->cosIn, 0);
301
302 IfxStdIf_Pos_RawAngle newPosition = (IfxStdIf_Pos_RawAngle)(angleEst * (aObsv->base.resolution / 2) / IFX_PI);
303 newPosition = newPosition & (aObsv->base.resolution - 1);
304 base->rawPosition = newPosition;
305
306 Ifx_AngleTrkF32_updateStatus(aObsv, *aObsv->sinIn, *aObsv->cosIn);
307 }
308
309
310 /** \brief Returns the actual position
311 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
312 * \note This function returns the angular position in ticks [0 .. Ifx_AngleTrkF32.base.resolution-1] (represents 0..360 degree)
313 */
314 IfxStdIf_Pos_RawAngle Ifx_AngleTrkF32_getRawPosition(Ifx_AngleTrkF32 *aObsv)
315 {
316 Ifx_AngleTrkF32_PosIf *base = &aObsv->base;
317 return base->rawPosition;
318 }
319
320
321 /** \brief Returns the Speed
322 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
323 */
324 float32 Ifx_AngleTrkF32_getSpeed(Ifx_AngleTrkF32 *aObsv)
325 {
326 #if !IFX_CFG_ANGLETRKF32_FILTERED_SPEED
327 return aObsv->speedEstB; /* note: using speedEstB has better dynamic */
328 #else
329 return aObsv->speedLpf.out; /* note: using filtered speed has less ripples */
330 #endif
331 }
332
333
334 /*>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
335 float32 Ifx_AngleTrkF32_getAbsolutePosition(Ifx_AngleTrkF32 *driver)
336 {
337 return ((float32)driver->base.turn + (float32)driver->base.rawPosition / (float32)driver->base.resolution) * 2.0 * IFX_PI;
338 }
339
340
341 IfxStdIf_Pos_Dir Ifx_AngleTrkF32_getDirection(Ifx_AngleTrkF32 *driver)
342 {
343 return driver->base.direction;
344 }
345
346
347 IfxStdIf_Pos_Status Ifx_AngleTrkF32_getFault(Ifx_AngleTrkF32 *driver)
348 {
349 return driver->base.status;
350 }
351
352
353 sint32 Ifx_AngleTrkF32_getOffset(Ifx_AngleTrkF32 *driver)
354 {
355 return driver->base.offset;
356 }
357
358
359 uint16 Ifx_AngleTrkF32_getPeriodPerRotation(Ifx_AngleTrkF32 *driver)
360 {
361 return driver->base.periodPerRotation;
362 }
363
364
365 float32 Ifx_AngleTrkF32_getPosition(Ifx_AngleTrkF32 *driver)
366 {
367 return (float32)driver->base.rawPosition * driver->base.positionConst;
368 }
369
370
371 float32 Ifx_AngleTrkF32_getRefreshPeriod(Ifx_AngleTrkF32 *driver)
372 {
373 return driver->base.Ts;
374 }
375
376
377 sint32 Ifx_AngleTrkF32_getResolution(Ifx_AngleTrkF32 *driver)
378 {
379 return driver->base.resolution;
380 }
381
382
383 IfxStdIf_Pos_SensorType Ifx_AngleTrkF32_getSensorType(Ifx_AngleTrkF32 *driver)
384 {
385 IFX_UNUSED_PARAMETER(driver);
386 return IfxStdIf_Pos_SensorType_angletrk;
387 }
388
389
390 sint32 Ifx_AngleTrkF32_getTurn(Ifx_AngleTrkF32 *driver)
391 {
392 return driver->base.turn;
393 }
394
395
396 void Ifx_AngleTrkF32_resetFaults(Ifx_AngleTrkF32 *driver)
397 {
398 driver->base.status.status = 0;
399 }
400
401
402 void Ifx_AngleTrkF32_setRefreshPeriod(Ifx_AngleTrkF32 *driver, float32 updatePeriod)
403 {
404 driver->base.Ts = updatePeriod;
405 }
406
407
408 void Ifx_AngleTrkF32_reset(Ifx_AngleTrkF32 *driver)
409 {
410 driver->base.rawPosition = 0;
411 driver->base.direction = IfxStdIf_Pos_Dir_unknown;
412 driver->base.turn = 0;
413 driver->angleErr = 0.0F;
414 driver->angleEst = 0.0F;
415 driver->accelEst = 0.0F;
416 driver->speedEstA = 0.0F;
417 driver->speedEstB = 0.0F;
418 driver->angleRef = 0.0F;
419 #if IFX_CFG_ANGLETRKF32_SPEED_FILTER
420 Ifx_LowPassPt1F32_reset(&driver->speedLpf);
421 #endif
422
423 driver->base.status.status = 0;
424 }
425
426
427 boolean Ifx_AngleTrkF32_stdIfPosInit(IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver)
428 {
429 /* Ensure the stdif is reset to zeros */
430 memset(stdif, 0, sizeof(IfxStdIf_Pos));
431
432 /* Set the driver */
433 stdif->driver = driver;
434
435 /* *INDENT-OFF* Note: this file was indented manually by the author. */
436 /* Set the API link */
437 stdif->onZeroIrq =(IfxStdIf_Pos_OnZeroIrq )NULL_PTR;
438 stdif->getAbsolutePosition=(IfxStdIf_Pos_GetAbsolutePosition )&Ifx_AngleTrkF32_getAbsolutePosition;
439 stdif->getDirection =(IfxStdIf_Pos_GetDirection )&Ifx_AngleTrkF32_getDirection;
440 stdif->getFault =(IfxStdIf_Pos_GetFault )&Ifx_AngleTrkF32_getFault;
441 stdif->getOffset =(IfxStdIf_Pos_GetOffset )&Ifx_AngleTrkF32_getOffset;
442 stdif->getPeriodPerRotation =(IfxStdIf_Pos_GetPeriodPerRotation )&Ifx_AngleTrkF32_getPeriodPerRotation;
443 stdif->getPosition =(IfxStdIf_Pos_GetPosition )&Ifx_AngleTrkF32_getPosition;
444 stdif->getRawPosition =(IfxStdIf_Pos_GetRawPosition )&Ifx_AngleTrkF32_getRawPosition;
445 stdif->getRefreshPeriod =(IfxStdIf_Pos_GetRefreshPeriod )&Ifx_AngleTrkF32_getRefreshPeriod;
446 stdif->getResolution =(IfxStdIf_Pos_GetResolution )&Ifx_AngleTrkF32_getResolution;
447 stdif->getSensorType =(IfxStdIf_Pos_GetSensorType )&Ifx_AngleTrkF32_getSensorType;
448 stdif->reset =(IfxStdIf_Pos_Reset )&Ifx_AngleTrkF32_reset;
449 stdif->resetFaults =(IfxStdIf_Pos_ResetFaults )&Ifx_AngleTrkF32_resetFaults;
450 stdif->getSpeed =(IfxStdIf_Pos_GetSpeed )&Ifx_AngleTrkF32_getSpeed;
451 stdif->update =(IfxStdIf_Pos_Update )&Ifx_AngleTrkF32_update;
452 stdif->setPosition =(IfxStdIf_Pos_SetPosition )NULL_PTR;
453 stdif->setRawPosition =(IfxStdIf_Pos_SetRawPosition )NULL_PTR;
454 stdif->setSpeed =(IfxStdIf_Pos_SetSpeed )NULL_PTR;
455 stdif->setOffset =(IfxStdIf_Pos_SetOffset )&Ifx_AngleTrkF32_setOffset;
456 stdif->setRefreshPeriod =(IfxStdIf_Pos_SetRefreshPeriod )&Ifx_AngleTrkF32_setRefreshPeriod;
457 stdif->getTurn =(IfxStdIf_Pos_GetTurn )&Ifx_AngleTrkF32_getTurn;
458 /* *INDENT-ON* */
459
460 return TRUE;
461 }
Ifx_AngleTrkF32_resetFaults
void Ifx_AngleTrkF32_resetFaults(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:396
Ifx_AngleTrkF32_Config::periodPerRotation
uint16 periodPerRotation
Number of electrical periods per mechanical rotation.
Definition: Ifx_AngleTrkF32.h:82
Ifx_AngleTrkF32_update
void Ifx_AngleTrkF32_update(Ifx_AngleTrkF32 *aObsv)
Update the object directly from its analog input.
Definition: Ifx_AngleTrkF32.c:297
Ifx_AngleTrkF32_Config::offset
IfxStdIf_Pos_RawAngle offset
Offset in ticks. [0 .. (Ifx_AngleTrkF32_Config::resolution - 1)].
Definition: Ifx_AngleTrkF32.h:85
Ifx_AngleTrkF32_getRawPosition
IfxStdIf_Pos_RawAngle Ifx_AngleTrkF32_getRawPosition(Ifx_AngleTrkF32 *aObsv)
Returns the actual position.
Definition: Ifx_AngleTrkF32.c:314
Ifx_AngleTrkF32_getAbsolutePosition
float32 Ifx_AngleTrkF32_getAbsolutePosition(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:335
IfxStdIf_Pos_GetRefreshPeriod
float32(* IfxStdIf_Pos_GetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf)
Get the update period.
Definition: IfxStdIf_Pos.h:187
round_f
float32 round_f(float32 val)
Definition: Ifx_AngleTrkF32.c:96
Ifx_AngleTrkF32_initConfig
void Ifx_AngleTrkF32_initConfig(Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
Fill config with default values.
Definition: Ifx_AngleTrkF32.c:130
__neqf
#define __neqf
Definition: IfxCpu_IntrinsicsDcc.h:1665
IfxStdIf_Pos_::setRefreshPeriod
IfxStdIf_Pos_SetRefreshPeriod setRefreshPeriod
Definition: IfxStdIf_Pos.h:307
Ifx_LowPassPt1F32::out
float32 out
last output
Definition: Ifx_LowPassPt1F32.h:65
ATO_K
#define ATO_K
Definition: Ifx_AngleTrkF32.c:118
IfxStdIf_Pos_GetOffset
sint32(* IfxStdIf_Pos_GetOffset)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position sensor offset.
Definition: IfxStdIf_Pos.h:139
Ifx_LowPassPt1F32_do
float32 Ifx_LowPassPt1F32_do(Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter.
Definition: Ifx_LowPassPt1F32.c:73
Ifx_AngleTrkF32::angleAtan
float32 angleAtan
Definition: Ifx_AngleTrkF32.h:123
Ifx_AngleTrkF32::base
Ifx_AngleTrkF32_PosIf base
Definition: Ifx_AngleTrkF32.h:118
IfxStdIf_Pos_SetRawPosition
void(* IfxStdIf_Pos_SetRawPosition)(IfxStdIf_InterfaceDriver stdIf, sint32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:265
IfxStdIf_Pos_SensorType_angletrk
Definition: IfxStdIf_Pos.h:86
IfxStdIf_Pos_::setOffset
IfxStdIf_Pos_SetOffset setOffset
Definition: IfxStdIf_Pos.h:303
IfxStdIf_Pos_::setPosition
IfxStdIf_Pos_SetPosition setPosition
Definition: IfxStdIf_Pos.h:304
IfxStdIf_Pos_GetSpeed
float32(* IfxStdIf_Pos_GetSpeed)(IfxStdIf_InterfaceDriver stdIf)
Return the speed.
Definition: IfxStdIf_Pos.h:205
Ifx_AngleTrkF32_CfgData::kd
float32 kd
Derivative gain.
Definition: Ifx_AngleTrkF32.h:94
Ifx_AngleTrkF32_getResolution
sint32 Ifx_AngleTrkF32_getResolution(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:377
Ifx_AngleTrkF32::angleEst
float32 angleEst
Definition: Ifx_AngleTrkF32.h:125
IfxStdIf_Pos_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Pos.h:285
IfxStdIf_Pos_Dir_unknown
Unknown direction.
Definition: IfxStdIf_Pos.h:96
Ifx_AngleTrkF32_CfgData::ki
float32 ki
Integrator gain.
Definition: Ifx_AngleTrkF32.h:93
Ifx_AngleTrkF32_PosIf::rawPosition
IfxStdIf_Pos_RawAngle rawPosition
raw position in ticks.
Definition: Ifx_AngleTrkF32.h:102
Ifx_AngleTrkF32_Config::sqrAmplMax
sint32 sqrAmplMax
Maximum value for square of signal amplitudes.
Definition: Ifx_AngleTrkF32.h:80
float32
float float32
Definition: Platform_Types.h:170
Ifx_AngleTrkF32::angleErr
float32 angleErr
Definition: Ifx_AngleTrkF32.h:129
IfxStdIf_Pos_::getRawPosition
IfxStdIf_Pos_GetRawPosition getRawPosition
Definition: IfxStdIf_Pos.h:292
IfxStdIf_Pos_::getPeriodPerRotation
IfxStdIf_Pos_GetPeriodPerRotation getPeriodPerRotation
Definition: IfxStdIf_Pos.h:293
IfxStdIf_Pos_Status::status
uint32 status
Global status access.
Definition: IfxStdIf_Pos.h:102
Ifx_AngleTrkF32_Config::resolution
sint32 resolution
Sensor resolution.
Definition: Ifx_AngleTrkF32.h:84
Ifx_LowPassPt1F32_reset
IFX_INLINE void Ifx_LowPassPt1F32_reset(Ifx_LowPassPt1F32 *filter)
Reset the internal filter variable.
Definition: Ifx_LowPassPt1F32.h:90
IfxStdIf_Pos_RawAngle
sint32 IfxStdIf_Pos_RawAngle
Definition: IfxStdIf_Pos.h:113
IfxStdIf_Pos_::getSensorType
IfxStdIf_Pos_GetSensorType getSensorType
Definition: IfxStdIf_Pos.h:296
Ifx_AngleTrkF32_boundInput
IFX_INLINE float32 Ifx_AngleTrkF32_boundInput(float32 input)
Definition: Ifx_AngleTrkF32.c:90
Ifx_AngleTrkF32_init
void Ifx_AngleTrkF32_init(Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
Initialize the Angle Tracking object.
Definition: Ifx_AngleTrkF32.c:162
IfxStdIf_Pos_::getDirection
IfxStdIf_Pos_GetDirection getDirection
Definition: IfxStdIf_Pos.h:290
Ifx_AngleTrkF32_getFault
IfxStdIf_Pos_Status Ifx_AngleTrkF32_getFault(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:347
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxStdIf_Pos_OnZeroIrq
void(* IfxStdIf_Pos_OnZeroIrq)(IfxStdIf_InterfaceDriver stdIf)
Handles the zero interrupt.
Definition: IfxStdIf_Pos.h:132
Ifx_AngleTrkF32_step
float32 Ifx_AngleTrkF32_step(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisa...
Definition: Ifx_AngleTrkF32.c:220
Ifx_AngleTrkF32_getSensorType
IfxStdIf_Pos_SensorType Ifx_AngleTrkF32_getSensorType(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:383
IfxStdIf_Pos_::setRawPosition
IfxStdIf_Pos_SetRawPosition setRawPosition
Definition: IfxStdIf_Pos.h:305
FALSE
#define FALSE
Definition: Platform_Types.h:93
Ifx_AngleTrkF32::speedEstB
float32 speedEstB
Definition: Ifx_AngleTrkF32.h:127
Ifx_AngleTrkF32_CfgData::kp
float32 kp
Proportional gain.
Definition: Ifx_AngleTrkF32.h:92
IfxStdIf_Pos_::getRefreshPeriod
IfxStdIf_Pos_GetRefreshPeriod getRefreshPeriod
Definition: IfxStdIf_Pos.h:294
IfxStdIf_Pos_Status::B
struct IfxStdIf_Pos_Status::@0 B
Bitfielf status access.
Ifx_AngleTrkF32.h
Angle-tracking observer for sin/cos analog position sensor.
Ifx_AngleTrkF32_Config::sinIn
sint16 * sinIn
Pointer to SIN input variable.
Definition: Ifx_AngleTrkF32.h:86
Ifx_AngleTrkF32_Config::errorThreshold
float32 errorThreshold
Threshold of error value in the tracking loop.
Definition: Ifx_AngleTrkF32.h:79
Ifx_AngleTrkF32_getDirection
IfxStdIf_Pos_Dir Ifx_AngleTrkF32_getDirection(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:341
IfxStdIf_Pos_::getPosition
IfxStdIf_Pos_GetPosition getPosition
Definition: IfxStdIf_Pos.h:289
sint16
short sint16
Definition: Platform_Types.h:129
Ifx_AngleTrkF32::cfgData
Ifx_AngleTrkF32_CfgData cfgData
Definition: Ifx_AngleTrkF32.h:119
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:217
IfxStdIf_Pos_::getFault
IfxStdIf_Pos_GetFault getFault
Definition: IfxStdIf_Pos.h:291
Ifx_AngleTrkF32_bound
IFX_INLINE float32 Ifx_AngleTrkF32_bound(float32 angle, float32 periodPerRotation)
Definition: Ifx_AngleTrkF32.c:70
__absf
#define __absf
Definition: IfxCpu_IntrinsicsDcc.h:1629
IfxStdIf_Pos_GetSensorType
IfxStdIf_Pos_SensorType(* IfxStdIf_Pos_GetSensorType)(IfxStdIf_InterfaceDriver stdIf)
Get the sensor type.
Definition: IfxStdIf_Pos.h:199
Ifx_AngleTrkF32_reset
void Ifx_AngleTrkF32_reset(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:408
IfxStdIf_Pos_SetPosition
void(* IfxStdIf_Pos_SetPosition)(IfxStdIf_InterfaceDriver stdIf, float32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:259
IfxStdIf_Pos_GetRawPosition
sint32(* IfxStdIf_Pos_GetRawPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position in ticks.
Definition: IfxStdIf_Pos.h:181
Ifx_AngleTrkF32::halfTs
float32 halfTs
Definition: Ifx_AngleTrkF32.h:122
Ifx_LowPassPt1F32_init
void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration.
Definition: Ifx_LowPassPt1F32.c:55
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_AngleTrkF32_setControlGains
void Ifx_AngleTrkF32_setControlGains(Ifx_AngleTrkF32_CfgData *cfgData, float32 K, float32 T, float32 psi)
Definition: Ifx_AngleTrkF32.c:121
IfxStdIf_Pos_GetDirection
IfxStdIf_Pos_Dir(* IfxStdIf_Pos_GetDirection)(IfxStdIf_InterfaceDriver stdIf)
Return the direction.
Definition: IfxStdIf_Pos.h:158
Ifx_AngleTrkF32_getTurn
sint32 Ifx_AngleTrkF32_getTurn(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:390
Ifx_AngleTrkF32_PosIf::resolution
IfxStdIf_Pos_RawAngle resolution
resolution of this position sensor interface
Definition: Ifx_AngleTrkF32.h:110
IfxStdIf_Pos_SetRefreshPeriod
void(* IfxStdIf_Pos_SetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod)
Set the update period.
Definition: IfxStdIf_Pos.h:279
Ifx_AngleTrkF32_Config
Angle Tracking Observer configuration.
Definition: Ifx_AngleTrkF32.h:73
Ifx_AngleTrkF32_Config::speedLpfFc
float32 speedLpfFc
Cut-off frequency of speed low-pass filter.
Definition: Ifx_AngleTrkF32.h:78
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:92
IfxStdIf_Pos_GetPeriodPerRotation
uint16(* IfxStdIf_Pos_GetPeriodPerRotation)(IfxStdIf_InterfaceDriver stdIf)
Return the period per rotation setting.
Definition: IfxStdIf_Pos.h:172
IfxStdIf_Pos_Dir_backward
Backward direction. For rotating position sensor, fackward is counter-clockwise rotation.
Definition: IfxStdIf_Pos.h:95
IfxStdIf_Pos_::getResolution
IfxStdIf_Pos_GetResolution getResolution
Definition: IfxStdIf_Pos.h:295
Ifx_AngleTrkF32_setRefreshPeriod
void Ifx_AngleTrkF32_setRefreshPeriod(Ifx_AngleTrkF32 *driver, float32 updatePeriod)
Definition: Ifx_AngleTrkF32.c:402
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:283
Ifx_AngleTrkF32_Config::reversed
boolean reversed
TRUE: reversed direction, FALSE: straight direction.
Definition: Ifx_AngleTrkF32.h:83
ATO_PSI
#define ATO_PSI
Definition: Ifx_AngleTrkF32.c:119
IfxStdIf_Pos_Dir_forward
Forward direction. For rotating position sensor, forward is clockwise rotation.
Definition: IfxStdIf_Pos.h:94
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:81
Ifx_LutAtan2F32.h
Floating point signal, vector, and matrix library.
Ifx_AngleTrkF32_PosIf::turn
sint32 turn
number of mechanical turns. FIXME to be implemented
Definition: Ifx_AngleTrkF32.h:103
IfxStdIf_Pos_GetFault
IfxStdIf_Pos_Status(* IfxStdIf_Pos_GetFault)(IfxStdIf_InterfaceDriver stdIf)
Return the sensor status.
Definition: IfxStdIf_Pos.h:165
Ifx_AngleTrkF32_setUserSampling
void Ifx_AngleTrkF32_setUserSampling(Ifx_AngleTrkF32 *aObsv, float32 Ts)
Definition: Ifx_AngleTrkF32.c:150
Ifx_AngleTrkF32_stdIfPosInit
boolean Ifx_AngleTrkF32_stdIfPosInit(IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver)
Initializes the standard interface "Pos".
Definition: Ifx_AngleTrkF32.c:427
Ifx_AngleTrkF32_getRefreshPeriod
float32 Ifx_AngleTrkF32_getRefreshPeriod(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:371
Ifx_LowPassPt1F32_Config::samplingTime
float32 samplingTime
Sampling time.
Definition: Ifx_LowPassPt1F32.h:73
Ifx_AngleTrkF32::angleRef
float32 angleRef
Definition: Ifx_AngleTrkF32.h:124
Ifx_AngleTrkF32::speedLpf
Ifx_LowPassPt1F32 speedLpf
Definition: Ifx_AngleTrkF32.h:130
Ifx_AngleTrkF32_getSpeed
float32 Ifx_AngleTrkF32_getSpeed(Ifx_AngleTrkF32 *aObsv)
Returns the Speed.
Definition: Ifx_AngleTrkF32.c:324
IfxStdIf_Pos_SetSpeed
void(* IfxStdIf_Pos_SetSpeed)(IfxStdIf_InterfaceDriver stdIf, float32 speed)
Set the sensor speed (virtual sensor)
Definition: IfxStdIf_Pos.h:272
IfxStdIf_Pos_::getSpeed
IfxStdIf_Pos_GetSpeed getSpeed
Definition: IfxStdIf_Pos.h:301
IfxStdIf_Pos_SetOffset
void(* IfxStdIf_Pos_SetOffset)(IfxStdIf_InterfaceDriver stdIf, sint32 offset)
Set the sensor offset.
Definition: IfxStdIf_Pos.h:252
Ifx_AngleTrkF32
Angle Tracking Observer object.
Definition: Ifx_AngleTrkF32.h:116
IfxStdIf_Pos_Reset
void(* IfxStdIf_Pos_Reset)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver.
Definition: IfxStdIf_Pos.h:236
Ifx_AngleTrkF32_PosIf
Definition: Ifx_AngleTrkF32.h:100
Ifx_AngleTrkF32_CfgData
Definition: Ifx_AngleTrkF32.h:90
Ifx_AngleTrkF32_Config::cosIn
sint16 * cosIn
Pointer to COS input variable.
Definition: Ifx_AngleTrkF32.h:87
IfxStdIf_Pos_::getOffset
IfxStdIf_Pos_GetOffset getOffset
Definition: IfxStdIf_Pos.h:288
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_AngleTrkF32_getPeriodPerRotation
uint16 Ifx_AngleTrkF32_getPeriodPerRotation(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:359
ATO_T
#define ATO_T
Definition: Ifx_AngleTrkF32.c:117
IfxStdIf_Pos_::getAbsolutePosition
IfxStdIf_Pos_GetAbsolutePosition getAbsolutePosition
Return the absolute position.
Definition: IfxStdIf_Pos.h:287
Ifx_AngleTrkF32::accelEst
float32 accelEst
Definition: Ifx_AngleTrkF32.h:128
Ifx_AngleTrkF32_PosIf::Ts
float32 Ts
update period in seconds
Definition: Ifx_AngleTrkF32.h:111
IfxStdIf_Pos_::update
IfxStdIf_Pos_Update update
Definition: IfxStdIf_Pos.h:302
IfxStdIf_Pos_GetTurn
sint32(* IfxStdIf_Pos_GetTurn)(IfxStdIf_InterfaceDriver stdIf)
Return position in turn.
Definition: IfxStdIf_Pos.h:211
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_AngleTrkF32_PosIf::direction
IfxStdIf_Pos_Dir direction
rotation direction
Definition: Ifx_AngleTrkF32.h:104
Ifx_LowPassPt1F32_Config::cutOffFrequency
float32 cutOffFrequency
Cut off frequency.
Definition: Ifx_LowPassPt1F32.h:71
IfxStdIf_Pos_GetAbsolutePosition
float32(* IfxStdIf_Pos_GetAbsolutePosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position, inclusive turns.
Definition: IfxStdIf_Pos.h:126
Ifx_AngleTrkF32_PosIf::status
IfxStdIf_Pos_Status status
error code (0 = no error)
Definition: Ifx_AngleTrkF32.h:105
IfxStdIf_Pos_::resetFaults
IfxStdIf_Pos_ResetFaults resetFaults
Definition: IfxStdIf_Pos.h:300
IfxStdIf_Pos_Update
void(* IfxStdIf_Pos_Update)(IfxStdIf_InterfaceDriver stdIf)
Refresh the status.
Definition: IfxStdIf_Pos.h:227
IFX_ANGLETRKF32_ATAN2F
#define IFX_ANGLETRKF32_ATAN2F
Definition: Ifx_AngleTrkF32.c:54
IfxStdIf_Pos_::onZeroIrq
IfxStdIf_Pos_OnZeroIrq onZeroIrq
Definition: IfxStdIf_Pos.h:286
Ifx_AngleTrkF32_getOffset
sint32 Ifx_AngleTrkF32_getOffset(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:353
Ifx_AngleTrkF32_Config::sqrAmplMin
sint32 sqrAmplMin
Minimum value for square of signal amplitudes.
Definition: Ifx_AngleTrkF32.h:81
Ifx_AngleTrkF32_getPosition
float32 Ifx_AngleTrkF32_getPosition(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:365
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:100
Ifx_LowPassPt1F32_Config::gain
float32 gain
Gain.
Definition: Ifx_LowPassPt1F32.h:72
Ifx_LowPassPt1F32_Config
PT1 configuration.
Definition: Ifx_LowPassPt1F32.h:69
TRUE
#define TRUE
Definition: Platform_Types.h:90
Ifx_AngleTrkF32::speedEstA
float32 speedEstA
Definition: Ifx_AngleTrkF32.h:126
IfxStdIf_Pos_::getTurn
IfxStdIf_Pos_GetTurn getTurn
Definition: IfxStdIf_Pos.h:297
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxStdIf_Pos_::reset
IfxStdIf_Pos_Reset reset
Definition: IfxStdIf_Pos.h:299
IfxStdIf_Pos_GetPosition
float32(* IfxStdIf_Pos_GetPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position.
Definition: IfxStdIf_Pos.h:149
IfxStdIf_Pos_GetResolution
sint32(* IfxStdIf_Pos_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Get the resolution.
Definition: IfxStdIf_Pos.h:193
IfxStdIf_Pos_ResetFaults
void(* IfxStdIf_Pos_ResetFaults)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver fault.
Definition: IfxStdIf_Pos.h:245
IfxStdIf_Pos_::setSpeed
IfxStdIf_Pos_SetSpeed setSpeed
Definition: IfxStdIf_Pos.h:306
Ifx_AngleTrkF32_setOffset
void Ifx_AngleTrkF32_setOffset(Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
Set the position offset (in ticks)
Definition: Ifx_AngleTrkF32.c:271
Ifx_AngleTrkF32_PosIf::positionConst
float32 positionConst
constant for calculating mechanical position (in rad) from raw position
Definition: Ifx_AngleTrkF32.h:112
Ifx_AngleTrkF32_updateStatus
void Ifx_AngleTrkF32_updateStatus(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
Update the status flags.
Definition: Ifx_AngleTrkF32.c:284


iLLD_TC26B: Ifx_AngleTrkF32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_AngleTrkF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_AngleTrkF32.h
3 * \brief Angle-tracking observer for sin/cos analog position sensor
4 *
5 *
6 *
7 * \version disabled
8 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 * \defgroup library_srvsw_sysse_math_f32_angletrk Angle-Tracking Observer
43 * This driver implements \ref library_srvsw_stdif_posif using 3rd order Angle-Tracking Observer algorithm.
44 * \ingroup library_srvsw_sysse_math_f32
45 *
46 */
47
48 #ifndef IFX_ANGLETRKF32_H
49 #define IFX_ANGLETRKF32_H
50
51 //________________________________________________________________________________________
52 // INCLUDES
53
54 #include "StdIf/IfxStdIf_Pos.h"
55 #include "SysSe/Math/Ifx_LowPassPt1F32.h"
56
57 //________________________________________________________________________________________
58 // CONFIGURATION DEFINES
59
60 #ifndef IFX_CFG_ANGLETRKF32_SPEED_FILTER
61 #define IFX_CFG_ANGLETRKF32_SPEED_FILTER (1)
62 #endif
63
64 /** \brief Specify whether the speed reading is filtered by low-pass filter or not */
65 #ifndef IFX_CFG_ANGLETRKF32_FILTERED_SPEED
66 #define IFX_CFG_ANGLETRKF32_FILTERED_SPEED (1)
67 #endif
68
69 //________________________________________________________________________________________
70 // DATA STRUCTURES
71
72 /** \brief Angle Tracking Observer configuration */
73 typedef struct
74 {
75 float32 kp; /**< \brief Proportional gain */
76 float32 ki; /**< \brief Integrator gain */
77 float32 kd; /**< \brief Derivative gain */
78 float32 speedLpfFc; /**< \brief Cut-off frequency of speed low-pass filter. */
79 float32 errorThreshold; /**< \brief Threshold of error value in the tracking loop */
80 sint32 sqrAmplMax; /**< \brief Maximum value for square of signal amplitudes */
81 sint32 sqrAmplMin; /**< \brief Minimum value for square of signal amplitudes */
82 uint16 periodPerRotation; /**< \brief Number of electrical periods per mechanical rotation */
83 boolean reversed; /**< \brief TRUE: reversed direction, FALSE: straight direction */
84 sint32 resolution; /**< \brief Sensor resolution */
85 IfxStdIf_Pos_RawAngle offset; /**< \brief Offset in ticks. [0 .. (\ref Ifx_AngleTrkF32_Config.resolution - 1)] */
86 sint16 *sinIn; /**< \brief Pointer to SIN input variable */
87 sint16 *cosIn; /**< \brief Pointer to COS input variable */
88 } Ifx_AngleTrkF32_Config;
89
90 typedef struct
91 {
92 float32 kp; /**< \brief Proportional gain */
93 float32 ki; /**< \brief Integrator gain */
94 float32 kd; /**< \brief Derivative gain */
95 float32 errorThreshold; /**< \brief Threshold of error value in the tracking loop */
96 sint32 sqrAmplMax; /**< \brief Maximum value for square of signal amplitudes */
97 sint32 sqrAmplMin; /**< \brief Minimum value for square of signal amplitudes */
98 } Ifx_AngleTrkF32_CfgData;
99
100 typedef struct
101 {
102 IfxStdIf_Pos_RawAngle rawPosition; /**< \brief raw position in ticks. \note: the value already contains the offset */
103 sint32 turn; /**< \brief number of mechanical turns. FIXME to be implemented */
104 IfxStdIf_Pos_Dir direction; /**< \brief rotation direction */
105 IfxStdIf_Pos_Status status; /**< \brief error code (0 = no error) */
106 /* configuration */
107 IfxStdIf_Pos_RawAngle offset; /**< \brief raw position offset */
108 boolean reversed; /**< \brief reverse direction */
109 uint16 periodPerRotation; /**< \brief sensor 'electrical' periods per mechanical rotation */
110 IfxStdIf_Pos_RawAngle resolution; /**< \brief resolution of this position sensor interface */
111 float32 Ts; /**< \brief update period in seconds */
112 float32 positionConst; /**< \brief constant for calculating mechanical position (in rad) from raw position */
113 } Ifx_AngleTrkF32_PosIf;
114
115 /** \brief Angle Tracking Observer object */
116 typedef struct
117 {
118 Ifx_AngleTrkF32_PosIf base;
119 Ifx_AngleTrkF32_CfgData cfgData;
120 sint16 *sinIn; /**< \brief Pointer to SIN input variable */
121 sint16 *cosIn; /**< \brief Pointer to COS input variable */
122 float32 halfTs;
123 float32 angleAtan;
124 float32 angleRef;
125 float32 angleEst;
126 float32 speedEstA;
127 float32 speedEstB;
128 float32 accelEst;
129 float32 angleErr;
130 Ifx_LowPassPt1F32 speedLpf; /**< Only used if IFX_CFG_ANGLETRKF32_SPEED_FILTER is set */
131 } Ifx_AngleTrkF32;
132
133 /** \addtogroup library_srvsw_sysse_math_f32_angletrk
134 * \{ */
135
136 //________________________________________________________________________________________
137 // PUBLIC FUNCTION PROTOTYPES
138
139 /** \name Initialisation functions
140 * Example use:
141 * \code
142 * extern sint16 g_SinInput, g_CosInput;
143 * Ifx_AngleTrkF32_Config driverConfig;
144 * Ifx_AngleTrkF32 driverData;
145 * Ifx_AngleTrkF32_initConfig(&driverConfig, &g_SinInput, g_CosInput);
146 * driverConfig.errorThreshold = 5.0 / 180 * IFX_PI; // 5 degree error
147 * driverConfig.sqrAmplMax = 1.01 * 1.01;
148 * driverConfig.sqrAmplMin = 0.99 * 0.99;
149 * driverConfig.speedLpfFc = 100;
150 * driverConfig.periodPerRotation = 1;
151 * driverConfig.reversed = FALSE;
152 * driverConfig.offset = 0;
153 * Ifx_AngleTrkF32_init(&driverData, &driverConfig);
154 * \endcode
155 * Prototypes:
156 * \{ */
157 IFX_EXTERN void Ifx_AngleTrkF32_init(Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts);
158 IFX_EXTERN void Ifx_AngleTrkF32_initConfig(Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn);
159 /** \} */
160
161 /** \name Protected functions
162 * These functions are not for end-user but may be used by another driver which extends
163 * the functionality of library_srvsw_sysse_math_f32_angletrk
164 * \{ */
165 IFX_EXTERN float32 Ifx_AngleTrkF32_step(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase);
166 IFX_EXTERN void Ifx_AngleTrkF32_updateStatus(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn);
167 IFX_INLINE float32 Ifx_AngleTrkF32_getLoopSpeed(Ifx_AngleTrkF32 *aObsv);
168 /** \} */
169
170 /** \} */
171
172 /** \brief get the speed.
173 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
174 */
175 IFX_INLINE float32 Ifx_AngleTrkF32_getLoopSpeed(Ifx_AngleTrkF32 *aObsv)
176 {
177 return aObsv->speedEstB; /* note: using speedEstB has better dynamic */
178 /* return aObsv->speedLpf.out; */
179 }
180
181
182 /** \addtogroup library_srvsw_sysse_math_f32_angletrk
183 * \{ */
184
185 /******************************************************************************/
186 /*-------------------------Global Function Prototypes-------------------------*/
187 /******************************************************************************/
188
189 /** \brief \see IfxStdIf_Pos_GetAbsolutePosition
190 * \param driver driver handle
191 * \return absolute position
192 */
193 IFX_EXTERN float32 Ifx_AngleTrkF32_getAbsolutePosition(Ifx_AngleTrkF32 *driver);
194
195 /** \brief \see IfxStdIf_Pos_GetDirection
196 * \param driver driver handle
197 * \return direction
198 */
199 IFX_EXTERN IfxStdIf_Pos_Dir Ifx_AngleTrkF32_getDirection(Ifx_AngleTrkF32 *driver);
200
201 /** \brief \see IfxStdIf_Pos_GetFault
202 * \param driver driver handle
203 * \return Fault
204 */
205 IFX_EXTERN IfxStdIf_Pos_Status Ifx_AngleTrkF32_getFault(Ifx_AngleTrkF32 *driver);
206
207 /** \brief \see IfxStdIf_Pos_GetOffset
208 * \param driver driver handle
209 * \return offset address
210 */
211 IFX_EXTERN sint32 Ifx_AngleTrkF32_getOffset(Ifx_AngleTrkF32 *driver);
212
213 /** \brief \see IfxStdIf_Pos_GetPeriodPerRotation
214 * \param driver driver handle
215 * \return Period per rotation
216 */
217 IFX_EXTERN uint16 Ifx_AngleTrkF32_getPeriodPerRotation(Ifx_AngleTrkF32 *driver);
218
219 /** \brief \see IfxStdIf_Pos_GetPosition
220 * \param driver driver handle
221 * \return position
222 */
223 IFX_EXTERN float32 Ifx_AngleTrkF32_getPosition(Ifx_AngleTrkF32 *driver);
224
225 /** \brief \see IfxStdIf_Pos_GetRawPosition
226 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
227 * \return position in ticks
228 */
229 IFX_EXTERN IfxStdIf_Pos_RawAngle Ifx_AngleTrkF32_getRawPosition(Ifx_AngleTrkF32 *aObsv);
230
231 /** \brief \see IfxStdIf_Pos_GetRefreshPeriod
232 * \param driver driver handle
233 * \return update period
234 */
235 IFX_EXTERN float32 Ifx_AngleTrkF32_getRefreshPeriod(Ifx_AngleTrkF32 *driver);
236
237 /** \brief \see IfxStdIf_Pos_GetResolution
238 * \param driver driver handle
239 * \return resolution
240 */
241 IFX_EXTERN sint32 Ifx_AngleTrkF32_getResolution(Ifx_AngleTrkF32 *driver);
242
243 /** \brief \see IfxStdIf_Pos_GetTurn
244 * \param driver driver handle
245 * \return Returns the number of turns
246 */
247 IFX_EXTERN sint32 Ifx_AngleTrkF32_getTurn(Ifx_AngleTrkF32 *driver);
248
249 /** \brief \see IfxStdIf_Pos_GetSensorType
250 * \param driver driver handle
251 * \return sensor type
252 */
253 IFX_EXTERN IfxStdIf_Pos_SensorType Ifx_AngleTrkF32_getSensorType(Ifx_AngleTrkF32 *driver);
254
255 /** \brief \see IfxStdIf_Pos_GetSpeed
256 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
257 * \return speed
258 */
259 IFX_EXTERN float32 Ifx_AngleTrkF32_getSpeed(Ifx_AngleTrkF32 *aObsv);
260
261 /** \brief \see IfxStdIf_Pos_Reset
262 * \param driver driver handle
263 * \return None
264 */
265 IFX_EXTERN void Ifx_AngleTrkF32_reset(Ifx_AngleTrkF32 *driver);
266
267 /** \brief \see IfxStdIf_Pos_ResetFaults
268 * \param driver driver handle
269 * \return None
270 */
271 IFX_EXTERN void Ifx_AngleTrkF32_resetFaults(Ifx_AngleTrkF32 *driver);
272
273 /** \brief \see IfxStdIf_Pos_SetOffset
274 * \param aObsv driver handle
275 * \param offset offset
276 * \return None
277 */
278 IFX_EXTERN void Ifx_AngleTrkF32_setOffset(Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset);
279
280 /** \brief \see IfxStdIf_Pos_SetRefreshPeriod
281 * \param driver driver handle
282 * \param updatePeriod update period
283 * \return None
284 */
285 IFX_EXTERN void Ifx_AngleTrkF32_setRefreshPeriod(Ifx_AngleTrkF32 *driver, float32 updatePeriod);
286
287 /** \brief \see IfxStdIf_Pos_Update
288 * \param aObsv driver handle
289 * \return None
290 */
291 IFX_EXTERN void Ifx_AngleTrkF32_update(Ifx_AngleTrkF32 *aObsv);
292
293 /** \} */
294
295 /******************************************************************************/
296 /*-------------------------Global Function Prototypes-------------------------*/
297 /******************************************************************************/
298
299 /** \brief Initializes the standard interface "Pos"
300 * \param stdif Standard interface position object
301 * \param driver Virtual position sensor
302 * \return TRUE on success else FALSE
303 */
304 IFX_EXTERN boolean Ifx_AngleTrkF32_stdIfPosInit(IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver);
305
306 #endif /* IFX_ANGLETRKF32_H */
Ifx_AngleTrkF32_resetFaults
IFX_EXTERN void Ifx_AngleTrkF32_resetFaults(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:396
Ifx_AngleTrkF32_Config::periodPerRotation
uint16 periodPerRotation
Number of electrical periods per mechanical rotation.
Definition: Ifx_AngleTrkF32.h:82
Ifx_AngleTrkF32_update
IFX_EXTERN void Ifx_AngleTrkF32_update(Ifx_AngleTrkF32 *aObsv)
Update the object directly from its analog input.
Definition: Ifx_AngleTrkF32.c:297
Ifx_AngleTrkF32_Config::offset
IfxStdIf_Pos_RawAngle offset
Offset in ticks. [0 .. (Ifx_AngleTrkF32_Config::resolution - 1)].
Definition: Ifx_AngleTrkF32.h:85
Ifx_AngleTrkF32_getRawPosition
IFX_EXTERN IfxStdIf_Pos_RawAngle Ifx_AngleTrkF32_getRawPosition(Ifx_AngleTrkF32 *aObsv)
Returns the actual position.
Definition: Ifx_AngleTrkF32.c:314
Ifx_AngleTrkF32_getAbsolutePosition
IFX_EXTERN float32 Ifx_AngleTrkF32_getAbsolutePosition(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:335
Ifx_AngleTrkF32_initConfig
IFX_EXTERN void Ifx_AngleTrkF32_initConfig(Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
Fill config with default values.
Definition: Ifx_AngleTrkF32.c:130
Ifx_AngleTrkF32::angleAtan
float32 angleAtan
Definition: Ifx_AngleTrkF32.h:123
Ifx_AngleTrkF32_stdIfPosInit
IFX_EXTERN boolean Ifx_AngleTrkF32_stdIfPosInit(IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver)
Initializes the standard interface "Pos".
Definition: Ifx_AngleTrkF32.c:427
Ifx_AngleTrkF32::base
Ifx_AngleTrkF32_PosIf base
Definition: Ifx_AngleTrkF32.h:118
Ifx_AngleTrkF32_Config::kd
float32 kd
Derivative gain.
Definition: Ifx_AngleTrkF32.h:77
Ifx_AngleTrkF32_getResolution
IFX_EXTERN sint32 Ifx_AngleTrkF32_getResolution(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:377
Ifx_AngleTrkF32::angleEst
float32 angleEst
Definition: Ifx_AngleTrkF32.h:125
Ifx_AngleTrkF32_Config::ki
float32 ki
Integrator gain.
Definition: Ifx_AngleTrkF32.h:76
Ifx_AngleTrkF32_PosIf::rawPosition
IfxStdIf_Pos_RawAngle rawPosition
raw position in ticks.
Definition: Ifx_AngleTrkF32.h:102
Ifx_AngleTrkF32_Config::sqrAmplMax
sint32 sqrAmplMax
Maximum value for square of signal amplitudes.
Definition: Ifx_AngleTrkF32.h:80
float32
float float32
Definition: Platform_Types.h:170
Ifx_AngleTrkF32::angleErr
float32 angleErr
Definition: Ifx_AngleTrkF32.h:129
Ifx_AngleTrkF32_Config::resolution
sint32 resolution
Sensor resolution.
Definition: Ifx_AngleTrkF32.h:84
IfxStdIf_Pos_RawAngle
sint32 IfxStdIf_Pos_RawAngle
Definition: IfxStdIf_Pos.h:113
Ifx_AngleTrkF32_init
IFX_EXTERN void Ifx_AngleTrkF32_init(Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
Initialize the Angle Tracking object.
Definition: Ifx_AngleTrkF32.c:162
Ifx_AngleTrkF32_getFault
IFX_EXTERN IfxStdIf_Pos_Status Ifx_AngleTrkF32_getFault(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:347
Ifx_AngleTrkF32_step
IFX_EXTERN float32 Ifx_AngleTrkF32_step(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisa...
Definition: Ifx_AngleTrkF32.c:220
Ifx_AngleTrkF32_getSensorType
IFX_EXTERN IfxStdIf_Pos_SensorType Ifx_AngleTrkF32_getSensorType(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:383
Ifx_AngleTrkF32::speedEstB
float32 speedEstB
Definition: Ifx_AngleTrkF32.h:127
Ifx_AngleTrkF32_Config::kp
float32 kp
Proportional gain.
Definition: Ifx_AngleTrkF32.h:75
Ifx_AngleTrkF32_Config::sinIn
sint16 * sinIn
Pointer to SIN input variable.
Definition: Ifx_AngleTrkF32.h:86
Ifx_AngleTrkF32_Config::errorThreshold
float32 errorThreshold
Threshold of error value in the tracking loop.
Definition: Ifx_AngleTrkF32.h:79
Ifx_AngleTrkF32_getDirection
IFX_EXTERN IfxStdIf_Pos_Dir Ifx_AngleTrkF32_getDirection(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:341
sint16
short sint16
Definition: Platform_Types.h:129
Ifx_AngleTrkF32::cfgData
Ifx_AngleTrkF32_CfgData cfgData
Definition: Ifx_AngleTrkF32.h:119
Ifx_LowPassPt1F32
PT1 object definition.
Definition: Ifx_LowPassPt1F32.h:61
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStdIf_Pos.h
Standard interface: Position interface.
Ifx_AngleTrkF32_reset
IFX_EXTERN void Ifx_AngleTrkF32_reset(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:408
Ifx_AngleTrkF32::halfTs
float32 halfTs
Definition: Ifx_AngleTrkF32.h:122
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_AngleTrkF32_getTurn
IFX_EXTERN sint32 Ifx_AngleTrkF32_getTurn(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:390
Ifx_AngleTrkF32_PosIf::resolution
IfxStdIf_Pos_RawAngle resolution
resolution of this position sensor interface
Definition: Ifx_AngleTrkF32.h:110
Ifx_AngleTrkF32_Config
Angle Tracking Observer configuration.
Definition: Ifx_AngleTrkF32.h:73
Ifx_AngleTrkF32_Config::speedLpfFc
float32 speedLpfFc
Cut-off frequency of speed low-pass filter.
Definition: Ifx_AngleTrkF32.h:78
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:92
Ifx_AngleTrkF32_setRefreshPeriod
IFX_EXTERN void Ifx_AngleTrkF32_setRefreshPeriod(Ifx_AngleTrkF32 *driver, float32 updatePeriod)
Definition: Ifx_AngleTrkF32.c:402
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:283
Ifx_AngleTrkF32_Config::reversed
boolean reversed
TRUE: reversed direction, FALSE: straight direction.
Definition: Ifx_AngleTrkF32.h:83
Ifx_LowPassPt1F32.h
Low pass filter PT1.
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:81
Ifx_AngleTrkF32_getLoopSpeed
IFX_INLINE float32 Ifx_AngleTrkF32_getLoopSpeed(Ifx_AngleTrkF32 *aObsv)
get the speed.
Definition: Ifx_AngleTrkF32.h:175
Ifx_AngleTrkF32_PosIf::turn
sint32 turn
number of mechanical turns. FIXME to be implemented
Definition: Ifx_AngleTrkF32.h:103
Ifx_AngleTrkF32_getRefreshPeriod
IFX_EXTERN float32 Ifx_AngleTrkF32_getRefreshPeriod(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:371
Ifx_AngleTrkF32::angleRef
float32 angleRef
Definition: Ifx_AngleTrkF32.h:124
Ifx_AngleTrkF32::speedLpf
Ifx_LowPassPt1F32 speedLpf
Definition: Ifx_AngleTrkF32.h:130
Ifx_AngleTrkF32_getSpeed
IFX_EXTERN float32 Ifx_AngleTrkF32_getSpeed(Ifx_AngleTrkF32 *aObsv)
Returns the Speed.
Definition: Ifx_AngleTrkF32.c:324
Ifx_AngleTrkF32
Angle Tracking Observer object.
Definition: Ifx_AngleTrkF32.h:116
Ifx_AngleTrkF32_PosIf
Definition: Ifx_AngleTrkF32.h:100
Ifx_AngleTrkF32_CfgData
Definition: Ifx_AngleTrkF32.h:90
Ifx_AngleTrkF32_Config::cosIn
sint16 * cosIn
Pointer to COS input variable.
Definition: Ifx_AngleTrkF32.h:87
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_AngleTrkF32_getPeriodPerRotation
IFX_EXTERN uint16 Ifx_AngleTrkF32_getPeriodPerRotation(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:359
Ifx_AngleTrkF32::accelEst
float32 accelEst
Definition: Ifx_AngleTrkF32.h:128
Ifx_AngleTrkF32_PosIf::Ts
float32 Ts
update period in seconds
Definition: Ifx_AngleTrkF32.h:111
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_AngleTrkF32_PosIf::direction
IfxStdIf_Pos_Dir direction
rotation direction
Definition: Ifx_AngleTrkF32.h:104
Ifx_AngleTrkF32_PosIf::status
IfxStdIf_Pos_Status status
error code (0 = no error)
Definition: Ifx_AngleTrkF32.h:105
Ifx_AngleTrkF32_getOffset
IFX_EXTERN sint32 Ifx_AngleTrkF32_getOffset(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:353
Ifx_AngleTrkF32_Config::sqrAmplMin
sint32 sqrAmplMin
Minimum value for square of signal amplitudes.
Definition: Ifx_AngleTrkF32.h:81
Ifx_AngleTrkF32_getPosition
IFX_EXTERN float32 Ifx_AngleTrkF32_getPosition(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:365
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:100
Ifx_AngleTrkF32::speedEstA
float32 speedEstA
Definition: Ifx_AngleTrkF32.h:126
Ifx_AngleTrkF32_setOffset
IFX_EXTERN void Ifx_AngleTrkF32_setOffset(Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
Set the position offset (in ticks)
Definition: Ifx_AngleTrkF32.c:271
Ifx_AngleTrkF32_PosIf::positionConst
float32 positionConst
constant for calculating mechanical position (in rad) from raw position
Definition: Ifx_AngleTrkF32.h:112
Ifx_AngleTrkF32_updateStatus
IFX_EXTERN void Ifx_AngleTrkF32_updateStatus(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
Update the status flags.
Definition: Ifx_AngleTrkF32.c:284


iLLD_TC26B: Ifx_Assert.h Source File

  • Service
  • CpuGeneric
  • _Utilities
Ifx_Assert.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Assert.h
3 * \brief Assert functions.
4 * \ingroup library_srvsw_utilities_assert
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-28 14:15:42 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup library_srvsw_utilities_assert Assertion
42 * This module implements assertion functions.
43 * \ingroup library_srvsw_utilities
44 *
45 */
46
47 #ifndef IFX_ASSERT_H
48 #define IFX_ASSERT_H 1
49
50 #include "Ifx_Cfg.h" /* Do not remove this include */
51 #include "Cpu/Std/Ifx_Types.h" /* Do not remove this include */
52
53 /** \addtogroup library_srvsw_utilities_assert
54 * \{ */
55
56 #define IFX_VERBOSE_LEVEL_OFF (0) /**< \brief Assertion level off, assertion is disabled */
57 #define IFX_VERBOSE_LEVEL_FAILURE (1) /**< \brief Assertion level failure, a debug instruction is inserted if enabled */
58 #define IFX_VERBOSE_LEVEL_ERROR (2) /**< \brief Assertion level error, a debug instruction is inserted if enabled */
59 #define IFX_VERBOSE_LEVEL_WARNING (3) /**< \brief Assertion level warning */
60 #define IFX_VERBOSE_LEVEL_INFO (4) /**< \brief Assertion level info */
61 #define IFX_VERBOSE_LEVEL_DEBUG (5) /**< \brief Assertion level debug */
62
63 /** \brief Constant to be used to indicate not implemented feature */
64 #define IFX_ASSERT_FEATURE_NOT_IMPLEMENTED (FALSE)
65 /** \brief Feature is not available on the selected hardware */
66 #define IFX_ASSERT_FEATURE_NOT_AVAILABLE (FALSE)
67
68 #ifndef IFX_ASSERT
69 # define IFX_ASSERT(level, expr) ((void)0)
70 #endif
71
72 #ifndef IFX_VALIDATE
73 # define IFX_VALIDATE(level, expr) (expr)
74 #endif
75
76 #ifdef IFX_CFG_ASSERT_INCLUDE
77 /** Configuration switch: IFX_CFG_ASSERT_INCLUDE
78 * This switch is used to enable user defined assertion implementation.
79 * A usage exmaple is given below:
80 *
81 * \code
82 * // File "Ifx_Cfg.h"
83 * #define IFX_CFG_ASSERT_INCLUDE "SysSe/Bsp/Assert.h"
84 * \endcode
85 */
86 #include IFX_CFG_ASSERT_INCLUDE
87 #endif
88 /** \} */
89
90 #endif
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.


iLLD_TC26B: Ifx_Cf32.c Source File

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Ifx_Cf32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Cf32.c
3 * \brief Floating point signal, vector, and matrix library
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 */
41
42 #include "Ifx_Cf32.h"
43 #include <float.h>
44 #include <stdio.h>
45
46 void CplxVecRst_f32(cfloat32 *X, short nX)
47 {
48 for ( ; nX > 0; nX--)
49 {
50 X->real = X->imag = 0.0;
51 X++;
52 }
53 }
54
55
56 void CplxVecCpy_f32S(cfloat32 *X, short *S, short nS, short incrS)
57 {
58 for ( ; nS > 0; nS--)
59 {
60 (*X).imag = 0.0;
61 (*X).real = *(S);
62 X++; S += incrS;
63 }
64 }
65
66
67 void CplxVecCpy_f32(cfloat32 *X, cfloat32 *S, short nS)
68 {
69 for ( ; nS > 0; nS--)
70 {
71 *X = *S;
72 X++; S++;
73 }
74 }
75
76
77 float32 *CplxVecPwr_f32(cfloat32 *X, short nX)
78 {
79 unsigned short i;
80 float32 *r = (float32 *)X;
81
82 for (i = 0; i < nX; i++)
83 {
84 *r = IFX_Cf32_dot(X);
85 r++; X++;
86 }
87
88 return &r[-nX];
89 }
90
91
92 float32 *CplxVecMag_f32(cfloat32 *X, short nX)
93 {
94 unsigned short i;
95 float32 *r = (float32 *)X;
96
97 for (i = 0; i < nX; i++)
98 {
99 *r = IFX_Cf32_mag(X);
100 r++; X++;
101 }
102
103 return &r[-nX];
104 }
105
106
107 void CplxVecMul_f32(cfloat32 *X, const cfloat32 *mul, short nX)
108 {
109 for ( ; nX > 0; nX--)
110 {
111 *X = IFX_Cf32_mul(X, mul);
112 X++;
113 }
114 }
115
116
117 void VecPwrdB_f32(float32 *X, short nX)
118 {
119 unsigned short i;
120
121 for (i = 0; i < nX; i++)
122 {
123 *X = (float32)20.0 * log10f(*X);
124 X++;
125 }
126 }
127
128
129 void VecPwrdB_SF(sint16 *R, float32 *X, short nX)
130 {
131 unsigned short i;
132
133 for (i = 0; i < nX; i++)
134 {
135 *R = (sint16)(20.0 * log10f(*X));
136 R++; X++;
137 }
138 }
139
140
141 float32 VecMaxIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
142 {
143 float32 maxPeak = FLT_MIN;
144 unsigned short m;
145
146 for (m = 0; m < nX; m++)
147 {
148 if (*X > maxPeak)
149 {
150 maxPeak = *X;
151 *minIdx = m;
152 }
153
154 if (*X >= maxPeak)
155 {
156 *maxIdx = m;
157 }
158
159 X++;
160 }
161
162 return maxPeak;
163 }
164
165
166 float32 VecMinIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
167 {
168 float32 minPeak = FLT_MAX;
169 short m;
170
171 for (m = 0; m < nX; m++)
172 {
173 if (*X < minPeak)
174 {
175 minPeak = *X;
176 *minIdx = m;
177 }
178
179 if (*X <= minPeak)
180 {
181 *maxIdx = m;
182 }
183
184 X++;
185 }
186
187 return minPeak;
188 }
189
190
191 void VecOfs_f32(float32 *X, float32 offset, short nX)
192 {
193 unsigned short i;
194
195 for (i = 0; i < nX; i++)
196 {
197 *X -= offset;
198 X++;
199 }
200 }
201
202
203 void VecGain_f32(float32 *X, float32 gain, short nX)
204 {
205 unsigned short i;
206
207 for (i = 0; i < nX; i++)
208 {
209 *X = *X * gain;
210 X++;
211 }
212 }
213
214
215 float32 VecSum_f32(float32 *X, short nX)
216 {
217 float32 sumX = 0;
218 unsigned short i;
219
220 for (i = 0; i < nX; i++)
221 {
222 sumX += *X;
223 X++;
224 }
225
226 return sumX;
227 }
228
229
230 float32 VecAvg_f32(float32 *X, short nX)
231 {
232 return VecSum_f32(X, nX) / nX;
233 }
234
235
236 float32 VecMax_f32(float32 *X, short nX)
237 {
238 unsigned short i;
239 float32 r = FLT_MIN;
240
241 for (i = 0; i < nX; i++)
242 {
243 r = __maxf(r, *X);
244 X++;
245 }
246
247 return r;
248 }
249
250
251 float32 VecMin_f32(float32 *X, short nX)
252 {
253 unsigned short i;
254 float32 r = FLT_MAX;
255
256 for (i = 0; i < nX; i++)
257 {
258 r = __minf(r, *X);
259 X++;
260 }
261
262 return r;
263 }
264
265
266 void VecHalfSwap_f32(float32 *X, short nX)
267 {
268 unsigned short i;
269 unsigned short half = nX / 2;
270 float32 *F = &X[half];
271
272 for (i = 0; i < half; i++)
273 {
274 float32 tmp = *F;
275 *F = *X;
276 *X = tmp;
277 F++; X++;
278 }
279 }
280
281
282 /* NOTE:
283 * (nX <= nW) && ((nW % nX) == 0) && ((nX % 2) == 0)
284 * (symW != 0) when the window is symmetrical */
285 void VecWin_f32(float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)
286 {
287 short step = nW / nX;
288 short i;
289
290 if (symW != 0)
291 { /* symmetrical window, using half of the length */
292 for (i = 0; i < nX / 2; i++)
293 {
294 *X = *X * *W;
295 X = &X[incrX];
296 W = &W[step];
297 }
298
299 W = &W[-step];
300
301 for ( ; i < nX; i++)
302 {
303 *X = *X * *W;
304 X = &X[incrX];
305 W = &W[-step];
306 }
307 }
308 }
309
310
311 #ifdef __WIN32__
312
313 #define ENDL "\r\n"
314
315 void DataF_printf(FILE *fp, pchar fileName, float32 *data, long nX, int enclosed)
316 {
317 long i;
318
319 if (fileName != NULL)
320 {
321 fp = fopen(fileName, "w+");
322 }
323
324 if (fp != NULL)
325 {
326 if (enclosed)
327 {
328 for (i = 0; i < nX; i++)
329 {
330 fprintf(fp, "_DATAF(%10.20f)," ENDL, *data);
331 data = &data[1];
332 }
333 }
334 else
335 {
336 for (i = 0; i < nX; i++)
337 {
338 fprintf(fp, "%10.20f," ENDL, *data);
339 data = &data[1];
340 }
341 }
342 }
343
344 if (fileName != NULL)
345 {
346 fclose(fp);
347 }
348 }
349
350
351 void Cplx_f32_printf(FILE *fp, pchar fileName, cfloat32 *data, long nX, int encloseData)
352 {
353 long i;
354
355 if (fileName != NULL)
356 {
357 fp = fopen(fileName, "w+");
358 }
359
360 if (fp != NULL)
361 {
362 if (encloseData)
363 {
364 for (i = 0; i < nX; i++)
365 {
366 fprintf(fp, "{_DATAF(%10.20f), _DATAF(%10.20f)}," ENDL, data->real, data->imag);
367 data = &data[1];
368 }
369 }
370 else
371 {
372 for (i = 0; i < nX; i++)
373 {
374 fprintf(fp, "%10.20f, %10.20f" ENDL, data->real, data->imag);
375 data = &data[1];
376 }
377 }
378 }
379
380 if (fileName != NULL)
381 {
382 fclose(fp);
383 }
384 }
385
386
387 #endif
CplxVecMul_f32
void CplxVecMul_f32(cfloat32 *X, const cfloat32 *mul, short nX)
Definition: Ifx_Cf32.c:107
VecGain_f32
void VecGain_f32(float32 *X, float32 gain, short nX)
Definition: Ifx_Cf32.c:203
CplxVecPwr_f32
float32 * CplxVecPwr_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:77
VecOfs_f32
void VecOfs_f32(float32 *X, float32 offset, short nX)
Definition: Ifx_Cf32.c:191
Cplx_f32_printf
#define Cplx_f32_printf(...)
Definition: Ifx_Cf32.h:178
VecWin_f32
void VecWin_f32(float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)
Definition: Ifx_Cf32.c:285
VecSum_f32
float32 VecSum_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:215
IFX_Cf32_mul
IFX_INLINE cfloat32 IFX_Cf32_mul(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:64
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:64
VecMax_f32
float32 VecMax_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:236
float32
float float32
Definition: Platform_Types.h:170
VecMaxIdx_f32
float32 VecMaxIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
Definition: Ifx_Cf32.c:141
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:61
CplxVecMag_f32
float32 * CplxVecMag_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:92
VecPwrdB_f32
void VecPwrdB_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:117
__maxf
#define __maxf
Definition: IfxCpu_IntrinsicsDcc.h:1637
cfloat32
Definition: Ifx_Types.h:58
sint16
short sint16
Definition: Platform_Types.h:129
VecAvg_f32
float32 VecAvg_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:230
VecMin_f32
float32 VecMin_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:251
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:60
CplxVecRst_f32
void CplxVecRst_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:46
VecMinIdx_f32
float32 VecMinIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
Definition: Ifx_Cf32.c:166
VecHalfSwap_f32
void VecHalfSwap_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:266
__minf
#define __minf
Definition: IfxCpu_IntrinsicsDcc.h:1633
IFX_Cf32_dot
IFX_INLINE float32 IFX_Cf32_dot(const cfloat32 *b)
Definition: Ifx_Cf32.h:82
CplxVecCpy_f32S
void CplxVecCpy_f32S(cfloat32 *X, short *S, short nS, short incrS)
Definition: Ifx_Cf32.c:56
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
VecPwrdB_SF
void VecPwrdB_SF(sint16 *R, float32 *X, short nX)
Definition: Ifx_Cf32.c:129
IFX_Cf32_mag
IFX_INLINE float32 IFX_Cf32_mag(const cfloat32 *c)
Definition: Ifx_Cf32.h:88
CplxVecCpy_f32
void CplxVecCpy_f32(cfloat32 *X, cfloat32 *S, short nS)
Definition: Ifx_Cf32.c:67


iLLD_TC26B: Ifx_Cf32.h Source File

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Ifx_Cf32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Cf32.h
3 * \brief Floating point signal, vector, and matrix library
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup library_srvsw_sysse_math_cf32 Floating point signal, vector, and matrix library
42 * \ingroup library_srvsw_sysse_math_f32
43 */
44
45 #ifndef IFX_CF32_H
46 #define IFX_CF32_H
47
48 #include "Cpu/Std/IfxCpu_Intrinsics.h"
49 #include <math.h>
50
51 #define _DATAF(val) ((float32)(val))
52
53 /* Complex Arithmetic --------------------------------------------------------*/
54 IFX_INLINE cfloat32 IFX_Cf32_exp(const cfloat32 *c)
55 {
56 float32 f = (float32)expf(c->real);
57 cfloat32 R;
58 R.real = f * (float32)cosf(c->imag);
59 R.imag = f * (float32)sinf(c->imag);
60 return R;
61 }
62
63
64 IFX_INLINE cfloat32 IFX_Cf32_mul(const cfloat32 *a, const cfloat32 *b)
65 {
66 cfloat32 R;
67 R.real = (a->real * b->real) - (a->imag * b->imag);
68 R.imag = (a->imag * b->real) + (a->real * b->imag);
69 return R;
70 }
71
72
73 IFX_INLINE cfloat32 IFX_Cf32_amp(const cfloat32 *a, float32 gain)
74 {
75 cfloat32 R;
76 R.real = a->real * gain;
77 R.imag = a->imag * gain;
78 return R;
79 }
80
81
82 IFX_INLINE float32 IFX_Cf32_dot(const cfloat32 *b)
83 {
84 return (b->real * b->real) + (b->imag * b->imag);
85 }
86
87
88 IFX_INLINE float32 IFX_Cf32_mag(const cfloat32 *c)
89 {
90 return (float32)sqrtf(IFX_Cf32_dot(c));
91 }
92
93
94 IFX_INLINE cfloat32 IFX_Cf32_div(const cfloat32 *a, const cfloat32 *b)
95 {
96 float32 denom = IFX_Cf32_dot(b);
97 cfloat32 R;
98 R.real = ((a->real * b->real) + (a->imag * b->imag)) / denom;
99 R.imag = ((a->imag * b->real) - (a->real * b->imag)) / denom;
100 return R;
101 }
102
103
104 IFX_INLINE cfloat32 IFX_Cf32_add(const cfloat32 *a, const cfloat32 *b)
105 {
106 cfloat32 R;
107 R.real = (a->real + b->real);
108 R.imag = (a->imag + b->imag);
109 return R;
110 }
111
112
113 IFX_INLINE cfloat32 IFX_Cf32_sub(const cfloat32 *a, const cfloat32 *b)
114 {
115 cfloat32 R;
116 R.real = (a->real - b->real);
117 R.imag = (a->imag - b->imag);
118 return R;
119 }
120
121
122 IFX_INLINE void IFX_Cf32_set(cfloat32 *a, float32 re, float32 im)
123 {
124 a->real = re;
125 a->imag = im;
126 }
127
128
129 IFX_INLINE void IFX_Cf32_reset(cfloat32 *a)
130 {
131 IFX_Cf32_set(a, 0.0, 0.0);
132 }
133
134
135 IFX_INLINE cfloat32 IFX_Cf32_saturate(cfloat32 *a, float32 *ampl, float32 limit)
136 {
137 cfloat32 R = *a;
138 *ampl = IFX_Cf32_mag(a);
139
140 if (*ampl > limit)
141 {
142 float32 scale = limit / *ampl;
143 R.imag = R.imag * scale;
144 R.real = R.real * scale;
145 }
146
147 return R;
148 }
149
150
151 IFX_EXTERN void CplxVecCpy_f32S(cfloat32 *X, short *S, short nS, short incrS);
152 IFX_EXTERN void CplxVecRst_f32(cfloat32 *X, short nX);
153 IFX_EXTERN void CplxVecCpy_f32(cfloat32 *X, cfloat32 *S, short nS);
154 IFX_EXTERN float32 *CplxVecPwr_f32(cfloat32 *X, short nX);
155 IFX_EXTERN float32 *CplxVecMag_f32(cfloat32 *X, short nX);
156 IFX_EXTERN void CplxVecMul_f32(cfloat32 *X, const cfloat32 *mul, short nX);
157
158 /* Vector Operation ----------------------------------------------------------*/
159
160 IFX_EXTERN void VecWin_f32(float32 *X, const float32 *W, short nX, short nW, short incrX, short symW);
161 IFX_EXTERN void VecPwrdB_f32(float32 *X, short nX);
162 IFX_EXTERN void VecPwrdB_SF(sint16 *R, float32 *X, short nX);
163 IFX_EXTERN void VecGain_f32(float32 *X, float32 gain, short nX);
164 IFX_EXTERN void VecOfs_f32(float32 *X, float32 offset, short nX);
165 IFX_EXTERN float32 VecSum_f32(float32 *X, short nX);
166 IFX_EXTERN float32 VecAvg_f32(float32 *X, short nX);
167 IFX_EXTERN float32 VecMax_f32(float32 *X, short nX);
168 IFX_EXTERN float32 VecMin_f32(float32 *X, short nX);
169 IFX_EXTERN float32 VecMinIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx);
170 IFX_EXTERN float32 VecMaxIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx);
171 IFX_EXTERN void VecHalfSwap_f32(float32 *X, short nX);
172
173 /* Helper functions ----------------------------------------------------------*/
174 #ifdef __WIN32__
175 #include <stdio.h>
176 void Cplx_f32_printf(FILE *fp, pchar fileName, cfloat32 *data, long nX, int encloseData);
177 #else
178 #define Cplx_f32_printf(...)
179 #endif
180
181 #endif /* IFX_CF32_H */
IFX_Cf32_reset
IFX_INLINE void IFX_Cf32_reset(cfloat32 *a)
Definition: Ifx_Cf32.h:129
VecPwrdB_SF
IFX_EXTERN void VecPwrdB_SF(sint16 *R, float32 *X, short nX)
Definition: Ifx_Cf32.c:129
VecSum_f32
IFX_EXTERN float32 VecSum_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:215
Cplx_f32_printf
#define Cplx_f32_printf(...)
Definition: Ifx_Cf32.h:178
IFX_Cf32_mul
IFX_INLINE cfloat32 IFX_Cf32_mul(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:64
VecMaxIdx_f32
IFX_EXTERN float32 VecMaxIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
Definition: Ifx_Cf32.c:141
VecOfs_f32
IFX_EXTERN void VecOfs_f32(float32 *X, float32 offset, short nX)
Definition: Ifx_Cf32.c:191
float32
float float32
Definition: Platform_Types.h:170
IfxCpu_Intrinsics.h
VecAvg_f32
IFX_EXTERN float32 VecAvg_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:230
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:61
VecWin_f32
IFX_EXTERN void VecWin_f32(float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)
Definition: Ifx_Cf32.c:285
CplxVecCpy_f32
IFX_EXTERN void CplxVecCpy_f32(cfloat32 *X, cfloat32 *S, short nS)
Definition: Ifx_Cf32.c:67
cfloat32
Definition: Ifx_Types.h:58
sint16
short sint16
Definition: Platform_Types.h:129
IFX_Cf32_amp
IFX_INLINE cfloat32 IFX_Cf32_amp(const cfloat32 *a, float32 gain)
Definition: Ifx_Cf32.h:73
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
VecHalfSwap_f32
IFX_EXTERN void VecHalfSwap_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:266
VecPwrdB_f32
IFX_EXTERN void VecPwrdB_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:117
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IFX_Cf32_sub
IFX_INLINE cfloat32 IFX_Cf32_sub(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:113
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:60
CplxVecCpy_f32S
IFX_EXTERN void CplxVecCpy_f32S(cfloat32 *X, short *S, short nS, short incrS)
Definition: Ifx_Cf32.c:56
IFX_Cf32_div
IFX_INLINE cfloat32 IFX_Cf32_div(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:94
IFX_Cf32_dot
IFX_INLINE float32 IFX_Cf32_dot(const cfloat32 *b)
Definition: Ifx_Cf32.h:82
VecMinIdx_f32
IFX_EXTERN float32 VecMinIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
Definition: Ifx_Cf32.c:166
VecMax_f32
IFX_EXTERN float32 VecMax_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:236
IFX_Cf32_add
IFX_INLINE cfloat32 IFX_Cf32_add(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:104
CplxVecPwr_f32
IFX_EXTERN float32 * CplxVecPwr_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:77
VecMin_f32
IFX_EXTERN float32 VecMin_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:251
VecGain_f32
IFX_EXTERN void VecGain_f32(float32 *X, float32 gain, short nX)
Definition: Ifx_Cf32.c:203
IFX_Cf32_set
IFX_INLINE void IFX_Cf32_set(cfloat32 *a, float32 re, float32 im)
Definition: Ifx_Cf32.h:122
IFX_Cf32_exp
IFX_INLINE cfloat32 IFX_Cf32_exp(const cfloat32 *c)
Definition: Ifx_Cf32.h:54
CplxVecMul_f32
IFX_EXTERN void CplxVecMul_f32(cfloat32 *X, const cfloat32 *mul, short nX)
Definition: Ifx_Cf32.c:107
CplxVecRst_f32
IFX_EXTERN void CplxVecRst_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:46
CplxVecMag_f32
IFX_EXTERN float32 * CplxVecMag_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:92
IFX_Cf32_saturate
IFX_INLINE cfloat32 IFX_Cf32_saturate(cfloat32 *a, float32 *ampl, float32 limit)
Definition: Ifx_Cf32.h:135
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
IFX_Cf32_mag
IFX_INLINE float32 IFX_Cf32_mag(const cfloat32 *c)
Definition: Ifx_Cf32.h:88


iLLD_TC26B: Ifx_CircularBuffer.asm.c Source File

  • _Lib
  • DataHandling
Ifx_CircularBuffer.asm.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_CircularBuffer.asm.c
3 * \brief Circular buffer functions (assembler implementation).
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #include "Ifx_CircularBuffer.h"
43
44 #if !(IFX_CFG_CIRCULARBUFFER_C)
45
46 uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer)
47 {
48 uint32 data;
49
50 __asm(" ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
51 " ld.w\t%0,[a14/a15+c]\n" /* Get the value from the buffer, and increment the buffer pointer */
52 " st.da\t[%1],a14/a15\n" /* Store the new circular buffer state */
53 : "=d" (data) : "a" (buffer) : "a14", "a15");
54
55 return data;
56 }
57
58
59 uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer)
60 {
61 Ifx_SizeT data;
62
63 __asm(" ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
64 " ld.h\t%0,[a14/a15+c]\n" /* Get the value from the buffer, and increment the buffer pointer */
65 " st.da\t[%1],a14/a15\n" /* Store the new circular buffer state */
66 : "=d" (data) : "a" (buffer) : "a14", "a15");
67
68 return data;
69 }
70
71
72 /** \brief Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer
73 *
74 * \param buffer Specifies circular buffer.
75 * \param data Specifies value to be added to the buffer.
76 *
77 * \return None.
78 */
79 void Ifx_CircularBuffer_addDataIncr(Ifx_CircularBuffer *buffer, uint32 data)
80 {
81 __asm(" ld.da\ta14/a15,[%0]\n" /* Get circular buffer state */
82 " st.w\t[a14/a15+c]0,%1\n" /* Store the value to the buffer, and increment the buffer pointer */
83 " ld.w\t%1,[a14/a15+c]\n" /* Read the value from the buffer, to get the buffer pointer incremented (bug workaround) */
84 " st.da\t[%0],a14/a15\n" /* Store the new circular buffer state */
85 :
86 : "a" (buffer), "d" (data) : "a14", "a15");
87 }
88
89
90 void *Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
91 {
92 count--;
93 __asm(" mov.a\ta13,%3\n" /* Get count value */
94 " ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
95 "Ifx_CircularBuffer_read1:" " ld.b\td15,[a14/a15+c]\n"/* read the value from the buffer, and increment the buffer pointer */
96 " st.b\t[%2+],d15\n" /* Store value to the data buffer, and increment the pointer */
97 " loop\ta13,Ifx_CircularBuffer_read1\n" /* loop */
98 " mov.d\t%0,a15\n" /* Get the new index value */
99 " extr.u\t%0,%0,#0,#16\n": "=d" (buffer->index) : "a" (buffer), "a" (data), "d" (count) : "a13", "a14", "a15",
100 "d15");
101
102 return data;
103 }
104
105
106 void *Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
107 {
108 count--;
109 __asm(" mov.a\ta13,%3\n" /* Get count value */
110 " ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
111 "Ifx_CircularBuffer_read2:" " ld.w\td15,[a14/a15+c]\n"/* read the value from the buffer, and increment the buffer pointer */
112 " st.w\t[%2+],d15\n" /* Store value to the data buffer, and increment the pointer */
113 " loop\ta13,Ifx_CircularBuffer_read2\n" /* loop */
114 " mov.d\t%0,a15\n" /* Get the new index value */
115 " extr.u\t%0,%0,#0,#16\n": "=d" (buffer->index) : "a" (buffer), "a" (data), "d" (count) : "a13", "a14", "a15",
116 "d15");
117
118 return data;
119 }
120
121
122 const void *Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
123 {
124 count--;
125 __asm(" mov.a\ta13,%3\n" /* Get count value */
126 " ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
127 "Ifx_CircularBuffer_write1:" " ld.b\td15,[%2+]\n"/* Get value from the data buffer, and increment the pointer */
128 " st.b\t[a14/a15+c]0,d15\n" /* Store the value to the buffer, and increment the buffer pointer */
129 " ld.b\td15,[a14/a15+c]\n" /* Read the value from the buffer, to get the buffer pointer incremented (bug workaround) */
130 " loop\ta13,Ifx_CircularBuffer_write1\n" /* loop */
131 " mov.d\t%0,a15\n" /* Get the new index value */
132 " extr.u\t%0,%0,#0,#16\n": "=d" (buffer->index) : "a" (buffer), "a" (data), "d" (count) : "a13", "a14", "a15",
133 "d15");
134
135 return data;
136 }
137
138
139 const void *Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
140 {
141 count--;
142 __asm(" mov.a\ta13,%3\n" /* Get count value */
143 " ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
144 "Ifx_CircularBuffer_write2:" " ld.w\td15,[%2+]\n"/* Get value from the data buffer, and increment the pointer */
145 " st.w\t[a14/a15+c]0,d15\n" /* Store the value to the buffer, and increment the buffer pointer */
146 " ld.w\td15,[a14/a15+c]\n" /* Read the value from the buffer, to get the buffer pointer incremented (bug workaround) */
147 " loop\ta13,Ifx_CircularBuffer_write2\n" /* loop */
148 " mov.d\t%0,a15\n" /* Get the new index value */
149 " extr.u\t%0,%0,#0,#16\n": "=d" (buffer->index) : "a" (buffer), "a" (data), "d" (count) : "a13", "a14", "a15",
150 "d15");
151
152 return data;
153 }
154
155
156 #endif
Ifx_CircularBuffer_write8
const void * Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:139
Ifx_CircularBuffer_read32
void * Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:116
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
Ifx_CircularBuffer_get32
uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:46
Ifx_CircularBuffer_addDataIncr
void Ifx_CircularBuffer_addDataIncr(Ifx_CircularBuffer *buffer, uint32 data)
Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer...
Definition: Ifx_CircularBuffer.c:83
Ifx_CircularBuffer
Circular buffer definition.
Definition: Ifx_Types.h:93
Ifx_CircularBuffer_read8
void * Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:95
Ifx_CircularBuffer_write32
const void * Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:160
Ifx_CircularBuffer_get16
uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:61
Ifx_CircularBuffer.h
Circular buffer functions.
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_CircularBuffer::index
uint16 index
buffer current index
Definition: Ifx_Types.h:96


iLLD_TC26B: Ifx_CircularBuffer.c Source File

  • _Lib
  • DataHandling
Ifx_CircularBuffer.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_CircularBuffer.c
3 * \brief Circular buffer functions in C language.
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #include "Ifx_CircularBuffer.h"
43
44 #if (IFX_CFG_CIRCULARBUFFER_C)
45
46 uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer)
47 {
48 uint32 data = ((uint32 *)buffer->base)[buffer->index];
49
50 buffer->index += 4;
51
52 if (buffer->index >= buffer->length)
53 {
54 buffer->index = 0;
55 }
56
57 return data;
58 }
59
60
61 uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer)
62 {
63 uint16 data = ((uint16 *)buffer->base)[buffer->index];
64
65 buffer->index += 2;
66
67 if (buffer->index >= buffer->length)
68 {
69 buffer->index = 0;
70 }
71
72 return data;
73 }
74
75
76 /** \brief Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer
77 *
78 * \param buffer Specifies circular buffer.
79 * \param data Specifies value to be added to the buffer.
80 *
81 * \return None.
82 */
83 void Ifx_CircularBuffer_addDataIncr(Ifx_CircularBuffer *buffer, uint32 data)
84 {
85 ((uint32 *)buffer->base)[buffer->index] = data;
86 buffer->index += 4;
87
88 if (buffer->index >= buffer->length)
89 {
90 buffer->index = 0;
91 }
92 }
93
94
95 void *Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
96 {
97 uint8 *Dest = (uint8 *)data;
98
99 do
100 {
101 count--;
102 *Dest = ((uint8 *)buffer->base)[buffer->index];
103 Dest = &Dest[1];
104 buffer->index++;
105
106 if (buffer->index >= buffer->length)
107 {
108 buffer->index = 0;
109 }
110 } while (count > 0);
111
112 return Dest;
113 }
114
115
116 void *Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
117 {
118 uint32 *Dest = (uint32 *)data;
119 uint8 *base = buffer->base;
120
121 do
122 {
123 *Dest = *((uint32 *)(&base[buffer->index]));
124 Dest = &Dest[1];
125 buffer->index = buffer->index + 4;
126
127 if (buffer->index >= buffer->length)
128 {
129 buffer->index = 0;
130 }
131
132 count--;
133 } while (count > 0);
134
135 return Dest;
136 }
137
138
139 const void *Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
140 {
141 const uint8 *source = (const uint8 *)data;
142
143 do
144 {
145 count--;
146 ((uint8 *)buffer->base)[buffer->index] = *source;
147 source = &source[1];
148 buffer->index++;
149
150 if (buffer->index >= buffer->length)
151 {
152 buffer->index = 0;
153 }
154 } while (count > 0);
155
156 return source;
157 }
158
159
160 const void *Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
161 {
162 const uint32 *source = (const uint32 *)data;
163 uint8 *base = buffer->base;
164
165 do
166 {
167 *((uint32 *)(&base[buffer->index])) = *source;
168 source = &source[1];
169 buffer->index = buffer->index + 4;
170
171 if (buffer->index >= buffer->length)
172 {
173 buffer->index = 0;
174 }
175
176 count--;
177 } while (count > 0);
178
179 return source;
180 }
181
182
183 #endif
Ifx_CircularBuffer_write8
const void * Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:139
Ifx_CircularBuffer_read32
void * Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:116
Ifx_CircularBuffer::length
uint16 length
buffer length
Definition: Ifx_Types.h:97
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
Ifx_CircularBuffer::base
void * base
buffer base address
Definition: Ifx_Types.h:95
Ifx_CircularBuffer_get32
uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:46
Ifx_CircularBuffer_addDataIncr
void Ifx_CircularBuffer_addDataIncr(Ifx_CircularBuffer *buffer, uint32 data)
Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer...
Definition: Ifx_CircularBuffer.c:83
Ifx_CircularBuffer
Circular buffer definition.
Definition: Ifx_Types.h:93
Ifx_CircularBuffer_read8
void * Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:95
Ifx_CircularBuffer_write32
const void * Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:160
Ifx_CircularBuffer_get16
uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:61
Ifx_CircularBuffer.h
Circular buffer functions.
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_CircularBuffer::index
uint16 index
buffer current index
Definition: Ifx_Types.h:96
uint8
unsigned char uint8
Definition: Platform_Types.h:108


iLLD_TC26B: Ifx_CircularBuffer.h Source File

  • _Lib
  • DataHandling
Ifx_CircularBuffer.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_CircularBuffer.h
3 * \brief Circular buffer functions.
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup IfxLld_lib_datahandling_circularbuffer Circular buffer
41 * This module implements circular buffer functions.
42 * \ingroup IfxLld_lib_datahandling
43 *
44 */
45
46 #ifndef IFX_CIRCULARBUFFER_H
47 #define IFX_CIRCULARBUFFER_H 1
48
49 //---------------------------------------------------------------------------
50 #include "Cpu/Std/IfxCpu_Intrinsics.h"
51 //---------------------------------------------------------------------------
52
53 #ifndef IFX_CFG_CIRCULARBUFFER_C
54 #define IFX_CFG_CIRCULARBUFFER_C (1)
55 #endif
56
57 /** \addtogroup IfxLld_lib_datahandling_circularbuffer
58 * \{
59 */
60 /** \brief Return the circular buffer 16 bit value, and post-increment the circular buffer pointer
61 *
62 * \param buffer Specifies circular buffer.
63 *
64 * \return Return the next circular buffer value.
65 */
66 uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer);
67
68 /** \brief Return the circular buffer 32 bit value, and post-increment the circular buffer pointer
69 *
70 * \param buffer Specifies circular buffer.
71 *
72 * \return Return the next circular buffer value.
73 */
74 uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer);
75
76 /** \brief Copy count bytes from the circular buffer to the data array
77 *
78 * \param buffer Specifies circular buffer.
79 * \param data Specifies destination pointer.
80 * \param count Specifies number of bytes to be copied. count MUST be >= 1.
81 *
82 * \return Returns the updated data pointer data = ((uint8*)data) + count
83 */
84 void *Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count);
85
86 /** \brief Copy count 32 bit words from the circular buffer to the data array
87 *
88 * \param buffer Specifies circular buffer.
89 * \param data Specifies destination pointer.
90 * \param count Specifies number of 32 bit words to be copied. count MUST be >= 1.
91 *
92 * \return Returns the updated data pointer data = ((uint32*)data) + count
93 */
94 void *Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count);
95
96 /** \brief Copy count bytes from the data array to the circular buffer
97 *
98 * \param buffer Specifies circular buffer.
99 * \param data Specifies source pointer.
100 * \param count Specifies number of bytes to be copied. count MUST be >= 1.
101 *
102 * \return Returns the updated data pointer data = ((uint8*)data) + count
103 */
104 const void *Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count);
105
106 /** \brief Copy count 32 bit words from the data array to the circular buffer
107 *
108 * \param buffer Specifies circular buffer.
109 * \param data Specifies source pointer.
110 * \param count Specifies number of 32 bit words to be copied. count MUST be >= 1.
111 *
112 * \return Returns the updated data pointer data = ((uint32*)data) + count
113 */
114 const void *Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count);
115
116 /** \} */
117 //---------------------------------------------------------------------------
118 #endif
Ifx_CircularBuffer_write8
const void * Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:139
Ifx_CircularBuffer_read32
void * Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:116
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxCpu_Intrinsics.h
Ifx_CircularBuffer_get32
uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:46
Ifx_CircularBuffer
Circular buffer definition.
Definition: Ifx_Types.h:93
Ifx_CircularBuffer_read8
void * Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:95
Ifx_CircularBuffer_write32
const void * Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:160
Ifx_CircularBuffer_get16
uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:61
uint16
unsigned short uint16
Definition: Platform_Types.h:112


iLLD_TC26B: Ifx_Console.c Source File

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Ifx_Console.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Console.c
3 * \brief Main Ifx_Console module implementation file
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-03-13 15:49:47 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #include <string.h>
43 #include <stdio.h>
44 #include <stdarg.h>
45
46 #include "Ifx_Console.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "Cpu/Std/IfxCpu_Intrinsics.h"
49
50 Ifx_Console Ifx_g_console;
51
52 /**
53 * \brief Initialize the \ref Ifx_g_console object.
54 * \param standardIo Pointer to the IfxStdIf_DPipe object used by the \ref Ifx_g_console.
55 */
56 void Ifx_Console_init(IfxStdIf_DPipe *standardIo)
57 {
58 Ifx_g_console.standardIo = standardIo;
59 Ifx_g_console.align = 0;
60 }
61
62
63 /**
64 * \brief Print formatted string into \ref Ifx_g_console.
65 * \param format printf-compatible formatted string.
66 * \retval TRUE if the string is printed successfully
67 * \retval FALSE if the function failed.
68 */
69 boolean Ifx_Console_print(pchar format, ...)
70 {
71 if (!Ifx_g_console.standardIo->txDisabled)
72 {
73 char message[STDIF_DPIPE_MAX_PRINT_SIZE + 1];
74 Ifx_SizeT count;
75 va_list args;
76 va_start(args, format);
77 vsprintf((char *)message, format, args);
78 va_end(args);
79 count = (Ifx_SizeT)strlen(message);
80 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, count < STDIF_DPIPE_MAX_PRINT_SIZE);
81
82 return IfxStdIf_DPipe_write(Ifx_g_console.standardIo, (void *)message, &count, TIME_INFINITE);
83 }
84 else
85 {
86 return TRUE;
87 }
88 }
89
90
91 /**
92 * \brief Print formatted string into \ref Ifx_g_console.
93 * Indented with a number of spaces.
94 * \param format printf-compatible formatted string.
95 * \retval TRUE if the string is printed successfully
96 * \retval FALSE if the function failed.
97 */
98 boolean Ifx_Console_printAlign(pchar format, ...)
99 {
100 if (!Ifx_g_console.standardIo->txDisabled)
101 {
102 char message[STDIF_DPIPE_MAX_PRINT_SIZE + 1];
103 Ifx_SizeT align, count;
104 char spaces[17] = " ";
105 va_list args;
106 va_start(args, format);
107 vsprintf((char *)message, format, args);
108 va_end(args);
109 count = (Ifx_SizeT)strlen(message);
110 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, count < STDIF_DPIPE_MAX_PRINT_SIZE);
111 align = Ifx_g_console.align;
112
113 while (align > 0)
114 {
115 Ifx_SizeT scount;
116 scount = __min(align, 10);
117 IfxStdIf_DPipe_write(Ifx_g_console.standardIo, (void *)spaces, &scount, TIME_INFINITE);
118 align = align - scount;
119 }
120
121 return IfxStdIf_DPipe_write(Ifx_g_console.standardIo, (void *)message, &count, TIME_INFINITE);
122 }
123 else
124 {
125 return TRUE;
126 }
127 }
IfxStdIf_DPipe_::txDisabled
boolean txDisabled
If disabled is set to TRUE, the output is disabled, else enabled.
Definition: IfxStdIf_DPipe.h:233
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
Ifx_Console.h
Main Console module header file.
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
STDIF_DPIPE_MAX_PRINT_SIZE
#define STDIF_DPIPE_MAX_PRINT_SIZE
Size of the buffer allocated on the stack for the print function.
Definition: IfxStdIf_DPipe.h:74
Ifx_Console::align
sint16 align
Variable for storing the actual (left)indentation level of the Ifx_g_console.
Definition: Ifx_Console.h:58
Ifx_Assert.h
Assert functions.
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
Ifx_Console::standardIo
IfxStdIf_DPipe * standardIo
Pointer to the IfxStdIf_DPipe object used as general console.
Definition: Ifx_Console.h:57
IfxCpu_Intrinsics.h
Ifx_Console
Definition: Ifx_Console.h:55
Ifx_g_console
Ifx_Console Ifx_g_console
Definition: Ifx_Console.c:50
Ifx_Console_print
boolean Ifx_Console_print(pchar format,...)
Print formatted string into Ifx_g_console.
Definition: Ifx_Console.c:69
IfxStdIf_DPipe_write
IFX_INLINE boolean IfxStdIf_DPipe_write(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:259
Ifx_Console_init
void Ifx_Console_init(IfxStdIf_DPipe *standardIo)
Initialize the Ifx_g_console object.
Definition: Ifx_Console.c:56
Ifx_Console_printAlign
boolean Ifx_Console_printAlign(pchar format,...)
Print formatted string into Ifx_g_console. Indented with a number of spaces.
Definition: Ifx_Console.c:98
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
TIME_INFINITE
#define TIME_INFINITE
Definition: Ifx_Types.h:77
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
TRUE
#define TRUE
Definition: Platform_Types.h:90
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53


iLLD_TC26B: Ifx_Console.h Source File

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Ifx_Console.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Console.h
3 * \brief Main Console module header file
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-28 14:15:36 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_sysse_comm_console Console
41 * This module implements "Main Console" functions
42 * \ingroup library_srvsw_sysse_comm
43 *
44 */
45 #ifndef IFX_CONSOLE_H
46 #define IFX_CONSOLE_H 1
47
48 #include "StdIf/IfxStdIf_DPipe.h"
49
50 //----------------------------------------------------------------------------------------
51 #if !defined(IFX_CFG_CONSOLE_INDENT_SIZE)
52 #define IFX_CFG_CONSOLE_INDENT_SIZE (4) /**<\brief Default indentation/alignment size */
53 #endif
54
55 typedef struct
56 {
57 IfxStdIf_DPipe *standardIo; /**<\brief Pointer to the \ref IfxStdIf_DPipe object used as general console */
58 sint16 align; /**<\brief Variable for storing the actual (left)indentation level of the \ref Ifx_g_console */
59 } Ifx_Console;
60
61 IFX_EXTERN Ifx_Console Ifx_g_console; /**< \brief Default main console global variable */
62
63 //----------------------------------------------------------------------------------------
64 /** \addtogroup library_srvsw_sysse_comm_console
65 * \{ */
66
67 #ifndef CONSOLE
68
69 /* FIXME (Alann to discuss with Dian) there is no requirement to define multiple console, CONSOLE should be removed, and APIs used instead */
70 /** \brief Alias \ref Ifx_g_console object (by value) */
71 #define CONSOLE Ifx_g_console
72
73 /** \brief Return pointer to the default console object
74 *
75 * User can override this function by defining new \ref CONSOLE macro and this function
76 * externally, e.g. inside Ifx_Cfg.h file.*/
77 IFX_INLINE IfxStdIf_DPipe *Ifx_Console_getIo(void)
78 {
79 return Ifx_g_console.standardIo;
80 }
81
82
83 #endif
84
85 IFX_EXTERN void Ifx_Console_init(IfxStdIf_DPipe *standardIo);
86 IFX_EXTERN boolean Ifx_Console_print(pchar format, ...);
87 IFX_EXTERN boolean Ifx_Console_printAlign(pchar format, ...);
88
89 /**
90 * \brief Decrement the alignment/indentation using the given value
91 * \param value the increment. If value == 0, \ref IFX_CFG_CONSOLE_INDENT_SIZE will be used.
92 */
93 IFX_INLINE void Ifx_Console_decrAlign(sint16 value)
94 {
95 value = (sint16)(Ifx_g_console.align - ((value == 0U) ? IFX_CFG_CONSOLE_INDENT_SIZE : value));
96 Ifx_g_console.align = (value > 0) ? value : 0;
97 }
98
99
100 /**
101 * \brief Increment the alignment/indentation using the given value
102 * \param value the increment. If value == 0, \ref IFX_CFG_CONSOLE_INDENT_SIZE will be used.
103 */
104 IFX_INLINE void Ifx_Console_incrAlign(sint16 value)
105 {
106 Ifx_g_console.align += ((value == 0) ? (sint16)IFX_CFG_CONSOLE_INDENT_SIZE : value);
107 }
108
109
110 /** \} */
111 //----------------------------------------------------------------------------------------
112 #endif
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
Ifx_Console::align
sint16 align
Variable for storing the actual (left)indentation level of the Ifx_g_console.
Definition: Ifx_Console.h:58
Ifx_Console_incrAlign
IFX_INLINE void Ifx_Console_incrAlign(sint16 value)
Increment the alignment/indentation using the given value.
Definition: Ifx_Console.h:104
Ifx_Console::standardIo
IfxStdIf_DPipe * standardIo
Pointer to the IfxStdIf_DPipe object used as general console.
Definition: Ifx_Console.h:57
Ifx_Console
Definition: Ifx_Console.h:55
Ifx_Console_getIo
IFX_INLINE IfxStdIf_DPipe * Ifx_Console_getIo(void)
Return pointer to the default console object.
Definition: Ifx_Console.h:77
sint16
short sint16
Definition: Platform_Types.h:129
Ifx_Console_decrAlign
IFX_INLINE void Ifx_Console_decrAlign(sint16 value)
Decrement the alignment/indentation using the given value.
Definition: Ifx_Console.h:93
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IFX_CFG_CONSOLE_INDENT_SIZE
#define IFX_CFG_CONSOLE_INDENT_SIZE
Default indentation/alignment size.
Definition: Ifx_Console.h:52
Ifx_Console_print
IFX_EXTERN boolean Ifx_Console_print(pchar format,...)
Print formatted string into Ifx_g_console.
Definition: Ifx_Console.c:69
Ifx_Console_init
IFX_EXTERN void Ifx_Console_init(IfxStdIf_DPipe *standardIo)
Initialize the Ifx_g_console object.
Definition: Ifx_Console.c:56
Ifx_Console_printAlign
IFX_EXTERN boolean Ifx_Console_printAlign(pchar format,...)
Print formatted string into Ifx_g_console. Indented with a number of spaces.
Definition: Ifx_Console.c:98
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
Ifx_g_console
IFX_EXTERN Ifx_Console Ifx_g_console
Default main console global variable.
Definition: Ifx_Console.h:61
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53


iLLD_TC26B: Ifx_Crc.c Source File

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Ifx_Crc.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Crc.c
3 * \brief CRC algorithm
4 *
5 * \version disabled
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41 #include "Ifx_Crc.h"
42
43 uint32 Ifx_Crc_reflect(uint32 crc, sint32 bitnum);
44
45 boolean Ifx_Crc_init(Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
46 {
47 sint32 i;
48 uint32 bit, crc;
49
50 if (crcinit != (crcinit & table->crcmask))
51 {
52 //IfxStdIf_DPipe_print(io,"ERROR, invalid crcinit."ENDL);
53 return FALSE;
54 }
55
56 if (crcxor != (crcxor & table->crcmask))
57 {
58 //IfxStdIf_DPipe_print(io,"ERROR, invalid crcxor."ENDL);
59 return FALSE;
60 }
61
62 driver->table = table;
63 driver->crcxor = crcxor;
64 driver->refout = refout;
65
66 // compute missing initial CRC value
67
68 if (!direct)
69 {
70 driver->crcinit_nondirect = crcinit;
71 crc = crcinit;
72
73 for (i = 0; i < table->order; i++)
74 {
75 bit = crc & table->crchighbit;
76 crc <<= 1;
77
78 if (bit)
79 {
80 crc ^= table->polynom;
81 }
82 }
83
84 crc &= table->crcmask;
85 driver->crcinit_direct = crc;
86 }
87
88 else
89 {
90 driver->crcinit_direct = crcinit;
91 crc = crcinit;
92
93 for (i = 0; i < table->order; i++)
94 {
95 bit = crc & 1;
96
97 if (bit)
98 {
99 crc ^= table->polynom;
100 }
101
102 crc >>= 1;
103
104 if (bit)
105 {
106 crc |= table->crchighbit;
107 }
108 }
109
110 driver->crcinit_nondirect = crc;
111 }
112
113 return TRUE;
114 }
115
116
117 boolean Ifx_Crc_createTable(Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
118 {
119 uint32 crcmask;
120 // at first, compute constant bit masks for whole CRC and CRC high bit
121
122 crcmask = ((((uint32)1 << (order - 1)) - 1) << 1) | 1;
123
124 // check parameters
125
126 if ((order < 1) || (order > 32))
127 {
128 //IfxStdIf_DPipe_print(io,"ERROR, invalid order, it must be between 1..32."ENDL);
129 return FALSE;
130 }
131
132 if (polynom != (polynom & crcmask))
133 {
134 //IfxStdIf_DPipe_print(io,"ERROR, invalid polynom."ENDL);
135 return FALSE;
136 }
137
138 table->order = order;
139 table->polynom = polynom;
140 table->refin = refin;
141 table->crchighbit = (uint32)1 << (order - 1);
142 table->crcmask = crcmask;
143 // generate lookup table
144 // make CRC lookup table used by table algorithms
145 {
146 sint32 i, j;
147 uint32 bit, crc;
148
149 for (i = 0; i < 256; i++)
150 {
151 crc = (uint32)i;
152
153 if (refin)
154 {
155 crc = Ifx_Crc_reflect(crc, 8);
156 }
157
158 crc <<= order - 8;
159
160 for (j = 0; j < 8; j++)
161 {
162 bit = crc & table->crchighbit;
163 crc <<= 1;
164
165 if (bit)
166 {
167 crc ^= polynom;
168 }
169 }
170
171 if (refin)
172 {
173 crc = Ifx_Crc_reflect(crc, order);
174 }
175
176 crc &= crcmask;
177
178 if (order <= 8)
179 {
180 uint8 *crctab = (uint8 *)((uint32)table + sizeof(Ifc_Crc_Table));
181 crctab[i] = (uint8)crc;
182 }
183 else if (order <= 16)
184 {
185 uint16 *crctab = (uint16 *)((uint32)table + sizeof(Ifc_Crc_Table));
186 crctab[i] = (uint16)crc;
187 }
188 else
189 {
190 uint32 *crctab = (uint32 *)((uint32)table + sizeof(Ifc_Crc_Table));
191 crctab[i] = crc;
192 }
193 }
194 }
195 return TRUE;
196 }
197
198
199 // subroutines
200
201 uint32 Ifx_Crc_reflect(uint32 crc, sint32 bitnum)
202 {
203 // reflects the lower 'bitnum' bits of 'crc'
204
205 uint32 i, j = 1, crcout = 0;
206
207 for (i = (uint32)1 << (bitnum - 1); i; i >>= 1)
208 {
209 if (crc & i)
210 {
211 crcout |= j;
212 }
213
214 j <<= 1;
215 }
216
217 return crcout;
218 }
219
220
221 uint32 Ifx_Crc_tableFast(Ifc_Crc *driver, uint8 *p, uint32 len)
222 {
223 // fast lookup table algorithm without augmented zero bytes, e.g. used in pkzip.
224 // only usable with polynom orders of 8, 16, 24 or 32.
225
226 uint32 crc = driver->crcinit_direct;
227 sint32 orderMinusHeight = driver->table->order - 8;
228
229 if (driver->table->refin)
230 {
231 crc = Ifx_Crc_reflect(crc, driver->table->order);
232 }
233
234 if (driver->table->order <= 8)
235 {
236 uint8 *crctab = (uint8 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
237
238 if (!driver->table->refin)
239 {
240 while (len--)
241 {
242 crc = (crc << 8) ^ crctab[((crc >> (orderMinusHeight)) & 0xff) ^ *p++];
243 }
244 }
245 else
246 {
247 while (len--)
248 {
249 crc = (crc >> 8) ^ crctab[(crc & 0xff) ^ *p++];
250 }
251 }
252 }
253 else if (driver->table->order <= 16)
254 {
255 uint16 *crctab = (uint16 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
256
257 if (!driver->table->refin)
258 {
259 while (len--)
260 {
261 crc = (crc << 8) ^ crctab[((crc >> (orderMinusHeight)) & 0xff) ^ *p++];
262 }
263 }
264 else
265 {
266 while (len--)
267 {
268 crc = (crc >> 8) ^ crctab[(crc & 0xff) ^ *p++];
269 }
270 }
271 }
272 else
273 {
274 uint32 *crctab = (uint32 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
275
276 if (!driver->table->refin)
277 {
278 while (len--)
279 {
280 crc = (crc << 8) ^ crctab[((crc >> (orderMinusHeight)) & 0xff) ^ *p++];
281 }
282 }
283 else
284 {
285 while (len--)
286 {
287 crc = (crc >> 8) ^ crctab[(crc & 0xff) ^ *p++];
288 }
289 }
290 }
291
292 if (driver->refout ^ driver->table->refin)
293 {
294 crc = Ifx_Crc_reflect(crc, driver->table->order);
295 }
296
297 crc ^= driver->crcxor;
298 crc &= driver->table->crcmask;
299
300 return crc;
301 }
302
303
304 uint32 Ifx_Crc_table(Ifc_Crc *driver, uint8 *p, uint32 len)
305 {
306 // normal lookup table algorithm with augmented zero bytes.
307 // only usable with polynom orders of 8, 16, 24 or 32.
308
309 uint32 crc = driver->crcinit_nondirect;
310 sint32 orderMinusHeight = driver->table->order - 8;
311
312 if (driver->table->refin)
313 {
314 crc = Ifx_Crc_reflect(crc, driver->table->order);
315 }
316
317 if (driver->table->order <= 8)
318 {
319 uint8 *crctab = (uint8 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
320
321 if (!driver->table->refin)
322 {
323 while (len--)
324 {
325 crc = ((crc << 8) | *p++) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
326 }
327 }
328 else
329 {
330 while (len--)
331 {
332 crc = ((crc >> 8) | (*p++ << (orderMinusHeight))) ^ crctab[crc & 0xff];
333 }
334 }
335
336 if (!driver->table->refin)
337 {
338 while (++len < (driver->table->order >> 3))
339 {
340 crc = (crc << 8) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
341 }
342 }
343 else
344 {
345 while (++len < (driver->table->order >> 3))
346 {
347 crc = (crc >> 8) ^ crctab[crc & 0xff];
348 }
349 }
350 }
351 else if (driver->table->order <= 16)
352 {
353 uint16 *crctab = (uint16 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
354
355 if (!driver->table->refin)
356 {
357 while (len--)
358 {
359 crc = ((crc << 8) | *p++) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
360 }
361 }
362 else
363 {
364 while (len--)
365 {
366 crc = ((crc >> 8) | (*p++ << (orderMinusHeight))) ^ crctab[crc & 0xff];
367 }
368 }
369
370 if (!driver->table->refin)
371 {
372 while (++len < (driver->table->order >> 3))
373 {
374 crc = (crc << 8) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
375 }
376 }
377 else
378 {
379 while (++len < (driver->table->order >> 3))
380 {
381 crc = (crc >> 8) ^ crctab[crc & 0xff];
382 }
383 }
384 }
385 else if (driver->table->order <= 32)
386 {
387 uint32 *crctab = (uint32 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
388
389 if (!driver->table->refin)
390 {
391 while (len--)
392 {
393 crc = ((crc << 8) | *p++) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
394 }
395 }
396 else
397 {
398 while (len--)
399 {
400 crc = ((crc >> 8) | (*p++ << (orderMinusHeight))) ^ crctab[crc & 0xff];
401 }
402 }
403
404 if (!driver->table->refin)
405 {
406 while (++len < (driver->table->order >> 3))
407 {
408 crc = (crc << 8) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
409 }
410 }
411 else
412 {
413 while (++len < (driver->table->order >> 3))
414 {
415 crc = (crc >> 8) ^ crctab[crc & 0xff];
416 }
417 }
418 }
419
420 if (driver->refout ^ driver->table->refin)
421 {
422 crc = Ifx_Crc_reflect(crc, driver->table->order);
423 }
424
425 crc ^= driver->crcxor;
426 crc &= driver->table->crcmask;
427
428 return crc;
429 }
430
431
432 uint32 Ifx_Crc_bitByBit(Ifc_Crc *driver, uint8 *p, uint32 len)
433 {
434 // bit by bit algorithm with augmented zero bytes.
435 // does not use lookup table, suited for polynom driver->table->orders between 1...32.
436
437 uint32 i, j, c, bit;
438 uint32 crc = driver->crcinit_nondirect;
439
440 for (i = 0; i < len; i++)
441 {
442 c = (uint32)*p++;
443
444 if (driver->table->refin)
445 {
446 c = Ifx_Crc_reflect(c, 8);
447 }
448
449 for (j = 0x80; j; j >>= 1)
450 {
451 bit = crc & driver->table->crchighbit;
452 crc <<= 1;
453
454 if (c & j)
455 {
456 crc |= 1;
457 }
458
459 if (bit)
460 {
461 crc ^= driver->table->polynom;
462 }
463 }
464 }
465
466 for (i = 0; i < driver->table->order; i++)
467 {
468 bit = crc & driver->table->crchighbit;
469 crc <<= 1;
470
471 if (bit)
472 {
473 crc ^= driver->table->polynom;
474 }
475 }
476
477 if (driver->refout)
478 {
479 crc = Ifx_Crc_reflect(crc, driver->table->order);
480 }
481
482 crc ^= driver->crcxor;
483 crc &= driver->table->crcmask;
484
485 return crc;
486 }
487
488
489 uint32 Ifx_Crc_bitByBitFast(Ifc_Crc *driver, uint8 *p, uint32 len)
490 {
491 // fast bit by bit algorithm without augmented zero bytes.
492 // does not use lookup table, suited for polynom driver->table->orders between 1...32.
493
494 uint32 i, j, c, bit;
495 uint32 crc = driver->crcinit_direct;
496
497 for (i = 0; i < len; i++)
498 {
499 c = (uint32)*p++;
500
501 if (driver->table->refin)
502 {
503 c = Ifx_Crc_reflect(c, 8);
504 }
505
506 for (j = 0x80; j; j >>= 1)
507 {
508 bit = crc & driver->table->crchighbit;
509 crc <<= 1;
510
511 if (c & j)
512 {
513 bit ^= driver->table->crchighbit;
514 }
515
516 if (bit)
517 {
518 crc ^= driver->table->polynom;
519 }
520 }
521 }
522
523 if (driver->refout)
524 {
525 crc = Ifx_Crc_reflect(crc, driver->table->order);
526 }
527
528 crc ^= driver->crcxor;
529 crc &= driver->table->crcmask;
530
531 return crc;
532 }
533
534
535 #if CRC_ENABLE_DPIPE
536 void Ifx_Crc_printTable(Ifc_Crc_Table *table, IfxStdIf_DPipe *io)
537 {
538 sint32 i = 0;
539
540 uint32 typeSize;
541
542 if (table->order <= 8)
543 {
544 typeSize = 8;
545 }
546 else if (table->order <= 16)
547 {
548 typeSize = 16;
549 }
550 else
551 {
552 typeSize = 32;
553 }
554
555 IfxStdIf_DPipe_print(io, ENDL "Ifc_Crc_Table%d <tabe name> = {" ENDL, typeSize);
556 IfxStdIf_DPipe_print(io, " .data.order=%d," ENDL, table->order);
557 IfxStdIf_DPipe_print(io, " .data.polynom=0x%X," ENDL, table->polynom);
558 IfxStdIf_DPipe_print(io, " .data.refin=%d," ENDL, table->refin);
559 IfxStdIf_DPipe_print(io, " .data.crchighbit=%d," ENDL, table->crchighbit);
560 IfxStdIf_DPipe_print(io, " .data.crcmask=0x%X," ENDL, table->crcmask);
561 IfxStdIf_DPipe_print(io, " .crctab={" ENDL);
562 IfxStdIf_DPipe_print(io, " ");
563
564 while (i < 256)
565 {
566 if (table->order <= 4)
567 {
568 uint8 *crctab = (uint8 *)((uint32)table + sizeof(Ifc_Crc_Table));
569 IfxStdIf_DPipe_print(io, "0x%01X, ", crctab[i]);
570 }
571 else if (table->order <= 8)
572 {
573 uint8 *crctab = (uint8 *)((uint32)table + sizeof(Ifc_Crc_Table));
574 IfxStdIf_DPipe_print(io, "0x%02X, ", crctab[i]);
575 }
576 else if (table->order <= 16)
577 {
578 uint16 *crctab = (uint16 *)((uint32)table + sizeof(Ifc_Crc_Table));
579 IfxStdIf_DPipe_print(io, "0x%04X, ", crctab[i]);
580 }
581 else if (table->order <= 24)
582 {
583 uint32 *crctab = (uint32 *)((uint32)table + sizeof(Ifc_Crc_Table));
584 IfxStdIf_DPipe_print(io, "0x%06X, ", crctab[i]);
585 }
586 else
587 {
588 uint32 *crctab = (uint32 *)((uint32)table + sizeof(Ifc_Crc_Table));
589 IfxStdIf_DPipe_print(io, "0x%08X, ", crctab[i]);
590 }
591
592 i++;
593
594 if ((i % 16) == 0)
595 {
596 IfxStdIf_DPipe_print(io, ENDL " ");
597 }
598 }
599
600 IfxStdIf_DPipe_print(io, " }" ENDL);
601 IfxStdIf_DPipe_print(io, "};" ENDL);
602 }
603
604
605 boolean Ifx_Crc_Test(Ifc_Crc *driver, uint8 *string, uint32 length, IfxStdIf_DPipe *io)
606 {
607 IfxStdIf_DPipe_print(io, "" ENDL);
608 IfxStdIf_DPipe_print(io, "CRC tester v1.1 written on 13/01/2003 by Sven Reifegerste (zorc/reflex)" ENDL);
609 IfxStdIf_DPipe_print(io, "-----------------------------------------------------------------------" ENDL);
610 IfxStdIf_DPipe_print(io, "" ENDL);
611 IfxStdIf_DPipe_print(io, "Parameters:" ENDL);
612 IfxStdIf_DPipe_print(io, "" ENDL);
613 IfxStdIf_DPipe_print(io, " polynom : 0x%x" ENDL, driver->table->polynom);
614 IfxStdIf_DPipe_print(io, " order : %d" ENDL, driver->table->order);
615 IfxStdIf_DPipe_print(io, " crcinit : 0x%x direct, 0x%x nondirect" ENDL, driver->crcinit_direct, driver->crcinit_nondirect);
616 IfxStdIf_DPipe_print(io, " crcxor : 0x%x" ENDL, driver->crcxor);
617 IfxStdIf_DPipe_print(io, " refin : %d" ENDL, driver->table->refin);
618 IfxStdIf_DPipe_print(io, " refout : %d" ENDL, driver->refout);
619 IfxStdIf_DPipe_print(io, "" ENDL);
620 // IfxStdIf_DPipe_print(io," data string : '%s' (%d bytes)"ENDL, string, stringLength);
621 IfxStdIf_DPipe_print(io, "" ENDL);
622 IfxStdIf_DPipe_print(io, "Results:" ENDL);
623 IfxStdIf_DPipe_print(io, "" ENDL);
624 #if 0
625 IfxCpu_Perf perf;
626 uint32 result;
627
628 IfxCpu_resetAndStartCounters(IfxCpu_CounterMode_normal);
629 result = Ifx_Crc_bitByBit(driver, (uint8 *)string, length);
630 perf = IfxCpu_stopCounters();
631 IfxStdIf_DPipe_print(io, " crc bit by bit : 0x%X, %d cycles" ENDL, result, perf.clock.counter);
632
633 IfxCpu_resetAndStartCounters(IfxCpu_CounterMode_normal);
634 result = Ifx_Crc_bitByBitFast(driver, (uint8 *)string, length);
635 perf = IfxCpu_stopCounters();
636 IfxStdIf_DPipe_print(io, " crc bit by bit fast : 0x%X, %d cycles" ENDL, result, perf.clock.counter);
637
638 IfxCpu_resetAndStartCounters(IfxCpu_CounterMode_normal);
639 result = Ifx_Crc_table(driver, (uint8 *)string, length);
640 perf = IfxCpu_stopCounters();
641 IfxStdIf_DPipe_print(io, " crc table : 0x%X, %d cycles" ENDL, result, perf.clock.counter);
642
643 IfxCpu_resetAndStartCounters(IfxCpu_CounterMode_normal);
644 result = Ifx_Crc_tableFast(driver, (uint8 *)string, length);
645 perf = IfxCpu_stopCounters();
646 IfxStdIf_DPipe_print(io, " crc table fast : 0x%X, %d cycles" ENDL, result, perf.clock.counter);
647
648 #endif
649 return TRUE;
650 }
651
652
653 #endif
Ifc_Crc
Definition: Ifx_Crc.h:85
Ifc_Crc_Table::polynom
uint32 polynom
Definition: Ifx_Crc.h:62
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
IfxCpu_stopCounters
IFX_INLINE IfxCpu_Perf IfxCpu_stopCounters(void)
Stop instruction and clock counters, return their values.
Definition: IfxCpu.h:1006
IfxCpu_Perf
Performance counter result.
Definition: IfxCpu.h:169
Ifc_Crc::crcxor
uint32 crcxor
Definition: Ifx_Crc.h:87
uint32
unsigned long uint32
Definition: Platform_Types.h:116
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:64
Ifc_Crc_Table::crcmask
uint32 crcmask
Definition: Ifx_Crc.h:65
IfxStdIf_DPipe_print
void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:50
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCpu_Perf::clock
IfxCpu_Counter clock
CPU clock counter.
Definition: IfxCpu.h:172
Ifx_Crc_tableFast
uint32 Ifx_Crc_tableFast(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:221
Ifx_Crc_table
uint32 Ifx_Crc_table(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:304
Ifc_Crc::crcinit_direct
uint32 crcinit_direct
Definition: Ifx_Crc.h:90
Ifc_Crc::refout
sint32 refout
Definition: Ifx_Crc.h:88
Ifx_Crc_bitByBit
uint32 Ifx_Crc_bitByBit(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:432
Ifx_Crc.h
CRC algorithm.
Ifc_Crc_Table::order
sint32 order
Definition: Ifx_Crc.h:61
IfxCpu_resetAndStartCounters
IFX_INLINE void IfxCpu_resetAndStartCounters(IfxCpu_CounterMode mode)
Reset and start instruction, clock and multi counters.
Definition: IfxCpu.h:911
Ifc_Crc_Table::crchighbit
uint32 crchighbit
Definition: Ifx_Crc.h:64
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCpu_Counter::counter
uint32 counter
Counter value.
Definition: IfxCpu.h:159
Ifx_Crc_init
boolean Ifx_Crc_init(Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
Definition: Ifx_Crc.c:45
Ifc_Crc_Table::refin
sint32 refin
Definition: Ifx_Crc.h:63
Ifc_Crc_Table
Definition: Ifx_Crc.h:59
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_Crc_createTable
boolean Ifx_Crc_createTable(Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
Definition: Ifx_Crc.c:117
IfxCpu_CounterMode_normal
Normal counter mode:the counter increments on their respective triggers.
Definition: IfxCpu.h:143
TRUE
#define TRUE
Definition: Platform_Types.h:90
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx_Crc_reflect
uint32 Ifx_Crc_reflect(uint32 crc, sint32 bitnum)
Definition: Ifx_Crc.c:201
Ifx_Crc_bitByBitFast
uint32 Ifx_Crc_bitByBitFast(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:489
Ifc_Crc::crcinit_nondirect
uint32 crcinit_nondirect
Definition: Ifx_Crc.h:91
Ifc_Crc::table
const Ifc_Crc_Table * table
Definition: Ifx_Crc.h:92


iLLD_TC26B: Ifx_Crc.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_Crc.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Crc.h
3 * \brief CRC algorithm
4 *
5 * \version disabled
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_sysse_math_crc CRC
41 * This module implements CRC algorithm
42 * \ingroup library_srvsw_sysse_math
43 *
44 */
45
46 #ifndef IFX_CRC_H
47 #define IFX_CRC_H 1
48 //---------------------------------------------------------------------------
49 #include "Cpu/Std/Ifx_Types.h"
50
51 #ifndef CRC_ENABLE_DPIPE
52 #define CRC_ENABLE_DPIPE 0
53 #endif
54
55 #if CRC_ENABLE_DPIPE
56 #include "IfxStdIf_DPipe.h"
57 #endif
58 //---------------------------------------------------------------------------
59 typedef struct
60 {
61 sint32 order;
62 uint32 polynom;
63 sint32 refin;
64 uint32 crchighbit;
65 uint32 crcmask;
66 }Ifc_Crc_Table;
67 typedef struct
68 {
69 Ifc_Crc_Table data; /**< \brief CRC data, must be 1st member of the struct */
70 uint8 crctab[256]; /**< \brief CRC Table, must be 2st member of the struct */
71 }Ifc_Crc_Table8;
72
73 typedef struct
74 {
75 Ifc_Crc_Table data; /**< \brief CRC data, must be 1st member of the struct */
76 uint16 crctab[256]; /**< \brief CRC Table, must be 2st member of the struct */
77 }Ifc_Crc_Table16;
78
79 typedef struct
80 {
81 Ifc_Crc_Table data; /**< \brief CRC data, must be 1st member of the struct */
82 uint32 crctab[256]; /**< \brief CRC Table, must be 2st member of the struct */
83 }Ifc_Crc_Table32;
84
85 typedef struct
86 {
87 uint32 crcxor;
88 sint32 refout;
89
90 uint32 crcinit_direct;
91 uint32 crcinit_nondirect;
92 const Ifc_Crc_Table *table;
93 }Ifc_Crc;
94
95 /** \addtogroup library_srvsw_sysse_math_crc
96 * \{ */
97 /**
98 * \param direct [0,1] specifies the kind of algorithm: 1=direct, no augmented zero bits
99 * \param driver pointer to the crc driver
100 * \param table pointer to crc table
101 * \param direct direct
102 * \param crcinit is the initial CRC value belonging to that algorithm
103 * \param crcxor is the final XOR value
104 * \param refout [0,1] specifies if the CRC will be reflected before XOR
105 * \param table pointer to the table: Ifc_Crc_Table8, Ifc_Crc_Table16, Ifc_Crc_Table32
106 */
107 boolean Ifx_Crc_init(Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor);
108 /**
109 * \param table pointer to the crc table
110 * \param order [1..32] is the CRC polynom order, counted without the leading '1' bit
111 * \param polynom is the CRC polynom without leading '1' bit
112 * \param refin [0,1] specifies if a data byte is reflected before processing (UART) or not
113 */
114 boolean Ifx_Crc_createTable(Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin);
115
116 #if CRC_ENABLE_DPIPE
117 boolean Ifx_Crc_Test(Ifc_Crc *driver, uint8 *string, uint32 length, IfxStdIf_DPipe *io);
118 void Ifx_Crc_printTable(Ifc_Crc_Table *table, IfxStdIf_DPipe *io);
119 #endif
120 uint32 Ifx_Crc_tableFast(Ifc_Crc *driver, uint8 *p, uint32 len);
121 uint32 Ifx_Crc_table(Ifc_Crc *driver, uint8 *p, uint32 len);
122 uint32 Ifx_Crc_bitByBit(Ifc_Crc *driver, uint8 *p, uint32 len);
123 uint32 Ifx_Crc_bitByBitFast(Ifc_Crc *driver, uint8 *p, uint32 len);
124 /** \} */
125
126 //---------------------------------------------------------------------------
127 #endif // IFX_CRC_H
Ifc_Crc
Definition: Ifx_Crc.h:85
Ifc_Crc_Table::polynom
uint32 polynom
Definition: Ifx_Crc.h:62
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
Ifc_Crc::crcxor
uint32 crcxor
Definition: Ifx_Crc.h:87
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifc_Crc_Table::crcmask
uint32 crcmask
Definition: Ifx_Crc.h:65
Ifx_Crc_tableFast
uint32 Ifx_Crc_tableFast(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:221
Ifx_Crc_table
uint32 Ifx_Crc_table(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:304
Ifc_Crc::crcinit_direct
uint32 crcinit_direct
Definition: Ifx_Crc.h:90
Ifc_Crc::refout
sint32 refout
Definition: Ifx_Crc.h:88
Ifc_Crc_Table8::data
Ifc_Crc_Table data
CRC data, must be 1st member of the struct.
Definition: Ifx_Crc.h:69
Ifx_Crc_bitByBit
uint32 Ifx_Crc_bitByBit(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:432
Ifc_Crc_Table16
Definition: Ifx_Crc.h:73
Ifc_Crc_Table32
Definition: Ifx_Crc.h:79
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
Ifc_Crc_Table::order
sint32 order
Definition: Ifx_Crc.h:61
Ifc_Crc_Table::crchighbit
uint32 crchighbit
Definition: Ifx_Crc.h:64
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_Crc_init
boolean Ifx_Crc_init(Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
Definition: Ifx_Crc.c:45
Ifc_Crc_Table::refin
sint32 refin
Definition: Ifx_Crc.h:63
Ifc_Crc_Table
Definition: Ifx_Crc.h:59
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_Crc_createTable
boolean Ifx_Crc_createTable(Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
Definition: Ifx_Crc.c:117
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifc_Crc_Table8
Definition: Ifx_Crc.h:67
Ifx_Crc_bitByBitFast
uint32 Ifx_Crc_bitByBitFast(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:489
Ifc_Crc::crcinit_nondirect
uint32 crcinit_nondirect
Definition: Ifx_Crc.h:91
Ifc_Crc::table
const Ifc_Crc_Table * table
Definition: Ifx_Crc.h:92


iLLD_TC26B: Ifx_DateTime.c Source File

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Ifx_DateTime.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_DateTime.c
3 * \brief Date and time functions.
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:37 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #include "Ifx_DateTime.h"
43 #include "SysSe/Bsp/Bsp.h"
44
45 /* FIXME make compatible to unix time */
46 sint32 g_DateTimeOffset;
47
48 /** \brief Get the real time
49 * Note that this function is valid only if DateTime_set() has been called */
50 void DateTime_get(Ifx_DateTime *dt)
51 {
52 sint32 seconds = (sint32)(now() / TimeConst_1s);
53
54 seconds = seconds + g_DateTimeOffset;
55 dt->hours = seconds / 3600;
56 dt->minutes = seconds / 60;
57 dt->minutes = dt->minutes % 60;
58 dt->seconds = seconds % 60;
59 }
60
61
62 /** \brief Set the real time */
63 void DateTime_set(Ifx_DateTime *dt)
64 {
65 sint32 seconds = dt->seconds - ((sint32)(now() / TimeConst_1s));
66
67 seconds = seconds + (3600 * dt->hours);
68 seconds = seconds + (60 * dt->minutes);
69 g_DateTimeOffset = seconds;
70 }
DateTime_set
void DateTime_set(Ifx_DateTime *dt)
Set the real time.
Definition: Ifx_DateTime.c:63
now
IFX_INLINE Ifx_TickTime now(void)
Return system timer value (critical section).
Definition: Bsp.h:218
Ifx_DateTime::hours
sint32 hours
Definition: Ifx_DateTime.h:50
Ifx_DateTime::minutes
sint32 minutes
Definition: Ifx_DateTime.h:51
Bsp.h
Board support package.
DateTime_get
void DateTime_get(Ifx_DateTime *dt)
Get the real time Note that this function is valid only if DateTime_set() has been called...
Definition: Ifx_DateTime.c:50
Ifx_DateTime
Definition: Ifx_DateTime.h:48
Ifx_DateTime.h
Date and time functions.
Ifx_DateTime::seconds
sint32 seconds
Definition: Ifx_DateTime.h:52
TimeConst_1s
#define TimeConst_1s
time constant equal to 1s
Definition: Bsp.h:201
sint32
long sint32
Definition: Platform_Types.h:134
g_DateTimeOffset
sint32 g_DateTimeOffset
Definition: Ifx_DateTime.c:46


iLLD_TC26B: Ifx_DateTime.h Source File

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Ifx_DateTime.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_DateTime.h
3 * \brief Date and time functions.
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-28 14:15:40 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_sysse_time_datetime DateTime
41 * This module implements the Date-Time functions.
42 * \ingroup library_srvsw_sysse_time
43 */
44
45 #ifndef REALTIME_H_
46 #define REALTIME_H_ 1
47 #include "Cpu/Std/Ifx_Types.h"
48 typedef struct
49 {
50 sint32 hours;
51 sint32 minutes;
52 sint32 seconds;
53 } Ifx_DateTime;
54 /** \addtogroup library_srvsw_sysse_time_datetime
55 * \{ */
56 IFX_EXTERN void DateTime_set(Ifx_DateTime *time);
57 IFX_EXTERN void DateTime_get(Ifx_DateTime *time);
58 /** \} */
59
60 #endif /* REALTIME_H_ */
DateTime_set
IFX_EXTERN void DateTime_set(Ifx_DateTime *time)
Set the real time.
Definition: Ifx_DateTime.c:63
Ifx_DateTime::hours
sint32 hours
Definition: Ifx_DateTime.h:50
Ifx_DateTime::minutes
sint32 minutes
Definition: Ifx_DateTime.h:51
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
DateTime_get
IFX_EXTERN void DateTime_get(Ifx_DateTime *time)
Get the real time Note that this function is valid only if DateTime_set() has been called...
Definition: Ifx_DateTime.c:50
Ifx_DateTime
Definition: Ifx_DateTime.h:48
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_DateTime::seconds
sint32 seconds
Definition: Ifx_DateTime.h:52
sint32
long sint32
Definition: Platform_Types.h:134


iLLD_TC26B: Ifx_FftF32.c Source File

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Ifx_FftF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_FftF32.c
3 * \brief Floating-point Fast Fourier Transform
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "Ifx_FftF32.h"
44 #include <math.h>
45
46 //#include "Compiler.h"
47
48 cfloat32 *Ifx_FftF32_generateTwiddleFactor(cfloat32 *TF, short nX)
49 {
50 int i;
51 double Theta;
52
53 // prepare twiddle coefficients
54 for (i = 0; i < nX / 2; i++)
55 {
56 Theta = 2 * IFX_PI * i / nX;
57
58 TF[i].real = (float32)(cosf(Theta));
59 TF[i].imag = (float32)(-sinf(Theta));
60 }
61
62 return TF;
63 }
64
65
66 /******************************************************************************/
67 unsigned short Ifx_FftF32_reverseBits(unsigned short n, unsigned bits)
68 {
69 /* This code is from:
70 * http://graphics.stanford.edu/~seander/bithacks.html
71 * */
72 unsigned long v = n; // 32-bit word to reverse bit order
73
74 // swap odd and even bits
75 v = ((v >> 1) & 0x55555555UL) | ((v & 0x55555555UL) << 1);
76 // swap consecutive pairs
77 v = ((v >> 2) & 0x33333333UL) | ((v & 0x33333333UL) << 2);
78 // swap nibbles ...
79 v = ((v >> 4) & 0x0F0F0F0FUL) | ((v & 0x0F0F0F0FUL) << 4);
80 // swap bytes
81 v = ((v >> 8) & 0x00FF00FFUL) | ((v & 0x00FF00FFUL) << 8);
82 // swap 2-byte long pairs
83 v = (v >> 16) | (v << 16);
84
85 v = v >> (32 - bits);
86 return (unsigned short)v;
87 }
88
89
90 /******************************************************************************/
91 void Ifx_FftF32_radix2DecimationInTime(cfloat32 *R, unsigned long p)
92 {
93 /* http://www.engineeringproductivitytools.com/stuff/T0001/PT04.HTM#Head317
94 * */
95 /*Perform in place Ifx_FftF32_radix2DecimationInTime of 2^p points (=size of f)
96 * N.B. The input array f is in bit reversed order! So all the
97 * 'even' input samples are in the 'top' half, all the 'odd'
98 * input samples are in the 'bottom' halR..etc (recursively).
99 */
100 /*Ifx_FftF32_radix2DecimationInTime*/
101 unsigned long Bp, Np, Npx, P, b, k, BaseT, BaseB;
102 cfloat32 top, bot;
103 /*initialise pass parameters*/
104 Bp = 1 << (p - 1); /*No. of blocks*/
105 Np = 2; /*No. of points in each block*/
106
107 /*perform p passes*/
108 for (P = 0; P < p; P++)
109 {
110 /*pass loop*/
111 Npx = Np >> 1; /*No. of butterflies*/
112 BaseT = 0; /*Reset even base index*/
113
114 for (b = 0; b < Bp; b++)
115 {
116 /*block loop*/
117 BaseB = BaseT + Npx; /*calc odd base index*/
118
119 for (k = 0; k < Npx; k++)
120 {
121 //printf("P = %d; b = %d; Np = %d; k = %d\n", P, b, Np, k);
122 /*butterfly loop*/
123 top = Ifx_FftF32_lookUpTwiddleFactor(Np, k);
124 bot = IFX_Cf32_mul(&R[BaseB + k], &top); /*twiddle the odd n results*/
125 top = R[BaseT + k];
126 R[BaseT + k] = IFX_Cf32_add(&top, &bot); /*top subset*/
127 R[BaseB + k] = IFX_Cf32_sub(&top, &bot); /*bottom subset*/
128 } /*butterfly loop*/
129
130 BaseT = BaseT + Np; /*start of next block*/
131 } /*block loop*/
132
133 /*calc parameters for next pass*/
134 Bp = Bp >> 1; /*half as many blocks*/
135 Np = Np << 1; /*twice as many points in each block*/
136 } /*pass loop*/
137 } /*Ifx_FftF32_radix2DecimationInTime*/
138
139
140 cfloat32 *Ifx_FftF32_radix2(cfloat32 *R, const cfloat32 *X, unsigned short nX)
141 {
142 unsigned int logN = 31 - __clz(nX);
143 unsigned short n, k;
144
145 /* Arrange in bit-reversed index */
146 for (n = 0; n < nX; n++)
147 {
148 //k = Ifx_FftF32_reverseBits(n, logN);
149 k = Ifx_FftF32_lookUpReversedBits(n, logN);
150 R[k] = X[n];
151 }
152
153 Ifx_FftF32_radix2DecimationInTime(R, logN);
154
155 return R;
156 }
157
158
159 cfloat32 *Ifx_FftF32_radix2I(cfloat32 *R, const cfloat32 *X, unsigned short nX)
160 {
161 unsigned int logN = 31 - __clz(nX);
162 unsigned short n, k = 0;
163
164 /* Arrange in bit-reversed index, and conjugate the input */
165 for (n = 0; n < nX; n++)
166 {
167 //k = Ifx_FftF32_reverseBits(n, logN);
168 k = Ifx_FftF32_lookUpReversedBits(n, logN);
169 R[k].real = X[n].real;
170 R[k].imag = -X[n].imag;
171 }
172
173 Ifx_FftF32_radix2DecimationInTime(R, logN);
174
175 /* Conjugate the output */
176 for (n = 0; n < nX; n++)
177 {
178 R[n].imag = -R[n].imag;
179 }
180
181 return R;
182 }
Ifx_FftF32_generateTwiddleFactor
cfloat32 * Ifx_FftF32_generateTwiddleFactor(cfloat32 *TF, short nX)
Twiddle factor generator.
Definition: Ifx_FftF32.c:48
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
Ifx_FftF32_reverseBits
unsigned short Ifx_FftF32_reverseBits(unsigned short n, unsigned bits)
Calculate the bit-reversed <n> with <bits> as number of bits.
Definition: Ifx_FftF32.c:67
IFX_Cf32_mul
IFX_INLINE cfloat32 IFX_Cf32_mul(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:64
float32
float float32
Definition: Platform_Types.h:170
Ifx_FftF32_radix2DecimationInTime
void Ifx_FftF32_radix2DecimationInTime(cfloat32 *R, unsigned long p)
Definition: Ifx_FftF32.c:91
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:61
cfloat32
Definition: Ifx_Types.h:58
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:217
IFX_Cf32_sub
IFX_INLINE cfloat32 IFX_Cf32_sub(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:113
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:60
Ifx_FftF32.h
Floating-point Fast Fourier Transform.
Ifx_FftF32_radix2
cfloat32 * Ifx_FftF32_radix2(cfloat32 *R, const cfloat32 *X, unsigned short nX)
Radix-2 Fast-Fourier Transform.
Definition: Ifx_FftF32.c:140
IFX_Cf32_add
IFX_INLINE cfloat32 IFX_Cf32_add(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:104
Ifx_FftF32_lookUpTwiddleFactor
IFX_INLINE cfloat32 Ifx_FftF32_lookUpTwiddleFactor(sint32 N, sint32 k)
Lookup from Ifx_g_FftF32_twiddleTable the twiddle factor for N, k.
Definition: Ifx_FftF32.h:99
Ifx_FftF32_radix2I
cfloat32 * Ifx_FftF32_radix2I(cfloat32 *R, const cfloat32 *X, unsigned short nX)
Radix-2 Inverse Fast-Fourier Transform.
Definition: Ifx_FftF32.c:159
Ifx_FftF32_lookUpReversedBits
IFX_INLINE uint16 Ifx_FftF32_lookUpReversedBits(uint16 n, unsigned bits)
Lookup from Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits...
Definition: Ifx_FftF32.h:90


iLLD_TC26B: Ifx_FftF32.h Source File

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Ifx_FftF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_FftF32.h
3 * \brief Floating-point Fast Fourier Transform
4 * \ingroup library_srvsw_sysse_math_f32_fft
5 *
6 *
7 *
8 * \version disabled
9 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
10 *
11 *
12 * IMPORTANT NOTICE
13 *
14 * Use of this file is subject to the terms of use agreed between (i) you or
15 * the company in which ordinary course of business you are acting and (ii)
16 * Infineon Technologies AG or its licensees. If and as long as no such terms
17 * of use are agreed, use of this file is subject to following:
18 *
19 * Boost Software License - Version 1.0 - August 17th, 2003
20 *
21 * Permission is hereby granted, free of charge, to any person or organization
22 * obtaining a copy of the software and accompanying documentation covered by
23 * this license (the "Software") to use, reproduce, display, distribute,
24 * execute, and transmit the Software, and to prepare derivative works of the
25 * Software, and to permit third-parties to whom the Software is furnished to
26 * do so, all subject to the following:
27 *
28 * The copyright notices in the Software and this entire statement, including
29 * the above license grant, this restriction and the following disclaimer, must
30 * be included in all copies of the Software, in whole or in part, and all
31 * derivative works of the Software, unless such copies or derivative works are
32 * solely in the form of machine-executable object code generated by a source
33 * language processor.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
36 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
37 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
38 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
39 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
40 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
41 * DEALINGS IN THE SOFTWARE.
42 *
43 * \defgroup library_srvsw_sysse_math_f32_fft Floating-point FFT
44 * This module implements the Fast Fourier Transform in single precision floating-point
45 * \ingroup library_srvsw_sysse_math_f32
46 *
47 */
48
49 #ifndef IFX_FFTF32_H
50 #define IFX_FFTF32_H
51
52 #include "Ifx_Cf32.h"
53
54 /** \brief Maximum FFT resolution (bits).
55 * If redefined, then \ref Ifx_g_FftF32_bitReverseTable and \ref Ifx_g_FftF32_twiddleTable shall be regenerated. */
56 #define IFX_FFTF32_MAX_RESOLUTION (14)
57
58 /** \brief Maximum FFT length.
59 * If redefined, then \ref Ifx_g_FftF32_bitReverseTable and \ref Ifx_g_FftF32_twiddleTable shall be regenerated. */
60 #define IFX_FFTF32_MAX_LENGTH (1U << IFX_FFTF32_MAX_RESOLUTION)
61
62 /** \brief Bit reversal table */
63 IFX_EXTERN IFX_CONST uint16 Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH];
64
65 /** \brief Twiddle factor table */
66 IFX_EXTERN IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH / 2];
67
68 //----------------------------------------------------------------------------------------
69 /** \addtogroup library_srvsw_sysse_math_f32_fft
70 * \{ */
71
72 /** \name Transform functions
73 * \{ */
74
75 /** \brief Twiddle factor generator */
76 IFX_EXTERN cfloat32 *Ifx_FftF32_generateTwiddleFactor(cfloat32 *TF, sint16 nX);
77
78 /** \brief Radix-2 Fast-Fourier Transform */
79 IFX_EXTERN cfloat32 *Ifx_FftF32_radix2(cfloat32 *R, const cfloat32 *X, uint16 nX);
80
81 /** \brief Radix-2 Inverse Fast-Fourier Transform */
82 IFX_EXTERN cfloat32 *Ifx_FftF32_radix2I(cfloat32 *R, const cfloat32 *X, uint16 nX);
83
84 /** \} */
85 //----------------------------------------------------------------------------------------
86 /** \name Utility functions
87 * \{ */
88
89 /** \brief Lookup from \ref Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits */
90 IFX_INLINE uint16 Ifx_FftF32_lookUpReversedBits(uint16 n, unsigned bits)
91 {
92 unsigned shift = IFX_FFTF32_MAX_RESOLUTION - bits;
93 uint16 index = Ifx_g_FftF32_bitReverseTable[n];
94 return index >> shift;
95 }
96
97
98 /** \brief Lookup from \ref Ifx_g_FftF32_twiddleTable the twiddle factor for N, k */
99 IFX_INLINE cfloat32 Ifx_FftF32_lookUpTwiddleFactor(sint32 N, sint32 k)
100 {
101 return Ifx_g_FftF32_twiddleTable[k * IFX_FFTF32_MAX_LENGTH / N];
102 }
103
104
105 /** \brief Calculate the bit-reversed <n> with <bits> as number of bits */
106 IFX_EXTERN uint16 Ifx_FftF32_reverseBits(uint16 n, unsigned bits);
107
108 /** \} */
109 //----------------------------------------------------------------------------------------
110 /** \} */
111
112 #endif /* IFX_FFTF32_H */
Ifx_FftF32_generateTwiddleFactor
IFX_EXTERN cfloat32 * Ifx_FftF32_generateTwiddleFactor(cfloat32 *TF, sint16 nX)
Twiddle factor generator.
Definition: Ifx_FftF32.c:48
Ifx_FftF32_reverseBits
IFX_EXTERN uint16 Ifx_FftF32_reverseBits(uint16 n, unsigned bits)
Calculate the bit-reversed <n> with <bits> as number of bits.
Definition: Ifx_FftF32.c:67
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
cfloat32
Definition: Ifx_Types.h:58
sint16
short sint16
Definition: Platform_Types.h:129
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IFX_FFTF32_MAX_LENGTH
#define IFX_FFTF32_MAX_LENGTH
Maximum FFT length. If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable sha...
Definition: Ifx_FftF32.h:60
Ifx_FftF32_radix2
IFX_EXTERN cfloat32 * Ifx_FftF32_radix2(cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Fast-Fourier Transform.
Definition: Ifx_FftF32.c:140
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_FftF32_lookUpTwiddleFactor
IFX_INLINE cfloat32 Ifx_FftF32_lookUpTwiddleFactor(sint32 N, sint32 k)
Lookup from Ifx_g_FftF32_twiddleTable the twiddle factor for N, k.
Definition: Ifx_FftF32.h:99
Ifx_g_FftF32_bitReverseTable
IFX_EXTERN IFX_CONST uint16 Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH]
Bit reversal table.
Definition: Ifx_FftF32.h:63
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
sint32
long sint32
Definition: Platform_Types.h:134
IFX_FFTF32_MAX_RESOLUTION
#define IFX_FFTF32_MAX_RESOLUTION
Maximum FFT resolution (bits). If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twidd...
Definition: Ifx_FftF32.h:56
Ifx_g_FftF32_twiddleTable
IFX_EXTERN IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH/2]
Twiddle factor table.
Definition: Ifx_FftF32.h:66
Ifx_FftF32_radix2I
IFX_EXTERN cfloat32 * Ifx_FftF32_radix2I(cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Inverse Fast-Fourier Transform.
Definition: Ifx_FftF32.c:159
Ifx_FftF32_lookUpReversedBits
IFX_INLINE uint16 Ifx_FftF32_lookUpReversedBits(uint16 n, unsigned bits)
Lookup from Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits...
Definition: Ifx_FftF32.h:90


iLLD_TC26B: Ifx_FftF32_BitReverseTable.c Source File

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Ifx_FftF32_BitReverseTable.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_FftF32_BitReverseTable.c
3 * \brief Bit-reversal lookup for Floating-point Fast Fourier Transform
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "Ifx_FftF32.h"
44
45 /*lint -e915*/
46 CONST_CFG unsigned short Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH] = {
47 0,
48 8192,
49 4096,
50 12288,
51 2048,
52 10240,
53 6144,
54 14336,
55 1024,
56 9216,
57 5120,
58 13312,
59 3072,
60 11264,
61 7168,
62 15360,
63 512,
64 8704,
65 4608,
66 12800,
67 2560,
68 10752,
69 6656,
70 14848,
71 1536,
72 9728,
73 5632,
74 13824,
75 3584,
76 11776,
77 7680,
78 15872,
79 256,
80 8448,
81 4352,
82 12544,
83 2304,
84 10496,
85 6400,
86 14592,
87 1280,
88 9472,
89 5376,
90 13568,
91 3328,
92 11520,
93 7424,
94 15616,
95 768,
96 8960,
97 4864,
98 13056,
99 2816,
100 11008,
101 6912,
102 15104,
103 1792,
104 9984,
105 5888,
106 14080,
107 3840,
108 12032,
109 7936,
110 16128,
111 128,
112 8320,
113 4224,
114 12416,
115 2176,
116 10368,
117 6272,
118 14464,
119 1152,
120 9344,
121 5248,
122 13440,
123 3200,
124 11392,
125 7296,
126 15488,
127 640,
128 8832,
129 4736,
130 12928,
131 2688,
132 10880,
133 6784,
134 14976,
135 1664,
136 9856,
137 5760,
138 13952,
139 3712,
140 11904,
141 7808,
142 16000,
143 384,
144 8576,
145 4480,
146 12672,
147 2432,
148 10624,
149 6528,
150 14720,
151 1408,
152 9600,
153 5504,
154 13696,
155 3456,
156 11648,
157 7552,
158 15744,
159 896,
160 9088,
161 4992,
162 13184,
163 2944,
164 11136,
165 7040,
166 15232,
167 1920,
168 10112,
169 6016,
170 14208,
171 3968,
172 12160,
173 8064,
174 16256,
175 64,
176 8256,
177 4160,
178 12352,
179 2112,
180 10304,
181 6208,
182 14400,
183 1088,
184 9280,
185 5184,
186 13376,
187 3136,
188 11328,
189 7232,
190 15424,
191 576,
192 8768,
193 4672,
194 12864,
195 2624,
196 10816,
197 6720,
198 14912,
199 1600,
200 9792,
201 5696,
202 13888,
203 3648,
204 11840,
205 7744,
206 15936,
207 320,
208 8512,
209 4416,
210 12608,
211 2368,
212 10560,
213 6464,
214 14656,
215 1344,
216 9536,
217 5440,
218 13632,
219 3392,
220 11584,
221 7488,
222 15680,
223 832,
224 9024,
225 4928,
226 13120,
227 2880,
228 11072,
229 6976,
230 15168,
231 1856,
232 10048,
233 5952,
234 14144,
235 3904,
236 12096,
237 8000,
238 16192,
239 192,
240 8384,
241 4288,
242 12480,
243 2240,
244 10432,
245 6336,
246 14528,
247 1216,
248 9408,
249 5312,
250 13504,
251 3264,
252 11456,
253 7360,
254 15552,
255 704,
256 8896,
257 4800,
258 12992,
259 2752,
260 10944,
261 6848,
262 15040,
263 1728,
264 9920,
265 5824,
266 14016,
267 3776,
268 11968,
269 7872,
270 16064,
271 448,
272 8640,
273 4544,
274 12736,
275 2496,
276 10688,
277 6592,
278 14784,
279 1472,
280 9664,
281 5568,
282 13760,
283 3520,
284 11712,
285 7616,
286 15808,
287 960,
288 9152,
289 5056,
290 13248,
291 3008,
292 11200,
293 7104,
294 15296,
295 1984,
296 10176,
297 6080,
298 14272,
299 4032,
300 12224,
301 8128,
302 16320,
303 32,
304 8224,
305 4128,
306 12320,
307 2080,
308 10272,
309 6176,
310 14368,
311 1056,
312 9248,
313 5152,
314 13344,
315 3104,
316 11296,
317 7200,
318 15392,
319 544,
320 8736,
321 4640,
322 12832,
323 2592,
324 10784,
325 6688,
326 14880,
327 1568,
328 9760,
329 5664,
330 13856,
331 3616,
332 11808,
333 7712,
334 15904,
335 288,
336 8480,
337 4384,
338 12576,
339 2336,
340 10528,
341 6432,
342 14624,
343 1312,
344 9504,
345 5408,
346 13600,
347 3360,
348 11552,
349 7456,
350 15648,
351 800,
352 8992,
353 4896,
354 13088,
355 2848,
356 11040,
357 6944,
358 15136,
359 1824,
360 10016,
361 5920,
362 14112,
363 3872,
364 12064,
365 7968,
366 16160,
367 160,
368 8352,
369 4256,
370 12448,
371 2208,
372 10400,
373 6304,
374 14496,
375 1184,
376 9376,
377 5280,
378 13472,
379 3232,
380 11424,
381 7328,
382 15520,
383 672,
384 8864,
385 4768,
386 12960,
387 2720,
388 10912,
389 6816,
390 15008,
391 1696,
392 9888,
393 5792,
394 13984,
395 3744,
396 11936,
397 7840,
398 16032,
399 416,
400 8608,
401 4512,
402 12704,
403 2464,
404 10656,
405 6560,
406 14752,
407 1440,
408 9632,
409 5536,
410 13728,
411 3488,
412 11680,
413 7584,
414 15776,
415 928,
416 9120,
417 5024,
418 13216,
419 2976,
420 11168,
421 7072,
422 15264,
423 1952,
424 10144,
425 6048,
426 14240,
427 4000,
428 12192,
429 8096,
430 16288,
431 96,
432 8288,
433 4192,
434 12384,
435 2144,
436 10336,
437 6240,
438 14432,
439 1120,
440 9312,
441 5216,
442 13408,
443 3168,
444 11360,
445 7264,
446 15456,
447 608,
448 8800,
449 4704,
450 12896,
451 2656,
452 10848,
453 6752,
454 14944,
455 1632,
456 9824,
457 5728,
458 13920,
459 3680,
460 11872,
461 7776,
462 15968,
463 352,
464 8544,
465 4448,
466 12640,
467 2400,
468 10592,
469 6496,
470 14688,
471 1376,
472 9568,
473 5472,
474 13664,
475 3424,
476 11616,
477 7520,
478 15712,
479 864,
480 9056,
481 4960,
482 13152,
483 2912,
484 11104,
485 7008,
486 15200,
487 1888,
488 10080,
489 5984,
490 14176,
491 3936,
492 12128,
493 8032,
494 16224,
495 224,
496 8416,
497 4320,
498 12512,
499 2272,
500 10464,
501 6368,
502 14560,
503 1248,
504 9440,
505 5344,
506 13536,
507 3296,
508 11488,
509 7392,
510 15584,
511 736,
512 8928,
513 4832,
514 13024,
515 2784,
516 10976,
517 6880,
518 15072,
519 1760,
520 9952,
521 5856,
522 14048,
523 3808,
524 12000,
525 7904,
526 16096,
527 480,
528 8672,
529 4576,
530 12768,
531 2528,
532 10720,
533 6624,
534 14816,
535 1504,
536 9696,
537 5600,
538 13792,
539 3552,
540 11744,
541 7648,
542 15840,
543 992,
544 9184,
545 5088,
546 13280,
547 3040,
548 11232,
549 7136,
550 15328,
551 2016,
552 10208,
553 6112,
554 14304,
555 4064,
556 12256,
557 8160,
558 16352,
559 16,
560 8208,
561 4112,
562 12304,
563 2064,
564 10256,
565 6160,
566 14352,
567 1040,
568 9232,
569 5136,
570 13328,
571 3088,
572 11280,
573 7184,
574 15376,
575 528,
576 8720,
577 4624,
578 12816,
579 2576,
580 10768,
581 6672,
582 14864,
583 1552,
584 9744,
585 5648,
586 13840,
587 3600,
588 11792,
589 7696,
590 15888,
591 272,
592 8464,
593 4368,
594 12560,
595 2320,
596 10512,
597 6416,
598 14608,
599 1296,
600 9488,
601 5392,
602 13584,
603 3344,
604 11536,
605 7440,
606 15632,
607 784,
608 8976,
609 4880,
610 13072,
611 2832,
612 11024,
613 6928,
614 15120,
615 1808,
616 10000,
617 5904,
618 14096,
619 3856,
620 12048,
621 7952,
622 16144,
623 144,
624 8336,
625 4240,
626 12432,
627 2192,
628 10384,
629 6288,
630 14480,
631 1168,
632 9360,
633 5264,
634 13456,
635 3216,
636 11408,
637 7312,
638 15504,
639 656,
640 8848,
641 4752,
642 12944,
643 2704,
644 10896,
645 6800,
646 14992,
647 1680,
648 9872,
649 5776,
650 13968,
651 3728,
652 11920,
653 7824,
654 16016,
655 400,
656 8592,
657 4496,
658 12688,
659 2448,
660 10640,
661 6544,
662 14736,
663 1424,
664 9616,
665 5520,
666 13712,
667 3472,
668 11664,
669 7568,
670 15760,
671 912,
672 9104,
673 5008,
674 13200,
675 2960,
676 11152,
677 7056,
678 15248,
679 1936,
680 10128,
681 6032,
682 14224,
683 3984,
684 12176,
685 8080,
686 16272,
687 80,
688 8272,
689 4176,
690 12368,
691 2128,
692 10320,
693 6224,
694 14416,
695 1104,
696 9296,
697 5200,
698 13392,
699 3152,
700 11344,
701 7248,
702 15440,
703 592,
704 8784,
705 4688,
706 12880,
707 2640,
708 10832,
709 6736,
710 14928,
711 1616,
712 9808,
713 5712,
714 13904,
715 3664,
716 11856,
717 7760,
718 15952,
719 336,
720 8528,
721 4432,
722 12624,
723 2384,
724 10576,
725 6480,
726 14672,
727 1360,
728 9552,
729 5456,
730 13648,
731 3408,
732 11600,
733 7504,
734 15696,
735 848,
736 9040,
737 4944,
738 13136,
739 2896,
740 11088,
741 6992,
742 15184,
743 1872,
744 10064,
745 5968,
746 14160,
747 3920,
748 12112,
749 8016,
750 16208,
751 208,
752 8400,
753 4304,
754 12496,
755 2256,
756 10448,
757 6352,
758 14544,
759 1232,
760 9424,
761 5328,
762 13520,
763 3280,
764 11472,
765 7376,
766 15568,
767 720,
768 8912,
769 4816,
770 13008,
771 2768,
772 10960,
773 6864,
774 15056,
775 1744,
776 9936,
777 5840,
778 14032,
779 3792,
780 11984,
781 7888,
782 16080,
783 464,
784 8656,
785 4560,
786 12752,
787 2512,
788 10704,
789 6608,
790 14800,
791 1488,
792 9680,
793 5584,
794 13776,
795 3536,
796 11728,
797 7632,
798 15824,
799 976,
800 9168,
801 5072,
802 13264,
803 3024,
804 11216,
805 7120,
806 15312,
807 2000,
808 10192,
809 6096,
810 14288,
811 4048,
812 12240,
813 8144,
814 16336,
815 48,
816 8240,
817 4144,
818 12336,
819 2096,
820 10288,
821 6192,
822 14384,
823 1072,
824 9264,
825 5168,
826 13360,
827 3120,
828 11312,
829 7216,
830 15408,
831 560,
832 8752,
833 4656,
834 12848,
835 2608,
836 10800,
837 6704,
838 14896,
839 1584,
840 9776,
841 5680,
842 13872,
843 3632,
844 11824,
845 7728,
846 15920,
847 304,
848 8496,
849 4400,
850 12592,
851 2352,
852 10544,
853 6448,
854 14640,
855 1328,
856 9520,
857 5424,
858 13616,
859 3376,
860 11568,
861 7472,
862 15664,
863 816,
864 9008,
865 4912,
866 13104,
867 2864,
868 11056,
869 6960,
870 15152,
871 1840,
872 10032,
873 5936,
874 14128,
875 3888,
876 12080,
877 7984,
878 16176,
879 176,
880 8368,
881 4272,
882 12464,
883 2224,
884 10416,
885 6320,
886 14512,
887 1200,
888 9392,
889 5296,
890 13488,
891 3248,
892 11440,
893 7344,
894 15536,
895 688,
896 8880,
897 4784,
898 12976,
899 2736,
900 10928,
901 6832,
902 15024,
903 1712,
904 9904,
905 5808,
906 14000,
907 3760,
908 11952,
909 7856,
910 16048,
911 432,
912 8624,
913 4528,
914 12720,
915 2480,
916 10672,
917 6576,
918 14768,
919 1456,
920 9648,
921 5552,
922 13744,
923 3504,
924 11696,
925 7600,
926 15792,
927 944,
928 9136,
929 5040,
930 13232,
931 2992,
932 11184,
933 7088,
934 15280,
935 1968,
936 10160,
937 6064,
938 14256,
939 4016,
940 12208,
941 8112,
942 16304,
943 112,
944 8304,
945 4208,
946 12400,
947 2160,
948 10352,
949 6256,
950 14448,
951 1136,
952 9328,
953 5232,
954 13424,
955 3184,
956 11376,
957 7280,
958 15472,
959 624,
960 8816,
961 4720,
962 12912,
963 2672,
964 10864,
965 6768,
966 14960,
967 1648,
968 9840,
969 5744,
970 13936,
971 3696,
972 11888,
973 7792,
974 15984,
975 368,
976 8560,
977 4464,
978 12656,
979 2416,
980 10608,
981 6512,
982 14704,
983 1392,
984 9584,
985 5488,
986 13680,
987 3440,
988 11632,
989 7536,
990 15728,
991 880,
992 9072,
993 4976,
994 13168,
995 2928,
996 11120,
997 7024,
998 15216,
999 1904,
1000 10096,
1001 6000,
1002 14192,
1003 3952,
1004 12144,
1005 8048,
1006 16240,
1007 240,
1008 8432,
1009 4336,
1010 12528,
1011 2288,
1012 10480,
1013 6384,
1014 14576,
1015 1264,
1016 9456,
1017 5360,
1018 13552,
1019 3312,
1020 11504,
1021 7408,
1022 15600,
1023 752,
1024 8944,
1025 4848,
1026 13040,
1027 2800,
1028 10992,
1029 6896,
1030 15088,
1031 1776,
1032 9968,
1033 5872,
1034 14064,
1035 3824,
1036 12016,
1037 7920,
1038 16112,
1039 496,
1040 8688,
1041 4592,
1042 12784,
1043 2544,
1044 10736,
1045 6640,
1046 14832,
1047 1520,
1048 9712,
1049 5616,
1050 13808,
1051 3568,
1052 11760,
1053 7664,
1054 15856,
1055 1008,
1056 9200,
1057 5104,
1058 13296,
1059 3056,
1060 11248,
1061 7152,
1062 15344,
1063 2032,
1064 10224,
1065 6128,
1066 14320,
1067 4080,
1068 12272,
1069 8176,
1070 16368,
1071 8,
1072 8200,
1073 4104,
1074 12296,
1075 2056,
1076 10248,
1077 6152,
1078 14344,
1079 1032,
1080 9224,
1081 5128,
1082 13320,
1083 3080,
1084 11272,
1085 7176,
1086 15368,
1087 520,
1088 8712,
1089 4616,
1090 12808,
1091 2568,
1092 10760,
1093 6664,
1094 14856,
1095 1544,
1096 9736,
1097 5640,
1098 13832,
1099 3592,
1100 11784,
1101 7688,
1102 15880,
1103 264,
1104 8456,
1105 4360,
1106 12552,
1107 2312,
1108 10504,
1109 6408,
1110 14600,
1111 1288,
1112 9480,
1113 5384,
1114 13576,
1115 3336,
1116 11528,
1117 7432,
1118 15624,
1119 776,
1120 8968,
1121 4872,
1122 13064,
1123 2824,
1124 11016,
1125 6920,
1126 15112,
1127 1800,
1128 9992,
1129 5896,
1130 14088,
1131 3848,
1132 12040,
1133 7944,
1134 16136,
1135 136,
1136 8328,
1137 4232,
1138 12424,
1139 2184,
1140 10376,
1141 6280,
1142 14472,
1143 1160,
1144 9352,
1145 5256,
1146 13448,
1147 3208,
1148 11400,
1149 7304,
1150 15496,
1151 648,
1152 8840,
1153 4744,
1154 12936,
1155 2696,
1156 10888,
1157 6792,
1158 14984,
1159 1672,
1160 9864,
1161 5768,
1162 13960,
1163 3720,
1164 11912,
1165 7816,
1166 16008,
1167 392,
1168 8584,
1169 4488,
1170 12680,
1171 2440,
1172 10632,
1173 6536,
1174 14728,
1175 1416,
1176 9608,
1177 5512,
1178 13704,
1179 3464,
1180 11656,
1181 7560,
1182 15752,
1183 904,
1184 9096,
1185 5000,
1186 13192,
1187 2952,
1188 11144,
1189 7048,
1190 15240,
1191 1928,
1192 10120,
1193 6024,
1194 14216,
1195 3976,
1196 12168,
1197 8072,
1198 16264,
1199 72,
1200 8264,
1201 4168,
1202 12360,
1203 2120,
1204 10312,
1205 6216,
1206 14408,
1207 1096,
1208 9288,
1209 5192,
1210 13384,
1211 3144,
1212 11336,
1213 7240,
1214 15432,
1215 584,
1216 8776,
1217 4680,
1218 12872,
1219 2632,
1220 10824,
1221 6728,
1222 14920,
1223 1608,
1224 9800,
1225 5704,
1226 13896,
1227 3656,
1228 11848,
1229 7752,
1230 15944,
1231 328,
1232 8520,
1233 4424,
1234 12616,
1235 2376,
1236 10568,
1237 6472,
1238 14664,
1239 1352,
1240 9544,
1241 5448,
1242 13640,
1243 3400,
1244 11592,
1245 7496,
1246 15688,
1247 840,
1248 9032,
1249 4936,
1250 13128,
1251 2888,
1252 11080,
1253 6984,
1254 15176,
1255 1864,
1256 10056,
1257 5960,
1258 14152,
1259 3912,
1260 12104,
1261 8008,
1262 16200,
1263 200,
1264 8392,
1265 4296,
1266 12488,
1267 2248,
1268 10440,
1269 6344,
1270 14536,
1271 1224,
1272 9416,
1273 5320,
1274 13512,
1275 3272,
1276 11464,
1277 7368,
1278 15560,
1279 712,
1280 8904,
1281 4808,
1282 13000,
1283 2760,
1284 10952,
1285 6856,
1286 15048,
1287 1736,
1288 9928,
1289 5832,
1290 14024,
1291 3784,
1292 11976,
1293 7880,
1294 16072,
1295 456,
1296 8648,
1297 4552,
1298 12744,
1299 2504,
1300 10696,
1301 6600,
1302 14792,
1303 1480,
1304 9672,
1305 5576,
1306 13768,
1307 3528,
1308 11720,
1309 7624,
1310 15816,
1311 968,
1312 9160,
1313 5064,
1314 13256,
1315 3016,
1316 11208,
1317 7112,
1318 15304,
1319 1992,
1320 10184,
1321 6088,
1322 14280,
1323 4040,
1324 12232,
1325 8136,
1326 16328,
1327 40,
1328 8232,
1329 4136,
1330 12328,
1331 2088,
1332 10280,
1333 6184,
1334 14376,
1335 1064,
1336 9256,
1337 5160,
1338 13352,
1339 3112,
1340 11304,
1341 7208,
1342 15400,
1343 552,
1344 8744,
1345 4648,
1346 12840,
1347 2600,
1348 10792,
1349 6696,
1350 14888,
1351 1576,
1352 9768,
1353 5672,
1354 13864,
1355 3624,
1356 11816,
1357 7720,
1358 15912,
1359 296,
1360 8488,
1361 4392,
1362 12584,
1363 2344,
1364 10536,
1365 6440,
1366 14632,
1367 1320,
1368 9512,
1369 5416,
1370 13608,
1371 3368,
1372 11560,
1373 7464,
1374 15656,
1375 808,
1376 9000,
1377 4904,
1378 13096,
1379 2856,
1380 11048,
1381 6952,
1382 15144,
1383 1832,
1384 10024,
1385 5928,
1386 14120,
1387 3880,
1388 12072,
1389 7976,
1390 16168,
1391 168,
1392 8360,
1393 4264,
1394 12456,
1395 2216,
1396 10408,
1397 6312,
1398 14504,
1399 1192,
1400 9384,
1401 5288,
1402 13480,
1403 3240,
1404 11432,
1405 7336,
1406 15528,
1407 680,
1408 8872,
1409 4776,
1410 12968,
1411 2728,
1412 10920,
1413 6824,
1414 15016,
1415 1704,
1416 9896,
1417 5800,
1418 13992,
1419 3752,
1420 11944,
1421 7848,
1422 16040,
1423 424,
1424 8616,
1425 4520,
1426 12712,
1427 2472,
1428 10664,
1429 6568,
1430 14760,
1431 1448,
1432 9640,
1433 5544,
1434 13736,
1435 3496,
1436 11688,
1437 7592,
1438 15784,
1439 936,
1440 9128,
1441 5032,
1442 13224,
1443 2984,
1444 11176,
1445 7080,
1446 15272,
1447 1960,
1448 10152,
1449 6056,
1450 14248,
1451 4008,
1452 12200,
1453 8104,
1454 16296,
1455 104,
1456 8296,
1457 4200,
1458 12392,
1459 2152,
1460 10344,
1461 6248,
1462 14440,
1463 1128,
1464 9320,
1465 5224,
1466 13416,
1467 3176,
1468 11368,
1469 7272,
1470 15464,
1471 616,
1472 8808,
1473 4712,
1474 12904,
1475 2664,
1476 10856,
1477 6760,
1478 14952,
1479 1640,
1480 9832,
1481 5736,
1482 13928,
1483 3688,
1484 11880,
1485 7784,
1486 15976,
1487 360,
1488 8552,
1489 4456,
1490 12648,
1491 2408,
1492 10600,
1493 6504,
1494 14696,
1495 1384,
1496 9576,
1497 5480,
1498 13672,
1499 3432,
1500 11624,
1501 7528,
1502 15720,
1503 872,
1504 9064,
1505 4968,
1506 13160,
1507 2920,
1508 11112,
1509 7016,
1510 15208,
1511 1896,
1512 10088,
1513 5992,
1514 14184,
1515 3944,
1516 12136,
1517 8040,
1518 16232,
1519 232,
1520 8424,
1521 4328,
1522 12520,
1523 2280,
1524 10472,
1525 6376,
1526 14568,
1527 1256,
1528 9448,
1529 5352,
1530 13544,
1531 3304,
1532 11496,
1533 7400,
1534 15592,
1535 744,
1536 8936,
1537 4840,
1538 13032,
1539 2792,
1540 10984,
1541 6888,
1542 15080,
1543 1768,
1544 9960,
1545 5864,
1546 14056,
1547 3816,
1548 12008,
1549 7912,
1550 16104,
1551 488,
1552 8680,
1553 4584,
1554 12776,
1555 2536,
1556 10728,
1557 6632,
1558 14824,
1559 1512,
1560 9704,
1561 5608,
1562 13800,
1563 3560,
1564 11752,
1565 7656,
1566 15848,
1567 1000,
1568 9192,
1569 5096,
1570 13288,
1571 3048,
1572 11240,
1573 7144,
1574 15336,
1575 2024,
1576 10216,
1577 6120,
1578 14312,
1579 4072,
1580 12264,
1581 8168,
1582 16360,
1583 24,
1584 8216,
1585 4120,
1586 12312,
1587 2072,
1588 10264,
1589 6168,
1590 14360,
1591 1048,
1592 9240,
1593 5144,
1594 13336,
1595 3096,
1596 11288,
1597 7192,
1598 15384,
1599 536,
1600 8728,
1601 4632,
1602 12824,
1603 2584,
1604 10776,
1605 6680,
1606 14872,
1607 1560,
1608 9752,
1609 5656,
1610 13848,
1611 3608,
1612 11800,
1613 7704,
1614 15896,
1615 280,
1616 8472,
1617 4376,
1618 12568,
1619 2328,
1620 10520,
1621 6424,
1622 14616,
1623 1304,
1624 9496,
1625 5400,
1626 13592,
1627 3352,
1628 11544,
1629 7448,
1630 15640,
1631 792,
1632 8984,
1633 4888,
1634 13080,
1635 2840,
1636 11032,
1637 6936,
1638 15128,
1639 1816,
1640 10008,
1641 5912,
1642 14104,
1643 3864,
1644 12056,
1645 7960,
1646 16152,
1647 152,
1648 8344,
1649 4248,
1650 12440,
1651 2200,
1652 10392,
1653 6296,
1654 14488,
1655 1176,
1656 9368,
1657 5272,
1658 13464,
1659 3224,
1660 11416,
1661 7320,
1662 15512,
1663 664,
1664 8856,
1665 4760,
1666 12952,
1667 2712,
1668 10904,
1669 6808,
1670 15000,
1671 1688,
1672 9880,
1673 5784,
1674 13976,
1675 3736,
1676 11928,
1677 7832,
1678 16024,
1679 408,
1680 8600,
1681 4504,
1682 12696,
1683 2456,
1684 10648,
1685 6552,
1686 14744,
1687 1432,
1688 9624,
1689 5528,
1690 13720,
1691 3480,
1692 11672,
1693 7576,
1694 15768,
1695 920,
1696 9112,
1697 5016,
1698 13208,
1699 2968,
1700 11160,
1701 7064,
1702 15256,
1703 1944,
1704 10136,
1705 6040,
1706 14232,
1707 3992,
1708 12184,
1709 8088,
1710 16280,
1711 88,
1712 8280,
1713 4184,
1714 12376,
1715 2136,
1716 10328,
1717 6232,
1718 14424,
1719 1112,
1720 9304,
1721 5208,
1722 13400,
1723 3160,
1724 11352,
1725 7256,
1726 15448,
1727 600,
1728 8792,
1729 4696,
1730 12888,
1731 2648,
1732 10840,
1733 6744,
1734 14936,
1735 1624,
1736 9816,
1737 5720,
1738 13912,
1739 3672,
1740 11864,
1741 7768,
1742 15960,
1743 344,
1744 8536,
1745 4440,
1746 12632,
1747 2392,
1748 10584,
1749 6488,
1750 14680,
1751 1368,
1752 9560,
1753 5464,
1754 13656,
1755 3416,
1756 11608,
1757 7512,
1758 15704,
1759 856,
1760 9048,
1761 4952,
1762 13144,
1763 2904,
1764 11096,
1765 7000,
1766 15192,
1767 1880,
1768 10072,
1769 5976,
1770 14168,
1771 3928,
1772 12120,
1773 8024,
1774 16216,
1775 216,
1776 8408,
1777 4312,
1778 12504,
1779 2264,
1780 10456,
1781 6360,
1782 14552,
1783 1240,
1784 9432,
1785 5336,
1786 13528,
1787 3288,
1788 11480,
1789 7384,
1790 15576,
1791 728,
1792 8920,
1793 4824,
1794 13016,
1795 2776,
1796 10968,
1797 6872,
1798 15064,
1799 1752,
1800 9944,
1801 5848,
1802 14040,
1803 3800,
1804 11992,
1805 7896,
1806 16088,
1807 472,
1808 8664,
1809 4568,
1810 12760,
1811 2520,
1812 10712,
1813 6616,
1814 14808,
1815 1496,
1816 9688,
1817 5592,
1818 13784,
1819 3544,
1820 11736,
1821 7640,
1822 15832,
1823 984,
1824 9176,
1825 5080,
1826 13272,
1827 3032,
1828 11224,
1829 7128,
1830 15320,
1831 2008,
1832 10200,
1833 6104,
1834 14296,
1835 4056,
1836 12248,
1837 8152,
1838 16344,
1839 56,
1840 8248,
1841 4152,
1842 12344,
1843 2104,
1844 10296,
1845 6200,
1846 14392,
1847 1080,
1848 9272,
1849 5176,
1850 13368,
1851 3128,
1852 11320,
1853 7224,
1854 15416,
1855 568,
1856 8760,
1857 4664,
1858 12856,
1859 2616,
1860 10808,
1861 6712,
1862 14904,
1863 1592,
1864 9784,
1865 5688,
1866 13880,
1867 3640,
1868 11832,
1869 7736,
1870 15928,
1871 312,
1872 8504,
1873 4408,
1874 12600,
1875 2360,
1876 10552,
1877 6456,
1878 14648,
1879 1336,
1880 9528,
1881 5432,
1882 13624,
1883 3384,
1884 11576,
1885 7480,
1886 15672,
1887 824,
1888 9016,
1889 4920,
1890 13112,
1891 2872,
1892 11064,
1893 6968,
1894 15160,
1895 1848,
1896 10040,
1897 5944,
1898 14136,
1899 3896,
1900 12088,
1901 7992,
1902 16184,
1903 184,
1904 8376,
1905 4280,
1906 12472,
1907 2232,
1908 10424,
1909 6328,
1910 14520,
1911 1208,
1912 9400,
1913 5304,
1914 13496,
1915 3256,
1916 11448,
1917 7352,
1918 15544,
1919 696,
1920 8888,
1921 4792,
1922 12984,
1923 2744,
1924 10936,
1925 6840,
1926 15032,
1927 1720,
1928 9912,
1929 5816,
1930 14008,
1931 3768,
1932 11960,
1933 7864,
1934 16056,
1935 440,
1936 8632,
1937 4536,
1938 12728,
1939 2488,
1940 10680,
1941 6584,
1942 14776,
1943 1464,
1944 9656,
1945 5560,
1946 13752,
1947 3512,
1948 11704,
1949 7608,
1950 15800,
1951 952,
1952 9144,
1953 5048,
1954 13240,
1955 3000,
1956 11192,
1957 7096,
1958 15288,
1959 1976,
1960 10168,
1961 6072,
1962 14264,
1963 4024,
1964 12216,
1965 8120,
1966 16312,
1967 120,
1968 8312,
1969 4216,
1970 12408,
1971 2168,
1972 10360,
1973 6264,
1974 14456,
1975 1144,
1976 9336,
1977 5240,
1978 13432,
1979 3192,
1980 11384,
1981 7288,
1982 15480,
1983 632,
1984 8824,
1985 4728,
1986 12920,
1987 2680,
1988 10872,
1989 6776,
1990 14968,
1991 1656,
1992 9848,
1993 5752,
1994 13944,
1995 3704,
1996 11896,
1997 7800,
1998 15992,
1999 376,
2000 8568,
2001 4472,
2002 12664,
2003 2424,
2004 10616,
2005 6520,
2006 14712,
2007 1400,
2008 9592,
2009 5496,
2010 13688,
2011 3448,
2012 11640,
2013 7544,
2014 15736,
2015 888,
2016 9080,
2017 4984,
2018 13176,
2019 2936,
2020 11128,
2021 7032,
2022 15224,
2023 1912,
2024 10104,
2025 6008,
2026 14200,
2027 3960,
2028 12152,
2029 8056,
2030 16248,
2031 248,
2032 8440,
2033 4344,
2034 12536,
2035 2296,
2036 10488,
2037 6392,
2038 14584,
2039 1272,
2040 9464,
2041 5368,
2042 13560,
2043 3320,
2044 11512,
2045 7416,
2046 15608,
2047 760,
2048 8952,
2049 4856,
2050 13048,
2051 2808,
2052 11000,
2053 6904,
2054 15096,
2055 1784,
2056 9976,
2057 5880,
2058 14072,
2059 3832,
2060 12024,
2061 7928,
2062 16120,
2063 504,
2064 8696,
2065 4600,
2066 12792,
2067 2552,
2068 10744,
2069 6648,
2070 14840,
2071 1528,
2072 9720,
2073 5624,
2074 13816,
2075 3576,
2076 11768,
2077 7672,
2078 15864,
2079 1016,
2080 9208,
2081 5112,
2082 13304,
2083 3064,
2084 11256,
2085 7160,
2086 15352,
2087 2040,
2088 10232,
2089 6136,
2090 14328,
2091 4088,
2092 12280,
2093 8184,
2094 16376,
2095 4,
2096 8196,
2097 4100,
2098 12292,
2099 2052,
2100 10244,
2101 6148,
2102 14340,
2103 1028,
2104 9220,
2105 5124,
2106 13316,
2107 3076,
2108 11268,
2109 7172,
2110 15364,
2111 516,
2112 8708,
2113 4612,
2114 12804,
2115 2564,
2116 10756,
2117 6660,
2118 14852,
2119 1540,
2120 9732,
2121 5636,
2122 13828,
2123 3588,
2124 11780,
2125 7684,
2126 15876,
2127 260,
2128 8452,
2129 4356,
2130 12548,
2131 2308,
2132 10500,
2133 6404,
2134 14596,
2135 1284,
2136 9476,
2137 5380,
2138 13572,
2139 3332,
2140 11524,
2141 7428,
2142 15620,
2143 772,
2144 8964,
2145 4868,
2146 13060,
2147 2820,
2148 11012,
2149 6916,
2150 15108,
2151 1796,
2152 9988,
2153 5892,
2154 14084,
2155 3844,
2156 12036,
2157 7940,
2158 16132,
2159 132,
2160 8324,
2161 4228,
2162 12420,
2163 2180,
2164 10372,
2165 6276,
2166 14468,
2167 1156,
2168 9348,
2169 5252,
2170 13444,
2171 3204,
2172 11396,
2173 7300,
2174 15492,
2175 644,
2176 8836,
2177 4740,
2178 12932,
2179 2692,
2180 10884,
2181 6788,
2182 14980,
2183 1668,
2184 9860,
2185 5764,
2186 13956,
2187 3716,
2188 11908,
2189 7812,
2190 16004,
2191 388,
2192 8580,
2193 4484,
2194 12676,
2195 2436,
2196 10628,
2197 6532,
2198 14724,
2199 1412,
2200 9604,
2201 5508,
2202 13700,
2203 3460,
2204 11652,
2205 7556,
2206 15748,
2207 900,
2208 9092,
2209 4996,
2210 13188,
2211 2948,
2212 11140,
2213 7044,
2214 15236,
2215 1924,
2216 10116,
2217 6020,
2218 14212,
2219 3972,
2220 12164,
2221 8068,
2222 16260,
2223 68,
2224 8260,
2225 4164,
2226 12356,
2227 2116,
2228 10308,
2229 6212,
2230 14404,
2231 1092,
2232 9284,
2233 5188,
2234 13380,
2235 3140,
2236 11332,
2237 7236,
2238 15428,
2239 580,
2240 8772,
2241 4676,
2242 12868,
2243 2628,
2244 10820,
2245 6724,
2246 14916,
2247 1604,
2248 9796,
2249 5700,
2250 13892,
2251 3652,
2252 11844,
2253 7748,
2254 15940,
2255 324,
2256 8516,
2257 4420,
2258 12612,
2259 2372,
2260 10564,
2261 6468,
2262 14660,
2263 1348,
2264 9540,
2265 5444,
2266 13636,
2267 3396,
2268 11588,
2269 7492,
2270 15684,
2271 836,
2272 9028,
2273 4932,
2274 13124,
2275 2884,
2276 11076,
2277 6980,
2278 15172,
2279 1860,
2280 10052,
2281 5956,
2282 14148,
2283 3908,
2284 12100,
2285 8004,
2286 16196,
2287 196,
2288 8388,
2289 4292,
2290 12484,
2291 2244,
2292 10436,
2293 6340,
2294 14532,
2295 1220,
2296 9412,
2297 5316,
2298 13508,
2299 3268,
2300 11460,
2301 7364,
2302 15556,
2303 708,
2304 8900,
2305 4804,
2306 12996,
2307 2756,
2308 10948,
2309 6852,
2310 15044,
2311 1732,
2312 9924,
2313 5828,
2314 14020,
2315 3780,
2316 11972,
2317 7876,
2318 16068,
2319 452,
2320 8644,
2321 4548,
2322 12740,
2323 2500,
2324 10692,
2325 6596,
2326 14788,
2327 1476,
2328 9668,
2329 5572,
2330 13764,
2331 3524,
2332 11716,
2333 7620,
2334 15812,
2335 964,
2336 9156,
2337 5060,
2338 13252,
2339 3012,
2340 11204,
2341 7108,
2342 15300,
2343 1988,
2344 10180,
2345 6084,
2346 14276,
2347 4036,
2348 12228,
2349 8132,
2350 16324,
2351 36,
2352 8228,
2353 4132,
2354 12324,
2355 2084,
2356 10276,
2357 6180,
2358 14372,
2359 1060,
2360 9252,
2361 5156,
2362 13348,
2363 3108,
2364 11300,
2365 7204,
2366 15396,
2367 548,
2368 8740,
2369 4644,
2370 12836,
2371 2596,
2372 10788,
2373 6692,
2374 14884,
2375 1572,
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3544 9580,
3545 5484,
3546 13676,
3547 3436,
3548 11628,
3549 7532,
3550 15724,
3551 876,
3552 9068,
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3602 12780,
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3991 1468,
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3993 5564,
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4008 10172,
4009 6076,
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4020 10364,
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4025 5244,
4026 13436,
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4093 7420,
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4210 12418,
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4220 11394,
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4299 3650,
4300 11842,
4301 7746,
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4310 14658,
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4312 9538,
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4320 9026,
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4380 11714,
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4399 34,
4400 8226,
4401 4130,
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4410 13346,
4411 3106,
4412 11298,
4413 7202,
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4421 6690,
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4427 3618,
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4429 7714,
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4502 14754,
4503 1442,
4504 9634,
4505 5538,
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4507 3490,
4508 11682,
4509 7586,
4510 15778,
4511 930,
4512 9122,
4513 5026,
4514 13218,
4515 2978,
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4517 7074,
4518 15266,
4519 1954,
4520 10146,
4521 6050,
4522 14242,
4523 4002,
4524 12194,
4525 8098,
4526 16290,
4527 98,
4528 8290,
4529 4194,
4530 12386,
4531 2146,
4532 10338,
4533 6242,
4534 14434,
4535 1122,
4536 9314,
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4538 13410,
4539 3170,
4540 11362,
4541 7266,
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4543 610,
4544 8802,
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4546 12898,
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4551 1634,
4552 9826,
4553 5730,
4554 13922,
4555 3682,
4556 11874,
4557 7778,
4558 15970,
4559 354,
4560 8546,
4561 4450,
4562 12642,
4563 2402,
4564 10594,
4565 6498,
4566 14690,
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4568 9570,
4569 5474,
4570 13666,
4571 3426,
4572 11618,
4573 7522,
4574 15714,
4575 866,
4576 9058,
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4578 13154,
4579 2914,
4580 11106,
4581 7010,
4582 15202,
4583 1890,
4584 10082,
4585 5986,
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4587 3938,
4588 12130,
4589 8034,
4590 16226,
4591 226,
4592 8418,
4593 4322,
4594 12514,
4595 2274,
4596 10466,
4597 6370,
4598 14562,
4599 1250,
4600 9442,
4601 5346,
4602 13538,
4603 3298,
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4605 7394,
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4607 738,
4608 8930,
4609 4834,
4610 13026,
4611 2786,
4612 10978,
4613 6882,
4614 15074,
4615 1762,
4616 9954,
4617 5858,
4618 14050,
4619 3810,
4620 12002,
4621 7906,
4622 16098,
4623 482,
4624 8674,
4625 4578,
4626 12770,
4627 2530,
4628 10722,
4629 6626,
4630 14818,
4631 1506,
4632 9698,
4633 5602,
4634 13794,
4635 3554,
4636 11746,
4637 7650,
4638 15842,
4639 994,
4640 9186,
4641 5090,
4642 13282,
4643 3042,
4644 11234,
4645 7138,
4646 15330,
4647 2018,
4648 10210,
4649 6114,
4650 14306,
4651 4066,
4652 12258,
4653 8162,
4654 16354,
4655 18,
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4657 4114,
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4659 2066,
4660 10258,
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4664 9234,
4665 5138,
4666 13330,
4667 3090,
4668 11282,
4669 7186,
4670 15378,
4671 530,
4672 8722,
4673 4626,
4674 12818,
4675 2578,
4676 10770,
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4680 9746,
4681 5650,
4682 13842,
4683 3602,
4684 11794,
4685 7698,
4686 15890,
4687 274,
4688 8466,
4689 4370,
4690 12562,
4691 2322,
4692 10514,
4693 6418,
4694 14610,
4695 1298,
4696 9490,
4697 5394,
4698 13586,
4699 3346,
4700 11538,
4701 7442,
4702 15634,
4703 786,
4704 8978,
4705 4882,
4706 13074,
4707 2834,
4708 11026,
4709 6930,
4710 15122,
4711 1810,
4712 10002,
4713 5906,
4714 14098,
4715 3858,
4716 12050,
4717 7954,
4718 16146,
4719 146,
4720 8338,
4721 4242,
4722 12434,
4723 2194,
4724 10386,
4725 6290,
4726 14482,
4727 1170,
4728 9362,
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8255 513,
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15310 15991,
15311 375,
15312 8567,
15313 4471,
15314 12663,
15315 2423,
15316 10615,
15317 6519,
15318 14711,
15319 1399,
15320 9591,
15321 5495,
15322 13687,
15323 3447,
15324 11639,
15325 7543,
15326 15735,
15327 887,
15328 9079,
15329 4983,
15330 13175,
15331 2935,
15332 11127,
15333 7031,
15334 15223,
15335 1911,
15336 10103,
15337 6007,
15338 14199,
15339 3959,
15340 12151,
15341 8055,
15342 16247,
15343 247,
15344 8439,
15345 4343,
15346 12535,
15347 2295,
15348 10487,
15349 6391,
15350 14583,
15351 1271,
15352 9463,
15353 5367,
15354 13559,
15355 3319,
15356 11511,
15357 7415,
15358 15607,
15359 759,
15360 8951,
15361 4855,
15362 13047,
15363 2807,
15364 10999,
15365 6903,
15366 15095,
15367 1783,
15368 9975,
15369 5879,
15370 14071,
15371 3831,
15372 12023,
15373 7927,
15374 16119,
15375 503,
15376 8695,
15377 4599,
15378 12791,
15379 2551,
15380 10743,
15381 6647,
15382 14839,
15383 1527,
15384 9719,
15385 5623,
15386 13815,
15387 3575,
15388 11767,
15389 7671,
15390 15863,
15391 1015,
15392 9207,
15393 5111,
15394 13303,
15395 3063,
15396 11255,
15397 7159,
15398 15351,
15399 2039,
15400 10231,
15401 6135,
15402 14327,
15403 4087,
15404 12279,
15405 8183,
15406 16375,
15407 15,
15408 8207,
15409 4111,
15410 12303,
15411 2063,
15412 10255,
15413 6159,
15414 14351,
15415 1039,
15416 9231,
15417 5135,
15418 13327,
15419 3087,
15420 11279,
15421 7183,
15422 15375,
15423 527,
15424 8719,
15425 4623,
15426 12815,
15427 2575,
15428 10767,
15429 6671,
15430 14863,
15431 1551,
15432 9743,
15433 5647,
15434 13839,
15435 3599,
15436 11791,
15437 7695,
15438 15887,
15439 271,
15440 8463,
15441 4367,
15442 12559,
15443 2319,
15444 10511,
15445 6415,
15446 14607,
15447 1295,
15448 9487,
15449 5391,
15450 13583,
15451 3343,
15452 11535,
15453 7439,
15454 15631,
15455 783,
15456 8975,
15457 4879,
15458 13071,
15459 2831,
15460 11023,
15461 6927,
15462 15119,
15463 1807,
15464 9999,
15465 5903,
15466 14095,
15467 3855,
15468 12047,
15469 7951,
15470 16143,
15471 143,
15472 8335,
15473 4239,
15474 12431,
15475 2191,
15476 10383,
15477 6287,
15478 14479,
15479 1167,
15480 9359,
15481 5263,
15482 13455,
15483 3215,
15484 11407,
15485 7311,
15486 15503,
15487 655,
15488 8847,
15489 4751,
15490 12943,
15491 2703,
15492 10895,
15493 6799,
15494 14991,
15495 1679,
15496 9871,
15497 5775,
15498 13967,
15499 3727,
15500 11919,
15501 7823,
15502 16015,
15503 399,
15504 8591,
15505 4495,
15506 12687,
15507 2447,
15508 10639,
15509 6543,
15510 14735,
15511 1423,
15512 9615,
15513 5519,
15514 13711,
15515 3471,
15516 11663,
15517 7567,
15518 15759,
15519 911,
15520 9103,
15521 5007,
15522 13199,
15523 2959,
15524 11151,
15525 7055,
15526 15247,
15527 1935,
15528 10127,
15529 6031,
15530 14223,
15531 3983,
15532 12175,
15533 8079,
15534 16271,
15535 79,
15536 8271,
15537 4175,
15538 12367,
15539 2127,
15540 10319,
15541 6223,
15542 14415,
15543 1103,
15544 9295,
15545 5199,
15546 13391,
15547 3151,
15548 11343,
15549 7247,
15550 15439,
15551 591,
15552 8783,
15553 4687,
15554 12879,
15555 2639,
15556 10831,
15557 6735,
15558 14927,
15559 1615,
15560 9807,
15561 5711,
15562 13903,
15563 3663,
15564 11855,
15565 7759,
15566 15951,
15567 335,
15568 8527,
15569 4431,
15570 12623,
15571 2383,
15572 10575,
15573 6479,
15574 14671,
15575 1359,
15576 9551,
15577 5455,
15578 13647,
15579 3407,
15580 11599,
15581 7503,
15582 15695,
15583 847,
15584 9039,
15585 4943,
15586 13135,
15587 2895,
15588 11087,
15589 6991,
15590 15183,
15591 1871,
15592 10063,
15593 5967,
15594 14159,
15595 3919,
15596 12111,
15597 8015,
15598 16207,
15599 207,
15600 8399,
15601 4303,
15602 12495,
15603 2255,
15604 10447,
15605 6351,
15606 14543,
15607 1231,
15608 9423,
15609 5327,
15610 13519,
15611 3279,
15612 11471,
15613 7375,
15614 15567,
15615 719,
15616 8911,
15617 4815,
15618 13007,
15619 2767,
15620 10959,
15621 6863,
15622 15055,
15623 1743,
15624 9935,
15625 5839,
15626 14031,
15627 3791,
15628 11983,
15629 7887,
15630 16079,
15631 463,
15632 8655,
15633 4559,
15634 12751,
15635 2511,
15636 10703,
15637 6607,
15638 14799,
15639 1487,
15640 9679,
15641 5583,
15642 13775,
15643 3535,
15644 11727,
15645 7631,
15646 15823,
15647 975,
15648 9167,
15649 5071,
15650 13263,
15651 3023,
15652 11215,
15653 7119,
15654 15311,
15655 1999,
15656 10191,
15657 6095,
15658 14287,
15659 4047,
15660 12239,
15661 8143,
15662 16335,
15663 47,
15664 8239,
15665 4143,
15666 12335,
15667 2095,
15668 10287,
15669 6191,
15670 14383,
15671 1071,
15672 9263,
15673 5167,
15674 13359,
15675 3119,
15676 11311,
15677 7215,
15678 15407,
15679 559,
15680 8751,
15681 4655,
15682 12847,
15683 2607,
15684 10799,
15685 6703,
15686 14895,
15687 1583,
15688 9775,
15689 5679,
15690 13871,
15691 3631,
15692 11823,
15693 7727,
15694 15919,
15695 303,
15696 8495,
15697 4399,
15698 12591,
15699 2351,
15700 10543,
15701 6447,
15702 14639,
15703 1327,
15704 9519,
15705 5423,
15706 13615,
15707 3375,
15708 11567,
15709 7471,
15710 15663,
15711 815,
15712 9007,
15713 4911,
15714 13103,
15715 2863,
15716 11055,
15717 6959,
15718 15151,
15719 1839,
15720 10031,
15721 5935,
15722 14127,
15723 3887,
15724 12079,
15725 7983,
15726 16175,
15727 175,
15728 8367,
15729 4271,
15730 12463,
15731 2223,
15732 10415,
15733 6319,
15734 14511,
15735 1199,
15736 9391,
15737 5295,
15738 13487,
15739 3247,
15740 11439,
15741 7343,
15742 15535,
15743 687,
15744 8879,
15745 4783,
15746 12975,
15747 2735,
15748 10927,
15749 6831,
15750 15023,
15751 1711,
15752 9903,
15753 5807,
15754 13999,
15755 3759,
15756 11951,
15757 7855,
15758 16047,
15759 431,
15760 8623,
15761 4527,
15762 12719,
15763 2479,
15764 10671,
15765 6575,
15766 14767,
15767 1455,
15768 9647,
15769 5551,
15770 13743,
15771 3503,
15772 11695,
15773 7599,
15774 15791,
15775 943,
15776 9135,
15777 5039,
15778 13231,
15779 2991,
15780 11183,
15781 7087,
15782 15279,
15783 1967,
15784 10159,
15785 6063,
15786 14255,
15787 4015,
15788 12207,
15789 8111,
15790 16303,
15791 111,
15792 8303,
15793 4207,
15794 12399,
15795 2159,
15796 10351,
15797 6255,
15798 14447,
15799 1135,
15800 9327,
15801 5231,
15802 13423,
15803 3183,
15804 11375,
15805 7279,
15806 15471,
15807 623,
15808 8815,
15809 4719,
15810 12911,
15811 2671,
15812 10863,
15813 6767,
15814 14959,
15815 1647,
15816 9839,
15817 5743,
15818 13935,
15819 3695,
15820 11887,
15821 7791,
15822 15983,
15823 367,
15824 8559,
15825 4463,
15826 12655,
15827 2415,
15828 10607,
15829 6511,
15830 14703,
15831 1391,
15832 9583,
15833 5487,
15834 13679,
15835 3439,
15836 11631,
15837 7535,
15838 15727,
15839 879,
15840 9071,
15841 4975,
15842 13167,
15843 2927,
15844 11119,
15845 7023,
15846 15215,
15847 1903,
15848 10095,
15849 5999,
15850 14191,
15851 3951,
15852 12143,
15853 8047,
15854 16239,
15855 239,
15856 8431,
15857 4335,
15858 12527,
15859 2287,
15860 10479,
15861 6383,
15862 14575,
15863 1263,
15864 9455,
15865 5359,
15866 13551,
15867 3311,
15868 11503,
15869 7407,
15870 15599,
15871 751,
15872 8943,
15873 4847,
15874 13039,
15875 2799,
15876 10991,
15877 6895,
15878 15087,
15879 1775,
15880 9967,
15881 5871,
15882 14063,
15883 3823,
15884 12015,
15885 7919,
15886 16111,
15887 495,
15888 8687,
15889 4591,
15890 12783,
15891 2543,
15892 10735,
15893 6639,
15894 14831,
15895 1519,
15896 9711,
15897 5615,
15898 13807,
15899 3567,
15900 11759,
15901 7663,
15902 15855,
15903 1007,
15904 9199,
15905 5103,
15906 13295,
15907 3055,
15908 11247,
15909 7151,
15910 15343,
15911 2031,
15912 10223,
15913 6127,
15914 14319,
15915 4079,
15916 12271,
15917 8175,
15918 16367,
15919 31,
15920 8223,
15921 4127,
15922 12319,
15923 2079,
15924 10271,
15925 6175,
15926 14367,
15927 1055,
15928 9247,
15929 5151,
15930 13343,
15931 3103,
15932 11295,
15933 7199,
15934 15391,
15935 543,
15936 8735,
15937 4639,
15938 12831,
15939 2591,
15940 10783,
15941 6687,
15942 14879,
15943 1567,
15944 9759,
15945 5663,
15946 13855,
15947 3615,
15948 11807,
15949 7711,
15950 15903,
15951 287,
15952 8479,
15953 4383,
15954 12575,
15955 2335,
15956 10527,
15957 6431,
15958 14623,
15959 1311,
15960 9503,
15961 5407,
15962 13599,
15963 3359,
15964 11551,
15965 7455,
15966 15647,
15967 799,
15968 8991,
15969 4895,
15970 13087,
15971 2847,
15972 11039,
15973 6943,
15974 15135,
15975 1823,
15976 10015,
15977 5919,
15978 14111,
15979 3871,
15980 12063,
15981 7967,
15982 16159,
15983 159,
15984 8351,
15985 4255,
15986 12447,
15987 2207,
15988 10399,
15989 6303,
15990 14495,
15991 1183,
15992 9375,
15993 5279,
15994 13471,
15995 3231,
15996 11423,
15997 7327,
15998 15519,
15999 671,
16000 8863,
16001 4767,
16002 12959,
16003 2719,
16004 10911,
16005 6815,
16006 15007,
16007 1695,
16008 9887,
16009 5791,
16010 13983,
16011 3743,
16012 11935,
16013 7839,
16014 16031,
16015 415,
16016 8607,
16017 4511,
16018 12703,
16019 2463,
16020 10655,
16021 6559,
16022 14751,
16023 1439,
16024 9631,
16025 5535,
16026 13727,
16027 3487,
16028 11679,
16029 7583,
16030 15775,
16031 927,
16032 9119,
16033 5023,
16034 13215,
16035 2975,
16036 11167,
16037 7071,
16038 15263,
16039 1951,
16040 10143,
16041 6047,
16042 14239,
16043 3999,
16044 12191,
16045 8095,
16046 16287,
16047 95,
16048 8287,
16049 4191,
16050 12383,
16051 2143,
16052 10335,
16053 6239,
16054 14431,
16055 1119,
16056 9311,
16057 5215,
16058 13407,
16059 3167,
16060 11359,
16061 7263,
16062 15455,
16063 607,
16064 8799,
16065 4703,
16066 12895,
16067 2655,
16068 10847,
16069 6751,
16070 14943,
16071 1631,
16072 9823,
16073 5727,
16074 13919,
16075 3679,
16076 11871,
16077 7775,
16078 15967,
16079 351,
16080 8543,
16081 4447,
16082 12639,
16083 2399,
16084 10591,
16085 6495,
16086 14687,
16087 1375,
16088 9567,
16089 5471,
16090 13663,
16091 3423,
16092 11615,
16093 7519,
16094 15711,
16095 863,
16096 9055,
16097 4959,
16098 13151,
16099 2911,
16100 11103,
16101 7007,
16102 15199,
16103 1887,
16104 10079,
16105 5983,
16106 14175,
16107 3935,
16108 12127,
16109 8031,
16110 16223,
16111 223,
16112 8415,
16113 4319,
16114 12511,
16115 2271,
16116 10463,
16117 6367,
16118 14559,
16119 1247,
16120 9439,
16121 5343,
16122 13535,
16123 3295,
16124 11487,
16125 7391,
16126 15583,
16127 735,
16128 8927,
16129 4831,
16130 13023,
16131 2783,
16132 10975,
16133 6879,
16134 15071,
16135 1759,
16136 9951,
16137 5855,
16138 14047,
16139 3807,
16140 11999,
16141 7903,
16142 16095,
16143 479,
16144 8671,
16145 4575,
16146 12767,
16147 2527,
16148 10719,
16149 6623,
16150 14815,
16151 1503,
16152 9695,
16153 5599,
16154 13791,
16155 3551,
16156 11743,
16157 7647,
16158 15839,
16159 991,
16160 9183,
16161 5087,
16162 13279,
16163 3039,
16164 11231,
16165 7135,
16166 15327,
16167 2015,
16168 10207,
16169 6111,
16170 14303,
16171 4063,
16172 12255,
16173 8159,
16174 16351,
16175 63,
16176 8255,
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16178 12351,
16179 2111,
16180 10303,
16181 6207,
16182 14399,
16183 1087,
16184 9279,
16185 5183,
16186 13375,
16187 3135,
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16190 15423,
16191 575,
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16193 4671,
16194 12863,
16195 2623,
16196 10815,
16197 6719,
16198 14911,
16199 1599,
16200 9791,
16201 5695,
16202 13887,
16203 3647,
16204 11839,
16205 7743,
16206 15935,
16207 319,
16208 8511,
16209 4415,
16210 12607,
16211 2367,
16212 10559,
16213 6463,
16214 14655,
16215 1343,
16216 9535,
16217 5439,
16218 13631,
16219 3391,
16220 11583,
16221 7487,
16222 15679,
16223 831,
16224 9023,
16225 4927,
16226 13119,
16227 2879,
16228 11071,
16229 6975,
16230 15167,
16231 1855,
16232 10047,
16233 5951,
16234 14143,
16235 3903,
16236 12095,
16237 7999,
16238 16191,
16239 191,
16240 8383,
16241 4287,
16242 12479,
16243 2239,
16244 10431,
16245 6335,
16246 14527,
16247 1215,
16248 9407,
16249 5311,
16250 13503,
16251 3263,
16252 11455,
16253 7359,
16254 15551,
16255 703,
16256 8895,
16257 4799,
16258 12991,
16259 2751,
16260 10943,
16261 6847,
16262 15039,
16263 1727,
16264 9919,
16265 5823,
16266 14015,
16267 3775,
16268 11967,
16269 7871,
16270 16063,
16271 447,
16272 8639,
16273 4543,
16274 12735,
16275 2495,
16276 10687,
16277 6591,
16278 14783,
16279 1471,
16280 9663,
16281 5567,
16282 13759,
16283 3519,
16284 11711,
16285 7615,
16286 15807,
16287 959,
16288 9151,
16289 5055,
16290 13247,
16291 3007,
16292 11199,
16293 7103,
16294 15295,
16295 1983,
16296 10175,
16297 6079,
16298 14271,
16299 4031,
16300 12223,
16301 8127,
16302 16319,
16303 127,
16304 8319,
16305 4223,
16306 12415,
16307 2175,
16308 10367,
16309 6271,
16310 14463,
16311 1151,
16312 9343,
16313 5247,
16314 13439,
16315 3199,
16316 11391,
16317 7295,
16318 15487,
16319 639,
16320 8831,
16321 4735,
16322 12927,
16323 2687,
16324 10879,
16325 6783,
16326 14975,
16327 1663,
16328 9855,
16329 5759,
16330 13951,
16331 3711,
16332 11903,
16333 7807,
16334 15999,
16335 383,
16336 8575,
16337 4479,
16338 12671,
16339 2431,
16340 10623,
16341 6527,
16342 14719,
16343 1407,
16344 9599,
16345 5503,
16346 13695,
16347 3455,
16348 11647,
16349 7551,
16350 15743,
16351 895,
16352 9087,
16353 4991,
16354 13183,
16355 2943,
16356 11135,
16357 7039,
16358 15231,
16359 1919,
16360 10111,
16361 6015,
16362 14207,
16363 3967,
16364 12159,
16365 8063,
16366 16255,
16367 255,
16368 8447,
16369 4351,
16370 12543,
16371 2303,
16372 10495,
16373 6399,
16374 14591,
16375 1279,
16376 9471,
16377 5375,
16378 13567,
16379 3327,
16380 11519,
16381 7423,
16382 15615,
16383 767,
16384 8959,
16385 4863,
16386 13055,
16387 2815,
16388 11007,
16389 6911,
16390 15103,
16391 1791,
16392 9983,
16393 5887,
16394 14079,
16395 3839,
16396 12031,
16397 7935,
16398 16127,
16399 511,
16400 8703,
16401 4607,
16402 12799,
16403 2559,
16404 10751,
16405 6655,
16406 14847,
16407 1535,
16408 9727,
16409 5631,
16410 13823,
16411 3583,
16412 11775,
16413 7679,
16414 15871,
16415 1023,
16416 9215,
16417 5119,
16418 13311,
16419 3071,
16420 11263,
16421 7167,
16422 15359,
16423 2047,
16424 10239,
16425 6143,
16426 14335,
16427 4095,
16428 12287,
16429 8191,
16430 16383,
16431 };
16432 /*lint +e915*/
Ifx_g_FftF32_bitReverseTable
CONST_CFG unsigned short Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH]
Definition: Ifx_FftF32_BitReverseTable.c:46
IFX_FFTF32_MAX_LENGTH
#define IFX_FFTF32_MAX_LENGTH
Maximum FFT length. If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable sha...
Definition: Ifx_FftF32.h:60
Ifx_FftF32.h
Floating-point Fast Fourier Transform.
CONST_CFG
#define CONST_CFG
Definition: Compilers.h:57


iLLD_TC26B: Ifx_FftF32_TwiddleTable.c Source File

Service

CpuGeneric

SysSe

Math

Ifx_FftF32_TwiddleTable.c

Go to the documentation of this file.

1 /**

2 * \file Ifx_FftF32_TwiddleTable.c

3 * \brief Floating-point Fast Fourier Transform Twiddle-Factors

4 *

5 *

6 * \version disabled

7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.

8 *

9 *

10 * IMPORTANT NOTICE

11 *

12 * Use of this file is subject to the terms of use agreed between (i) you or

13 * the company in which ordinary course of business you are acting and (ii)

14 * Infineon Technologies AG or its licensees. If and as long as no such terms

15 * of use are agreed, use of this file is subject to following:

16 *

17 * Boost Software License - Version 1.0 - August 17th, 2003

18 *

19 * Permission is hereby granted, free of charge, to any person or organization

20 * obtaining a copy of the software and accompanying documentation covered by

21 * this license (the "Software") to use, reproduce, display, distribute,

22 * execute, and transmit the Software, and to prepare derivative works of the

23 * Software, and to permit third-parties to whom the Software is furnished to

24 * do so, all subject to the following:

25 *

26 * The copyright notices in the Software and this entire statement, including

27 * the above license grant, this restriction and the following disclaimer, must

28 * be included in all copies of the Software, in whole or in part, and all

29 * derivative works of the Software, unless such copies or derivative works are

30 * solely in the form of machine-executable object code generated by a source

31 * language processor.

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33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT

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38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER

39 * DEALINGS IN THE SOFTWARE.

40 *

41 */

42

43 #include "Ifx_FftF32.h"

44

45 /*lint -e915*/

46 IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH / 2] = {

47 {_DATAF(1.00000000000000000000), _DATAF(-0.00000000000000000000)},

48 {_DATAF(0.99999994039535522000), _DATAF(-0.00038349517853930593)},

49 {_DATAF(0.99999970197677612000), _DATAF(-0.00076699029887095094)},

50 {_DATAF(0.99999934434890747000), _DATAF(-0.00115048536099493500)},

51 {_DATAF(0.99999880790710449000), _DATAF(-0.00153398013208061460)},

52 {_DATAF(0.99999815225601196000), _DATAF(-0.00191747478675097230)},

53 {_DATAF(0.99999737739562988000), _DATAF(-0.00230096909217536450)},

54 {_DATAF(0.99999642372131348000), _DATAF(-0.00268446304835379120)},

55 {_DATAF(0.99999529123306274000), _DATAF(-0.00306795677170157430)},

56 {_DATAF(0.99999403953552246000), _DATAF(-0.00345145002938807010)},

57 {_DATAF(0.99999266862869263000), _DATAF(-0.00383494258858263490)},

58 {_DATAF(0.99999111890792847000), _DATAF(-0.00421843444928526880)},

59 {_DATAF(0.99998939037322998000), _DATAF(-0.00460192607715725900)},

60 {_DATAF(0.99998760223388672000), _DATAF(-0.00498541677370667460)},

61 {_DATAF(0.99998557567596436000), _DATAF(-0.00536890700459480290)},

62 {_DATAF(0.99998342990875244000), _DATAF(-0.00575239630416035650)},

63 {_DATAF(0.99998116493225098000), _DATAF(-0.00613588467240333560)},

64 {_DATAF(0.99997872114181519000), _DATAF(-0.00651937210932374000)},

65 {_DATAF(0.99997615814208984000), _DATAF(-0.00690285861492156980)},

66 {_DATAF(0.99997347593307495000), _DATAF(-0.00728634418919682500)},

67 {_DATAF(0.99997061491012573000), _DATAF(-0.00766982883214950560)},

68 {_DATAF(0.99996757507324219000), _DATAF(-0.00805331207811832430)},

69 {_DATAF(0.99996441602706909000), _DATAF(-0.00843679439276456830)},

70 {_DATAF(0.99996107816696167000), _DATAF(-0.00882027484476566310)},

71 {_DATAF(0.99995762109756470000), _DATAF(-0.00920375436544418330)},

72 {_DATAF(0.99995404481887817000), _DATAF(-0.00958723295480012890)},

73 {_DATAF(0.99995028972625732000), _DATAF(-0.00997070968151092530)},

74 {_DATAF(0.99994641542434692000), _DATAF(-0.01035418547689914700)},

75 {_DATAF(0.99994236230850220000), _DATAF(-0.01073765940964222000)},

76 {_DATAF(0.99993813037872314000), _DATAF(-0.01112113147974014300)},

77 {_DATAF(0.99993383884429932000), _DATAF(-0.01150460168719291700)},

78 {_DATAF(0.99992930889129639000), _DATAF(-0.01188807096332311600)},

79 {_DATAF(0.99992471933364868000), _DATAF(-0.01227153837680816700)},

80 {_DATAF(0.99991995096206665000), _DATAF(-0.01265500392764806700)},

81 {_DATAF(0.99991500377655029000), _DATAF(-0.01303846761584281900)},

82 {_DATAF(0.99990993738174438000), _DATAF(-0.01342192851006984700)},

83 {_DATAF(0.99990469217300415000), _DATAF(-0.01380538847297430000)},

84 {_DATAF(0.99989932775497437000), _DATAF(-0.01418884657323360400)},

85 {_DATAF(0.99989384412765503000), _DATAF(-0.01457230187952518500)},

86 {_DATAF(0.99988818168640137000), _DATAF(-0.01495575532317161600)},

87 {_DATAF(0.99988234043121338000), _DATAF(-0.01533920597285032300)},

88 {_DATAF(0.99987637996673584000), _DATAF(-0.01572265475988388100)},

89 {_DATAF(0.99987030029296875000), _DATAF(-0.01610610261559486400)},

90 {_DATAF(0.99986404180526733000), _DATAF(-0.01648954674601554900)},

91 {_DATAF(0.99985766410827637000), _DATAF(-0.01687298715114593500)},

92 {_DATAF(0.99985110759735107000), _DATAF(-0.01725642755627632100)},

93 {_DATAF(0.99984443187713623000), _DATAF(-0.01763986423611640900)},

94 {_DATAF(0.99983757734298706000), _DATAF(-0.01802329905331134800)},

95 {_DATAF(0.99983060359954834000), _DATAF(-0.01840673014521598800)},

96 {_DATAF(0.99982345104217529000), _DATAF(-0.01879015937447547900)},

97 {_DATAF(0.99981617927551270000), _DATAF(-0.01917358487844467200)},

98 {_DATAF(0.99980872869491577000), _DATAF(-0.01955700851976871500)},

99 {_DATAF(0.99980115890502930000), _DATAF(-0.01994042843580246000)},

100 {_DATAF(0.99979346990585327000), _DATAF(-0.02032384648919105500)},

101 {_DATAF(0.99978560209274292000), _DATAF(-0.02070726081728935200)},

102 {_DATAF(0.99977755546569824000), _DATAF(-0.02109067142009735100)},

103 {_DATAF(0.99976938962936401000), _DATAF(-0.02147408016026020100)},

104 {_DATAF(0.99976110458374023000), _DATAF(-0.02185748517513275100)},

105 {_DATAF(0.99975264072418213000), _DATAF(-0.02224088832736015300)},

106 {_DATAF(0.99974405765533447000), _DATAF(-0.02262428589165210700)},

107 {_DATAF(0.99973529577255249000), _DATAF(-0.02300768159329891200)},

108 {_DATAF(0.99972641468048096000), _DATAF(-0.02339107356965541800)},

109 {_DATAF(0.99971735477447510000), _DATAF(-0.02377446182072162600)},

110 {_DATAF(0.99970817565917969000), _DATAF(-0.02415784634649753600)},

111 {_DATAF(0.99969881772994995000), _DATAF(-0.02454122900962829600)},

112 {_DATAF(0.99968934059143066000), _DATAF(-0.02492460608482360800)},

113 {_DATAF(0.99967968463897705000), _DATAF(-0.02530798129737377200)},

114 {_DATAF(0.99966990947723389000), _DATAF(-0.02569135092198848700)},

115 {_DATAF(0.99966001510620117000), _DATAF(-0.02607471868395805400)},

116 {_DATAF(0.99964994192123413000), _DATAF(-0.02645808085799217200)},

117 {_DATAF(0.99963968992233276000), _DATAF(-0.02684143930673599200)},

118 {_DATAF(0.99962931871414185000), _DATAF(-0.02722479403018951400)},

119 {_DATAF(0.99961882829666138000), _DATAF(-0.02760814502835273700)},

120 {_DATAF(0.99960815906524658000), _DATAF(-0.02799149230122566200)},

121 {_DATAF(0.99959737062454224000), _DATAF(-0.02837483584880828900)},

122 {_DATAF(0.99958640336990356000), _DATAF(-0.02875817380845546700)},

123 {_DATAF(0.99957531690597534000), _DATAF(-0.02914150804281234700)},

124 {_DATAF(0.99956405162811279000), _DATAF(-0.02952483855187892900)},

125 {_DATAF(0.99955266714096069000), _DATAF(-0.02990816533565521200)},

126 {_DATAF(0.99954110383987427000), _DATAF(-0.03029148653149604800)},

127 {_DATAF(0.99952942132949829000), _DATAF(-0.03067480400204658500)},

128 {_DATAF(0.99951756000518799000), _DATAF(-0.03105811588466167400)},

129 {_DATAF(0.99950557947158813000), _DATAF(-0.03144142404198646500)},

130 {_DATAF(0.99949347972869873000), _DATAF(-0.03182472661137580900)},

131 {_DATAF(0.99948120117187500000), _DATAF(-0.03220802545547485400)},

132 {_DATAF(0.99946874380111694000), _DATAF(-0.03259132057428360000)},

133 {_DATAF(0.99945616722106934000), _DATAF(-0.03297460824251174900)},

134 {_DATAF(0.99944347143173218000), _DATAF(-0.03335789218544960000)},

135 {_DATAF(0.99943059682846069000), _DATAF(-0.03374117240309715300)},

136 {_DATAF(0.99941760301589966000), _DATAF(-0.03412444517016410800)},

137 {_DATAF(0.99940443038940430000), _DATAF(-0.03450771421194076500)},

138 {_DATAF(0.99939113855361938000), _DATAF(-0.03489097952842712400)},

139 {_DATAF(0.99937766790390015000), _DATAF(-0.03527423739433288600)},

140 {_DATAF(0.99936407804489136000), _DATAF(-0.03565749153494834900)},

141 {_DATAF(0.99935030937194824000), _DATAF(-0.03604074195027351400)},

142 {_DATAF(0.99933642148971558000), _DATAF(-0.03642398491501808200)},

143 {_DATAF(0.99932235479354858000), _DATAF(-0.03680722415447235100)},

144 {_DATAF(0.99930816888809204000), _DATAF(-0.03719045594334602400)},

145 {_DATAF(0.99929386377334595000), _DATAF(-0.03757368400692939800)},

146 {_DATAF(0.99927937984466553000), _DATAF(-0.03795690461993217500)},

147 {_DATAF(0.99926477670669556000), _DATAF(-0.03834012150764465300)},

148 {_DATAF(0.99924999475479126000), _DATAF(-0.03872333094477653500)},

149 {_DATAF(0.99923503398895264000), _DATAF(-0.03910653665661811800)},

150 {_DATAF(0.99921995401382446000), _DATAF(-0.03948973491787910500)},

151 {_DATAF(0.99920475482940674000), _DATAF(-0.03987292572855949400)},

152 {_DATAF(0.99918937683105469000), _DATAF(-0.04025611653923988300)},

153 {_DATAF(0.99917387962341309000), _DATAF(-0.04063929617404937700)},

154 {_DATAF(0.99915820360183716000), _DATAF(-0.04102247208356857300)},

155 {_DATAF(0.99914240837097168000), _DATAF(-0.04140564054250717200)},

156 {_DATAF(0.99912649393081665000), _DATAF(-0.04178880527615547200)},

157 {_DATAF(0.99911034107208252000), _DATAF(-0.04217196255922317500)},

158 {_DATAF(0.99909412860870361000), _DATAF(-0.04255511239171028100)},

159 {_DATAF(0.99907773733139038000), _DATAF(-0.04293825849890708900)},

160 {_DATAF(0.99906116724014282000), _DATAF(-0.04332139343023300200)},

161 {_DATAF(0.99904447793960571000), _DATAF(-0.04370452836155891400)},

162 {_DATAF(0.99902766942977905000), _DATAF(-0.04408765211701393100)},

163 {_DATAF(0.99901068210601807000), _DATAF(-0.04447077214717865000)},

164 {_DATAF(0.99899357557296753000), _DATAF(-0.04485388472676277200)},

165 {_DATAF(0.99897629022598267000), _DATAF(-0.04523698985576629600)},

166 {_DATAF(0.99895888566970825000), _DATAF(-0.04562009125947952300)},

167 {_DATAF(0.99894130229949951000), _DATAF(-0.04600318148732185400)},

168 {_DATAF(0.99892359972000122000), _DATAF(-0.04638626798987388600)},

169 {_DATAF(0.99890571832656860000), _DATAF(-0.04676934704184532200)},

170 {_DATAF(0.99888771772384644000), _DATAF(-0.04715241864323616000)},

171 {_DATAF(0.99886953830718994000), _DATAF(-0.04753548279404640200)},

172 {_DATAF(0.99885123968124390000), _DATAF(-0.04791854321956634500)},

173 {_DATAF(0.99883282184600830000), _DATAF(-0.04830159246921539300)},

174 {_DATAF(0.99881422519683838000), _DATAF(-0.04868463799357414200)},

175 {_DATAF(0.99879544973373413000), _DATAF(-0.04906767606735229500)},

176 {_DATAF(0.99877655506134033000), _DATAF(-0.04945070296525955200)},

177 {_DATAF(0.99875754117965698000), _DATAF(-0.04983372613787651100)},

178 {_DATAF(0.99873834848403931000), _DATAF(-0.05021674185991287200)},

179 {_DATAF(0.99871903657913208000), _DATAF(-0.05059975013136863700)},

180 {_DATAF(0.99869954586029053000), _DATAF(-0.05098275095224380500)},

181 {_DATAF(0.99867993593215942000), _DATAF(-0.05136574059724807700)},

182 {_DATAF(0.99866014719009399000), _DATAF(-0.05174872651696205100)},

183 {_DATAF(0.99864023923873901000), _DATAF(-0.05213170498609542800)},

184 {_DATAF(0.99862015247344971000), _DATAF(-0.05251467600464820900)},

185 {_DATAF(0.99859994649887085000), _DATAF(-0.05289763584733009300)},

186 {_DATAF(0.99857956171035767000), _DATAF(-0.05328059196472168000)},

187 {_DATAF(0.99855905771255493000), _DATAF(-0.05366353690624237100)},

188 {_DATAF(0.99853843450546265000), _DATAF(-0.05404647812247276300)},

189 {_DATAF(0.99851763248443604000), _DATAF(-0.05442940816283226000)},

190 {_DATAF(0.99849665164947510000), _DATAF(-0.05481233075261116000)},

191 {_DATAF(0.99847555160522461000), _DATAF(-0.05519524589180946400)},

192 {_DATAF(0.99845433235168457000), _DATAF(-0.05557814985513687100)},

193 {_DATAF(0.99843293428421021000), _DATAF(-0.05596105009317398100)},

194 {_DATAF(0.99841141700744629000), _DATAF(-0.05634393915534019500)},

195 {_DATAF(0.99838972091674805000), _DATAF(-0.05672682076692581200)},

196 {_DATAF(0.99836790561676025000), _DATAF(-0.05710969492793083200)},

197 {_DATAF(0.99834591150283813000), _DATAF(-0.05749255791306495700)},

198 {_DATAF(0.99832379817962646000), _DATAF(-0.05787541717290878300)},

199 {_DATAF(0.99830156564712524000), _DATAF(-0.05825826525688171400)},

200 {_DATAF(0.99827915430068970000), _DATAF(-0.05864110589027404800)},

201 {_DATAF(0.99825656414031982000), _DATAF(-0.05902393534779548600)},

202 {_DATAF(0.99823385477066040000), _DATAF(-0.05940675735473632800)},

203 {_DATAF(0.99821102619171143000), _DATAF(-0.05978957191109657300)},

204 {_DATAF(0.99818801879882813000), _DATAF(-0.06017237529158592200)},

205 {_DATAF(0.99816483259201050000), _DATAF(-0.06055517122149467500)},

206 {_DATAF(0.99814152717590332000), _DATAF(-0.06093795970082283000)},

207 {_DATAF(0.99811810255050659000), _DATAF(-0.06132073700428009000)},

208 {_DATAF(0.99809449911117554000), _DATAF(-0.06170350685715675400)},

209 {_DATAF(0.99807077646255493000), _DATAF(-0.06208626553416252100)},

210 {_DATAF(0.99804687500000000000), _DATAF(-0.06246901676058769200)},

211 {_DATAF(0.99802285432815552000), _DATAF(-0.06285175681114196800)},

212 {_DATAF(0.99799871444702148000), _DATAF(-0.06323449313640594500)},

213 {_DATAF(0.99797439575195313000), _DATAF(-0.06361721456050872800)},

214 {_DATAF(0.99794989824295044000), _DATAF(-0.06399992853403091400)},

215 {_DATAF(0.99792528152465820000), _DATAF(-0.06438262760639190700)},

216 {_DATAF(0.99790054559707642000), _DATAF(-0.06476532667875289900)},

217 {_DATAF(0.99787563085556030000), _DATAF(-0.06514801084995269800)},

218 {_DATAF(0.99785053730010986000), _DATAF(-0.06553068757057189900)},

219 {_DATAF(0.99782532453536987000), _DATAF(-0.06591334939002990700)},

220 {_DATAF(0.99779999256134033000), _DATAF(-0.06629601120948791500)},

221 {_DATAF(0.99777448177337646000), _DATAF(-0.06667865812778472900)},

222 {_DATAF(0.99774885177612305000), _DATAF(-0.06706129014492034900)},

223 {_DATAF(0.99772304296493530000), _DATAF(-0.06744392216205596900)},

224 {_DATAF(0.99769711494445801000), _DATAF(-0.06782653927803039600)},

225 {_DATAF(0.99767106771469116000), _DATAF(-0.06820914149284362800)},

226 {_DATAF(0.99764484167098999000), _DATAF(-0.06859174370765686000)},

227 {_DATAF(0.99761843681335449000), _DATAF(-0.06897433102130889900)},

228 {_DATAF(0.99759191274642944000), _DATAF(-0.06935690343379974400)},

229 {_DATAF(0.99756520986557007000), _DATAF(-0.06973946839570999100)},

230 {_DATAF(0.99753844738006592000), _DATAF(-0.07012202590703964200)},

231 {_DATAF(0.99751144647598267000), _DATAF(-0.07050457596778869600)},

232 {_DATAF(0.99748432636260986000), _DATAF(-0.07088711112737655600)},

233 {_DATAF(0.99745708703994751000), _DATAF(-0.07126963138580322300)},

234 {_DATAF(0.99742966890335083000), _DATAF(-0.07165215164422988900)},

235 {_DATAF(0.99740213155746460000), _DATAF(-0.07203464955091476400)},

236 {_DATAF(0.99737441539764404000), _DATAF(-0.07241714745759964000)},

237 {_DATAF(0.99734658002853394000), _DATAF(-0.07279963046312332200)},

238 {_DATAF(0.99731856584548950000), _DATAF(-0.07318209856748580900)},

239 {_DATAF(0.99729043245315552000), _DATAF(-0.07356456667184829700)},

240 {_DATAF(0.99726217985153198000), _DATAF(-0.07394701242446899400)},

241 {_DATAF(0.99723374843597412000), _DATAF(-0.07432945072650909400)},

242 {_DATAF(0.99720513820648193000), _DATAF(-0.07471188157796859700)},

243 {_DATAF(0.99717640876770020000), _DATAF(-0.07509429752826690700)},

244 {_DATAF(0.99714756011962891000), _DATAF(-0.07547670602798461900)},

245 {_DATAF(0.99711853265762329000), _DATAF(-0.07585910707712173500)},

246 {_DATAF(0.99708938598632813000), _DATAF(-0.07624148577451705900)},

247 {_DATAF(0.99706006050109863000), _DATAF(-0.07662386447191238400)},

248 {_DATAF(0.99703061580657959000), _DATAF(-0.07700622081756591800)},

249 {_DATAF(0.99700099229812622000), _DATAF(-0.07738857716321945200)},

250 {_DATAF(0.99697124958038330000), _DATAF(-0.07777091115713119500)},

251 {_DATAF(0.99694132804870605000), _DATAF(-0.07815324515104293800)},

252 {_DATAF(0.99691128730773926000), _DATAF(-0.07853555679321289100)},

253 {_DATAF(0.99688112735748291000), _DATAF(-0.07891786098480224600)},

254 {_DATAF(0.99685078859329224000), _DATAF(-0.07930015772581100500)},

255 {_DATAF(0.99682027101516724000), _DATAF(-0.07968243956565856900)},

256 {_DATAF(0.99678969383239746000), _DATAF(-0.08006470650434494000)},

257 {_DATAF(0.99675887823104858000), _DATAF(-0.08044696599245071400)},

258 {_DATAF(0.99672794342041016000), _DATAF(-0.08082921057939529400)},

259 {_DATAF(0.99669688940048218000), _DATAF(-0.08121144771575927700)},

260 {_DATAF(0.99666565656661987000), _DATAF(-0.08159366995096206700)},

261 {_DATAF(0.99663430452346802000), _DATAF(-0.08197587728500366200)},

262 {_DATAF(0.99660277366638184000), _DATAF(-0.08235807716846466100)},

263 {_DATAF(0.99657112360000610000), _DATAF(-0.08274026215076446500)},

264 {_DATAF(0.99653935432434082000), _DATAF(-0.08312243968248367300)},

265 {_DATAF(0.99650740623474121000), _DATAF(-0.08350460231304168700)},

266 {_DATAF(0.99647527933120728000), _DATAF(-0.08388675004243850700)},

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8043 {_DATAF(-0.99717640876770020000), _DATAF(-0.07509429752826690700)},

8044 {_DATAF(-0.99720513820648193000), _DATAF(-0.07471188157796859700)},

8045 {_DATAF(-0.99723374843597412000), _DATAF(-0.07432945072650909400)},

8046 {_DATAF(-0.99726217985153198000), _DATAF(-0.07394701242446899400)},

8047 {_DATAF(-0.99729043245315552000), _DATAF(-0.07356456667184829700)},

8048 {_DATAF(-0.99731856584548950000), _DATAF(-0.07318209856748580900)},

8049 {_DATAF(-0.99734658002853394000), _DATAF(-0.07279963046312332200)},

8050 {_DATAF(-0.99737441539764404000), _DATAF(-0.07241714745759964000)},

8051 {_DATAF(-0.99740213155746460000), _DATAF(-0.07203464955091476400)},

8052 {_DATAF(-0.99742966890335083000), _DATAF(-0.07165215164422988900)},

8053 {_DATAF(-0.99745708703994751000), _DATAF(-0.07126963138580322300)},

8054 {_DATAF(-0.99748432636260986000), _DATAF(-0.07088711112737655600)},

8055 {_DATAF(-0.99751144647598267000), _DATAF(-0.07050457596778869600)},

8056 {_DATAF(-0.99753844738006592000), _DATAF(-0.07012202590703964200)},

8057 {_DATAF(-0.99756520986557007000), _DATAF(-0.06973946839570999100)},

8058 {_DATAF(-0.99759191274642944000), _DATAF(-0.06935690343379974400)},

8059 {_DATAF(-0.99761843681335449000), _DATAF(-0.06897433102130889900)},

8060 {_DATAF(-0.99764484167098999000), _DATAF(-0.06859174370765686000)},

8061 {_DATAF(-0.99767106771469116000), _DATAF(-0.06820914149284362800)},

8062 {_DATAF(-0.99769711494445801000), _DATAF(-0.06782653927803039600)},

8063 {_DATAF(-0.99772304296493530000), _DATAF(-0.06744392216205596900)},

8064 {_DATAF(-0.99774885177612305000), _DATAF(-0.06706129014492034900)},

8065 {_DATAF(-0.99777448177337646000), _DATAF(-0.06667865812778472900)},

8066 {_DATAF(-0.99779999256134033000), _DATAF(-0.06629601120948791500)},

8067 {_DATAF(-0.99782532453536987000), _DATAF(-0.06591334939002990700)},

8068 {_DATAF(-0.99785053730010986000), _DATAF(-0.06553068757057189900)},

8069 {_DATAF(-0.99787563085556030000), _DATAF(-0.06514801084995269800)},

8070 {_DATAF(-0.99790054559707642000), _DATAF(-0.06476532667875289900)},

8071 {_DATAF(-0.99792528152465820000), _DATAF(-0.06438262760639190700)},

8072 {_DATAF(-0.99794989824295044000), _DATAF(-0.06399992853403091400)},

8073 {_DATAF(-0.99797439575195313000), _DATAF(-0.06361721456050872800)},

8074 {_DATAF(-0.99799871444702148000), _DATAF(-0.06323449313640594500)},

8075 {_DATAF(-0.99802285432815552000), _DATAF(-0.06285175681114196800)},

8076 {_DATAF(-0.99804687500000000000), _DATAF(-0.06246901676058769200)},

8077 {_DATAF(-0.99807077646255493000), _DATAF(-0.06208626553416252100)},

8078 {_DATAF(-0.99809449911117554000), _DATAF(-0.06170350685715675400)},

8079 {_DATAF(-0.99811810255050659000), _DATAF(-0.06132073700428009000)},

8080 {_DATAF(-0.99814152717590332000), _DATAF(-0.06093795970082283000)},

8081 {_DATAF(-0.99816483259201050000), _DATAF(-0.06055517122149467500)},

8082 {_DATAF(-0.99818801879882813000), _DATAF(-0.06017237529158592200)},

8083 {_DATAF(-0.99821102619171143000), _DATAF(-0.05978957191109657300)},

8084 {_DATAF(-0.99823385477066040000), _DATAF(-0.05940675735473632800)},

8085 {_DATAF(-0.99825656414031982000), _DATAF(-0.05902393534779548600)},

8086 {_DATAF(-0.99827915430068970000), _DATAF(-0.05864110589027404800)},

8087 {_DATAF(-0.99830156564712524000), _DATAF(-0.05825826525688171400)},

8088 {_DATAF(-0.99832379817962646000), _DATAF(-0.05787541717290878300)},

8089 {_DATAF(-0.99834591150283813000), _DATAF(-0.05749255791306495700)},

8090 {_DATAF(-0.99836790561676025000), _DATAF(-0.05710969492793083200)},

8091 {_DATAF(-0.99838972091674805000), _DATAF(-0.05672682076692581200)},

8092 {_DATAF(-0.99841141700744629000), _DATAF(-0.05634393915534019500)},

8093 {_DATAF(-0.99843293428421021000), _DATAF(-0.05596105009317398100)},

8094 {_DATAF(-0.99845433235168457000), _DATAF(-0.05557814985513687100)},

8095 {_DATAF(-0.99847555160522461000), _DATAF(-0.05519524589180946400)},

8096 {_DATAF(-0.99849665164947510000), _DATAF(-0.05481233075261116000)},

8097 {_DATAF(-0.99851763248443604000), _DATAF(-0.05442940816283226000)},

8098 {_DATAF(-0.99853843450546265000), _DATAF(-0.05404647812247276300)},

8099 {_DATAF(-0.99855905771255493000), _DATAF(-0.05366353690624237100)},

8100 {_DATAF(-0.99857956171035767000), _DATAF(-0.05328059196472168000)},

8101 {_DATAF(-0.99859994649887085000), _DATAF(-0.05289763584733009300)},

8102 {_DATAF(-0.99862015247344971000), _DATAF(-0.05251467600464820900)},

8103 {_DATAF(-0.99864023923873901000), _DATAF(-0.05213170498609542800)},

8104 {_DATAF(-0.99866014719009399000), _DATAF(-0.05174872651696205100)},

8105 {_DATAF(-0.99867993593215942000), _DATAF(-0.05136574059724807700)},

8106 {_DATAF(-0.99869954586029053000), _DATAF(-0.05098275095224380500)},

8107 {_DATAF(-0.99871903657913208000), _DATAF(-0.05059975013136863700)},

8108 {_DATAF(-0.99873834848403931000), _DATAF(-0.05021674185991287200)},

8109 {_DATAF(-0.99875754117965698000), _DATAF(-0.04983372613787651100)},

8110 {_DATAF(-0.99877655506134033000), _DATAF(-0.04945070296525955200)},

8111 {_DATAF(-0.99879544973373413000), _DATAF(-0.04906767606735229500)},

8112 {_DATAF(-0.99881422519683838000), _DATAF(-0.04868463799357414200)},

8113 {_DATAF(-0.99883282184600830000), _DATAF(-0.04830159246921539300)},

8114 {_DATAF(-0.99885123968124390000), _DATAF(-0.04791854321956634500)},

8115 {_DATAF(-0.99886953830718994000), _DATAF(-0.04753548279404640200)},

8116 {_DATAF(-0.99888771772384644000), _DATAF(-0.04715241864323616000)},

8117 {_DATAF(-0.99890571832656860000), _DATAF(-0.04676934704184532200)},

8118 {_DATAF(-0.99892359972000122000), _DATAF(-0.04638626798987388600)},

8119 {_DATAF(-0.99894130229949951000), _DATAF(-0.04600318148732185400)},

8120 {_DATAF(-0.99895888566970825000), _DATAF(-0.04562009125947952300)},

8121 {_DATAF(-0.99897629022598267000), _DATAF(-0.04523698985576629600)},

8122 {_DATAF(-0.99899357557296753000), _DATAF(-0.04485388472676277200)},

8123 {_DATAF(-0.99901068210601807000), _DATAF(-0.04447077214717865000)},

8124 {_DATAF(-0.99902766942977905000), _DATAF(-0.04408765211701393100)},

8125 {_DATAF(-0.99904447793960571000), _DATAF(-0.04370452836155891400)},

8126 {_DATAF(-0.99906116724014282000), _DATAF(-0.04332139343023300200)},

8127 {_DATAF(-0.99907773733139038000), _DATAF(-0.04293825849890708900)},

8128 {_DATAF(-0.99909412860870361000), _DATAF(-0.04255511239171028100)},

8129 {_DATAF(-0.99911034107208252000), _DATAF(-0.04217196255922317500)},

8130 {_DATAF(-0.99912649393081665000), _DATAF(-0.04178880527615547200)},

8131 {_DATAF(-0.99914240837097168000), _DATAF(-0.04140564054250717200)},

8132 {_DATAF(-0.99915820360183716000), _DATAF(-0.04102247208356857300)},

8133 {_DATAF(-0.99917387962341309000), _DATAF(-0.04063929617404937700)},

8134 {_DATAF(-0.99918937683105469000), _DATAF(-0.04025611653923988300)},

8135 {_DATAF(-0.99920475482940674000), _DATAF(-0.03987292572855949400)},

8136 {_DATAF(-0.99921995401382446000), _DATAF(-0.03948973491787910500)},

8137 {_DATAF(-0.99923503398895264000), _DATAF(-0.03910653665661811800)},

8138 {_DATAF(-0.99924999475479126000), _DATAF(-0.03872333094477653500)},

8139 {_DATAF(-0.99926477670669556000), _DATAF(-0.03834012150764465300)},

8140 {_DATAF(-0.99927937984466553000), _DATAF(-0.03795690461993217500)},

8141 {_DATAF(-0.99929386377334595000), _DATAF(-0.03757368400692939800)},

8142 {_DATAF(-0.99930816888809204000), _DATAF(-0.03719045594334602400)},

8143 {_DATAF(-0.99932235479354858000), _DATAF(-0.03680722415447235100)},

8144 {_DATAF(-0.99933642148971558000), _DATAF(-0.03642398491501808200)},

8145 {_DATAF(-0.99935030937194824000), _DATAF(-0.03604074195027351400)},

8146 {_DATAF(-0.99936407804489136000), _DATAF(-0.03565749153494834900)},

8147 {_DATAF(-0.99937766790390015000), _DATAF(-0.03527423739433288600)},

8148 {_DATAF(-0.99939113855361938000), _DATAF(-0.03489097952842712400)},

8149 {_DATAF(-0.99940443038940430000), _DATAF(-0.03450771421194076500)},

8150 {_DATAF(-0.99941760301589966000), _DATAF(-0.03412444517016410800)},

8151 {_DATAF(-0.99943059682846069000), _DATAF(-0.03374117240309715300)},

8152 {_DATAF(-0.99944347143173218000), _DATAF(-0.03335789218544960000)},

8153 {_DATAF(-0.99945616722106934000), _DATAF(-0.03297460824251174900)},

8154 {_DATAF(-0.99946874380111694000), _DATAF(-0.03259132057428360000)},

8155 {_DATAF(-0.99948120117187500000), _DATAF(-0.03220802545547485400)},

8156 {_DATAF(-0.99949347972869873000), _DATAF(-0.03182472661137580900)},

8157 {_DATAF(-0.99950557947158813000), _DATAF(-0.03144142404198646500)},

8158 {_DATAF(-0.99951756000518799000), _DATAF(-0.03105811588466167400)},

8159 {_DATAF(-0.99952942132949829000), _DATAF(-0.03067480400204658500)},

8160 {_DATAF(-0.99954110383987427000), _DATAF(-0.03029148653149604800)},

8161 {_DATAF(-0.99955266714096069000), _DATAF(-0.02990816533565521200)},

8162 {_DATAF(-0.99956405162811279000), _DATAF(-0.02952483855187892900)},

8163 {_DATAF(-0.99957531690597534000), _DATAF(-0.02914150804281234700)},

8164 {_DATAF(-0.99958640336990356000), _DATAF(-0.02875817380845546700)},

8165 {_DATAF(-0.99959737062454224000), _DATAF(-0.02837483584880828900)},

8166 {_DATAF(-0.99960815906524658000), _DATAF(-0.02799149230122566200)},

8167 {_DATAF(-0.99961882829666138000), _DATAF(-0.02760814502835273700)},

8168 {_DATAF(-0.99962931871414185000), _DATAF(-0.02722479403018951400)},

8169 {_DATAF(-0.99963968992233276000), _DATAF(-0.02684143930673599200)},

8170 {_DATAF(-0.99964994192123413000), _DATAF(-0.02645808085799217200)},

8171 {_DATAF(-0.99966001510620117000), _DATAF(-0.02607471868395805400)},

8172 {_DATAF(-0.99966990947723389000), _DATAF(-0.02569135092198848700)},

8173 {_DATAF(-0.99967968463897705000), _DATAF(-0.02530798129737377200)},

8174 {_DATAF(-0.99968934059143066000), _DATAF(-0.02492460608482360800)},

8175 {_DATAF(-0.99969881772994995000), _DATAF(-0.02454122900962829600)},

8176 {_DATAF(-0.99970817565917969000), _DATAF(-0.02415784634649753600)},

8177 {_DATAF(-0.99971735477447510000), _DATAF(-0.02377446182072162600)},

8178 {_DATAF(-0.99972641468048096000), _DATAF(-0.02339107356965541800)},

8179 {_DATAF(-0.99973529577255249000), _DATAF(-0.02300768159329891200)},

8180 {_DATAF(-0.99974405765533447000), _DATAF(-0.02262428589165210700)},

8181 {_DATAF(-0.99975264072418213000), _DATAF(-0.02224088832736015300)},

8182 {_DATAF(-0.99976110458374023000), _DATAF(-0.02185748517513275100)},

8183 {_DATAF(-0.99976938962936401000), _DATAF(-0.02147408016026020100)},

8184 {_DATAF(-0.99977755546569824000), _DATAF(-0.02109067142009735100)},

8185 {_DATAF(-0.99978560209274292000), _DATAF(-0.02070726081728935200)},

8186 {_DATAF(-0.99979346990585327000), _DATAF(-0.02032384648919105500)},

8187 {_DATAF(-0.99980115890502930000), _DATAF(-0.01994042843580246000)},

8188 {_DATAF(-0.99980872869491577000), _DATAF(-0.01955700851976871500)},

8189 {_DATAF(-0.99981617927551270000), _DATAF(-0.01917358487844467200)},

8190 {_DATAF(-0.99982345104217529000), _DATAF(-0.01879015937447547900)},

8191 {_DATAF(-0.99983060359954834000), _DATAF(-0.01840673014521598800)},

8192 {_DATAF(-0.99983757734298706000), _DATAF(-0.01802329905331134800)},

8193 {_DATAF(-0.99984443187713623000), _DATAF(-0.01763986423611640900)},

8194 {_DATAF(-0.99985110759735107000), _DATAF(-0.01725642755627632100)},

8195 {_DATAF(-0.99985766410827637000), _DATAF(-0.01687298715114593500)},

8196 {_DATAF(-0.99986404180526733000), _DATAF(-0.01648954674601554900)},

8197 {_DATAF(-0.99987030029296875000), _DATAF(-0.01610610261559486400)},

8198 {_DATAF(-0.99987637996673584000), _DATAF(-0.01572265475988388100)},

8199 {_DATAF(-0.99988234043121338000), _DATAF(-0.01533920597285032300)},

8200 {_DATAF(-0.99988818168640137000), _DATAF(-0.01495575532317161600)},

8201 {_DATAF(-0.99989384412765503000), _DATAF(-0.01457230187952518500)},

8202 {_DATAF(-0.99989932775497437000), _DATAF(-0.01418884657323360400)},

8203 {_DATAF(-0.99990469217300415000), _DATAF(-0.01380538847297430000)},

8204 {_DATAF(-0.99990993738174438000), _DATAF(-0.01342192851006984700)},

8205 {_DATAF(-0.99991500377655029000), _DATAF(-0.01303846761584281900)},

8206 {_DATAF(-0.99991995096206665000), _DATAF(-0.01265500392764806700)},

8207 {_DATAF(-0.99992471933364868000), _DATAF(-0.01227153837680816700)},

8208 {_DATAF(-0.99992930889129639000), _DATAF(-0.01188807096332311600)},

8209 {_DATAF(-0.99993383884429932000), _DATAF(-0.01150460168719291700)},

8210 {_DATAF(-0.99993813037872314000), _DATAF(-0.01112113147974014300)},

8211 {_DATAF(-0.99994236230850220000), _DATAF(-0.01073765940964222000)},

8212 {_DATAF(-0.99994641542434692000), _DATAF(-0.01035418547689914700)},

8213 {_DATAF(-0.99995028972625732000), _DATAF(-0.00997070968151092530)},

8214 {_DATAF(-0.99995404481887817000), _DATAF(-0.00958723295480012890)},

8215 {_DATAF(-0.99995762109756470000), _DATAF(-0.00920375436544418330)},

8216 {_DATAF(-0.99996107816696167000), _DATAF(-0.00882027484476566310)},

8217 {_DATAF(-0.99996441602706909000), _DATAF(-0.00843679439276456830)},

8218 {_DATAF(-0.99996757507324219000), _DATAF(-0.00805331207811832430)},

8219 {_DATAF(-0.99997061491012573000), _DATAF(-0.00766982883214950560)},

8220 {_DATAF(-0.99997347593307495000), _DATAF(-0.00728634418919682500)},

8221 {_DATAF(-0.99997615814208984000), _DATAF(-0.00690285861492156980)},

8222 {_DATAF(-0.99997872114181519000), _DATAF(-0.00651937210932374000)},

8223 {_DATAF(-0.99998116493225098000), _DATAF(-0.00613588467240333560)},

8224 {_DATAF(-0.99998342990875244000), _DATAF(-0.00575239630416035650)},

8225 {_DATAF(-0.99998557567596436000), _DATAF(-0.00536890700459480290)},

8226 {_DATAF(-0.99998760223388672000), _DATAF(-0.00498541677370667460)},

8227 {_DATAF(-0.99998939037322998000), _DATAF(-0.00460192607715725900)},

8228 {_DATAF(-0.99999111890792847000), _DATAF(-0.00421843444928526880)},

8229 {_DATAF(-0.99999266862869263000), _DATAF(-0.00383494258858263490)},

8230 {_DATAF(-0.99999403953552246000), _DATAF(-0.00345145002938807010)},

8231 {_DATAF(-0.99999529123306274000), _DATAF(-0.00306795677170157430)},

8232 {_DATAF(-0.99999642372131348000), _DATAF(-0.00268446304835379120)},

8233 {_DATAF(-0.99999737739562988000), _DATAF(-0.00230096909217536450)},

8234 {_DATAF(-0.99999815225601196000), _DATAF(-0.00191747478675097230)},

8235 {_DATAF(-0.99999880790710449000), _DATAF(-0.00153398013208061460)},

8236 {_DATAF(-0.99999934434890747000), _DATAF(-0.00115048536099493500)},

8237 {_DATAF(-0.99999970197677612000), _DATAF(-0.00076699029887095094)},

8238 {_DATAF(-0.99999994039535522000), _DATAF(-0.00038349517853930593)},

8239 };

8240 /*lint +e915*/

Ifx_g_FftF32_twiddleTable

IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH/2]

Definition: Ifx_FftF32_TwiddleTable.c:46

IFX_CONST

#define IFX_CONST

Definition: Compilers.h:54

cfloat32

Definition: Ifx_Types.h:58

IFX_FFTF32_MAX_LENGTH

#define IFX_FFTF32_MAX_LENGTH

Maximum FFT length. If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable sha...

Definition: Ifx_FftF32.h:60

Ifx_FftF32.h

Floating-point Fast Fourier Transform.

_DATAF

#define _DATAF(val)

Definition: Ifx_Cf32.h:51


iLLD_TC26B: Ifx_Fifo.c Source File

  • _Lib
  • DataHandling
Ifx_Fifo.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Fifo.c
3 * \brief FIFO functions
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 //------------------------------------------------------------------------------
43 #include "Ifx_Fifo.h"
44 #include <stdlib.h>
45 #include "Ifx_CircularBuffer.h"
46 #include "_Utilities/Ifx_Assert.h"
47 #include "Cpu/Std/IfxCpu.h"
48 #include "Stm/Std/IfxStm.h"
49 //------------------------------------------------------------------------------
50 /*
51 * Note: the fifo function can be used to exchange data between the main task and interrupts:
52 * - a mutex using the interrupt enable / disable is implemented to insure
53 * data consitancy
54 * - it is supposed that all access to 8, 16, 32 bit data are atomic and are
55 * therefore not protected by a critical section
56 * - the following is possible
57 * reader(main) -- writer(main)
58 * reader(main) -- writer(interrupt)
59 * reader(interrupt) -- writer(main)
60 * reader(interrupt) -- writer(interrupt)
61 * - Only one reader and one writer are allowed by FIFO, no nested read write
62 * Implementation note: as an interrupt runs at a higher cpu level than the thread
63 * the interrupt is not disabled in the IntfifoXXX() functions
64 * This is valid is an OS is used.
65 *
66 */
67 //------------------------------------------------------------------------------
68 Ifx_Fifo *Ifx_Fifo_create(Ifx_SizeT size, Ifx_SizeT elementSize)
69 {
70 Ifx_Fifo *fifo = NULL_PTR;
71
72 size = Ifx_AlignOn32(size); /* data transfer is optimised for 32 bit access */
73
74 fifo = malloc(size + sizeof(Ifx_Fifo) + 8); /* +8 because of padding in case the pointer is not aligned on 64 */
75
76 if (IFX_VALIDATE(IFX_VERBOSE_LEVEL_ERROR, (fifo != NULL_PTR)))
77 {
78 fifo = Ifx_Fifo_init(fifo, size, elementSize);
79 }
80
81 return fifo;
82 }
83
84
85 void Ifx_Fifo_destroy(Ifx_Fifo *fifo)
86 {
87 free(fifo);
88 }
89
90
91 Ifx_Fifo *Ifx_Fifo_init(void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
92 {
93 Ifx_Fifo *fifo = NULL_PTR;
94
95 size = Ifx_AlignOn32(size); /* data transfer is optimised for 32 bit access */
96 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, elementSize <= size);
97 /* Check size over maximum FIFO size */
98 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (size <= IFX_SIZET_MAX));
99
100 {
101 fifo = (Ifx_Fifo *)buffer;
102 fifo->eventReader = FALSE;
103 fifo->eventWriter = TRUE;
104 fifo->buffer = (uint8 *)Ifx_AlignOn64(((uint32)fifo) + sizeof(Ifx_Fifo));
105 fifo->shared.count = 0;
106 fifo->shared.maxcount = 0;
107 fifo->shared.readerWaitx = fifo->shared.writerWaitx = 0;
108 fifo->startIndex = fifo->endIndex = 0;
109 fifo->size = size;
110 fifo->elementSize = elementSize;
111 }
112
113 return fifo;
114 }
115
116
117 /**
118 * param: count in bytes
119 */
120 static Ifx_SizeT Ifx_Fifo_beginRead(Ifx_Fifo *fifo, Ifx_SizeT count)
121 {
122 boolean interruptState;
123 Ifx_SizeT blockSize;
124
125 interruptState = IfxCpu_disableInterrupts();
126 blockSize = __min(count, Ifx_Fifo_readCount(fifo));
127 blockSize -= blockSize % fifo->elementSize;
128 fifo->eventReader = FALSE;
129 fifo->shared.readerWaitx = __min(count - blockSize, fifo->size);
130 IfxCpu_restoreInterrupts(interruptState);
131
132 return blockSize;
133 }
134
135
136 boolean Ifx_Fifo_canReadCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
137 {
138 boolean result;
139
140 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, fifo != NULL_PTR);
141
142 if ((count < fifo->elementSize) || (count > fifo->size))
143 { /* Only complete elements can be read from the buffer */
144 result = FALSE;
145 }
146 else
147 {
148 boolean interruptState;
149 sint32 waitCount;
150 interruptState = IfxCpu_disableInterrupts();
151 waitCount = count - Ifx_Fifo_readCount(fifo);
152
153 if (waitCount <= 0)
154 {
155 fifo->shared.readerWaitx = 0;
156 fifo->eventReader = TRUE;
157 IfxCpu_restoreInterrupts(interruptState);
158 result = TRUE;
159 }
160 else
161 {
162 Ifx_TickTime DeadLine = IfxStm_getDeadLine(timeout);
163 fifo->eventReader = FALSE;
164 fifo->shared.readerWaitx = waitCount;
165 IfxCpu_restoreInterrupts(interruptState);
166
167 while ((fifo->eventReader == FALSE) && (IfxStm_isDeadLine(DeadLine) == FALSE))
168 {}
169 /* After the timeout, the reader is not waiting for any data */
170 fifo->shared.readerWaitx = 0;
171 result = fifo->eventReader == TRUE;
172 }
173 }
174
175 return result;
176 }
177
178
179 /**
180 * param: count in bytes
181 */
182 static Ifx_SizeT Ifx_Fifo_readEnd(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_SizeT blockSize)
183 {
184 boolean interruptState;
185
186 /* Set the shared values */
187 interruptState = IfxCpu_disableInterrupts();
188
189 fifo->shared.count -= blockSize;
190
191 if (fifo->shared.writerWaitx != 0)
192 {
193 fifo->shared.writerWaitx -= blockSize;
194
195 if (fifo->shared.writerWaitx <= 0)
196 {
197 fifo->shared.writerWaitx = 0;
198 fifo->eventWriter = TRUE; /* Signal the writer */
199 }
200 }
201
202 IfxCpu_restoreInterrupts(interruptState);
203
204 return count - blockSize;
205 }
206
207
208 Ifx_SizeT Ifx_Fifo_read(Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
209 {
210 Ifx_TickTime DeadLine;
211 Ifx_SizeT blockSize;
212 Ifx_CircularBuffer buffer;
213 boolean Stop = FALSE;
214
215 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, fifo != NULL_PTR);
216 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, data != NULL_PTR);
217
218 if (count != 0)
219 {
220 buffer.base = fifo->buffer;
221 buffer.length = (uint16)fifo->size; /* size always fit into 16 bit */
222 buffer.index = (uint16)fifo->startIndex; /* startIndex always fit into size */
223 DeadLine = IfxStm_getDeadLine(timeout);
224
225 do
226 {
227 blockSize = Ifx_Fifo_beginRead(fifo, count);
228
229 if (blockSize != 0)
230 {
231 /* read element from the buffer */
232 data = Ifx_CircularBuffer_read8(&buffer, data, blockSize);
233 count = Ifx_Fifo_readEnd(fifo, count, blockSize);
234 }
235
236 if ((Stop != FALSE) || (IfxStm_isDeadLine(DeadLine) != FALSE))
237 {
238 /*When exiting, the reader is not waiting for any data */
239 fifo->shared.readerWaitx = 0;
240 break;
241 }
242
243 if (count != 0)
244 {
245 while ((fifo->eventReader == FALSE) && (IfxStm_isDeadLine(DeadLine) == FALSE))
246 {}
247
248 Stop = (fifo->eventReader == FALSE); /* If the function timeout, the maximum number of characters are read before returning */
249 }
250 } while (count != 0);
251
252 fifo->startIndex = buffer.index;
253 }
254
255 return count;
256 }
257
258
259 void Ifx_Fifo_clear(Ifx_Fifo *fifo)
260 {
261 boolean interruptState;
262
263 interruptState = IfxCpu_disableInterrupts();
264
265 if (fifo->shared.writerWaitx != 0)
266 {
267 fifo->shared.writerWaitx = 0;
268 fifo->eventWriter = TRUE; /* Signal the writer */
269 }
270
271 fifo->eventReader = FALSE;
272 fifo->shared.readerWaitx = 0;
273 fifo->shared.count = 0;
274 fifo->shared.maxcount = 0;
275 fifo->startIndex = fifo->endIndex;
276 IfxCpu_restoreInterrupts(interruptState);
277 }
278
279
280 static Ifx_SizeT Ifx_Fifo_beginWrite(Ifx_Fifo *fifo, Ifx_SizeT count)
281 {
282 Ifx_SizeT blockSize;
283 boolean interruptState;
284
285 interruptState = IfxCpu_disableInterrupts();
286 blockSize = __min(count, fifo->size - Ifx_Fifo_readCount(fifo));
287 blockSize -= blockSize % fifo->elementSize;
288 fifo->eventWriter = FALSE;
289 fifo->shared.writerWaitx = __min(count - blockSize, fifo->size);
290 IfxCpu_restoreInterrupts(interruptState);
291
292 return blockSize;
293 }
294
295
296 boolean Ifx_Fifo_canWriteCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
297 {
298 boolean result;
299
300 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, fifo != NULL_PTR);
301
302
303 if ((count < fifo->elementSize) || (count > fifo->size))
304 { /* Only complete elements can be written to the buffer */
305 result = FALSE;
306 }
307
308 else
309 {
310 boolean interruptState;
311 interruptState = IfxCpu_disableInterrupts();
312
313 if ((fifo->size - Ifx_Fifo_readCount(fifo)) >= count)
314 {
315 fifo->shared.writerWaitx = 0;
316 fifo->eventWriter = TRUE;
317 IfxCpu_restoreInterrupts(interruptState);
318 result = TRUE;
319 }
320 else
321 {
322 Ifx_TickTime DeadLine = IfxStm_getDeadLine(timeout);
323 fifo->eventWriter = FALSE;
324 fifo->shared.writerWaitx = __max(0, count - (fifo->size - Ifx_Fifo_readCount(fifo)));
325 IfxCpu_restoreInterrupts(interruptState);
326
327 while ((fifo->eventWriter == FALSE) && (IfxStm_isDeadLine(DeadLine) == FALSE))
328 {}
329 /* After the timeout, the writer is not waiting for any space */
330 fifo->shared.writerWaitx = 0;
331 result = fifo->eventWriter == TRUE;
332 }
333 }
334
335 return result;
336 }
337
338 static Ifx_SizeT Ifx_Fifo_endWrite(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_SizeT blockSize)
339 {
340 boolean interruptState;
341
342 /* Set the shared values */
343 interruptState = IfxCpu_disableInterrupts();
344
345 fifo->shared.count += blockSize;
346 fifo->shared.maxcount = __max(fifo->shared.maxcount, fifo->shared.count); /* Update maximum value */
347
348 if (fifo->shared.readerWaitx != 0)
349 {
350 fifo->shared.readerWaitx -= blockSize;
351
352 if (fifo->shared.readerWaitx <= 0)
353 {
354 fifo->shared.readerWaitx = 0;
355 fifo->eventReader = TRUE; /* Signal the reader - a re-scheduling may occur at this point! */
356 }
357 }
358
359 IfxCpu_restoreInterrupts(interruptState);
360
361 return count - blockSize;
362 }
363
364
365
366 Ifx_SizeT Ifx_Fifo_write(Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
367 {
368 Ifx_TickTime DeadLine;
369 Ifx_SizeT blockSize;
370 Ifx_CircularBuffer buffer;
371 boolean Stop = FALSE;
372
373 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, fifo != NULL_PTR);
374 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, data != NULL_PTR);
375
376 if (count != 0)
377 {
378 buffer.base = fifo->buffer;
379 buffer.length = (uint16)fifo->size; /* size always fit into 16 bit */
380 buffer.index = (uint16)fifo->endIndex; /* startIndex always fit into size */
381 DeadLine = IfxStm_getDeadLine(timeout);
382
383 do
384 {
385 blockSize = Ifx_Fifo_beginWrite(fifo, count);
386
387 if (blockSize != 0)
388 {
389 /* write element to the buffer */
390 data = Ifx_CircularBuffer_write8(&buffer, data, blockSize);
391 count = Ifx_Fifo_endWrite(fifo, count, blockSize);
392 }
393
394 if ((Stop != FALSE) || (IfxStm_isDeadLine(DeadLine) != FALSE))
395 {
396 /*When exiting, the writer is not waiting for any space */
397 fifo->shared.writerWaitx = 0;
398 break;
399 }
400
401 if (count != 0)
402 {
403 while ((fifo->eventWriter == FALSE) && (IfxStm_isDeadLine(DeadLine) == FALSE))
404 {}
405
406 Stop = fifo->eventWriter == FALSE; /* If the function timeout, the maximum number of characters are written before returning */
407 }
408 } while (count != 0);
409
410 fifo->endIndex = buffer.index;
411 }
412
413 return count;
414 }
415
416 //------------------------------------------------------------------------------
Ifx_CircularBuffer_write8
const void * Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:139
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
_Fifo::buffer
void * buffer
aligned on 64 bit boundary
Definition: Ifx_Fifo.h:72
_Fifo::startIndex
Ifx_SizeT startIndex
buffer valid data start index
Definition: Ifx_Fifo.h:74
Ifx_Fifo_write
Ifx_SizeT Ifx_Fifo_write(Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo.
Definition: Ifx_Fifo.c:366
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxStm.h
STM basic functionality.
Ifx_Fifo_canReadCount
boolean Ifx_Fifo_canReadCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer.
Definition: Ifx_Fifo.c:136
Ifx_CircularBuffer::length
uint16 length
buffer length
Definition: Ifx_Types.h:97
_Fifo::eventReader
volatile boolean eventReader
event set by the writer to signal the reader that the required data are available in the buffer ...
Definition: Ifx_Fifo.h:78
IFX_SIZET_MAX
#define IFX_SIZET_MAX
Definition: Ifx_Types.h:88
IfxStm_getDeadLine
IFX_INLINE sint64 IfxStm_getDeadLine(sint64 timeout)
Get the deadline value.
Definition: IfxStm.h:746
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_AlignOn64
#define Ifx_AlignOn64(Size)
Definition: IfxCpu_Intrinsics.h:74
Ifx_Assert.h
Assert functions.
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
Ifx_Fifo_Shared::writerWaitx
sint32 writerWaitx
Number of byte that the writer expect to be free. When the reader modify it to 0 the reader get signa...
Definition: Ifx_Fifo.h:61
Ifx_Fifo_init
Ifx_Fifo * Ifx_Fifo_init(void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object.
Definition: Ifx_Fifo.c:91
Ifx_Fifo_destroy
void Ifx_Fifo_destroy(Ifx_Fifo *fifo)
Destroy the FIFO object.
Definition: Ifx_Fifo.c:85
Ifx_CircularBuffer::base
void * base
buffer base address
Definition: Ifx_Types.h:95
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:933
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
Ifx_Fifo_Shared::maxcount
Ifx_SizeT maxcount
Highest value seen in the count.
Definition: Ifx_Fifo.h:62
_Fifo::endIndex
Ifx_SizeT endIndex
buffer valid data end index
Definition: Ifx_Fifo.h:75
FALSE
#define FALSE
Definition: Platform_Types.h:93
Ifx_Fifo_read
Ifx_SizeT Ifx_Fifo_read(Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer.
Definition: Ifx_Fifo.c:208
_Fifo::shared
Ifx_Fifo_Shared shared
data shared between reader / writer
Definition: Ifx_Fifo.h:73
Ifx_Fifo_canWriteCount
boolean Ifx_Fifo_canWriteCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: Ifx_Fifo.c:296
Ifx_Fifo.h
FIFO buffer functions.
__max
sint32 __max(sint32, sint32) __attribute__((intrinsic_pseudo(3
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:656
_Fifo::eventWriter
volatile boolean eventWriter
event set by the reader to signal the writer that the required free space are available in the buffer...
Definition: Ifx_Fifo.h:79
IfxStm_isDeadLine
IFX_INLINE boolean IfxStm_isDeadLine(sint64 deadLine)
Checked if deadline has occured.
Definition: IfxStm.h:763
Ifx_AlignOn32
#define Ifx_AlignOn32(Size)
Definition: IfxCpu_Intrinsics.h:75
Ifx_CircularBuffer
Circular buffer definition.
Definition: Ifx_Types.h:93
_Fifo::elementSize
Ifx_SizeT elementSize
minimum number of bytes (block) added / removed to / from the buffer
Definition: Ifx_Fifo.h:77
_Fifo
Definition: Ifx_Fifo.h:70
Ifx_CircularBuffer_read8
void * Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:95
Ifx_Fifo_create
Ifx_Fifo * Ifx_Fifo_create(Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object.
Definition: Ifx_Fifo.c:68
Ifx_Fifo_Shared::count
Ifx_SizeT count
number of bytes contained in the buffer
Definition: Ifx_Fifo.h:59
Ifx_Fifo_readCount
IFX_INLINE Ifx_SizeT Ifx_Fifo_readCount(Ifx_Fifo *fifo)
Returns the size of the data in the buffer in bytes.
Definition: Ifx_Fifo.h:203
Ifx_Fifo_clear
void Ifx_Fifo_clear(Ifx_Fifo *fifo)
Clear fifo contents.
Definition: Ifx_Fifo.c:259
IFX_VALIDATE
#define IFX_VALIDATE(level, expr)
Definition: Ifx_Assert.h:73
_Fifo::size
Ifx_SizeT size
multiple of 8 bit, max 0xFFF8
Definition: Ifx_Fifo.h:76
IfxCpu.h
CPU basic functionality.
Ifx_CircularBuffer.h
Circular buffer functions.
uint16
unsigned short uint16
Definition: Platform_Types.h:112
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_Fifo_Shared::readerWaitx
sint32 readerWaitx
Number of bytes that the reader is waiting for. When the writer modify it to 0 the reader get signale...
Definition: Ifx_Fifo.h:60
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
TRUE
#define TRUE
Definition: Platform_Types.h:90
Ifx_CircularBuffer::index
uint16 index
buffer current index
Definition: Ifx_Types.h:96
uint8
unsigned char uint8
Definition: Platform_Types.h:108


iLLD_TC26B: Ifx_Fifo.h Source File

  • _Lib
  • DataHandling
Ifx_Fifo.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Fifo.h
3 * \brief FIFO buffer functions
4 * \ingroup IfxLld_lib_datahandling_fifo
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_lib_datahandling_fifo FIFO
42 * This module implements the FIFO buffer functionality.
43 * \ingroup IfxLld_lib_datahandling
44 *
45 */
46
47 #ifndef IFX_FIFO_H
48 #define IFX_FIFO_H 1
49 //------------------------------------------------------------------------------
50 #include "Ifx_Cfg.h"
51 #include "Cpu/Std/IfxCpu_Intrinsics.h"
52 //------------------------------------------------------------------------------
53
54 /** Shared data of the FIFO
55 *
56 */
57 typedef struct
58 {
59 Ifx_SizeT count; /**< \brief number of bytes contained in the buffer */
60 sint32 readerWaitx; /**< \brief Number of bytes that the reader is waiting for. When the writer modify it to 0 the reader get signaled */
61 sint32 writerWaitx; /**< \brief Number of byte that the writer expect to be free. When the reader modify it to 0 the reader get signaled */
62 Ifx_SizeT maxcount; /**< \brief Highest value seen in the count */
63 } Ifx_Fifo_Shared;
64
65 /** \addtogroup IfxLld_lib_datahandling_fifo
66 * \{ */
67 /** Fifo object
68 *
69 */
70 typedef struct _Fifo
71 {
72 void *buffer; /**< \brief aligned on 64 bit boundary */
73 Ifx_Fifo_Shared shared; /**< \brief data shared between reader / writer */
74 Ifx_SizeT startIndex; /**< \brief buffer valid data start index */
75 Ifx_SizeT endIndex; /**< \brief buffer valid data end index */
76 Ifx_SizeT size; /**< \brief multiple of 8 bit, max 0xFFF8 */
77 Ifx_SizeT elementSize; /**< \brief minimum number of bytes (block) added / removed to / from the buffer */
78 volatile boolean eventReader; /**< \brief event set by the writer to signal the reader that the required data are available in the buffer */
79 volatile boolean eventWriter; /**< \brief event set by the reader to signal the writer that the required free space are available in the buffer */
80 } Ifx_Fifo;
81
82 /** \brief Indicates if the required number of bytes are available in the buffer
83 *
84 * Should not be called from an interrupt as this function may wait forever
85 * \param fifo Pointer on the Fifo object
86 * \param count in bytes
87 * \param timeout in system timer ticks
88 *
89 * \return TRUE if at least count bytes can be read from the buffer, else
90 * the Event is armed to be set when the buffer count is bigger or equal to the requested count
91 */
92 IFX_EXTERN boolean Ifx_Fifo_canReadCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout);
93 /** \brief Indicates if there is enough free space to write the data in the buffer
94 *
95 * Should not be called from an interrupt as this function may wait forever
96 *
97 * \param fifo Pointer on the Fifo object
98 * \param count in bytes
99 * \param timeout in system timer ticks
100 *
101 * \return TRUE if at least count bytes can be written to the buffer,
102 * if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count
103 */
104 IFX_EXTERN boolean Ifx_Fifo_canWriteCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout);
105
106 /** \brief Clear fifo contents.
107 *
108 * \param fifo Pointer on the Fifo object
109 *
110 * \return void
111 */
112 IFX_EXTERN void Ifx_Fifo_clear(Ifx_Fifo *fifo);
113
114 /** \brief Create a Fifo object
115 *
116 * The memory required for the object is allocated dynamically.
117 *
118 * \param size Specifies the FIFO buffer size in bytes
119 * \param elementSize Specifies data element size in bytes. size must be bigger or equal to elemenntSize.
120 *
121 * \return returns a pointer to the FIFO object
122 *
123 * \see Ifx_Fifo_destroy()
124 */
125 IFX_EXTERN Ifx_Fifo *Ifx_Fifo_create(Ifx_SizeT size, Ifx_SizeT elementSize);
126
127 /** \brief Destroy the FIFO object
128 *
129 * This function must be called to destroy the fifo object when created with \ref Ifx_Fifo_create()
130 *
131 * \param fifo Pointer on the Fifo object
132 * \return void
133 *
134 * \see Ifx_Fifo_create()
135 */
136 IFX_EXTERN void Ifx_Fifo_destroy(Ifx_Fifo *fifo);
137
138 /** \brief Initialize the FIFO buffer object
139 *
140 * \param buffer Specifies the FIFO object address.
141 * \param size Specifies the FIFO buffer size in bytes
142 * \param elementSize Specifies data element size in bytes. size must be bigger or equal to elemenntSize.
143 *
144 * \return Returns a pointer on the FIFO object
145 *
146 * \note: The buffer parameter must point on a free memory location where the
147 * buffer object will be initialised. The size of this area must be at least
148 * equals to "size + sizeof(Ifx_Fifo) + 8". Not taking this in account may result
149 * in unpredictable behavior.
150 */
151 IFX_EXTERN Ifx_Fifo *Ifx_Fifo_init(void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize);
152
153 /** \brief Read data from a fifo and remove them from the buffer.
154 *
155 * Only complete elements are returned, if count is not a multiple of
156 * elementSize then the incomplete element is not read/removed from the buffer.
157 *
158 * \param fifo Pointer on the Fifo object
159 * \param data Pointer to the data buffer for storing values
160 * \param count in bytes
161 * \param timeout in system timer ticks
162 *
163 * \return return the number of byte that could not be read
164 */
165 IFX_EXTERN Ifx_SizeT Ifx_Fifo_read(Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout);
166
167 /** \brief Write data into a fifo.
168 *
169 * Only complete elements are written to the buffer, if count is not a multiple of
170 * elementSize then the incomplete element are not written to the buffer.
171 *
172 * \param fifo Pointer on the Fifo object
173 * \param data Pointer to the data buffer to write into the Fifo
174 * \param count in bytes
175 * \param timeout in system timer ticks
176 */
177 IFX_EXTERN Ifx_SizeT Ifx_Fifo_write(Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout);
178
179 /** \brief Empty the fifo
180 *
181 * \param fifo Pointer on the Fifo object
182 * \param timeout in system timer ticks
183 *
184 * \return TRUE if the buffer is emptied.
185 */
186 IFX_INLINE boolean Ifx_Fifo_flush(Ifx_Fifo *fifo, Ifx_TickTime timeout)
187 {
188 return Ifx_Fifo_canWriteCount(fifo, fifo->size, timeout);
189 }
190
191
192 /**
193 * \brief Returns the size of the data in the buffer in bytes
194 *
195 * \param fifo Pointer on the Fifo object
196 *
197 * Note as the Ifx_Fifo_write / Ifx_Fifo_read function does only write blocks which are
198 * a multiple of fifo->elementSize, the Ifx_Fifo_readCount / Ifx_Fifo_writeCount return
199 * a multiple of fifo->elementSize
200 *
201 * \return Returns the size of the data in the buffer in bytes
202 */
203 IFX_INLINE Ifx_SizeT Ifx_Fifo_readCount(Ifx_Fifo *fifo)
204 {
205 return fifo->shared.count;
206 }
207
208
209 /** \brief Returns the free size in bytes
210 *
211 * \param fifo Pointer on the Fifo object
212 *
213 * Note as the Ifx_Fifo_write / Ifx_Fifo_read function does only write blocks which are
214 * a multiple of fifo->elementSize, the Ifx_Fifo_readCount / Ifx_Fifo_writeCount return
215 * a multiple of fifo->elementSize
216 *
217 * \return Returns the free size in bytes
218 */
219 IFX_INLINE Ifx_SizeT Ifx_Fifo_writeCount(Ifx_Fifo *fifo)
220 {
221 return (Ifx_SizeT)(fifo->size - Ifx_Fifo_readCount(fifo));
222 }
223
224
225 /** \brief Indicates if the fifo is empty
226 *
227 * \param fifo Pointer on the Ifx_Fifo object
228 *
229 * \retval TRUE is the buffer is empty
230 * \retval FALSE is the buffer is not empty
231 */
232 IFX_INLINE boolean Ifx_Fifo_isEmpty(Ifx_Fifo *fifo)
233 {
234 return (Ifx_Fifo_readCount(fifo) != FALSE) ? FALSE : TRUE;
235 }
236
237
238 /**\}*/
239 //------------------------------------------------------------------------------
240 #endif
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
_Fifo::buffer
void * buffer
aligned on 64 bit boundary
Definition: Ifx_Fifo.h:72
_Fifo::startIndex
Ifx_SizeT startIndex
buffer valid data start index
Definition: Ifx_Fifo.h:74
Ifx_Fifo_write
IFX_EXTERN Ifx_SizeT Ifx_Fifo_write(Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo.
Definition: Ifx_Fifo.c:366
Ifx_Fifo
struct _Fifo Ifx_Fifo
Ifx_Fifo_canReadCount
IFX_EXTERN boolean Ifx_Fifo_canReadCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer.
Definition: Ifx_Fifo.c:136
_Fifo::eventReader
volatile boolean eventReader
event set by the writer to signal the reader that the required data are available in the buffer ...
Definition: Ifx_Fifo.h:78
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
Ifx_Fifo_Shared::writerWaitx
sint32 writerWaitx
Number of byte that the writer expect to be free. When the reader modify it to 0 the reader get signa...
Definition: Ifx_Fifo.h:61
Ifx_Fifo_init
IFX_EXTERN Ifx_Fifo * Ifx_Fifo_init(void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object.
Definition: Ifx_Fifo.c:91
Ifx_Fifo_destroy
IFX_EXTERN void Ifx_Fifo_destroy(Ifx_Fifo *fifo)
Destroy the FIFO object.
Definition: Ifx_Fifo.c:85
IfxCpu_Intrinsics.h
Ifx_Fifo_Shared::maxcount
Ifx_SizeT maxcount
Highest value seen in the count.
Definition: Ifx_Fifo.h:62
_Fifo::endIndex
Ifx_SizeT endIndex
buffer valid data end index
Definition: Ifx_Fifo.h:75
FALSE
#define FALSE
Definition: Platform_Types.h:93
Ifx_Fifo_read
IFX_EXTERN Ifx_SizeT Ifx_Fifo_read(Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer.
Definition: Ifx_Fifo.c:208
_Fifo::shared
Ifx_Fifo_Shared shared
data shared between reader / writer
Definition: Ifx_Fifo.h:73
Ifx_Fifo_canWriteCount
IFX_EXTERN boolean Ifx_Fifo_canWriteCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: Ifx_Fifo.c:296
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
_Fifo::eventWriter
volatile boolean eventWriter
event set by the reader to signal the writer that the required free space are available in the buffer...
Definition: Ifx_Fifo.h:79
_Fifo::elementSize
Ifx_SizeT elementSize
minimum number of bytes (block) added / removed to / from the buffer
Definition: Ifx_Fifo.h:77
Ifx_Fifo_Shared
Definition: Ifx_Fifo.h:57
_Fifo
Definition: Ifx_Fifo.h:70
Ifx_Fifo_flush
IFX_INLINE boolean Ifx_Fifo_flush(Ifx_Fifo *fifo, Ifx_TickTime timeout)
Empty the fifo.
Definition: Ifx_Fifo.h:186
Ifx_Fifo_create
IFX_EXTERN Ifx_Fifo * Ifx_Fifo_create(Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object.
Definition: Ifx_Fifo.c:68
Ifx_Fifo_Shared::count
Ifx_SizeT count
number of bytes contained in the buffer
Definition: Ifx_Fifo.h:59
Ifx_Fifo_readCount
IFX_INLINE Ifx_SizeT Ifx_Fifo_readCount(Ifx_Fifo *fifo)
Returns the size of the data in the buffer in bytes.
Definition: Ifx_Fifo.h:203
Ifx_Fifo_clear
IFX_EXTERN void Ifx_Fifo_clear(Ifx_Fifo *fifo)
Clear fifo contents.
Definition: Ifx_Fifo.c:259
_Fifo::size
Ifx_SizeT size
multiple of 8 bit, max 0xFFF8
Definition: Ifx_Fifo.h:76
Ifx_Fifo_writeCount
IFX_INLINE Ifx_SizeT Ifx_Fifo_writeCount(Ifx_Fifo *fifo)
Returns the free size in bytes.
Definition: Ifx_Fifo.h:219
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_Fifo_isEmpty
IFX_INLINE boolean Ifx_Fifo_isEmpty(Ifx_Fifo *fifo)
Indicates if the fifo is empty.
Definition: Ifx_Fifo.h:232
Ifx_Fifo_Shared::readerWaitx
sint32 readerWaitx
Number of bytes that the reader is waiting for. When the writer modify it to 0 the reader get signale...
Definition: Ifx_Fifo.h:60
TRUE
#define TRUE
Definition: Platform_Types.h:90


iLLD_TC26B: Ifx_GlobalResources.c Source File

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Ifx_GlobalResources.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_GlobalResources.h
3 * \brief Handling of global resources
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:36 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #include "Ifx_GlobalResources.h"
43 /** \brief Global resource object */
44 typedef struct
45 {
46 const Ifx_GlobalResources_Item *table; /**< \brief Pointer to the global resource table */
47 sint32 size; /**< \brief Size of the global resource table */
48 } Ifx_GlobalResources;
49
50 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
51
52 Ifx_GlobalResources ifx_GlobalResource;
53 #endif
54
55 void *Ifx_GlobalResources_get(sint32 id)
56 {
57 void *result;
58
59 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
60
61 if (id < ifx_GlobalResource.size)
62 {
63 result = ifx_GlobalResource.table[id].resource;
64 }
65 else
66 {
67 result = NULL_PTR;
68 }
69
70 #else
71 result = NULL_PTR;
72
73 #endif
74
75 return result;
76 }
77
78
79 sint32 Ifx_GlobalResources_getIndex(void *resource)
80 {
81 sint32 id = -1;
82
83 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
84 int i;
85
86 for (i = 0; i < ifx_GlobalResource.size; i++)
87 {
88 if (resource == ifx_GlobalResource.table[i].resource)
89 {
90 id = i;
91 }
92 else
93 {}
94 }
95
96 #else
97 #endif
98
99 return id;
100 }
101
102
103 const Ifx_GlobalResources_Item *Ifx_GlobalResources_getItem(sint32 id)
104 {
105 const Ifx_GlobalResources_Item *result;
106
107 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
108
109 if (id < ifx_GlobalResource.size)
110 {
111 result = &ifx_GlobalResource.table[id];
112 }
113 else
114 {
115 result = NULL_PTR;
116 }
117
118 #else
119 result = NULL_PTR;
120
121 #endif
122
123 return result;
124 }
125
126
127 pchar Ifx_GlobalResources_getName(sint32 id)
128 {
129 pchar name;
130
131 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
132
133 if (id < ifx_GlobalResource.size)
134 {
135 name = ifx_GlobalResource.table[id].name;
136 }
137 else
138 {
139 name = "unknown";
140 }
141
142 #else
143 name = "unknown";
144
145 #endif
146
147 return name;
148 }
149
150
151 boolean Ifx_GlobalResources_init(const Ifx_GlobalResources_Item *table, uint32 size)
152 {
153 boolean result;
154
155 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
156 ifx_GlobalResource.table = table;
157 ifx_GlobalResource.size = size;
158 result = TRUE;
159 #else
160 result = FALSE;
161
162 #endif
163
164 return result;
165 }
Ifx_GlobalResources_getName
pchar Ifx_GlobalResources_getName(sint32 id)
Definition: Ifx_GlobalResources.c:127
Ifx_GlobalResources_Item::name
pchar name
Definition: Ifx_GlobalResources.h:58
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_GlobalResources.h
Handling of global resources.
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
FALSE
#define FALSE
Definition: Platform_Types.h:93
Ifx_GlobalResources::table
const Ifx_GlobalResources_Item * table
Pointer to the global resource table.
Definition: Ifx_GlobalResources.c:46
Ifx_GlobalResources_get
void * Ifx_GlobalResources_get(sint32 id)
Definition: Ifx_GlobalResources.c:55
Ifx_GlobalResources_init
boolean Ifx_GlobalResources_init(const Ifx_GlobalResources_Item *table, uint32 size)
Definition: Ifx_GlobalResources.c:151
Ifx_GlobalResources_getItem
const Ifx_GlobalResources_Item * Ifx_GlobalResources_getItem(sint32 id)
Definition: Ifx_GlobalResources.c:103
Ifx_GlobalResources::size
sint32 size
Size of the global resource table.
Definition: Ifx_GlobalResources.c:47
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_GlobalResources_Item::resource
void * resource
Definition: Ifx_GlobalResources.h:57
Ifx_GlobalResources_Item
Definition: Ifx_GlobalResources.h:55
Ifx_GlobalResources
Global resource object.
Definition: Ifx_GlobalResources.c:44
TRUE
#define TRUE
Definition: Platform_Types.h:90
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
Ifx_GlobalResources_getIndex
sint32 Ifx_GlobalResources_getIndex(void *resource)
Returns the global resource index.
Definition: Ifx_GlobalResources.c:79


iLLD_TC26B: Ifx_GlobalResources.h Source File

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Ifx_GlobalResources.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_GlobalResources.h
3 * \brief Handling of global resources
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-28 14:15:39 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_sysse_general_globalresources Global resources
41 * This module implements the global resources handling
42 * \ingroup library_srvsw_sysse_general
43 */
44
45 #ifndef IFX_GLOBALRESOURCES_H
46 #define IFX_GLOBALRESOURCES_H 1
47
48 #include "Ifx_Cfg.h"
49 #include "Cpu/Std/Ifx_Types.h"
50
51 #ifndef IFX_CFG_GLOBAL_RESOURCES_ENABLED
52 #define IFX_CFG_GLOBAL_RESOURCES_ENABLED (0)
53 #endif
54
55 typedef struct
56 {
57 void *resource;
58 pchar name;
59 } Ifx_GlobalResources_Item;
60
61 /** \addtogroup library_srvsw_sysse_general_globalresources
62 * \{ */
63 /** Return a pointer to the global resource
64 *
65 * \param id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
66 *
67 * \return return Ifx_GlobalResources_Item.resource
68 */
69 IFX_EXTERN void *Ifx_GlobalResources_get(sint32 id);
70
71 /** \brief Returns the global resource index.
72 *
73 * \return Returns the global resource index, -1 if not found
74 */
75 IFX_EXTERN sint32 Ifx_GlobalResources_getIndex(void *resource);
76
77 /** Return a pointer to the global resource item
78 *
79 * \param id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
80 *
81 * \return return the Ifx_GlobalResources_Item
82 */
83 IFX_EXTERN const Ifx_GlobalResources_Item *Ifx_GlobalResources_getItem(sint32 id);
84
85 /** Return a the resource name as an NULL terminated string
86 *
87 * \param id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
88 *
89 * \return return Ifx_GlobalResources_Item.name
90 */
91 IFX_EXTERN pchar Ifx_GlobalResources_getName(sint32 id);
92
93 /** Initialize the global resource handler
94 *
95 * \param table pointer to an array of Ifx_GlobalResources_Item
96 * \param size number of item in the table corresponds to sizeof(table)
97 *
98 * return returns TRUE in case of success else FALSE
99 *
100 */
101 IFX_EXTERN boolean Ifx_GlobalResources_init(const Ifx_GlobalResources_Item *table, uint32 size);
102 /** \} */
103
104 #endif /* IFX_GLOBALRESOURCES_H */
Ifx_GlobalResources_getName
IFX_EXTERN pchar Ifx_GlobalResources_getName(sint32 id)
Definition: Ifx_GlobalResources.c:127
Ifx_GlobalResources_Item::name
pchar name
Definition: Ifx_GlobalResources.h:58
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_GlobalResources_get
IFX_EXTERN void * Ifx_GlobalResources_get(sint32 id)
Definition: Ifx_GlobalResources.c:55
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_GlobalResources_init
IFX_EXTERN boolean Ifx_GlobalResources_init(const Ifx_GlobalResources_Item *table, uint32 size)
Definition: Ifx_GlobalResources.c:151
Ifx_GlobalResources_getItem
IFX_EXTERN const Ifx_GlobalResources_Item * Ifx_GlobalResources_getItem(sint32 id)
Definition: Ifx_GlobalResources.c:103
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_GlobalResources_Item::resource
void * resource
Definition: Ifx_GlobalResources.h:57
Ifx_GlobalResources_Item
Definition: Ifx_GlobalResources.h:55
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
Ifx_GlobalResources_getIndex
IFX_EXTERN sint32 Ifx_GlobalResources_getIndex(void *resource)
Returns the global resource index.
Definition: Ifx_GlobalResources.c:79


iLLD_TC26B: Ifx_IntegralF32.c Source File

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Ifx_IntegralF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_IntegralF32.c
3 * \brief Discrete integral approximation
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42 #include "Ifx_IntegralF32.h"
43
44 void Ifx_IntegralF32_reset(Ifx_IntegralF32 *ci)
45 {
46 ci->uk = 0;
47 ci->ik = 0;
48 }
49
50
51 void Ifx_IntegralF32_init(Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
52 {
53 ci->delta = gain * Ts / 2;
54 }
55
56
57 float32 Ifx_IntegralF32_step(Ifx_IntegralF32 *ci, float32 ik)
58 {
59 ci->uk = ci->uk + (ik + ci->ik) * ci->delta;
60 ci->ik = ik;
61
62 return ci->uk;
63 }
64
65
66 void Ifx_ClpxFloat32_Integral_reset(Ifx_ClpxFloat32_Integral *ci)
67 {
68 ci->uk.real = 0;
69 ci->uk.imag = 0;
70 ci->ik.real = 0;
71 ci->ik.imag = 0;
72 }
73
74
75 void Ifx_ClpxFloat32_Integral_init(Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
76 {
77 Ifx_ClpxFloat32_Integral_reset(ci);
78 ci->delta = gain * Ts / 2;
79 }
80
81
82 cfloat32 Ifx_ClpxFloat32_Integral_step(Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
83 {
84 ci->uk.real = ci->uk.real + (ik.real + ci->ik.real) * ci->delta;
85 ci->uk.imag = ci->uk.imag + (ik.imag + ci->ik.imag) * ci->delta;
86 ci->ik = ik;
87
88 return ci->uk;
89 }
Ifx_IntegralF32.h
Discrete integral approximation.
Ifx_ClpxFloat32_Integral_init
void Ifx_ClpxFloat32_Integral_init(Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
Initialize the integrator object.
Definition: Ifx_IntegralF32.c:75
Ifx_IntegralF32::delta
float32 delta
Definition: Ifx_IntegralF32.h:58
Ifx_ClpxFloat32_Integral_step
cfloat32 Ifx_ClpxFloat32_Integral_step(Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
Step function of the integrator object.
Definition: Ifx_IntegralF32.c:82
float32
float float32
Definition: Platform_Types.h:170
Ifx_ClpxFloat32_Integral::uk
cfloat32 uk
Definition: Ifx_IntegralF32.h:64
Ifx_ClpxFloat32_Integral_reset
void Ifx_ClpxFloat32_Integral_reset(Ifx_ClpxFloat32_Integral *ci)
Reset the integrator object.
Definition: Ifx_IntegralF32.c:66
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:61
Ifx_IntegralF32::ik
float32 ik
Definition: Ifx_IntegralF32.h:57
cfloat32
Definition: Ifx_Types.h:58
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:60
Ifx_IntegralF32::uk
float32 uk
Definition: Ifx_IntegralF32.h:56
Ifx_ClpxFloat32_Integral
Integrator object for cfloat32 data type.
Definition: Ifx_IntegralF32.h:62
Ifx_ClpxFloat32_Integral::ik
cfloat32 ik
Definition: Ifx_IntegralF32.h:65
Ifx_IntegralF32_step
float32 Ifx_IntegralF32_step(Ifx_IntegralF32 *ci, float32 ik)
Step function of the integrator object.
Definition: Ifx_IntegralF32.c:57
Ifx_IntegralF32_init
void Ifx_IntegralF32_init(Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
Initialize the integrator object.
Definition: Ifx_IntegralF32.c:51
Ifx_IntegralF32_reset
void Ifx_IntegralF32_reset(Ifx_IntegralF32 *ci)
Reset the integrator object.
Definition: Ifx_IntegralF32.c:44
Ifx_IntegralF32
Integrator object for float32 data type.
Definition: Ifx_IntegralF32.h:54


iLLD_TC26B: Ifx_IntegralF32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_IntegralF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_IntegralF32.h
3 * \brief Discrete integral approximation
4 * \ingroup library_srvsw_sysse_math_f32_integral
5 *
6 *
7 *
8 * \version disabled
9 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
10 *
11 *
12 * IMPORTANT NOTICE
13 *
14 * Use of this file is subject to the terms of use agreed between (i) you or
15 * the company in which ordinary course of business you are acting and (ii)
16 * Infineon Technologies AG or its licensees. If and as long as no such terms
17 * of use are agreed, use of this file is subject to following:
18 *
19 * Boost Software License - Version 1.0 - August 17th, 2003
20 *
21 * Permission is hereby granted, free of charge, to any person or organization
22 * obtaining a copy of the software and accompanying documentation covered by
23 * this license (the "Software") to use, reproduce, display, distribute,
24 * execute, and transmit the Software, and to prepare derivative works of the
25 * Software, and to permit third-parties to whom the Software is furnished to
26 * do so, all subject to the following:
27 *
28 * The copyright notices in the Software and this entire statement, including
29 * the above license grant, this restriction and the following disclaimer, must
30 * be included in all copies of the Software, in whole or in part, and all
31 * derivative works of the Software, unless such copies or derivative works are
32 * solely in the form of machine-executable object code generated by a source
33 * language processor.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
36 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
37 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
38 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
39 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
40 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
41 * DEALINGS IN THE SOFTWARE.
42 *
43 * \defgroup library_srvsw_sysse_math_f32_integral Discrete Integral Approximation
44 * \ingroup library_srvsw_sysse_math_f32
45 *
46 */
47
48 #ifndef INTEGRAL_H
49 #define INTEGRAL_H
50
51 #include "Ifx_Cf32.h"
52
53 /** \brief Integrator object for float32 data type */
54 typedef struct
55 {
56 float32 uk;
57 float32 ik;
58 float32 delta;
59 } Ifx_IntegralF32;
60
61 /** \brief Integrator object for cfloat32 data type */
62 typedef struct
63 {
64 cfloat32 uk;
65 cfloat32 ik;
66 float32 delta;
67 } Ifx_ClpxFloat32_Integral;
68
69 /** \addtogroup library_srvsw_sysse_math_f32_integral
70 * \{ */
71
72 /** \brief Initialize the integrator object
73 * \param ci Pointer to the integrator object
74 * \param gain Integrator gain
75 * \param Ts Sampling period */
76 void Ifx_IntegralF32_init(Ifx_IntegralF32 *ci, float32 gain, float32 Ts);
77
78 /** \brief Step function of the integrator object
79 * \param ci Pointer to the integrator object
80 * \param ik input value
81 * \return most actual integrator value */
82 float32 Ifx_IntegralF32_step(Ifx_IntegralF32 *ci, float32 ik);
83
84 /** \brief Reset the integrator object
85 * \param ci Pointer to the integrator object */
86 void Ifx_IntegralF32_reset(Ifx_IntegralF32 *ci);
87
88 /** \brief Initialize the integrator object
89 * \param ci Pointer to the integrator object
90 * \param gain Integrator gain
91 * \param Ts Sampling period */
92 void Ifx_ClpxFloat32_Integral_init(Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts);
93
94 /** \brief Step function of the integrator object
95 * \param ci Pointer to the integrator object
96 * \param ik input value
97 * \return most actual integrator value */
98 cfloat32 Ifx_ClpxFloat32_Integral_step(Ifx_ClpxFloat32_Integral *ci, cfloat32 ik);
99
100 /** \brief Reset the integrator object
101 * \param ci Pointer to the integrator object */
102 void Ifx_ClpxFloat32_Integral_reset(Ifx_ClpxFloat32_Integral *ci);
103
104 /**\}*/
105
106 #endif /* INTEGRAL_H */
Ifx_ClpxFloat32_Integral_init
void Ifx_ClpxFloat32_Integral_init(Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
Initialize the integrator object.
Definition: Ifx_IntegralF32.c:75
Ifx_IntegralF32::delta
float32 delta
Definition: Ifx_IntegralF32.h:58
Ifx_ClpxFloat32_Integral_step
cfloat32 Ifx_ClpxFloat32_Integral_step(Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
Step function of the integrator object.
Definition: Ifx_IntegralF32.c:82
float32
float float32
Definition: Platform_Types.h:170
Ifx_ClpxFloat32_Integral::uk
cfloat32 uk
Definition: Ifx_IntegralF32.h:64
Ifx_ClpxFloat32_Integral_reset
void Ifx_ClpxFloat32_Integral_reset(Ifx_ClpxFloat32_Integral *ci)
Reset the integrator object.
Definition: Ifx_IntegralF32.c:66
Ifx_IntegralF32::ik
float32 ik
Definition: Ifx_IntegralF32.h:57
cfloat32
Definition: Ifx_Types.h:58
Ifx_IntegralF32::uk
float32 uk
Definition: Ifx_IntegralF32.h:56
Ifx_ClpxFloat32_Integral
Integrator object for cfloat32 data type.
Definition: Ifx_IntegralF32.h:62
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
Ifx_ClpxFloat32_Integral::ik
cfloat32 ik
Definition: Ifx_IntegralF32.h:65
Ifx_IntegralF32_step
float32 Ifx_IntegralF32_step(Ifx_IntegralF32 *ci, float32 ik)
Step function of the integrator object.
Definition: Ifx_IntegralF32.c:57
Ifx_IntegralF32_init
void Ifx_IntegralF32_init(Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
Initialize the integrator object.
Definition: Ifx_IntegralF32.c:51
Ifx_IntegralF32_reset
void Ifx_IntegralF32_reset(Ifx_IntegralF32 *ci)
Reset the integrator object.
Definition: Ifx_IntegralF32.c:44
Ifx_IntegralF32
Integrator object for float32 data type.
Definition: Ifx_IntegralF32.h:54


iLLD_TC26B: Ifx_InternalMux.c Source File

  • _Lib
  • InternalMux
Ifx_InternalMux.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_InternalMux.c
3 * \brief Mux configuration functions
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "Ifx_InternalMux.h"
47 #include "Cpu/Std/IfxCpu_Intrinsics.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void Ifx_InternalMux_init(const Ifx_InternalMux_Config *cfg)
54 {
55 uint32 i;
56
57 for (i = 0; i < cfg->size; i++)
58 {
59 Ifx_InternalMux_MuxConfig muxCfg = cfg->muxConfig[i];
60
61 /*Load modify store operation done to insert the value to the register bit field*/
62 __ldmst((volatile void *)(muxCfg.regAddr), muxCfg.mask, muxCfg.value);
63 }
64 }
Ifx_InternalMux_MuxConfig::value
uint32 value
Mux/Demux configuration value.
Definition: Ifx_InternalMux.h:66
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_InternalMux_MuxConfig::mask
uint32 mask
Bit field position for the Mux/Demux selection.
Definition: Ifx_InternalMux.h:65
IfxCpu_Intrinsics.h
Ifx_InternalMux.h
Mux configuration functions.
Ifx_InternalMux_Config
Definition: Ifx_InternalMux.h:72
Ifx_InternalMux_Config::size
uint32 size
Definition: Ifx_InternalMux.h:74
__ldmst
#define __ldmst
Definition: IfxCpu_IntrinsicsDcc.h:2065
Ifx_InternalMux_init
void Ifx_InternalMux_init(const Ifx_InternalMux_Config *cfg)
Initialises the internal mux configuration.
Definition: Ifx_InternalMux.c:53
Ifx_InternalMux_MuxConfig::regAddr
volatile void * regAddr
pointer to the register for Mux/Demux configuration
Definition: Ifx_InternalMux.h:64
Ifx_InternalMux_MuxConfig
Definition: Ifx_InternalMux.h:62
Ifx_InternalMux_Config::muxConfig
Ifx_InternalMux_MuxConfig * muxConfig
Definition: Ifx_InternalMux.h:75


iLLD_TC26B: Ifx_InternalMux.h Source File

  • _Lib
  • InternalMux
Ifx_InternalMux.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_InternalMux.h
3 * \brief Mux configuration functions
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2015 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup IfxLld_lib_internalmux_internalmux FIFO
41 * This module implements the Internal Mux functionality.
42 * \ingroup IfxLld_lib_internalmux
43 */
44
45 #ifndef IFX_INTERNALMUX_H
46 #define IFX_INTERNALMUX_H 1
47
48 /******************************************************************************/
49 /*----------------------------------Includes----------------------------------*/
50 /******************************************************************************/
51
52 #include "Cpu/Std/Ifx_Types.h"
53
54 /******************************************************************************/
55 /*-----------------------------Data Structures--------------------------------*/
56 /******************************************************************************/
57 /** \addtogroup IfxLld_lib_internalmux_internalmux
58 * \{ */
59 /** Individual Mux configuration structure
60 *
61 */
62 typedef struct
63 {
64 volatile void *regAddr; /**< \brief pointer to the register for Mux/Demux configuration */
65 uint32 mask; /**< \brief Bit field position for the Mux/Demux selection */
66 uint32 value; /**< \brief Mux/Demux configuration value */
67 } Ifx_InternalMux_MuxConfig;
68
69 /** Global/Combined Mux configuration object
70 *
71 */
72 typedef struct
73 {
74 uint32 size; /**< size of the internal mux configuration array*/
75 Ifx_InternalMux_MuxConfig *muxConfig; /**< pointer to the internal mux config array*/
76 }Ifx_InternalMux_Config;
77
78 /******************************************************************************/
79 /*-------------------------Global Function Prototypes-------------------------*/
80 /******************************************************************************/
81 /** \brief Initialises the internal mux configuration
82 *
83 * \param cfg Pointer on the Global Mux Configuration object
84 *
85 * \return None
86 */
87 IFX_EXTERN void Ifx_InternalMux_init(const Ifx_InternalMux_Config *cfg);
88
89 /**\}*/
90
91 #endif /* IFX_INTERNALMUX_H */
Ifx_InternalMux_MuxConfig::value
uint32 value
Mux/Demux configuration value.
Definition: Ifx_InternalMux.h:66
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_InternalMux_MuxConfig::mask
uint32 mask
Bit field position for the Mux/Demux selection.
Definition: Ifx_InternalMux.h:65
Ifx_InternalMux_Config
Definition: Ifx_InternalMux.h:72
Ifx_InternalMux_Config::size
uint32 size
Definition: Ifx_InternalMux.h:74
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_InternalMux_init
IFX_EXTERN void Ifx_InternalMux_init(const Ifx_InternalMux_Config *cfg)
Initialises the internal mux configuration.
Definition: Ifx_InternalMux.c:53
Ifx_InternalMux_MuxConfig::regAddr
volatile void * regAddr
pointer to the register for Mux/Demux configuration
Definition: Ifx_InternalMux.h:64
Ifx_InternalMux_MuxConfig
Definition: Ifx_InternalMux.h:62
Ifx_InternalMux_Config::muxConfig
Ifx_InternalMux_MuxConfig * muxConfig
Definition: Ifx_InternalMux.h:75


iLLD_TC26B: Ifx_LowPassPt1F32.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LowPassPt1F32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LowPassPt1F32.c
3 * \brief Low pass filter PT1
4 *
5 * \version disabled
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 //------------------------------------------------------------------------------
43 #include "SysSe/Math/Ifx_LowPassPt1F32.h"
44 //------------------------------------------------------------------------------
45
46 /** \brief Set the low pass filter configuration
47 *
48 * This function sets the low pass filter configuration and reset the filter output.
49 *
50 * \param filter Specifies PT1 filter.
51 * \param config Specifies the PT1 filter configuration.
52 *
53 * \return None
54 */
55 void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
56 {
57 float32 tStar;
58 float32 T = 1 / config->cutOffFrequency;
59 tStar = 1 / (T / config->samplingTime + 1);
60
61 filter->a = config->gain * tStar;
62 filter->b = tStar;
63 filter->out = 0;
64 }
65
66
67 /** \brief Execute the low pass filter
68 * \param filter Specifies PT1 filter.
69 * \param input Specifies the filter input.
70 *
71 * \return Returns the filter output
72 */
73 float32 Ifx_LowPassPt1F32_do(Ifx_LowPassPt1F32 *filter, float32 input)
74 {
75 filter->out = filter->out + filter->a * input - filter->b * filter->out;
76 return filter->out;
77 }
Ifx_LowPassPt1F32::out
float32 out
last output
Definition: Ifx_LowPassPt1F32.h:65
Ifx_LowPassPt1F32_do
float32 Ifx_LowPassPt1F32_do(Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter.
Definition: Ifx_LowPassPt1F32.c:73
float32
float float32
Definition: Platform_Types.h:170
Ifx_LowPassPt1F32
PT1 object definition.
Definition: Ifx_LowPassPt1F32.h:61
Ifx_LowPassPt1F32_init
void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration.
Definition: Ifx_LowPassPt1F32.c:55
Ifx_LowPassPt1F32.h
Low pass filter PT1.
Ifx_LowPassPt1F32::b
float32 b
b parameter
Definition: Ifx_LowPassPt1F32.h:64
Ifx_LowPassPt1F32_Config::samplingTime
float32 samplingTime
Sampling time.
Definition: Ifx_LowPassPt1F32.h:73
Ifx_LowPassPt1F32::a
float32 a
a parameter
Definition: Ifx_LowPassPt1F32.h:63
Ifx_LowPassPt1F32_Config::cutOffFrequency
float32 cutOffFrequency
Cut off frequency.
Definition: Ifx_LowPassPt1F32.h:71
Ifx_LowPassPt1F32_Config::gain
float32 gain
Gain.
Definition: Ifx_LowPassPt1F32.h:72
Ifx_LowPassPt1F32_Config
PT1 configuration.
Definition: Ifx_LowPassPt1F32.h:69


iLLD_TC26B: Ifx_LowPassPt1F32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LowPassPt1F32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_LowPassPt1F32.h
3 * \brief Low pass filter PT1
4 *
5 * \version disabled
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_sysse_math_f32_lowpasspt1 Low-pass Filter: Type PT1
41 * This module implements a PT1 low pass filter.
42 * http://de.wikipedia.org/wiki/PT1-Glied
43 *
44 * Formula: \n
45 * \f$ y_k = y_{k-1} + a * x_k - b * y_{k-1} \f$ \n
46 * with \f$(T^* = \frac{T_s}{T+T_s})\f$, \f$(a = K*T^*)\f$, \f$(b = T^*)\f$
47 * with \f$(T_s: Sample time)\f$, \f$(K: Gain)\f$, \f$(T = \frac{1}{\omega_0})\f$
48 *
49 * \ingroup library_srvsw_sysse_math_f32
50 *
51 */
52
53 #if !defined(IFX_LOWPASSPT1F32)
54 #define IFX_LOWPASSPT1F32
55 //------------------------------------------------------------------------------
56 #include "Cpu/Std/Ifx_Types.h"
57 //------------------------------------------------------------------------------
58
59 /** \brief PT1 object definition.
60 */
61 typedef struct
62 {
63 float32 a; /**< \brief a parameter */
64 float32 b; /**< \brief b parameter */
65 float32 out; /**< \brief last output */
66 } Ifx_LowPassPt1F32;
67
68 /** \brief PT1 configuration */
69 typedef struct
70 {
71 float32 cutOffFrequency; /**< \brief Cut off frequency */
72 float32 gain; /**< \brief Gain */
73 float32 samplingTime; /**< \brief Sampling time */
74 } Ifx_LowPassPt1F32_Config;
75
76 //------------------------------------------------------------------------------
77
78 /** \addtogroup library_srvsw_sysse_math_f32_lowpasspt1
79 * \{ */
80 IFX_EXTERN void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config);
81 IFX_INLINE void Ifx_LowPassPt1F32_reset(Ifx_LowPassPt1F32 *filter);
82 IFX_EXTERN float32 Ifx_LowPassPt1F32_do(Ifx_LowPassPt1F32 *filter, float32 input);
83 /** \} */
84
85 //------------------------------------------------------------------------------
86
87 /** \brief Reset the internal filter variable
88 * \param filter Specifies PT1 filter.
89 */
90 IFX_INLINE void Ifx_LowPassPt1F32_reset(Ifx_LowPassPt1F32 *filter)
91 {
92 filter->out = 0.0;
93 }
94
95
96 //------------------------------------------------------------------------------
97 #endif
Ifx_LowPassPt1F32::out
float32 out
last output
Definition: Ifx_LowPassPt1F32.h:65
Ifx_LowPassPt1F32_do
IFX_EXTERN float32 Ifx_LowPassPt1F32_do(Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter.
Definition: Ifx_LowPassPt1F32.c:73
float32
float float32
Definition: Platform_Types.h:170
Ifx_LowPassPt1F32_reset
IFX_INLINE void Ifx_LowPassPt1F32_reset(Ifx_LowPassPt1F32 *filter)
Reset the internal filter variable.
Definition: Ifx_LowPassPt1F32.h:90
Ifx_LowPassPt1F32
PT1 object definition.
Definition: Ifx_LowPassPt1F32.h:61
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_LowPassPt1F32_init
IFX_EXTERN void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration.
Definition: Ifx_LowPassPt1F32.c:55
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_LowPassPt1F32::b
float32 b
b parameter
Definition: Ifx_LowPassPt1F32.h:64
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_LowPassPt1F32_Config::samplingTime
float32 samplingTime
Sampling time.
Definition: Ifx_LowPassPt1F32.h:73
Ifx_LowPassPt1F32::a
float32 a
a parameter
Definition: Ifx_LowPassPt1F32.h:63
Ifx_LowPassPt1F32_Config::cutOffFrequency
float32 cutOffFrequency
Cut off frequency.
Definition: Ifx_LowPassPt1F32.h:71
Ifx_LowPassPt1F32_Config::gain
float32 gain
Gain.
Definition: Ifx_LowPassPt1F32.h:72
Ifx_LowPassPt1F32_Config
PT1 configuration.
Definition: Ifx_LowPassPt1F32.h:69


iLLD_TC26B: Ifx_Lut.h Source File

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Ifx_Lut.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Lut.h
3 * \brief Lookup defintion with fixed-point angle data type
4 *
5 *
6 *
7 * \version disabled
8 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 * \defgroup library_srvsw_sysse_math_lut Look-ups
43 * \ingroup library_srvsw_sysse_math
44 *
45 * \defgroup library_srvsw_sysse_math_f32_lut Look-ups float32
46 * \ingroup library_srvsw_sysse_math_lut
47 *
48 */
49 #ifndef IFX_LUT_H
50 #define IFX_LUT_H
51 //________________________________________________________________________________________
52 #include "Cpu/Std/IfxCpu_Intrinsics.h"
53 //________________________________________________________________________________________
54 #ifndef IFX_LUT_TABLE_CONST
55 /** \brief 0 = Lookup tables are generated and stored in RAM,
56 * 1 = Lookup tables are precompiled and stored in FLASH */
57 #define IFX_LUT_TABLE_CONST (1)
58 #endif
59
60 #if (IFX_LUT_TABLE_CONST != 0)
61 /** \brief Lookup table type modifier (stored in ROM) */
62 # define IFX_LUT_TABLE const
63 #else
64 /** \brief Lookup table type modifier (stored in RAM) */
65 # define IFX_LUT_TABLE
66 #endif
67
68 /** \brief Define the resolution (in bits) of cosinus and sinus table \ingroup library_srvsw_sysse_math_lut */
69 #define IFX_LUT_ANGLE_BITS (12)
70
71 /** \brief Define the cosinus and sinus table size \ingroup library_srvsw_sysse_math_lut */
72 #define IFX_LUT_ANGLE_RESOLUTION (1 << IFX_LUT_ANGLE_BITS)
73
74 /** \brief Value used as 180 degree angle */
75 #define IFX_LUT_ANGLE_PI (IFX_LUT_ANGLE_RESOLUTION / 2)
76
77 //________________________________________________________________________________________
78 /** \brief Fixed-point angle type.
79 *
80 * Resolution is defined by \ref IFX_LUT_ANGLE_RESOLUTION */
81 typedef sint32 Ifx_Lut_FxpAngle;
82
83 /** \brief Convert from float32 angle in radian into fixed-point angle type */
84 #define IFX_LUT_F32_TO_FXPANGLE(f) ((Ifx_Lut_FxpAngle)(f / IFX_PI * IFX_LUT_ANGLE_PI))
85
86 /** \brief Convert from fixed-point angle type to float32 angle in radian */
87 #define IFX_LUT_FXPANGLE_TO_F32(fx) ((float32)fx * IFX_PI / IFX_LUT_ANGLE_PI)
88
89 //________________________________________________________________________________________
90 #if (1U << IFX_LUT_ANGLE_BITS) != IFX_LUT_ANGLE_RESOLUTION
91 #error (1U << IFX_LUT_ANGLE_BITS) != IFX_LUT_ANGLE_RESOLUTION
92 #endif
93 //________________________________________________________________________________________
94 #endif /* IFX_LUT_H */
IfxCpu_Intrinsics.h
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:81


iLLD_TC26B: Ifx_LutAtan2F32.c Source File

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Ifx_LutAtan2F32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutAtan2F32.c
3 * \brief ATAN2 lookup functions with fixed-point angle data type
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42 #include "Ifx_LutAtan2F32.h"
43
44 #include <math.h>
45
46 void Ifx_LutAtan2F32_init(void)
47 {
48 #if IFX_LUT_TABLE_CONST == 0
49 { /* generate arctan table */
50 sint32 k;
51 float32 Step, value;
52 Step = (double)IFX_LUT_ATAN_LIMIT_LOW / IFX_LUT_ATAN_SIZE_LOW;
53
54 for (k = 0; k < IFX_LUTATAN2F32_SIZE; k++)
55 {
56 Ifx_g_LutAtan2F32_FxpAngle_table[k] = IFX_LUT_F32_TO_FXPANGLE(atanf(k / Step));
57 }
58 }
59 #endif
60 }
61
62
63 IFX_INLINE Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAnglePrivate(float32 valf)
64 {
65 uint32 vali;
66 valf = IFX_LUTATAN2F32_SIZE * valf;
67 vali = (uint32)valf;
68
69 if ((valf - (float32)vali) > 0.5)
70 { /* Round to nearest */
71 vali++;
72 }
73
74 return Ifx_g_LutAtan2F32_FxpAngle_table[vali];
75 }
76
77
78 IFX_INLINE float32 Ifx_LutAtan2F32_float32Private(float32 val)
79 { /* FIXME round to nearest ?? */
80 return Ifx_g_LutAtan2F32_table[(int)(val * IFX_LUTATAN2F32_SIZE)];
81 }
82
83
84 Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAngle(float32 x, float32 y)
85 {
86 Ifx_Lut_FxpAngle angle;
87 float32 fx = (float32)x;
88 float32 fy = (float32)y;
89
90 if (y < 0)
91 {
92 if (x < 0)
93 {
94 if (-y < -x)
95 { // 180 .. 225 deg
96 angle = -IFX_LUT_ANGLE_PI + Ifx_LutAtan2F32_fxpAnglePrivate(-fy / -fx);
97 }
98 else
99 { // 225 .. 270 deg
100 angle = -(IFX_LUT_ANGLE_PI / 2) - Ifx_LutAtan2F32_fxpAnglePrivate(-fx / -fy);
101 }
102 }
103 else // x >= 0
104 {
105 if (-y < x)
106 { // 315 .. 360 deg
107 angle = -Ifx_LutAtan2F32_fxpAnglePrivate(-fy / fx); // ok
108 }
109 else
110 { // 225 .. 270 deg
111 angle = -(IFX_LUT_ANGLE_PI / 2) + Ifx_LutAtan2F32_fxpAnglePrivate(fx / -fy);
112 }
113 }
114 }
115 else // y >= 0
116 {
117 if (x < 0)
118 {
119 if (y < -x)
120 { // 135 .. 180 deg
121 angle = IFX_LUT_ANGLE_PI - Ifx_LutAtan2F32_fxpAnglePrivate(fy / -fx); // ok
122 }
123 else
124 { // 90 .. 135 deg
125 angle = (IFX_LUT_ANGLE_PI / 2) + Ifx_LutAtan2F32_fxpAnglePrivate(-fx / fy); // ok
126 }
127 }
128 else // x >= 0
129 {
130 if (y < x)
131 { // 0 .. 45 deg
132 angle = Ifx_LutAtan2F32_fxpAnglePrivate(fy / fx); // ok
133 }
134 else
135 { // 45 .. 90 deg
136 angle = (IFX_LUT_ANGLE_PI / 2) - Ifx_LutAtan2F32_fxpAnglePrivate(fx / fy); // ok
137 }
138 }
139 }
140
141 return angle & (IFX_LUT_ANGLE_RESOLUTION - 1);
142 }
143
144
145 float32 Ifx_LutAtan2F32_float32(float32 y, float32 x)
146 {
147 float32 angle;
148
149 if (y < 0)
150 {
151 if (x < 0)
152 {
153 if (-y < -x)
154 { // 180 .. 225 deg
155 angle = -IFX_PI + Ifx_LutAtan2F32_float32Private(-y / -x);
156 }
157 else
158 { // 225 .. 270 deg
159 angle = -(IFX_PI / 2) - Ifx_LutAtan2F32_float32Private(-x / -y);
160 }
161 }
162 else // x >= 0
163 {
164 if (-y < x)
165 { // 315 .. 360 deg
166 angle = -Ifx_LutAtan2F32_float32Private(-y / x); // ok
167 }
168 else
169 { // 225 .. 270 deg
170 angle = -(IFX_PI / 2) + Ifx_LutAtan2F32_float32Private(x / -y);
171 }
172 }
173 }
174 else // y >= 0
175 {
176 if (x < 0)
177 {
178 if (y < -x)
179 { // 135 .. 180 deg
180 angle = IFX_PI - Ifx_LutAtan2F32_float32Private(y / -x); // ok
181 }
182 else
183 { // 90 .. 135 deg
184 angle = (IFX_PI / 2) + Ifx_LutAtan2F32_float32Private(-x / y); // ok
185 }
186 }
187 else // x >= 0
188 {
189 if (y < x)
190 { // 0 .. 45 deg
191 angle = Ifx_LutAtan2F32_float32Private(y / x); // ok
192 }
193 else
194 { // 45 .. 90 deg
195 angle = (IFX_PI / 2) - Ifx_LutAtan2F32_float32Private(x / y); // ok
196 }
197 }
198 }
199
200 return angle;
201 }
IFX_LUTATAN2F32_SIZE
#define IFX_LUTATAN2F32_SIZE
size of Ifx_LutAtan2F32 table
Definition: Ifx_LutAtan2F32.h:52
IFX_LUT_ANGLE_PI
#define IFX_LUT_ANGLE_PI
Value used as 180 degree angle.
Definition: Ifx_Lut.h:75
Ifx_g_LutAtan2F32_FxpAngle_table
IFX_EXTERN IFX_LUT_TABLE Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[IFX_LUTATAN2F32_SIZE+1]
Table I for Ifx_LutAtan2F32_fxpAngle()
Definition: Ifx_LutAtan2F32.h:57
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_g_LutAtan2F32_table
IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE+1]
Definition: Ifx_LutAtan2F32.h:58
float32
float float32
Definition: Platform_Types.h:170
Ifx_LutAtan2F32_float32
float32 Ifx_LutAtan2F32_float32(float32 y, float32 x)
Definition: Ifx_LutAtan2F32.c:145
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:217
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_LutAtan2F32_float32Private
IFX_INLINE float32 Ifx_LutAtan2F32_float32Private(float32 val)
Definition: Ifx_LutAtan2F32.c:78
Ifx_LutAtan2F32.h
Floating point signal, vector, and matrix library.
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:81
IFX_LUT_F32_TO_FXPANGLE
#define IFX_LUT_F32_TO_FXPANGLE(f)
Convert from float32 angle in radian into fixed-point angle type.
Definition: Ifx_Lut.h:84
IFX_LUT_ANGLE_RESOLUTION
#define IFX_LUT_ANGLE_RESOLUTION
Define the cosinus and sinus table size.
Definition: Ifx_Lut.h:72
Ifx_LutAtan2F32_fxpAnglePrivate
IFX_INLINE Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAnglePrivate(float32 valf)
Definition: Ifx_LutAtan2F32.c:63
Ifx_LutAtan2F32_init
void Ifx_LutAtan2F32_init(void)
Initialise the lookup tables.
Definition: Ifx_LutAtan2F32.c:46
Ifx_LutAtan2F32_fxpAngle
Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAngle(float32 x, float32 y)
Look-up arcus tangent value of y/x.
Definition: Ifx_LutAtan2F32.c:84


iLLD_TC26B: Ifx_LutAtan2F32.h Source File

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Ifx_LutAtan2F32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutAtan2F32.h
3 * \brief Floating point signal, vector, and matrix library
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup library_srvsw_sysse_math_lut_atan2 ATAN lookup table
42 * \ingroup library_srvsw_sysse_math_f32_lut
43 */
44
45 #ifndef IFX_LUTATAN2F32_H
46 #define IFX_LUTATAN2F32_H
47 //----------------------------------------------------------------------------------------
48 #include "Ifx_Lut.h"
49
50 //----------------------------------------------------------------------------------------
51
52 #define IFX_LUTATAN2F32_SIZE (1024) /**< \brief size of Ifx_LutAtan2F32 table */
53
54 //----------------------------------------------------------------------------------------
55
56 /** \brief Table I for Ifx_LutAtan2F32_fxpAngle() */
57 IFX_EXTERN IFX_LUT_TABLE Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[IFX_LUTATAN2F32_SIZE + 1];
58 IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE + 1];
59
60 /** \brief Initialise the lookup tables
61 * \ingroup library_srvsw_sysse_math_lut_atan2
62 */
63 IFX_EXTERN void Ifx_LutAtan2F32_init(void);
64
65 /**
66 * \brief Look-up arcus tangent value of y/x.
67 * \return fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
68 * \ingroup library_srvsw_sysse_math_lut_atan2
69 */
70 IFX_EXTERN Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAngle(float32 x, float32 y);
71 IFX_EXTERN float32 Ifx_LutAtan2F32_float32(float32 y, float32 x);
72
73 #endif
IFX_LUTATAN2F32_SIZE
#define IFX_LUTATAN2F32_SIZE
size of Ifx_LutAtan2F32 table
Definition: Ifx_LutAtan2F32.h:52
Ifx_LutAtan2F32_float32
IFX_EXTERN float32 Ifx_LutAtan2F32_float32(float32 y, float32 x)
Definition: Ifx_LutAtan2F32.c:145
Ifx_Lut.h
Lookup defintion with fixed-point angle data type.
Ifx_g_LutAtan2F32_FxpAngle_table
IFX_EXTERN IFX_LUT_TABLE Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[IFX_LUTATAN2F32_SIZE+1]
Table I for Ifx_LutAtan2F32_fxpAngle()
Definition: Ifx_LutAtan2F32.h:57
IFX_LUT_TABLE
#define IFX_LUT_TABLE
Lookup table type modifier (stored in ROM)
Definition: Ifx_Lut.h:62
Ifx_g_LutAtan2F32_table
IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE+1]
Definition: Ifx_LutAtan2F32.h:58
float32
float float32
Definition: Platform_Types.h:170
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:81
Ifx_LutAtan2F32_init
IFX_EXTERN void Ifx_LutAtan2F32_init(void)
Initialise the lookup tables.
Definition: Ifx_LutAtan2F32.c:46
Ifx_LutAtan2F32_fxpAngle
IFX_EXTERN Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAngle(float32 x, float32 y)
Look-up arcus tangent value of y/x.
Definition: Ifx_LutAtan2F32.c:84


iLLD_TC26B: Ifx_LutAtan2F32_Table.c Source File

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Ifx_LutAtan2F32_Table.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutAtan2F32_Table.c
3 * \brief Table data for ATAN2 lookup functions
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "Ifx_LutAtan2F32.h"
44
45 #if IFX_LUT_TABLE_CONST == 0
46 /* FIXME Table size and type not consistent */
47 sint16 Ifx_g_LutAtan2F32_FxpAngle_table[IFX_LUTATAN2F32_SIZE];
48 #else
49
50 #if (IFX_LUTATAN2F32_SIZE != 1024)
51 #error "Inconsistent between Lookup Table and configuration. Please regenerate."
52 #endif
53
54 const Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[1024 + 1] = {
55 IFX_LUT_F32_TO_FXPANGLE(0),
56 IFX_LUT_F32_TO_FXPANGLE(0.000976562189559319),
57 IFX_LUT_F32_TO_FXPANGLE(0.00195312251647882),
58 IFX_LUT_F32_TO_FXPANGLE(0.00292967911813999),
59 IFX_LUT_F32_TO_FXPANGLE(0.00390623013196697),
60 IFX_LUT_F32_TO_FXPANGLE(0.00488277369544783),
61 IFX_LUT_F32_TO_FXPANGLE(0.00585930794615589),
62 IFX_LUT_F32_TO_FXPANGLE(0.00683583102177106),
63 IFX_LUT_F32_TO_FXPANGLE(0.00781234106010111),
64 IFX_LUT_F32_TO_FXPANGLE(0.008788836199103),
65 IFX_LUT_F32_TO_FXPANGLE(0.00976531457690415),
66 IFX_LUT_F32_TO_FXPANGLE(0.0107417743318238),
67 IFX_LUT_F32_TO_FXPANGLE(0.0117182136023941),
68 IFX_LUT_F32_TO_FXPANGLE(0.0126946305273818),
69 IFX_LUT_F32_TO_FXPANGLE(0.0136710232458091),
70 IFX_LUT_F32_TO_FXPANGLE(0.014647389896975),
71 IFX_LUT_F32_TO_FXPANGLE(0.0156237286204768),
72 IFX_LUT_F32_TO_FXPANGLE(0.0166000375562313),
73 IFX_LUT_F32_TO_FXPANGLE(0.0175763148444956),
74 IFX_LUT_F32_TO_FXPANGLE(0.018552558625889),
75 IFX_LUT_F32_TO_FXPANGLE(0.0195287670414137),
76 IFX_LUT_F32_TO_FXPANGLE(0.0205049382324764),
77 IFX_LUT_F32_TO_FXPANGLE(0.0214810703409091),
78 IFX_LUT_F32_TO_FXPANGLE(0.0224571615089906),
79 IFX_LUT_F32_TO_FXPANGLE(0.0234332098794676),
80 IFX_LUT_F32_TO_FXPANGLE(0.0244092135955758),
81 IFX_LUT_F32_TO_FXPANGLE(0.0253851708010611),
82 IFX_LUT_F32_TO_FXPANGLE(0.0263610796402008),
83 IFX_LUT_F32_TO_FXPANGLE(0.0273369382578244),
84 IFX_LUT_F32_TO_FXPANGLE(0.0283127447993352),
85 IFX_LUT_F32_TO_FXPANGLE(0.029288497410731),
86 IFX_LUT_F32_TO_FXPANGLE(0.0302641942386252),
87 IFX_LUT_F32_TO_FXPANGLE(0.0312398334302683),
88 IFX_LUT_F32_TO_FXPANGLE(0.0322154131335681),
89 IFX_LUT_F32_TO_FXPANGLE(0.0331909314971116),
90 IFX_LUT_F32_TO_FXPANGLE(0.0341663866701854),
91 IFX_LUT_F32_TO_FXPANGLE(0.0351417768027968),
92 IFX_LUT_F32_TO_FXPANGLE(0.036117100045695),
93 IFX_LUT_F32_TO_FXPANGLE(0.0370923545503918),
94 IFX_LUT_F32_TO_FXPANGLE(0.0380675384691825),
95 IFX_LUT_F32_TO_FXPANGLE(0.039042649955167),
96 IFX_LUT_F32_TO_FXPANGLE(0.0400176871622703),
97 IFX_LUT_F32_TO_FXPANGLE(0.0409926482452638),
98 IFX_LUT_F32_TO_FXPANGLE(0.0419675313597857),
99 IFX_LUT_F32_TO_FXPANGLE(0.0429423346623622),
100 IFX_LUT_F32_TO_FXPANGLE(0.0439170563104278),
101 IFX_LUT_F32_TO_FXPANGLE(0.0448916944623465),
102 IFX_LUT_F32_TO_FXPANGLE(0.0458662472774322),
103 IFX_LUT_F32_TO_FXPANGLE(0.0468407129159697),
104 IFX_LUT_F32_TO_FXPANGLE(0.0478150895392348),
105 IFX_LUT_F32_TO_FXPANGLE(0.0487893753095156),
106 IFX_LUT_F32_TO_FXPANGLE(0.0497635683901328),
107 IFX_LUT_F32_TO_FXPANGLE(0.0507376669454602),
108 IFX_LUT_F32_TO_FXPANGLE(0.0517116691409454),
109 IFX_LUT_F32_TO_FXPANGLE(0.05268557314313),
110 IFX_LUT_F32_TO_FXPANGLE(0.0536593771196708),
111 IFX_LUT_F32_TO_FXPANGLE(0.0546330792393595),
112 IFX_LUT_F32_TO_FXPANGLE(0.0556066776721433),
113 IFX_LUT_F32_TO_FXPANGLE(0.0565801705891457),
114 IFX_LUT_F32_TO_FXPANGLE(0.0575535561626864),
115 IFX_LUT_F32_TO_FXPANGLE(0.0585268325663018),
116 IFX_LUT_F32_TO_FXPANGLE(0.0594999979747652),
117 IFX_LUT_F32_TO_FXPANGLE(0.0604730505641073),
118 IFX_LUT_F32_TO_FXPANGLE(0.0614459885116361),
119 IFX_LUT_F32_TO_FXPANGLE(0.0624188099959574),
120 IFX_LUT_F32_TO_FXPANGLE(0.0633915131969944),
121 IFX_LUT_F32_TO_FXPANGLE(0.0643640962960086),
122 IFX_LUT_F32_TO_FXPANGLE(0.0653365574756192),
123 IFX_LUT_F32_TO_FXPANGLE(0.0663088949198235),
124 IFX_LUT_F32_TO_FXPANGLE(0.0672811068140167),
125 IFX_LUT_F32_TO_FXPANGLE(0.068253191345012),
126 IFX_LUT_F32_TO_FXPANGLE(0.0692251467010603),
127 IFX_LUT_F32_TO_FXPANGLE(0.0701969710718705),
128 IFX_LUT_F32_TO_FXPANGLE(0.0711686626486288),
129 IFX_LUT_F32_TO_FXPANGLE(0.0721402196240188),
130 IFX_LUT_F32_TO_FXPANGLE(0.0731116401922413),
131 IFX_LUT_F32_TO_FXPANGLE(0.0740829225490337),
132 IFX_LUT_F32_TO_FXPANGLE(0.0750540648916902),
133 IFX_LUT_F32_TO_FXPANGLE(0.0760250654190807),
134 IFX_LUT_F32_TO_FXPANGLE(0.0769959223316711),
135 IFX_LUT_F32_TO_FXPANGLE(0.0779666338315423),
136 IFX_LUT_F32_TO_FXPANGLE(0.07893719812241),
137 IFX_LUT_F32_TO_FXPANGLE(0.0799076134096439),
138 IFX_LUT_F32_TO_FXPANGLE(0.0808778779002873),
139 IFX_LUT_F32_TO_FXPANGLE(0.0818479898030765),
140 IFX_LUT_F32_TO_FXPANGLE(0.0828179473284599),
141 IFX_LUT_F32_TO_FXPANGLE(0.0837877486886171),
142 IFX_LUT_F32_TO_FXPANGLE(0.0847573920974787),
143 IFX_LUT_F32_TO_FXPANGLE(0.0857268757707448),
144 IFX_LUT_F32_TO_FXPANGLE(0.0866961979259047),
145 IFX_LUT_F32_TO_FXPANGLE(0.0876653567822554),
146 IFX_LUT_F32_TO_FXPANGLE(0.0886343505609211),
147 IFX_LUT_F32_TO_FXPANGLE(0.0896031774848717),
148 IFX_LUT_F32_TO_FXPANGLE(0.0905718357789422),
149 IFX_LUT_F32_TO_FXPANGLE(0.0915403236698511),
150 IFX_LUT_F32_TO_FXPANGLE(0.0925086393862194),
151 IFX_LUT_F32_TO_FXPANGLE(0.0934767811585895),
152 IFX_LUT_F32_TO_FXPANGLE(0.0944447472194436),
153 IFX_LUT_F32_TO_FXPANGLE(0.0954125358032227),
154 IFX_LUT_F32_TO_FXPANGLE(0.0963801451463448),
155 IFX_LUT_F32_TO_FXPANGLE(0.0973475734872237),
156 IFX_LUT_F32_TO_FXPANGLE(0.0983148190662873),
157 IFX_LUT_F32_TO_FXPANGLE(0.0992818801259964),
158 IFX_LUT_F32_TO_FXPANGLE(0.100248754910863),
159 IFX_LUT_F32_TO_FXPANGLE(0.101215441667467),
160 IFX_LUT_F32_TO_FXPANGLE(0.102181938644477),
161 IFX_LUT_F32_TO_FXPANGLE(0.103148244092669),
162 IFX_LUT_F32_TO_FXPANGLE(0.10411435626494),
163 IFX_LUT_F32_TO_FXPANGLE(0.10508027341633),
164 IFX_LUT_F32_TO_FXPANGLE(0.106045993804039),
165 IFX_LUT_F32_TO_FXPANGLE(0.107011515687447),
166 IFX_LUT_F32_TO_FXPANGLE(0.107976837328126),
167 IFX_LUT_F32_TO_FXPANGLE(0.108941956989866),
168 IFX_LUT_F32_TO_FXPANGLE(0.109906872938685),
169 IFX_LUT_F32_TO_FXPANGLE(0.110871583442852),
170 IFX_LUT_F32_TO_FXPANGLE(0.111836086772904),
171 IFX_LUT_F32_TO_FXPANGLE(0.112800381201659),
172 IFX_LUT_F32_TO_FXPANGLE(0.113764465004242),
173 IFX_LUT_F32_TO_FXPANGLE(0.114728336458092),
174 IFX_LUT_F32_TO_FXPANGLE(0.115691993842991),
175 IFX_LUT_F32_TO_FXPANGLE(0.116655435441069),
176 IFX_LUT_F32_TO_FXPANGLE(0.117618659536834),
177 IFX_LUT_F32_TO_FXPANGLE(0.118581664417177),
178 IFX_LUT_F32_TO_FXPANGLE(0.1195444483714),
179 IFX_LUT_F32_TO_FXPANGLE(0.120507009691225),
180 IFX_LUT_F32_TO_FXPANGLE(0.121469346670814),
181 IFX_LUT_F32_TO_FXPANGLE(0.122431457606789),
182 IFX_LUT_F32_TO_FXPANGLE(0.123393340798243),
183 IFX_LUT_F32_TO_FXPANGLE(0.124354994546761),
184 IFX_LUT_F32_TO_FXPANGLE(0.125316417156437),
185 IFX_LUT_F32_TO_FXPANGLE(0.126277606933887),
186 IFX_LUT_F32_TO_FXPANGLE(0.127238562188269),
187 IFX_LUT_F32_TO_FXPANGLE(0.128199281231298),
188 IFX_LUT_F32_TO_FXPANGLE(0.129159762377265),
189 IFX_LUT_F32_TO_FXPANGLE(0.130120003943049),
190 IFX_LUT_F32_TO_FXPANGLE(0.131080004248137),
191 IFX_LUT_F32_TO_FXPANGLE(0.132039761614639),
192 IFX_LUT_F32_TO_FXPANGLE(0.132999274367304),
193 IFX_LUT_F32_TO_FXPANGLE(0.133958540833537),
194 IFX_LUT_F32_TO_FXPANGLE(0.134917559343415),
195 IFX_LUT_F32_TO_FXPANGLE(0.135876328229701),
196 IFX_LUT_F32_TO_FXPANGLE(0.136834845827863),
197 IFX_LUT_F32_TO_FXPANGLE(0.137793110476088),
198 IFX_LUT_F32_TO_FXPANGLE(0.138751120515297),
199 IFX_LUT_F32_TO_FXPANGLE(0.139708874289164),
200 IFX_LUT_F32_TO_FXPANGLE(0.140666370144127),
201 IFX_LUT_F32_TO_FXPANGLE(0.14162360642941),
202 IFX_LUT_F32_TO_FXPANGLE(0.14258058149703),
203 IFX_LUT_F32_TO_FXPANGLE(0.143537293701821),
204 IFX_LUT_F32_TO_FXPANGLE(0.144493741401443),
205 IFX_LUT_F32_TO_FXPANGLE(0.145449922956401),
206 IFX_LUT_F32_TO_FXPANGLE(0.146405836730058),
207 IFX_LUT_F32_TO_FXPANGLE(0.147361481088652),
208 IFX_LUT_F32_TO_FXPANGLE(0.148316854401309),
209 IFX_LUT_F32_TO_FXPANGLE(0.14927195504006),
210 IFX_LUT_F32_TO_FXPANGLE(0.150226781379856),
211 IFX_LUT_F32_TO_FXPANGLE(0.15118133179858),
212 IFX_LUT_F32_TO_FXPANGLE(0.152135604677064),
213 IFX_LUT_F32_TO_FXPANGLE(0.153089598399105),
214 IFX_LUT_F32_TO_FXPANGLE(0.154043311351475),
215 IFX_LUT_F32_TO_FXPANGLE(0.154996741923941),
216 IFX_LUT_F32_TO_FXPANGLE(0.155949888509276),
217 IFX_LUT_F32_TO_FXPANGLE(0.156902749503275),
218 IFX_LUT_F32_TO_FXPANGLE(0.157855323304766),
219 IFX_LUT_F32_TO_FXPANGLE(0.158807608315631),
220 IFX_LUT_F32_TO_FXPANGLE(0.159759602940813),
221 IFX_LUT_F32_TO_FXPANGLE(0.160711305588332),
222 IFX_LUT_F32_TO_FXPANGLE(0.161662714669305),
223 IFX_LUT_F32_TO_FXPANGLE(0.162613828597949),
224 IFX_LUT_F32_TO_FXPANGLE(0.163564645791604),
225 IFX_LUT_F32_TO_FXPANGLE(0.164515164670743),
226 IFX_LUT_F32_TO_FXPANGLE(0.165465383658987),
227 IFX_LUT_F32_TO_FXPANGLE(0.166415301183115),
228 IFX_LUT_F32_TO_FXPANGLE(0.167364915673083),
229 IFX_LUT_F32_TO_FXPANGLE(0.168314225562034),
230 IFX_LUT_F32_TO_FXPANGLE(0.169263229286312),
231 IFX_LUT_F32_TO_FXPANGLE(0.170211925285474),
232 IFX_LUT_F32_TO_FXPANGLE(0.171160312002307),
233 IFX_LUT_F32_TO_FXPANGLE(0.172108387882836),
234 IFX_LUT_F32_TO_FXPANGLE(0.17305615137634),
235 IFX_LUT_F32_TO_FXPANGLE(0.174003600935368),
236 IFX_LUT_F32_TO_FXPANGLE(0.174950735015743),
237 IFX_LUT_F32_TO_FXPANGLE(0.175897552076585),
238 IFX_LUT_F32_TO_FXPANGLE(0.176844050580316),
239 IFX_LUT_F32_TO_FXPANGLE(0.177790228992676),
240 IFX_LUT_F32_TO_FXPANGLE(0.178736085782736),
241 IFX_LUT_F32_TO_FXPANGLE(0.179681619422909),
242 IFX_LUT_F32_TO_FXPANGLE(0.180626828388963),
243 IFX_LUT_F32_TO_FXPANGLE(0.181571711160032),
244 IFX_LUT_F32_TO_FXPANGLE(0.182516266218631),
245 IFX_LUT_F32_TO_FXPANGLE(0.183460492050666),
246 IFX_LUT_F32_TO_FXPANGLE(0.184404387145446),
247 IFX_LUT_F32_TO_FXPANGLE(0.185347949995695),
248 IFX_LUT_F32_TO_FXPANGLE(0.186291179097566),
249 IFX_LUT_F32_TO_FXPANGLE(0.187234072950649),
250 IFX_LUT_F32_TO_FXPANGLE(0.188176630057987),
251 IFX_LUT_F32_TO_FXPANGLE(0.189118848926084),
252 IFX_LUT_F32_TO_FXPANGLE(0.190060728064918),
253 IFX_LUT_F32_TO_FXPANGLE(0.191002265987953),
254 IFX_LUT_F32_TO_FXPANGLE(0.191943461212149),
255 IFX_LUT_F32_TO_FXPANGLE(0.192884312257975),
256 IFX_LUT_F32_TO_FXPANGLE(0.193824817649417),
257 IFX_LUT_F32_TO_FXPANGLE(0.194764975913995),
258 IFX_LUT_F32_TO_FXPANGLE(0.195704785582767),
259 IFX_LUT_F32_TO_FXPANGLE(0.196644245190345),
260 IFX_LUT_F32_TO_FXPANGLE(0.197583353274903),
261 IFX_LUT_F32_TO_FXPANGLE(0.19852210837819),
262 IFX_LUT_F32_TO_FXPANGLE(0.199460509045539),
263 IFX_LUT_F32_TO_FXPANGLE(0.200398553825879),
264 IFX_LUT_F32_TO_FXPANGLE(0.201336241271742),
265 IFX_LUT_F32_TO_FXPANGLE(0.202273569939279),
266 IFX_LUT_F32_TO_FXPANGLE(0.203210538388266),
267 IFX_LUT_F32_TO_FXPANGLE(0.204147145182117),
268 IFX_LUT_F32_TO_FXPANGLE(0.205083388887891),
269 IFX_LUT_F32_TO_FXPANGLE(0.206019268076305),
270 IFX_LUT_F32_TO_FXPANGLE(0.206954781321742),
271 IFX_LUT_F32_TO_FXPANGLE(0.207889927202263),
272 IFX_LUT_F32_TO_FXPANGLE(0.208824704299615),
273 IFX_LUT_F32_TO_FXPANGLE(0.209759111199241),
274 IFX_LUT_F32_TO_FXPANGLE(0.210693146490291),
275 IFX_LUT_F32_TO_FXPANGLE(0.21162680876563),
276 IFX_LUT_F32_TO_FXPANGLE(0.212560096621847),
277 IFX_LUT_F32_TO_FXPANGLE(0.213493008659266),
278 IFX_LUT_F32_TO_FXPANGLE(0.214425543481956),
279 IFX_LUT_F32_TO_FXPANGLE(0.215357699697738),
280 IFX_LUT_F32_TO_FXPANGLE(0.216289475918194),
281 IFX_LUT_F32_TO_FXPANGLE(0.217220870758679),
282 IFX_LUT_F32_TO_FXPANGLE(0.218151882838326),
283 IFX_LUT_F32_TO_FXPANGLE(0.219082510780058),
284 IFX_LUT_F32_TO_FXPANGLE(0.220012753210596),
285 IFX_LUT_F32_TO_FXPANGLE(0.220942608760466),
286 IFX_LUT_F32_TO_FXPANGLE(0.22187207606401),
287 IFX_LUT_F32_TO_FXPANGLE(0.222801153759395),
288 IFX_LUT_F32_TO_FXPANGLE(0.223729840488615),
289 IFX_LUT_F32_TO_FXPANGLE(0.22465813489751),
290 IFX_LUT_F32_TO_FXPANGLE(0.225586035635764),
291 IFX_LUT_F32_TO_FXPANGLE(0.22651354135692),
292 IFX_LUT_F32_TO_FXPANGLE(0.227440650718385),
293 IFX_LUT_F32_TO_FXPANGLE(0.228367362381439),
294 IFX_LUT_F32_TO_FXPANGLE(0.229293675011242),
295 IFX_LUT_F32_TO_FXPANGLE(0.230219587276844),
296 IFX_LUT_F32_TO_FXPANGLE(0.231145097851188),
297 IFX_LUT_F32_TO_FXPANGLE(0.232070205411125),
298 IFX_LUT_F32_TO_FXPANGLE(0.232994908637414),
299 IFX_LUT_F32_TO_FXPANGLE(0.233919206214733),
300 IFX_LUT_F32_TO_FXPANGLE(0.234843096831689),
301 IFX_LUT_F32_TO_FXPANGLE(0.23576657918082),
302 IFX_LUT_F32_TO_FXPANGLE(0.236689651958605),
303 IFX_LUT_F32_TO_FXPANGLE(0.237612313865471),
304 IFX_LUT_F32_TO_FXPANGLE(0.238534563605801),
305 IFX_LUT_F32_TO_FXPANGLE(0.239456399887938),
306 IFX_LUT_F32_TO_FXPANGLE(0.240377821424194),
307 IFX_LUT_F32_TO_FXPANGLE(0.241298826930859),
308 IFX_LUT_F32_TO_FXPANGLE(0.242219415128201),
309 IFX_LUT_F32_TO_FXPANGLE(0.24313958474048),
310 IFX_LUT_F32_TO_FXPANGLE(0.244059334495949),
311 IFX_LUT_F32_TO_FXPANGLE(0.244978663126864),
312 IFX_LUT_F32_TO_FXPANGLE(0.24589756936949),
313 IFX_LUT_F32_TO_FXPANGLE(0.246816051964103),
314 IFX_LUT_F32_TO_FXPANGLE(0.247734109655002),
315 IFX_LUT_F32_TO_FXPANGLE(0.248651741190513),
316 IFX_LUT_F32_TO_FXPANGLE(0.249568945322993),
317 IFX_LUT_F32_TO_FXPANGLE(0.250485720808836),
318 IFX_LUT_F32_TO_FXPANGLE(0.251402066408485),
319 IFX_LUT_F32_TO_FXPANGLE(0.252317980886427),
320 IFX_LUT_F32_TO_FXPANGLE(0.25323346301121),
321 IFX_LUT_F32_TO_FXPANGLE(0.254148511555439),
322 IFX_LUT_F32_TO_FXPANGLE(0.25506312529579),
323 IFX_LUT_F32_TO_FXPANGLE(0.255977303013006),
324 IFX_LUT_F32_TO_FXPANGLE(0.25689104349191),
325 IFX_LUT_F32_TO_FXPANGLE(0.25780434552141),
326 IFX_LUT_F32_TO_FXPANGLE(0.258717207894497),
327 IFX_LUT_F32_TO_FXPANGLE(0.259629629408258),
328 IFX_LUT_F32_TO_FXPANGLE(0.260541608863876),
329 IFX_LUT_F32_TO_FXPANGLE(0.261453145066638),
330 IFX_LUT_F32_TO_FXPANGLE(0.262364236825938),
331 IFX_LUT_F32_TO_FXPANGLE(0.263274882955282),
332 IFX_LUT_F32_TO_FXPANGLE(0.264185082272293),
333 IFX_LUT_F32_TO_FXPANGLE(0.265094833598715),
334 IFX_LUT_F32_TO_FXPANGLE(0.266004135760417),
335 IFX_LUT_F32_TO_FXPANGLE(0.2669129875874),
336 IFX_LUT_F32_TO_FXPANGLE(0.267821387913799),
337 IFX_LUT_F32_TO_FXPANGLE(0.268729335577886),
338 IFX_LUT_F32_TO_FXPANGLE(0.269636829422078),
339 IFX_LUT_F32_TO_FXPANGLE(0.270543868292937),
340 IFX_LUT_F32_TO_FXPANGLE(0.271450451041176),
341 IFX_LUT_F32_TO_FXPANGLE(0.272356576521665),
342 IFX_LUT_F32_TO_FXPANGLE(0.27326224359343),
343 IFX_LUT_F32_TO_FXPANGLE(0.274167451119659),
344 IFX_LUT_F32_TO_FXPANGLE(0.275072197967707),
345 IFX_LUT_F32_TO_FXPANGLE(0.275976483009098),
346 IFX_LUT_F32_TO_FXPANGLE(0.27688030511953),
347 IFX_LUT_F32_TO_FXPANGLE(0.277783663178873),
348 IFX_LUT_F32_TO_FXPANGLE(0.278686556071182),
349 IFX_LUT_F32_TO_FXPANGLE(0.27958898268469),
350 IFX_LUT_F32_TO_FXPANGLE(0.280490941911819),
351 IFX_LUT_F32_TO_FXPANGLE(0.281392432649178),
352 IFX_LUT_F32_TO_FXPANGLE(0.282293453797569),
353 IFX_LUT_F32_TO_FXPANGLE(0.283194004261987),
354 IFX_LUT_F32_TO_FXPANGLE(0.284094082951627),
355 IFX_LUT_F32_TO_FXPANGLE(0.284993688779881),
356 IFX_LUT_F32_TO_FXPANGLE(0.285892820664347),
357 IFX_LUT_F32_TO_FXPANGLE(0.286791477526827),
358 IFX_LUT_F32_TO_FXPANGLE(0.28768965829333),
359 IFX_LUT_F32_TO_FXPANGLE(0.288587361894077),
360 IFX_LUT_F32_TO_FXPANGLE(0.289484587263501),
361 IFX_LUT_F32_TO_FXPANGLE(0.29038133334025),
362 IFX_LUT_F32_TO_FXPANGLE(0.291277599067188),
363 IFX_LUT_F32_TO_FXPANGLE(0.292173383391399),
364 IFX_LUT_F32_TO_FXPANGLE(0.293068685264188),
365 IFX_LUT_F32_TO_FXPANGLE(0.293963503641084),
366 IFX_LUT_F32_TO_FXPANGLE(0.294857837481838),
367 IFX_LUT_F32_TO_FXPANGLE(0.295751685750432),
368 IFX_LUT_F32_TO_FXPANGLE(0.296645047415071),
369 IFX_LUT_F32_TO_FXPANGLE(0.297537921448196),
370 IFX_LUT_F32_TO_FXPANGLE(0.298430306826474),
371 IFX_LUT_F32_TO_FXPANGLE(0.299322202530807),
372 IFX_LUT_F32_TO_FXPANGLE(0.300213607546333),
373 IFX_LUT_F32_TO_FXPANGLE(0.301104520862424),
374 IFX_LUT_F32_TO_FXPANGLE(0.301994941472688),
375 IFX_LUT_F32_TO_FXPANGLE(0.302884868374971),
376 IFX_LUT_F32_TO_FXPANGLE(0.303774300571361),
377 IFX_LUT_F32_TO_FXPANGLE(0.304663237068183),
378 IFX_LUT_F32_TO_FXPANGLE(0.305551676876003),
379 IFX_LUT_F32_TO_FXPANGLE(0.30643961900963),
380 IFX_LUT_F32_TO_FXPANGLE(0.307327062488116),
381 IFX_LUT_F32_TO_FXPANGLE(0.308214006334753),
382 IFX_LUT_F32_TO_FXPANGLE(0.309100449577082),
383 IFX_LUT_F32_TO_FXPANGLE(0.309986391246883),
384 IFX_LUT_F32_TO_FXPANGLE(0.310871830380185),
385 IFX_LUT_F32_TO_FXPANGLE(0.31175676601726),
386 IFX_LUT_F32_TO_FXPANGLE(0.312641197202625),
387 IFX_LUT_F32_TO_FXPANGLE(0.313525122985044),
388 IFX_LUT_F32_TO_FXPANGLE(0.314408542417527),
389 IFX_LUT_F32_TO_FXPANGLE(0.31529145455733),
390 IFX_LUT_F32_TO_FXPANGLE(0.316173858465954),
391 IFX_LUT_F32_TO_FXPANGLE(0.317055753209147),
392 IFX_LUT_F32_TO_FXPANGLE(0.317937137856902),
393 IFX_LUT_F32_TO_FXPANGLE(0.318818011483458),
394 IFX_LUT_F32_TO_FXPANGLE(0.3196983731673),
395 IFX_LUT_F32_TO_FXPANGLE(0.320578221991157),
396 IFX_LUT_F32_TO_FXPANGLE(0.321457557042003),
397 IFX_LUT_F32_TO_FXPANGLE(0.322336377411056),
398 IFX_LUT_F32_TO_FXPANGLE(0.323214682193777),
399 IFX_LUT_F32_TO_FXPANGLE(0.324092470489872),
400 IFX_LUT_F32_TO_FXPANGLE(0.324969741403286),
401 IFX_LUT_F32_TO_FXPANGLE(0.325846494042208),
402 IFX_LUT_F32_TO_FXPANGLE(0.326722727519067),
403 IFX_LUT_F32_TO_FXPANGLE(0.327598440950531),
404 IFX_LUT_F32_TO_FXPANGLE(0.328473633457506),
405 IFX_LUT_F32_TO_FXPANGLE(0.329348304165139),
406 IFX_LUT_F32_TO_FXPANGLE(0.330222452202808),
407 IFX_LUT_F32_TO_FXPANGLE(0.331096076704132),
408 IFX_LUT_F32_TO_FXPANGLE(0.33196917680696),
409 IFX_LUT_F32_TO_FXPANGLE(0.332841751653376),
410 IFX_LUT_F32_TO_FXPANGLE(0.333713800389694),
411 IFX_LUT_F32_TO_FXPANGLE(0.334585322166459),
412 IFX_LUT_F32_TO_FXPANGLE(0.335456316138443),
413 IFX_LUT_F32_TO_FXPANGLE(0.336326781464645),
414 IFX_LUT_F32_TO_FXPANGLE(0.33719671730829),
415 IFX_LUT_F32_TO_FXPANGLE(0.338066122836825),
416 IFX_LUT_F32_TO_FXPANGLE(0.338934997221921),
417 IFX_LUT_F32_TO_FXPANGLE(0.339803339639465),
418 IFX_LUT_F32_TO_FXPANGLE(0.340671149269565),
419 IFX_LUT_F32_TO_FXPANGLE(0.341538425296542),
420 IFX_LUT_F32_TO_FXPANGLE(0.342405166908932),
421 IFX_LUT_F32_TO_FXPANGLE(0.343271373299484),
422 IFX_LUT_F32_TO_FXPANGLE(0.344137043665154),
423 IFX_LUT_F32_TO_FXPANGLE(0.345002177207105),
424 IFX_LUT_F32_TO_FXPANGLE(0.345866773130707),
425 IFX_LUT_F32_TO_FXPANGLE(0.34673083064553),
426 IFX_LUT_F32_TO_FXPANGLE(0.347594348965346),
427 IFX_LUT_F32_TO_FXPANGLE(0.348457327308122),
428 IFX_LUT_F32_TO_FXPANGLE(0.349319764896022),
429 IFX_LUT_F32_TO_FXPANGLE(0.350181660955402),
430 IFX_LUT_F32_TO_FXPANGLE(0.351043014716805),
431 IFX_LUT_F32_TO_FXPANGLE(0.351903825414965),
432 IFX_LUT_F32_TO_FXPANGLE(0.352764092288795),
433 IFX_LUT_F32_TO_FXPANGLE(0.353623814581394),
434 IFX_LUT_F32_TO_FXPANGLE(0.354482991540035),
435 IFX_LUT_F32_TO_FXPANGLE(0.355341622416168),
436 IFX_LUT_F32_TO_FXPANGLE(0.356199706465416),
437 IFX_LUT_F32_TO_FXPANGLE(0.357057242947567),
438 IFX_LUT_F32_TO_FXPANGLE(0.35791423112658),
439 IFX_LUT_F32_TO_FXPANGLE(0.358770670270572),
440 IFX_LUT_F32_TO_FXPANGLE(0.359626559651822),
441 IFX_LUT_F32_TO_FXPANGLE(0.360481898546763),
442 IFX_LUT_F32_TO_FXPANGLE(0.361336686235982),
443 IFX_LUT_F32_TO_FXPANGLE(0.362190922004212),
444 IFX_LUT_F32_TO_FXPANGLE(0.363044605140335),
445 IFX_LUT_F32_TO_FXPANGLE(0.363897734937373),
446 IFX_LUT_F32_TO_FXPANGLE(0.364750310692485),
447 IFX_LUT_F32_TO_FXPANGLE(0.365602331706967),
448 IFX_LUT_F32_TO_FXPANGLE(0.366453797286243),
449 IFX_LUT_F32_TO_FXPANGLE(0.367304706739864),
450 IFX_LUT_F32_TO_FXPANGLE(0.368155059381507),
451 IFX_LUT_F32_TO_FXPANGLE(0.369004854528964),
452 IFX_LUT_F32_TO_FXPANGLE(0.369854091504145),
453 IFX_LUT_F32_TO_FXPANGLE(0.370702769633069),
454 IFX_LUT_F32_TO_FXPANGLE(0.371550888245862),
455 IFX_LUT_F32_TO_FXPANGLE(0.372398446676754),
456 IFX_LUT_F32_TO_FXPANGLE(0.373245444264073),
457 IFX_LUT_F32_TO_FXPANGLE(0.374091880350239),
458 IFX_LUT_F32_TO_FXPANGLE(0.374937754281765),
459 IFX_LUT_F32_TO_FXPANGLE(0.375783065409249),
460 IFX_LUT_F32_TO_FXPANGLE(0.376627813087368),
461 IFX_LUT_F32_TO_FXPANGLE(0.377471996674877),
462 IFX_LUT_F32_TO_FXPANGLE(0.378315615534604),
463 IFX_LUT_F32_TO_FXPANGLE(0.379158669033442),
464 IFX_LUT_F32_TO_FXPANGLE(0.380001156542349),
465 IFX_LUT_F32_TO_FXPANGLE(0.380843077436342),
466 IFX_LUT_F32_TO_FXPANGLE(0.381684431094488),
467 IFX_LUT_F32_TO_FXPANGLE(0.382525216899905),
468 IFX_LUT_F32_TO_FXPANGLE(0.383365434239755),
469 IFX_LUT_F32_TO_FXPANGLE(0.384205082505239),
470 IFX_LUT_F32_TO_FXPANGLE(0.385044161091591),
471 IFX_LUT_F32_TO_FXPANGLE(0.385882669398074),
472 IFX_LUT_F32_TO_FXPANGLE(0.386720606827975),
473 IFX_LUT_F32_TO_FXPANGLE(0.387557972788602),
474 IFX_LUT_F32_TO_FXPANGLE(0.388394766691274),
475 IFX_LUT_F32_TO_FXPANGLE(0.389230987951321),
476 IFX_LUT_F32_TO_FXPANGLE(0.390066635988073),
477 IFX_LUT_F32_TO_FXPANGLE(0.390901710224862),
478 IFX_LUT_F32_TO_FXPANGLE(0.39173621008901),
479 IFX_LUT_F32_TO_FXPANGLE(0.392570135011829),
480 IFX_LUT_F32_TO_FXPANGLE(0.393403484428609),
481 IFX_LUT_F32_TO_FXPANGLE(0.394236257778621),
482 IFX_LUT_F32_TO_FXPANGLE(0.395068454505103),
483 IFX_LUT_F32_TO_FXPANGLE(0.395900074055263),
484 IFX_LUT_F32_TO_FXPANGLE(0.396731115880264),
485 IFX_LUT_F32_TO_FXPANGLE(0.397561579435227),
486 IFX_LUT_F32_TO_FXPANGLE(0.39839146417922),
487 IFX_LUT_F32_TO_FXPANGLE(0.399220769575253),
488 IFX_LUT_F32_TO_FXPANGLE(0.400049495090274),
489 IFX_LUT_F32_TO_FXPANGLE(0.400877640195163),
490 IFX_LUT_F32_TO_FXPANGLE(0.401705204364725),
491 IFX_LUT_F32_TO_FXPANGLE(0.402532187077683),
492 IFX_LUT_F32_TO_FXPANGLE(0.403358587816674),
493 IFX_LUT_F32_TO_FXPANGLE(0.404184406068245),
494 IFX_LUT_F32_TO_FXPANGLE(0.405009641322841),
495 IFX_LUT_F32_TO_FXPANGLE(0.405834293074804),
496 IFX_LUT_F32_TO_FXPANGLE(0.406658360822366),
497 IFX_LUT_F32_TO_FXPANGLE(0.407481844067642),
498 IFX_LUT_F32_TO_FXPANGLE(0.408304742316622),
499 IFX_LUT_F32_TO_FXPANGLE(0.409127055079168),
500 IFX_LUT_F32_TO_FXPANGLE(0.409948781869008),
501 IFX_LUT_F32_TO_FXPANGLE(0.410769922203726),
502 IFX_LUT_F32_TO_FXPANGLE(0.411590475604759),
503 IFX_LUT_F32_TO_FXPANGLE(0.412410441597387),
504 IFX_LUT_F32_TO_FXPANGLE(0.413229819710733),
505 IFX_LUT_F32_TO_FXPANGLE(0.414048609477749),
506 IFX_LUT_F32_TO_FXPANGLE(0.414866810435215),
507 IFX_LUT_F32_TO_FXPANGLE(0.415684422123729),
508 IFX_LUT_F32_TO_FXPANGLE(0.416501444087703),
509 IFX_LUT_F32_TO_FXPANGLE(0.417317875875355),
510 IFX_LUT_F32_TO_FXPANGLE(0.418133717038701),
511 IFX_LUT_F32_TO_FXPANGLE(0.418948967133553),
512 IFX_LUT_F32_TO_FXPANGLE(0.419763625719506),
513 IFX_LUT_F32_TO_FXPANGLE(0.420577692359935),
514 IFX_LUT_F32_TO_FXPANGLE(0.42139116662199),
515 IFX_LUT_F32_TO_FXPANGLE(0.422204048076584),
516 IFX_LUT_F32_TO_FXPANGLE(0.423016336298389),
517 IFX_LUT_F32_TO_FXPANGLE(0.423828030865831),
518 IFX_LUT_F32_TO_FXPANGLE(0.42463913136108),
519 IFX_LUT_F32_TO_FXPANGLE(0.425449637370042),
520 IFX_LUT_F32_TO_FXPANGLE(0.426259548482358),
521 IFX_LUT_F32_TO_FXPANGLE(0.427068864291389),
522 IFX_LUT_F32_TO_FXPANGLE(0.427877584394215),
523 IFX_LUT_F32_TO_FXPANGLE(0.428685708391626),
524 IFX_LUT_F32_TO_FXPANGLE(0.429493235888114),
525 IFX_LUT_F32_TO_FXPANGLE(0.430300166491866),
526 IFX_LUT_F32_TO_FXPANGLE(0.431106499814758),
527 IFX_LUT_F32_TO_FXPANGLE(0.431912235472348),
528 IFX_LUT_F32_TO_FXPANGLE(0.432717373083866),
529 IFX_LUT_F32_TO_FXPANGLE(0.433521912272209),
530 IFX_LUT_F32_TO_FXPANGLE(0.434325852663933),
531 IFX_LUT_F32_TO_FXPANGLE(0.435129193889247),
532 IFX_LUT_F32_TO_FXPANGLE(0.435931935582003),
533 IFX_LUT_F32_TO_FXPANGLE(0.43673407737969),
534 IFX_LUT_F32_TO_FXPANGLE(0.437535618923428),
535 IFX_LUT_F32_TO_FXPANGLE(0.438336559857958),
536 IFX_LUT_F32_TO_FXPANGLE(0.439136899831635),
537 IFX_LUT_F32_TO_FXPANGLE(0.439936638496422),
538 IFX_LUT_F32_TO_FXPANGLE(0.440735775507881),
539 IFX_LUT_F32_TO_FXPANGLE(0.441534310525167),
540 IFX_LUT_F32_TO_FXPANGLE(0.442332243211017),
541 IFX_LUT_F32_TO_FXPANGLE(0.443129573231746),
542 IFX_LUT_F32_TO_FXPANGLE(0.443926300257239),
543 IFX_LUT_F32_TO_FXPANGLE(0.444722423960939),
544 IFX_LUT_F32_TO_FXPANGLE(0.445517944019847),
545 IFX_LUT_F32_TO_FXPANGLE(0.446312860114506),
546 IFX_LUT_F32_TO_FXPANGLE(0.447107171928999),
547 IFX_LUT_F32_TO_FXPANGLE(0.447900879150937),
548 IFX_LUT_F32_TO_FXPANGLE(0.448693981471457),
549 IFX_LUT_F32_TO_FXPANGLE(0.449486478585208),
550 IFX_LUT_F32_TO_FXPANGLE(0.450278370190345),
551 IFX_LUT_F32_TO_FXPANGLE(0.451069655988523),
552 IFX_LUT_F32_TO_FXPANGLE(0.451860335684889),
553 IFX_LUT_F32_TO_FXPANGLE(0.452650408988071),
554 IFX_LUT_F32_TO_FXPANGLE(0.453439875610172),
555 IFX_LUT_F32_TO_FXPANGLE(0.454228735266762),
556 IFX_LUT_F32_TO_FXPANGLE(0.455016987676872),
557 IFX_LUT_F32_TO_FXPANGLE(0.45580463256298),
558 IFX_LUT_F32_TO_FXPANGLE(0.456591669651011),
559 IFX_LUT_F32_TO_FXPANGLE(0.457378098670321),
560 IFX_LUT_F32_TO_FXPANGLE(0.458163919353695),
561 IFX_LUT_F32_TO_FXPANGLE(0.458949131437335),
562 IFX_LUT_F32_TO_FXPANGLE(0.459733734660856),
563 IFX_LUT_F32_TO_FXPANGLE(0.460517728767271),
564 IFX_LUT_F32_TO_FXPANGLE(0.461301113502991),
565 IFX_LUT_F32_TO_FXPANGLE(0.46208388861781),
566 IFX_LUT_F32_TO_FXPANGLE(0.462866053864901),
567 IFX_LUT_F32_TO_FXPANGLE(0.463647609000806),
568 IFX_LUT_F32_TO_FXPANGLE(0.464428553785428),
569 IFX_LUT_F32_TO_FXPANGLE(0.465208887982023),
570 IFX_LUT_F32_TO_FXPANGLE(0.46598861135719),
571 IFX_LUT_F32_TO_FXPANGLE(0.466767723680866),
572 IFX_LUT_F32_TO_FXPANGLE(0.467546224726316),
573 IFX_LUT_F32_TO_FXPANGLE(0.468324114270123),
574 IFX_LUT_F32_TO_FXPANGLE(0.46910139209218),
575 IFX_LUT_F32_TO_FXPANGLE(0.469878057975687),
576 IFX_LUT_F32_TO_FXPANGLE(0.470654111707133),
577 IFX_LUT_F32_TO_FXPANGLE(0.471429553076297),
578 IFX_LUT_F32_TO_FXPANGLE(0.472204381876234),
579 IFX_LUT_F32_TO_FXPANGLE(0.472978597903266),
580 IFX_LUT_F32_TO_FXPANGLE(0.473752200956977),
581 IFX_LUT_F32_TO_FXPANGLE(0.474525190840205),
582 IFX_LUT_F32_TO_FXPANGLE(0.475297567359028),
583 IFX_LUT_F32_TO_FXPANGLE(0.476069330322761),
584 IFX_LUT_F32_TO_FXPANGLE(0.476840479543945),
585 IFX_LUT_F32_TO_FXPANGLE(0.477611014838337),
586 IFX_LUT_F32_TO_FXPANGLE(0.478380936024907),
587 IFX_LUT_F32_TO_FXPANGLE(0.479150242925823),
588 IFX_LUT_F32_TO_FXPANGLE(0.479918935366444),
589 IFX_LUT_F32_TO_FXPANGLE(0.480687013175316),
590 IFX_LUT_F32_TO_FXPANGLE(0.481454476184158),
591 IFX_LUT_F32_TO_FXPANGLE(0.482221324227854),
592 IFX_LUT_F32_TO_FXPANGLE(0.482987557144447),
593 IFX_LUT_F32_TO_FXPANGLE(0.48375317477513),
594 IFX_LUT_F32_TO_FXPANGLE(0.484518176964233),
595 IFX_LUT_F32_TO_FXPANGLE(0.485282563559221),
596 IFX_LUT_F32_TO_FXPANGLE(0.48604633441068),
597 IFX_LUT_F32_TO_FXPANGLE(0.48680948937231),
598 IFX_LUT_F32_TO_FXPANGLE(0.487572028300918),
599 IFX_LUT_F32_TO_FXPANGLE(0.488333951056406),
600 IFX_LUT_F32_TO_FXPANGLE(0.489095257501764),
601 IFX_LUT_F32_TO_FXPANGLE(0.489855947503062),
602 IFX_LUT_F32_TO_FXPANGLE(0.490616020929441),
603 IFX_LUT_F32_TO_FXPANGLE(0.491375477653102),
604 IFX_LUT_F32_TO_FXPANGLE(0.4921343175493),
605 IFX_LUT_F32_TO_FXPANGLE(0.492892540496335),
606 IFX_LUT_F32_TO_FXPANGLE(0.49365014637554),
607 IFX_LUT_F32_TO_FXPANGLE(0.494407135071275),
608 IFX_LUT_F32_TO_FXPANGLE(0.49516350647092),
609 IFX_LUT_F32_TO_FXPANGLE(0.495919260464861),
610 IFX_LUT_F32_TO_FXPANGLE(0.496674396946486),
611 IFX_LUT_F32_TO_FXPANGLE(0.497428915812172),
612 IFX_LUT_F32_TO_FXPANGLE(0.498182816961281),
613 IFX_LUT_F32_TO_FXPANGLE(0.498936100296146),
614 IFX_LUT_F32_TO_FXPANGLE(0.499688765722065),
615 IFX_LUT_F32_TO_FXPANGLE(0.500440813147294),
616 IFX_LUT_F32_TO_FXPANGLE(0.501192242483033),
617 IFX_LUT_F32_TO_FXPANGLE(0.501943053643421),
618 IFX_LUT_F32_TO_FXPANGLE(0.502693246545526),
619 IFX_LUT_F32_TO_FXPANGLE(0.503442821109336),
620 IFX_LUT_F32_TO_FXPANGLE(0.504191777257751),
621 IFX_LUT_F32_TO_FXPANGLE(0.504940114916572),
622 IFX_LUT_F32_TO_FXPANGLE(0.505687834014494),
623 IFX_LUT_F32_TO_FXPANGLE(0.506434934483097),
624 IFX_LUT_F32_TO_FXPANGLE(0.507181416256835),
625 IFX_LUT_F32_TO_FXPANGLE(0.50792727927303),
626 IFX_LUT_F32_TO_FXPANGLE(0.508672523471861),
627 IFX_LUT_F32_TO_FXPANGLE(0.509417148796356),
628 IFX_LUT_F32_TO_FXPANGLE(0.510161155192383),
629 IFX_LUT_F32_TO_FXPANGLE(0.51090454260864),
630 IFX_LUT_F32_TO_FXPANGLE(0.511647310996647),
631 IFX_LUT_F32_TO_FXPANGLE(0.512389460310738),
632 IFX_LUT_F32_TO_FXPANGLE(0.513130990508049),
633 IFX_LUT_F32_TO_FXPANGLE(0.513871901548512),
634 IFX_LUT_F32_TO_FXPANGLE(0.514612193394845),
635 IFX_LUT_F32_TO_FXPANGLE(0.515351866012543),
636 IFX_LUT_F32_TO_FXPANGLE(0.51609091936987),
637 IFX_LUT_F32_TO_FXPANGLE(0.516829353437846),
638 IFX_LUT_F32_TO_FXPANGLE(0.517567168190245),
639 IFX_LUT_F32_TO_FXPANGLE(0.518304363603578),
640 IFX_LUT_F32_TO_FXPANGLE(0.519040939657092),
641 IFX_LUT_F32_TO_FXPANGLE(0.519776896332754),
642 IFX_LUT_F32_TO_FXPANGLE(0.520512233615247),
643 IFX_LUT_F32_TO_FXPANGLE(0.521246951491958),
644 IFX_LUT_F32_TO_FXPANGLE(0.521981049952972),
645 IFX_LUT_F32_TO_FXPANGLE(0.522714528991058),
646 IFX_LUT_F32_TO_FXPANGLE(0.523447388601666),
647 IFX_LUT_F32_TO_FXPANGLE(0.524179628782913),
648 IFX_LUT_F32_TO_FXPANGLE(0.524911249535579),
649 IFX_LUT_F32_TO_FXPANGLE(0.525642250863092),
650 IFX_LUT_F32_TO_FXPANGLE(0.526372632771524),
651 IFX_LUT_F32_TO_FXPANGLE(0.52710239526958),
652 IFX_LUT_F32_TO_FXPANGLE(0.527831538368588),
653 IFX_LUT_F32_TO_FXPANGLE(0.528560062082493),
654 IFX_LUT_F32_TO_FXPANGLE(0.529287966427846),
655 IFX_LUT_F32_TO_FXPANGLE(0.530015251423793),
656 IFX_LUT_F32_TO_FXPANGLE(0.530741917092071),
657 IFX_LUT_F32_TO_FXPANGLE(0.531467963456995),
658 IFX_LUT_F32_TO_FXPANGLE(0.53219339054545),
659 IFX_LUT_F32_TO_FXPANGLE(0.532918198386882),
660 IFX_LUT_F32_TO_FXPANGLE(0.533642387013291),
661 IFX_LUT_F32_TO_FXPANGLE(0.534365956459219),
662 IFX_LUT_F32_TO_FXPANGLE(0.535088906761743),
663 IFX_LUT_F32_TO_FXPANGLE(0.535811237960464),
664 IFX_LUT_F32_TO_FXPANGLE(0.5365329500975),
665 IFX_LUT_F32_TO_FXPANGLE(0.537254043217479),
666 IFX_LUT_F32_TO_FXPANGLE(0.537974517367523),
667 IFX_LUT_F32_TO_FXPANGLE(0.538694372597247),
668 IFX_LUT_F32_TO_FXPANGLE(0.539413608958744),
669 IFX_LUT_F32_TO_FXPANGLE(0.540132226506582),
670 IFX_LUT_F32_TO_FXPANGLE(0.540850225297788),
671 IFX_LUT_F32_TO_FXPANGLE(0.541567605391845),
672 IFX_LUT_F32_TO_FXPANGLE(0.542284366850679),
673 IFX_LUT_F32_TO_FXPANGLE(0.543000509738655),
674 IFX_LUT_F32_TO_FXPANGLE(0.54371603412256),
675 IFX_LUT_F32_TO_FXPANGLE(0.544430940071603),
676 IFX_LUT_F32_TO_FXPANGLE(0.545145227657401),
677 IFX_LUT_F32_TO_FXPANGLE(0.54585889695397),
678 IFX_LUT_F32_TO_FXPANGLE(0.546571948037719),
679 IFX_LUT_F32_TO_FXPANGLE(0.547284380987437),
680 IFX_LUT_F32_TO_FXPANGLE(0.547996195884288),
681 IFX_LUT_F32_TO_FXPANGLE(0.548707392811801),
682 IFX_LUT_F32_TO_FXPANGLE(0.549417971855859),
683 IFX_LUT_F32_TO_FXPANGLE(0.550127933104693),
684 IFX_LUT_F32_TO_FXPANGLE(0.55083727664887),
685 IFX_LUT_F32_TO_FXPANGLE(0.551546002581289),
686 IFX_LUT_F32_TO_FXPANGLE(0.552254110997165),
687 IFX_LUT_F32_TO_FXPANGLE(0.552961601994028),
688 IFX_LUT_F32_TO_FXPANGLE(0.553668475671709),
689 IFX_LUT_F32_TO_FXPANGLE(0.554374732132331),
690 IFX_LUT_F32_TO_FXPANGLE(0.555080371480305),
691 IFX_LUT_F32_TO_FXPANGLE(0.555785393822314),
692 IFX_LUT_F32_TO_FXPANGLE(0.55648979926731),
693 IFX_LUT_F32_TO_FXPANGLE(0.557193587926504),
694 IFX_LUT_F32_TO_FXPANGLE(0.557896759913355),
695 IFX_LUT_F32_TO_FXPANGLE(0.558599315343562),
696 IFX_LUT_F32_TO_FXPANGLE(0.559301254335059),
697 IFX_LUT_F32_TO_FXPANGLE(0.560002577007999),
698 IFX_LUT_F32_TO_FXPANGLE(0.560703283484751),
699 IFX_LUT_F32_TO_FXPANGLE(0.561403373889889),
700 IFX_LUT_F32_TO_FXPANGLE(0.562102848350186),
701 IFX_LUT_F32_TO_FXPANGLE(0.562801706994599),
702 IFX_LUT_F32_TO_FXPANGLE(0.563499949954267),
703 IFX_LUT_F32_TO_FXPANGLE(0.564197577362498),
704 IFX_LUT_F32_TO_FXPANGLE(0.564894589354762),
705 IFX_LUT_F32_TO_FXPANGLE(0.565590986068683),
706 IFX_LUT_F32_TO_FXPANGLE(0.566286767644028),
707 IFX_LUT_F32_TO_FXPANGLE(0.5669819342227),
708 IFX_LUT_F32_TO_FXPANGLE(0.56767648594873),
709 IFX_LUT_F32_TO_FXPANGLE(0.568370422968264),
710 IFX_LUT_F32_TO_FXPANGLE(0.569063745429561),
711 IFX_LUT_F32_TO_FXPANGLE(0.569756453482978),
712 IFX_LUT_F32_TO_FXPANGLE(0.570448547280968),
713 IFX_LUT_F32_TO_FXPANGLE(0.571140026978063),
714 IFX_LUT_F32_TO_FXPANGLE(0.571830892730873),
715 IFX_LUT_F32_TO_FXPANGLE(0.572521144698072),
716 IFX_LUT_F32_TO_FXPANGLE(0.573210783040395),
717 IFX_LUT_F32_TO_FXPANGLE(0.573899807920624),
718 IFX_LUT_F32_TO_FXPANGLE(0.57458821950358),
719 IFX_LUT_F32_TO_FXPANGLE(0.575276017956118),
720 IFX_LUT_F32_TO_FXPANGLE(0.575963203447116),
721 IFX_LUT_F32_TO_FXPANGLE(0.576649776147467),
722 IFX_LUT_F32_TO_FXPANGLE(0.577335736230069),
723 IFX_LUT_F32_TO_FXPANGLE(0.57802108386982),
724 IFX_LUT_F32_TO_FXPANGLE(0.578705819243603),
725 IFX_LUT_F32_TO_FXPANGLE(0.579389942530287),
726 IFX_LUT_F32_TO_FXPANGLE(0.580073453910708),
727 IFX_LUT_F32_TO_FXPANGLE(0.58075635356767),
728 IFX_LUT_F32_TO_FXPANGLE(0.58143864168593),
729 IFX_LUT_F32_TO_FXPANGLE(0.582120318452191),
730 IFX_LUT_F32_TO_FXPANGLE(0.582801384055095),
731 IFX_LUT_F32_TO_FXPANGLE(0.583481838685215),
732 IFX_LUT_F32_TO_FXPANGLE(0.584161682535044),
733 IFX_LUT_F32_TO_FXPANGLE(0.584840915798988),
734 IFX_LUT_F32_TO_FXPANGLE(0.585519538673358),
735 IFX_LUT_F32_TO_FXPANGLE(0.586197551356361),
736 IFX_LUT_F32_TO_FXPANGLE(0.586874954048091),
737 IFX_LUT_F32_TO_FXPANGLE(0.587551746950524),
738 IFX_LUT_F32_TO_FXPANGLE(0.588227930267504),
739 IFX_LUT_F32_TO_FXPANGLE(0.588903504204738),
740 IFX_LUT_F32_TO_FXPANGLE(0.58957846896979),
741 IFX_LUT_F32_TO_FXPANGLE(0.590252824772067),
742 IFX_LUT_F32_TO_FXPANGLE(0.590926571822816),
743 IFX_LUT_F32_TO_FXPANGLE(0.591599710335111),
744 IFX_LUT_F32_TO_FXPANGLE(0.592272240523851),
745 IFX_LUT_F32_TO_FXPANGLE(0.592944162605743),
746 IFX_LUT_F32_TO_FXPANGLE(0.593615476799303),
747 IFX_LUT_F32_TO_FXPANGLE(0.594286183324841),
748 IFX_LUT_F32_TO_FXPANGLE(0.594956282404456),
749 IFX_LUT_F32_TO_FXPANGLE(0.595625774262027),
750 IFX_LUT_F32_TO_FXPANGLE(0.596294659123204),
751 IFX_LUT_F32_TO_FXPANGLE(0.596962937215402),
752 IFX_LUT_F32_TO_FXPANGLE(0.597630608767789),
753 IFX_LUT_F32_TO_FXPANGLE(0.598297674011284),
754 IFX_LUT_F32_TO_FXPANGLE(0.598964133178543),
755 IFX_LUT_F32_TO_FXPANGLE(0.599629986503951),
756 IFX_LUT_F32_TO_FXPANGLE(0.600295234223621),
757 IFX_LUT_F32_TO_FXPANGLE(0.600959876575375),
758 IFX_LUT_F32_TO_FXPANGLE(0.601623913798746),
759 IFX_LUT_F32_TO_FXPANGLE(0.602287346134964),
760 IFX_LUT_F32_TO_FXPANGLE(0.60295017382695),
761 IFX_LUT_F32_TO_FXPANGLE(0.603612397119307),
762 IFX_LUT_F32_TO_FXPANGLE(0.604274016258314),
763 IFX_LUT_F32_TO_FXPANGLE(0.604935031491914),
764 IFX_LUT_F32_TO_FXPANGLE(0.605595443069711),
765 IFX_LUT_F32_TO_FXPANGLE(0.606255251242958),
766 IFX_LUT_F32_TO_FXPANGLE(0.606914456264552),
767 IFX_LUT_F32_TO_FXPANGLE(0.607573058389022),
768 IFX_LUT_F32_TO_FXPANGLE(0.608231057872528),
769 IFX_LUT_F32_TO_FXPANGLE(0.608888454972845),
770 IFX_LUT_F32_TO_FXPANGLE(0.609545249949361),
771 IFX_LUT_F32_TO_FXPANGLE(0.610201443063065),
772 IFX_LUT_F32_TO_FXPANGLE(0.610857034576544),
773 IFX_LUT_F32_TO_FXPANGLE(0.611512024753969),
774 IFX_LUT_F32_TO_FXPANGLE(0.612166413861094),
775 IFX_LUT_F32_TO_FXPANGLE(0.612820202165241),
776 IFX_LUT_F32_TO_FXPANGLE(0.613473389935299),
777 IFX_LUT_F32_TO_FXPANGLE(0.614125977441711),
778 IFX_LUT_F32_TO_FXPANGLE(0.614777964956469),
779 IFX_LUT_F32_TO_FXPANGLE(0.615429352753105),
780 IFX_LUT_F32_TO_FXPANGLE(0.616080141106684),
781 IFX_LUT_F32_TO_FXPANGLE(0.616730330293797),
782 IFX_LUT_F32_TO_FXPANGLE(0.617379920592551),
783 IFX_LUT_F32_TO_FXPANGLE(0.618028912282562),
784 IFX_LUT_F32_TO_FXPANGLE(0.61867730564495),
785 IFX_LUT_F32_TO_FXPANGLE(0.619325100962327),
786 IFX_LUT_F32_TO_FXPANGLE(0.619972298518794),
787 IFX_LUT_F32_TO_FXPANGLE(0.620618898599929),
788 IFX_LUT_F32_TO_FXPANGLE(0.621264901492783),
789 IFX_LUT_F32_TO_FXPANGLE(0.621910307485869),
790 IFX_LUT_F32_TO_FXPANGLE(0.622555116869157),
791 IFX_LUT_F32_TO_FXPANGLE(0.623199329934066),
792 IFX_LUT_F32_TO_FXPANGLE(0.623842946973455),
793 IFX_LUT_F32_TO_FXPANGLE(0.624485968281619),
794 IFX_LUT_F32_TO_FXPANGLE(0.625128394154276),
795 IFX_LUT_F32_TO_FXPANGLE(0.625770224888563),
796 IFX_LUT_F32_TO_FXPANGLE(0.626411460783031),
797 IFX_LUT_F32_TO_FXPANGLE(0.62705210213763),
798 IFX_LUT_F32_TO_FXPANGLE(0.627692149253711),
799 IFX_LUT_F32_TO_FXPANGLE(0.62833160243401),
800 IFX_LUT_F32_TO_FXPANGLE(0.628970461982645),
801 IFX_LUT_F32_TO_FXPANGLE(0.62960872820511),
802 IFX_LUT_F32_TO_FXPANGLE(0.630246401408263),
803 IFX_LUT_F32_TO_FXPANGLE(0.630883481900322),
804 IFX_LUT_F32_TO_FXPANGLE(0.631519969990857),
805 IFX_LUT_F32_TO_FXPANGLE(0.632155865990784),
806 IFX_LUT_F32_TO_FXPANGLE(0.632791170212352),
807 IFX_LUT_F32_TO_FXPANGLE(0.633425882969145),
808 IFX_LUT_F32_TO_FXPANGLE(0.634060004576065),
809 IFX_LUT_F32_TO_FXPANGLE(0.634693535349333),
810 IFX_LUT_F32_TO_FXPANGLE(0.635326475606475),
811 IFX_LUT_F32_TO_FXPANGLE(0.635958825666321),
812 IFX_LUT_F32_TO_FXPANGLE(0.636590585848993),
813 IFX_LUT_F32_TO_FXPANGLE(0.637221756475899),
814 IFX_LUT_F32_TO_FXPANGLE(0.637852337869727),
815 IFX_LUT_F32_TO_FXPANGLE(0.638482330354438),
816 IFX_LUT_F32_TO_FXPANGLE(0.639111734255255),
817 IFX_LUT_F32_TO_FXPANGLE(0.639740549898664),
818 IFX_LUT_F32_TO_FXPANGLE(0.640368777612397),
819 IFX_LUT_F32_TO_FXPANGLE(0.640996417725432),
820 IFX_LUT_F32_TO_FXPANGLE(0.641623470567984),
821 IFX_LUT_F32_TO_FXPANGLE(0.642249936471496),
822 IFX_LUT_F32_TO_FXPANGLE(0.642875815768636),
823 IFX_LUT_F32_TO_FXPANGLE(0.643501108793284),
824 IFX_LUT_F32_TO_FXPANGLE(0.644125815880533),
825 IFX_LUT_F32_TO_FXPANGLE(0.644749937366675),
826 IFX_LUT_F32_TO_FXPANGLE(0.645373473589196),
827 IFX_LUT_F32_TO_FXPANGLE(0.645996424886772),
828 IFX_LUT_F32_TO_FXPANGLE(0.646618791599258),
829 IFX_LUT_F32_TO_FXPANGLE(0.647240574067683),
830 IFX_LUT_F32_TO_FXPANGLE(0.647861772634245),
831 IFX_LUT_F32_TO_FXPANGLE(0.648482387642301),
832 IFX_LUT_F32_TO_FXPANGLE(0.649102419436359),
833 IFX_LUT_F32_TO_FXPANGLE(0.649721868362078),
834 IFX_LUT_F32_TO_FXPANGLE(0.650340734766252),
835 IFX_LUT_F32_TO_FXPANGLE(0.650959018996812),
836 IFX_LUT_F32_TO_FXPANGLE(0.651576721402813),
837 IFX_LUT_F32_TO_FXPANGLE(0.652193842334429),
838 IFX_LUT_F32_TO_FXPANGLE(0.652810382142948),
839 IFX_LUT_F32_TO_FXPANGLE(0.653426341180762),
840 IFX_LUT_F32_TO_FXPANGLE(0.654041719801364),
841 IFX_LUT_F32_TO_FXPANGLE(0.65465651835934),
842 IFX_LUT_F32_TO_FXPANGLE(0.655270737210358),
843 IFX_LUT_F32_TO_FXPANGLE(0.655884376711171),
844 IFX_LUT_F32_TO_FXPANGLE(0.656497437219599),
845 IFX_LUT_F32_TO_FXPANGLE(0.657109919094532),
846 IFX_LUT_F32_TO_FXPANGLE(0.657721822695918),
847 IFX_LUT_F32_TO_FXPANGLE(0.658333148384756),
848 IFX_LUT_F32_TO_FXPANGLE(0.658943896523094),
849 IFX_LUT_F32_TO_FXPANGLE(0.659554067474019),
850 IFX_LUT_F32_TO_FXPANGLE(0.660163661601649),
851 IFX_LUT_F32_TO_FXPANGLE(0.660772679271133),
852 IFX_LUT_F32_TO_FXPANGLE(0.661381120848635),
853 IFX_LUT_F32_TO_FXPANGLE(0.661988986701338),
854 IFX_LUT_F32_TO_FXPANGLE(0.662596277197427),
855 IFX_LUT_F32_TO_FXPANGLE(0.663202992706093),
856 IFX_LUT_F32_TO_FXPANGLE(0.663809133597518),
857 IFX_LUT_F32_TO_FXPANGLE(0.664414700242873),
858 IFX_LUT_F32_TO_FXPANGLE(0.665019693014312),
859 IFX_LUT_F32_TO_FXPANGLE(0.665624112284961),
860 IFX_LUT_F32_TO_FXPANGLE(0.666227958428919),
861 IFX_LUT_F32_TO_FXPANGLE(0.666831231821246),
862 IFX_LUT_F32_TO_FXPANGLE(0.667433932837957),
863 IFX_LUT_F32_TO_FXPANGLE(0.66803606185602),
864 IFX_LUT_F32_TO_FXPANGLE(0.668637619253345),
865 IFX_LUT_F32_TO_FXPANGLE(0.66923860540878),
866 IFX_LUT_F32_TO_FXPANGLE(0.669839020702103),
867 IFX_LUT_F32_TO_FXPANGLE(0.670438865514021),
868 IFX_LUT_F32_TO_FXPANGLE(0.671038140226157),
869 IFX_LUT_F32_TO_FXPANGLE(0.671636845221047),
870 IFX_LUT_F32_TO_FXPANGLE(0.672234980882134),
871 IFX_LUT_F32_TO_FXPANGLE(0.672832547593763),
872 IFX_LUT_F32_TO_FXPANGLE(0.673429545741172),
873 IFX_LUT_F32_TO_FXPANGLE(0.674025975710487),
874 IFX_LUT_F32_TO_FXPANGLE(0.674621837888718),
875 IFX_LUT_F32_TO_FXPANGLE(0.67521713266375),
876 IFX_LUT_F32_TO_FXPANGLE(0.675811860424338),
877 IFX_LUT_F32_TO_FXPANGLE(0.676406021560103),
878 IFX_LUT_F32_TO_FXPANGLE(0.676999616461522),
879 IFX_LUT_F32_TO_FXPANGLE(0.677592645519925),
880 IFX_LUT_F32_TO_FXPANGLE(0.678185109127489),
881 IFX_LUT_F32_TO_FXPANGLE(0.678777007677231),
882 IFX_LUT_F32_TO_FXPANGLE(0.679368341563002),
883 IFX_LUT_F32_TO_FXPANGLE(0.679959111179482),
884 IFX_LUT_F32_TO_FXPANGLE(0.680549316922172),
885 IFX_LUT_F32_TO_FXPANGLE(0.681138959187393),
886 IFX_LUT_F32_TO_FXPANGLE(0.681728038372273),
887 IFX_LUT_F32_TO_FXPANGLE(0.682316554874748),
888 IFX_LUT_F32_TO_FXPANGLE(0.682904509093552),
889 IFX_LUT_F32_TO_FXPANGLE(0.683491901428213),
890 IFX_LUT_F32_TO_FXPANGLE(0.684078732279046),
891 IFX_LUT_F32_TO_FXPANGLE(0.684665002047149),
892 IFX_LUT_F32_TO_FXPANGLE(0.685250711134394),
893 IFX_LUT_F32_TO_FXPANGLE(0.685835859943427),
894 IFX_LUT_F32_TO_FXPANGLE(0.686420448877654),
895 IFX_LUT_F32_TO_FXPANGLE(0.687004478341245),
896 IFX_LUT_F32_TO_FXPANGLE(0.68758794873912),
897 IFX_LUT_F32_TO_FXPANGLE(0.688170860476949),
898 IFX_LUT_F32_TO_FXPANGLE(0.688753213961141),
899 IFX_LUT_F32_TO_FXPANGLE(0.689335009598846),
900 IFX_LUT_F32_TO_FXPANGLE(0.689916247797941),
901 IFX_LUT_F32_TO_FXPANGLE(0.69049692896703),
902 IFX_LUT_F32_TO_FXPANGLE(0.691077053515437),
903 IFX_LUT_F32_TO_FXPANGLE(0.6916566218532),
904 IFX_LUT_F32_TO_FXPANGLE(0.692235634391065),
905 IFX_LUT_F32_TO_FXPANGLE(0.692814091540483),
906 IFX_LUT_F32_TO_FXPANGLE(0.693391993713601),
907 IFX_LUT_F32_TO_FXPANGLE(0.69396934132326),
908 IFX_LUT_F32_TO_FXPANGLE(0.694546134782985),
909 IFX_LUT_F32_TO_FXPANGLE(0.695122374506987),
910 IFX_LUT_F32_TO_FXPANGLE(0.695698060910148),
911 IFX_LUT_F32_TO_FXPANGLE(0.696273194408024),
912 IFX_LUT_F32_TO_FXPANGLE(0.696847775416835),
913 IFX_LUT_F32_TO_FXPANGLE(0.697421804353461),
914 IFX_LUT_F32_TO_FXPANGLE(0.697995281635439),
915 IFX_LUT_F32_TO_FXPANGLE(0.69856820768095),
916 IFX_LUT_F32_TO_FXPANGLE(0.699140582908824),
917 IFX_LUT_F32_TO_FXPANGLE(0.699712407738527),
918 IFX_LUT_F32_TO_FXPANGLE(0.70028368259016),
919 IFX_LUT_F32_TO_FXPANGLE(0.70085440788445),
920 IFX_LUT_F32_TO_FXPANGLE(0.70142458404275),
921 IFX_LUT_F32_TO_FXPANGLE(0.701994211487028),
922 IFX_LUT_F32_TO_FXPANGLE(0.702563290639866),
923 IFX_LUT_F32_TO_FXPANGLE(0.703131821924454),
924 IFX_LUT_F32_TO_FXPANGLE(0.703699805764582),
925 IFX_LUT_F32_TO_FXPANGLE(0.704267242584639),
926 IFX_LUT_F32_TO_FXPANGLE(0.704834132809605),
927 IFX_LUT_F32_TO_FXPANGLE(0.705400476865049),
928 IFX_LUT_F32_TO_FXPANGLE(0.705966275177119),
929 IFX_LUT_F32_TO_FXPANGLE(0.706531528172541),
930 IFX_LUT_F32_TO_FXPANGLE(0.707096236278612),
931 IFX_LUT_F32_TO_FXPANGLE(0.707660399923198),
932 IFX_LUT_F32_TO_FXPANGLE(0.708224019534724),
933 IFX_LUT_F32_TO_FXPANGLE(0.708787095542173),
934 IFX_LUT_F32_TO_FXPANGLE(0.70934962837508),
935 IFX_LUT_F32_TO_FXPANGLE(0.709911618463525),
936 IFX_LUT_F32_TO_FXPANGLE(0.710473066238132),
937 IFX_LUT_F32_TO_FXPANGLE(0.711033972130061),
938 IFX_LUT_F32_TO_FXPANGLE(0.711594336571003),
939 IFX_LUT_F32_TO_FXPANGLE(0.712154159993179),
940 IFX_LUT_F32_TO_FXPANGLE(0.712713442829328),
941 IFX_LUT_F32_TO_FXPANGLE(0.713272185512711),
942 IFX_LUT_F32_TO_FXPANGLE(0.713830388477098),
943 IFX_LUT_F32_TO_FXPANGLE(0.714388052156769),
944 IFX_LUT_F32_TO_FXPANGLE(0.714945176986506),
945 IFX_LUT_F32_TO_FXPANGLE(0.715501763401588),
946 IFX_LUT_F32_TO_FXPANGLE(0.71605781183779),
947 IFX_LUT_F32_TO_FXPANGLE(0.716613322731375),
948 IFX_LUT_F32_TO_FXPANGLE(0.717168296519088),
949 IFX_LUT_F32_TO_FXPANGLE(0.717722733638155),
950 IFX_LUT_F32_TO_FXPANGLE(0.718276634526277),
951 IFX_LUT_F32_TO_FXPANGLE(0.718829999621625),
952 IFX_LUT_F32_TO_FXPANGLE(0.719382829362832),
953 IFX_LUT_F32_TO_FXPANGLE(0.719935124188996),
954 IFX_LUT_F32_TO_FXPANGLE(0.720486884539668),
955 IFX_LUT_F32_TO_FXPANGLE(0.721038110854852),
956 IFX_LUT_F32_TO_FXPANGLE(0.721588803574998),
957 IFX_LUT_F32_TO_FXPANGLE(0.722138963140998),
958 IFX_LUT_F32_TO_FXPANGLE(0.722688589994184),
959 IFX_LUT_F32_TO_FXPANGLE(0.723237684576318),
960 IFX_LUT_F32_TO_FXPANGLE(0.723786247329592),
961 IFX_LUT_F32_TO_FXPANGLE(0.724334278696622),
962 IFX_LUT_F32_TO_FXPANGLE(0.724881779120445),
963 IFX_LUT_F32_TO_FXPANGLE(0.725428749044511),
964 IFX_LUT_F32_TO_FXPANGLE(0.725975188912682),
965 IFX_LUT_F32_TO_FXPANGLE(0.726521099169226),
966 IFX_LUT_F32_TO_FXPANGLE(0.727066480258813),
967 IFX_LUT_F32_TO_FXPANGLE(0.727611332626511),
968 IFX_LUT_F32_TO_FXPANGLE(0.72815565671778),
969 IFX_LUT_F32_TO_FXPANGLE(0.72869945297847),
970 IFX_LUT_F32_TO_FXPANGLE(0.729242721854815),
971 IFX_LUT_F32_TO_FXPANGLE(0.729785463793429),
972 IFX_LUT_F32_TO_FXPANGLE(0.730327679241302),
973 IFX_LUT_F32_TO_FXPANGLE(0.730869368645794),
974 IFX_LUT_F32_TO_FXPANGLE(0.731410532454635),
975 IFX_LUT_F32_TO_FXPANGLE(0.731951171115917),
976 IFX_LUT_F32_TO_FXPANGLE(0.732491285078088),
977 IFX_LUT_F32_TO_FXPANGLE(0.733030874789955),
978 IFX_LUT_F32_TO_FXPANGLE(0.733569940700672),
979 IFX_LUT_F32_TO_FXPANGLE(0.73410848325974),
980 IFX_LUT_F32_TO_FXPANGLE(0.734646502917002),
981 IFX_LUT_F32_TO_FXPANGLE(0.73518400012264),
982 IFX_LUT_F32_TO_FXPANGLE(0.735720975327167),
983 IFX_LUT_F32_TO_FXPANGLE(0.736257428981428),
984 IFX_LUT_F32_TO_FXPANGLE(0.736793361536592),
985 IFX_LUT_F32_TO_FXPANGLE(0.737328773444149),
986 IFX_LUT_F32_TO_FXPANGLE(0.737863665155908),
987 IFX_LUT_F32_TO_FXPANGLE(0.73839803712399),
988 IFX_LUT_F32_TO_FXPANGLE(0.738931889800823),
989 IFX_LUT_F32_TO_FXPANGLE(0.739465223639145),
990 IFX_LUT_F32_TO_FXPANGLE(0.73999803909199),
991 IFX_LUT_F32_TO_FXPANGLE(0.740530336612693),
992 IFX_LUT_F32_TO_FXPANGLE(0.741062116654879),
993 IFX_LUT_F32_TO_FXPANGLE(0.741593379672465),
994 IFX_LUT_F32_TO_FXPANGLE(0.74212412611965),
995 IFX_LUT_F32_TO_FXPANGLE(0.742654356450918),
996 IFX_LUT_F32_TO_FXPANGLE(0.743184071121027),
997 IFX_LUT_F32_TO_FXPANGLE(0.74371327058501),
998 IFX_LUT_F32_TO_FXPANGLE(0.74424195529817),
999 IFX_LUT_F32_TO_FXPANGLE(0.744770125716075),
1000 IFX_LUT_F32_TO_FXPANGLE(0.745297782294555),
1001 IFX_LUT_F32_TO_FXPANGLE(0.745824925489697),
1002 IFX_LUT_F32_TO_FXPANGLE(0.746351555757843),
1003 IFX_LUT_F32_TO_FXPANGLE(0.746877673555588),
1004 IFX_LUT_F32_TO_FXPANGLE(0.747403279339768),
1005 IFX_LUT_F32_TO_FXPANGLE(0.747928373567467),
1006 IFX_LUT_F32_TO_FXPANGLE(0.748452956696006),
1007 IFX_LUT_F32_TO_FXPANGLE(0.748977029182941),
1008 IFX_LUT_F32_TO_FXPANGLE(0.749500591486061),
1009 IFX_LUT_F32_TO_FXPANGLE(0.750023644063381),
1010 IFX_LUT_F32_TO_FXPANGLE(0.750546187373141),
1011 IFX_LUT_F32_TO_FXPANGLE(0.751068221873802),
1012 IFX_LUT_F32_TO_FXPANGLE(0.751589748024043),
1013 IFX_LUT_F32_TO_FXPANGLE(0.752110766282754),
1014 IFX_LUT_F32_TO_FXPANGLE(0.752631277109036),
1015 IFX_LUT_F32_TO_FXPANGLE(0.753151280962194),
1016 IFX_LUT_F32_TO_FXPANGLE(0.75367077830174),
1017 IFX_LUT_F32_TO_FXPANGLE(0.754189769587379),
1018 IFX_LUT_F32_TO_FXPANGLE(0.754708255279016),
1019 IFX_LUT_F32_TO_FXPANGLE(0.755226235836745),
1020 IFX_LUT_F32_TO_FXPANGLE(0.755743711720849),
1021 IFX_LUT_F32_TO_FXPANGLE(0.756260683391796),
1022 IFX_LUT_F32_TO_FXPANGLE(0.756777151310235),
1023 IFX_LUT_F32_TO_FXPANGLE(0.757293115936992),
1024 IFX_LUT_F32_TO_FXPANGLE(0.757808577733069),
1025 IFX_LUT_F32_TO_FXPANGLE(0.758323537159635),
1026 IFX_LUT_F32_TO_FXPANGLE(0.758837994678031),
1027 IFX_LUT_F32_TO_FXPANGLE(0.759351950749758),
1028 IFX_LUT_F32_TO_FXPANGLE(0.75986540583648),
1029 IFX_LUT_F32_TO_FXPANGLE(0.760378360400016),
1030 IFX_LUT_F32_TO_FXPANGLE(0.760890814902341),
1031 IFX_LUT_F32_TO_FXPANGLE(0.761402769805578),
1032 IFX_LUT_F32_TO_FXPANGLE(0.761914225571999),
1033 IFX_LUT_F32_TO_FXPANGLE(0.762425182664017),
1034 IFX_LUT_F32_TO_FXPANGLE(0.762935641544187),
1035 IFX_LUT_F32_TO_FXPANGLE(0.763445602675202),
1036 IFX_LUT_F32_TO_FXPANGLE(0.763955066519886),
1037 IFX_LUT_F32_TO_FXPANGLE(0.764464033541195),
1038 IFX_LUT_F32_TO_FXPANGLE(0.764972504202212),
1039 IFX_LUT_F32_TO_FXPANGLE(0.765480478966144),
1040 IFX_LUT_F32_TO_FXPANGLE(0.765987958296319),
1041 IFX_LUT_F32_TO_FXPANGLE(0.766494942656179),
1042 IFX_LUT_F32_TO_FXPANGLE(0.767001432509286),
1043 IFX_LUT_F32_TO_FXPANGLE(0.767507428319308),
1044 IFX_LUT_F32_TO_FXPANGLE(0.768012930550024),
1045 IFX_LUT_F32_TO_FXPANGLE(0.768517939665315),
1046 IFX_LUT_F32_TO_FXPANGLE(0.769022456129166),
1047 IFX_LUT_F32_TO_FXPANGLE(0.769526480405658),
1048 IFX_LUT_F32_TO_FXPANGLE(0.77003001295897),
1049 IFX_LUT_F32_TO_FXPANGLE(0.770533054253371),
1050 IFX_LUT_F32_TO_FXPANGLE(0.771035604753219),
1051 IFX_LUT_F32_TO_FXPANGLE(0.77153766492296),
1052 IFX_LUT_F32_TO_FXPANGLE(0.77203923522712),
1053 IFX_LUT_F32_TO_FXPANGLE(0.772540316130307),
1054 IFX_LUT_F32_TO_FXPANGLE(0.773040908097206),
1055 IFX_LUT_F32_TO_FXPANGLE(0.773541011592573),
1056 IFX_LUT_F32_TO_FXPANGLE(0.774040627081239),
1057 IFX_LUT_F32_TO_FXPANGLE(0.7745397550281),
1058 IFX_LUT_F32_TO_FXPANGLE(0.775038395898116),
1059 IFX_LUT_F32_TO_FXPANGLE(0.775536550156312),
1060 IFX_LUT_F32_TO_FXPANGLE(0.776034218267768),
1061 IFX_LUT_F32_TO_FXPANGLE(0.776531400697624),
1062 IFX_LUT_F32_TO_FXPANGLE(0.77702809791107),
1063 IFX_LUT_F32_TO_FXPANGLE(0.777524310373348),
1064 IFX_LUT_F32_TO_FXPANGLE(0.778020038549745),
1065 IFX_LUT_F32_TO_FXPANGLE(0.778515282905595),
1066 IFX_LUT_F32_TO_FXPANGLE(0.779010043906271),
1067 IFX_LUT_F32_TO_FXPANGLE(0.779504322017186),
1068 IFX_LUT_F32_TO_FXPANGLE(0.77999811770379),
1069 IFX_LUT_F32_TO_FXPANGLE(0.780491431431562),
1070 IFX_LUT_F32_TO_FXPANGLE(0.780984263666015),
1071 IFX_LUT_F32_TO_FXPANGLE(0.781476614872688),
1072 IFX_LUT_F32_TO_FXPANGLE(0.781968485517144),
1073 IFX_LUT_F32_TO_FXPANGLE(0.782459876064968),
1074 IFX_LUT_F32_TO_FXPANGLE(0.782950786981764),
1075 IFX_LUT_F32_TO_FXPANGLE(0.783441218733152),
1076 IFX_LUT_F32_TO_FXPANGLE(0.783931171784766),
1077 IFX_LUT_F32_TO_FXPANGLE(0.784420646602251),
1078 IFX_LUT_F32_TO_FXPANGLE(0.784909643651259),
1079 IFX_LUT_F32_TO_FXPANGLE(0.785398163397448),
1080 };
1081 #endif
1082
1083 const float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE + 1] =
1084 {0, 0.000976562189559319f, 0.00195312251647882f, 0.00292967911813999f, 0.00390623013196697f, 0.00488277369544783f, 0.00585930794615589f, 0.00683583102177106f, 0.00781234106010111f, 0.008788836199103f,
1085 0.00976531457690415f, 0.0107417743318238f, 0.0117182136023941f, 0.0126946305273818f, 0.0136710232458091f, 0.014647389896975f, 0.0156237286204768f, 0.0166000375562313f, 0.0175763148444956f,
1086 0.018552558625889f, 0.0195287670414137f, 0.0205049382324764f, 0.0214810703409091f, 0.0224571615089906f, 0.0234332098794676f, 0.0244092135955758f, 0.0253851708010611f, 0.0263610796402008f,
1087 0.0273369382578244f, 0.0283127447993352f, 0.029288497410731f, 0.0302641942386252f, 0.0312398334302683f, 0.0322154131335681f, 0.0331909314971116f, 0.0341663866701854f, 0.0351417768027968f,
1088 0.036117100045695f, 0.0370923545503918f, 0.0380675384691825f, 0.039042649955167f, 0.0400176871622703f, 0.0409926482452638f, 0.0419675313597857f, 0.0429423346623622f, 0.0439170563104278f,
1089 0.0448916944623465f, 0.0458662472774322f, 0.0468407129159697f, 0.0478150895392348f, 0.0487893753095156f, 0.0497635683901328f, 0.0507376669454602f, 0.0517116691409454f, 0.05268557314313f,
1090 0.0536593771196708f, 0.0546330792393595f, 0.0556066776721433f, 0.0565801705891457f, 0.0575535561626864f, 0.0585268325663018f, 0.0594999979747652f, 0.0604730505641073f, 0.0614459885116361f,
1091 0.0624188099959574f, 0.0633915131969944f, 0.0643640962960086f, 0.0653365574756192f, 0.0663088949198235f, 0.0672811068140167f, 0.068253191345012f, 0.0692251467010603f, 0.0701969710718705f,
1092 0.0711686626486288f, 0.0721402196240188f, 0.0731116401922413f, 0.0740829225490337f, 0.0750540648916902f, 0.0760250654190807f, 0.0769959223316711f, 0.0779666338315423f, 0.07893719812241f,
1093 0.0799076134096439f, 0.0808778779002873f, 0.0818479898030765f, 0.0828179473284599f, 0.0837877486886171f, 0.0847573920974787f, 0.0857268757707448f, 0.0866961979259047f, 0.0876653567822554f,
1094 0.0886343505609211f, 0.0896031774848717f, 0.0905718357789422f, 0.0915403236698511f, 0.0925086393862194f, 0.0934767811585895f, 0.0944447472194436f, 0.0954125358032227f, 0.0963801451463448f,
1095 0.0973475734872237f, 0.0983148190662873f, 0.0992818801259964f, 0.100248754910863f, 0.101215441667467f, 0.102181938644477f, 0.103148244092669f, 0.10411435626494f, 0.10508027341633f, 0.106045993804039f,
1096 0.107011515687447f, 0.107976837328126f, 0.108941956989866f, 0.109906872938685f, 0.110871583442852f, 0.111836086772904f, 0.112800381201659f, 0.113764465004242f, 0.114728336458092f, 0.115691993842991f,
1097 0.116655435441069f, 0.117618659536834f, 0.118581664417177f, 0.1195444483714f, 0.120507009691225f, 0.121469346670814f, 0.122431457606789f, 0.123393340798243f, 0.124354994546761f, 0.125316417156437f,
1098 0.126277606933887f, 0.127238562188269f, 0.128199281231298f, 0.129159762377265f, 0.130120003943049f, 0.131080004248137f, 0.132039761614639f, 0.132999274367304f, 0.133958540833537f, 0.134917559343415f,
1099 0.135876328229701f, 0.136834845827863f, 0.137793110476088f, 0.138751120515297f, 0.139708874289164f, 0.140666370144127f, 0.14162360642941f, 0.14258058149703f, 0.143537293701821f, 0.144493741401443f,
1100 0.145449922956401f, 0.146405836730058f, 0.147361481088652f, 0.148316854401309f, 0.14927195504006f, 0.150226781379856f, 0.15118133179858f, 0.152135604677064f, 0.153089598399105f, 0.154043311351475f,
1101 0.154996741923941f, 0.155949888509276f, 0.156902749503275f, 0.157855323304766f, 0.158807608315631f, 0.159759602940813f, 0.160711305588332f, 0.161662714669305f, 0.162613828597949f, 0.163564645791604f,
1102 0.164515164670743f, 0.165465383658987f, 0.166415301183115f, 0.167364915673083f, 0.168314225562034f, 0.169263229286312f, 0.170211925285474f, 0.171160312002307f, 0.172108387882836f, 0.17305615137634f,
1103 0.174003600935368f, 0.174950735015743f, 0.175897552076585f, 0.176844050580316f, 0.177790228992676f, 0.178736085782736f, 0.179681619422909f, 0.180626828388963f, 0.181571711160032f, 0.182516266218631f,
1104 0.183460492050666f, 0.184404387145446f, 0.185347949995695f, 0.186291179097566f, 0.187234072950649f, 0.188176630057987f, 0.189118848926084f, 0.190060728064918f, 0.191002265987953f, 0.191943461212149f,
1105 0.192884312257975f, 0.193824817649417f, 0.194764975913995f, 0.195704785582767f, 0.196644245190345f, 0.197583353274903f, 0.19852210837819f, 0.199460509045539f, 0.200398553825879f, 0.201336241271742f,
1106 0.202273569939279f, 0.203210538388266f, 0.204147145182117f, 0.205083388887891f, 0.206019268076305f, 0.206954781321742f, 0.207889927202263f, 0.208824704299615f, 0.209759111199241f, 0.210693146490291f,
1107 0.21162680876563f, 0.212560096621847f, 0.213493008659266f, 0.214425543481956f, 0.215357699697738f, 0.216289475918194f, 0.217220870758679f, 0.218151882838326f, 0.219082510780058f, 0.220012753210596f,
1108 0.220942608760466f, 0.22187207606401f, 0.222801153759395f, 0.223729840488615f, 0.22465813489751f, 0.225586035635764f, 0.22651354135692f, 0.227440650718385f, 0.228367362381439f, 0.229293675011242f,
1109 0.230219587276844f, 0.231145097851188f, 0.232070205411125f, 0.232994908637414f, 0.233919206214733f, 0.234843096831689f, 0.23576657918082f, 0.236689651958605f, 0.237612313865471f, 0.238534563605801f,
1110 0.239456399887938f, 0.240377821424194f, 0.241298826930859f, 0.242219415128201f, 0.24313958474048f, 0.244059334495949f, 0.244978663126864f, 0.24589756936949f, 0.246816051964103f, 0.247734109655002f,
1111 0.248651741190513f, 0.249568945322993f, 0.250485720808836f, 0.251402066408485f, 0.252317980886427f, 0.25323346301121f, 0.254148511555439f, 0.25506312529579f, 0.255977303013006f, 0.25689104349191f,
1112 0.25780434552141f, 0.258717207894497f, 0.259629629408258f, 0.260541608863876f, 0.261453145066638f, 0.262364236825938f, 0.263274882955282f, 0.264185082272293f, 0.265094833598715f, 0.266004135760417f,
1113 0.2669129875874f, 0.267821387913799f, 0.268729335577886f, 0.269636829422078f, 0.270543868292937f, 0.271450451041176f, 0.272356576521665f, 0.27326224359343f, 0.274167451119659f, 0.275072197967707f,
1114 0.275976483009098f, 0.27688030511953f, 0.277783663178873f, 0.278686556071182f, 0.27958898268469f, 0.280490941911819f, 0.281392432649178f, 0.282293453797569f, 0.283194004261987f, 0.284094082951627f,
1115 0.284993688779881f, 0.285892820664347f, 0.286791477526827f, 0.28768965829333f, 0.288587361894077f, 0.289484587263501f, 0.29038133334025f, 0.291277599067188f, 0.292173383391399f, 0.293068685264188f,
1116 0.293963503641084f, 0.294857837481838f, 0.295751685750432f, 0.296645047415071f, 0.297537921448196f, 0.298430306826474f, 0.299322202530807f, 0.300213607546333f, 0.301104520862424f, 0.301994941472688f,
1117 0.302884868374971f, 0.303774300571361f, 0.304663237068183f, 0.305551676876003f, 0.30643961900963f, 0.307327062488116f, 0.308214006334753f, 0.309100449577082f, 0.309986391246883f, 0.310871830380185f,
1118 0.31175676601726f, 0.312641197202625f, 0.313525122985044f, 0.314408542417527f, 0.31529145455733f, 0.316173858465954f, 0.317055753209147f, 0.317937137856902f, 0.318818011483458f, 0.3196983731673f,
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1177 0.731951171115917f, 0.732491285078088f, 0.733030874789955f, 0.733569940700672f, 0.73410848325974f, 0.734646502917002f, 0.73518400012264f, 0.735720975327167f, 0.736257428981428f, 0.736793361536592f,
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1179 0.742654356450918f, 0.743184071121027f, 0.74371327058501f, 0.74424195529817f, 0.744770125716075f, 0.745297782294555f, 0.745824925489697f, 0.746351555757843f, 0.746877673555588f, 0.747403279339768f,
1180 0.747928373567467f, 0.748452956696006f, 0.748977029182941f, 0.749500591486061f, 0.750023644063381f, 0.750546187373141f, 0.751068221873802f, 0.751589748024043f, 0.752110766282754f, 0.752631277109036f,
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1183 0.763445602675202f, 0.763955066519886f, 0.764464033541195f, 0.764972504202212f, 0.765480478966144f, 0.765987958296319f, 0.766494942656179f, 0.767001432509286f, 0.767507428319308f, 0.768012930550024f,
1184 0.768517939665315f, 0.769022456129166f, 0.769526480405658f, 0.77003001295897f, 0.770533054253371f, 0.771035604753219f, 0.77153766492296f, 0.77203923522712f, 0.772540316130307f, 0.773040908097206f,
1185 0.773541011592573f, 0.774040627081239f, 0.7745397550281f, 0.775038395898116f, 0.775536550156312f, 0.776034218267768f, 0.776531400697624f, 0.77702809791107f, 0.777524310373348f, 0.778020038549745f,
1186 0.778515282905595f, 0.779010043906271f, 0.779504322017186f, 0.77999811770379f, 0.780491431431562f, 0.780984263666015f, 0.781476614872688f, 0.781968485517144f, 0.782459876064968f, 0.782950786981764f,
1187 0.783441218733152f, 0.783931171784766f, 0.784420646602251f, 0.784909643651259f, 0.785398163397448f};
IFX_LUTATAN2F32_SIZE
#define IFX_LUTATAN2F32_SIZE
size of Ifx_LutAtan2F32 table
Definition: Ifx_LutAtan2F32.h:52
float32
float float32
Definition: Platform_Types.h:170
sint16
short sint16
Definition: Platform_Types.h:129
Ifx_g_LutAtan2F32_FxpAngle_table
const Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[1024+1]
Definition: Ifx_LutAtan2F32_Table.c:54
Ifx_LutAtan2F32.h
Floating point signal, vector, and matrix library.
Ifx_g_LutAtan2F32_table
const float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE+1]
Definition: Ifx_LutAtan2F32_Table.c:1083
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:81
IFX_LUT_F32_TO_FXPANGLE
#define IFX_LUT_F32_TO_FXPANGLE(f)
Convert from float32 angle in radian into fixed-point angle type.
Definition: Ifx_Lut.h:84


iLLD_TC26B: Ifx_LutIndexedLinearF32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LutIndexedLinearF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutIndexedLinearF32.h
3 * \brief Look-up functionality
4 *
5 *
6 *
7 * \version disabled
8 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 * \defgroup library_srvsw_sysse_math_f32_lut_indexedLinear Indexes look-up table (with linear interpolation)
43 * \ingroup library_srvsw_sysse_math_f32_lut
44 *
45 */
46
47 #ifndef IFX_LUTINDEXEDLINEARF32_H
48 #define IFX_LUTINDEXEDLINEARF32_H
49
50 //________________________________________________________________________________________
51 // INCLUDES
52 #include "Cpu/Std/Ifx_Types.h"
53
54 typedef struct
55 {
56 float32 gain; /**< \brief channel gain */
57 float32 offset; /**< \brief channel offset */
58 } Ifx_LutIndexedLinearF32_Item;
59
60 typedef struct
61 {
62 uint16 segmentCount;
63 sint8 shift;
64 const Ifx_LutIndexedLinearF32_Item *segments;
65 } Ifx_LutIndexedLinearF32;
66
67 //________________________________________________________________________________________
68 // FUNCTION PROTOTYPES
69
70 /** \addtogroup library_srvsw_sysse_math_f32_lut_indexedLinear
71 * \{ */
72 IFX_INLINE float32 Ifx_LutIndexedLinearF32_search(const Ifx_LutIndexedLinearF32 *ml, uint32 index);
73 /** \} */
74
75 //________________________________________________________________________________________
76 // INLINE FUNCTION IMPLEMENTATION
77
78 /** \brief Look-up table search
79 *
80 *
81 * \param ml pointer to the multi-segment object
82 * \param index
83 * \return interpolated value */
84 IFX_INLINE float32 Ifx_LutIndexedLinearF32_search(const Ifx_LutIndexedLinearF32 *ml, uint32 index)
85 {
86 uint32 i;
87 i = index >> ml->shift;
88
89 return (ml->segments[i].gain * index) + ml->segments[i].offset;
90 }
91
92
93 #endif /* IFX_LUTINDEXEDLINEARF32_H */
Ifx_LutIndexedLinearF32_Item::gain
float32 gain
channel gain
Definition: Ifx_LutIndexedLinearF32.h:56
Ifx_LutIndexedLinearF32
Definition: Ifx_LutIndexedLinearF32.h:60
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
Ifx_LutIndexedLinearF32_Item::offset
float32 offset
channel offset
Definition: Ifx_LutIndexedLinearF32.h:57
Ifx_LutIndexedLinearF32_search
IFX_INLINE float32 Ifx_LutIndexedLinearF32_search(const Ifx_LutIndexedLinearF32 *ml, uint32 index)
Look-up table search.
Definition: Ifx_LutIndexedLinearF32.h:84
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_LutIndexedLinearF32_Item
Definition: Ifx_LutIndexedLinearF32.h:54
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_LutIndexedLinearF32::segmentCount
uint16 segmentCount
Definition: Ifx_LutIndexedLinearF32.h:62
Ifx_LutIndexedLinearF32::segments
const Ifx_LutIndexedLinearF32_Item * segments
Definition: Ifx_LutIndexedLinearF32.h:64
sint8
signed char sint8
Definition: Platform_Types.h:125
Ifx_LutIndexedLinearF32::shift
sint8 shift
Definition: Ifx_LutIndexedLinearF32.h:63


iLLD_TC26B: Ifx_LutLSincosF32.c Source File

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  • CpuGeneric
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Ifx_LutLSincosF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutLSincosF32.c
3 * \brief Table data for linear interpolation Sin/Cos lookup functions
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * $Revision: 614 $
42 * $Date: 2013-03-04 14:09:48 +0100 (Mon, 04 Mar 2013) $
43 *
44 */
45
46 #include "Ifx_Lut.h"
47 #include "Ifx_LutIndexedLinearF32.h"
48
49 #if IFX_LUT_TABLE_CONST == 0
50 /* FIXME Table size not consistent */
51 IFX_LUT_TABLE float32 Ifx_g_LutLSincosF32_table[IFX_LUT_ANGLE_RESOLUTION + (IFX_LUT_ANGLE_RESOLUTION / 4)];
52 IFX_LUT_TABLE Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32;
53 #else
54
55 #if (IFX_LUT_ANGLE_RESOLUTION != 4096)
56 #error "Inconsistent between Lookup Table and configuration. Please regenerate."
57 #endif
58
59 /*lint -e915*/
60 #define IFX_F32_LUTL_SINCOS_ELEMENT_COUNT (128)
61
62 const Ifx_LutIndexedLinearF32_Item Ifx_g_LutLSincosF32_table[128] = {
63 {0.00153336482273181, 0 },
64 {0.00152967081256696, 0.000118208325275426},
65 {0.00152229169143129, 0.000590472077958315},
66 {0.00151124523627395, 0.00165093177306225 },
67 {0.00149655805897299, 0.00353089046758576 },
68 {0.00147826554222495, 0.00645769314727157 },
69 {0.00145641175430493, 0.010653620427916 },
70 {0.00143104934290218, 0.0163348005821319 },
71 {0.00140223940828726, 0.0237101438435514 },
72 {0.00137005135611611, 0.0329803028688421 },
73 {0.00133456273022575, 0.0443366631537574 },
74 {0.00129585902582439, 0.057960367103036 },
75 {0.00125403348352597, 0.074021375345628 },
76 {0.00120918686472538, 0.0926775687666757 },
77 {0.0011614272088554, 0.114073894596426 },
78 {0.00111086957311029, 0.138341559754081 },
79 {0.00105763575526286, 0.165597274491961 },
80 {0.00100185400024306, 0.195942549222735 },
81 {0.00094365869118462, 0.229463047240396 },
82 {0.000883190025684388, 0.266227995864537 },
83 {0.000820593678053965, 0.306289658348008 },
84 {0.000756020448377588, 0.349682868690533 },
85 {0.000689625899221512, 0.39642463129641 },
86 {0.000621569980870106, 0.446513787203045 },
87 {0.00055201664599169, 0.499930748389669 },
88 {0.000481133454662129, 0.556637301453318 },
89 {0.00040909117069797, 0.616576481711498 },
90 {0.000336063350271452, 0.67967251856001 },
91 {0.000262225923798456, 0.745830852679814 },
92 {0.000187756772106744, 0.814938225449723 },
93 {0.000112835297905487, 0.886862840682929 },
94 {3.76419935883623E-05, 0.961454598565517 },
95 {-3.76419935883623E-05, 1.03854540143448 },
96 {-0.000112835297905484, 1.11794953079336 },
97 {-0.000187756772106747, 1.19946409472434 },
98 {-0.000262225923798456, 1.28286954461905 },
99 {-0.000336063350271452, 1.36793025991594 },
100 {-0.00040909117069797, 1.45439519930094 },
101 {-0.000481133454662129, 1.54199861660136 },
102 {-0.00055201664599169, 1.63046083938065 },
103 {-0.000621569980870103, 1.71948910802502 },
104 {-0.000689625899221512, 1.80877847290207 },
105 {-0.000756020448377592, 1.89801274696784 },
106 {-0.000820593678053958, 1.98686551100252 },
107 {-0.000883190025684391, 2.07500116846617 },
108 {-0.00094365869118462, 2.1620760467865 },
109 {-0.00100185400024307, 2.24773954172053 },
110 {-0.00105763575526286, 2.3316353012703 },
111 {-0.00111086957311028, 2.41340244548394 },
112 {-0.00116142720885541, 2.4926768183323 },
113 {-0.00120918686472538, 2.56909226772425 },
114 {-0.00125403348352598, 2.64228194960683 },
115 {-0.00129585902582439, 2.71187965199138 },
116 {-0.00133456273022575, 2.77752113465609 },
117 {-0.00137005135611612, 2.83884548019465 },
118 {-0.00140223940828725, 2.89549645201585 },
119 {-0.00143104934290217, 2.94712385484579 },
120 {-0.00145641175430494, 2.99338489324442 },
121 {-0.00147826554222495, 3.03394552362397 },
122 {-0.00149655805897298, 3.06848179524426 },
123 {-0.00151124523627396, 3.09668117566214 },
124 {-0.00152229169143128, 3.11824385612922 },
125 {-0.00152967081256696, 3.13288403246242 },
126 {-0.00153336482273181, 3.14033115695474 },
127 {-0.00153336482273181, 3.14033115695474 },
128 {-0.00152967081256696, 3.13264761581187 },
129 {-0.00152229169143128, 3.11706291197331 },
130 {-0.00151124523627396, 3.09337931211601 },
131 {-0.00149655805897298, 3.06142001430908 },
132 {-0.00147826554222495, 3.02103013732942 },
133 {-0.00145641175430494, 2.9720776523886 },
134 {-0.00143104934290217, 2.91445425368152 },
135 {-0.00140223940828725, 2.84807616432874 },
136 {-0.00137005135611612, 2.77288487445697 },
137 {-0.00133456273022575, 2.68884780834857 },
138 {-0.00129585902582439, 2.59595891778531 },
139 {-0.00125403348352598, 2.49423919891558 },
140 {-0.00120918686472538, 2.38373713019089 },
141 {-0.00116142720885541, 2.26452902913946 },
142 {-0.00111086957311028, 2.13671932597577 },
143 {-0.00105763575526286, 2.00044075228637 },
144 {-0.00100185400024306, 1.85585444327504 },
145 {-0.000943658691184637, 1.70314995230575 },
146 {-0.000883190025684381, 1.54254517673707 },
147 {-0.000820593678053962, 1.3742861943065 },
148 {-0.000756020448377592, 1.19864700958678 },
149 {-0.000689625899221506, 1.01592921030923 },
150 {-0.000621569980870106, 0.826461533618933 },
151 {-0.000552016645991697, 0.630599342601331 },
152 {-0.000481133454662126, 0.428724013694713 },
153 {-0.000409091170697973, 0.221242235877955 },
154 {-0.000336063350271448, 0.00858522279591345 },
155 {-0.000262225923798456, -0.208792160740577 },
156 {-0.000187756772106751, -0.430412356175091 },
157 {-0.000112835297905484, -0.655776150572502 },
158 {-3.76419935883623E-05, -0.884363795696551 },
159 {3.76419935883623E-05, -1.11563620430345 },
160 {0.000112835297905484, -1.34903622090379 },
161 {0.000187756772106751, -1.58398996399897 },
162 {0.000262225923798452, -1.81990823655828 },
163 {0.000336063350271452, -2.05618800127188 },
164 {0.00040909117069797, -2.29221391689038 },
165 {0.000481133454662126, -2.52735993174939 },
166 {0.000552016645991697, -2.76099093037165 },
167 {0.000621569980870103, -2.99246442884699 },
168 {0.000689625899221509, -3.22113231450771 },
169 {0.000756020448377588, -3.44634262524513 },
170 {0.000820593678053962, -3.66744136365704 },
171 {0.000883190025684381, -3.88377434106776 },
172 {0.000943658691184637, -4.09468904633266 },
173 {0.00100185400024306, -4.29953653421829 },
174 {0.00105763575526286, -4.49767332804863 },
175 {0.00111086957311028, -4.6884633312138 },
176 {0.0011614272088554, -4.87127974206814 },
177 {0.0012091868647254, -5.04550696668189 },
178 {0.00125403348352597, -5.21054252386801 },
179 {0.00129585902582438, -5.36579893687972 },
180 {0.00133456273022575, -5.51070560615843 },
181 {0.00137005135611611, -5.64471065752041 },
182 {0.00140223940828725, -5.76728276018815 },
183 {0.0014310493429022, -5.87791290910954 },
184 {0.00145641175430492, -5.97611616606088 },
185 {0.00147826554222495, -6.06143335410066 },
186 {0.00149655805897298, -6.13343270002092 },
187 {0.00151124523627395, -6.19171141955115 },
188 {0.00152229169143131, -6.2358972401806 },
189 {0.00152967081256695, -6.2656498565995 },
190 {0.00153336482273181, -6.28066231390948 },
191 };
192
193 const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32 = {
194 .segmentCount = IFX_F32_LUTL_SINCOS_ELEMENT_COUNT,
195 .shift = 5,
196 .segments = Ifx_g_LutLSincosF32_table
197 };
198 #endif
Ifx_g_LutLSincosF32_table
const Ifx_LutIndexedLinearF32_Item Ifx_g_LutLSincosF32_table[128]
Definition: Ifx_LutLSincosF32.c:62
Ifx_Lut.h
Lookup defintion with fixed-point angle data type.
Ifx_LutIndexedLinearF32
Definition: Ifx_LutIndexedLinearF32.h:60
IFX_LUT_TABLE
#define IFX_LUT_TABLE
Lookup table type modifier (stored in ROM)
Definition: Ifx_Lut.h:62
float32
float float32
Definition: Platform_Types.h:170
Ifx_g_LutLSincosF32
const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32
Definition: Ifx_LutLSincosF32.c:193
IFX_F32_LUTL_SINCOS_ELEMENT_COUNT
#define IFX_F32_LUTL_SINCOS_ELEMENT_COUNT
Definition: Ifx_LutLSincosF32.c:60
Ifx_LutIndexedLinearF32_Item
Definition: Ifx_LutIndexedLinearF32.h:54
Ifx_LutIndexedLinearF32::segmentCount
uint16 segmentCount
Definition: Ifx_LutIndexedLinearF32.h:62
IFX_LUT_ANGLE_RESOLUTION
#define IFX_LUT_ANGLE_RESOLUTION
Define the cosinus and sinus table size.
Definition: Ifx_Lut.h:72
Ifx_LutIndexedLinearF32.h
Look-up functionality.


iLLD_TC26B: Ifx_LutLSincosF32.h Source File

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  • CpuGeneric
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Ifx_LutLSincosF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutLSincosF32.h
3 * \brief Sin/Cos linear approximated lookup functions with fixed-point angle data type
4 * \ingroup library_srvsw_sysse_math_lut_lsincos
5 *
6 *
7 *
8 * \version disabled
9 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
10 *
11 *
12 * IMPORTANT NOTICE
13 *
14 * Use of this file is subject to the terms of use agreed between (i) you or
15 * the company in which ordinary course of business you are acting and (ii)
16 * Infineon Technologies AG or its licensees. If and as long as no such terms
17 * of use are agreed, use of this file is subject to following:
18 *
19 * Boost Software License - Version 1.0 - August 17th, 2003
20 *
21 * Permission is hereby granted, free of charge, to any person or organization
22 * obtaining a copy of the software and accompanying documentation covered by
23 * this license (the "Software") to use, reproduce, display, distribute,
24 * execute, and transmit the Software, and to prepare derivative works of the
25 * Software, and to permit third-parties to whom the Software is furnished to
26 * do so, all subject to the following:
27 *
28 * The copyright notices in the Software and this entire statement, including
29 * the above license grant, this restriction and the following disclaimer, must
30 * be included in all copies of the Software, in whole or in part, and all
31 * derivative works of the Software, unless such copies or derivative works are
32 * solely in the form of machine-executable object code generated by a source
33 * language processor.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
36 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
37 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
38 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
39 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
40 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
41 * DEALINGS IN THE SOFTWARE.
42 *
43 * \defgroup library_srvsw_sysse_math_lut_lsincos Linear trigonometric Look-ups
44 * \ingroup library_srvsw_sysse_math_f32_lut
45 *
46 */
47
48 #ifndef IFX_LUTLSINCOSF32_H
49 #define IFX_LUTLSINCOSF32_H
50 //________________________________________________________________________________________
51
52 #include "SysSe/Math/IFX_Cf32.h"
53 #include "Ifx_Lut.h"
54 #include "Ifx_LutIndexedLinearF32.h"
55 //________________________________________________________________________________________
56
57 /**
58 * \brief Look-up table for sin */
59 IFX_EXTERN const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32;
60
61 /**
62 * \brief Sine lookup function
63 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1)
64 * \return sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
65 * \ingroup library_srvsw_sysse_math_lut_lsincos
66 */
67 IFX_INLINE float32 Ifx_LutLSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle)
68 {
69 fxpAngle = fxpAngle & (IFX_LUT_ANGLE_RESOLUTION - 1);
70
71 return Ifx_LutIndexedLinearF32_search(&Ifx_g_LutLSincosF32, fxpAngle);
72 }
73
74
75 /**
76 * \brief Cosine lookup function
77 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
78 * \return cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
79 * \ingroup library_srvsw_sysse_math_lut_lsincos
80 */
81 IFX_INLINE float32 Ifx_LutLSincosF32_cos(Ifx_Lut_FxpAngle fxpAngle)
82 {
83 return Ifx_LutLSincosF32_sin((IFX_LUT_ANGLE_PI / 2) - fxpAngle);
84 }
85
86
87 /**
88 * \brief Sine and Cosine lookup function
89 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
90 * \retval real = cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
91 * \retval imag = sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
92 * \ingroup library_srvsw_sysse_math_lut_lsincos
93 */
94 IFX_INLINE cfloat32 Ifx_LutLSincosF32_cossin(Ifx_Lut_FxpAngle fxpAngle)
95 {
96 cfloat32 result;
97 result.imag = Ifx_LutLSincosF32_sin(fxpAngle);
98 result.real = Ifx_LutLSincosF32_sin((IFX_LUT_ANGLE_PI / 2) - fxpAngle);
99 return result;
100 }
101
102
103 //________________________________________________________________________________________
104 #endif
Ifx_LutLSincosF32_cossin
IFX_INLINE cfloat32 Ifx_LutLSincosF32_cossin(Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function.
Definition: Ifx_LutLSincosF32.h:94
Ifx_Lut.h
Lookup defintion with fixed-point angle data type.
Ifx_g_LutLSincosF32
IFX_EXTERN const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32
Look-up table for sin.
Definition: Ifx_LutLSincosF32.h:59
IFX_LUT_ANGLE_PI
#define IFX_LUT_ANGLE_PI
Value used as 180 degree angle.
Definition: Ifx_Lut.h:75
Ifx_LutIndexedLinearF32
Definition: Ifx_LutIndexedLinearF32.h:60
float32
float float32
Definition: Platform_Types.h:170
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:61
Ifx_LutLSincosF32_sin
IFX_INLINE float32 Ifx_LutLSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function.
Definition: Ifx_LutLSincosF32.h:67
cfloat32
Definition: Ifx_Types.h:58
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_LutIndexedLinearF32_search
IFX_INLINE float32 Ifx_LutIndexedLinearF32_search(const Ifx_LutIndexedLinearF32 *ml, uint32 index)
Look-up table search.
Definition: Ifx_LutIndexedLinearF32.h:84
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_LutLSincosF32_cos
IFX_INLINE float32 Ifx_LutLSincosF32_cos(Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function.
Definition: Ifx_LutLSincosF32.h:81
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:60
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:81
IFX_LUT_ANGLE_RESOLUTION
#define IFX_LUT_ANGLE_RESOLUTION
Define the cosinus and sinus table size.
Definition: Ifx_Lut.h:72
Ifx_LutIndexedLinearF32.h
Look-up functionality.


iLLD_TC26B: Ifx_LutLinearF32.c Source File

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Ifx_LutLinearF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutLinearF32.c
3 * \brief Linear look-up function
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "Ifx_LutLinearF32.h"
44
45 /** \brief Look-up table with binary search implementation
46 *
47 * Value inside table will be linearly interpolated.
48 * Value outside table will be linearly extrapolated.
49 *
50 * \param ml pointer to the multi-segment object
51 * \param index
52 * \return linear interpolated value */
53 float32 Ifx_LutLinearF32_searchBin(const Ifx_LutLinearF32 *ml, float32 index)
54 {
55 sint16 imin;
56 sint16 imax;
57 sint16 imid;
58
59 imin = 0;
60 imax = ml->segmentCount - 1;
61
62 if (ml->segments[1].boundary > ml->segments[0].boundary)
63 {
64 while (imin < imax)
65 {
66 imid = imin + (imax - imin) / 2;
67
68 if (index > ml->segments[imid].boundary)
69 {
70 imin = imid + 1;
71 }
72 else
73 {
74 imax = imid;
75 }
76 }
77 }
78 else
79 {
80 while (imin < imax)
81 {
82 imid = imin + (imax - imin) / 2;
83
84 if (index < ml->segments[imid].boundary)
85 {
86 imin = imid + 1;
87 }
88 else
89 {
90 imax = imid;
91 }
92 }
93 }
94
95 return (ml->segments[imin].gain * index) + ml->segments[imin].offset;
96 }
Ifx_LutLinearF32::segmentCount
sint8 segmentCount
Definition: Ifx_LutLinearF32.h:63
Ifx_LutLinearF32_searchBin
float32 Ifx_LutLinearF32_searchBin(const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with binary search implementation.
Definition: Ifx_LutLinearF32.c:53
float32
float float32
Definition: Platform_Types.h:170
Ifx_LutLinearF32_Item::boundary
float32 boundary
segment input upper limit
Definition: Ifx_LutLinearF32.h:58
Ifx_LutLinearF32::segments
const Ifx_LutLinearF32_Item * segments
Definition: Ifx_LutLinearF32.h:64
sint16
short sint16
Definition: Platform_Types.h:129
Ifx_LutLinearF32
Definition: Ifx_LutLinearF32.h:61
Ifx_LutLinearF32_Item::offset
float32 offset
channel offset
Definition: Ifx_LutLinearF32.h:57
Ifx_LutLinearF32.h
Look-up functionality.
Ifx_LutLinearF32_Item::gain
float32 gain
channel gain
Definition: Ifx_LutLinearF32.h:56


iLLD_TC26B: Ifx_LutLinearF32.h Source File

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Ifx_LutLinearF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutLinearF32.h
3 * \brief Look-up functionality
4 *
5 *
6 *
7 * \version disabled
8 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 * \defgroup library_srvsw_sysse_math_f32_lut_linear Look-up table (with linear interpolation)
43 * \ingroup library_srvsw_sysse_math_f32_lut
44 *
45 */
46
47 #ifndef IFX_LUTLINEARF32_H
48 #define IFX_LUTLINEARF32_H
49
50 //________________________________________________________________________________________
51 // INCLUDES
52 #include "Cpu/Std/Ifx_Types.h"
53
54 typedef struct
55 {
56 float32 gain; /**< \brief channel gain */
57 float32 offset; /**< \brief channel offset */
58 float32 boundary; /**< \brief segment input upper limit */
59 } Ifx_LutLinearF32_Item;
60
61 typedef struct
62 {
63 sint8 segmentCount;
64 const Ifx_LutLinearF32_Item *segments;
65 } Ifx_LutLinearF32;
66
67 //________________________________________________________________________________________
68 // FUNCTION PROTOTYPES
69
70 /** \addtogroup library_srvsw_sysse_math_f32_lut_linear
71 * \{ */
72 IFX_EXTERN float32 Ifx_LutLinearF32_searchBin(const Ifx_LutLinearF32 *ml, float32 index);
73 IFX_INLINE float32 Ifx_LutLinearF32_searchNegSeq(const Ifx_LutLinearF32 *ml, float32 index);
74 IFX_INLINE float32 Ifx_LutLinearF32_searchPosSeq(const Ifx_LutLinearF32 *ml, float32 index);
75 /** \} */
76
77 //________________________________________________________________________________________
78 // INLINE FUNCTION IMPLEMENTATION
79
80 /** \brief Look-up table with positive sequential search implementation
81 *
82 * Value inside table will be linearly interpolated
83 * Value outside table will be linearly extrapolated
84 *
85 * \param ml pointer to the multi-segment object
86 * \param index
87 * \return interpolated value */
88 IFX_INLINE float32 Ifx_LutLinearF32_searchPosSeq(const Ifx_LutLinearF32 *ml, float32 index)
89 {
90 sint8 i = 0;
91
92 while ((index > ml->segments[i].boundary) && (i < ml->segmentCount - 1))
93 {
94 i++;
95 }
96
97 return (ml->segments[i].gain * index) + ml->segments[i].offset;
98 }
99
100
101 /** \brief Look-up table with negative sequential search implementation
102 *
103 * Value inside table will be linearly interpolated
104 * Value outside table will be linearly extrapolated
105 *
106 * \param ml pointer to the multi-segment object
107 * \param index
108 * \return interpolated value */
109 IFX_INLINE float32 Ifx_LutLinearF32_searchNegSeq(const Ifx_LutLinearF32 *ml, float32 index)
110 {
111 sint8 i = ml->segmentCount - 1;
112
113 while ((i - 1 >= 0) && (index > ml->segments[i - 1].boundary))
114 {
115 i--;
116 }
117
118 return (ml->segments[i].gain * index) + ml->segments[i].offset;
119 }
120
121
122 #endif /* IFX_LUTLINEARF32_H */
Ifx_LutLinearF32::segmentCount
sint8 segmentCount
Definition: Ifx_LutLinearF32.h:63
Ifx_LutLinearF32_searchBin
IFX_EXTERN float32 Ifx_LutLinearF32_searchBin(const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with binary search implementation.
Definition: Ifx_LutLinearF32.c:53
float32
float float32
Definition: Platform_Types.h:170
Ifx_LutLinearF32_Item::boundary
float32 boundary
segment input upper limit
Definition: Ifx_LutLinearF32.h:58
Ifx_LutLinearF32::segments
const Ifx_LutLinearF32_Item * segments
Definition: Ifx_LutLinearF32.h:64
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_LutLinearF32_Item
Definition: Ifx_LutLinearF32.h:54
Ifx_LutLinearF32_searchNegSeq
IFX_INLINE float32 Ifx_LutLinearF32_searchNegSeq(const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with negative sequential search implementation.
Definition: Ifx_LutLinearF32.h:109
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_LutLinearF32
Definition: Ifx_LutLinearF32.h:61
Ifx_LutLinearF32_Item::offset
float32 offset
channel offset
Definition: Ifx_LutLinearF32.h:57
Ifx_LutLinearF32_searchPosSeq
IFX_INLINE float32 Ifx_LutLinearF32_searchPosSeq(const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with positive sequential search implementation.
Definition: Ifx_LutLinearF32.h:88
sint8
signed char sint8
Definition: Platform_Types.h:125
Ifx_LutLinearF32_Item::gain
float32 gain
channel gain
Definition: Ifx_LutLinearF32.h:56


iLLD_TC26B: Ifx_LutSincosF32.c Source File

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Ifx_LutSincosF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutSincosF32.c
3 * \brief Sin/Cos lookup functions with fixed-point angle data type
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42 #include "Ifx_LutSincosF32.h"
43
44 #include <math.h>
45
46 void Ifx_LutSincosF32_init(void)
47 {
48 #if IFX_LUT_TABLE_CONST == 0
49 { /* generate sin and cos table */
50 sint32 k;
51
52 for (k = 0; k <= (IFX_LUT_ANGLE_PI / 2); k++)
53 {
54 Ifx_g_LutSincosF32_table[k] = sinf((IFX_PI * 2 * k) / IFX_LUT_ANGLE_RESOLUTION);
55 }
56 }
57 #endif
58 }
59
60
61 float32 Ifx_LutSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle)
62 {
63 float32 result;
64 fxpAngle = fxpAngle & (IFX_LUT_ANGLE_RESOLUTION - 1);
65
66 if (fxpAngle < (IFX_LUT_ANGLE_PI / 2))
67 {
68 result = Ifx_g_LutSincosF32_table[fxpAngle];
69 }
70 else if (fxpAngle < IFX_LUT_ANGLE_PI)
71 {
72 fxpAngle = IFX_LUT_ANGLE_PI - fxpAngle;
73 result = Ifx_g_LutSincosF32_table[fxpAngle];
74 }
75 else if (fxpAngle < (IFX_LUT_ANGLE_PI / 2 * 3))
76 {
77 fxpAngle = fxpAngle - IFX_LUT_ANGLE_PI;
78 result = -Ifx_g_LutSincosF32_table[fxpAngle];
79 }
80 else
81 {
82 fxpAngle = IFX_LUT_ANGLE_RESOLUTION - fxpAngle;
83 result = -Ifx_g_LutSincosF32_table[fxpAngle];
84 }
85
86 return result;
87 }
IFX_LUT_ANGLE_PI
#define IFX_LUT_ANGLE_PI
Value used as 180 degree angle.
Definition: Ifx_Lut.h:75
float32
float float32
Definition: Platform_Types.h:170
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:217
Ifx_LutSincosF32.h
Sin/Cos lookup functions with fixed-point angle data type.
Ifx_LutSincosF32_init
void Ifx_LutSincosF32_init(void)
Initialise the lookup tables.
Definition: Ifx_LutSincosF32.c:46
Ifx_g_LutSincosF32_table
IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table[(IFX_LUT_ANGLE_PI/2)+1]
Look-up table for sin(IFX_PI*2*k/IFX_LUT_ANGLE_RESOLUTION), where k = 0..IFX_LUT_ANGLE_RESOLUTION.
Definition: Ifx_LutSincosF32.h:59
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_LutSincosF32_sin
float32 Ifx_LutSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function.
Definition: Ifx_LutSincosF32.c:61
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:81
IFX_LUT_ANGLE_RESOLUTION
#define IFX_LUT_ANGLE_RESOLUTION
Define the cosinus and sinus table size.
Definition: Ifx_Lut.h:72


iLLD_TC26B: Ifx_LutSincosF32.h Source File

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Ifx_LutSincosF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutSincosF32.h
3 * \brief Sin/Cos lookup functions with fixed-point angle data type
4 * \ingroup library_srvsw_sysse_math_lut_sincos
5 *
6 *
7 *
8 * \version disabled
9 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
10 *
11 *
12 * IMPORTANT NOTICE
13 *
14 * Use of this file is subject to the terms of use agreed between (i) you or
15 * the company in which ordinary course of business you are acting and (ii)
16 * Infineon Technologies AG or its licensees. If and as long as no such terms
17 * of use are agreed, use of this file is subject to following:
18 *
19 * Boost Software License - Version 1.0 - August 17th, 2003
20 *
21 * Permission is hereby granted, free of charge, to any person or organization
22 * obtaining a copy of the software and accompanying documentation covered by
23 * this license (the "Software") to use, reproduce, display, distribute,
24 * execute, and transmit the Software, and to prepare derivative works of the
25 * Software, and to permit third-parties to whom the Software is furnished to
26 * do so, all subject to the following:
27 *
28 * The copyright notices in the Software and this entire statement, including
29 * the above license grant, this restriction and the following disclaimer, must
30 * be included in all copies of the Software, in whole or in part, and all
31 * derivative works of the Software, unless such copies or derivative works are
32 * solely in the form of machine-executable object code generated by a source
33 * language processor.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
36 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
37 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
38 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
39 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
40 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
41 * DEALINGS IN THE SOFTWARE.
42 *
43 * \defgroup library_srvsw_sysse_math_lut_sincos Sinus and cosinus Look-ups
44 * \ingroup library_srvsw_sysse_math_f32_lut
45 *
46 */
47
48 #ifndef IFX_LUTSINCOSF32_H
49 #define IFX_LUTSINCOSF32_H
50 //________________________________________________________________________________________
51
52 #include "SysSe/Math/Ifx_Cf32.h"
53 #include "Ifx_Lut.h"
54 //________________________________________________________________________________________
55
56 /**
57 * \brief Look-up table for sin(IFX_PI*2*k/IFX_LUT_ANGLE_RESOLUTION),
58 * where k = 0..IFX_LUT_ANGLE_RESOLUTION */
59 IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table[(IFX_LUT_ANGLE_PI / 2) + 1];
60
61 /** \brief Initialise the lookup tables
62 * \note This is not required if (\ref IFX_LUT_TABLE_CONST == 1)
63 * \ingroup library_srvsw_sysse_math_lut_sincos
64 */
65 IFX_EXTERN void Ifx_LutSincosF32_init(void);
66
67 /**
68 * \brief Sine lookup function
69 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1)
70 * \return sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
71 * \ingroup library_srvsw_sysse_math_lut_sincos
72 */
73 IFX_EXTERN float32 Ifx_LutSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle);
74
75 /**
76 * \brief Cosine lookup function
77 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
78 * \return cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
79 * \ingroup library_srvsw_sysse_math_lut_sincos
80 */
81 IFX_INLINE float32 Ifx_LutSincosF32_cos(Ifx_Lut_FxpAngle fxpAngle)
82 {
83 return Ifx_LutSincosF32_sin((IFX_LUT_ANGLE_PI / 2) - fxpAngle);
84 }
85
86
87 /**
88 * \brief Sine and Cosine lookup function
89 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
90 * \retval real = cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
91 * \retval imag = sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
92 * \ingroup library_srvsw_sysse_math_lut_sincos
93 */
94 IFX_INLINE cfloat32 Ifx_LutSincosF32_cossin(Ifx_Lut_FxpAngle fxpAngle)
95 {
96 cfloat32 result;
97 result.imag = Ifx_LutSincosF32_sin(fxpAngle);
98 result.real = Ifx_LutSincosF32_sin((IFX_LUT_ANGLE_PI / 2) - fxpAngle);
99 return result;
100 }
101
102
103 //________________________________________________________________________________________
104 #endif
Ifx_Lut.h
Lookup defintion with fixed-point angle data type.
Ifx_LutSincosF32_cos
IFX_INLINE float32 Ifx_LutSincosF32_cos(Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function.
Definition: Ifx_LutSincosF32.h:81
IFX_LUT_ANGLE_PI
#define IFX_LUT_ANGLE_PI
Value used as 180 degree angle.
Definition: Ifx_Lut.h:75
Ifx_LutSincosF32_cossin
IFX_INLINE cfloat32 Ifx_LutSincosF32_cossin(Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function.
Definition: Ifx_LutSincosF32.h:94
IFX_LUT_TABLE
#define IFX_LUT_TABLE
Lookup table type modifier (stored in ROM)
Definition: Ifx_Lut.h:62
float32
float float32
Definition: Platform_Types.h:170
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:61
cfloat32
Definition: Ifx_Types.h:58
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:60
Ifx_LutSincosF32_init
IFX_EXTERN void Ifx_LutSincosF32_init(void)
Initialise the lookup tables.
Definition: Ifx_LutSincosF32.c:46
Ifx_g_LutSincosF32_table
IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table[(IFX_LUT_ANGLE_PI/2)+1]
Look-up table for sin(IFX_PI*2*k/IFX_LUT_ANGLE_RESOLUTION), where k = 0..IFX_LUT_ANGLE_RESOLUTION.
Definition: Ifx_LutSincosF32.h:59
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
Ifx_LutSincosF32_sin
IFX_EXTERN float32 Ifx_LutSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function.
Definition: Ifx_LutSincosF32.c:61
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:81


iLLD_TC26B: Ifx_LutSincosF32_Table.c Source File

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Ifx_LutSincosF32_Table.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutSincosF32_Table.c
3 * \brief Table data for Sin/Cos lookup functions
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * $Revision: 614 $
42 * $Date: 2013-03-04 14:09:48 +0100 (Mon, 04 Mar 2013) $
43 *
44 */
45
46 #include "Ifx_Lut.h"
47
48 #if IFX_LUT_TABLE_CONST == 0
49 /* FIXME Table size not consistent */
50 IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table[IFX_LUT_ANGLE_RESOLUTION + (IFX_LUT_ANGLE_RESOLUTION / 4)];
51 #else
52
53 #if (IFX_LUT_ANGLE_RESOLUTION != 4096)
54 #error "Inconsistent between Lookup Table and configuration. Please regenerate."
55 #endif
56
57 /*lint -e915*/
58 const float32 Ifx_g_LutSincosF32_table[1025] = {
59 0,
60 0.00153398018628477,
61 0.00306795676296598,
62 0.00460192612044857,
63 0.00613588464915448,
64 0.0076698287395311,
65 0.00920375478205982,
66 0.0107376591672645,
67 0.0122715382857199,
68 0.0138053885280604,
69 0.0153392062849881,
70 0.0168729879472817,
71 0.0184067299058048,
72 0.0199404285515144,
73 0.0214740802754695,
74 0.0230076814688394,
75 0.0245412285229123,
76 0.0260747178291039,
77 0.0276081457789657,
78 0.0291415087641937,
79 0.0306748031766366,
80 0.0322080254083046,
81 0.0337411718513776,
82 0.0352742388982139,
83 0.0368072229413588,
84 0.0383401203735527,
85 0.0398729275877398,
86 0.0414056409770767,
87 0.0429382569349408,
88 0.0444707718549387,
89 0.0460031821309146,
90 0.0475354841569593,
91 0.049067674327418,
92 0.0505997490368993,
93 0.0521317046802833,
94 0.0536635376527305,
95 0.0551952443496899,
96 0.0567268211669077,
97 0.0582582645004358,
98 0.0597895707466399,
99 0.0613207363022086,
100 0.0628517575641614,
101 0.0643826309298575,
102 0.0659133527970038,
103 0.0674439195636641,
104 0.0689743276282667,
105 0.0705045733896139,
106 0.0720346532468893,
107 0.0735645635996674,
108 0.0750943008479213,
109 0.0766238613920315,
110 0.0781532416327942,
111 0.0796824379714301,
112 0.0812114468095924,
113 0.0827402645493757,
114 0.0842688875933241,
115 0.0857973123444399,
116 0.0873255352061921,
117 0.0888535525825246,
118 0.090381360877865,
119 0.0919089564971327,
120 0.0934363358457478,
121 0.094963495329639,
122 0.0964904313552526,
123 0.0980171403295606,
124 0.0995436186600693,
125 0.101069862754828,
126 0.102595869022436,
127 0.104121633872055,
128 0.105647153713411,
129 0.107172424956809,
130 0.108697444013139,
131 0.110222207293883,
132 0.111746711211127,
133 0.113270952177564,
134 0.11479492660651,
135 0.116318630911905,
136 0.117842061508325,
137 0.119365214810991,
138 0.120888087235777,
139 0.122410675199216,
140 0.123932975118512,
141 0.125454983411546,
142 0.126976696496886,
143 0.128498110793793,
144 0.130019222722233,
145 0.131540028702883,
146 0.133060525157139,
147 0.134580708507126,
148 0.136100575175706,
149 0.137620121586486,
150 0.139139344163826,
151 0.140658239332849,
152 0.142176803519448,
153 0.143695033150294,
154 0.145212924652847,
155 0.146730474455362,
156 0.148247678986896,
157 0.149764534677322,
158 0.15128103795733,
159 0.152797185258443,
160 0.15431297301302,
161 0.155828397654265,
162 0.157343455616238,
163 0.158858143333861,
164 0.160372457242928,
165 0.161886393780112,
166 0.163399949382973,
167 0.16491312048997,
168 0.166425903540464,
169 0.167938294974731,
170 0.169450291233968,
171 0.170961888760301,
172 0.172473083996796,
173 0.173983873387464,
174 0.175494253377271,
175 0.177004220412149,
176 0.178513770938998,
177 0.1800229014057,
178 0.181531608261125,
179 0.183039887955141,
180 0.18454773693862,
181 0.186055151663447,
182 0.18756212858253,
183 0.189068664149806,
184 0.190574754820253,
185 0.192080397049892,
186 0.193585587295804,
187 0.195090322016128,
188 0.19659459767008,
189 0.198098410717954,
190 0.199601757621131,
191 0.201104634842092,
192 0.202607038844421,
193 0.204108966092817,
194 0.205610413053099,
195 0.207111376192219,
196 0.208611851978263,
197 0.21011183688047,
198 0.211611327369228,
199 0.213110319916091,
200 0.214608810993787,
201 0.21610679707622,
202 0.217604274638484,
203 0.21910124015687,
204 0.220597690108874,
205 0.222093620973204,
206 0.22358902922979,
207 0.225083911359793,
208 0.22657826384561,
209 0.228072083170886,
210 0.229565365820519,
211 0.231058108280671,
212 0.232550307038775,
213 0.234041958583543,
214 0.235533059404975,
215 0.237023605994367,
216 0.238513594844318,
217 0.240003022448741,
218 0.241491885302869,
219 0.242980179903264,
220 0.244467902747824,
221 0.245955050335795,
222 0.247441619167773,
223 0.24892760574572,
224 0.250413006572965,
225 0.251897818154217,
226 0.25338203699557,
227 0.254865659604515,
228 0.256348682489943,
229 0.257831102162159,
230 0.259312915132886,
231 0.260794117915276,
232 0.262274707023914,
233 0.263754678974831,
234 0.265234030285512,
235 0.266712757474898,
236 0.268190857063403,
237 0.269668325572915,
238 0.271145159526808,
239 0.272621355449949,
240 0.274096909868706,
241 0.275571819310958,
242 0.2770460803061,
243 0.278519689385053,
244 0.279992643080273,
245 0.281464937925758,
246 0.282936570457055,
247 0.284407537211272,
248 0.285877834727081,
249 0.28734745954473,
250 0.288816408206049,
251 0.290284677254462,
252 0.291752263234989,
253 0.293219162694259,
254 0.294685372180514,
255 0.296150888243624,
256 0.297615707435086,
257 0.29907982630804,
258 0.300543241417273,
259 0.302005949319228,
260 0.303467946572011,
261 0.304929229735402,
262 0.306389795370861,
263 0.307849640041535,
264 0.309308760312269,
265 0.310767152749611,
266 0.312224813921825,
267 0.313681740398892,
268 0.315137928752522,
269 0.316593375556166,
270 0.318048077385015,
271 0.319502030816016,
272 0.320955232427875,
273 0.32240767880107,
274 0.323859366517853,
275 0.325310292162263,
276 0.326760452320132,
277 0.328209843579092,
278 0.329658462528587,
279 0.331106305759876,
280 0.332553369866044,
281 0.333999651442009,
282 0.335445147084532,
283 0.33688985339222,
284 0.338333766965541,
285 0.339776884406827,
286 0.341219202320282,
287 0.342660717311994,
288 0.344101425989939,
289 0.345541324963989,
290 0.346980410845924,
291 0.348418680249435,
292 0.349856129790135,
293 0.351292756085567,
294 0.352728555755211,
295 0.35416352542049,
296 0.355597661704784,
297 0.35703096123343,
298 0.358463420633737,
299 0.359895036534988,
300 0.361325805568454,
301 0.362755724367397,
302 0.36418478956708,
303 0.365612997804774,
304 0.367040345719767,
305 0.368466829953372,
306 0.369892447148934,
307 0.371317193951838,
308 0.372741067009516,
309 0.374164062971458,
310 0.375586178489217,
311 0.377007410216418,
312 0.378427754808766,
313 0.379847208924051,
314 0.381265769222162,
315 0.38268343236509,
316 0.384100195016935,
317 0.385516053843919,
318 0.386931005514389,
319 0.388345046698826,
320 0.389758174069856,
321 0.391170384302254,
322 0.392581674072951,
323 0.393992040061048,
324 0.395401478947816,
325 0.39680998741671,
326 0.398217562153374,
327 0.399624199845647,
328 0.401029897183576,
329 0.402434650859418,
330 0.403838457567654,
331 0.40524131400499,
332 0.406643216870369,
333 0.408044162864979,
334 0.409444148692258,
335 0.410843171057904,
336 0.412241226669883,
337 0.413638312238435,
338 0.415034424476082,
339 0.416429560097637,
340 0.417823715820212,
341 0.419216888363224,
342 0.420609074448403,
343 0.4220002707998,
344 0.423390474143796,
345 0.424779681209109,
346 0.4261678887268,
347 0.427555093430282,
348 0.428941292055329,
349 0.430326481340083,
350 0.431710658025057,
351 0.433093818853152,
352 0.434475960569656,
353 0.435857079922255,
354 0.437237173661044,
355 0.438616238538528,
356 0.439994271309633,
357 0.441371268731717,
358 0.44274722756457,
359 0.444122144570429,
360 0.445496016513982,
361 0.446868840162374,
362 0.44824061228522,
363 0.449611329654607,
364 0.450980989045104,
365 0.452349587233771,
366 0.453717121000164,
367 0.455083587126344,
368 0.456448982396884,
369 0.457813303598877,
370 0.459176547521944,
371 0.46053871095824,
372 0.461899790702463,
373 0.46325978355186,
374 0.464618686306238,
375 0.465976495767966,
376 0.467333208741988,
377 0.468688822035828,
378 0.470043332459596,
379 0.471396736825998,
380 0.472749031950343,
381 0.47410021465055,
382 0.475450281747156,
383 0.476799230063322,
384 0.478147056424843,
385 0.479493757660153,
386 0.480839330600334,
387 0.482183772079123,
388 0.483527078932919,
389 0.484869248000791,
390 0.486210276124486,
391 0.487550160148436,
392 0.488888896919763,
393 0.490226483288291,
394 0.49156291610655,
395 0.492898192229784,
396 0.49423230851596,
397 0.495565261825773,
398 0.496897049022654,
399 0.498227666972782,
400 0.499557112545082,
401 0.500885382611241,
402 0.502212474045711,
403 0.503538383725718,
404 0.504863108531268,
405 0.506186645345155,
406 0.507508991052971,
407 0.508830142543107,
408 0.510150096706767,
409 0.51146885043797,
410 0.512786400633563,
411 0.514102744193222,
412 0.515417878019463,
413 0.51673179901765,
414 0.518044504095999,
415 0.51935599016559,
416 0.520666254140367,
417 0.521975292937154,
418 0.523283103475656,
419 0.524589682678469,
420 0.525895027471085,
421 0.527199134781901,
422 0.528502001542228,
423 0.529803624686295,
424 0.531104001151255,
425 0.532403127877198,
426 0.533701001807153,
427 0.534997619887097,
428 0.536292979065963,
429 0.537587076295645,
430 0.538879908531008,
431 0.540171472729893,
432 0.541461765853123,
433 0.542750784864516,
434 0.544038526730884,
435 0.545324988422046,
436 0.546610166910835,
437 0.5478940591731,
438 0.54917666218772,
439 0.550457972936605,
440 0.551737988404707,
441 0.553016705580027,
442 0.55429412145362,
443 0.555570233019602,
444 0.55684503727516,
445 0.558118531220556,
446 0.559390711859136,
447 0.560661576197336,
448 0.561931121244689,
449 0.563199344013834,
450 0.564466241520519,
451 0.565731810783613,
452 0.566996048825109,
453 0.568258952670131,
454 0.569520519346947,
455 0.570780745886967,
456 0.572039629324757,
457 0.573297166698042,
458 0.574553355047716,
459 0.575808191417845,
460 0.577061672855679,
461 0.578313796411656,
462 0.579564559139406,
463 0.580813958095765,
464 0.582061990340775,
465 0.583308652937698,
466 0.584553942953015,
467 0.585797857456439,
468 0.587040393520918,
469 0.588281548222645,
470 0.589521318641064,
471 0.590759701858874,
472 0.591996694962041,
473 0.5932322950398,
474 0.594466499184664,
475 0.595699304492433,
476 0.596930708062197,
477 0.598160706996342,
478 0.599389298400565,
479 0.600616479383869,
480 0.60184224705858,
481 0.603066598540348,
482 0.604289530948156,
483 0.605511041404326,
484 0.606731127034524,
485 0.607949784967774,
486 0.609167012336453,
487 0.610382806276309,
488 0.611597163926462,
489 0.61281008242941,
490 0.614021558931038,
491 0.615231590580627,
492 0.616440174530854,
493 0.617647307937804,
494 0.618852987960976,
495 0.620057211763289,
496 0.621259976511088,
497 0.62246127937415,
498 0.623661117525695,
499 0.624859488142386,
500 0.626056388404344,
501 0.627251815495144,
502 0.628445766601833,
503 0.629638238914927,
504 0.630829229628424,
505 0.632018735939809,
506 0.633206755050057,
507 0.634393284163645,
508 0.635578320488556,
509 0.636761861236284,
510 0.637943903621844,
511 0.639124444863776,
512 0.640303482184152,
513 0.641481012808583,
514 0.642657033966227,
515 0.643831542889791,
516 0.645004536815544,
517 0.646176012983316,
518 0.647345968636512,
519 0.648514401022112,
520 0.649681307390683,
521 0.650846684996381,
522 0.65201053109696,
523 0.653172842953777,
524 0.6543336178318,
525 0.655492852999615,
526 0.656650545729429,
527 0.657806693297079,
528 0.658961292982037,
529 0.66011434206742,
530 0.661265837839992,
531 0.662415777590172,
532 0.66356415861204,
533 0.664710978203345,
534 0.66585623366551,
535 0.666999922303637,
536 0.668142041426518,
537 0.669282588346636,
538 0.670421560380173,
539 0.671558954847018,
540 0.672694769070773,
541 0.673829000378756,
542 0.674961646102012,
543 0.676092703575316,
544 0.67722217013718,
545 0.678350043129861,
546 0.679476319899365,
547 0.680600997795453,
548 0.68172407417165,
549 0.682845546385248,
550 0.683965411797315,
551 0.6850836677727,
552 0.686200311680039,
553 0.687315340891759,
554 0.68842875278409,
555 0.689540544737067,
556 0.690650714134535,
557 0.691759258364158,
558 0.692866174817425,
559 0.693971460889654,
560 0.695075113980001,
561 0.696177131491463,
562 0.697277510830887,
563 0.698376249408973,
564 0.699473344640284,
565 0.700568793943248,
566 0.701662594740168,
567 0.702754744457225,
568 0.703845240524485,
569 0.704934080375905,
570 0.70602126144934,
571 0.707106781186547,
572 0.708190637033195,
573 0.709272826438866,
574 0.710353346857062,
575 0.711432195745216,
576 0.712509370564692,
577 0.713584868780794,
578 0.714658687862769,
579 0.715730825283819,
580 0.7168012785211,
581 0.717870045055732,
582 0.718937122372804,
583 0.720002507961382,
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585 0.722128193929215,
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588 0.725303972373061,
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627 0.765167265622459,
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630 0.768122028523365,
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634 0.772036397150384,
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637 0.774953106594874,
638 0.775921699043408,
639 0.776888465673232,
640 0.777853404209453,
641 0.778816512381476,
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643 0.780737228572094,
644 0.781694832071059,
645 0.782650596166576,
646 0.783604518609638,
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649 0.786455213599086,
650 0.787401747029031,
651 0.788346427626606,
652 0.789289253168886,
653 0.79023022143731,
654 0.79116933021769,
655 0.792106577300212,
656 0.793041960479444,
657 0.793975477554337,
658 0.794907126328237,
659 0.795836904608883,
660 0.796764810208419,
661 0.797690840943391,
662 0.798614994634761,
663 0.799537269107905,
664 0.800457662192623,
665 0.80137617172314,
666 0.802292795538116,
667 0.803207531480645,
668 0.804120377398266,
669 0.805031331142964,
670 0.805940390571176,
671 0.806847553543799,
672 0.80775281792619,
673 0.808656181588175,
674 0.809557642404051,
675 0.810457198252595,
676 0.811354847017064,
677 0.812250586585204,
678 0.813144414849254,
679 0.814036329705948,
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1083 1,
1084 };
1085
1086 #endif
Ifx_Lut.h
Lookup defintion with fixed-point angle data type.
IFX_LUT_TABLE
#define IFX_LUT_TABLE
Lookup table type modifier (stored in ROM)
Definition: Ifx_Lut.h:62
float32
float float32
Definition: Platform_Types.h:170
Ifx_g_LutSincosF32_table
const float32 Ifx_g_LutSincosF32_table[1025]
Definition: Ifx_LutSincosF32_Table.c:58
IFX_LUT_ANGLE_RESOLUTION
#define IFX_LUT_ANGLE_RESOLUTION
Define the cosinus and sinus table size.
Definition: Ifx_Lut.h:72


iLLD_TC26B: Ifx_RampF32.c Source File

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  • CpuGeneric
  • SysSe
  • Math
Ifx_RampF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_RampF32.c
3 * \brief Ramp function
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "SysSe/Math/Ifx_RampF32.h"
44
45 /**
46 * \brief Execute the Ramp function
47 *
48 * NOTE: shall be called every 'period'.
49 * The period was defined by Ifx_RampF32_init() or Ifx_RampF32_setSlewRate()
50 *
51 * \param ramp Pointer to the Ifx_RampF32 object
52 * \return Actual value
53 */
54 float32 Ifx_RampF32_step(Ifx_RampF32 *ramp)
55 {
56 if (ramp->uk < ramp->ik)
57 {
58 ramp->uk = __minf(ramp->ik, ramp->uk + ramp->delta);
59 }
60 else if (ramp->uk > ramp->ik)
61 {
62 ramp->uk = __maxf(ramp->ik, ramp->uk - ramp->delta);
63 }
64 else
65 {}
66
67 return ramp->uk;
68 }
Ifx_RampF32_step
float32 Ifx_RampF32_step(Ifx_RampF32 *ramp)
Execute the Ramp function.
Definition: Ifx_RampF32.c:54
float32
float float32
Definition: Platform_Types.h:170
__maxf
#define __maxf
Definition: IfxCpu_IntrinsicsDcc.h:1637
Ifx_RampF32::uk
float32 uk
Definition: Ifx_RampF32.h:57
Ifx_RampF32::ik
float32 ik
Definition: Ifx_RampF32.h:58
__minf
#define __minf
Definition: IfxCpu_IntrinsicsDcc.h:1633
Ifx_RampF32::delta
float32 delta
Definition: Ifx_RampF32.h:59
Ifx_RampF32
Ifx_RampF32 object definition.
Definition: Ifx_RampF32.h:55
Ifx_RampF32.h
Ramp function.


iLLD_TC26B: Ifx_RampF32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_RampF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_RampF32.h
3 * \brief Ramp function
4 *
5 *
6 *
7 * \version disabled
8 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 * \defgroup library_srvsw_sysse_math_f32_ramp Ramp
43 * \ingroup library_srvsw_sysse_math_f32
44 *
45 */
46
47 #ifndef IFX_RAMPF32_H
48 #define IFX_RAMPF32_H
49
50 #include "Cpu/Std/IfxCpu_Intrinsics.h"
51
52 /**
53 * \brief Ifx_RampF32 object definition
54 */
55 typedef struct
56 {
57 float32 uk;
58 float32 ik;
59 float32 delta;
60 } Ifx_RampF32;
61
62 //________________________________________________________________________________________
63 // FUNCTION PROTOTYPES
64
65 /** \addtogroup library_srvsw_sysse_math_f32_ramp
66 * \{ */
67 IFX_INLINE void Ifx_RampF32_init(Ifx_RampF32 *ramp, float32 slewRate, float32 period);
68 IFX_INLINE void Ifx_RampF32_reset(Ifx_RampF32 *ramp);
69 IFX_INLINE void Ifx_RampF32_setSlewRate(Ifx_RampF32 *ramp, float32 slewRate, float32 period);
70 IFX_INLINE void Ifx_RampF32_setRef(Ifx_RampF32 *ramp, float32 ref);
71 IFX_INLINE float32 Ifx_RampF32_getValue(Ifx_RampF32 *ramp);
72 IFX_EXTERN float32 Ifx_RampF32_step(Ifx_RampF32 *ramp);
73 /** \} */
74
75 //________________________________________________________________________________________
76 // INLINE FUNCTION IMPLEMENTATION
77
78 /**
79 * \brief Reset internal values
80 * \param ramp Pointer to the Ifx_RampF32 object
81 */
82 IFX_INLINE void Ifx_RampF32_reset(Ifx_RampF32 *ramp)
83 {
84 ramp->ik = 0;
85 ramp->uk = 0;
86 }
87
88
89 /**
90 * \brief Get the reference value
91 * \param ramp Pointer to the Ifx_RampF32 object
92 * \return Returns the ref value
93 */
94 IFX_INLINE float32 Ifx_RampF32_getRef(Ifx_RampF32 *ramp)
95 {
96 return ramp->ik;
97 }
98
99
100 /**
101 * \brief Set the maximum slew rate
102 * \param ramp Pointer to the Ifx_RampF32 object
103 * \param slewRate Maximum slew rate, value per second
104 * \param period Sampling period of the Ifx_RampF32_step() function
105 */
106 IFX_INLINE void Ifx_RampF32_setSlewRate(Ifx_RampF32 *ramp, float32 slewRate, float32 period)
107 {
108 ramp->delta = slewRate * period;
109 }
110
111
112 /**
113 * \brief Initialize the Ifx_RampF32 object.
114 * \param ramp Pointer to the Ifx_RampF32 object
115 * \param slewRate Maximum slew rate, value per second
116 * \param period Sampling period of the Ifx_RampF32_step() function
117 */
118 IFX_INLINE void Ifx_RampF32_init(Ifx_RampF32 *ramp, float32 slewRate, float32 period)
119 {
120 Ifx_RampF32_setSlewRate(ramp, slewRate, period);
121 Ifx_RampF32_reset(ramp);
122 }
123
124
125 /**
126 * \brief Set the reference value
127 * \param ramp Pointer to the Ifx_RampF32 object
128 * \param ref Reference value
129 */
130 IFX_INLINE void Ifx_RampF32_setRef(Ifx_RampF32 *ramp, float32 ref)
131 {
132 ramp->ik = ref;
133 }
134
135
136 /**
137 * \brief Get the actual output value
138 * \param ramp Pointer to the Ifx_RampF32 object
139 * \return Actual value
140 */
141 IFX_INLINE float32 Ifx_RampF32_getValue(Ifx_RampF32 *ramp)
142 {
143 return ramp->uk;
144 }
145
146
147 #endif /* IFX_RAMPF32_H */
Ifx_RampF32_getValue
IFX_INLINE float32 Ifx_RampF32_getValue(Ifx_RampF32 *ramp)
Get the actual output value.
Definition: Ifx_RampF32.h:141
Ifx_RampF32_getRef
IFX_INLINE float32 Ifx_RampF32_getRef(Ifx_RampF32 *ramp)
Get the reference value.
Definition: Ifx_RampF32.h:94
Ifx_RampF32_step
IFX_EXTERN float32 Ifx_RampF32_step(Ifx_RampF32 *ramp)
Execute the Ramp function.
Definition: Ifx_RampF32.c:54
float32
float float32
Definition: Platform_Types.h:170
Ifx_RampF32_init
IFX_INLINE void Ifx_RampF32_init(Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Initialize the Ifx_RampF32 object.
Definition: Ifx_RampF32.h:118
IfxCpu_Intrinsics.h
Ifx_RampF32::uk
float32 uk
Definition: Ifx_RampF32.h:57
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_RampF32::ik
float32 ik
Definition: Ifx_RampF32.h:58
Ifx_RampF32_reset
IFX_INLINE void Ifx_RampF32_reset(Ifx_RampF32 *ramp)
Reset internal values.
Definition: Ifx_RampF32.h:82
Ifx_RampF32_setSlewRate
IFX_INLINE void Ifx_RampF32_setSlewRate(Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Set the maximum slew rate.
Definition: Ifx_RampF32.h:106
Ifx_RampF32::delta
float32 delta
Definition: Ifx_RampF32.h:59
Ifx_RampF32
Ifx_RampF32 object definition.
Definition: Ifx_RampF32.h:55
Ifx_RampF32_setRef
IFX_INLINE void Ifx_RampF32_setRef(Ifx_RampF32 *ramp, float32 ref)
Set the reference value.
Definition: Ifx_RampF32.h:130


iLLD_TC26B: Ifx_Shell.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Ifx_Shell.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Shell.c
3 * \brief shell functions.
4 *
5 * \version disabled
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 //---------------------------------------------------------------------------
43 #include "Ifx_Shell.h"
44 #include "_Utilities/Ifx_Assert.h"
45 #include "Cpu/Std/IfxCpu_Intrinsics.h"
46
47 #include <string.h>
48 #include <stdlib.h>
49 #include <stdio.h>
50
51 #define IFX_SHELL_LLD "%lld "
52 #define IFX_SHELL_LLX "%llx "
53 #define IFX_SHELL_LLU "%llu "
54
55 //---------------------------------------------------------------------------
56 #define IFX_SHELL_MAX_MESSAGE_SIZE 255
57 //---------------------------------------------------------------------------
58
59 /* Macro to detect space character */
60 #define ISSPACE(c) (((c) == ' ') || ((c) == '\t'))
61
62 /* Macro to only execute parameter if echo is enabled for this shell */
63 #define IFX_SHELL_IF_ECHO(X) {if (shell->control.echo) {X; }}
64
65 /* Macro to write lots of spaces */
66 #define IFX_SHELL_WRITE_SPACES(X) \
67 {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, " "); }}
68
69 /* Macro to write lots of backspaces */
70 #define IFX_SHELL_WRITE_BACKSPACES(X) \
71 {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, "\b"); }}
72
73 //---------------------------------------------------------------------------
74 char Ifx_Shell_cmdBuffer[IFX_CFG_SHELL_CMD_LINE_SIZE * IFX_CFG_SHELL_CMD_HISTORY_SIZE];
75 //---------------------------------------------------------------------------
76 void Ifx_Shell_execute(Ifx_Shell *shell, pchar commandLine);
77 void Ifx_Shell_cmdEscapeProcess(Ifx_Shell *shell, char EscapeChar1, char EscapeChar2);
78 const Ifx_Shell_Command *Ifx_Shell_commandListFind(Ifx_Shell *shell, pchar commandLine, pchar *args, Ifx_Shell_CommandListConst *commandList);
79 static boolean Ifx_Shell_matchCommand(pchar *argsPtr, pchar *match);
80
81 //---------------------------------------------------------------------------
82 /**
83 * \brief Check whether the args is already at the end.
84 * \param args The argument null-terminated string
85 */
86 boolean Ifx_Shell_isEndOfLine(pchar args)
87 {
88 return ((args == NULL_PTR) || (*args == IFX_SHELL_NULL_CHAR)) ? TRUE : FALSE;
89 }
90
91
92 static boolean Ifx_Shell_writeResult(Ifx_Shell *shell, Ifx_SizeT Code)
93 {
94 Ifx_SizeT length = sizeof(Code);
95 boolean result = IfxStdIf_DPipe_write(shell->io, &Code, &length, TIME_INFINITE);
96
97 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result != FALSE);
98
99 return result;
100 }
101
102
103 //---------------------------------------------------------------------------
104 boolean Ifx_Shell_showHelpSingle(Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
105 {
106 const Ifx_Shell_Command *command = commandList;
107 uint32 index = 0;
108 pchar space = "";
109 pchar spaceParam = "";
110
111 while (command->commandLine != NULL_PTR)
112 {
113 pchar help = command->help;
114 pchar chunk;
115 boolean isParam = FALSE;
116 boolean isSyntax = FALSE;
117 IfxStdIf_DPipe_print(io, "%s%s", space, command->commandLine);
118
119 while (*help != IFX_SHELL_NULL_CHAR)
120 {
121 Ifx_SizeT count;
122 pchar matchp = "/p";
123 pchar matchs = "/s";
124 spaceParam = "";
125
126 if (Ifx_Shell_matchCommand(&help, &matchp))
127 { /* Parameter description found */
128 isParam = TRUE;
129 isSyntax = FALSE,
130 spaceParam = " ";
131 }
132 else if (Ifx_Shell_matchCommand(&help, &matchs))
133 { /* Parameter description found */
134 isParam = FALSE;
135 isSyntax = TRUE,
136 spaceParam = " SYNTAX: ";
137 }
138 else
139 { /* Other text */
140 if (isParam)
141 { /* Show param details*/
142 spaceParam = " ";
143 }
144 else if (isSyntax)
145 { /* Show param details*/
146 spaceParam = " ";
147 }
148 }
149
150 /* Split print by ENDL */
151 chunk = strstr(help, ENDL);
152
153 if (chunk == NULL_PTR)
154 {
155 chunk = help + strlen(help);
156 }
157 else
158 {
159 if (!briefOnly)
160 {
161 chunk += strlen(ENDL);
162 }
163 }
164
165 count = chunk - help;
166 IfxStdIf_DPipe_print(io, "%s%s", space, spaceParam);
167 IfxStdIf_DPipe_write(io, (void *)help, &count, TIME_INFINITE);
168
169 help += count;
170
171 if (briefOnly)
172 { /* Print Brief only */
173 break;
174 }
175 }
176
177 IfxStdIf_DPipe_print(io, ENDL);
178
179 if ((command->call == NULL_PTR) && (index == 0))
180 {
181 index = 1;
182 space = " ";
183 }
184
185 command = &command[1];
186
187 if (singleCommand)
188 {
189 break;
190 }
191 }
192
193 return TRUE;
194 }
195
196
197 boolean Ifx_Shell_showHelpSingleCommand(pchar args, void *shellPtr, IfxStdIf_DPipe *io)
198 {
199 Ifx_Shell_CommandListConst commandList;
200 const Ifx_Shell_Command *shellCommand = Ifx_Shell_commandListFind(shellPtr, args, &args, &commandList);
201
202 if (shellCommand != NULL_PTR)
203 {
204 if (shellCommand->call == NULL_PTR)
205 {
206 Ifx_Shell_showHelpSingle(commandList, io, FALSE, FALSE);
207 }
208 else
209 {
210 if (commandList->call == NULL_PTR)
211 {
212 IfxStdIf_DPipe_print(io, "%s ", commandList->commandLine);
213 }
214
215 Ifx_Shell_showHelpSingle(shellCommand, io, FALSE, TRUE);
216 }
217
218 return TRUE;
219 }
220 else
221 {
222 IfxStdIf_DPipe_print(io, "unknown command");
223 return FALSE;
224 }
225 }
226
227
228 boolean Ifx_Shell_showHelp(pchar args, void *shellPtr, IfxStdIf_DPipe *io)
229 {
230 sint32 i;
231 Ifx_Shell *shell = shellPtr;
232 boolean result = TRUE;
233
234 if (*args == IFX_SHELL_NULL_CHAR)
235 {
236 for (i = 0; i < IFX_CFG_SHELL_COMMAND_LISTS; i++)
237 {
238 if (shell->commandList[i] != NULL_PTR)
239 {
240 Ifx_Shell_showHelpSingle(shell->commandList[i], io, TRUE, FALSE);
241 }
242 }
243 }
244 else
245 {
246 result = Ifx_Shell_showHelpSingleCommand(args, shellPtr, io);
247 }
248
249 return result;
250 }
251
252
253 boolean Ifx_Shell_protocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
254 {
255 Ifx_Shell *shell = data;
256 boolean Result = TRUE;
257
258 if (Ifx_Shell_matchToken(&args, "?") != FALSE)
259 {
260 IfxStdIf_DPipe_print(io, "Syntax : protocol start" ENDL);
261 IfxStdIf_DPipe_print(io, " > start a protocol" ENDL);
262 }
263 else if (Ifx_Shell_matchToken(&args, "start") != FALSE)
264 {
265 if ((shell->protocol.start != NULL_PTR) && (shell->protocol.object != NULL_PTR))
266 {
267 Result = shell->protocol.start(shell->protocol.object, io);
268 shell->protocol.started = (Result != FALSE);
269
270 if (shell->protocol.onStart != NULL_PTR)
271 {
272 shell->protocol.onStart(shell->protocol.object, shell->protocol.onStartData);
273 }
274 }
275 else
276 {
277 Result = FALSE;
278 }
279 }
280 else
281 {}
282
283 return Result;
284 }
285
286
287 boolean Ifx_Shell_bbProtocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
288 {
289 boolean result = TRUE;
290
291 if (Ifx_Shell_matchToken(&args, "?") != FALSE)
292 {
293 IfxStdIf_DPipe_print(io, "Syntax : protocol start" ENDL);
294 IfxStdIf_DPipe_print(io, " > start a protocol" ENDL);
295 }
296 else if (Ifx_Shell_matchToken(&args, "protocol") != FALSE)
297 {
298 result = Ifx_Shell_protocolStart(args, data, io);
299 }
300 else
301 {}
302
303 return result;
304 }
305
306
307 //---------------------------------------------------------------------------
308 void Ifx_Shell_initConfig(Ifx_Shell_Config *config)
309 {
310 uint32 i;
311
312 for (i = 0; i < IFX_CFG_SHELL_COMMAND_LISTS; i++)
313 {
314 config->commandList[i] = NULL_PTR;
315 }
316
317 config->standardIo = NULL_PTR;
318 config->echo = TRUE;
319 config->protocol.execute = NULL_PTR;
320 config->protocol.object = NULL_PTR;
321 config->protocol.onStart = NULL_PTR;
322 config->protocol.onStartData = NULL_PTR;
323 config->protocol.start = NULL_PTR;
324 config->protocol.started = FALSE;
325 config->sendResultCode = FALSE;
326 config->showPrompt = TRUE;
327 config->standardIo = NULL_PTR;
328 }
329
330
331 boolean Ifx_Shell_init(Ifx_Shell *shell, const Ifx_Shell_Config *config)
332 {
333 sint32 i;
334 char **CmdHistory = NULL_PTR; /* Pointer to array of pointers for command history items */
335
336 /* Ensure state variable is cleared */
337 memset(shell, 0, sizeof(*shell));
338
339 shell->protocol = config->protocol;
340 shell->protocol.started = FALSE;
341
342 shell->io = config->standardIo;
343 shell->control.showPrompt = config->showPrompt;
344 shell->control.sendResultCode = config->sendResultCode;
345 shell->control.echo = config->echo;
346 shell->control.echoError = TRUE;
347 shell->control.enabled = TRUE;
348
349 shell->locals.escBracketNum = IFX_SHELL_NULL_CHAR; /* Used to cache number in sequence "ESC [ 1/2/3/4 ~" */
350 shell->locals.cmdState = IFX_SHELL_CMD_STATE_NORMAL;
351
352 /* Copy command line buffer pointer into state variable */
353 shell->cmd.cmdStr = shell->locals.cmdStr;
354
355 /* Initialize command history space and cache pointer */
356 memset(Ifx_Shell_cmdBuffer, 0, sizeof(Ifx_Shell_cmdBuffer));
357 shell->cmdHistory[0] = &Ifx_Shell_cmdBuffer[0];
358
359 for (i = 0; i < IFX_CFG_SHELL_COMMAND_LISTS; i++)
360 {
361 shell->commandList[i] = config->commandList[i];
362 }
363
364 /* Initialize command history pointers */
365 CmdHistory = shell->cmdHistory;
366
367 for (i = 1; i < IFX_CFG_SHELL_CMD_HISTORY_SIZE; i++)
368 {
369 CmdHistory[i] = &CmdHistory[i - 1][IFX_CFG_SHELL_CMD_LINE_SIZE]; /* Items are just offsets into a large allocated area */
370 }
371
372 shell->cmd.historyItem = IFX_SHELL_CMD_HISTORY_NO_ITEM;
373
374 /* Pre-load useful commands into history buffer */
375 strcpy(CmdHistory[0], "help");
376 //strcpy(CmdHistory[1], "protocol start");
377
378 if (shell->control.showPrompt != 0)
379 {
380 IfxStdIf_DPipe_print(shell->io, ENDL);
381 IfxStdIf_DPipe_print(shell->io, IFX_CFG_SHELL_PROMPT);
382 }
383
384 return TRUE;
385 }
386
387
388 void Ifx_Shell_process(Ifx_Shell *shell)
389 {
390 Ifx_SizeT i, j; /* Loop variables */
391 Ifx_SizeT count;
392 Ifx_SizeT readCount;
393 boolean NormalKeyPress; /* Indicates if this is a normal keypress, i.e. not part of an escape code */
394
395 Ifx_Shell_CmdLine *Cmd = &shell->cmd;
396 char *inputbuffer = shell->locals.inputbuffer;
397 char *cmdStr = shell->locals.cmdStr;
398 char **CmdHistory = shell->cmdHistory;
399
400 if (shell->control.enabled == 0)
401 {
402 return;
403 }
404
405 if ((shell->protocol.object != NULL_PTR) && (shell->protocol.started != FALSE))
406 {
407 shell->protocol.execute(shell->protocol.object);
408 }
409 else
410 {
411 /**** NORMAL MODE ****/
412
413 /********************************************************************************/
414 /* Read all characters until enter inclusive. */
415 /* If the command is bigger than IFX_SHELL_CMD_SIZE, the command is ignored. */
416 /* */
417 /* Escape sequences are handled by a state machine. */
418 /* The following escape sequences (prefix "ESC [") are supported: */
419 /* */
420 /* A - up B - down C - right D - left */
421 /* 1~ - HOME 2~ - INSERT 3~ - DELETE 5~ - END */
422 /* */
423 /* Backspace ('\b') is also supported. */
424 /********************************************************************************/
425
426 count = 0;
427 readCount = IFX_CFG_SHELL_CMD_LINE_SIZE - count;
428 IfxStdIf_DPipe_read(shell->io, &inputbuffer[count], &readCount, TIME_NULL);
429 count += readCount;
430
431 for (i = 0; i < count; i++)
432 {
433 /* By default, we assume character is part of escape sequence */
434 NormalKeyPress = FALSE;
435
436 /* Process key pressed */
437 switch (inputbuffer[i])
438 {
439 /* New line (ENTER) */
440 case '\n':
441 case '\r':
442 /* Print new line to terminal if requested */
443 IFX_SHELL_IF_ECHO(IfxStdIf_DPipe_print(shell->io, ENDL))
444
445 /* Execute command if length is valid - i.e. not an over-full buffer
446 * (prevents attempted execution of junk) */
447 if (Cmd->length < IFX_CFG_SHELL_CMD_LINE_SIZE)
448 {
449 cmdStr[Cmd->length] = IFX_SHELL_NULL_CHAR; /* Terminate cmdStr */
450
451 if (Cmd->historyAdd != FALSE)
452 {
453 /* Shuffle history up */
454 for (j = IFX_CFG_SHELL_CMD_HISTORY_SIZE - 1; j > 0; j--)
455 {
456 /* Copy text */
457 strncpy(CmdHistory[j], CmdHistory[j - 1], IFX_CFG_SHELL_CMD_LINE_SIZE);
458 }
459
460 /* Copy in new entry */
461 strncpy(CmdHistory[0], cmdStr, IFX_CFG_SHELL_CMD_LINE_SIZE);
462 }
463
464 /* Execute command */
465 Ifx_Shell_execute(shell, cmdStr);
466 }
467
468 /* Show prompt if in main shell */
469 if (shell->control.showPrompt != 0)
470 {
471 IfxStdIf_DPipe_print(shell->io, IFX_CFG_SHELL_PROMPT);
472 }
473
474 /* Reset command line buffer length */
475 Cmd->length = 0;
476
477 /* Reset command line buffer cursor position */
478 Cmd->cursor = 0;
479
480 /* Clear flag */
481 Cmd->historyAdd = FALSE;
482
483 /* Ensure we're not in command history list */
484 Cmd->historyItem = IFX_SHELL_CMD_HISTORY_NO_ITEM;
485 break;
486
487 /* Backspace (may occur in middle of text if cursor location is not at end) */
488 case '\b':
489
490 if (Cmd->cursor > 0)
491 {
492 /* Update on screen */
493 if (shell->control.echo != 0)
494 {
495 /* Move left one character */
496 IfxStdIf_DPipe_print(shell->io, "\b");
497
498 /* Update line with new characters */
499 for (j = Cmd->cursor; j < Cmd->length; j++)
500 {
501 IfxStdIf_DPipe_print(shell->io, "%c", cmdStr[j]);
502 }
503
504 /* Write over duplicated character at end */
505 IfxStdIf_DPipe_print(shell->io, " ");
506 IFX_SHELL_WRITE_BACKSPACES((Cmd->length - Cmd->cursor) + 1)
507 }
508
509 /* Update in command line variable. Shuffle text left */
510 strncpy(&cmdStr[Cmd->cursor - 1], &cmdStr[Cmd->cursor], Cmd->length - Cmd->cursor);
511
512 /* Terminate string at end of shorter string */
513 cmdStr[Cmd->length - 1] = IFX_SHELL_NULL_CHAR;
514
515 Cmd->length--;
516 Cmd->cursor--;
517
518 /* Command line has been modified */
519 Cmd->historyAdd = TRUE;
520 }
521
522 break;
523
524 /* Escape character */
525 case '\x1B': /*'\x1B': */
526 shell->locals.cmdState = IFX_SHELL_CMD_STATE_ESCAPE;
527 break;
528
529 /* '[' - check to see if this is second part of an escape sequence */
530 case '[':
531
532 if (shell->locals.cmdState == IFX_SHELL_CMD_STATE_ESCAPE)
533 {
534 /* ESC [ pressed */
535 shell->locals.cmdState = IFX_SHELL_CMD_STATE_ESCAPE_BRACKET;
536 }
537 else
538 {
539 NormalKeyPress = TRUE;
540 }
541
542 break;
543
544 /* Check for supported characters in escape sequences ( ESC [ A/B/C/D ) */
545 case 'A':
546 case 'B':
547 case 'C':
548 case 'D':
549
550 if (shell->locals.cmdState == IFX_SHELL_CMD_STATE_ESCAPE_BRACKET)
551 {
552 /* Process arrow keys */
553 Ifx_Shell_cmdEscapeProcess(shell, inputbuffer[i], 0);
554
555 /* End of escape sequence */
556 shell->locals.cmdState = IFX_SHELL_CMD_STATE_NORMAL;
557 }
558 else
559 {
560 NormalKeyPress = TRUE;
561 }
562
563 break;
564
565 /* Check for supported characters in escape sequences (ESC [ 2/4/5 ~) */
566 case '1':
567 case '2':
568 case '3':
569 case '4':
570
571 if (shell->locals.cmdState == IFX_SHELL_CMD_STATE_ESCAPE_BRACKET)
572 {
573 /* Store number for use once complete escape sequence is confirmed (below) */
574 shell->locals.escBracketNum = inputbuffer[i];
575 shell->locals.cmdState = IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER;
576 }
577 else
578 {
579 NormalKeyPress = TRUE;
580 }
581
582 break;
583
584 /* Check for supported characters in escape sequences (ESC [ 2/4/5 ~) */
585 case '~':
586
587 if (shell->locals.cmdState == IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER)
588 {
589 /* Process home/delete/end */
590 Ifx_Shell_cmdEscapeProcess(shell, shell->locals.escBracketNum, '~');
591
592 /* End of escape sequence */
593 shell->locals.cmdState = IFX_SHELL_CMD_STATE_NORMAL;
594 }
595 else
596 {
597 NormalKeyPress = TRUE;
598 }
599
600 break;
601
602 /* Normal character - add to command string */
603 default:
604 NormalKeyPress = TRUE;
605 break;
606 }
607
608 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, Cmd->length >= Cmd->cursor); /* Sanity check */
609
610 /* If this was a normal key press (not part of an escape sequence),
611 * add it to the command string */
612 if (NormalKeyPress != FALSE)
613 {
614 /* Ensure state machine is reset */
615 shell->locals.cmdState = IFX_SHELL_CMD_STATE_NORMAL;
616
617 /* If not filled buffer, add in this character */
618 if (Cmd->length < (IFX_CFG_SHELL_CMD_LINE_SIZE - 1))
619 {
620 /* Command line has been modified */
621 Cmd->historyAdd = TRUE;
622
623 /* Copy into command line */
624 cmdStr[Cmd->cursor] = inputbuffer[i];
625 Cmd->cursor++;
626
627 /* Update length of buffer */
628 Cmd->length = __max(Cmd->length, Cmd->cursor);
629
630 if (shell->control.echo != 0)
631 {
632 /* echo character to shell output if requested */
633 shell->locals.echo[0] = inputbuffer[i];
634 IfxStdIf_DPipe_print(shell->io, shell->locals.echo);
635 }
636 }
637 else
638 {
639 /* Line too long - ignore further characters */
640 Cmd->historyAdd = FALSE; /* Invalid command line */
641 }
642 }
643 }
644 }
645 }
646
647
648 void Ifx_Shell_deinit(Ifx_Shell *shell)
649 {
650 (void)shell; /* ignore compiler warning; */
651 // tbd free necessary memory
652 }
653
654
655 pchar Ifx_Shell_skipWhitespace(pchar args)
656 {
657 if (args != NULL_PTR)
658 {
659 while ((*args != IFX_SHELL_NULL_CHAR) && (ISSPACE(*args)))
660 {
661 args = &args[1];
662 }
663 }
664
665 return args;
666 }
667
668
669 boolean Ifx_Shell_matchToken(pchar *argsPtr, pchar token)
670 {
671 pchar savedArguments = *argsPtr;
672 char buffer[256];
673 boolean result = FALSE;
674
675 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) != FALSE)
676 {
677 if (strcmp(token, buffer) == 0)
678 {
679 result = TRUE;
680 }
681 }
682
683 if (result == FALSE)
684 {
685 // No match: don't advance pointer
686 *argsPtr = savedArguments;
687 }
688
689 return result;
690 }
691
692
693 static boolean Ifx_Shell_matchCommand(pchar *argsPtr, pchar *match)
694 {
695 boolean result = FALSE;
696 pchar savedArguments = *argsPtr;
697 pchar savedMatch = *match;
698 char buffer0[256];
699 char buffer1[256];
700
701 if ((Ifx_Shell_parseToken(argsPtr, buffer0, Ifx_COUNTOF(buffer0)) != FALSE)
702 && (Ifx_Shell_parseToken(match, buffer1, Ifx_COUNTOF(buffer1)) != FALSE))
703 {
704 if (strcmp(buffer1, buffer0) == 0)
705 {
706 result = TRUE;
707 }
708 }
709
710 if (result == FALSE)
711 {
712 // No match: don't advance pointer
713 *argsPtr = savedArguments;
714 *match = savedMatch;
715 }
716
717 return result;
718 }
719
720
721 boolean Ifx_Shell_parseToken(pchar *argsPtr, char *tokenBuffer, int bufferLength)
722 {
723 int mindex = 0;
724 pchar args = Ifx_Shell_skipWhitespace(*argsPtr);
725
726 tokenBuffer[0] = IFX_SHELL_NULL_CHAR;
727
728 if (args == NULL_PTR)
729 {
730 return FALSE;
731 }
732
733 if (*args == '\"')
734 {
735 args = &args[1];
736
737 while ((*args != IFX_SHELL_NULL_CHAR) && (*args != '\"'))
738 {
739 if (mindex < bufferLength)
740 {
741 tokenBuffer[mindex] = *args;
742 mindex++;
743 }
744
745 args = &args[1];
746 }
747
748 // error if no closing quote
749 if (*args != '\"')
750 {
751 return FALSE;
752 }
753
754 args = &args[1];
755 }
756 else
757 {
758 // don't allow unquoted empty tokens
759 if (*args == IFX_SHELL_NULL_CHAR)
760 {
761 return FALSE;
762 }
763
764 while ((*args != IFX_SHELL_NULL_CHAR) && (!ISSPACE(*args)))
765 {
766 if (mindex < bufferLength)
767 {
768 tokenBuffer[mindex] = *args;
769 mindex++;
770 }
771
772 args = &args[1];
773 }
774 }
775
776 // make sure string is zero terminated
777 if (bufferLength > 0)
778 {
779 tokenBuffer[__min(mindex, bufferLength - 1)] = IFX_SHELL_NULL_CHAR;
780 }
781
782 *argsPtr = Ifx_Shell_skipWhitespace(args);
783
784 return TRUE;
785 }
786
787
788 boolean Ifx_Shell_parseAddress(pchar *argsPtr, void **address)
789 {
790 char buffer[32];
791 boolean result;
792
793 *address = 0;
794
795 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) == FALSE)
796 {
797 result = FALSE;
798 }
799 else
800 {
801 result = (buffer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(buffer, "%x ", (unsigned int *)address) == 1);
802 }
803
804 return result;
805 }
806
807
808 boolean Ifx_Shell_parseSInt32(pchar *argsPtr, sint32 *value)
809 {
810 sint64 value64;
811 boolean result;
812
813 *value = 0;
814
815 if (Ifx_Shell_parseSInt64(argsPtr, &value64) == FALSE)
816 {
817 result = FALSE;
818 }
819 else
820 {
821 *value = (sint32)value64;
822 result = TRUE;
823 }
824
825 return result;
826 }
827
828
829 boolean Ifx_Shell_parseUInt32(pchar *argsPtr, uint32 *value, boolean hex)
830 {
831 uint64 value64;
832 boolean result;
833
834 *value = 0;
835
836 if (Ifx_Shell_parseUInt64(argsPtr, &value64, hex) == FALSE)
837 {
838 result = FALSE;
839 }
840 else
841 {
842 *value = (uint32)value64;
843 result = TRUE;
844 }
845
846 return result;
847 }
848
849
850 boolean Ifx_Shell_parseSInt64(pchar *argsPtr, sint64 *value)
851 {
852 char buffer[64];
853 boolean result;
854
855 *value = 0;
856
857 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) == FALSE)
858 {
859 result = FALSE;
860 }
861 else
862 {
863 result = (buffer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(buffer, IFX_SHELL_LLD, value) == 1);
864 }
865
866 return result;
867 }
868
869
870 boolean Ifx_Shell_parseUInt64(pchar *argsPtr, uint64 *value, boolean hex)
871 {
872 char buffer[64];
873 boolean result;
874
875 *value = 0;
876
877 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) == FALSE)
878 {
879 result = FALSE;
880 }
881 else
882 {
883 char *bufferPointer = buffer;
884
885 if ((buffer[0] == '0') && (buffer[1] == 'x'))
886 {
887 bufferPointer = &bufferPointer[2];
888 hex = TRUE;
889 }
890
891 if (hex != FALSE)
892 {
893 result = (bufferPointer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(bufferPointer, IFX_SHELL_LLX, value) == 1);
894 }
895 else
896 {
897 result = (bufferPointer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(bufferPointer, IFX_SHELL_LLU, value) == 1);
898 }
899 }
900
901 return result;
902 }
903
904
905 boolean Ifx_Shell_parseFloat64(pchar *argsPtr, float64 *value)
906 {
907 char buffer[64];
908 boolean result;
909
910 *value = 0;
911
912 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) == FALSE)
913 {
914 result = FALSE;
915 }
916 else
917 {
918 result = (buffer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(buffer, "%lf ", value) == 1);
919 }
920
921 return result;
922 }
923
924
925 boolean Ifx_Shell_parseFloat32(pchar *argsPtr, float32 *value)
926 {
927 char buffer[64];
928 boolean result;
929
930 *value = 0;
931
932 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) == FALSE)
933 {
934 result = FALSE;
935 }
936 else
937 {
938 result = (buffer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(buffer, "%f ", value) == 1);
939 }
940
941 return result;
942 }
943
944
945 const Ifx_Shell_Command *Ifx_Shell_commandFind(Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
946 {
947 const Ifx_Shell_Command *command = commandList;
948 const Ifx_Shell_Command *result = NULL_PTR;
949 pchar cmdLineTemp = commandLine;
950 uint32 matchInit = 0;
951 uint32 index = 0;
952
953 boolean hasPrefix;
954
955 hasPrefix = (command->commandLine != NULL_PTR) && (command->call == NULL_PTR);
956 *match = 0;
957
958 while (command->commandLine != NULL_PTR)
959 {
960 pchar commandTemp = command->commandLine;
961 pchar commandLineTemp = cmdLineTemp;
962 char buffer[256];
963 uint32 matchCount = matchInit;
964
965 while (Ifx_Shell_matchCommand(&commandLineTemp, &commandTemp) != FALSE)
966 {
967 matchCount++;
968 }
969
970 if ((matchCount > *match) && (Ifx_Shell_parseToken(&commandTemp, buffer, Ifx_COUNTOF(buffer)) == FALSE))
971 {
972 if ((index == 0) && (command->call == NULL_PTR))
973 { /* List has a prefix */
974 cmdLineTemp = commandLineTemp;
975 matchInit = matchCount;
976 }
977
978 *match = matchCount;
979 *args = commandLineTemp;
980 result = command;
981 }
982 else
983 {
984 if ((index == 0) && hasPrefix)
985 {
986 /* Prefix does not match */
987 break;
988 }
989 }
990
991 command = &command[1];
992
993 index++;
994 }
995
996 return result;
997 }
998
999
1000 const Ifx_Shell_Command *Ifx_Shell_commandListFind(Ifx_Shell *shell, pchar commandLine, pchar *args, Ifx_Shell_CommandListConst *commandList)
1001 {
1002 int i;
1003 const Ifx_Shell_Command *shellCommand = NULL_PTR;
1004 const Ifx_Shell_Command *Command = NULL_PTR;
1005 uint32 matchMax = 0;
1006 uint32 match;
1007
1008 for (i = 0; i < IFX_CFG_SHELL_COMMAND_LISTS; i++)
1009 {
1010 if (shell->commandList[i] != NULL_PTR)
1011 {
1012 shellCommand = Ifx_Shell_commandFind(shell->commandList[i], commandLine, args, &match);
1013
1014 if ((shellCommand != NULL_PTR) && (match > matchMax))
1015 {
1016 matchMax = match;
1017 Command = shellCommand;
1018 *commandList = shell->commandList[i];
1019 }
1020 }
1021 }
1022
1023 return Command;
1024 }
1025
1026
1027 void Ifx_Shell_execute(Ifx_Shell *shell, pchar commandLine)
1028 {
1029 pchar args = NULL_PTR;
1030 Ifx_Shell_CommandListConst commandList;
1031 const Ifx_Shell_Command *shellCommand = Ifx_Shell_commandListFind(shell, commandLine, &args, &commandList);
1032
1033 if (shellCommand != NULL_PTR)
1034 {
1035 if (shellCommand->call == NULL_PTR)
1036 {
1037 Ifx_Shell_showHelp(commandLine, shell, shell->io);
1038 }
1039 else if (shellCommand->call(args, shellCommand->data, shell->io) != FALSE)
1040 {
1041 if (shell->control.sendResultCode != 0)
1042 {
1043 Ifx_Shell_writeResult(shell, Ifx_Shell_ResultCode_ok);
1044 }
1045 }
1046 else
1047 {
1048 if (shell->control.sendResultCode != 0)
1049 {
1050 Ifx_Shell_writeResult(shell, Ifx_Shell_ResultCode_nok);
1051 }
1052 else if (shell->control.echoError != 0)
1053 {
1054 IfxStdIf_DPipe_print(shell->io, "\r\nShell command error: %s" ENDL, commandLine);
1055 }
1056 else
1057 {}
1058 }
1059 }
1060 else
1061 {
1062 if (commandLine[0] != IFX_SHELL_NULL_CHAR)
1063 {
1064 if (shell->control.sendResultCode != 0)
1065 {
1066 Ifx_Shell_writeResult(shell, Ifx_Shell_ResultCode_unknown);
1067 }
1068 else if (shell->control.echoError != 0)
1069 {
1070 IfxStdIf_DPipe_print(shell->io, "\r\nUnknown command: %s" ENDL, commandLine);
1071 }
1072 else
1073 {}
1074 }
1075 }
1076 }
1077
1078
1079 /****************************************************************************************/
1080 /* Processes escape sequences, including handling command history. */
1081 /* The following escape sequences (prefix "ESC [") are supported: */
1082 /* A - up B - down C - right D - left */
1083 /* 1~ - HOME 2~ - INSERT 3~ - DELETE 4~ - END */
1084 /* */
1085 /* Parameters: */
1086 /* EscapeChar1 - First character to follow ESC [ */
1087 /* EscapeChar2 - Second character following ESC [ , if applicable */
1088 /* */
1089 /****************************************************************************************/
1090 void Ifx_Shell_cmdEscapeProcess(Ifx_Shell *shell, char EscapeChar1, char EscapeChar2)
1091 {
1092 Ifx_Shell_CmdLine *Cmd = NULL_PTR; /* Command line editing state */
1093 char *cmdStr = NULL_PTR; /* Cached pointer to command line being edited */
1094 sint32 i = 0; /* Loop variable */
1095
1096 /* Validate parameters */
1097 boolean result = (shell != NULL_PTR);
1098
1099 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result != FALSE);
1100
1101 if (result == FALSE)
1102 {
1103 return; /* ERROR CASE - no thread data available! */
1104 }
1105
1106 /* Cache command state and command line pointer */
1107 Cmd = &shell->cmd;
1108 cmdStr = Cmd->cmdStr;
1109
1110 /* Validate command line state */
1111 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, cmdStr != NULL_PTR);
1112 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, Cmd->cursor < IFX_CFG_SHELL_CMD_LINE_SIZE);
1113 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, Cmd->length < IFX_CFG_SHELL_CMD_LINE_SIZE);
1114
1115 /* Switch on first character after ESC [ */
1116 switch (EscapeChar1)
1117 {
1118 case 'A': /* Up arrow */
1119
1120 if (Cmd->historyItem == IFX_SHELL_CMD_HISTORY_NO_ITEM)
1121 {
1122 /* Not using list at the moment - take most recent item [0] */
1123 Cmd->historyItem = 0;
1124 }
1125 else
1126 {
1127 if (Cmd->historyItem < (IFX_CFG_SHELL_CMD_HISTORY_SIZE - 1))
1128 {
1129 /* If not already at oldest, go back one in list */
1130 Cmd->historyItem++;
1131 }
1132 }
1133
1134 /* Copy text into buffer */
1135 strncpy(cmdStr, shell->cmdHistory[Cmd->historyItem], IFX_CFG_SHELL_CMD_LINE_SIZE);
1136
1137 /* echo to screen if requested */
1138 if (shell->control.echo != 0)
1139 {
1140 IFX_SHELL_WRITE_BACKSPACES(Cmd->cursor) /* Move cursor back to start */
1141 IFX_SHELL_WRITE_SPACES(Cmd->length) /* Overwrite text with spaces */
1142 IFX_SHELL_WRITE_BACKSPACES(Cmd->length) /* Move cursor back to start */
1143 IfxStdIf_DPipe_print(shell->io, cmdStr); /* Copy buffer to screen */
1144 }
1145
1146 Cmd->cursor = (Ifx_SizeT)strlen(cmdStr); /* Store cursor position */
1147 Cmd->length = Cmd->cursor; /* Store command line length */
1148 Cmd->historyAdd = FALSE; /* Don't add back to history unless modified */
1149 break;
1150
1151 case 'B': /* Down arrow */
1152
1153 if ((Cmd->historyItem == IFX_SHELL_CMD_HISTORY_NO_ITEM) || (Cmd->historyItem == 0))
1154 {
1155 /* Not using list at the moment, or have dropped off the end - just clear command line */
1156 if (shell->control.echo != 0)
1157 {
1158 IFX_SHELL_WRITE_BACKSPACES(Cmd->cursor) /* Move cursor back to start */
1159 IFX_SHELL_WRITE_SPACES(Cmd->length) /* Overwrite text with spaces */
1160 IFX_SHELL_WRITE_BACKSPACES(Cmd->length) /* Move cursor back to start */
1161 }
1162
1163 Cmd->length = 0; /* Reset command line length */
1164 Cmd->cursor = 0;
1165 Cmd->historyItem = IFX_SHELL_CMD_HISTORY_NO_ITEM; /* Ensure we are not using list */
1166 }
1167 else
1168 {
1169 /* Within list - move to more recent entry */
1170 Cmd->historyItem--;
1171
1172 /* Copy text into buffer */
1173 strncpy(cmdStr, shell->cmdHistory[Cmd->historyItem], IFX_CFG_SHELL_CMD_LINE_SIZE);
1174
1175 if (shell->control.echo != 0)
1176 {
1177 IFX_SHELL_WRITE_BACKSPACES(Cmd->cursor) /* Move cursor back to start */
1178 IFX_SHELL_WRITE_SPACES(Cmd->length) /* Overwrite text with spaces */
1179 IFX_SHELL_WRITE_BACKSPACES(Cmd->length) /* Move cursor back to start */
1180 IfxStdIf_DPipe_print(shell->io, cmdStr); /* Copy buffer to screen */
1181 }
1182
1183 Cmd->cursor = (Ifx_SizeT)strlen(cmdStr); /* Store cursor position */
1184 Cmd->length = Cmd->cursor; /* Store command line length */
1185 }
1186
1187 Cmd->historyAdd = FALSE;
1188 break;
1189
1190 case 'C': /* Right arrow */
1191
1192 if (Cmd->cursor < Cmd->length)
1193 {
1194 /* Move cursor one place to right */
1195 IFX_SHELL_IF_ECHO(IfxStdIf_DPipe_print(shell->io, "%c", cmdStr[Cmd->cursor])) Cmd->cursor++;
1196 }
1197
1198 break;
1199
1200 case 'D': /* Left arrow */
1201
1202 if (Cmd->cursor > 0)
1203 {
1204 /* Move cursor one place to left */
1205 IFX_SHELL_IF_ECHO(IfxStdIf_DPipe_print(shell->io, "\b")) Cmd->cursor--;
1206 }
1207
1208 break;
1209
1210 default:
1211 break;
1212 }
1213
1214 /* If second character after ESC [ is ~ then switch on number */
1215 if (EscapeChar2 == '~')
1216 {
1217 switch (EscapeChar1)
1218 {
1219 case '1': /* HOME - move to start of buffer */
1220
1221 if (Cmd->cursor > 0)
1222 {
1223 IFX_SHELL_WRITE_BACKSPACES(Cmd->cursor) Cmd->cursor = 0;
1224 }
1225
1226 break;
1227
1228 case '2': /* INSERT - insert blank character at cursor and move all remaining characters right one */
1229
1230 if ((Cmd->cursor < Cmd->length) && (Cmd->length < (IFX_CFG_SHELL_CMD_LINE_SIZE - 1)))
1231 {
1232 /* Update on screen */
1233 if (shell->control.echo != FALSE)
1234 {
1235 /* write over duplicated character at cursor */
1236 IfxStdIf_DPipe_print(shell->io, " ");
1237
1238 /* Update line with new characters */
1239 for (i = Cmd->cursor; i < Cmd->length; i++)
1240 {
1241 IfxStdIf_DPipe_print(shell->io, "%c", cmdStr[i]);
1242 }
1243
1244 /* Move cursor back to new place */
1245 IFX_SHELL_WRITE_BACKSPACES((Cmd->length + 1) - Cmd->cursor)
1246 }
1247
1248 /* Update in command line variable */
1249 for (i = Cmd->length; i > Cmd->cursor; i--)
1250 {
1251 cmdStr[i] = cmdStr[i - 1]; /* Shuffle text right */
1252 }
1253
1254 cmdStr[Cmd->length + 1] = IFX_SHELL_NULL_CHAR; /* Terminate string at end of longer string */
1255 cmdStr[Cmd->cursor] = ' '; /* Blank character at cursor */
1256
1257 Cmd->length++; /* Now one character longer */
1258 }
1259
1260 break;
1261
1262 case '3': /* DELETE - delete character to right and move all remaining characters left one */
1263
1264 if (Cmd->cursor < Cmd->length)
1265 {
1266 /* Update on screen */
1267 if (shell->control.echo != 0)
1268 {
1269 for (i = Cmd->cursor; i < (Cmd->length - 1); i++)
1270 {
1271 /* Update line with new characters */
1272 IfxStdIf_DPipe_print(shell->io, "%c", cmdStr[i + 1]);
1273 }
1274
1275 /* write over duplicated character at end */
1276 IfxStdIf_DPipe_print(shell->io, " ");
1277
1278 /* Move cursor back to right place */
1279 IFX_SHELL_WRITE_BACKSPACES(Cmd->length - Cmd->cursor)
1280 }
1281
1282 /* Update in command line variable. Shuffle text left */
1283 strncpy(&cmdStr[Cmd->cursor], &cmdStr[Cmd->cursor + 1], Cmd->length - Cmd->cursor - 1);
1284
1285 cmdStr[Cmd->length - 1] = IFX_SHELL_NULL_CHAR; /* Terminate string at end of shorter string */
1286 Cmd->length--; /* Now one character shorter */
1287 }
1288
1289 break;
1290
1291 case '4': /* END - ensure cursor is at end */
1292
1293 while (Cmd->cursor < Cmd->length)
1294 {
1295 IFX_SHELL_IF_ECHO(IfxStdIf_DPipe_print(shell->io, "%c", cmdStr[Cmd->cursor])) Cmd->cursor++;
1296 }
1297
1298 break;
1299
1300 default:
1301 break;
1302 }
1303 }
1304 }
1305
1306
1307 void Ifx_Shell_enable(Ifx_Shell *shell)
1308 {
1309 // Clear the Rx buffer!
1310 IfxStdIf_DPipe_clearRx(shell->io);
1311 // Enable the shell
1312 shell->control.enabled = 1;
1313 }
1314
1315
1316 void Ifx_Shell_disable(Ifx_Shell *shell)
1317 {
1318 shell->control.enabled = 0;
1319 }
1320
1321
1322 void Ifx_Shell_printSyntax(const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
1323 {
1324 const Ifx_Shell_Syntax *syntax = syntaxList;
1325
1326 while (syntax->syntax != NULL_PTR)
1327 {
1328 IfxStdIf_DPipe_print(io, "Syntax : %s" ENDL, syntax->syntax);
1329 IfxStdIf_DPipe_print(io, " > %s" ENDL, syntax->description);
1330 syntax = &syntax[1];
1331 }
1332 }
Ifx_Shell_commandListFind
const Ifx_Shell_Command * Ifx_Shell_commandListFind(Ifx_Shell *shell, pchar commandLine, pchar *args, Ifx_Shell_CommandListConst *commandList)
Definition: Ifx_Shell.c:1000
Ifx_Shell::io
IfxStdIf_DPipe * io
Pointer to IfxStdIf_DPipe object used by the Shell.
Definition: Ifx_Shell.h:234
Ifx_Shell_Runtime::cmdState
Ifx_Shell_CmdState cmdState
Definition: Ifx_Shell.h:223
Ifx_Shell_Flags::enabled
uint16 enabled
Definition: Ifx_Shell.h:211
Ifx_Shell_parseUInt32
boolean Ifx_Shell_parseUInt32(pchar *argsPtr, uint32 *value, boolean hex)
Parse an unsigned 32-bit integer value.
Definition: Ifx_Shell.c:829
Ifx_Shell::locals
Ifx_Shell_Runtime locals
Runtime data.
Definition: Ifx_Shell.h:244
Ifx_Shell_Command::help
pchar help
Definition: Ifx_Shell.h:172
Ifx_Shell_CmdLine::cmdStr
char * cmdStr
Pointer to current string containing command line as so far processed.
Definition: Ifx_Shell.h:180
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
Ifx_Shell::control
Ifx_Shell_Flags control
control flags
Definition: Ifx_Shell.h:236
ISSPACE
#define ISSPACE(c)
Definition: Ifx_Shell.c:60
Ifx_Shell_Flags::echoError
uint16 echoError
Definition: Ifx_Shell.h:214
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
Ifx_Shell_Command
Shell command object.
Definition: Ifx_Shell.h:169
Ifx_Shell_ResultCode_nok
Definition: Ifx_Shell.h:160
Ifx_Shell_skipWhitespace
pchar Ifx_Shell_skipWhitespace(pchar args)
Within the context of Shell.call, skip the whitespaces of the args string.
Definition: Ifx_Shell.c:655
Ifx_Shell_cmdEscapeProcess
void Ifx_Shell_cmdEscapeProcess(Ifx_Shell *shell, char EscapeChar1, char EscapeChar2)
Definition: Ifx_Shell.c:1090
Ifx_Shell_CmdLine::historyAdd
boolean historyAdd
If TRUE, when Enter is pressed, the current cmdLine should be added to the command history (in parent...
Definition: Ifx_Shell.h:183
Ifx_Shell_Protocol::start
boolean(* start)(void *protocol, IfxStdIf_DPipe *io)
Definition: Ifx_Shell.h:199
Ifx_Shell_Config::sendResultCode
boolean sendResultCode
Specifies whether the Ifx_Shell_ResultCode shall be sent to user.
Definition: Ifx_Shell.h:266
Ifx_Shell::cmd
Ifx_Shell_CmdLine cmd
Current status of command line editing (saves passing many parameters around)
Definition: Ifx_Shell.h:242
uint32
unsigned long uint32
Definition: Platform_Types.h:116
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:64
float32
float float32
Definition: Platform_Types.h:170
Ifx_Assert.h
Assert functions.
Ifx_Shell_Runtime::echo
char echo[2]
Definition: Ifx_Shell.h:220
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IFX_CFG_SHELL_PROMPT
#define IFX_CFG_SHELL_PROMPT
Shell prompt.
Definition: Ifx_Shell.h:139
Ifx_Shell_enable
void Ifx_Shell_enable(Ifx_Shell *shell)
Clear the receive buffer and enable the shell.
Definition: Ifx_Shell.c:1307
Ifx_Shell_CmdLine
Command line editing state.
Definition: Ifx_Shell.h:178
Ifx_Shell_Syntax
Shell Syntax Description.
Definition: Ifx_Shell.h:274
IfxCpu_Intrinsics.h
Ifx_Shell_showHelpSingle
boolean Ifx_Shell_showHelpSingle(Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
Implementation of Ifx_Shell_Call. Show the help menu from single command list.
Definition: Ifx_Shell.c:104
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
Ifx_Shell_commandFind
const Ifx_Shell_Command * Ifx_Shell_commandFind(Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
Find command in command List.
Definition: Ifx_Shell.c:945
Ifx_Shell_Flags::sendResultCode
uint16 sendResultCode
Definition: Ifx_Shell.h:212
Ifx_Shell_parseFloat64
boolean Ifx_Shell_parseFloat64(pchar *argsPtr, float64 *value)
Parse a 64-bit (double precision) floating-point value.
Definition: Ifx_Shell.c:905
Ifx_Shell_printSyntax
void Ifx_Shell_printSyntax(const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. print the syntax.
Definition: Ifx_Shell.c:1322
Ifx_Shell_Runtime::cmdStr
char cmdStr[IFX_CFG_SHELL_CMD_LINE_SIZE]
Definition: Ifx_Shell.h:222
IFX_SHELL_LLX
#define IFX_SHELL_LLX
Definition: Ifx_Shell.c:52
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxStdIf_DPipe_print
void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:50
TIME_NULL
#define TIME_NULL
Definition: Ifx_Types.h:78
FALSE
#define FALSE
Definition: Platform_Types.h:93
Ifx_Shell_parseSInt64
boolean Ifx_Shell_parseSInt64(pchar *argsPtr, sint64 *value)
Parse a signed 64-bit integer value.
Definition: Ifx_Shell.c:850
Ifx_Shell_parseSInt32
boolean Ifx_Shell_parseSInt32(pchar *argsPtr, sint32 *value)
Parse a signed 32-bit integer value.
Definition: Ifx_Shell.c:808
Ifx_Shell_Runtime::escBracketNum
char escBracketNum
Definition: Ifx_Shell.h:224
Ifx_Shell_parseAddress
boolean Ifx_Shell_parseAddress(pchar *argsPtr, void **address)
Parse an address.
Definition: Ifx_Shell.c:788
IFX_SHELL_IF_ECHO
#define IFX_SHELL_IF_ECHO(X)
Definition: Ifx_Shell.c:63
Ifx_Shell_protocolStart
boolean Ifx_Shell_protocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the Shell protocol.
Definition: Ifx_Shell.c:253
__max
sint32 __max(sint32, sint32) __attribute__((intrinsic_pseudo(3
Ifx_Shell_Syntax::description
pchar description
description
Definition: Ifx_Shell.h:277
IFX_SHELL_LLU
#define IFX_SHELL_LLU
Definition: Ifx_Shell.c:53
Ifx_Shell::cmdHistory
char * cmdHistory[IFX_CFG_SHELL_CMD_HISTORY_SIZE]
Array of pointers to the history entries.
Definition: Ifx_Shell.h:239
Ifx_Shell_showHelpSingleCommand
boolean Ifx_Shell_showHelpSingleCommand(pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Definition: Ifx_Shell.c:197
IFX_SHELL_NULL_CHAR
#define IFX_SHELL_NULL_CHAR
Definition: Ifx_Shell.h:124
Ifx_Shell::protocol
Ifx_Shell_Protocol protocol
Protocol handler data.
Definition: Ifx_Shell.h:255
Ifx_Shell_Config::echo
boolean echo
Specifies whether each command shall be echoed back to user.
Definition: Ifx_Shell.h:264
Ifx_Shell_Runtime::inputbuffer
char inputbuffer[IFX_CFG_SHELL_CMD_LINE_SIZE+1]
Definition: Ifx_Shell.h:221
IFX_SHELL_CMD_HISTORY_NO_ITEM
#define IFX_SHELL_CMD_HISTORY_NO_ITEM
Signifies no item in use in command history list.
Definition: Ifx_Shell.h:154
Ifx_Shell_parseToken
boolean Ifx_Shell_parseToken(pchar *argsPtr, char *tokenBuffer, int bufferLength)
Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token...
Definition: Ifx_Shell.c:721
Ifx_Shell_parseFloat32
boolean Ifx_Shell_parseFloat32(pchar *argsPtr, float32 *value)
Parse a 32-bit (single precision) floating-point value.
Definition: Ifx_Shell.c:925
Ifx_Shell_Protocol::onStart
void(* onStart)(void *protocol, void *data)
Definition: Ifx_Shell.h:201
Ifx_Shell_Protocol::onStartData
void * onStartData
Definition: Ifx_Shell.h:202
IfxStdIf_DPipe_write
IFX_INLINE boolean IfxStdIf_DPipe_write(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:259
IFX_CFG_SHELL_CMD_HISTORY_SIZE
#define IFX_CFG_SHELL_CMD_HISTORY_SIZE
Number of commands to store in history.
Definition: Ifx_Shell.h:127
Ifx_Shell_Command::call
Ifx_Shell_Call call
Definition: Ifx_Shell.h:174
sint64
long long sint64
Definition: Platform_Types.h:141
Ifx_Shell_init
boolean Ifx_Shell_init(Ifx_Shell *shell, const Ifx_Shell_Config *config)
Initialize the shell.
Definition: Ifx_Shell.c:331
IfxStdIf_DPipe_clearRx
IFX_INLINE void IfxStdIf_DPipe_clearRx(IfxStdIf_DPipe *stdIf)
Clears the RX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:339
IFX_SHELL_LLD
#define IFX_SHELL_LLD
Definition: Ifx_Shell.c:51
Ifx_Shell_ResultCode_ok
Definition: Ifx_Shell.h:162
Ifx_Shell_Command::data
void * data
Definition: Ifx_Shell.h:173
Ifx_Shell_CmdLine::historyItem
Ifx_SizeT historyItem
Item ID in command history list, or IFX_SHELL_CMD_HISTORY_NO_ITEM if not using list (e...
Definition: Ifx_Shell.h:184
Ifx_Shell_Config::standardIo
IfxStdIf_DPipe * standardIo
Pointer to a IfxStdIf_DPipe object used by the Shell.
Definition: Ifx_Shell.h:263
IFX_SHELL_WRITE_SPACES
#define IFX_SHELL_WRITE_SPACES(X)
Definition: Ifx_Shell.c:66
Ifx_Shell_Config
Shell configuration.
Definition: Ifx_Shell.h:261
Ifx_Shell_Protocol::object
void * object
Definition: Ifx_Shell.h:203
float64
double float64
Definition: Platform_Types.h:175
Ifx_COUNTOF
#define Ifx_COUNTOF(x)
Definition: IfxCpu_Intrinsics.h:79
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
Ifx_Shell_bbProtocolStart
boolean Ifx_Shell_bbProtocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the ShellBb protocol.
Definition: Ifx_Shell.c:287
Ifx_Shell_Config::showPrompt
boolean showPrompt
Specifies whether the IFX_CFG_SHELL_PROMPT shall be displayed after each command. ...
Definition: Ifx_Shell.h:265
Ifx_Shell_Syntax::syntax
pchar syntax
syntax
Definition: Ifx_Shell.h:276
Ifx_Shell_matchToken
boolean Ifx_Shell_matchToken(pchar *argsPtr, pchar token)
Match string pointed by the *argsPtr with a given token.
Definition: Ifx_Shell.c:669
TIME_INFINITE
#define TIME_INFINITE
Definition: Ifx_Types.h:77
Ifx_Shell_Flags::echo
uint16 echo
Definition: Ifx_Shell.h:213
Ifx_Shell_Protocol::execute
void(* execute)(void *protocol)
Definition: Ifx_Shell.h:200
Ifx_Shell_showHelp
boolean Ifx_Shell_showHelp(pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Show the help menu and list of commands.
Definition: Ifx_Shell.c:228
Ifx_Shell_initConfig
void Ifx_Shell_initConfig(Ifx_Shell_Config *config)
Definition: Ifx_Shell.c:308
IFX_CFG_SHELL_CMD_LINE_SIZE
#define IFX_CFG_SHELL_CMD_LINE_SIZE
max command line IFX_CFG_SHELL_CMD_LINE_SIZE - 1
Definition: Ifx_Shell.h:131
sint32
long sint32
Definition: Platform_Types.h:134
IFX_SHELL_CMD_STATE_NORMAL
Normal - no special sequences being processed.
Definition: Ifx_Shell.h:190
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IFX_SHELL_CMD_STATE_ESCAPE
Escape character has been pressed.
Definition: Ifx_Shell.h:191
Ifx_Shell_Flags::showPrompt
uint16 showPrompt
Definition: Ifx_Shell.h:210
Ifx_Shell::commandList
Ifx_Shell_CommandListConst commandList[IFX_CFG_SHELL_COMMAND_LISTS]
Array of pointers to command list. The pointed location shall be constant during Shell lifetime...
Definition: Ifx_Shell.h:253
IFX_SHELL_WRITE_BACKSPACES
#define IFX_SHELL_WRITE_BACKSPACES(X)
Definition: Ifx_Shell.c:70
IfxStdIf_DPipe_read
IFX_INLINE boolean IfxStdIf_DPipe_read(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object.
Definition: IfxStdIf_DPipe.h:267
Ifx_Shell_CmdLine::length
Ifx_SizeT length
Pointer to variable containing total length of command line.
Definition: Ifx_Shell.h:182
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER
ESC [ (number) pressed.
Definition: Ifx_Shell.h:193
Ifx_Shell_execute
void Ifx_Shell_execute(Ifx_Shell *shell, pchar commandLine)
Definition: Ifx_Shell.c:1027
Ifx_Shell_CmdLine::cursor
Ifx_SizeT cursor
Pointer to variable containing position of cursor in so-far-processed command line.
Definition: Ifx_Shell.h:181
Ifx_Shell_Command::commandLine
pchar commandLine
Definition: Ifx_Shell.h:171
Ifx_Shell_ResultCode_unknown
Definition: Ifx_Shell.h:159
Ifx_Shell_parseUInt64
boolean Ifx_Shell_parseUInt64(pchar *argsPtr, uint64 *value, boolean hex)
Parse an unsigned 64-bit integer value.
Definition: Ifx_Shell.c:870
Ifx_Shell_deinit
void Ifx_Shell_deinit(Ifx_Shell *shell)
Deinitialise the shell.
Definition: Ifx_Shell.c:648
Ifx_Shell_process
void Ifx_Shell_process(Ifx_Shell *shell)
Process the shell.
Definition: Ifx_Shell.c:388
Ifx_Shell_isEndOfLine
boolean Ifx_Shell_isEndOfLine(pchar args)
Check whether the args is already at the end.
Definition: Ifx_Shell.c:86
Ifx_Shell_disable
void Ifx_Shell_disable(Ifx_Shell *shell)
Disable the shell.
Definition: Ifx_Shell.c:1316
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET
ESC [ pressed.
Definition: Ifx_Shell.h:192
TRUE
#define TRUE
Definition: Platform_Types.h:90
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
Ifx_Shell.h
Shell functions.
Ifx_Shell_cmdBuffer
char Ifx_Shell_cmdBuffer[IFX_CFG_SHELL_CMD_LINE_SIZE *IFX_CFG_SHELL_CMD_HISTORY_SIZE]
Definition: Ifx_Shell.c:74
Ifx_Shell_Protocol::started
boolean started
Definition: Ifx_Shell.h:204
Ifx_Shell
Shell object definition.
Definition: Ifx_Shell.h:232
IFX_CFG_SHELL_COMMAND_LISTS
#define IFX_CFG_SHELL_COMMAND_LISTS
Number of command lists.
Definition: Ifx_Shell.h:135


iLLD_TC26B: Ifx_Shell.h Source File

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Ifx_Shell.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Shell.h
3 * \brief Shell functions.
4 * \ingroup library_srvsw_sysse_comm_shell
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup library_srvsw_sysse_comm_shell Shell
42 * This module implements the Shell functions.
43 * It parses a command line and call the corresponding command execution.
44 * Multiple command list can be used in parallel.
45 *
46 * Only full command match is accepted.
47 *
48 * New feature / change:
49 * - Prefix can be defined for each command list
50 * - Help for a single command is displayed with "help <command>"
51 * - help for a command list is displayed with "help <listPrefix>"
52 * - command short cut is not allowed
53 * - command with identical start option "opt1 opt2" and "opt1 opt3" are accepted, and root to different handlers
54 * - Enhanced help info print
55 *
56 * Help text xyntax:
57 * - /p indicates a parameter description, can be multi-line, lines must be separated with ENDL
58 * - /s Indicates a syntax help
59 *
60 * Example of help list:
61 * \code
62 * Ifx_Shell_Command Ifx_g_OsciShell_commands[] =
63 * {
64 * {IFX_OSCI_SHELL_PREFIX, " : Oscilloscope functions"
65 * , NULL_PTR, NULL_PTR },
66 * {"run", " : run the oscilloscope"ENDL
67 * "/s run [single|auto|normal]"
68 * , NULL_PTR, &Ifx_OsciShell_run },
69 * {"stop", " : stop oscilloscope"
70 * , NULL_PTR, &Ifx_OsciShell_stop },
71 * {"trigger", " : trigger settings"ENDL
72 * "/s trigger [force|single|level <value>|raising|falling|source <chNum>|interval <value>]"ENDL
73 * "/p force: Force the trigger"ENDL
74 * "/p single: Single the trigger"ENDL
75 * "/p level <value>: Set trigger level to value"ENDL
76 * "/p [raising|falling]: Set trigger to raising or falling edges"ENDL
77 * "/p source <chNum>: Set trigger channel number"ENDL
78 * "<chNum> can be obtained with 'channel' command"ENDL
79 * "/p interval <value>: Set sampling interval to value"
80 *
81 * , NULL_PTR, &Ifx_OsciShell_trigger },
82 * {"status", " : display status"
83 * , NULL_PTR, &Ifx_OsciShell_status },
84 * {"channel", " : channel information"ENDL
85 * "/s channel: Show the channels information"ENDL
86 * "/s channel <ch> <sig>: Assign a signal to a channel"
87 * , NULL_PTR, &Ifx_OsciShell_channel },
88 * {"analyze", " : signal analysis of a ch"ENDL
89 * "/s analyze <ch>: analyze the input channel <ch>"
90 * , NULL_PTR, &Ifx_OsciShell_analyze },
91 * {"simulate", " : simulate a signal"ENDL
92 * "/s simulate <ch> <op> <wave> <freq> <ampl> <offs> <phase> : Simulate a signal generation"ENDL
93 * "/p <ch> : {0 .. Channel count}"ENDL
94 * "/p <op> : {add,sub,mul,clr}"ENDL
95 * "/p <wave> : {sine,square}"ENDL
96 * "/p <freq> : -INF .. INF"ENDL
97 * "/p <offs> : -INF .. INF"ENDL
98 * "/p <ampl> : -INF .. INF"ENDL
99 * "/p <phase>: 0 .. 360 [degree]"ENDL
100 * "/s simulate <ch> atan <ych> <xch>: Compute atan(ych/xch) and store in channel <ch>"
101 * , NULL_PTR, &Ifx_OsciShell_simulate},
102 * {"dump", " : dump values (all channels)"ENDL
103 * "/s dump <ch> [hex]"ENDL
104 * "/p <ch>: Dump the values of the channel <ch>"ENDL
105 * "/p hex: If hex is specified, values will be in hexadecimal"
106 * , NULL_PTR, &Ifx_OsciShell_dump },
107 * IFX_SHELL_COMMAND_LIST_END,
108 * };
109 * \endcode
110 *
111 * To enable help command, include the below command in the main command list
112 * {"help", SHELL_HELP_DESCRIPTION_TEXT , &<Ifx_Shell>, &Ifx_Shell_showHelp, },
113 *
114 * \ingroup library_srvsw_sysse_comm
115 *
116 */
117
118 #ifndef IFX_SHELL_H
119 #define IFX_SHELL_H 1
120 //----------------------------------------------------------------------------------------
121 #include "StdIf/IfxStdIf_DPipe.h"
122 #include "Ifx_Cfg.h"
123 //----------------------------------------------------------------------------------------
124 #define IFX_SHELL_NULL_CHAR '\0'
125
126 #ifndef IFX_CFG_SHELL_CMD_HISTORY_SIZE
127 #define IFX_CFG_SHELL_CMD_HISTORY_SIZE (10) /**<\brief Number of commands to store in history */
128 #endif
129
130 #ifndef IFX_CFG_SHELL_CMD_LINE_SIZE
131 #define IFX_CFG_SHELL_CMD_LINE_SIZE (128) /**<\brief max command line IFX_CFG_SHELL_CMD_LINE_SIZE - 1 */
132 #endif
133
134 #ifndef IFX_CFG_SHELL_COMMAND_LISTS
135 #define IFX_CFG_SHELL_COMMAND_LISTS (1) /**<\brief Number of command lists */
136 #endif
137
138 #ifndef IFX_CFG_SHELL_PROMPT
139 #define IFX_CFG_SHELL_PROMPT "Shell>" /**<\brief Shell prompt */
140 #endif
141
142 #define SHELL_HELP_DESCRIPTION_TEXT \
143 " : Display command list, and command help."ENDL \
144 "/s help: show all commands"ENDL \
145 "/s help <command>: show the command details"
146
147 /** \brief Marker for end of command list, the end of list is detected by commandLine=NULL */
148 #define IFX_SHELL_COMMAND_LIST_END {0, 0, 0, 0}
149
150 /** \brief Marker for end of syntax list */
151 #define IFX_SHELL_SYNTAX_LIST_END {0, 0}
152
153 /** \brief Signifies no item in use in command history list */
154 #define IFX_SHELL_CMD_HISTORY_NO_ITEM (-1)
155 //----------------------------------------------------------------------------------------
156 /** \brief Result code definition used after each executed Shell command */
157 typedef enum
158 {
159 Ifx_Shell_ResultCode_unknown = (128),
160 Ifx_Shell_ResultCode_nok = (129),
161 Ifx_Shell_ResultCode_undefined = (130),
162 Ifx_Shell_ResultCode_ok = (255)
163 } Ifx_Shell_ResultCode;
164
165 /** \brief Definition of a callback function which handles a Shell command */
166 typedef boolean (*Ifx_Shell_Call)(pchar args, void *data, IfxStdIf_DPipe *io);
167
168 /** \brief Shell command object */
169 typedef struct
170 {
171 pchar commandLine;
172 pchar help;
173 void *data;
174 Ifx_Shell_Call call;
175 } Ifx_Shell_Command;
176
177 /** \brief Command line editing state */
178 typedef struct
179 {
180 char *cmdStr; /**< \brief Pointer to current string containing command line as so far processed */
181 Ifx_SizeT cursor; /**< \brief Pointer to variable containing position of cursor in so-far-processed command line */
182 Ifx_SizeT length; /**< \brief Pointer to variable containing total length of command line */
183 boolean historyAdd; /**< \brief If TRUE, when Enter is pressed, the current cmdLine should be added to the command history (in parent) */
184 Ifx_SizeT historyItem; /**< \brief Item ID in command history list, or IFX_SHELL_CMD_HISTORY_NO_ITEM if not using list (e.g. new command) */
185 } Ifx_Shell_CmdLine;
186
187 /** \brief Shell command processing state */
188 typedef enum
189 {
190 IFX_SHELL_CMD_STATE_NORMAL, /**< \brief Normal - no special sequences being processed */
191 IFX_SHELL_CMD_STATE_ESCAPE, /**< \brief Escape character has been pressed */
192 IFX_SHELL_CMD_STATE_ESCAPE_BRACKET, /**< \brief ESC [ pressed */
193 IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER /**< \brief ESC [ (number) pressed */
194 } Ifx_Shell_CmdState;
195
196 /** \brief Shell protocol configuration */
197 typedef struct
198 {
199 boolean (*start)(void *protocol, IfxStdIf_DPipe *io);
200 void (*execute)(void *protocol);
201 void (*onStart)(void *protocol, void *data);
202 void *onStartData;
203 void *object;
204 boolean started;
205 } Ifx_Shell_Protocol;
206
207 /** \brief Shell control flags */
208 typedef struct
209 {
210 uint16 showPrompt : 1;
211 uint16 enabled : 1;
212 uint16 sendResultCode : 1;
213 uint16 echo : 1;
214 uint16 echoError : 1;
215 } Ifx_Shell_Flags;
216
217 /** \brief internal Shell run-time data */
218 typedef struct
219 {
220 char echo[2];
221 char inputbuffer[IFX_CFG_SHELL_CMD_LINE_SIZE + 1];
222 char cmdStr[IFX_CFG_SHELL_CMD_LINE_SIZE];
223 Ifx_Shell_CmdState cmdState;
224 char escBracketNum;
225 } Ifx_Shell_Runtime;
226
227 typedef Ifx_Shell_Command *Ifx_Shell_CommandList;
228 typedef const Ifx_Shell_Command *Ifx_Shell_CommandListConst;
229 /**
230 * \brief Shell object definition
231 */
232 typedef struct
233 {
234 IfxStdIf_DPipe *io; /**< \brief Pointer to IfxStdIf_DPipe object used by the Shell */
235
236 Ifx_Shell_Flags control; /**< \brief control flags */
237
238 /** \brief Array of pointers to the history entries */
239 char *cmdHistory[IFX_CFG_SHELL_CMD_HISTORY_SIZE];
240
241 /** \brief Current status of command line editing (saves passing many parameters around) */
242 Ifx_Shell_CmdLine cmd;
243
244 Ifx_Shell_Runtime locals; /**< \brief Runtime data */
245
246 /** \brief Array of pointers to command list. The pointed location shall be constant
247 * during Shell lifetime, e.g. stored in non-volatile memory or as global variable
248 *
249 * The 1st item in the list is use as a group command prefix if its "call" parameter is NULL pointer, else it is use as other entries.
250 * In case "call" is NULL, the corresponding 'data' is ignored, and the 'help' is displayed.
251 *
252 **/
253 Ifx_Shell_CommandListConst commandList[IFX_CFG_SHELL_COMMAND_LISTS];
254
255 Ifx_Shell_Protocol protocol; /**< \brief Protocol handler data */
256 } Ifx_Shell;
257
258 /**
259 * \brief Shell configuration.
260 */
261 typedef struct
262 {
263 IfxStdIf_DPipe *standardIo; /**<\brief Pointer to a IfxStdIf_DPipe object used by the Shell */
264 boolean echo; /**<\brief Specifies whether each command shall be echoed back to user */
265 boolean showPrompt; /**<\brief Specifies whether the IFX_CFG_SHELL_PROMPT shall be displayed after each command */
266 boolean sendResultCode; /**<\brief Specifies whether the Ifx_Shell_ResultCode shall be sent to user */
267 Ifx_Shell_CommandListConst commandList[IFX_CFG_SHELL_COMMAND_LISTS]; /**< \brief Specifies pointer to the command list */
268 Ifx_Shell_Protocol protocol; /**<\brief Configuration for the Ifx_Shell_Protocol */
269 } Ifx_Shell_Config;
270
271 /**
272 * \brief Shell Syntax Description.
273 */
274 typedef struct
275 {
276 pchar syntax; /**<\brief syntax */
277 pchar description; /**<\brief description */
278 } Ifx_Shell_Syntax;
279
280 //----------------------------------------------------------------------------------------
281 /** \addtogroup library_srvsw_sysse_comm_shell
282 * \{ */
283
284 /** \name Basic functionality
285 * \{ */
286
287 /** Set the config default parameter
288 *
289 * \param config Pointer to the configuration structure to be initialized
290 */
291 void Ifx_Shell_initConfig(Ifx_Shell_Config *config);
292
293 /**
294 * \brief Initialize the shell
295 * \param shell Pointer to the \ref Ifx_Shell object
296 * \param config Pointer to the configuration structure
297 */
298 IFX_EXTERN boolean Ifx_Shell_init(Ifx_Shell *shell, const Ifx_Shell_Config *config);
299
300 /**
301 * \brief Deinitialise the shell
302 * \param shell Pointer to the \ref Ifx_Shell object
303 */
304 IFX_EXTERN void Ifx_Shell_deinit(Ifx_Shell *shell);
305
306 /**
307 * \brief Clear the receive buffer and enable the shell
308 * \param shell Pointer to the \ref Ifx_Shell object
309 */
310 IFX_EXTERN void Ifx_Shell_enable(Ifx_Shell *shell);
311
312 /**
313 * \brief Disable the shell
314 * \param shell Pointer to the \ref Ifx_Shell object
315 */
316 IFX_EXTERN void Ifx_Shell_disable(Ifx_Shell *shell);
317
318 /**
319 * \brief Process the shell.
320 *
321 * This function shall be called within a loop or periodic timer to guarantee the correct
322 * processing of the incoming/received data.
323 *
324 * \param shell Pointer to the \ref Ifx_Shell object
325 */
326 IFX_EXTERN void Ifx_Shell_process(Ifx_Shell *shell);
327
328 /** \} */
329 //----------------------------------------------------------------------------------------
330 /** \name Parsing functions
331 * \{ */
332
333 /**
334 * \brief Within the context of Shell.call, skip the whitespaces of the args string.
335 * \param args Pointer to the original string
336 * \return Pointer to the string after skipping the whitespaces
337 */
338 IFX_EXTERN pchar Ifx_Shell_skipWhitespace(pchar args);
339
340 /**
341 * \brief Match string pointed by the *argsPtr with a given token
342 * \param argsPtr Pointer to the argument null-terminated string
343 * \param token Pointer to the token string to match
344 * \retval TRUE if the given token match with the string pointed by argsPtr
345 */
346 IFX_EXTERN boolean Ifx_Shell_matchToken(pchar *argsPtr, pchar token);
347
348 /**
349 * \brief Parse a token
350 * Return the next token in tokenBuffer and move the argsPtr pointer after this token
351 * \param argsPtr Pointer to the argument null-terminated string
352 * \param tokenBuffer Pointer to the value storage
353 * \param bufferLength Maximum parsing length
354 */
355 IFX_EXTERN boolean Ifx_Shell_parseToken(pchar *argsPtr, char *tokenBuffer, int bufferLength);
356
357 /**
358 * \brief Parse an address
359 * \param argsPtr Pointer to the argument null-terminated string
360 * \param address Pointer to the value storage
361 */
362 IFX_EXTERN boolean Ifx_Shell_parseAddress(pchar *argsPtr, void **address);
363
364 /**
365 * \brief Parse a signed 32-bit integer value
366 * \param argsPtr Pointer to the argument null-terminated string
367 * \param value Pointer to the value storage
368 */
369 IFX_EXTERN boolean Ifx_Shell_parseSInt32(pchar *argsPtr, sint32 *value);
370
371 /**
372 * \brief Parse an unsigned 32-bit integer value
373 * \param argsPtr Pointer to the argument null-terminated string
374 * \param value Pointer to the value storage
375 * \param hex if TRUE, hex parsing will be done, else decimal parsing
376 */
377 IFX_EXTERN boolean Ifx_Shell_parseUInt32(pchar *argsPtr, uint32 *value, boolean hex);
378
379 /**
380 * \brief Parse a signed 64-bit integer value
381 * \param argsPtr Pointer to the argument null-terminated string
382 * \param value Pointer to the value storage
383 */
384 IFX_EXTERN boolean Ifx_Shell_parseSInt64(pchar *argsPtr, sint64 *value);
385
386 /**
387 * \brief Parse an unsigned 64-bit integer value
388 * \param argsPtr Pointer to the argument null-terminated string
389 * \param value Pointer to the value storage
390 * \param hex if TRUE, hex parsing will be done, else decimal parsing
391 */
392 IFX_EXTERN boolean Ifx_Shell_parseUInt64(pchar *argsPtr, uint64 *value, boolean hex);
393
394 /**
395 * \brief Parse a 64-bit (double precision) floating-point value
396 * \param argsPtr Pointer to the argument null-terminated string
397 * \param value Pointer to the value storage
398 */
399 IFX_EXTERN boolean Ifx_Shell_parseFloat64(pchar *argsPtr, float64 *value);
400
401 /**
402 * \brief Parse a 32-bit (single precision) floating-point value
403 * \param argsPtr Pointer to the argument null-terminated string
404 * \param value Pointer to the value storage
405 */
406 IFX_EXTERN boolean Ifx_Shell_parseFloat32(pchar *argsPtr, float32 *value);
407
408 /** \} */
409 //----------------------------------------------------------------------------------------
410 /** \name Command list functions
411 * \{ */
412
413 /**
414 * \brief Find command in command List
415 * \param commandList Pointer to the first entry of an array of \ref Ifx_Shell_Command
416 * \param commandLine Pointer to null-terminated string containings the command to search.
417 * \param args Pointer to the argument null-terminated string
418 * \param match Return the number of arguments that matches
419 */
420 IFX_EXTERN const Ifx_Shell_Command *Ifx_Shell_commandFind(Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match);
421
422 /**
423 * \brief Implementation of \ref Ifx_Shell_Call. Show the help menu from single command list.
424 * \param commandList Pointer to an array of Ifx_Shell_Command
425 * \param io Pointer to the IfxStdIf_DPipe object
426 * \param briefOnly if TRUE, show only the brief description, else show the full description
427 * \param singleCommand If TRUE, only show the 1st command pointed by commandList, else show the full list
428 */
429 IFX_EXTERN boolean Ifx_Shell_showHelpSingle(Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand);
430
431 /**
432 * \brief Implementation of \ref Ifx_Shell_Call. Show the help menu and list of commands.
433 * \param args The argument null-terminated string
434 * \param shellPtr Pointer to a Shell object
435 * \param io Pointer to \ref IfxStdIf_DPipe object
436 */
437 IFX_EXTERN boolean Ifx_Shell_showHelp(pchar args, void *shellPtr, IfxStdIf_DPipe *io);
438
439 /**
440 * \brief Implementation of \ref Ifx_Shell_Call. print the syntax.
441 * \param syntaxList Pointer to syntax list
442 * \param io Pointer to \ref IfxStdIf_DPipe object
443 */
444 IFX_EXTERN void Ifx_Shell_printSyntax(const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io);
445
446 /** \} */
447 //----------------------------------------------------------------------------------------
448 /** \name Sub protocol functions
449 * \{ */
450
451 /**
452 * \brief Implementation of \ref Ifx_Shell_Call. Start the Shell protocol.
453 * \param args The argument null-terminated string
454 * \param data Pointer to \ref Ifx_Shell object
455 * \param io Pointer to \ref IfxStdIf_DPipe object
456 */
457 IFX_EXTERN boolean Ifx_Shell_protocolStart(pchar args, void *data, IfxStdIf_DPipe *io);
458
459 /**
460 * \brief Implementation of \ref Ifx_Shell_Call. Start the ShellBb protocol.
461 * \param args The argument null-terminated string
462 * \param data Pointer to \ref Ifx_Shell object
463 * \param io Pointer to \ref IfxStdIf_DPipe object
464 */
465 IFX_EXTERN boolean Ifx_Shell_bbProtocolStart(pchar args, void *data, IfxStdIf_DPipe *io);
466
467 /** \} */
468 //----------------------------------------------------------------------------------------
469 /** \} */
470
471 #endif
Ifx_Shell::io
IfxStdIf_DPipe * io
Pointer to IfxStdIf_DPipe object used by the Shell.
Definition: Ifx_Shell.h:234
Ifx_Shell_Runtime::cmdState
Ifx_Shell_CmdState cmdState
Definition: Ifx_Shell.h:223
Ifx_Shell_Flags::enabled
uint16 enabled
Definition: Ifx_Shell.h:211
Ifx_Shell_parseUInt32
IFX_EXTERN boolean Ifx_Shell_parseUInt32(pchar *argsPtr, uint32 *value, boolean hex)
Parse an unsigned 32-bit integer value.
Definition: Ifx_Shell.c:829
Ifx_Shell::locals
Ifx_Shell_Runtime locals
Runtime data.
Definition: Ifx_Shell.h:244
Ifx_Shell_Command::help
pchar help
Definition: Ifx_Shell.h:172
Ifx_Shell_CmdLine::cmdStr
char * cmdStr
Pointer to current string containing command line as so far processed.
Definition: Ifx_Shell.h:180
Ifx_Shell::control
Ifx_Shell_Flags control
control flags
Definition: Ifx_Shell.h:236
Ifx_Shell_Flags::echoError
uint16 echoError
Definition: Ifx_Shell.h:214
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
Ifx_Shell_Command
Shell command object.
Definition: Ifx_Shell.h:169
Ifx_Shell_ResultCode_nok
Definition: Ifx_Shell.h:160
Ifx_Shell_skipWhitespace
IFX_EXTERN pchar Ifx_Shell_skipWhitespace(pchar args)
Within the context of Shell.call, skip the whitespaces of the args string.
Definition: Ifx_Shell.c:655
Ifx_Shell_CmdLine::historyAdd
boolean historyAdd
If TRUE, when Enter is pressed, the current cmdLine should be added to the command history (in parent...
Definition: Ifx_Shell.h:183
Ifx_Shell_Config::sendResultCode
boolean sendResultCode
Specifies whether the Ifx_Shell_ResultCode shall be sent to user.
Definition: Ifx_Shell.h:266
Ifx_Shell_Runtime
internal Shell run-time data
Definition: Ifx_Shell.h:218
Ifx_Shell::cmd
Ifx_Shell_CmdLine cmd
Current status of command line editing (saves passing many parameters around)
Definition: Ifx_Shell.h:242
Ifx_Shell_CommandListConst
const Ifx_Shell_Command * Ifx_Shell_CommandListConst
Definition: Ifx_Shell.h:228
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_Shell_ResultCode
Ifx_Shell_ResultCode
Result code definition used after each executed Shell command.
Definition: Ifx_Shell.h:157
float32
float float32
Definition: Platform_Types.h:170
Ifx_Shell_CmdState
Ifx_Shell_CmdState
Shell command processing state.
Definition: Ifx_Shell.h:188
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
Ifx_Shell_Call
boolean(* Ifx_Shell_Call)(pchar args, void *data, IfxStdIf_DPipe *io)
Definition of a callback function which handles a Shell command.
Definition: Ifx_Shell.h:166
Ifx_Shell_enable
IFX_EXTERN void Ifx_Shell_enable(Ifx_Shell *shell)
Clear the receive buffer and enable the shell.
Definition: Ifx_Shell.c:1307
Ifx_Shell_CmdLine
Command line editing state.
Definition: Ifx_Shell.h:178
Ifx_Shell_Flags
Shell control flags.
Definition: Ifx_Shell.h:208
Ifx_Shell_Syntax
Shell Syntax Description.
Definition: Ifx_Shell.h:274
Ifx_Shell_showHelpSingle
IFX_EXTERN boolean Ifx_Shell_showHelpSingle(Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
Implementation of Ifx_Shell_Call. Show the help menu from single command list.
Definition: Ifx_Shell.c:104
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
Ifx_Shell_commandFind
IFX_EXTERN const Ifx_Shell_Command * Ifx_Shell_commandFind(Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
Find command in command List.
Definition: Ifx_Shell.c:945
Ifx_Shell_Flags::sendResultCode
uint16 sendResultCode
Definition: Ifx_Shell.h:212
Ifx_Shell_parseFloat64
IFX_EXTERN boolean Ifx_Shell_parseFloat64(pchar *argsPtr, float64 *value)
Parse a 64-bit (double precision) floating-point value.
Definition: Ifx_Shell.c:905
Ifx_Shell_printSyntax
IFX_EXTERN void Ifx_Shell_printSyntax(const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. print the syntax.
Definition: Ifx_Shell.c:1322
Ifx_Shell_parseSInt64
IFX_EXTERN boolean Ifx_Shell_parseSInt64(pchar *argsPtr, sint64 *value)
Parse a signed 64-bit integer value.
Definition: Ifx_Shell.c:850
Ifx_Shell_parseSInt32
IFX_EXTERN boolean Ifx_Shell_parseSInt32(pchar *argsPtr, sint32 *value)
Parse a signed 32-bit integer value.
Definition: Ifx_Shell.c:808
Ifx_Shell_Runtime::escBracketNum
char escBracketNum
Definition: Ifx_Shell.h:224
Ifx_Shell_parseAddress
IFX_EXTERN boolean Ifx_Shell_parseAddress(pchar *argsPtr, void **address)
Parse an address.
Definition: Ifx_Shell.c:788
Ifx_Shell_protocolStart
IFX_EXTERN boolean Ifx_Shell_protocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the Shell protocol.
Definition: Ifx_Shell.c:253
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_Shell_CommandList
Ifx_Shell_Command * Ifx_Shell_CommandList
Definition: Ifx_Shell.h:227
Ifx_Shell_Syntax::description
pchar description
description
Definition: Ifx_Shell.h:277
Ifx_Shell::protocol
Ifx_Shell_Protocol protocol
Protocol handler data.
Definition: Ifx_Shell.h:255
Ifx_Shell_Config::echo
boolean echo
Specifies whether each command shall be echoed back to user.
Definition: Ifx_Shell.h:264
Ifx_Shell_parseToken
IFX_EXTERN boolean Ifx_Shell_parseToken(pchar *argsPtr, char *tokenBuffer, int bufferLength)
Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token...
Definition: Ifx_Shell.c:721
Ifx_Shell_parseFloat32
IFX_EXTERN boolean Ifx_Shell_parseFloat32(pchar *argsPtr, float32 *value)
Parse a 32-bit (single precision) floating-point value.
Definition: Ifx_Shell.c:925
Ifx_Shell_Protocol::onStartData
void * onStartData
Definition: Ifx_Shell.h:202
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
IFX_CFG_SHELL_CMD_HISTORY_SIZE
#define IFX_CFG_SHELL_CMD_HISTORY_SIZE
Number of commands to store in history.
Definition: Ifx_Shell.h:127
Ifx_Shell_Command::call
Ifx_Shell_Call call
Definition: Ifx_Shell.h:174
sint64
long long sint64
Definition: Platform_Types.h:141
Ifx_Shell_init
IFX_EXTERN boolean Ifx_Shell_init(Ifx_Shell *shell, const Ifx_Shell_Config *config)
Initialize the shell.
Definition: Ifx_Shell.c:331
Ifx_Shell_ResultCode_ok
Definition: Ifx_Shell.h:162
Ifx_Shell_ResultCode_undefined
Definition: Ifx_Shell.h:161
Ifx_Shell_Command::data
void * data
Definition: Ifx_Shell.h:173
boolean
unsigned char boolean
Definition: Platform_Types.h:104
Ifx_Shell_CmdLine::historyItem
Ifx_SizeT historyItem
Item ID in command history list, or IFX_SHELL_CMD_HISTORY_NO_ITEM if not using list (e...
Definition: Ifx_Shell.h:184
Ifx_Shell_Config::standardIo
IfxStdIf_DPipe * standardIo
Pointer to a IfxStdIf_DPipe object used by the Shell.
Definition: Ifx_Shell.h:263
Ifx_Shell_Config
Shell configuration.
Definition: Ifx_Shell.h:261
Ifx_Shell_Protocol::object
void * object
Definition: Ifx_Shell.h:203
float64
double float64
Definition: Platform_Types.h:175
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_Shell_bbProtocolStart
IFX_EXTERN boolean Ifx_Shell_bbProtocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the ShellBb protocol.
Definition: Ifx_Shell.c:287
Ifx_Shell_Config::showPrompt
boolean showPrompt
Specifies whether the IFX_CFG_SHELL_PROMPT shall be displayed after each command. ...
Definition: Ifx_Shell.h:265
Ifx_Shell_Syntax::syntax
pchar syntax
syntax
Definition: Ifx_Shell.h:276
Ifx_Shell_matchToken
IFX_EXTERN boolean Ifx_Shell_matchToken(pchar *argsPtr, pchar token)
Match string pointed by the *argsPtr with a given token.
Definition: Ifx_Shell.c:669
Ifx_Shell_Flags::echo
uint16 echo
Definition: Ifx_Shell.h:213
Ifx_Shell_showHelp
IFX_EXTERN boolean Ifx_Shell_showHelp(pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Show the help menu and list of commands.
Definition: Ifx_Shell.c:228
Ifx_Shell_initConfig
void Ifx_Shell_initConfig(Ifx_Shell_Config *config)
Definition: Ifx_Shell.c:308
IFX_CFG_SHELL_CMD_LINE_SIZE
#define IFX_CFG_SHELL_CMD_LINE_SIZE
max command line IFX_CFG_SHELL_CMD_LINE_SIZE - 1
Definition: Ifx_Shell.h:131
sint32
long sint32
Definition: Platform_Types.h:134
IFX_SHELL_CMD_STATE_NORMAL
Normal - no special sequences being processed.
Definition: Ifx_Shell.h:190
IFX_SHELL_CMD_STATE_ESCAPE
Escape character has been pressed.
Definition: Ifx_Shell.h:191
Ifx_Shell_Flags::showPrompt
uint16 showPrompt
Definition: Ifx_Shell.h:210
Ifx_Shell_CmdLine::length
Ifx_SizeT length
Pointer to variable containing total length of command line.
Definition: Ifx_Shell.h:182
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER
ESC [ (number) pressed.
Definition: Ifx_Shell.h:193
Ifx_Shell_CmdLine::cursor
Ifx_SizeT cursor
Pointer to variable containing position of cursor in so-far-processed command line.
Definition: Ifx_Shell.h:181
Ifx_Shell_Command::commandLine
pchar commandLine
Definition: Ifx_Shell.h:171
Ifx_Shell_Protocol
Shell protocol configuration.
Definition: Ifx_Shell.h:197
Ifx_Shell_ResultCode_unknown
Definition: Ifx_Shell.h:159
Ifx_Shell_parseUInt64
IFX_EXTERN boolean Ifx_Shell_parseUInt64(pchar *argsPtr, uint64 *value, boolean hex)
Parse an unsigned 64-bit integer value.
Definition: Ifx_Shell.c:870
Ifx_Shell_deinit
IFX_EXTERN void Ifx_Shell_deinit(Ifx_Shell *shell)
Deinitialise the shell.
Definition: Ifx_Shell.c:648
Ifx_Shell_process
IFX_EXTERN void Ifx_Shell_process(Ifx_Shell *shell)
Process the shell.
Definition: Ifx_Shell.c:388
Ifx_Shell_disable
IFX_EXTERN void Ifx_Shell_disable(Ifx_Shell *shell)
Disable the shell.
Definition: Ifx_Shell.c:1316
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET
ESC [ pressed.
Definition: Ifx_Shell.h:192
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
Ifx_Shell_Protocol::started
boolean started
Definition: Ifx_Shell.h:204
Ifx_Shell
Shell object definition.
Definition: Ifx_Shell.h:232
IFX_CFG_SHELL_COMMAND_LISTS
#define IFX_CFG_SHELL_COMMAND_LISTS
Number of command lists.
Definition: Ifx_Shell.h:135


iLLD_TC26B: Ifx_Types.h Source File

  • Cpu
  • Std
Ifx_Types.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Types.h
3 * \brief This files defines all types used by the IFX HAL and libraries
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #ifndef IFX_TYPES_H
43 #define IFX_TYPES_H 1
44
45 /******************************************************************************/
46 #include "Tricore/Compilers/Compilers.h" /* mapping compiler specific keywords */
47 #include "Platform_Types.h"
48
49 /*******************************************************************************
50 ** Global Data Types **
51 ** (Types not defined by AUTOSAR) **
52 *******************************************************************************/
53 typedef const char *pchar; /**< \brief const char pointer */
54 typedef void *pvoid; /**< \brief void pointer */
55 typedef volatile void *vvoid; /**< \brief volatile void pointer */
56 typedef void (*voidfuncvoid) (void); /**< \brief void pointer which takes void argument */
57
58 typedef struct
59 {
60 float32 real; /**< \brief Real part */
61 float32 imag; /**< \brief Imaginary part */
62 } cfloat32;
63
64 typedef struct
65 {
66 sint32 real; /**< \brief Real part */
67 sint32 imag; /**< \brief Imaginary part */
68 } csint32;
69
70 typedef struct
71 {
72 sint16 real; /**< \brief Real part */
73 sint16 imag; /**< \brief Imaginary part */
74 } csint16;
75
76 typedef sint64 Ifx_TickTime; /**< \brief Time in ticks */
77 #define TIME_INFINITE ((Ifx_TickTime)0x7FFFFFFFFFFFFFFFLL)
78 #define TIME_NULL ((Ifx_TickTime)0x0000000000000000LL)
79
80 #define IFX_ONES (0xFFFFFFFFFFFFFFFFU)
81 #define IFX_ZEROS (0x0000000000000000U)
82
83
84 #if CFG_LONG_SIZE_T
85 #define IFX_SIZET_MAX (0x7FFFFFFFL)
86 typedef sint32 Ifx_SizeT; /**< \brief Type used for data stream size */
87 #else
88 #define IFX_SIZET_MAX (0x7FFF)
89 typedef sint16 Ifx_SizeT; /**< \brief Type used for data stream size */
90 #endif
91
92 /** \brief Circular buffer definition. */
93 typedef struct
94 {
95 void *base; /**< \brief buffer base address */
96 uint16 index; /**< \brief buffer current index */
97 uint16 length; /**< \brief buffer length*/
98 } Ifx_CircularBuffer;
99
100 typedef uint16 Ifx_Priority; /**< \brief Used in interrupt service priorities */
101 typedef uint32 Ifx_TimerValue; /**< \brief Used in timer values */
102 typedef sint32 Ifx_SignedTimerVal; /**< \brief Used in signed timer values */
103
104 typedef pvoid Ifx_AddressValue; /**< \brief Used in address values */
105
106 typedef struct
107 {
108 uint16 priority;
109 uint16 provider;
110 } Ifx_IsrSetting;
111
112 /** \brief Signal active state definition. */
113 typedef enum
114 {
115 Ifx_ActiveState_low = 0, /**< \brief The signal is low active */
116 Ifx_ActiveState_high = 1 /**< \brief The signal is high active */
117 } Ifx_ActiveState;
118
119 typedef enum
120 {
121 Ifx_ParityMode_even = 0,
122 Ifx_ParityMode_odd = 1
123 } Ifx_ParityMode;
124
125 /** \brief input multiplexer definition used in PinMaps
126 */
127 typedef enum
128 {
129 Ifx_RxSel_a,
130 Ifx_RxSel_b,
131 Ifx_RxSel_c,
132 Ifx_RxSel_d,
133 Ifx_RxSel_e,
134 Ifx_RxSel_f,
135 Ifx_RxSel_g,
136 Ifx_RxSel_h
137 } Ifx_RxSel;
138
139 /** \brief Module address and index map */
140 typedef struct
141 {
142 volatile void *module; /**< \brief Module address */
143 sint32 index; /**< \brief Module index */
144 } IfxModule_IndexMap;
145
146 typedef struct
147 {
148 Ifx_TickTime timestamp;
149 uint8 data;
150 }Ifx_DataBufferMode_TimeStampSingle;
151
152 /*
153 * typedef struct
154 * {
155 * Ifx_TickTime timestamp;
156 * uint8 count[1]; // Number of valid data
157 * uint8 data[7];
158 * }Ifx_DataBufferMode_TimeStampBurst;
159 */
160
161 typedef enum
162 {
163 Ifx_DataBufferMode_normal = 0, /**< \brief normal mode, each received byte is moved to the rx fifo */
164 Ifx_DataBufferMode_timeStampSingle, /**< \brief Single byte type stamp mode. The rx fifo is filled in with Ifx_DataBufferMode_TimeStampSingle items. */
165 // Ifx_DataBufferMode_timeStameBurst /**< \brief Burst byte type stamp mode. The rx fifo is filled in with Ifx_DataBufferMode_TimeStampBurst items. */
166 }Ifx_DataBufferMode;
167
168 /**
169 * Defines the PWM modes
170 *
171 * The 1st member shall start with value 0, and the next members value shall be the previous member +1
172 * pwmMode_off shall be the member with the higher index
173 * \note enum order and values should not be modified, except Ifx_Pwm_Mode_init and Ifx_Pwm_Mode_count
174 */
175 typedef enum
176 {
177 Ifx_Pwm_Mode_centerAligned = 0, /**< \brief Center aligned mode */
178 Ifx_Pwm_Mode_centerAlignedInverted = 1, /**< \brief Center aligned inverted aligned mode */
179 Ifx_Pwm_Mode_leftAligned = 2, /**< \brief Left aligned mode. The PWM period starts with a rising edge */
180 Ifx_Pwm_Mode_rightAligned = 3, /**< \brief Right aligned mode. The PWM period starts with a falling edge*/
181 Ifx_Pwm_Mode_off = 4, /**< \brief All switch open */
182 Ifx_Pwm_Mode_init = 5, /**< \brief Initialisation mode, do not use at run time */
183 Ifx_Pwm_Mode_count /**< \brief Number of defined modes */
184 } Ifx_Pwm_Mode;
185
186 #ifdef __DCC__
187 #include "Ifx_TypesDcc.h"
188
189 #elif defined(__TASKING__)
190 #include "Ifx_TypesTasking.h"
191
192 #elif defined(__HIGHTEC__)
193 #include "Ifx_TypesGnuc.h"
194
195 #elif defined(__ghs__)
196 #include "Ifx_TypesGhs.h"
197
198 #elif defined(__MSVC__)
199 #include "Ifx_TypesMsvc.h"
200 #else
201 #error Unsupported compiler.
202 #endif
203
204
205 typedef struct
206 {
207 fract real; /**< \brief Real part */
208 fract imag; /**< \brief Imaginary part */
209 } cfract;
210
211 typedef struct
212 {
213 sfract real; /**< \brief Real part */
214 sfract imag; /**< \brief Imaginary part */
215 } csfract;
216
217 #define IFX_PI (3.1415926535897932384626433832795f)
218 #define IFX_TWO_OVER_PI (2.0 / IFX_PI)
219 #define IFX_ONE_OVER_SQRT_THREE (0.57735026918962576450914878050196f)
220 #define IFX_SQRT_TWO (1.4142135623730950488016887242097f)
221 #define IFX_SQRT_THREE (1.7320508075688772935274463415059f)
222 #define IFX_UNUSED_PARAMETER(x) if(x){} /**< \brief Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(but function signature maintained for legacy purposes). Another use case being usage of intrinsics wherein the compiler ignores it and copy pastes the statements using intrinsics directly to the object file and hence usage of arguments isn't visible to it.(eg: __mfcr() etc) */
223
224 #endif /* IFX_TYPES_H */
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
Ifx_SignedTimerVal
sint32 Ifx_SignedTimerVal
Used in signed timer values.
Definition: Ifx_Types.h:102
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
Ifx_RxSel_e
Definition: Ifx_Types.h:133
Ifx_RxSel_d
Definition: Ifx_Types.h:132
csfract
Definition: Ifx_Types.h:211
Ifx_DataBufferMode
Ifx_DataBufferMode
Definition: Ifx_Types.h:161
Ifx_RxSel_g
Definition: Ifx_Types.h:135
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
Ifx_CircularBuffer::length
uint16 length
buffer length
Definition: Ifx_Types.h:97
Ifx_DataBufferMode_TimeStampSingle::data
uint8 data
Definition: Ifx_Types.h:149
sfract
short sfract
Definition: Ifx_TypesDcc.h:45
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
csint32::imag
sint32 imag
Imaginary part.
Definition: Ifx_Types.h:67
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_ParityMode_even
Definition: Ifx_Types.h:121
float32
float float32
Definition: Platform_Types.h:170
Ifx_DataBufferMode_normal
normal mode, each received byte is moved to the rx fifo
Definition: Ifx_Types.h:163
Ifx_RxSel_a
Definition: Ifx_Types.h:129
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
pvoid
void * pvoid
void pointer
Definition: Ifx_Types.h:54
Ifx_DataBufferMode_timeStampSingle
Single byte type stamp mode. The rx fifo is filled in with Ifx_DataBufferMode_TimeStampSingle items...
Definition: Ifx_Types.h:164
Ifx_CircularBuffer::base
void * base
buffer base address
Definition: Ifx_Types.h:95
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
Ifx_TypesGhs.h
Ifx_Pwm_Mode_count
Number of defined modes.
Definition: Ifx_Types.h:183
Ifx_DataBufferMode_TimeStampSingle
Definition: Ifx_Types.h:146
Ifx_RxSel_h
Definition: Ifx_Types.h:136
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:61
Ifx_RxSel_b
Definition: Ifx_Types.h:130
cfloat32
Definition: Ifx_Types.h:58
sint16
short sint16
Definition: Platform_Types.h:129
Ifx_IsrSetting
Definition: Ifx_Types.h:106
fract
long fract
Definition: Ifx_TypesDcc.h:44
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
Ifx_IsrSetting::priority
uint16 priority
Definition: Ifx_Types.h:108
Ifx_Pwm_Mode_init
Initialisation mode, do not use at run time.
Definition: Ifx_Types.h:182
IfxModule_IndexMap::module
volatile void * module
Module address.
Definition: Ifx_Types.h:142
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:60
Ifx_CircularBuffer
Circular buffer definition.
Definition: Ifx_Types.h:93
csfract::real
sfract real
Real part.
Definition: Ifx_Types.h:213
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
Ifx_RxSel_c
Definition: Ifx_Types.h:131
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
Ifx_DataBufferMode_TimeStampSingle::timestamp
Ifx_TickTime timestamp
Definition: Ifx_Types.h:148
csint16::real
sint16 real
Real part.
Definition: Ifx_Types.h:72
csint32::real
sint32 real
Real part.
Definition: Ifx_Types.h:66
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
Ifx_TypesGnuc.h
cfract::real
fract real
Real part.
Definition: Ifx_Types.h:207
sint64
long long sint64
Definition: Platform_Types.h:141
Platform_Types.h
Ifx_AddressValue
pvoid Ifx_AddressValue
Used in address values.
Definition: Ifx_Types.h:104
voidfuncvoid
void(* voidfuncvoid)(void)
void pointer which takes void argument
Definition: Ifx_Types.h:56
cfract::imag
fract imag
Imaginary part.
Definition: Ifx_Types.h:208
Compilers.h
Ifx_RxSel_f
Definition: Ifx_Types.h:134
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
csfract::imag
sfract imag
Imaginary part.
Definition: Ifx_Types.h:214
sint32
long sint32
Definition: Platform_Types.h:134
Ifx_IsrSetting::provider
uint16 provider
Definition: Ifx_Types.h:109
Ifx_TypesDcc.h
csint16
Definition: Ifx_Types.h:70
csint32
Definition: Ifx_Types.h:64
vvoid
volatile void * vvoid
volatile void pointer
Definition: Ifx_Types.h:55
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
Ifx_ParityMode_odd
Definition: Ifx_Types.h:122
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
Ifx_CircularBuffer::index
uint16 index
buffer current index
Definition: Ifx_Types.h:96
IfxModule_IndexMap::index
sint32 index
Module index.
Definition: Ifx_Types.h:143
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx_ParityMode
Ifx_ParityMode
Definition: Ifx_Types.h:119
csint16::imag
sint16 imag
Imaginary part.
Definition: Ifx_Types.h:73
Ifx_TypesTasking.h
cfract
Definition: Ifx_Types.h:205


iLLD_TC26B: Ifx_TypesDcc.h Source File

  • Cpu
  • Std
Ifx_TypesDcc.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_TypesDcc.h
3 * \version iLLD_1_0_1_12_0
4 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 * IMPORTANT NOTICE
8 *
9 * Use of this file is subject to the terms of use agreed between (i) you or
10 * the company in which ordinary course of business you are acting and (ii)
11 * Infineon Technologies AG or its licensees. If and as long as no such terms
12 * of use are agreed, use of this file is subject to following:
13 *
14 * Boost Software License - Version 1.0 - August 17th, 2003
15 *
16 * Permission is hereby granted, free of charge, to any person or organization
17 * obtaining a copy of the software and accompanying documentation covered by
18 * this license (the "Software") to use, reproduce, display, distribute,
19 * execute, and transmit the Software, and to prepare derivative works of the
20 * Software, and to permit third-parties to whom the Software is furnished to
21 * do so, all subject to the following:
22 *
23 * The copyright notices in the Software and this entire statement, including
24 * the above license grant, this restriction and the following disclaimer, must
25 * be included in all copies of the Software, in whole or in part, and all
26 * derivative works of the Software, unless such copies or derivative works are
27 * solely in the form of machine-executable object code generated by a source
28 * language processor.
29 *
30 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
31 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
32 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
33 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
34 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
35 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
36 * DEALINGS IN THE SOFTWARE.
37 *
38 */
39 #ifndef IFX_TYPESDDC_H_
40 #define IFX_TYPESDDC_H_
41 /******************************************************************************/
42 #define FRACT_MAX 0x7fffffff
43
44 typedef long fract;
45 typedef short sfract;
46 typedef long long laccum;
47 typedef long __packb; //MSMRK should be struct of four chars
48 typedef unsigned long __upackb; //MSMRK should be struct of four unsigned chars
49 typedef long __packhw; //MSMRK should be struct of two shorts
50 typedef unsigned long __upackhw; //MSMRK should be struct of two unsigned shorts
51
52 typedef unsigned long long circ_t;
53
54 /******************************************************************************/
55 #endif /* IFX_TYPESDDC_H_ */
__packb
long __packb
Definition: Ifx_TypesDcc.h:47
sfract
short sfract
Definition: Ifx_TypesDcc.h:45
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesDcc.h:50
circ_t
unsigned long long circ_t
Definition: Ifx_TypesDcc.h:52
__packhw
long __packhw
Definition: Ifx_TypesDcc.h:49
fract
long fract
Definition: Ifx_TypesDcc.h:44
laccum
long long laccum
Definition: Ifx_TypesDcc.h:46
__upackb
unsigned long __upackb
Definition: Ifx_TypesDcc.h:48


iLLD_TC26B: Ifx_TypesGhs.h Source File

  • Cpu
  • Std
Ifx_TypesGhs.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_TypesGhs.h
3 * \version iLLD_1_0_1_12_0
4 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 * IMPORTANT NOTICE
8 *
9 * Use of this file is subject to the terms of use agreed between (i) you or
10 * the company in which ordinary course of business you are acting and (ii)
11 * Infineon Technologies AG or its licensees. If and as long as no such terms
12 * of use are agreed, use of this file is subject to following:
13 *
14 * Boost Software License - Version 1.0 - August 17th, 2003
15 *
16 * Permission is hereby granted, free of charge, to any person or organization
17 * obtaining a copy of the software and accompanying documentation covered by
18 * this license (the "Software") to use, reproduce, display, distribute,
19 * execute, and transmit the Software, and to prepare derivative works of the
20 * Software, and to permit third-parties to whom the Software is furnished to
21 * do so, all subject to the following:
22 *
23 * The copyright notices in the Software and this entire statement, including
24 * the above license grant, this restriction and the following disclaimer, must
25 * be included in all copies of the Software, in whole or in part, and all
26 * derivative works of the Software, unless such copies or derivative works are
27 * solely in the form of machine-executable object code generated by a source
28 * language processor.
29 *
30 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
31 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
32 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
33 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
34 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
35 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
36 * DEALINGS IN THE SOFTWARE.
37 *
38 */
39 #ifndef IFX_TYPESGHS_H_
40 #define IFX_TYPESGHS_H_
41 /******************************************************************************/
42 #define FRACT_MAX 0x7fffffff
43
44 #define __interrupt(intno)
45
46 typedef long fract;
47 typedef short sfract;
48 typedef long long laccum;
49 typedef long __packb; //MSMRK should be struct of four chars
50 typedef unsigned long __upackb; //MSMRK should be struct of four unsigned chars
51 typedef long __packhw; //MSMRK should be struct of two shorts
52 typedef unsigned long __upackhw; //MSMRK should be struct of two unsigned shorts
53 /******************************************************************************/
54
55 #endif /* IFX_TYPESGHS_H_ */
sfract
short sfract
Definition: Ifx_TypesGhs.h:47
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesGhs.h:52
__packhw
long __packhw
Definition: Ifx_TypesGhs.h:51
__packb
long __packb
Definition: Ifx_TypesGhs.h:49
laccum
long long laccum
Definition: Ifx_TypesGhs.h:48
fract
long fract
Definition: Ifx_TypesGhs.h:46
__upackb
unsigned long __upackb
Definition: Ifx_TypesGhs.h:50


iLLD_TC26B: Ifx_TypesGnuc.h Source File

  • Cpu
  • Std
Ifx_TypesGnuc.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_TypesGnuc.h
3 * \version iLLD_1_0_1_12_0
4 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 * IMPORTANT NOTICE
8 *
9 * Use of this file is subject to the terms of use agreed between (i) you or
10 * the company in which ordinary course of business you are acting and (ii)
11 * Infineon Technologies AG or its licensees. If and as long as no such terms
12 * of use are agreed, use of this file is subject to following:
13 *
14 * Boost Software License - Version 1.0 - August 17th, 2003
15 *
16 * Permission is hereby granted, free of charge, to any person or organization
17 * obtaining a copy of the software and accompanying documentation covered by
18 * this license (the "Software") to use, reproduce, display, distribute,
19 * execute, and transmit the Software, and to prepare derivative works of the
20 * Software, and to permit third-parties to whom the Software is furnished to
21 * do so, all subject to the following:
22 *
23 * The copyright notices in the Software and this entire statement, including
24 * the above license grant, this restriction and the following disclaimer, must
25 * be included in all copies of the Software, in whole or in part, and all
26 * derivative works of the Software, unless such copies or derivative works are
27 * solely in the form of machine-executable object code generated by a source
28 * language processor.
29 *
30 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
31 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
32 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
33 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
34 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
35 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
36 * DEALINGS IN THE SOFTWARE.
37 *
38 */
39 #ifndef IFX_TYPESGNUC_H_
40 #define IFX_TYPESGNUC_H_
41 /******************************************************************************/
42 #define FRACT_MAX 0x7fffffff
43
44 #include <machine/cint.h>
45 #define __interrupt(intno)
46
47 typedef long fract;
48 typedef short sfract;
49 typedef long long laccum;
50 typedef long __packb; //MSMRK should be struct of four chars
51 typedef unsigned long __upackb; //MSMRK should be struct of four unsigned chars
52 typedef long __packhw; //MSMRK should be struct of two shorts
53 typedef unsigned long __upackhw; //MSMRK should be struct of two unsigned shorts
54 /******************************************************************************/
55
56 #endif /* IFX_TYPESGNUC_H_ */
laccum
long long laccum
Definition: Ifx_TypesGnuc.h:49
__packb
long __packb
Definition: Ifx_TypesGnuc.h:50
__upackb
unsigned long __upackb
Definition: Ifx_TypesGnuc.h:51
sfract
short sfract
Definition: Ifx_TypesGnuc.h:48
__packhw
long __packhw
Definition: Ifx_TypesGnuc.h:52
fract
long fract
Definition: Ifx_TypesGnuc.h:47
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesGnuc.h:53


iLLD_TC26B: Ifx_TypesTasking.h Source File

  • Cpu
  • Std
Ifx_TypesTasking.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_TypesTasking.h
3 * \version iLLD_1_0_1_12_0
4 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 * IMPORTANT NOTICE
8 *
9 * Use of this file is subject to the terms of use agreed between (i) you or
10 * the company in which ordinary course of business you are acting and (ii)
11 * Infineon Technologies AG or its licensees. If and as long as no such terms
12 * of use are agreed, use of this file is subject to following:
13 *
14 * Boost Software License - Version 1.0 - August 17th, 2003
15 *
16 * Permission is hereby granted, free of charge, to any person or organization
17 * obtaining a copy of the software and accompanying documentation covered by
18 * this license (the "Software") to use, reproduce, display, distribute,
19 * execute, and transmit the Software, and to prepare derivative works of the
20 * Software, and to permit third-parties to whom the Software is furnished to
21 * do so, all subject to the following:
22 *
23 * The copyright notices in the Software and this entire statement, including
24 * the above license grant, this restriction and the following disclaimer, must
25 * be included in all copies of the Software, in whole or in part, and all
26 * derivative works of the Software, unless such copies or derivative works are
27 * solely in the form of machine-executable object code generated by a source
28 * language processor.
29 *
30 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
31 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
32 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
33 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
34 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
35 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
36 * DEALINGS IN THE SOFTWARE.
37 *
38 */
39 #ifndef IFX_TYPESTASKING_H_
40 #define IFX_TYPESTASKING_H_
41 /******************************************************************************/
42 #define fract __fract // see http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1169.pdf
43 #define sfract __sfract // see http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1169.pdf
44 #define laccum __laccum
45 #define __asm__ __asm
46 /******************************************************************************/
47
48 /******************************************************************************/
49
50 #endif /* IFX_TYPESTASKING_H_ */


iLLD_TC26B: Ifx_WndF32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_WndF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_WndF32.h
3 * \brief Windowing function
4 * \ingroup library_srvsw_sysse_math_f32_wnd
5 *
6 *
7 *
8 * \version disabled
9 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
10 *
11 *
12 * IMPORTANT NOTICE
13 *
14 * Use of this file is subject to the terms of use agreed between (i) you or
15 * the company in which ordinary course of business you are acting and (ii)
16 * Infineon Technologies AG or its licensees. If and as long as no such terms
17 * of use are agreed, use of this file is subject to following:
18 *
19 * Boost Software License - Version 1.0 - August 17th, 2003
20 *
21 * Permission is hereby granted, free of charge, to any person or organization
22 * obtaining a copy of the software and accompanying documentation covered by
23 * this license (the "Software") to use, reproduce, display, distribute,
24 * execute, and transmit the Software, and to prepare derivative works of the
25 * Software, and to permit third-parties to whom the Software is furnished to
26 * do so, all subject to the following:
27 *
28 * The copyright notices in the Software and this entire statement, including
29 * the above license grant, this restriction and the following disclaimer, must
30 * be included in all copies of the Software, in whole or in part, and all
31 * derivative works of the Software, unless such copies or derivative works are
32 * solely in the form of machine-executable object code generated by a source
33 * language processor.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
36 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
37 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
38 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
39 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
40 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
41 * DEALINGS IN THE SOFTWARE.
42 *
43 * \defgroup library_srvsw_sysse_math_f32_wnd Window functions
44 * \ingroup library_srvsw_sysse_math_f32
45 */
46
47 #ifndef IFX_WNDF32_H
48 #define IFX_WNDF32_H
49
50 #include "Ifx_Cf32.h"
51
52 #define IFX_WNDF32_TABLE_LENGTH (1024)
53
54 /** \addtogroup library_srvsw_sysse_math_f32_wnd
55 * \{ */
56
57 IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_hannTable[IFX_WNDF32_TABLE_LENGTH / 2];
58 IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[IFX_WNDF32_TABLE_LENGTH / 2];
59
60 /** \brief Apply a window to complex array x which has nX length.
61 *
62 * Example: Ifx_WndF32_apply(x, Ifx_g_WndF32_hannTable, 1024); */
63 IFX_INLINE void Ifx_WndF32_apply(cfloat32 *x, CONST_CFG float32 *window, short nX)
64 {
65 VecWin_f32(&x->real, window, nX, IFX_WNDF32_TABLE_LENGTH, 2, 1);
66 }
67
68
69 /** \} */
70
71 #endif /* IFX_WNDF32_H */
IFX_WNDF32_TABLE_LENGTH
#define IFX_WNDF32_TABLE_LENGTH
Definition: Ifx_WndF32.h:52
Ifx_g_WndF32_hannTable
IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_hannTable[IFX_WNDF32_TABLE_LENGTH/2]
Definition: Ifx_WndF32.h:57
VecWin_f32
void VecWin_f32(float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)
Definition: Ifx_Cf32.c:285
float32
float float32
Definition: Platform_Types.h:170
Ifx_g_WndF32_blackmanHarrisTable
IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[IFX_WNDF32_TABLE_LENGTH/2]
Definition: Ifx_WndF32.h:58
cfloat32
Definition: Ifx_Types.h:58
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:60
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
Ifx_WndF32_apply
IFX_INLINE void Ifx_WndF32_apply(cfloat32 *x, CONST_CFG float32 *window, short nX)
Apply a window to complex array x which has nX length.
Definition: Ifx_WndF32.h:63
CONST_CFG
#define CONST_CFG
Definition: Compilers.h:57


iLLD_TC26B: Ifx_WndF32_BlackmanHarrisTable.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_WndF32_BlackmanHarrisTable.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_WndF32_BlackmanHarrisTable.c
3 * \brief Lookup table for Blackman-Harris window function
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "Ifx_WndF32.h"
44
45 #if IFX_WNDF32_TABLE_LENGTH != 1024
46 #error This was generated with IFX_WNDF32_TABLE_LENGTH = 1024. Please regenerate.
47 #endif
48
49 CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[(IFX_WNDF32_TABLE_LENGTH / 2)] = {
50 _DATAF(0.000060000000000001),
51 _DATAF(6.05336435769415E-05),
52 _DATAF(6.21351621010909E-05),
53 _DATAF(6.48063189517042E-05),
54 _DATAF(6.85500530901977E-05),
55 _DATAF(7.33704790552552E-05),
56 _DATAF(7.92728869546643E-05),
57 _DATAF(8.62637424542366E-05),
58 _DATAF(9.43506867646833E-05),
59 _DATAF(0.000103542536623254),
60 _DATAF(0.000113849284272844),
61 _DATAF(0.00012528209743509),
62 _DATAF(0.000137853319279022),
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556 _DATAF(0.99933918570529),
557 _DATAF(0.999557592361884),
558 _DATAF(0.999732349222509),
559 _DATAF(0.999863435266309),
560 _DATAF(0.999950834724255),
561 _DATAF(0.999994537082046),
562 };
Ifx_WndF32.h
Windowing function.
IFX_WNDF32_TABLE_LENGTH
#define IFX_WNDF32_TABLE_LENGTH
Definition: Ifx_WndF32.h:52
float32
float float32
Definition: Platform_Types.h:170
Ifx_g_WndF32_blackmanHarrisTable
CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[(IFX_WNDF32_TABLE_LENGTH/2)]
Definition: Ifx_WndF32_BlackmanHarrisTable.c:49
CONST_CFG
#define CONST_CFG
Definition: Compilers.h:57
_DATAF
#define _DATAF(val)
Definition: Ifx_Cf32.h:51


iLLD_TC26B: Ifx_WndF32_HannTable.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_WndF32_HannTable.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_WndF32_HannTable.c
3 * \brief Lookup table for Hann window function
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "Ifx_WndF32.h"
44
45 #if IFX_WNDF32_TABLE_LENGTH != 1024
46 #error This was generated with IFX_WNDF32_TABLE_LENGTH = 1024. Please regenerate.
47 #endif
48
49 CONST_CFG float32 Ifx_g_WndF32_hannTable[(IFX_WNDF32_TABLE_LENGTH / 2)] = {
50 _DATAF(0.00000000000000000000),
51 _DATAF(0.00000943076884141192),
52 _DATAF(0.00003772272248170339),
53 _DATAF(0.00008487478771712631),
54 _DATAF(0.00015088518557604402),
55 _DATAF(0.00023575144587084651),
56 _DATAF(0.00033947033807635307),
57 _DATAF(0.00046203794772736728),
58 _DATAF(0.00060344970552250743),
59 _DATAF(0.00076370022725313902),
60 _DATAF(0.00094278343021869659),
61 _DATAF(0.00114069262053817510),
62 _DATAF(0.00135742034763097760),
63 _DATAF(0.00159295846242457630),
64 _DATAF(0.00184729788452386860),
65 _DATAF(0.00212042918428778650),
66 _DATAF(0.00241234223358333110),
67 _DATAF(0.00272302562370896340),
68 _DATAF(0.00305246794596314430),
69 _DATAF(0.00340065662749111650),
70 _DATAF(0.00376757839694619180),
71 _DATAF(0.00415321951732039450),
72 _DATAF(0.00455756578594446180),
73 _DATAF(0.00498060183599591260),
74 _DATAF(0.00542231136932969090),
75 _DATAF(0.00588267762213945390),
76 _DATAF(0.00636168383061885830),
77 _DATAF(0.00685931136831641200),
78 _DATAF(0.00737554160878062250),
79 _DATAF(0.00791035499423742290),
80 _DATAF(0.00846373196691274640),
81 _DATAF(0.00903565157204866410),
82 _DATAF(0.00962609145790338520),
83 _DATAF(0.01023502927273511900),
84 _DATAF(0.01086244266480207400),
85 _DATAF(0.01150830835103988600),
86 _DATAF(0.01217260118573904000),
87 _DATAF(0.01285529602319002200),
88 _DATAF(0.01355636864900589000),
89 _DATAF(0.01427579019218683200),
90 _DATAF(0.01501353550702333500),
91 _DATAF(0.01576957479119300800),
92 _DATAF(0.01654388196766376500),
93 _DATAF(0.01733642630279064200),
94 _DATAF(0.01814717799425125100),
95 _DATAF(0.01897610723972320600),
96 _DATAF(0.01982318051159381900),
97 _DATAF(0.02068836987018585200),
98 _DATAF(0.02157163806259632100),
99 _DATAF(0.02247295528650283800),
100 _DATAF(0.02339228615164756800),
101 _DATAF(0.02432959713041782400),
102 _DATAF(0.02528485096991062200),
103 _DATAF(0.02625801227986812600),
104 _DATAF(0.02724904380738735200),
105 _DATAF(0.02825791016221046400),
106 _DATAF(0.02928457222878933000),
107 _DATAF(0.03032899089157581300),
108 _DATAF(0.03139112517237663300),
109 _DATAF(0.03247094154357910200),
110 _DATAF(0.03356838971376419100),
111 _DATAF(0.03468343615531921400),
112 _DATAF(0.03581603243947029100),
113 _DATAF(0.03696614131331443800),
114 _DATAF(0.03813371807336807300),
115 _DATAF(0.03931871801614761400),
116 _DATAF(0.04052109271287918100),
117 _DATAF(0.04174080491065979000),
118 _DATAF(0.04297780245542526200),
119 _DATAF(0.04423204064369201700),
120 _DATAF(0.04550346732139587400),
121 _DATAF(0.04679204523563385000),
122 _DATAF(0.04809771478176116900),
123 _DATAF(0.04942043498158454900),
124 _DATAF(0.05076014995574951200),
125 _DATAF(0.05211681500077247600),
126 _DATAF(0.05349037423729896500),
127 _DATAF(0.05488077551126480100),
128 _DATAF(0.05628796666860580400),
129 _DATAF(0.05771189928054809600),
130 _DATAF(0.05915251374244689900),
131 _DATAF(0.06060976162552833600),
132 _DATAF(0.06208358332514762900),
133 _DATAF(0.06357392668724060100),
134 _DATAF(0.06508072465658187900),
135 _DATAF(0.06660393625497818000),
136 _DATAF(0.06814350187778472900),
137 _DATAF(0.06969934701919555700),
138 _DATAF(0.07127143442630767800),
139 _DATAF(0.07285968959331512500),
140 _DATAF(0.07446406036615371700),
141 _DATAF(0.07608447968959808300),
142 _DATAF(0.07772088795900344800),
143 _DATAF(0.07937323302030563400),
144 _DATAF(0.08104144036769866900),
145 _DATAF(0.08272545784711837800),
146 _DATAF(0.08442521095275878900),
147 _DATAF(0.08614064753055572500),
148 _DATAF(0.08787168562412262000),
149 _DATAF(0.08961828052997589100),
150 _DATAF(0.09138035029172897300),
151 _DATAF(0.09315783530473709100),
152 _DATAF(0.09495066851377487200),
153 _DATAF(0.09675878286361694300),
154 _DATAF(0.09858211129903793300),
155 _DATAF(0.10042057186365128000),
156 _DATAF(0.10227411240339279000),
157 _DATAF(0.10414265841245651000),
158 _DATAF(0.10602613538503647000),
159 _DATAF(0.10792447626590729000),
160 _DATAF(0.10983760654926300000),
161 _DATAF(0.11176545172929764000),
162 _DATAF(0.11370794475078583000),
163 _DATAF(0.11566501110792160000),
164 _DATAF(0.11763656884431839000),
165 _DATAF(0.11962255835533142000),
166 _DATAF(0.12162289768457413000),
167 _DATAF(0.12363750487565994000),
168 _DATAF(0.12566630542278290000),
169 _DATAF(0.12770923972129822000),
170 _DATAF(0.12976621091365814000),
171 _DATAF(0.13183714449405670000),
172 _DATAF(0.13392198085784912000),
173 _DATAF(0.13602061569690704000),
174 _DATAF(0.13813297450542450000),
175 _DATAF(0.14025899767875671000),
176 _DATAF(0.14239858090877533000),
177 _DATAF(0.14455166459083557000),
178 _DATAF(0.14671814441680908000),
179 _DATAF(0.14889796078205109000),
180 _DATAF(0.15109102427959442000),
181 _DATAF(0.15329724550247192000),
182 _DATAF(0.15551653504371643000),
183 _DATAF(0.15774883329868317000),
184 _DATAF(0.15999403595924377000),
185 _DATAF(0.16225206851959229000),
186 _DATAF(0.16452284157276154000),
187 _DATAF(0.16680626571178436000),
188 _DATAF(0.16910226643085480000),
189 _DATAF(0.17141073942184448000),
190 _DATAF(0.17373161017894745000),
191 _DATAF(0.17606478929519653000),
192 _DATAF(0.17841020226478577000),
193 _DATAF(0.18076772987842560000),
194 _DATAF(0.18313729763031006000),
195 _DATAF(0.18551883101463318000),
196 _DATAF(0.18791222572326660000),
197 _DATAF(0.19031739234924316000),
198 _DATAF(0.19273422658443451000),
199 _DATAF(0.19516266882419586000),
200 _DATAF(0.19760259985923767000),
201 _DATAF(0.20005394518375397000),
202 _DATAF(0.20251661539077759000),
203 _DATAF(0.20499049127101898000),
204 _DATAF(0.20747549831867218000),
205 _DATAF(0.20997154712677002000),
206 _DATAF(0.21247853338718414000),
207 _DATAF(0.21499636769294739000),
208 _DATAF(0.21752494573593140000),
209 _DATAF(0.22006417810916901000),
210 _DATAF(0.22261397540569305000),
211 _DATAF(0.22517424821853638000),
212 _DATAF(0.22774487733840942000),
213 _DATAF(0.23032577335834503000),
214 _DATAF(0.23291684687137604000),
215 _DATAF(0.23551799356937408000),
216 _DATAF(0.23812912404537201000),
217 _DATAF(0.24075011909008026000),
218 _DATAF(0.24338090419769287000),
219 _DATAF(0.24602137506008148000),
220 _DATAF(0.24867141246795654000),
221 _DATAF(0.25133094191551208000),
222 _DATAF(0.25399985909461975000),
223 _DATAF(0.25667804479598999000),
224 _DATAF(0.25936540961265564000),
225 _DATAF(0.26206183433532715000),
226 _DATAF(0.26476725935935974000),
227 _DATAF(0.26748156547546387000),
228 _DATAF(0.27020460367202759000),
229 _DATAF(0.27293634414672852000),
230 _DATAF(0.27567663788795471000),
231 _DATAF(0.27842539548873901000),
232 _DATAF(0.28118252754211426000),
233 _DATAF(0.28394788503646851000),
234 _DATAF(0.28672140836715698000),
235 _DATAF(0.28950297832489014000),
236 _DATAF(0.29229250550270081000),
237 _DATAF(0.29508984088897705000),
238 _DATAF(0.29789492487907410000),
239 _DATAF(0.30070760846138000000),
240 _DATAF(0.30352783203125000000),
241 _DATAF(0.30635544657707214000),
242 _DATAF(0.30919039249420166000),
243 _DATAF(0.31203252077102661000),
244 _DATAF(0.31488174200057983000),
245 _DATAF(0.31773793697357178000),
246 _DATAF(0.32060101628303528000),
247 _DATAF(0.32347086071968079000),
248 _DATAF(0.32634738087654114000),
249 _DATAF(0.32923042774200439000),
250 _DATAF(0.33211994171142578000),
251 _DATAF(0.33501577377319336000),
252 _DATAF(0.33791780471801758000),
253 _DATAF(0.34082597494125366000),
254 _DATAF(0.34374016523361206000),
255 _DATAF(0.34666022658348083000),
256 _DATAF(0.34958606958389282000),
257 _DATAF(0.35251760482788086000),
258 _DATAF(0.35545471310615540000),
259 _DATAF(0.35839724540710449000),
260 _DATAF(0.36134514212608337000),
261 _DATAF(0.36429825425148010000),
262 _DATAF(0.36725649237632751000),
263 _DATAF(0.37021973729133606000),
264 _DATAF(0.37318786978721619000),
265 _DATAF(0.37616080045700073000),
266 _DATAF(0.37913838028907776000),
267 _DATAF(0.38212051987648010000),
268 _DATAF(0.38510712981224060000),
269 _DATAF(0.38809806108474731000),
270 _DATAF(0.39109322428703308000),
271 _DATAF(0.39409247040748596000),
272 _DATAF(0.39709573984146118000),
273 _DATAF(0.40010288357734680000),
274 _DATAF(0.40311378240585327000),
275 _DATAF(0.40612834692001343000),
276 _DATAF(0.40914645791053772000),
277 _DATAF(0.41216799616813660000),
278 _DATAF(0.41519284248352051000),
279 _DATAF(0.41822087764739990000),
280 _DATAF(0.42125201225280762000),
281 _DATAF(0.42428609728813171000),
282 _DATAF(0.42732307314872742000),
283 _DATAF(0.43036276102066040000),
284 _DATAF(0.43340510129928589000),
285 _DATAF(0.43644991517066956000),
286 _DATAF(0.43949717283248901000),
287 _DATAF(0.44254666566848755000),
288 _DATAF(0.44559836387634277000),
289 _DATAF(0.44865208864212036000),
290 _DATAF(0.45170778036117554000),
291 _DATAF(0.45476526021957397000),
292 _DATAF(0.45782446861267090000),
293 _DATAF(0.46088525652885437000),
294 _DATAF(0.46394753456115723000),
295 _DATAF(0.46701115369796753000),
296 _DATAF(0.47007602453231812000),
297 _DATAF(0.47314202785491943000),
298 _DATAF(0.47620904445648193000),
299 _DATAF(0.47927695512771606000),
300 _DATAF(0.48234564065933228000),
301 _DATAF(0.48541501164436340000),
302 _DATAF(0.48848491907119751000),
303 _DATAF(0.49155527353286743000),
304 _DATAF(0.49462592601776123000),
305 _DATAF(0.49769678711891174000),
306 _DATAF(0.50076776742935181000),
307 _DATAF(0.50383865833282471000),
308 _DATAF(0.50690943002700806000),
309 _DATAF(0.50997996330261230000),
310 _DATAF(0.51305007934570313000),
311 _DATAF(0.51611977815628052000),
312 _DATAF(0.51918876171112061000),
313 _DATAF(0.52225708961486816000),
314 _DATAF(0.52532458305358887000),
315 _DATAF(0.52839112281799316000),
316 _DATAF(0.53145653009414673000),
317 _DATAF(0.53452080488204956000),
318 _DATAF(0.53758376836776733000),
319 _DATAF(0.54064530134201050000),
320 _DATAF(0.54370534420013428000),
321 _DATAF(0.54676371812820435000),
322 _DATAF(0.54982030391693115000),
323 _DATAF(0.55287504196166992000),
324 _DATAF(0.55592775344848633000),
325 _DATAF(0.55897837877273560000),
326 _DATAF(0.56202673912048340000),
327 _DATAF(0.56507277488708496000),
328 _DATAF(0.56811636686325073000),
329 _DATAF(0.57115739583969116000),
330 _DATAF(0.57419574260711670000),
331 _DATAF(0.57723128795623779000),
332 _DATAF(0.58026391267776489000),
333 _DATAF(0.58329355716705322000),
334 _DATAF(0.58631998300552368000),
335 _DATAF(0.58934319019317627000),
336 _DATAF(0.59236299991607666000),
337 _DATAF(0.59537935256958008000),
338 _DATAF(0.59839212894439697000),
339 _DATAF(0.60140115022659302000),
340 _DATAF(0.60440635681152344000),
341 _DATAF(0.60740762948989868000),
342 _DATAF(0.61040484905242920000),
343 _DATAF(0.61339795589447021000),
344 _DATAF(0.61638671159744263000),
345 _DATAF(0.61937111616134644000),
346 _DATAF(0.62235099077224731000),
347 _DATAF(0.62532627582550049000),
348 _DATAF(0.62829679250717163000),
349 _DATAF(0.63126254081726074000),
350 _DATAF(0.63422328233718872000),
351 _DATAF(0.63717895746231079000),
352 _DATAF(0.64012944698333740000),
353 _DATAF(0.64307469129562378000),
354 _DATAF(0.64601451158523560000),
355 _DATAF(0.64894884824752808000),
356 _DATAF(0.65187758207321167000),
357 _DATAF(0.65480053424835205000),
358 _DATAF(0.65771764516830444000),
359 _DATAF(0.66062885522842407000),
360 _DATAF(0.66353398561477661000),
361 _DATAF(0.66643291711807251000),
362 _DATAF(0.66932559013366699000),
363 _DATAF(0.67221188545227051000),
364 _DATAF(0.67509168386459351000),
365 _DATAF(0.67796486616134644000),
366 _DATAF(0.68083137273788452000),
367 _DATAF(0.68369102478027344000),
368 _DATAF(0.68654376268386841000),
369 _DATAF(0.68938946723937988000),
370 _DATAF(0.69222795963287354000),
371 _DATAF(0.69505929946899414000),
372 _DATAF(0.69788318872451782000),
373 _DATAF(0.70069968700408936000),
374 _DATAF(0.70350855588912964000),
375 _DATAF(0.70630979537963867000),
376 _DATAF(0.70910322666168213000),
377 _DATAF(0.71188879013061523000),
378 _DATAF(0.71466636657714844000),
379 _DATAF(0.71743583679199219000),
380 _DATAF(0.72019708156585693000),
381 _DATAF(0.72295004129409790000),
382 _DATAF(0.72569459676742554000),
383 _DATAF(0.72843056917190552000),
384 _DATAF(0.73115801811218262000),
385 _DATAF(0.73387670516967773000),
386 _DATAF(0.73658657073974609000),
387 _DATAF(0.73928749561309814000),
388 _DATAF(0.74197942018508911000),
389 _DATAF(0.74466222524642944000),
390 _DATAF(0.74733579158782959000),
391 _DATAF(0.75000000000000000000),
392 _DATAF(0.75265479087829590000),
393 _DATAF(0.75530004501342773000),
394 _DATAF(0.75793570280075073000),
395 _DATAF(0.76056158542633057000),
396 _DATAF(0.76317769289016724000),
397 _DATAF(0.76578384637832642000),
398 _DATAF(0.76837992668151855000),
399 _DATAF(0.77096593379974365000),
400 _DATAF(0.77354174852371216000),
401 _DATAF(0.77610719203948975000),
402 _DATAF(0.77866220474243164000),
403 _DATAF(0.78120678663253784000),
404 _DATAF(0.78374069929122925000),
405 _DATAF(0.78626388311386108000),
406 _DATAF(0.78877633810043335000),
407 _DATAF(0.79127782583236694000),
408 _DATAF(0.79376840591430664000),
409 _DATAF(0.79624783992767334000),
410 _DATAF(0.79871612787246704000),
411 _DATAF(0.80117315053939819000),
412 _DATAF(0.80361878871917725000),
413 _DATAF(0.80605298280715942000),
414 _DATAF(0.80847567319869995000),
415 _DATAF(0.81088668107986450000),
416 _DATAF(0.81328594684600830000),
417 _DATAF(0.81567341089248657000),
418 _DATAF(0.81804895401000977000),
419 _DATAF(0.82041257619857788000),
420 _DATAF(0.82276403903961182000),
421 _DATAF(0.82510334253311157000),
422 _DATAF(0.82743036746978760000),
423 _DATAF(0.82974505424499512000),
424 _DATAF(0.83204728364944458000),
425 _DATAF(0.83433699607849121000),
426 _DATAF(0.83661413192749023000),
427 _DATAF(0.83887857198715210000),
428 _DATAF(0.84113019704818726000),
429 _DATAF(0.84336894750595093000),
430 _DATAF(0.84559476375579834000),
431 _DATAF(0.84780752658843994000),
432 _DATAF(0.85000717639923096000),
433 _DATAF(0.85219359397888184000),
434 _DATAF(0.85436677932739258000),
435 _DATAF(0.85652655363082886000),
436 _DATAF(0.85867291688919067000),
437 _DATAF(0.86080569028854370000),
438 _DATAF(0.86292493343353271000),
439 _DATAF(0.86503040790557861000),
440 _DATAF(0.86712217330932617000),
441 _DATAF(0.86920005083084106000),
442 _DATAF(0.87126404047012329000),
443 _DATAF(0.87331396341323853000),
444 _DATAF(0.87534987926483154000),
445 _DATAF(0.87737154960632324000),
446 _DATAF(0.87937903404235840000),
447 _DATAF(0.88137221336364746000),
448 _DATAF(0.88335102796554565000),
449 _DATAF(0.88531535863876343000),
450 _DATAF(0.88726514577865601000),
451 _DATAF(0.88920032978057861000),
452 _DATAF(0.89112079143524170000),
453 _DATAF(0.89302653074264526000),
454 _DATAF(0.89491748809814453000),
455 _DATAF(0.89679348468780518000),
456 _DATAF(0.89865452051162720000),
457 _DATAF(0.90050053596496582000),
458 _DATAF(0.90233147144317627000),
459 _DATAF(0.90414720773696899000),
460 _DATAF(0.90594768524169922000),
461 _DATAF(0.90773284435272217000),
462 _DATAF(0.90950262546539307000),
463 _DATAF(0.91125696897506714000),
464 _DATAF(0.91299575567245483000),
465 _DATAF(0.91471904516220093000),
466 _DATAF(0.91642659902572632000),
467 _DATAF(0.91811853647232056000),
468 _DATAF(0.91979461908340454000),
469 _DATAF(0.92145490646362305000),
470 _DATAF(0.92309933900833130000),
471 _DATAF(0.92472773790359497000),
472 _DATAF(0.92634016275405884000),
473 _DATAF(0.92793643474578857000),
474 _DATAF(0.92951661348342896000),
475 _DATAF(0.93108057975769043000),
476 _DATAF(0.93262833356857300000),
477 _DATAF(0.93415969610214233000),
478 _DATAF(0.93567472696304321000),
479 _DATAF(0.93717330694198608000),
480 _DATAF(0.93865537643432617000),
481 _DATAF(0.94012093544006348000),
482 _DATAF(0.94156986474990845000),
483 _DATAF(0.94300216436386108000),
484 _DATAF(0.94441771507263184000),
485 _DATAF(0.94581651687622070000),
486 _DATAF(0.94719851016998291000),
487 _DATAF(0.94856363534927368000),
488 _DATAF(0.94991183280944824000),
489 _DATAF(0.95124304294586182000),
490 _DATAF(0.95255726575851440000),
491 _DATAF(0.95385438203811646000),
492 _DATAF(0.95513439178466797000),
493 _DATAF(0.95639723539352417000),
494 _DATAF(0.95764285326004028000),
495 _DATAF(0.95887118577957153000),
496 _DATAF(0.96008229255676270000),
497 _DATAF(0.96127593517303467000),
498 _DATAF(0.96245223283767700000),
499 _DATAF(0.96361112594604492000),
500 _DATAF(0.96475243568420410000),
501 _DATAF(0.96587628126144409000),
502 _DATAF(0.96698254346847534000),
503 _DATAF(0.96807116270065308000),
504 _DATAF(0.96914213895797729000),
505 _DATAF(0.97019541263580322000),
506 _DATAF(0.97123098373413086000),
507 _DATAF(0.97224873304367065000),
508 _DATAF(0.97324872016906738000),
509 _DATAF(0.97423082590103149000),
510 _DATAF(0.97519499063491821000),
511 _DATAF(0.97614127397537231000),
512 _DATAF(0.97706961631774902000),
513 _DATAF(0.97797995805740356000),
514 _DATAF(0.97887223958969116000),
515 _DATAF(0.97974646091461182000),
516 _DATAF(0.98060262203216553000),
517 _DATAF(0.98144060373306274000),
518 _DATAF(0.98226046562194824000),
519 _DATAF(0.98306214809417725000),
520 _DATAF(0.98384553194046021000),
521 _DATAF(0.98461073637008667000),
522 _DATAF(0.98535764217376709000),
523 _DATAF(0.98608618974685669000),
524 _DATAF(0.98679643869400024000),
525 _DATAF(0.98748832941055298000),
526 _DATAF(0.98816186189651489000),
527 _DATAF(0.98881691694259644000),
528 _DATAF(0.98945355415344238000),
529 _DATAF(0.99007177352905273000),
530 _DATAF(0.99067145586013794000),
531 _DATAF(0.99125260114669800000),
532 _DATAF(0.99181526899337769000),
533 _DATAF(0.99235939979553223000),
534 _DATAF(0.99288487434387207000),
535 _DATAF(0.99339181184768677000),
536 _DATAF(0.99388015270233154000),
537 _DATAF(0.99434983730316162000),
538 _DATAF(0.99480086565017700000),
539 _DATAF(0.99523323774337769000),
540 _DATAF(0.99564695358276367000),
541 _DATAF(0.99604195356369019000),
542 _DATAF(0.99641823768615723000),
543 _DATAF(0.99677580595016479000),
544 _DATAF(0.99711459875106812000),
545 _DATAF(0.99743467569351196000),
546 _DATAF(0.99773597717285156000),
547 _DATAF(0.99801850318908691000),
548 _DATAF(0.99828219413757324000),
549 _DATAF(0.99852716922760010000),
550 _DATAF(0.99875330924987793000),
551 _DATAF(0.99896061420440674000),
552 _DATAF(0.99914908409118652000),
553 _DATAF(0.99931877851486206000),
554 _DATAF(0.99946963787078857000),
555 _DATAF(0.99960160255432129000),
556 _DATAF(0.99971473217010498000),
557 _DATAF(0.99980902671813965000),
558 _DATAF(0.99988448619842529000),
559 _DATAF(0.99994105100631714000),
560 _DATAF(0.99997878074645996000),
561 _DATAF(0.99999761581420898000),
562 };
Ifx_WndF32.h
Windowing function.
IFX_WNDF32_TABLE_LENGTH
#define IFX_WNDF32_TABLE_LENGTH
Definition: Ifx_WndF32.h:52
float32
float float32
Definition: Platform_Types.h:170
CONST_CFG
#define CONST_CFG
Definition: Compilers.h:57
Ifx_g_WndF32_hannTable
CONST_CFG float32 Ifx_g_WndF32_hannTable[(IFX_WNDF32_TABLE_LENGTH/2)]
Definition: Ifx_WndF32_HannTable.c:49
_DATAF
#define _DATAF(val)
Definition: Ifx_Cf32.h:51


iLLD_TC26B: IfxAsclin.c Source File

  • Asclin
  • Std
IfxAsclin.c
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin.c
3 * \brief ASCLIN basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxAsclin.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxAsclin_disableModule(Ifx_ASCLIN *asclin)
55 {
56 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
57 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection*/
58 IfxAsclin_setDisableModuleRequest(asclin); /* disables the module*/
59 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on*/
60 }
61
62
63 void IfxAsclin_enableAscErrorFlags(Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
64 {
65 IfxAsclin_enableParityErrorFlag(asclin, parEnable); /* enables parity error*/
66 IfxAsclin_enableRxFifoOverflowFlag(asclin, rfoEnable); /* enables Rx fifo Overflow error*/
67 }
68
69
70 void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
71 {
72 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
73 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection*/
74 IfxAsclin_setEnableModuleRequest(asclin); /* enables the module*/
75 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on*/
76 }
77
78
79 Ifx_ASCLIN *IfxAsclin_getAddress(IfxAsclin_Index asclin)
80 {
81 Ifx_ASCLIN *module;
82
83 if (asclin < IFXASCLIN_NUM_MODULES)
84 {
85 module = (Ifx_ASCLIN *)IfxAsclin_cfg_indexMap[asclin].module;
86 }
87 else
88 {
89 module = NULL_PTR;
90 }
91
92 return module;
93 }
94
95
96 float32 IfxAsclin_getFaFrequency(Ifx_ASCLIN *asclin)
97 {
98 float32 frequency;
99 IfxAsclin_ClockSource clockSource = (IfxAsclin_ClockSource)IfxAsclin_getClockSource(asclin); /* gets the current clock source*/
100
101 switch (clockSource)
102 {
103 case IfxAsclin_ClockSource_noClock: /* gets the respective frequency*/
104 frequency = 0.0;
105 break;
106 case IfxAsclin_ClockSource_kernelClock:
107 frequency = IfxScuCcu_getSpbFrequency();
108 break;
109 case IfxAsclin_ClockSource_oscillatorClock:
110 frequency = IfxScuCcu_getOsc0Frequency();
111 break;
112 case IfxAsclin_ClockSource_flexRayClock:
113 frequency = IfxScuCcu_getPllErayFrequency();
114 break;
115 case IfxAsclin_ClockSource_ascFastClock:
116 frequency = IfxScuCcu_getBaud2Frequency();
117 break;
118 case IfxAsclin_ClockSource_ascSlowClock:
119 frequency = IfxScuCcu_getBaud1Frequency();
120 break;
121 default:
122 frequency = 0.0;
123 break;
124 }
125
126 return frequency;
127 }
128
129
130 IfxAsclin_Index IfxAsclin_getIndex(Ifx_ASCLIN *asclin)
131 {
132 uint32 index;
133 IfxAsclin_Index result;
134
135 result = IfxAsclin_Index_none;
136
137 for (index = 0; index < IFXASCLIN_NUM_MODULES; index++)
138 {
139 if (IfxAsclin_cfg_indexMap[index].module == asclin)
140 {
141 result = (IfxAsclin_Index)IfxAsclin_cfg_indexMap[index].index;
142 break;
143 }
144 }
145
146 return result;
147 }
148
149
150 float32 IfxAsclin_getOvsFrequency(Ifx_ASCLIN *asclin)
151 {
152 return (IfxAsclin_getPdFrequency(asclin) * asclin->BRG.B.NUMERATOR) / asclin->BRG.B.DENOMINATOR;
153 }
154
155
156 float32 IfxAsclin_getPdFrequency(Ifx_ASCLIN *asclin)
157 {
158 return IfxAsclin_getFaFrequency(asclin) / (asclin->BITCON.B.PRESCALER + 1);
159 }
160
161
162 float32 IfxAsclin_getShiftFrequency(Ifx_ASCLIN *asclin)
163 {
164 return IfxAsclin_getOvsFrequency(asclin) / asclin->BITCON.B.OVERSAMPLING;
165 }
166
167
168 volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
169 {
170 return (volatile Ifx_SRC_SRCR *)(&MODULE_SRC.ASCLIN.ASCLIN[IfxAsclin_getIndex(asclin)].ERR);
171 }
172
173
174 volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
175 {
176 return (volatile Ifx_SRC_SRCR *)(&MODULE_SRC.ASCLIN.ASCLIN[IfxAsclin_getIndex(asclin)].RX);
177 }
178
179
180 volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
181 {
182 return (volatile Ifx_SRC_SRCR *)(&MODULE_SRC.ASCLIN.ASCLIN[IfxAsclin_getIndex(asclin)].TX);
183 }
184
185
186 uint32 IfxAsclin_read16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
187 {
188 volatile Ifx_ASCLIN_RXDATA *rxData = (volatile Ifx_ASCLIN_RXDATA *)&asclin->RXDATA.U;
189
190 while (count > 0)
191 {
192 *data++ = (uint16)rxData->U;
193 count--;
194 }
195
196 return count;
197 }
198
199
200 uint32 IfxAsclin_read32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
201 {
202 volatile Ifx_ASCLIN_RXDATA *rxData = (volatile Ifx_ASCLIN_RXDATA *)&asclin->RXDATA.U;
203
204 while (count > 0)
205 {
206 *data++ = rxData->U;
207 count--;
208 }
209
210 return count;
211 }
212
213
214 uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
215 {
216 volatile Ifx_ASCLIN_RXDATA *rxData = (volatile Ifx_ASCLIN_RXDATA *)&asclin->RXDATA.U;
217
218 while (count > 0)
219 {
220 *data++ = (uint8)rxData->U;
221 count--;
222 }
223
224 return count;
225 }
226
227
228 void IfxAsclin_resetModule(Ifx_ASCLIN *asclin)
229 {
230 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
231 IfxScuWdt_clearCpuEndinit(passwd);
232
233 asclin->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
234 asclin->KRST1.B.RST = 1;
235 IfxScuWdt_setCpuEndinit(passwd);
236
237 while (0 == asclin->KRST0.B.RSTSTAT) /* Wait until reset is executed */
238 {}
239
240 IfxScuWdt_clearCpuEndinit(passwd);
241 asclin->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
242
243 IfxScuWdt_setCpuEndinit(passwd);
244 }
245
246
247 void IfxAsclin_setBaudrateBitFields(Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
248 {
249 IfxAsclin_ClockSource clockSource = (IfxAsclin_ClockSource)IfxAsclin_getClockSource(asclin); /* gets the current clock source */
250 IfxAsclin_setClockSource(asclin, IfxAsclin_ClockSource_noClock); /* turns off the clock for settings */
251 IfxAsclin_setPrescaler(asclin, prescaler); /* sets the prescaler*/
252 IfxAsclin_setNumerator(asclin, numerator); /* sets the numerator*/
253 IfxAsclin_setDenominator(asclin, denominator); /* sets the denominator*/
254 IfxAsclin_setOversampling(asclin, oversampling); /* sets the oversampling*/
255 IfxAsclin_setClockSource(asclin, clockSource); /* sets the clock source back on*/
256 }
257
258
259 boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
260 {
261 IfxAsclin_ClockSource source = (IfxAsclin_ClockSource)IfxAsclin_getClockSource(asclin);
262 float32 fOvs;
263 uint32 d = 0, n, dBest = 1, nBest = 1;
264 float32 f;
265
266 /* Set the PD frequency */
267 float32 fpd = IfxAsclin_getPdFrequency(asclin);
268 oversampling = (IfxAsclin_OversamplingFactor)__maxu((oversampling + 1), 4);
269 samplepoint = (IfxAsclin_SamplePointPosition)__maxu(samplepoint, 1);
270 fOvs = baudrate * oversampling;
271 float32 relError = fOvs;
272 float32 limit = 0.001 * fOvs; // save the error limit
273
274 boolean terminated = FALSE;
275 float32 newRelError; //modified by Hassan
276 uint32 adder_facL, adder_facH, adder_facL_min, count; //modified by Hassan
277
278 d = (uint32)(fpd / fOvs);
279 n = 1;
280
281 if (d >> 12)
282 {
283 if (((uint32)(fpd / (baudrate * 16))) >> 12)
284 {
285 /* Increase the value of the prescalar to generate the required baudrate */
286 IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, FALSE);
287 }
288 else
289 {
290 /* Increase the value of the oversampling to generate the required baudrate */
291 IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, FALSE);
292 }
293 }
294
295 dBest = d;
296 nBest = n;
297 adder_facL_min = 0;
298 f = (fpd * n) / d;
299 relError = __absf(fOvs - f);
300
301 if (relError <= limit)
302 {
303 terminated = TRUE;
304 }
305
306 for (n = 2; ((!terminated) && ((n * d) <= 0xFFF)); n++)
307 {
308 if (n == 2)
309 {
310 adder_facL = 1;
311 adder_facH = 1;
312 }
313 else
314 {
315 adder_facL = (adder_facL_min * n) / nBest;
316 adder_facH = adder_facL + 1;
317 }
318
319 for (count = adder_facL; count <= adder_facH; count++)
320 {
321 f = (fpd * n) / (n * d + count);
322 newRelError = __absf(fOvs - f);
323
324 if (relError > (newRelError))
325 {
326 relError = newRelError;
327 nBest = n;
328 dBest = (n * d + count);
329 adder_facL_min = count;
330 }
331 }
332
333 if (relError <= limit)
334 {
335 break;
336 }
337 }
338
339 IfxAsclin_setClockSource(asclin, IfxAsclin_ClockSource_noClock);
340 asclin->BRG.B.DENOMINATOR = dBest;
341 asclin->BRG.B.NUMERATOR = nBest;
342
343 /* Set the SHIFT frequency */
344 asclin->BITCON.B.OVERSAMPLING = oversampling - 1;
345
346 /* Set the sampling point */
347 asclin->BITCON.B.SAMPLEPOINT = samplepoint;
348
349 /* Set the median filter */
350 asclin->BITCON.B.SM = medianFilter ? 1 : 0;
351
352 IfxAsclin_setClockSource(asclin, source);
353
354 return TRUE;
355 }
356
357
358 void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
359 {
360 asclin->CSR.B.CLKSEL = clockSource; /* selects the given clock source*/
361
362 /* Waits TW or polls for CSR.CON to change */
363 if (clockSource == IfxAsclin_ClockSource_noClock)
364 {
365 while (IfxAsclin_getClockStatus(asclin) != 0U)
366 {}
367 }
368 else
369 {
370 while (IfxAsclin_getClockStatus(asclin) != 1U)
371 {}
372 }
373 }
374
375
376 uint32 IfxAsclin_write16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
377 {
378 volatile Ifx_ASCLIN_TXDATA *txData = (volatile Ifx_ASCLIN_TXDATA *)&asclin->TXDATA.U;
379
380 while ((count > 0))
381 {
382 txData->U = *data++;
383 count--;
384 }
385
386 return count;
387 }
388
389
390 uint32 IfxAsclin_write32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
391 {
392 volatile Ifx_ASCLIN_TXDATA *txData = (volatile Ifx_ASCLIN_TXDATA *)&asclin->TXDATA.U;
393
394 while ((count > 0))
395 {
396 txData->U = *data++;
397 count--;
398 }
399
400 return count;
401 }
402
403
404 uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
405 {
406 volatile Ifx_ASCLIN_TXDATA *txData = (volatile Ifx_ASCLIN_TXDATA *)&asclin->TXDATA.U;
407
408 while ((count > 0))
409 {
410 txData->U = *data++;
411 count--;
412 }
413
414 return count;
415 }
IfxAsclin_getAddress
Ifx_ASCLIN * IfxAsclin_getAddress(IfxAsclin_Index asclin)
API to get the address for ASCLIN HW module register memory map.
Definition: IfxAsclin.c:79
IfxAsclin_write32
uint32 IfxAsclin_write32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Writes data up to 32 bits.
Definition: IfxAsclin.c:390
IfxAsclin_setNumerator
IFX_INLINE void IfxAsclin_setNumerator(Ifx_ASCLIN *asclin, uint16 numerator)
Sets the numerator of the fractional divider.
Definition: IfxAsclin.h:2318
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:572
IfxAsclin_getIndex
IfxAsclin_Index IfxAsclin_getIndex(Ifx_ASCLIN *asclin)
API to get the resource index of the ASCLIN specified.
Definition: IfxAsclin.c:130
IfxAsclin_getShiftFrequency
float32 IfxAsclin_getShiftFrequency(Ifx_ASCLIN *asclin)
Returns the SHIFT frequency.
Definition: IfxAsclin.c:162
IfxScuCcu_getPllErayFrequency
float32 IfxScuCcu_getPllErayFrequency(void)
API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON...
Definition: IfxScuCcu.c:457
IfxAsclin_resetModule
void IfxAsclin_resetModule(Ifx_ASCLIN *asclin)
resets Asclin kernel
Definition: IfxAsclin.c:228
IfxAsclin_read32
uint32 IfxAsclin_read32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Reads data up to 32 bits.
Definition: IfxAsclin.c:200
IfxAsclin_getSrcPointerEr
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR.
Definition: IfxAsclin.c:168
IfxAsclin_SamplesPerBit
IfxAsclin_SamplesPerBit
Number of samples per bit, sample mode/medianfilter Definition in Ifx_ASCLIN.BITCON.B.SM.
Definition: IfxAsclin.h:345
IfxAsclin_getOvsFrequency
float32 IfxAsclin_getOvsFrequency(Ifx_ASCLIN *asclin)
Returns the OVS frequency.
Definition: IfxAsclin.c:150
IfxAsclin_ClockSource_ascFastClock
f asclinf wiil be supplied
Definition: IfxAsclin.h:115
IfxAsclin_enableModule
void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
Enables the module.
Definition: IfxAsclin.c:70
IfxAsclin_getFaFrequency
float32 IfxAsclin_getFaFrequency(Ifx_ASCLIN *asclin)
Returns the ASCLIN module FA frequency in Hz.
Definition: IfxAsclin.c:96
IfxAsclin_Index
IfxAsclin_Index
List of the available Asclin resources.
Definition: IfxAsclin_cfg.h:77
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxAsclin_setDenominator
IFX_INLINE void IfxAsclin_setDenominator(Ifx_ASCLIN *asclin, uint16 denominator)
Sets the denominator of the fractional divider.
Definition: IfxAsclin.h:2228
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxAsclin_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES]
Definition: IfxAsclin_cfg.c:54
IFXASCLIN_NUM_MODULES
#define IFXASCLIN_NUM_MODULES
Definition: IfxAsclin_cfg.h:67
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxAsclin_setBitTiming
boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing.
Definition: IfxAsclin.c:259
IfxScuCcu_getOsc0Frequency
float32 IfxScuCcu_getOsc0Frequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.c:429
IfxAsclin_ClockSource_oscillatorClock
XTAL oscillator clock foso0 will be supplied.
Definition: IfxAsclin.h:113
IfxAsclin_enableParityErrorFlag
IFX_INLINE void IfxAsclin_enableParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables parity error flag.
Definition: IfxAsclin.h:1823
IFX_VERBOSE_LEVEL_WARNING
#define IFX_VERBOSE_LEVEL_WARNING
Assertion level warning.
Definition: Ifx_Assert.h:59
IfxAsclin_getSrcPointerTx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx.
Definition: IfxAsclin.c:180
IfxAsclin_OversamplingFactor
IfxAsclin_OversamplingFactor
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed Defini...
Definition: IfxAsclin.h:227
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxScuCcu_getBaud2Frequency
float32 IfxScuCcu_getBaud2Frequency(void)
API to get BAUD2 divider frequency. This API returns the Baud2 frequency based on the divider value i...
Definition: IfxScuCcu.c:230
__absf
#define __absf
Definition: IfxCpu_IntrinsicsDcc.h:1629
IfxScuCcu_getBaud1Frequency
float32 IfxScuCcu_getBaud1Frequency(void)
API to get BAUD1 divider frequency. This API returns the based on the divider value in CCUCON registe...
Definition: IfxScuCcu.c:212
IfxAsclin_ClockSource
IfxAsclin_ClockSource
Selection of clock source Definition in Ifx_ASCLIN.CSR.B.CLKSEL.
Definition: IfxAsclin.h:109
IfxAsclin_enableAscErrorFlags
void IfxAsclin_enableAscErrorFlags(Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
Enables the ASC error interrupt Flags.
Definition: IfxAsclin.c:63
IfxAsclin_setPrescaler
IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:2336
IfxAsclin_Index_none
Not Selected.
Definition: IfxAsclin_cfg.h:79
IfxAsclin_ClockSource_flexRayClock
f eray will be supplied
Definition: IfxAsclin.h:114
IfxAsclin_enableRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO overflow flag.
Definition: IfxAsclin.h:1853
IfxAsclin_SamplePointPosition
IfxAsclin_SamplePointPosition
Sample point position Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.
Definition: IfxAsclin.h:323
IfxAsclin_setBaudrateBitFields
void IfxAsclin_setBaudrateBitFields(Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
Sets the baudrate bit fields.
Definition: IfxAsclin.c:247
IfxAsclin_getSrcPointerRx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx.
Definition: IfxAsclin.c:174
IfxAsclin_read8
uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits.
Definition: IfxAsclin.c:214
IfxAsclin_ClockSource_ascSlowClock
f asclins will be supplied
Definition: IfxAsclin.h:116
IfxAsclin_write16
uint32 IfxAsclin_write16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits.
Definition: IfxAsclin.c:376
IfxAsclin_write8
uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits.
Definition: IfxAsclin.c:404
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxAsclin_getClockStatus
IFX_INLINE boolean IfxAsclin_getClockStatus(Ifx_ASCLIN *asclin)
Returns the clock status.
Definition: IfxAsclin.h:1937
__maxu
uint32 __maxu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IfxAsclin_ClockSource_kernelClock
f clc will be supplied
Definition: IfxAsclin.h:112
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxAsclin_disableModule
void IfxAsclin_disableModule(Ifx_ASCLIN *asclin)
Disables the module.
Definition: IfxAsclin.c:54
IfxAsclin_ClockSource_noClock
no clock will be supplied
Definition: IfxAsclin.h:111
IfxAsclin_setEnableModuleRequest
IFX_INLINE void IfxAsclin_setEnableModuleRequest(Ifx_ASCLIN *asclin)
Sets the enable module request.
Definition: IfxAsclin.h:2240
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxAsclin_setOversampling
IFX_INLINE void IfxAsclin_setOversampling(Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor)
Sets the division ratio of the baudrate post divider.
Definition: IfxAsclin.h:2324
IfxAsclin_read16
uint32 IfxAsclin_read16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits.
Definition: IfxAsclin.c:186
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxAsclin_getClockSource
IFX_INLINE uint8 IfxAsclin_getClockSource(Ifx_ASCLIN *asclin)
Returns the clock source.
Definition: IfxAsclin.h:1931
IfxAsclin.h
ASCLIN basic functionality.
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxAsclin_setDisableModuleRequest
IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
Sets the disable module request.
Definition: IfxAsclin.h:2234
IfxAsclin_getPdFrequency
float32 IfxAsclin_getPdFrequency(Ifx_ASCLIN *asclin)
Returns the PD frequency.
Definition: IfxAsclin.c:156
IfxAsclin_setClockSource
void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source.
Definition: IfxAsclin.c:358


iLLD_TC26B: IfxAsclin.h Source File

  • Asclin
  • Std
IfxAsclin.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin.h
3 * \brief ASCLIN basic functionality
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Asclin_Std_Enumerations Enumerations
44 * \ingroup IfxLld_Asclin_Std
45 * \defgroup IfxLld_Asclin_Std_Operative Operative Functions
46 * \ingroup IfxLld_Asclin_Std
47 * \defgroup IfxLld_Asclin_Std_Utility Utility Functions
48 * \ingroup IfxLld_Asclin_Std
49 * \defgroup IfxLld_Asclin_Std_Configuration Configuration Functions
50 * \ingroup IfxLld_Asclin_Std
51 * \defgroup IfxLld_Asclin_Std_External External Functions
52 * \ingroup IfxLld_Asclin_Std
53 * \defgroup IfxLld_Asclin_Std_IO IO Pin Configuration Functions
54 * \ingroup IfxLld_Asclin_Std
55 */
56
57 #ifndef IFXASCLIN_H
58 #define IFXASCLIN_H 1
59
60 /******************************************************************************/
61 /*----------------------------------Includes----------------------------------*/
62 /******************************************************************************/
63
64 #include "_Impl/IfxAsclin_cfg.h"
65 #include "Scu/Std/IfxScuCcu.h"
66 #include "Scu/Std/IfxScuWdt.h"
67 #include "Cpu/Std/IfxCpu_Intrinsics.h"
68 #include "IfxAsclin_reg.h"
69 #include "Src/Std/IfxSrc.h"
70 #include "_PinMap/IfxAsclin_PinMap.h"
71
72 /******************************************************************************/
73 /*--------------------------------Enumerations--------------------------------*/
74 /******************************************************************************/
75
76 /** \addtogroup IfxLld_Asclin_Std_Enumerations
77 * \{ */
78 /** \brief Defines if the classic or the enhanced checksum will be calculated by the checksum block.\n
79 * Definition in Ifx_ASCLIN.DATCON.B.CSM
80 */
81 typedef enum
82 {
83 IfxAsclin_Checksum_classic = 0, /**< \brief classic checksum */
84 IfxAsclin_Checksum_enhanced = 1 /**< \brief enhanced checksum */
85 } IfxAsclin_Checksum;
86
87 /** \brief Defines if the received checksum byte is written into the RXFifo or not.\n
88 * Definition in Ifx_ASCLIN.LIN.CON.B.CSI
89 */
90 typedef enum
91 {
92 IfxAsclin_ChecksumInjection_notWritten = 0, /**< \brief checksum byte is not written */
93 IfxAsclin_ChecksumInjection_written = 1 /**< \brief checksum byte is written */
94 } IfxAsclin_ChecksumInjection;
95
96 /** \brief CPOL defines the idle level of the clock signal in the SPI mode.\n
97 * Idle level is the level outside the data transmission time intervals.\n
98 * Definition in Ifx_ASCLIN.IOCR.B.CPOL
99 */
100 typedef enum
101 {
102 IfxAsclin_ClockPolarity_idleLow = 0, /**< \brief idle low */
103 IfxAsclin_ClockPolarity_idleHigh = 1 /**< \brief idle high */
104 } IfxAsclin_ClockPolarity;
105
106 /** \brief Selection of clock source\n
107 * Definition in Ifx_ASCLIN.CSR.B.CLKSEL
108 */
109 typedef enum
110 {
111 IfxAsclin_ClockSource_noClock = 0, /**< \brief no clock will be supplied */
112 IfxAsclin_ClockSource_kernelClock = 1, /**< \brief f clc will be supplied */
113 IfxAsclin_ClockSource_oscillatorClock = 2, /**< \brief XTAL oscillator clock foso0 will be supplied */
114 IfxAsclin_ClockSource_flexRayClock = 4, /**< \brief f eray will be supplied */
115 IfxAsclin_ClockSource_ascFastClock = 8, /**< \brief f asclinf wiil be supplied */
116 IfxAsclin_ClockSource_ascSlowClock = 16 /**< \brief f asclins will be supplied */
117 } IfxAsclin_ClockSource;
118
119 /** \brief CTS input pin selection\n
120 * Definition in Ifx_ASCLIN.IOCR.B.CTS
121 */
122 typedef enum
123 {
124 IfxAsclin_CtsInputSelect_0, /**< \brief CTS input pin 0 */
125 IfxAsclin_CtsInputSelect_1, /**< \brief CTS input pin 1 */
126 IfxAsclin_CtsInputSelect_2, /**< \brief CTS input pin 2 */
127 IfxAsclin_CtsInputSelect_3 /**< \brief CTS input pin 3 */
128 } IfxAsclin_CtsInputSelect;
129
130 /** \brief Number of bits per transfer\n
131 * Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN
132 */
133 typedef enum
134 {
135 IfxAsclin_DataLength_1 = 0, /**< \brief number of bits per transfer 0 */
136 IfxAsclin_DataLength_2, /**< \brief number of bits per transfer 1 */
137 IfxAsclin_DataLength_3, /**< \brief number of bits per transfer 2 */
138 IfxAsclin_DataLength_4, /**< \brief number of bits per transfer 3 */
139 IfxAsclin_DataLength_5, /**< \brief number of bits per transfer 4 */
140 IfxAsclin_DataLength_6, /**< \brief number of bits per transfer 5 */
141 IfxAsclin_DataLength_7, /**< \brief number of bits per transfer 6 */
142 IfxAsclin_DataLength_8, /**< \brief number of bits per transfer 7 */
143 IfxAsclin_DataLength_9, /**< \brief number of bits per transfer 8 */
144 IfxAsclin_DataLength_10, /**< \brief number of bits per transfer 9 */
145 IfxAsclin_DataLength_11, /**< \brief number of bits per transfer 10 */
146 IfxAsclin_DataLength_12, /**< \brief number of bits per transfer 11 */
147 IfxAsclin_DataLength_13, /**< \brief number of bits per transfer 12 */
148 IfxAsclin_DataLength_14, /**< \brief number of bits per transfer 13 */
149 IfxAsclin_DataLength_15, /**< \brief number of bits per transfer 14 */
150 IfxAsclin_DataLength_16 /**< \brief number of bits per transfer 15 */
151 } IfxAsclin_DataLength;
152
153 /** \brief Defines the basic operating mode of the module. Changing the mode must be done by switching first to initialize mode, and then to the other mode.\n
154 * Definition in Ifx_ASCLIN.FRAMECON.B.MODE
155 */
156 typedef enum
157 {
158 IfxAsclin_FrameMode_initialise = 0, /**< \brief initialise mode */
159 IfxAsclin_FrameMode_asc = 1, /**< \brief asc mode */
160 IfxAsclin_FrameMode_spi = 2, /**< \brief spi mode */
161 IfxAsclin_FrameMode_lin = 3 /**< \brief lin mode */
162 } IfxAsclin_FrameMode;
163
164 /** \brief Defines if LIN frame shall consist of a header and response or of a header only.\n
165 * Definition in Ifx_ASCLIN.DATCON.B.HO
166 */
167 typedef enum
168 {
169 IfxAsclin_HeaderResponseSelect_headerAndResponse = 0, /**< \brief header and response expected */
170 IfxAsclin_HeaderResponseSelect_headerOnly = 1 /**< \brief header only expected */
171 } IfxAsclin_HeaderResponseSelect;
172
173 /** \brief Defines the duration of the IDLE delay in bit times.\n
174 * SPI mode: this is the idle time between the frames.\n
175 * ASC and LIN mode: this is the pause inserted between transmission of bytes.\n
176 * Definition in Ifx_ASCLIN.FRAMECON.B.IDLE
177 */
178 typedef enum
179 {
180 IfxAsclin_IdleDelay_0, /**< \brief idle delay in 0 bit times */
181 IfxAsclin_IdleDelay_1, /**< \brief idle delay in 1 bit times */
182 IfxAsclin_IdleDelay_2, /**< \brief idle delay in 2 bit times */
183 IfxAsclin_IdleDelay_3, /**< \brief idle delay in 3 bit times */
184 IfxAsclin_IdleDelay_4, /**< \brief idle delay in 4 bit times */
185 IfxAsclin_IdleDelay_5, /**< \brief idle delay in 5 bit times */
186 IfxAsclin_IdleDelay_6, /**< \brief idle delay in 6 bit times */
187 IfxAsclin_IdleDelay_7 /**< \brief idle delay in 7 bit times */
188 } IfxAsclin_IdleDelay;
189
190 /** \brief Defines the leading delay in bit times in SPI mode. ASC mode: not applicable.\n
191 * LIN mode: delay between the end of the break and the start of the sync character.\n
192 * Definition in Ifx_ASCLIN.FRAMECON.B.LEAD
193 */
194 typedef enum
195 {
196 IfxAsclin_LeadDelay_0, /**< \brief lead delay in 0 bit times */
197 IfxAsclin_LeadDelay_1, /**< \brief lead delay in 1 bit times */
198 IfxAsclin_LeadDelay_2, /**< \brief lead delay in 2 bit times */
199 IfxAsclin_LeadDelay_3, /**< \brief lead delay in 3 bit times */
200 IfxAsclin_LeadDelay_4, /**< \brief lead delay in 4 bit times */
201 IfxAsclin_LeadDelay_5, /**< \brief lead delay in 5 bit times */
202 IfxAsclin_LeadDelay_6, /**< \brief lead delay in 6 bit times */
203 IfxAsclin_LeadDelay_7 /**< \brief lead delay in 7 bit times */
204 } IfxAsclin_LeadDelay;
205
206 /** \brief Configures if the module in LIN mode operates as master or slave\n
207 * Definition in Ifx_ASCLIN.LIN.CON.B.MS
208 */
209 typedef enum
210 {
211 IfxAsclin_LinMode_slave = 0, /**< \brief operates in slave mode */
212 IfxAsclin_LinMode_master = 1 /**< \brief operates in master mode */
213 } IfxAsclin_LinMode;
214
215 /** \brief Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout.\n
216 * Definition in Ifx_ASCLIN.DATCON.B.RM
217 */
218 typedef enum
219 {
220 IfxAsclin_LinResponseTimeoutMode_frameTimeout = 0, /**< \brief timeout threshold is for frame */
221 IfxAsclin_LinResponseTimeoutMode_responseTimeout = 1 /**< \brief timeout threshold is for reponse */
222 } IfxAsclin_LinResponseTimeoutMode;
223
224 /** \brief Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed\n
225 * Definition in Ifx_ASCLIN.BITCON.B.OVERSAMPLING
226 */
227 typedef enum
228 {
229 IfxAsclin_OversamplingFactor_4 = 3, /**< \brief oversampling factor 4 */
230 IfxAsclin_OversamplingFactor_5 = 4, /**< \brief oversampling factor 5 */
231 IfxAsclin_OversamplingFactor_6 = 5, /**< \brief oversampling factor 6 */
232 IfxAsclin_OversamplingFactor_7 = 6, /**< \brief oversampling factor 7 */
233 IfxAsclin_OversamplingFactor_8 = 7, /**< \brief oversampling factor 8 */
234 IfxAsclin_OversamplingFactor_9 = 8, /**< \brief oversampling factor 9 */
235 IfxAsclin_OversamplingFactor_10 = 9, /**< \brief oversampling factor 10 */
236 IfxAsclin_OversamplingFactor_11 = 10, /**< \brief oversampling factor 11 */
237 IfxAsclin_OversamplingFactor_12 = 11, /**< \brief oversampling factor 12 */
238 IfxAsclin_OversamplingFactor_13 = 12, /**< \brief oversampling factor 13 */
239 IfxAsclin_OversamplingFactor_14 = 13, /**< \brief oversampling factor 14 */
240 IfxAsclin_OversamplingFactor_15 = 14, /**< \brief oversampling factor 15 */
241 IfxAsclin_OversamplingFactor_16 = 15 /**< \brief oversampling factor 16 */
242 } IfxAsclin_OversamplingFactor;
243
244 /** \brief Type of parity bit attached to data bits\n
245 * Definition in Ifx_ASCLIN.FRAMECON.B.ODD
246 */
247 typedef enum
248 {
249 IfxAsclin_ParityType_even = 0, /**< \brief even parity */
250 IfxAsclin_ParityType_odd = 1 /**< \brief odd parity */
251 } IfxAsclin_ParityType;
252
253 /** \brief Receive buffer mode\n
254 * Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF
255 */
256 typedef enum
257 {
258 IfxAsclin_ReceiveBufferMode_rxFifo = 0, /**< \brief RxFIFO mode */
259 IfxAsclin_ReceiveBufferMode_rxBuffer = 1 /**< \brief single stage Rx buffer */
260 } IfxAsclin_ReceiveBufferMode;
261
262 /** \brief Polarity of the RTS and CTS signals\n
263 * Definition in Ifx_ASCLIN.IOCR.B.RCPOL
264 */
265 typedef enum
266 {
267 IfxAsclin_RtsCtsPolarity_activeHigh = 0, /**< \brief ready/clear are active-high */
268 IfxAsclin_RtsCtsPolarity_activeLow = 1 /**< \brief ready/clear are active-low */
269 } IfxAsclin_RtsCtsPolarity;
270
271 /** \brief Defines the filling level that triggers a drain (RX) interrupt or DMA access\n
272 * Definition in Ifx_ASCLIN.RXFIFOCON.B.INTLEVEL
273 */
274 typedef enum
275 {
276 IfxAsclin_RxFifoInterruptLevel_1, /**< \brief RX FIFO level 1 */
277 IfxAsclin_RxFifoInterruptLevel_2, /**< \brief RX FIFO level 2 */
278 IfxAsclin_RxFifoInterruptLevel_3, /**< \brief RX FIFO level 3 */
279 IfxAsclin_RxFifoInterruptLevel_4, /**< \brief RX FIFO level 4 */
280 IfxAsclin_RxFifoInterruptLevel_5, /**< \brief RX FIFO level 5 */
281 IfxAsclin_RxFifoInterruptLevel_6, /**< \brief RX FIFO level 6 */
282 IfxAsclin_RxFifoInterruptLevel_7, /**< \brief RX FIFO level 7 */
283 IfxAsclin_RxFifoInterruptLevel_8, /**< \brief RX FIFO level 8 */
284 IfxAsclin_RxFifoInterruptLevel_9, /**< \brief RX FIFO level 9 */
285 IfxAsclin_RxFifoInterruptLevel_10, /**< \brief RX FIFO level 10 */
286 IfxAsclin_RxFifoInterruptLevel_11, /**< \brief RX FIFO level 11 */
287 IfxAsclin_RxFifoInterruptLevel_12, /**< \brief RX FIFO level 12 */
288 IfxAsclin_RxFifoInterruptLevel_13, /**< \brief RX FIFO level 13 */
289 IfxAsclin_RxFifoInterruptLevel_14, /**< \brief RX FIFO level 14 */
290 IfxAsclin_RxFifoInterruptLevel_15, /**< \brief RX FIFO level 15 */
291 IfxAsclin_RxFifoInterruptLevel_16 /**< \brief RX FIFO level 16 */
292 } IfxAsclin_RxFifoInterruptLevel;
293
294 /** \brief Defines the number of bytes read from the Rx FIFO with one FPI bus read\n
295 * Definition in Ifx_ASCLIN.RXFIFOCON.B.OUTW
296 */
297 typedef enum
298 {
299 IfxAsclin_RxFifoOutletWidth_0, /**< \brief number of bytes 0 */
300 IfxAsclin_RxFifoOutletWidth_1, /**< \brief number of bytes 1 */
301 IfxAsclin_RxFifoOutletWidth_2, /**< \brief number of bytes 2 */
302 IfxAsclin_RxFifoOutletWidth_3 /**< \brief number of bytes 3 */
303 } IfxAsclin_RxFifoOutletWidth;
304
305 /** \brief Alternate input selection for Rx signal.\n
306 * Definition in Ifx_ASCLIN.IOCR.B.ALTI
307 */
308 typedef enum
309 {
310 IfxAsclin_RxInputSelect_0, /**< \brief alternate input selection 0 */
311 IfxAsclin_RxInputSelect_1, /**< \brief alternate input selection 1 */
312 IfxAsclin_RxInputSelect_2, /**< \brief alternate input selection 2 */
313 IfxAsclin_RxInputSelect_3, /**< \brief alternate input selection 3 */
314 IfxAsclin_RxInputSelect_4, /**< \brief alternate input selection 4 */
315 IfxAsclin_RxInputSelect_5, /**< \brief alternate input selection 5 */
316 IfxAsclin_RxInputSelect_6, /**< \brief alternate input selection 6 */
317 IfxAsclin_RxInputSelect_7 /**< \brief alternate input selection 7 */
318 } IfxAsclin_RxInputSelect;
319
320 /** \brief Sample point position\n
321 * Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT
322 */
323 typedef enum
324 {
325 IfxAsclin_SamplePointPosition_1 = 1, /**< \brief sample point position at 1 */
326 IfxAsclin_SamplePointPosition_2 = 2, /**< \brief sample point position at 2 */
327 IfxAsclin_SamplePointPosition_3 = 3, /**< \brief sample point position at 3 */
328 IfxAsclin_SamplePointPosition_4 = 4, /**< \brief sample point position at 4 */
329 IfxAsclin_SamplePointPosition_5 = 5, /**< \brief sample point position at 5 */
330 IfxAsclin_SamplePointPosition_6 = 6, /**< \brief sample point position at 6 */
331 IfxAsclin_SamplePointPosition_7 = 7, /**< \brief sample point position at 7 */
332 IfxAsclin_SamplePointPosition_8 = 8, /**< \brief sample point position at 8 */
333 IfxAsclin_SamplePointPosition_9 = 9, /**< \brief sample point position at 9 */
334 IfxAsclin_SamplePointPosition_10 = 10, /**< \brief sample point position at 10 */
335 IfxAsclin_SamplePointPosition_11 = 11, /**< \brief sample point position at 11 */
336 IfxAsclin_SamplePointPosition_12 = 12, /**< \brief sample point position at 12 */
337 IfxAsclin_SamplePointPosition_13 = 13, /**< \brief sample point position at 13 */
338 IfxAsclin_SamplePointPosition_14 = 14, /**< \brief sample point position at 14 */
339 IfxAsclin_SamplePointPosition_15 = 15 /**< \brief sample point position at 15 */
340 } IfxAsclin_SamplePointPosition;
341
342 /** \brief Number of samples per bit, sample mode/medianfilter\n
343 * Definition in Ifx_ASCLIN.BITCON.B.SM
344 */
345 typedef enum
346 {
347 IfxAsclin_SamplesPerBit_one = 0, /**< \brief one sample per bit */
348 IfxAsclin_SamplesPerBit_three = 1 /**< \brief three samples per bit */
349 } IfxAsclin_SamplesPerBit;
350
351 /** \brief SPI mode: defines the shift direction of the shift register.\n
352 * ASC and LIN mode: should be set to 0.\n
353 * Definition in Ifx_ASCLIN.FRAMECON.B.MSB
354 */
355 typedef enum
356 {
357 IfxAsclin_ShiftDirection_lsbFirst = 0, /**< \brief LSB first */
358 IfxAsclin_ShiftDirection_msbFirst = 1 /**< \brief MSB first */
359 } IfxAsclin_ShiftDirection;
360
361 /** \brief Defines the idle level of the SLSO signal, which is the level.\n
362 * Outside the data transmission, leading and trailing time intervals.\n
363 * Definition in Ifx_ASCLIN.IOCR.B.SPOL
364 */
365 typedef enum
366 {
367 IfxAsclin_SlavePolarity_idleLow = 0, /**< \brief idle low */
368 IfxAsclin_SlavePolarity_idlehigh = 1 /**< \brief idle high */
369 } IfxAsclin_SlavePolarity;
370
371 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
372 * Definition in Ifx_ASCLIN.CLC.B.EDIS
373 */
374 typedef enum
375 {
376 IfxAsclin_SleepMode_enable = 0, /**< \brief enables sleep mode */
377 IfxAsclin_SleepMode_disable = 1 /**< \brief disables sleep mode */
378 } IfxAsclin_SleepMode;
379
380 /** \brief Error status
381 */
382 typedef enum
383 {
384 IfxAsclin_Status_configurationError = 0, /**< \brief Configuration error */
385 IfxAsclin_Status_noError = 1 /**< \brief No error */
386 } IfxAsclin_Status;
387
388 /** \brief ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay.\n
389 * Definition in Ifx_ASCLIN.FRAMECON.B.STOP
390 */
391 typedef enum
392 {
393 IfxAsclin_StopBit_0, /**< \brief number of stop bits 0 */
394 IfxAsclin_StopBit_1, /**< \brief number of stop bits 1 */
395 IfxAsclin_StopBit_2, /**< \brief number of stop bits 2 */
396 IfxAsclin_StopBit_3, /**< \brief number of stop bits 3 */
397 IfxAsclin_StopBit_4, /**< \brief number of stop bits 4 */
398 IfxAsclin_StopBit_5, /**< \brief number of stop bits 5 */
399 IfxAsclin_StopBit_6, /**< \brief number of stop bits 6 */
400 IfxAsclin_StopBit_7 /**< \brief number of stop bits 7 */
401 } IfxAsclin_StopBit;
402
403 /** \brief OCDS Suspend Control (OCDS.SUS)
404 */
405 typedef enum
406 {
407 IfxAsclin_SuspendMode_none = 0, /**< \brief No suspend */
408 IfxAsclin_SuspendMode_hard = 1, /**< \brief Hard Suspend */
409 IfxAsclin_SuspendMode_soft = 2 /**< \brief Soft Suspend */
410 } IfxAsclin_SuspendMode;
411
412 /** \brief Defines the number of bytes written to the Tx FIFO with one FPI bus write\n
413 * Definition in Ifx_ASCLIN.TXFIFOCON.B.INW
414 */
415 typedef enum
416 {
417 IfxAsclin_TxFifoInletWidth_0, /**< \brief number of bytes 0 */
418 IfxAsclin_TxFifoInletWidth_1, /**< \brief number of bytes 1 */
419 IfxAsclin_TxFifoInletWidth_2, /**< \brief number of bytes 2 */
420 IfxAsclin_TxFifoInletWidth_3 /**< \brief number of bytes 3 */
421 } IfxAsclin_TxFifoInletWidth;
422
423 /** \brief Defines the filling level that triggers a refill (TX) interrupt or DMA access\n
424 * Definition in Ifx_ASCLIN.TXFIFOCON.B.INTLEVEL
425 */
426 typedef enum
427 {
428 IfxAsclin_TxFifoInterruptLevel_0, /**< \brief TX FIFO level 0 */
429 IfxAsclin_TxFifoInterruptLevel_1, /**< \brief TX FIFO level 1 */
430 IfxAsclin_TxFifoInterruptLevel_2, /**< \brief TX FIFO level 2 */
431 IfxAsclin_TxFifoInterruptLevel_3, /**< \brief TX FIFO level 3 */
432 IfxAsclin_TxFifoInterruptLevel_4, /**< \brief TX FIFO level 4 */
433 IfxAsclin_TxFifoInterruptLevel_5, /**< \brief TX FIFO level 5 */
434 IfxAsclin_TxFifoInterruptLevel_6, /**< \brief TX FIFO level 6 */
435 IfxAsclin_TxFifoInterruptLevel_7, /**< \brief TX FIFO level 7 */
436 IfxAsclin_TxFifoInterruptLevel_8, /**< \brief TX FIFO level 8 */
437 IfxAsclin_TxFifoInterruptLevel_9, /**< \brief TX FIFO level 9 */
438 IfxAsclin_TxFifoInterruptLevel_10, /**< \brief TX FIFO level 10 */
439 IfxAsclin_TxFifoInterruptLevel_11, /**< \brief TX FIFO level 11 */
440 IfxAsclin_TxFifoInterruptLevel_12, /**< \brief TX FIFO level 12 */
441 IfxAsclin_TxFifoInterruptLevel_13, /**< \brief TX FIFO level 13 */
442 IfxAsclin_TxFifoInterruptLevel_14, /**< \brief TX FIFO level 14 */
443 IfxAsclin_TxFifoInterruptLevel_15 /**< \brief TX FIFO level 15 */
444 } IfxAsclin_TxFifoInterruptLevel;
445
446 /** \} */
447
448 /** \addtogroup IfxLld_Asclin_Std_Operative
449 * \{ */
450
451 /******************************************************************************/
452 /*-------------------------Inline Function Prototypes-------------------------*/
453 /******************************************************************************/
454
455 /** \brief clears all the flags
456 * \param asclin pointer to ASCLIN registers
457 * \return None
458 */
459 IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin);
460
461 /** \brief Clears the break detected flag
462 * \param asclin pointer to ASCLIN registers
463 * \return None
464 */
465 IFX_INLINE void IfxAsclin_clearBreakDetectedFlag(Ifx_ASCLIN *asclin);
466
467 /** \brief Clears the collision detection error flag
468 * \param asclin pointer to ASCLIN registers
469 * \return None
470 */
471 IFX_INLINE void IfxAsclin_clearCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin);
472
473 /** \brief Clears the falling edge detected flag
474 * \param asclin pointer to ASCLIN registers
475 * \return None
476 */
477 IFX_INLINE void IfxAsclin_clearFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin);
478
479 /** \brief Clears the frame error flag
480 * \param asclin pointer to ASCLIN registers
481 * \return None
482 */
483 IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin);
484
485 /** \brief Clears the header timeout flag
486 * \param asclin pointer to ASCLIN registers
487 * \return None
488 */
489 IFX_INLINE void IfxAsclin_clearHeaderTimeoutFlag(Ifx_ASCLIN *asclin);
490
491 /** \brief Clears the kernel reset status
492 * \param asclin pointer to ASCLIN registers
493 * \return None
494 */
495 IFX_INLINE void IfxAsclin_clearKernelResetStatus(Ifx_ASCLIN *asclin);
496
497 /** \brief Clears the auto baudrate detection error flag
498 * \param asclin pointer to ASCLIN registers
499 * \return None
500 */
501 IFX_INLINE void IfxAsclin_clearLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin);
502
503 /** \brief Clears the LIN checksum error flag
504 * \param asclin pointer to ASCLIN registers
505 * \return None
506 */
507 IFX_INLINE void IfxAsclin_clearLinChecksumErrorFlag(Ifx_ASCLIN *asclin);
508
509 /** \brief Clears the LIN parity error flag
510 * \param asclin pointer to ASCLIN registers
511 * \return None
512 */
513 IFX_INLINE void IfxAsclin_clearLinParityErrorFlag(Ifx_ASCLIN *asclin);
514
515 /** \brief Clears the parity error flag
516 * \param asclin pointer to ASCLIN registers
517 * \return None
518 */
519 IFX_INLINE void IfxAsclin_clearParityErrorFlag(Ifx_ASCLIN *asclin);
520
521 /** \brief Clears the raising edge detected flag
522 * \param asclin pointer to ASCLIN registers
523 * \return None
524 */
525 IFX_INLINE void IfxAsclin_clearRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin);
526
527 /** \brief Clears the response timeout flag
528 * \param asclin pointer to ASCLIN registers
529 * \return None
530 */
531 IFX_INLINE void IfxAsclin_clearResponseTimeoutFlag(Ifx_ASCLIN *asclin);
532
533 /** \brief Clears the Rx FIFO level flag
534 * \param asclin pointer to ASCLIN registers
535 * \return None
536 */
537 IFX_INLINE void IfxAsclin_clearRxFifoFillLevelFlag(Ifx_ASCLIN *asclin);
538
539 /** \brief Clears the Rx FIFO overflow flag
540 * \param asclin pointer to ASCLIN registers
541 * \return None
542 */
543 IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin);
544
545 /** \brief Clears the Rx FIFO underflow flag
546 * \param asclin pointer to ASCLIN registers
547 * \return None
548 */
549 IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag(Ifx_ASCLIN *asclin);
550
551 /** \brief Clears the receive header end flag
552 * \param asclin pointer to ASCLIN registers
553 * \return None
554 */
555 IFX_INLINE void IfxAsclin_clearRxHeaderEndFlag(Ifx_ASCLIN *asclin);
556
557 /** \brief Clears the receive response end flag
558 * \param asclin pointer to ASCLIN registers
559 * \return None
560 */
561 IFX_INLINE void IfxAsclin_clearRxResponseEndFlag(Ifx_ASCLIN *asclin);
562
563 /** \brief Clears the transmission pending flag
564 * \param asclin pointer to ASCLIN registers
565 * \return None
566 */
567 IFX_INLINE void IfxAsclin_clearTransmissionCompletedFlag(Ifx_ASCLIN *asclin);
568
569 /** \brief Clears the Tx FIFO level flag
570 * \param asclin pointer to ASCLIN registers
571 * \return None
572 */
573 IFX_INLINE void IfxAsclin_clearTxFifoFillLevelFlag(Ifx_ASCLIN *asclin);
574
575 /** \brief Clears the Tx FIFO overflow flag
576 * \param asclin pointer to ASCLIN registers
577 * \return None
578 */
579 IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin);
580
581 /** \brief Clears the transmit header end flag
582 * \param asclin pointer to ASCLIN registers
583 * \return None
584 */
585 IFX_INLINE void IfxAsclin_clearTxHeaderEndFlag(Ifx_ASCLIN *asclin);
586
587 /** \brief Clears the transmit response end flag
588 * \param asclin pointer to ASCLIN registers
589 * \return None
590 */
591 IFX_INLINE void IfxAsclin_clearTxResponseEndFlag(Ifx_ASCLIN *asclin);
592
593 /** \brief Flushes (empties) the Rx FIFO
594 * \param asclin pointer to ASCLIN registers
595 * \return None
596 */
597 IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin);
598
599 /** \brief Flushes (empties) the Tx FIFO
600 * \param asclin pointer to ASCLIN registers
601 * \return None
602 */
603 IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin);
604
605 /** \brief Sets the baudrate detection's lower limit
606 * \param asclin pointer to ASCLIN registers
607 * \param limit value of the lower limit
608 * \return None
609 */
610 IFX_INLINE void IfxAsclin_setBrdLowerlimt(Ifx_ASCLIN *asclin, uint8 limit);
611
612 /** \brief Sets the baudrate detection's upper limit
613 * \param asclin pointer to ASCLIN registers
614 * \param limit value of the upper limit
615 * \return None
616 */
617 IFX_INLINE void IfxAsclin_setBrdUpperlimt(Ifx_ASCLIN *asclin, uint8 limit);
618
619 /** \brief Sets the checksum injection
620 * \param asclin pointer to ASCLIN registers
621 * \param csi checksum injection selection (not written / written)
622 * \return None
623 */
624 IFX_INLINE void IfxAsclin_setChecksumInjection(Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi);
625
626 /** \brief Sets the checksum mode
627 * \param asclin pointer to ASCLIN registers
628 * \param mode checksum mode selection (classic / enhanced)
629 * \return None
630 */
631 IFX_INLINE void IfxAsclin_setChecksumMode(Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode);
632
633 /** \brief Sets the data length (number of bits per transfer)
634 * \param asclin pointer to ASCLIN registers
635 * \param length data length selection
636 * \return None
637 */
638 IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length);
639
640 /** \brief Sets the denominator of the fractional divider
641 * \param asclin pointer to ASCLIN registers
642 * \param denominator value of the denominator
643 * \return None
644 */
645 IFX_INLINE void IfxAsclin_setDenominator(Ifx_ASCLIN *asclin, uint16 denominator);
646
647 /** \brief Sets the disable module request
648 * \param asclin pointer to ASCLIN registers
649 * \return None
650 */
651 IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin);
652
653 /** \brief Sets the enable module request
654 * \param asclin pointer to ASCLIN registers
655 * \return None
656 */
657 IFX_INLINE void IfxAsclin_setEnableModuleRequest(Ifx_ASCLIN *asclin);
658
659 /** \brief Sets digital glitch filter depth
660 * \param asclin pointer to ASCLIN registers
661 * \param depth digital glitch filter depth selection (1 to 63)
662 * \return None
663 */
664 IFX_INLINE void IfxAsclin_setFilterDepth(Ifx_ASCLIN *asclin, uint8 depth);
665
666 /** \brief Sets the header response selection
667 * \param asclin pointer to ASCLIN registers
668 * \param type type of selection (header and response or header only)
669 * \return None
670 */
671 IFX_INLINE void IfxAsclin_setHeaderResponseSelect(Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type);
672
673 /** \brief Sets the idle delay
674 * \param asclin pointer to ASCLIN registers
675 * \param delay idle delay selection
676 * \return None
677 */
678 IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay);
679
680 /** \brief Sets the kernal reset of the KRST1
681 * \param asclin pointer to ASCLIN registers
682 * \return None
683 */
684 IFX_INLINE void IfxAsclin_setKernelResetOne(Ifx_ASCLIN *asclin);
685
686 /** \brief Sets the kernel reset of the KRST0
687 * \param asclin pointer to ASCLIN registers
688 * \return None
689 */
690 IFX_INLINE void IfxAsclin_setKernelResetZero(Ifx_ASCLIN *asclin);
691
692 /** \brief Sets the lead delay
693 * \param asclin pointer to ASCLIN registers
694 * \param delay lead delay selection
695 * \return None
696 */
697 IFX_INLINE void IfxAsclin_setLeadDelay(Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay);
698
699 /** \brief Sets the LIN break length
700 * \param asclin pointer to ASCLIN registers
701 * \param length value of the break length
702 * \return None
703 */
704 IFX_INLINE void IfxAsclin_setLinBreakLength(Ifx_ASCLIN *asclin, uint8 length);
705
706 /** \brief Sets the LIN header timeout
707 * \param asclin pointer to ASCLIN registers
708 * \param timeout value of the header timeout
709 * \return None
710 */
711 IFX_INLINE void IfxAsclin_setLinHeaderTimeout(Ifx_ASCLIN *asclin, uint8 timeout);
712
713 /** \brief Sets the LIN mode of operation
714 * \param asclin pointer to ASCLIN registers
715 * \param mode mode selection (slave / master)
716 * \return None
717 */
718 IFX_INLINE void IfxAsclin_setLinMode(Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode);
719
720 /** \brief Sets the LIN response timeout mode
721 * \param asclin pointer to ASCLIN registers
722 * \param mode LIN response timeout mode selection
723 * \return None
724 */
725 IFX_INLINE void IfxAsclin_setLinResponseTimeoutMode(Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode);
726
727 /** \brief Sets the LIN response timeout threshold
728 * \param asclin pointer to ASCLIN registers
729 * \param threshold value of the tomeout threshold (1 to 256 bit times)
730 * \return None
731 */
732 IFX_INLINE void IfxAsclin_setLinResponseTimeoutThreshold(Ifx_ASCLIN *asclin, uint16 threshold);
733
734 /** \brief Sets the numerator of the fractional divider
735 * \param asclin pointer to ASCLIN registers
736 * \param numerator value of the numerator
737 * \return None
738 */
739 IFX_INLINE void IfxAsclin_setNumerator(Ifx_ASCLIN *asclin, uint16 numerator);
740
741 /** \brief Sets the division ratio of the baudrate post divider
742 * \param asclin pointer to ASCLIN registers
743 * \param ovsFactor value of oversampling factor
744 * \return None
745 */
746 IFX_INLINE void IfxAsclin_setOversampling(Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor);
747
748 /** \brief Sets the parity type
749 * \param asclin pointer to ASCLIN registers
750 * \param type parity type selction (even / odd)
751 * \return None
752 */
753 IFX_INLINE void IfxAsclin_setParityType(Ifx_ASCLIN *asclin, IfxAsclin_ParityType type);
754
755 /** \brief Sets the division ratio of the predivider (prescaler)
756 * \param asclin pointer to ASCLIN registers
757 * \param prescaler value of prescaler
758 * \return None
759 */
760 IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler);
761
762 /** \brief Sets the receive buffer mode
763 * \param asclin pointer to ASCLIN registers
764 * \param mode receive buffer mode selection (Rx FIFO or single stage Rx buffer)
765 * \return None
766 */
767 IFX_INLINE void IfxAsclin_setRxBufferMode(Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode);
768
769 /** \brief Sets the Tx FIFO interrupt level
770 * \param asclin pointer to ASCLIN registers
771 * \param level interrupt level selection
772 * \return None
773 */
774 IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level);
775
776 /** \brief Sets the receive FIFO outlet width
777 * \param asclin pointer to ASCLIN registers
778 * \param width number of bytes read to the Rx FIFO with one FPI bus read
779 * \return None
780 */
781 IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width);
782
783 /** \brief Sets the sample mode (number of samples per bit / median filter)
784 * \param asclin pointer to ASCLIN registers
785 * \param medianFilter value of the median filter
786 * \return None
787 */
788 IFX_INLINE void IfxAsclin_setSampleMode(Ifx_ASCLIN *asclin, IfxAsclin_SamplesPerBit medianFilter);
789
790 /** \brief Sets the sampling point position
791 * \param asclin pointer to ASCLIN registers
792 * \param spPosition sample point position selection
793 * \return None
794 */
795 IFX_INLINE void IfxAsclin_setSamplePointPosition(Ifx_ASCLIN *asclin, IfxAsclin_SamplePointPosition spPosition);
796
797 /** \brief Sets the shift direction
798 * \param asclin pointer to ASCLIN registers
799 * \param dir shift direction selection (LSB / MSB first)
800 * \return None
801 */
802 IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir);
803
804 /** \brief Sets the number of stop bits
805 * \param asclin pointer to ASCLIN registers
806 * \param stopBit number of stop bits selection
807 * \return None
808 */
809 IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit);
810
811 /** \brief Sets the transmit header request flag
812 * \param asclin pointer to ASCLIN registers
813 * \return None
814 */
815 IFX_INLINE void IfxAsclin_setTransmitHeaderRequestFlag(Ifx_ASCLIN *asclin);
816
817 /** \brief Sets the transmit response request flag
818 * \param asclin pointer to ASCLIN registers
819 * \return None
820 */
821 IFX_INLINE void IfxAsclin_setTransmitResponseRequestFlag(Ifx_ASCLIN *asclin);
822
823 /** \brief Sets the transmission wake request flag
824 * \param asclin pointer to ASCLIN registers
825 * \return None
826 */
827 IFX_INLINE void IfxAsclin_setTransmitWakeRequestFlag(Ifx_ASCLIN *asclin);
828
829 /** \brief Sets the transmit FIFO inlet width
830 * \param asclin pointer to ASCLIN registers
831 * \param width number of bytes written to the Tx FIFO with one FPI bus write
832 * \return None
833 */
834 IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width);
835
836 /** \brief Sets the Tx FIFO interrupt level
837 * \param asclin pointer to ASCLIN registers
838 * \param level interrupt level selection
839 * \return None
840 */
841 IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level);
842
843 /** \} */
844
845 /** \addtogroup IfxLld_Asclin_Std_Utility
846 * \{ */
847
848 /******************************************************************************/
849 /*-------------------------Inline Function Prototypes-------------------------*/
850 /******************************************************************************/
851
852 /** \brief Returns the break detected flag status
853 * \param asclin pointer to ASCLIN registers
854 * \return break detected flag status
855 */
856 IFX_INLINE boolean IfxAsclin_getBreakDetectedFlagStatus(Ifx_ASCLIN *asclin);
857
858 /** \brief Returns the clock source
859 * \param asclin pointer to ASCLIN registers
860 * \return clock source
861 */
862 IFX_INLINE uint8 IfxAsclin_getClockSource(Ifx_ASCLIN *asclin);
863
864 /** \brief Returns the clock status
865 * \param asclin pointer to ASCLIN registers
866 * \return clock status (off / on)
867 */
868 IFX_INLINE boolean IfxAsclin_getClockStatus(Ifx_ASCLIN *asclin);
869
870 /** \brief Returns the collision detection error flag status
871 * \param asclin pointer to ASCLIN registers
872 * \return collision detection error flag status
873 */
874 IFX_INLINE boolean IfxAsclin_getCollisionDetectionErrorFlagStatus(Ifx_ASCLIN *asclin);
875
876 /** \brief Returns the falling edge detected flag status
877 * \param asclin pointer to ASCLIN registers
878 * \return falling edge detected flag status
879 */
880 IFX_INLINE boolean IfxAsclin_getFallingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin);
881
882 /** \brief Returns the frame error flag status
883 * \param asclin pointer to ASCLIN registers
884 * \return frame error flag status
885 */
886 IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin);
887
888 /** \brief Returns the header timeout flag status
889 * \param asclin pointer to ASCLIN registers
890 * \return header timeout flag status
891 */
892 IFX_INLINE boolean IfxAsclin_getHeaderTimeoutFlagStatus(Ifx_ASCLIN *asclin);
893
894 /** \brief Returns the kernel reset status
895 * \param asclin pointer to ASCLIN registers
896 * \return kernel reset status
897 */
898 IFX_INLINE boolean IfxAsclin_getKernelResetStatus(Ifx_ASCLIN *asclin);
899
900 /** \brief Returns the LIN auto baudrate detection error flag status
901 * \param asclin pointer to ASCLIN registers
902 * \return LIN auto baudrate detection error flag status
903 */
904 IFX_INLINE boolean IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(Ifx_ASCLIN *asclin);
905
906 /** \brief Returns the LIN checksum error flag status
907 * \param asclin pointer to ASCLIN registers
908 * \return LIN checksum error flag status
909 */
910 IFX_INLINE boolean IfxAsclin_getLinChecksumErrorFlagStatus(Ifx_ASCLIN *asclin);
911
912 /** \brief Returns the LIN parity error flag status
913 * \param asclin pointer to ASCLIN registers
914 * \return LIN parity error flag status
915 */
916 IFX_INLINE boolean IfxAsclin_getLinParityErrorFlagStatus(Ifx_ASCLIN *asclin);
917
918 /** \brief Returns the module status
919 * \param asclin pointer to ASCLIN registers
920 * \return module status (enabled / disabled)
921 */
922 IFX_INLINE boolean IfxAsclin_getModuleStatus(Ifx_ASCLIN *asclin);
923
924 /** \brief Returns the parity error flag status
925 * \param asclin pointer to ASCLIN registers
926 * \return parity error flag status
927 */
928 IFX_INLINE boolean IfxAsclin_getParityErrorFlagStatus(Ifx_ASCLIN *asclin);
929
930 /** \brief Returns the division ratio of the predivider (prescaler)
931 * \param asclin pointer to ASCLIN registers
932 * \return value of prescaler
933 */
934 IFX_INLINE uint16 IfxAsclin_getPrescaler(Ifx_ASCLIN *asclin);
935
936 /** \brief Returns the raising edge detected flag status
937 * \param asclin pointer to ASCLIN registers
938 * \return raising edge detected flag status
939 */
940 IFX_INLINE boolean IfxAsclin_getRaisingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin);
941
942 /** \brief Returns the received signal status
943 * \param asclin pointer to ASCLIN registers
944 * \return received signal status (0 is low & 1 is high)
945 */
946 IFX_INLINE boolean IfxAsclin_getReceiveSignalStatus(Ifx_ASCLIN *asclin);
947
948 /** \brief Returns the response timeout flag status
949 * \param asclin pointer to ASCLIN registers
950 * \return response timeout flag status
951 */
952 IFX_INLINE boolean IfxAsclin_getResponseTimeoutFlagStatus(Ifx_ASCLIN *asclin);
953
954 /** \brief Returns the current filling level of Tx FIFO
955 * \param asclin pointer to ASCLIN registers
956 * \return current filling level of Rx FIFO
957 */
958 IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel(Ifx_ASCLIN *asclin);
959
960 /** \brief Returns the Rx FIFO level flag status
961 * \param asclin pointer to ASCLIN registers
962 * \return Rx FIFO level flag status
963 */
964 IFX_INLINE boolean IfxAsclin_getRxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin);
965
966 /** \brief Returns the receive FIFO inlet width
967 * \param asclin pointer to ASCLIN registers
968 * \return number of bytes read to the Rx FIFO with one FPI bus read
969 */
970 IFX_INLINE uint8 IfxAsclin_getRxFifoOutletWidth(Ifx_ASCLIN *asclin);
971
972 /** \brief Returns the Rx FIFO overflow flag status
973 * \param asclin pointer to ASCLIN registers
974 * \return Rx FIFO overflow flag status
975 */
976 IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin);
977
978 /** \brief Returns the Rx FIFO underflow flag status
979 * \param asclin pointer to ASCLIN registers
980 * \return Rx FIFO underflow flag status
981 */
982 IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus(Ifx_ASCLIN *asclin);
983
984 /** \brief Returns the receive header end flag status
985 * \param asclin pointer to ASCLIN registers
986 * \return receive header end flag status
987 */
988 IFX_INLINE boolean IfxAsclin_getRxHeaderEndFlagStatus(Ifx_ASCLIN *asclin);
989
990 /** \brief Returns the receive response end flag status
991 * \param asclin pointer to ASCLIN registers
992 * \return receive response end flag status
993 */
994 IFX_INLINE boolean IfxAsclin_getRxResponseEndFlagStatus(Ifx_ASCLIN *asclin);
995
996 /** \brief Returns the transmission pending flag status
997 * \param asclin pointer to ASCLIN registers
998 * \return transmission pending flag status
999 */
1000 IFX_INLINE boolean IfxAsclin_getTransmissionCompletedFlagStatus(Ifx_ASCLIN *asclin);
1001
1002 /** \brief Returns the transmit signal status
1003 * \param asclin pointer to ASCLIN registers
1004 * \return transmit signal status (0 is low & 1 is high)
1005 */
1006 IFX_INLINE boolean IfxAsclin_getTransmitSignalStatus(Ifx_ASCLIN *asclin);
1007
1008 /** \brief Returns the current filling level of Tx FIFO
1009 * \param asclin pointer to ASCLIN registers
1010 * \return current filling level of Tx FIFO
1011 */
1012 IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel(Ifx_ASCLIN *asclin);
1013
1014 /** \brief Returns the Tx FIFO level flag status
1015 * \param asclin pointer to ASCLIN registers
1016 * \return Tx FIFO level flag status
1017 */
1018 IFX_INLINE boolean IfxAsclin_getTxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin);
1019
1020 /** \brief Returns the transmit FIFO inlet width
1021 * \param asclin pointer to ASCLIN registers
1022 * \return number of bytes written to the Tx FIFO with one FPI bus write
1023 */
1024 IFX_INLINE uint8 IfxAsclin_getTxFifoInletWidth(Ifx_ASCLIN *asclin);
1025
1026 /** \brief Returns the Tx FIFO overflow flag status
1027 * \param asclin pointer to ASCLIN registers
1028 * \return Tx FIFO overflow flag status
1029 */
1030 IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin);
1031
1032 /** \brief Returns the transmit header end flag status
1033 * \param asclin pointer to ASCLIN registers
1034 * \return transmit header end flag status
1035 */
1036 IFX_INLINE boolean IfxAsclin_getTxHeaderEndFlagStatus(Ifx_ASCLIN *asclin);
1037
1038 /** \brief Returns the transmit response end flag status
1039 * \param asclin pointer to ASCLIN registers
1040 * \return transmit response end flag status
1041 */
1042 IFX_INLINE boolean IfxAsclin_getTxResponseEndFlagStatus(Ifx_ASCLIN *asclin);
1043
1044 /** \brief Sets the sensitivity of the module to sleep signal
1045 * \param asclin pointer to ASCLIN registers
1046 * \param mode mode selection (enable / disable)
1047 * \return None
1048 */
1049 IFX_INLINE void IfxAsclin_setSleepMode(Ifx_ASCLIN *asclin, IfxAsclin_SleepMode mode);
1050
1051 /******************************************************************************/
1052 /*-------------------------Global Function Prototypes-------------------------*/
1053 /******************************************************************************/
1054
1055 /** \brief API to get the address for ASCLIN HW module register memory map
1056 * \param asclin Resource index of the ASCLIN
1057 * \return ASCLIN module register address
1058 */
1059 IFX_EXTERN Ifx_ASCLIN *IfxAsclin_getAddress(IfxAsclin_Index asclin);
1060
1061 /** \brief Returns the ASCLIN module FA frequency in Hz
1062 * \param asclin pointer to ASCLIN registers
1063 * \return Returns the ASCLIN module FA frequency in Hz
1064 */
1065 IFX_EXTERN float32 IfxAsclin_getFaFrequency(Ifx_ASCLIN *asclin);
1066
1067 /** \brief API to get the resource index of the ASCLIN specified.
1068 * \return asclin resource index
1069 */
1070 IFX_EXTERN IfxAsclin_Index IfxAsclin_getIndex(Ifx_ASCLIN *asclin);
1071
1072 /** \brief Returns the OVS frequency
1073 * \param asclin pointer to ASCLIN registers
1074 * \return Returns the ASCLIN module OVS frequency in Hz
1075 */
1076 IFX_EXTERN float32 IfxAsclin_getOvsFrequency(Ifx_ASCLIN *asclin);
1077
1078 /** \brief Returns the PD frequency
1079 * \param asclin pointer to ASCLIN registers
1080 * \return Returns the ASCLIN module PD frequency in Hz
1081 */
1082 IFX_EXTERN float32 IfxAsclin_getPdFrequency(Ifx_ASCLIN *asclin);
1083
1084 /** \brief Returns the SHIFT frequency
1085 * \param asclin pointer to ASCLIN registers
1086 * \return Returns the ASCLIN module SHIFT frequency in Hz
1087 */
1088 IFX_EXTERN float32 IfxAsclin_getShiftFrequency(Ifx_ASCLIN *asclin);
1089
1090 /** \brief resets Asclin kernel
1091 * \param asclin pointer to ASCLIN resgisters
1092 * \return None
1093 */
1094 IFX_EXTERN void IfxAsclin_resetModule(Ifx_ASCLIN *asclin);
1095
1096 /** \} */
1097
1098 /** \addtogroup IfxLld_Asclin_Std_Configuration
1099 * \{ */
1100
1101 /******************************************************************************/
1102 /*-------------------------Inline Function Prototypes-------------------------*/
1103 /******************************************************************************/
1104
1105 /** \brief disables all flags
1106 * \param asclin pointer to ASCLIN registers
1107 * \return None
1108 */
1109 IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin);
1110
1111 /** \brief Enables/disables the auto baudrate detection
1112 * \param asclin pointer to ASCLIN registers
1113 * \param enable choice (enable / disable)
1114 * \return None
1115 */
1116 IFX_INLINE void IfxAsclin_enableAutoBaudrateDetection(Ifx_ASCLIN *asclin, boolean enable);
1117
1118 /** \brief Enables/disables break detected flag
1119 * \param asclin pointer to ASCLIN registers
1120 * \param enable choice (enable / disable)
1121 * \return None
1122 */
1123 IFX_INLINE void IfxAsclin_enableBreakDetectedFlag(Ifx_ASCLIN *asclin, boolean enable);
1124
1125 /** \brief Enables/disables the collision detection
1126 * \param asclin pointer to ASCLIN registers
1127 * \param enable choice (enable/disable)
1128 * \return None
1129 */
1130 IFX_INLINE void IfxAsclin_enableCollisionDetection(Ifx_ASCLIN *asclin, boolean enable);
1131
1132 /** \brief Enables/disables LIN collision detection error flag
1133 * \param asclin pointer to ASCLIN registers
1134 * \param enable choice (enable / disable)
1135 * \return None
1136 */
1137 IFX_INLINE void IfxAsclin_enableCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1138
1139 /** \brief Enables/disables CTS
1140 * \param asclin pointer to ASCLIN registers
1141 * \param enable choice (enable/disable)
1142 * \return None
1143 */
1144 IFX_INLINE void IfxAsclin_enableCts(Ifx_ASCLIN *asclin, boolean enable);
1145
1146 /** \brief Enables/disables falling edge detected flag
1147 * \param asclin pointer to ASCLIN registers
1148 * \param enable choice (enable / disable)
1149 * \return None
1150 */
1151 IFX_INLINE void IfxAsclin_enableFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable);
1152
1153 /** \brief Enables/disables frame error flag
1154 * \param asclin pointer to ASCLIN registers
1155 * \param enable choice (enable / disable)
1156 * \return None
1157 */
1158 IFX_INLINE void IfxAsclin_enableFrameErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1159
1160 /** \brief Enables/disables the hardware checksum
1161 * \param asclin pointer to ASCLIN registers
1162 * \param enable choice (enable / disable)
1163 * \return None
1164 */
1165 IFX_INLINE void IfxAsclin_enableHardwareChecksum(Ifx_ASCLIN *asclin, boolean enable);
1166
1167 /** \brief Enables/disables header timeout flag
1168 * \param asclin pointer to ASCLIN registers
1169 * \param enable choice (enable / disable)
1170 * \return None
1171 */
1172 IFX_INLINE void IfxAsclin_enableHeaderTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable);
1173
1174 /** \brief Enables/disables LIN auto baudrate detection error flag
1175 * \param asclin pointer to ASCLIN registers
1176 * \param enable choice (enable / disable)
1177 * \return None
1178 */
1179 IFX_INLINE void IfxAsclin_enableLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1180
1181 /** \brief Enables/disables LIN checksum error flag
1182 * \param asclin pointer to ASCLIN registers
1183 * \param enable choice (enable / disable)
1184 * \return None
1185 */
1186 IFX_INLINE void IfxAsclin_enableLinChecksumErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1187
1188 /** \brief Enables/disables LIN parity error flag
1189 * \param asclin pointer to ASCLIN registers
1190 * \param enable choice (enable / disable)
1191 * \return None
1192 */
1193 IFX_INLINE void IfxAsclin_enableLinParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1194
1195 /** \brief Enables/disables the loop back mode
1196 * \param asclin pointer to ASCLIN registers
1197 * \param enable choice (enable/disable)
1198 * \return None
1199 */
1200 IFX_INLINE void IfxAsclin_enableLoopBackMode(Ifx_ASCLIN *asclin, boolean enable);
1201
1202 /** \brief Enables/disables the parity bit attachment to tha data bits
1203 * \param asclin pointer to ASCLIN registers
1204 * \param enable choice (enable/disable)
1205 * \return None
1206 */
1207 IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable);
1208
1209 /** \brief Enables/disables parity error flag
1210 * \param asclin pointer to ASCLIN registers
1211 * \param enable choice (enable / disable)
1212 * \return None
1213 */
1214 IFX_INLINE void IfxAsclin_enableParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1215
1216 /** \brief Enables/disables raising edge detected flag
1217 * \param asclin pointer to ASCLIN registers
1218 * \param enable choice (enable / disable)
1219 * \return None
1220 */
1221 IFX_INLINE void IfxAsclin_enableRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable);
1222
1223 /** \brief Enables/disables response timeout flag
1224 * \param asclin pointer to ASCLIN registers
1225 * \param enable choice (enable / disable)
1226 * \return None
1227 */
1228 IFX_INLINE void IfxAsclin_enableResponseTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable);
1229
1230 /** \brief Enables/disables Rx FIFO level flag
1231 * \param asclin pointer to ASCLIN registers
1232 * \param enable choice (enable / disable)
1233 * \return None
1234 */
1235 IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable);
1236
1237 /** \brief Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register
1238 * \param asclin pointer to ASCLIN registers
1239 * \param enable choice (enable/disable)
1240 * \return None
1241 */
1242 IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable);
1243
1244 /** \brief Enables/disables Rx FIFO overflow flag
1245 * \param asclin pointer to ASCLIN registers
1246 * \param enable choice (enable / disable)
1247 * \return None
1248 */
1249 IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable);
1250
1251 /** \brief Enables/disables Rx FIFO underflow flag
1252 * \param asclin pointer to ASCLIN registers
1253 * \param enable choice (enable / disable)
1254 * \return None
1255 */
1256 IFX_INLINE void IfxAsclin_enableRxFifoUnderflowFlag(Ifx_ASCLIN *asclin, boolean enable);
1257
1258 /** \brief Enables/disables receive header end flag
1259 * \param asclin pointer to ASCLIN registers
1260 * \param enable choice (enable / disable)
1261 * \return None
1262 */
1263 IFX_INLINE void IfxAsclin_enableRxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable);
1264
1265 /** \brief Enables/disables receive response end flag
1266 * \param asclin pointer to ASCLIN registers
1267 * \param enable choice (enable / disable)
1268 * \return None
1269 */
1270 IFX_INLINE void IfxAsclin_enableRxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable);
1271
1272 /** \brief Enables/disables transmission completed flag
1273 * \param asclin pointer to ASCLIN registers
1274 * \param enable choice (enable / disable)
1275 * \return None
1276 */
1277 IFX_INLINE void IfxAsclin_enableTransmissionCompletedFlag(Ifx_ASCLIN *asclin, boolean enable);
1278
1279 /** \brief Enables/disables Tx FIFO level flag
1280 * \param asclin pointer to ASCLIN registers
1281 * \param enable choice (enable / disable)
1282 * \return None
1283 */
1284 IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable);
1285
1286 /** \brief Enables/disables the transmit FIFO outlet to allow transmission
1287 * \param asclin pointer to ASCLIN registers
1288 * \param enable choice (enable/disable)
1289 * \return None
1290 */
1291 IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable);
1292
1293 /** \brief Enables/disables Tx FIFO overflow flag
1294 * \param asclin pointer to ASCLIN registers
1295 * \param enable choice (enable / disable)
1296 * \return None
1297 */
1298 IFX_INLINE void IfxAsclin_enableTxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable);
1299
1300 /** \brief Enables/disables transmit header end flag
1301 * \param asclin pointer to ASCLIN registers
1302 * \param enable choice (enable / disable)
1303 * \return None
1304 */
1305 IFX_INLINE void IfxAsclin_enableTxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable);
1306
1307 /** \brief Enables/disables transmit response end flag
1308 * \param asclin pointer to ASCLIN registers
1309 * \param enable choice (enable / disable)
1310 * \return None
1311 */
1312 IFX_INLINE void IfxAsclin_enableTxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable);
1313
1314 /** \brief Returns the module's suspend state.
1315 * TRUE :if module is suspended.
1316 * FALSE:if module is not yet suspended.
1317 * \param asclin Pointer to ASCLIN module registers
1318 * \return Suspend status (TRUE / FALSE)
1319 */
1320 IFX_INLINE boolean IfxAsclin_isModuleSuspended(Ifx_ASCLIN *asclin);
1321
1322 /** \brief Selects the clock polarity
1323 * \param asclin pointer to ASCLIN registers
1324 * \param cpol CPOL selection
1325 * \return None
1326 */
1327 IFX_INLINE void IfxAsclin_setClockPolarity(Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol);
1328
1329 /** \brief Selects the CTS input pin
1330 * \param asclin pointer to ASCLIN registers
1331 * \param ctsi CTS input pin selection
1332 * \return None
1333 */
1334 IFX_INLINE void IfxAsclin_setCtsInput(Ifx_ASCLIN *asclin, IfxAsclin_CtsInputSelect ctsi);
1335
1336 /** \brief Selects the module's mode of operation
1337 * \param asclin pointer to ASCLIN registers
1338 * \param mode mode selction
1339 * \return None
1340 */
1341 IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode);
1342
1343 /** \brief Selects the RTS/CTS polarity
1344 * \param asclin pointer to ASCLIN registers
1345 * \param rcpol RCPOL selection
1346 * \return None
1347 */
1348 IFX_INLINE void IfxAsclin_setRtsCtsPolarity(Ifx_ASCLIN *asclin, IfxAsclin_RtsCtsPolarity rcpol);
1349
1350 /** \brief Selects the alternate input for Rx signal
1351 * \param asclin pointer to ASCLIN registers
1352 * \param alti alternate input selection of Rx signal
1353 * \return None
1354 */
1355 IFX_INLINE void IfxAsclin_setRxInput(Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti);
1356
1357 /** \brief Selects the slave polarity
1358 * \param asclin pointer to ASCLIN registers
1359 * \param spol SPOL selection
1360 * \return None
1361 */
1362 IFX_INLINE void IfxAsclin_setSlavePolarity(Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol);
1363
1364 /** \brief Configure the Module to Hard/Soft suspend mode.
1365 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
1366 * \param asclin Pointer to ASCLIN module registers
1367 * \param mode Module suspend mode
1368 * \return None
1369 */
1370 IFX_INLINE void IfxAsclin_setSuspendMode(Ifx_ASCLIN *asclin, IfxAsclin_SuspendMode mode);
1371
1372 /******************************************************************************/
1373 /*-------------------------Global Function Prototypes-------------------------*/
1374 /******************************************************************************/
1375
1376 /** \brief Set the bit timing
1377 *
1378 * \note this function required FA source and the PD frequency to be set to their final values
1379 * \param asclin pointer to ASCLIN registers
1380 * \param baudrate Required baudrate
1381 * \param oversampling The oversampling factor
1382 * \param samplepoint The sample point position
1383 * \param medianFilter Number of samples per bit (median filter)
1384 * \return TRUE if configuration was successfull
1385 */
1386 IFX_EXTERN boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter);
1387
1388 /** \} */
1389
1390 /** \addtogroup IfxLld_Asclin_Std_External
1391 * \{ */
1392
1393 /******************************************************************************/
1394 /*-------------------------Global Function Prototypes-------------------------*/
1395 /******************************************************************************/
1396
1397 /** \brief Disables the module
1398 * \param asclin pointer to ASCLIN registers
1399 * \return None
1400 */
1401 IFX_EXTERN void IfxAsclin_disableModule(Ifx_ASCLIN *asclin);
1402
1403 /** \brief Enables the ASC error interrupt Flags
1404 * \param asclin pointer to ASCLIN registers
1405 * \param parEnable parity error
1406 * \param rfoEnable Rx FIFO overflow error
1407 * \return None
1408 */
1409 IFX_EXTERN void IfxAsclin_enableAscErrorFlags(Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable);
1410
1411 /** \brief Enables the module
1412 * \param asclin pointer to ASCLIN registers
1413 * \return None
1414 */
1415 IFX_EXTERN void IfxAsclin_enableModule(Ifx_ASCLIN *asclin);
1416
1417 /** \brief Returns the SRC pointer for ERR
1418 * \param asclin pointer to ASCLIN registers
1419 */
1420 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin);
1421
1422 /** \brief Returns the SRC pointer for Rx
1423 * \param asclin pointer to ASCLIN registers
1424 */
1425 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin);
1426
1427 /** \brief Returns the SRC pointer for Tx
1428 * \param asclin pointer to ASCLIN registers
1429 */
1430 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin);
1431
1432 /** \brief Reads data up to 16 bits
1433 * \param asclin pointer to ASCLIN registers
1434 * \param data Array where the read data shall be stored
1435 * \param count number of items to read
1436 * \return number of items that could not be read
1437 */
1438 IFX_EXTERN uint32 IfxAsclin_read16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count);
1439
1440 /** \brief Reads data up to 32 bits
1441 * \param asclin pointer to ASCLIN registers
1442 * \param data Array where the read data shall be stored
1443 * \param count number of items to read
1444 * \return number of items that could not be read
1445 */
1446 IFX_EXTERN uint32 IfxAsclin_read32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count);
1447
1448 /** \brief Reads data up to 8 bits
1449 * \param asclin pointer to ASCLIN registers
1450 * \param data Array where the read data shall be stored
1451 * \param count number of items to read
1452 * \return number of items that could not be read
1453 */
1454 IFX_EXTERN uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count);
1455
1456 /** \brief Sets the baudrate bit fields
1457 * \param asclin pointer to ASCLIN registers
1458 * \param prescaler division ratio of the predivider
1459 * \param numerator numerator of the fractional divider
1460 * \param denominator denominator of the fractional divider
1461 * \param oversampling division ratio of the baudrate postdivider
1462 * \return None
1463 */
1464 IFX_EXTERN void IfxAsclin_setBaudrateBitFields(Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling);
1465
1466 /** \brief Sets the clock source
1467 * \param asclin pointer to ASCLIN registers
1468 * \param clockSource clock source selection
1469 * \return None
1470 */
1471 IFX_EXTERN void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource);
1472
1473 /** \brief Writes data up to 16 bits
1474 * \param asclin pointer to ASCLIN registers
1475 * \param data Array of data to be send
1476 * \param count number of items to be send
1477 * \return the number of items that could not be send
1478 */
1479 IFX_EXTERN uint32 IfxAsclin_write16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count);
1480
1481 /** \brief Writes data up to 32 bits
1482 * \param asclin pointer to ASCLIN registers
1483 * \param data Array of data to be send
1484 * \param count number of items to be send
1485 * \return the number of items that could not be send
1486 */
1487 IFX_EXTERN uint32 IfxAsclin_write32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count);
1488
1489 /** \brief Writes data up to 8 bits
1490 * \param asclin pointer to ASCLIN registers
1491 * \param data Array of data to be send
1492 * \param count number of items to be send
1493 * \return the number of items that could not be send
1494 */
1495 IFX_EXTERN uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count);
1496
1497 /** \} */
1498
1499 /** \addtogroup IfxLld_Asclin_Std_IO
1500 * \{ */
1501
1502 /******************************************************************************/
1503 /*-------------------------Inline Function Prototypes-------------------------*/
1504 /******************************************************************************/
1505
1506 /** \brief Initializes a CTS input
1507 *
1508 * Attention: the kernel clock has to be disabled whenever the input multiplexer is changed.
1509 *
1510 * This can be done with IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock);
1511 *
1512 * After the function call, the current clock can be enabled again.
1513 * \param cts the CTS Pin which should be configured
1514 * \param inputMode the pin input mode which should be configured
1515 * \param padDriver the pad driver mode which should be configured
1516 * \return None
1517 */
1518 IFX_INLINE void IfxAsclin_initCtsPin(const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1519
1520 /** \brief Initializes a RTS output
1521 * \param rts the RTS Pin which should be configured
1522 * \param outputMode the pin output mode which should be configured
1523 * \param padDriver the pad driver mode which should be configured
1524 * \return None
1525 */
1526 IFX_INLINE void IfxAsclin_initRtsPin(const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1527
1528 /** \brief Initializes a RX input
1529 *
1530 * Attention: the kernel clock has to be disabled whenever the input multiplexer is changed.
1531 *
1532 * This can be done with IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock);
1533 *
1534 * After the function call, the current clock can be enabled again.
1535 * \param rx the RX Pin which should be configured
1536 * \param inputMode the pin input mode which should be configured
1537 * \param padDriver the pad driver mode which should be configured
1538 * \return None
1539 */
1540 IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1541
1542 /** \brief Initializes a SCLK output
1543 * \param sclk the SCLK Pin which should be configured
1544 * \param outputMode the pin output mode which should be configured
1545 * \param padDriver the pad driver mode which should be configured
1546 * \return None
1547 */
1548 IFX_INLINE void IfxAsclin_initSclkPin(const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1549
1550 /** \brief Initializes a SLSO output
1551 * \param slso the SLSO Pin which should be configured
1552 * \param outputMode the pin output mode which should be configured
1553 * \param padDriver the pad driver mode which should be configured
1554 * \return None
1555 */
1556 IFX_INLINE void IfxAsclin_initSlsoPin(const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1557
1558 /** \brief Initializes a TX output
1559 * \param tx the TX Pin which should be configured
1560 * \param outputMode the pin output mode which should be configured
1561 * \param padDriver the pad driver mode which should be configured
1562 * \return None
1563 */
1564 IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1565
1566 /** \} */
1567
1568 /******************************************************************************/
1569 /*-------------------------Inline Function Prototypes-------------------------*/
1570 /******************************************************************************/
1571
1572 /**
1573 * \param asclin pointer to ASCLIN registers
1574 * \return returns the value of RxDATA register
1575 */
1576 IFX_INLINE uint32 IfxAsclin_readRxData(Ifx_ASCLIN *asclin);
1577
1578 /**
1579 * \param asclin pointer to ASCLIN registers
1580 * \param data data to be written
1581 * \return None
1582 */
1583 IFX_INLINE void IfxAsclin_writeTxData(Ifx_ASCLIN *asclin, uint32 data);
1584
1585 /** \brief Returns the status of all error flags
1586 * \param asclin pointer to ASCLIN registers
1587 * \return status
1588 */
1589 IFX_INLINE uint16 IfxAsclin_getAllErrorFlagsStatus(Ifx_ASCLIN *asclin);
1590
1591 /******************************************************************************/
1592 /*---------------------Inline Function Implementations------------------------*/
1593 /******************************************************************************/
1594
1595 IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
1596 {
1597 asclin->FLAGSCLEAR.U = 0xFFFFFFFF;
1598 }
1599
1600
1601 IFX_INLINE void IfxAsclin_clearBreakDetectedFlag(Ifx_ASCLIN *asclin)
1602 {
1603 asclin->FLAGSCLEAR.B.BDC = 1;
1604 }
1605
1606
1607 IFX_INLINE void IfxAsclin_clearCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin)
1608 {
1609 asclin->FLAGSCLEAR.B.CEC = 1;
1610 }
1611
1612
1613 IFX_INLINE void IfxAsclin_clearFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin)
1614 {
1615 asclin->FLAGSCLEAR.B.FEDC = 1;
1616 }
1617
1618
1619 IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin)
1620 {
1621 asclin->FLAGSCLEAR.B.FEC = 1;
1622 }
1623
1624
1625 IFX_INLINE void IfxAsclin_clearHeaderTimeoutFlag(Ifx_ASCLIN *asclin)
1626 {
1627 asclin->FLAGSCLEAR.B.HTC = 1;
1628 }
1629
1630
1631 IFX_INLINE void IfxAsclin_clearKernelResetStatus(Ifx_ASCLIN *asclin)
1632 {
1633 asclin->KRSTCLR.B.CLR = 1;
1634 }
1635
1636
1637 IFX_INLINE void IfxAsclin_clearLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin)
1638 {
1639 asclin->FLAGSCLEAR.B.LAC = 1;
1640 }
1641
1642
1643 IFX_INLINE void IfxAsclin_clearLinChecksumErrorFlag(Ifx_ASCLIN *asclin)
1644 {
1645 asclin->FLAGSCLEAR.B.LCC = 1;
1646 }
1647
1648
1649 IFX_INLINE void IfxAsclin_clearLinParityErrorFlag(Ifx_ASCLIN *asclin)
1650 {
1651 asclin->FLAGSCLEAR.B.LPC = 1;
1652 }
1653
1654
1655 IFX_INLINE void IfxAsclin_clearParityErrorFlag(Ifx_ASCLIN *asclin)
1656 {
1657 asclin->FLAGSCLEAR.B.PEC = 1;
1658 }
1659
1660
1661 IFX_INLINE void IfxAsclin_clearRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin)
1662 {
1663 asclin->FLAGSCLEAR.B.REDC = 1;
1664 }
1665
1666
1667 IFX_INLINE void IfxAsclin_clearResponseTimeoutFlag(Ifx_ASCLIN *asclin)
1668 {
1669 asclin->FLAGSCLEAR.B.RTC = 1;
1670 }
1671
1672
1673 IFX_INLINE void IfxAsclin_clearRxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
1674 {
1675 asclin->FLAGSCLEAR.B.RFLC = 1;
1676 }
1677
1678
1679 IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin)
1680 {
1681 asclin->FLAGSCLEAR.B.RFOC = 1;
1682 }
1683
1684
1685 IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag(Ifx_ASCLIN *asclin)
1686 {
1687 asclin->FLAGSCLEAR.B.RFUC = 1;
1688 }
1689
1690
1691 IFX_INLINE void IfxAsclin_clearRxHeaderEndFlag(Ifx_ASCLIN *asclin)
1692 {
1693 asclin->FLAGSCLEAR.B.RHC = 1;
1694 }
1695
1696
1697 IFX_INLINE void IfxAsclin_clearRxResponseEndFlag(Ifx_ASCLIN *asclin)
1698 {
1699 asclin->FLAGSCLEAR.B.RRC = 1;
1700 }
1701
1702
1703 IFX_INLINE void IfxAsclin_clearTransmissionCompletedFlag(Ifx_ASCLIN *asclin)
1704 {
1705 asclin->FLAGSCLEAR.B.TCC = 1;
1706 }
1707
1708
1709 IFX_INLINE void IfxAsclin_clearTxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
1710 {
1711 asclin->FLAGSCLEAR.B.TFLC = 1;
1712 }
1713
1714
1715 IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin)
1716 {
1717 asclin->FLAGSCLEAR.B.TFOC = 1;
1718 }
1719
1720
1721 IFX_INLINE void IfxAsclin_clearTxHeaderEndFlag(Ifx_ASCLIN *asclin)
1722 {
1723 asclin->FLAGSCLEAR.B.THC = 1;
1724 }
1725
1726
1727 IFX_INLINE void IfxAsclin_clearTxResponseEndFlag(Ifx_ASCLIN *asclin)
1728 {
1729 asclin->FLAGSCLEAR.B.TRC = 1;
1730 }
1731
1732
1733 IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin)
1734 {
1735 asclin->FLAGSENABLE.U = 0x00000000;
1736 }
1737
1738
1739 IFX_INLINE void IfxAsclin_enableAutoBaudrateDetection(Ifx_ASCLIN *asclin, boolean enable)
1740 {
1741 asclin->LIN.CON.B.ABD = enable ? 1 : 0;
1742 }
1743
1744
1745 IFX_INLINE void IfxAsclin_enableBreakDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
1746 {
1747 asclin->FLAGSENABLE.B.BDE = enable ? 1 : 0;
1748 }
1749
1750
1751 IFX_INLINE void IfxAsclin_enableCollisionDetection(Ifx_ASCLIN *asclin, boolean enable)
1752 {
1753 asclin->FRAMECON.B.CEN = enable ? 1 : 0;
1754 }
1755
1756
1757 IFX_INLINE void IfxAsclin_enableCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1758 {
1759 asclin->FLAGSENABLE.B.CEE = enable ? 1 : 0;
1760 }
1761
1762
1763 IFX_INLINE void IfxAsclin_enableCts(Ifx_ASCLIN *asclin, boolean enable)
1764 {
1765 asclin->IOCR.B.CTSEN = enable ? 1 : 0;
1766 }
1767
1768
1769 IFX_INLINE void IfxAsclin_enableFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
1770 {
1771 asclin->FLAGSENABLE.B.FEDE = enable ? 1 : 0;
1772 }
1773
1774
1775 IFX_INLINE void IfxAsclin_enableFrameErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1776 {
1777 asclin->FLAGSENABLE.B.FEE = enable ? 1 : 0;
1778 }
1779
1780
1781 IFX_INLINE void IfxAsclin_enableHardwareChecksum(Ifx_ASCLIN *asclin, boolean enable)
1782 {
1783 asclin->LIN.CON.B.CSEN = enable ? 1 : 0;
1784 }
1785
1786
1787 IFX_INLINE void IfxAsclin_enableHeaderTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable)
1788 {
1789 asclin->FLAGSENABLE.B.HTE = enable ? 1 : 0;
1790 }
1791
1792
1793 IFX_INLINE void IfxAsclin_enableLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1794 {
1795 asclin->FLAGSENABLE.B.ABE = enable ? 1 : 0;
1796 }
1797
1798
1799 IFX_INLINE void IfxAsclin_enableLinChecksumErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1800 {
1801 asclin->FLAGSENABLE.B.LCE = enable ? 1 : 0;
1802 }
1803
1804
1805 IFX_INLINE void IfxAsclin_enableLinParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1806 {
1807 asclin->FLAGSENABLE.B.LPE = enable ? 1 : 0;
1808 }
1809
1810
1811 IFX_INLINE void IfxAsclin_enableLoopBackMode(Ifx_ASCLIN *asclin, boolean enable)
1812 {
1813 asclin->IOCR.B.LB = enable ? 1 : 0;
1814 }
1815
1816
1817 IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable)
1818 {
1819 asclin->FRAMECON.B.PEN = enable ? 1 : 0;
1820 }
1821
1822
1823 IFX_INLINE void IfxAsclin_enableParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1824 {
1825 asclin->FLAGSENABLE.B.PEE = enable ? 1 : 0;
1826 }
1827
1828
1829 IFX_INLINE void IfxAsclin_enableRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
1830 {
1831 asclin->FLAGSENABLE.B.REDE = enable ? 1 : 0;
1832 }
1833
1834
1835 IFX_INLINE void IfxAsclin_enableResponseTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable)
1836 {
1837 asclin->FLAGSENABLE.B.RTE = enable ? 1 : 0;
1838 }
1839
1840
1841 IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
1842 {
1843 asclin->FLAGSENABLE.B.RFLE = enable ? 1 : 0;
1844 }
1845
1846
1847 IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
1848 {
1849 asclin->RXFIFOCON.B.ENI = enable ? 1 : 0;
1850 }
1851
1852
1853 IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
1854 {
1855 asclin->FLAGSENABLE.B.RFOE = enable ? 1 : 0;
1856 }
1857
1858
1859 IFX_INLINE void IfxAsclin_enableRxFifoUnderflowFlag(Ifx_ASCLIN *asclin, boolean enable)
1860 {
1861 asclin->FLAGSENABLE.B.RFUE = enable ? 1 : 0;
1862 }
1863
1864
1865 IFX_INLINE void IfxAsclin_enableRxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable)
1866 {
1867 asclin->FLAGSENABLE.B.RHE = enable ? 1 : 0;
1868 }
1869
1870
1871 IFX_INLINE void IfxAsclin_enableRxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable)
1872 {
1873 asclin->FLAGSENABLE.B.RRE = enable ? 1 : 0;
1874 }
1875
1876
1877 IFX_INLINE void IfxAsclin_enableTransmissionCompletedFlag(Ifx_ASCLIN *asclin, boolean enable)
1878 {
1879 asclin->FLAGSENABLE.B.TCE = enable ? 1 : 0;
1880 }
1881
1882
1883 IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
1884 {
1885 asclin->FLAGSENABLE.B.TFLE = enable ? 1 : 0;
1886 }
1887
1888
1889 IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
1890 {
1891 asclin->TXFIFOCON.B.ENO = enable ? 1 : 0;
1892 }
1893
1894
1895 IFX_INLINE void IfxAsclin_enableTxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
1896 {
1897 asclin->FLAGSENABLE.B.TFOE = enable ? 1 : 0;
1898 }
1899
1900
1901 IFX_INLINE void IfxAsclin_enableTxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable)
1902 {
1903 asclin->FLAGSENABLE.B.THE = enable ? 1 : 0;
1904 }
1905
1906
1907 IFX_INLINE void IfxAsclin_enableTxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable)
1908 {
1909 asclin->FLAGSENABLE.B.TRE = enable ? 1 : 0;
1910 }
1911
1912
1913 IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
1914 {
1915 asclin->RXFIFOCON.B.FLUSH = 1;
1916 }
1917
1918
1919 IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin)
1920 {
1921 asclin->TXFIFOCON.B.FLUSH = 1;
1922 }
1923
1924
1925 IFX_INLINE boolean IfxAsclin_getBreakDetectedFlagStatus(Ifx_ASCLIN *asclin)
1926 {
1927 return asclin->FLAGS.B.BD;
1928 }
1929
1930
1931 IFX_INLINE uint8 IfxAsclin_getClockSource(Ifx_ASCLIN *asclin)
1932 {
1933 return asclin->CSR.B.CLKSEL;
1934 }
1935
1936
1937 IFX_INLINE boolean IfxAsclin_getClockStatus(Ifx_ASCLIN *asclin)
1938 {
1939 return asclin->CSR.B.CON;
1940 }
1941
1942
1943 IFX_INLINE boolean IfxAsclin_getCollisionDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
1944 {
1945 return asclin->FLAGS.B.CE;
1946 }
1947
1948
1949 IFX_INLINE boolean IfxAsclin_getFallingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin)
1950 {
1951 return asclin->FLAGS.B.FED;
1952 }
1953
1954
1955 IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin)
1956 {
1957 return asclin->FLAGS.B.FE;
1958 }
1959
1960
1961 IFX_INLINE boolean IfxAsclin_getHeaderTimeoutFlagStatus(Ifx_ASCLIN *asclin)
1962 {
1963 return asclin->FLAGS.B.HT;
1964 }
1965
1966
1967 IFX_INLINE boolean IfxAsclin_getKernelResetStatus(Ifx_ASCLIN *asclin)
1968 {
1969 return asclin->KRST0.B.RSTSTAT;
1970 }
1971
1972
1973 IFX_INLINE boolean IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
1974 {
1975 return asclin->FLAGS.B.LA;
1976 }
1977
1978
1979 IFX_INLINE boolean IfxAsclin_getLinChecksumErrorFlagStatus(Ifx_ASCLIN *asclin)
1980 {
1981 return asclin->FLAGS.B.LC;
1982 }
1983
1984
1985 IFX_INLINE boolean IfxAsclin_getLinParityErrorFlagStatus(Ifx_ASCLIN *asclin)
1986 {
1987 return asclin->FLAGS.B.LP;
1988 }
1989
1990
1991 IFX_INLINE boolean IfxAsclin_getModuleStatus(Ifx_ASCLIN *asclin)
1992 {
1993 return asclin->CLC.B.DISS;
1994 }
1995
1996
1997 IFX_INLINE boolean IfxAsclin_getParityErrorFlagStatus(Ifx_ASCLIN *asclin)
1998 {
1999 return asclin->FLAGS.B.PE;
2000 }
2001
2002
2003 IFX_INLINE uint16 IfxAsclin_getPrescaler(Ifx_ASCLIN *asclin)
2004 {
2005 return asclin->BITCON.B.PRESCALER + 1;
2006 }
2007
2008
2009 IFX_INLINE boolean IfxAsclin_getRaisingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin)
2010 {
2011 return asclin->FLAGS.B.RED;
2012 }
2013
2014
2015 IFX_INLINE boolean IfxAsclin_getReceiveSignalStatus(Ifx_ASCLIN *asclin)
2016 {
2017 return asclin->IOCR.B.RXM;
2018 }
2019
2020
2021 IFX_INLINE boolean IfxAsclin_getResponseTimeoutFlagStatus(Ifx_ASCLIN *asclin)
2022 {
2023 return asclin->FLAGS.B.RT;
2024 }
2025
2026
2027 IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel(Ifx_ASCLIN *asclin)
2028 {
2029 return asclin->RXFIFOCON.B.FILL;
2030 }
2031
2032
2033 IFX_INLINE boolean IfxAsclin_getRxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin)
2034 {
2035 return asclin->FLAGS.B.RFL;
2036 }
2037
2038
2039 IFX_INLINE uint8 IfxAsclin_getRxFifoOutletWidth(Ifx_ASCLIN *asclin)
2040 {
2041 return asclin->RXFIFOCON.B.OUTW;
2042 }
2043
2044
2045 IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
2046 {
2047 return asclin->FLAGS.B.RFO;
2048 }
2049
2050
2051 IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus(Ifx_ASCLIN *asclin)
2052 {
2053 return asclin->FLAGS.B.RFU;
2054 }
2055
2056
2057 IFX_INLINE boolean IfxAsclin_getRxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
2058 {
2059 return asclin->FLAGS.B.RH;
2060 }
2061
2062
2063 IFX_INLINE boolean IfxAsclin_getRxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
2064 {
2065 return asclin->FLAGS.B.RR;
2066 }
2067
2068
2069 IFX_INLINE boolean IfxAsclin_getTransmissionCompletedFlagStatus(Ifx_ASCLIN *asclin)
2070 {
2071 return asclin->FLAGS.B.TC;
2072 }
2073
2074
2075 IFX_INLINE boolean IfxAsclin_getTransmitSignalStatus(Ifx_ASCLIN *asclin)
2076 {
2077 return asclin->IOCR.B.TXM;
2078 }
2079
2080
2081 IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel(Ifx_ASCLIN *asclin)
2082 {
2083 return asclin->TXFIFOCON.B.FILL;
2084 }
2085
2086
2087 IFX_INLINE boolean IfxAsclin_getTxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin)
2088 {
2089 return asclin->FLAGS.B.TFL;
2090 }
2091
2092
2093 IFX_INLINE uint8 IfxAsclin_getTxFifoInletWidth(Ifx_ASCLIN *asclin)
2094 {
2095 return asclin->TXFIFOCON.B.INW;
2096 }
2097
2098
2099 IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
2100 {
2101 return asclin->FLAGS.B.TFO;
2102 }
2103
2104
2105 IFX_INLINE boolean IfxAsclin_getTxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
2106 {
2107 return asclin->FLAGS.B.TH;
2108 }
2109
2110
2111 IFX_INLINE boolean IfxAsclin_getTxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
2112 {
2113 return asclin->FLAGS.B.TR;
2114 }
2115
2116
2117 IFX_INLINE void IfxAsclin_initCtsPin(const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
2118 {
2119 if (cts->pin.port != NULL_PTR)
2120 {
2121 IfxPort_setPinModeInput(cts->pin.port, cts->pin.pinIndex, inputMode);
2122 IfxPort_setPinPadDriver(cts->pin.port, cts->pin.pinIndex, padDriver);
2123 IfxAsclin_enableCts(cts->module, TRUE);
2124 IfxAsclin_setCtsInput(cts->module, (IfxAsclin_CtsInputSelect)cts->select);
2125 }
2126 }
2127
2128
2129 IFX_INLINE void IfxAsclin_initRtsPin(const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2130 {
2131 IfxPort_setPinModeOutput(rts->pin.port, rts->pin.pinIndex, outputMode, rts->select);
2132 IfxPort_setPinPadDriver(rts->pin.port, rts->pin.pinIndex, padDriver);
2133 }
2134
2135
2136 IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
2137 {
2138 if (rx->pin.port != NULL_PTR)
2139 {
2140 IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, inputMode);
2141 IfxPort_setPinPadDriver(rx->pin.port, rx->pin.pinIndex, padDriver);
2142 IfxAsclin_setRxInput(rx->module, (IfxAsclin_RxInputSelect)rx->select);
2143 }
2144 }
2145
2146
2147 IFX_INLINE void IfxAsclin_initSclkPin(const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2148 {
2149 IfxPort_setPinModeOutput(sclk->pin.port, sclk->pin.pinIndex, outputMode, sclk->select);
2150 IfxPort_setPinPadDriver(sclk->pin.port, sclk->pin.pinIndex, padDriver);
2151 }
2152
2153
2154 IFX_INLINE void IfxAsclin_initSlsoPin(const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2155 {
2156 IfxPort_setPinModeOutput(slso->pin.port, slso->pin.pinIndex, outputMode, slso->select);
2157 IfxPort_setPinPadDriver(slso->pin.port, slso->pin.pinIndex, padDriver);
2158 }
2159
2160
2161 IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2162 {
2163 IfxPort_setPinModeOutput(tx->pin.port, tx->pin.pinIndex, outputMode, tx->select);
2164 IfxPort_setPinPadDriver(tx->pin.port, tx->pin.pinIndex, padDriver);
2165 }
2166
2167
2168 IFX_INLINE boolean IfxAsclin_isModuleSuspended(Ifx_ASCLIN *asclin)
2169 {
2170 Ifx_ASCLIN_OCS ocs;
2171
2172 // read the status
2173 ocs.U = asclin->OCS.U;
2174
2175 // return the status
2176 return ocs.B.SUSSTA;
2177 }
2178
2179
2180 IFX_INLINE uint32 IfxAsclin_readRxData(Ifx_ASCLIN *asclin)
2181 {
2182 return asclin->RXDATA.U;
2183 }
2184
2185
2186 IFX_INLINE void IfxAsclin_setBrdLowerlimt(Ifx_ASCLIN *asclin, uint8 limit)
2187 {
2188 asclin->BRD.B.LOWERLIMIT = limit;
2189 }
2190
2191
2192 IFX_INLINE void IfxAsclin_setBrdUpperlimt(Ifx_ASCLIN *asclin, uint8 limit)
2193 {
2194 asclin->BRD.B.UPPERLIMIT = limit;
2195 }
2196
2197
2198 IFX_INLINE void IfxAsclin_setChecksumInjection(Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi)
2199 {
2200 asclin->LIN.CON.B.CSI = csi;
2201 }
2202
2203
2204 IFX_INLINE void IfxAsclin_setChecksumMode(Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode)
2205 {
2206 asclin->DATCON.B.CSM = mode;
2207 }
2208
2209
2210 IFX_INLINE void IfxAsclin_setClockPolarity(Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol)
2211 {
2212 asclin->IOCR.B.CPOL = cpol;
2213 }
2214
2215
2216 IFX_INLINE void IfxAsclin_setCtsInput(Ifx_ASCLIN *asclin, IfxAsclin_CtsInputSelect ctsi)
2217 {
2218 asclin->IOCR.B.CTS = ctsi;
2219 }
2220
2221
2222 IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
2223 {
2224 asclin->DATCON.B.DATLEN = length;
2225 }
2226
2227
2228 IFX_INLINE void IfxAsclin_setDenominator(Ifx_ASCLIN *asclin, uint16 denominator)
2229 {
2230 asclin->BRG.B.DENOMINATOR = denominator;
2231 }
2232
2233
2234 IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
2235 {
2236 asclin->CLC.B.DISR = 1;
2237 }
2238
2239
2240 IFX_INLINE void IfxAsclin_setEnableModuleRequest(Ifx_ASCLIN *asclin)
2241 {
2242 asclin->CLC.B.DISR = 0;
2243 }
2244
2245
2246 IFX_INLINE void IfxAsclin_setFilterDepth(Ifx_ASCLIN *asclin, uint8 depth)
2247 {
2248 asclin->IOCR.B.DEPTH = __minu(depth, 63);
2249 }
2250
2251
2252 IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
2253 {
2254 asclin->FRAMECON.B.MODE = mode;
2255 }
2256
2257
2258 IFX_INLINE void IfxAsclin_setHeaderResponseSelect(Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type)
2259 {
2260 asclin->DATCON.B.HO = type;
2261 }
2262
2263
2264 IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
2265 {
2266 asclin->FRAMECON.B.IDLE = delay;
2267 }
2268
2269
2270 IFX_INLINE void IfxAsclin_setKernelResetOne(Ifx_ASCLIN *asclin)
2271 {
2272 asclin->KRST1.B.RST = 1;
2273 }
2274
2275
2276 IFX_INLINE void IfxAsclin_setKernelResetZero(Ifx_ASCLIN *asclin)
2277 {
2278 asclin->KRST0.B.RST = 1;
2279 }
2280
2281
2282 IFX_INLINE void IfxAsclin_setLeadDelay(Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
2283 {
2284 asclin->FRAMECON.B.LEAD = delay;
2285 }
2286
2287
2288 IFX_INLINE void IfxAsclin_setLinBreakLength(Ifx_ASCLIN *asclin, uint8 length)
2289 {
2290 asclin->LIN.BTIMER.B.BREAK = length;
2291 }
2292
2293
2294 IFX_INLINE void IfxAsclin_setLinHeaderTimeout(Ifx_ASCLIN *asclin, uint8 timeout)
2295 {
2296 asclin->LIN.HTIMER.B.HEADER = timeout;
2297 }
2298
2299
2300 IFX_INLINE void IfxAsclin_setLinMode(Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode)
2301 {
2302 asclin->LIN.CON.B.MS = mode;
2303 }
2304
2305
2306 IFX_INLINE void IfxAsclin_setLinResponseTimeoutMode(Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode)
2307 {
2308 asclin->DATCON.B.RM = mode;
2309 }
2310
2311
2312 IFX_INLINE void IfxAsclin_setLinResponseTimeoutThreshold(Ifx_ASCLIN *asclin, uint16 threshold)
2313 {
2314 asclin->DATCON.B.RESPONSE = __minu(threshold, 256);
2315 }
2316
2317
2318 IFX_INLINE void IfxAsclin_setNumerator(Ifx_ASCLIN *asclin, uint16 numerator)
2319 {
2320 asclin->BRG.B.NUMERATOR = numerator;
2321 }
2322
2323
2324 IFX_INLINE void IfxAsclin_setOversampling(Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor)
2325 {
2326 asclin->BITCON.B.OVERSAMPLING = ovsFactor;
2327 }
2328
2329
2330 IFX_INLINE void IfxAsclin_setParityType(Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
2331 {
2332 asclin->FRAMECON.B.ODD = type;
2333 }
2334
2335
2336 IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
2337 {
2338 asclin->BITCON.B.PRESCALER = prescaler - 1;
2339 }
2340
2341
2342 IFX_INLINE void IfxAsclin_setRtsCtsPolarity(Ifx_ASCLIN *asclin, IfxAsclin_RtsCtsPolarity rcpol)
2343 {
2344 asclin->IOCR.B.RCPOL = rcpol;
2345 }
2346
2347
2348 IFX_INLINE void IfxAsclin_setRxBufferMode(Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
2349 {
2350 asclin->RXFIFOCON.B.BUF = mode;
2351 }
2352
2353
2354 IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
2355 {
2356 asclin->RXFIFOCON.B.INTLEVEL = __minu(level, 15);
2357 }
2358
2359
2360 IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
2361 {
2362 asclin->RXFIFOCON.B.OUTW = width;
2363 }
2364
2365
2366 IFX_INLINE void IfxAsclin_setRxInput(Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
2367 {
2368 asclin->IOCR.B.ALTI = alti;
2369 }
2370
2371
2372 IFX_INLINE void IfxAsclin_setSampleMode(Ifx_ASCLIN *asclin, IfxAsclin_SamplesPerBit medianFilter)
2373 {
2374 asclin->BITCON.B.SM = medianFilter;
2375 }
2376
2377
2378 IFX_INLINE void IfxAsclin_setSamplePointPosition(Ifx_ASCLIN *asclin, IfxAsclin_SamplePointPosition spPosition)
2379 {
2380 asclin->BITCON.B.SAMPLEPOINT = __minu(spPosition, asclin->BITCON.B.OVERSAMPLING);
2381 }
2382
2383
2384 IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
2385 {
2386 asclin->FRAMECON.B.MSB = dir;
2387 }
2388
2389
2390 IFX_INLINE void IfxAsclin_setSlavePolarity(Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol)
2391 {
2392 asclin->IOCR.B.SPOL = spol;
2393 }
2394
2395
2396 IFX_INLINE void IfxAsclin_setSleepMode(Ifx_ASCLIN *asclin, IfxAsclin_SleepMode mode)
2397 {
2398 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2399 IfxScuWdt_clearCpuEndinit(passwd);
2400 asclin->CLC.B.EDIS = mode;
2401 IfxScuWdt_setCpuEndinit(passwd);
2402 }
2403
2404
2405 IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
2406 {
2407 asclin->FRAMECON.B.STOP = stopBit;
2408 }
2409
2410
2411 IFX_INLINE void IfxAsclin_setSuspendMode(Ifx_ASCLIN *asclin, IfxAsclin_SuspendMode mode)
2412 {
2413 Ifx_ASCLIN_OCS ocs;
2414
2415 // remove protection and configure the suspend mode.
2416 ocs.B.SUS_P = 1;
2417 ocs.B.SUS = mode;
2418 asclin->OCS.U = ocs.U;
2419 }
2420
2421
2422 IFX_INLINE void IfxAsclin_setTransmitHeaderRequestFlag(Ifx_ASCLIN *asclin)
2423 {
2424 asclin->FLAGSSET.B.THRQS = 1;
2425 }
2426
2427
2428 IFX_INLINE void IfxAsclin_setTransmitResponseRequestFlag(Ifx_ASCLIN *asclin)
2429 {
2430 asclin->FLAGSSET.B.TRRQS = 1;
2431 }
2432
2433
2434 IFX_INLINE void IfxAsclin_setTransmitWakeRequestFlag(Ifx_ASCLIN *asclin)
2435 {
2436 asclin->FLAGSSET.B.TWRQS = 1;
2437 }
2438
2439
2440 IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
2441 {
2442 asclin->TXFIFOCON.B.INW = width;
2443 }
2444
2445
2446 IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
2447 {
2448 asclin->TXFIFOCON.B.INTLEVEL = __minu(level, 15);
2449 }
2450
2451
2452 IFX_INLINE void IfxAsclin_writeTxData(Ifx_ASCLIN *asclin, uint32 data)
2453 {
2454 asclin->TXDATA.U = data;
2455 }
2456
2457
2458 IFX_INLINE uint16 IfxAsclin_getAllErrorFlagsStatus(Ifx_ASCLIN *asclin)
2459 {
2460 return (uint16)(asclin->FLAGS.U >> 16);
2461 }
2462
2463
2464 #endif /* IFXASCLIN_H */
IfxAsclin_SamplePointPosition_13
sample point position at 13
Definition: IfxAsclin.h:337
IfxAsclin_getAddress
IFX_EXTERN Ifx_ASCLIN * IfxAsclin_getAddress(IfxAsclin_Index asclin)
API to get the address for ASCLIN HW module register memory map.
Definition: IfxAsclin.c:79
IfxAsclin_TxFifoInterruptLevel_15
TX FIFO level 15.
Definition: IfxAsclin.h:443
IfxAsclin_OversamplingFactor_5
oversampling factor 5
Definition: IfxAsclin.h:230
IfxAsclin_Cts_In
CTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:56
IfxAsclin_RxFifoInterruptLevel_7
RX FIFO level 7.
Definition: IfxAsclin.h:282
IfxAsclin_enableFallingEdgeDetectedFlag
IFX_INLINE void IfxAsclin_enableFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables falling edge detected flag.
Definition: IfxAsclin.h:1769
IfxAsclin_SuspendMode_hard
Hard Suspend.
Definition: IfxAsclin.h:408
IfxAsclin_write32
IFX_EXTERN uint32 IfxAsclin_write32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Writes data up to 32 bits.
Definition: IfxAsclin.c:390
IfxAsclin_SamplePointPosition_12
sample point position at 12
Definition: IfxAsclin.h:336
IfxAsclin_setLinResponseTimeoutMode
IFX_INLINE void IfxAsclin_setLinResponseTimeoutMode(Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode)
Sets the LIN response timeout mode.
Definition: IfxAsclin.h:2306
IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN auto baudrate detection error flag status.
Definition: IfxAsclin.h:1973
IfxAsclin_setNumerator
IFX_INLINE void IfxAsclin_setNumerator(Ifx_ASCLIN *asclin, uint16 numerator)
Sets the numerator of the fractional divider.
Definition: IfxAsclin.h:2318
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin_IdleDelay_3
idle delay in 3 bit times
Definition: IfxAsclin.h:183
IfxAsclin_ClockPolarity_idleLow
idle low
Definition: IfxAsclin.h:102
IfxAsclin_IdleDelay_0
idle delay in 0 bit times
Definition: IfxAsclin.h:180
IfxAsclin_RtsCtsPolarity_activeHigh
ready/clear are active-high
Definition: IfxAsclin.h:267
IfxAsclin_getIndex
IFX_EXTERN IfxAsclin_Index IfxAsclin_getIndex(Ifx_ASCLIN *asclin)
API to get the resource index of the ASCLIN specified.
Definition: IfxAsclin.c:130
IfxAsclin_ReceiveBufferMode
IfxAsclin_ReceiveBufferMode
Receive buffer mode Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF.
Definition: IfxAsclin.h:256
IfxAsclin_RxFifoInterruptLevel_8
RX FIFO level 8.
Definition: IfxAsclin.h:283
IfxAsclin_getResponseTimeoutFlagStatus
IFX_INLINE boolean IfxAsclin_getResponseTimeoutFlagStatus(Ifx_ASCLIN *asclin)
Returns the response timeout flag status.
Definition: IfxAsclin.h:2021
IfxAsclin_getModuleStatus
IFX_INLINE boolean IfxAsclin_getModuleStatus(Ifx_ASCLIN *asclin)
Returns the module status.
Definition: IfxAsclin.h:1991
IfxAsclin_initCtsPin
IFX_INLINE void IfxAsclin_initCtsPin(const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a CTS input.
Definition: IfxAsclin.h:2117
IfxAsclin_DataLength_6
number of bits per transfer 5
Definition: IfxAsclin.h:140
IfxAsclin_getCollisionDetectionErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getCollisionDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the collision detection error flag status.
Definition: IfxAsclin.h:1943
IfxAsclin_clearKernelResetStatus
IFX_INLINE void IfxAsclin_clearKernelResetStatus(Ifx_ASCLIN *asclin)
Clears the kernel reset status.
Definition: IfxAsclin.h:1631
IfxAsclin_SamplePointPosition_1
sample point position at 1
Definition: IfxAsclin.h:325
IfxAsclin_OversamplingFactor_16
oversampling factor 16
Definition: IfxAsclin.h:241
IfxAsclin_getShiftFrequency
IFX_EXTERN float32 IfxAsclin_getShiftFrequency(Ifx_ASCLIN *asclin)
Returns the SHIFT frequency.
Definition: IfxAsclin.c:162
IfxAsclin_TxFifoInterruptLevel_6
TX FIFO level 6.
Definition: IfxAsclin.h:434
IfxAsclin_setIdleDelay
IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay.
Definition: IfxAsclin.h:2264
IfxAsclin_ReceiveBufferMode_rxFifo
RxFIFO mode.
Definition: IfxAsclin.h:258
IfxAsclin_resetModule
IFX_EXTERN void IfxAsclin_resetModule(Ifx_ASCLIN *asclin)
resets Asclin kernel
Definition: IfxAsclin.c:228
IfxAsclin_initSlsoPin
IFX_INLINE void IfxAsclin_initSlsoPin(const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output.
Definition: IfxAsclin.h:2154
IfxAsclin_setSleepMode
IFX_INLINE void IfxAsclin_setSleepMode(Ifx_ASCLIN *asclin, IfxAsclin_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxAsclin.h:2396
IfxAsclin_getTxFifoFillLevelFlagStatus
IFX_INLINE boolean IfxAsclin_getTxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin)
Returns the Tx FIFO level flag status.
Definition: IfxAsclin.h:2087
IfxAsclin_ShiftDirection_lsbFirst
LSB first.
Definition: IfxAsclin.h:357
IfxAsclin_TxFifoInterruptLevel_0
TX FIFO level 0.
Definition: IfxAsclin.h:428
IfxAsclin_read32
IFX_EXTERN uint32 IfxAsclin_read32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Reads data up to 32 bits.
Definition: IfxAsclin.c:200
IfxAsclin_Status_configurationError
Configuration error.
Definition: IfxAsclin.h:384
IfxAsclin_StopBit_6
number of stop bits 6
Definition: IfxAsclin.h:399
IfxAsclin_getSrcPointerEr
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR.
Definition: IfxAsclin.c:168
IfxAsclin_ClockPolarity_idleHigh
idle high
Definition: IfxAsclin.h:103
IfxAsclin_CtsInputSelect_3
CTS input pin 3.
Definition: IfxAsclin.h:127
IfxAsclin_RxFifoInterruptLevel_11
RX FIFO level 11.
Definition: IfxAsclin.h:286
IfxAsclin_Sclk_Out
SCLK pin mapping structure.
Definition: IfxAsclin_PinMap.h:80
IfxAsclin_getRxFifoUnderflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO underflow flag status.
Definition: IfxAsclin.h:2051
IfxAsclin_ShiftDirection_msbFirst
MSB first.
Definition: IfxAsclin.h:358
IfxAsclin_DataLength_2
number of bits per transfer 1
Definition: IfxAsclin.h:136
IfxAsclin_enableCollisionDetectionErrorFlag
IFX_INLINE void IfxAsclin_enableCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN collision detection error flag.
Definition: IfxAsclin.h:1757
IfxAsclin_TxFifoInterruptLevel_9
TX FIFO level 9.
Definition: IfxAsclin.h:437
IfxAsclin_clearTxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_clearTxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO level flag.
Definition: IfxAsclin.h:1709
IfxAsclin_SamplePointPosition_14
sample point position at 14
Definition: IfxAsclin.h:338
IfxAsclin_getTxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status.
Definition: IfxAsclin.h:2099
IfxAsclin_SamplesPerBit
IfxAsclin_SamplesPerBit
Number of samples per bit, sample mode/medianfilter Definition in Ifx_ASCLIN.BITCON.B.SM.
Definition: IfxAsclin.h:345
IfxAsclin_TxFifoInterruptLevel_7
TX FIFO level 7.
Definition: IfxAsclin.h:435
IfxAsclin_getOvsFrequency
IFX_EXTERN float32 IfxAsclin_getOvsFrequency(Ifx_ASCLIN *asclin)
Returns the OVS frequency.
Definition: IfxAsclin.c:150
IfxAsclin_TxFifoInterruptLevel_1
TX FIFO level 1.
Definition: IfxAsclin.h:429
IfxAsclin_ClockSource_ascFastClock
f asclinf wiil be supplied
Definition: IfxAsclin.h:115
IfxAsclin_enableModule
IFX_EXTERN void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
Enables the module.
Definition: IfxAsclin.c:70
IfxAsclin_getFaFrequency
IFX_EXTERN float32 IfxAsclin_getFaFrequency(Ifx_ASCLIN *asclin)
Returns the ASCLIN module FA frequency in Hz.
Definition: IfxAsclin.c:96
IfxAsclin_TxFifoInterruptLevel_5
TX FIFO level 5.
Definition: IfxAsclin.h:433
IfxAsclin_getFallingEdgeDetectedFlagStatus
IFX_INLINE boolean IfxAsclin_getFallingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin)
Returns the falling edge detected flag status.
Definition: IfxAsclin.h:1949
IfxAsclin_setLinHeaderTimeout
IFX_INLINE void IfxAsclin_setLinHeaderTimeout(Ifx_ASCLIN *asclin, uint8 timeout)
Sets the LIN header timeout.
Definition: IfxAsclin.h:2294
IfxAsclin_SamplePointPosition_5
sample point position at 5
Definition: IfxAsclin.h:329
IfxAsclin_RxFifoOutletWidth
IfxAsclin_RxFifoOutletWidth
Defines the number of bytes read from the Rx FIFO with one FPI bus read Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:297
IfxAsclin_LeadDelay_3
lead delay in 3 bit times
Definition: IfxAsclin.h:199
IfxAsclin_SamplePointPosition_4
sample point position at 4
Definition: IfxAsclin.h:328
IfxAsclin_SamplePointPosition_15
sample point position at 15
Definition: IfxAsclin.h:339
IfxAsclin_getLinParityErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinParityErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN parity error flag status.
Definition: IfxAsclin.h:1985
IfxAsclin_flushTxFifo
IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO.
Definition: IfxAsclin.h:1919
IfxAsclin_CtsInputSelect_2
CTS input pin 2.
Definition: IfxAsclin.h:126
IfxAsclin_RxFifoOutletWidth_0
number of bytes 0
Definition: IfxAsclin.h:299
IfxAsclin_clearTxResponseEndFlag
IFX_INLINE void IfxAsclin_clearTxResponseEndFlag(Ifx_ASCLIN *asclin)
Clears the transmit response end flag.
Definition: IfxAsclin.h:1727
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxAsclin_Index
IfxAsclin_Index
List of the available Asclin resources.
Definition: IfxAsclin_cfg.h:77
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxAsclin_RxFifoInterruptLevel_1
RX FIFO level 1.
Definition: IfxAsclin.h:276
IfxAsclin_OversamplingFactor_13
oversampling factor 13
Definition: IfxAsclin.h:238
IfxAsclin_IdleDelay_4
idle delay in 4 bit times
Definition: IfxAsclin.h:184
IfxAsclin_enableRxResponseEndFlag
IFX_INLINE void IfxAsclin_enableRxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive response end flag.
Definition: IfxAsclin.h:1871
float32
float float32
Definition: Platform_Types.h:170
IfxAsclin_Cts_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxAsclin_PinMap.h:59
IfxAsclin_Slso_Out
SLSO pin mapping structure.
Definition: IfxAsclin_PinMap.h:88
IfxAsclin_initRxPin
IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxAsclin.h:2136
IfxAsclin_setDenominator
IFX_INLINE void IfxAsclin_setDenominator(Ifx_ASCLIN *asclin, uint16 denominator)
Sets the denominator of the fractional divider.
Definition: IfxAsclin.h:2228
IfxAsclin_RxFifoInterruptLevel_5
RX FIFO level 5.
Definition: IfxAsclin.h:280
IfxAsclin_OversamplingFactor_7
oversampling factor 7
Definition: IfxAsclin.h:232
IfxAsclin_StopBit_3
number of stop bits 3
Definition: IfxAsclin.h:396
IfxAsclin_setBrdUpperlimt
IFX_INLINE void IfxAsclin_setBrdUpperlimt(Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection&#39;s upper limit.
Definition: IfxAsclin.h:2192
IfxAsclin_SuspendMode_none
No suspend.
Definition: IfxAsclin.h:407
IfxAsclin_Rts_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxAsclin_PinMap.h:76
IfxAsclin_getRxFifoOutletWidth
IFX_INLINE uint8 IfxAsclin_getRxFifoOutletWidth(Ifx_ASCLIN *asclin)
Returns the receive FIFO inlet width.
Definition: IfxAsclin.h:2039
IfxAsclin_getTxFifoInletWidth
IFX_INLINE uint8 IfxAsclin_getTxFifoInletWidth(Ifx_ASCLIN *asclin)
Returns the transmit FIFO inlet width.
Definition: IfxAsclin.h:2093
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxAsclin_StopBit
IfxAsclin_StopBit
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay. Definition in Ifx_ASCLIN.FRAMECON.B.STOP.
Definition: IfxAsclin.h:391
IfxAsclin_DataLength_12
number of bits per transfer 11
Definition: IfxAsclin.h:146
IfxAsclin_clearAllFlags
IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
clears all the flags
Definition: IfxAsclin.h:1595
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxAsclin_DataLength_4
number of bits per transfer 3
Definition: IfxAsclin.h:138
IfxAsclin_RxInputSelect
IfxAsclin_RxInputSelect
Alternate input selection for Rx signal. Definition in Ifx_ASCLIN.IOCR.B.ALTI.
Definition: IfxAsclin.h:308
IfxAsclin_Checksum
IfxAsclin_Checksum
Defines if the classic or the enhanced checksum will be calculated by the checksum block...
Definition: IfxAsclin.h:81
IfxAsclin_RxFifoInterruptLevel_13
RX FIFO level 13.
Definition: IfxAsclin.h:288
IfxAsclin_RxFifoInterruptLevel_16
RX FIFO level 16.
Definition: IfxAsclin.h:291
IfxSrc.h
SRC basic functionality.
IfxAsclin_LinMode
IfxAsclin_LinMode
Configures if the module in LIN mode operates as master or slave Definition in Ifx_ASCLIN.LIN.CON.B.MS.
Definition: IfxAsclin.h:209
IfxAsclin_DataLength_16
number of bits per transfer 15
Definition: IfxAsclin.h:150
IfxAsclin_TxFifoInterruptLevel_8
TX FIFO level 8.
Definition: IfxAsclin.h:436
IfxAsclin_LinResponseTimeoutMode
IfxAsclin_LinResponseTimeoutMode
Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout...
Definition: IfxAsclin.h:218
IfxCpu_Intrinsics.h
IfxAsclin_ChecksumInjection_written
checksum byte is written
Definition: IfxAsclin.h:93
IfxAsclin_getReceiveSignalStatus
IFX_INLINE boolean IfxAsclin_getReceiveSignalStatus(Ifx_ASCLIN *asclin)
Returns the received signal status.
Definition: IfxAsclin.h:2015
IfxAsclin_clearLinAutoBaudDetectionErrorFlag
IFX_INLINE void IfxAsclin_clearLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin)
Clears the auto baudrate detection error flag.
Definition: IfxAsclin.h:1637
IfxAsclin_OversamplingFactor_11
oversampling factor 11
Definition: IfxAsclin.h:236
IfxAsclin_LeadDelay_2
lead delay in 2 bit times
Definition: IfxAsclin.h:198
IfxAsclin_clearRxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_clearRxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO level flag.
Definition: IfxAsclin.h:1673
IfxAsclin_HeaderResponseSelect
IfxAsclin_HeaderResponseSelect
Defines if LIN frame shall consist of a header and response or of a header only. Definition in Ifx_AS...
Definition: IfxAsclin.h:167
IfxAsclin_DataLength_1
number of bits per transfer 0
Definition: IfxAsclin.h:135
IfxAsclin_setLinBreakLength
IFX_INLINE void IfxAsclin_setLinBreakLength(Ifx_ASCLIN *asclin, uint8 length)
Sets the LIN break length.
Definition: IfxAsclin.h:2288
IfxAsclin_PinMap.h
ASCLIN I/O map.
IfxAsclin_OversamplingFactor_15
oversampling factor 15
Definition: IfxAsclin.h:240
IfxAsclin_RxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel
Defines the filling level that triggers a drain (RX) interrupt or DMA access Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:274
IfxAsclin_LinResponseTimeoutMode_frameTimeout
timeout threshold is for frame
Definition: IfxAsclin.h:220
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxAsclin_enableCollisionDetection
IFX_INLINE void IfxAsclin_enableCollisionDetection(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the collision detection.
Definition: IfxAsclin.h:1751
IfxAsclin_clearRxFifoUnderflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO underflow flag.
Definition: IfxAsclin.h:1685
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
IfxAsclin_RxFifoInterruptLevel_14
RX FIFO level 14.
Definition: IfxAsclin.h:289
IfxAsclin_TxFifoInletWidth_3
number of bytes 3
Definition: IfxAsclin.h:420
IfxAsclin_setParityType
IFX_INLINE void IfxAsclin_setParityType(Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
Sets the parity type.
Definition: IfxAsclin.h:2330
IfxAsclin_enableRxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO level flag.
Definition: IfxAsclin.h:1841
IfxAsclin_setBitTiming
IFX_EXTERN boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing.
Definition: IfxAsclin.c:259
IfxAsclin_setTransmitHeaderRequestFlag
IFX_INLINE void IfxAsclin_setTransmitHeaderRequestFlag(Ifx_ASCLIN *asclin)
Sets the transmit header request flag.
Definition: IfxAsclin.h:2422
IfxAsclin_DataLength_11
number of bits per transfer 10
Definition: IfxAsclin.h:145
IfxAsclin_setRxFifoOutletWidth
IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width.
Definition: IfxAsclin.h:2360
IfxAsclin_setKernelResetZero
IFX_INLINE void IfxAsclin_setKernelResetZero(Ifx_ASCLIN *asclin)
Sets the kernel reset of the KRST0.
Definition: IfxAsclin.h:2276
IfxAsclin_ChecksumInjection_notWritten
checksum byte is not written
Definition: IfxAsclin.h:92
IfxAsclin_TxFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel
Defines the filling level that triggers a refill (TX) interrupt or DMA access Definition in Ifx_ASCLI...
Definition: IfxAsclin.h:426
IfxAsclin_IdleDelay_2
idle delay in 2 bit times
Definition: IfxAsclin.h:182
IfxAsclin_ClockSource_oscillatorClock
XTAL oscillator clock foso0 will be supplied.
Definition: IfxAsclin.h:113
IfxAsclin_RxFifoInterruptLevel_9
RX FIFO level 9.
Definition: IfxAsclin.h:284
IfxAsclin_SamplePointPosition_10
sample point position at 10
Definition: IfxAsclin.h:334
IfxAsclin_enableParityErrorFlag
IFX_INLINE void IfxAsclin_enableParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables parity error flag.
Definition: IfxAsclin.h:1823
IfxAsclin_ParityType_odd
odd parity
Definition: IfxAsclin.h:250
IfxScuWdt.h
SCU basic functionality.
IfxAsclin_Cts_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxAsclin_PinMap.h:60
IfxAsclin_DataLength_9
number of bits per transfer 8
Definition: IfxAsclin.h:143
IfxAsclin_getTxHeaderEndFlagStatus
IFX_INLINE boolean IfxAsclin_getTxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmit header end flag status.
Definition: IfxAsclin.h:2105
IfxAsclin_CtsInputSelect_1
CTS input pin 1.
Definition: IfxAsclin.h:125
IfxAsclin_DataLength_10
number of bits per transfer 9
Definition: IfxAsclin.h:144
IfxAsclin_enableTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_enableTxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO overflow flag.
Definition: IfxAsclin.h:1895
IfxAsclin_getSrcPointerTx
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx.
Definition: IfxAsclin.c:180
IfxAsclin_SlavePolarity_idlehigh
idle high
Definition: IfxAsclin.h:368
IfxAsclin_setClockPolarity
IFX_INLINE void IfxAsclin_setClockPolarity(Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol)
Selects the clock polarity.
Definition: IfxAsclin.h:2210
IfxAsclin_enableRaisingEdgeDetectedFlag
IFX_INLINE void IfxAsclin_enableRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables raising edge detected flag.
Definition: IfxAsclin.h:1829
IfxAsclin_clearParityErrorFlag
IFX_INLINE void IfxAsclin_clearParityErrorFlag(Ifx_ASCLIN *asclin)
Clears the parity error flag.
Definition: IfxAsclin.h:1655
IfxAsclin_enableCts
IFX_INLINE void IfxAsclin_enableCts(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables CTS.
Definition: IfxAsclin.h:1763
IfxAsclin_OversamplingFactor
IfxAsclin_OversamplingFactor
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed Defini...
Definition: IfxAsclin.h:227
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxAsclin_enableHardwareChecksum
IFX_INLINE void IfxAsclin_enableHardwareChecksum(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the hardware checksum.
Definition: IfxAsclin.h:1781
IfxAsclin_getRxResponseEndFlagStatus
IFX_INLINE boolean IfxAsclin_getRxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the receive response end flag status.
Definition: IfxAsclin.h:2063
IfxAsclin_setChecksumInjection
IFX_INLINE void IfxAsclin_setChecksumInjection(Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi)
Sets the checksum injection.
Definition: IfxAsclin.h:2198
IfxAsclin_ReceiveBufferMode_rxBuffer
single stage Rx buffer
Definition: IfxAsclin.h:259
IfxAsclin_SuspendMode
IfxAsclin_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxAsclin.h:405
IfxAsclin_setRxBufferMode
IFX_INLINE void IfxAsclin_setRxBufferMode(Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
Sets the receive buffer mode.
Definition: IfxAsclin.h:2348
IfxAsclin_Status_noError
No error.
Definition: IfxAsclin.h:385
IfxAsclin_DataLength_5
number of bits per transfer 4
Definition: IfxAsclin.h:139
IfxAsclin_SamplePointPosition_9
sample point position at 9
Definition: IfxAsclin.h:333
IfxAsclin_RxFifoOutletWidth_1
number of bytes 1
Definition: IfxAsclin.h:300
IfxAsclin_RxFifoOutletWidth_3
number of bytes 3
Definition: IfxAsclin.h:302
IfxAsclin_HeaderResponseSelect_headerAndResponse
header and response expected
Definition: IfxAsclin.h:169
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxAsclin_OversamplingFactor_9
oversampling factor 9
Definition: IfxAsclin.h:234
IfxAsclin_getRxFifoFillLevelFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO level flag status.
Definition: IfxAsclin.h:2033
IfxAsclin_LeadDelay
IfxAsclin_LeadDelay
Defines the leading delay in bit times in SPI mode. ASC mode: not applicable. LIN mode: delay between...
Definition: IfxAsclin.h:194
IfxAsclin_enableFrameErrorFlag
IFX_INLINE void IfxAsclin_enableFrameErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables frame error flag.
Definition: IfxAsclin.h:1775
IfxAsclin_FrameMode
IfxAsclin_FrameMode
Defines the basic operating mode of the module. Changing the mode must be done by switching first to ...
Definition: IfxAsclin.h:156
IfxAsclin_clearRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag.
Definition: IfxAsclin.h:1679
IfxAsclin_IdleDelay
IfxAsclin_IdleDelay
Defines the duration of the IDLE delay in bit times. SPI mode: this is the idle time between the fram...
Definition: IfxAsclin.h:178
IfxAsclin_DataLength_3
number of bits per transfer 2
Definition: IfxAsclin.h:137
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxAsclin_setRxInput
IFX_INLINE void IfxAsclin_setRxInput(Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
Selects the alternate input for Rx signal.
Definition: IfxAsclin.h:2366
IfxAsclin_TxFifoInterruptLevel_14
TX FIFO level 14.
Definition: IfxAsclin.h:442
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin_setRxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2354
IfxAsclin_setRtsCtsPolarity
IFX_INLINE void IfxAsclin_setRtsCtsPolarity(Ifx_ASCLIN *asclin, IfxAsclin_RtsCtsPolarity rcpol)
Selects the RTS/CTS polarity.
Definition: IfxAsclin.h:2342
IfxAsclin_clearRxHeaderEndFlag
IFX_INLINE void IfxAsclin_clearRxHeaderEndFlag(Ifx_ASCLIN *asclin)
Clears the receive header end flag.
Definition: IfxAsclin.h:1691
IfxAsclin_setChecksumMode
IFX_INLINE void IfxAsclin_setChecksumMode(Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode)
Sets the checksum mode.
Definition: IfxAsclin.h:2204
IfxAsclin_ClockSource
IfxAsclin_ClockSource
Selection of clock source Definition in Ifx_ASCLIN.CSR.B.CLKSEL.
Definition: IfxAsclin.h:109
IfxAsclin_DataLength
IfxAsclin_DataLength
Number of bits per transfer Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.
Definition: IfxAsclin.h:133
IfxAsclin_SamplePointPosition_2
sample point position at 2
Definition: IfxAsclin.h:326
IfxAsclin_clearFrameErrorFlag
IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin)
Clears the frame error flag.
Definition: IfxAsclin.h:1619
IfxAsclin_LeadDelay_0
lead delay in 0 bit times
Definition: IfxAsclin.h:196
IfxAsclin_setSampleMode
IFX_INLINE void IfxAsclin_setSampleMode(Ifx_ASCLIN *asclin, IfxAsclin_SamplesPerBit medianFilter)
Sets the sample mode (number of samples per bit / median filter)
Definition: IfxAsclin.h:2372
IfxAsclin_enableHeaderTimeoutFlag
IFX_INLINE void IfxAsclin_enableHeaderTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables header timeout flag.
Definition: IfxAsclin.h:1787
IfxAsclin_ChecksumInjection
IfxAsclin_ChecksumInjection
Defines if the received checksum byte is written into the RXFifo or not. Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:90
IfxAsclin_getKernelResetStatus
IFX_INLINE boolean IfxAsclin_getKernelResetStatus(Ifx_ASCLIN *asclin)
Returns the kernel reset status.
Definition: IfxAsclin.h:1967
IfxAsclin_Rts_Out
RTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:72
IfxAsclin_enableAscErrorFlags
IFX_EXTERN void IfxAsclin_enableAscErrorFlags(Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
Enables the ASC error interrupt Flags.
Definition: IfxAsclin.c:63
IfxAsclin_setLeadDelay
IFX_INLINE void IfxAsclin_setLeadDelay(Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
Sets the lead delay.
Definition: IfxAsclin.h:2282
IfxAsclin_setLinResponseTimeoutThreshold
IFX_INLINE void IfxAsclin_setLinResponseTimeoutThreshold(Ifx_ASCLIN *asclin, uint16 threshold)
Sets the LIN response timeout threshold.
Definition: IfxAsclin.h:2312
IfxAsclin_setPrescaler
IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:2336
IfxAsclin_RxInputSelect_2
alternate input selection 2
Definition: IfxAsclin.h:312
IfxAsclin_IdleDelay_5
idle delay in 5 bit times
Definition: IfxAsclin.h:185
IfxAsclin_getLinChecksumErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinChecksumErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN checksum error flag status.
Definition: IfxAsclin.h:1979
IfxAsclin_OversamplingFactor_10
oversampling factor 10
Definition: IfxAsclin.h:235
IfxAsclin_LeadDelay_6
lead delay in 6 bit times
Definition: IfxAsclin.h:202
IfxAsclin_ClockSource_flexRayClock
f eray will be supplied
Definition: IfxAsclin.h:114
IfxAsclin_setTransmitWakeRequestFlag
IFX_INLINE void IfxAsclin_setTransmitWakeRequestFlag(Ifx_ASCLIN *asclin)
Sets the transmission wake request flag.
Definition: IfxAsclin.h:2434
IfxAsclin_TxFifoInletWidth_2
number of bytes 2
Definition: IfxAsclin.h:419
IfxAsclin_SlavePolarity
IfxAsclin_SlavePolarity
Defines the idle level of the SLSO signal, which is the level. Outside the data transmission, leading and trailing time intervals. Definition in Ifx_ASCLIN.IOCR.B.SPOL.
Definition: IfxAsclin.h:365
IfxAsclin_setHeaderResponseSelect
IFX_INLINE void IfxAsclin_setHeaderResponseSelect(Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type)
Sets the header response selection.
Definition: IfxAsclin.h:2258
IfxAsclin_StopBit_0
number of stop bits 0
Definition: IfxAsclin.h:393
IfxAsclin_getTxResponseEndFlagStatus
IFX_INLINE boolean IfxAsclin_getTxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmit response end flag status.
Definition: IfxAsclin.h:2111
IfxAsclin_clearHeaderTimeoutFlag
IFX_INLINE void IfxAsclin_clearHeaderTimeoutFlag(Ifx_ASCLIN *asclin)
Clears the header timeout flag.
Definition: IfxAsclin.h:1625
IfxAsclin_HeaderResponseSelect_headerOnly
header only expected
Definition: IfxAsclin.h:170
IfxAsclin_ParityType_even
even parity
Definition: IfxAsclin.h:249
IfxAsclin_Cts_In::module
Ifx_ASCLIN * module
Base address.
Definition: IfxAsclin_PinMap.h:58
IfxAsclin_enableRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO overflow flag.
Definition: IfxAsclin.h:1853
IfxAsclin_StopBit_5
number of stop bits 5
Definition: IfxAsclin.h:398
IfxAsclin_getTxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2081
IfxAsclin_SamplePointPosition
IfxAsclin_SamplePointPosition
Sample point position Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.
Definition: IfxAsclin.h:323
IfxAsclin_enableAutoBaudrateDetection
IFX_INLINE void IfxAsclin_enableAutoBaudrateDetection(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the auto baudrate detection.
Definition: IfxAsclin.h:1739
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxAsclin_enableLinParityErrorFlag
IFX_INLINE void IfxAsclin_enableLinParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN parity error flag.
Definition: IfxAsclin.h:1805
IfxAsclin_setBaudrateBitFields
IFX_EXTERN void IfxAsclin_setBaudrateBitFields(Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
Sets the baudrate bit fields.
Definition: IfxAsclin.c:247
IfxAsclin_SamplesPerBit_three
three samples per bit
Definition: IfxAsclin.h:348
IfxAsclin_ClockPolarity
IfxAsclin_ClockPolarity
CPOL defines the idle level of the clock signal in the SPI mode. Idle level is the level outside the ...
Definition: IfxAsclin.h:100
IfxAsclin_RxFifoInterruptLevel_6
RX FIFO level 6.
Definition: IfxAsclin.h:281
IfxAsclin_RxFifoInterruptLevel_15
RX FIFO level 15.
Definition: IfxAsclin.h:290
IfxAsclin_setLinMode
IFX_INLINE void IfxAsclin_setLinMode(Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode)
Sets the LIN mode of operation.
Definition: IfxAsclin.h:2300
IfxAsclin_DataLength_14
number of bits per transfer 13
Definition: IfxAsclin.h:148
IfxAsclin_getSrcPointerRx
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx.
Definition: IfxAsclin.c:174
IfxAsclin_flushRxFifo
IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO.
Definition: IfxAsclin.h:1913
IfxAsclin_SlavePolarity_idleLow
idle low
Definition: IfxAsclin.h:367
IfxAsclin_IdleDelay_1
idle delay in 1 bit times
Definition: IfxAsclin.h:181
IfxAsclin_enableLinAutoBaudDetectionErrorFlag
IFX_INLINE void IfxAsclin_enableLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN auto baudrate detection error flag.
Definition: IfxAsclin.h:1793
IfxAsclin_TxFifoInterruptLevel_2
TX FIFO level 2.
Definition: IfxAsclin.h:430
IfxAsclin_FrameMode_lin
lin mode
Definition: IfxAsclin.h:161
IfxAsclin_LinResponseTimeoutMode_responseTimeout
timeout threshold is for reponse
Definition: IfxAsclin.h:221
IfxAsclin_enableTransmissionCompletedFlag
IFX_INLINE void IfxAsclin_enableTransmissionCompletedFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmission completed flag.
Definition: IfxAsclin.h:1877
IfxAsclin_initSclkPin
IFX_INLINE void IfxAsclin_initSclkPin(const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output.
Definition: IfxAsclin.h:2147
IfxAsclin_clearCollisionDetectionErrorFlag
IFX_INLINE void IfxAsclin_clearCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin)
Clears the collision detection error flag.
Definition: IfxAsclin.h:1607
IfxAsclin_RxInputSelect_5
alternate input selection 5
Definition: IfxAsclin.h:315
IfxAsclin_RxInputSelect_4
alternate input selection 4
Definition: IfxAsclin.h:314
IfxAsclin_TxFifoInletWidth
IfxAsclin_TxFifoInletWidth
Defines the number of bytes written to the Tx FIFO with one FPI bus write Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:415
IfxAsclin_Checksum_classic
classic checksum
Definition: IfxAsclin.h:83
IfxAsclin_read8
IFX_EXTERN uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits.
Definition: IfxAsclin.c:214
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxAsclin_SamplePointPosition_3
sample point position at 3
Definition: IfxAsclin.h:327
IfxAsclin_setSuspendMode
IFX_INLINE void IfxAsclin_setSuspendMode(Ifx_ASCLIN *asclin, IfxAsclin_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxAsclin.h:2411
IfxAsclin_readRxData
IFX_INLINE uint32 IfxAsclin_readRxData(Ifx_ASCLIN *asclin)
Definition: IfxAsclin.h:2180
IfxAsclin_enableParity
IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits.
Definition: IfxAsclin.h:1817
IfxAsclin_LeadDelay_5
lead delay in 5 bit times
Definition: IfxAsclin.h:201
IfxAsclin_StopBit_7
number of stop bits 7
Definition: IfxAsclin.h:400
IfxAsclin_clearLinParityErrorFlag
IFX_INLINE void IfxAsclin_clearLinParityErrorFlag(Ifx_ASCLIN *asclin)
Clears the LIN parity error flag.
Definition: IfxAsclin.h:1649
IfxAsclin_ClockSource_ascSlowClock
f asclins will be supplied
Definition: IfxAsclin.h:116
IfxAsclin_getRxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2027
IfxAsclin_enableRxHeaderEndFlag
IFX_INLINE void IfxAsclin_enableRxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive header end flag.
Definition: IfxAsclin.h:1865
IfxAsclin_CtsInputSelect_0
CTS input pin 0.
Definition: IfxAsclin.h:124
IfxAsclin_enableRxFifoUnderflowFlag
IFX_INLINE void IfxAsclin_enableRxFifoUnderflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO underflow flag.
Definition: IfxAsclin.h:1859
IfxAsclin_CtsInputSelect
IfxAsclin_CtsInputSelect
CTS input pin selection Definition in Ifx_ASCLIN.IOCR.B.CTS.
Definition: IfxAsclin.h:122
IfxAsclin_disableAllFlags
IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin)
disables all flags
Definition: IfxAsclin.h:1733
IfxAsclin_IdleDelay_7
idle delay in 7 bit times
Definition: IfxAsclin.h:187
IfxAsclin_TxFifoInterruptLevel_10
TX FIFO level 10.
Definition: IfxAsclin.h:438
IfxAsclin_initTxPin
IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxAsclin.h:2161
IfxAsclin_write16
IFX_EXTERN uint32 IfxAsclin_write16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits.
Definition: IfxAsclin.c:376
IfxAsclin_LeadDelay_7
lead delay in 7 bit times
Definition: IfxAsclin.h:203
IfxAsclin_clearRxResponseEndFlag
IFX_INLINE void IfxAsclin_clearRxResponseEndFlag(Ifx_ASCLIN *asclin)
Clears the receive response end flag.
Definition: IfxAsclin.h:1697
IfxAsclin_TxFifoInletWidth_0
number of bytes 0
Definition: IfxAsclin.h:417
IfxAsclin_setTxFifoInletWidth
IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width.
Definition: IfxAsclin.h:2440
IfxAsclin_OversamplingFactor_6
oversampling factor 6
Definition: IfxAsclin.h:231
IfxAsclin_write8
IFX_EXTERN uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits.
Definition: IfxAsclin.c:404
IfxAsclin_setSlavePolarity
IFX_INLINE void IfxAsclin_setSlavePolarity(Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol)
Selects the slave polarity.
Definition: IfxAsclin.h:2390
IfxAsclin_SamplePointPosition_11
sample point position at 11
Definition: IfxAsclin.h:335
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxAsclin_enableLoopBackMode
IFX_INLINE void IfxAsclin_enableLoopBackMode(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the loop back mode.
Definition: IfxAsclin.h:1811
IfxAsclin_enableTxFifoOutlet
IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission.
Definition: IfxAsclin.h:1889
IfxAsclin_SuspendMode_soft
Soft Suspend.
Definition: IfxAsclin.h:409
IfxAsclin_RxFifoOutletWidth_2
number of bytes 2
Definition: IfxAsclin.h:301
IfxAsclin_setFrameMode
IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module&#39;s mode of operation.
Definition: IfxAsclin.h:2252
IfxAsclin_getRxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status.
Definition: IfxAsclin.h:2045
IfxAsclin_clearTxHeaderEndFlag
IFX_INLINE void IfxAsclin_clearTxHeaderEndFlag(Ifx_ASCLIN *asclin)
Clears the transmit header end flag.
Definition: IfxAsclin.h:1721
IfxAsclin_RxFifoInterruptLevel_10
RX FIFO level 10.
Definition: IfxAsclin.h:285
IfxAsclin_RxFifoInterruptLevel_4
RX FIFO level 4.
Definition: IfxAsclin.h:279
IfxAsclin_DataLength_13
number of bits per transfer 12
Definition: IfxAsclin.h:147
IfxAsclin_enableResponseTimeoutFlag
IFX_INLINE void IfxAsclin_enableResponseTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables response timeout flag.
Definition: IfxAsclin.h:1835
IfxAsclin_IdleDelay_6
idle delay in 6 bit times
Definition: IfxAsclin.h:186
IfxAsclin_ShiftDirection
IfxAsclin_ShiftDirection
SPI mode: defines the shift direction of the shift register. ASC and LIN mode: should be set to 0...
Definition: IfxAsclin.h:355
IfxAsclin_FrameMode_spi
spi mode
Definition: IfxAsclin.h:160
IfxAsclin_enableBreakDetectedFlag
IFX_INLINE void IfxAsclin_enableBreakDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables break detected flag.
Definition: IfxAsclin.h:1745
IfxAsclin_initRtsPin
IFX_INLINE void IfxAsclin_initRtsPin(const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a RTS output.
Definition: IfxAsclin.h:2129
IfxAsclin_clearRaisingEdgeDetectedFlag
IFX_INLINE void IfxAsclin_clearRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin)
Clears the raising edge detected flag.
Definition: IfxAsclin.h:1661
IfxAsclin_StopBit_1
number of stop bits 1
Definition: IfxAsclin.h:394
IfxAsclin_RxInputSelect_6
alternate input selection 6
Definition: IfxAsclin.h:316
IfxAsclin_getClockStatus
IFX_INLINE boolean IfxAsclin_getClockStatus(Ifx_ASCLIN *asclin)
Returns the clock status.
Definition: IfxAsclin.h:1937
IfxAsclin_ClockSource_kernelClock
f clc will be supplied
Definition: IfxAsclin.h:112
IfxAsclin_RxInputSelect_0
alternate input selection 0
Definition: IfxAsclin.h:310
IfxAsclin_LinMode_slave
operates in slave mode
Definition: IfxAsclin.h:211
IfxAsclin_LinMode_master
operates in master mode
Definition: IfxAsclin.h:212
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxAsclin_LeadDelay_1
lead delay in 1 bit times
Definition: IfxAsclin.h:197
IfxAsclin_cfg.h
ASCLIN on-chip implementation data.
IfxAsclin_RxFifoInterruptLevel_12
RX FIFO level 12.
Definition: IfxAsclin.h:287
IfxAsclin_getBreakDetectedFlagStatus
IFX_INLINE boolean IfxAsclin_getBreakDetectedFlagStatus(Ifx_ASCLIN *asclin)
Returns the break detected flag status.
Definition: IfxAsclin.h:1925
IfxAsclin_setFilterDepth
IFX_INLINE void IfxAsclin_setFilterDepth(Ifx_ASCLIN *asclin, uint8 depth)
Sets digital glitch filter depth.
Definition: IfxAsclin.h:2246
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxAsclin_enableLinChecksumErrorFlag
IFX_INLINE void IfxAsclin_enableLinChecksumErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN checksum error flag.
Definition: IfxAsclin.h:1799
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxAsclin_enableRxFifoInlet
IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register...
Definition: IfxAsclin.h:1847
IfxAsclin_SamplePointPosition_6
sample point position at 6
Definition: IfxAsclin.h:330
IfxAsclin_SamplePointPosition_8
sample point position at 8
Definition: IfxAsclin.h:332
IfxAsclin_TxFifoInterruptLevel_11
TX FIFO level 11.
Definition: IfxAsclin.h:439
IfxAsclin_RtsCtsPolarity_activeLow
ready/clear are active-low
Definition: IfxAsclin.h:268
IfxAsclin_setTransmitResponseRequestFlag
IFX_INLINE void IfxAsclin_setTransmitResponseRequestFlag(Ifx_ASCLIN *asclin)
Sets the transmit response request flag.
Definition: IfxAsclin.h:2428
IfxAsclin_DataLength_15
number of bits per transfer 14
Definition: IfxAsclin.h:149
IfxAsclin_isModuleSuspended
IFX_INLINE boolean IfxAsclin_isModuleSuspended(Ifx_ASCLIN *asclin)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxAsclin.h:2168
IfxAsclin_disableModule
IFX_EXTERN void IfxAsclin_disableModule(Ifx_ASCLIN *asclin)
Disables the module.
Definition: IfxAsclin.c:54
IfxAsclin_StopBit_2
number of stop bits 2
Definition: IfxAsclin.h:395
IfxAsclin_getAllErrorFlagsStatus
IFX_INLINE uint16 IfxAsclin_getAllErrorFlagsStatus(Ifx_ASCLIN *asclin)
Returns the status of all error flags.
Definition: IfxAsclin.h:2458
IfxAsclin_writeTxData
IFX_INLINE void IfxAsclin_writeTxData(Ifx_ASCLIN *asclin, uint32 data)
Definition: IfxAsclin.h:2452
IfxAsclin_ClockSource_noClock
no clock will be supplied
Definition: IfxAsclin.h:111
IfxAsclin_enableTxHeaderEndFlag
IFX_INLINE void IfxAsclin_enableTxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit header end flag.
Definition: IfxAsclin.h:1901
IfxAsclin_FrameMode_asc
asc mode
Definition: IfxAsclin.h:159
IfxAsclin_getHeaderTimeoutFlagStatus
IFX_INLINE boolean IfxAsclin_getHeaderTimeoutFlagStatus(Ifx_ASCLIN *asclin)
Returns the header timeout flag status.
Definition: IfxAsclin.h:1961
IfxAsclin_TxFifoInterruptLevel_4
TX FIFO level 4.
Definition: IfxAsclin.h:432
IfxAsclin_setSamplePointPosition
IFX_INLINE void IfxAsclin_setSamplePointPosition(Ifx_ASCLIN *asclin, IfxAsclin_SamplePointPosition spPosition)
Sets the sampling point position.
Definition: IfxAsclin.h:2378
IfxAsclin_setEnableModuleRequest
IFX_INLINE void IfxAsclin_setEnableModuleRequest(Ifx_ASCLIN *asclin)
Sets the enable module request.
Definition: IfxAsclin.h:2240
IfxAsclin_getTransmissionCompletedFlagStatus
IFX_INLINE boolean IfxAsclin_getTransmissionCompletedFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmission pending flag status.
Definition: IfxAsclin.h:2069
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxAsclin_setCtsInput
IFX_INLINE void IfxAsclin_setCtsInput(Ifx_ASCLIN *asclin, IfxAsclin_CtsInputSelect ctsi)
Selects the CTS input pin.
Definition: IfxAsclin.h:2216
IfxAsclin_RxInputSelect_1
alternate input selection 1
Definition: IfxAsclin.h:311
IfxAsclin_LeadDelay_4
lead delay in 4 bit times
Definition: IfxAsclin.h:200
IfxAsclin_TxFifoInletWidth_1
number of bytes 1
Definition: IfxAsclin.h:418
IfxAsclin_clearLinChecksumErrorFlag
IFX_INLINE void IfxAsclin_clearLinChecksumErrorFlag(Ifx_ASCLIN *asclin)
Clears the LIN checksum error flag.
Definition: IfxAsclin.h:1643
IfxAsclin_RxInputSelect_3
alternate input selection 3
Definition: IfxAsclin.h:313
IfxAsclin_ParityType
IfxAsclin_ParityType
Type of parity bit attached to data bits Definition in Ifx_ASCLIN.FRAMECON.B.ODD. ...
Definition: IfxAsclin.h:247
IfxAsclin_setOversampling
IFX_INLINE void IfxAsclin_setOversampling(Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor)
Sets the division ratio of the baudrate post divider.
Definition: IfxAsclin.h:2324
IfxAsclin_setKernelResetOne
IFX_INLINE void IfxAsclin_setKernelResetOne(Ifx_ASCLIN *asclin)
Sets the kernal reset of the KRST1.
Definition: IfxAsclin.h:2270
IfxAsclin_read16
IFX_EXTERN uint32 IfxAsclin_read16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits.
Definition: IfxAsclin.c:186
IfxAsclin_RxInputSelect_7
alternate input selection 7
Definition: IfxAsclin.h:317
IfxAsclin_getRxHeaderEndFlagStatus
IFX_INLINE boolean IfxAsclin_getRxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the receive header end flag status.
Definition: IfxAsclin.h:2057
IfxAsclin_RxFifoInterruptLevel_3
RX FIFO level 3.
Definition: IfxAsclin.h:278
IfxAsclin_clearTransmissionCompletedFlag
IFX_INLINE void IfxAsclin_clearTransmissionCompletedFlag(Ifx_ASCLIN *asclin)
Clears the transmission pending flag.
Definition: IfxAsclin.h:1703
IfxAsclin_FrameMode_initialise
initialise mode
Definition: IfxAsclin.h:158
IfxAsclin_enableTxResponseEndFlag
IFX_INLINE void IfxAsclin_enableTxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit response end flag.
Definition: IfxAsclin.h:1907
IfxAsclin_DataLength_8
number of bits per transfer 7
Definition: IfxAsclin.h:142
IfxAsclin_OversamplingFactor_4
oversampling factor 4
Definition: IfxAsclin.h:229
IfxAsclin_setBrdLowerlimt
IFX_INLINE void IfxAsclin_setBrdLowerlimt(Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection&#39;s lower limit.
Definition: IfxAsclin.h:2186
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxAsclin_SamplesPerBit_one
one sample per bit
Definition: IfxAsclin.h:347
IfxAsclin_SleepMode_disable
disables sleep mode
Definition: IfxAsclin.h:377
IfxAsclin_getClockSource
IFX_INLINE uint8 IfxAsclin_getClockSource(Ifx_ASCLIN *asclin)
Returns the clock source.
Definition: IfxAsclin.h:1931
IfxAsclin_SleepMode_enable
enables sleep mode
Definition: IfxAsclin.h:376
IfxAsclin_clearFallingEdgeDetectedFlag
IFX_INLINE void IfxAsclin_clearFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin)
Clears the falling edge detected flag.
Definition: IfxAsclin.h:1613
IfxAsclin_DataLength_7
number of bits per transfer 6
Definition: IfxAsclin.h:141
IfxAsclin_setStopBit
IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits.
Definition: IfxAsclin.h:2405
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxAsclin_setShiftDirection
IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction.
Definition: IfxAsclin.h:2384
IfxAsclin_getPrescaler
IFX_INLINE uint16 IfxAsclin_getPrescaler(Ifx_ASCLIN *asclin)
Returns the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:2003
IfxAsclin_TxFifoInterruptLevel_13
TX FIFO level 13.
Definition: IfxAsclin.h:441
IfxAsclin_RxFifoInterruptLevel_2
RX FIFO level 2.
Definition: IfxAsclin.h:277
IfxAsclin_OversamplingFactor_8
oversampling factor 8
Definition: IfxAsclin.h:233
IfxAsclin_getFrameErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the frame error flag status.
Definition: IfxAsclin.h:1955
IfxAsclin_OversamplingFactor_12
oversampling factor 12
Definition: IfxAsclin.h:237
IfxAsclin_setDisableModuleRequest
IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
Sets the disable module request.
Definition: IfxAsclin.h:2234
IfxAsclin_SamplePointPosition_7
sample point position at 7
Definition: IfxAsclin.h:331
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxAsclin_clearBreakDetectedFlag
IFX_INLINE void IfxAsclin_clearBreakDetectedFlag(Ifx_ASCLIN *asclin)
Clears the break detected flag.
Definition: IfxAsclin.h:1601
IfxAsclin_Checksum_enhanced
enhanced checksum
Definition: IfxAsclin.h:84
IfxAsclin_getTransmitSignalStatus
IFX_INLINE boolean IfxAsclin_getTransmitSignalStatus(Ifx_ASCLIN *asclin)
Returns the transmit signal status.
Definition: IfxAsclin.h:2075
IfxAsclin_enableTxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO level flag.
Definition: IfxAsclin.h:1883
IfxAsclin_TxFifoInterruptLevel_12
TX FIFO level 12.
Definition: IfxAsclin.h:440
IfxAsclin_clearTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag.
Definition: IfxAsclin.h:1715
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:382
IfxAsclin_StopBit_4
number of stop bits 4
Definition: IfxAsclin.h:397
IfxAsclin_getPdFrequency
IFX_EXTERN float32 IfxAsclin_getPdFrequency(Ifx_ASCLIN *asclin)
Returns the PD frequency.
Definition: IfxAsclin.c:156
IfxAsclin_SleepMode
IfxAsclin_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_ASCLIN.CLC.B.EDIS.
Definition: IfxAsclin.h:374
IfxAsclin_OversamplingFactor_14
oversampling factor 14
Definition: IfxAsclin.h:239
IfxAsclin_getRaisingEdgeDetectedFlagStatus
IFX_INLINE boolean IfxAsclin_getRaisingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin)
Returns the raising edge detected flag status.
Definition: IfxAsclin.h:2009
IfxAsclin_clearResponseTimeoutFlag
IFX_INLINE void IfxAsclin_clearResponseTimeoutFlag(Ifx_ASCLIN *asclin)
Clears the response timeout flag.
Definition: IfxAsclin.h:1667
IfxAsclin_setDataLength
IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer)
Definition: IfxAsclin.h:2222
IfxAsclin_TxFifoInterruptLevel_3
TX FIFO level 3.
Definition: IfxAsclin.h:431
IfxAsclin_RtsCtsPolarity
IfxAsclin_RtsCtsPolarity
Polarity of the RTS and CTS signals Definition in Ifx_ASCLIN.IOCR.B.RCPOL.
Definition: IfxAsclin.h:265
IfxAsclin_getParityErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getParityErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the parity error flag status.
Definition: IfxAsclin.h:1997
IfxAsclin_setClockSource
IFX_EXTERN void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source.
Definition: IfxAsclin.c:358
IfxAsclin_setTxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2446


iLLD_TC26B: IfxAsclin_Asc.c Source File

  • Asclin
  • Asc
IfxAsclin_Asc.c
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_Asc.c
3 * \brief ASCLIN ASC details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxAsclin_Asc.h"
47 #include "string.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 uint8 IfxAsclin_Asc_blockingRead(IfxAsclin_Asc *asclin)
54 {
55 Ifx_SizeT count = 1;
56 uint8 data;
57
58 while (IfxAsclin_Asc_read(asclin, &data, &count, TIME_INFINITE) != TRUE)
59 {}
60
61 return data;
62 }
63
64
65 boolean IfxAsclin_Asc_blockingWrite(IfxAsclin_Asc *asclin, uint8 data)
66 {
67 Ifx_SizeT count = 1;
68
69 return IfxAsclin_Asc_write(asclin, &data, &count, TIME_INFINITE);
70 }
71
72
73 boolean IfxAsclin_Asc_canReadCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
74 {
75 return Ifx_Fifo_canReadCount(asclin->rx, count, timeout);
76 }
77
78
79 boolean IfxAsclin_Asc_canWriteCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
80 {
81 return Ifx_Fifo_canWriteCount(asclin->tx, count, timeout);
82 }
83
84
85 void IfxAsclin_Asc_clearRx(IfxAsclin_Asc *asclin)
86 {
87 IfxAsclin_flushRxFifo(asclin->asclin);
88 Ifx_Fifo_clear(asclin->rx);
89 }
90
91
92 void IfxAsclin_Asc_clearTx(IfxAsclin_Asc *asclin)
93 {
94 Ifx_Fifo_clear(asclin->tx);
95 IfxAsclin_flushTxFifo(asclin->asclin);
96 }
97
98
99 void IfxAsclin_Asc_disableModule(IfxAsclin_Asc *asclin)
100 {
101 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
102 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
103 IfxScuWdt_clearCpuEndinit(psw); /* clearing the endinit protection */
104 IfxAsclin_setDisableModuleRequest(asclinSFR); /* disabling the module */
105 IfxScuWdt_setCpuEndinit(psw); /* setting the endinit protection back on */
106 }
107
108
109 boolean IfxAsclin_Asc_flushTx(IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
110 {
111 Ifx_TickTime deadline = IfxStm_getDeadLine(timeout);
112 boolean result;
113
114 /* Flush the software FIFO */
115 result = Ifx_Fifo_flush(asclin->tx, timeout);
116
117 if (result)
118 {
119 /* Flush the hardware FIFO (wait until all bytes have been transmitted) */
120 do
121 {
122 result = IfxAsclin_getTxFifoFillLevel(asclin->asclin) == 0;
123 } while (!result && !IfxStm_isDeadLine(deadline));
124 }
125
126 return result;
127 }
128
129
130 sint32 IfxAsclin_Asc_getReadCount(IfxAsclin_Asc *asclin)
131 {
132 return Ifx_Fifo_readCount(asclin->rx);
133 }
134
135
136 IfxStdIf_DPipe_ReadEvent IfxAsclin_Asc_getReadEvent(IfxAsclin_Asc *asclin)
137 {
138 return &asclin->rx->eventWriter;
139 }
140
141
142 uint32 IfxAsclin_Asc_getSendCount(IfxAsclin_Asc *asclin)
143 {
144 return asclin->sendCount;
145 }
146
147
148 Ifx_TickTime IfxAsclin_Asc_getTxTimeStamp(IfxAsclin_Asc *asclin)
149 {
150 return asclin->txTimestamp;
151 }
152
153
154 sint32 IfxAsclin_Asc_getWriteCount(IfxAsclin_Asc *asclin)
155 {
156 return Ifx_Fifo_writeCount(asclin->tx);
157 }
158
159
160 IfxStdIf_DPipe_WriteEvent IfxAsclin_Asc_getWriteEvent(IfxAsclin_Asc *asclin)
161 {
162 return &asclin->tx->eventWriter;
163 }
164
165
166 IfxAsclin_Status IfxAsclin_Asc_initModule(IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
167 {
168 Ifx_ASCLIN *asclinSFR = config->asclin; /* pointer to ASCLIN registers*/
169 IfxAsclin_Status status = IfxAsclin_Status_noError;
170
171 asclin->asclin = asclinSFR; /* adding register pointer to module handler*/
172
173 IfxAsclin_enableModule(asclinSFR); /* enabling the module*/
174 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock*/
175 IfxAsclin_setFrameMode(asclinSFR, IfxAsclin_FrameMode_initialise); /* setting the module in Initialise mode*/
176 IfxAsclin_setPrescaler(asclinSFR, config->baudrate.prescaler); /* sets the prescaler */
177 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* temporary set the clock source for baudrate configuration*/
178 status = (IfxAsclin_Status)IfxAsclin_setBitTiming(asclinSFR, /* setting the baudrate bit fields to generate the required baudrate*/
179 config->baudrate.baudrate,
180 config->baudrate.oversampling,
181 config->bitTiming.samplePointPosition,
182 config->bitTiming.medianFilter);
183 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock again*/
184
185 IfxAsclin_enableLoopBackMode(asclinSFR, config->loopBack); /* selecting the loopback mode */
186 IfxAsclin_enableParity(asclinSFR, config->frame.parityBit); /* setting parity enable */
187 IfxAsclin_setParityType(asclinSFR, config->frame.parityType); /* setting parity type (odd/even)*/
188 IfxAsclin_setStopBit(asclinSFR, config->frame.stopBit); /* setting the stop bit */
189 IfxAsclin_setShiftDirection(asclinSFR, config->frame.shiftDir); /* setting the shift direction */
190 IfxAsclin_setDataLength(asclinSFR, config->frame.dataLength); /* setting the data length */
191 IfxAsclin_setTxFifoInletWidth(asclinSFR, config->fifo.inWidth); /* setting Tx FIFO inlet width */
192 IfxAsclin_setRxFifoOutletWidth(asclinSFR, config->fifo.outWidth); /* setting Rx FIFO outlet width */
193 IfxAsclin_setIdleDelay(asclinSFR, config->frame.idleDelay); /* setting idle delay */
194 IfxAsclin_setTxFifoInterruptLevel(asclinSFR, config->fifo.txFifoInterruptLevel); /* setting Tx FIFO level at which a Tx interrupt will be triggered*/
195 IfxAsclin_setRxFifoInterruptLevel(asclinSFR, config->fifo.rxFifoInterruptLevel); /* setting Rx FIFO interrupt level at which a Rx interrupt will be triggered*/
196 IfxAsclin_setFrameMode(asclinSFR, config->frame.frameMode); /* selecting the frame mode*/
197
198 /* Pin mapping */
199 const IfxAsclin_Asc_Pins *pins = config->pins;
200
201 if (pins != NULL_PTR)
202 {
203 IfxAsclin_Cts_In *cts = pins->cts;
204
205 if (cts != NULL_PTR)
206 {
207 IfxAsclin_initCtsPin(cts, pins->ctsMode, pins->pinDriver);
208 }
209
210 IfxAsclin_Rx_In *rx = pins->rx;
211
212 if (rx != NULL_PTR)
213 {
214 IfxAsclin_initRxPin(rx, pins->rxMode, pins->pinDriver);
215 }
216
217 IfxAsclin_Rts_Out *rts = pins->rts;
218
219 if (rts != NULL_PTR)
220 {
221 IfxAsclin_initRtsPin(rts, pins->rtsMode, pins->pinDriver);
222 }
223
224 IfxAsclin_Tx_Out *tx = pins->tx;
225
226 if (tx != NULL_PTR)
227 {
228 IfxAsclin_initTxPin(tx, pins->txMode, pins->pinDriver);
229 }
230 }
231
232 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* select the clock source*/
233
234 IfxAsclin_disableAllFlags(asclinSFR); /* disable all flags */
235 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags */
236
237 /* HW error flags */
238 asclin->errorFlags.ALL = 0;
239
240 if (config->errorFlags.flags.parityError)
241 {
242 IfxAsclin_enableParityErrorFlag(asclinSFR, TRUE);
243 }
244
245 if (config->errorFlags.flags.frameError)
246 {
247 IfxAsclin_enableFrameErrorFlag(asclinSFR, TRUE);
248 }
249
250 if (config->errorFlags.flags.rxFifoOverflow)
251 {
252 IfxAsclin_enableRxFifoOverflowFlag(asclinSFR, TRUE);
253 }
254
255 if (config->errorFlags.flags.rxFifoUnderflow)
256 {
257 IfxAsclin_enableRxFifoUnderflowFlag(asclinSFR, TRUE);
258 }
259
260 if (config->errorFlags.flags.txFifoOverflow)
261 {
262 IfxAsclin_enableTxFifoOverflowFlag(asclinSFR, TRUE);
263 }
264
265 /* transmission flags */
266 asclin->rxSwFifoOverflow = FALSE;
267 asclin->txInProgress = FALSE;
268
269 /* Buffer mode */
270 Ifx_SizeT elementSize;
271 asclin->dataBufferMode = config->dataBufferMode;
272 asclin->txTimestamp = 0;
273 asclin->sendCount = 0;
274
275 switch (asclin->dataBufferMode)
276 {
277 case Ifx_DataBufferMode_normal:
278 elementSize = 1;
279 break;
280 case Ifx_DataBufferMode_timeStampSingle:
281 elementSize = sizeof(Ifx_DataBufferMode_TimeStampSingle);
282 break;
283 default:
284 elementSize = 0;
285 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
286 break;
287 }
288
289 /* SW Fifos */
290 if (config->txBuffer != NULL_PTR)
291 {
292 asclin->tx = Ifx_Fifo_init(config->txBuffer, config->txBufferSize, elementSize);
293 }
294 else
295 {
296 asclin->tx = Ifx_Fifo_create(config->txBufferSize, elementSize);
297 }
298
299 if (config->rxBuffer != NULL_PTR)
300 {
301 asclin->rx = Ifx_Fifo_init(config->rxBuffer, config->rxBufferSize, elementSize);
302 }
303 else
304 {
305 asclin->rx = Ifx_Fifo_create(config->rxBufferSize, elementSize);
306 }
307
308 /* initialising the interrupts */
309 IfxSrc_Tos tos = config->interrupt.typeOfService;
310
311 if ((config->interrupt.rxPriority > 0) || (tos == IfxSrc_Tos_dma))
312 {
313 volatile Ifx_SRC_SRCR *src;
314 src = IfxAsclin_getSrcPointerRx(asclinSFR);
315 IfxSrc_init(src, tos, config->interrupt.rxPriority);
316 IfxAsclin_enableRxFifoFillLevelFlag(asclinSFR, TRUE);
317 IfxSrc_enable(src);
318 }
319
320 if ((config->interrupt.txPriority > 0) || (tos == IfxSrc_Tos_dma))
321 {
322 volatile Ifx_SRC_SRCR *src;
323 src = IfxAsclin_getSrcPointerTx(asclinSFR);
324 IfxSrc_init(src, tos, config->interrupt.txPriority);
325 IfxAsclin_enableTxFifoFillLevelFlag(asclinSFR, TRUE);
326 IfxSrc_enable(src);
327 }
328
329 if (config->interrupt.erPriority > 0) /*These interrupts are not serviced by dma*/
330 {
331 volatile Ifx_SRC_SRCR *src;
332 src = IfxAsclin_getSrcPointerEr(asclinSFR);
333 IfxSrc_init(src, tos, config->interrupt.erPriority);
334 IfxAsclin_enableParityErrorFlag(asclinSFR, TRUE);
335 IfxSrc_enable(src);
336 }
337
338 /* enable transfers */
339 IfxAsclin_enableRxFifoInlet(asclinSFR, TRUE); // enabling Rx FIFO for recieving
340 IfxAsclin_enableTxFifoOutlet(asclinSFR, TRUE); // enabling Tx FIFO for transmitting
341
342 IfxAsclin_flushRxFifo(asclinSFR); // flushing Rx FIFO
343 IfxAsclin_flushTxFifo(asclinSFR); // flushing Tx FIFO
344
345 return status;
346 }
347
348
349 void IfxAsclin_Asc_initModuleConfig(IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
350 {
351 config->asclin = asclin;
352
353 /* loop back disabled */
354 config->loopBack = FALSE; /* no loop back*/
355
356 /* Default values for baudrate */
357 config->clockSource = IfxAsclin_ClockSource_kernelClock; /* kernel clock, fclc*/
358 config->baudrate.prescaler = 1; /* default prescaler*/
359 config->baudrate.baudrate = 115200; /* default baudrate (the fractional dividier setup will be calculated in initModule*/
360 config->baudrate.oversampling = IfxAsclin_OversamplingFactor_4; /* default oversampling factor*/
361
362 /* Default Values for Bit Timings */
363 config->bitTiming.medianFilter = IfxAsclin_SamplesPerBit_one; /* one sample per bit*/
364 config->bitTiming.samplePointPosition = IfxAsclin_SamplePointPosition_3; /* sample point position at 3*/
365 /* Default Values for Frame Control */
366 config->frame.idleDelay = IfxAsclin_IdleDelay_0; /* no idle delay*/
367 config->frame.stopBit = IfxAsclin_StopBit_1; /* one stop bit*/
368 config->frame.frameMode = IfxAsclin_FrameMode_asc; /* ASC mode*/
369 config->frame.shiftDir = IfxAsclin_ShiftDirection_lsbFirst; /* shift diection LSB first*/
370 config->frame.parityBit = FALSE; /* disable parity*/
371 config->frame.parityType = IfxAsclin_ParityType_even; /* even parity (if parity enabled)*/
372 config->frame.dataLength = IfxAsclin_DataLength_8; /* number of bits per transfer 8*/
373
374 /* Default Values for Fifo Control */
375 config->fifo.inWidth = IfxAsclin_TxFifoInletWidth_1; /* 8-bit wide write*/
376 config->fifo.outWidth = IfxAsclin_RxFifoOutletWidth_1; /* 8-bit wide read*/
377 config->fifo.txFifoInterruptLevel = IfxAsclin_TxFifoInterruptLevel_0; /* txFifoInterruptLevel = 0. optimised to write upto 16 bytes at a time */
378 config->fifo.rxFifoInterruptLevel = IfxAsclin_RxFifoInterruptLevel_1;
379 config->fifo.buffMode = IfxAsclin_ReceiveBufferMode_rxFifo; /* RxFIFO*/
380
381 /* Default Values for Interrupt Config */
382 config->interrupt.rxPriority = 0; /* receive interrupt priority 0*/
383 config->interrupt.txPriority = 0; /* transmit interrupt priority 0*/
384 config->interrupt.erPriority = 0; /* error interrupt priority 0*/
385 config->interrupt.typeOfService = IfxSrc_Tos_cpu0; /* type of service CPU0*/
386
387 /* Enable error flags */
388 config->errorFlags.ALL = ~0; /* all error flags enabled*/
389
390 /* init pointers */
391 config->pins = NULL_PTR; /* pins to null pointer*/
392 config->rxBuffer = NULL_PTR; /* Rx Fifo buffer*/
393 config->txBuffer = NULL_PTR; /* Tx Fifo buffer*/
394
395 config->txBufferSize = 0; /* Rx Fifo buffer size*/
396 config->rxBufferSize = 0; /* Rx Fifo buffer size*/
397
398 config->dataBufferMode = Ifx_DataBufferMode_normal;
399 }
400
401
402 void IfxAsclin_Asc_initiateTransmission(IfxAsclin_Asc *asclin)
403 {
404 if (asclin->txInProgress == FALSE) /* Send first byte: send init */
405 {
406 if (Ifx_Fifo_isEmpty(asclin->tx) == FALSE)
407 {
408 uint8 data;
409 asclin->txInProgress = TRUE;
410
411 switch (asclin->dataBufferMode)
412 {
413 case Ifx_DataBufferMode_normal:
414 {
415 Ifx_Fifo_read(asclin->tx, &data, 1, TIME_NULL);
416 }
417 break;
418 case Ifx_DataBufferMode_timeStampSingle:
419 {
420 Ifx_DataBufferMode_TimeStampSingle packedData;
421 Ifx_Fifo_read(asclin->tx, &packedData, sizeof(packedData), TIME_NULL);
422 data = packedData.data;
423 }
424 break;
425 }
426
427 IfxAsclin_write8(asclin->asclin, &data, 1);
428 }
429 }
430 }
431
432
433 void IfxAsclin_Asc_isrError(IfxAsclin_Asc *asclin)
434 {
435 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
436
437 /* store all the flags in the variable */
438 if (IfxAsclin_getParityErrorFlagStatus(asclinSFR))
439 {
440 IfxAsclin_clearParityErrorFlag(asclinSFR);
441 asclin->errorFlags.flags.parityError = 1;
442 }
443
444 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR))
445 {
446 IfxAsclin_clearFrameErrorFlag(asclinSFR);
447 asclin->errorFlags.flags.frameError = 1;
448 }
449
450 if (IfxAsclin_getRxFifoOverflowFlagStatus(asclinSFR))
451 {
452 IfxAsclin_clearRxFifoOverflowFlag(asclinSFR);
453 asclin->errorFlags.flags.rxFifoOverflow = 1;
454 }
455
456 if (IfxAsclin_getRxFifoUnderflowFlagStatus(asclinSFR))
457 {
458 IfxAsclin_clearRxFifoUnderflowFlag(asclinSFR);
459 asclin->errorFlags.flags.rxFifoUnderflow = 1;
460 }
461
462 if (IfxAsclin_getTxFifoOverflowFlagStatus(asclinSFR))
463 {
464 IfxAsclin_clearTxFifoOverflowFlag(asclinSFR);
465 asclin->errorFlags.flags.txFifoOverflow = 1;
466 }
467 }
468
469
470 void IfxAsclin_Asc_isrReceive(IfxAsclin_Asc *asclin)
471 {
472 uint8 ascData[16]; /*FIFO size is 16 bytes*/
473
474 switch (asclin->dataBufferMode)
475 {
476 case Ifx_DataBufferMode_normal:
477 {
478 uint8 count;
479 count = IfxAsclin_getRxFifoFillLevel(asclin->asclin);
480 IfxAsclin_read8(asclin->asclin, &ascData[0], count);
481
482 if (Ifx_Fifo_write(asclin->rx, &ascData[0], count, TIME_NULL) != 0)
483 {
484 /* Receive buffer is full, data is discard */
485 asclin->rxSwFifoOverflow = TRUE;
486 }
487
488 break;
489 }
490 case Ifx_DataBufferMode_timeStampSingle:
491 {
492 Ifx_DataBufferMode_TimeStampSingle packedData;
493
494 while (IfxAsclin_getRxFifoFillLevel(asclin->asclin) > 0)
495 {
496 packedData.timestamp = IfxStm_now();
497 IfxAsclin_read8(asclin->asclin, &ascData[0], 1);
498 packedData.data = ascData[0];
499
500 if (Ifx_Fifo_write(asclin->rx, &packedData, sizeof(packedData), TIME_NULL) != 0)
501 {
502 /* Receive buffer is full, data is discard */
503 asclin->rxSwFifoOverflow = TRUE;
504 }
505 }
506 }
507 break;
508 }
509 }
510
511
512 void IfxAsclin_Asc_isrTransmit(IfxAsclin_Asc *asclin)
513 {
514 asclin->txTimestamp = IfxStm_now();
515 asclin->sendCount++;
516
517 if (Ifx_Fifo_isEmpty(asclin->tx) == FALSE)
518 {
519 switch (asclin->dataBufferMode)
520 {
521 case Ifx_DataBufferMode_normal:
522 {
523 uint8 ascData[16];
524 uint16 count = 0, i_count = 0;
525 volatile uint8 hw_tx_fill_level = 0;
526
527 count = Ifx_Fifo_readCount(asclin->tx); /*SW FIFO fill level*/
528
529 hw_tx_fill_level = IfxAsclin_getTxFifoFillLevel(asclin->asclin);
530
531 i_count = (16 - hw_tx_fill_level);
532
533 if (i_count > count)
534 {
535 i_count = count;
536 }
537
538 Ifx_Fifo_read(asclin->tx, &ascData[0], i_count, TIME_NULL);
539 IfxAsclin_write8(asclin->asclin, &ascData[0], i_count);
540 }
541 break;
542
543 case Ifx_DataBufferMode_timeStampSingle:
544 {
545 Ifx_DataBufferMode_TimeStampSingle packedData;
546 uint8 ascData;
547
548 Ifx_Fifo_read(asclin->tx, &packedData, sizeof(packedData), TIME_NULL);
549
550 ascData = packedData.data;
551 IfxAsclin_write8(asclin->asclin, &ascData, 1);
552 }
553 break;
554 }
555 }
556 else
557 {
558 /* Transmit buffer is empty */
559 asclin->txInProgress = FALSE;
560 }
561 }
562
563
564 boolean IfxAsclin_Asc_read(IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
565 {
566 Ifx_SizeT left = Ifx_Fifo_read(asclin->rx, data, *count, timeout);
567
568 *count -= left;
569
570 return left == 0;
571 }
572
573
574 void IfxAsclin_Asc_resetSendCount(IfxAsclin_Asc *asclin)
575 {
576 asclin->sendCount = 0;
577 }
578
579
580 boolean IfxAsclin_Asc_stdIfDPipeInit(IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin)
581 {
582 /* Ensure the stdif is reset to zeros */
583 memset(stdif, 0, sizeof(IfxStdIf_DPipe));
584
585 /* Set the API link */
586 stdif->driver = asclin;
587 stdif->write = (IfxStdIf_DPipe_Write) & IfxAsclin_Asc_write;
588 stdif->read = (IfxStdIf_DPipe_Read) & IfxAsclin_Asc_read;
589 stdif->getReadCount = (IfxStdIf_DPipe_GetReadCount) & IfxAsclin_Asc_getReadCount;
590 stdif->getReadEvent = (IfxStdIf_DPipe_GetReadEvent) & IfxAsclin_Asc_getReadEvent;
591 stdif->getWriteCount = (IfxStdIf_DPipe_GetWriteCount) & IfxAsclin_Asc_getWriteCount;
592 stdif->getWriteEvent = (IfxStdIf_DPipe_GetWriteEvent) & IfxAsclin_Asc_getWriteEvent;
593 stdif->canReadCount = (IfxStdIf_DPipe_CanReadCount) & IfxAsclin_Asc_canReadCount;
594 stdif->canWriteCount = (IfxStdIf_DPipe_CanWriteCount) & IfxAsclin_Asc_canWriteCount;
595 stdif->flushTx = (IfxStdIf_DPipe_FlushTx) & IfxAsclin_Asc_flushTx;
596 stdif->clearTx = (IfxStdIf_DPipe_ClearTx) & IfxAsclin_Asc_clearTx;
597 stdif->clearRx = (IfxStdIf_DPipe_ClearRx) & IfxAsclin_Asc_clearRx;
598 stdif->onReceive = (IfxStdIf_DPipe_OnReceive) & IfxAsclin_Asc_isrReceive;
599 stdif->onTransmit = (IfxStdIf_DPipe_OnTransmit) & IfxAsclin_Asc_isrTransmit;
600 stdif->onError = (IfxStdIf_DPipe_OnError) & IfxAsclin_Asc_isrError;
601 stdif->getSendCount = (IfxStdIf_DPipe_GetSendCount) & IfxAsclin_Asc_getSendCount;
602 stdif->getTxTimeStamp = (IfxStdIf_DPipe_GetTxTimeStamp) & IfxAsclin_Asc_getTxTimeStamp;
603 stdif->resetSendCount = (IfxStdIf_DPipe_ResetSendCount) & IfxAsclin_Asc_resetSendCount;
604 stdif->txDisabled = FALSE;
605 return TRUE;
606 }
607
608
609 boolean IfxAsclin_Asc_write(IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
610 {
611 Ifx_SizeT left;
612 boolean result = TRUE;
613 boolean tx_status = asclin->txInProgress;
614 uint16 tx_fifo_size = (uint16)asclin->tx->size;
615
616 if (*count != 0)
617 {
618 if ((!tx_status) && (*count > tx_fifo_size)) /*Transmission not initialised and data size is greater than S/W FIFO*/
619 {
620 Ifx_Fifo_write(asclin->tx, data, tx_fifo_size, timeout); /*Fill upto the S/W FIFO size and initiate transmission*/
621 IfxAsclin_Asc_initiateTransmission(asclin);
622
623 left = Ifx_Fifo_write(asclin->tx, (((const uint8 *)data) + tx_fifo_size), (*count) - tx_fifo_size, timeout);
624 IfxAsclin_Asc_initiateTransmission(asclin); /*Will initiate transmission only if txInProgress is False, otherwise interrupts will continue to push data to H/W FIFO*/
625 }
626
627 else
628 {
629 left = Ifx_Fifo_write(asclin->tx, data, *count, timeout);
630 IfxAsclin_Asc_initiateTransmission(asclin);
631 }
632
633 *count -= left;
634 result = left == 0;
635 }
636
637 return result;
638 }
IfxAsclin_Asc_Config::baudrate
IfxAsclin_Asc_BaudRate baudrate
structure for baudrate
Definition: IfxAsclin_Asc.h:358
IfxStdIf_DPipe_::resetSendCount
IfxStdIf_DPipe_ResetSendCount resetSendCount
Definition: IfxStdIf_DPipe.h:253
IfxStdIf_DPipe_::canWriteCount
IfxStdIf_DPipe_CanWriteCount canWriteCount
Definition: IfxStdIf_DPipe.h:243
IfxStdIf_DPipe_ResetSendCount
void(* IfxStdIf_DPipe_ResetSendCount)(IfxStdIf_InterfaceDriver stdIf)
Reset the sendCount counter.
Definition: IfxStdIf_DPipe.h:226
IfxAsclin_Asc_Config::rxBufferSize
Ifx_SizeT rxBufferSize
Size of the rx buffer.
Definition: IfxAsclin_Asc.h:372
IfxAsclin_Asc.h
ASCLIN ASC details.
IfxAsclin_Cts_In
CTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:56
IfxAsclin_Asc_isrError
void IfxAsclin_Asc_isrError(IfxAsclin_Asc *asclin)
ISR error routine.
Definition: IfxAsclin_Asc.c:433
IfxAsclin_Asc_getReadCount
sint32 IfxAsclin_Asc_getReadCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:130
IfxStdIf_DPipe_::txDisabled
boolean txDisabled
If disabled is set to TRUE, the output is disabled, else enabled.
Definition: IfxStdIf_DPipe.h:233
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
Ifx_Fifo_write
Ifx_SizeT Ifx_Fifo_write(Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo.
Definition: Ifx_Fifo.c:366
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin_IdleDelay_0
idle delay in 0 bit times
Definition: IfxAsclin.h:180
IfxAsclin_Asc_Config::frame
IfxAsclin_Asc_FrameControl frame
structure for frame control
Definition: IfxAsclin_Asc.h:360
IfxAsclin_initCtsPin
IFX_INLINE void IfxAsclin_initCtsPin(const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a CTS input.
Definition: IfxAsclin.h:2117
IfxStdIf_DPipe_::getTxTimeStamp
IfxStdIf_DPipe_GetTxTimeStamp getTxTimeStamp
Definition: IfxStdIf_DPipe.h:252
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxStdIf_DPipe_::onTransmit
IfxStdIf_DPipe_OnTransmit onTransmit
Definition: IfxStdIf_DPipe.h:248
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
IfxAsclin_Asc_getWriteEvent
IfxStdIf_DPipe_WriteEvent IfxAsclin_Asc_getWriteEvent(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:160
IfxAsclin_Asc_Config::rxBuffer
void * rxBuffer
The buffer parameter must point on a free memory location where the buffer object will be Initialised...
Definition: IfxAsclin_Asc.h:373
IfxAsclin_setIdleDelay
IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay.
Definition: IfxAsclin.h:2264
IfxAsclin_ReceiveBufferMode_rxFifo
RxFIFO mode.
Definition: IfxAsclin.h:258
IfxAsclin_ShiftDirection_lsbFirst
LSB first.
Definition: IfxAsclin.h:357
IfxAsclin_Asc
Module Handle.
Definition: IfxAsclin_Asc.h:340
IfxAsclin_TxFifoInterruptLevel_0
TX FIFO level 0.
Definition: IfxAsclin.h:428
Ifx_Fifo_canReadCount
boolean Ifx_Fifo_canReadCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer.
Definition: Ifx_Fifo.c:136
IfxAsclin_Asc_BitTimingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, number of samples per bit (1 or 3), sample mode/median filter.
Definition: IfxAsclin_Asc.h:273
IfxAsclin_getSrcPointerEr
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR.
Definition: IfxAsclin.c:168
IfxAsclin_Asc_getTxTimeStamp
Ifx_TickTime IfxAsclin_Asc_getTxTimeStamp(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:148
IfxAsclin_getRxFifoUnderflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO underflow flag status.
Definition: IfxAsclin.h:2051
IfxStdIf_DPipe_::getWriteEvent
IfxStdIf_DPipe_GetWriteEvent getWriteEvent
Definition: IfxStdIf_DPipe.h:241
Ifx_DataBufferMode_TimeStampSingle::data
uint8 data
Definition: Ifx_Types.h:149
IfxStdIf_DPipe_::getWriteCount
IfxStdIf_DPipe_GetWriteCount getWriteCount
Definition: IfxStdIf_DPipe.h:240
IfxAsclin_getTxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status.
Definition: IfxAsclin.h:2099
IfxAsclin_Asc_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Asc.h:364
IfxAsclin_Asc_initModule
IfxAsclin_Status IfxAsclin_Asc_initModule(IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
Initialises the module.
Definition: IfxAsclin_Asc.c:166
IfxAsclin_Asc_getSendCount
uint32 IfxAsclin_Asc_getSendCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:142
IfxStdIf_DPipe_GetSendCount
uint32(* IfxStdIf_DPipe_GetSendCount)(IfxStdIf_InterfaceDriver stdIf)
Returns number of bytes send.
Definition: IfxStdIf_DPipe.h:128
IfxAsclin_Asc_initiateTransmission
void IfxAsclin_Asc_initiateTransmission(IfxAsclin_Asc *asclin)
Initiate the data transmission.
Definition: IfxAsclin_Asc.c:402
IfxAsclin_enableModule
void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
Enables the module.
Definition: IfxAsclin.c:70
IfxStdIf_DPipe_OnTransmit
void(* IfxStdIf_DPipe_OnTransmit)(IfxStdIf_InterfaceDriver stdIf)
handler called on transmit event
Definition: IfxStdIf_DPipe.h:212
IfxAsclin_Asc_getReadEvent
IfxStdIf_DPipe_ReadEvent IfxAsclin_Asc_getReadEvent(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:136
IfxAsclin_Asc_FifoControl::inWidth
IfxAsclin_TxFifoInletWidth inWidth
TXFIFOCON.INW, transmit FIFO inlet width.
Definition: IfxAsclin_Asc.h:281
IfxAsclin_Asc_FifoControl::txFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel
TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.
Definition: IfxAsclin_Asc.h:283
IfxAsclin_Asc_Pins::cts
IFX_CONST IfxAsclin_Cts_In * cts
ASC clear to send (CTS) pin.
Definition: IfxAsclin_Asc.h:315
IfxStm_getDeadLine
IFX_INLINE sint64 IfxStm_getDeadLine(sint64 timeout)
Get the deadline value.
Definition: IfxStm.h:746
IfxAsclin_Asc_isrReceive
void IfxAsclin_Asc_isrReceive(IfxAsclin_Asc *asclin)
ISR receive routine.
Definition: IfxAsclin_Asc.c:470
IfxAsclin_flushTxFifo
IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO.
Definition: IfxAsclin.h:1919
IfxAsclin_Asc_BaudRate::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Asc.h:264
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStdIf_DPipe_::onError
IfxStdIf_DPipe_OnError onError
Definition: IfxStdIf_DPipe.h:249
IfxAsclin_RxFifoInterruptLevel_1
RX FIFO level 1.
Definition: IfxAsclin.h:276
IfxAsclin_Asc_Config::fifo
IfxAsclin_Asc_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Asc.h:361
IfxAsclin_Asc_ErrorFlags::parityError
uint8 parityError
parity error
Definition: IfxAsclin_Asc.h:251
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
Ifx_DataBufferMode_normal
normal mode, each received byte is moved to the rx fifo
Definition: Ifx_Types.h:163
IfxAsclin_initRxPin
IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxAsclin.h:2136
IfxAsclin_Asc_getWriteCount
sint32 IfxAsclin_Asc_getWriteCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:154
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxStdIf_DPipe_::read
IfxStdIf_DPipe_Read read
Definition: IfxStdIf_DPipe.h:237
IfxAsclin_Asc_Pins::ctsMode
IfxPort_InputMode ctsMode
Cts pin as input.
Definition: IfxAsclin_Asc.h:316
Ifx_Fifo_init
Ifx_Fifo * Ifx_Fifo_init(void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object.
Definition: Ifx_Fifo.c:91
IfxAsclin_Asc_BaudRate::prescaler
uint16 prescaler
BITCON.PRESCALER, the division ratio of the predevider.
Definition: IfxAsclin_Asc.h:265
IfxAsclin_Asc::sendCount
volatile uint32 sendCount
Number of byte that are send out, this value is reset with the function Asc_If_resetSendCount() ...
Definition: IfxAsclin_Asc.h:349
IfxAsclin_clearAllFlags
IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
clears all the flags
Definition: IfxAsclin.h:1595
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
Ifx_DataBufferMode_timeStampSingle
Single byte type stamp mode. The rx fifo is filled in with Ifx_DataBufferMode_TimeStampSingle items...
Definition: Ifx_Types.h:164
IfxAsclin_Asc_isrTransmit
void IfxAsclin_Asc_isrTransmit(IfxAsclin_Asc *asclin)
ISR transmit routine.
Definition: IfxAsclin_Asc.c:512
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxAsclin_Asc_FrameControl::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Asc.h:297
Ifx_DataBufferMode_TimeStampSingle
Definition: Ifx_Types.h:146
IfxAsclin_Asc_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUFF, receive buffer mode (Rx FIFO or Rx buffer)
Definition: IfxAsclin_Asc.h:285
IfxAsclin_Asc_FifoControl::outWidth
IfxAsclin_RxFifoOutletWidth outWidth
RXFIFOCON.OTW, receive FIFO oulet width.
Definition: IfxAsclin_Asc.h:282
IfxAsclin_Asc_Config::interrupt
IfxAsclin_Asc_InterruptConfig interrupt
structure for interrupt configuration
Definition: IfxAsclin_Asc.h:362
IfxStdIf_DPipe_::getSendCount
IfxStdIf_DPipe_GetSendCount getSendCount
Definition: IfxStdIf_DPipe.h:251
IfxStdIf_DPipe_::canReadCount
IfxStdIf_DPipe_CanReadCount canReadCount
Definition: IfxStdIf_DPipe.h:242
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxAsclin_Asc::errorFlags
IfxAsclin_Asc_ErrorFlagsUnion errorFlags
error reported by ASCLIN during runtime (written by IfxAsclin_Asc_isrError)
Definition: IfxAsclin_Asc.h:347
IfxStdIf_DPipe_CanWriteCount
boolean(* IfxStdIf_DPipe_CanWriteCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: IfxStdIf_DPipe.h:174
IfxStdIf_DPipe_::write
IfxStdIf_DPipe_Write write
Definition: IfxStdIf_DPipe.h:236
IfxAsclin_clearRxFifoUnderflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO underflow flag.
Definition: IfxAsclin.h:1685
IfxAsclin_setParityType
IFX_INLINE void IfxAsclin_setParityType(Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
Sets the parity type.
Definition: IfxAsclin.h:2330
TIME_NULL
#define TIME_NULL
Definition: Ifx_Types.h:78
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxAsclin_enableRxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO level flag.
Definition: IfxAsclin.h:1841
IfxAsclin_setBitTiming
boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing.
Definition: IfxAsclin.c:259
IfxAsclin_setRxFifoOutletWidth
IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width.
Definition: IfxAsclin.h:2360
IfxAsclin_Asc_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Asc.h:323
IfxAsclin_enableParityErrorFlag
IFX_INLINE void IfxAsclin_enableParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables parity error flag.
Definition: IfxAsclin.h:1823
IfxAsclin_Asc_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Asc.h:308
Ifx_Fifo_read
Ifx_SizeT Ifx_Fifo_read(Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer.
Definition: Ifx_Fifo.c:208
IfxAsclin_Asc_BaudRate::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, division ratio of the baudrate post devider.
Definition: IfxAsclin_Asc.h:266
IfxAsclin_enableTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_enableTxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO overflow flag.
Definition: IfxAsclin.h:1895
IfxAsclin_Asc::txInProgress
volatile boolean txInProgress
Ongoing transfer. Will be set by IfxAsclin_Asc_initiateTransmission, and cleared by IfxAsclin_Asc_isr...
Definition: IfxAsclin_Asc.h:345
IfxAsclin_getSrcPointerTx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx.
Definition: IfxAsclin.c:180
IfxAsclin_Asc_Config::loopBack
boolean loopBack
IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
Definition: IfxAsclin_Asc.h:378
IfxAsclin_clearParityErrorFlag
IFX_INLINE void IfxAsclin_clearParityErrorFlag(Ifx_ASCLIN *asclin)
Clears the parity error flag.
Definition: IfxAsclin.h:1655
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxStdIf_DPipe_GetWriteEvent
IfxStdIf_DPipe_WriteEvent(* IfxStdIf_DPipe_GetWriteEvent)(IfxStdIf_InterfaceDriver stdIf)
Returns write event object.
Definition: IfxStdIf_DPipe.h:152
IfxAsclin_Asc_FrameControl::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module.
Definition: IfxAsclin_Asc.h:294
Ifx_Fifo_canWriteCount
boolean Ifx_Fifo_canWriteCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: Ifx_Fifo.c:296
IfxAsclin_Status_noError
No error.
Definition: IfxAsclin.h:385
IfxStdIf_DPipe_GetReadEvent
IfxStdIf_DPipe_ReadEvent(* IfxStdIf_DPipe_GetReadEvent)(IfxStdIf_InterfaceDriver stdIf)
Returns read event object.
Definition: IfxStdIf_DPipe.h:120
IfxAsclin_RxFifoOutletWidth_1
number of bytes 1
Definition: IfxAsclin.h:300
IfxStdIf_DPipe_::flushTx
IfxStdIf_DPipe_FlushTx flushTx
Definition: IfxStdIf_DPipe.h:244
IfxStm_now
IFX_INLINE sint64 IfxStm_now(void)
Returns the STM counter value.
Definition: IfxStm.h:733
IfxAsclin_Asc_Pins::rts
IFX_CONST IfxAsclin_Rts_Out * rts
ASC (request to send) RTS pin.
Definition: IfxAsclin_Asc.h:319
IfxAsclin_enableFrameErrorFlag
IFX_INLINE void IfxAsclin_enableFrameErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables frame error flag.
Definition: IfxAsclin.h:1775
IfxAsclin_clearRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag.
Definition: IfxAsclin.h:1679
_Fifo::eventWriter
volatile boolean eventWriter
event set by the reader to signal the writer that the required free space are available in the buffer...
Definition: Ifx_Fifo.h:79
IfxStm_isDeadLine
IFX_INLINE boolean IfxStm_isDeadLine(sint64 deadLine)
Checked if deadline has occured.
Definition: IfxStm.h:763
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin_setRxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2354
IfxAsclin_Asc_FifoControl::rxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel
RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
Definition: IfxAsclin_Asc.h:284
IfxAsclin_clearFrameErrorFlag
IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin)
Clears the frame error flag.
Definition: IfxAsclin.h:1619
IfxStdIf_DPipe_::onReceive
IfxStdIf_DPipe_OnReceive onReceive
Definition: IfxStdIf_DPipe.h:247
IfxAsclin_Asc_blockingRead
uint8 IfxAsclin_Asc_blockingRead(IfxAsclin_Asc *asclin)
Reads data from the Rx FIFO.
Definition: IfxAsclin_Asc.c:53
IfxAsclin_Asc_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Asc.h:292
IfxAsclin_Rts_Out
RTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:72
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:70
IfxStdIf_DPipe_Write
boolean(* IfxStdIf_DPipe_Write)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:89
IfxAsclin_Asc::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Asc.h:342
IfxAsclin_setPrescaler
IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:2336
IfxAsclin_Asc_Pins::rxMode
IfxPort_InputMode rxMode
Rx pin as input.
Definition: IfxAsclin_Asc.h:318
IfxAsclin_Asc_stdIfDPipeInit
boolean IfxAsclin_Asc_stdIfDPipeInit(IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin)
Initialize the standard interface to the device driver.
Definition: IfxAsclin_Asc.c:580
IfxAsclin_Asc_Pins::txMode
IfxPort_OutputMode txMode
Tx as output.
Definition: IfxAsclin_Asc.h:322
IfxStdIf_DPipe_OnReceive
void(* IfxStdIf_DPipe_OnReceive)(IfxStdIf_InterfaceDriver stdIf)
handler called on reveive event
Definition: IfxStdIf_DPipe.h:205
IfxAsclin_ParityType_even
even parity
Definition: IfxAsclin.h:249
IfxStdIf_DPipe_::driver
IfxStdIf_InterfaceDriver driver
Pointer to the specific driver object.
Definition: IfxStdIf_DPipe.h:232
IfxAsclin_enableRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO overflow flag.
Definition: IfxAsclin.h:1853
Ifx_Fifo_flush
IFX_INLINE boolean Ifx_Fifo_flush(Ifx_Fifo *fifo, Ifx_TickTime timeout)
Empty the fifo.
Definition: Ifx_Fifo.h:186
IfxAsclin_getTxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2081
IfxAsclin_Asc_Config::bitTiming
IfxAsclin_Asc_BitTimingControl bitTiming
structure for bit timings
Definition: IfxAsclin_Asc.h:359
IfxAsclin_Asc_resetSendCount
void IfxAsclin_Asc_resetSendCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:574
IfxAsclin_Asc_Config::pins
IFX_CONST IfxAsclin_Asc_Pins * pins
structure for ASC pins
Definition: IfxAsclin_Asc.h:363
IfxStdIf_DPipe_CanReadCount
boolean(* IfxStdIf_DPipe_CanReadCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer.
Definition: IfxStdIf_DPipe.h:163
IfxAsclin_Asc_BitTimingControl::samplePointPosition
IfxAsclin_SamplePointPosition samplePointPosition
BITCON.SAMPLEPOINT, sample point position.
Definition: IfxAsclin_Asc.h:274
Ifx_Fifo_create
Ifx_Fifo * Ifx_Fifo_create(Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object.
Definition: Ifx_Fifo.c:68
IfxAsclin_Asc_clearRx
void IfxAsclin_Asc_clearRx(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:85
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
Ifx_DataBufferMode_TimeStampSingle::timestamp
Ifx_TickTime timestamp
Definition: Ifx_Types.h:148
IfxAsclin_getSrcPointerRx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx.
Definition: IfxAsclin.c:174
IfxAsclin_Asc_Config
Configuration structure of the module.
Definition: IfxAsclin_Asc.h:355
IfxAsclin_flushRxFifo
IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO.
Definition: IfxAsclin.h:1913
Ifx_Fifo_readCount
IFX_INLINE Ifx_SizeT Ifx_Fifo_readCount(Ifx_Fifo *fifo)
Returns the size of the data in the buffer in bytes.
Definition: Ifx_Fifo.h:203
IfxAsclin_Asc::tx
Ifx_Fifo * tx
Transmit FIFO buffer.
Definition: IfxAsclin_Asc.h:343
IfxStdIf_DPipe_::getReadEvent
IfxStdIf_DPipe_GetReadEvent getReadEvent
Definition: IfxStdIf_DPipe.h:239
Ifx_Fifo_clear
void Ifx_Fifo_clear(Ifx_Fifo *fifo)
Clear fifo contents.
Definition: Ifx_Fifo.c:259
IfxAsclin_Asc_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Asc.h:305
IfxAsclin_Asc_ErrorFlagsUnion::flags
IfxAsclin_Asc_ErrorFlags flags
Definition: IfxAsclin_Asc.h:333
_Fifo::size
Ifx_SizeT size
multiple of 8 bit, max 0xFFF8
Definition: Ifx_Fifo.h:76
IfxAsclin_read8
uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits.
Definition: IfxAsclin.c:214
IfxAsclin_SamplePointPosition_3
sample point position at 3
Definition: IfxAsclin.h:327
IfxAsclin_Asc_canWriteCount
boolean IfxAsclin_Asc_canWriteCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:79
Ifx_Fifo_writeCount
IFX_INLINE Ifx_SizeT Ifx_Fifo_writeCount(Ifx_Fifo *fifo)
Returns the free size in bytes.
Definition: Ifx_Fifo.h:219
IfxStdIf_DPipe_GetWriteCount
sint32(* IfxStdIf_DPipe_GetWriteCount)(IfxStdIf_InterfaceDriver stdIf)
Returns the number of free bytes (free space) in the tx buffer.
Definition: IfxStdIf_DPipe.h:144
IfxAsclin_enableParity
IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits.
Definition: IfxAsclin.h:1817
IfxAsclin_Asc_initModuleConfig
void IfxAsclin_Asc_initModuleConfig(IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values.
Definition: IfxAsclin_Asc.c:349
IfxAsclin_getRxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2027
IfxAsclin_Asc_write
boolean IfxAsclin_Asc_write(IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:609
IfxAsclin_Asc_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Asc.h:295
IfxAsclin_Asc_ErrorFlags::rxFifoUnderflow
uint8 rxFifoUnderflow
receive FIFO underflow error
Definition: IfxAsclin_Asc.h:254
IfxAsclin_Asc_FrameControl::parityType
IfxAsclin_ParityType parityType
FRAMECON.ODD, parity type (even or odd)
Definition: IfxAsclin_Asc.h:296
IfxAsclin_enableRxFifoUnderflowFlag
IFX_INLINE void IfxAsclin_enableRxFifoUnderflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO underflow flag.
Definition: IfxAsclin.h:1859
IfxAsclin_disableAllFlags
IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin)
disables all flags
Definition: IfxAsclin.h:1733
IfxAsclin_Asc_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
ASC Rx pin.
Definition: IfxAsclin_Asc.h:317
IfxAsclin_initTxPin
IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxAsclin.h:2161
IfxAsclin_Asc_flushTx
boolean IfxAsclin_Asc_flushTx(IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:109
IfxAsclin_Asc_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Asc.h:255
IfxAsclin_setTxFifoInletWidth
IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width.
Definition: IfxAsclin.h:2440
IfxAsclin_write8
uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits.
Definition: IfxAsclin.c:404
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxAsclin_Asc_FrameControl::parityBit
boolean parityBit
FRAMECON.PEN, parity enable.
Definition: IfxAsclin_Asc.h:298
IfxAsclin_enableLoopBackMode
IFX_INLINE void IfxAsclin_enableLoopBackMode(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the loop back mode.
Definition: IfxAsclin.h:1811
IfxStdIf_DPipe_::getReadCount
IfxStdIf_DPipe_GetReadCount getReadCount
Definition: IfxStdIf_DPipe.h:238
IfxAsclin_enableTxFifoOutlet
IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission.
Definition: IfxAsclin.h:1889
IfxAsclin_Asc_Pins::rtsMode
IfxPort_OutputMode rtsMode
Rts as output.
Definition: IfxAsclin_Asc.h:320
IfxStdIf_DPipe_FlushTx
boolean(* IfxStdIf_DPipe_FlushTx)(IfxStdIf_InterfaceDriver stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data.
Definition: IfxStdIf_DPipe.h:183
IfxStdIf_DPipe_::clearRx
IfxStdIf_DPipe_ClearRx clearRx
Definition: IfxStdIf_DPipe.h:246
IfxAsclin_setFrameMode
IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module&#39;s mode of operation.
Definition: IfxAsclin.h:2252
IfxAsclin_getRxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status.
Definition: IfxAsclin.h:2045
IfxAsclin_Asc_ErrorFlagsUnion::ALL
uint8 ALL
Definition: IfxAsclin_Asc.h:332
IfxAsclin_Asc_InterruptConfig::erPriority
uint16 erPriority
error interrupt priority
Definition: IfxAsclin_Asc.h:307
TIME_INFINITE
#define TIME_INFINITE
Definition: Ifx_Types.h:77
IfxAsclin_Asc_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
ASC Tx pin.
Definition: IfxAsclin_Asc.h:321
IfxAsclin_Asc_clearTx
void IfxAsclin_Asc_clearTx(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:92
IfxAsclin_Asc_blockingWrite
boolean IfxAsclin_Asc_blockingWrite(IfxAsclin_Asc *asclin, uint8 data)
Writes data into the Tx FIFO.
Definition: IfxAsclin_Asc.c:65
IfxAsclin_Asc_Config::txBuffer
void * txBuffer
The buffer parameter must point on a free memory location where the buffer object will be Initialised...
Definition: IfxAsclin_Asc.h:367
IfxAsclin_initRtsPin
IFX_INLINE void IfxAsclin_initRtsPin(const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a RTS output.
Definition: IfxAsclin.h:2129
IfxAsclin_StopBit_1
number of stop bits 1
Definition: IfxAsclin.h:394
IfxAsclin_Asc_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Asc.h:306
IfxAsclin_ClockSource_kernelClock
f clc will be supplied
Definition: IfxAsclin.h:112
IfxStdIf_DPipe_Read
boolean(* IfxStdIf_DPipe_Read)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object.
Definition: IfxStdIf_DPipe.h:104
sint32
long sint32
Definition: Platform_Types.h:134
IfxStdIf_DPipe_WriteEvent
volatile boolean * IfxStdIf_DPipe_WriteEvent
Definition: IfxStdIf_DPipe.h:70
Ifx_Fifo_isEmpty
IFX_INLINE boolean Ifx_Fifo_isEmpty(Ifx_Fifo *fifo)
Indicates if the fifo is empty.
Definition: Ifx_Fifo.h:232
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxStdIf_DPipe_GetReadCount
sint32(* IfxStdIf_DPipe_GetReadCount)(IfxStdIf_InterfaceDriver stdIf)
Returns the number of bytes in the rx buffer.
Definition: IfxStdIf_DPipe.h:112
IfxAsclin_Asc::txTimestamp
volatile Ifx_TickTime txTimestamp
Time stamp of the latest send byte.
Definition: IfxAsclin_Asc.h:350
IfxAsclin_enableRxFifoInlet
IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register...
Definition: IfxAsclin.h:1847
IfxStdIf_DPipe_GetTxTimeStamp
Ifx_TickTime(* IfxStdIf_DPipe_GetTxTimeStamp)(IfxStdIf_InterfaceDriver stdIf)
Returns the time stamp of the last transmit data.
Definition: IfxStdIf_DPipe.h:136
IfxAsclin_Asc_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Asc.h:293
IfxAsclin_ClockSource_noClock
no clock will be supplied
Definition: IfxAsclin.h:111
IfxStdIf_DPipe_ClearTx
void(* IfxStdIf_DPipe_ClearTx)(IfxStdIf_InterfaceDriver stdIf)
Clears the TX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:197
IfxAsclin_FrameMode_asc
asc mode
Definition: IfxAsclin.h:159
IfxStdIf_DPipe_OnError
void(* IfxStdIf_DPipe_OnError)(IfxStdIf_InterfaceDriver stdIf)
handler called on error event
Definition: IfxStdIf_DPipe.h:219
IfxAsclin_Asc_Config::txBufferSize
Ifx_SizeT txBufferSize
Size of the tx buffer.
Definition: IfxAsclin_Asc.h:366
IfxAsclin_Asc_Pins
Structure for ASC pin configuration.
Definition: IfxAsclin_Asc.h:313
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxAsclin_TxFifoInletWidth_1
number of bytes 1
Definition: IfxAsclin.h:418
IfxAsclin_Asc::rxSwFifoOverflow
volatile boolean rxSwFifoOverflow
Will be set by IfxAsclin_Asc_isrReceive if the SW Fifo overflowed.
Definition: IfxAsclin_Asc.h:346
IfxAsclin_Asc_read
boolean IfxAsclin_Asc_read(IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:564
IfxAsclin_FrameMode_initialise
initialise mode
Definition: IfxAsclin.h:158
IfxAsclin_DataLength_8
number of bits per transfer 7
Definition: IfxAsclin.h:142
IfxAsclin_OversamplingFactor_4
oversampling factor 4
Definition: IfxAsclin.h:229
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxAsclin_SamplesPerBit_one
one sample per bit
Definition: IfxAsclin.h:347
IfxStdIf_DPipe_::clearTx
IfxStdIf_DPipe_ClearTx clearTx
Definition: IfxStdIf_DPipe.h:245
IfxAsclin_Asc::rx
Ifx_Fifo * rx
Receive FIFO buffer.
Definition: IfxAsclin_Asc.h:344
IfxAsclin_setStopBit
IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits.
Definition: IfxAsclin.h:2405
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxAsclin_Asc_ErrorFlags::frameError
uint8 frameError
transmit complete/pending error
Definition: IfxAsclin_Asc.h:252
IfxAsclin_setShiftDirection
IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction.
Definition: IfxAsclin.h:2384
IfxAsclin_getFrameErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the frame error flag status.
Definition: IfxAsclin.h:1955
IfxAsclin_setDisableModuleRequest
IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
Sets the disable module request.
Definition: IfxAsclin.h:2234
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxStdIf_DPipe_ReadEvent
volatile boolean * IfxStdIf_DPipe_ReadEvent
Definition: IfxStdIf_DPipe.h:71
IfxAsclin_enableTxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO level flag.
Definition: IfxAsclin.h:1883
IfxAsclin_Asc_disableModule
void IfxAsclin_Asc_disableModule(IfxAsclin_Asc *asclin)
Disables the module.
Definition: IfxAsclin_Asc.c:99
IfxAsclin_Asc_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Asc.h:253
IfxAsclin_clearTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag.
Definition: IfxAsclin.h:1715
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:382
IfxAsclin_setDataLength
IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer)
Definition: IfxAsclin.h:2222
IfxStdIf_DPipe_ClearRx
void(* IfxStdIf_DPipe_ClearRx)(IfxStdIf_InterfaceDriver stdIf)
Clears the RX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:190
IfxAsclin_getParityErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getParityErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the parity error flag status.
Definition: IfxAsclin.h:1997
IfxAsclin_setClockSource
void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source.
Definition: IfxAsclin.c:358
IfxAsclin_setTxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2446
IfxAsclin_Asc::dataBufferMode
Ifx_DataBufferMode dataBufferMode
Rx buffer mode.
Definition: IfxAsclin_Asc.h:348
IfxAsclin_Asc_canReadCount
boolean IfxAsclin_Asc_canReadCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:73


iLLD_TC26B: IfxAsclin_Asc.h Source File

  • Asclin
  • Asc
IfxAsclin_Asc.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_Asc.h
3 * \brief ASCLIN ASC details
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Asclin_Asc_Usage How to use the ASCLIN ASC Interface driver?
42 * \ingroup IfxLld_Asclin
43 *
44 * The ASC interface driver provides a default ASCLIN configuration for asynchronous serial communication in 8bit mode, and a set of data transfer routines.
45 *
46 * Data transfers are buffered by the hardware based FIFOs, and in addition by software based FIFOs with a configurable size. Incoming and outgoing data is transfered in background from/to the ASCLIN peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.
47 *
48 * In the following sections it will be described, how to integrate the driver into the application framework.
49 *
50 * \section IfxLld_Asclin_Asc_Preparation Preparation
51 * \subsection IfxLld_Asclin_Asc_Include Include Files
52 *
53 * Include following header file into your C code:
54 * \code
55 * #include <Asclin/Asc/IfxAsclin_Asc.h>
56 * \endcode
57 *
58 * \subsection IfxLld_Asclin_Asc_Variables Variables
59 *
60 * Declare the ASC handle and the FIFOs as global variables in your C code:
61 *
62 * \code
63 * // used globally
64 * static IfxAsclin_Asc asc;
65 *
66 * #define ASC_TX_BUFFER_SIZE 64
67 * static uint8 ascTxBuffer[ASC_TX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
68 *
69 * #define ASC_RX_BUFFER_SIZE 64
70 * static uint8 ascRxBuffer[ASC_RX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
71 * \endcode
72 *
73 * As you can see above, the transfer buffers allocate not only memory for the data itself, but also for FIFO runtime variables. 8 bytes have to be added to ensure a proper circular buffer handling independent from the address to which the buffers have been located.
74 *
75 * \subsection IfxLld_Asclin_Asc_Interrupt Interrupt Handler Installation
76 *
77 * See also \ref IfxLld_Cpu_Irq_Usage
78 *
79 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
80 * \code
81 * // priorities are normally defined in Ifx_IntPrioDef.h
82 * #define IFX_INTPRIO_ASCLIN0_TX 1
83 * #define IFX_INTPRIO_ASCLIN0_RX 2
84 * #define IFX_INTPRIO_ASCLIN0_ER 3
85 * \endcode
86 *
87 * Add the interrupt service routines to your C code. They have to call the ASC interrupt handlers by passing the asc handle:
88 * \code
89 * IFX_INTERRUPT(asclin0TxISR, 0, IFX_INTPRIO_ASCLIN0_TX)
90 * {
91 * IfxAsclin_Asc_isrTransmit(&asc);
92 * }
93 *
94 * IFX_INTERRUPT(asclin0RxISR, 0, IFX_INTPRIO_ASCLIN0_RX)
95 * {
96 * IfxAsclin_Asc_isrReceive(&asc);
97 * }
98 *
99 * IFX_INTERRUPT(asclin0ErISR, 0, IFX_INTPRIO_ASCLIN0_ER)
100 * {
101 * IfxAsclin_Asc_isrError(&asc);
102 * }
103 * \endcode
104 *
105 * Finally install the interrupt handlers in your initialisation function:
106 * \code
107 * // install interrupt handlers
108 * IfxCpu_Irq_installInterruptHandler(&asclin0TxISR, IFX_INTPRIO_ASCLIN0_TX);
109 * IfxCpu_Irq_installInterruptHandler(&asclin0RxISR, IFX_INTPRIO_ASCLIN0_RX);
110 * IfxCpu_Irq_installInterruptHandler(&asclin0ErISR, IFX_INTPRIO_ASCLIN0_ER);
111 * IfxCpu_enableInterrupts();
112 * \endcode
113 *
114 * \subsection IfxLld_Asclin_Asc_Init Module Initialisation
115 *
116 * The module initialisation can be done in the same function. Here an example:
117 * \code
118 * // create module config
119 * IfxAsclin_Asc_Config ascConfig;
120 * IfxAsclin_Asc_initModuleConfig(&ascConfig, &MODULE_ASCLIN0);
121 *
122 * // set the desired baudrate
123 * ascConfig.baudrate.prescaler = 1;
124 * ascConfig.baudrate.baudrate = 1000000; // FDR values will be calculated in initModule
125 *
126 * // ISR priorities and interrupt target
127 * ascConfig.interrupt.txPriority = IFX_INTPRIO_ASCLIN0_TX;
128 * ascConfig.interrupt.rxPriority = IFX_INTPRIO_ASCLIN0_RX;
129 * ascConfig.interrupt.erPriority = IFX_INTPRIO_ASCLIN0_ER;
130 * ascConfig.interrupt.typeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
131 *
132 * // FIFO configuration
133 * ascConfig.txBuffer = &ascTxBuffer;
134 * ascConfig.txBufferSize = ASC_TX_BUFFER_SIZE;
135 *
136 * ascConfig.rxBuffer = &ascRxBuffer;
137 * ascConfig.rxBufferSize = ASC_RX_BUFFER_SIZE;
138 *
139 * // pin configuration
140 * const IfxAsclin_Asc_Pins pins = {
141 * NULL, IfxPort_InputMode_pullUp, // CTS pin not used
142 * &IfxAsclin0_RXA_P14_1_IN, IfxPort_InputMode_pullUp, // Rx pin
143 * NULL, IfxPort_OutputMode_pushPull, // RTS pin not used
144 * &IfxAsclin0_TX_P14_0_OUT, IfxPort_OutputMode_pushPull, // Tx pin
145 * IfxPort_PadDriver_cmosAutomotiveSpeed1
146 * };
147 * ascConfig.pins = &pins;
148 *
149 * // initialize module
150 * //IfxAsclin_Asc asc; // defined globally
151 * IfxAsclin_Asc_initModule(&asc, &ascConfig);
152 * \endcode
153 *
154 * The ASC is ready for use now!
155 *
156 *
157 * \section IfxLld_Asclin_Asc_DataTransfers Data Transfers
158 *
159 * \subsection IfxLld_Asclin_Asc_DataSimple Simple Transfers
160 *
161 * The ASC driver provides simple to use transfer functions, which are blocking.
162 *
163 * This means: you can send as much data as you want without taking care for the fill state of the FIFO. If the FIFO is full, the blocking function will wait until the next byte has been transfered to ASCLIN before putting the new byte into the FIFO:
164 * \code
165 * // send 3 bytes
166 * IfxAsclin_Asc_blockingWrite(&asc, 0x01);
167 * IfxAsclin_Asc_blockingWrite(&asc, 0x02);
168 * IfxAsclin_Asc_blockingWrite(&asc, 0x03);
169 * \endcode
170 *
171 * A simple to use receive function is available as well. If no data is in the receive FIFO, it will wait until the next byte has been received:
172 * \code
173 * // receive a byte
174 * uint8 data = IfxAsclin_Asc_blockingRead(&asc);
175 * \endcode
176 *
177 *
178 * \subsection IfxLld_Asclin_Asc_DataStream Streamed Transfers
179 *
180 * Streamed transfers are handled faster by the ASC driver and therefore they are recommended whenever a large bulk of data should be sent. Here an example:
181 * \code
182 * uint8 txData[9] = { 0x49, 0x6e, 0x66, 0x69, 0x6e, 0x65, 0x6f, 0x6e, 0x0a };
183 * {
184 * Ifx_SizeT count = 9;
185 * IfxAsclin_Asc_write(&asc, txData, &count, TIME_INFINITE);
186 * }
187 * \endcode
188 *
189 *
190 * Data can be received the following way:
191 * \code
192 * uint8 rxData[5];
193 *
194 * {
195 * // wait until 5 bytes have been received
196 * Ifx_SizeT count = 5;
197 * IfxAsclin_Asc_read(&asc, rxData, &count, TIME_INFINITE);
198 * }
199 * \endcode
200 *
201 * Or alternatively with:
202 * \code
203 * uint8 rxData[5];
204 *
205 * {
206 * // how many bytes have been received?
207 * Ifx_SizeT count = IfxAsclin_Asc_getReadCount(&asc);
208 *
209 * // limit to our buffer size
210 * count = count < 5 ? count : 5;
211 *
212 * // transfer received data into buffer
213 * IfxAsclin_Asc_read(&asc, rxData, &count, TIME_INFINITE);
214 * }
215 * \endcode
216 *
217 * \defgroup IfxLld_Asclin_Asc ASC
218 * \ingroup IfxLld_Asclin
219 * \defgroup IfxLld_Asclin_Asc_DataStructures Data Structures
220 * \ingroup IfxLld_Asclin_Asc
221 * \defgroup IfxLld_Asclin_Asc_InterruptFunctions Interrupt Functions
222 * \ingroup IfxLld_Asclin_Asc
223 * \defgroup IfxLld_Asclin_Asc_SimpleCom Simple Communication
224 * \ingroup IfxLld_Asclin_Asc
225 * \defgroup IfxLld_Asclin_Asc_StreamCom Stream based Communication (STDIO)
226 * \ingroup IfxLld_Asclin_Asc
227 * \defgroup IfxLld_Asclin_Asc_ModuleFunctions Module Functions
228 * \ingroup IfxLld_Asclin_Asc
229 */
230
231 #ifndef IFXASCLIN_ASC_H
232 #define IFXASCLIN_ASC_H 1
233
234 /******************************************************************************/
235 /*----------------------------------Includes----------------------------------*/
236 /******************************************************************************/
237
238 #include "Asclin/Std/IfxAsclin.h"
239 #include "_Lib/DataHandling/Ifx_Fifo.h"
240 #include "Stm/Std/IfxStm.h"
241 #include "StdIf/IfxStdIf_DPipe.h"
242
243 /******************************************************************************/
244 /*-----------------------------Data Structures--------------------------------*/
245 /******************************************************************************/
246
247 /** \brief Structure for Error Flags
248 */
249 typedef struct
250 {
251 uint8 parityError : 1; /**< \brief parity error */
252 uint8 frameError : 1; /**< \brief transmit complete/pending error */
253 uint8 rxFifoOverflow : 1; /**< \brief receive FIFO overflow error */
254 uint8 rxFifoUnderflow : 1; /**< \brief receive FIFO underflow error */
255 uint8 txFifoOverflow : 1; /**< \brief transmit FIFO overflow error */
256 } IfxAsclin_Asc_ErrorFlags;
257
258 /** \addtogroup IfxLld_Asclin_Asc_DataStructures
259 * \{ */
260 /** \brief Structure for baudrate
261 */
262 typedef struct
263 {
264 float32 baudrate; /**< \brief value of the required baudrate */
265 uint16 prescaler; /**< \brief BITCON.PRESCALER, the division ratio of the predevider */
266 IfxAsclin_OversamplingFactor oversampling; /**< \brief BITCON.OVERSAMPLING, division ratio of the baudrate post devider */
267 } IfxAsclin_Asc_BaudRate;
268
269 /** \brief Structure for bit timings
270 */
271 typedef struct
272 {
273 IfxAsclin_SamplesPerBit medianFilter; /**< \brief BITCON.SM, number of samples per bit (1 or 3), sample mode/median filter */
274 IfxAsclin_SamplePointPosition samplePointPosition; /**< \brief BITCON.SAMPLEPOINT, sample point position */
275 } IfxAsclin_Asc_BitTimingControl;
276
277 /** \brief Structure for FIFO control
278 */
279 typedef struct
280 {
281 IfxAsclin_TxFifoInletWidth inWidth; /**< \brief TXFIFOCON.INW, transmit FIFO inlet width */
282 IfxAsclin_RxFifoOutletWidth outWidth; /**< \brief RXFIFOCON.OTW, receive FIFO oulet width */
283 IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel; /**< \brief TXFIFOCON.INTLEVEL, Tx FIFO interrupt level */
284 IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel; /**< \brief RXFIFOCON.INTLEVEL, Rx FIFO interrupt level */
285 IfxAsclin_ReceiveBufferMode buffMode; /**< \brief RXFIFOCON.BUFF, receive buffer mode (Rx FIFO or Rx buffer) */
286 } IfxAsclin_Asc_FifoControl;
287
288 /** \brief Structure for frame control
289 */
290 typedef struct
291 {
292 IfxAsclin_IdleDelay idleDelay; /**< \brief FRAMECON.IDLE, idle delay */
293 IfxAsclin_StopBit stopBit; /**< \brief FRAMECON.STOP, number of stop bits */
294 IfxAsclin_FrameMode frameMode; /**< \brief FRAMECON.MODE, mode of operation of the module */
295 IfxAsclin_ShiftDirection shiftDir; /**< \brief FRAMECON.MSB, shift direction */
296 IfxAsclin_ParityType parityType; /**< \brief FRAMECON.ODD, parity type (even or odd) */
297 IfxAsclin_DataLength dataLength; /**< \brief DATCON.DATALENGTH, data length, number of bits per transfer */
298 boolean parityBit; /**< \brief FRAMECON.PEN, parity enable */
299 } IfxAsclin_Asc_FrameControl;
300
301 /** \brief Structure for interrupt configuration
302 */
303 typedef struct
304 {
305 uint16 txPriority; /**< \brief transmit interrupt priority */
306 uint16 rxPriority; /**< \brief receive interrupt priority */
307 uint16 erPriority; /**< \brief error interrupt priority */
308 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
309 } IfxAsclin_Asc_InterruptConfig;
310
311 /** \brief Structure for ASC pin configuration
312 */
313 typedef struct
314 {
315 IFX_CONST IfxAsclin_Cts_In *cts; /**< \brief ASC clear to send (CTS) pin */
316 IfxPort_InputMode ctsMode; /**< \brief Cts pin as input */
317 IFX_CONST IfxAsclin_Rx_In *rx; /**< \brief ASC Rx pin */
318 IfxPort_InputMode rxMode; /**< \brief Rx pin as input */
319 IFX_CONST IfxAsclin_Rts_Out *rts; /**< \brief ASC (request to send) RTS pin */
320 IfxPort_OutputMode rtsMode; /**< \brief Rts as output */
321 IFX_CONST IfxAsclin_Tx_Out *tx; /**< \brief ASC Tx pin */
322 IfxPort_OutputMode txMode; /**< \brief Tx as output */
323 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
324 } IfxAsclin_Asc_Pins;
325
326 /** \} */
327
328 /** \brief This union contains the error flags. In addition it allows to write and read to/from all flags as once via the ALL member.
329 */
330 typedef union
331 {
332 uint8 ALL;
333 IfxAsclin_Asc_ErrorFlags flags;
334 } IfxAsclin_Asc_ErrorFlagsUnion;
335
336 /** \addtogroup IfxLld_Asclin_Asc_DataStructures
337 * \{ */
338 /** \brief Module Handle
339 */
340 typedef struct
341 {
342 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
343 Ifx_Fifo *tx; /**< \brief Transmit FIFO buffer */
344 Ifx_Fifo *rx; /**< \brief Receive FIFO buffer */
345 volatile boolean txInProgress; /**< \brief Ongoing transfer. Will be set by IfxAsclin_Asc_initiateTransmission, and cleared by IfxAsclin_Asc_isrTransmit */
346 volatile boolean rxSwFifoOverflow; /**< \brief Will be set by IfxAsclin_Asc_isrReceive if the SW Fifo overflowed */
347 IfxAsclin_Asc_ErrorFlagsUnion errorFlags; /**< \brief error reported by ASCLIN during runtime (written by IfxAsclin_Asc_isrError) */
348 Ifx_DataBufferMode dataBufferMode; /**< \brief Rx buffer mode */
349 volatile uint32 sendCount; /**< \brief Number of byte that are send out, this value is reset with the function Asc_If_resetSendCount() */
350 volatile Ifx_TickTime txTimestamp; /**< \brief Time stamp of the latest send byte */
351 } IfxAsclin_Asc;
352
353 /** \brief Configuration structure of the module
354 */
355 typedef struct
356 {
357 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
358 IfxAsclin_Asc_BaudRate baudrate; /**< \brief structure for baudrate */
359 IfxAsclin_Asc_BitTimingControl bitTiming; /**< \brief structure for bit timings */
360 IfxAsclin_Asc_FrameControl frame; /**< \brief structure for frame control */
361 IfxAsclin_Asc_FifoControl fifo; /**< \brief structure for FIFO control */
362 IfxAsclin_Asc_InterruptConfig interrupt; /**< \brief structure for interrupt configuration */
363 IFX_CONST IfxAsclin_Asc_Pins *pins; /**< \brief structure for ASC pins */
364 IfxAsclin_ClockSource clockSource; /**< \brief CSR.CLKSEL, clock source selection */
365 IfxAsclin_Asc_ErrorFlagsUnion errorFlags; /**< \brief structure for error flags */
366 Ifx_SizeT txBufferSize; /**< \brief Size of the tx buffer */
367 void *txBuffer; /**< \brief The buffer parameter must point on a free memory location where the buffer object will be Initialised.
368 *
369 * The Size of this area must be at least equals to "txBufferSize + sizeof(Ifx_Fifo) + 8". Not tacking this in account may result in unpredictable behavior.
370 *
371 * If set to NULL_PTR, the buffer will be allocated dynamically according to txBufferSize */
372 Ifx_SizeT rxBufferSize; /**< \brief Size of the rx buffer */
373 void *rxBuffer; /**< \brief The buffer parameter must point on a free memory location where the buffer object will be Initialised.
374 *
375 * The Size of this area must be at least equals to "rxBufferSize + sizeof(Ifx_Fifo) + 8". Not tacking this in account may result in unpredictable behavior.
376 *
377 * If set to NULL, the buffer will be allocated dynamically according to rxBufferSize */
378 boolean loopBack; /**< \brief IOCR.LB, loop back mode selection, 0 for disable, 1 for enable */
379 Ifx_DataBufferMode dataBufferMode; /**< \brief Rx buffer mode */
380 } IfxAsclin_Asc_Config;
381
382 /** \} */
383
384 /** \addtogroup IfxLld_Asclin_Asc_InterruptFunctions
385 * \{ */
386
387 /******************************************************************************/
388 /*-------------------------Global Function Prototypes-------------------------*/
389 /******************************************************************************/
390
391 /** \brief ISR error routine.
392 * \see IfxSdtIf_DPipe_OnError
393 *
394 * Currently it only stores error flags in the handle (asclin->errorFlags) whenever an error happened.
395 * The user software could react on these flags, e.g. it could re-initialize the module.
396 * \param asclin module handler
397 * \return None
398 */
399 IFX_EXTERN void IfxAsclin_Asc_isrError(IfxAsclin_Asc *asclin);
400
401 /** \brief ISR receive routine
402 * \see IfxSdtIf_DPipe_OnReceive
403 * \param asclin module handler
404 * \return None
405 */
406 IFX_EXTERN void IfxAsclin_Asc_isrReceive(IfxAsclin_Asc *asclin);
407
408 /** \brief ISR transmit routine
409 * \see IfxSdtIf_DPipe_OnTransmit
410 * \param asclin module handler
411 * \return None
412 */
413 IFX_EXTERN void IfxAsclin_Asc_isrTransmit(IfxAsclin_Asc *asclin);
414
415 /** \} */
416
417 /** \addtogroup IfxLld_Asclin_Asc_SimpleCom
418 * \{ */
419
420 /******************************************************************************/
421 /*-------------------------Global Function Prototypes-------------------------*/
422 /******************************************************************************/
423
424 /** \brief Reads data from the Rx FIFO
425 * \param asclin module handle
426 * \return number of received data words
427 *
428 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
429 *
430 */
431 IFX_EXTERN uint8 IfxAsclin_Asc_blockingRead(IfxAsclin_Asc *asclin);
432
433 /** \brief Writes data into the Tx FIFO
434 * \param asclin module handle
435 * \param data the data byte which should be sent
436 * \return Returns TRUE if data could be written
437 *
438 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
439 *
440 */
441 IFX_EXTERN boolean IfxAsclin_Asc_blockingWrite(IfxAsclin_Asc *asclin, uint8 data);
442
443 /** \} */
444
445 /** \addtogroup IfxLld_Asclin_Asc_StreamCom
446 * \{ */
447
448 /******************************************************************************/
449 /*-------------------------Global Function Prototypes-------------------------*/
450 /******************************************************************************/
451
452 /** \brief \see IfxStdIf_DPipe_CanReadCount
453 * \param asclin module handle
454 * \param count Count of data which should be checked (in bytes)
455 * \param timeout in system timer ticks
456 * \return Returns TRUE if at least count bytes are available for read in the rx buffer, if not the Event is armed to be set when the buffer count is bigger or equal to the requested count.
457 */
458 IFX_EXTERN boolean IfxAsclin_Asc_canReadCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout);
459
460 /** \brief \see IfxStdIf_DPipe_CanWriteCount
461 * \param asclin module handle
462 * \param count Count of data which should be checked (in bytes)
463 * \param timeout in system timer ticks
464 * \return Returns TRUE if at least count bytes can be written to the tx buffer, if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count
465 */
466 IFX_EXTERN boolean IfxAsclin_Asc_canWriteCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout);
467
468 /** \brief \see IfxStdIf_DPipe_ClearRx
469 * \param asclin module handle
470 * \return None
471 */
472 IFX_EXTERN void IfxAsclin_Asc_clearRx(IfxAsclin_Asc *asclin);
473
474 /** \brief \see IfxStdIf_DPipe_ClearTx
475 * \param asclin module handle
476 * \return None
477 */
478 IFX_EXTERN void IfxAsclin_Asc_clearTx(IfxAsclin_Asc *asclin);
479
480 /** \brief \see IfxStdIf_DPipe_FlushTx
481 * \param asclin module handle
482 * \param timeout in system timer ticks
483 * \return Returns TRUE if the FIFO is empty
484 */
485 IFX_EXTERN boolean IfxAsclin_Asc_flushTx(IfxAsclin_Asc *asclin, Ifx_TickTime timeout);
486
487 /** \brief \see IfxStdIf_DPipe_GetReadCount
488 * \param asclin module handle
489 * \return The number of bytes in the rx buffer
490 */
491 IFX_EXTERN sint32 IfxAsclin_Asc_getReadCount(IfxAsclin_Asc *asclin);
492
493 /** \brief \see IIfxStdIf_DPipe_GetReadEvent
494 * \param asclin module handle
495 * \return Read event object
496 */
497 IFX_EXTERN IfxStdIf_DPipe_ReadEvent IfxAsclin_Asc_getReadEvent(IfxAsclin_Asc *asclin);
498
499 /** \brief \see IfxStdIf_DPipe_GetSendCount
500 * \param asclin module handle
501 * \return number of bytes send
502 */
503 IFX_EXTERN uint32 IfxAsclin_Asc_getSendCount(IfxAsclin_Asc *asclin);
504
505 /** \brief \see IfxStdIf_DPipe_GetTxTimeStamp
506 * \param asclin module handle
507 * \return Time in ticks
508 */
509 IFX_EXTERN Ifx_TickTime IfxAsclin_Asc_getTxTimeStamp(IfxAsclin_Asc *asclin);
510
511 /** \brief \see IfxStdIf_DPipe_GetWriteCount
512 * \param asclin module handle
513 * \return The number of free bytes in the tx buffer
514 */
515 IFX_EXTERN sint32 IfxAsclin_Asc_getWriteCount(IfxAsclin_Asc *asclin);
516
517 /** \brief \see IIfxStdIf_DPipe_GetWriteEvent
518 * \param asclin module handle
519 * \return Write event object
520 */
521 IFX_EXTERN IfxStdIf_DPipe_WriteEvent IfxAsclin_Asc_getWriteEvent(IfxAsclin_Asc *asclin);
522
523 /** \brief \see IfxStdIf_DPipe_Read
524 * \param asclin module handle
525 * \param data Pointer to the start of data
526 * \param count Pointer to the count of data (in bytes).
527 * \param timeout in system timer ticks
528 * \return Returns TRUE if all items could be read\n
529 * Returns FALSE if not all the items could be read
530 *
531 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
532 *
533 */
534 IFX_EXTERN boolean IfxAsclin_Asc_read(IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout);
535
536 /** \brief \see IfxStdIf_DPipe_ResetSendCount
537 * \param asclin module handle
538 * \return None
539 */
540 IFX_EXTERN void IfxAsclin_Asc_resetSendCount(IfxAsclin_Asc *asclin);
541
542 /** \brief \see IfxStdIf_DPipe_Write
543 * \param asclin module handle
544 * \param data Pointer to the start of data
545 * \param count Pointer to the count of data (in bytes).
546 * \param timeout in system timer ticks
547 * \return Returns TRUE if all items could be written\n
548 * Returns FALSE if not all the items could be written
549 *
550 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
551 *
552 */
553 IFX_EXTERN boolean IfxAsclin_Asc_write(IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout);
554
555 /** \} */
556
557 /** \addtogroup IfxLld_Asclin_Asc_ModuleFunctions
558 * \{ */
559
560 /******************************************************************************/
561 /*-------------------------Global Function Prototypes-------------------------*/
562 /******************************************************************************/
563
564 /** \brief Disables the module
565 * \param asclin module handle
566 * \return None
567 */
568 IFX_EXTERN void IfxAsclin_Asc_disableModule(IfxAsclin_Asc *asclin);
569
570 /** \brief Initialises the module
571 * \param asclin module handle
572 * \param config predefined configuration structure of the module
573 * \return Status
574 *
575 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
576 *
577 */
578 IFX_EXTERN IfxAsclin_Status IfxAsclin_Asc_initModule(IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config);
579
580 /** \brief Fills the config structure with default values
581 * \param config configuration structure of the module
582 * \param asclin pointer to ASCLIN registers
583 * \return None
584 *
585 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
586 *
587 */
588 IFX_EXTERN void IfxAsclin_Asc_initModuleConfig(IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin);
589
590 /** \} */
591
592 /******************************************************************************/
593 /*-------------------------Global Function Prototypes-------------------------*/
594 /******************************************************************************/
595
596 /** \brief Initiate the data transmission
597 * \param asclin module handle
598 * \return None
599 *
600 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
601 *
602 */
603 IFX_EXTERN void IfxAsclin_Asc_initiateTransmission(IfxAsclin_Asc *asclin);
604
605 /** \brief Initialize the standard interface to the device driver
606 * \param stdif standard interface object, will be initialized by the function
607 * \param asclin device driver object used by the standard interface. must be initialised separately
608 * \return TRUE on success, else FALSE
609 */
610 IFX_EXTERN boolean IfxAsclin_Asc_stdIfDPipeInit(IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin);
611
612 #endif /* IFXASCLIN_ASC_H */
IfxAsclin_Asc_Config::baudrate
IfxAsclin_Asc_BaudRate baudrate
structure for baudrate
Definition: IfxAsclin_Asc.h:358
IfxAsclin_Asc_Config::rxBufferSize
Ifx_SizeT rxBufferSize
Size of the rx buffer.
Definition: IfxAsclin_Asc.h:372
IfxAsclin_Cts_In
CTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:56
IfxAsclin_Asc_isrError
IFX_EXTERN void IfxAsclin_Asc_isrError(IfxAsclin_Asc *asclin)
ISR error routine.
Definition: IfxAsclin_Asc.c:433
IfxAsclin_Asc_getReadCount
IFX_EXTERN sint32 IfxAsclin_Asc_getReadCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:130
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin_Asc_Config::frame
IfxAsclin_Asc_FrameControl frame
structure for frame control
Definition: IfxAsclin_Asc.h:360
IfxAsclin_ReceiveBufferMode
IfxAsclin_ReceiveBufferMode
Receive buffer mode Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF.
Definition: IfxAsclin.h:256
Ifx_DataBufferMode
Ifx_DataBufferMode
Definition: Ifx_Types.h:161
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
IfxStm.h
STM basic functionality.
IfxAsclin_Asc_getWriteEvent
IFX_EXTERN IfxStdIf_DPipe_WriteEvent IfxAsclin_Asc_getWriteEvent(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:160
IfxAsclin_Asc_Config::rxBuffer
void * rxBuffer
The buffer parameter must point on a free memory location where the buffer object will be Initialised...
Definition: IfxAsclin_Asc.h:373
IfxAsclin_Asc
Module Handle.
Definition: IfxAsclin_Asc.h:340
IfxAsclin_Asc_BitTimingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, number of samples per bit (1 or 3), sample mode/median filter.
Definition: IfxAsclin_Asc.h:273
IfxAsclin_Asc_getTxTimeStamp
IFX_EXTERN Ifx_TickTime IfxAsclin_Asc_getTxTimeStamp(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:148
IfxAsclin_Asc_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Asc.h:364
IfxAsclin_SamplesPerBit
IfxAsclin_SamplesPerBit
Number of samples per bit, sample mode/medianfilter Definition in Ifx_ASCLIN.BITCON.B.SM.
Definition: IfxAsclin.h:345
IfxAsclin_Asc_initModule
IFX_EXTERN IfxAsclin_Status IfxAsclin_Asc_initModule(IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
Initialises the module.
Definition: IfxAsclin_Asc.c:166
IfxAsclin_Asc_getSendCount
IFX_EXTERN uint32 IfxAsclin_Asc_getSendCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:142
IfxAsclin_Asc_getReadEvent
IFX_EXTERN IfxStdIf_DPipe_ReadEvent IfxAsclin_Asc_getReadEvent(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:136
IfxAsclin_Asc_FifoControl::inWidth
IfxAsclin_TxFifoInletWidth inWidth
TXFIFOCON.INW, transmit FIFO inlet width.
Definition: IfxAsclin_Asc.h:281
IfxAsclin_Asc_FifoControl::txFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel
TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.
Definition: IfxAsclin_Asc.h:283
IfxAsclin_Asc_Pins::cts
IFX_CONST IfxAsclin_Cts_In * cts
ASC clear to send (CTS) pin.
Definition: IfxAsclin_Asc.h:315
IfxAsclin_RxFifoOutletWidth
IfxAsclin_RxFifoOutletWidth
Defines the number of bytes read from the Rx FIFO with one FPI bus read Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:297
IfxAsclin_Asc_isrReceive
IFX_EXTERN void IfxAsclin_Asc_isrReceive(IfxAsclin_Asc *asclin)
ISR receive routine.
Definition: IfxAsclin_Asc.c:470
IfxAsclin_Asc_BaudRate::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Asc.h:264
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxAsclin_Asc_stdIfDPipeInit
IFX_EXTERN boolean IfxAsclin_Asc_stdIfDPipeInit(IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin)
Initialize the standard interface to the device driver.
Definition: IfxAsclin_Asc.c:580
IfxAsclin_Asc_Config::fifo
IfxAsclin_Asc_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Asc.h:361
IfxAsclin_Asc_ErrorFlags::parityError
uint8 parityError
parity error
Definition: IfxAsclin_Asc.h:251
float32
float float32
Definition: Platform_Types.h:170
IfxAsclin_Asc_getWriteCount
IFX_EXTERN sint32 IfxAsclin_Asc_getWriteCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:154
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxAsclin_Asc_Pins::ctsMode
IfxPort_InputMode ctsMode
Cts pin as input.
Definition: IfxAsclin_Asc.h:316
IfxAsclin_StopBit
IfxAsclin_StopBit
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay. Definition in Ifx_ASCLIN.FRAMECON.B.STOP.
Definition: IfxAsclin.h:391
IfxAsclin_Asc_BaudRate::prescaler
uint16 prescaler
BITCON.PRESCALER, the division ratio of the predevider.
Definition: IfxAsclin_Asc.h:265
IfxAsclin_Asc::sendCount
volatile uint32 sendCount
Number of byte that are send out, this value is reset with the function Asc_If_resetSendCount() ...
Definition: IfxAsclin_Asc.h:349
IfxAsclin_Asc_InterruptConfig
Structure for interrupt configuration.
Definition: IfxAsclin_Asc.h:303
IfxAsclin_Asc_isrTransmit
IFX_EXTERN void IfxAsclin_Asc_isrTransmit(IfxAsclin_Asc *asclin)
ISR transmit routine.
Definition: IfxAsclin_Asc.c:512
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxAsclin_Asc_FrameControl::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Asc.h:297
IfxAsclin_Asc_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUFF, receive buffer mode (Rx FIFO or Rx buffer)
Definition: IfxAsclin_Asc.h:285
IfxAsclin_Asc_FifoControl::outWidth
IfxAsclin_RxFifoOutletWidth outWidth
RXFIFOCON.OTW, receive FIFO oulet width.
Definition: IfxAsclin_Asc.h:282
IfxAsclin_Asc_Config::interrupt
IfxAsclin_Asc_InterruptConfig interrupt
structure for interrupt configuration
Definition: IfxAsclin_Asc.h:362
IfxAsclin_RxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel
Defines the filling level that triggers a drain (RX) interrupt or DMA access Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:274
IfxAsclin_Asc_ErrorFlagsUnion
This union contains the error flags. In addition it allows to write and read to/from all flags as onc...
Definition: IfxAsclin_Asc.h:330
IfxAsclin_Asc::errorFlags
IfxAsclin_Asc_ErrorFlagsUnion errorFlags
error reported by ASCLIN during runtime (written by IfxAsclin_Asc_isrError)
Definition: IfxAsclin_Asc.h:347
IfxAsclin_Asc_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Asc.h:323
IfxAsclin_TxFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel
Defines the filling level that triggers a refill (TX) interrupt or DMA access Definition in Ifx_ASCLI...
Definition: IfxAsclin.h:426
IfxAsclin_Asc_BitTimingControl
Structure for bit timings.
Definition: IfxAsclin_Asc.h:271
IfxAsclin_Asc_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Asc.h:308
IfxAsclin_Asc_BaudRate::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, division ratio of the baudrate post devider.
Definition: IfxAsclin_Asc.h:266
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxAsclin_Asc::txInProgress
volatile boolean txInProgress
Ongoing transfer. Will be set by IfxAsclin_Asc_initiateTransmission, and cleared by IfxAsclin_Asc_isr...
Definition: IfxAsclin_Asc.h:345
IfxAsclin_Asc_Config::loopBack
boolean loopBack
IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
Definition: IfxAsclin_Asc.h:378
IfxAsclin_OversamplingFactor
IfxAsclin_OversamplingFactor
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed Defini...
Definition: IfxAsclin.h:227
IfxAsclin_Asc_FrameControl::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module.
Definition: IfxAsclin_Asc.h:294
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_Fifo.h
FIFO buffer functions.
IfxAsclin_Asc_BaudRate
Structure for baudrate.
Definition: IfxAsclin_Asc.h:262
IfxAsclin_Asc_Pins::rts
IFX_CONST IfxAsclin_Rts_Out * rts
ASC (request to send) RTS pin.
Definition: IfxAsclin_Asc.h:319
IfxAsclin_FrameMode
IfxAsclin_FrameMode
Defines the basic operating mode of the module. Changing the mode must be done by switching first to ...
Definition: IfxAsclin.h:156
IfxAsclin_IdleDelay
IfxAsclin_IdleDelay
Defines the duration of the IDLE delay in bit times. SPI mode: this is the idle time between the fram...
Definition: IfxAsclin.h:178
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin_Asc_initiateTransmission
IFX_EXTERN void IfxAsclin_Asc_initiateTransmission(IfxAsclin_Asc *asclin)
Initiate the data transmission.
Definition: IfxAsclin_Asc.c:402
IfxAsclin_ClockSource
IfxAsclin_ClockSource
Selection of clock source Definition in Ifx_ASCLIN.CSR.B.CLKSEL.
Definition: IfxAsclin.h:109
IfxAsclin_DataLength
IfxAsclin_DataLength
Number of bits per transfer Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.
Definition: IfxAsclin.h:133
IfxAsclin_Asc_FifoControl::rxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel
RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
Definition: IfxAsclin_Asc.h:284
IfxAsclin_Asc_blockingRead
IFX_EXTERN uint8 IfxAsclin_Asc_blockingRead(IfxAsclin_Asc *asclin)
Reads data from the Rx FIFO.
Definition: IfxAsclin_Asc.c:53
IfxAsclin_Asc_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Asc.h:292
IfxAsclin_Rts_Out
RTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:72
IfxAsclin_Asc::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Asc.h:342
IfxAsclin_Asc_Pins::rxMode
IfxPort_InputMode rxMode
Rx pin as input.
Definition: IfxAsclin_Asc.h:318
IfxAsclin_Asc_Pins::txMode
IfxPort_OutputMode txMode
Tx as output.
Definition: IfxAsclin_Asc.h:322
_Fifo
Definition: Ifx_Fifo.h:70
IfxAsclin_Asc_Config::bitTiming
IfxAsclin_Asc_BitTimingControl bitTiming
structure for bit timings
Definition: IfxAsclin_Asc.h:359
IfxAsclin_SamplePointPosition
IfxAsclin_SamplePointPosition
Sample point position Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.
Definition: IfxAsclin.h:323
IfxAsclin_Asc_resetSendCount
IFX_EXTERN void IfxAsclin_Asc_resetSendCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:574
IfxAsclin_Asc_Config::pins
IFX_CONST IfxAsclin_Asc_Pins * pins
structure for ASC pins
Definition: IfxAsclin_Asc.h:363
IfxAsclin_Asc_BitTimingControl::samplePointPosition
IfxAsclin_SamplePointPosition samplePointPosition
BITCON.SAMPLEPOINT, sample point position.
Definition: IfxAsclin_Asc.h:274
IfxAsclin_Asc_ErrorFlags
Structure for Error Flags.
Definition: IfxAsclin_Asc.h:249
IfxAsclin_Asc_clearRx
IFX_EXTERN void IfxAsclin_Asc_clearRx(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:85
IfxAsclin_Asc_Config
Configuration structure of the module.
Definition: IfxAsclin_Asc.h:355
IfxAsclin_Asc::tx
Ifx_Fifo * tx
Transmit FIFO buffer.
Definition: IfxAsclin_Asc.h:343
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
IfxAsclin_Asc_FrameControl
Structure for frame control.
Definition: IfxAsclin_Asc.h:290
IfxAsclin_Asc_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Asc.h:305
IfxAsclin_Asc_ErrorFlagsUnion::flags
IfxAsclin_Asc_ErrorFlags flags
Definition: IfxAsclin_Asc.h:333
IfxAsclin_TxFifoInletWidth
IfxAsclin_TxFifoInletWidth
Defines the number of bytes written to the Tx FIFO with one FPI bus write Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:415
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxAsclin_Asc_canWriteCount
IFX_EXTERN boolean IfxAsclin_Asc_canWriteCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:79
IfxAsclin_Asc_initModuleConfig
IFX_EXTERN void IfxAsclin_Asc_initModuleConfig(IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values.
Definition: IfxAsclin_Asc.c:349
IfxAsclin_Asc_write
IFX_EXTERN boolean IfxAsclin_Asc_write(IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:609
IfxAsclin_Asc_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Asc.h:295
IfxAsclin_Asc_ErrorFlags::rxFifoUnderflow
uint8 rxFifoUnderflow
receive FIFO underflow error
Definition: IfxAsclin_Asc.h:254
IfxAsclin_Asc_FifoControl
Structure for FIFO control.
Definition: IfxAsclin_Asc.h:279
IfxAsclin_Asc_FrameControl::parityType
IfxAsclin_ParityType parityType
FRAMECON.ODD, parity type (even or odd)
Definition: IfxAsclin_Asc.h:296
IfxAsclin_Asc_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
ASC Rx pin.
Definition: IfxAsclin_Asc.h:317
IfxAsclin_Asc_flushTx
IFX_EXTERN boolean IfxAsclin_Asc_flushTx(IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:109
IfxAsclin_Asc_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Asc.h:255
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxAsclin_Asc_FrameControl::parityBit
boolean parityBit
FRAMECON.PEN, parity enable.
Definition: IfxAsclin_Asc.h:298
IfxAsclin_Asc_Pins::rtsMode
IfxPort_OutputMode rtsMode
Rts as output.
Definition: IfxAsclin_Asc.h:320
IfxAsclin_Asc_ErrorFlagsUnion::ALL
uint8 ALL
Definition: IfxAsclin_Asc.h:332
IfxAsclin_Asc_InterruptConfig::erPriority
uint16 erPriority
error interrupt priority
Definition: IfxAsclin_Asc.h:307
IfxAsclin_Asc_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
ASC Tx pin.
Definition: IfxAsclin_Asc.h:321
IfxAsclin_Asc_clearTx
IFX_EXTERN void IfxAsclin_Asc_clearTx(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:92
IfxAsclin_ShiftDirection
IfxAsclin_ShiftDirection
SPI mode: defines the shift direction of the shift register. ASC and LIN mode: should be set to 0...
Definition: IfxAsclin.h:355
IfxAsclin_Asc_blockingWrite
IFX_EXTERN boolean IfxAsclin_Asc_blockingWrite(IfxAsclin_Asc *asclin, uint8 data)
Writes data into the Tx FIFO.
Definition: IfxAsclin_Asc.c:65
IfxAsclin_Asc_Config::txBuffer
void * txBuffer
The buffer parameter must point on a free memory location where the buffer object will be Initialised...
Definition: IfxAsclin_Asc.h:367
IfxAsclin_Asc_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Asc.h:306
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
sint32
long sint32
Definition: Platform_Types.h:134
IfxStdIf_DPipe_WriteEvent
volatile boolean * IfxStdIf_DPipe_WriteEvent
Definition: IfxStdIf_DPipe.h:70
IfxAsclin_Asc::txTimestamp
volatile Ifx_TickTime txTimestamp
Time stamp of the latest send byte.
Definition: IfxAsclin_Asc.h:350
IfxAsclin_Asc_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Asc.h:293
IfxAsclin_Asc_Config::txBufferSize
Ifx_SizeT txBufferSize
Size of the tx buffer.
Definition: IfxAsclin_Asc.h:366
IfxAsclin_Asc_Pins
Structure for ASC pin configuration.
Definition: IfxAsclin_Asc.h:313
IfxAsclin_ParityType
IfxAsclin_ParityType
Type of parity bit attached to data bits Definition in Ifx_ASCLIN.FRAMECON.B.ODD. ...
Definition: IfxAsclin.h:247
IfxAsclin_Asc::rxSwFifoOverflow
volatile boolean rxSwFifoOverflow
Will be set by IfxAsclin_Asc_isrReceive if the SW Fifo overflowed.
Definition: IfxAsclin_Asc.h:346
IfxAsclin_Asc_read
IFX_EXTERN boolean IfxAsclin_Asc_read(IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:564
IfxAsclin.h
ASCLIN basic functionality.
IfxAsclin_Asc::rx
Ifx_Fifo * rx
Receive FIFO buffer.
Definition: IfxAsclin_Asc.h:344
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxAsclin_Asc_ErrorFlags::frameError
uint8 frameError
transmit complete/pending error
Definition: IfxAsclin_Asc.h:252
IfxStdIf_DPipe_ReadEvent
volatile boolean * IfxStdIf_DPipe_ReadEvent
Definition: IfxStdIf_DPipe.h:71
IfxAsclin_Asc_disableModule
IFX_EXTERN void IfxAsclin_Asc_disableModule(IfxAsclin_Asc *asclin)
Disables the module.
Definition: IfxAsclin_Asc.c:99
IfxAsclin_Asc_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Asc.h:253
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:382
IfxAsclin_Asc::dataBufferMode
Ifx_DataBufferMode dataBufferMode
Rx buffer mode.
Definition: IfxAsclin_Asc.h:348
IfxAsclin_Asc_canReadCount
IFX_EXTERN boolean IfxAsclin_Asc_canReadCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:73


iLLD_TC26B: IfxAsclin_Lin.c Source File

  • Asclin
  • Lin
IfxAsclin_Lin.c
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_Lin.c
3 * \brief ASCLIN LIN details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxAsclin_Lin.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxAsclin_Lin_checkForReceivedHeaderFlags(IfxAsclin_Lin *asclin)
55 {
56 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
57
58 /* check Rx header end acknowledgement */
59 if (IfxAsclin_getRxHeaderEndFlagStatus(asclinSFR)) /* RHE flag*/
60 {
61 IfxAsclin_clearRxHeaderEndFlag(asclinSFR);
62 asclin->acknowledgmentFlags.rxHeaderEnd = 1;
63 }
64
65 /* check for Rx header error flags */
66 if (IfxAsclin_getHeaderTimeoutFlagStatus(asclinSFR)) /* HT flag*/
67 {
68 IfxAsclin_clearHeaderTimeoutFlag(asclinSFR);
69 asclin->errorFlagsStatus.headerTimeout = 1;
70 }
71
72 if (IfxAsclin_getCollisionDetectionErrorFlagStatus(asclinSFR)) /* CE flag*/
73 {
74 IfxAsclin_clearCollisionDetectionErrorFlag(asclinSFR);
75 asclin->errorFlagsStatus.collisionDetectionError = 1;
76 }
77
78 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR)) /* FE flag*/
79 {
80 IfxAsclin_clearFrameErrorFlag(asclinSFR);
81 asclin->errorFlagsStatus.frameError = 1;
82 }
83
84 if (IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(asclinSFR)) /* LA flag*/
85 {
86 IfxAsclin_clearLinAutoBaudDetectionErrorFlag(asclinSFR);
87 asclin->errorFlagsStatus.linAutobaudDetectionError = 1;
88 }
89
90 if (IfxAsclin_getLinParityErrorFlagStatus(asclinSFR)) /* LP flag*/
91 {
92 IfxAsclin_clearLinParityErrorFlag(asclinSFR);
93 asclin->errorFlagsStatus.linParityError = 1;
94 }
95 }
96
97
98 void IfxAsclin_Lin_checkForReceivedResponseFlags(IfxAsclin_Lin *asclin)
99 {
100 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
101
102 /* check Rx response end acknowledgement*/
103 if (IfxAsclin_getRxResponseEndFlagStatus(asclinSFR))
104 {
105 IfxAsclin_clearRxResponseEndFlag(asclinSFR);
106 asclin->acknowledgmentFlags.rxResponseEnd = 1;
107 }
108
109 /* check for Rx response error flags */
110 if (IfxAsclin_getRxFifoOverflowFlagStatus(asclinSFR)) /* RFO flag*/
111 {
112 IfxAsclin_clearRxFifoOverflowFlag(asclinSFR);
113 asclin->errorFlagsStatus.rxFifoOverflow = 1;
114 }
115
116 if (IfxAsclin_getCollisionDetectionErrorFlagStatus(asclinSFR)) /* CE flag*/
117 {
118 IfxAsclin_clearCollisionDetectionErrorFlag(asclinSFR);
119 asclin->errorFlagsStatus.collisionDetectionError = 1;
120 }
121
122 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR)) /* FE flag*/
123 {
124 IfxAsclin_clearFrameErrorFlag(asclinSFR);
125 asclin->errorFlagsStatus.frameError = 1;
126 }
127
128 if (IfxAsclin_getLinChecksumErrorFlagStatus(asclinSFR)) /* LC flag*/
129 {
130 IfxAsclin_clearLinChecksumErrorFlag(asclinSFR);
131 asclin->errorFlagsStatus.linChecksumError = 1;
132 }
133
134 if (IfxAsclin_getResponseTimeoutFlagStatus(asclinSFR)) /* RT flag*/
135 {
136 IfxAsclin_clearResponseTimeoutFlag(asclinSFR);
137 asclin->errorFlagsStatus.responseTimeout = 1;
138 }
139
140 if ((asclin->linMode == IfxAsclin_LinMode_slave) && (IfxAsclin_getBreakDetectedFlagStatus(asclinSFR))) /* BD flag only in slave mode*/
141 {
142 IfxAsclin_clearBreakDetectedFlag(asclinSFR);
143 asclin->errorFlagsStatus.breakDetected = 1;
144 }
145 }
146
147
148 void IfxAsclin_Lin_checkForTransmittedHeaderFlags(IfxAsclin_Lin *asclin)
149 {
150 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
151
152 /* check Tx header end acknowledgement */
153 if (IfxAsclin_getTxHeaderEndFlagStatus(asclinSFR)) /* THE flag*/
154 {
155 IfxAsclin_clearTxHeaderEndFlag(asclinSFR);
156 asclin->acknowledgmentFlags.txHeaderEnd = 1;
157 }
158
159 /* check for Tx header error flags */
160 if (IfxAsclin_getHeaderTimeoutFlagStatus(asclinSFR)) /* HT flag*/
161 {
162 IfxAsclin_clearHeaderTimeoutFlag(asclinSFR);
163 asclin->errorFlagsStatus.headerTimeout = 1;
164 }
165
166 if (IfxAsclin_getCollisionDetectionErrorFlagStatus(asclinSFR)) /* CE flag*/
167 {
168 IfxAsclin_clearCollisionDetectionErrorFlag(asclinSFR);
169 asclin->errorFlagsStatus.collisionDetectionError = 1;
170 }
171
172 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR)) /* FE flag*/
173 {
174 IfxAsclin_clearFrameErrorFlag(asclinSFR);
175 asclin->errorFlagsStatus.frameError = 1;
176 }
177
178 if (IfxAsclin_getLinParityErrorFlagStatus(asclinSFR)) /* LP flag*/
179 {
180 IfxAsclin_clearLinParityErrorFlag(asclinSFR);
181 asclin->errorFlagsStatus.linParityError = 1;
182 }
183 }
184
185
186 void IfxAsclin_Lin_checkForTransmittedResponseFlags(IfxAsclin_Lin *asclin)
187 {
188 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
189
190 /* check Tx response end acknowledgement */
191 if (IfxAsclin_getTxResponseEndFlagStatus(asclinSFR)) /* TRE flag*/
192 {
193 IfxAsclin_clearTxResponseEndFlag(asclinSFR);
194 asclin->acknowledgmentFlags.txResponseEnd = 1;
195 }
196
197 /* check for Tx response error flags */
198 if (IfxAsclin_getTxFifoOverflowFlagStatus(asclinSFR)) /* TFO flag*/
199 {
200 IfxAsclin_clearTxFifoOverflowFlag(asclinSFR);
201 asclin->errorFlagsStatus.txFifoOverflow = 1;
202 }
203
204 if (IfxAsclin_getCollisionDetectionErrorFlagStatus(asclinSFR)) /* CE flag*/
205 {
206 IfxAsclin_clearCollisionDetectionErrorFlag(asclinSFR);
207 asclin->errorFlagsStatus.collisionDetectionError = 1;
208 }
209
210 if (IfxAsclin_getResponseTimeoutFlagStatus(asclinSFR)) /* RT flag*/
211 {
212 IfxAsclin_clearResponseTimeoutFlag(asclinSFR);
213 asclin->errorFlagsStatus.responseTimeout = 1;
214 }
215
216 if ((asclin->linMode == IfxAsclin_LinMode_slave) && (IfxAsclin_getBreakDetectedFlagStatus(asclinSFR))) /* BD flag only in slave mode*/
217 {
218 IfxAsclin_clearBreakDetectedFlag(asclinSFR);
219 asclin->errorFlagsStatus.breakDetected = 1;
220 }
221 }
222
223
224 void IfxAsclin_Lin_clearFlagsStatus(IfxAsclin_Lin *asclin)
225 {
226 /*clear acknowledgement flags status */
227 asclin->acknowledgmentFlags.txHeaderEnd = 0;
228 asclin->acknowledgmentFlags.rxHeaderEnd = 0;
229 asclin->acknowledgmentFlags.txResponseEnd = 0;
230 asclin->acknowledgmentFlags.rxResponseEnd = 0;
231 asclin->acknowledgmentFlags.txCompleted = 0;
232
233 /* clear error flags status*/
234 asclin->errorFlagsStatus.headerTimeout = 0;
235 asclin->errorFlagsStatus.collisionDetectionError = 0;
236 asclin->errorFlagsStatus.frameError = 0;
237 asclin->errorFlagsStatus.responseTimeout = 0;
238 asclin->errorFlagsStatus.linParityError = 0;
239 asclin->errorFlagsStatus.breakDetected = 0;
240 asclin->errorFlagsStatus.linAutobaudDetectionError = 0;
241 asclin->errorFlagsStatus.linChecksumError = 0;
242 asclin->errorFlagsStatus.txFifoOverflow = 0;
243 asclin->errorFlagsStatus.rxFifoOverflow = 0;
244 }
245
246
247 void IfxAsclin_Lin_disableModule(IfxAsclin_Lin *asclin)
248 {
249 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
250 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
251 IfxScuWdt_clearCpuEndinit(psw); /* clearing the endinit protection*/
252 IfxAsclin_setDisableModuleRequest(asclinSFR); /* disabling the module*/
253 IfxScuWdt_setCpuEndinit(psw); /* setting the endinit protection back on*/
254 }
255
256
257 void IfxAsclin_Lin_ignoreHeader(IfxAsclin_Lin *asclin)
258 {
259 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
260 IfxAsclin_enableRxFifoInlet(asclinSFR, FALSE); /* disable Rx FIFO*/
261 IfxAsclin_setHeaderResponseSelect(asclinSFR, IfxAsclin_HeaderResponseSelect_headerOnly); /* set header only mode*/
262 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags*/
263 }
264
265
266 IfxAsclin_Status IfxAsclin_Lin_initModule(IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
267 {
268 Ifx_ASCLIN *asclinSFR = config->asclin; /* pointer to ASCLIN registers */
269 IfxAsclin_Status status = IfxAsclin_Status_noError;
270
271 asclin->asclin = asclinSFR; /* adding register pointer to module handler*/
272 IfxAsclin_enableModule(asclinSFR); /* enabling the module*/
273
274 /* mode initialisation */
275 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock*/
276 IfxAsclin_setFrameMode(asclinSFR, IfxAsclin_FrameMode_initialise); /* setting the module in Initialise mode*/
277 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source*/
278
279 /* lin mode initialisation */
280 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock*/
281 IfxAsclin_setFrameMode(asclinSFR, config->frameMode); /* setting the module in Lin mode*/
282 IfxAsclin_setLinMode(asclinSFR, config->linMode); /* configuring lin mode of operation (master/slave)*/
283 IfxAsclin_setRxInput(asclinSFR, config->alti); /* selecting the Rx(alternate) input pin*/
284 IfxAsclin_setPrescaler(asclinSFR, config->btc.prescaler); /* setting the prescaler*/
285 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source*/
286
287 /* baudrate generation in both modes */
288 status = (IfxAsclin_Status)IfxAsclin_setBitTiming(asclinSFR, config->brg.baudrate,
289 config->btc.oversampling,
290 config->bsc.samplePointPosition,
291 config->bsc.medianFilter); /* setting the baudrate bit fields to generate the required baudrate*/
292
293 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock again*/
294
295 /* auto baud rate detection in slave mode */
296 if (config->linMode == IfxAsclin_LinMode_slave)
297 {
298 IfxAsclin_enableAutoBaudrateDetection(asclinSFR, config->brd.abd); /* setting the auto baudrate detection (enable/disable)*/
299 IfxAsclin_setBrdUpperlimt(asclinSFR, config->brd.upperLimit); /* setting the upper limit for abd*/
300 IfxAsclin_setBrdLowerlimt(asclinSFR, config->brd.lowerLimit); /* setting the lower limit for abd*/
301 }
302
303 /* frame control initialisation */
304 IfxAsclin_enableParity(asclinSFR, config->frame.parityEnable); /* setting parity (enable/disable)*/
305 IfxAsclin_setParityType(asclinSFR, config->frame.parityType); /* setting parity type (odd/even)*/
306 IfxAsclin_setStopBit(asclinSFR, config->frame.stopBit); /* setting the stop bit*/
307 IfxAsclin_enableCollisionDetection(asclinSFR, config->frame.collisionDetectionEnable); /* setting collision detection (enable/disable)*/
308 IfxAsclin_setShiftDirection(asclinSFR, config->frame.shiftDir); /* setting the shift direction*/
309
310 /* data control initialisation */
311 IfxAsclin_setDataLength(asclinSFR, config->data.dataLength); /* setting the number of bytes to be transfered*/
312 IfxAsclin_setHeaderResponseSelect(asclinSFR, config->data.headerOnly); /* setting the header only or header and response mode*/
313 IfxAsclin_setLinResponseTimeoutMode(asclinSFR, config->data.responseTimeoutMode); /* setting the response timeout mode (frame/response)*/
314 IfxAsclin_setChecksumMode(asclinSFR, config->data.checksum); /* setting the checksum mode (classic/enhanced)*/
315 IfxAsclin_setLinResponseTimeoutThreshold(asclinSFR, config->data.responseTimeout); /* setting the lin response timeout threshold*/
316
317 /* lin control initialisation */
318 IfxAsclin_enableHardwareChecksum(asclinSFR, config->lin.csEnable); /* setting the hardware checksum (enable/disable)*/
319 IfxAsclin_setChecksumInjection(asclinSFR, config->lin.csi); /* setting checksum injection*/
320
321 /* master specific initialisation */
322 if (config->linMode == IfxAsclin_LinMode_master)
323 {
324 IfxAsclin_setIdleDelay(asclinSFR, config->frame.idleDelay); /* setting idle delay for master*/
325 IfxAsclin_setLeadDelay(asclinSFR, config->frame.leadDelay); /* setting lead delay for master mode*/
326 IfxAsclin_setLinBreakLength(asclinSFR, config->lin.breakLength); /* setting the break generation length*/
327 IfxAsclin_setLinHeaderTimeout(asclinSFR, config->lin.headerTimeout); /* setting the header timeout value for master*/
328 asclin->receiveIdEnable = config->receiveIdEnable; /* echoing the selection of receiving Id in its own Rx FIFO*/
329 }
330
331 /* slave specific initialisation */
332 if (config->linMode == IfxAsclin_LinMode_slave)
333 {
334 IfxAsclin_setIdleDelay(asclinSFR, config->frame.idleDelay); /* setting idle delay for slave */
335 IfxAsclin_setLeadDelay(asclinSFR, config->frame.leadDelay); /* setting lead delay for slave mode */
336 IfxAsclin_setLinBreakLength(asclinSFR, config->lin.breakLength); /* setting the break detection length */
337 IfxAsclin_setLinHeaderTimeout(asclinSFR, config->lin.headerTimeout); /* setting the header timeout value for slave*/
338 }
339
340 /* fifo control initialisation */
341 IfxAsclin_setTxFifoInletWidth(asclinSFR, config->fifo.inWidth); /* setting Tx FIFO inlet width*/
342 IfxAsclin_setRxFifoOutletWidth(asclinSFR, config->fifo.outWidth); /* setting Rx FIFO outlet width*/
343 IfxAsclin_setRxBufferMode(asclinSFR, config->fifo.buffMode); /* setting Rx FIFO mode*/
344 IfxAsclin_enableTxFifoOutlet(asclinSFR, FALSE); /* disabling Rx FIFO for recieving*/
345 IfxAsclin_enableRxFifoInlet(asclinSFR, FALSE); /* disabling Tx FIFO for transmitting*/
346 IfxAsclin_flushRxFifo(asclinSFR); /* flushing Rx FIFO*/
347 IfxAsclin_flushTxFifo(asclinSFR); /* flushing Tx FIFO*/
348
349 IfxAsclin_disableAllFlags(asclinSFR); /* disable all flags*/
350 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags*/
351
352 /* Initialising the Interrupts */
353 asclin->isInterruptMode = config->isInterruptMode;
354 IfxSrc_Tos tos = config->interrupt.typeOfService;
355
356 if (config->isInterruptMode)
357 {
358 Ifx_ASCLIN_FLAGSENABLE flagsenable;
359 flagsenable.U = asclinSFR->FLAGSENABLE.U;
360
361 if ((config->interrupt.rxPriority > 0) || (tos == IfxSrc_Tos_dma))
362 {
363 volatile Ifx_SRC_SRCR *src;
364 src = IfxAsclin_getSrcPointerRx(asclinSFR);
365 IfxSrc_init(src, tos, config->interrupt.rxPriority);
366
367 flagsenable.B.RHE = config->interrupt.enabledInterrupt.rxReceivedHeader;
368 flagsenable.B.RRE = config->interrupt.enabledInterrupt.rxReceivedResponse;
369
370 IfxSrc_enable(src);
371 }
372
373 if ((config->interrupt.txPriority > 0) || (tos == IfxSrc_Tos_dma))
374 {
375 volatile Ifx_SRC_SRCR *src;
376 src = IfxAsclin_getSrcPointerTx(asclinSFR);
377 IfxSrc_init(src, tos, config->interrupt.txPriority);
378
379 flagsenable.B.THE = config->interrupt.enabledInterrupt.txTransmittedHeader;
380 flagsenable.B.TRE = config->interrupt.enabledInterrupt.txTransmittedResponse;
381
382 IfxSrc_enable(src);
383 }
384
385 if (config->interrupt.exPriority > 0) /*These interrupts are not serviced by dma*/
386 {
387 volatile Ifx_SRC_SRCR *src;
388 src = IfxAsclin_getSrcPointerEr(asclinSFR);
389 IfxSrc_init(src, tos, config->interrupt.exPriority);
390
391 flagsenable.B.BDE = config->interrupt.enabledInterrupt.exBreakDetected;
392 flagsenable.B.TCE = config->interrupt.enabledInterrupt.exTransmissionCompleted;
393
394 flagsenable.B.CEE = config->interrupt.enabledInterrupt.exCollisionDetectionError;
395 flagsenable.B.FEE = config->interrupt.enabledInterrupt.exFramingError;
396 flagsenable.B.HTE = config->interrupt.enabledInterrupt.exHeaderTimeout;
397 flagsenable.B.ABE = config->interrupt.enabledInterrupt.exLinAutobaudDetectionError;
398 flagsenable.B.LCE = config->interrupt.enabledInterrupt.exLinChecksumError;
399 flagsenable.B.LPE = config->interrupt.enabledInterrupt.exLinParityError;
400 flagsenable.B.RFOE = config->interrupt.enabledInterrupt.exReceiveFIFOOverflow;
401 flagsenable.B.RTE = config->interrupt.enabledInterrupt.exResponseTimeout;
402 flagsenable.B.TFOE = config->interrupt.enabledInterrupt.exTransmitFIFOOverflow;
403
404 IfxSrc_enable(src);
405 }
406
407 /*Update FLAGSENABLE register in one shot*/
408 asclinSFR->FLAGSENABLE.U = flagsenable.U;
409 }
410
411 /* Pin mapping*/
412 const IfxAsclin_Lin_Pins *pins = config->pins;
413
414 if (pins != NULL_PTR)
415 {
416 IfxAsclin_Rx_In *rx = pins->rx;
417
418 if (rx != NULL_PTR)
419 {
420 IfxAsclin_initRxPin(rx, pins->rxMode, pins->pinDriver);
421 }
422
423 IfxAsclin_Tx_Out *tx = pins->tx;
424
425 if (tx != NULL_PTR)
426 {
427 IfxAsclin_initTxPin(tx, pins->txMode, pins->pinDriver);
428 }
429 }
430
431 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source*/
432
433 asclin->linMode = config->linMode; /* echoing the mode of operation to module handler*/
434
435 return status;
436 }
437
438
439 void IfxAsclin_Lin_initModuleConfig(IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
440 {
441 config->asclin = asclin;
442 config->frameMode = IfxAsclin_FrameMode_lin; /* LIN mode*/
443 config->linMode = IfxAsclin_LinMode_master; /* Lin Master mode*/
444 config->clockSource = IfxAsclin_ClockSource_kernelClock; /* kernel clock, fclc*/
445 config->alti = IfxAsclin_RxInputSelect_0; /* alternate input 0;*/
446
447 /* Default values for baudrate */
448 config->brg.baudrate = 19200.0; /* default baudrate (the fractional dividier setup will be calculated in initModule)*/
449 /* Default Values for Bit Timings */
450 config->btc.prescaler = 4; /* default prescaler*/
451 config->btc.oversampling = IfxAsclin_OversamplingFactor_16; /* default oversampling factor*/
452 /* Default Values for Bit sampling */
453 config->bsc.filterDepth = 24U; /* digital glitch filter depth 24*/
454 config->bsc.medianFilter = IfxAsclin_SamplesPerBit_one; /* one sample per bit*/
455 config->bsc.samplePointPosition = IfxAsclin_SamplePointPosition_3; /* sample point position at 3*/
456 /* Default Values for Frame Control */
457 config->frame.parityEnable = FALSE; /* disable parity*/
458 config->frame.parityType = IfxAsclin_ParityType_even; /* even parity (if parity enabled) */
459 config->frame.stopBit = IfxAsclin_StopBit_1; /* one stop bit */
460 config->frame.shiftDir = IfxAsclin_ShiftDirection_lsbFirst; /* shift diection LSB first */
461 config->frame.collisionDetectionEnable = FALSE;
462 /* Default Values for Data Control */
463 config->data.dataLength = IfxAsclin_DataLength_8; /* number of bytes of the response */
464 config->data.headerOnly = IfxAsclin_HeaderResponseSelect_headerAndResponse; /* header and response */
465 config->data.responseTimeoutMode = IfxAsclin_LinResponseTimeoutMode_frameTimeout; /* frame timeout */
466 config->data.checksum = IfxAsclin_Checksum_enhanced; /* enhanced checksum */
467 config->data.responseTimeout = 255;
468 /* Default Values for fifo Control */
469 config->fifo.outWidth = IfxAsclin_RxFifoOutletWidth_1; /* 8-bit wide read */
470 config->fifo.inWidth = IfxAsclin_TxFifoInletWidth_1; /* 8-bit wide write */
471 config->fifo.buffMode = IfxAsclin_ReceiveBufferMode_rxFifo; /* RxFIFO */
472 /* Default Values for Lin Control */
473 config->lin.csEnable = TRUE; /* checksum enable */
474 config->lin.csi = IfxAsclin_ChecksumInjection_written; /* 8-bit wide write */
475
476 /* Default Values for Interrupt Config */
477 config->interrupt.rxPriority = 0; /* receive interrupt priority 0*/
478 config->interrupt.txPriority = 0; /* transmit interrupt priority 0*/
479 config->interrupt.exPriority = 0; /* error interrupt priority 0*/
480 config->interrupt.typeOfService = IfxSrc_Tos_cpu0; /* type of service CPU0*/
481 config->isInterruptMode = FALSE; /* default is in polling mode*/
482
483 /* configuration for master mode */
484 {
485 config->receiveIdEnable = FALSE; /* receive Id in Rx Fifo after sending */
486 config->frame.idleDelay = IfxAsclin_IdleDelay_2; /* idle dalay 2 bits */
487 config->frame.leadDelay = IfxAsclin_LeadDelay_1; /*lead delay in master 1 bit */
488 /* Default Values for Lin Control */
489 config->lin.breakLength = 13; /* break generation length 13 */
490 config->lin.headerTimeout = 56; /* header timeout value in master 56 */
491 }
492
493 /*configuration for enabling interrupts*/
494 {
495 config->interrupt.enabledInterrupt.rxReceivedHeader = FALSE;
496 config->interrupt.enabledInterrupt.rxReceivedResponse = FALSE;
497 config->interrupt.enabledInterrupt.txTransmittedHeader = FALSE;
498 config->interrupt.enabledInterrupt.txTransmittedResponse = FALSE;
499 config->interrupt.enabledInterrupt.exBreakDetected = FALSE;
500 config->interrupt.enabledInterrupt.exTransmissionCompleted = FALSE;
501 config->interrupt.enabledInterrupt.exHeaderTimeout = FALSE;
502 config->interrupt.enabledInterrupt.exResponseTimeout = FALSE;
503 config->interrupt.enabledInterrupt.exLinParityError = FALSE;
504 config->interrupt.enabledInterrupt.exLinAutobaudDetectionError = FALSE;
505 config->interrupt.enabledInterrupt.exLinChecksumError = FALSE;
506 config->interrupt.enabledInterrupt.exFramingError = FALSE;
507 config->interrupt.enabledInterrupt.exCollisionDetectionError = FALSE;
508 config->interrupt.enabledInterrupt.exReceiveFIFOOverflow = FALSE;
509 config->interrupt.enabledInterrupt.exTransmitFIFOOverflow = FALSE;
510 }
511
512 config->pins = NULL_PTR; /* pins to null pointer*/
513 }
514
515
516 void IfxAsclin_Lin_receiveHeader(IfxAsclin_Lin *asclin, uint8 *id)
517 {
518 boolean result = 0;
519 IfxAsclin_Lin_prepareHeaderReception(asclin); /* prepare for header reception */
520 result |= IfxAsclin_Lin_waitForReceivedHeader(asclin); /* wait until receive header end acknowledgemnet*/
521
522 if (result == 1)
523 {
524 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
525 }
526 else
527 {
528 IfxAsclin_Lin_readHeader(asclin, id); /*read the ID byte*/
529 }
530 }
531
532
533 void IfxAsclin_Lin_receiveResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
534 {
535 boolean result = 0;
536 IfxAsclin_Lin_prepareResponseReception(asclin, length); /* prepare the response reception */
537 result |= IfxAsclin_Lin_waitForReceivedResponse(asclin); /* wait until receive response end acknowledgemnet or an error is occured*/
538
539 if (result == 1)
540 {
541 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
542 }
543 else
544 {
545 IfxAsclin_Lin_readResponse(asclin, data, length); /* read the data bytes */
546 }
547 }
548
549
550 void IfxAsclin_Lin_sendHeader(IfxAsclin_Lin *asclin, uint8 *id)
551 {
552 boolean result = 0;
553 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
554 IfxAsclin_clearAllFlags(asclinSFR); /* clearing all flags*/
555
556 if (asclin->receiveIdEnable) /* if receiving the sent id byte into its own Rx FIFO is selected*/
557 {
558 IfxAsclin_flushRxFifo(asclinSFR); /* flushing Rx FIFO*/
559 IfxAsclin_enableRxFifoInlet(asclinSFR, TRUE); /* enabling Rx FIFO */
560 }
561 else
562 {
563 IfxAsclin_enableRxFifoInlet(asclinSFR, FALSE); /* disabling Rx FIFO */
564 }
565
566 IfxAsclin_flushTxFifo(asclinSFR); /* flushing Tx FIFO */
567 IfxAsclin_enableTxFifoOutlet(asclinSFR, TRUE); /* enabling Tx FIFO for transmitting*/
568 IfxAsclin_write8(asclinSFR, id, 1U); /* writing the ID byte */
569 IfxAsclin_setTransmitHeaderRequestFlag(asclinSFR); /* setting THRQS flag */
570
571 if (asclin->isInterruptMode == FALSE) /*Only for Polling Mode*/
572 {
573 result |= IfxAsclin_Lin_waitForTransmittedHeader(asclin); /* waiting until transmit header end acknowledgemnet */
574
575 if (result == 1)
576 {
577 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
578 }
579 }
580 else
581 {
582 IfxAsclin_Lin_clearFlagsStatus(asclin);
583 asclin->linFrameData.flags.txHeaderInProgress = TRUE;
584 asclin->linFrameData.flags.txHeaderErrorOccurred = FALSE;
585 }
586 }
587
588
589 void IfxAsclin_Lin_sendResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
590 {
591 boolean result = 0;
592 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
593 IfxAsclin_setDataLength(asclinSFR, (IfxAsclin_DataLength)(length - 1)); /* set number of bytes to be transfered */
594 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags */
595 IfxAsclin_flushTxFifo(asclinSFR); /* flushing Tx FIFO */
596 IfxAsclin_enableRxFifoInlet(asclinSFR, FALSE); /* disable Rx FIFO */
597 IfxAsclin_enableTxFifoOutlet(asclinSFR, TRUE); /* enable Tx FIFO for transmitting */
598 IfxAsclin_write8(asclinSFR, data, length); /* write the data bytes; */
599 IfxAsclin_setTransmitResponseRequestFlag(asclinSFR); /* set TRRQS flag */
600 result |= IfxAsclin_Lin_waitForTransmittedResponse(asclin); /* wait until transmit response end acknowledgemnet */
601
602 if (result == 1)
603 {
604 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
605 }
606 }
607
608
609 boolean IfxAsclin_Lin_waitForReceivedHeader(IfxAsclin_Lin *asclin)
610 {
611 boolean result = 0;
612 IfxAsclin_Lin_clearFlagsStatus(asclin); /* clear all aknowledgement and error flags status */
613
614 /* wait until receive header end acknowledgemnet has been detected */
615 while (asclin->acknowledgmentFlags.rxHeaderEnd != 1)
616 {
617 IfxAsclin_Lin_checkForReceivedHeaderFlags(asclin);
618
619 if ((asclin->errorFlagsStatus.headerTimeout == 1)
620 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
621 || (asclin->errorFlagsStatus.frameError == 1)
622 || (asclin->errorFlagsStatus.linAutobaudDetectionError == 1)
623 || (asclin->errorFlagsStatus.linParityError == 1))
624 {
625 result = 1;
626 break;
627 }
628 }
629
630 return result;
631 }
632
633
634 boolean IfxAsclin_Lin_waitForReceivedResponse(IfxAsclin_Lin *asclin)
635 {
636 boolean result = 0;
637 IfxAsclin_Lin_clearFlagsStatus(asclin); /* clear all aknowledgement and error flags status */
638
639 /* wait until receive response end acknowledgemnet has been detected */
640 while (asclin->acknowledgmentFlags.rxResponseEnd != 1)
641 {
642 IfxAsclin_Lin_checkForReceivedResponseFlags(asclin);
643
644 if ((asclin->errorFlagsStatus.rxFifoOverflow == 1)
645 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
646 || (asclin->errorFlagsStatus.frameError == 1)
647 || (asclin->errorFlagsStatus.linChecksumError == 1)
648 || (asclin->errorFlagsStatus.responseTimeout == 1)
649 || (asclin->errorFlagsStatus.breakDetected == 1))
650 {
651 result = 1;
652 break;
653 }
654 }
655
656 return result;
657 }
658
659
660 boolean IfxAsclin_Lin_waitForTransmittedHeader(IfxAsclin_Lin *asclin)
661 {
662 boolean result = 0;
663 IfxAsclin_Lin_clearFlagsStatus(asclin); /* clear all aknowledgement and error flags status */
664
665 /* wait until transmit header end acknowledgemnet has been detected */
666 while (asclin->acknowledgmentFlags.txHeaderEnd != 1)
667 {
668 IfxAsclin_Lin_checkForTransmittedHeaderFlags(asclin);
669
670 if ((asclin->errorFlagsStatus.headerTimeout == 1)
671 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
672 || (asclin->errorFlagsStatus.frameError == 1)
673 || (asclin->errorFlagsStatus.linParityError == 1))
674 {
675 result = 1;
676 break;
677 }
678 }
679
680 return result;
681 }
682
683
684 boolean IfxAsclin_Lin_waitForTransmittedResponse(IfxAsclin_Lin *asclin)
685 {
686 boolean result = 0;
687 IfxAsclin_Lin_clearFlagsStatus(asclin); /* clear all aknowledgement and error flags status */
688
689 /* wait until transmit response end acknowledgemnet has been detected */
690 while (asclin->acknowledgmentFlags.txResponseEnd != 1)
691 {
692 IfxAsclin_Lin_checkForTransmittedResponseFlags(asclin);
693
694 if ((asclin->errorFlagsStatus.txFifoOverflow == 1)
695 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
696 || (asclin->errorFlagsStatus.responseTimeout == 1)
697 || (asclin->errorFlagsStatus.breakDetected == 1))
698 {
699 result = 1;
700 break;
701 }
702 }
703
704 return result;
705 }
706
707
708 void IfxAsclin_Lin_isrError(IfxAsclin_Lin *asclin)
709 {
710 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
711
712 /* store and clear the flags*/
713 if (IfxAsclin_getLinParityErrorFlagStatus(asclinSFR))
714 {
715 IfxAsclin_clearLinParityErrorFlag(asclinSFR);
716 asclin->errorFlagsStatus.linParityError = 1;
717 }
718
719 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR))
720 {
721 IfxAsclin_clearFrameErrorFlag(asclinSFR);
722 asclin->errorFlagsStatus.frameError = 1;
723 }
724
725 if (IfxAsclin_getRxFifoOverflowFlagStatus(asclinSFR))
726 {
727 IfxAsclin_clearRxFifoOverflowFlag(asclinSFR);
728 asclin->errorFlagsStatus.rxFifoOverflow = 1;
729 }
730
731 if (IfxAsclin_getTxFifoOverflowFlagStatus(asclinSFR))
732 {
733 IfxAsclin_clearTxFifoOverflowFlag(asclinSFR);
734 asclin->errorFlagsStatus.txFifoOverflow = 1;
735 }
736
737 if (IfxAsclin_getHeaderTimeoutFlagStatus(asclinSFR))
738 {
739 IfxAsclin_clearHeaderTimeoutFlag(asclinSFR);
740 asclin->errorFlagsStatus.headerTimeout = 1;
741 }
742
743 if (IfxAsclin_getResponseTimeoutFlagStatus(asclinSFR))
744 {
745 IfxAsclin_clearResponseTimeoutFlag(asclinSFR);
746 asclin->errorFlagsStatus.responseTimeout = 1;
747 }
748
749 if (IfxAsclin_getBreakDetectedFlagStatus(asclinSFR))
750 {
751 IfxAsclin_clearBreakDetectedFlag(asclinSFR);
752 asclin->errorFlagsStatus.breakDetected = 1;
753 }
754
755 if (IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(asclinSFR))
756 {
757 IfxAsclin_clearLinAutoBaudDetectionErrorFlag(asclinSFR);
758 asclin->errorFlagsStatus.linAutobaudDetectionError = 1;
759 }
760
761 if (IfxAsclin_getLinChecksumErrorFlagStatus(asclinSFR))
762 {
763 IfxAsclin_clearLinChecksumErrorFlag(asclinSFR);
764 asclin->errorFlagsStatus.linChecksumError = 1;
765 }
766
767 if (IfxAsclin_getCollisionDetectionErrorFlagStatus(asclinSFR))
768 {
769 IfxAsclin_clearCollisionDetectionErrorFlag(asclinSFR);
770 asclin->errorFlagsStatus.collisionDetectionError = 1;
771 }
772
773 if (IfxAsclin_getTransmissionCompletedFlagStatus(asclinSFR))
774 {
775 IfxAsclin_clearTransmissionCompletedFlag(asclinSFR);
776 asclin->acknowledgmentFlags.txCompleted = 1;
777 }
778
779 /*Update acknowledgment flags*/
780 if ((asclin->linFrameData.flags.txHeaderInProgress == 1)
781 && ((asclin->errorFlagsStatus.headerTimeout == 1)
782 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
783 || (asclin->errorFlagsStatus.frameError == 1)
784 || (asclin->errorFlagsStatus.linParityError == 1)))
785 {
786 asclin->linFrameData.flags.txHeaderErrorOccurred = TRUE;
787 asclin->acknowledgmentFlags.txHeaderEnd = 1;
788 asclin->linFrameData.flags.txHeaderInProgress = FALSE;
789 }
790
791 if ((asclin->linFrameData.flags.txResponseInProgress == 1)
792 && ((asclin->errorFlagsStatus.txFifoOverflow == 1)
793 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
794 || (asclin->errorFlagsStatus.responseTimeout == 1)
795 || (asclin->errorFlagsStatus.breakDetected == 1)))
796 {
797 asclin->linFrameData.flags.txResponseErrorOccurred = TRUE;
798 asclin->acknowledgmentFlags.txResponseEnd = 1;
799 asclin->linFrameData.flags.txResponseInProgress = FALSE;
800 }
801
802 if ((asclin->linFrameData.flags.rxHeaderInProgress == 1)
803 && ((asclin->errorFlagsStatus.rxFifoOverflow == 1)
804 || (asclin->errorFlagsStatus.headerTimeout == 1)
805 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
806 || (asclin->errorFlagsStatus.frameError == 1)
807 || (asclin->errorFlagsStatus.linAutobaudDetectionError == 1)
808 || (asclin->errorFlagsStatus.linParityError == 1)))
809 {
810 asclin->linFrameData.flags.rxHeaderErrorOccurred = TRUE;
811 asclin->acknowledgmentFlags.rxHeaderEnd = 1;
812 asclin->linFrameData.flags.rxHeaderInProgress = FALSE;
813 }
814
815 if ((asclin->linFrameData.flags.rxResponseInProgress == 1)
816 && ((asclin->errorFlagsStatus.rxFifoOverflow == 1)
817 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
818 || (asclin->errorFlagsStatus.frameError == 1)
819 || (asclin->errorFlagsStatus.linChecksumError == 1)
820 || (asclin->errorFlagsStatus.responseTimeout == 1)
821 || (asclin->errorFlagsStatus.breakDetected == 1)))
822 {
823 asclin->linFrameData.flags.rxResponseErrorOccurred = TRUE;
824 asclin->acknowledgmentFlags.rxResponseEnd = 1;
825 asclin->linFrameData.flags.rxResponseInProgress = FALSE;
826 }
827 }
828
829
830 void IfxAsclin_Lin_isrReceive(IfxAsclin_Lin *asclin)
831 {
832 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
833
834 if (IfxAsclin_getRxHeaderEndFlagStatus(asclinSFR))
835 {
836 IfxAsclin_clearRxHeaderEndFlag(asclinSFR);
837 IfxAsclin_Lin_readHeader(asclin, &(asclin->linFrameData.headerID)); /*read the ID byte*/
838 asclin->acknowledgmentFlags.rxHeaderEnd = 1;
839 asclin->linFrameData.flags.rxHeaderInProgress = FALSE;
840 asclinSFR->TXFIFOCON.B.ENO = 0; /*TX FIFO Outlet is disabled*/
841 }
842
843 if (IfxAsclin_getRxResponseEndFlagStatus(asclinSFR))
844 {
845 IfxAsclin_clearRxResponseEndFlag(asclinSFR);
846 IfxAsclin_Lin_readResponse(asclin, &(asclin->linFrameData.rxResponseData[0]), (asclin->linFrameData.rxResponseLength)); /* read the data bytes */
847 asclin->acknowledgmentFlags.rxResponseEnd = 1;
848 asclin->linFrameData.flags.rxResponseInProgress = FALSE;
849 }
850 }
851
852
853 void IfxAsclin_Lin_isrTransmit(IfxAsclin_Lin *asclin)
854 {
855 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
856
857 /* clear H/w Flag and update S/w Flags */
858 if (IfxAsclin_getTxHeaderEndFlagStatus(asclinSFR))
859 {
860 IfxAsclin_clearTxHeaderEndFlag(asclinSFR);
861 asclin->acknowledgmentFlags.txHeaderEnd = 1;
862 asclin->linFrameData.flags.txHeaderInProgress = FALSE;
863 }
864
865 if (IfxAsclin_getTxResponseEndFlagStatus(asclinSFR))
866 {
867 IfxAsclin_clearTxResponseEndFlag(asclinSFR);
868 asclin->acknowledgmentFlags.txResponseEnd = 1;
869 asclin->linFrameData.flags.txResponseInProgress = FALSE;
870 }
871 }
872
873
874 void IfxAsclin_Lin_sendFrame(IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
875 {
876 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
877 IfxAsclin_setChecksumMode(asclinSFR, pduptr->checksumMode); /* setting the checksum mode (classic/enhanced)*/
878 asclin->linFrameData.headerID = pduptr->pid;
879
880 if (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeader)
881 {
882 asclin->linFrameData.flags.txSendResponse = FALSE;
883 asclin->linFrameData.txResponseLength = 0;
884 asclin->linFrameData.flags.txSendHeaderOnly = TRUE;
885
886 /*Enable Interrupt flags for Header Transmission*/
887 Ifx_ASCLIN_FLAGSENABLE flagsenable;
888 flagsenable.U = asclinSFR->FLAGSENABLE.U;
889 flagsenable.B.THE = 1;
890 flagsenable.B.HTE = 1;
891 flagsenable.B.CEE = 1;
892 flagsenable.B.FEE = 1;
893 flagsenable.B.LPE = 1;
894 asclinSFR->FLAGSENABLE.U = flagsenable.U;
895
896 IfxAsclin_Lin_sendHeader(asclin, &(pduptr->pid));
897 }
898
899 else if ((pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndResponse) || (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse))
900 {
901 IfxAsclin_setDataLength(asclinSFR, (IfxAsclin_DataLength)(pduptr->dataLength - 1)); /* set number of bytes to be transfered */
902
903 /*Configure RXFIFO*/
904 Ifx_ASCLIN_RXFIFOCON rxfifocon;
905 rxfifocon.U = asclinSFR->RXFIFOCON.U;
906
907 rxfifocon.B.BUF = 0; /*RX in FIFO Mode*/
908 rxfifocon.B.FLUSH = 1; /*Empty Rx Fifo*/
909 rxfifocon.B.ENI = 1; /*RX FIFO Inlet is enabled*/
910
911 asclinSFR->RXFIFOCON.U = rxfifocon.U;
912
913 /*Configure TXFIFO*/
914 Ifx_ASCLIN_TXFIFOCON txfifocon;
915 txfifocon.U = asclinSFR->TXFIFOCON.U;
916
917 txfifocon.B.FLUSH = 1; /*Empty Tx Fifo*/
918 txfifocon.B.ENO = 1; /*TX FIFO Outlet is enabled*/
919
920 asclinSFR->TXFIFOCON.U = txfifocon.U;
921
922 /*Clear interrupt event flags*/
923 IfxAsclin_clearAllFlags(asclinSFR); /* clearing all flags*/
924 IfxAsclin_Lin_clearFlagsStatus(asclin);
925
926 Ifx_ASCLIN_FLAGSENABLE flagsenable;
927 flagsenable.U = asclinSFR->FLAGSENABLE.U;
928
929 if (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndResponse)
930 {
931 /*Enable Tx interrupts*/
932 flagsenable.B.THE = 1;
933 flagsenable.B.TRE = 1;
934 flagsenable.B.HTE = 1;
935
936 /*Enable Ex interrupts*/
937 flagsenable.B.TFOE = 1;
938 flagsenable.B.CEE = 1;
939 flagsenable.B.FEE = 1;
940 flagsenable.B.RTE = 1;
941 flagsenable.B.LPE = 1;
942 flagsenable.B.BDE = 1;
943
944 asclin->linFrameData.flags.txSendResponse = TRUE;
945 asclin->linFrameData.flags.txSendHeaderOnly = FALSE;
946 asclin->linFrameData.txResponseLength = pduptr->dataLength;
947
948 asclin->linFrameData.flags.txHeaderInProgress = TRUE;
949 asclin->linFrameData.flags.txHeaderErrorOccurred = FALSE;
950 asclin->linFrameData.flags.txResponseInProgress = TRUE;
951 asclin->linFrameData.flags.txResponseErrorOccurred = FALSE;
952 }
953 else if (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse)
954 {
955 /*Enable Rx interrupts*/
956 flagsenable.B.RRE = 1;
957 flagsenable.B.THE = 1;
958 flagsenable.B.RHE = 1;
959 flagsenable.B.HTE = 1;
960
961 /*Enable Ex interrupts*/
962 flagsenable.B.RFOE = 1;
963 flagsenable.B.CEE = 1;
964 flagsenable.B.FEE = 1;
965 flagsenable.B.RTE = 1;
966 flagsenable.B.LCE = 1;
967 flagsenable.B.BDE = 1;
968
969 asclinSFR->RXFIFOCON.B.ENI = 1; /*RX FIFO Inlet is enabled*/
970
971 asclin->linFrameData.flags.txSendResponse = TRUE;
972 asclin->linFrameData.flags.txSendHeaderOnly = FALSE;
973 asclin->linFrameData.rxResponseLength = pduptr->dataLength;
974 asclin->linFrameData.flags.txHeaderInProgress = TRUE;
975 asclin->linFrameData.flags.txHeaderErrorOccurred = FALSE;
976 asclin->linFrameData.flags.rxResponseInProgress = TRUE;
977 asclin->linFrameData.flags.rxResponseErrorOccurred = FALSE;
978 }
979
980 asclinSFR->FLAGSENABLE.U = flagsenable.U;
981
982 IfxAsclin_write8(asclinSFR, &(pduptr->pid), 1U); /* writing the ID byte */
983
984 if (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndResponse)
985 {
986 IfxAsclin_write8(asclinSFR, pduptr->dataPtr, pduptr->dataLength); /* writing data bytes */
987
988 Ifx_ASCLIN_FLAGSSET flagsset;
989 flagsset.U = asclinSFR->FLAGSSET.U;
990
991 flagsset.B.THRQS = 1;
992 flagsset.B.TRRQS = 1;
993
994 asclinSFR->FLAGSSET.U = flagsset.U;
995 }
996
997 else if (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse)
998 {
999 //asclinSFR->RXFIFOCON.B.ENI = 1; /*RX FIFO Inlet is enabled*/
1000 asclinSFR->FLAGSSET.B.THRQS = 1;
1001 }
1002 }
1003 }
IfxAsclin_Lin_sendResponse
void IfxAsclin_Lin_sendResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
sends the response
Definition: IfxAsclin_Lin.c:589
IfxAsclin_Lin_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Lin.h:475
IfxAsclin_Lin_EnabledInterrupts::exResponseTimeout
uint16 exResponseTimeout
Response Timeout.
Definition: IfxAsclin_Lin.h:355
IfxAsclin_Lin_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Lin.h:497
IfxAsclin_setLinResponseTimeoutMode
IFX_INLINE void IfxAsclin_setLinResponseTimeoutMode(Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode)
Sets the LIN response timeout mode.
Definition: IfxAsclin.h:2306
IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN auto baudrate detection error flag status.
Definition: IfxAsclin.h:1973
IfxAsclin_Lin_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Lin.h:556
IfxAsclin_Lin_sendFrame
void IfxAsclin_Lin_sendFrame(IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Respo...
Definition: IfxAsclin_Lin.c:874
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin_getResponseTimeoutFlagStatus
IFX_INLINE boolean IfxAsclin_getResponseTimeoutFlagStatus(Ifx_ASCLIN *asclin)
Returns the response timeout flag status.
Definition: IfxAsclin.h:2021
IfxAsclin_Lin_AcknowledgementFlags::txCompleted
uint8 txCompleted
transmission completed
Definition: IfxAsclin_Lin.h:393
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxAsclin_Lin_ErrorFlags::linAutobaudDetectionError
uint8 linAutobaudDetectionError
lin autobaud detection error
Definition: IfxAsclin_Lin.h:453
IfxAsclin_getCollisionDetectionErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getCollisionDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the collision detection error flag status.
Definition: IfxAsclin.h:1943
IfxAsclin_Lin_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Lin.h:498
IfxAsclin_Lin_BaudrateDetection::upperLimit
uint8 upperLimit
BRD.UPPERLIMIT, auto baudrate detection upperlimit.
Definition: IfxAsclin_Lin.h:402
IfxAsclin_Lin_Config::fifo
IfxAsclin_Lin_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Lin.h:552
IfxAsclin_OversamplingFactor_16
oversampling factor 16
Definition: IfxAsclin.h:241
IfxAsclin_Lin_FrameControlFlags::txSendHeaderOnly
uint16 txSendHeaderOnly
Flag indicating that only Header is transmitted.
Definition: IfxAsclin_Lin.h:369
IfxAsclin_setIdleDelay
IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay.
Definition: IfxAsclin.h:2264
IfxAsclin_ReceiveBufferMode_rxFifo
RxFIFO mode.
Definition: IfxAsclin.h:258
IfxAsclin_ShiftDirection_lsbFirst
LSB first.
Definition: IfxAsclin.h:357
IfxAsclin_Lin_EnabledInterrupts::exLinChecksumError
uint16 exLinChecksumError
Lin Checksum Error.
Definition: IfxAsclin_Lin.h:358
IfxAsclin_getSrcPointerEr
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR.
Definition: IfxAsclin.c:168
IfxAsclin_Lin_EnabledInterrupts::rxReceivedHeader
uint16 rxReceivedHeader
Received Header.
Definition: IfxAsclin_Lin.h:348
IfxAsclin_Lin_BitTimingControl::prescaler
uint16 prescaler
BITCON.PRESCALER, predivider to generate the baud rate.
Definition: IfxAsclin_Lin.h:429
IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse
Transmit Header and Receive Response.
Definition: IfxAsclin_Lin.h:333
IfxAsclin_Lin_BaudrateGeneration::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Lin.h:411
IfxAsclin_getTxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status.
Definition: IfxAsclin.h:2099
IfxAsclin_Lin_receiveHeader
void IfxAsclin_Lin_receiveHeader(IfxAsclin_Lin *asclin, uint8 *id)
Receives the header.
Definition: IfxAsclin_Lin.c:516
IfxAsclin_Lin_readResponse
IFX_INLINE void IfxAsclin_Lin_readResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Reads the response.
Definition: IfxAsclin_Lin.h:850
IfxAsclin_Lin_ErrorFlags::collisionDetectionError
uint8 collisionDetectionError
collision detection error
Definition: IfxAsclin_Lin.h:455
IfxAsclin_Lin_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Lin.h:477
IfxAsclin_enableModule
void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
Enables the module.
Definition: IfxAsclin.c:70
IfxAsclin_Lin_PduType::dataLength
uint8 dataLength
Length of LIN Response.
Definition: IfxAsclin_Lin.h:568
IfxAsclin_Lin_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Lin.h:522
IfxAsclin_Lin_receiveResponse
void IfxAsclin_Lin_receiveResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Receives the response.
Definition: IfxAsclin_Lin.c:533
IfxAsclin_setLinHeaderTimeout
IFX_INLINE void IfxAsclin_setLinHeaderTimeout(Ifx_ASCLIN *asclin, uint8 timeout)
Sets the LIN header timeout.
Definition: IfxAsclin.h:2294
IfxAsclin_getLinParityErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinParityErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN parity error flag status.
Definition: IfxAsclin.h:1985
IfxAsclin_Lin_PduType::checksumMode
IfxAsclin_Checksum checksumMode
LIN Checksum Mode.
Definition: IfxAsclin_Lin.h:571
IfxAsclin_Lin_checkForTransmittedHeaderFlags
void IfxAsclin_Lin_checkForTransmittedHeaderFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted header
Definition: IfxAsclin_Lin.c:148
IfxAsclin_flushTxFifo
IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO.
Definition: IfxAsclin.h:1919
IfxAsclin_Lin_ErrorFlags::breakDetected
uint8 breakDetected
break detected
Definition: IfxAsclin_Lin.h:451
IfxAsclin_Lin::isInterruptMode
boolean isInterruptMode
Value to indicate if APIs work in Polling mode or Interrupt mode.
Definition: IfxAsclin_Lin.h:537
IfxAsclin_clearTxResponseEndFlag
IFX_INLINE void IfxAsclin_clearTxResponseEndFlag(Ifx_ASCLIN *asclin)
Clears the transmit response end flag.
Definition: IfxAsclin.h:1727
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxAsclin_Lin_Pins
Structure for LIN pin configuration.
Definition: IfxAsclin_Lin.h:516
IfxAsclin_Lin_ErrorFlags::headerTimeout
uint8 headerTimeout
header timeout
Definition: IfxAsclin_Lin.h:449
IfxAsclin_Lin_checkForReceivedResponseFlags
void IfxAsclin_Lin_checkForReceivedResponseFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received response
Definition: IfxAsclin_Lin.c:98
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxAsclin_initRxPin
IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxAsclin.h:2136
IfxAsclin_setBrdUpperlimt
IFX_INLINE void IfxAsclin_setBrdUpperlimt(Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection&#39;s upper limit.
Definition: IfxAsclin.h:2192
IfxAsclin_Lin::receiveIdEnable
boolean receiveIdEnable
setting to receive Id in Rx Fifo after sending it
Definition: IfxAsclin_Lin.h:536
IfxAsclin_Lin_DataControl::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Lin.h:437
IfxAsclin_clearAllFlags
IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
clears all the flags
Definition: IfxAsclin.h:1595
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxAsclin_Lin_ErrorFlags::responseTimeout
uint8 responseTimeout
response timeout
Definition: IfxAsclin_Lin.h:450
IfxAsclin_Lin_EnabledInterrupts::exTransmitFIFOOverflow
uint16 exTransmitFIFOOverflow
Transmit FIFO Overflow.
Definition: IfxAsclin_Lin.h:362
IfxAsclin_Lin_ignoreHeader
void IfxAsclin_Lin_ignoreHeader(IfxAsclin_Lin *asclin)
Ignores the latest header.
Definition: IfxAsclin_Lin.c:257
IfxAsclin_Lin_Config::frame
IfxAsclin_Lin_FrameControl frame
structure for frame control
Definition: IfxAsclin_Lin.h:551
IfxAsclin_Lin_FifoControl::outWidth
IfxAsclin_RxFifoOutletWidth outWidth
RXFIFOCON.OTW, receive FIFO oulet width.
Definition: IfxAsclin_Lin.h:466
IfxAsclin_Lin_EnabledInterrupts::txTransmittedResponse
uint16 txTransmittedResponse
Transmitted Response.
Definition: IfxAsclin_Lin.h:351
IfxAsclin_Lin_initModule
IfxAsclin_Status IfxAsclin_Lin_initModule(IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
Initialises the module.
Definition: IfxAsclin_Lin.c:266
IfxAsclin_Lin::acknowledgmentFlags
IfxAsclin_Lin_AcknowledgementFlags acknowledgmentFlags
structure for acknowledgement flags
Definition: IfxAsclin_Lin.h:534
IfxAsclin_Lin_isrTransmit
void IfxAsclin_Lin_isrTransmit(IfxAsclin_Lin *asclin)
ISR transmit routine.
Definition: IfxAsclin_Lin.c:853
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxAsclin_ChecksumInjection_written
checksum byte is written
Definition: IfxAsclin.h:93
IfxAsclin_Lin_BitSamplingControl::filterDepth
uint8 filterDepth
IOCR.DEPTH, digital glitch filter depth.
Definition: IfxAsclin_Lin.h:420
IfxAsclin_Lin_PduType::direction
IfxAsclin_Lin_Direction direction
Direction Control (Tx Header only, Tx both Header and Response, Tx Header and Rx Response) ...
Definition: IfxAsclin_Lin.h:570
IfxAsclin_clearLinAutoBaudDetectionErrorFlag
IFX_INLINE void IfxAsclin_clearLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin)
Clears the auto baudrate detection error flag.
Definition: IfxAsclin.h:1637
IfxAsclin_Lin_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
LIN Rx pin.
Definition: IfxAsclin_Lin.h:518
IfxAsclin_Lin_FrameControlFlags::rxResponseErrorOccurred
uint16 rxResponseErrorOccurred
Flag to indicate error occurred during reception of Response.
Definition: IfxAsclin_Lin.h:378
IfxAsclin_setLinBreakLength
IFX_INLINE void IfxAsclin_setLinBreakLength(Ifx_ASCLIN *asclin, uint8 length)
Sets the LIN break length.
Definition: IfxAsclin.h:2288
IfxAsclin_LinResponseTimeoutMode_frameTimeout
timeout threshold is for frame
Definition: IfxAsclin.h:220
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxAsclin_enableCollisionDetection
IFX_INLINE void IfxAsclin_enableCollisionDetection(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the collision detection.
Definition: IfxAsclin.h:1751
IfxAsclin_Lin_InterruptConfig::exPriority
uint16 exPriority
error interrupt priority
Definition: IfxAsclin_Lin.h:499
IfxAsclin_Lin_FrameControlFlags::txResponseErrorOccurred
uint16 txResponseErrorOccurred
Flag to indicate error occurred during transmission of Response.
Definition: IfxAsclin_Lin.h:376
IfxAsclin_Lin_prepareHeaderReception
IFX_INLINE void IfxAsclin_Lin_prepareHeaderReception(IfxAsclin_Lin *asclin)
Prepares the module to receive the header.
Definition: IfxAsclin_Lin.h:822
IfxAsclin_Lin_EnabledInterrupts::txTransmittedHeader
uint16 txTransmittedHeader
Transmitted Header.
Definition: IfxAsclin_Lin.h:350
IfxAsclin_setParityType
IFX_INLINE void IfxAsclin_setParityType(Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
Sets the parity type.
Definition: IfxAsclin.h:2330
IfxAsclin_Lin_FrameDataControl::rxResponseLength
uint8 rxResponseLength
Length of received response.
Definition: IfxAsclin_Lin.h:489
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxAsclin_setBitTiming
boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing.
Definition: IfxAsclin.c:259
IfxAsclin_setTransmitHeaderRequestFlag
IFX_INLINE void IfxAsclin_setTransmitHeaderRequestFlag(Ifx_ASCLIN *asclin)
Sets the transmit header request flag.
Definition: IfxAsclin.h:2422
IfxAsclin_Lin_EnabledInterrupts::exLinAutobaudDetectionError
uint16 exLinAutobaudDetectionError
Lin Autobaud Detection Error.
Definition: IfxAsclin_Lin.h:357
IfxAsclin_Lin::linFrameData
IfxAsclin_Lin_FrameDataControl linFrameData
Structure for Lin Frame Data and Control.
Definition: IfxAsclin_Lin.h:532
IfxAsclin_setRxFifoOutletWidth
IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width.
Definition: IfxAsclin.h:2360
IfxAsclin_Lin_waitForReceivedHeader
boolean IfxAsclin_Lin_waitForReceivedHeader(IfxAsclin_Lin *asclin)
waits until receive header end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:609
IfxAsclin_IdleDelay_2
idle delay in 2 bit times
Definition: IfxAsclin.h:182
IfxAsclin_Lin_ErrorFlags::frameError
uint8 frameError
frame error
Definition: IfxAsclin_Lin.h:448
IfxAsclin_Lin_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
LIN Tx pin.
Definition: IfxAsclin_Lin.h:520
IfxAsclin_getTxHeaderEndFlagStatus
IFX_INLINE boolean IfxAsclin_getTxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmit header end flag status.
Definition: IfxAsclin.h:2105
IfxAsclin_getSrcPointerTx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx.
Definition: IfxAsclin.c:180
IfxAsclin_Lin_Config::bsc
IfxAsclin_Lin_BitSamplingControl bsc
structure for bit sampling
Definition: IfxAsclin_Lin.h:550
IfxAsclin_Lin_Config::brg
IfxAsclin_Lin_BaudrateGeneration brg
structure for baudrate generation
Definition: IfxAsclin_Lin.h:547
IfxAsclin_Lin_FrameControlFlags::rxHeaderInProgress
uint16 rxHeaderInProgress
Flag to indicate Header reception is initiated and is in progress.
Definition: IfxAsclin_Lin.h:373
IfxAsclin_Lin_Pins::txMode
IfxPort_OutputMode txMode
tx as output
Definition: IfxAsclin_Lin.h:521
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxAsclin_enableHardwareChecksum
IFX_INLINE void IfxAsclin_enableHardwareChecksum(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the hardware checksum.
Definition: IfxAsclin.h:1781
IfxAsclin_getRxResponseEndFlagStatus
IFX_INLINE boolean IfxAsclin_getRxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the receive response end flag status.
Definition: IfxAsclin.h:2063
IfxAsclin_Lin_EnabledInterrupts::exTransmissionCompleted
uint16 exTransmissionCompleted
Transmission Completed.
Definition: IfxAsclin_Lin.h:353
IfxAsclin_Lin_FrameControl::parityType
IfxAsclin_ParityType parityType
FRAMECON.ODD, parity type (even or odd)
Definition: IfxAsclin_Lin.h:476
IfxAsclin_Lin_ErrorFlags::linParityError
uint8 linParityError
lin parity error
Definition: IfxAsclin_Lin.h:452
IfxAsclin_setChecksumInjection
IFX_INLINE void IfxAsclin_setChecksumInjection(Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi)
Sets the checksum injection.
Definition: IfxAsclin.h:2198
IfxAsclin_setRxBufferMode
IFX_INLINE void IfxAsclin_setRxBufferMode(Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
Sets the receive buffer mode.
Definition: IfxAsclin.h:2348
IfxAsclin_Status_noError
No error.
Definition: IfxAsclin.h:385
IfxAsclin_Lin_AcknowledgementFlags::txResponseEnd
uint8 txResponseEnd
transmit response end
Definition: IfxAsclin_Lin.h:390
IfxAsclin_RxFifoOutletWidth_1
number of bytes 1
Definition: IfxAsclin.h:300
IfxAsclin_HeaderResponseSelect_headerAndResponse
header and response expected
Definition: IfxAsclin.h:169
IfxAsclin_Lin_EnabledInterrupts::exBreakDetected
uint16 exBreakDetected
Break Detected.
Definition: IfxAsclin_Lin.h:352
IfxAsclin_Lin_EnabledInterrupts::exHeaderTimeout
uint16 exHeaderTimeout
Header Timeout.
Definition: IfxAsclin_Lin.h:354
IfxAsclin_Lin_DataControl::responseTimeout
uint16 responseTimeout
DATCON.RESPONSE, timeout limit.
Definition: IfxAsclin_Lin.h:441
IfxAsclin_Lin_FrameControlFlags::txSendResponse
uint16 txSendResponse
Flag to indicate Response is transmitted.
Definition: IfxAsclin_Lin.h:370
IfxAsclin_clearRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag.
Definition: IfxAsclin.h:1679
IfxAsclin_setRxInput
IFX_INLINE void IfxAsclin_setRxInput(Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
Selects the alternate input for Rx signal.
Definition: IfxAsclin.h:2366
IfxAsclin_Lin_PduType::pid
uint8 pid
PID of LIN Header.
Definition: IfxAsclin_Lin.h:567
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin_clearRxHeaderEndFlag
IFX_INLINE void IfxAsclin_clearRxHeaderEndFlag(Ifx_ASCLIN *asclin)
Clears the receive header end flag.
Definition: IfxAsclin.h:1691
IfxAsclin_Lin_initModuleConfig
void IfxAsclin_Lin_initModuleConfig(IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values.
Definition: IfxAsclin_Lin.c:439
IfxAsclin_Lin_FrameControlFlags::rxHeaderErrorOccurred
uint16 rxHeaderErrorOccurred
Flag to indicate error occurred during reception of Header.
Definition: IfxAsclin_Lin.h:377
IfxAsclin_Lin_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Lin.h:457
IfxAsclin_setChecksumMode
IFX_INLINE void IfxAsclin_setChecksumMode(Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode)
Sets the checksum mode.
Definition: IfxAsclin.h:2204
IfxAsclin_DataLength
IfxAsclin_DataLength
Number of bits per transfer Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.
Definition: IfxAsclin.h:133
IfxAsclin_Lin_Config::btc
IfxAsclin_Lin_BitTimingControl btc
structure for bit timings
Definition: IfxAsclin_Lin.h:549
IfxAsclin_clearFrameErrorFlag
IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin)
Clears the frame error flag.
Definition: IfxAsclin.h:1619
IfxAsclin_Lin_FrameDataControl::txResponseLength
uint8 txResponseLength
Length of transmitted response.
Definition: IfxAsclin_Lin.h:488
IfxAsclin_Lin_ErrorFlags::linChecksumError
uint8 linChecksumError
lin checksum error
Definition: IfxAsclin_Lin.h:454
IfxAsclin_Lin_BaudrateDetection::lowerLimit
uint8 lowerLimit
BRD.LOWERLIMIT, auto baudrate detection lowerlimit.
Definition: IfxAsclin_Lin.h:401
IfxAsclin_Lin_Config::pins
IFX_CONST IfxAsclin_Lin_Pins * pins
structure for LIN pins
Definition: IfxAsclin_Lin.h:555
IfxAsclin_setLeadDelay
IFX_INLINE void IfxAsclin_setLeadDelay(Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
Sets the lead delay.
Definition: IfxAsclin.h:2282
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:70
IfxAsclin_Lin_FrameDataControl::flags
IfxAsclin_Lin_FrameControlFlags flags
LIN frame control flags.
Definition: IfxAsclin_Lin.h:490
IfxAsclin_setLinResponseTimeoutThreshold
IFX_INLINE void IfxAsclin_setLinResponseTimeoutThreshold(Ifx_ASCLIN *asclin, uint16 threshold)
Sets the LIN response timeout threshold.
Definition: IfxAsclin.h:2312
IfxAsclin_setPrescaler
IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:2336
IfxAsclin_getLinChecksumErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinChecksumErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN checksum error flag status.
Definition: IfxAsclin.h:1979
IfxAsclin_Lin_isrError
void IfxAsclin_Lin_isrError(IfxAsclin_Lin *asclin)
ISR error routine.
Definition: IfxAsclin_Lin.c:708
IfxAsclin_Lin_checkForTransmittedResponseFlags
void IfxAsclin_Lin_checkForTransmittedResponseFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted response
Definition: IfxAsclin_Lin.c:186
IfxAsclin_setHeaderResponseSelect
IFX_INLINE void IfxAsclin_setHeaderResponseSelect(Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type)
Sets the header response selection.
Definition: IfxAsclin.h:2258
IfxAsclin_Lin_Config::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
Definition: IfxAsclin_Lin.h:545
IfxAsclin_getTxResponseEndFlagStatus
IFX_INLINE boolean IfxAsclin_getTxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmit response end flag status.
Definition: IfxAsclin.h:2111
IfxAsclin_HeaderResponseSelect_headerOnly
header only expected
Definition: IfxAsclin.h:170
IfxAsclin_clearHeaderTimeoutFlag
IFX_INLINE void IfxAsclin_clearHeaderTimeoutFlag(Ifx_ASCLIN *asclin)
Clears the header timeout flag.
Definition: IfxAsclin.h:1625
IfxAsclin_ParityType_even
even parity
Definition: IfxAsclin.h:249
IfxAsclin_enableAutoBaudrateDetection
IFX_INLINE void IfxAsclin_enableAutoBaudrateDetection(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the auto baudrate detection.
Definition: IfxAsclin.h:1739
IfxAsclin_Lin_Config::brd
IfxAsclin_Lin_BaudrateDetection brd
structure for baudrate detection
Definition: IfxAsclin_Lin.h:548
IfxAsclin_Lin_prepareResponseReception
IFX_INLINE void IfxAsclin_Lin_prepareResponseReception(IfxAsclin_Lin *asclin, uint32 length)
Prepares the module to Receive the response.
Definition: IfxAsclin_Lin.h:832
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxAsclin_setLinMode
IFX_INLINE void IfxAsclin_setLinMode(Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode)
Sets the LIN mode of operation.
Definition: IfxAsclin.h:2300
IfxAsclin_Lin_Config::interrupt
IfxAsclin_Lin_InterruptConfig interrupt
structure for lin interrupt configuration
Definition: IfxAsclin_Lin.h:558
IfxAsclin_getSrcPointerRx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx.
Definition: IfxAsclin.c:174
IfxAsclin_Lin_FrameDataControl::rxResponseData
uint8 rxResponseData[8]
Array to store received response data.
Definition: IfxAsclin_Lin.h:486
IfxAsclin_Lin_BitSamplingControl::samplePointPosition
IfxAsclin_SamplePointPosition samplePointPosition
BITCON.SAMPLEPOINT, sample point position.
Definition: IfxAsclin_Lin.h:422
IfxAsclin_flushRxFifo
IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO.
Definition: IfxAsclin.h:1913
IfxAsclin_Lin_Pins::rxMode
IfxPort_InputMode rxMode
rx pin as input
Definition: IfxAsclin_Lin.h:519
IfxAsclin_Lin_Config
Configuration structure of the module.
Definition: IfxAsclin_Lin.h:542
IfxAsclin_Lin_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Lin.h:500
IfxAsclin_FrameMode_lin
lin mode
Definition: IfxAsclin.h:161
IfxAsclin_Lin::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Lin.h:531
IfxAsclin_Lin_InterruptConfig::enabledInterrupt
IfxAsclin_Lin_EnabledInterrupts enabledInterrupt
Interrupts which have to be enabled during initialisation as configured by application. Does not reflect current status of FLAGSENABLE register.
Definition: IfxAsclin_Lin.h:501
IfxAsclin_clearCollisionDetectionErrorFlag
IFX_INLINE void IfxAsclin_clearCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin)
Clears the collision detection error flag.
Definition: IfxAsclin.h:1607
IfxAsclin_Lin_Direction_TransmitHeader
Transmit Header.
Definition: IfxAsclin_Lin.h:331
IfxAsclin_Lin_waitForReceivedResponse
boolean IfxAsclin_Lin_waitForReceivedResponse(IfxAsclin_Lin *asclin)
waits until receive response end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:634
IfxAsclin_Lin_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Lin.h:456
IfxAsclin_SamplePointPosition_3
sample point position at 3
Definition: IfxAsclin.h:327
IfxAsclin_Lin_BitTimingControl::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, postdivider, used for oversampling.
Definition: IfxAsclin_Lin.h:430
IfxAsclin_enableParity
IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits.
Definition: IfxAsclin.h:1817
IfxAsclin_Lin_BaudrateDetection::abd
boolean abd
LINCON.ABD, autobaud detection enable.
Definition: IfxAsclin_Lin.h:400
IfxAsclin_clearLinParityErrorFlag
IFX_INLINE void IfxAsclin_clearLinParityErrorFlag(Ifx_ASCLIN *asclin)
Clears the LIN parity error flag.
Definition: IfxAsclin.h:1649
IfxAsclin_disableAllFlags
IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin)
disables all flags
Definition: IfxAsclin.h:1733
IfxAsclin_Lin_disableModule
void IfxAsclin_Lin_disableModule(IfxAsclin_Lin *asclin)
Disables the module.
Definition: IfxAsclin_Lin.c:247
IfxAsclin_Lin_sendHeader
void IfxAsclin_Lin_sendHeader(IfxAsclin_Lin *asclin, uint8 *id)
Sends the header.
Definition: IfxAsclin_Lin.c:550
IfxAsclin_initTxPin
IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxAsclin.h:2161
IfxAsclin_clearRxResponseEndFlag
IFX_INLINE void IfxAsclin_clearRxResponseEndFlag(Ifx_ASCLIN *asclin)
Clears the receive response end flag.
Definition: IfxAsclin.h:1697
IfxAsclin_setTxFifoInletWidth
IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width.
Definition: IfxAsclin.h:2440
IfxAsclin_write8
uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits.
Definition: IfxAsclin.c:404
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxAsclin_Lin_AcknowledgementFlags::rxHeaderEnd
uint8 rxHeaderEnd
receive header end
Definition: IfxAsclin_Lin.h:391
IfxAsclin_enableTxFifoOutlet
IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission.
Definition: IfxAsclin.h:1889
IfxAsclin_Lin_EnabledInterrupts::rxReceivedResponse
uint16 rxReceivedResponse
Received Response.
Definition: IfxAsclin_Lin.h:349
IfxAsclin_Lin_FrameControlFlags::rxResponseInProgress
uint16 rxResponseInProgress
Flag to indicate Response reception is initiated and is in progress.
Definition: IfxAsclin_Lin.h:374
IfxAsclin_setFrameMode
IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module&#39;s mode of operation.
Definition: IfxAsclin.h:2252
IfxAsclin_Lin_FrameControl::parityEnable
boolean parityEnable
FRAMECON.PEN, parity enable.
Definition: IfxAsclin_Lin.h:478
IfxAsclin_getRxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status.
Definition: IfxAsclin.h:2045
IfxAsclin_clearTxHeaderEndFlag
IFX_INLINE void IfxAsclin_clearTxHeaderEndFlag(Ifx_ASCLIN *asclin)
Clears the transmit header end flag.
Definition: IfxAsclin.h:1721
IfxAsclin_Lin_Config::data
IfxAsclin_Lin_DataControl data
structure for data control
Definition: IfxAsclin_Lin.h:553
IfxAsclin_Lin_FrameControl::leadDelay
IfxAsclin_LeadDelay leadDelay
FRAMECON.LEAD, lead delay.
Definition: IfxAsclin_Lin.h:474
IfxAsclin_Lin::errorFlagsStatus
IfxAsclin_Lin_ErrorFlags errorFlagsStatus
structure for error flags status
Definition: IfxAsclin_Lin.h:535
IfxAsclin_StopBit_1
number of stop bits 1
Definition: IfxAsclin.h:394
IfxAsclin_Lin_FrameDataControl::headerID
uint8 headerID
header ID
Definition: IfxAsclin_Lin.h:487
IfxAsclin_Lin_FrameControlFlags::txHeaderErrorOccurred
uint16 txHeaderErrorOccurred
Flag to indicate error occurred during transmission of Header.
Definition: IfxAsclin_Lin.h:375
IfxAsclin_ClockSource_kernelClock
f clc will be supplied
Definition: IfxAsclin.h:112
IfxAsclin_RxInputSelect_0
alternate input selection 0
Definition: IfxAsclin.h:310
IfxAsclin_LinMode_slave
operates in slave mode
Definition: IfxAsclin.h:211
IfxAsclin_Lin_Config::lin
IfxAsclin_Lin_LinControl lin
structure for lin control
Definition: IfxAsclin_Lin.h:554
IfxAsclin_LinMode_master
operates in master mode
Definition: IfxAsclin.h:212
IfxAsclin_LeadDelay_1
lead delay in 1 bit times
Definition: IfxAsclin.h:197
IfxAsclin_Lin_EnabledInterrupts::exCollisionDetectionError
uint16 exCollisionDetectionError
Collision Detection Error.
Definition: IfxAsclin_Lin.h:360
IfxAsclin_getBreakDetectedFlagStatus
IFX_INLINE boolean IfxAsclin_getBreakDetectedFlagStatus(Ifx_ASCLIN *asclin)
Returns the break detected flag status.
Definition: IfxAsclin.h:1925
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxAsclin_Lin_LinControl::csEnable
boolean csEnable
LINCON.CSEN, hardware checksum generation and checking.
Definition: IfxAsclin_Lin.h:508
IfxAsclin_enableRxFifoInlet
IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register...
Definition: IfxAsclin.h:1847
IfxAsclin_setTransmitResponseRequestFlag
IFX_INLINE void IfxAsclin_setTransmitResponseRequestFlag(Ifx_ASCLIN *asclin)
Sets the transmit response request flag.
Definition: IfxAsclin.h:2428
IfxAsclin_Lin_DataControl::headerOnly
IfxAsclin_HeaderResponseSelect headerOnly
DATCON.HO, Lin frame with header and response or header only.
Definition: IfxAsclin_Lin.h:438
IfxAsclin_Lin_isrReceive
void IfxAsclin_Lin_isrReceive(IfxAsclin_Lin *asclin)
ISR receive routine.
Definition: IfxAsclin_Lin.c:830
IfxAsclin_ClockSource_noClock
no clock will be supplied
Definition: IfxAsclin.h:111
IfxAsclin_Lin.h
ASCLIN LIN details.
IfxAsclin_Lin_waitForTransmittedResponse
boolean IfxAsclin_Lin_waitForTransmittedResponse(IfxAsclin_Lin *asclin)
waits until transmit response end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:684
IfxAsclin_getHeaderTimeoutFlagStatus
IFX_INLINE boolean IfxAsclin_getHeaderTimeoutFlagStatus(Ifx_ASCLIN *asclin)
Returns the header timeout flag status.
Definition: IfxAsclin.h:1961
IfxAsclin_Lin_checkForReceivedHeaderFlags
void IfxAsclin_Lin_checkForReceivedHeaderFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received header
Definition: IfxAsclin_Lin.c:54
IfxAsclin_Lin_DataControl::checksum
IfxAsclin_Checksum checksum
DATCON.CSM, checksum mode (classic or enhanced)
Definition: IfxAsclin_Lin.h:440
IfxAsclin_Lin_Direction_TransmitHeaderAndResponse
Transmit both Header and Response.
Definition: IfxAsclin_Lin.h:332
IfxAsclin_getTransmissionCompletedFlagStatus
IFX_INLINE boolean IfxAsclin_getTransmissionCompletedFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmission pending flag status.
Definition: IfxAsclin.h:2069
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxAsclin_Lin
Definition: IfxAsclin_Lin.h:529
IfxAsclin_TxFifoInletWidth_1
number of bytes 1
Definition: IfxAsclin.h:418
IfxAsclin_clearLinChecksumErrorFlag
IFX_INLINE void IfxAsclin_clearLinChecksumErrorFlag(Ifx_ASCLIN *asclin)
Clears the LIN checksum error flag.
Definition: IfxAsclin.h:1643
IfxAsclin_Lin_clearFlagsStatus
void IfxAsclin_Lin_clearFlagsStatus(IfxAsclin_Lin *asclin)
clears the flags status structures
Definition: IfxAsclin_Lin.c:224
IfxAsclin_Lin_AcknowledgementFlags::txHeaderEnd
uint8 txHeaderEnd
transmit header end
Definition: IfxAsclin_Lin.h:389
IfxAsclin_Lin_readHeader
IFX_INLINE void IfxAsclin_Lin_readHeader(IfxAsclin_Lin *asclin, uint8 *id)
Reads the header.
Definition: IfxAsclin_Lin.h:843
IfxAsclin_getRxHeaderEndFlagStatus
IFX_INLINE boolean IfxAsclin_getRxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the receive header end flag status.
Definition: IfxAsclin.h:2057
IfxAsclin_Lin_Config::alti
IfxAsclin_RxInputSelect alti
IOCR.ALTI, Rx input (alternate input) pin selection.
Definition: IfxAsclin_Lin.h:557
IfxAsclin_Lin::linMode
IfxAsclin_LinMode linMode
LINCON.MS, lin mode of operation (master or slave)
Definition: IfxAsclin_Lin.h:533
IfxAsclin_clearTransmissionCompletedFlag
IFX_INLINE void IfxAsclin_clearTransmissionCompletedFlag(Ifx_ASCLIN *asclin)
Clears the transmission pending flag.
Definition: IfxAsclin.h:1703
IfxAsclin_Lin_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Lin.h:473
IfxAsclin_FrameMode_initialise
initialise mode
Definition: IfxAsclin.h:158
IfxAsclin_DataLength_8
number of bits per transfer 7
Definition: IfxAsclin.h:142
IfxAsclin_Lin_LinControl::csi
IfxAsclin_ChecksumInjection csi
LINCON.CSI, checksum injection (not written or written) into RxFIFO.
Definition: IfxAsclin_Lin.h:509
IfxAsclin_setBrdLowerlimt
IFX_INLINE void IfxAsclin_setBrdLowerlimt(Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection&#39;s lower limit.
Definition: IfxAsclin.h:2186
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxAsclin_SamplesPerBit_one
one sample per bit
Definition: IfxAsclin.h:347
IfxAsclin_Lin_FrameControl::collisionDetectionEnable
boolean collisionDetectionEnable
FRAMECON.CEN, collision detection enable.
Definition: IfxAsclin_Lin.h:479
IfxAsclin_Lin_waitForTransmittedHeader
boolean IfxAsclin_Lin_waitForTransmittedHeader(IfxAsclin_Lin *asclin)
waits until transmit header end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:660
IfxAsclin_setStopBit
IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits.
Definition: IfxAsclin.h:2405
IfxAsclin_Lin_EnabledInterrupts::exReceiveFIFOOverflow
uint16 exReceiveFIFOOverflow
Receive FIFO Overflow.
Definition: IfxAsclin_Lin.h:361
IfxAsclin_Lin_AcknowledgementFlags::rxResponseEnd
uint8 rxResponseEnd
receive response end
Definition: IfxAsclin_Lin.h:392
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxAsclin_Lin_EnabledInterrupts::exLinParityError
uint16 exLinParityError
Lin Parity Error.
Definition: IfxAsclin_Lin.h:356
IfxAsclin_setShiftDirection
IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction.
Definition: IfxAsclin.h:2384
IfxAsclin_Lin_DataControl::responseTimeoutMode
IfxAsclin_LinResponseTimeoutMode responseTimeoutMode
DATCON.RM, response mode (response or frame timeout threshold)
Definition: IfxAsclin_Lin.h:439
IfxAsclin_getFrameErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the frame error flag status.
Definition: IfxAsclin.h:1955
IfxAsclin_setDisableModuleRequest
IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
Sets the disable module request.
Definition: IfxAsclin.h:2234
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxAsclin_clearBreakDetectedFlag
IFX_INLINE void IfxAsclin_clearBreakDetectedFlag(Ifx_ASCLIN *asclin)
Clears the break detected flag.
Definition: IfxAsclin.h:1601
IfxAsclin_Checksum_enhanced
enhanced checksum
Definition: IfxAsclin.h:84
IfxAsclin_clearTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag.
Definition: IfxAsclin.h:1715
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:382
IfxAsclin_Lin_BitSamplingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, no. of samples per bit 1 or 3.
Definition: IfxAsclin_Lin.h:421
IfxAsclin_Lin_FrameControlFlags::txResponseInProgress
uint16 txResponseInProgress
Flag to indicate Response transmission is initiated and is in progress.
Definition: IfxAsclin_Lin.h:372
IfxAsclin_Lin_LinControl::breakLength
uint8 breakLength
LINBTIMER.BREAK, break pulse generation and detection length.
Definition: IfxAsclin_Lin.h:510
IfxAsclin_Lin_PduType
Structure to hold Lin Pdu data.
Definition: IfxAsclin_Lin.h:565
IfxAsclin_Lin_FrameControlFlags::txHeaderInProgress
uint16 txHeaderInProgress
Flag to indicate Header transmission is initiated and is in progress.
Definition: IfxAsclin_Lin.h:371
IfxAsclin_clearResponseTimeoutFlag
IFX_INLINE void IfxAsclin_clearResponseTimeoutFlag(Ifx_ASCLIN *asclin)
Clears the response timeout flag.
Definition: IfxAsclin.h:1667
IfxAsclin_Lin_PduType::dataPtr
uint8 * dataPtr
Pointer for LIN Response data.
Definition: IfxAsclin_Lin.h:569
IfxAsclin_Lin_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
Definition: IfxAsclin_Lin.h:464
IfxAsclin_setDataLength
IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer)
Definition: IfxAsclin.h:2222
IfxAsclin_Lin_EnabledInterrupts::exFramingError
uint16 exFramingError
Framing Error.
Definition: IfxAsclin_Lin.h:359
IfxAsclin_setClockSource
void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source.
Definition: IfxAsclin.c:358
IfxAsclin_Lin_FifoControl::inWidth
IfxAsclin_TxFifoInletWidth inWidth
TXFIFOCON.INW, transmit FIFO inlet width.
Definition: IfxAsclin_Lin.h:465


iLLD_TC26B: IfxAsclin_Lin.h Source File

  • Asclin
  • Lin
IfxAsclin_Lin.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_Lin.h
3 * \brief ASCLIN LIN details
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Asclin_Lin_Usage How to use the ASCLIN LIN Interface driver?
44 * \ingroup IfxLld_Asclin
45 *
46 * The LIN interface driver provides a default ASCLIN configuration for asynchronous serial communication in 8bit mode, and a set of data transfer routines.
47 * It supports all four elementary LIN transactions in polling mode.
48 * TxH - Transmission of Header
49 * TxR - Transmission of Response
50 * RxH - Reception of Header
51 * RxR - Reception of Response
52 *
53 * The driver also provides a LIN Master to be configured in Interrupt mode. In interrupt mode, following Lin frame transactions are provided.
54 * 1.Transmit Header only.
55 * 2.Transmit both Header and Response.
56 * 3.Transmit Header and Receive Response.
57 *
58 * In the following sections it will be described, how to integrate the driver into the application framework.
59 *
60 * \section IfxLld_Asclin_Lin_Preparation Preparation
61 * \subsection IfxLld_Asclin_Lin_Include Include Files
62 *
63 * Include following header file into your C code:
64 * \code
65 * #include <Asclin/Lin/IfxAsclin_Lin.h>
66 * \endcode
67 *
68 * \subsection IfxLld_Asclin_Lin_Variables Variables
69 *
70 * Declare the LIN handle as global variable in your C code:
71 *
72 * \code
73 * // used globally
74 * static IfxAsclin_Lin linMaster;
75 * static IfxAsclin_Lin linSlave;
76 * \endcode
77 *
78 * \subsection IfxLld_Asclin_Lin_Interrupt Interrupt Handler Installation
79 *
80 * Define priorities for the Interrrupt handlers.
81 * \code
82 *
83 * #define IFX_INTPRIO_ASCLIN1_RX 4 // Define the LIN1 receive interrupt priority.
84 * #define IFX_INTPRIO_ASCLIN1_TX 8 // Define the LIN1 transmit interrupt priority.
85 * #define IFX_INTPRIO_ASCLIN1_EX 12 // Define the LIN1 error interrupt priority.
86 *
87 * \endcode
88 *
89 * Add the interrupt service routines to your C code. They have to call the LIN interrupt handlers by passing the lin handle:
90 * \code
91 * IFX_INTERRUPT(ISR_Lin1_rx, 0, IFX_INTPRIO_ASCLIN1_RX);
92 * IFX_INTERRUPT(ISR_Lin1_tx, 0, IFX_INTPRIO_ASCLIN1_TX);
93 * IFX_INTERRUPT(ISR_Lin1_ex, 0, IFX_INTPRIO_ASCLIN1_EX);
94 *
95 * void ISR_Lin1_rx(void)
96 * {
97 * IfxAsclin_Lin_isrReceive(&linMaster);
98 * }
99 * void ISR_Lin1_tx(void)
100 * {
101 * IfxAsclin_Lin_isrTransmit(&linMaster);
102 * }
103 * void ISR_Lin1_ex(void)
104 * {
105 * IfxAsclin_Lin_isrError(&linMaster);
106 * }
107 * \endcode
108 *
109 * \subsection IfxLld_Asclin_Lin_Init Module Initialisation
110 *
111 * The module can be initialised as either Master or Slave. Here an example:
112 *
113 * \subsection IfxLld_Asclin_Lin_Init_Master Module Initialisation as Master
114 *
115 * \code
116 * // create module config
117 * IfxAsclin_Lin_Config linMasterConfig;
118 * IfxAsclin_Lin_initModuleConfig(&linMasterConfig, &MODULE_ASCLIN1);
119 *
120 * // set the lin mode of operation
121 * linMasterConfig.linMode = IfxAsclin_LinMode_master;
122 *
123 * // set the desired baudrate
124 * linMasterConfig.btc.prescaler = 4;
125 * linMasterConfig.brg.baudrate = 19200; // FDR values will be calculated in initModule
126 *
127 * // pin configuration
128 * const IfxAsclin_Lin_Pins pins = {
129 * &IfxAsclin1_RXB_P15_5_IN, IfxPort_InputMode_pullUp, // Rx pin
130 * &IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
131 * IfxPort_PadDriver_cmosAutomotiveSpeed1
132 * };
133 * linMasterConfig.pins = &pins;
134 *
135 * //Lin Master Interrupt Config. Only needed for interrupt mode.
136 * linConfig.isInterruptMode = TRUE;
137 * linConfig.interrupt.rxPriority = ISR_PRIORITY(INTERRUPT_LIN1_RX);
138 * linConfig.interrupt.txPriority = ISR_PRIORITY(INTERRUPT_LIN1_TX);
139 * linConfig.interrupt.exPriority = ISR_PRIORITY(INTERRUPT_LIN1_EX);
140 *
141 * //Optionally, if any interrupt has to be enabled during initialisation it can be done as follows.
142 * //Otherwise the driver will enable required interrupts during run time.
143 *
144 * linConfig.interrupt.enabledInterrupt.exCollisionDetectionError = TRUE; //This is optional example.
145 *
146 * linConfig.lin.csi = FALSE;//checksum injection not written into RxFIFO
147 *
148 * // initialize module
149 * IfxAsclin_Lin_initModule(&linMaster, &linMasterConfig);
150 * \endcode
151 *
152 * \subsection IfxLld_Asclin_Lin_Init_Slave Module Initialisation as Slave
153 *
154 * \code
155 * // create module config
156 * IfxAsclin_Lin_Config linSlaveConfig;
157 * IfxAsclin_Lin_initModuleConfig(&linSlaveConfig, &MODULE_ASCLIN1);
158 *
159 * // set the lin mode of operation
160 * linSlaveConfig.linMode = IfxAsclin_LinMode_slave;
161 *
162 * // set the desired baudrate
163 * linSlaveConfig.btc.prescaler = 4;
164 * linSlaveConfig.brg.baudrate = 19200; // FDR values will be calculated in initModule
165 *
166 * // choose the auto baudrate detection configuration
167 * linSlaveConfig.brd.abd = FALSE;
168 * linSlaveConfig.brd.lowerLimit = 0x4;
169 * linSlaveConfig.brd.upperLimit = 0xF0;
170 *
171 * // pin configuration
172 * const IfxAsclin_Lin_Pins pins = {
173 * &IfxAsclin1_RXB_P15_5_IN, IfxPort_InputMode_pullUp, // Rx pin
174 * &IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
175 * IfxPort_PadDriver_cmosAutomotiveSpeed1
176 * };
177 * linSlaveConfig.pins = &pins;
178 *
179 *
180 *
181 * // initialize module
182 * //IfxAsclin_Lin linSlave; // defined globally
183 * IfxAsclin_Lin_initModule(&linSlave, &linSlaveConfig);
184 * \endcode
185 *
186 * The LIN is ready for use now!
187 *
188 * \section IfxLld_Asclin_Lin_DataTransfers Data Transfers
189 *
190 * \subsection IfxLld_Asclin_Lin_DataMaster Master Transfers
191 *
192 * The LIN driver provides all three master elementary transfers.
193 *
194 * This means: you can send a header and based on the id byte, after transmission of header
195 * you can send or receive response and also can ignore the header based on the id:
196 * \code
197 * // set the id bytes
198 * uint8 txId = 0x80; // for sending respose after header
199 * uint8 rxId = 0xC1; // for receiving respose after header
200 *
201 * // prepare transmit bytes incase of sending response
202 * uint8 txData[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
203 *
204 * // prepare receive buffer incase of receiving response
205 * uint8 rxData[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
206 *
207 * uint32 size = 8;
208 *
209 * //Polling mode APIs
210 * //send response case
211 * IfxAsclin_Lin_sendHeader(&linMaster, &txId);
212 *
213 * if (lin.acknowledgmentFlags.txHeaderEnd == 1) // if the header is been transmitted succesfully
214 * {
215 * IfxAsclin_Lin_sendResponse(&linMaster, txData, size);
216 * }
217 *
218 * //receive response case
219 * IfxAsclin_Lin_sendHeader(&linMaster, &rxId);
220 *
221 * if (lin.acknowledgmentFlags.txHeaderEnd == 1) // if the header is been transmitted succesfully
222 * {
223 * IfxAsclin_Lin_receiveResponse(&linMaster, rxData, size);
224 * }
225 *
226 * //Interrupt mode APIs
227 * IfxAsclin_Lin_PduType pdu;
228 * pdu.pid = 0x42;
229 * pdu.checksumMode = IfxAsclin_Checksum_enhanced;
230 * pdu.dataLength = 8;
231 * pdu.direction = IfxAsclin_Lin_Direction_TransmitHeaderAndResponse; //Transmits both Header and Response
232 * pdu.dataPtr = &txData[0];
233 * IfxAsclin_Lin_sendFrame(&linMaster,&pdu);
234 * //Here Poll for linMaster.acknowledgmentFlags.txResponseEnd to detect end of transmission of frame.
235 *
236 * pdu.pid = 0xC4;
237 * pdu.direction = IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse; //Transmits Header and expects slave to respond
238 * IfxAsclin_Lin_sendFrame(&linMaster,&pdu);
239 * //Here Poll for linMaster.acknowledgmentFlags.rxResponseEnd
240 * //linMaster.linFrameData.rxResponseData[8] will have received response data if slave replies.
241 *
242 * \endcode
243 *
244 *
245 * \subsection IfxLld_Asclin_Lin_DataSlave Slave Transfers
246 *
247 * Same as master the LIN driver provides all three slave elemnatry tranfers.
248 *
249 * This means: you can receive a header and based on the id byte received,
250 * you can send or receive response and can also ignore the header based on the id:
251 * \code
252 * uint8 id; // for storing received id byte
253 *
254 * // prepare transmit bytes incase of sending response
255 * uint8 txData[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
256 *
257 * // prepare receive buffer incase of receiving response
258 * uint8 rxData[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
259 *
260 * uint32 size = 8;
261 *
262 * // receive header
263 * IfxAsclin_Lin_receiveHeader(&linSlave, &id);
264 *
265 * // if data is requsted by master
266 * if(id == txId)
267 * {
268 * IfxAsclin_Lin_sendResponse(&linSlave, txData, size); // send response
269 * }
270 *
271 * // if header is follwed by response
272 * else if(id == rxId)
273 * {
274 * IfxAsclin_Lin_receiveResponse(&linSlave, rxData, size); // receive response
275 * }
276 *
277 * // if header is not for this slave
278 * else
279 * {
280 * IfxAsclin_Lin_ignoreHeader(&linSlave);
281 * }
282 * \endcode
283 *
284 * \defgroup IfxLld_Asclin_Lin LIN
285 * \ingroup IfxLld_Asclin
286 * \defgroup IfxLld_Asclin_Lin_DataStructures Data Structures
287 * \ingroup IfxLld_Asclin_Lin
288 * \defgroup IfxLld_Asclin_Lin_ElementaryTransactions Elementary Transactions
289 * \ingroup IfxLld_Asclin_Lin
290 * \defgroup IfxLld_Asclin_Lin_ModuleFunctions Module Functions
291 * \ingroup IfxLld_Asclin_Lin
292 * \defgroup IfxLld_Asclin_Lin_errorHandlingFunctions Error Handling Functions
293 * \ingroup IfxLld_Asclin_Lin
294 * \defgroup IfxLld_Asclin_Lin_InterruptFunctions Interrupt Functions
295 * \ingroup IfxLld_Asclin_Lin
296 * \defgroup IfxLld_Asclin_Lin_Enumerations Enumerations
297 * \ingroup IfxLld_Asclin_Lin
298 */
299
300 #ifndef IFXASCLIN_LIN_H
301 #define IFXASCLIN_LIN_H 1
302
303 /******************************************************************************/
304 /*----------------------------------Includes----------------------------------*/
305 /******************************************************************************/
306
307 #include "Asclin/Std/IfxAsclin.h"
308 #include "_Utilities/Ifx_Assert.h"
309
310 /******************************************************************************/
311 /*-----------------------------------Macros-----------------------------------*/
312 /******************************************************************************/
313
314 #define IFXASCLIN_LIN_SEND_RESPONSE (0x80)
315
316 #define IFXASCLIN_LIN_RECEIVE_RESPONSE (0xC1)
317
318 /******************************************************************************/
319 /*--------------------------------Enumerations--------------------------------*/
320 /******************************************************************************/
321
322 /** \addtogroup IfxLld_Asclin_Lin_Enumerations
323 * \{ */
324 /** \brief Defines the type of Lin Master Frame.
325 * (Transmit Header only) or
326 * (Transmit Header and Response) or
327 * (Transmit Header and Receive Response).
328 */
329 typedef enum
330 {
331 IfxAsclin_Lin_Direction_TransmitHeader = 0, /**< \brief Transmit Header */
332 IfxAsclin_Lin_Direction_TransmitHeaderAndResponse = 1, /**< \brief Transmit both Header and Response */
333 IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse = 2 /**< \brief Transmit Header and Receive Response */
334 } IfxAsclin_Lin_Direction;
335
336 /** \} */
337
338 /******************************************************************************/
339 /*-----------------------------Data Structures--------------------------------*/
340 /******************************************************************************/
341
342 /** \addtogroup IfxLld_Asclin_Lin_DataStructures
343 * \{ */
344 /** \brief Structure to store interrupts which are enabled during initialisation.
345 */
346 typedef struct
347 {
348 uint16 rxReceivedHeader : 1; /**< \brief Received Header */
349 uint16 rxReceivedResponse : 1; /**< \brief Received Response */
350 uint16 txTransmittedHeader : 1; /**< \brief Transmitted Header */
351 uint16 txTransmittedResponse : 1; /**< \brief Transmitted Response */
352 uint16 exBreakDetected : 1; /**< \brief Break Detected */
353 uint16 exTransmissionCompleted : 1; /**< \brief Transmission Completed */
354 uint16 exHeaderTimeout : 1; /**< \brief Header Timeout */
355 uint16 exResponseTimeout : 1; /**< \brief Response Timeout */
356 uint16 exLinParityError : 1; /**< \brief Lin Parity Error */
357 uint16 exLinAutobaudDetectionError : 1; /**< \brief Lin Autobaud Detection Error */
358 uint16 exLinChecksumError : 1; /**< \brief Lin Checksum Error */
359 uint16 exFramingError : 1; /**< \brief Framing Error */
360 uint16 exCollisionDetectionError : 1; /**< \brief Collision Detection Error */
361 uint16 exReceiveFIFOOverflow : 1; /**< \brief Receive FIFO Overflow */
362 uint16 exTransmitFIFOOverflow : 1; /**< \brief Transmit FIFO Overflow */
363 } IfxAsclin_Lin_EnabledInterrupts;
364
365 /** \brief Structure for Lin Frame Control flags
366 */
367 typedef struct
368 {
369 uint16 txSendHeaderOnly : 1; /**< \brief Flag indicating that only Header is transmitted */
370 uint16 txSendResponse : 1; /**< \brief Flag to indicate Response is transmitted */
371 uint16 txHeaderInProgress : 1; /**< \brief Flag to indicate Header transmission is initiated and is in progress */
372 uint16 txResponseInProgress : 1; /**< \brief Flag to indicate Response transmission is initiated and is in progress */
373 uint16 rxHeaderInProgress : 1; /**< \brief Flag to indicate Header reception is initiated and is in progress */
374 uint16 rxResponseInProgress : 1; /**< \brief Flag to indicate Response reception is initiated and is in progress */
375 uint16 txHeaderErrorOccurred : 1; /**< \brief Flag to indicate error occurred during transmission of Header */
376 uint16 txResponseErrorOccurred : 1; /**< \brief Flag to indicate error occurred during transmission of Response */
377 uint16 rxHeaderErrorOccurred : 1; /**< \brief Flag to indicate error occurred during reception of Header */
378 uint16 rxResponseErrorOccurred : 1; /**< \brief Flag to indicate error occurred during reception of Response */
379 } IfxAsclin_Lin_FrameControlFlags;
380
381 /** \} */
382
383 /** \addtogroup IfxLld_Asclin_Lin_DataStructures
384 * \{ */
385 /** \brief Structure for Acknowledgement Flags
386 */
387 typedef struct
388 {
389 uint8 txHeaderEnd : 1; /**< \brief transmit header end */
390 uint8 txResponseEnd : 1; /**< \brief transmit response end */
391 uint8 rxHeaderEnd : 1; /**< \brief receive header end */
392 uint8 rxResponseEnd : 1; /**< \brief receive response end */
393 uint8 txCompleted : 1; /**< \brief transmission completed */
394 } IfxAsclin_Lin_AcknowledgementFlags;
395
396 /** \brief Structure for Baudrate Detection
397 */
398 typedef struct
399 {
400 boolean abd; /**< \brief LINCON.ABD, autobaud detection enable */
401 uint8 lowerLimit; /**< \brief BRD.LOWERLIMIT, auto baudrate detection lowerlimit */
402 uint8 upperLimit; /**< \brief BRD.UPPERLIMIT, auto baudrate detection upperlimit */
403 uint8 measured; /**< \brief BRD.MEASURED, measured time interval between the
404 * first and the fifth falling edge of the sync byte */
405 } IfxAsclin_Lin_BaudrateDetection;
406
407 /** \brief Structure for Baudrate Generation
408 */
409 typedef struct
410 {
411 float32 baudrate; /**< \brief value of the required baudrate */
412 uint16 numerator; /**< \brief BRG.NUMERATOR, defines the numerator of fractional divider */
413 uint16 denominator; /**< \brief BRG.DENOMINATOR, defines the denominator of fractional divider */
414 } IfxAsclin_Lin_BaudrateGeneration;
415
416 /** \brief Structure for Bit Sampling
417 */
418 typedef struct
419 {
420 uint8 filterDepth; /**< \brief IOCR.DEPTH, digital glitch filter depth */
421 IfxAsclin_SamplesPerBit medianFilter; /**< \brief BITCON.SM, no. of samples per bit 1 or 3 */
422 IfxAsclin_SamplePointPosition samplePointPosition; /**< \brief BITCON.SAMPLEPOINT, sample point position */
423 } IfxAsclin_Lin_BitSamplingControl;
424
425 /** \brief Structure for Bit Timing
426 */
427 typedef struct
428 {
429 uint16 prescaler; /**< \brief BITCON.PRESCALER, predivider to generate the baud rate */
430 IfxAsclin_OversamplingFactor oversampling; /**< \brief BITCON.OVERSAMPLING, postdivider, used for oversampling */
431 } IfxAsclin_Lin_BitTimingControl;
432
433 /** \brief Structure for Data Control
434 */
435 typedef struct
436 {
437 IfxAsclin_DataLength dataLength; /**< \brief DATCON.DATALENGTH, data length, number of bits per transfer */
438 IfxAsclin_HeaderResponseSelect headerOnly; /**< \brief DATCON.HO, Lin frame with header and response or header only */
439 IfxAsclin_LinResponseTimeoutMode responseTimeoutMode; /**< \brief DATCON.RM, response mode (response or frame timeout threshold) */
440 IfxAsclin_Checksum checksum; /**< \brief DATCON.CSM, checksum mode (classic or enhanced) */
441 uint16 responseTimeout; /**< \brief DATCON.RESPONSE, timeout limit */
442 } IfxAsclin_Lin_DataControl;
443
444 /** \brief Structure for Error Flags
445 */
446 typedef struct
447 {
448 uint8 frameError : 1; /**< \brief frame error */
449 uint8 headerTimeout : 1; /**< \brief header timeout */
450 uint8 responseTimeout : 1; /**< \brief response timeout */
451 uint8 breakDetected : 1; /**< \brief break detected */
452 uint8 linParityError : 1; /**< \brief lin parity error */
453 uint8 linAutobaudDetectionError : 1; /**< \brief lin autobaud detection error */
454 uint8 linChecksumError : 1; /**< \brief lin checksum error */
455 uint8 collisionDetectionError : 1; /**< \brief collision detection error */
456 uint8 rxFifoOverflow : 1; /**< \brief receive FIFO overflow error */
457 uint8 txFifoOverflow : 1; /**< \brief transmit FIFO overflow error */
458 } IfxAsclin_Lin_ErrorFlags;
459
460 /** \brief Structure for FIFO Control
461 */
462 typedef struct
463 {
464 IfxAsclin_ReceiveBufferMode buffMode; /**< \brief RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer) */
465 IfxAsclin_TxFifoInletWidth inWidth; /**< \brief TXFIFOCON.INW, transmit FIFO inlet width */
466 IfxAsclin_RxFifoOutletWidth outWidth; /**< \brief RXFIFOCON.OTW, receive FIFO oulet width */
467 } IfxAsclin_Lin_FifoControl;
468
469 /** \brief Structure for Frame Control
470 */
471 typedef struct
472 {
473 IfxAsclin_IdleDelay idleDelay; /**< \brief FRAMECON.IDLE, idle delay */
474 IfxAsclin_LeadDelay leadDelay; /**< \brief FRAMECON.LEAD, lead delay */
475 IfxAsclin_StopBit stopBit; /**< \brief FRAMECON.STOP, number of stop bits */
476 IfxAsclin_ParityType parityType; /**< \brief FRAMECON.ODD, parity type (even or odd) */
477 IfxAsclin_ShiftDirection shiftDir; /**< \brief FRAMECON.MSB, shift direction */
478 boolean parityEnable; /**< \brief FRAMECON.PEN, parity enable */
479 boolean collisionDetectionEnable; /**< \brief FRAMECON.CEN, collision detection enable */
480 } IfxAsclin_Lin_FrameControl;
481
482 /** \brief Structure for Frame Data and Control flags
483 */
484 typedef struct
485 {
486 uint8 rxResponseData[8]; /**< \brief Array to store received response data */
487 uint8 headerID; /**< \brief header ID */
488 uint8 txResponseLength; /**< \brief Length of transmitted response */
489 uint8 rxResponseLength; /**< \brief Length of received response */
490 IfxAsclin_Lin_FrameControlFlags flags; /**< \brief LIN frame control flags */
491 } IfxAsclin_Lin_FrameDataControl;
492
493 /** \brief Structure for LIN Interrupt Configuration
494 */
495 typedef struct
496 {
497 uint16 txPriority; /**< \brief transmit interrupt priority */
498 uint16 rxPriority; /**< \brief receive interrupt priority */
499 uint16 exPriority; /**< \brief error interrupt priority */
500 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
501 IfxAsclin_Lin_EnabledInterrupts enabledInterrupt; /**< \brief Interrupts which have to be enabled during initialisation as configured by application. Does not reflect current status of FLAGSENABLE register. */
502 } IfxAsclin_Lin_InterruptConfig;
503
504 /** \brief Structure for lin Control
505 */
506 typedef struct
507 {
508 boolean csEnable; /**< \brief LINCON.CSEN, hardware checksum generation and checking */
509 IfxAsclin_ChecksumInjection csi; /**< \brief LINCON.CSI, checksum injection (not written or written) into RxFIFO */
510 uint8 breakLength; /**< \brief LINBTIMER.BREAK, break pulse generation and detection length */
511 uint8 headerTimeout; /**< \brief LINHTIMER.HEADER, header timeout threshold value */
512 } IfxAsclin_Lin_LinControl;
513
514 /** \brief Structure for LIN pin configuration
515 */
516 typedef struct
517 {
518 IFX_CONST IfxAsclin_Rx_In *rx; /**< \brief LIN Rx pin */
519 IfxPort_InputMode rxMode; /**< \brief rx pin as input */
520 IFX_CONST IfxAsclin_Tx_Out *tx; /**< \brief LIN Tx pin */
521 IfxPort_OutputMode txMode; /**< \brief tx as output */
522 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
523 } IfxAsclin_Lin_Pins;
524
525 /** \} */
526
527 /** \addtogroup IfxLld_Asclin_Lin_DataStructures
528 * \{ */
529 typedef struct
530 {
531 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
532 IfxAsclin_Lin_FrameDataControl linFrameData; /**< \brief Structure for Lin Frame Data and Control */
533 IfxAsclin_LinMode linMode; /**< \brief LINCON.MS, lin mode of operation (master or slave) */
534 IfxAsclin_Lin_AcknowledgementFlags acknowledgmentFlags; /**< \brief structure for acknowledgement flags */
535 IfxAsclin_Lin_ErrorFlags errorFlagsStatus; /**< \brief structure for error flags status */
536 boolean receiveIdEnable; /**< \brief setting to receive Id in Rx Fifo after sending it */
537 boolean isInterruptMode; /**< \brief Value to indicate if APIs work in Polling mode or Interrupt mode */
538 } IfxAsclin_Lin;
539
540 /** \brief Configuration structure of the module
541 */
542 typedef struct
543 {
544 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
545 IfxAsclin_FrameMode frameMode; /**< \brief FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN) */
546 IfxAsclin_LinMode linMode; /**< \brief LINCON.MS, lin mode of operation (master or slave) */
547 IfxAsclin_Lin_BaudrateGeneration brg; /**< \brief structure for baudrate generation */
548 IfxAsclin_Lin_BaudrateDetection brd; /**< \brief structure for baudrate detection */
549 IfxAsclin_Lin_BitTimingControl btc; /**< \brief structure for bit timings */
550 IfxAsclin_Lin_BitSamplingControl bsc; /**< \brief structure for bit sampling */
551 IfxAsclin_Lin_FrameControl frame; /**< \brief structure for frame control */
552 IfxAsclin_Lin_FifoControl fifo; /**< \brief structure for FIFO control */
553 IfxAsclin_Lin_DataControl data; /**< \brief structure for data control */
554 IfxAsclin_Lin_LinControl lin; /**< \brief structure for lin control */
555 IFX_CONST IfxAsclin_Lin_Pins *pins; /**< \brief structure for LIN pins */
556 IfxAsclin_ClockSource clockSource; /**< \brief CSR.CLKSEL, clock source selection */
557 IfxAsclin_RxInputSelect alti; /**< \brief IOCR.ALTI, Rx input (alternate input) pin selection */
558 IfxAsclin_Lin_InterruptConfig interrupt; /**< \brief structure for lin interrupt configuration */
559 boolean isInterruptMode; /**< \brief flag to indicate Interrupt Mode (TRUE) or Polling Mode (FALSE) */
560 boolean receiveIdEnable; /**< \brief setting to receive Id in Rx Fifo after sending it */
561 } IfxAsclin_Lin_Config;
562
563 /** \brief Structure to hold Lin Pdu data
564 */
565 typedef struct
566 {
567 uint8 pid; /**< \brief PID of LIN Header */
568 uint8 dataLength; /**< \brief Length of LIN Response */
569 uint8 *dataPtr; /**< \brief Pointer for LIN Response data */
570 IfxAsclin_Lin_Direction direction; /**< \brief Direction Control (Tx Header only, Tx both Header and Response, Tx Header and Rx Response) */
571 IfxAsclin_Checksum checksumMode; /**< \brief LIN Checksum Mode */
572 } IfxAsclin_Lin_PduType;
573
574 /** \} */
575
576 /** \addtogroup IfxLld_Asclin_Lin_ElementaryTransactions
577 * \{ */
578
579 /******************************************************************************/
580 /*-------------------------Inline Function Prototypes-------------------------*/
581 /******************************************************************************/
582
583 /** \brief Prepares the module to receive the header
584 * \param asclin module handle
585 * \return None
586 *
587 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
588 *
589 */
590 IFX_INLINE void IfxAsclin_Lin_prepareHeaderReception(IfxAsclin_Lin *asclin);
591
592 /** \brief Prepares the module to Receive the response
593 * \param asclin module handle
594 * \param length count of data (in bytes).
595 * \return None
596 *
597 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
598 *
599 */
600 IFX_INLINE void IfxAsclin_Lin_prepareResponseReception(IfxAsclin_Lin *asclin, uint32 length);
601
602 /** \brief Reads the header
603 * \param asclin module handle
604 * \param id the id byte which should be received
605 * \return None
606 *
607 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
608 *
609 */
610 IFX_INLINE void IfxAsclin_Lin_readHeader(IfxAsclin_Lin *asclin, uint8 *id);
611
612 /** \brief Reads the response
613 * \param asclin module handle
614 * \param data Pointer to the start of data which should be received
615 * \param length count of data (in bytes).
616 * \return None
617 *
618 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
619 *
620 */
621 IFX_INLINE void IfxAsclin_Lin_readResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length);
622
623 /******************************************************************************/
624 /*-------------------------Global Function Prototypes-------------------------*/
625 /******************************************************************************/
626
627 /** \brief Ignores the latest header
628 * \param asclin module handle
629 * \return None
630 *
631 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
632 *
633 */
634 IFX_EXTERN void IfxAsclin_Lin_ignoreHeader(IfxAsclin_Lin *asclin);
635
636 /** \brief Receives the header
637 * \param asclin module handle
638 * \param id the id byte which should be received
639 * \return None
640 *
641 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
642 *
643 */
644 IFX_EXTERN void IfxAsclin_Lin_receiveHeader(IfxAsclin_Lin *asclin, uint8 *id);
645
646 /** \brief Receives the response
647 * \param asclin module handle
648 * \param data Pointer to the start of data which should be received
649 * \param length count of data (in bytes).
650 * \return None
651 *
652 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
653 *
654 */
655 IFX_EXTERN void IfxAsclin_Lin_receiveResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length);
656
657 /** \brief Sends the header
658 * \param asclin module handle
659 * \param id the id byte which should be sent
660 * \return None
661 *
662 * A coding example of send header in polling mode can be found in \ref IfxLld_Asclin_Lin_Usage. For interrupt mode, this fuction is internally used by IfxAsclin_Lin_sendFrame API and the the polling part is bypassed.
663 *
664 */
665 IFX_EXTERN void IfxAsclin_Lin_sendHeader(IfxAsclin_Lin *asclin, uint8 *id);
666
667 /** \brief sends the response
668 * \param asclin module handle
669 * \param data Pointer to the start of data which should be sent
670 * \param length count of data (in bytes).
671 * \return None
672 *
673 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
674 *
675 */
676 IFX_EXTERN void IfxAsclin_Lin_sendResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length);
677
678 /** \} */
679
680 /** \addtogroup IfxLld_Asclin_Lin_ModuleFunctions
681 * \{ */
682
683 /******************************************************************************/
684 /*-------------------------Global Function Prototypes-------------------------*/
685 /******************************************************************************/
686
687 /** \brief Disables the module
688 * \param asclin module handle
689 * \return None
690 */
691 IFX_EXTERN void IfxAsclin_Lin_disableModule(IfxAsclin_Lin *asclin);
692
693 /** \brief Initialises the module
694 * \param asclin module handle
695 * \param config predefined configuration structure of the module
696 * \return Status
697 *
698 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
699 *
700 */
701 IFX_EXTERN IfxAsclin_Status IfxAsclin_Lin_initModule(IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config);
702
703 /** \brief Fills the config structure with default values
704 * \param config predefined configuration structure of the module
705 * \param asclin pointer to ASCLIN registers
706 * \return None
707 *
708 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
709 *
710 */
711 IFX_EXTERN void IfxAsclin_Lin_initModuleConfig(IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin);
712
713 /** \brief This API must be used in interrupt mode. It can be used to
714 * 1.Send Header
715 * 2.Send both Header and Response
716 * 3.Send Header and Receive Response
717 * \param asclin asclin module handle
718 * \param pduptr lin pdu configuration
719 * \return None
720 *
721 * A coding example of sendFrame in interrupt mode can be found in \ref IfxLld_Asclin_Lin_Usage.
722 *
723 */
724 IFX_EXTERN void IfxAsclin_Lin_sendFrame(IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr);
725
726 /** \} */
727
728 /** \addtogroup IfxLld_Asclin_Lin_errorHandlingFunctions
729 * \{ */
730
731 /******************************************************************************/
732 /*-------------------------Global Function Prototypes-------------------------*/
733 /******************************************************************************/
734
735 /** \brief checks for acknowledgement and error flags for received header
736 * \param asclin module handle
737 * \return None
738 */
739 IFX_EXTERN void IfxAsclin_Lin_checkForReceivedHeaderFlags(IfxAsclin_Lin *asclin);
740
741 /** \brief checks for acknowledgement and error flags for received response
742 * \param asclin module handle
743 * \return None
744 */
745 IFX_EXTERN void IfxAsclin_Lin_checkForReceivedResponseFlags(IfxAsclin_Lin *asclin);
746
747 /** \brief checks for acknowledgement and error flags for transmitted header
748 * \param asclin module handle
749 * \return None
750 */
751 IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedHeaderFlags(IfxAsclin_Lin *asclin);
752
753 /** \brief checks for acknowledgement and error flags for transmitted response
754 * \param asclin module handle
755 * \return None
756 */
757 IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedResponseFlags(IfxAsclin_Lin *asclin);
758
759 /** \brief clears the flags status structures
760 * \param asclin module handle
761 * \return None
762 */
763 IFX_EXTERN void IfxAsclin_Lin_clearFlagsStatus(IfxAsclin_Lin *asclin);
764
765 /** \brief waits until receive header end acknowledgemnet or an error has been detected
766 * \param asclin module handle
767 * \return Result, TRUE: if error, FALSE: is no error
768 */
769 IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedHeader(IfxAsclin_Lin *asclin);
770
771 /** \brief waits until receive response end acknowledgemnet or an error has been detected
772 * \param asclin module handle
773 * \return Result, TRUE: if error, FALSE: is no error
774 */
775 IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedResponse(IfxAsclin_Lin *asclin);
776
777 /** \brief waits until transmit header end acknowledgemnet or an error has been detected
778 * \param asclin module handle
779 * \return Result, TRUE: if error, FALSE: is no error
780 */
781 IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedHeader(IfxAsclin_Lin *asclin);
782
783 /** \brief waits until transmit response end acknowledgemnet or an error has been detected
784 * \param asclin module handle
785 * \return Result, TRUE: if error, FALSE: is no error
786 */
787 IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedResponse(IfxAsclin_Lin *asclin);
788
789 /** \} */
790
791 /** \addtogroup IfxLld_Asclin_Lin_InterruptFunctions
792 * \{ */
793
794 /******************************************************************************/
795 /*-------------------------Global Function Prototypes-------------------------*/
796 /******************************************************************************/
797
798 /** \brief ISR error routine.
799 * \param asclin module handle
800 * \return None
801 */
802 IFX_EXTERN void IfxAsclin_Lin_isrError(IfxAsclin_Lin *asclin);
803
804 /** \brief ISR receive routine.
805 * \param asclin module handle
806 * \return None
807 */
808 IFX_EXTERN void IfxAsclin_Lin_isrReceive(IfxAsclin_Lin *asclin);
809
810 /** \brief ISR transmit routine.
811 * \param asclin module handle
812 * \return None
813 */
814 IFX_EXTERN void IfxAsclin_Lin_isrTransmit(IfxAsclin_Lin *asclin);
815
816 /** \} */
817
818 /******************************************************************************/
819 /*---------------------Inline Function Implementations------------------------*/
820 /******************************************************************************/
821
822 IFX_INLINE void IfxAsclin_Lin_prepareHeaderReception(IfxAsclin_Lin *asclin)
823 {
824 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
825 IfxAsclin_clearAllFlags(asclinSFR); /* clearing all flags*/
826 IfxAsclin_flushRxFifo(asclinSFR); /* flushing Rx FIFO*/
827 IfxAsclin_enableTxFifoOutlet(asclinSFR, FALSE); /* enabling Tx FIFO for transmitting*/
828 IfxAsclin_enableRxFifoInlet(asclinSFR, TRUE); /* enabling Rx FIFO for receiving*/
829 }
830
831
832 IFX_INLINE void IfxAsclin_Lin_prepareResponseReception(IfxAsclin_Lin *asclin, uint32 length)
833 {
834 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
835 IfxAsclin_setDataLength(asclinSFR, (IfxAsclin_DataLength)(length - 1)); /* set number of bytes to be received*/
836 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags */
837 IfxAsclin_flushRxFifo(asclinSFR); /* flushing Rx FIFO */
838 IfxAsclin_enableTxFifoOutlet(asclinSFR, FALSE); /* enable Tx FIFO for transmitting */
839 IfxAsclin_enableRxFifoInlet(asclinSFR, TRUE); /* enable Rx FIFO for receiving */
840 }
841
842
843 IFX_INLINE void IfxAsclin_Lin_readHeader(IfxAsclin_Lin *asclin, uint8 *id)
844 {
845 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
846 IfxAsclin_read8(asclinSFR, id, 1U); /*reading the ID byte*/
847 }
848
849
850 IFX_INLINE void IfxAsclin_Lin_readResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
851 {
852 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
853 IfxAsclin_read8(asclinSFR, data, length); /* read the data bytes; */
854 }
855
856
857 #endif /* IFXASCLIN_LIN_H */
IfxAsclin_Lin_sendResponse
IFX_EXTERN void IfxAsclin_Lin_sendResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
sends the response
Definition: IfxAsclin_Lin.c:589
IfxAsclin_Lin_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Lin.h:475
IfxAsclin_Lin_EnabledInterrupts::exResponseTimeout
uint16 exResponseTimeout
Response Timeout.
Definition: IfxAsclin_Lin.h:355
IfxAsclin_Lin_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Lin.h:497
IfxAsclin_Lin_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Lin.h:556
IfxAsclin_Lin_sendFrame
IFX_EXTERN void IfxAsclin_Lin_sendFrame(IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Respo...
Definition: IfxAsclin_Lin.c:874
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin_Lin_DataControl
Structure for Data Control.
Definition: IfxAsclin_Lin.h:435
IfxAsclin_ReceiveBufferMode
IfxAsclin_ReceiveBufferMode
Receive buffer mode Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF.
Definition: IfxAsclin.h:256
IfxAsclin_Lin_AcknowledgementFlags::txCompleted
uint8 txCompleted
transmission completed
Definition: IfxAsclin_Lin.h:393
IfxAsclin_Lin_ErrorFlags::linAutobaudDetectionError
uint8 linAutobaudDetectionError
lin autobaud detection error
Definition: IfxAsclin_Lin.h:453
IfxAsclin_Lin_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Lin.h:498
IfxAsclin_Lin_BaudrateDetection::upperLimit
uint8 upperLimit
BRD.UPPERLIMIT, auto baudrate detection upperlimit.
Definition: IfxAsclin_Lin.h:402
IfxAsclin_Lin_Config::fifo
IfxAsclin_Lin_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Lin.h:552
IfxAsclin_Lin_FrameControlFlags::txSendHeaderOnly
uint16 txSendHeaderOnly
Flag indicating that only Header is transmitted.
Definition: IfxAsclin_Lin.h:369
IfxAsclin_Lin_EnabledInterrupts::exLinChecksumError
uint16 exLinChecksumError
Lin Checksum Error.
Definition: IfxAsclin_Lin.h:358
IfxAsclin_Lin_EnabledInterrupts::rxReceivedHeader
uint16 rxReceivedHeader
Received Header.
Definition: IfxAsclin_Lin.h:348
IfxAsclin_Lin_BitTimingControl::prescaler
uint16 prescaler
BITCON.PRESCALER, predivider to generate the baud rate.
Definition: IfxAsclin_Lin.h:429
IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse
Transmit Header and Receive Response.
Definition: IfxAsclin_Lin.h:333
IfxAsclin_Lin_BaudrateGeneration::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Lin.h:411
IfxAsclin_Lin_receiveHeader
IFX_EXTERN void IfxAsclin_Lin_receiveHeader(IfxAsclin_Lin *asclin, uint8 *id)
Receives the header.
Definition: IfxAsclin_Lin.c:516
IfxAsclin_Lin_readResponse
IFX_INLINE void IfxAsclin_Lin_readResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Reads the response.
Definition: IfxAsclin_Lin.h:850
IfxAsclin_Lin_ErrorFlags::collisionDetectionError
uint8 collisionDetectionError
collision detection error
Definition: IfxAsclin_Lin.h:455
IfxAsclin_SamplesPerBit
IfxAsclin_SamplesPerBit
Number of samples per bit, sample mode/medianfilter Definition in Ifx_ASCLIN.BITCON.B.SM.
Definition: IfxAsclin.h:345
IfxAsclin_Lin_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Lin.h:477
IfxAsclin_Lin_BaudrateGeneration::numerator
uint16 numerator
BRG.NUMERATOR, defines the numerator of fractional divider.
Definition: IfxAsclin_Lin.h:412
IfxAsclin_Lin_PduType::dataLength
uint8 dataLength
Length of LIN Response.
Definition: IfxAsclin_Lin.h:568
IfxAsclin_Lin_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Lin.h:522
IfxAsclin_Lin_receiveResponse
IFX_EXTERN void IfxAsclin_Lin_receiveResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Receives the response.
Definition: IfxAsclin_Lin.c:533
IfxAsclin_RxFifoOutletWidth
IfxAsclin_RxFifoOutletWidth
Defines the number of bytes read from the Rx FIFO with one FPI bus read Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:297
IfxAsclin_Lin_FifoControl
Structure for FIFO Control.
Definition: IfxAsclin_Lin.h:462
IfxAsclin_Lin_PduType::checksumMode
IfxAsclin_Checksum checksumMode
LIN Checksum Mode.
Definition: IfxAsclin_Lin.h:571
IfxAsclin_Lin_checkForTransmittedHeaderFlags
IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedHeaderFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted header
Definition: IfxAsclin_Lin.c:148
IfxAsclin_Lin_ErrorFlags::breakDetected
uint8 breakDetected
break detected
Definition: IfxAsclin_Lin.h:451
IfxAsclin_Lin::isInterruptMode
boolean isInterruptMode
Value to indicate if APIs work in Polling mode or Interrupt mode.
Definition: IfxAsclin_Lin.h:537
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxAsclin_Lin_Pins
Structure for LIN pin configuration.
Definition: IfxAsclin_Lin.h:516
IfxAsclin_Lin_ErrorFlags::headerTimeout
uint8 headerTimeout
header timeout
Definition: IfxAsclin_Lin.h:449
IfxAsclin_Lin_checkForReceivedResponseFlags
IFX_EXTERN void IfxAsclin_Lin_checkForReceivedResponseFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received response
Definition: IfxAsclin_Lin.c:98
float32
float float32
Definition: Platform_Types.h:170
Ifx_Assert.h
Assert functions.
IfxAsclin_Lin::receiveIdEnable
boolean receiveIdEnable
setting to receive Id in Rx Fifo after sending it
Definition: IfxAsclin_Lin.h:536
IfxAsclin_Lin_FrameControl
Structure for Frame Control.
Definition: IfxAsclin_Lin.h:471
IfxAsclin_Lin_DataControl::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Lin.h:437
IfxAsclin_StopBit
IfxAsclin_StopBit
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay. Definition in Ifx_ASCLIN.FRAMECON.B.STOP.
Definition: IfxAsclin.h:391
IfxAsclin_clearAllFlags
IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
clears all the flags
Definition: IfxAsclin.h:1595
IfxAsclin_Lin_ErrorFlags::responseTimeout
uint8 responseTimeout
response timeout
Definition: IfxAsclin_Lin.h:450
IfxAsclin_Lin_EnabledInterrupts::exTransmitFIFOOverflow
uint16 exTransmitFIFOOverflow
Transmit FIFO Overflow.
Definition: IfxAsclin_Lin.h:362
IfxAsclin_RxInputSelect
IfxAsclin_RxInputSelect
Alternate input selection for Rx signal. Definition in Ifx_ASCLIN.IOCR.B.ALTI.
Definition: IfxAsclin.h:308
IfxAsclin_Lin_ignoreHeader
IFX_EXTERN void IfxAsclin_Lin_ignoreHeader(IfxAsclin_Lin *asclin)
Ignores the latest header.
Definition: IfxAsclin_Lin.c:257
IfxAsclin_Checksum
IfxAsclin_Checksum
Defines if the classic or the enhanced checksum will be calculated by the checksum block...
Definition: IfxAsclin.h:81
IfxAsclin_Lin_Config::frame
IfxAsclin_Lin_FrameControl frame
structure for frame control
Definition: IfxAsclin_Lin.h:551
IfxAsclin_Lin_FifoControl::outWidth
IfxAsclin_RxFifoOutletWidth outWidth
RXFIFOCON.OTW, receive FIFO oulet width.
Definition: IfxAsclin_Lin.h:466
IfxAsclin_Lin_EnabledInterrupts::txTransmittedResponse
uint16 txTransmittedResponse
Transmitted Response.
Definition: IfxAsclin_Lin.h:351
IfxAsclin_Lin_initModule
IFX_EXTERN IfxAsclin_Status IfxAsclin_Lin_initModule(IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
Initialises the module.
Definition: IfxAsclin_Lin.c:266
IfxAsclin_LinMode
IfxAsclin_LinMode
Configures if the module in LIN mode operates as master or slave Definition in Ifx_ASCLIN.LIN.CON.B.MS.
Definition: IfxAsclin.h:209
IfxAsclin_Lin::acknowledgmentFlags
IfxAsclin_Lin_AcknowledgementFlags acknowledgmentFlags
structure for acknowledgement flags
Definition: IfxAsclin_Lin.h:534
IfxAsclin_Lin_isrTransmit
IFX_EXTERN void IfxAsclin_Lin_isrTransmit(IfxAsclin_Lin *asclin)
ISR transmit routine.
Definition: IfxAsclin_Lin.c:853
IfxAsclin_LinResponseTimeoutMode
IfxAsclin_LinResponseTimeoutMode
Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout...
Definition: IfxAsclin.h:218
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxAsclin_Lin_BitSamplingControl::filterDepth
uint8 filterDepth
IOCR.DEPTH, digital glitch filter depth.
Definition: IfxAsclin_Lin.h:420
IfxAsclin_Lin_PduType::direction
IfxAsclin_Lin_Direction direction
Direction Control (Tx Header only, Tx both Header and Response, Tx Header and Rx Response) ...
Definition: IfxAsclin_Lin.h:570
IfxAsclin_Lin_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
LIN Rx pin.
Definition: IfxAsclin_Lin.h:518
IfxAsclin_Lin_FrameControlFlags::rxResponseErrorOccurred
uint16 rxResponseErrorOccurred
Flag to indicate error occurred during reception of Response.
Definition: IfxAsclin_Lin.h:378
IfxAsclin_HeaderResponseSelect
IfxAsclin_HeaderResponseSelect
Defines if LIN frame shall consist of a header and response or of a header only. Definition in Ifx_AS...
Definition: IfxAsclin.h:167
IfxAsclin_Lin_ErrorFlags
Structure for Error Flags.
Definition: IfxAsclin_Lin.h:446
IfxAsclin_Lin_InterruptConfig::exPriority
uint16 exPriority
error interrupt priority
Definition: IfxAsclin_Lin.h:499
IfxAsclin_Lin_prepareHeaderReception
IFX_INLINE void IfxAsclin_Lin_prepareHeaderReception(IfxAsclin_Lin *asclin)
Prepares the module to receive the header.
Definition: IfxAsclin_Lin.h:822
IfxAsclin_Lin_FrameControlFlags::txResponseErrorOccurred
uint16 txResponseErrorOccurred
Flag to indicate error occurred during transmission of Response.
Definition: IfxAsclin_Lin.h:376
IfxAsclin_Lin_EnabledInterrupts::txTransmittedHeader
uint16 txTransmittedHeader
Transmitted Header.
Definition: IfxAsclin_Lin.h:350
IfxAsclin_Lin_FrameDataControl::rxResponseLength
uint8 rxResponseLength
Length of received response.
Definition: IfxAsclin_Lin.h:489
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxAsclin_Lin_BaudrateDetection::measured
uint8 measured
BRD.MEASURED, measured time interval between the first and the fifth falling edge of the sync byte...
Definition: IfxAsclin_Lin.h:403
IfxAsclin_Lin_EnabledInterrupts::exLinAutobaudDetectionError
uint16 exLinAutobaudDetectionError
Lin Autobaud Detection Error.
Definition: IfxAsclin_Lin.h:357
IfxAsclin_Lin::linFrameData
IfxAsclin_Lin_FrameDataControl linFrameData
Structure for Lin Frame Data and Control.
Definition: IfxAsclin_Lin.h:532
IfxAsclin_Lin_waitForReceivedHeader
IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedHeader(IfxAsclin_Lin *asclin)
waits until receive header end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:609
IfxAsclin_Lin_ErrorFlags::frameError
uint8 frameError
frame error
Definition: IfxAsclin_Lin.h:448
IfxAsclin_Lin_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
LIN Tx pin.
Definition: IfxAsclin_Lin.h:520
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxAsclin_Lin_Config::bsc
IfxAsclin_Lin_BitSamplingControl bsc
structure for bit sampling
Definition: IfxAsclin_Lin.h:550
IfxAsclin_Lin_Config::brg
IfxAsclin_Lin_BaudrateGeneration brg
structure for baudrate generation
Definition: IfxAsclin_Lin.h:547
IfxAsclin_Lin_FrameControlFlags::rxHeaderInProgress
uint16 rxHeaderInProgress
Flag to indicate Header reception is initiated and is in progress.
Definition: IfxAsclin_Lin.h:373
IfxAsclin_Lin_Pins::txMode
IfxPort_OutputMode txMode
tx as output
Definition: IfxAsclin_Lin.h:521
IfxAsclin_OversamplingFactor
IfxAsclin_OversamplingFactor
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed Defini...
Definition: IfxAsclin.h:227
IfxAsclin_Lin_EnabledInterrupts::exTransmissionCompleted
uint16 exTransmissionCompleted
Transmission Completed.
Definition: IfxAsclin_Lin.h:353
IfxAsclin_Lin_FrameControl::parityType
IfxAsclin_ParityType parityType
FRAMECON.ODD, parity type (even or odd)
Definition: IfxAsclin_Lin.h:476
IfxAsclin_Lin_ErrorFlags::linParityError
uint8 linParityError
lin parity error
Definition: IfxAsclin_Lin.h:452
IfxAsclin_Lin_AcknowledgementFlags::txResponseEnd
uint8 txResponseEnd
transmit response end
Definition: IfxAsclin_Lin.h:390
IfxAsclin_Lin_BitTimingControl
Structure for Bit Timing.
Definition: IfxAsclin_Lin.h:427
IfxAsclin_Lin_EnabledInterrupts::exBreakDetected
uint16 exBreakDetected
Break Detected.
Definition: IfxAsclin_Lin.h:352
IfxAsclin_Lin_EnabledInterrupts::exHeaderTimeout
uint16 exHeaderTimeout
Header Timeout.
Definition: IfxAsclin_Lin.h:354
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxAsclin_Lin_DataControl::responseTimeout
uint16 responseTimeout
DATCON.RESPONSE, timeout limit.
Definition: IfxAsclin_Lin.h:441
IfxAsclin_Lin_FrameControlFlags::txSendResponse
uint16 txSendResponse
Flag to indicate Response is transmitted.
Definition: IfxAsclin_Lin.h:370
IfxAsclin_LeadDelay
IfxAsclin_LeadDelay
Defines the leading delay in bit times in SPI mode. ASC mode: not applicable. LIN mode: delay between...
Definition: IfxAsclin.h:194
IfxAsclin_FrameMode
IfxAsclin_FrameMode
Defines the basic operating mode of the module. Changing the mode must be done by switching first to ...
Definition: IfxAsclin.h:156
IfxAsclin_IdleDelay
IfxAsclin_IdleDelay
Defines the duration of the IDLE delay in bit times. SPI mode: this is the idle time between the fram...
Definition: IfxAsclin.h:178
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxAsclin_Lin_PduType::pid
uint8 pid
PID of LIN Header.
Definition: IfxAsclin_Lin.h:567
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin_Lin_initModuleConfig
IFX_EXTERN void IfxAsclin_Lin_initModuleConfig(IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values.
Definition: IfxAsclin_Lin.c:439
IfxAsclin_Lin_FrameControlFlags::rxHeaderErrorOccurred
uint16 rxHeaderErrorOccurred
Flag to indicate error occurred during reception of Header.
Definition: IfxAsclin_Lin.h:377
IfxAsclin_Lin_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Lin.h:457
IfxAsclin_ClockSource
IfxAsclin_ClockSource
Selection of clock source Definition in Ifx_ASCLIN.CSR.B.CLKSEL.
Definition: IfxAsclin.h:109
IfxAsclin_DataLength
IfxAsclin_DataLength
Number of bits per transfer Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.
Definition: IfxAsclin.h:133
IfxAsclin_Lin_Config::btc
IfxAsclin_Lin_BitTimingControl btc
structure for bit timings
Definition: IfxAsclin_Lin.h:549
IfxAsclin_Lin_LinControl
Structure for lin Control.
Definition: IfxAsclin_Lin.h:506
IfxAsclin_ChecksumInjection
IfxAsclin_ChecksumInjection
Defines if the received checksum byte is written into the RXFifo or not. Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:90
IfxAsclin_Lin_FrameDataControl::txResponseLength
uint8 txResponseLength
Length of transmitted response.
Definition: IfxAsclin_Lin.h:488
IfxAsclin_Lin_ErrorFlags::linChecksumError
uint8 linChecksumError
lin checksum error
Definition: IfxAsclin_Lin.h:454
IfxAsclin_Lin_BaudrateDetection::lowerLimit
uint8 lowerLimit
BRD.LOWERLIMIT, auto baudrate detection lowerlimit.
Definition: IfxAsclin_Lin.h:401
IfxAsclin_Lin_Config::pins
IFX_CONST IfxAsclin_Lin_Pins * pins
structure for LIN pins
Definition: IfxAsclin_Lin.h:555
IfxAsclin_Lin_FrameDataControl::flags
IfxAsclin_Lin_FrameControlFlags flags
LIN frame control flags.
Definition: IfxAsclin_Lin.h:490
IfxAsclin_Lin_isrError
IFX_EXTERN void IfxAsclin_Lin_isrError(IfxAsclin_Lin *asclin)
ISR error routine.
Definition: IfxAsclin_Lin.c:708
IfxAsclin_Lin_checkForTransmittedResponseFlags
IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedResponseFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted response
Definition: IfxAsclin_Lin.c:186
IfxAsclin_Lin_Config::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
Definition: IfxAsclin_Lin.h:545
IfxAsclin_SamplePointPosition
IfxAsclin_SamplePointPosition
Sample point position Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.
Definition: IfxAsclin.h:323
IfxAsclin_Lin_Config::brd
IfxAsclin_Lin_BaudrateDetection brd
structure for baudrate detection
Definition: IfxAsclin_Lin.h:548
IfxAsclin_Lin_prepareResponseReception
IFX_INLINE void IfxAsclin_Lin_prepareResponseReception(IfxAsclin_Lin *asclin, uint32 length)
Prepares the module to Receive the response.
Definition: IfxAsclin_Lin.h:832
IfxAsclin_Lin_Config::interrupt
IfxAsclin_Lin_InterruptConfig interrupt
structure for lin interrupt configuration
Definition: IfxAsclin_Lin.h:558
IfxAsclin_Lin_BitSamplingControl::samplePointPosition
IfxAsclin_SamplePointPosition samplePointPosition
BITCON.SAMPLEPOINT, sample point position.
Definition: IfxAsclin_Lin.h:422
IfxAsclin_Lin_FrameDataControl
Structure for Frame Data and Control flags.
Definition: IfxAsclin_Lin.h:484
IfxAsclin_flushRxFifo
IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO.
Definition: IfxAsclin.h:1913
IfxAsclin_Lin_BaudrateGeneration
Structure for Baudrate Generation.
Definition: IfxAsclin_Lin.h:409
IfxAsclin_Lin_Pins::rxMode
IfxPort_InputMode rxMode
rx pin as input
Definition: IfxAsclin_Lin.h:519
IfxAsclin_Lin_Config
Configuration structure of the module.
Definition: IfxAsclin_Lin.h:542
IfxAsclin_Lin_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Lin.h:500
IfxAsclin_Lin_InterruptConfig
Structure for LIN Interrupt Configuration.
Definition: IfxAsclin_Lin.h:495
IfxAsclin_Lin::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Lin.h:531
IfxAsclin_Lin_InterruptConfig::enabledInterrupt
IfxAsclin_Lin_EnabledInterrupts enabledInterrupt
Interrupts which have to be enabled during initialisation as configured by application. Does not reflect current status of FLAGSENABLE register.
Definition: IfxAsclin_Lin.h:501
IfxAsclin_Lin_Direction_TransmitHeader
Transmit Header.
Definition: IfxAsclin_Lin.h:331
IfxAsclin_TxFifoInletWidth
IfxAsclin_TxFifoInletWidth
Defines the number of bytes written to the Tx FIFO with one FPI bus write Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:415
IfxAsclin_Lin_waitForReceivedResponse
IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedResponse(IfxAsclin_Lin *asclin)
waits until receive response end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:634
IfxAsclin_read8
uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits.
Definition: IfxAsclin.c:214
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxAsclin_Lin_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Lin.h:456
IfxAsclin_Lin_BitTimingControl::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, postdivider, used for oversampling.
Definition: IfxAsclin_Lin.h:430
IfxAsclin_Lin_BaudrateDetection::abd
boolean abd
LINCON.ABD, autobaud detection enable.
Definition: IfxAsclin_Lin.h:400
IfxAsclin_Lin_Direction
IfxAsclin_Lin_Direction
Defines the type of Lin Master Frame. (Transmit Header only) or (Transmit Header and Response) or (Tr...
Definition: IfxAsclin_Lin.h:329
IfxAsclin_Lin_disableModule
IFX_EXTERN void IfxAsclin_Lin_disableModule(IfxAsclin_Lin *asclin)
Disables the module.
Definition: IfxAsclin_Lin.c:247
IfxAsclin_Lin_sendHeader
IFX_EXTERN void IfxAsclin_Lin_sendHeader(IfxAsclin_Lin *asclin, uint8 *id)
Sends the header.
Definition: IfxAsclin_Lin.c:550
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxAsclin_Lin_BaudrateGeneration::denominator
uint16 denominator
BRG.DENOMINATOR, defines the denominator of fractional divider.
Definition: IfxAsclin_Lin.h:413
IfxAsclin_Lin_AcknowledgementFlags::rxHeaderEnd
uint8 rxHeaderEnd
receive header end
Definition: IfxAsclin_Lin.h:391
IfxAsclin_enableTxFifoOutlet
IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission.
Definition: IfxAsclin.h:1889
IfxAsclin_Lin_EnabledInterrupts::rxReceivedResponse
uint16 rxReceivedResponse
Received Response.
Definition: IfxAsclin_Lin.h:349
IfxAsclin_Lin_FrameControlFlags::rxResponseInProgress
uint16 rxResponseInProgress
Flag to indicate Response reception is initiated and is in progress.
Definition: IfxAsclin_Lin.h:374
IfxAsclin_Lin_FrameControl::parityEnable
boolean parityEnable
FRAMECON.PEN, parity enable.
Definition: IfxAsclin_Lin.h:478
IfxAsclin_Lin_Config::data
IfxAsclin_Lin_DataControl data
structure for data control
Definition: IfxAsclin_Lin.h:553
IfxAsclin_Lin_FrameControl::leadDelay
IfxAsclin_LeadDelay leadDelay
FRAMECON.LEAD, lead delay.
Definition: IfxAsclin_Lin.h:474
IfxAsclin_Lin::errorFlagsStatus
IfxAsclin_Lin_ErrorFlags errorFlagsStatus
structure for error flags status
Definition: IfxAsclin_Lin.h:535
IfxAsclin_ShiftDirection
IfxAsclin_ShiftDirection
SPI mode: defines the shift direction of the shift register. ASC and LIN mode: should be set to 0...
Definition: IfxAsclin.h:355
IfxAsclin_Lin_FrameDataControl::headerID
uint8 headerID
header ID
Definition: IfxAsclin_Lin.h:487
IfxAsclin_Lin_FrameControlFlags::txHeaderErrorOccurred
uint16 txHeaderErrorOccurred
Flag to indicate error occurred during transmission of Header.
Definition: IfxAsclin_Lin.h:375
IfxAsclin_Lin_Config::lin
IfxAsclin_Lin_LinControl lin
structure for lin control
Definition: IfxAsclin_Lin.h:554
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxAsclin_Lin_EnabledInterrupts::exCollisionDetectionError
uint16 exCollisionDetectionError
Collision Detection Error.
Definition: IfxAsclin_Lin.h:360
IfxAsclin_Lin_LinControl::csEnable
boolean csEnable
LINCON.CSEN, hardware checksum generation and checking.
Definition: IfxAsclin_Lin.h:508
IfxAsclin_enableRxFifoInlet
IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register...
Definition: IfxAsclin.h:1847
IfxAsclin_Lin_BitSamplingControl
Structure for Bit Sampling.
Definition: IfxAsclin_Lin.h:418
IfxAsclin_Lin_DataControl::headerOnly
IfxAsclin_HeaderResponseSelect headerOnly
DATCON.HO, Lin frame with header and response or header only.
Definition: IfxAsclin_Lin.h:438
IfxAsclin_Lin_isrReceive
IFX_EXTERN void IfxAsclin_Lin_isrReceive(IfxAsclin_Lin *asclin)
ISR receive routine.
Definition: IfxAsclin_Lin.c:830
IfxAsclin_Lin_waitForTransmittedResponse
IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedResponse(IfxAsclin_Lin *asclin)
waits until transmit response end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:684
IfxAsclin_Lin_EnabledInterrupts
Structure to store interrupts which are enabled during initialisation.
Definition: IfxAsclin_Lin.h:346
IfxAsclin_Lin_checkForReceivedHeaderFlags
IFX_EXTERN void IfxAsclin_Lin_checkForReceivedHeaderFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received header
Definition: IfxAsclin_Lin.c:54
IfxAsclin_Lin_DataControl::checksum
IfxAsclin_Checksum checksum
DATCON.CSM, checksum mode (classic or enhanced)
Definition: IfxAsclin_Lin.h:440
IfxAsclin_Lin_Direction_TransmitHeaderAndResponse
Transmit both Header and Response.
Definition: IfxAsclin_Lin.h:332
IfxAsclin_Lin
Definition: IfxAsclin_Lin.h:529
IfxAsclin_ParityType
IfxAsclin_ParityType
Type of parity bit attached to data bits Definition in Ifx_ASCLIN.FRAMECON.B.ODD. ...
Definition: IfxAsclin.h:247
IfxAsclin_Lin_clearFlagsStatus
IFX_EXTERN void IfxAsclin_Lin_clearFlagsStatus(IfxAsclin_Lin *asclin)
clears the flags status structures
Definition: IfxAsclin_Lin.c:224
IfxAsclin_Lin_AcknowledgementFlags::txHeaderEnd
uint8 txHeaderEnd
transmit header end
Definition: IfxAsclin_Lin.h:389
IfxAsclin_Lin_readHeader
IFX_INLINE void IfxAsclin_Lin_readHeader(IfxAsclin_Lin *asclin, uint8 *id)
Reads the header.
Definition: IfxAsclin_Lin.h:843
IfxAsclin_Lin_Config::alti
IfxAsclin_RxInputSelect alti
IOCR.ALTI, Rx input (alternate input) pin selection.
Definition: IfxAsclin_Lin.h:557
IfxAsclin_Lin_AcknowledgementFlags
Structure for Acknowledgement Flags.
Definition: IfxAsclin_Lin.h:387
IfxAsclin_Lin::linMode
IfxAsclin_LinMode linMode
LINCON.MS, lin mode of operation (master or slave)
Definition: IfxAsclin_Lin.h:533
IfxAsclin_Lin_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Lin.h:473
IfxAsclin_Lin_LinControl::csi
IfxAsclin_ChecksumInjection csi
LINCON.CSI, checksum injection (not written or written) into RxFIFO.
Definition: IfxAsclin_Lin.h:509
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxAsclin.h
ASCLIN basic functionality.
IfxAsclin_Lin_FrameControl::collisionDetectionEnable
boolean collisionDetectionEnable
FRAMECON.CEN, collision detection enable.
Definition: IfxAsclin_Lin.h:479
IfxAsclin_Lin_waitForTransmittedHeader
IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedHeader(IfxAsclin_Lin *asclin)
waits until transmit header end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:660
IfxAsclin_Lin_EnabledInterrupts::exReceiveFIFOOverflow
uint16 exReceiveFIFOOverflow
Receive FIFO Overflow.
Definition: IfxAsclin_Lin.h:361
IfxAsclin_Lin_AcknowledgementFlags::rxResponseEnd
uint8 rxResponseEnd
receive response end
Definition: IfxAsclin_Lin.h:392
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxAsclin_Lin_EnabledInterrupts::exLinParityError
uint16 exLinParityError
Lin Parity Error.
Definition: IfxAsclin_Lin.h:356
IfxAsclin_Lin_FrameControlFlags
Structure for Lin Frame Control flags.
Definition: IfxAsclin_Lin.h:367
IfxAsclin_Lin_DataControl::responseTimeoutMode
IfxAsclin_LinResponseTimeoutMode responseTimeoutMode
DATCON.RM, response mode (response or frame timeout threshold)
Definition: IfxAsclin_Lin.h:439
IfxAsclin_Lin_BaudrateDetection
Structure for Baudrate Detection.
Definition: IfxAsclin_Lin.h:398
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:382
IfxAsclin_Lin_BitSamplingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, no. of samples per bit 1 or 3.
Definition: IfxAsclin_Lin.h:421
IfxAsclin_Lin_FrameControlFlags::txResponseInProgress
uint16 txResponseInProgress
Flag to indicate Response transmission is initiated and is in progress.
Definition: IfxAsclin_Lin.h:372
IfxAsclin_Lin_LinControl::breakLength
uint8 breakLength
LINBTIMER.BREAK, break pulse generation and detection length.
Definition: IfxAsclin_Lin.h:510
IfxAsclin_Lin_PduType
Structure to hold Lin Pdu data.
Definition: IfxAsclin_Lin.h:565
IfxAsclin_Lin_FrameControlFlags::txHeaderInProgress
uint16 txHeaderInProgress
Flag to indicate Header transmission is initiated and is in progress.
Definition: IfxAsclin_Lin.h:371
IfxAsclin_Lin_PduType::dataPtr
uint8 * dataPtr
Pointer for LIN Response data.
Definition: IfxAsclin_Lin.h:569
IfxAsclin_Lin_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
Definition: IfxAsclin_Lin.h:464
IfxAsclin_setDataLength
IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer)
Definition: IfxAsclin.h:2222
IfxAsclin_Lin_EnabledInterrupts::exFramingError
uint16 exFramingError
Framing Error.
Definition: IfxAsclin_Lin.h:359
IfxAsclin_Lin_FifoControl::inWidth
IfxAsclin_TxFifoInletWidth inWidth
TXFIFOCON.INW, transmit FIFO inlet width.
Definition: IfxAsclin_Lin.h:465


iLLD_TC26B: IfxAsclin_PinMap.c Source File

  • _PinMap
IfxAsclin_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_PinMap.c
3 * \brief ASCLIN I/O map
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxAsclin_PinMap.h"
44
45 IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 9}, Ifx_RxSel_a};
46 IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 7}, Ifx_RxSel_a};
47 IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN = {&MODULE_ASCLIN1, {&MODULE_P32, 4}, Ifx_RxSel_b};
48 IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 7}, Ifx_RxSel_a};
49 IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 5}, Ifx_RxSel_b};
50 IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN = {&MODULE_ASCLIN3, {&MODULE_P00,12}, Ifx_RxSel_a};
51 IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt2};
52 IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt2};
53 IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt2};
54 IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt2};
55 IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt2};
56 IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt3};
57 IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, Ifx_RxSel_a};
58 IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, Ifx_RxSel_b};
59 IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, Ifx_RxSel_a};
60 IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, Ifx_RxSel_b};
61 IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 9}, Ifx_RxSel_c};
62 IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN = {&MODULE_ASCLIN1, {&MODULE_P14, 8}, Ifx_RxSel_d};
63 IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN = {&MODULE_ASCLIN1, {&MODULE_P11,10}, Ifx_RxSel_e};
64 IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN = {&MODULE_ASCLIN1, {&MODULE_P33,13}, Ifx_RxSel_f};
65 IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN = {&MODULE_ASCLIN1, {&MODULE_P02, 3}, Ifx_RxSel_g};
66 IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, Ifx_RxSel_a};
67 IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 1}, Ifx_RxSel_b};
68 IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, Ifx_RxSel_d};
69 IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, Ifx_RxSel_e};
70 IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, Ifx_RxSel_g};
71 IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, Ifx_RxSel_a};
72 IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, Ifx_RxSel_c};
73 IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, Ifx_RxSel_d};
74 IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, Ifx_RxSel_e};
75 IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, Ifx_RxSel_f};
76 IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt6};
77 IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt6};
78 IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt6};
79 IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt6};
80 IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,11}, IfxPort_OutputIdx_alt2};
81 IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt4};
82 IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt2};
83 IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt2};
84 IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt6};
85 IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt2};
86 IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt4};
87 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt2};
88 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt2};
89 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt6};
90 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt6};
91 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt3};
92 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt2};
93 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt3};
94 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt4};
95 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt2};
96 IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT = {&MODULE_ASCLIN1, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt4};
97 IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt2};
98 IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,10}, IfxPort_OutputIdx_alt4};
99 IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt2};
100 IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt6};
101 IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt2};
102 IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt2};
103 IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt5};
104 IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt2};
105 IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt2};
106 IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt2};
107 IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt2};
108 IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt2};
109 IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt2};
110 IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt2};
111 IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT = {&MODULE_ASCLIN1, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt2};
112 IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P11,12}, IfxPort_OutputIdx_alt2};
113 IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P14,10}, IfxPort_OutputIdx_alt4};
114 IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt2};
115 IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt2};
116 IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt2};
117 IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt2};
118 IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt2};
119 IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt2};
120 IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,13}, IfxPort_OutputIdx_alt2};
121 IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt2};
122 IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt2};
123 IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt2};
124 IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt2};
125 IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt2};
126 IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt2};
127 IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt3};
128 IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt2};
129 IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt2};
130 IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt2};
131 IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt2};
132 IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt2};
133 IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt2};
134 IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt2};
135 IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt2};
136
137
138 const IfxAsclin_Cts_In *IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS] = {
139 {
140 &IfxAsclin0_CTSA_P14_9_IN,
141 NULL_PTR
142 },
143 {
144 &IfxAsclin1_CTSA_P20_7_IN,
145 &IfxAsclin1_CTSB_P32_4_IN
146 },
147 {
148 &IfxAsclin2_CTSA_P10_7_IN,
149 &IfxAsclin2_CTSB_P33_5_IN
150 },
151 {
152 &IfxAsclin3_CTSA_P00_12_IN,
153 NULL_PTR
154 }
155 };
156
157 const IfxAsclin_Rts_Out *IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS] = {
158 {
159 &IfxAsclin0_RTS_P14_7_OUT,
160 NULL_PTR
161 },
162 {
163 &IfxAsclin1_RTS_P20_6_OUT,
164 &IfxAsclin1_RTS_P23_1_OUT
165 },
166 {
167 &IfxAsclin2_RTS_P10_8_OUT,
168 &IfxAsclin2_RTS_P33_4_OUT
169 },
170 {
171 &IfxAsclin3_RTS_P00_9_OUT,
172 NULL_PTR
173 }
174 };
175
176 const IfxAsclin_Rx_In *IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS] = {
177 {
178 &IfxAsclin0_RXA_P14_1_IN,
179 &IfxAsclin0_RXB_P15_3_IN,
180 NULL_PTR,
181 NULL_PTR,
182 NULL_PTR,
183 NULL_PTR,
184 NULL_PTR
185 },
186 {
187 &IfxAsclin1_RXA_P15_1_IN,
188 &IfxAsclin1_RXB_P15_5_IN,
189 &IfxAsclin1_RXC_P20_9_IN,
190 &IfxAsclin1_RXD_P14_8_IN,
191 &IfxAsclin1_RXE_P11_10_IN,
192 &IfxAsclin1_RXF_P33_13_IN,
193 &IfxAsclin1_RXG_P02_3_IN
194 },
195 {
196 &IfxAsclin2_RXA_P14_3_IN,
197 &IfxAsclin2_RXB_P02_1_IN,
198 NULL_PTR,
199 &IfxAsclin2_RXD_P10_6_IN,
200 &IfxAsclin2_RXE_P33_8_IN,
201 NULL_PTR,
202 &IfxAsclin2_RXG_P02_0_IN
203 },
204 {
205 &IfxAsclin3_RXA_P15_7_IN,
206 NULL_PTR,
207 &IfxAsclin3_RXC_P20_3_IN,
208 &IfxAsclin3_RXD_P32_2_IN,
209 &IfxAsclin3_RXE_P00_1_IN,
210 &IfxAsclin3_RXF_P21_6_IN,
211 NULL_PTR
212 }
213 };
214
215 const IfxAsclin_Sclk_Out *IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS] = {
216 {
217 &IfxAsclin0_SCLK_P14_0_OUT,
218 &IfxAsclin0_SCLK_P15_2_OUT,
219 NULL_PTR,
220 NULL_PTR,
221 NULL_PTR,
222 NULL_PTR,
223 NULL_PTR,
224 NULL_PTR,
225 NULL_PTR
226 },
227 {
228 &IfxAsclin1_SCLK_P15_0_OUT,
229 &IfxAsclin1_SCLK_P20_10_OUT,
230 &IfxAsclin1_SCLK_P33_11_OUT,
231 &IfxAsclin1_SCLK_P33_12_OUT,
232 NULL_PTR,
233 NULL_PTR,
234 NULL_PTR,
235 NULL_PTR,
236 NULL_PTR
237 },
238 {
239 &IfxAsclin2_SCLK_P02_4_OUT,
240 &IfxAsclin2_SCLK_P10_6_OUT,
241 &IfxAsclin2_SCLK_P14_2_OUT,
242 &IfxAsclin2_SCLK_P33_7_OUT,
243 &IfxAsclin2_SCLK_P33_9_OUT,
244 NULL_PTR,
245 NULL_PTR,
246 NULL_PTR,
247 NULL_PTR
248 },
249 {
250 &IfxAsclin3_SCLK_P00_0_OUT,
251 &IfxAsclin3_SCLK_P00_2_OUT,
252 &IfxAsclin3_SCLK_P15_6_OUT,
253 &IfxAsclin3_SCLK_P15_8_OUT,
254 &IfxAsclin3_SCLK_P20_0_OUT,
255 &IfxAsclin3_SCLK_P21_5_OUT,
256 &IfxAsclin3_SCLK_P21_7_OUT,
257 &IfxAsclin3_SCLK_P32_3_OUT,
258 &IfxAsclin3_SCLK_P33_2_OUT
259 }
260 };
261
262 const IfxAsclin_Slso_Out *IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS] = {
263 {
264 NULL_PTR,
265 NULL_PTR,
266 NULL_PTR,
267 NULL_PTR,
268 NULL_PTR
269 },
270 {
271 &IfxAsclin1_SLSO_P14_3_OUT,
272 &IfxAsclin1_SLSO_P20_8_OUT,
273 &IfxAsclin1_SLSO_P33_10_OUT,
274 NULL_PTR,
275 NULL_PTR
276 },
277 {
278 &IfxAsclin2_SLSO_P02_3_OUT,
279 &IfxAsclin2_SLSO_P10_5_OUT,
280 &IfxAsclin2_SLSO_P33_6_OUT,
281 NULL_PTR,
282 NULL_PTR
283 },
284 {
285 &IfxAsclin3_SLSO_P00_3_OUT,
286 &IfxAsclin3_SLSO_P14_3_OUT,
287 &IfxAsclin3_SLSO_P21_2_OUT,
288 &IfxAsclin3_SLSO_P21_6_OUT,
289 &IfxAsclin3_SLSO_P33_1_OUT
290 }
291 };
292
293 const IfxAsclin_Tx_Out *IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS] = {
294 {
295 &IfxAsclin0_TX_P14_0_OUT,
296 &IfxAsclin0_TX_P14_1_OUT,
297 &IfxAsclin0_TX_P15_2_OUT,
298 &IfxAsclin0_TX_P15_3_OUT,
299 NULL_PTR,
300 NULL_PTR,
301 NULL_PTR,
302 NULL_PTR,
303 NULL_PTR,
304 NULL_PTR
305 },
306 {
307 &IfxAsclin1_TX_P02_2_OUT,
308 &IfxAsclin1_TX_P11_12_OUT,
309 &IfxAsclin1_TX_P14_10_OUT,
310 &IfxAsclin1_TX_P15_0_OUT,
311 &IfxAsclin1_TX_P15_1_OUT,
312 &IfxAsclin1_TX_P15_4_OUT,
313 &IfxAsclin1_TX_P15_5_OUT,
314 &IfxAsclin1_TX_P20_10_OUT,
315 &IfxAsclin1_TX_P33_12_OUT,
316 &IfxAsclin1_TX_P33_13_OUT
317 },
318 {
319 &IfxAsclin2_TX_P02_0_OUT,
320 &IfxAsclin2_TX_P10_5_OUT,
321 &IfxAsclin2_TX_P14_2_OUT,
322 &IfxAsclin2_TX_P14_3_OUT,
323 &IfxAsclin2_TX_P33_8_OUT,
324 &IfxAsclin2_TX_P33_9_OUT,
325 NULL_PTR,
326 NULL_PTR,
327 NULL_PTR,
328 NULL_PTR
329 },
330 {
331 &IfxAsclin3_TX_P00_0_OUT,
332 &IfxAsclin3_TX_P00_1_OUT,
333 &IfxAsclin3_TX_P15_6_OUT,
334 &IfxAsclin3_TX_P15_7_OUT,
335 &IfxAsclin3_TX_P20_0_OUT,
336 &IfxAsclin3_TX_P20_3_OUT,
337 &IfxAsclin3_TX_P21_7_OUT,
338 &IfxAsclin3_TX_P32_2_OUT,
339 &IfxAsclin3_TX_P32_3_OUT,
340 NULL_PTR
341 }
342 };
IfxAsclin1_TX_P33_13_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT
Definition: IfxAsclin_PinMap.c:120
IfxAsclin_Cts_In
CTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:56
IfxAsclin_Slso_Out_pinTable
const IfxAsclin_Slso_Out * IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:262
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin1_SCLK_P20_10_OUT
IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT
Definition: IfxAsclin_PinMap.c:79
IfxAsclin3_SLSO_P21_2_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT
Definition: IfxAsclin_PinMap.c:104
IfxAsclin3_TX_P20_3_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT
Definition: IfxAsclin_PinMap.c:132
Ifx_RxSel_e
Definition: Ifx_Types.h:133
IfxAsclin3_TX_P21_7_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT
Definition: IfxAsclin_PinMap.c:133
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxAsclin2_SLSO_P33_6_OUT
IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT
Definition: IfxAsclin_PinMap.c:101
IfxAsclin1_TX_P20_10_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT
Definition: IfxAsclin_PinMap.c:118
IfxAsclin2_TX_P14_3_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT
Definition: IfxAsclin_PinMap.c:124
IfxAsclin_Rx_In_pinTable
const IfxAsclin_Rx_In * IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:176
IfxAsclin0_RXA_P14_1_IN
IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN
Definition: IfxAsclin_PinMap.c:57
IfxAsclin1_RXB_P15_5_IN
IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN
Definition: IfxAsclin_PinMap.c:60
IfxAsclin1_SCLK_P33_11_OUT
IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT
Definition: IfxAsclin_PinMap.c:80
IfxAsclin2_RXB_P02_1_IN
IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN
Definition: IfxAsclin_PinMap.c:67
IfxAsclin1_TX_P15_4_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT
Definition: IfxAsclin_PinMap.c:116
Ifx_RxSel_g
Definition: Ifx_Types.h:135
IfxAsclin_Sclk_Out
SCLK pin mapping structure.
Definition: IfxAsclin_PinMap.h:80
IfxAsclin1_CTSB_P32_4_IN
IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN
Definition: IfxAsclin_PinMap.c:47
IfxAsclin1_TX_P02_2_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT
Definition: IfxAsclin_PinMap.c:111
IfxAsclin3_TX_P00_0_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT
Definition: IfxAsclin_PinMap.c:127
IfxAsclin1_SCLK_P15_0_OUT
IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT
Definition: IfxAsclin_PinMap.c:78
IfxAsclin2_RXG_P02_0_IN
IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN
Definition: IfxAsclin_PinMap.c:70
IfxAsclin1_TX_P33_12_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT
Definition: IfxAsclin_PinMap.c:119
IfxAsclin2_RXA_P14_3_IN
IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN
Definition: IfxAsclin_PinMap.c:66
IfxAsclin2_CTSA_P10_7_IN
IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN
Definition: IfxAsclin_PinMap.c:48
IfxAsclin1_TX_P15_1_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT
Definition: IfxAsclin_PinMap.c:115
IfxAsclin1_RXG_P02_3_IN
IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN
Definition: IfxAsclin_PinMap.c:65
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:121
IfxAsclin_Slso_Out
SLSO pin mapping structure.
Definition: IfxAsclin_PinMap.h:88
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxAsclin1_RXE_P11_10_IN
IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN
Definition: IfxAsclin_PinMap.c:63
IfxAsclin1_TX_P11_12_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT
Definition: IfxAsclin_PinMap.c:112
IfxAsclin_Sclk_Out_pinTable
const IfxAsclin_Sclk_Out * IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:215
IfxAsclin1_RTS_P23_1_OUT
IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT
Definition: IfxAsclin_PinMap.c:53
IfxAsclin2_SCLK_P02_4_OUT
IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT
Definition: IfxAsclin_PinMap.c:82
IfxAsclin3_SCLK_P21_5_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT
Definition: IfxAsclin_PinMap.c:92
IfxAsclin3_TX_P20_0_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT
Definition: IfxAsclin_PinMap.c:131
IfxAsclin1_SLSO_P14_3_OUT
IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT
Definition: IfxAsclin_PinMap.c:96
IfxAsclin0_TX_P14_0_OUT
IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT
Definition: IfxAsclin_PinMap.c:107
IfxAsclin0_CTSA_P14_9_IN
IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN
Definition: IfxAsclin_PinMap.c:45
IfxAsclin1_SCLK_P33_12_OUT
IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT
Definition: IfxAsclin_PinMap.c:81
IfxAsclin3_SCLK_P00_2_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT
Definition: IfxAsclin_PinMap.c:88
IfxAsclin2_RTS_P10_8_OUT
IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT
Definition: IfxAsclin_PinMap.c:54
IfxAsclin_PinMap.h
ASCLIN I/O map.
IfxAsclin2_SLSO_P02_3_OUT
IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT
Definition: IfxAsclin_PinMap.c:99
IfxAsclin_Rts_Out_pinTable
const IfxAsclin_Rts_Out * IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:157
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:201
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxAsclin3_SCLK_P20_0_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT
Definition: IfxAsclin_PinMap.c:91
IfxAsclin2_RXD_P10_6_IN
IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN
Definition: IfxAsclin_PinMap.c:68
IfxAsclin2_TX_P33_8_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT
Definition: IfxAsclin_PinMap.c:125
IfxAsclin3_SLSO_P21_6_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT
Definition: IfxAsclin_PinMap.c:105
IfxAsclin2_RTS_P33_4_OUT
IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT
Definition: IfxAsclin_PinMap.c:55
IfxAsclin3_RTS_P00_9_OUT
IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT
Definition: IfxAsclin_PinMap.c:56
IfxAsclin1_TX_P15_0_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT
Definition: IfxAsclin_PinMap.c:114
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:125
IfxAsclin1_RTS_P20_6_OUT
IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT
Definition: IfxAsclin_PinMap.c:52
IfxAsclin3_SCLK_P00_0_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT
Definition: IfxAsclin_PinMap.c:87
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:122
IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:202
IfxAsclin2_SCLK_P33_7_OUT
IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT
Definition: IfxAsclin_PinMap.c:85
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin3_SCLK_P33_2_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT
Definition: IfxAsclin_PinMap.c:95
IfxAsclin3_RXE_P00_1_IN
IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN
Definition: IfxAsclin_PinMap.c:74
IfxAsclin3_RXC_P20_3_IN
IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN
Definition: IfxAsclin_PinMap.c:72
IfxAsclin_Rts_Out
RTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:72
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxAsclin2_SCLK_P14_2_OUT
IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT
Definition: IfxAsclin_PinMap.c:84
IfxAsclin1_SLSO_P20_8_OUT
IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT
Definition: IfxAsclin_PinMap.c:97
IfxAsclin1_RXF_P33_13_IN
IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN
Definition: IfxAsclin_PinMap.c:64
IfxAsclin1_CTSA_P20_7_IN
IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN
Definition: IfxAsclin_PinMap.c:46
IfxAsclin3_TX_P32_3_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT
Definition: IfxAsclin_PinMap.c:135
IfxAsclin2_TX_P10_5_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT
Definition: IfxAsclin_PinMap.c:122
IfxAsclin3_SLSO_P14_3_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT
Definition: IfxAsclin_PinMap.c:103
IfxAsclin0_SCLK_P14_0_OUT
IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT
Definition: IfxAsclin_PinMap.c:76
IfxAsclin1_RXD_P14_8_IN
IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN
Definition: IfxAsclin_PinMap.c:62
IfxAsclin3_CTSA_P00_12_IN
IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN
Definition: IfxAsclin_PinMap.c:50
IfxAsclin1_RXA_P15_1_IN
IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN
Definition: IfxAsclin_PinMap.c:59
IfxAsclin1_TX_P14_10_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT
Definition: IfxAsclin_PinMap.c:113
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:123
IfxAsclin3_SLSO_P33_1_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT
Definition: IfxAsclin_PinMap.c:106
IFXASCLIN_PINMAP_NUM_MODULES
#define IFXASCLIN_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxAsclin_PinMap.h:196
IfxAsclin2_SCLK_P10_6_OUT
IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT
Definition: IfxAsclin_PinMap.c:83
IfxAsclin2_TX_P14_2_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT
Definition: IfxAsclin_PinMap.c:123
IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS
#define IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:197
IfxAsclin3_TX_P32_2_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT
Definition: IfxAsclin_PinMap.c:134
IfxAsclin2_CTSB_P33_5_IN
IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN
Definition: IfxAsclin_PinMap.c:49
IfxAsclin0_RTS_P14_7_OUT
IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT
Definition: IfxAsclin_PinMap.c:51
Ifx_RxSel_f
Definition: Ifx_Types.h:134
IfxAsclin2_SLSO_P10_5_OUT
IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT
Definition: IfxAsclin_PinMap.c:100
IfxAsclin2_RXE_P33_8_IN
IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN
Definition: IfxAsclin_PinMap.c:69
IfxAsclin3_RXD_P32_2_IN
IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN
Definition: IfxAsclin_PinMap.c:73
IfxAsclin3_SCLK_P15_6_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT
Definition: IfxAsclin_PinMap.c:89
IfxAsclin0_TX_P14_1_OUT
IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT
Definition: IfxAsclin_PinMap.c:108
IfxAsclin3_TX_P00_1_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT
Definition: IfxAsclin_PinMap.c:128
IfxAsclin0_SCLK_P15_2_OUT
IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT
Definition: IfxAsclin_PinMap.c:77
IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:200
IfxAsclin_Tx_Out_pinTable
const IfxAsclin_Tx_Out * IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:293
IfxAsclin3_SLSO_P00_3_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT
Definition: IfxAsclin_PinMap.c:102
IfxAsclin2_TX_P33_9_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT
Definition: IfxAsclin_PinMap.c:126
IfxAsclin_Cts_In_pinTable
const IfxAsclin_Cts_In * IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:138
IfxAsclin0_RXB_P15_3_IN
IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN
Definition: IfxAsclin_PinMap.c:58
IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:198
IfxAsclin2_SCLK_P33_9_OUT
IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT
Definition: IfxAsclin_PinMap.c:86
IfxAsclin3_SCLK_P15_8_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT
Definition: IfxAsclin_PinMap.c:90
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:124
IfxAsclin3_RXA_P15_7_IN
IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN
Definition: IfxAsclin_PinMap.c:71
IfxAsclin2_TX_P02_0_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT
Definition: IfxAsclin_PinMap.c:121
IfxAsclin3_SCLK_P21_7_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT
Definition: IfxAsclin_PinMap.c:93
IfxAsclin0_TX_P15_3_OUT
IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT
Definition: IfxAsclin_PinMap.c:110
IfxAsclin1_RXC_P20_9_IN
IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN
Definition: IfxAsclin_PinMap.c:61
IfxAsclin3_SCLK_P32_3_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT
Definition: IfxAsclin_PinMap.c:94
IfxAsclin0_TX_P15_2_OUT
IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT
Definition: IfxAsclin_PinMap.c:109
IfxAsclin1_SLSO_P33_10_OUT
IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT
Definition: IfxAsclin_PinMap.c:98
IfxAsclin3_TX_P15_6_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT
Definition: IfxAsclin_PinMap.c:129
IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS
#define IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:199
IfxAsclin1_TX_P15_5_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT
Definition: IfxAsclin_PinMap.c:117
IfxAsclin3_RXF_P21_6_IN
IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN
Definition: IfxAsclin_PinMap.c:75
IfxAsclin3_TX_P15_7_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT
Definition: IfxAsclin_PinMap.c:130


iLLD_TC26B: IfxAsclin_PinMap.h Source File

  • _PinMap
IfxAsclin_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_PinMap.h
3 * \brief ASCLIN I/O map
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Asclin_pinmap ASCLIN Pin Mapping
42 * \ingroup IfxLld_Asclin
43 */
44
45 #ifndef IFXASCLIN_PINMAP_H
46 #define IFXASCLIN_PINMAP_H
47
48 #include <IfxAsclin_reg.h>
49 #include <_Impl/IfxAsclin_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Asclin_pinmap
53 * \{ */
54
55 /** \brief CTS pin mapping structure */
56 typedef const struct
57 {
58 Ifx_ASCLIN* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel select; /**< \brief Input multiplexer value */
61 } IfxAsclin_Cts_In;
62
63 /** \brief RX pin mapping structure */
64 typedef const struct
65 {
66 Ifx_ASCLIN* module; /**< \brief Base address */
67 IfxPort_Pin pin; /**< \brief Port pin */
68 Ifx_RxSel select; /**< \brief Input multiplexer value */
69 } IfxAsclin_Rx_In;
70
71 /** \brief RTS pin mapping structure */
72 typedef const struct
73 {
74 Ifx_ASCLIN* module; /**< \brief Base address */
75 IfxPort_Pin pin; /**< \brief Port pin */
76 IfxPort_OutputIdx select; /**< \brief Port control code */
77 } IfxAsclin_Rts_Out;
78
79 /** \brief SCLK pin mapping structure */
80 typedef const struct
81 {
82 Ifx_ASCLIN* module; /**< \brief Base address */
83 IfxPort_Pin pin; /**< \brief Port pin */
84 IfxPort_OutputIdx select; /**< \brief Port control code */
85 } IfxAsclin_Sclk_Out;
86
87 /** \brief SLSO pin mapping structure */
88 typedef const struct
89 {
90 Ifx_ASCLIN* module; /**< \brief Base address */
91 IfxPort_Pin pin; /**< \brief Port pin */
92 IfxPort_OutputIdx select; /**< \brief Port control code */
93 } IfxAsclin_Slso_Out;
94
95 /** \brief TX pin mapping structure */
96 typedef const struct
97 {
98 Ifx_ASCLIN* module; /**< \brief Base address */
99 IfxPort_Pin pin; /**< \brief Port pin */
100 IfxPort_OutputIdx select; /**< \brief Port control code */
101 } IfxAsclin_Tx_Out;
102
103 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN; /**< \brief ASCLIN0_CTSA: ASCLIN0 input */
104 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN; /**< \brief ASCLIN1_CTSA: ASCLIN1 input */
105 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN; /**< \brief ASCLIN1_CTSB: ASCLIN1 input */
106 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN; /**< \brief ASCLIN2_CTSA: ASCLIN2 input */
107 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN; /**< \brief ASCLIN2_CTSB: ASCLIN2 input */
108 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN; /**< \brief ASCLIN3_CTSA: ASCLIN3 input */
109 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT; /**< \brief ASCLIN0_RTS: ASCLIN0 output */
110 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT; /**< \brief ASCLIN1_RTS: ASCLIN1 output */
111 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT; /**< \brief ASCLIN1_RTS: ASCLIN1 output */
112 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT; /**< \brief ASCLIN2_RTS: ASCLIN2 output */
113 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT; /**< \brief ASCLIN2_RTS: ASCLIN2 output */
114 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT; /**< \brief ASCLIN3_RTS: ASCLIN3 output */
115 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN; /**< \brief ASCLIN0_RXA: ASCLIN0 input */
116 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN; /**< \brief ASCLIN0_RXB: ASCLIN0 input */
117 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN; /**< \brief ASCLIN1_RXA: ASCLIN1 input */
118 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN; /**< \brief ASCLIN1_RXB: ASCLIN1 input */
119 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN; /**< \brief ASCLIN1_RXC: ASCLIN1 input */
120 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN; /**< \brief ASCLIN1_RXD: ASCLIN1 input */
121 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN; /**< \brief ASCLIN1_RXE: ASCLIN1 input */
122 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN; /**< \brief ASCLIN1_RXF: ASCLIN1 input */
123 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN; /**< \brief ASCLIN1_RXG: ASCLIN1 input */
124 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN; /**< \brief ASCLIN2_RXA: ASCLIN2 input */
125 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN; /**< \brief ASCLIN2_RXB: ASCLIN2 input */
126 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN; /**< \brief ASCLIN2_RXD: ASCLIN2 input */
127 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN; /**< \brief ASCLIN2_RXE: ASCLIN2 input */
128 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN; /**< \brief ASCLIN2_RXG: ASCLIN2 input */
129 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN; /**< \brief ASCLIN3_RXA: ASCLIN3 input */
130 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN; /**< \brief ASCLIN3_RXC: ASCLIN3 input */
131 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN; /**< \brief ASCLIN3_RXD: ASCLIN3 input */
132 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN; /**< \brief ASCLIN3_RXE: ASCLIN3 input */
133 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN; /**< \brief ASCLIN3_RXF: ASCLIN3 input */
134 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT; /**< \brief ASCLIN0_SCLK: ASCLIN0 output */
135 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT; /**< \brief ASCLIN0_SCLK: ASCLIN0 output */
136 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT; /**< \brief ASCLIN1_SCLK: ASCLIN1 output */
137 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT; /**< \brief ASCLIN1_SCLK: ASCLIN1 output */
138 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT; /**< \brief ASCLIN1_SCLK: ASCLIN1 output */
139 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT; /**< \brief ASCLIN1_SCLK: ASCLIN1 output */
140 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
141 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
142 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
143 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
144 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
145 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
146 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
147 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
148 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
149 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
150 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
151 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
152 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
153 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
154 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT; /**< \brief ASCLIN1_SLSO: ASCLIN1 output */
155 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT; /**< \brief ASCLIN1_SLSO: ASCLIN1 output */
156 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT; /**< \brief ASCLIN1_SLSO: ASCLIN1 output */
157 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT; /**< \brief ASCLIN2_SLSO: ASCLIN2 output */
158 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT; /**< \brief ASCLIN2_SLSO: ASCLIN2 output */
159 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT; /**< \brief ASCLIN2_SLSO: ASCLIN2 output */
160 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
161 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
162 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
163 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
164 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
165 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT; /**< \brief ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin. */
166 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT; /**< \brief ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin. */
167 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT; /**< \brief ASCLIN0_TX: ASCLIN0 output */
168 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT; /**< \brief ASCLIN0_TX: ASCLIN0 output */
169 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
170 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
171 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
172 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
173 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
174 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
175 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
176 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
177 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
178 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
179 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
180 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
181 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
182 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
183 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
184 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
185 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
186 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
187 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
188 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
189 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
190 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
191 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
192 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
193 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
194
195 /** \brief Table dimensions */
196 #define IFXASCLIN_PINMAP_NUM_MODULES 4
197 #define IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS 2
198 #define IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS 2
199 #define IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS 7
200 #define IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS 9
201 #define IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS 5
202 #define IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS 10
203
204
205 /** \brief IfxAsclin_Cts_In table */
206 IFX_EXTERN const IfxAsclin_Cts_In *IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS];
207
208 /** \brief IfxAsclin_Rts_Out table */
209 IFX_EXTERN const IfxAsclin_Rts_Out *IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS];
210
211 /** \brief IfxAsclin_Rx_In table */
212 IFX_EXTERN const IfxAsclin_Rx_In *IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS];
213
214 /** \brief IfxAsclin_Sclk_Out table */
215 IFX_EXTERN const IfxAsclin_Sclk_Out *IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS];
216
217 /** \brief IfxAsclin_Slso_Out table */
218 IFX_EXTERN const IfxAsclin_Slso_Out *IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS];
219
220 /** \brief IfxAsclin_Tx_Out table */
221 IFX_EXTERN const IfxAsclin_Tx_Out *IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS];
222
223 /** \} */
224
225 #endif /* IFXASCLIN_PINMAP_H */
IfxAsclin2_CTSB_P33_5_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN
ASCLIN2_CTSB: ASCLIN2 input.
Definition: IfxAsclin_PinMap.h:107
IfxAsclin_Cts_In
CTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:56
IfxAsclin0_SCLK_P14_0_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT
ASCLIN0_SCLK: ASCLIN0 output.
Definition: IfxAsclin_PinMap.h:134
IfxAsclin3_TX_P32_2_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:192
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin3_TX_P15_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:188
IfxAsclin3_TX_P15_6_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:187
IfxAsclin1_CTSB_P32_4_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN
ASCLIN1_CTSB: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:105
IfxAsclin2_RXA_P14_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN
ASCLIN2_RXA: ASCLIN2 input.
Definition: IfxAsclin_PinMap.h:124
IfxAsclin3_RXE_P00_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN
ASCLIN3_RXE: ASCLIN3 input.
Definition: IfxAsclin_PinMap.h:132
IfxAsclin0_SCLK_P15_2_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT
ASCLIN0_SCLK: ASCLIN0 output.
Definition: IfxAsclin_PinMap.h:135
IfxAsclin3_RXC_P20_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN
ASCLIN3_RXC: ASCLIN3 input.
Definition: IfxAsclin_PinMap.h:130
IfxAsclin_Sclk_Out
SCLK pin mapping structure.
Definition: IfxAsclin_PinMap.h:80
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxAsclin1_TX_P33_12_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:177
IfxAsclin0_RTS_P14_7_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT
ASCLIN0_RTS: ASCLIN0 output.
Definition: IfxAsclin_PinMap.h:109
IfxAsclin2_CTSA_P10_7_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN
ASCLIN2_CTSA: ASCLIN2 input.
Definition: IfxAsclin_PinMap.h:106
IfxAsclin3_SCLK_P21_5_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:150
IfxAsclin2_RTS_P33_4_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT
ASCLIN2_RTS: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:113
IfxAsclin1_SLSO_P14_3_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT
ASCLIN1_SLSO: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:154
IfxAsclin_Rx_In_pinTable
IFX_EXTERN const IfxAsclin_Rx_In * IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]
IfxAsclin_Rx_In table.
Definition: IfxAsclin_PinMap.h:212
IfxAsclin0_RXB_P15_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN
ASCLIN0_RXB: ASCLIN0 input.
Definition: IfxAsclin_PinMap.h:116
IfxAsclin1_SLSO_P33_10_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT
ASCLIN1_SLSO: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:156
IfxAsclin_Cts_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxAsclin_PinMap.h:59
IfxAsclin_Slso_Out
SLSO pin mapping structure.
Definition: IfxAsclin_PinMap.h:88
IfxAsclin_Rts_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxAsclin_PinMap.h:76
IfxAsclin1_TX_P14_10_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:171
IfxAsclin0_CTSA_P14_9_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN
ASCLIN0_CTSA: ASCLIN0 input.
Definition: IfxAsclin_PinMap.h:103
IfxAsclin1_RTS_P23_1_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT
ASCLIN1_RTS: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:111
IfxAsclin3_TX_P00_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:185
IfxAsclin3_SCLK_P32_3_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:152
IfxAsclin_Cts_In_pinTable
IFX_EXTERN const IfxAsclin_Cts_In * IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]
IfxAsclin_Cts_In table.
Definition: IfxAsclin_PinMap.h:206
IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:201
IfxAsclin1_TX_P15_5_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:175
IfxAsclin2_SCLK_P33_7_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT
ASCLIN2_SCLK: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:143
IfxAsclin2_SLSO_P02_3_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT
ASCLIN2_SLSO: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:157
IfxAsclin_Cts_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxAsclin_PinMap.h:60
IfxAsclin1_TX_P15_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:172
IfxAsclin1_CTSA_P20_7_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN
ASCLIN1_CTSA: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:104
IfxAsclin1_TX_P02_2_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:169
IfxAsclin1_TX_P15_4_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:174
IfxAsclin2_SCLK_P14_2_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT
ASCLIN2_SCLK: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:142
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxAsclin2_SLSO_P10_5_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT
ASCLIN2_SLSO: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:158
IfxAsclin_Sclk_Out_pinTable
IFX_EXTERN const IfxAsclin_Sclk_Out * IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxAsclin_Sclk_Out table.
Definition: IfxAsclin_PinMap.h:215
IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:202
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin2_TX_P33_9_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT
ASCLIN2_TX: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:184
IfxAsclin0_TX_P14_1_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT
ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin.
Definition: IfxAsclin_PinMap.h:166
IfxAsclin2_RXB_P02_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN
ASCLIN2_RXB: ASCLIN2 input.
Definition: IfxAsclin_PinMap.h:125
IfxAsclin1_SCLK_P33_11_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT
ASCLIN1_SCLK: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:138
IfxAsclin2_TX_P10_5_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT
ASCLIN2_TX: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:180
IfxAsclin2_TX_P14_2_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT
ASCLIN2_TX: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:181
IfxAsclin1_TX_P33_13_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:178
IfxAsclin_Rts_Out
RTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:72
IfxAsclin2_SCLK_P02_4_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT
ASCLIN2_SCLK: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:140
IfxAsclin3_SCLK_P20_0_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:149
IfxAsclin1_SCLK_P20_10_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT
ASCLIN1_SCLK: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:137
IfxAsclin1_TX_P11_12_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:170
IfxAsclin3_SCLK_P33_2_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:153
IfxAsclin_Cts_In::module
Ifx_ASCLIN * module
Base address.
Definition: IfxAsclin_PinMap.h:58
IfxAsclin2_TX_P33_8_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT
ASCLIN2_TX: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:183
IfxAsclin_Tx_Out_pinTable
IFX_EXTERN const IfxAsclin_Tx_Out * IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]
IfxAsclin_Tx_Out table.
Definition: IfxAsclin_PinMap.h:221
IfxAsclin3_RXA_P15_7_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN
ASCLIN3_RXA: ASCLIN3 input.
Definition: IfxAsclin_PinMap.h:129
IfxAsclin3_SLSO_P21_2_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT
ASCLIN3_SLSO: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:162
IfxAsclin1_RXD_P14_8_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN
ASCLIN1_RXD: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:120
IfxAsclin3_SCLK_P00_0_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:145
IfxAsclin3_TX_P21_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:191
IfxAsclin3_SCLK_P15_6_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:147
IfxAsclin0_RXA_P14_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN
ASCLIN0_RXA: ASCLIN0 input.
Definition: IfxAsclin_PinMap.h:115
IfxAsclin2_RXE_P33_8_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN
ASCLIN2_RXE: ASCLIN2 input.
Definition: IfxAsclin_PinMap.h:127
IfxAsclin1_RXF_P33_13_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN
ASCLIN1_RXF: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:122
IfxAsclin2_SCLK_P10_6_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT
ASCLIN2_SCLK: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:141
IfxAsclin1_TX_P15_1_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:173
IfxAsclin3_TX_P20_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:189
IfxAsclin1_RXA_P15_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN
ASCLIN1_RXA: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:117
IfxAsclin1_RXB_P15_5_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN
ASCLIN1_RXB: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:118
IfxAsclin1_SLSO_P20_8_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT
ASCLIN1_SLSO: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:155
IFXASCLIN_PINMAP_NUM_MODULES
#define IFXASCLIN_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxAsclin_PinMap.h:196
IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS
#define IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:197
IfxAsclin3_CTSA_P00_12_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN
ASCLIN3_CTSA: ASCLIN3 input.
Definition: IfxAsclin_PinMap.h:108
IfxAsclin0_TX_P15_2_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT
ASCLIN0_TX: ASCLIN0 output.
Definition: IfxAsclin_PinMap.h:167
IfxAsclin3_SLSO_P21_6_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT
ASCLIN3_SLSO: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:163
IfxAsclin3_RXF_P21_6_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN
ASCLIN3_RXF: ASCLIN3 input.
Definition: IfxAsclin_PinMap.h:133
IfxAsclin3_TX_P20_3_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:190
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxAsclin3_SCLK_P00_2_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:146
IfxAsclin1_RXE_P11_10_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN
ASCLIN1_RXE: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:121
IfxAsclin3_SCLK_P15_8_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:148
IfxAsclin_Rts_Out_pinTable
IFX_EXTERN const IfxAsclin_Rts_Out * IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]
IfxAsclin_Rts_Out table.
Definition: IfxAsclin_PinMap.h:209
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxAsclin3_TX_P00_1_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:186
IfxAsclin2_TX_P02_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT
ASCLIN2_TX: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:179
IfxAsclin2_SLSO_P33_6_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT
ASCLIN2_SLSO: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:159
IfxAsclin1_RXC_P20_9_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN
ASCLIN1_RXC: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:119
IfxAsclin_cfg.h
ASCLIN on-chip implementation data.
IfxAsclin3_SLSO_P33_1_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT
ASCLIN3_SLSO: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:164
IfxAsclin3_SLSO_P14_3_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT
ASCLIN3_SLSO: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:161
IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:200
IfxAsclin1_RTS_P20_6_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT
ASCLIN1_RTS: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:110
IfxAsclin2_TX_P14_3_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT
ASCLIN2_TX: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:182
IfxAsclin2_RTS_P10_8_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT
ASCLIN2_RTS: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:112
IfxAsclin3_SCLK_P21_7_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:151
IfxAsclin3_SLSO_P00_3_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT
ASCLIN3_SLSO: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:160
IfxAsclin3_RXD_P32_2_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN
ASCLIN3_RXD: ASCLIN3 input.
Definition: IfxAsclin_PinMap.h:131
IfxAsclin0_TX_P15_3_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT
ASCLIN0_TX: ASCLIN0 output.
Definition: IfxAsclin_PinMap.h:168
IfxAsclin2_SCLK_P33_9_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT
ASCLIN2_SCLK: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:144
IfxAsclin3_TX_P32_3_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:193
IfxAsclin2_RXD_P10_6_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN
ASCLIN2_RXD: ASCLIN2 input.
Definition: IfxAsclin_PinMap.h:126
IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:198
IfxAsclin1_SCLK_P15_0_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT
ASCLIN1_SCLK: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:136
IfxAsclin3_RTS_P00_9_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT
ASCLIN3_RTS: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:114
IfxAsclin0_TX_P14_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT
ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin.
Definition: IfxAsclin_PinMap.h:165
IfxAsclin1_SCLK_P33_12_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT
ASCLIN1_SCLK: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:139
IfxAsclin1_RXG_P02_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN
ASCLIN1_RXG: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:123
IfxAsclin1_TX_P20_10_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:176
IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS
#define IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:199
IfxPort.h
PORT basic functionality.
IfxAsclin_Slso_Out_pinTable
IFX_EXTERN const IfxAsclin_Slso_Out * IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxAsclin_Slso_Out table.
Definition: IfxAsclin_PinMap.h:218
IfxAsclin2_RXG_P02_0_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN
ASCLIN2_RXG: ASCLIN2 input.
Definition: IfxAsclin_PinMap.h:128


iLLD_TC26B: IfxAsclin_Spi.c Source File

  • Asclin
  • Spi
IfxAsclin_Spi.c
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_Spi.c
3 * \brief ASCLIN SPI details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxAsclin_Spi.h"
49
50 /******************************************************************************/
51 /*-----------------------Private Function Prototypes--------------------------*/
52 /******************************************************************************/
53
54 /**
55 * \param asclin module handle
56 * \return status of the on going job
57 */
58 IFX_STATIC IfxAsclin_Spi_Status IfxAsclin_Spi_lock(IfxAsclin_Spi *asclin);
59
60 /**
61 * \param asclin module handle
62 * \return None
63 */
64 IFX_STATIC void IfxAsclin_Spi_unlock(IfxAsclin_Spi *asclin);
65
66 /******************************************************************************/
67 /*-------------------------Function Implementations---------------------------*/
68 /******************************************************************************/
69
70 void IfxAsclin_Spi_disableModule(IfxAsclin_Spi *asclin)
71 {
72 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler */
73 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
74 IfxScuWdt_clearCpuEndinit(psw); /* clearing the endinit protection*/
75 IfxAsclin_setDisableModuleRequest(asclinSFR); /* disabling the module */
76 IfxScuWdt_setCpuEndinit(psw); /* setting the endinit protection back on */
77 }
78
79
80 IfxAsclin_Spi_Status IfxAsclin_Spi_exchange(IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
81 {
82 IfxAsclin_Spi_Status status = IfxAsclin_Spi_lock(asclin); /* lock the driver until the communication is done */
83
84 if (status == IfxAsclin_Spi_Status_ok)
85 {
86 asclin->transferInProgress = 1; /* setting transfer in progress status */
87 asclin->txJob.data = src; /* data to be transmitted */
88 asclin->txJob.pending = count; /* count of Tx data */
89 asclin->rxJob.data = dest; /* empty buffer to receive data */
90 asclin->rxJob.pending = count; /* count of Rx data */
91
92 IfxAsclin_Spi_write(asclin); /* write data into Tx fifo */
93 }
94
95 return status;
96 }
97
98
99 IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus(IfxAsclin_Spi *asclin)
100 {
101 IfxAsclin_Spi_Status status = IfxAsclin_Spi_Status_ok;
102
103 if ((asclin->transferInProgress != 0) || (asclin->sending != 0))
104 {
105 status = IfxAsclin_Spi_Status_busy;
106 }
107
108 return status;
109 }
110
111
112 IfxAsclin_Status IfxAsclin_Spi_initModule(IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
113 {
114 Ifx_ASCLIN *asclinSFR = config->asclin; /* pointer to ASCLIN registers */
115 IfxAsclin_Status status = IfxAsclin_Status_noError;
116
117 asclin->asclin = asclinSFR; /* adding register pointer to module handler*/
118 IfxAsclin_enableModule(asclinSFR); /* enabling the module */
119
120 /* mode initialisation */
121 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock */
122 IfxAsclin_setFrameMode(asclinSFR, IfxAsclin_FrameMode_initialise); /* setting the module in Initialise mode */
123 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source */
124
125 /* spi mode initialisation */
126 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock */
127 IfxAsclin_setFrameMode(asclinSFR, config->frameMode); /* setting the module in Spi mode */
128 IfxAsclin_setPrescaler(asclinSFR, config->baudrate.prescaler); /* setting the prescaler*/
129 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source */
130
131 IfxAsclin_SamplePointPosition samplePointPosition = (IfxAsclin_SamplePointPosition)((config->baudrate.oversampling + 1) / 2); /* sample point position at half of oversampling factor */
132
133 /* baudrate generation */
134 status = (IfxAsclin_Status)IfxAsclin_setBitTiming(asclinSFR, config->baudrate.baudrate,
135 config->baudrate.oversampling,
136 samplePointPosition,
137 config->bitSampling.medianFilter); /* setting the baudrate bit fields to generate the required baudrate */
138
139 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock again */
140
141 /* input output control initialisation */
142 IfxAsclin_setRxInput(asclinSFR, config->inputOutput.alti); /* selecting the Rx(alternate) input pin */
143 IfxAsclin_setClockPolarity(asclinSFR, config->inputOutput.cpol); /* setting the clock polarity */
144 IfxAsclin_setSlavePolarity(asclinSFR, config->inputOutput.spol); /* setting the slave polarity */
145 IfxAsclin_enableLoopBackMode(asclinSFR, config->inputOutput.loopBack); /* selecting loopbak (enable/disable) */
146
147 /* frame control initialisation */
148 IfxAsclin_setIdleDelay(asclinSFR, config->frame.idleDelay); /* setting idle delay */
149 IfxAsclin_setLeadDelay(asclinSFR, config->frame.leadDelay); /* setting lead delay */
150 IfxAsclin_setStopBit(asclinSFR, config->frame.stopBit); /* setting the stop bit (trail delay) */
151 IfxAsclin_setShiftDirection(asclinSFR, config->frame.shiftDir); /* setting the shift direction */
152
153 /* data control initialisation */
154 IfxAsclin_setDataLength(asclinSFR, config->dataLength); /* setting the number of bytes to be transfered */
155
156 /* fifo control initialisation */
157 /* set the FIFO widths based on the supplied datalength */
158 if (config->dataLength <= 8)
159 {
160 IfxAsclin_setTxFifoInletWidth(asclinSFR, IfxAsclin_TxFifoInletWidth_1); /* setting Tx FIFO inlet width to 1 byte */
161 IfxAsclin_setRxFifoOutletWidth(asclinSFR, IfxAsclin_RxFifoOutletWidth_1); /* setting Rx FIFO outlet width to 1 byte */
162 asclin->dataWidth = 1; /* echo the data width to module handle*/
163 }
164
165 else
166 {
167 IfxAsclin_setTxFifoInletWidth(asclinSFR, IfxAsclin_TxFifoInletWidth_2); /* setting Tx FIFO inlet width to 2 bytes */
168 IfxAsclin_setRxFifoOutletWidth(asclinSFR, IfxAsclin_RxFifoOutletWidth_2); /* setting Rx FIFO outlet width to 2 bytes */
169 asclin->dataWidth = 2; /* echo the data width to module handle*/
170 }
171
172 IfxAsclin_setRxBufferMode(asclinSFR, config->fifo.buffMode); /* setting Rx FIFO mode */
173 IfxAsclin_setTxFifoInterruptLevel(asclinSFR, config->fifo.txFifoInterruptLevel); /* setting Tx FIFO level at which a Tx interrupt will be triggered */
174 IfxAsclin_setRxFifoInterruptLevel(asclinSFR, config->fifo.rxFifoInterruptLevel); /* setting Rx FIFO interrupt level at which a Rx interrupt will be triggered */
175 IfxAsclin_flushRxFifo(asclinSFR); /* flushing Rx FIFO */
176 IfxAsclin_flushTxFifo(asclinSFR); /* flushing Tx FIFO */
177
178 IfxAsclin_disableAllFlags(asclinSFR); /* disable all flags */
179 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags */
180
181 /* initialising the interrupts */
182 IfxSrc_Tos tos = config->interrupt.typeOfService;
183
184 if ((config->interrupt.rxPriority > 0) || (tos == IfxSrc_Tos_dma))
185 {
186 volatile Ifx_SRC_SRCR *src;
187 src = IfxAsclin_getSrcPointerRx(asclinSFR);
188 IfxSrc_init(src, tos, config->interrupt.rxPriority);
189 IfxAsclin_enableRxFifoFillLevelFlag(asclinSFR, TRUE);
190 IfxSrc_enable(src);
191 }
192
193 if ((config->interrupt.txPriority > 0) || (tos == IfxSrc_Tos_dma))
194 {
195 volatile Ifx_SRC_SRCR *src;
196 src = IfxAsclin_getSrcPointerTx(asclinSFR);
197 IfxSrc_init(src, tos, config->interrupt.txPriority);
198 IfxAsclin_enableTxFifoFillLevelFlag(asclinSFR, TRUE);
199 IfxSrc_enable(src);
200 }
201
202 if (config->interrupt.erPriority > 0) /*These interrupts are not serviced by dma*/
203 {
204 volatile Ifx_SRC_SRCR *src;
205 src = IfxAsclin_getSrcPointerEr(asclinSFR);
206 IfxSrc_init(src, tos, config->interrupt.erPriority);
207 IfxAsclin_enableFrameErrorFlag(asclinSFR, TRUE);
208 IfxSrc_enable(src);
209 }
210
211 /* Pin mapping */
212 const IfxAsclin_Spi_Pins *pins = config->pins;
213
214 if (pins != NULL_PTR)
215 {
216 IfxAsclin_Sclk_Out *sclk = pins->sclk;
217
218 if (sclk != NULL_PTR)
219 {
220 IfxAsclin_initSclkPin(sclk, pins->sclkMode, pins->pinDriver);
221 }
222
223 IfxAsclin_Rx_In *rx = pins->rx;
224
225 if (rx != NULL_PTR)
226 {
227 IfxAsclin_initRxPin(rx, pins->rxMode, pins->pinDriver);
228 }
229
230 IfxAsclin_Tx_Out *tx = pins->tx;
231
232 if (tx != NULL_PTR)
233 {
234 IfxAsclin_initTxPin(tx, pins->txMode, pins->pinDriver);
235 }
236
237 IfxAsclin_Slso_Out *slso = pins->slso;
238
239 if (slso != NULL_PTR)
240 {
241 IfxAsclin_initSlsoPin(slso, pins->slsoMode, pins->pinDriver);
242 }
243 }
244
245 IfxAsclin_enableParity(asclinSFR, FALSE); /* no parity */
246
247 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source*/
248
249 asclin->sending = 0;
250 IfxAsclin_enableTxFifoOutlet(asclinSFR, TRUE); /* disabling Rx FIFO for recieving */
251 IfxAsclin_enableRxFifoInlet(asclinSFR, TRUE); /* disabling Tx FIFO for transmitting */
252
253 return status;
254 }
255
256
257 void IfxAsclin_Spi_initModuleConfig(IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
258 {
259 const IfxAsclin_Spi_Config defaultConfig = {
260 .asclin = NULL_PTR, /* will be initialized below */
261
262 .frameMode = IfxAsclin_FrameMode_spi, /* SPI mode */
263 .clockSource = IfxAsclin_ClockSource_kernelClock, /* kernel clock, fclc*/
264
265 /* Default values for input output control */
266 .inputOutput = {
267 .alti = IfxAsclin_RxInputSelect_0, /* alternate input 0; */
268 .cpol = IfxAsclin_ClockPolarity_idleLow, /* CPOL active low */
269 .spol = IfxAsclin_SlavePolarity_idlehigh, /* SPOL active high */
270 .loopBack = FALSE, /* no loop back */
271 },
272
273 /* Default values for baudrate */
274 .baudrate = {
275 .baudrate = 100000.0, /* default baudrate (the fractional dividier setup will be calculated in initModule) */
276 .prescaler = 2, /* default prescaler */
277 .oversampling = IfxAsclin_OversamplingFactor_8, /* default oversampling factor */
278 },
279
280 /* Default Values for Bit sampling */
281 .bitSampling = {
282 .medianFilter = IfxAsclin_SamplesPerBit_one, /* one sample per bit */
283 },
284
285 /* Default Values for Frame Control */
286 .frame = {
287 .idleDelay = IfxAsclin_IdleDelay_0, /* no idle delay */
288 .leadDelay = IfxAsclin_LeadDelay_1, /* one lead bit */
289 .stopBit = IfxAsclin_StopBit_1, /* one stop bit (trail delay) */
290 .shiftDir = IfxAsclin_ShiftDirection_lsbFirst, /* shift direction LSB first */
291 },
292
293 /* Default Values for Data Control*/
294 .dataLength = IfxAsclin_DataLength_8, /* number of bits per transfer 8*/
295
296 /* Default Values for fifo Control */
297 .fifo = {
298 .outWidth = IfxAsclin_RxFifoOutletWidth_1, /* 8-bit wide read */
299 .inWidth = IfxAsclin_TxFifoInletWidth_1, /*8-bit wide write */
300 .buffMode = IfxAsclin_ReceiveBufferMode_rxFifo, /* RxFIFO */
301 .txFifoInterruptLevel = IfxAsclin_TxFifoInterruptLevel_15, /* Tx FIFO interrupt level */
302 .rxFifoInterruptLevel = IfxAsclin_RxFifoInterruptLevel_1, /* Rx FIFO interrupt level */
303 },
304
305 /* Default Values for Interrupt Config */
306 .interrupt = {
307 .rxPriority = 0, /* receive interrupt priority 0 */
308 .txPriority = 0, /* transmit interrupt priority 0 */
309 .erPriority = 0, /* error interrupt priority 0 */
310 .typeOfService = IfxSrc_Tos_cpu0, /* type of service CPU0 */
311 },
312
313 .pins = NULL_PTR, /* pins to null pointer */
314 };
315
316 /* Default Configuration */
317 *config = defaultConfig;
318 /* take over module pointer */
319 config->asclin = asclin;
320 }
321
322
323 void IfxAsclin_Spi_isrError(IfxAsclin_Spi *asclin)
324 {
325 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler */
326
327 /* store all the flags in the variable */
328 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR))
329 {
330 IfxAsclin_clearFrameErrorFlag(asclinSFR);
331 asclin->errorFlags.frameError = 1;
332 }
333
334 if (IfxAsclin_getRxFifoOverflowFlagStatus(asclinSFR))
335 {
336 IfxAsclin_clearRxFifoOverflowFlag(asclinSFR);
337 asclin->errorFlags.rxFifoOverflow = 1;
338 }
339
340 if (IfxAsclin_getRxFifoUnderflowFlagStatus(asclinSFR))
341 {
342 IfxAsclin_clearRxFifoUnderflowFlag(asclinSFR);
343 asclin->errorFlags.rxFifoUnderflow = 1;
344 }
345
346 if (IfxAsclin_getTxFifoOverflowFlagStatus(asclinSFR))
347 {
348 IfxAsclin_clearTxFifoOverflowFlag(asclinSFR);
349 asclin->errorFlags.txFifoOverflow = 1;
350 }
351 }
352
353
354 void IfxAsclin_Spi_isrReceive(IfxAsclin_Spi *asclin)
355 {
356 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
357 IfxAsclin_clearRxFifoFillLevelFlag(asclinSFR); /* clear the interrupt flag */
358 IfxAsclin_Spi_read(asclin); /* read the remaining data */
359 }
360
361
362 void IfxAsclin_Spi_isrTransmit(IfxAsclin_Spi *asclin)
363 {
364 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler */
365 IfxAsclin_clearTxFifoFillLevelFlag(asclinSFR); /* clear the interrupt flag */
366 IfxAsclin_Spi_write(asclin); /* write the remaining data */
367 }
368
369
370 IFX_STATIC IfxAsclin_Spi_Status IfxAsclin_Spi_lock(IfxAsclin_Spi *asclin)
371 {
372 sint32 sending = __swap((void *)&asclin->sending, 1UL);
373 return (sending == 0) ? IfxAsclin_Spi_Status_ok : IfxAsclin_Spi_Status_busy;
374 }
375
376
377 void IfxAsclin_Spi_read(IfxAsclin_Spi *asclin)
378 {
379 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler */
380 IfxAsclin_Spi_Job *job = &asclin->rxJob; /* getting the rxJob structure from module handler */
381
382 uint32 count = (uint32)IfxAsclin_getRxFifoFillLevel(asclinSFR); /* get the readable count of Rx fifo */
383 count = __min(job->pending, count); /* check for the end of the data */
384
385 if (job->data == NULL_PTR) /* incase of no data to be received (only transmit case) */
386 {
387 uint32 i;
388 job->pending = job->pending - count; /* discount the current reading count from job pending */
389
390 for (i = 0; i < count; i++)
391 {
392 IfxAsclin_readRxData(asclinSFR); /* do dummy reads */
393 }
394 }
395 else if (job->pending > 0)
396 {
397 job->pending = job->pending - count; /* discount the current reading count from job pending */
398
399 /* read data up to the count based on the out width */
400 switch (asclin->dataWidth)
401 {
402 case 1: /* in case of 8 bit wide */
403 IfxAsclin_read8(asclinSFR, job->data, count); /* reading from Rx FIFO */
404 job->data = &(((uint8 *)job->data)[count]); /* pointing to the remaining data */
405 break;
406
407 case 2: /* in case of 16 bit wide*/
408 IfxAsclin_read16(asclinSFR, job->data, count); /* reading from Rx FIFO */
409 job->data = &(((uint16 *)job->data)[count]); /* pointing to the remaining data */
410 break;
411 }
412 }
413
414 if (job->pending == 0)
415 {
416 asclin->transferInProgress = 0; /* clearing the transfer in progress status */
417 IfxAsclin_Spi_unlock(asclin); /* unlock the driver */
418 }
419 }
420
421
422 IFX_STATIC void IfxAsclin_Spi_unlock(IfxAsclin_Spi *asclin)
423 {
424 asclin->sending = 0UL;
425 }
426
427
428 void IfxAsclin_Spi_write(IfxAsclin_Spi *asclin)
429 {
430 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler */
431 IfxAsclin_Spi_Job *job = &asclin->txJob; /* getting the txJob structure from module handler */
432
433 if (job->pending)
434 {
435 boolean interruptState = IfxCpu_disableInterrupts();
436
437 uint32 count = (uint32)(16 - IfxAsclin_getTxFifoFillLevel(asclinSFR)); /* getting the fillable count of the Tx Fifo */
438 count = __min(job->pending, count); /* checking for the end of the data */
439
440 if (job->data == NULL_PTR) /* incase of no data to be transmitted (only receive case) */
441 {
442 uint32 i;
443 job->pending = job->pending - count; /* discount the current filling count from job pending */
444
445 for (i = 0; i < count; i++)
446 {
447 IfxAsclin_writeTxData(asclinSFR, ~0); /* write all 1's */
448 }
449 }
450 else
451 {
452 job->pending = job->pending - count; /* discount the current filling count from job pending */
453
454 /* write data up to the count based on the in width */
455 switch (asclin->dataWidth)
456 {
457 case 1: /* in case of 8 bit wide */
458 IfxAsclin_write8(asclinSFR, job->data, count); /* writing to Tx FIFO */
459 job->data = &(((uint8 *)job->data)[count]); /* pointing to the remaining data */
460 break;
461
462 case 2: /* in case of 16 bit wide*/
463 IfxAsclin_write16(asclinSFR, job->data, count); /* writing to Tx FIFO */
464 job->data = &(((uint16 *)job->data)[count]); /* pointing to the remaining data */
465 break;
466 }
467 }
468
469 IfxCpu_restoreInterrupts(interruptState);
470 }
471 }
IfxAsclin_Spi_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Spi.h:285
IfxAsclin_TxFifoInterruptLevel_15
TX FIFO level 15.
Definition: IfxAsclin.h:443
IfxAsclin_Spi_Pins::sclkMode
IfxPort_OutputMode sclkMode
sclk as output
Definition: IfxAsclin_Spi.h:324
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin_ClockPolarity_idleLow
idle low
Definition: IfxAsclin.h:102
IfxAsclin_Spi_exchange
IfxAsclin_Spi_Status IfxAsclin_Spi_exchange(IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
starts the data exchange
Definition: IfxAsclin_Spi.c:80
IfxAsclin_IdleDelay_0
idle delay in 0 bit times
Definition: IfxAsclin.h:180
IfxAsclin_Spi_BitSamplingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, no. of samples per bit 1 or 3.
Definition: IfxAsclin_Spi.h:257
IfxAsclin_Spi_Status
IfxAsclin_Spi_Status
Enumeration for job status.
Definition: IfxAsclin_Spi.h:231
IfxAsclin_Spi_isrReceive
void IfxAsclin_Spi_isrReceive(IfxAsclin_Spi *asclin)
ISR receive routine.
Definition: IfxAsclin_Spi.c:354
IfxAsclin_Spi_Pins::sclk
IFX_CONST IfxAsclin_Sclk_Out * sclk
SPI clock select pin.
Definition: IfxAsclin_Spi.h:323
IfxAsclin_setIdleDelay
IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay.
Definition: IfxAsclin.h:2264
IfxAsclin_ReceiveBufferMode_rxFifo
RxFIFO mode.
Definition: IfxAsclin.h:258
IfxAsclin_Spi_Job
Structure for data transfer jobs.
Definition: IfxAsclin_Spi.h:313
IfxAsclin_initSlsoPin
IFX_INLINE void IfxAsclin_initSlsoPin(const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output.
Definition: IfxAsclin.h:2154
IfxAsclin_ShiftDirection_lsbFirst
LSB first.
Definition: IfxAsclin.h:357
IfxAsclin_Spi_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Spi.h:286
IfxAsclin_Spi_InputOutputControl::cpol
IfxAsclin_ClockPolarity cpol
IOCR.CPOL clock polarity selection.
Definition: IfxAsclin_Spi.h:296
IfxAsclin_getSrcPointerEr
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR.
Definition: IfxAsclin.c:168
IfxAsclin_Sclk_Out
SCLK pin mapping structure.
Definition: IfxAsclin_PinMap.h:80
IfxAsclin_Spi_Job::data
void * data
pointer to user data
Definition: IfxAsclin_Spi.h:315
IfxAsclin_getRxFifoUnderflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO underflow flag status.
Definition: IfxAsclin.h:2051
IfxAsclin_Spi
Module handle.
Definition: IfxAsclin_Spi.h:340
IfxAsclin_clearTxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_clearTxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO level flag.
Definition: IfxAsclin.h:1709
IfxAsclin_Spi_Pins::txMode
IfxPort_OutputMode txMode
tx as output
Definition: IfxAsclin_Spi.h:328
IfxAsclin_Spi_InputOutputControl::loopBack
boolean loopBack
IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
Definition: IfxAsclin_Spi.h:298
IfxAsclin_getTxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status.
Definition: IfxAsclin.h:2099
IfxAsclin_enableModule
void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
Enables the module.
Definition: IfxAsclin.c:70
IfxAsclin_Spi::txJob
IfxAsclin_Spi_Job txJob
structure for Tx job
Definition: IfxAsclin_Spi.h:343
IfxAsclin_flushTxFifo
IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO.
Definition: IfxAsclin.h:1919
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxAsclin_Spi_Config::baudrate
IfxAsclin_Spi_Baudrate baudrate
structure for baudrate
Definition: IfxAsclin_Spi.h:358
IfxAsclin_Spi_Config::frame
IfxAsclin_Spi_FrameControl frame
structure for frame control
Definition: IfxAsclin_Spi.h:360
IfxAsclin_RxFifoInterruptLevel_1
RX FIFO level 1.
Definition: IfxAsclin.h:276
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxAsclin_Slso_Out
SLSO pin mapping structure.
Definition: IfxAsclin_PinMap.h:88
IfxAsclin_initRxPin
IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxAsclin.h:2136
IfxAsclin_Spi_Status_ok
Definition: IfxAsclin_Spi.h:233
IfxAsclin_Spi_unlock
IFX_STATIC void IfxAsclin_Spi_unlock(IfxAsclin_Spi *asclin)
Definition: IfxAsclin_Spi.c:422
IfxAsclin_clearAllFlags
IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
clears all the flags
Definition: IfxAsclin.h:1595
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxAsclin_Spi_Baudrate::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Spi.h:248
IfxAsclin_Spi_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
SPI Tx pin.
Definition: IfxAsclin_Spi.h:327
IfxAsclin_Spi_Pins
Structure for SPI pin configuration.
Definition: IfxAsclin_Spi.h:321
IfxAsclin_Spi_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Spi.h:331
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxAsclin_Spi_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Spi.h:265
IfxAsclin_clearRxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_clearRxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO level flag.
Definition: IfxAsclin.h:1673
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:933
IfxAsclin_Spi_disableModule
void IfxAsclin_Spi_disableModule(IfxAsclin_Spi *asclin)
Disables the module.
Definition: IfxAsclin_Spi.c:70
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxAsclin_Spi_isrError
void IfxAsclin_Spi_isrError(IfxAsclin_Spi *asclin)
ISR error routine.
Definition: IfxAsclin_Spi.c:323
IfxAsclin_clearRxFifoUnderflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO underflow flag.
Definition: IfxAsclin.h:1685
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxAsclin_Spi_Baudrate::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, postdivider, used for oversampling.
Definition: IfxAsclin_Spi.h:250
IfxAsclin_enableRxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO level flag.
Definition: IfxAsclin.h:1841
IfxAsclin_setBitTiming
boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing.
Definition: IfxAsclin.c:259
IfxAsclin_setRxFifoOutletWidth
IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width.
Definition: IfxAsclin.h:2360
IfxAsclin_Spi_initModule
IfxAsclin_Status IfxAsclin_Spi_initModule(IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
Initialises the module.
Definition: IfxAsclin_Spi.c:112
IfxAsclin_Spi_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
SPI Rx pin.
Definition: IfxAsclin_Spi.h:325
IfxAsclin_Spi_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Spi.h:365
IfxAsclin_SlavePolarity_idlehigh
idle high
Definition: IfxAsclin.h:368
IfxAsclin_getSrcPointerTx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx.
Definition: IfxAsclin.c:180
IfxAsclin_setClockPolarity
IFX_INLINE void IfxAsclin_setClockPolarity(Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol)
Selects the clock polarity.
Definition: IfxAsclin.h:2210
IfxAsclin_Spi_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Spi.h:267
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxAsclin_setRxBufferMode
IFX_INLINE void IfxAsclin_setRxBufferMode(Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
Sets the receive buffer mode.
Definition: IfxAsclin.h:2348
IfxAsclin_Status_noError
No error.
Definition: IfxAsclin.h:385
IfxAsclin_Spi_initModuleConfig
void IfxAsclin_Spi_initModuleConfig(IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
Fills the configuration structure with default values.
Definition: IfxAsclin_Spi.c:257
IfxAsclin_RxFifoOutletWidth_1
number of bytes 1
Definition: IfxAsclin.h:300
IfxAsclin_Spi_InterruptConfig::erPriority
uint16 erPriority
error interrupt priority
Definition: IfxAsclin_Spi.h:307
IfxAsclin_Spi_Status_busy
Definition: IfxAsclin_Spi.h:234
IfxAsclin_enableFrameErrorFlag
IFX_INLINE void IfxAsclin_enableFrameErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables frame error flag.
Definition: IfxAsclin.h:1775
IfxAsclin_clearRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag.
Definition: IfxAsclin.h:1679
IfxAsclin_setRxInput
IFX_INLINE void IfxAsclin_setRxInput(Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
Selects the alternate input for Rx signal.
Definition: IfxAsclin.h:2366
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:656
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin_setRxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2354
IfxAsclin_Spi_Config::inputOutput
IfxAsclin_Spi_InputOutputControl inputOutput
structure for input output control
Definition: IfxAsclin_Spi.h:357
IfxAsclin_Spi_ErrorFlags::frameError
uint8 frameError
frame error
Definition: IfxAsclin_Spi.h:264
IfxAsclin_Spi::rxJob
IfxAsclin_Spi_Job rxJob
structure for Rx job
Definition: IfxAsclin_Spi.h:344
IfxAsclin_Spi_Config::bitSampling
IfxAsclin_Spi_BitSamplingControl bitSampling
structure for bit sampling
Definition: IfxAsclin_Spi.h:359
IfxAsclin_clearFrameErrorFlag
IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin)
Clears the frame error flag.
Definition: IfxAsclin.h:1619
__swap
#define __swap
Definition: IfxCpu_IntrinsicsDcc.h:2085
IfxAsclin_Spi_ErrorFlags::rxFifoUnderflow
uint8 rxFifoUnderflow
receive FIFO underflow error
Definition: IfxAsclin_Spi.h:266
IfxAsclin_Spi_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Spi.h:308
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxAsclin_setLeadDelay
IFX_INLINE void IfxAsclin_setLeadDelay(Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
Sets the lead delay.
Definition: IfxAsclin.h:2282
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:70
IfxAsclin_setPrescaler
IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:2336
IfxAsclin_Spi_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
Definition: IfxAsclin_Spi.h:278
IfxAsclin_TxFifoInletWidth_2
number of bytes 2
Definition: IfxAsclin.h:419
IfxAsclin_Spi_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Spi.h:305
IfxAsclin_getTxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2081
IfxAsclin_SamplePointPosition
IfxAsclin_SamplePointPosition
Sample point position Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.
Definition: IfxAsclin.h:323
IfxAsclin_Spi.h
ASCLIN SPI details.
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxAsclin_Spi_Config::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Spi.h:361
IfxAsclin_getSrcPointerRx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx.
Definition: IfxAsclin.c:174
IfxAsclin_flushRxFifo
IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO.
Definition: IfxAsclin.h:1913
IfxAsclin_Spi_InputOutputControl::alti
IfxAsclin_RxInputSelect alti
IOCR.ALTI, Rx input (alternate input) pin selection.
Definition: IfxAsclin_Spi.h:295
IfxAsclin_initSclkPin
IFX_INLINE void IfxAsclin_initSclkPin(const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output.
Definition: IfxAsclin.h:2147
IfxAsclin_read8
uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits.
Definition: IfxAsclin.c:214
IfxAsclin_Spi::transferInProgress
boolean transferInProgress
status of the transfer In progress
Definition: IfxAsclin_Spi.h:348
IfxAsclin_readRxData
IFX_INLINE uint32 IfxAsclin_readRxData(Ifx_ASCLIN *asclin)
Definition: IfxAsclin.h:2180
IfxAsclin_Spi::errorFlags
IfxAsclin_Spi_ErrorFlags errorFlags
structure for error flags status
Definition: IfxAsclin_Spi.h:346
IfxAsclin_enableParity
IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits.
Definition: IfxAsclin.h:1817
IfxAsclin_Spi_write
void IfxAsclin_Spi_write(IfxAsclin_Spi *asclin)
Writes data into the Tx FIFO based on the inlet width.
Definition: IfxAsclin_Spi.c:428
IfxAsclin_Spi_lock
IFX_STATIC IfxAsclin_Spi_Status IfxAsclin_Spi_lock(IfxAsclin_Spi *asclin)
Definition: IfxAsclin_Spi.c:370
IfxAsclin_getRxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2027
IfxAsclin_disableAllFlags
IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin)
disables all flags
Definition: IfxAsclin.h:1733
IfxAsclin_Spi_FifoControl::rxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel
RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
Definition: IfxAsclin_Spi.h:277
IfxAsclin_initTxPin
IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxAsclin.h:2161
IfxAsclin_write16
uint32 IfxAsclin_write16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits.
Definition: IfxAsclin.c:376
IfxAsclin_setTxFifoInletWidth
IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width.
Definition: IfxAsclin.h:2440
IfxAsclin_Spi_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Spi.h:306
IfxAsclin_Spi_Config::fifo
IfxAsclin_Spi_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Spi.h:362
IfxAsclin_write8
uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits.
Definition: IfxAsclin.c:404
IfxAsclin_setSlavePolarity
IFX_INLINE void IfxAsclin_setSlavePolarity(Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol)
Selects the slave polarity.
Definition: IfxAsclin.h:2390
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxAsclin_Spi_FifoControl::txFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel
TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.
Definition: IfxAsclin_Spi.h:275
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
IfxAsclin_enableLoopBackMode
IFX_INLINE void IfxAsclin_enableLoopBackMode(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the loop back mode.
Definition: IfxAsclin.h:1811
IfxAsclin_enableTxFifoOutlet
IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission.
Definition: IfxAsclin.h:1889
IfxAsclin_RxFifoOutletWidth_2
number of bytes 2
Definition: IfxAsclin.h:301
IfxAsclin_setFrameMode
IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module&#39;s mode of operation.
Definition: IfxAsclin.h:2252
IfxAsclin_getRxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status.
Definition: IfxAsclin.h:2045
IfxAsclin_FrameMode_spi
spi mode
Definition: IfxAsclin.h:160
IfxAsclin_Spi_Pins::rxMode
IfxPort_InputMode rxMode
rx pin as input
Definition: IfxAsclin_Spi.h:326
IfxAsclin_StopBit_1
number of stop bits 1
Definition: IfxAsclin.h:394
IfxAsclin_Spi_Pins::slsoMode
IfxPort_OutputMode slsoMode
slso as output
Definition: IfxAsclin_Spi.h:330
IfxAsclin_ClockSource_kernelClock
f clc will be supplied
Definition: IfxAsclin.h:112
IfxAsclin_RxInputSelect_0
alternate input selection 0
Definition: IfxAsclin.h:310
sint32
long sint32
Definition: Platform_Types.h:134
IfxAsclin_LeadDelay_1
lead delay in 1 bit times
Definition: IfxAsclin.h:197
IfxAsclin_Spi_Config::pins
IFX_CONST IfxAsclin_Spi_Pins * pins
structure for SPI pins
Definition: IfxAsclin_Spi.h:364
IfxAsclin_enableRxFifoInlet
IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register...
Definition: IfxAsclin.h:1847
IfxAsclin_Spi_FrameControl::leadDelay
IfxAsclin_LeadDelay leadDelay
FRAMECON.LEAD, lead delay.
Definition: IfxAsclin_Spi.h:287
IfxAsclin_writeTxData
IFX_INLINE void IfxAsclin_writeTxData(Ifx_ASCLIN *asclin, uint32 data)
Definition: IfxAsclin.h:2452
IfxAsclin_ClockSource_noClock
no clock will be supplied
Definition: IfxAsclin.h:111
IfxAsclin_Spi_Baudrate::prescaler
uint16 prescaler
BITCON.PRESCALER, predivider to generate the baud rate.
Definition: IfxAsclin_Spi.h:249
IfxAsclin_Spi_Config
Configuration structure of the module.
Definition: IfxAsclin_Spi.h:353
IfxAsclin_Spi_InputOutputControl::spol
IfxAsclin_SlavePolarity spol
IOCR.SPOL slave polarity selection.
Definition: IfxAsclin_Spi.h:297
IfxAsclin_Spi_Config::interrupt
IfxAsclin_Spi_InterruptConfig interrupt
structure for interrupt configuration
Definition: IfxAsclin_Spi.h:363
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxAsclin_Spi_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Spi.h:288
IfxAsclin_TxFifoInletWidth_1
number of bytes 1
Definition: IfxAsclin.h:418
IfxAsclin_read16
uint32 IfxAsclin_read16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits.
Definition: IfxAsclin.c:186
IfxAsclin_Spi_Config::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
Definition: IfxAsclin_Spi.h:356
IfxAsclin_Spi_isrTransmit
void IfxAsclin_Spi_isrTransmit(IfxAsclin_Spi *asclin)
ISR transmit routine.
Definition: IfxAsclin_Spi.c:362
IfxAsclin_FrameMode_initialise
initialise mode
Definition: IfxAsclin.h:158
IfxAsclin_DataLength_8
number of bits per transfer 7
Definition: IfxAsclin.h:142
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxAsclin_SamplesPerBit_one
one sample per bit
Definition: IfxAsclin.h:347
IfxAsclin_Spi_read
void IfxAsclin_Spi_read(IfxAsclin_Spi *asclin)
Reads data from the Rx FIFO based on the outlet width.
Definition: IfxAsclin_Spi.c:377
IfxAsclin_Spi_getStatus
IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus(IfxAsclin_Spi *asclin)
Definition: IfxAsclin_Spi.c:99
IfxAsclin_Spi::sending
uint32 sending
sending in progress status
Definition: IfxAsclin_Spi.h:345
IfxAsclin_setStopBit
IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits.
Definition: IfxAsclin.h:2405
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxAsclin_setShiftDirection
IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction.
Definition: IfxAsclin.h:2384
IfxAsclin_OversamplingFactor_8
oversampling factor 8
Definition: IfxAsclin.h:233
IfxAsclin_getFrameErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the frame error flag status.
Definition: IfxAsclin.h:1955
IfxAsclin_setDisableModuleRequest
IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
Sets the disable module request.
Definition: IfxAsclin.h:2234
IfxAsclin_Spi::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Spi.h:342
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxAsclin_enableTxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO level flag.
Definition: IfxAsclin.h:1883
IfxAsclin_Spi::dataWidth
uint8 dataWidth
width of the data in bytes
Definition: IfxAsclin_Spi.h:347
IfxAsclin_clearTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag.
Definition: IfxAsclin.h:1715
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:382
IfxAsclin_Spi_Job::pending
uint32 pending
job remaining (count of the data)
Definition: IfxAsclin_Spi.h:316
IfxAsclin_setDataLength
IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer)
Definition: IfxAsclin.h:2222
IfxAsclin_Spi_Pins::slso
IFX_CONST IfxAsclin_Slso_Out * slso
SPI slave select pin.
Definition: IfxAsclin_Spi.h:329
IfxAsclin_setClockSource
void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source.
Definition: IfxAsclin.c:358
IfxAsclin_setTxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2446


iLLD_TC26B: IfxAsclin_Spi.h Source File

  • Asclin
  • Spi
IfxAsclin_Spi.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_Spi.h
3 * \brief ASCLIN SPI details
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Asclin_Spi_Usage How to use the ASCLIN SPI Interface driver?
44 * \ingroup IfxLld_Asclin
45 *
46 * The SPI interface driver provides a default ASCLIN configuration for synchronous serial communication in 8 and 16 bit mode, and a set of data transfer routines.
47 *
48 * Data transfers are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the ASCLIN peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.
49 *
50 * The SPI interface driver works only as Master
51 *
52 * In the following sections it will be described, how to integrate the driver into the application framework.
53 *
54 * \section IfxLld_Asclin_Spi_Preparation Preparation
55 *
56 * \subsection IfxLld_Asclin_Spi_Include Include Files
57 *
58 * Include following header file into your C code:
59 *
60 * \code
61 * #include <Asclin/Spi/IfxAsclin_Spi.h>
62 * \endcode
63 *
64 * \subsection IfxLld_Asclin_Spi_Variables Variables
65 *
66 * Declare the Spi handle as global variable in your C code:
67 *
68 * \code
69 * // used globally
70 * static IfxAsclin_Spi spi;
71 * \endcode
72 *
73 * In addition, declare global transmit and receive buffers for the data transfers:
74 *
75 * \code
76 * #define SPI_BUFFER_SIZE 8
77 * uint8 spiTxBuffer[SPI_BUFFER_SIZE];
78 * uint8 spiRxBuffer[SPI_BUFFER_SIZE];
79 * \endcode
80 *
81 * \subsection IfxLld_Asclin_Spi_Interrupt Interrupt Handler Installation
82 *
83 * See also \ref IfxLld_Cpu_Irq_Usage
84 *
85 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
86 *
87 * \code
88 * // priorities are normally defined in Ifx_IntPrioDef.h
89 * #define IFX_INTPRIO_ASCLIN1_TX 1
90 * #define IFX_INTPRIO_ASCLIN1_RX 2
91 * #define IFX_INTPRIO_ASCLIN1_ER 3
92 * \endcode
93 *
94 * Add the interrupt service routines to your C code. They have to call the SPI interrupt handlers by passing the spi handle:
95 *
96 * \code
97 * IFX_INTERRUPT(asclin1TxISR, 0, IFX_INTPRIO_ASCLIN1_TX)
98 * {
99 * IfxAsclin_Spi_isrTransmit(&spi);
100 * }
101 *
102 * IFX_INTERRUPT(asclin1RxISR, 0, IFX_INTPRIO_ASCLIN1_RX)
103 * {
104 * IfxAsclin_Spi_isrReceive(&spi);
105 * }
106 *
107 * IFX_INTERRUPT(asclin1ErISR, 0, IFX_INTPRIO_ASCLIN1_ER)
108 * {
109 * IfxAsclin_Spi_isrError(&spi);
110 * }
111 * \endcode
112 *
113 * Finally install the interrupt handlers in your initialisation function:
114 *
115 * \code
116 * // install interrupt handlers
117 * IfxCpu_Irq_installInterruptHandler(&asclin1TxISR, IFX_INTPRIO_ASCLIN1_TX);
118 * IfxCpu_Irq_installInterruptHandler(&asclin1RxISR, IFX_INTPRIO_ASCLIN1_RX);
119 * IfxCpu_Irq_installInterruptHandler(&asclin1ErISR, IFX_INTPRIO_ASCLIN1_ER);
120 * IfxCpu_enableInterrupts();
121 * \endcode
122 *
123 * \subsection IfxLld_Asclin_Spi_Init Module Initialisation
124 *
125 * The module initialisation can be done in the same function. Here an example:
126 *
127 * \code
128 * // create module config
129 * IfxAsclin_Spi_Config spiConfig;
130 * IfxAsclin_Spi_initModuleConfig(&spiConfig, &MODULE_ASCLIN1);
131 *
132 * // set the desired baudrate
133 * spiConfig.baudrate.prescaler = 1;
134 * spiConfig.baudrate.baudrate = 1000000; // FDR values will be calculated in initModule
135 *
136 * // ISR priorities and interrupt target
137 * spiConfig.interrupt.txPriority = IFX_INTPRIO_ASCLIN1_TX; // see also \ref IfxLld_Asclin
138 * spiConfig.interrupt.rxPriority = IFX_INTPRIO_ASCLIN1_RX; // see also \ref IfxLld_Asclin
139 * spiConfig.interrupt.erPriority = IFX_INTPRIO_ASCLIN1_ER; // see also \ref IfxLld_Asclin
140 * spiConfig.interrupt.typeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
141 *
142 * // pin configuration
143 * const IfxAsclin_Spi_Pins pins = {
144 * &IfxAsclin1_SCLK_P15_0_OUT, IfxPort_OutputMode_pushPull, // Clock out pin
145 * &IfxAsclin1_RXA_P15_1_IN, IfxPort_InputMode_pullUp, // Rx pin
146 * &IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
147 * &IfxAsclin1_SLSO_P20_8_OUT, IfxPort_OutputMode_pushPull, // Slave select pin
148 * IfxPort_PadDriver_cmosAutomotiveSpeed1
149 * };
150 * spiConfig.pins = &pins;
151 *
152 * // initialize module
153 * //IfxAsclin_Spi spi; // defined globally
154 * IfxAsclin_Spi_initModule(&spi, &spiConfig);
155 * \endcode
156 *
157 * The SPI is ready for use now!
158 *
159 *
160 * \section IfxLld_Asclin_Spi_DataTransfers Data Transfers
161 *
162 * In following examples we assume, that following buffers are declared globally:
163 *
164 * \code
165 * // load the data buffers
166 * int i;
167 * for (i = 0; i < SPI_BUFFER_SIZE; i++)
168 * {
169 * spiTxBuffer[i] = i + 1;
170 * spiRxBuffer[i] = 0;
171 * }
172 * \endcode
173 *
174 * Sending and Receiving a data stream:
175 *
176 * \code
177 * // wait until transfer of previous data stream is finished
178 * while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
179 *
180 * // send/receive new stream
181 * IfxAsclin_Spi_exchange(&spi, spiTxBuffer, spiRxBuffer, 8);
182 * \endcode
183 *
184 * Send only, discard received data:
185 *
186 * \code
187 * // wait until transfer of previous data stream is finished
188 * while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
189 *
190 * // send new stream
191 * IfxAsclin_Spi_exchange(&spi, spiTxBuffer, NULL_PTR, 8);
192 * \endcode
193 *
194 * Receive only, send all 1's
195 *
196 * \code
197 * // wait until transfer of previous data stream is finished
198 * while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
199 *
200 * // receive new stream
201 * IfxAsclin_Spi_exchange(&spi, NULL_PTR, spiRxBuffer, 8);
202 * \endcode
203 *
204 * \defgroup IfxLld_Asclin_Spi SPI
205 * \ingroup IfxLld_Asclin
206 * \defgroup IfxLld_Asclin_Spi_DataStructures Data Structures
207 * \ingroup IfxLld_Asclin_Spi
208 * \defgroup IfxLld_Asclin_Spi_ModuleFunctions Module Functions
209 * \ingroup IfxLld_Asclin_Spi
210 * \defgroup IfxLld_Asclin_Spi_InterruptFunctions Interrupt Functions
211 * \ingroup IfxLld_Asclin_Spi
212 * \defgroup IfxLld_Asclin_Spi_CommunicationFunctions Communication Functions
213 * \ingroup IfxLld_Asclin_Spi
214 */
215
216 #ifndef IFXASCLIN_SPI_H
217 #define IFXASCLIN_SPI_H 1
218
219 /******************************************************************************/
220 /*----------------------------------Includes----------------------------------*/
221 /******************************************************************************/
222
223 #include "Asclin/Std/IfxAsclin.h"
224
225 /******************************************************************************/
226 /*-------------------------------Enumerations---------------------------------*/
227 /******************************************************************************/
228
229 /** \brief Enumeration for job status
230 */
231 typedef enum
232 {
233 IfxAsclin_Spi_Status_ok = 0,
234 IfxAsclin_Spi_Status_busy = 1,
235 IfxAsclin_Spi_Status_unknown = 2
236 } IfxAsclin_Spi_Status;
237
238 /******************************************************************************/
239 /*-----------------------------Data Structures--------------------------------*/
240 /******************************************************************************/
241
242 /** \addtogroup IfxLld_Asclin_Spi_DataStructures
243 * \{ */
244 /** \brief Structure for Baudrate Generation
245 */
246 typedef struct
247 {
248 float32 baudrate; /**< \brief value of the required baudrate */
249 uint16 prescaler; /**< \brief BITCON.PRESCALER, predivider to generate the baud rate */
250 IfxAsclin_OversamplingFactor oversampling; /**< \brief BITCON.OVERSAMPLING, postdivider, used for oversampling */
251 } IfxAsclin_Spi_Baudrate;
252
253 /** \brief Structure for Bit Sampling
254 */
255 typedef struct
256 {
257 IfxAsclin_SamplesPerBit medianFilter; /**< \brief BITCON.SM, no. of samples per bit 1 or 3 */
258 } IfxAsclin_Spi_BitSamplingControl;
259
260 /** \brief Structure for Error Flags
261 */
262 typedef struct
263 {
264 uint8 frameError : 1; /**< \brief frame error */
265 uint8 rxFifoOverflow : 1; /**< \brief receive FIFO overflow error */
266 uint8 rxFifoUnderflow : 1; /**< \brief receive FIFO underflow error */
267 uint8 txFifoOverflow : 1; /**< \brief transmit FIFO overflow error */
268 } IfxAsclin_Spi_ErrorFlags;
269
270 /** \brief Structure for FIFO Control
271 */
272 typedef struct
273 {
274 IfxAsclin_TxFifoInletWidth inWidth; /**< \brief TXFIFOCON.INW, transmit FIFO inlet width */
275 IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel; /**< \brief TXFIFOCON.INTLEVEL, Tx FIFO interrupt level */
276 IfxAsclin_RxFifoOutletWidth outWidth; /**< \brief RXFIFOCON.OTW, receive FIFO oulet width */
277 IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel; /**< \brief RXFIFOCON.INTLEVEL, Rx FIFO interrupt level */
278 IfxAsclin_ReceiveBufferMode buffMode; /**< \brief RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer) */
279 } IfxAsclin_Spi_FifoControl;
280
281 /** \brief Structure for Frame Control
282 */
283 typedef struct
284 {
285 IfxAsclin_IdleDelay idleDelay; /**< \brief FRAMECON.IDLE, idle delay */
286 IfxAsclin_StopBit stopBit; /**< \brief FRAMECON.STOP, number of stop bits */
287 IfxAsclin_LeadDelay leadDelay; /**< \brief FRAMECON.LEAD, lead delay */
288 IfxAsclin_ShiftDirection shiftDir; /**< \brief FRAMECON.MSB, shift direction */
289 } IfxAsclin_Spi_FrameControl;
290
291 /** \brief Structure for input output control
292 */
293 typedef struct
294 {
295 IfxAsclin_RxInputSelect alti; /**< \brief IOCR.ALTI, Rx input (alternate input) pin selection */
296 IfxAsclin_ClockPolarity cpol; /**< \brief IOCR.CPOL clock polarity selection */
297 IfxAsclin_SlavePolarity spol; /**< \brief IOCR.SPOL slave polarity selection */
298 boolean loopBack; /**< \brief IOCR.LB, loop back mode selection, 0 for disable, 1 for enable */
299 } IfxAsclin_Spi_InputOutputControl;
300
301 /** \brief Structure for interrupt configuration
302 */
303 typedef struct
304 {
305 uint16 txPriority; /**< \brief transmit interrupt priority */
306 uint16 rxPriority; /**< \brief receive interrupt priority */
307 uint16 erPriority; /**< \brief error interrupt priority */
308 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
309 } IfxAsclin_Spi_InterruptConfig;
310
311 /** \brief Structure for data transfer jobs
312 */
313 typedef struct
314 {
315 void *data; /**< \brief pointer to user data */
316 uint32 pending; /**< \brief job remaining (count of the data) */
317 } IfxAsclin_Spi_Job;
318
319 /** \brief Structure for SPI pin configuration
320 */
321 typedef struct
322 {
323 IFX_CONST IfxAsclin_Sclk_Out *sclk; /**< \brief SPI clock select pin */
324 IfxPort_OutputMode sclkMode; /**< \brief sclk as output */
325 IFX_CONST IfxAsclin_Rx_In *rx; /**< \brief SPI Rx pin */
326 IfxPort_InputMode rxMode; /**< \brief rx pin as input */
327 IFX_CONST IfxAsclin_Tx_Out *tx; /**< \brief SPI Tx pin */
328 IfxPort_OutputMode txMode; /**< \brief tx as output */
329 IFX_CONST IfxAsclin_Slso_Out *slso; /**< \brief SPI slave select pin */
330 IfxPort_OutputMode slsoMode; /**< \brief slso as output */
331 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
332 } IfxAsclin_Spi_Pins;
333
334 /** \} */
335
336 /** \addtogroup IfxLld_Asclin_Spi_DataStructures
337 * \{ */
338 /** \brief Module handle
339 */
340 typedef struct
341 {
342 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
343 IfxAsclin_Spi_Job txJob; /**< \brief structure for Tx job */
344 IfxAsclin_Spi_Job rxJob; /**< \brief structure for Rx job */
345 uint32 sending; /**< \brief sending in progress status */
346 IfxAsclin_Spi_ErrorFlags errorFlags; /**< \brief structure for error flags status */
347 uint8 dataWidth; /**< \brief width of the data in bytes */
348 boolean transferInProgress; /**< \brief status of the transfer In progress */
349 } IfxAsclin_Spi;
350
351 /** \brief Configuration structure of the module
352 */
353 typedef struct
354 {
355 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
356 IfxAsclin_FrameMode frameMode; /**< \brief FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN) */
357 IfxAsclin_Spi_InputOutputControl inputOutput; /**< \brief structure for input output control */
358 IfxAsclin_Spi_Baudrate baudrate; /**< \brief structure for baudrate */
359 IfxAsclin_Spi_BitSamplingControl bitSampling; /**< \brief structure for bit sampling */
360 IfxAsclin_Spi_FrameControl frame; /**< \brief structure for frame control */
361 IfxAsclin_DataLength dataLength; /**< \brief DATCON.DATALENGTH, data length, number of bits per transfer */
362 IfxAsclin_Spi_FifoControl fifo; /**< \brief structure for FIFO control */
363 IfxAsclin_Spi_InterruptConfig interrupt; /**< \brief structure for interrupt configuration */
364 IFX_CONST IfxAsclin_Spi_Pins *pins; /**< \brief structure for SPI pins */
365 IfxAsclin_ClockSource clockSource; /**< \brief CSR.CLKSEL, clock source selection */
366 } IfxAsclin_Spi_Config;
367
368 /** \} */
369
370 /** \addtogroup IfxLld_Asclin_Spi_ModuleFunctions
371 * \{ */
372
373 /******************************************************************************/
374 /*-------------------------Global Function Prototypes-------------------------*/
375 /******************************************************************************/
376
377 /** \brief Disables the module
378 * \param asclin module handle
379 * \return None
380 */
381 IFX_EXTERN void IfxAsclin_Spi_disableModule(IfxAsclin_Spi *asclin);
382
383 /** \brief Initialises the module
384 * \param asclin module handle
385 * \param config predefined configuration structure of the module
386 * \return Status
387 *
388 * A coding example can be found in \ref IfxLld_Asclin_Spi_Usage
389 *
390 */
391 IFX_EXTERN IfxAsclin_Status IfxAsclin_Spi_initModule(IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config);
392
393 /** \brief Fills the configuration structure with default values
394 * \param config predefined configuration structure of the module
395 * \param asclin pointer to ASCLIN registers
396 * \return None
397 *
398 * A coding example can be found in \ref IfxLld_Asclin_Spi_Usage
399 *
400 */
401 IFX_EXTERN void IfxAsclin_Spi_initModuleConfig(IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin);
402
403 /** \} */
404
405 /** \addtogroup IfxLld_Asclin_Spi_InterruptFunctions
406 * \{ */
407
408 /******************************************************************************/
409 /*-------------------------Global Function Prototypes-------------------------*/
410 /******************************************************************************/
411
412 /** \brief ISR error routine.
413 *
414 * Currently it only stores error flags in the handle (asclin->errorFlags) whenever an error happens.
415 * The user software could react on these flags, e.g. re-initialising the module.
416 * \param asclin module handle
417 * \return None
418 */
419 IFX_EXTERN void IfxAsclin_Spi_isrError(IfxAsclin_Spi *asclin);
420
421 /** \brief ISR receive routine
422 * \param asclin module handle
423 * \return None
424 */
425 IFX_EXTERN void IfxAsclin_Spi_isrReceive(IfxAsclin_Spi *asclin);
426
427 /** \brief ISR transmit routine
428 * \param asclin module handle
429 * \return None
430 */
431 IFX_EXTERN void IfxAsclin_Spi_isrTransmit(IfxAsclin_Spi *asclin);
432
433 /** \} */
434
435 /** \addtogroup IfxLld_Asclin_Spi_CommunicationFunctions
436 * \{ */
437
438 /******************************************************************************/
439 /*-------------------------Global Function Prototypes-------------------------*/
440 /******************************************************************************/
441
442 /** \brief starts the data exchange
443 * \param asclin module handle
444 * \param src pointer to transmit data buffer
445 * \param dest pointer to receive data buffer
446 * \param count count of the data
447 * \return status
448 *
449 * A coding example can be found in \ref IfxLld_Asclin_Spi_Usage
450 *
451 */
452 IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_exchange(IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count);
453
454 /** \brief Reads data from the Rx FIFO based on the outlet width
455 * \param asclin module handle
456 * \return None
457 */
458 IFX_EXTERN void IfxAsclin_Spi_read(IfxAsclin_Spi *asclin);
459
460 /** \brief Writes data into the Tx FIFO based on the inlet width
461 * \param asclin module handle
462 * \return None
463 */
464 IFX_EXTERN void IfxAsclin_Spi_write(IfxAsclin_Spi *asclin);
465
466 /** \} */
467
468 /******************************************************************************/
469 /*-------------------------Global Function Prototypes-------------------------*/
470 /******************************************************************************/
471
472 /**
473 * \param asclin module handle
474 * \return status of the on going job
475 */
476 IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus(IfxAsclin_Spi *asclin);
477
478 #endif /* IFXASCLIN_SPI_H */
IfxAsclin_Spi_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Spi.h:285
IfxAsclin_Spi_FifoControl
Structure for FIFO Control.
Definition: IfxAsclin_Spi.h:272
IfxAsclin_Spi_Pins::sclkMode
IfxPort_OutputMode sclkMode
sclk as output
Definition: IfxAsclin_Spi.h:324
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin_Spi_exchange
IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_exchange(IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
starts the data exchange
Definition: IfxAsclin_Spi.c:80
IfxAsclin_ReceiveBufferMode
IfxAsclin_ReceiveBufferMode
Receive buffer mode Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF.
Definition: IfxAsclin.h:256
IfxAsclin_Spi_Baudrate
Structure for Baudrate Generation.
Definition: IfxAsclin_Spi.h:246
IfxAsclin_Spi_BitSamplingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, no. of samples per bit 1 or 3.
Definition: IfxAsclin_Spi.h:257
IfxAsclin_Spi_Status
IfxAsclin_Spi_Status
Enumeration for job status.
Definition: IfxAsclin_Spi.h:231
IfxAsclin_Spi_isrReceive
IFX_EXTERN void IfxAsclin_Spi_isrReceive(IfxAsclin_Spi *asclin)
ISR receive routine.
Definition: IfxAsclin_Spi.c:354
IfxAsclin_Spi_Pins::sclk
IFX_CONST IfxAsclin_Sclk_Out * sclk
SPI clock select pin.
Definition: IfxAsclin_Spi.h:323
IfxAsclin_Spi_Job
Structure for data transfer jobs.
Definition: IfxAsclin_Spi.h:313
IfxAsclin_Spi_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Spi.h:286
IfxAsclin_Spi_InputOutputControl::cpol
IfxAsclin_ClockPolarity cpol
IOCR.CPOL clock polarity selection.
Definition: IfxAsclin_Spi.h:296
IfxAsclin_Sclk_Out
SCLK pin mapping structure.
Definition: IfxAsclin_PinMap.h:80
IfxAsclin_Spi_Job::data
void * data
pointer to user data
Definition: IfxAsclin_Spi.h:315
IfxAsclin_Spi
Module handle.
Definition: IfxAsclin_Spi.h:340
IfxAsclin_Spi_Pins::txMode
IfxPort_OutputMode txMode
tx as output
Definition: IfxAsclin_Spi.h:328
IfxAsclin_Spi_InputOutputControl::loopBack
boolean loopBack
IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
Definition: IfxAsclin_Spi.h:298
IfxAsclin_SamplesPerBit
IfxAsclin_SamplesPerBit
Number of samples per bit, sample mode/medianfilter Definition in Ifx_ASCLIN.BITCON.B.SM.
Definition: IfxAsclin.h:345
IfxAsclin_Spi::txJob
IfxAsclin_Spi_Job txJob
structure for Tx job
Definition: IfxAsclin_Spi.h:343
IfxAsclin_RxFifoOutletWidth
IfxAsclin_RxFifoOutletWidth
Defines the number of bytes read from the Rx FIFO with one FPI bus read Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:297
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxAsclin_Spi_Config::baudrate
IfxAsclin_Spi_Baudrate baudrate
structure for baudrate
Definition: IfxAsclin_Spi.h:358
IfxAsclin_Spi_Config::frame
IfxAsclin_Spi_FrameControl frame
structure for frame control
Definition: IfxAsclin_Spi.h:360
float32
float float32
Definition: Platform_Types.h:170
IfxAsclin_Slso_Out
SLSO pin mapping structure.
Definition: IfxAsclin_PinMap.h:88
IfxAsclin_Spi_Status_ok
Definition: IfxAsclin_Spi.h:233
IfxAsclin_StopBit
IfxAsclin_StopBit
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay. Definition in Ifx_ASCLIN.FRAMECON.B.STOP.
Definition: IfxAsclin.h:391
IfxAsclin_Spi_Baudrate::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Spi.h:248
IfxAsclin_Spi_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
SPI Tx pin.
Definition: IfxAsclin_Spi.h:327
IfxAsclin_RxInputSelect
IfxAsclin_RxInputSelect
Alternate input selection for Rx signal. Definition in Ifx_ASCLIN.IOCR.B.ALTI.
Definition: IfxAsclin.h:308
IfxAsclin_Spi_Pins
Structure for SPI pin configuration.
Definition: IfxAsclin_Spi.h:321
IfxAsclin_Spi_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Spi.h:331
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxAsclin_Spi_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Spi.h:265
IfxAsclin_Spi_disableModule
IFX_EXTERN void IfxAsclin_Spi_disableModule(IfxAsclin_Spi *asclin)
Disables the module.
Definition: IfxAsclin_Spi.c:70
IfxAsclin_RxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel
Defines the filling level that triggers a drain (RX) interrupt or DMA access Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:274
IfxAsclin_Spi_isrError
IFX_EXTERN void IfxAsclin_Spi_isrError(IfxAsclin_Spi *asclin)
ISR error routine.
Definition: IfxAsclin_Spi.c:323
IfxAsclin_Spi_Baudrate::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, postdivider, used for oversampling.
Definition: IfxAsclin_Spi.h:250
IfxAsclin_TxFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel
Defines the filling level that triggers a refill (TX) interrupt or DMA access Definition in Ifx_ASCLI...
Definition: IfxAsclin.h:426
IfxAsclin_Spi_initModule
IFX_EXTERN IfxAsclin_Status IfxAsclin_Spi_initModule(IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
Initialises the module.
Definition: IfxAsclin_Spi.c:112
IfxAsclin_Spi_InterruptConfig
Structure for interrupt configuration.
Definition: IfxAsclin_Spi.h:303
IfxAsclin_Spi_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
SPI Rx pin.
Definition: IfxAsclin_Spi.h:325
IfxAsclin_Spi_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Spi.h:365
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxAsclin_Spi_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Spi.h:267
IfxAsclin_OversamplingFactor
IfxAsclin_OversamplingFactor
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed Defini...
Definition: IfxAsclin.h:227
IfxAsclin_Spi_initModuleConfig
IFX_EXTERN void IfxAsclin_Spi_initModuleConfig(IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
Fills the configuration structure with default values.
Definition: IfxAsclin_Spi.c:257
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxAsclin_Spi_InterruptConfig::erPriority
uint16 erPriority
error interrupt priority
Definition: IfxAsclin_Spi.h:307
IfxAsclin_Spi_getStatus
IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus(IfxAsclin_Spi *asclin)
Definition: IfxAsclin_Spi.c:99
IfxAsclin_Spi_Status_busy
Definition: IfxAsclin_Spi.h:234
IfxAsclin_LeadDelay
IfxAsclin_LeadDelay
Defines the leading delay in bit times in SPI mode. ASC mode: not applicable. LIN mode: delay between...
Definition: IfxAsclin.h:194
IfxAsclin_FrameMode
IfxAsclin_FrameMode
Defines the basic operating mode of the module. Changing the mode must be done by switching first to ...
Definition: IfxAsclin.h:156
IfxAsclin_IdleDelay
IfxAsclin_IdleDelay
Defines the duration of the IDLE delay in bit times. SPI mode: this is the idle time between the fram...
Definition: IfxAsclin.h:178
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:64
IfxAsclin_ClockSource
IfxAsclin_ClockSource
Selection of clock source Definition in Ifx_ASCLIN.CSR.B.CLKSEL.
Definition: IfxAsclin.h:109
IfxAsclin_DataLength
IfxAsclin_DataLength
Number of bits per transfer Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.
Definition: IfxAsclin.h:133
IfxAsclin_Spi_Config::inputOutput
IfxAsclin_Spi_InputOutputControl inputOutput
structure for input output control
Definition: IfxAsclin_Spi.h:357
IfxAsclin_Spi_ErrorFlags::frameError
uint8 frameError
frame error
Definition: IfxAsclin_Spi.h:264
IfxAsclin_Spi::rxJob
IfxAsclin_Spi_Job rxJob
structure for Rx job
Definition: IfxAsclin_Spi.h:344
IfxAsclin_Spi_Config::bitSampling
IfxAsclin_Spi_BitSamplingControl bitSampling
structure for bit sampling
Definition: IfxAsclin_Spi.h:359
IfxAsclin_Spi_ErrorFlags::rxFifoUnderflow
uint8 rxFifoUnderflow
receive FIFO underflow error
Definition: IfxAsclin_Spi.h:266
IfxAsclin_Spi_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Spi.h:308
IfxAsclin_Spi_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
Definition: IfxAsclin_Spi.h:278
IfxAsclin_Spi_FifoControl::outWidth
IfxAsclin_RxFifoOutletWidth outWidth
RXFIFOCON.OTW, receive FIFO oulet width.
Definition: IfxAsclin_Spi.h:276
IfxAsclin_SlavePolarity
IfxAsclin_SlavePolarity
Defines the idle level of the SLSO signal, which is the level. Outside the data transmission, leading and trailing time intervals. Definition in Ifx_ASCLIN.IOCR.B.SPOL.
Definition: IfxAsclin.h:365
IfxAsclin_Spi_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Spi.h:305
IfxAsclin_ClockPolarity
IfxAsclin_ClockPolarity
CPOL defines the idle level of the clock signal in the SPI mode. Idle level is the level outside the ...
Definition: IfxAsclin.h:100
IfxAsclin_Spi_Config::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Spi.h:361
IfxAsclin_Spi_InputOutputControl::alti
IfxAsclin_RxInputSelect alti
IOCR.ALTI, Rx input (alternate input) pin selection.
Definition: IfxAsclin_Spi.h:295
IfxAsclin_TxFifoInletWidth
IfxAsclin_TxFifoInletWidth
Defines the number of bytes written to the Tx FIFO with one FPI bus write Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:415
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxAsclin_Spi::transferInProgress
boolean transferInProgress
status of the transfer In progress
Definition: IfxAsclin_Spi.h:348
IfxAsclin_Spi_BitSamplingControl
Structure for Bit Sampling.
Definition: IfxAsclin_Spi.h:255
IfxAsclin_Spi_ErrorFlags
Structure for Error Flags.
Definition: IfxAsclin_Spi.h:262
IfxAsclin_Spi::errorFlags
IfxAsclin_Spi_ErrorFlags errorFlags
structure for error flags status
Definition: IfxAsclin_Spi.h:346
IfxAsclin_Spi_write
IFX_EXTERN void IfxAsclin_Spi_write(IfxAsclin_Spi *asclin)
Writes data into the Tx FIFO based on the inlet width.
Definition: IfxAsclin_Spi.c:428
IfxAsclin_Spi_FifoControl::rxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel
RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
Definition: IfxAsclin_Spi.h:277
IfxAsclin_Spi_InputOutputControl
Structure for input output control.
Definition: IfxAsclin_Spi.h:293
IfxAsclin_Spi_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Spi.h:306
IfxAsclin_Spi_Config::fifo
IfxAsclin_Spi_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Spi.h:362
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxAsclin_Spi_FifoControl::txFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel
TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.
Definition: IfxAsclin_Spi.h:275
IfxAsclin_ShiftDirection
IfxAsclin_ShiftDirection
SPI mode: defines the shift direction of the shift register. ASC and LIN mode: should be set to 0...
Definition: IfxAsclin.h:355
IfxAsclin_Spi_Pins::rxMode
IfxPort_InputMode rxMode
rx pin as input
Definition: IfxAsclin_Spi.h:326
IfxAsclin_Spi_Pins::slsoMode
IfxPort_OutputMode slsoMode
slso as output
Definition: IfxAsclin_Spi.h:330
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxAsclin_Spi_Config::pins
IFX_CONST IfxAsclin_Spi_Pins * pins
structure for SPI pins
Definition: IfxAsclin_Spi.h:364
IfxAsclin_Spi_FrameControl::leadDelay
IfxAsclin_LeadDelay leadDelay
FRAMECON.LEAD, lead delay.
Definition: IfxAsclin_Spi.h:287
IfxAsclin_Spi_Baudrate::prescaler
uint16 prescaler
BITCON.PRESCALER, predivider to generate the baud rate.
Definition: IfxAsclin_Spi.h:249
IfxAsclin_Spi_Status_unknown
Definition: IfxAsclin_Spi.h:235
IfxAsclin_Spi_Config
Configuration structure of the module.
Definition: IfxAsclin_Spi.h:353
IfxAsclin_Spi_InputOutputControl::spol
IfxAsclin_SlavePolarity spol
IOCR.SPOL slave polarity selection.
Definition: IfxAsclin_Spi.h:297
IfxAsclin_Spi_Config::interrupt
IfxAsclin_Spi_InterruptConfig interrupt
structure for interrupt configuration
Definition: IfxAsclin_Spi.h:363
IfxAsclin_Spi_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Spi.h:288
IfxAsclin_Spi_Config::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
Definition: IfxAsclin_Spi.h:356
IfxAsclin_Spi_isrTransmit
IFX_EXTERN void IfxAsclin_Spi_isrTransmit(IfxAsclin_Spi *asclin)
ISR transmit routine.
Definition: IfxAsclin_Spi.c:362
IfxAsclin_Spi_FifoControl::inWidth
IfxAsclin_TxFifoInletWidth inWidth
TXFIFOCON.INW, transmit FIFO inlet width.
Definition: IfxAsclin_Spi.h:274
IfxAsclin_Spi_read
IFX_EXTERN void IfxAsclin_Spi_read(IfxAsclin_Spi *asclin)
Reads data from the Rx FIFO based on the outlet width.
Definition: IfxAsclin_Spi.c:377
IfxAsclin.h
ASCLIN basic functionality.
IfxAsclin_Spi::sending
uint32 sending
sending in progress status
Definition: IfxAsclin_Spi.h:345
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxAsclin_Spi::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Spi.h:342
IfxAsclin_Spi::dataWidth
uint8 dataWidth
width of the data in bytes
Definition: IfxAsclin_Spi.h:347
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:382
IfxAsclin_Spi_Job::pending
uint32 pending
job remaining (count of the data)
Definition: IfxAsclin_Spi.h:316
IfxAsclin_Spi_Pins::slso
IFX_CONST IfxAsclin_Slso_Out * slso
SPI slave select pin.
Definition: IfxAsclin_Spi.h:329
IfxAsclin_Spi_FrameControl
Structure for Frame Control.
Definition: IfxAsclin_Spi.h:283


iLLD_TC26B: IfxAsclin_cfg.c Source File

  • _Impl
IfxAsclin_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_cfg.c
3 * \brief ASCLIN on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxAsclin_cfg.h"
49
50 /******************************************************************************/
51 /*-----------------------Exported Variables/Constants-------------------------*/
52 /******************************************************************************/
53
54 IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES] = {
55 {&MODULE_ASCLIN0, (uint32)IfxAsclin_Index_0},
56 {&MODULE_ASCLIN1, (uint32)IfxAsclin_Index_1},
57 {&MODULE_ASCLIN2, (uint32)IfxAsclin_Index_2},
58 {&MODULE_ASCLIN3, (uint32)IfxAsclin_Index_3}
59 };
IfxAsclin_Index_0
ASCLIN Index 0.
Definition: IfxAsclin_cfg.h:80
IfxAsclin_Index_2
ASCLIN Index 2.
Definition: IfxAsclin_cfg.h:82
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxAsclin_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES]
Definition: IfxAsclin_cfg.c:54
IFXASCLIN_NUM_MODULES
#define IFXASCLIN_NUM_MODULES
Definition: IfxAsclin_cfg.h:67
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxAsclin_Index_3
ASCLIN Index 3.
Definition: IfxAsclin_cfg.h:83
IfxAsclin_Index_1
ASCLIN Index 1.
Definition: IfxAsclin_cfg.h:81
IfxAsclin_cfg.h
ASCLIN on-chip implementation data.
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140


iLLD_TC26B: IfxAsclin_cfg.h Source File

  • _Impl
IfxAsclin_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_cfg.h
3 * \brief ASCLIN on-chip implementation data
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Asclin ASCLIN
44 * \ingroup IfxLld
45 * \defgroup IfxLld_Asclin_Impl Implementation
46 * \ingroup IfxLld_Asclin
47 * \defgroup IfxLld_Asclin_Std Standard Driver
48 * \ingroup IfxLld_Asclin
49 * \defgroup IfxLld_Asclin_Impl_Enumerations Enumerations
50 * \ingroup IfxLld_Asclin_Impl
51 */
52
53 #ifndef IFXASCLIN_CFG_H
54 #define IFXASCLIN_CFG_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "Cpu/Std/Ifx_Types.h"
61 #include "IfxAsclin_reg.h"
62
63 /******************************************************************************/
64 /*-----------------------------------Macros-----------------------------------*/
65 /******************************************************************************/
66
67 #define IFXASCLIN_NUM_MODULES (4)
68
69 /******************************************************************************/
70 /*--------------------------------Enumerations--------------------------------*/
71 /******************************************************************************/
72
73 /** \addtogroup IfxLld_Asclin_Impl_Enumerations
74 * \{ */
75 /** \brief List of the available Asclin resources
76 */
77 typedef enum
78 {
79 IfxAsclin_Index_none = -1, /**< \brief Not Selected */
80 IfxAsclin_Index_0 = 0, /**< \brief ASCLIN Index 0 */
81 IfxAsclin_Index_1, /**< \brief ASCLIN Index 1 */
82 IfxAsclin_Index_2, /**< \brief ASCLIN Index 2 */
83 IfxAsclin_Index_3 /**< \brief ASCLIN Index 3 */
84 } IfxAsclin_Index;
85
86 /** \} */
87
88 /******************************************************************************/
89 /*-------------------Global Exported Variables/Constants----------------------*/
90 /******************************************************************************/
91 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES];
92
93 #endif /* IFXASCLIN_CFG_H */
IfxAsclin_Index_0
ASCLIN Index 0.
Definition: IfxAsclin_cfg.h:80
IfxAsclin_Index_2
ASCLIN Index 2.
Definition: IfxAsclin_cfg.h:82
IfxAsclin_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES]
Definition: IfxAsclin_cfg.h:91
IfxAsclin_Index
IfxAsclin_Index
List of the available Asclin resources.
Definition: IfxAsclin_cfg.h:77
IFXASCLIN_NUM_MODULES
#define IFXASCLIN_NUM_MODULES
Definition: IfxAsclin_cfg.h:67
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxAsclin_Index_3
ASCLIN Index 3.
Definition: IfxAsclin_cfg.h:83
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxAsclin_Index_none
Not Selected.
Definition: IfxAsclin_cfg.h:79
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxAsclin_Index_1
ASCLIN Index 1.
Definition: IfxAsclin_cfg.h:81
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140


iLLD_TC26B: IfxCcu6.c Source File

  • Ccu6
  • Std
IfxCcu6.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6.c
3 * \brief CCU6 basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxCcu6.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
54 {
55 unsigned mosel = ccu6->MOSEL.U;
56 uint16 shift = (uint16)outputLine;
57 uint16 data = 2 * selectedTrigger;
58
59 if (ccu6 == &MODULE_CCU61)
60 {
61 data = data + 1;
62 }
63
64 mosel = ccu6->MOSEL.U;
65 __ldmst_c(&mosel, (0x7U << shift), (data << shift));
66 ccu6->MOSEL.U = mosel;
67 }
68
69
70 void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
71 {
72 uint32 shift, mask;
73
74 if (timer != IfxCcu6_TimerId_t13)
75 {
76 if (channelOut != IfxCcu6_ChannelOut_cout3)
77 {
78 shift = channelOut;
79 mask = (1 << shift);
80 ccu6->MODCTR.U = ccu6->MODCTR.U & ~(mask);
81 }
82 else
83 {}
84 }
85 else
86 {
87 if (channelOut != IfxCcu6_ChannelOut_cout3)
88 {
89 shift = channelOut + 8;
90 mask = (1 << shift);
91 ccu6->MODCTR.U = ccu6->MODCTR.U & ~(mask);
92 }
93 else
94 {
95 ccu6->MODCTR.B.ECT13O = FALSE;
96 }
97 }
98 }
99
100
101 void IfxCcu6_disableModule(Ifx_CCU6 *ccu6)
102 {
103 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
104 IfxScuWdt_clearCpuEndinit(passwd);
105 ccu6->CLC.U = 0x00000001;
106 IfxScuWdt_setCpuEndinit(passwd);
107
108 /* Wait until module is disabled */
109 while (IfxCcu6_isModuleEnabled(ccu6) == TRUE)
110 {}
111 }
112
113
114 void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
115 {
116 uint32 shift, mask;
117
118 if (timer != IfxCcu6_TimerId_t13)
119 {
120 if (channelOut != IfxCcu6_ChannelOut_cout3)
121 {
122 shift = channelOut;
123 mask = (1 << shift);
124 ccu6->MODCTR.U = ccu6->MODCTR.U | (mask);
125 }
126 else
127 {}
128 }
129 else
130 {
131 if (channelOut != IfxCcu6_ChannelOut_cout3)
132 {
133 shift = channelOut + 8;
134 mask = (1 << shift);
135 ccu6->MODCTR.U = ccu6->MODCTR.U | (mask);
136 }
137 else
138 {
139 ccu6->MODCTR.B.ECT13O = TRUE;
140 }
141 }
142 }
143
144
145 void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
146 {
147 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
148 IfxScuWdt_clearCpuEndinit(passwd);
149 ccu6->CLC.B.DISR = 0U; /* Enable module */
150 IfxScuWdt_setCpuEndinit(passwd);
151
152 /* Wait until module is enabled */
153 while (IfxCcu6_isModuleEnabled(ccu6) == FALSE)
154 {}
155 }
156
157
158 Ifx_CCU6 *IfxCcu6_getAddress(IfxCcu6_Index ccu6)
159 {
160 Ifx_CCU6 *module;
161
162 if (ccu6 < IFXCCU6_NUM_MODULES)
163 {
164 module = (Ifx_CCU6 *)IfxCcu6_cfg_indexMap[ccu6].module;
165 }
166 else
167 {
168 module = NULL_PTR;
169 }
170
171 return module;
172 }
173
174
175 uint32 IfxCcu6_getCaptureRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
176 {
177 uint32 value = 0;
178
179 switch (channel)
180 {
181 case IfxCcu6_T12Channel_0:
182 value = ccu6->CC60R.U;
183 break;
184 case IfxCcu6_T12Channel_1:
185 value = ccu6->CC61R.U;
186 break;
187 case IfxCcu6_T12Channel_2:
188 value = ccu6->CC62R.U;
189 break;
190 }
191
192 return value;
193 }
194
195
196 uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
197 {
198 uint32 value = 0;
199
200 switch (channel)
201 {
202 case IfxCcu6_T12Channel_0:
203 value = ccu6->CC60SR.U;
204 break;
205 case IfxCcu6_T12Channel_1:
206 value = ccu6->CC61SR.U;
207 break;
208 case IfxCcu6_T12Channel_2:
209 value = ccu6->CC62SR.U;
210 break;
211 }
212
213 return value;
214 }
215
216
217 IfxCcu6_Index IfxCcu6_getIndex(Ifx_CCU6 *ccu6)
218 {
219 uint32 index;
220 IfxCcu6_Index result;
221
222 result = IfxCcu6_Index_none;
223
224 for (index = 0; index < IFXCCU6_NUM_MODULES; index++)
225 {
226 if (IfxCcu6_cfg_indexMap[index].module == ccu6)
227 {
228 result = (IfxCcu6_Index)IfxCcu6_cfg_indexMap[index].index;
229 break;
230 }
231 }
232
233 return result;
234 }
235
236
237 volatile Ifx_SRC_SRCR *IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
238 {
239 sint32 moduleIdx = IfxCcu6_getIndex(ccu6);
240 volatile Ifx_SRC_SRCR *srcr;
241
242 srcr = &(MODULE_SRC.CCU6.CCU6[moduleIdx].SR0);
243 return &(srcr[serviceRequest]);
244 }
245
246
247 uint32 IfxCcu6_readTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
248 {
249 uint32 result = 0;
250
251 if (timer != IfxCcu6_TimerId_t13)
252 {
253 result = ccu6->T12.U;
254 }
255 else
256 {
257 result = ccu6->T13.U;
258 }
259
260 return result;
261 }
262
263
264 void IfxCcu6_resetModule(Ifx_CCU6 *ccu6)
265 {
266 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
267
268 IfxScuWdt_clearCpuEndinit(passwd);
269 ccu6->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
270 ccu6->KRST1.B.RST = 1;
271 IfxScuWdt_setCpuEndinit(passwd);
272
273 while (0 == ccu6->KRST0.B.RSTSTAT) /* Wait until reset is executed */
274
275 {}
276
277 IfxScuWdt_clearCpuEndinit(passwd);
278 ccu6->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
279 IfxScuWdt_setCpuEndinit(passwd);
280 }
281
282
283 void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
284 {
285 if ((source == IfxCcu6_InterruptSource_cc60RisingEdge) || (source == IfxCcu6_InterruptSource_cc60FallingEdge))
286 {
287 ccu6->INP.B.INPCC60 = serviceRequest;
288 }
289 else if ((source == IfxCcu6_InterruptSource_cc61RisingEdge) || (source == IfxCcu6_InterruptSource_cc61FallingEdge))
290 {
291 ccu6->INP.B.INPCC61 = serviceRequest;
292 }
293 else if ((source == IfxCcu6_InterruptSource_cc62RisingEdge) || (source == IfxCcu6_InterruptSource_cc62FallingEdge))
294 {
295 ccu6->INP.B.INPCC62 = serviceRequest;
296 }
297 else if ((source == IfxCcu6_InterruptSource_correctHallEvent))
298 {
299 ccu6->INP.B.INPCHE = serviceRequest;
300 }
301 else if ((source == IfxCcu6_InterruptSource_trap) || (source == IfxCcu6_InterruptSource_wrongHallEvent))
302 {
303 ccu6->INP.B.INPERR = serviceRequest;
304 }
305 else if ((source == IfxCcu6_InterruptSource_t12OneMatch) || (source == IfxCcu6_InterruptSource_t12PeriodMatch))
306 {
307 ccu6->INP.B.INPT12 = serviceRequest;
308 }
309 else if ((source == IfxCcu6_InterruptSource_t13CompareMatch) || (source == IfxCcu6_InterruptSource_t13PeriodMatch))
310 {
311 ccu6->INP.B.INPT13 = serviceRequest;
312 }
313 else
314 {
315 __debug();
316 }
317 }
318
319
320 void IfxCcu6_setOutputPassiveLevel(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
321 {
322 if (channelOut != IfxCcu6_ChannelOut_cout3)
323 {
324 uint32 shift = channelOut;
325 uint32 mask = (1 << shift);
326 ccu6->PSLR.U = (ccu6->PSLR.U & ~mask) | ((uint32)state << shift);
327 }
328 else
329 {
330 ccu6->PSLR.B.PSL63 = state;
331 }
332 }
333
334
335 void IfxCcu6_setT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
336 {
337 uint32 mask = (0x0101U << channel);
338 uint32 mode;
339
340 if (state == IfxCcu6_CaptureCompareState_set)
341 {
342 mode = 0x0001U;
343 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << channel);
344 }
345
346 if (state == IfxCcu6_CaptureCompareState_clear)
347 {
348 mode = 0x0100U;
349 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << channel);
350 }
351
352 if (state == IfxCcu6_CaptureCompareState_toggle)
353 {
354 mode = 0x0101U;
355 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << channel);
356 }
357 }
358
359
360 void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
361 {
362 switch (channel)
363 {
364 case IfxCcu6_T12Channel_0:
365 ccu6->CC60SR.B.CCS = value;
366 break;
367 case IfxCcu6_T12Channel_1:
368 ccu6->CC61SR.B.CCS = value;
369 break;
370 case IfxCcu6_T12Channel_2:
371 ccu6->CC62SR.B.CCS = value;
372 break;
373 }
374 }
375
376
377 float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
378 {
379 uint16 prescaler;
380 float32 freqCC6 = IfxScuCcu_getSpbFrequency();
381 uint16 divFactor = freqCC6 / frequency;
382
383 for (prescaler = 0; prescaler < 16; prescaler++)
384 {
385 divFactor = divFactor / 2;
386
387 if (divFactor == (uint8)0)
388 {
389 break;
390 }
391 }
392
393 if (prescaler < 16)
394 {
395 uint16 periodVal;
396 boolean additionalPrescaler;
397 IfxCcu6_TimerInputClock clockInput;
398
399 periodVal = (uint16)((countMode != IfxCcu6_T12CountMode_edgeAligned) ? ((period / 2) - 1) : (period - 1));
400 IfxCcu6_setT12PeriodValue(ccu6, periodVal);
401 IfxCcu6_enableShadowTransfer(ccu6, TRUE, FALSE);
402
403 clockInput = (IfxCcu6_TimerInputClock)(prescaler & 0x7U);
404 IfxCcu6_setInputClockFrequency(ccu6, IfxCcu6_TimerId_t12, clockInput);
405
406 additionalPrescaler = ((prescaler & 0x8U) != 0);
407
408 if (additionalPrescaler)
409 {
410 IfxCcu6_enableAdditionalPrescaler(ccu6, IfxCcu6_TimerId_t12);
411 }
412
413 IfxCcu6_setT12CountMode(ccu6, countMode);
414
415 frequency = freqCC6 / (0x1u << prescaler); // Frequency = FREQ_CCU6 / (2 ^ prescaler)
416 }
417 else
418 {
419 frequency = 0;
420 }
421
422 return frequency;
423 }
424
425
426 void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
427 {
428 ccu6->PISEL2.B.T12EXT = extInput->select >= Ifx_RxSel_e;
429 ccu6->PISEL0.B.IST12HR = extInput->select;
430
431 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, extInput->module == ccu6);
432 }
433
434
435 void IfxCcu6_setT13CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
436 {
437 uint32 shift = 6;
438 uint32 mask = (0x0101U << shift);
439 uint32 mode;
440
441 if (state == IfxCcu6_CaptureCompareState_set)
442 {
443 mode = 0x0001U;
444 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << shift);
445 }
446
447 if (state == IfxCcu6_CaptureCompareState_clear)
448 {
449 mode = 0x0100U;
450 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << shift);
451 }
452
453 if (state == IfxCcu6_CaptureCompareState_toggle)
454 {
455 mode = 0x0101U;
456 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << shift);
457 }
458 }
459
460
461 float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
462 {
463 uint16 prescaler;
464 float32 freqCC6 = IfxScuCcu_getSpbFrequency();
465 uint16 divFactor = freqCC6 / frequency;
466
467 for (prescaler = 0; prescaler < 16; prescaler++)
468 {
469 divFactor = divFactor / 2;
470
471 if (divFactor == (uint8)0)
472 {
473 break;
474 }
475 }
476
477 if (prescaler < 16)
478 {
479 uint16 periodVal;
480 boolean additionalPrescaler;
481 IfxCcu6_TimerInputClock clockInput;
482
483 periodVal = (uint16)(period - 1);
484 IfxCcu6_setT13PeriodValue(ccu6, periodVal);
485 IfxCcu6_enableShadowTransfer(ccu6, FALSE, TRUE);
486
487 clockInput = (IfxCcu6_TimerInputClock)(prescaler & 0x7U);
488 IfxCcu6_setInputClockFrequency(ccu6, IfxCcu6_TimerId_t13, clockInput);
489
490 additionalPrescaler = ((prescaler & 0x8U) != 0);
491
492 if (additionalPrescaler)
493 {
494 IfxCcu6_enableAdditionalPrescaler(ccu6, IfxCcu6_TimerId_t13);
495 }
496
497 frequency = freqCC6 / (0x1u << prescaler); // Frequency = FREQ_CCU6 / (2 ^ prescaler)
498 }
499 else
500 {
501 /** \retval IfxCcu6_Stat_wrongPwmFreq if the T12 prescaler can't fulfill the
502 * required frequency */
503 frequency = 0;
504 }
505
506 return frequency;
507 }
508
509
510 void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
511 {
512 ccu6->PISEL2.B.T13EXT = extInput->select >= Ifx_RxSel_e;
513 ccu6->PISEL2.B.IST13HR = extInput->select;
514
515 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, extInput->module == ccu6);
516 }
IfxCcu6_enableAdditionalPrescaler
IFX_INLINE void IfxCcu6_enableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support h...
Definition: IfxCcu6.h:1522
IfxCcu6_Index_none
Not Selected.
Definition: IfxCcu6_cfg.h:82
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:572
Ifx_RxSel_e
Definition: Ifx_Types.h:133
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:237
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxCcu6_Index
IfxCcu6_Index
List of the available CCU6 resources.
Definition: IfxCcu6_cfg.h:80
IfxCcu6_InterruptSource_cc62FallingEdge
Capture compare match falling edge interrupt enable for channel CC62.
Definition: IfxCcu6.h:191
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:299
IfxCcu6_InterruptSource_t13PeriodMatch
Interrupt enable for T13 period-match.
Definition: IfxCcu6.h:196
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:179
IfxCcu6_InterruptSource_wrongHallEvent
Interrupt enable for wrong hall event.
Definition: IfxCcu6.h:199
IfxCcu6_getCaptureShadowRegisterValue
uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel.
Definition: IfxCcu6.c:196
IfxCcu6_InterruptSource_t13CompareMatch
Interrupt enable for T13 compare-match.
Definition: IfxCcu6.h:195
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:197
IfxCcu6_CaptureCompareState_clear
Bit CC6xST is cleared.
Definition: IfxCcu6.h:104
IfxCcu6_ChannelOut
IfxCcu6_ChannelOut
Capture compare output pins.
Definition: IfxCcu6.h:110
IfxCcu6_InterruptSource_cc60RisingEdge
Capture compare match rising edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:181
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCcu6_InterruptSource_cc61FallingEdge
Capture compare match falling edge interrupt enable for channel CC61.
Definition: IfxCcu6.h:187
float32
float float32
Definition: Platform_Types.h:170
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:108
IfxCcu6_InterruptSource_cc60FallingEdge
Capture compare match falling edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:183
IfxCcu6_T12hr_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxCcu6_PinMap.h:116
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxCcu6_getAddress
Ifx_CCU6 * IfxCcu6_getAddress(IfxCcu6_Index ccu6)
Returns the module index of the selected CCU6 module.
Definition: IfxCcu6.c:158
IfxCcu6_routeInterruptNode
void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:283
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:337
IfxCcu6_InterruptSource_cc61RisingEdge
Capture compare match rising edge interrupt enable for channel CC61.
Definition: IfxCcu6.h:185
IfxCcu6_disableModule
void IfxCcu6_disableModule(Ifx_CCU6 *ccu6)
Disables the selected CCU6 kernel.
Definition: IfxCcu6.c:101
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu6_setT12Frequency
float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:377
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1603
IfxCcu6_T12hr_In::module
Ifx_CCU6 * module
Base address.
Definition: IfxCcu6_PinMap.h:114
IfxCcu6_CaptureCompareState_toggle
Bit CC6xST is toggled.
Definition: IfxCcu6.h:105
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:336
IfxCcu6_CaptureCompareState_set
Bit CC6xST is set.
Definition: IfxCcu6.h:103
IfxCcu6_ChannelOut_cout3
CC63 compare output COUT3.
Definition: IfxCcu6.h:118
IfxCcu6_setT13InputSignal
void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:510
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2079
IfxCcu6_readTimer
uint32 IfxCcu6_readTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the current value of the timer register.
Definition: IfxCcu6.c:247
IfxCcu6_T12Channel
IfxCcu6_T12Channel
Capture compare channel of Timer12.
Definition: IfxCcu6.h:258
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:193
IfxCcu6.h
CCU6 basic functionality.
IFXCCU6_NUM_MODULES
#define IFXCCU6_NUM_MODULES
Definition: IfxCcu6_cfg.h:66
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:230
IfxCcu6_TimerId
IfxCcu6_TimerId
Timer number ( T12 / T13 )
Definition: IfxCcu6.h:334
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1914
__debug
void __debug(void) __attribute__((intrinsic_function(0x103
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:297
IfxCcu6_setT12CompareValue
void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers)
Definition: IfxCcu6.c:360
IfxCcu6_disableModulationOutput
void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12...
Definition: IfxCcu6.c:70
IfxCcu6_setT12CaptureCompareState
void IfxCcu6_setT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xS...
Definition: IfxCcu6.c:335
IfxCcu6_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES]
Definition: IfxCcu6_cfg.c:58
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_getIndex
IfxCcu6_Index IfxCcu6_getIndex(Ifx_CCU6 *ccu6)
Returns CCU6 index.
Definition: IfxCcu6.c:217
u
uint32 min u
Definition: IfxCpu_IntrinsicsDcc.h:143
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_setInputClockFrequency
IFX_INLINE void IfxCcu6_setInputClockFrequency(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency)
Sets the input clock for timers (T12 or T13)
Definition: IfxCcu6.h:2000
IfxCcu6_connectTrigger
void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
Definition: IfxCcu6.c:53
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:194
IfxCcu6_T12Channel_0
T12 channel CC60.
Definition: IfxCcu6.h:260
IfxCcu6_T12Channel_1
T12 channel CC61.
Definition: IfxCcu6.h:261
sint32
long sint32
Definition: Platform_Types.h:134
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCcu6_InterruptSource_correctHallEvent
Interrupt enable for correct hall event.
Definition: IfxCcu6.h:198
IfxCcu6_InterruptSource_cc62RisingEdge
Capture compare match rising edge interrupt enable for channel CC62.
Definition: IfxCcu6.h:189
IfxCcu6_setT12InputSignal
void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:426
IfxCcu6_T12Channel_2
T12 channel CC62.
Definition: IfxCcu6.h:262
IfxCcu6_setOutputPassiveLevel
void IfxCcu6_setOutputPassiveLevel(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module.
Definition: IfxCcu6.c:320
IfxCcu6_TrigSel
IfxCcu6_TrigSel
Definition: IfxCcu6_cfg.h:94
IfxCcu6_setT13CaptureCompareState
void IfxCcu6_setT13CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63S...
Definition: IfxCcu6.c:435
IfxCcu6_CaptureCompareState
IfxCcu6_CaptureCompareState
capture/compare state to set / clear the CC6xST-bits
Definition: IfxCcu6.h:101
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxCcu6_TrigOut
IfxCcu6_TrigOut
Definition: IfxCcu6_cfg.h:87
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2091
IfxCcu6_resetModule
void IfxCcu6_resetModule(Ifx_CCU6 *ccu6)
Definition: IfxCcu6.c:264
TRUE
#define TRUE
Definition: Platform_Types.h:90
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxCcu6_setT13PeriodValue
IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match.
Definition: IfxCcu6.h:2109
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:145
IfxCcu6_TimerInputClock
IfxCcu6_TimerInputClock
Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according t...
Definition: IfxCcu6.h:343
IfxCcu6_enableModulationOutput
void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 ...
Definition: IfxCcu6.c:114
IfxCcu6_getCaptureRegisterValue
uint32 IfxCcu6_getCaptureRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel.
Definition: IfxCcu6.c:175
IfxCcu6_setT13Frequency
float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by ...
Definition: IfxCcu6.c:461


iLLD_TC26B: IfxCcu6.h Source File

  • Ccu6
  • Std
IfxCcu6.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6.h
3 * \brief CCU6 basic functionality
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Ccu6_Std_Enum Enumerations
43 * \ingroup IfxLld_Ccu6_Std
44 * \defgroup IfxLld_Ccu6_Std_Operative Operative Functions
45 * \ingroup IfxLld_Ccu6_Std
46 * \defgroup IfxLld_Ccu6_Std_Utility Utility Functions
47 * \ingroup IfxLld_Ccu6_Std
48 * \defgroup IfxLld_Ccu6_Std_Configuration Configuration Functions
49 * \ingroup IfxLld_Ccu6_Std
50 * \defgroup IfxLld_Ccu6_Std_IO IO Pin Configuration Functions
51 * \ingroup IfxLld_Ccu6_Std
52 */
53
54 #ifndef IFXCCU6_H
55 #define IFXCCU6_H 1
56
57 /******************************************************************************/
58 /*----------------------------------Includes----------------------------------*/
59 /******************************************************************************/
60
61 #include "_Impl/IfxCcu6_cfg.h"
62 #include "Src/Std/IfxSrc.h"
63 #include "Cpu/Std/IfxCpu_Intrinsics.h"
64 #include "Scu/Std/IfxScuWdt.h"
65 #include "Scu/Std/IfxScuCcu.h"
66 #include "_Utilities/Ifx_Assert.h"
67 #include "_PinMap/IfxCcu6_PinMap.h"
68
69 /******************************************************************************/
70 /*--------------------------------Enumerations--------------------------------*/
71 /******************************************************************************/
72
73 /** \addtogroup IfxLld_Ccu6_Std_Enum
74 * \{ */
75 /** \brief Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )\n
76 * Definition in Ifx_CCU.PISEL0
77 */
78 typedef enum
79 {
80 IfxCcu6_CaptureCompareInput_cC60 = IFX_CCU6_PISEL0_ISCC60_OFF, /**< \brief CC60 capture input */
81 IfxCcu6_CaptureCompareInput_cC61 = IFX_CCU6_PISEL0_ISCC61_OFF, /**< \brief CC61 capture input */
82 IfxCcu6_CaptureCompareInput_cC62 = IFX_CCU6_PISEL0_ISCC62_OFF, /**< \brief CC62 capture input */
83 IfxCcu6_CaptureCompareInput_cTRAP = IFX_CCU6_PISEL0_ISTRP_OFF, /**< \brief CTRAP input */
84 IfxCcu6_CaptureCompareInput_cCPOS0 = IFX_CCU6_PISEL0_ISPOS0_OFF, /**< \brief CCPOS0 input */
85 IfxCcu6_CaptureCompareInput_cCPOS1 = IFX_CCU6_PISEL0_ISPOS1_OFF, /**< \brief CCPOS1 input */
86 IfxCcu6_CaptureCompareInput_cCPOS2 = IFX_CCU6_PISEL0_ISPOS2_OFF /**< \brief CCPOS2 input */
87 } IfxCcu6_CaptureCompareInput;
88
89 /** \brief Selection of actual input signal for the capture compare inputs
90 */
91 typedef enum
92 {
93 IfxCcu6_CaptureCompareInputSignal_a = 0, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
94 IfxCcu6_CaptureCompareInputSignal_b = 1, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
95 IfxCcu6_CaptureCompareInputSignal_c = 2, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
96 IfxCcu6_CaptureCompareInputSignal_d = 3 /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
97 } IfxCcu6_CaptureCompareInputSignal;
98
99 /** \brief capture/compare state to set / clear the CC6xST-bits
100 */
101 typedef enum
102 {
103 IfxCcu6_CaptureCompareState_set = 0, /**< \brief Bit CC6xST is set */
104 IfxCcu6_CaptureCompareState_clear = 1, /**< \brief Bit CC6xST is cleared */
105 IfxCcu6_CaptureCompareState_toggle = 2 /**< \brief Bit CC6xST is toggled */
106 } IfxCcu6_CaptureCompareState;
107
108 /** \brief Capture compare output pins
109 */
110 typedef enum
111 {
112 IfxCcu6_ChannelOut_cc0 = 0, /**< \brief CC60 compare output CC0 */
113 IfxCcu6_ChannelOut_cout0 = 1, /**< \brief CC60 compare output COUT0 */
114 IfxCcu6_ChannelOut_cc1 = 2, /**< \brief CC61 compare output CC1 */
115 IfxCcu6_ChannelOut_cout1 = 3, /**< \brief CC61 compare output COUT1 */
116 IfxCcu6_ChannelOut_cc2 = 4, /**< \brief CC62 compare output CC2 */
117 IfxCcu6_ChannelOut_cout2 = 5, /**< \brief CC62 compare output COUT2 */
118 IfxCcu6_ChannelOut_cout3 = 6 /**< \brief CC63 compare output COUT3 */
119 } IfxCcu6_ChannelOut;
120
121 /** \brief Defines the input event leading to a counting action of the timer (T12 / T13)\n
122 * Definition in Ifx_CCU.PISEL2.B.ISCNT12 / Ifx_CCU.PISEL2.B.ISCNT13
123 */
124 typedef enum
125 {
126 IfxCcu6_CountingInputMode_internal = 0, /**< \brief The T1x prescaler generates the counting events,
127 * Bit TCTR4.T1xCNT is not taken into account. */
128 IfxCcu6_CountingInputMode_manual = 1, /**< \brief Bit TCTR4.T1xCNT written with 1 is a counting
129 * event. The T1x prescaler is not taken into account */
130 IfxCcu6_CountingInputMode_externalRising = 2, /**< \brief The timer T1x is counting each rising edge
131 * detected in the selected T1xHR signal */
132 IfxCcu6_CountingInputMode_externalFalling = 3 /**< \brief The timer T1x is counting each falling edge
133 * detected in the selected T1xHR signal */
134 } IfxCcu6_CountingInputMode;
135
136 /** \brief Controls whether the source signal for the sampling of the Hall input pattern (selected by HSYNC) is delayed by the Dead-Time Counter 0\n
137 * Definition in Ifx_CCU.T12MSEL.B.DBYP
138 */
139 typedef enum
140 {
141 IfxCcu6_DelayBypass_notActive = 0, /**< \brief Dead-Time Counter 0 is generating a delay after
142 * the source signal becomes active */
143 IfxCcu6_DelayBypass_active = 1 /**< \brief Dead-Time Counter 0 is not used for a delay */
144 } IfxCcu6_DelayBypass;
145
146 /** \brief Defines the event of signal T1xHR that can set the run bit T1xR by HW\n
147 * Definition in Ifx_CCU.TCTR2.B.T12RSEL / IIfx_CCU.TCTR2.B.T13RSEL
148 */
149 typedef enum
150 {
151 IfxCcu6_ExternalTriggerMode_disable = 0, /**< \brief The external setting of T1xR is disabled */
152 IfxCcu6_ExternalTriggerMode_risingEdge = 1, /**< \brief Bit T1xR is set if a rising edge of signal T1xHR is
153 * detected. */
154 IfxCcu6_ExternalTriggerMode_fallingEdge = 2, /**< \brief Bit T1xR is set if a falling edge of signal T1xHR is
155 * detected. */
156 IfxCcu6_ExternalTriggerMode_anyEdge = 3 /**< \brief Bit T1xR is set if an edge of signal T1xHR is
157 * detected */
158 } IfxCcu6_ExternalTriggerMode;
159
160 /** \brief Defines the source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields\n
161 * Definition in Ifx_CCU.T12MSEL.HSYNC
162 */
163 typedef enum
164 {
165 IfxCcu6_HallSensorTriggerMode_permanentCheck = 0, /**< \brief Any edge at any of the inputs CCPOSx, independent from any PWM
166 * signal */
167 IfxCcu6_HallSensorTriggerMode_cM63 = 1, /**< \brief A T13 Compare-Match */
168 IfxCcu6_HallSensorTriggerMode_t13PM = 2, /**< \brief A T13 Period-Match */
169 IfxCcu6_HallSensorTriggerMode_off = 3, /**< \brief Hall sampling triggered by HW sources is switched off */
170 IfxCcu6_HallSensorTriggerMode_t12PMCountingUp = 4, /**< \brief A T12 Period-Match while counting up (T12_PM and CDIR = 0) */
171 IfxCcu6_HallSensorTriggerMode_t12OMCountingDown = 5, /**< \brief A T12 One-Match while counting down (T12_PM and CDIR = 1) */
172 IfxCcu6_HallSensorTriggerMode_cM61CountingUp = 6, /**< \brief A T12 Compare-Match of compare channel CC61 while counting up (CM_61 and CDIR = 0) */
173 IfxCcu6_HallSensorTriggerMode_cM61CountingDown = 7 /**< \brief A T12 Compare-Match of compare channel CC61 while counting down (CM_61 and CDIR = 1) */
174 } IfxCcu6_HallSensorTriggerMode;
175
176 /** \brief Interrupt source selection
177 * Description in Ifx_CCU.IEN
178 */
179 typedef enum
180 {
181 IfxCcu6_InterruptSource_cc60RisingEdge = IFX_CCU6_IS_ICC60R_OFF, /**< \brief Capture compare match rising edge interrupt
182 * enable for channel CC60 */
183 IfxCcu6_InterruptSource_cc60FallingEdge = IFX_CCU6_IS_ICC60F_OFF, /**< \brief Capture compare match falling edge interrupt
184 * enable for channel CC60 */
185 IfxCcu6_InterruptSource_cc61RisingEdge = IFX_CCU6_IS_ICC61R_OFF, /**< \brief Capture compare match rising edge interrupt
186 * enable for channel CC61 */
187 IfxCcu6_InterruptSource_cc61FallingEdge = IFX_CCU6_IS_ICC61F_OFF, /**< \brief Capture compare match falling edge interrupt
188 * enable for channel CC61 */
189 IfxCcu6_InterruptSource_cc62RisingEdge = IFX_CCU6_IS_ICC62R_OFF, /**< \brief Capture compare match rising edge interrupt
190 * enable for channel CC62 */
191 IfxCcu6_InterruptSource_cc62FallingEdge = IFX_CCU6_IS_ICC62F_OFF, /**< \brief Capture compare match falling edge interrupt
192 * enable for channel CC62 */
193 IfxCcu6_InterruptSource_t12OneMatch = IFX_CCU6_IS_T12OM_OFF, /**< \brief Interrupt enable for T12 one-match */
194 IfxCcu6_InterruptSource_t12PeriodMatch = IFX_CCU6_IS_T12PM_OFF, /**< \brief Interrupt enable for T12 period-match */
195 IfxCcu6_InterruptSource_t13CompareMatch = IFX_CCU6_IS_T13CM_OFF, /**< \brief Interrupt enable for T13 compare-match */
196 IfxCcu6_InterruptSource_t13PeriodMatch = IFX_CCU6_IS_T13PM_OFF, /**< \brief Interrupt enable for T13 period-match */
197 IfxCcu6_InterruptSource_trap = IFX_CCU6_IS_TRPF_OFF, /**< \brief Interrupt enable for trap flag */
198 IfxCcu6_InterruptSource_correctHallEvent = IFX_CCU6_IS_CHE_OFF, /**< \brief Interrupt enable for correct hall event */
199 IfxCcu6_InterruptSource_wrongHallEvent = IFX_CCU6_IS_WHE_OFF /**< \brief Interrupt enable for wrong hall event */
200 } IfxCcu6_InterruptSource;
201
202 /** \brief Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP\n
203 * Definition in Ifx_CCU.MCMCTR.B.SWSEL
204 */
205 typedef enum
206 {
207 IfxCcu6_MultiChannelSwitchingSelect_noEvent = 0, /**< \brief No trigger request will be generated */
208 IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent = 1, /**< \brief Correct Hall pattern detected (CM_CHE) */
209 IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch = 2, /**< \brief T13 period-match detected (while counting up) */
210 IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch = 3, /**< \brief T12 one-match (while counting down) */
211 IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch = 4, /**< \brief T12 channel 1 compare-match detected (phase
212 * delay function) */
213 IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch = 5 /**< \brief T12 period match detected (while counting up) */
214 } IfxCcu6_MultiChannelSwitchingSelect;
215
216 /** \brief Selection of the synchronization mechanism for the shadow transfer event MCM_ST\n
217 * Definition in Ifx_CCU.MCMCTR.B.SWSYN
218 */
219 typedef enum
220 {
221 IfxCcu6_MultiChannelSwitchingSync_direct = 0, /**< \brief Direct, the trigger event immediately leads to the
222 * shadow transfer */
223 IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch = 1, /**< \brief A T13 zero-match triggers the shadow transfer */
224 IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch = 2 /**< \brief A T12 zero-match (while counting up) triggers the
225 * shadow transfer */
226 } IfxCcu6_MultiChannelSwitchingSync;
227
228 /** \brief Selection of service request outputs
229 */
230 typedef enum
231 {
232 IfxCcu6_ServiceRequest_0 = 0, /**< \brief Service request output SR0 */
233 IfxCcu6_ServiceRequest_1, /**< \brief Service request output SR1 */
234 IfxCcu6_ServiceRequest_2, /**< \brief Service request output SR2 */
235 IfxCcu6_ServiceRequest_3 /**< \brief Service request output SR3 */
236 } IfxCcu6_ServiceRequest;
237
238 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
239 * Definition in Ifx_CCU6.CLC.B.EDIS
240 */
241 typedef enum
242 {
243 IfxCcu6_SleepMode_enable = 0, /**< \brief enables sleep mode */
244 IfxCcu6_SleepMode_disable = 1 /**< \brief disables sleep mode */
245 } IfxCcu6_SleepMode;
246
247 /** \brief OCDS Suspend Control (OCDS.SUS)
248 */
249 typedef enum
250 {
251 IfxCcu6_SuspendMode_none = 0, /**< \brief No suspend */
252 IfxCcu6_SuspendMode_hard = 1, /**< \brief Hard Suspend */
253 IfxCcu6_SuspendMode_soft = 2 /**< \brief Soft Suspend */
254 } IfxCcu6_SuspendMode;
255
256 /** \brief Capture compare channel of Timer12
257 */
258 typedef enum
259 {
260 IfxCcu6_T12Channel_0 = 0, /**< \brief T12 channel CC60 */
261 IfxCcu6_T12Channel_1, /**< \brief T12 channel CC61 */
262 IfxCcu6_T12Channel_2 /**< \brief T12 channel CC62 */
263 } IfxCcu6_T12Channel;
264
265 /** \brief The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x.
266 */
267 typedef enum
268 {
269 IfxCcu6_T12ChannelMode_off = 0, /**< \brief Capture/Compare modes switched off */
270 IfxCcu6_T12ChannelMode_compareMode = 1, /**< \brief Compare mode */
271 IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling = 4, /**< \brief CC6xIN rising edge: T12 stored in CC6xR, falling edge: T12 stored in CC6xSR */
272 IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising = 5, /**< \brief CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR */
273 IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling = 6, /**< \brief CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR */
274 IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny = 7, /**< \brief CC6xIN any active edge: CC6nSR stored in CC6xR, any active edge: T12 stored in CC6xSR */
275 IfxCcu6_T12ChannelMode_hallSensor = 8, /**< \brief Hall Sensor Mode, In order to properly enable this mode, all three MSEL6x fields have to be
276 * programmed to Hall Sensor mode */
277 IfxCcu6_T12ChannelMode_hysteresisLikecompare = 9, /**< \brief Hysteresis-like compare mode */
278 IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling = 10, /**< \brief CC6xIN rising edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR */
279 IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising = 11, /**< \brief CC6xIN falling edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR */
280 IfxCcu6_T12ChannelMode_multiInputCaptureBothRising = 12, /**< \brief CC6xIN rising edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR */
281 IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling = 13, /**< \brief CC6xIN falling edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR */
282 IfxCcu6_T12ChannelMode_multiInputCaptureAny = 14 /**< \brief CC6xIN any active edge : T12 stored in CC6xR, CCPOSx any active edge: T12 stored in CC6xSR */
283 } IfxCcu6_T12ChannelMode;
284
285 /** \brief Counting direction of Timer12\n
286 * Definition in Ifx_CCU.TCTR0.B.CDIR
287 */
288 typedef enum
289 {
290 IfxCcu6_T12CountDirection_up = 0, /**< \brief Counting up */
291 IfxCcu6_T12CountDirection_down = 1 /**< \brief Counting down */
292 } IfxCcu6_T12CountDirection;
293
294 /** \brief Operating mode of Timer 12\n
295 * Definition in Ifx_CCU.TCTR0.B.CTM
296 */
297 typedef enum
298 {
299 IfxCcu6_T12CountMode_edgeAligned = 0, /**< \brief T12 always counts up and continues counting
300 * from zero after reaching the period value. */
301 IfxCcu6_T12CountMode_centerAligned = 1 /**< \brief T12 counts down after detecting a period-match
302 * and counts up after detecting a one-match. */
303 } IfxCcu6_T12CountMode;
304
305 /** \brief Delivers additional information to control the automatic set of bit T13R in the case that the trigger action defined by T13 trigger event control (T13TEC) is detected.\n
306 * Definition in Ifx_CCU.TCTR2.B.T13TED
307 */
308 typedef enum
309 {
310 IfxCcu6_T13TriggerDirection_noAction = 0, /**< \brief no action */
311 IfxCcu6_T13TriggerDirection_onT12CountingUp = 1, /**< \brief while T12 is counting up */
312 IfxCcu6_T13TriggerDirection_onT12CountingDown = 2, /**< \brief while T12 is counting down */
313 IfxCcu6_T13TriggerDirection_anyT12 = 3 /**< \brief independent on the count direction of T12 */
314 } IfxCcu6_T13TriggerDirection;
315
316 /** \brief Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare signals)\n
317 * Definition in Ifx_CCU.TCTR2.B.T13TEC
318 */
319 typedef enum
320 {
321 IfxCcu6_T13TriggerEvent_noAction = 0, /**< \brief no action */
322 IfxCcu6_T13TriggerEvent_onCC60RCompare = 1, /**< \brief set T13R on a T12 compare event on channel 0 */
323 IfxCcu6_T13TriggerEvent_onCC61RCompare = 2, /**< \brief set T13R on a T12 compare event on channel 1 */
324 IfxCcu6_T13TriggerEvent_onCC62RCompare = 3, /**< \brief set T13R on a T12 compare event on channel 2 */
325 IfxCcu6_T13TriggerEvent_onAnyT12Compare = 4, /**< \brief set T13R on any T12 compare event (ch. 0, 1, 2) */
326 IfxCcu6_T13TriggerEvent_onT12Period = 5, /**< \brief set T13R upon a period-match of T12 */
327 IfxCcu6_T13TriggerEvent_onT12Zero = 6, /**< \brief set T13R upon a zero-match of T12 (while
328 * counting up) */
329 IfxCcu6_T13TriggerEvent_onCCPOSxEdge = 7 /**< \brief set T13R on any edge of inputs CCPOSx */
330 } IfxCcu6_T13TriggerEvent;
331
332 /** \brief Timer number ( T12 / T13 )
333 */
334 typedef enum
335 {
336 IfxCcu6_TimerId_t12 = 0, /**< \brief Timer 12 */
337 IfxCcu6_TimerId_t13 = 1 /**< \brief Timer 13 */
338 } IfxCcu6_TimerId;
339
340 /** \brief Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according to the equation\n
341 * Definition in Ifx_CCU.TCTR0.B.T12CLK / Ifx_CCU.TCTR0.B.T13CLK
342 */
343 typedef enum
344 {
345 IfxCcu6_TimerInputClock_fcc6 = 0, /**< \brief fcc6 */
346 IfxCcu6_TimerInputClock_fcc6By2 = 1, /**< \brief fcc6 / 2 */
347 IfxCcu6_TimerInputClock_fcc6By4 = 2, /**< \brief fcc6 / 4 */
348 IfxCcu6_TimerInputClock_fcc6By8 = 3, /**< \brief fcc6 / 8 */
349 IfxCcu6_TimerInputClock_fcc6By16 = 4, /**< \brief fcc6 / 16 */
350 IfxCcu6_TimerInputClock_fcc6By32 = 5, /**< \brief fcc6 / 32 */
351 IfxCcu6_TimerInputClock_fcc6By64 = 6, /**< \brief fcc6 / 64 */
352 IfxCcu6_TimerInputClock_fcc6By128 = 7 /**< \brief fcc6 / 128 */
353 } IfxCcu6_TimerInputClock;
354
355 /** \brief Selection of actual input signal for the timer inputs
356 */
357 typedef enum
358 {
359 IfxCcu6_TimerInputSignal_a = 0, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
360 IfxCcu6_TimerInputSignal_b = 1, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
361 IfxCcu6_TimerInputSignal_c = 2, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
362 IfxCcu6_TimerInputSignal_d = 3, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
363 IfxCcu6_TimerInputSignal_e = 0, /**< \brief defines the input signal used as T1xHR input. */
364 IfxCcu6_TimerInputSignal_f = 1, /**< \brief defines the input signal used as T1xHR input. */
365 IfxCcu6_TimerInputSignal_g = 2, /**< \brief defines the input signal used as T1xHR input. */
366 IfxCcu6_TimerInputSignal_h = 3 /**< \brief defines the input signal used as T1xHR input. */
367 } IfxCcu6_TimerInputSignal;
368
369 /** \brief Timer (T12 / T13) run status\n
370 * Definition in Ifx_CCU.TCTR0.B.T12R and Ifx_CCU.TCTR0.B.T13R
371 */
372 typedef enum
373 {
374 IfxCcu6_TimerRunStatus_stopped = 0, /**< \brief Timer T1x is stopped. */
375 IfxCcu6_TimerRunStatus_running = 1 /**< \brief Timer T1x is running. */
376 } IfxCcu6_TimerRunStatus;
377
378 /** \brief Defines how the trap flag TRPF can be cleared after the trap input condition is no longer valid (either by CTRAP = 1 or by TRPPEN = 0)\n
379 * Definition in Ifx_CCU.TRPCTR.B.TRPM2
380 */
381 typedef enum
382 {
383 IfxCcu6_TrapMode_automatic = 0, /**< \brief Bit TRPF is cleared by HW */
384 IfxCcu6_TrapMode_manual = 1 /**< \brief Bit TRPF stays 0, It has to be cleared by SW by writing
385 * ISR.RTRPF = 1 */
386 } IfxCcu6_TrapMode;
387
388 /** \brief Defines the behavior of the selected outputs when leaving the trap state, after the trap condition has become inactive again\n
389 * Definition in Ifx_CCU.TRPCTR.B.TRPMx (x = 0, 1)
390 */
391 typedef enum
392 {
393 IfxCcu6_TrapState_t12Sync = 0, /**< \brief The trap state is left when a zero-match
394 * of T12 (while counting up) is detected */
395 IfxCcu6_TrapState_t13Sync = 1, /**< \brief The trap state is left when a zeromatch
396 * of T13 is detected */
397 IfxCcu6_TrapState_immediate = 3 /**< \brief The trap state is left immediately without any synchronization to T12 or T13 */
398 } IfxCcu6_TrapState;
399
400 /** \} */
401
402 /** \addtogroup IfxLld_Ccu6_Std_Operative
403 * \{ */
404
405 /******************************************************************************/
406 /*-------------------------Inline Function Prototypes-------------------------*/
407 /******************************************************************************/
408
409 /** \brief Clears the counters of the Timers (T12, T13 individually or together based on the selection)
410 * \param ccu6 Pointer to the base of CCU6 registers
411 * \param t12 Timer12 choice (enable / disable)
412 * \param t13 Timer13 choice (enable / disable)
413 * \return None
414 */
415 IFX_INLINE void IfxCcu6_clearCounter(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
416
417 /** \brief Clears all the three dead-time counter channels to zero.
418 * \param ccu6 Pointer to the base of CCU6 registers
419 * \return None
420 */
421 IFX_INLINE void IfxCcu6_clearDeadTimeCounters(Ifx_CCU6 *ccu6);
422
423 /** \brief Clears the selected interrupt flag
424 * \param ccu6 Pointer to the base of CCU6 registers
425 * \param source Interrupt source selection
426 * \return None
427 */
428 IFX_INLINE void IfxCcu6_clearInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source);
429
430 /** \brief Clears the T12 One notification
431 * \param ccu6 Pointer to the base of CCU6 registers
432 * \return None
433 */
434 IFX_INLINE void IfxCcu6_clearT12OneNotification(Ifx_CCU6 *ccu6);
435
436 /** \brief Clears the T12 period notification
437 * \param ccu6 Pointer to the base of CCU6 registers
438 * \return None
439 */
440 IFX_INLINE void IfxCcu6_clearT12PeriodNotification(Ifx_CCU6 *ccu6);
441
442 /** \brief Clears the T13 compare notification
443 * \param ccu6 Pointer to the base of CCU6 registers
444 * \return None
445 */
446 IFX_INLINE void IfxCcu6_clearT13CompareNotification(Ifx_CCU6 *ccu6);
447
448 /** \brief Returns the Timer pointer
449 * \param ccu6 Pointer to the base of CCU6 registers
450 * \return Timer pointer
451 */
452 IFX_INLINE volatile uint32 *IfxCcu6_getT12TimerPointer(Ifx_CCU6 *ccu6);
453
454 /** \brief Returns the status of module enabled or disabled
455 * \param ccu6 Pointer to the base of CCU6 registers
456 * \return Status (TRUE / FALSE)
457 */
458 IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6);
459
460 /** \brief Returns the status of T12 one notification
461 * \param ccu6 Pointer to the base of CCU6 registers
462 * \return Status (TRUE / FALSE)
463 */
464 IFX_INLINE boolean IfxCcu6_isT12OneNotification(Ifx_CCU6 *ccu6);
465
466 /** \brief Returns the status of T12 period notification
467 * \param ccu6 Pointer to the base of CCU6 registers
468 * \return Status (TRUE / FALSE)
469 */
470 IFX_INLINE boolean IfxCcu6_isT12PeriodNotification(Ifx_CCU6 *ccu6);
471
472 /** \brief Returns the status of T13 compare notification
473 * \param ccu6 Pointer to the base of CCU6 registers
474 * \return Status (TRUE / FALSE)
475 */
476 IFX_INLINE boolean IfxCcu6_isT13CompareNotification(Ifx_CCU6 *ccu6);
477
478 /** \brief Sets the input event leading to a counting action of Timers (T12 / T13).
479 * \param ccu6 Pointer to the base of CCU6 registers
480 * \param timer Timer selection, ( Timer12 / Timer13 )
481 * \param mode Input event leading to a counting action of the timer (T12 / T13)
482 * \return None
483 */
484 IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode);
485
486 /** \brief Sets the current hall pattern for the multichannel mode (writes into shadow register)
487 * \param ccu6 Pointer to the base of CCU6 registers
488 * \param pattern Current hall pattern
489 * \return None
490 */
491 IFX_INLINE void IfxCcu6_setCurrentHallPattern(Ifx_CCU6 *ccu6, uint8 pattern);
492
493 /** \brief Sets the delay between switching from the passive state to the active state of the selected outputs (dead time)
494 * \param ccu6 Pointer to the base of CCU6 registers
495 * \param value Value of the dead time to be induced
496 * \return None
497 */
498 IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value);
499
500 /** \brief Sets the expected hall pattern for the multichannel mode (writes into shadow register)
501 * \param ccu6 Pointer to the base of CCU6 registers
502 * \param pattern Expected hall pattern
503 * \return None
504 */
505 IFX_INLINE void IfxCcu6_setExpectedHallPattern(Ifx_CCU6 *ccu6, uint8 pattern);
506
507 /** \brief Sets the event of signal T1xHR that can set the run bit T1xR by HW
508 * \param ccu6 Pointer to the base of CCU6 registers
509 * \param timer Timer selection, ( Timer12 / Timer13 )
510 * \param mode External trigger mode
511 * \return None
512 */
513 IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode);
514
515 /** \brief Sets source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields
516 * \param ccu6 Pointer to the base of CCU6 registers
517 * \param mode Hall sensor input trigger event
518 * \return None
519 */
520 IFX_INLINE void IfxCcu6_setHallSensorTriggerMode(Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode);
521
522 /** \brief Sets the input clock for timers (T12 or T13)
523 * \param ccu6 Pointer to the base of CCU6 registers
524 * \param timer Timer selection, ( Timer12 / Timer13 )
525 * \param frequency Input clock for timers (T12 or T13)
526 * \return None
527 */
528 IFX_INLINE void IfxCcu6_setInputClockFrequency(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency);
529
530 /** \brief Sets the selected interrupt flag
531 * \param ccu6 Pointer to the base of CCU6 registers
532 * \param source Interrupt source selection
533 * \return None
534 */
535 IFX_INLINE void IfxCcu6_setInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source);
536
537 /** \brief Sets the output pattern for the multichannel mode (writes into shadow register)
538 * \param ccu6 Pointer to the base of CCU6 registers
539 * \param pattern Output pattern for the multichannel mode.
540 * \return None
541 */
542 IFX_INLINE void IfxCcu6_setMultiChannelPwmPattern(Ifx_CCU6 *ccu6, uint8 pattern);
543
544 /** \brief Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP
545 * \param ccu6 Pointer to the base of CCU6 registers
546 * \param mode Trigger request source (next multi-channel event) for the shadow transfer MCM_ST
547 * \return None
548 */
549 IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode);
550
551 /** \brief Sets the synchronization mechanism of the shadow transfer event MCM_ST\n
552 * if it has been requested before (flag R set by an event selected by SWSEL) and if MCMEN = 1
553 * \param ccu6 Pointer to the base of CCU6 registers
554 * \param sync Synchronization mechanism of the shadow transfer event MCM_ST
555 * \return None
556 */
557 IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync);
558
559 /** \brief Sets the state of the corresponding compare channel, that is considered to be the passive state
560 * \param ccu6 Pointer to the base of CCU6 registers
561 * \param channelOut Capture compare output selection
562 * \param state FALSE: passive state when CC6xST == 0\n
563 * TRUE : passive state when CC6xST == 1
564 * \return None
565 */
566 IFX_INLINE void IfxCcu6_setOutputPassiveState(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state);
567
568 /** \brief Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the selection)
569 * \param ccu6 Pointer to the base of CCU6 registers
570 * \param t12 Timer12 choice (enable / disable)
571 * \param t13 Timer13 choice (enable / disable)
572 * \return None
573 */
574 IFX_INLINE void IfxCcu6_setSingleShotModeEnable(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
575
576 /** \brief Sets the operating mode of the Timer12 capture/compare channels
577 * \param ccu6 Pointer to the base of CCU6 registers
578 * \param channel Timer12 Capture compare channel number
579 * \param mode The operating mode for the T12 channels
580 * \return None
581 */
582 IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode);
583
584 /**
585 * \param ccu6 Pointer to the base of CCU6 registers
586 * \param mode Operating mode of Timer 12
587 * \return None
588 */
589 IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode);
590
591 /** \brief Sets the 16-bit counter value of Timer12
592 * \param ccu6 Pointer to the base of CCU6 registers
593 * \param value Counter value
594 * \return None
595 */
596 IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value);
597
598 /** \brief Sets the period value that leads Timer12 counter value to a period-match
599 * \param ccu6 Pointer to the base of CCU6 registers
600 * \param value Period value
601 * \return None
602 */
603 IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value);
604
605 /** \brief Sets the 16-bit compare value of Timer13 (writes into shadow register)
606 * \param ccu6 Pointer to the base of CCU6 registers
607 * \param value Compare value
608 * \return None
609 */
610 IFX_INLINE void IfxCcu6_setT13CompareValue(Ifx_CCU6 *ccu6, uint16 value);
611
612 /** \brief Sets the 16-bit counter value of Timer13
613 * \param ccu6 Pointer to the base of CCU6 registers
614 * \param value counter value
615 * \return None
616 */
617 IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value);
618
619 /** \brief Sets the period value that leads Timer13 counter value to a period-match
620 * \param ccu6 Pointer to the base of CCU6 registers
621 * \param value period value
622 * \return None
623 */
624 IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value);
625
626 /** \brief Sets the Timer13 trigger event direction
627 * \param ccu6 Pointer to the base of CCU6 registers
628 * \param direction T13 trigger event direction
629 * \return None
630 */
631 IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction);
632
633 /** \brief Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare signals)
634 * \param ccu6 Pointer to the base of CCU6 registers
635 * \param mode The trigger event to start T13
636 * \return None
637 */
638 IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode);
639
640 /** \brief Sets the mode of clearing the trap flag TRPF after the trap input condition is no longer valid
641 * \param ccu6 Pointer to the base of CCU6 registers
642 * \param mode Trap mode selection
643 * \return None
644 */
645 IFX_INLINE void IfxCcu6_setTrapMode(Ifx_CCU6 *ccu6, IfxCcu6_TrapMode mode);
646
647 /** \brief Sets behaviour of the selected outputs when leaving the trap state after the trap condition has become inactive again.
648 * \param ccu6 Pointer to the base of CCU6 registers
649 * \param state Trap state selection
650 * \return None
651 */
652 IFX_INLINE void IfxCcu6_setTrapState(Ifx_CCU6 *ccu6, IfxCcu6_TrapState state);
653
654 /** \brief starts the timers (T12, T13 individually or together based on the selection)
655 * \param ccu6 Pointer to the base of CCU6 registers
656 * \param t12 Timer12 start choice (enable / disable)
657 * \param t13 Timer13 start choice (enable / disable)
658 * \return None
659 */
660 IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
661
662 /** \brief starts the timers (T12, T13 individually or together based on the selection)
663 * \param ccu6 Pointer to the base of CCU6 registers
664 * \param t12 Timer12 stop choice (enable / disable)
665 * \param t13 Timer13 stop choice (enable / disable)
666 * \return None
667 */
668 IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
669
670 /** \brief Updates the hall pattern (current hall, expected hall, moduleation output), in a single write
671 * \param ccu6 Pointer to the base of CCU6 registers
672 * \param currentHall Current hall pattern
673 * \param expectedHall Expected hall pattern
674 * \param output Output pattern for the multichannel mode.
675 * \return None
676 */
677 IFX_INLINE void IfxCcu6_updateHallPattern(Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output);
678
679 /******************************************************************************/
680 /*-------------------------Global Function Prototypes-------------------------*/
681 /******************************************************************************/
682
683 /**
684 * \param ccu6 Specifies Ccu6 module
685 * \param outputLine Output Line
686 * \param selectedTrigger Trigger selection
687 * \return None
688 */
689 IFX_EXTERN void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger);
690
691 /** \brief Routes the interrupt node pointer to the selected service requests
692 * \param ccu6 Pointer to the base of CCU6 registers
693 * \param source Interrupt source selection
694 * \param serviceRequest Selection of service request outputs
695 * \return None
696 */
697 IFX_EXTERN void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest);
698
699 /** \brief Sets the passive state level of the PWM outputs of the module
700 * \param ccu6 Pointer to the base of CCU6 registers
701 * \param channelOut Capture compare output selection
702 * \param state FALSE: The passive level is 0.
703 * TRUE : The passive level is 1.
704 * \return None
705 */
706 IFX_EXTERN void IfxCcu6_setOutputPassiveLevel(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state);
707
708 /** \brief Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xST (x=0,1,2)
709 * \param ccu6 Pointer to the base of CCU6 registers
710 * \param channel Timer12 Capture compare channel number
711 * \param state capture/compare state selection (set / clear / toggle)
712 * \return None
713 */
714 IFX_EXTERN void IfxCcu6_setT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state);
715
716 /** \brief Sets the 16-bit compare value of Timer12 (writes into shadow registers)
717 * \param ccu6 Pointer to the base of CCU6 registers
718 * \param channel Timer12 Capture compare channel number
719 * \param value Compare value
720 * \return None
721 */
722 IFX_EXTERN void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value);
723
724 /** \brief Sets the frequency and clock input of the Timer 12.
725 * Caution: If desired frequency cannot achieved (by successive divisions by 2) :
726 * Then the nearest frequency value is set ( >= desired value)
727 * The resulting frequency is captured in the handler element : CaptureFrequency.
728 * \param ccu6 Pointer to the base of CCU6 registers
729 * \param frequency Requested timer frequency in Hz
730 * \param period period value to be configured
731 * \param countMode Counting mode of Timer12
732 * \return Zero, if the function failed to fulfill requested frequency and resolution\n
733 * Positive, if the function can find settings close to the requested frequency and resolution above the requested
734 */
735 IFX_EXTERN float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode);
736
737 /** \brief selects the actual input signal for the timer inputs.
738 * \param ccu6 Pointer to the base of CCU6 registers
739 * \param extInput External input signal for the Timer 12
740 * \return None
741 */
742 IFX_EXTERN void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput);
743
744 /** \brief Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63ST
745 * \param ccu6 Pointer to the base of CCU6 registers
746 * \param state capture/compare state selection (set / clear / toggle)
747 * \return None
748 */
749 IFX_EXTERN void IfxCcu6_setT13CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state);
750
751 /** \brief Sets the frequency and clock input of the Timer 13
752 * Caution: If desired frequency cannot achieved (by successive divisions by 2) :
753 * Then the nearest frequency value is set ( >= desired value)
754 * The resulting frequency is captured in the handler element : captureFrequency.
755 * \param ccu6 Pointer to the base of CCU6 registers
756 * \param frequency Requested timer frequency in Hz
757 * \param period period value to be configured
758 * \return Zero, if the function failed to fulfill requested frequency and resolution\n
759 * Positive, if the function can find settings close to the requested frequency and resolution above the requested
760 */
761 IFX_EXTERN float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period);
762
763 /** \brief selects the actual input signal for the timer inputs.
764 * \param ccu6 Pointer to the base of CCU6 registers
765 * \param extInput External input signal for the Timer 13
766 * \return None
767 */
768 IFX_EXTERN void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput);
769
770 /** \} */
771
772 /** \addtogroup IfxLld_Ccu6_Std_Utility
773 * \{ */
774
775 /******************************************************************************/
776 /*-------------------------Inline Function Prototypes-------------------------*/
777 /******************************************************************************/
778
779 /** \brief Indicate the status of the dead time generation for each compare channel (0, 1, 2) of timer T12
780 * \param ccu6 Pointer to the base of CCU6 registers
781 * \param channel Timer12 Capture compare channel number
782 * \return Status TRUE or FALSE
783 */
784 IFX_INLINE boolean IfxCcu6_getDeadTimeStatus(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
785
786 /** \brief Returns the value of the input Hall pattern of the Timer12 capture/compare channels CC6POS6x (x = 0, 1, 2)\n
787 * that has been compared to the current and expected value
788 * \param ccu6 Pointer to the base of CCU6 registers
789 * \param channel Timer12 Capture compare channel number
790 * \return Status\n
791 * TRUE : The input CCPOSx has been sampled as 0\n
792 * FALSE : The input CCPOSx has been sampled as 1
793 */
794 IFX_INLINE boolean IfxCcu6_getHallPatternSampleState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
795
796 /** \brief Gets the status of the selected interrupt flag
797 * \param ccu6 Pointer to the base of CCU6 registers
798 * \param source Interrupt source selection
799 * \return Status (TRUE / FALSE)
800 */
801 IFX_INLINE boolean IfxCcu6_getInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source);
802
803 /** \brief indicates if the multi-channel mode functionality is available
804 * \param ccu6 Pointer to the base of CCU6 registers
805 * \return Status (TRUE / FALSE)
806 */
807 IFX_INLINE boolean IfxCcu6_getMultiChannelModeAvailabilityStatus(Ifx_CCU6 *ccu6);
808
809 /** \brief Gets the status of the shadow transfer request from MCMPS to MCMP
810 * \param ccu6 Pointer to the base of CCU6 registers
811 * \return Status\n
812 * FALSE: A shadow transfer MCM_ST is not requested\n
813 * TRUE: A shadow transfer MCM_ST is requested, but has not yet been executed
814 */
815 IFX_INLINE boolean IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus(Ifx_CCU6 *ccu6);
816
817 /** \brief Returns the Timer (T12 / T13) shadow transfer enable status
818 * \param ccu6 Pointer to the base of CCU6 registers
819 * \param timer Timer selection, ( Timer12 / Timer13 )
820 * \return Status (TRUE: enable / FALSE: disable)
821 */
822 IFX_INLINE boolean IfxCcu6_getShadowTransferStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
823
824 /** \brief Returns the state of the Timer12 capture/compare channels CC6xST (x = 0, 1, 2)
825 * \param ccu6 Pointer to the base of CCU6 registers
826 * \param channel Timer12 Capture compare channel number
827 * \return Status TRUE or FALSE
828 */
829 IFX_INLINE boolean IfxCcu6_getT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
830
831 /** \brief Returns the current counting direction of Timer12
832 * \param ccu6 Pointer to the base of CCU6 registers
833 * \return direction (up / down)
834 */
835 IFX_INLINE IfxCcu6_T12CountDirection IfxCcu6_getT12CountDirection(Ifx_CCU6 *ccu6);
836
837 /** \brief Returns the state of the Timer13 capture/compare channel CC63ST
838 * \param ccu6 Pointer to the base of CCU6 registers
839 * \return Status TRUE or FALSE
840 */
841 IFX_INLINE boolean IfxCcu6_getT13CaptureCompareState(Ifx_CCU6 *ccu6);
842
843 /** \brief indicates the Timer blocks (T12 / T13) availability
844 * \param ccu6 Pointer to the base of CCU6 registers
845 * \param timer Timer selection, ( Timer12 / Timer13 )
846 * \return Status (TRUE / FALSE)
847 */
848 IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
849
850 /** \brief Returns the Timer (T12 / T13) run status
851 * \param ccu6 Pointer to the base of CCU6 registers
852 * \param timer Timer selection, ( Timer12 / Timer13 )
853 * \return Status (stopped / running)
854 */
855 IFX_INLINE IfxCcu6_TimerRunStatus IfxCcu6_getTimerRunStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
856
857 /** \brief Returns the module's suspend state.
858 * TRUE :if module is suspended.
859 * FALSE:if module is not yet suspended.
860 * \param ccu6 Pointer to CCU6 module registers
861 * \return Suspend status (TRUE / FALSE)
862 */
863 IFX_INLINE boolean IfxCcu6_isModuleSuspended(Ifx_CCU6 *ccu6);
864
865 /** \brief Configure the Module to Hard/Soft suspend mode.
866 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
867 * \param ccu6 Pointer to CCU6 module registers
868 * \param mode Module suspend mode
869 * \return None
870 */
871 IFX_INLINE void IfxCcu6_setSuspendMode(Ifx_CCU6 *ccu6, IfxCcu6_SuspendMode mode);
872
873 /******************************************************************************/
874 /*-------------------------Global Function Prototypes-------------------------*/
875 /******************************************************************************/
876
877 /** \brief Returns the module index of the selected CCU6 module
878 * \param ccu6 Pointer to CCU6 module registers
879 * \return CCU6 module register address
880 */
881 IFX_EXTERN Ifx_CCU6 *IfxCcu6_getAddress(IfxCcu6_Index ccu6);
882
883 /** \brief Returns the capture register value of the selected channel
884 * \param ccu6 Pointer to the base of CCU6 registers
885 * \param channel Timer12 Capture compare channel number
886 * \return current value of the capture register of a selected channel
887 */
888 IFX_EXTERN uint32 IfxCcu6_getCaptureRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
889
890 /** \brief Returns the capture shadow register value of the selected channel
891 * \param ccu6 Pointer to the base of CCU6 registers
892 * \param channel Timer12 Capture compare channel number
893 * \return current value of the capture shadow register of a selected channel
894 */
895 IFX_EXTERN uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
896
897 /** \brief Returns CCU6 index
898 * \param ccu6 Specifies the pointer to the base of CCU6 registers
899 * \return Returns index. returns -1 in case of unknown index
900 */
901 IFX_EXTERN IfxCcu6_Index IfxCcu6_getIndex(Ifx_CCU6 *ccu6);
902
903 /** \brief Returns the service request register
904 * \param ccu6 Specifies Ccu6 module
905 * \param serviceRequest Selection of service request outputs
906 * \return The service request register
907 */
908 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest);
909
910 /** \brief Returns the current value of the timer register
911 * \param ccu6 Pointer to the base of CCU6 registers
912 * \param timer Timer selection, ( Timer12 / Timer13 )
913 * \return current value of the timer register
914 */
915 IFX_EXTERN uint32 IfxCcu6_readTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
916
917 /** \} */
918
919 /** \addtogroup IfxLld_Ccu6_Std_Configuration
920 * \{ */
921
922 /******************************************************************************/
923 /*-------------------------Inline Function Prototypes-------------------------*/
924 /******************************************************************************/
925
926 /** \brief Clears all Interrupt flags
927 * \param ccu6 Pointer to the base of CCU6 registers
928 * \return None
929 */
930 IFX_INLINE void IfxCcu6_clearAllInterruptStatusFlags(Ifx_CCU6 *ccu6);
931
932 /** \brief Disables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies
933 * \param ccu6 Pointer to the base of CCU6 registers
934 * \param timer Timer selection, ( Timer12 / Timer13 )
935 * \return None
936 */
937 IFX_INLINE void IfxCcu6_disableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
938
939 /** \brief Disables the dead time generation for each compare channel (0, 1, 2) of Timer12
940 * \param ccu6 Pointer to the base of CCU6 registers
941 * \param channel Timer12 Capture compare channel number
942 * \return None
943 */
944 IFX_INLINE void IfxCcu6_disableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
945
946 /** \brief Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC)
947 * \param ccu6 Pointer to the base of CCU6 registers
948 * \return None
949 */
950 IFX_INLINE void IfxCcu6_disableDelayBypass(Ifx_CCU6 *ccu6);
951
952 /** \brief Disables the selected interrupt
953 * \param ccu6 Pointer to the base of CCU6 registers
954 * \param source Interrupt source selection
955 * \return None
956 */
957 IFX_INLINE void IfxCcu6_disableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source);
958
959 /** \brief Sets multi channel mode unavailable, A write access to MCMOUTS is ignored
960 * \param ccu6 Pointer to the base of CCU6 registers
961 * \return None
962 */
963 IFX_INLINE void IfxCcu6_disableMultiChannelMode(Ifx_CCU6 *ccu6);
964
965 /** \brief Disables shadow transfers of the timers (T12, T13 individually or together based on the selection)
966 * \param ccu6 Pointer to the base of CCU6 registers
967 * \param t12 Timer12 choice (enable / disable)
968 * \param t13 Timer13 choice (enable / disable)
969 * \return None
970 */
971 IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
972
973 /** \brief Disables the single shot-mode of Timers (T12 T13).
974 * \param ccu6 Pointer to the base of CCU6 registers
975 * \param timer Timer selection, ( Timer12 / Timer13 )
976 * \return None
977 */
978 IFX_INLINE void IfxCcu6_disableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
979
980 /** \brief Disables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals\n
981 * T13 output CC63_O is equal to CC63ST
982 * \param ccu6 Pointer to the base of CCU6 registers
983 * \return None
984 */
985 IFX_INLINE void IfxCcu6_disableT13InvertedModulation(Ifx_CCU6 *ccu6);
986
987 /** \brief Sets Timer12 block unavailable, A write access to T12PR is ignored
988 * \param ccu6 Pointer to the base of CCU6 registers
989 * \param timer Timer selection, ( Timer12 / Timer13 )
990 * \return None
991 */
992 IFX_INLINE void IfxCcu6_disableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
993
994 /** \brief Disables the trap functionality for the corresponding output signals
995 * \param ccu6 Pointer to the base of CCU6 registers
996 * \param channelOut Capture compare output selection
997 * \return None
998 */
999 IFX_INLINE void IfxCcu6_disableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut);
1000
1001 /** \brief Disables the input (pin) function for the trap generation
1002 * \param ccu6 Pointer to the base of CCU6 registers
1003 * \return None
1004 */
1005 IFX_INLINE void IfxCcu6_disableTrapPin(Ifx_CCU6 *ccu6);
1006
1007 /** \brief Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies
1008 * \param ccu6 Pointer to the base of CCU6 registers
1009 * \param timer Timer selection, ( Timer12 / Timer13 )
1010 * \return None
1011 */
1012 IFX_INLINE void IfxCcu6_enableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
1013
1014 /** \brief Sets the single shot-mode of Timers (T12, T13).
1015 * \param ccu6 Pointer to the base of CCU6 registers
1016 * \param t12 Timer12 choice (enable / disable)
1017 * \param t13 Timer13 choice (enable / disable)
1018 * \return None
1019 */
1020 IFX_INLINE void IfxCcu6_enableCountEvent(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
1021
1022 /** \brief Enables the dead time generation for each compare channel (0, 1, 2) of Timer12
1023 * \param ccu6 Pointer to the base of CCU6 registers
1024 * \param channel Timer12 Capture compare channel number
1025 * \return None
1026 */
1027 IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
1028
1029 /** \brief Enables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) by the Dead-Time Counter 0
1030 * \param ccu6 Pointer to the base of CCU6 registers
1031 * \return None
1032 */
1033 IFX_INLINE void IfxCcu6_enableDelayBypass(Ifx_CCU6 *ccu6);
1034
1035 /** \brief Sets HP_ST immediately to update bit fields EXPH and CURH by EXPHS and CURHS
1036 * \param ccu6 Pointer to the base of CCU6 registers
1037 * \return None
1038 */
1039 IFX_INLINE void IfxCcu6_enableHallPatternShadowTransfer(Ifx_CCU6 *ccu6);
1040
1041 /** \brief Enables the selected interrupt
1042 * \param ccu6 Pointer to the base of CCU6 registers
1043 * \param source Interrupt source selection
1044 * \return None
1045 */
1046 IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source);
1047
1048 /** \brief Sets multi channel mode available, A write access to MCMOUTS is executed
1049 * \param ccu6 Pointer to the base of CCU6 registers
1050 * \return None
1051 */
1052 IFX_INLINE void IfxCcu6_enableMultiChannelMode(Ifx_CCU6 *ccu6);
1053
1054 /** \brief Enables the Multi Channel Mode Availability
1055 * \param ccu6 Pointer to the base of CCU6 registers
1056 * \return None
1057 */
1058 IFX_INLINE void IfxCcu6_enableMultiChannelModeAvailability(Ifx_CCU6 *ccu6);
1059
1060 /** \brief Sets MCM_ST immediately to update bit field MCMP by the value of MCMPS.
1061 * \param ccu6 Pointer to the base of CCU6 registers
1062 * \return None
1063 */
1064 IFX_INLINE void IfxCcu6_enableMultiChannelPwmPatternShadowTransfer(Ifx_CCU6 *ccu6);
1065
1066 /** \brief Enables the shadow transfer T12_ST if flag MCMOUT.R is set or\n
1067 * becomes set while a T12 one match is detected while counting down
1068 * \param ccu6 Pointer to the base of CCU6 registers
1069 * \return None
1070 */
1071 IFX_INLINE void IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer(Ifx_CCU6 *ccu6);
1072
1073 /** \brief Enables the shadow transfer T12_ST if flag MCMOUT.R is set or\n
1074 * becomes set while a T12 period match is detected while counting up
1075 * \param ccu6 Pointer to the base of CCU6 registers
1076 * \return None
1077 */
1078 IFX_INLINE void IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer(Ifx_CCU6 *ccu6);
1079
1080 /** \brief Enables the shadow transfer T13_ST if flag MCMOUT.R is set or\n
1081 * becomes set while a T13 period match is detected
1082 * \param ccu6 Pointer to the base of CCU6 registers
1083 * \return None
1084 */
1085 IFX_INLINE void IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer(Ifx_CCU6 *ccu6);
1086
1087 /** \brief Enables shadow transfers of the timers (T12, T13 individually or together based on the selection)
1088 * \param ccu6 Pointer to the base of CCU6 registers
1089 * \param t12 Timer12 choice (enable / disable)
1090 * \param t13 Timer13 choice (enable / disable)
1091 * \return None
1092 */
1093 IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
1094
1095 /** \brief Enables the single shot-mode of Timers (T12 T13).
1096 * \param ccu6 Pointer to the base of CCU6 registers
1097 * \param timer Timer selection, ( Timer12 / Timer13 )
1098 * \return None
1099 */
1100 IFX_INLINE void IfxCcu6_enableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
1101
1102 /** \brief Enables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals\n
1103 * T13 output CC63_O is equal to CC63ST.
1104 * \param ccu6 Pointer to the base of CCU6 registers
1105 * \return None
1106 */
1107 IFX_INLINE void IfxCcu6_enableT13InvertedModulation(Ifx_CCU6 *ccu6);
1108
1109 /** \brief Sets Timer12 block available, A write access to T12PR is executed
1110 * \param ccu6 Pointer to the base of CCU6 registers
1111 * \param timer Timer selection, ( Timer12 / Timer13 )
1112 * \return None
1113 */
1114 IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
1115
1116 /** \brief Enables the trap functionality for the corresponding output signals
1117 * \param ccu6 Pointer to the base of CCU6 registers
1118 * \param channelOut Capture compare output selection
1119 * \return None
1120 */
1121 IFX_INLINE void IfxCcu6_enableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut);
1122
1123 /** \brief Enables the input (pin) function for the trap generation
1124 * \param ccu6 Pointer to the base of CCU6 registers
1125 * \return None
1126 */
1127 IFX_INLINE void IfxCcu6_enableTrapPin(Ifx_CCU6 *ccu6);
1128
1129 /** \brief selects the actual input signal for the capture compare inputs.
1130 * \param ccu6 Pointer to the base of CCU6 registers
1131 * \param input Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )
1132 * \param signal selection of actual input signal for the module inputs
1133 * \return None
1134 */
1135 IFX_INLINE void IfxCcu6_setCaptureCompareInputSignal(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareInput input, IfxCcu6_CaptureCompareInputSignal signal);
1136
1137 /******************************************************************************/
1138 /*-------------------------Global Function Prototypes-------------------------*/
1139 /******************************************************************************/
1140
1141 /** \brief Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13.
1142 * \param ccu6 Pointer to the base of CCU6 registers
1143 * \param timer Timer selection, ( Timer12 / Timer13 )
1144 * \param channelOut Capture compare output selection
1145 * \return None
1146 */
1147 IFX_EXTERN void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut);
1148
1149 /** \brief Disables the selected CCU6 kernel
1150 * \param ccu6 Pointer to the base of CCU6 registers
1151 * \return None
1152 */
1153 IFX_EXTERN void IfxCcu6_disableModule(Ifx_CCU6 *ccu6);
1154
1155 /** \brief Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13.
1156 * \param ccu6 Pointer to the base of CCU6 registers
1157 * \param timer Timer selection, ( Timer12 / Timer13 )
1158 * \param channelOut Capture compare output selection
1159 * \return None
1160 */
1161 IFX_EXTERN void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut);
1162
1163 /** \brief Enables the selected CCU6 kernel
1164 * \param ccu6 Pointer to the base of CCU6 registers
1165 * \return None
1166 */
1167 IFX_EXTERN void IfxCcu6_enableModule(Ifx_CCU6 *ccu6);
1168
1169 /** \} */
1170
1171 /** \addtogroup IfxLld_Ccu6_Std_IO
1172 * \{ */
1173
1174 /******************************************************************************/
1175 /*-------------------------Inline Function Prototypes-------------------------*/
1176 /******************************************************************************/
1177
1178 /** \brief Initialises a CC60 input pin
1179 * \param cc60In CC60 capture input CC60IN
1180 * \param inputMode The pin input mode which should be configured
1181 * \return None
1182 */
1183 IFX_INLINE void IfxCcu6_initCc60InPin(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode);
1184
1185 /** \brief Initialises a CC60 output pin
1186 * \param cc60Out CC60 compare output CC0
1187 * \param outputMode The pin output mode which should be configured
1188 * \param padDriver The pad driver mode which should be configured
1189 * \return None
1190 */
1191 IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1192
1193 /** \brief Initialises a CC61 input pin
1194 * \param cc61In CC61 capture input CC61IN
1195 * \param inputMode The pin input mode which should be configured
1196 * \return None
1197 */
1198 IFX_INLINE void IfxCcu6_initCc61InPin(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode);
1199
1200 /** \brief Initialises a CC61 output pin
1201 * \param cc61Out CC61 compare output CC1
1202 * \param outputMode The pin output mode which should be configured
1203 * \param padDriver The pad driver mode which should be configured
1204 * \return None
1205 */
1206 IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1207
1208 /** \brief Initialises a CC62 input pin
1209 * \param cc62In CC62 capture input CC62IN
1210 * \param inputMode The pin input mode which should be configured
1211 * \return None
1212 */
1213 IFX_INLINE void IfxCcu6_initCc62InPin(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode);
1214
1215 /** \brief Initialises a CC62 output pin
1216 * \param cc62Out CC62 compare output CC2
1217 * \param outputMode The pin output mode which should be configured
1218 * \param padDriver The pad driver mode which should be configured
1219 * \return None
1220 */
1221 IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1222
1223 /** \brief Initialises a CCPOS0 input pin
1224 * \param ccpos0 CC60 capture input CCPOS0
1225 * \param inputMode The pin input mode which should be configured
1226 * \return None
1227 */
1228 IFX_INLINE void IfxCcu6_initCcpos0Pin(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode);
1229
1230 /** \brief Initialises a CCPOS1 input pin
1231 * \param ccpos1 CC61 capture input CCPOS1
1232 * \param inputMode The pin input mode which should be configured
1233 * \return None
1234 */
1235 IFX_INLINE void IfxCcu6_initCcpos1Pin(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode);
1236
1237 /** \brief Initialises a CCPOS0 input pin
1238 * \param ccpos2 CC62 capture input CCPOS2
1239 * \param inputMode The pin input mode which should be configured
1240 * \return None
1241 */
1242 IFX_INLINE void IfxCcu6_initCcpos2Pin(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode);
1243
1244 /** \brief Initialises a COUT60 output pin
1245 * \param cout60 CC60 compare output COUT0
1246 * \param outputMode The pin output mode which should be configured
1247 * \param padDriver The pad driver mode which should be configured
1248 * \return None
1249 */
1250 IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1251
1252 /** \brief Initialises a COUT61 output pin
1253 * \param cout61 CC61 compare output COUT1
1254 * \param outputMode The pin output mode which should be configured
1255 * \param padDriver The pad driver mode which should be configured
1256 * \return None
1257 */
1258 IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1259
1260 /** \brief Initialises a COUT62 output pin
1261 * \param cout62 CC62 compare output COUT2
1262 * \param outputMode The pin output mode which should be configured
1263 * \param padDriver The pad driver mode which should be configured
1264 * \return None
1265 */
1266 IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1267
1268 /** \brief Initialises a COUT63 output pin
1269 * \param cout63 CC63 compare output COUT3
1270 * \param outputMode The pin output mode which should be configured
1271 * \param padDriver The pad driver mode which should be configured
1272 * \return None
1273 */
1274 IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1275
1276 /** \brief Initialises a CTRAP input pin
1277 * \param ctrap CTRAP input
1278 * \param inputMode The pin input mode which should be configured
1279 * \return None
1280 */
1281 IFX_INLINE void IfxCcu6_initCtrapPin(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode);
1282
1283 /** \brief Initialises a T12HR input pin
1284 * \param t12hrIn Timer 12 HR input T12HR
1285 * \param inputMode The pin input mode which should be configured
1286 * \return None
1287 */
1288 IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode);
1289
1290 /** \brief Initialises a T13HR input pin
1291 * \param t13hrIn Timer 12 HR input T12HR
1292 * \param inputMode The pin input mode which should be configured
1293 * \return None
1294 */
1295 IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode);
1296
1297 /** \} */
1298
1299 /******************************************************************************/
1300 /*-------------------------Inline Function Prototypes-------------------------*/
1301 /******************************************************************************/
1302
1303 /** \brief Provides functionality for both setting of CC60 pin direction as input and configuring pad driver
1304 * \param cc60In CC60 capture input CC60IN
1305 * \param inputMode The pin input mode which should be configured
1306 * \param padDriver Pad Driver
1307 * \return None
1308 */
1309 IFX_INLINE void IfxCcu6_initCc60InPinWithPadLevel(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1310
1311 /** \brief Provides functionality for both setting of CC61 pin direction as input and configuring pad driver
1312 * \param cc61In CC61 capture input CC61IN
1313 * \param inputMode The pin input mode which should be configured
1314 * \param padDriver Pad Driver
1315 * \return None
1316 */
1317 IFX_INLINE void IfxCcu6_initCc61InPinWithPadLevel(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1318
1319 /** \brief Provides functionality for both setting of CC62 pin direction as input and configuring pad driver
1320 * \param cc62In CC62 capture input CC62IN
1321 * \param inputMode The pin input mode which should be configured
1322 * \param padDriver Pad Driver
1323 * \return None
1324 */
1325 IFX_INLINE void IfxCcu6_initCc62InPinWithPadLevel(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1326
1327 /** \brief Provides functionality for both setting of CCPOS0 pin direction as input and configuring pad driver
1328 * \param ccpos0 CC60 capture input CCPOS0
1329 * \param inputMode The pin input mode which should be configured
1330 * \param padDriver Pad Driver
1331 * \return None
1332 */
1333 IFX_INLINE void IfxCcu6_initCcpos0PinWithPadLevel(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1334
1335 /** \brief Provides functionality for both setting of CCPOS1 pin direction as input and configuring pad driver
1336 * \param ccpos1 CC61 capture input CCPOS1
1337 * \param inputMode The pin input mode which should be configured
1338 * \param padDriver Pad Driver
1339 * \return None
1340 */
1341 IFX_INLINE void IfxCcu6_initCcpos1PinWithPadLevel(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1342
1343 /** \brief Provides functionality for both setting of CCPOS2 pin direction as input and configuring pad driver
1344 * \param ccpos2 CC62 capture input CCPOS2
1345 * \param inputMode The pin input mode which should be configured
1346 * \param padDriver Pad Driver
1347 * \return None
1348 */
1349 IFX_INLINE void IfxCcu6_initCcpos2PinWithPadLevel(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1350
1351 /** \brief Provides functionality for both setting of CTRAP pin direction as input and configuring pad driver
1352 * \param ctrap CTRAP input
1353 * \param inputMode The pin input mode which should be configured
1354 * \param padDriver Pad Driver
1355 * \return None
1356 */
1357 IFX_INLINE void IfxCcu6_initCtrapPinWithPadLevel(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1358
1359 /** \brief Provides functionality for both setting of T12HR pin direction as input and configuring pad driver
1360 * \param t12hrIn Timer 12 HR input T12HR
1361 * \param inputMode The pin input mode which should be configured
1362 * \param padDriver Pad driver
1363 * \return None
1364 */
1365 IFX_INLINE void IfxCcu6_initT12hrPinWithPadLevel(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1366
1367 /** \brief Provides functionality for both setting of T13HR pin direction as input and configuring pad driver
1368 * \param t13hrIn Timer 13 HR input T13HR
1369 * \param inputMode The pin input mode which should be configured
1370 * \param padDriver Pad Driver
1371 * \return None
1372 */
1373 IFX_INLINE void IfxCcu6_initT13hrPinWithPadLevel(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1374
1375 /** \brief Sets the sensitivity of the module to sleep signal
1376 * \param ccu6 pointer to CCU6 registers
1377 * \param mode mode selection (enable/disable)
1378 * \return None
1379 */
1380 IFX_INLINE void IfxCcu6_setSleepMode(Ifx_CCU6 *ccu6, IfxCcu6_SleepMode mode);
1381
1382 /******************************************************************************/
1383 /*-------------------------Global Function Prototypes-------------------------*/
1384 /******************************************************************************/
1385
1386 /**
1387 * \param ccu6 pointer to ccu6 registers
1388 * \return None
1389 */
1390 IFX_EXTERN void IfxCcu6_resetModule(Ifx_CCU6 *ccu6);
1391
1392 /******************************************************************************/
1393 /*---------------------Inline Function Implementations------------------------*/
1394 /******************************************************************************/
1395
1396 IFX_INLINE void IfxCcu6_clearAllInterruptStatusFlags(Ifx_CCU6 *ccu6)
1397 {
1398 ccu6->ISR.U = 0xFFFF;
1399 }
1400
1401
1402 IFX_INLINE void IfxCcu6_clearCounter(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
1403 {
1404 Ifx_CCU6_TCTR4 tctr4;
1405 tctr4.U = 0;
1406 tctr4.B.T12RES = t12;
1407 tctr4.B.T13RES = t13;
1408 ccu6->TCTR4.U = tctr4.U;
1409 }
1410
1411
1412 IFX_INLINE void IfxCcu6_clearDeadTimeCounters(Ifx_CCU6 *ccu6)
1413 {
1414 ccu6->TCTR4.B.DTRES = TRUE;
1415 }
1416
1417
1418 IFX_INLINE void IfxCcu6_clearInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
1419 {
1420 uint32 mask = (1U << source);
1421 ccu6->ISR.U = mask;
1422 }
1423
1424
1425 IFX_INLINE void IfxCcu6_clearT12OneNotification(Ifx_CCU6 *ccu6)
1426 {
1427 ccu6->ISR.B.RT12OM = 1;
1428 }
1429
1430
1431 IFX_INLINE void IfxCcu6_clearT12PeriodNotification(Ifx_CCU6 *ccu6)
1432 {
1433 ccu6->ISR.B.RT12PM = 1;
1434 }
1435
1436
1437 IFX_INLINE void IfxCcu6_clearT13CompareNotification(Ifx_CCU6 *ccu6)
1438 {
1439 ccu6->ISR.B.RT13CM = 1;
1440 }
1441
1442
1443 IFX_INLINE void IfxCcu6_disableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1444 {
1445 uint32 shift = ((timer * 8) + 3);
1446 uint32 mask = (1U << shift);
1447 ccu6->TCTR0.U = ccu6->TCTR0.U & ~(mask);
1448 }
1449
1450
1451 IFX_INLINE void IfxCcu6_disableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
1452 {
1453 uint32 shift = (8 + channel);
1454 uint32 mask = (1 << shift);
1455 ccu6->T12DTC.U = ccu6->T12DTC.U & ~(mask);
1456 }
1457
1458
1459 IFX_INLINE void IfxCcu6_disableDelayBypass(Ifx_CCU6 *ccu6)
1460 {
1461 ccu6->T12MSEL.B.DBYP = FALSE;
1462 }
1463
1464
1465 IFX_INLINE void IfxCcu6_disableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
1466 {
1467 uint32 mask = (1U << source);
1468 ccu6->IEN.U = ccu6->IEN.U & ~(mask);
1469 }
1470
1471
1472 IFX_INLINE void IfxCcu6_disableMultiChannelMode(Ifx_CCU6 *ccu6)
1473 {
1474 ccu6->MODCTR.B.MCMEN = FALSE;
1475 }
1476
1477
1478 IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
1479 {
1480 Ifx_CCU6_TCTR4 tctr4;
1481 tctr4.U = 0;
1482 tctr4.B.T12STD = t12;
1483 tctr4.B.T13STD = t13;
1484 ccu6->TCTR4.U = tctr4.U;
1485 }
1486
1487
1488 IFX_INLINE void IfxCcu6_disableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1489 {
1490 uint32 mask = (1U << timer);
1491 ccu6->TCTR2.U = ccu6->TCTR2.U & ~(mask);
1492 }
1493
1494
1495 IFX_INLINE void IfxCcu6_disableT13InvertedModulation(Ifx_CCU6 *ccu6)
1496 {
1497 ccu6->CMPSTAT.B.T13IM = FALSE;
1498 }
1499
1500
1501 IFX_INLINE void IfxCcu6_disableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1502 {
1503 uint32 mask = (1U << timer);
1504 ccu6->MCFG.U = ccu6->MCFG.U & ~(mask);
1505 }
1506
1507
1508 IFX_INLINE void IfxCcu6_disableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
1509 {
1510 uint32 shift = (8 + channelOut); // offset at location TRPCTR.8 for output CC60
1511 uint32 mask = (1U << shift);
1512 ccu6->TRPCTR.U = ccu6->TRPCTR.U & ~(mask);
1513 }
1514
1515
1516 IFX_INLINE void IfxCcu6_disableTrapPin(Ifx_CCU6 *ccu6)
1517 {
1518 ccu6->TRPCTR.B.TRPPEN = FALSE;
1519 }
1520
1521
1522 IFX_INLINE void IfxCcu6_enableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1523 {
1524 uint32 shift = ((timer * 8) + 3);
1525 uint32 mask = (1U << shift);
1526 ccu6->TCTR0.U = ccu6->TCTR0.U | (mask);
1527 }
1528
1529
1530 IFX_INLINE void IfxCcu6_enableCountEvent(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
1531 {
1532 Ifx_CCU6_TCTR4 tctr4;
1533 tctr4.U = 0;
1534 tctr4.B.T12CNT = t12;
1535 tctr4.B.T13CNT = t13;
1536 ccu6->TCTR4.U = tctr4.U;
1537 }
1538
1539
1540 IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
1541 {
1542 uint32 shift = (8 + channel);
1543 uint32 mask = (1 << shift);
1544 ccu6->T12DTC.U = ccu6->T12DTC.U | (mask);
1545 }
1546
1547
1548 IFX_INLINE void IfxCcu6_enableDelayBypass(Ifx_CCU6 *ccu6)
1549 {
1550 ccu6->T12MSEL.B.DBYP = TRUE;
1551 }
1552
1553
1554 IFX_INLINE void IfxCcu6_enableHallPatternShadowTransfer(Ifx_CCU6 *ccu6)
1555 {
1556 ccu6->MCMOUTS.B.STRHP = TRUE;
1557 }
1558
1559
1560 IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
1561 {
1562 uint32 mask = (1U << source);
1563 ccu6->IEN.U = ccu6->IEN.U | (mask);
1564 }
1565
1566
1567 IFX_INLINE void IfxCcu6_enableMultiChannelMode(Ifx_CCU6 *ccu6)
1568 {
1569 ccu6->MODCTR.B.MCMEN = TRUE;
1570 }
1571
1572
1573 IFX_INLINE void IfxCcu6_enableMultiChannelModeAvailability(Ifx_CCU6 *ccu6)
1574 {
1575 ccu6->MCFG.B.MCM = 1;
1576 }
1577
1578
1579 IFX_INLINE void IfxCcu6_enableMultiChannelPwmPatternShadowTransfer(Ifx_CCU6 *ccu6)
1580 {
1581 ccu6->MCMOUTS.B.STRMCM = TRUE;
1582 }
1583
1584
1585 IFX_INLINE void IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer(Ifx_CCU6 *ccu6)
1586 {
1587 ccu6->MCMCTR.B.STE12D = TRUE;
1588 }
1589
1590
1591 IFX_INLINE void IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer(Ifx_CCU6 *ccu6)
1592 {
1593 ccu6->MCMCTR.B.STE12U = TRUE;
1594 }
1595
1596
1597 IFX_INLINE void IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer(Ifx_CCU6 *ccu6)
1598 {
1599 ccu6->MCMCTR.B.STE13U = TRUE;
1600 }
1601
1602
1603 IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
1604 {
1605 Ifx_CCU6_TCTR4 tctr4;
1606 tctr4.U = 0;
1607 tctr4.B.T12STR = t12;
1608 tctr4.B.T13STR = t13;
1609 ccu6->TCTR4.U = tctr4.U;
1610 }
1611
1612
1613 IFX_INLINE void IfxCcu6_enableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1614 {
1615 uint32 mask = (1U << timer);
1616 ccu6->TCTR2.U = ccu6->TCTR2.U | (mask);
1617 }
1618
1619
1620 IFX_INLINE void IfxCcu6_enableT13InvertedModulation(Ifx_CCU6 *ccu6)
1621 {
1622 ccu6->CMPSTAT.B.T13IM = TRUE;
1623 }
1624
1625
1626 IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1627 {
1628 uint32 mask = (1U << timer);
1629 ccu6->MCFG.U = ccu6->MCFG.U | (mask);
1630 }
1631
1632
1633 IFX_INLINE void IfxCcu6_enableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
1634 {
1635 uint32 shift = (8 + channelOut); // offset at location TRPCTR.8 for output CC60
1636 uint32 mask = (1U << shift);
1637 ccu6->TRPCTR.U = ccu6->TRPCTR.U | (mask);
1638 }
1639
1640
1641 IFX_INLINE void IfxCcu6_enableTrapPin(Ifx_CCU6 *ccu6)
1642 {
1643 ccu6->TRPCTR.B.TRPPEN = TRUE;
1644 }
1645
1646
1647 IFX_INLINE boolean IfxCcu6_getDeadTimeStatus(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
1648 {
1649 uint32 shift = (12 + channel);
1650 uint32 mask = 1 << shift;
1651 return (ccu6->T12DTC.U & mask) ? TRUE : FALSE;
1652 }
1653
1654
1655 IFX_INLINE boolean IfxCcu6_getHallPatternSampleState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
1656 {
1657 uint32 shift = (channel + 3);
1658 uint32 mask = (1U << shift);
1659 return (ccu6->CMPSTAT.U & mask) ? TRUE : FALSE;
1660 }
1661
1662
1663 IFX_INLINE boolean IfxCcu6_getInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
1664 {
1665 uint32 shift = (1U << source);
1666 return (ccu6->IS.U & shift) ? TRUE : FALSE;
1667 }
1668
1669
1670 IFX_INLINE boolean IfxCcu6_getMultiChannelModeAvailabilityStatus(Ifx_CCU6 *ccu6)
1671 {
1672 return ccu6->MCFG.B.MCM != 0;
1673 }
1674
1675
1676 IFX_INLINE boolean IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus(Ifx_CCU6 *ccu6)
1677 {
1678 return ccu6->MCMOUT.B.R != 0;
1679 }
1680
1681
1682 IFX_INLINE boolean IfxCcu6_getShadowTransferStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1683 {
1684 uint32 shift = ((timer * 8) + 5);
1685 uint32 mask = (1U << shift);
1686 return (ccu6->TCTR0.U & mask) ? TRUE : FALSE;
1687 }
1688
1689
1690 IFX_INLINE boolean IfxCcu6_getT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
1691 {
1692 uint32 mask = (1U << channel);
1693 return (ccu6->CMPSTAT.U & mask) ? TRUE : FALSE;
1694 }
1695
1696
1697 IFX_INLINE IfxCcu6_T12CountDirection IfxCcu6_getT12CountDirection(Ifx_CCU6 *ccu6)
1698 {
1699 return (IfxCcu6_T12CountDirection)((ccu6->TCTR0.B.CDIR) ? TRUE : FALSE);
1700 }
1701
1702
1703 IFX_INLINE volatile uint32 *IfxCcu6_getT12TimerPointer(Ifx_CCU6 *ccu6)
1704 {
1705 return (volatile uint32 *)&ccu6->T12PR;
1706 }
1707
1708
1709 IFX_INLINE boolean IfxCcu6_getT13CaptureCompareState(Ifx_CCU6 *ccu6)
1710 {
1711 return ccu6->CMPSTAT.B.CC63ST != 0;
1712 }
1713
1714
1715 IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1716 {
1717 uint32 mask = (1U << timer);
1718 return (ccu6->MCFG.U & mask) ? TRUE : FALSE;
1719 }
1720
1721
1722 IFX_INLINE IfxCcu6_TimerRunStatus IfxCcu6_getTimerRunStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1723 {
1724 uint32 shift = ((timer * 8) + 4);
1725 uint32 mask = (1U << shift);
1726 return (IfxCcu6_TimerRunStatus)((ccu6->TCTR0.U & mask) ? TRUE : FALSE);
1727 }
1728
1729
1730 IFX_INLINE void IfxCcu6_initCc60InPin(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode)
1731 {
1732 IfxPort_setPinModeInput(cc60In->pin.port, cc60In->pin.pinIndex, inputMode);
1733 IfxCcu6_setCaptureCompareInputSignal(cc60In->module, IfxCcu6_CaptureCompareInput_cC60, (IfxCcu6_CaptureCompareInputSignal)cc60In->select);
1734 }
1735
1736
1737 IFX_INLINE void IfxCcu6_initCc60InPinWithPadLevel(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1738 {
1739 IfxPort_setPinModeInput(cc60In->pin.port, cc60In->pin.pinIndex, inputMode);
1740 IfxPort_setPinPadDriver(cc60In->pin.port, cc60In->pin.pinIndex, padDriver);
1741 IfxCcu6_setCaptureCompareInputSignal(cc60In->module, IfxCcu6_CaptureCompareInput_cC60, (IfxCcu6_CaptureCompareInputSignal)cc60In->select);
1742 }
1743
1744
1745 IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1746 {
1747 IfxPort_setPinModeOutput(cc60Out->pin.port, cc60Out->pin.pinIndex, outputMode, cc60Out->select);
1748 IfxPort_setPinPadDriver(cc60Out->pin.port, cc60Out->pin.pinIndex, padDriver);
1749 }
1750
1751
1752 IFX_INLINE void IfxCcu6_initCc61InPin(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode)
1753 {
1754 IfxPort_setPinModeInput(cc61In->pin.port, cc61In->pin.pinIndex, inputMode);
1755 IfxCcu6_setCaptureCompareInputSignal(cc61In->module, IfxCcu6_CaptureCompareInput_cC61, (IfxCcu6_CaptureCompareInputSignal)cc61In->select);
1756 }
1757
1758
1759 IFX_INLINE void IfxCcu6_initCc61InPinWithPadLevel(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1760 {
1761 IfxPort_setPinModeInput(cc61In->pin.port, cc61In->pin.pinIndex, inputMode);
1762 IfxPort_setPinPadDriver(cc61In->pin.port, cc61In->pin.pinIndex, padDriver);
1763 IfxCcu6_setCaptureCompareInputSignal(cc61In->module, IfxCcu6_CaptureCompareInput_cC61, (IfxCcu6_CaptureCompareInputSignal)cc61In->select);
1764 }
1765
1766
1767 IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1768 {
1769 IfxPort_setPinModeOutput(cc61Out->pin.port, cc61Out->pin.pinIndex, outputMode, cc61Out->select);
1770 IfxPort_setPinPadDriver(cc61Out->pin.port, cc61Out->pin.pinIndex, padDriver);
1771 }
1772
1773
1774 IFX_INLINE void IfxCcu6_initCc62InPin(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode)
1775 {
1776 IfxPort_setPinModeInput(cc62In->pin.port, cc62In->pin.pinIndex, inputMode);
1777 IfxCcu6_setCaptureCompareInputSignal(cc62In->module, IfxCcu6_CaptureCompareInput_cC62, (IfxCcu6_CaptureCompareInputSignal)cc62In->select);
1778 }
1779
1780
1781 IFX_INLINE void IfxCcu6_initCc62InPinWithPadLevel(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1782 {
1783 IfxPort_setPinModeInput(cc62In->pin.port, cc62In->pin.pinIndex, inputMode);
1784 IfxPort_setPinPadDriver(cc62In->pin.port, cc62In->pin.pinIndex, padDriver);
1785 IfxCcu6_setCaptureCompareInputSignal(cc62In->module, IfxCcu6_CaptureCompareInput_cC62, (IfxCcu6_CaptureCompareInputSignal)cc62In->select);
1786 }
1787
1788
1789 IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1790 {
1791 IfxPort_setPinModeOutput(cc62Out->pin.port, cc62Out->pin.pinIndex, outputMode, cc62Out->select);
1792 IfxPort_setPinPadDriver(cc62Out->pin.port, cc62Out->pin.pinIndex, padDriver);
1793 }
1794
1795
1796 IFX_INLINE void IfxCcu6_initCcpos0Pin(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode)
1797 {
1798 IfxPort_setPinModeInput(ccpos0->pin.port, ccpos0->pin.pinIndex, inputMode);
1799 IfxCcu6_setCaptureCompareInputSignal(ccpos0->module, IfxCcu6_CaptureCompareInput_cCPOS0, (IfxCcu6_CaptureCompareInputSignal)ccpos0->select);
1800 }
1801
1802
1803 IFX_INLINE void IfxCcu6_initCcpos0PinWithPadLevel(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1804 {
1805 IfxPort_setPinModeInput(ccpos0->pin.port, ccpos0->pin.pinIndex, inputMode);
1806 IfxPort_setPinPadDriver(ccpos0->pin.port, ccpos0->pin.pinIndex, padDriver);
1807 IfxCcu6_setCaptureCompareInputSignal(ccpos0->module, IfxCcu6_CaptureCompareInput_cCPOS0, (IfxCcu6_CaptureCompareInputSignal)ccpos0->select);
1808 }
1809
1810
1811 IFX_INLINE void IfxCcu6_initCcpos1Pin(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode)
1812 {
1813 IfxPort_setPinModeInput(ccpos1->pin.port, ccpos1->pin.pinIndex, inputMode);
1814 IfxCcu6_setCaptureCompareInputSignal(ccpos1->module, IfxCcu6_CaptureCompareInput_cCPOS1, (IfxCcu6_CaptureCompareInputSignal)ccpos1->select);
1815 }
1816
1817
1818 IFX_INLINE void IfxCcu6_initCcpos1PinWithPadLevel(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1819 {
1820 IfxPort_setPinModeInput(ccpos1->pin.port, ccpos1->pin.pinIndex, inputMode);
1821 IfxPort_setPinPadDriver(ccpos1->pin.port, ccpos1->pin.pinIndex, padDriver);
1822 IfxCcu6_setCaptureCompareInputSignal(ccpos1->module, IfxCcu6_CaptureCompareInput_cCPOS1, (IfxCcu6_CaptureCompareInputSignal)ccpos1->select);
1823 }
1824
1825
1826 IFX_INLINE void IfxCcu6_initCcpos2Pin(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode)
1827 {
1828 IfxPort_setPinModeInput(ccpos2->pin.port, ccpos2->pin.pinIndex, inputMode);
1829 IfxCcu6_setCaptureCompareInputSignal(ccpos2->module, IfxCcu6_CaptureCompareInput_cCPOS2, (IfxCcu6_CaptureCompareInputSignal)ccpos2->select);
1830 }
1831
1832
1833 IFX_INLINE void IfxCcu6_initCcpos2PinWithPadLevel(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1834 {
1835 IfxPort_setPinModeInput(ccpos2->pin.port, ccpos2->pin.pinIndex, inputMode);
1836 IfxPort_setPinPadDriver(ccpos2->pin.port, ccpos2->pin.pinIndex, padDriver);
1837 IfxCcu6_setCaptureCompareInputSignal(ccpos2->module, IfxCcu6_CaptureCompareInput_cCPOS2, (IfxCcu6_CaptureCompareInputSignal)ccpos2->select);
1838 }
1839
1840
1841 IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1842 {
1843 IfxPort_setPinModeOutput(cout60->pin.port, cout60->pin.pinIndex, outputMode, cout60->select);
1844 IfxPort_setPinPadDriver(cout60->pin.port, cout60->pin.pinIndex, padDriver);
1845 }
1846
1847
1848 IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1849 {
1850 IfxPort_setPinModeOutput(cout61->pin.port, cout61->pin.pinIndex, outputMode, cout61->select);
1851 IfxPort_setPinPadDriver(cout61->pin.port, cout61->pin.pinIndex, padDriver);
1852 }
1853
1854
1855 IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1856 {
1857 IfxPort_setPinModeOutput(cout62->pin.port, cout62->pin.pinIndex, outputMode, cout62->select);
1858 IfxPort_setPinPadDriver(cout62->pin.port, cout62->pin.pinIndex, padDriver);
1859 }
1860
1861
1862 IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1863 {
1864 IfxPort_setPinModeOutput(cout63->pin.port, cout63->pin.pinIndex, outputMode, cout63->select);
1865 IfxPort_setPinPadDriver(cout63->pin.port, cout63->pin.pinIndex, padDriver);
1866 }
1867
1868
1869 IFX_INLINE void IfxCcu6_initCtrapPin(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode)
1870 {
1871 IfxPort_setPinModeInput(ctrap->pin.port, ctrap->pin.pinIndex, inputMode);
1872 IfxCcu6_setCaptureCompareInputSignal(ctrap->module, IfxCcu6_CaptureCompareInput_cTRAP, (IfxCcu6_CaptureCompareInputSignal)ctrap->select);
1873 }
1874
1875
1876 IFX_INLINE void IfxCcu6_initCtrapPinWithPadLevel(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1877 {
1878 IfxPort_setPinModeInput(ctrap->pin.port, ctrap->pin.pinIndex, inputMode);
1879 IfxPort_setPinPadDriver(ctrap->pin.port, ctrap->pin.pinIndex, padDriver);
1880 IfxCcu6_setCaptureCompareInputSignal(ctrap->module, IfxCcu6_CaptureCompareInput_cTRAP, (IfxCcu6_CaptureCompareInputSignal)ctrap->select);
1881 }
1882
1883
1884 IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
1885 {
1886 IfxPort_setPinModeInput(t12hrIn->pin.port, t12hrIn->pin.pinIndex, inputMode);
1887 IfxCcu6_setT12InputSignal(t12hrIn->module, t12hrIn);
1888 }
1889
1890
1891 IFX_INLINE void IfxCcu6_initT12hrPinWithPadLevel(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1892 {
1893 IfxPort_setPinModeInput(t12hrIn->pin.port, t12hrIn->pin.pinIndex, inputMode);
1894 IfxPort_setPinPadDriver(t12hrIn->pin.port, t12hrIn->pin.pinIndex, padDriver);
1895 IfxCcu6_setT12InputSignal(t12hrIn->module, t12hrIn);
1896 }
1897
1898
1899 IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
1900 {
1901 IfxPort_setPinModeInput(t13hrIn->pin.port, t13hrIn->pin.pinIndex, inputMode);
1902 IfxCcu6_setT13InputSignal(t13hrIn->module, t13hrIn);
1903 }
1904
1905
1906 IFX_INLINE void IfxCcu6_initT13hrPinWithPadLevel(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1907 {
1908 IfxPort_setPinModeInput(t13hrIn->pin.port, t13hrIn->pin.pinIndex, inputMode);
1909 IfxPort_setPinPadDriver(t13hrIn->pin.port, t13hrIn->pin.pinIndex, padDriver);
1910 IfxCcu6_setT13InputSignal(t13hrIn->module, t13hrIn);
1911 }
1912
1913
1914 IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
1915 {
1916 return ccu6->CLC.B.DISS == 0;
1917 }
1918
1919
1920 IFX_INLINE boolean IfxCcu6_isModuleSuspended(Ifx_CCU6 *ccu6)
1921 {
1922 Ifx_CCU6_OCS ocs;
1923
1924 // read the status
1925 ocs.U = ccu6->OCS.U;
1926
1927 // return the status
1928 return ocs.B.SUSSTA;
1929 }
1930
1931
1932 IFX_INLINE boolean IfxCcu6_isT12OneNotification(Ifx_CCU6 *ccu6)
1933 {
1934 return ccu6->IS.B.T12OM != 0;
1935 }
1936
1937
1938 IFX_INLINE boolean IfxCcu6_isT12PeriodNotification(Ifx_CCU6 *ccu6)
1939 {
1940 return ccu6->IS.B.T12PM != 0;
1941 }
1942
1943
1944 IFX_INLINE boolean IfxCcu6_isT13CompareNotification(Ifx_CCU6 *ccu6)
1945 {
1946 return ccu6->IS.B.T13CM != 0;
1947 }
1948
1949
1950 IFX_INLINE void IfxCcu6_setCaptureCompareInputSignal(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareInput input, IfxCcu6_CaptureCompareInputSignal signal)
1951 {
1952 uint32 shift = (uint32)input;
1953 uint32 mask = (0x3U << shift);
1954 ccu6->PISEL0.U = (ccu6->PISEL0.U & ~mask) | ((uint32)signal << shift);
1955 }
1956
1957
1958 IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
1959 {
1960 uint32 shift = ((timer * 2) + 2);
1961 uint32 mask = (0x3U << shift);
1962 ccu6->PISEL2.U = (ccu6->PISEL2.U & ~mask) | ((uint32)mode << shift);
1963 }
1964
1965
1966 IFX_INLINE void IfxCcu6_setCurrentHallPattern(Ifx_CCU6 *ccu6, uint8 pattern)
1967 {
1968 ccu6->MCMOUTS.B.CURHS = pattern;
1969 }
1970
1971
1972 IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value)
1973 {
1974 ccu6->T12DTC.B.DTM = value;
1975 }
1976
1977
1978 IFX_INLINE void IfxCcu6_setExpectedHallPattern(Ifx_CCU6 *ccu6, uint8 pattern)
1979 {
1980 ccu6->MCMOUTS.B.EXPHS = pattern;
1981 }
1982
1983
1984 IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
1985 {
1986 uint32 shift = ((timer * 2) + 8);
1987 uint32 mask = (0x3U << shift);
1988 ccu6->TCTR2.U = (ccu6->TCTR2.U & ~mask) | ((uint32)mode << shift);
1989 }
1990
1991
1992 IFX_INLINE void IfxCcu6_setHallSensorTriggerMode(Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode)
1993 {
1994 uint32 shift = 12;
1995 uint32 mask = (0x7U << shift);
1996 ccu6->T12MSEL.U = (ccu6->T12MSEL.U & ~mask) | ((uint32)mode << shift);
1997 }
1998
1999
2000 IFX_INLINE void IfxCcu6_setInputClockFrequency(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency)
2001 {
2002 uint32 shift = (timer * 8);
2003 uint32 mask = (0x7U << shift);
2004 ccu6->TCTR0.U = (ccu6->TCTR0.U & ~mask) | ((uint32)frequency << shift);
2005 }
2006
2007
2008 IFX_INLINE void IfxCcu6_setInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
2009 {
2010 uint32 mask = (1U << source);
2011 ccu6->ISS.U = ccu6->ISS.U | (mask);
2012 }
2013
2014
2015 IFX_INLINE void IfxCcu6_setMultiChannelPwmPattern(Ifx_CCU6 *ccu6, uint8 pattern)
2016 {
2017 ccu6->MCMOUTS.B.MCMPS = pattern;
2018 }
2019
2020
2021 IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
2022 {
2023 ccu6->MCMCTR.B.SWSEL = mode;
2024 }
2025
2026
2027 IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
2028 {
2029 ccu6->MCMCTR.B.SWSYN = sync;
2030 }
2031
2032
2033 IFX_INLINE void IfxCcu6_setOutputPassiveState(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
2034 {
2035 uint32 shift = (channelOut + 8); // offset at location CC60PS
2036 uint32 mask = (1U << shift);
2037 ccu6->CMPSTAT.U = (ccu6->CMPSTAT.U & ~mask) | ((uint32)state << shift);
2038 }
2039
2040
2041 IFX_INLINE void IfxCcu6_setSingleShotModeEnable(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
2042 {
2043 Ifx_CCU6_TCTR2 tctr2;
2044 tctr2.U = ccu6->TCTR2.U;
2045 tctr2.B.T12SSC = t12;
2046 tctr2.B.T13SSC = t13;
2047 ccu6->TCTR2.U = tctr2.U;
2048 }
2049
2050
2051 IFX_INLINE void IfxCcu6_setSleepMode(Ifx_CCU6 *ccu6, IfxCcu6_SleepMode mode)
2052 {
2053 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2054 IfxScuWdt_clearCpuEndinit(passwd);
2055 ccu6->CLC.B.EDIS = mode;
2056 IfxScuWdt_setCpuEndinit(passwd);
2057 }
2058
2059
2060 IFX_INLINE void IfxCcu6_setSuspendMode(Ifx_CCU6 *ccu6, IfxCcu6_SuspendMode mode)
2061 {
2062 Ifx_CCU6_OCS ocs;
2063
2064 // remove protection and configure the suspend mode.
2065 ocs.B.SUS_P = 1;
2066 ocs.B.SUS = mode;
2067 ccu6->OCS.U = ocs.U;
2068 }
2069
2070
2071 IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
2072 {
2073 uint32 shift = (4 * channel);
2074 uint32 mask = (0xFU << shift);
2075 ccu6->T12MSEL.U = (ccu6->T12MSEL.U & ~mask) | ((uint32)mode << shift);
2076 }
2077
2078
2079 IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
2080 {
2081 ccu6->TCTR0.B.CTM = mode;
2082 }
2083
2084
2085 IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
2086 {
2087 ccu6->T12.B.T12CV = value;
2088 }
2089
2090
2091 IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
2092 {
2093 ccu6->T12PR.B.T12PV = value;
2094 }
2095
2096
2097 IFX_INLINE void IfxCcu6_setT13CompareValue(Ifx_CCU6 *ccu6, uint16 value)
2098 {
2099 ccu6->CC63SR.B.CCS = value;
2100 }
2101
2102
2103 IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value)
2104 {
2105 ccu6->T13.B.T13CV = value;
2106 }
2107
2108
2109 IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
2110 {
2111 ccu6->T13PR.B.T13PV = value;
2112 }
2113
2114
2115 IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
2116 {
2117 ccu6->TCTR2.B.T13TED = direction;
2118 }
2119
2120
2121 IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
2122 {
2123 ccu6->TCTR2.B.T13TEC = mode;
2124 }
2125
2126
2127 IFX_INLINE void IfxCcu6_setTrapMode(Ifx_CCU6 *ccu6, IfxCcu6_TrapMode mode)
2128 {
2129 ccu6->TRPCTR.B.TRPM2 = mode;
2130 }
2131
2132
2133 IFX_INLINE void IfxCcu6_setTrapState(Ifx_CCU6 *ccu6, IfxCcu6_TrapState state)
2134 {
2135 uint32 mask = 0x3U;
2136 ccu6->TRPCTR.U = (ccu6->TRPCTR.U & ~mask) | ((uint32)state);
2137 }
2138
2139
2140 IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
2141 {
2142 Ifx_CCU6_TCTR4 tctr4;
2143 tctr4.U = 0;
2144 tctr4.B.T12RS = t12;
2145 tctr4.B.T13RS = t13;
2146 ccu6->TCTR4.U = tctr4.U;
2147 }
2148
2149
2150 IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
2151 {
2152 Ifx_CCU6_TCTR4 tctr4;
2153 tctr4.U = 0;
2154 tctr4.B.T12RR = t12;
2155 tctr4.B.T13RR = t13;
2156 ccu6->TCTR4.U = tctr4.U;
2157 }
2158
2159
2160 IFX_INLINE void IfxCcu6_updateHallPattern(Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output)
2161 {
2162 Ifx_CCU6_MCMOUTS mcmouts;
2163 mcmouts.U = ccu6->MCMOUTS.U;
2164
2165 mcmouts.B.CURHS = currentHall;
2166 mcmouts.B.EXPHS = expectedHall;
2167 mcmouts.B.MCMPS = output;
2168
2169 ccu6->MCMOUTS.U = mcmouts.U;
2170 }
2171
2172
2173 #endif /* IFXCCU6_H */
IfxCcu6_enableDelayBypass
IFX_INLINE void IfxCcu6_enableDelayBypass(Ifx_CCU6 *ccu6)
Enables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC)...
Definition: IfxCcu6.h:1548
IfxCcu6_CaptureCompareInput_cC62
CC62 capture input.
Definition: IfxCcu6.h:82
IfxCcu6_resetModule
IFX_EXTERN void IfxCcu6_resetModule(Ifx_CCU6 *ccu6)
Definition: IfxCcu6.c:264
IfxCcu6_SuspendMode
IfxCcu6_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxCcu6.h:249
IfxCcu6_HallSensorTriggerMode_permanentCheck
Any edge at any of the inputs CCPOSx, independent from any PWM signal.
Definition: IfxCcu6.h:165
IfxCcu6_TimerInputSignal
IfxCcu6_TimerInputSignal
Selection of actual input signal for the timer inputs.
Definition: IfxCcu6.h:357
IfxCcu6_Cc60in_In
CC60IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:56
IfxCcu6_Cc61in_In
CC61IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:64
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2150
IfxCcu6_Cc62in_In
CC62IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:72
IfxCcu6_ServiceRequest_3
Service request output SR3.
Definition: IfxCcu6.h:235
IfxCcu6_setMultiChannelPwmPattern
IFX_INLINE void IfxCcu6_setMultiChannelPwmPattern(Ifx_CCU6 *ccu6, uint8 pattern)
Sets the output pattern for the multichannel mode (writes into shadow register)
Definition: IfxCcu6.h:2015
IfxCcu6_ExternalTriggerMode_disable
The external setting of T1xR is disabled.
Definition: IfxCcu6.h:151
IfxCcu6_initCc60InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc60InPinWithPadLevel(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC60 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1737
IfxCcu6_enableAdditionalPrescaler
IFX_INLINE void IfxCcu6_enableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support h...
Definition: IfxCcu6.h:1522
IfxCcu6_disableAdditionalPrescaler
IFX_INLINE void IfxCcu6_disableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support ...
Definition: IfxCcu6.h:1443
IfxCcu6_disableTrapPin
IFX_INLINE void IfxCcu6_disableTrapPin(Ifx_CCU6 *ccu6)
Disables the input (pin) function for the trap generation.
Definition: IfxCcu6.h:1516
IfxCcu6_ChannelOut_cout1
CC61 compare output COUT1.
Definition: IfxCcu6.h:115
IfxCcu6_clearCounter
IFX_INLINE void IfxCcu6_clearCounter(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Clears the counters of the Timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1402
IfxCcu6_setExternalRunMode
IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6.h:1984
IfxCcu6_clearT13CompareNotification
IFX_INLINE void IfxCcu6_clearT13CompareNotification(Ifx_CCU6 *ccu6)
Clears the T13 compare notification.
Definition: IfxCcu6.h:1437
IfxCcu6_getSrcAddress
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:237
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:144
IfxCcu6_Cc60in_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxCcu6_PinMap.h:59
IfxCcu6_T12ChannelMode_multiInputCaptureAny
CC6xIN any active edge : T12 stored in CC6xR, CCPOSx any active edge: T12 stored in CC6xSR...
Definition: IfxCcu6.h:282
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:88
IfxCcu6_clearAllInterruptStatusFlags
IFX_INLINE void IfxCcu6_clearAllInterruptStatusFlags(Ifx_CCU6 *ccu6)
Clears all Interrupt flags.
Definition: IfxCcu6.h:1396
IfxCcu6_Index
IfxCcu6_Index
List of the available CCU6 resources.
Definition: IfxCcu6_cfg.h:80
IfxCcu6_TimerInputClock_fcc6By64
fcc6 / 64
Definition: IfxCcu6.h:351
IfxCcu6_initCcpos0PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos0PinWithPadLevel(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS0 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1803
IfxCcu6_enableDeadTime
IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12.
Definition: IfxCcu6.h:1540
IfxCcu6_InterruptSource_cc62FallingEdge
Capture compare match falling edge interrupt enable for channel CC62.
Definition: IfxCcu6.h:191
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:299
IfxCcu6_InterruptSource_t13PeriodMatch
Interrupt enable for T13 period-match.
Definition: IfxCcu6.h:196
IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch
T12 period match detected (while counting up)
Definition: IfxCcu6.h:213
IfxCcu6_initCc60InPin
IFX_INLINE void IfxCcu6_initCc60InPin(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode)
Initialises a CC60 input pin.
Definition: IfxCcu6.h:1730
IfxCcu6_getDeadTimeStatus
IFX_INLINE boolean IfxCcu6_getDeadTimeStatus(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Indicate the status of the dead time generation for each compare channel (0, 1, 2) of timer T12...
Definition: IfxCcu6.h:1647
IfxCcu6_T13TriggerEvent_onCCPOSxEdge
set T13R on any edge of inputs CCPOSx
Definition: IfxCcu6.h:329
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:179
IfxCcu6_InterruptSource_wrongHallEvent
Interrupt enable for wrong hall event.
Definition: IfxCcu6.h:199
IfxCcu6_MultiChannelSwitchingSelect
IfxCcu6_MultiChannelSwitchingSelect
Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST fro...
Definition: IfxCcu6.h:205
IfxCcu6_TrapMode_manual
Bit TRPF stays 0, It has to be cleared by SW by writing ISR.RTRPF = 1.
Definition: IfxCcu6.h:384
IfxCcu6_getCaptureShadowRegisterValue
IFX_EXTERN uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel.
Definition: IfxCcu6.c:196
IfxCcu6_disableDeadTime
IFX_INLINE void IfxCcu6_disableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Disables the dead time generation for each compare channel (0, 1, 2) of Timer12.
Definition: IfxCcu6.h:1451
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:176
IfxCcu6_setT13TriggerEventMode
IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare...
Definition: IfxCcu6.h:2121
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:128
IfxCcu6_InterruptSource_t13CompareMatch
Interrupt enable for T13 compare-match.
Definition: IfxCcu6.h:195
IfxCcu6_HallSensorTriggerMode_cM61CountingUp
A T12 Compare-Match of compare channel CC61 while counting up (CM_61 and CDIR = 0) ...
Definition: IfxCcu6.h:172
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:197
IfxCcu6_enableTimer
IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed.
Definition: IfxCcu6.h:1626
IfxCcu6_setCaptureCompareInputSignal
IFX_INLINE void IfxCcu6_setCaptureCompareInputSignal(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareInput input, IfxCcu6_CaptureCompareInputSignal signal)
selects the actual input signal for the capture compare inputs.
Definition: IfxCcu6.h:1950
IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling
CC6xIN rising edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:278
IfxCcu6_setT12ChannelMode
IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels.
Definition: IfxCcu6.h:2071
IfxCcu6_CaptureCompareState_clear
Bit CC6xST is cleared.
Definition: IfxCcu6.h:104
IfxCcu6_ChannelOut
IfxCcu6_ChannelOut
Capture compare output pins.
Definition: IfxCcu6.h:110
IfxCcu6_TrapMode_automatic
Bit TRPF is cleared by HW.
Definition: IfxCcu6.h:383
IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer
IFX_INLINE void IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer(Ifx_CCU6 *ccu6)
Enables the shadow transfer T13_ST if flag MCMOUT.R is set or becomes set while a T13 period match is...
Definition: IfxCcu6.h:1597
IfxCcu6_InterruptSource_cc60RisingEdge
Capture compare match rising edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:181
IfxCcu6_disableInterrupt
IFX_INLINE void IfxCcu6_disableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Disables the selected interrupt.
Definition: IfxCcu6.h:1465
IfxCcu6_disableMultiChannelMode
IFX_INLINE void IfxCcu6_disableMultiChannelMode(Ifx_CCU6 *ccu6)
Sets multi channel mode unavailable, A write access to MCMOUTS is ignored.
Definition: IfxCcu6.h:1472
IfxCcu6_TimerRunStatus_stopped
Timer T1x is stopped.
Definition: IfxCcu6.h:374
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxCcu6_CaptureCompareInput_cTRAP
CTRAP input.
Definition: IfxCcu6.h:83
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCcu6_Ctrap_In
CTRAP pin mapping structure.
Definition: IfxCcu6_PinMap.h:104
IfxCcu6_ServiceRequest_2
Service request output SR2.
Definition: IfxCcu6.h:234
IfxCcu6_InterruptSource_cc61FallingEdge
Capture compare match falling edge interrupt enable for channel CC61.
Definition: IfxCcu6.h:187
IfxCcu6_CaptureCompareInputSignal
IfxCcu6_CaptureCompareInputSignal
Selection of actual input signal for the capture compare inputs.
Definition: IfxCcu6.h:91
IfxCcu6_getT12CaptureCompareState
IFX_INLINE boolean IfxCcu6_getT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the state of the Timer12 capture/compare channels CC6xST (x = 0, 1, 2)
Definition: IfxCcu6.h:1690
float32
float float32
Definition: Platform_Types.h:170
IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch
T12 one-match (while counting down)
Definition: IfxCcu6.h:210
IfxCcu6_HallSensorTriggerMode_t12PMCountingUp
A T12 Period-Match while counting up (T12_PM and CDIR = 0)
Definition: IfxCcu6.h:170
IfxCcu6_MultiChannelSwitchingSync_direct
Direct, the trigger event immediately leads to the shadow transfer.
Definition: IfxCcu6.h:221
Ifx_Assert.h
Assert functions.
IfxCcu6_TimerInputSignal_a
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:359
IfxCcu6_SleepMode_enable
enables sleep mode
Definition: IfxCcu6.h:243
IfxCcu6_InterruptSource_cc60FallingEdge
Capture compare match falling edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:183
IfxCcu6_setDeadTimeValue
IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (...
Definition: IfxCcu6.h:1972
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxCcu6_Cc60in_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxCcu6_PinMap.h:60
IfxCcu6_HallSensorTriggerMode
IfxCcu6_HallSensorTriggerMode
Defines the source for the sampling of the Hall input pattern and the comparison to the current and t...
Definition: IfxCcu6.h:163
IfxCcu6_T13TriggerEvent_onT12Period
set T13R upon a period-match of T12
Definition: IfxCcu6.h:326
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxCcu6_initCc62OutPin
IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin.
Definition: IfxCcu6.h:1789
IfxCcu6_T12CountDirection
IfxCcu6_T12CountDirection
Counting direction of Timer12 Definition in Ifx_CCU.TCTR0.B.CDIR.
Definition: IfxCcu6.h:288
IfxCcu6_getShadowTransferStatus
IFX_INLINE boolean IfxCcu6_getShadowTransferStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) shadow transfer enable status.
Definition: IfxCcu6.h:1682
IfxSrc.h
SRC basic functionality.
IfxCcu6_initCout61Pin
IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin.
Definition: IfxCcu6.h:1848
IfxCcu6_getAddress
IFX_EXTERN Ifx_CCU6 * IfxCcu6_getAddress(IfxCcu6_Index ccu6)
Returns the module index of the selected CCU6 module.
Definition: IfxCcu6.c:158
IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch
T13 period-match detected (while counting up)
Definition: IfxCcu6.h:209
IfxCcu6_CaptureCompareInputSignal_a
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:93
IfxCcu6_routeInterruptNode
IFX_EXTERN void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:283
IfxCcu6_enableMultiChannelMode
IFX_INLINE void IfxCcu6_enableMultiChannelMode(Ifx_CCU6 *ccu6)
Sets multi channel mode available, A write access to MCMOUTS is executed.
Definition: IfxCcu6.h:1567
IfxCcu6_T13TriggerDirection
IfxCcu6_T13TriggerDirection
Delivers additional information to control the automatic set of bit T13R in the case that the trigger...
Definition: IfxCcu6.h:308
IfxCcu6_T12CountMode_centerAligned
T12 counts down after detecting a period-match and counts up after detecting a one-match.
Definition: IfxCcu6.h:301
IfxCcu6_TimerInputSignal_c
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:361
IfxCcu6_initCc61InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc61InPinWithPadLevel(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC61 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1759
IfxCcu6_initCc62InPin
IFX_INLINE void IfxCcu6_initCc62InPin(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode)
Initialises a CC62 input pin.
Definition: IfxCcu6.h:1774
IfxCpu_Intrinsics.h
IfxCcu6_T13TriggerEvent_onCC60RCompare
set T13R on a T12 compare event on channel 0
Definition: IfxCcu6.h:322
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:337
IfxCcu6_ChannelOut_cc1
CC61 compare output CC1.
Definition: IfxCcu6.h:114
IfxCcu6_disableTimer
IFX_INLINE void IfxCcu6_disableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block unavailable, A write access to T12PR is ignored.
Definition: IfxCcu6.h:1501
IfxCcu6_InterruptSource_cc61RisingEdge
Capture compare match rising edge interrupt enable for channel CC61.
Definition: IfxCcu6.h:185
IfxCcu6_getTimerAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability
Definition: IfxCcu6.h:1715
IfxCcu6_setSingleShotModeEnable
IFX_INLINE void IfxCcu6_setSingleShotModeEnable(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the sel...
Definition: IfxCcu6.h:2041
IfxCcu6_disableModule
IFX_EXTERN void IfxCcu6_disableModule(Ifx_CCU6 *ccu6)
Disables the selected CCU6 kernel.
Definition: IfxCcu6.c:101
IfxCcu6_HallSensorTriggerMode_cM63
A T13 Compare-Match.
Definition: IfxCcu6.h:167
IfxCcu6_CaptureCompareInputSignal_b
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:94
IfxCcu6_setTrapState
IFX_INLINE void IfxCcu6_setTrapState(Ifx_CCU6 *ccu6, IfxCcu6_TrapState state)
Sets behaviour of the selected outputs when leaving the trap state after the trap condition has becom...
Definition: IfxCcu6.h:2133
IfxCcu6_disableSingleShotMode
IFX_INLINE void IfxCcu6_disableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the single shot-mode of Timers (T12 T13).
Definition: IfxCcu6.h:1488
IfxCcu6_ExternalTriggerMode_anyEdge
Bit T1xR is set if an edge of signal T1xHR is detected.
Definition: IfxCcu6.h:156
IfxCcu6_Cc60_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxCcu6_PinMap.h:132
IfxCcu6_isT13CompareNotification
IFX_INLINE boolean IfxCcu6_isT13CompareNotification(Ifx_CCU6 *ccu6)
Returns the status of T13 compare notification.
Definition: IfxCcu6.h:1944
IfxCcu6_setT12CounterValue
IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12.
Definition: IfxCcu6.h:2085
IfxCcu6_setT12Frequency
IFX_EXTERN float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:377
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
IfxCcu6_T12ChannelMode_compareMode
Compare mode.
Definition: IfxCcu6.h:270
IfxCcu6_TimerInputSignal_h
defines the input signal used as T1xHR input.
Definition: IfxCcu6.h:366
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1603
IfxCcu6_setHallSensorTriggerMode
IFX_INLINE void IfxCcu6_setHallSensorTriggerMode(Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode)
Sets source for the sampling of the Hall input pattern and the comparison to the current and the expe...
Definition: IfxCcu6.h:1992
IfxCcu6_SleepMode
IfxCcu6_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_CCU6.CLC.B.EDIS.
Definition: IfxCcu6.h:241
IfxCcu6_getHallPatternSampleState
IFX_INLINE boolean IfxCcu6_getHallPatternSampleState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the value of the input Hall pattern of the Timer12 capture/compare channels CC6POS6x (x = 0...
Definition: IfxCcu6.h:1655
IfxScuWdt.h
SCU basic functionality.
IfxCcu6_Cc60in_In::module
Ifx_CCU6 * module
Base address.
Definition: IfxCcu6_PinMap.h:58
IfxCcu6_setInterruptStatusFlag
IFX_INLINE void IfxCcu6_setInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Sets the selected interrupt flag.
Definition: IfxCcu6.h:2008
IfxCcu6_initCout60Pin
IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin.
Definition: IfxCcu6.h:1841
IfxCcu6_getT12CountDirection
IFX_INLINE IfxCcu6_T12CountDirection IfxCcu6_getT12CountDirection(Ifx_CCU6 *ccu6)
Returns the current counting direction of Timer12.
Definition: IfxCcu6.h:1697
IfxCcu6_T12ChannelMode_multiInputCaptureBothRising
CC6xIN rising edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:280
IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling
CC6xIN falling edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:281
IfxCcu6_CaptureCompareState_toggle
Bit CC6xST is toggled.
Definition: IfxCcu6.h:105
IfxCcu6_TimerRunStatus
IfxCcu6_TimerRunStatus
Timer (T12 / T13) run status Definition in Ifx_CCU.TCTR0.B.T12R and Ifx_CCU.TCTR0.B.T13R.
Definition: IfxCcu6.h:372
IfxCcu6_setSleepMode
IFX_INLINE void IfxCcu6_setSleepMode(Ifx_CCU6 *ccu6, IfxCcu6_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxCcu6.h:2051
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling
CC6xIN rising edge: T12 stored in CC6xR, falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:271
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch
A T13 zero-match triggers the shadow transfer.
Definition: IfxCcu6.h:223
IfxCcu6_TimerInputSignal_e
defines the input signal used as T1xHR input.
Definition: IfxCcu6.h:363
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:168
IfxCcu6_CaptureCompareInput_cCPOS1
CCPOS1 input.
Definition: IfxCcu6.h:85
IfxCcu6_CaptureCompareInput_cC61
CC61 capture input.
Definition: IfxCcu6.h:81
IfxCcu6_CountingInputMode_externalRising
The timer T1x is counting each rising edge detected in the selected T1xHR signal. ...
Definition: IfxCcu6.h:130
IfxCcu6_HallSensorTriggerMode_cM61CountingDown
A T12 Compare-Match of compare channel CC61 while counting down (CM_61 and CDIR = 1) ...
Definition: IfxCcu6.h:173
IfxCcu6_TimerInputSignal_f
defines the input signal used as T1xHR input.
Definition: IfxCcu6.h:364
IfxCcu6_enableSingleShotMode
IFX_INLINE void IfxCcu6_enableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the single shot-mode of Timers (T12 T13).
Definition: IfxCcu6.h:1613
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:80
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu6_T13TriggerDirection_anyT12
independent on the count direction of T12
Definition: IfxCcu6.h:313
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1560
IfxCcu6_T13TriggerEvent_onT12Zero
set T13R upon a zero-match of T12 (while counting up)
Definition: IfxCcu6.h:327
IfxCcu6_T13TriggerEvent_onCC62RCompare
set T13R on a T12 compare event on channel 2
Definition: IfxCcu6.h:324
IfxCcu6_ChannelOut_cc0
CC60 compare output CC0.
Definition: IfxCcu6.h:112
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCcu6_ChannelOut_cout2
CC62 compare output COUT2.
Definition: IfxCcu6.h:117
IfxCcu6_TimerInputClock_fcc6By128
fcc6 / 128
Definition: IfxCcu6.h:352
IfxCcu6_CountingInputMode
IfxCcu6_CountingInputMode
Defines the input event leading to a counting action of the timer (T12 / T13) Definition in Ifx_CCU...
Definition: IfxCcu6.h:124
IfxCcu6_TimerInputClock_fcc6By16
fcc6 / 16
Definition: IfxCcu6.h:349
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:336
IfxCcu6_CaptureCompareInput_cCPOS2
CCPOS2 input.
Definition: IfxCcu6.h:86
IfxCcu6_cfg.h
CCU6 on-chip implementation data.
IfxCcu6_TrapState_t13Sync
The trap state is left when a zeromatch of T13 is detected.
Definition: IfxCcu6.h:395
IfxCcu6_setTrapMode
IFX_INLINE void IfxCcu6_setTrapMode(Ifx_CCU6 *ccu6, IfxCcu6_TrapMode mode)
Sets the mode of clearing the trap flag TRPF after the trap input condition is no longer valid...
Definition: IfxCcu6.h:2127
IfxCcu6_setMultiChannelSwitchingMode
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS ...
Definition: IfxCcu6.h:2021
IfxCcu6_ExternalTriggerMode_risingEdge
Bit T1xR is set if a rising edge of signal T1xHR is detected.
Definition: IfxCcu6.h:152
IfxCcu6_TimerInputSignal_g
defines the input signal used as T1xHR input.
Definition: IfxCcu6.h:365
IfxCcu6_CaptureCompareState_set
Bit CC6xST is set.
Definition: IfxCcu6.h:103
IfxCcu6_getT13CaptureCompareState
IFX_INLINE boolean IfxCcu6_getT13CaptureCompareState(Ifx_CCU6 *ccu6)
Returns the state of the Timer13 capture/compare channel CC63ST.
Definition: IfxCcu6.h:1709
IfxCcu6_ChannelOut_cout3
CC63 compare output COUT3.
Definition: IfxCcu6.h:118
IfxCcu6_T12CountDirection_down
Counting down.
Definition: IfxCcu6.h:291
IfxCcu6_setT13InputSignal
IFX_EXTERN void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:510
IfxCcu6_isModuleSuspended
IFX_INLINE boolean IfxCcu6_isModuleSuspended(Ifx_CCU6 *ccu6)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxCcu6.h:1920
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2079
IfxCcu6_TimerInputClock_fcc6By32
fcc6 / 32
Definition: IfxCcu6.h:350
IfxCcu6_T13TriggerDirection_noAction
no action
Definition: IfxCcu6.h:310
IfxCcu6_readTimer
IFX_EXTERN uint32 IfxCcu6_readTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the current value of the timer register.
Definition: IfxCcu6.c:247
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:152
IfxCcu6_HallSensorTriggerMode_off
Hall sampling triggered by HW sources is switched off.
Definition: IfxCcu6.h:169
IfxCcu6_initCc60OutPin
IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin.
Definition: IfxCcu6.h:1745
IfxCcu6_enableMultiChannelModeAvailability
IFX_INLINE void IfxCcu6_enableMultiChannelModeAvailability(Ifx_CCU6 *ccu6)
Enables the Multi Channel Mode Availability.
Definition: IfxCcu6.h:1573
IfxCcu6_T12Channel
IfxCcu6_T12Channel
Capture compare channel of Timer12.
Definition: IfxCcu6.h:258
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:193
IfxCcu6_T12ChannelMode
IfxCcu6_T12ChannelMode
The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x.
Definition: IfxCcu6.h:267
IfxCcu6_initCc61InPin
IFX_INLINE void IfxCcu6_initCc61InPin(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode)
Initialises a CC61 input pin.
Definition: IfxCcu6.h:1752
IfxCcu6_enableMultiChannelPwmPatternShadowTransfer
IFX_INLINE void IfxCcu6_enableMultiChannelPwmPatternShadowTransfer(Ifx_CCU6 *ccu6)
Sets MCM_ST immediately to update bit field MCMP by the value of MCMPS.
Definition: IfxCcu6.h:1579
IfxCcu6_PinMap.h
CCU6 I/O map.
IfxCcu6_enableHallPatternShadowTransfer
IFX_INLINE void IfxCcu6_enableHallPatternShadowTransfer(Ifx_CCU6 *ccu6)
Sets HP_ST immediately to update bit fields EXPH and CURH by EXPHS and CURHS.
Definition: IfxCcu6.h:1554
IfxCcu6_disableT13InvertedModulation
IFX_INLINE void IfxCcu6_disableT13InvertedModulation(Ifx_CCU6 *ccu6)
Disables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0...
Definition: IfxCcu6.h:1495
IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent
Correct Hall pattern detected (CM_CHE)
Definition: IfxCcu6.h:208
IfxCcu6_T13TriggerEvent_onCC61RCompare
set T13R on a T12 compare event on channel 1
Definition: IfxCcu6.h:323
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:230
IfxCcu6_T13TriggerEvent
IfxCcu6_T13TriggerEvent
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare sign...
Definition: IfxCcu6.h:319
IfxCcu6_CountingInputMode_internal
The T1x prescaler generates the counting events, Bit TCTR4.T1xCNT is not taken into account...
Definition: IfxCcu6.h:126
IfxCcu6_TimerId
IfxCcu6_TimerId
Timer number ( T12 / T13 )
Definition: IfxCcu6.h:334
IfxCcu6_T13TriggerEvent_onAnyT12Compare
set T13R on any T12 compare event (ch. 0, 1, 2)
Definition: IfxCcu6.h:325
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1914
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising
CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:272
IfxCcu6_T12ChannelMode_off
Capture/Compare modes switched off.
Definition: IfxCcu6.h:269
IfxCcu6_initT13hrPinWithPadLevel
IFX_INLINE void IfxCcu6_initT13hrPinWithPadLevel(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T13HR pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1906
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxCcu6_TrapState_t12Sync
The trap state is left when a zero-match of T12 (while counting up) is detected.
Definition: IfxCcu6.h:393
IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus
IFX_INLINE boolean IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus(Ifx_CCU6 *ccu6)
Gets the status of the shadow transfer request from MCMPS to MCMP.
Definition: IfxCcu6.h:1676
IfxCcu6_initCtrapPinWithPadLevel
IFX_INLINE void IfxCcu6_initCtrapPinWithPadLevel(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CTRAP pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1876
IfxCcu6_DelayBypass_active
Dead-Time Counter 0 is not used for a delay.
Definition: IfxCcu6.h:143
IfxCcu6_T13TriggerDirection_onT12CountingUp
while T12 is counting up
Definition: IfxCcu6.h:311
IfxCcu6_clearInterruptStatusFlag
IFX_INLINE void IfxCcu6_clearInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Clears the selected interrupt flag.
Definition: IfxCcu6.h:1418
IfxCcu6_getInterruptStatusFlag
IFX_INLINE boolean IfxCcu6_getInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Gets the status of the selected interrupt flag.
Definition: IfxCcu6.h:1663
IfxCcu6_enableCountEvent
IFX_INLINE void IfxCcu6_enableCountEvent(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Sets the single shot-mode of Timers (T12, T13).
Definition: IfxCcu6.h:1530
IfxCcu6_TimerInputClock_fcc6By4
fcc6 / 4
Definition: IfxCcu6.h:347
IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling
CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:273
IfxCcu6_initCcpos2Pin
IFX_INLINE void IfxCcu6_initCcpos2Pin(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin.
Definition: IfxCcu6.h:1826
IfxCcu6_HallSensorTriggerMode_t13PM
A T13 Period-Match.
Definition: IfxCcu6.h:168
IfxCcu6_SuspendMode_hard
Hard Suspend.
Definition: IfxCcu6.h:252
IfxCcu6_initT12hrPin
IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin.
Definition: IfxCcu6.h:1884
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:297
IfxCcu6_setSuspendMode
IFX_INLINE void IfxCcu6_setSuspendMode(Ifx_CCU6 *ccu6, IfxCcu6_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxCcu6.h:2060
IfxCcu6_setT12CompareValue
IFX_EXTERN void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers)
Definition: IfxCcu6.c:360
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:136
IfxCcu6_setCurrentHallPattern
IFX_INLINE void IfxCcu6_setCurrentHallPattern(Ifx_CCU6 *ccu6, uint8 pattern)
Sets the current hall pattern for the multichannel mode (writes into shadow register) ...
Definition: IfxCcu6.h:1966
IfxCcu6_TimerInputClock_fcc6By2
fcc6 / 2
Definition: IfxCcu6.h:346
IfxCcu6_ChannelOut_cc2
CC62 compare output CC2.
Definition: IfxCcu6.h:116
IfxCcu6_enableTrapPin
IFX_INLINE void IfxCcu6_enableTrapPin(Ifx_CCU6 *ccu6)
Enables the input (pin) function for the trap generation.
Definition: IfxCcu6.h:1641
IfxCcu6_disableModulationOutput
IFX_EXTERN void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12...
Definition: IfxCcu6.c:70
IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch
T12 channel 1 compare-match detected (phase delay function)
Definition: IfxCcu6.h:211
IfxCcu6_clearT12OneNotification
IFX_INLINE void IfxCcu6_clearT12OneNotification(Ifx_CCU6 *ccu6)
Clears the T12 One notification.
Definition: IfxCcu6.h:1425
IfxCcu6_disableTrap
IFX_INLINE void IfxCcu6_disableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Disables the trap functionality for the corresponding output signals.
Definition: IfxCcu6.h:1508
IfxCcu6_TrapState
IfxCcu6_TrapState
Defines the behavior of the selected outputs when leaving the trap state, after the trap condition ha...
Definition: IfxCcu6.h:391
IfxCcu6_setT12CaptureCompareState
IFX_EXTERN void IfxCcu6_setT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xS...
Definition: IfxCcu6.c:335
IfxCcu6_setCountingInputMode
IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13).
Definition: IfxCcu6.h:1958
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxCcu6_CountingInputMode_manual
Bit TCTR4.T1xCNT written with 1 is a counting event. The T1x prescaler is not taken into account...
Definition: IfxCcu6.h:128
IfxCcu6_TimerInputClock_fcc6By8
fcc6 / 8
Definition: IfxCcu6.h:348
IfxCcu6_setT13CounterValue
IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13.
Definition: IfxCcu6.h:2103
IfxCcu6_ExternalTriggerMode
IfxCcu6_ExternalTriggerMode
Defines the event of signal T1xHR that can set the run bit T1xR by HW Definition in Ifx_CCU...
Definition: IfxCcu6.h:149
IfxCcu6_DelayBypass_notActive
Dead-Time Counter 0 is generating a delay after the source signal becomes active. ...
Definition: IfxCcu6.h:141
IfxCcu6_ChannelOut_cout0
CC60 compare output COUT0.
Definition: IfxCcu6.h:113
IfxCcu6_SuspendMode_none
No suspend.
Definition: IfxCcu6.h:251
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_enableT13InvertedModulation
IFX_INLINE void IfxCcu6_enableT13InvertedModulation(Ifx_CCU6 *ccu6)
Enables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0...
Definition: IfxCcu6.h:1620
IfxCcu6_initCcpos2PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos2PinWithPadLevel(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS2 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1833
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_T13TriggerEvent_noAction
no action
Definition: IfxCcu6.h:321
IfxCcu6_TrapMode
IfxCcu6_TrapMode
Defines how the trap flag TRPF can be cleared after the trap input condition is no longer valid (eith...
Definition: IfxCcu6.h:381
IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch
A T12 zero-match (while counting up) triggers the shadow transfer.
Definition: IfxCcu6.h:224
IfxCcu6_initT13hrPin
IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin.
Definition: IfxCcu6.h:1899
IfxCcu6_getIndex
IFX_EXTERN IfxCcu6_Index IfxCcu6_getIndex(Ifx_CCU6 *ccu6)
Returns CCU6 index.
Definition: IfxCcu6.c:217
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny
CC6xIN any active edge: CC6nSR stored in CC6xR, any active edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:274
IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising
CC6xIN falling edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:279
IfxCcu6_updateHallPattern
IFX_INLINE void IfxCcu6_updateHallPattern(Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output)
Updates the hall pattern (current hall, expected hall, moduleation output), in a single write...
Definition: IfxCcu6.h:2160
IfxCcu6_setInputClockFrequency
IFX_INLINE void IfxCcu6_setInputClockFrequency(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency)
Sets the input clock for timers (T12 or T13)
Definition: IfxCcu6.h:2000
IfxCcu6_setExpectedHallPattern
IFX_INLINE void IfxCcu6_setExpectedHallPattern(Ifx_CCU6 *ccu6, uint8 pattern)
Sets the expected hall pattern for the multichannel mode (writes into shadow register) ...
Definition: IfxCcu6.h:1978
IfxCcu6_connectTrigger
IFX_EXTERN void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
Definition: IfxCcu6.c:53
IfxCcu6_isT12PeriodNotification
IFX_INLINE boolean IfxCcu6_isT12PeriodNotification(Ifx_CCU6 *ccu6)
Returns the status of T12 period notification.
Definition: IfxCcu6.h:1938
IfxCcu6_initCc62InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc62InPinWithPadLevel(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC62 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1781
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:194
IfxCcu6_T12Channel_0
T12 channel CC60.
Definition: IfxCcu6.h:260
IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer
IFX_INLINE void IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer(Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or becomes set while a T12 one match is de...
Definition: IfxCcu6.h:1585
IfxCcu6_T12Channel_1
T12 channel CC61.
Definition: IfxCcu6.h:261
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:233
IfxCcu6_isT12OneNotification
IFX_INLINE boolean IfxCcu6_isT12OneNotification(Ifx_CCU6 *ccu6)
Returns the status of T12 one notification.
Definition: IfxCcu6.h:1932
IfxCcu6_InterruptSource_correctHallEvent
Interrupt enable for correct hall event.
Definition: IfxCcu6.h:198
IfxCcu6_DelayBypass
IfxCcu6_DelayBypass
Controls whether the source signal for the sampling of the Hall input pattern (selected by HSYNC) is ...
Definition: IfxCcu6.h:139
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxCcu6_clearDeadTimeCounters
IFX_INLINE void IfxCcu6_clearDeadTimeCounters(Ifx_CCU6 *ccu6)
Clears all the three dead-time counter channels to zero.
Definition: IfxCcu6.h:1412
IfxCcu6_initCout63Pin
IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin.
Definition: IfxCcu6.h:1862
IfxCcu6_InterruptSource_cc62RisingEdge
Capture compare match rising edge interrupt enable for channel CC62.
Definition: IfxCcu6.h:189
IfxCcu6_T13TriggerDirection_onT12CountingDown
while T12 is counting down
Definition: IfxCcu6.h:312
IfxCcu6_setT12InputSignal
IFX_EXTERN void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:426
IfxCcu6_initCtrapPin
IFX_INLINE void IfxCcu6_initCtrapPin(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode)
Initialises a CTRAP input pin.
Definition: IfxCcu6.h:1869
IfxCcu6_T12Channel_2
T12 channel CC62.
Definition: IfxCcu6.h:262
IfxCcu6_setOutputPassiveLevel
IFX_EXTERN void IfxCcu6_setOutputPassiveLevel(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module.
Definition: IfxCcu6.c:320
IfxCcu6_CountingInputMode_externalFalling
The timer T1x is counting each falling edge detected in the selected T1xHR signal.
Definition: IfxCcu6.h:132
IfxCcu6_getT12TimerPointer
IFX_INLINE volatile uint32 * IfxCcu6_getT12TimerPointer(Ifx_CCU6 *ccu6)
Returns the Timer pointer.
Definition: IfxCcu6.h:1703
IfxCcu6_TrigSel
IfxCcu6_TrigSel
Definition: IfxCcu6_cfg.h:94
IfxCcu6_ExternalTriggerMode_fallingEdge
Bit T1xR is set if a falling edge of signal T1xHR is detected.
Definition: IfxCcu6.h:154
IfxCcu6_SleepMode_disable
disables sleep mode
Definition: IfxCcu6.h:244
IfxCcu6_TrapState_immediate
The trap state is left immediately without any synchronization to T12 or T13.
Definition: IfxCcu6.h:397
IfxCcu6_clearT12PeriodNotification
IFX_INLINE void IfxCcu6_clearT12PeriodNotification(Ifx_CCU6 *ccu6)
Clears the T12 period notification.
Definition: IfxCcu6.h:1431
IfxCcu6_TimerRunStatus_running
Timer T1x is running.
Definition: IfxCcu6.h:375
IfxCcu6_T12CountDirection_up
Counting up.
Definition: IfxCcu6.h:290
IfxCcu6_disableShadowTransfer
IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1478
IfxCcu6_setT13CaptureCompareState
IFX_EXTERN void IfxCcu6_setT13CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63S...
Definition: IfxCcu6.c:435
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:96
IfxCcu6_setT13TriggerEventDirection
IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction.
Definition: IfxCcu6.h:2115
IfxCcu6_initT12hrPinWithPadLevel
IFX_INLINE void IfxCcu6_initT12hrPinWithPadLevel(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T12HR pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1891
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:160
IfxCcu6_initCcpos0Pin
IFX_INLINE void IfxCcu6_initCcpos0Pin(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin.
Definition: IfxCcu6.h:1796
IfxCcu6_initCout62Pin
IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin.
Definition: IfxCcu6.h:1855
IfxCcu6_setMultiChannelSwitchingSync
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
Sets the synchronization mechanism of the shadow transfer event MCM_ST if it has been requested befor...
Definition: IfxCcu6.h:2027
IfxCcu6_CaptureCompareInputSignal_c
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:95
IfxCcu6_setT13CompareValue
IFX_INLINE void IfxCcu6_setT13CompareValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit compare value of Timer13 (writes into shadow register)
Definition: IfxCcu6.h:2097
IfxCcu6_CaptureCompareState
IfxCcu6_CaptureCompareState
capture/compare state to set / clear the CC6xST-bits
Definition: IfxCcu6.h:101
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxCcu6_CaptureCompareInputSignal_d
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:96
IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer
IFX_INLINE void IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer(Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or becomes set while a T12 period match is...
Definition: IfxCcu6.h:1591
IfxCcu6_getTimerRunStatus
IFX_INLINE IfxCcu6_TimerRunStatus IfxCcu6_getTimerRunStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) run status.
Definition: IfxCcu6.h:1722
IfxCcu6_CaptureCompareInput_cC60
CC60 capture input.
Definition: IfxCcu6.h:80
IfxCcu6_TrigOut
IfxCcu6_TrigOut
Definition: IfxCcu6_cfg.h:87
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2091
IfxCcu6_MultiChannelSwitchingSync
IfxCcu6_MultiChannelSwitchingSync
Selection of the synchronization mechanism for the shadow transfer event MCM_ST Definition in Ifx_CCU...
Definition: IfxCcu6.h:219
IfxCcu6_TimerInputClock_fcc6
fcc6
Definition: IfxCcu6.h:345
IfxCcu6_TimerInputSignal_d
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:362
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2140
IfxCcu6_initCcpos1Pin
IFX_INLINE void IfxCcu6_initCcpos1Pin(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode)
Initialises a CCPOS1 input pin.
Definition: IfxCcu6.h:1811
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxCcu6_getMultiChannelModeAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getMultiChannelModeAvailabilityStatus(Ifx_CCU6 *ccu6)
indicates if the multi-channel mode functionality is available
Definition: IfxCcu6.h:1670
IfxCcu6_SuspendMode_soft
Soft Suspend.
Definition: IfxCcu6.h:253
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxCcu6_setT13PeriodValue
IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match.
Definition: IfxCcu6.h:2109
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCcu6_initCc61OutPin
IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin.
Definition: IfxCcu6.h:1767
IfxCcu6_TimerInputSignal_b
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:360
IfxCcu6_MultiChannelSwitchingSelect_noEvent
No trigger request will be generated.
Definition: IfxCcu6.h:207
IfxCcu6_initCcpos1PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos1PinWithPadLevel(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS1 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1818
IfxCcu6_HallSensorTriggerMode_t12OMCountingDown
A T12 One-Match while counting down (T12_PM and CDIR = 1)
Definition: IfxCcu6.h:171
IfxCcu6_enableTrap
IFX_INLINE void IfxCcu6_enableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Enables the trap functionality for the corresponding output signals.
Definition: IfxCcu6.h:1633
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxCcu6_disableDelayBypass
IFX_INLINE void IfxCcu6_disableDelayBypass(Ifx_CCU6 *ccu6)
Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC...
Definition: IfxCcu6.h:1459
IfxCcu6_enableModule
IFX_EXTERN void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:145
IfxCcu6_T12ChannelMode_hallSensor
Hall Sensor Mode, In order to properly enable this mode, all three MSEL6x fields have to be programme...
Definition: IfxCcu6.h:275
IfxCcu6_TimerInputClock
IfxCcu6_TimerInputClock
Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according t...
Definition: IfxCcu6.h:343
IfxCcu6_enableModulationOutput
IFX_EXTERN void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 ...
Definition: IfxCcu6.c:114
IfxCcu6_T12ChannelMode_hysteresisLikecompare
Hysteresis-like compare mode.
Definition: IfxCcu6.h:277
IfxCcu6_getCaptureRegisterValue
IFX_EXTERN uint32 IfxCcu6_getCaptureRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel.
Definition: IfxCcu6.c:175
IfxCcu6_setT13Frequency
IFX_EXTERN float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by ...
Definition: IfxCcu6.c:461
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:232
IfxCcu6_setOutputPassiveState
IFX_INLINE void IfxCcu6_setOutputPassiveState(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the state of the corresponding compare channel, that is considered to be the passive state...
Definition: IfxCcu6.h:2033
IfxCcu6_CaptureCompareInput
IfxCcu6_CaptureCompareInput
Input selection, ( CC6x capture input / CTRAP input / CCPOSx input ) Definition in Ifx_CCU...
Definition: IfxCcu6.h:78
IfxCcu6_CaptureCompareInput_cCPOS0
CCPOS0 input.
Definition: IfxCcu6.h:84


iLLD_TC26B: IfxCcu6_Icu.c Source File

  • Ccu6
  • Icu
IfxCcu6_Icu.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_Icu.c
3 * \brief CCU6 ICU details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxCcu6_Icu.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 uint32 IfxCcu6_Icu_getTimeStamp(IfxCcu6_Icu_Channel *channel)
54 {
55 uint32 timeStamp = 0;
56
57 timeStamp = IfxCcu6_getCaptureShadowRegisterValue(channel->ccu6, channel->channelId);
58
59 return timeStamp;
60 }
61
62
63 void IfxCcu6_Icu_initChannel(IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
64 {
65 channel->ccu6 = channelConfig->ccu6;
66
67 /* -- capture input initialisation -- */
68
69 const IfxCcu6_Icu_Pins *pins = channelConfig->pins;
70
71 if (pins != NULL_PTR)
72 {
73 IfxCcu6_Cc60in_In *cc60In = pins->cc60In;
74
75 if (cc60In != NULL_PTR)
76 {
77 IfxCcu6_initCc60InPinWithPadLevel(cc60In, pins->cc6xInputMode, pins->pinDriver);
78 }
79
80 IfxCcu6_Cc61in_In *cc61In = pins->cc61In;
81
82 if (cc61In != NULL_PTR)
83 {
84 IfxCcu6_initCc61InPinWithPadLevel(cc61In, pins->cc6xInputMode, pins->pinDriver);
85 }
86
87 IfxCcu6_Cc62in_In *cc62In = pins->cc62In;
88
89 if (cc62In != NULL_PTR)
90 {
91 IfxCcu6_initCc62InPinWithPadLevel(cc62In, pins->cc6xInputMode, pins->pinDriver);
92 }
93
94 if (channelConfig->multiInputCaptureEnabled)
95 {
96 IfxCcu6_Ccpos0_In *ccpos0 = pins->ccpos0;
97
98 if (ccpos0 != NULL_PTR)
99 {
100 IfxCcu6_initCcpos0PinWithPadLevel(ccpos0, pins->ccposxInputMode, pins->pinDriver);
101 }
102
103 IfxCcu6_Ccpos1_In *ccpos1 = pins->ccpos1;
104
105 if (ccpos1 != NULL_PTR)
106 {
107 IfxCcu6_initCcpos1PinWithPadLevel(ccpos1, pins->ccposxInputMode, pins->pinDriver);
108 }
109
110 IfxCcu6_Ccpos2_In *ccpos2 = pins->ccpos2;
111
112 if (ccpos2 != NULL_PTR)
113 {
114 IfxCcu6_initCcpos2PinWithPadLevel(ccpos2, pins->ccposxInputMode, pins->pinDriver);
115 }
116 }
117
118 IfxCcu6_T12hr_In *t12hr = pins->t12hr;
119
120 if (t12hr != NULL_PTR)
121 {
122 IfxCcu6_initT12hrPinWithPadLevel(t12hr, pins->t1xhrInputMode, pins->pinDriver);
123 }
124
125 IfxCcu6_T13hr_In *t13hr = pins->t13hr;
126
127 if (t13hr != NULL_PTR)
128 {
129 IfxCcu6_initT13hrPinWithPadLevel(t13hr, pins->t1xhrInputMode, pins->pinDriver);
130 }
131 }
132
133 /* -- interrupt initialisation -- */
134
135 if (channelConfig->interrupt1.priority > 0)
136 {
137 IfxCcu6_enableInterrupt(channelConfig->ccu6, channelConfig->interrupt1.source);
138 IfxCcu6_routeInterruptNode(channelConfig->ccu6, channelConfig->interrupt1.source, channelConfig->interrupt1.serviceRequest);
139
140 volatile Ifx_SRC_SRCR *src;
141 src = IfxCcu6_getSrcAddress(channelConfig->ccu6, channelConfig->interrupt1.serviceRequest);
142 IfxSrc_init(src, channelConfig->interrupt1.typeOfService, channelConfig->interrupt1.priority);
143 IfxSrc_enable(src);
144 }
145
146 if (channelConfig->interrupt2.priority > 0)
147 {
148 IfxCcu6_enableInterrupt(channelConfig->ccu6, channelConfig->interrupt2.source);
149 IfxCcu6_routeInterruptNode(channelConfig->ccu6, channelConfig->interrupt2.source, channelConfig->interrupt2.serviceRequest);
150
151 volatile Ifx_SRC_SRCR *src;
152 src = IfxCcu6_getSrcAddress(channelConfig->ccu6, channelConfig->interrupt2.serviceRequest);
153 IfxSrc_init(src, channelConfig->interrupt2.typeOfService, channelConfig->interrupt2.priority);
154 IfxSrc_enable(src);
155 }
156
157 if (channelConfig->interrupt3.priority > 0)
158 {
159 IfxCcu6_enableInterrupt(channelConfig->ccu6, channelConfig->interrupt3.source);
160 IfxCcu6_routeInterruptNode(channelConfig->ccu6, channelConfig->interrupt3.source, channelConfig->interrupt3.serviceRequest);
161
162 volatile Ifx_SRC_SRCR *src;
163 src = IfxCcu6_getSrcAddress(channelConfig->ccu6, channelConfig->interrupt3.serviceRequest);
164 IfxSrc_init(src, channelConfig->interrupt3.typeOfService, channelConfig->interrupt3.priority);
165 IfxSrc_enable(src);
166 }
167
168 if (channelConfig->interrupt4.priority > 0)
169 {
170 IfxCcu6_enableInterrupt(channelConfig->ccu6, channelConfig->interrupt4.source);
171 IfxCcu6_routeInterruptNode(channelConfig->ccu6, channelConfig->interrupt4.source, channelConfig->interrupt4.serviceRequest);
172
173 volatile Ifx_SRC_SRCR *src;
174 src = IfxCcu6_getSrcAddress(channelConfig->ccu6, channelConfig->interrupt4.serviceRequest);
175 IfxSrc_init(src, channelConfig->interrupt4.typeOfService, channelConfig->interrupt4.priority);
176 IfxSrc_enable(src);
177 }
178
179 channel->trigger = channelConfig->trigger;
180 channel->channelId = channelConfig->channelId;
181 channel->channelMode = channelConfig->channelMode;
182
183 #if IFX_CFG_USE_STANDARD_INTERFACE
184 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (uint32)icu == ((uint32)&icu->base));
185 icu->base.functions.startCapture = (Icu_StartCapture) & IfxCcu6_Icu_startCapture;
186 icu->base.functions.stopCapture = (Icu_StopCapture) & IfxCcu6_Icu_stopCapture;
187 icu->base.functions.getTimeStamp = (Icu_GetTimeStamp) & IfxCcu6_Icu_getTimeStamp;
188 #endif
189 }
190
191
192 void IfxCcu6_Icu_initChannelConfig(IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
193 {
194 channelConfig->ccu6 = ccu6;
195
196 channelConfig->channelId = IfxCcu6_T12Channel_0; // default channel 0
197 channelConfig->channelMode = IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising; // default CC6xIN rising edge
198
199 channelConfig->interrupt1.source = IfxCcu6_InterruptSource_cc60RisingEdge;
200 channelConfig->interrupt1.serviceRequest = IfxCcu6_ServiceRequest_0;
201 channelConfig->interrupt1.priority = 0; // interrupt priority 0
202 channelConfig->interrupt1.typeOfService = IfxSrc_Tos_cpu0; // type of service CPU0
203
204 channelConfig->interrupt2.source = IfxCcu6_InterruptSource_cc60FallingEdge;
205 channelConfig->interrupt2.serviceRequest = IfxCcu6_ServiceRequest_1;
206 channelConfig->interrupt2.priority = 0; // interrupt priority 0
207 channelConfig->interrupt2.typeOfService = IfxSrc_Tos_cpu0; // type of service CPU0
208
209 channelConfig->interrupt3.source = IfxCcu6_InterruptSource_cc61RisingEdge;
210 channelConfig->interrupt3.serviceRequest = IfxCcu6_ServiceRequest_2;
211 channelConfig->interrupt3.priority = 0; // interrupt priority 0
212 channelConfig->interrupt3.typeOfService = IfxSrc_Tos_cpu0; // type of service CPU0
213
214 channelConfig->interrupt4.source = IfxCcu6_InterruptSource_trap;
215 channelConfig->interrupt4.serviceRequest = IfxCcu6_ServiceRequest_3;
216 channelConfig->interrupt4.priority = 0; // interrupt priority 0
217 channelConfig->interrupt4.typeOfService = IfxSrc_Tos_cpu0; // type of service CPU0
218
219 channelConfig->trigger.extInputTrigger = channelConfig->timer.trigger.t12ExtInputTrigger;
220 channelConfig->trigger.extInputTriggerMode = channelConfig->timer.trigger.extInputTriggerMode;
221
222 channelConfig->pins = NULL_PTR;
223
224 channelConfig->multiInputCaptureEnabled = FALSE;
225 }
226
227
228 void IfxCcu6_Icu_initModule(IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
229 {
230 Ifx_CCU6 *ccu6SFR = config->ccu6; // pointer to CCU6 registers
231 icu->ccu6 = ccu6SFR; // adding register pointer to module handler
232
233 /* -- hardware module initialisation -- */
234
235 // enable module if it hasn't been enabled by any other interface //
236 if (IfxCcu6_isModuleEnabled(ccu6SFR) == FALSE)
237 {
238 IfxCcu6_enableModule(ccu6SFR);
239 }
240
241 /* -- timer initialisation -- */
242
243 // enable Timer12 if it hasn't been enabled by any other interface //
244 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t12) == FALSE)
245 {
246 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t12);
247 }
248
249 // clock initialization //
250
251 Ifx_TimerValue period = config->period;
252
253 if (config->clock.extClockEnabled) // if external source is selected as reference
254 {
255 // input signal selection
256 if (config->clock.extClockInput != NULL_PTR)
257 {
258 IfxCcu6_setT12InputSignal(config->ccu6, config->clock.extClockInput);
259 }
260
261 // counting input mode selection
262 IfxCcu6_setCountingInputMode(ccu6SFR, IfxCcu6_TimerId_t12, config->clock.countingInputMode);
263
264 // countining mode selection
265 IfxCcu6_setT12CountMode(ccu6SFR, config->countMode);
266
267 // period selection for center aligned mode
268 if (config->countMode == IfxCcu6_T12CountMode_centerAligned)
269 {
270 period = (period / 2) - 1;
271 }
272
273 // period setting
274 IfxCcu6_setT12PeriodValue(ccu6SFR, (uint16)period);
275
276 // frequency is meaningless here : set to 0
277 icu->captureFrequency = 0;
278 }
279 else // if internal clock is selected as reference
280 {
281 // in case of in sync with T13, T12 runs at same frequency as T13
282 icu->captureFrequency = IfxCcu6_setT12Frequency(ccu6SFR, config->frequency, period, config->countMode);
283 }
284
285 // counter initialisation //
286
287 IfxCcu6_setT12CounterValue(ccu6SFR, config->counterValue);
288 }
289
290
291 void IfxCcu6_Icu_initModuleConfig(IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
292 {
293 config->ccu6 = ccu6;
294
295 config->frequency = 400000;
296 config->period = 0xFFFE; /* max(uint16) - 1 */
297
298 config->clock.extClockEnabled = FALSE;
299 config->clock.extClockInput = NULL_PTR;
300 config->clock.countingInputMode = IfxCcu6_CountingInputMode_internal;
301
302 config->countMode = IfxCcu6_T12CountMode_edgeAligned;
303 config->counterValue = 0;
304 }
305
306
307 void IfxCcu6_Icu_startCapture(IfxCcu6_Icu_Channel *channel)
308 {
309 if (IfxCcu6_getTimerRunStatus(channel->ccu6, IfxCcu6_TimerId_t12) != IfxCcu6_TimerRunStatus_running)
310 {
311 // enable shadow transfer
312 IfxCcu6_enableShadowTransfer(channel->ccu6, TRUE, FALSE);
313
314 // start the timer
315 if (channel->trigger.extInputTrigger != NULL_PTR)
316 {
317 // external input setting
318 IfxCcu6_setExternalRunMode(channel->ccu6, IfxCcu6_TimerId_t12, channel->trigger.extInputTriggerMode);
319 IfxCcu6_setT12InputSignal(channel->ccu6, channel->trigger.extInputTrigger);
320 }
321 else
322 {
323 // internal start
324 IfxCcu6_startTimer(channel->ccu6, TRUE, FALSE);
325 }
326 }
327
328 // enable capture mode
329 IfxCcu6_setT12ChannelMode(channel->ccu6, channel->channelId, channel->channelMode);
330 }
331
332
333 void IfxCcu6_Icu_stopCapture(IfxCcu6_Icu_Channel *channel)
334 {
335 // disable shadow transfer
336 IfxCcu6_disableShadowTransfer(channel->ccu6, TRUE, FALSE);
337
338 // disable capture mode
339 IfxCcu6_setT12ChannelMode(channel->ccu6, channel->channelId, IfxCcu6_T12ChannelMode_off);
340
341 // remove the external input
342 IfxCcu6_setExternalRunMode(channel->ccu6, IfxCcu6_TimerId_t12, IfxCcu6_ExternalTriggerMode_disable);
343
344 // stop the timer
345 IfxCcu6_stopTimer(channel->ccu6, TRUE, FALSE);
346 }
IfxCcu6_Cc60in_In
CC60IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:56
IfxCcu6_Cc61in_In
CC61IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:64
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2150
IfxCcu6_Cc62in_In
CC62IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:72
IfxCcu6_ServiceRequest_3
Service request output SR3.
Definition: IfxCcu6.h:235
IfxCcu6_Icu_Channel::channelId
IfxCcu6_T12Channel channelId
Capture compare channel of the Timer12.
Definition: IfxCcu6_Icu.h:309
IfxCcu6_ExternalTriggerMode_disable
The external setting of T1xR is disabled.
Definition: IfxCcu6.h:151
IfxCcu6_Icu_TriggerConfig::extInputTrigger
IfxCcu6_T12hr_In * extInputTrigger
External input signal selection for timer.
Definition: IfxCcu6_Icu.h:286
IfxCcu6_initCc60InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc60InPinWithPadLevel(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC60 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1737
IfxCcu6_Icu_ChannelConfig::interrupt3
IfxCcu6_Icu_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_Icu.h:323
IfxCcu6_setExternalRunMode
IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6.h:1984
IfxCcu6_Icu_ChannelConfig
Configuration structure of the channel.
Definition: IfxCcu6_Icu.h:315
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:237
IfxCcu6_Icu_Pins::ccposxInputMode
IfxPort_InputMode ccposxInputMode
The CCPOSx pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:275
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxCcu6_Icu_Channel::channelMode
IfxCcu6_T12ChannelMode channelMode
The operating mode for the T12 channel.
Definition: IfxCcu6_Icu.h:310
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:88
IfxCcu6_Icu_Config::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_Icu.h:339
IfxCcu6_initCcpos0PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos0PinWithPadLevel(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS0 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1803
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:299
IfxCcu6_Icu_ChannelConfig::pins
IfxCcu6_Icu_Pins * pins
Structure for capture input pins.
Definition: IfxCcu6_Icu.h:326
IfxCcu6_Icu_ChannelConfig::interrupt2
IfxCcu6_Icu_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_Icu.h:322
IfxCcu6_getCaptureShadowRegisterValue
uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel.
Definition: IfxCcu6.c:196
IfxCcu6_Icu_Channel
Channel handle.
Definition: IfxCcu6_Icu.h:304
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:197
IfxCcu6_enableTimer
IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed.
Definition: IfxCcu6.h:1626
IfxCcu6_Icu_Channel::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_Icu.h:307
IfxCcu6_Timer_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External input signal selection for timer 12.
Definition: IfxCcu6_Timer.h:272
IfxCcu6_setT12ChannelMode
IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels.
Definition: IfxCcu6.h:2071
IfxCcu6_Icu_Config::period
Ifx_TimerValue period
PWM period in ticks.
Definition: IfxCcu6_Icu.h:337
IfxCcu6_Icu_ChannelConfig::interrupt4
IfxCcu6_Icu_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_Icu.h:324
IfxCcu6_Icu_Pins::cc62In
IFX_CONST IfxCcu6_Cc62in_In * cc62In
CC62 input signal.
Definition: IfxCcu6_Icu.h:270
IfxCcu6_InterruptSource_cc60RisingEdge
Capture compare match rising edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:181
IfxCcu6_Icu_ChannelConfig::multiInputCaptureEnabled
boolean multiInputCaptureEnabled
Choice of multi input capture.
Definition: IfxCcu6_Icu.h:327
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCcu6_Icu_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:278
IfxCcu6_ServiceRequest_2
Service request output SR2.
Definition: IfxCcu6.h:234
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxCcu6_InterruptSource_cc60FallingEdge
Capture compare match falling edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:183
IfxCcu6_Timer::trigger
IfxCcu6_Timer_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_Timer.h:298
IfxCcu6_Icu_Clock::extClockInput
IfxCcu6_T12hr_In * extClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_Icu.h:250
IfxCcu6_Icu_initChannelConfig
void IfxCcu6_Icu_initChannelConfig(IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
Fills the channel config structure with default values.
Definition: IfxCcu6_Icu.c:192
IfxCcu6_Icu_initChannel
void IfxCcu6_Icu_initChannel(IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
Initialises the channel.
Definition: IfxCcu6_Icu.c:63
IfxCcu6_routeInterruptNode
void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:283
IfxCcu6_Icu_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_Icu.h:276
IfxCcu6_T12CountMode_centerAligned
T12 counts down after detecting a period-match and counts up after detecting a one-match.
Definition: IfxCcu6.h:301
IfxCcu6_Icu_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_Icu.h:277
Icu_StartCapture
void(* Icu_StartCapture)(Icu *handle)
Definition: Icu.h:51
IfxCcu6_initCc61InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc61InPinWithPadLevel(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC61 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1759
IfxCcu6_Icu_Config
Configuration structure of the module.
Definition: IfxCcu6_Icu.h:333
IfxCcu6_InterruptSource_cc61RisingEdge
Capture compare match rising edge interrupt enable for channel CC61.
Definition: IfxCcu6.h:185
IfxCcu6_getTimerAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability
Definition: IfxCcu6.h:1715
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu6_setT12CounterValue
IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12.
Definition: IfxCcu6.h:2085
IfxCcu6_setT12Frequency
float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:377
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1603
IfxCcu6_Icu_Pins::cc60In
IFX_CONST IfxCcu6_Cc60in_In * cc60In
CC60 input signal.
Definition: IfxCcu6_Icu.h:268
IfxCcu6_Icu
Module handle.
Definition: IfxCcu6_Icu.h:296
IfxCcu6_Icu_Config::frequency
float32 frequency
Specify expected PWM frequency in Hertz.
Definition: IfxCcu6_Icu.h:336
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:80
IfxCcu6_Icu_Config::clock
IfxCcu6_Icu_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_Icu.h:338
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1560
IfxCcu6_Icu_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T12HR that can set the run bit T12R by HW.
Definition: IfxCcu6_Icu.h:287
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:336
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2079
IfxCcu6_Icu_Pins::ccpos1
IFX_CONST IfxCcu6_Ccpos1_In * ccpos1
CCPOS2 input signal.
Definition: IfxCcu6_Icu.h:272
IfxCcu6_CountingInputMode_internal
The T1x prescaler generates the counting events, Bit TCTR4.T1xCNT is not taken into account...
Definition: IfxCcu6.h:126
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1914
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising
CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:272
IfxCcu6_T12ChannelMode_off
Capture/Compare modes switched off.
Definition: IfxCcu6.h:269
IfxCcu6_Icu.h
CCU6 ICU details.
IfxCcu6_initT13hrPinWithPadLevel
IFX_INLINE void IfxCcu6_initT13hrPinWithPadLevel(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T13HR pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1906
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxCcu6_Icu_getTimeStamp
uint32 IfxCcu6_Icu_getTimeStamp(IfxCcu6_Icu_Channel *channel)
Returns the cuurent value stored in the Compare Shadow register (current time stamp) ...
Definition: IfxCcu6_Icu.c:53
IfxCcu6_Icu_Clock::extClockEnabled
boolean extClockEnabled
external clock enable / disable selection
Definition: IfxCcu6_Icu.h:249
IfxCcu6_Icu_Pins::ccpos0
IFX_CONST IfxCcu6_Ccpos0_In * ccpos0
CCPOS0 input signal.
Definition: IfxCcu6_Icu.h:271
IfxCcu6_Icu_stopCapture
void IfxCcu6_Icu_stopCapture(IfxCcu6_Icu_Channel *channel)
Stops the input capture.
Definition: IfxCcu6_Icu.c:333
IfxCcu6_setCountingInputMode
IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13).
Definition: IfxCcu6.h:1958
IfxCcu6_Icu_Channel::trigger
IfxCcu6_Icu_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_Icu.h:308
IfxCcu6_Icu_initModule
void IfxCcu6_Icu_initModule(IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_Icu.c:228
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_initCcpos2PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos2PinWithPadLevel(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS2 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1833
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_Icu_Pins::pinDriver
IfxPort_PadDriver pinDriver
Pad Driver.
Definition: IfxCcu6_Icu.h:279
IfxCcu6_Icu_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_Icu.h:258
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Icu_StopCapture
void(* Icu_StopCapture)(Icu *handle)
Definition: Icu.h:52
IfxCcu6_Icu_initModuleConfig
void IfxCcu6_Icu_initModuleConfig(IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_Icu.c:291
IfxCcu6_Icu_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_Icu.h:261
IfxCcu6_initCc62InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc62InPinWithPadLevel(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC62 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1781
IfxCcu6_T12Channel_0
T12 channel CC60.
Definition: IfxCcu6.h:260
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:233
IfxCcu6_Icu_ChannelConfig::interrupt1
IfxCcu6_Icu_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_Icu.h:321
IfxCcu6_Icu_Pins::ccpos2
IFX_CONST IfxCcu6_Ccpos2_In * ccpos2
CCPOS2 input signal.
Definition: IfxCcu6_Icu.h:273
IfxCcu6_Icu_Pins::cc6xInputMode
IfxPort_InputMode cc6xInputMode
The CC6x pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:274
IfxCcu6_setT12InputSignal
void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:426
IfxCcu6_Icu_Config::counterValue
uint16 counterValue
16-bit counter value of Timer12
Definition: IfxCcu6_Icu.h:340
IfxCcu6_TimerRunStatus_running
Timer T1x is running.
Definition: IfxCcu6.h:375
IfxCcu6_disableShadowTransfer
IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1478
IfxCcu6_Timer_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6_Timer.h:274
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:96
IfxCcu6_initT12hrPinWithPadLevel
IFX_INLINE void IfxCcu6_initT12hrPinWithPadLevel(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T12HR pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1891
IfxCcu6_Icu_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_Icu.h:260
IfxCcu6_getTimerRunStatus
IFX_INLINE IfxCcu6_TimerRunStatus IfxCcu6_getTimerRunStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) run status.
Definition: IfxCcu6.h:1722
IfxCcu6_Icu_ChannelConfig::timer
IfxCcu6_Timer timer
Timer handle.
Definition: IfxCcu6_Icu.h:328
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2091
IfxCcu6_Icu_Pins::cc61In
IFX_CONST IfxCcu6_Cc61in_In * cc61In
CC61 input signal.
Definition: IfxCcu6_Icu.h:269
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2140
TRUE
#define TRUE
Definition: Platform_Types.h:90
Icu_GetTimeStamp
void(* Icu_GetTimeStamp)(Icu *handle)
Definition: Icu.h:53
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxCcu6_initCcpos1PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos1PinWithPadLevel(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS1 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1818
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:145
IfxCcu6_Icu_Clock::countingInputMode
IfxCcu6_CountingInputMode countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_Icu.h:251
IfxCcu6_Icu_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_Icu.h:259
IfxCcu6_Icu_Pins
Structure for capture input pins.
Definition: IfxCcu6_Icu.h:266
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:232
IfxCcu6_Icu::captureFrequency
float32 captureFrequency
Configured CCU6 capture frequency ( set to 0 for external counting mode)
Definition: IfxCcu6_Icu.h:299
IfxCcu6_Icu_startCapture
void IfxCcu6_Icu_startCapture(IfxCcu6_Icu_Channel *channel)
Starts the input capture.
Definition: IfxCcu6_Icu.c:307


iLLD_TC26B: IfxCcu6_Icu.h Source File

  • Ccu6
  • Icu
IfxCcu6_Icu.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_Icu.h
3 * \brief CCU6 ICU details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Ccu6_Icu_Usage How to use the CCU6 ICU Interface driver?
43 * \ingroup IfxLld_Ccu6_Icu
44 *
45 * The ICU interface driver provides a default CCU6 configuration for capturing the input from the selected channel
46 *
47 * User can select the various configuration options that hardware allows
48 *
49 * In the following sections it will be described, how to integrate the driver into the application framework.
50 *
51 *
52 * \section IfxLld_Ccu6_Icu_Preparation Preparation
53 *
54 *
55 * \subsection IfxLld_Ccu6_Icu_Include Include Files
56 *
57 * Include following header file into your C code:
58 *
59 * \code
60 * #include <Ccu6/Icu/IfxCcu6_Icu.h>
61 * \endcode
62 *
63 * \subsection IfxLld_Ccu6_Icu_Variables Variables
64 *
65 * Declare the ICU handle and channel handle as global variables in your C code:
66 *
67 * \code
68 * // used globally
69 * static IfxCcu6_Icu icu;
70 * static IfxCcu6_IcuChannel icuChannel;
71 * \endcode
72 *
73 * \subsection IfxLld_Ccu6_Icu_Interrupt Interrupt Handler Installation
74 *
75 * See also \ref IfxLld_Cpu_Irq_Usage
76 *
77 * Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
78 *
79 * \code
80 * // priorities are normally defined in Ifx_IntPrioDef.h
81 * #define IFX_INTPRIO_CCU6 1
82 * \endcode
83 *
84 * Add the interrupt service routine to your C code.
85 *
86 * \code
87 * IFX_INTERRUPT(ccu60ISR_Icu, 0, IFX_INTPRIO_CCU6)
88 * {
89 * //user code
90 * }
91 * \endcode
92 *
93 * Finally install the interrupt handlers in your initialisation function:
94 *
95 * \code
96 * // install interrupt handlers
97 * IfxCpu_Irq_installInterruptHandler(&ccu60ISR_Icu, IFX_INTPRIO_CCU6);
98 * IfxCpu_enableInterrupts();
99 * \endcode
100 *
101 * \subsection IfxLld_Ccu6_Icu_Init Module Initialisation
102 *
103 * The module can be initialised in two ways, as a stand alone driver or in conjunction with Timer driver
104 * The module initialisation can be done in the same function. Here an example:
105 *
106 * \code
107 * // ---- when not using inconjunction with Timer driver ---- //
108 * // create configuration
109 * IfxCcu6_Icu_Config icuConfig;
110 * IfxCcu6_Icu_initModuleConfig(&icuConfig, &MODULE_CCU60);
111 *
112 * // configure the frequency of the timer in case of internal start
113 * icuConfig.frequency = 400000;
114 *
115 * // configure the period of the timer
116 * icuConfig.period = 100;
117 *
118 * // configure the clock for internal mode
119 * icuConfig.clock.extClockEnabled = FALSE;
120 * icuConfig.clock.extClockInput = NULL_PTR;
121 * icuConfig.clock.countingInputMode = IfxCcu6_CountingInputMode_internal;
122 *
123 * // configure count operation
124 * icuConfig.countMode = IfxCcu6_T12CountMode_edgeAligned;
125 * icuConfig.counterValue = 0;
126 *
127 * // initialize the module
128 * IfxCcu6_Icu_initModule(&icu, &icuConfig);
129 * // -------------------------------------------------------- //
130 *
131 * // ---- when not using inconjunction with Timer driver ---- //
132 * // after initialising the timer
133 * IfxCcu6_Timer timer;
134 * IfxCcu6_TimerConfig timerConfig;
135 * IfxCcu6_Timer_initModule(&timer, &timerConfig); // e.g. Timer 12 is specified previously in timerConfig.
136 * // -------------------------------------------------------- //
137 *
138 * // create Icu channel config
139 * IfxCcu6_Icu_channelConfig icuChannelConfig;
140 * IfxCcu6_Icu_initChannelConfig(&icuChannelConfig, &MODULE_CCU60);
141 *
142 * // ---- when using inconjunction with Timer driver ---- //
143 * icuChannelConfig.timer = (Timer*)&timer;
144 * // ---------------------------------------------------- //
145 *
146 * // configure the channel
147 * icuChannelConfig.channelNumber = IfxCcu6_T12Channel_0;
148 * icuChannelConfig.channelMode = IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising;
149 *
150 * // configure the interrupts
151 * icuChannelConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_cc60RisingEdge;
152 * icuChannelConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
153 * icuChannelConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
154 * icuChannelConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
155 *
156 * // ---- when not using inconjunction with Timer driver ---- //
157 * // configure input and output triggers
158 * icuChannelConfig.trigger.extInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
159 * icuChannelConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
160 * // -------------------------------------------------------- //
161 *
162 * // pin configuration, in case of multi input capture mode select the respective CC6xIn and CCPOSxIn pins of the selected channel
163 * const IfxCcu6_Icu_Pins pins = {
164 * IfxCcu60_CC60INA_P02_0_IN, // CC60In pin
165 * NULL, // CC61In pin not used
166 * NULL, // CC62In pin not used
167 * NULL, // CCPOS0In pin not used
168 * NULL, // CCPOS1In pin not used
169 * NULL, // CCPOS2In pin not used
170 * IfxPort_InputMode_pullUp,
171 * IfxPort_InputMode_pullUp
172 * };
173 * IcuConfig.pins = &pins;
174 *
175 * // configure multi input capture mode
176 * icuChannelConfig->multiInputCaptureEnabled = FALSE;
177 *
178 * // initialize the channel
179 * IfxCcu6_Icu_initChannel(&icuChannel, &icuChannelConfig);
180 * \endcode
181 *
182 *
183 * The Icu is ready for use now!
184 *
185 *
186 * \section IfxLld_Ccu6_Icu_Control Control
187 *
188 *
189 * The ICU driver provides simple to use Capture Control functions
190 *
191 * This means: you can start and stop the capture process, and you can also get a time stamp at any point of time during the capture process
192 *
193 * Start Capture
194 *
195 * \code
196 * IfxCcu6_Icu_startCapture(&icuChannel);
197 * \endcode
198 *
199 * Stop Capture
200 *
201 * \code
202 * IfxCcu6_Icu_stopCapture(&icuChannel);
203 * \endcode
204 *
205 * Get time stamp at any point of time during the capture process
206 * (can also be used in ISR)
207 *
208 * \code
209 * // assumed to be declared globally
210 * // uint32 timeStamp[100] = 0;
211 *
212 * // store the time stamp in an array
213 * timeStamp[i] = IfxCcu6_Icu_getTimeStamp(&icuChannel);
214 * \endcode
215 *
216 * \defgroup IfxLld_Ccu6_Icu ICU Interface driver
217 * \ingroup IfxLld_Ccu6
218 * \defgroup IfxLld_Ccu6_Icu_DataStructures Data Structures
219 * \ingroup IfxLld_Ccu6_Icu
220 * \defgroup IfxLld_Ccu6_Icu_Module_Initialize_Functions Module Initialize Functions
221 * \ingroup IfxLld_Ccu6_Icu
222 * \defgroup IfxLld_Ccu6_Icu_Capture_Control_Functions Capture Control Functions
223 * \ingroup IfxLld_Ccu6_Icu
224 * \defgroup IfxLld_Ccu6_Icu_Channel_Initialize_Functions Channel Initialize Functions
225 * \ingroup IfxLld_Ccu6_Icu
226 */
227
228 #ifndef IFXCCU6_ICU_H
229 #define IFXCCU6_ICU_H 1
230
231 /******************************************************************************/
232 /*----------------------------------Includes----------------------------------*/
233 /******************************************************************************/
234
235 #include "Ccu6/Std/IfxCcu6.h"
236 #include "If/Ccu6If/Icu.h"
237 #include "Ccu6/Timer/IfxCcu6_Timer.h"
238
239 /******************************************************************************/
240 /*-----------------------------Data Structures--------------------------------*/
241 /******************************************************************************/
242
243 /** \addtogroup IfxLld_Ccu6_Icu_DataStructures
244 * \{ */
245 /** \brief Structure for clock configuration
246 */
247 typedef struct
248 {
249 boolean extClockEnabled; /**< \brief external clock enable / disable selection */
250 IfxCcu6_T12hr_In *extClockInput; /**< \brief External input signal selection for timer 12 */
251 IfxCcu6_CountingInputMode countingInputMode; /**< \brief Input event leading to a counting action of the timer T12 */
252 } IfxCcu6_Icu_Clock;
253
254 /** \brief Structure for interrupt configuration
255 */
256 typedef struct
257 {
258 IfxCcu6_InterruptSource source; /**< \brief Interrupt source selection */
259 IfxCcu6_ServiceRequest serviceRequest; /**< \brief Selection of service request outputs */
260 uint16 priority; /**< \brief Interrupt priority */
261 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
262 } IfxCcu6_Icu_InterruptConfig;
263
264 /** \brief Structure for capture input pins
265 */
266 typedef struct
267 {
268 IFX_CONST IfxCcu6_Cc60in_In *cc60In; /**< \brief CC60 input signal */
269 IFX_CONST IfxCcu6_Cc61in_In *cc61In; /**< \brief CC61 input signal */
270 IFX_CONST IfxCcu6_Cc62in_In *cc62In; /**< \brief CC62 input signal */
271 IFX_CONST IfxCcu6_Ccpos0_In *ccpos0; /**< \brief CCPOS0 input signal */
272 IFX_CONST IfxCcu6_Ccpos1_In *ccpos1; /**< \brief CCPOS2 input signal */
273 IFX_CONST IfxCcu6_Ccpos2_In *ccpos2; /**< \brief CCPOS2 input signal */
274 IfxPort_InputMode cc6xInputMode; /**< \brief The CC6x pin input mode which should be configured */
275 IfxPort_InputMode ccposxInputMode; /**< \brief The CCPOSx pin input mode which should be configured */
276 IFX_CONST IfxCcu6_T12hr_In *t12hr; /**< \brief T12HR input signal */
277 IFX_CONST IfxCcu6_T13hr_In *t13hr; /**< \brief T13HR input signal */
278 IfxPort_InputMode t1xhrInputMode; /**< \brief The T1xHR pin input mode which should be configured */
279 IfxPort_PadDriver pinDriver; /**< \brief Pad Driver */
280 } IfxCcu6_Icu_Pins;
281
282 /** \brief Configuration structure for external triggers
283 */
284 typedef struct
285 {
286 IfxCcu6_T12hr_In *extInputTrigger; /**< \brief External input signal selection for timer */
287 IfxCcu6_ExternalTriggerMode extInputTriggerMode; /**< \brief Event of signal T12HR that can set the run bit T12R by HW */
288 } IfxCcu6_Icu_TriggerConfig;
289
290 /** \} */
291
292 /** \addtogroup IfxLld_Ccu6_Icu_DataStructures
293 * \{ */
294 /** \brief Module handle
295 */
296 typedef struct
297 {
298 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
299 float32 captureFrequency; /**< \brief Configured CCU6 capture frequency ( set to 0 for external counting mode) */
300 } IfxCcu6_Icu;
301
302 /** \brief Channel handle
303 */
304 typedef struct
305 {
306 Icu base; /**< \brief Base ICU object */
307 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
308 IfxCcu6_Icu_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
309 IfxCcu6_T12Channel channelId; /**< \brief Capture compare channel of the Timer12 */
310 IfxCcu6_T12ChannelMode channelMode; /**< \brief The operating mode for the T12 channel */
311 } IfxCcu6_Icu_Channel;
312
313 /** \brief Configuration structure of the channel
314 */
315 typedef struct
316 {
317 Icu_Config base; /**< \brief Base configuration */
318 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
319 IfxCcu6_T12Channel channelId; /**< \brief Capture compare channel of the Timer12 */
320 IfxCcu6_T12ChannelMode channelMode; /**< \brief The operating mode for the T12 channel */
321 IfxCcu6_Icu_InterruptConfig interrupt1; /**< \brief Structure for first interrupt configuration */
322 IfxCcu6_Icu_InterruptConfig interrupt2; /**< \brief Structure for second interrupt configuration */
323 IfxCcu6_Icu_InterruptConfig interrupt3; /**< \brief Structure for third interrupt configuration */
324 IfxCcu6_Icu_InterruptConfig interrupt4; /**< \brief Structure for fourth interrupt configuration */
325 IfxCcu6_Icu_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
326 IfxCcu6_Icu_Pins *pins; /**< \brief Structure for capture input pins */
327 boolean multiInputCaptureEnabled; /**< \brief Choice of multi input capture */
328 IfxCcu6_Timer timer; /**< \brief Timer handle */
329 } IfxCcu6_Icu_ChannelConfig;
330
331 /** \brief Configuration structure of the module
332 */
333 typedef struct
334 {
335 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
336 float32 frequency; /**< \brief Specify expected PWM frequency in Hertz */
337 Ifx_TimerValue period; /**< \brief PWM period in ticks */
338 IfxCcu6_Icu_Clock clock; /**< \brief Structure for clock configuration */
339 IfxCcu6_T12CountMode countMode; /**< \brief Operating mode of Timer 12 */
340 uint16 counterValue; /**< \brief 16-bit counter value of Timer12 */
341 } IfxCcu6_Icu_Config;
342
343 /** \} */
344
345 /** \addtogroup IfxLld_Ccu6_Icu_Module_Initialize_Functions
346 * \{ */
347
348 /******************************************************************************/
349 /*-------------------------Global Function Prototypes-------------------------*/
350 /******************************************************************************/
351
352 /** \brief Initialises the module with default configuration
353 * \param icu Module handle
354 * \param config Configuration structure of the module
355 * \return None
356 *
357 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
358 *
359 */
360 IFX_EXTERN void IfxCcu6_Icu_initModule(IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config);
361
362 /** \brief Fills the config structure with default values
363 * \param config Configuration structure of the module
364 * \param ccu6 Pointer to the base of CCU6 registers
365 * \return None
366 *
367 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
368 *
369 */
370 IFX_EXTERN void IfxCcu6_Icu_initModuleConfig(IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6);
371
372 /** \} */
373
374 /** \addtogroup IfxLld_Ccu6_Icu_Capture_Control_Functions
375 * \{ */
376
377 /******************************************************************************/
378 /*-------------------------Global Function Prototypes-------------------------*/
379 /******************************************************************************/
380
381 /** \brief Returns the cuurent value stored in the Compare Shadow register (current time stamp)
382 * \param channel Channel handle
383 * \return timeStamp (cuurent CC6xSR register value)
384 *
385 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
386 *
387 */
388 IFX_EXTERN uint32 IfxCcu6_Icu_getTimeStamp(IfxCcu6_Icu_Channel *channel);
389
390 /** \brief Starts the input capture
391 * \param channel Channel handle
392 * \return None
393 *
394 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
395 *
396 */
397 IFX_EXTERN void IfxCcu6_Icu_startCapture(IfxCcu6_Icu_Channel *channel);
398
399 /** \brief Stops the input capture
400 * \param channel Channel handle
401 * \return None
402 *
403 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
404 *
405 */
406 IFX_EXTERN void IfxCcu6_Icu_stopCapture(IfxCcu6_Icu_Channel *channel);
407
408 /** \} */
409
410 /** \addtogroup IfxLld_Ccu6_Icu_Channel_Initialize_Functions
411 * \{ */
412
413 /******************************************************************************/
414 /*-------------------------Global Function Prototypes-------------------------*/
415 /******************************************************************************/
416
417 /** \brief Initialises the channel
418 * \param channel Channel handle
419 * \param channelConfig Configuration structure of the channel
420 * \return None
421 *
422 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
423 *
424 */
425 IFX_EXTERN void IfxCcu6_Icu_initChannel(IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig);
426
427 /** \brief Fills the channel config structure with default values
428 * \param channelConfig Configuration structure of the channel
429 * \param ccu6 Pointer to the base of CCU6 registers
430 * \return None
431 *
432 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
433 *
434 */
435 IFX_EXTERN void IfxCcu6_Icu_initChannelConfig(IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6);
436
437 /** \} */
438
439 #endif /* IFXCCU6_ICU_H */
IfxCcu6_Cc60in_In
CC60IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:56
IfxCcu6_Cc61in_In
CC61IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:64
IfxCcu6_Cc62in_In
CC62IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:72
IfxCcu6_Icu_Channel::channelId
IfxCcu6_T12Channel channelId
Capture compare channel of the Timer12.
Definition: IfxCcu6_Icu.h:309
IfxCcu6_Icu_TriggerConfig::extInputTrigger
IfxCcu6_T12hr_In * extInputTrigger
External input signal selection for timer.
Definition: IfxCcu6_Icu.h:286
Icu.h
ICU interface.
IfxCcu6_Icu_ChannelConfig::interrupt3
IfxCcu6_Icu_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_Icu.h:323
IfxCcu6_Icu_ChannelConfig
Configuration structure of the channel.
Definition: IfxCcu6_Icu.h:315
Icu_Config
Configuration structure of the Icu interface.
Definition: Icu.h:72
IfxCcu6_Icu_Pins::ccposxInputMode
IfxPort_InputMode ccposxInputMode
The CCPOSx pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:275
IfxCcu6_Icu_Channel::channelMode
IfxCcu6_T12ChannelMode channelMode
The operating mode for the T12 channel.
Definition: IfxCcu6_Icu.h:310
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:88
IfxCcu6_Icu_Config::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_Icu.h:339
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:179
IfxCcu6_Timer.h
CCU6 TIMER details.
IfxCcu6_Icu_ChannelConfig::pins
IfxCcu6_Icu_Pins * pins
Structure for capture input pins.
Definition: IfxCcu6_Icu.h:326
IfxCcu6_Icu_ChannelConfig::interrupt2
IfxCcu6_Icu_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_Icu.h:322
IfxCcu6_Icu_Channel
Channel handle.
Definition: IfxCcu6_Icu.h:304
IfxCcu6_Icu::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_Icu.h:298
IfxCcu6_Icu_Config::period
Ifx_TimerValue period
PWM period in ticks.
Definition: IfxCcu6_Icu.h:337
IfxCcu6_Icu_Channel::base
Icu base
Base ICU object.
Definition: IfxCcu6_Icu.h:306
IfxCcu6_Icu_ChannelConfig::interrupt4
IfxCcu6_Icu_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_Icu.h:324
IfxCcu6_Icu_Pins::cc62In
IFX_CONST IfxCcu6_Cc62in_In * cc62In
CC62 input signal.
Definition: IfxCcu6_Icu.h:270
IfxCcu6_Icu_ChannelConfig::multiInputCaptureEnabled
boolean multiInputCaptureEnabled
Choice of multi input capture.
Definition: IfxCcu6_Icu.h:327
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCcu6_Icu_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:278
float32
float float32
Definition: Platform_Types.h:170
IfxCcu6_Icu_Clock::extClockInput
IfxCcu6_T12hr_In * extClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_Icu.h:250
IfxCcu6_Icu_initChannelConfig
IFX_EXTERN void IfxCcu6_Icu_initChannelConfig(IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
Fills the channel config structure with default values.
Definition: IfxCcu6_Icu.c:192
IfxCcu6_Icu_initChannel
IFX_EXTERN void IfxCcu6_Icu_initChannel(IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
Initialises the channel.
Definition: IfxCcu6_Icu.c:63
IfxCcu6_Icu_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_Icu.h:276
IfxCcu6_Icu_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_Icu.h:277
IfxCcu6_Icu_Config
Configuration structure of the module.
Definition: IfxCcu6_Icu.h:333
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCcu6_Timer
Module handle.
Definition: IfxCcu6_Timer.h:293
IfxCcu6_Icu_Pins::cc60In
IFX_CONST IfxCcu6_Cc60in_In * cc60In
CC60 input signal.
Definition: IfxCcu6_Icu.h:268
IfxCcu6_Icu
Module handle.
Definition: IfxCcu6_Icu.h:296
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCcu6_Icu_Config::frequency
float32 frequency
Specify expected PWM frequency in Hertz.
Definition: IfxCcu6_Icu.h:336
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:80
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu6_Icu_Config::clock
IfxCcu6_Icu_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_Icu.h:338
IfxCcu6_Icu_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T12HR that can set the run bit T12R by HW.
Definition: IfxCcu6_Icu.h:287
IfxCcu6_CountingInputMode
IfxCcu6_CountingInputMode
Defines the input event leading to a counting action of the timer (T12 / T13) Definition in Ifx_CCU...
Definition: IfxCcu6.h:124
IfxCcu6_T12Channel
IfxCcu6_T12Channel
Capture compare channel of Timer12.
Definition: IfxCcu6.h:258
IfxCcu6_T12ChannelMode
IfxCcu6_T12ChannelMode
The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x.
Definition: IfxCcu6.h:267
IfxCcu6_Icu_Pins::ccpos1
IFX_CONST IfxCcu6_Ccpos1_In * ccpos1
CCPOS2 input signal.
Definition: IfxCcu6_Icu.h:272
IfxCcu6.h
CCU6 basic functionality.
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:230
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:297
IfxCcu6_Icu_getTimeStamp
IFX_EXTERN uint32 IfxCcu6_Icu_getTimeStamp(IfxCcu6_Icu_Channel *channel)
Returns the cuurent value stored in the Compare Shadow register (current time stamp) ...
Definition: IfxCcu6_Icu.c:53
IfxCcu6_Icu_Clock::extClockEnabled
boolean extClockEnabled
external clock enable / disable selection
Definition: IfxCcu6_Icu.h:249
IfxCcu6_Icu_Pins::ccpos0
IFX_CONST IfxCcu6_Ccpos0_In * ccpos0
CCPOS0 input signal.
Definition: IfxCcu6_Icu.h:271
IfxCcu6_Icu_stopCapture
IFX_EXTERN void IfxCcu6_Icu_stopCapture(IfxCcu6_Icu_Channel *channel)
Stops the input capture.
Definition: IfxCcu6_Icu.c:333
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxCcu6_ExternalTriggerMode
IfxCcu6_ExternalTriggerMode
Defines the event of signal T1xHR that can set the run bit T1xR by HW Definition in Ifx_CCU...
Definition: IfxCcu6.h:149
IfxCcu6_Icu_Channel::trigger
IfxCcu6_Icu_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_Icu.h:308
IfxCcu6_Icu_initModule
IFX_EXTERN void IfxCcu6_Icu_initModule(IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_Icu.c:228
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_Icu_Pins::pinDriver
IfxPort_PadDriver pinDriver
Pad Driver.
Definition: IfxCcu6_Icu.h:279
IfxCcu6_Icu_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_Icu.h:258
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_Icu_initModuleConfig
IFX_EXTERN void IfxCcu6_Icu_initModuleConfig(IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_Icu.c:291
IfxCcu6_Icu_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_Icu.h:261
IfxCcu6_Icu_InterruptConfig
Structure for interrupt configuration.
Definition: IfxCcu6_Icu.h:256
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxCcu6_Icu_ChannelConfig::interrupt1
IfxCcu6_Icu_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_Icu.h:321
IfxCcu6_Icu_TriggerConfig
Configuration structure for external triggers.
Definition: IfxCcu6_Icu.h:284
IfxCcu6_Icu_Pins::ccpos2
IFX_CONST IfxCcu6_Ccpos2_In * ccpos2
CCPOS2 input signal.
Definition: IfxCcu6_Icu.h:273
IfxCcu6_Icu_Pins::cc6xInputMode
IfxPort_InputMode cc6xInputMode
The CC6x pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:274
IfxCcu6_Icu_Config::counterValue
uint16 counterValue
16-bit counter value of Timer12
Definition: IfxCcu6_Icu.h:340
IfxCcu6_Icu_Clock
Structure for clock configuration.
Definition: IfxCcu6_Icu.h:247
Icu_s
Structure of the Icu interface.
Definition: Icu.h:63
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:96
IfxCcu6_Icu_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_Icu.h:260
IfxCcu6_Icu_ChannelConfig::timer
IfxCcu6_Timer timer
Timer handle.
Definition: IfxCcu6_Icu.h:328
IfxCcu6_Icu_Pins::cc61In
IFX_CONST IfxCcu6_Cc61in_In * cc61In
CC61 input signal.
Definition: IfxCcu6_Icu.h:269
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxCcu6_Icu_ChannelConfig::base
Icu_Config base
Base configuration.
Definition: IfxCcu6_Icu.h:317
IfxCcu6_Icu_Clock::countingInputMode
IfxCcu6_CountingInputMode countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_Icu.h:251
IfxCcu6_Icu_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_Icu.h:259
IfxCcu6_Icu_Pins
Structure for capture input pins.
Definition: IfxCcu6_Icu.h:266
IfxCcu6_Icu::captureFrequency
float32 captureFrequency
Configured CCU6 capture frequency ( set to 0 for external counting mode)
Definition: IfxCcu6_Icu.h:299
IfxCcu6_Icu_startCapture
IFX_EXTERN void IfxCcu6_Icu_startCapture(IfxCcu6_Icu_Channel *channel)
Starts the input capture.
Definition: IfxCcu6_Icu.c:307


iLLD_TC26B: IfxCcu6_PinMap.c Source File

  • _PinMap
IfxCcu6_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PinMap.c
3 * \brief CCU6 I/O map
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxCcu6_PinMap.h"
44
45 IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT = {&MODULE_CCU60, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt7};
46 IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT = {&MODULE_CCU60, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt7};
47 IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT = {&MODULE_CCU60, {&MODULE_P11,12}, IfxPort_OutputIdx_alt7};
48 IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT = {&MODULE_CCU60, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt7};
49 IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT = {&MODULE_CCU61, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt7};
50 IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT = {&MODULE_CCU61, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt7};
51 IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT = {&MODULE_CCU61, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt7};
52 IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT = {&MODULE_CCU61, {&MODULE_P33,13}, IfxPort_OutputIdx_alt7};
53 IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN = {&MODULE_CCU60, {&MODULE_P02, 0}, Ifx_RxSel_a};
54 IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN = {&MODULE_CCU60, {&MODULE_P00, 1}, Ifx_RxSel_b};
55 IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_c};
56 IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN = {&MODULE_CCU61, {&MODULE_P00, 1}, Ifx_RxSel_a};
57 IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN = {&MODULE_CCU61, {&MODULE_P02, 0}, Ifx_RxSel_b};
58 IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_c};
59 IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT = {&MODULE_CCU60, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt7};
60 IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT = {&MODULE_CCU60, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt7};
61 IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT = {&MODULE_CCU60, {&MODULE_P11,11}, IfxPort_OutputIdx_alt7};
62 IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT = {&MODULE_CCU60, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt7};
63 IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT = {&MODULE_CCU61, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt7};
64 IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT = {&MODULE_CCU61, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt7};
65 IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT = {&MODULE_CCU61, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt7};
66 IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT = {&MODULE_CCU61, {&MODULE_P33,11}, IfxPort_OutputIdx_alt7};
67 IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN = {&MODULE_CCU60, {&MODULE_P02, 2}, Ifx_RxSel_a};
68 IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN = {&MODULE_CCU60, {&MODULE_P00, 3}, Ifx_RxSel_b};
69 IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_c};
70 IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN = {&MODULE_CCU61, {&MODULE_P00, 3}, Ifx_RxSel_a};
71 IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN = {&MODULE_CCU61, {&MODULE_P02, 2}, Ifx_RxSel_b};
72 IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_c};
73 IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT = {&MODULE_CCU60, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt7};
74 IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT = {&MODULE_CCU60, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt7};
75 IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT = {&MODULE_CCU60, {&MODULE_P11,10}, IfxPort_OutputIdx_alt7};
76 IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT = {&MODULE_CCU60, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt7};
77 IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT = {&MODULE_CCU61, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt7};
78 IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT = {&MODULE_CCU61, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt7};
79 IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT = {&MODULE_CCU61, {&MODULE_P20,10}, IfxPort_OutputIdx_alt7};
80 IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT = {&MODULE_CCU61, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt7};
81 IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN = {&MODULE_CCU60, {&MODULE_P02, 4}, Ifx_RxSel_a};
82 IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN = {&MODULE_CCU60, {&MODULE_P00, 5}, Ifx_RxSel_b};
83 IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_c};
84 IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN = {&MODULE_CCU61, {&MODULE_P00, 5}, Ifx_RxSel_a};
85 IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN = {&MODULE_CCU61, {&MODULE_P02, 4}, Ifx_RxSel_b};
86 IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_c};
87 IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_a};
88 IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN = {&MODULE_CCU60, {&MODULE_P10, 4}, Ifx_RxSel_c};
89 IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN = {&MODULE_CCU60, {&MODULE_P40, 0}, Ifx_RxSel_d};
90 IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_a};
91 IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN = {&MODULE_CCU61, {&MODULE_P33, 7}, Ifx_RxSel_c};
92 IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_a};
93 IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN = {&MODULE_CCU60, {&MODULE_P40, 1}, Ifx_RxSel_b};
94 IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN = {&MODULE_CCU60, {&MODULE_P10, 7}, Ifx_RxSel_c};
95 IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN = {&MODULE_CCU60, {&MODULE_P40, 2}, Ifx_RxSel_d};
96 IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_a};
97 IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN = {&MODULE_CCU61, {&MODULE_P40, 6}, Ifx_RxSel_b};
98 IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN = {&MODULE_CCU61, {&MODULE_P33, 6}, Ifx_RxSel_c};
99 IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN = {&MODULE_CCU61, {&MODULE_P40, 7}, Ifx_RxSel_d};
100 IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_a};
101 IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN = {&MODULE_CCU60, {&MODULE_P40, 3}, Ifx_RxSel_b};
102 IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN = {&MODULE_CCU60, {&MODULE_P10, 8}, Ifx_RxSel_c};
103 IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_a};
104 IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN = {&MODULE_CCU61, {&MODULE_P40, 8}, Ifx_RxSel_b};
105 IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN = {&MODULE_CCU61, {&MODULE_P33, 5}, Ifx_RxSel_c};
106 IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN = {&MODULE_CCU61, {&MODULE_P40, 9}, Ifx_RxSel_d};
107 IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT = {&MODULE_CCU60, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt7};
108 IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT = {&MODULE_CCU60, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt7};
109 IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT = {&MODULE_CCU60, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt7};
110 IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT = {&MODULE_CCU61, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt7};
111 IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT = {&MODULE_CCU61, {&MODULE_P20,11}, IfxPort_OutputIdx_alt7};
112 IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT = {&MODULE_CCU61, {&MODULE_P33,12}, IfxPort_OutputIdx_alt7};
113 IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT = {&MODULE_CCU60, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt7};
114 IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT = {&MODULE_CCU60, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt7};
115 IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT = {&MODULE_CCU60, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt7};
116 IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT = {&MODULE_CCU61, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt7};
117 IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT = {&MODULE_CCU61, {&MODULE_P20,12}, IfxPort_OutputIdx_alt7};
118 IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT = {&MODULE_CCU61, {&MODULE_P33,10}, IfxPort_OutputIdx_alt7};
119 IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT = {&MODULE_CCU60, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt7};
120 IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT = {&MODULE_CCU60, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt7};
121 IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT = {&MODULE_CCU60, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt7};
122 IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT = {&MODULE_CCU61, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt7};
123 IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT = {&MODULE_CCU61, {&MODULE_P20,13}, IfxPort_OutputIdx_alt7};
124 IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT = {&MODULE_CCU61, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt7};
125 IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT = {&MODULE_CCU60, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt7};
126 IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT = {&MODULE_CCU60, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt7};
127 IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT = {&MODULE_CCU60, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt7};
128 IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT = {&MODULE_CCU60, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt7};
129 IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT = {&MODULE_CCU61, {&MODULE_P00,10}, IfxPort_OutputIdx_alt7};
130 IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT = {&MODULE_CCU61, {&MODULE_P00,12}, IfxPort_OutputIdx_alt7};
131 IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT = {&MODULE_CCU61, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt7};
132 IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN = {&MODULE_CCU60, {&MODULE_P00,11}, Ifx_RxSel_a};
133 IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN = {&MODULE_CCU61, {&MODULE_P00, 0}, Ifx_RxSel_a};
134 IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN = {&MODULE_CCU61, {&MODULE_P33, 4}, Ifx_RxSel_c};
135 IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN = {&MODULE_CCU60, {&MODULE_P00, 7}, Ifx_RxSel_b};
136 IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c};
137 IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN = {&MODULE_CCU60, {&MODULE_P00, 0}, Ifx_RxSel_e};
138 IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN = {&MODULE_CCU61, {&MODULE_P02, 6}, Ifx_RxSel_b};
139 IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c};
140 IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN = {&MODULE_CCU61, {&MODULE_P00,11}, Ifx_RxSel_e};
141 IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN = {&MODULE_CCU60, {&MODULE_P00, 8}, Ifx_RxSel_b};
142 IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c};
143 IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN = {&MODULE_CCU61, {&MODULE_P02, 7}, Ifx_RxSel_b};
144 IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c};
145
146
147 const IfxCcu6_Cc60_Out *IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS] = {
148 {
149 &IfxCcu60_CC60_P02_0_OUT,
150 &IfxCcu60_CC60_P02_6_OUT,
151 &IfxCcu60_CC60_P11_12_OUT,
152 &IfxCcu60_CC60_P15_6_OUT
153 },
154 {
155 &IfxCcu61_CC60_P00_1_OUT,
156 &IfxCcu61_CC60_P00_7_OUT,
157 &IfxCcu61_CC60_P20_8_OUT,
158 &IfxCcu61_CC60_P33_13_OUT
159 }
160 };
161
162 const IfxCcu6_Cc60in_In *IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS] = {
163 {
164 &IfxCcu60_CC60INA_P02_0_IN,
165 &IfxCcu60_CC60INB_P00_1_IN,
166 &IfxCcu60_CC60INC_P02_6_IN
167 },
168 {
169 &IfxCcu61_CC60INA_P00_1_IN,
170 &IfxCcu61_CC60INB_P02_0_IN,
171 &IfxCcu61_CC60INC_P00_7_IN
172 }
173 };
174
175 const IfxCcu6_Cc61_Out *IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS] = {
176 {
177 &IfxCcu60_CC61_P02_2_OUT,
178 &IfxCcu60_CC61_P02_7_OUT,
179 &IfxCcu60_CC61_P11_11_OUT,
180 &IfxCcu60_CC61_P15_5_OUT
181 },
182 {
183 &IfxCcu61_CC61_P00_3_OUT,
184 &IfxCcu61_CC61_P00_8_OUT,
185 &IfxCcu61_CC61_P20_9_OUT,
186 &IfxCcu61_CC61_P33_11_OUT
187 }
188 };
189
190 const IfxCcu6_Cc61in_In *IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS] = {
191 {
192 &IfxCcu60_CC61INA_P02_2_IN,
193 &IfxCcu60_CC61INB_P00_3_IN,
194 &IfxCcu60_CC61INC_P02_7_IN
195 },
196 {
197 &IfxCcu61_CC61INA_P00_3_IN,
198 &IfxCcu61_CC61INB_P02_2_IN,
199 &IfxCcu61_CC61INC_P00_8_IN
200 }
201 };
202
203 const IfxCcu6_Cc62_Out *IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS] = {
204 {
205 &IfxCcu60_CC62_P02_4_OUT,
206 &IfxCcu60_CC62_P02_8_OUT,
207 &IfxCcu60_CC62_P11_10_OUT,
208 &IfxCcu60_CC62_P15_4_OUT
209 },
210 {
211 &IfxCcu61_CC62_P00_5_OUT,
212 &IfxCcu61_CC62_P00_9_OUT,
213 &IfxCcu61_CC62_P20_10_OUT,
214 &IfxCcu61_CC62_P33_9_OUT
215 }
216 };
217
218 const IfxCcu6_Cc62in_In *IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS] = {
219 {
220 &IfxCcu60_CC62INA_P02_4_IN,
221 &IfxCcu60_CC62INB_P00_5_IN,
222 &IfxCcu60_CC62INC_P02_8_IN
223 },
224 {
225 &IfxCcu61_CC62INA_P00_5_IN,
226 &IfxCcu61_CC62INB_P02_4_IN,
227 &IfxCcu61_CC62INC_P00_9_IN
228 }
229 };
230
231 const IfxCcu6_Ccpos0_In *IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS] = {
232 {
233 &IfxCcu60_CCPOS0A_P02_6_IN,
234 NULL_PTR,
235 &IfxCcu60_CCPOS0C_P10_4_IN,
236 &IfxCcu60_CCPOS0D_P40_0_IN
237 },
238 {
239 &IfxCcu61_CCPOS0A_P00_7_IN,
240 NULL_PTR,
241 &IfxCcu61_CCPOS0C_P33_7_IN,
242 NULL_PTR
243 }
244 };
245
246 const IfxCcu6_Ccpos1_In *IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS] = {
247 {
248 &IfxCcu60_CCPOS1A_P02_7_IN,
249 &IfxCcu60_CCPOS1B_P40_1_IN,
250 &IfxCcu60_CCPOS1C_P10_7_IN,
251 &IfxCcu60_CCPOS1D_P40_2_IN
252 },
253 {
254 &IfxCcu61_CCPOS1A_P00_8_IN,
255 &IfxCcu61_CCPOS1B_P40_6_IN,
256 &IfxCcu61_CCPOS1C_P33_6_IN,
257 &IfxCcu61_CCPOS1D_P40_7_IN
258 }
259 };
260
261 const IfxCcu6_Ccpos2_In *IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS] = {
262 {
263 &IfxCcu60_CCPOS2A_P02_8_IN,
264 &IfxCcu60_CCPOS2B_P40_3_IN,
265 &IfxCcu60_CCPOS2C_P10_8_IN,
266 NULL_PTR
267 },
268 {
269 &IfxCcu61_CCPOS2A_P00_9_IN,
270 &IfxCcu61_CCPOS2B_P40_8_IN,
271 &IfxCcu61_CCPOS2C_P33_5_IN,
272 &IfxCcu61_CCPOS2D_P40_9_IN
273 }
274 };
275
276 const IfxCcu6_Cout60_Out *IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS] = {
277 {
278 &IfxCcu60_COUT60_P02_1_OUT,
279 &IfxCcu60_COUT60_P11_9_OUT,
280 &IfxCcu60_COUT60_P15_7_OUT
281 },
282 {
283 &IfxCcu61_COUT60_P00_2_OUT,
284 &IfxCcu61_COUT60_P20_11_OUT,
285 &IfxCcu61_COUT60_P33_12_OUT
286 }
287 };
288
289 const IfxCcu6_Cout61_Out *IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS] = {
290 {
291 &IfxCcu60_COUT61_P02_3_OUT,
292 &IfxCcu60_COUT61_P11_6_OUT,
293 &IfxCcu60_COUT61_P15_8_OUT
294 },
295 {
296 &IfxCcu61_COUT61_P00_4_OUT,
297 &IfxCcu61_COUT61_P20_12_OUT,
298 &IfxCcu61_COUT61_P33_10_OUT
299 }
300 };
301
302 const IfxCcu6_Cout62_Out *IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS] = {
303 {
304 &IfxCcu60_COUT62_P02_5_OUT,
305 &IfxCcu60_COUT62_P11_3_OUT,
306 &IfxCcu60_COUT62_P14_0_OUT
307 },
308 {
309 &IfxCcu61_COUT62_P00_6_OUT,
310 &IfxCcu61_COUT62_P20_13_OUT,
311 &IfxCcu61_COUT62_P33_8_OUT
312 }
313 };
314
315 const IfxCcu6_Cout63_Out *IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS] = {
316 {
317 &IfxCcu60_COUT63_P00_0_OUT,
318 &IfxCcu60_COUT63_P11_2_OUT,
319 &IfxCcu60_COUT63_P14_1_OUT,
320 &IfxCcu60_COUT63_P32_4_OUT
321 },
322 {
323 &IfxCcu61_COUT63_P00_10_OUT,
324 &IfxCcu61_COUT63_P00_12_OUT,
325 &IfxCcu61_COUT63_P20_7_OUT,
326 NULL_PTR
327 }
328 };
329
330 const IfxCcu6_Ctrap_In *IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS] = {
331 {
332 &IfxCcu60_CTRAPA_P00_11_IN,
333 NULL_PTR,
334 NULL_PTR
335 },
336 {
337 &IfxCcu61_CTRAPA_P00_0_IN,
338 NULL_PTR,
339 &IfxCcu61_CTRAPC_P33_4_IN
340 }
341 };
342
343 const IfxCcu6_T12hr_In *IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS] = {
344 {
345 NULL_PTR,
346 &IfxCcu60_T12HRB_P00_7_IN,
347 &IfxCcu60_T12HRC_P00_9_IN,
348 NULL_PTR,
349 &IfxCcu60_T12HRE_P00_0_IN
350 },
351 {
352 NULL_PTR,
353 &IfxCcu61_T12HRB_P02_6_IN,
354 &IfxCcu61_T12HRC_P02_8_IN,
355 NULL_PTR,
356 &IfxCcu61_T12HRE_P00_11_IN
357 }
358 };
359
360 const IfxCcu6_T13hr_In *IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS] = {
361 {
362 NULL_PTR,
363 &IfxCcu60_T13HRB_P00_8_IN,
364 &IfxCcu60_T13HRC_P00_9_IN
365 },
366 {
367 NULL_PTR,
368 &IfxCcu61_T13HRB_P02_7_IN,
369 &IfxCcu61_T13HRC_P02_8_IN
370 }
371 };
IfxCcu6_Cc60in_In
CC60IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:56
IfxCcu6_Cc61in_In
CC61IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:64
IfxCcu61_CCPOS1A_P00_8_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN
Definition: IfxCcu6_PinMap.c:96
IfxCcu6_Cc62in_In
CC62IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:72
IfxCcu61_COUT62_P00_6_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT
Definition: IfxCcu6_PinMap.c:122
IfxCcu60_CTRAPA_P00_11_IN
IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN
Definition: IfxCcu6_PinMap.c:132
IfxCcu60_COUT62_P02_5_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT
Definition: IfxCcu6_PinMap.c:119
IfxCcu60_T13HRB_P00_8_IN
IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN
Definition: IfxCcu6_PinMap.c:141
Ifx_RxSel_e
Definition: Ifx_Types.h:133
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxCcu61_CC62_P33_9_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT
Definition: IfxCcu6_PinMap.c:80
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:144
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:88
IfxCcu60_CC61INB_P00_3_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN
Definition: IfxCcu6_PinMap.c:68
IfxCcu6_Ccpos2_In_pinTable
const IfxCcu6_Ccpos2_In * IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:261
IfxCcu61_CC62_P00_9_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT
Definition: IfxCcu6_PinMap.c:78
IfxCcu61_CC62INB_P02_4_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN
Definition: IfxCcu6_PinMap.c:85
IfxCcu60_CCPOS1C_P10_7_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN
Definition: IfxCcu6_PinMap.c:94
IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:297
IfxCcu60_CC61INA_P02_2_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN
Definition: IfxCcu6_PinMap.c:67
IfxCcu61_COUT60_P00_2_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT
Definition: IfxCcu6_PinMap.c:110
IfxCcu60_CC62INC_P02_8_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN
Definition: IfxCcu6_PinMap.c:83
IfxCcu60_COUT63_P11_2_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT
Definition: IfxCcu6_PinMap.c:126
IfxCcu61_T12HRB_P02_6_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN
Definition: IfxCcu6_PinMap.c:138
IfxCcu6_Cout60_Out_pinTable
const IfxCcu6_Cout60_Out * IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:276
IfxCcu6_Cc62_Out_pinTable
const IfxCcu6_Cc62_Out * IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:203
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:176
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:128
IfxCcu60_CC60_P02_0_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT
Definition: IfxCcu6_PinMap.c:45
IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:287
IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:301
IfxCcu61_CC62_P20_10_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT
Definition: IfxCcu6_PinMap.c:79
IfxCcu6_Ctrap_In
CTRAP pin mapping structure.
Definition: IfxCcu6_PinMap.h:104
IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:288
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:293
IfxCcu6_Ccpos1_In_pinTable
const IfxCcu6_Ccpos1_In * IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:246
IfxCcu60_CC61_P02_2_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT
Definition: IfxCcu6_PinMap.c:59
IfxCcu60_CC61INC_P02_7_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN
Definition: IfxCcu6_PinMap.c:69
IfxCcu60_CCPOS2A_P02_8_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN
Definition: IfxCcu6_PinMap.c:100
IfxCcu6_Ctrap_In_pinTable
const IfxCcu6_Ctrap_In * IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:330
IfxCcu61_CCPOS2D_P40_9_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN
Definition: IfxCcu6_PinMap.c:106
IfxCcu60_CC60INC_P02_6_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN
Definition: IfxCcu6_PinMap.c:55
IfxCcu61_CCPOS2B_P40_8_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN
Definition: IfxCcu6_PinMap.c:104
IfxCcu60_CCPOS0A_P02_6_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN
Definition: IfxCcu6_PinMap.c:87
IfxCcu61_CC61INB_P02_2_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN
Definition: IfxCcu6_PinMap.c:71
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu61_CC61INC_P00_8_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN
Definition: IfxCcu6_PinMap.c:72
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:292
IfxCcu61_CTRAPA_P00_0_IN
IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN
Definition: IfxCcu6_PinMap.c:133
IfxCcu60_CCPOS1A_P02_7_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN
Definition: IfxCcu6_PinMap.c:92
IfxCcu60_T12HRB_P00_7_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN
Definition: IfxCcu6_PinMap.c:135
IfxCcu60_CC61_P02_7_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT
Definition: IfxCcu6_PinMap.c:60
IfxCcu61_COUT60_P33_12_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT
Definition: IfxCcu6_PinMap.c:112
IfxCcu60_CC61_P11_11_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT
Definition: IfxCcu6_PinMap.c:61
IfxCcu6_Cc61in_In_pinTable
const IfxCcu6_Cc61in_In * IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:190
IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:286
IfxCcu60_COUT60_P11_9_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT
Definition: IfxCcu6_PinMap.c:108
IfxCcu60_T13HRC_P00_9_IN
IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN
Definition: IfxCcu6_PinMap.c:142
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:168
IfxCcu61_COUT61_P20_12_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT
Definition: IfxCcu6_PinMap.c:117
IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:296
IfxCcu60_COUT63_P14_1_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT
Definition: IfxCcu6_PinMap.c:127
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:80
IfxCcu61_CC60_P33_13_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT
Definition: IfxCcu6_PinMap.c:52
IfxCcu61_CC62_P00_5_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT
Definition: IfxCcu6_PinMap.c:77
IfxCcu60_CC60_P02_6_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT
Definition: IfxCcu6_PinMap.c:46
IfxCcu61_CC61_P00_3_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT
Definition: IfxCcu6_PinMap.c:63
IfxCcu60_COUT62_P14_0_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT
Definition: IfxCcu6_PinMap.c:121
IfxCcu60_COUT63_P00_0_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT
Definition: IfxCcu6_PinMap.c:125
IfxCcu61_CC60INC_P00_7_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN
Definition: IfxCcu6_PinMap.c:58
IfxCcu60_CC60INA_P02_0_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN
Definition: IfxCcu6_PinMap.c:53
IfxCcu60_T12HRC_P00_9_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN
Definition: IfxCcu6_PinMap.c:136
IfxCcu60_CC62_P02_4_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT
Definition: IfxCcu6_PinMap.c:73
IfxCcu61_CC60INB_P02_0_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN
Definition: IfxCcu6_PinMap.c:57
IfxCcu60_T12HRE_P00_0_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN
Definition: IfxCcu6_PinMap.c:137
IfxCcu60_COUT60_P02_1_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT
Definition: IfxCcu6_PinMap.c:107
IfxCcu6_Ccpos0_In_pinTable
const IfxCcu6_Ccpos0_In * IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:231
IfxCcu60_CC62_P15_4_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT
Definition: IfxCcu6_PinMap.c:76
IfxCcu6_Cout62_Out_pinTable
const IfxCcu6_Cout62_Out * IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:302
IfxCcu61_CCPOS0C_P33_7_IN
IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN
Definition: IfxCcu6_PinMap.c:91
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:152
IfxCcu60_COUT62_P11_3_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT
Definition: IfxCcu6_PinMap.c:120
IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:300
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxCcu60_CCPOS0C_P10_4_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN
Definition: IfxCcu6_PinMap.c:88
IfxCcu61_COUT63_P20_7_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT
Definition: IfxCcu6_PinMap.c:131
IfxCcu61_CC61INA_P00_3_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN
Definition: IfxCcu6_PinMap.c:70
IfxCcu6_PinMap.h
CCU6 I/O map.
IfxCcu61_COUT63_P00_12_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT
Definition: IfxCcu6_PinMap.c:130
IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:290
IfxCcu6_T12hr_In_pinTable
const IfxCcu6_T12hr_In * IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:343
IfxCcu60_COUT61_P11_6_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT
Definition: IfxCcu6_PinMap.c:114
IfxCcu61_CCPOS1C_P33_6_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN
Definition: IfxCcu6_PinMap.c:98
IfxCcu61_CC61_P33_11_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT
Definition: IfxCcu6_PinMap.c:66
IfxCcu61_CC60_P00_7_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT
Definition: IfxCcu6_PinMap.c:50
IfxCcu61_T12HRC_P02_8_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN
Definition: IfxCcu6_PinMap.c:139
IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:289
IfxCcu60_COUT61_P02_3_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT
Definition: IfxCcu6_PinMap.c:113
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:136
IfxCcu61_CC60INA_P00_1_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN
Definition: IfxCcu6_PinMap.c:56
IfxCcu60_CCPOS1B_P40_1_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN
Definition: IfxCcu6_PinMap.c:93
IfxCcu61_CCPOS2A_P00_9_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN
Definition: IfxCcu6_PinMap.c:103
IfxCcu61_CC62INC_P00_9_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN
Definition: IfxCcu6_PinMap.c:86
IfxCcu6_Cc60in_In_pinTable
const IfxCcu6_Cc60in_In * IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:162
IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:299
IfxCcu61_CC60_P00_1_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT
Definition: IfxCcu6_PinMap.c:49
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu61_CCPOS0A_P00_7_IN
IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN
Definition: IfxCcu6_PinMap.c:90
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_Cout63_Out_pinTable
const IfxCcu6_Cout63_Out * IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:315
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:126
IfxCcu61_COUT62_P33_8_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT
Definition: IfxCcu6_PinMap.c:124
IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:298
IfxCcu60_CC62_P02_8_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT
Definition: IfxCcu6_PinMap.c:74
IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:294
IfxCcu60_CCPOS2C_P10_8_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN
Definition: IfxCcu6_PinMap.c:102
IfxCcu60_CC60_P11_12_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT
Definition: IfxCcu6_PinMap.c:47
IfxCcu61_T13HRC_P02_8_IN
IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN
Definition: IfxCcu6_PinMap.c:144
IfxCcu61_CCPOS2C_P33_5_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN
Definition: IfxCcu6_PinMap.c:105
IfxCcu61_T13HRB_P02_7_IN
IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN
Definition: IfxCcu6_PinMap.c:143
IfxCcu6_Cout61_Out_pinTable
const IfxCcu6_Cout61_Out * IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:289
IfxCcu61_CC60_P20_8_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT
Definition: IfxCcu6_PinMap.c:51
IfxCcu60_CC62INB_P00_5_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN
Definition: IfxCcu6_PinMap.c:82
IfxCcu61_COUT62_P20_13_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT
Definition: IfxCcu6_PinMap.c:123
IfxCcu6_Cc62in_In_pinTable
const IfxCcu6_Cc62in_In * IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:218
IfxCcu6_T13hr_In_pinTable
const IfxCcu6_T13hr_In * IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:360
IfxCcu60_CC62INA_P02_4_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN
Definition: IfxCcu6_PinMap.c:81
IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:291
IfxCcu60_COUT61_P15_8_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT
Definition: IfxCcu6_PinMap.c:115
IfxCcu60_CCPOS0D_P40_0_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN
Definition: IfxCcu6_PinMap.c:89
IfxCcu61_CCPOS1B_P40_6_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN
Definition: IfxCcu6_PinMap.c:97
IfxCcu60_CC60INB_P00_1_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN
Definition: IfxCcu6_PinMap.c:54
IFXCCU6_PINMAP_NUM_MODULES
#define IFXCCU6_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxCcu6_PinMap.h:285
IfxCcu60_COUT63_P32_4_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT
Definition: IfxCcu6_PinMap.c:128
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:96
IfxCcu61_COUT61_P00_4_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT
Definition: IfxCcu6_PinMap.c:116
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:160
IfxCcu61_CC61_P00_8_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT
Definition: IfxCcu6_PinMap.c:64
IfxCcu61_CC62INA_P00_5_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN
Definition: IfxCcu6_PinMap.c:84
IfxCcu60_CC62_P11_10_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT
Definition: IfxCcu6_PinMap.c:75
IfxCcu61_CTRAPC_P33_4_IN
IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN
Definition: IfxCcu6_PinMap.c:134
IfxCcu61_COUT63_P00_10_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT
Definition: IfxCcu6_PinMap.c:129
IfxCcu6_Cc60_Out_pinTable
const IfxCcu6_Cc60_Out * IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:147
IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:295
IfxCcu61_CCPOS1D_P40_7_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN
Definition: IfxCcu6_PinMap.c:99
IfxCcu61_COUT60_P20_11_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT
Definition: IfxCcu6_PinMap.c:111
IfxCcu61_CC61_P20_9_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT
Definition: IfxCcu6_PinMap.c:65
IfxCcu60_COUT60_P15_7_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT
Definition: IfxCcu6_PinMap.c:109
IfxCcu60_CC61_P15_5_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT
Definition: IfxCcu6_PinMap.c:62
IfxCcu60_CC60_P15_6_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT
Definition: IfxCcu6_PinMap.c:48
IfxCcu60_CCPOS1D_P40_2_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN
Definition: IfxCcu6_PinMap.c:95
IfxCcu61_COUT61_P33_10_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT
Definition: IfxCcu6_PinMap.c:118
IfxCcu61_T12HRE_P00_11_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN
Definition: IfxCcu6_PinMap.c:140
IfxCcu6_Cc61_Out_pinTable
const IfxCcu6_Cc61_Out * IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:175
IfxCcu60_CCPOS2B_P40_3_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN
Definition: IfxCcu6_PinMap.c:101


iLLD_TC26B: IfxCcu6_PinMap.h Source File

  • _PinMap
IfxCcu6_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PinMap.h
3 * \brief CCU6 I/O map
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Ccu6_pinmap CCU6 Pin Mapping
42 * \ingroup IfxLld_Ccu6
43 */
44
45 #ifndef IFXCCU6_PINMAP_H
46 #define IFXCCU6_PINMAP_H
47
48 #include <IfxCcu6_reg.h>
49 #include <_Impl/IfxCcu6_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Ccu6_pinmap
53 * \{ */
54
55 /** \brief CC60IN pin mapping structure */
56 typedef const struct
57 {
58 Ifx_CCU6* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel select; /**< \brief Input multiplexer value */
61 } IfxCcu6_Cc60in_In;
62
63 /** \brief CC61IN pin mapping structure */
64 typedef const struct
65 {
66 Ifx_CCU6* module; /**< \brief Base address */
67 IfxPort_Pin pin; /**< \brief Port pin */
68 Ifx_RxSel select; /**< \brief Input multiplexer value */
69 } IfxCcu6_Cc61in_In;
70
71 /** \brief CC62IN pin mapping structure */
72 typedef const struct
73 {
74 Ifx_CCU6* module; /**< \brief Base address */
75 IfxPort_Pin pin; /**< \brief Port pin */
76 Ifx_RxSel select; /**< \brief Input multiplexer value */
77 } IfxCcu6_Cc62in_In;
78
79 /** \brief CCPOS0 pin mapping structure */
80 typedef const struct
81 {
82 Ifx_CCU6* module; /**< \brief Base address */
83 IfxPort_Pin pin; /**< \brief Port pin */
84 Ifx_RxSel select; /**< \brief Input multiplexer value */
85 } IfxCcu6_Ccpos0_In;
86
87 /** \brief CCPOS1 pin mapping structure */
88 typedef const struct
89 {
90 Ifx_CCU6* module; /**< \brief Base address */
91 IfxPort_Pin pin; /**< \brief Port pin */
92 Ifx_RxSel select; /**< \brief Input multiplexer value */
93 } IfxCcu6_Ccpos1_In;
94
95 /** \brief CCPOS2 pin mapping structure */
96 typedef const struct
97 {
98 Ifx_CCU6* module; /**< \brief Base address */
99 IfxPort_Pin pin; /**< \brief Port pin */
100 Ifx_RxSel select; /**< \brief Input multiplexer value */
101 } IfxCcu6_Ccpos2_In;
102
103 /** \brief CTRAP pin mapping structure */
104 typedef const struct
105 {
106 Ifx_CCU6* module; /**< \brief Base address */
107 IfxPort_Pin pin; /**< \brief Port pin */
108 Ifx_RxSel select; /**< \brief Input multiplexer value */
109 } IfxCcu6_Ctrap_In;
110
111 /** \brief T12HR pin mapping structure */
112 typedef const struct
113 {
114 Ifx_CCU6* module; /**< \brief Base address */
115 IfxPort_Pin pin; /**< \brief Port pin */
116 Ifx_RxSel select; /**< \brief Input multiplexer value */
117 } IfxCcu6_T12hr_In;
118
119 /** \brief T13HR pin mapping structure */
120 typedef const struct
121 {
122 Ifx_CCU6* module; /**< \brief Base address */
123 IfxPort_Pin pin; /**< \brief Port pin */
124 Ifx_RxSel select; /**< \brief Input multiplexer value */
125 } IfxCcu6_T13hr_In;
126
127 /** \brief CC60 pin mapping structure */
128 typedef const struct
129 {
130 Ifx_CCU6* module; /**< \brief Base address */
131 IfxPort_Pin pin; /**< \brief Port pin */
132 IfxPort_OutputIdx select; /**< \brief Port control code */
133 } IfxCcu6_Cc60_Out;
134
135 /** \brief CC61 pin mapping structure */
136 typedef const struct
137 {
138 Ifx_CCU6* module; /**< \brief Base address */
139 IfxPort_Pin pin; /**< \brief Port pin */
140 IfxPort_OutputIdx select; /**< \brief Port control code */
141 } IfxCcu6_Cc61_Out;
142
143 /** \brief CC62 pin mapping structure */
144 typedef const struct
145 {
146 Ifx_CCU6* module; /**< \brief Base address */
147 IfxPort_Pin pin; /**< \brief Port pin */
148 IfxPort_OutputIdx select; /**< \brief Port control code */
149 } IfxCcu6_Cc62_Out;
150
151 /** \brief COUT60 pin mapping structure */
152 typedef const struct
153 {
154 Ifx_CCU6* module; /**< \brief Base address */
155 IfxPort_Pin pin; /**< \brief Port pin */
156 IfxPort_OutputIdx select; /**< \brief Port control code */
157 } IfxCcu6_Cout60_Out;
158
159 /** \brief COUT61 pin mapping structure */
160 typedef const struct
161 {
162 Ifx_CCU6* module; /**< \brief Base address */
163 IfxPort_Pin pin; /**< \brief Port pin */
164 IfxPort_OutputIdx select; /**< \brief Port control code */
165 } IfxCcu6_Cout61_Out;
166
167 /** \brief COUT62 pin mapping structure */
168 typedef const struct
169 {
170 Ifx_CCU6* module; /**< \brief Base address */
171 IfxPort_Pin pin; /**< \brief Port pin */
172 IfxPort_OutputIdx select; /**< \brief Port control code */
173 } IfxCcu6_Cout62_Out;
174
175 /** \brief COUT63 pin mapping structure */
176 typedef const struct
177 {
178 Ifx_CCU6* module; /**< \brief Base address */
179 IfxPort_Pin pin; /**< \brief Port pin */
180 IfxPort_OutputIdx select; /**< \brief Port control code */
181 } IfxCcu6_Cout63_Out;
182
183 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT; /**< \brief CCU60_CC60: CCU60 output */
184 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT; /**< \brief CCU60_CC60: CCU60 output */
185 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT; /**< \brief CCU60_CC60: CCU60 output */
186 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT; /**< \brief CCU60_CC60: CCU60 output */
187 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT; /**< \brief CCU61_CC60: CCU61 output */
188 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT; /**< \brief CCU61_CC60: CCU61 output */
189 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT; /**< \brief CCU61_CC60: CCU61 output */
190 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT; /**< \brief CCU61_CC60: CCU61 output */
191 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN; /**< \brief CCU60_CC60INA: CCU60 input */
192 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN; /**< \brief CCU60_CC60INB: CCU60 input */
193 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN; /**< \brief CCU60_CC60INC: CCU60 input */
194 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN; /**< \brief CCU61_CC60INA: CCU61 input */
195 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN; /**< \brief CCU61_CC60INB: CCU61 input */
196 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN; /**< \brief CCU61_CC60INC: CCU61 input */
197 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT; /**< \brief CCU60_CC61: CCU60 output */
198 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT; /**< \brief CCU60_CC61: CCU60 output */
199 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT; /**< \brief CCU60_CC61: CCU60 output */
200 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT; /**< \brief CCU60_CC61: CCU60 output */
201 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT; /**< \brief CCU61_CC61: CCU61 output */
202 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT; /**< \brief CCU61_CC61: CCU61 output */
203 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT; /**< \brief CCU61_CC61: CCU61 output */
204 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT; /**< \brief CCU61_CC61: CCU61 output */
205 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN; /**< \brief CCU60_CC61INA: CCU60 input */
206 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN; /**< \brief CCU60_CC61INB: CCU60 input */
207 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN; /**< \brief CCU60_CC61INC: CCU60 input */
208 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN; /**< \brief CCU61_CC61INA: CCU61 input */
209 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN; /**< \brief CCU61_CC61INB: CCU61 input */
210 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN; /**< \brief CCU61_CC61INC: CCU61 input */
211 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT; /**< \brief CCU60_CC62: CCU60 output */
212 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT; /**< \brief CCU60_CC62: CCU60 output */
213 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT; /**< \brief CCU60_CC62: CCU60 output */
214 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT; /**< \brief CCU60_CC62: CCU60 output */
215 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT; /**< \brief CCU61_CC62: CCU61 output */
216 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT; /**< \brief CCU61_CC62: CCU61 output */
217 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT; /**< \brief CCU61_CC62: CCU61 output */
218 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT; /**< \brief CCU61_CC62: CCU61 output */
219 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN; /**< \brief CCU60_CC62INA: CCU60 input */
220 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN; /**< \brief CCU60_CC62INB: CCU60 input */
221 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN; /**< \brief CCU60_CC62INC: CCU60 input */
222 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN; /**< \brief CCU61_CC62INA: CCU61 input */
223 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN; /**< \brief CCU61_CC62INB: CCU61 input */
224 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN; /**< \brief CCU61_CC62INC: CCU61 input */
225 IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN; /**< \brief CCU60_CCPOS0A: CCU60 input */
226 IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN; /**< \brief CCU60_CCPOS0C: CCU60 input */
227 IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN; /**< \brief CCU60_CCPOS0D: CCU60 input */
228 IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN; /**< \brief CCU61_CCPOS0A: CCU61 input */
229 IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN; /**< \brief CCU61_CCPOS0C: CCU61 input */
230 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN; /**< \brief CCU60_CCPOS1A: CCU60 input */
231 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN; /**< \brief CCU60_CCPOS1B: CCU60 input */
232 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN; /**< \brief CCU60_CCPOS1C: CCU60 input */
233 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN; /**< \brief CCU60_CCPOS1D: CCU60 input */
234 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN; /**< \brief CCU61_CCPOS1A: CCU61 input */
235 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN; /**< \brief CCU61_CCPOS1B: CCU61 input */
236 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN; /**< \brief CCU61_CCPOS1C: CCU61 input */
237 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN; /**< \brief CCU61_CCPOS1D: CCU61 input */
238 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN; /**< \brief CCU60_CCPOS2A: CCU60 input */
239 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN; /**< \brief CCU60_CCPOS2B: CCU60 input */
240 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN; /**< \brief CCU60_CCPOS2C: CCU60 input */
241 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN; /**< \brief CCU61_CCPOS2A: CCU61 input */
242 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN; /**< \brief CCU61_CCPOS2B: CCU61 input */
243 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN; /**< \brief CCU61_CCPOS2C: CCU61 input */
244 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN; /**< \brief CCU61_CCPOS2D: CCU61 input */
245 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT; /**< \brief CCU60_COUT60: CCU60 output */
246 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT; /**< \brief CCU60_COUT60: CCU60 output */
247 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT; /**< \brief CCU60_COUT60: CCU60 output */
248 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT; /**< \brief CCU61_COUT60: CCU61 output */
249 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT; /**< \brief CCU61_COUT60: CCU61 output */
250 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT; /**< \brief CCU61_COUT60: CCU61 output */
251 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT; /**< \brief CCU60_COUT61: CCU60 output */
252 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT; /**< \brief CCU60_COUT61: CCU60 output */
253 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT; /**< \brief CCU60_COUT61: CCU60 output */
254 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT; /**< \brief CCU61_COUT61: CCU61 output */
255 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT; /**< \brief CCU61_COUT61: CCU61 output */
256 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT; /**< \brief CCU61_COUT61: CCU61 output */
257 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT; /**< \brief CCU60_COUT62: CCU60 output */
258 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT; /**< \brief CCU60_COUT62: CCU60 output */
259 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT; /**< \brief CCU60_COUT62: CCU60 output */
260 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT; /**< \brief CCU61_COUT62: CCU61 output */
261 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT; /**< \brief CCU61_COUT62: CCU61 output */
262 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT; /**< \brief CCU61_COUT62: CCU61 output */
263 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT; /**< \brief CCU60_COUT63: CCU60 output */
264 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT; /**< \brief CCU60_COUT63: CCU60 output */
265 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT; /**< \brief CCU60_COUT63: CCU60 output */
266 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT; /**< \brief CCU60_COUT63: CCU60 output */
267 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT; /**< \brief CCU61_COUT63: CCU61 output */
268 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT; /**< \brief CCU61_COUT63: CCU61 output */
269 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT; /**< \brief CCU61_COUT63: CCU61 output */
270 IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN; /**< \brief CCU60_CTRAPA: CCU60 input */
271 IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN; /**< \brief CCU61_CTRAPA: CCU61 input */
272 IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN; /**< \brief CCU61_CTRAPC: CCU61 input */
273 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN; /**< \brief CCU60_T12HRB: CCU60 input */
274 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN; /**< \brief CCU60_T12HRC: CCU60 input */
275 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN; /**< \brief CCU60_T12HRE: CCU60 input */
276 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN; /**< \brief CCU61_T12HRB: CCU61 input */
277 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN; /**< \brief CCU61_T12HRC: CCU61 input */
278 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN; /**< \brief CCU61_T12HRE: CCU61 input */
279 IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN; /**< \brief CCU60_T13HRB: CCU60 input */
280 IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN; /**< \brief CCU60_T13HRC: CCU60 input */
281 IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN; /**< \brief CCU61_T13HRB: CCU61 input */
282 IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN; /**< \brief CCU61_T13HRC: CCU61 input */
283
284 /** \brief Table dimensions */
285 #define IFXCCU6_PINMAP_NUM_MODULES 2
286 #define IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS 4
287 #define IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS 3
288 #define IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS 4
289 #define IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS 3
290 #define IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS 4
291 #define IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS 3
292 #define IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS 4
293 #define IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS 4
294 #define IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS 4
295 #define IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS 3
296 #define IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS 3
297 #define IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS 3
298 #define IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS 4
299 #define IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS 3
300 #define IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS 5
301 #define IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS 3
302
303
304 /** \brief IfxCcu6_Cc60_Out table */
305 IFX_EXTERN const IfxCcu6_Cc60_Out *IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS];
306
307 /** \brief IfxCcu6_Cc60in_In table */
308 IFX_EXTERN const IfxCcu6_Cc60in_In *IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS];
309
310 /** \brief IfxCcu6_Cc61_Out table */
311 IFX_EXTERN const IfxCcu6_Cc61_Out *IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS];
312
313 /** \brief IfxCcu6_Cc61in_In table */
314 IFX_EXTERN const IfxCcu6_Cc61in_In *IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS];
315
316 /** \brief IfxCcu6_Cc62_Out table */
317 IFX_EXTERN const IfxCcu6_Cc62_Out *IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS];
318
319 /** \brief IfxCcu6_Cc62in_In table */
320 IFX_EXTERN const IfxCcu6_Cc62in_In *IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS];
321
322 /** \brief IfxCcu6_Ccpos0_In table */
323 IFX_EXTERN const IfxCcu6_Ccpos0_In *IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS];
324
325 /** \brief IfxCcu6_Ccpos1_In table */
326 IFX_EXTERN const IfxCcu6_Ccpos1_In *IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS];
327
328 /** \brief IfxCcu6_Ccpos2_In table */
329 IFX_EXTERN const IfxCcu6_Ccpos2_In *IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS];
330
331 /** \brief IfxCcu6_Cout60_Out table */
332 IFX_EXTERN const IfxCcu6_Cout60_Out *IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS];
333
334 /** \brief IfxCcu6_Cout61_Out table */
335 IFX_EXTERN const IfxCcu6_Cout61_Out *IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS];
336
337 /** \brief IfxCcu6_Cout62_Out table */
338 IFX_EXTERN const IfxCcu6_Cout62_Out *IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS];
339
340 /** \brief IfxCcu6_Cout63_Out table */
341 IFX_EXTERN const IfxCcu6_Cout63_Out *IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS];
342
343 /** \brief IfxCcu6_Ctrap_In table */
344 IFX_EXTERN const IfxCcu6_Ctrap_In *IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS];
345
346 /** \brief IfxCcu6_T12hr_In table */
347 IFX_EXTERN const IfxCcu6_T12hr_In *IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS];
348
349 /** \brief IfxCcu6_T13hr_In table */
350 IFX_EXTERN const IfxCcu6_T13hr_In *IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS];
351
352 /** \} */
353
354 #endif /* IFXCCU6_PINMAP_H */
IfxCcu6_Cc60in_In
CC60IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:56
IfxCcu6_Cc61in_In
CC61IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:64
IfxCcu6_Cc62in_In
CC62IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:72
IfxCcu61_CCPOS2B_P40_8_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN
CCU61_CCPOS2B: CCU61 input.
Definition: IfxCcu6_PinMap.h:242
IfxCcu60_CCPOS1C_P10_7_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN
CCU60_CCPOS1C: CCU60 input.
Definition: IfxCcu6_PinMap.h:232
IfxCcu61_CCPOS1A_P00_8_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN
CCU61_CCPOS1A: CCU61 input.
Definition: IfxCcu6_PinMap.h:234
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:144
IfxCcu60_CC61INB_P00_3_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN
CCU60_CC61INB: CCU60 input.
Definition: IfxCcu6_PinMap.h:206
IfxCcu6_Cc60in_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxCcu6_PinMap.h:59
IfxCcu60_T13HRB_P00_8_IN
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN
CCU60_T13HRB: CCU60 input.
Definition: IfxCcu6_PinMap.h:279
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:88
IfxCcu61_CC62_P33_9_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT
CCU61_CC62: CCU61 output.
Definition: IfxCcu6_PinMap.h:218
IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:297
IfxCcu61_COUT60_P20_11_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT
CCU61_COUT60: CCU61 output.
Definition: IfxCcu6_PinMap.h:249
IfxCcu60_COUT60_P02_1_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT
CCU60_COUT60: CCU60 output.
Definition: IfxCcu6_PinMap.h:245
IfxCcu61_CC61_P00_8_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT
CCU61_CC61: CCU61 output.
Definition: IfxCcu6_PinMap.h:202
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxCcu6_Cc61_Out_pinTable
IFX_EXTERN const IfxCcu6_Cc61_Out * IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
IfxCcu6_Cc61_Out table.
Definition: IfxCcu6_PinMap.h:311
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:176
IfxCcu60_T12HRE_P00_0_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN
CCU60_T12HRE: CCU60 input.
Definition: IfxCcu6_PinMap.h:275
IfxCcu60_COUT61_P02_3_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT
CCU60_COUT61: CCU60 output.
Definition: IfxCcu6_PinMap.h:251
IfxCcu61_CC62_P00_9_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT
CCU61_CC62: CCU61 output.
Definition: IfxCcu6_PinMap.h:216
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:128
IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:287
IfxCcu60_CC62INC_P02_8_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN
CCU60_CC62INC: CCU60 input.
Definition: IfxCcu6_PinMap.h:221
IfxCcu6_Ccpos1_In_pinTable
IFX_EXTERN const IfxCcu6_Ccpos1_In * IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
IfxCcu6_Ccpos1_In table.
Definition: IfxCcu6_PinMap.h:326
IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:301
IfxCcu60_COUT60_P15_7_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT
CCU60_COUT60: CCU60 output.
Definition: IfxCcu6_PinMap.h:247
IfxCcu60_CCPOS2C_P10_8_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN
CCU60_CCPOS2C: CCU60 input.
Definition: IfxCcu6_PinMap.h:240
IfxCcu60_CC61_P02_2_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT
CCU60_CC61: CCU60 output.
Definition: IfxCcu6_PinMap.h:197
IfxCcu6_Ctrap_In
CTRAP pin mapping structure.
Definition: IfxCcu6_PinMap.h:104
IfxCcu60_CC62INB_P00_5_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN
CCU60_CC62INB: CCU60 input.
Definition: IfxCcu6_PinMap.h:220
IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:288
IfxCcu61_CCPOS2A_P00_9_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN
CCU61_CCPOS2A: CCU61 input.
Definition: IfxCcu6_PinMap.h:241
IfxCcu6_T13hr_In_pinTable
IFX_EXTERN const IfxCcu6_T13hr_In * IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]
IfxCcu6_T13hr_In table.
Definition: IfxCcu6_PinMap.h:350
IfxCcu60_CCPOS1B_P40_1_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN
CCU60_CCPOS1B: CCU60 input.
Definition: IfxCcu6_PinMap.h:231
IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:293
IfxCcu61_CTRAPC_P33_4_IN
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN
CCU61_CTRAPC: CCU61 input.
Definition: IfxCcu6_PinMap.h:272
IfxCcu60_COUT60_P11_9_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT
CCU60_COUT60: CCU60 output.
Definition: IfxCcu6_PinMap.h:246
IfxCcu60_CC60INC_P02_6_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN
CCU60_CC60INC: CCU60 input.
Definition: IfxCcu6_PinMap.h:193
IfxCcu60_CC62_P15_4_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT
CCU60_CC62: CCU60 output.
Definition: IfxCcu6_PinMap.h:214
IfxCcu6_Cc60in_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxCcu6_PinMap.h:60
IfxCcu61_COUT62_P00_6_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT
CCU61_COUT62: CCU61 output.
Definition: IfxCcu6_PinMap.h:260
IfxCcu60_CC62_P02_4_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT
CCU60_CC62: CCU60 output.
Definition: IfxCcu6_PinMap.h:211
IfxCcu6_T12hr_In_pinTable
IFX_EXTERN const IfxCcu6_T12hr_In * IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
IfxCcu6_T12hr_In table.
Definition: IfxCcu6_PinMap.h:347
IfxCcu61_CCPOS2C_P33_5_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN
CCU61_CCPOS2C: CCU61 input.
Definition: IfxCcu6_PinMap.h:243
IfxCcu60_CC61_P11_11_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT
CCU60_CC61: CCU60 output.
Definition: IfxCcu6_PinMap.h:199
IfxCcu6_Ccpos2_In_pinTable
IFX_EXTERN const IfxCcu6_Ccpos2_In * IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
IfxCcu6_Ccpos2_In table.
Definition: IfxCcu6_PinMap.h:329
IfxCcu60_CC60_P02_6_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT
CCU60_CC60: CCU60 output.
Definition: IfxCcu6_PinMap.h:184
IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:292
IfxCcu6_Cc60_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxCcu6_PinMap.h:132
IfxCcu61_T12HRB_P02_6_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN
CCU61_T12HRB: CCU61 input.
Definition: IfxCcu6_PinMap.h:276
IfxCcu61_COUT62_P33_8_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT
CCU61_COUT62: CCU61 output.
Definition: IfxCcu6_PinMap.h:262
IfxCcu61_CCPOS1D_P40_7_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN
CCU61_CCPOS1D: CCU61 input.
Definition: IfxCcu6_PinMap.h:237
IfxCcu61_CC60_P33_13_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT
CCU61_CC60: CCU61 output.
Definition: IfxCcu6_PinMap.h:190
IfxCcu6_Cc60in_In::module
Ifx_CCU6 * module
Base address.
Definition: IfxCcu6_PinMap.h:58
IfxCcu61_T12HRE_P00_11_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN
CCU61_T12HRE: CCU61 input.
Definition: IfxCcu6_PinMap.h:278
IfxCcu60_T12HRC_P00_9_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN
CCU60_T12HRC: CCU60 input.
Definition: IfxCcu6_PinMap.h:274
IfxCcu61_CC62INC_P00_9_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN
CCU61_CC62INC: CCU61 input.
Definition: IfxCcu6_PinMap.h:224
IfxCcu61_CCPOS0A_P00_7_IN
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN
CCU61_CCPOS0A: CCU61 input.
Definition: IfxCcu6_PinMap.h:228
IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:286
IfxCcu61_COUT63_P00_10_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT
CCU61_COUT63: CCU61 output.
Definition: IfxCcu6_PinMap.h:267
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:168
IfxCcu61_COUT63_P20_7_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT
CCU61_COUT63: CCU61 output.
Definition: IfxCcu6_PinMap.h:269
IfxCcu60_CC60_P02_0_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT
CCU60_CC60: CCU60 output.
Definition: IfxCcu6_PinMap.h:183
IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:296
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:80
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu60_CC61INA_P02_2_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN
CCU60_CC61INA: CCU60 input.
Definition: IfxCcu6_PinMap.h:205
IfxCcu60_COUT63_P00_0_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT
CCU60_COUT63: CCU60 output.
Definition: IfxCcu6_PinMap.h:263
IfxCcu61_CCPOS0C_P33_7_IN
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN
CCU61_CCPOS0C: CCU61 input.
Definition: IfxCcu6_PinMap.h:229
IfxCcu61_CC61INB_P02_2_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN
CCU61_CC61INB: CCU61 input.
Definition: IfxCcu6_PinMap.h:209
IfxCcu60_CC62_P02_8_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT
CCU60_CC62: CCU60 output.
Definition: IfxCcu6_PinMap.h:212
IfxCcu61_COUT60_P00_2_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT
CCU61_COUT60: CCU61 output.
Definition: IfxCcu6_PinMap.h:248
IfxCcu60_CC61_P15_5_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT
CCU60_CC61: CCU60 output.
Definition: IfxCcu6_PinMap.h:200
IfxCcu6_cfg.h
CCU6 on-chip implementation data.
IfxCcu60_CC60INB_P00_1_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN
CCU60_CC60INB: CCU60 input.
Definition: IfxCcu6_PinMap.h:192
IfxCcu60_CCPOS2A_P02_8_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN
CCU60_CCPOS2A: CCU60 input.
Definition: IfxCcu6_PinMap.h:238
IfxCcu6_Cc62_Out_pinTable
IFX_EXTERN const IfxCcu6_Cc62_Out * IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
IfxCcu6_Cc62_Out table.
Definition: IfxCcu6_PinMap.h:317
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:152
IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:300
IfxCcu60_COUT61_P15_8_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT
CCU60_COUT61: CCU60 output.
Definition: IfxCcu6_PinMap.h:253
IfxCcu61_CC60_P20_8_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT
CCU61_CC60: CCU61 output.
Definition: IfxCcu6_PinMap.h:189
IfxCcu6_Cout63_Out_pinTable
IFX_EXTERN const IfxCcu6_Cout63_Out * IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
IfxCcu6_Cout63_Out table.
Definition: IfxCcu6_PinMap.h:341
IfxCcu61_COUT60_P33_12_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT
CCU61_COUT60: CCU61 output.
Definition: IfxCcu6_PinMap.h:250
IfxCcu60_T12HRB_P00_7_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN
CCU60_T12HRB: CCU60 input.
Definition: IfxCcu6_PinMap.h:273
IfxCcu60_CTRAPA_P00_11_IN
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN
CCU60_CTRAPA: CCU60 input.
Definition: IfxCcu6_PinMap.h:270
IfxCcu60_COUT62_P02_5_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT
CCU60_COUT62: CCU60 output.
Definition: IfxCcu6_PinMap.h:257
IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:290
IfxCcu60_CCPOS0C_P10_4_IN
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN
CCU60_CCPOS0C: CCU60 input.
Definition: IfxCcu6_PinMap.h:226
IfxCcu61_CC62_P00_5_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT
CCU61_CC62: CCU61 output.
Definition: IfxCcu6_PinMap.h:215
IfxCcu61_CCPOS1B_P40_6_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN
CCU61_CCPOS1B: CCU61 input.
Definition: IfxCcu6_PinMap.h:235
IfxCcu61_CC60INB_P02_0_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN
CCU61_CC60INB: CCU61 input.
Definition: IfxCcu6_PinMap.h:195
IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:289
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:136
IfxCcu61_CC61INA_P00_3_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN
CCU61_CC61INA: CCU61 input.
Definition: IfxCcu6_PinMap.h:208
IfxCcu6_Cc60_Out_pinTable
IFX_EXTERN const IfxCcu6_Cc60_Out * IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
IfxCcu6_Cc60_Out table.
Definition: IfxCcu6_PinMap.h:305
IfxCcu61_CCPOS1C_P33_6_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN
CCU61_CCPOS1C: CCU61 input.
Definition: IfxCcu6_PinMap.h:236
IfxCcu61_CC61_P00_3_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT
CCU61_CC61: CCU61 output.
Definition: IfxCcu6_PinMap.h:201
IfxCcu61_COUT63_P00_12_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT
CCU61_COUT63: CCU61 output.
Definition: IfxCcu6_PinMap.h:268
IfxCcu60_CC60_P15_6_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT
CCU60_CC60: CCU60 output.
Definition: IfxCcu6_PinMap.h:186
IfxCcu60_CC61INC_P02_7_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN
CCU60_CC61INC: CCU60 input.
Definition: IfxCcu6_PinMap.h:207
IfxCcu60_COUT61_P11_6_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT
CCU60_COUT61: CCU60 output.
Definition: IfxCcu6_PinMap.h:252
IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:299
IfxCcu60_CCPOS0D_P40_0_IN
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN
CCU60_CCPOS0D: CCU60 input.
Definition: IfxCcu6_PinMap.h:227
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_Cout60_Out_pinTable
IFX_EXTERN const IfxCcu6_Cout60_Out * IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
IfxCcu6_Cout60_Out table.
Definition: IfxCcu6_PinMap.h:332
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu61_T12HRC_P02_8_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN
CCU61_T12HRC: CCU61 input.
Definition: IfxCcu6_PinMap.h:277
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:298
IfxCcu61_COUT61_P00_4_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT
CCU61_COUT61: CCU61 output.
Definition: IfxCcu6_PinMap.h:254
IfxCcu60_T13HRC_P00_9_IN
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN
CCU60_T13HRC: CCU60 input.
Definition: IfxCcu6_PinMap.h:280
IfxCcu6_Ctrap_In_pinTable
IFX_EXTERN const IfxCcu6_Ctrap_In * IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
IfxCcu6_Ctrap_In table.
Definition: IfxCcu6_PinMap.h:344
IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:294
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxCcu61_CC61INC_P00_8_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN
CCU61_CC61INC: CCU61 input.
Definition: IfxCcu6_PinMap.h:210
IfxCcu60_CC60_P11_12_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT
CCU60_CC60: CCU60 output.
Definition: IfxCcu6_PinMap.h:185
IfxCcu61_CC60_P00_1_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT
CCU61_CC60: CCU61 output.
Definition: IfxCcu6_PinMap.h:187
IfxCcu60_CCPOS1A_P02_7_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN
CCU60_CCPOS1A: CCU60 input.
Definition: IfxCcu6_PinMap.h:230
IfxCcu61_CC60_P00_7_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT
CCU61_CC60: CCU61 output.
Definition: IfxCcu6_PinMap.h:188
IfxCcu60_COUT63_P11_2_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT
CCU60_COUT63: CCU60 output.
Definition: IfxCcu6_PinMap.h:264
IfxCcu60_COUT63_P32_4_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT
CCU60_COUT63: CCU60 output.
Definition: IfxCcu6_PinMap.h:266
IfxCcu61_T13HRC_P02_8_IN
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN
CCU61_T13HRC: CCU61 input.
Definition: IfxCcu6_PinMap.h:282
IfxCcu60_CC62INA_P02_4_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN
CCU60_CC62INA: CCU60 input.
Definition: IfxCcu6_PinMap.h:219
IfxCcu61_CTRAPA_P00_0_IN
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN
CCU61_CTRAPA: CCU61 input.
Definition: IfxCcu6_PinMap.h:271
IfxCcu61_COUT61_P20_12_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT
CCU61_COUT61: CCU61 output.
Definition: IfxCcu6_PinMap.h:255
IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:291
IfxCcu6_Cc60in_In_pinTable
IFX_EXTERN const IfxCcu6_Cc60in_In * IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
IfxCcu6_Cc60in_In table.
Definition: IfxCcu6_PinMap.h:308
IfxCcu60_CC62_P11_10_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT
CCU60_CC62: CCU60 output.
Definition: IfxCcu6_PinMap.h:213
IfxCcu60_CC60INA_P02_0_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN
CCU60_CC60INA: CCU60 input.
Definition: IfxCcu6_PinMap.h:191
IfxCcu6_Ccpos0_In_pinTable
IFX_EXTERN const IfxCcu6_Ccpos0_In * IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
IfxCcu6_Ccpos0_In table.
Definition: IfxCcu6_PinMap.h:323
IfxCcu61_CC62INA_P00_5_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN
CCU61_CC62INA: CCU61 input.
Definition: IfxCcu6_PinMap.h:222
IfxCcu61_CCPOS2D_P40_9_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN
CCU61_CCPOS2D: CCU61 input.
Definition: IfxCcu6_PinMap.h:244
IfxCcu61_CC60INA_P00_1_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN
CCU61_CC60INA: CCU61 input.
Definition: IfxCcu6_PinMap.h:194
IFXCCU6_PINMAP_NUM_MODULES
#define IFXCCU6_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxCcu6_PinMap.h:285
IfxCcu6_Cc61in_In_pinTable
IFX_EXTERN const IfxCcu6_Cc61in_In * IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
IfxCcu6_Cc61in_In table.
Definition: IfxCcu6_PinMap.h:314
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:96
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:160
IfxCcu61_COUT61_P33_10_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT
CCU61_COUT61: CCU61 output.
Definition: IfxCcu6_PinMap.h:256
IfxCcu60_COUT62_P14_0_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT
CCU60_COUT62: CCU60 output.
Definition: IfxCcu6_PinMap.h:259
IfxCcu61_CC60INC_P00_7_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN
CCU61_CC60INC: CCU61 input.
Definition: IfxCcu6_PinMap.h:196
IfxCcu60_CCPOS1D_P40_2_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN
CCU60_CCPOS1D: CCU60 input.
Definition: IfxCcu6_PinMap.h:233
IfxCcu60_COUT62_P11_3_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT
CCU60_COUT62: CCU60 output.
Definition: IfxCcu6_PinMap.h:258
IfxCcu61_CC62_P20_10_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT
CCU61_CC62: CCU61 output.
Definition: IfxCcu6_PinMap.h:217
IfxCcu60_CCPOS2B_P40_3_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN
CCU60_CCPOS2B: CCU60 input.
Definition: IfxCcu6_PinMap.h:239
IfxCcu60_CCPOS0A_P02_6_IN
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN
CCU60_CCPOS0A: CCU60 input.
Definition: IfxCcu6_PinMap.h:225
IfxCcu60_CC61_P02_7_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT
CCU60_CC61: CCU60 output.
Definition: IfxCcu6_PinMap.h:198
IfxCcu61_CC62INB_P02_4_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN
CCU61_CC62INB: CCU61 input.
Definition: IfxCcu6_PinMap.h:223
IfxCcu6_Cc62in_In_pinTable
IFX_EXTERN const IfxCcu6_Cc62in_In * IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
IfxCcu6_Cc62in_In table.
Definition: IfxCcu6_PinMap.h:320
IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:295
IfxCcu61_T13HRB_P02_7_IN
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN
CCU61_T13HRB: CCU61 input.
Definition: IfxCcu6_PinMap.h:281
IfxCcu6_Cout62_Out_pinTable
IFX_EXTERN const IfxCcu6_Cout62_Out * IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
IfxCcu6_Cout62_Out table.
Definition: IfxCcu6_PinMap.h:338
IfxCcu61_COUT62_P20_13_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT
CCU61_COUT62: CCU61 output.
Definition: IfxCcu6_PinMap.h:261
IfxCcu60_COUT63_P14_1_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT
CCU60_COUT63: CCU60 output.
Definition: IfxCcu6_PinMap.h:265
IfxCcu61_CC61_P33_11_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT
CCU61_CC61: CCU61 output.
Definition: IfxCcu6_PinMap.h:204
IfxCcu61_CC61_P20_9_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT
CCU61_CC61: CCU61 output.
Definition: IfxCcu6_PinMap.h:203
IfxCcu6_Cout61_Out_pinTable
IFX_EXTERN const IfxCcu6_Cout61_Out * IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
IfxCcu6_Cout61_Out table.
Definition: IfxCcu6_PinMap.h:335
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxCcu6_PwmBc.c Source File

  • Ccu6
  • PwmBc
IfxCcu6_PwmBc.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PwmBc.c
3 * \brief CCU6 PWMBC details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxCcu6_PwmBc.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 uint32 IfxCcu6_PwmBc_getMotorSpeed(IfxCcu6_PwmBc *pwmBc)
54 {
55 uint32 currentTime, previousTime;
56 float32 speed;
57
58 currentTime = IfxCcu6_getCaptureRegisterValue(pwmBc->ccu6, IfxCcu6_T12Channel_0);
59 previousTime = IfxCcu6_getCaptureShadowRegisterValue(pwmBc->ccu6, IfxCcu6_T12Channel_0);
60
61 // TODO -- FIX IT --
62 speed = (currentTime - previousTime) * (6 / (pwmBc->base.t13Frequency));
63 speed = speed * 60 * 100000; //convertion to RPM (minutes),
64 return speed;
65 }
66
67
68 void IfxCcu6_PwmBc_initModule(IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
69 {
70 Ifx_CCU6 *ccu6SFR = config->ccu6; // pointer to CCU6 registers
71 pwmBc->ccu6 = ccu6SFR; // adding register pointer to module handler
72
73 /* -- hardware module initialisation -- */
74
75 // enable module if it hasn't been enabled by any other interface //
76 if (IfxCcu6_isModuleEnabled(ccu6SFR) == FALSE)
77 {
78 IfxCcu6_enableModule(ccu6SFR);
79 }
80
81 /* -- Timer13 initialisation -- */
82
83 // enable Timer13 if it hasn't been enabled by any other interface //
84 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t13) == FALSE)
85 {
86 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t13);
87 }
88
89 // clock initialisation //
90 pwmBc->base.t13Frequency = IfxCcu6_setT13Frequency(ccu6SFR, config->base.t13Frequency, config->base.t13Period);
91
92 // duty cycle initialisation //
93
94 IfxCcu6_setT13CounterValue(ccu6SFR, config->timer13.counterValue);
95
96 IfxCcu6_setT13CompareValue(ccu6SFR, config->timer13.compareValue);
97
98 // if Timer 13 start is in sync with Timer 12 //
99
100 if (config->trigger.t13InSyncWithT12)
101 {
102 IfxCcu6_setT13TriggerEventMode(ccu6SFR, config->timer13.t12SyncEvent);
103 IfxCcu6_setT13TriggerEventDirection(ccu6SFR, config->timer13.t12SyncDirection);
104 }
105
106 /* -- Timer12 initialisation -- */
107
108 // enable Timer12 if it hasn't been enabled by any other interface //
109 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t12) == FALSE)
110 {
111 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t12);
112 }
113
114 // clock initialisation //
115
116 IfxCcu6_setT12Frequency(ccu6SFR, config->base.t12Frequency, config->base.t12Period, config->timer12.countMode);
117
118 // duty cycle initialisation //
119
120 IfxCcu6_setT12CounterValue(ccu6SFR, config->timer12.counterValue);
121
122 // hall effect noise filter initialisation
123 if (config->base.noiseFilter)
124 {
125 IfxCcu6_setDeadTimeValue(ccu6SFR, (uint8)config->base.noiseFilter);
126 IfxCcu6_enableDeadTime(ccu6SFR, IfxCcu6_T12Channel_0);
127 IfxCcu6_disableDelayBypass(ccu6SFR);
128 }
129
130 // channel initialisation for hall sensor mode ( for Brush Less DC motor)
131 IfxCcu6_setT12ChannelMode(ccu6SFR, IfxCcu6_T12Channel_0, IfxCcu6_T12ChannelMode_hallSensor);
132 IfxCcu6_setT12ChannelMode(ccu6SFR, IfxCcu6_T12Channel_1, IfxCcu6_T12ChannelMode_hallSensor);
133 IfxCcu6_setT12ChannelMode(ccu6SFR, IfxCcu6_T12Channel_2, IfxCcu6_T12ChannelMode_hallSensor);
134
135 // phase delay initialisation
136 IfxCcu6_setT12CompareValue(ccu6SFR, IfxCcu6_T12Channel_1, (uint16)config->base.phaseDelay);
137
138 // multichannel control / output pattern control initialisation
139 IfxCcu6_setMultiChannelSwitchingMode(ccu6SFR, config->multiChannelControl.switchingSelect);
140 IfxCcu6_setMultiChannelSwitchingSync(ccu6SFR, config->multiChannelControl.switchingSync);
141
142 /* -- output path initialisation -- */
143
144 //enable Timer13 modulation output path for all T12 channel outs//
145
146 IfxCcu6_enableModulationOutput(ccu6SFR, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc0);
147 IfxCcu6_enableModulationOutput(ccu6SFR, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc1);
148 IfxCcu6_enableModulationOutput(ccu6SFR, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc2);
149
150 if (config->pins->cout63 != NULL_PTR)
151 {
152 IfxCcu6_enableModulationOutput(ccu6SFR, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cout3);
153 }
154
155 // output passive logic configuration //
156 //TODO check correct polarity:
157
158 IfxCcu6_setOutputPassiveState(ccu6SFR, IfxCcu6_ChannelOut_cc0, config->base.activeState);
159 IfxCcu6_setOutputPassiveState(ccu6SFR, IfxCcu6_ChannelOut_cc1, config->base.activeState);
160 IfxCcu6_setOutputPassiveState(ccu6SFR, IfxCcu6_ChannelOut_cc2, config->base.activeState);
161
162 if (config->pins->cout63 != NULL_PTR)
163
164 {
165 IfxCcu6_setOutputPassiveState(ccu6SFR, IfxCcu6_ChannelOut_cout3, config->base.activeState);
166 }
167
168 /* -- Pin mapping -- */
169
170 const IfxCcu6_PwmBc_Pins *pins = config->pins;
171
172 if (pins != NULL_PTR)
173 {
174 // modulation output pins
175
176 IfxCcu6_Cc60_Out *cc60Out = pins->cc60Out;
177
178 if (cc60Out != NULL_PTR)
179 {
180 IfxCcu6_initCc60OutPin(cc60Out, pins->outputMode, pins->pinDriver);
181 }
182
183 IfxCcu6_Cc61_Out *cc61Out = pins->cc61Out;
184
185 if (cc61Out != NULL_PTR)
186 {
187 IfxCcu6_initCc61OutPin(cc61Out, pins->outputMode, pins->pinDriver);
188 }
189
190 IfxCcu6_Cc62_Out *cc62Out = pins->cc62Out;
191
192 if (cc62Out != NULL_PTR)
193 {
194 IfxCcu6_initCc62OutPin(cc62Out, pins->outputMode, pins->pinDriver);
195 }
196
197 IfxCcu6_Cout60_Out *cout60 = pins->cout60;
198
199 if (cout60 != NULL_PTR)
200 {
201 IfxCcu6_initCout60Pin(cout60, pins->outputMode, pins->pinDriver);
202 }
203
204 IfxCcu6_Cout61_Out *cout61 = pins->cout61;
205
206 if (cout61 != NULL_PTR)
207 {
208 IfxCcu6_initCout61Pin(cout61, pins->outputMode, pins->pinDriver);
209 }
210
211 IfxCcu6_Cout62_Out *cout62 = pins->cout62;
212
213 if (cout62 != NULL_PTR)
214 {
215 IfxCcu6_initCout62Pin(cout62, pins->outputMode, pins->pinDriver);
216 }
217
218 IfxCcu6_Cout63_Out *cout63 = pins->cout63;
219
220 if (cout63 != NULL_PTR)
221 {
222 IfxCcu6_initCout63Pin(cout63, pins->outputMode, pins->pinDriver);
223 }
224
225 // hall sensor input pins
226
227 IfxCcu6_Ccpos0_In *ccpos0 = pins->ccpos0;
228
229 if (ccpos0 != NULL_PTR)
230 {
231 IfxCcu6_initCcpos0Pin(ccpos0, pins->inputMode);
232 }
233
234 IfxCcu6_Ccpos1_In *ccpos1 = pins->ccpos1;
235
236 if (ccpos1 != NULL_PTR)
237 {
238 IfxCcu6_initCcpos1Pin(ccpos1, pins->inputMode);
239 }
240
241 IfxCcu6_Ccpos2_In *ccpos2 = pins->ccpos2;
242
243 if (ccpos2 != NULL_PTR)
244 {
245 IfxCcu6_initCcpos2Pin(ccpos2, pins->inputMode);
246 }
247
248 IfxCcu6_T12hr_In *t12hr = pins->t12hr;
249
250 if (t12hr != NULL_PTR)
251 {
252 IfxCcu6_initT12hrPin(t12hr, pins->t1xhrInputMode);
253 }
254
255 IfxCcu6_T13hr_In *t13hr = pins->t13hr;
256
257 if (t13hr != NULL_PTR)
258 {
259 IfxCcu6_initT13hrPin(t13hr, pins->t1xhrInputMode);
260 }
261 }
262
263 /* -- hall pattern configuration (when to start the hall pattern evaluation) -- */
264
265 IfxCcu6_setHallSensorTriggerMode(ccu6SFR, config->hallSyncEvent);
266
267 /* -- interrupt initialisation -- */
268
269 if (config->interrupt1.priority > 0)
270 {
271 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt1.source);
272 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt1.source, config->interrupt1.serviceRequest);
273
274 volatile Ifx_SRC_SRCR *src;
275 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt1.serviceRequest);
276 IfxSrc_init(src, config->interrupt1.typeOfService, config->interrupt1.priority);
277 IfxSrc_enable(src);
278 }
279
280 if (config->interrupt2.priority > 0)
281 {
282 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt2.source);
283 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt2.source, config->interrupt2.serviceRequest);
284
285 volatile Ifx_SRC_SRCR *src;
286 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt2.serviceRequest);
287 IfxSrc_init(src, config->interrupt2.typeOfService, config->interrupt2.priority);
288 IfxSrc_enable(src);
289 }
290
291 if (config->interrupt3.priority > 0)
292 {
293 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt3.source);
294 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt3.source, config->interrupt3.serviceRequest);
295
296 volatile Ifx_SRC_SRCR *src;
297 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt3.serviceRequest);
298 IfxSrc_init(src, config->interrupt3.typeOfService, config->interrupt3.priority);
299 IfxSrc_enable(src);
300 }
301
302 if (config->interrupt4.priority > 0)
303 {
304 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt4.source);
305 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt4.source, config->interrupt4.serviceRequest);
306
307 volatile Ifx_SRC_SRCR *src;
308 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt4.serviceRequest);
309 IfxSrc_init(src, config->interrupt4.typeOfService, config->interrupt4.priority);
310 IfxSrc_enable(src);
311 }
312
313 /* -- output trigger initialisation --*/
314
315 if (config->trigger.outputTriggerEnabled)
316 {
317 IfxCcu6_connectTrigger(ccu6SFR, config->trigger.outputLine, config->trigger.outputTrigger);
318 }
319
320 pwmBc->trigger = config->trigger;
321 pwmBc->hallPatternIndex = 0;
322
323 #if IFX_CFG_USE_STANDARD_INTERFACE
324 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (uint32)pwmBc == ((uint32)&pwmBc->base));
325 pwmBc->base.functions.start = (PwmBc_Start) & IfxCcu6_PwmBc_start;
326 pwmBc->base.functions.stop = (PwmBc_Stop) & IfxCcu6_PwmBc_stop;
327 pwmBc->base.functions.updateHallPattern = (PwmBc_UpdateHallPattern) & IfxCcu6_PwmBc_updateHallPattern;
328 pwmBc->base.functions.getMotorSpeed = (PwmBc_GetMotorSpeed) & IfxCcu6_PwmBc_getMotorSpeed;
329 #endif
330 }
331
332
333 void IfxCcu6_PwmBc_initModuleConfig(IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
334 {
335 const IfxCcu6_PwmBc_Config defaultConfig = {
336 .base = {
337 .t12Frequency = 400000,
338 .t12Period = 100,
339 .t13Frequency = 400000,
340 .t13Period = 100,
341 .phaseDelay = 20,
342 .noiseFilter = 10,
343 .activeState = Ifx_ActiveState_high,
344 },
345
346 .ccu6 = NULL_PTR, // will be initialized below
347
348 .timer12 = {
349 .countMode = IfxCcu6_T12CountMode_edgeAligned,
350 .counterValue = 0,
351 },
352
353 .timer13 = {
354 .counterValue = 0,
355 .compareValue = 0,
356 .t12SyncEvent = IfxCcu6_T13TriggerEvent_noAction,
357 .t12SyncDirection = IfxCcu6_T13TriggerDirection_noAction,
358 },
359
360 .hallSyncEvent = IfxCcu6_HallSensorTriggerMode_t13PM,
361
362 .hallPatternIndex = 0,
363
364 .multiChannelControl = {
365 .switchingSelect = IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch,
366 .switchingSync = IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch,
367 },
368
369 .pins = NULL_PTR,
370
371 .interrupt1 = {
372 .source = IfxCcu6_InterruptSource_t12PeriodMatch,
373 .serviceRequest = IfxCcu6_ServiceRequest_0,
374 .priority = 0, // interrupt priority 0
375 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
376 },
377
378 .interrupt2 = {
379 .source = IfxCcu6_InterruptSource_t13PeriodMatch,
380 .serviceRequest = IfxCcu6_ServiceRequest_1,
381 .priority = 0, // interrupt priority 0
382 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
383 },
384
385 .interrupt3 = {
386 .source = IfxCcu6_InterruptSource_t12OneMatch,
387 .serviceRequest = IfxCcu6_ServiceRequest_2,
388 .priority = 0, // interrupt priority 0
389 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
390 },
391
392 .interrupt4 = {
393 .source = IfxCcu6_InterruptSource_trap,
394 .serviceRequest = IfxCcu6_ServiceRequest_3,
395 .priority = 0, // interrupt priority 0
396 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
397 },
398
399 .trigger = {
400 .t12ExtInputTrigger = NULL_PTR,
401 .t12ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge,
402 .t13ExtInputTrigger = NULL_PTR,
403 .t13ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge,
404 .t13InSyncWithT12 = FALSE,
405
406 .outputTriggerEnabled = TRUE,
407 .outputLine = IfxCcu6_TrigOut_0,
408 .outputTrigger = IfxCcu6_TrigSel_cout63,
409 },
410 };
411
412 /* Default Configuration */
413 *config = defaultConfig;
414
415 /* take over module pointer */
416 config->ccu6 = ccu6;
417 }
418
419
420 void IfxCcu6_PwmBc_start(IfxCcu6_PwmBc *pwmBc)
421 {
422 // enable shadow transfers
423 IfxCcu6_enableShadowTransfer(pwmBc->ccu6, TRUE, TRUE);
424
425 // internal start
426 if ((pwmBc->trigger.t13ExtInputTrigger == NULL_PTR) && (pwmBc->trigger.t12ExtInputTrigger == NULL_PTR))
427 {
428 // if T13 start is in sync with T12 start the T12
429 if (pwmBc->trigger.t13InSyncWithT12)
430 {
431 IfxCcu6_startTimer(pwmBc->ccu6, TRUE, FALSE);
432 }
433 else // start both timers
434 {
435 IfxCcu6_startTimer(pwmBc->ccu6, TRUE, TRUE);
436 }
437 }
438
439 // external start
440 else
441 {
442 // if T13 start is not in sync with T12
443 if (!(pwmBc->trigger.t13InSyncWithT12))
444 {
445 // T13 external start if selected
446 if (pwmBc->trigger.t13ExtInputTrigger != NULL_PTR)
447 {
448 IfxCcu6_setExternalRunMode(pwmBc->ccu6, IfxCcu6_TimerId_t13, pwmBc->trigger.t13ExtInputTriggerMode);
449 IfxCcu6_setT13InputSignal(pwmBc->ccu6, pwmBc->trigger.t13ExtInputTrigger);
450 }
451 else // internal start of T13 alone
452 {
453 IfxCcu6_startTimer(pwmBc->ccu6, FALSE, TRUE);
454 }
455 }
456 else
457 {}
458
459 // T12 external start if selected
460 if (pwmBc->trigger.t12ExtInputTrigger != NULL_PTR)
461 {
462 IfxCcu6_setExternalRunMode(pwmBc->ccu6, IfxCcu6_TimerId_t12, pwmBc->trigger.t12ExtInputTriggerMode);
463 IfxCcu6_setT12InputSignal(pwmBc->ccu6, pwmBc->trigger.t12ExtInputTrigger);
464 }
465 else // internal start of T12 alone
466 {
467 IfxCcu6_startTimer(pwmBc->ccu6, TRUE, FALSE);
468 }
469 }
470 }
471
472
473 void IfxCcu6_PwmBc_stop(IfxCcu6_PwmBc *pwmBc)
474 {
475 IfxCcu6_disableShadowTransfer(pwmBc->ccu6, TRUE, TRUE);
476
477 // if T13 start is in sync with T12, remove sync trigger
478 if (pwmBc->trigger.t13InSyncWithT12)
479 {
480 IfxCcu6_setT13TriggerEventMode(pwmBc->ccu6, IfxCcu6_T13TriggerEvent_noAction);
481 IfxCcu6_setT13TriggerEventDirection(pwmBc->ccu6, IfxCcu6_T13TriggerDirection_noAction);
482 }
483
484 // remove external triggers if any
485 if ((pwmBc->trigger.t13ExtInputTrigger != NULL_PTR) || (pwmBc->trigger.t12ExtInputTrigger != NULL_PTR))
486 {
487 if (pwmBc->trigger.t13ExtInputTrigger != NULL_PTR)
488 {
489 IfxCcu6_setExternalRunMode(pwmBc->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ExternalTriggerMode_disable);
490 }
491 else
492 {
493 IfxCcu6_setExternalRunMode(pwmBc->ccu6, IfxCcu6_TimerId_t12, IfxCcu6_ExternalTriggerMode_disable);
494 }
495 }
496 else
497 {}
498
499 // stop both timers
500 IfxCcu6_stopTimer(pwmBc->ccu6, TRUE, TRUE);
501
502 //disable Timer13 modulation output path for all T12 channel outs//
503
504 IfxCcu6_disableModulationOutput(pwmBc->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc0);
505 IfxCcu6_disableModulationOutput(pwmBc->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc1);
506 IfxCcu6_disableModulationOutput(pwmBc->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc2);
507 IfxCcu6_disableModulationOutput(pwmBc->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cout3);
508 }
509
510
511 void IfxCcu6_PwmBc_updateHallPattern(IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
512 {
513 uint8 index = pwmBc->hallPatternIndex;
514
515 IfxCcu6_updateHallPattern(pwmBc->ccu6, controlTable[index][0], controlTable[index][1], controlTable[index][2]);
516
517 index++;
518
519 if (index >= 6)
520 {
521 index = 0;
522 }
523
524 pwmBc->hallPatternIndex = index;
525 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxCcu6_PwmBc_Timer13::compareValue
uint16 compareValue
16-bit comapre value of Timer12
Definition: IfxCcu6_PwmBc.h:323
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2150
IfxCcu6_ServiceRequest_3
Service request output SR3.
Definition: IfxCcu6.h:235
IfxCcu6_ExternalTriggerMode_disable
The external setting of T1xR is disabled.
Definition: IfxCcu6.h:151
IfxCcu6_PwmBc_Config::interrupt2
IfxCcu6_PwmBc_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_PwmBc.h:369
IfxCcu6_PwmBc_getMotorSpeed
uint32 IfxCcu6_PwmBc_getMotorSpeed(IfxCcu6_PwmBc *pwmBc)
returns the current motor speed
Definition: IfxCcu6_PwmBc.c:53
IfxCcu6_setExternalRunMode
IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6.h:1984
PwmHl_s::t13Frequency
float32 t13Frequency
Actual timer13 frequency.
Definition: PwmHl.h:67
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:237
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:144
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxCcu6_PwmBc_Config
Configuration structure of the module.
Definition: IfxCcu6_PwmBc.h:358
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:88
PwmHl_Config::phaseDelay
Ifx_TimerValue phaseDelay
Specify the ticks before before updating each ouput hall pattern.
Definition: PwmHl.h:81
IfxCcu6_enableDeadTime
IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12.
Definition: IfxCcu6.h:1540
IfxCcu6_PwmBc_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_PwmBc.h:290
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:299
IfxCcu6_InterruptSource_t13PeriodMatch
Interrupt enable for T13 period-match.
Definition: IfxCcu6.h:196
IfxCcu6_PwmBc_Pins::outputMode
IfxPort_OutputMode outputMode
The pin output mode which should be configured.
Definition: IfxCcu6_PwmBc.h:302
IfxCcu6_PwmBc_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_PwmBc.h:307
IfxCcu6_PwmBc::base
PwmHl base
Base PWMHL object.
Definition: IfxCcu6_PwmBc.h:350
IfxCcu6_getCaptureShadowRegisterValue
uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel.
Definition: IfxCcu6.c:196
IfxCcu6_PwmBc_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_PwmBc.h:274
IfxCcu6_PwmBc_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxCcu6_PwmBc.h:303
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:176
IfxCcu6_PwmBc_Timer13::counterValue
uint16 counterValue
16-bit counter value of Timer13
Definition: IfxCcu6_PwmBc.h:322
IfxCcu6_setT13TriggerEventMode
IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare...
Definition: IfxCcu6.h:2121
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:128
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:197
IfxCcu6_PwmBc_MultiChannelControl::switchingSync
IfxCcu6_MultiChannelSwitchingSync switchingSync
Synchronization selection for the shadow transfer event MCM_ST.
Definition: IfxCcu6_PwmBc.h:285
IfxCcu6_enableTimer
IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed.
Definition: IfxCcu6.h:1626
IfxCcu6_setT12ChannelMode
IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels.
Definition: IfxCcu6.h:2071
PwmHl_Config::t12Frequency
float32 t12Frequency
Specify expected T12 PWM frequency in Hertz.
Definition: PwmHl.h:77
IfxCcu6_PwmBc_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_PwmBc.h:277
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCcu6_ServiceRequest_2
Service request output SR2.
Definition: IfxCcu6.h:234
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
PwmHl_Config::activeState
Ifx_ActiveState activeState
Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of w...
Definition: PwmHl.h:84
IfxCcu6_setDeadTimeValue
IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (...
Definition: IfxCcu6.h:1972
IfxCcu6_initCc62OutPin
IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin.
Definition: IfxCcu6.h:1789
IfxCcu6_initCout61Pin
IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin.
Definition: IfxCcu6.h:1848
IfxCcu6_PwmBc_Pins::cout61
IFX_CONST IfxCcu6_Cout61_Out * cout61
CC61 compare output COUT1.
Definition: IfxCcu6_PwmBc.h:296
IfxCcu6_routeInterruptNode
void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:283
IfxCcu6_PwmBc::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_PwmBc.h:351
IfxCcu6_PwmBc_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_PwmBc.h:306
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:337
IfxCcu6_PwmBc_Pins::cc61Out
IFX_CONST IfxCcu6_Cc61_Out * cc61Out
CC61 compare output CC1.
Definition: IfxCcu6_PwmBc.h:293
IfxCcu6_ChannelOut_cc1
CC61 compare output CC1.
Definition: IfxCcu6.h:114
IfxCcu6_getTimerAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability
Definition: IfxCcu6.h:1715
IfxCcu6_PwmBc_TriggerConfig::outputTriggerEnabled
boolean outputTriggerEnabled
Output trigger connection to VADC enable / disable choice.
Definition: IfxCcu6_PwmBc.h:337
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu6_PwmBc_Config::timer12
IfxCcu6_PwmBc_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_PwmBc.h:362
IfxCcu6_PwmBc_Config::interrupt4
IfxCcu6_PwmBc_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_PwmBc.h:371
IfxCcu6_setT12CounterValue
IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12.
Definition: IfxCcu6.h:2085
IfxCcu6_setT12Frequency
float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:377
IfxCcu6_PwmBc::hallPatternIndex
uint8 hallPatternIndex
Hall pattern index of motor control table.
Definition: IfxCcu6_PwmBc.h:353
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCcu6_PwmBc_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_PwmBc.h:314
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1603
IfxCcu6_setHallSensorTriggerMode
IFX_INLINE void IfxCcu6_setHallSensorTriggerMode(Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode)
Sets source for the sampling of the Hall input pattern and the comparison to the current and the expe...
Definition: IfxCcu6.h:1992
IfxCcu6_PwmBc_Config::hallSyncEvent
IfxCcu6_HallSensorTriggerMode hallSyncEvent
Hall pattern evaluation trigger selection (HSYNC)
Definition: IfxCcu6_PwmBc.h:365
IfxCcu6_PwmBc_stop
void IfxCcu6_PwmBc_stop(IfxCcu6_PwmBc *pwmBc)
Stops the Hall sensored based PWM.
Definition: IfxCcu6_PwmBc.c:473
IfxCcu6_initCout60Pin
IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin.
Definition: IfxCcu6.h:1841
IfxCcu6_PwmBc_Pins::ccpos1
IFX_CONST IfxCcu6_Ccpos1_In * ccpos1
CCPOS2 input signal.
Definition: IfxCcu6_PwmBc.h:300
IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch
A T13 zero-match triggers the shadow transfer.
Definition: IfxCcu6.h:223
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:168
IfxCcu6_PwmBc_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_PwmBc.h:325
IfxCcu6_PwmBc_Config::base
PwmHl_Config base
Base configuration.
Definition: IfxCcu6_PwmBc.h:360
IfxCcu6_PwmBc_MultiChannelControl::switchingSelect
IfxCcu6_MultiChannelSwitchingSelect switchingSelect
Trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP...
Definition: IfxCcu6_PwmBc.h:284
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:80
IfxCcu6_PwmBc_Pins::cc62Out
IFX_CONST IfxCcu6_Cc62_Out * cc62Out
CC62 compare output CC2.
Definition: IfxCcu6_PwmBc.h:294
PwmHl_Config::noiseFilter
Ifx_TimerValue noiseFilter
Specify hall sensor noise filter.
Definition: PwmHl.h:82
IfxCcu6_PwmBc_start
void IfxCcu6_PwmBc_start(IfxCcu6_PwmBc *pwmBc)
Starts the Hall sensored based PWM.
Definition: IfxCcu6_PwmBc.c:420
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1560
IfxCcu6_PwmBc_initModule
void IfxCcu6_PwmBc_initModule(IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_PwmBc.c:68
IfxCcu6_ChannelOut_cc0
CC60 compare output CC0.
Definition: IfxCcu6.h:112
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:336
IfxCcu6_setMultiChannelSwitchingMode
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS ...
Definition: IfxCcu6.h:2021
IfxCcu6_ExternalTriggerMode_risingEdge
Bit T1xR is set if a rising edge of signal T1xHR is detected.
Definition: IfxCcu6.h:152
IfxCcu6_PwmBc.h
CCU6 PWMBC details.
IfxCcu6_ChannelOut_cout3
CC63 compare output COUT3.
Definition: IfxCcu6.h:118
IfxCcu6_setT13InputSignal
void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:510
IfxCcu6_T13TriggerDirection_noAction
no action
Definition: IfxCcu6.h:310
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:152
IfxCcu6_initCc60OutPin
IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin.
Definition: IfxCcu6.h:1745
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:193
IfxCcu6_PwmBc_Pins::inputMode
IfxPort_InputMode inputMode
The CCPOSx pin input mode which should be configured.
Definition: IfxCcu6_PwmBc.h:304
IfxCcu6_PwmBc_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_PwmBc.h:305
IfxCcu6_PwmBc_initModuleConfig
void IfxCcu6_PwmBc_initModuleConfig(IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_PwmBc.c:333
IfxCcu6_PwmBc_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_PwmBc.h:275
IfxCcu6_PwmBc_TriggerConfig::outputLine
IfxCcu6_TrigOut outputLine
Trigger out selection.
Definition: IfxCcu6_PwmBc.h:338
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1914
IfxCcu6_PwmBc_Config::trigger
IfxCcu6_PwmBc_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_PwmBc.h:372
IfxCcu6_TrigOut_0
Output Trigger Select for CCU6061 TRIG0.
Definition: IfxCcu6_cfg.h:89
IfxCcu6_PwmBc_Pins::ccpos0
IFX_CONST IfxCcu6_Ccpos0_In * ccpos0
CCPOS0 input signal.
Definition: IfxCcu6_PwmBc.h:299
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxCcu6_initCcpos2Pin
IFX_INLINE void IfxCcu6_initCcpos2Pin(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin.
Definition: IfxCcu6.h:1826
IfxCcu6_HallSensorTriggerMode_t13PM
A T13 Period-Match.
Definition: IfxCcu6.h:168
IfxCcu6_initT12hrPin
IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin.
Definition: IfxCcu6.h:1884
IfxCcu6_setT12CompareValue
void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers)
Definition: IfxCcu6.c:360
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:136
IfxCcu6_ChannelOut_cc2
CC62 compare output CC2.
Definition: IfxCcu6.h:116
IfxCcu6_disableModulationOutput
void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12...
Definition: IfxCcu6.c:70
IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch
T12 channel 1 compare-match detected (phase delay function)
Definition: IfxCcu6.h:211
IfxCcu6_PwmBc_TriggerConfig::t12ExtInputTriggerMode
IfxCcu6_ExternalTriggerMode t12ExtInputTriggerMode
Event of signal T12HR that can set the run bit T12R by HW.
Definition: IfxCcu6_PwmBc.h:333
IfxCcu6_PwmBc_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External input signal selection for timer 13.
Definition: IfxCcu6_PwmBc.h:334
IfxCcu6_PwmBc_Pins::ccpos2
IFX_CONST IfxCcu6_Ccpos2_In * ccpos2
CCPOS2 input signal.
Definition: IfxCcu6_PwmBc.h:301
IfxCcu6_setT13CounterValue
IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13.
Definition: IfxCcu6.h:2103
IfxCcu6_PwmBc_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_PwmBc.h:276
IfxCcu6_PwmBc_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_PwmBc.h:324
IfxCcu6_PwmBc_Config::interrupt1
IfxCcu6_PwmBc_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_PwmBc.h:368
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_T13TriggerEvent_noAction
no action
Definition: IfxCcu6.h:321
IfxCcu6_initT13hrPin
IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin.
Definition: IfxCcu6.h:1899
IfxCcu6_TrigSel_cout63
Definition: IfxCcu6_cfg.h:96
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_updateHallPattern
IFX_INLINE void IfxCcu6_updateHallPattern(Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output)
Updates the hall pattern (current hall, expected hall, moduleation output), in a single write...
Definition: IfxCcu6.h:2160
IfxCcu6_connectTrigger
void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
Definition: IfxCcu6.c:53
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:194
IfxCcu6_T12Channel_0
T12 channel CC60.
Definition: IfxCcu6.h:260
IfxCcu6_PwmBc
Module handle.
Definition: IfxCcu6_PwmBc.h:348
IfxCcu6_T12Channel_1
T12 channel CC61.
Definition: IfxCcu6.h:261
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:233
PwmHl_Config::t12Period
Ifx_TimerValue t12Period
Specify expected T12 PWM period in ticks.
Definition: PwmHl.h:78
IfxCcu6_initCout63Pin
IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin.
Definition: IfxCcu6.h:1862
PwmHl_Config::t13Period
Ifx_TimerValue t13Period
Specify expected T13 PWM period in ticks.
Definition: PwmHl.h:80
IfxCcu6_PwmBc_TriggerConfig::t13ExtInputTriggerMode
IfxCcu6_ExternalTriggerMode t13ExtInputTriggerMode
Event of signal T13HR that can set the run bit T13R by HW.
Definition: IfxCcu6_PwmBc.h:335
IfxCcu6_setT12InputSignal
void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:426
IfxCcu6_T12Channel_2
T12 channel CC62.
Definition: IfxCcu6.h:262
IfxCcu6_PwmBc_Pins::cc60Out
IFX_CONST IfxCcu6_Cc60_Out * cc60Out
CC60 compare output CC0.
Definition: IfxCcu6_PwmBc.h:292
IfxCcu6_PwmBc_Config::pins
IfxCcu6_PwmBc_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_PwmBc.h:367
IfxCcu6_disableShadowTransfer
IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1478
IfxCcu6_PwmBc_Config::timer13
IfxCcu6_PwmBc_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_PwmBc.h:363
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:96
IfxCcu6_setT13TriggerEventDirection
IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction.
Definition: IfxCcu6.h:2115
IfxCcu6_PwmBc_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_PwmBc.h:336
IfxCcu6_initCcpos0Pin
IFX_INLINE void IfxCcu6_initCcpos0Pin(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin.
Definition: IfxCcu6.h:1796
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:160
IfxCcu6_initCout62Pin
IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin.
Definition: IfxCcu6.h:1855
IfxCcu6_setMultiChannelSwitchingSync
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
Sets the synchronization mechanism of the shadow transfer event MCM_ST if it has been requested befor...
Definition: IfxCcu6.h:2027
IfxCcu6_setT13CompareValue
IFX_INLINE void IfxCcu6_setT13CompareValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit compare value of Timer13 (writes into shadow register)
Definition: IfxCcu6.h:2097
IfxCcu6_PwmBc_Config::interrupt3
IfxCcu6_PwmBc_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_PwmBc.h:370
IfxCcu6_PwmBc_Config::multiChannelControl
IfxCcu6_PwmBc_MultiChannelControl multiChannelControl
Structure for multichannel mode control.
Definition: IfxCcu6_PwmBc.h:366
IfxCcu6_PwmBc_Pins::cout62
IFX_CONST IfxCcu6_Cout62_Out * cout62
CC62 compare output COUT2.
Definition: IfxCcu6_PwmBc.h:297
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2140
IfxCcu6_initCcpos1Pin
IFX_INLINE void IfxCcu6_initCcpos1Pin(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode)
Initialises a CCPOS1 input pin.
Definition: IfxCcu6.h:1811
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxCcu6_PwmBc_Pins::cout63
IFX_CONST IfxCcu6_Cout63_Out * cout63
CC63 compare output COUT3.
Definition: IfxCcu6_PwmBc.h:298
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCcu6_initCc61OutPin
IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin.
Definition: IfxCcu6.h:1767
IfxCcu6_PwmBc_TriggerConfig::outputTrigger
IfxCcu6_TrigSel outputTrigger
Trigger selection.
Definition: IfxCcu6_PwmBc.h:339
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxCcu6_PwmBc_Pins::cout60
IFX_CONST IfxCcu6_Cout60_Out * cout60
CC60 compare output COUT0.
Definition: IfxCcu6_PwmBc.h:295
IfxCcu6_disableDelayBypass
IFX_INLINE void IfxCcu6_disableDelayBypass(Ifx_CCU6 *ccu6)
Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC...
Definition: IfxCcu6.h:1459
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:145
IfxCcu6_T12ChannelMode_hallSensor
Hall Sensor Mode, In order to properly enable this mode, all three MSEL6x fields have to be programme...
Definition: IfxCcu6.h:275
IfxCcu6_enableModulationOutput
void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 ...
Definition: IfxCcu6.c:114
IfxCcu6_PwmBc_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External input signal selection for timer 12.
Definition: IfxCcu6_PwmBc.h:332
IfxCcu6_getCaptureRegisterValue
uint32 IfxCcu6_getCaptureRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel.
Definition: IfxCcu6.c:175
IfxCcu6_setT13Frequency
float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by ...
Definition: IfxCcu6.c:461
IfxCcu6_PwmBc_updateHallPattern
void IfxCcu6_PwmBc_updateHallPattern(IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
Updates the Hall pattern.
Definition: IfxCcu6_PwmBc.c:511
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:232
IfxCcu6_setOutputPassiveState
IFX_INLINE void IfxCcu6_setOutputPassiveState(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the state of the corresponding compare channel, that is considered to be the passive state...
Definition: IfxCcu6.h:2033


iLLD_TC26B: IfxCcu6_PwmBc.h Source File

  • Ccu6
  • PwmBc
IfxCcu6_PwmBc.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PwmBc.h
3 * \brief CCU6 PWMBC details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Ccu6_PwmBc_Usage How to use the CCU6 PWMBC Interface driver?
43 * \ingroup IfxLld_Ccu6_PwmBc
44 *
45 * The PWMBC interface driver provides a default CCU6 configuration specifically for running a Brush Less DC Motor using hall sensor inputs, by utilising both the timers
46 *
47 * After evaluating the hall input pattern at every T13 period match, new out pattern is given to the module after the phase delay at the T13 zero match
48 *
49 * User has to prepare the control table for the respective motor he/she is using,
50 *
51 * In the following sections it will be described, how to integrate the driver into the application framework.
52 *
53 *
54 * \section IfxLld_Ccu6_PwmBc_Preparation Preparation
55 *
56 *
57 * \subsection IfxLld_Ccu6_PwmBc_Include Include Files
58 *
59 * Include following header file into your C code:
60 * \code
61 * #include <Ccu6/PwmBc/IfxCcu6_PwmBc.h>
62 * \endcode
63 *
64 * \subsection IfxLld_Ccu6_PwmBc_Variables Variables
65 *
66 * Declare the PWMBC handle and the motor control table as global variables in your C code:
67 *
68 * \code
69 * // used globally
70 * static IfxCcu6_PwmBc pwmBc;
71 * // prepare the control table
72 * uint8 controlTable[6][3] = {{1, 5, 17} ,
73 * {2, 3, 36} ,
74 * {3, 1, 6} ,
75 * {4, 6, 18} ,
76 * {5, 4, 24} ,
77 * {6, 2, 9}};
78 * // to store value of the speed
79 * uint32 speed = 0;
80 * \endcode
81 *
82 * \subsection IfxLld_Ccu6_PwmBc_Interrupt Interrupt Handler Installation
83 *
84 * See also \ref IfxLld_Cpu_Irq_Usage
85 *
86 * Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
87 * \code
88 * // priorities are normally defined in Ifx_IntPrioDef.h
89 * #define IFX_INTPRIO_CCU6 1
90 * \endcode
91 *
92 * Add the interrupt service routine to your C code.
93 * \code
94 * IFX_INTERRUPT(ccu60ISR_PwmBc, 0, IFX_INTPRIO_CCU6)
95 * {
96 * //user code
97 * }
98 * \endcode
99 *
100 * Finally install the interrupt handlers in your initialisation function:
101 * \code
102 * // install interrupt handlers
103 * IfxCpu_Irq_installInterruptHandler(&ccu60ISR_PwmBc, IFX_INTPRIO_CCU6);
104 * IfxCpu_enableInterrupts();
105 * \endcode
106 *
107 * \subsection IfxLld_Ccu6_PwmBc_Init Module Initialisation
108 *
109 * The module initialisation can be done in the same function. Here an example:
110 *
111 * \code
112 * // create configuration
113 * IfxCcu6_PwmBc_Config pwmBcConfig;
114 * IfxCcu6_PwmBc_initModuleConfig(&pwmBcConfig, &MODULE_CCU60);
115 *
116 * // configure the frequencies of both the timers
117 * pwmBcConfig.base.t12Frequency = 400000;
118 * pwmBcConfig.base.t13Frequency = 400000;
119 *
120 * // configure the periods of both the timers
121 * pwmBcConfig.base.t12Period = 100;
122 * pwmBcConfig.base.t13Period = 100;
123 *
124 * // configure the phase delay and noise filter for hall input
125 * pwmBcConfig.base.phaseDelay = 20;
126 * pwmBcConfig.base.noiseFilter = 10;
127 *
128 * // select the active state of the output
129 * pwmBcConfig.base.activeState = Ifx_ActiveState_high;
130 *
131 * // configure timer12
132 * pwmBcConfig.timer12.countMode = IfxCcu6_T12CountMode_edgeAligned;
133 * pwmBcConfig.timer12.counterValue = 0;
134 *
135 * // configure timer13
136 * pwmBcConfig.timer13.counterValue = 0;
137 * pwmBcConfig.timer13.compareValue = 100;
138 * // configure the syncronisation, in case of sync start with T12
139 * pwmBcConfig.timer13.t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare;
140 * pwmBcConfig.timer13.t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp;
141 *
142 * // configure hall sync event that starts the hall input pattern evaluation
143 * pwmBcConfig.hallSyncEvent = IfxCcu6_HallSensorTriggerMode_t13PM,
144 *
145 * // configure multi channel control
146 * pwmBcConfig.multiChannelControl.switchingSelect = IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch,
147 * pwmBcConfig.multiChannelControl.switchingSync = IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch,
148 *
149 * // pin configuration
150 * const IfxCcu6_PwmBc_Pins pins = {
151 * IfxCcu60_CC60_P02_0_OUT, // CC60Out pin
152 * IfxCcu60_CC61_P02_2_OUT, // CC61Out pin
153 * IfxCcu60_CC62_P02_4_OUT, // CC62Out pin
154 * IfxCcu60_COUT60_P02_1_OUT, // COUT60 pin
155 * IfxCcu60_COUT60_P02_3_OUT, // COUT61 pin
156 * IfxCcu60_COUT60_P02_5_OUT, // COUT62 pin
157 * NULL, // COUT63 pin not used
158 *
159 * IfxCcu60_COUT60_P02_6_OUT // CCPOS0In pin
160 * IfxCcu60_COUT60_P02_7_OUT // CCPOS1In pin
161 * IfxCcu60_COUT60_P02_8_OUT // CCPOS2In pin
162 *
163 * IfxPort_OutputMode_pushPull,
164 * IfxPort_PadDriver_cmosAutomotiveSpeed1,
165 * IfxPort_InputMode_pullUp
166 * };
167 * pwmBcConfig.pins = &pins;
168 *
169 * // configure the interrupts
170 * pwmBcConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_cc61FallingEdge;
171 * pwmBcConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
172 * pwmBcConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
173 * pwmBcConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
174 *
175 * // configure input and output triggers
176 * pwmBcConfig.trigger.t12ExtInputTrigger = NULL_PTR;
177 * pwmBcConfig.trigger.t12ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
178 * pwmBcConfig.trigger.t13ExtInputTrigger = NULL_PTR;
179 * pwmBcConfig.trigger.t13ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
180 * pwmBcConfig.trigger.t13InSyncWithT12 = FALSE;
181 *
182 * pwmBcConfig.trigger.outputTriggerEnabled = TRUE;
183 * pwmBcConfig.trigger.outputLine = IfxCcu6_TrigOut_0;
184 * pwmBcConfig.trigger.outputTrigger = IfxCcu6_TrigSel_cout63;
185 *
186 *
187 * // initialize the module
188 * IfxCcu6_PwmBc_initModule(&pwmBc, &pwmBcConfig);
189 * \endcode
190 *
191 *
192 * The PwmBc is ready for use now!
193 *
194 *
195 * \section IfxLld_Ccu6_PwmBc_ModulationControl Modulation Control
196 *
197 *
198 * The PWMBC driver provides simple to use Motor Control functions
199 *
200 * This means: you can start, stop, the BLDC motor once the module is initialised with the appropriate configuration
201 * You can optionally get the speed of the motor at any point of time
202 *
203 * Start the motor
204 *
205 * \code
206 * IfxCcu6_PwmBc_start(&pwmBc);
207 * \endcode
208 *
209 * Stop the motor
210 *
211 * \code
212 * IfxCcu6_PwmBc_stop(&pwmBc);
213 * \endcode
214 *
215 * Update the output pattern
216 *
217 * \code
218 * // prepare the control table
219 * // assumed to be declared globally
220 * uint8 controlTable[6][3] = {{1, 5, 17} ,
221 * {2, 3, 36} ,
222 * {3, 1, 6} ,
223 * {4, 6, 18} ,
224 * {5, 4, 24} ,
225 * {6, 2, 9}};
226 *
227 * // update the output pattern
228 * IfxCcu6_PwmBc_updateHallPattern(&pwmBc, controlTable[6][3]);
229 * \endcode
230 *
231 * Get the current motor speed
232 * (can also be called in ISR)
233 *
234 * \code
235 * // assumed to be declared globally
236 * uint32 speed = 0;
237 *
238 * // get the current motor speed
239 * speed = IfxCcu6_PwmBc_getMotorSpeed(&pwmBc);
240 * \endcode
241 *
242 * \defgroup IfxLld_Ccu6_PwmBc PWMBC Interface driver
243 * \ingroup IfxLld_Ccu6
244 * \defgroup IfxLld_Ccu6_PwmBc_DataStructures Data Structures
245 * \ingroup IfxLld_Ccu6_PwmBc
246 * \defgroup IfxLld_Ccu6_PwmBc_Module_Initialize_Functions Module Initialize Functions
247 * \ingroup IfxLld_Ccu6_PwmBc
248 * \defgroup IfxLld_Ccu6_PwmBc_Modulation_Control_Functions Modulation Control Functions
249 * \ingroup IfxLld_Ccu6_PwmBc
250 * \defgroup IfxLld_Ccu6_PwmBc_Hall_Pattern_Functions Hall Pattern Functions
251 * \ingroup IfxLld_Ccu6_PwmBc
252 */
253
254 #ifndef IFXCCU6_PWMBC_H
255 #define IFXCCU6_PWMBC_H 1
256
257 /******************************************************************************/
258 /*----------------------------------Includes----------------------------------*/
259 /******************************************************************************/
260
261 #include "Ccu6/Std/IfxCcu6.h"
262 #include "If/Ccu6If/PwmHl.h"
263
264 /******************************************************************************/
265 /*-----------------------------Data Structures--------------------------------*/
266 /******************************************************************************/
267
268 /** \addtogroup IfxLld_Ccu6_PwmBc_DataStructures
269 * \{ */
270 /** \brief Structure for interrupt configuration
271 */
272 typedef struct
273 {
274 IfxCcu6_InterruptSource source; /**< \brief Interrupt source selection */
275 IfxCcu6_ServiceRequest serviceRequest; /**< \brief Selection of service request outputs */
276 uint16 priority; /**< \brief Interrupt priority */
277 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
278 } IfxCcu6_PwmBc_InterruptConfig;
279
280 /** \brief Structure for multichannel mode control
281 */
282 typedef struct
283 {
284 IfxCcu6_MultiChannelSwitchingSelect switchingSelect; /**< \brief Trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP */
285 IfxCcu6_MultiChannelSwitchingSync switchingSync; /**< \brief Synchronization selection for the shadow transfer event MCM_ST */
286 } IfxCcu6_PwmBc_MultiChannelControl;
287
288 /** \brief Structure for CCU6 output pin configuration
289 */
290 typedef struct
291 {
292 IFX_CONST IfxCcu6_Cc60_Out *cc60Out; /**< \brief CC60 compare output CC0 */
293 IFX_CONST IfxCcu6_Cc61_Out *cc61Out; /**< \brief CC61 compare output CC1 */
294 IFX_CONST IfxCcu6_Cc62_Out *cc62Out; /**< \brief CC62 compare output CC2 */
295 IFX_CONST IfxCcu6_Cout60_Out *cout60; /**< \brief CC60 compare output COUT0 */
296 IFX_CONST IfxCcu6_Cout61_Out *cout61; /**< \brief CC61 compare output COUT1 */
297 IFX_CONST IfxCcu6_Cout62_Out *cout62; /**< \brief CC62 compare output COUT2 */
298 IFX_CONST IfxCcu6_Cout63_Out *cout63; /**< \brief CC63 compare output COUT3 */
299 IFX_CONST IfxCcu6_Ccpos0_In *ccpos0; /**< \brief CCPOS0 input signal */
300 IFX_CONST IfxCcu6_Ccpos1_In *ccpos1; /**< \brief CCPOS2 input signal */
301 IFX_CONST IfxCcu6_Ccpos2_In *ccpos2; /**< \brief CCPOS2 input signal */
302 IfxPort_OutputMode outputMode; /**< \brief The pin output mode which should be configured */
303 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
304 IfxPort_InputMode inputMode; /**< \brief The CCPOSx pin input mode which should be configured */
305 IFX_CONST IfxCcu6_T12hr_In *t12hr; /**< \brief T12HR input signal */
306 IFX_CONST IfxCcu6_T13hr_In *t13hr; /**< \brief T13HR input signal */
307 IfxPort_InputMode t1xhrInputMode; /**< \brief The T1xHR pin input mode which should be configured */
308 } IfxCcu6_PwmBc_Pins;
309
310 /** \brief Structure for Timer 12
311 */
312 typedef struct
313 {
314 IfxCcu6_T12CountMode countMode; /**< \brief Operating mode of Timer 12 */
315 uint16 counterValue; /**< \brief 16-bit counter value of Timer12 */
316 } IfxCcu6_PwmBc_Timer12;
317
318 /** \brief Structure for Timer 13
319 */
320 typedef struct
321 {
322 uint16 counterValue; /**< \brief 16-bit counter value of Timer13 */
323 uint16 compareValue; /**< \brief 16-bit comapre value of Timer12 */
324 IfxCcu6_T13TriggerEvent t12SyncEvent; /**< \brief T12 sync trigger event to start T13 */
325 IfxCcu6_T13TriggerDirection t12SyncDirection; /**< \brief Additional information to control trigger event selection */
326 } IfxCcu6_PwmBc_Timer13;
327
328 /** \brief Configuration structure for external triggers
329 */
330 typedef struct
331 {
332 IfxCcu6_T12hr_In *t12ExtInputTrigger; /**< \brief External input signal selection for timer 12 */
333 IfxCcu6_ExternalTriggerMode t12ExtInputTriggerMode; /**< \brief Event of signal T12HR that can set the run bit T12R by HW */
334 IfxCcu6_T13hr_In *t13ExtInputTrigger; /**< \brief External input signal selection for timer 13 */
335 IfxCcu6_ExternalTriggerMode t13ExtInputTriggerMode; /**< \brief Event of signal T13HR that can set the run bit T13R by HW */
336 boolean t13InSyncWithT12; /**< \brief Selection of Timer 13 start in sync with T12 */
337 boolean outputTriggerEnabled; /**< \brief Output trigger connection to VADC enable / disable choice */
338 IfxCcu6_TrigOut outputLine; /**< \brief Trigger out selection */
339 IfxCcu6_TrigSel outputTrigger; /**< \brief Trigger selection */
340 } IfxCcu6_PwmBc_TriggerConfig;
341
342 /** \} */
343
344 /** \addtogroup IfxLld_Ccu6_PwmBc_DataStructures
345 * \{ */
346 /** \brief Module handle
347 */
348 typedef struct
349 {
350 PwmHl base; /**< \brief Base PWMHL object */
351 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
352 IfxCcu6_PwmBc_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
353 uint8 hallPatternIndex; /**< \brief Hall pattern index of motor control table */
354 } IfxCcu6_PwmBc;
355
356 /** \brief Configuration structure of the module
357 */
358 typedef struct
359 {
360 PwmHl_Config base; /**< \brief Base configuration */
361 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
362 IfxCcu6_PwmBc_Timer12 timer12; /**< \brief Structure for Timer 12 */
363 IfxCcu6_PwmBc_Timer13 timer13; /**< \brief Structure for Timer 13 */
364 uint8 hallPatternIndex; /**< \brief Hall pattern index of motor control table */
365 IfxCcu6_HallSensorTriggerMode hallSyncEvent; /**< \brief Hall pattern evaluation trigger selection (HSYNC) */
366 IfxCcu6_PwmBc_MultiChannelControl multiChannelControl; /**< \brief Structure for multichannel mode control */
367 IfxCcu6_PwmBc_Pins *pins; /**< \brief Structure for CCU6 output pin configuration */
368 IfxCcu6_PwmBc_InterruptConfig interrupt1; /**< \brief Structure for first interrupt configuration */
369 IfxCcu6_PwmBc_InterruptConfig interrupt2; /**< \brief Structure for second interrupt configuration */
370 IfxCcu6_PwmBc_InterruptConfig interrupt3; /**< \brief Structure for third interrupt configuration */
371 IfxCcu6_PwmBc_InterruptConfig interrupt4; /**< \brief Structure for fourth interrupt configuration */
372 IfxCcu6_PwmBc_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
373 } IfxCcu6_PwmBc_Config;
374
375 /** \} */
376
377 /** \addtogroup IfxLld_Ccu6_PwmBc_Module_Initialize_Functions
378 * \{ */
379
380 /******************************************************************************/
381 /*-------------------------Global Function Prototypes-------------------------*/
382 /******************************************************************************/
383
384 /** \brief Initialises the module with default configuration
385 * \param pwmBc Module handle
386 * \param config Configuration structure of the module
387 * \return None
388 *
389 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
390 *
391 */
392 IFX_EXTERN void IfxCcu6_PwmBc_initModule(IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config);
393
394 /** \brief Fills the config structure with default values
395 * \param config Configuration structure of the module
396 * \param ccu6 Pointer to the base of CCU6 registers
397 * \return None
398 *
399 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
400 *
401 */
402 IFX_EXTERN void IfxCcu6_PwmBc_initModuleConfig(IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6);
403
404 /** \} */
405
406 /** \addtogroup IfxLld_Ccu6_PwmBc_Modulation_Control_Functions
407 * \{ */
408
409 /******************************************************************************/
410 /*-------------------------Global Function Prototypes-------------------------*/
411 /******************************************************************************/
412
413 /** \brief Starts the Hall sensored based PWM
414 * \param pwmBc Module handle
415 * \return None
416 *
417 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
418 *
419 */
420 IFX_EXTERN void IfxCcu6_PwmBc_start(IfxCcu6_PwmBc *pwmBc);
421
422 /** \brief Stops the Hall sensored based PWM
423 * \param pwmBc Module handle
424 * \return None
425 *
426 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
427 *
428 */
429 IFX_EXTERN void IfxCcu6_PwmBc_stop(IfxCcu6_PwmBc *pwmBc);
430
431 /** \} */
432
433 /** \addtogroup IfxLld_Ccu6_PwmBc_Hall_Pattern_Functions
434 * \{ */
435
436 /******************************************************************************/
437 /*-------------------------Global Function Prototypes-------------------------*/
438 /******************************************************************************/
439
440 /** \brief returns the current motor speed
441 * \param pwmBc Module handle
442 * \return speed
443 *
444 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
445 *
446 */
447 IFX_EXTERN uint32 IfxCcu6_PwmBc_getMotorSpeed(IfxCcu6_PwmBc *pwmBc);
448
449 /** \brief Updates the Hall pattern
450 * \param pwmBc Module handle
451 * \param controlTable Motor Control table
452 * \return None
453 *
454 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
455 *
456 */
457 IFX_EXTERN void IfxCcu6_PwmBc_updateHallPattern(IfxCcu6_PwmBc * pwmBc, uint8 controlTable[6][3]);
458
459 /** \} */
460
461 #endif /* IFXCCU6_PWMBC_H */
IfxCcu6_PwmBc_Timer13::compareValue
uint16 compareValue
16-bit comapre value of Timer12
Definition: IfxCcu6_PwmBc.h:323
IfxCcu6_PwmBc_Config::interrupt2
IfxCcu6_PwmBc_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_PwmBc.h:369
IfxCcu6_PwmBc_getMotorSpeed
IFX_EXTERN uint32 IfxCcu6_PwmBc_getMotorSpeed(IfxCcu6_PwmBc *pwmBc)
returns the current motor speed
Definition: IfxCcu6_PwmBc.c:53
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:144
IfxCcu6_PwmBc_Config
Configuration structure of the module.
Definition: IfxCcu6_PwmBc.h:358
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:88
IfxCcu6_PwmBc_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_PwmBc.h:290
IfxCcu6_PwmBc_Pins::outputMode
IfxPort_OutputMode outputMode
The pin output mode which should be configured.
Definition: IfxCcu6_PwmBc.h:302
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:179
IfxCcu6_MultiChannelSwitchingSelect
IfxCcu6_MultiChannelSwitchingSelect
Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST fro...
Definition: IfxCcu6.h:205
IfxCcu6_PwmBc_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_PwmBc.h:307
IfxCcu6_PwmBc::base
PwmHl base
Base PWMHL object.
Definition: IfxCcu6_PwmBc.h:350
IfxCcu6_PwmBc_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_PwmBc.h:274
IfxCcu6_PwmBc_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxCcu6_PwmBc.h:303
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:176
IfxCcu6_PwmBc_Timer12::counterValue
uint16 counterValue
16-bit counter value of Timer12
Definition: IfxCcu6_PwmBc.h:315
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:128
IfxCcu6_PwmBc_InterruptConfig
Structure for interrupt configuration.
Definition: IfxCcu6_PwmBc.h:272
IfxCcu6_PwmBc_MultiChannelControl::switchingSync
IfxCcu6_MultiChannelSwitchingSync switchingSync
Synchronization selection for the shadow transfer event MCM_ST.
Definition: IfxCcu6_PwmBc.h:285
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxCcu6_PwmBc_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_PwmBc.h:277
uint32
unsigned long uint32
Definition: Platform_Types.h:116
PwmHl_Config
Configuration structure of the TPwm interface.
Definition: PwmHl.h:75
IfxCcu6_HallSensorTriggerMode
IfxCcu6_HallSensorTriggerMode
Defines the source for the sampling of the Hall input pattern and the comparison to the current and t...
Definition: IfxCcu6.h:163
IfxCcu6_PwmBc_Pins::cout61
IFX_CONST IfxCcu6_Cout61_Out * cout61
CC61 compare output COUT1.
Definition: IfxCcu6_PwmBc.h:296
IfxCcu6_T13TriggerDirection
IfxCcu6_T13TriggerDirection
Delivers additional information to control the automatic set of bit T13R in the case that the trigger...
Definition: IfxCcu6.h:308
IfxCcu6_PwmBc_Timer12
Structure for Timer 12.
Definition: IfxCcu6_PwmBc.h:312
IfxCcu6_PwmBc_Timer13
Structure for Timer 13.
Definition: IfxCcu6_PwmBc.h:320
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCcu6_PwmBc::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_PwmBc.h:351
IfxCcu6_PwmBc_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_PwmBc.h:306
IfxCcu6_PwmBc_Pins::cc61Out
IFX_CONST IfxCcu6_Cc61_Out * cc61Out
CC61 compare output CC1.
Definition: IfxCcu6_PwmBc.h:293
PwmHl.h
Multi-channels, dual-complementary PWM interface.
IfxCcu6_PwmBc_TriggerConfig::outputTriggerEnabled
boolean outputTriggerEnabled
Output trigger connection to VADC enable / disable choice.
Definition: IfxCcu6_PwmBc.h:337
IfxCcu6_PwmBc_Config::timer12
IfxCcu6_PwmBc_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_PwmBc.h:362
IfxCcu6_PwmBc_Config::interrupt4
IfxCcu6_PwmBc_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_PwmBc.h:371
IfxCcu6_PwmBc::hallPatternIndex
uint8 hallPatternIndex
Hall pattern index of motor control table.
Definition: IfxCcu6_PwmBc.h:353
PwmHl_s
Structure of the TPwm interface.
Definition: PwmHl.h:63
IfxCcu6_PwmBc_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_PwmBc.h:314
IfxCcu6_PwmBc_Config::hallSyncEvent
IfxCcu6_HallSensorTriggerMode hallSyncEvent
Hall pattern evaluation trigger selection (HSYNC)
Definition: IfxCcu6_PwmBc.h:365
IfxCcu6_PwmBc_stop
IFX_EXTERN void IfxCcu6_PwmBc_stop(IfxCcu6_PwmBc *pwmBc)
Stops the Hall sensored based PWM.
Definition: IfxCcu6_PwmBc.c:473
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCcu6_PwmBc_Pins::ccpos1
IFX_CONST IfxCcu6_Ccpos1_In * ccpos1
CCPOS2 input signal.
Definition: IfxCcu6_PwmBc.h:300
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:168
IfxCcu6_PwmBc_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_PwmBc.h:325
IfxCcu6_PwmBc_Config::base
PwmHl_Config base
Base configuration.
Definition: IfxCcu6_PwmBc.h:360
IfxCcu6_PwmBc_MultiChannelControl::switchingSelect
IfxCcu6_MultiChannelSwitchingSelect switchingSelect
Trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP...
Definition: IfxCcu6_PwmBc.h:284
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:80
IfxCcu6_PwmBc_Pins::cc62Out
IFX_CONST IfxCcu6_Cc62_Out * cc62Out
CC62 compare output CC2.
Definition: IfxCcu6_PwmBc.h:294
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu6_PwmBc_start
IFX_EXTERN void IfxCcu6_PwmBc_start(IfxCcu6_PwmBc *pwmBc)
Starts the Hall sensored based PWM.
Definition: IfxCcu6_PwmBc.c:420
IfxCcu6_PwmBc_initModule
IFX_EXTERN void IfxCcu6_PwmBc_initModule(IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_PwmBc.c:68
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:152
IfxCcu6_PwmBc_TriggerConfig
Configuration structure for external triggers.
Definition: IfxCcu6_PwmBc.h:330
IfxCcu6.h
CCU6 basic functionality.
IfxCcu6_PwmBc_Pins::inputMode
IfxPort_InputMode inputMode
The CCPOSx pin input mode which should be configured.
Definition: IfxCcu6_PwmBc.h:304
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:230
IfxCcu6_T13TriggerEvent
IfxCcu6_T13TriggerEvent
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare sign...
Definition: IfxCcu6.h:319
IfxCcu6_PwmBc_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_PwmBc.h:305
IfxCcu6_PwmBc_initModuleConfig
IFX_EXTERN void IfxCcu6_PwmBc_initModuleConfig(IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_PwmBc.c:333
IfxCcu6_PwmBc_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_PwmBc.h:275
IfxCcu6_PwmBc_TriggerConfig::outputLine
IfxCcu6_TrigOut outputLine
Trigger out selection.
Definition: IfxCcu6_PwmBc.h:338
IfxCcu6_PwmBc::trigger
IfxCcu6_PwmBc_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_PwmBc.h:352
IfxCcu6_PwmBc_Pins::ccpos0
IFX_CONST IfxCcu6_Ccpos0_In * ccpos0
CCPOS0 input signal.
Definition: IfxCcu6_PwmBc.h:299
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:297
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:136
IfxCcu6_PwmBc_TriggerConfig::t12ExtInputTriggerMode
IfxCcu6_ExternalTriggerMode t12ExtInputTriggerMode
Event of signal T12HR that can set the run bit T12R by HW.
Definition: IfxCcu6_PwmBc.h:333
IfxCcu6_PwmBc_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External input signal selection for timer 13.
Definition: IfxCcu6_PwmBc.h:334
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxCcu6_PwmBc_Pins::ccpos2
IFX_CONST IfxCcu6_Ccpos2_In * ccpos2
CCPOS2 input signal.
Definition: IfxCcu6_PwmBc.h:301
IfxCcu6_ExternalTriggerMode
IfxCcu6_ExternalTriggerMode
Defines the event of signal T1xHR that can set the run bit T1xR by HW Definition in Ifx_CCU...
Definition: IfxCcu6.h:149
IfxCcu6_PwmBc_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_PwmBc.h:276
IfxCcu6_PwmBc_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_PwmBc.h:324
IfxCcu6_PwmBc_Config::interrupt1
IfxCcu6_PwmBc_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_PwmBc.h:368
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_PwmBc_MultiChannelControl
Structure for multichannel mode control.
Definition: IfxCcu6_PwmBc.h:282
IfxCcu6_PwmBc
Module handle.
Definition: IfxCcu6_PwmBc.h:348
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxCcu6_PwmBc_TriggerConfig::t13ExtInputTriggerMode
IfxCcu6_ExternalTriggerMode t13ExtInputTriggerMode
Event of signal T13HR that can set the run bit T13R by HW.
Definition: IfxCcu6_PwmBc.h:335
IfxCcu6_PwmBc_Pins::cc60Out
IFX_CONST IfxCcu6_Cc60_Out * cc60Out
CC60 compare output CC0.
Definition: IfxCcu6_PwmBc.h:292
IfxCcu6_TrigSel
IfxCcu6_TrigSel
Definition: IfxCcu6_cfg.h:94
IfxCcu6_PwmBc_Config::pins
IfxCcu6_PwmBc_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_PwmBc.h:367
IfxCcu6_PwmBc_Config::timer13
IfxCcu6_PwmBc_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_PwmBc.h:363
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:96
IfxCcu6_PwmBc_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_PwmBc.h:336
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:160
IfxCcu6_PwmBc_Config::interrupt3
IfxCcu6_PwmBc_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_PwmBc.h:370
IfxCcu6_TrigOut
IfxCcu6_TrigOut
Definition: IfxCcu6_cfg.h:87
IfxCcu6_PwmBc_Config::multiChannelControl
IfxCcu6_PwmBc_MultiChannelControl multiChannelControl
Structure for multichannel mode control.
Definition: IfxCcu6_PwmBc.h:366
IfxCcu6_MultiChannelSwitchingSync
IfxCcu6_MultiChannelSwitchingSync
Selection of the synchronization mechanism for the shadow transfer event MCM_ST Definition in Ifx_CCU...
Definition: IfxCcu6.h:219
IfxCcu6_PwmBc_Pins::cout62
IFX_CONST IfxCcu6_Cout62_Out * cout62
CC62 compare output COUT2.
Definition: IfxCcu6_PwmBc.h:297
IfxCcu6_PwmBc_Pins::cout63
IFX_CONST IfxCcu6_Cout63_Out * cout63
CC63 compare output COUT3.
Definition: IfxCcu6_PwmBc.h:298
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCcu6_PwmBc_TriggerConfig::outputTrigger
IfxCcu6_TrigSel outputTrigger
Trigger selection.
Definition: IfxCcu6_PwmBc.h:339
IfxCcu6_PwmBc_Pins::cout60
IFX_CONST IfxCcu6_Cout60_Out * cout60
CC60 compare output COUT0.
Definition: IfxCcu6_PwmBc.h:295
IfxCcu6_PwmBc_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External input signal selection for timer 12.
Definition: IfxCcu6_PwmBc.h:332
IfxCcu6_PwmBc_updateHallPattern
IFX_EXTERN void IfxCcu6_PwmBc_updateHallPattern(IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
Updates the Hall pattern.
Definition: IfxCcu6_PwmBc.c:511


iLLD_TC26B: IfxCcu6_PwmHl.c Source File

  • Ccu6
  • PwmHl
IfxCcu6_PwmHl.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PwmHl.c
3 * \brief CCU6 PWMHL details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxCcu6_PwmHl.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "stddef.h"
49 #include "string.h"
50
51 /** \addtogroup IfxLld_Ccu6_PwmHl_StdIf_Functions
52 * \{ */
53
54 /******************************************************************************/
55 /*-----------------------Private Function Prototypes--------------------------*/
56 /******************************************************************************/
57
58 /** \brief Turn-off the complementary PWM generation mode.
59 *
60 * \note The changes are not applied until Timer->applyUpdate() is called.
61 * \note This function will set the ON time to ZERO, overriding previous call to
62 * IfxCcu6_PwmHl_setOnTime().
63 * \note This function will disable PWM in all channels, overriding previous call to
64 * IfxCcu6_PwmHl_setupChannels().
65 * \param driver CCU6 PWM driver
66 * \return None
67 */
68 IFX_STATIC void IfxCcu6_PwmHl_disable(IfxCcu6_PwmHl *driver);
69
70 /** \brief Turn-on the complementary PWM generation mode.
71 *
72 * \note The changes are not applied until Timer->applyUpdate() is called.
73 * \note This function will disable PWM in all channels, overriding previous call to
74 * IfxCcu6_PwmHl_setupChannels().
75 * \param driver CCU6 PWM driver
76 * \return None
77 */
78 IFX_STATIC void IfxCcu6_PwmHl_enable(IfxCcu6_PwmHl *driver);
79
80 /** \brief Sets up the output pins
81 * \param module Pointer to register base
82 * \param config CCU6 : PWM HL configuration
83 * \return None
84 */
85 IFX_STATIC void IfxCcu6_PwmHl_setOutputPins(Ifx_CCU6 *module, const IfxCcu6_PwmHl_Config *config);
86
87 /** \brief Updates the x output duty cycle in center aligned and center aligned inverted modes
88 * \param driver CCU6 PWM driver
89 * \param tOn T on
90 * \return None
91 */
92 IFX_STATIC void IfxCcu6_PwmHl_updateCenterAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn);
93
94 /** \brief Updates the x output duty cycle in edge aligned modes (left and right aligned)
95 * \param driver CCU6 PWM driver
96 * \param tOn T on
97 * \return None
98 */
99 IFX_STATIC void IfxCcu6_PwmHl_updateEdgeAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn);
100
101 /** \brief Set the outputs to inactive
102 * \param driver CCU6 PWM driver
103 * \param tOn T on
104 * \return None
105 */
106 IFX_STATIC void IfxCcu6_PwmHl_updateOff(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn);
107
108 /** \} */
109
110 /******************************************************************************/
111 /*------------------------Private Variables/Constants-------------------------*/
112 /******************************************************************************/
113
114 IFX_STATIC IFX_CONST IfxCcu6_PwmHl_Mode IfxCcu6_PwmHl_modes[Ifx_Pwm_Mode_off + 1] = {
115 {Ifx_Pwm_Mode_centerAligned, FALSE, &IfxCcu6_PwmHl_updateCenterAligned},
116 {Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxCcu6_PwmHl_updateCenterAligned},
117 {Ifx_Pwm_Mode_leftAligned, FALSE, &IfxCcu6_PwmHl_updateEdgeAligned },
118 {Ifx_Pwm_Mode_rightAligned, TRUE, &IfxCcu6_PwmHl_updateEdgeAligned },
119 {Ifx_Pwm_Mode_off, FALSE, &IfxCcu6_PwmHl_updateOff }
120 };
121
122 /******************************************************************************/
123 /*-------------------------Function Implementations---------------------------*/
124 /******************************************************************************/
125
126 IFX_STATIC void IfxCcu6_PwmHl_disable(IfxCcu6_PwmHl *driver)
127 {
128 IfxCcu6_TimerWithTrigger *timer = driver->timer;
129 Ifx_CCU6 *module = timer->ccu6;
130 Ifx_CCU6_CMPSTAT cmpstat;
131
132 Ifx_TimerValue tOn[3] = {0, 0, 0};
133 IfxCcu6_PwmHl_setOnTime(driver, tOn);
134
135 /** - All TOP and BOTTOM channel (COUTx) states equals CC6xST */
136 cmpstat.U = 0;
137 //cmpstat.B.T13IM = 0;
138 //cmpstat.B.COUT63PS = 0;
139 //cmpstat.B.CC60PS = 0;
140 //cmpstat.B.CC61PS = 0;
141 //cmpstat.B.CC62PS = 0;
142 //cmpstat.B.COUT60PS = 0;
143 //cmpstat.B.COUT61PS = 0;
144 //cmpstat.B.COUT62PS = 0;
145 module->CMPSTAT.U = cmpstat.U;
146
147 {
148 /* set all into stuck-states */
149 //boolean active[6] = {TRUE, TRUE, TRUE, TRUE, TRUE, TRUE};
150 boolean active[6] = {FALSE, FALSE, FALSE, FALSE, FALSE, FALSE};
151 boolean stuckState[6] = {FALSE, FALSE, FALSE, FALSE, FALSE, FALSE};
152 IfxCcu6_PwmHl_setupChannels(driver, active, stuckState);
153 }
154 }
155
156
157 IFX_STATIC void IfxCcu6_PwmHl_enable(IfxCcu6_PwmHl *driver)
158 {
159 IfxCcu6_TimerWithTrigger *timer = (IfxCcu6_TimerWithTrigger *)driver->timer;
160 Ifx_CCU6 *module = timer->ccu6;
161 /** - All TOP and BOTTOM channel (COUTx) states equals CC6xST */
162 Ifx_CCU6_CMPSTAT cmpstat;
163 cmpstat.U = 0;
164 //cmpstat.B.T13IM = 0;
165 //cmpstat.B.COUT63PS = 0;
166 //cmpstat.B.CC60PS = 0;
167 //cmpstat.B.CC61PS = 0;
168 //cmpstat.B.CC62PS = 0;
169 cmpstat.B.COUT60PS = 1;
170 cmpstat.B.COUT61PS = 1;
171 cmpstat.B.COUT62PS = 1;
172
173 module->CMPSTAT.U = cmpstat.U;
174 {
175 /* set all into non stuck-states */
176 boolean active[6] = {TRUE, TRUE, TRUE, TRUE, TRUE, TRUE};
177 boolean stuckState[6] = {FALSE, FALSE, FALSE, FALSE, FALSE, FALSE};
178 IfxCcu6_PwmHl_setupChannels(driver, active, stuckState);
179 }
180 }
181
182
183 float32 IfxCcu6_PwmHl_getDeadtime(IfxCcu6_PwmHl *driver)
184 {
185 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.deadtime);
186 }
187
188
189 float32 IfxCcu6_PwmHl_getMinPulse(IfxCcu6_PwmHl *driver)
190 {
191 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.minPulse - driver->base.deadtime);
192 }
193
194
195 Ifx_Pwm_Mode IfxCcu6_PwmHl_getMode(IfxCcu6_PwmHl *driver)
196 {
197 return driver->base.mode;
198 }
199
200
201 boolean IfxCcu6_PwmHl_init(IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
202 {
203 boolean result = TRUE;
204
205 IfxCcu6_TimerWithTrigger *timer = config->timer;
206 Ifx_CCU6 *module = timer->ccu6;
207
208 driver->base.mode = Ifx_Pwm_Mode_init;
209 driver->timer = timer;
210 driver->base.setMode = 0;
211 driver->base.inverted = FALSE;
212 driver->base.ccxActiveState = config->base.ccxActiveState;
213 driver->base.coutxActiveState = config->base.coutxActiveState;
214
215 driver->base.channelCount = __minu(config->base.channelCount, IFXCCU6_PWMHL_MAX_CHANNELS);
216
217 IfxCcu6_PwmHl_setDeadtime(driver, config->base.deadtime);
218 IfxCcu6_PwmHl_setMinPulse(driver, config->base.minPulse);
219
220 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.channelCount == IFXCCU6_PWMHL_MAX_CHANNELS);
221 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->timer->base.countDir == IfxStdIf_Timer_CountDir_upAndDown);
222
223 unsigned int passiveState;
224 Ifx_CCU6_PSLR pslr;
225 Ifx_CCU6_MODCTR modctr;
226 Ifx_CCU6_MCMOUTS mcmouts;
227 Ifx_CCU6_MCMCTR mcmctr;
228
229 /** - All T12 channels (0,1,2) are set in compare mode */
230
231 IfxCcu6_setT12ChannelMode(module, IfxCcu6_T12Channel_0, IfxCcu6_T12ChannelMode_compareMode);
232 IfxCcu6_setT12ChannelMode(module, IfxCcu6_T12Channel_1, IfxCcu6_T12ChannelMode_compareMode);
233 IfxCcu6_setT12ChannelMode(module, IfxCcu6_T12Channel_2, IfxCcu6_T12ChannelMode_compareMode);
234
235 /** - Enable T12 modulation mode */
236 modctr.U = module->MODCTR.U;
237 modctr.B.MCMEN = 1;
238 modctr.B.T12MODEN = 0x3FU;
239 module->MODCTR.U = modctr.U;
240
241 IfxCcu6_setMultiChannelSwitchingMode(module, IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch);
242
243 IfxCcu6_setMultiChannelSwitchingSync(module, IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch);
244
245 mcmctr.U = module->MCMCTR.U;
246 mcmctr.B.STE12D = FALSE;
247 mcmctr.B.STE12U = FALSE;
248 mcmctr.B.STE13U = FALSE;
249 module->MCMCTR.U = mcmctr.U;
250
251 IfxCcu6_enableDeadTime(module, IfxCcu6_T12Channel_0);
252 IfxCcu6_enableDeadTime(module, IfxCcu6_T12Channel_1);
253 IfxCcu6_enableDeadTime(module, IfxCcu6_T12Channel_2);
254
255 /* Configure the passive state */
256 pslr.B.PSL = 0;
257 passiveState = (config->base.ccxActiveState == Ifx_ActiveState_high) ? 0 : 1;
258 pslr.B.PSL |= (passiveState << 0);
259 pslr.B.PSL |= (passiveState << 2);
260 pslr.B.PSL |= (passiveState << 4);
261
262 passiveState = (config->base.coutxActiveState == Ifx_ActiveState_high) ? 0 : 1;
263 pslr.B.PSL |= (passiveState << 1);
264 pslr.B.PSL |= (passiveState << 3);
265 pslr.B.PSL |= (passiveState << 5);
266
267 module->PSLR.B.PSL = pslr.B.PSL;
268
269 IfxCcu6_PwmHl_setMode(driver, Ifx_Pwm_Mode_off);
270
271 Ifx_TimerValue tOn[IFXCCU6_PWMHL_MAX_CHANNELS] = {0};
272 IfxCcu6_PwmHl_updateOff(driver, tOn); /* tOn do not need defined values */
273
274 mcmouts.U = module->MCMOUTS.U;
275 mcmouts.B.MCMPS = 0x3F;
276 mcmouts.B.STRMCM = 1;
277 module->MCMOUTS.U = mcmouts.U;
278
279 IfxCcu6_PwmHl_setOutputPins(module, config);
280
281 //config->base.emergencyEnabled;
282
283 /* Transfer the shadow registers */
284 IfxCcu6_TimerWithTrigger_applyUpdate(driver->timer);
285
286 return result;
287 }
288
289
290 void IfxCcu6_PwmHl_initConfig(IfxCcu6_PwmHl_Config *config)
291 {
292 IfxStdIf_PwmHl_initConfig(&config->base);
293 config->timer = NULL_PTR;
294 config->cc0 = NULL_PTR;
295 config->cc1 = NULL_PTR;
296 config->cc2 = NULL_PTR;
297 config->cout0 = NULL_PTR;
298 config->cout1 = NULL_PTR;
299 config->cout2 = NULL_PTR;
300 }
301
302
303 boolean IfxCcu6_PwmHl_setDeadtime(IfxCcu6_PwmHl *driver, float32 deadtime)
304 {
305 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, deadtime);
306
307 driver->base.deadtime = __minu(__minu(value, driver->timer->base.period / 2), 255);
308
309 IfxCcu6_setDeadTimeValue(driver->timer->ccu6, (uint8)driver->base.deadtime);
310 return TRUE;
311 }
312
313
314 boolean IfxCcu6_PwmHl_setMinPulse(IfxCcu6_PwmHl *driver, float32 minPulse)
315 {
316 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, minPulse);
317
318 driver->base.minPulse = value + driver->base.deadtime;
319 driver->base.maxPulse = driver->timer->base.period - driver->base.minPulse;
320
321 return TRUE;
322 }
323
324
325 boolean IfxCcu6_PwmHl_setMode(IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
326 {
327 boolean result = TRUE;
328 IfxCcu6_PwmHl_Base *base = &driver->base;
329
330 if (base->mode != mode)
331 {
332 if ((mode > Ifx_Pwm_Mode_off) || (IfxCcu6_PwmHl_modes[mode].update == NULL_PTR))
333 {
334 mode = Ifx_Pwm_Mode_off;
335 result = FALSE;
336 }
337
338 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode == IfxCcu6_PwmHl_modes[mode].mode);
339
340 base->mode = mode;
341 driver->update = IfxCcu6_PwmHl_modes[mode].update;
342
343 if (base->mode == Ifx_Pwm_Mode_off)
344 {
345 IfxCcu6_PwmHl_disable(driver);
346 }
347 else
348 {
349 IfxCcu6_PwmHl_enable(driver);
350 }
351 }
352
353 return result;
354 }
355
356
357 void IfxCcu6_PwmHl_setOnTime(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
358 {
359 // Period = 12
360 // Ton = 2
361 // Center-aligned (the CCx equals CC6xST):
362 // T12PR = (Period/2)-1
363 // T12 = 0 1 2 3 4 5 6 5 4 3 2 1 0 1 2 3
364 // CC6xR = (Period - Ton) / 2 = 5
365 // CC6xST = 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0
366 // Right-aligned (the CCx equals CC6xST):
367 // T12PR = (Period-1)
368 // T12 = 0 1 2 3 4 5 6 7 8 9 10 11 0 1 2 3
369 // CC6xR = (Period - Ton) = 10
370 // CC6xST = 1 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0
371 // Left-aligned (the CCx equals ~CC6xST):
372 // T12PR = (Period-1)
373 // T12 = 0 1 2 3 4 5 6 7 8 9 10 11 0 1 2 3
374 // CC6xR = Ton = 2
375 // CC6xST = 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0
376 IfxCcu6_TimerWithTrigger *timer = (IfxCcu6_TimerWithTrigger *)driver->timer;
377 Ifx_CCU6 *module = timer->ccu6;
378 int i;
379 int channels = driver->base.channelCount;
380 Ifx_TimerValue period = driver->timer->base.period;
381
382 for (i = 0; i < channels; i++)
383 {
384 Ifx_TimerValue cmp;
385 Ifx_TimerValue tOnX = tOn[i];
386
387 if (tOnX < driver->base.minPulse)
388 {
389 tOnX = 0;
390 }
391 else if (tOnX > driver->base.maxPulse)
392 {
393 tOnX = period;
394 }
395 else
396 {}
397
398 cmp = (period - tOnX);
399 cmp = cmp >> ((driver->base.mode == Ifx_Pwm_Mode_centerAligned) ? 1 : 0);
400 IfxCcu6_setT12CompareValue(module, (IfxCcu6_T12Channel)i, (uint16)cmp);
401 }
402 }
403
404
405 IFX_STATIC void IfxCcu6_PwmHl_setOutputPins(Ifx_CCU6 *module, const IfxCcu6_PwmHl_Config *config)
406 {
407 IFX_UNUSED_PARAMETER(module->CLC.U != (uint32)0)
408
409 if (config->cc0 != NULL_PTR)
410 {
411 IfxCcu6_initCc60OutPin(config->cc0, config->base.outputMode, config->base.outputDriver);
412 }
413
414 if (config->cc1 != NULL_PTR)
415 {
416 IfxCcu6_initCc61OutPin(config->cc1, config->base.outputMode, config->base.outputDriver);
417 }
418
419 if (config->cc2 != NULL_PTR)
420 {
421 IfxCcu6_initCc62OutPin(config->cc2, config->base.outputMode, config->base.outputDriver);
422 }
423
424 if (config->cout0 != NULL_PTR)
425 {
426 IfxCcu6_initCout60Pin(config->cout0, config->base.outputMode, config->base.outputDriver);
427 }
428
429 if (config->cout1 != NULL_PTR)
430 {
431 IfxCcu6_initCout61Pin(config->cout1, config->base.outputMode, config->base.outputDriver);
432 }
433
434 if (config->cout2 != NULL_PTR)
435 {
436 IfxCcu6_initCout62Pin(config->cout2, config->base.outputMode, config->base.outputDriver);
437 }
438 }
439
440
441 void IfxCcu6_PwmHl_setupChannels(IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
442 {
443 IfxCcu6_TimerWithTrigger *timer = driver->timer;
444 Ifx_CCU6 *module = timer->ccu6;
445 {
446 uint8 pattern;
447
448 pattern = 0;
449 pattern |= ((activeCh[0] != FALSE) ? 1 : 0) << 0;
450 pattern |= ((activeCh[1] != FALSE) ? 1 : 0) << 1;
451 pattern |= ((activeCh[2] != FALSE) ? 1 : 0) << 2;
452 pattern |= ((activeCh[3] != FALSE) ? 1 : 0) << 3;
453 pattern |= ((activeCh[4] != FALSE) ? 1 : 0) << 4;
454 pattern |= ((activeCh[5] != FALSE) ? 1 : 0) << 5;
455
456 IfxCcu6_setMultiChannelPwmPattern(module, pattern);
457 }
458 {
459 Ifx_CCU6_PSLR pslr;
460 pslr.U = module->PSLR.U;
461 pslr.B.PSL = 0;
462
463 // top:
464 pslr.B.PSL |= ((activeCh[0] == FALSE) ? ((stuckSt[0] == FALSE) ? 0 : 1) : 0) << 0;
465 pslr.B.PSL |= ((activeCh[2] == FALSE) ? ((stuckSt[2] == FALSE) ? 0 : 1) : 0) << 2;
466 pslr.B.PSL |= ((activeCh[4] == FALSE) ? ((stuckSt[4] == FALSE) ? 0 : 1) : 0) << 4;
467
468 // bottom:
469 pslr.B.PSL |= ((activeCh[1] == FALSE) ? ((stuckSt[1] == FALSE) ? 0 : 1) : 0) << 1;
470 pslr.B.PSL |= ((activeCh[3] == FALSE) ? ((stuckSt[3] == FALSE) ? 0 : 1) : 0) << 3;
471 pslr.B.PSL |= ((activeCh[5] == FALSE) ? ((stuckSt[5] == FALSE) ? 0 : 1) : 0) << 5;
472 module->PSLR.U = pslr.U;
473 }
474 }
475
476
477 boolean IfxCcu6_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
478 {
479 /* Ensure the stdif is reset to zeros */
480 memset(stdif, 0, sizeof(IfxStdIf_PwmHl));
481
482 /* *INDENT-OFF* Note: this file was indented manually by the author. */
483 /* Set the API link */
484 stdif->driver = driver;
485 stdif->setDeadtime = (IfxStdIf_PwmHl_SetDeadtime )&IfxCcu6_PwmHl_setDeadtime;
486 stdif->getDeadtime = (IfxStdIf_PwmHl_GetDeadtime )&IfxCcu6_PwmHl_getDeadtime;
487 stdif->setMinPulse = (IfxStdIf_PwmHl_SetMinPulse )&IfxCcu6_PwmHl_setMinPulse;
488 stdif->getMinPulse = (IfxStdIf_PwmHl_GetMinPulse )&IfxCcu6_PwmHl_getMinPulse;
489 stdif->getMode = (IfxStdIf_PwmHl_GetMode )&IfxCcu6_PwmHl_getMode;
490 stdif->setMode = (IfxStdIf_PwmHl_SetMode )&IfxCcu6_PwmHl_setMode;
491 stdif->setOnTime = (IfxStdIf_PwmHl_SetOnTime )&IfxCcu6_PwmHl_setOnTime;
492 stdif->setupChannels = (IfxStdIf_PwmHl_SetupChannels)&IfxCcu6_PwmHl_setupChannels;
493 IfxCcu6_TimerWithTrigger_stdIfTimerInit(&stdif->timer, driver->timer);
494 /* *INDENT-ON* */
495
496 return TRUE;
497 }
498
499
500 IFX_STATIC void IfxCcu6_PwmHl_updateCenterAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
501 {
502 IfxCcu6_PwmHl_setOnTime(driver, tOn);
503 }
504
505
506 IFX_STATIC void IfxCcu6_PwmHl_updateEdgeAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
507 {
508 IfxCcu6_PwmHl_setOnTime(driver, tOn);
509 }
510
511
512 IFX_STATIC void IfxCcu6_PwmHl_updateOff(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
513 {
514 /* Nothing to do */
515 IFX_UNUSED_PARAMETER(driver)
516 IFX_UNUSED_PARAMETER(tOn)
517 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxCcu6_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxCcu6_PwmHl.h:104
IfxStdIf_PwmHl_::timer
IfxStdIf_Timer timer
Timer related standard interface.
Definition: IfxStdIf_PwmHl.h:196
IfxCcu6_TimerWithTrigger::base
IfxCcu6_TimerWithTrigger_Base base
Timer base structure.
Definition: IfxCcu6_TimerWithTrigger.h:89
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxCcu6_PwmHl_updateOff
IFX_STATIC void IfxCcu6_PwmHl_updateOff(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxCcu6_PwmHl.c:512
IfxCcu6_setMultiChannelPwmPattern
IFX_INLINE void IfxCcu6_setMultiChannelPwmPattern(Ifx_CCU6 *ccu6, uint8 pattern)
Sets the output pattern for the multichannel mode (writes into shadow register)
Definition: IfxCcu6.h:2015
IfxCcu6_PwmHl_getMode
Ifx_Pwm_Mode IfxCcu6_PwmHl_getMode(IfxCcu6_PwmHl *driver)
Returns Pwm mode.
Definition: IfxCcu6_PwmHl.c:195
IfxCcu6_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxCcu6_PwmHl.h:96
IfxCcu6_PwmHl_Config::cc2
IfxCcu6_Cc62_Out * cc2
CC2 channel used.
Definition: IfxCcu6_PwmHl.h:121
IfxCcu6_PwmHl_getDeadtime
float32 IfxCcu6_PwmHl_getDeadtime(IfxCcu6_PwmHl *driver)
Returns the dead time.
Definition: IfxCcu6_PwmHl.c:183
IfxStdIf_PwmHl_::setupChannels
IfxStdIf_PwmHl_SetupChannels setupChannels
IfxStdIf_PwmHl_SetupChannels.
Definition: IfxStdIf_PwmHl.h:194
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxStdIf_PwmHl_::getMinPulse
IfxStdIf_PwmHl_GetMinPulse getMinPulse
IfxStdIf_PwmHl_GetMinPulse.
Definition: IfxStdIf_PwmHl.h:188
IfxCcu6_PwmHl_s
CCU6 PWM driver.
Definition: IfxCcu6_PwmHl.h:138
IfxCcu6_PwmHl_setOutputPins
IFX_STATIC void IfxCcu6_PwmHl_setOutputPins(Ifx_CCU6 *module, const IfxCcu6_PwmHl_Config *config)
Sets up the output pins.
Definition: IfxCcu6_PwmHl.c:405
IfxStdIf_PwmHl_::getDeadtime
IfxStdIf_PwmHl_GetDeadtime getDeadtime
IfxStdIf_PwmHl_GetDeadtime.
Definition: IfxStdIf_PwmHl.h:185
IfxCcu6_enableDeadTime
IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12.
Definition: IfxCcu6.h:1540
IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch
T12 period match detected (while counting up)
Definition: IfxCcu6.h:213
IfxCcu6_PwmHl.h
CCU6 PWMHL details.
IfxCcu6_PwmHl_Config::cout1
IfxCcu6_Cout61_Out * cout1
COUT1 channel used.
Definition: IfxCcu6_PwmHl.h:123
IfxCcu6_PwmHl_Config::cc0
IfxCcu6_Cc60_Out * cc0
CC0 channel used.
Definition: IfxCcu6_PwmHl.h:119
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
IfxCcu6_TimerWithTrigger_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxCcu6_TimerWithTrigger.h:80
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
IfxStdIf_PwmHl_SetupChannels
void(* IfxStdIf_PwmHl_SetupChannels)(IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxStdIf_PwmHl.h:175
IfxCcu6_setT12ChannelMode
IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels.
Definition: IfxCcu6.h:2071
IfxCcu6_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxCcu6_PwmHl.h:129
IfxCcu6_PwmHl_getMinPulse
float32 IfxCcu6_PwmHl_getMinPulse(IfxCcu6_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxCcu6_PwmHl.c:189
IfxStdIf_PwmHl_GetMode
Ifx_Pwm_Mode(* IfxStdIf_PwmHl_GetMode)(IfxStdIf_InterfaceDriver stdIf)
Return the PWM mode.
Definition: IfxStdIf_PwmHl.h:125
IfxStdIf_PwmHl_initConfig
void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
Definition: IfxStdIf_PwmHl.c:45
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
float32
float float32
Definition: Platform_Types.h:170
IfxCcu6_PwmHl_s::base
IfxCcu6_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxCcu6_PwmHl.h:140
Ifx_Assert.h
Assert functions.
IfxCcu6_TimerWithTrigger
CCU6 Timer interface.
Definition: IfxCcu6_TimerWithTrigger.h:87
IfxCcu6_setDeadTimeValue
IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (...
Definition: IfxCcu6.h:1972
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IfxCcu6_PwmHl_init
boolean IfxCcu6_PwmHl_init(IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
Initializes the timer object.
Definition: IfxCcu6_PwmHl.c:201
IfxCcu6_initCc62OutPin
IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin.
Definition: IfxCcu6.h:1789
IfxCcu6_PwmHl_updateEdgeAligned
IFX_STATIC void IfxCcu6_PwmHl_updateEdgeAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxCcu6_PwmHl.c:506
IfxCcu6_initCout61Pin
IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin.
Definition: IfxCcu6.h:1848
IfxCcu6_PwmHl_setMode
boolean IfxCcu6_PwmHl_setMode(IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxCcu6_PwmHl.c:325
IfxCcu6_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxCcu6_PwmHl.h:105
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu6_PwmHl_stdIfPwmHlInit
boolean IfxCcu6_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxCcu6_PwmHl.c:477
IfxStdIf_PwmHl_Config::deadtime
float32 deadtime
Dead time between the top and bottom channels in seconds.
Definition: IfxStdIf_PwmHl.h:202
IfxCcu6_T12ChannelMode_compareMode
Compare mode.
Definition: IfxCcu6.h:270
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStdIf_PwmHl_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_PwmHl.h:181
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCcu6_initCout60Pin
IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin.
Definition: IfxCcu6.h:1841
IfxCcu6_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxCcu6_PwmHl.h:103
IfxCcu6_PwmHl_modes
IFX_STATIC IFX_CONST IfxCcu6_PwmHl_Mode IfxCcu6_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Definition: IfxCcu6_PwmHl.c:114
IfxStdIf_Timer_CountDir_upAndDown
Timer is counting up and down.
Definition: IfxStdIf_Timer.h:88
IfxCcu6_PwmHl_updateCenterAligned
IFX_STATIC void IfxCcu6_PwmHl_updateCenterAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxCcu6_PwmHl.c:500
IfxCcu6_TimerWithTrigger_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:79
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
IfxCcu6_PwmHl_s::timer
IfxCcu6_TimerWithTrigger * timer
Pointer to the linked timer object.
Definition: IfxCcu6_PwmHl.h:141
IfxStdIf_PwmHl_GetMinPulse
float32(* IfxStdIf_PwmHl_GetMinPulse)(IfxStdIf_InterfaceDriver stdIf)
Return the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:117
IfxCcu6_TimerWithTrigger_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:77
IfxStdIf_PwmHl_Config::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:208
IfxStdIf_PwmHl_Config::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxStdIf_PwmHl.h:211
Ifx_Pwm_Mode_init
Initialisation mode, do not use at run time.
Definition: Ifx_Types.h:182
IfxCcu6_PwmHl_Config::cout2
IfxCcu6_Cout62_Out * cout2
COUT2 channel used.
Definition: IfxCcu6_PwmHl.h:124
IfxCcu6_PwmHl_Config
CCU6: PWM HL configuration.
Definition: IfxCcu6_PwmHl.h:115
IfxCcu6_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxCcu6_PwmHl.h:100
IfxCcu6_setMultiChannelSwitchingMode
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS ...
Definition: IfxCcu6.h:2021
IfxCcu6_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxCcu6_PwmHl.h:117
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
IfxCcu6_initCc60OutPin
IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin.
Definition: IfxCcu6.h:1745
IfxCcu6_T12Channel
IfxCcu6_T12Channel
Capture compare channel of Timer12.
Definition: IfxCcu6.h:258
IfxStdIf_PwmHl_::setOnTime
IfxStdIf_PwmHl_SetOnTime setOnTime
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:191
IfxStdIf_PwmHl_SetMinPulse
boolean(* IfxStdIf_PwmHl_SetMinPulse)(IfxStdIf_InterfaceDriver stdIf, float32 minPulse)
Set the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:109
IfxCcu6_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxCcu6_PwmHl.h:99
IfxCcu6_PwmHl_disable
IFX_STATIC void IfxCcu6_PwmHl_disable(IfxCcu6_PwmHl *driver)
Turn-off the complementary PWM generation mode.
Definition: IfxCcu6_PwmHl.c:126
IfxCcu6_PwmHl_s::update
IfxCcu6_PwmHl_Update update
Update function for actual selected mode.
Definition: IfxCcu6_PwmHl.h:142
IfxStdIf_PwmHl_Config::minPulse
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds.
Definition: IfxStdIf_PwmHl.h:203
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
IfxCcu6_PwmHl_setOnTime
void IfxCcu6_PwmHl_setOnTime(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are compl...
Definition: IfxCcu6_PwmHl.c:357
IfxStdIf_PwmHl_::setMode
IfxStdIf_PwmHl_SetMode setMode
IfxStdIf_PwmHl_SetMode.
Definition: IfxStdIf_PwmHl.h:190
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
IfxStdIf_PwmHl_Config::outputMode
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:207
IfxCcu6_setT12CompareValue
void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers)
Definition: IfxCcu6.c:360
IfxCcu6_PwmHl_initConfig
void IfxCcu6_PwmHl_initConfig(IfxCcu6_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxCcu6_PwmHl.c:290
IfxCcu6_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxCcu6_PwmHl.h:101
IfxStdIf_PwmHl_SetDeadtime
boolean(* IfxStdIf_PwmHl_SetDeadtime)(IfxStdIf_InterfaceDriver stdIf, float32 deadtime)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:86
IfxCcu6_PwmHl_Config::cout0
IfxCcu6_Cout60_Out * cout0
COUT0 channel used.
Definition: IfxCcu6_PwmHl.h:122
IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch
A T12 zero-match (while counting up) triggers the shadow transfer.
Definition: IfxCcu6.h:224
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxStdIf_PwmHl_Config::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxStdIf_PwmHl.h:204
IfxCcu6_PwmHl_enable
IFX_STATIC void IfxCcu6_PwmHl_enable(IfxCcu6_PwmHl *driver)
Turn-on the complementary PWM generation mode.
Definition: IfxCcu6_PwmHl.c:157
IfxCcu6_T12Channel_0
T12 channel CC60.
Definition: IfxCcu6.h:260
IfxStdIf_PwmHl_::setMinPulse
IfxStdIf_PwmHl_SetMinPulse setMinPulse
IfxStdIf_PwmHl_SetMinPulse.
Definition: IfxStdIf_PwmHl.h:187
IfxCcu6_T12Channel_1
T12 channel CC61.
Definition: IfxCcu6.h:261
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCcu6_PwmHl_setDeadtime
boolean IfxCcu6_PwmHl_setDeadtime(IfxCcu6_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxCcu6_PwmHl.c:303
IfxStdIf_PwmHl_SetOnTime
void(* IfxStdIf_PwmHl_SetOnTime)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time.
Definition: IfxStdIf_PwmHl.h:140
IfxCcu6_PwmHl_Config::cc1
IfxCcu6_Cc61_Out * cc1
CC1 channel used.
Definition: IfxCcu6_PwmHl.h:120
IfxCcu6_T12Channel_2
T12 channel CC62.
Definition: IfxCcu6.h:262
IfxStdIf_PwmHl_::getMode
IfxStdIf_PwmHl_GetMode getMode
IfxStdIf_PwmHl_GetMode.
Definition: IfxStdIf_PwmHl.h:189
IfxCcu6_PwmHl_setMinPulse
boolean IfxCcu6_PwmHl_setMinPulse(IfxCcu6_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxCcu6_PwmHl.c:314
IfxCcu6_initCout62Pin
IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin.
Definition: IfxCcu6.h:1855
IfxCcu6_setMultiChannelSwitchingSync
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
Sets the synchronization mechanism of the shadow transfer event MCM_ST if it has been requested befor...
Definition: IfxCcu6.h:2027
IfxStdIf_PwmHl_GetDeadtime
float32(* IfxStdIf_PwmHl_GetDeadtime)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time in s.
Definition: IfxStdIf_PwmHl.h:94
IfxStdIf_PwmHl_::setDeadtime
IfxStdIf_PwmHl_SetDeadtime setDeadtime
IfxStdIf_PwmHl_SetDeadtime.
Definition: IfxStdIf_PwmHl.h:184
IfxCcu6_TimerWithTrigger_applyUpdate
void IfxCcu6_TimerWithTrigger_applyUpdate(IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers.
Definition: IfxCcu6_TimerWithTrigger.c:87
TRUE
#define TRUE
Definition: Platform_Types.h:90
IFXCCU6_PWMHL_MAX_CHANNELS
#define IFXCCU6_PWMHL_MAX_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output...
Definition: IfxCcu6_PwmHl.h:78
IfxStdIf_PwmHl_Config::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxStdIf_PwmHl.h:212
IfxCcu6_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxCcu6_PwmHl.h:106
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCcu6_initCc61OutPin
IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin.
Definition: IfxCcu6.h:1767
IfxCcu6_PwmHl_setupChannels
void IfxCcu6_PwmHl_setupChannels(IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxCcu6_PwmHl.c:441
IfxCcu6_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxCcu6_PwmHl.h:102
IfxStdIf_PwmHl_SetMode
boolean(* IfxStdIf_PwmHl_SetMode)(IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode.
Definition: IfxStdIf_PwmHl.h:133
IfxCcu6_TimerWithTrigger_stdIfTimerInit
boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer.
Definition: IfxCcu6_TimerWithTrigger.c:335
IfxCcu6_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxCcu6_PwmHl.h:98
IfxCcu6_TimerWithTrigger::ccu6
Ifx_CCU6 * ccu6
CCU6 module used for the timer functionality.
Definition: IfxCcu6_TimerWithTrigger.h:90


iLLD_TC26B: IfxCcu6_PwmHl.h Source File

  • Ccu6
  • PwmHl
IfxCcu6_PwmHl.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PwmHl.h
3 * \brief CCU6 PWMHL details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Ccu6_PwmHl_Usage How to use the CCU6 PWM Driver
42 * \ingroup IfxLld_Ccu6_PwmHl
43 *
44 * This driver implements the PWM functionalities as defined by \ref library_srvsw_stdif_pwmhl.
45 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_pwmhl "standard interface APIs".
46 *
47 * \section Specific Specific implementation
48 * \todo add documentation
49 *
50 * For a detailed configuration of the microcontroller, see \ref IfxCcu6_PwmHl_init().
51 *
52 * \defgroup IfxLld_Ccu6_PwmHl PWM Interface Driver
53 * \ingroup IfxLld_Ccu6
54 * \defgroup IfxLld_Ccu6_PwmHl_DataStructures Data Structures
55 * \ingroup IfxLld_Ccu6_PwmHl
56 * \defgroup IfxLld_Ccu6_PwmHl_PwmHl_Functions PwmHl Functions
57 * \ingroup IfxLld_Ccu6_PwmHl
58 * \defgroup IfxLld_Ccu6_PwmHl_StdIf_Functions StdIf Functions
59 * \ingroup IfxLld_Ccu6_PwmHl
60 */
61
62 #ifndef IFXCCU6_PWMHL_H
63 #define IFXCCU6_PWMHL_H 1
64
65 /******************************************************************************/
66 /*----------------------------------Includes----------------------------------*/
67 /******************************************************************************/
68
69 #include "StdIf/IfxStdIf_PwmHl.h"
70 #include "Ccu6/TimerWithTrigger/IfxCcu6_TimerWithTrigger.h"
71
72 /******************************************************************************/
73 /*-----------------------------------Macros-----------------------------------*/
74 /******************************************************************************/
75
76 /** \brief Maximal number of channels handled by the driver. One channel has a top and bottom pwm output
77 */
78 #define IFXCCU6_PWMHL_MAX_CHANNELS (3)
79
80 /******************************************************************************/
81 /*------------------------------Type Definitions------------------------------*/
82 /******************************************************************************/
83
84 typedef struct IfxCcu6_PwmHl_s IfxCcu6_PwmHl;
85
86 typedef void (*IfxCcu6_PwmHl_Update)(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn);
87
88 /******************************************************************************/
89 /*-----------------------------Data Structures--------------------------------*/
90 /******************************************************************************/
91
92 /** \addtogroup IfxLld_Ccu6_PwmHl_DataStructures
93 * \{ */
94 /** \brief Multi-channels PWM object definition (channels only)
95 */
96 typedef struct
97 {
98 Ifx_TimerValue deadtime; /**< \brief Dead time between the top and bottom channel in ticks */
99 Ifx_TimerValue minPulse; /**< \brief minimum pulse that is output, shorter pulse time will be output as 0% duty cycle */
100 Ifx_TimerValue maxPulse; /**< \brief internal parameter */
101 Ifx_Pwm_Mode mode; /**< \brief actual PWM mode */
102 sint8 setMode; /**< \brief A non zero flag indicates that the PWM mode is being modified */
103 Ifx_ActiveState ccxActiveState; /**< \brief Top PWM active state */
104 Ifx_ActiveState coutxActiveState; /**< \brief Bottom PWM active state */
105 boolean inverted; /**< \brief Flag indicating the center aligned inverted mode (TRUE) */
106 uint8 channelCount; /**< \brief Number of PWM channels, one channel is made of a top and bottom channel */
107 } IfxCcu6_PwmHl_Base;
108
109 /** \} */
110
111 /** \addtogroup IfxLld_Ccu6_PwmHl_DataStructures
112 * \{ */
113 /** \brief CCU6: PWM HL configuration
114 */
115 typedef struct
116 {
117 IfxStdIf_PwmHl_Config base; /**< \brief PWM HL standard interface configuration */
118 IfxCcu6_TimerWithTrigger *timer; /**< \brief Pointer to the linked timer object */
119 IfxCcu6_Cc60_Out *cc0; /**< \brief CC0 channel used */
120 IfxCcu6_Cc61_Out *cc1; /**< \brief CC1 channel used */
121 IfxCcu6_Cc62_Out *cc2; /**< \brief CC2 channel used */
122 IfxCcu6_Cout60_Out *cout0; /**< \brief COUT0 channel used */
123 IfxCcu6_Cout61_Out *cout1; /**< \brief COUT1 channel used */
124 IfxCcu6_Cout62_Out *cout2; /**< \brief COUT2 channel used */
125 } IfxCcu6_PwmHl_Config;
126
127 /** \brief Structure for PWM configuration
128 */
129 typedef struct
130 {
131 Ifx_Pwm_Mode mode; /**< \brief pwm mode */
132 boolean inverted; /**< \brief Inverted configuration for the selected mode */
133 IfxCcu6_PwmHl_Update update; /**< \brief update call back function for the selected mode */
134 } IfxCcu6_PwmHl_Mode;
135
136 /** \brief CCU6 PWM driver
137 */
138 struct IfxCcu6_PwmHl_s
139 {
140 IfxCcu6_PwmHl_Base base; /**< \brief Multi-channels PWM object definition (channels only) */
141 IfxCcu6_TimerWithTrigger *timer; /**< \brief Pointer to the linked timer object */
142 IfxCcu6_PwmHl_Update update; /**< \brief Update function for actual selected mode */
143 };
144
145 /** \} */
146
147 /** \addtogroup IfxLld_Ccu6_PwmHl_PwmHl_Functions
148 * \{ */
149
150 /******************************************************************************/
151 /*-------------------------Global Function Prototypes-------------------------*/
152 /******************************************************************************/
153
154 /** \brief Initializes the timer object
155 * \note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.
156 * Initialise the CCU6 module for PWM generation of high- and low switches usage, e.g.
157 * - electric motor drive
158 * - half-bridge switches
159 *
160 * It is assumed that the whole CCU6 module is only used for purposes mentioned at the
161 * IfxCcu6_PwmHl API. No part of CCU6 module is used for other purpose.
162 *
163 * The timer used should configure the T12 as PWM base timer and T13 as trigger.
164 * \param driver CCU6 PWM driver
165 * \param config CCU6 : PWM HL configuration
166 * \return TRUE on success else FALSE
167 */
168 IFX_EXTERN boolean IfxCcu6_PwmHl_init(IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config);
169
170 /** \brief Initialize the configuration structure to default
171 * \param config Channel configuration. This parameter is Initialised by the function
172 * \return None
173 */
174 IFX_EXTERN void IfxCcu6_PwmHl_initConfig(IfxCcu6_PwmHl_Config *config);
175
176 /** \} */
177
178 /** \addtogroup IfxLld_Ccu6_PwmHl_StdIf_Functions
179 * \{ */
180
181 /******************************************************************************/
182 /*-------------------------Inline Function Prototypes-------------------------*/
183 /******************************************************************************/
184
185 /** \brief Inverts the active state
186 * \param activeState Active state
187 * \return State
188 */
189 IFX_INLINE Ifx_ActiveState IfxCcu6_PwmHl_invertActiveState(Ifx_ActiveState activeState);
190
191 /******************************************************************************/
192 /*-------------------------Global Function Prototypes-------------------------*/
193 /******************************************************************************/
194
195 /** \brief Returns the dead time
196 * \param driver CCU6 PWM driver
197 * \return Dead Time
198 *
199 * \see IfxStdIf_PwmHl_GetDeadtime
200 *
201 */
202 IFX_EXTERN float32 IfxCcu6_PwmHl_getDeadtime(IfxCcu6_PwmHl *driver);
203
204 /** \brief Returns the minimum pulse
205 * \param driver CCU6 PWM driver
206 * \return Min Pulse
207 *
208 * \see IfxStdIf_PwmHl_GetMinPulse
209 *
210 */
211 IFX_EXTERN float32 IfxCcu6_PwmHl_getMinPulse(IfxCcu6_PwmHl *driver);
212
213 /** \brief Returns Pwm mode
214 * \param driver CCU6 PWM driver
215 * \return Pwm mode
216 *
217 * \see IfxStdIf_PwmHl_GetMode
218 *
219 */
220 IFX_EXTERN Ifx_Pwm_Mode IfxCcu6_PwmHl_getMode(IfxCcu6_PwmHl *driver);
221
222 /** \brief Sets the dead time
223 * \note The changes are not applied until Timer->applyUpdate() is called.
224 * \param driver CCU6 PWM driver
225 * \param deadtime Dead time value
226 * \return TRUE on success else FALSE
227 *
228 * \see IfxStdIf_PwmHl_SetDeadtime
229 *
230 */
231 IFX_EXTERN boolean IfxCcu6_PwmHl_setDeadtime(IfxCcu6_PwmHl *driver, float32 deadtime);
232
233 /** \brief Sets the minimum pulse
234 * \param driver CCU6 PWM driver
235 * \param minPulse Minimum pulse
236 * \return TRUE on success else FALSE
237 *
238 * \see IfxStdIf_PwmHl_SetMinPulse
239 *
240 */
241 IFX_EXTERN boolean IfxCcu6_PwmHl_setMinPulse(IfxCcu6_PwmHl *driver, float32 minPulse);
242
243 /** \brief Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
244 * \param driver CCU6 PWM driver
245 * \param mode Pwm mode
246 * \return TRUE on success else FALSE
247 *
248 * \see IfxStdIf_PwmHl_SetMode
249 *
250 */
251 IFX_EXTERN boolean IfxCcu6_PwmHl_setMode(IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode);
252
253 /** \brief Sets the ON time
254 * Assign the ON time to the TOP channels.
255 * The ON time of the BOTTOM channels are complementary.
256 *
257 * \note The changes are not applied until Timer->applyUpdate() is called.
258 * \param driver CCU6 PWM driver
259 * \param tOn ON time
260 * \return None
261 *
262 * \see IfxStdIf_PwmHl_SetOnTime
263 *
264 */
265 IFX_EXTERN void IfxCcu6_PwmHl_setOnTime(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn);
266
267 /** \brief Set channels which are generating PWM or in "stuck-at" state.
268 *
269 * \note The values for the parameters are arranged as follows:
270 * index = 0 --> phase 0 top
271 * index = 1 --> phase 0 bottom
272 * index = 2 --> phase 1 top
273 * index = 3 --> phase 1 bottom
274 * index = 4 --> phase 2 top
275 * index = 5 --> phase 2 bottom
276 * \param driver CCU6 PWM driver
277 * \param activeCh Pointer to boolean array containing values for PWM channels.
278 * If FALSE, the channel will be in stuck-at state, else the channel will generate PWM.
279 * \param stuckSt Pointer to boolean array containing values for active channels.
280 * If FALSE, the stuck-at state is passive level, else the stuck-at state is active level.
281 * \return None
282 *
283 * \see IfxStdIf_PwmHl_SetupChannels
284 *
285 */
286 IFX_EXTERN void IfxCcu6_PwmHl_setupChannels(IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt);
287
288 /** \brief Initialises the statndard interface Pwm
289 * \param stdif Standard interface object, will be initialized by the function
290 * \param driver Interface driver to be used by the standard interface. must be initialised separately
291 * \return TRUE on success else FALSE
292 */
293 IFX_EXTERN boolean IfxCcu6_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver);
294
295 /** \} */
296
297 /******************************************************************************/
298 /*---------------------Inline Function Implementations------------------------*/
299 /******************************************************************************/
300
301 IFX_INLINE Ifx_ActiveState IfxCcu6_PwmHl_invertActiveState(Ifx_ActiveState activeState)
302 {
303 return activeState == Ifx_ActiveState_low ? Ifx_ActiveState_high : Ifx_ActiveState_low;
304 }
305
306
307 #endif /* IFXCCU6_PWMHL_H */
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxCcu6_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxCcu6_PwmHl.h:104
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxCcu6_PwmHl_getMode
IFX_EXTERN Ifx_Pwm_Mode IfxCcu6_PwmHl_getMode(IfxCcu6_PwmHl *driver)
Returns Pwm mode.
Definition: IfxCcu6_PwmHl.c:195
IfxCcu6_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxCcu6_PwmHl.h:96
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
IfxCcu6_PwmHl_Config::cc2
IfxCcu6_Cc62_Out * cc2
CC2 channel used.
Definition: IfxCcu6_PwmHl.h:121
IfxCcu6_PwmHl_getDeadtime
IFX_EXTERN float32 IfxCcu6_PwmHl_getDeadtime(IfxCcu6_PwmHl *driver)
Returns the dead time.
Definition: IfxCcu6_PwmHl.c:183
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:144
IfxCcu6_PwmHl_s
CCU6 PWM driver.
Definition: IfxCcu6_PwmHl.h:138
IfxCcu6_PwmHl_Config::cout1
IfxCcu6_Cout61_Out * cout1
COUT1 channel used.
Definition: IfxCcu6_PwmHl.h:123
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:128
IfxCcu6_PwmHl_Config::cc0
IfxCcu6_Cc60_Out * cc0
CC0 channel used.
Definition: IfxCcu6_PwmHl.h:119
IfxCcu6_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxCcu6_PwmHl.h:129
IfxCcu6_PwmHl_getMinPulse
IFX_EXTERN float32 IfxCcu6_PwmHl_getMinPulse(IfxCcu6_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxCcu6_PwmHl.c:189
float32
float float32
Definition: Platform_Types.h:170
IfxCcu6_PwmHl_s::base
IfxCcu6_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxCcu6_PwmHl.h:140
IfxCcu6_TimerWithTrigger
CCU6 Timer interface.
Definition: IfxCcu6_TimerWithTrigger.h:87
IfxCcu6_PwmHl_init
IFX_EXTERN boolean IfxCcu6_PwmHl_init(IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
Initializes the timer object.
Definition: IfxCcu6_PwmHl.c:201
IfxCcu6_PwmHl_setMode
IFX_EXTERN boolean IfxCcu6_PwmHl_setMode(IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxCcu6_PwmHl.c:325
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxCcu6_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxCcu6_PwmHl.h:105
IfxCcu6_PwmHl_stdIfPwmHlInit
IFX_EXTERN boolean IfxCcu6_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxCcu6_PwmHl.c:477
IfxCcu6_PwmHl_invertActiveState
IFX_INLINE Ifx_ActiveState IfxCcu6_PwmHl_invertActiveState(Ifx_ActiveState activeState)
Inverts the active state.
Definition: IfxCcu6_PwmHl.h:301
IfxCcu6_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxCcu6_PwmHl.h:103
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:168
IfxCcu6_TimerWithTrigger.h
CCU6 TIMERWITHTRIGGER details.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu6_PwmHl_Config::timer
IfxCcu6_TimerWithTrigger * timer
Pointer to the linked timer object.
Definition: IfxCcu6_PwmHl.h:118
IfxCcu6_PwmHl_Update
void(* IfxCcu6_PwmHl_Update)(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Definition: IfxCcu6_PwmHl.h:86
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCcu6_PwmHl_Config::cout2
IfxCcu6_Cout62_Out * cout2
COUT2 channel used.
Definition: IfxCcu6_PwmHl.h:124
IfxCcu6_PwmHl_Config
CCU6: PWM HL configuration.
Definition: IfxCcu6_PwmHl.h:115
IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration.
Definition: IfxStdIf_PwmHl.h:200
IfxCcu6_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxCcu6_PwmHl.h:100
IfxCcu6_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxCcu6_PwmHl.h:117
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:152
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IfxCcu6_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxCcu6_PwmHl.h:99
IfxCcu6_PwmHl_Mode::update
IfxCcu6_PwmHl_Update update
update call back function for the selected mode
Definition: IfxCcu6_PwmHl.h:133
IfxCcu6_PwmHl_setOnTime
IFX_EXTERN void IfxCcu6_PwmHl_setOnTime(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are compl...
Definition: IfxCcu6_PwmHl.c:357
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:136
IfxStdIf_PwmHl.h
Standard interface: Multi-channels, dual-complementary PWM interface.
IfxCcu6_PwmHl_initConfig
IFX_EXTERN void IfxCcu6_PwmHl_initConfig(IfxCcu6_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxCcu6_PwmHl.c:290
IfxCcu6_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxCcu6_PwmHl.h:101
IfxCcu6_PwmHl_Config::cout0
IfxCcu6_Cout60_Out * cout0
COUT0 channel used.
Definition: IfxCcu6_PwmHl.h:122
IfxCcu6_PwmHl_setDeadtime
IFX_EXTERN boolean IfxCcu6_PwmHl_setDeadtime(IfxCcu6_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxCcu6_PwmHl.c:303
IfxCcu6_PwmHl_Config::cc1
IfxCcu6_Cc61_Out * cc1
CC1 channel used.
Definition: IfxCcu6_PwmHl.h:120
IfxCcu6_PwmHl_setMinPulse
IFX_EXTERN boolean IfxCcu6_PwmHl_setMinPulse(IfxCcu6_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxCcu6_PwmHl.c:314
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:160
IfxCcu6_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxCcu6_PwmHl.h:106
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
uint8
unsigned char uint8
Definition: Platform_Types.h:108
sint8
signed char sint8
Definition: Platform_Types.h:125
IfxCcu6_PwmHl_setupChannels
IFX_EXTERN void IfxCcu6_PwmHl_setupChannels(IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxCcu6_PwmHl.c:441
IfxCcu6_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxCcu6_PwmHl.h:102
IfxCcu6_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxCcu6_PwmHl.h:98


iLLD_TC26B: IfxCcu6_TPwm.c Source File

  • Ccu6
  • TPwm
IfxCcu6_TPwm.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_TPwm.c
3 * \brief CCU6 TPWM details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxCcu6_TPwm.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxCcu6_TPwm_initModule(IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
54 {
55 Ifx_CCU6 *ccu6SFR = config->ccu6; // pointer to CCU6 registers
56 tPwm->ccu6 = ccu6SFR; // adding register pointer to module handler
57
58 /* -- hardware module initialisation -- */
59
60 // enable module if it hasn't been enabled by any other interface //
61 if (IfxCcu6_isModuleEnabled(ccu6SFR) == FALSE)
62 {
63 IfxCcu6_enableModule(ccu6SFR);
64 }
65
66 /* -- timer initialisation -- */
67
68 // Timer 13 initialisation //
69
70 if (config->timer == IfxCcu6_TimerId_t13)
71 {
72 // enable Timer13 if it hasn't been enabled by any other interface //
73 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t13) == FALSE)
74 {
75 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t13);
76 }
77
78 // clock initialisation //
79
80 if (config->clock.t13ExtClockEnabled) // if external source is selected as reference
81 {
82 // input signal selection
83 if (config->clock.t13ExtClockInput != NULL_PTR)
84 {
85 IfxCcu6_setT13InputSignal(config->ccu6, config->clock.t13ExtClockInput);
86 }
87
88 // counting input mode selection
89 IfxCcu6_setCountingInputMode(ccu6SFR, IfxCcu6_TimerId_t13, config->clock.t13countingInputMode);
90
91 // period setting
92 IfxCcu6_setT13PeriodValue(ccu6SFR, (uint16)config->base.period);
93 }
94 else // if internal clock is selected as reference
95 {
96 IfxCcu6_setT13Frequency(ccu6SFR, config->base.frequency, config->base.period);
97 }
98
99 // duty cycle initialisation //
100
101 IfxCcu6_setT13CounterValue(ccu6SFR, config->timer13.counterValue);
102
103 IfxCcu6_setT13CompareValue(ccu6SFR, config->timer13.compareValue);
104
105 // if Timer 13 start is in sync with Timer 12 //
106 if (config->trigger.t13InSyncWithT12)
107 {
108 IfxCcu6_setT13TriggerEventMode(ccu6SFR, config->timer13.t12SyncEvent);
109 IfxCcu6_setT13TriggerEventDirection(ccu6SFR, config->timer13.t12SyncDirection);
110 }
111 }
112 else
113 {}
114
115 // Timer 12 initialisation //
116
117 if ((config->timer == IfxCcu6_TimerId_t12) || (config->trigger.t13InSyncWithT12))
118 {
119 Ifx_TimerValue period = config->base.period;
120 Ifx_TimerValue compareValue = config->timer12.compareValue;
121
122 // enable Timer12 if it hasn't been enabled by any other interface //
123 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t12) == FALSE)
124 {
125 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t12);
126 }
127
128 // if Timer 13 start is in sync with Timer 12 //
129 if ((config->trigger.t13InSyncWithT12) && (config->base.waitingTime != 0))
130 {
131 // if in sync with T12 period match
132 if (config->timer13.t12SyncEvent == IfxCcu6_T13TriggerEvent_onT12Period)
133 {
134 period = config->base.waitingTime; // waiting time as period
135 }
136 else if (config->timer13.t12SyncEvent != IfxCcu6_T13TriggerEvent_noAction)
137 {
138 compareValue = config->base.waitingTime; // waiting time as compare value
139 period = config->base.activeCount;
140 }
141 }
142 else
143 {
144 // configuration error
145 }
146
147 // clock initialisation //
148
149 if (config->clock.t12ExtClockEnabled) // if external source is selected as reference
150 {
151 // input signal selection
152 if (config->clock.t12ExtClockInput != NULL_PTR)
153 {
154 IfxCcu6_setT12InputSignal(config->ccu6, config->clock.t12ExtClockInput);
155 }
156
157 // counting input mode selection
158 IfxCcu6_setCountingInputMode(ccu6SFR, IfxCcu6_TimerId_t12, config->clock.t12countingInputMode);
159
160 // countining mode selection
161 IfxCcu6_setT12CountMode(ccu6SFR, config->timer12.countMode);
162
163 // period selection for center aligned mode
164 if (config->timer12.countMode == IfxCcu6_T12CountMode_centerAligned)
165 {
166 period = (period / 2) - 1;
167 }
168
169 // period setting
170 IfxCcu6_setT12PeriodValue(ccu6SFR, (uint16)period);
171 }
172 else // if internal clock is selected as reference
173 {
174 // in case of in sync with T13 T12 runs at same frequency as T13
175 IfxCcu6_setT12Frequency(ccu6SFR, config->base.frequency, period, config->timer12.countMode);
176 }
177
178 // duty cycle initialisation //
179
180 IfxCcu6_setT12CounterValue(ccu6SFR, config->timer12.counterValue);
181
182 IfxCcu6_setT12ChannelMode(ccu6SFR, config->timer12.channelId, config->timer12.channelMode);
183
184 IfxCcu6_setT12CompareValue(ccu6SFR, config->timer12.channelId, (uint16)compareValue);
185
186 // dead time injection if selected
187 if (config->timer12.deadTimeValue)
188 {
189 IfxCcu6_setDeadTimeValue(ccu6SFR, config->timer12.deadTimeValue);
190 IfxCcu6_enableDeadTime(ccu6SFR, config->timer12.channelId);
191 }
192 }
193 else
194 {}
195
196 /* -- output path initialisation -- */
197
198 //enable modulation output path //
199 IfxCcu6_enableModulationOutput(ccu6SFR, config->timer, config->channelOut);
200
201 // output passive logic configuration //
202 //TODO check correct polarity:
203 IfxCcu6_setOutputPassiveState(ccu6SFR, config->channelOut, config->base.activeState);
204
205 /* -- Pin mapping -- */
206
207 const IfxCcu6_TPwm_Pins *pins = config->pins;
208
209 if (pins != NULL_PTR)
210 {
211 IfxCcu6_Cc60_Out *cc60Out = pins->cc60Out;
212
213 if (cc60Out != NULL_PTR)
214 {
215 IfxCcu6_initCc60OutPin(cc60Out, pins->outputMode, pins->pinDriver);
216 }
217
218 IfxCcu6_Cc61_Out *cc61Out = pins->cc61Out;
219
220 if (cc61Out != NULL_PTR)
221 {
222 IfxCcu6_initCc61OutPin(cc61Out, pins->outputMode, pins->pinDriver);
223 }
224
225 IfxCcu6_Cc62_Out *cc62Out = pins->cc62Out;
226
227 if (cc62Out != NULL_PTR)
228 {
229 IfxCcu6_initCc62OutPin(cc62Out, pins->outputMode, pins->pinDriver);
230 }
231
232 IfxCcu6_Cout60_Out *cout60 = pins->cout60;
233
234 if (cout60 != NULL_PTR)
235 {
236 IfxCcu6_initCout60Pin(cout60, pins->outputMode, pins->pinDriver);
237 }
238
239 IfxCcu6_Cout61_Out *cout61 = pins->cout61;
240
241 if (cout61 != NULL_PTR)
242 {
243 IfxCcu6_initCout61Pin(cout61, pins->outputMode, pins->pinDriver);
244 }
245
246 IfxCcu6_Cout62_Out *cout62 = pins->cout62;
247
248 if (cout62 != NULL_PTR)
249 {
250 IfxCcu6_initCout62Pin(cout62, pins->outputMode, pins->pinDriver);
251 }
252
253 IfxCcu6_Cout63_Out *cout63 = pins->cout63;
254
255 if (cout63 != NULL_PTR)
256 {
257 IfxCcu6_initCout63Pin(cout63, pins->outputMode, pins->pinDriver);
258 }
259
260 IfxCcu6_T12hr_In *t12hr = pins->t12hr;
261
262 if (t12hr != NULL_PTR)
263 {
264 IfxCcu6_initT12hrPin(t12hr, pins->t1xhrInputMode);
265 }
266
267 IfxCcu6_T13hr_In *t13hr = pins->t13hr;
268
269 if (t13hr != NULL_PTR)
270 {
271 IfxCcu6_initT13hrPin(t13hr, pins->t1xhrInputMode);
272 }
273 }
274
275 /* -- interrupt initialisation -- */
276
277 if (config->interrupt1.priority > 0)
278 {
279 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt1.source);
280 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt1.source, config->interrupt1.serviceRequest);
281
282 volatile Ifx_SRC_SRCR *src;
283 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt1.serviceRequest);
284 IfxSrc_init(src, config->interrupt1.typeOfService, config->interrupt1.priority);
285 IfxSrc_enable(src);
286 }
287
288 if (config->interrupt2.priority > 0)
289 {
290 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt2.source);
291 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt2.source, config->interrupt2.serviceRequest);
292
293 volatile Ifx_SRC_SRCR *src;
294 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt2.serviceRequest);
295 IfxSrc_init(src, config->interrupt2.typeOfService, config->interrupt2.priority);
296 IfxSrc_enable(src);
297 }
298
299 if (config->interrupt3.priority > 0)
300 {
301 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt3.source);
302 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt3.source, config->interrupt3.serviceRequest);
303
304 volatile Ifx_SRC_SRCR *src;
305 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt3.serviceRequest);
306 IfxSrc_init(src, config->interrupt3.typeOfService, config->interrupt3.priority);
307 IfxSrc_enable(src);
308 }
309
310 if (config->interrupt4.priority > 0)
311 {
312 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt4.source);
313 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt4.source, config->interrupt4.serviceRequest);
314
315 volatile Ifx_SRC_SRCR *src;
316 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt4.serviceRequest);
317 IfxSrc_init(src, config->interrupt4.typeOfService, config->interrupt4.priority);
318 IfxSrc_enable(src);
319 }
320
321 /* -- output trigger initialisation --*/
322
323 if (config->trigger.outputTriggerEnabled)
324 {
325 IfxCcu6_connectTrigger(ccu6SFR, config->trigger.outputLine, config->trigger.outputTrigger);
326 }
327
328 tPwm->timer = config->timer;
329 tPwm->channelOut = config->channelOut;
330 tPwm->trigger = config->trigger;
331
332 #if IFX_CFG_USE_STANDARD_INTERFACE
333 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (uint32)tPwm == ((uint32)&tPwm->base));
334 tPwm->base.functions.start = (TPwm_Start) & IfxCcu6_TPwm_start;
335 tPwm->base.functions.pause = (TPwm_Pause) & IfxCcu6_TPwm_pause;
336 tPwm->base.functions.resume = (TPwm_Resume) & IfxCcu6_TPwm_resume;
337 tPwm->base.functions.stop = (TPwm_Stop) & IfxCcu6_TPwm_stop;
338 #endif
339 }
340
341
342 void IfxCcu6_TPwm_initModuleConfig(IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
343 {
344 const IfxCcu6_TPwm_Config defaultConfig = {
345 .base = {
346 .frequency = 400000,
347 .waitingTime = 20,
348 .activeCount = 0,
349 .period = 100,
350 .activeState = Ifx_ActiveState_high,
351 },
352
353 .ccu6 = NULL_PTR, // will be initialized below
354
355 .timer = IfxCcu6_TimerId_t13,
356
357 .clock = {
358 .t12ExtClockEnabled = FALSE,
359 .t12ExtClockInput = NULL_PTR,
360 .t12countingInputMode = IfxCcu6_CountingInputMode_internal,
361
362 .t13ExtClockEnabled = FALSE,
363 .t13ExtClockInput = NULL_PTR,
364 .t13countingInputMode = IfxCcu6_CountingInputMode_internal,
365 },
366
367 .timer12 = {
368 .channelId = IfxCcu6_T12Channel_0,
369 .channelMode = IfxCcu6_T12ChannelMode_compareMode,
370 .countMode = IfxCcu6_T12CountMode_edgeAligned,
371 .counterValue = 0,
372 .deadTimeValue = 0,
373 .compareValue = 0,
374 },
375
376 .timer13 = {
377 .counterValue = 0,
378 .compareValue = 0,
379 .t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare,
380 .t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp,
381 },
382
383 .channelOut = IfxCcu6_ChannelOut_cout3,
384
385 .pins = NULL_PTR,
386
387 .interrupt1 = {
388 .source = IfxCcu6_InterruptSource_t12PeriodMatch,
389 .serviceRequest = IfxCcu6_ServiceRequest_0,
390 .priority = 0, // interrupt priority 0
391 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
392 },
393
394 .interrupt2 = {
395 .source = IfxCcu6_InterruptSource_t13PeriodMatch,
396 .serviceRequest = IfxCcu6_ServiceRequest_1,
397 .priority = 0, // interrupt priority 0
398 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
399 },
400
401 .interrupt3 = {
402 .source = IfxCcu6_InterruptSource_t12OneMatch,
403 .serviceRequest = IfxCcu6_ServiceRequest_2,
404 .priority = 0, // interrupt priority 0
405 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
406 },
407
408 .interrupt4 = {
409 .source = IfxCcu6_InterruptSource_trap,
410 .serviceRequest = IfxCcu6_ServiceRequest_3,
411 .priority = 0, // interrupt priority 0
412 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
413 },
414
415 .trigger = {
416 .t12ExtInputTrigger = NULL_PTR,
417 .t13ExtInputTrigger = NULL_PTR,
418 .extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge,
419 .t13InSyncWithT12 = TRUE,
420
421 .outputTriggerEnabled = TRUE,
422 .outputLine = IfxCcu6_TrigOut_0,
423 .outputTrigger = IfxCcu6_TrigSel_cout63,
424 },
425 };
426
427 /* Default Configuration */
428 *config = defaultConfig;
429
430 /* take over module pointer */
431 config->ccu6 = ccu6;
432 }
433
434
435 void IfxCcu6_TPwm_pause(IfxCcu6_TPwm *tPwm)
436 {
437 IfxCcu6_disableModulationOutput(tPwm->ccu6, tPwm->timer, tPwm->channelOut);
438 }
439
440
441 void IfxCcu6_TPwm_resume(IfxCcu6_TPwm *tPwm)
442 {
443 IfxCcu6_enableModulationOutput(tPwm->ccu6, tPwm->timer, tPwm->channelOut);
444 }
445
446
447 void IfxCcu6_TPwm_start(IfxCcu6_TPwm *tPwm)
448 {
449 // Timer 13 modulation //
450
451 if (tPwm->timer == IfxCcu6_TimerId_t13)
452 {
453 // enable shadow transfer
454 IfxCcu6_enableShadowTransfer(tPwm->ccu6, FALSE, TRUE);
455
456 // start Timer 13 when not in sync with Timer 12
457 if (!(tPwm->trigger.t13InSyncWithT12))
458 {
459 if (tPwm->trigger.t13ExtInputTrigger != NULL_PTR)
460 {
461 // external start
462 IfxCcu6_setExternalRunMode(tPwm->ccu6, IfxCcu6_TimerId_t13, tPwm->trigger.extInputTriggerMode);
463 IfxCcu6_setT13InputSignal(tPwm->ccu6, tPwm->trigger.t13ExtInputTrigger);
464 }
465 else
466 {
467 // internal start
468 IfxCcu6_startTimer(tPwm->ccu6, FALSE, TRUE);
469 }
470 }
471 else
472 {}
473 }
474 else
475 {}
476
477 // Timer 12 alone for modulation or when in sync with Timer 13 //
478
479 if ((tPwm->timer == IfxCcu6_TimerId_t12) || (tPwm->trigger.t13InSyncWithT12))
480 {
481 // enable shadow transfer
482 IfxCcu6_enableShadowTransfer(tPwm->ccu6, TRUE, FALSE);
483
484 //start Timer 12
485 if (tPwm->trigger.t12ExtInputTrigger != NULL_PTR)
486 {
487 // external start
488 IfxCcu6_setExternalRunMode(tPwm->ccu6, IfxCcu6_TimerId_t12, tPwm->trigger.extInputTriggerMode);
489 IfxCcu6_setT12InputSignal(tPwm->ccu6, tPwm->trigger.t12ExtInputTrigger);
490 }
491 else
492 {
493 // internal start
494 IfxCcu6_startTimer(tPwm->ccu6, TRUE, FALSE);
495 }
496 }
497 else
498 {}
499 }
500
501
502 void IfxCcu6_TPwm_stop(IfxCcu6_TPwm *tPwm)
503 {
504 // Timer 13 modulation //
505
506 if ((tPwm->timer == IfxCcu6_TimerId_t13) || (tPwm->trigger.t13InSyncWithT12))
507 {
508 // disable shadow transfer
509 IfxCcu6_disableShadowTransfer(tPwm->ccu6, FALSE, TRUE);
510
511 // remove external input trigger if any
512 if (tPwm->trigger.t13ExtInputTrigger != NULL_PTR)
513 {
514 IfxCcu6_setExternalRunMode(tPwm->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ExternalTriggerMode_disable);
515 }
516
517 // remove the sync with Timer 12
518 if (tPwm->trigger.t13InSyncWithT12)
519 {
520 IfxCcu6_setT13TriggerEventMode(tPwm->ccu6, IfxCcu6_T13TriggerEvent_noAction);
521 IfxCcu6_setT13TriggerEventDirection(tPwm->ccu6, IfxCcu6_T13TriggerDirection_noAction);
522 }
523
524 // stop Timer 13
525 IfxCcu6_stopTimer(tPwm->ccu6, FALSE, TRUE);
526 }
527
528 // Timer 12 modulation //
529
530 else
531 {
532 // disable shadow transfer
533 IfxCcu6_disableShadowTransfer(tPwm->ccu6, TRUE, FALSE);
534
535 // remove external input trigger if any
536 if (tPwm->trigger.t12ExtInputTrigger != NULL_PTR)
537 {
538 IfxCcu6_setExternalRunMode(tPwm->ccu6, IfxCcu6_TimerId_t12, IfxCcu6_ExternalTriggerMode_disable);
539 }
540
541 // stop Timer 12
542 IfxCcu6_stopTimer(tPwm->ccu6, TRUE, FALSE);
543 }
544
545 // disable the modulation
546 IfxCcu6_disableModulationOutput(tPwm->ccu6, tPwm->timer, tPwm->channelOut);
547 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2150
IfxCcu6_ServiceRequest_3
Service request output SR3.
Definition: IfxCcu6.h:235
IfxCcu6_ExternalTriggerMode_disable
The external setting of T1xR is disabled.
Definition: IfxCcu6.h:151
IfxCcu6_TPwm_TriggerConfig::outputTriggerEnabled
boolean outputTriggerEnabled
Output trigger connection to VADC enable / disable choice.
Definition: IfxCcu6_TPwm.h:299
IfxCcu6_TPwm
Module handle.
Definition: IfxCcu6_TPwm.h:310
IfxCcu6_setExternalRunMode
IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6.h:1984
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:237
IfxCcu6_TPwm_Clock::t12ExtClockEnabled
boolean t12ExtClockEnabled
Timer 12 external clock enable / disable selection.
Definition: IfxCcu6_TPwm.h:231
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:144
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxCcu6_TPwm_Config::pins
IfxCcu6_TPwm_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_TPwm.h:330
IfxCcu6_enableDeadTime
IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12.
Definition: IfxCcu6.h:1540
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:299
IfxCcu6_InterruptSource_t13PeriodMatch
Interrupt enable for T13 period-match.
Definition: IfxCcu6.h:196
IfxCcu6_TPwm_Clock::t12ExtClockInput
IfxCcu6_T12hr_In * t12ExtClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_TPwm.h:232
TPwm_Pause
void(* TPwm_Pause)(TPwm *handle)
Definition: TPwm.h:52
IfxCcu6_TPwm_Config::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_TPwm.h:324
IfxCcu6_TPwm_Config::timer12
IfxCcu6_TPwm_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_TPwm.h:327
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:176
IfxCcu6_setT13TriggerEventMode
IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare...
Definition: IfxCcu6.h:2121
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:128
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:197
IfxCcu6_enableTimer
IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed.
Definition: IfxCcu6.h:1626
IfxCcu6_setT12ChannelMode
IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels.
Definition: IfxCcu6.h:2071
IfxCcu6_TPwm_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6_TPwm.h:297
IfxCcu6_TPwm_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_TPwm.h:245
IfxCcu6_TPwm_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_TPwm.h:243
TPwm_Config::activeState
Ifx_ActiveState activeState
Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of w...
Definition: TPwm.h:81
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCcu6_TPwm_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_TPwm.h:246
IfxCcu6_ServiceRequest_2
Service request output SR2.
Definition: IfxCcu6.h:234
IfxCcu6_TPwm_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_TPwm.h:263
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxCcu6_TPwm_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_TPwm.h:298
IfxCcu6_setDeadTimeValue
IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (...
Definition: IfxCcu6.h:1972
IfxCcu6_T13TriggerEvent_onT12Period
set T13R upon a period-match of T12
Definition: IfxCcu6.h:326
IfxCcu6_initCc62OutPin
IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin.
Definition: IfxCcu6.h:1789
IfxCcu6_TPwm_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_TPwm.h:244
IfxCcu6_initCout61Pin
IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin.
Definition: IfxCcu6.h:1848
IfxCcu6_routeInterruptNode
void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:283
IfxCcu6_T12CountMode_centerAligned
T12 counts down after detecting a period-match and counts up after detecting a one-match.
Definition: IfxCcu6.h:301
IfxCcu6_T13TriggerEvent_onCC60RCompare
set T13R on a T12 compare event on channel 0
Definition: IfxCcu6.h:322
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:337
IfxCcu6_TPwm_Clock::t13countingInputMode
IfxCcu6_CountingInputMode t13countingInputMode
Input event leading to a counting action of the timer T13.
Definition: IfxCcu6_TPwm.h:236
IfxCcu6_getTimerAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability
Definition: IfxCcu6.h:1715
TPwm_Start
void(* TPwm_Start)(TPwm *handle)
Definition: TPwm.h:51
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu6_setT12CounterValue
IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12.
Definition: IfxCcu6.h:2085
IfxCcu6_setT12Frequency
float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:377
IfxCcu6_T12ChannelMode_compareMode
Compare mode.
Definition: IfxCcu6.h:270
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1603
IfxCcu6_TPwm_Config::timer
IfxCcu6_TimerId timer
Timer number (T12 / T13)
Definition: IfxCcu6_TPwm.h:325
IfxCcu6_TPwm_Config::clock
IfxCcu6_TPwm_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_TPwm.h:326
IfxCcu6_initCout60Pin
IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin.
Definition: IfxCcu6.h:1841
IfxCcu6_TPwm_pause
void IfxCcu6_TPwm_pause(IfxCcu6_TPwm *tPwm)
Pauses the triggered PWM.
Definition: IfxCcu6_TPwm.c:435
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:168
IfxCcu6_TPwm_Config::interrupt2
IfxCcu6_TPwm_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_TPwm.h:332
IfxCcu6_TPwm_Timer13::counterValue
uint16 counterValue
16-bit counter value of Timer13
Definition: IfxCcu6_TPwm.h:285
IfxCcu6_TPwm_Pins::outputMode
IfxPort_OutputMode outputMode
The pin output mode which should be configured.
Definition: IfxCcu6_TPwm.h:260
IfxCcu6_TPwm_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External trigger input signal selection to start the timer 12.
Definition: IfxCcu6_TPwm.h:295
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1560
IfxCcu6_TPwm_resume
void IfxCcu6_TPwm_resume(IfxCcu6_TPwm *tPwm)
Resumes the triggered PWM.
Definition: IfxCcu6_TPwm.c:441
IfxCcu6_TPwm_initModule
void IfxCcu6_TPwm_initModule(IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_TPwm.c:53
IfxCcu6_TPwm_Pins::cc62Out
IFX_CONST IfxCcu6_Cc62_Out * cc62Out
CC62 compare output CC2.
Definition: IfxCcu6_TPwm.h:255
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:336
IfxCcu6_TPwm.h
CCU6 TPWM details.
TPwm_Config::activeCount
Ifx_TimerValue activeCount
Specify active PWM period (TCOUNT)
Definition: TPwm.h:79
IfxCcu6_TPwm_Config::interrupt3
IfxCcu6_TPwm_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_TPwm.h:333
IfxCcu6_TPwm_Clock::t12countingInputMode
IfxCcu6_CountingInputMode t12countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_TPwm.h:233
IfxCcu6_TPwm_Timer12::channelId
IfxCcu6_T12Channel channelId
Capture compare channel of the Timer12.
Definition: IfxCcu6_TPwm.h:272
IfxCcu6_ExternalTriggerMode_risingEdge
Bit T1xR is set if a rising edge of signal T1xHR is detected.
Definition: IfxCcu6.h:152
IfxCcu6_ChannelOut_cout3
CC63 compare output COUT3.
Definition: IfxCcu6.h:118
IfxCcu6_setT13InputSignal
void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:510
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2079
IfxCcu6_T13TriggerDirection_noAction
no action
Definition: IfxCcu6.h:310
IfxCcu6_TPwm_Clock::t13ExtClockEnabled
boolean t13ExtClockEnabled
Timer 13 external clock enable / disable selection.
Definition: IfxCcu6_TPwm.h:234
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:152
IfxCcu6_initCc60OutPin
IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin.
Definition: IfxCcu6.h:1745
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:193
IfxCcu6_TPwm_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_TPwm.h:288
IfxCcu6_CountingInputMode_internal
The T1x prescaler generates the counting events, Bit TCTR4.T1xCNT is not taken into account...
Definition: IfxCcu6.h:126
IfxCcu6_TPwm_Pins::cc61Out
IFX_CONST IfxCcu6_Cc61_Out * cc61Out
CC61 compare output CC1.
Definition: IfxCcu6_TPwm.h:254
IfxCcu6_TPwm_start
void IfxCcu6_TPwm_start(IfxCcu6_TPwm *tPwm)
Starts the triggered PWM.
Definition: IfxCcu6_TPwm.c:447
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1914
IfxCcu6_TPwm::base
TPwm base
Base TPWM object.
Definition: IfxCcu6_TPwm.h:312
IfxCcu6_TrigOut_0
Output Trigger Select for CCU6061 TRIG0.
Definition: IfxCcu6_cfg.h:89
IfxCcu6_T13TriggerDirection_onT12CountingUp
while T12 is counting up
Definition: IfxCcu6.h:311
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxCcu6_TPwm_Config
Configuration structure of the module.
Definition: IfxCcu6_TPwm.h:321
IfxCcu6_TPwm_Config::timer13
IfxCcu6_TPwm_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_TPwm.h:328
IfxCcu6_initT12hrPin
IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin.
Definition: IfxCcu6.h:1884
IfxCcu6_TPwm_TriggerConfig::outputTrigger
IfxCcu6_TrigSel outputTrigger
Output Trigger selection.
Definition: IfxCcu6_TPwm.h:301
IfxCcu6_setT12CompareValue
void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers)
Definition: IfxCcu6.c:360
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:136
IfxCcu6_TPwm_Pins::cc60Out
IFX_CONST IfxCcu6_Cc60_Out * cc60Out
CC60 compare output CC0.
Definition: IfxCcu6_TPwm.h:253
IfxCcu6_disableModulationOutput
void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12...
Definition: IfxCcu6.c:70
IfxCcu6_TPwm_stop
void IfxCcu6_TPwm_stop(IfxCcu6_TPwm *tPwm)
Stops the triggered PWM.
Definition: IfxCcu6_TPwm.c:502
TPwm_Config::frequency
float32 frequency
Specify expected PWM frequency in Hertz.
Definition: TPwm.h:77
IfxCcu6_setCountingInputMode
IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13).
Definition: IfxCcu6.h:1958
IfxCcu6_TPwm_Timer12::deadTimeValue
uint8 deadTimeValue
Value of the dead time to be induced.
Definition: IfxCcu6_TPwm.h:276
IfxCcu6_TPwm_Clock::t13ExtClockInput
IfxCcu6_T13hr_In * t13ExtClockInput
External input signal selection for timer 13.
Definition: IfxCcu6_TPwm.h:235
IfxCcu6_setT13CounterValue
IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13.
Definition: IfxCcu6.h:2103
TPwm_Config::period
Ifx_TimerValue period
Specify expected PWM period in ticks.
Definition: TPwm.h:80
IfxCcu6_TPwm_initModuleConfig
void IfxCcu6_TPwm_initModuleConfig(IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_TPwm.c:342
IfxCcu6_TPwm_Timer13::compareValue
uint16 compareValue
16-bit comapre value of Timer12
Definition: IfxCcu6_TPwm.h:286
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_TPwm_Pins::cout62
IFX_CONST IfxCcu6_Cout62_Out * cout62
CC62 compare output COUT2.
Definition: IfxCcu6_TPwm.h:258
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_T13TriggerEvent_noAction
no action
Definition: IfxCcu6.h:321
IfxCcu6_initT13hrPin
IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin.
Definition: IfxCcu6.h:1899
IfxCcu6_TrigSel_cout63
Definition: IfxCcu6_cfg.h:96
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_TPwm_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_TPwm.h:287
IfxCcu6_TPwm_Timer12::channelMode
IfxCcu6_T12ChannelMode channelMode
The operating mode for the T12 channel.
Definition: IfxCcu6_TPwm.h:273
IfxCcu6_TPwm_Pins::cout60
IFX_CONST IfxCcu6_Cout60_Out * cout60
CC60 compare output COUT0.
Definition: IfxCcu6_TPwm.h:256
IfxCcu6_connectTrigger
void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
Definition: IfxCcu6.c:53
TPwm_Config::waitingTime
Ifx_TimerValue waitingTime
Specify the expected ticks before timer starts (TWAIT)
Definition: TPwm.h:78
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:194
IfxCcu6_T12Channel_0
T12 channel CC60.
Definition: IfxCcu6.h:260
IfxCcu6_TPwm_Pins::cout61
IFX_CONST IfxCcu6_Cout61_Out * cout61
CC61 compare output COUT1.
Definition: IfxCcu6_TPwm.h:257
IfxCcu6_TPwm_Pins::cout63
IFX_CONST IfxCcu6_Cout63_Out * cout63
CC63 compare output COUT3.
Definition: IfxCcu6_TPwm.h:259
IfxCcu6_TPwm_Config::base
TPwm_Config base
Base configuration.
Definition: IfxCcu6_TPwm.h:323
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:233
IfxCcu6_initCout63Pin
IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin.
Definition: IfxCcu6.h:1862
IfxCcu6_TPwm_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxCcu6_TPwm.h:261
IfxCcu6_setT12InputSignal
void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:426
IfxCcu6_TPwm_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_TPwm.h:264
IfxCcu6_TPwm_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_TPwm.h:262
IfxCcu6_TPwm_Config::channelOut
IfxCcu6_ChannelOut channelOut
Capture compare output pin selection.
Definition: IfxCcu6_TPwm.h:329
IfxCcu6_disableShadowTransfer
IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1478
IfxCcu6_setT13TriggerEventDirection
IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction.
Definition: IfxCcu6.h:2115
IfxCcu6_TPwm_Config::interrupt1
IfxCcu6_TPwm_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_TPwm.h:331
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:160
IfxCcu6_initCout62Pin
IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin.
Definition: IfxCcu6.h:1855
IfxCcu6_setT13CompareValue
IFX_INLINE void IfxCcu6_setT13CompareValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit compare value of Timer13 (writes into shadow register)
Definition: IfxCcu6.h:2097
IfxCcu6_TPwm_TriggerConfig::outputLine
IfxCcu6_TrigOut outputLine
Trigger out selection.
Definition: IfxCcu6_TPwm.h:300
IfxCcu6_TPwm_Config::trigger
IfxCcu6_TPwm_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_TPwm.h:335
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2091
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2140
TRUE
#define TRUE
Definition: Platform_Types.h:90
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxCcu6_setT13PeriodValue
IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match.
Definition: IfxCcu6.h:2109
IfxCcu6_initCc61OutPin
IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin.
Definition: IfxCcu6.h:1767
IfxCcu6_TPwm_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_TPwm.h:274
IfxCcu6_TPwm_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External trigger input signal selection to start the timer 13.
Definition: IfxCcu6_TPwm.h:296
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxCcu6_TPwm_Config::interrupt4
IfxCcu6_TPwm_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_TPwm.h:334
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:145
TPwm_Resume
void(* TPwm_Resume)(TPwm *handle)
Definition: TPwm.h:53
IfxCcu6_enableModulationOutput
void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 ...
Definition: IfxCcu6.c:114
IfxCcu6_setT13Frequency
float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by ...
Definition: IfxCcu6.c:461
TPwm_Stop
void(* TPwm_Stop)(TPwm *handle)
Definition: TPwm.h:54
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:232
IfxCcu6_setOutputPassiveState
IFX_INLINE void IfxCcu6_setOutputPassiveState(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the state of the corresponding compare channel, that is considered to be the passive state...
Definition: IfxCcu6.h:2033
IfxCcu6_TPwm_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_TPwm.h:251


iLLD_TC26B: IfxCcu6_TPwm.h Source File

  • Ccu6
  • TPwm
IfxCcu6_TPwm.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_TPwm.h
3 * \brief CCU6 TPWM details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Ccu6_TPwm_Usage How to use the CCU6 TPWM Interface driver?
43 * \ingroup IfxLld_Ccu6_TPwm
44 *
45 * The TPWM interface driver provides a default CCU6 configuration for PWM modulation output through the selected timer block.
46 *
47 * User can select the various configuration options that hardware allows
48 *
49 * In the following sections it will be described, how to integrate the driver into the application framework.
50 *
51 *
52 * \section IfxLld_Ccu6_TPwm_Preparation Preparation
53 *
54 *
55 * \subsection IfxLld_Ccu6_TPwm_Include Include Files
56 *
57 * Include following header file into your C code:
58 * \code
59 * #include <Ccu6/TPwm/IfxCcu6_TPwm.h>
60 * \endcode
61 *
62 * \subsection IfxLld_Ccu6_TPwm_Variables Variables
63 *
64 * Declare the TPWM handle as global variable in your C code:
65 *
66 * \code
67 * // used globally
68 * static IfxCcu6_TPwm tPwm;
69 * \endcode
70 *
71 * \subsection IfxLld_Ccu6_TPwm_Interrupt Interrupt Handler Installation
72 *
73 * See also \ref IfxLld_Cpu_Irq_Usage
74 *
75 * Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
76 * \code
77 * // priorities are normally defined in Ifx_IntPrioDef.h
78 * #define IFX_INTPRIO_CCU6 1
79 * \endcode
80 *
81 * Add the interrupt service routine to your C code.
82 * \code
83 * IFX_INTERRUPT(ccu60ISR_TPwm, 0, IFX_INTPRIO_CCU6)
84 * {
85 * //user code
86 * }
87 * \endcode
88 *
89 * Finally install the interrupt handlers in your initialisation function:
90 * \code
91 * // install interrupt handlers
92 * IfxCpu_Irq_installInterruptHandler(&ccu60ISR_TPwm, IFX_INTPRIO_CCU6);
93 * IfxCpu_enableInterrupts();
94 * \endcode
95 *
96 * \subsection IfxLld_Ccu6_TPwm_Init Module Initialisation
97 *
98 * The module initialisation can be done in the same function. Here an example:
99 * \code
100 * // create configuration
101 * IfxCcu6_TPwm_Config tPwmConfig;
102 * IfxCcu6_TPwm_initModuleConfig(&tPwmConfig, &MODULE_CCU60);
103 *
104 * // configure the frequency of the timer in case of internal start
105 * // this frequency will be set for the timer block selected later
106 * tPwmConfig.base.frequency = 400000;
107 *
108 * // configure the period of the timer
109 * tPwmConfig.base.period = 100;
110 *
111 * // configure the waiting time in case of delayed T13 start in sync with T12
112 * tPwmConfig.base.waitingTime = 20;
113 *
114 * // select the active state of the output
115 * tPwmConfig.base.activeState = Ifx_ActiveState_high;
116 *
117 * // select the timer through which PWM is to be generated
118 * tPwmConfig.timer = IfxCcu6_TimerId_t13;
119 *
120 * // configure the clock for internal mode
121 * tPwmConfig.clock.t13ExtClockEnabled = FALSE;
122 * tPwmConfig.clock.t13ExtClockInput = NULL_PTR;
123 * tPwmConfig.clock.t13countingInputMode = IfxCcu6_CountingInputMode_internal;
124 *
125 * // configure the selcted timer block
126 * tPwmConfig.timer13.counterValue = 0;
127 * tPwmConfig.timer13.compareValue = 100;
128 * // configure the syncronisation, in case of sync start with T12
129 * tPwmConfig.timer13.t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare;
130 * tPwmConfig.timer13.t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp;
131 *
132 * //select the channel out for modulation
133 * tPwmConfig.channelOut = IfxCcu6_ChannelOut_cout3;
134 *
135 * // pin configuration
136 * const IfxCcu6_TPwm_Pins pins = {
137 * NULL, // CC60Out pin not used
138 * NULL, // CC61Out pin not used
139 * NULL, // CC62Out pin not used
140 * NULL, // COUT60 pin not used
141 * NULL, // COUT61 pin not used
142 * NULL, // COUT62 pin not used
143 * IfxCcu60_COUT63_P00_0_OUT, // COUT63 pin
144 * IfxPort_OutputMode_pushPull,
145 * IfxPort_PadDriver_cmosAutomotiveSpeed1
146 * };
147 * tPwmConfig.pins = &pins;
148 *
149 * // configure the interrupts
150 * tPwmConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_t13CompareMatch;
151 * tPwmConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
152 * tPwmConfig.interrupt1.priority = IFX_INTPRIO_CCU6;
153 * tPwmConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
154 *
155 * // configure input and output triggers
156 * tPwmConfig.trigger.t12ExtInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
157 * tPwmConfig.trigger.t13ExtInputTrigger = NULL_PTR;
158 * tPwmConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
159 * tPwmConfig.trigger.t13InSyncWithT12 = TRUE;
160 *
161 * tPwmConfig.trigger.outputTriggerEnabled = TRUE;
162 * tPwmConfig.trigger.outputLine = IfxCcu6_TrigOut_0;
163 * tPwmConfig.trigger.outputTrigger = IfxCcu6_TrigSel_cout63;
164 *
165 *
166 * // initialize the module
167 * IfxCcu6_TPwm_initModule(&tPwm, &tPwmConfig);
168 * \endcode
169 *
170 *
171 * The TPWM is ready for use now!
172 *
173 *
174 * \section IfxLld_Ccu6_TPwm_ModulationControl Modulation Control
175 *
176 *
177 * The TPWM driver provides simple to use Modulation Control functions
178 *
179 * This means: you can start, stop, pause and resume the modulation once the module is initialised with the appropriate configuration
180 *
181 * Start the modulation
182 * \code
183 * IfxCcu6_TPwm_start(&tPwm);
184 * \endcode
185 *
186 * Stop the modulation
187 * \code
188 * IfxCcu6_TPwm_stop(&tPwm);
189 * \endcode
190 *
191 * Pause the modulation
192 * \code
193 * IfxCcu6_TPwm_pause(&tPwm);
194 * \endcode
195 *
196 * Resume the modulation
197 * \code
198 * IfxCcu6_TPwm_resume(&tPwm);
199 * \endcode
200 *
201 * \defgroup IfxLld_Ccu6_TPwm TPWM Interface driver
202 * \ingroup IfxLld_Ccu6
203 * \defgroup IfxLld_Ccu6_TPwm_DataStructures Data Structures
204 * \ingroup IfxLld_Ccu6_TPwm
205 * \defgroup IfxLld_Ccu6_TPwm_Module_Initialize_Functions Module Initialize Functions
206 * \ingroup IfxLld_Ccu6_TPwm
207 * \defgroup IfxLld_Ccu6_TPwm_Modultion_Control_Functions Modultion Control Functions
208 * \ingroup IfxLld_Ccu6_TPwm
209 */
210
211 #ifndef IFXCCU6_TPWM_H
212 #define IFXCCU6_TPWM_H 1
213
214 /******************************************************************************/
215 /*----------------------------------Includes----------------------------------*/
216 /******************************************************************************/
217
218 #include "Ccu6/Std/IfxCcu6.h"
219 #include "If/Ccu6If/TPwm.h"
220
221 /******************************************************************************/
222 /*-----------------------------Data Structures--------------------------------*/
223 /******************************************************************************/
224
225 /** \addtogroup IfxLld_Ccu6_TPwm_DataStructures
226 * \{ */
227 /** \brief Structure for clock configuration
228 */
229 typedef struct
230 {
231 boolean t12ExtClockEnabled; /**< \brief Timer 12 external clock enable / disable selection */
232 IfxCcu6_T12hr_In *t12ExtClockInput; /**< \brief External input signal selection for timer 12 */
233 IfxCcu6_CountingInputMode t12countingInputMode; /**< \brief Input event leading to a counting action of the timer T12 */
234 boolean t13ExtClockEnabled; /**< \brief Timer 13 external clock enable / disable selection */
235 IfxCcu6_T13hr_In *t13ExtClockInput; /**< \brief External input signal selection for timer 13 */
236 IfxCcu6_CountingInputMode t13countingInputMode; /**< \brief Input event leading to a counting action of the timer T13 */
237 } IfxCcu6_TPwm_Clock;
238
239 /** \brief Structure for interrupt configuration
240 */
241 typedef struct
242 {
243 IfxCcu6_InterruptSource source; /**< \brief Interrupt source selection */
244 IfxCcu6_ServiceRequest serviceRequest; /**< \brief Selection of service request outputs */
245 uint16 priority; /**< \brief Interrupt priority */
246 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
247 } IfxCcu6_TPwm_InterruptConfig;
248
249 /** \brief Structure for CCU6 output pin configuration
250 */
251 typedef struct
252 {
253 IFX_CONST IfxCcu6_Cc60_Out *cc60Out; /**< \brief CC60 compare output CC0 */
254 IFX_CONST IfxCcu6_Cc61_Out *cc61Out; /**< \brief CC61 compare output CC1 */
255 IFX_CONST IfxCcu6_Cc62_Out *cc62Out; /**< \brief CC62 compare output CC2 */
256 IFX_CONST IfxCcu6_Cout60_Out *cout60; /**< \brief CC60 compare output COUT0 */
257 IFX_CONST IfxCcu6_Cout61_Out *cout61; /**< \brief CC61 compare output COUT1 */
258 IFX_CONST IfxCcu6_Cout62_Out *cout62; /**< \brief CC62 compare output COUT2 */
259 IFX_CONST IfxCcu6_Cout63_Out *cout63; /**< \brief CC63 compare output COUT3 */
260 IfxPort_OutputMode outputMode; /**< \brief The pin output mode which should be configured */
261 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
262 IFX_CONST IfxCcu6_T12hr_In *t12hr; /**< \brief T12HR input signal */
263 IFX_CONST IfxCcu6_T13hr_In *t13hr; /**< \brief T13HR input signal */
264 IfxPort_InputMode t1xhrInputMode; /**< \brief The T1xHR pin input mode which should be configured */
265 } IfxCcu6_TPwm_Pins;
266
267 /** \brief Structure for Timer 12
268 */
269 typedef struct
270 {
271 IfxCcu6_TimerInputClock clockInput; /**< \brief Input clock selection (prescaler) */
272 IfxCcu6_T12Channel channelId; /**< \brief Capture compare channel of the Timer12 */
273 IfxCcu6_T12ChannelMode channelMode; /**< \brief The operating mode for the T12 channel */
274 IfxCcu6_T12CountMode countMode; /**< \brief Operating mode of Timer 12 */
275 uint16 counterValue; /**< \brief 16-bit counter value of Timer12 */
276 uint8 deadTimeValue; /**< \brief Value of the dead time to be induced */
277 uint16 compareValue; /**< \brief 16-bit comapre value of Timer12 */
278 } IfxCcu6_TPwm_Timer12;
279
280 /** \brief Structure for Timer 13
281 */
282 typedef struct
283 {
284 IfxCcu6_TimerInputClock clockInput; /**< \brief Input clock selection (prescaler) */
285 uint16 counterValue; /**< \brief 16-bit counter value of Timer13 */
286 uint16 compareValue; /**< \brief 16-bit comapre value of Timer12 */
287 IfxCcu6_T13TriggerEvent t12SyncEvent; /**< \brief T12 sync trigger event to start T13 */
288 IfxCcu6_T13TriggerDirection t12SyncDirection; /**< \brief Additional information to control trigger event selection */
289 } IfxCcu6_TPwm_Timer13;
290
291 /** \brief Configuration structure for external triggers
292 */
293 typedef struct
294 {
295 IfxCcu6_T12hr_In *t12ExtInputTrigger; /**< \brief External trigger input signal selection to start the timer 12 */
296 IfxCcu6_T13hr_In *t13ExtInputTrigger; /**< \brief External trigger input signal selection to start the timer 13 */
297 IfxCcu6_ExternalTriggerMode extInputTriggerMode; /**< \brief Event of signal T1xHR that can set the run bit T1xR by HW */
298 boolean t13InSyncWithT12; /**< \brief Selection of Timer 13 start in sync with T12 */
299 boolean outputTriggerEnabled; /**< \brief Output trigger connection to VADC enable / disable choice */
300 IfxCcu6_TrigOut outputLine; /**< \brief Trigger out selection */
301 IfxCcu6_TrigSel outputTrigger; /**< \brief Output Trigger selection */
302 } IfxCcu6_TPwm_TriggerConfig;
303
304 /** \} */
305
306 /** \addtogroup IfxLld_Ccu6_TPwm_DataStructures
307 * \{ */
308 /** \brief Module handle
309 */
310 typedef struct
311 {
312 TPwm base; /**< \brief Base TPWM object */
313 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
314 IfxCcu6_TimerId timer; /**< \brief Timer number (T12 / T13) */
315 IfxCcu6_ChannelOut channelOut; /**< \brief Capture compare output pin selection */
316 IfxCcu6_TPwm_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
317 } IfxCcu6_TPwm;
318
319 /** \brief Configuration structure of the module
320 */
321 typedef struct
322 {
323 TPwm_Config base; /**< \brief Base configuration */
324 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
325 IfxCcu6_TimerId timer; /**< \brief Timer number (T12 / T13) */
326 IfxCcu6_TPwm_Clock clock; /**< \brief Structure for clock configuration */
327 IfxCcu6_TPwm_Timer12 timer12; /**< \brief Structure for Timer 12 */
328 IfxCcu6_TPwm_Timer13 timer13; /**< \brief Structure for Timer 13 */
329 IfxCcu6_ChannelOut channelOut; /**< \brief Capture compare output pin selection */
330 IfxCcu6_TPwm_Pins *pins; /**< \brief Structure for CCU6 output pin configuration */
331 IfxCcu6_TPwm_InterruptConfig interrupt1; /**< \brief Structure for first interrupt configuration */
332 IfxCcu6_TPwm_InterruptConfig interrupt2; /**< \brief Structure for second interrupt configuration */
333 IfxCcu6_TPwm_InterruptConfig interrupt3; /**< \brief Structure for third interrupt configuration */
334 IfxCcu6_TPwm_InterruptConfig interrupt4; /**< \brief Structure for fourth interrupt configuration */
335 IfxCcu6_TPwm_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
336 } IfxCcu6_TPwm_Config;
337
338 /** \} */
339
340 /** \addtogroup IfxLld_Ccu6_TPwm_Module_Initialize_Functions
341 * \{ */
342
343 /******************************************************************************/
344 /*-------------------------Global Function Prototypes-------------------------*/
345 /******************************************************************************/
346
347 /** \brief Fills the config structure with default values
348 * \param config Configuration structure of the module
349 * \param ccu6 Pointer to the base of CCU6 registers
350 * \return None
351 *
352 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
353 *
354 */
355 IFX_EXTERN void IfxCcu6_TPwm_initModuleConfig(IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6);
356
357 /** \} */
358
359 /** \addtogroup IfxLld_Ccu6_TPwm_Modultion_Control_Functions
360 * \{ */
361
362 /******************************************************************************/
363 /*-------------------------Global Function Prototypes-------------------------*/
364 /******************************************************************************/
365
366 /** \brief Initialises the module with default configuration
367 * \param tPwm Module handle
368 * \param config Configuration structure of the module
369 * \return None
370 *
371 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
372 *
373 */
374 IFX_EXTERN void IfxCcu6_TPwm_initModule(IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config);
375
376 /** \brief Pauses the triggered PWM
377 * \param tPwm Module handle
378 * \return None
379 *
380 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
381 *
382 */
383 IFX_EXTERN void IfxCcu6_TPwm_pause(IfxCcu6_TPwm *tPwm);
384
385 /** \brief Resumes the triggered PWM
386 * \param tPwm Module handle
387 * \return None
388 *
389 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
390 *
391 */
392 IFX_EXTERN void IfxCcu6_TPwm_resume(IfxCcu6_TPwm *tPwm);
393
394 /** \brief Starts the triggered PWM
395 * \param tPwm Module handle
396 * \return None
397 *
398 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
399 *
400 */
401 IFX_EXTERN void IfxCcu6_TPwm_start(IfxCcu6_TPwm *tPwm);
402
403 /** \brief Stops the triggered PWM
404 * \param tPwm Module handle
405 * \return None
406 *
407 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
408 *
409 */
410 IFX_EXTERN void IfxCcu6_TPwm_stop(IfxCcu6_TPwm *tPwm);
411
412 /** \} */
413
414 #endif /* IFXCCU6_TPWM_H */
IfxCcu6_TPwm_InterruptConfig
Structure for interrupt configuration.
Definition: IfxCcu6_TPwm.h:241
IfxCcu6_TPwm_TriggerConfig
Configuration structure for external triggers.
Definition: IfxCcu6_TPwm.h:293
IfxCcu6_TPwm_TriggerConfig::outputTriggerEnabled
boolean outputTriggerEnabled
Output trigger connection to VADC enable / disable choice.
Definition: IfxCcu6_TPwm.h:299
IfxCcu6_TPwm
Module handle.
Definition: IfxCcu6_TPwm.h:310
IfxCcu6_TPwm_Clock::t12ExtClockEnabled
boolean t12ExtClockEnabled
Timer 12 external clock enable / disable selection.
Definition: IfxCcu6_TPwm.h:231
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:144
IfxCcu6_TPwm_Config::pins
IfxCcu6_TPwm_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_TPwm.h:330
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:179
IfxCcu6_TPwm_Clock::t12ExtClockInput
IfxCcu6_T12hr_In * t12ExtClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_TPwm.h:232
IfxCcu6_TPwm::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_TPwm.h:313
IfxCcu6_TPwm_Config::timer12
IfxCcu6_TPwm_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_TPwm.h:327
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:176
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:128
IfxCcu6_ChannelOut
IfxCcu6_ChannelOut
Capture compare output pins.
Definition: IfxCcu6.h:110
IfxCcu6_TPwm_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6_TPwm.h:297
IfxCcu6_TPwm_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_TPwm.h:245
IfxCcu6_TPwm_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_TPwm.h:243
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxCcu6_TPwm_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_TPwm.h:246
IfxCcu6_TPwm_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_TPwm.h:263
IfxCcu6_TPwm_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_TPwm.h:298
IfxCcu6_TPwm_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_TPwm.h:244
TPwm_Config
Configuration structure of the TPwm interface.
Definition: TPwm.h:75
IfxCcu6_T13TriggerDirection
IfxCcu6_T13TriggerDirection
Delivers additional information to control the automatic set of bit T13R in the case that the trigger...
Definition: IfxCcu6.h:308
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCcu6_TPwm_Clock::t13countingInputMode
IfxCcu6_CountingInputMode t13countingInputMode
Input event leading to a counting action of the timer T13.
Definition: IfxCcu6_TPwm.h:236
IfxCcu6_TPwm::timer
IfxCcu6_TimerId timer
Timer number (T12 / T13)
Definition: IfxCcu6_TPwm.h:314
IfxCcu6_TPwm_Config::clock
IfxCcu6_TPwm_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_TPwm.h:326
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCcu6_TPwm_pause
IFX_EXTERN void IfxCcu6_TPwm_pause(IfxCcu6_TPwm *tPwm)
Pauses the triggered PWM.
Definition: IfxCcu6_TPwm.c:435
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:168
IfxCcu6_TPwm_Config::interrupt2
IfxCcu6_TPwm_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_TPwm.h:332
IfxCcu6_TPwm_Timer12::counterValue
uint16 counterValue
16-bit counter value of Timer12
Definition: IfxCcu6_TPwm.h:275
IfxCcu6_TPwm_Pins::outputMode
IfxPort_OutputMode outputMode
The pin output mode which should be configured.
Definition: IfxCcu6_TPwm.h:260
IfxCcu6_TPwm_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External trigger input signal selection to start the timer 12.
Definition: IfxCcu6_TPwm.h:295
IfxCcu6_TPwm_Clock
Structure for clock configuration.
Definition: IfxCcu6_TPwm.h:229
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu6_TPwm_resume
IFX_EXTERN void IfxCcu6_TPwm_resume(IfxCcu6_TPwm *tPwm)
Resumes the triggered PWM.
Definition: IfxCcu6_TPwm.c:441
IfxCcu6_TPwm_initModule
IFX_EXTERN void IfxCcu6_TPwm_initModule(IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_TPwm.c:53
IfxCcu6_CountingInputMode
IfxCcu6_CountingInputMode
Defines the input event leading to a counting action of the timer (T12 / T13) Definition in Ifx_CCU...
Definition: IfxCcu6.h:124
IfxCcu6_TPwm_Pins::cc62Out
IFX_CONST IfxCcu6_Cc62_Out * cc62Out
CC62 compare output CC2.
Definition: IfxCcu6_TPwm.h:255
IfxCcu6_TPwm_Config::interrupt3
IfxCcu6_TPwm_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_TPwm.h:333
IfxCcu6_TPwm_Clock::t12countingInputMode
IfxCcu6_CountingInputMode t12countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_TPwm.h:233
IfxCcu6_TPwm_Timer12::channelId
IfxCcu6_T12Channel channelId
Capture compare channel of the Timer12.
Definition: IfxCcu6_TPwm.h:272
IfxCcu6_TPwm_Clock::t13ExtClockEnabled
boolean t13ExtClockEnabled
Timer 13 external clock enable / disable selection.
Definition: IfxCcu6_TPwm.h:234
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:152
IfxCcu6_T12Channel
IfxCcu6_T12Channel
Capture compare channel of Timer12.
Definition: IfxCcu6.h:258
IfxCcu6_T12ChannelMode
IfxCcu6_T12ChannelMode
The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x.
Definition: IfxCcu6.h:267
IfxCcu6_TPwm_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_TPwm.h:288
IfxCcu6.h
CCU6 basic functionality.
TPwm.h
TPWM interface.
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:230
IfxCcu6_T13TriggerEvent
IfxCcu6_T13TriggerEvent
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare sign...
Definition: IfxCcu6.h:319
IfxCcu6_TPwm_Pins::cc61Out
IFX_CONST IfxCcu6_Cc61_Out * cc61Out
CC61 compare output CC1.
Definition: IfxCcu6_TPwm.h:254
IfxCcu6_TPwm_start
IFX_EXTERN void IfxCcu6_TPwm_start(IfxCcu6_TPwm *tPwm)
Starts the triggered PWM.
Definition: IfxCcu6_TPwm.c:447
IfxCcu6_TimerId
IfxCcu6_TimerId
Timer number ( T12 / T13 )
Definition: IfxCcu6.h:334
IfxCcu6_TPwm::base
TPwm base
Base TPWM object.
Definition: IfxCcu6_TPwm.h:312
IfxCcu6_TPwm_Config
Configuration structure of the module.
Definition: IfxCcu6_TPwm.h:321
IfxCcu6_TPwm_Config::timer13
IfxCcu6_TPwm_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_TPwm.h:328
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:297
IfxCcu6_TPwm_TriggerConfig::outputTrigger
IfxCcu6_TrigSel outputTrigger
Output Trigger selection.
Definition: IfxCcu6_TPwm.h:301
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:136
IfxCcu6_TPwm_Pins::cc60Out
IFX_CONST IfxCcu6_Cc60_Out * cc60Out
CC60 compare output CC0.
Definition: IfxCcu6_TPwm.h:253
TPwm_s
Structure of the TPwm interface.
Definition: TPwm.h:65
IfxCcu6_TPwm_stop
IFX_EXTERN void IfxCcu6_TPwm_stop(IfxCcu6_TPwm *tPwm)
Stops the triggered PWM.
Definition: IfxCcu6_TPwm.c:502
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxCcu6_TPwm_Timer12::deadTimeValue
uint8 deadTimeValue
Value of the dead time to be induced.
Definition: IfxCcu6_TPwm.h:276
IfxCcu6_TPwm_Clock::t13ExtClockInput
IfxCcu6_T13hr_In * t13ExtClockInput
External input signal selection for timer 13.
Definition: IfxCcu6_TPwm.h:235
IfxCcu6_ExternalTriggerMode
IfxCcu6_ExternalTriggerMode
Defines the event of signal T1xHR that can set the run bit T1xR by HW Definition in Ifx_CCU...
Definition: IfxCcu6.h:149
IfxCcu6_TPwm_initModuleConfig
IFX_EXTERN void IfxCcu6_TPwm_initModuleConfig(IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_TPwm.c:342
IfxCcu6_TPwm_Timer12::compareValue
uint16 compareValue
16-bit comapre value of Timer12
Definition: IfxCcu6_TPwm.h:277
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_TPwm_Pins::cout62
IFX_CONST IfxCcu6_Cout62_Out * cout62
CC62 compare output COUT2.
Definition: IfxCcu6_TPwm.h:258
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_TPwm_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_TPwm.h:287
IfxCcu6_TPwm_Timer12::channelMode
IfxCcu6_T12ChannelMode channelMode
The operating mode for the T12 channel.
Definition: IfxCcu6_TPwm.h:273
IfxCcu6_TPwm_Pins::cout60
IFX_CONST IfxCcu6_Cout60_Out * cout60
CC60 compare output COUT0.
Definition: IfxCcu6_TPwm.h:256
IfxCcu6_TPwm_Pins::cout61
IFX_CONST IfxCcu6_Cout61_Out * cout61
CC61 compare output COUT1.
Definition: IfxCcu6_TPwm.h:257
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxCcu6_TPwm_Pins::cout63
IFX_CONST IfxCcu6_Cout63_Out * cout63
CC63 compare output COUT3.
Definition: IfxCcu6_TPwm.h:259
IfxCcu6_TPwm_Config::base
TPwm_Config base
Base configuration.
Definition: IfxCcu6_TPwm.h:323
IfxCcu6_TPwm_Timer12::clockInput
IfxCcu6_TimerInputClock clockInput
Input clock selection (prescaler)
Definition: IfxCcu6_TPwm.h:271
IfxCcu6_TPwm_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxCcu6_TPwm.h:261
IfxCcu6_TPwm_Timer12
Structure for Timer 12.
Definition: IfxCcu6_TPwm.h:269
IfxCcu6_TPwm_Timer13
Structure for Timer 13.
Definition: IfxCcu6_TPwm.h:282
IfxCcu6_TPwm_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_TPwm.h:264
IfxCcu6_TPwm_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_TPwm.h:262
IfxCcu6_TrigSel
IfxCcu6_TrigSel
Definition: IfxCcu6_cfg.h:94
IfxCcu6_TPwm::channelOut
IfxCcu6_ChannelOut channelOut
Capture compare output pin selection.
Definition: IfxCcu6_TPwm.h:315
IfxCcu6_TPwm_Config::interrupt1
IfxCcu6_TPwm_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_TPwm.h:331
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:160
IfxCcu6_TPwm_TriggerConfig::outputLine
IfxCcu6_TrigOut outputLine
Trigger out selection.
Definition: IfxCcu6_TPwm.h:300
IfxCcu6_TrigOut
IfxCcu6_TrigOut
Definition: IfxCcu6_cfg.h:87
IfxCcu6_TPwm::trigger
IfxCcu6_TPwm_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_TPwm.h:316
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCcu6_TPwm_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_TPwm.h:274
IfxCcu6_TPwm_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External trigger input signal selection to start the timer 13.
Definition: IfxCcu6_TPwm.h:296
IfxCcu6_TPwm_Config::interrupt4
IfxCcu6_TPwm_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_TPwm.h:334
IfxCcu6_TimerInputClock
IfxCcu6_TimerInputClock
Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according t...
Definition: IfxCcu6.h:343
IfxCcu6_TPwm_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_TPwm.h:251


iLLD_TC26B: IfxCcu6_Timer.c Source File

  • Ccu6
  • Timer
IfxCcu6_Timer.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_Timer.c
3 * \brief CCU6 TIMER details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxCcu6_Timer.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxCcu6_Timer_countOneStep(IfxCcu6_Timer *timer)
54 {
55 if (timer->timer == IfxCcu6_TimerId_t13)
56 {
57 // enable shadow transfer
58 IfxCcu6_enableShadowTransfer(timer->ccu6, FALSE, TRUE);
59
60 // enable manual counting mode
61 IfxCcu6_setCountingInputMode(timer->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_CountingInputMode_manual);
62 IfxCcu6_enableCountEvent(timer->ccu6, FALSE, TRUE);
63 }
64 else if (timer->timer == IfxCcu6_TimerId_t12)
65 {
66 // enable shadow transfer
67 IfxCcu6_enableShadowTransfer(timer->ccu6, TRUE, FALSE);
68
69 // enable manual counting mode
70 IfxCcu6_setCountingInputMode(timer->ccu6, IfxCcu6_TimerId_t12, IfxCcu6_CountingInputMode_manual);
71 IfxCcu6_enableCountEvent(timer->ccu6, TRUE, FALSE);
72 }
73 }
74
75
76 void IfxCcu6_Timer_initModule(IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
77 {
78 Ifx_CCU6 *ccu6SFR = config->ccu6; // pointer to CCU6 registers
79 timer->ccu6 = ccu6SFR; // adding register pointer to module handler
80
81 /* -- hardware module initialisation -- */
82
83 // enable module if it hasn't been enabled by any other interface //
84 if (IfxCcu6_isModuleEnabled(ccu6SFR) == FALSE)
85 {
86 IfxCcu6_enableModule(ccu6SFR);
87 }
88
89 /* -- timer initialisation -- */
90
91 // Timer 13 initialisation //
92
93 if ((config->timer == IfxCcu6_TimerId_t13) || (config->synchronousOperation))
94 {
95 // enable Timer13 if it hasn't been enabled by any other interface //
96 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t13) == FALSE)
97 {
98 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t13);
99 }
100
101 // clock initialisation //
102
103 if (config->clock.t13ExtClockEnabled) // if external source is selected as reference
104 {
105 // input signal selection
106 if (config->clock.t13ExtClockInput != NULL_PTR)
107 {
108 IfxCcu6_setT13InputSignal(config->ccu6, config->clock.t13ExtClockInput);
109 }
110
111 // counting input mode selection
112 IfxCcu6_setCountingInputMode(ccu6SFR, IfxCcu6_TimerId_t13, config->clock.t13countingInputMode);
113
114 // period setting
115 IfxCcu6_setT13PeriodValue(ccu6SFR, (uint16)config->base.t13Period);
116 }
117 else // if internal clock is selected as reference
118 {
119 IfxCcu6_setT13Frequency(ccu6SFR, config->base.t13Frequency, config->base.t13Period);
120 }
121
122 // counter initialisation //
123
124 IfxCcu6_setT13CounterValue(ccu6SFR, config->timer13.counterValue);
125
126 // if Timer 13 start is in sync with Timer 12 //
127 if ((config->trigger.t13InSyncWithT12) && (!(config->synchronousOperation)))
128 {
129 IfxCcu6_setT13TriggerEventMode(ccu6SFR, config->timer13.t12SyncEvent);
130 IfxCcu6_setT13TriggerEventDirection(ccu6SFR, config->timer13.t12SyncDirection);
131 }
132 }
133 else
134 {}
135
136 // Timer 12 initialisation //
137
138 if ((config->timer == IfxCcu6_TimerId_t12) || (config->trigger.t13InSyncWithT12) || (config->synchronousOperation))
139 {
140 Ifx_TimerValue period = config->base.t12Period;
141
142 // enable Timer12 if it hasn't been enabled by any other interface //
143 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t12) == FALSE)
144 {
145 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t12);
146 }
147
148 // if Timer 13 start is in sync with Timer 12 //
149 if ((config->trigger.t13InSyncWithT12) && (!(config->synchronousOperation)) && (config->base.waitingTime != 0))
150 {
151 // if in sync with T12 period match (only period match is allowed in this interface because T12 is only in counter mode)
152 if (config->timer13.t12SyncEvent == IfxCcu6_T13TriggerEvent_onT12Period)
153 {
154 period = config->base.waitingTime; // waiting time as period
155 }
156 }
157 else
158 {
159 // configuration error
160 }
161
162 // clock initialisation //
163
164 if (config->clock.t12ExtClockEnabled) // if external source is selected as reference
165 {
166 // input signal selection
167 if (config->clock.t12ExtClockInput != NULL_PTR)
168 {
169 IfxCcu6_setT12InputSignal(config->ccu6, config->clock.t12ExtClockInput);
170 }
171
172 // counting input mode selection
173 IfxCcu6_setCountingInputMode(ccu6SFR, IfxCcu6_TimerId_t12, config->clock.t12countingInputMode);
174
175 // countining mode selection
176 IfxCcu6_setT12CountMode(ccu6SFR, config->timer12.countMode);
177
178 // period selection for center aligned mode
179 if (config->timer12.countMode == IfxCcu6_T12CountMode_centerAligned)
180 {
181 period = (period / 2) - 1;
182 }
183
184 // period setting
185 IfxCcu6_setT12PeriodValue(ccu6SFR, (uint16)period);
186 }
187 else // if internal clock is selected as reference
188 {
189 // in case of in sync with T13, T12 runs at same frequency as T13
190 IfxCcu6_setT12Frequency(ccu6SFR, config->base.t12Frequency, period, config->timer12.countMode);
191 }
192
193 // counter initialisation //
194
195 IfxCcu6_setT12CounterValue(ccu6SFR, config->timer12.counterValue);
196 }
197
198 /* -- Pin mapping -- */
199
200 const IfxCcu6_Timer_Pins *pins = config->pins;
201
202 if (pins != NULL_PTR)
203 {
204 IfxCcu6_T12hr_In *t12hr = pins->t12hr;
205
206 if (t12hr != NULL_PTR)
207 {
208 IfxCcu6_initT12hrPin(t12hr, pins->t1xhrInputMode);
209 }
210
211 IfxCcu6_T13hr_In *t13hr = pins->t13hr;
212
213 if (t13hr != NULL_PTR)
214 {
215 IfxCcu6_initT13hrPin(t13hr, pins->t1xhrInputMode);
216 }
217 }
218
219 /* -- interrupt initialisation -- */
220
221 if (config->interrupt1.priority > 0)
222 {
223 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt1.source);
224 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt1.source, config->interrupt1.serviceRequest);
225
226 volatile Ifx_SRC_SRCR *src;
227 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt1.serviceRequest);
228 IfxSrc_init(src, config->interrupt1.typeOfService, config->interrupt1.priority);
229 IfxSrc_enable(src);
230 }
231
232 if (config->interrupt2.priority > 0)
233 {
234 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt2.source);
235 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt2.source, config->interrupt2.serviceRequest);
236
237 volatile Ifx_SRC_SRCR *src;
238 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt2.serviceRequest);
239 IfxSrc_init(src, config->interrupt2.typeOfService, config->interrupt2.priority);
240 IfxSrc_enable(src);
241 }
242
243 if (config->interrupt3.priority > 0)
244 {
245 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt3.source);
246 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt3.source, config->interrupt3.serviceRequest);
247
248 volatile Ifx_SRC_SRCR *src;
249 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt3.serviceRequest);
250 IfxSrc_init(src, config->interrupt3.typeOfService, config->interrupt3.priority);
251 IfxSrc_enable(src);
252 }
253
254 if (config->interrupt4.priority > 0)
255 {
256 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt4.source);
257 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt4.source, config->interrupt4.serviceRequest);
258
259 volatile Ifx_SRC_SRCR *src;
260 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt4.serviceRequest);
261 IfxSrc_init(src, config->interrupt4.typeOfService, config->interrupt4.priority);
262 IfxSrc_enable(src);
263 }
264
265 timer->timer = config->timer;
266 timer->trigger = config->trigger;
267
268 #if IFX_CFG_USE_STANDARD_INTERFACE
269 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (uint32)timer == ((uint32)&timer->base));
270 timer->base.functions.start = (Timer_Start) & IfxCcu6_Timer_start;
271 timer->base.functions.stop = (Timer_Stop) & IfxCcu6_Timer_stop;
272 timer->base.functions.synchronousStart = (Timer_SynchronousStart) & IfxCcu6_Timer_synchronousStart;
273 timer->base.functions.synchronousStop = (Timer_SynchronousStop) & IfxCcu6_Timer_synchronousStop;
274 timer->base.functions.countOneStep = (Timer_CountOneStep) & IfxCcu6_Timer_countOneStep;
275 timer->base.functions.startSingleShotMode = (Timer_StartSingleShotMode) & IfxCcu6_Timer_startSingleShotMode;
276 #endif
277 }
278
279
280 void IfxCcu6_Timer_initModuleConfig(IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
281 {
282 const IfxCcu6_Timer_Config defaultConfig = {
283 .base = {
284 .t12Frequency = 400000,
285 .t12Period = 100,
286 .t13Frequency = 400000,
287 .t13Period = 100,
288 .waitingTime = 20,
289 .activeCount = 0,
290 },
291
292 .ccu6 = NULL_PTR, // will be initialized below
293
294 .timer = IfxCcu6_TimerId_t13,
295 .synchronousOperation = FALSE,
296
297 .pins = NULL_PTR,
298
299 .clock = {
300 .t12ExtClockEnabled = FALSE,
301 .t12ExtClockInput = NULL_PTR,
302 .t12countingInputMode = IfxCcu6_CountingInputMode_internal,
303
304 .t13ExtClockEnabled = FALSE,
305 .t13ExtClockInput = NULL_PTR,
306 .t13countingInputMode = IfxCcu6_CountingInputMode_internal,
307 },
308
309 .timer12 = {
310 .countMode = IfxCcu6_T12CountMode_edgeAligned,
311 .counterValue = 0,
312 },
313
314 .timer13 = {
315 .counterValue = 0,
316 .t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare,
317 .t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp,
318 },
319
320 .interrupt1 = {
321 .source = IfxCcu6_InterruptSource_t12PeriodMatch,
322 .serviceRequest = IfxCcu6_ServiceRequest_0,
323 .priority = 0, // interrupt priority 0
324 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
325 },
326
327 .interrupt2 = {
328 .source = IfxCcu6_InterruptSource_t13PeriodMatch,
329 .serviceRequest = IfxCcu6_ServiceRequest_1,
330 .priority = 0, // interrupt priority 0
331 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
332 },
333
334 .interrupt3 = {
335 .source = IfxCcu6_InterruptSource_t12OneMatch,
336 .serviceRequest = IfxCcu6_ServiceRequest_2,
337 .priority = 0, // interrupt priority 0
338 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
339 },
340
341 .interrupt4 = {
342 .source = IfxCcu6_InterruptSource_trap,
343 .serviceRequest = IfxCcu6_ServiceRequest_3,
344 .priority = 0, // interrupt priority 0
345 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
346 },
347
348 .trigger = {
349 .t12ExtInputTrigger = NULL_PTR,
350 .t13ExtInputTrigger = NULL_PTR,
351 .extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge,
352 .t13InSyncWithT12 = TRUE,
353 },
354 };
355
356 /* Default Configuration */
357 *config = defaultConfig;
358
359 /* take over module pointer */
360 config->ccu6 = ccu6;
361 }
362
363
364 void IfxCcu6_Timer_start(IfxCcu6_Timer *timer)
365 {
366 // Timer 13 start //
367
368 if (timer->timer == IfxCcu6_TimerId_t13)
369 {
370 // enable shadow transfer
371 IfxCcu6_enableShadowTransfer(timer->ccu6, FALSE, TRUE);
372
373 // start Timer 13 when not in sync with timer12
374 if (!(timer->trigger.t13InSyncWithT12))
375 {
376 if (timer->trigger.t13ExtInputTrigger != NULL_PTR)
377 {
378 // external start
379 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t13, timer->trigger.extInputTriggerMode);
380 IfxCcu6_setT13InputSignal(timer->ccu6, timer->trigger.t13ExtInputTrigger);
381 }
382 else
383 {
384 // internal start
385 IfxCcu6_startTimer(timer->ccu6, FALSE, TRUE);
386 }
387 }
388 else
389 {}
390 }
391 else
392 {}
393
394 // Timer 12 start alone or when in sync with Timer 13 //
395
396 if ((timer->timer == IfxCcu6_TimerId_t12) || (timer->trigger.t13InSyncWithT12))
397 {
398 // enable shadow transfer
399 IfxCcu6_enableShadowTransfer(timer->ccu6, TRUE, FALSE);
400
401 //start Timer 12
402 if (timer->trigger.t12ExtInputTrigger != NULL_PTR)
403 {
404 // external start
405 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t12, timer->trigger.extInputTriggerMode);
406 IfxCcu6_setT12InputSignal(timer->ccu6, timer->trigger.t12ExtInputTrigger);
407 }
408 else
409 {
410 // internal start
411 IfxCcu6_startTimer(timer->ccu6, TRUE, FALSE);
412 }
413 }
414 else
415 {}
416 }
417
418
419 void IfxCcu6_Timer_startSingleShotMode(IfxCcu6_Timer *timer)
420 {
421 // Timer 13 start //
422
423 if (timer->timer == IfxCcu6_TimerId_t13)
424 {
425 // enable shadow transfer
426 IfxCcu6_enableShadowTransfer(timer->ccu6, FALSE, TRUE);
427
428 //enable single shot mode
429 IfxCcu6_enableSingleShotMode(timer->ccu6, IfxCcu6_TimerId_t13);
430
431 // start Timer 13 when not in sync with timer12
432 if (!(timer->trigger.t13InSyncWithT12))
433 {
434 if (timer->trigger.t13ExtInputTrigger != NULL_PTR)
435 {
436 // external start
437 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t13, timer->trigger.extInputTriggerMode);
438 IfxCcu6_setT13InputSignal(timer->ccu6, timer->trigger.t13ExtInputTrigger);
439 }
440 else
441 {
442 // internal start
443 IfxCcu6_startTimer(timer->ccu6, FALSE, TRUE);
444 }
445 }
446 else
447 {}
448 }
449 else
450 {}
451
452 // Timer 12 start alone or when in sync with Timer 13 //
453
454 if ((timer->timer == IfxCcu6_TimerId_t12) || (timer->trigger.t13InSyncWithT12))
455 {
456 // enable shadow transfer
457 IfxCcu6_enableShadowTransfer(timer->ccu6, TRUE, FALSE);
458
459 //enable single shot mode
460 IfxCcu6_enableSingleShotMode(timer->ccu6, IfxCcu6_TimerId_t12);
461
462 if (timer->trigger.t12ExtInputTrigger != NULL_PTR)
463 {
464 // external start
465 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t12, timer->trigger.extInputTriggerMode);
466 IfxCcu6_setT12InputSignal(timer->ccu6, timer->trigger.t12ExtInputTrigger);
467 }
468 else
469 {
470 // internal start
471 IfxCcu6_startTimer(timer->ccu6, TRUE, FALSE);
472 }
473 }
474 else
475 {}
476 }
477
478
479 void IfxCcu6_Timer_stop(IfxCcu6_Timer *timer)
480 {
481 // Timer 13 stop //
482
483 if ((timer->timer == IfxCcu6_TimerId_t13) || (timer->trigger.t13InSyncWithT12))
484 {
485 // disable shadow transfer
486 IfxCcu6_disableShadowTransfer(timer->ccu6, FALSE, TRUE);
487
488 // remove external input trigger if any
489 if (timer->trigger.t13ExtInputTrigger != NULL_PTR)
490 {
491 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ExternalTriggerMode_disable);
492 }
493
494 // remove the sync with Timer 12
495 if (timer->trigger.t13InSyncWithT12)
496 {
497 IfxCcu6_setT13TriggerEventMode(timer->ccu6, IfxCcu6_T13TriggerEvent_noAction);
498 IfxCcu6_setT13TriggerEventDirection(timer->ccu6, IfxCcu6_T13TriggerDirection_noAction);
499 }
500
501 // stop Timer 13
502 IfxCcu6_stopTimer(timer->ccu6, FALSE, TRUE);
503 }
504
505 // Timer 12 stop //
506
507 else
508 {
509 // disable shadow transfer
510 IfxCcu6_disableShadowTransfer(timer->ccu6, TRUE, FALSE);
511
512 // remove external input trigger if any
513 if (timer->trigger.t12ExtInputTrigger != NULL_PTR)
514 {
515 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t12, IfxCcu6_ExternalTriggerMode_disable);
516 }
517
518 // stop Timer 12
519 IfxCcu6_stopTimer(timer->ccu6, TRUE, FALSE);
520 }
521 }
522
523
524 void IfxCcu6_Timer_synchronousStart(IfxCcu6_Timer *timer)
525 {
526 // enable shadow transfer
527 IfxCcu6_enableShadowTransfer(timer->ccu6, TRUE, TRUE);
528
529 // only internal synchronous start is possible
530 IfxCcu6_startTimer(timer->ccu6, TRUE, TRUE);
531 }
532
533
534 void IfxCcu6_Timer_synchronousStop(IfxCcu6_Timer *timer)
535 {
536 // disable shadow transfer
537 IfxCcu6_disableShadowTransfer(timer->ccu6, TRUE, TRUE);
538
539 // only internal synchronous stop is possible
540 IfxCcu6_stopTimer(timer->ccu6, TRUE, TRUE);
541 }
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2150
IfxCcu6_ServiceRequest_3
Service request output SR3.
Definition: IfxCcu6.h:235
IfxCcu6_Timer_synchronousStart
void IfxCcu6_Timer_synchronousStart(IfxCcu6_Timer *timer)
Starts both the timers together.
Definition: IfxCcu6_Timer.c:524
IfxCcu6_Timer_Config::pins
IfxCcu6_Timer_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_Timer.h:317
Timer_StartSingleShotMode
void(* Timer_StartSingleShotMode)(Timer *handle)
Definition: Timer.h:56
IfxCcu6_ExternalTriggerMode_disable
The external setting of T1xR is disabled.
Definition: IfxCcu6.h:151
IfxCcu6_Timer_Config::interrupt1
IfxCcu6_Timer_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_Timer.h:312
Timer_CountOneStep
void(* Timer_CountOneStep)(Timer *handle)
Definition: Timer.h:55
IfxCcu6_setExternalRunMode
IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6.h:1984
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:237
IfxCcu6_Timer_Clock::t13ExtClockEnabled
boolean t13ExtClockEnabled
Timer 13 external clock enable / disable selection.
Definition: IfxCcu6_Timer.h:236
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:299
IfxCcu6_InterruptSource_t13PeriodMatch
Interrupt enable for T13 period-match.
Definition: IfxCcu6.h:196
IfxCcu6_Timer_Config::interrupt4
IfxCcu6_Timer_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_Timer.h:315
IfxCcu6_Timer.h
CCU6 TIMER details.
IfxCcu6_setT13TriggerEventMode
IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare...
Definition: IfxCcu6.h:2121
Timer_Start
void(* Timer_Start)(Timer *handle)
Definition: Timer.h:51
IfxCcu6_Timer_Clock::t13ExtClockInput
IfxCcu6_T13hr_In * t13ExtClockInput
External input signal selection for timer 13.
Definition: IfxCcu6_Timer.h:237
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:197
IfxCcu6_enableTimer
IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed.
Definition: IfxCcu6.h:1626
IfxCcu6_Timer_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External input signal selection for timer 12.
Definition: IfxCcu6_Timer.h:272
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCcu6_ServiceRequest_2
Service request output SR2.
Definition: IfxCcu6.h:234
IfxCcu6_Timer_countOneStep
void IfxCcu6_Timer_countOneStep(IfxCcu6_Timer *timer)
Counts the timer one step.
Definition: IfxCcu6_Timer.c:53
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxCcu6_Timer_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_Timer.h:255
IfxCcu6_Timer_Config::trigger
IfxCcu6_Timer_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_Timer.h:316
Timer_Config::t12Frequency
float32 t12Frequency
Specify expected T12 PWM frequency in Hertz.
Definition: Timer.h:83
IfxCcu6_T13TriggerEvent_onT12Period
set T13R upon a period-match of T12
Definition: IfxCcu6.h:326
IfxCcu6_Timer_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_Timer.h:245
IfxCcu6_routeInterruptNode
void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:283
IfxCcu6_T12CountMode_centerAligned
T12 counts down after detecting a period-match and counts up after detecting a one-match.
Definition: IfxCcu6.h:301
IfxCcu6_Timer_Config
Configuration structure of the module.
Definition: IfxCcu6_Timer.h:303
IfxCcu6_T13TriggerEvent_onCC60RCompare
set T13R on a T12 compare event on channel 0
Definition: IfxCcu6.h:322
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:337
IfxCcu6_getTimerAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability
Definition: IfxCcu6.h:1715
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu6_Timer
Module handle.
Definition: IfxCcu6_Timer.h:293
IfxCcu6_Timer_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_Timer.h:286
IfxCcu6_setT12CounterValue
IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12.
Definition: IfxCcu6.h:2085
IfxCcu6_setT12Frequency
float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:377
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1603
IfxCcu6_Timer_Config::timer12
IfxCcu6_Timer_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_Timer.h:310
IfxCcu6_Timer_startSingleShotMode
void IfxCcu6_Timer_startSingleShotMode(IfxCcu6_Timer *timer)
Starts the single shot mode of the timer.
Definition: IfxCcu6_Timer.c:419
Timer_Stop
void(* Timer_Stop)(Timer *handle)
Definition: Timer.h:52
Timer_SynchronousStop
void(* Timer_SynchronousStop)(Timer *handle)
Definition: Timer.h:54
IfxCcu6_Timer_stop
void IfxCcu6_Timer_stop(IfxCcu6_Timer *timer)
Stops the timer.
Definition: IfxCcu6_Timer.c:479
IfxCcu6_Timer::timer
IfxCcu6_TimerId timer
Timer number (T12 / T13)
Definition: IfxCcu6_Timer.h:297
IfxCcu6_enableSingleShotMode
IFX_INLINE void IfxCcu6_enableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the single shot-mode of Timers (T12 T13).
Definition: IfxCcu6.h:1613
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1560
IfxCcu6_Timer_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_Timer.h:285
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:336
IfxCcu6_Timer_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_Timer.h:264
IfxCcu6_Timer_synchronousStop
void IfxCcu6_Timer_synchronousStop(IfxCcu6_Timer *timer)
Starts both the timers together.
Definition: IfxCcu6_Timer.c:534
IfxCcu6_ExternalTriggerMode_risingEdge
Bit T1xR is set if a rising edge of signal T1xHR is detected.
Definition: IfxCcu6.h:152
IfxCcu6_setT13InputSignal
void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:510
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2079
IfxCcu6_T13TriggerDirection_noAction
no action
Definition: IfxCcu6.h:310
IfxCcu6_Timer_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_Timer.h:246
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:193
Timer_Config::t12Period
Ifx_TimerValue t12Period
Specify expected T12 PWM period in ticks.
Definition: Timer.h:84
Timer_SynchronousStart
void(* Timer_SynchronousStart)(Timer *handle)
Definition: Timer.h:53
IfxCcu6_Timer_Clock::t12ExtClockInput
IfxCcu6_T12hr_In * t12ExtClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_Timer.h:234
IfxCcu6_CountingInputMode_internal
The T1x prescaler generates the counting events, Bit TCTR4.T1xCNT is not taken into account...
Definition: IfxCcu6.h:126
IfxCcu6_Timer_Clock::t12countingInputMode
IfxCcu6_CountingInputMode t12countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_Timer.h:235
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1914
IfxCcu6_T13TriggerDirection_onT12CountingUp
while T12 is counting up
Definition: IfxCcu6.h:311
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxCcu6_enableCountEvent
IFX_INLINE void IfxCcu6_enableCountEvent(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Sets the single shot-mode of Timers (T12, T13).
Definition: IfxCcu6.h:1530
IfxCcu6_Timer_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_Timer.h:284
IfxCcu6_initT12hrPin
IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin.
Definition: IfxCcu6.h:1884
IfxCcu6_Timer::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_Timer.h:296
IfxCcu6_Timer_Config::interrupt3
IfxCcu6_Timer_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_Timer.h:314
Timer_Config::t13Frequency
float32 t13Frequency
Specify expected T13 PWM frequency in Hertz.
Definition: Timer.h:85
Timer_Config::t13Period
Ifx_TimerValue t13Period
Specify expected T13 PWM period in ticks.
Definition: Timer.h:86
IfxCcu6_setCountingInputMode
IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13).
Definition: IfxCcu6.h:1958
IfxCcu6_Timer_start
void IfxCcu6_Timer_start(IfxCcu6_Timer *timer)
Starts the timer.
Definition: IfxCcu6_Timer.c:364
IfxCcu6_CountingInputMode_manual
Bit TCTR4.T1xCNT written with 1 is a counting event. The T1x prescaler is not taken into account...
Definition: IfxCcu6.h:128
IfxCcu6_Timer_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External input signal selection for timer 13.
Definition: IfxCcu6_Timer.h:273
IfxCcu6_setT13CounterValue
IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13.
Definition: IfxCcu6.h:2103
IfxCcu6_Timer::base
Timer base
Base Timer object.
Definition: IfxCcu6_Timer.h:295
IfxCcu6_Timer_Clock::t12ExtClockEnabled
boolean t12ExtClockEnabled
Timer 12 external clock enable / disable selection.
Definition: IfxCcu6_Timer.h:233
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_T13TriggerEvent_noAction
no action
Definition: IfxCcu6.h:321
IfxCcu6_initT13hrPin
IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin.
Definition: IfxCcu6.h:1899
IfxCcu6_Timer_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_Timer.h:275
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_Timer_Config::interrupt2
IfxCcu6_Timer_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_Timer.h:313
IfxCcu6_Timer_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_Timer.h:282
IfxCcu6_Timer_Config::synchronousOperation
boolean synchronousOperation
Synchronous operation selection (starting / stopping both the timers at the same time) ...
Definition: IfxCcu6_Timer.h:308
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:194
IfxCcu6_Timer_Config::timer13
IfxCcu6_Timer_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_Timer.h:311
IfxCcu6_Timer_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_Timer.h:265
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:233
IfxCcu6_Timer_initModule
void IfxCcu6_Timer_initModule(IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_Timer.c:76
IfxCcu6_Timer_initModuleConfig
void IfxCcu6_Timer_initModuleConfig(IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_Timer.c:280
IfxCcu6_setT12InputSignal
void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:426
IfxCcu6_Timer_Config::base
Timer_Config base
Base configuration.
Definition: IfxCcu6_Timer.h:305
IfxCcu6_disableShadowTransfer
IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1478
IfxCcu6_Timer_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6_Timer.h:274
IfxCcu6_setT13TriggerEventDirection
IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction.
Definition: IfxCcu6.h:2115
IfxCcu6_Timer_Clock::t13countingInputMode
IfxCcu6_CountingInputMode t13countingInputMode
Input event leading to a counting action of the timer T13.
Definition: IfxCcu6_Timer.h:238
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2091
IfxCcu6_Timer_Config::clock
IfxCcu6_Timer_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_Timer.h:309
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2140
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxCcu6_Timer_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_Timer.h:248
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxCcu6_Timer_Timer13::counterValue
uint16 counterValue
16-bit counter value of Timer13
Definition: IfxCcu6_Timer.h:263
IfxCcu6_setT13PeriodValue
IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match.
Definition: IfxCcu6.h:2109
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:145
Timer_Config::waitingTime
Ifx_TimerValue waitingTime
Specify the expected ticks before timer starts (TWAIT)
Definition: Timer.h:87
IfxCcu6_Timer_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_Timer.h:247
IfxCcu6_setT13Frequency
float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by ...
Definition: IfxCcu6.c:461
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:232


iLLD_TC26B: IfxCcu6_Timer.h Source File

  • Ccu6
  • Timer
IfxCcu6_Timer.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_Timer.h
3 * \brief CCU6 TIMER details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Ccu6_Timer_Usage How to use the CCU6 TIMER Interface driver?
43 * \ingroup IfxLld_Ccu6_Timer
44 *
45 * The TIMER interface driver provides a default CCU6 configuration for runnung the selected timer block.
46 *
47 * User can select the various configuration options that hardware allows
48 *
49 * In the following sections it will be described, how to integrate the driver into the application framework.
50 *
51 *
52 * \section IfxLld_Ccu6_Timer_Preparation Preparation
53 *
54 *
55 * \subsection IfxLld_Ccu6_Timer_Include Include Files
56 *
57 * Include following header file into your C code:
58 *
59 * \code
60 * #include <Ccu6/Timer/IfxCcu6_Timer.h>
61 * \endcode
62 *
63 * \subsection IfxLld_Ccu6_Timer_Variables Variables
64 *
65 * Declare the TIMER handle as global variable in your C code:
66 *
67 * \code
68 * // used globally
69 * static IfxCcu6_Timer timer;
70 * \endcode
71 *
72 * \subsection IfxLld_Ccu6_Timer_Interrupt Interrupt Handler Installation
73 *
74 * See also \ref IfxLld_Cpu_Irq_Usage
75 *
76 * Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
77 *
78 * \code
79 * // priorities are normally defined in Ifx_IntPrioDef.h
80 * #define IFX_INTPRIO_CCU6 1
81 * \endcode
82 *
83 * Add the interrupt service routine to your C code.
84 *
85 * \code
86 * IFX_INTERRUPT(ccu60ISR_Timer, 0, IFX_INTPRIO_CCU6)
87 * {
88 * //user code
89 * }
90 * \endcode
91 *
92 * Finally install the interrupt handlers in your initialisation function:
93 *
94 * \code
95 * // install interrupt handlers
96 * IfxCpu_Irq_installInterruptHandler(&ccu60ISR_Timer, IFX_INTPRIO_CCU6);
97 * IfxCpu_enableInterrupts();
98 * \endcode
99 *
100 * \subsection IfxLld_Ccu6_Timer_Init Module Initialisation
101 *
102 * The module initialisation can be done in the same function. Here an example:
103 *
104 * \code
105 * // create configuration
106 * IfxCcu6_Timer_Config timerConfig;
107 * IfxCcu6_Timer_initModuleConfig(&timerConfig, &MODULE_CCU60);
108 *
109 * // configure the frequency of the timer in case of internal start
110 * // this frequency will be set for the timer block selected later
111 * timerConfig.base.frequency = 400000;
112 *
113 * // configure the period of the timer
114 * timerConfig.base.period = 100;
115 *
116 * // configure the waiting time in case of delayed T13 start in sync with T12
117 * timerConfig.base.waitingTime = 0;
118 *
119 * // select the timer that needs to be started
120 * timerConfig.timer = IfxCcu6_TimerId_t12;
121 *
122 * // select the synchronous operation if both timers need to be start at the same time
123 * // previous selection of timer block can be ignored in this mode
124 * timerConfig.synchronousOperation = TRUE;
125 *
126 * // configure the clock for internal mode
127 * timerConfig.clock.t12ExtClockEnabled = FALSE;
128 * timerConfig.clock.t12ExtClockInput = NULL_PTR;
129 * timerConfig.clock.t12countingInputMode = IfxCcu6_CountingInputMode_internal;
130 *
131 * // configure the selcted timer block
132 * timerConfig.timer12.countMode = IfxCcu6_T12CountMode_edgeAligned;
133 * timerConfig.timer12.counterValue = 0;
134 *
135 * // configure the interrupts
136 * timerConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_t12PeriodMatch;
137 * timerConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
138 * timerConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
139 * timerConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
140 *
141 * // configure input and output triggers
142 * timerConfig.trigger.t12ExtInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
143 * timerConfig.trigger.t13ExtInputTrigger = NULL_PTR;
144 * timerConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
145 * timerConfig.trigger.t13InSyncWithT12 = FALSE;
146 *
147 * // initialize the module
148 * IfxCcu6_Timer_initModule(&timer, &timerConfig);
149 * \endcode
150 *
151 *
152 * The Timer is ready for use now!
153 *
154 *
155 * \section IfxLld_Ccu6_Timer_Control Control
156 *
157 *
158 * The TIMER driver provides simple to use timer Control functions
159 *
160 * This means: In addition to start and stop a single timer, you can start and stop both the timer blocks at the same time
161 * you can also run the timer in single shot mode and finally you an manually make the timer count each step
162 *
163 * Start the timer
164 *
165 * \code
166 * IfxCcu6_Timer_start(&timer);
167 * \endcode
168 *
169 * Stop the timer
170 *
171 * \code
172 * IfxCcu6_Timer_stop(&timer);
173 * \endcode
174 *
175 * Start both the timers synchronously, when the synchronousOperation mode is selected in the configuration
176 *
177 * \code
178 * IfxCcu6_Timer_synchronousStart(&timer);
179 * \endcode
180 *
181 * Stop both the timers synchronously, when the synchronousOperation mode is selected in the configuration
182 *
183 * \code
184 * IfxCcu6_Timer_synchronousStop(&timer);
185 * \endcode
186 *
187 * Start the selected timer in single shot mode
188 *
189 * \code
190 * IfxCcu6_Timer_startSingleShotMode(&timer);
191 * \endcode
192 *
193 * Make the timer count each step manually
194 *
195 * \code
196 * uint8 i;
197 * for (i=0; i<50; i++)
198 * {
199 * IfxCcu6_Timer_countOneStep(&timer);
200 * }
201 * \endcode
202 *
203 * \defgroup IfxLld_Ccu6_Timer TIMER Interface driver
204 * \ingroup IfxLld_Ccu6
205 * \defgroup IfxLld_Ccu6_Timer_DataStructures Data Structures
206 * \ingroup IfxLld_Ccu6_Timer
207 * \defgroup IfxLld_Ccu6_Timer_Module_Initialize_Functions Module Initialize Functions
208 * \ingroup IfxLld_Ccu6_Timer
209 * \defgroup IfxLld_Ccu6_Timer_Timer_Control_Functions Timer Control Functions
210 * \ingroup IfxLld_Ccu6_Timer
211 */
212
213 #ifndef IFXCCU6_TIMER_H
214 #define IFXCCU6_TIMER_H 1
215
216 /******************************************************************************/
217 /*----------------------------------Includes----------------------------------*/
218 /******************************************************************************/
219
220 #include "Ccu6/Std/IfxCcu6.h"
221 #include "If/Ccu6If/Timer.h"
222
223 /******************************************************************************/
224 /*-----------------------------Data Structures--------------------------------*/
225 /******************************************************************************/
226
227 /** \addtogroup IfxLld_Ccu6_Timer_DataStructures
228 * \{ */
229 /** \brief Structure for clock configuration
230 */
231 typedef struct
232 {
233 boolean t12ExtClockEnabled; /**< \brief Timer 12 external clock enable / disable selection */
234 IfxCcu6_T12hr_In *t12ExtClockInput; /**< \brief External input signal selection for timer 12 */
235 IfxCcu6_CountingInputMode t12countingInputMode; /**< \brief Input event leading to a counting action of the timer T12 */
236 boolean t13ExtClockEnabled; /**< \brief Timer 13 external clock enable / disable selection */
237 IfxCcu6_T13hr_In *t13ExtClockInput; /**< \brief External input signal selection for timer 13 */
238 IfxCcu6_CountingInputMode t13countingInputMode; /**< \brief Input event leading to a counting action of the timer T13 */
239 } IfxCcu6_Timer_Clock;
240
241 /** \brief Structure for interrupt configuration
242 */
243 typedef struct
244 {
245 IfxCcu6_InterruptSource source; /**< \brief Interrupt source selection */
246 IfxCcu6_ServiceRequest serviceRequest; /**< \brief Selection of service request outputs */
247 uint16 priority; /**< \brief Interrupt priority */
248 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
249 } IfxCcu6_Timer_InterruptConfig;
250
251 /** \brief Structure for Timer 12
252 */
253 typedef struct
254 {
255 IfxCcu6_T12CountMode countMode; /**< \brief Operating mode of Timer 12 */
256 uint16 counterValue; /**< \brief 16-bit counter value of Timer12 */
257 } IfxCcu6_Timer_Timer12;
258
259 /** \brief Structure for Timer 13
260 */
261 typedef struct
262 {
263 uint16 counterValue; /**< \brief 16-bit counter value of Timer13 */
264 IfxCcu6_T13TriggerEvent t12SyncEvent; /**< \brief T12 sync trigger event to start T13 */
265 IfxCcu6_T13TriggerDirection t12SyncDirection; /**< \brief Additional information to control trigger event selection */
266 } IfxCcu6_Timer_Timer13;
267
268 /** \brief Configuration structure for external triggers
269 */
270 typedef struct
271 {
272 IfxCcu6_T12hr_In *t12ExtInputTrigger; /**< \brief External input signal selection for timer 12 */
273 IfxCcu6_T13hr_In *t13ExtInputTrigger; /**< \brief External input signal selection for timer 13 */
274 IfxCcu6_ExternalTriggerMode extInputTriggerMode; /**< \brief Event of signal T1xHR that can set the run bit T1xR by HW */
275 boolean t13InSyncWithT12; /**< \brief Selection of Timer 13 start in sync with T12 */
276 } IfxCcu6_Timer_TriggerConfig;
277
278 /** \} */
279
280 /** \brief Structure for CCU6 output pin configuration
281 */
282 typedef struct
283 {
284 IFX_CONST IfxCcu6_T12hr_In *t12hr; /**< \brief T12HR input signal */
285 IFX_CONST IfxCcu6_T13hr_In *t13hr; /**< \brief T13HR input signal */
286 IfxPort_InputMode t1xhrInputMode; /**< \brief The T1xHR pin input mode which should be configured */
287 } IfxCcu6_Timer_Pins;
288
289 /** \addtogroup IfxLld_Ccu6_Timer_DataStructures
290 * \{ */
291 /** \brief Module handle
292 */
293 typedef struct
294 {
295 Timer base; /**< \brief Base Timer object */
296 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
297 IfxCcu6_TimerId timer; /**< \brief Timer number (T12 / T13) */
298 IfxCcu6_Timer_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
299 } IfxCcu6_Timer;
300
301 /** \brief Configuration structure of the module
302 */
303 typedef struct
304 {
305 Timer_Config base; /**< \brief Base configuration */
306 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
307 IfxCcu6_TimerId timer; /**< \brief Timer number (T12 / T13) */
308 boolean synchronousOperation; /**< \brief Synchronous operation selection (starting / stopping both the timers at the same time) */
309 IfxCcu6_Timer_Clock clock; /**< \brief Structure for clock configuration */
310 IfxCcu6_Timer_Timer12 timer12; /**< \brief Structure for Timer 12 */
311 IfxCcu6_Timer_Timer13 timer13; /**< \brief Structure for Timer 13 */
312 IfxCcu6_Timer_InterruptConfig interrupt1; /**< \brief Structure for first interrupt configuration */
313 IfxCcu6_Timer_InterruptConfig interrupt2; /**< \brief Structure for second interrupt configuration */
314 IfxCcu6_Timer_InterruptConfig interrupt3; /**< \brief Structure for third interrupt configuration */
315 IfxCcu6_Timer_InterruptConfig interrupt4; /**< \brief Structure for fourth interrupt configuration */
316 IfxCcu6_Timer_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
317 IfxCcu6_Timer_Pins *pins; /**< \brief Structure for CCU6 output pin configuration */
318 } IfxCcu6_Timer_Config;
319
320 /** \} */
321
322 /** \addtogroup IfxLld_Ccu6_Timer_Module_Initialize_Functions
323 * \{ */
324
325 /******************************************************************************/
326 /*-------------------------Global Function Prototypes-------------------------*/
327 /******************************************************************************/
328
329 /** \brief Initialises the module with default configuration
330 * \param timer Module handle
331 * \param config Configuration structure of the module
332 * \return None
333 *
334 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
335 *
336 */
337 IFX_EXTERN void IfxCcu6_Timer_initModule(IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config);
338
339 /** \brief Fills the config structure with default values
340 * \param config Configuration structure of the module
341 * \param ccu6 Pointer to the base of CCU6 registers
342 * \return None
343 *
344 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
345 *
346 */
347 IFX_EXTERN void IfxCcu6_Timer_initModuleConfig(IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6);
348
349 /** \} */
350
351 /** \addtogroup IfxLld_Ccu6_Timer_Timer_Control_Functions
352 * \{ */
353
354 /******************************************************************************/
355 /*-------------------------Global Function Prototypes-------------------------*/
356 /******************************************************************************/
357
358 /** \brief Counts the timer one step
359 * \param timer Module handle
360 * \return None
361 *
362 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
363 *
364 */
365 IFX_EXTERN void IfxCcu6_Timer_countOneStep(IfxCcu6_Timer *timer);
366
367 /** \brief Starts the timer
368 * \param timer Module handle
369 * \return None
370 *
371 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
372 *
373 */
374 IFX_EXTERN void IfxCcu6_Timer_start(IfxCcu6_Timer *timer);
375
376 /** \brief Starts the single shot mode of the timer
377 * \param timer Module handle
378 * \return None
379 *
380 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
381 *
382 */
383 IFX_EXTERN void IfxCcu6_Timer_startSingleShotMode(IfxCcu6_Timer *timer);
384
385 /** \brief Stops the timer
386 * \param timer Module handle
387 * \return None
388 *
389 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
390 *
391 */
392 IFX_EXTERN void IfxCcu6_Timer_stop(IfxCcu6_Timer *timer);
393
394 /** \brief Starts both the timers together
395 * \param timer Module handle
396 * \return None
397 *
398 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
399 *
400 */
401 IFX_EXTERN void IfxCcu6_Timer_synchronousStart(IfxCcu6_Timer *timer);
402
403 /** \brief Starts both the timers together
404 * \param timer Module handle
405 * \return None
406 *
407 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
408 *
409 */
410 IFX_EXTERN void IfxCcu6_Timer_synchronousStop(IfxCcu6_Timer *timer);
411
412 /** \} */
413
414 #endif /* IFXCCU6_TIMER_H */
IfxCcu6_Timer_synchronousStart
IFX_EXTERN void IfxCcu6_Timer_synchronousStart(IfxCcu6_Timer *timer)
Starts both the timers together.
Definition: IfxCcu6_Timer.c:524
IfxCcu6_Timer_Config::pins
IfxCcu6_Timer_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_Timer.h:317
IfxCcu6_Timer_InterruptConfig
Structure for interrupt configuration.
Definition: IfxCcu6_Timer.h:243
IfxCcu6_Timer_Config::interrupt1
IfxCcu6_Timer_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_Timer.h:312
IfxCcu6_Timer_Clock
Structure for clock configuration.
Definition: IfxCcu6_Timer.h:231
IfxCcu6_Timer_Clock::t13ExtClockEnabled
boolean t13ExtClockEnabled
Timer 13 external clock enable / disable selection.
Definition: IfxCcu6_Timer.h:236
IfxCcu6_Timer_Config::interrupt4
IfxCcu6_Timer_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_Timer.h:315
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:179
IfxCcu6_Timer_Clock::t13ExtClockInput
IfxCcu6_T13hr_In * t13ExtClockInput
External input signal selection for timer 13.
Definition: IfxCcu6_Timer.h:237
IfxCcu6_Timer_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External input signal selection for timer 12.
Definition: IfxCcu6_Timer.h:272
IfxCcu6_Timer_countOneStep
IFX_EXTERN void IfxCcu6_Timer_countOneStep(IfxCcu6_Timer *timer)
Counts the timer one step.
Definition: IfxCcu6_Timer.c:53
IfxCcu6_Timer_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_Timer.h:255
IfxCcu6_Timer::trigger
IfxCcu6_Timer_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_Timer.h:298
IfxCcu6_Timer_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_Timer.h:245
IfxCcu6_T13TriggerDirection
IfxCcu6_T13TriggerDirection
Delivers additional information to control the automatic set of bit T13R in the case that the trigger...
Definition: IfxCcu6.h:308
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCcu6_Timer_Config
Configuration structure of the module.
Definition: IfxCcu6_Timer.h:303
IfxCcu6_Timer
Module handle.
Definition: IfxCcu6_Timer.h:293
IfxCcu6_Timer_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_Timer.h:286
Timer_Config
Configuration structure of the Timer interface.
Definition: Timer.h:81
IfxCcu6_Timer_Config::timer12
IfxCcu6_Timer_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_Timer.h:310
IfxCcu6_Timer_startSingleShotMode
IFX_EXTERN void IfxCcu6_Timer_startSingleShotMode(IfxCcu6_Timer *timer)
Starts the single shot mode of the timer.
Definition: IfxCcu6_Timer.c:419
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCcu6_Timer_stop
IFX_EXTERN void IfxCcu6_Timer_stop(IfxCcu6_Timer *timer)
Stops the timer.
Definition: IfxCcu6_Timer.c:479
IfxCcu6_Timer::timer
IfxCcu6_TimerId timer
Timer number (T12 / T13)
Definition: IfxCcu6_Timer.h:297
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu6_Timer_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_Timer.h:285
IfxCcu6_CountingInputMode
IfxCcu6_CountingInputMode
Defines the input event leading to a counting action of the timer (T12 / T13) Definition in Ifx_CCU...
Definition: IfxCcu6.h:124
IfxCcu6_Timer_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_Timer.h:264
IfxCcu6_Timer_synchronousStop
IFX_EXTERN void IfxCcu6_Timer_synchronousStop(IfxCcu6_Timer *timer)
Starts both the timers together.
Definition: IfxCcu6_Timer.c:534
Timer.h
Timer interface.
Timer_s
Structure of the Timer interface.
Definition: Timer.h:69
IfxCcu6_Timer_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_Timer.h:246
IfxCcu6.h
CCU6 basic functionality.
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:230
IfxCcu6_T13TriggerEvent
IfxCcu6_T13TriggerEvent
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare sign...
Definition: IfxCcu6.h:319
IfxCcu6_Timer_Clock::t12ExtClockInput
IfxCcu6_T12hr_In * t12ExtClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_Timer.h:234
IfxCcu6_Timer_Timer12
Structure for Timer 12.
Definition: IfxCcu6_Timer.h:253
IfxCcu6_Timer_Timer13
Structure for Timer 13.
Definition: IfxCcu6_Timer.h:261
IfxCcu6_TimerId
IfxCcu6_TimerId
Timer number ( T12 / T13 )
Definition: IfxCcu6.h:334
IfxCcu6_Timer_Clock::t12countingInputMode
IfxCcu6_CountingInputMode t12countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_Timer.h:235
IfxCcu6_Timer_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_Timer.h:284
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:297
IfxCcu6_Timer::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_Timer.h:296
IfxCcu6_Timer_Config::interrupt3
IfxCcu6_Timer_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_Timer.h:314
IfxCcu6_Timer_start
IFX_EXTERN void IfxCcu6_Timer_start(IfxCcu6_Timer *timer)
Starts the timer.
Definition: IfxCcu6_Timer.c:364
IfxCcu6_Timer_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External input signal selection for timer 13.
Definition: IfxCcu6_Timer.h:273
IfxCcu6_ExternalTriggerMode
IfxCcu6_ExternalTriggerMode
Defines the event of signal T1xHR that can set the run bit T1xR by HW Definition in Ifx_CCU...
Definition: IfxCcu6.h:149
IfxCcu6_Timer::base
Timer base
Base Timer object.
Definition: IfxCcu6_Timer.h:295
IfxCcu6_Timer_Clock::t12ExtClockEnabled
boolean t12ExtClockEnabled
Timer 12 external clock enable / disable selection.
Definition: IfxCcu6_Timer.h:233
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:112
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:120
IfxCcu6_Timer_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_Timer.h:275
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCcu6_Timer_Config::interrupt2
IfxCcu6_Timer_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_Timer.h:313
IfxCcu6_Timer_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_Timer.h:282
IfxCcu6_Timer_Config::synchronousOperation
boolean synchronousOperation
Synchronous operation selection (starting / stopping both the timers at the same time) ...
Definition: IfxCcu6_Timer.h:308
IfxCcu6_Timer_Config::timer13
IfxCcu6_Timer_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_Timer.h:311
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxCcu6_Timer_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_Timer.h:265
IfxCcu6_Timer_initModule
IFX_EXTERN void IfxCcu6_Timer_initModule(IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_Timer.c:76
IfxCcu6_Timer_initModuleConfig
IFX_EXTERN void IfxCcu6_Timer_initModuleConfig(IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_Timer.c:280
IfxCcu6_Timer_Config::base
Timer_Config base
Base configuration.
Definition: IfxCcu6_Timer.h:305
IfxCcu6_Timer_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6_Timer.h:274
IfxCcu6_Timer_Clock::t13countingInputMode
IfxCcu6_CountingInputMode t13countingInputMode
Input event leading to a counting action of the timer T13.
Definition: IfxCcu6_Timer.h:238
IfxCcu6_Timer_Config::clock
IfxCcu6_Timer_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_Timer.h:309
IfxCcu6_Timer_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_Timer.h:248
IfxCcu6_Timer_Timer12::counterValue
uint16 counterValue
16-bit counter value of Timer12
Definition: IfxCcu6_Timer.h:256
IfxCcu6_Timer_TriggerConfig
Configuration structure for external triggers.
Definition: IfxCcu6_Timer.h:270
IfxCcu6_Timer_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_Timer.h:247


iLLD_TC26B: IfxCcu6_TimerWithTrigger.c Source File

  • Ccu6
  • TimerWithTrigger
IfxCcu6_TimerWithTrigger.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_TimerWithTrigger.c
3 * \brief CCU6 TIMERWITHTRIGGER details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxCcu6_TimerWithTrigger.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "stddef.h"
49 #include "string.h"
50
51 /******************************************************************************/
52 /*-------------------------Function Implementations---------------------------*/
53 /******************************************************************************/
54
55 boolean IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq(IfxCcu6_TimerWithTrigger *driver)
56 {
57 boolean event;
58 event = IfxCcu6_isT12OneNotification(driver->ccu6);
59
60 if (event)
61 {
62 IfxCcu6_clearT12OneNotification(driver->ccu6);
63 }
64 else
65 {}
66
67 return event;
68 }
69
70
71 boolean IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq(IfxCcu6_TimerWithTrigger *driver)
72 {
73 boolean event;
74 event = IfxCcu6_isT13CompareNotification(driver->ccu6);
75
76 if (event)
77 {
78 IfxCcu6_clearT13CompareNotification(driver->ccu6);
79 }
80 else
81 {}
82
83 return event;
84 }
85
86
87 void IfxCcu6_TimerWithTrigger_applyUpdate(IfxCcu6_TimerWithTrigger *driver)
88 {
89 IfxCcu6_enableShadowTransfer(driver->ccu6, TRUE, TRUE);
90 }
91
92
93 void IfxCcu6_TimerWithTrigger_disableUpdate(IfxCcu6_TimerWithTrigger *driver)
94 {
95 IFX_UNUSED_PARAMETER(driver)
96 }
97
98
99 float32 IfxCcu6_TimerWithTrigger_getFrequency(IfxCcu6_TimerWithTrigger *driver)
100 {
101 return 1.0 / IfxStdIf_Timer_tickToS(driver->base.clockFreq, driver->base.period);
102 }
103
104
105 float32 IfxCcu6_TimerWithTrigger_getInputFrequency(IfxCcu6_TimerWithTrigger *driver)
106 {
107 return driver->base.clockFreq;
108 }
109
110
111 Ifx_TimerValue IfxCcu6_TimerWithTrigger_getPeriod(IfxCcu6_TimerWithTrigger *driver)
112 {
113 return driver->base.period;
114 }
115
116
117 volatile uint32 *IfxCcu6_TimerWithTrigger_getPointer(IfxCcu6_TimerWithTrigger *driver)
118 {
119 return IfxCcu6_getT12TimerPointer(driver->ccu6);
120 }
121
122
123 float32 IfxCcu6_TimerWithTrigger_getResolution(IfxCcu6_TimerWithTrigger *driver)
124 {
125 return 1.0 / driver->base.clockFreq;
126 }
127
128
129 boolean IfxCcu6_TimerWithTrigger_init(IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
130 {
131 boolean result = TRUE;
132 IfxCcu6_TimerWithTrigger_Base *base = &driver->base;
133 Ifx_CCU6 *module;
134
135 driver->ccu6 = config->ccu6;
136 module = driver->ccu6;
137
138 base->triggerEnabled = config->base.trigger.enabled;
139
140 /** - Enable/initialise the CCU6 if it has not been enabled. See IfxCcu6_isModuleEnabled() */
141 if (IfxCcu6_isModuleEnabled(module) == FALSE)
142 {
143 IfxCcu6_enableModule(module);
144 }
145
146 /* Initialize the timer part */
147 IfxCcu6_setT12CountMode(module, (config->base.countDir == IfxStdIf_Timer_CountDir_upAndDown) ? IfxCcu6_T12CountMode_centerAligned : IfxCcu6_T12CountMode_edgeAligned);
148
149 driver->base.countDir = config->base.countDir;
150
151 uint16 prescaler;
152 float32 freqT12 = 0, periodT12;
153 float32 freqCC6 = (float32)IfxScuCcu_getSpbFrequency();
154
155 for (prescaler = 0; prescaler < 16; prescaler++)
156 {
157 freqT12 = freqCC6 / (1U << prescaler);
158 periodT12 = freqT12 / config->base.frequency;
159
160 if ((periodT12 <= 16386.0) && (periodT12 > config->base.minResolution))
161 {
162 break;
163 }
164 }
165
166 if (prescaler < 16)
167 {
168 Ifx_CCU6_TCTR0 tctr0;
169 tctr0.U = module->TCTR0.U;
170 tctr0.B.T12CLK = (prescaler & 0x7U);
171 tctr0.B.T12PRE = ((prescaler & 0x8U) != 0);
172 module->TCTR0.U = tctr0.U;
173 }
174 else
175 {
176 /** \retval IfxCcu6_Stat_wrongPwmFreq if the T12 prescaler can't fulfill the
177 * required frequency */
178 result = FALSE;
179 }
180
181 IfxCcu6_TimerWithTrigger_updateInputFrequency(driver);
182
183 if ((config->base.minResolution > 0) && ((1.0 / base->clockFreq) > config->base.minResolution))
184 {
185 result = FALSE;
186 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
187 }
188 else
189 {}
190
191 IfxCcu6_TimerWithTrigger_setFrequency(driver, config->base.frequency);
192 /* Initialize the trigger part */
193
194 /** - The T13 is used to generate additional PWM for internal trigger purpose (e.g.
195 * ADC) or external trigger purpose (e.g. sensor synchronisation). */
196
197 if (base->triggerEnabled)
198 {
199 Ifx_CCU6_TCTR0 tctr0 = module->TCTR0;
200 module->TCTR0.B.T13CLK = tctr0.B.T12CLK;
201 module->TCTR0.B.T13PRE = tctr0.B.T12PRE;
202 IfxCcu6_setT13PeriodValue(module, (uint16)(base->period - 1));
203
204 module->MODCTR.B.T13MODEN = 0;
205 IfxCcu6_enableModulationOutput(module, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cout3);
206
207 IfxCcu6_setOutputPassiveLevel(module, IfxCcu6_ChannelOut_cout3, config->base.trigger.risingEdgeAtPeriod);
208
209 IfxCcu6_setSingleShotModeEnable(module, FALSE, TRUE);
210
211 IfxCcu6_setT13TriggerEventMode(module, IfxCcu6_T13TriggerEvent_onT12Zero);
212 IfxCcu6_setT13TriggerEventDirection(module, IfxCcu6_T13TriggerDirection_onT12CountingUp);
213
214 if (config->base.trigger.outputEnabled)
215 {
216 if (config->triggerOut != NULL_PTR)
217 {
218 /*Initialize the port */
219 IfxCcu6_initCout63Pin(config->triggerOut, config->base.trigger.outputMode, config->base.trigger.outputDriver);
220 }
221 else
222 {
223 result = FALSE;
224 }
225 }
226 else
227 {}
228
229 IfxCcu6_TimerWithTrigger_setTrigger(driver, config->base.trigger.triggerPoint);
230 }
231 else
232 {}
233
234 /* Interrupt configuration */
235 {
236 boolean timerHasIrq = config->base.isrPriority > 0;
237 boolean triggerHasIrq = (config->base.trigger.isrPriority > 0) && base->triggerEnabled;
238
239 if (timerHasIrq || triggerHasIrq)
240 {
241 volatile Ifx_SRC_SRCR *src;
242
243 IfxCcu6_clearInterruptStatusFlag(module, IfxCcu6_InterruptSource_t12PeriodMatch);
244 IfxCcu6_clearInterruptStatusFlag(module, IfxCcu6_InterruptSource_t12OneMatch);
245 IfxCcu6_clearInterruptStatusFlag(module, IfxCcu6_InterruptSource_t13CompareMatch);
246
247 if (timerHasIrq)
248 {
249 if (config->base.countDir == IfxStdIf_Timer_CountDir_upAndDown)
250 {
251 IfxCcu6_enableInterrupt(module, IfxCcu6_InterruptSource_t12OneMatch); /* full period */
252 }
253 else
254 {
255 IfxCcu6_enableInterrupt(module, IfxCcu6_InterruptSource_t12PeriodMatch); /* half-period*/
256 }
257
258 module->INP.B.INPT12 = config->serviceReqNrPeriod;
259 src = IfxCcu6_getSrcAddress(module, config->serviceReqNrPeriod);
260 IfxSrc_init(src, config->base.isrProvider, config->base.isrPriority);
261 IfxSrc_enable(src);
262 }
263
264 if (triggerHasIrq)
265 {
266 IfxCcu6_enableInterrupt(module, IfxCcu6_InterruptSource_t13CompareMatch); /* trigger event */
267 module->INP.B.INPT13 = config->serviceReqNrTrigger;
268
269 src = IfxCcu6_getSrcAddress(module, config->serviceReqNrTrigger);
270 IfxSrc_init(src, config->base.trigger.isrProvider, config->base.trigger.isrPriority);
271 IfxSrc_enable(src);
272 }
273 }
274 }
275
276 /* Transfer the shadow registers */
277 IfxCcu6_TimerWithTrigger_applyUpdate(driver);
278 return result;
279 }
280
281
282 void IfxCcu6_TimerWithTrigger_initConfig(IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
283 {
284 IfxStdIf_Timer_initConfig(&config->base);
285 config->ccu6 = ccu6;
286 config->serviceReqNrPeriod = IfxCcu6_ServiceRequest_0;
287 config->serviceReqNrTrigger = IfxCcu6_ServiceRequest_1;
288 config->triggerOut = NULL_PTR;
289 }
290
291
292 void IfxCcu6_TimerWithTrigger_run(IfxCcu6_TimerWithTrigger *driver)
293 {
294 IfxCcu6_startTimer(driver->ccu6, TRUE, FALSE);
295 }
296
297
298 boolean IfxCcu6_TimerWithTrigger_setFrequency(IfxCcu6_TimerWithTrigger *driver, float32 frequency)
299 {
300 Ifx_TimerValue period = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / frequency);
301
302 return IfxCcu6_TimerWithTrigger_setPeriod(driver, period);
303 }
304
305
306 boolean IfxCcu6_TimerWithTrigger_setPeriod(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
307 {
308 driver->base.period = period;
309 IfxCcu6_setT12PeriodValue(driver->ccu6, (uint16)((driver->ccu6->TCTR0.B.CTM == 1) ?
310 ((period / 2) - 1) : (period - 1)));
311
312 return TRUE;
313 }
314
315
316 void IfxCcu6_TimerWithTrigger_setSingleMode(IfxCcu6_TimerWithTrigger *driver, boolean enabled)
317 {
318 if (enabled)
319 {
320 IfxCcu6_enableSingleShotMode(driver->ccu6, IfxCcu6_TimerId_t12);
321 }
322 else
323 {
324 IfxCcu6_disableSingleShotMode(driver->ccu6, IfxCcu6_TimerId_t12);
325 }
326 }
327
328
329 void IfxCcu6_TimerWithTrigger_setTrigger(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
330 {
331 driver->ccu6->CC63SR.U = triggerPoint;
332 }
333
334
335 boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
336 {
337 /* Ensure the stdif is reset to zeros */
338 memset(stdif, 0, sizeof(IfxStdIf_Timer));
339
340 /* *INDENT-OFF* Note: this file was indented manually by the author. */
341 /* Set the API link */
342 stdif->driver = driver;
343 stdif->getFrequency =(IfxStdIf_Timer_GetFrequency )&IfxCcu6_TimerWithTrigger_getFrequency;
344 stdif->getPeriod =(IfxStdIf_Timer_GetPeriod )&IfxCcu6_TimerWithTrigger_getPeriod;
345 stdif->getResolution =(IfxStdIf_Timer_GetResolution )&IfxCcu6_TimerWithTrigger_getResolution;
346 stdif->setFrequency =(IfxStdIf_Timer_SetFrequency )&IfxCcu6_TimerWithTrigger_setFrequency;
347 stdif->updateInputFrequency =(IfxStdIf_Timer_UpdateInputFrequency)&IfxCcu6_TimerWithTrigger_updateInputFrequency;
348 stdif->applyUpdate =(IfxStdIf_Timer_ApplyUpdate )&IfxCcu6_TimerWithTrigger_applyUpdate;
349 stdif->disableUpdate =(IfxStdIf_Timer_DisableUpdate )&IfxCcu6_TimerWithTrigger_disableUpdate;
350 stdif->getInputFrequency =(IfxStdIf_Timer_GetInputFrequency )&IfxCcu6_TimerWithTrigger_getInputFrequency;
351 stdif->run =(IfxStdIf_Timer_Run )&IfxCcu6_TimerWithTrigger_run;
352 stdif->setPeriod =(IfxStdIf_Timer_SetPeriod )&IfxCcu6_TimerWithTrigger_setPeriod;
353 stdif->setSingleMode =(IfxStdIf_Timer_SetSingleMode )&IfxCcu6_TimerWithTrigger_setSingleMode;
354 stdif->setTrigger =(IfxStdIf_Timer_SetTrigger )&IfxCcu6_TimerWithTrigger_setTrigger;
355 stdif->stop =(IfxStdIf_Timer_Stop )&IfxCcu6_TimerWithTrigger_stop;
356 stdif->ackTimerIrq =(IfxStdIf_Timer_AckTimerIrq )&IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq;
357 stdif->ackTriggerIrq =(IfxStdIf_Timer_AckTriggerIrq )&IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq;
358 /* *INDENT-ON* */
359
360 return TRUE;
361 }
362
363
364 void IfxCcu6_TimerWithTrigger_stop(IfxCcu6_TimerWithTrigger *driver)
365 {
366 IfxCcu6_stopTimer(driver->ccu6, TRUE, TRUE);
367 }
368
369
370 void IfxCcu6_TimerWithTrigger_updateInputFrequency(IfxCcu6_TimerWithTrigger *driver)
371 {
372 uint16 prescaler;
373 prescaler = driver->ccu6->TCTR0.B.T12CLK;
374
375 driver->base.clockFreq = IfxScuCcu_getSpbFrequency() / (1U << prescaler);
376 }
IfxCcu6_TimerWithTrigger_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxCcu6_TimerWithTrigger.h:97
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2150
IfxCcu6_TimerWithTrigger::base
IfxCcu6_TimerWithTrigger_Base base
Timer base structure.
Definition: IfxCcu6_TimerWithTrigger.h:89
IfxCcu6_TimerWithTrigger_setPeriod
boolean IfxCcu6_TimerWithTrigger_setPeriod(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxCcu6_TimerWithTrigger.c:306
IfxCcu6_TimerWithTrigger_disableUpdate
void IfxCcu6_TimerWithTrigger_disableUpdate(IfxCcu6_TimerWithTrigger *driver)
Disables the upadte This function is has an empty body as the updated is disabled automatically after...
Definition: IfxCcu6_TimerWithTrigger.c:93
IfxCcu6_clearT13CompareNotification
IFX_INLINE void IfxCcu6_clearT13CompareNotification(Ifx_CCU6 *ccu6)
Clears the T13 compare notification.
Definition: IfxCcu6.h:1437
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:572
IfxStdIf_Timer_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxStdIf_Timer.h:276
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:237
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxStdIf_Timer_GetFrequency
float32(* IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:99
IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq
boolean IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq(IfxCcu6_TimerWithTrigger *driver)
Returns the trigger event.
Definition: IfxCcu6_TimerWithTrigger.c:71
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:299
IfxCcu6_TimerWithTrigger_Config::serviceReqNrPeriod
IfxCcu6_ServiceRequest serviceReqNrPeriod
Service request used for the period.
Definition: IfxCcu6_TimerWithTrigger.h:100
IfxStdIf_Timer_AckTriggerIrq
boolean(* IfxStdIf_Timer_AckTriggerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the trigger interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:233
IfxStdIf_Timer_UpdateInputFrequency
void(* IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:131
IfxCcu6_setT13TriggerEventMode
IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare...
Definition: IfxCcu6.h:2121
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:253
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:251
IfxCcu6_InterruptSource_t13CompareMatch
Interrupt enable for T13 compare-match.
Definition: IfxCcu6.h:195
IfxStdIf_Timer_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Timer.h:239
IfxCcu6_TimerWithTrigger_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxCcu6_TimerWithTrigger.h:80
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
IfxStdIf_Timer_TrigConfig::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver.
Definition: IfxStdIf_Timer.h:266
IfxCcu6_TimerWithTrigger_getPointer
volatile uint32 * IfxCcu6_TimerWithTrigger_getPointer(IfxCcu6_TimerWithTrigger *driver)
Returns the pointer to timer channel.
Definition: IfxCcu6_TimerWithTrigger.c:117
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStdIf_Timer_SetFrequency
boolean(* IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:125
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
IfxCcu6_TimerWithTrigger_getResolution
float32 IfxCcu6_TimerWithTrigger_getResolution(IfxCcu6_TimerWithTrigger *driver)
Returns the resolution.
Definition: IfxCcu6_TimerWithTrigger.c:123
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
Ifx_Assert.h
Assert functions.
IfxCcu6_TimerWithTrigger_setSingleMode
void IfxCcu6_TimerWithTrigger_setSingleMode(IfxCcu6_TimerWithTrigger *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxCcu6_TimerWithTrigger.c:316
IfxCcu6_TimerWithTrigger
CCU6 Timer interface.
Definition: IfxCcu6_TimerWithTrigger.h:87
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:240
IfxCcu6_T12CountMode_centerAligned
T12 counts down after detecting a period-match and counts up after detecting a one-match.
Definition: IfxCcu6.h:301
IfxStdIf_Timer_GetResolution
float32(* IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:111
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:337
IfxCcu6_setSingleShotModeEnable
IFX_INLINE void IfxCcu6_setSingleShotModeEnable(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the sel...
Definition: IfxCcu6.h:2041
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCcu6_TimerWithTrigger_getFrequency
float32 IfxCcu6_TimerWithTrigger_getFrequency(IfxCcu6_TimerWithTrigger *driver)
Returns the frequency.
Definition: IfxCcu6_TimerWithTrigger.c:99
IfxCcu6_disableSingleShotMode
IFX_INLINE void IfxCcu6_disableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the single shot-mode of Timers (T12 T13).
Definition: IfxCcu6.h:1488
IfxCcu6_isT13CompareNotification
IFX_INLINE boolean IfxCcu6_isT13CompareNotification(Ifx_CCU6 *ccu6)
Returns the status of T13 compare notification.
Definition: IfxCcu6.h:1944
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1603
IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq
boolean IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq(IfxCcu6_TimerWithTrigger *driver)
Returns the timer event.
Definition: IfxCcu6_TimerWithTrigger.c:55
IfxStdIf_Timer_Config::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:275
IfxStdIf_Timer_CountDir_upAndDown
Timer is counting up and down.
Definition: IfxStdIf_Timer.h:88
IfxCcu6_TimerWithTrigger.h
CCU6 TIMERWITHTRIGGER details.
IfxCcu6_enableSingleShotMode
IFX_INLINE void IfxCcu6_enableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the single shot-mode of Timers (T12 T13).
Definition: IfxCcu6.h:1613
IfxCcu6_TimerWithTrigger_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:79
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1560
IfxCcu6_T13TriggerEvent_onT12Zero
set T13R upon a zero-match of T12 (while counting up)
Definition: IfxCcu6.h:327
IfxStdIf_Timer_::disableUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
Definition: IfxStdIf_Timer.h:247
IfxCcu6_TimerWithTrigger_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:77
IfxCcu6_TimerWithTrigger_setTrigger
void IfxCcu6_TimerWithTrigger_setTrigger(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxCcu6_TimerWithTrigger.c:329
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:336
IfxCcu6_TimerWithTrigger_getInputFrequency
float32 IfxCcu6_TimerWithTrigger_getInputFrequency(IfxCcu6_TimerWithTrigger *driver)
Returns the Input frequncy.
Definition: IfxCcu6_TimerWithTrigger.c:105
IfxCcu6_ChannelOut_cout3
CC63 compare output COUT3.
Definition: IfxCcu6.h:118
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2079
IfxStdIf_Timer_GetInputFrequency
float32(* IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:175
IfxStdIf_Timer_SetTrigger
void(* IfxStdIf_Timer_SetTrigger)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
Set trigger point.
Definition: IfxStdIf_Timer.h:215
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:193
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:279
IfxStdIf_Timer_TrigConfig::risingEdgeAtPeriod
boolean risingEdgeAtPeriod
Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset...
Definition: IfxStdIf_Timer.h:267
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1914
IfxCcu6_T13TriggerDirection_onT12CountingUp
while T12 is counting up
Definition: IfxCcu6.h:311
IfxCcu6_clearInterruptStatusFlag
IFX_INLINE void IfxCcu6_clearInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Clears the selected interrupt flag.
Definition: IfxCcu6.h:1418
IfxStdIf_Timer_initConfig
void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:45
IfxCcu6_TimerWithTrigger_Base
Structure for the timer base.
Definition: IfxCcu6_TimerWithTrigger.h:75
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:248
IfxCcu6_TimerWithTrigger_run
void IfxCcu6_TimerWithTrigger_run(IfxCcu6_TimerWithTrigger *driver)
Runs the timer.
Definition: IfxCcu6_TimerWithTrigger.c:292
IfxCcu6_clearT12OneNotification
IFX_INLINE void IfxCcu6_clearT12OneNotification(Ifx_CCU6 *ccu6)
Clears the T12 One notification.
Definition: IfxCcu6.h:1425
IfxCcu6_TimerWithTrigger_stop
void IfxCcu6_TimerWithTrigger_stop(IfxCcu6_TimerWithTrigger *driver)
Stops the timer.
Definition: IfxCcu6_TimerWithTrigger.c:364
IfxStdIf_Timer_TrigConfig::triggerPoint
Ifx_TimerValue triggerPoint
Trigger point in timer ticks.
Definition: IfxStdIf_Timer.h:262
IfxStdIf_Timer_::setTrigger
IfxStdIf_Timer_SetTrigger setTrigger
Definition: IfxStdIf_Timer.h:252
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:244
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:249
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:245
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:194
IfxStdIf_Timer_GetPeriod
Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:105
IfxCcu6_TimerWithTrigger_getPeriod
Ifx_TimerValue IfxCcu6_TimerWithTrigger_getPeriod(IfxCcu6_TimerWithTrigger *driver)
Returns the period of the timer.
Definition: IfxCcu6_TimerWithTrigger.c:111
IfxStdIf_Timer_DisableUpdate
void(* IfxStdIf_Timer_DisableUpdate)(IfxStdIf_InterfaceDriver stdIf)
Disable updates.
Definition: IfxStdIf_Timer.h:169
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:233
IfxCcu6_TimerWithTrigger_initConfig
void IfxCcu6_TimerWithTrigger_initConfig(IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
Initializes the configuration structure to default.
Definition: IfxCcu6_TimerWithTrigger.c:282
IfxCcu6_isT12OneNotification
IFX_INLINE boolean IfxCcu6_isT12OneNotification(Ifx_CCU6 *ccu6)
Returns the status of T12 one notification.
Definition: IfxCcu6.h:1932
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:250
IfxCcu6_initCout63Pin
IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin.
Definition: IfxCcu6.h:1862
IfxStdIf_Timer_::ackTriggerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
Definition: IfxStdIf_Timer.h:255
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:274
IfxStdIf_Timer_ApplyUpdate
void(* IfxStdIf_Timer_ApplyUpdate)(IfxStdIf_InterfaceDriver stdIf)
Apply requested updates.
Definition: IfxStdIf_Timer.h:152
IfxCcu6_setOutputPassiveLevel
void IfxCcu6_setOutputPassiveLevel(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module.
Definition: IfxCcu6.c:320
IfxCcu6_getT12TimerPointer
IFX_INLINE volatile uint32 * IfxCcu6_getT12TimerPointer(Ifx_CCU6 *ccu6)
Returns the Timer pointer.
Definition: IfxCcu6.h:1703
IfxCcu6_TimerWithTrigger_Config
Configuration structure for T12 and T13 Timer.
Definition: IfxCcu6_TimerWithTrigger.h:95
IfxStdIf_Timer_Run
void(* IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:184
IfxCcu6_TimerWithTrigger_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxCcu6_TimerWithTrigger.h:78
IfxCcu6_TimerWithTrigger_Config::serviceReqNrTrigger
IfxCcu6_ServiceRequest serviceReqNrTrigger
Service request used for the Trigger.
Definition: IfxCcu6_TimerWithTrigger.h:101
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:242
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:278
IfxCcu6_setT13TriggerEventDirection
IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction.
Definition: IfxCcu6.h:2115
IfxCcu6_TimerWithTrigger_setFrequency
boolean IfxCcu6_TimerWithTrigger_setFrequency(IfxCcu6_TimerWithTrigger *driver, float32 frequency)
Sets the frequency.
Definition: IfxCcu6_TimerWithTrigger.c:298
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2091
IfxCcu6_TimerWithTrigger_applyUpdate
void IfxCcu6_TimerWithTrigger_applyUpdate(IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers.
Definition: IfxCcu6_TimerWithTrigger.c:87
IfxCcu6_TimerWithTrigger_init
boolean IfxCcu6_TimerWithTrigger_init(IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
Initialises the timer object T12 is configured as timer, T13 is optionally configured as trigger T12C...
Definition: IfxCcu6_TimerWithTrigger.c:129
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2140
IfxCcu6_TimerWithTrigger_Config::triggerOut
IfxCcu6_Cout63_Out * triggerOut
Definition: IfxCcu6_TimerWithTrigger.h:99
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxStdIf_Timer_Stop
void(* IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:221
IfxStdIf_Timer_::applyUpdate
IfxStdIf_Timer_ApplyUpdate applyUpdate
Definition: IfxStdIf_Timer.h:246
IfxStdIf_Timer_AckTimerIrq
boolean(* IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:227
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:261
IfxCcu6_setT13PeriodValue
IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match.
Definition: IfxCcu6.h:2109
IfxStdIf_Timer_TrigConfig::outputEnabled
boolean outputEnabled
If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
Definition: IfxStdIf_Timer.h:268
IfxStdIf_Timer_SetPeriod
boolean(* IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:194
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:277
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxCcu6_TimerWithTrigger_stdIfTimerInit
boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer.
Definition: IfxCcu6_TimerWithTrigger.c:335
IfxStdIf_Timer_TrigConfig::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxStdIf_Timer.h:265
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:254
IfxStdIf_Timer_SetSingleMode
void(* IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:203
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:145
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:241
IfxCcu6_enableModulationOutput
void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 ...
Definition: IfxCcu6.c:114
IfxCcu6_TimerWithTrigger_updateInputFrequency
void IfxCcu6_TimerWithTrigger_updateInputFrequency(IfxCcu6_TimerWithTrigger *driver)
Updates the input frequency.
Definition: IfxCcu6_TimerWithTrigger.c:370
IfxCcu6_TimerWithTrigger::ccu6
Ifx_CCU6 * ccu6
CCU6 module used for the timer functionality.
Definition: IfxCcu6_TimerWithTrigger.h:90
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:232


iLLD_TC26B: IfxCcu6_TimerWithTrigger.h Source File

  • Ccu6
  • TimerWithTrigger
IfxCcu6_TimerWithTrigger.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_TimerWithTrigger.h
3 * \brief CCU6 TIMERWITHTRIGGER details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Ccu6_TimerWithTrigger_Usage How to use the CCU6 TimerWithTrigger Interface driver?
42 * \ingroup IfxLld_Ccu6_TimerWithTrigger
43 * This driver implements the timer functionalities as defined by \ref library_srvsw_stdif_timer.
44 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_timer "standard interface APIs".
45 *
46 * \defgroup IfxLld_Ccu6_TimerWithTrigger TimerWithTrigger Interface driver
47 * \ingroup IfxLld_Ccu6
48 * \defgroup IfxLld_Ccu6_TimerWithTrigger_Data_Structures Data Structures
49 * \ingroup IfxLld_Ccu6_TimerWithTrigger
50 * \defgroup IfxLld_Ccu6_TimerWithTrigger_Timer_StdIf_Functions Timer StdIf Functions
51 * \ingroup IfxLld_Ccu6_TimerWithTrigger
52 * \defgroup IfxLld_Ccu6_TimerWithTrigger_Timer_Functions Timer Functions
53 * \ingroup IfxLld_Ccu6_TimerWithTrigger
54 */
55
56 #ifndef IFXCCU6_TIMERWITHTRIGGER_H
57 #define IFXCCU6_TIMERWITHTRIGGER_H 1
58
59 /******************************************************************************/
60 /*----------------------------------Includes----------------------------------*/
61 /******************************************************************************/
62
63 #include "_PinMap/IfxCcu6_PinMap.h"
64 #include "Ccu6/Std/IfxCcu6.h"
65 #include "StdIf/IfxStdIf_Timer.h"
66
67 /******************************************************************************/
68 /*-----------------------------Data Structures--------------------------------*/
69 /******************************************************************************/
70
71 /** \addtogroup IfxLld_Ccu6_TimerWithTrigger_Data_Structures
72 * \{ */
73 /** \brief Structure for the timer base
74 */
75 typedef struct
76 {
77 Ifx_TimerValue period; /**< \brief Timer period in ticks (cached value) */
78 boolean triggerEnabled; /**< \brief If TRUE, the trigger functionality is Initialised */
79 float32 clockFreq; /**< \brief Timer input clock frequency (cached value) */
80 IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
81 } IfxCcu6_TimerWithTrigger_Base;
82
83 /** \} */
84
85 /** \brief CCU6 Timer interface
86 */
87 typedef struct
88 {
89 IfxCcu6_TimerWithTrigger_Base base; /**< \brief Timer base structure */
90 Ifx_CCU6 *ccu6; /**< \brief CCU6 module used for the timer functionality */
91 } IfxCcu6_TimerWithTrigger;
92
93 /** \brief Configuration structure for T12 and T13 Timer
94 */
95 typedef struct
96 {
97 IfxStdIf_Timer_Config base; /**< \brief Standard interface timer configuration */
98 Ifx_CCU6 *ccu6; /**< \brief CCU6 module used for the timer functionality */
99 IfxCcu6_Cout63_Out *triggerOut;
100 IfxCcu6_ServiceRequest serviceReqNrPeriod; /**< \brief Service request used for the period */
101 IfxCcu6_ServiceRequest serviceReqNrTrigger; /**< \brief Service request used for the Trigger */
102 } IfxCcu6_TimerWithTrigger_Config;
103
104 /** \addtogroup IfxLld_Ccu6_TimerWithTrigger_Timer_StdIf_Functions
105 * \{ */
106
107 /******************************************************************************/
108 /*-------------------------Global Function Prototypes-------------------------*/
109 /******************************************************************************/
110
111 /** \brief Returns the timer event
112 * \param driver CCU6 Timer interface Handle
113 * \return Timer event
114 *
115 * \see IfxStdIf_Timer_AckTimerIrq
116 *
117 */
118 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq(IfxCcu6_TimerWithTrigger *driver);
119
120 /** \brief Returns the trigger event
121 * \param driver CCU6 Timer interface Handle
122 * \return Timer event
123 *
124 * \see IfxStdIf_Timer_AckTriggerIrq
125 *
126 */
127 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq(IfxCcu6_TimerWithTrigger *driver);
128
129 /** \brief Enable the transfer of the shadow registers
130 * \param driver CCU6 Timer interface Handle
131 * \return None
132 *
133 * \see IfxStdIf_Timer_ApplyUpdate
134 *
135 */
136 IFX_EXTERN void IfxCcu6_TimerWithTrigger_applyUpdate(IfxCcu6_TimerWithTrigger *driver);
137
138 /** \brief Disables the upadte\n
139 * This function is has an empty body as the updated is disabled automatically after the shadow transfer
140 * \param driver CCU6 Timer interface Handle
141 * \return None
142 *
143 * \see IfxStdIf_Timer_DisableUpdate
144 *
145 */
146 IFX_EXTERN void IfxCcu6_TimerWithTrigger_disableUpdate(IfxCcu6_TimerWithTrigger *driver);
147
148 /** \brief Returns the frequency
149 * \param driver CCU6 Timer interface Handle
150 * \return Frequency
151 *
152 * \see IfxStdIf_Timer_GetFrequency
153 *
154 */
155 IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getFrequency(IfxCcu6_TimerWithTrigger *driver);
156
157 /** \brief Returns the Input frequncy
158 * \param driver CCU6 Timer interface Handle
159 * \return Frequency
160 *
161 * \see IfxStdIf_Timer_GetInputFrequency
162 *
163 */
164 IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getInputFrequency(IfxCcu6_TimerWithTrigger *driver);
165
166 /** \brief Returns the period of the timer
167 * \param driver CCU6 Timer interface Handle
168 * \return Period
169 *
170 * \see IfxStdIf_Timer_GetPeriod
171 *
172 */
173 IFX_EXTERN Ifx_TimerValue IfxCcu6_TimerWithTrigger_getPeriod(IfxCcu6_TimerWithTrigger *driver);
174
175 /** \brief Returns the resolution
176 * \param driver CCU6 Timer interface Handle
177 * \return Resolution
178 *
179 * \see IfxStdIf_Timer_GetResolution
180 *
181 */
182 IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getResolution(IfxCcu6_TimerWithTrigger *driver);
183
184 /** \brief Runs the timer
185 * \param driver CCU6 Timer interface Handle
186 * \return None
187 *
188 * \see IfxStdIf_Timer_Run
189 *
190 */
191 IFX_EXTERN void IfxCcu6_TimerWithTrigger_run(IfxCcu6_TimerWithTrigger *driver);
192
193 /** \brief Sets the frequency
194 * \param driver CCU6 Timer interface Handle
195 * \param frequency Frequency
196 * \return TRUE on success else FALSE
197 *
198 * \see IfxStdIf_Timer_SetFrequency
199 *
200 */
201 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setFrequency(IfxCcu6_TimerWithTrigger *driver, float32 frequency);
202
203 /** \brief Sets the period for the timer
204 * \param driver CCU6 Timer interface Handle
205 * \param period Period value
206 * \return TRUE on success else FALSE
207 *
208 * \see IfxStdIf_Timer_SetPeriod
209 *
210 */
211 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setPeriod(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period);
212
213 /** \brief Sets the single shot mode of the timer
214 * \param driver CCU6 Timer interface Handle
215 * \param enabled If TRUE, sets the single shot mode
216 * \return None
217 *
218 * \see IfxStdIf_Timer_SetSingleMode
219 *
220 */
221 IFX_EXTERN void IfxCcu6_TimerWithTrigger_setSingleMode(IfxCcu6_TimerWithTrigger *driver, boolean enabled);
222
223 /** \brief Sets the trigger
224 * \param driver CCU6 Timer interface Handle
225 * \param triggerPoint Trigger point value
226 * \return None
227 *
228 * \see IfxStdIf_Timer_SetTrigger
229 *
230 */
231 IFX_EXTERN void IfxCcu6_TimerWithTrigger_setTrigger(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint);
232
233 /** \brief Initializes the standard interface timer
234 * \param stdif Standard interface object, will be initialized by the function
235 * \param driver CCU6 Timer interface Handle
236 * \return TRUE on success else FALSE
237 */
238 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver);
239
240 /** \brief Stops the timer
241 * \param driver CCU6 Timer interface Handle
242 * \return None
243 *
244 * \see IfxStdIf_Timer_Stop
245 *
246 */
247 IFX_EXTERN void IfxCcu6_TimerWithTrigger_stop(IfxCcu6_TimerWithTrigger *driver);
248
249 /** \brief Updates the input frequency
250 * \param driver CCU6 Timer interface Handle
251 * \return None
252 *
253 * \see IfxStdIf_Timer_UpdateInputFrequency
254 *
255 */
256 IFX_EXTERN void IfxCcu6_TimerWithTrigger_updateInputFrequency(IfxCcu6_TimerWithTrigger *driver);
257
258 /** \} */
259
260 /** \addtogroup IfxLld_Ccu6_TimerWithTrigger_Timer_Functions
261 * \{ */
262
263 /******************************************************************************/
264 /*-------------------------Global Function Prototypes-------------------------*/
265 /******************************************************************************/
266
267 /** \brief Returns the pointer to timer channel
268 * \param driver CCU6 Timer interface Handle
269 * \return Pointer
270 *
271 * \see IfxStdIf_Timer_DisableUpdate
272 *
273 */
274 IFX_EXTERN volatile uint32 *IfxCcu6_TimerWithTrigger_getPointer(IfxCcu6_TimerWithTrigger *driver);
275
276 /** \brief Initialises the timer object\n
277 * T12 is configured as timer, T13 is optionally configured as trigger\n
278 * T12CLK, T12PRE and T12PR are chosen to achieve maximum PWM resolution\n
279 * Note: To achieve maximum PWM resolution, the requested T12 frequency should be the\n
280 * lowest PWM frequency.\n
281 * \param driver CCU6 Timer interface Handle
282 * \param config Configuration structure for Timer
283 * \return TRUE on success else FALSE
284 */
285 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_init(IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config);
286
287 /** \brief Initializes the configuration structure to default
288 * \param config Configuration structure for Timer
289 * \param ccu6 Pointer to CCU6 module
290 * \return None
291 */
292 IFX_EXTERN void IfxCcu6_TimerWithTrigger_initConfig(IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6);
293
294 /** \} */
295
296 #endif /* IFXCCU6_TIMERWITHTRIGGER_H */
IfxCcu6_TimerWithTrigger_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxCcu6_TimerWithTrigger.h:97
IfxCcu6_TimerWithTrigger::base
IfxCcu6_TimerWithTrigger_Base base
Timer base structure.
Definition: IfxCcu6_TimerWithTrigger.h:89
IfxCcu6_TimerWithTrigger_setPeriod
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setPeriod(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxCcu6_TimerWithTrigger.c:306
IfxCcu6_TimerWithTrigger_disableUpdate
IFX_EXTERN void IfxCcu6_TimerWithTrigger_disableUpdate(IfxCcu6_TimerWithTrigger *driver)
Disables the upadte This function is has an empty body as the updated is disabled automatically after...
Definition: IfxCcu6_TimerWithTrigger.c:93
IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq(IfxCcu6_TimerWithTrigger *driver)
Returns the trigger event.
Definition: IfxCcu6_TimerWithTrigger.c:71
IfxCcu6_TimerWithTrigger_Config::serviceReqNrPeriod
IfxCcu6_ServiceRequest serviceReqNrPeriod
Service request used for the period.
Definition: IfxCcu6_TimerWithTrigger.h:100
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:176
IfxCcu6_TimerWithTrigger_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxCcu6_TimerWithTrigger.h:80
IfxCcu6_TimerWithTrigger_getPointer
IFX_EXTERN volatile uint32 * IfxCcu6_TimerWithTrigger_getPointer(IfxCcu6_TimerWithTrigger *driver)
Returns the pointer to timer channel.
Definition: IfxCcu6_TimerWithTrigger.c:117
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxCcu6_TimerWithTrigger_getResolution
IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getResolution(IfxCcu6_TimerWithTrigger *driver)
Returns the resolution.
Definition: IfxCcu6_TimerWithTrigger.c:123
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxCcu6_TimerWithTrigger_setSingleMode
IFX_EXTERN void IfxCcu6_TimerWithTrigger_setSingleMode(IfxCcu6_TimerWithTrigger *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxCcu6_TimerWithTrigger.c:316
IfxCcu6_TimerWithTrigger
CCU6 Timer interface.
Definition: IfxCcu6_TimerWithTrigger.h:87
IfxCcu6_TimerWithTrigger_getFrequency
IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getFrequency(IfxCcu6_TimerWithTrigger *driver)
Returns the frequency.
Definition: IfxCcu6_TimerWithTrigger.c:99
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:272
IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq(IfxCcu6_TimerWithTrigger *driver)
Returns the timer event.
Definition: IfxCcu6_TimerWithTrigger.c:55
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu6_TimerWithTrigger_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:79
IfxCcu6_TimerWithTrigger_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:77
IfxCcu6_TimerWithTrigger_setTrigger
IFX_EXTERN void IfxCcu6_TimerWithTrigger_setTrigger(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxCcu6_TimerWithTrigger.c:329
IfxCcu6_TimerWithTrigger_getInputFrequency
IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getInputFrequency(IfxCcu6_TimerWithTrigger *driver)
Returns the Input frequncy.
Definition: IfxCcu6_TimerWithTrigger.c:105
IfxCcu6_PinMap.h
CCU6 I/O map.
IfxCcu6.h
CCU6 basic functionality.
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:230
IfxCcu6_TimerWithTrigger_Base
Structure for the timer base.
Definition: IfxCcu6_TimerWithTrigger.h:75
IfxStdIf_Timer.h
Standard interface: Timer.
IfxCcu6_TimerWithTrigger_run
IFX_EXTERN void IfxCcu6_TimerWithTrigger_run(IfxCcu6_TimerWithTrigger *driver)
Runs the timer.
Definition: IfxCcu6_TimerWithTrigger.c:292
IfxStdIf_Timer_CountDir
IfxStdIf_Timer_CountDir
Timer increment direction.
Definition: IfxStdIf_Timer.h:85
IfxCcu6_TimerWithTrigger_stop
IFX_EXTERN void IfxCcu6_TimerWithTrigger_stop(IfxCcu6_TimerWithTrigger *driver)
Stops the timer.
Definition: IfxCcu6_TimerWithTrigger.c:364
IfxCcu6_TimerWithTrigger_getPeriod
IFX_EXTERN Ifx_TimerValue IfxCcu6_TimerWithTrigger_getPeriod(IfxCcu6_TimerWithTrigger *driver)
Returns the period of the timer.
Definition: IfxCcu6_TimerWithTrigger.c:111
IfxCcu6_TimerWithTrigger_initConfig
IFX_EXTERN void IfxCcu6_TimerWithTrigger_initConfig(IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
Initializes the configuration structure to default.
Definition: IfxCcu6_TimerWithTrigger.c:282
IfxCcu6_TimerWithTrigger_Config
Configuration structure for T12 and T13 Timer.
Definition: IfxCcu6_TimerWithTrigger.h:95
IfxCcu6_TimerWithTrigger_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxCcu6_TimerWithTrigger.h:78
IfxCcu6_TimerWithTrigger_Config::serviceReqNrTrigger
IfxCcu6_ServiceRequest serviceReqNrTrigger
Service request used for the Trigger.
Definition: IfxCcu6_TimerWithTrigger.h:101
IfxCcu6_TimerWithTrigger_setFrequency
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setFrequency(IfxCcu6_TimerWithTrigger *driver, float32 frequency)
Sets the frequency.
Definition: IfxCcu6_TimerWithTrigger.c:298
IfxCcu6_TimerWithTrigger_applyUpdate
IFX_EXTERN void IfxCcu6_TimerWithTrigger_applyUpdate(IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers.
Definition: IfxCcu6_TimerWithTrigger.c:87
IfxCcu6_TimerWithTrigger_init
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_init(IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
Initialises the timer object T12 is configured as timer, T13 is optionally configured as trigger T12C...
Definition: IfxCcu6_TimerWithTrigger.c:129
IfxCcu6_TimerWithTrigger_Config::triggerOut
IfxCcu6_Cout63_Out * triggerOut
Definition: IfxCcu6_TimerWithTrigger.h:99
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxCcu6_TimerWithTrigger_stdIfTimerInit
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer.
Definition: IfxCcu6_TimerWithTrigger.c:335
IfxCcu6_TimerWithTrigger_updateInputFrequency
IFX_EXTERN void IfxCcu6_TimerWithTrigger_updateInputFrequency(IfxCcu6_TimerWithTrigger *driver)
Updates the input frequency.
Definition: IfxCcu6_TimerWithTrigger.c:370
IfxCcu6_TimerWithTrigger::ccu6
Ifx_CCU6 * ccu6
CCU6 module used for the timer functionality.
Definition: IfxCcu6_TimerWithTrigger.h:90


iLLD_TC26B: IfxCcu6_cfg.c Source File

  • _Impl
IfxCcu6_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_cfg.c
3 * \brief CCU6 on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxCcu6_cfg.h"
47
48 /******************************************************************************/
49 /*----------------------------------Macros------------------------------------*/
50 /******************************************************************************/
51
52 #define IFXCCU6_EMPTY_OUTPUT_SLOT (0, 0, IfxPort_OutputIdx_alt7)
53
54 /******************************************************************************/
55 /*-----------------------Exported Variables/Constants-------------------------*/
56 /******************************************************************************/
57
58 IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES] = {
59 {&MODULE_CCU60, IfxCcu6_Index_0},
60 {&MODULE_CCU61, IfxCcu6_Index_1}
61 };
IfxCcu6_Index_1
CCU6 index 1.
Definition: IfxCcu6_cfg.h:84
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCcu6_cfg.h
CCU6 on-chip implementation data.
IFXCCU6_NUM_MODULES
#define IFXCCU6_NUM_MODULES
Definition: IfxCcu6_cfg.h:66
IfxCcu6_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES]
Definition: IfxCcu6_cfg.c:58
IfxCcu6_Index_0
CCU6 index 0.
Definition: IfxCcu6_cfg.h:83
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140


iLLD_TC26B: IfxCcu6_cfg.h Source File

  • _Impl
IfxCcu6_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_cfg.h
3 * \brief CCU6 on-chip implementation data
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Ccu6 CCU6
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Ccu6_Impl Implementation
44 * \ingroup IfxLld_Ccu6
45 * \defgroup IfxLld_Ccu6_Std Standard Driver
46 * \ingroup IfxLld_Ccu6
47 * \defgroup IfxLld_Ccu6_Impl_Enumerations Enumerations
48 * \ingroup IfxLld_Ccu6_Impl
49 */
50
51 #ifndef IFXCCU6_CFG_H
52 #define IFXCCU6_CFG_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 #include "Cpu/Std/Ifx_Types.h"
59 #include "IfxCcu6_reg.h"
60 #include "IfxCcu6_bf.h"
61
62 /******************************************************************************/
63 /*-----------------------------------Macros-----------------------------------*/
64 /******************************************************************************/
65
66 #define IFXCCU6_NUM_MODULES (2)
67
68 #define IFXCCU6_NUM_SERVICE_REQUESTS (4)
69
70 #define IFXCCU6_NUM_T12_CHANNELS (3)
71
72 #define IFXCCU6_NUM_T13_CHANNELS (1)
73
74 /******************************************************************************/
75 /*-------------------------------Enumerations---------------------------------*/
76 /******************************************************************************/
77
78 /** \brief List of the available CCU6 resources
79 */
80 typedef enum
81 {
82 IfxCcu6_Index_none = -1, /**< \brief Not Selected */
83 IfxCcu6_Index_0 = 0, /**< \brief CCU6 index 0 */
84 IfxCcu6_Index_1 /**< \brief CCU6 index 1 */
85 } IfxCcu6_Index;
86
87 typedef enum
88 {
89 IfxCcu6_TrigOut_0 = IFX_CCU6_MOSEL_TRIG0SEL_OFF, /**< \brief Output Trigger Select for CCU6061 TRIG0 */
90 IfxCcu6_TrigOut_1 = IFX_CCU6_MOSEL_TRIG1SEL_OFF, /**< \brief Output Trigger Select for CCU6061 TRIG1 */
91 IfxCcu6_TrigOut_2 = IFX_CCU6_MOSEL_TRIG2SEL_OFF /**< \brief Output Trigger Select for CCU6061 TRIG2 */
92 } IfxCcu6_TrigOut;
93
94 typedef enum
95 {
96 IfxCcu6_TrigSel_cout63 = 0,
97 IfxCcu6_TrigSel_cc60 = 1,
98 IfxCcu6_TrigSel_cc61 = 1,
99 IfxCcu6_TrigSel_cc62 = 1,
100 IfxCcu6_TrigSel_sr1 = 2,
101 IfxCcu6_TrigSel_sr3 = 3
102 } IfxCcu6_TrigSel;
103
104 /******************************************************************************/
105 /*-------------------Global Exported Variables/Constants----------------------*/
106 /******************************************************************************/
107
108 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES];
109
110 #endif /* IFXCCU6_CFG_H */
IfxCcu6_Index_none
Not Selected.
Definition: IfxCcu6_cfg.h:82
IfxCcu6_Index
IfxCcu6_Index
List of the available CCU6 resources.
Definition: IfxCcu6_cfg.h:80
IfxCcu6_Index_1
CCU6 index 1.
Definition: IfxCcu6_cfg.h:84
IfxCcu6_TrigOut_2
Output Trigger Select for CCU6061 TRIG2.
Definition: IfxCcu6_cfg.h:91
IfxCcu6_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES]
Definition: IfxCcu6_cfg.h:108
IfxCcu6_TrigSel_sr1
Definition: IfxCcu6_cfg.h:100
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCcu6_TrigSel_cc62
Definition: IfxCcu6_cfg.h:99
IFXCCU6_NUM_MODULES
#define IFXCCU6_NUM_MODULES
Definition: IfxCcu6_cfg.h:66
IfxCcu6_TrigSel_sr3
Definition: IfxCcu6_cfg.h:101
IfxCcu6_TrigOut_0
Output Trigger Select for CCU6061 TRIG0.
Definition: IfxCcu6_cfg.h:89
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxCcu6_TrigSel_cc60
Definition: IfxCcu6_cfg.h:97
IfxCcu6_TrigSel_cc61
Definition: IfxCcu6_cfg.h:98
IfxCcu6_Index_0
CCU6 index 0.
Definition: IfxCcu6_cfg.h:83
IfxCcu6_TrigSel_cout63
Definition: IfxCcu6_cfg.h:96
IfxCcu6_TrigSel
IfxCcu6_TrigSel
Definition: IfxCcu6_cfg.h:94
IfxCcu6_TrigOut_1
Output Trigger Select for CCU6061 TRIG1.
Definition: IfxCcu6_cfg.h:90
IfxCcu6_TrigOut
IfxCcu6_TrigOut
Definition: IfxCcu6_cfg.h:87
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140


iLLD_TC26B: IfxCif.c Source File

  • Cif
  • Std
IfxCif.c
Go to the documentation of this file.
1 /**
2 * \file IfxCif.c
3 * \brief CIF basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxCif.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 void IfxCif_clearEpError(IfxCif_EpErrorClearSources source)
53 {
54 if (source == IfxCif_EpErrorClearSources_ExtraPath5SizeError)
55 {
56 MODULE_CIF.MIEP.STA_ERR_CLR.B.EP_5_IC_SIZE_ERR_CLR = 1;
57 }
58 else if (source == IfxCif_EpErrorClearSources_ExtraPath4SizeError)
59 {
60 MODULE_CIF.MIEP.STA_ERR_CLR.B.EP_4_IC_SIZE_ERR_CLR = 1;
61 }
62 else if (source == IfxCif_EpErrorClearSources_ExtraPath3SizeError)
63 {
64 MODULE_CIF.MIEP.STA_ERR_CLR.B.EP_3_IC_SIZE_ERR_CLR = 1;
65 }
66 else if (source == IfxCif_EpErrorClearSources_ExtraPath2SizeError)
67 {
68 MODULE_CIF.MIEP.STA_ERR_CLR.B.EP_2_IC_SIZE_ERR_CLR = 1;
69 }
70 else if (source == IfxCif_EpErrorClearSources_ExtraPath1SizeError)
71 {
72 MODULE_CIF.MIEP.STA_ERR_CLR.B.EP_1_IC_SIZE_ERR_CLR = 1;
73 }
74 else
75 {
76 IFXCIF_DEBUG;
77 }
78 }
79
80
81 void IfxCif_clearEpInterrupt(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
82 {
83 if (5 > z)
84 {
85 MODULE_CIF.MIEP.ICR.U = (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count));
86 }
87 else
88 {
89 IFXCIF_DEBUG;
90 }
91 }
92
93
94 void IfxCif_clearIspError(IfxCif_IspErrorSources errorSource)
95 {
96 if (errorSource == IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule)
97 {
98 MODULE_CIF.ISP.ERR_CLR.B.OUTFORM_SIZE_ERR_CLR = 1;
99 }
100 else if (errorSource == IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule)
101 {
102 MODULE_CIF.ISP.ERR_CLR.B.IS_SIZE_ERR_CLR = 1;
103 }
104 else if (errorSource == IfxCif_IspErrorSources_SizeErrorInInformSubmodule)
105 {
106 MODULE_CIF.ISP.ERR_CLR.B.INFORM_SIZE_ERR_CLR = 1;
107 }
108 else
109 {
110 IFXCIF_DEBUG;
111 }
112 }
113
114
115 void IfxCif_clearIspInterrupt(IfxCif_IspInterruptSources interruptSource)
116 {
117 if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
118 {
119 MODULE_CIF.ISP.ICR.B.ICR_WD_TRIG = 1;
120 }
121 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
122 {
123 MODULE_CIF.ISP.ICR.B.ICR_H_START = 1;
124 }
125 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
126 {
127 MODULE_CIF.ISP.ICR.B.ICR_V_START = 1;
128 }
129 else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
130 {
131 MODULE_CIF.ISP.ICR.B.ICR_FRAME_IN = 1;
132 }
133 else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
134 {
135 MODULE_CIF.ISP.ICR.B.ICR_PIC_SIZE_ERR = 1;
136 }
137 else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
138 {
139 MODULE_CIF.ISP.ICR.B.ICR_DATA_LOSS = 1;
140 }
141 else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
142 {
143 MODULE_CIF.ISP.ICR.B.ICR_FRAME = 1;
144 }
145 else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
146 {
147 MODULE_CIF.ISP.ICR.B.ICR_ISP_OFF = 1;
148 }
149 }
150
151
152 void IfxCif_clearJpeInterrupt(IfxCif_JpeInterruptSources interruptSource)
153 {
154 if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
155 {
156 MODULE_CIF.JPE.ERROR_ISR.B.VLC_TABLE_ERR = 1;
157 }
158 else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
159 {
160 MODULE_CIF.JPE.ERROR_ISR.B.R2B_IMG_SIZE_ERR = 1;
161 }
162 else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
163 {
164 MODULE_CIF.JPE.ERROR_ISR.B.DCT_ERR = 1;
165 }
166 else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
167 {
168 MODULE_CIF.JPE.ERROR_ISR.B.VLC_SYMBOL_ERR = 1;
169 }
170 else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
171 {
172 MODULE_CIF.JPE.STATUS_ISR.B.GEN_HEADER_DONE = 1;
173 }
174 else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
175 {
176 MODULE_CIF.JPE.STATUS_ISR.B.ENCODE_DONE = 1;
177 }
178 else
179 {
180 IFXCIF_DEBUG;
181 }
182 }
183
184
185 void IfxCif_clearMiInterrupt(IfxCif_MiInterruptSources interruptSource)
186 {
187 if (interruptSource == IfxCif_MiInterruptSources_BusError)
188 {
189 MODULE_CIF.MI.ICR.B.BUS_ERROR = 1;
190 }
191 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
192 {
193 MODULE_CIF.MI.ICR.B.WRAP_MP_CR = 1;
194 }
195 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
196 {
197 MODULE_CIF.MI.ICR.B.WRAP_MP_CB = 1;
198 }
199 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
200 {
201 MODULE_CIF.MI.ICR.B.WRAP_MP_Y = 1;
202 }
203 else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
204 {
205 MODULE_CIF.MI.ICR.B.FILL_MPY = 1;
206 }
207 else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
208 {
209 MODULE_CIF.MI.ICR.B.MBLK_LINE = 1;
210 }
211 else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
212 {
213 MODULE_CIF.MI.ICR.B.MP_FRAME_END = 1;
214 }
215 else
216 {
217 IFXCIF_DEBUG;
218 }
219 }
220
221
222 void IfxCif_clearMiStatus(IfxCif_MiStatusClearSources source)
223 {
224 if (source == IfxCif_MiStatusClearSources_ExtraPath5FifoFull)
225 {
226 MODULE_CIF.MI.STATUS_CLR.B.EP_5_FIFO_FULL = 1;
227 }
228 else if (source == IfxCif_MiStatusClearSources_ExtraPath4FifoFull)
229 {
230 MODULE_CIF.MI.STATUS_CLR.B.EP_4_FIFO_FULL = 1;
231 }
232 else if (source == IfxCif_MiStatusClearSources_ExtraPath3FifoFull)
233 {
234 MODULE_CIF.MI.STATUS_CLR.B.EP_3_FIFO_FULL = 1;
235 }
236 else if (source == IfxCif_MiStatusClearSources_ExtraPath2FifoFull)
237 {
238 MODULE_CIF.MI.STATUS_CLR.B.EP_2_FIFO_FULL = 1;
239 }
240 else if (source == IfxCif_MiStatusClearSources_ExtraPath1FifoFull)
241 {
242 MODULE_CIF.MI.STATUS_CLR.B.EP_1_FIFO_FULL = 1;
243 }
244 else if (source == IfxCif_MiStatusClearSources_BusWriteError)
245 {
246 MODULE_CIF.MI.STATUS_CLR.B.BUS_WRITE_ERROR = 1;
247 }
248 else if (source == IfxCif_MiStatusClearSources_MainPictureCrFifoFull)
249 {
250 MODULE_CIF.MI.STATUS_CLR.B.MP_CR_FIFO_FULL = 1;
251 }
252 else if (source == IfxCif_MiStatusClearSources_MainPictureCbFifoFull)
253 {
254 MODULE_CIF.MI.STATUS_CLR.B.MP_CB_FIFO_FULL = 1;
255 }
256 else if (source == IfxCif_MiStatusClearSources_MainPictureYFifoFull)
257 {
258 MODULE_CIF.MI.STATUS_CLR.B.MP_Y_FIFO_FULL = 1;
259 }
260 else
261 {
262 IFXCIF_DEBUG;
263 }
264 }
265
266
267 void IfxCif_clearSecurityWatchdogInterrupt(IfxCif_SecurityWatchdogInterruptSources interruptSource)
268 {
269 if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
270 {
271 MODULE_CIF.WD.ICR.B.ICR_WD_VES_TO = 1;
272 }
273 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
274 {
275 MODULE_CIF.WD.ICR.B.ICR_WD_VSE_TO = 1;
276 }
277 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
278 {
279 MODULE_CIF.WD.ICR.B.ICR_WD_HES_TO = 1;
280 }
281 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
282 {
283 MODULE_CIF.WD.ICR.B.ICR_WD_HSE_TO = 1;
284 }
285 else
286 {
287 IFXCIF_DEBUG;
288 }
289 }
290
291
292 void IfxCif_dpResetCounter(IfxCif_DpCounters counter)
293 {
294 if (counter == IfxCif_DpCounters_PredividerCounter)
295 {
296 MODULE_CIF.DP.CTRL.B.RST_PD = 1;
297 }
298 else if (counter == IfxCif_DpCounters_TimestampCounter)
299 {
300 MODULE_CIF.DP.CTRL.B.RST_TSC = 1;
301 }
302 else if (counter == IfxCif_DpCounters_LineNumberCounter)
303 {
304 MODULE_CIF.DP.CTRL.B.RST_LNC = 1;
305 }
306 else if (counter == IfxCif_DpCounters_FrameNumberCounter)
307 {
308 MODULE_CIF.DP.CTRL.B.RST_FNC = 1;
309 }
310 else
311 {
312 IFXCIF_DEBUG;
313 }
314 }
315
316
317 void IfxCif_epForceConfigurationUpdate(IfxCif_ExtraPath z)
318 {
319 if (5 > z)
320 {
321 Ifx_CIF_MIEP_CH_INIT init;
322 init.U = MODULE_CIF.MIEP.CH_1S[z].INIT.U;
323 init.B.MI_EP_CFG_UPD = 1;
324 MODULE_CIF.MIEP.CH_1S[z].INIT.U = init.U;
325 }
326 else
327 {
328 IFXCIF_DEBUG;
329 }
330 }
331
332
333 void IfxCif_epSkipPicture(IfxCif_ExtraPath z)
334 {
335 if (5 > z)
336 {
337 Ifx_CIF_MIEP_CH_INIT init;
338 init.U = MODULE_CIF.MIEP.CH_1S[z].INIT.U;
339 init.B.MI_EP_SKIP = 1;
340 MODULE_CIF.MIEP.CH_1S[z].INIT.U = init.U;
341 }
342 else
343 {
344 IFXCIF_DEBUG;
345 }
346 }
347
348
349 uint16 IfxCif_getCurrentIspPictureOffset(IfxCif_ImageTiers tier)
350 {
351 uint16 retValue = 0xffff;
352
353 if (tier == IfxCif_ImageTiers_Horizontal)
354 {
355 retValue = MODULE_CIF.ISP.OUT_H_OFFS_SHD.B.ISP_OUT_H_OFFS_SHD;
356 }
357 else if (tier == IfxCif_ImageTiers_Vertical)
358 {
359 retValue = MODULE_CIF.ISP.OUT_V_OFFS_SHD.B.ISP_OUT_V_OFFS_SHD;
360 }
361 else
362 {
363 IFXCIF_DEBUG;
364 }
365
366 return retValue;
367 }
368
369
370 uint16 IfxCif_getCurrentIspPictureSize(IfxCif_ImageTiers tier)
371 {
372 uint16 retValue = 0xffff;
373
374 if (tier == IfxCif_ImageTiers_Horizontal)
375 {
376 retValue = MODULE_CIF.ISP.OUT_H_SIZE_SHD.B.ISP_OUT_H_SIZE_SHD;
377 }
378 else if (tier == IfxCif_ImageTiers_Vertical)
379 {
380 retValue = MODULE_CIF.ISP.OUT_V_SIZE_SHD.B.ISP_OUT_V_SIZE_SHD;
381 }
382 else
383 {
384 IFXCIF_DEBUG;
385 }
386
387 return retValue;
388 }
389
390
391 IfxCif_State IfxCif_getDpControlEnableState(IfxCif_DpControlSources source)
392 {
393 IfxCif_State retValue = IfxCif_State_Disabled;
394
395 if (source == IfxCif_DpControlSources_UserDefinedSymbol8)
396 {
397 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS8;
398 }
399 else if (source == IfxCif_DpControlSources_UserDefinedSymbol7)
400 {
401 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS7;
402 }
403 else if (source == IfxCif_DpControlSources_UserDefinedSymbol6)
404 {
405 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS6;
406 }
407 else if (source == IfxCif_DpControlSources_UserDefinedSymbol5)
408 {
409 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS5;
410 }
411 else if (source == IfxCif_DpControlSources_UserDefinedSymbol4)
412 {
413 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS4;
414 }
415 else if (source == IfxCif_DpControlSources_UserDefinedSymbol3)
416 {
417 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS3;
418 }
419 else if (source == IfxCif_DpControlSources_UserDefinedSymbol2)
420 {
421 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS2;
422 }
423 else if (source == IfxCif_DpControlSources_UserDefinedSymbol1)
424 {
425 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS1;
426 }
427 else if (source == IfxCif_DpControlSources_TimestampCounter)
428 {
429 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.TSC_EN;
430 }
431 else if (source == IfxCif_DpControlSources_LineNumberCounter)
432 {
433 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.LNC_EN;
434 }
435 else if (source == IfxCif_DpControlSources_FrameNumberCounter)
436 {
437 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.FNC_EN;
438 }
439 else
440 {
441 IFXCIF_DEBUG;
442 }
443
444 return retValue;
445 }
446
447
448 uint32 IfxCif_getDpCounter(IfxCif_DpCounters counter)
449 {
450 uint32 retValue = 0xffffffff;
451
452 if (counter == IfxCif_DpCounters_PredividerCounter)
453 {
454 retValue = MODULE_CIF.DP.PDIV_STAT.B.PDIV_VAL;
455 }
456 else if (counter == IfxCif_DpCounters_TimestampCounter)
457 {
458 retValue = MODULE_CIF.DP.TSC_STAT.B.TSC_VAL;
459 }
460 else if (counter == IfxCif_DpCounters_LineNumberCounter)
461 {
462 retValue = MODULE_CIF.DP.FLC_STAT.B.LNC_VAL;
463 }
464 else if (counter == IfxCif_DpCounters_FrameNumberCounter)
465 {
466 retValue = MODULE_CIF.DP.FLC_STAT.B.FNC_VAL;
467 }
468 else
469 {
470 IFXCIF_DEBUG;
471 }
472
473 return retValue;
474 }
475
476
477 uint16 IfxCif_getDpUserDefinedSymbol(uint8 x)
478 {
479 uint16 retValue = 0xffff;
480
481 if (8 > x)
482 {
483 retValue = MODULE_CIF.DP.UDS_1S[x].B.UDS;
484 }
485 else
486 {
487 IFXCIF_DEBUG;
488 }
489
490 return retValue;
491 }
492
493
494 uint32 IfxCif_getEpBaseAddress(IfxCif_ExtraPath z)
495 {
496 uint32 retValue = 0xffffffff;
497
498 if (5 > z)
499 {
500 /* read base address from unsigned component of the register structure because lower bits are tied
501 * to 0 as base address needs to be a word aligned value */
502 retValue = MODULE_CIF.MIEP.CH_1S[z].BASE_AD_SHD.U;
503 }
504 else
505 {
506 IFXCIF_DEBUG;
507 }
508
509 return retValue;
510 }
511
512
513 uint32 IfxCif_getEpBaseInitAddress(IfxCif_ExtraPath z)
514 {
515 uint32 retValue = 0xffffffff;
516
517 if (5 > z)
518 {
519 /* read base address from unsigned component of the register structure because lower bits are tied to 0
520 * as base address needs to be a word aligned value */
521 retValue = MODULE_CIF.MIEP.CH_1S[z].BASE_AD_INIT.U;
522 }
523 else
524 {
525 IFXCIF_DEBUG;
526 }
527
528 return retValue;
529 }
530
531
532 uint16 IfxCif_getEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
533 {
534 uint16 retValue = 0xffff;
535
536 if (5 > z)
537 {
538 if (tier == IfxCif_ImageTiers_Horizontal)
539 {
540 retValue = MODULE_CIF.EP_IC_1S[z].DISPLACE.B.DX;
541 }
542 else if (tier == IfxCif_ImageTiers_Vertical)
543 {
544 retValue = MODULE_CIF.EP_IC_1S[z].DISPLACE.B.DY;
545 }
546 else
547 {
548 IFXCIF_DEBUG;
549 }
550 }
551 else
552 {
553 IFXCIF_DEBUG;
554 }
555
556 return retValue;
557 }
558
559
560 uint16 IfxCif_getEpCroppingCurrentPictureOffset(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
561 {
562 uint16 retValue = 0xffff;
563
564 if (5 > z)
565 {
566 if (tier == IfxCif_ImageTiers_Horizontal)
567 {
568 retValue = MODULE_CIF.EP_IC_1S[z].H_OFFS_SHD.B.H_OFFS_SHD;
569 }
570 else if (tier == IfxCif_ImageTiers_Vertical)
571 {
572 retValue = MODULE_CIF.EP_IC_1S[z].V_OFFS_SHD.B.V_OFFS_SHD;
573 }
574 else
575 {
576 IFXCIF_DEBUG;
577 }
578 }
579 else
580 {
581 IFXCIF_DEBUG;
582 }
583
584 return retValue;
585 }
586
587
588 uint16 IfxCif_getEpCroppingCurrentPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
589 {
590 uint16 retValue = 0xffff;
591
592 if (5 > z)
593 {
594 if (tier == IfxCif_ImageTiers_Horizontal)
595 {
596 retValue = MODULE_CIF.EP_IC_1S[z].H_SIZE_SHD.B.H_SIZE_SHD;
597 }
598 else if (tier == IfxCif_ImageTiers_Vertical)
599 {
600 retValue = MODULE_CIF.EP_IC_1S[z].V_SIZE_SHD.B.V_SIZE_SHD;
601 }
602 else
603 {
604 IFXCIF_DEBUG;
605 }
606 }
607 else
608 {
609 IFXCIF_DEBUG;
610 }
611
612 return retValue;
613 }
614
615
616 IfxCif_State IfxCif_getEpCroppingEnableState(IfxCif_ExtraPath z)
617 {
618 IfxCif_State retValue = IfxCif_State_Disabled;
619
620 if (5 > z)
621 {
622 retValue = (IfxCif_State)MODULE_CIF.EP_IC_1S[z].CTRL.B.IC_EN;
623 }
624 else
625 {
626 IFXCIF_DEBUG;
627 }
628
629 return retValue;
630 }
631
632
633 uint16 IfxCif_getEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
634 {
635 uint16 retValue = 0xffff;
636
637 if (5 > z)
638 {
639 if (tier == IfxCif_ImageTiers_Horizontal)
640 {
641 retValue = MODULE_CIF.EP_IC_1S[z].MAX_DX.B.MAX_DX;
642 }
643 else if (tier == IfxCif_ImageTiers_Vertical)
644 {
645 retValue = MODULE_CIF.EP_IC_1S[z].MAX_DY.B.MAX_DY;
646 }
647 else
648 {
649 IFXCIF_DEBUG;
650 }
651 }
652 else
653 {
654 IFXCIF_DEBUG;
655 }
656
657 return retValue;
658 }
659
660
661 uint16 IfxCif_getEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
662 {
663 uint16 retValue = 0xffff;
664
665 if (5 > z)
666 {
667 if (tier == IfxCif_ImageTiers_Horizontal)
668 {
669 retValue = MODULE_CIF.EP_IC_1S[z].H_OFFS.B.H_OFFS;
670 }
671 else if (tier == IfxCif_ImageTiers_Vertical)
672 {
673 retValue = MODULE_CIF.EP_IC_1S[z].V_OFFS.B.V_OFFS;
674 }
675 else
676 {
677 IFXCIF_DEBUG;
678 }
679 }
680 else
681 {
682 IFXCIF_DEBUG;
683 }
684
685 return retValue;
686 }
687
688
689 uint16 IfxCif_getEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
690 {
691 uint16 retValue = 0xffff;
692
693 if (5 > z)
694 {
695 if (tier == IfxCif_ImageTiers_Horizontal)
696 {
697 retValue = MODULE_CIF.EP_IC_1S[z].H_SIZE.B.H_SIZE;
698 }
699 else if (tier == IfxCif_ImageTiers_Vertical)
700 {
701 retValue = MODULE_CIF.EP_IC_1S[z].V_SIZE.B.V_SIZE;
702 }
703 else
704 {
705 IFXCIF_DEBUG;
706 }
707 }
708 else
709 {
710 IFXCIF_DEBUG;
711 }
712
713 return retValue;
714 }
715
716
717 IfxCif_State IfxCif_getEpCroppingRecenterState(IfxCif_ExtraPath z)
718 {
719 IfxCif_State retValue = IfxCif_State_Disabled;
720
721 if (5 > z)
722 {
723 if (0 != MODULE_CIF.EP_IC_1S[z].RECENTER.B.RECENTER)
724 {
725 retValue = IfxCif_State_Enabled;
726 }
727 }
728 else
729 {
730 IFXCIF_DEBUG;
731 }
732
733 return retValue;
734 }
735
736
737 IfxCif_ErrorState IfxCif_getEpErrorState(IfxCif_EpErrorSources source)
738 {
739 IfxCif_ErrorState retValue = IfxCif_ErrorState_NoError;
740
741 if (source == IfxCif_EpErrorSources_ExtraPath5FifoFull)
742 {
743 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_5_FIFO_FULL;
744 }
745 else if (source == IfxCif_EpErrorSources_ExtraPath4FifoFull)
746 {
747 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_4_FIFO_FULL;
748 }
749 else if (source == IfxCif_EpErrorSources_ExtraPath3FifoFull)
750 {
751 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_3_FIFO_FULL;
752 }
753 else if (source == IfxCif_EpErrorSources_ExtraPath2FifoFull)
754 {
755 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_2_FIFO_FULL;
756 }
757 else if (source == IfxCif_EpErrorSources_ExtraPath1FifoFull)
758 {
759 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_1_FIFO_FULL;
760 }
761 else if (source == IfxCif_EpErrorSources_ExtraPath5SizeError)
762 {
763 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_5_IC_SIZE_ERR;
764 }
765 else if (source == IfxCif_EpErrorSources_ExtraPath4SizeError)
766 {
767 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_4_IC_SIZE_ERR;
768 }
769 else if (source == IfxCif_EpErrorSources_ExtraPath3SizeError)
770 {
771 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_3_IC_SIZE_ERR;
772 }
773 else if (source == IfxCif_EpErrorSources_ExtraPath2SizeError)
774 {
775 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_2_IC_SIZE_ERR;
776 }
777 else if (source == IfxCif_EpErrorSources_ExtraPath1SizeError)
778 {
779 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_1_IC_SIZE_ERR;
780 }
781 else
782 {
783 IFXCIF_DEBUG;
784 }
785
786 return retValue;
787 }
788
789
790 IfxCif_State IfxCif_getEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature)
791 {
792 IfxCif_State retValue = IfxCif_State_Disabled;
793
794 if (5 > z)
795 {
796 if (feature == IfxCif_EpFeatures_InitOffsetCounter)
797 {
798 retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL.B.INIT_OFFSET_EN;
799 }
800 else if (feature == IfxCif_EpFeatures_InitBaseAddress)
801 {
802 retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL.B.INIT_BASE_EN;
803 }
804 else if (feature == IfxCif_EpFeatures_ByteSwap)
805 {
806 retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL.B.BYTE_SWAP;
807 }
808 else if (feature == IfxCif_EpFeatures_PictureDataPath)
809 {
810 retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL.B.EP_ENABLE;
811 }
812 else
813 {
814 IFXCIF_DEBUG;
815 }
816 }
817
818 else
819 {
820 IFXCIF_DEBUG;
821 }
822
823 return retValue;
824 }
825
826
827 uint32 IfxCif_getEpInitSize(IfxCif_ExtraPath z)
828 {
829 uint32 retValue = 0xffffffff;
830
831 if (5 > z)
832 {
833 /* read size from unsigned component of the register structure because lower bits are tied to 0
834 * as size needs to be a word aligned value */
835 retValue = MODULE_CIF.MIEP.CH_1S[z].SIZE_INIT.U;
836 }
837 else
838 {
839 IFXCIF_DEBUG;
840 }
841
842 return retValue;
843 }
844
845
846 uint32 IfxCif_getEpInitialFillLevelInterruptOffset(IfxCif_ExtraPath z)
847 {
848 uint32 retValue = 0xffffffff;
849
850 if (5 > z)
851 {
852 /* read interrupt offset from unsigned component of the register structure because lower bits are tied
853 * to 0 as interrupt offset needs to be a word aligned value */
854 retValue = MODULE_CIF.MIEP.CH_1S[z].IRQ_OFFS_INIT.U;
855 }
856 else
857 {
858 IFXCIF_DEBUG;
859 }
860
861 return retValue;
862 }
863
864
865 uint32 IfxCif_getEpInitialOffsetCounter(IfxCif_ExtraPath z)
866 {
867 uint32 retValue = 0xffffffff;
868
869 if (5 > z)
870 {
871 /* read offset counter from unsigned component of the register structure because lower bits are tied
872 * to 0 as offset counter needs to be a word aligned value */
873 retValue = MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_INIT.U;
874 }
875 else
876 {
877 IFXCIF_DEBUG;
878 }
879
880 return retValue;
881 }
882
883
884 IfxCif_State IfxCif_getEpInputEnableState(IfxCif_ExtraPath z)
885 {
886 IfxCif_State retValue = IfxCif_State_Disabled;
887
888 if (5 > z)
889 {
890 retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL_SHD.B.EP_ENABLE_IN;
891 }
892 else
893 {
894 IFXCIF_DEBUG;
895 }
896
897 return retValue;
898 }
899
900
901 IfxCif_State IfxCif_getEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
902 {
903 IfxCif_State retValue = IfxCif_State_Disabled;
904
905 if (5 > z)
906 {
907 if (0 !=
908 (MODULE_CIF.MIEP.IMSC.
909 U & (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count))))
910 {
911 retValue = IfxCif_State_Enabled;
912 }
913 }
914 else
915 {
916 IFXCIF_DEBUG;
917 }
918
919 return retValue;
920 }
921
922
923 uint32 IfxCif_getEpInterruptOffset(IfxCif_ExtraPath z)
924 {
925 uint32 retValue = 0xffffffff;
926
927 if (5 > z)
928 {
929 /* read interrupt offset from unsigned component of the register structure because lower bits are tied
930 * to 0 as interrupt offset needs to be a word aligned value */
931 retValue = MODULE_CIF.MIEP.CH_1S[z].IRQ_OFFS_SHD.U;
932 }
933 else
934 {
935 IFXCIF_DEBUG;
936 }
937
938 return retValue;
939 }
940
941
942 uint32 IfxCif_getEpOffsetCounter(IfxCif_ExtraPath z)
943 {
944 uint32 retValue = 0xffffffff;
945
946 if (5 > z)
947 {
948 /* read offset counter from unsigned component of the register structure because lower bits are tied
949 * to 0 as offset counter needs to be a word aligned value */
950 retValue = MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_SHD.U;
951 }
952 else
953 {
954 IFXCIF_DEBUG;
955 }
956
957 return retValue;
958 }
959
960
961 uint32 IfxCif_getEpOffsetCounterStart(IfxCif_ExtraPath z)
962 {
963 uint32 retValue = 0xffffffff;
964
965 if (5 > z)
966 {
967 /* read offset counter from unsigned component of the register structure because lower bits are tied
968 * to 0 as offset counter needs to be a word aligned value */
969 retValue = MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_START.U;
970 }
971 else
972 {
973 IFXCIF_DEBUG;
974 }
975
976 return retValue;
977 }
978
979
980 IfxCif_State IfxCif_getEpOutputEnableState(IfxCif_ExtraPath z)
981 {
982 IfxCif_State retValue = IfxCif_State_Disabled;
983
984 if (5 > z)
985 {
986 retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL_SHD.B.EP_ENABLE_OUT;
987 }
988 else
989 {
990 IFXCIF_DEBUG;
991 }
992
993 return retValue;
994 }
995
996
997 uint8 IfxCif_getEpRecenterValue(IfxCif_ExtraPath z)
998 {
999 uint8 retValue = 0xff;
1000
1001 if (5 > z)
1002 {
1003 retValue = MODULE_CIF.EP_IC_1S[z].RECENTER.B.RECENTER;
1004 }
1005 else
1006 {
1007 IFXCIF_DEBUG;
1008 }
1009
1010 return retValue;
1011 }
1012
1013
1014 uint32 IfxCif_getEpSize(IfxCif_ExtraPath z)
1015 {
1016 uint32 retValue = 0xffffffff;
1017
1018 if (5 > z)
1019 {
1020 /* read size from unsigned component of the register structure because lower bits are tied
1021 * to 0 as size needs to be a word aligned value */
1022 retValue = MODULE_CIF.MIEP.CH_1S[z].SIZE_SHD.U;
1023 }
1024 else
1025 {
1026 IFXCIF_DEBUG;
1027 }
1028
1029 return retValue;
1030 }
1031
1032
1033 IfxCif_EpWriteFormat IfxCif_getEpWriteFormat(IfxCif_ExtraPath z)
1034 {
1035 IfxCif_EpWriteFormat retValue = IfxCif_EpWriteFormat_Raw8Bit;
1036
1037 if (5 > z)
1038 {
1039 retValue = (IfxCif_EpWriteFormat)MODULE_CIF.MIEP.CH_1S[z].CTRL.B.EP_WRITE_FORMAT;
1040 }
1041 else
1042 {
1043 IFXCIF_DEBUG;
1044 }
1045
1046 return retValue;
1047 }
1048
1049
1050 uint8 IfxCif_getHuffmanAcTableLength(IfxCif_HuffmanTables table)
1051 {
1052 uint8 retValue = 0xff;
1053
1054 if (table == IfxCif_HuffmanTables_Table0)
1055 {
1056 retValue = MODULE_CIF.JPE.TAC0_LEN.B.TAC0_LEN;
1057 }
1058 else if (table == IfxCif_HuffmanTables_Table1)
1059 {
1060 retValue = MODULE_CIF.JPE.TAC1_LEN.B.TAC1_LEN;
1061 }
1062 else
1063 {
1064 IFXCIF_DEBUG;
1065 }
1066
1067 return retValue;
1068 }
1069
1070
1071 IfxCif_State IfxCif_getHuffmanAcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
1072 {
1073 IfxCif_State retValue = IfxCif_State_Disabled;
1074
1075 if (table == IfxCif_HuffmanTables_Table0)
1076 {
1077 if (1 != (MODULE_CIF.JPE.AC_TABLE_SELECT.B.AC_TABLE_SELECT & ~(1 << component)))
1078 {
1079 retValue = IfxCif_State_Enabled;
1080 }
1081 }
1082 else if (table == IfxCif_HuffmanTables_Table1)
1083 {
1084 if (0 != (MODULE_CIF.JPE.AC_TABLE_SELECT.B.AC_TABLE_SELECT & ~(1 << component)))
1085 {
1086 retValue = IfxCif_State_Enabled;
1087 }
1088 }
1089 else
1090 {
1091 IFXCIF_DEBUG;
1092 }
1093
1094 return retValue;
1095 }
1096
1097
1098 uint8 IfxCif_getHuffmanDcTableLength(IfxCif_HuffmanTables table)
1099 {
1100 uint8 retValue = 0xff;
1101
1102 if (table == IfxCif_HuffmanTables_Table0)
1103 {
1104 retValue = MODULE_CIF.JPE.TDC0_LEN.B.TDC0_LEN;
1105 }
1106 else if (table == IfxCif_HuffmanTables_Table1)
1107 {
1108 retValue = MODULE_CIF.JPE.TDC1_LEN.B.TDC1_LEN;
1109 }
1110 else
1111 {
1112 IFXCIF_DEBUG;
1113 }
1114
1115 return retValue;
1116 }
1117
1118
1119 IfxCif_State IfxCif_getHuffmanDcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
1120 {
1121 IfxCif_State retValue = IfxCif_State_Disabled;
1122
1123 if (table == IfxCif_HuffmanTables_Table0)
1124 {
1125 if (1 != (MODULE_CIF.JPE.DC_TABLE_SELECT.B.DC_TABLE_SELECT & ~(1 << component)))
1126 {
1127 retValue = IfxCif_State_Enabled;
1128 }
1129 }
1130 else if (table == IfxCif_HuffmanTables_Table1)
1131 {
1132 if (0 != (MODULE_CIF.JPE.DC_TABLE_SELECT.B.DC_TABLE_SELECT & ~(1 << component)))
1133 {
1134 retValue = IfxCif_State_Enabled;
1135 }
1136 }
1137 else
1138 {
1139 IFXCIF_DEBUG;
1140 }
1141
1142 return retValue;
1143 }
1144
1145
1146 IfxCif_State IfxCif_getInternalClockMode(IfxCif_Submodules submodule)
1147 {
1148 IfxCif_State retValue = IfxCif_State_Disabled;
1149
1150 if (submodule == IfxCif_Submodules_Debug)
1151 {
1152 if (0 != MODULE_CIF.ICCL.B.CIF_DEBUG_PATH_CLK_EN)
1153 {
1154 retValue = IfxCif_State_Enabled;
1155 }
1156 }
1157 else if (submodule == IfxCif_Submodules_ExtraPaths)
1158 {
1159 if (0 != MODULE_CIF.ICCL.B.CIF_EXTRA_PATHS_CLK_ENABLE)
1160 {
1161 retValue = IfxCif_State_Enabled;
1162 }
1163 }
1164 else if (submodule == IfxCif_Submodules_LinearDownscaler)
1165 {
1166 if (0 != MODULE_CIF.ICCL.B.CIF_LIN_DSCALER_CLK_ENABLE)
1167 {
1168 retValue = IfxCif_State_Enabled;
1169 }
1170 }
1171 else if (submodule == IfxCif_Submodules_SecurityWatchdog)
1172 {
1173 if (0 != MODULE_CIF.ICCL.B.CIF_WATCHDOG_CLK_ENABLE)
1174 {
1175 retValue = IfxCif_State_Enabled;
1176 }
1177 }
1178
1179 else if (submodule == IfxCif_Submodules_MemoryInterface)
1180 {
1181 if (0 != MODULE_CIF.ICCL.B.CIF_MI_CLK_ENABLE)
1182 {
1183 retValue = IfxCif_State_Enabled;
1184 }
1185 }
1186 else if (submodule == IfxCif_Submodules_JpegEncoder)
1187 {
1188 if (0 != MODULE_CIF.ICCL.B.CIF_JPEG_CLK_ENABLE)
1189 {
1190 retValue = IfxCif_State_Enabled;
1191 }
1192 }
1193 else if (submodule == IfxCif_Submodules_ImageSignalProcessing)
1194 {
1195 if (0 != MODULE_CIF.ICCL.B.CIF_ISP_CLK_ENABLE)
1196 {
1197 retValue = IfxCif_State_Enabled;
1198 }
1199 }
1200 else
1201 {
1202 IFXCIF_DEBUG;
1203 }
1204
1205 return retValue;
1206 }
1207
1208
1209 uint16 IfxCif_getIspAcquisitionOffset(IfxCif_ImageTiers tier)
1210 {
1211 uint16 retValue = 0xffff;
1212
1213 if (tier == IfxCif_ImageTiers_Horizontal)
1214 {
1215 retValue = MODULE_CIF.ISP.ACQ_H_OFFS.B.ACQ_H_OFFS;
1216 }
1217 else if (tier == IfxCif_ImageTiers_Vertical)
1218 {
1219 retValue = MODULE_CIF.ISP.ACQ_V_OFFS.B.ACQ_V_OFFS;
1220 }
1221 else
1222 {
1223 IFXCIF_DEBUG;
1224 }
1225
1226 return retValue;
1227 }
1228
1229
1230 uint16 IfxCif_getIspAcquisitionSize(IfxCif_ImageTiers tier)
1231 {
1232 uint16 retValue = 0xffff;
1233
1234 if (tier == IfxCif_ImageTiers_Horizontal)
1235 {
1236 retValue = MODULE_CIF.ISP.ACQ_H_SIZE.B.ACQ_H_SIZE;
1237 }
1238 else if (tier == IfxCif_ImageTiers_Vertical)
1239 {
1240 retValue = MODULE_CIF.ISP.ACQ_V_SIZE.B.ACQ_V_SIZE;
1241 }
1242 else
1243 {
1244 IFXCIF_DEBUG;
1245 }
1246
1247 return retValue;
1248 }
1249
1250
1251 IfxCif_ErrorState IfxCif_getIspErrorState(IfxCif_IspErrorSources errorSource)
1252 {
1253 IfxCif_ErrorState retValue = IfxCif_ErrorState_NoError;
1254
1255 if (errorSource == IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule)
1256 {
1257 if (0 != MODULE_CIF.ISP.ERR.B.OUTFORM_SIZE_ERR)
1258 {
1259 retValue = IfxCif_ErrorState_Error;
1260 }
1261 }
1262 else if (errorSource == IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule)
1263 {
1264 if (0 != MODULE_CIF.ISP.ERR.B.IS_SIZE_ERR)
1265 {
1266 retValue = IfxCif_ErrorState_Error;
1267 }
1268 }
1269 else if (errorSource == IfxCif_IspErrorSources_SizeErrorInInformSubmodule)
1270 {
1271 if (0 != MODULE_CIF.ISP.ERR.B.INFORM_SIZE_ERR)
1272 {
1273 retValue = IfxCif_ErrorState_Error;
1274 }
1275 }
1276 else
1277 {
1278 IFXCIF_DEBUG;
1279 }
1280
1281 return retValue;
1282 }
1283
1284
1285 IfxCif_State IfxCif_getIspInputSelectionAppendState(void)
1286 {
1287 IfxCif_State retValue = IfxCif_State_Disabled;
1288
1289 if (1 != MODULE_CIF.ISP.ACQ_PROP.B.INPUT_SELECTION_NO_APP)
1290 {
1291 retValue = IfxCif_State_Enabled;
1292 }
1293 else
1294 {
1295 IFXCIF_DEBUG;
1296 }
1297
1298 return retValue;
1299 }
1300
1301
1302 IfxCif_State IfxCif_getIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource)
1303 {
1304 IfxCif_State retValue = IfxCif_State_Disabled;
1305
1306 if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
1307 {
1308 if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_WD_TRIG)
1309 {
1310 retValue = IfxCif_State_Enabled;
1311 }
1312 }
1313 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
1314 {
1315 if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_H_START)
1316 {
1317 retValue = IfxCif_State_Enabled;
1318 }
1319 }
1320 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
1321 {
1322 if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_V_START)
1323 {
1324 retValue = IfxCif_State_Enabled;
1325 }
1326 }
1327 else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
1328 {
1329 if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_FRAME_IN)
1330 {
1331 retValue = IfxCif_State_Enabled;
1332 }
1333 }
1334 else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
1335 {
1336 if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_PIC_SIZE_ERR)
1337 {
1338 retValue = IfxCif_State_Enabled;
1339 }
1340 }
1341 else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
1342 {
1343 if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_DATA_LOSS)
1344 {
1345 retValue = IfxCif_State_Enabled;
1346 }
1347 }
1348 else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
1349 {
1350 if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_FRAME)
1351 {
1352 retValue = IfxCif_State_Enabled;
1353 }
1354 }
1355 else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
1356 {
1357 if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_ISP_OFF)
1358 {
1359 retValue = IfxCif_State_Enabled;
1360 }
1361 }
1362
1363 return retValue;
1364 }
1365
1366
1367 uint16 IfxCif_getIspOutputWindowOffset(IfxCif_ImageTiers tier)
1368 {
1369 uint16 retValue = 0xffff;
1370
1371 if (tier == IfxCif_ImageTiers_Horizontal)
1372 {
1373 retValue = MODULE_CIF.ISP.OUT_H_OFFS.B.ISP_OUT_H_OFFS;
1374 }
1375 else if (tier == IfxCif_ImageTiers_Vertical)
1376 {
1377 retValue = MODULE_CIF.ISP.OUT_V_OFFS.B.ISP_OUT_V_OFFS;
1378 }
1379 else
1380 {
1381 IFXCIF_DEBUG;
1382 }
1383
1384 return retValue;
1385 }
1386
1387
1388 uint16 IfxCif_getIspPictureSize(IfxCif_ImageTiers tier)
1389 {
1390 uint16 retValue = 0xffff;
1391
1392 if (tier == IfxCif_ImageTiers_Horizontal)
1393 {
1394 retValue = MODULE_CIF.ISP.OUT_H_SIZE.B.ISP_OUT_H_SIZE;
1395 }
1396 else if (tier == IfxCif_ImageTiers_Vertical)
1397 {
1398 retValue = MODULE_CIF.ISP.OUT_V_SIZE.B.ISP_OUT_V_SIZE;
1399 }
1400 else
1401 {
1402 IFXCIF_DEBUG;
1403 }
1404
1405 return retValue;
1406 }
1407
1408
1409 uint16 IfxCif_getIspisCameraDisplacement(IfxCif_ImageTiers tier)
1410 {
1411 uint16 retValue = 0xffff;
1412
1413 if (tier == IfxCif_ImageTiers_Horizontal)
1414 {
1415 retValue = MODULE_CIF.ISPIS.DISPLACE.B.DX;
1416 }
1417 else if (tier == IfxCif_ImageTiers_Vertical)
1418 {
1419 retValue = MODULE_CIF.ISPIS.DISPLACE.B.DY;
1420 }
1421 else
1422 {
1423 IFXCIF_DEBUG;
1424 }
1425
1426 return retValue;
1427 }
1428
1429
1430 uint16 IfxCif_getIspisCurrentPictureOffset(IfxCif_ImageTiers tier)
1431 {
1432 uint16 retValue = 0xffff;
1433
1434 if (tier == IfxCif_ImageTiers_Horizontal)
1435 {
1436 retValue = MODULE_CIF.ISPIS.H_OFFS_SHD.B.IS_H_OFFS_SHD;
1437 }
1438 else if (tier == IfxCif_ImageTiers_Vertical)
1439 {
1440 retValue = MODULE_CIF.ISPIS.V_OFFS_SHD.B.IS_V_OFFS_SHD;
1441 }
1442 else
1443 {
1444 IFXCIF_DEBUG;
1445 }
1446
1447 return retValue;
1448 }
1449
1450
1451 uint16 IfxCif_getIspisCurrentPictureSize(IfxCif_ImageTiers tier)
1452 {
1453 uint16 retValue = 0xffff;
1454
1455 if (tier == IfxCif_ImageTiers_Horizontal)
1456 {
1457 retValue = MODULE_CIF.ISPIS.H_SIZE_SHD.B.ISP_H_SIZE_SHD;
1458 }
1459 else if (tier == IfxCif_ImageTiers_Vertical)
1460 {
1461 retValue = MODULE_CIF.ISPIS.V_SIZE_SHD.B.ISP_V_SIZE_SHD;
1462 }
1463 else
1464 {
1465 IFXCIF_DEBUG;
1466 }
1467
1468 return retValue;
1469 }
1470
1471
1472 uint16 IfxCif_getIspisMaximumDisplacement(IfxCif_ImageTiers tier)
1473 {
1474 uint16 retValue = 0xffff;
1475
1476 if (tier == IfxCif_ImageTiers_Horizontal)
1477 {
1478 retValue = MODULE_CIF.ISPIS.MAX_DX.B.IS_MAX_DX;
1479 }
1480 else if (tier == IfxCif_ImageTiers_Vertical)
1481 {
1482 retValue = MODULE_CIF.ISPIS.MAX_DY.B.IS_MAX_DY;
1483 }
1484 else
1485 {
1486 IFXCIF_DEBUG;
1487 }
1488
1489 return retValue;
1490 }
1491
1492
1493 uint16 IfxCif_getIspisOffsetOutputWindow(IfxCif_ImageTiers tier)
1494 {
1495 uint16 retValue = 0xffff;
1496
1497 if (tier == IfxCif_ImageTiers_Horizontal)
1498 {
1499 retValue = MODULE_CIF.ISPIS.H_OFFS.B.IS_H_OFFS;
1500 }
1501 else if (tier == IfxCif_ImageTiers_Vertical)
1502 {
1503 retValue = MODULE_CIF.ISPIS.V_OFFS.B.IS_V_OFFS;
1504 }
1505 else
1506 {
1507 IFXCIF_DEBUG;
1508 }
1509
1510 return retValue;
1511 }
1512
1513
1514 uint16 IfxCif_getIspisPictureSize(IfxCif_ImageTiers tier)
1515 {
1516 uint16 retValue = 0xffff;
1517
1518 if (tier == IfxCif_ImageTiers_Horizontal)
1519 {
1520 retValue = MODULE_CIF.ISPIS.H_SIZE.B.IS_H_SIZE;
1521 }
1522 else if (tier == IfxCif_ImageTiers_Vertical)
1523 {
1524 retValue = MODULE_CIF.ISPIS.V_SIZE.B.IS_V_SIZE;
1525 }
1526 else
1527 {
1528 IFXCIF_DEBUG;
1529 }
1530
1531 return retValue;
1532 }
1533
1534
1535 IfxCif_State IfxCif_getIspisRecenterEnableState(void)
1536 {
1537 IfxCif_State retValue = IfxCif_State_Disabled;
1538
1539 if (0 != MODULE_CIF.ISPIS.RECENTER.B.RECENTER)
1540 {
1541 retValue = IfxCif_State_Enabled;
1542 }
1543
1544 return retValue;
1545 }
1546
1547
1548 IfxCif_JpeDebugSignalState IfxCif_getJpeDebugSignalState(IfxCif_JpeDebugSignalSources source)
1549 {
1550 IfxCif_JpeDebugSignalState retValue = IfxCif_JpeDebugSignalState_Inactive;
1551
1552 if (source == IfxCif_JpeDebugSignalSources_BadTableAccess)
1553 {
1554 retValue = (IfxCif_JpeDebugSignalState)MODULE_CIF.JPE.DEBUG.B.DEB_BAD_TABLE_ACCESS;
1555 }
1556 else if (source == IfxCif_JpeDebugSignalSources_VlcTableBusy)
1557 {
1558 retValue = (IfxCif_JpeDebugSignalState)MODULE_CIF.JPE.DEBUG.B.DEB_VLC_TABLE_BUSY;
1559 }
1560 else if (source == IfxCif_JpeDebugSignalSources_R2BMemoryFull)
1561 {
1562 retValue = (IfxCif_JpeDebugSignalState)MODULE_CIF.JPE.DEBUG.B.DEB_R2B_MEMORY_FULL;
1563 }
1564 else if (source == IfxCif_JpeDebugSignalSources_VlcEncodeBusy)
1565 {
1566 retValue = (IfxCif_JpeDebugSignalState)MODULE_CIF.JPE.DEBUG.B.DEB_VLC_ENCODE_BUSY;
1567 }
1568 else if (source == IfxCif_JpeDebugSignalSources_QiqTableAccess)
1569 {
1570 retValue = (IfxCif_JpeDebugSignalState)MODULE_CIF.JPE.DEBUG.B.DEB_QIQ_TABLE_ACC;
1571 }
1572 else
1573 {
1574 IFXCIF_DEBUG;
1575 }
1576
1577 return retValue;
1578 }
1579
1580
1581 IfxCif_State IfxCif_getJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource)
1582 {
1583 IfxCif_State retValue = IfxCif_State_Disabled;
1584
1585 if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
1586 {
1587 retValue = (IfxCif_State)MODULE_CIF.JPE.ERROR_IMR.B.VLC_TABLE_ERR;
1588 }
1589 else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
1590 {
1591 retValue = (IfxCif_State)MODULE_CIF.JPE.ERROR_IMR.B.R2B_IMG_SIZE_ERR;
1592 }
1593 else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
1594 {
1595 retValue = (IfxCif_State)MODULE_CIF.JPE.ERROR_IMR.B.DCT_ERR;
1596 }
1597 else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
1598 {
1599 retValue = (IfxCif_State)MODULE_CIF.JPE.ERROR_IMR.B.VLC_SYMBOL_ERR;
1600 }
1601 else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
1602 {
1603 retValue = (IfxCif_State)MODULE_CIF.JPE.STATUS_IMR.B.GEN_HEADER_DONE;
1604 }
1605 else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
1606 {
1607 retValue = (IfxCif_State)MODULE_CIF.JPE.STATUS_IMR.B.ENCODE_DONE;
1608 }
1609 else
1610 {
1611 IFXCIF_DEBUG;
1612 }
1613
1614 return retValue;
1615 }
1616
1617
1618 IfxCif_JpeQTableSelector IfxCif_getJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component)
1619 {
1620 IfxCif_JpeQTableSelector retValue = IfxCif_JpeQTableSelector_Table0;
1621
1622 if (component == IfxCif_JpeQTableSelectorComponents_Y)
1623 {
1624 retValue = (IfxCif_JpeQTableSelector)MODULE_CIF.JPE.TQ_Y_SELECT.B.TQ0_SELECT;
1625 }
1626 else if (component == IfxCif_JpeQTableSelectorComponents_U)
1627 {
1628 retValue = (IfxCif_JpeQTableSelector)MODULE_CIF.JPE.TQ_U_SELECT.B.TQ1_SELECT;
1629 }
1630 else if (component == IfxCif_JpeQTableSelectorComponents_V)
1631 {
1632 retValue = (IfxCif_JpeQTableSelector)MODULE_CIF.JPE.TQ_V_SELECT.B.TQ2_SELECT;
1633 }
1634 else
1635 {
1636 IFXCIF_DEBUG;
1637 }
1638
1639 return retValue;
1640 }
1641
1642
1643 IfxCif_State IfxCif_getJpeScalingEnableState(IfxCif_JpeScalingValueSources source)
1644 {
1645 IfxCif_State retValue = IfxCif_State_Disabled;
1646
1647 if (source == IfxCif_JpeScalingValueSources_Y)
1648 {
1649 retValue = (IfxCif_State)MODULE_CIF.JPE.Y_SCALE_EN.B.Y_SCALE_EN;
1650 }
1651 else if (source == IfxCif_JpeScalingValueSources_CbCr)
1652 {
1653 retValue = (IfxCif_State)MODULE_CIF.JPE.CBCR_SCALE_EN.B.CBCR_SCALE_EN;
1654 }
1655 else
1656 {
1657 IFXCIF_DEBUG;
1658 }
1659
1660 return retValue;
1661 }
1662
1663
1664 uint16 IfxCif_getJpegCodecImageSize(IfxCif_ImageTiers tier)
1665 {
1666 uint16 retValue = 0xffff;
1667
1668 if (tier == IfxCif_ImageTiers_Horizontal)
1669 {
1670 retValue = MODULE_CIF.JPE.ENC_HSIZE.B.ENC_HSIZE;
1671 }
1672 else if (tier == IfxCif_ImageTiers_Vertical)
1673 {
1674 retValue = MODULE_CIF.JPE.ENC_VSIZE.B.ENC_VSIZE;
1675 }
1676 else
1677 {
1678 IFXCIF_DEBUG;
1679 }
1680
1681 return retValue;
1682 }
1683
1684
1685 IfxCif_State IfxCif_getKernelResetRequestState(void)
1686 {
1687 IfxCif_State retValue = IfxCif_State_Disabled;
1688
1689 if ((0 != MODULE_CIF.BBB.KRST0.B.RST) && (0 != MODULE_CIF.BBB.KRST1.B.RST))
1690 {
1691 retValue = IfxCif_State_Enabled;
1692 }
1693
1694 return retValue;
1695 }
1696
1697
1698 IfxCif_State IfxCif_getLinearDownscalerEnableState(IfxCif_ImageTiers tier)
1699 {
1700 IfxCif_State retValue = IfxCif_State_Disabled;
1701
1702 if (tier == IfxCif_ImageTiers_Horizontal)
1703 {
1704 retValue = (IfxCif_State)MODULE_CIF.LDS.CTRL.B.LDS_H_EN;
1705 }
1706 else if (tier == IfxCif_ImageTiers_Vertical)
1707 {
1708 retValue = (IfxCif_State)MODULE_CIF.LDS.CTRL.B.LDS_V_EN;
1709 }
1710 else
1711 {
1712 IFXCIF_DEBUG;
1713 }
1714
1715 return retValue;
1716 }
1717
1718
1719 uint8 IfxCif_getLinearDownscalerScalingFactor(IfxCif_ImageTiers tier)
1720 {
1721 uint8 retValue = 0xff;
1722
1723 if (tier == IfxCif_ImageTiers_Horizontal)
1724 {
1725 retValue = MODULE_CIF.LDS.FAC.B.LDS_H_FAC;
1726 }
1727 else if (tier == IfxCif_ImageTiers_Vertical)
1728 {
1729 retValue = MODULE_CIF.LDS.FAC.B.LDS_V_FAC;
1730 }
1731 else
1732 {
1733 IFXCIF_DEBUG;
1734 }
1735
1736 return retValue;
1737 }
1738
1739
1740 IfxCif_LinearDownscalerScalingMode IfxCif_getLinearDownscalerScalingMode(IfxCif_ImageTiers tier)
1741 {
1742 IfxCif_LinearDownscalerScalingMode retValue = IfxCif_LinearDownscalerScalingMode_SingleSkip;
1743
1744 if (tier == IfxCif_ImageTiers_Horizontal)
1745 {
1746 retValue = (IfxCif_LinearDownscalerScalingMode)MODULE_CIF.LDS.CTRL.B.LDS_H_MODE;
1747 }
1748 else if (tier == IfxCif_ImageTiers_Vertical)
1749 {
1750 retValue = (IfxCif_LinearDownscalerScalingMode)MODULE_CIF.LDS.CTRL.B.LDS_V_MODE;
1751 }
1752 else
1753 {
1754 IFXCIF_DEBUG;
1755 }
1756
1757 return retValue;
1758 }
1759
1760
1761 uint32 IfxCif_getMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component)
1762 {
1763 uint32 retValue = 0xffffffff;
1764
1765 /* read base address from unsigned component of the register structure because lower bits are tied to 0
1766 * as base address needs to be a word aligned value */
1767 if (component == IfxCif_MiMainPicturePathComponents_Y)
1768 {
1769 retValue = MODULE_CIF.MI.MP_Y_BASE_AD_INIT.U;
1770 }
1771 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
1772 {
1773 retValue = MODULE_CIF.MI.MP_CB_BASE_AD_INIT.U;
1774 }
1775 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
1776 {
1777 retValue = MODULE_CIF.MI.MP_CR_BASE_AD_INIT.U;
1778 }
1779 else
1780 {
1781 IFXCIF_DEBUG;
1782 }
1783
1784 return retValue;
1785 }
1786
1787
1788 IfxCif_InterruptTriggeredState IfxCif_getMaskedEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
1789 {
1790 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
1791
1792 if (5 > z)
1793 {
1794 if (0 !=
1795 (MODULE_CIF.MIEP.MIS.
1796 U & (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count))))
1797 {
1798 retValue = IfxCif_InterruptTriggeredState_Triggered;
1799 }
1800 else
1801 {}
1802 }
1803 else
1804 {
1805 IFXCIF_DEBUG;
1806 }
1807
1808 return retValue;
1809 }
1810
1811
1812 IfxCif_InterruptTriggeredState IfxCif_getMaskedIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource)
1813 {
1814 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
1815
1816 if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
1817 {
1818 if (0 != MODULE_CIF.ISP.MIS.B.MIS_WD_TRIG)
1819 {
1820 retValue = IfxCif_InterruptTriggeredState_Triggered;
1821 }
1822 }
1823 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
1824 {
1825 if (0 != MODULE_CIF.ISP.MIS.B.MIS_H_START)
1826 {
1827 retValue = IfxCif_InterruptTriggeredState_Triggered;
1828 }
1829 }
1830 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
1831 {
1832 if (0 != MODULE_CIF.ISP.MIS.B.MIS_V_START)
1833 {
1834 retValue = IfxCif_InterruptTriggeredState_Triggered;
1835 }
1836 }
1837 else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
1838 {
1839 if (0 != MODULE_CIF.ISP.MIS.B.MIS_FRAME_IN)
1840 {
1841 retValue = IfxCif_InterruptTriggeredState_Triggered;
1842 }
1843 }
1844 else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
1845 {
1846 if (0 != MODULE_CIF.ISP.MIS.B.MIS_PIC_SIZE_ERR)
1847 {
1848 retValue = IfxCif_InterruptTriggeredState_Triggered;
1849 }
1850 }
1851 else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
1852 {
1853 if (0 != MODULE_CIF.ISP.MIS.B.MIS_DATA_LOSS)
1854 {
1855 retValue = IfxCif_InterruptTriggeredState_Triggered;
1856 }
1857 }
1858 else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
1859 {
1860 if (0 != MODULE_CIF.ISP.MIS.B.MIS_FRAME)
1861 {
1862 retValue = IfxCif_InterruptTriggeredState_Triggered;
1863 }
1864 }
1865 else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
1866 {
1867 if (0 != MODULE_CIF.ISP.MIS.B.MIS_ISP_OFF)
1868 {
1869 retValue = IfxCif_InterruptTriggeredState_Triggered;
1870 }
1871 }
1872 else
1873 {
1874 IFXCIF_DEBUG;
1875 }
1876
1877 return retValue;
1878 }
1879
1880
1881 IfxCif_InterruptTriggeredState IfxCif_getMaskedJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource)
1882 {
1883 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
1884
1885 if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
1886 {
1887 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_MIS.B.VLC_TABLE_ERR;
1888 }
1889 else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
1890 {
1891 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_MIS.B.R2B_IMG_SIZE_ERR;
1892 }
1893 else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
1894 {
1895 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_MIS.B.DCT_ERR;
1896 }
1897 else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
1898 {
1899 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_MIS.B.VLC_SYMBOL_ERR;
1900 }
1901 else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
1902 {
1903 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.STATUS_MIS.B.GEN_HEADER_DONE;
1904 }
1905 else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
1906 {
1907 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.STATUS_MIS.B.ENCODE_DONE;
1908 }
1909 else
1910 {
1911 IFXCIF_DEBUG;
1912 }
1913
1914 return retValue;
1915 }
1916
1917
1918 IfxCif_InterruptTriggeredState IfxCif_getMaskedMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource)
1919 {
1920 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
1921
1922 if (interruptSource == IfxCif_MiInterruptSources_BusError)
1923 {
1924 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.BUS_ERROR;
1925 }
1926 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
1927 {
1928 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.WRAP_MP_CR;
1929 }
1930 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
1931 {
1932 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.WRAP_MP_CB;
1933 }
1934 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
1935 {
1936 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.WRAP_MP_Y;
1937 }
1938 else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
1939 {
1940 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.FILL_MP_Y;
1941 }
1942 else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
1943 {
1944 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.MBLK_LINE;
1945 }
1946 else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
1947 {
1948 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.MP_FRAME_END;
1949 }
1950 else
1951 {
1952 IFXCIF_DEBUG;
1953 }
1954
1955 return retValue;
1956 }
1957
1958
1959 IfxCif_InterruptTriggeredState IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
1960 {
1961 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
1962
1963 if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
1964 {
1965 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.MIS.B.MIS_WD_VES_TO;
1966 }
1967 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
1968 {
1969 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.MIS.B.MIS_WD_VSE_TO;
1970 }
1971 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
1972 {
1973 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.MIS.B.MIS_WD_HES_TO;
1974 }
1975 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
1976 {
1977 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.MIS.B.MIS_WD_HSE_TO;
1978 }
1979 else
1980 {
1981 IFXCIF_DEBUG;
1982 }
1983
1984 return retValue;
1985 }
1986
1987
1988 IfxCif_State IfxCif_getMiDataPathInputEnableState(IfxCif_MiDataPaths dataPath)
1989 {
1990 IfxCif_State retValue = IfxCif_State_Disabled;
1991
1992 if (dataPath == IfxCif_MiDataPaths_RawData)
1993 {
1994 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.RAW_ENABLE_IN;
1995 }
1996 else if (dataPath == IfxCif_MiDataPaths_JpegData)
1997 {
1998 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.JPEG_ENABLE_IN;
1999 }
2000 else if (dataPath == IfxCif_MiDataPaths_MainPictureData)
2001 {
2002 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.MP_ENABLE_IN;
2003 }
2004 else
2005 {
2006 IFXCIF_DEBUG;
2007 }
2008
2009 return retValue;
2010 }
2011
2012
2013 IfxCif_State IfxCif_getMiDataPathOutputEnableState(IfxCif_MiDataPaths dataPath)
2014 {
2015 IfxCif_State retValue = IfxCif_State_Disabled;
2016
2017 if (dataPath == IfxCif_MiDataPaths_RawData)
2018 {
2019 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.RAW_ENABLE_OUT;
2020 }
2021 else if (dataPath == IfxCif_MiDataPaths_JpegData)
2022 {
2023 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.JPEG_ENABLE_OUT;
2024 }
2025 else if (dataPath == IfxCif_MiDataPaths_MainPictureData)
2026 {
2027 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.MP_ENABLE_OUT;
2028 }
2029 else
2030 {
2031 IFXCIF_DEBUG;
2032 }
2033
2034 return retValue;
2035 }
2036
2037
2038 IfxCif_State IfxCif_getMiFeatureEnableState(IfxCif_MiDataPaths dataPath)
2039 {
2040 IfxCif_State retValue = IfxCif_State_Disabled;
2041
2042 if (dataPath == IfxCif_MiDataPaths_RawData)
2043 {
2044 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL.B.RAW_ENABLE;
2045 }
2046 else if (dataPath == IfxCif_MiDataPaths_JpegData)
2047 {
2048 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL.B.JPEG_ENABLE;
2049 }
2050 else if (dataPath == IfxCif_MiDataPaths_MainPictureData)
2051 {
2052 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL.B.MP_ENABLE;
2053 }
2054 else
2055 {
2056 IFXCIF_DEBUG;
2057 }
2058
2059 return retValue;
2060 }
2061
2062
2063 IfxCif_State IfxCif_getMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource)
2064 {
2065 IfxCif_State retValue = IfxCif_State_Disabled;
2066
2067 if (interruptSource == IfxCif_MiInterruptSources_BusError)
2068 {
2069 retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.BUS_ERROR;
2070 }
2071 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
2072 {
2073 retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.WRAP_MP_CR;
2074 }
2075 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
2076 {
2077 retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.WRAP_MP_CB;
2078 }
2079 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
2080 {
2081 retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.WRAP_MP_Y;
2082 }
2083 else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
2084 {
2085 retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.FILL_MP_Y;
2086 }
2087 else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
2088 {
2089 retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.MBLK_LINE;
2090 }
2091 else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
2092 {
2093 retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.MP_FRAME_END;
2094 }
2095 else
2096 {
2097 IFXCIF_DEBUG;
2098 }
2099
2100 return retValue;
2101 }
2102
2103
2104 uint32 IfxCif_getMiMainPictureComponentBaseAddress(IfxCif_MiMainPicturePathComponents component)
2105 {
2106 uint32 retValue = 0xffffffff;
2107
2108 if (component == IfxCif_MiMainPicturePathComponents_Y)
2109 {
2110 retValue = MODULE_CIF.MI.MP_Y_BASE_AD_SHD.B.MP_Y_BASE_AD;
2111 }
2112 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
2113 {
2114 retValue = MODULE_CIF.MI.MP_CB_BASE_AD_SHD.B.MP_CB_BASE_AD;
2115 }
2116 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
2117 {
2118 retValue = MODULE_CIF.MI.MP_CR_BASE_AD_SHD.B.MP_CR_BASE_AD;
2119 }
2120 else
2121 {
2122 IFXCIF_DEBUG;
2123 }
2124
2125 return retValue;
2126 }
2127
2128
2129 uint32 IfxCif_getMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component)
2130 {
2131 uint32 retValue = 0xffffffff;
2132
2133 /* read size from unsigned component of the register structure because lower bits are tied to 0
2134 * as size needs to be a word aligned value */
2135 if (component == IfxCif_MiMainPicturePathComponents_Y)
2136 {
2137 retValue = MODULE_CIF.MI.MP_Y_SIZE_INIT.U;
2138 }
2139 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
2140 {
2141 retValue = MODULE_CIF.MI.MP_CB_SIZE_INIT.U;
2142 }
2143 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
2144 {
2145 retValue = MODULE_CIF.MI.MP_CR_SIZE_INIT.U;
2146 }
2147 else
2148 {
2149 IFXCIF_DEBUG;
2150 }
2151
2152 return retValue;
2153 }
2154
2155
2156 uint32 IfxCif_getMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component)
2157 {
2158 uint32 retValue = 0xffffffff;
2159
2160 /* read offset counter from unsigned component of the register structure because lower bits are tied to 0
2161 * as offset counter needs to be a word aligned value */
2162 if (component == IfxCif_MiMainPicturePathComponents_Y)
2163 {
2164 retValue = MODULE_CIF.MI.MP_Y_OFFS_CNT_INIT.U;
2165 }
2166 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
2167 {
2168 retValue = MODULE_CIF.MI.MP_CB_OFFS_CNT_INIT.U;
2169 }
2170 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
2171 {
2172 retValue = MODULE_CIF.MI.MP_CR_OFFS_CNT_INIT.U;
2173 }
2174 else
2175 {
2176 IFXCIF_DEBUG;
2177 }
2178
2179 return retValue;
2180 }
2181
2182
2183 uint32 IfxCif_getMiMainPictureComponentOffsetCounter(IfxCif_MiMainPicturePathComponents component)
2184 {
2185 uint32 retValue = 0xffffffff;
2186
2187 if (component == IfxCif_MiMainPicturePathComponents_Y)
2188 {
2189 retValue = MODULE_CIF.MI.MP_Y_OFFS_CNT_SHD.B.MP_Y_OFFS_CNT;
2190 }
2191 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
2192 {
2193 retValue = MODULE_CIF.MI.MP_CB_OFFS_CNT_SHD.B.MP_CB_OFFS_CNT;
2194 }
2195 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
2196 {
2197 retValue = MODULE_CIF.MI.MP_CR_OFFS_CNT_SHD.B.MP_CR_OFFS_CNT;
2198 }
2199 else
2200 {
2201 IFXCIF_DEBUG;
2202 }
2203
2204 return retValue;
2205 }
2206
2207
2208 uint32 IfxCif_getMiMainPictureComponentOffsetCounterStart(IfxCif_MiMainPicturePathComponents component)
2209 {
2210 uint32 retValue = 0xffffffff;
2211
2212 /* read offset counter from unsigned component of the register structure because lower bits are tied to 0
2213 * as offset counter needs to be a word aligned value */
2214 if (component == IfxCif_MiMainPicturePathComponents_Y)
2215 {
2216 retValue = MODULE_CIF.MI.MP_Y_OFFS_CNT_START.U;
2217 }
2218 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
2219 {
2220 retValue = MODULE_CIF.MI.MP_CB_OFFS_CNT_START.U;
2221 }
2222 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
2223 {
2224 retValue = MODULE_CIF.MI.MP_CR_OFFS_CNT_START.U;
2225 }
2226 else
2227 {
2228 IFXCIF_DEBUG;
2229 }
2230
2231 return retValue;
2232 }
2233
2234
2235 uint32 IfxCif_getMiMainPictureComponentSize(IfxCif_MiMainPicturePathComponents component)
2236 {
2237 uint32 retValue = 0xffffffff;
2238
2239 if (component == IfxCif_MiMainPicturePathComponents_Y)
2240 {
2241 retValue = MODULE_CIF.MI.MP_Y_SIZE_SHD.B.MP_Y_SIZE;
2242 }
2243 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
2244 {
2245 retValue = MODULE_CIF.MI.MP_CB_SIZE_SHD.B.MP_CB_SIZE;
2246 }
2247 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
2248 {
2249 retValue = MODULE_CIF.MI.MP_CR_SIZE_SHD.B.MP_CR_SIZE;
2250 }
2251 else
2252 {
2253 IFXCIF_DEBUG;
2254 }
2255
2256 return retValue;
2257 }
2258
2259
2260 IfxCif_ErrorState IfxCif_getMiStatusInformation(IfxCif_MiStatusInformationSources source)
2261 {
2262 IfxCif_ErrorState retValue = IfxCif_ErrorState_NoError;
2263
2264 if (source == IfxCif_MiStatusInformationSources_BusWriteError)
2265 {
2266 retValue = (IfxCif_ErrorState)MODULE_CIF.MI.STATUS.B.BUS_WRITE_ERROR;
2267 }
2268 else if (source == IfxCif_MiStatusInformationSources_MainPictureCrFifoFull)
2269 {
2270 retValue = (IfxCif_ErrorState)MODULE_CIF.MI.STATUS.B.MP_CR_FIFO_FULL;
2271 }
2272 else if (source == IfxCif_MiStatusInformationSources_MainPictureCbFifoFull)
2273 {
2274 retValue = (IfxCif_ErrorState)MODULE_CIF.MI.STATUS.B.MP_CB_FIFO_FULL;
2275 }
2276 else if (source == IfxCif_MiStatusInformationSources_MainPictureYFifoFull)
2277 {
2278 retValue = (IfxCif_ErrorState)MODULE_CIF.MI.STATUS.B.MP_Y_FIFO_FULL;
2279 }
2280 else
2281 {
2282 IFXCIF_DEBUG;
2283 }
2284
2285 return retValue;
2286 }
2287
2288
2289 IfxCif_InterruptTriggeredState IfxCif_getRawEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
2290 {
2291 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
2292
2293 if (5 > z)
2294 {
2295 if (0 !=
2296 (MODULE_CIF.MIEP.RIS.
2297 U & (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count))))
2298 {
2299 retValue = IfxCif_InterruptTriggeredState_Triggered;
2300 }
2301 }
2302 else
2303 {
2304 IFXCIF_DEBUG;
2305 }
2306
2307 return retValue;
2308 }
2309
2310
2311 IfxCif_InterruptTriggeredState IfxCif_getRawIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource)
2312 {
2313 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
2314
2315 if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
2316 {
2317 if (0 != MODULE_CIF.ISP.RIS.B.RIS_WD_TRIG)
2318 {
2319 retValue = IfxCif_InterruptTriggeredState_Triggered;
2320 }
2321 }
2322 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
2323 {
2324 if (0 != MODULE_CIF.ISP.RIS.B.RIS_H_START)
2325 {
2326 retValue = IfxCif_InterruptTriggeredState_Triggered;
2327 }
2328 }
2329 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
2330 {
2331 if (0 != MODULE_CIF.ISP.RIS.B.RIS_V_START)
2332 {
2333 retValue = IfxCif_InterruptTriggeredState_Triggered;
2334 }
2335 }
2336 else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
2337 {
2338 if (0 != MODULE_CIF.ISP.RIS.B.RIS_FRAME_IN)
2339 {
2340 retValue = IfxCif_InterruptTriggeredState_Triggered;
2341 }
2342 }
2343 else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
2344 {
2345 if (0 != MODULE_CIF.ISP.RIS.B.RIS_PIC_SIZE_ERR)
2346 {
2347 retValue = IfxCif_InterruptTriggeredState_Triggered;
2348 }
2349 }
2350 else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
2351 {
2352 if (0 != MODULE_CIF.ISP.RIS.B.RIS_DATA_LOSS)
2353 {
2354 retValue = IfxCif_InterruptTriggeredState_Triggered;
2355 }
2356 }
2357 else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
2358 {
2359 if (0 != MODULE_CIF.ISP.RIS.B.RIS_FRAME)
2360 {
2361 retValue = IfxCif_InterruptTriggeredState_Triggered;
2362 }
2363 }
2364 else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
2365 {
2366 if (0 != MODULE_CIF.ISP.RIS.B.RIS_ISP_OFF)
2367 {
2368 retValue = IfxCif_InterruptTriggeredState_Triggered;
2369 }
2370 }
2371
2372 return retValue;
2373 }
2374
2375
2376 IfxCif_InterruptTriggeredState IfxCif_getRawJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource)
2377 {
2378 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
2379
2380 if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
2381 {
2382 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_RIS.B.VLC_TABLE_ERR;
2383 }
2384 else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
2385 {
2386 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_RIS.B.R2B_IMG_SIZE_ERR;
2387 }
2388 else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
2389 {
2390 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_RIS.B.DCT_ERR;
2391 }
2392 else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
2393 {
2394 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_RIS.B.VLC_SYMBOL_ERR;
2395 }
2396 else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
2397 {
2398 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.STATUS_RIS.B.GEN_HEADER_DONE;
2399 }
2400 else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
2401 {
2402 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.STATUS_RIS.B.ENCODE_DONE;
2403 }
2404 else
2405 {
2406 IFXCIF_DEBUG;
2407 }
2408
2409 return retValue;
2410 }
2411
2412
2413 IfxCif_InterruptTriggeredState IfxCif_getRawMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource)
2414 {
2415 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
2416
2417 if (interruptSource == IfxCif_MiInterruptSources_BusError)
2418 {
2419 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.BUS_ERROR;
2420 }
2421 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
2422 {
2423 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.WRAP_MP_CR;
2424 }
2425 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
2426 {
2427 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.WRAP_MP_CB;
2428 }
2429 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
2430 {
2431 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.WRAP_MP_Y;
2432 }
2433 else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
2434 {
2435 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.FILL_MP_Y;
2436 }
2437 else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
2438 {
2439 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.MBLK_LINE;
2440 }
2441 else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
2442 {
2443 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.MP_FRAME_END;
2444 }
2445 else
2446 {
2447 IFXCIF_DEBUG;
2448 }
2449
2450 return retValue;
2451 }
2452
2453
2454 IfxCif_InterruptTriggeredState IfxCif_getRawSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
2455 {
2456 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
2457
2458 if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
2459 {
2460 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.RIS.B.RIS_WD_VES_TO;
2461 }
2462 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
2463 {
2464 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.RIS.B.RIS_WD_VSE_TO;
2465 }
2466 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
2467 {
2468 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.RIS.B.RIS_WD_HES_TO;
2469 }
2470 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
2471 {
2472 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.RIS.B.RIS_WD_HSE_TO;
2473 }
2474 else
2475 {
2476 IFXCIF_DEBUG;
2477 }
2478
2479 return retValue;
2480 }
2481
2482
2483 IfxCif_State IfxCif_getSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
2484 {
2485 IfxCif_State retValue = IfxCif_State_Disabled;
2486
2487 if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
2488 {
2489 retValue = (IfxCif_State)MODULE_CIF.WD.IMSC.B.IMSC_WD_VES_TO;
2490 }
2491 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
2492 {
2493 retValue = (IfxCif_State)MODULE_CIF.WD.IMSC.B.IMSC_WD_VSE_TO;
2494 }
2495 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
2496 {
2497 retValue = (IfxCif_State)MODULE_CIF.WD.IMSC.B.IMSC_WD_HES_TO;
2498 }
2499 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
2500 {
2501 retValue = (IfxCif_State)MODULE_CIF.WD.IMSC.B.IMSC_WD_HSE_TO;
2502 }
2503 else
2504 {
2505 IFXCIF_DEBUG;
2506 }
2507
2508 return retValue;
2509 }
2510
2511
2512 uint16 IfxCif_getSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter)
2513 {
2514 uint16 retValue = 0xffff;
2515
2516 if (tier == IfxCif_ImageTiers_Horizontal)
2517 {
2518 if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_EndStart)
2519 {
2520 retValue = MODULE_CIF.WD.H_TIMEOUT.B.WD_HES_TO;
2521 }
2522 else if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_StartEnd)
2523 {
2524 retValue = MODULE_CIF.WD.H_TIMEOUT.B.WD_HSE_TO;
2525 }
2526 else
2527 {
2528 IFXCIF_DEBUG;
2529 }
2530 }
2531 else if (tier == IfxCif_ImageTiers_Vertical)
2532 {
2533 if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_EndStart)
2534 {
2535 retValue = MODULE_CIF.WD.V_TIMEOUT.B.WD_VES_TO;
2536 }
2537 else if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_StartEnd)
2538 {
2539 retValue = MODULE_CIF.WD.V_TIMEOUT.B.WD_VSE_TO;
2540 }
2541 else
2542 {
2543 IFXCIF_DEBUG;
2544 }
2545 }
2546 else
2547 {
2548 IFXCIF_DEBUG;
2549 }
2550
2551 return retValue;
2552 }
2553
2554
2555 IfxCif_State IfxCif_getSoftwareResetMode(IfxCif_Submodules submodule)
2556 {
2557 IfxCif_State retValue = IfxCif_State_Disabled;
2558
2559 if (submodule == IfxCif_Submodules_AllModules)
2560 {
2561 if (0 != MODULE_CIF.IRCL.B.CIF_GLOBAL_RST)
2562 {
2563 retValue = IfxCif_State_Enabled;
2564 }
2565 }
2566 else if (submodule == IfxCif_Submodules_Debug)
2567 {
2568 if (0 != MODULE_CIF.IRCL.B.CIF_DEBUG_PATH_RST)
2569 {
2570 retValue = IfxCif_State_Enabled;
2571 }
2572 }
2573 else if (submodule == IfxCif_Submodules_ExtraPaths)
2574 {
2575 if (0 != MODULE_CIF.IRCL.B.CIF_EXTRA_PATHS_RST)
2576 {
2577 retValue = IfxCif_State_Enabled;
2578 }
2579 }
2580 else if (submodule == IfxCif_Submodules_LinearDownscaler)
2581 {
2582 if (0 != MODULE_CIF.IRCL.B.CIF_LIN_DSCALER_RST)
2583 {
2584 retValue = IfxCif_State_Enabled;
2585 }
2586 }
2587 else if (submodule == IfxCif_Submodules_SecurityWatchdog)
2588 {
2589 if (0 != MODULE_CIF.IRCL.B.CIF_WATCHDOG_RST)
2590 {
2591 retValue = IfxCif_State_Enabled;
2592 }
2593 }
2594 else if (submodule == IfxCif_Submodules_MemoryInterface)
2595 {
2596 if (0 != MODULE_CIF.IRCL.B.CIF_MI_SOFT_RST)
2597 {
2598 retValue = IfxCif_State_Enabled;
2599 }
2600 }
2601 else if (submodule == IfxCif_Submodules_JpegEncoder)
2602 {
2603 if (0 != MODULE_CIF.IRCL.B.CIF_JPEG_SOFT_RST)
2604 {
2605 retValue = IfxCif_State_Enabled;
2606 }
2607 }
2608 else if (submodule == IfxCif_Submodules_ImageSignalProcessing)
2609 {
2610 if (0 != MODULE_CIF.IRCL.B.CIF_ISP_SOFT_RST)
2611 {
2612 retValue = IfxCif_State_Enabled;
2613 }
2614 }
2615 else if (submodule == IfxCif_Submodules_YCSplitter)
2616 {
2617 if (0 != MODULE_CIF.IRCL.B.CIF_YCS_SOFT_RST)
2618 {
2619 retValue = IfxCif_State_Enabled;
2620 }
2621 }
2622 else
2623 {
2624 IFXCIF_DEBUG;
2625 }
2626
2627 return retValue;
2628 }
2629
2630
2631 void IfxCif_programJpeTable(IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length)
2632 {
2633 uint16 i;
2634 boolean programTable = TRUE;
2635
2636 if ((tableId == IfxCif_JpeTableId_QTable0) || (tableId == IfxCif_JpeTableId_QTable1))
2637 {
2638 MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
2639 }
2640 else if (tableId == IfxCif_JpeTableId_VlcDcTable0)
2641 {
2642 MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
2643 IfxCif_setHuffmanDcTableLength(IfxCif_HuffmanTables_Table0, length);
2644 }
2645 else if (tableId == IfxCif_JpeTableId_VlcDcTable1)
2646 {
2647 MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
2648 IfxCif_setHuffmanDcTableLength(IfxCif_HuffmanTables_Table1, length);
2649 }
2650 else if (tableId == IfxCif_JpeTableId_VlcAcTable0)
2651 {
2652 MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
2653 IfxCif_setHuffmanAcTableLength(IfxCif_HuffmanTables_Table0, length);
2654 }
2655 else if (tableId == IfxCif_JpeTableId_VlcAcTable1)
2656 {
2657 MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
2658 IfxCif_setHuffmanAcTableLength(IfxCif_HuffmanTables_Table1, length);
2659 }
2660 else
2661 {
2662 IFXCIF_DEBUG;
2663 programTable = FALSE;
2664 }
2665
2666 if (programTable != FALSE)
2667 {
2668 for (i = 0; i < (length / 2); i++)
2669 {
2670 Ifx_CIF_JPE_TABLE_DATA data;
2671 data.B.TABLE_WDATA_H = tableEntry[i * 2 + 1];
2672 data.B.TABLE_WDATA_L = tableEntry[i * 2];
2673 MODULE_CIF.JPE.TABLE_DATA.U = data.U;
2674 }
2675 }
2676 }
2677
2678
2679 void IfxCif_resetModule(Ifx_CIF_BBB *cifBbb)
2680 {
2681 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2682
2683 IfxScuWdt_clearCpuEndinit(passwd);
2684 cifBbb->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
2685 cifBbb->KRST1.B.RST = 1;
2686 IfxScuWdt_setCpuEndinit(passwd);
2687
2688 while (0 == cifBbb->KRST0.B.RSTSTAT) /* Wait until reset is executed */
2689
2690 {}
2691
2692 IfxScuWdt_clearCpuEndinit(passwd);
2693 cifBbb->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
2694 IfxScuWdt_setCpuEndinit(passwd);
2695 }
2696
2697
2698 void IfxCif_resetSecurityWatchdogCounter(IfxCif_SecurityWatchdogCounters counter)
2699 {
2700 if (counter == IfxCif_SecurityWatchdogCounters_Predivider)
2701 {
2702 MODULE_CIF.WD.CTRL.B.RST_PD_CNT = 1;
2703 }
2704 else if (counter == IfxCif_SecurityWatchdogCounters_Vertical)
2705 {
2706 MODULE_CIF.WD.CTRL.B.RST_V_CNT = 1;
2707 }
2708 else if (counter == IfxCif_SecurityWatchdogCounters_Horizontal)
2709 {
2710 MODULE_CIF.WD.CTRL.B.RST_H_CNT = 1;
2711 }
2712 else
2713 {
2714 IFXCIF_DEBUG;
2715 }
2716 }
2717
2718
2719 void IfxCif_setDpControlEnableState(IfxCif_DpControlSources source, IfxCif_State enableState)
2720 {
2721 if (source == IfxCif_DpControlSources_UserDefinedSymbol8)
2722 {
2723 MODULE_CIF.DP.CTRL.B.UDS8 = enableState;
2724 }
2725 else if (source == IfxCif_DpControlSources_UserDefinedSymbol7)
2726 {
2727 MODULE_CIF.DP.CTRL.B.UDS7 = enableState;
2728 }
2729 else if (source == IfxCif_DpControlSources_UserDefinedSymbol6)
2730 {
2731 MODULE_CIF.DP.CTRL.B.UDS6 = enableState;
2732 }
2733 else if (source == IfxCif_DpControlSources_UserDefinedSymbol5)
2734 {
2735 MODULE_CIF.DP.CTRL.B.UDS5 = enableState;
2736 }
2737 else if (source == IfxCif_DpControlSources_UserDefinedSymbol4)
2738 {
2739 MODULE_CIF.DP.CTRL.B.UDS4 = enableState;
2740 }
2741 else if (source == IfxCif_DpControlSources_UserDefinedSymbol3)
2742 {
2743 MODULE_CIF.DP.CTRL.B.UDS3 = enableState;
2744 }
2745 else if (source == IfxCif_DpControlSources_UserDefinedSymbol2)
2746 {
2747 MODULE_CIF.DP.CTRL.B.UDS2 = enableState;
2748 }
2749 else if (source == IfxCif_DpControlSources_UserDefinedSymbol1)
2750 {
2751 MODULE_CIF.DP.CTRL.B.UDS1 = enableState;
2752 }
2753 else if (source == IfxCif_DpControlSources_TimestampCounter)
2754 {
2755 MODULE_CIF.DP.CTRL.B.TSC_EN = enableState;
2756 }
2757 else if (source == IfxCif_DpControlSources_LineNumberCounter)
2758 {
2759 MODULE_CIF.DP.CTRL.B.LNC_EN = enableState;
2760 }
2761 else if (source == IfxCif_DpControlSources_FrameNumberCounter)
2762 {
2763 MODULE_CIF.DP.CTRL.B.FNC_EN = enableState;
2764 }
2765 else
2766 {
2767 IFXCIF_DEBUG;
2768 }
2769 }
2770
2771
2772 void IfxCif_setDpCounter(IfxCif_DpCounters counter, uint32 counterValue)
2773 {
2774 // only the predivider counter can be set
2775 if (counter == IfxCif_DpCounters_PredividerCounter)
2776 {
2777 MODULE_CIF.DP.PDIV_CTRL.B.PDIV_VAL = counterValue;
2778 }
2779 else
2780 {
2781 IFXCIF_DEBUG;
2782 }
2783 }
2784
2785
2786 void IfxCif_setDpUserDefinedSymbol(uint8 x, uint16 value)
2787 {
2788 if (8 > x)
2789 {
2790 MODULE_CIF.DP.UDS_1S[x].B.UDS = value;
2791 }
2792 else
2793 {
2794 IFXCIF_DEBUG;
2795 }
2796 }
2797
2798
2799 void IfxCif_setEpBaseInitAddress(IfxCif_ExtraPath z, Ifx_AddressValue baseAddress)
2800 {
2801 if (5 > z)
2802 {
2803 /* write base address to unsigned component of the register structure because lower bits are tied to 0
2804 * as base address needs to be a word aligned value */
2805 MODULE_CIF.MIEP.CH_1S[z].BASE_AD_INIT.U = (uint32)baseAddress;
2806 }
2807 else
2808 {
2809 IFXCIF_DEBUG;
2810 }
2811 }
2812
2813
2814 void IfxCif_setEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
2815 {
2816 if (5 > z)
2817 {
2818 if (tier == IfxCif_ImageTiers_Horizontal)
2819 {
2820 MODULE_CIF.EP_IC_1S[z].DISPLACE.B.DX = displacement;
2821 }
2822 else if (tier == IfxCif_ImageTiers_Vertical)
2823 {
2824 MODULE_CIF.EP_IC_1S[z].DISPLACE.B.DY = displacement;
2825 }
2826 else
2827 {
2828 IFXCIF_DEBUG;
2829 }
2830 }
2831 else
2832 {
2833 IFXCIF_DEBUG;
2834 }
2835 }
2836
2837
2838 void IfxCif_setEpCroppingEnableState(IfxCif_ExtraPath z, uint32 enableState)
2839 {
2840 if (5 > z)
2841 {
2842 MODULE_CIF.EP_IC_1S[z].CTRL.B.IC_EN = enableState;
2843 }
2844 else
2845 {
2846 IFXCIF_DEBUG;
2847 }
2848 }
2849
2850
2851 void IfxCif_setEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
2852 {
2853 if (5 > z)
2854 {
2855 if (tier == IfxCif_ImageTiers_Horizontal)
2856 {
2857 MODULE_CIF.EP_IC_1S[z].MAX_DX.B.MAX_DX = displacement;
2858 }
2859 else if (tier == IfxCif_ImageTiers_Vertical)
2860 {
2861 MODULE_CIF.EP_IC_1S[z].MAX_DY.B.MAX_DY = displacement;
2862 }
2863 else
2864 {
2865 IFXCIF_DEBUG;
2866 }
2867 }
2868 else
2869 {
2870 IFXCIF_DEBUG;
2871 }
2872 }
2873
2874
2875 void IfxCif_setEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 offset)
2876 {
2877 if (5 > z)
2878 {
2879 if (tier == IfxCif_ImageTiers_Horizontal)
2880 {
2881 MODULE_CIF.EP_IC_1S[z].H_OFFS.B.H_OFFS = offset;
2882 }
2883 else if (tier == IfxCif_ImageTiers_Vertical)
2884 {
2885 MODULE_CIF.EP_IC_1S[z].V_OFFS.B.V_OFFS = offset;
2886 }
2887 else
2888 {
2889 IFXCIF_DEBUG;
2890 }
2891 }
2892 else
2893 {
2894 IFXCIF_DEBUG;
2895 }
2896 }
2897
2898
2899 void IfxCif_setEpCroppingOffsetsOutputWindow(IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset)
2900 {
2901 if (5 > z)
2902 {
2903 MODULE_CIF.EP_IC_1S[z].H_OFFS.B.H_OFFS = hOffset;
2904 MODULE_CIF.EP_IC_1S[z].V_OFFS.B.V_OFFS = vOffset;
2905 }
2906 else
2907 {
2908 IFXCIF_DEBUG;
2909 }
2910 }
2911
2912
2913 void IfxCif_setEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 size)
2914 {
2915 if (5 > z)
2916 {
2917 if (tier == IfxCif_ImageTiers_Horizontal)
2918 {
2919 MODULE_CIF.EP_IC_1S[z].H_SIZE.B.H_SIZE = size;
2920 }
2921 else if (tier == IfxCif_ImageTiers_Vertical)
2922 {
2923 MODULE_CIF.EP_IC_1S[z].V_SIZE.B.V_SIZE = size;
2924 }
2925 else
2926 {
2927 IFXCIF_DEBUG;
2928 }
2929 }
2930 else
2931 {
2932 IFXCIF_DEBUG;
2933 }
2934 }
2935
2936
2937 void IfxCif_setEpCroppingPictureSizes(IfxCif_ExtraPath z, uint16 hSize, uint16 vSize)
2938 {
2939 if (5 > z)
2940 {
2941 MODULE_CIF.EP_IC_1S[z].H_SIZE.B.H_SIZE = hSize;
2942 MODULE_CIF.EP_IC_1S[z].V_SIZE.B.V_SIZE = vSize;
2943 }
2944 else
2945 {
2946 IFXCIF_DEBUG;
2947 }
2948 }
2949
2950
2951 void IfxCif_setEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState)
2952 {
2953 if (5 > z)
2954 {
2955 if (feature == IfxCif_EpFeatures_InitOffsetCounter)
2956 {
2957 MODULE_CIF.MIEP.CH_1S[z].CTRL.B.INIT_OFFSET_EN = enableState;
2958 }
2959 else if (feature == IfxCif_EpFeatures_InitBaseAddress)
2960 {
2961 MODULE_CIF.MIEP.CH_1S[z].CTRL.B.INIT_BASE_EN = enableState;
2962 }
2963 else if (feature == IfxCif_EpFeatures_ByteSwap)
2964 {
2965 MODULE_CIF.MIEP.CH_1S[z].CTRL.B.BYTE_SWAP = enableState;
2966 }
2967 else if (feature == IfxCif_EpFeatures_PictureDataPath)
2968 {
2969 MODULE_CIF.MIEP.CH_1S[z].CTRL.B.EP_ENABLE = enableState;
2970 }
2971 else
2972 {
2973 IFXCIF_DEBUG;
2974 }
2975 }
2976 else
2977 {
2978 IFXCIF_DEBUG;
2979 }
2980 }
2981
2982
2983 void IfxCif_setEpInitSize(IfxCif_ExtraPath z, uint32 size)
2984 {
2985 if (5 > z)
2986 {
2987 /* write size to unsigned component of the register structure because lower bits are tied to 0
2988 * as size needs to be a word aligned value */
2989 MODULE_CIF.MIEP.CH_1S[z].SIZE_INIT.U = size;
2990 }
2991 else
2992 {
2993 IFXCIF_DEBUG;
2994 }
2995 }
2996
2997
2998 void IfxCif_setEpInitialFillLevelInterruptOffset(uint32 z, uint32 interruptOffset)
2999 {
3000 if (5 > z)
3001 {
3002 /* write interrupt offset to unsigned component of the register structure because lower bits are tied
3003 * to 0 as interrupt offset needs to be a word aligned value */
3004 MODULE_CIF.MIEP.CH_1S[z].IRQ_OFFS_INIT.U = interruptOffset;
3005 }
3006 else
3007 {
3008 IFXCIF_DEBUG;
3009 }
3010 }
3011
3012
3013 void IfxCif_setEpInitialOffsetCounter(IfxCif_ExtraPath z, uint32 offsetCounter)
3014 {
3015 if (5 > z)
3016 {
3017 /* write offset counter to unsigned component of the register structure because lower bits are tied
3018 * to 0 as offset counter needs to be a word aligned value */
3019 MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_INIT.U = offsetCounter;
3020 }
3021 else
3022 {
3023 IFXCIF_DEBUG;
3024 }
3025 }
3026
3027
3028 void IfxCif_setEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource, IfxCif_State interruptEnableState)
3029 {
3030 if (5 > z)
3031 {
3032 if (IfxCif_State_Enabled == interruptEnableState)
3033 {
3034 MODULE_CIF.MIEP.IMSC.U |=
3035 (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count));
3036 }
3037 else
3038 {
3039 MODULE_CIF.MIEP.IMSC.U &=
3040 ~(((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count));
3041 }
3042 }
3043 else
3044 {
3045 IFXCIF_DEBUG;
3046 }
3047 }
3048
3049
3050 void IfxCif_setEpInterruptRequestBit(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
3051 {
3052 if (5 > z)
3053 {
3054 MODULE_CIF.MIEP.ISR.U = (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count));
3055 }
3056 else
3057 {
3058 IFXCIF_DEBUG;
3059 }
3060 }
3061
3062
3063 void IfxCif_setEpOffsetCounterStart(uint32 z, uint32 offsetCounter)
3064 {
3065 if (5 > z)
3066 {
3067 /* write offset counter to unsigned component of the register structure because lower bits are tied
3068 * to 0 as offset counter needs to be a word aligned value */
3069 MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_START.U = offsetCounter;
3070 }
3071 else
3072 {
3073 IFXCIF_DEBUG;
3074 }
3075 }
3076
3077
3078 void IfxCif_setEpRecenterValue(IfxCif_ExtraPath z, uint8 value)
3079 {
3080 if (5 > z)
3081 {
3082 MODULE_CIF.EP_IC_1S[z].RECENTER.B.RECENTER = value;
3083 }
3084 else
3085 {
3086 IFXCIF_DEBUG;
3087 }
3088 }
3089
3090
3091 void IfxCif_setEpWriteFormat(IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat)
3092 {
3093 if (5 > z)
3094 {
3095 MODULE_CIF.MIEP.CH_1S[z].CTRL.B.EP_WRITE_FORMAT = writeFormat;
3096 }
3097 else
3098 {
3099 IFXCIF_DEBUG;
3100 }
3101 }
3102
3103
3104 void IfxCif_setHuffmanAcTableLength(IfxCif_HuffmanTables table, uint8 length)
3105 {
3106 if (table == IfxCif_HuffmanTables_Table0)
3107 {
3108 MODULE_CIF.JPE.TAC0_LEN.U = length; // 32-bit access is needed
3109 }
3110 else if (table == IfxCif_HuffmanTables_Table1)
3111 {
3112 MODULE_CIF.JPE.TAC1_LEN.U = length; // 32-bit access is needed
3113 }
3114 else
3115 {
3116 IFXCIF_DEBUG;
3117 }
3118 }
3119
3120
3121 void IfxCif_setHuffmanAcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
3122 {
3123 if (table == IfxCif_HuffmanTables_Table0)
3124 {
3125 MODULE_CIF.JPE.AC_TABLE_SELECT.B.AC_TABLE_SELECT &= ~(1 << component);
3126 }
3127 else if (table == IfxCif_HuffmanTables_Table1)
3128 {
3129 MODULE_CIF.JPE.AC_TABLE_SELECT.B.AC_TABLE_SELECT |= (1 << component);
3130 }
3131 else
3132 {
3133 IFXCIF_DEBUG;
3134 }
3135 }
3136
3137
3138 void IfxCif_setHuffmanDcTableLength(IfxCif_HuffmanTables table, uint8 length)
3139 {
3140 if (table == IfxCif_HuffmanTables_Table0)
3141 {
3142 MODULE_CIF.JPE.TDC0_LEN.U = length; // 32-bit access is needed
3143 }
3144 else if (table == IfxCif_HuffmanTables_Table1)
3145 {
3146 MODULE_CIF.JPE.TDC1_LEN.U = length; // 32-bit access is needed
3147 }
3148 else
3149 {
3150 IFXCIF_DEBUG;
3151 }
3152 }
3153
3154
3155 void IfxCif_setHuffmanDcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
3156 {
3157 if (table == IfxCif_HuffmanTables_Table0)
3158 {
3159 MODULE_CIF.JPE.DC_TABLE_SELECT.B.DC_TABLE_SELECT &= ~(1 << component);
3160 }
3161 else if (table == IfxCif_HuffmanTables_Table1)
3162 {
3163 MODULE_CIF.JPE.DC_TABLE_SELECT.B.DC_TABLE_SELECT |= (1 << component);
3164 }
3165 else
3166 {
3167 IFXCIF_DEBUG;
3168 }
3169 }
3170
3171
3172 void IfxCif_setInternalClockMode(IfxCif_Submodules submodule, IfxCif_State clockState)
3173 {
3174 Ifx_CIF_ICCL iccl = MODULE_CIF.ICCL;
3175
3176 if (submodule == IfxCif_Submodules_Debug)
3177 {
3178 iccl.B.CIF_DEBUG_PATH_CLK_EN = clockState;
3179 }
3180 else if (submodule == IfxCif_Submodules_ExtraPaths)
3181 {
3182 iccl.B.CIF_EXTRA_PATHS_CLK_ENABLE = clockState;
3183 }
3184 else if (submodule == IfxCif_Submodules_LinearDownscaler)
3185 {
3186 iccl.B.CIF_LIN_DSCALER_CLK_ENABLE = clockState;
3187 }
3188 else if (submodule == IfxCif_Submodules_SecurityWatchdog)
3189 {
3190 iccl.B.CIF_WATCHDOG_CLK_ENABLE = clockState;
3191 }
3192 else if (submodule == IfxCif_Submodules_MemoryInterface)
3193 {
3194 iccl.B.CIF_MI_CLK_ENABLE = clockState;
3195 }
3196 else if (submodule == IfxCif_Submodules_JpegEncoder)
3197 {
3198 iccl.B.CIF_JPEG_CLK_ENABLE = clockState;
3199 }
3200 else if (submodule == IfxCif_Submodules_ImageSignalProcessing)
3201 {
3202 iccl.B.CIF_ISP_CLK_ENABLE = clockState;
3203 }
3204 else
3205 {
3206 IFXCIF_DEBUG;
3207 }
3208
3209 MODULE_CIF.ICCL.U = iccl.U;
3210 }
3211
3212
3213 void IfxCif_setIspAcquisitionOffset(IfxCif_ImageTiers tier, uint16 offset)
3214 {
3215 if (tier == IfxCif_ImageTiers_Horizontal)
3216 {
3217 MODULE_CIF.ISP.ACQ_H_OFFS.B.ACQ_H_OFFS = offset;
3218 }
3219 else if (tier == IfxCif_ImageTiers_Vertical)
3220 {
3221 MODULE_CIF.ISP.ACQ_V_OFFS.B.ACQ_V_OFFS = offset;
3222 }
3223 else
3224 {
3225 IFXCIF_DEBUG;
3226 }
3227 }
3228
3229
3230 void IfxCif_setIspAcquisitionSize(IfxCif_ImageTiers tier, uint16 size)
3231 {
3232 if (tier == IfxCif_ImageTiers_Horizontal)
3233 {
3234 MODULE_CIF.ISP.ACQ_H_SIZE.B.ACQ_H_SIZE = size;
3235 }
3236 else if (tier == IfxCif_ImageTiers_Vertical)
3237 {
3238 MODULE_CIF.ISP.ACQ_V_SIZE.B.ACQ_V_SIZE = size;
3239 }
3240 else
3241 {
3242 IFXCIF_DEBUG;
3243 }
3244 }
3245
3246
3247 void IfxCif_setIspInputSelectionAppendState(IfxCif_State appendState)
3248 {
3249 /* CIF module has a NO append enable bit -> invert appendState */
3250 if (appendState == IfxCif_State_Enabled)
3251 {
3252 MODULE_CIF.ISP.ACQ_PROP.B.INPUT_SELECTION_NO_APP = 0;
3253 }
3254 else
3255 {
3256 MODULE_CIF.ISP.ACQ_PROP.B.INPUT_SELECTION_NO_APP = 1;
3257 }
3258 }
3259
3260
3261 void IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState)
3262 {
3263 if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
3264 {
3265 MODULE_CIF.ISP.IMSC.B.IMSC_WD_TRIG = interruptEnableState;
3266 }
3267 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
3268 {
3269 MODULE_CIF.ISP.IMSC.B.IMSC_H_START = interruptEnableState;
3270 }
3271 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
3272 {
3273 MODULE_CIF.ISP.IMSC.B.IMSC_V_START = interruptEnableState;
3274 }
3275 else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
3276 {
3277 MODULE_CIF.ISP.IMSC.B.IMSC_FRAME_IN = interruptEnableState;
3278 }
3279 else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
3280 {
3281 MODULE_CIF.ISP.IMSC.B.IMSC_PIC_SIZE_ERR = interruptEnableState;
3282 }
3283 else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
3284 {
3285 MODULE_CIF.ISP.IMSC.B.IMSC_DATA_LOSS = interruptEnableState;
3286 }
3287 else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
3288 {
3289 MODULE_CIF.ISP.IMSC.B.IMSC_FRAME = interruptEnableState;
3290 }
3291 else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
3292 {
3293 MODULE_CIF.ISP.IMSC.B.IMSC_ISP_OFF = interruptEnableState;
3294 }
3295 }
3296
3297
3298 void IfxCif_setIspInterruptRequestBit(IfxCif_IspInterruptSources interruptSource)
3299 {
3300 if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
3301 {
3302 MODULE_CIF.ISP.ISR.B.ISR_WD_TRIG = 1;
3303 }
3304 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
3305 {
3306 MODULE_CIF.ISP.ISR.B.ISR_H_START = 1;
3307 }
3308 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
3309 {
3310 MODULE_CIF.ISP.ISR.B.ISR_V_START = 1;
3311 }
3312 else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
3313 {
3314 MODULE_CIF.ISP.ISR.B.ISR_FRAME_IN = 1;
3315 }
3316 else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
3317 {
3318 MODULE_CIF.ISP.ISR.B.ISR_PIC_SIZE_ERR = 1;
3319 }
3320 else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
3321 {
3322 MODULE_CIF.ISP.ISR.B.ISR_DATA_LOSS = 1;
3323 }
3324 else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
3325 {
3326 MODULE_CIF.ISP.ISR.B.ISR_FRAME = 1;
3327 }
3328 else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
3329 {
3330 MODULE_CIF.ISP.ISR.B.ISR_ISP_OFF = 1;
3331 }
3332 }
3333
3334
3335 void IfxCif_setIspOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset)
3336 {
3337 if (tier == IfxCif_ImageTiers_Horizontal)
3338 {
3339 MODULE_CIF.ISP.OUT_H_OFFS.B.ISP_OUT_H_OFFS = offset;
3340 }
3341 else if (tier == IfxCif_ImageTiers_Vertical)
3342 {
3343 MODULE_CIF.ISP.OUT_V_OFFS.B.ISP_OUT_V_OFFS = offset;
3344 }
3345 else
3346 {
3347 IFXCIF_DEBUG;
3348 }
3349 }
3350
3351
3352 void IfxCif_setIspPictureSize(IfxCif_ImageTiers tier, uint16 pictureSize)
3353 {
3354 if (tier == IfxCif_ImageTiers_Horizontal)
3355 {
3356 MODULE_CIF.ISP.OUT_H_SIZE.B.ISP_OUT_H_SIZE = pictureSize;
3357 }
3358 else if (tier == IfxCif_ImageTiers_Vertical)
3359 {
3360 MODULE_CIF.ISP.OUT_V_SIZE.B.ISP_OUT_V_SIZE = pictureSize;
3361 }
3362 else
3363 {
3364 IFXCIF_DEBUG;
3365 }
3366 }
3367
3368
3369 void IfxCif_setIspisCameraDisplacement(uint16 tier, uint16 displacement)
3370 {
3371 if (tier == IfxCif_ImageTiers_Horizontal)
3372 {
3373 MODULE_CIF.ISPIS.DISPLACE.B.DX = displacement;
3374 }
3375 else if (tier == IfxCif_ImageTiers_Vertical)
3376 {
3377 MODULE_CIF.ISPIS.DISPLACE.B.DY = displacement;
3378 }
3379 else
3380 {
3381 IFXCIF_DEBUG;
3382 }
3383 }
3384
3385
3386 void IfxCif_setIspisMaximumDisplacement(IfxCif_ImageTiers tier, uint16 displacement)
3387 {
3388 if (tier == IfxCif_ImageTiers_Horizontal)
3389 {
3390 MODULE_CIF.ISPIS.MAX_DX.B.IS_MAX_DX = displacement;
3391 }
3392 else if (tier == IfxCif_ImageTiers_Vertical)
3393 {
3394 MODULE_CIF.ISPIS.MAX_DY.B.IS_MAX_DY = displacement;
3395 }
3396 else
3397 {
3398 IFXCIF_DEBUG;
3399 }
3400 }
3401
3402
3403 void IfxCif_setIspisOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset)
3404 {
3405 if (tier == IfxCif_ImageTiers_Horizontal)
3406 {
3407 MODULE_CIF.ISPIS.H_OFFS.B.IS_H_OFFS = offset;
3408 }
3409 else if (tier == IfxCif_ImageTiers_Vertical)
3410 {
3411 MODULE_CIF.ISPIS.V_OFFS.B.IS_V_OFFS = offset;
3412 }
3413 else
3414 {
3415 IFXCIF_DEBUG;
3416 }
3417 }
3418
3419
3420 void IfxCif_setIspisPictureSize(IfxCif_ImageTiers tier, uint16 size)
3421 {
3422 if (tier == IfxCif_ImageTiers_Horizontal)
3423 {
3424 MODULE_CIF.ISPIS.H_SIZE.B.IS_H_SIZE = size;
3425 }
3426 else if (tier == IfxCif_ImageTiers_Vertical)
3427 {
3428 MODULE_CIF.ISPIS.V_SIZE.B.IS_V_SIZE = size;
3429 }
3430 else
3431 {
3432 IFXCIF_DEBUG;
3433 }
3434 }
3435
3436
3437 void IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState)
3438 {
3439 if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
3440 {
3441 MODULE_CIF.JPE.ERROR_IMR.B.VLC_TABLE_ERR = interruptEnableState;
3442 }
3443 else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
3444 {
3445 MODULE_CIF.JPE.ERROR_IMR.B.R2B_IMG_SIZE_ERR = interruptEnableState;
3446 }
3447 else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
3448 {
3449 MODULE_CIF.JPE.ERROR_IMR.B.DCT_ERR = interruptEnableState;
3450 }
3451 else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
3452 {
3453 MODULE_CIF.JPE.ERROR_IMR.B.VLC_SYMBOL_ERR = interruptEnableState;
3454 }
3455 else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
3456 {
3457 MODULE_CIF.JPE.STATUS_IMR.B.GEN_HEADER_DONE = interruptEnableState;
3458 }
3459 else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
3460 {
3461 MODULE_CIF.JPE.STATUS_IMR.B.ENCODE_DONE = interruptEnableState;
3462 }
3463 else
3464 {
3465 IFXCIF_DEBUG;
3466 }
3467 }
3468
3469
3470 void IfxCif_setJpeInterruptRequestBit(IfxCif_JpeInterruptSources interruptSource)
3471 {
3472 if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
3473 {
3474 MODULE_CIF.JPE.ERROR_ICR.B.VLC_TABLE_ERR = 1;
3475 }
3476 else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
3477 {
3478 MODULE_CIF.JPE.ERROR_ICR.B.R2B_IMG_SIZE_ERR = 1;
3479 }
3480 else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
3481 {
3482 MODULE_CIF.JPE.ERROR_ICR.B.DCT_ERR = 1;
3483 }
3484 else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
3485 {
3486 MODULE_CIF.JPE.ERROR_ICR.B.VLC_SYMBOL_ERR = 1;
3487 }
3488 else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
3489 {
3490 MODULE_CIF.JPE.STATUS_ICR.B.GEN_HEADER_DONE = 1;
3491 }
3492 else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
3493 {
3494 MODULE_CIF.JPE.STATUS_ICR.B.ENCODE_DONE = 1;
3495 }
3496 else
3497 {
3498 IFXCIF_DEBUG;
3499 }
3500 }
3501
3502
3503 void IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector)
3504 {
3505 if (component == IfxCif_JpeQTableSelectorComponents_Y)
3506 {
3507 MODULE_CIF.JPE.TQ_Y_SELECT.B.TQ0_SELECT = selector;
3508 }
3509 else if (component == IfxCif_JpeQTableSelectorComponents_U)
3510 {
3511 MODULE_CIF.JPE.TQ_U_SELECT.B.TQ1_SELECT = selector;
3512 }
3513 else if (component == IfxCif_JpeQTableSelectorComponents_V)
3514 {
3515 MODULE_CIF.JPE.TQ_V_SELECT.B.TQ2_SELECT = selector;
3516 }
3517 else
3518 {
3519 IFXCIF_DEBUG;
3520 }
3521 }
3522
3523
3524 void IfxCif_setJpeScalingEnableState(IfxCif_JpeScalingValueSources source, IfxCif_State scalingEnable)
3525 {
3526 if (source == IfxCif_JpeScalingValueSources_Y)
3527 {
3528 MODULE_CIF.JPE.Y_SCALE_EN.B.Y_SCALE_EN = scalingEnable;
3529 }
3530 else if (source == IfxCif_JpeScalingValueSources_CbCr)
3531 {
3532 MODULE_CIF.JPE.CBCR_SCALE_EN.B.CBCR_SCALE_EN = scalingEnable;
3533 }
3534 else
3535 {
3536 IFXCIF_DEBUG;
3537 }
3538 }
3539
3540
3541 void IfxCif_setJpegCodecImageSize(IfxCif_ImageTiers tier, uint16 size)
3542 {
3543 if (tier == IfxCif_ImageTiers_Horizontal)
3544 {
3545 MODULE_CIF.JPE.ENC_HSIZE.B.ENC_HSIZE = size;
3546 }
3547 else if (tier == IfxCif_ImageTiers_Vertical)
3548 {
3549 MODULE_CIF.JPE.ENC_VSIZE.B.ENC_VSIZE = size;
3550 }
3551 else
3552 {
3553 IFXCIF_DEBUG;
3554 }
3555 }
3556
3557
3558 void IfxCif_setLinearDownscalerEnableState(IfxCif_ImageTiers tier, IfxCif_State enableState)
3559 {
3560 Ifx_CIF_LDS_CTRL ldsCtrl = MODULE_CIF.LDS.CTRL;
3561
3562 if (tier == IfxCif_ImageTiers_Horizontal)
3563 {
3564 ldsCtrl.B.LDS_H_EN = enableState;
3565 }
3566 else if (tier == IfxCif_ImageTiers_Vertical)
3567 {
3568 ldsCtrl.B.LDS_V_EN = enableState;
3569 }
3570 else
3571 {
3572 IFXCIF_DEBUG;
3573 }
3574
3575 MODULE_CIF.LDS.CTRL.U = ldsCtrl.U;
3576 }
3577
3578
3579 void IfxCif_setLinearDownscalerScalingFactor(IfxCif_ImageTiers tier, uint8 factor)
3580 {
3581 Ifx_CIF_LDS_FAC ldsFac = MODULE_CIF.LDS.FAC;
3582
3583 if (tier == IfxCif_ImageTiers_Horizontal)
3584 {
3585 ldsFac.B.LDS_H_FAC = factor;
3586 }
3587 else if (tier == IfxCif_ImageTiers_Vertical)
3588 {
3589 ldsFac.B.LDS_V_FAC = factor;
3590 }
3591 else
3592 {
3593 IFXCIF_DEBUG;
3594 }
3595
3596 MODULE_CIF.LDS.FAC.U = ldsFac.U;
3597 }
3598
3599
3600 void IfxCif_setLinearDownscalerScalingFactors(uint8 horizFactor, uint8 vertFactor)
3601 {
3602 Ifx_CIF_LDS_FAC ldsFac = MODULE_CIF.LDS.FAC;
3603
3604 ldsFac.B.LDS_H_FAC = horizFactor;
3605 ldsFac.B.LDS_V_FAC = vertFactor;
3606 MODULE_CIF.LDS.FAC.U = ldsFac.U;
3607 }
3608
3609
3610 void IfxCif_setLinearDownscalerScalingMode(IfxCif_ImageTiers tier, IfxCif_LinearDownscalerScalingMode mode)
3611 {
3612 Ifx_CIF_LDS_CTRL ldsCtrl = MODULE_CIF.LDS.CTRL;
3613
3614 if (tier == IfxCif_ImageTiers_Horizontal)
3615 {
3616 ldsCtrl.B.LDS_H_MODE = mode;
3617 }
3618 else if (tier == IfxCif_ImageTiers_Vertical)
3619 {
3620 ldsCtrl.B.LDS_V_MODE = mode;
3621 }
3622 else
3623 {
3624 IFXCIF_DEBUG;
3625 }
3626
3627 MODULE_CIF.LDS.CTRL.U = ldsCtrl.U;
3628 }
3629
3630
3631 void IfxCif_setLinearDownscalerScalingModes(IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode)
3632 {
3633 Ifx_CIF_LDS_CTRL ldsCtrl = MODULE_CIF.LDS.CTRL;
3634
3635 ldsCtrl.B.LDS_H_EN = (horizMode != IfxCif_LinearDownscalerScalingMode_Disabled);
3636 ldsCtrl.B.LDS_V_EN = (vertMode != IfxCif_LinearDownscalerScalingMode_Disabled);
3637 ldsCtrl.B.LDS_H_MODE = horizMode;
3638 ldsCtrl.B.LDS_V_MODE = vertMode;
3639 MODULE_CIF.LDS.CTRL.U = ldsCtrl.U;
3640 }
3641
3642
3643 void IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths dataPath, IfxCif_State enableState)
3644 {
3645 if (dataPath == IfxCif_MiDataPaths_RawData)
3646 {
3647 MODULE_CIF.MI.CTRL.B.RAW_ENABLE = enableState;
3648 }
3649 else if (dataPath == IfxCif_MiDataPaths_JpegData)
3650 {
3651 MODULE_CIF.MI.CTRL.B.JPEG_ENABLE = enableState;
3652 }
3653 else if (dataPath == IfxCif_MiDataPaths_MainPictureData)
3654 {
3655 MODULE_CIF.MI.CTRL.B.MP_ENABLE = enableState;
3656 }
3657 else
3658 {
3659 IFXCIF_DEBUG;
3660 }
3661 }
3662
3663
3664 void IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState)
3665 {
3666 if (interruptSource == IfxCif_MiInterruptSources_BusError)
3667 {
3668 MODULE_CIF.MI.IMSC.B.BUS_ERROR = interruptEnableState;
3669 }
3670 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
3671 {
3672 MODULE_CIF.MI.IMSC.B.WRAP_MP_CR = interruptEnableState;
3673 }
3674 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
3675 {
3676 MODULE_CIF.MI.IMSC.B.WRAP_MP_CB = interruptEnableState;
3677 }
3678 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
3679 {
3680 MODULE_CIF.MI.IMSC.B.WRAP_MP_Y = interruptEnableState;
3681 }
3682 else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
3683 {
3684 MODULE_CIF.MI.IMSC.B.FILL_MP_Y = interruptEnableState;
3685 }
3686 else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
3687 {
3688 MODULE_CIF.MI.IMSC.B.MBLK_LINE = interruptEnableState;
3689 }
3690 else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
3691 {
3692 MODULE_CIF.MI.IMSC.B.MP_FRAME_END = interruptEnableState;
3693 }
3694 else
3695 {
3696 IFXCIF_DEBUG;
3697 }
3698 }
3699
3700
3701 void IfxCif_setMiInterruptRequestBit(IfxCif_MiInterruptSources interruptSource)
3702 {
3703 if (interruptSource == IfxCif_MiInterruptSources_BusError)
3704 {
3705 MODULE_CIF.MI.ISR.B.Bus_ERROR = 1;
3706 }
3707 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
3708 {
3709 MODULE_CIF.MI.ISR.B.WRAP_MP_CR = 1;
3710 }
3711 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
3712 {
3713 MODULE_CIF.MI.ISR.B.WRAP_MP_CB = 1;
3714 }
3715 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
3716 {
3717 MODULE_CIF.MI.ISR.B.WRAP_MP_Y = 1;
3718 }
3719 else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
3720 {
3721 MODULE_CIF.MI.ISR.B.FILL_MP_Y = 1;
3722 }
3723 else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
3724 {
3725 MODULE_CIF.MI.ISR.B.MBLK_LINE = 1;
3726 }
3727 else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
3728 {
3729 MODULE_CIF.MI.ISR.B.MP_FRAME_END = 1;
3730 }
3731 else
3732 {
3733 IFXCIF_DEBUG;
3734 }
3735 }
3736
3737
3738 void IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength burstLength)
3739 {
3740 MODULE_CIF.MI.CTRL.B.BURST_LEN_LUM = burstLength;
3741 }
3742
3743
3744 void IfxCif_setMiMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address)
3745 {
3746 uint32 baseAddress = (uint32)address;
3747
3748 /* write base address to unsigned component of the register structure because lower bits are tied to 0
3749 * as base address needs to be a word aligned value */
3750 if (component == IfxCif_MiMainPicturePathComponents_Y)
3751 {
3752 MODULE_CIF.MI.MP_Y_BASE_AD_INIT.U = baseAddress;
3753 }
3754 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
3755 {
3756 MODULE_CIF.MI.MP_CB_BASE_AD_INIT.U = baseAddress;
3757 }
3758 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
3759 {
3760 MODULE_CIF.MI.MP_CR_BASE_AD_INIT.U = baseAddress;
3761 }
3762 else
3763 {
3764 IFXCIF_DEBUG;
3765 }
3766 }
3767
3768
3769 void IfxCif_setMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component, uint32 size)
3770 {
3771 /* write size to unsigned component of the register structure because lower bits are tied to 0
3772 * as size needs to be a word aligned value */
3773 if (component == IfxCif_MiMainPicturePathComponents_Y)
3774 {
3775 MODULE_CIF.MI.MP_Y_SIZE_INIT.U = size;
3776 }
3777 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
3778 {
3779 MODULE_CIF.MI.MP_CB_SIZE_INIT.U = size;
3780 }
3781 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
3782 {
3783 MODULE_CIF.MI.MP_CR_SIZE_INIT.U = size;
3784 }
3785 else
3786 {
3787 IFXCIF_DEBUG;
3788 }
3789 }
3790
3791
3792 void IfxCif_setMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component, uint32 offsetCounter)
3793 {
3794 /* write offset counter to unsigned component of the register structure because lower bits are tied to 0
3795 * as offset counter needs to be a word aligned value */
3796 if (component == IfxCif_MiMainPicturePathComponents_Y)
3797 {
3798 MODULE_CIF.MI.MP_Y_OFFS_CNT_INIT.U = offsetCounter;
3799 }
3800 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
3801 {
3802 MODULE_CIF.MI.MP_CB_OFFS_CNT_INIT.U = offsetCounter;
3803 }
3804 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
3805 {
3806 MODULE_CIF.MI.MP_CR_OFFS_CNT_INIT.U = offsetCounter;
3807 }
3808 else
3809 {
3810 IFXCIF_DEBUG;
3811 }
3812 }
3813
3814
3815 void IfxCif_setModuleStateRequest(IfxCif_State state)
3816 {
3817 uint16 l_TempVar = IfxScuWdt_getCpuWatchdogPassword();
3818 IfxScuWdt_clearCpuEndinit(l_TempVar);
3819
3820 /* bit is inverted */
3821 MODULE_CIF.BBB.CLC.B.DISR = (IfxCif_State_Enabled == state) ? 0 : 1;
3822
3823 while (MODULE_CIF.BBB.CLC.B.DISS == (IfxCif_State_Enabled == state) ? 1 : 0)
3824 {}
3825
3826 IfxScuWdt_setCpuEndinit(l_TempVar);
3827 }
3828
3829
3830 void IfxCif_setSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource, IfxCif_State interruptEnableState)
3831 {
3832 if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
3833 {
3834 MODULE_CIF.WD.IMSC.B.IMSC_WD_VES_TO = interruptEnableState;
3835 }
3836 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
3837 {
3838 MODULE_CIF.WD.IMSC.B.IMSC_WD_VSE_TO = interruptEnableState;
3839 }
3840 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
3841 {
3842 MODULE_CIF.WD.IMSC.B.IMSC_WD_HES_TO = interruptEnableState;
3843 }
3844 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
3845 {
3846 MODULE_CIF.WD.IMSC.B.IMSC_WD_HSE_TO = interruptEnableState;
3847 }
3848 else
3849 {
3850 IFXCIF_DEBUG;
3851 }
3852 }
3853
3854
3855 void IfxCif_setSecurityWatchdogInterruptRequestBit(IfxCif_SecurityWatchdogInterruptSources interruptSource)
3856 {
3857 if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
3858 {
3859 MODULE_CIF.WD.ISR.B.ISR_WD_VES_TO = 1;
3860 }
3861 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
3862 {
3863 MODULE_CIF.WD.ISR.B.ISR_WD_VSE_TO = 1;
3864 }
3865 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
3866 {
3867 MODULE_CIF.WD.ISR.B.ISR_WD_HES_TO = 1;
3868 }
3869 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
3870 {
3871 MODULE_CIF.WD.ISR.B.ISR_WD_HSE_TO = 1;
3872 }
3873 else
3874 {
3875 IFXCIF_DEBUG;
3876 }
3877 }
3878
3879
3880 void IfxCif_setSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter, uint16 timeout)
3881 {
3882 if (tier == IfxCif_ImageTiers_Horizontal)
3883 {
3884 if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_EndStart)
3885 {
3886 MODULE_CIF.WD.H_TIMEOUT.B.WD_HES_TO = timeout;
3887 }
3888 else if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_StartEnd)
3889 {
3890 MODULE_CIF.WD.H_TIMEOUT.B.WD_HSE_TO = timeout;
3891 }
3892 else
3893 {
3894 IFXCIF_DEBUG;
3895 }
3896 }
3897 else if (tier == IfxCif_ImageTiers_Vertical)
3898 {
3899 if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_EndStart)
3900 {
3901 MODULE_CIF.WD.V_TIMEOUT.B.WD_VES_TO = timeout;
3902 }
3903 else if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_StartEnd)
3904 {
3905 MODULE_CIF.WD.V_TIMEOUT.B.WD_VSE_TO = timeout;
3906 }
3907 else
3908 {
3909 IFXCIF_DEBUG;
3910 }
3911 }
3912 else
3913 {
3914 IFXCIF_DEBUG;
3915 }
3916 }
3917
3918
3919 void IfxCif_setSoftwareResetMode(IfxCif_Submodules submodule, IfxCif_State resetMode)
3920 {
3921 if (submodule == IfxCif_Submodules_AllModules)
3922 {
3923 MODULE_CIF.IRCL.B.CIF_GLOBAL_RST = resetMode;
3924 }
3925 else if (submodule == IfxCif_Submodules_Debug)
3926 {
3927 MODULE_CIF.IRCL.B.CIF_DEBUG_PATH_RST = resetMode;
3928 }
3929 else if (submodule == IfxCif_Submodules_ExtraPaths)
3930 {
3931 MODULE_CIF.IRCL.B.CIF_EXTRA_PATHS_RST = resetMode;
3932 }
3933 else if (submodule == IfxCif_Submodules_LinearDownscaler)
3934 {
3935 MODULE_CIF.IRCL.B.CIF_LIN_DSCALER_RST = resetMode;
3936 }
3937 else if (submodule == IfxCif_Submodules_SecurityWatchdog)
3938 {
3939 MODULE_CIF.IRCL.B.CIF_WATCHDOG_RST = resetMode;
3940 }
3941 else if (submodule == IfxCif_Submodules_MemoryInterface)
3942 {
3943 MODULE_CIF.IRCL.B.CIF_MI_SOFT_RST = resetMode;
3944 }
3945 else if (submodule == IfxCif_Submodules_JpegEncoder)
3946 {
3947 MODULE_CIF.IRCL.B.CIF_JPEG_SOFT_RST = resetMode;
3948 }
3949 else if (submodule == IfxCif_Submodules_ImageSignalProcessing)
3950 {
3951 MODULE_CIF.IRCL.B.CIF_ISP_SOFT_RST = resetMode;
3952 }
3953 else if (submodule == IfxCif_Submodules_YCSplitter)
3954 {
3955 MODULE_CIF.IRCL.B.CIF_YCS_SOFT_RST = resetMode;
3956 }
3957 else
3958 {
3959 IFXCIF_DEBUG;
3960 }
3961 }
IFXCIF_DEBUG
#define IFXCIF_DEBUG
Definition: IfxCif_cfg.h:63
IfxCif_getMiDataPathInputEnableState
IfxCif_State IfxCif_getMiDataPathInputEnableState(IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface input...
Definition: IfxCif.c:1988
IfxCif_getRawEpInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getRawEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the raw state of an interrupt.
Definition: IfxCif.c:2289
IfxCif_InterruptTriggeredState
IfxCif_InterruptTriggeredState
Enumerator for the state of an interrupt.
Definition: IfxCif.h:143
IfxCif_JpeTableId_VlcDcTable0
VLC DC Table 0.
Definition: IfxCif.h:502
IfxCif_setEpBaseInitAddress
void IfxCif_setEpBaseInitAddress(IfxCif_ExtraPath z, Ifx_AddressValue baseAddress)
Function to set the initial base address of the ring buffer of one extra path.
Definition: IfxCif.c:2799
IfxCif_getEpCroppingOffsetOutputWindow
uint16 IfxCif_getEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping offset of the output window of one tier of one extra path...
Definition: IfxCif.c:661
IfxCif_getEpFeatureEnableState
IfxCif_State IfxCif_getEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature)
Function to query the enabled state of one feature of one extra path.
Definition: IfxCif.c:790
IfxCif_getHuffmanAcTableLength
uint8 IfxCif_getHuffmanAcTableLength(IfxCif_HuffmanTables table)
Function to query the currently set Huffman Table length for AC values.
Definition: IfxCif.c:1050
IfxCif.h
CIF basic functionality.
IfxCif_EpWriteFormat
IfxCif_EpWriteFormat
Enumerator for write formats of extra paths.
Definition: IfxCif.h:610
IfxCif_DpCounters_FrameNumberCounter
Frame number counter.
Definition: IfxCif.h:646
IfxCif_MiInterruptSources_WrapMainPictureCb
Main picture Cb address wrap interrupt.
Definition: IfxCif.h:341
IfxCif_HuffmanTables_Table0
Huffman Table 0.
Definition: IfxCif.h:408
IfxCif_MiStatusClearSources_MainPictureCrFifoFull
Cr FIFO full flag in main path.
Definition: IfxCif.h:376
IfxCif_setEpCroppingPictureSizes
void IfxCif_setEpCroppingPictureSizes(IfxCif_ExtraPath z, uint16 hSize, uint16 vSize)
Function to set the image cropping picture sizes one extra path.
Definition: IfxCif.c:2937
IfxCif_MiMainPicturePathComponents
IfxCif_MiMainPicturePathComponents
Enumerator for main picture path components of the memory interface.
Definition: IfxCif.h:350
IfxCif_getJpeDebugSignalState
IfxCif_JpeDebugSignalState IfxCif_getJpeDebugSignalState(IfxCif_JpeDebugSignalSources source)
Function to query the state of one JPE debug signal source.
Definition: IfxCif.c:1548
IfxCif_getEpInterruptEnableState
IfxCif_State IfxCif_getEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:901
IfxCif_DpControlSources_UserDefinedSymbol4
ser defined symbol 4
Definition: IfxCif.h:630
IfxCif_getIspPictureSize
uint16 IfxCif_getIspPictureSize(IfxCif_ImageTiers tier)
Function to query the currently set ISP picture size of one tier.
Definition: IfxCif.c:1388
IfxCif_getMiMainPictureComponentInitialOffsetCounter
uint32 IfxCif_getMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component)
Function to query the initial offset counter inside the ring buffer of one main picture path compoent...
Definition: IfxCif.c:2156
IfxCif_JpeInterruptSources_R2BImageSizeError
R2B image size error.
Definition: IfxCif.h:452
IfxCif_JpeInterruptSources_VlcSymbolError
VLC symbol error.
Definition: IfxCif.h:454
IfxCif_setDpControlEnableState
void IfxCif_setDpControlEnableState(IfxCif_DpControlSources source, IfxCif_State enableState)
Function to enable or disable transmission of one debug path control source.
Definition: IfxCif.c:2719
IfxCif_EpErrorClearSources
IfxCif_EpErrorClearSources
Enumerator for error sources that can be cleared in the extra paths registers.
Definition: IfxCif.h:562
IfxCif_MiInterruptSources_BusError
Bus write or read error interrupt (from handshake target interfaces)
Definition: IfxCif.h:339
IfxCif_getInternalClockMode
IfxCif_State IfxCif_getInternalClockMode(IfxCif_Submodules submodule)
Function to query the clock state of a submodule.
Definition: IfxCif.c:1146
IfxCif_epSkipPicture
void IfxCif_epSkipPicture(IfxCif_ExtraPath z)
Function to skip one picture of one extra path.
Definition: IfxCif.c:333
IfxCif_ImageTiers_Horizontal
Horizontal tier.
Definition: IfxCif.h:130
IfxCif_DpCounters_LineNumberCounter
Line number counter.
Definition: IfxCif.h:645
IfxCif_SecurityWatchdogCounters_Predivider
Predivider counter.
Definition: IfxCif.h:533
IfxCif_getMiMainPictureComponentSize
uint32 IfxCif_getMiMainPictureComponentSize(IfxCif_MiMainPicturePathComponents component)
Function to query the current size of the ring buffer of one main picture path component.
Definition: IfxCif.c:2235
IfxCif_Submodules_JpegEncoder
JPEG Encoder submodule.
Definition: IfxCif.h:175
IfxCif_setHuffmanAcTableLength
void IfxCif_setHuffmanAcTableLength(IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for AC values.
Definition: IfxCif.c:3104
IfxCif_HuffmanTableComponents
IfxCif_HuffmanTableComponents
Enumerator for the Huffman Table components.
Definition: IfxCif.h:397
IfxCif_MiInterruptSources_WrapMainPictureY
Main picture Y address wrap interrupt.
Definition: IfxCif.h:342
IfxCif_setMiMainPictureComponentBaseInitAddress
void IfxCif_setMiMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address)
Function to set the initial base address of the ring buffer for one main picture path component...
Definition: IfxCif.c:3744
IfxCif_getIspisPictureSize
uint16 IfxCif_getIspisPictureSize(IfxCif_ImageTiers tier)
Function to query the current picture size for one tier.
Definition: IfxCif.c:1514
IfxCif_setDpUserDefinedSymbol
void IfxCif_setDpUserDefinedSymbol(uint8 x, uint16 value)
Function to set one user defined debug symbol.
Definition: IfxCif.c:2786
IfxCif_SecurityWatchdogCounters_Horizontal
Horizontal counter.
Definition: IfxCif.h:535
IfxCif_getHuffmanDcTableLength
uint8 IfxCif_getHuffmanDcTableLength(IfxCif_HuffmanTables table)
Function to query the current Huffman Table length for DC values.
Definition: IfxCif.c:1098
IfxCif_clearEpInterrupt
void IfxCif_clearEpInterrupt(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:81
IfxCif_getEpInputEnableState
IfxCif_State IfxCif_getEpInputEnableState(IfxCif_ExtraPath z)
Function to query the current input enable state of one extra path.
Definition: IfxCif.c:884
IfxCif_getIspisCurrentPictureSize
uint16 IfxCif_getIspisCurrentPictureSize(IfxCif_ImageTiers tier)
Function to query the picture size of the current picture for one tier.
Definition: IfxCif.c:1451
IfxCif_MiStatusClearSources_ExtraPath1FifoFull
FIFO full flag in extra path 1.
Definition: IfxCif.h:374
IfxCif_Submodules_SecurityWatchdog
Security Watchdog submodule.
Definition: IfxCif.h:173
IfxCif_getIspInputSelectionAppendState
IfxCif_State IfxCif_getIspInputSelectionAppendState(void)
Function to query the append state.
Definition: IfxCif.c:1285
IfxCif_getKernelResetRequestState
IfxCif_State IfxCif_getKernelResetRequestState(void)
Function to query the state of the kernel reset request bit.
Definition: IfxCif.c:1685
IfxCif_JpeQTableSelector_Table0
Q-Table 0.
Definition: IfxCif.h:463
IfxCif_Submodules_Debug
Debug submodule.
Definition: IfxCif.h:170
IfxCif_MiStatusClearSources_BusWriteError
Bus write error flag.
Definition: IfxCif.h:375
IfxCif_getMiMainPictureComponentOffsetCounterStart
uint32 IfxCif_getMiMainPictureComponentOffsetCounterStart(IfxCif_MiMainPicturePathComponents component)
Function to query the offset counter which points to the start address of the previously processed pi...
Definition: IfxCif.c:2208
IfxCif_setMiInterruptRequestBit
void IfxCif_setMiInterruptRequestBit(IfxCif_MiInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3701
IfxCif_setSecurityWatchdogInterruptRequestBit
void IfxCif_setSecurityWatchdogInterruptRequestBit(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3855
IfxCif_getIspOutputWindowOffset
uint16 IfxCif_getIspOutputWindowOffset(IfxCif_ImageTiers tier)
Function to query the currently set ISP output window offset for one tier.
Definition: IfxCif.c:1367
IfxCif_EpInterrupts_Count
Total number of interrupt sources for one extra path.
Definition: IfxCif.h:605
IfxCif_setJpeInterruptRequestBit
void IfxCif_setJpeInterruptRequestBit(IfxCif_JpeInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3470
IfxCif_ImageTiers_Vertical
Vertical tier.
Definition: IfxCif.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCif_setEpInterruptEnableState
void IfxCif_setEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3028
IfxCif_JpeDebugSignalSources_VlcEncodeBusy
VLC Encode Busy (vlc encode processing active)
Definition: IfxCif.h:419
IfxCif_IspInterruptSources_LossOfData
Loss of Data.
Definition: IfxCif.h:267
IfxCif_JpeDebugSignalState_Inactive
Debug signal is inactive.
Definition: IfxCif.h:427
IfxCif_getMiMainPictureComponentInitSize
uint32 IfxCif_getMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component)
Function to query the initial size of the ring buffer of one main picture path component.
Definition: IfxCif.c:2129
IfxCif_getEpCroppingEnableState
IfxCif_State IfxCif_getEpCroppingEnableState(IfxCif_ExtraPath z)
Function to query the image cropping enabled state of one extra path.
Definition: IfxCif.c:616
IfxCif_JpeDebugSignalSources_R2BMemoryFull
R2B Memory Full (line memory status of r2b)
Definition: IfxCif.h:418
IfxCif_getIspisRecenterEnableState
IfxCif_State IfxCif_getIspisRecenterEnableState(void)
Function to query the enabled state of image stabilization recenter feature.
Definition: IfxCif.c:1535
IfxCif_setLinearDownscalerScalingFactors
void IfxCif_setLinearDownscalerScalingFactors(uint8 horizFactor, uint8 vertFactor)
Function to set the scaling factors of the linear downscaler.
Definition: IfxCif.c:3600
IfxCif_IspInterruptSources_PictureSizeViolationOccurred
Picture Size Violation Occurred.
Definition: IfxCif.h:266
IfxCif_MiMainPicturePathComponents_Cr
Cr-component.
Definition: IfxCif.h:354
IfxCif_EpInterrupts
IfxCif_EpInterrupts
Enumerator for interrupt sources of the extra paths module.
Definition: IfxCif.h:599
IfxCif_JpeScalingValueSources_Y
scaling Y input from [16..235] to [0..255]
Definition: IfxCif.h:482
IfxCif_getLinearDownscalerEnableState
IfxCif_State IfxCif_getLinearDownscalerEnableState(IfxCif_ImageTiers tier)
Function to query the current state of the linear downscaler for one tier.
Definition: IfxCif.c:1698
IfxCif_setEpCroppingEnableState
void IfxCif_setEpCroppingEnableState(IfxCif_ExtraPath z, uint32 enableState)
Function to enable or disable image cropping of one extra path.
Definition: IfxCif.c:2838
IfxCif_LinearDownscalerScalingMode_SingleSkip
Scaling mode single skip.
Definition: IfxCif.h:307
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxCif_JpeScalingValueSources
IfxCif_JpeScalingValueSources
Enumerator for the input scaling values of the JPEG encoder.
Definition: IfxCif.h:480
IfxCif_getEpInitialOffsetCounter
uint32 IfxCif_getEpInitialOffsetCounter(IfxCif_ExtraPath z)
Function to query the initial offset counter of one extra path.
Definition: IfxCif.c:865
IfxCif_MiInterruptSources
IfxCif_MiInterruptSources
Enumerator for interrupt sources of the memory interface submodule.
Definition: IfxCif.h:337
IfxCif_resetModule
void IfxCif_resetModule(Ifx_CIF_BBB *cifBbb)
resets CIF kernel
Definition: IfxCif.c:2679
IfxCif_MiStatusClearSources_MainPictureYFifoFull
Y FIFO full flag in main path.
Definition: IfxCif.h:378
IfxCif_getEpSize
uint32 IfxCif_getEpSize(IfxCif_ExtraPath z)
Function to query the current ring buffer size of one extra path.
Definition: IfxCif.c:1014
IfxCif_ImageTiers
IfxCif_ImageTiers
Enumerator for tiers.
Definition: IfxCif.h:128
IfxCif_getMaskedEpInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getMaskedEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to get the masked state of an interrupt.
Definition: IfxCif.c:1788
IfxCif_getEpInterruptOffset
uint32 IfxCif_getEpInterruptOffset(IfxCif_ExtraPath z)
Function to query the current interrupt offset of one extra path.
Definition: IfxCif.c:923
IfxCif_getEpWriteFormat
IfxCif_EpWriteFormat IfxCif_getEpWriteFormat(IfxCif_ExtraPath z)
Function to query the write format of one extra path.
Definition: IfxCif.c:1033
IfxCif_clearSecurityWatchdogInterrupt
void IfxCif_clearSecurityWatchdogInterrupt(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:267
IfxCif_SecurityWatchdogInterruptSources
IfxCif_SecurityWatchdogInterruptSources
Enumerator for interrupt sources of the security watchdog submodule.
Definition: IfxCif.h:540
IfxCif_ErrorState
IfxCif_ErrorState
Enumerator for the state of an error.
Definition: IfxCif.h:109
IfxCif_setMiMainPictureComponentInitialOffsetCounter
void IfxCif_setMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component, uint32 offsetCounter)
Function to set the initial offset counter inside the ring buffer for one main picture path component...
Definition: IfxCif.c:3792
IfxCif_getJpegCodecImageSize
uint16 IfxCif_getJpegCodecImageSize(IfxCif_ImageTiers tier)
Function to query the currently set JPEG codec image size of one tier.
Definition: IfxCif.c:1664
IfxCif_setLinearDownscalerScalingFactor
void IfxCif_setLinearDownscalerScalingFactor(IfxCif_ImageTiers tier, uint8 factor)
Function to set the scaling factor of the linear downscaler of one tier.
Definition: IfxCif.c:3579
IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout
Horizontal Start End Interrupt.
Definition: IfxCif.h:545
IfxCif_EpErrorSources_ExtraPath3SizeError
Size error in image cropping unit of extra path 3.
Definition: IfxCif.h:582
IfxCif_MiInterruptSources_FillMainPictureY
Main picture Y address wrap interrupt.
Definition: IfxCif.h:343
IfxCif_MiStatusInformationSources_BusWriteError
An Bus error occurred while writing to the Bus (main/self path) since last clear. ...
Definition: IfxCif.h:385
IfxCif_DpControlSources_UserDefinedSymbol8
User defined symbol 8.
Definition: IfxCif.h:626
IfxCif_setHuffmanDcTableLength
void IfxCif_setHuffmanDcTableLength(IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for DC values.
Definition: IfxCif.c:3138
IfxCif_EpFeatures_ByteSwap
Byte swap feature.
Definition: IfxCif.h:593
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCif_MiStatusClearSources
IfxCif_MiStatusClearSources
Enumerator for status clear sources of the memory interface module.
Definition: IfxCif.h:368
IfxCif_EpErrorSources_ExtraPath5SizeError
Size error in image cropping unit of extra path 5.
Definition: IfxCif.h:580
IfxCif_setMiLuminanceBurstLength
void IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength burstLength)
Function to set the burst length for Y, JPEG, or RAW data.
Definition: IfxCif.c:3738
IfxCif_IspInterruptSources_SecurityWatchdogTimeout
A watchdog timeout was triggered at the ISP input.
Definition: IfxCif.h:262
IfxCif_EpErrorClearSources_ExtraPath5SizeError
Size error in image cropping unit of extra path 5.
Definition: IfxCif.h:564
IfxCif_MiStatusInformationSources_MainPictureYFifoFull
FIFO full flag of Y FIFO in main path asserted since last clear.
Definition: IfxCif.h:388
IfxCif_MiMainPicturePathComponents_Cb
Cb-component.
Definition: IfxCif.h:353
IfxCif_SecurityWatchdogTimeoutCounters_StartEnd
Timeout counter for Start End phase.
Definition: IfxCif.h:553
IfxCif_JpeQTableSelectorComponents_Y
Y-component.
Definition: IfxCif.h:473
IfxCif_setJpeQTableSelector
void IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector)
Function to set the Q-Table selector for one component.
Definition: IfxCif.c:3503
IfxCif_setSecurityWatchdogTimeout
void IfxCif_setSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter, uint16 timeout)
Function to set the timeout for a watchdog timeout counter of one tier. A value of 0 disables the tim...
Definition: IfxCif.c:3880
IfxCif_getJpeScalingEnableState
IfxCif_State IfxCif_getJpeScalingEnableState(IfxCif_JpeScalingValueSources source)
Function to query the current enabled state of the scaling of an input value source.
Definition: IfxCif.c:1643
IfxCif_Submodules_AllModules
All submodules.
Definition: IfxCif.h:169
IfxCif_DpControlSources_UserDefinedSymbol2
User defined symbol 2.
Definition: IfxCif.h:632
IfxCif_getMiFeatureEnableState
IfxCif_State IfxCif_getMiFeatureEnableState(IfxCif_MiDataPaths dataPath)
Function to query the enabled state of a memory interface data path.
Definition: IfxCif.c:2038
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxCif_State
IfxCif_State
Enumerator for states.
Definition: IfxCif.h:159
IfxCif_getIspisCurrentPictureOffset
uint16 IfxCif_getIspisCurrentPictureOffset(IfxCif_ImageTiers tier)
Function to query the offset of the current picture for one tier.
Definition: IfxCif.c:1430
IfxCif_EpErrorSources_ExtraPath2SizeError
Size error in image cropping unit of extra path 2.
Definition: IfxCif.h:583
IfxCif_getLinearDownscalerScalingFactor
uint8 IfxCif_getLinearDownscalerScalingFactor(IfxCif_ImageTiers tier)
Function to query the currently set scaling factor of the linear downscaler of one tier...
Definition: IfxCif.c:1719
IfxCif_IspErrorSources_SizeErrorInInformSubmodule
ize error is generated in inform submodule
Definition: IfxCif.h:223
IfxCif_setIspisPictureSize
void IfxCif_setIspisPictureSize(IfxCif_ImageTiers tier, uint16 size)
Function to set the picture size for one tier.
Definition: IfxCif.c:3420
IfxCif_MiStatusClearSources_MainPictureCbFifoFull
Cb FIFO full flag in main path.
Definition: IfxCif.h:377
IfxCif_SecurityWatchdogTimeoutCounters_EndStart
Timeout counter for End Start phase.
Definition: IfxCif.h:552
IfxCif_getMiMainPictureComponentBaseAddress
uint32 IfxCif_getMiMainPictureComponentBaseAddress(IfxCif_MiMainPicturePathComponents component)
Function to query the current base address of the ring buffer of one main picture path component...
Definition: IfxCif.c:2104
IfxCif_getMainPictureComponentBaseInitAddress
uint32 IfxCif_getMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component)
Function to query the initial base address of the ring buffer of one main picture path component...
Definition: IfxCif.c:1761
IfxCif_getEpOffsetCounter
uint32 IfxCif_getEpOffsetCounter(IfxCif_ExtraPath z)
Function to query the current offset counter of one extra path.
Definition: IfxCif.c:942
IfxCif_getMaskedIspInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getMaskedIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource)
Function to query the masked state of an interrupt.
Definition: IfxCif.c:1812
IfxCif_EpFeatures_InitBaseAddress
Init buffer base address.
Definition: IfxCif.h:592
IfxCif_getEpCroppingCurrentPictureSize
uint16 IfxCif_getEpCroppingCurrentPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture size of one tier of one extra path...
Definition: IfxCif.c:588
IfxCif_setLinearDownscalerScalingModes
void IfxCif_setLinearDownscalerScalingModes(IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode)
Function to set the scaling mode of one tier.
Definition: IfxCif.c:3631
IfxCif_setHuffmanDcTableSelector
void IfxCif_setHuffmanDcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for DC values.
Definition: IfxCif.c:3155
IfxCif_getCurrentIspPictureOffset
uint16 IfxCif_getCurrentIspPictureOffset(IfxCif_ImageTiers tier)
Function to query the current ISP picture offset for one tier.
Definition: IfxCif.c:349
IfxCif_DpControlSources
IfxCif_DpControlSources
Enumerator for debug path control sources.
Definition: IfxCif.h:624
IfxCif_getJpeQTableSelector
IfxCif_JpeQTableSelector IfxCif_getJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component)
Function to query the currently selected Q-Table for one component.
Definition: IfxCif.c:1618
IfxCif_DpControlSources_LineNumberCounter
Line number counter.
Definition: IfxCif.h:635
IfxCif_State_Enabled
Enabled state.
Definition: IfxCif.h:162
IfxCif_Submodules_LinearDownscaler
Linear Downscaler submodule.
Definition: IfxCif.h:172
IfxCif_JpeScalingValueSources_CbCr
scaling Cb/Cr input from [16..240] to [0..255]
Definition: IfxCif.h:483
IfxCif_InterruptTriggeredState_NotTriggered
Interrupt was not triggered.
Definition: IfxCif.h:145
IfxCif_programJpeTable
void IfxCif_programJpeTable(IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length)
Definition: IfxCif.c:2631
IfxCif_getMiStatusInformation
IfxCif_ErrorState IfxCif_getMiStatusInformation(IfxCif_MiStatusInformationSources source)
Function to query the status information of one status information source of the memory interface mod...
Definition: IfxCif.c:2260
IfxCif_setIspPictureSize
void IfxCif_setIspPictureSize(IfxCif_ImageTiers tier, uint16 pictureSize)
Function to set the ISP picture size of one tier.
Definition: IfxCif.c:3352
IfxCif_getLinearDownscalerScalingMode
IfxCif_LinearDownscalerScalingMode IfxCif_getLinearDownscalerScalingMode(IfxCif_ImageTiers tier)
Function to query the currently set scaling mode of one tier.
Definition: IfxCif.c:1740
IfxCif_LinearDownscalerScalingMode
IfxCif_LinearDownscalerScalingMode
Enumerator for scaling mode of linear downscaler.
Definition: IfxCif.h:305
IfxCif_MiDataPaths_RawData
RAW data path.
Definition: IfxCif.h:330
IfxCif_setIspInputSelectionAppendState
void IfxCif_setIspInputSelectionAppendState(IfxCif_State appendState)
Function to enable or disable appending of bits to the input signal.
Definition: IfxCif.c:3247
IfxCif_setMiFeatureEnableState
void IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths dataPath, IfxCif_State enableState)
Function to enable or disable one memory interface data path.
Definition: IfxCif.c:3643
IfxCif_DpControlSources_UserDefinedSymbol5
User defined symbol 5.
Definition: IfxCif.h:629
IfxCif_setMiMainPictureComponentInitSize
void IfxCif_setMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component, uint32 size)
Function to set the initial size of the ring buffer for one main picture path component.
Definition: IfxCif.c:3769
IfxCif_EpErrorSources_ExtraPath3FifoFull
FIFO of extra path 3 is full.
Definition: IfxCif.h:577
IfxCif_getRawJpeInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getRawJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource)
Function to query the raw state of an interrupt.
Definition: IfxCif.c:2376
IfxCif_setEpCroppingCameraDisplacement
void IfxCif_setEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the image cropping camera displacement of one tier of one extra path.
Definition: IfxCif.c:2814
IfxCif_MiBurstLength
IfxCif_MiBurstLength
Enumerator for burst length affecting the write port of the memory interface.
Definition: IfxCif.h:320
IfxCif_SecurityWatchdogCounters_Vertical
Vertical counter.
Definition: IfxCif.h:534
IfxCif_setEpInitialOffsetCounter
void IfxCif_setEpInitialOffsetCounter(IfxCif_ExtraPath z, uint32 offsetCounter)
Function to set the initial offset counter of one extra path.
Definition: IfxCif.c:3013
IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout
Vertical End Start Interrupt.
Definition: IfxCif.h:542
IfxCif_JpeInterruptSources_DcTableError
DC Table error.
Definition: IfxCif.h:453
IfxCif_setJpeInterruptEnableState
void IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3437
IfxCif_setEpFeatureEnableState
void IfxCif_setEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState)
Function to enable or disable one feature of one extra path.
Definition: IfxCif.c:2951
IfxCif_JpeDebugSignalSources_QiqTableAccess
QiqTableAccess.
Definition: IfxCif.h:420
IfxCif_setIspOutputWindowOffset
void IfxCif_setIspOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP output window offset for one tier.
Definition: IfxCif.c:3335
IfxCif_setHuffmanAcTableSelector
void IfxCif_setHuffmanAcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for AC Values.
Definition: IfxCif.c:3121
IfxCif_setLinearDownscalerEnableState
void IfxCif_setLinearDownscalerEnableState(IfxCif_ImageTiers tier, IfxCif_State enableState)
Function to enable or disable the linear downscaler for one tier.
Definition: IfxCif.c:3558
IfxCif_setMiInterruptEnableState
void IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3664
IfxCif_EpWriteFormat_Raw8Bit
Raw 8 bit mode.
Definition: IfxCif.h:613
IfxCif_MiDataPaths_MainPictureData
main picture data path
Definition: IfxCif.h:332
IfxCif_setEpCroppingOffsetsOutputWindow
void IfxCif_setEpCroppingOffsetsOutputWindow(IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset)
Function to set the image cropping offsets of the output window of one extra path.
Definition: IfxCif.c:2899
IfxCif_setLinearDownscalerScalingMode
void IfxCif_setLinearDownscalerScalingMode(IfxCif_ImageTiers tier, IfxCif_LinearDownscalerScalingMode mode)
Function to set the scaling mode of one tier.
Definition: IfxCif.c:3610
IfxCif_EpFeatures_PictureDataPath
enables the extra path picture data path
Definition: IfxCif.h:594
IfxCif_MiStatusClearSources_ExtraPath3FifoFull
FIFO full flag in extra path 3.
Definition: IfxCif.h:372
IfxCif_IspErrorSources
IfxCif_IspErrorSources
Enumerator for error sources of the ISP module.
Definition: IfxCif.h:219
IfxCif_setIspisMaximumDisplacement
void IfxCif_setIspisMaximumDisplacement(IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement for one tier.
Definition: IfxCif.c:3386
IfxCif_getIspisCameraDisplacement
uint16 IfxCif_getIspisCameraDisplacement(IfxCif_ImageTiers tier)
Function to query the current camera displacement for one tier.
Definition: IfxCif.c:1409
IfxCif_ExtraPath
IfxCif_ExtraPath
Enumerator for the extra paths.
Definition: IfxCif.h:117
IfxCif_EpErrorClearSources_ExtraPath3SizeError
Size error in image cropping unit of extra path 3.
Definition: IfxCif.h:566
IfxCif_setEpRecenterValue
void IfxCif_setEpRecenterValue(IfxCif_ExtraPath z, uint8 value)
Function to set the recenter value of one extra path (0 to switch the recenter feature off...
Definition: IfxCif.c:3078
IfxCif_setJpeScalingEnableState
void IfxCif_setJpeScalingEnableState(IfxCif_JpeScalingValueSources source, IfxCif_State scalingEnable)
Function to enable or disable scaling of one input value source.
Definition: IfxCif.c:3524
IfxCif_MiStatusInformationSources_MainPictureCrFifoFull
FIFO full flag of Cr FIFO in main path asserted since last clear.
Definition: IfxCif.h:386
IfxCif_clearIspInterrupt
void IfxCif_clearIspInterrupt(IfxCif_IspInterruptSources interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:115
IfxCif_ErrorState_Error
Error occurred.
Definition: IfxCif.h:112
IfxCif_getEpCroppingMaximumDisplacement
uint16 IfxCif_getEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the maximum displacement of one tier of one extra path.
Definition: IfxCif.c:633
IfxCif_setEpInitialFillLevelInterruptOffset
void IfxCif_setEpInitialFillLevelInterruptOffset(uint32 z, uint32 interruptOffset)
Function to set the initial filling level interrupt offset of one extra path.
Definition: IfxCif.c:2998
IfxCif_getEpInitialFillLevelInterruptOffset
uint32 IfxCif_getEpInitialFillLevelInterruptOffset(IfxCif_ExtraPath z)
Function to query the initial filling level interrupt offset of one extra path.
Definition: IfxCif.c:846
IfxCif_JpeInterruptSources_HeaderGenerationComplete
Header generation complete.
Definition: IfxCif.h:455
IfxCif_HuffmanTables
IfxCif_HuffmanTables
Enumerator for the Huffman Tables.
Definition: IfxCif.h:406
IfxCif_setIspAcquisitionOffset
void IfxCif_setIspAcquisitionOffset(IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP acquisition offset of one tier.
Definition: IfxCif.c:3213
IfxCif_JpeTableId_VlcAcTable1
VLC AC Table 1.
Definition: IfxCif.h:505
IfxCif_EpErrorClearSources_ExtraPath2SizeError
Size error in image cropping unit of extra path 2.
Definition: IfxCif.h:567
IfxCif_JpeTableId_VlcAcTable0
VLC AC Table 0.
Definition: IfxCif.h:503
IfxCif_JpeInterruptSources
IfxCif_JpeInterruptSources
Enumerator for interrupt sources of the JPEG encoder module.
Definition: IfxCif.h:449
IfxCif_clearEpError
void IfxCif_clearEpError(IfxCif_EpErrorClearSources source)
Function to clear one extra path error.
Definition: IfxCif.c:52
IfxCif_setIspisCameraDisplacement
void IfxCif_setIspisCameraDisplacement(uint16 tier, uint16 displacement)
Function to set the camera displacement for one tier.
Definition: IfxCif.c:3369
IfxCif_clearIspError
void IfxCif_clearIspError(IfxCif_IspErrorSources errorSource)
Function to clear the error status bit for an error source.
Definition: IfxCif.c:94
IfxCif_getIspisMaximumDisplacement
uint16 IfxCif_getIspisMaximumDisplacement(IfxCif_ImageTiers tier)
Function to query the current maximum displacement for one tier.
Definition: IfxCif.c:1472
IfxCif_epForceConfigurationUpdate
void IfxCif_epForceConfigurationUpdate(IfxCif_ExtraPath z)
Function to trigger an immediate configuration update for one extra path.
Definition: IfxCif.c:317
IfxCif_DpControlSources_UserDefinedSymbol7
User defined symbol 7.
Definition: IfxCif.h:627
IfxCif_getRawSecurityWatchdogInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getRawSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the raw state of an interrupt.
Definition: IfxCif.c:2454
IfxCif_clearJpeInterrupt
void IfxCif_clearJpeInterrupt(IfxCif_JpeInterruptSources interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:152
IfxCif_MiStatusInformationSources
IfxCif_MiStatusInformationSources
Enumerator for status information sources of the memory interface submodule.
Definition: IfxCif.h:383
IfxCif_Submodules_ImageSignalProcessing
Image Signal Processing submodule.
Definition: IfxCif.h:176
IfxCif_setEpCroppingOffsetOutputWindow
void IfxCif_setEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 offset)
Function to set the image cropping offset of the output window of one tier of one extra path...
Definition: IfxCif.c:2875
IfxCif_EpErrorSources_ExtraPath4SizeError
Size error in image cropping unit of extra path 4.
Definition: IfxCif.h:581
IfxCif_Submodules
IfxCif_Submodules
Enumerator for submodules of the CIF interface.
Definition: IfxCif.h:167
Ifx_AddressValue
pvoid Ifx_AddressValue
Used in address values.
Definition: Ifx_Types.h:104
IfxCif_getMiDataPathOutputEnableState
IfxCif_State IfxCif_getMiDataPathOutputEnableState(IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface output...
Definition: IfxCif.c:2013
IfxCif_SecurityWatchdogCounters
IfxCif_SecurityWatchdogCounters
Enumerator for watchdog counters.
Definition: IfxCif.h:531
IfxCif_LinearDownscalerScalingMode_Disabled
Disabled.
Definition: IfxCif.h:311
IfxCif_getDpControlEnableState
IfxCif_State IfxCif_getDpControlEnableState(IfxCif_DpControlSources source)
Function to query the transmission enabled state of one debug path control source.
Definition: IfxCif.c:391
IfxCif_getRawMiInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getRawMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource)
Function to query the raw state of an interrupt.
Definition: IfxCif.c:2413
IfxCif_JpeTableId_QTable1
Q-Table 1.
Definition: IfxCif.h:499
IfxCif_JpeDebugSignalSources_VlcTableBusy
Debug VLC Table Busy (vlc access to hufftables)
Definition: IfxCif.h:417
IfxCif_MiDataPaths
IfxCif_MiDataPaths
Enumerator for data paths of the memory interface.
Definition: IfxCif.h:328
IfxCif_JpeQTableSelector
IfxCif_JpeQTableSelector
Enumerator for the Q-Table selector.
Definition: IfxCif.h:461
IfxCif_JpeDebugSignalState
IfxCif_JpeDebugSignalState
Enumerator for the debug signal state.
Definition: IfxCif.h:425
IfxCif_getMaskedJpeInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getMaskedJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource)
Function to query the masked state of an interrupt.
Definition: IfxCif.c:1881
IfxCif_getHuffmanDcTableSelectorState
IfxCif_State IfxCif_getHuffmanDcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for DC values...
Definition: IfxCif.c:1119
IfxCif_clearMiInterrupt
void IfxCif_clearMiInterrupt(IfxCif_MiInterruptSources interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:185
IfxCif_getEpOffsetCounterStart
uint32 IfxCif_getEpOffsetCounterStart(IfxCif_ExtraPath z)
Function to query the initial offset counter start value of one extra path.
Definition: IfxCif.c:961
IfxCif_DpCounters_PredividerCounter
Predivider counter.
Definition: IfxCif.h:643
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout
Horizontal End Start Interrupt.
Definition: IfxCif.h:544
IfxCif_DpControlSources_UserDefinedSymbol3
User defined symbol 3.
Definition: IfxCif.h:631
IfxCif_EpFeatures_InitOffsetCounter
Init offest counter.
Definition: IfxCif.h:591
IfxCif_EpErrorClearSources_ExtraPath1SizeError
Size error in image cropping unit of extra path 1.
Definition: IfxCif.h:568
IfxCif_State_Disabled
Disabled state.
Definition: IfxCif.h:161
IfxCif_EpErrorSources_ExtraPath5FifoFull
FIFO of extra path 5 is full.
Definition: IfxCif.h:575
IfxCif_EpErrorSources_ExtraPath1FifoFull
FIFO of extra path 1 is full.
Definition: IfxCif.h:579
IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule
Size error is generated in outmux submodule.
Definition: IfxCif.h:221
IfxCif_getMiMainPictureComponentOffsetCounter
uint32 IfxCif_getMiMainPictureComponentOffsetCounter(IfxCif_MiMainPicturePathComponents component)
Function to query the current offset counter within the ring buffer of one main picture path componen...
Definition: IfxCif.c:2183
IfxCif_JpeTableId
IfxCif_JpeTableId
Enumerator for the JPE Tables.
Definition: IfxCif.h:496
IfxCif_setIspInterruptEnableState
void IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3261
IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule
Size error is generated in image stabilization submodule.
Definition: IfxCif.h:222
IfxCif_IspInterruptSources_StartEdgeOfVSync
Start Edge of v_sync.
Definition: IfxCif.h:264
IfxCif_setIspInterruptRequestBit
void IfxCif_setIspInterruptRequestBit(IfxCif_IspInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3298
IfxCif_getEpInitSize
uint32 IfxCif_getEpInitSize(IfxCif_ExtraPath z)
Function to query the initial size of the ring buffer of one extra path.
Definition: IfxCif.c:827
IfxCif_MiInterruptSources_WrapMainPictureCr
Main picture Cr address wrap interrupt.
Definition: IfxCif.h:340
IfxCif_getIspErrorState
IfxCif_ErrorState IfxCif_getIspErrorState(IfxCif_IspErrorSources errorSource)
Function to query the error state of an error source.
Definition: IfxCif.c:1251
IfxCif_setEpCroppingMaximumDisplacement
void IfxCif_setEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement of one tier of one extra path.
Definition: IfxCif.c:2851
IfxCif_setEpCroppingPictureSize
void IfxCif_setEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 size)
Function to set the image cropping picture size of one tier of one extra path.
Definition: IfxCif.c:2913
IfxCif_getEpErrorState
IfxCif_ErrorState IfxCif_getEpErrorState(IfxCif_EpErrorSources source)
Function to query the state of an extra path error source.
Definition: IfxCif.c:737
IfxCif_JpeQTableSelectorComponents
IfxCif_JpeQTableSelectorComponents
Enumerator for the components to select Q-Tables.
Definition: IfxCif.h:471
IfxCif_setEpInitSize
void IfxCif_setEpInitSize(IfxCif_ExtraPath z, uint32 size)
Function to set the initial size of the ring buffer of one extra path.
Definition: IfxCif.c:2983
IfxCif_getDpCounter
uint32 IfxCif_getDpCounter(IfxCif_DpCounters counter)
Function to query the current counter value of one debug path counter.
Definition: IfxCif.c:448
IfxCif_DpControlSources_UserDefinedSymbol6
User defined symbol 6.
Definition: IfxCif.h:628
IfxCif_getHuffmanAcTableSelectorState
IfxCif_State IfxCif_getHuffmanAcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for AC values...
Definition: IfxCif.c:1071
IfxCif_setJpegCodecImageSize
void IfxCif_setJpegCodecImageSize(IfxCif_ImageTiers tier, uint16 size)
Function to set the JPEG codec image size of one tier.
Definition: IfxCif.c:3541
IfxCif_getEpCroppingCameraDisplacement
uint16 IfxCif_getEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping camera displacement of one tier of one extra path...
Definition: IfxCif.c:532
IfxCif_getRawIspInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getRawIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource)
Function to query the raw state of an interrupt.
Definition: IfxCif.c:2311
IfxCif_IspInterruptSources_IspTurnedOff
Isp was Turned Off (vsynced)
Definition: IfxCif.h:269
IfxCif_MiDataPaths_JpegData
JPEG data path.
Definition: IfxCif.h:331
IfxCif_getIspInterruptEnableState
IfxCif_State IfxCif_getIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:1302
IfxCif_DpCounters_TimestampCounter
Timestamp counter.
Definition: IfxCif.h:644
IfxCif_JpeInterruptSources_EncodingComplete
Encoding complete.
Definition: IfxCif.h:456
IfxCif_getSecurityWatchdogTimeout
uint16 IfxCif_getSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter)
Function to query the current value of a timeout counter of one tier.
Definition: IfxCif.c:2512
IfxCif_DpControlSources_FrameNumberCounter
Frame number counter.
Definition: IfxCif.h:636
IfxCif_getEpCroppingRecenterState
IfxCif_State IfxCif_getEpCroppingRecenterState(IfxCif_ExtraPath z)
Function to query the enabled state of the recenter feature of one extra path.
Definition: IfxCif.c:717
IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout
Vertical Start End Interrupt.
Definition: IfxCif.h:543
IfxCif_getMiInterruptEnableState
IfxCif_State IfxCif_getMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:2063
IfxCif_MiInterruptSources_MacroBlockLine
Macroblock line interrupt of main picture (16 lines of Y, 8 lines of Cb and 8 lines of Cr are written...
Definition: IfxCif.h:344
IfxCif_MiStatusClearSources_ExtraPath4FifoFull
FIFO full flag in extra path 4.
Definition: IfxCif.h:371
IfxCif_DpControlSources_UserDefinedSymbol1
User defined symbol 1.
Definition: IfxCif.h:633
IfxCif_getIspAcquisitionSize
uint16 IfxCif_getIspAcquisitionSize(IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition size of one tier.
Definition: IfxCif.c:1230
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxCif_getEpBaseInitAddress
uint32 IfxCif_getEpBaseInitAddress(IfxCif_ExtraPath z)
Function to query the initial base address of the ring buffer of one extra path.
Definition: IfxCif.c:513
IfxCif_getSoftwareResetMode
IfxCif_State IfxCif_getSoftwareResetMode(IfxCif_Submodules submodule)
Function to query the reset mode of a submodule.
Definition: IfxCif.c:2555
IfxCif_IspInterruptSources_FrameCompletelyPutOut
Frame was Completely Put Out.
Definition: IfxCif.h:268
IfxCif_getJpeInterruptEnableState
IfxCif_State IfxCif_getJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:1581
IfxCif_JpeTableId_QTable0
Q-Table 0.
Definition: IfxCif.h:498
IfxCif_setIspisOutputWindowOffset
void IfxCif_setIspisOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset)
Function to set the image stabilization offset of the output window of one tier.
Definition: IfxCif.c:3403
IfxCif_getSecurityWatchdogInterruptEnableState
IfxCif_State IfxCif_getSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:2483
IfxCif_MiMainPicturePathComponents_Y
Y-component.
Definition: IfxCif.h:352
IfxCif_getCurrentIspPictureSize
uint16 IfxCif_getCurrentIspPictureSize(IfxCif_ImageTiers tier)
Function to query the current ISP picture size for one tier.
Definition: IfxCif.c:370
IfxCif_JpeDebugSignalSources_BadTableAccess
Debug Bad Table Access (set if an access to the TABLE_DATA or to the TABLE_ID register is performed...
Definition: IfxCif.h:416
IfxCif_Submodules_MemoryInterface
Memory Interface submodule.
Definition: IfxCif.h:174
IfxCif_MiStatusClearSources_ExtraPath2FifoFull
FIFO full flag in extra path 2.
Definition: IfxCif.h:373
IfxCif_EpErrorSources_ExtraPath2FifoFull
FIFO of extra path 2 is full.
Definition: IfxCif.h:578
IfxCif_MiInterruptSources_MainPictureFrameEnd
Picture end of frame interrupt.
Definition: IfxCif.h:345
IfxCif_getIspAcquisitionOffset
uint16 IfxCif_getIspAcquisitionOffset(IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition offset of one tier.
Definition: IfxCif.c:1209
IfxCif_Submodules_ExtraPaths
Extra Paths submodule.
Definition: IfxCif.h:171
IfxCif_setSoftwareResetMode
void IfxCif_setSoftwareResetMode(IfxCif_Submodules submodule, IfxCif_State resetMode)
Function to enable or disable the reset mode of a submodule.
Definition: IfxCif.c:3919
IfxCif_setEpOffsetCounterStart
void IfxCif_setEpOffsetCounterStart(uint32 z, uint32 offsetCounter)
Function to set the initial offset counter start value of one extra path.
Definition: IfxCif.c:3063
IfxCif_setIspAcquisitionSize
void IfxCif_setIspAcquisitionSize(IfxCif_ImageTiers tier, uint16 size)
Function to set the ISP acquisition size of one tier.
Definition: IfxCif.c:3230
IfxCif_EpErrorSources_ExtraPath1SizeError
Size error in image cropping unit of extra path 1.
Definition: IfxCif.h:584
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxCif_JpeQTableSelectorComponents_U
U-component.
Definition: IfxCif.h:474
IfxCif_setInternalClockMode
void IfxCif_setInternalClockMode(IfxCif_Submodules submodule, IfxCif_State clockState)
Function to enable or disable the clock of a submodule.
Definition: IfxCif.c:3172
IfxCif_clearMiStatus
void IfxCif_clearMiStatus(IfxCif_MiStatusClearSources source)
Function to clear the status information of one status clear source of the memory interface submodule...
Definition: IfxCif.c:222
IfxCif_setModuleStateRequest
void IfxCif_setModuleStateRequest(IfxCif_State state)
Function to request enabling or disabling of the CIF module.
Definition: IfxCif.c:3815
IfxCif_getEpBaseAddress
uint32 IfxCif_getEpBaseAddress(IfxCif_ExtraPath z)
Function to query the current base address of the ring buffer of one extra path.
Definition: IfxCif.c:494
IfxCif_ErrorState_NoError
No error occurred.
Definition: IfxCif.h:111
IfxCif_dpResetCounter
void IfxCif_dpResetCounter(IfxCif_DpCounters counter)
Function to reset one debug path counter.
Definition: IfxCif.c:292
IfxCif_setSecurityWatchdogInterruptEnableState
void IfxCif_setSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3830
IfxCif_setEpInterruptRequestBit
void IfxCif_setEpInterruptRequestBit(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3050
IfxCif_EpErrorClearSources_ExtraPath4SizeError
Size error in image cropping unit of extra path 4.
Definition: IfxCif.h:565
IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the masked state of an interrupt.
Definition: IfxCif.c:1959
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCif_JpeQTableSelectorComponents_V
V-component.
Definition: IfxCif.h:475
IfxCif_IspInterruptSources_SampledInputFrameComplete
Sampled Input Frame is Complete.
Definition: IfxCif.h:265
IfxCif_JpeInterruptSources_VlcTableError
VLC table error.
Definition: IfxCif.h:451
IfxCif_getIspisOffsetOutputWindow
uint16 IfxCif_getIspisOffsetOutputWindow(IfxCif_ImageTiers tier)
Function to query the current image stabilization offset of the output window of one tier...
Definition: IfxCif.c:1493
IfxCif_JpeDebugSignalSources
IfxCif_JpeDebugSignalSources
Enumerator for the debug signal sources.
Definition: IfxCif.h:414
IfxCif_SecurityWatchdogTimeoutCounters
IfxCif_SecurityWatchdogTimeoutCounters
Enumerator for watchdog timeout counters.
Definition: IfxCif.h:550
IfxCif_getEpOutputEnableState
IfxCif_State IfxCif_getEpOutputEnableState(IfxCif_ExtraPath z)
Function to query the current output enable state of one extra path.
Definition: IfxCif.c:980
IfxCif_EpErrorSources
IfxCif_EpErrorSources
Enumerator for error sources of extra paths.
Definition: IfxCif.h:573
IfxCif_getEpRecenterValue
uint8 IfxCif_getEpRecenterValue(IfxCif_ExtraPath z)
Function to query the current recenter value of one extra path.
Definition: IfxCif.c:997
IfxCif_JpeTableId_VlcDcTable1
VLC DC Table 1.
Definition: IfxCif.h:504
IfxCif_DpCounters
IfxCif_DpCounters
Enumerator for debug path counters.
Definition: IfxCif.h:641
IfxCif_DpControlSources_TimestampCounter
Timestamp counter.
Definition: IfxCif.h:634
IfxCif_MiStatusClearSources_ExtraPath5FifoFull
FIFO full flag in extra path 5.
Definition: IfxCif.h:370
IfxCif_EpErrorSources_ExtraPath4FifoFull
FIFO of extra path 4 is full.
Definition: IfxCif.h:576
IfxCif_MiStatusInformationSources_MainPictureCbFifoFull
FIFO full flag of Cb FIFO in main path asserted since last clear.
Definition: IfxCif.h:387
IfxCif_IspInterruptSources
IfxCif_IspInterruptSources
Enumerator for interrupt sources of the ISP submodule.
Definition: IfxCif.h:260
IfxCif_HuffmanTables_Table1
Huffman Table 1.
Definition: IfxCif.h:409
IfxCif_EpFeatures
IfxCif_EpFeatures
Enumerator for extra path features.
Definition: IfxCif.h:589
IfxCif_InterruptTriggeredState_Triggered
Interrupt was triggered.
Definition: IfxCif.h:146
IfxCif_resetSecurityWatchdogCounter
void IfxCif_resetSecurityWatchdogCounter(IfxCif_SecurityWatchdogCounters counter)
Function to reset one watchdog counter.
Definition: IfxCif.c:2698
IfxCif_IspInterruptSources_StartEdgeOfHSync
Start Edge of h_sync.
Definition: IfxCif.h:263
IfxCif_setEpWriteFormat
void IfxCif_setEpWriteFormat(IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat)
Function to set the write format for one extra path.
Definition: IfxCif.c:3091
IfxCif_getMaskedMiInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getMaskedMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource)
Function to query the masked state of an interrupt.
Definition: IfxCif.c:1918
IfxCif_getDpUserDefinedSymbol
uint16 IfxCif_getDpUserDefinedSymbol(uint8 x)
Function to query the value of one user defined debug symbol.
Definition: IfxCif.c:477
IfxCif_getEpCroppingCurrentPictureOffset
uint16 IfxCif_getEpCroppingCurrentPictureOffset(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture offset of one tier of one extra path...
Definition: IfxCif.c:560
IfxCif_Submodules_YCSplitter
Y/C-Splitter submodule.
Definition: IfxCif.h:177
IfxCif_setDpCounter
void IfxCif_setDpCounter(IfxCif_DpCounters counter, uint32 counterValue)
Function to set one debug path counter to a counter value.
Definition: IfxCif.c:2772
IfxCif_getEpCroppingPictureSize
uint16 IfxCif_getEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping picture size of one tier of one extra path.
Definition: IfxCif.c:689


iLLD_TC26B: IfxCif.h Source File

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IfxCif.h
Go to the documentation of this file.
1 /**
2 * \file IfxCif.h
3 * \brief CIF basic functionality
4 * \ingroup IfxLld_Cif
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Cif_Std_stdEnumerations Standard Enumerations
42 * \ingroup IfxLld_Cif_Std
43 * \defgroup IfxLld_Cif_Std_ispEnum ISP Enumerations
44 * \ingroup IfxLld_Cif_Std
45 * \defgroup IfxLld_Cif_Std_stdFunctions Standard Functions
46 * \ingroup IfxLld_Cif_Std
47 * \defgroup IfxLld_Cif_Std_ispFunctions ISP Functions
48 * \ingroup IfxLld_Cif_Std
49 * \defgroup IfxLld_Cif_Std_ldsFunctions Linear Downscaler Functions
50 * \ingroup IfxLld_Cif_Std
51 * \defgroup IfxLld_Cif_Std_ldsEnumerations Linear Downscaler Enumerations
52 * \ingroup IfxLld_Cif_Std
53 * \defgroup IfxLld_Cif_Std_miFunctions Memory Interface Functions
54 * \ingroup IfxLld_Cif_Std
55 * \defgroup IfxLld_Cif_Std_miEnumerations Memory Interface Enumerations
56 * \ingroup IfxLld_Cif_Std
57 * \defgroup IfxLld_Cif_Std_jpeFunctions JPEG Encoder Functions
58 * \ingroup IfxLld_Cif_Std
59 * \defgroup IfxLld_Cif_Std_jpeEnumerations JPEG Encoder Enumerations
60 * \ingroup IfxLld_Cif_Std
61 * \defgroup IfxLld_Cif_Std_swFunctions Security Watchdog Functions
62 * \ingroup IfxLld_Cif_Std
63 * \defgroup IfxLld_Cif_Std_swEnumerations Security Watchdog Enumerations
64 * \ingroup IfxLld_Cif_Std
65 * \defgroup IfxLld_Cif_Std_ispisFunctions ISP Image Stabilization Functions
66 * \ingroup IfxLld_Cif_Std
67 * \defgroup IfxLld_Cif_Std_ispisEnumerations ISP Image Stabilization Enumerations
68 * \ingroup IfxLld_Cif_Std
69 * \defgroup IfxLld_Cif_Std_epFunctions Extra Path Functions
70 * \ingroup IfxLld_Cif_Std
71 * \defgroup IfxLld_Cif_Std_epEnumerations Extra Path Enumerations
72 * \ingroup IfxLld_Cif_Std
73 * \defgroup IfxLld_Cif_Std_dpFunctions Debug Path Functions
74 * \ingroup IfxLld_Cif_Std
75 * \defgroup IfxLld_Cif_Std_dpEnumerations Debug Path Enumerations
76 * \ingroup IfxLld_Cif_Std
77 */
78
79 #ifndef IFXCIF_H
80 #define IFXCIF_H 1
81
82 /******************************************************************************/
83 /*----------------------------------Includes----------------------------------*/
84 /******************************************************************************/
85
86 #include "_Impl/IfxCif_cfg.h"
87 #include "Scu/Std/IfxScuWdt.h"
88 #include "IfxCif_bf.h"
89 #include "IfxCif_reg.h"
90 #include "Cpu/Std/IfxCpu_Intrinsics.h"
91
92 /******************************************************************************/
93 /*--------------------------------Enumerations--------------------------------*/
94 /******************************************************************************/
95
96 /** \addtogroup IfxLld_Cif_Std_stdEnumerations
97 * \{ */
98 /** \brief Enumerator for data path of main path
99 */
100 typedef enum
101 {
102 IfxCif_DataPathSelectorForMainPath_Disabled = 0, /**< \brief Main path is disabled */
103 IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed = 1, /**< \brief Main path is routed to the Memory Interface */
104 IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder = 2 /**< \brief Main path is routed to the JPEG encoder */
105 } IfxCif_DataPathSelectorForMainPath;
106
107 /** \brief Enumerator for the state of an error
108 */
109 typedef enum
110 {
111 IfxCif_ErrorState_NoError = 0, /**< \brief No error occurred */
112 IfxCif_ErrorState_Error = 1 /**< \brief Error occurred */
113 } IfxCif_ErrorState;
114
115 /** \brief Enumerator for the extra paths
116 */
117 typedef enum
118 {
119 IfxCif_ExtraPath_1 = 0,
120 IfxCif_ExtraPath_2 = 1,
121 IfxCif_ExtraPath_3 = 2,
122 IfxCif_ExtraPath_4 = 3,
123 IfxCif_ExtraPath_5 = 4
124 } IfxCif_ExtraPath;
125
126 /** \brief Enumerator for tiers
127 */
128 typedef enum
129 {
130 IfxCif_ImageTiers_Horizontal = 0, /**< \brief Horizontal tier */
131 IfxCif_ImageTiers_Vertical = 1 /**< \brief Vertical tier */
132 } IfxCif_ImageTiers;
133
134 /** \brief Enumerator for input interfaces supported by the CIF interface
135 */
136 typedef enum
137 {
138 IfxCif_InputInterface_ParallelInterface = 0 /**< \brief Parallel interface (currently the only supported input interface) */
139 } IfxCif_InputInterface;
140
141 /** \brief Enumerator for the state of an interrupt
142 */
143 typedef enum
144 {
145 IfxCif_InterruptTriggeredState_NotTriggered = 0, /**< \brief Interrupt was not triggered */
146 IfxCif_InterruptTriggeredState_Triggered = 1 /**< \brief Interrupt was triggered */
147 } IfxCif_InterruptTriggeredState;
148
149 /** \brief Enumerator for port input selections
150 */
151 typedef enum
152 {
153 IfxCif_PortInputSelection_PinMapping0 = 0, /**< \brief pin mapping 0 */
154 IfxCif_PortInputSelection_PinMapping1 = 1 /**< \brief pin mapping 1 */
155 } IfxCif_PortInputSelection;
156
157 /** \brief Enumerator for states
158 */
159 typedef enum
160 {
161 IfxCif_State_Disabled = 0, /**< \brief Disabled state */
162 IfxCif_State_Enabled = 1 /**< \brief Enabled state */
163 } IfxCif_State;
164
165 /** \brief Enumerator for submodules of the CIF interface
166 */
167 typedef enum
168 {
169 IfxCif_Submodules_AllModules = 0, /**< \brief All submodules */
170 IfxCif_Submodules_Debug = 1, /**< \brief Debug submodule */
171 IfxCif_Submodules_ExtraPaths = 2, /**< \brief Extra Paths submodule */
172 IfxCif_Submodules_LinearDownscaler = 3, /**< \brief Linear Downscaler submodule */
173 IfxCif_Submodules_SecurityWatchdog = 4, /**< \brief Security Watchdog submodule */
174 IfxCif_Submodules_MemoryInterface = 5, /**< \brief Memory Interface submodule */
175 IfxCif_Submodules_JpegEncoder = 6, /**< \brief JPEG Encoder submodule */
176 IfxCif_Submodules_ImageSignalProcessing = 7, /**< \brief Image Signal Processing submodule */
177 IfxCif_Submodules_YCSplitter = 8 /**< \brief Y/C-Splitter submodule */
178 } IfxCif_Submodules;
179
180 /** \brief Enumerator for channel mode of Y/C splitter
181 */
182 typedef enum
183 {
184 IfxCif_YCSplitterChannelMode_Disabled = 0, /**< \brief Y/C splitter is disabled */
185 IfxCif_YCSplitterChannelMode_MainPathAndRawMode = 1 /**< \brief Y/C splitter is enabled for main path and RAW mode */
186 } IfxCif_YCSplitterChannelMode;
187
188 /** \} */
189
190 /** \addtogroup IfxLld_Cif_Std_ispEnum
191 * \{ */
192 /** \brief Enumerator for the ISP CCIR sequence
193 */
194 typedef enum
195 {
196 IfxCif_IspCcirSequence_YCbYCr = 0, /**< \brief YCbYCr */
197 IfxCif_IspCcirSequence_YCrYCb = 1, /**< \brief YCrYCb */
198 IfxCif_IspCcirSequence_CbYCrY = 2 /**< \brief CbYCrY */
199 } IfxCif_IspCcirSequence;
200
201 /** \brief Enumerator for the clipping range of the crominance for the ISP output
202 */
203 typedef enum
204 {
205 IfxCif_IspColorSpaceMatrixCrominanceClippingRange_16To240 = 0, /**< \brief CbCr range 16..240 according to ITU-R BT.601 standard */
206 IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255 = 1 /**< \brief full UV range 0..255 */
207 } IfxCif_IspColorSpaceMatrixCrominanceClippingRange;
208
209 /** \brief Enumerator for the clipping range of the luminance for the ISP output
210 */
211 typedef enum
212 {
213 IfxCif_IspColorSpaceMatrixLuminanceClippingRange_16To235 = 0, /**< \brief Y range 16..235 according to ITU-R BT.601 standard */
214 IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255 = 1 /**< \brief full Y range 0..255 */
215 } IfxCif_IspColorSpaceMatrixLuminanceClippingRange;
216
217 /** \brief Enumerator for error sources of the ISP module
218 */
219 typedef enum
220 {
221 IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule = 0, /**< \brief Size error is generated in outmux submodule */
222 IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule = 1, /**< \brief Size error is generated in image stabilization submodule */
223 IfxCif_IspErrorSources_SizeErrorInInformSubmodule = 2 /**< \brief ize error is generated in inform submodule */
224 } IfxCif_IspErrorSources;
225
226 /** \brief Enumerator for the sampled input fields
227 */
228 typedef enum
229 {
230 IfxCif_IspFieldSelection_AllFields = 0, /**< \brief sample all fields (don't care about fields) */
231 IfxCif_IspFieldSelection_OnlyEvenFields = 1, /**< \brief sample only even fields */
232 IfxCif_IspFieldSelection_OnlyOddFields = 2 /**< \brief sample only odd fields */
233 } IfxCif_IspFieldSelection;
234
235 /** \brief Enumerator for current field information
236 */
237 typedef enum
238 {
239 IfxCif_IspInformFieldInformation_Odd = 0, /**< \brief Odd field */
240 IfxCif_IspInformFieldInformation_Even = 1 /**< \brief Even field */
241 } IfxCif_IspInformFieldInformation;
242
243 /** \brief Enumerator for the supported input interfaces of the ISP
244 */
245 typedef enum
246 {
247 IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb = 0, /**< \brief 8-bit external Interface if enabled append 8 MSBs as LSBs */
248 IfxCif_IspInputInterface_8BitExternalInterfaceAppendZeros = 1, /**< \brief 8-bit external Interface if enabled append 8 zeroes as LSBs */
249 IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb = 2, /**< \brief 10-bit external Interface if enabled append 6 MSBs as LSBs */
250 IfxCif_IspInputInterface_10BitExternalInterfaceAppendZeros = 3, /**< \brief 10-bit external Interface if enabled append 6 zeroes as LSBs */
251 IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb = 4, /**< \brief 12-bit external Interface if enabled append 4 MSBs as LSBs */
252 IfxCif_IspInputInterface_12BitExternalInterfaceAppendZeros = 5, /**< \brief 12-bit external Interface if enabled append 4 zeroes as LSBs */
253 IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb = 6, /**< \brief 14-bit external Interface if enabled append 2 MSBs as LSBs */
254 IfxCif_IspInputInterface_14BitExternalInterfaceAppendZeros = 7, /**< \brief 14-bit external Interface if enabled append 2 zeroes as LSBs */
255 IfxCif_IspInputInterface_16BitExternalInterface = 8 /**< \brief 16-bit external Interface */
256 } IfxCif_IspInputInterface;
257
258 /** \brief Enumerator for interrupt sources of the ISP submodule
259 */
260 typedef enum
261 {
262 IfxCif_IspInterruptSources_SecurityWatchdogTimeout = 0, /**< \brief A watchdog timeout was triggered at the ISP input */
263 IfxCif_IspInterruptSources_StartEdgeOfHSync = 1, /**< \brief Start Edge of h_sync */
264 IfxCif_IspInterruptSources_StartEdgeOfVSync = 2, /**< \brief Start Edge of v_sync */
265 IfxCif_IspInterruptSources_SampledInputFrameComplete = 3, /**< \brief Sampled Input Frame is Complete */
266 IfxCif_IspInterruptSources_PictureSizeViolationOccurred = 4, /**< \brief Picture Size Violation Occurred */
267 IfxCif_IspInterruptSources_LossOfData = 5, /**< \brief Loss of Data */
268 IfxCif_IspInterruptSources_FrameCompletelyPutOut = 6, /**< \brief Frame was Completely Put Out */
269 IfxCif_IspInterruptSources_IspTurnedOff = 7 /**< \brief Isp was Turned Off (vsynced) */
270 } IfxCif_IspInterruptSources;
271
272 /** \brief Enumerator for the ISP mode
273 */
274 typedef enum
275 {
276 IfxCif_IspMode_RawPicture = 0, /**< \brief RAW picture */
277 IfxCif_IspMode_ItuRBT656 = 1, /**< \brief ITU-R BT.656 (YUV with embedded sync) */
278 IfxCif_IspMode_ItuRBT601 = 2, /**< \brief ITU-R BT.601 (YUV input with H and Vsync signals) */
279 IfxCif_IspMode_DataMode = 4, /**< \brief datamode (ISP bypass, sync signals interpreted as data enable) */
280 IfxCif_IspMode_RawPictureWithItuRBT656Sync = 6 /**< \brief RAW picture mode with ITU-R BT.656 synchronization */
281 } IfxCif_IspMode;
282
283 /** \brief Enumerator for ISP sampling edge
284 */
285 typedef enum
286 {
287 IfxCif_IspSamplingEdge_NegativeEdge = 0, /**< \brief negative edge sampling */
288 IfxCif_IspSamplingEdge_PositiveEdge = 1 /**< \brief positive edge sampling */
289 } IfxCif_IspSamplingEdge;
290
291 /** \brief
292 */
293 typedef enum
294 {
295 IfxCif_IspSyncPolarity_HighActive = 0, /**< \brief high active sync polarity */
296 IfxCif_IspSyncPolarity_LowActive = 1 /**< \brief low active sync polarity */
297 } IfxCif_IspSyncPolarity;
298
299 /** \} */
300
301 /** \addtogroup IfxLld_Cif_Std_ldsEnumerations
302 * \{ */
303 /** \brief Enumerator for scaling mode of linear downscaler
304 */
305 typedef enum
306 {
307 IfxCif_LinearDownscalerScalingMode_SingleSkip = 0, /**< \brief Scaling mode single skip */
308 IfxCif_LinearDownscalerScalingMode_DoubleSkip = 1, /**< \brief Scaling mode double skip */
309 IfxCif_LinearDownscalerScalingMode_SinglePass = 2, /**< \brief Scaling mode single pass */
310 IfxCif_LinearDownscalerScalingMode_DoublePass = 3, /**< \brief Scaling mode double pass */
311 IfxCif_LinearDownscalerScalingMode_Disabled = -1 /**< \brief Disabled */
312 } IfxCif_LinearDownscalerScalingMode;
313
314 /** \} */
315
316 /** \addtogroup IfxLld_Cif_Std_miEnumerations
317 * \{ */
318 /** \brief Enumerator for burst length affecting the write port of the memory interface
319 */
320 typedef enum
321 {
322 IfxCif_MiBurstLength_4BeatBursts = 0, /**< \brief 4-beat bursts */
323 IfxCif_MiBurstLength_8BeatBursts = 1 /**< \brief 8-beat bursts */
324 } IfxCif_MiBurstLength;
325
326 /** \brief Enumerator for data paths of the memory interface
327 */
328 typedef enum
329 {
330 IfxCif_MiDataPaths_RawData = 0, /**< \brief RAW data path */
331 IfxCif_MiDataPaths_JpegData = 1, /**< \brief JPEG data path */
332 IfxCif_MiDataPaths_MainPictureData = 2 /**< \brief main picture data path */
333 } IfxCif_MiDataPaths;
334
335 /** \brief Enumerator for interrupt sources of the memory interface submodule
336 */
337 typedef enum
338 {
339 IfxCif_MiInterruptSources_BusError = 0, /**< \brief Bus write or read error interrupt (from handshake target interfaces) */
340 IfxCif_MiInterruptSources_WrapMainPictureCr = 1, /**< \brief Main picture Cr address wrap interrupt */
341 IfxCif_MiInterruptSources_WrapMainPictureCb = 2, /**< \brief Main picture Cb address wrap interrupt */
342 IfxCif_MiInterruptSources_WrapMainPictureY = 3, /**< \brief Main picture Y address wrap interrupt */
343 IfxCif_MiInterruptSources_FillMainPictureY = 4, /**< \brief Main picture Y address wrap interrupt */
344 IfxCif_MiInterruptSources_MacroBlockLine = 5, /**< \brief Macroblock line interrupt of main picture (16 lines of Y, 8 lines of Cb and 8 lines of Cr are written into RAM) */
345 IfxCif_MiInterruptSources_MainPictureFrameEnd = 6 /**< \brief Picture end of frame interrupt */
346 } IfxCif_MiInterruptSources;
347
348 /** \brief Enumerator for main picture path components of the memory interface
349 */
350 typedef enum
351 {
352 IfxCif_MiMainPicturePathComponents_Y = 0, /**< \brief Y-component */
353 IfxCif_MiMainPicturePathComponents_Cb = 1, /**< \brief Cb-component */
354 IfxCif_MiMainPicturePathComponents_Cr = 2 /**< \brief Cr-component */
355 } IfxCif_MiMainPicturePathComponents;
356
357 /** \brief Enumerator for write formats of data written into memory
358 */
359 typedef enum
360 {
361 IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit = 0, /**< \brief planar (YCbCr mode) / RAW & data mode (8 bit) */
362 IfxCif_MiMainPictureWriteFormat_SemiPlanarOrData8Bit = 1, /**< \brief semi-planar for YCbCr 4:2:x / RAW 8 bit */
363 IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit = 2 /**< \brief interleaved_combined for YCbCr 4:2:2 only / RAW & data mode (greater 8 up to 16 bit) */
364 } IfxCif_MiMainPictureWriteFormat;
365
366 /** \brief Enumerator for status clear sources of the memory interface module
367 */
368 typedef enum
369 {
370 IfxCif_MiStatusClearSources_ExtraPath5FifoFull = 0, /**< \brief FIFO full flag in extra path 5 */
371 IfxCif_MiStatusClearSources_ExtraPath4FifoFull = 1, /**< \brief FIFO full flag in extra path 4 */
372 IfxCif_MiStatusClearSources_ExtraPath3FifoFull = 2, /**< \brief FIFO full flag in extra path 3 */
373 IfxCif_MiStatusClearSources_ExtraPath2FifoFull = 3, /**< \brief FIFO full flag in extra path 2 */
374 IfxCif_MiStatusClearSources_ExtraPath1FifoFull = 4, /**< \brief FIFO full flag in extra path 1 */
375 IfxCif_MiStatusClearSources_BusWriteError = 5, /**< \brief Bus write error flag */
376 IfxCif_MiStatusClearSources_MainPictureCrFifoFull = 6, /**< \brief Cr FIFO full flag in main path */
377 IfxCif_MiStatusClearSources_MainPictureCbFifoFull = 7, /**< \brief Cb FIFO full flag in main path */
378 IfxCif_MiStatusClearSources_MainPictureYFifoFull = 8 /**< \brief Y FIFO full flag in main path */
379 } IfxCif_MiStatusClearSources;
380
381 /** \brief Enumerator for status information sources of the memory interface submodule
382 */
383 typedef enum
384 {
385 IfxCif_MiStatusInformationSources_BusWriteError = 0, /**< \brief An Bus error occurred while writing to the Bus (main/self path) since last clear */
386 IfxCif_MiStatusInformationSources_MainPictureCrFifoFull = 1, /**< \brief FIFO full flag of Cr FIFO in main path asserted since last clear */
387 IfxCif_MiStatusInformationSources_MainPictureCbFifoFull = 2, /**< \brief FIFO full flag of Cb FIFO in main path asserted since last clear */
388 IfxCif_MiStatusInformationSources_MainPictureYFifoFull = 3 /**< \brief FIFO full flag of Y FIFO in main path asserted since last clear */
389 } IfxCif_MiStatusInformationSources;
390
391 /** \} */
392
393 /** \addtogroup IfxLld_Cif_Std_jpeEnumerations
394 * \{ */
395 /** \brief Enumerator for the Huffman Table components
396 */
397 typedef enum
398 {
399 IfxCif_HuffmanTableComponents_Component0 = 0, /**< \brief Component 0 */
400 IfxCif_HuffmanTableComponents_Component1 = 1, /**< \brief Component 1 */
401 IfxCif_HuffmanTableComponents_Component2 = 2 /**< \brief Component 2 */
402 } IfxCif_HuffmanTableComponents;
403
404 /** \brief Enumerator for the Huffman Tables
405 */
406 typedef enum
407 {
408 IfxCif_HuffmanTables_Table0 = 0, /**< \brief Huffman Table 0 */
409 IfxCif_HuffmanTables_Table1 = 1 /**< \brief Huffman Table 1 */
410 } IfxCif_HuffmanTables;
411
412 /** \brief Enumerator for the debug signal sources
413 */
414 typedef enum
415 {
416 IfxCif_JpeDebugSignalSources_BadTableAccess = 0, /**< \brief Debug Bad Table Access (set if an access to the TABLE_DATA or to the TABLE_ID register is performed, when the JPEG_ENCODER is busy) */
417 IfxCif_JpeDebugSignalSources_VlcTableBusy = 1, /**< \brief Debug VLC Table Busy (vlc access to hufftables) */
418 IfxCif_JpeDebugSignalSources_R2BMemoryFull = 2, /**< \brief R2B Memory Full (line memory status of r2b) */
419 IfxCif_JpeDebugSignalSources_VlcEncodeBusy = 3, /**< \brief VLC Encode Busy (vlc encode processing active) */
420 IfxCif_JpeDebugSignalSources_QiqTableAccess = 4 /**< \brief QiqTableAccess */
421 } IfxCif_JpeDebugSignalSources;
422
423 /** \brief Enumerator for the debug signal state
424 */
425 typedef enum
426 {
427 IfxCif_JpeDebugSignalState_Inactive = 0, /**< \brief Debug signal is inactive */
428 IfxCif_JpeDebugSignalState_Active = 1 /**< \brief Debug signal is active */
429 } IfxCif_JpeDebugSignalState;
430
431 /** \brief Enumerator for the header generation debug control
432 */
433 typedef enum
434 {
435 IfxCif_JpeHeaderGenerationMode_WaitForEncodedImage = 0, /**< \brief wait for encoded image data to fill output buffer */
436 IfxCif_JpeHeaderGenerationMode_TransmitLastHeaderBytes = 1 /**< \brief immediately transmit last header bytes */
437 } IfxCif_JpeHeaderGenerationMode;
438
439 /** \brief Enumerator for the JPE header mode
440 */
441 typedef enum
442 {
443 IfxCif_JpeHeaderMode_NoAppnHeader = 0, /**< \brief no APPn header */
444 IfxCif_JpeHeaderMode_JfifHeader = 2 /**< \brief JFIF header */
445 } IfxCif_JpeHeaderMode;
446
447 /** \brief Enumerator for interrupt sources of the JPEG encoder module
448 */
449 typedef enum
450 {
451 IfxCif_JpeInterruptSources_VlcTableError = 0, /**< \brief VLC table error */
452 IfxCif_JpeInterruptSources_R2BImageSizeError = 1, /**< \brief R2B image size error */
453 IfxCif_JpeInterruptSources_DcTableError = 2, /**< \brief DC Table error */
454 IfxCif_JpeInterruptSources_VlcSymbolError = 3, /**< \brief VLC symbol error */
455 IfxCif_JpeInterruptSources_HeaderGenerationComplete = 4, /**< \brief Header generation complete */
456 IfxCif_JpeInterruptSources_EncodingComplete = 5 /**< \brief Encoding complete */
457 } IfxCif_JpeInterruptSources;
458
459 /** \brief Enumerator for the Q-Table selector
460 */
461 typedef enum
462 {
463 IfxCif_JpeQTableSelector_Table0 = 0, /**< \brief Q-Table 0 */
464 IfxCif_JpeQTableSelector_Table1 = 1, /**< \brief Q-Table 1 */
465 IfxCif_JpeQTableSelector_Table2 = 2, /**< \brief Q-Table 2 */
466 IfxCif_JpeQTableSelector_Table3 = 3 /**< \brief Q-Table 3 */
467 } IfxCif_JpeQTableSelector;
468
469 /** \brief Enumerator for the components to select Q-Tables
470 */
471 typedef enum
472 {
473 IfxCif_JpeQTableSelectorComponents_Y = 0, /**< \brief Y-component */
474 IfxCif_JpeQTableSelectorComponents_U = 1, /**< \brief U-component */
475 IfxCif_JpeQTableSelectorComponents_V = 2 /**< \brief V-component */
476 } IfxCif_JpeQTableSelectorComponents;
477
478 /** \brief Enumerator for the input scaling values of the JPEG encoder
479 */
480 typedef enum
481 {
482 IfxCif_JpeScalingValueSources_Y = 0, /**< \brief scaling Y input from [16..235] to [0..255] */
483 IfxCif_JpeScalingValueSources_CbCr = 1 /**< \brief scaling Cb/Cr input from [16..240] to [0..255] */
484 } IfxCif_JpeScalingValueSources;
485
486 /** \brief Enumerator for the codec state
487 */
488 typedef enum
489 {
490 IfxCif_JpeState_Free = 0, /**< \brief Codec is free (not busy) */
491 IfxCif_JpeState_Busy = 1 /**< \brief JPEG codec in process */
492 } IfxCif_JpeState;
493
494 /** \brief Enumerator for the JPE Tables
495 */
496 typedef enum
497 {
498 IfxCif_JpeTableId_QTable0 = 0, /**< \brief Q-Table 0 */
499 IfxCif_JpeTableId_QTable1 = 1, /**< \brief Q-Table 1 */
500 IfxCif_JpeTableId_QTable2 = 2, /**< \brief Q-Table 2 */
501 IfxCif_JpeTableId_QTable3 = 3, /**< \brief Q-Table 3 */
502 IfxCif_JpeTableId_VlcDcTable0 = 4, /**< \brief VLC DC Table 0 */
503 IfxCif_JpeTableId_VlcAcTable0 = 5, /**< \brief VLC AC Table 0 */
504 IfxCif_JpeTableId_VlcDcTable1 = 6, /**< \brief VLC DC Table 1 */
505 IfxCif_JpeTableId_VlcAcTable1 = 7 /**< \brief VLC AC Table 1 */
506 } IfxCif_JpeTableId;
507
508 /** \brief Enumerator for the JFIF stream encoder continuous mode
509 */
510 typedef enum
511 {
512 IfxCif_JpegJfifStreamEncoderContinuousMode_StopAtFrameEnd = 0, /**< \brief encoder stops at frame end */
513 IfxCif_JpegJfifStreamEncoderContinuousMode_StartAutomatically = 1, /**< \brief encoder starts automatically to encode the next frame */
514 IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically = 3 /**< \brief encoder first generates next header and then encodes automatically the next frame */
515 } IfxCif_JpegJfifStreamEncoderContinuousMode;
516
517 /** \brief Enumerator for the picture encoding format
518 */
519 typedef enum
520 {
521 IfxCif_JpegPictureEncodingFormat_422 = 0, /**< \brief 4:2:2 format */
522 IfxCif_JpegPictureEncodingFormat_400 = 1 /**< \brief 4:0:0 format */
523 } IfxCif_JpegPictureEncodingFormat;
524
525 /** \} */
526
527 /** \addtogroup IfxLld_Cif_Std_swEnumerations
528 * \{ */
529 /** \brief Enumerator for watchdog counters
530 */
531 typedef enum
532 {
533 IfxCif_SecurityWatchdogCounters_Predivider = 0, /**< \brief Predivider counter */
534 IfxCif_SecurityWatchdogCounters_Vertical = 1, /**< \brief Vertical counter */
535 IfxCif_SecurityWatchdogCounters_Horizontal = 2 /**< \brief Horizontal counter */
536 } IfxCif_SecurityWatchdogCounters;
537
538 /** \brief Enumerator for interrupt sources of the security watchdog submodule
539 */
540 typedef enum
541 {
542 IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout = 0, /**< \brief Vertical End Start Interrupt */
543 IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout = 1, /**< \brief Vertical Start End Interrupt */
544 IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout = 2, /**< \brief Horizontal End Start Interrupt */
545 IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout = 3 /**< \brief Horizontal Start End Interrupt */
546 } IfxCif_SecurityWatchdogInterruptSources;
547
548 /** \brief Enumerator for watchdog timeout counters
549 */
550 typedef enum
551 {
552 IfxCif_SecurityWatchdogTimeoutCounters_EndStart = 0, /**< \brief Timeout counter for End Start phase */
553 IfxCif_SecurityWatchdogTimeoutCounters_StartEnd = 1 /**< \brief Timeout counter for Start End phase */
554 } IfxCif_SecurityWatchdogTimeoutCounters;
555
556 /** \} */
557
558 /** \addtogroup IfxLld_Cif_Std_epEnumerations
559 * \{ */
560 /** \brief Enumerator for error sources that can be cleared in the extra paths registers
561 */
562 typedef enum
563 {
564 IfxCif_EpErrorClearSources_ExtraPath5SizeError = 0, /**< \brief Size error in image cropping unit of extra path 5 */
565 IfxCif_EpErrorClearSources_ExtraPath4SizeError = 1, /**< \brief Size error in image cropping unit of extra path 4 */
566 IfxCif_EpErrorClearSources_ExtraPath3SizeError = 2, /**< \brief Size error in image cropping unit of extra path 3 */
567 IfxCif_EpErrorClearSources_ExtraPath2SizeError = 3, /**< \brief Size error in image cropping unit of extra path 2 */
568 IfxCif_EpErrorClearSources_ExtraPath1SizeError = 4 /**< \brief Size error in image cropping unit of extra path 1 */
569 } IfxCif_EpErrorClearSources;
570
571 /** \brief Enumerator for error sources of extra paths
572 */
573 typedef enum
574 {
575 IfxCif_EpErrorSources_ExtraPath5FifoFull = 0, /**< \brief FIFO of extra path 5 is full */
576 IfxCif_EpErrorSources_ExtraPath4FifoFull = 1, /**< \brief FIFO of extra path 4 is full */
577 IfxCif_EpErrorSources_ExtraPath3FifoFull = 2, /**< \brief FIFO of extra path 3 is full */
578 IfxCif_EpErrorSources_ExtraPath2FifoFull = 3, /**< \brief FIFO of extra path 2 is full */
579 IfxCif_EpErrorSources_ExtraPath1FifoFull = 4, /**< \brief FIFO of extra path 1 is full */
580 IfxCif_EpErrorSources_ExtraPath5SizeError = 5, /**< \brief Size error in image cropping unit of extra path 5 */
581 IfxCif_EpErrorSources_ExtraPath4SizeError = 6, /**< \brief Size error in image cropping unit of extra path 4 */
582 IfxCif_EpErrorSources_ExtraPath3SizeError = 7, /**< \brief Size error in image cropping unit of extra path 3 */
583 IfxCif_EpErrorSources_ExtraPath2SizeError = 8, /**< \brief Size error in image cropping unit of extra path 2 */
584 IfxCif_EpErrorSources_ExtraPath1SizeError = 9 /**< \brief Size error in image cropping unit of extra path 1 */
585 } IfxCif_EpErrorSources;
586
587 /** \brief Enumerator for extra path features
588 */
589 typedef enum
590 {
591 IfxCif_EpFeatures_InitOffsetCounter = 0, /**< \brief Init offest counter */
592 IfxCif_EpFeatures_InitBaseAddress = 1, /**< \brief Init buffer base address */
593 IfxCif_EpFeatures_ByteSwap = 2, /**< \brief Byte swap feature */
594 IfxCif_EpFeatures_PictureDataPath = 3 /**< \brief enables the extra path picture data path */
595 } IfxCif_EpFeatures;
596
597 /** \brief Enumerator for interrupt sources of the extra paths module
598 */
599 typedef enum
600 {
601 IfxCif_EpInterrupts_FrameEnd = IFX_CIF_MIEP_MIS_FRAME_END_EP_1_OFF, /**< \brief Picture end of frame interrupt */
602 IfxCif_EpInterrupts_FillLevel = IFX_CIF_MIEP_MIS_FILL_EP_1_OFF, /**< \brief Fill level interrupt */
603 IfxCif_EpInterrupts_WrapAround = IFX_CIF_MIEP_MIS_WRAP_EP_1_OFF, /**< \brief Address wrap interrupt */
604 IfxCif_EpInterrupts_MacroBlockLine = IFX_CIF_MIEP_MIS_MBLK_LINE_EP_1_OFF, /**< \brief Macroblock line interrupt */
605 IfxCif_EpInterrupts_Count = 4 /**< \brief Total number of interrupt sources for one extra path */
606 } IfxCif_EpInterrupts;
607
608 /** \brief Enumerator for write formats of extra paths
609 */
610 typedef enum
611 {
612 IfxCif_EpWriteFormat_RawAndData = 0, /**< \brief Raw and data mode (8 bit) */
613 IfxCif_EpWriteFormat_Raw8Bit = 1, /**< \brief Raw 8 bit mode */
614 IfxCif_EpWriteFormat_RawGreater = 2, /**< \brief RAW & data mode (greater 8 up to 16 bit) */
615 IfxCif_EpWriteFormat_YCbCr = 3 /**< \brief YCbCr 16 bit; YCbCr data is handled interleaved as 16 bit data in extra paths */
616 } IfxCif_EpWriteFormat;
617
618 /** \} */
619
620 /** \addtogroup IfxLld_Cif_Std_dpEnumerations
621 * \{ */
622 /** \brief Enumerator for debug path control sources
623 */
624 typedef enum
625 {
626 IfxCif_DpControlSources_UserDefinedSymbol8 = 0, /**< \brief User defined symbol 8 */
627 IfxCif_DpControlSources_UserDefinedSymbol7 = 1, /**< \brief User defined symbol 7 */
628 IfxCif_DpControlSources_UserDefinedSymbol6 = 2, /**< \brief User defined symbol 6 */
629 IfxCif_DpControlSources_UserDefinedSymbol5 = 3, /**< \brief User defined symbol 5 */
630 IfxCif_DpControlSources_UserDefinedSymbol4 = 4, /**< \brief ser defined symbol 4 */
631 IfxCif_DpControlSources_UserDefinedSymbol3 = 5, /**< \brief User defined symbol 3 */
632 IfxCif_DpControlSources_UserDefinedSymbol2 = 6, /**< \brief User defined symbol 2 */
633 IfxCif_DpControlSources_UserDefinedSymbol1 = 7, /**< \brief User defined symbol 1 */
634 IfxCif_DpControlSources_TimestampCounter = 8, /**< \brief Timestamp counter */
635 IfxCif_DpControlSources_LineNumberCounter = 9, /**< \brief Line number counter */
636 IfxCif_DpControlSources_FrameNumberCounter = 10 /**< \brief Frame number counter */
637 } IfxCif_DpControlSources;
638
639 /** \brief Enumerator for debug path counters
640 */
641 typedef enum
642 {
643 IfxCif_DpCounters_PredividerCounter = 0, /**< \brief Predivider counter */
644 IfxCif_DpCounters_TimestampCounter = 1, /**< \brief Timestamp counter */
645 IfxCif_DpCounters_LineNumberCounter = 2, /**< \brief Line number counter */
646 IfxCif_DpCounters_FrameNumberCounter = 3 /**< \brief Frame number counter */
647 } IfxCif_DpCounters;
648
649 /** \brief Enumerator for debug path source paths
650 */
651 typedef enum
652 {
653 IfxCif_DpSourcePath_MainPath = 0, /**< \brief Main data path */
654 IfxCif_DpSourcePath_ExtraPath1 = 1, /**< \brief Extra path 1 */
655 IfxCif_DpSourcePath_ExtraPath2 = 2, /**< \brief Extra path 2 */
656 IfxCif_DpSourcePath_ExtraPath4 = 4, /**< \brief Extra path 4 */
657 IfxCif_DpSourcePath_ExtraPath5 = 5 /**< \brief Extra path 5 */
658 } IfxCif_DpSourcePath;
659
660 /** \} */
661
662 /** \addtogroup IfxLld_Cif_Std_stdFunctions
663 * \{ */
664
665 /******************************************************************************/
666 /*-------------------------Inline Function Prototypes-------------------------*/
667 /******************************************************************************/
668
669 /** \brief Function to clear the kernel reset state
670 * \return None
671 */
672 IFX_INLINE void IfxCif_clearKernelResetState(void);
673
674 /** \brief Function to query the CIF module ID
675 * \return CIF module ID
676 */
677 IFX_INLINE uint16 IfxCif_getCifModuleId(void);
678
679 /** \brief Function to query the port input selection
680 * \return Always @ref IfxCif_PortInputSelection_PinMapping0
681 */
682 IFX_INLINE IfxCif_PortInputSelection IfxCif_getCifModulePortInputSelection(void);
683
684 /** \brief Function to query the CIF module revision
685 * \return CIF module revision
686 */
687 IFX_INLINE uint8 IfxCif_getCifModuleRevision(void);
688
689 /** \brief Function to query the CIF module ID
690 * \return CIF module type
691 */
692 IFX_INLINE uint8 IfxCif_getCifModuleType(void);
693
694 /** \brief Function to query the clock distribution enabled state
695 * \return @ref IfxCif_State_Enabled if clock distribution is enabled, @ref IfxCif_State_Disabled otherwise
696 */
697 IFX_INLINE IfxCif_State IfxCif_getClockControlLogicState(void);
698
699 /** \brief Function to query the data path for main path
700 * \return Selector for the main data path (one member of @ref IfxCif_DataPathSelectorForMainPath)
701 */
702 IFX_INLINE IfxCif_DataPathSelectorForMainPath IfxCif_getDataPathSelectorForMainPath(void);
703
704 /** \brief Function to query the input interface of the CIF interface
705 * \return @ref IfxCif_InputInterface Type of the configured interface
706 */
707 IFX_INLINE IfxCif_InputInterface IfxCif_getInputInterface(void);
708
709 /** \brief Function to query the current level of the ISP input port s_hsync (for testing purposes only)
710 * \return @ref IfxCif_State_Enabled if s_hsync is high, @ref IfxCif_State_Disabled if s_hsync is low
711 */
712 IFX_INLINE IfxCif_State IfxCif_getIspInputPortSHSyncState(void);
713
714 /** \brief Function to query the kernel reset status
715 * \return @ref IfxCif_State_Enabled if kernel reset was executed, @ref IfxCif_State_Disabled otherwise
716 */
717 IFX_INLINE IfxCif_State IfxCif_getKernelResetStatus(void);
718
719 /** \brief Function to query the module number
720 * \return Module number of the CIF interface
721 */
722 IFX_INLINE uint16 IfxCif_getModuleNumber(void);
723
724 /** \brief Function to query the revision number of the CIF interface
725 * \return Revision number of the CIF interface
726 */
727 IFX_INLINE uint8 IfxCif_getModuleRevisionNumber(void);
728
729 /** \brief Function to query the state of the CIF module
730 * \return @ref IfxCif_State_Enabled if the module is currently enabled, @ref IfxCif_State_Disabled otherwise
731 */
732 IFX_INLINE IfxCif_State IfxCif_getModuleState(void);
733
734 /** \brief Function to query the module type
735 * \return Module type of the CIF interface
736 */
737 IFX_INLINE uint8 IfxCif_getModuleType(void);
738
739 /** \brief Function to query the Y/C splitter channel mode
740 * \return Configured mode of the Y/C splitter (one member of @ref IfxCif_YCSplitterChannelMode)
741 */
742 IFX_INLINE IfxCif_YCSplitterChannelMode IfxCif_getYCSplitterChannelMode(void);
743
744 /** \brief Function to enable or disable the clock distribution to all CIF submodules
745 * \param clockControlLogicState @ref IfxCif_State_Enabled to enable clock distribution, @ref IfxCif_State_Disabled to disable clock distribution
746 * \return None
747 */
748 IFX_INLINE void IfxCif_setClockControlLogicState(IfxCif_State clockControlLogicState);
749
750 /** \brief Function to set the data path for main path
751 * \param pathSelector Selector for the main data path
752 * \return None
753 */
754 IFX_INLINE void IfxCif_setDataPathSelectorForMainPath(IfxCif_DataPathSelectorForMainPath pathSelector);
755
756 /** \brief Function to set the input interface of the CIF interface
757 * \param interface Type of interface
758 * \return None
759 */
760 IFX_INLINE void IfxCif_setInputInterface(IfxCif_InputInterface interface);
761
762 /** \brief Function to request a kernel reset or reset the request bit
763 * \param state @ref IfxCif_State_Enabled to request a reset, @ref IfxCif_State_Disabled to reset the request bit before a reset was performed
764 * \return None
765 */
766 IFX_INLINE void IfxCif_setKernelResetRequestState(IfxCif_State state);
767
768 /** \brief Function to set the Y/C splitter channel mode
769 * \param mode Mode of the Y/C splitter to set
770 * \return None
771 */
772 IFX_INLINE void IfxCif_setYCSplitterChannelMode(IfxCif_YCSplitterChannelMode mode);
773
774 /******************************************************************************/
775 /*-------------------------Global Function Prototypes-------------------------*/
776 /******************************************************************************/
777
778 /** \brief Function to query the clock state of a submodule
779 * \param submodule Identifier of the submodule
780 * \return @ref IfxCif_State_Enabled if the clock of the submodule is enabled, @ref IfxCif_State_Disabled otherwise
781 */
782 IFX_EXTERN IfxCif_State IfxCif_getInternalClockMode(IfxCif_Submodules submodule);
783
784 /** \brief Function to query the state of the kernel reset request bit
785 * \return @ref IfxCif_State_Enabled if the kernel reset requets bit is set, @ref IfxCif_State_Disabled otherwise
786 */
787 IFX_EXTERN IfxCif_State IfxCif_getKernelResetRequestState(void);
788
789 /** \brief Function to query the reset mode of a submodule
790 * \param submodule Identifier of the submodule
791 * \return @ref IfxCif_State_Enabled if the reset mode of the submodule is enabled, @ref IfxCif_State_Disabled otherwise
792 */
793 IFX_EXTERN IfxCif_State IfxCif_getSoftwareResetMode(IfxCif_Submodules submodule);
794
795 /** \brief resets CIF kernel
796 * \param cifBbb pointer to CIF_BBB registers
797 * \return None
798 */
799 IFX_EXTERN void IfxCif_resetModule(Ifx_CIF_BBB *cifBbb);
800
801 /** \brief Function to enable or disable the clock of a submodule
802 * \param submodule Identifier of the submodule to enable or disable
803 * \param clockState @ref IfxCif_State_Enabled to enable the clock, @ref IfxCif_State_Disabled to disable the clock
804 * \return None
805 */
806 IFX_EXTERN void IfxCif_setInternalClockMode(IfxCif_Submodules submodule, IfxCif_State clockState);
807
808 /** \brief Function to request enabling or disabling of the CIF module
809 * \param state @ref IfxCif_State_Enabled to request the enabling of the module, @ref IfxCif_State_Disabled otherwise
810 * \return None
811 */
812 IFX_EXTERN void IfxCif_setModuleStateRequest(IfxCif_State state);
813
814 /** \brief Function to enable or disable the reset mode of a submodule
815 * \param submodule Identifier of the submodule
816 * \param resetMode @ref IfxCif_State_Enabled to enable the reset of the submodule, @ref IfxCif_State_Disabled to disable the reset
817 * \return None
818 */
819 IFX_EXTERN void IfxCif_setSoftwareResetMode(IfxCif_Submodules submodule, IfxCif_State resetMode);
820
821 /** \} */
822
823 /** \addtogroup IfxLld_Cif_Std_ispFunctions
824 * \{ */
825
826 /******************************************************************************/
827 /*-------------------------Inline Function Prototypes-------------------------*/
828 /******************************************************************************/
829
830 /** \brief Function to generate a frame synchronous ISP configuration update signal
831 * \return None
832 */
833 IFX_INLINE void IfxCif_generateIspFrameSynchronousConfigUpdateSignal(void);
834
835 /** \brief Function to generate an immediate ISP configuration update signal
836 * \return None
837 */
838 IFX_INLINE void IfxCif_generateIspImmediateConfigUpdateSignal(void);
839
840 /** \brief Function to query the current ISP frame count
841 * \return Current ISP frame count
842 */
843 IFX_INLINE uint16 IfxCif_getCurrentIspFrameCount(void);
844
845 /** \brief Function to query the current field information
846 * \return @ref IfxCif_IspInformFieldInformation_Odd for odd fields, @ref IfxCif_IspInformFieldInformation_Even for even fields
847 */
848 IFX_INLINE IfxCif_IspInformFieldInformation IfxCif_getCurrentIspInformFieldInformation(void);
849
850 /** \brief Function to query the current state of the ISP formatter
851 * \return @ref IfxCif_State_Enabled if the ISP input formatter is currently enabled, @ref IfxCif_State_Disabled if the ISP input formatter is currently disabled
852 */
853 IFX_INLINE IfxCif_State IfxCif_getCurrentIspInputFormatterState(void);
854
855 /** \brief Function to query the currently set CCIR sequence
856 * \return Currently set CCIR sequence (one member of @ref IfxCif_IspCcirSequence)
857 */
858 IFX_INLINE IfxCif_IspCcirSequence IfxCif_getIspCcirSequence(void);
859
860 /** \brief Function to query the clipping range of the crominance of the ISP output
861 * \return Currently set clipping range (one member of @ref IfxCif_IspColorSpaceMatrixCrominanceClippingRange)
862 */
863 IFX_INLINE IfxCif_IspColorSpaceMatrixCrominanceClippingRange IfxCif_getIspColorSpaceMatrixCrominanceClippingRange(void);
864
865 /** \brief Function to query the clipping range of the luminance of the ISP output
866 * \return Currently set clipping range (one member of @ref IfxCif_IspColorSpaceMatrixLuminanceClippingRange)
867 */
868 IFX_INLINE IfxCif_IspColorSpaceMatrixLuminanceClippingRange IfxCif_getIspColorSpaceMatrixLuminanceClippingRange(void);
869
870 /** \brief Function to query the state of field ID inversion
871 * \return @ref IfxCif_State_Enabled if field ID inversion is enabled, @ref IfxCif_State_Disabled otherwise
872 */
873 IFX_INLINE IfxCif_State IfxCif_getIspFieldInvertState(void);
874
875 /** \brief Function to query the currently set field sample mode
876 * \return Currently set fields sample mode (one member of @ref IfxCif_IspFieldSelection)
877 */
878 IFX_INLINE IfxCif_IspFieldSelection IfxCif_getIspFieldSelection(void);
879
880 /** \brief Function to query the currently set polarity of the HSYNC signal
881 * \return @ref IfxCif_IspSyncPolarity_HighActive if HSYNC is configured as high active, @ref IfxCif_IspSyncPolarity_LowActive if HSYNC is configured as low active
882 */
883 IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspHSyncPolarity(void);
884
885 /** \brief Function to query the current state of the ISP input formatter
886 * \return @ref IfxCif_State_Enabled if the ISP input formatter is enabled, @ref IfxCif_State_Disabled otherwise
887 */
888 IFX_INLINE IfxCif_State IfxCif_getIspInputFormatterState(void);
889
890 /** \brief Function to query the ISP input interface bit width
891 * \return Configured ISP input interface bit width (one member of @ref IfxCif_IspInputInterface)
892 */
893 IFX_INLINE IfxCif_IspInputInterface IfxCif_getIspInputInterface(void);
894
895 /** \brief Function to query the current value of the ISP input port s_data (for test purposes only)
896 * \return Current value of s_data
897 */
898 IFX_INLINE uint16 IfxCif_getIspInputPortSDataState(void);
899
900 /** \brief Function to query the current level of the ISP input port s_vsync (for test purposes only)
901 * \return @ref IfxCif_State_Enabled if s_vsync is high, @ref IfxCif_State_Disabled if s_vsync is low
902 */
903 IFX_INLINE IfxCif_State IfxCif_getIspInputPortSVSyncState(void);
904
905 /** \brief Function to query the currently set ISP mode
906 * \return Current ISP mode (one member of @ref IfxCif_IspMode)
907 */
908 IFX_INLINE IfxCif_State IfxCif_getIspMode(void);
909
910 /** \brief Function to query the ISP output state
911 * \return @ref IfxCif_State_Enabled if the ISP output is enabled, @ref IfxCif_State_Disabled otherwise
912 */
913 IFX_INLINE IfxCif_State IfxCif_getIspOutputState(void);
914
915 /** \brief Function to query the currently set ISP sampling edge
916 * \return @ref IfxCif_IspSamplingEdge_NegativeEdge if negative clock edge is configured as sampling edge, @ref IfxCif_IspSamplingEdge_PositiveEdge if positive clock edge is configured as sampling edge
917 */
918 IFX_INLINE IfxCif_IspSamplingEdge IfxCif_getIspSamplingEdge(void);
919
920 /** \brief Function to query the current state of the ISP
921 * \return @ref IfxCif_State_Enabled if the ISP is currently enabled, @ref IfxCif_State_Disabled if the ISP is currently disabled
922 */
923 IFX_INLINE IfxCif_State IfxCif_getIspState(void);
924
925 /** \brief Function to query the currently set polarity of the VSYNC signal
926 * \return @ref IfxCif_IspSyncPolarity_HighActive if VSYNC is configured as high active, @ref IfxCif_IspSyncPolarity_LowActive if VSYNC is configured as low active
927 */
928 IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspVSyncPolarity(void);
929
930 /** \brief Function to query the number of acquisition frames
931 * \return Currently set number of acquisition frames
932 */
933 IFX_INLINE uint16 IfxCif_getNumberOfAcquisitionFrames(void);
934
935 /** \brief Function to set the ISP acquisition offsets
936 * \param hOffset Acquisition horizontal offset to set
937 * \param vOffset Acquisition vertical offset to set
938 * \return None
939 */
940 IFX_INLINE void IfxCif_setIspAcquisitionOffsets(uint16 hOffset, uint16 vOffset);
941
942 /** \brief Function to set the ISP acquisition sizes
943 * \param hSize Acquisition horizontal size to set
944 * \param vSize Acquisition vertical size to set
945 * \return None
946 */
947 IFX_INLINE void IfxCif_setIspAcquisitionSizes(uint16 hSize, uint16 vSize);
948
949 /** \brief Function to set the CCIR sequence
950 * \param sequence CCIR sequence to set
951 * \return None
952 */
953 IFX_INLINE void IfxCif_setIspCcirSequence(IfxCif_IspCcirSequence sequence);
954
955 /** \brief Function to set the clipping range of the crominance of the ISP output
956 * \param clippingRange Clipping range to set
957 * \return None
958 */
959 IFX_INLINE void IfxCif_setIspColorSpaceMatrixCrominanceClippingRange(IfxCif_IspColorSpaceMatrixCrominanceClippingRange clippingRange);
960
961 /** \brief Function to set the clipping range of the luminance of the ISP output
962 * \param clippingRange Clipping range to set
963 * \return None
964 */
965 IFX_INLINE void IfxCif_setIspColorSpaceMatrixLuminanceClippingRange(IfxCif_IspColorSpaceMatrixLuminanceClippingRange clippingRange);
966
967 /** \brief Function to enable or disable inversion of the field ID
968 * \param fieldInvertState @ref IfxCif_State_Enabled to enable field ID inversion, @ref IfxCif_State_Disabled to disable field ID inversion
969 * \return None
970 */
971 IFX_INLINE void IfxCif_setIspFieldInvertState(IfxCif_State fieldInvertState);
972
973 /** \brief Function to select fields to sample
974 * \param selection Sampled fields selector
975 * \return None
976 */
977 IFX_INLINE void IfxCif_setIspFieldSelection(IfxCif_IspFieldSelection selection);
978
979 /** \brief Function to set the polarity of the HSYNC signal
980 * \param polarity @ref IfxCif_IspSyncPolarity_HighActive for high active HSYNC signal, @ref IfxCif_IspSyncPolarity_LowActive for low active HSYNC signal
981 * \return None
982 */
983 IFX_INLINE void IfxCif_setIspHSyncPolarity(IfxCif_IspSyncPolarity polarity);
984
985 /** \brief Function to enable or disable the ISP input formatter
986 * \param inputFormatterState @ref IfxCif_State_Enabled to enable the ISP input formatter, @ref IfxCif_State_Disabled to disable it
987 * \return None
988 */
989 IFX_INLINE void IfxCif_setIspInputFormatterState(IfxCif_State inputFormatterState);
990
991 /** \brief Function to set the ISP input interface bit width
992 * \param input ISP input interface bit width to set
993 * \return None
994 */
995 IFX_INLINE void IfxCif_setIspInputInterface(IfxCif_IspInputInterface input);
996
997 /** \brief Function to set the ISP mode
998 * \param mode Mode to set
999 * \return None
1000 */
1001 IFX_INLINE void IfxCif_setIspMode(IfxCif_IspMode mode);
1002
1003 /** \brief Function to enable or disable the ISP output
1004 * \param ispOutputState ispOutputState @ref IfxCif_State_Enabled to enable the ISP output, @ref IfxCif_State_Disabled to disable it
1005 * \return None
1006 */
1007 IFX_INLINE void IfxCif_setIspOutputState(IfxCif_State ispOutputState);
1008
1009 /** \brief Function to set the ISP output window offsets
1010 * \param hOffset Offset horizontal to set
1011 * \param vOffset Offset vertical to set
1012 * \return None
1013 */
1014 IFX_INLINE void IfxCif_setIspOutputWindowOffsets(uint16 hOffset, uint16 vOffset);
1015
1016 /** \brief Function to set the ISP picture sizes
1017 * \param hSize Picture horizontal size to set
1018 * \param vSize Picture vertical size to set
1019 * \return None
1020 */
1021 IFX_INLINE void IfxCif_setIspPictureSizes(uint16 hSize, uint16 vSize);
1022
1023 /** \brief Function to set the ISP sampling edge
1024 * \param edge @ref IfxCif_IspSamplingEdge_NegativeEdge to sample at negative clock edges, @ref IfxCif_IspSamplingEdge_PositiveEdge to sample at positive clock edges
1025 * \return None
1026 */
1027 IFX_INLINE void IfxCif_setIspSamplingEdge(IfxCif_IspSamplingEdge edge);
1028
1029 /** \brief Function to set the polarity of the VSYNC signal
1030 * \param polarity @ref IfxCif_IspSyncPolarity_HighActive for high active VSYNC signal, @ref IfxCif_IspSyncPolarity_LowActive for low active VSYNC signal
1031 * \return None
1032 */
1033 IFX_INLINE void IfxCif_setIspVSyncPolarity(IfxCif_IspSyncPolarity polarity);
1034
1035 /** \brief Function to set the number of acquisition frames
1036 * \param numberOfFrames Number of acquisition frames to set
1037 * \return None
1038 */
1039 IFX_INLINE void IfxCif_setNumberOfAcquisitionFrames(uint16 numberOfFrames);
1040
1041 /******************************************************************************/
1042 /*-------------------------Global Function Prototypes-------------------------*/
1043 /******************************************************************************/
1044
1045 /** \brief Function to clear the error status bit for an error source
1046 * \param errorSource Error source
1047 * \return None
1048 */
1049 IFX_EXTERN void IfxCif_clearIspError(IfxCif_IspErrorSources errorSource);
1050
1051 /** \brief Function to clear an interrupt
1052 * \param interruptSource Source of the interrupt
1053 * \return None
1054 */
1055 IFX_EXTERN void IfxCif_clearIspInterrupt(IfxCif_IspInterruptSources interruptSource);
1056
1057 /** \brief Function to query the current ISP picture offset for one tier
1058 * \param tier Tier for which to query the current ISP picture offset
1059 * \return Current ISP picture offset
1060 */
1061 IFX_EXTERN uint16 IfxCif_getCurrentIspPictureOffset(IfxCif_ImageTiers tier);
1062
1063 /** \brief Function to query the current ISP picture size for one tier
1064 * \param tier Tier for which to query the current ISP picture size
1065 * \return Current ISP picture size
1066 */
1067 IFX_EXTERN uint16 IfxCif_getCurrentIspPictureSize(IfxCif_ImageTiers tier);
1068
1069 /** \brief Function to query the currently set ISP acquisition offset of one tier
1070 * \param tier Tier for which to query the ISP acquisition offset
1071 * \return Currently set ISP acquisition offset
1072 */
1073 IFX_EXTERN uint16 IfxCif_getIspAcquisitionOffset(IfxCif_ImageTiers tier);
1074
1075 /** \brief Function to query the currently set ISP acquisition size of one tier
1076 * \param tier Tier for which to query the ISP acquisition size
1077 * \return Currently set acquisition size
1078 */
1079 IFX_EXTERN uint16 IfxCif_getIspAcquisitionSize(IfxCif_ImageTiers tier);
1080
1081 /** \brief Function to query the error state of an error source
1082 * \param errorSource errorSource Error source to query
1083 * \return @ref IfxCif_ErrorState_Error if the error occured, @ref IfxCif_ErrorState_NoError if the error did not occur
1084 */
1085 IFX_EXTERN IfxCif_ErrorState IfxCif_getIspErrorState(IfxCif_IspErrorSources errorSource);
1086
1087 /** \brief Function to query the append state
1088 * \return @ref IfxCif_State_Enabled if appending is enabled, IfxCif_State_Disabled otherwise
1089 */
1090 IFX_EXTERN IfxCif_State IfxCif_getIspInputSelectionAppendState(void);
1091
1092 /** \brief Function to query the enabled state of an interrupt
1093 * \param interruptSource interruptSource Source of the interrupt
1094 * \return @ref IfxCif_State_Enabled if the interrupt is enabled, @ref IfxCif_State_Disabled if the interrupt is disabled
1095 */
1096 IFX_EXTERN IfxCif_State IfxCif_getIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource);
1097
1098 /** \brief Function to query the currently set ISP output window offset for one tier
1099 * \param tier Tier for which to query the ISP output window offset
1100 * \return Currently set ISP output window offset
1101 */
1102 IFX_EXTERN uint16 IfxCif_getIspOutputWindowOffset(IfxCif_ImageTiers tier);
1103
1104 /** \brief Function to query the currently set ISP picture size of one tier
1105 * \param tier Tier for which to query the ISP picture size
1106 * \return Currently set ISP picture size
1107 */
1108 IFX_EXTERN uint16 IfxCif_getIspPictureSize(IfxCif_ImageTiers tier);
1109
1110 /** \brief Function to query the masked state of an interrupt
1111 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled
1112 */
1113 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource);
1114
1115 /** \brief Function to query the raw state of an interrupt
1116 * \param interruptSource Source of the interrupt
1117 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, @ref IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set
1118 */
1119 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource);
1120
1121 /** \brief Function to set the ISP acquisition offset of one tier
1122 * \param tier Tier for which to set the ISP acquisition offset
1123 * \param offset Acquisition offset to set
1124 * \return None
1125 */
1126 IFX_EXTERN void IfxCif_setIspAcquisitionOffset(IfxCif_ImageTiers tier, uint16 offset);
1127
1128 /** \brief Function to set the ISP acquisition size of one tier
1129 * \param tier Tier for which to set the ISP acquisition size
1130 * \param size Acquisition size to set
1131 * \return None
1132 */
1133 IFX_EXTERN void IfxCif_setIspAcquisitionSize(IfxCif_ImageTiers tier, uint16 size);
1134
1135 /** \brief Function to enable or disable appending of bits to the input signal
1136 * \param appendState @ref IfxCif_State_Enabled if appending is enabled, IfxCif_State_Disabled otherwise
1137 * \return None
1138 */
1139 IFX_EXTERN void IfxCif_setIspInputSelectionAppendState(IfxCif_State appendState);
1140
1141 /** \brief Function to enable or disable an interrupt
1142 * \param interruptSource interruptSource Source of the interrupt to enable or disable
1143 * \param interruptEnableState @ref IfxCif_State_Enabled to enable the interrupt, @ref IfxCif_State_Disabled to disable the interrupt
1144 * \return None
1145 */
1146 IFX_EXTERN void IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState);
1147
1148 /** \brief Function to set an interrupt request bit (does not necessarily trigger an interrupt)
1149 * \param interruptSource Source of the interrupt
1150 * \return None
1151 */
1152 IFX_EXTERN void IfxCif_setIspInterruptRequestBit(IfxCif_IspInterruptSources interruptSource);
1153
1154 /** \brief Function to set the ISP output window offset for one tier
1155 * \param tier Tier for which to query the ISP output window offset
1156 * \param offset Offset to set
1157 * \return None
1158 */
1159 IFX_EXTERN void IfxCif_setIspOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset);
1160
1161 /** \brief Function to set the ISP picture size of one tier
1162 * \param tier Tier for which to set the ISP picture size
1163 * \param pictureSize Picture size to set
1164 * \return None
1165 */
1166 IFX_EXTERN void IfxCif_setIspPictureSize(IfxCif_ImageTiers tier, uint16 pictureSize);
1167
1168 /** \} */
1169
1170 /** \addtogroup IfxLld_Cif_Std_ldsFunctions
1171 * \{ */
1172
1173 /******************************************************************************/
1174 /*-------------------------Global Function Prototypes-------------------------*/
1175 /******************************************************************************/
1176
1177 /** \brief Function to query the current state of the linear downscaler for one tier
1178 * \param tier Tier for which to query the state of the linear downscaler
1179 * \return @ref IfxCif_State_Enabled if the linear downscaler is enabled, @ref IfxCif_State_Disabled if the linear downscaler is disabled
1180 */
1181 IFX_EXTERN IfxCif_State IfxCif_getLinearDownscalerEnableState(IfxCif_ImageTiers tier);
1182
1183 /** \brief Function to query the currently set scaling factor of the linear downscaler of one tier
1184 * \param tier Tier for which to query the scaling factor
1185 * \return Current set scaling factor
1186 */
1187 IFX_EXTERN uint8 IfxCif_getLinearDownscalerScalingFactor(IfxCif_ImageTiers tier);
1188
1189 /** \brief Function to query the currently set scaling mode of one tier
1190 * \param tier Tier for which to query the scaling mode
1191 * \return Currently set scaling mode (one member of @ref IfxCif_LinearDownscalerScalingMode)
1192 */
1193 IFX_EXTERN IfxCif_LinearDownscalerScalingMode IfxCif_getLinearDownscalerScalingMode(IfxCif_ImageTiers tier);
1194
1195 /** \brief Function to enable or disable the linear downscaler for one tier
1196 * \param tier Tier for which to enable or disable the linear downscaler
1197 * \param enableState @ref IfxCif_State_Enabled to enable the linear downscaler, @ref IfxCif_State_Disabled to disable the linear downscaler
1198 * \return None
1199 */
1200 IFX_EXTERN void IfxCif_setLinearDownscalerEnableState(IfxCif_ImageTiers tier, IfxCif_State enableState);
1201
1202 /** \brief Function to set the scaling factor of the linear downscaler of one tier
1203 * \param tier Tier for which to set the scaling factor
1204 * \param factor Factor to set (depending on the configured scaling mode every factor + 1 pixel or double pixel will be skipped or passed to the next module)
1205 * \return None
1206 */
1207 IFX_EXTERN void IfxCif_setLinearDownscalerScalingFactor(IfxCif_ImageTiers tier, uint8 factor);
1208
1209 /** \brief Function to set the scaling factors of the linear downscaler
1210 * \param horizFactor Factor horizontal to set (depending on the configured scaling mode every factor + 1 pixel or double pixel will be skipped or passed to the next module)
1211 * \param vertFactor actor horizontal to set (depending on the configured scaling mode every factor + 1 pixel or double pixel will be skipped or passed to the next module)
1212 * \return None
1213 */
1214 IFX_EXTERN void IfxCif_setLinearDownscalerScalingFactors(uint8 horizFactor, uint8 vertFactor);
1215
1216 /** \brief Function to set the scaling mode of one tier
1217 * \param tier Tier for which to set the scaling mode
1218 * \param mode Scaling mode to set
1219 * \return None
1220 */
1221 IFX_EXTERN void IfxCif_setLinearDownscalerScalingMode(IfxCif_ImageTiers tier, IfxCif_LinearDownscalerScalingMode mode);
1222
1223 /** \brief Function to set the scaling mode of one tier
1224 * \param horizMode Scaling mode to set for horizontal
1225 * If the horizMode is not IfxCif_LinearDownscalerScalingMode_Disabled, the horizontal scaling will be enabled.
1226 * \param vertMode Scaling mode to set for vertical
1227 * If the vertMode is not IfxCif_LinearDownscalerScalingMode_Disabled, the vertical scaling will be enabled.
1228 * \return None
1229 */
1230 IFX_EXTERN void IfxCif_setLinearDownscalerScalingModes(IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode);
1231
1232 /** \} */
1233
1234 /** \addtogroup IfxLld_Cif_Std_miFunctions
1235 * \{ */
1236
1237 /******************************************************************************/
1238 /*-------------------------Inline Function Prototypes-------------------------*/
1239 /******************************************************************************/
1240
1241 /** \brief Function to generate an immediate configuration update signal for the memory interface submodule
1242 * \return None
1243 */
1244 IFX_INLINE void IfxCif_generateMiImmediateConfigUpdateSignal(void);
1245
1246 /** \brief Function to query the enabled state of the update signal of the base address and buffer size shadow registers to the programmed register init values
1247 * \return @ref IfxCif_State_Enabled if update of the base address and buffer size shadow registers is enabled (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port), @ref IfxCif_State_Disabled if update of the base address and buffer size shadow registers is disabled
1248 */
1249 IFX_INLINE IfxCif_State IfxCif_getBaseAddressInitializationEnableState(void);
1250
1251 /** \brief Function to query the number of JPEG or RAW data bytes of the last transmitted frame
1252 * \return Number of JPEG or RAW data bytes of the last transmitted frame (updated at frame end)
1253 */
1254 IFX_INLINE uint32 IfxCif_getMiByteCount(void);
1255
1256 /** \brief Function to query the current state of the change of byte order of the 32 bit output word
1257 * \return @ref IfxCif_State_Enabled if byte swapping is enabled, @ref IfxCif_State_Disabled if byte swapping is disabled
1258 */
1259 IFX_INLINE IfxCif_State IfxCif_getMiByteSwapEnableState(void);
1260
1261 /** \brief Function to query the currently set burst length for Cb and Cr data
1262 * \return @ref IfxCif_MiBurstLength_4BeatBursts if 4 bytes are transferred, @ref IfxCif_MiBurstLength_8BeatBursts if 8 bytes are transferred
1263 */
1264 IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiChrominanceBurstLength(void);
1265
1266 /** \brief Function to query the currently set burst length for Y, JPEG, or RAW data
1267 * \return @ref IfxCif_MiBurstLength_4BeatBursts if 4 bytes are transferred, @ref IfxCif_MiBurstLength_8BeatBursts if 8 bytes are transferred
1268 */
1269 IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiLuminanceBurstLength(void);
1270
1271 /** \brief Function to query the currently set write format of the main picture path of the memory interface
1272 * \return Currently set write format (one member of @ref IfxCif_MiMainPictureWriteFormat)
1273 */
1274 IFX_INLINE IfxCif_MiMainPictureWriteFormat IfxCif_getMiMainPictureWriteFormat(void);
1275
1276 /** \brief Function to query the filling level that triggers an interrupt of main picture path Y component
1277 * \return Filling level that triggers an interrupt
1278 */
1279 IFX_INLINE uint32 IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset(void);
1280
1281 /** \brief Function to query the filling level of the main picture Y component that triggers an interrupt
1282 * \return Filling level of the main picture Y component that triggers an interrupt
1283 */
1284 IFX_INLINE uint32 IfxCif_getMiMainPictureYInterruptOffset(void);
1285
1286 /** \brief Function to query the enabled state of the update signal of the offset counter shadow registers
1287 * \return @ref IfxCif_State_Enabled if update of the offset counter shadow registers is enabled (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port), @ref IfxCif_State_Disabled if update of the offset counter shadow registers is disabled
1288 */
1289 IFX_INLINE IfxCif_State IfxCif_getMiOffsetCounterInitializationEnableState(void);
1290
1291 /** \brief Function to skip the current or next starting main data path picture
1292 * \return None
1293 */
1294 IFX_INLINE void IfxCif_miSkipPicture(void);
1295
1296 /** \brief Function to enable or disable the update of the base address and buffer size shadow registers to the programmed register init values (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port)
1297 * \param state @ref IfxCif_State_Enabled to enable the generation of the update signal, @ref IfxCif_State_Disabled to disable the generation of the update signal
1298 * \return None
1299 */
1300 IFX_INLINE void IfxCif_setMiBaseAddressInitializationEnableState(IfxCif_State state);
1301
1302 /** \brief Function to enable or disable the change of byte order of the 32 bit output word
1303 * \param enableState @ref IfxCif_State_Enabled to enable byte swapping, @ref IfxCif_State_Disabled to disable byte swapping
1304 * \return None
1305 */
1306 IFX_INLINE void IfxCif_setMiByteSwapEnableState(IfxCif_State enableState);
1307
1308 /** \brief Function to set the burst length for Cb and Cr data
1309 * \param burstLength Burst length to set
1310 * \return None
1311 */
1312 IFX_INLINE void IfxCif_setMiChrominanceBurstLength(IfxCif_MiBurstLength burstLength);
1313
1314 /** \brief Function to set the write format of the main picture path of the memory interface
1315 * \param format Format to set
1316 * \return None
1317 */
1318 IFX_INLINE void IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat format);
1319
1320 /** \brief Function to set the filling level to trigger an interrupt for main picture path Y component
1321 * \param interruptOffset Filling level to set
1322 * \return None
1323 */
1324 IFX_INLINE void IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset(uint32 interruptOffset);
1325
1326 /** \brief Function to enable or disable the update of the offset counter shadow registers (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port)
1327 * \param state @ref IfxCif_State_Enabled to enable the generation of the update signal, @ref IfxCif_State_Disabled to disable the generation of the update signal
1328 * \return None
1329 */
1330 IFX_INLINE void IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State state);
1331
1332 /******************************************************************************/
1333 /*-------------------------Global Function Prototypes-------------------------*/
1334 /******************************************************************************/
1335
1336 /** \brief Function to clear an interrupt
1337 * \param interruptSource Source of the interrupt
1338 * \return None
1339 */
1340 IFX_EXTERN void IfxCif_clearMiInterrupt(IfxCif_MiInterruptSources interruptSource);
1341
1342 /** \brief Function to clear the status information of one status clear source of the memory interface submodule
1343 * \param source Status information source for which to clear the status
1344 * \return None
1345 */
1346 IFX_EXTERN void IfxCif_clearMiStatus(IfxCif_MiStatusClearSources source);
1347
1348 /** \brief Function to query the initial base address of the ring buffer of one main picture path component
1349 * \param component Main picture path component for which to query the initial base address
1350 * \return Initial base address of the main picture path component
1351 */
1352 IFX_EXTERN uint32 IfxCif_getMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component);
1353
1354 /** \brief Function to query the masked state of an interrupt
1355 * \param interruptSource Source of the interrupt
1356 * \return ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled
1357 */
1358 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource);
1359
1360 /** \brief Function to query the enabled state of one main data path component at the memory interface input
1361 * \param dataPath Main data path component for which to query the enabled state
1362 * \return @ref IfxCif_State_Enabled if the main data path component is enabled, @ref IfxCif_State_Disabled if the main data path component is disabled
1363 */
1364 IFX_EXTERN IfxCif_State IfxCif_getMiDataPathInputEnableState(IfxCif_MiDataPaths dataPath);
1365
1366 /** \brief Function to query the enabled state of one main data path component at the memory interface output
1367 * \param dataPath Main data path component for which to query the enabled state
1368 * \return @ref IfxCif_State_Enabled if the main data path component is enabled, @ref IfxCif_State_Disabled if the main data path component is disabled
1369 */
1370 IFX_EXTERN IfxCif_State IfxCif_getMiDataPathOutputEnableState(IfxCif_MiDataPaths dataPath);
1371
1372 /** \brief Function to query the enabled state of a memory interface data path
1373 * \param dataPath Data path to query
1374 * \return @ref IfxCif_State_Enabled if the memory interface data path is enabled, @ref IfxCif_State_Disabled if the data path is disabled
1375 */
1376 IFX_EXTERN IfxCif_State IfxCif_getMiFeatureEnableState(IfxCif_MiDataPaths dataPath);
1377
1378 /** \brief Function to query the enabled state of an interrupt
1379 * \param interruptSource Source of the interrupt
1380 * \return @ref IfxCif_State_Enabled if the interrupt is enabled, @ref IfxCif_State_Disabled if the interrupt is disabled
1381 */
1382 IFX_EXTERN IfxCif_State IfxCif_getMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource);
1383
1384 /** \brief Function to query the current base address of the ring buffer of one main picture path component
1385 * \param component Main Picture path component for which to query the base address
1386 * \return Current base address of the ring buffer of the main picture path component
1387 */
1388 IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentBaseAddress(IfxCif_MiMainPicturePathComponents component);
1389
1390 /** \brief Function to query the initial size of the ring buffer of one main picture path component
1391 * \param component Main picture path component for which to query the intial size
1392 * \return Initial size of the main picture path component
1393 */
1394 IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component);
1395
1396 /** \brief Function to query the initial offset counter inside the ring buffer of one main picture path compoent
1397 * \param component Main picture path component for which to query the initial offset counter
1398 * \return Initial offset counter value of the main picture path component
1399 */
1400 IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component);
1401
1402 /** \brief Function to query the current offset counter within the ring buffer of one main picture path component
1403 * \param component Main picture path component for which to query the offest counter value
1404 * \return Current offset counter within the ring buffer of the main picture path component
1405 */
1406 IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentOffsetCounter(IfxCif_MiMainPicturePathComponents component);
1407
1408 /** \brief Function to query the offset counter which points to the start address of the previously processed picture for one main picture path component
1409 * \param component Main picture path component for which to query the offset counter value
1410 * \return Offset counter value pointing to the start address of the previously processed picture
1411 */
1412 IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentOffsetCounterStart(IfxCif_MiMainPicturePathComponents component);
1413
1414 /** \brief Function to query the current size of the ring buffer of one main picture path component
1415 * \param component Main Picture path component for which to query the size
1416 * \return Current size of the ring buffer of the main picture path component
1417 */
1418 IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentSize(IfxCif_MiMainPicturePathComponents component);
1419
1420 /** \brief Function to query the status information of one status information source of the memory interface module
1421 * \param source Status information source for which to query the status information
1422 * \return @ref IfxCif_ErrorState_NoError if the error has occured since the last clear, @ref IfxCif_ErrorState_Error if the error has occured since the last clear
1423 */
1424 IFX_EXTERN IfxCif_ErrorState IfxCif_getMiStatusInformation(IfxCif_MiStatusInformationSources source);
1425
1426 /** \brief Function to query the raw state of an interrupt
1427 * \param interruptSource Source of the interrupt
1428 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, @ref IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set
1429 */
1430 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource);
1431
1432 /** \brief Function to enable or disable one memory interface data path
1433 * \param dataPath Data path to enable or disable
1434 * \param enableState @ref IfxCif_State_Enabled to enable the data path, @ref IfxCif_State_Disabled to disable the data path
1435 * \return None
1436 */
1437 IFX_EXTERN void IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths dataPath, IfxCif_State enableState);
1438
1439 /** \brief Function to enable or disable an interrupt
1440 * \param interruptSource Source of the interrupt to enable or disable
1441 * \param interruptEnableState @ref IfxCif_State_Enabled to enable the interrupt, @ref IfxCif_State_Disabled to disable the interrupt
1442 * \return None
1443 */
1444 IFX_EXTERN void IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState);
1445
1446 /** \brief Function to set an interrupt request bit (does not necessarily trigger an interrupt)
1447 * \param interruptSource Source of the interrupt
1448 * \return None
1449 */
1450 IFX_EXTERN void IfxCif_setMiInterruptRequestBit(IfxCif_MiInterruptSources interruptSource);
1451
1452 /** \brief Function to set the burst length for Y, JPEG, or RAW data
1453 * \param burstLength Burst length to set
1454 * \return None
1455 */
1456 IFX_EXTERN void IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength burstLength);
1457
1458 /** \brief Function to set the initial base address of the ring buffer for one main picture path component
1459 * \param component Main picture path component for which to set the initial base address
1460 * \param address Base address to set (must be word aligned)
1461 * \return None
1462 */
1463 IFX_EXTERN void IfxCif_setMiMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address);
1464
1465 /** \brief Function to set the initial size of the ring buffer for one main picture path component
1466 * \param component Main picture path component for which to set the initial size
1467 * \param size Size to set (must be word aligned)
1468 * \return None
1469 */
1470 IFX_EXTERN void IfxCif_setMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component, uint32 size);
1471
1472 /** \brief Function to set the initial offset counter inside the ring buffer for one main picture path component
1473 * \param component Main picture path component for which to set the initial offest counter
1474 * \param offsetCounter Offset counter value to set (must be word aligned)
1475 * \return None
1476 */
1477 IFX_EXTERN void IfxCif_setMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component, uint32 offsetCounter);
1478
1479 /** \} */
1480
1481 /** \addtogroup IfxLld_Cif_Std_jpeFunctions
1482 * \{ */
1483
1484 /******************************************************************************/
1485 /*-------------------------Inline Function Prototypes-------------------------*/
1486 /******************************************************************************/
1487
1488 /** \brief Function to query the current header generation debug control mode
1489 * \return Currently set header generation debug control mode (one member of @ref IfxCif_JpeHeaderGenerationMode)
1490 */
1491 IFX_INLINE IfxCif_JpeHeaderGenerationMode IfxCif_getJpeHeaderGenerationMode(void);
1492
1493 /** \brief Function to query the currently set JPE header mode
1494 * \return Currently set JPE header mode (one member of @ref IfxCif_JpeHeaderMode)
1495 */
1496 IFX_INLINE IfxCif_JpeHeaderMode IfxCif_getJpeHeaderMode(void);
1497
1498 /** \brief Function to query the JPE encode mode
1499 * \return Always 1, because this is the encoder only edition
1500 */
1501 IFX_INLINE IfxCif_State IfxCif_getJpeMode(void);
1502
1503 /** \brief Function to query the current restart interval
1504 * \return Current restart interval
1505 */
1506 IFX_INLINE uint16 IfxCif_getJpeRestartInterval(void);
1507
1508 /** \brief Function to get the current JPEG codec state
1509 * \return @ref IfxCif_JpeState_Busy if the JPEG codec is currently processing, @ref IfxCif_JpeState_Free if the JPEG codec is currently free
1510 */
1511 IFX_INLINE IfxCif_JpeState IfxCif_getJpeState(void);
1512
1513 /** \brief Function to query the current JPE Table ID
1514 * \return Current JPE Table ID
1515 */
1516 IFX_INLINE IfxCif_JpeTableId IfxCif_getJpeTableId(void);
1517
1518 /** \brief Function to query the current encoder continuous mode
1519 * \return Current encoder continuous mode (one member of @ref IfxCif_JpegJfifStreamEncoderContinuousMode)
1520 */
1521 IFX_INLINE IfxCif_JpegJfifStreamEncoderContinuousMode IfxCif_getJpegJfifStreamEncoderContinuousMode(void);
1522
1523 /** \brief Function to query the current picture encoding format
1524 * \return Current picture encoding format
1525 */
1526 IFX_INLINE IfxCif_JpegPictureEncodingFormat IfxCif_getJpegPictureEncodingFormat(void);
1527
1528 /** \brief Function to immediately start the JPEG encoder.
1529 * This function has to be called after @ref IfxCif_startJpegJfifStreamEncoder to start the JPEG encoder
1530 * \return None
1531 */
1532 IFX_INLINE void IfxCif_initJpegEncoder(void);
1533
1534 /** \brief Function to start to generate JPEG stream header. Auto reset after one clock cycle
1535 * \return None
1536 */
1537 IFX_INLINE void IfxCif_jpeGenerateHeader(void);
1538
1539 /** \brief Function to set the header generation debug control mode
1540 * \param headerGenerationMode Header generation debug control mode to set
1541 * \return None
1542 */
1543 IFX_INLINE void IfxCif_setJpeHeaderGenerationMode(IfxCif_JpeHeaderGenerationMode headerGenerationMode);
1544
1545 /** \brief Function to set the JPE header mode
1546 * \param headerMode Header mode to set
1547 * \return None
1548 */
1549 IFX_INLINE void IfxCif_setJpeHeaderMode(IfxCif_JpeHeaderMode headerMode);
1550
1551 /** \brief Function to set the restart interval
1552 * \param interval Restart interval to set
1553 * \return None
1554 */
1555 IFX_INLINE void IfxCif_setJpeRestartInterval(uint16 interval);
1556
1557 /** \brief Function to set the JPE Table LSB
1558 * \param data Value to set for the JPE Table LSB
1559 * \return None
1560 */
1561 IFX_INLINE void IfxCif_setJpeTableDataLsb(uint8 data);
1562
1563 /** \brief Function to set the JPE Table MSB
1564 * \param data Value to set for the JPE Table MSB
1565 * \return None
1566 */
1567 IFX_INLINE void IfxCif_setJpeTableDataMsb(uint8 data);
1568
1569 /** \brief Function to set the JPE Table ID
1570 * \param tableId tableId Table ID to set
1571 * \return None
1572 */
1573 IFX_INLINE void IfxCif_setJpeTableId(IfxCif_JpeTableId tableId);
1574
1575 /** \brief Function to set the JPEG codec image sizes
1576 * \param hSize Image horizontal size
1577 * \param vSize Image vertical size
1578 * \return None
1579 */
1580 IFX_INLINE void IfxCif_setJpegCodecImageSizes(uint16 hSize, uint16 vSize);
1581
1582 /** \brief Function to set the stream encoder continuous mode
1583 * \param mode Encoder continuous mode to set
1584 * \return None
1585 */
1586 IFX_INLINE void IfxCif_setJpegJfifStreamEncoderContinuousMode(IfxCif_JpegJfifStreamEncoderContinuousMode mode);
1587
1588 /** \brief Function to set the picture encoding format
1589 * \param format Encoding format to set
1590 * \return None
1591 */
1592 IFX_INLINE void IfxCif_setJpegPictureEncodingFormat(IfxCif_JpegPictureEncodingFormat format);
1593
1594 /** \brief Function to start JFIF stream encoding. Auto reset after one clock cycle
1595 * \return None
1596 */
1597 IFX_INLINE void IfxCif_startJpegJfifStreamEncoder(void);
1598
1599 /******************************************************************************/
1600 /*-------------------------Global Function Prototypes-------------------------*/
1601 /******************************************************************************/
1602
1603 /** \brief Function to clear an interrupt
1604 * \param interruptSource Source of the interrupt
1605 * \return None
1606 */
1607 IFX_EXTERN void IfxCif_clearJpeInterrupt(IfxCif_JpeInterruptSources interruptSource);
1608
1609 /** \brief Function to query the currently set Huffman Table length for AC values
1610 * \param table Huffman Table for which to query the current length
1611 * \return Current length of Huffman Table
1612 */
1613 IFX_EXTERN uint8 IfxCif_getHuffmanAcTableLength(IfxCif_HuffmanTables table);
1614
1615 /** \brief Function to check if a Huffman Table and a Huffman Table component is enabled for AC values
1616 * \param table Huffman Table to check
1617 * \param component Huffman Table component to check
1618 * \return @ref IfxCif_State_Enabled if the queried Huffman Table and the Huffman Table component is selected, @ref IfxCif_State_Disabled otherwise
1619 */
1620 IFX_EXTERN IfxCif_State IfxCif_getHuffmanAcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component);
1621
1622 /** \brief Function to query the current Huffman Table length for DC values
1623 * \param table Huffman Table for which to query the current length
1624 * \return Current length of Huffman Table
1625 */
1626 IFX_EXTERN uint8 IfxCif_getHuffmanDcTableLength(IfxCif_HuffmanTables table);
1627
1628 /** \brief Function to check if a Huffman Table and a Huffman Table component is enabled for DC values
1629 * \param table Huffman Table to check
1630 * \param component Huffman Table component to check
1631 * \return @ref IfxCif_State_Enabled if the queried Huffman Table and the Huffman Table component is selected, @ref IfxCif_State_Disabled otherwise
1632 */
1633 IFX_EXTERN IfxCif_State IfxCif_getHuffmanDcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component);
1634
1635 /** \brief Function to query the state of one JPE debug signal source
1636 * \param source Signal source for which to query the debug signal state
1637 * \return @ref IfxCif_JpeDebugSignalState_Inactive if the debug signal is currently inactive, @ref IfxCif_JpeDebugSignalState_Active if the debug signal is currently active
1638 */
1639 IFX_EXTERN IfxCif_JpeDebugSignalState IfxCif_getJpeDebugSignalState(IfxCif_JpeDebugSignalSources source);
1640
1641 /** \brief Function to query the enabled state of an interrupt
1642 * \param interruptSource Source of the interrupt
1643 * \return @ref IfxCif_State_Enabled if the interrupt is enabled, @ref IfxCif_State_Disabled if the interrupt is disabled
1644 */
1645 IFX_EXTERN IfxCif_State IfxCif_getJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource);
1646
1647 /** \brief Function to query the currently selected Q-Table for one component
1648 * \param component Component for which to query the currently selected Q-Table
1649 * \return Currently selected Q-Table
1650 */
1651 IFX_EXTERN IfxCif_JpeQTableSelector IfxCif_getJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component);
1652
1653 /** \brief Function to query the current enabled state of the scaling of an input value source
1654 * \param source Input value source for which to query the enabled state
1655 * \return @ref IfxCif_State_Enabled if scaling is enabled, @ref IfxCif_State_Disabled if scaling is disabled
1656 */
1657 IFX_EXTERN IfxCif_State IfxCif_getJpeScalingEnableState(IfxCif_JpeScalingValueSources source);
1658
1659 /** \brief Function to query the currently set JPEG codec image size of one tier
1660 * \param tier Tier for which to query the JPEG codec image size
1661 * \return Currently set image size for R2B and SGEN blocks
1662 */
1663 IFX_EXTERN uint16 IfxCif_getJpegCodecImageSize(IfxCif_ImageTiers tier);
1664
1665 /** \brief Function to query the masked state of an interrupt
1666 * \param interruptSource Source of the interrupt
1667 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled
1668 */
1669 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource);
1670
1671 /** \brief Function to query the raw state of an interrupt
1672 * \param interruptSource Source of the interrupt
1673 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, @ref IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set
1674 */
1675 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource);
1676
1677 /**
1678 * \return None
1679 */
1680 IFX_EXTERN void IfxCif_programJpeTable(IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length);
1681
1682 /** \brief Function to set the Huffman Table length for AC values
1683 * \param table Huffman Table for which to set the length
1684 * \param length Length to set
1685 * \return None
1686 */
1687 IFX_EXTERN void IfxCif_setHuffmanAcTableLength(IfxCif_HuffmanTables table, uint8 length);
1688
1689 /** \brief Function to set the Huffman Table selector for AC Values
1690 * \param table Huffman Table to select
1691 * \param component Huffman Table component to select
1692 * \return None
1693 */
1694 IFX_EXTERN void IfxCif_setHuffmanAcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component);
1695
1696 /** \brief Function to set the Huffman Table length for DC values
1697 * \param table Huffman Table for which to set the length
1698 * \param length Length to set
1699 * \return None
1700 */
1701 IFX_EXTERN void IfxCif_setHuffmanDcTableLength(IfxCif_HuffmanTables table, uint8 length);
1702
1703 /** \brief Function to set the Huffman Table selector for DC values
1704 * \param table Huffman Table to select
1705 * \param component Huffman Table component to select
1706 * \return None
1707 */
1708 IFX_EXTERN void IfxCif_setHuffmanDcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component);
1709
1710 /** \brief Function to enable or disable an interrupt
1711 * \param interruptSource Source of the interrupt to enable or disable
1712 * \param interruptEnableState @ref IfxCif_State_Enabled to enable the interrupt, @ref IfxCif_State_Disabled to disable the interrupt
1713 * \return None
1714 */
1715 IFX_EXTERN void IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState);
1716
1717 /** \brief Function to set an interrupt request bit (does not necessarily trigger an interrupt)
1718 * \param interruptSource Source of the interrupt
1719 * \return None
1720 */
1721 IFX_EXTERN void IfxCif_setJpeInterruptRequestBit(IfxCif_JpeInterruptSources interruptSource);
1722
1723 /** \brief Function to set the Q-Table selector for one component
1724 * \param component Component for which to select the Q-Table
1725 * \param selector Q-Table to select
1726 * \return None
1727 */
1728 IFX_EXTERN void IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector);
1729
1730 /** \brief Function to enable or disable scaling of one input value source
1731 * \param source Input value source for which to query the enabled state
1732 * \param scalingEnable @ref IfxCif_State_Enabled to enable scaling, @ref IfxCif_State_Disabled to disable scaling
1733 * \return None
1734 */
1735 IFX_EXTERN void IfxCif_setJpeScalingEnableState(IfxCif_JpeScalingValueSources source, IfxCif_State scalingEnable);
1736
1737 /** \brief Function to set the JPEG codec image size of one tier
1738 * \param tier Tier for which to set the JPEG codec image size
1739 * \param size Image size for R2B and SGEN blocks
1740 * \return None
1741 */
1742 IFX_EXTERN void IfxCif_setJpegCodecImageSize(IfxCif_ImageTiers tier, uint16 size);
1743
1744 /** \} */
1745
1746 /** \addtogroup IfxLld_Cif_Std_swFunctions
1747 * \{ */
1748
1749 /******************************************************************************/
1750 /*-------------------------Inline Function Prototypes-------------------------*/
1751 /******************************************************************************/
1752
1753 /** \brief Function to query the currently set watchdog predivider
1754 * \return Currently set predivider
1755 */
1756 IFX_INLINE uint16 IfxCif_getSecurityWatchdogCounterPredivider(void);
1757
1758 /** \brief Function to query the enabled state of the watchdog unit
1759 * \return @ref IfxCif_State_Enabled if the watchdog unit is enabled, @ref IfxCif_State_Disabled if the watchdog unit is disabled
1760 */
1761 IFX_INLINE IfxCif_State IfxCif_getSecurityWatchdogEnableState(void);
1762
1763 /** \brief Function to set the watchdog predivider counter (A value of 0 means that the Watchdog Counters are increased with every CIF clock cycle. Every other value N leads to an increment at every N+1th cycle)
1764 * \param predivider Predivider to set
1765 * \return None
1766 */
1767 IFX_INLINE void IfxCif_setSecurityWatchdogCounterPredivider(uint16 predivider);
1768
1769 /** \brief Function to enable or disable the watchdog unit
1770 * \param enableState @ref IfxCif_State_Enabled to enable the watchdog unit, @ref IfxCif_State_Disabled to disable the watchdog unit
1771 * \return None
1772 */
1773 IFX_INLINE void IfxCif_setSecurityWatchdogEnableState(IfxCif_State enableState);
1774
1775 /******************************************************************************/
1776 /*-------------------------Global Function Prototypes-------------------------*/
1777 /******************************************************************************/
1778
1779 /** \brief Function to clear an interrupt
1780 * \param interruptSource Source of the interrupt
1781 * \return None
1782 */
1783 IFX_EXTERN void IfxCif_clearSecurityWatchdogInterrupt(IfxCif_SecurityWatchdogInterruptSources interruptSource);
1784
1785 /** \brief Function to get the masked state of an interrupt
1786 * \param interruptSource Source of the interrupt
1787 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled
1788 */
1789 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource);
1790
1791 /** \brief Function to get the raw state of an interrupt
1792 * \param interruptSource Source of the interrupt
1793 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, @ref IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set
1794 */
1795 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource);
1796
1797 /** \brief Function to query the enabled state of an interrupt
1798 * \param interruptSource Source of the interrupt
1799 * \return @ref IfxCif_State_Enabled if the interrupt is enabled, @ref IfxCif_State_Disabled if the interrupt is disabled
1800 */
1801 IFX_EXTERN IfxCif_State IfxCif_getSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource);
1802
1803 /** \brief Function to query the current value of a timeout counter of one tier
1804 * \param tier Tier for which to query the timeout counter
1805 * \param timeoutCounter Timeout counter to query
1806 * \return Current timeout
1807 */
1808 IFX_EXTERN uint16 IfxCif_getSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter);
1809
1810 /** \brief Function to reset one watchdog counter
1811 * \param counter Counter to reset
1812 * \return None
1813 */
1814 IFX_EXTERN void IfxCif_resetSecurityWatchdogCounter(IfxCif_SecurityWatchdogCounters counter);
1815
1816 /** \brief Function to enable or disable an interrupt
1817 * \param interruptSource Source of the interrupt to enable or disable
1818 * \param interruptEnableState @ref IfxCif_State_Enabled to enable the interrupt, @ref IfxCif_State_Disabled to disable the interrupt
1819 * \return None
1820 */
1821 IFX_EXTERN void IfxCif_setSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource, IfxCif_State interruptEnableState);
1822
1823 /** \brief Function to set an interrupt request bit (does not necessarily trigger an interrupt)
1824 * \param interruptSource Source of the interrupt
1825 * \return None
1826 */
1827 IFX_EXTERN void IfxCif_setSecurityWatchdogInterruptRequestBit(IfxCif_SecurityWatchdogInterruptSources interruptSource);
1828
1829 /** \brief Function to set the timeout for a watchdog timeout counter of one tier. A value of 0 disables the timeout
1830 * \param tier Tier for which to set the timeout
1831 * \param timeoutCounter Timeout counter for which to set the timeout
1832 * \param timeout Timeout to set
1833 * \return None
1834 */
1835 IFX_EXTERN void IfxCif_setSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter, uint16 timeout);
1836
1837 /** \} */
1838
1839 /** \addtogroup IfxLld_Cif_Std_ispisFunctions
1840 * \{ */
1841
1842 /******************************************************************************/
1843 /*-------------------------Inline Function Prototypes-------------------------*/
1844 /******************************************************************************/
1845
1846 /** \brief Function to query the enabled state of image stabilization
1847 * \return @ref IfxCif_State_Enabled if image stabilization is enabled, @ref IfxCif_State_Disabled if image stabilization is disabled
1848 */
1849 IFX_INLINE IfxCif_State IfxCif_getIspisEnableState(void);
1850
1851 /** \brief Function to query the current image stabilization recenter value
1852 * \return Current image stabilization recenter value
1853 */
1854 IFX_INLINE uint8 IfxCif_getIspisRecenterValue(void);
1855
1856 /** \brief Function to enable or disable image stabilization
1857 * \param enableState @ref IfxCif_State_Enabled to enable image stabilization, @ref IfxCif_State_Disabled to disable image stabilization
1858 * \return None
1859 */
1860 IFX_INLINE void IfxCif_setIspisEnableState(IfxCif_State enableState);
1861
1862 /** \brief Function to set the image stabilization offsets of the output window
1863 * \param hOffset Horizontal Offset
1864 * \param vOffset Vertical Offset
1865 * \return None
1866 */
1867 IFX_INLINE void IfxCif_setIspisOutputWindowOffsets(IfxCif_ImageTiers hOffset, uint16 vOffset);
1868
1869 /** \brief Function to set the picture size
1870 * \param hSize Horizontal Picture Size
1871 * \param vSize Vertical Picture Size
1872 * \return None
1873 */
1874 IFX_INLINE void IfxCif_setIspisPictureSizes(uint16 hSize, uint16 vSize);
1875
1876 /** \brief Function to set the image stabilization recenter value
1877 * \param value Recenter value to set (0 to disabled recenter value, for all other values recentering is active (cur_h/v_offs-H/V_OFFS)/2 power(recenter))
1878 * \return None
1879 */
1880 IFX_INLINE void IfxCif_setIspisRecenterValue(uint8 value);
1881
1882 /******************************************************************************/
1883 /*-------------------------Global Function Prototypes-------------------------*/
1884 /******************************************************************************/
1885
1886 /** \brief Function to query the current camera displacement for one tier
1887 * \param tier Tier for which to query the camera displacement
1888 * \return Current camera displacement
1889 */
1890 IFX_EXTERN uint16 IfxCif_getIspisCameraDisplacement(IfxCif_ImageTiers tier);
1891
1892 /** \brief Function to query the offset of the current picture for one tier
1893 * \param tier Tier for which to query the offset
1894 * \return Offset of the current picture
1895 */
1896 IFX_EXTERN uint16 IfxCif_getIspisCurrentPictureOffset(IfxCif_ImageTiers tier);
1897
1898 /** \brief Function to query the picture size of the current picture for one tier
1899 * \param tier Tier for which to query the picture size
1900 * \return Picture size of the current picture
1901 */
1902 IFX_EXTERN uint16 IfxCif_getIspisCurrentPictureSize(IfxCif_ImageTiers tier);
1903
1904 /** \brief Function to query the current maximum displacement for one tier
1905 * \param tier Tier for which to query the maximum displacement
1906 * \return Current maximum displacement
1907 */
1908 IFX_EXTERN uint16 IfxCif_getIspisMaximumDisplacement(IfxCif_ImageTiers tier);
1909
1910 /** \brief Function to query the current image stabilization offset of the output window of one tier
1911 * \param tier Tier for which to query the offset
1912 * \return Current offset
1913 */
1914 IFX_EXTERN uint16 IfxCif_getIspisOffsetOutputWindow(IfxCif_ImageTiers tier);
1915
1916 /** \brief Function to query the current picture size for one tier
1917 * \param tier Tier for which to query the picture size
1918 * \return Current picture size
1919 */
1920 IFX_EXTERN uint16 IfxCif_getIspisPictureSize(IfxCif_ImageTiers tier);
1921
1922 /** \brief Function to query the enabled state of image stabilization recenter feature
1923 * \return @ref IfxCif_State_Enabled if the image stabilization recenter feature is enabled, @ref IfxCif_State_Disabled if the image stabilization recenter feature is disabled
1924 */
1925 IFX_EXTERN IfxCif_State IfxCif_getIspisRecenterEnableState(void);
1926
1927 /** \brief Function to set the camera displacement for one tier
1928 * \param tier Tier for which to set the camera displacement
1929 * \param displacement Camera displacement to set
1930 * \return None
1931 */
1932 IFX_EXTERN void IfxCif_setIspisCameraDisplacement(uint16 tier, uint16 displacement);
1933
1934 /** \brief Function to set the maximum displacement for one tier
1935 * \param tier Tier for which to set the maximum displacement
1936 * \param displacement Displacement to set
1937 * \return None
1938 */
1939 IFX_EXTERN void IfxCif_setIspisMaximumDisplacement(IfxCif_ImageTiers tier, uint16 displacement);
1940
1941 /** \brief Function to set the image stabilization offset of the output window of one tier
1942 * \param tier Tier for which to set the offset
1943 * \param offset Offset to set
1944 * \return None
1945 */
1946 IFX_EXTERN void IfxCif_setIspisOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset);
1947
1948 /** \brief Function to set the picture size for one tier
1949 * \param tier Tier for which to set the picture size
1950 * \param size Size to set
1951 * \return None
1952 */
1953 IFX_EXTERN void IfxCif_setIspisPictureSize(IfxCif_ImageTiers tier, uint16 size);
1954
1955 /** \} */
1956
1957 /** \addtogroup IfxLld_Cif_Std_epFunctions
1958 * \{ */
1959
1960 /******************************************************************************/
1961 /*-------------------------Global Function Prototypes-------------------------*/
1962 /******************************************************************************/
1963
1964 /** \brief Function to clear one extra path error
1965 * \param source Extra path error to clear
1966 * \return None
1967 */
1968 IFX_EXTERN void IfxCif_clearEpError(IfxCif_EpErrorClearSources source);
1969
1970 /** \brief Function to clear an interrupt
1971 * \param z Extra path for which to clear the interrupt
1972 * \param interruptSource Source of the interrupt
1973 * \return None
1974 */
1975 IFX_EXTERN void IfxCif_clearEpInterrupt(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource);
1976
1977 /** \brief Function to trigger an immediate configuration update for one extra path
1978 * \param z Function to trigger an immediate configuration update for one extra path
1979 * \return None
1980 */
1981 IFX_EXTERN void IfxCif_epForceConfigurationUpdate(IfxCif_ExtraPath z);
1982
1983 /** \brief Function to skip one picture of one extra path
1984 * \param z Extra path for which to skip one picture
1985 * \return None
1986 */
1987 IFX_EXTERN void IfxCif_epSkipPicture(IfxCif_ExtraPath z);
1988
1989 /** \brief Function to query the current base address of the ring buffer of one extra path
1990 * \param z Extra path for which to query the current base address of the ring buffer
1991 * \return Current base address of the ring buffer
1992 */
1993 IFX_EXTERN uint32 IfxCif_getEpBaseAddress(IfxCif_ExtraPath z);
1994
1995 /** \brief Function to query the initial base address of the ring buffer of one extra path
1996 * \param z Extra path for which to query the initial base address
1997 * \return Initial base address of the ring buffer of the extra path
1998 */
1999 IFX_EXTERN uint32 IfxCif_getEpBaseInitAddress(IfxCif_ExtraPath z);
2000
2001 /** \brief Function to query the image cropping camera displacement of one tier of one extra path
2002 * \param z Extra path for which to query the image cropping camera displacement
2003 * \param tier Tier for which to query the image cropping camera displacement
2004 * \return Current image cropping camera displacement
2005 */
2006 IFX_EXTERN uint16 IfxCif_getEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
2007
2008 /** \brief Function to query the current image cropping picture offset of one tier of one extra path
2009 * \param z Extra path for which to query the current image cropping picture offset
2010 * \param tier Tier for which to query the current image cropping picture offset
2011 * \return Current image cropping picture offset
2012 */
2013 IFX_EXTERN uint16 IfxCif_getEpCroppingCurrentPictureOffset(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
2014
2015 /** \brief Function to query the current image cropping picture size of one tier of one extra path
2016 * \param z Extra path for which to query the current image cropping picture size
2017 * \param tier Tier for which to query the current image cropping picture size
2018 * \return Current image cropping picture size
2019 */
2020 IFX_EXTERN uint16 IfxCif_getEpCroppingCurrentPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
2021
2022 /** \brief Function to query the image cropping enabled state of one extra path
2023 * \param z Extra path for which to query the image cropping enabled state
2024 * \return @ref IfxCif_State_Enabled if image cropping is enabled, @ref IfxCif_State_Disabled otherwise
2025 */
2026 IFX_EXTERN IfxCif_State IfxCif_getEpCroppingEnableState(IfxCif_ExtraPath z);
2027
2028 /** \brief Function to query the maximum displacement of one tier of one extra path
2029 * \param z Extra path for which to query the maximum displacement
2030 * \param tier Tier for which to query the maximum displacement
2031 * \return Current maximum displacement
2032 */
2033 IFX_EXTERN uint16 IfxCif_getEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
2034
2035 /** \brief Function to query the image cropping offset of the output window of one tier of one extra path
2036 * \param z Extra path for which to query the image cropping offset of the output window
2037 * \param tier Tier for which to query the image cropping offset of the output window
2038 * \return Current image cropping offset of the output window
2039 */
2040 IFX_EXTERN uint16 IfxCif_getEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
2041
2042 /** \brief Function to query the image cropping picture size of one tier of one extra path
2043 * \param z Extra path for which to query the image cropping picture size
2044 * \param tier Tier for which to query the image cropping picture size of one tier of one extra path
2045 */
2046 IFX_EXTERN uint16 IfxCif_getEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
2047
2048 /** \brief Function to query the enabled state of the recenter feature of one extra path
2049 * \param z Extra path for which to query the enabled state of the recenter feature
2050 * \return @ref IfxCif_State_Enabled if the recenter feature is enabled, @ref IfxCif_State_Disabled otherwise
2051 */
2052 IFX_EXTERN IfxCif_State IfxCif_getEpCroppingRecenterState(IfxCif_ExtraPath z);
2053
2054 /** \brief Function to query the state of an extra path error source
2055 * \param source Error source for which to query the state
2056 * \return @ref IfxCif_ErrorState_NoError if the error did not occur, @ref IfxCif_ErrorState_Error if the error occured
2057 */
2058 IFX_EXTERN IfxCif_ErrorState IfxCif_getEpErrorState(IfxCif_EpErrorSources source);
2059
2060 /** \brief Function to query the enabled state of one feature of one extra path
2061 * \param z Extra path for which to query the enabled state of the feature
2062 * \param feature Feature which to query
2063 * \return @ref IfxCif_State_Enabled if the feature of the extra path is enabled, @ref IfxCif_State_Disabled if the feature of the extra path is disabled
2064 */
2065 IFX_EXTERN IfxCif_State IfxCif_getEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature);
2066
2067 /** \brief Function to query the initial size of the ring buffer of one extra path
2068 * \param z Extra path for which to query the initial size
2069 * \return Initial size of the ring buffer of the extra path
2070 */
2071 IFX_EXTERN uint32 IfxCif_getEpInitSize(IfxCif_ExtraPath z);
2072
2073 /** \brief Function to query the initial filling level interrupt offset of one extra path
2074 * \param z Extra path for which to query the initial filling level interrupt offset
2075 * \return Initial filling level interrupt offset of the extra path
2076 */
2077 IFX_EXTERN uint32 IfxCif_getEpInitialFillLevelInterruptOffset(IfxCif_ExtraPath z);
2078
2079 /** \brief Function to query the initial offset counter of one extra path
2080 * \param z Extra path for which to query the initial offset counter
2081 * \return Initial offset counter of the extra path
2082 */
2083 IFX_EXTERN uint32 IfxCif_getEpInitialOffsetCounter(IfxCif_ExtraPath z);
2084
2085 /** \brief Function to query the current input enable state of one extra path
2086 * \param z Extra path for which to query the current input enable state
2087 * \return @ref IfxCif_State_Enabled if the extra path is used in module MI_IN, @ref IfxCif_State_Disabled if the extra path is not used in module MI_IN
2088 */
2089 IFX_EXTERN IfxCif_State IfxCif_getEpInputEnableState(IfxCif_ExtraPath z);
2090
2091 /** \brief Function to query the enabled state of an interrupt
2092 * \param z Extra path for which to query the enabled state of the interrupt
2093 * \param interruptSource Source of the interrupt
2094 * \return @ref IfxCif_State_Enabled if the interrupt is enabled, @ref IfxCif_State_Disabled if the interrupt is disabled
2095 */
2096 IFX_EXTERN IfxCif_State IfxCif_getEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource);
2097
2098 /** \brief Function to query the current interrupt offset of one extra path
2099 * \param z Extra path for which to query the current interrupt offset
2100 * \return Current interrupt offset
2101 */
2102 IFX_EXTERN uint32 IfxCif_getEpInterruptOffset(IfxCif_ExtraPath z);
2103
2104 /** \brief Function to query the current offset counter of one extra path
2105 * \param z Extra path for which to query the current offset counter
2106 * \return Current offset counter
2107 */
2108 IFX_EXTERN uint32 IfxCif_getEpOffsetCounter(IfxCif_ExtraPath z);
2109
2110 /** \brief Function to query the initial offset counter start value of one extra path
2111 * \param z Extra path for which to query the initial offset counter start value
2112 * \return Initial offset counter start value of the extra path
2113 */
2114 IFX_EXTERN uint32 IfxCif_getEpOffsetCounterStart(IfxCif_ExtraPath z);
2115
2116 /** \brief Function to query the current output enable state of one extra path
2117 * \param z Extra path for which to query the current output enable state
2118 * \return @ref IfxCif_State_Enabled if the extra path is used in module MI_OUT, @ref IfxCif_State_Disabled if the extra path is not used in module MI_OUT
2119 */
2120 IFX_EXTERN IfxCif_State IfxCif_getEpOutputEnableState(IfxCif_ExtraPath z);
2121
2122 /** \brief Function to query the current recenter value of one extra path
2123 * \param z Extra path for which to query the current recenter value
2124 * \return Current recenter value
2125 */
2126 IFX_EXTERN uint8 IfxCif_getEpRecenterValue(IfxCif_ExtraPath z);
2127
2128 /** \brief Function to query the current ring buffer size of one extra path
2129 * \param z Extra path for which to query the ring buffer size
2130 * \return Current ring buffer size
2131 */
2132 IFX_EXTERN uint32 IfxCif_getEpSize(IfxCif_ExtraPath z);
2133
2134 /** \brief Function to query the write format of one extra path
2135 * \param z Extra path for which to query the write format
2136 * \return Set write format of the extra path (one member of @ref IfxCif_EpWriteFormat)
2137 */
2138 IFX_EXTERN IfxCif_EpWriteFormat IfxCif_getEpWriteFormat(IfxCif_ExtraPath z);
2139
2140 /** \brief Function to get the masked state of an interrupt
2141 * \param z Extra path for which to query the interrupt state
2142 * \param interruptSource Source of the interrupt
2143 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled
2144 */
2145 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource);
2146
2147 /** \brief Function to query the raw state of an interrupt
2148 * \param z Extra path for which to query the interrupt state
2149 * \param interruptSource Source of the interrupt
2150 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, @ref IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set
2151 */
2152 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource);
2153
2154 /** \brief Function to set the initial base address of the ring buffer of one extra path
2155 * \param z Extra path for which to set the initial base address
2156 * \param baseAddress Initial base address of the ring buffer to set
2157 * \return None
2158 */
2159 IFX_EXTERN void IfxCif_setEpBaseInitAddress(IfxCif_ExtraPath z, Ifx_AddressValue baseAddress);
2160
2161 /** \brief Function to set the image cropping camera displacement of one tier of one extra path
2162 * \param z Extra path for which to set the image cropping camera displacement
2163 * \param tier Tier for which to set the image cropping camera displacement
2164 * \param displacement Image cropping camera displacement to set
2165 * \return None
2166 */
2167 IFX_EXTERN void IfxCif_setEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement);
2168
2169 /** \brief Function to enable or disable image cropping of one extra path
2170 * \param z Extra path for which to enable or disable image cropping
2171 * \param enableState @ref IfxCif_State_Enabled to enable image cropping, @ref IfxCif_State_Disabled to disable image cropping
2172 * \return None
2173 */
2174 IFX_EXTERN void IfxCif_setEpCroppingEnableState(IfxCif_ExtraPath z, uint32 enableState);
2175
2176 /** \brief Function to set the maximum displacement of one tier of one extra path
2177 * \param z Extra path for which to set the maximum displacement
2178 * \param tier Tier for which to set the maximum displacement
2179 * \param displacement Maximum displacement to set
2180 * \return None
2181 */
2182 IFX_EXTERN void IfxCif_setEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement);
2183
2184 /** \brief Function to set the image cropping offset of the output window of one tier of one extra path
2185 * \param z Extra path for which to set the image cropping offset of the output window
2186 * \param tier Tier for which to set the image cropping offset of the output window
2187 * \param offset Offset to set
2188 * \return None
2189 */
2190 IFX_EXTERN void IfxCif_setEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 offset);
2191
2192 /** \brief Function to set the image cropping offsets of the output window of one extra path
2193 * \param z Extra path for which to set the image cropping offset of the output window
2194 * \param hOffset Offset horizontal to set
2195 * \param vOffset Offset vertical to set
2196 * \return None
2197 */
2198 IFX_EXTERN void IfxCif_setEpCroppingOffsetsOutputWindow(IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset);
2199
2200 /** \brief Function to set the image cropping picture size of one tier of one extra path
2201 * \param z Extra path for which to set the image cropping picture size
2202 * \param tier Tier for which to set the image cropping picture size
2203 * \param size Image cropping picture size to set
2204 * \return None
2205 */
2206 IFX_EXTERN void IfxCif_setEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 size);
2207
2208 /** \brief Function to set the image cropping picture sizes one extra path
2209 * \param z Extra path for which to set the image cropping picture size
2210 * \param hSize Image cropping picture horizontal size to set
2211 * \param vSize Image cropping picture vertical size to set
2212 * \return None
2213 */
2214 IFX_EXTERN void IfxCif_setEpCroppingPictureSizes(IfxCif_ExtraPath z, uint16 hSize, uint16 vSize);
2215
2216 /** \brief Function to enable or disable one feature of one extra path
2217 * \param z Extra path for which to enable or disable one feature
2218 * \param feature Feature to enable or disable
2219 * \param enableState @ref IfxCif_State_Enabled to enable the feature, @ref IfxCif_State_Disabled to disable the feature
2220 * \return None
2221 */
2222 IFX_EXTERN void IfxCif_setEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState);
2223
2224 /** \brief Function to set the initial size of the ring buffer of one extra path
2225 * \param z Extra path for which to set the initial size of the ring buffer
2226 * \param size Initial size of the ring buffer to se
2227 * \return None
2228 */
2229 IFX_EXTERN void IfxCif_setEpInitSize(IfxCif_ExtraPath z, uint32 size);
2230
2231 /** \brief Function to set the initial filling level interrupt offset of one extra path
2232 * \param z Extra path for which to set the initial filling level interrupt offset
2233 * \param interruptOffset Initial filling level interrupt offset to set
2234 * \return None
2235 */
2236 IFX_EXTERN void IfxCif_setEpInitialFillLevelInterruptOffset(uint32 z, uint32 interruptOffset);
2237
2238 /** \brief Function to set the initial offset counter of one extra path
2239 * \param z Extra path for which to set the initial offset counter
2240 * \param offsetCounter Initial offset counter to set
2241 * \return None
2242 */
2243 IFX_EXTERN void IfxCif_setEpInitialOffsetCounter(IfxCif_ExtraPath z, uint32 offsetCounter);
2244
2245 /** \brief Function to enable or disable an interrupt
2246 * \param z Extra path for which to enable or disable the interrupt
2247 * \param interruptSource Source of the interrupt to enable or disable
2248 * \param interruptEnableState @ref IfxCif_State_Enabled to enable the interrupt, @ref IfxCif_State_Disabled to disable the interrupt
2249 * \return None
2250 */
2251 IFX_EXTERN void IfxCif_setEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource, IfxCif_State interruptEnableState);
2252
2253 /** \brief Function to set an interrupt request bit (does not necessarily trigger an interrupt)
2254 * \param z Function to set an interrupt request bit (does not necessarily trigger an interrupt)
2255 * \param interruptSource Extra path for which to set the interrupt request bit
2256 * \return None
2257 */
2258 IFX_EXTERN void IfxCif_setEpInterruptRequestBit(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource);
2259
2260 /** \brief Function to set the initial offset counter start value of one extra path
2261 * \param z Extra path for which to set the initial offset counter start value
2262 * \param offsetCounter Initial offset counter start value to set
2263 * \return None
2264 */
2265 IFX_EXTERN void IfxCif_setEpOffsetCounterStart(uint32 z, uint32 offsetCounter);
2266
2267 /** \brief Function to set the recenter value of one extra path (0 to switch the recenter feature off, for all other values recentering is active (cur_h/v_offs-H/V_OFFS)/2power(recenter))
2268 * \param z Extra path for which to set the recenter value
2269 * \param value Recenter value to set
2270 * \return None
2271 */
2272 IFX_EXTERN void IfxCif_setEpRecenterValue(IfxCif_ExtraPath z, uint8 value);
2273
2274 /** \brief Function to set the write format for one extra path
2275 * \param z Extra path for which to set the write format
2276 * \param writeFormat Write format to set
2277 * \return None
2278 */
2279 IFX_EXTERN void IfxCif_setEpWriteFormat(IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat);
2280
2281 /** \} */
2282
2283 /** \addtogroup IfxLld_Cif_Std_dpFunctions
2284 * \{ */
2285
2286 /******************************************************************************/
2287 /*-------------------------Inline Function Prototypes-------------------------*/
2288 /******************************************************************************/
2289
2290 /** \brief Function to query the debug path enabled state
2291 * \return @ref IfxCif_State_Enabled if the debug path is enabled, @ref IfxCif_State_Disabled if the debug path is disabled
2292 */
2293 IFX_INLINE IfxCif_State IfxCif_getDpEnableState(void);
2294
2295 /** \brief Function to query the selected debug path source path
2296 * \return Currently selected debug path source path (one member of @ref IfxCif_DpSourcePath)
2297 */
2298 IFX_INLINE IfxCif_DpSourcePath IfxCif_getDpSourcePath(void);
2299
2300 /** \brief Function to enable or disable the debug path
2301 * \param enableState @ref IfxCif_State_Enabled to enable the debug path, @ref IfxCif_State_Disabled to disable the debug path
2302 * \return None
2303 */
2304 IFX_INLINE void IfxCif_setDpEnableState(IfxCif_State enableState);
2305
2306 /** \brief Function to select one debug path source path
2307 * \param sourcePath Source path to select
2308 * \return None
2309 */
2310 IFX_INLINE void IfxCif_setDpSourcePath(IfxCif_DpSourcePath sourcePath);
2311
2312 /******************************************************************************/
2313 /*-------------------------Global Function Prototypes-------------------------*/
2314 /******************************************************************************/
2315
2316 /** \brief Function to reset one debug path counter
2317 * \param counter Debug path counter to reset
2318 * \return None
2319 */
2320 IFX_EXTERN void IfxCif_dpResetCounter(IfxCif_DpCounters counter);
2321
2322 /** \brief Function to query the transmission enabled state of one debug path control source
2323 * \param source Source for which to query the transmission enabled state
2324 * \return @ref IfxCif_State_Enabled if transmission is enabled, @ref IfxCif_State_Disabled if transmission is disabled
2325 */
2326 IFX_EXTERN IfxCif_State IfxCif_getDpControlEnableState(IfxCif_DpControlSources source);
2327
2328 /** \brief Function to query the current counter value of one debug path counter
2329 * \param counter Counter for which to query the value
2330 * \return Current counter value
2331 */
2332 IFX_EXTERN uint32 IfxCif_getDpCounter(IfxCif_DpCounters counter);
2333
2334 /** \brief Function to query the value of one user defined debug symbol
2335 * \param x User defined symbol to query
2336 * \return Value of the user defined debug symbol
2337 */
2338 IFX_EXTERN uint16 IfxCif_getDpUserDefinedSymbol(uint8 x);
2339
2340 /** \brief Function to enable or disable transmission of one debug path control source
2341 * \param source Source for which to enable or disable transmission
2342 * \param enableState @ref IfxCif_State_Enabled to enable transmission, @ref IfxCif_State_Disabled to disable transmission
2343 * \return None
2344 */
2345 IFX_EXTERN void IfxCif_setDpControlEnableState(IfxCif_DpControlSources source, IfxCif_State enableState);
2346
2347 /** \brief Function to set one debug path counter to a counter value
2348 * \param counter Counter to set
2349 * \param counterValue Counter value to set
2350 * \return None
2351 */
2352 IFX_EXTERN void IfxCif_setDpCounter(IfxCif_DpCounters counter, uint32 counterValue);
2353
2354 /** \brief Function to set one user defined debug symbol
2355 * \param x User defined symbol to set
2356 * \param value Value to set
2357 * \return None
2358 */
2359 IFX_EXTERN void IfxCif_setDpUserDefinedSymbol(uint8 x, uint16 value);
2360
2361 /** \} */
2362
2363 /******************************************************************************/
2364 /*---------------------Inline Function Implementations------------------------*/
2365 /******************************************************************************/
2366
2367 IFX_INLINE void IfxCif_clearKernelResetState(void)
2368 {
2369 MODULE_CIF.BBB.KRSTCLR.B.CLR = 1;
2370 }
2371
2372
2373 IFX_INLINE void IfxCif_generateIspFrameSynchronousConfigUpdateSignal(void)
2374 {
2375 MODULE_CIF.ISP.CTRL.B.ISP_GEN_CFG_UPD = 1;
2376 }
2377
2378
2379 IFX_INLINE void IfxCif_generateIspImmediateConfigUpdateSignal(void)
2380 {
2381 MODULE_CIF.ISP.CTRL.B.ISP_CFG_UPD = 1;
2382 }
2383
2384
2385 IFX_INLINE void IfxCif_generateMiImmediateConfigUpdateSignal(void)
2386 {
2387 MODULE_CIF.MI.INIT.B.MI_CFG_UPD = 1;
2388 }
2389
2390
2391 IFX_INLINE IfxCif_State IfxCif_getBaseAddressInitializationEnableState(void)
2392 {
2393 return (IfxCif_State)MODULE_CIF.MI.CTRL.B.INIT_BASE_EN;
2394 }
2395
2396
2397 IFX_INLINE uint16 IfxCif_getCifModuleId(void)
2398 {
2399 return MODULE_CIF.BBB.MODID.B.MODNUMBER;
2400 }
2401
2402
2403 IFX_INLINE IfxCif_PortInputSelection IfxCif_getCifModulePortInputSelection(void)
2404 {
2405 return IfxCif_PortInputSelection_PinMapping0;
2406 }
2407
2408
2409 IFX_INLINE uint8 IfxCif_getCifModuleRevision(void)
2410 {
2411 return MODULE_CIF.BBB.MODID.B.MODREV;
2412 }
2413
2414
2415 IFX_INLINE uint8 IfxCif_getCifModuleType(void)
2416 {
2417 return MODULE_CIF.BBB.MODID.B.MODTYPE;
2418 }
2419
2420
2421 IFX_INLINE IfxCif_State IfxCif_getClockControlLogicState(void)
2422 {
2423 /* bit is inverted */
2424 return (1 != MODULE_CIF.CCL.B.CIF_CCLDISS) ? IfxCif_State_Enabled : IfxCif_State_Disabled;
2425 }
2426
2427
2428 IFX_INLINE uint16 IfxCif_getCurrentIspFrameCount(void)
2429 {
2430 return MODULE_CIF.ISP.FRAME_COUNT.B.FRAME_COUNTER;
2431 }
2432
2433
2434 IFX_INLINE IfxCif_IspInformFieldInformation IfxCif_getCurrentIspInformFieldInformation(void)
2435 {
2436 return (IfxCif_IspInformFieldInformation)MODULE_CIF.ISP.FLAGS_SHD.B.INFORM_FIELD;
2437 }
2438
2439
2440 IFX_INLINE IfxCif_State IfxCif_getCurrentIspInputFormatterState(void)
2441 {
2442 return (IfxCif_State)MODULE_CIF.ISP.FLAGS_SHD.B.ISP_INFORM_ENABLE_SHD;
2443 }
2444
2445
2446 IFX_INLINE IfxCif_DataPathSelectorForMainPath IfxCif_getDataPathSelectorForMainPath(void)
2447 {
2448 return (IfxCif_DataPathSelectorForMainPath)MODULE_CIF.DPCL.B.CIF_MP_MUX;
2449 }
2450
2451
2452 IFX_INLINE IfxCif_State IfxCif_getDpEnableState(void)
2453 {
2454 return (IfxCif_State)MODULE_CIF.DP.CTRL.B.DP_EN;
2455 }
2456
2457
2458 IFX_INLINE IfxCif_DpSourcePath IfxCif_getDpSourcePath(void)
2459 {
2460 return (IfxCif_DpSourcePath)MODULE_CIF.DP.CTRL.B.DP_SEL;
2461 }
2462
2463
2464 IFX_INLINE IfxCif_InputInterface IfxCif_getInputInterface(void)
2465 {
2466 return (IfxCif_InputInterface)MODULE_CIF.DPCL.B.IF_SELECT;
2467 }
2468
2469
2470 IFX_INLINE IfxCif_IspCcirSequence IfxCif_getIspCcirSequence(void)
2471 {
2472 return (IfxCif_IspCcirSequence)MODULE_CIF.ISP.ACQ_PROP.B.CCIR_SEQ;
2473 }
2474
2475
2476 IFX_INLINE IfxCif_IspColorSpaceMatrixCrominanceClippingRange IfxCif_getIspColorSpaceMatrixCrominanceClippingRange(void)
2477 {
2478 return (IfxCif_IspColorSpaceMatrixCrominanceClippingRange)MODULE_CIF.ISP.CTRL.B.ISP_CSM_C_RANGE;
2479 }
2480
2481
2482 IFX_INLINE IfxCif_IspColorSpaceMatrixLuminanceClippingRange IfxCif_getIspColorSpaceMatrixLuminanceClippingRange(void)
2483 {
2484 return (IfxCif_IspColorSpaceMatrixLuminanceClippingRange)MODULE_CIF.ISP.CTRL.B.ISP_CSM_Y_RANGE;
2485 }
2486
2487
2488 IFX_INLINE IfxCif_State IfxCif_getIspFieldInvertState(void)
2489 {
2490 return (IfxCif_State)MODULE_CIF.ISP.ACQ_PROP.B.FIELD_INVERT;
2491 }
2492
2493
2494 IFX_INLINE IfxCif_IspFieldSelection IfxCif_getIspFieldSelection(void)
2495 {
2496 return (IfxCif_IspFieldSelection)MODULE_CIF.ISP.ACQ_PROP.B.FIELD_SELECTION;
2497 }
2498
2499
2500 IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspHSyncPolarity(void)
2501 {
2502 return (IfxCif_IspSyncPolarity)MODULE_CIF.ISP.ACQ_PROP.B.HSYNC_POL;
2503 }
2504
2505
2506 IFX_INLINE IfxCif_State IfxCif_getIspInputFormatterState(void)
2507 {
2508 return (IfxCif_State)MODULE_CIF.ISP.CTRL.B.ISP_INFORM_ENABLE;
2509 }
2510
2511
2512 IFX_INLINE IfxCif_IspInputInterface IfxCif_getIspInputInterface(void)
2513 {
2514 return (IfxCif_IspInputInterface)MODULE_CIF.ISP.ACQ_PROP.B.INPUT_SELECTION;
2515 }
2516
2517
2518 IFX_INLINE uint16 IfxCif_getIspInputPortSDataState(void)
2519 {
2520 return MODULE_CIF.ISP.FLAGS_SHD.B.S_DATA;
2521 }
2522
2523
2524 IFX_INLINE IfxCif_State IfxCif_getIspInputPortSHSyncState(void)
2525 {
2526 return (IfxCif_State)MODULE_CIF.ISP.FLAGS_SHD.B.S_HSYNC;
2527 }
2528
2529
2530 IFX_INLINE IfxCif_State IfxCif_getIspInputPortSVSyncState(void)
2531 {
2532 return (IfxCif_State)MODULE_CIF.ISP.FLAGS_SHD.B.S_VSYNC;
2533 }
2534
2535
2536 IFX_INLINE IfxCif_State IfxCif_getIspMode(void)
2537 {
2538 return (IfxCif_State)MODULE_CIF.ISP.CTRL.B.ISP_MODE;
2539 }
2540
2541
2542 IFX_INLINE IfxCif_State IfxCif_getIspOutputState(void)
2543 {
2544 return (IfxCif_State)MODULE_CIF.ISP.CTRL.B.ISP_ENABLE;
2545 }
2546
2547
2548 IFX_INLINE IfxCif_IspSamplingEdge IfxCif_getIspSamplingEdge(void)
2549 {
2550 return (IfxCif_IspSamplingEdge)MODULE_CIF.ISP.ACQ_PROP.B.SAMPLE_EDGE;
2551 }
2552
2553
2554 IFX_INLINE IfxCif_State IfxCif_getIspState(void)
2555 {
2556 return (IfxCif_State)MODULE_CIF.ISP.FLAGS_SHD.B.ISP_ENABLE_SHD;
2557 }
2558
2559
2560 IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspVSyncPolarity(void)
2561 {
2562 return (IfxCif_IspSyncPolarity)MODULE_CIF.ISP.ACQ_PROP.B.VSYNC_POL;
2563 }
2564
2565
2566 IFX_INLINE IfxCif_State IfxCif_getIspisEnableState(void)
2567 {
2568 return (IfxCif_State)MODULE_CIF.ISPIS.CTRL.B.IS_EN;
2569 }
2570
2571
2572 IFX_INLINE uint8 IfxCif_getIspisRecenterValue(void)
2573 {
2574 return MODULE_CIF.ISPIS.RECENTER.B.RECENTER;
2575 }
2576
2577
2578 IFX_INLINE IfxCif_JpeHeaderGenerationMode IfxCif_getJpeHeaderGenerationMode(void)
2579 {
2580 return (IfxCif_JpeHeaderGenerationMode)MODULE_CIF.JPE.TABLE_FLUSH.B.TABLE_FLUSH;
2581 }
2582
2583
2584 IFX_INLINE IfxCif_JpeHeaderMode IfxCif_getJpeHeaderMode(void)
2585 {
2586 return (IfxCif_JpeHeaderMode)MODULE_CIF.JPE.HEADER_MODE.B.HEADER_MODE;
2587 }
2588
2589
2590 IFX_INLINE IfxCif_State IfxCif_getJpeMode(void)
2591 {
2592 return (IfxCif_State)MODULE_CIF.JPE.ENCODE_MODE.B.ENCODE_MODE;
2593 }
2594
2595
2596 IFX_INLINE uint16 IfxCif_getJpeRestartInterval(void)
2597 {
2598 return MODULE_CIF.JPE.RESTART_INTERVAL.B.RESTART_INTERVAL;
2599 }
2600
2601
2602 IFX_INLINE IfxCif_JpeState IfxCif_getJpeState(void)
2603 {
2604 return (IfxCif_JpeState)MODULE_CIF.JPE.ENCODER_BUSY.B.CODEC_BUSY;
2605 }
2606
2607
2608 IFX_INLINE IfxCif_JpeTableId IfxCif_getJpeTableId(void)
2609 {
2610 return (IfxCif_JpeTableId)MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID;
2611 }
2612
2613
2614 IFX_INLINE IfxCif_JpegJfifStreamEncoderContinuousMode IfxCif_getJpegJfifStreamEncoderContinuousMode(void)
2615 {
2616 return (IfxCif_JpegJfifStreamEncoderContinuousMode)MODULE_CIF.JPE.ENCODE.B.CONT_MODE;
2617 }
2618
2619
2620 IFX_INLINE IfxCif_JpegPictureEncodingFormat IfxCif_getJpegPictureEncodingFormat(void)
2621 {
2622 return (IfxCif_JpegPictureEncodingFormat)MODULE_CIF.JPE.PIC_FORMAT.B.ENC_PIC_FORMAT;
2623 }
2624
2625
2626 IFX_INLINE IfxCif_State IfxCif_getKernelResetStatus(void)
2627 {
2628 return (IfxCif_State)MODULE_CIF.BBB.KRST0.B.RSTSTAT;
2629 }
2630
2631
2632 IFX_INLINE uint32 IfxCif_getMiByteCount(void)
2633 {
2634 return MODULE_CIF.MI.BYTE_CNT.B.BYTE_CNT;
2635 }
2636
2637
2638 IFX_INLINE IfxCif_State IfxCif_getMiByteSwapEnableState(void)
2639 {
2640 return (IfxCif_State)MODULE_CIF.MI.CTRL.B.BYTE_SWAP;
2641 }
2642
2643
2644 IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiChrominanceBurstLength(void)
2645 {
2646 return (IfxCif_MiBurstLength)MODULE_CIF.MI.CTRL.B.BURST_LEN_CHROM;
2647 }
2648
2649
2650 IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiLuminanceBurstLength(void)
2651 {
2652 return (IfxCif_MiBurstLength)MODULE_CIF.MI.CTRL.B.BURST_LEN_LUM;
2653 }
2654
2655
2656 IFX_INLINE IfxCif_MiMainPictureWriteFormat IfxCif_getMiMainPictureWriteFormat(void)
2657 {
2658 return (IfxCif_MiMainPictureWriteFormat)MODULE_CIF.MI.CTRL.B.MP_WRITE_FORMAT;
2659 }
2660
2661
2662 IFX_INLINE uint32 IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset(void)
2663 {
2664 /* read value from unsigned component of the register structure because lower bits are tied to 0
2665 * as interrupt offset needs to be a word aligned value */
2666 return MODULE_CIF.MI.MP_Y_IRQ_OFFS_INIT.U;
2667 }
2668
2669
2670 IFX_INLINE uint32 IfxCif_getMiMainPictureYInterruptOffset(void)
2671 {
2672 return MODULE_CIF.MI.MP_Y_IRQ_OFFS_SHD.B.MP_Y_IRQ_OFFS;
2673 }
2674
2675
2676 IFX_INLINE IfxCif_State IfxCif_getMiOffsetCounterInitializationEnableState(void)
2677 {
2678 return (IfxCif_State)MODULE_CIF.MI.CTRL.B.INIT_OFFSET_EN;
2679 }
2680
2681
2682 IFX_INLINE uint16 IfxCif_getModuleNumber(void)
2683 {
2684 return MODULE_CIF.ID.B.MODNUMBER;
2685 }
2686
2687
2688 IFX_INLINE uint8 IfxCif_getModuleRevisionNumber(void)
2689 {
2690 return MODULE_CIF.ID.B.MODREV;
2691 }
2692
2693
2694 IFX_INLINE IfxCif_State IfxCif_getModuleState(void)
2695 {
2696 /* bit is inverted */
2697 return (IfxCif_State)(1 != MODULE_CIF.BBB.CLC.B.DISS) ? IfxCif_State_Enabled : IfxCif_State_Disabled;
2698 }
2699
2700
2701 IFX_INLINE uint8 IfxCif_getModuleType(void)
2702 {
2703 return MODULE_CIF.ID.B.MODTYPE;
2704 }
2705
2706
2707 IFX_INLINE uint16 IfxCif_getNumberOfAcquisitionFrames(void)
2708 {
2709 return MODULE_CIF.ISP.ACQ_NR_FRAMES.B.ACQ_NR_FRAMES;
2710 }
2711
2712
2713 IFX_INLINE uint16 IfxCif_getSecurityWatchdogCounterPredivider(void)
2714 {
2715 return MODULE_CIF.WD.CTRL.B.WD_PREDIV;
2716 }
2717
2718
2719 IFX_INLINE IfxCif_State IfxCif_getSecurityWatchdogEnableState(void)
2720 {
2721 return (IfxCif_State)MODULE_CIF.WD.CTRL.B.WD_EN;
2722 }
2723
2724
2725 IFX_INLINE IfxCif_YCSplitterChannelMode IfxCif_getYCSplitterChannelMode(void)
2726 {
2727 return (IfxCif_YCSplitterChannelMode)MODULE_CIF.DPCL.B.CIF_CHAN_MODE;
2728 }
2729
2730
2731 IFX_INLINE void IfxCif_initJpegEncoder(void)
2732 {
2733 MODULE_CIF.JPE.INIT.B.JP_INIT = 1;
2734 }
2735
2736
2737 IFX_INLINE void IfxCif_jpeGenerateHeader(void)
2738 {
2739 MODULE_CIF.JPE.GEN_HEADER.B.GEN_HEADER = 1;
2740 }
2741
2742
2743 IFX_INLINE void IfxCif_miSkipPicture(void)
2744 {
2745 MODULE_CIF.MI.INIT.B.MI_SKIP = 1;
2746 }
2747
2748
2749 IFX_INLINE void IfxCif_setClockControlLogicState(IfxCif_State clockControlLogicState)
2750 {
2751 /* bit is inverted */
2752 MODULE_CIF.CCL.B.CIF_CCLFDIS = (clockControlLogicState == IfxCif_State_Disabled) ? 1 : 0;
2753 }
2754
2755
2756 IFX_INLINE void IfxCif_setDataPathSelectorForMainPath(IfxCif_DataPathSelectorForMainPath pathSelector)
2757 {
2758 MODULE_CIF.DPCL.B.CIF_MP_MUX = pathSelector;
2759 }
2760
2761
2762 IFX_INLINE void IfxCif_setDpEnableState(IfxCif_State enableState)
2763 {
2764 MODULE_CIF.DP.CTRL.B.DP_EN = enableState;
2765 }
2766
2767
2768 IFX_INLINE void IfxCif_setDpSourcePath(IfxCif_DpSourcePath sourcePath)
2769 {
2770 MODULE_CIF.DP.CTRL.B.DP_SEL = sourcePath;
2771 }
2772
2773
2774 IFX_INLINE void IfxCif_setInputInterface(IfxCif_InputInterface interface)
2775 {
2776 IFX_UNUSED_PARAMETER(interface);
2777 MODULE_CIF.DPCL.B.IF_SELECT = IfxCif_InputInterface_ParallelInterface;
2778 }
2779
2780
2781 IFX_INLINE void IfxCif_setIspAcquisitionOffsets(uint16 hOffset, uint16 vOffset)
2782 {
2783 MODULE_CIF.ISP.ACQ_H_OFFS.B.ACQ_H_OFFS = hOffset;
2784 MODULE_CIF.ISP.ACQ_V_OFFS.B.ACQ_V_OFFS = vOffset;
2785 }
2786
2787
2788 IFX_INLINE void IfxCif_setIspAcquisitionSizes(uint16 hSize, uint16 vSize)
2789 {
2790 MODULE_CIF.ISP.ACQ_H_SIZE.U = hSize;
2791 MODULE_CIF.ISP.ACQ_V_SIZE.U = vSize;
2792 }
2793
2794
2795 IFX_INLINE void IfxCif_setIspCcirSequence(IfxCif_IspCcirSequence sequence)
2796 {
2797 MODULE_CIF.ISP.ACQ_PROP.B.CCIR_SEQ = sequence;
2798 }
2799
2800
2801 IFX_INLINE void IfxCif_setIspColorSpaceMatrixCrominanceClippingRange(IfxCif_IspColorSpaceMatrixCrominanceClippingRange clippingRange)
2802 {
2803 MODULE_CIF.ISP.CTRL.B.ISP_CSM_C_RANGE = clippingRange;
2804 }
2805
2806
2807 IFX_INLINE void IfxCif_setIspColorSpaceMatrixLuminanceClippingRange(IfxCif_IspColorSpaceMatrixLuminanceClippingRange clippingRange)
2808 {
2809 MODULE_CIF.ISP.CTRL.B.ISP_CSM_Y_RANGE = clippingRange;
2810 }
2811
2812
2813 IFX_INLINE void IfxCif_setIspFieldInvertState(IfxCif_State fieldInvertState)
2814 {
2815 MODULE_CIF.ISP.ACQ_PROP.B.FIELD_INVERT = fieldInvertState;
2816 }
2817
2818
2819 IFX_INLINE void IfxCif_setIspFieldSelection(IfxCif_IspFieldSelection selection)
2820 {
2821 MODULE_CIF.ISP.ACQ_PROP.B.FIELD_SELECTION = selection;
2822 }
2823
2824
2825 IFX_INLINE void IfxCif_setIspHSyncPolarity(IfxCif_IspSyncPolarity polarity)
2826 {
2827 MODULE_CIF.ISP.ACQ_PROP.B.HSYNC_POL = polarity;
2828 }
2829
2830
2831 IFX_INLINE void IfxCif_setIspInputFormatterState(IfxCif_State inputFormatterState)
2832 {
2833 MODULE_CIF.ISP.CTRL.B.ISP_INFORM_ENABLE = inputFormatterState;
2834 }
2835
2836
2837 IFX_INLINE void IfxCif_setIspInputInterface(IfxCif_IspInputInterface input)
2838 {
2839 MODULE_CIF.ISP.ACQ_PROP.B.INPUT_SELECTION = input;
2840 }
2841
2842
2843 IFX_INLINE void IfxCif_setIspMode(IfxCif_IspMode mode)
2844 {
2845 MODULE_CIF.ISP.CTRL.B.ISP_MODE = mode;
2846 }
2847
2848
2849 IFX_INLINE void IfxCif_setIspOutputState(IfxCif_State ispOutputState)
2850 {
2851 MODULE_CIF.ISP.CTRL.B.ISP_ENABLE = ispOutputState;
2852 }
2853
2854
2855 IFX_INLINE void IfxCif_setIspOutputWindowOffsets(uint16 hOffset, uint16 vOffset)
2856 {
2857 MODULE_CIF.ISP.OUT_H_OFFS.B.ISP_OUT_H_OFFS = hOffset;
2858 MODULE_CIF.ISP.OUT_V_OFFS.B.ISP_OUT_V_OFFS = vOffset;
2859 }
2860
2861
2862 IFX_INLINE void IfxCif_setIspPictureSizes(uint16 hSize, uint16 vSize)
2863 {
2864 MODULE_CIF.ISP.OUT_H_SIZE.B.ISP_OUT_H_SIZE = hSize;
2865 MODULE_CIF.ISP.OUT_V_SIZE.B.ISP_OUT_V_SIZE = vSize;
2866 }
2867
2868
2869 IFX_INLINE void IfxCif_setIspSamplingEdge(IfxCif_IspSamplingEdge edge)
2870 {
2871 MODULE_CIF.ISP.ACQ_PROP.B.SAMPLE_EDGE = edge;
2872 }
2873
2874
2875 IFX_INLINE void IfxCif_setIspVSyncPolarity(IfxCif_IspSyncPolarity polarity)
2876 {
2877 MODULE_CIF.ISP.ACQ_PROP.B.VSYNC_POL = polarity;
2878 }
2879
2880
2881 IFX_INLINE void IfxCif_setIspisEnableState(IfxCif_State enableState)
2882 {
2883 MODULE_CIF.ISPIS.CTRL.B.IS_EN = enableState;
2884 }
2885
2886
2887 IFX_INLINE void IfxCif_setIspisOutputWindowOffsets(IfxCif_ImageTiers hOffset, uint16 vOffset)
2888 {
2889 MODULE_CIF.ISPIS.H_OFFS.U = hOffset;
2890 MODULE_CIF.ISPIS.V_OFFS.U = vOffset;
2891 }
2892
2893
2894 IFX_INLINE void IfxCif_setIspisPictureSizes(uint16 hSize, uint16 vSize)
2895 {
2896 MODULE_CIF.ISPIS.H_SIZE.U = hSize;
2897 MODULE_CIF.ISPIS.V_SIZE.U = vSize;
2898 }
2899
2900
2901 IFX_INLINE void IfxCif_setIspisRecenterValue(uint8 value)
2902 {
2903 MODULE_CIF.ISPIS.RECENTER.B.RECENTER = value;
2904 }
2905
2906
2907 IFX_INLINE void IfxCif_setJpeHeaderGenerationMode(IfxCif_JpeHeaderGenerationMode headerGenerationMode)
2908 {
2909 MODULE_CIF.JPE.TABLE_FLUSH.B.TABLE_FLUSH = headerGenerationMode;
2910 }
2911
2912
2913 IFX_INLINE void IfxCif_setJpeHeaderMode(IfxCif_JpeHeaderMode headerMode)
2914 {
2915 MODULE_CIF.JPE.HEADER_MODE.B.HEADER_MODE = headerMode;
2916 }
2917
2918
2919 IFX_INLINE void IfxCif_setJpeRestartInterval(uint16 interval)
2920 {
2921 MODULE_CIF.JPE.RESTART_INTERVAL.B.RESTART_INTERVAL = interval;
2922 }
2923
2924
2925 IFX_INLINE void IfxCif_setJpeTableDataLsb(uint8 data)
2926 {
2927 MODULE_CIF.JPE.TABLE_DATA.B.TABLE_WDATA_L = data;
2928 }
2929
2930
2931 IFX_INLINE void IfxCif_setJpeTableDataMsb(uint8 data)
2932 {
2933 MODULE_CIF.JPE.TABLE_DATA.B.TABLE_WDATA_H = data;
2934 }
2935
2936
2937 IFX_INLINE void IfxCif_setJpeTableId(IfxCif_JpeTableId tableId)
2938 {
2939 MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
2940 }
2941
2942
2943 IFX_INLINE void IfxCif_setJpegCodecImageSizes(uint16 hSize, uint16 vSize)
2944 {
2945 MODULE_CIF.JPE.ENC_HSIZE.B.ENC_HSIZE = hSize;
2946 MODULE_CIF.JPE.ENC_VSIZE.B.ENC_VSIZE = vSize;
2947 }
2948
2949
2950 IFX_INLINE void IfxCif_setJpegJfifStreamEncoderContinuousMode(IfxCif_JpegJfifStreamEncoderContinuousMode mode)
2951 {
2952 MODULE_CIF.JPE.ENCODE.B.CONT_MODE = mode;
2953 }
2954
2955
2956 IFX_INLINE void IfxCif_setJpegPictureEncodingFormat(IfxCif_JpegPictureEncodingFormat format)
2957 {
2958 MODULE_CIF.JPE.PIC_FORMAT.B.ENC_PIC_FORMAT = format;
2959 }
2960
2961
2962 IFX_INLINE void IfxCif_setKernelResetRequestState(IfxCif_State state)
2963 {
2964 MODULE_CIF.BBB.KRST0.B.RST = state;
2965 MODULE_CIF.BBB.KRST1.B.RST = state;
2966 }
2967
2968
2969 IFX_INLINE void IfxCif_setMiBaseAddressInitializationEnableState(IfxCif_State state)
2970 {
2971 MODULE_CIF.MI.CTRL.B.INIT_BASE_EN = state;
2972 }
2973
2974
2975 IFX_INLINE void IfxCif_setMiByteSwapEnableState(IfxCif_State enableState)
2976 {
2977 MODULE_CIF.MI.CTRL.B.BYTE_SWAP = enableState;
2978 }
2979
2980
2981 IFX_INLINE void IfxCif_setMiChrominanceBurstLength(IfxCif_MiBurstLength burstLength)
2982 {
2983 MODULE_CIF.MI.CTRL.B.BURST_LEN_CHROM = burstLength;
2984 }
2985
2986
2987 IFX_INLINE void IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat format)
2988 {
2989 MODULE_CIF.MI.CTRL.B.MP_WRITE_FORMAT = format;
2990 }
2991
2992
2993 IFX_INLINE void IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset(uint32 interruptOffset)
2994 {
2995 /* write value to unsigned component of the register structure because lower bits are tied to 0
2996 * as interrupt offset needs to be a word aligned value */
2997 MODULE_CIF.MI.MP_Y_IRQ_OFFS_INIT.U = interruptOffset;
2998 }
2999
3000
3001 IFX_INLINE void IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State state)
3002 {
3003 MODULE_CIF.MI.CTRL.B.INIT_OFFSET_EN = state;
3004 }
3005
3006
3007 IFX_INLINE void IfxCif_setNumberOfAcquisitionFrames(uint16 numberOfFrames)
3008 {
3009 MODULE_CIF.ISP.ACQ_NR_FRAMES.B.ACQ_NR_FRAMES = numberOfFrames;
3010 }
3011
3012
3013 IFX_INLINE void IfxCif_setSecurityWatchdogCounterPredivider(uint16 predivider)
3014 {
3015 MODULE_CIF.WD.CTRL.B.WD_PREDIV = predivider;
3016 }
3017
3018
3019 IFX_INLINE void IfxCif_setSecurityWatchdogEnableState(IfxCif_State enableState)
3020 {
3021 MODULE_CIF.WD.CTRL.B.WD_EN = enableState;
3022 }
3023
3024
3025 IFX_INLINE void IfxCif_setYCSplitterChannelMode(IfxCif_YCSplitterChannelMode mode)
3026 {
3027 MODULE_CIF.DPCL.B.CIF_CHAN_MODE = mode;
3028 }
3029
3030
3031 IFX_INLINE void IfxCif_startJpegJfifStreamEncoder(void)
3032 {
3033 MODULE_CIF.JPE.ENCODE.B.ENCODE = 1;
3034 }
3035
3036
3037 #endif /* IFXCIF_H */
IfxCif_getMiDataPathInputEnableState
IFX_EXTERN IfxCif_State IfxCif_getMiDataPathInputEnableState(IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface input...
Definition: IfxCif.c:1988
IfxCif_getRawEpInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the raw state of an interrupt.
Definition: IfxCif.c:2289
IfxCif_InterruptTriggeredState
IfxCif_InterruptTriggeredState
Enumerator for the state of an interrupt.
Definition: IfxCif.h:143
IfxCif_HuffmanTableComponents_Component0
Component 0.
Definition: IfxCif.h:399
IfxCif_JpeTableId_VlcDcTable0
VLC DC Table 0.
Definition: IfxCif.h:502
IfxCif_setEpBaseInitAddress
IFX_EXTERN void IfxCif_setEpBaseInitAddress(IfxCif_ExtraPath z, Ifx_AddressValue baseAddress)
Function to set the initial base address of the ring buffer of one extra path.
Definition: IfxCif.c:2799
IfxCif_getJpeHeaderGenerationMode
IFX_INLINE IfxCif_JpeHeaderGenerationMode IfxCif_getJpeHeaderGenerationMode(void)
Function to query the current header generation debug control mode.
Definition: IfxCif.h:2578
IfxCif_getEpCroppingOffsetOutputWindow
IFX_EXTERN uint16 IfxCif_getEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping offset of the output window of one tier of one extra path...
Definition: IfxCif.c:661
IfxCif_clearKernelResetState
IFX_INLINE void IfxCif_clearKernelResetState(void)
Function to clear the kernel reset state.
Definition: IfxCif.h:2367
IfxCif_getEpFeatureEnableState
IFX_EXTERN IfxCif_State IfxCif_getEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature)
Function to query the enabled state of one feature of one extra path.
Definition: IfxCif.c:790
IfxCif_getHuffmanAcTableLength
IFX_EXTERN uint8 IfxCif_getHuffmanAcTableLength(IfxCif_HuffmanTables table)
Function to query the currently set Huffman Table length for AC values.
Definition: IfxCif.c:1050
IfxCif_getIspState
IFX_INLINE IfxCif_State IfxCif_getIspState(void)
Function to query the current state of the ISP.
Definition: IfxCif.h:2554
IfxCif_EpWriteFormat
IfxCif_EpWriteFormat
Enumerator for write formats of extra paths.
Definition: IfxCif.h:610
IfxCif_DpCounters_FrameNumberCounter
Frame number counter.
Definition: IfxCif.h:646
IfxCif_setMiByteSwapEnableState
IFX_INLINE void IfxCif_setMiByteSwapEnableState(IfxCif_State enableState)
Function to enable or disable the change of byte order of the 32 bit output word. ...
Definition: IfxCif.h:2975
IfxCif_DpSourcePath_MainPath
Main data path.
Definition: IfxCif.h:653
IfxCif_MiInterruptSources_WrapMainPictureCb
Main picture Cb address wrap interrupt.
Definition: IfxCif.h:341
IfxCif_getNumberOfAcquisitionFrames
IFX_INLINE uint16 IfxCif_getNumberOfAcquisitionFrames(void)
Function to query the number of acquisition frames.
Definition: IfxCif.h:2707
IfxCif_HuffmanTables_Table0
Huffman Table 0.
Definition: IfxCif.h:408
IfxCif_MiStatusClearSources_MainPictureCrFifoFull
Cr FIFO full flag in main path.
Definition: IfxCif.h:376
IfxCif_getBaseAddressInitializationEnableState
IFX_INLINE IfxCif_State IfxCif_getBaseAddressInitializationEnableState(void)
Function to query the enabled state of the update signal of the base address and buffer size shadow r...
Definition: IfxCif.h:2391
IfxCif_IspInformFieldInformation
IfxCif_IspInformFieldInformation
Enumerator for current field information.
Definition: IfxCif.h:237
IfxCif_getJpeState
IFX_INLINE IfxCif_JpeState IfxCif_getJpeState(void)
Function to get the current JPEG codec state.
Definition: IfxCif.h:2602
IfxCif_setEpCroppingPictureSizes
IFX_EXTERN void IfxCif_setEpCroppingPictureSizes(IfxCif_ExtraPath z, uint16 hSize, uint16 vSize)
Function to set the image cropping picture sizes one extra path.
Definition: IfxCif.c:2937
IfxCif_MiMainPicturePathComponents
IfxCif_MiMainPicturePathComponents
Enumerator for main picture path components of the memory interface.
Definition: IfxCif.h:350
IfxCif_getJpeDebugSignalState
IFX_EXTERN IfxCif_JpeDebugSignalState IfxCif_getJpeDebugSignalState(IfxCif_JpeDebugSignalSources source)
Function to query the state of one JPE debug signal source.
Definition: IfxCif.c:1548
IfxCif_IspCcirSequence_YCrYCb
YCrYCb.
Definition: IfxCif.h:197
IfxCif_IspInformFieldInformation_Even
Even field.
Definition: IfxCif.h:240
IfxCif_setNumberOfAcquisitionFrames
IFX_INLINE void IfxCif_setNumberOfAcquisitionFrames(uint16 numberOfFrames)
Function to set the number of acquisition frames.
Definition: IfxCif.h:3007
IfxCif_DataPathSelectorForMainPath
IfxCif_DataPathSelectorForMainPath
Enumerator for data path of main path.
Definition: IfxCif.h:100
IfxCif_getEpInterruptEnableState
IFX_EXTERN IfxCif_State IfxCif_getEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:901
IfxCif_DpControlSources_UserDefinedSymbol4
ser defined symbol 4
Definition: IfxCif.h:630
IfxCif_getIspVSyncPolarity
IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspVSyncPolarity(void)
Function to query the currently set polarity of the VSYNC signal.
Definition: IfxCif.h:2560
IfxCif_getIspPictureSize
IFX_EXTERN uint16 IfxCif_getIspPictureSize(IfxCif_ImageTiers tier)
Function to query the currently set ISP picture size of one tier.
Definition: IfxCif.c:1388
IfxCif_getMiMainPictureComponentInitialOffsetCounter
IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component)
Function to query the initial offset counter inside the ring buffer of one main picture path compoent...
Definition: IfxCif.c:2156
IfxCif_JpeInterruptSources_R2BImageSizeError
R2B image size error.
Definition: IfxCif.h:452
IfxCif_HuffmanTableComponents_Component2
Component 2.
Definition: IfxCif.h:401
IfxCif_JpeState_Free
Codec is free (not busy)
Definition: IfxCif.h:490
IfxCif_setIspAcquisitionSizes
IFX_INLINE void IfxCif_setIspAcquisitionSizes(uint16 hSize, uint16 vSize)
Function to set the ISP acquisition sizes.
Definition: IfxCif.h:2788
IfxCif_JpeInterruptSources_VlcSymbolError
VLC symbol error.
Definition: IfxCif.h:454
IfxCif_setDpControlEnableState
IFX_EXTERN void IfxCif_setDpControlEnableState(IfxCif_DpControlSources source, IfxCif_State enableState)
Function to enable or disable transmission of one debug path control source.
Definition: IfxCif.c:2719
IfxCif_EpErrorClearSources
IfxCif_EpErrorClearSources
Enumerator for error sources that can be cleared in the extra paths registers.
Definition: IfxCif.h:562
IfxCif_MiInterruptSources_BusError
Bus write or read error interrupt (from handshake target interfaces)
Definition: IfxCif.h:339
IfxCif_setSecurityWatchdogEnableState
IFX_INLINE void IfxCif_setSecurityWatchdogEnableState(IfxCif_State enableState)
Function to enable or disable the watchdog unit.
Definition: IfxCif.h:3019
IfxCif_getIspisEnableState
IFX_INLINE IfxCif_State IfxCif_getIspisEnableState(void)
Function to query the enabled state of image stabilization.
Definition: IfxCif.h:2566
IfxCif_getInternalClockMode
IFX_EXTERN IfxCif_State IfxCif_getInternalClockMode(IfxCif_Submodules submodule)
Function to query the clock state of a submodule.
Definition: IfxCif.c:1146
IfxCif_IspInputInterface_10BitExternalInterfaceAppendZeros
10-bit external Interface if enabled append 6 zeroes as LSBs
Definition: IfxCif.h:250
IfxCif_epSkipPicture
IFX_EXTERN void IfxCif_epSkipPicture(IfxCif_ExtraPath z)
Function to skip one picture of one extra path.
Definition: IfxCif.c:333
IfxCif_miSkipPicture
IFX_INLINE void IfxCif_miSkipPicture(void)
Function to skip the current or next starting main data path picture.
Definition: IfxCif.h:2743
IfxCif_ImageTiers_Horizontal
Horizontal tier.
Definition: IfxCif.h:130
IfxCif_DpCounters_LineNumberCounter
Line number counter.
Definition: IfxCif.h:645
IfxCif_SecurityWatchdogCounters_Predivider
Predivider counter.
Definition: IfxCif.h:533
IfxCif_getMiMainPictureComponentSize
IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentSize(IfxCif_MiMainPicturePathComponents component)
Function to query the current size of the ring buffer of one main picture path component.
Definition: IfxCif.c:2235
IfxCif_Submodules_JpegEncoder
JPEG Encoder submodule.
Definition: IfxCif.h:175
IfxCif_getModuleType
IFX_INLINE uint8 IfxCif_getModuleType(void)
Function to query the module type.
Definition: IfxCif.h:2701
IfxCif_setYCSplitterChannelMode
IFX_INLINE void IfxCif_setYCSplitterChannelMode(IfxCif_YCSplitterChannelMode mode)
Function to set the Y/C splitter channel mode.
Definition: IfxCif.h:3025
IfxCif_setHuffmanAcTableLength
IFX_EXTERN void IfxCif_setHuffmanAcTableLength(IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for AC values.
Definition: IfxCif.c:3104
IfxCif_HuffmanTableComponents
IfxCif_HuffmanTableComponents
Enumerator for the Huffman Table components.
Definition: IfxCif.h:397
IfxCif_MiInterruptSources_WrapMainPictureY
Main picture Y address wrap interrupt.
Definition: IfxCif.h:342
IfxCif_IspInputInterface_12BitExternalInterfaceAppendZeros
12-bit external Interface if enabled append 4 zeroes as LSBs
Definition: IfxCif.h:252
IfxCif_setMiMainPictureComponentBaseInitAddress
IFX_EXTERN void IfxCif_setMiMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address)
Function to set the initial base address of the ring buffer for one main picture path component...
Definition: IfxCif.c:3744
IfxCif_JpeTableId_QTable3
Q-Table 3.
Definition: IfxCif.h:501
IfxCif_getIspisPictureSize
IFX_EXTERN uint16 IfxCif_getIspisPictureSize(IfxCif_ImageTiers tier)
Function to query the current picture size for one tier.
Definition: IfxCif.c:1514
IfxCif_getCurrentIspFrameCount
IFX_INLINE uint16 IfxCif_getCurrentIspFrameCount(void)
Function to query the current ISP frame count.
Definition: IfxCif.h:2428
IfxCif_setDpUserDefinedSymbol
IFX_EXTERN void IfxCif_setDpUserDefinedSymbol(uint8 x, uint16 value)
Function to set one user defined debug symbol.
Definition: IfxCif.c:2786
IfxCif_SecurityWatchdogCounters_Horizontal
Horizontal counter.
Definition: IfxCif.h:535
IfxCif_JpegPictureEncodingFormat_422
4:2:2 format
Definition: IfxCif.h:521
IfxCif_getHuffmanDcTableLength
IFX_EXTERN uint8 IfxCif_getHuffmanDcTableLength(IfxCif_HuffmanTables table)
Function to query the current Huffman Table length for DC values.
Definition: IfxCif.c:1098
IfxCif_IspSamplingEdge
IfxCif_IspSamplingEdge
Enumerator for ISP sampling edge.
Definition: IfxCif.h:285
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_16To240
CbCr range 16..240 according to ITU-R BT.601 standard.
Definition: IfxCif.h:205
IfxCif_getCifModuleId
IFX_INLINE uint16 IfxCif_getCifModuleId(void)
Function to query the CIF module ID.
Definition: IfxCif.h:2397
IfxCif_clearEpInterrupt
IFX_EXTERN void IfxCif_clearEpInterrupt(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:81
IfxCif_getEpInputEnableState
IFX_EXTERN IfxCif_State IfxCif_getEpInputEnableState(IfxCif_ExtraPath z)
Function to query the current input enable state of one extra path.
Definition: IfxCif.c:884
IfxCif_getIspisCurrentPictureSize
IFX_EXTERN uint16 IfxCif_getIspisCurrentPictureSize(IfxCif_ImageTiers tier)
Function to query the picture size of the current picture for one tier.
Definition: IfxCif.c:1451
IfxCif_MiStatusClearSources_ExtraPath1FifoFull
FIFO full flag in extra path 1.
Definition: IfxCif.h:374
IfxCif_Submodules_SecurityWatchdog
Security Watchdog submodule.
Definition: IfxCif.h:173
IfxCif_getIspInputSelectionAppendState
IFX_EXTERN IfxCif_State IfxCif_getIspInputSelectionAppendState(void)
Function to query the append state.
Definition: IfxCif.c:1285
IfxCif_EpWriteFormat_RawAndData
Raw and data mode (8 bit)
Definition: IfxCif.h:612
IfxCif_IspSamplingEdge_NegativeEdge
negative edge sampling
Definition: IfxCif.h:287
IfxCif_getIspInputInterface
IFX_INLINE IfxCif_IspInputInterface IfxCif_getIspInputInterface(void)
Function to query the ISP input interface bit width.
Definition: IfxCif.h:2512
IfxCif_getKernelResetRequestState
IFX_EXTERN IfxCif_State IfxCif_getKernelResetRequestState(void)
Function to query the state of the kernel reset request bit.
Definition: IfxCif.c:1685
IfxCif_JpeQTableSelector_Table0
Q-Table 0.
Definition: IfxCif.h:463
IfxCif_IspCcirSequence_YCbYCr
YCbYCr.
Definition: IfxCif.h:196
IfxCif_Submodules_Debug
Debug submodule.
Definition: IfxCif.h:170
IfxCif_MiMainPictureWriteFormat
IfxCif_MiMainPictureWriteFormat
Enumerator for write formats of data written into memory.
Definition: IfxCif.h:359
IfxCif_MiStatusClearSources_BusWriteError
Bus write error flag.
Definition: IfxCif.h:375
IfxCif_getMiMainPictureComponentOffsetCounterStart
IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentOffsetCounterStart(IfxCif_MiMainPicturePathComponents component)
Function to query the offset counter which points to the start address of the previously processed pi...
Definition: IfxCif.c:2208
IfxCif_setIspFieldSelection
IFX_INLINE void IfxCif_setIspFieldSelection(IfxCif_IspFieldSelection selection)
Function to select fields to sample.
Definition: IfxCif.h:2819
IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb
14-bit external Interface if enabled append 2 MSBs as LSBs
Definition: IfxCif.h:253
IfxCif_setMiInterruptRequestBit
IFX_EXTERN void IfxCif_setMiInterruptRequestBit(IfxCif_MiInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3701
IfxCif_setSecurityWatchdogInterruptRequestBit
IFX_EXTERN void IfxCif_setSecurityWatchdogInterruptRequestBit(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3855
IfxCif_YCSplitterChannelMode_MainPathAndRawMode
Y/C splitter is enabled for main path and RAW mode.
Definition: IfxCif.h:185
IfxCif_getIspOutputWindowOffset
IFX_EXTERN uint16 IfxCif_getIspOutputWindowOffset(IfxCif_ImageTiers tier)
Function to query the currently set ISP output window offset for one tier.
Definition: IfxCif.c:1367
IfxCif_EpInterrupts_Count
Total number of interrupt sources for one extra path.
Definition: IfxCif.h:605
IfxCif_setJpeInterruptRequestBit
IFX_EXTERN void IfxCif_setJpeInterruptRequestBit(IfxCif_JpeInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3470
IfxCif_JpeHeaderGenerationMode_WaitForEncodedImage
wait for encoded image data to fill output buffer
Definition: IfxCif.h:435
IfxCif_ImageTiers_Vertical
Vertical tier.
Definition: IfxCif.h:131
IfxCif_getJpeMode
IFX_INLINE IfxCif_State IfxCif_getJpeMode(void)
Function to query the JPE encode mode.
Definition: IfxCif.h:2590
IfxCif_MiBurstLength_8BeatBursts
8-beat bursts
Definition: IfxCif.h:323
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCif_setIspFieldInvertState
IFX_INLINE void IfxCif_setIspFieldInvertState(IfxCif_State fieldInvertState)
Function to enable or disable inversion of the field ID.
Definition: IfxCif.h:2813
IfxCif_setEpInterruptEnableState
IFX_EXTERN void IfxCif_setEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3028
IfxCif_JpeDebugSignalSources_VlcEncodeBusy
VLC Encode Busy (vlc encode processing active)
Definition: IfxCif.h:419
IfxCif_IspInterruptSources_LossOfData
Loss of Data.
Definition: IfxCif.h:267
IfxCif_MiBurstLength_4BeatBursts
4-beat bursts
Definition: IfxCif.h:322
IfxCif_JpeDebugSignalState_Inactive
Debug signal is inactive.
Definition: IfxCif.h:427
IfxCif_setJpeRestartInterval
IFX_INLINE void IfxCif_setJpeRestartInterval(uint16 interval)
Function to set the restart interval.
Definition: IfxCif.h:2919
IfxCif_getMiMainPictureComponentInitSize
IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component)
Function to query the initial size of the ring buffer of one main picture path component.
Definition: IfxCif.c:2129
IfxCif_getEpCroppingEnableState
IFX_EXTERN IfxCif_State IfxCif_getEpCroppingEnableState(IfxCif_ExtraPath z)
Function to query the image cropping enabled state of one extra path.
Definition: IfxCif.c:616
IfxCif_JpeDebugSignalSources_R2BMemoryFull
R2B Memory Full (line memory status of r2b)
Definition: IfxCif.h:418
IfxCif_getIspisRecenterEnableState
IFX_EXTERN IfxCif_State IfxCif_getIspisRecenterEnableState(void)
Function to query the enabled state of image stabilization recenter feature.
Definition: IfxCif.c:1535
IfxCif_setLinearDownscalerScalingFactors
IFX_EXTERN void IfxCif_setLinearDownscalerScalingFactors(uint8 horizFactor, uint8 vertFactor)
Function to set the scaling factors of the linear downscaler.
Definition: IfxCif.c:3600
IfxCif_IspInterruptSources_PictureSizeViolationOccurred
Picture Size Violation Occurred.
Definition: IfxCif.h:266
IfxCif_getMiOffsetCounterInitializationEnableState
IFX_INLINE IfxCif_State IfxCif_getMiOffsetCounterInitializationEnableState(void)
Function to query the enabled state of the update signal of the offset counter shadow registers...
Definition: IfxCif.h:2676
IfxCif_MiMainPicturePathComponents_Cr
Cr-component.
Definition: IfxCif.h:354
IfxCif_ExtraPath_3
Definition: IfxCif.h:121
IfxCif_EpInterrupts
IfxCif_EpInterrupts
Enumerator for interrupt sources of the extra paths module.
Definition: IfxCif.h:599
IfxCif_JpeHeaderGenerationMode_TransmitLastHeaderBytes
immediately transmit last header bytes
Definition: IfxCif.h:436
IfxCif_JpeScalingValueSources_Y
scaling Y input from [16..235] to [0..255]
Definition: IfxCif.h:482
IfxCif_JpeHeaderMode
IfxCif_JpeHeaderMode
Enumerator for the JPE header mode.
Definition: IfxCif.h:441
IfxCif_getIspisRecenterValue
IFX_INLINE uint8 IfxCif_getIspisRecenterValue(void)
Function to query the current image stabilization recenter value.
Definition: IfxCif.h:2572
IfxCif_getLinearDownscalerEnableState
IFX_EXTERN IfxCif_State IfxCif_getLinearDownscalerEnableState(IfxCif_ImageTiers tier)
Function to query the current state of the linear downscaler for one tier.
Definition: IfxCif.c:1698
IfxCif_setEpCroppingEnableState
IFX_EXTERN void IfxCif_setEpCroppingEnableState(IfxCif_ExtraPath z, uint32 enableState)
Function to enable or disable image cropping of one extra path.
Definition: IfxCif.c:2838
IfxCif_LinearDownscalerScalingMode_SingleSkip
Scaling mode single skip.
Definition: IfxCif.h:307
IfxCif_setDpEnableState
IFX_INLINE void IfxCif_setDpEnableState(IfxCif_State enableState)
Function to enable or disable the debug path.
Definition: IfxCif.h:2762
IfxCif_JpeScalingValueSources
IfxCif_JpeScalingValueSources
Enumerator for the input scaling values of the JPEG encoder.
Definition: IfxCif.h:480
IfxCif_getEpInitialOffsetCounter
IFX_EXTERN uint32 IfxCif_getEpInitialOffsetCounter(IfxCif_ExtraPath z)
Function to query the initial offset counter of one extra path.
Definition: IfxCif.c:865
IfxCif_MiInterruptSources
IfxCif_MiInterruptSources
Enumerator for interrupt sources of the memory interface submodule.
Definition: IfxCif.h:337
IfxCif_resetModule
IFX_EXTERN void IfxCif_resetModule(Ifx_CIF_BBB *cifBbb)
resets CIF kernel
Definition: IfxCif.c:2679
IfxCif_MiStatusClearSources_MainPictureYFifoFull
Y FIFO full flag in main path.
Definition: IfxCif.h:378
IfxCif_getMiLuminanceBurstLength
IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiLuminanceBurstLength(void)
Function to query the currently set burst length for Y, JPEG, or RAW data.
Definition: IfxCif.h:2650
IfxCif_InputInterface
IfxCif_InputInterface
Enumerator for input interfaces supported by the CIF interface.
Definition: IfxCif.h:136
IfxCif_getEpSize
IFX_EXTERN uint32 IfxCif_getEpSize(IfxCif_ExtraPath z)
Function to query the current ring buffer size of one extra path.
Definition: IfxCif.c:1014
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255
full Y range 0..255
Definition: IfxCif.h:214
IfxCif_setIspHSyncPolarity
IFX_INLINE void IfxCif_setIspHSyncPolarity(IfxCif_IspSyncPolarity polarity)
Function to set the polarity of the HSYNC signal.
Definition: IfxCif.h:2825
IfxCif_IspInformFieldInformation_Odd
Odd field.
Definition: IfxCif.h:239
IfxCif_ImageTiers
IfxCif_ImageTiers
Enumerator for tiers.
Definition: IfxCif.h:128
IfxCif_getMaskedEpInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to get the masked state of an interrupt.
Definition: IfxCif.c:1788
IfxCif_getEpInterruptOffset
IFX_EXTERN uint32 IfxCif_getEpInterruptOffset(IfxCif_ExtraPath z)
Function to query the current interrupt offset of one extra path.
Definition: IfxCif.c:923
IfxCif_getEpWriteFormat
IFX_EXTERN IfxCif_EpWriteFormat IfxCif_getEpWriteFormat(IfxCif_ExtraPath z)
Function to query the write format of one extra path.
Definition: IfxCif.c:1033
IfxCif_clearSecurityWatchdogInterrupt
IFX_EXTERN void IfxCif_clearSecurityWatchdogInterrupt(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:267
IfxCpu_Intrinsics.h
IfxCif_JpeHeaderMode_NoAppnHeader
no APPn header
Definition: IfxCif.h:443
IfxCif_getMiByteSwapEnableState
IFX_INLINE IfxCif_State IfxCif_getMiByteSwapEnableState(void)
Function to query the current state of the change of byte order of the 32 bit output word...
Definition: IfxCif.h:2638
IfxCif_SecurityWatchdogInterruptSources
IfxCif_SecurityWatchdogInterruptSources
Enumerator for interrupt sources of the security watchdog submodule.
Definition: IfxCif.h:540
IfxCif_ErrorState
IfxCif_ErrorState
Enumerator for the state of an error.
Definition: IfxCif.h:109
IfxCif_setMiMainPictureComponentInitialOffsetCounter
IFX_EXTERN void IfxCif_setMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component, uint32 offsetCounter)
Function to set the initial offset counter inside the ring buffer for one main picture path component...
Definition: IfxCif.c:3792
IfxCif_setIspMode
IFX_INLINE void IfxCif_setIspMode(IfxCif_IspMode mode)
Function to set the ISP mode.
Definition: IfxCif.h:2843
IfxCif_JpeQTableSelector_Table3
Q-Table 3.
Definition: IfxCif.h:466
IfxCif_getJpegCodecImageSize
IFX_EXTERN uint16 IfxCif_getJpegCodecImageSize(IfxCif_ImageTiers tier)
Function to query the currently set JPEG codec image size of one tier.
Definition: IfxCif.c:1664
IfxCif_getIspColorSpaceMatrixLuminanceClippingRange
IFX_INLINE IfxCif_IspColorSpaceMatrixLuminanceClippingRange IfxCif_getIspColorSpaceMatrixLuminanceClippingRange(void)
Function to query the clipping range of the luminance of the ISP output.
Definition: IfxCif.h:2482
IfxCif_getJpegPictureEncodingFormat
IFX_INLINE IfxCif_JpegPictureEncodingFormat IfxCif_getJpegPictureEncodingFormat(void)
Function to query the current picture encoding format.
Definition: IfxCif.h:2620
IfxCif_setLinearDownscalerScalingFactor
IFX_EXTERN void IfxCif_setLinearDownscalerScalingFactor(IfxCif_ImageTiers tier, uint8 factor)
Function to set the scaling factor of the linear downscaler of one tier.
Definition: IfxCif.c:3579
IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit
planar (YCbCr mode) / RAW & data mode (8 bit)
Definition: IfxCif.h:361
IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout
Horizontal Start End Interrupt.
Definition: IfxCif.h:545
IfxCif_DpSourcePath_ExtraPath5
Extra path 5.
Definition: IfxCif.h:657
IfxCif_JpeHeaderGenerationMode
IfxCif_JpeHeaderGenerationMode
Enumerator for the header generation debug control.
Definition: IfxCif.h:433
IfxCif_EpErrorSources_ExtraPath3SizeError
Size error in image cropping unit of extra path 3.
Definition: IfxCif.h:582
IfxCif_MiInterruptSources_FillMainPictureY
Main picture Y address wrap interrupt.
Definition: IfxCif.h:343
IfxCif_getJpeTableId
IFX_INLINE IfxCif_JpeTableId IfxCif_getJpeTableId(void)
Function to query the current JPE Table ID.
Definition: IfxCif.h:2608
IfxCif_setIspInputFormatterState
IFX_INLINE void IfxCif_setIspInputFormatterState(IfxCif_State inputFormatterState)
Function to enable or disable the ISP input formatter.
Definition: IfxCif.h:2831
IfxCif_PortInputSelection_PinMapping0
pin mapping 0
Definition: IfxCif.h:153
IfxCif_MiStatusInformationSources_BusWriteError
An Bus error occurred while writing to the Bus (main/self path) since last clear. ...
Definition: IfxCif.h:385
IfxCif_EpWriteFormat_RawGreater
RAW & data mode (greater 8 up to 16 bit)
Definition: IfxCif.h:614
IfxCif_DpControlSources_UserDefinedSymbol8
User defined symbol 8.
Definition: IfxCif.h:626
IfxCif_setHuffmanDcTableLength
IFX_EXTERN void IfxCif_setHuffmanDcTableLength(IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for DC values.
Definition: IfxCif.c:3138
IfxCif_EpFeatures_ByteSwap
Byte swap feature.
Definition: IfxCif.h:593
IfxCif_ExtraPath_5
Definition: IfxCif.h:123
IfxCif_setIspInputInterface
IFX_INLINE void IfxCif_setIspInputInterface(IfxCif_IspInputInterface input)
Function to set the ISP input interface bit width.
Definition: IfxCif.h:2837
IfxCif_getIspFieldSelection
IFX_INLINE IfxCif_IspFieldSelection IfxCif_getIspFieldSelection(void)
Function to query the currently set field sample mode.
Definition: IfxCif.h:2494
IfxCif_MiStatusClearSources
IfxCif_MiStatusClearSources
Enumerator for status clear sources of the memory interface module.
Definition: IfxCif.h:368
IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset
IFX_INLINE uint32 IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset(void)
Function to query the filling level that triggers an interrupt of main picture path Y component...
Definition: IfxCif.h:2662
IfxCif_EpErrorSources_ExtraPath5SizeError
Size error in image cropping unit of extra path 5.
Definition: IfxCif.h:580
IfxCif_setMiLuminanceBurstLength
IFX_EXTERN void IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength burstLength)
Function to set the burst length for Y, JPEG, or RAW data.
Definition: IfxCif.c:3738
IfxCif_IspInterruptSources_SecurityWatchdogTimeout
A watchdog timeout was triggered at the ISP input.
Definition: IfxCif.h:262
IfxCif_EpErrorClearSources_ExtraPath5SizeError
Size error in image cropping unit of extra path 5.
Definition: IfxCif.h:564
IfxCif_getKernelResetStatus
IFX_INLINE IfxCif_State IfxCif_getKernelResetStatus(void)
Function to query the kernel reset status.
Definition: IfxCif.h:2626
IfxCif_MiStatusInformationSources_MainPictureYFifoFull
FIFO full flag of Y FIFO in main path asserted since last clear.
Definition: IfxCif.h:388
IfxCif_setMiMainPictureWriteFormat
IFX_INLINE void IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat format)
Function to set the write format of the main picture path of the memory interface.
Definition: IfxCif.h:2987
IfxCif_MiMainPicturePathComponents_Cb
Cb-component.
Definition: IfxCif.h:353
IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit
interleaved_combined for YCbCr 4:2:2 only / RAW & data mode (greater 8 up to 16 bit) ...
Definition: IfxCif.h:363
IfxCif_getCifModulePortInputSelection
IFX_INLINE IfxCif_PortInputSelection IfxCif_getCifModulePortInputSelection(void)
Function to query the port input selection.
Definition: IfxCif.h:2403
IfxScuWdt.h
SCU basic functionality.
IfxCif_getIspFieldInvertState
IFX_INLINE IfxCif_State IfxCif_getIspFieldInvertState(void)
Function to query the state of field ID inversion.
Definition: IfxCif.h:2488
IfxCif_SecurityWatchdogTimeoutCounters_StartEnd
Timeout counter for Start End phase.
Definition: IfxCif.h:553
IfxCif_JpeQTableSelectorComponents_Y
Y-component.
Definition: IfxCif.h:473
IfxCif_setJpeQTableSelector
IFX_EXTERN void IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector)
Function to set the Q-Table selector for one component.
Definition: IfxCif.c:3503
IfxCif_getDpEnableState
IFX_INLINE IfxCif_State IfxCif_getDpEnableState(void)
Function to query the debug path enabled state.
Definition: IfxCif.h:2452
IfxCif_EpInterrupts_FillLevel
Fill level interrupt.
Definition: IfxCif.h:602
IfxCif_JpegPictureEncodingFormat
IfxCif_JpegPictureEncodingFormat
Enumerator for the picture encoding format.
Definition: IfxCif.h:519
IfxCif_setIspPictureSizes
IFX_INLINE void IfxCif_setIspPictureSizes(uint16 hSize, uint16 vSize)
Function to set the ISP picture sizes.
Definition: IfxCif.h:2862
IfxCif_setSecurityWatchdogTimeout
IFX_EXTERN void IfxCif_setSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter, uint16 timeout)
Function to set the timeout for a watchdog timeout counter of one tier. A value of 0 disables the tim...
Definition: IfxCif.c:3880
IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb
12-bit external Interface if enabled append 4 MSBs as LSBs
Definition: IfxCif.h:251
IfxCif_getJpeScalingEnableState
IFX_EXTERN IfxCif_State IfxCif_getJpeScalingEnableState(IfxCif_JpeScalingValueSources source)
Function to query the current enabled state of the scaling of an input value source.
Definition: IfxCif.c:1643
IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb
8-bit external Interface if enabled append 8 MSBs as LSBs
Definition: IfxCif.h:247
IfxCif_setSecurityWatchdogCounterPredivider
IFX_INLINE void IfxCif_setSecurityWatchdogCounterPredivider(uint16 predivider)
Function to set the watchdog predivider counter (A value of 0 means that the Watchdog Counters are in...
Definition: IfxCif.h:3013
IfxCif_setJpegPictureEncodingFormat
IFX_INLINE void IfxCif_setJpegPictureEncodingFormat(IfxCif_JpegPictureEncodingFormat format)
Function to set the picture encoding format.
Definition: IfxCif.h:2956
IfxCif_Submodules_AllModules
All submodules.
Definition: IfxCif.h:169
IfxCif_DpControlSources_UserDefinedSymbol2
User defined symbol 2.
Definition: IfxCif.h:632
IfxCif_getMiFeatureEnableState
IFX_EXTERN IfxCif_State IfxCif_getMiFeatureEnableState(IfxCif_MiDataPaths dataPath)
Function to query the enabled state of a memory interface data path.
Definition: IfxCif.c:2038
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_16To235
Y range 16..235 according to ITU-R BT.601 standard.
Definition: IfxCif.h:213
IfxCif_State
IfxCif_State
Enumerator for states.
Definition: IfxCif.h:159
IfxCif_getIspisCurrentPictureOffset
IFX_EXTERN uint16 IfxCif_getIspisCurrentPictureOffset(IfxCif_ImageTiers tier)
Function to query the offset of the current picture for one tier.
Definition: IfxCif.c:1430
IfxCif_EpErrorSources_ExtraPath2SizeError
Size error in image cropping unit of extra path 2.
Definition: IfxCif.h:583
IfxCif_IspSyncPolarity_LowActive
low active sync polarity
Definition: IfxCif.h:296
IfxCif_getLinearDownscalerScalingFactor
IFX_EXTERN uint8 IfxCif_getLinearDownscalerScalingFactor(IfxCif_ImageTiers tier)
Function to query the currently set scaling factor of the linear downscaler of one tier...
Definition: IfxCif.c:1719
IfxCif_IspErrorSources_SizeErrorInInformSubmodule
ize error is generated in inform submodule
Definition: IfxCif.h:223
IfxCif_setIspisPictureSize
IFX_EXTERN void IfxCif_setIspisPictureSize(IfxCif_ImageTiers tier, uint16 size)
Function to set the picture size for one tier.
Definition: IfxCif.c:3420
IfxCif_setIspisEnableState
IFX_INLINE void IfxCif_setIspisEnableState(IfxCif_State enableState)
Function to enable or disable image stabilization.
Definition: IfxCif.h:2881
IfxCif_MiStatusClearSources_MainPictureCbFifoFull
Cb FIFO full flag in main path.
Definition: IfxCif.h:377
IfxCif_setJpegJfifStreamEncoderContinuousMode
IFX_INLINE void IfxCif_setJpegJfifStreamEncoderContinuousMode(IfxCif_JpegJfifStreamEncoderContinuousMode mode)
Function to set the stream encoder continuous mode.
Definition: IfxCif.h:2950
IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder
Main path is routed to the JPEG encoder.
Definition: IfxCif.h:104
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCif_SecurityWatchdogTimeoutCounters_EndStart
Timeout counter for End Start phase.
Definition: IfxCif.h:552
IfxCif_IspCcirSequence_CbYCrY
CbYCrY.
Definition: IfxCif.h:198
IfxCif_getMiMainPictureWriteFormat
IFX_INLINE IfxCif_MiMainPictureWriteFormat IfxCif_getMiMainPictureWriteFormat(void)
Function to query the currently set write format of the main picture path of the memory interface...
Definition: IfxCif.h:2656
IfxCif_getMiMainPictureComponentBaseAddress
IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentBaseAddress(IfxCif_MiMainPicturePathComponents component)
Function to query the current base address of the ring buffer of one main picture path component...
Definition: IfxCif.c:2104
IfxCif_getMainPictureComponentBaseInitAddress
IFX_EXTERN uint32 IfxCif_getMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component)
Function to query the initial base address of the ring buffer of one main picture path component...
Definition: IfxCif.c:1761
IfxCif_getIspColorSpaceMatrixCrominanceClippingRange
IFX_INLINE IfxCif_IspColorSpaceMatrixCrominanceClippingRange IfxCif_getIspColorSpaceMatrixCrominanceClippingRange(void)
Function to query the clipping range of the crominance of the ISP output.
Definition: IfxCif.h:2476
IfxCif_getEpOffsetCounter
IFX_EXTERN uint32 IfxCif_getEpOffsetCounter(IfxCif_ExtraPath z)
Function to query the current offset counter of one extra path.
Definition: IfxCif.c:942
IfxCif_getMaskedIspInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource)
Function to query the masked state of an interrupt.
Definition: IfxCif.c:1812
IfxCif_JpeQTableSelector_Table2
Q-Table 2.
Definition: IfxCif.h:465
IfxCif_DpSourcePath_ExtraPath2
Extra path 2.
Definition: IfxCif.h:655
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCif_EpFeatures_InitBaseAddress
Init buffer base address.
Definition: IfxCif.h:592
IfxCif_getEpCroppingCurrentPictureSize
IFX_EXTERN uint16 IfxCif_getEpCroppingCurrentPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture size of one tier of one extra path...
Definition: IfxCif.c:588
IfxCif_setLinearDownscalerScalingModes
IFX_EXTERN void IfxCif_setLinearDownscalerScalingModes(IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode)
Function to set the scaling mode of one tier.
Definition: IfxCif.c:3631
IfxCif_IspInputInterface_14BitExternalInterfaceAppendZeros
14-bit external Interface if enabled append 2 zeroes as LSBs
Definition: IfxCif.h:254
IfxCif_setHuffmanDcTableSelector
IFX_EXTERN void IfxCif_setHuffmanDcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for DC values.
Definition: IfxCif.c:3155
IfxCif_getIspInputFormatterState
IFX_INLINE IfxCif_State IfxCif_getIspInputFormatterState(void)
Function to query the current state of the ISP input formatter.
Definition: IfxCif.h:2506
IfxCif_getCurrentIspPictureOffset
IFX_EXTERN uint16 IfxCif_getCurrentIspPictureOffset(IfxCif_ImageTiers tier)
Function to query the current ISP picture offset for one tier.
Definition: IfxCif.c:349
IfxCif_DpControlSources
IfxCif_DpControlSources
Enumerator for debug path control sources.
Definition: IfxCif.h:624
IfxCif_IspFieldSelection_OnlyOddFields
sample only odd fields
Definition: IfxCif.h:232
IfxCif_getJpeQTableSelector
IFX_EXTERN IfxCif_JpeQTableSelector IfxCif_getJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component)
Function to query the currently selected Q-Table for one component.
Definition: IfxCif.c:1618
IfxCif_DpControlSources_LineNumberCounter
Line number counter.
Definition: IfxCif.h:635
IfxCif_State_Enabled
Enabled state.
Definition: IfxCif.h:162
IfxCif_Submodules_LinearDownscaler
Linear Downscaler submodule.
Definition: IfxCif.h:172
IfxCif_JpeScalingValueSources_CbCr
scaling Cb/Cr input from [16..240] to [0..255]
Definition: IfxCif.h:483
IfxCif_InterruptTriggeredState_NotTriggered
Interrupt was not triggered.
Definition: IfxCif.h:145
IfxCif_programJpeTable
IFX_EXTERN void IfxCif_programJpeTable(IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length)
Definition: IfxCif.c:2631
IfxCif_getMiStatusInformation
IFX_EXTERN IfxCif_ErrorState IfxCif_getMiStatusInformation(IfxCif_MiStatusInformationSources source)
Function to query the status information of one status information source of the memory interface mod...
Definition: IfxCif.c:2260
IfxCif_getDpSourcePath
IFX_INLINE IfxCif_DpSourcePath IfxCif_getDpSourcePath(void)
Function to query the selected debug path source path.
Definition: IfxCif.h:2458
IfxCif_getIspSamplingEdge
IFX_INLINE IfxCif_IspSamplingEdge IfxCif_getIspSamplingEdge(void)
Function to query the currently set ISP sampling edge.
Definition: IfxCif.h:2548
IfxCif_setIspPictureSize
IFX_EXTERN void IfxCif_setIspPictureSize(IfxCif_ImageTiers tier, uint16 pictureSize)
Function to set the ISP picture size of one tier.
Definition: IfxCif.c:3352
IfxCif_getLinearDownscalerScalingMode
IFX_EXTERN IfxCif_LinearDownscalerScalingMode IfxCif_getLinearDownscalerScalingMode(IfxCif_ImageTiers tier)
Function to query the currently set scaling mode of one tier.
Definition: IfxCif.c:1740
IfxCif_LinearDownscalerScalingMode
IfxCif_LinearDownscalerScalingMode
Enumerator for scaling mode of linear downscaler.
Definition: IfxCif.h:305
IfxCif_getSecurityWatchdogCounterPredivider
IFX_INLINE uint16 IfxCif_getSecurityWatchdogCounterPredivider(void)
Function to query the currently set watchdog predivider.
Definition: IfxCif.h:2713
IfxCif_EpInterrupts_WrapAround
Address wrap interrupt.
Definition: IfxCif.h:603
IfxCif_MiDataPaths_RawData
RAW data path.
Definition: IfxCif.h:330
IfxCif_setIspInputSelectionAppendState
IFX_EXTERN void IfxCif_setIspInputSelectionAppendState(IfxCif_State appendState)
Function to enable or disable appending of bits to the input signal.
Definition: IfxCif.c:3247
IfxCif_setMiFeatureEnableState
IFX_EXTERN void IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths dataPath, IfxCif_State enableState)
Function to enable or disable one memory interface data path.
Definition: IfxCif.c:3643
IfxCif_DpControlSources_UserDefinedSymbol5
User defined symbol 5.
Definition: IfxCif.h:629
IfxCif_setMiMainPictureComponentInitSize
IFX_EXTERN void IfxCif_setMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component, uint32 size)
Function to set the initial size of the ring buffer for one main picture path component.
Definition: IfxCif.c:3769
IfxCif_EpErrorSources_ExtraPath3FifoFull
FIFO of extra path 3 is full.
Definition: IfxCif.h:577
IfxCif_getRawJpeInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource)
Function to query the raw state of an interrupt.
Definition: IfxCif.c:2376
IfxCif_getCurrentIspInputFormatterState
IFX_INLINE IfxCif_State IfxCif_getCurrentIspInputFormatterState(void)
Function to query the current state of the ISP formatter.
Definition: IfxCif.h:2440
IfxCif_setEpCroppingCameraDisplacement
IFX_EXTERN void IfxCif_setEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the image cropping camera displacement of one tier of one extra path.
Definition: IfxCif.c:2814
IfxCif_MiBurstLength
IfxCif_MiBurstLength
Enumerator for burst length affecting the write port of the memory interface.
Definition: IfxCif.h:320
IfxCif_SecurityWatchdogCounters_Vertical
Vertical counter.
Definition: IfxCif.h:534
IfxCif_IspInputInterface
IfxCif_IspInputInterface
Enumerator for the supported input interfaces of the ISP.
Definition: IfxCif.h:245
IfxCif_setEpInitialOffsetCounter
IFX_EXTERN void IfxCif_setEpInitialOffsetCounter(IfxCif_ExtraPath z, uint32 offsetCounter)
Function to set the initial offset counter of one extra path.
Definition: IfxCif.c:3013
IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout
Vertical End Start Interrupt.
Definition: IfxCif.h:542
IfxCif_JpeInterruptSources_DcTableError
DC Table error.
Definition: IfxCif.h:453
IfxCif_initJpegEncoder
IFX_INLINE void IfxCif_initJpegEncoder(void)
Function to immediately start the JPEG encoder. This function has to be called after IfxCif_startJpeg...
Definition: IfxCif.h:2731
IfxCif_getIspOutputState
IFX_INLINE IfxCif_State IfxCif_getIspOutputState(void)
Function to query the ISP output state.
Definition: IfxCif.h:2542
IfxCif_JpeTableId_QTable2
Q-Table 2.
Definition: IfxCif.h:500
IfxCif_setJpeInterruptEnableState
IFX_EXTERN void IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3437
IfxCif_JpegJfifStreamEncoderContinuousMode_StartAutomatically
encoder starts automatically to encode the next frame
Definition: IfxCif.h:513
IfxCif_setEpFeatureEnableState
IFX_EXTERN void IfxCif_setEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState)
Function to enable or disable one feature of one extra path.
Definition: IfxCif.c:2951
IfxCif_setDpSourcePath
IFX_INLINE void IfxCif_setDpSourcePath(IfxCif_DpSourcePath sourcePath)
Function to select one debug path source path.
Definition: IfxCif.h:2768
IfxCif_JpeDebugSignalSources_QiqTableAccess
QiqTableAccess.
Definition: IfxCif.h:420
IfxCif_MiMainPictureWriteFormat_SemiPlanarOrData8Bit
semi-planar for YCbCr 4:2:x / RAW 8 bit
Definition: IfxCif.h:362
IfxCif_setIspOutputWindowOffset
IFX_EXTERN void IfxCif_setIspOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP output window offset for one tier.
Definition: IfxCif.c:3335
IfxCif_DpSourcePath
IfxCif_DpSourcePath
Enumerator for debug path source paths.
Definition: IfxCif.h:651
IfxCif_setHuffmanAcTableSelector
IFX_EXTERN void IfxCif_setHuffmanAcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for AC Values.
Definition: IfxCif.c:3121
IfxCif_setLinearDownscalerEnableState
IFX_EXTERN void IfxCif_setLinearDownscalerEnableState(IfxCif_ImageTiers tier, IfxCif_State enableState)
Function to enable or disable the linear downscaler for one tier.
Definition: IfxCif.c:3558
IfxCif_generateIspImmediateConfigUpdateSignal
IFX_INLINE void IfxCif_generateIspImmediateConfigUpdateSignal(void)
Function to generate an immediate ISP configuration update signal.
Definition: IfxCif.h:2379
IfxCif_setMiInterruptEnableState
IFX_EXTERN void IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3664
IfxCif_EpWriteFormat_Raw8Bit
Raw 8 bit mode.
Definition: IfxCif.h:613
IfxCif_MiDataPaths_MainPictureData
main picture data path
Definition: IfxCif.h:332
IfxCif_setEpCroppingOffsetsOutputWindow
IFX_EXTERN void IfxCif_setEpCroppingOffsetsOutputWindow(IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset)
Function to set the image cropping offsets of the output window of one extra path.
Definition: IfxCif.c:2899
IfxCif_setLinearDownscalerScalingMode
IFX_EXTERN void IfxCif_setLinearDownscalerScalingMode(IfxCif_ImageTiers tier, IfxCif_LinearDownscalerScalingMode mode)
Function to set the scaling mode of one tier.
Definition: IfxCif.c:3610
IfxCif_EpFeatures_PictureDataPath
enables the extra path picture data path
Definition: IfxCif.h:594
IfxCif_MiStatusClearSources_ExtraPath3FifoFull
FIFO full flag in extra path 3.
Definition: IfxCif.h:372
IfxCif_setJpeTableDataMsb
IFX_INLINE void IfxCif_setJpeTableDataMsb(uint8 data)
Function to set the JPE Table MSB.
Definition: IfxCif.h:2931
IfxCif_setKernelResetRequestState
IFX_INLINE void IfxCif_setKernelResetRequestState(IfxCif_State state)
Function to request a kernel reset or reset the request bit.
Definition: IfxCif.h:2962
IfxCif_IspErrorSources
IfxCif_IspErrorSources
Enumerator for error sources of the ISP module.
Definition: IfxCif.h:219
IfxCif_setIspisMaximumDisplacement
IFX_EXTERN void IfxCif_setIspisMaximumDisplacement(IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement for one tier.
Definition: IfxCif.c:3386
IfxCif_setDataPathSelectorForMainPath
IFX_INLINE void IfxCif_setDataPathSelectorForMainPath(IfxCif_DataPathSelectorForMainPath pathSelector)
Function to set the data path for main path.
Definition: IfxCif.h:2756
IfxCif_getClockControlLogicState
IFX_INLINE IfxCif_State IfxCif_getClockControlLogicState(void)
Function to query the clock distribution enabled state.
Definition: IfxCif.h:2421
IfxCif_getIspisCameraDisplacement
IFX_EXTERN uint16 IfxCif_getIspisCameraDisplacement(IfxCif_ImageTiers tier)
Function to query the current camera displacement for one tier.
Definition: IfxCif.c:1409
IfxCif_ExtraPath
IfxCif_ExtraPath
Enumerator for the extra paths.
Definition: IfxCif.h:117
IfxCif_EpErrorClearSources_ExtraPath3SizeError
Size error in image cropping unit of extra path 3.
Definition: IfxCif.h:566
IfxCif_getModuleState
IFX_INLINE IfxCif_State IfxCif_getModuleState(void)
Function to query the state of the CIF module.
Definition: IfxCif.h:2694
IfxCif_PortInputSelection_PinMapping1
pin mapping 1
Definition: IfxCif.h:154
IfxCif_setEpRecenterValue
IFX_EXTERN void IfxCif_setEpRecenterValue(IfxCif_ExtraPath z, uint8 value)
Function to set the recenter value of one extra path (0 to switch the recenter feature off...
Definition: IfxCif.c:3078
IfxCif_setJpeScalingEnableState
IFX_EXTERN void IfxCif_setJpeScalingEnableState(IfxCif_JpeScalingValueSources source, IfxCif_State scalingEnable)
Function to enable or disable scaling of one input value source.
Definition: IfxCif.c:3524
IfxCif_setIspisRecenterValue
IFX_INLINE void IfxCif_setIspisRecenterValue(uint8 value)
Function to set the image stabilization recenter value.
Definition: IfxCif.h:2901
IfxCif_MiStatusInformationSources_MainPictureCrFifoFull
FIFO full flag of Cr FIFO in main path asserted since last clear.
Definition: IfxCif.h:386
IfxCif_clearIspInterrupt
IFX_EXTERN void IfxCif_clearIspInterrupt(IfxCif_IspInterruptSources interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:115
IfxCif_JpegPictureEncodingFormat_400
4:0:0 format
Definition: IfxCif.h:522
IfxCif_ErrorState_Error
Error occurred.
Definition: IfxCif.h:112
IfxCif_IspMode_ItuRBT601
ITU-R BT.601 (YUV input with H and Vsync signals)
Definition: IfxCif.h:278
IfxCif_getEpCroppingMaximumDisplacement
IFX_EXTERN uint16 IfxCif_getEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the maximum displacement of one tier of one extra path.
Definition: IfxCif.c:633
IfxCif_setEpInitialFillLevelInterruptOffset
IFX_EXTERN void IfxCif_setEpInitialFillLevelInterruptOffset(uint32 z, uint32 interruptOffset)
Function to set the initial filling level interrupt offset of one extra path.
Definition: IfxCif.c:2998
IfxCif_IspFieldSelection_AllFields
sample all fields (don&#39;t care about fields)
Definition: IfxCif.h:230
IfxCif_getEpInitialFillLevelInterruptOffset
IFX_EXTERN uint32 IfxCif_getEpInitialFillLevelInterruptOffset(IfxCif_ExtraPath z)
Function to query the initial filling level interrupt offset of one extra path.
Definition: IfxCif.c:846
IfxCif_JpeInterruptSources_HeaderGenerationComplete
Header generation complete.
Definition: IfxCif.h:455
IfxCif_HuffmanTables
IfxCif_HuffmanTables
Enumerator for the Huffman Tables.
Definition: IfxCif.h:406
IfxCif_setIspAcquisitionOffset
IFX_EXTERN void IfxCif_setIspAcquisitionOffset(IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP acquisition offset of one tier.
Definition: IfxCif.c:3213
IfxCif_setIspCcirSequence
IFX_INLINE void IfxCif_setIspCcirSequence(IfxCif_IspCcirSequence sequence)
Function to set the CCIR sequence.
Definition: IfxCif.h:2795
IfxCif_JpeTableId_VlcAcTable1
VLC AC Table 1.
Definition: IfxCif.h:505
IfxCif_getCifModuleType
IFX_INLINE uint8 IfxCif_getCifModuleType(void)
Function to query the CIF module ID.
Definition: IfxCif.h:2415
IfxCif_EpErrorClearSources_ExtraPath2SizeError
Size error in image cropping unit of extra path 2.
Definition: IfxCif.h:567
IfxCif_JpeTableId_VlcAcTable0
VLC AC Table 0.
Definition: IfxCif.h:503
IfxCif_JpeInterruptSources
IfxCif_JpeInterruptSources
Enumerator for interrupt sources of the JPEG encoder module.
Definition: IfxCif.h:449
IfxCif_clearEpError
IFX_EXTERN void IfxCif_clearEpError(IfxCif_EpErrorClearSources source)
Function to clear one extra path error.
Definition: IfxCif.c:52
IfxCif_setIspisCameraDisplacement
IFX_EXTERN void IfxCif_setIspisCameraDisplacement(uint16 tier, uint16 displacement)
Function to set the camera displacement for one tier.
Definition: IfxCif.c:3369
IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb
10-bit external Interface if enabled append 6 MSBs as LSBs
Definition: IfxCif.h:249
IfxCif_setMiBaseAddressInitializationEnableState
IFX_INLINE void IfxCif_setMiBaseAddressInitializationEnableState(IfxCif_State state)
Function to enable or disable the update of the base address and buffer size shadow registers to the ...
Definition: IfxCif.h:2969
IfxCif_setJpeHeaderMode
IFX_INLINE void IfxCif_setJpeHeaderMode(IfxCif_JpeHeaderMode headerMode)
Function to set the JPE header mode.
Definition: IfxCif.h:2913
IfxCif_clearIspError
IFX_EXTERN void IfxCif_clearIspError(IfxCif_IspErrorSources errorSource)
Function to clear the error status bit for an error source.
Definition: IfxCif.c:94
IfxCif_getYCSplitterChannelMode
IFX_INLINE IfxCif_YCSplitterChannelMode IfxCif_getYCSplitterChannelMode(void)
Function to query the Y/C splitter channel mode.
Definition: IfxCif.h:2725
IfxCif_getIspisMaximumDisplacement
IFX_EXTERN uint16 IfxCif_getIspisMaximumDisplacement(IfxCif_ImageTiers tier)
Function to query the current maximum displacement for one tier.
Definition: IfxCif.c:1472
IfxCif_epForceConfigurationUpdate
IFX_EXTERN void IfxCif_epForceConfigurationUpdate(IfxCif_ExtraPath z)
Function to trigger an immediate configuration update for one extra path.
Definition: IfxCif.c:317
IfxCif_IspColorSpaceMatrixLuminanceClippingRange
IfxCif_IspColorSpaceMatrixLuminanceClippingRange
Enumerator for the clipping range of the luminance for the ISP output.
Definition: IfxCif.h:211
IfxCif_getJpegJfifStreamEncoderContinuousMode
IFX_INLINE IfxCif_JpegJfifStreamEncoderContinuousMode IfxCif_getJpegJfifStreamEncoderContinuousMode(void)
Function to query the current encoder continuous mode.
Definition: IfxCif.h:2614
IfxCif_DpControlSources_UserDefinedSymbol7
User defined symbol 7.
Definition: IfxCif.h:627
IfxCif_getRawSecurityWatchdogInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the raw state of an interrupt.
Definition: IfxCif.c:2454
IfxCif_clearJpeInterrupt
IFX_EXTERN void IfxCif_clearJpeInterrupt(IfxCif_JpeInterruptSources interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:152
IfxCif_getIspInputPortSVSyncState
IFX_INLINE IfxCif_State IfxCif_getIspInputPortSVSyncState(void)
Function to query the current level of the ISP input port s_vsync (for test purposes only) ...
Definition: IfxCif.h:2530
IfxCif_MiStatusInformationSources
IfxCif_MiStatusInformationSources
Enumerator for status information sources of the memory interface submodule.
Definition: IfxCif.h:383
IfxCif_Submodules_ImageSignalProcessing
Image Signal Processing submodule.
Definition: IfxCif.h:176
IfxCif_setEpCroppingOffsetOutputWindow
IFX_EXTERN void IfxCif_setEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 offset)
Function to set the image cropping offset of the output window of one tier of one extra path...
Definition: IfxCif.c:2875
IfxCif_setClockControlLogicState
IFX_INLINE void IfxCif_setClockControlLogicState(IfxCif_State clockControlLogicState)
Function to enable or disable the clock distribution to all CIF submodules.
Definition: IfxCif.h:2749
IfxCif_getDataPathSelectorForMainPath
IFX_INLINE IfxCif_DataPathSelectorForMainPath IfxCif_getDataPathSelectorForMainPath(void)
Function to query the data path for main path.
Definition: IfxCif.h:2446
IfxCif_EpErrorSources_ExtraPath4SizeError
Size error in image cropping unit of extra path 4.
Definition: IfxCif.h:581
IfxCif_Submodules
IfxCif_Submodules
Enumerator for submodules of the CIF interface.
Definition: IfxCif.h:167
Ifx_AddressValue
pvoid Ifx_AddressValue
Used in address values.
Definition: Ifx_Types.h:104
IfxCif_getMiDataPathOutputEnableState
IFX_EXTERN IfxCif_State IfxCif_getMiDataPathOutputEnableState(IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface output...
Definition: IfxCif.c:2013
IfxCif_SecurityWatchdogCounters
IfxCif_SecurityWatchdogCounters
Enumerator for watchdog counters.
Definition: IfxCif.h:531
IfxCif_LinearDownscalerScalingMode_Disabled
Disabled.
Definition: IfxCif.h:311
IfxCif_getDpControlEnableState
IFX_EXTERN IfxCif_State IfxCif_getDpControlEnableState(IfxCif_DpControlSources source)
Function to query the transmission enabled state of one debug path control source.
Definition: IfxCif.c:391
IfxCif_IspSamplingEdge_PositiveEdge
positive edge sampling
Definition: IfxCif.h:288
IfxCif_getRawMiInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource)
Function to query the raw state of an interrupt.
Definition: IfxCif.c:2413
IfxCif_JpeDebugSignalState_Active
Debug signal is active.
Definition: IfxCif.h:428
IfxCif_JpeTableId_QTable1
Q-Table 1.
Definition: IfxCif.h:499
IfxCif_InputInterface_ParallelInterface
Parallel interface (currently the only supported input interface)
Definition: IfxCif.h:138
IfxCif_JpeDebugSignalSources_VlcTableBusy
Debug VLC Table Busy (vlc access to hufftables)
Definition: IfxCif.h:417
IfxCif_MiDataPaths
IfxCif_MiDataPaths
Enumerator for data paths of the memory interface.
Definition: IfxCif.h:328
IfxCif_getJpeRestartInterval
IFX_INLINE uint16 IfxCif_getJpeRestartInterval(void)
Function to query the current restart interval.
Definition: IfxCif.h:2596
IfxCif_JpeQTableSelector
IfxCif_JpeQTableSelector
Enumerator for the Q-Table selector.
Definition: IfxCif.h:461
IfxCif_setMiChrominanceBurstLength
IFX_INLINE void IfxCif_setMiChrominanceBurstLength(IfxCif_MiBurstLength burstLength)
Function to set the burst length for Cb and Cr data.
Definition: IfxCif.h:2981
IfxCif_JpeDebugSignalState
IfxCif_JpeDebugSignalState
Enumerator for the debug signal state.
Definition: IfxCif.h:425
IfxCif_getMaskedJpeInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource)
Function to query the masked state of an interrupt.
Definition: IfxCif.c:1881
IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed
Main path is routed to the Memory Interface.
Definition: IfxCif.h:103
IfxCif_getHuffmanDcTableSelectorState
IFX_EXTERN IfxCif_State IfxCif_getHuffmanDcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for DC values...
Definition: IfxCif.c:1119
IfxCif_clearMiInterrupt
IFX_EXTERN void IfxCif_clearMiInterrupt(IfxCif_MiInterruptSources interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:185
IfxCif_DpSourcePath_ExtraPath4
Extra path 4.
Definition: IfxCif.h:656
IfxCif_getEpOffsetCounterStart
IFX_EXTERN uint32 IfxCif_getEpOffsetCounterStart(IfxCif_ExtraPath z)
Function to query the initial offset counter start value of one extra path.
Definition: IfxCif.c:961
IfxCif_DpCounters_PredividerCounter
Predivider counter.
Definition: IfxCif.h:643
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCif_getIspInputPortSDataState
IFX_INLINE uint16 IfxCif_getIspInputPortSDataState(void)
Function to query the current value of the ISP input port s_data (for test purposes only) ...
Definition: IfxCif.h:2518
IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout
Horizontal End Start Interrupt.
Definition: IfxCif.h:544
IfxCif_DpControlSources_UserDefinedSymbol3
User defined symbol 3.
Definition: IfxCif.h:631
IfxCif_DpSourcePath_ExtraPath1
Extra path 1.
Definition: IfxCif.h:654
IfxCif_EpFeatures_InitOffsetCounter
Init offest counter.
Definition: IfxCif.h:591
IfxCif_JpegJfifStreamEncoderContinuousMode
IfxCif_JpegJfifStreamEncoderContinuousMode
Enumerator for the JFIF stream encoder continuous mode.
Definition: IfxCif.h:510
IfxCif_EpErrorClearSources_ExtraPath1SizeError
Size error in image cropping unit of extra path 1.
Definition: IfxCif.h:568
IfxCif_getCurrentIspInformFieldInformation
IFX_INLINE IfxCif_IspInformFieldInformation IfxCif_getCurrentIspInformFieldInformation(void)
Function to query the current field information.
Definition: IfxCif.h:2434
IfxCif_generateMiImmediateConfigUpdateSignal
IFX_INLINE void IfxCif_generateMiImmediateConfigUpdateSignal(void)
Function to generate an immediate configuration update signal for the memory interface submodule...
Definition: IfxCif.h:2385
IfxCif_State_Disabled
Disabled state.
Definition: IfxCif.h:161
IfxCif_EpErrorSources_ExtraPath5FifoFull
FIFO of extra path 5 is full.
Definition: IfxCif.h:575
IfxCif_EpErrorSources_ExtraPath1FifoFull
FIFO of extra path 1 is full.
Definition: IfxCif.h:579
IfxCif_setMiOffsetCounterInitializationEnableState
IFX_INLINE void IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State state)
Function to enable or disable the update of the offset counter shadow registers (update will be execu...
Definition: IfxCif.h:3001
IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule
Size error is generated in outmux submodule.
Definition: IfxCif.h:221
IfxCif_JpeHeaderMode_JfifHeader
JFIF header.
Definition: IfxCif.h:444
IfxCif_getMiMainPictureComponentOffsetCounter
IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentOffsetCounter(IfxCif_MiMainPicturePathComponents component)
Function to query the current offset counter within the ring buffer of one main picture path componen...
Definition: IfxCif.c:2183
IfxCif_setIspColorSpaceMatrixCrominanceClippingRange
IFX_INLINE void IfxCif_setIspColorSpaceMatrixCrominanceClippingRange(IfxCif_IspColorSpaceMatrixCrominanceClippingRange clippingRange)
Function to set the clipping range of the crominance of the ISP output.
Definition: IfxCif.h:2801
IfxCif_ExtraPath_2
Definition: IfxCif.h:120
IfxCif_JpeTableId
IfxCif_JpeTableId
Enumerator for the JPE Tables.
Definition: IfxCif.h:496
IfxCif_JpeQTableSelector_Table1
Q-Table 1.
Definition: IfxCif.h:464
IfxCif_IspFieldSelection_OnlyEvenFields
sample only even fields
Definition: IfxCif.h:231
IfxCif_IspMode_RawPictureWithItuRBT656Sync
RAW picture mode with ITU-R BT.656 synchronization.
Definition: IfxCif.h:280
IfxCif_setIspInterruptEnableState
IFX_EXTERN void IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3261
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255
full UV range 0..255
Definition: IfxCif.h:206
IfxCif_JpeState
IfxCif_JpeState
Enumerator for the codec state.
Definition: IfxCif.h:488
IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule
Size error is generated in image stabilization submodule.
Definition: IfxCif.h:222
IfxCif_IspInterruptSources_StartEdgeOfVSync
Start Edge of v_sync.
Definition: IfxCif.h:264
IfxCif_setIspisPictureSizes
IFX_INLINE void IfxCif_setIspisPictureSizes(uint16 hSize, uint16 vSize)
Function to set the picture size.
Definition: IfxCif.h:2894
IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset
IFX_INLINE void IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset(uint32 interruptOffset)
Function to set the filling level to trigger an interrupt for main picture path Y component...
Definition: IfxCif.h:2993
IfxCif_setIspInterruptRequestBit
IFX_EXTERN void IfxCif_setIspInterruptRequestBit(IfxCif_IspInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3298
IfxCif_getEpInitSize
IFX_EXTERN uint32 IfxCif_getEpInitSize(IfxCif_ExtraPath z)
Function to query the initial size of the ring buffer of one extra path.
Definition: IfxCif.c:827
IfxCif_getSecurityWatchdogEnableState
IFX_INLINE IfxCif_State IfxCif_getSecurityWatchdogEnableState(void)
Function to query the enabled state of the watchdog unit.
Definition: IfxCif.h:2719
IfxCif_MiInterruptSources_WrapMainPictureCr
Main picture Cr address wrap interrupt.
Definition: IfxCif.h:340
IfxCif_getIspErrorState
IFX_EXTERN IfxCif_ErrorState IfxCif_getIspErrorState(IfxCif_IspErrorSources errorSource)
Function to query the error state of an error source.
Definition: IfxCif.c:1251
IfxCif_setEpCroppingMaximumDisplacement
IFX_EXTERN void IfxCif_setEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement of one tier of one extra path.
Definition: IfxCif.c:2851
IfxCif_setEpCroppingPictureSize
IFX_EXTERN void IfxCif_setEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 size)
Function to set the image cropping picture size of one tier of one extra path.
Definition: IfxCif.c:2913
IfxCif_IspCcirSequence
IfxCif_IspCcirSequence
Enumerator for the ISP CCIR sequence.
Definition: IfxCif.h:194
IfxCif_EpWriteFormat_YCbCr
YCbCr 16 bit; YCbCr data is handled interleaved as 16 bit data in extra paths.
Definition: IfxCif.h:615
IfxCif_getEpErrorState
IFX_EXTERN IfxCif_ErrorState IfxCif_getEpErrorState(IfxCif_EpErrorSources source)
Function to query the state of an extra path error source.
Definition: IfxCif.c:737
IfxCif_JpeQTableSelectorComponents
IfxCif_JpeQTableSelectorComponents
Enumerator for the components to select Q-Tables.
Definition: IfxCif.h:471
IfxCif_LinearDownscalerScalingMode_DoublePass
Scaling mode double pass.
Definition: IfxCif.h:310
IfxCif_setEpInitSize
IFX_EXTERN void IfxCif_setEpInitSize(IfxCif_ExtraPath z, uint32 size)
Function to set the initial size of the ring buffer of one extra path.
Definition: IfxCif.c:2983
IfxCif_IspMode_RawPicture
RAW picture.
Definition: IfxCif.h:276
IfxCif_getDpCounter
IFX_EXTERN uint32 IfxCif_getDpCounter(IfxCif_DpCounters counter)
Function to query the current counter value of one debug path counter.
Definition: IfxCif.c:448
IfxCif_DpControlSources_UserDefinedSymbol6
User defined symbol 6.
Definition: IfxCif.h:628
IfxCif_getHuffmanAcTableSelectorState
IFX_EXTERN IfxCif_State IfxCif_getHuffmanAcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for AC values...
Definition: IfxCif.c:1071
IfxCif_YCSplitterChannelMode_Disabled
Y/C splitter is disabled.
Definition: IfxCif.h:184
IfxCif_YCSplitterChannelMode
IfxCif_YCSplitterChannelMode
Enumerator for channel mode of Y/C splitter.
Definition: IfxCif.h:182
IfxCif_setInputInterface
IFX_INLINE void IfxCif_setInputInterface(IfxCif_InputInterface interface)
Function to set the input interface of the CIF interface.
Definition: IfxCif.h:2774
IfxCif_setJpegCodecImageSize
IFX_EXTERN void IfxCif_setJpegCodecImageSize(IfxCif_ImageTiers tier, uint16 size)
Function to set the JPEG codec image size of one tier.
Definition: IfxCif.c:3541
IfxCif_getEpCroppingCameraDisplacement
IFX_EXTERN uint16 IfxCif_getEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping camera displacement of one tier of one extra path...
Definition: IfxCif.c:532
IfxCif_getRawIspInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource)
Function to query the raw state of an interrupt.
Definition: IfxCif.c:2311
IfxCif_IspInterruptSources_IspTurnedOff
Isp was Turned Off (vsynced)
Definition: IfxCif.h:269
IfxCif_setIspSamplingEdge
IFX_INLINE void IfxCif_setIspSamplingEdge(IfxCif_IspSamplingEdge edge)
Function to set the ISP sampling edge.
Definition: IfxCif.h:2869
IfxCif_MiDataPaths_JpegData
JPEG data path.
Definition: IfxCif.h:331
IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically
encoder first generates next header and then encodes automatically the next frame ...
Definition: IfxCif.h:514
IfxCif_getIspInterruptEnableState
IFX_EXTERN IfxCif_State IfxCif_getIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:1302
IfxCif_DpCounters_TimestampCounter
Timestamp counter.
Definition: IfxCif.h:644
IfxCif_JpeInterruptSources_EncodingComplete
Encoding complete.
Definition: IfxCif.h:456
IfxCif_setIspAcquisitionOffsets
IFX_INLINE void IfxCif_setIspAcquisitionOffsets(uint16 hOffset, uint16 vOffset)
Function to set the ISP acquisition offsets.
Definition: IfxCif.h:2781
IfxCif_ExtraPath_1
Definition: IfxCif.h:119
IfxCif_startJpegJfifStreamEncoder
IFX_INLINE void IfxCif_startJpegJfifStreamEncoder(void)
Function to start JFIF stream encoding. Auto reset after one clock cycle.
Definition: IfxCif.h:3031
IfxCif_IspFieldSelection
IfxCif_IspFieldSelection
Enumerator for the sampled input fields.
Definition: IfxCif.h:228
IfxCif_LinearDownscalerScalingMode_DoubleSkip
Scaling mode double skip.
Definition: IfxCif.h:308
IfxCif_getSecurityWatchdogTimeout
IFX_EXTERN uint16 IfxCif_getSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter)
Function to query the current value of a timeout counter of one tier.
Definition: IfxCif.c:2512
IfxCif_DpControlSources_FrameNumberCounter
Frame number counter.
Definition: IfxCif.h:636
IfxCif_ExtraPath_4
Definition: IfxCif.h:122
IfxCif_setIspColorSpaceMatrixLuminanceClippingRange
IFX_INLINE void IfxCif_setIspColorSpaceMatrixLuminanceClippingRange(IfxCif_IspColorSpaceMatrixLuminanceClippingRange clippingRange)
Function to set the clipping range of the luminance of the ISP output.
Definition: IfxCif.h:2807
IfxCif_getEpCroppingRecenterState
IFX_EXTERN IfxCif_State IfxCif_getEpCroppingRecenterState(IfxCif_ExtraPath z)
Function to query the enabled state of the recenter feature of one extra path.
Definition: IfxCif.c:717
IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout
Vertical Start End Interrupt.
Definition: IfxCif.h:543
IfxCif_getMiChrominanceBurstLength
IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiChrominanceBurstLength(void)
Function to query the currently set burst length for Cb and Cr data.
Definition: IfxCif.h:2644
IfxCif_getMiMainPictureYInterruptOffset
IFX_INLINE uint32 IfxCif_getMiMainPictureYInterruptOffset(void)
Function to query the filling level of the main picture Y component that triggers an interrupt...
Definition: IfxCif.h:2670
IfxCif_getIspInputPortSHSyncState
IFX_INLINE IfxCif_State IfxCif_getIspInputPortSHSyncState(void)
Function to query the current level of the ISP input port s_hsync (for testing purposes only) ...
Definition: IfxCif.h:2524
IfxCif_getMiInterruptEnableState
IFX_EXTERN IfxCif_State IfxCif_getMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:2063
IfxCif_MiInterruptSources_MacroBlockLine
Macroblock line interrupt of main picture (16 lines of Y, 8 lines of Cb and 8 lines of Cr are written...
Definition: IfxCif.h:344
IfxCif_MiStatusClearSources_ExtraPath4FifoFull
FIFO full flag in extra path 4.
Definition: IfxCif.h:371
IfxCif_JpegJfifStreamEncoderContinuousMode_StopAtFrameEnd
encoder stops at frame end
Definition: IfxCif.h:512
IfxCif_getIspCcirSequence
IFX_INLINE IfxCif_IspCcirSequence IfxCif_getIspCcirSequence(void)
Function to query the currently set CCIR sequence.
Definition: IfxCif.h:2470
IfxCif_generateIspFrameSynchronousConfigUpdateSignal
IFX_INLINE void IfxCif_generateIspFrameSynchronousConfigUpdateSignal(void)
Function to generate a frame synchronous ISP configuration update signal.
Definition: IfxCif.h:2373
IfxCif_DpControlSources_UserDefinedSymbol1
User defined symbol 1.
Definition: IfxCif.h:633
IfxCif_setIspOutputState
IFX_INLINE void IfxCif_setIspOutputState(IfxCif_State ispOutputState)
Function to enable or disable the ISP output.
Definition: IfxCif.h:2849
IfxCif_setJpeTableDataLsb
IFX_INLINE void IfxCif_setJpeTableDataLsb(uint8 data)
Function to set the JPE Table LSB.
Definition: IfxCif.h:2925
IfxCif_getIspAcquisitionSize
IFX_EXTERN uint16 IfxCif_getIspAcquisitionSize(IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition size of one tier.
Definition: IfxCif.c:1230
IfxCif_getEpBaseInitAddress
IFX_EXTERN uint32 IfxCif_getEpBaseInitAddress(IfxCif_ExtraPath z)
Function to query the initial base address of the ring buffer of one extra path.
Definition: IfxCif.c:513
IfxCif_getSoftwareResetMode
IFX_EXTERN IfxCif_State IfxCif_getSoftwareResetMode(IfxCif_Submodules submodule)
Function to query the reset mode of a submodule.
Definition: IfxCif.c:2555
IfxCif_IspInterruptSources_FrameCompletelyPutOut
Frame was Completely Put Out.
Definition: IfxCif.h:268
IfxCif_getJpeInterruptEnableState
IFX_EXTERN IfxCif_State IfxCif_getJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:1581
IfxCif_JpeTableId_QTable0
Q-Table 0.
Definition: IfxCif.h:498
IfxCif_getIspMode
IFX_INLINE IfxCif_State IfxCif_getIspMode(void)
Function to query the currently set ISP mode.
Definition: IfxCif.h:2536
IfxCif_JpeState_Busy
JPEG codec in process.
Definition: IfxCif.h:491
IfxCif_EpInterrupts_MacroBlockLine
Macroblock line interrupt.
Definition: IfxCif.h:604
IfxCif_setIspisOutputWindowOffset
IFX_EXTERN void IfxCif_setIspisOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset)
Function to set the image stabilization offset of the output window of one tier.
Definition: IfxCif.c:3403
IfxCif_getJpeHeaderMode
IFX_INLINE IfxCif_JpeHeaderMode IfxCif_getJpeHeaderMode(void)
Function to query the currently set JPE header mode.
Definition: IfxCif.h:2584
IfxCif_getSecurityWatchdogInterruptEnableState
IFX_EXTERN IfxCif_State IfxCif_getSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:2483
IfxCif_MiMainPicturePathComponents_Y
Y-component.
Definition: IfxCif.h:352
IfxCif_getCurrentIspPictureSize
IFX_EXTERN uint16 IfxCif_getCurrentIspPictureSize(IfxCif_ImageTiers tier)
Function to query the current ISP picture size for one tier.
Definition: IfxCif.c:370
IfxCif_IspMode
IfxCif_IspMode
Enumerator for the ISP mode.
Definition: IfxCif.h:274
IfxCif_JpeDebugSignalSources_BadTableAccess
Debug Bad Table Access (set if an access to the TABLE_DATA or to the TABLE_ID register is performed...
Definition: IfxCif.h:416
IfxCif_DataPathSelectorForMainPath_Disabled
Main path is disabled.
Definition: IfxCif.h:102
IfxCif_getIspHSyncPolarity
IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspHSyncPolarity(void)
Function to query the currently set polarity of the HSYNC signal.
Definition: IfxCif.h:2500
IfxCif_IspMode_ItuRBT656
ITU-R BT.656 (YUV with embedded sync)
Definition: IfxCif.h:277
IfxCif_Submodules_MemoryInterface
Memory Interface submodule.
Definition: IfxCif.h:174
IfxCif_MiStatusClearSources_ExtraPath2FifoFull
FIFO full flag in extra path 2.
Definition: IfxCif.h:373
IfxCif_EpErrorSources_ExtraPath2FifoFull
FIFO of extra path 2 is full.
Definition: IfxCif.h:578
IfxCif_MiInterruptSources_MainPictureFrameEnd
Picture end of frame interrupt.
Definition: IfxCif.h:345
IfxCif_IspInputInterface_8BitExternalInterfaceAppendZeros
8-bit external Interface if enabled append 8 zeroes as LSBs
Definition: IfxCif.h:248
IfxCif_PortInputSelection
IfxCif_PortInputSelection
Enumerator for port input selections.
Definition: IfxCif.h:151
IfxCif_IspSyncPolarity_HighActive
high active sync polarity
Definition: IfxCif.h:295
IfxCif_getIspAcquisitionOffset
IFX_EXTERN uint16 IfxCif_getIspAcquisitionOffset(IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition offset of one tier.
Definition: IfxCif.c:1209
IfxCif_LinearDownscalerScalingMode_SinglePass
Scaling mode single pass.
Definition: IfxCif.h:309
IfxCif_setJpeHeaderGenerationMode
IFX_INLINE void IfxCif_setJpeHeaderGenerationMode(IfxCif_JpeHeaderGenerationMode headerGenerationMode)
Function to set the header generation debug control mode.
Definition: IfxCif.h:2907
IfxCif_cfg.h
CIF on-chip implementation data.
IfxCif_Submodules_ExtraPaths
Extra Paths submodule.
Definition: IfxCif.h:171
IfxCif_setSoftwareResetMode
IFX_EXTERN void IfxCif_setSoftwareResetMode(IfxCif_Submodules submodule, IfxCif_State resetMode)
Function to enable or disable the reset mode of a submodule.
Definition: IfxCif.c:3919
IfxCif_IspMode_DataMode
datamode (ISP bypass, sync signals interpreted as data enable)
Definition: IfxCif.h:279
IfxCif_setEpOffsetCounterStart
IFX_EXTERN void IfxCif_setEpOffsetCounterStart(uint32 z, uint32 offsetCounter)
Function to set the initial offset counter start value of one extra path.
Definition: IfxCif.c:3063
IfxCif_setIspAcquisitionSize
IFX_EXTERN void IfxCif_setIspAcquisitionSize(IfxCif_ImageTiers tier, uint16 size)
Function to set the ISP acquisition size of one tier.
Definition: IfxCif.c:3230
IfxCif_EpErrorSources_ExtraPath1SizeError
Size error in image cropping unit of extra path 1.
Definition: IfxCif.h:584
IfxCif_setIspOutputWindowOffsets
IFX_INLINE void IfxCif_setIspOutputWindowOffsets(uint16 hOffset, uint16 vOffset)
Function to set the ISP output window offsets.
Definition: IfxCif.h:2855
IfxCif_JpeQTableSelectorComponents_U
U-component.
Definition: IfxCif.h:474
IfxCif_getInputInterface
IFX_INLINE IfxCif_InputInterface IfxCif_getInputInterface(void)
Function to query the input interface of the CIF interface.
Definition: IfxCif.h:2464
IfxCif_setInternalClockMode
IFX_EXTERN void IfxCif_setInternalClockMode(IfxCif_Submodules submodule, IfxCif_State clockState)
Function to enable or disable the clock of a submodule.
Definition: IfxCif.c:3172
IfxCif_clearMiStatus
IFX_EXTERN void IfxCif_clearMiStatus(IfxCif_MiStatusClearSources source)
Function to clear the status information of one status clear source of the memory interface submodule...
Definition: IfxCif.c:222
IfxCif_getModuleNumber
IFX_INLINE uint16 IfxCif_getModuleNumber(void)
Function to query the module number.
Definition: IfxCif.h:2682
IfxCif_setModuleStateRequest
IFX_EXTERN void IfxCif_setModuleStateRequest(IfxCif_State state)
Function to request enabling or disabling of the CIF module.
Definition: IfxCif.c:3815
IfxCif_setIspVSyncPolarity
IFX_INLINE void IfxCif_setIspVSyncPolarity(IfxCif_IspSyncPolarity polarity)
Function to set the polarity of the VSYNC signal.
Definition: IfxCif.h:2875
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxCif_getCifModuleRevision
IFX_INLINE uint8 IfxCif_getCifModuleRevision(void)
Function to query the CIF module revision.
Definition: IfxCif.h:2409
IfxCif_getEpBaseAddress
IFX_EXTERN uint32 IfxCif_getEpBaseAddress(IfxCif_ExtraPath z)
Function to query the current base address of the ring buffer of one extra path.
Definition: IfxCif.c:494
IfxCif_ErrorState_NoError
No error occurred.
Definition: IfxCif.h:111
IfxCif_dpResetCounter
IFX_EXTERN void IfxCif_dpResetCounter(IfxCif_DpCounters counter)
Function to reset one debug path counter.
Definition: IfxCif.c:292
IfxCif_setJpegCodecImageSizes
IFX_INLINE void IfxCif_setJpegCodecImageSizes(uint16 hSize, uint16 vSize)
Function to set the JPEG codec image sizes.
Definition: IfxCif.h:2943
IfxCif_setSecurityWatchdogInterruptEnableState
IFX_EXTERN void IfxCif_setSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3830
IfxCif_setEpInterruptRequestBit
IFX_EXTERN void IfxCif_setEpInterruptRequestBit(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3050
IfxCif_EpErrorClearSources_ExtraPath4SizeError
Size error in image cropping unit of extra path 4.
Definition: IfxCif.h:565
IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the masked state of an interrupt.
Definition: IfxCif.c:1959
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCif_JpeQTableSelectorComponents_V
V-component.
Definition: IfxCif.h:475
IfxCif_IspInterruptSources_SampledInputFrameComplete
Sampled Input Frame is Complete.
Definition: IfxCif.h:265
IfxCif_JpeInterruptSources_VlcTableError
VLC table error.
Definition: IfxCif.h:451
IfxCif_getMiByteCount
IFX_INLINE uint32 IfxCif_getMiByteCount(void)
Function to query the number of JPEG or RAW data bytes of the last transmitted frame.
Definition: IfxCif.h:2632
IfxCif_jpeGenerateHeader
IFX_INLINE void IfxCif_jpeGenerateHeader(void)
Function to start to generate JPEG stream header. Auto reset after one clock cycle.
Definition: IfxCif.h:2737
IfxCif_getIspisOffsetOutputWindow
IFX_EXTERN uint16 IfxCif_getIspisOffsetOutputWindow(IfxCif_ImageTiers tier)
Function to query the current image stabilization offset of the output window of one tier...
Definition: IfxCif.c:1493
IfxCif_getModuleRevisionNumber
IFX_INLINE uint8 IfxCif_getModuleRevisionNumber(void)
Function to query the revision number of the CIF interface.
Definition: IfxCif.h:2688
IfxCif_setJpeTableId
IFX_INLINE void IfxCif_setJpeTableId(IfxCif_JpeTableId tableId)
Function to set the JPE Table ID.
Definition: IfxCif.h:2937
IfxCif_setIspisOutputWindowOffsets
IFX_INLINE void IfxCif_setIspisOutputWindowOffsets(IfxCif_ImageTiers hOffset, uint16 vOffset)
Function to set the image stabilization offsets of the output window.
Definition: IfxCif.h:2887
IfxCif_JpeDebugSignalSources
IfxCif_JpeDebugSignalSources
Enumerator for the debug signal sources.
Definition: IfxCif.h:414
IfxCif_SecurityWatchdogTimeoutCounters
IfxCif_SecurityWatchdogTimeoutCounters
Enumerator for watchdog timeout counters.
Definition: IfxCif.h:550
IfxCif_getEpOutputEnableState
IFX_EXTERN IfxCif_State IfxCif_getEpOutputEnableState(IfxCif_ExtraPath z)
Function to query the current output enable state of one extra path.
Definition: IfxCif.c:980
IfxCif_EpErrorSources
IfxCif_EpErrorSources
Enumerator for error sources of extra paths.
Definition: IfxCif.h:573
IfxCif_getEpRecenterValue
IFX_EXTERN uint8 IfxCif_getEpRecenterValue(IfxCif_ExtraPath z)
Function to query the current recenter value of one extra path.
Definition: IfxCif.c:997
IfxCif_IspSyncPolarity
IfxCif_IspSyncPolarity
Definition: IfxCif.h:293
IfxCif_EpInterrupts_FrameEnd
Picture end of frame interrupt.
Definition: IfxCif.h:601
IfxCif_JpeTableId_VlcDcTable1
VLC DC Table 1.
Definition: IfxCif.h:504
IfxCif_DpCounters
IfxCif_DpCounters
Enumerator for debug path counters.
Definition: IfxCif.h:641
IfxCif_DpControlSources_TimestampCounter
Timestamp counter.
Definition: IfxCif.h:634
IfxCif_MiStatusClearSources_ExtraPath5FifoFull
FIFO full flag in extra path 5.
Definition: IfxCif.h:370
IfxCif_EpErrorSources_ExtraPath4FifoFull
FIFO of extra path 4 is full.
Definition: IfxCif.h:576
IfxCif_MiStatusInformationSources_MainPictureCbFifoFull
FIFO full flag of Cb FIFO in main path asserted since last clear.
Definition: IfxCif.h:387
IfxCif_IspInterruptSources
IfxCif_IspInterruptSources
Enumerator for interrupt sources of the ISP submodule.
Definition: IfxCif.h:260
IfxCif_HuffmanTables_Table1
Huffman Table 1.
Definition: IfxCif.h:409
IfxCif_EpFeatures
IfxCif_EpFeatures
Enumerator for extra path features.
Definition: IfxCif.h:589
IfxCif_InterruptTriggeredState_Triggered
Interrupt was triggered.
Definition: IfxCif.h:146
IfxCif_resetSecurityWatchdogCounter
IFX_EXTERN void IfxCif_resetSecurityWatchdogCounter(IfxCif_SecurityWatchdogCounters counter)
Function to reset one watchdog counter.
Definition: IfxCif.c:2698
IfxCif_IspInterruptSources_StartEdgeOfHSync
Start Edge of h_sync.
Definition: IfxCif.h:263
IfxCif_IspInputInterface_16BitExternalInterface
16-bit external Interface
Definition: IfxCif.h:255
IfxCif_setEpWriteFormat
IFX_EXTERN void IfxCif_setEpWriteFormat(IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat)
Function to set the write format for one extra path.
Definition: IfxCif.c:3091
IfxCif_getMaskedMiInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource)
Function to query the masked state of an interrupt.
Definition: IfxCif.c:1918
IfxCif_HuffmanTableComponents_Component1
Component 1.
Definition: IfxCif.h:400
IfxCif_IspColorSpaceMatrixCrominanceClippingRange
IfxCif_IspColorSpaceMatrixCrominanceClippingRange
Enumerator for the clipping range of the crominance for the ISP output.
Definition: IfxCif.h:203
IfxCif_getDpUserDefinedSymbol
IFX_EXTERN uint16 IfxCif_getDpUserDefinedSymbol(uint8 x)
Function to query the value of one user defined debug symbol.
Definition: IfxCif.c:477
IfxCif_getEpCroppingCurrentPictureOffset
IFX_EXTERN uint16 IfxCif_getEpCroppingCurrentPictureOffset(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture offset of one tier of one extra path...
Definition: IfxCif.c:560
IfxCif_Submodules_YCSplitter
Y/C-Splitter submodule.
Definition: IfxCif.h:177
IfxCif_setDpCounter
IFX_EXTERN void IfxCif_setDpCounter(IfxCif_DpCounters counter, uint32 counterValue)
Function to set one debug path counter to a counter value.
Definition: IfxCif.c:2772
IfxCif_getEpCroppingPictureSize
IFX_EXTERN uint16 IfxCif_getEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping picture size of one tier of one extra path.
Definition: IfxCif.c:689


iLLD_TC26B: IfxCif_Cam.c Source File

  • Cif
  • Cam
IfxCif_Cam.c
Go to the documentation of this file.
1 /**
2 * \file IfxCif_Cam.c
3 * \brief CIF CAM details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxCif_Cam.h"
47 #include "Src/Std/IfxSrc.h"
48
49 /******************************************************************************/
50 /*----------------------------------Macros------------------------------------*/
51 /******************************************************************************/
52
53 #define IFXCIF_CAM_ALIGN(size, align) ((((size) / (align)) * (align)) + ((((size) % (align)) != 0) ? (align) : 0))
54
55 #define IFXCIF_CAM_MEM_ALIGN(size) IFXCIF_CAM_ALIGN(size, IFXCIF_CAM_MEM_ALIGN_SIZE)
56
57 /** \addtogroup IfxLld_Cif_Cam_camEnumerations
58 * \{ */
59
60 /******************************************************************************/
61 /*-----------------------Private Function Prototypes--------------------------*/
62 /******************************************************************************/
63
64 /**
65 * \param cam cam handle
66 */
67 IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initMemSize(IfxCif_Cam *cam, const IfxCif_Cam_Config *config);
68
69 /** \} */
70
71 /** \addtogroup IfxLld_Cif_Cam_camFunctions
72 * \{ */
73 /******************************************************************************/
74 /*------------------------Inline Function Prototypes--------------------------*/
75 /******************************************************************************/
76
77 /**
78 */
79 IFX_INLINE uint32 IfxCif_Cam_calcMem(uint32 bytes, float32 frames);
80
81 /**
82 * \return None
83 */
84 IFX_INLINE void IfxCif_Cam_initPictInfo(IfxCif_Cam_PictureInfo *m, const IfxCif_Cam_MemConfig *mcfg);
85
86 /** \brief initializes GPIO Ports for image capturing
87 * \return None
88 */
89 IFX_INLINE void IfxCif_Cam_initPortPins(IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
90
91 /**
92 */
93 IFX_INLINE boolean IfxCif_Cam_isEmulationExtensionAvailable(void);
94
95 /**
96 * \param cam cam handle
97 */
98 IFX_INLINE uint32 IfxCif_Cam_yuvMemSize(const IfxCif_Cam *cam);
99
100 /******************************************************************************/
101 /*-----------------------Private Function Prototypes--------------------------*/
102 /******************************************************************************/
103
104 /** \brief OVT OV10630 sensor Camera SensorcConfig subroutine , Config file is preloaded to pflash
105 */
106 IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initCamera(const IfxCif_Cam_Config *config);
107
108 /** \brief Initialises the CIF for image capturing
109 * \param cam cam handel
110 * \return None
111 */
112 IFX_STATIC void IfxCif_Cam_initCif(const IfxCif_Cam *cam, const IfxCif_Cam_Config *config);
113
114 /**
115 * \return None
116 */
117 IFX_STATIC void IfxCif_Cam_initCifDownscaler(const IfxCif_Cam_Downscaling *ds);
118
119 /**
120 * \param cam cam handle
121 * \return None
122 */
123 IFX_STATIC void IfxCif_Cam_initCifExtraPath(const IfxCif_Cam *cam, IfxCif_ExtraPath ep, const IfxCif_Cam_Config *config);
124
125 /**
126 * \return None
127 */
128 IFX_STATIC void IfxCif_Cam_initCifIspUnit(const IfxCif_Cam_Config *config);
129
130 /**
131 * \return None
132 */
133 IFX_STATIC void IfxCif_Cam_initCifJpegEncoder(const IfxCif_Cam_Config *config);
134
135 /**
136 * \param cam cam handle
137 * \return None
138 */
139 IFX_STATIC void IfxCif_Cam_initCifMemInterface(const IfxCif_Cam *cam, const IfxCif_Cam_Config *config);
140
141 /** \brief Enables CIF and EMEM and initialises all memory to 0
142 * \return None
143 */
144 IFX_STATIC void IfxCif_Cam_initEmem(void);
145
146 /** \} */
147
148 /******************************************************************************/
149 /*---------------------Inline Function Implementations------------------------*/
150 /******************************************************************************/
151
152 IFX_INLINE uint32 IfxCif_Cam_calcMem(uint32 bytes, float32 frames)
153 {
154 float32 fbytes = (float32)bytes * frames;
155 uint32 ubytes = (uint32)__roundf(fbytes);
156
157 return Ifx_AlignOn32(ubytes);
158 }
159
160
161 IFX_INLINE void IfxCif_Cam_initPictInfo(IfxCif_Cam_PictureInfo *m, const IfxCif_Cam_MemConfig *mcfg)
162 {
163 m->hSize = mcfg->hSize;
164 m->vSize = mcfg->vSize;
165 m->hOffset = mcfg->hOffset;
166 m->vOffset = mcfg->vOffset;
167 }
168
169
170 IFX_INLINE void IfxCif_Cam_initPortPins(IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
171 {
172 /* Setup the P00.0..9, P02.0..8 pad drivers */
173 IfxPort_setGroupPadDriver(&MODULE_P02, 0, 0x01FFU, padDriver);
174 IfxPort_setGroupPadDriver(&MODULE_P00, 0, 0x03FFU, padDriver);
175
176 /* CIF Data Lines */
177 /* P02.0 .. 8 as input for CIFD0..D8 */
178 /* P00.0 .. 6 as input for CIFD9..D15 */
179 IfxPort_setGroupModeInput(&MODULE_P02, 0, 0x01FFU, inputMode);
180 IfxPort_setGroupModeInput(&MODULE_P00, 0, 0x007FU, inputMode);
181
182 /* CIF synchronisation lines */
183 IfxPort_setPinModeInput(&MODULE_P00, 8, inputMode); /* CIFVSNC */
184 IfxPort_setPinModeInput(&MODULE_P00, 9, inputMode); /* CIFHSNC */
185 IfxPort_setPinModeInput(&MODULE_P00, 7, inputMode); /* CIFCLK */
186 }
187
188
189 IFX_INLINE boolean IfxCif_Cam_isEmulationExtensionAvailable(void)
190 {
191 return (MODULE_SCU.CHIPID.B.EEA != 0) ? TRUE : FALSE;
192 }
193
194
195 IFX_INLINE uint32 IfxCif_Cam_yuvMemSize(const IfxCif_Cam *cam)
196 {
197 return cam->memAreas.y.size + cam->memAreas.cb.size + cam->memAreas.cr.size;
198 }
199
200
201 /******************************************************************************/
202 /*-------------------------Function Implementations---------------------------*/
203 /******************************************************************************/
204
205 void IfxCif_Cam_clearAllFlags(const IfxCif_Cam *cam)
206 {
207 (void)cam;
208 MODULE_CIF.JPE.STATUS_ICR.U = 0xFFFFFFFFUL;
209 MODULE_CIF.MI.ICR.U = 0xFFFFFFFFUL;
210 MODULE_CIF.ISP.ICR.U = 0xFFFFFFFFUL;
211 }
212
213
214 void IfxCif_Cam_disableJpegEncoder(const IfxCif_Cam *cam)
215 {
216 IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_JpegData, IfxCif_State_Disabled);
217 IfxCif_setDataPathSelectorForMainPath(IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed);
218
219 if (cam->ispMode == IfxCif_Cam_IspMode_raw)
220 {
221 IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_RawData, IfxCif_State_Enabled);
222 }
223 else
224 {
225 IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_MainPictureData, IfxCif_State_Enabled);
226 }
227 }
228
229
230 void IfxCif_Cam_enableJpegEncoder(const IfxCif_Cam *cam)
231 {
232 IFX_UNUSED_PARAMETER(cam);
233 IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_RawData, IfxCif_State_Disabled);
234 IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_MainPictureData, IfxCif_State_Disabled);
235 IfxCif_setDataPathSelectorForMainPath(IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder);
236 IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_JpegData, IfxCif_State_Enabled);
237 }
238
239
240 IFX_CONST IfxCif_Cam_PictureInfo *IfxCif_Cam_getExtraPathPictureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
241 {
242 const IfxCif_Cam_PictureInfo *m = NULL_PTR;
243
244 if (z <= IfxCif_ExtraPath_5)
245 {
246 m = &(cam->memAreas.ep[z].image);
247 }
248
249 return m;
250 }
251
252
253 boolean IfxCif_Cam_getLastJpegEncodingInfo(IfxCif_Cam *cam, Ifx_AddressValue *address, sint32 *size)
254 {
255 boolean result = FALSE;
256
257 if (IfxCif_Cam_isJpegEncodingComplete(cam))
258 {
259 /* event for sending JPEG encoded image */
260 IfxCif_Cam_clearJpegEncodingCompleteFlag(cam);
261 Ifx_AddressValue nextAddress = IfxCif_Cam_getNextJpegFrameAddress(cam);
262
263 if (((IfxCif_Cam_JfifHeader *)nextAddress)->app0 == 0xE0FF)
264 {
265 /* correct JPEG header was detected. */
266 *address = IfxCif_Cam_getLastFrameAddress(cam);
267 *size = IfxCif_Cam_getJpegEncodedSize(cam);
268 result = TRUE;
269 }
270 else
271 {}
272 }
273
274 return result;
275 }
276
277
278 IfxCif_Cam_Status IfxCif_Cam_init(IfxCif_Cam *cam, const IfxCif_Cam_Config *config, boolean initCam)
279 {
280 /* Try allocating image areas for EMEM */
281 IfxCif_Cam_Status result = IfxCif_Cam_initMemSize(cam, config);
282
283 /* Check if EMEM is available */
284 if (IfxCif_Cam_isEmulationExtensionAvailable() == FALSE)
285 {
286 result = IfxCif_Cam_Status_notAvailable;
287 }
288 else
289 {
290 IfxCif_Cam_initEmem();
291 }
292
293 /* Initialse camera if needed */
294 if ((result == IfxCif_Cam_Status_ok) && (initCam != FALSE))
295 {
296 result = IfxCif_Cam_initCamera(config);
297 }
298
299 /* Finally, initialise the CIF */
300 if (result == IfxCif_Cam_Status_ok)
301 {
302 if (IfxCif_getModuleState() == IfxCif_State_Enabled)
303 {
304 IfxCif_setKernelResetRequestState(IfxCif_State_Enabled);
305 }
306
307 IfxCif_Cam_initPortPins(IfxPort_InputMode_noPullDevice, IfxPort_PadDriver_ttlSpeed1);
308 IfxCif_Cam_initCif(cam, config);
309 }
310
311 cam->configResult = result;
312
313 return result;
314 }
315
316
317 IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initCamera(const IfxCif_Cam_Config *config)
318 {
319 IfxCif_Cam_Status result = IfxCif_Cam_Status_ok;
320 IfxI2c_I2c i2c;
321 IfxI2c_I2c_Device i2cDev;
322
323 { /* Initialise I2C module as master */
324 IfxI2c_I2c_Config i2cConfig;
325 IfxI2c_I2c_initConfig(&i2cConfig, &MODULE_I2C0);
326
327 const IfxI2c_Pins pins = {
328 &IfxI2c0_SCL_P15_4_INOUT,
329 &IfxI2c0_SDA_P15_5_INOUT,
330 IfxPort_PadDriver_ttlSpeed1
331 };
332
333 i2cConfig.pins = &pins;
334 i2cConfig.baudrate = 400000; /* 400 kHz */
335 IfxI2c_I2c_initModule(&i2c, &i2cConfig);
336
337 IfxI2c_I2c_deviceConfig i2cDeviceConfig;
338 IfxI2c_I2c_initDeviceConfig(&i2cDeviceConfig, &i2c); /* Device config for Bus of i2c handle */
339
340 /* device address is obtained from the setup data table */
341 i2cDeviceConfig.deviceAddress = (0xFFU & config->setupDataTable[0]);
342 IfxI2c_I2c_initDevice(&i2cDev, &i2cDeviceConfig);
343 }
344
345 /* Send camera configuration array */
346 {
347 uint32 count;
348
349 for (count = 0; count < config->setupDataCount && result == IfxCif_Cam_Status_ok; count++)
350 {
351 uint32 nakCnt = 0; /* counts the NAKs */
352
353 while (IfxI2c_I2c_write(&i2cDev, ((uint8 *)&(config->setupDataTable[count])) + 1, 3) == IfxI2c_I2c_Status_nak)
354 {
355 nakCnt++;
356
357 if (nakCnt >= IFXCIF_MAX_I2CNAK) /* ~400 - 500 us */
358 {
359 result = IfxCif_Cam_Status_cameraCommError;
360 break;
361 }
362 }
363 }
364 }
365
366 return result;
367 }
368
369
370 IFX_STATIC void IfxCif_Cam_initCif(const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
371 {
372 const IfxCif_Cam_Common *common = config->common;
373
374 IfxCif_setModuleStateRequest(IfxCif_State_Enabled);
375 IfxCif_setSoftwareResetMode(IfxCif_Submodules_AllModules, IfxCif_State_Enabled);
376
377 //IfxCif_setInternalClockMode(IfxCif_Submodules_Debug, IfxCif_State_Enabled);
378 //IfxCif_setInternalClockMode(IfxCif_Submodules_SecurityWatchdog, IfxCif_State_Enabled);
379
380 IfxCif_Cam_initCifDownscaler(config->downscaling);
381 IfxCif_Cam_initCifExtraPath(cam, IfxCif_ExtraPath_1, config);
382 IfxCif_Cam_initCifExtraPath(cam, IfxCif_ExtraPath_2, config);
383 IfxCif_Cam_initCifExtraPath(cam, IfxCif_ExtraPath_3, config);
384 IfxCif_Cam_initCifExtraPath(cam, IfxCif_ExtraPath_4, config);
385 IfxCif_Cam_initCifExtraPath(cam, IfxCif_ExtraPath_5, config);
386
387 IfxCif_Cam_initCifMemInterface(cam, config);
388 IfxCif_Cam_initCifIspUnit(config);
389
390 if (common->jpegEnabled)
391 {
392 IfxCif_Cam_enableJpegEncoder(cam);
393 }
394 else
395 {
396 IfxCif_Cam_disableJpegEncoder(cam);
397 }
398
399 if (common->jpegTables != NULL_PTR)
400 {
401 IfxCif_Cam_initCifJpegEncoder(config);
402 }
403 }
404
405
406 IFX_STATIC void IfxCif_Cam_initCifDownscaler(const IfxCif_Cam_Downscaling *ds)
407 {
408 if (ds != NULL_PTR)
409 {
410 IfxCif_setInternalClockMode(IfxCif_Submodules_LinearDownscaler,
411 ds->enabled ? IfxCif_State_Enabled : IfxCif_State_Disabled);
412 IfxCif_setLinearDownscalerScalingFactors(ds->hFactor, ds->vFactor);
413 IfxCif_setLinearDownscalerScalingModes(ds->hMode, ds->vMode);
414 }
415 }
416
417
418 IFX_STATIC void IfxCif_Cam_initCifExtraPath(const IfxCif_Cam *cam, IfxCif_ExtraPath ep, const IfxCif_Cam_Config *config)
419 {
420 const IfxCif_Cam_Common *common = config->common;
421 const IfxCif_Cam_MemConfig *mcfg = &(common->extraPaths[ep]);
422
423 /* configuration of extra path is requested when each {hSize, vSize, memFactor} is positive. */
424
425 if ((mcfg->hSize > 0) && (mcfg->vSize > 0) && (mcfg->memFactor > 0))
426 {
427 if ((mcfg->vSize + mcfg->vOffset) > common->ispIn.vSize)
428 {
429 /* invalid setting, the vSize and vOffset is outside the ISP acquisition */
430 IFXCIF_DEBUG;
431 }
432
433 IfxCif_setInternalClockMode(IfxCif_Submodules_ExtraPaths, IfxCif_State_Enabled);
434 IfxCif_setEpFeatureEnableState(ep, IfxCif_EpFeatures_PictureDataPath, IfxCif_State_Enabled);
435 IfxCif_setEpFeatureEnableState(ep, IfxCif_EpFeatures_InitBaseAddress, IfxCif_State_Enabled);
436 IfxCif_setEpFeatureEnableState(ep, IfxCif_EpFeatures_InitOffsetCounter, IfxCif_State_Enabled);
437
438 if (config->ispMode == IfxCif_Cam_IspMode_raw)
439 {
440 IfxCif_setEpWriteFormat(ep, (config->ispRawBpp <= 8) ? IfxCif_EpWriteFormat_Raw8Bit : IfxCif_EpWriteFormat_RawGreater);
441 IfxCif_setEpFeatureEnableState(ep, IfxCif_EpFeatures_ByteSwap, mcfg->byteSwap ? IfxCif_State_Enabled : IfxCif_State_Disabled);
442 }
443 else
444 {
445 IfxCif_setEpWriteFormat(ep, IfxCif_EpWriteFormat_YCbCr);
446 }
447
448 if ((mcfg->hSize + mcfg->hOffset) > common->ispIn.hSize)
449 {
450 /* invalid setting, the hSize and hOffset is outside the ISP acquisition */
451 IFXCIF_DEBUG;
452 }
453
454 IfxCif_setEpCroppingEnableState(ep, IfxCif_State_Enabled);
455 IfxCif_setEpCroppingPictureSizes(ep, mcfg->hSize, mcfg->vSize);
456 IfxCif_setEpCroppingOffsetsOutputWindow(ep, mcfg->hOffset, mcfg->vOffset);
457 IfxCif_setEpBaseInitAddress(ep, IfxCif_Cam_getBbbAddress(cam, cam->memAreas.ep[ep].start));
458 IfxCif_setEpInitSize(ep, cam->memAreas.ep[ep].size);
459 IfxCif_epForceConfigurationUpdate(ep);
460 }
461 }
462
463
464 IFX_STATIC void IfxCif_Cam_initCifIspUnit(const IfxCif_Cam_Config *config)
465 {
466 const IfxCif_Cam_Common *common = config->common;
467
468 IfxCif_setInternalClockMode(IfxCif_Submodules_ImageSignalProcessing, IfxCif_State_Enabled);
469
470 IfxCif_setYCSplitterChannelMode(IfxCif_YCSplitterChannelMode_MainPathAndRawMode);
471 IfxCif_setNumberOfAcquisitionFrames(1);
472
473 if (config->ispRawBpp == 8)
474 {
475 IfxCif_setIspInputSelectionAppendState(IfxCif_State_Enabled);
476 IfxCif_setIspInputInterface(IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb);
477 }
478 else if (config->ispRawBpp == 10)
479 {
480 IfxCif_setIspInputSelectionAppendState(IfxCif_State_Enabled);
481 IfxCif_setIspInputInterface(IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb);
482 }
483 else if (config->ispRawBpp == 12)
484 {
485 IfxCif_setIspInputSelectionAppendState(IfxCif_State_Enabled);
486 IfxCif_setIspInputInterface(IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb);
487 }
488 else if (config->ispRawBpp == 14)
489 {
490 IfxCif_setIspInputSelectionAppendState(IfxCif_State_Enabled);
491 IfxCif_setIspInputInterface(IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb);
492 }
493 else if (config->ispRawBpp == 16)
494 {
495 IfxCif_setIspInputSelectionAppendState(IfxCif_State_Disabled);
496 IfxCif_setIspInputInterface(IfxCif_IspInputInterface_16BitExternalInterface);
497 }
498 else
499 {
500 IFXCIF_DEBUG;
501 }
502
503 IfxCif_setIspHSyncPolarity(config->hSyncPolarity);
504 IfxCif_setIspVSyncPolarity(config->vSyncPolarity);
505 IfxCif_setIspSamplingEdge(config->samplingEdge);
506
507 if (config->ispMode == IfxCif_Cam_IspMode_raw)
508 {
509 IfxCif_setIspMode(IfxCif_IspMode_RawPicture);
510 IfxCif_setIspFieldInvertState(IfxCif_State_Disabled);
511 IfxCif_setIspAcquisitionSizes(common->ispIn.hSize, common->ispIn.vSize);
512
513 /* the followings are ignored, but set to default */
514 IfxCif_setIspCcirSequence(IfxCif_IspCcirSequence_YCbYCr);
515 IfxCif_setIspColorSpaceMatrixCrominanceClippingRange(IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255);
516 IfxCif_setIspColorSpaceMatrixLuminanceClippingRange(IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255);
517 }
518 else if ((config->ispMode == IfxCif_Cam_IspMode_yuvInterleaved)
519 || (config->ispMode == IfxCif_Cam_IspMode_yuvPlanar))
520 {
521 IfxCif_setIspMode(IfxCif_IspMode_ItuRBT601);
522 IfxCif_setIspFieldInvertState(IfxCif_State_Enabled);
523 IfxCif_setIspAcquisitionSizes(common->ispIn.hSize * 2, common->ispIn.vSize);
524
525 IfxCif_setIspCcirSequence(IfxCif_IspCcirSequence_YCbYCr);
526 IfxCif_setIspColorSpaceMatrixCrominanceClippingRange(IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255);
527 IfxCif_setIspColorSpaceMatrixLuminanceClippingRange(IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255);
528 }
529 else
530 {
531 /* undefined */
532 IFXCIF_DEBUG;
533 }
534
535 IfxCif_setIspAcquisitionOffsets(common->ispIn.hOffset, common->ispIn.vOffset);
536 IfxCif_setIspPictureSizes(common->ispIn.hSize, common->ispIn.vSize);
537 IfxCif_setIspOutputWindowOffsets(common->ispIn.hOffset, common->ispIn.vOffset);
538
539 IfxCif_setIspisEnableState(IfxCif_State_Enabled);
540 IfxCif_setIspisPictureSizes(common->mainPath.hSize, common->mainPath.vSize);
541 IfxCif_setIspisOutputWindowOffsets((IfxCif_ImageTiers)common->mainPath.hOffset, common->mainPath.vOffset);
542
543 IfxCif_generateIspImmediateConfigUpdateSignal();
544
545 IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources_FrameCompletelyPutOut, IfxCif_State_Enabled);
546 //IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources_IspTurnedOff, IfxCif_State_Enabled);
547
548 if (common->ispInterrupt.priority > 0)
549 {
550 volatile Ifx_SRC_SRCR *srcr = &SRC_CIFISP;
551 IfxSrc_init(srcr, (IfxSrc_Tos)common->ispInterrupt.provider, (Ifx_Priority)common->ispInterrupt.priority);
552 IfxSrc_enable(srcr);
553 }
554 }
555
556
557 IFX_STATIC void IfxCif_Cam_initCifJpegEncoder(const IfxCif_Cam_Config *config)
558 {
559 const IfxCif_Cam_JpegTables *jpeTables = config->common->jpegTables;
560
561 IfxCif_setInternalClockMode(IfxCif_Submodules_JpegEncoder, IfxCif_State_Enabled);
562
563 /* Select encoding table */
564 IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents_Y, IfxCif_JpeQTableSelector_Table0);
565 IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents_U, IfxCif_JpeQTableSelector_Table1);
566 IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents_V, IfxCif_JpeQTableSelector_Table1);
567
568 /* Programming encoding table */
569 IfxCif_programJpeTable(IfxCif_JpeTableId_QTable0, jpeTables->y.q.entry, jpeTables->y.q.length);
570 IfxCif_programJpeTable(IfxCif_JpeTableId_QTable1, jpeTables->uv.q.entry, jpeTables->uv.q.length);
571 IfxCif_programJpeTable(IfxCif_JpeTableId_VlcDcTable0, jpeTables->y.dc.entry, jpeTables->y.dc.length);
572 IfxCif_programJpeTable(IfxCif_JpeTableId_VlcDcTable1, jpeTables->uv.dc.entry, jpeTables->uv.dc.length);
573 IfxCif_programJpeTable(IfxCif_JpeTableId_VlcAcTable0, jpeTables->y.ac.entry, jpeTables->y.ac.length);
574 IfxCif_programJpeTable(IfxCif_JpeTableId_VlcAcTable1, jpeTables->uv.ac.entry, jpeTables->uv.ac.length);
575
576 /* JPEG Codec Image Size */
577 const IfxCif_Cam_MemConfig *mcfg = &(config->common->mainPath);
578
579 if (config->ispMode == IfxCif_Cam_IspMode_raw)
580 {
581 IfxCif_setJpegCodecImageSizes(mcfg->hSize, mcfg->vSize);
582 }
583 else if (config->ispMode == IfxCif_Cam_IspMode_yuvInterleaved)
584 {
585 IfxCif_setJpegCodecImageSizes(mcfg->hSize, mcfg->vSize);
586 }
587 else
588 {
589 IFXCIF_DEBUG;
590 }
591
592 /* JPE Header Mode Definition Register */
593 IfxCif_setJpeHeaderMode(IfxCif_JpeHeaderMode_JfifHeader);
594
595 /* JPE Status Interrupt Mask Register */
596 IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources_EncodingComplete, IfxCif_State_Enabled);
597 //IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources_HeaderGenerationComplete, IfxCif_State_Enabled);
598
599 /* JPE Command To Start Stream Header Generation Register */
600 IfxCif_jpeGenerateHeader();
601
602 /* JPE Start Command To Start JFIF Stream Encoding Register */
603 IfxCif_startJpegJfifStreamEncoder();
604 IfxCif_setJpegJfifStreamEncoderContinuousMode
605 (IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically);
606
607 /* JPE Automatic Configuration Update Register */
608 IfxCif_initJpegEncoder();
609 }
610
611
612 IFX_STATIC void IfxCif_Cam_initCifMemInterface(const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
613 {
614 IfxCif_setInternalClockMode(IfxCif_Submodules_MemoryInterface, IfxCif_State_Enabled);
615
616 if (config->ispMode == IfxCif_Cam_IspMode_raw)
617 {
618 IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_RawData, IfxCif_State_Enabled);
619 IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength_8BeatBursts);
620
621 if (config->ispRawBpp > 8)
622 {
623 IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit);
624 }
625 else
626 {
627 IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit);
628 }
629 }
630 else if (config->ispMode == IfxCif_Cam_IspMode_yuvInterleaved)
631 {
632 IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_MainPictureData, IfxCif_State_Enabled);
633 IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength_8BeatBursts);
634 IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit); /* interleaved mode */
635 }
636 else
637 {
638 IFXCIF_DEBUG;
639 }
640
641 IfxCif_setMiBaseAddressInitializationEnableState(IfxCif_State_Enabled);
642 IfxCif_setMiMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents_Y, IfxCif_Cam_getBbbAddress(cam, cam->memAreas.y.start));
643 IfxCif_setMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents_Y, cam->memAreas.y.size);
644 IfxCif_generateMiImmediateConfigUpdateSignal();
645
646 IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources_MainPictureFrameEnd, IfxCif_State_Enabled);
647 //IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources_FillMainPictureY, IfxCif_State_Enabled);
648 }
649
650
651 IFX_STATIC void IfxCif_Cam_initEmem(void)
652 {
653 IfxEmem_setClockEnableState(IfxEmem_State_enabled);
654 __nop();
655
656 if (IfxEmem_LockedState_locked == IfxEmem_getLockedState())
657 {
658 /* apply unlock sequence */
659 IfxEmem_setUnlockStandbyLockFlag(0x1);
660 IfxEmem_setUnlockStandbyLockFlag(0x3);
661 IfxEmem_setUnlockStandbyLockFlag(0x7);
662 /* wait one cycle for unlock */
663 __nop();
664 }
665
666 IfxEmem_setTileConfigMode(IfxEmem_TileConfigMode_calibMode, IfxEmem_TileNumber_0);
667
668 #if IFXCIF_CAM_INITIALIZE_EMEM
669 {
670 uint64 *pmem;
671 uint32 i;
672
673 /* initialize the whole EMEM with 0 */
674 pmem = (uint64 *)IFXEMEM_START_ADDR_CPU;
675
676 for (i = 0; (uint64)i < (IFXEMEM_SIZE / 8); i += 1)
677 {
678 *(pmem++) = 0;
679 }
680 }
681 #endif
682 }
683
684
685 IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initMemSize(IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
686 {
687 IfxCif_Cam_Status result = IfxCif_Cam_Status_ok;
688 IfxCif_Cam_MemAreas *m = &cam->memAreas;
689 const IfxCif_Cam_Common *common = config->common;
690 const IfxCif_Cam_MemConfig *mcfg = &(common->mainPath);
691
692 cam->nextFreeAddress = 0x00000000;
693 cam->availMemSize = 0x00100000;
694 cam->cif = &MODULE_CIF;
695 cam->emem = &MODULE_EMEM;
696 cam->configResult = IfxCif_Cam_Status_ok;
697 cam->totalMemSize = 0;
698 cam->ispMode = config->ispMode;
699 cam->jfif = NULL_PTR;
700
701 memset(m, 0, sizeof(IfxCif_Cam_MemAreas));
702
703 uint32 numPixels = mcfg->hSize * mcfg->vSize;
704
705 /* Calculate MainPath memory usage information ------------------------------------ */
706 if (config->ispMode == IfxCif_Cam_IspMode_raw)
707 {
708 cam->ispBpp = (config->ispRawBpp > 8) ? 2 : 1;
709 m->y.size = IfxCif_Cam_calcMem(numPixels * cam->ispBpp, mcfg->memFactor) + IFXCIF_CAM_MEM_GAPSIZE;
710 IfxCif_Cam_initPictInfo(&m->y.image, mcfg);
711 m->cb.size = 0 + IFXCIF_CAM_MEM_GAPSIZE;
712 m->cr.size = 0 + IFXCIF_CAM_MEM_GAPSIZE;
713 }
714 else if (config->ispMode == IfxCif_Cam_IspMode_yuvInterleaved)
715 {
716 cam->ispBpp = 2;
717 m->y.size = IfxCif_Cam_calcMem(numPixels * cam->ispBpp, mcfg->memFactor) + IFXCIF_CAM_MEM_GAPSIZE;
718 IfxCif_Cam_initPictInfo(&m->y.image, mcfg);
719 m->cb.size = 0;
720 m->cr.size = m->cb.size;
721 }
722 else if (config->ispMode == IfxCif_Cam_IspMode_yuvPlanar)
723 {
724 IFXCIF_DEBUG; /* not tested! */
725 cam->ispBpp = 2;
726 m->y.size = IfxCif_Cam_calcMem(numPixels, mcfg->memFactor) + IFXCIF_CAM_MEM_GAPSIZE;
727 IfxCif_Cam_initPictInfo(&m->y.image, mcfg);
728 m->cb.size = m->y.size / 2;
729 m->cr.size = m->cb.size;
730 }
731
732 m->y.start = (Ifx_AddressValue)IFXEMEM_START_ADDR_CPU_CACHED;
733
734 if (common->jpegEnabled != 0)
735 {
736 cam->memAreas.y.size = Ifx_AlignOn32(cam->memAreas.y.size / 8);
737 }
738
739 m->cb.start = (Ifx_AddressValue)((uint32)m->y.start + m->y.size);
740 m->cr.start = (Ifx_AddressValue)((uint32)m->cb.start + m->cb.size);
741
742 cam->totalMemSize = IFXCIF_CAM_MEM_ALIGN(IfxCif_Cam_yuvMemSize(cam));
743
744 IfxCif_ExtraPath z = IfxCif_ExtraPath_1;
745 Ifx_AddressValue nextStart = (Ifx_AddressValue)(IFXEMEM_START_ADDR_CPU_CACHED + cam->totalMemSize);
746
747 /* Calculate ExtraPath 1 memory usage information --------------------------------- */
748 IfxCif_Cam_MemInfo *mep = &(m->ep[z]);
749 mcfg = &common->extraPaths[z];
750 mep->start = nextStart;
751 mep->size = IfxCif_Cam_calcMem(cam->ispBpp * (mcfg->vSize * mcfg->hSize), mcfg->memFactor);
752 IfxCif_Cam_initPictInfo(&mep->image, mcfg);
753
754 if (config->downscaling != NULL_PTR)
755 {
756 const IfxCif_Cam_Downscaling *downscaling = config->downscaling;
757
758 if (downscaling->enabled)
759 {
760 /* NOTE: preliminary version (using 2x or 4x downscaling only) */
761 /* It should be possible to compute the size from the given parameters */
762 if ((downscaling->sizeFactor != 4) && (downscaling->sizeFactor != 2))
763 {
764 IFXCIF_DEBUG;
765 }
766
767 mep->size /= (downscaling->sizeFactor * downscaling->sizeFactor);
768
769 if (downscaling->hMode != IfxCif_LinearDownscalerScalingMode_Disabled)
770 {
771 mep->image.hSize /= downscaling->sizeFactor;
772 }
773
774 if (downscaling->vMode != IfxCif_LinearDownscalerScalingMode_Disabled)
775 {
776 mep->image.vSize /= downscaling->sizeFactor;
777 }
778 }
779 }
780
781 cam->totalMemSize = cam->totalMemSize + IFXCIF_CAM_MEM_ALIGN(mep->size);
782 nextStart = (Ifx_AddressValue)(IFXEMEM_START_ADDR_CPU_CACHED + cam->totalMemSize);
783
784 /* Calculate ExtraPath 2..5 memory usage information ------------------------------ */
785 for (z = IfxCif_ExtraPath_2; z <= IfxCif_ExtraPath_5; z++)
786 {
787 mep = &(m->ep[z]);
788 mcfg = &common->extraPaths[z];
789 mep->start = nextStart;
790 mep->size = IfxCif_Cam_calcMem(cam->ispBpp * (mcfg->vSize * mcfg->hSize), mcfg->memFactor);
791 IfxCif_Cam_initPictInfo(&mep->image, mcfg);
792 cam->totalMemSize = cam->totalMemSize + IFXCIF_CAM_MEM_ALIGN(mep->size);
793 nextStart = (Ifx_AddressValue)(IFXEMEM_START_ADDR_CPU_CACHED + cam->totalMemSize);
794 }
795
796 /* Total memory usage ------------------------------------------------------------- */
797 if (cam->totalMemSize <= cam->availMemSize)
798 {
799 /* if enough memory available..... */
800 cam->availMemSize -= cam->totalMemSize;
801
802 if (cam->nextFreeAddress == 0)
803 {
804 cam->nextFreeAddress = (Ifx_AddressValue)IFXEMEM_START_ADDR_CPU_CACHED;
805 }
806
807 cam->nextFreeAddress = (Ifx_AddressValue)((uint32)cam->nextFreeAddress + cam->totalMemSize);
808 }
809 else
810 {
811 IFXCIF_DEBUG;
812 result = IfxCif_Cam_Status_notEnoughMemory;
813 }
814
815 return result;
816 }
817
818
819 void IfxCif_Cam_restartCapture(const IfxCif_Cam *cam, uint8 frames)
820 {
821 (void)cam;
822 IfxCif_setNumberOfAcquisitionFrames(frames);
823 IfxCif_setIspOutputState(IfxCif_State_Enabled);
824 IfxCif_generateIspFrameSynchronousConfigUpdateSignal();
825 }
826
827
828 void IfxCif_Cam_startCapture(const IfxCif_Cam *cam, uint8 frames)
829 {
830 (void)cam;
831 IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State_Enabled);
832 IfxCif_generateMiImmediateConfigUpdateSignal();
833 IfxCif_setNumberOfAcquisitionFrames(frames);
834 IfxCif_setIspInputFormatterState(IfxCif_State_Enabled);
835 IfxCif_setIspOutputState(IfxCif_State_Enabled);
836 IfxCif_generateIspImmediateConfigUpdateSignal();
837 }
838
839
840 void IfxCif_Cam_stopCapture(const IfxCif_Cam *cam)
841 {
842 (void)cam;
843 IfxCif_setIspOutputState(IfxCif_State_Disabled);
844 IfxCif_generateIspImmediateConfigUpdateSignal();
845 }
IfxCif_Cam_Status_cameraCommError
camera comm Error
Definition: IfxCif_Cam.h:102
IFXCIF_DEBUG
#define IFXCIF_DEBUG
Definition: IfxCif_cfg.h:63
IfxCif_Cam_Config
Camera specific configuration.
Definition: IfxCif_Cam.h:257
IFXEMEM_SIZE
#define IFXEMEM_SIZE
Definition: IfxEmem_cfg.h:69
IfxCif_JpeTableId_VlcDcTable0
VLC DC Table 0.
Definition: IfxCif.h:502
IfxCif_setEpBaseInitAddress
void IfxCif_setEpBaseInitAddress(IfxCif_ExtraPath z, Ifx_AddressValue baseAddress)
Function to set the initial base address of the ring buffer of one extra path.
Definition: IfxCif.c:2799
IfxCif_Cam_Config::setupDataTable
IFX_CONST uint32 * setupDataTable
pointer to the first entry of camera-specific configuration data
Definition: IfxCif_Cam.h:266
IfxCif_Cam_PictureInfo::hOffset
uint16 hOffset
horizontal offset
Definition: IfxCif_Cam.h:139
IfxCif_setEpCroppingPictureSizes
void IfxCif_setEpCroppingPictureSizes(IfxCif_ExtraPath z, uint16 hSize, uint16 vSize)
Function to set the image cropping picture sizes one extra path.
Definition: IfxCif.c:2937
IfxCif_Cam_IspMode_yuvInterleaved
yuv interleaved
Definition: IfxCif_Cam.h:84
IfxCif_setNumberOfAcquisitionFrames
IFX_INLINE void IfxCif_setNumberOfAcquisitionFrames(uint16 numberOfFrames)
Function to set the number of acquisition frames.
Definition: IfxCif.h:3007
IfxCif_Cam_enableJpegEncoder
void IfxCif_Cam_enableJpegEncoder(const IfxCif_Cam *cam)
Enable the JPEG encoder and route the acquisition path accordingly.
Definition: IfxCif_Cam.c:230
IfxCif_Cam::memAreas
IfxCif_Cam_MemAreas memAreas
memory area definition
Definition: IfxCif_Cam.h:243
IfxCif_Cam_Config::hSyncPolarity
IfxCif_IspSyncPolarity hSyncPolarity
polarity of HSYNC signal
Definition: IfxCif_Cam.h:262
IfxCif_Cam::configResult
IfxCif_Cam_Status configResult
status of last configuration (or initialisation)
Definition: IfxCif_Cam.h:250
IfxEmem_TileConfigMode_calibMode
EMEM tile mode to calibration memory.
Definition: IfxEmem.h:83
IfxCif_Cam_MemAreas::ep
IfxCif_Cam_MemInfo ep[IFXCIF_EXTRA_PATHS]
ep
Definition: IfxCif_Cam.h:231
IfxCif_Cam_MemInfo::size
uint32 size
size in bytes
Definition: IfxCif_Cam.h:172
IfxCif_Cam::nextFreeAddress
Ifx_AddressValue nextFreeAddress
next free storage address
Definition: IfxCif_Cam.h:245
IfxCif_setIspAcquisitionSizes
IFX_INLINE void IfxCif_setIspAcquisitionSizes(uint16 hSize, uint16 vSize)
Function to set the ISP acquisition sizes.
Definition: IfxCif.h:2788
IfxCif_Cam_JpegTable::q
IfxCif_Cam_TableInfo q
q
Definition: IfxCif_Cam.h:128
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxCif_Cam_PictureInfo::vOffset
uint16 vOffset
vertical offset
Definition: IfxCif_Cam.h:140
IFXCIF_CAM_MEM_ALIGN
#define IFXCIF_CAM_MEM_ALIGN(size)
Definition: IfxCif_Cam.c:55
IfxCif_Cam_MemAreas::cb
IfxCif_Cam_MemInfo cb
cb
Definition: IfxCif_Cam.h:229
IfxCif_Cam_clearJpegEncodingCompleteFlag
IFX_INLINE void IfxCif_Cam_clearJpegEncodingCompleteFlag(const IfxCif_Cam *cam)
Clear the JPEG encoder completed flag.
Definition: IfxCif_Cam.h:461
IfxCif_Cam_Downscaling::hMode
IfxCif_LinearDownscalerScalingMode hMode
hMode
Definition: IfxCif_Cam.h:200
IfxCif_Submodules_JpegEncoder
JPEG Encoder submodule.
Definition: IfxCif.h:175
IfxCif_setYCSplitterChannelMode
IFX_INLINE void IfxCif_setYCSplitterChannelMode(IfxCif_YCSplitterChannelMode mode)
Function to set the Y/C splitter channel mode.
Definition: IfxCif.h:3025
IfxPort_PadDriver_ttlSpeed1
Speed grade 1.
Definition: IfxPort.h:152
IFXCIF_MAX_I2CNAK
#define IFXCIF_MAX_I2CNAK
Definition: IfxCif_cfg.h:71
IfxCif_setMiMainPictureComponentBaseInitAddress
void IfxCif_setMiMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address)
Function to set the initial base address of the ring buffer for one main picture path component...
Definition: IfxCif.c:3744
IfxCif_Cam_PictureInfo
Picture info.
Definition: IfxCif_Cam.h:135
IfxCif_Cam_Config::setupDataCount
uint16 setupDataCount
number of camera-specific configuration data (in DWORDS)
Definition: IfxCif_Cam.h:265
IfxCif_Cam_Downscaling::vMode
IfxCif_LinearDownscalerScalingMode vMode
vMode
Definition: IfxCif_Cam.h:201
IfxCif_Cam_TableInfo::length
uint8 length
length
Definition: IfxCif_Cam.h:116
IfxCif_Cam_MemAreas::cr
IfxCif_Cam_MemInfo cr
cr
Definition: IfxCif_Cam.h:230
IfxCif_JpeQTableSelector_Table0
Q-Table 0.
Definition: IfxCif.h:463
IfxCif_Cam_init
IfxCif_Cam_Status IfxCif_Cam_init(IfxCif_Cam *cam, const IfxCif_Cam_Config *config, boolean initCam)
Initialise the CIF, EMEM, PORT, I2C and the camera itself.
Definition: IfxCif_Cam.c:278
IfxCif_IspCcirSequence_YCbYCr
YCbYCr.
Definition: IfxCif.h:196
IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb
14-bit external Interface if enabled append 2 MSBs as LSBs
Definition: IfxCif.h:253
IfxCif_Cam_initCamera
IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initCamera(const IfxCif_Cam_Config *config)
OVT OV10630 sensor Camera SensorcConfig subroutine , Config file is preloaded to pflash.
Definition: IfxCif_Cam.c:317
IfxCif_Cam_Config::samplingEdge
IfxCif_IspSamplingEdge samplingEdge
sampling edge
Definition: IfxCif_Cam.h:264
IfxCif_YCSplitterChannelMode_MainPathAndRawMode
Y/C splitter is enabled for main path and RAW mode.
Definition: IfxCif.h:185
IfxCif_Cam_calcMem
IFX_INLINE uint32 IfxCif_Cam_calcMem(uint32 bytes, float32 frames)
Definition: IfxCif_Cam.c:152
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
IfxCif_MiBurstLength_8BeatBursts
8-beat bursts
Definition: IfxCif.h:323
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCif_setIspFieldInvertState
IFX_INLINE void IfxCif_setIspFieldInvertState(IfxCif_State fieldInvertState)
Function to enable or disable inversion of the field ID.
Definition: IfxCif.h:2813
IfxCif_Cam_Downscaling::vFactor
uint8 vFactor
vertical factor to program into IfxCif_setLinearDownscalerScalingFactors()
Definition: IfxCif_Cam.h:203
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
IfxCif_setLinearDownscalerScalingFactors
void IfxCif_setLinearDownscalerScalingFactors(uint8 horizFactor, uint8 vertFactor)
Function to set the scaling factors of the linear downscaler.
Definition: IfxCif.c:3600
IfxCif_Cam::ispMode
IfxCif_Cam_IspMode ispMode
actual ISP mode
Definition: IfxCif_Cam.h:251
IfxCif_ExtraPath_3
Definition: IfxCif.h:121
IfxCif_Cam_startCapture
void IfxCif_Cam_startCapture(const IfxCif_Cam *cam, uint8 frames)
Start capture by enabling the ISP output and initialising the MI counter.
Definition: IfxCif_Cam.c:828
IfxCif_Cam_Config::vSyncPolarity
IfxCif_IspSyncPolarity vSyncPolarity
polarity of VSYNC signal
Definition: IfxCif_Cam.h:263
IfxCif_Cam_Downscaling::sizeFactor
uint8 sizeFactor
memory size factor, e.g. half in both H and V usually gives factor of 4
Definition: IfxCif_Cam.h:204
IfxCif_setEpCroppingEnableState
void IfxCif_setEpCroppingEnableState(IfxCif_ExtraPath z, uint32 enableState)
Function to enable or disable image cropping of one extra path.
Definition: IfxCif.c:2838
IfxCif_Cam_JpegTables::y
IfxCif_Cam_JpegTable y
y
Definition: IfxCif_Cam.h:151
IfxPort_setGroupModeInput
void IfxPort_setGroupModeInput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
Set pin modes to input at the pin location specified by &#39;1&#39; by the mask.
Definition: IfxPort.c:155
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255
full Y range 0..255
Definition: IfxCif.h:214
IfxCif_Cam::totalMemSize
uint32 totalMemSize
total occupied memory area (in bytes)
Definition: IfxCif_Cam.h:244
IfxCif_setIspHSyncPolarity
IFX_INLINE void IfxCif_setIspHSyncPolarity(IfxCif_IspSyncPolarity polarity)
Function to set the polarity of the HSYNC signal.
Definition: IfxCif.h:2825
IfxSrc.h
SRC basic functionality.
IfxCif_Cam_disableJpegEncoder
void IfxCif_Cam_disableJpegEncoder(const IfxCif_Cam *cam)
Disable the JPEG encoder and route the acquisition path accordingly to the &#39;original&#39; configuration...
Definition: IfxCif_Cam.c:214
IfxCif_ImageTiers
IfxCif_ImageTiers
Enumerator for tiers.
Definition: IfxCif.h:128
IfxI2c_I2c_Config::baudrate
float32 baudrate
Baudrate.
Definition: IfxI2c_I2c.h:349
IfxCif_Cam_clearAllFlags
void IfxCif_Cam_clearAllFlags(const IfxCif_Cam *cam)
Clear all CIF module notification flags.
Definition: IfxCif_Cam.c:205
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxEmem_TileNumber_0
Tile Number0.
Definition: IfxEmem.h:90
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxI2c_I2c_Config
Structure to configure the Module.
Definition: IfxI2c_I2c.h:346
IfxI2c_I2c_deviceConfig::deviceAddress
uint8 deviceAddress
the slave device&#39;s address
Definition: IfxI2c_I2c.h:366
IfxCif_setIspMode
IFX_INLINE void IfxCif_setIspMode(IfxCif_IspMode mode)
Function to set the ISP mode.
Definition: IfxCif.h:2843
IfxCif_Cam::jfif
IfxCif_Cam_JfifHeader * jfif
pointer to the last acquired JPEG header
Definition: IfxCif_Cam.h:249
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCif_Cam_PictureInfo::vSize
uint16 vSize
vertical (number of lines)
Definition: IfxCif_Cam.h:138
IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit
planar (YCbCr mode) / RAW & data mode (8 bit)
Definition: IfxCif.h:361
IfxCif_Cam_isJpegEncodingComplete
IFX_INLINE boolean IfxCif_Cam_isJpegEncodingComplete(const IfxCif_Cam *cam)
Definition: IfxCif_Cam.h:605
IfxCif_setIspInputFormatterState
IFX_INLINE void IfxCif_setIspInputFormatterState(IfxCif_State inputFormatterState)
Function to enable or disable the ISP input formatter.
Definition: IfxCif.h:2831
IfxCif_EpWriteFormat_RawGreater
RAW & data mode (greater 8 up to 16 bit)
Definition: IfxCif.h:614
IfxCif_Cam_getLastFrameAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastFrameAddress(const IfxCif_Cam *cam)
Returns the address location of last acquired main-path image frame data.
Definition: IfxCif_Cam.h:550
IfxCif_Cam_MemConfig::byteSwap
boolean byteSwap
byte swapping
Definition: IfxCif_Cam.h:164
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
IfxCif_EpFeatures_ByteSwap
Byte swap feature.
Definition: IfxCif.h:593
IfxI2c0_SDA_P15_5_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT
Definition: IfxI2c_PinMap.c:50
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCif_ExtraPath_5
Definition: IfxCif.h:123
IfxCif_setIspInputInterface
IFX_INLINE void IfxCif_setIspInputInterface(IfxCif_IspInputInterface input)
Function to set the ISP input interface bit width.
Definition: IfxCif.h:2837
IfxCif_Cam
Structure which is used as handle for the CIF-CAM functions. This stores cached variables useful for ...
Definition: IfxCif_Cam.h:241
IfxCif_setMiLuminanceBurstLength
void IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength burstLength)
Function to set the burst length for Y, JPEG, or RAW data.
Definition: IfxCif.c:3738
IfxCif_Cam_initCifDownscaler
IFX_STATIC void IfxCif_Cam_initCifDownscaler(const IfxCif_Cam_Downscaling *ds)
Definition: IfxCif_Cam.c:406
IfxCif_setMiMainPictureWriteFormat
IFX_INLINE void IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat format)
Function to set the write format of the main picture path of the memory interface.
Definition: IfxCif.h:2987
IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit
interleaved_combined for YCbCr 4:2:2 only / RAW & data mode (greater 8 up to 16 bit) ...
Definition: IfxCif.h:363
IfxCif_Cam_Config::common
IFX_CONST IfxCif_Cam_Common * common
pointer to common configuration
Definition: IfxCif_Cam.h:259
IfxCif_Cam_MemInfo::image
IfxCif_Cam_PictureInfo image
image
Definition: IfxCif_Cam.h:173
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCif_JpeQTableSelectorComponents_Y
Y-component.
Definition: IfxCif.h:473
IfxCif_setJpeQTableSelector
void IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector)
Function to set the Q-Table selector for one component.
Definition: IfxCif.c:3503
IfxCif_setIspPictureSizes
IFX_INLINE void IfxCif_setIspPictureSizes(uint16 hSize, uint16 vSize)
Function to set the ISP picture sizes.
Definition: IfxCif.h:2862
IfxCif_Cam_Downscaling::hFactor
uint8 hFactor
horizontal factor to program into IfxCif_setLinearDownscalerScalingFactors()
Definition: IfxCif_Cam.h:202
IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb
12-bit external Interface if enabled append 4 MSBs as LSBs
Definition: IfxCif.h:251
IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb
8-bit external Interface if enabled append 8 MSBs as LSBs
Definition: IfxCif.h:247
IfxCif_Submodules_AllModules
All submodules.
Definition: IfxCif.h:169
IfxCif_setIspisEnableState
IFX_INLINE void IfxCif_setIspisEnableState(IfxCif_State enableState)
Function to enable or disable image stabilization.
Definition: IfxCif.h:2881
IfxCif_setJpegJfifStreamEncoderContinuousMode
IFX_INLINE void IfxCif_setJpegJfifStreamEncoderContinuousMode(IfxCif_JpegJfifStreamEncoderContinuousMode mode)
Function to set the stream encoder continuous mode.
Definition: IfxCif.h:2950
IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder
Main path is routed to the JPEG encoder.
Definition: IfxCif.h:104
IfxCif_Cam_Common::jpegEnabled
boolean jpegEnabled
jpeg enabled
Definition: IfxCif_Cam.h:192
IfxCif_Cam_isEmulationExtensionAvailable
IFX_INLINE boolean IfxCif_Cam_isEmulationExtensionAvailable(void)
Definition: IfxCif_Cam.c:189
IfxI2c_I2c_deviceConfig
Structure to configure the device&#39;s data structure.
Definition: IfxI2c_I2c.h:363
IfxEmem_setClockEnableState
void IfxEmem_setClockEnableState(const IfxEmem_State state)
Sets state of the EMEM module clock. Note: Do not use this API for enabling and disabling EMEM withou...
Definition: IfxEmem.c:59
IfxCif_Cam::emem
Ifx_EMEM * emem
pointer to base address of EMEM module SFRs
Definition: IfxCif_Cam.h:248
Ifx_IsrSetting::priority
uint16 priority
Definition: Ifx_Types.h:108
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCif_Cam_IspMode_yuvPlanar
yuv planar
Definition: IfxCif_Cam.h:85
IfxCif_EpFeatures_InitBaseAddress
Init buffer base address.
Definition: IfxCif.h:592
IfxCif_Cam_Status
IfxCif_Cam_Status
Driver status.
Definition: IfxCif_Cam.h:98
IfxCif_setLinearDownscalerScalingModes
void IfxCif_setLinearDownscalerScalingModes(IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode)
Function to set the scaling mode of one tier.
Definition: IfxCif.c:3631
IfxI2c_I2c_initModule
void IfxI2c_I2c_initModule(IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
Initializes the Module.
Definition: IfxI2c_I2c.c:76
Ifx_AlignOn32
#define Ifx_AlignOn32(Size)
Definition: IfxCpu_Intrinsics.h:75
IfxCif_Cam_MemConfig::memFactor
float32 memFactor
multiples of frame count for memory allocation
Definition: IfxCif_Cam.h:159
IfxCif_State_Enabled
Enabled state.
Definition: IfxCif.h:162
IfxI2c_I2c_Status_nak
NAK.
Definition: IfxI2c_I2c.h:320
IfxCif_Submodules_LinearDownscaler
Linear Downscaler submodule.
Definition: IfxCif.h:172
IfxCif_Cam_JpegTables
JPEG tables for all components.
Definition: IfxCif_Cam.h:149
IfxCif_programJpeTable
void IfxCif_programJpeTable(IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length)
Definition: IfxCif.c:2631
IfxCif_Cam_restartCapture
void IfxCif_Cam_restartCapture(const IfxCif_Cam *cam, uint8 frames)
Restart capture by enabling the ISP output.
Definition: IfxCif_Cam.c:819
IfxCif_Cam_initCifJpegEncoder
IFX_STATIC void IfxCif_Cam_initCifJpegEncoder(const IfxCif_Cam_Config *config)
Definition: IfxCif_Cam.c:557
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxCif_Cam_getLastJpegEncodingInfo
boolean IfxCif_Cam_getLastJpegEncodingInfo(IfxCif_Cam *cam, Ifx_AddressValue *address, sint32 *size)
Returns pointer to the memory structure storing last JPEG encoding process.
Definition: IfxCif_Cam.c:253
IfxCif_MiDataPaths_RawData
RAW data path.
Definition: IfxCif.h:330
IfxCif_setIspInputSelectionAppendState
void IfxCif_setIspInputSelectionAppendState(IfxCif_State appendState)
Function to enable or disable appending of bits to the input signal.
Definition: IfxCif.c:3247
IfxCif_setMiFeatureEnableState
void IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths dataPath, IfxCif_State enableState)
Function to enable or disable one memory interface data path.
Definition: IfxCif.c:3643
IfxCif_setMiMainPictureComponentInitSize
void IfxCif_setMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component, uint32 size)
Function to set the initial size of the ring buffer for one main picture path component.
Definition: IfxCif.c:3769
IfxCif_Cam_JpegTable::ac
IfxCif_Cam_TableInfo ac
ac
Definition: IfxCif_Cam.h:130
IfxCif_Cam_Common::extraPaths
IfxCif_Cam_MemConfig extraPaths[IFXCIF_EXTRA_PATHS]
extra paths
Definition: IfxCif_Cam.h:186
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:83
IfxCif_initJpegEncoder
IFX_INLINE void IfxCif_initJpegEncoder(void)
Function to immediately start the JPEG encoder. This function has to be called after IfxCif_startJpeg...
Definition: IfxCif.h:2731
IfxCif_Cam_Common
Common configuration.
Definition: IfxCif_Cam.h:182
IfxCif_Cam_JpegTable::dc
IfxCif_Cam_TableInfo dc
dc
Definition: IfxCif_Cam.h:129
IfxCif_Cam_Downscaling::enabled
boolean enabled
enable
Definition: IfxCif_Cam.h:199
IfxCif_setJpeInterruptEnableState
void IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3437
IfxCif_Cam_Common::ispIn
IfxCif_Cam_PictureInfo ispIn
ispIn
Definition: IfxCif_Cam.h:184
IfxCif_Cam_Status_notAvailable
not available
Definition: IfxCif_Cam.h:103
IfxCif_setEpFeatureEnableState
void IfxCif_setEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState)
Function to enable or disable one feature of one extra path.
Definition: IfxCif.c:2951
IfxI2c_I2c_write
IfxI2c_I2c_Status IfxI2c_I2c_write(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
writes to the I2c device
Definition: IfxI2c_I2c.c:342
IfxCif_generateIspImmediateConfigUpdateSignal
IFX_INLINE void IfxCif_generateIspImmediateConfigUpdateSignal(void)
Function to generate an immediate ISP configuration update signal.
Definition: IfxCif.h:2379
IFXCIF_CAM_MEM_GAPSIZE
#define IFXCIF_CAM_MEM_GAPSIZE
Definition: IfxCif_Cam.h:70
IfxCif_setMiInterruptEnableState
void IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3664
IfxCif_EpWriteFormat_Raw8Bit
Raw 8 bit mode.
Definition: IfxCif.h:613
IfxCif_MiDataPaths_MainPictureData
main picture data path
Definition: IfxCif.h:332
IfxCif_Cam_MemAreas::y
IfxCif_Cam_MemInfo y
y
Definition: IfxCif_Cam.h:228
IfxCif_setEpCroppingOffsetsOutputWindow
void IfxCif_setEpCroppingOffsetsOutputWindow(IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset)
Function to set the image cropping offsets of the output window of one extra path.
Definition: IfxCif.c:2899
IfxCif_EpFeatures_PictureDataPath
enables the extra path picture data path
Definition: IfxCif.h:594
IfxCif_Cam_Config::downscaling
IFX_CONST IfxCif_Cam_Downscaling * downscaling
downscaling settings for ExtraPath 1
Definition: IfxCif_Cam.h:267
IfxCif_Cam_MemConfig
Single path memory interface configuration (used in initialisation/configuration) ...
Definition: IfxCif_Cam.h:157
IfxCif_Cam::ispBpp
boolean ispBpp
byte per pixel
Definition: IfxCif_Cam.h:252
IfxCif_setKernelResetRequestState
IFX_INLINE void IfxCif_setKernelResetRequestState(IfxCif_State state)
Function to request a kernel reset or reset the request bit.
Definition: IfxCif.h:2962
IfxCif_setDataPathSelectorForMainPath
IFX_INLINE void IfxCif_setDataPathSelectorForMainPath(IfxCif_DataPathSelectorForMainPath pathSelector)
Function to set the data path for main path.
Definition: IfxCif.h:2756
IfxCif_ExtraPath
IfxCif_ExtraPath
Enumerator for the extra paths.
Definition: IfxCif.h:117
IfxCif_getModuleState
IFX_INLINE IfxCif_State IfxCif_getModuleState(void)
Function to query the state of the CIF module.
Definition: IfxCif.h:2694
IfxCif_IspMode_ItuRBT601
ITU-R BT.601 (YUV input with H and Vsync signals)
Definition: IfxCif.h:278
IfxCif_setIspCcirSequence
IFX_INLINE void IfxCif_setIspCcirSequence(IfxCif_IspCcirSequence sequence)
Function to set the CCIR sequence.
Definition: IfxCif.h:2795
IfxCif_Cam_getExtraPathPictureInfo
IFX_CONST IfxCif_Cam_PictureInfo * IfxCif_Cam_getExtraPathPictureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns pointer to the variable storing picture info of an extra-path.
Definition: IfxCif_Cam.c:240
IfxCif_Cam_JfifHeader
JPEG JFIF header structure.
Definition: IfxCif_Cam.h:209
IfxCif_JpeTableId_VlcAcTable1
VLC AC Table 1.
Definition: IfxCif.h:505
IfxI2c_I2c_Config::pins
IFX_CONST IfxI2c_Pins * pins
Pins.
Definition: IfxI2c_I2c.h:350
IfxCif_JpeTableId_VlcAcTable0
VLC AC Table 0.
Definition: IfxCif.h:503
IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb
10-bit external Interface if enabled append 6 MSBs as LSBs
Definition: IfxCif.h:249
IfxCif_Cam_Status_notEnoughMemory
not enough Memory
Definition: IfxCif_Cam.h:101
IfxCif_setMiBaseAddressInitializationEnableState
IFX_INLINE void IfxCif_setMiBaseAddressInitializationEnableState(IfxCif_State state)
Function to enable or disable the update of the base address and buffer size shadow registers to the ...
Definition: IfxCif.h:2969
IfxCif_setJpeHeaderMode
IFX_INLINE void IfxCif_setJpeHeaderMode(IfxCif_JpeHeaderMode headerMode)
Function to set the JPE header mode.
Definition: IfxCif.h:2913
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxCif_Cam_initEmem
IFX_STATIC void IfxCif_Cam_initEmem(void)
Enables CIF and EMEM and initialises all memory to 0.
Definition: IfxCif_Cam.c:651
IFXEMEM_START_ADDR_CPU
#define IFXEMEM_START_ADDR_CPU
Definition: IfxEmem_cfg.h:65
IfxCif_epForceConfigurationUpdate
void IfxCif_epForceConfigurationUpdate(IfxCif_ExtraPath z)
Function to trigger an immediate configuration update for one extra path.
Definition: IfxCif.c:317
IfxCif_Cam_TableInfo::entry
IFX_CONST uint8 * entry
entry
Definition: IfxCif_Cam.h:117
IfxCif_Submodules_ImageSignalProcessing
Image Signal Processing submodule.
Definition: IfxCif.h:176
IfxCif_Cam_initCifIspUnit
IFX_STATIC void IfxCif_Cam_initCifIspUnit(const IfxCif_Cam_Config *config)
Definition: IfxCif_Cam.c:464
IfxCif_Cam_Common::mainPath
IfxCif_Cam_MemConfig mainPath
main path
Definition: IfxCif_Cam.h:185
Ifx_AddressValue
pvoid Ifx_AddressValue
Used in address values.
Definition: Ifx_Types.h:104
IfxCif_LinearDownscalerScalingMode_Disabled
Disabled.
Definition: IfxCif.h:311
IfxCif_Cam_MemInfo
Single path memory interface information (used in Runtime)
Definition: IfxCif_Cam.h:169
IfxCif_JpeTableId_QTable1
Q-Table 1.
Definition: IfxCif.h:499
IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed
Main path is routed to the Memory Interface.
Definition: IfxCif.h:103
IfxCif_Cam_getBbbAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_getBbbAddress(const IfxCif_Cam *cam, Ifx_AddressValue cpuAddress)
Convert the CPU address into BBB address.
Definition: IfxCif_Cam.h:468
IfxEmem_State_enabled
EMEM module clock enabled state.
Definition: IfxEmem.h:76
IfxCif_EpFeatures_InitOffsetCounter
Init offest counter.
Definition: IfxCif.h:591
__roundf
#define __roundf
Definition: IfxCpu_IntrinsicsDcc.h:1625
IfxCif_generateMiImmediateConfigUpdateSignal
IFX_INLINE void IfxCif_generateMiImmediateConfigUpdateSignal(void)
Function to generate an immediate configuration update signal for the memory interface submodule...
Definition: IfxCif.h:2385
IfxCif_State_Disabled
Disabled state.
Definition: IfxCif.h:161
IfxCif_setMiOffsetCounterInitializationEnableState
IFX_INLINE void IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State state)
Function to enable or disable the update of the offset counter shadow registers (update will be execu...
Definition: IfxCif.h:3001
IfxCif_JpeHeaderMode_JfifHeader
JFIF header.
Definition: IfxCif.h:444
IfxCif_Cam_Status_ok
ok
Definition: IfxCif_Cam.h:100
IfxCif_setIspColorSpaceMatrixCrominanceClippingRange
IFX_INLINE void IfxCif_setIspColorSpaceMatrixCrominanceClippingRange(IfxCif_IspColorSpaceMatrixCrominanceClippingRange clippingRange)
Function to set the clipping range of the crominance of the ISP output.
Definition: IfxCif.h:2801
IfxCif_ExtraPath_2
Definition: IfxCif.h:120
IfxCif_JpeQTableSelector_Table1
Q-Table 1.
Definition: IfxCif.h:464
IfxCif_Cam_PictureInfo::hSize
uint16 hSize
horizontal (number of pixel)
Definition: IfxCif_Cam.h:137
IfxCif_setIspInterruptEnableState
void IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3261
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255
full UV range 0..255
Definition: IfxCif.h:206
IfxCif_Cam_getJpegEncodedSize
IFX_INLINE uint32 IfxCif_Cam_getJpegEncodedSize(const IfxCif_Cam *cam)
Returns the size (in bytes) of last encoded main-path image data.
Definition: IfxCif_Cam.h:518
IfxCif_setIspisPictureSizes
IFX_INLINE void IfxCif_setIspisPictureSizes(uint16 hSize, uint16 vSize)
Function to set the picture size.
Definition: IfxCif.h:2894
IfxCif_Cam_initPortPins
IFX_INLINE void IfxCif_Cam_initPortPins(IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
initializes GPIO Ports for image capturing
Definition: IfxCif_Cam.c:170
IfxCif_Cam_Downscaling
Downscaler configuration.
Definition: IfxCif_Cam.h:197
IfxI2c_I2c_Device
Structure with slave device data.
Definition: IfxI2c_I2c.h:355
IfxCif_Cam_Common::ispInterrupt
Ifx_IsrSetting ispInterrupt
isp interrupt
Definition: IfxCif_Cam.h:188
IfxEmem_setTileConfigMode
IFX_INLINE void IfxEmem_setTileConfigMode(const IfxEmem_TileConfigMode mode, IfxEmem_TileNumber tile)
Sets all EMEM tiles to calibration memory mode.
Definition: IfxEmem.h:166
IfxI2c_Pins
Pin Structure.
Definition: IfxI2c.h:135
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
sint32
long sint32
Definition: Platform_Types.h:134
IfxCif_EpWriteFormat_YCbCr
YCbCr 16 bit; YCbCr data is handled interleaved as 16 bit data in extra paths.
Definition: IfxCif.h:615
IfxCif_setEpInitSize
void IfxCif_setEpInitSize(IfxCif_ExtraPath z, uint32 size)
Function to set the initial size of the ring buffer of one extra path.
Definition: IfxCif.c:2983
IfxCif_IspMode_RawPicture
RAW picture.
Definition: IfxCif.h:276
IfxCif_Cam_JpegTables::uv
IfxCif_Cam_JpegTable uv
uv
Definition: IfxCif_Cam.h:152
IfxI2c_I2c_initConfig
void IfxI2c_I2c_initConfig(IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
Fills the config structure with default values.
Definition: IfxI2c_I2c.c:54
Ifx_IsrSetting::provider
uint16 provider
Definition: Ifx_Types.h:109
IfxEmem_setUnlockStandbyLockFlag
IFX_INLINE void IfxEmem_setUnlockStandbyLockFlag(const uint8 flag)
Sets Unlock standby lock flag.
Definition: IfxEmem.h:175
IfxI2c_I2c_initDeviceConfig
void IfxI2c_I2c_initDeviceConfig(IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
Fills the config structure of the slave device with default values.
Definition: IfxI2c_I2c.c:69
IfxI2c_I2c
Handler.
Definition: IfxI2c_I2c.h:336
IfxCif_setIspSamplingEdge
IFX_INLINE void IfxCif_setIspSamplingEdge(IfxCif_IspSamplingEdge edge)
Function to set the ISP sampling edge.
Definition: IfxCif.h:2869
IfxCif_MiDataPaths_JpegData
JPEG data path.
Definition: IfxCif.h:331
IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically
encoder first generates next header and then encodes automatically the next frame ...
Definition: IfxCif.h:514
IfxEmem_getLockedState
IfxEmem_LockedState IfxEmem_getLockedState(void)
Gets the EMEM stand RAM lock state.
Definition: IfxEmem.c:53
IfxCif_JpeInterruptSources_EncodingComplete
Encoding complete.
Definition: IfxCif.h:456
IfxI2c0_SCL_P15_4_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT
Definition: IfxI2c_PinMap.c:47
IfxCif_setIspAcquisitionOffsets
IFX_INLINE void IfxCif_setIspAcquisitionOffsets(uint16 hOffset, uint16 vOffset)
Function to set the ISP acquisition offsets.
Definition: IfxCif.h:2781
IfxCif_ExtraPath_1
Definition: IfxCif.h:119
IfxCif_startJpegJfifStreamEncoder
IFX_INLINE void IfxCif_startJpegJfifStreamEncoder(void)
Function to start JFIF stream encoding. Auto reset after one clock cycle.
Definition: IfxCif.h:3031
IfxCif_ExtraPath_4
Definition: IfxCif.h:122
IfxCif_setIspColorSpaceMatrixLuminanceClippingRange
IFX_INLINE void IfxCif_setIspColorSpaceMatrixLuminanceClippingRange(IfxCif_IspColorSpaceMatrixLuminanceClippingRange clippingRange)
Function to set the clipping range of the luminance of the ISP output.
Definition: IfxCif.h:2807
IfxCif_Cam_initCif
IFX_STATIC void IfxCif_Cam_initCif(const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
Initialises the CIF for image capturing.
Definition: IfxCif_Cam.c:370
IfxPort_setGroupPadDriver
void IfxPort_setGroupPadDriver(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
Set pad driver strength at the pin location specified by &#39;1&#39; by the mask.
Definition: IfxPort.c:233
IfxCif_generateIspFrameSynchronousConfigUpdateSignal
IFX_INLINE void IfxCif_generateIspFrameSynchronousConfigUpdateSignal(void)
Function to generate a frame synchronous ISP configuration update signal.
Definition: IfxCif.h:2373
IfxEmem_LockedState_locked
EMEM locked state.
Definition: IfxEmem.h:67
IfxI2c_I2c_initDevice
void IfxI2c_I2c_initDevice(IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
Initializes the device Handler.
Definition: IfxI2c_I2c.c:62
IfxCif_setIspOutputState
IFX_INLINE void IfxCif_setIspOutputState(IfxCif_State ispOutputState)
Function to enable or disable the ISP output.
Definition: IfxCif.h:2849
IfxCif_IspInterruptSources_FrameCompletelyPutOut
Frame was Completely Put Out.
Definition: IfxCif.h:268
IfxCif_JpeTableId_QTable0
Q-Table 0.
Definition: IfxCif.h:498
IfxCif_Cam.h
CIF CAM details.
IfxCif_MiMainPicturePathComponents_Y
Y-component.
Definition: IfxCif.h:352
IfxCif_Cam_yuvMemSize
IFX_INLINE uint32 IfxCif_Cam_yuvMemSize(const IfxCif_Cam *cam)
Definition: IfxCif_Cam.c:195
IfxCif_Submodules_MemoryInterface
Memory Interface submodule.
Definition: IfxCif.h:174
IfxCif_MiInterruptSources_MainPictureFrameEnd
Picture end of frame interrupt.
Definition: IfxCif.h:345
IfxCif_Submodules_ExtraPaths
Extra Paths submodule.
Definition: IfxCif.h:171
IfxCif_setSoftwareResetMode
void IfxCif_setSoftwareResetMode(IfxCif_Submodules submodule, IfxCif_State resetMode)
Function to enable or disable the reset mode of a submodule.
Definition: IfxCif.c:3919
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxCif_setIspOutputWindowOffsets
IFX_INLINE void IfxCif_setIspOutputWindowOffsets(uint16 hOffset, uint16 vOffset)
Function to set the ISP output window offsets.
Definition: IfxCif.h:2855
IfxCif_JpeQTableSelectorComponents_U
U-component.
Definition: IfxCif.h:474
IfxCif_setInternalClockMode
void IfxCif_setInternalClockMode(IfxCif_Submodules submodule, IfxCif_State clockState)
Function to enable or disable the clock of a submodule.
Definition: IfxCif.c:3172
IfxCif_Cam_Common::jpegTables
IFX_CONST IfxCif_Cam_JpegTables * jpegTables
jpeg tables
Definition: IfxCif_Cam.h:191
IfxCif_Cam_stopCapture
void IfxCif_Cam_stopCapture(const IfxCif_Cam *cam)
Stop capture by disabling the ISP output.
Definition: IfxCif_Cam.c:840
IfxCif_setModuleStateRequest
void IfxCif_setModuleStateRequest(IfxCif_State state)
Function to request enabling or disabling of the CIF module.
Definition: IfxCif.c:3815
IfxCif_setIspVSyncPolarity
IFX_INLINE void IfxCif_setIspVSyncPolarity(IfxCif_IspSyncPolarity polarity)
Function to set the polarity of the VSYNC signal.
Definition: IfxCif.h:2875
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxCif_Cam_initCifMemInterface
IFX_STATIC void IfxCif_Cam_initCifMemInterface(const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
Definition: IfxCif_Cam.c:612
IfxCif_Cam_Config::ispRawBpp
uint16 ispRawBpp
bytes per pixel of the input stream
Definition: IfxCif_Cam.h:261
IfxCif_Cam_initPictInfo
IFX_INLINE void IfxCif_Cam_initPictInfo(IfxCif_Cam_PictureInfo *m, const IfxCif_Cam_MemConfig *mcfg)
Definition: IfxCif_Cam.c:161
IfxCif_setJpegCodecImageSizes
IFX_INLINE void IfxCif_setJpegCodecImageSizes(uint16 hSize, uint16 vSize)
Function to set the JPEG codec image sizes.
Definition: IfxCif.h:2943
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCif_JpeQTableSelectorComponents_V
V-component.
Definition: IfxCif.h:475
IfxCif_Cam_initMemSize
IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initMemSize(IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
Definition: IfxCif_Cam.c:685
IfxCif_jpeGenerateHeader
IFX_INLINE void IfxCif_jpeGenerateHeader(void)
Function to start to generate JPEG stream header. Auto reset after one clock cycle.
Definition: IfxCif.h:2737
IFXEMEM_START_ADDR_CPU_CACHED
#define IFXEMEM_START_ADDR_CPU_CACHED
Definition: IfxEmem_cfg.h:63
IfxCif_Cam_initCifExtraPath
IFX_STATIC void IfxCif_Cam_initCifExtraPath(const IfxCif_Cam *cam, IfxCif_ExtraPath ep, const IfxCif_Cam_Config *config)
Definition: IfxCif_Cam.c:418
IfxCif_setIspisOutputWindowOffsets
IFX_INLINE void IfxCif_setIspisOutputWindowOffsets(IfxCif_ImageTiers hOffset, uint16 vOffset)
Function to set the image stabilization offsets of the output window.
Definition: IfxCif.h:2887
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxCif_Cam_IspMode_raw
raw
Definition: IfxCif_Cam.h:83
IfxCif_Cam_MemInfo::start
Ifx_AddressValue start
start address
Definition: IfxCif_Cam.h:171
IfxCif_Cam::availMemSize
uint32 availMemSize
total available RAM space left (in bytes)
Definition: IfxCif_Cam.h:246
IfxCif_JpeTableId_VlcDcTable1
VLC DC Table 1.
Definition: IfxCif.h:504
IfxCif_Cam::cif
Ifx_CIF * cif
pointer to base address of CIF module SFRs
Definition: IfxCif_Cam.h:247
IfxCif_IspInputInterface_16BitExternalInterface
16-bit external Interface
Definition: IfxCif.h:255
IfxCif_setEpWriteFormat
void IfxCif_setEpWriteFormat(IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat)
Function to set the write format for one extra path.
Definition: IfxCif.c:3091
IfxCif_Cam_getNextJpegFrameAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextJpegFrameAddress(IfxCif_Cam *cam)
Returns the address location of next acquired JPEG image frame data.
Definition: IfxCif_Cam.h:576
IfxCif_Cam_MemAreas
All paths memory partitioning.
Definition: IfxCif_Cam.h:226


iLLD_TC26B: IfxCif_Cam.h Source File

  • Cif
  • Cam
IfxCif_Cam.h
Go to the documentation of this file.
1 /**
2 * \file IfxCif_Cam.h
3 * \brief CIF CAM details
4 * \ingroup IfxLld_Cif
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Cif_Cam CAM
42 * \ingroup IfxLld_Cif
43 * \defgroup IfxLld_Cif_Cam_camEnumerations Camera Enumerations
44 * \ingroup IfxLld_Cif_Cam
45 * \defgroup IfxLld_Cif_Cam_camFunctions Camera Functions
46 * \ingroup IfxLld_Cif_Cam
47 * \defgroup IfxLld_Cif_Cam_camStructures Camera Structures
48 * \ingroup IfxLld_Cif_Cam
49 */
50
51 #ifndef IFXCIF_CAM_H
52 #define IFXCIF_CAM_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 #include "Cif/Std/IfxCif.h"
59 #include "_PinMap/IfxCif_PinMap.h"
60 #include "Emem/Std/IfxEmem.h"
61 #include "I2c/I2c/IfxI2c_I2c.h"
62 #include "string.h"
63
64 /******************************************************************************/
65 /*-----------------------------------Macros-----------------------------------*/
66 /******************************************************************************/
67
68 #define IFXCIF_CAM_MEM_ALIGN_SIZE (64)
69
70 #define IFXCIF_CAM_MEM_GAPSIZE 0x0
71
72 /******************************************************************************/
73 /*--------------------------------Enumerations--------------------------------*/
74 /******************************************************************************/
75
76 /** \addtogroup IfxLld_Cif_Cam_camEnumerations
77 * \{ */
78 /** \brief CIF ISP mode
79 */
80 typedef enum
81 {
82 IfxCif_Cam_IspMode_undefined = -1, /**< \brief undefined */
83 IfxCif_Cam_IspMode_raw = 0, /**< \brief raw */
84 IfxCif_Cam_IspMode_yuvInterleaved = 1, /**< \brief yuv interleaved */
85 IfxCif_Cam_IspMode_yuvPlanar = 2 /**< \brief yuv planar */
86 } IfxCif_Cam_IspMode;
87
88 /** \brief Driver acquisition state
89 */
90 typedef enum
91 {
92 IfxCif_Cam_State_stopped = 0, /**< \brief stopped */
93 IfxCif_Cam_State_running = 1 /**< \brief running */
94 } IfxCif_Cam_State;
95
96 /** \brief Driver status
97 */
98 typedef enum
99 {
100 IfxCif_Cam_Status_ok = 0, /**< \brief ok */
101 IfxCif_Cam_Status_notEnoughMemory = 1, /**< \brief not enough Memory */
102 IfxCif_Cam_Status_cameraCommError = 2, /**< \brief camera comm Error */
103 IfxCif_Cam_Status_notAvailable = 3 /**< \brief not available */
104 } IfxCif_Cam_Status;
105
106 /** \} */
107
108 /******************************************************************************/
109 /*-----------------------------Data Structures--------------------------------*/
110 /******************************************************************************/
111
112 /** \addtogroup IfxLld_Cif_Cam_camStructures
113 * \{ */
114 typedef struct
115 {
116 uint8 length; /**< \brief length */
117 IFX_CONST uint8 *entry; /**< \brief entry */
118 } IfxCif_Cam_TableInfo;
119
120 /** \} */
121
122 /** \addtogroup IfxLld_Cif_Cam_camStructures
123 * \{ */
124 /** \brief Single component JPEG tables
125 */
126 typedef struct
127 {
128 IfxCif_Cam_TableInfo q; /**< \brief q */
129 IfxCif_Cam_TableInfo dc; /**< \brief dc */
130 IfxCif_Cam_TableInfo ac; /**< \brief ac */
131 } IfxCif_Cam_JpegTable;
132
133 /** \brief Picture info
134 */
135 typedef struct
136 {
137 uint16 hSize; /**< \brief horizontal (number of pixel) */
138 uint16 vSize; /**< \brief vertical (number of lines) */
139 uint16 hOffset; /**< \brief horizontal offset */
140 uint16 vOffset; /**< \brief vertical offset */
141 } IfxCif_Cam_PictureInfo;
142
143 /** \} */
144
145 /** \addtogroup IfxLld_Cif_Cam_camStructures
146 * \{ */
147 /** \brief JPEG tables for all components
148 */
149 typedef struct
150 {
151 IfxCif_Cam_JpegTable y; /**< \brief y */
152 IfxCif_Cam_JpegTable uv; /**< \brief uv */
153 } IfxCif_Cam_JpegTables;
154
155 /** \brief Single path memory interface configuration (used in initialisation/configuration)
156 */
157 typedef struct
158 {
159 float32 memFactor; /**< \brief multiples of frame count for memory allocation */
160 uint16 hSize; /**< \brief horizontal (number of pixel) */
161 uint16 vSize; /**< \brief vertical (number of lines) */
162 uint16 hOffset; /**< \brief horizontal offset */
163 uint16 vOffset; /**< \brief vertical offset */
164 boolean byteSwap; /**< \brief byte swapping */
165 } IfxCif_Cam_MemConfig;
166
167 /** \brief Single path memory interface information (used in Runtime)
168 */
169 typedef struct
170 {
171 Ifx_AddressValue start; /**< \brief start address */
172 uint32 size; /**< \brief size in bytes */
173 IfxCif_Cam_PictureInfo image; /**< \brief image */
174 } IfxCif_Cam_MemInfo;
175
176 /** \} */
177
178 /** \addtogroup IfxLld_Cif_Cam_camStructures
179 * \{ */
180 /** \brief Common configuration
181 */
182 typedef struct
183 {
184 IfxCif_Cam_PictureInfo ispIn; /**< \brief ispIn */
185 IfxCif_Cam_MemConfig mainPath; /**< \brief main path */
186 IfxCif_Cam_MemConfig extraPaths[IFXCIF_EXTRA_PATHS]; /**< \brief extra paths */
187 IfxCif_InputInterface inputInterface; /**< \brief input interface */
188 Ifx_IsrSetting ispInterrupt; /**< \brief isp interrupt */
189 boolean debugPathEnabled; /**< \brief debug path enabled */
190 boolean watchdogEnabled; /**< \brief watchdog enabled */
191 IFX_CONST IfxCif_Cam_JpegTables *jpegTables; /**< \brief jpeg tables */
192 boolean jpegEnabled; /**< \brief jpeg enabled */
193 } IfxCif_Cam_Common;
194
195 /** \brief Downscaler configuration
196 */
197 typedef struct
198 {
199 boolean enabled; /**< \brief enable */
200 IfxCif_LinearDownscalerScalingMode hMode; /**< \brief hMode */
201 IfxCif_LinearDownscalerScalingMode vMode; /**< \brief vMode */
202 uint8 hFactor; /**< \brief horizontal factor to program into IfxCif_setLinearDownscalerScalingFactors() */
203 uint8 vFactor; /**< \brief vertical factor to program into IfxCif_setLinearDownscalerScalingFactors() */
204 uint8 sizeFactor; /**< \brief memory size factor, e.g. half in both H and V usually gives factor of 4 */
205 } IfxCif_Cam_Downscaling;
206
207 /** \brief JPEG JFIF header structure
208 */
209 typedef struct
210 {
211 uint16 unknown; /**< \brief unknown */
212 uint16 app0; /**< \brief app0 */
213 uint16 length; /**< \brief length */
214 uint8 ident[5]; /**< \brief ident */
215 uint16 version; /**< \brief version */
216 uint8 density; /**< \brief density */
217 uint16 densityX; /**< \brief densityX */
218 uint16 densityY; /**< \brief densityY */
219 uint8 thumbX; /**< \brief thumbX */
220 uint8 thumbY; /**< \brief thumbY */
221 uint8 thumbData[20]; /**< \brief thumbData */
222 } IfxCif_Cam_JfifHeader;
223
224 /** \brief All paths memory partitioning
225 */
226 typedef struct
227 {
228 IfxCif_Cam_MemInfo y; /**< \brief y */
229 IfxCif_Cam_MemInfo cb; /**< \brief cb */
230 IfxCif_Cam_MemInfo cr; /**< \brief cr */
231 IfxCif_Cam_MemInfo ep[IFXCIF_EXTRA_PATHS]; /**< \brief ep */
232 } IfxCif_Cam_MemAreas;
233
234 /** \} */
235
236 /** \addtogroup IfxLld_Cif_Cam_camStructures
237 * \{ */
238 /** \brief Structure which is used as handle for the CIF-CAM functions.
239 * This stores cached variables useful for run-time operations.
240 */
241 typedef struct
242 {
243 IfxCif_Cam_MemAreas memAreas; /**< \brief memory area definition */
244 uint32 totalMemSize; /**< \brief total occupied memory area (in bytes) */
245 Ifx_AddressValue nextFreeAddress; /**< \brief next free storage address */
246 uint32 availMemSize; /**< \brief total available RAM space left (in bytes) */
247 Ifx_CIF *cif; /**< \brief pointer to base address of CIF module SFRs */
248 Ifx_EMEM *emem; /**< \brief pointer to base address of EMEM module SFRs */
249 IfxCif_Cam_JfifHeader *jfif; /**< \brief pointer to the last acquired JPEG header */
250 IfxCif_Cam_Status configResult; /**< \brief status of last configuration (or initialisation) */
251 IfxCif_Cam_IspMode ispMode; /**< \brief actual ISP mode */
252 boolean ispBpp; /**< \brief byte per pixel */
253 } IfxCif_Cam;
254
255 /** \brief Camera specific configuration
256 */
257 typedef struct
258 {
259 IFX_CONST IfxCif_Cam_Common *common; /**< \brief pointer to common configuration */
260 IfxCif_Cam_IspMode ispMode; /**< \brief ISP mode */
261 uint16 ispRawBpp; /**< \brief bytes per pixel of the input stream */
262 IfxCif_IspSyncPolarity hSyncPolarity; /**< \brief polarity of HSYNC signal */
263 IfxCif_IspSyncPolarity vSyncPolarity; /**< \brief polarity of VSYNC signal */
264 IfxCif_IspSamplingEdge samplingEdge; /**< \brief sampling edge */
265 uint16 setupDataCount; /**< \brief number of camera-specific configuration data (in DWORDS) */
266 IFX_CONST uint32 *setupDataTable; /**< \brief pointer to the first entry of camera-specific configuration data */
267 IFX_CONST IfxCif_Cam_Downscaling *downscaling; /**< \brief downscaling settings for ExtraPath 1 */
268 } IfxCif_Cam_Config;
269
270 /** \} */
271
272 /** \addtogroup IfxLld_Cif_Cam_camFunctions
273 * \{ */
274
275 /******************************************************************************/
276 /*-------------------------Inline Function Prototypes-------------------------*/
277 /******************************************************************************/
278
279 /** \brief Clear the frame reception flag
280 * \param cam cam handle
281 * \return None
282 */
283 IFX_INLINE void IfxCif_Cam_clearFrameReceptionFlag(const IfxCif_Cam *cam);
284
285 /** \brief Clear the JPEG encoder completed flag
286 * \param cam cam handle
287 * \return None
288 */
289 IFX_INLINE void IfxCif_Cam_clearJpegEncodingCompleteFlag(const IfxCif_Cam *cam);
290
291 /** \brief Convert the CPU address into BBB address
292 * \param cam cam handle
293 * \param cpuAddress Address value
294 */
295 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getBbbAddress(const IfxCif_Cam *cam, Ifx_AddressValue cpuAddress);
296
297 /** \brief Returns the size (in bytes) of one last acquired extra-path image data
298 * \param cam cam handle
299 * \param z Extra path
300 */
301 IFX_INLINE uint32 IfxCif_Cam_getExtraFrameSize(const IfxCif_Cam *cam, IfxCif_ExtraPath z);
302
303 /**
304 * \param cam cam handle
305 * \param z Extra path
306 */
307 IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getExtraPathMemInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z);
308
309 /** \brief Returns the size (in bytes) of last acquired main-path image data
310 * \param cam cam handle
311 */
312 IFX_INLINE uint32 IfxCif_Cam_getFrameSize(const IfxCif_Cam *cam);
313
314 /** \brief Returns the size (in bytes) of last encoded main-path image data
315 * \param cam cam handle
316 */
317 IFX_INLINE uint32 IfxCif_Cam_getJpegEncodedSize(const IfxCif_Cam *cam);
318
319 /** \brief Returns the address location of last acquired extra-path image frame data
320 * \param cam cam handle
321 * \param z Extra path
322 */
323 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastExtraAddress(const IfxCif_Cam *cam, IfxCif_ExtraPath z);
324
325 /**
326 * \param cam cam handle
327 * \param z Extra path
328 * \param address Address Value
329 * \param size const IfxCif_Cam_MemInfo *m;
330 * *size = IfxCif_Cam_getExtraFrameSize(cam, z);
331 * *address = IfxCif_Cam_getLastExtraAddress(cam, z);
332 * m = IfxCif_Cam_getExtraPathMemInfo(cam, z);
333 * return m;
334 */
335 IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getLastExtraCaptureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z, Ifx_AddressValue *address, uint32 *size);
336
337 /** \brief Returns the address location of last acquired main-path image frame data
338 * \param cam cam handle
339 * \return address location of last acquired main-path image frame data
340 */
341 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastFrameAddress(const IfxCif_Cam *cam);
342
343 /**
344 * \param cam cam handle
345 * \param address Address value
346 * \param size Size
347 */
348 IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getLastFrameCaptureInfo(const IfxCif_Cam *cam, Ifx_AddressValue *address, uint32 *size);
349
350 /** \brief Returns the address location of next acquired main-path image frame data
351 * \param cam cam handle
352 */
353 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextFrameAddress(const IfxCif_Cam *cam);
354
355 /** \brief Returns the address location of next acquired JPEG image frame data
356 * \param cam cam handle
357 */
358 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextJpegFrameAddress(IfxCif_Cam *cam);
359
360 /** \brief Increment the address related to memory interface of for main-path. The address is wrapped around at the boundary of the allocated RAM size
361 * \param cam cam handle
362 * \param address Address value
363 */
364 IFX_INLINE Ifx_AddressValue IfxCif_Cam_incrementAddress(const IfxCif_Cam *cam, Ifx_AddressValue address);
365
366 /** \brief Returns TRUE if JPEG encoding is completed
367 * \param cam cam handle
368 * \return TRUE if one frame reception is completed
369 */
370 IFX_INLINE boolean IfxCif_Cam_isFrameReceptionComplete(const IfxCif_Cam *cam);
371
372 /** \brief
373 * \param cam cam handle
374 * \return TRUE if JPEG encoding is completed
375 */
376 IFX_INLINE boolean IfxCif_Cam_isJpegEncodingComplete(const IfxCif_Cam *cam);
377
378 /**
379 * \param cam cam handle
380 * \return None
381 */
382 IFX_INLINE void IfxCif_Cam_skipPicture(const IfxCif_Cam *cam);
383
384 /******************************************************************************/
385 /*-------------------------Global Function Prototypes-------------------------*/
386 /******************************************************************************/
387
388 /** \brief Clear all CIF module notification flags
389 * \param cam cam handle
390 * \return None
391 */
392 IFX_EXTERN void IfxCif_Cam_clearAllFlags(const IfxCif_Cam *cam);
393
394 /** \brief Disable the JPEG encoder and route the acquisition path accordingly to the 'original' configuration, i.e. RAW or main path.
395 * \param cam cam handle
396 * \return None
397 */
398 IFX_EXTERN void IfxCif_Cam_disableJpegEncoder(const IfxCif_Cam *cam);
399
400 /** \brief Enable the JPEG encoder and route the acquisition path accordingly
401 * \param cam cam handle
402 * \return None
403 */
404 IFX_EXTERN void IfxCif_Cam_enableJpegEncoder(const IfxCif_Cam *cam);
405
406 /** \brief Returns pointer to the variable storing picture info of an extra-path
407 * \param cam cam handle
408 * \param z Extra Path
409 * \return pointer to the variable storing picture info of an extra-path
410 */
411 IFX_EXTERN IFX_CONST IfxCif_Cam_PictureInfo *IfxCif_Cam_getExtraPathPictureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z);
412
413 /** \brief Returns pointer to the memory structure storing last JPEG encoding process
414 * \param cam cam handle
415 * \param address EMEM address which stores the JPEG frame
416 * \param size size of JPEG frame
417 * \return TRUE if there was new frame encoded, else FALSE
418 */
419 IFX_EXTERN boolean IfxCif_Cam_getLastJpegEncodingInfo(IfxCif_Cam *cam, Ifx_AddressValue *address, sint32 *size);
420
421 /** \brief Initialise the CIF, EMEM, PORT, I2C and the camera itself
422 * \param cam cam handel
423 * \param config configurations structure
424 * \param initCam if TRUE camera will be reconfigured, else camera will not be reconfigured.
425 */
426 IFX_EXTERN IfxCif_Cam_Status IfxCif_Cam_init(IfxCif_Cam *cam, const IfxCif_Cam_Config *config, boolean initCam);
427
428 /** \brief Restart capture by enabling the ISP output
429 * \param cam cam handle
430 * \param frames Number of acquisitions. Set to zero for continuous acquisition
431 * \return None
432 */
433 IFX_EXTERN void IfxCif_Cam_restartCapture(const IfxCif_Cam *cam, uint8 frames);
434
435 /** \brief Start capture by enabling the ISP output and initialising the MI counter
436 * \param cam cam handle
437 * \param frames Number of acquisitions. Set to zero for continuous acquisition
438 * \return None
439 */
440 IFX_EXTERN void IfxCif_Cam_startCapture(const IfxCif_Cam *cam, uint8 frames);
441
442 /** \brief Stop capture by disabling the ISP output
443 * \param cam cam handle
444 * \return None
445 */
446 IFX_EXTERN void IfxCif_Cam_stopCapture(const IfxCif_Cam *cam);
447
448 /** \} */
449
450 /******************************************************************************/
451 /*---------------------Inline Function Implementations------------------------*/
452 /******************************************************************************/
453
454 IFX_INLINE void IfxCif_Cam_clearFrameReceptionFlag(const IfxCif_Cam *cam)
455 {
456 (void)cam;
457 MODULE_CIF.ISP.ICR.U = (IFX_CIF_ISP_ICR_ICR_FRAME_MSK << IFX_CIF_ISP_ICR_ICR_FRAME_OFF);
458 }
459
460
461 IFX_INLINE void IfxCif_Cam_clearJpegEncodingCompleteFlag(const IfxCif_Cam *cam)
462 {
463 (void)cam;
464 MODULE_CIF.JPE.STATUS_ICR.U = (IFX_CIF_JPE_STATUS_ICR_ENCODE_DONE_MSK << IFX_CIF_JPE_STATUS_ICR_ENCODE_DONE_OFF);
465 }
466
467
468 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getBbbAddress(const IfxCif_Cam *cam, Ifx_AddressValue cpuAddress)
469 {
470 (void)cam;
471
472 return (Ifx_AddressValue)(((uint32)cpuAddress & 0x00FFFFFFU) + IFXEMEM_START_ADDR_BBB);
473 }
474
475
476 IFX_INLINE uint32 IfxCif_Cam_getExtraFrameSize(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
477 {
478 sint32 size = 0;
479
480 if (z <= IfxCif_ExtraPath_5)
481 {
482 size = cam->memAreas.ep[z].image.hSize * cam->memAreas.ep[z].image.vSize;
483
484 if ((cam->ispMode != IfxCif_Cam_IspMode_raw) || (cam->ispBpp > 1))
485 {
486 size = size * 2;
487 }
488 }
489 else
490 {
491 IFXCIF_DEBUG;
492 }
493
494 return (uint32)size;
495 }
496
497
498 IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getExtraPathMemInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
499 {
500 return &(cam->memAreas.ep[z]);
501 }
502
503
504 IFX_INLINE uint32 IfxCif_Cam_getFrameSize(const IfxCif_Cam *cam)
505 {
506 (void)cam;
507 sint32 size = MODULE_CIF.MI.MP_Y_OFFS_CNT_SHD.U - MODULE_CIF.MI.MP_Y_OFFS_CNT_START.U;
508
509 if (size <= 0)
510 {
511 size += MODULE_CIF.MI.MP_Y_SIZE_INIT.U;
512 }
513
514 return (uint32)size;
515 }
516
517
518 IFX_INLINE uint32 IfxCif_Cam_getJpegEncodedSize(const IfxCif_Cam *cam)
519 {
520 (void)cam;
521
522 /* 0x240 is size of JFIF header. */
523 return 0x240 + IfxCif_Cam_getFrameSize(cam);
524 }
525
526
527 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastExtraAddress(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
528 {
529 Ifx_AddressValue address = 0;
530
531 if (z <= IfxCif_ExtraPath_5)
532 {
533 address = (Ifx_AddressValue)((uint32)cam->memAreas.ep[z].start + MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_START.U);
534 }
535
536 return address;
537 }
538
539
540 IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getLastExtraCaptureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z, Ifx_AddressValue *address, uint32 *size)
541 {
542 const IfxCif_Cam_MemInfo *m;
543 *size = IfxCif_Cam_getExtraFrameSize(cam, z);
544 *address = IfxCif_Cam_getLastExtraAddress(cam, z);
545 m = IfxCif_Cam_getExtraPathMemInfo(cam, z);
546 return m;
547 }
548
549
550 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastFrameAddress(const IfxCif_Cam *cam)
551 {
552 (void)cam;
553
554 return (Ifx_AddressValue)(IFXEMEM_START_ADDR_CPU_CACHED + MODULE_CIF.MI.MP_Y_OFFS_CNT_START.U);
555 }
556
557
558 IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getLastFrameCaptureInfo(const IfxCif_Cam *cam, Ifx_AddressValue *address, uint32 *size)
559 {
560 const IfxCif_Cam_MemInfo *m;
561 *size = IfxCif_Cam_getFrameSize(cam);
562 *address = IfxCif_Cam_getLastFrameAddress(cam);
563 m = &(cam->memAreas.y);
564 return m;
565 }
566
567
568 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextFrameAddress(const IfxCif_Cam *cam)
569 {
570 (void)cam;
571
572 return (Ifx_AddressValue)(IFXEMEM_START_ADDR_CPU_CACHED + MODULE_CIF.MI.MP_Y_OFFS_CNT_SHD.U);
573 }
574
575
576 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextJpegFrameAddress(IfxCif_Cam *cam)
577 {
578 Ifx_AddressValue address = IfxCif_Cam_getNextFrameAddress(cam);
579 cam->jfif = (IfxCif_Cam_JfifHeader *)address; /* note: no cast to (void *) to satisfy C++ compilers */
580 return address;
581 }
582
583
584 IFX_INLINE Ifx_AddressValue IfxCif_Cam_incrementAddress(const IfxCif_Cam *cam, Ifx_AddressValue address)
585 {
586 address = (Ifx_AddressValue)((uint32)address + 4U);
587
588 if ((uint32)address >= (IFXEMEM_START_ADDR_CPU_CACHED + cam->memAreas.y.size))
589 { /* back to base */
590 address = (Ifx_AddressValue)IFXEMEM_START_ADDR_CPU_CACHED;
591 }
592
593 return address;
594 }
595
596
597 IFX_INLINE boolean IfxCif_Cam_isFrameReceptionComplete(const IfxCif_Cam *cam)
598 {
599 (void)cam;
600
601 return MODULE_CIF.ISP.RIS.B.RIS_FRAME != 0;
602 }
603
604
605 IFX_INLINE boolean IfxCif_Cam_isJpegEncodingComplete(const IfxCif_Cam *cam)
606 {
607 (void)cam;
608
609 return MODULE_CIF.JPE.STATUS_RIS.B.ENCODE_DONE != 0;
610 }
611
612
613 IFX_INLINE void IfxCif_Cam_skipPicture(const IfxCif_Cam *cam)
614 {
615 (void)cam;
616 IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State_Disabled);
617 IfxCif_miSkipPicture();
618 }
619
620
621 #endif /* IFXCIF_CAM_H */
IfxCif_Cam_Status_cameraCommError
camera comm Error
Definition: IfxCif_Cam.h:102
IFXCIF_DEBUG
#define IFXCIF_DEBUG
Definition: IfxCif_cfg.h:63
IfxCif_Cam_Config
Camera specific configuration.
Definition: IfxCif_Cam.h:257
IfxCif_Cam_Config::setupDataTable
IFX_CONST uint32 * setupDataTable
pointer to the first entry of camera-specific configuration data
Definition: IfxCif_Cam.h:266
IfxCif_Cam_State
IfxCif_Cam_State
Driver acquisition state.
Definition: IfxCif_Cam.h:90
IfxCif.h
CIF basic functionality.
IfxCif_Cam_PictureInfo::hOffset
uint16 hOffset
horizontal offset
Definition: IfxCif_Cam.h:139
IfxCif_Cam_skipPicture
IFX_INLINE void IfxCif_Cam_skipPicture(const IfxCif_Cam *cam)
Definition: IfxCif_Cam.h:613
IfxCif_Cam_IspMode_yuvInterleaved
yuv interleaved
Definition: IfxCif_Cam.h:84
IfxCif_Cam_getExtraFrameSize
IFX_INLINE uint32 IfxCif_Cam_getExtraFrameSize(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns the size (in bytes) of one last acquired extra-path image data.
Definition: IfxCif_Cam.h:476
IfxCif_Cam_enableJpegEncoder
IFX_EXTERN void IfxCif_Cam_enableJpegEncoder(const IfxCif_Cam *cam)
Enable the JPEG encoder and route the acquisition path accordingly.
Definition: IfxCif_Cam.c:230
IfxCif_Cam::memAreas
IfxCif_Cam_MemAreas memAreas
memory area definition
Definition: IfxCif_Cam.h:243
IfxCif_Cam_Config::hSyncPolarity
IfxCif_IspSyncPolarity hSyncPolarity
polarity of HSYNC signal
Definition: IfxCif_Cam.h:262
IfxCif_Cam::configResult
IfxCif_Cam_Status configResult
status of last configuration (or initialisation)
Definition: IfxCif_Cam.h:250
IfxCif_Cam_MemAreas::ep
IfxCif_Cam_MemInfo ep[IFXCIF_EXTRA_PATHS]
ep
Definition: IfxCif_Cam.h:231
IfxCif_Cam_MemInfo::size
uint32 size
size in bytes
Definition: IfxCif_Cam.h:172
IfxCif_Cam::nextFreeAddress
Ifx_AddressValue nextFreeAddress
next free storage address
Definition: IfxCif_Cam.h:245
IfxCif_Cam_getExtraPathMemInfo
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * IfxCif_Cam_getExtraPathMemInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Definition: IfxCif_Cam.h:498
IfxCif_Cam_JpegTable::q
IfxCif_Cam_TableInfo q
q
Definition: IfxCif_Cam.h:128
IfxCif_Cam_PictureInfo::vOffset
uint16 vOffset
vertical offset
Definition: IfxCif_Cam.h:140
IfxCif_Cam_MemAreas::cb
IfxCif_Cam_MemInfo cb
cb
Definition: IfxCif_Cam.h:229
IfxCif_miSkipPicture
IFX_INLINE void IfxCif_miSkipPicture(void)
Function to skip the current or next starting main data path picture.
Definition: IfxCif.h:2743
IfxCif_Cam_clearJpegEncodingCompleteFlag
IFX_INLINE void IfxCif_Cam_clearJpegEncodingCompleteFlag(const IfxCif_Cam *cam)
Clear the JPEG encoder completed flag.
Definition: IfxCif_Cam.h:461
IfxCif_Cam_Downscaling::hMode
IfxCif_LinearDownscalerScalingMode hMode
hMode
Definition: IfxCif_Cam.h:200
IfxCif_Cam_PictureInfo
Picture info.
Definition: IfxCif_Cam.h:135
IfxCif_Cam_Config::setupDataCount
uint16 setupDataCount
number of camera-specific configuration data (in DWORDS)
Definition: IfxCif_Cam.h:265
IfxCif_Cam_Downscaling::vMode
IfxCif_LinearDownscalerScalingMode vMode
vMode
Definition: IfxCif_Cam.h:201
IfxCif_Cam_TableInfo::length
uint8 length
length
Definition: IfxCif_Cam.h:116
IfxCif_IspSamplingEdge
IfxCif_IspSamplingEdge
Enumerator for ISP sampling edge.
Definition: IfxCif.h:285
IfxCif_Cam_getLastExtraAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastExtraAddress(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns the address location of last acquired extra-path image frame data.
Definition: IfxCif_Cam.h:527
IfxCif_Cam_MemAreas::cr
IfxCif_Cam_MemInfo cr
cr
Definition: IfxCif_Cam.h:230
IfxCif_Cam_init
IFX_EXTERN IfxCif_Cam_Status IfxCif_Cam_init(IfxCif_Cam *cam, const IfxCif_Cam_Config *config, boolean initCam)
Initialise the CIF, EMEM, PORT, I2C and the camera itself.
Definition: IfxCif_Cam.c:278
IfxCif_Cam_Config::samplingEdge
IfxCif_IspSamplingEdge samplingEdge
sampling edge
Definition: IfxCif_Cam.h:264
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCif_Cam_Downscaling::vFactor
uint8 vFactor
vertical factor to program into IfxCif_setLinearDownscalerScalingFactors()
Definition: IfxCif_Cam.h:203
IfxCif_Cam_JpegTable
Single component JPEG tables.
Definition: IfxCif_Cam.h:126
float32
float float32
Definition: Platform_Types.h:170
IfxCif_Cam::ispMode
IfxCif_Cam_IspMode ispMode
actual ISP mode
Definition: IfxCif_Cam.h:251
IfxCif_Cam_JfifHeader::length
uint16 length
length
Definition: IfxCif_Cam.h:213
IfxCif_Cam_startCapture
IFX_EXTERN void IfxCif_Cam_startCapture(const IfxCif_Cam *cam, uint8 frames)
Start capture by enabling the ISP output and initialising the MI counter.
Definition: IfxCif_Cam.c:828
IfxCif_Cam_Config::vSyncPolarity
IfxCif_IspSyncPolarity vSyncPolarity
polarity of VSYNC signal
Definition: IfxCif_Cam.h:263
IfxCif_Cam_Downscaling::sizeFactor
uint8 sizeFactor
memory size factor, e.g. half in both H and V usually gives factor of 4
Definition: IfxCif_Cam.h:204
IfxCif_Cam_JfifHeader::app0
uint16 app0
app0
Definition: IfxCif_Cam.h:212
IfxCif_Cam_JpegTables::y
IfxCif_Cam_JpegTable y
y
Definition: IfxCif_Cam.h:151
IfxCif_PinMap.h
CIF I/O map.
IfxCif_Cam_getNextFrameAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextFrameAddress(const IfxCif_Cam *cam)
Returns the address location of next acquired main-path image frame data.
Definition: IfxCif_Cam.h:568
IfxCif_InputInterface
IfxCif_InputInterface
Enumerator for input interfaces supported by the CIF interface.
Definition: IfxCif.h:136
IfxCif_Cam::totalMemSize
uint32 totalMemSize
total occupied memory area (in bytes)
Definition: IfxCif_Cam.h:244
IfxCif_Cam_disableJpegEncoder
IFX_EXTERN void IfxCif_Cam_disableJpegEncoder(const IfxCif_Cam *cam)
Disable the JPEG encoder and route the acquisition path accordingly to the &#39;original&#39; configuration...
Definition: IfxCif_Cam.c:214
IfxCif_Cam_clearAllFlags
IFX_EXTERN void IfxCif_Cam_clearAllFlags(const IfxCif_Cam *cam)
Clear all CIF module notification flags.
Definition: IfxCif_Cam.c:205
IFXCIF_EXTRA_PATHS
#define IFXCIF_EXTRA_PATHS
Number of extra phats.
Definition: IfxCif_cfg.h:68
IfxCif_Cam::jfif
IfxCif_Cam_JfifHeader * jfif
pointer to the last acquired JPEG header
Definition: IfxCif_Cam.h:249
IfxCif_Cam_PictureInfo::vSize
uint16 vSize
vertical (number of lines)
Definition: IfxCif_Cam.h:138
IfxCif_Cam_isJpegEncodingComplete
IFX_INLINE boolean IfxCif_Cam_isJpegEncodingComplete(const IfxCif_Cam *cam)
Definition: IfxCif_Cam.h:605
IfxCif_Cam_getLastFrameAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastFrameAddress(const IfxCif_Cam *cam)
Returns the address location of last acquired main-path image frame data.
Definition: IfxCif_Cam.h:550
IfxCif_Cam_MemConfig::byteSwap
boolean byteSwap
byte swapping
Definition: IfxCif_Cam.h:164
IfxCif_ExtraPath_5
Definition: IfxCif.h:123
IfxCif_Cam_JfifHeader::unknown
uint16 unknown
unknown
Definition: IfxCif_Cam.h:211
IfxCif_Cam
Structure which is used as handle for the CIF-CAM functions. This stores cached variables useful for ...
Definition: IfxCif_Cam.h:241
IfxCif_Cam_Common::watchdogEnabled
boolean watchdogEnabled
watchdog enabled
Definition: IfxCif_Cam.h:190
IfxCif_Cam_Config::common
IFX_CONST IfxCif_Cam_Common * common
pointer to common configuration
Definition: IfxCif_Cam.h:259
IfxCif_Cam_MemInfo::image
IfxCif_Cam_PictureInfo image
image
Definition: IfxCif_Cam.h:173
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCif_Cam_Downscaling::hFactor
uint8 hFactor
horizontal factor to program into IfxCif_setLinearDownscalerScalingFactors()
Definition: IfxCif_Cam.h:202
IfxCif_Cam_JfifHeader::densityY
uint16 densityY
densityY
Definition: IfxCif_Cam.h:218
Ifx_IsrSetting
Definition: Ifx_Types.h:106
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCif_Cam_Common::jpegEnabled
boolean jpegEnabled
jpeg enabled
Definition: IfxCif_Cam.h:192
IfxCif_Cam::emem
Ifx_EMEM * emem
pointer to base address of EMEM module SFRs
Definition: IfxCif_Cam.h:248
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCif_Cam_IspMode_yuvPlanar
yuv planar
Definition: IfxCif_Cam.h:85
IfxCif_Cam_Status
IfxCif_Cam_Status
Driver status.
Definition: IfxCif_Cam.h:98
IfxCif_Cam_MemConfig::memFactor
float32 memFactor
multiples of frame count for memory allocation
Definition: IfxCif_Cam.h:159
IfxCif_Cam_JpegTables
JPEG tables for all components.
Definition: IfxCif_Cam.h:149
IfxCif_Cam_restartCapture
IFX_EXTERN void IfxCif_Cam_restartCapture(const IfxCif_Cam *cam, uint8 frames)
Restart capture by enabling the ISP output.
Definition: IfxCif_Cam.c:819
IfxCif_Cam_State_stopped
stopped
Definition: IfxCif_Cam.h:92
IFXEMEM_START_ADDR_BBB
#define IFXEMEM_START_ADDR_BBB
Definition: IfxEmem_cfg.h:67
IfxCif_LinearDownscalerScalingMode
IfxCif_LinearDownscalerScalingMode
Enumerator for scaling mode of linear downscaler.
Definition: IfxCif.h:305
IfxCif_Cam_getLastJpegEncodingInfo
IFX_EXTERN boolean IfxCif_Cam_getLastJpegEncodingInfo(IfxCif_Cam *cam, Ifx_AddressValue *address, sint32 *size)
Returns pointer to the memory structure storing last JPEG encoding process.
Definition: IfxCif_Cam.c:253
IfxCif_Cam_IspMode
IfxCif_Cam_IspMode
CIF ISP mode.
Definition: IfxCif_Cam.h:80
IfxCif_Cam_JpegTable::ac
IfxCif_Cam_TableInfo ac
ac
Definition: IfxCif_Cam.h:130
IfxCif_Cam_TableInfo
Definition: IfxCif_Cam.h:114
IfxCif_Cam_Common
Common configuration.
Definition: IfxCif_Cam.h:182
IfxCif_Cam_JpegTable::dc
IfxCif_Cam_TableInfo dc
dc
Definition: IfxCif_Cam.h:129
IfxCif_Cam_Downscaling::enabled
boolean enabled
enable
Definition: IfxCif_Cam.h:199
IfxCif_Cam_IspMode_undefined
undefined
Definition: IfxCif_Cam.h:82
IfxCif_Cam_Common::ispIn
IfxCif_Cam_PictureInfo ispIn
ispIn
Definition: IfxCif_Cam.h:184
IfxCif_Cam_Status_notAvailable
not available
Definition: IfxCif_Cam.h:103
IfxCif_Cam_MemAreas::y
IfxCif_Cam_MemInfo y
y
Definition: IfxCif_Cam.h:228
IfxCif_Cam_getLastFrameCaptureInfo
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * IfxCif_Cam_getLastFrameCaptureInfo(const IfxCif_Cam *cam, Ifx_AddressValue *address, uint32 *size)
Definition: IfxCif_Cam.h:558
IfxCif_Cam_Config::downscaling
IFX_CONST IfxCif_Cam_Downscaling * downscaling
downscaling settings for ExtraPath 1
Definition: IfxCif_Cam.h:267
IfxCif_Cam_MemConfig
Single path memory interface configuration (used in initialisation/configuration) ...
Definition: IfxCif_Cam.h:157
IfxCif_Cam::ispBpp
boolean ispBpp
byte per pixel
Definition: IfxCif_Cam.h:252
IfxCif_ExtraPath
IfxCif_ExtraPath
Enumerator for the extra paths.
Definition: IfxCif.h:117
IfxCif_Cam_getExtraPathPictureInfo
IFX_EXTERN IFX_CONST IfxCif_Cam_PictureInfo * IfxCif_Cam_getExtraPathPictureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns pointer to the variable storing picture info of an extra-path.
Definition: IfxCif_Cam.c:240
IfxCif_Cam_JfifHeader
JPEG JFIF header structure.
Definition: IfxCif_Cam.h:209
IfxCif_Cam_incrementAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_incrementAddress(const IfxCif_Cam *cam, Ifx_AddressValue address)
Increment the address related to memory interface of for main-path. The address is wrapped around at ...
Definition: IfxCif_Cam.h:584
IfxCif_Cam_getLastExtraCaptureInfo
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * IfxCif_Cam_getLastExtraCaptureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z, Ifx_AddressValue *address, uint32 *size)
Definition: IfxCif_Cam.h:540
IfxCif_Cam_Status_notEnoughMemory
not enough Memory
Definition: IfxCif_Cam.h:101
IfxCif_Cam_TableInfo::entry
IFX_CONST uint8 * entry
entry
Definition: IfxCif_Cam.h:117
IfxCif_Cam_Common::mainPath
IfxCif_Cam_MemConfig mainPath
main path
Definition: IfxCif_Cam.h:185
Ifx_AddressValue
pvoid Ifx_AddressValue
Used in address values.
Definition: Ifx_Types.h:104
IfxCif_Cam_MemInfo
Single path memory interface information (used in Runtime)
Definition: IfxCif_Cam.h:169
IfxCif_Cam_getBbbAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_getBbbAddress(const IfxCif_Cam *cam, Ifx_AddressValue cpuAddress)
Convert the CPU address into BBB address.
Definition: IfxCif_Cam.h:468
IfxCif_Cam_JfifHeader::density
uint8 density
density
Definition: IfxCif_Cam.h:216
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCif_State_Disabled
Disabled state.
Definition: IfxCif.h:161
IfxCif_setMiOffsetCounterInitializationEnableState
IFX_INLINE void IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State state)
Function to enable or disable the update of the offset counter shadow registers (update will be execu...
Definition: IfxCif.h:3001
IfxCif_Cam_Status_ok
ok
Definition: IfxCif_Cam.h:100
IfxCif_Cam_PictureInfo::hSize
uint16 hSize
horizontal (number of pixel)
Definition: IfxCif_Cam.h:137
IfxCif_Cam_clearFrameReceptionFlag
IFX_INLINE void IfxCif_Cam_clearFrameReceptionFlag(const IfxCif_Cam *cam)
Clear the frame reception flag.
Definition: IfxCif_Cam.h:454
IfxCif_Cam_JfifHeader::thumbX
uint8 thumbX
thumbX
Definition: IfxCif_Cam.h:219
IfxCif_Cam_getJpegEncodedSize
IFX_INLINE uint32 IfxCif_Cam_getJpegEncodedSize(const IfxCif_Cam *cam)
Returns the size (in bytes) of last encoded main-path image data.
Definition: IfxCif_Cam.h:518
IfxCif_Cam_Downscaling
Downscaler configuration.
Definition: IfxCif_Cam.h:197
IfxCif_Cam_Common::ispInterrupt
Ifx_IsrSetting ispInterrupt
isp interrupt
Definition: IfxCif_Cam.h:188
IfxCif_Cam_isFrameReceptionComplete
IFX_INLINE boolean IfxCif_Cam_isFrameReceptionComplete(const IfxCif_Cam *cam)
Returns TRUE if JPEG encoding is completed.
Definition: IfxCif_Cam.h:597
sint32
long sint32
Definition: Platform_Types.h:134
IfxI2c_I2c.h
I2C I2C details.
IfxCif_Cam_JpegTables::uv
IfxCif_Cam_JpegTable uv
uv
Definition: IfxCif_Cam.h:152
IfxCif_Cam_Common::inputInterface
IfxCif_InputInterface inputInterface
input interface
Definition: IfxCif_Cam.h:187
IfxCif_Cam_JfifHeader::version
uint16 version
version
Definition: IfxCif_Cam.h:215
IfxEmem.h
EMEM basic functionality.
IfxCif_Cam_Common::debugPathEnabled
boolean debugPathEnabled
debug path enabled
Definition: IfxCif_Cam.h:189
IfxCif_Cam_JfifHeader::densityX
uint16 densityX
densityX
Definition: IfxCif_Cam.h:217
IfxCif_Cam_Common::jpegTables
IFX_CONST IfxCif_Cam_JpegTables * jpegTables
jpeg tables
Definition: IfxCif_Cam.h:191
IfxCif_Cam_stopCapture
IFX_EXTERN void IfxCif_Cam_stopCapture(const IfxCif_Cam *cam)
Stop capture by disabling the ISP output.
Definition: IfxCif_Cam.c:840
IfxCif_Cam_Config::ispRawBpp
uint16 ispRawBpp
bytes per pixel of the input stream
Definition: IfxCif_Cam.h:261
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IFXEMEM_START_ADDR_CPU_CACHED
#define IFXEMEM_START_ADDR_CPU_CACHED
Definition: IfxEmem_cfg.h:63
IfxCif_Cam_State_running
running
Definition: IfxCif_Cam.h:93
IfxCif_Cam_IspMode_raw
raw
Definition: IfxCif_Cam.h:83
IfxCif_Cam_MemInfo::start
Ifx_AddressValue start
start address
Definition: IfxCif_Cam.h:171
IfxCif_Cam::availMemSize
uint32 availMemSize
total available RAM space left (in bytes)
Definition: IfxCif_Cam.h:246
IfxCif_IspSyncPolarity
IfxCif_IspSyncPolarity
Definition: IfxCif.h:293
IfxCif_Cam::cif
Ifx_CIF * cif
pointer to base address of CIF module SFRs
Definition: IfxCif_Cam.h:247
IfxCif_Cam_JfifHeader::thumbY
uint8 thumbY
thumbY
Definition: IfxCif_Cam.h:220
IfxCif_Cam_getFrameSize
IFX_INLINE uint32 IfxCif_Cam_getFrameSize(const IfxCif_Cam *cam)
Returns the size (in bytes) of last acquired main-path image data.
Definition: IfxCif_Cam.h:504
IfxCif_Cam_getNextJpegFrameAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextJpegFrameAddress(IfxCif_Cam *cam)
Returns the address location of next acquired JPEG image frame data.
Definition: IfxCif_Cam.h:576
IfxCif_Cam_MemAreas
All paths memory partitioning.
Definition: IfxCif_Cam.h:226


iLLD_TC26B: IfxCif_PinMap.c Source File

  • _PinMap
IfxCif_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxCif_PinMap.c
3 * \brief CIF I/O map
4 * \ingroup IfxLld_Cif
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxCif_PinMap.h"
44
45 IfxCif_Clk_In IfxCif_CLK_P00_7_IN = {&MODULE_CIF, {&MODULE_P00, 7}};
46 IfxCif_D_In IfxCif_D0_P02_0_IN = {&MODULE_CIF, {&MODULE_P02, 0}};
47 IfxCif_D_In IfxCif_D10_P00_1_IN = {&MODULE_CIF, {&MODULE_P00, 1}};
48 IfxCif_D_In IfxCif_D11_P00_2_IN = {&MODULE_CIF, {&MODULE_P00, 2}};
49 IfxCif_D_In IfxCif_D12_P00_3_IN = {&MODULE_CIF, {&MODULE_P00, 3}};
50 IfxCif_D_In IfxCif_D13_P00_4_IN = {&MODULE_CIF, {&MODULE_P00, 4}};
51 IfxCif_D_In IfxCif_D14_P00_5_IN = {&MODULE_CIF, {&MODULE_P00, 5}};
52 IfxCif_D_In IfxCif_D15_P00_6_IN = {&MODULE_CIF, {&MODULE_P00, 6}};
53 IfxCif_D_In IfxCif_D1_P02_1_IN = {&MODULE_CIF, {&MODULE_P02, 1}};
54 IfxCif_D_In IfxCif_D2_P02_2_IN = {&MODULE_CIF, {&MODULE_P02, 2}};
55 IfxCif_D_In IfxCif_D3_P02_3_IN = {&MODULE_CIF, {&MODULE_P02, 3}};
56 IfxCif_D_In IfxCif_D4_P02_4_IN = {&MODULE_CIF, {&MODULE_P02, 4}};
57 IfxCif_D_In IfxCif_D5_P02_5_IN = {&MODULE_CIF, {&MODULE_P02, 5}};
58 IfxCif_D_In IfxCif_D6_P02_6_IN = {&MODULE_CIF, {&MODULE_P02, 6}};
59 IfxCif_D_In IfxCif_D7_P02_7_IN = {&MODULE_CIF, {&MODULE_P02, 7}};
60 IfxCif_D_In IfxCif_D8_P02_8_IN = {&MODULE_CIF, {&MODULE_P02, 8}};
61 IfxCif_D_In IfxCif_D9_P00_0_IN = {&MODULE_CIF, {&MODULE_P00, 0}};
62 IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN = {&MODULE_CIF, {&MODULE_P00, 9}};
63 IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN = {&MODULE_CIF, {&MODULE_P00, 8}};
IfxCif_Hsnc_In
HSNC pin mapping structure.
Definition: IfxCif_PinMap.h:70
IfxCif_D11_P00_2_IN
IfxCif_D_In IfxCif_D11_P00_2_IN
Definition: IfxCif_PinMap.c:48
IfxCif_D9_P00_0_IN
IfxCif_D_In IfxCif_D9_P00_0_IN
Definition: IfxCif_PinMap.c:61
IfxCif_PinMap.h
CIF I/O map.
IfxCif_D7_P02_7_IN
IfxCif_D_In IfxCif_D7_P02_7_IN
Definition: IfxCif_PinMap.c:59
IfxCif_D8_P02_8_IN
IfxCif_D_In IfxCif_D8_P02_8_IN
Definition: IfxCif_PinMap.c:60
IfxCif_D_In
D pin mapping structure.
Definition: IfxCif_PinMap.h:63
IfxCif_D1_P02_1_IN
IfxCif_D_In IfxCif_D1_P02_1_IN
Definition: IfxCif_PinMap.c:53
IfxCif_CLK_P00_7_IN
IfxCif_Clk_In IfxCif_CLK_P00_7_IN
Definition: IfxCif_PinMap.c:45
IfxCif_D10_P00_1_IN
IfxCif_D_In IfxCif_D10_P00_1_IN
Definition: IfxCif_PinMap.c:47
IfxCif_D13_P00_4_IN
IfxCif_D_In IfxCif_D13_P00_4_IN
Definition: IfxCif_PinMap.c:50
IfxCif_Vsnc_In
VSNC pin mapping structure.
Definition: IfxCif_PinMap.h:77
IfxCif_D3_P02_3_IN
IfxCif_D_In IfxCif_D3_P02_3_IN
Definition: IfxCif_PinMap.c:55
IfxCif_D14_P00_5_IN
IfxCif_D_In IfxCif_D14_P00_5_IN
Definition: IfxCif_PinMap.c:51
IfxCif_VSNC_P00_8_IN
IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN
Definition: IfxCif_PinMap.c:63
IfxCif_D2_P02_2_IN
IfxCif_D_In IfxCif_D2_P02_2_IN
Definition: IfxCif_PinMap.c:54
IfxCif_Clk_In
CLK pin mapping structure.
Definition: IfxCif_PinMap.h:56
IfxCif_D15_P00_6_IN
IfxCif_D_In IfxCif_D15_P00_6_IN
Definition: IfxCif_PinMap.c:52
IfxCif_D4_P02_4_IN
IfxCif_D_In IfxCif_D4_P02_4_IN
Definition: IfxCif_PinMap.c:56
IfxCif_HSNC_P00_9_IN
IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN
Definition: IfxCif_PinMap.c:62
IfxCif_D12_P00_3_IN
IfxCif_D_In IfxCif_D12_P00_3_IN
Definition: IfxCif_PinMap.c:49
IfxCif_D5_P02_5_IN
IfxCif_D_In IfxCif_D5_P02_5_IN
Definition: IfxCif_PinMap.c:57
IfxCif_D0_P02_0_IN
IfxCif_D_In IfxCif_D0_P02_0_IN
Definition: IfxCif_PinMap.c:46
IfxCif_D6_P02_6_IN
IfxCif_D_In IfxCif_D6_P02_6_IN
Definition: IfxCif_PinMap.c:58


iLLD_TC26B: IfxCif_PinMap.h Source File

  • _PinMap
IfxCif_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxCif_PinMap.h
3 * \brief CIF I/O map
4 * \ingroup IfxLld_Cif
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Cif_pinmap CIF Pin Mapping
42 * \ingroup IfxLld_Cif
43 */
44
45 #ifndef IFXCIF_PINMAP_H
46 #define IFXCIF_PINMAP_H
47
48 #include <IfxCif_reg.h>
49 #include <_Impl/IfxCif_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Cif_pinmap
53 * \{ */
54
55 /** \brief CLK pin mapping structure */
56 typedef const struct
57 {
58 Ifx_CIF* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 } IfxCif_Clk_In;
61
62 /** \brief D pin mapping structure */
63 typedef const struct
64 {
65 Ifx_CIF* module; /**< \brief Base address */
66 IfxPort_Pin pin; /**< \brief Port pin */
67 } IfxCif_D_In;
68
69 /** \brief HSNC pin mapping structure */
70 typedef const struct
71 {
72 Ifx_CIF* module; /**< \brief Base address */
73 IfxPort_Pin pin; /**< \brief Port pin */
74 } IfxCif_Hsnc_In;
75
76 /** \brief VSNC pin mapping structure */
77 typedef const struct
78 {
79 Ifx_CIF* module; /**< \brief Base address */
80 IfxPort_Pin pin; /**< \brief Port pin */
81 } IfxCif_Vsnc_In;
82
83 IFX_EXTERN IfxCif_Clk_In IfxCif_CLK_P00_7_IN; /**< \brief CIF_CLK: CIF input */
84 IFX_EXTERN IfxCif_D_In IfxCif_D0_P02_0_IN; /**< \brief CIF_D0: CIF input */
85 IFX_EXTERN IfxCif_D_In IfxCif_D10_P00_1_IN; /**< \brief CIF_D10: CIF input */
86 IFX_EXTERN IfxCif_D_In IfxCif_D11_P00_2_IN; /**< \brief CIF_D11: CIF input */
87 IFX_EXTERN IfxCif_D_In IfxCif_D12_P00_3_IN; /**< \brief CIF_D12: CIF input */
88 IFX_EXTERN IfxCif_D_In IfxCif_D13_P00_4_IN; /**< \brief CIF_D13: CIF input */
89 IFX_EXTERN IfxCif_D_In IfxCif_D14_P00_5_IN; /**< \brief CIF_D14: CIF input */
90 IFX_EXTERN IfxCif_D_In IfxCif_D15_P00_6_IN; /**< \brief CIF_D15: CIF input */
91 IFX_EXTERN IfxCif_D_In IfxCif_D1_P02_1_IN; /**< \brief CIF_D1: CIF input */
92 IFX_EXTERN IfxCif_D_In IfxCif_D2_P02_2_IN; /**< \brief CIF_D2: CIF input */
93 IFX_EXTERN IfxCif_D_In IfxCif_D3_P02_3_IN; /**< \brief CIF_D3: CIF input */
94 IFX_EXTERN IfxCif_D_In IfxCif_D4_P02_4_IN; /**< \brief CIF_D4: CIF input */
95 IFX_EXTERN IfxCif_D_In IfxCif_D5_P02_5_IN; /**< \brief CIF_D5: CIF input */
96 IFX_EXTERN IfxCif_D_In IfxCif_D6_P02_6_IN; /**< \brief CIF_D6: CIF input */
97 IFX_EXTERN IfxCif_D_In IfxCif_D7_P02_7_IN; /**< \brief CIF_D7: CIF input */
98 IFX_EXTERN IfxCif_D_In IfxCif_D8_P02_8_IN; /**< \brief CIF_D8: CIF input */
99 IFX_EXTERN IfxCif_D_In IfxCif_D9_P00_0_IN; /**< \brief CIF_D9: CIF input */
100 IFX_EXTERN IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN; /**< \brief CIF_HSNC: CIF input */
101 IFX_EXTERN IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN; /**< \brief CIF_VSNC: CIF input */
102
103 /** \} */
104
105 #endif /* IFXCIF_PINMAP_H */
IfxCif_D2_P02_2_IN
IFX_EXTERN IfxCif_D_In IfxCif_D2_P02_2_IN
CIF_D2: CIF input.
Definition: IfxCif_PinMap.h:92
IfxCif_D3_P02_3_IN
IFX_EXTERN IfxCif_D_In IfxCif_D3_P02_3_IN
CIF_D3: CIF input.
Definition: IfxCif_PinMap.h:93
IfxCif_Hsnc_In
HSNC pin mapping structure.
Definition: IfxCif_PinMap.h:70
IfxCif_VSNC_P00_8_IN
IFX_EXTERN IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN
CIF_VSNC: CIF input.
Definition: IfxCif_PinMap.h:101
IfxCif_D9_P00_0_IN
IFX_EXTERN IfxCif_D_In IfxCif_D9_P00_0_IN
CIF_D9: CIF input.
Definition: IfxCif_PinMap.h:99
IfxCif_D15_P00_6_IN
IFX_EXTERN IfxCif_D_In IfxCif_D15_P00_6_IN
CIF_D15: CIF input.
Definition: IfxCif_PinMap.h:90
IfxCif_D_In
D pin mapping structure.
Definition: IfxCif_PinMap.h:63
IfxCif_D13_P00_4_IN
IFX_EXTERN IfxCif_D_In IfxCif_D13_P00_4_IN
CIF_D13: CIF input.
Definition: IfxCif_PinMap.h:88
IfxCif_D10_P00_1_IN
IFX_EXTERN IfxCif_D_In IfxCif_D10_P00_1_IN
CIF_D10: CIF input.
Definition: IfxCif_PinMap.h:85
IfxCif_D11_P00_2_IN
IFX_EXTERN IfxCif_D_In IfxCif_D11_P00_2_IN
CIF_D11: CIF input.
Definition: IfxCif_PinMap.h:86
IfxCif_D8_P02_8_IN
IFX_EXTERN IfxCif_D_In IfxCif_D8_P02_8_IN
CIF_D8: CIF input.
Definition: IfxCif_PinMap.h:98
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCif_Vsnc_In
VSNC pin mapping structure.
Definition: IfxCif_PinMap.h:77
IfxCif_Clk_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxCif_PinMap.h:59
IfxCif_D4_P02_4_IN
IFX_EXTERN IfxCif_D_In IfxCif_D4_P02_4_IN
CIF_D4: CIF input.
Definition: IfxCif_PinMap.h:94
IfxCif_HSNC_P00_9_IN
IFX_EXTERN IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN
CIF_HSNC: CIF input.
Definition: IfxCif_PinMap.h:100
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxCif_Clk_In
CLK pin mapping structure.
Definition: IfxCif_PinMap.h:56
IfxCif_D0_P02_0_IN
IFX_EXTERN IfxCif_D_In IfxCif_D0_P02_0_IN
CIF_D0: CIF input.
Definition: IfxCif_PinMap.h:84
IfxCif_CLK_P00_7_IN
IFX_EXTERN IfxCif_Clk_In IfxCif_CLK_P00_7_IN
CIF_CLK: CIF input.
Definition: IfxCif_PinMap.h:83
IfxCif_D7_P02_7_IN
IFX_EXTERN IfxCif_D_In IfxCif_D7_P02_7_IN
CIF_D7: CIF input.
Definition: IfxCif_PinMap.h:97
IfxCif_D5_P02_5_IN
IFX_EXTERN IfxCif_D_In IfxCif_D5_P02_5_IN
CIF_D5: CIF input.
Definition: IfxCif_PinMap.h:95
IfxCif_D1_P02_1_IN
IFX_EXTERN IfxCif_D_In IfxCif_D1_P02_1_IN
CIF_D1: CIF input.
Definition: IfxCif_PinMap.h:91
IfxCif_D12_P00_3_IN
IFX_EXTERN IfxCif_D_In IfxCif_D12_P00_3_IN
CIF_D12: CIF input.
Definition: IfxCif_PinMap.h:87
IfxCif_D14_P00_5_IN
IFX_EXTERN IfxCif_D_In IfxCif_D14_P00_5_IN
CIF_D14: CIF input.
Definition: IfxCif_PinMap.h:89
IfxCif_Clk_In::module
Ifx_CIF * module
Base address.
Definition: IfxCif_PinMap.h:58
IfxCif_cfg.h
CIF on-chip implementation data.
IfxCif_D6_P02_6_IN
IFX_EXTERN IfxCif_D_In IfxCif_D6_P02_6_IN
CIF_D6: CIF input.
Definition: IfxCif_PinMap.h:96
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxCif_cfg.c Source File

  • _Impl
IfxCif_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxCif_cfg.c
3 * \brief CIF on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxCif_cfg.h"
IfxCif_cfg.h
CIF on-chip implementation data.


iLLD_TC26B: IfxCif_cfg.h Source File

  • _Impl
IfxCif_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxCif_cfg.h
3 * \brief CIF on-chip implementation data
4 * \ingroup IfxLld_Cif
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Cif CIF
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Cif_Impl Implementation
44 * \ingroup IfxLld_Cif
45 * \defgroup IfxLld_Cif_Std Standard Driver
46 * \ingroup IfxLld_Cif
47 */
48
49 #ifndef IFXCIF_CFG_H
50 #define IFXCIF_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "Cpu/Std/Ifx_Types.h"
57
58 /******************************************************************************/
59 /*-----------------------------------Macros-----------------------------------*/
60 /******************************************************************************/
61
62 #ifndef IFXCIF_DEBUG
63 #define IFXCIF_DEBUG __debug()
64 #endif
65
66 /** \brief Number of extra phats
67 */
68 #define IFXCIF_EXTRA_PATHS (5)
69
70 #ifndef IFXCIF_MAX_I2CNAK
71 #define IFXCIF_MAX_I2CNAK (16)
72 #endif
73
74 #define IFXCIF_NUM_MODULES (1)
75
76 #endif /* IFXCIF_CFG_H */
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.


iLLD_TC26B: IfxCpu.c Source File

  • Cpu
  • Std
IfxCpu.c
Go to the documentation of this file.
1 /**
2 * \file IfxCpu.c
3 * \brief CPU basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxCpu.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 boolean IfxCpu_acquireMutex(IfxCpu_mutexLock *lock)
54 {
55 boolean retVal;
56 volatile uint32 spinLockVal;
57
58 retVal = FALSE;
59
60 spinLockVal = 1UL;
61 spinLockVal =
62 (uint32)__cmpAndSwap(((unsigned int *)lock), spinLockVal, 0);
63
64 /* Check if the SpinLock WAS set before the attempt to acquire spinlock */
65 if (spinLockVal == 0)
66 {
67 retVal = TRUE;
68 }
69
70 return retVal;
71 }
72
73
74 IfxCpu_CoreMode IfxCpu_getCoreMode(Ifx_CPU *cpu)
75 {
76 IfxCpu_CoreMode cpuMode;
77 Ifx_CPU_DBGSR dbgsr;
78 IfxCpu_ResourceCpu index = IfxCpu_getIndex(cpu);
79
80 cpuMode = IfxCpu_CoreMode_unknown;
81
82 /*get the DBGSR.HALT status */
83 /*Check if the request is done for same cpu as the host for this call */
84 if (IfxCpu_getCoreIndex() != index)
85 { /*status request is for other cpu than the host */
86 dbgsr = cpu->DBGSR;
87 }
88 else
89 { /*status request is for same cpu as the host */
90 dbgsr.U = __mfcr(CPU_DBGSR);
91 }
92
93 /*Check if the requested CPU is in DBG HALT mode */
94 if (dbgsr.B.HALT == (uint32)IfxCpu_DBGST_HALT_halt)
95 { /*CPU is in DBG HALT mode */
96 cpuMode = IfxCpu_CoreMode_halt;
97 }
98 else
99 {
100 if (dbgsr.B.HALT == (uint32)IfxCpu_DBGST_HALT_run)
101 { /*CPU is in DBG RUNNING mode now check PMCSR status */
102 volatile Ifx_SCU_PMCSR *pmcsr_val;
103
104 pmcsr_val = &MODULE_SCU.PMCSR[index];
105
106 if (pmcsr_val->B.PMST == (uint32)IfxCpu_PMCSR_PMST_normalMode)
107 { /*Cpu is in normal run mode */
108 cpuMode = IfxCpu_CoreMode_run;
109 }
110 else
111 { /*Cpu is not in run mode */
112 if (pmcsr_val->B.PMST == (uint32)IfxCpu_PMCSR_PMST_idleMode)
113 { /*Cpu is in idle mode */
114 cpuMode = IfxCpu_CoreMode_idle;
115 }
116 }
117 }
118 else
119 {
120 cpuMode = IfxCpu_CoreMode_unknown;
121 }
122 }
123
124 return cpuMode;
125 }
126
127
128 IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU *cpu)
129 {
130 IfxCpu_ResourceCpu result;
131 uint32 index;
132 result = IfxCpu_ResourceCpu_none;
133
134 for (index = 0; index < IFXCPU_NUM_MODULES; index++)
135 {
136 if (IfxCpu_cfg_indexMap[index].module == cpu)
137 {
138 result = (IfxCpu_ResourceCpu)IfxCpu_cfg_indexMap[index].index;
139 break;
140 }
141 }
142
143 return result;
144 }
145
146
147 uint32 IfxCpu_getRandomValue(uint32 *seed)
148 {
149 /*************************************************************************
150 * the choice of a and m is important for a long period of the LCG
151 * with a = 279470273 and
152 * m = 4294967291
153 * a maximum period of 2^32-5 is given
154 * values for a:
155 * 0x5EB0A82F = 1588635695
156 * 0x48E7211F = 1223106847
157 * 0x10a860c1 = 279470273
158 ***************************************************************************/
159 uint32 x = *seed;
160
161 /* a seed of 0 is not allowed, and therefore will be changed to a valid value */
162 if (x == 0)
163 {
164 x = 42;
165 }
166
167 uint32 a = 0x10a860c1; // 279470273
168 uint32 m = 0xfffffffb; // 4294967291
169 uint32 result;
170
171 //__asm(a,m,x,tmp1,tmp2 );
172 //EhEl = a * x;
173 //result = e14 % m;
174 // %0 result
175 // %1 a
176 // %2 x
177 // %3 m
178 result = IfxCpu_getRandomVal(a, x, m);
179
180 *seed = result; // to simplify seed passing
181
182 return result;
183 }
184
185
186 uint32 IfxCpu_getRandomValueWithinRange(uint32 *seed, uint32 min, uint32 max)
187 {
188 uint32 new_value = IfxCpu_getRandomValue(seed);
189
190 /* swap min/max if required */
191 if (min > max)
192 {
193 unsigned swap = max;
194 max = min;
195 min = swap;
196 }
197
198 /* special case */
199 if ((min == 0) && (max == 0xffffffff))
200 {
201 return new_value;
202 }
203
204 /* return value within range */
205 return (new_value % (max - min + 1)) + min;
206 }
207
208
209 void IfxCpu_releaseMutex(IfxCpu_mutexLock *lock)
210 {
211 /*Reset the SpinLock*/
212 *lock = 0;
213 }
214
215
216 void IfxCpu_resetSpinLock(IfxCpu_spinLock *lock)
217 {
218 /*Reset the SpinLock*/
219 *lock = 0;
220 }
221
222
223 boolean IfxCpu_setCoreMode(Ifx_CPU *cpu, IfxCpu_CoreMode mode)
224 {
225 uint8 reqslp;
226 boolean retValue;
227 IfxCpu_ResourceCpu index = IfxCpu_getIndex(cpu);
228
229 /*Modes such as HALT, SLEEP and STBY are not handled at CPU level */
230 retValue = ((mode == IfxCpu_CoreMode_halt) || (mode == IfxCpu_CoreMode_sleep)
231 || (mode == IfxCpu_CoreMode_stby)) ? FALSE : TRUE;
232
233 reqslp = (mode == IfxCpu_CoreMode_idle) ? IfxScu_PMCSR_REQSLP_Idle : IfxScu_PMCSR_REQSLP_Run;
234
235 if (retValue == TRUE)
236 {
237 /*Check if the same core is requesting to change the core run mode */
238 if (IfxCpu_getCoreIndex() != index)
239 { /*Request is for the other core */
240 /*To access PMCSR of other CPUs handle the safety EndInit protection */
241 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
242 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
243 MODULE_SCU.PMCSR[(uint32)IfxCpu_getIndex(cpu)].B.REQSLP = reqslp;
244 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
245
246 cpu->DBGSR.B.HALT = 2; /*reset the HALT bit, if it is already done it is no harm in writing again */
247 }
248 else
249 { /*Request is for self, this request normally only for halt, otherwise the core is already running anyway! */
250 /*To access PMCSR of self handle the cpu EndInit protection */
251 uint16 cpuWdtPw = IfxScuWdt_getCpuWatchdogPassword();
252 IfxScuWdt_clearCpuEndinit(cpuWdtPw);
253 MODULE_SCU.PMCSR[(uint32)index].B.REQSLP = reqslp;
254 IfxScuWdt_setCpuEndinit(cpuWdtPw);
255 }
256 }
257
258 return retValue;
259 }
260
261
262 boolean IfxCpu_setProgramCounter(Ifx_CPU *cpu, uint32 programCounter)
263 {
264 boolean retVal = TRUE;
265
266 if (cpu == IfxCpu_getAddress(IfxCpu_getCoreIndex()))
267 {
268 retVal = FALSE;
269 }
270 else
271 {
272 cpu->PC.B.PC = programCounter >> 1;
273 }
274
275 return retVal;
276 }
277
278
279 boolean IfxCpu_setSpinLock(IfxCpu_spinLock *lock, uint32 timeoutCount)
280 {
281 boolean retVal;
282 volatile uint32 spinLockVal;
283
284 retVal = FALSE;
285
286 do
287 {
288 spinLockVal = 1UL;
289 spinLockVal =
290 (uint32)__cmpAndSwap(((unsigned int *)lock), spinLockVal, 0);
291
292 /* Check if the SpinLock WAS set before the attempt to acquire spinlock */
293 if (spinLockVal == 0)
294 {
295 retVal = TRUE;
296 }
297 else
298 {
299 timeoutCount--;
300 }
301 } while ((retVal == FALSE) && (timeoutCount > 0));
302
303 return retVal;
304 }
305
306
307 boolean IfxCpu_startCore(Ifx_CPU *cpu, uint32 programCounter)
308 {
309 boolean retVal = TRUE;
310
311 /* Set the PC for Core 1 */
312 retVal &= IfxCpu_setProgramCounter(cpu, programCounter);
313 /* Get the mode for Core 1 and set it to RUNNING */
314
315 /* Core not running already */
316 if (IfxCpu_getCoreMode(cpu) == IfxCpu_CoreMode_halt)
317 {
318 retVal &= IfxCpu_setCoreMode(cpu, IfxCpu_CoreMode_run);
319 }
320
321 return retVal;
322 }
323
324
325 boolean IfxCpu_waitEvent(IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
326 {
327 volatile uint32 *sync = (volatile uint32 *)IFXCPU_GLB_ADDR_DSPR(__mfcr(CPU_CORE_ID), event);
328
329 boolean errorcnt = 0U;
330 /* Divide with 1000, gives the count value equivalent to milliseconds */
331 uint32 stmCount = (uint32)((IfxScuCcu_getStmFrequency() / 1000) * timeoutMilliSec);
332 uint32 stmCountBegin = STM0_TIM0.U;
333
334 while ((*sync & IFXCPU_CFG_ALLCORE_DONE) != IFXCPU_CFG_ALLCORE_DONE)
335 {
336 __nop();
337
338 if ((uint32)(STM0_TIM0.U - stmCountBegin) >= stmCount)
339 {
340 errorcnt = 1;
341 break;
342 }
343
344 /* There is no need to check overflow of the STM timer.
345 * When counter after overflow subtracted with counter before overflow,
346 * the subtraction result will be as expected, as long as both are unsigned 32 bits
347 * eg: stmCountBegin= 0xFFFFFFFE (before overflow)
348 * stmCountNow = 0x00000002 (before overflow)
349 * diff= stmCountNow - stmCountBegin = 4 as expected.*/
350 }
351
352 return errorcnt;
353 }
354
355
356 void IfxCpu_emitEvent(IfxCpu_syncEvent *event)
357 {
358 Ifx__imaskldmst(event, 1, __mfcr(CPU_CORE_ID), 1);
359 }
IfxCpu_getAddress
IFX_INLINE Ifx_CPU * IfxCpu_getAddress(IfxCpu_ResourceCpu cpu)
API to get the address for CPU HW module register memory map.
Definition: IfxCpu.h:741
IfxCpu_setCoreMode
boolean IfxCpu_setCoreMode(Ifx_CPU *cpu, IfxCpu_CoreMode mode)
API to set mode of the CPU.
Definition: IfxCpu.c:223
IfxScu_PMCSR_REQSLP_Idle
Definition: IfxScu_cfg.h:1409
IfxCpu_DBGST_HALT_halt
Definition: IfxCpu_cfg.h:119
IfxCpu_getRandomValueWithinRange
uint32 IfxCpu_getRandomValueWithinRange(uint32 *seed, uint32 min, uint32 max)
API to get random value with in the range.
Definition: IfxCpu.c:186
IfxCpu_acquireMutex
boolean IfxCpu_acquireMutex(IfxCpu_mutexLock *lock)
API to acquire the mutex (binary semaphore).
Definition: IfxCpu.c:53
Ifx__imaskldmst
asm volatile void Ifx__imaskldmst(void *a, sint32 b, sint32 p, const sint32 w)
Definition: IfxCpu_IntrinsicsDcc.h:436
IfxCpu_CoreMode_idle
Definition: IfxCpu.h:133
IfxCpu_emitEvent
void IfxCpu_emitEvent(IfxCpu_syncEvent *event)
This function sets a bit corresponding to the core in the event.
Definition: IfxCpu.c:356
IFXCPU_CFG_ALLCORE_DONE
#define IFXCPU_CFG_ALLCORE_DONE
All cores (coreIDs) mask. This macro can be defined by the user according to the number of core being...
Definition: IfxCpu_cfg.h:95
__mfcr
sint32 __mfcr(const uint32) __attribute__((intrinsic_function(0x101
IfxCpu_ResourceCpu_none
None of the CPU.
Definition: IfxCpu_cfg.h:157
IfxCpu_syncEvent
unsigned int IfxCpu_syncEvent
Event used for synchronisation.
Definition: IfxCpu.h:119
IfxCpu_getRandomVal
asm volatile uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Generate the Random value.
Definition: IfxCpu_IntrinsicsDcc.h:1534
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCpu_CoreMode
IfxCpu_CoreMode
Enumeration for the Cpu mode.
Definition: IfxCpu.h:129
IfxCpu_waitEvent
boolean IfxCpu_waitEvent(IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation.
Definition: IfxCpu.c:325
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxCpu_getRandomValue
uint32 IfxCpu_getRandomValue(uint32 *seed)
API to get random value.
Definition: IfxCpu.c:147
IfxScuCcu_getStmFrequency
IFX_INLINE float32 IfxScuCcu_getStmFrequency(void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register ...
Definition: IfxScuCcu.h:1119
IfxCpu_PMCSR_PMST_normalMode
Definition: IfxCpu_cfg.h:144
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxCpu_CoreMode_sleep
Definition: IfxCpu.h:134
IfxCpu_releaseMutex
void IfxCpu_releaseMutex(IfxCpu_mutexLock *lock)
API to unlock the mutex .
Definition: IfxCpu.c:209
IfxCpu_PMCSR_PMST_idleMode
Definition: IfxCpu_cfg.h:146
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:195
IfxCpu_DBGST_HALT_run
Definition: IfxCpu_cfg.h:118
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:153
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxCpu_CoreMode_stby
Definition: IfxCpu.h:135
max
sint32 max
Definition: IfxCpu_IntrinsicsDcc.h:149
IfxScu_PMCSR_REQSLP_Run
Definition: IfxScu_cfg.h:1408
IfxCpu_getIndex
IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU *cpu)
API to get current mode of CPU.
Definition: IfxCpu.c:128
IFXCPU_GLB_ADDR_DSPR
#define IFXCPU_GLB_ADDR_DSPR(cpu, address)
Convert local DSPR address to global DSPR address which can be accessed from the SRI bus...
Definition: IfxCpu.h:90
IfxCpu_mutexLock
unsigned int IfxCpu_mutexLock
Lock type Mutex lock.
Definition: IfxCpu.h:115
IfxCpu_spinLock
unsigned int IfxCpu_spinLock
Lock type Spin lock.
Definition: IfxCpu.h:111
IfxCpu_getCoreMode
IfxCpu_CoreMode IfxCpu_getCoreMode(Ifx_CPU *cpu)
API to get current mode of CPU.
Definition: IfxCpu.c:74
IfxCpu_startCore
boolean IfxCpu_startCore(Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified and start the CPU.
Definition: IfxCpu.c:307
IfxCpu.h
CPU basic functionality.
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxCpu_setSpinLock
boolean IfxCpu_setSpinLock(IfxCpu_spinLock *lock, uint32 timeoutCount)
API to lock the resource in spin mode with the given timeout.
Definition: IfxCpu.c:279
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:424
IfxCpu_CoreMode_unknown
Definition: IfxCpu.h:136
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:253
IfxCpu_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]
Definition: IfxCpu_cfg.c:52
IfxCpu_getCoreIndex
IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed...
Definition: IfxCpu.h:778
min
sint32 min
Definition: IfxCpu_IntrinsicsDcc.h:131
__cmpAndSwap
#define __cmpAndSwap
Definition: IfxCpu_IntrinsicsDcc.h:2089
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxCpu_CoreMode_run
Definition: IfxCpu.h:132
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxCpu_setProgramCounter
boolean IfxCpu_setProgramCounter(Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified.
Definition: IfxCpu.c:262
IfxCpu_CoreMode_halt
Definition: IfxCpu.h:131
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IFXCPU_NUM_MODULES
#define IFXCPU_NUM_MODULES
CPU count.
Definition: IfxCpu_cfg.h:65
IfxCpu_resetSpinLock
void IfxCpu_resetSpinLock(IfxCpu_spinLock *lock)
API to unlock the resource .
Definition: IfxCpu.c:216


iLLD_TC26B: IfxCpu.h Source File

  • Cpu
  • Std
IfxCpu.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu.h
3 * \brief CPU basic functionality
4 * \ingroup IfxLld_Cpu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Cpu_Std_Core Cpu Core Functions
43 * \ingroup IfxLld_Cpu_Std
44 * \defgroup IfxLld_Cpu_Std_Interrupt Interrupt Utility Functions
45 * \ingroup IfxLld_Cpu_Std
46 * \defgroup IfxLld_Cpu_Std_Cache Cache Management Functions
47 * \ingroup IfxLld_Cpu_Std
48 * \defgroup IfxLld_Cpu_Std_PerformanceCounter Performance Counter Functions
49 * \ingroup IfxLld_Cpu_Std
50 * \defgroup IfxLld_Cpu_Std_Synchronization Synchronization Functions
51 * \ingroup IfxLld_Cpu_Std
52 * \defgroup IfxLld_Cpu_Std_Utility Cpu Utility Functions
53 * \ingroup IfxLld_Cpu_Std
54 * \defgroup IfxLld_Cpu_Std_Enum Enumerations
55 * \ingroup IfxLld_Cpu_Std
56 * \defgroup IfxLld_Cpu_Std_DataStructures Data Structures
57 * \ingroup IfxLld_Cpu_Std
58 */
59
60 #ifndef IFXCPU_H
61 #define IFXCPU_H 1
62
63 /******************************************************************************/
64 /*----------------------------------Includes----------------------------------*/
65 /******************************************************************************/
66
67 #include "_Impl/IfxCpu_cfg.h"
68 #include "IfxSrc_reg.h"
69 #include "IfxScu_reg.h"
70 #include "IfxStm_reg.h"
71 #include "_Impl/IfxScu_cfg.h"
72 #include "_Utilities/Ifx_Assert.h"
73 #include "Scu/Std/IfxScuWdt.h"
74 #include "Scu/Std/IfxScuCcu.h"
75
76 /******************************************************************************/
77 /*-----------------------------------Macros-----------------------------------*/
78 /******************************************************************************/
79
80 /** \brief Convert local DSPR address to global DSPR address which can be accessed from the SRI bus.
81 * Use this macro to convert a local DSPR address (in segment 0xd00.....) to
82 * a global DSPR address (in segment 0x700....., 0x600....., 0x500..... downwards) depending on
83 * the CPU number.
84 * Example usage:
85 * \code
86 * dmaChConfig.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i][0]);
87 * dmaChConfig.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &destinationBuffer[i][0]);
88 * \endcode
89 */
90 #define IFXCPU_GLB_ADDR_DSPR(cpu, address) ((((((unsigned)(address) & 0xF0000000) == 0xD0000000) ? ((((unsigned)(address) & 0x000fffff) | 0x70000000) - ((cpu) * 0x10000000)) : (unsigned)(address))))
91
92 /** \brief Convert local PSPR address to global PSPR address which can be accessed from the SRI bus.
93 * Use this macro to convert a local PSPR address (in segment 0xc......) to
94 * a global PSPR address (in segment 0x701....., 0x601....., 0x501..... downwards) depending on
95 * the CPU number.
96 *
97 * Example usage:
98 * \code
99 * dmaChConfig.sourceAddress = IFXCPU_GLB_ADDR_PSPR(IfxCpu_getCoreId(), &sourceBufferInPsprMemory);
100 * dmaChConfig.destinationAddress = IFXCPU_GLB_ADDR_PSPR(IfxCpu_getCoreId(), &destinationBufferInPsprMemory);
101 * \endcode
102 */
103 #define IFXCPU_GLB_ADDR_PSPR(cpu, address) ((((unsigned)(address) & 0x000fffff) | 0x70100000) - ((cpu) * 0x10000000))
104
105 /******************************************************************************/
106 /*------------------------------Type Definitions------------------------------*/
107 /******************************************************************************/
108
109 /** \brief Lock type Spin lock
110 */
111 typedef unsigned int IfxCpu_spinLock;
112
113 /** \brief Lock type Mutex lock
114 */
115 typedef unsigned int IfxCpu_mutexLock;
116
117 /** \brief Event used for synchronisation.
118 */
119 typedef unsigned int IfxCpu_syncEvent;
120
121 /******************************************************************************/
122 /*--------------------------------Enumerations--------------------------------*/
123 /******************************************************************************/
124
125 /** \addtogroup IfxLld_Cpu_Std_Enum
126 * \{ */
127 /** \brief Enumeration for the Cpu mode
128 */
129 typedef enum
130 {
131 IfxCpu_CoreMode_halt,
132 IfxCpu_CoreMode_run,
133 IfxCpu_CoreMode_idle,
134 IfxCpu_CoreMode_sleep,
135 IfxCpu_CoreMode_stby,
136 IfxCpu_CoreMode_unknown
137 } IfxCpu_CoreMode;
138
139 /** \brief Performance conunter modes
140 */
141 typedef enum
142 {
143 IfxCpu_CounterMode_normal = 0, /**< \brief Normal counter mode:the counter increments on their respective triggers */
144 IfxCpu_CounterMode_task = 1 /**< \brief Normal counter mode:additional gating control from the debug unit which allows the data gathered in the performance counters to be filtered by some specific criteria */
145 } IfxCpu_CounterMode;
146
147 /** \} */
148
149 /******************************************************************************/
150 /*-----------------------------Data Structures--------------------------------*/
151 /******************************************************************************/
152
153 /** \addtogroup IfxLld_Cpu_Std_DataStructures
154 * \{ */
155 /** \brief counter
156 */
157 typedef struct
158 {
159 uint32 counter; /**< \brief Counter value */
160 boolean overlfow; /**< \brief sticky overlfow */
161 } IfxCpu_Counter;
162
163 /** \} */
164
165 /** \addtogroup IfxLld_Cpu_Std_DataStructures
166 * \{ */
167 /** \brief Performance counter result
168 */
169 typedef struct
170 {
171 IfxCpu_Counter instruction; /**< \brief Instruction counter */
172 IfxCpu_Counter clock; /**< \brief CPU clock counter */
173 IfxCpu_Counter counter1; /**< \brief Multi counter 1 */
174 IfxCpu_Counter counter2; /**< \brief Multi counter 2 */
175 IfxCpu_Counter counter3; /**< \brief Multi counter 3 */
176 } IfxCpu_Perf;
177
178 /** \} */
179
180 /** \addtogroup IfxLld_Cpu_Std_Core
181 * \{ */
182
183 /******************************************************************************/
184 /*-------------------------Inline Function Prototypes-------------------------*/
185 /******************************************************************************/
186
187 /** \brief API to get the address for CPU HW module register memory map
188 * \param cpu Resource index of the CPU
189 * \return CPU module register address
190 */
191 IFX_INLINE Ifx_CPU *IfxCpu_getAddress(IfxCpu_ResourceCpu cpu);
192
193 /** \brief API to get core id of the CPU of the caller.
194 * Caution: Core id of the cpu's may not be continguous and shouldn't be used to index cpu.
195 * Use IfxCpu_getCoreIndex() to get cpu no.
196 * \return Resource index of the CPU.
197 */
198 IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void);
199
200 /** \brief API to get cpu index of the caller CPU.
201 * Note: This api can be used whereever cpu no/index is needed.
202 * \return Resource index of the CPU.
203 */
204 IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void);
205
206 /** \brief API to initialize the context save area of the CPU where this is called.
207 *
208 * This API can initialize the CSA of the host CPU where this API is called. This API
209 * shall not be used to initialize the CSA of another CPU
210 * \param csaBegin Pointer to start of context save area
211 * \param csaEnd Pointer to end of context save area
212 * \return None
213 */
214 IFX_INLINE void IfxCpu_initCSA(uint32 *csaBegin, uint32 *csaEnd);
215
216 /** \brief Set/Clear safety task identifier (PSW.S) on current CPU
217 * \return None
218 */
219 IFX_INLINE void IfxCpu_setSafetyTaskIdentifier(boolean safetyId);
220
221 /** \brief Triggers Software Reset
222 * \return None
223 */
224 IFX_INLINE void IfxCpu_triggerSwReset(void);
225
226 /******************************************************************************/
227 /*-------------------------Global Function Prototypes-------------------------*/
228 /******************************************************************************/
229
230 /** \brief API to get current mode of CPU
231 * \param cpu Pointer to the CPU HW module (register memory map)
232 * \return Current mode of the CPU
233 */
234 IFX_EXTERN IfxCpu_CoreMode IfxCpu_getCoreMode(Ifx_CPU *cpu);
235
236 /** \brief API to get current mode of CPU
237 * \param cpu Pointer to the CPU HW module (register memory map)
238 * \return Resource index of the CPU
239 */
240 IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU *cpu);
241
242 /** \brief API to set mode of the CPU
243 * \param cpu Pointer to the CPU HW module (register memory map)
244 * \param mode CPU mode to be set by this API
245 * \return Success status of the activity (setting the core mode).
246 * \retval TRUE: If the activity successfully be performed.
247 * \retval FALSE: If the activity can't be performed.
248 */
249 IFX_EXTERN boolean IfxCpu_setCoreMode(Ifx_CPU *cpu, IfxCpu_CoreMode mode);
250
251 /** \brief API to set the program counter for the CPU specified.
252 * \param cpu Pointer to the CPU HW module (register memory map)
253 * \param programCounter Program counter value to be set
254 * \return success status of the activity (setting program counter value).
255 * \retval TRUE: If the activity successfully be performed.
256 * \retval FALSE: If the activity can't be performed
257 */
258 IFX_EXTERN boolean IfxCpu_setProgramCounter(Ifx_CPU *cpu, uint32 programCounter);
259
260 /** \brief API to set the program counter for the CPU specified and start the CPU
261 * \param cpu Pointer to the CPU HW module (register memory map)
262 * \param programCounter Program counter value to start the CPU
263 * \return success status of the activity (setting program counter value).
264 * \retval TRUE: If the activity successfully be performed.
265 * \retval FALSE: If the activity can't be performed
266 */
267 IFX_EXTERN boolean IfxCpu_startCore(Ifx_CPU *cpu, uint32 programCounter);
268
269 /** \} */
270
271 /** \addtogroup IfxLld_Cpu_Std_Interrupt
272 * \{ */
273
274 /******************************************************************************/
275 /*-------------------------Inline Function Prototypes-------------------------*/
276 /******************************************************************************/
277
278 /** \brief API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API
279 * This API provides the status of CPU where this API is called
280 * \return Status of global interrupt enable bit.
281 * \retval TRUE: Global interrupts enabled.
282 * \retval FALSE: Global interrupts disabled
283 */
284 IFX_INLINE boolean IfxCpu_areInterruptsEnabled(void);
285
286 /** \brief API to disable global interrupt and return the previous status.
287 *
288 * This API can be used only to disable the global interrupts of caller CPU. It cannot be
289 * used for this activity towards other CPUs
290 * \return Previous status of global interrupt enable bit.
291 * \retval TRUE: Previously, global interrupts enabled.
292 * \retval FALSE: Previously, global interrupts disabled
293 */
294 IFX_INLINE boolean IfxCpu_disableInterrupts(void);
295
296 /** \brief API to enable global interrupt.
297 * This API simply enables the global interrupt.
298 * \return None
299 */
300 IFX_INLINE void IfxCpu_enableInterrupts(void);
301
302 /** \brief Disable the Global Interrupt
303 * \return None
304 */
305 IFX_INLINE void IfxCpu_forceDisableInterrupts(void);
306
307 /** \brief API to restore global interrupt with that of the passed parameter.
308 *
309 * This API can be used only to disable the global interrupts of caller CPU. It cannot be
310 * used for this activity towards other CPUs
311 * \param enabled Previous status of the global interrupt enable bit
312 * \return None
313 */
314 IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled);
315
316 /** \} */
317
318 /** \addtogroup IfxLld_Cpu_Std_Cache
319 * \{ */
320
321 /******************************************************************************/
322 /*-------------------------Inline Function Prototypes-------------------------*/
323 /******************************************************************************/
324
325 /** \brief API to enable/ disable the data cacheability for selected segments
326 * With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called.
327 * \Note This API is to be called only if the PCACHE or DCACHE are not enabled before
328 * \param segmentNumberMask Mask where bitfield 0 represents segment 0 and bitfield 16 represent segment F.
329 * \param enable TRUE: to enable the cacheability for selected segment, FALSE: to disable.
330 * \return None
331 */
332 IFX_INLINE void IfxCpu_enableSegmentSpecificDataAccessCacheability(uint16 segmentNumberMask, boolean enable);
333
334 /** \brief API to enable/ disable the instruction cacheability for selected segments
335 * With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called.
336 * \Note This API is to be called only if the PCACHE or DCACHE are not enabled before
337 * \param segmentNumberMask Mask where bitfield 0 represents segment 0 and bitfield 16 represent segment F.
338 * \param enable TRUE: to enable the cacheability for selected segment, FALSE: to disable.
339 * \return None
340 */
341 IFX_INLINE void IfxCpu_enableSegmentSpecificInstructionAccessCacheability(uint16 segmentNumberMask, boolean enable);
342
343 /** \brief API to invalidate the program cache
344 * \return None
345 */
346 IFX_INLINE void IfxCpu_invalidateProgramCache(void);
347
348 /** \brief API to determine if an address is in a cachable or non-cachable Flash/LMU section
349 * \param address Address
350 * \return Status TRUE/FALSE
351 */
352 IFX_INLINE boolean IfxCpu_isAddressCachable(void *address);
353
354 /** \brief API to enable or bypass the data cache for the CPU which calls this API.
355 *
356 * This API can be used only to enable or bypass the data cache of caller CPU. It cannot be
357 * used for this activity towards other CPUs
358 * \param enable Command to enable or bypass the data cache
359 * TRUE: Enable the data cache.
360 * FALSE: Bypass the data cache.
361 * \return None
362 */
363 IFX_INLINE void IfxCpu_setDataCache(boolean enable);
364
365 /** \brief API to enable or bypass the program cache for the CPU which calls this API.
366 *
367 * This API can be used only to enable or bypass the program cache of caller CPU. It cannot be
368 * used for this activity towards other CPUs
369 * \param enable Command to enable or bypass the program cache.
370 * TRUE: Enable the program cache.
371 * FALSE: Bypass the program cache
372 * \return None
373 */
374 IFX_INLINE void IfxCpu_setProgramCache(boolean enable);
375
376 /** \} */
377
378 /** \addtogroup IfxLld_Cpu_Std_PerformanceCounter
379 * \{ */
380
381 /******************************************************************************/
382 /*-------------------------Inline Function Prototypes-------------------------*/
383 /******************************************************************************/
384
385 /** \brief API to read the clock counter for the CPU which calls this API.
386 *
387 * This API can be used to read clock counter of only the caller CPU. It cannot be
388 * used for this activity towards other CPUs.
389 * \return Counter value. 0 to 0x7FFFFFFF.
390 */
391 IFX_INLINE uint32 IfxCpu_getClockCounter(void);
392
393 /** \brief API to get sticky overflow bit of clock counter for the CPU, which calls this API.
394 *
395 * This API can be used to get sticky overflow bit of clock counter of only the caller CPU.
396 * It cannot be used for this activity towards other CPUs.
397 * This API also clears the sticky overflow after the read. While reading the sticky bit this API disables
398 * the counter for short time. (otherwise sticky bit cannot be cleared). This API shall be used after
399 * reading the counter
400 * \return Status of sticky overflow bit.
401 * \retval TRUE: Sticky overflow bit is set.
402 * \retval FALSE: Sticky overflow bit is reset
403 */
404 IFX_INLINE boolean IfxCpu_getClockCounterStickyOverflow(void);
405
406 /** \brief API to read the instruction counter for the CPU which calls this API.
407 *
408 * This API can be used to read instruction counter of only the caller CPU. It cannot be
409 * used for this activity towards other CPUs
410 * \return Counter value. 0 to 0x7FFFFFFF.
411 */
412 IFX_INLINE uint32 IfxCpu_getInstructionCounter(void);
413
414 /** \brief API to get sticky overflow bit of Instruction counter for the CPU, which calls this API.
415 *
416 * This API can be used to get sticky overflow bit of Instruction counter of only the caller CPU.
417 * It cannot be used for this activity towards other CPUs.
418 * This API also clears the sticky overflow after the read. While reading the sticky bit this API disables
419 * the counter for short time. (otherwise sticky bit cannot be cleared). This API shall be used after
420 * reading the counter
421 * \return Status of sticky overflow bit.
422 * \retval TRUE: Sticky overflow bit is set.
423 * \retval FALSE: Sticky overflow bit is reset
424 */
425 IFX_INLINE boolean IfxCpu_getInstructionCounterStickyOverflow(void);
426
427 /** \brief API to read the performance counter for the CPU which calls this API.
428 * \param address Address
429 * \return counter value
430 */
431 IFX_INLINE uint32 IfxCpu_getPerformanceCounter(uint16 address);
432
433 /** \brief API to get sticky overflow bit of performance counter for the CPU, which calls this API.
434 * This is generic function to get sticky overflow bit of any performance counters
435 * \param address Address
436 * \return Status
437 */
438 IFX_INLINE boolean IfxCpu_getPerformanceCounterStickyOverflow(uint16 address);
439
440 /** \brief Reset and start instruction, clock and multi counters
441 *
442 * Reset and start CCNT, ICNT, M1CNT, M2CNT, M3CNT. the overflow bits are cleared.
443 * \param mode Counter mode
444 * \return None
445 */
446 IFX_INLINE void IfxCpu_resetAndStartCounters(IfxCpu_CounterMode mode);
447
448 /** \brief API to enable or disable performance counter for the CPU which calls this API.
449 *
450 * This API can be used to enable or disable performance counter of only the caller CPU. It cannot be
451 * used for this activity towards other CPUs.
452 * \param enable enable Command to enable or disable the performance counter.
453 * TRUE: Enable the performance counter.
454 * FALSE: Disable the performance counter
455 * \return None
456 */
457 IFX_INLINE void IfxCpu_setPerformanceCountersEnableBit(uint32 enable);
458
459 #if !((defined(__cplusplus)) && (defined(__TASKING__)))
460 /** \brief Stop instruction and clock counters, return their values
461 *
462 * Stop CCNT, ICNT, M1CNT, M2CNT, M3CNT and return their values;
463 * \Note The CCTRL is reset to 0, for more accurate measurements and has to be initialized again before strating the next performance measurement.
464 * \return Performance counter result
465 */
466 IFX_INLINE IfxCpu_Perf IfxCpu_stopCounters(void);
467 #endif
468
469 /** \brief API to update clock counter for the CPU which calls this API.
470 *
471 * This API can be used to update clock counter of only the caller CPU. It cannot be
472 * used for this activity towards other CPUs.
473 * \param count Counter value to be updated. 0 to 0x7FFFFFFF
474 * \return None
475 */
476 IFX_INLINE void IfxCpu_updateClockCounter(uint32 count);
477
478 /** \brief API to update Instruction counter for the CPU which calls this API.
479 *
480 * This API can be used to update Instruction counter of only the caller CPU. It cannot be
481 * used for this activity towards other CPUs.
482 * \param count Counter value to be updated. 0 to 0x7FFFFFFF
483 * \return None
484 */
485 IFX_INLINE void IfxCpu_updateInstructionCounter(uint32 count);
486
487 /** \brief API to update performance counter for the CPU which calls this API.
488 * This is generic function to update any of the performance counters
489 * \param address Address
490 * \param count Count
491 * \return None
492 */
493 IFX_INLINE void IfxCpu_updatePerformanceCounter(uint32 address, uint32 count);
494
495 /** \} */
496
497 /** \addtogroup IfxLld_Cpu_Std_Synchronization
498 * \{ */
499
500 /******************************************************************************/
501 /*-------------------------Global Function Prototypes-------------------------*/
502 /******************************************************************************/
503
504 /** \brief API to acquire the mutex (binary semaphore).
505 *
506 * This API can be used to acquire/get the mutex.
507 * \param lock lock pointer
508 * \return TRUE : lock acquired successfully. FALSE: Failed to acquire the lock
509 *
510 * \code
511 * IfxCpu_mutexLock resourceLock;
512 * boolean flag = IfxCpu_acquireMutex(&resourceLock);
513 * if (flag){
514 * // critical section
515 * IfxCpu_releaseMutex(&resourceLock);
516 * }
517 * \endcode
518 *
519 */
520 IFX_EXTERN boolean IfxCpu_acquireMutex(IfxCpu_mutexLock *lock);
521
522 /** \brief API to unlock the mutex .
523 *
524 * This API can be used to unlock the previously acquired mutex
525 * \param lock lock pointer
526 * \return None
527 *
528 * \code
529 * IfxCpu_mutexLock resourceLock;
530 * boolean flag = IfxCpu_acquireMutex(&resourceLock);
531 * if (flag){
532 * // critical section
533 * IfxCpu_releaseMutex(&resourceLock);
534 * }
535 * \endcode
536 *
537 */
538 IFX_EXTERN void IfxCpu_releaseMutex(IfxCpu_mutexLock *lock);
539
540 /** \brief API to unlock the resource .
541 *
542 * This API can be used to unlock the previously acquired lock
543 * \param lock lock pointer
544 * \return None
545 */
546 IFX_EXTERN void IfxCpu_resetSpinLock(IfxCpu_spinLock *lock);
547
548 /** \brief API to lock the resource in spin mode with the given timeout.
549 *
550 * This API can be used to spin lock for the lock for the given timeout period.
551 * \param lock lock pointer
552 * \param timeoutCount loop counter value used for timeout to acquire lock
553 * \return TRUE : lock acquired successfully. FALSE: Failed to acquire the lock
554 *
555 * \code
556 * IfxCpu_spinLock resourceLock;
557 * boolean flag = IfxCpu_setSpinLock(&resourceLock, 0xFFFF);
558 * if (flag){
559 * // critical section
560 * IfxCpu_resetSpinLock(&resourceLock);
561 * }
562 * \endcode
563 *
564 */
565 IFX_EXTERN boolean IfxCpu_setSpinLock(IfxCpu_spinLock *lock, uint32 timeoutCount);
566
567 /** \} */
568
569 /** \addtogroup IfxLld_Cpu_Std_Utility
570 * \{ */
571
572 /******************************************************************************/
573 /*-------------------------Global Function Prototypes-------------------------*/
574 /******************************************************************************/
575
576 /** \brief API to get random value
577 * \param seed Pointer to seed value
578 * \return random value
579 */
580 IFX_EXTERN uint32 IfxCpu_getRandomValue(uint32 *seed);
581
582 /** \brief API to get random value with in the range
583 * \param seed Pointer to seed value
584 * \param min minimum range value
585 * \param max maximum range value
586 * \return random value
587 */
588 IFX_EXTERN uint32 IfxCpu_getRandomValueWithinRange(uint32 *seed, uint32 min, uint32 max);
589
590 /** \brief This function waits till all the cores have set their corresponding bits in the event. This function along with
591 * IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default
592 * "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for
593 * synchronisation among the required cores, the macro can be redefined with the value accroing to the
594 * CORE_ID register.
595 * The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation.
596 *
597 * e.g:
598 * 1. Check for synchronisation between core 0 and core 5
599 * # define 0x41U
600 * 2. Check for synchronisation between core 0 to core 5
601 * # define 0x5FU
602 *
603 * Note:
604 * Core id values read from CORE_ID register will be as shown below. The value indicates the position of the bit needs to be set while building the macro.
605 * Core 0: 0
606 * Core 1: 1
607 * Core 2: 2
608 * Core 3: 3
609 * Core 4: 4
610 * Core 5: 6
611 * \param event Synchronous Event
612 * \param timeoutMilliSec timeout in millisec
613 * \return Error condition
614 *
615 * The functions IfxCpu_waitEvent and IfxCpu_emitEvent are used to achieve synchronisation between all cores (i.e individual cores wait till all cores have reached the synchronisation point). The IfxCpu_waitEvent returns 1 incase a timeout occurs.
616 *
617 * \code
618 * // Global variable. preferably located in shared memory.
619 * IfxCpu_syncEvent event;
620 * boolean errorVal;
621 *
622 * // Below code should be repeated in Each core
623 *
624 * // Upon reaching Synchonisation point
625 * IfxCpu_emitEvent(&event);
626 * errorVal = IfxCpu_waitEvent(&event, timeoutMilliSec); // timeoutMilliSec is timeout value to wait
627 *
628 * \endcode
629 *
630 */
631 IFX_EXTERN boolean IfxCpu_waitEvent(IfxCpu_syncEvent *event, uint32 timeoutMilliSec);
632
633 /** \brief This function sets a bit corresponding to the core in the event.
634 * \param event Synchronous Event
635 * \return None
636 *
637 * A coding example can be found in \ref IfxCpu_waitEvent
638 *
639 */
640 IFX_EXTERN void IfxCpu_emitEvent(IfxCpu_syncEvent *event);
641
642 /** \} */
643
644 /******************************************************************************/
645 /*---------------------Inline Function Implementations------------------------*/
646 /******************************************************************************/
647
648 IFX_INLINE boolean IfxCpu_areInterruptsEnabled(void)
649 {
650 Ifx_CPU_ICR reg;
651 reg.U = __mfcr(CPU_ICR);
652 return reg.B.IE != 0;
653 }
654
655
656 IFX_INLINE boolean IfxCpu_disableInterrupts(void)
657 {
658 boolean enabled;
659 enabled = IfxCpu_areInterruptsEnabled();
660 __disable();
661 __nop();
662 return enabled;
663 }
664
665
666 IFX_INLINE void IfxCpu_enableInterrupts(void)
667 {
668 __enable();
669 }
670
671
672 IFX_INLINE void IfxCpu_enableSegmentSpecificDataAccessCacheability(uint16 segmentNumberMask, boolean enable)
673 {
674 uint32 cpu_pmaVal;
675 uint16 checkRestrictionMask;
676 uint32 coreIndex = IfxCpu_getCoreIndex();
677 uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[coreIndex]);
678
679 /*resolve the restrictions*/
680 /*In PMA0 Segment-C and Segment[7-CoreID] must have the same value */
681 checkRestrictionMask = ((uint16)1 << (7 - coreIndex)) | ((uint16)1 << 0xC);
682
683 if ((segmentNumberMask & checkRestrictionMask) != 0)
684 {
685 segmentNumberMask |= checkRestrictionMask;
686 }
687
688 cpu_pmaVal = __mfcr(CPU_PMA0); /* Read the CPU_PMA0 */
689
690 cpu_pmaVal = enable ? (cpu_pmaVal | segmentNumberMask) : (cpu_pmaVal & ~segmentNumberMask); /* enable or disable the corresponding bitfield */
691
692 /*The CPU_PMA registers are ENDINIT protected*/
693 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
694 /*When changing the value of the CPU_PMAx registers both the instruction and data caches should be invalidated*/
695 /*Write to PMA0 register for selecting the cacheability for data cache*/
696 __dsync(); /* DSYNC instruction should be executed immediately prior to the MTCR*/
697 __mtcr(CPU_PMA0, cpu_pmaVal);
698 __isync(); /* ISYNC instruction executed immediately following MTCR */
699 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
700 }
701
702
703 IFX_INLINE void IfxCpu_enableSegmentSpecificInstructionAccessCacheability(uint16 segmentNumberMask, boolean enable)
704 {
705 uint32 cpu_pmaVal;
706 uint16 checkRestrictionMask;
707 uint32 coreIndex = IfxCpu_getCoreIndex();
708 uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[coreIndex]);
709
710 /*resolve the restrictions*/
711 /*In PMA1 Segment-D and Segment[7-CoreID] must have the same value */
712 checkRestrictionMask = ((uint16)1 << (7 - coreIndex)) | ((uint16)1 << 0xD);
713
714 if ((segmentNumberMask & checkRestrictionMask) != 0)
715 {
716 segmentNumberMask |= checkRestrictionMask;
717 }
718
719 cpu_pmaVal = __mfcr(CPU_PMA1); /* Read the CPU_PMA1 */
720
721 cpu_pmaVal = enable ? (cpu_pmaVal | segmentNumberMask) : (cpu_pmaVal & ~segmentNumberMask); /* enable or disable the corresponding bitfield */
722
723 /*The CPU_PMA registers are ENDINIT protected*/
724 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
725 /*When changing the value of the CPU_PMAx registers both the instruction and data caches should be invalidated*/
726 /*Write to PMA1 register for selecting the cacheability for data cache*/
727 __dsync(); /* DSYNC instruction should be executed immediately prior to the MTCR */
728 __mtcr(CPU_PMA1, cpu_pmaVal);
729 __isync(); /* ISYNC instruction executed immediately following MTCR */
730 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
731 }
732
733
734 IFX_INLINE void IfxCpu_forceDisableInterrupts(void)
735 {
736 __disable();
737 __nop();
738 }
739
740
741 IFX_INLINE Ifx_CPU *IfxCpu_getAddress(IfxCpu_ResourceCpu cpu)
742 {
743 Ifx_CPU *module;
744
745 if (cpu < IfxCpu_ResourceCpu_none)
746 {
747 module = (Ifx_CPU *)IfxCpu_cfg_indexMap[cpu].module;
748 }
749 else
750 {
751 module = NULL_PTR;
752 }
753
754 return module;
755 }
756
757
758 IFX_INLINE uint32 IfxCpu_getClockCounter(void)
759 {
760 return IfxCpu_getPerformanceCounter(CPU_CCNT);
761 }
762
763
764 IFX_INLINE boolean IfxCpu_getClockCounterStickyOverflow(void)
765 {
766 return IfxCpu_getPerformanceCounterStickyOverflow(CPU_CCNT);
767 }
768
769
770 IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
771 {
772 Ifx_CPU_CORE_ID reg;
773 reg.U = __mfcr(CPU_CORE_ID);
774 return (IfxCpu_Id)reg.B.CORE_ID;
775 }
776
777
778 IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
779 {
780 Ifx_CPU_CORE_ID reg;
781 reg.U = __mfcr(CPU_CORE_ID);
782 return (IfxCpu_ResourceCpu)reg.B.CORE_ID;
783 }
784
785
786 IFX_INLINE uint32 IfxCpu_getInstructionCounter(void)
787 {
788 return IfxCpu_getPerformanceCounter(CPU_ICNT);
789 }
790
791
792 IFX_INLINE boolean IfxCpu_getInstructionCounterStickyOverflow(void)
793 {
794 return IfxCpu_getPerformanceCounterStickyOverflow(CPU_ICNT);
795 }
796
797
798 IFX_INLINE uint32 IfxCpu_getPerformanceCounter(uint16 address)
799 {
800 Ifx_CPU_CCNT ccnt;
801
802 if (address == CPU_CCNT)
803 {
804 ccnt.U = __mfcr(CPU_CCNT);
805 }
806 else if (address == CPU_ICNT)
807 {
808 ccnt.U = __mfcr(CPU_ICNT);
809 }
810 else if (address == CPU_M1CNT)
811 {
812 ccnt.U = __mfcr(CPU_M1CNT);
813 }
814 else if (address == CPU_M2CNT)
815 {
816 ccnt.U = __mfcr(CPU_M2CNT);
817 }
818 else if (address == CPU_M3CNT)
819 {
820 ccnt.U = __mfcr(CPU_M3CNT);
821 }
822
823 return ccnt.B.CountValue;
824 }
825
826
827 IFX_INLINE boolean IfxCpu_getPerformanceCounterStickyOverflow(uint16 address)
828 {
829 Ifx_CPU_CCNT ccnt;
830
831 if (address == CPU_CCNT)
832 {
833 ccnt.U = __mfcr(CPU_CCNT);
834 }
835 else if (address == CPU_ICNT)
836 {
837 ccnt.U = __mfcr(CPU_ICNT);
838 }
839 else if (address == CPU_M1CNT)
840 {
841 ccnt.U = __mfcr(CPU_M1CNT);
842 }
843 else if (address == CPU_M2CNT)
844 {
845 ccnt.U = __mfcr(CPU_M2CNT);
846 }
847 else if (address == CPU_M3CNT)
848 {
849 ccnt.U = __mfcr(CPU_M3CNT);
850 }
851
852 return ccnt.B.SOvf;
853 }
854
855
856 IFX_INLINE void IfxCpu_initCSA(uint32 *csaBegin, uint32 *csaEnd)
857 {
858 uint32 k;
859 uint32 nxt_cxi_val = 0;
860 uint32 *prvCsa = 0U;
861 uint32 *nxtCsa = csaBegin;
862 uint32 numOfCsa = (((uint32)csaEnd - (uint32)csaBegin) / 64U);
863
864 for (k = 0; k < numOfCsa; k++)
865 {
866 nxt_cxi_val = ((uint32)nxtCsa & (0XFU << 28)) >> 12 | ((uint32)nxtCsa & (0XFFFFU << 6)) >> 6;
867
868 if (k == 0)
869 {
870 __mtcr(CPU_FCX, nxt_cxi_val); /* store the new pcxi value to LCX */
871 }
872 else
873 {
874 *prvCsa = nxt_cxi_val; /* Store null pointer in last CSA (= very first time!) */
875 }
876
877 if (k == (numOfCsa - 3U))
878 {
879 __mtcr(CPU_LCX, nxt_cxi_val); /* Last but 2 context save area is pointed in LCX to know if there is CSA depletion */
880 }
881
882 prvCsa = (uint32 *)nxtCsa;
883 nxtCsa += 16; /* next CSA */
884 }
885
886 *prvCsa = 0;
887 }
888
889
890 IFX_INLINE void IfxCpu_invalidateProgramCache(void)
891 {
892 uint16 cpuWdtPassword = IfxScuWdt_getCpuWatchdogPassword();
893 {
894 IfxScuWdt_clearCpuEndinit(cpuWdtPassword);
895 Ifx_CPU_PCON1 pcon1;
896 pcon1.U = __mfcr(CPU_PCON1);
897 pcon1.B.PCINV = 1;
898 __mtcr(CPU_PCON1, pcon1.U);
899 IfxScuWdt_setCpuEndinit(cpuWdtPassword);
900 }
901 }
902
903
904 IFX_INLINE boolean IfxCpu_isAddressCachable(void *address)
905 {
906 uint8 segment = (uint32)address >> 24;
907 return ((segment == IFXCPU_CACHABLE_FLASH_SEGMENT) || (segment == IFXCPU_CACHABLE_LMU_SEGMENT)) ? TRUE : FALSE;
908 }
909
910
911 IFX_INLINE void IfxCpu_resetAndStartCounters(IfxCpu_CounterMode mode)
912 {
913 Ifx_CPU_CCTRL cctrl;
914 cctrl.U = __mfcr(CPU_CCTRL);
915 /*Disable the counters */
916 cctrl.B.CE = 0;
917 __mtcr(CPU_CCTRL, cctrl.U);
918
919 /* reset the counters */
920 __mtcr(CPU_CCNT, 0);
921 __mtcr(CPU_ICNT, 0);
922 __mtcr(CPU_M1CNT, 0);
923 __mtcr(CPU_M2CNT, 0);
924 __mtcr(CPU_M3CNT, 0);
925
926 /*Enable the counters, set the counter mode */
927 cctrl.B.CE = 1;
928 cctrl.B.CM = mode;
929 __mtcr(CPU_CCTRL, cctrl.U);
930 }
931
932
933 IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
934 {
935 if (enabled != FALSE)
936 {
937 __enable();
938 }
939 }
940
941
942 IFX_INLINE void IfxCpu_setDataCache(boolean enable)
943 {
944 uint32 coreIndex = IfxCpu_getCoreIndex();
945 uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[coreIndex]);
946 /*PCACHE enable steps */
947 { /* Step 1: Set PCBYP to 0 if cache is enabled */
948 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
949 Ifx_CPU_DCON0 dcon0;
950 dcon0.U = 0;
951 dcon0.B.DCBYP = enable ? 0 : 1; /*depending on the enable bypas bit is reset/set */
952 __mtcr(CPU_DCON0, dcon0.U);
953 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
954 }
955 /* Step 2: Call Isync */
956 __isync();
957 }
958
959
960 IFX_INLINE void IfxCpu_setPerformanceCountersEnableBit(uint32 enable)
961 {
962 Ifx_CPU_CCTRL cctrl;
963 cctrl.U = __mfcr(CPU_CCTRL);
964 cctrl.B.CE = enable;
965 __mtcr(CPU_CCTRL, cctrl.U);
966 }
967
968
969 IFX_INLINE void IfxCpu_setProgramCache(boolean enable)
970 {
971 if (enable)
972 { /* Step 3: Initiate invalidation of current cache contents if any */
973 Ifx_CPU_PCON1 pcon1;
974 pcon1.U = 0;
975 pcon1.B.PCINV = 1;
976 __mtcr(CPU_PCON1, pcon1.U);
977 }
978
979 uint32 coreIndex = IfxCpu_getCoreIndex();
980 uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[coreIndex]);
981 /*PCACHE enable steps */
982 { /* Step 1: Set PCBYP to 0 if cache is enabled */
983 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
984 Ifx_CPU_PCON0 pcon0;
985 pcon0.U = 0;
986 pcon0.B.PCBYP = enable ? 0 : 1; /*depending on the enable bypass bit is reset/set */
987 __mtcr(CPU_PCON0, pcon0.U);
988 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
989 }
990 /* Step 2: Call Isync */
991 __isync();
992 }
993
994
995 IFX_INLINE void IfxCpu_setSafetyTaskIdentifier(boolean safetyId)
996 {
997 Ifx_CPU_PSW psw;
998 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (safetyId == 0 || safetyId == 1));
999 psw.U = __mfcr(CPU_PSW);
1000 psw.B.S = safetyId;
1001 __mtcr(CPU_PSW, (uint32)psw.U);
1002 }
1003
1004
1005 #if !((defined(__cplusplus)) && (defined(__TASKING__)))
1006 IFX_INLINE IfxCpu_Perf IfxCpu_stopCounters(void)
1007 {
1008 IfxCpu_Perf result;
1009 /*Disable the counters, reset the control reg */
1010 /* Use inline assembly to ensure constant implementation, and execution of the measurement routines */
1011 __stopPerfCounters();
1012
1013 Ifx_CPU_CCNT ccnt;
1014 ccnt.U = __mfcr(CPU_CCNT);
1015 result.clock.counter = ccnt.B.CountValue;
1016 result.clock.overlfow = ccnt.B.SOvf;
1017
1018 Ifx_CPU_ICNT icnt;
1019 icnt.U = __mfcr(CPU_ICNT);
1020 result.instruction.counter = icnt.B.CountValue;
1021 result.instruction.overlfow = icnt.B.SOvf;
1022
1023 Ifx_CPU_M1CNT m1cnt;
1024 m1cnt.U = __mfcr(CPU_M1CNT);
1025 result.counter1.counter = m1cnt.B.CountValue;
1026 result.counter1.overlfow = m1cnt.B.SOvf;
1027
1028 Ifx_CPU_M2CNT m2cnt;
1029 m2cnt.U = __mfcr(CPU_M2CNT);
1030 result.counter2.counter = m2cnt.B.CountValue;
1031 result.counter2.overlfow = m2cnt.B.SOvf;
1032
1033 Ifx_CPU_M3CNT m3cnt;
1034 m3cnt.U = __mfcr(CPU_M3CNT);
1035 result.counter3.counter = m3cnt.B.CountValue;
1036 result.counter3.overlfow = m3cnt.B.SOvf;
1037
1038 return result;
1039 }
1040 #endif
1041
1042
1043 IFX_INLINE void IfxCpu_triggerSwReset(void)
1044 {
1045 MODULE_SCU.SWRSTCON.B.SWRSTREQ = 1;
1046
1047 /* Wait till reset */
1048 while (1)
1049 {}
1050 }
1051
1052
1053 IFX_INLINE void IfxCpu_updateClockCounter(uint32 count)
1054 {
1055 IfxCpu_updatePerformanceCounter(CPU_CCNT, count);
1056 }
1057
1058
1059 IFX_INLINE void IfxCpu_updateInstructionCounter(uint32 count)
1060 {
1061 IfxCpu_updatePerformanceCounter(CPU_ICNT, count);
1062 }
1063
1064
1065 IFX_INLINE void IfxCpu_updatePerformanceCounter(uint32 address, uint32 count)
1066 {
1067 IFX_UNUSED_PARAMETER(address);
1068 Ifx_CPU_CCTRL cctrl;
1069 boolean enableBit;
1070 /*Disable the counters */
1071 cctrl.U = __mfcr(CPU_CCTRL);
1072 enableBit = cctrl.B.CE;
1073 cctrl.B.CE = 0;
1074 __mtcr(CPU_CCTRL, cctrl.U);
1075
1076 /*Update the counter value */
1077 count &= ~(1U << 31); /*clear sticky overflow bit if set */
1078 __mtcr(address, count);
1079
1080 /*restore the enable bit */
1081 cctrl.B.CE = enableBit;
1082 __mtcr(CPU_CCTRL, cctrl.U);
1083 }
1084
1085
1086 #endif /* IFXCPU_H */
__mtcr
void __mtcr(const uint32, sint32) __attribute__((intrinsic_function(0x102
__disable
void __disable(void) __attribute__((intrinsic_function(0x103
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxCpu_getAddress
IFX_INLINE Ifx_CPU * IfxCpu_getAddress(IfxCpu_ResourceCpu cpu)
API to get the address for CPU HW module register memory map.
Definition: IfxCpu.h:741
IfxCpu_setCoreMode
IFX_EXTERN boolean IfxCpu_setCoreMode(Ifx_CPU *cpu, IfxCpu_CoreMode mode)
API to set mode of the CPU.
Definition: IfxCpu.c:223
IfxCpu_initCSA
IFX_INLINE void IfxCpu_initCSA(uint32 *csaBegin, uint32 *csaEnd)
API to initialize the context save area of the CPU where this is called.
Definition: IfxCpu.h:856
IfxCpu_getRandomValueWithinRange
IFX_EXTERN uint32 IfxCpu_getRandomValueWithinRange(uint32 *seed, uint32 min, uint32 max)
API to get random value with in the range.
Definition: IfxCpu.c:186
IfxCpu_acquireMutex
IFX_EXTERN boolean IfxCpu_acquireMutex(IfxCpu_mutexLock *lock)
API to acquire the mutex (binary semaphore).
Definition: IfxCpu.c:53
IfxCpu_CoreMode_idle
Definition: IfxCpu.h:133
IfxCpu_emitEvent
IFX_EXTERN void IfxCpu_emitEvent(IfxCpu_syncEvent *event)
This function sets a bit corresponding to the core in the event.
Definition: IfxCpu.c:356
__mfcr
sint32 __mfcr(const uint32) __attribute__((intrinsic_function(0x101
IfxCpu_ResourceCpu_none
None of the CPU.
Definition: IfxCpu_cfg.h:157
IfxCpu_stopCounters
IFX_INLINE IfxCpu_Perf IfxCpu_stopCounters(void)
Stop instruction and clock counters, return their values.
Definition: IfxCpu.h:1006
IfxCpu_getClockCounter
IFX_INLINE uint32 IfxCpu_getClockCounter(void)
API to read the clock counter for the CPU which calls this API.
Definition: IfxCpu.h:758
IfxCpu_syncEvent
unsigned int IfxCpu_syncEvent
Event used for synchronisation.
Definition: IfxCpu.h:119
IfxScuWdt_clearCpuEndinitInline
IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:434
IfxCpu_Perf
Performance counter result.
Definition: IfxCpu.h:169
IfxScuWdt_getCpuWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.h:480
IfxCpu_getInstructionCounterStickyOverflow
IFX_INLINE boolean IfxCpu_getInstructionCounterStickyOverflow(void)
API to get sticky overflow bit of Instruction counter for the CPU, which calls this API...
Definition: IfxCpu.h:792
IfxCpu_getPerformanceCounterStickyOverflow
IFX_INLINE boolean IfxCpu_getPerformanceCounterStickyOverflow(uint16 address)
API to get sticky overflow bit of performance counter for the CPU, which calls this API...
Definition: IfxCpu.h:827
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCpu_enableInterrupts
IFX_INLINE void IfxCpu_enableInterrupts(void)
API to enable global interrupt. This API simply enables the global interrupt.
Definition: IfxCpu.h:666
IfxCpu_setProgramCache
IFX_INLINE void IfxCpu_setProgramCache(boolean enable)
API to enable or bypass the program cache for the CPU which calls this API.
Definition: IfxCpu.h:969
IfxCpu_setDataCache
IFX_INLINE void IfxCpu_setDataCache(boolean enable)
API to enable or bypass the data cache for the CPU which calls this API.
Definition: IfxCpu.h:942
Ifx_Assert.h
Assert functions.
IfxCpu_CoreMode
IfxCpu_CoreMode
Enumeration for the Cpu mode.
Definition: IfxCpu.h:129
IfxCpu_updateClockCounter
IFX_INLINE void IfxCpu_updateClockCounter(uint32 count)
API to update clock counter for the CPU which calls this API.
Definition: IfxCpu.h:1053
IfxCpu_waitEvent
IFX_EXTERN boolean IfxCpu_waitEvent(IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation.
Definition: IfxCpu.c:325
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
__isync
void __isync(void) __attribute__((intrinsic_function(0x103
IfxCpu_getRandomValue
IFX_EXTERN uint32 IfxCpu_getRandomValue(uint32 *seed)
API to get random value.
Definition: IfxCpu.c:147
IfxCpu_Perf::instruction
IfxCpu_Counter instruction
Instruction counter.
Definition: IfxCpu.h:171
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:933
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxCpu_Perf::counter2
IfxCpu_Counter counter2
Multi counter 2.
Definition: IfxCpu.h:174
FALSE
#define FALSE
Definition: Platform_Types.h:93
__stopPerfCounters
#define __stopPerfCounters
Definition: IfxCpu_IntrinsicsDcc.h:2097
IfxCpu_Perf::clock
IfxCpu_Counter clock
CPU clock counter.
Definition: IfxCpu.h:172
IfxCpu_CoreMode_sleep
Definition: IfxCpu.h:134
IfxCpu_enableSegmentSpecificDataAccessCacheability
IFX_INLINE void IfxCpu_enableSegmentSpecificDataAccessCacheability(uint16 segmentNumberMask, boolean enable)
API to enable/ disable the data cacheability for selected segments With this API cacheability for one...
Definition: IfxCpu.h:672
IfxCpu_releaseMutex
IFX_EXTERN void IfxCpu_releaseMutex(IfxCpu_mutexLock *lock)
API to unlock the mutex .
Definition: IfxCpu.c:209
IfxScuWdt.h
SCU basic functionality.
IfxCpu_invalidateProgramCache
IFX_INLINE void IfxCpu_invalidateProgramCache(void)
API to invalidate the program cache.
Definition: IfxCpu.h:890
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:153
IfxCpu_Id
IfxCpu_Id
List of the available CPU ids.
Definition: IfxCpu_cfg.h:124
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCpu_CoreMode_stby
Definition: IfxCpu.h:135
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:656
IfxCpu_setSafetyTaskIdentifier
IFX_INLINE void IfxCpu_setSafetyTaskIdentifier(boolean safetyId)
Set/Clear safety task identifier (PSW.S) on current CPU.
Definition: IfxCpu.h:995
max
sint32 max
Definition: IfxCpu_IntrinsicsDcc.h:149
IfxScu_cfg.h
SCU on-chip implementation data.
IfxCpu_enableSegmentSpecificInstructionAccessCacheability
IFX_INLINE void IfxCpu_enableSegmentSpecificInstructionAccessCacheability(uint16 segmentNumberMask, boolean enable)
API to enable/ disable the instruction cacheability for selected segments With this API cacheability ...
Definition: IfxCpu.h:703
IfxCpu_getClockCounterStickyOverflow
IFX_INLINE boolean IfxCpu_getClockCounterStickyOverflow(void)
API to get sticky overflow bit of clock counter for the CPU, which calls this API.
Definition: IfxCpu.h:764
IfxCpu_getIndex
IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU *cpu)
API to get current mode of CPU.
Definition: IfxCpu.c:128
IfxCpu_mutexLock
unsigned int IfxCpu_mutexLock
Lock type Mutex lock.
Definition: IfxCpu.h:115
IFXCPU_CACHABLE_LMU_SEGMENT
#define IFXCPU_CACHABLE_LMU_SEGMENT
Segment number of cachable LMU region.
Definition: IfxCpu_cfg.h:73
IfxCpu_triggerSwReset
IFX_INLINE void IfxCpu_triggerSwReset(void)
Triggers Software Reset.
Definition: IfxCpu.h:1043
IfxCpu_setPerformanceCountersEnableBit
IFX_INLINE void IfxCpu_setPerformanceCountersEnableBit(uint32 enable)
API to enable or disable performance counter for the CPU which calls this API.
Definition: IfxCpu.h:960
IfxCpu_spinLock
unsigned int IfxCpu_spinLock
Lock type Spin lock.
Definition: IfxCpu.h:111
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
IfxCpu_isAddressCachable
IFX_INLINE boolean IfxCpu_isAddressCachable(void *address)
API to determine if an address is in a cachable or non-cachable Flash/LMU section.
Definition: IfxCpu.h:904
IfxCpu_CounterMode_task
Normal counter mode:additional gating control from the debug unit which allows the data gathered in t...
Definition: IfxCpu.h:144
IfxCpu_getCoreMode
IFX_EXTERN IfxCpu_CoreMode IfxCpu_getCoreMode(Ifx_CPU *cpu)
API to get current mode of CPU.
Definition: IfxCpu.c:74
IfxCpu_startCore
IFX_EXTERN boolean IfxCpu_startCore(Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified and start the CPU.
Definition: IfxCpu.c:307
IfxCpu_resetAndStartCounters
IFX_INLINE void IfxCpu_resetAndStartCounters(IfxCpu_CounterMode mode)
Reset and start instruction, clock and multi counters.
Definition: IfxCpu.h:911
IfxCpu_Perf::counter1
IfxCpu_Counter counter1
Multi counter 1.
Definition: IfxCpu.h:173
IfxCpu_Counter
counter
Definition: IfxCpu.h:157
IfxScuWdt_setCpuEndinitInline
IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:521
IfxCpu_getInstructionCounter
IFX_INLINE uint32 IfxCpu_getInstructionCounter(void)
API to read the instruction counter for the CPU which calls this API.
Definition: IfxCpu.h:786
uint16
unsigned short uint16
Definition: Platform_Types.h:112
__enable
void __enable(void) __attribute__((intrinsic_function(0x103
IfxCpu_setSpinLock
IFX_EXTERN boolean IfxCpu_setSpinLock(IfxCpu_spinLock *lock, uint32 timeoutCount)
API to lock the resource in spin mode with the given timeout.
Definition: IfxCpu.c:279
IfxCpu_Perf::counter3
IfxCpu_Counter counter3
Multi counter 3.
Definition: IfxCpu.h:175
IfxCpu_Counter::counter
uint32 counter
Counter value.
Definition: IfxCpu.h:159
IfxCpu_CoreMode_unknown
Definition: IfxCpu.h:136
IfxScuCcu.h
SCU basic functionality.
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxCpu_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]
Definition: IfxCpu_cfg.c:52
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxCpu_getCoreIndex
IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed...
Definition: IfxCpu.h:778
IfxCpu_areInterruptsEnabled
IFX_INLINE boolean IfxCpu_areInterruptsEnabled(void)
API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API p...
Definition: IfxCpu.h:648
min
sint32 min
Definition: IfxCpu_IntrinsicsDcc.h:131
IfxCpu_updateInstructionCounter
IFX_INLINE void IfxCpu_updateInstructionCounter(uint32 count)
API to update Instruction counter for the CPU which calls this API.
Definition: IfxCpu.h:1059
IfxCpu_getCoreId
IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu&#39;s may not be continguous and...
Definition: IfxCpu.h:770
IFXCPU_CACHABLE_FLASH_SEGMENT
#define IFXCPU_CACHABLE_FLASH_SEGMENT
Segment number of cachable flash region.
Definition: IfxCpu_cfg.h:69
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxCpu_CounterMode_normal
Normal counter mode:the counter increments on their respective triggers.
Definition: IfxCpu.h:143
IfxCpu_CoreMode_run
Definition: IfxCpu.h:132
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxCpu_setProgramCounter
IFX_EXTERN boolean IfxCpu_setProgramCounter(Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified.
Definition: IfxCpu.c:262
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxCpu_cfg.h
CPU on-chip implementation data.
IfxCpu_CoreMode_halt
Definition: IfxCpu.h:131
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCpu_Counter::overlfow
boolean overlfow
sticky overlfow
Definition: IfxCpu.h:160
IfxCpu_CounterMode
IfxCpu_CounterMode
Performance conunter modes.
Definition: IfxCpu.h:141
IfxCpu_updatePerformanceCounter
IFX_INLINE void IfxCpu_updatePerformanceCounter(uint32 address, uint32 count)
API to update performance counter for the CPU which calls this API. This is generic function to updat...
Definition: IfxCpu.h:1065
IfxCpu_resetSpinLock
IFX_EXTERN void IfxCpu_resetSpinLock(IfxCpu_spinLock *lock)
API to unlock the resource .
Definition: IfxCpu.c:216
IfxCpu_forceDisableInterrupts
IFX_INLINE void IfxCpu_forceDisableInterrupts(void)
Disable the Global Interrupt.
Definition: IfxCpu.h:734
IfxCpu_getPerformanceCounter
IFX_INLINE uint32 IfxCpu_getPerformanceCounter(uint16 address)
API to read the performance counter for the CPU which calls this API.
Definition: IfxCpu.h:798


iLLD_TC26B: IfxCpu_CStart0.c Source File

  • Cpu
  • CStart
IfxCpu_CStart0.c
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Cstart0.c
3 * \brief This file contains the Core startup sequence for Cpu0.
4 * \version iLLD_1_0_1_12_0
5 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41 /*******************************************************************************
42 ** Includes **
43 *******************************************************************************/
44 #include "Ifx_Cfg.h"
45 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
46 #include "Scu/Std/IfxScuWdt.h"
47 #include "Scu/Std/IfxScuCcu.h"
48 #include "Cpu/Std/IfxCpu.h"
49 #include "Cpu/CStart/IfxCpu_CStart.h"
50 #include "IfxScu_reg.h"
51 #include "IfxCpu_reg.h"
52
53 /******************************************************************************/
54 /* Macros */
55 /******************************************************************************/
56 /** \brief Configuration for CpuX enable.
57 *
58 */
59 #ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE0
60 # define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 (1) /**< Cpu0 enabled by default*/
61 #endif
62 #ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE1
63 # define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 (1) /**< Cpu1 enabled by default*/
64 #endif
65
66 /** \brief Configuration for cache enable.
67 *
68 */
69 #ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE
70 # define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE (1) /**< Program Cache enabled by default*/
71 #endif
72 #ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE
73 # define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE (1) /**< Data Cache enabled by default*/
74 #endif
75
76 #ifndef IFXCPU_CSTART_CCU_INIT_HOOK
77 #define IFXCPU_CSTART_CCU_INIT_HOOK() (void)IfxScuCcu_init(&IfxScuCcu_defaultClockConfig); /*The status returned by Ccu init is ignored */
78 #endif
79
80 /*******************************************************************************
81 ** Imported Function Declarations **
82 *******************************************************************************/
83 IFXCOMPILER_COMMON_LINKER_SYMBOLS()
84 IFXCOMPILER_CORE_LINKER_SYMBOLS(0)
85
86 IFX_EXTERN void core0_main(void);
87 #if defined(__TASKING__)
88 __asm("\t .extern core0_main");
89 #endif
90
91 /*******************************************************************************
92 ** Private Constant Definitions **
93 *******************************************************************************/
94 #define IFXCSTART0_PSW_DEFAULT (0x00000980u)
95 #define IFXCSTART0_PCX_O_S_DEFAULT (0xfff00000u)
96
97 /*********************************************************************************
98 * _start() - startup code
99 *********************************************************************************/
100 #if defined(__HIGHTEC__)
101 #pragma GCC optimize ("-O2")
102 #endif
103
104 void _Core0_start(void)
105 {
106 uint32 pcxi;
107 uint16 cpuWdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[0]);
108
109 IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(0); /*Test Stack, CSA and Cache */
110
111 /* Load user stack pointer */
112 __setareg(sp, __USTACK(0));
113 __dsync();
114
115 /* Set the PSW to its reset value in case of a warm start,clear PSW.IS */
116 __mtcr(CPU_PSW, IFXCSTART0_PSW_DEFAULT);
117
118 /* Set the PCXS and PCXO to its reset value in case of a warm start */
119 pcxi = __mfcr(CPU_PCXI);
120 pcxi &= IFXCSTART0_PCX_O_S_DEFAULT; /*0xfff00000; */
121 __mtcr(CPU_PCXI, pcxi);
122
123 /*enable/disable program cache depending on the configuration */
124 IfxCpu_setProgramCache(IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE);
125
126 /*enable/disable data cache depending on the configuration */
127 IfxCpu_setDataCache(IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE);
128
129 /* Clear the ENDINIT bit in the WDT_CON0 register, inline funtion */
130 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[0], cpuWdtPassword);
131
132 /* Load Base Address of Trap Vector Table. */
133 __mtcr(CPU_BTV, (uint32)__TRAPTAB(0));
134
135 /* Load Base Address of Interrupt Vector Table. we will do this later in the program */
136 __mtcr(CPU_BIV, (uint32)__INTTAB(0));
137
138 /* Load interupt stack pointer. */
139 __mtcr(CPU_ISP, (uint32)__ISTACK(0));
140
141 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[0], cpuWdtPassword);
142
143 /* initialize SDA base pointers */
144 __setareg(a0, __SDATA1(0));
145 __setareg(a1, __SDATA2(0));
146
147 /* These to be un commented if A8 and A9 are required to be initialized */
148 __setareg(a8, __SDATA3(0));
149 __setareg(a9, __SDATA4(0));
150 /* Setup the context save area linked list. */
151
152 IfxCpu_initCSA((uint32 *)__CSA(0), (uint32 *)__CSA_END(0)); /*Initialize the context save area for CPU0 */
153
154 {
155 /*CPU and safety watchdogs are enabled by default, C initialization functions are not servicing the watchdogs */
156 uint16 safetyWdtPassword = IfxScuWdt_getSafetyWatchdogPassword();
157 IfxScuWdt_disableCpuWatchdog(cpuWdtPassword);
158 IfxScuWdt_disableSafetyWatchdog(safetyWdtPassword);
159
160 Ifx_C_Init(); /*Initialization of C runtime variables */
161
162 IfxScuWdt_enableCpuWatchdog(cpuWdtPassword);
163 IfxScuWdt_enableSafetyWatchdog(safetyWdtPassword);
164 }
165
166 /*Initialize the clock system */
167 IFXCPU_CSTART_CCU_INIT_HOOK();
168
169 /*Start remaining cores */
170 #if (IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 != 0)
171 (void)IfxCpu_startCore(&MODULE_CPU1, (uint32)&_Core1_start); /*The status returned by function call is ignored */
172 #endif
173
174 #if (IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 == 0)
175 IfxScuWdt_disableCpuWatchdog(cpuWdtPassword);
176 /*halt the CPU 0 if it is not needed to be enabled */
177 IfxCpu_setCoreMode(&MODULE_CPU0, IfxCpu_CoreMode_idle);
178 #endif
179
180 /*Call main function of Cpu0 */
181 __non_return_call(core0_main);
182 }
183
184 #if defined(__HIGHTEC__)
185 #pragma GCC reset_options
186 #endif
187 /******************************************************************************
188 * reset vector address, user section to inform linker to locate the code at 0x8000 0020
189 *****************************************************************************/
190 #if defined(__HIGHTEC__)
191 #pragma section
192 #pragma section ".start" x
193 #endif
194 #if defined(__TASKING__)
195 #pragma protect on
196 #pragma section code "start"
197 #endif
198 #if defined(__DCC__)
199 #pragma section CODE ".start" X
200 #endif
201
202 void _START(void)
203 {
204 __non_return_call(_Core0_start);
205 }
206
207
208 /* reset the sections defined above, to normal region */
209 #if defined(__HIGHTEC__)
210 #pragma section
211 #endif
212 #if defined(__TASKING__)
213 #pragma protect restore
214 #pragma section code restore
215 #endif
216 #if defined(__DCC__)
217 #pragma section CODE
218 #endif
219
220 /*******************************************************************************
221 ** Boot Mode Headers **
222 *******************************************************************************/
223 /*Boot Mode Header 0 sections to inform linker to locate them at 0x8000 0000 */
224 #ifndef IFX_CFG_CPUCSTART_BMHD_NOT_NEEDED
225
226 #if defined(__HIGHTEC__)
227 #pragma section
228 #pragma section ".bmhd_0" a
229 #endif
230 #if defined(__TASKING__)
231 #pragma protect on
232 #pragma section farrom "bmhd_0"
233 #endif
234 #if defined(__DCC__)
235 #pragma section CONST ".bmhd_0" R
236 #endif
237 /** \brief Boot Mode Header 0
238 * Boot mode header at memory location 0c8000 0000.
239 */
240 const uint32 BootModeHeader_0[] = {
241 0x00000000u, /* STADBM first user code at 0x8000 0020h */
242 0xb3590070u, /* BMI = 0070h BMHDID = B359h */
243 0x00000000u, /* ChkStart */
244 0x00000000u, /* ChkEnd */
245 0x00000000u, /* CRCrange */
246 0x00000000u, /* !CRCrange */
247 0x791eb864u, /* CRChead */
248 0x86e1479bu /* !CRChead */
249 };
250
251 /*reset the sections defined above */
252 #if defined(__HIGHTEC__)
253 #pragma section
254 #endif
255 #if defined(__TASKING__)
256 #pragma protect restore
257 #pragma section farrom restore
258 #endif
259 #if defined(__DCC__)
260 #pragma section CONST
261 #endif
262
263 #ifndef IFX_CFG_CPUCSTART_BMI01_NOT_NEEDED
264 /*Boot Mode Header 1 sections to inform linker to locate them at 0x8002 0000 */
265 #if defined(__HIGHTEC__)
266 #pragma section
267 #pragma section ".bmhd_1" a
268 #endif
269 #if defined(__TASKING__)
270 #pragma protect on
271 #pragma section farrom "bmhd_1"
272 #endif
273 #if defined(__DCC__)
274 #pragma section CONST ".bmhd_1" R
275 #endif
276
277 /** \brief Boot Mode Header 1
278 * Boot mode header at memory location 0c8002 0000.
279 */
280 const uint32 BootModeHeader_1[] = {
281 0x00000000u, /* STADBM first user code at 0x8000 0020h */
282 0xB3590070u, /* BMI = 0070h BMHDID = B359h */
283 0x00000000u, /* ChkStart */
284 0x00000000u, /* ChkEnd */
285 0x00000000u, /* CRCrange */
286 0x00000000u, /* !CRCrange */
287 0x791eb864u, /* CRChead */
288 0x86e1479bu /* !CRChead */
289 };
290
291 /*reset the sections defined above */
292 #if defined(__HIGHTEC__)
293 #pragma section
294 #endif
295 #if defined(__TASKING__)
296 #pragma protect restore
297 #pragma section farrom restore
298 #endif
299 #if defined(__DCC__)
300 #pragma section CONST
301 #endif
302 #endif /*IFX_CFG_CPUCSTART_BMI01_NOT_NEEDED*/
303
304 #endif /*IFX_CFG_CPUCSTART_BMHD_NOT_NEEDED*/
305
306 #endif /*#ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER */
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerDcc.h:71
__mtcr
void __mtcr(const uint32, sint32) __attribute__((intrinsic_function(0x102
IfxCpu_CStart.h
This file contains the Core startup sequence.
IfxCpu_setCoreMode
boolean IfxCpu_setCoreMode(Ifx_CPU *cpu, IfxCpu_CoreMode mode)
API to set mode of the CPU.
Definition: IfxCpu.c:223
IfxCpu_initCSA
IFX_INLINE void IfxCpu_initCSA(uint32 *csaBegin, uint32 *csaEnd)
API to initialize the context save area of the CPU where this is called.
Definition: IfxCpu.h:856
IfxCpu_CoreMode_idle
Definition: IfxCpu.h:133
__SDATA3
#define __SDATA3(cpu)
Definition: CompilerDcc.h:92
__mfcr
sint32 __mfcr(const uint32) __attribute__((intrinsic_function(0x101
IfxScuWdt_clearCpuEndinitInline
IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:434
IfxScuWdt_getCpuWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.h:480
__SDATA2
#define __SDATA2(cpu)
Definition: CompilerDcc.h:91
uint32
unsigned long uint32
Definition: Platform_Types.h:116
__CSA
#define __CSA(cpu)
Definition: CompilerDcc.h:74
_Core0_start
void _Core0_start(void)
Definition: IfxCpu_CStart0.c:104
IfxCpu_setProgramCache
IFX_INLINE void IfxCpu_setProgramCache(boolean enable)
API to enable or bypass the program cache for the CPU which calls this API.
Definition: IfxCpu.h:969
BootModeHeader_0
const uint32 BootModeHeader_0[]
Boot Mode Header 0 Boot mode header at memory location 0c8000 0000.
Definition: IfxCpu_CStart0.c:240
IfxCpu_setDataCache
IFX_INLINE void IfxCpu_setDataCache(boolean enable)
API to enable or bypass the data cache for the CPU which calls this API.
Definition: IfxCpu.h:942
__CSA_END
#define __CSA_END(cpu)
Definition: CompilerDcc.h:75
IfxScuWdt_disableSafetyWatchdog
void IfxScuWdt_disableSafetyWatchdog(uint16 password)
SCUWDT API to disable Safety Watchdog functionality.
Definition: IfxScuWdt.c:213
IfxScuWdt_enableSafetyWatchdog
void IfxScuWdt_enableSafetyWatchdog(uint16 password)
SCUWDT API to enable Safety Watchdog functionality.
Definition: IfxScuWdt.c:233
__USTACK
#define __USTACK(cpu)
Definition: CompilerDcc.h:70
IfxScuWdt.h
SCU basic functionality.
IfxScuWdt_enableCpuWatchdog
void IfxScuWdt_enableCpuWatchdog(uint16 password)
SCUWDT API to enable CPU Watchdog functionality.
Definition: IfxScuWdt.c:221
BootModeHeader_1
const uint32 BootModeHeader_1[]
Boot Mode Header 1 Boot mode header at memory location 0c8002 0000.
Definition: IfxCpu_CStart0.c:280
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE
Configuration for cache enable.
Definition: IfxCpu_CStart0.c:70
IFXCOMPILER_COMMON_LINKER_SYMBOLS
#define IFXCOMPILER_COMMON_LINKER_SYMBOLS()
Definition: CompilerDcc.h:77
IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK
#define IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu)
Configuration for pre initialization hook function.
Definition: IfxCpu_CStart.h:73
__INTTAB
#define __INTTAB(cpu)
Definition: CompilerDcc.h:85
_START
void _START(void)
Definition: IfxCpu_CStart0.c:202
__SDATA1
#define __SDATA1(cpu)
Definition: CompilerDcc.h:90
IFXCOMPILER_CORE_LINKER_SYMBOLS
#define IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu)
Definition: CompilerDcc.h:56
_Core1_start
void _Core1_start(void)
Definition: IfxCpu_CStart1.c:89
__TRAPTAB
#define __TRAPTAB(cpu)
Definition: CompilerDcc.h:88
IfxScuWdt_disableCpuWatchdog
void IfxScuWdt_disableCpuWatchdog(uint16 password)
SCUWDT API to disable CPU Watchdog functionality.
Definition: IfxScuWdt.c:201
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
IfxCpu_startCore
boolean IfxCpu_startCore(Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified and start the CPU.
Definition: IfxCpu.c:307
__non_return_call
#define __non_return_call
Definition: IfxCpu_IntrinsicsDcc.h:1557
IFXCSTART0_PSW_DEFAULT
#define IFXCSTART0_PSW_DEFAULT
Definition: IfxCpu_CStart0.c:94
IFXCSTART0_PCX_O_S_DEFAULT
#define IFXCSTART0_PCX_O_S_DEFAULT
Definition: IfxCpu_CStart0.c:95
IfxCpu.h
CPU basic functionality.
IfxScuWdt_setCpuEndinitInline
IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:521
u
uint32 min u
Definition: IfxCpu_IntrinsicsDcc.h:143
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:253
IfxScuCcu.h
SCU basic functionality.
__setareg
#define __setareg
Definition: IfxCpu_IntrinsicsDcc.h:2093
core0_main
IFX_EXTERN void core0_main(void)
IFXCPU_CSTART_CCU_INIT_HOOK
#define IFXCPU_CSTART_CCU_INIT_HOOK()
Definition: IfxCpu_CStart0.c:77
IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE
Definition: IfxCpu_CStart0.c:73
__SDATA4
#define __SDATA4(cpu)
Definition: CompilerDcc.h:93
Ifx_C_Init
void Ifx_C_Init(void)


iLLD_TC26B: IfxCpu_CStart1.c Source File

  • Cpu
  • CStart
IfxCpu_CStart1.c
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Cstart1.c
3 * \brief This file contains the Core startup sequence for Cpu1.
4 * \version iLLD_1_0_1_12_0
5 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42 /*******************************************************************************
43 ** Includes **
44 *******************************************************************************/
45 #include "Ifx_Cfg.h"
46 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
47 #include "Scu/Std/IfxScuWdt.h"
48 #include "Cpu/Std/IfxCpu.h"
49 #include "Cpu/CStart/IfxCpu_CStart.h"
50 #include "IfxScu_reg.h"
51 #include "IfxCpu_reg.h"
52
53 /******************************************************************************/
54 /* Macros */
55 /******************************************************************************/
56 /** \brief Configuration for cache enable.
57 *
58 */
59 #ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE
60 # define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE (1) /**< Program Cache enabled by default*/
61 #endif
62 #ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE
63 # define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE (1) /**< Data Cache enabled by default*/
64 #endif
65 /*******************************************************************************
66 ** Imported Function Declarations **
67 *******************************************************************************/
68 IFXCOMPILER_COMMON_LINKER_SYMBOLS()
69 IFXCOMPILER_CORE_LINKER_SYMBOLS(1)
70
71 IFX_EXTERN void core1_main(void);
72 #if defined(__TASKING__)
73 __asm("\t .extern core1_main");
74 #endif
75
76 /*******************************************************************************
77 ** Private Constant Definitions **
78 *******************************************************************************/
79 #define IFXCSTART1_PSW_DEFAULT (0x00000980u)
80 #define IFXCSTART1_PCX_O_S_DEFAULT (0xfff00000u)
81
82 /*********************************************************************************
83 * - startup code
84 *********************************************************************************/
85 #if defined(__HIGHTEC__)
86 #pragma GCC optimize ("-O2")
87 #endif
88
89 void _Core1_start(void)
90 {
91 uint32 pcxi;
92 uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[1]);
93
94 IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(1); /*Test Stack, CSA and Cache */
95
96 /* Load user stack pointer */
97 __setareg(sp, __USTACK(1));
98 __dsync();
99
100 /* Set the PSW to its reset value in case of a warm start,clear PSW.IS */
101 __mtcr(CPU_PSW, IFXCSTART1_PSW_DEFAULT); /* 0x00000980 */
102
103 /* Set the PCXS and PCXO to its reset value in case of a warm start */
104 pcxi = __mfcr(CPU_PCXI);
105 pcxi &= IFXCSTART1_PCX_O_S_DEFAULT; /*0xfff00000; */
106 __mtcr(CPU_PCXI, pcxi);
107
108 /*enable program cache */
109 IfxCpu_setProgramCache(IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE);
110
111 /*enable data cache */
112 IfxCpu_setDataCache(IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE);
113
114 /* Clear the ENDINIT bit in the WDT_CON0 register, inline funtion */
115 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[1], wdtPassword);
116
117 /* Load Base Address of Trap Vector Table. */
118 __mtcr(CPU_BTV, (uint32)__TRAPTAB(1));
119
120 /* Load Base Address of Interrupt Vector Table. we will do this later in the program */
121 __mtcr(CPU_BIV, (uint32)__INTTAB(1));
122
123 /* Load interupt stack pointer. */
124 __mtcr(CPU_ISP, (uint32)__ISTACK(1));
125
126 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[1], wdtPassword);
127
128 /* initialize SDA base pointers */
129 __setareg(a0, __SDATA1(1));
130 __setareg(a1, __SDATA2(1));
131
132 /* These to be un commented if A8 and A9 are required to be initialised */
133 __setareg(a8, __SDATA3(1));
134 __setareg(a9, __SDATA4(1));
135
136 IfxCpu_initCSA((uint32 *)__CSA(1), (uint32 *)__CSA_END(1));
137
138 /*Call main function of Cpu0 */
139 __non_return_call(core1_main);
140 }
141
142 #if defined(__HIGHTEC__)
143 #pragma GCC reset_options
144 #endif
145 #endif /*#ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER */
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerDcc.h:71
core1_main
IFX_EXTERN void core1_main(void)
__mtcr
void __mtcr(const uint32, sint32) __attribute__((intrinsic_function(0x102
IfxCpu_CStart.h
This file contains the Core startup sequence.
IfxCpu_initCSA
IFX_INLINE void IfxCpu_initCSA(uint32 *csaBegin, uint32 *csaEnd)
API to initialize the context save area of the CPU where this is called.
Definition: IfxCpu.h:856
__SDATA3
#define __SDATA3(cpu)
Definition: CompilerDcc.h:92
__mfcr
sint32 __mfcr(const uint32) __attribute__((intrinsic_function(0x101
IfxScuWdt_clearCpuEndinitInline
IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:434
IfxScuWdt_getCpuWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.h:480
__SDATA2
#define __SDATA2(cpu)
Definition: CompilerDcc.h:91
uint32
unsigned long uint32
Definition: Platform_Types.h:116
__CSA
#define __CSA(cpu)
Definition: CompilerDcc.h:74
IfxCpu_setProgramCache
IFX_INLINE void IfxCpu_setProgramCache(boolean enable)
API to enable or bypass the program cache for the CPU which calls this API.
Definition: IfxCpu.h:969
IfxCpu_setDataCache
IFX_INLINE void IfxCpu_setDataCache(boolean enable)
API to enable or bypass the data cache for the CPU which calls this API.
Definition: IfxCpu.h:942
__CSA_END
#define __CSA_END(cpu)
Definition: CompilerDcc.h:75
__USTACK
#define __USTACK(cpu)
Definition: CompilerDcc.h:70
IfxScuWdt.h
SCU basic functionality.
IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE
Configuration for cache enable.
Definition: IfxCpu_CStart1.c:60
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFXCOMPILER_COMMON_LINKER_SYMBOLS
#define IFXCOMPILER_COMMON_LINKER_SYMBOLS()
Definition: CompilerDcc.h:77
IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK
#define IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu)
Configuration for pre initialization hook function.
Definition: IfxCpu_CStart.h:73
__INTTAB
#define __INTTAB(cpu)
Definition: CompilerDcc.h:85
__SDATA1
#define __SDATA1(cpu)
Definition: CompilerDcc.h:90
IFXCOMPILER_CORE_LINKER_SYMBOLS
#define IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu)
Definition: CompilerDcc.h:56
_Core1_start
void _Core1_start(void)
Definition: IfxCpu_CStart1.c:89
__TRAPTAB
#define __TRAPTAB(cpu)
Definition: CompilerDcc.h:88
IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE
Definition: IfxCpu_CStart1.c:63
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
__non_return_call
#define __non_return_call
Definition: IfxCpu_IntrinsicsDcc.h:1557
IfxCpu.h
CPU basic functionality.
IfxScuWdt_setCpuEndinitInline
IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:521
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IFXCSTART1_PSW_DEFAULT
#define IFXCSTART1_PSW_DEFAULT
Definition: IfxCpu_CStart1.c:79
__setareg
#define __setareg
Definition: IfxCpu_IntrinsicsDcc.h:2093
IFXCSTART1_PCX_O_S_DEFAULT
#define IFXCSTART1_PCX_O_S_DEFAULT
Definition: IfxCpu_CStart1.c:80
__SDATA4
#define __SDATA4(cpu)
Definition: CompilerDcc.h:93


iLLD_TC26B: IfxCpu_CStart.h Source File

  • Cpu
  • CStart
IfxCpu_CStart.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Cstart.h
3 * \brief This file contains the Core startup sequence.
4 *
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Cpu_CStart Core Startup Functions
42 * \ingroup IfxLld_Cpu
43 *
44 * \defgroup IfxLld_Cpu_CStart_StartupSequence Startup Sequence
45 * \ingroup IfxLld_Cpu_CStart
46 *
47 * \defgroup IfxLld_Cpu_CStart_ConfigEnableCache How to enable cache during startup?
48 * \ingroup IfxLld_Cpu_CStart
49 *
50 * \defgroup IfxLld_Cpu_CStart_ConfigEnableCores How to enable CPUs during startup?
51 * \ingroup IfxLld_Cpu_CStart
52 */
53 #ifndef IFXCPU_CSTART_H_
54 #define IFXCPU_CSTART_H_
55
56 /******************************************************************************/
57 /* Includes */
58 /******************************************************************************/
59 #include "Ifx_Cfg.h"
60 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
61 #include "Cpu/Std/Ifx_Types.h"
62 #include "Tricore/Compilers/Compilers.h"
63 #include "Cpu/Std/IfxCpu_Intrinsics.h"
64
65 /******************************************************************************/
66 /* Macros */
67 /******************************************************************************/
68
69 /** \brief Configuration for pre initialization hook function.
70 *
71 */
72 #ifndef IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK
73 # define IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu) /**< Hook function is empty if not configured*/
74 #endif
75 /******************************************************************************/
76 /* Exported prototypes */
77 /******************************************************************************/
78 void _Core1_start(void);
79 void _Core2_start(void);
80
81 /*Documentation */
82
83 /** \addtogroup IfxLld_Cpu_CStart_StartupSequence
84 * \{
85 *
86 * The startup driver is responsible for initializing the basic features of microcontroller
87 * to bring it up to the user functions. In framework these functions are called as "CoreX_main".
88 *
89 * In TC27X controllers, CPU0 is master controller which is booted from reset.
90 * IfxCpu_CStart driver provides following functionalities and they are listed in the order of
91 * their execution.
92 *
93 * \section IfxLld_Cpu_CStart_StartupSequence Core Startup Sequence
94 * 1) Execute pre-initialization hook, which is user configurable. \ref IfxLld_Cpu_CStart_ConfigStartupPreInitHook\n
95 * 2) Setup user stack pointer for the CPU core\n
96 * 3) Set program/data cache bypass to configuration defined settings. Refer \ref IfxLld_Cpu_CStart_ConfigEnableCache.\n
97 * 4) Set base address for trap vector and interrupt vector for the CPU core\n
98 * 5) Set interrupt stack pointer\n
99 * 6) Initialize the base pointers for the small data area registers for CPU core\n
100 * 7) Initialize the CSA for CPU core\n
101 * 8) Do the C initialization to initialize the global variables etc.\n
102 * 9) Initialize the clock system to configuration defined settings. \ref Ifx_Scu_Ccu_ConfigClock\n
103 * 10) Start remaining cores if they configuration setting request them to be enabled. \ref IfxLld_Cpu_CStart_ConfigEnableCores\n
104 * 11) Call user function "CoreX_main"\n
105 *
106 * \note All the above functionalities are executed by "master core" in this case CPU0. Remaining cores will execute
107 * only subset of the above functions, i.e. steps 8) 9) and 10) are not executed by remaining CPU core startups.
108 *
109 * \section IfxLld_Cpu_CStart_ConfigStartupPreInitHook Using Startup pre-initialization hook
110 *
111 * If the application/ demo example need some activity other than above defined functionalities, user can configure
112 * the function which is called before any other initialization is executed. Example of such activity is testing the CSA and STACK.
113 *
114 * Following are the steps to be done to configure user defined activity which is needed before startup sequence.
115 *
116 * \subsection IfxLld_Cpu_CStart_ConfigStartupPreInitHookStep1 Step1: Define a hook function
117 *
118 * This definition shall be as user defined code (Generally in DemoApps folder).\n
119 * Considerations:\n
120 * 1. Format: IFX_INLINE void <pre init function name>(cpu)
121 * \note Define such a routine with the consideration, that there shall be no function call within this.
122 *
123 * 2. Use the information available as parameter cpu
124 *
125 * Example code in a user defined file eg. Ifx_preInitHook.h, placed under folder/subfolder: 0_AppSw/Tricore/DemoApp:
126 * \code
127 * // file: Ifx_preInitHook.h
128 * //Example function for pre initialization Hook for startup functions.
129 *
130 * IFX_INLINE mySysPreInitHook(uint32 cpu)
131 * {
132 * switch (cpu)
133 * {
134 * case 0:
135 * {
136 * //user code for cpu0: Function calls NOT allowed.
137 * break;
138 * }
139 * case 1:
140 * {
141 * //user code for cpu1: Function calls NOT allowed.
142 * break;
143 * }
144 * case 2:
145 * {
146 * //user code for cpu2: Function calls NOT allowed.
147 * break;
148 * }
149 * case default:
150 * {
151 * break;
152 * }
153 * }
154 * }
155 * \endcode
156 *
157 * \subsection IfxLld_Cpu_CStart_ConfigStartupPreInitHookStep2 Step2: Configure the pre initialization function for startup sequence call
158 * Create a file for configuring the hook. For example, Ifx_Cfg_CStart.h at ../0_Src/0_AppSw/Config/Tricore (or in DemoApp folder)
159 * \note This configuration, overload the macro IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu), which is already defined in IfxCpu_CStart.h.
160 * !!IMPORTANT!! Don't modify this at IfxCpu_CStart.h, because this is library file.
161 *
162 * \code
163 * //file: Ifx_Cfg_CStart.h
164 *
165 * #include "Ifx_preInitHook.h" //Assuming this is the file name as in above example
166 *
167 * #define IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu) mySysPreInitHook(cpu) //This is INLINE function.
168 *
169 * \endcode
170 */
171
172 /** \} */
173
174 /** \addtogroup IfxLld_Cpu_CStart_ConfigEnableCache
175 * \{
176 *
177 * In Tricore Cpu the cache enable/ disable are handled by the feature called cache bypass.
178 * Cache is enabled if the Bypass is disabled.
179 *
180 * Startup sequence of each CPU execute the function to do the cache settings. \ref Ifx_Cpu_StartupSequence
181 * The configuration parameters IFX_CFG_CPU_CSTART_ENABLE_TRICOREx_PCACHE and
182 * IFX_CFG_CPU_CSTART_ENABLE_TRICOREx_DCACHE control this function.
183 *
184 * To modify the default configuration, these macros are to be defined in Ifx_Cfg.h (usually located under ../0_Src/0_AppSw/Config/Common/Ifx_Cfg.h)
185 * \note This kind of definitions overload the macros, which are already defined in IfxCpu_CStart*.c.
186 * !!IMPORTANT!! Don't modify these in IfxCpu_CStart*.c, because theseare library files.
187 *
188 * Details of configuration parameters:\n
189 *
190 * \paragraph IfxLld_Cpu_CStart_ConfigEnableCachePgmParamters program cache configuration parameters
191 *
192 * Enable/Disable program cache of Tricore CPU0 with parameter:\n
193 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE\n
194 *
195 * Enable/Disable program cache of Tricore CPU1 with parameter:\n
196 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE\n
197 *
198 * Enable/Disable program cache of Tricore CPU2 with parameter:\n
199 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_PCACHE\n
200 *
201 * Enable/Disable data cache of Tricore CPU0 with parameter:\n
202 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE\n
203 *
204 * Enable/Disable data cache of Tricore CPU1 with parameter:\n
205 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE\n
206 *
207 * Enable/Disable data cache of Tricore CPU2 with parameter:\n
208 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_DCACHE\n
209 *
210 * Following example shows, how to enable program cache of all available cores and disable data cache of all
211 * the available cores.
212 * \code
213 * //file: Ifx_Cfg.h
214 *
215 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE (1) //Program cache for Cpu0 is enabled
216 *
217 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE (1) //Data cache for Cpu0 is enabled
218 *
219 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE (1) //Program cache for Cpu1 is enabled
220 *
221 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE (1) //Data cache for Cpu1 is enabled
222 *
223 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_PCACHE (1) //Program cache for Cpu2 is enabled
224 *
225 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_DCACHE (1) //Data cache for Cpu2 is enabled
226 *
227 * \endcode
228 *
229 * To control the the caches during runtime, refer for the details of APIs: \ref Ifx_Cpu_Cache
230 *
231 */
232
233 /** \} */
234
235 /** \addtogroup IfxLld_Cpu_CStart_ConfigEnableCores
236 * \{
237 *
238 * Startup sequence of CPU0 execute the function to initialize the remaining available CPUs.
239 * \ref IfxLld_Cpu_CStart_StartupSequence.
240 * Startup sequence enables all the available CPUs.
241 *
242 * The configuration parameters IFX_CFG_CPU_CSTART_ENABLE_TRICOREx control this function.
243 * To modify the default configuration, these macros are to be defined. Create a file to define these macros,
244 * for example, Ifx_Cfg_CStart.h at ../0_Src/0_AppSw/Config/Tricore (or in DemoApp folder).
245 * \note This kind of definitions, overload the macros, which are already defined in IfxCpu_CStart.h.
246 * !!IMPORTANT!! Don't modify these at IfxCpu_CStart.h, because this is library file.
247 *
248 * Details of configuration parameters:\n
249 *
250 * \paragraph IfxLld_Cpu_CStart_ConfigEnableCoresParamters CPU enable/disable configuration parameters
251 *
252 * Enable/Disable of Tricore CPU0 with parameter:\n
253 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE0\n
254 *
255 * Enable/Disable of Tricore CPU1 with parameter:\n
256 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE1\n
257 *
258 * Enable/Disable of Tricore CPU2 with parameter:\n
259 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE2\n
260 *
261 * Following example shows, how to enable all available cores.
262 * \code
263 * //file: Ifx_Cfg_CStart.h
264 *
265 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 (1) //Cpu0 is enabled
266 *
267 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 (1) //Cpu1 is enabled
268 *
269 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE2 (1) //Cpu2 is enabled
270 *
271 * \endcode
272 *
273 */
274
275 /** \} */
276
277 #endif /*#ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER */
278 #endif /* IFXCPU_CSTART_H_ */
IfxCpu_Intrinsics.h
_Core1_start
void _Core1_start(void)
Definition: IfxCpu_CStart1.c:89
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Compilers.h
_Core2_start
void _Core2_start(void)


iLLD_TC26B: IfxCpu_Intrinsics.h Source File

  • Cpu
  • Std
IfxCpu_Intrinsics.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Intrinsics.h
3 * \ingroup IfxLld_Cpu_Intrinsics Intrinsics
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup IfxLld_Cpu_Intrinsics Intrinsics
41 * \ingroup IfxLld_Cpu_Std
42 *
43 */
44 #ifndef IFXCPU_INTRINSICS_H
45 #define IFXCPU_INTRINSICS_H
46 /******************************************************************************/
47 #include "Ifx_Types.h"
48
49 #if defined(__DCC__)
50 #include "IfxCpu_IntrinsicsDcc.h"
51
52 #elif defined(__HIGHTEC__)
53 #include "IfxCpu_IntrinsicsGnuc.h"
54
55 #elif defined(__TASKING__)
56 #include "IfxCpu_IntrinsicsTasking.h"
57
58 #elif defined(__ghs__)
59 #include "IfxCpu_IntrinsicsGhs.h"
60
61 #else
62 #error Compiler unsupported
63 #endif
64
65 #define IFX_ALIGN_8 (1) // Align on 8 bit Boundary
66 #define IFX_ALIGN_16 (2) // Align on 16 bit Boundary
67 #define IFX_ALIGN_32 (4) // Align on 32 bit Boundary
68 #define IFX_ALIGN_64 (8) // Align on 64 bit Boundary
69 #define IFX_ALIGN_128 (16) // Align on 128 bit Boundary
70 #define IFX_ALIGN_256 (32) // Align on 256 bit Boundary
71
72 #define Ifx_AlignOn256(Size) ((((Size) + (IFX_ALIGN_256 - 1)) & (~(IFX_ALIGN_256 - 1))))
73 #define Ifx_AlignOn128(Size) ((((Size) + (IFX_ALIGN_128 - 1)) & (~(IFX_ALIGN_128 - 1))))
74 #define Ifx_AlignOn64(Size) ((((Size) + (IFX_ALIGN_64 - 1)) & (~(IFX_ALIGN_64 - 1))))
75 #define Ifx_AlignOn32(Size) ((((Size) + (IFX_ALIGN_32 - 1)) & (~(IFX_ALIGN_32 - 1))))
76 #define Ifx_AlignOn16(Size) ((((Size) + (IFX_ALIGN_16 - 1)) & (~(IFX_ALIGN_16 - 1))))
77 #define Ifx_AlignOn8(Size) ((((Size) + (IFX_ALIGN_8 - 1)) & (~(IFX_ALIGN_8 - 1))))
78
79 #define Ifx_COUNTOF(x) (sizeof(x) / sizeof(x[0]))
80
81 //______________________________________________________________________________
82
83 /** Convert context pointer to address pointer
84 * \param[in] cx context pointer
85 * \return address pointer
86 */
87 IFX_INLINE void *__cx_to_addr(uint32 cx)
88 {
89 uint32 seg_nr = __extru(cx, 16, 4);
90 return (void *)__insert(seg_nr << 28, cx, 6, 16);
91 }
92
93
94 /** Convert address pointer to context pointer
95 * \param[in] addr address pointer
96 * \return context pointer
97 */
98 IFX_INLINE uint32 __addr_to_cx(void *addr)
99 {
100 uint32 seg_nr, seg_idx;
101 seg_nr = __extru((int)addr, 28, 4) << 16;
102 seg_idx = __extru((int)addr, 6, 16);
103 return seg_nr | seg_idx;
104 }
105
106
107 /******************************************************************************/
108 IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
109 {
110 *(volatile uint32 *)address = (*(volatile uint32 *)address & ~(mask)) | (mask & value);
111 }
112
113
114 /** 32bit load operation
115 */
116 IFX_INLINE uint32 __ld32(void *addr)
117 {
118 return *(volatile uint32 *)addr;
119 }
120
121
122 /** 32bit store operation
123 */
124 IFX_INLINE void __st32(void *addr, uint32 value)
125 {
126 *(volatile uint32 *)addr = value;
127 }
128
129
130 /** 64bit load operation
131 */
132 IFX_INLINE uint64 __ld64(void *addr)
133 {
134 return *(volatile uint64 *)addr;
135 }
136
137
138 /** 64bit store operation
139 */
140 IFX_INLINE void __st64(void *addr, uint64 value)
141 {
142 *(volatile uint64 *)addr = value;
143 }
144
145
146 /** 64bit load operation which returns the lower and upper 32bit word
147 */
148 IFX_INLINE void __ld64_lu(void *addr, uint32 *valueLower, uint32 *valueUpper)
149 {
150 register uint64 value;
151 value = __ld64(addr);
152 *valueLower = (uint32)value;
153 *valueUpper = (uint32)(value >> 32);
154 }
155
156
157 /** 64bit store operation which stores a lower and upper 32bit word
158 */
159 IFX_INLINE void __st64_lu(void *addr, uint32 valueLower, uint32 valueUpper)
160 {
161 register uint64 value = ((uint64)valueUpper << 32) | valueLower;
162 __st64(addr, value);
163 }
164
165
166 /******************************************************************************/
167 #endif /* IFXCPU_INTRINSICS_H */
IfxCpu_IntrinsicsDcc.h
__st64
IFX_INLINE void __st64(void *addr, uint64 value)
Definition: IfxCpu_Intrinsics.h:140
__addr_to_cx
IFX_INLINE uint32 __addr_to_cx(void *addr)
Definition: IfxCpu_Intrinsics.h:98
__st32
IFX_INLINE void __st32(void *addr, uint32 value)
Definition: IfxCpu_Intrinsics.h:124
__ld64_lu
IFX_INLINE void __ld64_lu(void *addr, uint32 *valueLower, uint32 *valueUpper)
Definition: IfxCpu_Intrinsics.h:148
uint32
unsigned long uint32
Definition: Platform_Types.h:116
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:108
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCpu_IntrinsicsGhs.h
IfxCpu_IntrinsicsGnuc.h
__st64_lu
IFX_INLINE void __st64_lu(void *addr, uint32 valueLower, uint32 valueUpper)
Definition: IfxCpu_Intrinsics.h:159
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
__insert
uint32 __insert(uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109
__extru
uint32 __extru(uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
IfxCpu_IntrinsicsTasking.h
__ld64
IFX_INLINE uint64 __ld64(void *addr)
Definition: IfxCpu_Intrinsics.h:132
__ld32
IFX_INLINE uint32 __ld32(void *addr)
Definition: IfxCpu_Intrinsics.h:116
__cx_to_addr
IFX_INLINE void * __cx_to_addr(uint32 cx)
Definition: IfxCpu_Intrinsics.h:87


iLLD_TC26B: IfxCpu_IntrinsicsDcc2G.h Source File

  • Cpu
  • Std
IfxCpu_IntrinsicsDcc2G.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_IntrinsicsDcc.h
3 * \version iLLD_1_0_1_12_0
4 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 * \defgroup IfxLld_Cpu_Intrinsics_Dcc intrinsics for DCC compiler
40 * \ingroup IfxLld_Cpu_Intrinsics
41 *
42 */
43 #ifndef IFXCPU_INTRINSICSDCC_H
44 #define IFXCPU_INTRINSICSDCC_H
45 /******************************************************************************/
46 #include "Ifx_Types.h"
47
48 /******************************************************************************/
49 /* *INDENT-OFF* */
50 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_min_smax Minimum and Maximum of (Short) Integers
51 These intrinsic functions return the minimum or maximum of a signed integer, unsigned integer or short integer.
52 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
53 * \{
54 */
55
56 /** Function call without return
57 */
58 asm volatile void Ifx__non_return_call(void (*fun)(void))
59 {
60 % reg fun
61 ji fun
62 }
63
64 /** Jump and link
65 */
66 asm volatile void Ifx__jump_and_link(void (*fun)(void))
67 {
68 % reg fun
69 jli fun
70 }
71
72 /** \} */
73
74 asm volatile void Ifx__moveToDataParam0(unsigned int var)
75 {
76 % reg var
77 ! "%d4"
78 mov %d4, var
79 }
80
81 asm volatile void Ifx__moveToDataParamRet(unsigned int var)
82 {
83 % reg var
84 ! "%d2"
85 mov %d2, var
86 }
87
88 asm volatile unsigned int Ifx__getDataParamRet(void)
89 {
90 ! "%d2"
91 mov %d2, %d2
92 }
93
94 asm volatile void Ifx__moveToAddrParam0(const void *var)
95 {
96 % reg var
97 ! "%a4"
98 mov.aa %a4, var
99 }
100
101 IFX_INLINE void Ifx__jumpToFunction(const void *fun)
102 {
103 Ifx__non_return_call((void (*)(void))fun);
104 }
105
106 IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
107 {
108 Ifx__jump_and_link((void (*)(void))fun);
109 }
110
111 asm volatile void Ifx__jumpBackToLink(void)
112 {
113 ! "%a11"
114 ji %a11
115 }
116
117 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_any_type Cross type arithmetic operation
118 *
119 * Macro compatible with float, fix point, signed integer and unsigned integer
120 *
121 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
122 * \{
123 */
124 #define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
125 #define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
126 #define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
127 #define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
128
129 /** Return minimum of two integers
130 */
131 extern sint32 __min( sint32, sint32) __attribute__((intrinsic_pseudo(3, "min") ));
132
133 #define Ifx__min __min
134
135 /** Return minimum of two short integers
136 */
137 extern sint32 __mins( sint32, sint32) __attribute__((intrinsic_function(0x10b, 0, "min.h") ));
138
139 #define Ifx__mins __mins
140
141 /** Return minimum of two unsigned integers
142 */
143 extern uint32 __minu( uint32, uint32) __attribute__((intrinsic_pseudo(3, "min.u") ));
144
145 #define Ifx__minu __minu
146
147 /** Return maximum of two integers
148 */
149 extern sint32 __max( sint32, sint32) __attribute__((intrinsic_pseudo(3, "max") ));
150
151 #define Ifx__max __max
152
153 /** Return maximum of two short integers
154 */
155 extern uint32 __maxs( uint32, uint32) __attribute__((intrinsic_function(0x10b, 0, "max.h") ));
156
157 #define Ifx__maxs __maxs
158
159 /** Return maximum of two unsigned integers
160 */
161 extern uint32 __maxu( uint32, uint32) __attribute__((intrinsic_pseudo(3, "max.u") ));
162
163 #define Ifx__maxu __maxu
164
165 /** \} */
166
167 /** \defgroup intrinsicstasking_float Floating point operation
168 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
169 * \{
170 */
171 #define Ifx__saturate(X,Min,Max) ( __minf(__maxf(X, Min), Max) )
172
173 #define Ifx__sqrf(X) ((X) * (X))
174 #define Ifx__sqrtf(X) sqrtf(X)
175 #define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
176
177 #define Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
178 #define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
179 #define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
180 #define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
181 #define Ifx__saturatef(X,Min,Max) ( __minf(__maxf(X, Min), Max) )
182 #define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
183
184 #define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
185 #define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
186 #define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
187 #define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
188
189 #define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
190 #define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
191 #define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
192 /** \} */
193
194 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_fractional Fractional Arithmetic Support
195 The next table provides an overview of intrinsic functions to convert fractional values. Note that the
196 TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
197 need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
198 compiler does support these functions.
199 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
200 * \{
201 */
202
203 /** Count the consecutive number of bits that have the same value as bit 15 of an sfract
204 */
205 asm short Ifx__clssf(sfract a)
206 {
207 % reg a
208 ! "%d2"
209 sh a,a,16
210 cls %d2, a
211 }
212
213 /** Convert float to fract
214 */
215 asm fract Ifx__float_to_fract(float a)
216 {
217 % reg a
218 ! "%d2", "%d3"
219 mov %d3, 0
220 ftoq31 %d2, a, %d3
221 }
222
223 /** \brief Convert fract to float
224 */
225 asm float Ifx__fract_to_float(fract a)
226 {
227 % reg a
228 ! "%d2", "%d3"
229 mov %d3, 0
230 q31tof %d2, a, %d3
231 }
232
233 /** Convert __laccum to fract
234 */
235 asm fract Ifx__getfract(laccum a)
236 {
237 % reg a
238 ! "%d2"
239 dextr %d2, a!H, a!L, 17
240 }
241
242 /** Multiply-add with rounding. Returns the rounded result of ( a + b * c )
243 */
244 #ifdef INTRINSIC_WORKAROUND
245 extern sfract __mac_r_sf(sfract a, sfract b, sfract c);
246 #else
247 asm sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
248 {
249 % reg a, b, c
250 ! "%d2"
251 maddrs.q %d2, a, bU, cU, 1
252 }
253 #endif
254
255 /** Multiply-add sfract. Returns ( a + b * c )
256 */
257 #ifdef INTRINSIC_WORKAROUND
258 extern sfract __mac_sf(sfract a, sfract b, sfract c);
259 #else
260 asm sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
261 {
262 % reg a, b, c
263 ! "%d2"
264 madds.q %d2, a, bU, cU, 1
265 }
266 #endif
267
268 /** Integer part of the multiplication of a fract and a fract
269 */
270 asm long Ifx__mulfractfract(fract a, fract b)
271 {
272 % reg a, b
273 ! "%d2"
274 mul.q %d2, a, b, 1
275 }
276
277 /** Integer part of the multiplication of a fract and a long
278 */
279 asm long Ifx__mulfractlong(fract a, long b)
280 {
281 % reg a, b
282 ! "%d2"
283 mul.q %d2, a, b, 1
284 }
285
286 /** Convert fract to sfract
287 */
288 asm sfract Ifx__round16(fract a)
289 {
290 % reg a
291 ! "%d2"
292 mov.u %d2, 0x8000
293 adds %d2, a
294 extr %d2,%d2,0x10,0x10
295 }
296
297 #define Ifx__fract_to_sfract Ifx__round16
298
299 /** Convert float to sfract
300 */
301 IFX_INLINE sfract __float_to_sfract(float a)
302 {
303 fract tmp = Ifx__float_to_fract(a);
304 return Ifx__fract_to_sfract(tmp);
305 }
306
307 /** Convert signed short to sfract
308 */
309 asm sfract Ifx__s16_to_sfract(short a)
310 {
311 % reg a
312 ! "%d2"
313 sh %d2, a, 16
314 sh %d2, %d2, -16
315 }
316
317 /** Convert sfract to signed short
318 */
319 asm short Ifx__sfract_to_s16(sfract a)
320 {
321 % reg a
322 sh a, a, 16
323 sh %d2, a, -16
324 }
325
326 /** Convert sfract to uint16
327 */
328 asm volatile uint16 Ifx__sfract_to_u16(sfract a)
329 {
330 % reg a
331 ! "%d2"
332 sh a, a, 16
333 sh %d2, a, -16
334 }
335
336 /** Left/right shift of an __laccum
337 */
338 asm laccum Ifx__shaaccum(laccum a, sint32 b)
339 {
340 % lab L0, L1; reg a, b
341 ! "%d2", "%d3"
342 jge b, 0, L0
343 sha %d3, a!L, b
344 rsub b, b, 0
345 dextr %d2, a!H, a!L, b
346 j L1
347 L0:
348 dextr %d2, a!H, a!L, b
349 sha %d2, a!L, b
350 L1:
351 }
352
353 /** Left/right shift of an fract
354 */
355 #ifdef INTRINSIC_WORKAROUND
356 extern fract __shafracts(fract a, sint32 b);
357 #else
358 asm fract Ifx__shafracts(fract a, sint32 b)
359 {
360 % reg a, b
361 ! "%d2"
362 shas %d2, a, b
363 }
364 #endif
365
366 /** Left/right shift of an sfract
367 */
368 #ifdef INTRINSIC_WORKAROUND
369 extern sfract __shasfracts(sfract a, sint32 b);
370 #else
371 asm sfract Ifx__shasfracts(sfract a, sint32 b)
372 {
373 % reg a, b
374 ! "%d2"
375 shas %d2, a, b
376 }
377 #endif
378
379 /** Convert uint16 to sfract
380 */
381 asm sfract Ifx__u16_to_sfract(uint16 a)
382 {
383 % reg a
384 ! "%d2"
385 sh %d2, a, 16
386 sh %d2, %d2, -16
387 }
388
389 /** \} */
390
391 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_insert Insert / Extract Bit-fields and Bits
392 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
393 * \{
394 */
395
396 /** Extract a bit-field (bit pos to bit pos+width) from value
397 */
398 extern sint32 __extr( sint32, uint32, const uint32) __attribute__((intrinsic_function(0x108, 0, "extr") ));
399
400 #define Ifx__extr __extr
401
402 /** Same as __extr() but return bit-field as unsigned integer
403 */
404 extern uint32 __extru( uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108, 0, "extr.u") ));
405
406 #define Ifx__extru __extru
407
408 /** Load a single bit.
409 */
410 #define Ifx__getbit( address, bitoffset ) __extru( *(address), bitoffset, 1 )
411
412 /** Return trg but replace trgbit by srcbit in src.
413 */
414 extern uint32 __ins( uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121, 0, "ins.t") ));
415
416 #define Ifx__ins __ins
417
418 /** Extract bit-field (width w bits starting at bit 0) from a and insert it in
419 * b at position p.
420 */
421 extern uint32 __insert( uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109, 0, "insert") ));
422
423 #define Ifx__insert __insert
424
425 /** Return trg but replace trgbit by inverse of srcbit in src.
426 */
427 extern uint32 __insn( uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121, 0, "insn.t") ));
428
429 #define Ifx__insn __insn
430
431 /** Atomic load-modify-store.
432 */
433 #ifdef INTRINSIC_WORKAROUND
434 extern void __imaskldmst(void* a, sint32 b, sint32 p, const sint32 w);
435 #else
436 asm volatile void Ifx__imaskldmst(void* a, sint32 b, sint32 p, const sint32 w)
437 {
438 % reg a, b, p; con w
439 ! "%d2", "%d3"
440 imask %e2, b, p, w
441 ldmst [a]0, %e2
442 }
443 #endif
444
445 /** Store a single bit.
446 */
447 #define Ifx__putbit(value,address,bitoffset) Ifx__imaskldmst(address,value,bitoffset,1)
448
449 /** \} */
450
451 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_interrupt_handling Interrupt Handling
452 The next table provides an overview of the intrinsic functions to read or set interrupt handling.
453 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
454 * \{
455 */
456
457 /** Set CPU priority number [0..255] (or [0..1023] for TriCore 1.6.x) and enable interrupts immediately at function entry
458 */
459 extern void __bisr( const uint32) __attribute__((intrinsic_function(0x100, 0, "bisr") ));
460
461 #define Ifx__bisr __bisr
462
463 /** Disable interrupts. Only supported for TriCore1
464 */
465 extern void __disable( void) __attribute__((intrinsic_function(0x103, 0, "disable") ));
466
467 #define Ifx__disable __disable
468
469 /** Disable interrupts and return previous interrupt state (enabled or disabled). Direct supported for TriCore1.6. Emulated on TC1.3.1
470 */
471 #if defined INTRINSIC_WORKAROUND
472 extern sint32 __disable_and_save(void);
473 #endif
474
475 /** Enable interrupts immediately at function entry
476 */
477 extern void __enable( void) __attribute__((intrinsic_function(0x103, 0, "enable") ));
478
479 #define Ifx__enable __enable
480
481 /** Restore interrupt state. Direct supported for TriCore1.6. Emulated on TC1.3.1
482 */
483 extern void __restore( sint32) __attribute__((intrinsic_function(0x104, 0, "restore") ));
484
485 #define Ifx__restore __restore
486
487 /** Call a system call function number
488 */
489 extern void __syscall( const uint32) __attribute__((intrinsic_function(0x100, 0, "syscall") ));
490
491 #define Ifx__syscall __syscall
492
493 /** \} */
494
495 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_miscellaneous Miscellaneous Intrinsic Functions
496 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
497 * \{
498 */
499
500 /** Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].
501 */
502 extern void __cacheawi( void*) __attribute__((intrinsic_function(0x110, 0, "cachea.wi") ));
503
504 #define Ifx__cacheawi __cacheawi
505
506 /** Write back and invalidate cache address \"p\" and return post incremented
507 * value of \"p\". Generates CACHEA.WI [Ab+].
508 */
509 asm volatile uint8* Ifx__cacheawi_bo_post_inc(uint8* p)
510 {
511 % reg p
512 !
513 cachea.wi [p + ]0
514 mov.aa %a2, p
515 }
516
517 /** Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].
518 */
519 asm volatile void Ifx__cacheiwi(uint8* p)
520 {
521 % reg p
522 !
523 cachei.wi [p]
524 }
525
526 /** Initialize a circular pointer with a dynamically allocated buffer at run-time.
527 */
528 asm circ_t __initcirc(void* buf, uint16 bufsize, uint16 byteindex)
529 {
530 % reg buf, bufsize, byteindex
531 ! "%a2", "%a3"
532 lea %a2, [buf]0
533 extr.u bufsize, bufsize, 0, 16
534 insert bufsize, byteindex, bufsize, 16, 16
535 mov.a %a3, bufsize
536 }
537
538 /** Multiply two 32-bit numbers to an intermediate 64-bit result, and scale
539 * back the result to 32 bits. To scale back the result, 32 bits are extracted
540 * from the intermediate 64-bit result: bit 63-offset to bit 31-offset.
541 */
542 asm volatile sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
543 {
544 % reg a, b, offset
545 ! "%d2", "%d3"
546 mul %e2, a, b
547 dextr %d2, %d3, %d2, offset
548 }
549
550 /** Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).
551 */
552 asm volatile uint32 Ifx__rol(uint32 operand, uint32 count)
553 {
554 % reg operand, count
555 ! "%d2"
556 dextr %d2, operand, operand, count
557 }
558
559 /** Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).
560 */
561 asm volatile uint32 Ifx__ror(uint32 operand, uint32 count)
562 {
563 % reg operand, count
564 ! "%d2"
565 rsub count, count, 0
566 dextr %d2, operand, operand, count
567 }
568
569 /** \} */
570
571 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_packed Packed Data Type Support
572 The next table provides an overview of the intrinsic functions for initialization of packed data type.
573 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
574 * \{
575 */
576
577 /** Absolute value of __packb
578 */
579 asm __packb Ifx__absb(__packb a)
580 {
581 % reg a
582 ! "%d2"
583 abs.b %d2, a
584 }
585
586 /** Absolute value of __packhw
587 */
588 asm __packhw Ifx__absh(__packhw a)
589 {
590 % reg a
591 ! "%d2"
592 abs.h %d2, a
593 }
594
595 /** Absolute value of __packhw using saturation
596 */
597 asm __packhw Ifx__abssh(__packhw a)
598 {
599 % reg a
600 ! "%d2"
601 abss.h %d2, a
602 }
603
604 /** \brief Extract first byte from a __packb
605 */
606 asm sint8 Ifx__extractbyte1(__packb a)
607 {
608 % reg a
609 ! "%d2"
610 extr %d2, a, 0, 8
611 }
612
613 /** \brief Extract second byte from a __packb
614 */
615 asm sint8 Ifx__extractbyte2(__packb a)
616 {
617 % reg a
618 ! "%d2"
619 extr %d2, a, 8, 8
620 }
621
622 /** \brief Extract third byte from a __packb
623 */
624 asm sint8 Ifx__extractbyte3(__packb a)
625 {
626 % reg a
627 ! "%d2"
628 extr %d2, a, 16, 8
629 }
630
631 /** \brief Extract fourth byte from a __packb
632 */
633 asm sint8 Ifx__extractbyte4(__packb a)
634 {
635 % reg a
636 ! "%d2"
637 extr %d2, a, 24, 8
638 }
639
640 /** \brief Extract first short from a __packhw
641 */
642 asm short Ifx__extracthw1(__packhw a)
643 {
644 % reg a
645 ! "%d2"
646 extr %d2, a, 0, 16
647 }
648
649 /** \brief Extract second short from a __packhw
650 */
651 asm short Ifx__extracthw2(__packhw a)
652 {
653 % reg a
654 ! "%d2"
655 extr %d2, a, 16, 16
656 }
657
658 /** Extract first unsigned byte from a __packb
659 */
660 asm volatile uint8 Ifx__extractubyte1(__upackb a)
661 {
662 % reg a
663 ! "%d2"
664 extr %d2, a, 0, 8
665 }
666
667 /** Extract second unsigned byte from a __packb
668 */
669 asm volatile uint8 Ifx__extractubyte2(__upackb a)
670 {
671 % reg a
672 ! "%d2"
673 extr %d2, a, 8, 8
674 }
675
676 /** Extract third unsigned byte from a __packb
677 */
678 asm volatile uint8 Ifx__extractubyte3(__upackb a)
679 {
680 % reg a
681 ! "%d2"
682 extr %d2, a, 16, 8
683 }
684
685 /** Extract fourth unsigned byte from a __packb
686 */
687 asm volatile uint8 Ifx__extractubyte4(__upackb a)
688 {
689 % reg a
690 ! "%d2"
691 extr %d2, a, 24, 8
692 }
693
694 /** Extract first uint16 from a __packhw
695 */
696 asm volatile uint16 Ifx__extractuhw1(__upackhw a)
697 {
698 % reg a
699 ! "%d2"
700 extr %d2, a, 0, 16
701 }
702
703 /** Extract second uint16 from a __packhw
704 */
705 asm volatile uint16 Ifx__extractuhw2(__upackhw a)
706 {
707 % reg a
708 ! "%d2"
709 extr %d2, a, 16, 16
710 }
711
712 /** Extract first byte from a __packb
713 */
714 asm sint8 Ifx__getbyte1(__packb* a)
715 {
716 % reg a
717 ! "%d2"
718 ld.w %d2, [a]
719 extr %d2, %d2, 0, 8
720 }
721
722 /** Extract second byte from a __packb
723 */
724 asm sint8 Ifx__getbyte2(__packb* a)
725 {
726 % reg a
727 ! "%d2"
728 ld.w %d2, [a]
729 extr %d2, %d2, 8, 8
730 }
731
732 /** Extract third byte from a __packb
733 */
734 asm sint8 Ifx__getbyte3(__packb* a)
735 {
736 % reg a
737 ! "%d2"
738 ld.w %d2, [a]
739 extr %d2, %d2, 16, 8
740 }
741
742 /** Extract fourth byte from a __packb
743 */
744 asm sint8 Ifx__getbyte4(__packb* a)
745 {
746 % reg a
747 ! "%d2"
748 ld.w %d2, [a]
749 extr %d2, %d2, 24, 8
750 }
751
752 /** Extract first short from a __packhw
753 */
754 asm short Ifx__gethw1(__packhw* a)
755 {
756 % reg a
757 ! "%d2"
758 ld.w %d2, [a]
759 extr %d2, %d2, 0, 16
760 }
761
762 /** Extract second short from a __packhw
763 */
764 asm short Ifx__gethw2(__packhw* a)
765 {
766 % reg a
767 ! "%d2"
768 ld.w %d2, [a]
769 extr %d2, %d2, 16, 16
770 }
771
772 /** Extract first unsigned byte from a __packb
773 */
774 asm volatile uint8 Ifx__getubyte1(__upackb* a)
775 {
776 % reg a
777 ! "%d2"
778 ld.w %d2, [a]
779 extr %d2, %d2, 0, 8
780 }
781
782 /** Extract second unsigned byte from a __packb
783 */
784 asm volatile uint8 Ifx__getubyte2(__upackb* a)
785 {
786 % reg a
787 ! "%d2"
788 ld.w %d2, [a]
789 extr %d2, %d2, 8, 8
790 }
791
792 /** Extract third unsigned byte from a __packb
793 */
794 asm volatile uint8 Ifx__getubyte3(__upackb* a)
795 {
796 % reg a
797 ! "%d2"
798 ld.w %d2, [a]
799 extr %d2, %d2, 16, 8
800 }
801
802 /** Extract fourth unsigned byte from a __packb
803 */
804 asm volatile uint8 Ifx__getubyte4(__upackb* a)
805 {
806 % reg a
807 ! "%d2"
808 ld.w %d2, [a]
809 extr %d2, %d2, 24, 8
810 }
811
812 /** Extract first uint16 from a __packhw
813 */
814 asm volatile uint16 Ifx__getuhw1(__upackhw* a)
815 {
816 % reg a
817 ! "%d2"
818 ld.w %d2, [a]
819 extr %d2, %d2, 0, 16
820 }
821
822 /** Extract second uint16 from a __packhw
823 */
824 asm volatile uint16 Ifx__getuhw2(__upackhw* a)
825 {
826 % reg a
827 ! "%d2"
828 ld.w %d2, [a]
829 extr %d2, %d2, 16, 16
830 }
831
832 /** Initialize __packb with four integers
833 */
834 asm __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
835 {
836 % reg a, b, c, d
837 ! "%d2"
838 insert c, c, d, 8, 8
839 insert d, a, b, 8, 8
840 insert %d2, d, c, 16, 16
841 }
842
843 /** Initialize __packb with a long integer
844 */
845 asm __packb Ifx__initpackbl(long a)
846 {
847 % reg a
848 ! "%d2"
849 mov %d2, a
850 }
851
852 /** \brief Initialize __packhw with two integers
853 */
854 asm __packhw Ifx__initpackhw(short a, short b)
855 {
856 % reg a, b
857 ! "%d2"
858 insert %d2, a, b, 16, 16
859 }
860
861 /** Initialize __packhw with a long integer
862 */
863 asm __packhw Ifx__initpackhwl(long a)
864 {
865 % reg a
866 ! "%d2"
867 mov %d2, a
868 }
869
870 /** Initialize __packb with four unsigned integers
871 */
872 asm __upackb Ifx__initupackb( uint32 a, uint32 b, uint32 c, uint32 d)
873 {
874 % reg a, b, c, d
875 ! "%d2"
876 insert c, c, d, 8, 8
877 insert a, a, b, 8, 8
878 insert %d2, a, c, 16, 16
879 }
880
881 /** Initialize __packhw with two unsigned integers
882 */
883 asm __upackhw Ifx__initupackhw( uint16 a, uint16 b)
884 {
885 % reg a, b
886 ! "%d2"
887 insert %d2, a, b, 16, 16
888 }
889
890 /** \brief Insert sint8 into first byte of a __packb
891 */
892 asm __packb Ifx__insertbyte1(__packb a, sint8 b)
893 {
894 % reg a, b
895 ! "%d2"
896 insert %d2, a, b, 0, 8
897 }
898
899 /** \brief Insert sint8 into second byte of a __packb
900 */
901 asm __packb Ifx__insertbyte2(__packb a, sint8 b)
902 {
903 % reg a, b
904 ! "%d2"
905 insert %d2, a, b, 8, 8
906 }
907
908 /** \brief Insert sint8 into third byte of a __packb
909 */
910 asm __packb Ifx__insertbyte3(__packb a, sint8 b)
911 {
912 % reg a, b
913 ! "%d2"
914 insert %d2, a, b, 16, 8
915 }
916
917 /** \brief Insert sint8 into fourth byte of a __packb
918 */
919 asm __packb Ifx__insertbyte4(__packb a, sint8 b)
920 {
921 % reg a, b
922 ! "%d2"
923 insert %d2, a, b, 24, 8
924 }
925
926 /** Insert short into first halfword of a __packhw
927 */
928 asm __packhw Ifx__inserthw1(__packhw a, short b)
929 {
930 % reg a, b
931 ! "%d2"
932 insert %d2, a, b, 0, 16
933 }
934
935 /** Insert short into second halfword of a __packhw
936 */
937 asm __packhw Ifx__inserthw2(__packhw a, short b)
938 {
939 % reg a, b
940 ! "%d2"
941 insert %d2, a, b, 16, 16
942 }
943
944 /** \brief Insert uint8 into first unsigned byte of a __packb
945 */
946 asm __upackb Ifx__insertubyte1( __upackb a, uint8 b)
947 {
948 % reg a, b
949 ! "%d2"
950 insert %d2, a, b, 0, 8
951 }
952
953 /** \brief Insert uint8 into second unsigned byte of a __packb
954 */
955 asm __upackb Ifx__insertubyte2( __upackb a, uint8 b)
956 {
957 % reg a, b
958 ! "%d2"
959 insert %d2, a, b, 8, 8
960 }
961
962 /** \brief Insert uint8 into third unsigned byte of a __packb
963 */
964 asm __upackb Ifx__insertubyte3( __upackb a, uint8 b)
965 {
966 % reg a, b
967 ! "%d2"
968 insert %d2, a, b, 16, 8
969 }
970
971 /** \brief Insert uint8 into fourth unsigned byte of a __packb
972 */
973 asm __upackb Ifx__insertubyte4( __upackb a, uint8 b)
974 {
975 % reg a, b
976 ! "%d2"
977 insert %d2, a, b, 24, 8
978 }
979
980 /** Insert uint16 into first halfword of a __upackhw
981 */
982 asm __upackhw Ifx__insertuhw1( __upackhw a, uint16 b)
983 {
984 % reg a, b
985 ! "%d2"
986 insert %d2, a, b, 0, 16
987 }
988
989 /** Insert uint16 into second halfword of a __upackhw
990 */
991 asm __upackhw Ifx__insertuhw2( __upackhw a, uint16 b)
992 {
993 % reg a, b
994 ! "%d2"
995 insert %d2, a, b, 16, 16
996 }
997
998 /** Minimum of two __packb values
999 */
1000 #ifdef INTRINSIC_WORKAROUND
1001 extern __packb __minb(__packb a, __packb b);
1002 #else
1003 asm __packb Ifx__minb(__packb a, __packb b)
1004 {
1005 % reg a, b
1006 ! "%d2"
1007 min.b %d2, a, b
1008 }
1009 #endif
1010
1011 /** Minimum of two __upackb values
1012 */
1013 asm __upackb Ifx__minbu( __upackb a, __upackb b)
1014 {
1015 % reg a, b
1016 ! "%d2"
1017 min.bu %d2, a, b
1018 }
1019
1020 /** Minimum of two __packhw values
1021 */
1022 asm __packhw Ifx__minh(__packhw a, __packhw b)
1023 {
1024 % reg a, b
1025 ! "%d2"
1026 min.h %d2, a, b
1027 }
1028
1029 /** Minimum of two __upackhw values
1030 */
1031 asm __upackhw Ifx__minhu( __upackhw a, __upackhw b)
1032 {
1033 % reg a, b
1034 ! "%d2"
1035 min.hu %d2, a, b
1036 }
1037
1038 /** Insert sint8 into first byte of a __packb
1039 */
1040 asm volatile void Ifx__setbyte1(__packb* a, sint8 b)
1041 {
1042 % reg a, b
1043 ! "%d2"
1044 ld.w %d2, [a]
1045 insert %d2, %d2, b, 0, 8
1046 st.w [a], %d2
1047 }
1048
1049 /** Insert sint8 into second byte of a __packb
1050 */
1051 asm volatile void Ifx__setbyte2(__packb* a, sint8 b)
1052 {
1053 % reg a, b
1054 ! "%d2"
1055 ld.w %d2, [a]
1056 insert %d2, %d2, b, 8, 8
1057 st.w [a], %d2
1058 }
1059
1060 /** Insert sint8 into third byte of a __packb
1061 */
1062 asm volatile void Ifx__setbyte3(__packb* a, sint8 b)
1063 {
1064 % reg a, b
1065 ! "%d2"
1066 ld.w %d2, [a]
1067 insert %d2, %d2, b, 16, 8
1068 st.w [a], %d2
1069 }
1070
1071 /** Insert sint8 into fourth byte of a __packb
1072 */
1073 asm volatile void Ifx__setbyte4(__packb* a, sint8 b)
1074 {
1075 % reg a, b
1076 ! "%d2"
1077 ld.w %d2, [a]
1078 insert %d2, %d2, b, 24, 8
1079 st.w [a], %d2
1080 }
1081
1082 /** Insert short into first halfword of a __packhw
1083 */
1084 asm volatile void Ifx__sethw1(__packhw* a, short b)
1085 {
1086 % reg a, b
1087 ! "%d2"
1088 ld.w %d2, [a]
1089 insert %d2, %d2, b, 0, 16
1090 st.w [a], %d2
1091 }
1092
1093 /** Insert short into second halfword of a __packhw
1094 */
1095 asm volatile void Ifx__sethw2(__packhw* a, short b)
1096 {
1097 % reg a, b
1098 ! "%d2"
1099 ld.w %d2, [a]
1100 insert %d2, %d2, b, 16, 16
1101 st.w [a], %d2
1102 }
1103
1104 /** Insert uint8 into first byte of a __upackb
1105 */
1106 asm volatile void Ifx__setubyte1(__upackb* a, uint8 b)
1107 {
1108 % reg a, b
1109 ! "%d2"
1110 ld.w %d2, [a]
1111 insert %d2, %d2, b, 0, 8
1112 st.w [a], %d2
1113 }
1114
1115 /** Insert uint8 into second byte of a __upackb
1116 */
1117 asm volatile void Ifx__setubyte2(__upackb* a, uint8 b)
1118 {
1119 % reg a, b
1120 ! "%d2"
1121 ld.w %d2, [a]
1122 insert %d2, %d2, b, 8, 8
1123 st.w [a], %d2
1124 }
1125
1126 /** Insert uint8 into third byte of a __upackb
1127 */
1128 asm volatile void Ifx__setubyte3(__upackb* a, uint8 b)
1129 {
1130 % reg a, b
1131 ! "%d2"
1132 ld.w %d2, [a]
1133 insert %d2, %d2, b, 16, 8
1134 st.w [a], %d2
1135 }
1136
1137 /** Insert uint8 into fourth byte of a __upackb
1138 */
1139 asm volatile void Ifx__setubyte4(__upackb* a, uint8 b)
1140 {
1141 % reg a, b
1142 ! "%d2"
1143 ld.w %d2, [a]
1144 insert %d2, %d2, b, 24, 8
1145 st.w [a], %d2
1146 }
1147
1148 /** Insert uint16 into first halfword of a __upackhw
1149 */
1150 asm volatile void Ifx__setuhw1(__upackhw* a, uint16 b)
1151 {
1152 % reg a, b
1153 ! "%d2"
1154 ld.w %d2, [a]
1155 insert %d2, %d2, b, 0, 16
1156 st.w [a], %d2
1157 }
1158
1159 /** Insert uint16 into second halfword of a __upackhw
1160 */
1161 asm volatile void Ifx__setuhw2(__upackhw* a, uint16 b)
1162 {
1163 % reg a, b
1164 ! "%d2"
1165 ld.w %d2, [a]
1166 insert %d2, %d2, b, 16, 16
1167 st.w [a], %d2
1168 }
1169
1170 /** \} */
1171
1172 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_register Register Handling
1173 The next table provides an overview of the intrinsic functions that you can use to access control registers.
1174 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
1175 * \{
1176 */
1177
1178 /** Return absolute value
1179 */
1180 extern sint32 __abs( sint32) __attribute__((intrinsic_pseudo(1, "abs") ));
1181
1182 #define Ifx__abs __abs
1183
1184 /** Return absolue difference of two integers
1185 */
1186 extern sint32 __absdif( sint32, sint32) __attribute__((intrinsic_pseudo(1, "absdif") ));
1187
1188 #define Ifx__absdif __absdif
1189
1190 /** Return absolute value with saturation
1191 */
1192 extern sint32 __abss( sint32) __attribute__((intrinsic_pseudo(1, "abss") ));
1193
1194 #define Ifx__abss __abss
1195
1196 /** Count leading ones in int
1197 */
1198 extern sint32 __clo( sint32) __attribute__((intrinsic_pseudo(1, "clo") ));
1199
1200 #define Ifx__clo __clo
1201
1202 /** Count number of redundant sign bits (all consecutive bits with the same value as bit 31
1203 */
1204 extern sint32 __cls( sint32) __attribute__((intrinsic_pseudo(1, "cls") ));
1205
1206 #define Ifx__cls __cls
1207
1208 /** Count leading zeros in int
1209 */
1210 extern sint32 __clz( sint32) __attribute__((intrinsic_pseudo(1, "clz") ));
1211
1212 #define Ifx__clz __clz
1213
1214 /** Return absolute double precision floating-point value
1215 */
1216 asm double Ifx__fabs(double d)
1217 {
1218 % reg d
1219 ! "%d2"
1220 insert %d2, d, 0, 31, 1
1221 }
1222
1223 /** Return absolute floating-point value
1224 */
1225 asm float Ifx__fabsf(float f)
1226 {
1227 % reg f
1228 ! "%d2"
1229 insert %d2, f, 0, 31, 1
1230 }
1231
1232 /** Move contents of the addressed core SFR into a data register
1233 */
1234 extern sint32 __mfcr( const uint32) __attribute__((intrinsic_function(0x101, 0, "mfcr") ));
1235
1236 #define Ifx__mfcr __mfcr
1237
1238 /** Move contents of a data register (second sint32) to the addressed core SFR (first sint32)
1239 */
1240 extern void __mtcr( const uint32, sint32) __attribute__((intrinsic_function(0x102, 0, "mtcr") ));
1241
1242 #define Ifx__mtcr __mtcr
1243
1244 /** Return parity
1245 */
1246 asm volatile sint32 Ifx__parity(sint32 a)
1247 {
1248 % reg a
1249 ! "%d2"
1250 parity %d2, a
1251 }
1252
1253 /** Return saturated byte
1254 */
1255 asm sint8 Ifx__satb(sint32 a)
1256 {
1257 % reg a
1258 ! "%d2"
1259 sat.b %d2, a
1260 }
1261
1262 /** Return saturated unsigned byte
1263 */
1264 asm volatile uint8 Ifx__satbu(sint32 a)
1265 {
1266 % reg a
1267 ! "%d2"
1268 sat.bu %d2, a
1269 }
1270
1271 /** Return saturated halfword
1272 */
1273 asm short Ifx__sath(sint32 a)
1274 {
1275 % reg a
1276 ! "%d2"
1277 sat.h %d2, a
1278 }
1279
1280 /** Return saturated unsignedhalfword
1281 */
1282 asm volatile uint16 Ifx__sathu(sint32 a)
1283 {
1284 % reg a
1285 ! "%d2"
1286 sat.hu %d2, a
1287 }
1288
1289 /** \} */
1290
1291 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_saturation Saturation Arithmetic Support
1292 These intrinsics support saturation arithmetic
1293 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
1294 * \{
1295 */
1296 /** add signed with saturation
1297 */
1298 extern sint32 __adds( sint32, sint32) __attribute__((intrinsic_pseudo(1, "adds") ));
1299
1300 #define Ifx__adds __adds
1301
1302 /** add unsigned with saturation
1303 */
1304 asm volatile uint32 Ifx__addsu(uint32 a, uint32 b)
1305 {
1306 % reg a, b
1307 ! "%d2"
1308 adds.u %d2, a, b
1309 }
1310
1311 /** substract signed with saturation
1312 */
1313 asm volatile sint32 Ifx__subs(sint32 a, sint32 b)
1314 {
1315 % reg a, b
1316 ! "%d2"
1317 subs %d2, a, b
1318 }
1319
1320 /** substract unsigned with saturation
1321 */
1322 asm volatile uint32 Ifx__subsu(uint32 a, uint32 b)
1323 {
1324 % reg a, b
1325 ! "%d2"
1326 subs.u %d2, a, b
1327 }
1328
1329 /** \} */
1330
1331 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_single_assembly Insert Single Assembly Instruction
1332 The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
1333 instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
1334 assembly instructions.
1335 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
1336 * \{
1337 */
1338
1339 /** Insert DEBUG instruction
1340 */
1341 extern void __debug( void) __attribute__((intrinsic_function(0x103, 0, "debug") ));
1342
1343 #define Ifx__debug __debug
1344
1345 /** Insert DSYNC instruction
1346 */
1347 extern void __dsync( void) __attribute__((intrinsic_function(0x103, 0, "dsync") ));
1348
1349 #define Ifx__dsync __dsync
1350
1351 /** Insert ISYNC instruction
1352 */
1353 extern void __isync( void) __attribute__((intrinsic_function(0x103, 0, "isync") ));
1354
1355 #define Ifx__isync __isync
1356
1357 /** Insert LDMST instruction. Note that all operands must be word-aligned.
1358 */
1359 #ifdef INTRINSIC_WORKAROUND
1360 #define __ldmst __ldmst_c
1361 #else
1362 asm volatile void Ifx__ldmst(volatile void *address, uint32 mask, uint32 value)
1363 {
1364 %reg address, mask, value;
1365 !"%d2", "%d3"
1366 mov %d3, mask
1367 mov %d2, value
1368 ldmst [address],%e2
1369 }
1370
1371 #endif
1372
1373 extern void __scheduling_barrier( void) __attribute__((intrinsic_function(9, 4, "$$sb") ));
1374 #define Ifx__mem_barrier __scheduling_barrier
1375
1376 /** Insert NOP instruction
1377 */
1378 extern void __nop( void) __attribute__((intrinsic_function(0x103, 0, "nop") ));
1379
1380 #define Ifx__nop __nop
1381
1382 #define Ifx__NOP __nops
1383
1384 /** Insert a loop over n NOP instruction
1385 */
1386 asm volatile void Ifx__nops(uint32 cnt)
1387 {
1388 % reg cnt;lab L0;
1389 ! "%a2"
1390 mov %a2,cnt
1391 add.a %a2, -1
1392 L0:
1393 nop
1394 loop %a2, L0
1395 }
1396
1397 /** Insert a loop over n times 1000 NOP instruction
1398 */
1399 asm volatile void Ifx__nops1000(uint32 x)
1400 {
1401 % reg x;
1402 lab L0, L1
1403 ! "%a2", "%a3"
1404 mov.a %a2, x
1405 L1:
1406 lea %a3, 999
1407 L0:
1408 nop
1409 nop
1410 loop %a3, L0
1411 loop %a2, L1
1412 }
1413
1414 /** Insert RSLCX instruction
1415 */
1416 extern void __rslcx( void) __attribute__((intrinsic_function(0x103, 0, "rslcx") ));
1417
1418 #define Ifx__rslcx
1419
1420 /** Insert SVLCX instruction
1421 */
1422 extern void __svlcx( void) __attribute__((intrinsic_function(0x103, 0, "svlcx") ));
1423
1424 #define Ifx__svlcx
1425
1426 /** Insert SWAP instruction. Note that all operands must be word-aligned.
1427 */
1428 #ifdef INTRINSIC_WORKAROUND
1429 extern uint32 __swap(void* place, uint32 value);
1430 #else
1431 asm volatile uint32 Ifx__swap(void* place, uint32 value)
1432 {
1433 % reg place, value
1434 ! "%d2"
1435 mov %d2, value
1436 swap.w [place], %d2
1437 }
1438 #endif
1439
1440 // FIXME
1441 asm volatile unsigned int Ifx__cmpAndSwap(unsigned int *address, unsigned long value, unsigned long CmpVal)
1442 {
1443 %reg value, address, CmpVal
1444 ! "%d2", "%d3"
1445 mov %d2,value
1446 mov %d3,CmpVal
1447 cmpswap.w [address], %e2
1448 }
1449 /** \} */
1450
1451 /** Insert n NOP instruction
1452 */
1453 //#info "NOP: Feature not yet implemented."
1454
1455 #define Ifx__setareg(areg,val) ___setareg(areg,val)
1456 /* we need to use a15 for the address register and not direct that the compiler this will not remove */
1457 #define ___setareg(areg,val) \
1458 { __asm ("#$$bp"); \
1459 __asm (" movh.a\t %a15,"#val"@ha\n"); \
1460 __asm (" lea\t %a15,[%a15]"#val"@l\n"); \
1461 __asm (" mov.aa %"#areg", %a15\n"); \
1462 __asm ("#$$ep"); }
1463
1464 /* FIXME check that the compiler take in account that d0 is used by the inline function */
1465 asm volatile void Ifx__stopPerfCounters(void)
1466 {
1467 ! "%d0"
1468 mov %d0,0
1469 mtcr 0xFC00,%d0
1470 isync
1471 }
1472
1473 /** \brief Convert a fixpoint value to float32
1474 *
1475 * This function converts a value from a fixpoint format to a float32 format.
1476 *
1477 *
1478 * \param value value to be converted.
1479 * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
1480 *
1481 * \return Returns the converted value in the float32 format.
1482 *
1483 */
1484 asm float Ifx__fixpoint_to_float32(fract value, sint32 shift)
1485 {
1486 % reg value, shift
1487 ! "%d2"
1488 q31tof %d2, value, shift
1489 }
1490
1491 asm volatile void* Ifx__getA11(void)
1492 {
1493 ! "%a11", "%a2"
1494 mov.aa %a2, %a11
1495 }
1496
1497 asm void Ifx__setStackPointer(void *stackAddr)
1498 {
1499 % reg stackAddr
1500 ! "%a10"
1501 mov.aa %a10, stackAddr
1502 }
1503
1504 asm volatile unsigned int Ifx__crc32(uint32 b,uint32 a)
1505 {
1506 % reg b, a
1507 ! "%d2"
1508 CRC32B.W %d2, b, a
1509 }
1510
1511 IFX_INLINE unsigned int IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
1512 {
1513 uint32 returnvalue = 0; /* set seed value to 0 */
1514 for (;length > 0; length--)
1515 {
1516 /* calculate the CRC over all data */
1517 returnvalue = Ifx__crc32(returnvalue,*startaddress);
1518 startaddress++;
1519 }
1520 return returnvalue;
1521 }
1522
1523 /** \brief Generate the Random value
1524 *
1525 * This function generates the random value by taking a valid seed and limits.
1526 *
1527 * \param a lower limit.
1528 * \param x valid seed value.
1529 * \param m upper limit.
1530 *
1531 * \return Returns the random value.
1532 *
1533 */
1534 asm volatile uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
1535 {
1536 % reg a,x,m; lab cmp_m, sub_m, done;
1537 ! "%d4","%d5","%d6","%d0","%d1","%d2"
1538 mul.u %e4,a,x /* d5 = Eh; d4 = El */
1539 mov %d0,%d4 /* e0 = El */
1540 mov %d1, 0
1541 madd.u %e4,%e0,%d5,5 /* e4 = El + 5 * d5 */
1542 cmp_m:
1543 jge.u %d4,m,sub_m
1544 jz %d5,done
1545 sub_m:
1546 subx %d4,%d4,m /* e4=e4-m */
1547 subc %d5,%d5,%d1 /* d5=d5-0 */
1548 loopu cmp_m
1549 done:
1550 mov %d2,%d4
1551 }
1552
1553 /* Macros for backward compatibility of the intrinsics*/
1554 /******************************************************************************/
1555 #ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
1556 #ifndef __non_return_call
1557 #define __non_return_call Ifx__non_return_call
1558 #endif
1559
1560 #ifndef __jump_and_link
1561 #define __jump_and_link Ifx__jump_and_link
1562 #endif
1563
1564 #ifndef __moveToDataParam0
1565 #define __moveToDataParam0 Ifx__moveToDataParam0
1566 #endif
1567
1568 #ifndef __moveToDataParamRet
1569 #define __moveToDataParamRet Ifx__moveToDataParamRet
1570 #endif
1571
1572 #ifndef __getDataParamRet
1573 #define __getDataParamRet Ifx__getDataParamRet
1574 #endif
1575
1576 #ifndef __moveToAddrParam0
1577 #define __moveToAddrParam0 Ifx__moveToAddrParam0
1578 #endif
1579
1580 #ifndef __jumpToFunction
1581 #define __jumpToFunction Ifx__jumpToFunction
1582 #endif
1583
1584 #ifndef __jumpToFunctionWithLink
1585 #define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
1586 #endif
1587
1588 #ifndef __jumpBackToLink
1589 #define __jumpBackToLink Ifx__jumpBackToLink
1590 #endif
1591
1592 #ifndef __minX
1593 #define __minX Ifx__minX
1594 #endif
1595
1596 #ifndef __maxX
1597 #define __maxX Ifx__maxX
1598 #endif
1599
1600 #ifndef __saturateX
1601 #define __saturateX Ifx__saturateX
1602 #endif
1603
1604 #ifndef __checkrangeX
1605 #define __checkrangeX Ifx__checkrangeX
1606 #endif
1607
1608 #ifndef __saturate
1609 #define __saturate Ifx__saturate
1610 #endif
1611
1612 #ifndef __sqrf
1613 #define __sqrf Ifx__sqrf
1614 #endif
1615
1616 #ifndef __sqrtf
1617 #define __sqrtf Ifx__sqrtf
1618 #endif
1619
1620 #ifndef __checkrange
1621 #define __checkrange Ifx__checkrange
1622 #endif
1623
1624 #ifndef __roundf
1625 #define __roundf Ifx__roundf
1626 #endif
1627
1628 #ifndef __absf
1629 #define __absf Ifx__absf
1630 #endif
1631
1632 #ifndef __minf
1633 #define __minf Ifx__minf
1634 #endif
1635
1636 #ifndef __maxf
1637 #define __maxf Ifx__maxf
1638 #endif
1639
1640 #ifndef __saturatef
1641 #define __saturatef Ifx__saturatef
1642 #endif
1643
1644 #ifndef __checkrangef
1645 #define __checkrangef Ifx__checkrangef
1646 #endif
1647
1648 #ifndef __abs_stdreal
1649 #define __abs_stdreal Ifx__abs_stdreal
1650 #endif
1651
1652 #ifndef __min_stdreal
1653 #define __min_stdreal Ifx__min_stdreal
1654 #endif
1655
1656 #ifndef __max_stdreal
1657 #define __max_stdreal Ifx__max_stdreal
1658 #endif
1659
1660 #ifndef __saturate_stdreal
1661 #define __saturate_stdreal Ifx__saturate_stdreal
1662 #endif
1663
1664 #ifndef __neqf
1665 #define __neqf Ifx__neqf
1666 #endif
1667
1668 #ifndef __leqf
1669 #define __leqf Ifx__leqf
1670 #endif
1671
1672 #ifndef __geqf
1673 #define __geqf Ifx__geqf
1674 #endif
1675
1676 #ifndef __clssf
1677 #define __clssf Ifx__clssf
1678 #endif
1679
1680 #ifndef __float_to_fract
1681 #define __float_to_fract Ifx__float_to_fract
1682 #endif
1683
1684 #ifndef __fract_to_float
1685 #define __fract_to_float Ifx__fract_to_float
1686 #endif
1687
1688 #ifndef __getfract
1689 #define __getfract Ifx__getfract
1690 #endif
1691
1692 #ifndef __mac_r_sf
1693 #define __mac_r_sf Ifx__mac_r_sf
1694 #endif
1695
1696 #ifndef __mac_sf
1697 #define __mac_sf Ifx__mac_sf
1698 #endif
1699
1700 #ifndef __mulfractfract
1701 #define __mulfractfract Ifx__mulfractfract
1702 #endif
1703
1704 #ifndef __mulfractlong
1705 #define __mulfractlong Ifx__mulfractlong
1706 #endif
1707
1708 #ifndef __round16
1709 #define __round16 Ifx__round16
1710 #endif
1711
1712 #ifndef __fract_to_sfract
1713 #define __fract_to_sfract Ifx__fract_to_sfract
1714 #endif
1715
1716 #ifndef __round16
1717 #define __round16 Ifx__round16
1718 #endif
1719
1720 #ifndef __s16_to_sfract
1721 #define __s16_to_sfract Ifx__s16_to_sfract
1722 #endif
1723
1724 #ifndef __sfract_to_s16
1725 #define __sfract_to_s16 Ifx__sfract_to_s16
1726 #endif
1727
1728 #ifndef __sfract_to_u16
1729 #define __sfract_to_u16 Ifx__sfract_to_u16
1730 #endif
1731
1732 #ifndef __shaaccum
1733 #define __shaaccum Ifx__shaaccum
1734 #endif
1735
1736 #ifndef __shafracts
1737 #define __shafracts Ifx__shafracts
1738 #endif
1739
1740 #ifndef __shasfracts
1741 #define __shasfracts Ifx__shasfracts
1742 #endif
1743
1744 #ifndef __u16_to_sfract
1745 #define __u16_to_sfract Ifx__u16_to_sfract
1746 #endif
1747
1748 #ifndef __getbit
1749 #define __getbit Ifx__getbit
1750 #endif
1751
1752 #ifndef __imaskldmst
1753 #define __imaskldmst Ifx__imaskldmst
1754 #endif
1755
1756 #ifndef __putbit
1757 #define __putbit Ifx__putbit
1758 #endif
1759
1760 #ifndef __cacheawi_bo_post_inc
1761 #define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
1762 #endif
1763
1764 #ifndef __cacheiwi
1765 #define __cacheiwi Ifx__cacheiwi
1766 #endif
1767
1768 #ifndef __mulsc
1769 #define __mulsc Ifx__mulsc
1770 #endif
1771
1772 #ifndef __rol
1773 #define __rol Ifx__rol
1774 #endif
1775
1776 #ifndef __ror
1777 #define __ror Ifx__ror
1778 #endif
1779
1780 #ifndef __absb
1781 #define __absb Ifx__absb
1782 #endif
1783
1784 #ifndef __absh
1785 #define __absh Ifx__absh
1786 #endif
1787
1788 #ifndef __abssh
1789 #define __abssh Ifx__abssh
1790 #endif
1791
1792 #ifndef __extractbyte1
1793 #define __extractbyte1 Ifx__extractbyte1
1794 #endif
1795
1796 #ifndef __extractbyte2
1797 #define __extractbyte2 Ifx__extractbyte2
1798 #endif
1799
1800 #ifndef __extractbyte3
1801 #define __extractbyte3 Ifx__extractbyte3
1802 #endif
1803
1804 #ifndef __extractbyte4
1805 #define __extractbyte4 Ifx__extractbyte4
1806 #endif
1807
1808 #ifndef __extracthw1
1809 #define __extracthw1 Ifx__extracthw1
1810 #endif
1811
1812 #ifndef __extracthw2
1813 #define __extracthw2 Ifx__extracthw2
1814 #endif
1815
1816 #ifndef __extractubyte1
1817 #define __extractubyte1 Ifx__extractubyte1
1818 #endif
1819
1820 #ifndef __extractubyte2
1821 #define __extractubyte2 Ifx__extractubyte2
1822 #endif
1823
1824 #ifndef __extractubyte3
1825 #define __extractubyte3 Ifx__extractubyte3
1826 #endif
1827
1828 #ifndef __extractubyte4
1829 #define __extractubyte4 Ifx__extractubyte4
1830 #endif
1831
1832 #ifndef __extractuhw1
1833 #define __extractuhw1 Ifx__extractuhw1
1834 #endif
1835
1836 #ifndef __extractuhw2
1837 #define __extractuhw2 Ifx__extractuhw2
1838 #endif
1839
1840 #ifndef __getbyte1
1841 #define __getbyte1 Ifx__getbyte1
1842 #endif
1843
1844 #ifndef __getbyte2
1845 #define __getbyte2 Ifx__getbyte2
1846 #endif
1847
1848 #ifndef __getbyte3
1849 #define __getbyte3 Ifx__getbyte3
1850 #endif
1851
1852 #ifndef __getbyte4
1853 #define __getbyte4 Ifx__getbyte4
1854 #endif
1855
1856 #ifndef __gethw1
1857 #define __gethw1 Ifx__gethw1
1858 #endif
1859
1860 #ifndef __gethw2
1861 #define __gethw2 Ifx__gethw2
1862 #endif
1863
1864 #ifndef __getubyte1
1865 #define __getubyte1 Ifx__getubyte1
1866 #endif
1867
1868 #ifndef __getubyte2
1869 #define __getubyte2 Ifx__getubyte2
1870 #endif
1871
1872 #ifndef __getubyte3
1873 #define __getubyte3 Ifx__getubyte3
1874 #endif
1875
1876 #ifndef __getubyte4
1877 #define __getubyte4 Ifx__getubyte4
1878 #endif
1879
1880 #ifndef __getuhw1
1881 #define __getuhw1 Ifx__getuhw1
1882 #endif
1883
1884 #ifndef __getuhw2
1885 #define __getuhw2 Ifx__getuhw2
1886 #endif
1887
1888 #ifndef __initpackb
1889 #define __initpackb Ifx__initpackb
1890 #endif
1891
1892 #ifndef __initpackbl
1893 #define __initpackbl Ifx__initpackbl
1894 #endif
1895
1896 #ifndef __initpackhw
1897 #define __initpackhw Ifx__initpackhw
1898 #endif
1899
1900 #ifndef __initpackhwl
1901 #define __initpackhwl Ifx__initpackhwl
1902 #endif
1903
1904 #ifndef __initupackb
1905 #define __initupackb Ifx__initupackb
1906 #endif
1907
1908 #ifndef __initupackhw
1909 #define __initupackhw Ifx__initupackhw
1910 #endif
1911
1912 #ifndef __insertbyte1
1913 #define __insertbyte1 Ifx__insertbyte1
1914 #endif
1915
1916 #ifndef __insertbyte2
1917 #define __insertbyte2 Ifx__insertbyte2
1918 #endif
1919
1920 #ifndef __insertbyte3
1921 #define __insertbyte3 Ifx__insertbyte3
1922 #endif
1923
1924 #ifndef __insertbyte4
1925 #define __insertbyte4 Ifx__insertbyte4
1926 #endif
1927
1928 #ifndef __inserthw1
1929 #define __inserthw1 Ifx__inserthw1
1930 #endif
1931
1932 #ifndef __inserthw2
1933 #define __inserthw2 Ifx__inserthw2
1934 #endif
1935
1936 #ifndef __insertubyte1
1937 #define __insertubyte1 Ifx__insertubyte1
1938 #endif
1939
1940 #ifndef __insertubyte2
1941 #define __insertubyte2 Ifx__insertubyte2
1942 #endif
1943
1944 #ifndef __insertubyte3
1945 #define __insertubyte3 Ifx__insertubyte3
1946 #endif
1947
1948 #ifndef __insertubyte4
1949 #define __insertubyte4 Ifx__insertubyte4
1950 #endif
1951
1952 #ifndef __insertuhw1
1953 #define __insertuhw1 Ifx__insertuhw1
1954 #endif
1955
1956 #ifndef __insertuhw2
1957 #define __insertuhw2 Ifx__insertuhw2
1958 #endif
1959
1960 #ifndef __minb
1961 #define __minb Ifx__minb
1962 #endif
1963
1964 #ifndef __minbu
1965 #define __minbu Ifx__minbu
1966 #endif
1967
1968 #ifndef __minh
1969 #define __minh Ifx__minh
1970 #endif
1971
1972 #ifndef __minhu
1973 #define __minhu Ifx__minhu
1974 #endif
1975
1976 #ifndef __setbyte1
1977 #define __setbyte1 Ifx__setbyte1
1978 #endif
1979
1980 #ifndef __setbyte2
1981 #define __setbyte2 Ifx__setbyte2
1982 #endif
1983
1984 #ifndef __setbyte3
1985 #define __setbyte3 Ifx__setbyte3
1986 #endif
1987
1988 #ifndef __setbyte4
1989 #define __setbyte4 Ifx__setbyte4
1990 #endif
1991
1992 #ifndef __sethw1
1993 #define __sethw1 Ifx__sethw1
1994 #endif
1995
1996 #ifndef __sethw2
1997 #define __sethw2 Ifx__sethw2
1998 #endif
1999
2000 #ifndef __setubyte1
2001 #define __setubyte1 Ifx__setubyte1
2002 #endif
2003
2004 #ifndef __setubyte2
2005 #define __setubyte2 Ifx__setubyte2
2006 #endif
2007
2008 #ifndef __setubyte3
2009 #define __setubyte3 Ifx__setubyte3
2010 #endif
2011
2012 #ifndef __setubyte4
2013 #define __setubyte4 Ifx__setubyte4
2014 #endif
2015
2016 #ifndef __setuhw1
2017 #define __setuhw1 Ifx__setuhw1
2018 #endif
2019
2020 #ifndef __setuhw2
2021 #define __setuhw2 Ifx__setuhw2
2022 #endif
2023
2024 #ifndef __fabs
2025 #define __fabs Ifx__fabs
2026 #endif
2027
2028 #ifndef __fabsf
2029 #define __fabsf Ifx__fabsf
2030 #endif
2031
2032 #ifndef __parity
2033 #define __parity Ifx__parity
2034 #endif
2035
2036 #ifndef __satb
2037 #define __satb Ifx__satb
2038 #endif
2039
2040 #ifndef __satbu
2041 #define __satbu Ifx__satbu
2042 #endif
2043
2044 #ifndef __sath
2045 #define __sath Ifx__sath
2046 #endif
2047
2048 #ifndef __sathu
2049 #define __sathu Ifx__sathu
2050 #endif
2051
2052 #ifndef __addsu
2053 #define __addsu Ifx__addsu
2054 #endif
2055
2056 #ifndef __subs
2057 #define __subs Ifx__subs
2058 #endif
2059
2060 #ifndef __subsu
2061 #define __subsu Ifx__subsu
2062 #endif
2063
2064 #ifndef __ldmst
2065 #define __ldmst Ifx__ldmst
2066 #endif
2067
2068 #ifndef __mem_barrier
2069 #define __mem_barrier Ifx__mem_barrier
2070 #endif
2071
2072 #if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
2073 #define NOP Ifx__NOP
2074 #endif
2075
2076 #ifndef __nops
2077 #define __nops Ifx__nops
2078 #endif
2079
2080 #ifndef __nops1000
2081 #define __nops1000 Ifx__nops1000
2082 #endif
2083
2084 #ifndef __swap
2085 #define __swap Ifx__swap
2086 #endif
2087
2088 #ifndef __cmpAndSwap
2089 #define __cmpAndSwap Ifx__cmpAndSwap
2090 #endif
2091
2092 #ifndef __setareg
2093 #define __setareg Ifx__setareg
2094 #endif
2095
2096 #ifndef __stopPerfCounters
2097 #define __stopPerfCounters Ifx__stopPerfCounters
2098 #endif
2099
2100 #ifndef __fixpoint_to_float32
2101 #define __fixpoint_to_float32 Ifx__fixpoint_to_float32
2102 #endif
2103
2104 #ifndef __getA11
2105 #define __getA11 Ifx__getA11
2106 #endif
2107
2108 #ifndef __setStackPointer
2109 #define __setStackPointer Ifx__setStackPointer
2110 #endif
2111
2112 #if ((!defined(__crc32)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
2113 #define __crc32 Ifx__crc32
2114 #endif
2115
2116 #endif
2117 /******************************************************************************/
2118 /* *INDENT-ON* */
2119 /******************************************************************************/
2120 #endif /* IFXCPU_INTRINSICSDCC_H */
Ifx__fract_to_float
#define Ifx__fract_to_float(value)
Definition: IfxCpu_IntrinsicsTasking.h:160
Ifx__insertubyte3
asm __upackb Ifx__insertubyte3(__upackb a, uint8 b)
Insert uint8 into third unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:964
Ifx__getDataParamRet
asm volatile unsigned int Ifx__getDataParamRet(void)
Definition: IfxCpu_IntrinsicsDcc2G.h:88
Ifx__setubyte1
asm volatile void Ifx__setubyte1(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1106
Ifx__extractbyte4
asm sint8 Ifx__extractbyte4(__packb a)
Extract fourth byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:633
__mtcr
void __mtcr(const uint32, sint32) __attribute__((intrinsic_function(0x102
Ifx__satbu
asm volatile uint8 Ifx__satbu(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1264
Ifx__minb
asm __packb Ifx__minb(__packb a, __packb b)
Definition: IfxCpu_IntrinsicsDcc.h:1003
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
__disable
void __disable(void) __attribute__((intrinsic_function(0x103
Ifx__nops
asm volatile void Ifx__nops(uint32 cnt)
Definition: IfxCpu_IntrinsicsDcc.h:1386
cls
sint32 cls
Definition: IfxCpu_IntrinsicsDcc2G.h:1204
Ifx__jumpToFunctionWithLink
IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
Definition: IfxCpu_IntrinsicsDcc2G.h:106
Ifx__cacheiwi
asm volatile void Ifx__cacheiwi(uint8 *p)
Definition: IfxCpu_IntrinsicsDcc.h:519
Ifx__mulsc
asm volatile sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
Definition: IfxCpu_IntrinsicsDcc.h:542
abs
sint32 abs
Definition: IfxCpu_IntrinsicsDcc2G.h:1180
Ifx__mac_sf
asm sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsDcc.h:260
Ifx__s16_to_sfract
asm sfract Ifx__s16_to_sfract(short a)
Definition: IfxCpu_IntrinsicsDcc.h:309
Ifx__non_return_call
asm volatile void Ifx__non_return_call(void(*fun)(void))
Definition: IfxCpu_IntrinsicsDcc.h:58
Ifx__insertubyte2
asm __upackb Ifx__insertubyte2(__upackb a, uint8 b)
Insert uint8 into second unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:955
Ifx__imaskldmst
asm volatile void Ifx__imaskldmst(void *a, sint32 b, sint32 p, const sint32 w)
Definition: IfxCpu_IntrinsicsDcc.h:436
__adds
sint32 __adds(sint32, sint32) __attribute__((intrinsic_pseudo(1
__mins
sint32 __mins(sint32, sint32) __attribute__((intrinsic_function(0x10b
Ifx__getbyte4
asm sint8 Ifx__getbyte4(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:744
__packb
long __packb
Definition: Ifx_TypesDcc.h:47
__float_to_sfract
IFX_INLINE sfract __float_to_sfract(float a)
Definition: IfxCpu_IntrinsicsDcc.h:301
sfract
short sfract
Definition: Ifx_TypesDcc.h:45
__mfcr
sint32 __mfcr(const uint32) __attribute__((intrinsic_function(0x101
Ifx__cacheawi_bo_post_inc
asm volatile uint8 * Ifx__cacheawi_bo_post_inc(uint8 *p)
Definition: IfxCpu_IntrinsicsDcc.h:509
Ifx__initupackhw
asm __upackhw Ifx__initupackhw(uint16 a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:883
Ifx__setubyte4
asm volatile void Ifx__setubyte4(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1139
Ifx__sath
asm short Ifx__sath(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1273
Ifx__extractuhw1
asm volatile uint16 Ifx__extractuhw1(__upackhw a)
Definition: IfxCpu_IntrinsicsDcc.h:696
Ifx__ror
asm volatile uint32 Ifx__ror(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsDcc.h:561
Ifx__getuhw1
asm volatile uint16 Ifx__getuhw1(__upackhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:814
Ifx__absh
asm __packhw Ifx__absh(__packhw a)
Definition: IfxCpu_IntrinsicsDcc.h:588
Ifx__insertbyte2
asm __packb Ifx__insertbyte2(__packb a, sint8 b)
Insert sint8 into second byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:901
Ifx__gethw2
asm short Ifx__gethw2(__packhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:764
__clo
sint32 __clo(sint32) __attribute__((intrinsic_pseudo(1
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
Ifx__fract_to_sfract
#define Ifx__fract_to_sfract
Definition: IfxCpu_IntrinsicsDcc2G.h:297
Ifx__satb
asm sint8 Ifx__satb(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1255
Ifx__setuhw1
asm volatile void Ifx__setuhw1(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:1150
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx__absb
asm __packb Ifx__absb(__packb a)
Definition: IfxCpu_IntrinsicsDcc.h:579
Ifx__moveToDataParam0
asm volatile void Ifx__moveToDataParam0(unsigned int var)
Definition: IfxCpu_IntrinsicsDcc2G.h:74
Ifx__sfract_to_s16
asm short Ifx__sfract_to_s16(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:319
Ifx__shasfracts
asm sfract Ifx__shasfracts(sfract a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:371
Ifx__initpackhw
asm __packhw Ifx__initpackhw(short a, short b)
Initialize __packhw with two integers.
Definition: IfxCpu_IntrinsicsDcc.h:854
Ifx__ldmst
#define Ifx__ldmst(addr, mask, data)
Definition: IfxCpu_IntrinsicsTasking.h:294
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesDcc.h:50
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
Ifx__extractubyte3
asm volatile uint8 Ifx__extractubyte3(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:678
Ifx__u16_to_sfract
asm sfract Ifx__u16_to_sfract(uint16 a)
Definition: IfxCpu_IntrinsicsDcc.h:381
Ifx__mac_r_sf
asm sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsDcc.h:247
Ifx__initupackb
asm __upackb Ifx__initupackb(uint32 a, uint32 b, uint32 c, uint32 d)
Definition: IfxCpu_IntrinsicsDcc.h:872
__ins
uint32 __ins(uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
Ifx__setubyte3
asm volatile void Ifx__setubyte3(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1128
__isync
void __isync(void) __attribute__((intrinsic_function(0x103
__swap
#define __swap
Definition: IfxCpu_IntrinsicsDcc2G.h:2085
Ifx__insertbyte1
asm __packb Ifx__insertbyte1(__packb a, sint8 b)
Insert sint8 into first byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:892
mtcr
void mtcr
Definition: IfxCpu_IntrinsicsDcc2G.h:1240
Ifx__sethw2
asm volatile void Ifx__sethw2(__packhw *a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:1095
Ifx__setbyte2
asm volatile void Ifx__setbyte2(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1051
Ifx__getubyte1
asm volatile uint8 Ifx__getubyte1(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:774
__mac_sf
#define __mac_sf
Definition: IfxCpu_IntrinsicsDcc2G.h:1697
Ifx__subsu
#define Ifx__subsu(a, b)
Definition: IfxCpu_IntrinsicsTasking.h:232
Ifx__extractubyte2
asm volatile uint8 Ifx__extractubyte2(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:669
Ifx__minhu
asm __upackhw Ifx__minhu(__upackhw a, __upackhw b)
Definition: IfxCpu_IntrinsicsDcc.h:1031
Ifx__getA11
asm volatile void * Ifx__getA11(void)
Definition: IfxCpu_IntrinsicsDcc2G.h:1491
Ifx__extractuhw2
asm volatile uint16 Ifx__extractuhw2(__upackhw a)
Definition: IfxCpu_IntrinsicsDcc.h:705
__mac_r_sf
#define __mac_r_sf
Definition: IfxCpu_IntrinsicsDcc2G.h:1693
Ifx__gethw1
asm short Ifx__gethw1(__packhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:754
Ifx__getubyte2
asm volatile uint8 Ifx__getubyte2(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:784
circ_t
unsigned long long circ_t
Definition: Ifx_TypesDcc.h:52
Ifx__insertubyte4
asm __upackb Ifx__insertubyte4(__upackb a, uint8 b)
Insert uint8 into fourth unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:973
Ifx__extractbyte1
asm sint8 Ifx__extractbyte1(__packb a)
Extract first byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:606
__maxs
uint32 __maxs(uint32, uint32) __attribute__((intrinsic_function(0x10b
Ifx__inserthw1
asm __packhw Ifx__inserthw1(__packhw a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:928
abss
sint32 abss
Definition: IfxCpu_IntrinsicsDcc2G.h:1192
Ifx__clssf
asm short Ifx__clssf(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:205
__packhw
long __packhw
Definition: Ifx_TypesDcc.h:49
Ifx__minh
asm __packhw Ifx__minh(__packhw a, __packhw b)
Definition: IfxCpu_IntrinsicsDcc.h:1022
fract
long fract
Definition: Ifx_TypesDcc.h:44
Ifx__sathu
asm volatile uint16 Ifx__sathu(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1282
__max
sint32 __max(sint32, sint32) __attribute__((intrinsic_pseudo(3
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
laccum
long long laccum
Definition: Ifx_TypesDcc.h:46
Ifx__insertbyte4
asm __packb Ifx__insertbyte4(__packb a, sint8 b)
Insert sint8 into fourth byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:919
__cls
sint32 __cls(sint32) __attribute__((intrinsic_pseudo(1
Ifx__getbyte2
asm sint8 Ifx__getbyte2(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:724
Ifx__extractbyte3
asm sint8 Ifx__extractbyte3(__packb a)
Extract third byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:624
Ifx__moveToDataParamRet
asm volatile void Ifx__moveToDataParamRet(unsigned int var)
Definition: IfxCpu_IntrinsicsDcc2G.h:81
Ifx__fabs
asm double Ifx__fabs(double d)
Definition: IfxCpu_IntrinsicsDcc.h:1216
Ifx__jumpToFunction
IFX_INLINE void Ifx__jumpToFunction(const void *fun)
Definition: IfxCpu_IntrinsicsDcc2G.h:101
adds
sint32 adds
Definition: IfxCpu_IntrinsicsDcc2G.h:1298
Ifx__initpackhwl
asm __packhw Ifx__initpackhwl(long a)
Definition: IfxCpu_IntrinsicsDcc.h:863
Ifx__getbyte3
asm sint8 Ifx__getbyte3(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:734
Ifx__extractbyte2
asm sint8 Ifx__extractbyte2(__packb a)
Extract second byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:615
__syscall
void __syscall(const uint32) __attribute__((intrinsic_function(0x100
Ifx__getbyte1
asm sint8 Ifx__getbyte1(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:714
Ifx__insertuhw1
asm __upackhw Ifx__insertuhw1(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:982
Ifx__addsu
#define Ifx__addsu(a, b)
Definition: IfxCpu_IntrinsicsTasking.h:228
__upackb
unsigned long __upackb
Definition: Ifx_TypesDcc.h:48
Ifx__insertuhw2
asm __upackhw Ifx__insertuhw2(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:991
Ifx__fixpoint_to_float32
asm float Ifx__fixpoint_to_float32(fract value, sint32 shift)
Convert a fixpoint value to float32.
Definition: IfxCpu_IntrinsicsDcc2G.h:1484
Ifx__extractubyte1
asm volatile uint8 Ifx__extractubyte1(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:660
__abss
sint32 __abss(sint32) __attribute__((intrinsic_pseudo(1
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
Ifx__shafracts
asm fract Ifx__shafracts(fract a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:358
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
__debug
void __debug(void) __attribute__((intrinsic_function(0x103
__insert
uint32 __insert(uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109
Ifx__float_to_fract
asm fract Ifx__float_to_fract(float a)
Definition: IfxCpu_IntrinsicsDcc.h:215
__extru
uint32 __extru(uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
Ifx__extractubyte4
asm volatile uint8 Ifx__extractubyte4(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:687
Ifx__setuhw2
asm volatile void Ifx__setuhw2(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:1161
__insn
uint32 __insn(uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
__extr
sint32 __extr(sint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
IfxCpu_calculateCrc32
IFX_INLINE unsigned int IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
Definition: IfxCpu_IntrinsicsDcc2G.h:1511
__disable_and_save
#define __disable_and_save
Definition: IfxCpu_IntrinsicsGnuc.h:1880
Ifx__round16
asm sfract Ifx__round16(fract a)
Definition: IfxCpu_IntrinsicsDcc.h:288
Ifx__sethw1
asm volatile void Ifx__sethw1(__packhw *a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:1084
IfxCpu_getRandomVal
asm volatile uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Generate the Random value.
Definition: IfxCpu_IntrinsicsDcc2G.h:1534
__scheduling_barrier
void __scheduling_barrier(void) __attribute__((intrinsic_function(9
Ifx__nops1000
asm volatile void Ifx__nops1000(uint32 x)
Definition: IfxCpu_IntrinsicsDcc.h:1399
Ifx__getubyte3
asm volatile uint8 Ifx__getubyte3(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:794
uint16
unsigned short uint16
Definition: Platform_Types.h:112
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
__enable
void __enable(void) __attribute__((intrinsic_function(0x103
__bisr
void __bisr(const uint32) __attribute__((intrinsic_function(0x100
Ifx__insertbyte3
asm __packb Ifx__insertbyte3(__packb a, sint8 b)
Insert sint8 into third byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:910
Ifx__parity
asm volatile sint32 Ifx__parity(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1246
Ifx__rol
asm volatile uint32 Ifx__rol(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsDcc.h:552
Ifx__shaaccum
asm laccum Ifx__shaaccum(laccum a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:338
Ifx__sfract_to_u16
asm volatile uint16 Ifx__sfract_to_u16(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:328
__restore
void __restore(sint32) __attribute__((intrinsic_function(0x104
Ifx__setbyte4
asm volatile void Ifx__setbyte4(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1073
__abs
sint32 __abs(sint32) __attribute__((intrinsic_pseudo(1
__imaskldmst
#define __imaskldmst
Definition: IfxCpu_IntrinsicsDcc2G.h:1753
Ifx__subs
#define Ifx__subs(a, b)
Definition: IfxCpu_IntrinsicsTasking.h:230
__minb
#define __minb
Definition: IfxCpu_IntrinsicsDcc2G.h:1961
__maxu
uint32 __maxu(uint32, uint32) __attribute__((intrinsic_pseudo(3
Ifx__mulfractfract
#define Ifx__mulfractfract(fractvalue1, fractvalue2)
Definition: IfxCpu_IntrinsicsTasking.h:164
Ifx__fabsf
asm float Ifx__fabsf(float f)
Definition: IfxCpu_IntrinsicsDcc.h:1225
__svlcx
void __svlcx(void) __attribute__((intrinsic_function(0x103
Ifx__setStackPointer
asm void Ifx__setStackPointer(void *stackAddr)
Definition: IfxCpu_IntrinsicsDcc2G.h:1497
Ifx__stopPerfCounters
asm volatile void Ifx__stopPerfCounters(void)
Definition: IfxCpu_IntrinsicsDcc2G.h:1465
sint32
long sint32
Definition: Platform_Types.h:134
Ifx__getubyte4
asm volatile uint8 Ifx__getubyte4(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:804
Ifx__getfract
asm fract Ifx__getfract(laccum a)
Definition: IfxCpu_IntrinsicsDcc.h:235
Ifx__cmpAndSwap
#define Ifx__cmpAndSwap(address, value, condition)
This function is a implementation of a binary semaphore using compare and swap instruction.
Definition: IfxCpu_IntrinsicsTasking.h:320
Ifx__setubyte2
asm volatile void Ifx__setubyte2(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1117
Ifx__swap
asm volatile uint32 Ifx__swap(void *place, uint32 value)
Definition: IfxCpu_IntrinsicsDcc.h:1431
__shafracts
#define __shafracts
Definition: IfxCpu_IntrinsicsDcc2G.h:1737
Ifx__extracthw1
asm short Ifx__extracthw1(__packhw a)
Extract first short from a __packhw.
Definition: IfxCpu_IntrinsicsDcc.h:642
min
sint32 min
Definition: IfxCpu_IntrinsicsDcc2G.h:131
__rslcx
void __rslcx(void) __attribute__((intrinsic_function(0x103
Ifx__insertubyte1
asm __upackb Ifx__insertubyte1(__upackb a, uint8 b)
Insert uint8 into first unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:946
__shasfracts
#define __shasfracts
Definition: IfxCpu_IntrinsicsDcc2G.h:1741
Ifx__crc32
asm volatile unsigned int Ifx__crc32(uint32 b, uint32 a)
Definition: IfxCpu_IntrinsicsDcc2G.h:1504
Ifx__moveToAddrParam0
asm volatile void Ifx__moveToAddrParam0(const void *var)
Definition: IfxCpu_IntrinsicsDcc2G.h:94
Ifx__initpackb
asm __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
Definition: IfxCpu_IntrinsicsDcc.h:834
Ifx__getuhw2
asm volatile uint16 Ifx__getuhw2(__upackhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:824
__absdif
sint32 __absdif(sint32, sint32) __attribute__((intrinsic_pseudo(1
Ifx__inserthw2
asm __packhw Ifx__inserthw2(__packhw a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:937
Ifx__jumpBackToLink
asm volatile void Ifx__jumpBackToLink(void)
Definition: IfxCpu_IntrinsicsDcc2G.h:111
isync
void isync
Definition: IfxCpu_IntrinsicsDcc2G.h:1353
Ifx__minbu
asm __upackb Ifx__minbu(__upackb a, __upackb b)
Definition: IfxCpu_IntrinsicsDcc.h:1013
Ifx__setbyte3
asm volatile void Ifx__setbyte3(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1062
Ifx__initpackbl
asm __packb Ifx__initpackbl(long a)
Definition: IfxCpu_IntrinsicsDcc.h:845
nop
void nop
Definition: IfxCpu_IntrinsicsDcc2G.h:1378
Ifx__jump_and_link
asm volatile void Ifx__jump_and_link(void(*fun)(void))
Definition: IfxCpu_IntrinsicsDcc.h:66
Ifx__mulfractlong
#define Ifx__mulfractlong
Definition: IfxCpu_IntrinsicsTasking.h:162
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx__extracthw2
asm short Ifx__extracthw2(__packhw a)
Extract second short from a __packhw.
Definition: IfxCpu_IntrinsicsDcc.h:651
__initcirc
asm circ_t __initcirc(void *buf, uint16 bufsize, uint16 byteindex)
Definition: IfxCpu_IntrinsicsDcc.h:528
sint8
signed char sint8
Definition: Platform_Types.h:125
Ifx__abssh
asm __packhw Ifx__abssh(__packhw a)
Definition: IfxCpu_IntrinsicsDcc.h:597
__cacheawi
void __cacheawi(void *) __attribute__((intrinsic_function(0x110
Ifx__setbyte1
asm volatile void Ifx__setbyte1(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1040
insert
uint32 insert
Definition: IfxCpu_IntrinsicsDcc2G.h:421
extr
sint32 extr
Definition: IfxCpu_IntrinsicsDcc2G.h:398


iLLD_TC26B: IfxCpu_IntrinsicsDcc.h Source File

  • Cpu
  • Std
IfxCpu_IntrinsicsDcc.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_IntrinsicsDcc.h
3 * \version iLLD_1_0_1_12_0
4 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 * \defgroup IfxLld_Cpu_Intrinsics_Dcc intrinsics for DCC compiler
40 * \ingroup IfxLld_Cpu_Intrinsics
41 *
42 */
43 #ifndef IFXCPU_INTRINSICSDCC_H
44 #define IFXCPU_INTRINSICSDCC_H
45 /******************************************************************************/
46 #include "Ifx_Types.h"
47
48 /******************************************************************************/
49 /* *INDENT-OFF* */
50 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_min_smax Minimum and Maximum of (Short) Integers
51 These intrinsic functions return the minimum or maximum of a signed integer, unsigned integer or short integer.
52 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
53 * \{
54 */
55
56 /** Function call without return
57 */
58 asm volatile void Ifx__non_return_call(void (*fun)(void))
59 {
60 % reg fun
61 ji fun
62 }
63
64 /** Jump and link
65 */
66 asm volatile void Ifx__jump_and_link(void (*fun)(void))
67 {
68 % reg fun
69 jli fun
70 }
71
72 /** \} */
73
74 asm volatile void Ifx__moveToDataParam0(unsigned int var)
75 {
76 % reg var
77 ! "%d4"
78 mov %d4, var
79 }
80
81 asm volatile void Ifx__moveToDataParamRet(unsigned int var)
82 {
83 % reg var
84 ! "%d2"
85 mov %d2, var
86 }
87
88 asm volatile unsigned int Ifx__getDataParamRet(void)
89 {
90 ! "%d2"
91 mov %d2, %d2
92 }
93
94 asm volatile void Ifx__moveToAddrParam0(const void *var)
95 {
96 % reg var
97 ! "%a4"
98 mov.aa %a4, var
99 }
100
101 IFX_INLINE void Ifx__jumpToFunction(const void *fun)
102 {
103 Ifx__non_return_call((void (*)(void))fun);
104 }
105
106 IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
107 {
108 Ifx__jump_and_link((void (*)(void))fun);
109 }
110
111 asm volatile void Ifx__jumpBackToLink(void)
112 {
113 ! "%a11"
114 ji %a11
115 }
116
117 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_any_type Cross type arithmetic operation
118 *
119 * Macro compatible with float, fix point, signed integer and unsigned integer
120 *
121 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
122 * \{
123 */
124 #define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
125 #define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
126 #define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
127 #define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
128
129 /** Return minimum of two integers
130 */
131 extern sint32 __min( sint32, sint32) __attribute__((intrinsic_pseudo(3, "min") ));
132
133 #define Ifx__min __min
134
135 /** Return minimum of two short integers
136 */
137 extern sint32 __mins( sint32, sint32) __attribute__((intrinsic_function(0x10b, 0, "min.h") ));
138
139 #define Ifx__mins __mins
140
141 /** Return minimum of two unsigned integers
142 */
143 extern uint32 __minu( uint32, uint32) __attribute__((intrinsic_pseudo(3, "min.u") ));
144
145 #define Ifx__minu __minu
146
147 /** Return maximum of two integers
148 */
149 extern sint32 __max( sint32, sint32) __attribute__((intrinsic_pseudo(3, "max") ));
150
151 #define Ifx__max __max
152
153 /** Return maximum of two short integers
154 */
155 extern uint32 __maxs( uint32, uint32) __attribute__((intrinsic_function(0x10b, 0, "max.h") ));
156
157 #define Ifx__maxs __maxs
158
159 /** Return maximum of two unsigned integers
160 */
161 extern uint32 __maxu( uint32, uint32) __attribute__((intrinsic_pseudo(3, "max.u") ));
162
163 #define Ifx__maxu __maxu
164
165 /** \} */
166
167 /** \defgroup intrinsicstasking_float Floating point operation
168 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
169 * \{
170 */
171 #define Ifx__saturate(X,Min,Max) ( __minf(__maxf(X, Min), Max) )
172
173 #define Ifx__sqrf(X) ((X) * (X))
174 #define Ifx__sqrtf(X) sqrtf(X)
175 #define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
176
177 #define Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
178 #define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
179 #define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
180 #define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
181 #define Ifx__saturatef(X,Min,Max) ( __minf(__maxf(X, Min), Max) )
182 #define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
183
184 #define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
185 #define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
186 #define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
187 #define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
188
189 #define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
190 #define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
191 #define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
192 /** \} */
193
194 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_fractional Fractional Arithmetic Support
195 The next table provides an overview of intrinsic functions to convert fractional values. Note that the
196 TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
197 need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
198 compiler does support these functions.
199 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
200 * \{
201 */
202
203 /** Count the consecutive number of bits that have the same value as bit 15 of an sfract
204 */
205 asm short Ifx__clssf(sfract a)
206 {
207 % reg a
208 ! "%d2"
209 sh a,a,16
210 cls %d2, a
211 }
212
213 /** Convert float to fract
214 */
215 asm fract Ifx__float_to_fract(float a)
216 {
217 % reg a
218 ! "%d2", "%d3"
219 mov %d3, 0
220 ftoq31 %d2, a, %d3
221 }
222
223 /** \brief Convert fract to float
224 */
225 asm float Ifx__fract_to_float(fract a)
226 {
227 % reg a
228 ! "%d2", "%d3"
229 mov %d3, 0
230 q31tof %d2, a, %d3
231 }
232
233 /** Convert __laccum to fract
234 */
235 asm fract Ifx__getfract(laccum a)
236 {
237 % reg a
238 ! "%d2"
239 dextr %d2, a!H, a!L, 17
240 }
241
242 /** Multiply-add with rounding. Returns the rounded result of ( a + b * c )
243 */
244 #ifdef INTRINSIC_WORKAROUND
245 extern sfract __mac_r_sf(sfract a, sfract b, sfract c);
246 #else
247 asm sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
248 {
249 % reg a, b, c
250 ! "%d2"
251 maddrs.q %d2, a, bU, cU, 1
252 }
253 #endif
254
255 /** Multiply-add sfract. Returns ( a + b * c )
256 */
257 #ifdef INTRINSIC_WORKAROUND
258 extern sfract __mac_sf(sfract a, sfract b, sfract c);
259 #else
260 asm sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
261 {
262 % reg a, b, c
263 ! "%d2"
264 madds.q %d2, a, bU, cU, 1
265 }
266 #endif
267
268 /** Integer part of the multiplication of a fract and a fract
269 */
270 asm long Ifx__mulfractfract(fract a, fract b)
271 {
272 % reg a, b
273 ! "%d2"
274 mul.q %d2, a, b, 1
275 }
276
277 /** Integer part of the multiplication of a fract and a long
278 */
279 asm long Ifx__mulfractlong(fract a, long b)
280 {
281 % reg a, b
282 ! "%d2"
283 mul.q %d2, a, b, 1
284 }
285
286 /** Convert fract to sfract
287 */
288 asm sfract Ifx__round16(fract a)
289 {
290 % reg a
291 ! "%d2"
292 mov.u %d2, 0x8000
293 adds %d2, a
294 extr %d2,%d2,0x10,0x10
295 }
296
297 #define Ifx__fract_to_sfract Ifx__round16
298
299 /** Convert float to sfract
300 */
301 IFX_INLINE sfract __float_to_sfract(float a)
302 {
303 fract tmp = Ifx__float_to_fract(a);
304 return Ifx__fract_to_sfract(tmp);
305 }
306
307 /** Convert signed short to sfract
308 */
309 asm sfract Ifx__s16_to_sfract(short a)
310 {
311 % reg a
312 ! "%d2"
313 sh %d2, a, 16
314 sh %d2, %d2, -16
315 }
316
317 /** Convert sfract to signed short
318 */
319 asm short Ifx__sfract_to_s16(sfract a)
320 {
321 % reg a
322 sh a, a, 16
323 sh %d2, a, -16
324 }
325
326 /** Convert sfract to uint16
327 */
328 asm volatile uint16 Ifx__sfract_to_u16(sfract a)
329 {
330 % reg a
331 ! "%d2"
332 sh a, a, 16
333 sh %d2, a, -16
334 }
335
336 /** Left/right shift of an __laccum
337 */
338 asm laccum Ifx__shaaccum(laccum a, sint32 b)
339 {
340 % lab L0, L1; reg a, b
341 ! "%d2", "%d3"
342 jge b, 0, L0
343 sha %d3, a!L, b
344 rsub b, b, 0
345 dextr %d2, a!H, a!L, b
346 j L1
347 L0:
348 dextr %d2, a!H, a!L, b
349 sha %d2, a!L, b
350 L1:
351 }
352
353 /** Left/right shift of an fract
354 */
355 #ifdef INTRINSIC_WORKAROUND
356 extern fract __shafracts(fract a, sint32 b);
357 #else
358 asm fract Ifx__shafracts(fract a, sint32 b)
359 {
360 % reg a, b
361 ! "%d2"
362 shas %d2, a, b
363 }
364 #endif
365
366 /** Left/right shift of an sfract
367 */
368 #ifdef INTRINSIC_WORKAROUND
369 extern sfract __shasfracts(sfract a, sint32 b);
370 #else
371 asm sfract Ifx__shasfracts(sfract a, sint32 b)
372 {
373 % reg a, b
374 ! "%d2"
375 shas %d2, a, b
376 }
377 #endif
378
379 /** Convert uint16 to sfract
380 */
381 asm sfract Ifx__u16_to_sfract(uint16 a)
382 {
383 % reg a
384 ! "%d2"
385 sh %d2, a, 16
386 sh %d2, %d2, -16
387 }
388
389 /** \} */
390
391 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_insert Insert / Extract Bit-fields and Bits
392 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
393 * \{
394 */
395
396 /** Extract a bit-field (bit pos to bit pos+width) from value
397 */
398 extern sint32 __extr( sint32, uint32, const uint32) __attribute__((intrinsic_function(0x108, 0, "extr") ));
399
400 #define Ifx__extr __extr
401
402 /** Same as __extr() but return bit-field as unsigned integer
403 */
404 extern uint32 __extru( uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108, 0, "extr.u") ));
405
406 #define Ifx__extru __extru
407
408 /** Load a single bit.
409 */
410 #define Ifx__getbit( address, bitoffset ) __extru( *(address), bitoffset, 1 )
411
412 /** Return trg but replace trgbit by srcbit in src.
413 */
414 extern uint32 __ins( uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121, 0, "ins.t") ));
415
416 #define Ifx__ins __ins
417
418 /** Extract bit-field (width w bits starting at bit 0) from a and insert it in
419 * b at position p.
420 */
421 extern uint32 __insert( uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109, 0, "insert") ));
422
423 #define Ifx__insert __insert
424
425 /** Return trg but replace trgbit by inverse of srcbit in src.
426 */
427 extern uint32 __insn( uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121, 0, "insn.t") ));
428
429 #define Ifx__insn __insn
430
431 /** Atomic load-modify-store.
432 */
433 #ifdef INTRINSIC_WORKAROUND
434 extern void __imaskldmst(void* a, sint32 b, sint32 p, const sint32 w);
435 #else
436 asm volatile void Ifx__imaskldmst(void* a, sint32 b, sint32 p, const sint32 w)
437 {
438 % reg a, b, p; con w
439 ! "%d2", "%d3"
440 imask %e2, b, p, w
441 ldmst [a]0, %e2
442 }
443 #endif
444
445 /** Store a single bit.
446 */
447 #define Ifx__putbit(value,address,bitoffset) Ifx__imaskldmst(address,value,bitoffset,1)
448
449 /** \} */
450
451 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_interrupt_handling Interrupt Handling
452 The next table provides an overview of the intrinsic functions to read or set interrupt handling.
453 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
454 * \{
455 */
456
457 /** Set CPU priority number [0..255] (or [0..1023] for TriCore 1.6.x) and enable interrupts immediately at function entry
458 */
459 extern void __bisr( const uint32) __attribute__((intrinsic_function(0x100, 0, "bisr") ));
460
461 #define Ifx__bisr __bisr
462
463 /** Disable interrupts. Only supported for TriCore1
464 */
465 extern void __disable( void) __attribute__((intrinsic_function(0x103, 0, "disable") ));
466
467 #define Ifx__disable __disable
468
469 /** Disable interrupts and return previous interrupt state (enabled or disabled). Direct supported for TriCore1.6. Emulated on TC1.3.1
470 */
471 #if defined INTRINSIC_WORKAROUND
472 extern sint32 __disable_and_save(void);
473 #endif
474
475 /** Enable interrupts immediately at function entry
476 */
477 extern void __enable( void) __attribute__((intrinsic_function(0x103, 0, "enable") ));
478
479 #define Ifx__enable __enable
480
481 /** Restore interrupt state. Direct supported for TriCore1.6. Emulated on TC1.3.1
482 */
483 extern void __restore( sint32) __attribute__((intrinsic_function(0x104, 0, "restore") ));
484
485 #define Ifx__restore __restore
486
487 /** Call a system call function number
488 */
489 extern void __syscall( const uint32) __attribute__((intrinsic_function(0x100, 0, "syscall") ));
490
491 #define Ifx__syscall __syscall
492
493 /** \} */
494
495 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_miscellaneous Miscellaneous Intrinsic Functions
496 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
497 * \{
498 */
499
500 /** Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].
501 */
502 extern void __cacheawi( void*) __attribute__((intrinsic_function(0x110, 0, "cachea.wi") ));
503
504 #define Ifx__cacheawi __cacheawi
505
506 /** Write back and invalidate cache address \"p\" and return post incremented
507 * value of \"p\". Generates CACHEA.WI [Ab+].
508 */
509 asm volatile uint8* Ifx__cacheawi_bo_post_inc(uint8* p)
510 {
511 % reg p
512 !
513 cachea.wi [p + ]0
514 mov.aa %a2, p
515 }
516
517 /** Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].
518 */
519 asm volatile void Ifx__cacheiwi(uint8* p)
520 {
521 % reg p
522 !
523 cachei.wi [p]
524 }
525
526 /** Initialize a circular pointer with a dynamically allocated buffer at run-time.
527 */
528 asm circ_t __initcirc(void* buf, uint16 bufsize, uint16 byteindex)
529 {
530 % reg buf, bufsize, byteindex
531 ! "%a2", "%a3"
532 lea %a2, [buf]0
533 extr.u bufsize, bufsize, 0, 16
534 insert bufsize, byteindex, bufsize, 16, 16
535 mov.a %a3, bufsize
536 }
537
538 /** Multiply two 32-bit numbers to an intermediate 64-bit result, and scale
539 * back the result to 32 bits. To scale back the result, 32 bits are extracted
540 * from the intermediate 64-bit result: bit 63-offset to bit 31-offset.
541 */
542 asm volatile sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
543 {
544 % reg a, b, offset
545 ! "%d2", "%d3"
546 mul %e2, a, b
547 dextr %d2, %d3, %d2, offset
548 }
549
550 /** Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).
551 */
552 asm volatile uint32 Ifx__rol(uint32 operand, uint32 count)
553 {
554 % reg operand, count
555 ! "%d2"
556 dextr %d2, operand, operand, count
557 }
558
559 /** Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).
560 */
561 asm volatile uint32 Ifx__ror(uint32 operand, uint32 count)
562 {
563 % reg operand, count
564 ! "%d2"
565 rsub count, count, 0
566 dextr %d2, operand, operand, count
567 }
568
569 /** \} */
570
571 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_packed Packed Data Type Support
572 The next table provides an overview of the intrinsic functions for initialization of packed data type.
573 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
574 * \{
575 */
576
577 /** Absolute value of __packb
578 */
579 asm __packb Ifx__absb(__packb a)
580 {
581 % reg a
582 ! "%d2"
583 abs.b %d2, a
584 }
585
586 /** Absolute value of __packhw
587 */
588 asm __packhw Ifx__absh(__packhw a)
589 {
590 % reg a
591 ! "%d2"
592 abs.h %d2, a
593 }
594
595 /** Absolute value of __packhw using saturation
596 */
597 asm __packhw Ifx__abssh(__packhw a)
598 {
599 % reg a
600 ! "%d2"
601 abss.h %d2, a
602 }
603
604 /** \brief Extract first byte from a __packb
605 */
606 asm sint8 Ifx__extractbyte1(__packb a)
607 {
608 % reg a
609 ! "%d2"
610 extr %d2, a, 0, 8
611 }
612
613 /** \brief Extract second byte from a __packb
614 */
615 asm sint8 Ifx__extractbyte2(__packb a)
616 {
617 % reg a
618 ! "%d2"
619 extr %d2, a, 8, 8
620 }
621
622 /** \brief Extract third byte from a __packb
623 */
624 asm sint8 Ifx__extractbyte3(__packb a)
625 {
626 % reg a
627 ! "%d2"
628 extr %d2, a, 16, 8
629 }
630
631 /** \brief Extract fourth byte from a __packb
632 */
633 asm sint8 Ifx__extractbyte4(__packb a)
634 {
635 % reg a
636 ! "%d2"
637 extr %d2, a, 24, 8
638 }
639
640 /** \brief Extract first short from a __packhw
641 */
642 asm short Ifx__extracthw1(__packhw a)
643 {
644 % reg a
645 ! "%d2"
646 extr %d2, a, 0, 16
647 }
648
649 /** \brief Extract second short from a __packhw
650 */
651 asm short Ifx__extracthw2(__packhw a)
652 {
653 % reg a
654 ! "%d2"
655 extr %d2, a, 16, 16
656 }
657
658 /** Extract first unsigned byte from a __packb
659 */
660 asm volatile uint8 Ifx__extractubyte1(__upackb a)
661 {
662 % reg a
663 ! "%d2"
664 extr %d2, a, 0, 8
665 }
666
667 /** Extract second unsigned byte from a __packb
668 */
669 asm volatile uint8 Ifx__extractubyte2(__upackb a)
670 {
671 % reg a
672 ! "%d2"
673 extr %d2, a, 8, 8
674 }
675
676 /** Extract third unsigned byte from a __packb
677 */
678 asm volatile uint8 Ifx__extractubyte3(__upackb a)
679 {
680 % reg a
681 ! "%d2"
682 extr %d2, a, 16, 8
683 }
684
685 /** Extract fourth unsigned byte from a __packb
686 */
687 asm volatile uint8 Ifx__extractubyte4(__upackb a)
688 {
689 % reg a
690 ! "%d2"
691 extr %d2, a, 24, 8
692 }
693
694 /** Extract first uint16 from a __packhw
695 */
696 asm volatile uint16 Ifx__extractuhw1(__upackhw a)
697 {
698 % reg a
699 ! "%d2"
700 extr %d2, a, 0, 16
701 }
702
703 /** Extract second uint16 from a __packhw
704 */
705 asm volatile uint16 Ifx__extractuhw2(__upackhw a)
706 {
707 % reg a
708 ! "%d2"
709 extr %d2, a, 16, 16
710 }
711
712 /** Extract first byte from a __packb
713 */
714 asm sint8 Ifx__getbyte1(__packb* a)
715 {
716 % reg a
717 ! "%d2"
718 ld.w %d2, [a]
719 extr %d2, %d2, 0, 8
720 }
721
722 /** Extract second byte from a __packb
723 */
724 asm sint8 Ifx__getbyte2(__packb* a)
725 {
726 % reg a
727 ! "%d2"
728 ld.w %d2, [a]
729 extr %d2, %d2, 8, 8
730 }
731
732 /** Extract third byte from a __packb
733 */
734 asm sint8 Ifx__getbyte3(__packb* a)
735 {
736 % reg a
737 ! "%d2"
738 ld.w %d2, [a]
739 extr %d2, %d2, 16, 8
740 }
741
742 /** Extract fourth byte from a __packb
743 */
744 asm sint8 Ifx__getbyte4(__packb* a)
745 {
746 % reg a
747 ! "%d2"
748 ld.w %d2, [a]
749 extr %d2, %d2, 24, 8
750 }
751
752 /** Extract first short from a __packhw
753 */
754 asm short Ifx__gethw1(__packhw* a)
755 {
756 % reg a
757 ! "%d2"
758 ld.w %d2, [a]
759 extr %d2, %d2, 0, 16
760 }
761
762 /** Extract second short from a __packhw
763 */
764 asm short Ifx__gethw2(__packhw* a)
765 {
766 % reg a
767 ! "%d2"
768 ld.w %d2, [a]
769 extr %d2, %d2, 16, 16
770 }
771
772 /** Extract first unsigned byte from a __packb
773 */
774 asm volatile uint8 Ifx__getubyte1(__upackb* a)
775 {
776 % reg a
777 ! "%d2"
778 ld.w %d2, [a]
779 extr %d2, %d2, 0, 8
780 }
781
782 /** Extract second unsigned byte from a __packb
783 */
784 asm volatile uint8 Ifx__getubyte2(__upackb* a)
785 {
786 % reg a
787 ! "%d2"
788 ld.w %d2, [a]
789 extr %d2, %d2, 8, 8
790 }
791
792 /** Extract third unsigned byte from a __packb
793 */
794 asm volatile uint8 Ifx__getubyte3(__upackb* a)
795 {
796 % reg a
797 ! "%d2"
798 ld.w %d2, [a]
799 extr %d2, %d2, 16, 8
800 }
801
802 /** Extract fourth unsigned byte from a __packb
803 */
804 asm volatile uint8 Ifx__getubyte4(__upackb* a)
805 {
806 % reg a
807 ! "%d2"
808 ld.w %d2, [a]
809 extr %d2, %d2, 24, 8
810 }
811
812 /** Extract first uint16 from a __packhw
813 */
814 asm volatile uint16 Ifx__getuhw1(__upackhw* a)
815 {
816 % reg a
817 ! "%d2"
818 ld.w %d2, [a]
819 extr %d2, %d2, 0, 16
820 }
821
822 /** Extract second uint16 from a __packhw
823 */
824 asm volatile uint16 Ifx__getuhw2(__upackhw* a)
825 {
826 % reg a
827 ! "%d2"
828 ld.w %d2, [a]
829 extr %d2, %d2, 16, 16
830 }
831
832 /** Initialize __packb with four integers
833 */
834 asm __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
835 {
836 % reg a, b, c, d
837 ! "%d2"
838 insert c, c, d, 8, 8
839 insert d, a, b, 8, 8
840 insert %d2, d, c, 16, 16
841 }
842
843 /** Initialize __packb with a long integer
844 */
845 asm __packb Ifx__initpackbl(long a)
846 {
847 % reg a
848 ! "%d2"
849 mov %d2, a
850 }
851
852 /** \brief Initialize __packhw with two integers
853 */
854 asm __packhw Ifx__initpackhw(short a, short b)
855 {
856 % reg a, b
857 ! "%d2"
858 insert %d2, a, b, 16, 16
859 }
860
861 /** Initialize __packhw with a long integer
862 */
863 asm __packhw Ifx__initpackhwl(long a)
864 {
865 % reg a
866 ! "%d2"
867 mov %d2, a
868 }
869
870 /** Initialize __packb with four unsigned integers
871 */
872 asm __upackb Ifx__initupackb( uint32 a, uint32 b, uint32 c, uint32 d)
873 {
874 % reg a, b, c, d
875 ! "%d2"
876 insert c, c, d, 8, 8
877 insert a, a, b, 8, 8
878 insert %d2, a, c, 16, 16
879 }
880
881 /** Initialize __packhw with two unsigned integers
882 */
883 asm __upackhw Ifx__initupackhw( uint16 a, uint16 b)
884 {
885 % reg a, b
886 ! "%d2"
887 insert %d2, a, b, 16, 16
888 }
889
890 /** \brief Insert sint8 into first byte of a __packb
891 */
892 asm __packb Ifx__insertbyte1(__packb a, sint8 b)
893 {
894 % reg a, b
895 ! "%d2"
896 insert %d2, a, b, 0, 8
897 }
898
899 /** \brief Insert sint8 into second byte of a __packb
900 */
901 asm __packb Ifx__insertbyte2(__packb a, sint8 b)
902 {
903 % reg a, b
904 ! "%d2"
905 insert %d2, a, b, 8, 8
906 }
907
908 /** \brief Insert sint8 into third byte of a __packb
909 */
910 asm __packb Ifx__insertbyte3(__packb a, sint8 b)
911 {
912 % reg a, b
913 ! "%d2"
914 insert %d2, a, b, 16, 8
915 }
916
917 /** \brief Insert sint8 into fourth byte of a __packb
918 */
919 asm __packb Ifx__insertbyte4(__packb a, sint8 b)
920 {
921 % reg a, b
922 ! "%d2"
923 insert %d2, a, b, 24, 8
924 }
925
926 /** Insert short into first halfword of a __packhw
927 */
928 asm __packhw Ifx__inserthw1(__packhw a, short b)
929 {
930 % reg a, b
931 ! "%d2"
932 insert %d2, a, b, 0, 16
933 }
934
935 /** Insert short into second halfword of a __packhw
936 */
937 asm __packhw Ifx__inserthw2(__packhw a, short b)
938 {
939 % reg a, b
940 ! "%d2"
941 insert %d2, a, b, 16, 16
942 }
943
944 /** \brief Insert uint8 into first unsigned byte of a __packb
945 */
946 asm __upackb Ifx__insertubyte1( __upackb a, uint8 b)
947 {
948 % reg a, b
949 ! "%d2"
950 insert %d2, a, b, 0, 8
951 }
952
953 /** \brief Insert uint8 into second unsigned byte of a __packb
954 */
955 asm __upackb Ifx__insertubyte2( __upackb a, uint8 b)
956 {
957 % reg a, b
958 ! "%d2"
959 insert %d2, a, b, 8, 8
960 }
961
962 /** \brief Insert uint8 into third unsigned byte of a __packb
963 */
964 asm __upackb Ifx__insertubyte3( __upackb a, uint8 b)
965 {
966 % reg a, b
967 ! "%d2"
968 insert %d2, a, b, 16, 8
969 }
970
971 /** \brief Insert uint8 into fourth unsigned byte of a __packb
972 */
973 asm __upackb Ifx__insertubyte4( __upackb a, uint8 b)
974 {
975 % reg a, b
976 ! "%d2"
977 insert %d2, a, b, 24, 8
978 }
979
980 /** Insert uint16 into first halfword of a __upackhw
981 */
982 asm __upackhw Ifx__insertuhw1( __upackhw a, uint16 b)
983 {
984 % reg a, b
985 ! "%d2"
986 insert %d2, a, b, 0, 16
987 }
988
989 /** Insert uint16 into second halfword of a __upackhw
990 */
991 asm __upackhw Ifx__insertuhw2( __upackhw a, uint16 b)
992 {
993 % reg a, b
994 ! "%d2"
995 insert %d2, a, b, 16, 16
996 }
997
998 /** Minimum of two __packb values
999 */
1000 #ifdef INTRINSIC_WORKAROUND
1001 extern __packb __minb(__packb a, __packb b);
1002 #else
1003 asm __packb Ifx__minb(__packb a, __packb b)
1004 {
1005 % reg a, b
1006 ! "%d2"
1007 min.b %d2, a, b
1008 }
1009 #endif
1010
1011 /** Minimum of two __upackb values
1012 */
1013 asm __upackb Ifx__minbu( __upackb a, __upackb b)
1014 {
1015 % reg a, b
1016 ! "%d2"
1017 min.bu %d2, a, b
1018 }
1019
1020 /** Minimum of two __packhw values
1021 */
1022 asm __packhw Ifx__minh(__packhw a, __packhw b)
1023 {
1024 % reg a, b
1025 ! "%d2"
1026 min.h %d2, a, b
1027 }
1028
1029 /** Minimum of two __upackhw values
1030 */
1031 asm __upackhw Ifx__minhu( __upackhw a, __upackhw b)
1032 {
1033 % reg a, b
1034 ! "%d2"
1035 min.hu %d2, a, b
1036 }
1037
1038 /** Insert sint8 into first byte of a __packb
1039 */
1040 asm volatile void Ifx__setbyte1(__packb* a, sint8 b)
1041 {
1042 % reg a, b
1043 ! "%d2"
1044 ld.w %d2, [a]
1045 insert %d2, %d2, b, 0, 8
1046 st.w [a], %d2
1047 }
1048
1049 /** Insert sint8 into second byte of a __packb
1050 */
1051 asm volatile void Ifx__setbyte2(__packb* a, sint8 b)
1052 {
1053 % reg a, b
1054 ! "%d2"
1055 ld.w %d2, [a]
1056 insert %d2, %d2, b, 8, 8
1057 st.w [a], %d2
1058 }
1059
1060 /** Insert sint8 into third byte of a __packb
1061 */
1062 asm volatile void Ifx__setbyte3(__packb* a, sint8 b)
1063 {
1064 % reg a, b
1065 ! "%d2"
1066 ld.w %d2, [a]
1067 insert %d2, %d2, b, 16, 8
1068 st.w [a], %d2
1069 }
1070
1071 /** Insert sint8 into fourth byte of a __packb
1072 */
1073 asm volatile void Ifx__setbyte4(__packb* a, sint8 b)
1074 {
1075 % reg a, b
1076 ! "%d2"
1077 ld.w %d2, [a]
1078 insert %d2, %d2, b, 24, 8
1079 st.w [a], %d2
1080 }
1081
1082 /** Insert short into first halfword of a __packhw
1083 */
1084 asm volatile void Ifx__sethw1(__packhw* a, short b)
1085 {
1086 % reg a, b
1087 ! "%d2"
1088 ld.w %d2, [a]
1089 insert %d2, %d2, b, 0, 16
1090 st.w [a], %d2
1091 }
1092
1093 /** Insert short into second halfword of a __packhw
1094 */
1095 asm volatile void Ifx__sethw2(__packhw* a, short b)
1096 {
1097 % reg a, b
1098 ! "%d2"
1099 ld.w %d2, [a]
1100 insert %d2, %d2, b, 16, 16
1101 st.w [a], %d2
1102 }
1103
1104 /** Insert uint8 into first byte of a __upackb
1105 */
1106 asm volatile void Ifx__setubyte1(__upackb* a, uint8 b)
1107 {
1108 % reg a, b
1109 ! "%d2"
1110 ld.w %d2, [a]
1111 insert %d2, %d2, b, 0, 8
1112 st.w [a], %d2
1113 }
1114
1115 /** Insert uint8 into second byte of a __upackb
1116 */
1117 asm volatile void Ifx__setubyte2(__upackb* a, uint8 b)
1118 {
1119 % reg a, b
1120 ! "%d2"
1121 ld.w %d2, [a]
1122 insert %d2, %d2, b, 8, 8
1123 st.w [a], %d2
1124 }
1125
1126 /** Insert uint8 into third byte of a __upackb
1127 */
1128 asm volatile void Ifx__setubyte3(__upackb* a, uint8 b)
1129 {
1130 % reg a, b
1131 ! "%d2"
1132 ld.w %d2, [a]
1133 insert %d2, %d2, b, 16, 8
1134 st.w [a], %d2
1135 }
1136
1137 /** Insert uint8 into fourth byte of a __upackb
1138 */
1139 asm volatile void Ifx__setubyte4(__upackb* a, uint8 b)
1140 {
1141 % reg a, b
1142 ! "%d2"
1143 ld.w %d2, [a]
1144 insert %d2, %d2, b, 24, 8
1145 st.w [a], %d2
1146 }
1147
1148 /** Insert uint16 into first halfword of a __upackhw
1149 */
1150 asm volatile void Ifx__setuhw1(__upackhw* a, uint16 b)
1151 {
1152 % reg a, b
1153 ! "%d2"
1154 ld.w %d2, [a]
1155 insert %d2, %d2, b, 0, 16
1156 st.w [a], %d2
1157 }
1158
1159 /** Insert uint16 into second halfword of a __upackhw
1160 */
1161 asm volatile void Ifx__setuhw2(__upackhw* a, uint16 b)
1162 {
1163 % reg a, b
1164 ! "%d2"
1165 ld.w %d2, [a]
1166 insert %d2, %d2, b, 16, 16
1167 st.w [a], %d2
1168 }
1169
1170 /** \} */
1171
1172 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_register Register Handling
1173 The next table provides an overview of the intrinsic functions that you can use to access control registers.
1174 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
1175 * \{
1176 */
1177
1178 /** Return absolute value
1179 */
1180 extern sint32 __abs( sint32) __attribute__((intrinsic_pseudo(1, "abs") ));
1181
1182 #define Ifx__abs __abs
1183
1184 /** Return absolue difference of two integers
1185 */
1186 extern sint32 __absdif( sint32, sint32) __attribute__((intrinsic_pseudo(1, "absdif") ));
1187
1188 #define Ifx__absdif __absdif
1189
1190 /** Return absolute value with saturation
1191 */
1192 extern sint32 __abss( sint32) __attribute__((intrinsic_pseudo(1, "abss") ));
1193
1194 #define Ifx__abss __abss
1195
1196 /** Count leading ones in int
1197 */
1198 extern sint32 __clo( sint32) __attribute__((intrinsic_pseudo(1, "clo") ));
1199
1200 #define Ifx__clo __clo
1201
1202 /** Count number of redundant sign bits (all consecutive bits with the same value as bit 31
1203 */
1204 extern sint32 __cls( sint32) __attribute__((intrinsic_pseudo(1, "cls") ));
1205
1206 #define Ifx__cls __cls
1207
1208 /** Count leading zeros in int
1209 */
1210 extern sint32 __clz( sint32) __attribute__((intrinsic_pseudo(1, "clz") ));
1211
1212 #define Ifx__clz __clz
1213
1214 /** Return absolute double precision floating-point value
1215 */
1216 asm double Ifx__fabs(double d)
1217 {
1218 % reg d
1219 ! "%d2"
1220 insert %d2, d, 0, 31, 1
1221 }
1222
1223 /** Return absolute floating-point value
1224 */
1225 asm float Ifx__fabsf(float f)
1226 {
1227 % reg f
1228 ! "%d2"
1229 insert %d2, f, 0, 31, 1
1230 }
1231
1232 /** Move contents of the addressed core SFR into a data register
1233 */
1234 extern sint32 __mfcr( const uint32) __attribute__((intrinsic_function(0x101, 0, "mfcr") ));
1235
1236 #define Ifx__mfcr __mfcr
1237
1238 /** Move contents of a data register (second sint32) to the addressed core SFR (first sint32)
1239 */
1240 extern void __mtcr( const uint32, sint32) __attribute__((intrinsic_function(0x102, 0, "mtcr") ));
1241
1242 #define Ifx__mtcr __mtcr
1243
1244 /** Return parity
1245 */
1246 asm volatile sint32 Ifx__parity(sint32 a)
1247 {
1248 % reg a
1249 ! "%d2"
1250 parity %d2, a
1251 }
1252
1253 /** Return saturated byte
1254 */
1255 asm sint8 Ifx__satb(sint32 a)
1256 {
1257 % reg a
1258 ! "%d2"
1259 sat.b %d2, a
1260 }
1261
1262 /** Return saturated unsigned byte
1263 */
1264 asm volatile uint8 Ifx__satbu(sint32 a)
1265 {
1266 % reg a
1267 ! "%d2"
1268 sat.bu %d2, a
1269 }
1270
1271 /** Return saturated halfword
1272 */
1273 asm short Ifx__sath(sint32 a)
1274 {
1275 % reg a
1276 ! "%d2"
1277 sat.h %d2, a
1278 }
1279
1280 /** Return saturated unsignedhalfword
1281 */
1282 asm volatile uint16 Ifx__sathu(sint32 a)
1283 {
1284 % reg a
1285 ! "%d2"
1286 sat.hu %d2, a
1287 }
1288
1289 /** \} */
1290
1291 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_saturation Saturation Arithmetic Support
1292 These intrinsics support saturation arithmetic
1293 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
1294 * \{
1295 */
1296 /** add signed with saturation
1297 */
1298 extern sint32 __adds( sint32, sint32) __attribute__((intrinsic_pseudo(1, "adds") ));
1299
1300 #define Ifx__adds __adds
1301
1302 /** add unsigned with saturation
1303 */
1304 asm volatile uint32 Ifx__addsu(uint32 a, uint32 b)
1305 {
1306 % reg a, b
1307 ! "%d2"
1308 adds.u %d2, a, b
1309 }
1310
1311 /** substract signed with saturation
1312 */
1313 asm volatile sint32 Ifx__subs(sint32 a, sint32 b)
1314 {
1315 % reg a, b
1316 ! "%d2"
1317 subs %d2, a, b
1318 }
1319
1320 /** substract unsigned with saturation
1321 */
1322 asm volatile uint32 Ifx__subsu(uint32 a, uint32 b)
1323 {
1324 % reg a, b
1325 ! "%d2"
1326 subs.u %d2, a, b
1327 }
1328
1329 /** \} */
1330
1331 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_single_assembly Insert Single Assembly Instruction
1332 The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
1333 instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
1334 assembly instructions.
1335 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
1336 * \{
1337 */
1338
1339 /** Insert DEBUG instruction
1340 */
1341 extern void __debug( void) __attribute__((intrinsic_function(0x103, 0, "debug") ));
1342
1343 #define Ifx__debug __debug
1344
1345 /** Insert DSYNC instruction
1346 */
1347 extern void __dsync( void) __attribute__((intrinsic_function(0x103, 0, "dsync") ));
1348
1349 #define Ifx__dsync __dsync
1350
1351 /** Insert ISYNC instruction
1352 */
1353 extern void __isync( void) __attribute__((intrinsic_function(0x103, 0, "isync") ));
1354
1355 #define Ifx__isync __isync
1356
1357 /** Insert LDMST instruction. Note that all operands must be word-aligned.
1358 */
1359 #ifdef INTRINSIC_WORKAROUND
1360 #define __ldmst __ldmst_c
1361 #else
1362 asm volatile void Ifx__ldmst(volatile void *address, uint32 mask, uint32 value)
1363 {
1364 %reg address, mask, value;
1365 !"%d2", "%d3"
1366 mov %d3, mask
1367 mov %d2, value
1368 ldmst [address],%e2
1369 }
1370
1371 #endif
1372
1373 extern void __scheduling_barrier( void) __attribute__((intrinsic_function(9, 4, "$$sb") ));
1374 #define Ifx__mem_barrier __scheduling_barrier
1375
1376 /** Insert NOP instruction
1377 */
1378 extern void __nop( void) __attribute__((intrinsic_function(0x103, 0, "nop") ));
1379
1380 #define Ifx__nop __nop
1381
1382 #define Ifx__NOP __nops
1383
1384 /** Insert a loop over n NOP instruction
1385 */
1386 asm volatile void Ifx__nops(uint32 cnt)
1387 {
1388 % reg cnt;lab L0;
1389 ! "%a2"
1390 mov %a2,cnt
1391 add.a %a2, -1
1392 L0:
1393 nop
1394 loop %a2, L0
1395 }
1396
1397 /** Insert a loop over n times 1000 NOP instruction
1398 */
1399 asm volatile void Ifx__nops1000(uint32 x)
1400 {
1401 % reg x;
1402 lab L0, L1
1403 ! "%a2", "%a3"
1404 mov.a %a2, x
1405 L1:
1406 lea %a3, 999
1407 L0:
1408 nop
1409 nop
1410 loop %a3, L0
1411 loop %a2, L1
1412 }
1413
1414 /** Insert RSLCX instruction
1415 */
1416 extern void __rslcx( void) __attribute__((intrinsic_function(0x103, 0, "rslcx") ));
1417
1418 #define Ifx__rslcx
1419
1420 /** Insert SVLCX instruction
1421 */
1422 extern void __svlcx( void) __attribute__((intrinsic_function(0x103, 0, "svlcx") ));
1423
1424 #define Ifx__svlcx
1425
1426 /** Insert SWAP instruction. Note that all operands must be word-aligned.
1427 */
1428 #ifdef INTRINSIC_WORKAROUND
1429 extern uint32 __swap(void* place, uint32 value);
1430 #else
1431 asm volatile uint32 Ifx__swap(void* place, uint32 value)
1432 {
1433 % reg place, value
1434 ! "%d2"
1435 mov %d2, value
1436 swap.w [place], %d2
1437 }
1438 #endif
1439
1440 // FIXME
1441 asm volatile unsigned int Ifx__cmpAndSwap(unsigned int *address, unsigned long value, unsigned long CmpVal)
1442 {
1443 %reg value, address, CmpVal
1444 ! "%d2", "%d3"
1445 mov %d2,value
1446 mov %d3,CmpVal
1447 cmpswap.w [address], %e2
1448 }
1449 /** \} */
1450
1451 /** Insert n NOP instruction
1452 */
1453 //#info "NOP: Feature not yet implemented."
1454
1455 #define Ifx__setareg(areg,val) ___setareg(areg,val)
1456 /* we need to use a15 for the address register and not direct that the compiler this will not remove */
1457 #define ___setareg(areg,val) \
1458 { __asm ("#$$bp"); \
1459 __asm (" movh.a\t %a15,"#val"@ha\n"); \
1460 __asm (" lea\t %a15,[%a15]"#val"@l\n"); \
1461 __asm (" mov.aa %"#areg", %a15\n"); \
1462 __asm ("#$$ep"); }
1463
1464 /* FIXME check that the compiler take in account that d0 is used by the inline function */
1465 asm volatile void Ifx__stopPerfCounters(void)
1466 {
1467 ! "%d0"
1468 mov %d0,0
1469 mtcr 0xFC00,%d0
1470 isync
1471 }
1472
1473 /** \brief Convert a fixpoint value to float32
1474 *
1475 * This function converts a value from a fixpoint format to a float32 format.
1476 *
1477 *
1478 * \param value value to be converted.
1479 * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
1480 *
1481 * \return Returns the converted value in the float32 format.
1482 *
1483 */
1484 asm float Ifx__fixpoint_to_float32(fract value, sint32 shift)
1485 {
1486 % reg value, shift
1487 ! "%d2"
1488 q31tof %d2, value, shift
1489 }
1490
1491 asm volatile void* Ifx__getA11(void)
1492 {
1493 ! "%a11", "%a2"
1494 mov.aa %a2, %a11
1495 }
1496
1497 asm void Ifx__setStackPointer(void *stackAddr)
1498 {
1499 % reg stackAddr
1500 ! "%a10"
1501 mov.aa %a10, stackAddr
1502 }
1503
1504 asm volatile unsigned int Ifx__crc32(uint32 b,uint32 a)
1505 {
1506 % reg b, a
1507 ! "%d2"
1508 CRC32 %d2, b, a
1509 }
1510
1511 IFX_INLINE unsigned int IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
1512 {
1513 uint32 returnvalue = 0; /* set seed value to 0 */
1514 for (;length > 0; length--)
1515 {
1516 /* calculate the CRC over all data */
1517 returnvalue = Ifx__crc32(returnvalue,*startaddress);
1518 startaddress++;
1519 }
1520 return returnvalue;
1521 }
1522
1523 /** \brief Generate the Random value
1524 *
1525 * This function generates the random value by taking a valid seed and limits.
1526 *
1527 * \param a lower limit.
1528 * \param x valid seed value.
1529 * \param m upper limit.
1530 *
1531 * \return Returns the random value.
1532 *
1533 */
1534 asm volatile uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
1535 {
1536 % reg a,x,m; lab cmp_m, sub_m, done;
1537 ! "%d4","%d5","%d6","%d0","%d1","%d2"
1538 mul.u %e4,a,x /* d5 = Eh; d4 = El */
1539 mov %d0,%d4 /* e0 = El */
1540 mov %d1, 0
1541 madd.u %e4,%e0,%d5,5 /* e4 = El + 5 * d5 */
1542 cmp_m:
1543 jge.u %d4,m,sub_m
1544 jz %d5,done
1545 sub_m:
1546 subx %d4,%d4,m /* e4=e4-m */
1547 subc %d5,%d5,%d1 /* d5=d5-0 */
1548 loopu cmp_m
1549 done:
1550 mov %d2,%d4
1551 }
1552
1553 /* Macros for backward compatibility of the intrinsics*/
1554 /******************************************************************************/
1555 #ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
1556 #ifndef __non_return_call
1557 #define __non_return_call Ifx__non_return_call
1558 #endif
1559
1560 #ifndef __jump_and_link
1561 #define __jump_and_link Ifx__jump_and_link
1562 #endif
1563
1564 #ifndef __moveToDataParam0
1565 #define __moveToDataParam0 Ifx__moveToDataParam0
1566 #endif
1567
1568 #ifndef __moveToDataParamRet
1569 #define __moveToDataParamRet Ifx__moveToDataParamRet
1570 #endif
1571
1572 #ifndef __getDataParamRet
1573 #define __getDataParamRet Ifx__getDataParamRet
1574 #endif
1575
1576 #ifndef __moveToAddrParam0
1577 #define __moveToAddrParam0 Ifx__moveToAddrParam0
1578 #endif
1579
1580 #ifndef __jumpToFunction
1581 #define __jumpToFunction Ifx__jumpToFunction
1582 #endif
1583
1584 #ifndef __jumpToFunctionWithLink
1585 #define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
1586 #endif
1587
1588 #ifndef __jumpBackToLink
1589 #define __jumpBackToLink Ifx__jumpBackToLink
1590 #endif
1591
1592 #ifndef __minX
1593 #define __minX Ifx__minX
1594 #endif
1595
1596 #ifndef __maxX
1597 #define __maxX Ifx__maxX
1598 #endif
1599
1600 #ifndef __saturateX
1601 #define __saturateX Ifx__saturateX
1602 #endif
1603
1604 #ifndef __checkrangeX
1605 #define __checkrangeX Ifx__checkrangeX
1606 #endif
1607
1608 #ifndef __saturate
1609 #define __saturate Ifx__saturate
1610 #endif
1611
1612 #ifndef __sqrf
1613 #define __sqrf Ifx__sqrf
1614 #endif
1615
1616 #ifndef __sqrtf
1617 #define __sqrtf Ifx__sqrtf
1618 #endif
1619
1620 #ifndef __checkrange
1621 #define __checkrange Ifx__checkrange
1622 #endif
1623
1624 #ifndef __roundf
1625 #define __roundf Ifx__roundf
1626 #endif
1627
1628 #ifndef __absf
1629 #define __absf Ifx__absf
1630 #endif
1631
1632 #ifndef __minf
1633 #define __minf Ifx__minf
1634 #endif
1635
1636 #ifndef __maxf
1637 #define __maxf Ifx__maxf
1638 #endif
1639
1640 #ifndef __saturatef
1641 #define __saturatef Ifx__saturatef
1642 #endif
1643
1644 #ifndef __checkrangef
1645 #define __checkrangef Ifx__checkrangef
1646 #endif
1647
1648 #ifndef __abs_stdreal
1649 #define __abs_stdreal Ifx__abs_stdreal
1650 #endif
1651
1652 #ifndef __min_stdreal
1653 #define __min_stdreal Ifx__min_stdreal
1654 #endif
1655
1656 #ifndef __max_stdreal
1657 #define __max_stdreal Ifx__max_stdreal
1658 #endif
1659
1660 #ifndef __saturate_stdreal
1661 #define __saturate_stdreal Ifx__saturate_stdreal
1662 #endif
1663
1664 #ifndef __neqf
1665 #define __neqf Ifx__neqf
1666 #endif
1667
1668 #ifndef __leqf
1669 #define __leqf Ifx__leqf
1670 #endif
1671
1672 #ifndef __geqf
1673 #define __geqf Ifx__geqf
1674 #endif
1675
1676 #ifndef __clssf
1677 #define __clssf Ifx__clssf
1678 #endif
1679
1680 #ifndef __float_to_fract
1681 #define __float_to_fract Ifx__float_to_fract
1682 #endif
1683
1684 #ifndef __fract_to_float
1685 #define __fract_to_float Ifx__fract_to_float
1686 #endif
1687
1688 #ifndef __getfract
1689 #define __getfract Ifx__getfract
1690 #endif
1691
1692 #ifndef __mac_r_sf
1693 #define __mac_r_sf Ifx__mac_r_sf
1694 #endif
1695
1696 #ifndef __mac_sf
1697 #define __mac_sf Ifx__mac_sf
1698 #endif
1699
1700 #ifndef __mulfractfract
1701 #define __mulfractfract Ifx__mulfractfract
1702 #endif
1703
1704 #ifndef __mulfractlong
1705 #define __mulfractlong Ifx__mulfractlong
1706 #endif
1707
1708 #ifndef __round16
1709 #define __round16 Ifx__round16
1710 #endif
1711
1712 #ifndef __fract_to_sfract
1713 #define __fract_to_sfract Ifx__fract_to_sfract
1714 #endif
1715
1716 #ifndef __round16
1717 #define __round16 Ifx__round16
1718 #endif
1719
1720 #ifndef __s16_to_sfract
1721 #define __s16_to_sfract Ifx__s16_to_sfract
1722 #endif
1723
1724 #ifndef __sfract_to_s16
1725 #define __sfract_to_s16 Ifx__sfract_to_s16
1726 #endif
1727
1728 #ifndef __sfract_to_u16
1729 #define __sfract_to_u16 Ifx__sfract_to_u16
1730 #endif
1731
1732 #ifndef __shaaccum
1733 #define __shaaccum Ifx__shaaccum
1734 #endif
1735
1736 #ifndef __shafracts
1737 #define __shafracts Ifx__shafracts
1738 #endif
1739
1740 #ifndef __shasfracts
1741 #define __shasfracts Ifx__shasfracts
1742 #endif
1743
1744 #ifndef __u16_to_sfract
1745 #define __u16_to_sfract Ifx__u16_to_sfract
1746 #endif
1747
1748 #ifndef __getbit
1749 #define __getbit Ifx__getbit
1750 #endif
1751
1752 #ifndef __imaskldmst
1753 #define __imaskldmst Ifx__imaskldmst
1754 #endif
1755
1756 #ifndef __putbit
1757 #define __putbit Ifx__putbit
1758 #endif
1759
1760 #ifndef __cacheawi_bo_post_inc
1761 #define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
1762 #endif
1763
1764 #ifndef __cacheiwi
1765 #define __cacheiwi Ifx__cacheiwi
1766 #endif
1767
1768 #ifndef __mulsc
1769 #define __mulsc Ifx__mulsc
1770 #endif
1771
1772 #ifndef __rol
1773 #define __rol Ifx__rol
1774 #endif
1775
1776 #ifndef __ror
1777 #define __ror Ifx__ror
1778 #endif
1779
1780 #ifndef __absb
1781 #define __absb Ifx__absb
1782 #endif
1783
1784 #ifndef __absh
1785 #define __absh Ifx__absh
1786 #endif
1787
1788 #ifndef __abssh
1789 #define __abssh Ifx__abssh
1790 #endif
1791
1792 #ifndef __extractbyte1
1793 #define __extractbyte1 Ifx__extractbyte1
1794 #endif
1795
1796 #ifndef __extractbyte2
1797 #define __extractbyte2 Ifx__extractbyte2
1798 #endif
1799
1800 #ifndef __extractbyte3
1801 #define __extractbyte3 Ifx__extractbyte3
1802 #endif
1803
1804 #ifndef __extractbyte4
1805 #define __extractbyte4 Ifx__extractbyte4
1806 #endif
1807
1808 #ifndef __extracthw1
1809 #define __extracthw1 Ifx__extracthw1
1810 #endif
1811
1812 #ifndef __extracthw2
1813 #define __extracthw2 Ifx__extracthw2
1814 #endif
1815
1816 #ifndef __extractubyte1
1817 #define __extractubyte1 Ifx__extractubyte1
1818 #endif
1819
1820 #ifndef __extractubyte2
1821 #define __extractubyte2 Ifx__extractubyte2
1822 #endif
1823
1824 #ifndef __extractubyte3
1825 #define __extractubyte3 Ifx__extractubyte3
1826 #endif
1827
1828 #ifndef __extractubyte4
1829 #define __extractubyte4 Ifx__extractubyte4
1830 #endif
1831
1832 #ifndef __extractuhw1
1833 #define __extractuhw1 Ifx__extractuhw1
1834 #endif
1835
1836 #ifndef __extractuhw2
1837 #define __extractuhw2 Ifx__extractuhw2
1838 #endif
1839
1840 #ifndef __getbyte1
1841 #define __getbyte1 Ifx__getbyte1
1842 #endif
1843
1844 #ifndef __getbyte2
1845 #define __getbyte2 Ifx__getbyte2
1846 #endif
1847
1848 #ifndef __getbyte3
1849 #define __getbyte3 Ifx__getbyte3
1850 #endif
1851
1852 #ifndef __getbyte4
1853 #define __getbyte4 Ifx__getbyte4
1854 #endif
1855
1856 #ifndef __gethw1
1857 #define __gethw1 Ifx__gethw1
1858 #endif
1859
1860 #ifndef __gethw2
1861 #define __gethw2 Ifx__gethw2
1862 #endif
1863
1864 #ifndef __getubyte1
1865 #define __getubyte1 Ifx__getubyte1
1866 #endif
1867
1868 #ifndef __getubyte2
1869 #define __getubyte2 Ifx__getubyte2
1870 #endif
1871
1872 #ifndef __getubyte3
1873 #define __getubyte3 Ifx__getubyte3
1874 #endif
1875
1876 #ifndef __getubyte4
1877 #define __getubyte4 Ifx__getubyte4
1878 #endif
1879
1880 #ifndef __getuhw1
1881 #define __getuhw1 Ifx__getuhw1
1882 #endif
1883
1884 #ifndef __getuhw2
1885 #define __getuhw2 Ifx__getuhw2
1886 #endif
1887
1888 #ifndef __initpackb
1889 #define __initpackb Ifx__initpackb
1890 #endif
1891
1892 #ifndef __initpackbl
1893 #define __initpackbl Ifx__initpackbl
1894 #endif
1895
1896 #ifndef __initpackhw
1897 #define __initpackhw Ifx__initpackhw
1898 #endif
1899
1900 #ifndef __initpackhwl
1901 #define __initpackhwl Ifx__initpackhwl
1902 #endif
1903
1904 #ifndef __initupackb
1905 #define __initupackb Ifx__initupackb
1906 #endif
1907
1908 #ifndef __initupackhw
1909 #define __initupackhw Ifx__initupackhw
1910 #endif
1911
1912 #ifndef __insertbyte1
1913 #define __insertbyte1 Ifx__insertbyte1
1914 #endif
1915
1916 #ifndef __insertbyte2
1917 #define __insertbyte2 Ifx__insertbyte2
1918 #endif
1919
1920 #ifndef __insertbyte3
1921 #define __insertbyte3 Ifx__insertbyte3
1922 #endif
1923
1924 #ifndef __insertbyte4
1925 #define __insertbyte4 Ifx__insertbyte4
1926 #endif
1927
1928 #ifndef __inserthw1
1929 #define __inserthw1 Ifx__inserthw1
1930 #endif
1931
1932 #ifndef __inserthw2
1933 #define __inserthw2 Ifx__inserthw2
1934 #endif
1935
1936 #ifndef __insertubyte1
1937 #define __insertubyte1 Ifx__insertubyte1
1938 #endif
1939
1940 #ifndef __insertubyte2
1941 #define __insertubyte2 Ifx__insertubyte2
1942 #endif
1943
1944 #ifndef __insertubyte3
1945 #define __insertubyte3 Ifx__insertubyte3
1946 #endif
1947
1948 #ifndef __insertubyte4
1949 #define __insertubyte4 Ifx__insertubyte4
1950 #endif
1951
1952 #ifndef __insertuhw1
1953 #define __insertuhw1 Ifx__insertuhw1
1954 #endif
1955
1956 #ifndef __insertuhw2
1957 #define __insertuhw2 Ifx__insertuhw2
1958 #endif
1959
1960 #ifndef __minb
1961 #define __minb Ifx__minb
1962 #endif
1963
1964 #ifndef __minbu
1965 #define __minbu Ifx__minbu
1966 #endif
1967
1968 #ifndef __minh
1969 #define __minh Ifx__minh
1970 #endif
1971
1972 #ifndef __minhu
1973 #define __minhu Ifx__minhu
1974 #endif
1975
1976 #ifndef __setbyte1
1977 #define __setbyte1 Ifx__setbyte1
1978 #endif
1979
1980 #ifndef __setbyte2
1981 #define __setbyte2 Ifx__setbyte2
1982 #endif
1983
1984 #ifndef __setbyte3
1985 #define __setbyte3 Ifx__setbyte3
1986 #endif
1987
1988 #ifndef __setbyte4
1989 #define __setbyte4 Ifx__setbyte4
1990 #endif
1991
1992 #ifndef __sethw1
1993 #define __sethw1 Ifx__sethw1
1994 #endif
1995
1996 #ifndef __sethw2
1997 #define __sethw2 Ifx__sethw2
1998 #endif
1999
2000 #ifndef __setubyte1
2001 #define __setubyte1 Ifx__setubyte1
2002 #endif
2003
2004 #ifndef __setubyte2
2005 #define __setubyte2 Ifx__setubyte2
2006 #endif
2007
2008 #ifndef __setubyte3
2009 #define __setubyte3 Ifx__setubyte3
2010 #endif
2011
2012 #ifndef __setubyte4
2013 #define __setubyte4 Ifx__setubyte4
2014 #endif
2015
2016 #ifndef __setuhw1
2017 #define __setuhw1 Ifx__setuhw1
2018 #endif
2019
2020 #ifndef __setuhw2
2021 #define __setuhw2 Ifx__setuhw2
2022 #endif
2023
2024 #ifndef __fabs
2025 #define __fabs Ifx__fabs
2026 #endif
2027
2028 #ifndef __fabsf
2029 #define __fabsf Ifx__fabsf
2030 #endif
2031
2032 #ifndef __parity
2033 #define __parity Ifx__parity
2034 #endif
2035
2036 #ifndef __satb
2037 #define __satb Ifx__satb
2038 #endif
2039
2040 #ifndef __satbu
2041 #define __satbu Ifx__satbu
2042 #endif
2043
2044 #ifndef __sath
2045 #define __sath Ifx__sath
2046 #endif
2047
2048 #ifndef __sathu
2049 #define __sathu Ifx__sathu
2050 #endif
2051
2052 #ifndef __addsu
2053 #define __addsu Ifx__addsu
2054 #endif
2055
2056 #ifndef __subs
2057 #define __subs Ifx__subs
2058 #endif
2059
2060 #ifndef __subsu
2061 #define __subsu Ifx__subsu
2062 #endif
2063
2064 #ifndef __ldmst
2065 #define __ldmst Ifx__ldmst
2066 #endif
2067
2068 #ifndef __mem_barrier
2069 #define __mem_barrier Ifx__mem_barrier
2070 #endif
2071
2072 #if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
2073 #define NOP Ifx__NOP
2074 #endif
2075
2076 #ifndef __nops
2077 #define __nops Ifx__nops
2078 #endif
2079
2080 #ifndef __nops1000
2081 #define __nops1000 Ifx__nops1000
2082 #endif
2083
2084 #ifndef __swap
2085 #define __swap Ifx__swap
2086 #endif
2087
2088 #ifndef __cmpAndSwap
2089 #define __cmpAndSwap Ifx__cmpAndSwap
2090 #endif
2091
2092 #ifndef __setareg
2093 #define __setareg Ifx__setareg
2094 #endif
2095
2096 #ifndef __stopPerfCounters
2097 #define __stopPerfCounters Ifx__stopPerfCounters
2098 #endif
2099
2100 #ifndef __fixpoint_to_float32
2101 #define __fixpoint_to_float32 Ifx__fixpoint_to_float32
2102 #endif
2103
2104 #ifndef __getA11
2105 #define __getA11 Ifx__getA11
2106 #endif
2107
2108 #ifndef __setStackPointer
2109 #define __setStackPointer Ifx__setStackPointer
2110 #endif
2111
2112 #if ((!defined(__crc32)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
2113 #define __crc32 Ifx__crc32
2114 #endif
2115
2116 #endif
2117 /******************************************************************************/
2118 /* *INDENT-ON* */
2119 /******************************************************************************/
2120 #endif /* IFXCPU_INTRINSICSDCC_H */
Ifx__stopPerfCounters
asm volatile void Ifx__stopPerfCounters(void)
Definition: IfxCpu_IntrinsicsDcc.h:1465
Ifx__addsu
asm volatile uint32 Ifx__addsu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:1304
Ifx__insertubyte3
asm __upackb Ifx__insertubyte3(__upackb a, uint8 b)
Insert uint8 into third unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:964
__shasfracts
#define __shasfracts
Definition: IfxCpu_IntrinsicsDcc.h:1741
Ifx__setubyte1
asm volatile void Ifx__setubyte1(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1106
Ifx__extractbyte4
asm sint8 Ifx__extractbyte4(__packb a)
Extract fourth byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:633
Ifx__moveToDataParam0
asm volatile void Ifx__moveToDataParam0(unsigned int var)
Definition: IfxCpu_IntrinsicsDcc.h:74
IfxCpu_calculateCrc32
IFX_INLINE unsigned int IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
Definition: IfxCpu_IntrinsicsDcc.h:1511
__mtcr
void __mtcr(const uint32, sint32) __attribute__((intrinsic_function(0x102
Ifx__satbu
asm volatile uint8 Ifx__satbu(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1264
Ifx__minb
asm __packb Ifx__minb(__packb a, __packb b)
Definition: IfxCpu_IntrinsicsDcc.h:1003
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
__disable
void __disable(void) __attribute__((intrinsic_function(0x103
Ifx__nops
asm volatile void Ifx__nops(uint32 cnt)
Definition: IfxCpu_IntrinsicsDcc.h:1386
cls
sint32 cls
Definition: IfxCpu_IntrinsicsDcc.h:1204
Ifx__cacheiwi
asm volatile void Ifx__cacheiwi(uint8 *p)
Definition: IfxCpu_IntrinsicsDcc.h:519
Ifx__mulsc
asm volatile sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
Definition: IfxCpu_IntrinsicsDcc.h:542
abs
sint32 abs
Definition: IfxCpu_IntrinsicsDcc.h:1180
Ifx__mac_sf
asm sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsDcc.h:260
Ifx__s16_to_sfract
asm sfract Ifx__s16_to_sfract(short a)
Definition: IfxCpu_IntrinsicsDcc.h:309
Ifx__non_return_call
asm volatile void Ifx__non_return_call(void(*fun)(void))
Definition: IfxCpu_IntrinsicsDcc.h:58
Ifx__insertubyte2
asm __upackb Ifx__insertubyte2(__upackb a, uint8 b)
Insert uint8 into second unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:955
Ifx__imaskldmst
asm volatile void Ifx__imaskldmst(void *a, sint32 b, sint32 p, const sint32 w)
Definition: IfxCpu_IntrinsicsDcc.h:436
__adds
sint32 __adds(sint32, sint32) __attribute__((intrinsic_pseudo(1
__mins
sint32 __mins(sint32, sint32) __attribute__((intrinsic_function(0x10b
Ifx__getbyte4
asm sint8 Ifx__getbyte4(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:744
__packb
long __packb
Definition: Ifx_TypesDcc.h:47
__float_to_sfract
IFX_INLINE sfract __float_to_sfract(float a)
Definition: IfxCpu_IntrinsicsDcc.h:301
sfract
short sfract
Definition: Ifx_TypesDcc.h:45
__mfcr
sint32 __mfcr(const uint32) __attribute__((intrinsic_function(0x101
Ifx__cacheawi_bo_post_inc
asm volatile uint8 * Ifx__cacheawi_bo_post_inc(uint8 *p)
Definition: IfxCpu_IntrinsicsDcc.h:509
Ifx__initupackhw
asm __upackhw Ifx__initupackhw(uint16 a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:883
Ifx__setubyte4
asm volatile void Ifx__setubyte4(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1139
Ifx__sath
asm short Ifx__sath(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1273
__mac_r_sf
#define __mac_r_sf
Definition: IfxCpu_IntrinsicsDcc.h:1693
Ifx__extractuhw1
asm volatile uint16 Ifx__extractuhw1(__upackhw a)
Definition: IfxCpu_IntrinsicsDcc.h:696
Ifx__ror
asm volatile uint32 Ifx__ror(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsDcc.h:561
Ifx__getuhw1
asm volatile uint16 Ifx__getuhw1(__upackhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:814
Ifx__absh
asm __packhw Ifx__absh(__packhw a)
Definition: IfxCpu_IntrinsicsDcc.h:588
Ifx__insertbyte2
asm __packb Ifx__insertbyte2(__packb a, sint8 b)
Insert sint8 into second byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:901
IfxCpu_getRandomVal
asm volatile uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Generate the Random value.
Definition: IfxCpu_IntrinsicsDcc.h:1534
Ifx__gethw2
asm short Ifx__gethw2(__packhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:764
__clo
sint32 __clo(sint32) __attribute__((intrinsic_pseudo(1
Ifx__subsu
asm volatile uint32 Ifx__subsu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:1322
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
Ifx__fract_to_sfract
#define Ifx__fract_to_sfract
Definition: IfxCpu_IntrinsicsDcc.h:297
Ifx__satb
asm sint8 Ifx__satb(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1255
Ifx__setuhw1
asm volatile void Ifx__setuhw1(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:1150
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx__subs
asm volatile sint32 Ifx__subs(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:1313
Ifx__absb
asm __packb Ifx__absb(__packb a)
Definition: IfxCpu_IntrinsicsDcc.h:579
Ifx__sfract_to_s16
asm short Ifx__sfract_to_s16(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:319
Ifx__shasfracts
asm sfract Ifx__shasfracts(sfract a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:371
Ifx__initpackhw
asm __packhw Ifx__initpackhw(short a, short b)
Initialize __packhw with two integers.
Definition: IfxCpu_IntrinsicsDcc.h:854
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesDcc.h:50
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
Ifx__extractubyte3
asm volatile uint8 Ifx__extractubyte3(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:678
Ifx__u16_to_sfract
asm sfract Ifx__u16_to_sfract(uint16 a)
Definition: IfxCpu_IntrinsicsDcc.h:381
Ifx__mac_r_sf
asm sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsDcc.h:247
Ifx__initupackb
asm __upackb Ifx__initupackb(uint32 a, uint32 b, uint32 c, uint32 d)
Definition: IfxCpu_IntrinsicsDcc.h:872
Ifx__getA11
asm volatile void * Ifx__getA11(void)
Definition: IfxCpu_IntrinsicsDcc.h:1491
__ins
uint32 __ins(uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
Ifx__setubyte3
asm volatile void Ifx__setubyte3(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1128
__isync
void __isync(void) __attribute__((intrinsic_function(0x103
Ifx__insertbyte1
asm __packb Ifx__insertbyte1(__packb a, sint8 b)
Insert sint8 into first byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:892
mtcr
void mtcr
Definition: IfxCpu_IntrinsicsDcc.h:1240
Ifx__sethw2
asm volatile void Ifx__sethw2(__packhw *a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:1095
Ifx__setbyte2
asm volatile void Ifx__setbyte2(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1051
Ifx__getubyte1
asm volatile uint8 Ifx__getubyte1(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:774
Ifx__extractubyte2
asm volatile uint8 Ifx__extractubyte2(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:669
Ifx__minhu
asm __upackhw Ifx__minhu(__upackhw a, __upackhw b)
Definition: IfxCpu_IntrinsicsDcc.h:1031
Ifx__extractuhw2
asm volatile uint16 Ifx__extractuhw2(__upackhw a)
Definition: IfxCpu_IntrinsicsDcc.h:705
Ifx__gethw1
asm short Ifx__gethw1(__packhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:754
Ifx__getubyte2
asm volatile uint8 Ifx__getubyte2(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:784
circ_t
unsigned long long circ_t
Definition: Ifx_TypesDcc.h:52
Ifx__insertubyte4
asm __upackb Ifx__insertubyte4(__upackb a, uint8 b)
Insert uint8 into fourth unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:973
Ifx__setStackPointer
asm void Ifx__setStackPointer(void *stackAddr)
Definition: IfxCpu_IntrinsicsDcc.h:1497
Ifx__extractbyte1
asm sint8 Ifx__extractbyte1(__packb a)
Extract first byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:606
Ifx__ldmst
asm volatile void Ifx__ldmst(volatile void *address, uint32 mask, uint32 value)
Definition: IfxCpu_IntrinsicsDcc.h:1362
__maxs
uint32 __maxs(uint32, uint32) __attribute__((intrinsic_function(0x10b
Ifx__inserthw1
asm __packhw Ifx__inserthw1(__packhw a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:928
abss
sint32 abss
Definition: IfxCpu_IntrinsicsDcc.h:1192
Ifx__clssf
asm short Ifx__clssf(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:205
__packhw
long __packhw
Definition: Ifx_TypesDcc.h:49
Ifx__minh
asm __packhw Ifx__minh(__packhw a, __packhw b)
Definition: IfxCpu_IntrinsicsDcc.h:1022
fract
long fract
Definition: Ifx_TypesDcc.h:44
Ifx__sathu
asm volatile uint16 Ifx__sathu(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1282
__max
sint32 __max(sint32, sint32) __attribute__((intrinsic_pseudo(3
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
laccum
long long laccum
Definition: Ifx_TypesDcc.h:46
Ifx__insertbyte4
asm __packb Ifx__insertbyte4(__packb a, sint8 b)
Insert sint8 into fourth byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:919
__cls
sint32 __cls(sint32) __attribute__((intrinsic_pseudo(1
Ifx__getbyte2
asm sint8 Ifx__getbyte2(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:724
__swap
#define __swap
Definition: IfxCpu_IntrinsicsDcc.h:2085
Ifx__extractbyte3
asm sint8 Ifx__extractbyte3(__packb a)
Extract third byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:624
Ifx__fabs
asm double Ifx__fabs(double d)
Definition: IfxCpu_IntrinsicsDcc.h:1216
adds
sint32 adds
Definition: IfxCpu_IntrinsicsDcc.h:1298
__shafracts
#define __shafracts
Definition: IfxCpu_IntrinsicsDcc.h:1737
__minb
#define __minb
Definition: IfxCpu_IntrinsicsDcc.h:1961
__imaskldmst
#define __imaskldmst
Definition: IfxCpu_IntrinsicsDcc.h:1753
Ifx__fixpoint_to_float32
asm float Ifx__fixpoint_to_float32(fract value, sint32 shift)
Convert a fixpoint value to float32.
Definition: IfxCpu_IntrinsicsDcc.h:1484
Ifx__initpackhwl
asm __packhw Ifx__initpackhwl(long a)
Definition: IfxCpu_IntrinsicsDcc.h:863
Ifx__getbyte3
asm sint8 Ifx__getbyte3(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:734
Ifx__extractbyte2
asm sint8 Ifx__extractbyte2(__packb a)
Extract second byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:615
__syscall
void __syscall(const uint32) __attribute__((intrinsic_function(0x100
Ifx__getbyte1
asm sint8 Ifx__getbyte1(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:714
Ifx__insertuhw1
asm __upackhw Ifx__insertuhw1(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:982
__upackb
unsigned long __upackb
Definition: Ifx_TypesDcc.h:48
Ifx__insertuhw2
asm __upackhw Ifx__insertuhw2(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:991
Ifx__moveToDataParamRet
asm volatile void Ifx__moveToDataParamRet(unsigned int var)
Definition: IfxCpu_IntrinsicsDcc.h:81
Ifx__extractubyte1
asm volatile uint8 Ifx__extractubyte1(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:660
__abss
sint32 __abss(sint32) __attribute__((intrinsic_pseudo(1
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
Ifx__shafracts
asm fract Ifx__shafracts(fract a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:358
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
__debug
void __debug(void) __attribute__((intrinsic_function(0x103
__insert
uint32 __insert(uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109
Ifx__float_to_fract
asm fract Ifx__float_to_fract(float a)
Definition: IfxCpu_IntrinsicsDcc.h:215
__extru
uint32 __extru(uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
Ifx__extractubyte4
asm volatile uint8 Ifx__extractubyte4(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:687
Ifx__setuhw2
asm volatile void Ifx__setuhw2(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:1161
__insn
uint32 __insn(uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
__extr
sint32 __extr(sint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
__disable_and_save
#define __disable_and_save
Definition: IfxCpu_IntrinsicsGnuc.h:1880
Ifx__round16
asm sfract Ifx__round16(fract a)
Definition: IfxCpu_IntrinsicsDcc.h:288
Ifx__sethw1
asm volatile void Ifx__sethw1(__packhw *a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:1084
__scheduling_barrier
void __scheduling_barrier(void) __attribute__((intrinsic_function(9
Ifx__nops1000
asm volatile void Ifx__nops1000(uint32 x)
Definition: IfxCpu_IntrinsicsDcc.h:1399
Ifx__getubyte3
asm volatile uint8 Ifx__getubyte3(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:794
uint16
unsigned short uint16
Definition: Platform_Types.h:112
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
__enable
void __enable(void) __attribute__((intrinsic_function(0x103
__bisr
void __bisr(const uint32) __attribute__((intrinsic_function(0x100
Ifx__insertbyte3
asm __packb Ifx__insertbyte3(__packb a, sint8 b)
Insert sint8 into third byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:910
Ifx__parity
asm volatile sint32 Ifx__parity(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1246
Ifx__rol
asm volatile uint32 Ifx__rol(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsDcc.h:552
Ifx__shaaccum
asm laccum Ifx__shaaccum(laccum a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:338
Ifx__getDataParamRet
asm volatile unsigned int Ifx__getDataParamRet(void)
Definition: IfxCpu_IntrinsicsDcc.h:88
Ifx__moveToAddrParam0
asm volatile void Ifx__moveToAddrParam0(const void *var)
Definition: IfxCpu_IntrinsicsDcc.h:94
Ifx__sfract_to_u16
asm volatile uint16 Ifx__sfract_to_u16(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:328
__restore
void __restore(sint32) __attribute__((intrinsic_function(0x104
Ifx__setbyte4
asm volatile void Ifx__setbyte4(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1073
__abs
sint32 __abs(sint32) __attribute__((intrinsic_pseudo(1
Ifx__fract_to_float
asm float Ifx__fract_to_float(fract a)
Convert fract to float.
Definition: IfxCpu_IntrinsicsDcc.h:225
__maxu
uint32 __maxu(uint32, uint32) __attribute__((intrinsic_pseudo(3
Ifx__fabsf
asm float Ifx__fabsf(float f)
Definition: IfxCpu_IntrinsicsDcc.h:1225
__svlcx
void __svlcx(void) __attribute__((intrinsic_function(0x103
sint32
long sint32
Definition: Platform_Types.h:134
Ifx__getubyte4
asm volatile uint8 Ifx__getubyte4(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:804
Ifx__getfract
asm fract Ifx__getfract(laccum a)
Definition: IfxCpu_IntrinsicsDcc.h:235
Ifx__setubyte2
asm volatile void Ifx__setubyte2(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1117
Ifx__cmpAndSwap
asm volatile unsigned int Ifx__cmpAndSwap(unsigned int *address, unsigned long value, unsigned long CmpVal)
Definition: IfxCpu_IntrinsicsDcc.h:1441
Ifx__swap
asm volatile uint32 Ifx__swap(void *place, uint32 value)
Definition: IfxCpu_IntrinsicsDcc.h:1431
Ifx__jumpToFunction
IFX_INLINE void Ifx__jumpToFunction(const void *fun)
Definition: IfxCpu_IntrinsicsDcc.h:101
Ifx__extracthw1
asm short Ifx__extracthw1(__packhw a)
Extract first short from a __packhw.
Definition: IfxCpu_IntrinsicsDcc.h:642
min
sint32 min
Definition: IfxCpu_IntrinsicsDcc.h:131
__rslcx
void __rslcx(void) __attribute__((intrinsic_function(0x103
Ifx__insertubyte1
asm __upackb Ifx__insertubyte1(__upackb a, uint8 b)
Insert uint8 into first unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:946
Ifx__initpackb
asm __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
Definition: IfxCpu_IntrinsicsDcc.h:834
Ifx__getuhw2
asm volatile uint16 Ifx__getuhw2(__upackhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:824
__absdif
sint32 __absdif(sint32, sint32) __attribute__((intrinsic_pseudo(1
Ifx__inserthw2
asm __packhw Ifx__inserthw2(__packhw a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:937
Ifx__mulfractfract
asm long Ifx__mulfractfract(fract a, fract b)
Definition: IfxCpu_IntrinsicsDcc.h:270
isync
void isync
Definition: IfxCpu_IntrinsicsDcc.h:1353
Ifx__minbu
asm __upackb Ifx__minbu(__upackb a, __upackb b)
Definition: IfxCpu_IntrinsicsDcc.h:1013
Ifx__setbyte3
asm volatile void Ifx__setbyte3(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1062
Ifx__initpackbl
asm __packb Ifx__initpackbl(long a)
Definition: IfxCpu_IntrinsicsDcc.h:845
Ifx__mulfractlong
asm long Ifx__mulfractlong(fract a, long b)
Definition: IfxCpu_IntrinsicsDcc.h:279
nop
void nop
Definition: IfxCpu_IntrinsicsDcc.h:1378
Ifx__jump_and_link
asm volatile void Ifx__jump_and_link(void(*fun)(void))
Definition: IfxCpu_IntrinsicsDcc.h:66
Ifx__jumpBackToLink
asm volatile void Ifx__jumpBackToLink(void)
Definition: IfxCpu_IntrinsicsDcc.h:111
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx__extracthw2
asm short Ifx__extracthw2(__packhw a)
Extract second short from a __packhw.
Definition: IfxCpu_IntrinsicsDcc.h:651
__initcirc
asm circ_t __initcirc(void *buf, uint16 bufsize, uint16 byteindex)
Definition: IfxCpu_IntrinsicsDcc.h:528
sint8
signed char sint8
Definition: Platform_Types.h:125
Ifx__jumpToFunctionWithLink
IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
Definition: IfxCpu_IntrinsicsDcc.h:106
Ifx__abssh
asm __packhw Ifx__abssh(__packhw a)
Definition: IfxCpu_IntrinsicsDcc.h:597
__cacheawi
void __cacheawi(void *) __attribute__((intrinsic_function(0x110
__mac_sf
#define __mac_sf
Definition: IfxCpu_IntrinsicsDcc.h:1697
Ifx__setbyte1
asm volatile void Ifx__setbyte1(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1040
insert
uint32 insert
Definition: IfxCpu_IntrinsicsDcc.h:421
extr
sint32 extr
Definition: IfxCpu_IntrinsicsDcc.h:398
Ifx__crc32
asm volatile unsigned int Ifx__crc32(uint32 b, uint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1504


iLLD_TC26B: IfxCpu_IntrinsicsGhs2G.h Source File

  • Cpu
  • Std
IfxCpu_IntrinsicsGhs2G.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_IntrinsicsGhs.h
3 *
4 * \version iLLD_1_0_1_12_0
5 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup IfxLld_Cpu_Intrinsics_Ghs Intrinsics for GNU compiler
41 * \ingroup IfxLld_Cpu_Intrinsics
42 *
43 */
44
45 #ifndef IFXCPU_INTRINSICSGHS_H
46 #define IFXCPU_INTRINSICSGHS_H
47
48 /******************************************************************************/
49 #include "Ifx_Types.h"
50 #include <intrinsics.h>
51
52 /******************************************************************************/
53 /* *INDENT-OFF* */
54 #define STRINGIFY(x) #x
55
56 typedef void (*voidfunc)();
57
58 /** Function call without return
59 */
60 #define Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
61
62 /** Jump and link
63 */
64 IFX_INLINE void Ifx__jump_and_link(void (*fun)(void))
65 {
66 __asm__ volatile ("jli %0"::"a"(fun));
67 }
68
69 IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
70 {
71 __asm__ volatile ("mov\t d4, %0"::"d"(var));
72 }
73
74 IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
75 {
76 __asm__ volatile ("mov\t d2, %0"::"d"(var));
77 }
78
79 IFX_INLINE unsigned int Ifx__getDataParamRet(void)
80 {
81 unsigned int var;
82 __asm__ volatile (" mov\t %0, d2":"=d"(var));
83 return var;
84 }
85
86 IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
87 {
88 __asm__ volatile ("mov.aa\t a4, %0"::"a"(var));
89 }
90
91 IFX_INLINE void Ifx__jumpToFunction(void (*fun)(void))
92 {
93 Ifx__non_return_call(fun);
94 }
95
96 IFX_INLINE void Ifx__jumpToFunctionWithLink(void (*fun)(void))
97 {
98 Ifx__jump_and_link(fun);
99 }
100
101 IFX_INLINE void Ifx__jumpBackToLink(void)
102 {
103 __asm__ volatile ("ji a11");
104 }
105
106 /** Insert a memory barrier
107 */
108 #define Ifx__mem_barrier __asm__ volatile("":::"memory");
109
110 /** \defgroup IfxLld_Cpu_Intrinsics_Ghs_any_type Cross type arithmetic operation
111 *
112 * Macro compatible with float, fix point, signed integer and unsigned integer
113 *
114 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
115 * \{
116 */
117 #define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
118 #define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
119 #define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
120 #define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
121 /** \} */
122
123 /** \defgroup IfxLld_Cpu_Intrinsics_Ghs_singed_integer Signed integer operation
124 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
125 * \{
126 */
127 #define Ifx__saturate(X,Min,Max) ( __min(__max(X, Min), Max) )
128 /** \} */
129
130 /** \defgroup IfxLld_Cpu_Intrinsics_Ghs_unsinged_integer Unsigned integer operation
131 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
132 * \{
133 */
134 #define Ifx__saturateu(X,Min,Max) ( __minu(__maxu(X, Min), Max) )
135 /** \} */
136
137 /** \defgroup intrinsicsghs_float Floating point operation
138 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
139 * \{
140 */
141
142 #define Ifx__sqrf(X) ((X) * (X))
143 #define Ifx__sqrtf(X) sqrtf(X)
144 #define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
145
146 #define Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
147 #define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
148 #define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
149 #define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
150 #define Ifx__saturatef(X,Min,Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
151 #define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
152
153 #define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
154 #define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
155 #define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
156 #define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
157
158 #define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
159 #define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
160 #define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
161 /** \} */
162
163 /** \defgroup IfxLld_Cpu_Intrinsics_Ghsfractional Fractional Arithmetic Support
164 The next table provides an overview of intrinsic functions to convert fractional values. Note that the
165 TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
166 need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
167 compiler does support these functions.
168 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
169 * \{
170 */
171
172 /** Count the consecutive number of bits that have the same value as bit 15 of an sfract
173 */
174 IFX_INLINE sint16 Ifx__clssf(sfract a)
175 {
176 sint16 res;
177 __asm__ volatile ("sh %1,%1,16 \n\
178 cls %0,%1":"=d"(res):"d"(a):"memory");
179 return res;
180 }
181
182 /** Convert fract to float
183 */
184 IFX_INLINE float Ifx__fract_to_float(fract a)
185 {
186 float res;
187 __asm__ volatile ("q31tof %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
188 return res;
189 }
190
191 /** Convert float to fract
192 */
193 IFX_INLINE fract Ifx__float_to_fract(float a)
194 {
195 fract res;
196 __asm__ volatile ("ftoq31 %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
197 return res;
198 }
199
200 /** Convert laccum to fract
201 */
202 IFX_INLINE fract Ifx__getfract(laccum a)
203 {
204 fract res;
205 __asm__ volatile ("dextr %0,%H1,%L1,0x11":"=&d" (res):"d" (a):"memory");
206 return res;
207 }
208
209 /** Multiply-add with rounding. Returns the rounded result of ( a + b * c )
210 */
211 IFX_INLINE sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
212 {
213 sfract res;
214 __asm__ volatile ("sh %1,%1,16 \n\
215 maddrs.q %0,%1,%2L,%3L,1 \n\
216 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
217 return res;
218 }
219
220 /** Multiply-add sfract. Returns ( a + b * c )
221 */
222 IFX_INLINE sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
223 {
224 sfract res;
225 __asm__ volatile ("sh %1,%1,16 \n\
226 madds.q %0,%1,%2L,%3L,1 \n\
227 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
228 return res;
229 }
230
231 /** Integer part of the multiplication of a fract and a fract
232 */
233 IFX_INLINE long Ifx__mulfractfract(fract a, fract b)
234 {
235 long res;
236 __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
237 return res;
238 }
239
240 /** Integer part of the multiplication of a fract and a long
241 */
242 IFX_INLINE long Ifx__mulfractlong(fract a, long b)
243 {
244 long res;
245 __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
246 return res;
247 }
248
249 /** Convert fract to sfract
250 */
251 IFX_INLINE sfract Ifx__round16(fract a)
252 {
253 sfract res;
254 __asm__ volatile ("mov.u %0,0x8000 \n\
255 adds %0,%1 \n\
256 extr %0,%0,0x10,0x10 "
257 :"=&d"(res):"d"(a):"memory");
258 return res;
259 }
260
261 #define Ifx__fract_to_sfract Ifx__round16
262
263 /** Convert float to sfract
264 */
265 IFX_INLINE sfract Ifx__float_to_sfract(float a)
266 {
267 fract tmp = Ifx__float_to_fract(a);
268 return Ifx__fract_to_sfract(tmp);
269 }
270
271 /** Convert signed sint16 to sfract
272 */
273 IFX_INLINE sfract Ifx__s16_to_sfract(sint16 a)
274 {
275 sfract res;
276 __asm__ volatile ("sh %0,%1,16 \n\
277 sh %0,%0,-16":"=d"(res):"d"(a):"memory");
278 return res;
279 }
280
281 /** Convert sfract to sint16
282 */
283 IFX_INLINE sint16 Ifx__sfract_to_s16(sfract a)
284 {
285 sint16 res;
286 __asm__ volatile ("sh %1,%1,16 \n\
287 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
288 return res;
289 }
290
291 /** Convert sfract to uint16
292 */
293 IFX_INLINE uint16 Ifx__sfract_to_u16(sfract a)
294 {
295 uint16 res;
296 __asm__ volatile ("sh %1,%1,16 \n\
297 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
298 return res;
299 }
300
301 /** Left/right shift of an __laccum
302 */
303 __asm__ laccum Ifx__shaaccum(laccum a, sint32 b)
304 {
305 % lab L0, L1; reg a, b
306 ! "%d2", "%d3"
307 jge b, 0, L0
308 sha %d3, a!L, b
309 rsub b, b, 0
310 dextr %d2, a!H, a!L, b
311 j L1
312 L0:
313 dextr %d2, a!H, a!L, b
314 sha %d2, a!L, b
315 L1:
316 }
317
318 /** Left/right shift of an fract
319 */
320 IFX_INLINE fract Ifx__shafracts(fract a, sint32 b)
321 {
322 fract res;
323 __asm__ volatile ("shas %0,%1,%2":"=d"(res):"d"(a), "d"(b):"memory");
324 return res;
325 }
326
327 /** Left/right shift of an sfract
328 */
329 IFX_INLINE sfract Ifx__shasfracts(sfract a, sint32 b)
330 {
331 sfract res;
332 __asm__ volatile ("sh %1,%1,16 \n\
333 shas %0,%1,%2 \n\
334 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b):"memory");
335 return res;
336 }
337
338 /** Convert uint16 to sfract
339 */
340 IFX_INLINE sfract Ifx__u16_to_sfract(uint16 a)
341 {
342 sfract res;
343 __asm__ volatile ("sh %0,%1,16 \n\
344 sh %0,%0,-16":"=d"(res):"d"(a):"memory");
345 return res;
346 }
347
348 /** \} */
349
350 /** \defgroup IfxLld_Cpu_Intrinsics_Ghsinsert Insert / Extract Bit-fields and Bits
351 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
352 * \{
353 */
354
355 /** Extract a bit-field (bit pos to bit pos+width) from value
356 */
357 IFX_INLINE sint32 Ifx__extr(sint32 a, uint32 p, uint32 w)
358 {
359 sint32 res;
360 __asm__ volatile ("mov d14,%2 \n\
361 mov d15,%3 \n\
362 extr %0,%1,e14"
363 : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
364 return res;
365 }
366
367 /** Same as __extr() but return bit-field as unsigned integer
368 */
369 IFX_INLINE uint32 Ifx__extru(uint32 a, uint32 p, uint32 w)
370 {
371 uint32 res;
372 __asm__ volatile ("mov d14,%2 \n\
373 mov d15,%3 \n\
374 extr.u %0,%1,e14"\
375 : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
376 return res;
377 }
378
379 /** Load a single bit.
380 */
381 //#define __getbit(address,bitoffset ) __extru( *(address), bitoffset, 1 )
382 #define Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
383
384 /** Atomic load-modify-store.
385 */
386 #define Ifx__imaskldmst(address, value, bitoffset, bits) __imaskldmst((int *)address, value, bitoffset, bits)
387
388 /** Extract bit-field (width bits starting at bit 0) from src and insert it in trg at pos.
389 */
390 IFX_INLINE sint32 Ifx__insert(sint32 a, sint32 b, sint32 p, const sint32 w)
391 {
392 sint32 res;
393 __asm__ volatile ("mov d14,%3 \n\
394 mov d15,%4 \n\
395 insert %0,%1,%2,e14"
396 :"=d"(res):"d"(a), "d"(b), "d"(p), "d"(w):"d14", "d15");
397 return res;
398 }
399
400 /** Store a single bit.
401 */
402 #define Ifx__putbit(value,address,bitoffset ) Ifx__imaskldmst(address, value, bitoffset,1)
403
404 /** \} */
405
406 /** \defgroup IfxLld_Cpu_Intrinsics_Ghsinterrupt_handling Interrupt Handling
407 The next table provides an overview of the intrinsic functions to read or set interrupt handling.
408 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
409 * \{
410 */
411
412 /** \} */
413
414 /** \defgroup IfxLld_Cpu_Intrinsics_Ghsmiscellaneous Miscellaneous Intrinsic Functions
415 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
416 * \{
417 */
418
419 /** Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].
420 */
421 IFX_INLINE void Ifx__cacheawi(uint8* p)
422 {
423 __asm__ volatile("cachea.wi [%0]0"::"a"(p));
424 }
425 /** Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].
426 */
427 IFX_INLINE void Ifx__cacheiwi(uint8* p)
428 {
429 __asm__ volatile("cachei.wi [%0]0"::"a"(p));
430 }
431
432 /** Write back and invalidate cache address \"p\" and return post incremented
433 * value of \"p\". Generates CACHEA.WI [Ab+].
434 */
435 IFX_INLINE uint8* Ifx__cacheawi_bo_post_inc(uint8* p)
436 {
437 __asm__ volatile("cachea.wi [%0+]0"::"a"(p));
438 return p;
439 }
440
441 /** Multiply two 32-bit numbers to an intermediate 64-bit result, and scale
442 * back the result to 32 bits. To scale back the result, 32 bits are extracted
443 * from the intermediate 64-bit result: bit 63-offset to bit 31-offset.
444 */
445 IFX_INLINE sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
446 {
447 sint32 res;
448 __asm__ volatile("mul e12,%1,%2 \n\
449 dextr %0,d13,d12,%3"
450 :"=d"(res):"d"(a), "d"(b), "d"(offset):"d12", "d13");
451 return res;
452 }
453
454 /** Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).
455 */
456 IFX_INLINE uint32 Ifx__rol(uint32 operand, uint32 count)
457 {
458 uint32 res;
459 __asm__ volatile("dextr %0,%1,%1,%2":"=d"(res):"d"(operand), "d"(count):"memory");
460 return res;
461 }
462
463 /** Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).
464 */
465 IFX_INLINE uint32 Ifx__ror(uint32 operand, uint32 count)
466 {
467 uint32 res;
468 __asm__ volatile("rsub %2,%2,0 \n\
469 dextr %0,%1,%1,%2"
470 :"=d"(res):"d"(operand), "d"(count):"memory");
471 return res;
472 }
473 /** \} */
474
475 /** \defgroup IfxLld_Cpu_Intrinsics_Ghspacked Packed Data Type Support
476 The next table provides an overview of the intrinsic functions for initialization of packed data type.
477 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
478 * \{
479 */
480
481 /** Extract first byte from a __packb
482 */
483 IFX_INLINE sint8 Ifx__extractbyte1(__packb a)
484 {
485 sint8 res;
486 __asm__ volatile ("extr %0,%1,0,8"
487 :"=d"(res):"d"(a):"memory");
488 return res;
489 }
490
491 /** Extract second byte from a __packb
492 */
493 IFX_INLINE sint8 Ifx__extractbyte2(__packb a)
494 {
495 sint8 res;
496 __asm__ volatile ("extr %0,%1,8,8"
497 :"=d"(res):"d"(a):"memory");
498 return res;
499 }
500
501 /** Extract third byte from a __packb
502 */
503 IFX_INLINE sint8 Ifx__extractbyte3(__packb a)
504 {
505 sint8 res;
506 __asm__ volatile ("extr %0,%1,16,8"
507 :"=d"(res):"d"(a):"memory");
508 return res;
509 }
510
511 /** Extract fourth byte from a __packb
512 */
513 IFX_INLINE sint8 Ifx__extractbyte4(__packb a)
514 {
515 sint8 res;
516 __asm__ volatile ("extr %0,%1,24,8"
517 :"=d"(res):"d"(a):"memory");
518 return res;
519 }
520
521 /** Extract first sint16 from a __packhw
522 */
523 IFX_INLINE sint16 Ifx__extracthw1(__packhw a)
524 {
525 sint16 res;
526 __asm__ volatile ("extr %0,%1,0,16"
527 :"=d"(res):"d"(a):"memory");
528 return res;
529 }
530
531 /** Extract second sint16 from a __packhw
532 */
533 IFX_INLINE sint16 Ifx__extracthw2(__packhw a)
534 {
535 sint16 res;
536 __asm__ volatile ("extr %0,%1,16,16"
537 :"=d"(res):"d"(a):"memory");
538 return res;
539 }
540
541 /** Extract first uint8 from a __packb
542 */
543 IFX_INLINE uint8 Ifx__extractubyte1(__upackb a)
544 {
545 uint8 res;
546 __asm__ volatile ("extr %0,%1,0,8"
547 :"=d"(res):"d"(a):"memory");
548 return res;
549 }
550
551 /** Extract second uint8 from a __packb
552 */
553 IFX_INLINE uint8 Ifx__extractubyte2(__upackb a)
554 {
555 uint8 res;
556 __asm__ volatile ("extr %0,%1,8,8"
557 :"=d"(res):"d"(a):"memory");
558 return res;
559 }
560
561 /** Extract third uint8 from a __packb
562 */
563 IFX_INLINE uint8 Ifx__extractubyte3(__upackb a)
564 {
565 uint8 res;
566 __asm__ volatile ("extr %0,%1,16,8"
567 :"=d"(res):"d"(a):"memory");
568 return res;
569 }
570
571 /** Extract fourth uint8 from a __packb
572 */
573 IFX_INLINE uint8 Ifx__extractubyte4(__upackb a)
574 {
575 uint8 res;
576 __asm__ volatile ("extr %0,%1,24,8"
577 :"=d"(res):"d"(a):"memory");
578 return res;
579 }
580
581 /** Extract first uint16 from a __packhw
582 */
583 IFX_INLINE uint16 Ifx__extractuhw1(__upackhw a)
584 {
585 uint16 res;
586 __asm__ volatile ("extr %0,%1,0,16"
587 :"=d"(res):"d"(a):"memory");
588 return res;
589 }
590
591 /** Extract second uint16 from a __packhw
592 */
593 IFX_INLINE uint16 Ifx__extractuhw2(__upackhw a)
594 {
595 uint16 res;
596 __asm__ volatile ("extr %0,%1,16,16"
597 :"=d"(res):"d"(a):"memory");
598 return res;
599 }
600
601 /** Extract first byte from a __packb
602 */
603 IFX_INLINE sint8 Ifx__getbyte1(__packb* a)
604 {
605 sint8 res;
606 __asm__ volatile ("ld.w %0,[%1]0 \n\
607 extr %0,%0,0,8"
608 :"=d"(res):"a"(a):"memory");
609 return res;
610
611 }
612
613 /** Extract second byte from a __packb
614 */
615 IFX_INLINE sint8 Ifx__getbyte2(__packb* a)
616 {
617 sint8 res;
618 __asm__ volatile ("ld.w %0,[%1]0 \n\
619 extr %0,%0,8,8"
620 :"=d"(res):"a"(a):"memory");
621 return res;
622
623 }
624
625 /** Extract third byte from a __packb
626 */
627 IFX_INLINE sint8 Ifx__getbyte3(__packb* a)
628 {
629 sint8 res;
630 __asm__ volatile ("ld.w %0,[%1]0 \n\
631 extr %0,%0,16,8"
632 :"=d"(res):"a"(a):"memory");
633 return res;
634
635 }
636
637 /** Extract fourth byte from a __packb
638 */
639 IFX_INLINE sint8 Ifx__getbyte4(__packb* a)
640 {
641 sint8 res;
642 __asm__ volatile ("ld.w %0,[%1]0 \n\
643 extr %0,%0,24,8"
644 :"=d"(res):"a"(a):"memory");
645 return res;
646
647 }
648
649 /** Extract first sint16 from a __packhw
650 */
651 IFX_INLINE sint16 Ifx__gethw1(__packhw* a)
652 {
653 sint16 res;
654 __asm__ volatile ("ld.w %0,[%1]0 \n\
655 extr %0,%0,0,16"
656 :"=d"(res):"a"(a):"memory");
657 return res;
658 }
659 /** Extract second sint16 from a __packhw
660 */
661 IFX_INLINE sint16 Ifx__gethw2(__packhw* a)
662 {
663 sint16 res;
664 __asm__ volatile ("ld.w %0,[%1]0 \n\
665 extr %0,%0,16,16"
666 :"=d"(res):"a"(a):"memory");
667 return res;
668 }
669
670 /** Extract first uint8 from a __packb
671 */
672 IFX_INLINE uint8 Ifx__getubyte1(__upackb* a)
673 {
674 uint8 res;
675 __asm__ volatile ("ld.w %0,[%1]0 \n\
676 extr %0,%0,0,8"
677 :"=d"(res):"a"(a):"memory");
678 return res;
679 }
680
681 /** Extract second uint8 from a __packb
682 */
683 IFX_INLINE uint8 Ifx__getubyte2(__upackb* a)
684 {
685 uint8 res;
686 __asm__ volatile ("ld.w %0,[%1]0 \n\
687 extr %0,%0,8,8"
688 :"=d"(res):"a"(a):"memory");
689 return res;
690 }
691
692 /** Extract third uint8 from a __packb
693 */
694 IFX_INLINE uint8 Ifx__getubyte3(__upackb* a)
695 {
696 uint8 res;
697 __asm__ volatile ("ld.w %0,[%1]0 \n\
698 extr %0,%0,16,8"
699 :"=d"(res):"a"(a):"memory");
700 return res;
701 }
702
703 /** Extract fourth uint8 from a __packb
704 */
705 IFX_INLINE uint8 Ifx__getubyte4(__upackb* a)
706 {
707 uint8 res;
708 __asm__ volatile ("ld.w %0,[%1]0 \n\
709 extr %0,%0,24,8"
710 :"=d"(res):"a"(a):"memory");
711 return res;
712 }
713
714 /** Extract first uint16 from a __packhw
715 */
716 IFX_INLINE uint16 Ifx__getuhw1(__upackhw* a)
717 {
718 uint16 res;
719 __asm__ volatile ("ld.w %0,[%1]0 \n\
720 extr %0,%0,0,16"
721 :"=d"(res):"a"(a):"memory");
722 return res;
723 }
724
725 /** Extract second uint16 from a __packhw
726 */
727 IFX_INLINE uint16 Ifx__getuhw2(__upackhw* a)
728 {
729 uint16 res;
730 __asm__ volatile ("ld.w %0,[%1]0 \n\
731 extr %0,%0,16,16"
732 :"=d"(res):"a"(a):"memory");
733 return res;
734 }
735
736 /** Initialize __packb with four integers
737 */
738 IFX_INLINE __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
739 {
740 __packb res;
741 __asm__ volatile ("insert %3,%3,%4,8,8 \n\
742 insert %4,%1,%2,8,8 \n\
743 insert %0,%4,%3,16,16 "
744 :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
745 return res;
746 }
747
748 /** Initialize __packb with a long integer
749 */
750 IFX_INLINE __packb Ifx__initpackbl(long a)
751 {
752 return (__packb) a;
753 }
754
755 /** Initialize __packhw with two integers
756 */
757 IFX_INLINE __packhw Ifx__initpackhw(sint16 a, sint16 b)
758 {
759 __packhw res;
760 __asm__ volatile ("insert %0,%1,%2,16,16"
761 :"=d"(res):"d"(a), "d"(b):"memory");
762 return res;
763 }
764
765 /** Initialize __packhw with a long integer
766 */
767 IFX_INLINE __packhw Ifx__initpackhwl(long a)
768 {
769 return a;
770 }
771
772 /** Initialize __packb with four unsigned integers
773 */
774 IFX_INLINE __upackb Ifx__initupackb( uint32 a, uint32 b, uint32 c, uint32 d)
775 {
776 __upackb res;
777 __asm__ volatile ("insert %3,%3,%4,8,8 \n\
778 insert %1,%1,%2,8,8 \n\
779 insert %0,%1,%3,16,16"
780 :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
781 return res;
782 }
783
784 /** Initialize __packhw with two unsigned integers
785 */
786 IFX_INLINE __upackhw Ifx__initupackhw( uint16 a, uint16 b)
787 {
788 __upackhw res;
789 __asm__ volatile ("insert %0,%1,%2,16,16"
790 :"=d"(res):"d"(a), "d"(b):"memory");
791 return res;
792 }
793
794 /** Insert sint8 into first byte of a __packb
795 */
796 IFX_INLINE __packb Ifx__insertbyte1(__packb a, sint8 b)
797 {
798 __packb res;
799 __asm__ volatile ("insert %0,%1,%2,0,8"
800 :"=d"(res):"d"(a), "d"(b):"memory");
801 return res;
802 }
803
804 /** Insert sint8 into second byte of a __packb
805 */
806 IFX_INLINE __packb Ifx__insertbyte2(__packb a, sint8 b)
807 {
808 __packb res;
809 __asm__ volatile ("insert %0,%1,%2,8,8"
810 :"=d"(res):"d"(a), "d"(b):"memory");
811 return res;
812 }
813
814 /** Insert sint8 into third byte of a __packb
815 */
816 IFX_INLINE __packb Ifx__insertbyte3(__packb a, sint8 b)
817 {
818 __packb res;
819 __asm__ volatile ("insert %0,%1,%2,16,8"
820 :"=d"(res):"d"(a), "d"(b):"memory");
821 return res;
822 }
823
824 /** Insert sint8 into fourth byte of a __packb
825 */
826 IFX_INLINE __packb Ifx__insertbyte4(__packb a, sint8 b)
827 {
828 __packb res;
829 __asm__ volatile ("insert %0,%1,%2,24,8"
830 :"=d"(res):"d"(a), "d"(b):"memory");
831 return res;
832 }
833
834 /** Insert sint8 into first uint8 of a __packb
835 */
836 IFX_INLINE __upackb Ifx__insertubyte1( __upackb a, uint8 b)
837 {
838 __upackb res;
839 __asm__ volatile ("insert %0,%1,%2,0,8"
840 :"=d"(res):"d"(a), "d"(b):"memory");
841 return res;
842 }
843
844 /** Insert sint8 into second uint8 of a __packb
845 */
846 IFX_INLINE __upackb Ifx__insertubyte2( __upackb a, uint8 b)
847 {
848 __upackb res;
849 __asm__ volatile ("insert %0,%1,%2,8,8"
850 :"=d"(res):"d"(a), "d"(b):"memory");
851 return res;
852 }
853
854 /** Insert sint8 into third uint8 of a __packb
855 */
856 IFX_INLINE __upackb Ifx__insertubyte3( __upackb a, uint8 b)
857 {
858 __upackb res;
859 __asm__ volatile ("insert %0,%1,%2,16,8"
860 :"=d"(res):"d"(a), "d"(b):"memory");
861 return res;
862 }
863
864 /** Insert sint8 into fourth uint8 of a __packb
865 */
866 IFX_INLINE __upackb Ifx__insertubyte4( __upackb a, uint8 b)
867 {
868 __upackb res;
869 __asm__ volatile ("insert %0,%1,%2,24,8"
870 :"=d"(res):"d"(a), "d"(b):"memory");
871 return res;
872 }
873
874 /** Insert sint16 into first halfword of a __packhw
875 */
876 IFX_INLINE __packhw Ifx__inserthw1(__packhw a, sint16 b)
877 {
878 __packhw res;
879 __asm__ volatile ("insert %0,%1,%2,0,16"
880 :"=d"(res):"d"(a), "d"(b):"memory");
881 return res;
882 }
883
884 /** Insert sint16 into second halfword of a __packhw
885 */
886 IFX_INLINE __packhw Ifx__inserthw2(__packhw a, sint16 b)
887 {
888 __packhw res;
889 __asm__ volatile ("insert %0,%1,%2,16,16"
890 :"=d"(res):"d"(a), "d"(b):"memory");
891 return res;
892 }
893
894 /** Insert uint16 into first halfword of a __upackhw
895 */
896 IFX_INLINE __upackhw Ifx__insertuhw1( __upackhw a, uint16 b)
897 {
898 __upackhw res;
899 __asm__ volatile ("insert %0,%1,%2,0,16"
900 :"=d"(res):"d"(a), "d"(b):"memory");
901 return res;
902 }
903
904 /** Insert uint16 into second halfword of a __upackhw
905 */
906 IFX_INLINE __upackhw Ifx__insertuhw2( __upackhw a, uint16 b)
907 {
908 __upackhw res;
909 __asm__ volatile ("insert %0,%1,%2,16,16"
910 :"=d"(res):"d"(a), "d"(b):"memory");
911 return res;
912 }
913
914 /** Insert sint8 into first byte of a __packb
915 */
916 IFX_INLINE void Ifx__setbyte1(__packb* a, sint8 b)
917 {
918 __asm__ volatile ("ld.w d15,[%0] \n\
919 insert d15,d15,%1,0,8 \n\
920 st.w [%0],d15"
921 ::"a"(a), "d"(b):"d15", "memory");
922 }
923
924 /** Insert sint8 into second byte of a __packb
925 */
926 IFX_INLINE void Ifx__setbyte2(__packb* a, sint8 b)
927 {
928 __asm__ volatile ("ld.w d15,[%0] \n\
929 insert d15,d15,%1,8,8 \n\
930 st.w [%0],d15"
931 ::"a"(a), "d"(b):"d15", "memory");
932 }
933
934 /** Insert sint8 into third byte of a __packb
935 */
936 IFX_INLINE void Ifx__setbyte3(__packb* a, sint8 b)
937 {
938 __asm__ volatile ("ld.w d15,[%0] \n\
939 insert d15,d15,%1,16,8 \n\
940 st.w [%0],d15"
941 ::"a"(a), "d"(b):"d15", "memory");
942 }
943
944 /** Insert sint8 into fourth byte of a __packb
945 */
946 IFX_INLINE void Ifx__setbyte4(__packb* a, sint8 b)
947 {
948 __asm__ volatile ("ld.w d15,[%0] \n\
949 insert d15,d15,%1,24,8 \n\
950 st.w [%0],d15"
951 ::"a"(a), "d"(b):"d15", "memory");
952 }
953
954 /** Insert sint16 into first halfword of a __packhw
955 */
956 IFX_INLINE void Ifx__sethw1(__packhw* a, sint16 b)
957 {
958 __asm__ volatile ("ld.w d15,[%0] \n\
959 insert d15,d15,%1,0,16 \n\
960 st.w [%0],d15"
961 ::"a"(a), "d"(b):"d15", "memory");
962 }
963
964 /** Insert sint16 into second halfword of a __packhw
965 */
966 IFX_INLINE void Ifx__sethw2(__packhw* a, sint16 b)
967 {
968 __asm__ volatile ("ld.w d15,[%0] \n\
969 insert d15,d15,%1,16,16 \n\
970 st.w [%0],d15"
971 ::"a"(a), "d"(b):"d15", "memory");
972 }
973
974 /** Insert uint8 into first byte of a __upackb
975 */
976 IFX_INLINE void Ifx__setubyte1(__upackb* a, uint8 b)
977 {
978 __asm__ volatile ("ld.w d15,[%0] \n\
979 insert d15,d15,%1,0,8 \n\
980 st.w [%0],d15"
981 ::"a"(a), "d"(b):"d15", "memory");
982 }
983
984 /** Insert uint8 into second byte of a __upackb
985 */
986 IFX_INLINE void Ifx__setubyte2(__upackb* a, uint8 b)
987 {
988 __asm__ volatile ("ld.w d15,[%0] \n\
989 insert d15,d15,%1,8,8 \n\
990 st.w [%0],d15"
991 ::"a"(a), "d"(b):"d15", "memory");
992 }
993
994 /** Insert uint8 into third byte of a __upackb
995 */
996 IFX_INLINE void Ifx__setubyte3(__upackb* a, uint8 b)
997 {
998 __asm__ volatile ("ld.w d15,[%0] \n\
999 insert d15,d15,%1,16,8 \n\
1000 st.w [%0],d15"
1001 ::"a"(a), "d"(b):"d15", "memory");
1002 }
1003
1004 /** Insert uint8 into fourth byte of a __upackb
1005 */
1006 IFX_INLINE void Ifx__setubyte4(__upackb* a, uint8 b)
1007 {
1008 __asm__ volatile ("ld.w d15,[%0] \n\
1009 insert d15,d15,%1,24,8 \n\
1010 st.w [%0],d15"
1011 ::"a"(a), "d"(b):"d15", "memory");
1012 }
1013
1014 /** Insert uint16 into first halfword of a __upackhw
1015 */
1016 IFX_INLINE void Ifx__setuhw1(__upackhw* a, uint16 b)
1017 {
1018 __asm__ volatile ("ld.w d15,[%0] \n\
1019 insert d15,d15,%1,0,16 \n\
1020 st.w [%0],d15"
1021 ::"a"(a), "d"(b):"d15", "memory");
1022 }
1023
1024 /** Insert uint16 into second halfword of a __upackhw
1025 */
1026 IFX_INLINE void Ifx__setuhw2(__upackhw* a, uint16 b)
1027 {
1028 __asm__ volatile ("ld.w d15,[%0] \n\
1029 insert d15,d15,%1,16,16 \n\
1030 st.w [%0],d15"
1031 ::"a"(a), "d"(b):"d15", "memory");
1032 }
1033
1034 /** \} */
1035
1036 /** \defgroup IfxLld_Cpu_Intrinsics_Ghssingle_assembly Insert Single Assembly Instruction
1037 The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
1038 instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
1039 assembly instructions.
1040 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
1041 * \{
1042 */
1043
1044 /** Insert LDMST instruction. Note that all operands must be word-aligned.
1045 */
1046 IFX_INLINE void Ifx__ldmst(volatile void* address, uint32 mask, uint32 value)
1047 {
1048 __asm__ volatile("ldmst [%0]0,%1"
1049 ::"a"(address), "e"((long long)mask<<32 | value));
1050 }
1051
1052 /** Insert a loop over cnt NOP instruction
1053 */
1054 IFX_INLINE void Ifx__nops(void* cnt)
1055 {
1056 __asm__ volatile ("0: nop \n\
1057 loop %0,0b"
1058 ::"a"(((sint8*)cnt)-1));
1059 }
1060
1061 /** Insert SWAP instruction. Note that all operands must be word-aligned.
1062 */
1063 IFX_INLINE uint32 Ifx__swap(void* place, uint32 value)
1064 {
1065 uint32 res;
1066 __asm__ volatile("swap.w [%1]0,%2":"=d"(res):"a"(place), "0"(value));
1067 return res;
1068 }
1069
1070 /** Insert n NOP instruction
1071 */
1072 #define Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
1073
1074 /** \} */
1075
1076 /* FIXME use inline instead of #define */
1077 /*#define __extru(src,start,size) \
1078 ({ sint32 res; asm volatile (" extr.u\t %0,%1,%2,%3" : "=d" (res) : \
1079 "d" (src),"i" (start),"i" (size) : "memory"); res; })*/
1080
1081 /* FIXME use inline instead of #define */
1082 #define Ifx__setareg(areg,val) \
1083 { uint32 reg_val= (uint32)val; \
1084 asm volatile (" mov.a\t %"#areg",%0"::"d"(reg_val)); }
1085
1086 /**__mtcr (CPU_CCTRL, 0);
1087 */
1088 IFX_INLINE void Ifx__stopPerfCounters(void)
1089 {
1090 __asm__ volatile("mov d0,0\n\
1091 mtcr 0xFC00,d0\n\
1092 isync\n"
1093 : : :"d0"); /* FIXME check that the parameter d0 is understood by the compiler as a register used by the inline */
1094 }
1095
1096 /** \brief This function is a implementation of a binary semaphore using compare and swap instruction
1097 * \param address address of resource.
1098 * \param value This variable is updated with status of address
1099 * \param condition if the value of address matches with the value of condition, then swap of value & address occurs.
1100 *
1101 */
1102 IFX_INLINE unsigned int Ifx__cmpAndSwap (unsigned int volatile *address,
1103 unsigned int value, unsigned int condition)
1104 {
1105 unsigned long long reg64
1106 = value | (unsigned long long) condition << 32;
1107
1108 __asm__ __volatile__ ("cmpswap.w [%[addr]]0, %A[reg]"
1109 : [reg] "+d" (reg64)
1110 : [addr] "a" (address)
1111 : "memory");
1112 return reg64;
1113 }
1114
1115 /** \brief Convert a fixpoint value to float32
1116 *
1117 * This function converts a value from a fixpoint format to a float32 format.
1118 *
1119 *
1120 * \param value value to be converted.
1121 * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
1122 *
1123 * \return Returns the converted value in the float32 format.
1124 *
1125 */
1126 IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
1127 {
1128 float32 result;
1129
1130 __asm__ volatile("q31tof %0, %1, %2": "=d" (result) : "d" (value), "d" (shift));
1131 return result;
1132 }
1133
1134 IFX_INLINE void* Ifx__getA11(void)
1135 {
1136 uint32 *res;
1137 __asm__ volatile ("mov.aa %0, a11": "=a" (res) : :"a11");
1138 return res;
1139 }
1140
1141 IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
1142 {
1143 __asm__ volatile ("mov.aa a10, %0": : "a" (stackAddr));
1144 }
1145
1146 IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
1147 {
1148 uint32 returnvalue = 0; /* set seed value to 0 */
1149 for (;length > 0; length--)
1150 {
1151 /* calculate the CRC over all data */
1152 __asm__ ("CRC32B.W %0,%0,%1" : "+d" (returnvalue) : "d" (*startaddress));
1153 startaddress++;
1154 }
1155 return returnvalue;
1156 }
1157
1158 IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
1159 {
1160 uint32 result;
1161 __asm(" mul.u %%e14,%1,%2 # d15 = Eh; d14 = El \n"
1162 " mov %%d12,%%d14 # e12 = El \n"
1163 " mov %%d13, 0 # \n"
1164 " madd.u %%e14,%%e12,%%d15, 5 # e14 = El + 5 * d15 \n"
1165 " cmp_m_%=: jge.u %%d14,%3,sub_m_%= # \n"
1166 " jz %%d15,done_%= # \n"
1167 " sub_m_%=: subx %%d14,%%d14,%3 # e12=e12-m \n"
1168 " subc %%d15,%%d15,%%d13 # d13=d13-0 \n"
1169 " loopu cmp_m_%= # \n"
1170 " done_%=: mov %0,%%d14 # \n"
1171 : "=d"(result) : "d"(a), "d"(x), "d"(m) : "d12","d13","d14","d15");
1172 return result;
1173 }
1174
1175 /* compiler don't know this instruction
1176 IFX_INLINE sint32 Ifx__popcnt(sint32 a)
1177 {
1178 sint32 res;
1179 __asm__ volatile ("popcnt %0,%1":"=d"(res):"d"(a));
1180 return res;
1181 }*/
1182
1183 /** Invalidate cache address "p". Generates CACHEA.I [Ab].
1184 */
1185 IFX_INLINE void Ifx__cacheai(uint8* p)
1186 {
1187 __asm__ volatile("cachea.i [%0]0"::"a"(p));
1188 }
1189
1190 /* Macros for backward compatibility of the intrinsics*/
1191 /******************************************************************************/
1192 #ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
1193 #ifndef __non_return_call
1194 #define __non_return_call Ifx__non_return_call
1195 #endif
1196
1197 #ifndef __jump_and_link
1198 #define __jump_and_link Ifx__jump_and_link
1199 #endif
1200
1201 #ifndef __moveToDataParam0
1202 #define __moveToDataParam0 Ifx__moveToDataParam0
1203 #endif
1204
1205 #ifndef __moveToDataParamRet
1206 #define __moveToDataParamRet Ifx__moveToDataParamRet
1207 #endif
1208
1209 #ifndef __getDataParamRet
1210 #define __getDataParamRet Ifx__getDataParamRet
1211 #endif
1212
1213 #ifndef __moveToAddrParam0
1214 #define __moveToAddrParam0 Ifx__moveToAddrParam0
1215 #endif
1216
1217 #ifndef __jumpToFunction
1218 #define __jumpToFunction Ifx__jumpToFunction
1219 #endif
1220
1221 #ifndef __jumpToFunctionWithLink
1222 #define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
1223 #endif
1224
1225 #ifndef __jumpBackToLink
1226 #define __jumpBackToLink Ifx__jumpBackToLink
1227 #endif
1228
1229 #ifndef __mem_barrier
1230 #define __mem_barrier Ifx__mem_barrier
1231 #endif
1232
1233 #ifndef __minX
1234 #define __minX Ifx__minX
1235 #endif
1236
1237 #ifndef __maxX
1238 #define __maxX Ifx__maxX
1239 #endif
1240
1241 #ifndef __saturateX
1242 #define __saturateX Ifx__saturateX
1243 #endif
1244
1245 #ifndef __checkrangeX
1246 #define __checkrangeX Ifx__checkrangeX
1247 #endif
1248
1249 #ifndef __saturate
1250 #define __saturate Ifx__saturate
1251 #endif
1252
1253 #ifndef __saturateu
1254 #define __saturateu Ifx__saturateu
1255 #endif
1256
1257 #ifndef __sqrf
1258 #define __sqrf Ifx__sqrf
1259 #endif
1260
1261 #ifndef __sqrtf
1262 #define __sqrtf Ifx__sqrtf
1263 #endif
1264
1265 #ifndef __checkrange
1266 #define __checkrange Ifx__checkrange
1267 #endif
1268
1269 #ifndef __roundf
1270 #define __roundf Ifx__roundf
1271 #endif
1272
1273 #ifndef __absf
1274 #define __absf Ifx__absf
1275 #endif
1276
1277 #ifndef __minf
1278 #define __minf Ifx__minf
1279 #endif
1280
1281 #ifndef __maxf
1282 #define __maxf Ifx__maxf
1283 #endif
1284
1285 #ifndef __saturatef
1286 #define __saturatef Ifx__saturatef
1287 #endif
1288
1289 #ifndef __checkrangef
1290 #define __checkrangef Ifx__checkrangef
1291 #endif
1292
1293 #ifndef __abs_stdreal
1294 #define __abs_stdreal Ifx__abs_stdreal
1295 #endif
1296
1297 #ifndef __min_stdreal
1298 #define __min_stdreal Ifx__min_stdreal
1299 #endif
1300
1301 #ifndef __max_stdreal
1302 #define __max_stdreal Ifx__max_stdreal
1303 #endif
1304
1305 #ifndef __saturate_stdreal
1306 #define __saturate_stdreal Ifx__saturate_stdreal
1307 #endif
1308
1309 #ifndef __neqf
1310 #define __neqf Ifx__neqf
1311 #endif
1312
1313 #ifndef __leqf
1314 #define __leqf Ifx__leqf
1315 #endif
1316
1317 #ifndef __geqf
1318 #define __geqf Ifx__geqf
1319 #endif
1320
1321 #ifndef __clssf
1322 #define __clssf Ifx__clssf
1323 #endif
1324
1325 #ifndef __fract_to_float
1326 #define __fract_to_float Ifx__fract_to_float
1327 #endif
1328
1329 #ifndef __float_to_fract
1330 #define __float_to_fract Ifx__float_to_fract
1331 #endif
1332
1333 #ifndef __getfract
1334 #define __getfract Ifx__getfract
1335 #endif
1336
1337 #ifndef __mac_r_sf
1338 #define __mac_r_sf Ifx__mac_r_sf
1339 #endif
1340
1341 #ifndef __mac_sf
1342 #define __mac_sf Ifx__mac_sf
1343 #endif
1344
1345 #ifndef __mulfractfract
1346 #define __mulfractfract Ifx__mulfractfract
1347 #endif
1348
1349 #ifndef __mulfractlong
1350 #define __mulfractlong Ifx__mulfractlong
1351 #endif
1352
1353 #ifndef __round16
1354 #define __round16 Ifx__round16
1355 #endif
1356
1357 #ifndef __fract_to_sfract
1358 #define __fract_to_sfract Ifx__fract_to_sfract
1359 #endif
1360
1361 #ifndef __float_to_sfract
1362 #define __float_to_sfract Ifx__float_to_sfract
1363 #endif
1364
1365 #ifndef __s16_to_sfract
1366 #define __s16_to_sfract Ifx__s16_to_sfract
1367 #endif
1368
1369 #ifndef __sfract_to_s16
1370 #define __sfract_to_s16 Ifx__sfract_to_s16
1371 #endif
1372
1373 #ifndef __sfract_to_u16
1374 #define __sfract_to_u16 Ifx__sfract_to_u16
1375 #endif
1376
1377 #ifndef __shaaccum
1378 #define __shaaccum Ifx__shaaccum
1379 #endif
1380
1381 #ifndef __shafracts
1382 #define __shafracts Ifx__shafracts
1383 #endif
1384
1385 #ifndef __shasfracts
1386 #define __shasfracts Ifx__shasfracts
1387 #endif
1388
1389 #ifndef __u16_to_sfract
1390 #define __u16_to_sfract Ifx__u16_to_sfract
1391 #endif
1392
1393 #ifndef __extr
1394 #define __extr Ifx__extr
1395 #endif
1396
1397 #ifndef __extru
1398 #define __extru Ifx__extru
1399 #endif
1400
1401 #ifndef __getbit
1402 #define __getbit Ifx__getbit
1403 #endif
1404
1405 #ifndef __insert
1406 #define __insert Ifx__insert
1407 #endif
1408
1409 #ifndef __putbit
1410 #define __putbit Ifx__putbit
1411 #endif
1412
1413 #ifndef __cacheawi
1414 #define __cacheawi Ifx__cacheawi
1415 #endif
1416
1417 #ifndef __cacheiwi
1418 #define __cacheiwi Ifx__cacheiwi
1419 #endif
1420
1421 #ifndef __cacheawi_bo_post_inc
1422 #define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
1423 #endif
1424
1425 #ifndef __mulsc
1426 #define __mulsc Ifx__mulsc
1427 #endif
1428
1429 #ifndef __rol
1430 #define __rol Ifx__rol
1431 #endif
1432
1433 #ifndef __ror
1434 #define __ror Ifx__ror
1435 #endif
1436
1437 #ifndef __extractbyte1
1438 #define __extractbyte1 Ifx__extractbyte1
1439 #endif
1440
1441 #ifndef __extractbyte2
1442 #define __extractbyte2 Ifx__extractbyte2
1443 #endif
1444
1445 #ifndef __extractbyte3
1446 #define __extractbyte3 Ifx__extractbyte3
1447 #endif
1448
1449 #ifndef __extractbyte4
1450 #define __extractbyte4 Ifx__extractbyte4
1451 #endif
1452
1453 #ifndef __extracthw1
1454 #define __extracthw1 Ifx__extracthw1
1455 #endif
1456
1457 #ifndef __extracthw2
1458 #define __extracthw2 Ifx__extracthw2
1459 #endif
1460
1461 #ifndef __extractubyte1
1462 #define __extractubyte1 Ifx__extractubyte1
1463 #endif
1464
1465 #ifndef __extractubyte2
1466 #define __extractubyte2 Ifx__extractubyte2
1467 #endif
1468
1469 #ifndef __extractubyte3
1470 #define __extractubyte3 Ifx__extractubyte3
1471 #endif
1472
1473 #ifndef __extractubyte4
1474 #define __extractubyte4 Ifx__extractubyte4
1475 #endif
1476
1477 #ifndef __extractuhw1
1478 #define __extractuhw1 Ifx__extractuhw1
1479 #endif
1480
1481 #ifndef __extractuhw2
1482 #define __extractuhw2 Ifx__extractuhw2
1483 #endif
1484
1485 #ifndef __getbyte1
1486 #define __getbyte1 Ifx__getbyte1
1487 #endif
1488
1489 #ifndef __getbyte2
1490 #define __getbyte2 Ifx__getbyte2
1491 #endif
1492
1493 #ifndef __getbyte3
1494 #define __getbyte3 Ifx__getbyte3
1495 #endif
1496
1497 #ifndef __getbyte4
1498 #define __getbyte4 Ifx__getbyte4
1499 #endif
1500
1501 #ifndef __gethw1
1502 #define __gethw1 Ifx__gethw1
1503 #endif
1504
1505 #ifndef __gethw2
1506 #define __gethw2 Ifx__gethw2
1507 #endif
1508
1509 #ifndef __getubyte1
1510 #define __getubyte1 Ifx__getubyte1
1511 #endif
1512
1513 #ifndef __getubyte2
1514 #define __getubyte2 Ifx__getubyte2
1515 #endif
1516
1517 #ifndef __getubyte3
1518 #define __getubyte3 Ifx__getubyte3
1519 #endif
1520
1521 #ifndef __getubyte4
1522 #define __getubyte4 Ifx__getubyte4
1523 #endif
1524
1525 #ifndef __getuhw1
1526 #define __getuhw1 Ifx__getuhw1
1527 #endif
1528
1529 #ifndef __getuhw2
1530 #define __getuhw2 Ifx__getuhw2
1531 #endif
1532
1533 #ifndef __initpackb
1534 #define __initpackb Ifx__initpackb
1535 #endif
1536
1537 #ifndef __initpackbl
1538 #define __initpackbl Ifx__initpackbl
1539 #endif
1540
1541 #ifndef __initpackhw
1542 #define __initpackhw Ifx__initpackhw
1543 #endif
1544
1545 #ifndef __initpackhwl
1546 #define __initpackhwl Ifx__initpackhwl
1547 #endif
1548
1549 #ifndef __initupackb
1550 #define __initupackb Ifx__initupackb
1551 #endif
1552
1553 #ifndef __initupackhw
1554 #define __initupackhw Ifx__initupackhw
1555 #endif
1556
1557 #ifndef __insertbyte1
1558 #define __insertbyte1 Ifx__insertbyte1
1559 #endif
1560
1561 #ifndef __insertbyte2
1562 #define __insertbyte2 Ifx__insertbyte2
1563 #endif
1564
1565 #ifndef __insertbyte3
1566 #define __insertbyte3 Ifx__insertbyte3
1567 #endif
1568
1569 #ifndef __insertbyte4
1570 #define __insertbyte4 Ifx__insertbyte4
1571 #endif
1572
1573 #ifndef __insertubyte1
1574 #define __insertubyte1 Ifx__insertubyte1
1575 #endif
1576
1577 #ifndef __insertubyte2
1578 #define __insertubyte2 Ifx__insertubyte2
1579 #endif
1580
1581 #ifndef __insertubyte3
1582 #define __insertubyte3 Ifx__insertubyte3
1583 #endif
1584
1585 #ifndef __insertubyte4
1586 #define __insertubyte4 Ifx__insertubyte4
1587 #endif
1588
1589 #ifndef __inserthw1
1590 #define __inserthw1 Ifx__inserthw1
1591 #endif
1592
1593 #ifndef __inserthw2
1594 #define __inserthw2 Ifx__inserthw2
1595 #endif
1596
1597 #ifndef __insertuhw1
1598 #define __insertuhw1 Ifx__insertuhw1
1599 #endif
1600
1601 #ifndef __insertuhw2
1602 #define __insertuhw2 Ifx__insertuhw2
1603 #endif
1604
1605 #ifndef __setbyte1
1606 #define __setbyte1 Ifx__setbyte1
1607 #endif
1608
1609 #ifndef __setbyte2
1610 #define __setbyte2 Ifx__setbyte2
1611 #endif
1612
1613 #ifndef __setbyte3
1614 #define __setbyte3 Ifx__setbyte3
1615 #endif
1616
1617 #ifndef __setbyte4
1618 #define __setbyte4 Ifx__setbyte4
1619 #endif
1620
1621 #ifndef __sethw1
1622 #define __sethw1 Ifx__sethw1
1623 #endif
1624
1625 #ifndef __sethw2
1626 #define __sethw2 Ifx__sethw2
1627 #endif
1628
1629 #ifndef __setubyte1
1630 #define __setubyte1 Ifx__setubyte1
1631 #endif
1632
1633 #ifndef __setubyte2
1634 #define __setubyte2 Ifx__setubyte2
1635 #endif
1636
1637 #ifndef __setubyte3
1638 #define __setubyte3 Ifx__setubyte3
1639 #endif
1640
1641 #ifndef __setubyte4
1642 #define __setubyte4 Ifx__setubyte4
1643 #endif
1644
1645 #ifndef __setuhw1
1646 #define __setuhw1 Ifx__setuhw1
1647 #endif
1648
1649 #ifndef __setuhw2
1650 #define __setuhw2 Ifx__setuhw2
1651 #endif
1652
1653 #ifndef __ldmst
1654 #define __ldmst Ifx__ldmst
1655 #endif
1656
1657 #ifndef __nops
1658 #define __nops Ifx__nops
1659 #endif
1660
1661 #ifndef __swap
1662 #define __swap Ifx__swap
1663 #endif
1664
1665 #if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
1666 #define NOP Ifx__NOP
1667 #endif
1668
1669 #ifndef __setareg
1670 #define __setareg Ifx__setareg
1671 #endif
1672
1673 #ifndef __stopPerfCounters
1674 #define __stopPerfCounters Ifx__stopPerfCounters
1675 #endif
1676
1677 #ifndef __cmpAndSwap
1678 #define __cmpAndSwap Ifx__cmpAndSwap
1679 #endif
1680
1681 #ifndef __fixpoint_to_float32
1682 #define __fixpoint_to_float32 Ifx__fixpoint_to_float32
1683 #endif
1684
1685 #ifndef __getA11
1686 #define __getA11 Ifx__getA11
1687 #endif
1688
1689 #ifndef __setStackPointer
1690 #define __setStackPointer Ifx__setStackPointer
1691 #endif
1692
1693 #ifndef __popcnt
1694 #define __popcnt Ifx__popcnt
1695 #endif
1696
1697 #ifndef __cacheai
1698 #define __cacheai Ifx__cacheai
1699 #endif
1700
1701 #endif
1702 /******************************************************************************/
1703 /* *INDENT-ON* */
1704 /******************************************************************************/
1705 #endif /* IFXCPU_INTRINSICSGHS_H */
Ifx__fract_to_float
#define Ifx__fract_to_float(value)
Definition: IfxCpu_IntrinsicsTasking.h:160
Ifx__insertubyte3
asm __upackb Ifx__insertubyte3(__upackb a, uint8 b)
Insert uint8 into third unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:964
Ifx__setubyte1
asm volatile void Ifx__setubyte1(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1106
Ifx__extractbyte4
asm sint8 Ifx__extractbyte4(__packb a)
Extract fourth byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:633
Ifx__nops
asm volatile void Ifx__nops(uint32 cnt)
Definition: IfxCpu_IntrinsicsDcc.h:1386
Ifx__cacheiwi
asm volatile void Ifx__cacheiwi(uint8 *p)
Definition: IfxCpu_IntrinsicsDcc.h:519
Ifx__mulsc
asm volatile sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
Definition: IfxCpu_IntrinsicsDcc.h:542
Ifx__fract_to_sfract
#define Ifx__fract_to_sfract
Definition: IfxCpu_IntrinsicsGhs2G.h:261
Ifx__mac_sf
asm sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsDcc.h:260
Ifx__s16_to_sfract
asm sfract Ifx__s16_to_sfract(short a)
Definition: IfxCpu_IntrinsicsDcc.h:309
Ifx__jumpToFunctionWithLink
IFX_INLINE void Ifx__jumpToFunctionWithLink(void(*fun)(void))
Definition: IfxCpu_IntrinsicsGhs2G.h:96
Ifx__getDataParamRet
IFX_INLINE unsigned int Ifx__getDataParamRet(void)
Definition: IfxCpu_IntrinsicsGhs2G.h:79
Ifx__insertubyte2
asm __upackb Ifx__insertubyte2(__upackb a, uint8 b)
Insert uint8 into second unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:955
Ifx__getbyte4
asm sint8 Ifx__getbyte4(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:744
__packb
long __packb
Definition: Ifx_TypesDcc.h:47
Ifx__moveToAddrParam0
IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
Definition: IfxCpu_IntrinsicsGhs2G.h:86
Ifx__jumpToFunction
IFX_INLINE void Ifx__jumpToFunction(void(*fun)(void))
Definition: IfxCpu_IntrinsicsGhs2G.h:91
sfract
short sfract
Definition: Ifx_TypesDcc.h:45
Ifx__extr
#define Ifx__extr
Definition: IfxCpu_IntrinsicsDcc.h:400
Ifx__cacheawi_bo_post_inc
asm volatile uint8 * Ifx__cacheawi_bo_post_inc(uint8 *p)
Definition: IfxCpu_IntrinsicsDcc.h:509
Ifx__initupackhw
asm __upackhw Ifx__initupackhw(uint16 a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:883
Ifx__setubyte4
asm volatile void Ifx__setubyte4(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1139
Ifx__extractuhw1
asm volatile uint16 Ifx__extractuhw1(__upackhw a)
Definition: IfxCpu_IntrinsicsDcc.h:696
Ifx__ror
asm volatile uint32 Ifx__ror(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsDcc.h:561
Ifx__getuhw1
asm volatile uint16 Ifx__getuhw1(__upackhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:814
Ifx__insertbyte2
asm __packb Ifx__insertbyte2(__packb a, sint8 b)
Insert sint8 into second byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:901
__asm__
#define __asm__
Definition: Ifx_TypesTasking.h:45
Ifx__gethw2
asm short Ifx__gethw2(__packhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:764
Ifx__fixpoint_to_float32
IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
Convert a fixpoint value to float32.
Definition: IfxCpu_IntrinsicsGhs2G.h:1126
Ifx__setuhw1
asm volatile void Ifx__setuhw1(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:1150
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
Ifx__sfract_to_s16
asm short Ifx__sfract_to_s16(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:319
Ifx__shasfracts
asm sfract Ifx__shasfracts(sfract a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:371
Ifx__initpackhw
asm __packhw Ifx__initpackhw(short a, short b)
Initialize __packhw with two integers.
Definition: IfxCpu_IntrinsicsDcc.h:854
IfxCpu_calculateCrc32
IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
Definition: IfxCpu_IntrinsicsGhs2G.h:1146
Ifx__ldmst
#define Ifx__ldmst(addr, mask, data)
Definition: IfxCpu_IntrinsicsTasking.h:294
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesDcc.h:50
Ifx__extractubyte3
asm volatile uint8 Ifx__extractubyte3(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:678
Ifx__u16_to_sfract
asm sfract Ifx__u16_to_sfract(uint16 a)
Definition: IfxCpu_IntrinsicsDcc.h:381
Ifx__mac_r_sf
asm sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsDcc.h:247
Ifx__initupackb
asm __upackb Ifx__initupackb(uint32 a, uint32 b, uint32 c, uint32 d)
Definition: IfxCpu_IntrinsicsDcc.h:872
Ifx__setubyte3
asm volatile void Ifx__setubyte3(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1128
voidfunc
void(* voidfunc)()
Definition: IfxCpu_IntrinsicsGhs2G.h:56
Ifx__insertbyte1
asm __packb Ifx__insertbyte1(__packb a, sint8 b)
Insert sint8 into first byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:892
Ifx__sethw2
asm volatile void Ifx__sethw2(__packhw *a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:1095
Ifx__setbyte2
asm volatile void Ifx__setbyte2(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1051
Ifx__getubyte1
asm volatile uint8 Ifx__getubyte1(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:774
Ifx__extractubyte2
asm volatile uint8 Ifx__extractubyte2(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:669
Ifx__non_return_call
#define Ifx__non_return_call(fun)
Definition: IfxCpu_IntrinsicsGhs2G.h:60
Ifx__extractuhw2
asm volatile uint16 Ifx__extractuhw2(__upackhw a)
Definition: IfxCpu_IntrinsicsDcc.h:705
Ifx__stopPerfCounters
IFX_INLINE void Ifx__stopPerfCounters(void)
Definition: IfxCpu_IntrinsicsGhs2G.h:1088
Ifx__gethw1
asm short Ifx__gethw1(__packhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:754
Ifx__getubyte2
asm volatile uint8 Ifx__getubyte2(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:784
Ifx__extru
#define Ifx__extru
Definition: IfxCpu_IntrinsicsDcc.h:406
Ifx__float_to_sfract
IFX_INLINE sfract Ifx__float_to_sfract(float a)
Definition: IfxCpu_IntrinsicsGhs.h:265
Ifx__insertubyte4
asm __upackb Ifx__insertubyte4(__upackb a, uint8 b)
Insert uint8 into fourth unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:973
Ifx__extractbyte1
asm sint8 Ifx__extractbyte1(__packb a)
Extract first byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:606
Ifx__cacheai
IFX_INLINE void Ifx__cacheai(uint8 *p)
Definition: IfxCpu_IntrinsicsGhs2G.h:1185
sint16
short sint16
Definition: Platform_Types.h:129
Ifx__inserthw1
asm __packhw Ifx__inserthw1(__packhw a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:928
Ifx__clssf
asm short Ifx__clssf(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:205
__packhw
long __packhw
Definition: Ifx_TypesDcc.h:49
fract
long fract
Definition: Ifx_TypesDcc.h:44
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
laccum
long long laccum
Definition: Ifx_TypesDcc.h:46
Ifx__insertbyte4
asm __packb Ifx__insertbyte4(__packb a, sint8 b)
Insert sint8 into fourth byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:919
Ifx__getbyte2
asm sint8 Ifx__getbyte2(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:724
Ifx__extractbyte3
asm sint8 Ifx__extractbyte3(__packb a)
Extract third byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:624
Ifx__moveToDataParamRet
IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
Definition: IfxCpu_IntrinsicsGhs2G.h:74
Ifx__initpackhwl
asm __packhw Ifx__initpackhwl(long a)
Definition: IfxCpu_IntrinsicsDcc.h:863
Ifx__getbyte3
asm sint8 Ifx__getbyte3(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:734
Ifx__extractbyte2
asm sint8 Ifx__extractbyte2(__packb a)
Extract second byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:615
Ifx__getbyte1
asm sint8 Ifx__getbyte1(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:714
Ifx__insertuhw1
asm __upackhw Ifx__insertuhw1(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:982
__upackb
unsigned long __upackb
Definition: Ifx_TypesDcc.h:48
Ifx__insertuhw2
asm __upackhw Ifx__insertuhw2(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:991
Ifx__extractubyte1
asm volatile uint8 Ifx__extractubyte1(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:660
Ifx__shafracts
asm fract Ifx__shafracts(fract a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:358
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx__float_to_fract
asm fract Ifx__float_to_fract(float a)
Definition: IfxCpu_IntrinsicsDcc.h:215
Ifx__extractubyte4
asm volatile uint8 Ifx__extractubyte4(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:687
Ifx__setuhw2
asm volatile void Ifx__setuhw2(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:1161
Ifx__round16
asm sfract Ifx__round16(fract a)
Definition: IfxCpu_IntrinsicsDcc.h:288
Ifx__sethw1
asm volatile void Ifx__sethw1(__packhw *a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:1084
Ifx__cacheawi
#define Ifx__cacheawi
Definition: IfxCpu_IntrinsicsDcc.h:504
Ifx__jumpBackToLink
IFX_INLINE void Ifx__jumpBackToLink(void)
Definition: IfxCpu_IntrinsicsGhs2G.h:101
Ifx__getubyte3
asm volatile uint8 Ifx__getubyte3(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:794
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx__jump_and_link
IFX_INLINE void Ifx__jump_and_link(void(*fun)(void))
Definition: IfxCpu_IntrinsicsGhs2G.h:64
Ifx__insertbyte3
asm __packb Ifx__insertbyte3(__packb a, sint8 b)
Insert sint8 into third byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:910
Ifx__rol
asm volatile uint32 Ifx__rol(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsDcc.h:552
Ifx__shaaccum
asm laccum Ifx__shaaccum(laccum a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:338
Ifx__sfract_to_u16
asm volatile uint16 Ifx__sfract_to_u16(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:328
Ifx__insert
#define Ifx__insert
Definition: IfxCpu_IntrinsicsDcc.h:423
Ifx__setbyte4
asm volatile void Ifx__setbyte4(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1073
Ifx__moveToDataParam0
IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
Definition: IfxCpu_IntrinsicsGhs2G.h:69
Ifx__mulfractfract
#define Ifx__mulfractfract(fractvalue1, fractvalue2)
Definition: IfxCpu_IntrinsicsTasking.h:164
sint32
long sint32
Definition: Platform_Types.h:134
Ifx__getubyte4
asm volatile uint8 Ifx__getubyte4(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:804
Ifx__getfract
asm fract Ifx__getfract(laccum a)
Definition: IfxCpu_IntrinsicsDcc.h:235
Ifx__setubyte2
asm volatile void Ifx__setubyte2(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1117
Ifx__swap
asm volatile uint32 Ifx__swap(void *place, uint32 value)
Definition: IfxCpu_IntrinsicsDcc.h:1431
Ifx__extracthw1
asm short Ifx__extracthw1(__packhw a)
Extract first short from a __packhw.
Definition: IfxCpu_IntrinsicsDcc.h:642
Ifx__insertubyte1
asm __upackb Ifx__insertubyte1(__upackb a, uint8 b)
Insert uint8 into first unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:946
Ifx__cmpAndSwap
IFX_INLINE unsigned int Ifx__cmpAndSwap(unsigned int volatile *address, unsigned int value, unsigned int condition)
This function is a implementation of a binary semaphore using compare and swap instruction.
Definition: IfxCpu_IntrinsicsGhs2G.h:1102
Ifx__initpackb
asm __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
Definition: IfxCpu_IntrinsicsDcc.h:834
Ifx__getuhw2
asm volatile uint16 Ifx__getuhw2(__upackhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:824
Ifx__inserthw2
asm __packhw Ifx__inserthw2(__packhw a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:937
Ifx__getA11
IFX_INLINE void * Ifx__getA11(void)
Definition: IfxCpu_IntrinsicsGhs2G.h:1134
Ifx__setbyte3
asm volatile void Ifx__setbyte3(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1062
Ifx__initpackbl
asm __packb Ifx__initpackbl(long a)
Definition: IfxCpu_IntrinsicsDcc.h:845
Ifx__mulfractlong
#define Ifx__mulfractlong
Definition: IfxCpu_IntrinsicsTasking.h:162
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx__extracthw2
asm short Ifx__extracthw2(__packhw a)
Extract second short from a __packhw.
Definition: IfxCpu_IntrinsicsDcc.h:651
Ifx__setStackPointer
IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
Definition: IfxCpu_IntrinsicsGhs2G.h:1141
sint8
signed char sint8
Definition: Platform_Types.h:125
IfxCpu_getRandomVal
IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Definition: IfxCpu_IntrinsicsGhs2G.h:1158
Ifx__setbyte1
asm volatile void Ifx__setbyte1(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1040


iLLD_TC26B: IfxCpu_IntrinsicsGhs.h Source File

  • Cpu
  • Std
IfxCpu_IntrinsicsGhs.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_IntrinsicsGhs.h
3 *
4 * \version iLLD_1_0_1_12_0
5 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup IfxLld_Cpu_Intrinsics_Ghs Intrinsics for GNU compiler
41 * \ingroup IfxLld_Cpu_Intrinsics
42 *
43 */
44
45 #ifndef IFXCPU_INTRINSICSGHS_H
46 #define IFXCPU_INTRINSICSGHS_H
47
48 /******************************************************************************/
49 #include "Ifx_Types.h"
50 #include <intrinsics.h>
51
52 /******************************************************************************/
53 /* *INDENT-OFF* */
54 #define STRINGIFY(x) #x
55
56 typedef void (*voidfunc)();
57
58 /** Function call without return
59 */
60 #define Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
61
62 /** Jump and link
63 */
64 IFX_INLINE void Ifx__jump_and_link(void (*fun)(void))
65 {
66 __asm__ volatile ("jli %0"::"a"(fun));
67 }
68
69 IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
70 {
71 __asm__ volatile ("mov\t d4, %0"::"d"(var));
72 }
73
74 IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
75 {
76 __asm__ volatile ("mov\t d2, %0"::"d"(var));
77 }
78
79 IFX_INLINE unsigned int Ifx__getDataParamRet(void)
80 {
81 unsigned int var;
82 __asm__ volatile (" mov\t %0, d2":"=d"(var));
83 return var;
84 }
85
86 IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
87 {
88 __asm__ volatile ("mov.aa\t a4, %0"::"a"(var));
89 }
90
91 IFX_INLINE void Ifx__jumpToFunction(void (*fun)(void))
92 {
93 Ifx__non_return_call(fun);
94 }
95
96 IFX_INLINE void Ifx__jumpToFunctionWithLink(void (*fun)(void))
97 {
98 Ifx__jump_and_link(fun);
99 }
100
101 IFX_INLINE void Ifx__jumpBackToLink(void)
102 {
103 __asm__ volatile ("ji a11");
104 }
105
106 /** Insert a memory barrier
107 */
108 #define Ifx__mem_barrier __asm__ volatile("":::"memory");
109
110 /** \defgroup IfxLld_Cpu_Intrinsics_Ghs_any_type Cross type arithmetic operation
111 *
112 * Macro compatible with float, fix point, signed integer and unsigned integer
113 *
114 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
115 * \{
116 */
117 #define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
118 #define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
119 #define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
120 #define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
121 /** \} */
122
123 /** \defgroup IfxLld_Cpu_Intrinsics_Ghs_singed_integer Signed integer operation
124 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
125 * \{
126 */
127 #define Ifx__saturate(X,Min,Max) ( __min(__max(X, Min), Max) )
128 /** \} */
129
130 /** \defgroup IfxLld_Cpu_Intrinsics_Ghs_unsinged_integer Unsigned integer operation
131 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
132 * \{
133 */
134 #define Ifx__saturateu(X,Min,Max) ( __minu(__maxu(X, Min), Max) )
135 /** \} */
136
137 /** \defgroup intrinsicsghs_float Floating point operation
138 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
139 * \{
140 */
141
142 #define Ifx__sqrf(X) ((X) * (X))
143 #define Ifx__sqrtf(X) sqrtf(X)
144 #define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
145
146 #define Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
147 #define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
148 #define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
149 #define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
150 #define Ifx__saturatef(X,Min,Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
151 #define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
152
153 #define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
154 #define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
155 #define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
156 #define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
157
158 #define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
159 #define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
160 #define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
161 /** \} */
162
163 /** \defgroup IfxLld_Cpu_Intrinsics_Ghsfractional Fractional Arithmetic Support
164 The next table provides an overview of intrinsic functions to convert fractional values. Note that the
165 TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
166 need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
167 compiler does support these functions.
168 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
169 * \{
170 */
171
172 /** Count the consecutive number of bits that have the same value as bit 15 of an sfract
173 */
174 IFX_INLINE sint16 Ifx__clssf(sfract a)
175 {
176 sint16 res;
177 __asm__ volatile ("sh %1,%1,16 \n\
178 cls %0,%1":"=d"(res):"d"(a):"memory");
179 return res;
180 }
181
182 /** Convert fract to float
183 */
184 IFX_INLINE float Ifx__fract_to_float(fract a)
185 {
186 float res;
187 __asm__ volatile ("q31tof %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
188 return res;
189 }
190
191 /** Convert float to fract
192 */
193 IFX_INLINE fract Ifx__float_to_fract(float a)
194 {
195 fract res;
196 __asm__ volatile ("ftoq31 %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
197 return res;
198 }
199
200 /** Convert laccum to fract
201 */
202 IFX_INLINE fract Ifx__getfract(laccum a)
203 {
204 fract res;
205 __asm__ volatile ("dextr %0,%H1,%L1,0x11":"=&d" (res):"d" (a):"memory");
206 return res;
207 }
208
209 /** Multiply-add with rounding. Returns the rounded result of ( a + b * c )
210 */
211 IFX_INLINE sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
212 {
213 sfract res;
214 __asm__ volatile ("sh %1,%1,16 \n\
215 maddrs.q %0,%1,%2L,%3L,1 \n\
216 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
217 return res;
218 }
219
220 /** Multiply-add sfract. Returns ( a + b * c )
221 */
222 IFX_INLINE sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
223 {
224 sfract res;
225 __asm__ volatile ("sh %1,%1,16 \n\
226 madds.q %0,%1,%2L,%3L,1 \n\
227 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
228 return res;
229 }
230
231 /** Integer part of the multiplication of a fract and a fract
232 */
233 IFX_INLINE long Ifx__mulfractfract(fract a, fract b)
234 {
235 long res;
236 __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
237 return res;
238 }
239
240 /** Integer part of the multiplication of a fract and a long
241 */
242 IFX_INLINE long Ifx__mulfractlong(fract a, long b)
243 {
244 long res;
245 __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
246 return res;
247 }
248
249 /** Convert fract to sfract
250 */
251 IFX_INLINE sfract Ifx__round16(fract a)
252 {
253 sfract res;
254 __asm__ volatile ("mov.u %0,0x8000 \n\
255 adds %0,%1 \n\
256 extr %0,%0,0x10,0x10 "
257 :"=&d"(res):"d"(a):"memory");
258 return res;
259 }
260
261 #define Ifx__fract_to_sfract Ifx__round16
262
263 /** Convert float to sfract
264 */
265 IFX_INLINE sfract Ifx__float_to_sfract(float a)
266 {
267 fract tmp = Ifx__float_to_fract(a);
268 return Ifx__fract_to_sfract(tmp);
269 }
270
271 /** Convert signed sint16 to sfract
272 */
273 IFX_INLINE sfract Ifx__s16_to_sfract(sint16 a)
274 {
275 sfract res;
276 __asm__ volatile ("sh %0,%1,16 \n\
277 sh %0,%0,-16":"=d"(res):"d"(a):"memory");
278 return res;
279 }
280
281 /** Convert sfract to sint16
282 */
283 IFX_INLINE sint16 Ifx__sfract_to_s16(sfract a)
284 {
285 sint16 res;
286 __asm__ volatile ("sh %1,%1,16 \n\
287 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
288 return res;
289 }
290
291 /** Convert sfract to uint16
292 */
293 IFX_INLINE uint16 Ifx__sfract_to_u16(sfract a)
294 {
295 uint16 res;
296 __asm__ volatile ("sh %1,%1,16 \n\
297 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
298 return res;
299 }
300
301 /** Left/right shift of an __laccum
302 */
303 __asm__ laccum Ifx__shaaccum(laccum a, sint32 b)
304 {
305 % lab L0, L1; reg a, b
306 ! "%d2", "%d3"
307 jge b, 0, L0
308 sha %d3, a!L, b
309 rsub b, b, 0
310 dextr %d2, a!H, a!L, b
311 j L1
312 L0:
313 dextr %d2, a!H, a!L, b
314 sha %d2, a!L, b
315 L1:
316 }
317
318 /** Left/right shift of an fract
319 */
320 IFX_INLINE fract Ifx__shafracts(fract a, sint32 b)
321 {
322 fract res;
323 __asm__ volatile ("shas %0,%1,%2":"=d"(res):"d"(a), "d"(b):"memory");
324 return res;
325 }
326
327 /** Left/right shift of an sfract
328 */
329 IFX_INLINE sfract Ifx__shasfracts(sfract a, sint32 b)
330 {
331 sfract res;
332 __asm__ volatile ("sh %1,%1,16 \n\
333 shas %0,%1,%2 \n\
334 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b):"memory");
335 return res;
336 }
337
338 /** Convert uint16 to sfract
339 */
340 IFX_INLINE sfract Ifx__u16_to_sfract(uint16 a)
341 {
342 sfract res;
343 __asm__ volatile ("sh %0,%1,16 \n\
344 sh %0,%0,-16":"=d"(res):"d"(a):"memory");
345 return res;
346 }
347
348 /** \} */
349
350 /** \defgroup IfxLld_Cpu_Intrinsics_Ghsinsert Insert / Extract Bit-fields and Bits
351 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
352 * \{
353 */
354
355 /** Extract a bit-field (bit pos to bit pos+width) from value
356 */
357 IFX_INLINE sint32 Ifx__extr(sint32 a, uint32 p, uint32 w)
358 {
359 sint32 res;
360 __asm__ volatile ("mov d14,%2 \n\
361 mov d15,%3 \n\
362 extr %0,%1,e14"
363 : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
364 return res;
365 }
366
367 /** Same as __extr() but return bit-field as unsigned integer
368 */
369 IFX_INLINE uint32 Ifx__extru(uint32 a, uint32 p, uint32 w)
370 {
371 uint32 res;
372 __asm__ volatile ("mov d14,%2 \n\
373 mov d15,%3 \n\
374 extr.u %0,%1,e14"\
375 : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
376 return res;
377 }
378
379 /** Load a single bit.
380 */
381 //#define __getbit(address,bitoffset ) __extru( *(address), bitoffset, 1 )
382 #define Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
383
384 /** Atomic load-modify-store.
385 */
386 #define Ifx__imaskldmst(address, value, bitoffset, bits) __imaskldmst((int *)address, value, bitoffset, bits)
387
388 /** Extract bit-field (width bits starting at bit 0) from src and insert it in trg at pos.
389 */
390 IFX_INLINE sint32 Ifx__insert(sint32 a, sint32 b, sint32 p, const sint32 w)
391 {
392 sint32 res;
393 __asm__ volatile ("mov d14,%3 \n\
394 mov d15,%4 \n\
395 insert %0,%1,%2,e14"
396 :"=d"(res):"d"(a), "d"(b), "d"(p), "d"(w):"d14", "d15");
397 return res;
398 }
399
400 /** Store a single bit.
401 */
402 #define Ifx__putbit(value,address,bitoffset ) Ifx__imaskldmst(address, value, bitoffset,1)
403
404 /** \} */
405
406 /** \defgroup IfxLld_Cpu_Intrinsics_Ghsinterrupt_handling Interrupt Handling
407 The next table provides an overview of the intrinsic functions to read or set interrupt handling.
408 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
409 * \{
410 */
411
412 /** \} */
413
414 /** \defgroup IfxLld_Cpu_Intrinsics_Ghsmiscellaneous Miscellaneous Intrinsic Functions
415 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
416 * \{
417 */
418
419 /** Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].
420 */
421 IFX_INLINE void Ifx__cacheawi(uint8* p)
422 {
423 __asm__ volatile("cachea.wi [%0]0"::"a"(p));
424 }
425 /** Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].
426 */
427 IFX_INLINE void Ifx__cacheiwi(uint8* p)
428 {
429 __asm__ volatile("cachei.wi [%0]0"::"a"(p));
430 }
431
432 /** Write back and invalidate cache address \"p\" and return post incremented
433 * value of \"p\". Generates CACHEA.WI [Ab+].
434 */
435 IFX_INLINE uint8* Ifx__cacheawi_bo_post_inc(uint8* p)
436 {
437 __asm__ volatile("cachea.wi [%0+]0"::"a"(p));
438 return p;
439 }
440
441 /** Multiply two 32-bit numbers to an intermediate 64-bit result, and scale
442 * back the result to 32 bits. To scale back the result, 32 bits are extracted
443 * from the intermediate 64-bit result: bit 63-offset to bit 31-offset.
444 */
445 IFX_INLINE sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
446 {
447 sint32 res;
448 __asm__ volatile("mul e12,%1,%2 \n\
449 dextr %0,d13,d12,%3"
450 :"=d"(res):"d"(a), "d"(b), "d"(offset):"d12", "d13");
451 return res;
452 }
453
454 /** Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).
455 */
456 IFX_INLINE uint32 Ifx__rol(uint32 operand, uint32 count)
457 {
458 uint32 res;
459 __asm__ volatile("dextr %0,%1,%1,%2":"=d"(res):"d"(operand), "d"(count):"memory");
460 return res;
461 }
462
463 /** Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).
464 */
465 IFX_INLINE uint32 Ifx__ror(uint32 operand, uint32 count)
466 {
467 uint32 res;
468 __asm__ volatile("rsub %2,%2,0 \n\
469 dextr %0,%1,%1,%2"
470 :"=d"(res):"d"(operand), "d"(count):"memory");
471 return res;
472 }
473 /** \} */
474
475 /** \defgroup IfxLld_Cpu_Intrinsics_Ghspacked Packed Data Type Support
476 The next table provides an overview of the intrinsic functions for initialization of packed data type.
477 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
478 * \{
479 */
480
481 /** Extract first byte from a __packb
482 */
483 IFX_INLINE sint8 Ifx__extractbyte1(__packb a)
484 {
485 sint8 res;
486 __asm__ volatile ("extr %0,%1,0,8"
487 :"=d"(res):"d"(a):"memory");
488 return res;
489 }
490
491 /** Extract second byte from a __packb
492 */
493 IFX_INLINE sint8 Ifx__extractbyte2(__packb a)
494 {
495 sint8 res;
496 __asm__ volatile ("extr %0,%1,8,8"
497 :"=d"(res):"d"(a):"memory");
498 return res;
499 }
500
501 /** Extract third byte from a __packb
502 */
503 IFX_INLINE sint8 Ifx__extractbyte3(__packb a)
504 {
505 sint8 res;
506 __asm__ volatile ("extr %0,%1,16,8"
507 :"=d"(res):"d"(a):"memory");
508 return res;
509 }
510
511 /** Extract fourth byte from a __packb
512 */
513 IFX_INLINE sint8 Ifx__extractbyte4(__packb a)
514 {
515 sint8 res;
516 __asm__ volatile ("extr %0,%1,24,8"
517 :"=d"(res):"d"(a):"memory");
518 return res;
519 }
520
521 /** Extract first sint16 from a __packhw
522 */
523 IFX_INLINE sint16 Ifx__extracthw1(__packhw a)
524 {
525 sint16 res;
526 __asm__ volatile ("extr %0,%1,0,16"
527 :"=d"(res):"d"(a):"memory");
528 return res;
529 }
530
531 /** Extract second sint16 from a __packhw
532 */
533 IFX_INLINE sint16 Ifx__extracthw2(__packhw a)
534 {
535 sint16 res;
536 __asm__ volatile ("extr %0,%1,16,16"
537 :"=d"(res):"d"(a):"memory");
538 return res;
539 }
540
541 /** Extract first uint8 from a __packb
542 */
543 IFX_INLINE uint8 Ifx__extractubyte1(__upackb a)
544 {
545 uint8 res;
546 __asm__ volatile ("extr %0,%1,0,8"
547 :"=d"(res):"d"(a):"memory");
548 return res;
549 }
550
551 /** Extract second uint8 from a __packb
552 */
553 IFX_INLINE uint8 Ifx__extractubyte2(__upackb a)
554 {
555 uint8 res;
556 __asm__ volatile ("extr %0,%1,8,8"
557 :"=d"(res):"d"(a):"memory");
558 return res;
559 }
560
561 /** Extract third uint8 from a __packb
562 */
563 IFX_INLINE uint8 Ifx__extractubyte3(__upackb a)
564 {
565 uint8 res;
566 __asm__ volatile ("extr %0,%1,16,8"
567 :"=d"(res):"d"(a):"memory");
568 return res;
569 }
570
571 /** Extract fourth uint8 from a __packb
572 */
573 IFX_INLINE uint8 Ifx__extractubyte4(__upackb a)
574 {
575 uint8 res;
576 __asm__ volatile ("extr %0,%1,24,8"
577 :"=d"(res):"d"(a):"memory");
578 return res;
579 }
580
581 /** Extract first uint16 from a __packhw
582 */
583 IFX_INLINE uint16 Ifx__extractuhw1(__upackhw a)
584 {
585 uint16 res;
586 __asm__ volatile ("extr %0,%1,0,16"
587 :"=d"(res):"d"(a):"memory");
588 return res;
589 }
590
591 /** Extract second uint16 from a __packhw
592 */
593 IFX_INLINE uint16 Ifx__extractuhw2(__upackhw a)
594 {
595 uint16 res;
596 __asm__ volatile ("extr %0,%1,16,16"
597 :"=d"(res):"d"(a):"memory");
598 return res;
599 }
600
601 /** Extract first byte from a __packb
602 */
603 IFX_INLINE sint8 Ifx__getbyte1(__packb* a)
604 {
605 sint8 res;
606 __asm__ volatile ("ld.w %0,[%1]0 \n\
607 extr %0,%0,0,8"
608 :"=d"(res):"a"(a):"memory");
609 return res;
610
611 }
612
613 /** Extract second byte from a __packb
614 */
615 IFX_INLINE sint8 Ifx__getbyte2(__packb* a)
616 {
617 sint8 res;
618 __asm__ volatile ("ld.w %0,[%1]0 \n\
619 extr %0,%0,8,8"
620 :"=d"(res):"a"(a):"memory");
621 return res;
622
623 }
624
625 /** Extract third byte from a __packb
626 */
627 IFX_INLINE sint8 Ifx__getbyte3(__packb* a)
628 {
629 sint8 res;
630 __asm__ volatile ("ld.w %0,[%1]0 \n\
631 extr %0,%0,16,8"
632 :"=d"(res):"a"(a):"memory");
633 return res;
634
635 }
636
637 /** Extract fourth byte from a __packb
638 */
639 IFX_INLINE sint8 Ifx__getbyte4(__packb* a)
640 {
641 sint8 res;
642 __asm__ volatile ("ld.w %0,[%1]0 \n\
643 extr %0,%0,24,8"
644 :"=d"(res):"a"(a):"memory");
645 return res;
646
647 }
648
649 /** Extract first sint16 from a __packhw
650 */
651 IFX_INLINE sint16 Ifx__gethw1(__packhw* a)
652 {
653 sint16 res;
654 __asm__ volatile ("ld.w %0,[%1]0 \n\
655 extr %0,%0,0,16"
656 :"=d"(res):"a"(a):"memory");
657 return res;
658 }
659 /** Extract second sint16 from a __packhw
660 */
661 IFX_INLINE sint16 Ifx__gethw2(__packhw* a)
662 {
663 sint16 res;
664 __asm__ volatile ("ld.w %0,[%1]0 \n\
665 extr %0,%0,16,16"
666 :"=d"(res):"a"(a):"memory");
667 return res;
668 }
669
670 /** Extract first uint8 from a __packb
671 */
672 IFX_INLINE uint8 Ifx__getubyte1(__upackb* a)
673 {
674 uint8 res;
675 __asm__ volatile ("ld.w %0,[%1]0 \n\
676 extr %0,%0,0,8"
677 :"=d"(res):"a"(a):"memory");
678 return res;
679 }
680
681 /** Extract second uint8 from a __packb
682 */
683 IFX_INLINE uint8 Ifx__getubyte2(__upackb* a)
684 {
685 uint8 res;
686 __asm__ volatile ("ld.w %0,[%1]0 \n\
687 extr %0,%0,8,8"
688 :"=d"(res):"a"(a):"memory");
689 return res;
690 }
691
692 /** Extract third uint8 from a __packb
693 */
694 IFX_INLINE uint8 Ifx__getubyte3(__upackb* a)
695 {
696 uint8 res;
697 __asm__ volatile ("ld.w %0,[%1]0 \n\
698 extr %0,%0,16,8"
699 :"=d"(res):"a"(a):"memory");
700 return res;
701 }
702
703 /** Extract fourth uint8 from a __packb
704 */
705 IFX_INLINE uint8 Ifx__getubyte4(__upackb* a)
706 {
707 uint8 res;
708 __asm__ volatile ("ld.w %0,[%1]0 \n\
709 extr %0,%0,24,8"
710 :"=d"(res):"a"(a):"memory");
711 return res;
712 }
713
714 /** Extract first uint16 from a __packhw
715 */
716 IFX_INLINE uint16 Ifx__getuhw1(__upackhw* a)
717 {
718 uint16 res;
719 __asm__ volatile ("ld.w %0,[%1]0 \n\
720 extr %0,%0,0,16"
721 :"=d"(res):"a"(a):"memory");
722 return res;
723 }
724
725 /** Extract second uint16 from a __packhw
726 */
727 IFX_INLINE uint16 Ifx__getuhw2(__upackhw* a)
728 {
729 uint16 res;
730 __asm__ volatile ("ld.w %0,[%1]0 \n\
731 extr %0,%0,16,16"
732 :"=d"(res):"a"(a):"memory");
733 return res;
734 }
735
736 /** Initialize __packb with four integers
737 */
738 IFX_INLINE __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
739 {
740 __packb res;
741 __asm__ volatile ("insert %3,%3,%4,8,8 \n\
742 insert %4,%1,%2,8,8 \n\
743 insert %0,%4,%3,16,16 "
744 :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
745 return res;
746 }
747
748 /** Initialize __packb with a long integer
749 */
750 IFX_INLINE __packb Ifx__initpackbl(long a)
751 {
752 return (__packb) a;
753 }
754
755 /** Initialize __packhw with two integers
756 */
757 IFX_INLINE __packhw Ifx__initpackhw(sint16 a, sint16 b)
758 {
759 __packhw res;
760 __asm__ volatile ("insert %0,%1,%2,16,16"
761 :"=d"(res):"d"(a), "d"(b):"memory");
762 return res;
763 }
764
765 /** Initialize __packhw with a long integer
766 */
767 IFX_INLINE __packhw Ifx__initpackhwl(long a)
768 {
769 return a;
770 }
771
772 /** Initialize __packb with four unsigned integers
773 */
774 IFX_INLINE __upackb Ifx__initupackb( uint32 a, uint32 b, uint32 c, uint32 d)
775 {
776 __upackb res;
777 __asm__ volatile ("insert %3,%3,%4,8,8 \n\
778 insert %1,%1,%2,8,8 \n\
779 insert %0,%1,%3,16,16"
780 :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
781 return res;
782 }
783
784 /** Initialize __packhw with two unsigned integers
785 */
786 IFX_INLINE __upackhw Ifx__initupackhw( uint16 a, uint16 b)
787 {
788 __upackhw res;
789 __asm__ volatile ("insert %0,%1,%2,16,16"
790 :"=d"(res):"d"(a), "d"(b):"memory");
791 return res;
792 }
793
794 /** Insert sint8 into first byte of a __packb
795 */
796 IFX_INLINE __packb Ifx__insertbyte1(__packb a, sint8 b)
797 {
798 __packb res;
799 __asm__ volatile ("insert %0,%1,%2,0,8"
800 :"=d"(res):"d"(a), "d"(b):"memory");
801 return res;
802 }
803
804 /** Insert sint8 into second byte of a __packb
805 */
806 IFX_INLINE __packb Ifx__insertbyte2(__packb a, sint8 b)
807 {
808 __packb res;
809 __asm__ volatile ("insert %0,%1,%2,8,8"
810 :"=d"(res):"d"(a), "d"(b):"memory");
811 return res;
812 }
813
814 /** Insert sint8 into third byte of a __packb
815 */
816 IFX_INLINE __packb Ifx__insertbyte3(__packb a, sint8 b)
817 {
818 __packb res;
819 __asm__ volatile ("insert %0,%1,%2,16,8"
820 :"=d"(res):"d"(a), "d"(b):"memory");
821 return res;
822 }
823
824 /** Insert sint8 into fourth byte of a __packb
825 */
826 IFX_INLINE __packb Ifx__insertbyte4(__packb a, sint8 b)
827 {
828 __packb res;
829 __asm__ volatile ("insert %0,%1,%2,24,8"
830 :"=d"(res):"d"(a), "d"(b):"memory");
831 return res;
832 }
833
834 /** Insert sint8 into first uint8 of a __packb
835 */
836 IFX_INLINE __upackb Ifx__insertubyte1( __upackb a, uint8 b)
837 {
838 __upackb res;
839 __asm__ volatile ("insert %0,%1,%2,0,8"
840 :"=d"(res):"d"(a), "d"(b):"memory");
841 return res;
842 }
843
844 /** Insert sint8 into second uint8 of a __packb
845 */
846 IFX_INLINE __upackb Ifx__insertubyte2( __upackb a, uint8 b)
847 {
848 __upackb res;
849 __asm__ volatile ("insert %0,%1,%2,8,8"
850 :"=d"(res):"d"(a), "d"(b):"memory");
851 return res;
852 }
853
854 /** Insert sint8 into third uint8 of a __packb
855 */
856 IFX_INLINE __upackb Ifx__insertubyte3( __upackb a, uint8 b)
857 {
858 __upackb res;
859 __asm__ volatile ("insert %0,%1,%2,16,8"
860 :"=d"(res):"d"(a), "d"(b):"memory");
861 return res;
862 }
863
864 /** Insert sint8 into fourth uint8 of a __packb
865 */
866 IFX_INLINE __upackb Ifx__insertubyte4( __upackb a, uint8 b)
867 {
868 __upackb res;
869 __asm__ volatile ("insert %0,%1,%2,24,8"
870 :"=d"(res):"d"(a), "d"(b):"memory");
871 return res;
872 }
873
874 /** Insert sint16 into first halfword of a __packhw
875 */
876 IFX_INLINE __packhw Ifx__inserthw1(__packhw a, sint16 b)
877 {
878 __packhw res;
879 __asm__ volatile ("insert %0,%1,%2,0,16"
880 :"=d"(res):"d"(a), "d"(b):"memory");
881 return res;
882 }
883
884 /** Insert sint16 into second halfword of a __packhw
885 */
886 IFX_INLINE __packhw Ifx__inserthw2(__packhw a, sint16 b)
887 {
888 __packhw res;
889 __asm__ volatile ("insert %0,%1,%2,16,16"
890 :"=d"(res):"d"(a), "d"(b):"memory");
891 return res;
892 }
893
894 /** Insert uint16 into first halfword of a __upackhw
895 */
896 IFX_INLINE __upackhw Ifx__insertuhw1( __upackhw a, uint16 b)
897 {
898 __upackhw res;
899 __asm__ volatile ("insert %0,%1,%2,0,16"
900 :"=d"(res):"d"(a), "d"(b):"memory");
901 return res;
902 }
903
904 /** Insert uint16 into second halfword of a __upackhw
905 */
906 IFX_INLINE __upackhw Ifx__insertuhw2( __upackhw a, uint16 b)
907 {
908 __upackhw res;
909 __asm__ volatile ("insert %0,%1,%2,16,16"
910 :"=d"(res):"d"(a), "d"(b):"memory");
911 return res;
912 }
913
914 /** Insert sint8 into first byte of a __packb
915 */
916 IFX_INLINE void Ifx__setbyte1(__packb* a, sint8 b)
917 {
918 __asm__ volatile ("ld.w d15,[%0] \n\
919 insert d15,d15,%1,0,8 \n\
920 st.w [%0],d15"
921 ::"a"(a), "d"(b):"d15", "memory");
922 }
923
924 /** Insert sint8 into second byte of a __packb
925 */
926 IFX_INLINE void Ifx__setbyte2(__packb* a, sint8 b)
927 {
928 __asm__ volatile ("ld.w d15,[%0] \n\
929 insert d15,d15,%1,8,8 \n\
930 st.w [%0],d15"
931 ::"a"(a), "d"(b):"d15", "memory");
932 }
933
934 /** Insert sint8 into third byte of a __packb
935 */
936 IFX_INLINE void Ifx__setbyte3(__packb* a, sint8 b)
937 {
938 __asm__ volatile ("ld.w d15,[%0] \n\
939 insert d15,d15,%1,16,8 \n\
940 st.w [%0],d15"
941 ::"a"(a), "d"(b):"d15", "memory");
942 }
943
944 /** Insert sint8 into fourth byte of a __packb
945 */
946 IFX_INLINE void Ifx__setbyte4(__packb* a, sint8 b)
947 {
948 __asm__ volatile ("ld.w d15,[%0] \n\
949 insert d15,d15,%1,24,8 \n\
950 st.w [%0],d15"
951 ::"a"(a), "d"(b):"d15", "memory");
952 }
953
954 /** Insert sint16 into first halfword of a __packhw
955 */
956 IFX_INLINE void Ifx__sethw1(__packhw* a, sint16 b)
957 {
958 __asm__ volatile ("ld.w d15,[%0] \n\
959 insert d15,d15,%1,0,16 \n\
960 st.w [%0],d15"
961 ::"a"(a), "d"(b):"d15", "memory");
962 }
963
964 /** Insert sint16 into second halfword of a __packhw
965 */
966 IFX_INLINE void Ifx__sethw2(__packhw* a, sint16 b)
967 {
968 __asm__ volatile ("ld.w d15,[%0] \n\
969 insert d15,d15,%1,16,16 \n\
970 st.w [%0],d15"
971 ::"a"(a), "d"(b):"d15", "memory");
972 }
973
974 /** Insert uint8 into first byte of a __upackb
975 */
976 IFX_INLINE void Ifx__setubyte1(__upackb* a, uint8 b)
977 {
978 __asm__ volatile ("ld.w d15,[%0] \n\
979 insert d15,d15,%1,0,8 \n\
980 st.w [%0],d15"
981 ::"a"(a), "d"(b):"d15", "memory");
982 }
983
984 /** Insert uint8 into second byte of a __upackb
985 */
986 IFX_INLINE void Ifx__setubyte2(__upackb* a, uint8 b)
987 {
988 __asm__ volatile ("ld.w d15,[%0] \n\
989 insert d15,d15,%1,8,8 \n\
990 st.w [%0],d15"
991 ::"a"(a), "d"(b):"d15", "memory");
992 }
993
994 /** Insert uint8 into third byte of a __upackb
995 */
996 IFX_INLINE void Ifx__setubyte3(__upackb* a, uint8 b)
997 {
998 __asm__ volatile ("ld.w d15,[%0] \n\
999 insert d15,d15,%1,16,8 \n\
1000 st.w [%0],d15"
1001 ::"a"(a), "d"(b):"d15", "memory");
1002 }
1003
1004 /** Insert uint8 into fourth byte of a __upackb
1005 */
1006 IFX_INLINE void Ifx__setubyte4(__upackb* a, uint8 b)
1007 {
1008 __asm__ volatile ("ld.w d15,[%0] \n\
1009 insert d15,d15,%1,24,8 \n\
1010 st.w [%0],d15"
1011 ::"a"(a), "d"(b):"d15", "memory");
1012 }
1013
1014 /** Insert uint16 into first halfword of a __upackhw
1015 */
1016 IFX_INLINE void Ifx__setuhw1(__upackhw* a, uint16 b)
1017 {
1018 __asm__ volatile ("ld.w d15,[%0] \n\
1019 insert d15,d15,%1,0,16 \n\
1020 st.w [%0],d15"
1021 ::"a"(a), "d"(b):"d15", "memory");
1022 }
1023
1024 /** Insert uint16 into second halfword of a __upackhw
1025 */
1026 IFX_INLINE void Ifx__setuhw2(__upackhw* a, uint16 b)
1027 {
1028 __asm__ volatile ("ld.w d15,[%0] \n\
1029 insert d15,d15,%1,16,16 \n\
1030 st.w [%0],d15"
1031 ::"a"(a), "d"(b):"d15", "memory");
1032 }
1033
1034 /** \} */
1035
1036 /** \defgroup IfxLld_Cpu_Intrinsics_Ghssingle_assembly Insert Single Assembly Instruction
1037 The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
1038 instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
1039 assembly instructions.
1040 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
1041 * \{
1042 */
1043
1044 /** Insert LDMST instruction. Note that all operands must be word-aligned.
1045 */
1046 IFX_INLINE void Ifx__ldmst(volatile void* address, uint32 mask, uint32 value)
1047 {
1048 __asm__ volatile("ldmst [%0]0,%1"
1049 ::"a"(address), "e"((long long)mask<<32 | value));
1050 }
1051
1052 /** Insert a loop over cnt NOP instruction
1053 */
1054 IFX_INLINE void Ifx__nops(void* cnt)
1055 {
1056 __asm__ volatile ("0: nop \n\
1057 loop %0,0b"
1058 ::"a"(((sint8*)cnt)-1));
1059 }
1060
1061 /** Insert SWAP instruction. Note that all operands must be word-aligned.
1062 */
1063 IFX_INLINE uint32 Ifx__swap(void* place, uint32 value)
1064 {
1065 uint32 res;
1066 __asm__ volatile("swap.w [%1]0,%2":"=d"(res):"a"(place), "0"(value));
1067 return res;
1068 }
1069
1070 /** Insert n NOP instruction
1071 */
1072 #define Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
1073
1074 /** \} */
1075
1076 /* FIXME use inline instead of #define */
1077 /*#define __extru(src,start,size) \
1078 ({ sint32 res; asm volatile (" extr.u\t %0,%1,%2,%3" : "=d" (res) : \
1079 "d" (src),"i" (start),"i" (size) : "memory"); res; })*/
1080
1081 /* FIXME use inline instead of #define */
1082 #define Ifx__setareg(areg,val) \
1083 { uint32 reg_val= (uint32)val; \
1084 asm volatile (" mov.a\t %"#areg",%0"::"d"(reg_val)); }
1085
1086 /**__mtcr (CPU_CCTRL, 0);
1087 */
1088 IFX_INLINE void Ifx__stopPerfCounters(void)
1089 {
1090 __asm__ volatile("mov d0,0\n\
1091 mtcr 0xFC00,d0\n\
1092 isync\n"
1093 : : :"d0"); /* FIXME check that the parameter d0 is understood by the compiler as a register used by the inline */
1094 }
1095
1096 /** \brief This function is a implementation of a binary semaphore using compare and swap instruction
1097 * \param address address of resource.
1098 * \param value This variable is updated with status of address
1099 * \param condition if the value of address matches with the value of condition, then swap of value & address occurs.
1100 *
1101 */
1102 IFX_INLINE unsigned int Ifx__cmpAndSwap (unsigned int volatile *address,
1103 unsigned int value, unsigned int condition)
1104 {
1105 unsigned long long reg64
1106 = value | (unsigned long long) condition << 32;
1107
1108 __asm__ __volatile__ ("cmpswap.w [%[addr]]0, %A[reg]"
1109 : [reg] "+d" (reg64)
1110 : [addr] "a" (address)
1111 : "memory");
1112 return reg64;
1113 }
1114
1115 /** \brief Convert a fixpoint value to float32
1116 *
1117 * This function converts a value from a fixpoint format to a float32 format.
1118 *
1119 *
1120 * \param value value to be converted.
1121 * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
1122 *
1123 * \return Returns the converted value in the float32 format.
1124 *
1125 */
1126 IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
1127 {
1128 float32 result;
1129
1130 __asm__ volatile("q31tof %0, %1, %2": "=d" (result) : "d" (value), "d" (shift));
1131 return result;
1132 }
1133
1134 IFX_INLINE void* Ifx__getA11(void)
1135 {
1136 uint32 *res;
1137 __asm__ volatile ("mov.aa %0, a11": "=a" (res) : :"a11");
1138 return res;
1139 }
1140
1141 IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
1142 {
1143 __asm__ volatile ("mov.aa a10, %0": : "a" (stackAddr));
1144 }
1145
1146 IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
1147 {
1148 uint32 returnvalue = 0; /* set seed value to 0 */
1149 for (;length > 0; length--)
1150 {
1151 /* calculate the CRC over all data */
1152 __asm__ ("CRC32 %0,%0,%1" : "+d" (returnvalue) : "d" (*startaddress));
1153 startaddress++;
1154 }
1155 return returnvalue;
1156 }
1157
1158 IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
1159 {
1160 uint32 result;
1161 __asm(" mul.u %%e14,%1,%2 # d15 = Eh; d14 = El \n"
1162 " mov %%d12,%%d14 # e12 = El \n"
1163 " mov %%d13, 0 # \n"
1164 " madd.u %%e14,%%e12,%%d15, 5 # e14 = El + 5 * d15 \n"
1165 " cmp_m_%=: jge.u %%d14,%3,sub_m_%= # \n"
1166 " jz %%d15,done_%= # \n"
1167 " sub_m_%=: subx %%d14,%%d14,%3 # e12=e12-m \n"
1168 " subc %%d15,%%d15,%%d13 # d13=d13-0 \n"
1169 " loopu cmp_m_%= # \n"
1170 " done_%=: mov %0,%%d14 # \n"
1171 : "=d"(result) : "d"(a), "d"(x), "d"(m) : "d12","d13","d14","d15");
1172 return result;
1173 }
1174
1175 /* compiler don't know this instruction
1176 IFX_INLINE sint32 Ifx__popcnt(sint32 a)
1177 {
1178 sint32 res;
1179 __asm__ volatile ("popcnt %0,%1":"=d"(res):"d"(a));
1180 return res;
1181 }*/
1182
1183 /** Invalidate cache address "p". Generates CACHEA.I [Ab].
1184 */
1185 IFX_INLINE void Ifx__cacheai(uint8* p)
1186 {
1187 __asm__ volatile("cachea.i [%0]0"::"a"(p));
1188 }
1189
1190 /* Macros for backward compatibility of the intrinsics*/
1191 /******************************************************************************/
1192 #ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
1193 #ifndef __non_return_call
1194 #define __non_return_call Ifx__non_return_call
1195 #endif
1196
1197 #ifndef __jump_and_link
1198 #define __jump_and_link Ifx__jump_and_link
1199 #endif
1200
1201 #ifndef __moveToDataParam0
1202 #define __moveToDataParam0 Ifx__moveToDataParam0
1203 #endif
1204
1205 #ifndef __moveToDataParamRet
1206 #define __moveToDataParamRet Ifx__moveToDataParamRet
1207 #endif
1208
1209 #ifndef __getDataParamRet
1210 #define __getDataParamRet Ifx__getDataParamRet
1211 #endif
1212
1213 #ifndef __moveToAddrParam0
1214 #define __moveToAddrParam0 Ifx__moveToAddrParam0
1215 #endif
1216
1217 #ifndef __jumpToFunction
1218 #define __jumpToFunction Ifx__jumpToFunction
1219 #endif
1220
1221 #ifndef __jumpToFunctionWithLink
1222 #define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
1223 #endif
1224
1225 #ifndef __jumpBackToLink
1226 #define __jumpBackToLink Ifx__jumpBackToLink
1227 #endif
1228
1229 #ifndef __mem_barrier
1230 #define __mem_barrier Ifx__mem_barrier
1231 #endif
1232
1233 #ifndef __minX
1234 #define __minX Ifx__minX
1235 #endif
1236
1237 #ifndef __maxX
1238 #define __maxX Ifx__maxX
1239 #endif
1240
1241 #ifndef __saturateX
1242 #define __saturateX Ifx__saturateX
1243 #endif
1244
1245 #ifndef __checkrangeX
1246 #define __checkrangeX Ifx__checkrangeX
1247 #endif
1248
1249 #ifndef __saturate
1250 #define __saturate Ifx__saturate
1251 #endif
1252
1253 #ifndef __saturateu
1254 #define __saturateu Ifx__saturateu
1255 #endif
1256
1257 #ifndef __sqrf
1258 #define __sqrf Ifx__sqrf
1259 #endif
1260
1261 #ifndef __sqrtf
1262 #define __sqrtf Ifx__sqrtf
1263 #endif
1264
1265 #ifndef __checkrange
1266 #define __checkrange Ifx__checkrange
1267 #endif
1268
1269 #ifndef __roundf
1270 #define __roundf Ifx__roundf
1271 #endif
1272
1273 #ifndef __absf
1274 #define __absf Ifx__absf
1275 #endif
1276
1277 #ifndef __minf
1278 #define __minf Ifx__minf
1279 #endif
1280
1281 #ifndef __maxf
1282 #define __maxf Ifx__maxf
1283 #endif
1284
1285 #ifndef __saturatef
1286 #define __saturatef Ifx__saturatef
1287 #endif
1288
1289 #ifndef __checkrangef
1290 #define __checkrangef Ifx__checkrangef
1291 #endif
1292
1293 #ifndef __abs_stdreal
1294 #define __abs_stdreal Ifx__abs_stdreal
1295 #endif
1296
1297 #ifndef __min_stdreal
1298 #define __min_stdreal Ifx__min_stdreal
1299 #endif
1300
1301 #ifndef __max_stdreal
1302 #define __max_stdreal Ifx__max_stdreal
1303 #endif
1304
1305 #ifndef __saturate_stdreal
1306 #define __saturate_stdreal Ifx__saturate_stdreal
1307 #endif
1308
1309 #ifndef __neqf
1310 #define __neqf Ifx__neqf
1311 #endif
1312
1313 #ifndef __leqf
1314 #define __leqf Ifx__leqf
1315 #endif
1316
1317 #ifndef __geqf
1318 #define __geqf Ifx__geqf
1319 #endif
1320
1321 #ifndef __clssf
1322 #define __clssf Ifx__clssf
1323 #endif
1324
1325 #ifndef __fract_to_float
1326 #define __fract_to_float Ifx__fract_to_float
1327 #endif
1328
1329 #ifndef __float_to_fract
1330 #define __float_to_fract Ifx__float_to_fract
1331 #endif
1332
1333 #ifndef __getfract
1334 #define __getfract Ifx__getfract
1335 #endif
1336
1337 #ifndef __mac_r_sf
1338 #define __mac_r_sf Ifx__mac_r_sf
1339 #endif
1340
1341 #ifndef __mac_sf
1342 #define __mac_sf Ifx__mac_sf
1343 #endif
1344
1345 #ifndef __mulfractfract
1346 #define __mulfractfract Ifx__mulfractfract
1347 #endif
1348
1349 #ifndef __mulfractlong
1350 #define __mulfractlong Ifx__mulfractlong
1351 #endif
1352
1353 #ifndef __round16
1354 #define __round16 Ifx__round16
1355 #endif
1356
1357 #ifndef __fract_to_sfract
1358 #define __fract_to_sfract Ifx__fract_to_sfract
1359 #endif
1360
1361 #ifndef __float_to_sfract
1362 #define __float_to_sfract Ifx__float_to_sfract
1363 #endif
1364
1365 #ifndef __s16_to_sfract
1366 #define __s16_to_sfract Ifx__s16_to_sfract
1367 #endif
1368
1369 #ifndef __sfract_to_s16
1370 #define __sfract_to_s16 Ifx__sfract_to_s16
1371 #endif
1372
1373 #ifndef __sfract_to_u16
1374 #define __sfract_to_u16 Ifx__sfract_to_u16
1375 #endif
1376
1377 #ifndef __shaaccum
1378 #define __shaaccum Ifx__shaaccum
1379 #endif
1380
1381 #ifndef __shafracts
1382 #define __shafracts Ifx__shafracts
1383 #endif
1384
1385 #ifndef __shasfracts
1386 #define __shasfracts Ifx__shasfracts
1387 #endif
1388
1389 #ifndef __u16_to_sfract
1390 #define __u16_to_sfract Ifx__u16_to_sfract
1391 #endif
1392
1393 #ifndef __extr
1394 #define __extr Ifx__extr
1395 #endif
1396
1397 #ifndef __extru
1398 #define __extru Ifx__extru
1399 #endif
1400
1401 #ifndef __getbit
1402 #define __getbit Ifx__getbit
1403 #endif
1404
1405 #ifndef __insert
1406 #define __insert Ifx__insert
1407 #endif
1408
1409 #ifndef __putbit
1410 #define __putbit Ifx__putbit
1411 #endif
1412
1413 #ifndef __cacheawi
1414 #define __cacheawi Ifx__cacheawi
1415 #endif
1416
1417 #ifndef __cacheiwi
1418 #define __cacheiwi Ifx__cacheiwi
1419 #endif
1420
1421 #ifndef __cacheawi_bo_post_inc
1422 #define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
1423 #endif
1424
1425 #ifndef __mulsc
1426 #define __mulsc Ifx__mulsc
1427 #endif
1428
1429 #ifndef __rol
1430 #define __rol Ifx__rol
1431 #endif
1432
1433 #ifndef __ror
1434 #define __ror Ifx__ror
1435 #endif
1436
1437 #ifndef __extractbyte1
1438 #define __extractbyte1 Ifx__extractbyte1
1439 #endif
1440
1441 #ifndef __extractbyte2
1442 #define __extractbyte2 Ifx__extractbyte2
1443 #endif
1444
1445 #ifndef __extractbyte3
1446 #define __extractbyte3 Ifx__extractbyte3
1447 #endif
1448
1449 #ifndef __extractbyte4
1450 #define __extractbyte4 Ifx__extractbyte4
1451 #endif
1452
1453 #ifndef __extracthw1
1454 #define __extracthw1 Ifx__extracthw1
1455 #endif
1456
1457 #ifndef __extracthw2
1458 #define __extracthw2 Ifx__extracthw2
1459 #endif
1460
1461 #ifndef __extractubyte1
1462 #define __extractubyte1 Ifx__extractubyte1
1463 #endif
1464
1465 #ifndef __extractubyte2
1466 #define __extractubyte2 Ifx__extractubyte2
1467 #endif
1468
1469 #ifndef __extractubyte3
1470 #define __extractubyte3 Ifx__extractubyte3
1471 #endif
1472
1473 #ifndef __extractubyte4
1474 #define __extractubyte4 Ifx__extractubyte4
1475 #endif
1476
1477 #ifndef __extractuhw1
1478 #define __extractuhw1 Ifx__extractuhw1
1479 #endif
1480
1481 #ifndef __extractuhw2
1482 #define __extractuhw2 Ifx__extractuhw2
1483 #endif
1484
1485 #ifndef __getbyte1
1486 #define __getbyte1 Ifx__getbyte1
1487 #endif
1488
1489 #ifndef __getbyte2
1490 #define __getbyte2 Ifx__getbyte2
1491 #endif
1492
1493 #ifndef __getbyte3
1494 #define __getbyte3 Ifx__getbyte3
1495 #endif
1496
1497 #ifndef __getbyte4
1498 #define __getbyte4 Ifx__getbyte4
1499 #endif
1500
1501 #ifndef __gethw1
1502 #define __gethw1 Ifx__gethw1
1503 #endif
1504
1505 #ifndef __gethw2
1506 #define __gethw2 Ifx__gethw2
1507 #endif
1508
1509 #ifndef __getubyte1
1510 #define __getubyte1 Ifx__getubyte1
1511 #endif
1512
1513 #ifndef __getubyte2
1514 #define __getubyte2 Ifx__getubyte2
1515 #endif
1516
1517 #ifndef __getubyte3
1518 #define __getubyte3 Ifx__getubyte3
1519 #endif
1520
1521 #ifndef __getubyte4
1522 #define __getubyte4 Ifx__getubyte4
1523 #endif
1524
1525 #ifndef __getuhw1
1526 #define __getuhw1 Ifx__getuhw1
1527 #endif
1528
1529 #ifndef __getuhw2
1530 #define __getuhw2 Ifx__getuhw2
1531 #endif
1532
1533 #ifndef __initpackb
1534 #define __initpackb Ifx__initpackb
1535 #endif
1536
1537 #ifndef __initpackbl
1538 #define __initpackbl Ifx__initpackbl
1539 #endif
1540
1541 #ifndef __initpackhw
1542 #define __initpackhw Ifx__initpackhw
1543 #endif
1544
1545 #ifndef __initpackhwl
1546 #define __initpackhwl Ifx__initpackhwl
1547 #endif
1548
1549 #ifndef __initupackb
1550 #define __initupackb Ifx__initupackb
1551 #endif
1552
1553 #ifndef __initupackhw
1554 #define __initupackhw Ifx__initupackhw
1555 #endif
1556
1557 #ifndef __insertbyte1
1558 #define __insertbyte1 Ifx__insertbyte1
1559 #endif
1560
1561 #ifndef __insertbyte2
1562 #define __insertbyte2 Ifx__insertbyte2
1563 #endif
1564
1565 #ifndef __insertbyte3
1566 #define __insertbyte3 Ifx__insertbyte3
1567 #endif
1568
1569 #ifndef __insertbyte4
1570 #define __insertbyte4 Ifx__insertbyte4
1571 #endif
1572
1573 #ifndef __insertubyte1
1574 #define __insertubyte1 Ifx__insertubyte1
1575 #endif
1576
1577 #ifndef __insertubyte2
1578 #define __insertubyte2 Ifx__insertubyte2
1579 #endif
1580
1581 #ifndef __insertubyte3
1582 #define __insertubyte3 Ifx__insertubyte3
1583 #endif
1584
1585 #ifndef __insertubyte4
1586 #define __insertubyte4 Ifx__insertubyte4
1587 #endif
1588
1589 #ifndef __inserthw1
1590 #define __inserthw1 Ifx__inserthw1
1591 #endif
1592
1593 #ifndef __inserthw2
1594 #define __inserthw2 Ifx__inserthw2
1595 #endif
1596
1597 #ifndef __insertuhw1
1598 #define __insertuhw1 Ifx__insertuhw1
1599 #endif
1600
1601 #ifndef __insertuhw2
1602 #define __insertuhw2 Ifx__insertuhw2
1603 #endif
1604
1605 #ifndef __setbyte1
1606 #define __setbyte1 Ifx__setbyte1
1607 #endif
1608
1609 #ifndef __setbyte2
1610 #define __setbyte2 Ifx__setbyte2
1611 #endif
1612
1613 #ifndef __setbyte3
1614 #define __setbyte3 Ifx__setbyte3
1615 #endif
1616
1617 #ifndef __setbyte4
1618 #define __setbyte4 Ifx__setbyte4
1619 #endif
1620
1621 #ifndef __sethw1
1622 #define __sethw1 Ifx__sethw1
1623 #endif
1624
1625 #ifndef __sethw2
1626 #define __sethw2 Ifx__sethw2
1627 #endif
1628
1629 #ifndef __setubyte1
1630 #define __setubyte1 Ifx__setubyte1
1631 #endif
1632
1633 #ifndef __setubyte2
1634 #define __setubyte2 Ifx__setubyte2
1635 #endif
1636
1637 #ifndef __setubyte3
1638 #define __setubyte3 Ifx__setubyte3
1639 #endif
1640
1641 #ifndef __setubyte4
1642 #define __setubyte4 Ifx__setubyte4
1643 #endif
1644
1645 #ifndef __setuhw1
1646 #define __setuhw1 Ifx__setuhw1
1647 #endif
1648
1649 #ifndef __setuhw2
1650 #define __setuhw2 Ifx__setuhw2
1651 #endif
1652
1653 #ifndef __ldmst
1654 #define __ldmst Ifx__ldmst
1655 #endif
1656
1657 #ifndef __nops
1658 #define __nops Ifx__nops
1659 #endif
1660
1661 #ifndef __swap
1662 #define __swap Ifx__swap
1663 #endif
1664
1665 #if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
1666 #define NOP Ifx__NOP
1667 #endif
1668
1669 #ifndef __setareg
1670 #define __setareg Ifx__setareg
1671 #endif
1672
1673 #ifndef __stopPerfCounters
1674 #define __stopPerfCounters Ifx__stopPerfCounters
1675 #endif
1676
1677 #ifndef __cmpAndSwap
1678 #define __cmpAndSwap Ifx__cmpAndSwap
1679 #endif
1680
1681 #ifndef __fixpoint_to_float32
1682 #define __fixpoint_to_float32 Ifx__fixpoint_to_float32
1683 #endif
1684
1685 #ifndef __getA11
1686 #define __getA11 Ifx__getA11
1687 #endif
1688
1689 #ifndef __setStackPointer
1690 #define __setStackPointer Ifx__setStackPointer
1691 #endif
1692
1693 #ifndef __popcnt
1694 #define __popcnt Ifx__popcnt
1695 #endif
1696
1697 #ifndef __cacheai
1698 #define __cacheai Ifx__cacheai
1699 #endif
1700
1701 #endif
1702 /******************************************************************************/
1703 /* *INDENT-ON* */
1704 /******************************************************************************/
1705 #endif /* IFXCPU_INTRINSICSGHS_H */
Ifx__ldmst
IFX_INLINE void Ifx__ldmst(volatile void *address, uint32 mask, uint32 value)
Definition: IfxCpu_IntrinsicsGhs.h:1046
Ifx__sethw2
IFX_INLINE void Ifx__sethw2(__packhw *a, sint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:966
Ifx__inserthw2
IFX_INLINE __packhw Ifx__inserthw2(__packhw a, sint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:886
Ifx__mulfractlong
IFX_INLINE long Ifx__mulfractlong(fract a, long b)
Definition: IfxCpu_IntrinsicsGhs.h:242
Ifx__inserthw1
IFX_INLINE __packhw Ifx__inserthw1(__packhw a, sint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:876
Ifx__fract_to_sfract
#define Ifx__fract_to_sfract
Definition: IfxCpu_IntrinsicsGhs.h:261
Ifx__getubyte2
IFX_INLINE uint8 Ifx__getubyte2(__upackb *a)
Definition: IfxCpu_IntrinsicsGhs.h:683
Ifx__shafracts
IFX_INLINE fract Ifx__shafracts(fract a, sint32 b)
Definition: IfxCpu_IntrinsicsGhs.h:320
Ifx__extractbyte1
IFX_INLINE sint8 Ifx__extractbyte1(__packb a)
Definition: IfxCpu_IntrinsicsGhs.h:483
Ifx__mulsc
IFX_INLINE sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
Definition: IfxCpu_IntrinsicsGhs.h:445
__packb
long __packb
Definition: Ifx_TypesDcc.h:47
Ifx__insertbyte4
IFX_INLINE __packb Ifx__insertbyte4(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:826
Ifx__setStackPointer
IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
Definition: IfxCpu_IntrinsicsGhs.h:1141
Ifx__extractbyte3
IFX_INLINE sint8 Ifx__extractbyte3(__packb a)
Definition: IfxCpu_IntrinsicsGhs.h:503
Ifx__insertuhw2
IFX_INLINE __upackhw Ifx__insertuhw2(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:906
Ifx__initpackhwl
IFX_INLINE __packhw Ifx__initpackhwl(long a)
Definition: IfxCpu_IntrinsicsGhs.h:767
Ifx__insertubyte4
IFX_INLINE __upackb Ifx__insertubyte4(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:866
Ifx__insertbyte1
IFX_INLINE __packb Ifx__insertbyte1(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:796
Ifx__setubyte3
IFX_INLINE void Ifx__setubyte3(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:996
Ifx__ror
IFX_INLINE uint32 Ifx__ror(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsGhs.h:465
sfract
short sfract
Definition: Ifx_TypesDcc.h:45
Ifx__jump_and_link
IFX_INLINE void Ifx__jump_and_link(void(*fun)(void))
Definition: IfxCpu_IntrinsicsGhs.h:64
Ifx__float_to_fract
IFX_INLINE fract Ifx__float_to_fract(float a)
Definition: IfxCpu_IntrinsicsGhs.h:193
Ifx__insertubyte3
IFX_INLINE __upackb Ifx__insertubyte3(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:856
Ifx__insert
IFX_INLINE sint32 Ifx__insert(sint32 a, sint32 b, sint32 p, const sint32 w)
Definition: IfxCpu_IntrinsicsGhs.h:390
__asm__
#define __asm__
Definition: Ifx_TypesTasking.h:45
Ifx__gethw2
IFX_INLINE sint16 Ifx__gethw2(__packhw *a)
Definition: IfxCpu_IntrinsicsGhs.h:661
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx__extractuhw2
IFX_INLINE uint16 Ifx__extractuhw2(__upackhw a)
Definition: IfxCpu_IntrinsicsGhs.h:593
float32
float float32
Definition: Platform_Types.h:170
Ifx__getubyte1
IFX_INLINE uint8 Ifx__getubyte1(__upackb *a)
Definition: IfxCpu_IntrinsicsGhs.h:672
Ifx__jumpToFunctionWithLink
IFX_INLINE void Ifx__jumpToFunctionWithLink(void(*fun)(void))
Definition: IfxCpu_IntrinsicsGhs.h:96
IfxCpu_calculateCrc32
IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
Definition: IfxCpu_IntrinsicsGhs.h:1146
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesDcc.h:50
Ifx__mac_r_sf
IFX_INLINE sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsGhs.h:211
Ifx__getDataParamRet
IFX_INLINE unsigned int Ifx__getDataParamRet(void)
Definition: IfxCpu_IntrinsicsGhs.h:79
Ifx__insertubyte2
IFX_INLINE __upackb Ifx__insertubyte2(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:846
Ifx__extractbyte2
IFX_INLINE sint8 Ifx__extractbyte2(__packb a)
Definition: IfxCpu_IntrinsicsGhs.h:493
Ifx__moveToDataParamRet
IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
Definition: IfxCpu_IntrinsicsGhs.h:74
Ifx__getbyte2
IFX_INLINE sint8 Ifx__getbyte2(__packb *a)
Definition: IfxCpu_IntrinsicsGhs.h:615
Ifx__insertbyte2
IFX_INLINE __packb Ifx__insertbyte2(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:806
Ifx__sethw1
IFX_INLINE void Ifx__sethw1(__packhw *a, sint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:956
Ifx__non_return_call
#define Ifx__non_return_call(fun)
Definition: IfxCpu_IntrinsicsGhs.h:60
Ifx__u16_to_sfract
IFX_INLINE sfract Ifx__u16_to_sfract(uint16 a)
Definition: IfxCpu_IntrinsicsGhs.h:340
Ifx__fixpoint_to_float32
IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
Convert a fixpoint value to float32.
Definition: IfxCpu_IntrinsicsGhs.h:1126
Ifx__float_to_sfract
IFX_INLINE sfract Ifx__float_to_sfract(float a)
Definition: IfxCpu_IntrinsicsGhs.h:265
Ifx__initpackhw
IFX_INLINE __packhw Ifx__initpackhw(sint16 a, sint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:757
Ifx__setbyte4
IFX_INLINE void Ifx__setbyte4(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:946
Ifx__setbyte3
IFX_INLINE void Ifx__setbyte3(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:936
sint16
short sint16
Definition: Platform_Types.h:129
Ifx__gethw1
IFX_INLINE sint16 Ifx__gethw1(__packhw *a)
Definition: IfxCpu_IntrinsicsGhs.h:651
Ifx__round16
IFX_INLINE sfract Ifx__round16(fract a)
Definition: IfxCpu_IntrinsicsGhs.h:251
Ifx__setubyte1
IFX_INLINE void Ifx__setubyte1(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:976
Ifx__sfract_to_u16
IFX_INLINE uint16 Ifx__sfract_to_u16(sfract a)
Definition: IfxCpu_IntrinsicsGhs.h:293
Ifx__initupackb
IFX_INLINE __upackb Ifx__initupackb(uint32 a, uint32 b, uint32 c, uint32 d)
Definition: IfxCpu_IntrinsicsGhs.h:774
Ifx__shasfracts
IFX_INLINE sfract Ifx__shasfracts(sfract a, sint32 b)
Definition: IfxCpu_IntrinsicsGhs.h:329
__packhw
long __packhw
Definition: Ifx_TypesDcc.h:49
Ifx__extractubyte4
IFX_INLINE uint8 Ifx__extractubyte4(__upackb a)
Definition: IfxCpu_IntrinsicsGhs.h:573
fract
long fract
Definition: Ifx_TypesDcc.h:44
Ifx__moveToAddrParam0
IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
Definition: IfxCpu_IntrinsicsGhs.h:86
Ifx__getubyte4
IFX_INLINE uint8 Ifx__getubyte4(__upackb *a)
Definition: IfxCpu_IntrinsicsGhs.h:705
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
laccum
long long laccum
Definition: Ifx_TypesDcc.h:46
Ifx__cacheawi_bo_post_inc
IFX_INLINE uint8 * Ifx__cacheawi_bo_post_inc(uint8 *p)
Definition: IfxCpu_IntrinsicsGhs.h:435
Ifx__extractubyte3
IFX_INLINE uint8 Ifx__extractubyte3(__upackb a)
Definition: IfxCpu_IntrinsicsGhs.h:563
Ifx__getbyte3
IFX_INLINE sint8 Ifx__getbyte3(__packb *a)
Definition: IfxCpu_IntrinsicsGhs.h:627
Ifx__setubyte4
IFX_INLINE void Ifx__setubyte4(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:1006
IfxCpu_getRandomVal
IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Definition: IfxCpu_IntrinsicsGhs.h:1158
Ifx__extractbyte4
IFX_INLINE sint8 Ifx__extractbyte4(__packb a)
Definition: IfxCpu_IntrinsicsGhs.h:513
Ifx__extractubyte2
IFX_INLINE uint8 Ifx__extractubyte2(__upackb a)
Definition: IfxCpu_IntrinsicsGhs.h:553
Ifx__jumpToFunction
IFX_INLINE void Ifx__jumpToFunction(void(*fun)(void))
Definition: IfxCpu_IntrinsicsGhs.h:91
__upackb
unsigned long __upackb
Definition: Ifx_TypesDcc.h:48
Ifx__extru
IFX_INLINE uint32 Ifx__extru(uint32 a, uint32 p, uint32 w)
Definition: IfxCpu_IntrinsicsGhs.h:369
Ifx__getA11
IFX_INLINE void * Ifx__getA11(void)
Definition: IfxCpu_IntrinsicsGhs.h:1134
Ifx__setbyte1
IFX_INLINE void Ifx__setbyte1(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:916
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx__getbyte4
IFX_INLINE sint8 Ifx__getbyte4(__packb *a)
Definition: IfxCpu_IntrinsicsGhs.h:639
Ifx__shaaccum
__asm__ laccum Ifx__shaaccum(laccum a, sint32 b)
Definition: IfxCpu_IntrinsicsGhs.h:303
Ifx__cacheai
IFX_INLINE void Ifx__cacheai(uint8 *p)
Definition: IfxCpu_IntrinsicsGhs.h:1185
Ifx__insertubyte1
IFX_INLINE __upackb Ifx__insertubyte1(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:836
Ifx__cacheawi
IFX_INLINE void Ifx__cacheawi(uint8 *p)
Definition: IfxCpu_IntrinsicsGhs.h:421
Ifx__jumpBackToLink
IFX_INLINE void Ifx__jumpBackToLink(void)
Definition: IfxCpu_IntrinsicsGhs.h:101
Ifx__swap
IFX_INLINE uint32 Ifx__swap(void *place, uint32 value)
Definition: IfxCpu_IntrinsicsGhs.h:1063
Ifx__s16_to_sfract
IFX_INLINE sfract Ifx__s16_to_sfract(sint16 a)
Definition: IfxCpu_IntrinsicsGhs.h:273
Ifx__getuhw2
IFX_INLINE uint16 Ifx__getuhw2(__upackhw *a)
Definition: IfxCpu_IntrinsicsGhs.h:727
Ifx__setuhw1
IFX_INLINE void Ifx__setuhw1(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:1016
Ifx__cmpAndSwap
IFX_INLINE unsigned int Ifx__cmpAndSwap(unsigned int volatile *address, unsigned int value, unsigned int condition)
This function is a implementation of a binary semaphore using compare and swap instruction.
Definition: IfxCpu_IntrinsicsGhs.h:1102
Ifx__fract_to_float
IFX_INLINE float Ifx__fract_to_float(fract a)
Definition: IfxCpu_IntrinsicsGhs.h:184
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx__insertuhw1
IFX_INLINE __upackhw Ifx__insertuhw1(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:896
Ifx__extractubyte1
IFX_INLINE uint8 Ifx__extractubyte1(__upackb a)
Definition: IfxCpu_IntrinsicsGhs.h:543
Ifx__setuhw2
IFX_INLINE void Ifx__setuhw2(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:1026
Ifx__getbyte1
IFX_INLINE sint8 Ifx__getbyte1(__packb *a)
Definition: IfxCpu_IntrinsicsGhs.h:603
Ifx__initpackbl
IFX_INLINE __packb Ifx__initpackbl(long a)
Definition: IfxCpu_IntrinsicsGhs.h:750
Ifx__initpackb
IFX_INLINE __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
Definition: IfxCpu_IntrinsicsGhs.h:738
Ifx__clssf
IFX_INLINE sint16 Ifx__clssf(sfract a)
Definition: IfxCpu_IntrinsicsGhs.h:174
sint32
long sint32
Definition: Platform_Types.h:134
Ifx__extractuhw1
IFX_INLINE uint16 Ifx__extractuhw1(__upackhw a)
Definition: IfxCpu_IntrinsicsGhs.h:583
Ifx__mulfractfract
IFX_INLINE long Ifx__mulfractfract(fract a, fract b)
Definition: IfxCpu_IntrinsicsGhs.h:233
Ifx__setbyte2
IFX_INLINE void Ifx__setbyte2(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:926
Ifx__extracthw2
IFX_INLINE sint16 Ifx__extracthw2(__packhw a)
Definition: IfxCpu_IntrinsicsGhs.h:533
Ifx__mac_sf
IFX_INLINE sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsGhs.h:222
Ifx__extracthw1
IFX_INLINE sint16 Ifx__extracthw1(__packhw a)
Definition: IfxCpu_IntrinsicsGhs.h:523
Ifx__rol
IFX_INLINE uint32 Ifx__rol(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsGhs.h:456
Ifx__initupackhw
IFX_INLINE __upackhw Ifx__initupackhw(uint16 a, uint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:786
Ifx__getfract
IFX_INLINE fract Ifx__getfract(laccum a)
Definition: IfxCpu_IntrinsicsGhs.h:202
Ifx__sfract_to_s16
IFX_INLINE sint16 Ifx__sfract_to_s16(sfract a)
Definition: IfxCpu_IntrinsicsGhs.h:283
Ifx__insertbyte3
IFX_INLINE __packb Ifx__insertbyte3(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:816
Ifx__cacheiwi
IFX_INLINE void Ifx__cacheiwi(uint8 *p)
Definition: IfxCpu_IntrinsicsGhs.h:427
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx__setubyte2
IFX_INLINE void Ifx__setubyte2(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:986
sint8
signed char sint8
Definition: Platform_Types.h:125
Ifx__getubyte3
IFX_INLINE uint8 Ifx__getubyte3(__upackb *a)
Definition: IfxCpu_IntrinsicsGhs.h:694
voidfunc
void(* voidfunc)()
Definition: IfxCpu_IntrinsicsGhs.h:56
Ifx__extr
IFX_INLINE sint32 Ifx__extr(sint32 a, uint32 p, uint32 w)
Definition: IfxCpu_IntrinsicsGhs.h:357
Ifx__nops
IFX_INLINE void Ifx__nops(void *cnt)
Definition: IfxCpu_IntrinsicsGhs.h:1054
Ifx__getuhw1
IFX_INLINE uint16 Ifx__getuhw1(__upackhw *a)
Definition: IfxCpu_IntrinsicsGhs.h:716
Ifx__stopPerfCounters
IFX_INLINE void Ifx__stopPerfCounters(void)
Definition: IfxCpu_IntrinsicsGhs.h:1088
Ifx__moveToDataParam0
IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
Definition: IfxCpu_IntrinsicsGhs.h:69


iLLD_TC26B: IfxCpu_IntrinsicsGnuc2G.h Source File

  • Cpu
  • Std
IfxCpu_IntrinsicsGnuc2G.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_IntrinsicsGnuc.h
3 *
4 * \version iLLD_1_0_1_12_0
5 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup IfxLld_Cpu_Intrinsics_Gnuc Intrinsics for GNU compiler
41 * \ingroup IfxLld_Cpu_Intrinsics
42 *
43 */
44
45 #ifndef IFXCPU_INTRINSICSGNUC_H
46 #define IFXCPU_INTRINSICSGNUC_H
47
48 /* old style intrinsics handling for AGENtiX environment */
49 #if defined(SCTB_EMBEDDED)
50 # define IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 0
51 #else
52 # define IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 1
53 #endif
54
55 /******************************************************************************/
56 #include "Ifx_Types.h"
57
58 #if IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
59 #include "machine/intrinsics.h"
60 #endif
61
62 /******************************************************************************/
63 /* *INDENT-OFF* */
64 #define STRINGIFY(x) #x
65
66 /** Function call without return
67 */
68 #define Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
69
70 /** Jump and link
71 */
72 IFX_INLINE void Ifx__jump_and_link(void (*fun)(void))
73 {
74 __asm__ volatile ("jli %0"::"a"(fun));
75 }
76
77 IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
78 {
79 __asm__ volatile ("mov\t %%d4, %0"::"d"(var));
80 }
81
82 IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
83 {
84 __asm__ volatile ("mov\t %%d2, %0"::"d"(var));
85 }
86
87 IFX_INLINE unsigned int Ifx__getDataParamRet(void)
88 {
89 unsigned int var;
90 __asm__ volatile (" mov\t %0, %%d2":"=d"(var));
91 return var;
92 }
93
94 IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
95 {
96 __asm__ volatile ("mov.aa\t %%a4, %0"::"a"(var));
97 }
98
99 IFX_INLINE void Ifx__jumpToFunction(const void *fun)
100 {
101 Ifx__non_return_call(fun);
102 }
103
104 IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
105 {
106 Ifx__jump_and_link((void (*)(void))fun);
107 }
108
109 IFX_INLINE void Ifx__jumpBackToLink(void)
110 {
111 __asm__ volatile ("ji %a11");
112 }
113 /** \defgroup IfxLld_Cpu_Intrinsics_Gnuc_any_type Cross type arithmetic operation
114 *
115 * Macro compatible with float, fix point, signed integer and unsigned integer
116 *
117 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
118 * \{
119 */
120 #define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
121 #define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
122 #define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
123 #define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
124 /** \} */
125
126 /** \defgroup IfxLld_Cpu_Intrinsics_Gnuc_singed_integer Signed integer operation
127 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
128 * \{
129 */
130 #define Ifx__saturate(X,Min,Max) ( Ifx__min(Ifx__max(X, Min), Max) )
131 /** \} */
132
133 /** \defgroup IfxLld_Cpu_Intrinsics_Gnuc_unsinged_integer Unsigned integer operation
134 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
135 * \{
136 */
137 #define Ifx__saturateu(X,Min,Max) ( Ifx__minu(Ifx__maxu(X, Min), Max) )
138 /** \} */
139
140 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucmin_max Minimum and Maximum of (sint16) Integers
141 These intrinsic functions return the minimum or maximum of a sint16, uint16 or sint16
142 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
143 * \{
144 */
145
146 /** Return maximum of two integers
147 */
148 IFX_INLINE sint32 Ifx__max(sint32 a, sint32 b)
149 {
150 sint32 res;
151 __asm__ volatile ("max %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
152 return res;
153 }
154
155 /** Return maximum of two sint16
156 */
157 IFX_INLINE sint32 Ifx__maxs(sint16 a, sint16 b)
158 {
159 sint32 res;
160 __asm__ volatile ("max.h %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
161 return res;
162 }
163 /** Return maximum of two unsigned integers
164 */
165 IFX_INLINE uint32 Ifx__maxu(uint32 a, uint32 b)
166 {
167 uint32 res;
168 __asm__ volatile ("max.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
169 return res;
170 }
171
172 /** Return minimum of two integers
173 */
174 IFX_INLINE sint32 Ifx__min(sint32 a, sint32 b)
175 {
176 sint32 res;
177 __asm__ volatile ("min %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
178 return res;
179 }
180
181 /** Return minimum of two sint16
182 */
183 IFX_INLINE sint16 Ifx__mins(sint16 a, sint16 b)
184 {
185 sint16 res;
186 __asm__ volatile ("min.h %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
187 return res;
188 }
189
190 /** Return minimum of two unsigned integers
191 */
192 IFX_INLINE uint32 Ifx__minu(uint32 a, uint32 b)
193 {
194 uint32 res;
195 __asm__ volatile ("min.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
196 return res;
197 }
198
199 /** \} */
200
201 /** \defgroup intrinsicsgnuc_float Floating point operation
202 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
203 * \{
204 */
205
206 #define Ifx__sqrf(X) ((X) * (X))
207 #define Ifx__sqrtf(X) sqrtf(X)
208 #define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
209
210 #define Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
211 #define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
212 #define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
213 #define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
214 #define Ifx__saturatef(X,Min,Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
215 #define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
216
217 #define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
218 #define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
219 #define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
220 #define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
221
222 #define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
223 #define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
224 #define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
225 /** \} */
226
227 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucfractional Fractional Arithmetic Support
228 The next table provides an overview of intrinsic functions to convert fractional values. Note that the
229 TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
230 need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
231 compiler does support these functions.
232 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
233 * \{
234 */
235
236 /** Count the consecutive number of bits that have the same value as bit 15 of an sfract
237 */
238 IFX_INLINE sint16 Ifx__clssf(sfract a)
239 {
240 sint16 res;
241 __asm__ volatile ("sh %1,%1,16 \n\
242 cls %0,%1":"=d"(res):"d"(a):"memory");
243 return res;
244 }
245
246 /** Convert fract to float
247 */
248 IFX_INLINE float Ifx__fract_to_float(fract a)
249 {
250 float res;
251 __asm__ volatile ("q31tof %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
252 return res;
253 }
254
255 /** Convert float to fract
256 */
257 IFX_INLINE fract Ifx__float_to_fract(float a)
258 {
259 fract res;
260 __asm__ volatile ("ftoq31 %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
261 return res;
262 }
263
264 /** Convert fract to sfract
265 */
266 IFX_INLINE sfract Ifx__fract_to_sfract(fract a)
267 {
268 sfract res;
269 __asm__ volatile ("mov.u %0,0x8000 \n\
270 adds %0,%1 \n\
271 extr %0,%0,0x10,0x10 "
272 :"=&d"(res):"d"(a):"memory");
273 return res;
274 }
275
276 /** Convert float to sfract
277 */
278 IFX_INLINE sfract Ifx__float_to_sfract(float a)
279 {
280 fract tmp = Ifx__float_to_fract(a);
281 return Ifx__fract_to_sfract(tmp);
282 }
283
284 /** Convert laccum to fract
285 */
286 IFX_INLINE fract Ifx__getfract(laccum a)
287 {
288 fract res;
289 __asm__ volatile ("dextr %0,%H1,%L1,0x11":"=&d" (res):"d" (a):"memory");
290 return res;
291 }
292
293 /** Multiply-add with rounding. Returns the rounded result of ( a + b * c )
294 */
295 IFX_INLINE sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
296 {
297 sfract res;
298 __asm__ volatile ("sh %1,%1,16 \n\
299 maddrs.q %0,%1,%2L,%3L,1 \n\
300 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
301 return res;
302 }
303
304 /** Multiply-add sfract. Returns ( a + b * c )
305 */
306 IFX_INLINE sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
307 {
308 sfract res;
309 __asm__ volatile ("sh %1,%1,16 \n\
310 madds.q %0,%1,%2L,%3L,1 \n\
311 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
312 return res;
313 }
314
315 /** Integer part of the multiplication of a fract and a fract
316 */
317 IFX_INLINE long Ifx__mulfractfract(fract a, fract b)
318 {
319 long res;
320 __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
321 return res;
322 }
323
324 /** Integer part of the multiplication of a fract and a long
325 */
326 IFX_INLINE long Ifx__mulfractlong(fract a, long b)
327 {
328 long res;
329 __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
330 return res;
331 }
332
333 /** Convert fract to sfract
334 */
335 IFX_INLINE sfract Ifx__round16(fract a)
336 {
337 sfract res;
338 __asm__ volatile ("mov.u %0,0x8000 \n\
339 adds %0,%1 \n\
340 insert %0,%0,0,0,0x10 \n\
341 sh %0,%0,-16"
342 :"=&d"(res):"d"(a):"memory");
343 return res;
344 }
345
346 /** Convert signed sint16 to sfract
347 */
348 IFX_INLINE sfract Ifx__s16_to_sfract(sint16 a)
349 {
350 sfract res;
351 __asm__ volatile ("sh %0,%1,16 \n\
352 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
353 return res;
354 }
355
356 /** Convert sfract to sint16
357 */
358 IFX_INLINE sint16 Ifx__sfract_to_s16(sfract a)
359 {
360 sint16 res;
361 __asm__ volatile ("sh %1,%1,16 \n\
362 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
363 return res;
364 }
365
366 /** Convert sfract to uint16
367 */
368 IFX_INLINE uint16 Ifx__sfract_to_u16(sfract a)
369 {
370 uint16 res;
371 __asm__ volatile ("sh %1,%1,16 \n\
372 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
373 return res;
374 }
375
376 /** Left/right shift of an laccum
377 */
378 IFX_INLINE laccum Ifx__shaaccum(laccum a, sint32 b)
379 {
380 laccum res;
381 __asm__ volatile ("jge %2,0,0f \n\
382 sha %H0,%H1,%2 \n\
383 rsub %2,%2,0 \n\
384 dextr %L0,%H1,%L1,%2 \n\
385 j 1f \n\
386 0:dextr %H0,%H1,%L1,%2 \n\
387 sha %L0,%L1,%2 \n\
388 1:"
389 :"=d"(res):"d"(a), "d"(b):"memory");
390 return res;
391 }
392
393 /** Left/right shift of an fract
394 */
395 IFX_INLINE fract Ifx__shafracts(fract a, sint32 b)
396 {
397 fract res;
398 __asm__ volatile ("shas %0,%1,%2":"=d"(res):"d"(a), "d"(b):"memory");
399 return res;
400 }
401
402 /** Left/right shift of an sfract
403 */
404 IFX_INLINE sfract Ifx__shasfracts(sfract a, sint32 b)
405 {
406 sfract res;
407 __asm__ volatile ("shas %0,%1,%2":"=d"(res):"d"(a), "d"(b):"memory");
408 return res;
409 }
410
411 /** Convert uint16 to sfract
412 */
413 IFX_INLINE sfract Ifx__u16_to_sfract(uint16 a)
414 {
415 sfract res;
416 __asm__ volatile ("sh %0,%1,16 \n\
417 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
418 return res;
419 }
420
421 /** \} */
422
423 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucinsert Insert / Extract Bit-fields and Bits
424 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
425 * \{
426 */
427
428 /** Extract a bit-field (bit pos to bit pos+width) from value
429 */
430 IFX_INLINE sint32 Ifx__extr(sint32 a, uint32 p, uint32 w)
431 {
432 sint32 res;
433 __asm__ volatile ("mov %%d14,%2 \n\
434 mov %%d15,%3 \n\
435 extr %0,%1,%%e14"
436 : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
437 return res;
438 }
439
440 /** Same as __extr() but return bit-field as unsigned integer
441 */
442 IFX_INLINE uint32 Ifx__extru(uint32 a, uint32 p, uint32 w)
443 {
444 uint32 res;
445 __asm__ volatile ("mov %%d14,%2 \n\
446 mov %%d15,%3 \n\
447 extr.u %0,%1,%%e14"
448 : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
449 return res;
450 }
451
452 /** Load a single bit.
453 */
454 //#define __getbit(address,bitoffset ) __extru( *(address), bitoffset, 1 )
455 #define Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
456
457 /** Atomic load-modify-store.
458 */
459 #define Ifx__imaskldmst(address, value, bitoffset, bits) \
460 {long long tmp;\
461 __asm__("imask %A0,%1,%2,%3"\
462 :"=d"((long long)tmp)\
463 :"d"(value),"d"(bitoffset),"i"(bits): "memory");\
464 __asm__("ldmst [%0]0,%A1"::"a"(address),"d"(tmp): "memory");}
465
466 /** Return trg but replace trgbit by srcbit in src.
467 */
468 IFX_INLINE sint32 Ifx__ins(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
469 {
470 sint32 res;
471 __asm__ volatile ("ins.t %0,%1,%2,%3,%4":"=d"(res):"d"(trg), "i"(trgbit), "d"(src), "i"(srcbit));
472 return res;
473 }
474
475 /** Extract bit-field (width bits starting at bit 0) from src and insert it in trg at pos.
476 */
477 IFX_INLINE sint32 Ifx__insert(sint32 a, sint32 b, sint32 p, const sint32 w)
478 {
479 sint32 res;
480 __asm__ volatile ("mov %%d14,%3 \n\
481 mov %%d15,%4 \n\
482 insert %0,%1,%2,%%e14"
483 :"=d"(res):"d"(a), "d"(b), "d"(p), "d"(w):"d14", "d15");
484 return res;
485 }
486
487 /** Return trg but replace trgbit by inverse of srcbit in src.
488 */
489 IFX_INLINE sint32 Ifx__insn(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
490 {
491 sint32 res;
492 __asm__ volatile ("insn.t %0,%1,%2,%3,%4":"=d"(res):"d"(trg), "i"(trgbit), "d"(src), "i"(srcbit));
493 return res;
494 }
495
496 /** Store a single bit.
497 */
498 #define Ifx__putbit(value,address,bitoffset ) Ifx__imaskldmst(address, value, bitoffset,1)
499
500 /** \} */
501
502 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucinterrupt_handling Interrupt Handling
503 The next table provides an overview of the intrinsic functions to read or set interrupt handling.
504 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
505 * \{
506 */
507
508 #if !IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
509 /** Set CPU priority number [0..255] (or [0..1023] for TriCore 1.6.x) and enable interrupts immediately at function entry
510 */
511 #define Ifx__bisr(intlvl) __asm__ volatile ("bisr "#intlvl : : : "memory")
512 #endif
513
514 /** Disable interrupts. Only supported for TriCore1
515 */
516 #define Ifx__disable() __asm__ volatile ("disable" : : : "memory")
517
518 /** Disable interrupts and return previous interrupt state (enabled or disabled). Direct supported for TriCore1.6. Emulated on TC1.3.1
519 */
520 IFX_INLINE sint32 Ifx__disable_and_save(void)
521 {
522 sint32 res;
523 __asm__ volatile("disable %0":"=d"(res));
524 return res;
525 }
526
527 /** Enable interrupts immediately at function entry
528 */
529 #define Ifx__enable() __asm__ volatile ("enable" : : : "memory")
530
531 /** Restore interrupt state. Direct supported for TriCore1.6. Emulated on TC1.3.1
532 */
533 IFX_INLINE void Ifx__restore(sint32 ie)
534 {
535 __asm__ volatile ("restore %0"::"d"(ie));
536 }
537
538 #if !IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
539 /** Call a system call function number
540 */
541 #define Ifx__syscall(svcno) __tric_syscall(svcno)
542 #define Ifx__tric_syscall(svcno) __asm__ volatile ("syscall "STRINGIFY(svcno) : : : "memory")
543 #endif
544
545 /** \} */
546
547 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucmiscellaneous Miscellaneous Intrinsic Functions
548 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
549 * \{
550 */
551
552 /** Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].
553 */
554 IFX_INLINE void Ifx__cacheawi(uint8* p)
555 {
556 __asm__ volatile("cachea.wi [%0]0"::"a"(p));
557 }
558 /** Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].
559 */
560 IFX_INLINE void Ifx__cacheiwi(uint8* p)
561 {
562 __asm__ volatile("cachei.wi [%0]0"::"a"(p));
563 }
564
565 /** Write back and invalidate cache address \"p\" and return post incremented
566 * value of \"p\". Generates CACHEA.WI [Ab+].
567 */
568 IFX_INLINE uint8* Ifx__cacheawi_bo_post_inc(uint8* p)
569 {
570 __asm__ volatile("cachea.wi [%0+]0"::"a"(p));
571 return p;
572 }
573
574 /** Multiply two 32-bit numbers to an intermediate 64-bit result, and scale
575 * back the result to 32 bits. To scale back the result, 32 bits are extracted
576 * from the intermediate 64-bit result: bit 63-offset to bit 31-offset.
577 */
578 IFX_INLINE sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
579 {
580 sint32 res;
581 __asm__ volatile("mul %%e12,%1,%2 \n\
582 dextr %0,%%d13,%%d12,%3"
583 :"=d"(res):"d"(a), "d"(b), "d"(offset):"d12", "d13");
584 return res;
585 }
586
587 /** Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).
588 */
589 IFX_INLINE uint32 Ifx__rol(uint32 operand, uint32 count)
590 {
591 uint32 res;
592 __asm__ volatile("dextr %0,%1,%1,%2":"=d"(res):"d"(operand), "d"(count):"memory");
593 return res;
594 }
595
596 /** Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).
597 */
598 IFX_INLINE uint32 Ifx__ror(uint32 operand, uint32 count)
599 {
600 uint32 res;
601 __asm__ volatile("rsub %2,%2,0 \n\
602 dextr %0,%1,%1,%2"
603 :"=d"(res):"d"(operand), "d"(count):"memory");
604 return res;
605 }
606 /** \} */
607
608 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucpacked Packed Data Type Support
609 The next table provides an overview of the intrinsic functions for initialization of packed data type.
610 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
611 * \{
612 */
613
614 /** Absolute value of __packb
615 */
616 IFX_INLINE __packb Ifx__absb(__packb a)
617 {
618 __packb res;
619 __asm__ volatile ("abs.b %0,%1"
620 :"=d"(res):"d"(a):"memory");
621 return res;
622 }
623
624 /** Absolute value of __packhw
625 */
626 IFX_INLINE __packhw Ifx__absh(__packhw a)
627 {
628 __packhw res;
629 __asm__ volatile ("abs.h %0,%1"
630 :"=d"(res):"d"(a):"memory");
631 return res;
632 }
633
634 /** Absolute value of __packhw using saturation
635 */
636 IFX_INLINE __packhw Ifx__abssh(__packhw a)
637 {
638 __packb res;
639 __asm__ volatile ("abss.h %0,%1"
640 :"=d"(res):"d"(a):"memory");
641 return res;
642 }
643
644 /** Extract first byte from a __packb
645 */
646 IFX_INLINE sint8 Ifx__extractbyte1(__packb a)
647 {
648 sint8 res;
649 __asm__ volatile ("extr %0,%1,0,8"
650 :"=d"(res):"d"(a):"memory");
651 return res;
652 }
653
654 /** Extract second byte from a __packb
655 */
656 IFX_INLINE sint8 Ifx__extractbyte2(__packb a)
657 {
658 sint8 res;
659 __asm__ volatile ("extr %0,%1,8,8"
660 :"=d"(res):"d"(a):"memory");
661 return res;
662 }
663
664 /** Extract third byte from a __packb
665 */
666 IFX_INLINE sint8 Ifx__extractbyte3(__packb a)
667 {
668 sint8 res;
669 __asm__ volatile ("extr %0,%1,16,8"
670 :"=d"(res):"d"(a):"memory");
671 return res;
672 }
673
674 /** Extract fourth byte from a __packb
675 */
676 IFX_INLINE sint8 Ifx__extractbyte4(__packb a)
677 {
678 sint8 res;
679 __asm__ volatile ("extr %0,%1,24,8"
680 :"=d"(res):"d"(a):"memory");
681 return res;
682 }
683
684 /** Extract first sint16 from a __packhw
685 */
686 IFX_INLINE sint16 Ifx__extracthw1(__packhw a)
687 {
688 sint16 res;
689 __asm__ volatile ("extr %0,%1,0,16"
690 :"=d"(res):"d"(a):"memory");
691 return res;
692 }
693
694 /** Extract second sint16 from a __packhw
695 */
696 IFX_INLINE sint16 Ifx__extracthw2(__packhw a)
697 {
698 sint16 res;
699 __asm__ volatile ("extr %0,%1,16,16"
700 :"=d"(res):"d"(a):"memory");
701 return res;
702 }
703
704 /** Extract first uint8 from a __packb
705 */
706 IFX_INLINE uint8 Ifx__extractubyte1(__upackb a)
707 {
708 uint8 res;
709 __asm__ volatile ("extr %0,%1,0,8"
710 :"=d"(res):"d"(a):"memory");
711 return res;
712 }
713
714 /** Extract second uint8 from a __packb
715 */
716 IFX_INLINE uint8 Ifx__extractubyte2(__upackb a)
717 {
718 uint8 res;
719 __asm__ volatile ("extr %0,%1,8,8"
720 :"=d"(res):"d"(a):"memory");
721 return res;
722 }
723
724 /** Extract third uint8 from a __packb
725 */
726 IFX_INLINE uint8 Ifx__extractubyte3(__upackb a)
727 {
728 uint8 res;
729 __asm__ volatile ("extr %0,%1,16,8"
730 :"=d"(res):"d"(a):"memory");
731 return res;
732 }
733
734 /** Extract fourth uint8 from a __packb
735 */
736 IFX_INLINE uint8 Ifx__extractubyte4(__upackb a)
737 {
738 uint8 res;
739 __asm__ volatile ("extr %0,%1,24,8"
740 :"=d"(res):"d"(a):"memory");
741 return res;
742 }
743
744 /** Extract first uint16 from a __packhw
745 */
746 IFX_INLINE uint16 Ifx__extractuhw1(__upackhw a)
747 {
748 uint16 res;
749 __asm__ volatile ("extr %0,%1,0,16"
750 :"=d"(res):"d"(a):"memory");
751 return res;
752 }
753
754 /** Extract second uint16 from a __packhw
755 */
756 IFX_INLINE uint16 Ifx__extractuhw2(__upackhw a)
757 {
758 uint16 res;
759 __asm__ volatile ("extr %0,%1,16,16"
760 :"=d"(res):"d"(a):"memory");
761 return res;
762 }
763
764 /** Extract first byte from a __packb
765 */
766 IFX_INLINE sint8 Ifx__getbyte1(__packb* a)
767 {
768 sint8 res;
769 __asm__ volatile ("ld.w %0,[%1]0 \n\
770 extr %0,%0,0,8"
771 :"=d"(res):"a"(a):"memory");
772 return res;
773
774 }
775
776 /** Extract second byte from a __packb
777 */
778 IFX_INLINE sint8 Ifx__getbyte2(__packb* a)
779 {
780 sint8 res;
781 __asm__ volatile ("ld.w %0,[%1]0 \n\
782 extr %0,%0,8,8"
783 :"=d"(res):"a"(a):"memory");
784 return res;
785
786 }
787
788 /** Extract third byte from a __packb
789 */
790 IFX_INLINE sint8 Ifx__getbyte3(__packb* a)
791 {
792 sint8 res;
793 __asm__ volatile ("ld.w %0,[%1]0 \n\
794 extr %0,%0,16,8"
795 :"=d"(res):"a"(a):"memory");
796 return res;
797
798 }
799
800 /** Extract fourth byte from a __packb
801 */
802 IFX_INLINE sint8 Ifx__getbyte4(__packb* a)
803 {
804 sint8 res;
805 __asm__ volatile ("ld.w %0,[%1]0 \n\
806 extr %0,%0,24,8"
807 :"=d"(res):"a"(a):"memory");
808 return res;
809
810 }
811
812 /** Extract first sint16 from a __packhw
813 */
814 IFX_INLINE sint16 Ifx__gethw1(__packhw* a)
815 {
816 sint16 res;
817 __asm__ volatile ("ld.w %0,[%1]0 \n\
818 extr %0,%0,0,16"
819 :"=d"(res):"a"(a):"memory");
820 return res;
821 }
822 /** Extract second sint16 from a __packhw
823 */
824 IFX_INLINE sint16 Ifx__gethw2(__packhw* a)
825 {
826 sint16 res;
827 __asm__ volatile ("ld.w %0,[%1]0 \n\
828 extr %0,%0,16,16"
829 :"=d"(res):"a"(a):"memory");
830 return res;
831 }
832
833 /** Extract first uint8 from a __packb
834 */
835 IFX_INLINE uint8 Ifx__getubyte1(__upackb* a)
836 {
837 uint8 res;
838 __asm__ volatile ("ld.w %0,[%1]0 \n\
839 extr %0,%0,0,8"
840 :"=d"(res):"a"(a):"memory");
841 return res;
842 }
843
844 /** Extract second uint8 from a __packb
845 */
846 IFX_INLINE uint8 Ifx__getubyte2(__upackb* a)
847 {
848 uint8 res;
849 __asm__ volatile ("ld.w %0,[%1]0 \n\
850 extr %0,%0,8,8"
851 :"=d"(res):"a"(a):"memory");
852 return res;
853 }
854
855 /** Extract third uint8 from a __packb
856 */
857 IFX_INLINE uint8 Ifx__getubyte3(__upackb* a)
858 {
859 uint8 res;
860 __asm__ volatile ("ld.w %0,[%1]0 \n\
861 extr %0,%0,16,8"
862 :"=d"(res):"a"(a):"memory");
863 return res;
864 }
865
866 /** Extract fourth uint8 from a __packb
867 */
868 IFX_INLINE uint8 Ifx__getubyte4(__upackb* a)
869 {
870 uint8 res;
871 __asm__ volatile ("ld.w %0,[%1]0 \n\
872 extr %0,%0,24,8"
873 :"=d"(res):"a"(a):"memory");
874 return res;
875 }
876
877 /** Extract first uint16 from a __packhw
878 */
879 IFX_INLINE uint16 Ifx__getuhw1(__upackhw* a)
880 {
881 uint16 res;
882 __asm__ volatile ("ld.w %0,[%1]0 \n\
883 extr %0,%0,0,16"
884 :"=d"(res):"a"(a):"memory");
885 return res;
886 }
887
888 /** Extract second uint16 from a __packhw
889 */
890 IFX_INLINE uint16 Ifx__getuhw2(__upackhw* a)
891 {
892 uint16 res;
893 __asm__ volatile ("ld.w %0,[%1]0 \n\
894 extr %0,%0,16,16"
895 :"=d"(res):"a"(a):"memory");
896 return res;
897 }
898
899 /** Initialize __packb with four integers
900 */
901 IFX_INLINE __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
902 {
903 __packb res;
904 __asm__ volatile ("insert %3,%3,%4,8,8 \n\
905 insert %4,%1,%2,8,8 \n\
906 insert %0,%4,%3,16,16 "
907 :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
908 return res;
909 }
910
911 /** Initialize __packb with a long integer
912 */
913 IFX_INLINE __packb Ifx__initpackbl(long a)
914 {
915 return (__packb) a;
916 }
917
918 /** Initialize __packhw with two integers
919 */
920 IFX_INLINE __packhw Ifx__initpackhw(sint16 a, sint16 b)
921 {
922 __packhw res;
923 __asm__ volatile ("insert %0,%1,%2,16,16"
924 :"=d"(res):"d"(a), "d"(b):"memory");
925 return res;
926 }
927
928 /** Initialize __packhw with a long integer
929 */
930 IFX_INLINE __packhw Ifx__initpackhwl(long a)
931 {
932 return a;
933 }
934
935 /** Initialize __packb with four unsigned integers
936 */
937 IFX_INLINE __upackb Ifx__initupackb( uint32 a, uint32 b, uint32 c, uint32 d)
938 {
939 __upackb res;
940 __asm__ volatile ("insert %3,%3,%4,8,8 \n\
941 insert %1,%1,%2,8,8 \n\
942 insert %0,%1,%3,16,16"
943 :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
944 return res;
945 }
946
947 /** Initialize __packhw with two unsigned integers
948 */
949 IFX_INLINE __upackhw Ifx__initupackhw( uint16 a, uint16 b)
950 {
951 __upackhw res;
952 __asm__ volatile ("insert %0,%1,%2,16,16"
953 :"=d"(res):"d"(a), "d"(b):"memory");
954 return res;
955 }
956
957 /** Insert sint8 into first byte of a __packb
958 */
959 IFX_INLINE __packb Ifx__insertbyte1(__packb a, sint8 b)
960 {
961 __packb res;
962 __asm__ volatile ("insert %0,%1,%2,0,8"
963 :"=d"(res):"d"(a), "d"(b):"memory");
964 return res;
965 }
966
967 /** Insert sint8 into second byte of a __packb
968 */
969 IFX_INLINE __packb Ifx__insertbyte2(__packb a, sint8 b)
970 {
971 __packb res;
972 __asm__ volatile ("insert %0,%1,%2,8,8"
973 :"=d"(res):"d"(a), "d"(b):"memory");
974 return res;
975 }
976
977 /** Insert sint8 into third byte of a __packb
978 */
979 IFX_INLINE __packb Ifx__insertbyte3(__packb a, sint8 b)
980 {
981 __packb res;
982 __asm__ volatile ("insert %0,%1,%2,16,8"
983 :"=d"(res):"d"(a), "d"(b):"memory");
984 return res;
985 }
986
987 /** Insert sint8 into fourth byte of a __packb
988 */
989 IFX_INLINE __packb Ifx__insertbyte4(__packb a, sint8 b)
990 {
991 __packb res;
992 __asm__ volatile ("insert %0,%1,%2,24,8"
993 :"=d"(res):"d"(a), "d"(b):"memory");
994 return res;
995 }
996
997 /** Insert sint8 into first uint8 of a __packb
998 */
999 IFX_INLINE __upackb Ifx__insertubyte1( __upackb a, uint8 b)
1000 {
1001 __upackb res;
1002 __asm__ volatile ("insert %0,%1,%2,0,8"
1003 :"=d"(res):"d"(a), "d"(b):"memory");
1004 return res;
1005 }
1006
1007 /** Insert sint8 into second uint8 of a __packb
1008 */
1009 IFX_INLINE __upackb Ifx__insertubyte2( __upackb a, uint8 b)
1010 {
1011 __upackb res;
1012 __asm__ volatile ("insert %0,%1,%2,8,8"
1013 :"=d"(res):"d"(a), "d"(b):"memory");
1014 return res;
1015 }
1016
1017 /** Insert sint8 into third uint8 of a __packb
1018 */
1019 IFX_INLINE __upackb Ifx__insertubyte3( __upackb a, uint8 b)
1020 {
1021 __upackb res;
1022 __asm__ volatile ("insert %0,%1,%2,16,8"
1023 :"=d"(res):"d"(a), "d"(b):"memory");
1024 return res;
1025 }
1026
1027 /** Insert sint8 into fourth uint8 of a __packb
1028 */
1029 IFX_INLINE __upackb Ifx__insertubyte4( __upackb a, uint8 b)
1030 {
1031 __upackb res;
1032 __asm__ volatile ("insert %0,%1,%2,24,8"
1033 :"=d"(res):"d"(a), "d"(b):"memory");
1034 return res;
1035 }
1036
1037 /** Insert sint16 into first halfword of a __packhw
1038 */
1039 IFX_INLINE __packhw Ifx__inserthw1(__packhw a, sint16 b)
1040 {
1041 __packhw res;
1042 __asm__ volatile ("insert %0,%1,%2,0,16"
1043 :"=d"(res):"d"(a), "d"(b):"memory");
1044 return res;
1045 }
1046
1047 /** Insert sint16 into second halfword of a __packhw
1048 */
1049 IFX_INLINE __packhw Ifx__inserthw2(__packhw a, sint16 b)
1050 {
1051 __packhw res;
1052 __asm__ volatile ("insert %0,%1,%2,16,16"
1053 :"=d"(res):"d"(a), "d"(b):"memory");
1054 return res;
1055 }
1056
1057 /** Insert uint16 into first halfword of a __upackhw
1058 */
1059 IFX_INLINE __upackhw Ifx__insertuhw1( __upackhw a, uint16 b)
1060 {
1061 __upackhw res;
1062 __asm__ volatile ("insert %0,%1,%2,0,16"
1063 :"=d"(res):"d"(a), "d"(b):"memory");
1064 return res;
1065 }
1066
1067 /** Insert uint16 into second halfword of a __upackhw
1068 */
1069 IFX_INLINE __upackhw Ifx__insertuhw2( __upackhw a, uint16 b)
1070 {
1071 __upackhw res;
1072 __asm__ volatile ("insert %0,%1,%2,16,16"
1073 :"=d"(res):"d"(a), "d"(b):"memory");
1074 return res;
1075 }
1076
1077 /** Minimum of two __packb values
1078 */
1079 IFX_INLINE __packb Ifx__minb(__packb a, __packb b)
1080 {
1081 __packb res;
1082 __asm__ volatile ("min.b %0,%1,%2"
1083 :"=d"(res):"d"(a), "d"(b):"memory");
1084 return res;
1085 }
1086
1087 /** Minimum of two __upackb values
1088 */
1089 IFX_INLINE __upackb Ifx__minbu( __upackb a, __upackb b)
1090 {
1091 __upackb res;
1092 __asm__ volatile ("min.bu %0,%1,%2"
1093 :"=d"(res):"d"(a), "d"(b):"memory");
1094 return res;
1095 }
1096
1097 /** Minimum of two __packhw values
1098 */
1099 IFX_INLINE __packhw Ifx__minh(__packhw a, __packhw b)
1100 {
1101 __packhw res;
1102 __asm__ volatile ("min.h %0,%1,%2"
1103 :"=d"(res):"d"(a), "d"(b):"memory");
1104 return res;
1105 }
1106
1107 /** Minimum of two __upackhw values
1108 */
1109 IFX_INLINE __upackhw Ifx__minhu( __upackhw a, __upackhw b)
1110 {
1111 __upackhw res;
1112 __asm__ volatile ("min.hu %0,%1,%2"
1113 :"=d"(res):"d"(a), "d"(b):"memory");
1114 return res;
1115 }
1116
1117 /** Insert sint8 into first byte of a __packb
1118 */
1119 IFX_INLINE void Ifx__setbyte1(__packb* a, sint8 b)
1120 {
1121 __asm__ volatile ("ld.w %%d15,[%0] \n\
1122 insert %%d15,%%d15,%1,0,8 \n\
1123 st.w [%0],%%d15"
1124 ::"a"(a), "d"(b):"d15", "memory");
1125 }
1126
1127 /** Insert sint8 into second byte of a __packb
1128 */
1129 IFX_INLINE void Ifx__setbyte2(__packb* a, sint8 b)
1130 {
1131 __asm__ volatile ("ld.w %%d15,[%0] \n\
1132 insert %%d15,%%d15,%1,8,8 \n\
1133 st.w [%0],%%d15"
1134 ::"a"(a), "d"(b):"d15", "memory");
1135 }
1136
1137 /** Insert sint8 into third byte of a __packb
1138 */
1139 IFX_INLINE void Ifx__setbyte3(__packb* a, sint8 b)
1140 {
1141 __asm__ volatile ("ld.w %%d15,[%0] \n\
1142 insert %%d15,%%d15,%1,16,8 \n\
1143 st.w [%0],%%d15"
1144 ::"a"(a), "d"(b):"d15", "memory");
1145 }
1146
1147 /** Insert sint8 into fourth byte of a __packb
1148 */
1149 IFX_INLINE void Ifx__setbyte4(__packb* a, sint8 b)
1150 {
1151 __asm__ volatile ("ld.w %%d15,[%0] \n\
1152 insert %%d15,%%d15,%1,24,8 \n\
1153 st.w [%0],%%d15"
1154 ::"a"(a), "d"(b):"d15", "memory");
1155 }
1156
1157 /** Insert sint16 into first halfword of a __packhw
1158 */
1159 IFX_INLINE void Ifx__sethw1(__packhw* a, sint16 b)
1160 {
1161 __asm__ volatile ("ld.w %%d15,[%0] \n\
1162 insert %%d15,%%d15,%1,0,16 \n\
1163 st.w [%0],%%d15"
1164 ::"a"(a), "d"(b):"d15", "memory");
1165 }
1166
1167 /** Insert sint16 into second halfword of a __packhw
1168 */
1169 IFX_INLINE void Ifx__sethw2(__packhw* a, sint16 b)
1170 {
1171 __asm__ volatile ("ld.w %%d15,[%0] \n\
1172 insert %%d15,%%d15,%1,16,16 \n\
1173 st.w [%0],%%d15"
1174 ::"a"(a), "d"(b):"d15", "memory");
1175 }
1176
1177 /** Insert uint8 into first byte of a __upackb
1178 */
1179 IFX_INLINE void Ifx__setubyte1(__upackb* a, uint8 b)
1180 {
1181 __asm__ volatile ("ld.w %%d15,[%0] \n\
1182 insert %%d15,%%d15,%1,0,8 \n\
1183 st.w [%0],%%d15"
1184 ::"a"(a), "d"(b):"d15", "memory");
1185 }
1186
1187 /** Insert uint8 into second byte of a __upackb
1188 */
1189 IFX_INLINE void Ifx__setubyte2(__upackb* a, uint8 b)
1190 {
1191 __asm__ volatile ("ld.w %%d15,[%0] \n\
1192 insert %%d15,%%d15,%1,8,8 \n\
1193 st.w [%0],%%d15"
1194 ::"a"(a), "d"(b):"d15", "memory");
1195 }
1196
1197 /** Insert uint8 into third byte of a __upackb
1198 */
1199 IFX_INLINE void Ifx__setubyte3(__upackb* a, uint8 b)
1200 {
1201 __asm__ volatile ("ld.w %%d15,[%0] \n\
1202 insert %%d15,%%d15,%1,16,8 \n\
1203 st.w [%0],%%d15"
1204 ::"a"(a), "d"(b):"d15", "memory");
1205 }
1206
1207 /** Insert uint8 into fourth byte of a __upackb
1208 */
1209 IFX_INLINE void Ifx__setubyte4(__upackb* a, uint8 b)
1210 {
1211 __asm__ volatile ("ld.w %%d15,[%0] \n\
1212 insert %%d15,%%d15,%1,24,8 \n\
1213 st.w [%0],%%d15"
1214 ::"a"(a), "d"(b):"d15", "memory");
1215 }
1216
1217 /** Insert uint16 into first halfword of a __upackhw
1218 */
1219 IFX_INLINE void Ifx__setuhw1(__upackhw* a, uint16 b)
1220 {
1221 __asm__ volatile ("ld.w %%d15,[%0] \n\
1222 insert %%d15,%%d15,%1,0,16 \n\
1223 st.w [%0],%%d15"
1224 ::"a"(a), "d"(b):"d15", "memory");
1225 }
1226
1227 /** Insert uint16 into second halfword of a __upackhw
1228 */
1229 IFX_INLINE void Ifx__setuhw2(__upackhw* a, uint16 b)
1230 {
1231 __asm__ volatile ("ld.w %%d15,[%0] \n\
1232 insert %%d15,%%d15,%1,16,16 \n\
1233 st.w [%0],%%d15"
1234 ::"a"(a), "d"(b):"d15", "memory");
1235 }
1236
1237 /** \} */
1238
1239 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucregister Register Handling
1240 The next table provides an overview of the intrinsic functions that you can use to access control registers.
1241 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
1242 * \{
1243 */
1244
1245 /** Return absolute value
1246 */
1247 #define Ifx__abs(a) __builtin_abs(a)
1248
1249 /** Return absolue difference of two integers
1250 */
1251 IFX_INLINE sint32 Ifx__absdif(sint32 a, sint32 b)
1252 {
1253 sint32 res;
1254 __asm__ volatile ("absdif %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1255 return res;
1256 }
1257
1258 /** Return absolute value with saturation
1259 */
1260 IFX_INLINE sint32 Ifx__abss(sint32 a)
1261 {
1262 sint32 res;
1263 __asm__ volatile ("abss %0, %1": "=d" (res) : "d" (a));
1264 return res;
1265 }
1266
1267 /** Count leading ones in int
1268 */
1269 IFX_INLINE sint32 Ifx__clo(sint32 a)
1270 {
1271 sint32 res;
1272 __asm__ volatile ("clo %0,%1":"=d"(res):"d"(a));
1273 return res;
1274 }
1275
1276 /** Count number of redundant sign bits (all consecutive bits with the same value as bit 31
1277 */
1278 IFX_INLINE sint32 Ifx__cls(sint32 a)
1279 {
1280 sint32 res;
1281 __asm__ volatile ("cls %0,%1":"=d"(res):"d"(a));
1282 return res;
1283 }
1284
1285 /** Count leading zeros in int
1286 */
1287 #define Ifx__clz(a) __builtin_clz(a)
1288
1289 /** Return absolute double precision floating-point value
1290 */
1291 IFX_INLINE double Ifx__fabs(double d)
1292 {
1293 double res;
1294 __asm__ volatile ("insert %0,%1,0,31,1": "=d" (res) : "d" (d):"memory");
1295 return res;
1296 }
1297
1298 /** Return absolute floating-point value
1299 */
1300 IFX_INLINE float Ifx__fabsf(float f)
1301 {
1302 float res;
1303 __asm__ volatile ("insert %0,%1,0,31,1": "=d" (res) : "d" (f):"memory");
1304 return res;
1305 }
1306
1307 #if !IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
1308 /** Move contents of the addressed core SFR into a data register
1309 */
1310 #define Ifx__mfcr(regaddr) \
1311 ({ sint32 res; __asm__ volatile ("mfcr %0,%1": "=d" (res) :"i"(regaddr): "memory"); res; })
1312
1313 //({ sint32 res; __asm__ volatile ("mfcr %0,"#regaddr : "=d" (res) : : "memory"); res; })
1314
1315 /** Move contents of a data register (second int) to the addressed core SFR (first int)
1316 */
1317 #define Ifx__mtcr(regaddr,val) __asm__ volatile ("mtcr %0,%1\n\tisync"::"i"(regaddr),"d"(val):"memory")
1318 #endif
1319
1320 /** Return parity
1321 */
1322 IFX_INLINE sint32 Ifx__parity(sint32 a)
1323 {
1324 sint32 res;
1325 __asm__ volatile ("parity %0,%1": "=d" (res) : "d" (a):"memory");
1326 return res;
1327 }
1328
1329 /** Return saturated byte
1330 */
1331 IFX_INLINE sint8 Ifx__satb(sint32 a)
1332 {
1333 sint8 res;
1334 __asm__ volatile ("sat.b %0,%1":"=d"(res):"d"(a));
1335 return res;
1336 }
1337
1338 /** Return saturated uint8
1339 */
1340 IFX_INLINE uint8 Ifx__satbu(sint32 a)
1341 {
1342 uint8 res;
1343 __asm__ volatile ("sat.bu %0,%1":"=d"(res):"d"(a));
1344 return res;
1345 }
1346
1347 /** Return saturated halfword
1348 */
1349 IFX_INLINE sint16 Ifx__sath(sint32 a)
1350 {
1351 sint8 res;
1352 __asm__ volatile ("sat.h %0,%1":"=d"(res):"d"(a));
1353 return res;
1354 }
1355
1356 /** Return saturated unsigned halfword
1357 */
1358 IFX_INLINE uint16 Ifx__sathu(sint32 a)
1359 {
1360 sint8 res;
1361 __asm__ volatile ("sat.hu %0,%1":"=d"(res):"d"(a));
1362 return res;
1363 }
1364
1365 /** \} */
1366
1367 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucsaturation Saturation Arithmetic Support
1368 These intrinsics support saturation arithmetic
1369 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
1370 * \{
1371 */
1372
1373 /** add signed with saturation
1374 */
1375 IFX_INLINE sint32 Ifx__adds(sint32 a, sint32 b)
1376 {
1377 sint32 res;
1378 __asm__ volatile ("adds %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1379 return res;
1380 }
1381
1382 /** add unsigned with saturation
1383 */
1384 IFX_INLINE uint32 Ifx__addsu(uint32 a, uint32 b)
1385 {
1386 uint32 res;
1387 __asm__ volatile ("adds.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1388 return res;
1389 }
1390
1391 /** substract signed with saturation
1392 */
1393 IFX_INLINE sint32 Ifx__subs(sint32 a, sint32 b)
1394 {
1395 sint32 res;
1396 __asm__ volatile ("subs %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1397 return res;
1398 }
1399
1400 /** substract unsigned with saturation
1401 */
1402 IFX_INLINE uint32 Ifx__subsu(uint32 a, uint32 b)
1403 {
1404 uint32 res;
1405 __asm__ volatile ("subs.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1406 return res;
1407 }
1408
1409 /** \} */
1410
1411 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucsingle_assembly Insert Single Assembly Instruction
1412 The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
1413 instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
1414 assembly instructions.
1415 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
1416 * \{
1417 */
1418
1419 /** Insert DEBUG instruction
1420 */
1421 IFX_INLINE void Ifx__debug(void)
1422 {
1423 __asm__ volatile ("debug" : : : "memory");
1424 }
1425
1426 /** Insert a memory barrier
1427 */
1428 #define Ifx__mem_barrier __asm__ volatile("":::"memory");
1429
1430 /** Insert DSYNC instruction
1431 */
1432 IFX_INLINE void Ifx__dsync(void)
1433 {
1434 __asm__ volatile ("dsync" : : : "memory");
1435 }
1436
1437 /** Insert ISYNC instruction
1438 */
1439 IFX_INLINE void Ifx__isync(void)
1440 {
1441 __asm__ volatile ("isync" : : : "memory");
1442 }
1443
1444 /** Insert LDMST instruction. Note that all operands must be word-aligned.
1445 */
1446 IFX_INLINE void Ifx__ldmst(volatile void* address, uint32 mask, uint32 value)
1447 {
1448 __asm__ volatile("mov %H2,%1 \n\
1449 ldmst [%0]0,%A2"
1450 ::"a"(address), "d"(mask), "d"((long long)value));
1451 }
1452
1453 /** Insert NOP instruction
1454 */
1455 IFX_INLINE void Ifx__nop(void)
1456 {
1457 __asm__ volatile ("nop" : : : "memory");
1458 }
1459
1460 /** Insert a loop over cnt NOP instruction
1461 */
1462 IFX_INLINE void Ifx__nops(void* cnt)
1463 {
1464 __asm__ volatile ("0: nop \n\
1465 loop %0,0b"
1466 ::"a"(((sint8*)cnt)-1));
1467 }
1468
1469 /** Insert RSLCX instruction
1470 */
1471 IFX_INLINE void Ifx__rslcx(void)
1472 {
1473 __asm__ volatile ("rslcx" : : : "memory");
1474 }
1475
1476 /** Insert SVLCX instruction
1477 */
1478 IFX_INLINE void Ifx__svlcx(void)
1479 {
1480 __asm__ volatile ("svlcx" : : : "memory");
1481 }
1482
1483 /** Insert SWAP instruction. Note that all operands must be word-aligned.
1484 */
1485 IFX_INLINE uint32 Ifx__swap(void* place, uint32 value)
1486 {
1487 uint32 res;
1488 __asm__ volatile("swap.w [%1]0,%2":"=d"(res):"a"(place), "0"(value));
1489 return res;
1490 }
1491
1492 /** Insert n NOP instruction
1493 */
1494 #define Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
1495
1496 /** \} */
1497
1498 /* FIXME use inline instead of #define */
1499 #define Ifx__setareg(areg,val) \
1500 { uint32 reg_val= (uint32)val; \
1501 __asm__ volatile (" mov.a\t %%"#areg",%0"::"d"(reg_val)); }
1502
1503 /**__mtcr (CPU_CCTRL, 0);
1504 */
1505 IFX_INLINE void Ifx__stopPerfCounters(void)
1506 {
1507 __asm__ volatile("mov %%d0,0\n\
1508 mtcr 0xFC00,%%d0\n\
1509 isync\n"
1510 : : :"d0"); /* FIXME check that the parameter d0 is understood by the compiler as a register used by the inline */
1511 }
1512
1513 /** \brief This function is a implementation of a binary semaphore using compare and swap instruction
1514 * \param address address of resource.
1515 * \param value This variable is updated with status of address
1516 * \param condition if the value of address matches with the value of condition, then swap of value & address occurs.
1517 *
1518 */
1519 IFX_INLINE unsigned int Ifx__cmpAndSwap (unsigned int volatile *address,
1520 unsigned int value, unsigned int condition)
1521 {
1522 /* Gnu C compiler with Tricore 1.6 support is required to use cmpswap instruction */
1523 __extension__ unsigned long long reg64
1524 = value | (unsigned long long) condition << 32;
1525
1526 __asm__ __volatile__ ("cmpswap.w [%[addr]]0, %A[reg]"
1527 : [reg] "+d" (reg64)
1528 : [addr] "a" (address)
1529 : "memory");
1530 return reg64;
1531 }
1532
1533 /** \brief Convert a fixpoint value to float32
1534 *
1535 * This function converts a value from a fixpoint format to a float32 format.
1536 *
1537 *
1538 * \param value value to be converted.
1539 * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
1540 *
1541 * \return Returns the converted value in the float32 format.
1542 *
1543 */
1544 IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
1545 {
1546 float32 result;
1547
1548 __asm__ volatile("q31tof %0, %1, %2": "=d" (result) : "d" (value), "d" (shift));
1549 return result;
1550 }
1551
1552 IFX_INLINE void* Ifx__getA11(void)
1553 {
1554 uint32 *res;
1555 __asm__ volatile ("mov.aa %0, %%a11": "=a" (res) : :"a11");
1556 return res;
1557 }
1558
1559 IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
1560 {
1561 __asm__ volatile ("mov.aa %%a10, %0": : "a" (stackAddr) :"a10");
1562 }
1563
1564 IFX_INLINE uint32 Ifx__crc32(uint32 b, uint32 a)
1565 {
1566 uint32 returnvalue = 0; /* set value to 0 */
1567
1568 __asm__ volatile ("CRC32B.W %0,%1,%2" : "=d" (returnvalue) : "d"(b), "d"(a));
1569
1570 return returnvalue;
1571 }
1572
1573 IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
1574 {
1575 uint32 returnvalue = 0; /* set seed value to 0 */
1576 for (;length > 0; length--)
1577 {
1578 /* calculate the CRC over all data */
1579 __asm__ ("CRC32B.W %0,%0,%1" : "+d" (returnvalue) : "d" (*startaddress));
1580 startaddress++;
1581 }
1582 return returnvalue;
1583 }
1584
1585 IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
1586 {
1587 uint32 result;
1588 __asm(" mul.u %%e14,%1,%2 # d15 = Eh; d14 = El \n"
1589 " mov %%d12,%%d14 # e12 = El \n"
1590 " mov %%d13, 0 # \n"
1591 " madd.u %%e14,%%e12,%%d15, 5 # e14 = El + 5 * d15 \n"
1592 " cmp_m_%=: jge.u %%d14,%3,sub_m_%= # \n"
1593 " jz %%d15,done_%= # \n"
1594 " sub_m_%=: subx %%d14,%%d14,%3 # e12=e12-m \n"
1595 " subc %%d15,%%d15,%%d13 # d13=d13-0 \n"
1596 " loopu cmp_m_%= # \n"
1597 " done_%=: mov %0,%%d14 # \n"
1598 : "=d"(result) : "d"(a), "d"(x), "d"(m) : "d12","d13","d14","d15");
1599 return result;
1600 }
1601
1602 IFX_INLINE sint32 Ifx__popcnt(sint32 a)
1603 {
1604 sint32 res;
1605 __asm__ volatile ("popcnt.w %0,%1":"=d"(res):"d"(a));
1606 return res;
1607 }
1608
1609 /** Invalidate cache address "p". Generates CACHEA.I [Ab].
1610 */
1611 IFX_INLINE void Ifx__cacheai(uint8* p)
1612 {
1613 __asm__ volatile("cachea.i [%0]0"::"a"(p));
1614 }
1615
1616 /* Macros for backward compatibility of the intrinsics*/
1617 /******************************************************************************/
1618 #ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
1619 #ifndef __non_return_call
1620 #define __non_return_call Ifx__non_return_call
1621 #endif
1622
1623 #ifndef __jump_and_link
1624 #define __jump_and_link Ifx__jump_and_link
1625 #endif
1626
1627 #ifndef __moveToDataParam0
1628 #define __moveToDataParam0 Ifx__moveToDataParam0
1629 #endif
1630
1631 #ifndef __moveToDataParamRet
1632 #define __moveToDataParamRet Ifx__moveToDataParamRet
1633 #endif
1634
1635 #ifndef __getDataParamRet
1636 #define __getDataParamRet Ifx__getDataParamRet
1637 #endif
1638
1639 #ifndef __moveToAddrParam0
1640 #define __moveToAddrParam0 Ifx__moveToAddrParam0
1641 #endif
1642
1643 #ifndef __jumpToFunction
1644 #define __jumpToFunction Ifx__jumpToFunction
1645 #endif
1646
1647 #ifndef __jumpToFunctionWithLink
1648 #define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
1649 #endif
1650
1651 #ifndef __jumpBackToLink
1652 #define __jumpBackToLink Ifx__jumpBackToLink
1653 #endif
1654
1655 #ifndef __minX
1656 #define __minX Ifx__minX
1657 #endif
1658
1659 #ifndef __maxX
1660 #define __maxX Ifx__maxX
1661 #endif
1662
1663 #ifndef __saturateX
1664 #define __saturateX Ifx__saturateX
1665 #endif
1666
1667 #ifndef __checkrangeX
1668 #define __checkrangeX Ifx__checkrangeX
1669 #endif
1670
1671 #ifndef __saturate
1672 #define __saturate Ifx__saturate
1673 #endif
1674
1675 #ifndef __saturateu
1676 #define __saturateu Ifx__saturateu
1677 #endif
1678
1679 #ifndef __max
1680 #define __max Ifx__max
1681 #endif
1682
1683 #ifndef __maxs
1684 #define __maxs Ifx__maxs
1685 #endif
1686
1687 #ifndef __maxu
1688 #define __maxu Ifx__maxu
1689 #endif
1690
1691 #ifndef __min
1692 #define __min Ifx__min
1693 #endif
1694
1695 #ifndef __mins
1696 #define __mins Ifx__mins
1697 #endif
1698
1699 #ifndef __minu
1700 #define __minu Ifx__minu
1701 #endif
1702
1703 #ifndef __sqrtf
1704 #define __sqrtf Ifx__sqrtf
1705 #endif
1706
1707 #ifndef __sqrf
1708 #define __sqrf Ifx__sqrf
1709 #endif
1710
1711 #ifndef __checkrange
1712 #define __checkrange Ifx__checkrange
1713 #endif
1714
1715 #ifndef __roundf
1716 #define __roundf Ifx__roundf
1717 #endif
1718
1719 #ifndef __absf
1720 #define __absf Ifx__absf
1721 #endif
1722
1723 #ifndef __saturatef
1724 #define __saturatef Ifx__saturatef
1725 #endif
1726
1727 #ifndef __minf
1728 #define __minf Ifx__minf
1729 #endif
1730
1731 #ifndef __maxf
1732 #define __maxf Ifx__maxf
1733 #endif
1734
1735 #ifndef __checkrangef
1736 #define __checkrangef Ifx__checkrangef
1737 #endif
1738
1739 #ifndef __abs_stdreal
1740 #define __abs_stdreal Ifx__abs_stdreal
1741 #endif
1742
1743 #ifndef __saturate_stdreal
1744 #define __saturate_stdreal Ifx__saturate_stdreal
1745 #endif
1746
1747 #ifndef __min_stdreal
1748 #define __min_stdreal Ifx__min_stdreal
1749 #endif
1750
1751 #ifndef __max_stdreal
1752 #define __max_stdreal Ifx__max_stdreal
1753 #endif
1754
1755 #ifndef __neqf
1756 #define __neqf Ifx__neqf
1757 #endif
1758
1759 #ifndef __leqf
1760 #define __leqf Ifx__leqf
1761 #endif
1762
1763 #ifndef __geqf
1764 #define __geqf Ifx__geqf
1765 #endif
1766
1767 #ifndef __clssf
1768 #define __clssf Ifx__clssf
1769 #endif
1770
1771 #ifndef __fract_to_float
1772 #define __fract_to_float Ifx__fract_to_float
1773 #endif
1774
1775 #ifndef __fract_to_sfract
1776 #define __fract_to_sfract Ifx__fract_to_sfract
1777 #endif
1778
1779 #ifndef __float_to_sfract
1780 #define __float_to_sfract Ifx__float_to_sfract
1781 #endif
1782
1783 #ifndef __float_to_fract
1784 #define __float_to_fract Ifx__float_to_fract
1785 #endif
1786
1787 #ifndef __getfract
1788 #define __getfract Ifx__getfract
1789 #endif
1790
1791 #ifndef __mac_r_sf
1792 #define __mac_r_sf Ifx__mac_r_sf
1793 #endif
1794
1795 #ifndef __mac_sf
1796 #define __mac_sf Ifx__mac_sf
1797 #endif
1798
1799 #ifndef __mulfractfract
1800 #define __mulfractfract Ifx__mulfractfract
1801 #endif
1802
1803 #ifndef __mulfractlong
1804 #define __mulfractlong Ifx__mulfractlong
1805 #endif
1806
1807 #ifndef __round16
1808 #define __round16 Ifx__round16
1809 #endif
1810
1811 #ifndef __s16_to_sfract
1812 #define __s16_to_sfract Ifx__s16_to_sfract
1813 #endif
1814
1815 #ifndef __sfract_to_s16
1816 #define __sfract_to_s16 Ifx__sfract_to_s16
1817 #endif
1818
1819 #ifndef __sfract_to_u16
1820 #define __sfract_to_u16 Ifx__sfract_to_u16
1821 #endif
1822
1823 #ifndef __shaaccum
1824 #define __shaaccum Ifx__shaaccum
1825 #endif
1826
1827 #ifndef __shafracts
1828 #define __shafracts Ifx__shafracts
1829 #endif
1830
1831 #ifndef __shasfracts
1832 #define __shasfracts Ifx__shasfracts
1833 #endif
1834
1835 #ifndef __u16_to_sfract
1836 #define __u16_to_sfract Ifx__u16_to_sfract
1837 #endif
1838
1839 #ifndef __extr
1840 #define __extr Ifx__extr
1841 #endif
1842
1843 #ifndef __extru
1844 #define __extru Ifx__extru
1845 #endif
1846
1847 #ifndef __getbit
1848 #define __getbit Ifx__getbit
1849 #endif
1850
1851 #ifndef __ins
1852 #define __ins Ifx__ins
1853 #endif
1854
1855 #ifndef __insert
1856 #define __insert Ifx__insert
1857 #endif
1858
1859 #ifndef __insn
1860 #define __insn Ifx__insn
1861 #endif
1862
1863 #ifndef __putbit
1864 #define __putbit Ifx__putbit
1865 #endif
1866
1867 #ifndef __imaskldmst
1868 #define __imaskldmst Ifx__imaskldmst
1869 #endif
1870
1871 #ifndef __bisr
1872 #define __bisr Ifx__bisr
1873 #endif
1874
1875 #ifndef __disable
1876 #define __disable Ifx__disable
1877 #endif
1878
1879 #ifndef __disable_and_save
1880 #define __disable_and_save Ifx__disable_and_save
1881 #endif
1882
1883 #ifndef __enable
1884 #define __enable Ifx__enable
1885 #endif
1886
1887 #ifndef __restore
1888 #define __restore Ifx__restore
1889 #endif
1890
1891 #ifndef __syscall
1892 #define __syscall Ifx__syscall
1893 #endif
1894
1895 #ifndef __tric_syscall
1896 #define __tric_syscall Ifx__tric_syscall
1897 #endif
1898
1899 #ifndef __cacheawi
1900 #define __cacheawi Ifx__cacheawi
1901 #endif
1902
1903 #ifndef __cacheiwi
1904 #define __cacheiwi Ifx__cacheiwi
1905 #endif
1906
1907 #ifndef __cacheawi_bo_post_inc
1908 #define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
1909 #endif
1910
1911 #ifndef __mulsc
1912 #define __mulsc Ifx__mulsc
1913 #endif
1914
1915 #ifndef __rol
1916 #define __rol Ifx__rol
1917 #endif
1918
1919 #ifndef __ror
1920 #define __ror Ifx__ror
1921 #endif
1922
1923 #ifndef __extractbyte1
1924 #define __extractbyte1 Ifx__extractbyte1
1925 #endif
1926
1927 #ifndef __extractbyte2
1928 #define __extractbyte2 Ifx__extractbyte2
1929 #endif
1930
1931 #ifndef __extractbyte3
1932 #define __extractbyte3 Ifx__extractbyte3
1933 #endif
1934
1935 #ifndef __extractbyte4
1936 #define __extractbyte4 Ifx__extractbyte4
1937 #endif
1938
1939 #ifndef __extracthw1
1940 #define __extracthw1 Ifx__extracthw1
1941 #endif
1942
1943 #ifndef __extracthw2
1944 #define __extracthw2 Ifx__extracthw2
1945 #endif
1946
1947 #ifndef __extractubyte1
1948 #define __extractubyte1 Ifx__extractubyte1
1949 #endif
1950
1951 #ifndef __extractubyte2
1952 #define __extractubyte2 Ifx__extractubyte2
1953 #endif
1954
1955 #ifndef __extractubyte3
1956 #define __extractubyte3 Ifx__extractubyte3
1957 #endif
1958
1959 #ifndef __extractubyte4
1960 #define __extractubyte4 Ifx__extractubyte4
1961 #endif
1962
1963 #ifndef __extractuhw1
1964 #define __extractuhw1 Ifx__extractuhw1
1965 #endif
1966
1967 #ifndef __extractuhw2
1968 #define __extractuhw2 Ifx__extractuhw2
1969 #endif
1970
1971 #ifndef __getbyte1
1972 #define __getbyte1 Ifx__getbyte1
1973 #endif
1974
1975 #ifndef __getbyte2
1976 #define __getbyte2 Ifx__getbyte2
1977 #endif
1978
1979 #ifndef __getbyte3
1980 #define __getbyte3 Ifx__getbyte3
1981 #endif
1982
1983 #ifndef __getbyte4
1984 #define __getbyte4 Ifx__getbyte4
1985 #endif
1986
1987 #ifndef __gethw1
1988 #define __gethw1 Ifx__gethw1
1989 #endif
1990
1991 #ifndef __gethw2
1992 #define __gethw2 Ifx__gethw2
1993 #endif
1994
1995 #ifndef __getubyte1
1996 #define __getubyte1 Ifx__getubyte1
1997 #endif
1998
1999 #ifndef __getubyte2
2000 #define __getubyte2 Ifx__getubyte2
2001 #endif
2002
2003 #ifndef __getubyte3
2004 #define __getubyte3 Ifx__getubyte3
2005 #endif
2006
2007 #ifndef __getubyte4
2008 #define __getubyte4 Ifx__getubyte4
2009 #endif
2010
2011 #ifndef __getuhw1
2012 #define __getuhw1 Ifx__getuhw1
2013 #endif
2014
2015 #ifndef __getuhw2
2016 #define __getuhw2 Ifx__getuhw2
2017 #endif
2018
2019 #ifndef __setbyte1
2020 #define __setbyte1 Ifx__setbyte1
2021 #endif
2022
2023 #ifndef __setbyte2
2024 #define __setbyte2 Ifx__setbyte2
2025 #endif
2026
2027 #ifndef __setbyte3
2028 #define __setbyte3 Ifx__setbyte3
2029 #endif
2030
2031 #ifndef __setbyte4
2032 #define __setbyte4 Ifx__setbyte4
2033 #endif
2034
2035 #ifndef __sethw1
2036 #define __sethw1 Ifx__sethw1
2037 #endif
2038
2039 #ifndef __sethw2
2040 #define __sethw2 Ifx__sethw2
2041 #endif
2042
2043 #ifndef __setubyte1
2044 #define __setubyte1 Ifx__setubyte1
2045 #endif
2046
2047 #ifndef __setubyte2
2048 #define __setubyte2 Ifx__setubyte2
2049 #endif
2050
2051 #ifndef __setubyte3
2052 #define __setubyte3 Ifx__setubyte3
2053 #endif
2054
2055 #ifndef __setubyte4
2056 #define __setubyte4 Ifx__setubyte4
2057 #endif
2058
2059 #ifndef __setuhw1
2060 #define __setuhw1 Ifx__setuhw1
2061 #endif
2062
2063 #ifndef __setuhw2
2064 #define __setuhw2 Ifx__setuhw2
2065 #endif
2066
2067 #ifndef __minhu
2068 #define __minhu Ifx__minhu
2069 #endif
2070
2071 #ifndef __minh
2072 #define __minh Ifx__minh
2073 #endif
2074
2075 #ifndef __minbu
2076 #define __minbu Ifx__minbu
2077 #endif
2078
2079 #ifndef __minb
2080 #define __minb Ifx__minb
2081 #endif
2082
2083 #ifndef __insertuhw2
2084 #define __insertuhw2 Ifx__insertuhw2
2085 #endif
2086
2087 #ifndef __insertuhw1
2088 #define __insertuhw1 Ifx__insertuhw1
2089 #endif
2090
2091 #ifndef __inserthw2
2092 #define __inserthw2 Ifx__inserthw2
2093 #endif
2094
2095 #ifndef __inserthw1
2096 #define __inserthw1 Ifx__inserthw1
2097 #endif
2098
2099 #ifndef __insertubyte4
2100 #define __insertubyte4 Ifx__insertubyte4
2101 #endif
2102
2103 #ifndef __insertubyte3
2104 #define __insertubyte3 Ifx__insertubyte3
2105 #endif
2106
2107 #ifndef __insertubyte2
2108 #define __insertubyte2 Ifx__insertubyte2
2109 #endif
2110
2111 #ifndef __insertubyte1
2112 #define __insertubyte1 Ifx__insertubyte1
2113 #endif
2114
2115 #ifndef __insertbyte4
2116 #define __insertbyte4 Ifx__insertbyte4
2117 #endif
2118
2119 #ifndef __insertbyte3
2120 #define __insertbyte3 Ifx__insertbyte3
2121 #endif
2122
2123 #ifndef __insertbyte2
2124 #define __insertbyte2 Ifx__insertbyte2
2125 #endif
2126
2127 #ifndef __insertbyte1
2128 #define __insertbyte1 Ifx__insertbyte1
2129 #endif
2130
2131 #ifndef __initupackhw
2132 #define __initupackhw Ifx__initupackhw
2133 #endif
2134
2135 #ifndef __initupackb
2136 #define __initupackb Ifx__initupackb
2137 #endif
2138
2139 #ifndef __initpackhwl
2140 #define __initpackhwl Ifx__initpackhwl
2141 #endif
2142
2143 #ifndef __initpackhw
2144 #define __initpackhw Ifx__initpackhw
2145 #endif
2146
2147 #ifndef __initpackbl
2148 #define __initpackbl Ifx__initpackbl
2149 #endif
2150
2151 #ifndef __initpackb
2152 #define __initpackb Ifx__initpackb
2153 #endif
2154
2155 #ifndef __absb
2156 #define __absb Ifx__absb
2157 #endif
2158
2159 #ifndef __absh
2160 #define __absh Ifx__absh
2161 #endif
2162
2163 #ifndef __abssh
2164 #define __abssh Ifx__abssh
2165 #endif
2166
2167
2168 #ifndef __abs
2169 #define __abs Ifx__abs
2170 #endif
2171
2172 #ifndef __absdif
2173 #define __absdif Ifx__absdif
2174 #endif
2175
2176 #ifndef __abss
2177 #define __abss Ifx__abss
2178 #endif
2179
2180 #ifndef __clo
2181 #define __clo Ifx__clo
2182 #endif
2183
2184 #ifndef __cls
2185 #define __cls Ifx__cls
2186 #endif
2187
2188 #ifndef __clz
2189 #define __clz Ifx__clz
2190 #endif
2191
2192 #ifndef __fabs
2193 #define __fabs Ifx__fabs
2194 #endif
2195
2196 #ifndef __fabsf
2197 #define __fabsf Ifx__fabsf
2198 #endif
2199
2200 #ifndef __mfcr
2201 #define __mfcr Ifx__mfcr
2202 #endif
2203
2204 #ifndef __mtcr
2205 #define __mtcr Ifx__mtcr
2206 #endif
2207
2208 #ifndef __parity
2209 #define __parity Ifx__parity
2210 #endif
2211
2212 #ifndef __satb
2213 #define __satb Ifx__satb
2214 #endif
2215
2216 #ifndef __satbu
2217 #define __satbu Ifx__satbu
2218 #endif
2219
2220 #ifndef __sath
2221 #define __sath Ifx__sath
2222 #endif
2223
2224 #ifndef __sathu
2225 #define __sathu Ifx__sathu
2226 #endif
2227
2228 #ifndef __adds
2229 #define __adds Ifx__adds
2230 #endif
2231
2232 #ifndef __addsu
2233 #define __addsu Ifx__addsu
2234 #endif
2235
2236 #ifndef __subs
2237 #define __subs Ifx__subs
2238 #endif
2239
2240 #ifndef __subsu
2241 #define __subsu Ifx__subsu
2242 #endif
2243
2244 #ifndef __debug
2245 #define __debug Ifx__debug
2246 #endif
2247
2248 #ifndef __mem_barrier
2249 #define __mem_barrier Ifx__mem_barrier
2250 #endif
2251
2252 #ifndef __dsync
2253 #define __dsync Ifx__dsync
2254 #endif
2255
2256 #ifndef __isync
2257 #define __isync Ifx__isync
2258 #endif
2259
2260 #ifndef __ldmst
2261 #define __ldmst Ifx__ldmst
2262 #endif
2263
2264 #ifndef __nop
2265 #define __nop Ifx__nop
2266 #endif
2267
2268 #ifndef __nops
2269 #define __nops Ifx__nops
2270 #endif
2271
2272 #ifndef __rslcx
2273 #define __rslcx Ifx__rslcx
2274 #endif
2275
2276 #ifndef __svlcx
2277 #define __svlcx Ifx__svlcx
2278 #endif
2279
2280 #ifndef __swap
2281 #define __swap Ifx__swap
2282 #endif
2283
2284 #if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
2285 #define NOP Ifx__NOP
2286 #endif
2287
2288 #ifndef __setareg
2289 #define __setareg Ifx__setareg
2290 #endif
2291
2292 #ifndef __stopPerfCounters
2293 #define __stopPerfCounters Ifx__stopPerfCounters
2294 #endif
2295
2296 #ifndef __cmpAndSwap
2297 #define __cmpAndSwap Ifx__cmpAndSwap
2298 #endif
2299
2300 #ifndef __fixpoint_to_float32
2301 #define __fixpoint_to_float32 Ifx__fixpoint_to_float32
2302 #endif
2303
2304 #ifndef __getA11
2305 #define __getA11 Ifx__getA11
2306 #endif
2307
2308 #ifndef __setStackPointer
2309 #define __setStackPointer Ifx__setStackPointer
2310 #endif
2311
2312 #if ((!defined(__crc32)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
2313 #define __crc32 Ifx__crc32
2314 #endif
2315
2316 #ifndef __popcnt
2317 #define __popcnt Ifx__popcnt
2318 #endif
2319
2320 #ifndef __cacheai
2321 #define __cacheai Ifx__cacheai
2322 #endif
2323
2324 #endif
2325 /******************************************************************************/
2326 /* *INDENT-ON* */
2327 /******************************************************************************/
2328 #endif /* IFXCPU_INTRINSICSGNUC_H */
Ifx__fract_to_float
#define Ifx__fract_to_float(value)
Definition: IfxCpu_IntrinsicsTasking.h:160
Ifx__insertubyte3
asm __upackb Ifx__insertubyte3(__upackb a, uint8 b)
Insert uint8 into third unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:964
Ifx__setubyte1
asm volatile void Ifx__setubyte1(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1106
Ifx__restore
IFX_INLINE void Ifx__restore(sint32 ie)
Definition: IfxCpu_IntrinsicsGnuc.h:533
Ifx__extractbyte4
asm sint8 Ifx__extractbyte4(__packb a)
Extract fourth byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:633
Ifx__satbu
asm volatile uint8 Ifx__satbu(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1264
Ifx__minb
asm __packb Ifx__minb(__packb a, __packb b)
Definition: IfxCpu_IntrinsicsDcc.h:1003
Ifx__nops
asm volatile void Ifx__nops(uint32 cnt)
Definition: IfxCpu_IntrinsicsDcc.h:1386
Ifx__moveToAddrParam0
IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
Definition: IfxCpu_IntrinsicsGnuc2G.h:94
Ifx__cacheiwi
asm volatile void Ifx__cacheiwi(uint8 *p)
Definition: IfxCpu_IntrinsicsDcc.h:519
Ifx__mulsc
asm volatile sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
Definition: IfxCpu_IntrinsicsDcc.h:542
Ifx__stopPerfCounters
IFX_INLINE void Ifx__stopPerfCounters(void)
Definition: IfxCpu_IntrinsicsGnuc2G.h:1505
Ifx__mac_sf
asm sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsDcc.h:260
Ifx__s16_to_sfract
asm sfract Ifx__s16_to_sfract(short a)
Definition: IfxCpu_IntrinsicsDcc.h:309
Ifx__insertubyte2
asm __upackb Ifx__insertubyte2(__upackb a, uint8 b)
Insert uint8 into second unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:955
Ifx__getbyte4
asm sint8 Ifx__getbyte4(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:744
__packb
long __packb
Definition: Ifx_TypesDcc.h:47
Ifx__minu
IFX_INLINE uint32 Ifx__minu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:192
Ifx__min
IFX_INLINE sint32 Ifx__min(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:174
sfract
short sfract
Definition: Ifx_TypesDcc.h:45
Ifx__extr
#define Ifx__extr
Definition: IfxCpu_IntrinsicsDcc.h:400
Ifx__cacheawi_bo_post_inc
asm volatile uint8 * Ifx__cacheawi_bo_post_inc(uint8 *p)
Definition: IfxCpu_IntrinsicsDcc.h:509
Ifx__initupackhw
asm __upackhw Ifx__initupackhw(uint16 a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:883
Ifx__setubyte4
asm volatile void Ifx__setubyte4(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1139
Ifx__sath
asm short Ifx__sath(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1273
Ifx__extractuhw1
asm volatile uint16 Ifx__extractuhw1(__upackhw a)
Definition: IfxCpu_IntrinsicsDcc.h:696
Ifx__svlcx
IFX_INLINE void Ifx__svlcx(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1478
Ifx__ror
asm volatile uint32 Ifx__ror(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsDcc.h:561
Ifx__getuhw1
asm volatile uint16 Ifx__getuhw1(__upackhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:814
Ifx__absh
asm __packhw Ifx__absh(__packhw a)
Definition: IfxCpu_IntrinsicsDcc.h:588
Ifx__insertbyte2
asm __packb Ifx__insertbyte2(__packb a, sint8 b)
Insert sint8 into second byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:901
Ifx__setStackPointer
IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
Definition: IfxCpu_IntrinsicsGnuc2G.h:1559
__asm__
#define __asm__
Definition: Ifx_TypesTasking.h:45
Ifx__absdif
IFX_INLINE sint32 Ifx__absdif(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1251
Ifx__gethw2
asm short Ifx__gethw2(__packhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:764
Ifx__satb
asm sint8 Ifx__satb(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1255
Ifx__setuhw1
asm volatile void Ifx__setuhw1(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:1150
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx__absb
asm __packb Ifx__absb(__packb a)
Definition: IfxCpu_IntrinsicsDcc.h:579
float32
float float32
Definition: Platform_Types.h:170
Ifx__sfract_to_s16
asm short Ifx__sfract_to_s16(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:319
Ifx__shasfracts
asm sfract Ifx__shasfracts(sfract a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:371
Ifx__initpackhw
asm __packhw Ifx__initpackhw(short a, short b)
Initialize __packhw with two integers.
Definition: IfxCpu_IntrinsicsDcc.h:854
Ifx__ldmst
#define Ifx__ldmst(addr, mask, data)
Definition: IfxCpu_IntrinsicsTasking.h:294
Ifx__adds
IFX_INLINE sint32 Ifx__adds(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1375
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesDcc.h:50
Ifx__debug
IFX_INLINE void Ifx__debug(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1421
Ifx__getDataParamRet
IFX_INLINE unsigned int Ifx__getDataParamRet(void)
Definition: IfxCpu_IntrinsicsGnuc2G.h:87
Ifx__extractubyte3
asm volatile uint8 Ifx__extractubyte3(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:678
Ifx__u16_to_sfract
asm sfract Ifx__u16_to_sfract(uint16 a)
Definition: IfxCpu_IntrinsicsDcc.h:381
Ifx__mac_r_sf
asm sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsDcc.h:247
Ifx__initupackb
asm __upackb Ifx__initupackb(uint32 a, uint32 b, uint32 c, uint32 d)
Definition: IfxCpu_IntrinsicsDcc.h:872
Ifx__setubyte3
asm volatile void Ifx__setubyte3(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1128
Ifx__insertbyte1
asm __packb Ifx__insertbyte1(__packb a, sint8 b)
Insert sint8 into first byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:892
Ifx__sethw2
asm volatile void Ifx__sethw2(__packhw *a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:1095
Ifx__setbyte2
asm volatile void Ifx__setbyte2(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1051
Ifx__getubyte1
asm volatile uint8 Ifx__getubyte1(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:774
Ifx__subsu
#define Ifx__subsu(a, b)
Definition: IfxCpu_IntrinsicsTasking.h:232
Ifx__extractubyte2
asm volatile uint8 Ifx__extractubyte2(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:669
Ifx__minhu
asm __upackhw Ifx__minhu(__upackhw a, __upackhw b)
Definition: IfxCpu_IntrinsicsDcc.h:1031
Ifx__moveToDataParam0
IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
Definition: IfxCpu_IntrinsicsGnuc2G.h:77
Ifx__moveToDataParamRet
IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
Definition: IfxCpu_IntrinsicsGnuc2G.h:82
Ifx__extractuhw2
asm volatile uint16 Ifx__extractuhw2(__upackhw a)
Definition: IfxCpu_IntrinsicsDcc.h:705
Ifx__rslcx
IFX_INLINE void Ifx__rslcx(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1471
Ifx__gethw1
asm short Ifx__gethw1(__packhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:754
Ifx__getubyte2
asm volatile uint8 Ifx__getubyte2(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:784
Ifx__extru
#define Ifx__extru
Definition: IfxCpu_IntrinsicsDcc.h:406
Ifx__float_to_sfract
IFX_INLINE sfract Ifx__float_to_sfract(float a)
Definition: IfxCpu_IntrinsicsGhs.h:265
Ifx__insertubyte4
asm __upackb Ifx__insertubyte4(__upackb a, uint8 b)
Insert uint8 into fourth unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:973
Ifx__extractbyte1
asm sint8 Ifx__extractbyte1(__packb a)
Extract first byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:606
sint16
short sint16
Definition: Platform_Types.h:129
Ifx__jump_and_link
IFX_INLINE void Ifx__jump_and_link(void(*fun)(void))
Definition: IfxCpu_IntrinsicsGnuc2G.h:72
Ifx__jumpBackToLink
IFX_INLINE void Ifx__jumpBackToLink(void)
Definition: IfxCpu_IntrinsicsGnuc2G.h:109
Ifx__inserthw1
asm __packhw Ifx__inserthw1(__packhw a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:928
Ifx__clssf
asm short Ifx__clssf(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:205
__packhw
long __packhw
Definition: Ifx_TypesDcc.h:49
Ifx__minh
asm __packhw Ifx__minh(__packhw a, __packhw b)
Definition: IfxCpu_IntrinsicsDcc.h:1022
Ifx__maxu
IFX_INLINE uint32 Ifx__maxu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:165
fract
long fract
Definition: Ifx_TypesDcc.h:44
Ifx__sathu
asm volatile uint16 Ifx__sathu(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1282
IfxCpu_calculateCrc32
IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
Definition: IfxCpu_IntrinsicsGnuc2G.h:1573
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
laccum
long long laccum
Definition: Ifx_TypesDcc.h:46
Ifx__insertbyte4
asm __packb Ifx__insertbyte4(__packb a, sint8 b)
Insert sint8 into fourth byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:919
Ifx__abss
IFX_INLINE sint32 Ifx__abss(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1260
Ifx__getbyte2
asm sint8 Ifx__getbyte2(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:724
IfxCpu_getRandomVal
IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Definition: IfxCpu_IntrinsicsGnuc2G.h:1585
Ifx__extractbyte3
asm sint8 Ifx__extractbyte3(__packb a)
Extract third byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:624
Ifx__fabs
asm double Ifx__fabs(double d)
Definition: IfxCpu_IntrinsicsDcc.h:1216
Ifx__max
IFX_INLINE sint32 Ifx__max(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:148
Ifx__maxs
IFX_INLINE sint32 Ifx__maxs(sint16 a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:157
Ifx__getA11
IFX_INLINE void * Ifx__getA11(void)
Definition: IfxCpu_IntrinsicsGnuc2G.h:1552
Ifx__jumpToFunctionWithLink
IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
Definition: IfxCpu_IntrinsicsGnuc2G.h:104
Ifx__initpackhwl
asm __packhw Ifx__initpackhwl(long a)
Definition: IfxCpu_IntrinsicsDcc.h:863
Ifx__getbyte3
asm sint8 Ifx__getbyte3(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:734
Ifx__extractbyte2
asm sint8 Ifx__extractbyte2(__packb a)
Extract second byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:615
Ifx__getbyte1
asm sint8 Ifx__getbyte1(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:714
Ifx__insertuhw1
asm __upackhw Ifx__insertuhw1(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:982
Ifx__addsu
#define Ifx__addsu(a, b)
Definition: IfxCpu_IntrinsicsTasking.h:228
__upackb
unsigned long __upackb
Definition: Ifx_TypesDcc.h:48
Ifx__insertuhw2
asm __upackhw Ifx__insertuhw2(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:991
Ifx__extractubyte1
asm volatile uint8 Ifx__extractubyte1(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:660
Ifx__shafracts
asm fract Ifx__shafracts(fract a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:358
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx__dsync
IFX_INLINE void Ifx__dsync(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1432
Ifx__fixpoint_to_float32
IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
Convert a fixpoint value to float32.
Definition: IfxCpu_IntrinsicsGnuc2G.h:1544
Ifx__disable_and_save
IFX_INLINE sint32 Ifx__disable_and_save(void)
Definition: IfxCpu_IntrinsicsGnuc.h:520
Ifx__float_to_fract
asm fract Ifx__float_to_fract(float a)
Definition: IfxCpu_IntrinsicsDcc.h:215
Ifx__extractubyte4
asm volatile uint8 Ifx__extractubyte4(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:687
Ifx__setuhw2
asm volatile void Ifx__setuhw2(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:1161
Ifx__isync
IFX_INLINE void Ifx__isync(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1439
Ifx__cacheai
IFX_INLINE void Ifx__cacheai(uint8 *p)
Definition: IfxCpu_IntrinsicsGnuc2G.h:1611
Ifx__mins
IFX_INLINE sint16 Ifx__mins(sint16 a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:183
Ifx__round16
asm sfract Ifx__round16(fract a)
Definition: IfxCpu_IntrinsicsDcc.h:288
Ifx__sethw1
asm volatile void Ifx__sethw1(__packhw *a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:1084
Ifx__crc32
IFX_INLINE uint32 Ifx__crc32(uint32 b, uint32 a)
Definition: IfxCpu_IntrinsicsGnuc2G.h:1564
Ifx__cacheawi
#define Ifx__cacheawi
Definition: IfxCpu_IntrinsicsDcc.h:504
Ifx__getubyte3
asm volatile uint8 Ifx__getubyte3(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:794
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx__fract_to_sfract
IFX_INLINE sfract Ifx__fract_to_sfract(fract a)
Definition: IfxCpu_IntrinsicsGnuc.h:266
Ifx__insertbyte3
asm __packb Ifx__insertbyte3(__packb a, sint8 b)
Insert sint8 into third byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:910
Ifx__parity
asm volatile sint32 Ifx__parity(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1246
Ifx__rol
asm volatile uint32 Ifx__rol(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsDcc.h:552
Ifx__shaaccum
asm laccum Ifx__shaaccum(laccum a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:338
Ifx__sfract_to_u16
asm volatile uint16 Ifx__sfract_to_u16(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:328
Ifx__insert
#define Ifx__insert
Definition: IfxCpu_IntrinsicsDcc.h:423
Ifx__setbyte4
asm volatile void Ifx__setbyte4(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1073
Ifx__cls
IFX_INLINE sint32 Ifx__cls(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1278
Ifx__non_return_call
#define Ifx__non_return_call(fun)
Definition: IfxCpu_IntrinsicsGnuc2G.h:68
Ifx__subs
#define Ifx__subs(a, b)
Definition: IfxCpu_IntrinsicsTasking.h:230
Ifx__mulfractfract
#define Ifx__mulfractfract(fractvalue1, fractvalue2)
Definition: IfxCpu_IntrinsicsTasking.h:164
Ifx__fabsf
asm float Ifx__fabsf(float f)
Definition: IfxCpu_IntrinsicsDcc.h:1225
sint32
long sint32
Definition: Platform_Types.h:134
Ifx__getubyte4
asm volatile uint8 Ifx__getubyte4(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:804
Ifx__getfract
asm fract Ifx__getfract(laccum a)
Definition: IfxCpu_IntrinsicsDcc.h:235
Ifx__clo
IFX_INLINE sint32 Ifx__clo(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1269
Ifx__setubyte2
asm volatile void Ifx__setubyte2(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1117
Ifx__swap
asm volatile uint32 Ifx__swap(void *place, uint32 value)
Definition: IfxCpu_IntrinsicsDcc.h:1431
Ifx__extracthw1
asm short Ifx__extracthw1(__packhw a)
Extract first short from a __packhw.
Definition: IfxCpu_IntrinsicsDcc.h:642
Ifx__nop
IFX_INLINE void Ifx__nop(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1455
Ifx__insertubyte1
asm __upackb Ifx__insertubyte1(__upackb a, uint8 b)
Insert uint8 into first unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:946
Ifx__jumpToFunction
IFX_INLINE void Ifx__jumpToFunction(const void *fun)
Definition: IfxCpu_IntrinsicsGnuc2G.h:99
Ifx__ins
IFX_INLINE sint32 Ifx__ins(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
Definition: IfxCpu_IntrinsicsGnuc.h:468
Ifx__initpackb
asm __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
Definition: IfxCpu_IntrinsicsDcc.h:834
Ifx__getuhw2
asm volatile uint16 Ifx__getuhw2(__upackhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:824
Ifx__inserthw2
asm __packhw Ifx__inserthw2(__packhw a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:937
Ifx__insn
IFX_INLINE sint32 Ifx__insn(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
Definition: IfxCpu_IntrinsicsGnuc.h:489
Ifx__minbu
asm __upackb Ifx__minbu(__upackb a, __upackb b)
Definition: IfxCpu_IntrinsicsDcc.h:1013
Ifx__cmpAndSwap
IFX_INLINE unsigned int Ifx__cmpAndSwap(unsigned int volatile *address, unsigned int value, unsigned int condition)
This function is a implementation of a binary semaphore using compare and swap instruction.
Definition: IfxCpu_IntrinsicsGnuc2G.h:1519
Ifx__setbyte3
asm volatile void Ifx__setbyte3(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1062
Ifx__initpackbl
asm __packb Ifx__initpackbl(long a)
Definition: IfxCpu_IntrinsicsDcc.h:845
Ifx__mulfractlong
#define Ifx__mulfractlong
Definition: IfxCpu_IntrinsicsTasking.h:162
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx__extracthw2
asm short Ifx__extracthw2(__packhw a)
Extract second short from a __packhw.
Definition: IfxCpu_IntrinsicsDcc.h:651
sint8
signed char sint8
Definition: Platform_Types.h:125
Ifx__abssh
asm __packhw Ifx__abssh(__packhw a)
Definition: IfxCpu_IntrinsicsDcc.h:597
Ifx__setbyte1
asm volatile void Ifx__setbyte1(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1040
Ifx__popcnt
IFX_INLINE sint32 Ifx__popcnt(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc2G.h:1602


iLLD_TC26B: IfxCpu_IntrinsicsGnuc.h Source File

  • Cpu
  • Std
IfxCpu_IntrinsicsGnuc.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_IntrinsicsGnuc.h
3 *
4 * \version iLLD_1_0_1_12_0
5 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup IfxLld_Cpu_Intrinsics_Gnuc Intrinsics for GNU compiler
41 * \ingroup IfxLld_Cpu_Intrinsics
42 *
43 */
44
45 #ifndef IFXCPU_INTRINSICSGNUC_H
46 #define IFXCPU_INTRINSICSGNUC_H
47
48 /* old style intrinsics handling for AGENtiX environment */
49 #if defined(SCTB_EMBEDDED)
50 # define IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 0
51 #else
52 # define IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 1
53 #endif
54
55 /******************************************************************************/
56 #include "Ifx_Types.h"
57
58 #if IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
59 #include "machine/intrinsics.h"
60 #endif
61
62 /******************************************************************************/
63 /* *INDENT-OFF* */
64 #define STRINGIFY(x) #x
65
66 /** Function call without return
67 */
68 #define Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
69
70 /** Jump and link
71 */
72 IFX_INLINE void Ifx__jump_and_link(void (*fun)(void))
73 {
74 __asm__ volatile ("jli %0"::"a"(fun));
75 }
76
77 IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
78 {
79 __asm__ volatile ("mov\t %%d4, %0"::"d"(var));
80 }
81
82 IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
83 {
84 __asm__ volatile ("mov\t %%d2, %0"::"d"(var));
85 }
86
87 IFX_INLINE unsigned int Ifx__getDataParamRet(void)
88 {
89 unsigned int var;
90 __asm__ volatile (" mov\t %0, %%d2":"=d"(var));
91 return var;
92 }
93
94 IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
95 {
96 __asm__ volatile ("mov.aa\t %%a4, %0"::"a"(var));
97 }
98
99 IFX_INLINE void Ifx__jumpToFunction(const void *fun)
100 {
101 Ifx__non_return_call(fun);
102 }
103
104 IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
105 {
106 Ifx__jump_and_link((void (*)(void))fun);
107 }
108
109 IFX_INLINE void Ifx__jumpBackToLink(void)
110 {
111 __asm__ volatile ("ji %a11");
112 }
113 /** \defgroup IfxLld_Cpu_Intrinsics_Gnuc_any_type Cross type arithmetic operation
114 *
115 * Macro compatible with float, fix point, signed integer and unsigned integer
116 *
117 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
118 * \{
119 */
120 #define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
121 #define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
122 #define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
123 #define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
124 /** \} */
125
126 /** \defgroup IfxLld_Cpu_Intrinsics_Gnuc_singed_integer Signed integer operation
127 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
128 * \{
129 */
130 #define Ifx__saturate(X,Min,Max) ( Ifx__min(Ifx__max(X, Min), Max) )
131 /** \} */
132
133 /** \defgroup IfxLld_Cpu_Intrinsics_Gnuc_unsinged_integer Unsigned integer operation
134 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
135 * \{
136 */
137 #define Ifx__saturateu(X,Min,Max) ( Ifx__minu(Ifx__maxu(X, Min), Max) )
138 /** \} */
139
140 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucmin_max Minimum and Maximum of (sint16) Integers
141 These intrinsic functions return the minimum or maximum of a sint16, uint16 or sint16
142 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
143 * \{
144 */
145
146 /** Return maximum of two integers
147 */
148 IFX_INLINE sint32 Ifx__max(sint32 a, sint32 b)
149 {
150 sint32 res;
151 __asm__ volatile ("max %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
152 return res;
153 }
154
155 /** Return maximum of two sint16
156 */
157 IFX_INLINE sint32 Ifx__maxs(sint16 a, sint16 b)
158 {
159 sint32 res;
160 __asm__ volatile ("max.h %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
161 return res;
162 }
163 /** Return maximum of two unsigned integers
164 */
165 IFX_INLINE uint32 Ifx__maxu(uint32 a, uint32 b)
166 {
167 uint32 res;
168 __asm__ volatile ("max.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
169 return res;
170 }
171
172 /** Return minimum of two integers
173 */
174 IFX_INLINE sint32 Ifx__min(sint32 a, sint32 b)
175 {
176 sint32 res;
177 __asm__ volatile ("min %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
178 return res;
179 }
180
181 /** Return minimum of two sint16
182 */
183 IFX_INLINE sint16 Ifx__mins(sint16 a, sint16 b)
184 {
185 sint16 res;
186 __asm__ volatile ("min.h %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
187 return res;
188 }
189
190 /** Return minimum of two unsigned integers
191 */
192 IFX_INLINE uint32 Ifx__minu(uint32 a, uint32 b)
193 {
194 uint32 res;
195 __asm__ volatile ("min.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
196 return res;
197 }
198
199 /** \} */
200
201 /** \defgroup intrinsicsgnuc_float Floating point operation
202 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
203 * \{
204 */
205
206 #define Ifx__sqrf(X) ((X) * (X))
207 #define Ifx__sqrtf(X) sqrtf(X)
208 #define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
209
210 #define Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
211 #define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
212 #define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
213 #define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
214 #define Ifx__saturatef(X,Min,Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
215 #define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
216
217 #define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
218 #define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
219 #define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
220 #define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
221
222 #define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
223 #define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
224 #define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
225 /** \} */
226
227 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucfractional Fractional Arithmetic Support
228 The next table provides an overview of intrinsic functions to convert fractional values. Note that the
229 TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
230 need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
231 compiler does support these functions.
232 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
233 * \{
234 */
235
236 /** Count the consecutive number of bits that have the same value as bit 15 of an sfract
237 */
238 IFX_INLINE sint16 Ifx__clssf(sfract a)
239 {
240 sint16 res;
241 __asm__ volatile ("sh %1,%1,16 \n\
242 cls %0,%1":"=d"(res):"d"(a):"memory");
243 return res;
244 }
245
246 /** Convert fract to float
247 */
248 IFX_INLINE float Ifx__fract_to_float(fract a)
249 {
250 float res;
251 __asm__ volatile ("q31tof %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
252 return res;
253 }
254
255 /** Convert float to fract
256 */
257 IFX_INLINE fract Ifx__float_to_fract(float a)
258 {
259 fract res;
260 __asm__ volatile ("ftoq31 %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
261 return res;
262 }
263
264 /** Convert fract to sfract
265 */
266 IFX_INLINE sfract Ifx__fract_to_sfract(fract a)
267 {
268 sfract res;
269 __asm__ volatile ("mov.u %0,0x8000 \n\
270 adds %0,%1 \n\
271 extr %0,%0,0x10,0x10 "
272 :"=&d"(res):"d"(a):"memory");
273 return res;
274 }
275
276 /** Convert float to sfract
277 */
278 IFX_INLINE sfract Ifx__float_to_sfract(float a)
279 {
280 fract tmp = Ifx__float_to_fract(a);
281 return Ifx__fract_to_sfract(tmp);
282 }
283
284 /** Convert laccum to fract
285 */
286 IFX_INLINE fract Ifx__getfract(laccum a)
287 {
288 fract res;
289 __asm__ volatile ("dextr %0,%H1,%L1,0x11":"=&d" (res):"d" (a):"memory");
290 return res;
291 }
292
293 /** Multiply-add with rounding. Returns the rounded result of ( a + b * c )
294 */
295 IFX_INLINE sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
296 {
297 sfract res;
298 __asm__ volatile ("sh %1,%1,16 \n\
299 maddrs.q %0,%1,%2L,%3L,1 \n\
300 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
301 return res;
302 }
303
304 /** Multiply-add sfract. Returns ( a + b * c )
305 */
306 IFX_INLINE sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
307 {
308 sfract res;
309 __asm__ volatile ("sh %1,%1,16 \n\
310 madds.q %0,%1,%2L,%3L,1 \n\
311 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
312 return res;
313 }
314
315 /** Integer part of the multiplication of a fract and a fract
316 */
317 IFX_INLINE long Ifx__mulfractfract(fract a, fract b)
318 {
319 long res;
320 __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
321 return res;
322 }
323
324 /** Integer part of the multiplication of a fract and a long
325 */
326 IFX_INLINE long Ifx__mulfractlong(fract a, long b)
327 {
328 long res;
329 __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
330 return res;
331 }
332
333 /** Convert fract to sfract
334 */
335 IFX_INLINE sfract Ifx__round16(fract a)
336 {
337 sfract res;
338 __asm__ volatile ("mov.u %0,0x8000 \n\
339 adds %0,%1 \n\
340 insert %0,%0,0,0,0x10 \n\
341 sh %0,%0,-16"
342 :"=&d"(res):"d"(a):"memory");
343 return res;
344 }
345
346 /** Convert signed sint16 to sfract
347 */
348 IFX_INLINE sfract Ifx__s16_to_sfract(sint16 a)
349 {
350 sfract res;
351 __asm__ volatile ("sh %0,%1,16 \n\
352 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
353 return res;
354 }
355
356 /** Convert sfract to sint16
357 */
358 IFX_INLINE sint16 Ifx__sfract_to_s16(sfract a)
359 {
360 sint16 res;
361 __asm__ volatile ("sh %1,%1,16 \n\
362 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
363 return res;
364 }
365
366 /** Convert sfract to uint16
367 */
368 IFX_INLINE uint16 Ifx__sfract_to_u16(sfract a)
369 {
370 uint16 res;
371 __asm__ volatile ("sh %1,%1,16 \n\
372 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
373 return res;
374 }
375
376 /** Left/right shift of an laccum
377 */
378 IFX_INLINE laccum Ifx__shaaccum(laccum a, sint32 b)
379 {
380 laccum res;
381 __asm__ volatile ("jge %2,0,0f \n\
382 sha %H0,%H1,%2 \n\
383 rsub %2,%2,0 \n\
384 dextr %L0,%H1,%L1,%2 \n\
385 j 1f \n\
386 0:dextr %H0,%H1,%L1,%2 \n\
387 sha %L0,%L1,%2 \n\
388 1:"
389 :"=d"(res):"d"(a), "d"(b):"memory");
390 return res;
391 }
392
393 /** Left/right shift of an fract
394 */
395 IFX_INLINE fract Ifx__shafracts(fract a, sint32 b)
396 {
397 fract res;
398 __asm__ volatile ("shas %0,%1,%2":"=d"(res):"d"(a), "d"(b):"memory");
399 return res;
400 }
401
402 /** Left/right shift of an sfract
403 */
404 IFX_INLINE sfract Ifx__shasfracts(sfract a, sint32 b)
405 {
406 sfract res;
407 __asm__ volatile ("shas %0,%1,%2":"=d"(res):"d"(a), "d"(b):"memory");
408 return res;
409 }
410
411 /** Convert uint16 to sfract
412 */
413 IFX_INLINE sfract Ifx__u16_to_sfract(uint16 a)
414 {
415 sfract res;
416 __asm__ volatile ("sh %0,%1,16 \n\
417 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
418 return res;
419 }
420
421 /** \} */
422
423 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucinsert Insert / Extract Bit-fields and Bits
424 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
425 * \{
426 */
427
428 /** Extract a bit-field (bit pos to bit pos+width) from value
429 */
430 IFX_INLINE sint32 Ifx__extr(sint32 a, uint32 p, uint32 w)
431 {
432 sint32 res;
433 __asm__ volatile ("mov %%d14,%2 \n\
434 mov %%d15,%3 \n\
435 extr %0,%1,%%e14"
436 : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
437 return res;
438 }
439
440 /** Same as __extr() but return bit-field as unsigned integer
441 */
442 IFX_INLINE uint32 Ifx__extru(uint32 a, uint32 p, uint32 w)
443 {
444 uint32 res;
445 __asm__ volatile ("mov %%d14,%2 \n\
446 mov %%d15,%3 \n\
447 extr.u %0,%1,%%e14"
448 : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
449 return res;
450 }
451
452 /** Load a single bit.
453 */
454 //#define __getbit(address,bitoffset ) __extru( *(address), bitoffset, 1 )
455 #define Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
456
457 /** Atomic load-modify-store.
458 */
459 #define Ifx__imaskldmst(address, value, bitoffset, bits) \
460 {long long tmp;\
461 __asm__("imask %A0,%1,%2,%3"\
462 :"=d"((long long)tmp)\
463 :"d"(value),"d"(bitoffset),"i"(bits): "memory");\
464 __asm__("ldmst [%0]0,%A1"::"a"(address),"d"(tmp): "memory");}
465
466 /** Return trg but replace trgbit by srcbit in src.
467 */
468 IFX_INLINE sint32 Ifx__ins(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
469 {
470 sint32 res;
471 __asm__ volatile ("ins.t %0,%1,%2,%3,%4":"=d"(res):"d"(trg), "i"(trgbit), "d"(src), "i"(srcbit));
472 return res;
473 }
474
475 /** Extract bit-field (width bits starting at bit 0) from src and insert it in trg at pos.
476 */
477 IFX_INLINE sint32 Ifx__insert(sint32 a, sint32 b, sint32 p, const sint32 w)
478 {
479 sint32 res;
480 __asm__ volatile ("mov %%d14,%3 \n\
481 mov %%d15,%4 \n\
482 insert %0,%1,%2,%%e14"
483 :"=d"(res):"d"(a), "d"(b), "d"(p), "d"(w):"d14", "d15");
484 return res;
485 }
486
487 /** Return trg but replace trgbit by inverse of srcbit in src.
488 */
489 IFX_INLINE sint32 Ifx__insn(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
490 {
491 sint32 res;
492 __asm__ volatile ("insn.t %0,%1,%2,%3,%4":"=d"(res):"d"(trg), "i"(trgbit), "d"(src), "i"(srcbit));
493 return res;
494 }
495
496 /** Store a single bit.
497 */
498 #define Ifx__putbit(value,address,bitoffset ) Ifx__imaskldmst(address, value, bitoffset,1)
499
500 /** \} */
501
502 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucinterrupt_handling Interrupt Handling
503 The next table provides an overview of the intrinsic functions to read or set interrupt handling.
504 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
505 * \{
506 */
507
508 #if !IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
509 /** Set CPU priority number [0..255] (or [0..1023] for TriCore 1.6.x) and enable interrupts immediately at function entry
510 */
511 #define Ifx__bisr(intlvl) __asm__ volatile ("bisr "#intlvl : : : "memory")
512 #endif
513
514 /** Disable interrupts. Only supported for TriCore1
515 */
516 #define Ifx__disable() __asm__ volatile ("disable" : : : "memory")
517
518 /** Disable interrupts and return previous interrupt state (enabled or disabled). Direct supported for TriCore1.6. Emulated on TC1.3.1
519 */
520 IFX_INLINE sint32 Ifx__disable_and_save(void)
521 {
522 sint32 res;
523 __asm__ volatile("disable %0":"=d"(res));
524 return res;
525 }
526
527 /** Enable interrupts immediately at function entry
528 */
529 #define Ifx__enable() __asm__ volatile ("enable" : : : "memory")
530
531 /** Restore interrupt state. Direct supported for TriCore1.6. Emulated on TC1.3.1
532 */
533 IFX_INLINE void Ifx__restore(sint32 ie)
534 {
535 __asm__ volatile ("restore %0"::"d"(ie));
536 }
537
538 #if !IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
539 /** Call a system call function number
540 */
541 #define Ifx__syscall(svcno) __tric_syscall(svcno)
542 #define Ifx__tric_syscall(svcno) __asm__ volatile ("syscall "STRINGIFY(svcno) : : : "memory")
543 #endif
544
545 /** \} */
546
547 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucmiscellaneous Miscellaneous Intrinsic Functions
548 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
549 * \{
550 */
551
552 /** Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].
553 */
554 IFX_INLINE void Ifx__cacheawi(uint8* p)
555 {
556 __asm__ volatile("cachea.wi [%0]0"::"a"(p));
557 }
558 /** Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].
559 */
560 IFX_INLINE void Ifx__cacheiwi(uint8* p)
561 {
562 __asm__ volatile("cachei.wi [%0]0"::"a"(p));
563 }
564
565 /** Write back and invalidate cache address \"p\" and return post incremented
566 * value of \"p\". Generates CACHEA.WI [Ab+].
567 */
568 IFX_INLINE uint8* Ifx__cacheawi_bo_post_inc(uint8* p)
569 {
570 __asm__ volatile("cachea.wi [%0+]0"::"a"(p));
571 return p;
572 }
573
574 /** Multiply two 32-bit numbers to an intermediate 64-bit result, and scale
575 * back the result to 32 bits. To scale back the result, 32 bits are extracted
576 * from the intermediate 64-bit result: bit 63-offset to bit 31-offset.
577 */
578 IFX_INLINE sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
579 {
580 sint32 res;
581 __asm__ volatile("mul %%e12,%1,%2 \n\
582 dextr %0,%%d13,%%d12,%3"
583 :"=d"(res):"d"(a), "d"(b), "d"(offset):"d12", "d13");
584 return res;
585 }
586
587 /** Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).
588 */
589 IFX_INLINE uint32 Ifx__rol(uint32 operand, uint32 count)
590 {
591 uint32 res;
592 __asm__ volatile("dextr %0,%1,%1,%2":"=d"(res):"d"(operand), "d"(count):"memory");
593 return res;
594 }
595
596 /** Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).
597 */
598 IFX_INLINE uint32 Ifx__ror(uint32 operand, uint32 count)
599 {
600 uint32 res;
601 __asm__ volatile("rsub %2,%2,0 \n\
602 dextr %0,%1,%1,%2"
603 :"=d"(res):"d"(operand), "d"(count):"memory");
604 return res;
605 }
606 /** \} */
607
608 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucpacked Packed Data Type Support
609 The next table provides an overview of the intrinsic functions for initialization of packed data type.
610 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
611 * \{
612 */
613
614 /** Absolute value of __packb
615 */
616 IFX_INLINE __packb Ifx__absb(__packb a)
617 {
618 __packb res;
619 __asm__ volatile ("abs.b %0,%1"
620 :"=d"(res):"d"(a):"memory");
621 return res;
622 }
623
624 /** Absolute value of __packhw
625 */
626 IFX_INLINE __packhw Ifx__absh(__packhw a)
627 {
628 __packhw res;
629 __asm__ volatile ("abs.h %0,%1"
630 :"=d"(res):"d"(a):"memory");
631 return res;
632 }
633
634 /** Absolute value of __packhw using saturation
635 */
636 IFX_INLINE __packhw Ifx__abssh(__packhw a)
637 {
638 __packb res;
639 __asm__ volatile ("abss.h %0,%1"
640 :"=d"(res):"d"(a):"memory");
641 return res;
642 }
643
644 /** Extract first byte from a __packb
645 */
646 IFX_INLINE sint8 Ifx__extractbyte1(__packb a)
647 {
648 sint8 res;
649 __asm__ volatile ("extr %0,%1,0,8"
650 :"=d"(res):"d"(a):"memory");
651 return res;
652 }
653
654 /** Extract second byte from a __packb
655 */
656 IFX_INLINE sint8 Ifx__extractbyte2(__packb a)
657 {
658 sint8 res;
659 __asm__ volatile ("extr %0,%1,8,8"
660 :"=d"(res):"d"(a):"memory");
661 return res;
662 }
663
664 /** Extract third byte from a __packb
665 */
666 IFX_INLINE sint8 Ifx__extractbyte3(__packb a)
667 {
668 sint8 res;
669 __asm__ volatile ("extr %0,%1,16,8"
670 :"=d"(res):"d"(a):"memory");
671 return res;
672 }
673
674 /** Extract fourth byte from a __packb
675 */
676 IFX_INLINE sint8 Ifx__extractbyte4(__packb a)
677 {
678 sint8 res;
679 __asm__ volatile ("extr %0,%1,24,8"
680 :"=d"(res):"d"(a):"memory");
681 return res;
682 }
683
684 /** Extract first sint16 from a __packhw
685 */
686 IFX_INLINE sint16 Ifx__extracthw1(__packhw a)
687 {
688 sint16 res;
689 __asm__ volatile ("extr %0,%1,0,16"
690 :"=d"(res):"d"(a):"memory");
691 return res;
692 }
693
694 /** Extract second sint16 from a __packhw
695 */
696 IFX_INLINE sint16 Ifx__extracthw2(__packhw a)
697 {
698 sint16 res;
699 __asm__ volatile ("extr %0,%1,16,16"
700 :"=d"(res):"d"(a):"memory");
701 return res;
702 }
703
704 /** Extract first uint8 from a __packb
705 */
706 IFX_INLINE uint8 Ifx__extractubyte1(__upackb a)
707 {
708 uint8 res;
709 __asm__ volatile ("extr %0,%1,0,8"
710 :"=d"(res):"d"(a):"memory");
711 return res;
712 }
713
714 /** Extract second uint8 from a __packb
715 */
716 IFX_INLINE uint8 Ifx__extractubyte2(__upackb a)
717 {
718 uint8 res;
719 __asm__ volatile ("extr %0,%1,8,8"
720 :"=d"(res):"d"(a):"memory");
721 return res;
722 }
723
724 /** Extract third uint8 from a __packb
725 */
726 IFX_INLINE uint8 Ifx__extractubyte3(__upackb a)
727 {
728 uint8 res;
729 __asm__ volatile ("extr %0,%1,16,8"
730 :"=d"(res):"d"(a):"memory");
731 return res;
732 }
733
734 /** Extract fourth uint8 from a __packb
735 */
736 IFX_INLINE uint8 Ifx__extractubyte4(__upackb a)
737 {
738 uint8 res;
739 __asm__ volatile ("extr %0,%1,24,8"
740 :"=d"(res):"d"(a):"memory");
741 return res;
742 }
743
744 /** Extract first uint16 from a __packhw
745 */
746 IFX_INLINE uint16 Ifx__extractuhw1(__upackhw a)
747 {
748 uint16 res;
749 __asm__ volatile ("extr %0,%1,0,16"
750 :"=d"(res):"d"(a):"memory");
751 return res;
752 }
753
754 /** Extract second uint16 from a __packhw
755 */
756 IFX_INLINE uint16 Ifx__extractuhw2(__upackhw a)
757 {
758 uint16 res;
759 __asm__ volatile ("extr %0,%1,16,16"
760 :"=d"(res):"d"(a):"memory");
761 return res;
762 }
763
764 /** Extract first byte from a __packb
765 */
766 IFX_INLINE sint8 Ifx__getbyte1(__packb* a)
767 {
768 sint8 res;
769 __asm__ volatile ("ld.w %0,[%1]0 \n\
770 extr %0,%0,0,8"
771 :"=d"(res):"a"(a):"memory");
772 return res;
773
774 }
775
776 /** Extract second byte from a __packb
777 */
778 IFX_INLINE sint8 Ifx__getbyte2(__packb* a)
779 {
780 sint8 res;
781 __asm__ volatile ("ld.w %0,[%1]0 \n\
782 extr %0,%0,8,8"
783 :"=d"(res):"a"(a):"memory");
784 return res;
785
786 }
787
788 /** Extract third byte from a __packb
789 */
790 IFX_INLINE sint8 Ifx__getbyte3(__packb* a)
791 {
792 sint8 res;
793 __asm__ volatile ("ld.w %0,[%1]0 \n\
794 extr %0,%0,16,8"
795 :"=d"(res):"a"(a):"memory");
796 return res;
797
798 }
799
800 /** Extract fourth byte from a __packb
801 */
802 IFX_INLINE sint8 Ifx__getbyte4(__packb* a)
803 {
804 sint8 res;
805 __asm__ volatile ("ld.w %0,[%1]0 \n\
806 extr %0,%0,24,8"
807 :"=d"(res):"a"(a):"memory");
808 return res;
809
810 }
811
812 /** Extract first sint16 from a __packhw
813 */
814 IFX_INLINE sint16 Ifx__gethw1(__packhw* a)
815 {
816 sint16 res;
817 __asm__ volatile ("ld.w %0,[%1]0 \n\
818 extr %0,%0,0,16"
819 :"=d"(res):"a"(a):"memory");
820 return res;
821 }
822 /** Extract second sint16 from a __packhw
823 */
824 IFX_INLINE sint16 Ifx__gethw2(__packhw* a)
825 {
826 sint16 res;
827 __asm__ volatile ("ld.w %0,[%1]0 \n\
828 extr %0,%0,16,16"
829 :"=d"(res):"a"(a):"memory");
830 return res;
831 }
832
833 /** Extract first uint8 from a __packb
834 */
835 IFX_INLINE uint8 Ifx__getubyte1(__upackb* a)
836 {
837 uint8 res;
838 __asm__ volatile ("ld.w %0,[%1]0 \n\
839 extr %0,%0,0,8"
840 :"=d"(res):"a"(a):"memory");
841 return res;
842 }
843
844 /** Extract second uint8 from a __packb
845 */
846 IFX_INLINE uint8 Ifx__getubyte2(__upackb* a)
847 {
848 uint8 res;
849 __asm__ volatile ("ld.w %0,[%1]0 \n\
850 extr %0,%0,8,8"
851 :"=d"(res):"a"(a):"memory");
852 return res;
853 }
854
855 /** Extract third uint8 from a __packb
856 */
857 IFX_INLINE uint8 Ifx__getubyte3(__upackb* a)
858 {
859 uint8 res;
860 __asm__ volatile ("ld.w %0,[%1]0 \n\
861 extr %0,%0,16,8"
862 :"=d"(res):"a"(a):"memory");
863 return res;
864 }
865
866 /** Extract fourth uint8 from a __packb
867 */
868 IFX_INLINE uint8 Ifx__getubyte4(__upackb* a)
869 {
870 uint8 res;
871 __asm__ volatile ("ld.w %0,[%1]0 \n\
872 extr %0,%0,24,8"
873 :"=d"(res):"a"(a):"memory");
874 return res;
875 }
876
877 /** Extract first uint16 from a __packhw
878 */
879 IFX_INLINE uint16 Ifx__getuhw1(__upackhw* a)
880 {
881 uint16 res;
882 __asm__ volatile ("ld.w %0,[%1]0 \n\
883 extr %0,%0,0,16"
884 :"=d"(res):"a"(a):"memory");
885 return res;
886 }
887
888 /** Extract second uint16 from a __packhw
889 */
890 IFX_INLINE uint16 Ifx__getuhw2(__upackhw* a)
891 {
892 uint16 res;
893 __asm__ volatile ("ld.w %0,[%1]0 \n\
894 extr %0,%0,16,16"
895 :"=d"(res):"a"(a):"memory");
896 return res;
897 }
898
899 /** Initialize __packb with four integers
900 */
901 IFX_INLINE __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
902 {
903 __packb res;
904 __asm__ volatile ("insert %3,%3,%4,8,8 \n\
905 insert %4,%1,%2,8,8 \n\
906 insert %0,%4,%3,16,16 "
907 :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
908 return res;
909 }
910
911 /** Initialize __packb with a long integer
912 */
913 IFX_INLINE __packb Ifx__initpackbl(long a)
914 {
915 return (__packb) a;
916 }
917
918 /** Initialize __packhw with two integers
919 */
920 IFX_INLINE __packhw Ifx__initpackhw(sint16 a, sint16 b)
921 {
922 __packhw res;
923 __asm__ volatile ("insert %0,%1,%2,16,16"
924 :"=d"(res):"d"(a), "d"(b):"memory");
925 return res;
926 }
927
928 /** Initialize __packhw with a long integer
929 */
930 IFX_INLINE __packhw Ifx__initpackhwl(long a)
931 {
932 return a;
933 }
934
935 /** Initialize __packb with four unsigned integers
936 */
937 IFX_INLINE __upackb Ifx__initupackb( uint32 a, uint32 b, uint32 c, uint32 d)
938 {
939 __upackb res;
940 __asm__ volatile ("insert %3,%3,%4,8,8 \n\
941 insert %1,%1,%2,8,8 \n\
942 insert %0,%1,%3,16,16"
943 :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
944 return res;
945 }
946
947 /** Initialize __packhw with two unsigned integers
948 */
949 IFX_INLINE __upackhw Ifx__initupackhw( uint16 a, uint16 b)
950 {
951 __upackhw res;
952 __asm__ volatile ("insert %0,%1,%2,16,16"
953 :"=d"(res):"d"(a), "d"(b):"memory");
954 return res;
955 }
956
957 /** Insert sint8 into first byte of a __packb
958 */
959 IFX_INLINE __packb Ifx__insertbyte1(__packb a, sint8 b)
960 {
961 __packb res;
962 __asm__ volatile ("insert %0,%1,%2,0,8"
963 :"=d"(res):"d"(a), "d"(b):"memory");
964 return res;
965 }
966
967 /** Insert sint8 into second byte of a __packb
968 */
969 IFX_INLINE __packb Ifx__insertbyte2(__packb a, sint8 b)
970 {
971 __packb res;
972 __asm__ volatile ("insert %0,%1,%2,8,8"
973 :"=d"(res):"d"(a), "d"(b):"memory");
974 return res;
975 }
976
977 /** Insert sint8 into third byte of a __packb
978 */
979 IFX_INLINE __packb Ifx__insertbyte3(__packb a, sint8 b)
980 {
981 __packb res;
982 __asm__ volatile ("insert %0,%1,%2,16,8"
983 :"=d"(res):"d"(a), "d"(b):"memory");
984 return res;
985 }
986
987 /** Insert sint8 into fourth byte of a __packb
988 */
989 IFX_INLINE __packb Ifx__insertbyte4(__packb a, sint8 b)
990 {
991 __packb res;
992 __asm__ volatile ("insert %0,%1,%2,24,8"
993 :"=d"(res):"d"(a), "d"(b):"memory");
994 return res;
995 }
996
997 /** Insert sint8 into first uint8 of a __packb
998 */
999 IFX_INLINE __upackb Ifx__insertubyte1( __upackb a, uint8 b)
1000 {
1001 __upackb res;
1002 __asm__ volatile ("insert %0,%1,%2,0,8"
1003 :"=d"(res):"d"(a), "d"(b):"memory");
1004 return res;
1005 }
1006
1007 /** Insert sint8 into second uint8 of a __packb
1008 */
1009 IFX_INLINE __upackb Ifx__insertubyte2( __upackb a, uint8 b)
1010 {
1011 __upackb res;
1012 __asm__ volatile ("insert %0,%1,%2,8,8"
1013 :"=d"(res):"d"(a), "d"(b):"memory");
1014 return res;
1015 }
1016
1017 /** Insert sint8 into third uint8 of a __packb
1018 */
1019 IFX_INLINE __upackb Ifx__insertubyte3( __upackb a, uint8 b)
1020 {
1021 __upackb res;
1022 __asm__ volatile ("insert %0,%1,%2,16,8"
1023 :"=d"(res):"d"(a), "d"(b):"memory");
1024 return res;
1025 }
1026
1027 /** Insert sint8 into fourth uint8 of a __packb
1028 */
1029 IFX_INLINE __upackb Ifx__insertubyte4( __upackb a, uint8 b)
1030 {
1031 __upackb res;
1032 __asm__ volatile ("insert %0,%1,%2,24,8"
1033 :"=d"(res):"d"(a), "d"(b):"memory");
1034 return res;
1035 }
1036
1037 /** Insert sint16 into first halfword of a __packhw
1038 */
1039 IFX_INLINE __packhw Ifx__inserthw1(__packhw a, sint16 b)
1040 {
1041 __packhw res;
1042 __asm__ volatile ("insert %0,%1,%2,0,16"
1043 :"=d"(res):"d"(a), "d"(b):"memory");
1044 return res;
1045 }
1046
1047 /** Insert sint16 into second halfword of a __packhw
1048 */
1049 IFX_INLINE __packhw Ifx__inserthw2(__packhw a, sint16 b)
1050 {
1051 __packhw res;
1052 __asm__ volatile ("insert %0,%1,%2,16,16"
1053 :"=d"(res):"d"(a), "d"(b):"memory");
1054 return res;
1055 }
1056
1057 /** Insert uint16 into first halfword of a __upackhw
1058 */
1059 IFX_INLINE __upackhw Ifx__insertuhw1( __upackhw a, uint16 b)
1060 {
1061 __upackhw res;
1062 __asm__ volatile ("insert %0,%1,%2,0,16"
1063 :"=d"(res):"d"(a), "d"(b):"memory");
1064 return res;
1065 }
1066
1067 /** Insert uint16 into second halfword of a __upackhw
1068 */
1069 IFX_INLINE __upackhw Ifx__insertuhw2( __upackhw a, uint16 b)
1070 {
1071 __upackhw res;
1072 __asm__ volatile ("insert %0,%1,%2,16,16"
1073 :"=d"(res):"d"(a), "d"(b):"memory");
1074 return res;
1075 }
1076
1077 /** Minimum of two __packb values
1078 */
1079 IFX_INLINE __packb Ifx__minb(__packb a, __packb b)
1080 {
1081 __packb res;
1082 __asm__ volatile ("min.b %0,%1,%2"
1083 :"=d"(res):"d"(a), "d"(b):"memory");
1084 return res;
1085 }
1086
1087 /** Minimum of two __upackb values
1088 */
1089 IFX_INLINE __upackb Ifx__minbu( __upackb a, __upackb b)
1090 {
1091 __upackb res;
1092 __asm__ volatile ("min.bu %0,%1,%2"
1093 :"=d"(res):"d"(a), "d"(b):"memory");
1094 return res;
1095 }
1096
1097 /** Minimum of two __packhw values
1098 */
1099 IFX_INLINE __packhw Ifx__minh(__packhw a, __packhw b)
1100 {
1101 __packhw res;
1102 __asm__ volatile ("min.h %0,%1,%2"
1103 :"=d"(res):"d"(a), "d"(b):"memory");
1104 return res;
1105 }
1106
1107 /** Minimum of two __upackhw values
1108 */
1109 IFX_INLINE __upackhw Ifx__minhu( __upackhw a, __upackhw b)
1110 {
1111 __upackhw res;
1112 __asm__ volatile ("min.hu %0,%1,%2"
1113 :"=d"(res):"d"(a), "d"(b):"memory");
1114 return res;
1115 }
1116
1117 /** Insert sint8 into first byte of a __packb
1118 */
1119 IFX_INLINE void Ifx__setbyte1(__packb* a, sint8 b)
1120 {
1121 __asm__ volatile ("ld.w %%d15,[%0] \n\
1122 insert %%d15,%%d15,%1,0,8 \n\
1123 st.w [%0],%%d15"
1124 ::"a"(a), "d"(b):"d15", "memory");
1125 }
1126
1127 /** Insert sint8 into second byte of a __packb
1128 */
1129 IFX_INLINE void Ifx__setbyte2(__packb* a, sint8 b)
1130 {
1131 __asm__ volatile ("ld.w %%d15,[%0] \n\
1132 insert %%d15,%%d15,%1,8,8 \n\
1133 st.w [%0],%%d15"
1134 ::"a"(a), "d"(b):"d15", "memory");
1135 }
1136
1137 /** Insert sint8 into third byte of a __packb
1138 */
1139 IFX_INLINE void Ifx__setbyte3(__packb* a, sint8 b)
1140 {
1141 __asm__ volatile ("ld.w %%d15,[%0] \n\
1142 insert %%d15,%%d15,%1,16,8 \n\
1143 st.w [%0],%%d15"
1144 ::"a"(a), "d"(b):"d15", "memory");
1145 }
1146
1147 /** Insert sint8 into fourth byte of a __packb
1148 */
1149 IFX_INLINE void Ifx__setbyte4(__packb* a, sint8 b)
1150 {
1151 __asm__ volatile ("ld.w %%d15,[%0] \n\
1152 insert %%d15,%%d15,%1,24,8 \n\
1153 st.w [%0],%%d15"
1154 ::"a"(a), "d"(b):"d15", "memory");
1155 }
1156
1157 /** Insert sint16 into first halfword of a __packhw
1158 */
1159 IFX_INLINE void Ifx__sethw1(__packhw* a, sint16 b)
1160 {
1161 __asm__ volatile ("ld.w %%d15,[%0] \n\
1162 insert %%d15,%%d15,%1,0,16 \n\
1163 st.w [%0],%%d15"
1164 ::"a"(a), "d"(b):"d15", "memory");
1165 }
1166
1167 /** Insert sint16 into second halfword of a __packhw
1168 */
1169 IFX_INLINE void Ifx__sethw2(__packhw* a, sint16 b)
1170 {
1171 __asm__ volatile ("ld.w %%d15,[%0] \n\
1172 insert %%d15,%%d15,%1,16,16 \n\
1173 st.w [%0],%%d15"
1174 ::"a"(a), "d"(b):"d15", "memory");
1175 }
1176
1177 /** Insert uint8 into first byte of a __upackb
1178 */
1179 IFX_INLINE void Ifx__setubyte1(__upackb* a, uint8 b)
1180 {
1181 __asm__ volatile ("ld.w %%d15,[%0] \n\
1182 insert %%d15,%%d15,%1,0,8 \n\
1183 st.w [%0],%%d15"
1184 ::"a"(a), "d"(b):"d15", "memory");
1185 }
1186
1187 /** Insert uint8 into second byte of a __upackb
1188 */
1189 IFX_INLINE void Ifx__setubyte2(__upackb* a, uint8 b)
1190 {
1191 __asm__ volatile ("ld.w %%d15,[%0] \n\
1192 insert %%d15,%%d15,%1,8,8 \n\
1193 st.w [%0],%%d15"
1194 ::"a"(a), "d"(b):"d15", "memory");
1195 }
1196
1197 /** Insert uint8 into third byte of a __upackb
1198 */
1199 IFX_INLINE void Ifx__setubyte3(__upackb* a, uint8 b)
1200 {
1201 __asm__ volatile ("ld.w %%d15,[%0] \n\
1202 insert %%d15,%%d15,%1,16,8 \n\
1203 st.w [%0],%%d15"
1204 ::"a"(a), "d"(b):"d15", "memory");
1205 }
1206
1207 /** Insert uint8 into fourth byte of a __upackb
1208 */
1209 IFX_INLINE void Ifx__setubyte4(__upackb* a, uint8 b)
1210 {
1211 __asm__ volatile ("ld.w %%d15,[%0] \n\
1212 insert %%d15,%%d15,%1,24,8 \n\
1213 st.w [%0],%%d15"
1214 ::"a"(a), "d"(b):"d15", "memory");
1215 }
1216
1217 /** Insert uint16 into first halfword of a __upackhw
1218 */
1219 IFX_INLINE void Ifx__setuhw1(__upackhw* a, uint16 b)
1220 {
1221 __asm__ volatile ("ld.w %%d15,[%0] \n\
1222 insert %%d15,%%d15,%1,0,16 \n\
1223 st.w [%0],%%d15"
1224 ::"a"(a), "d"(b):"d15", "memory");
1225 }
1226
1227 /** Insert uint16 into second halfword of a __upackhw
1228 */
1229 IFX_INLINE void Ifx__setuhw2(__upackhw* a, uint16 b)
1230 {
1231 __asm__ volatile ("ld.w %%d15,[%0] \n\
1232 insert %%d15,%%d15,%1,16,16 \n\
1233 st.w [%0],%%d15"
1234 ::"a"(a), "d"(b):"d15", "memory");
1235 }
1236
1237 /** \} */
1238
1239 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucregister Register Handling
1240 The next table provides an overview of the intrinsic functions that you can use to access control registers.
1241 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
1242 * \{
1243 */
1244
1245 /** Return absolute value
1246 */
1247 #define Ifx__abs(a) __builtin_abs(a)
1248
1249 /** Return absolue difference of two integers
1250 */
1251 IFX_INLINE sint32 Ifx__absdif(sint32 a, sint32 b)
1252 {
1253 sint32 res;
1254 __asm__ volatile ("absdif %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1255 return res;
1256 }
1257
1258 /** Return absolute value with saturation
1259 */
1260 IFX_INLINE sint32 Ifx__abss(sint32 a)
1261 {
1262 sint32 res;
1263 __asm__ volatile ("abss %0, %1": "=d" (res) : "d" (a));
1264 return res;
1265 }
1266
1267 /** Count leading ones in int
1268 */
1269 IFX_INLINE sint32 Ifx__clo(sint32 a)
1270 {
1271 sint32 res;
1272 __asm__ volatile ("clo %0,%1":"=d"(res):"d"(a));
1273 return res;
1274 }
1275
1276 /** Count number of redundant sign bits (all consecutive bits with the same value as bit 31
1277 */
1278 IFX_INLINE sint32 Ifx__cls(sint32 a)
1279 {
1280 sint32 res;
1281 __asm__ volatile ("cls %0,%1":"=d"(res):"d"(a));
1282 return res;
1283 }
1284
1285 /** Count leading zeros in int
1286 */
1287 #define Ifx__clz(a) __builtin_clz(a)
1288
1289 /** Return absolute double precision floating-point value
1290 */
1291 IFX_INLINE double Ifx__fabs(double d)
1292 {
1293 double res;
1294 __asm__ volatile ("insert %0,%1,0,31,1": "=d" (res) : "d" (d):"memory");
1295 return res;
1296 }
1297
1298 /** Return absolute floating-point value
1299 */
1300 IFX_INLINE float Ifx__fabsf(float f)
1301 {
1302 float res;
1303 __asm__ volatile ("insert %0,%1,0,31,1": "=d" (res) : "d" (f):"memory");
1304 return res;
1305 }
1306
1307 #if !IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
1308 /** Move contents of the addressed core SFR into a data register
1309 */
1310 #define Ifx__mfcr(regaddr) \
1311 ({ sint32 res; __asm__ volatile ("mfcr %0,%1": "=d" (res) :"i"(regaddr): "memory"); res; })
1312
1313 //({ sint32 res; __asm__ volatile ("mfcr %0,"#regaddr : "=d" (res) : : "memory"); res; })
1314
1315 /** Move contents of a data register (second int) to the addressed core SFR (first int)
1316 */
1317 #define Ifx__mtcr(regaddr,val) __asm__ volatile ("mtcr %0,%1\n\tisync"::"i"(regaddr),"d"(val):"memory")
1318 #endif
1319
1320 /** Return parity
1321 */
1322 IFX_INLINE sint32 Ifx__parity(sint32 a)
1323 {
1324 sint32 res;
1325 __asm__ volatile ("parity %0,%1": "=d" (res) : "d" (a):"memory");
1326 return res;
1327 }
1328
1329 /** Return saturated byte
1330 */
1331 IFX_INLINE sint8 Ifx__satb(sint32 a)
1332 {
1333 sint8 res;
1334 __asm__ volatile ("sat.b %0,%1":"=d"(res):"d"(a));
1335 return res;
1336 }
1337
1338 /** Return saturated uint8
1339 */
1340 IFX_INLINE uint8 Ifx__satbu(sint32 a)
1341 {
1342 uint8 res;
1343 __asm__ volatile ("sat.bu %0,%1":"=d"(res):"d"(a));
1344 return res;
1345 }
1346
1347 /** Return saturated halfword
1348 */
1349 IFX_INLINE sint16 Ifx__sath(sint32 a)
1350 {
1351 sint8 res;
1352 __asm__ volatile ("sat.h %0,%1":"=d"(res):"d"(a));
1353 return res;
1354 }
1355
1356 /** Return saturated unsigned halfword
1357 */
1358 IFX_INLINE uint16 Ifx__sathu(sint32 a)
1359 {
1360 sint8 res;
1361 __asm__ volatile ("sat.hu %0,%1":"=d"(res):"d"(a));
1362 return res;
1363 }
1364
1365 /** \} */
1366
1367 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucsaturation Saturation Arithmetic Support
1368 These intrinsics support saturation arithmetic
1369 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
1370 * \{
1371 */
1372
1373 /** add signed with saturation
1374 */
1375 IFX_INLINE sint32 Ifx__adds(sint32 a, sint32 b)
1376 {
1377 sint32 res;
1378 __asm__ volatile ("adds %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1379 return res;
1380 }
1381
1382 /** add unsigned with saturation
1383 */
1384 IFX_INLINE uint32 Ifx__addsu(uint32 a, uint32 b)
1385 {
1386 uint32 res;
1387 __asm__ volatile ("adds.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1388 return res;
1389 }
1390
1391 /** substract signed with saturation
1392 */
1393 IFX_INLINE sint32 Ifx__subs(sint32 a, sint32 b)
1394 {
1395 sint32 res;
1396 __asm__ volatile ("subs %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1397 return res;
1398 }
1399
1400 /** substract unsigned with saturation
1401 */
1402 IFX_INLINE uint32 Ifx__subsu(uint32 a, uint32 b)
1403 {
1404 uint32 res;
1405 __asm__ volatile ("subs.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1406 return res;
1407 }
1408
1409 /** \} */
1410
1411 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucsingle_assembly Insert Single Assembly Instruction
1412 The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
1413 instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
1414 assembly instructions.
1415 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
1416 * \{
1417 */
1418
1419 /** Insert DEBUG instruction
1420 */
1421 IFX_INLINE void Ifx__debug(void)
1422 {
1423 __asm__ volatile ("debug" : : : "memory");
1424 }
1425
1426 /** Insert a memory barrier
1427 */
1428 #define Ifx__mem_barrier __asm__ volatile("":::"memory");
1429
1430 /** Insert DSYNC instruction
1431 */
1432 IFX_INLINE void Ifx__dsync(void)
1433 {
1434 __asm__ volatile ("dsync" : : : "memory");
1435 }
1436
1437 /** Insert ISYNC instruction
1438 */
1439 IFX_INLINE void Ifx__isync(void)
1440 {
1441 __asm__ volatile ("isync" : : : "memory");
1442 }
1443
1444 /** Insert LDMST instruction. Note that all operands must be word-aligned.
1445 */
1446 IFX_INLINE void Ifx__ldmst(volatile void* address, uint32 mask, uint32 value)
1447 {
1448 __asm__ volatile("mov %H2,%1 \n\
1449 ldmst [%0]0,%A2"
1450 ::"a"(address), "d"(mask), "d"((long long)value));
1451 }
1452
1453 /** Insert NOP instruction
1454 */
1455 IFX_INLINE void Ifx__nop(void)
1456 {
1457 __asm__ volatile ("nop" : : : "memory");
1458 }
1459
1460 /** Insert a loop over cnt NOP instruction
1461 */
1462 IFX_INLINE void Ifx__nops(void* cnt)
1463 {
1464 __asm__ volatile ("0: nop \n\
1465 loop %0,0b"
1466 ::"a"(((sint8*)cnt)-1));
1467 }
1468
1469 /** Insert RSLCX instruction
1470 */
1471 IFX_INLINE void Ifx__rslcx(void)
1472 {
1473 __asm__ volatile ("rslcx" : : : "memory");
1474 }
1475
1476 /** Insert SVLCX instruction
1477 */
1478 IFX_INLINE void Ifx__svlcx(void)
1479 {
1480 __asm__ volatile ("svlcx" : : : "memory");
1481 }
1482
1483 /** Insert SWAP instruction. Note that all operands must be word-aligned.
1484 */
1485 IFX_INLINE uint32 Ifx__swap(void* place, uint32 value)
1486 {
1487 uint32 res;
1488 __asm__ volatile("swap.w [%1]0,%2":"=d"(res):"a"(place), "0"(value));
1489 return res;
1490 }
1491
1492 /** Insert n NOP instruction
1493 */
1494 #define Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
1495
1496 /** \} */
1497
1498 /* FIXME use inline instead of #define */
1499 #define Ifx__setareg(areg,val) \
1500 { uint32 reg_val= (uint32)val; \
1501 __asm__ volatile (" mov.a\t %%"#areg",%0"::"d"(reg_val)); }
1502
1503 /**__mtcr (CPU_CCTRL, 0);
1504 */
1505 IFX_INLINE void Ifx__stopPerfCounters(void)
1506 {
1507 __asm__ volatile("mov %%d0,0\n\
1508 mtcr 0xFC00,%%d0\n\
1509 isync\n"
1510 : : :"d0"); /* FIXME check that the parameter d0 is understood by the compiler as a register used by the inline */
1511 }
1512
1513 /** \brief This function is a implementation of a binary semaphore using compare and swap instruction
1514 * \param address address of resource.
1515 * \param value This variable is updated with status of address
1516 * \param condition if the value of address matches with the value of condition, then swap of value & address occurs.
1517 *
1518 */
1519 IFX_INLINE unsigned int Ifx__cmpAndSwap (unsigned int volatile *address,
1520 unsigned int value, unsigned int condition)
1521 {
1522 /* Gnu C compiler with Tricore 1.6 support is required to use cmpswap instruction */
1523 __extension__ unsigned long long reg64
1524 = value | (unsigned long long) condition << 32;
1525
1526 __asm__ __volatile__ ("cmpswap.w [%[addr]]0, %A[reg]"
1527 : [reg] "+d" (reg64)
1528 : [addr] "a" (address)
1529 : "memory");
1530 return reg64;
1531 }
1532
1533 /** \brief Convert a fixpoint value to float32
1534 *
1535 * This function converts a value from a fixpoint format to a float32 format.
1536 *
1537 *
1538 * \param value value to be converted.
1539 * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
1540 *
1541 * \return Returns the converted value in the float32 format.
1542 *
1543 */
1544 IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
1545 {
1546 float32 result;
1547
1548 __asm__ volatile("q31tof %0, %1, %2": "=d" (result) : "d" (value), "d" (shift));
1549 return result;
1550 }
1551
1552 IFX_INLINE void* Ifx__getA11(void)
1553 {
1554 uint32 *res;
1555 __asm__ volatile ("mov.aa %0, %%a11": "=a" (res) : :"a11");
1556 return res;
1557 }
1558
1559 IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
1560 {
1561 __asm__ volatile ("mov.aa %%a10, %0": : "a" (stackAddr) :"a10");
1562 }
1563
1564 IFX_INLINE uint32 Ifx__crc32(uint32 b, uint32 a)
1565 {
1566 uint32 returnvalue = 0; /* set value to 0 */
1567
1568 __asm__ volatile ("CRC32 %0,%1,%2" : "=d" (returnvalue) : "d"(b), "d"(a));
1569
1570 return returnvalue;
1571 }
1572
1573 IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
1574 {
1575 uint32 returnvalue = 0; /* set seed value to 0 */
1576 for (;length > 0; length--)
1577 {
1578 /* calculate the CRC over all data */
1579 __asm__ ("CRC32 %0,%0,%1" : "+d" (returnvalue) : "d" (*startaddress));
1580 startaddress++;
1581 }
1582 return returnvalue;
1583 }
1584
1585 IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
1586 {
1587 uint32 result;
1588 __asm(" mul.u %%e14,%1,%2 # d15 = Eh; d14 = El \n"
1589 " mov %%d12,%%d14 # e12 = El \n"
1590 " mov %%d13, 0 # \n"
1591 " madd.u %%e14,%%e12,%%d15, 5 # e14 = El + 5 * d15 \n"
1592 " cmp_m_%=: jge.u %%d14,%3,sub_m_%= # \n"
1593 " jz %%d15,done_%= # \n"
1594 " sub_m_%=: subx %%d14,%%d14,%3 # e12=e12-m \n"
1595 " subc %%d15,%%d15,%%d13 # d13=d13-0 \n"
1596 " loopu cmp_m_%= # \n"
1597 " done_%=: mov %0,%%d14 # \n"
1598 : "=d"(result) : "d"(a), "d"(x), "d"(m) : "d12","d13","d14","d15");
1599 return result;
1600 }
1601
1602 IFX_INLINE sint32 Ifx__popcnt(sint32 a)
1603 {
1604 sint32 res;
1605 __asm__ volatile ("popcnt %0,%1":"=d"(res):"d"(a));
1606 return res;
1607 }
1608
1609 /** Invalidate cache address "p". Generates CACHEA.I [Ab].
1610 */
1611 IFX_INLINE void Ifx__cacheai(uint8* p)
1612 {
1613 __asm__ volatile("cachea.i [%0]0"::"a"(p));
1614 }
1615
1616 /* Macros for backward compatibility of the intrinsics*/
1617 /******************************************************************************/
1618 #ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
1619 #ifndef __non_return_call
1620 #define __non_return_call Ifx__non_return_call
1621 #endif
1622
1623 #ifndef __jump_and_link
1624 #define __jump_and_link Ifx__jump_and_link
1625 #endif
1626
1627 #ifndef __moveToDataParam0
1628 #define __moveToDataParam0 Ifx__moveToDataParam0
1629 #endif
1630
1631 #ifndef __moveToDataParamRet
1632 #define __moveToDataParamRet Ifx__moveToDataParamRet
1633 #endif
1634
1635 #ifndef __getDataParamRet
1636 #define __getDataParamRet Ifx__getDataParamRet
1637 #endif
1638
1639 #ifndef __moveToAddrParam0
1640 #define __moveToAddrParam0 Ifx__moveToAddrParam0
1641 #endif
1642
1643 #ifndef __jumpToFunction
1644 #define __jumpToFunction Ifx__jumpToFunction
1645 #endif
1646
1647 #ifndef __jumpToFunctionWithLink
1648 #define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
1649 #endif
1650
1651 #ifndef __jumpBackToLink
1652 #define __jumpBackToLink Ifx__jumpBackToLink
1653 #endif
1654
1655 #ifndef __minX
1656 #define __minX Ifx__minX
1657 #endif
1658
1659 #ifndef __maxX
1660 #define __maxX Ifx__maxX
1661 #endif
1662
1663 #ifndef __saturateX
1664 #define __saturateX Ifx__saturateX
1665 #endif
1666
1667 #ifndef __checkrangeX
1668 #define __checkrangeX Ifx__checkrangeX
1669 #endif
1670
1671 #ifndef __saturate
1672 #define __saturate Ifx__saturate
1673 #endif
1674
1675 #ifndef __saturateu
1676 #define __saturateu Ifx__saturateu
1677 #endif
1678
1679 #ifndef __max
1680 #define __max Ifx__max
1681 #endif
1682
1683 #ifndef __maxs
1684 #define __maxs Ifx__maxs
1685 #endif
1686
1687 #ifndef __maxu
1688 #define __maxu Ifx__maxu
1689 #endif
1690
1691 #ifndef __min
1692 #define __min Ifx__min
1693 #endif
1694
1695 #ifndef __mins
1696 #define __mins Ifx__mins
1697 #endif
1698
1699 #ifndef __minu
1700 #define __minu Ifx__minu
1701 #endif
1702
1703 #ifndef __sqrtf
1704 #define __sqrtf Ifx__sqrtf
1705 #endif
1706
1707 #ifndef __sqrf
1708 #define __sqrf Ifx__sqrf
1709 #endif
1710
1711 #ifndef __checkrange
1712 #define __checkrange Ifx__checkrange
1713 #endif
1714
1715 #ifndef __roundf
1716 #define __roundf Ifx__roundf
1717 #endif
1718
1719 #ifndef __absf
1720 #define __absf Ifx__absf
1721 #endif
1722
1723 #ifndef __saturatef
1724 #define __saturatef Ifx__saturatef
1725 #endif
1726
1727 #ifndef __minf
1728 #define __minf Ifx__minf
1729 #endif
1730
1731 #ifndef __maxf
1732 #define __maxf Ifx__maxf
1733 #endif
1734
1735 #ifndef __checkrangef
1736 #define __checkrangef Ifx__checkrangef
1737 #endif
1738
1739 #ifndef __abs_stdreal
1740 #define __abs_stdreal Ifx__abs_stdreal
1741 #endif
1742
1743 #ifndef __saturate_stdreal
1744 #define __saturate_stdreal Ifx__saturate_stdreal
1745 #endif
1746
1747 #ifndef __min_stdreal
1748 #define __min_stdreal Ifx__min_stdreal
1749 #endif
1750
1751 #ifndef __max_stdreal
1752 #define __max_stdreal Ifx__max_stdreal
1753 #endif
1754
1755 #ifndef __neqf
1756 #define __neqf Ifx__neqf
1757 #endif
1758
1759 #ifndef __leqf
1760 #define __leqf Ifx__leqf
1761 #endif
1762
1763 #ifndef __geqf
1764 #define __geqf Ifx__geqf
1765 #endif
1766
1767 #ifndef __clssf
1768 #define __clssf Ifx__clssf
1769 #endif
1770
1771 #ifndef __fract_to_float
1772 #define __fract_to_float Ifx__fract_to_float
1773 #endif
1774
1775 #ifndef __fract_to_sfract
1776 #define __fract_to_sfract Ifx__fract_to_sfract
1777 #endif
1778
1779 #ifndef __float_to_sfract
1780 #define __float_to_sfract Ifx__float_to_sfract
1781 #endif
1782
1783 #ifndef __float_to_fract
1784 #define __float_to_fract Ifx__float_to_fract
1785 #endif
1786
1787 #ifndef __getfract
1788 #define __getfract Ifx__getfract
1789 #endif
1790
1791 #ifndef __mac_r_sf
1792 #define __mac_r_sf Ifx__mac_r_sf
1793 #endif
1794
1795 #ifndef __mac_sf
1796 #define __mac_sf Ifx__mac_sf
1797 #endif
1798
1799 #ifndef __mulfractfract
1800 #define __mulfractfract Ifx__mulfractfract
1801 #endif
1802
1803 #ifndef __mulfractlong
1804 #define __mulfractlong Ifx__mulfractlong
1805 #endif
1806
1807 #ifndef __round16
1808 #define __round16 Ifx__round16
1809 #endif
1810
1811 #ifndef __s16_to_sfract
1812 #define __s16_to_sfract Ifx__s16_to_sfract
1813 #endif
1814
1815 #ifndef __sfract_to_s16
1816 #define __sfract_to_s16 Ifx__sfract_to_s16
1817 #endif
1818
1819 #ifndef __sfract_to_u16
1820 #define __sfract_to_u16 Ifx__sfract_to_u16
1821 #endif
1822
1823 #ifndef __shaaccum
1824 #define __shaaccum Ifx__shaaccum
1825 #endif
1826
1827 #ifndef __shafracts
1828 #define __shafracts Ifx__shafracts
1829 #endif
1830
1831 #ifndef __shasfracts
1832 #define __shasfracts Ifx__shasfracts
1833 #endif
1834
1835 #ifndef __u16_to_sfract
1836 #define __u16_to_sfract Ifx__u16_to_sfract
1837 #endif
1838
1839 #ifndef __extr
1840 #define __extr Ifx__extr
1841 #endif
1842
1843 #ifndef __extru
1844 #define __extru Ifx__extru
1845 #endif
1846
1847 #ifndef __getbit
1848 #define __getbit Ifx__getbit
1849 #endif
1850
1851 #ifndef __ins
1852 #define __ins Ifx__ins
1853 #endif
1854
1855 #ifndef __insert
1856 #define __insert Ifx__insert
1857 #endif
1858
1859 #ifndef __insn
1860 #define __insn Ifx__insn
1861 #endif
1862
1863 #ifndef __putbit
1864 #define __putbit Ifx__putbit
1865 #endif
1866
1867 #ifndef __imaskldmst
1868 #define __imaskldmst Ifx__imaskldmst
1869 #endif
1870
1871 #ifndef __bisr
1872 #define __bisr Ifx__bisr
1873 #endif
1874
1875 #ifndef __disable
1876 #define __disable Ifx__disable
1877 #endif
1878
1879 #ifndef __disable_and_save
1880 #define __disable_and_save Ifx__disable_and_save
1881 #endif
1882
1883 #ifndef __enable
1884 #define __enable Ifx__enable
1885 #endif
1886
1887 #ifndef __restore
1888 #define __restore Ifx__restore
1889 #endif
1890
1891 #ifndef __syscall
1892 #define __syscall Ifx__syscall
1893 #endif
1894
1895 #ifndef __tric_syscall
1896 #define __tric_syscall Ifx__tric_syscall
1897 #endif
1898
1899 #ifndef __cacheawi
1900 #define __cacheawi Ifx__cacheawi
1901 #endif
1902
1903 #ifndef __cacheiwi
1904 #define __cacheiwi Ifx__cacheiwi
1905 #endif
1906
1907 #ifndef __cacheawi_bo_post_inc
1908 #define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
1909 #endif
1910
1911 #ifndef __mulsc
1912 #define __mulsc Ifx__mulsc
1913 #endif
1914
1915 #ifndef __rol
1916 #define __rol Ifx__rol
1917 #endif
1918
1919 #ifndef __ror
1920 #define __ror Ifx__ror
1921 #endif
1922
1923 #ifndef __extractbyte1
1924 #define __extractbyte1 Ifx__extractbyte1
1925 #endif
1926
1927 #ifndef __extractbyte2
1928 #define __extractbyte2 Ifx__extractbyte2
1929 #endif
1930
1931 #ifndef __extractbyte3
1932 #define __extractbyte3 Ifx__extractbyte3
1933 #endif
1934
1935 #ifndef __extractbyte4
1936 #define __extractbyte4 Ifx__extractbyte4
1937 #endif
1938
1939 #ifndef __extracthw1
1940 #define __extracthw1 Ifx__extracthw1
1941 #endif
1942
1943 #ifndef __extracthw2
1944 #define __extracthw2 Ifx__extracthw2
1945 #endif
1946
1947 #ifndef __extractubyte1
1948 #define __extractubyte1 Ifx__extractubyte1
1949 #endif
1950
1951 #ifndef __extractubyte2
1952 #define __extractubyte2 Ifx__extractubyte2
1953 #endif
1954
1955 #ifndef __extractubyte3
1956 #define __extractubyte3 Ifx__extractubyte3
1957 #endif
1958
1959 #ifndef __extractubyte4
1960 #define __extractubyte4 Ifx__extractubyte4
1961 #endif
1962
1963 #ifndef __extractuhw1
1964 #define __extractuhw1 Ifx__extractuhw1
1965 #endif
1966
1967 #ifndef __extractuhw2
1968 #define __extractuhw2 Ifx__extractuhw2
1969 #endif
1970
1971 #ifndef __getbyte1
1972 #define __getbyte1 Ifx__getbyte1
1973 #endif
1974
1975 #ifndef __getbyte2
1976 #define __getbyte2 Ifx__getbyte2
1977 #endif
1978
1979 #ifndef __getbyte3
1980 #define __getbyte3 Ifx__getbyte3
1981 #endif
1982
1983 #ifndef __getbyte4
1984 #define __getbyte4 Ifx__getbyte4
1985 #endif
1986
1987 #ifndef __gethw1
1988 #define __gethw1 Ifx__gethw1
1989 #endif
1990
1991 #ifndef __gethw2
1992 #define __gethw2 Ifx__gethw2
1993 #endif
1994
1995 #ifndef __getubyte1
1996 #define __getubyte1 Ifx__getubyte1
1997 #endif
1998
1999 #ifndef __getubyte2
2000 #define __getubyte2 Ifx__getubyte2
2001 #endif
2002
2003 #ifndef __getubyte3
2004 #define __getubyte3 Ifx__getubyte3
2005 #endif
2006
2007 #ifndef __getubyte4
2008 #define __getubyte4 Ifx__getubyte4
2009 #endif
2010
2011 #ifndef __getuhw1
2012 #define __getuhw1 Ifx__getuhw1
2013 #endif
2014
2015 #ifndef __getuhw2
2016 #define __getuhw2 Ifx__getuhw2
2017 #endif
2018
2019 #ifndef __setbyte1
2020 #define __setbyte1 Ifx__setbyte1
2021 #endif
2022
2023 #ifndef __setbyte2
2024 #define __setbyte2 Ifx__setbyte2
2025 #endif
2026
2027 #ifndef __setbyte3
2028 #define __setbyte3 Ifx__setbyte3
2029 #endif
2030
2031 #ifndef __setbyte4
2032 #define __setbyte4 Ifx__setbyte4
2033 #endif
2034
2035 #ifndef __sethw1
2036 #define __sethw1 Ifx__sethw1
2037 #endif
2038
2039 #ifndef __sethw2
2040 #define __sethw2 Ifx__sethw2
2041 #endif
2042
2043 #ifndef __setubyte1
2044 #define __setubyte1 Ifx__setubyte1
2045 #endif
2046
2047 #ifndef __setubyte2
2048 #define __setubyte2 Ifx__setubyte2
2049 #endif
2050
2051 #ifndef __setubyte3
2052 #define __setubyte3 Ifx__setubyte3
2053 #endif
2054
2055 #ifndef __setubyte4
2056 #define __setubyte4 Ifx__setubyte4
2057 #endif
2058
2059 #ifndef __setuhw1
2060 #define __setuhw1 Ifx__setuhw1
2061 #endif
2062
2063 #ifndef __setuhw2
2064 #define __setuhw2 Ifx__setuhw2
2065 #endif
2066
2067 #ifndef __minhu
2068 #define __minhu Ifx__minhu
2069 #endif
2070
2071 #ifndef __minh
2072 #define __minh Ifx__minh
2073 #endif
2074
2075 #ifndef __minbu
2076 #define __minbu Ifx__minbu
2077 #endif
2078
2079 #ifndef __minb
2080 #define __minb Ifx__minb
2081 #endif
2082
2083 #ifndef __insertuhw2
2084 #define __insertuhw2 Ifx__insertuhw2
2085 #endif
2086
2087 #ifndef __insertuhw1
2088 #define __insertuhw1 Ifx__insertuhw1
2089 #endif
2090
2091 #ifndef __inserthw2
2092 #define __inserthw2 Ifx__inserthw2
2093 #endif
2094
2095 #ifndef __inserthw1
2096 #define __inserthw1 Ifx__inserthw1
2097 #endif
2098
2099 #ifndef __insertubyte4
2100 #define __insertubyte4 Ifx__insertubyte4
2101 #endif
2102
2103 #ifndef __insertubyte3
2104 #define __insertubyte3 Ifx__insertubyte3
2105 #endif
2106
2107 #ifndef __insertubyte2
2108 #define __insertubyte2 Ifx__insertubyte2
2109 #endif
2110
2111 #ifndef __insertubyte1
2112 #define __insertubyte1 Ifx__insertubyte1
2113 #endif
2114
2115 #ifndef __insertbyte4
2116 #define __insertbyte4 Ifx__insertbyte4
2117 #endif
2118
2119 #ifndef __insertbyte3
2120 #define __insertbyte3 Ifx__insertbyte3
2121 #endif
2122
2123 #ifndef __insertbyte2
2124 #define __insertbyte2 Ifx__insertbyte2
2125 #endif
2126
2127 #ifndef __insertbyte1
2128 #define __insertbyte1 Ifx__insertbyte1
2129 #endif
2130
2131 #ifndef __initupackhw
2132 #define __initupackhw Ifx__initupackhw
2133 #endif
2134
2135 #ifndef __initupackb
2136 #define __initupackb Ifx__initupackb
2137 #endif
2138
2139 #ifndef __initpackhwl
2140 #define __initpackhwl Ifx__initpackhwl
2141 #endif
2142
2143 #ifndef __initpackhw
2144 #define __initpackhw Ifx__initpackhw
2145 #endif
2146
2147 #ifndef __initpackbl
2148 #define __initpackbl Ifx__initpackbl
2149 #endif
2150
2151 #ifndef __initpackb
2152 #define __initpackb Ifx__initpackb
2153 #endif
2154
2155 #ifndef __absb
2156 #define __absb Ifx__absb
2157 #endif
2158
2159 #ifndef __absh
2160 #define __absh Ifx__absh
2161 #endif
2162
2163 #ifndef __abssh
2164 #define __abssh Ifx__abssh
2165 #endif
2166
2167
2168 #ifndef __abs
2169 #define __abs Ifx__abs
2170 #endif
2171
2172 #ifndef __absdif
2173 #define __absdif Ifx__absdif
2174 #endif
2175
2176 #ifndef __abss
2177 #define __abss Ifx__abss
2178 #endif
2179
2180 #ifndef __clo
2181 #define __clo Ifx__clo
2182 #endif
2183
2184 #ifndef __cls
2185 #define __cls Ifx__cls
2186 #endif
2187
2188 #ifndef __clz
2189 #define __clz Ifx__clz
2190 #endif
2191
2192 #ifndef __fabs
2193 #define __fabs Ifx__fabs
2194 #endif
2195
2196 #ifndef __fabsf
2197 #define __fabsf Ifx__fabsf
2198 #endif
2199
2200 #ifndef __mfcr
2201 #define __mfcr Ifx__mfcr
2202 #endif
2203
2204 #ifndef __mtcr
2205 #define __mtcr Ifx__mtcr
2206 #endif
2207
2208 #ifndef __parity
2209 #define __parity Ifx__parity
2210 #endif
2211
2212 #ifndef __satb
2213 #define __satb Ifx__satb
2214 #endif
2215
2216 #ifndef __satbu
2217 #define __satbu Ifx__satbu
2218 #endif
2219
2220 #ifndef __sath
2221 #define __sath Ifx__sath
2222 #endif
2223
2224 #ifndef __sathu
2225 #define __sathu Ifx__sathu
2226 #endif
2227
2228 #ifndef __adds
2229 #define __adds Ifx__adds
2230 #endif
2231
2232 #ifndef __addsu
2233 #define __addsu Ifx__addsu
2234 #endif
2235
2236 #ifndef __subs
2237 #define __subs Ifx__subs
2238 #endif
2239
2240 #ifndef __subsu
2241 #define __subsu Ifx__subsu
2242 #endif
2243
2244 #ifndef __debug
2245 #define __debug Ifx__debug
2246 #endif
2247
2248 #ifndef __mem_barrier
2249 #define __mem_barrier Ifx__mem_barrier
2250 #endif
2251
2252 #ifndef __dsync
2253 #define __dsync Ifx__dsync
2254 #endif
2255
2256 #ifndef __isync
2257 #define __isync Ifx__isync
2258 #endif
2259
2260 #ifndef __ldmst
2261 #define __ldmst Ifx__ldmst
2262 #endif
2263
2264 #ifndef __nop
2265 #define __nop Ifx__nop
2266 #endif
2267
2268 #ifndef __nops
2269 #define __nops Ifx__nops
2270 #endif
2271
2272 #ifndef __rslcx
2273 #define __rslcx Ifx__rslcx
2274 #endif
2275
2276 #ifndef __svlcx
2277 #define __svlcx Ifx__svlcx
2278 #endif
2279
2280 #ifndef __swap
2281 #define __swap Ifx__swap
2282 #endif
2283
2284 #if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
2285 #define NOP Ifx__NOP
2286 #endif
2287
2288 #ifndef __setareg
2289 #define __setareg Ifx__setareg
2290 #endif
2291
2292 #ifndef __stopPerfCounters
2293 #define __stopPerfCounters Ifx__stopPerfCounters
2294 #endif
2295
2296 #ifndef __cmpAndSwap
2297 #define __cmpAndSwap Ifx__cmpAndSwap
2298 #endif
2299
2300 #ifndef __fixpoint_to_float32
2301 #define __fixpoint_to_float32 Ifx__fixpoint_to_float32
2302 #endif
2303
2304 #ifndef __getA11
2305 #define __getA11 Ifx__getA11
2306 #endif
2307
2308 #ifndef __setStackPointer
2309 #define __setStackPointer Ifx__setStackPointer
2310 #endif
2311
2312 #if ((!defined(__crc32)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
2313 #define __crc32 Ifx__crc32
2314 #endif
2315
2316 #ifndef __popcnt
2317 #define __popcnt Ifx__popcnt
2318 #endif
2319
2320 #ifndef __cacheai
2321 #define __cacheai Ifx__cacheai
2322 #endif
2323
2324 #endif
2325 /******************************************************************************/
2326 /* *INDENT-ON* */
2327 /******************************************************************************/
2328 #endif /* IFXCPU_INTRINSICSGNUC_H */
Ifx__sathu
IFX_INLINE uint16 Ifx__sathu(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1358
Ifx__setbyte3
IFX_INLINE void Ifx__setbyte3(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1139
Ifx__initupackb
IFX_INLINE __upackb Ifx__initupackb(uint32 a, uint32 b, uint32 c, uint32 d)
Definition: IfxCpu_IntrinsicsGnuc.h:937
Ifx__restore
IFX_INLINE void Ifx__restore(sint32 ie)
Definition: IfxCpu_IntrinsicsGnuc.h:533
Ifx__parity
IFX_INLINE sint32 Ifx__parity(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1322
Ifx__extru
IFX_INLINE uint32 Ifx__extru(uint32 a, uint32 p, uint32 w)
Definition: IfxCpu_IntrinsicsGnuc.h:442
Ifx__insertubyte1
IFX_INLINE __upackb Ifx__insertubyte1(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:999
Ifx__getbyte2
IFX_INLINE sint8 Ifx__getbyte2(__packb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:778
Ifx__setuhw2
IFX_INLINE void Ifx__setuhw2(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1229
Ifx__extractubyte4
IFX_INLINE uint8 Ifx__extractubyte4(__upackb a)
Definition: IfxCpu_IntrinsicsGnuc.h:736
Ifx__subsu
IFX_INLINE uint32 Ifx__subsu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1402
Ifx__shaaccum
IFX_INLINE laccum Ifx__shaaccum(laccum a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:378
Ifx__satb
IFX_INLINE sint8 Ifx__satb(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1331
__packb
long __packb
Definition: Ifx_TypesDcc.h:47
Ifx__u16_to_sfract
IFX_INLINE sfract Ifx__u16_to_sfract(uint16 a)
Definition: IfxCpu_IntrinsicsGnuc.h:413
Ifx__insertuhw1
IFX_INLINE __upackhw Ifx__insertuhw1(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1059
Ifx__float_to_sfract
IFX_INLINE sfract Ifx__float_to_sfract(float a)
Definition: IfxCpu_IntrinsicsGnuc.h:278
Ifx__swap
IFX_INLINE uint32 Ifx__swap(void *place, uint32 value)
Definition: IfxCpu_IntrinsicsGnuc.h:1485
Ifx__minu
IFX_INLINE uint32 Ifx__minu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:192
Ifx__min
IFX_INLINE sint32 Ifx__min(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:174
sfract
short sfract
Definition: Ifx_TypesDcc.h:45
Ifx__getubyte3
IFX_INLINE uint8 Ifx__getubyte3(__upackb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:857
Ifx__initpackhwl
IFX_INLINE __packhw Ifx__initpackhwl(long a)
Definition: IfxCpu_IntrinsicsGnuc.h:930
Ifx__setbyte4
IFX_INLINE void Ifx__setbyte4(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1149
Ifx__insertbyte3
IFX_INLINE __packb Ifx__insertbyte3(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:979
Ifx__subs
IFX_INLINE sint32 Ifx__subs(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1393
IfxCpu_getRandomVal
IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Definition: IfxCpu_IntrinsicsGnuc.h:1585
Ifx__crc32
IFX_INLINE uint32 Ifx__crc32(uint32 b, uint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1564
Ifx__svlcx
IFX_INLINE void Ifx__svlcx(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1478
Ifx__round16
IFX_INLINE sfract Ifx__round16(fract a)
Definition: IfxCpu_IntrinsicsGnuc.h:335
Ifx__shasfracts
IFX_INLINE sfract Ifx__shasfracts(sfract a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:404
Ifx__sath
IFX_INLINE sint16 Ifx__sath(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1349
__asm__
#define __asm__
Definition: Ifx_TypesTasking.h:45
Ifx__absdif
IFX_INLINE sint32 Ifx__absdif(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1251
Ifx__jump_and_link
IFX_INLINE void Ifx__jump_and_link(void(*fun)(void))
Definition: IfxCpu_IntrinsicsGnuc.h:72
Ifx__extracthw2
IFX_INLINE sint16 Ifx__extracthw2(__packhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:696
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx__getuhw1
IFX_INLINE uint16 Ifx__getuhw1(__upackhw *a)
Definition: IfxCpu_IntrinsicsGnuc.h:879
Ifx__extractubyte3
IFX_INLINE uint8 Ifx__extractubyte3(__upackb a)
Definition: IfxCpu_IntrinsicsGnuc.h:726
Ifx__nops
IFX_INLINE void Ifx__nops(void *cnt)
Definition: IfxCpu_IntrinsicsGnuc.h:1462
Ifx__setbyte1
IFX_INLINE void Ifx__setbyte1(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1119
Ifx__inserthw2
IFX_INLINE __packhw Ifx__inserthw2(__packhw a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1049
float32
float float32
Definition: Platform_Types.h:170
Ifx__cacheawi_bo_post_inc
IFX_INLINE uint8 * Ifx__cacheawi_bo_post_inc(uint8 *p)
Definition: IfxCpu_IntrinsicsGnuc.h:568
Ifx__extractubyte1
IFX_INLINE uint8 Ifx__extractubyte1(__upackb a)
Definition: IfxCpu_IntrinsicsGnuc.h:706
Ifx__adds
IFX_INLINE sint32 Ifx__adds(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1375
Ifx__sfract_to_u16
IFX_INLINE uint16 Ifx__sfract_to_u16(sfract a)
Definition: IfxCpu_IntrinsicsGnuc.h:368
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesDcc.h:50
Ifx__debug
IFX_INLINE void Ifx__debug(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1421
Ifx__getubyte1
IFX_INLINE uint8 Ifx__getubyte1(__upackb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:835
Ifx__extr
IFX_INLINE sint32 Ifx__extr(sint32 a, uint32 p, uint32 w)
Definition: IfxCpu_IntrinsicsGnuc.h:430
Ifx__getubyte4
IFX_INLINE uint8 Ifx__getubyte4(__upackb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:868
Ifx__insertubyte3
IFX_INLINE __upackb Ifx__insertubyte3(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1019
Ifx__absh
IFX_INLINE __packhw Ifx__absh(__packhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:626
Ifx__ldmst
IFX_INLINE void Ifx__ldmst(volatile void *address, uint32 mask, uint32 value)
Definition: IfxCpu_IntrinsicsGnuc.h:1446
Ifx__getfract
IFX_INLINE fract Ifx__getfract(laccum a)
Definition: IfxCpu_IntrinsicsGnuc.h:286
Ifx__insertuhw2
IFX_INLINE __upackhw Ifx__insertuhw2(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1069
Ifx__rslcx
IFX_INLINE void Ifx__rslcx(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1471
Ifx__minbu
IFX_INLINE __upackb Ifx__minbu(__upackb a, __upackb b)
Definition: IfxCpu_IntrinsicsGnuc.h:1089
Ifx__satbu
IFX_INLINE uint8 Ifx__satbu(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1340
Ifx__minb
IFX_INLINE __packb Ifx__minb(__packb a, __packb b)
Definition: IfxCpu_IntrinsicsGnuc.h:1079
Ifx__mac_r_sf
IFX_INLINE sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsGnuc.h:295
Ifx__jumpToFunctionWithLink
IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
Definition: IfxCpu_IntrinsicsGnuc.h:104
Ifx__insertubyte4
IFX_INLINE __upackb Ifx__insertubyte4(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1029
Ifx__initpackbl
IFX_INLINE __packb Ifx__initpackbl(long a)
Definition: IfxCpu_IntrinsicsGnuc.h:913
sint16
short sint16
Definition: Platform_Types.h:129
IfxCpu_calculateCrc32
IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
Definition: IfxCpu_IntrinsicsGnuc.h:1573
Ifx__setbyte2
IFX_INLINE void Ifx__setbyte2(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1129
__packhw
long __packhw
Definition: Ifx_TypesDcc.h:49
Ifx__cacheai
IFX_INLINE void Ifx__cacheai(uint8 *p)
Definition: IfxCpu_IntrinsicsGnuc.h:1611
Ifx__maxu
IFX_INLINE uint32 Ifx__maxu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:165
fract
long fract
Definition: Ifx_TypesDcc.h:44
Ifx__gethw1
IFX_INLINE sint16 Ifx__gethw1(__packhw *a)
Definition: IfxCpu_IntrinsicsGnuc.h:814
Ifx__shafracts
IFX_INLINE fract Ifx__shafracts(fract a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:395
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
laccum
long long laccum
Definition: Ifx_TypesDcc.h:46
Ifx__insertbyte2
IFX_INLINE __packb Ifx__insertbyte2(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:969
Ifx__extractbyte2
IFX_INLINE sint8 Ifx__extractbyte2(__packb a)
Definition: IfxCpu_IntrinsicsGnuc.h:656
Ifx__abss
IFX_INLINE sint32 Ifx__abss(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1260
Ifx__extractbyte4
IFX_INLINE sint8 Ifx__extractbyte4(__packb a)
Definition: IfxCpu_IntrinsicsGnuc.h:676
Ifx__extractubyte2
IFX_INLINE uint8 Ifx__extractubyte2(__upackb a)
Definition: IfxCpu_IntrinsicsGnuc.h:716
Ifx__setubyte4
IFX_INLINE void Ifx__setubyte4(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1209
Ifx__abssh
IFX_INLINE __packhw Ifx__abssh(__packhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:636
Ifx__initpackb
IFX_INLINE __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
Definition: IfxCpu_IntrinsicsGnuc.h:901
Ifx__max
IFX_INLINE sint32 Ifx__max(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:148
Ifx__maxs
IFX_INLINE sint32 Ifx__maxs(sint16 a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:157
Ifx__non_return_call
#define Ifx__non_return_call(fun)
Definition: IfxCpu_IntrinsicsGnuc.h:68
Ifx__getuhw2
IFX_INLINE uint16 Ifx__getuhw2(__upackhw *a)
Definition: IfxCpu_IntrinsicsGnuc.h:890
Ifx__clssf
IFX_INLINE sint16 Ifx__clssf(sfract a)
Definition: IfxCpu_IntrinsicsGnuc.h:238
__upackb
unsigned long __upackb
Definition: Ifx_TypesDcc.h:48
Ifx__insertubyte2
IFX_INLINE __upackb Ifx__insertubyte2(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1009
Ifx__extractuhw2
IFX_INLINE uint16 Ifx__extractuhw2(__upackhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:756
Ifx__addsu
IFX_INLINE uint32 Ifx__addsu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1384
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx__dsync
IFX_INLINE void Ifx__dsync(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1432
Ifx__sethw1
IFX_INLINE void Ifx__sethw1(__packhw *a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1159
Ifx__initupackhw
IFX_INLINE __upackhw Ifx__initupackhw(uint16 a, uint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:949
Ifx__disable_and_save
IFX_INLINE sint32 Ifx__disable_and_save(void)
Definition: IfxCpu_IntrinsicsGnuc.h:520
Ifx__moveToDataParam0
IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
Definition: IfxCpu_IntrinsicsGnuc.h:77
Ifx__getbyte3
IFX_INLINE sint8 Ifx__getbyte3(__packb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:790
Ifx__getbyte1
IFX_INLINE sint8 Ifx__getbyte1(__packb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:766
Ifx__isync
IFX_INLINE void Ifx__isync(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1439
Ifx__setuhw1
IFX_INLINE void Ifx__setuhw1(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1219
Ifx__insert
IFX_INLINE sint32 Ifx__insert(sint32 a, sint32 b, sint32 p, const sint32 w)
Definition: IfxCpu_IntrinsicsGnuc.h:477
Ifx__minhu
IFX_INLINE __upackhw Ifx__minhu(__upackhw a, __upackhw b)
Definition: IfxCpu_IntrinsicsGnuc.h:1109
Ifx__fabsf
IFX_INLINE float Ifx__fabsf(float f)
Definition: IfxCpu_IntrinsicsGnuc.h:1300
Ifx__inserthw1
IFX_INLINE __packhw Ifx__inserthw1(__packhw a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1039
Ifx__mins
IFX_INLINE sint16 Ifx__mins(sint16 a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:183
Ifx__sfract_to_s16
IFX_INLINE sint16 Ifx__sfract_to_s16(sfract a)
Definition: IfxCpu_IntrinsicsGnuc.h:358
Ifx__mulfractlong
IFX_INLINE long Ifx__mulfractlong(fract a, long b)
Definition: IfxCpu_IntrinsicsGnuc.h:326
Ifx__fixpoint_to_float32
IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
Convert a fixpoint value to float32.
Definition: IfxCpu_IntrinsicsGnuc.h:1544
Ifx__cacheiwi
IFX_INLINE void Ifx__cacheiwi(uint8 *p)
Definition: IfxCpu_IntrinsicsGnuc.h:560
Ifx__setubyte3
IFX_INLINE void Ifx__setubyte3(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1199
Ifx__cacheawi
IFX_INLINE void Ifx__cacheawi(uint8 *p)
Definition: IfxCpu_IntrinsicsGnuc.h:554
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx__fract_to_sfract
IFX_INLINE sfract Ifx__fract_to_sfract(fract a)
Definition: IfxCpu_IntrinsicsGnuc.h:266
Ifx__cmpAndSwap
IFX_INLINE unsigned int Ifx__cmpAndSwap(unsigned int volatile *address, unsigned int value, unsigned int condition)
This function is a implementation of a binary semaphore using compare and swap instruction.
Definition: IfxCpu_IntrinsicsGnuc.h:1519
Ifx__insertbyte1
IFX_INLINE __packb Ifx__insertbyte1(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:959
Ifx__initpackhw
IFX_INLINE __packhw Ifx__initpackhw(sint16 a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:920
Ifx__float_to_fract
IFX_INLINE fract Ifx__float_to_fract(float a)
Definition: IfxCpu_IntrinsicsGnuc.h:257
Ifx__cls
IFX_INLINE sint32 Ifx__cls(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1278
Ifx__stopPerfCounters
IFX_INLINE void Ifx__stopPerfCounters(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1505
Ifx__mulfractfract
IFX_INLINE long Ifx__mulfractfract(fract a, fract b)
Definition: IfxCpu_IntrinsicsGnuc.h:317
Ifx__jumpToFunction
IFX_INLINE void Ifx__jumpToFunction(const void *fun)
Definition: IfxCpu_IntrinsicsGnuc.h:99
Ifx__moveToAddrParam0
IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
Definition: IfxCpu_IntrinsicsGnuc.h:94
Ifx__mulsc
IFX_INLINE sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
Definition: IfxCpu_IntrinsicsGnuc.h:578
Ifx__getubyte2
IFX_INLINE uint8 Ifx__getubyte2(__upackb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:846
sint32
long sint32
Definition: Platform_Types.h:134
Ifx__clo
IFX_INLINE sint32 Ifx__clo(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1269
Ifx__getDataParamRet
IFX_INLINE unsigned int Ifx__getDataParamRet(void)
Definition: IfxCpu_IntrinsicsGnuc.h:87
Ifx__popcnt
IFX_INLINE sint32 Ifx__popcnt(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1602
Ifx__getbyte4
IFX_INLINE sint8 Ifx__getbyte4(__packb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:802
Ifx__setubyte1
IFX_INLINE void Ifx__setubyte1(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1179
Ifx__nop
IFX_INLINE void Ifx__nop(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1455
Ifx__jumpBackToLink
IFX_INLINE void Ifx__jumpBackToLink(void)
Definition: IfxCpu_IntrinsicsGnuc.h:109
Ifx__ins
IFX_INLINE sint32 Ifx__ins(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
Definition: IfxCpu_IntrinsicsGnuc.h:468
Ifx__moveToDataParamRet
IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
Definition: IfxCpu_IntrinsicsGnuc.h:82
Ifx__insn
IFX_INLINE sint32 Ifx__insn(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
Definition: IfxCpu_IntrinsicsGnuc.h:489
Ifx__extractuhw1
IFX_INLINE uint16 Ifx__extractuhw1(__upackhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:746
Ifx__rol
IFX_INLINE uint32 Ifx__rol(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsGnuc.h:589
Ifx__ror
IFX_INLINE uint32 Ifx__ror(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsGnuc.h:598
Ifx__getA11
IFX_INLINE void * Ifx__getA11(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1552
Ifx__mac_sf
IFX_INLINE sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsGnuc.h:306
Ifx__s16_to_sfract
IFX_INLINE sfract Ifx__s16_to_sfract(sint16 a)
Definition: IfxCpu_IntrinsicsGnuc.h:348
Ifx__insertbyte4
IFX_INLINE __packb Ifx__insertbyte4(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:989
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx__extractbyte1
IFX_INLINE sint8 Ifx__extractbyte1(__packb a)
Definition: IfxCpu_IntrinsicsGnuc.h:646
Ifx__gethw2
IFX_INLINE sint16 Ifx__gethw2(__packhw *a)
Definition: IfxCpu_IntrinsicsGnuc.h:824
sint8
signed char sint8
Definition: Platform_Types.h:125
Ifx__setStackPointer
IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
Definition: IfxCpu_IntrinsicsGnuc.h:1559
Ifx__absb
IFX_INLINE __packb Ifx__absb(__packb a)
Definition: IfxCpu_IntrinsicsGnuc.h:616
Ifx__extractbyte3
IFX_INLINE sint8 Ifx__extractbyte3(__packb a)
Definition: IfxCpu_IntrinsicsGnuc.h:666
Ifx__sethw2
IFX_INLINE void Ifx__sethw2(__packhw *a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1169
Ifx__fract_to_float
IFX_INLINE float Ifx__fract_to_float(fract a)
Definition: IfxCpu_IntrinsicsGnuc.h:248
Ifx__setubyte2
IFX_INLINE void Ifx__setubyte2(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1189
Ifx__minh
IFX_INLINE __packhw Ifx__minh(__packhw a, __packhw b)
Definition: IfxCpu_IntrinsicsGnuc.h:1099
Ifx__extracthw1
IFX_INLINE sint16 Ifx__extracthw1(__packhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:686
Ifx__fabs
IFX_INLINE double Ifx__fabs(double d)
Definition: IfxCpu_IntrinsicsGnuc.h:1291


iLLD_TC26B: IfxCpu_IntrinsicsTasking2G.h Source File

  • Cpu
  • Std
IfxCpu_IntrinsicsTasking2G.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_IntrinsicsTasking.h
3 *
4 * \version iLLD_1_0_1_12_0
5 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup IfxLld_Cpu_Intrinsics_Tasking Intrinsics for TASKING compiler
41 * \ingroup IfxLld_Cpu_Intrinsics
42 *
43 */
44 #ifndef IFXCPU_INTRINSICSTASKING_H
45 #define IFXCPU_INTRINSICSTASKING_H
46 /******************************************************************************/
47 #include "Ifx_Types.h"
48 /******************************************************************************/
49 /* *INDENT-OFF* */
50
51 #ifndef __cplusplus
52 /** Function call without return
53 */
54 #define Ifx__non_return_call(fun) __asm("\tji %0"::"a"(fun))
55
56 /** Jump and link
57 */
58 IFX_INLINE void Ifx__jump_and_link(void (*fun)(void))
59 {
60 __asm("jli %0"::"a"(fun));
61 }
62
63 IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
64 {
65 __asm("mov d4, %0"::"d"(var));
66 }
67
68 IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
69 {
70 __asm("mov.aa a4, %0"::"a"(var));
71 }
72
73 IFX_INLINE unsigned int Ifx__getDataParamRet(void)
74 {
75 unsigned int var;
76 __asm(" mov\t %0, d2":"=d"(var));
77 return var;
78 }
79
80 IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
81 {
82 __asm("mov d2, %0"::"d"(var));
83 }
84
85 IFX_INLINE void Ifx__jumpToFunction(const void *fun)
86 {
87 Ifx__non_return_call(fun);
88 }
89
90 IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
91 {
92 Ifx__jump_and_link((void (*)(void))fun);
93 }
94
95 IFX_INLINE void Ifx__jumpBackToLink(void)
96 {
97 __asm("ji a11");
98 }
99 #endif
100 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_any_type Cross type arithmetic operation
101 *
102 * Macro compatible with float, fix point, signed integer and unsigned integer
103 *
104 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
105 * \{
106 */
107 #define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
108 #define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
109 #define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
110 #define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
111 /** \} */
112
113 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_singed_integer Signed integer operation
114 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
115 * \{
116 */
117 #define Ifx__saturate(X,Min,Max) ( __min(__max(X, Min), Max) )
118 /** \} */
119
120 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_unsinged_integer Unsigned integer operation
121 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
122 * \{
123 */
124 #define Ifx__saturateu(X,Min,Max) ( __minu(__maxu(X, Min), Max) )
125 /** \} */
126
127 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_float Floating point operation
128 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
129 * \{
130 */
131 #define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
132
133 #define Ifx__sqrf(X) ((X) * (X))
134 #define Ifx__sqrtf(X) sqrtf(X)
135
136 #define Ifx__roundf(X) ((((X) - (int)(X)) > 0.5) ? (1 + (int)(X)) : ((int)(X)))
137 #define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
138 #define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
139 #define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
140 #define Ifx__saturatef(X,Min,Max) ( Ifx__minf(_Ifx_maxf(X, Min), Max) )
141 #define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
142
143 #define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
144 #define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
145 #define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
146 #define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
147
148 #define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
149 #define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
150 #define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
151 /** \} */
152 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_fractional Fractional Arithmetic Support
153 The next table provides an overview of intrinsic functions to convert fractional values. Note that the
154 TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
155 need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
156 compiler does support these functions.
157 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
158 * \{
159 */
160 #define Ifx__fract_to_float(value) ((float)(value))
161
162 #define Ifx__mulfractlong __mulfractlong
163
164 #define Ifx__mulfractfract(fractvalue1,fractvalue2) ((fractvalue1)*(fractvalue2))
165
166 /** \} */
167
168 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_insert Insert / Extract Bit-fields and Bits
169 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
170 * \{
171 */
172
173 #define Ifx__extru(a, p, w) __extru(a,p,w)
174
175 #define Ifx__extr(a, p, w) __extr(a,p,w)
176
177 #define Ifx__imaskldmst(a, v, b, p) __imaskldmst((int*)a, v, b, p)
178
179 #define Ifx__insert(a,b,p,w) __insert(a,b,p,w)
180
181 /** \} */
182
183 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_interrupt_handling Interrupt Handling
184 The next table provides an overview of the intrinsic functions to read or set interrupt handling.
185 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
186 * \{
187 */
188 #define Ifx__disable_and_save __disable_and_save
189
190 #define Ifx__restore __restore
191
192 /** \} */
193
194 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_miscellaneous Miscellaneous Intrinsic Functions
195 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
196 * \{
197 */
198
199 /** \} */
200
201 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_packed Packed Data Type Support
202 The next table provides an overview of the intrinsic functions for initialization of packed data type.
203 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
204 * \{
205 */
206
207 /** \} */
208
209 #ifndef __cplusplus
210 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_register Register Handling
211 The next table provides an overview of the intrinsic functions that you can use to access control registers.
212 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
213 * \{
214 */
215 #define Ifx__mtcr_no_isync(reg, val) \
216 __asm("mtcr %0,%1"::"i"(reg),"d"(val));
217
218 /** \} */
219
220 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_saturation Saturation Arithmetic Support
221 These intrinsics support saturation arithmetic
222 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
223 * \{
224 */
225
226 #define Ifx__adds(a,b) ((__sat int)(a)+(__sat int)(b))
227
228 #define Ifx__addsu(a,b) ((__sat unsigned int)(a)+(__sat unsigned int)(b))
229
230 #define Ifx__subs(a,b) ((__sat int)(a)-(__sat int)(b))
231
232 #define Ifx__subsu(a,b) ((__sat unsigned int )(a)-(__sat unsigned int )(b))
233
234 /** \} */
235
236 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_single_assembly Insert Single Assembly Instruction
237 The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
238 instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
239 assembly instructions.
240 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
241 * \{
242 */
243
244 IFX_INLINE void Ifx__nops(void* cnt)
245 {
246 __asm("nop16 \n\t"
247 "loop %0,*-2"
248 ::"a"(((char*)cnt) - 1));
249 }
250
251 #define Ifx__NOP(n) __asm(".DUP " #n "\n\tnop16\n\t.ENDM\n")
252
253 /** Insert a memory barrier
254 */
255 #define Ifx__mem_barrier __asm("":::"memory");
256
257 #if CPU_NO_LDMST
258 IFX_INLINE void Ifx__ldmstC(volatile void *addr, uint32 mask, uint32 data)
259 {
260 *(volatile uint32 *)addr = (*(volatile uint32 *)addr & ~mask) | (mask & data);
261 }
262
263 #define Ifx__ldmst(a,b,c) Ifx__ldmstC(a,b,c)
264 #else
265
266 IFX_INLINE void Ifx__ldmstAsm(volatile void *addr, uint32 mask, uint32 data)
267 {
268 __asm("\tmov d3, %1 \n"
269 "\tmov d2, %2 \n"
270 "\tldmst [%0],e2"
271 ::"a"(addr), "d"(mask), "d"(data):"d2", "d3");
272
273 }
274
275 /** Convert float to fract
276 */
277 IFX_INLINE fract Ifx__float_to_fract(float a)
278 {
279 fract res;
280 __asm("ftoq31 %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
281 return res;
282 }
283
284 #define Ifx__fract_to_sfract __round16
285
286 /** Convert float to sfract
287 */
288 IFX_INLINE sfract Ifx__float_to_sfract(float a)
289 {
290 fract tmp = Ifx__float_to_fract(a);
291 return Ifx__fract_to_sfract(tmp);
292 }
293
294 #define Ifx__ldmst(addr, mask, data) Ifx__ldmstAsm(addr, mask, data)
295 #endif
296
297 IFX_INLINE void Ifx__stopPerfCounters(void)
298 { //__mtcr (CPU_CCTRL, 0);
299 __asm(
300 " mov d0,#0\n"
301 " mtcr #0xFC00,d0\n"
302 " isync\n"
303 :::"d0");
304 }
305
306 /** \} */
307
308 /* FIXME use inline instead of #define */
309 /* FIXME is it really required to have #define __setareg(areg,val) ___setareg(areg,val) or can __setareg() implemented directly */
310 #define Ifx___setareg(areg,val) \
311 { __asm (" movh.a\t "#areg",#@his("#val")\n lea\t "#areg",["#areg"]@los("#val")"); }
312 #define Ifx__setareg(areg,val) Ifx___setareg(areg,val)
313
314 /** \brief This function is a implementation of a binary semaphore using compare and swap instruction
315 * \param address address of resource.
316 * \param value This variable is updated with status of address
317 * \param condition if the value of address matches with the value of condition, then swap of value & address occurs.
318 *
319 */
320 #define Ifx__cmpAndSwap(address,value,condition) \
321 __cmpswapw((address), ((unsigned long)value), (condition) )
322
323 /** \brief Convert a fixpoint value to float32
324 *
325 * This function converts a value from a fixpoint format to a float32 format.
326 *
327 *
328 * \param value value to be converted.
329 * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
330 *
331 * \return Returns the converted value in the float32 format.
332 *
333 */
334 IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
335 {
336 float32 result;
337
338 __asm(
339 " q31tof\t%0, %1, %2 \n"
340 : "=d" (result)
341 : "d" (value), "d" (shift));
342 return result;
343 }
344
345 IFX_INLINE void* Ifx__getA11(void)
346 {
347 unsigned int *res;
348 __asm("mov.aa %0, a11": "=a" (res) : :"a11");
349 return res;
350 }
351
352 IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
353 {
354 __asm("mov.aa a10, %0": : "a" (stackAddr) :"a10");
355 }
356
357 IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
358 {
359 uint32 returnvalue;
360 __asm("MOV d0, #0x0"); /* set seed value to 0 */
361 for (;length > 0; length--)
362 {
363 /*calculate the CRC over all data */
364 __asm("MOV d1,%0" : : "d" (*startaddress));
365 __asm("CRC32B.W d0,d0,d1");
366 startaddress++;
367 }
368 __asm("MOV %0,d0" : "=d" (returnvalue)); /* return result of CRC*/
369 return returnvalue;
370 }
371
372 IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
373 {
374 uint32 result;
375 __asm(" mul.u e14,%1,%2 ; d15 = Eh; d14 = El \n"
376 " mov d12,d14 ; e12 = El \n"
377 " mov d13,#0 ; \n"
378 " madd.u e14,e12,d15,#5 ; e14 = El + 5 * d15 \n"
379 " 1: jge.u d14,%3,2n ; \n"
380 " jz d15,3n ; \n"
381 " 2: subx d14,d14,%3 ; e12=e12-m \n"
382 " subc d15,d15,d13 ; d13=d13-0 \n"
383 " loopu 1p ; \n"
384 " 3: mov %0,d14 ; \n"
385 : "=d"(result) : "d"(a), "d"(x), "d"(m) : "e14","e12");
386 return result;
387 }
388
389 IFX_INLINE sint32 Ifx__popcnt(sint32 a)
390 {
391 sint32 res;
392 __asm("popcnt.w %0,%1":"=d"(res):"d"(a));
393 return res;
394 }
395 #endif
396
397 /* Macros for backward compatibility of the intrinsics*/
398 /******************************************************************************/
399 #ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
400 #ifndef __non_return_call
401 #define __non_return_call Ifx__non_return_call
402 #endif
403
404 #ifndef __jump_and_link
405 #define __jump_and_link Ifx__jump_and_link
406 #endif
407
408 #ifndef __moveToDataParam0
409 #define __moveToDataParam0 Ifx__moveToDataParam0
410 #endif
411
412 #ifndef __moveToAddrParam0
413 #define __moveToAddrParam0 Ifx__moveToAddrParam0
414 #endif
415
416 #ifndef __getDataParamRet
417 #define __getDataParamRet Ifx__getDataParamRet
418 #endif
419
420 #ifndef __moveToDataParamRet
421 #define __moveToDataParamRet Ifx__moveToDataParamRet
422 #endif
423
424 #ifndef __jumpToFunction
425 #define __jumpToFunction Ifx__jumpToFunction
426 #endif
427
428 #ifndef __jumpToFunctionWithLink
429 #define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
430 #endif
431
432 #ifndef __jumpBackToLink
433 #define __jumpBackToLink Ifx__jumpBackToLink
434 #endif
435
436 #ifndef __minX
437 #define __minX Ifx__minX
438 #endif
439
440 #ifndef __maxX
441 #define __maxX Ifx__maxX
442 #endif
443
444 #ifndef __saturateX
445 #define __saturateX Ifx__saturateX
446 #endif
447
448 #ifndef __checkrangeX
449 #define __checkrangeX Ifx__checkrangeX
450 #endif
451
452 #ifndef __saturate
453 #define __saturate Ifx__saturate
454 #endif
455
456 #ifndef __saturateu
457 #define __saturateu Ifx__saturateu
458 #endif
459
460 #ifndef __checkrange
461 #define __checkrange Ifx__checkrange
462 #endif
463
464 #ifndef __sqrtf
465 #define __sqrtf Ifx__sqrtf
466 #endif
467
468 #ifndef __sqrf
469 #define __sqrf Ifx__sqrf
470 #endif
471
472 #ifndef __roundf
473 #define __roundf Ifx__roundf
474 #endif
475
476 #ifndef __absf
477 #define __absf Ifx__absf
478 #endif
479
480 #ifndef __maxf
481 #define __maxf Ifx__maxf
482 #endif
483
484 #ifndef __saturatef
485 #define __saturatef Ifx__saturatef
486 #endif
487
488 #ifndef __minf
489 #define __minf Ifx__minf
490 #endif
491
492 #ifndef __checkrangef
493 #define __checkrangef Ifx__checkrangef
494 #endif
495
496 #ifndef __abs_stdreal
497 #define __abs_stdreal Ifx__abs_stdreal
498 #endif
499
500 #ifndef __saturate_stdreal
501 #define __saturate_stdreal Ifx__saturate_stdreal
502 #endif
503
504 #ifndef __min_stdreal
505 #define __min_stdreal Ifx__min_stdreal
506 #endif
507
508 #ifndef __max_stdreal
509 #define __max_stdreal Ifx__max_stdreal
510 #endif
511
512 #ifndef __neqf
513 #define __neqf Ifx__neqf
514 #endif
515
516 #ifndef __leqf
517 #define __leqf Ifx__leqf
518 #endif
519
520 #ifndef __geqf
521 #define __geqf Ifx__geqf
522 #endif
523
524 #ifndef __fract_to_float
525 #define __fract_to_float Ifx__fract_to_float
526 #endif
527
528 #ifndef __mulfractlong
529 #define __mulfractlong Ifx__mulfractlong
530 #endif
531
532 #ifndef __mulfractfract
533 #define __mulfractfract Ifx__mulfractfract
534 #endif
535
536 #ifndef __disable_and_save
537 #define __disable_and_save Ifx__disable_and_save
538 #endif
539
540 #ifndef __restore
541 #define __restore Ifx__restore
542 #endif
543
544 #ifndef __mtcr_no_isync
545 #define __mtcr_no_isync Ifx__mtcr_no_isync
546 #endif
547
548 #ifndef __adds
549 #define __adds Ifx__adds
550 #endif
551
552 #ifndef __addsu
553 #define __addsu Ifx__addsu
554 #endif
555
556 #ifndef __subs
557 #define __subs Ifx__subs
558 #endif
559
560 #ifndef __subsu
561 #define __subsu Ifx__subsu
562 #endif
563
564 #ifndef __nops
565 #define __nops Ifx__nops
566 #endif
567
568 #if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
569 #define NOP Ifx__NOP
570 #endif
571
572 #ifndef __mem_barrier
573 #define __mem_barrier Ifx__mem_barrier
574 #endif
575
576 #ifndef __ldmst
577 #define __ldmst Ifx__ldmst
578 #endif
579
580 #ifndef __ldmstC
581 #define __ldmstC Ifx__ldmstC
582 #endif
583
584 #ifndef __float_to_sfract
585 #define __float_to_sfract Ifx__float_to_sfract
586 #endif
587
588 #ifndef __float_to_fract
589 #define __float_to_fract Ifx__float_to_fract
590 #endif
591
592 #ifndef __fract_to_sfract
593 #define __fract_to_sfract Ifx__fract_to_sfract
594 #endif
595
596 #ifndef __ldmstAsm
597 #define __ldmstAsm Ifx__ldmstAsm
598 #endif
599
600 #ifndef __stopPerfCounters
601 #define __stopPerfCounters Ifx__stopPerfCounters
602 #endif
603
604 #ifndef __setareg
605 #define __setareg Ifx__setareg
606 #endif
607
608 #ifndef ___setareg
609 #define ___setareg Ifx___setareg
610 #endif
611
612 #ifndef __cmpAndSwap
613 #define __cmpAndSwap Ifx__cmpAndSwap
614 #endif
615
616 #ifndef __fixpoint_to_float32
617 #define __fixpoint_to_float32 Ifx__fixpoint_to_float32
618 #endif
619
620 #ifndef __getA11
621 #define __getA11 Ifx__getA11
622 #endif
623
624 #ifndef __setStackPointer
625 #define __setStackPointer Ifx__setStackPointer
626 #endif
627
628 #ifndef __popcnt
629 #define __popcnt Ifx__popcnt
630 #endif
631
632 #endif
633 /******************************************************************************/
634 /* *INDENT-ON* */
635 /******************************************************************************/
636 #endif /* IFXCPU_INTRINSICSTASKING_H */
Ifx__stopPerfCounters
asm volatile void Ifx__stopPerfCounters(void)
Definition: IfxCpu_IntrinsicsDcc.h:1465
Ifx__jump_and_link
IFX_INLINE void Ifx__jump_and_link(void(*fun)(void))
Definition: IfxCpu_IntrinsicsTasking2G.h:58
Ifx__nops
asm volatile void Ifx__nops(uint32 cnt)
Definition: IfxCpu_IntrinsicsDcc.h:1386
sfract
short sfract
Definition: Ifx_TypesDcc.h:45
Ifx__non_return_call
#define Ifx__non_return_call(fun)
Definition: IfxCpu_IntrinsicsTasking2G.h:54
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx__jumpBackToLink
IFX_INLINE void Ifx__jumpBackToLink(void)
Definition: IfxCpu_IntrinsicsTasking2G.h:95
float32
float float32
Definition: Platform_Types.h:170
Ifx__jumpToFunction
IFX_INLINE void Ifx__jumpToFunction(const void *fun)
Definition: IfxCpu_IntrinsicsTasking2G.h:85
Ifx__moveToAddrParam0
IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
Definition: IfxCpu_IntrinsicsTasking2G.h:68
Ifx__jumpToFunctionWithLink
IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
Definition: IfxCpu_IntrinsicsTasking2G.h:90
Ifx__float_to_sfract
IFX_INLINE sfract Ifx__float_to_sfract(float a)
Definition: IfxCpu_IntrinsicsGhs.h:265
Ifx__moveToDataParamRet
IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
Definition: IfxCpu_IntrinsicsTasking2G.h:80
IfxCpu_getRandomVal
IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Definition: IfxCpu_IntrinsicsTasking2G.h:372
fract
long fract
Definition: Ifx_TypesDcc.h:44
Ifx__moveToDataParam0
IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
Definition: IfxCpu_IntrinsicsTasking2G.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx__getA11
IFX_INLINE void * Ifx__getA11(void)
Definition: IfxCpu_IntrinsicsTasking2G.h:345
Ifx__fract_to_sfract
#define Ifx__fract_to_sfract
Definition: IfxCpu_IntrinsicsTasking2G.h:284
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx__float_to_fract
asm fract Ifx__float_to_fract(float a)
Definition: IfxCpu_IntrinsicsDcc.h:215
Ifx__getDataParamRet
IFX_INLINE unsigned int Ifx__getDataParamRet(void)
Definition: IfxCpu_IntrinsicsTasking2G.h:73
Ifx__popcnt
IFX_INLINE sint32 Ifx__popcnt(sint32 a)
Definition: IfxCpu_IntrinsicsTasking2G.h:389
Ifx__ldmstAsm
IFX_INLINE void Ifx__ldmstAsm(volatile void *addr, uint32 mask, uint32 data)
Definition: IfxCpu_IntrinsicsTasking.h:266
Ifx__fixpoint_to_float32
IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
Convert a fixpoint value to float32.
Definition: IfxCpu_IntrinsicsTasking2G.h:334
Ifx__setStackPointer
IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
Definition: IfxCpu_IntrinsicsTasking2G.h:352
sint32
long sint32
Definition: Platform_Types.h:134
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxCpu_calculateCrc32
IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
Definition: IfxCpu_IntrinsicsTasking2G.h:357


iLLD_TC26B: IfxCpu_IntrinsicsTasking.h Source File

  • Cpu
  • Std
IfxCpu_IntrinsicsTasking.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_IntrinsicsTasking.h
3 *
4 * \version iLLD_1_0_1_12_0
5 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup IfxLld_Cpu_Intrinsics_Tasking Intrinsics for TASKING compiler
41 * \ingroup IfxLld_Cpu_Intrinsics
42 *
43 */
44 #ifndef IFXCPU_INTRINSICSTASKING_H
45 #define IFXCPU_INTRINSICSTASKING_H
46 /******************************************************************************/
47 #include "Ifx_Types.h"
48 /******************************************************************************/
49 /* *INDENT-OFF* */
50
51 #ifndef __cplusplus
52 /** Function call without return
53 */
54 #define Ifx__non_return_call(fun) __asm("\tji %0"::"a"(fun))
55
56 /** Jump and link
57 */
58 IFX_INLINE void Ifx__jump_and_link(void (*fun)(void))
59 {
60 __asm("jli %0"::"a"(fun));
61 }
62
63 IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
64 {
65 __asm("mov d4, %0"::"d"(var));
66 }
67
68 IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
69 {
70 __asm("mov.aa a4, %0"::"a"(var));
71 }
72
73 IFX_INLINE unsigned int Ifx__getDataParamRet(void)
74 {
75 unsigned int var;
76 __asm(" mov\t %0, d2":"=d"(var));
77 return var;
78 }
79
80 IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
81 {
82 __asm("mov d2, %0"::"d"(var));
83 }
84
85 IFX_INLINE void Ifx__jumpToFunction(const void *fun)
86 {
87 Ifx__non_return_call(fun);
88 }
89
90 IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
91 {
92 Ifx__jump_and_link((void (*)(void))fun);
93 }
94
95 IFX_INLINE void Ifx__jumpBackToLink(void)
96 {
97 __asm("ji a11");
98 }
99 #endif
100 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_any_type Cross type arithmetic operation
101 *
102 * Macro compatible with float, fix point, signed integer and unsigned integer
103 *
104 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
105 * \{
106 */
107 #define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
108 #define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
109 #define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
110 #define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
111 /** \} */
112
113 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_singed_integer Signed integer operation
114 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
115 * \{
116 */
117 #define Ifx__saturate(X,Min,Max) ( __min(__max(X, Min), Max) )
118 /** \} */
119
120 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_unsinged_integer Unsigned integer operation
121 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
122 * \{
123 */
124 #define Ifx__saturateu(X,Min,Max) ( __minu(__maxu(X, Min), Max) )
125 /** \} */
126
127 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_float Floating point operation
128 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
129 * \{
130 */
131 #define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
132
133 #define Ifx__sqrf(X) ((X) * (X))
134 #define Ifx__sqrtf(X) sqrtf(X)
135
136 #define Ifx__roundf(X) ((((X) - (int)(X)) > 0.5) ? (1 + (int)(X)) : ((int)(X)))
137 #define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
138 #define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
139 #define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
140 #define Ifx__saturatef(X,Min,Max) ( Ifx__minf(_Ifx_maxf(X, Min), Max) )
141 #define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
142
143 #define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
144 #define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
145 #define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
146 #define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
147
148 #define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
149 #define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
150 #define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
151 /** \} */
152 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_fractional Fractional Arithmetic Support
153 The next table provides an overview of intrinsic functions to convert fractional values. Note that the
154 TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
155 need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
156 compiler does support these functions.
157 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
158 * \{
159 */
160 #define Ifx__fract_to_float(value) ((float)(value))
161
162 #define Ifx__mulfractlong __mulfractlong
163
164 #define Ifx__mulfractfract(fractvalue1,fractvalue2) ((fractvalue1)*(fractvalue2))
165
166 /** \} */
167
168 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_insert Insert / Extract Bit-fields and Bits
169 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
170 * \{
171 */
172
173 #define Ifx__extru(a, p, w) __extru(a,p,w)
174
175 #define Ifx__extr(a, p, w) __extr(a,p,w)
176
177 #define Ifx__imaskldmst(a, v, b, p) __imaskldmst((int*)a, v, b, p)
178
179 #define Ifx__insert(a,b,p,w) __insert(a,b,p,w)
180
181 /** \} */
182
183 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_interrupt_handling Interrupt Handling
184 The next table provides an overview of the intrinsic functions to read or set interrupt handling.
185 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
186 * \{
187 */
188 #define Ifx__disable_and_save __disable_and_save
189
190 #define Ifx__restore __restore
191
192 /** \} */
193
194 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_miscellaneous Miscellaneous Intrinsic Functions
195 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
196 * \{
197 */
198
199 /** \} */
200
201 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_packed Packed Data Type Support
202 The next table provides an overview of the intrinsic functions for initialization of packed data type.
203 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
204 * \{
205 */
206
207 /** \} */
208
209 #ifndef __cplusplus
210 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_register Register Handling
211 The next table provides an overview of the intrinsic functions that you can use to access control registers.
212 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
213 * \{
214 */
215 #define Ifx__mtcr_no_isync(reg, val) \
216 __asm("mtcr %0,%1"::"i"(reg),"d"(val));
217
218 /** \} */
219
220 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_saturation Saturation Arithmetic Support
221 These intrinsics support saturation arithmetic
222 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
223 * \{
224 */
225
226 #define Ifx__adds(a,b) ((__sat int)(a)+(__sat int)(b))
227
228 #define Ifx__addsu(a,b) ((__sat unsigned int)(a)+(__sat unsigned int)(b))
229
230 #define Ifx__subs(a,b) ((__sat int)(a)-(__sat int)(b))
231
232 #define Ifx__subsu(a,b) ((__sat unsigned int )(a)-(__sat unsigned int )(b))
233
234 /** \} */
235
236 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_single_assembly Insert Single Assembly Instruction
237 The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
238 instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
239 assembly instructions.
240 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
241 * \{
242 */
243
244 IFX_INLINE void Ifx__nops(void* cnt)
245 {
246 __asm("nop16 \n\t"
247 "loop %0,*-2"
248 ::"a"(((char*)cnt) - 1));
249 }
250
251 #define Ifx__NOP(n) __asm(".DUP " #n "\n\tnop16\n\t.ENDM\n")
252
253 /** Insert a memory barrier
254 */
255 #define Ifx__mem_barrier __asm("":::"memory");
256
257 #if CPU_NO_LDMST
258 IFX_INLINE void Ifx__ldmstC(volatile void *addr, uint32 mask, uint32 data)
259 {
260 *(volatile uint32 *)addr = (*(volatile uint32 *)addr & ~mask) | (mask & data);
261 }
262
263 #define Ifx__ldmst(a,b,c) Ifx__ldmstC(a,b,c)
264 #else
265
266 IFX_INLINE void Ifx__ldmstAsm(volatile void *addr, uint32 mask, uint32 data)
267 {
268 __asm("\tmov d3, %1 \n"
269 "\tmov d2, %2 \n"
270 "\tldmst [%0],e2"
271 ::"a"(addr), "d"(mask), "d"(data):"d2", "d3");
272
273 }
274
275 /** Convert float to fract
276 */
277 IFX_INLINE fract Ifx__float_to_fract(float a)
278 {
279 fract res;
280 __asm("ftoq31 %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
281 return res;
282 }
283
284 #define Ifx__fract_to_sfract __round16
285
286 /** Convert float to sfract
287 */
288 IFX_INLINE sfract Ifx__float_to_sfract(float a)
289 {
290 fract tmp = Ifx__float_to_fract(a);
291 return Ifx__fract_to_sfract(tmp);
292 }
293
294 #define Ifx__ldmst(addr, mask, data) Ifx__ldmstAsm(addr, mask, data)
295 #endif
296
297 IFX_INLINE void Ifx__stopPerfCounters(void)
298 { //__mtcr (CPU_CCTRL, 0);
299 __asm(
300 " mov d0,#0\n"
301 " mtcr #0xFC00,d0\n"
302 " isync\n"
303 :::"d0");
304 }
305
306 /** \} */
307
308 /* FIXME use inline instead of #define */
309 /* FIXME is it really required to have #define __setareg(areg,val) ___setareg(areg,val) or can __setareg() implemented directly */
310 #define Ifx___setareg(areg,val) \
311 { __asm (" movh.a\t "#areg",#@his("#val")\n lea\t "#areg",["#areg"]@los("#val")"); }
312 #define Ifx__setareg(areg,val) Ifx___setareg(areg,val)
313
314 /** \brief This function is a implementation of a binary semaphore using compare and swap instruction
315 * \param address address of resource.
316 * \param value This variable is updated with status of address
317 * \param condition if the value of address matches with the value of condition, then swap of value & address occurs.
318 *
319 */
320 #define Ifx__cmpAndSwap(address,value,condition) \
321 __cmpswapw((address), ((unsigned long)value), (condition) )
322
323 /** \brief Convert a fixpoint value to float32
324 *
325 * This function converts a value from a fixpoint format to a float32 format.
326 *
327 *
328 * \param value value to be converted.
329 * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
330 *
331 * \return Returns the converted value in the float32 format.
332 *
333 */
334 IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
335 {
336 float32 result;
337
338 __asm(
339 " q31tof\t%0, %1, %2 \n"
340 : "=d" (result)
341 : "d" (value), "d" (shift));
342 return result;
343 }
344
345 IFX_INLINE void* Ifx__getA11(void)
346 {
347 unsigned int *res;
348 __asm("mov.aa %0, a11": "=a" (res) : :"a11");
349 return res;
350 }
351
352 IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
353 {
354 __asm("mov.aa a10, %0": : "a" (stackAddr) :"a10");
355 }
356
357 IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
358 {
359 uint32 returnvalue;
360 __asm("MOV d0, #0x0"); /* set seed value to 0 */
361 for (;length > 0; length--)
362 {
363 /*calculate the CRC over all data */
364 __asm("MOV d1,%0" : : "d" (*startaddress));
365 __asm("CRC32 d0,d0,d1");
366 startaddress++;
367 }
368 __asm("MOV %0,d0" : "=d" (returnvalue)); /* return result of CRC*/
369 return returnvalue;
370 }
371
372 IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
373 {
374 uint32 result;
375 __asm(" mul.u e14,%1,%2 ; d15 = Eh; d14 = El \n"
376 " mov d12,d14 ; e12 = El \n"
377 " mov d13,#0 ; \n"
378 " madd.u e14,e12,d15,#5 ; e14 = El + 5 * d15 \n"
379 " 1: jge.u d14,%3,2n ; \n"
380 " jz d15,3n ; \n"
381 " 2: subx d14,d14,%3 ; e12=e12-m \n"
382 " subc d15,d15,d13 ; d13=d13-0 \n"
383 " loopu 1p ; \n"
384 " 3: mov %0,d14 ; \n"
385 : "=d"(result) : "d"(a), "d"(x), "d"(m) : "e14","e12");
386 return result;
387 }
388
389 IFX_INLINE sint32 Ifx__popcnt(sint32 a)
390 {
391 sint32 res;
392 __asm("popcnt %0,%1":"=d"(res):"d"(a));
393 return res;
394 }
395 #endif
396
397 /* Macros for backward compatibility of the intrinsics*/
398 /******************************************************************************/
399 #ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
400 #ifndef __non_return_call
401 #define __non_return_call Ifx__non_return_call
402 #endif
403
404 #ifndef __jump_and_link
405 #define __jump_and_link Ifx__jump_and_link
406 #endif
407
408 #ifndef __moveToDataParam0
409 #define __moveToDataParam0 Ifx__moveToDataParam0
410 #endif
411
412 #ifndef __moveToAddrParam0
413 #define __moveToAddrParam0 Ifx__moveToAddrParam0
414 #endif
415
416 #ifndef __getDataParamRet
417 #define __getDataParamRet Ifx__getDataParamRet
418 #endif
419
420 #ifndef __moveToDataParamRet
421 #define __moveToDataParamRet Ifx__moveToDataParamRet
422 #endif
423
424 #ifndef __jumpToFunction
425 #define __jumpToFunction Ifx__jumpToFunction
426 #endif
427
428 #ifndef __jumpToFunctionWithLink
429 #define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
430 #endif
431
432 #ifndef __jumpBackToLink
433 #define __jumpBackToLink Ifx__jumpBackToLink
434 #endif
435
436 #ifndef __minX
437 #define __minX Ifx__minX
438 #endif
439
440 #ifndef __maxX
441 #define __maxX Ifx__maxX
442 #endif
443
444 #ifndef __saturateX
445 #define __saturateX Ifx__saturateX
446 #endif
447
448 #ifndef __checkrangeX
449 #define __checkrangeX Ifx__checkrangeX
450 #endif
451
452 #ifndef __saturate
453 #define __saturate Ifx__saturate
454 #endif
455
456 #ifndef __saturateu
457 #define __saturateu Ifx__saturateu
458 #endif
459
460 #ifndef __checkrange
461 #define __checkrange Ifx__checkrange
462 #endif
463
464 #ifndef __sqrtf
465 #define __sqrtf Ifx__sqrtf
466 #endif
467
468 #ifndef __sqrf
469 #define __sqrf Ifx__sqrf
470 #endif
471
472 #ifndef __roundf
473 #define __roundf Ifx__roundf
474 #endif
475
476 #ifndef __absf
477 #define __absf Ifx__absf
478 #endif
479
480 #ifndef __maxf
481 #define __maxf Ifx__maxf
482 #endif
483
484 #ifndef __saturatef
485 #define __saturatef Ifx__saturatef
486 #endif
487
488 #ifndef __minf
489 #define __minf Ifx__minf
490 #endif
491
492 #ifndef __checkrangef
493 #define __checkrangef Ifx__checkrangef
494 #endif
495
496 #ifndef __abs_stdreal
497 #define __abs_stdreal Ifx__abs_stdreal
498 #endif
499
500 #ifndef __saturate_stdreal
501 #define __saturate_stdreal Ifx__saturate_stdreal
502 #endif
503
504 #ifndef __min_stdreal
505 #define __min_stdreal Ifx__min_stdreal
506 #endif
507
508 #ifndef __max_stdreal
509 #define __max_stdreal Ifx__max_stdreal
510 #endif
511
512 #ifndef __neqf
513 #define __neqf Ifx__neqf
514 #endif
515
516 #ifndef __leqf
517 #define __leqf Ifx__leqf
518 #endif
519
520 #ifndef __geqf
521 #define __geqf Ifx__geqf
522 #endif
523
524 #ifndef __fract_to_float
525 #define __fract_to_float Ifx__fract_to_float
526 #endif
527
528 #ifndef __mulfractlong
529 #define __mulfractlong Ifx__mulfractlong
530 #endif
531
532 #ifndef __mulfractfract
533 #define __mulfractfract Ifx__mulfractfract
534 #endif
535
536 #ifndef __disable_and_save
537 #define __disable_and_save Ifx__disable_and_save
538 #endif
539
540 #ifndef __restore
541 #define __restore Ifx__restore
542 #endif
543
544 #ifndef __mtcr_no_isync
545 #define __mtcr_no_isync Ifx__mtcr_no_isync
546 #endif
547
548 #ifndef __adds
549 #define __adds Ifx__adds
550 #endif
551
552 #ifndef __addsu
553 #define __addsu Ifx__addsu
554 #endif
555
556 #ifndef __subs
557 #define __subs Ifx__subs
558 #endif
559
560 #ifndef __subsu
561 #define __subsu Ifx__subsu
562 #endif
563
564 #ifndef __nops
565 #define __nops Ifx__nops
566 #endif
567
568 #if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
569 #define NOP Ifx__NOP
570 #endif
571
572 #ifndef __mem_barrier
573 #define __mem_barrier Ifx__mem_barrier
574 #endif
575
576 #ifndef __ldmst
577 #define __ldmst Ifx__ldmst
578 #endif
579
580 #ifndef __ldmstC
581 #define __ldmstC Ifx__ldmstC
582 #endif
583
584 #ifndef __float_to_sfract
585 #define __float_to_sfract Ifx__float_to_sfract
586 #endif
587
588 #ifndef __float_to_fract
589 #define __float_to_fract Ifx__float_to_fract
590 #endif
591
592 #ifndef __fract_to_sfract
593 #define __fract_to_sfract Ifx__fract_to_sfract
594 #endif
595
596 #ifndef __ldmstAsm
597 #define __ldmstAsm Ifx__ldmstAsm
598 #endif
599
600 #ifndef __stopPerfCounters
601 #define __stopPerfCounters Ifx__stopPerfCounters
602 #endif
603
604 #ifndef __setareg
605 #define __setareg Ifx__setareg
606 #endif
607
608 #ifndef ___setareg
609 #define ___setareg Ifx___setareg
610 #endif
611
612 #ifndef __cmpAndSwap
613 #define __cmpAndSwap Ifx__cmpAndSwap
614 #endif
615
616 #ifndef __fixpoint_to_float32
617 #define __fixpoint_to_float32 Ifx__fixpoint_to_float32
618 #endif
619
620 #ifndef __getA11
621 #define __getA11 Ifx__getA11
622 #endif
623
624 #ifndef __setStackPointer
625 #define __setStackPointer Ifx__setStackPointer
626 #endif
627
628 #ifndef __popcnt
629 #define __popcnt Ifx__popcnt
630 #endif
631
632 #endif
633 /******************************************************************************/
634 /* *INDENT-ON* */
635 /******************************************************************************/
636 #endif /* IFXCPU_INTRINSICSTASKING_H */
Ifx__moveToDataParam0
IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
Definition: IfxCpu_IntrinsicsTasking.h:63
Ifx__jumpToFunctionWithLink
IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
Definition: IfxCpu_IntrinsicsTasking.h:90
Ifx__stopPerfCounters
IFX_INLINE void Ifx__stopPerfCounters(void)
Definition: IfxCpu_IntrinsicsTasking.h:297
sfract
short sfract
Definition: Ifx_TypesDcc.h:45
IfxCpu_getRandomVal
IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Definition: IfxCpu_IntrinsicsTasking.h:372
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
Ifx__jumpBackToLink
IFX_INLINE void Ifx__jumpBackToLink(void)
Definition: IfxCpu_IntrinsicsTasking.h:95
Ifx__getA11
IFX_INLINE void * Ifx__getA11(void)
Definition: IfxCpu_IntrinsicsTasking.h:345
fract
long fract
Definition: Ifx_TypesDcc.h:44
Ifx__jumpToFunction
IFX_INLINE void Ifx__jumpToFunction(const void *fun)
Definition: IfxCpu_IntrinsicsTasking.h:85
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx__moveToDataParamRet
IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
Definition: IfxCpu_IntrinsicsTasking.h:80
IfxCpu_calculateCrc32
IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
Definition: IfxCpu_IntrinsicsTasking.h:357
Ifx__fract_to_sfract
#define Ifx__fract_to_sfract
Definition: IfxCpu_IntrinsicsTasking.h:284
Ifx__non_return_call
#define Ifx__non_return_call(fun)
Definition: IfxCpu_IntrinsicsTasking.h:54
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx__nops
IFX_INLINE void Ifx__nops(void *cnt)
Definition: IfxCpu_IntrinsicsTasking.h:244
Ifx__fixpoint_to_float32
IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
Convert a fixpoint value to float32.
Definition: IfxCpu_IntrinsicsTasking.h:334
Ifx__float_to_fract
IFX_INLINE fract Ifx__float_to_fract(float a)
Definition: IfxCpu_IntrinsicsTasking.h:277
Ifx__ldmstAsm
IFX_INLINE void Ifx__ldmstAsm(volatile void *addr, uint32 mask, uint32 data)
Definition: IfxCpu_IntrinsicsTasking.h:266
sint32
long sint32
Definition: Platform_Types.h:134
Ifx__getDataParamRet
IFX_INLINE unsigned int Ifx__getDataParamRet(void)
Definition: IfxCpu_IntrinsicsTasking.h:73
Ifx__moveToAddrParam0
IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
Definition: IfxCpu_IntrinsicsTasking.h:68
Ifx__popcnt
IFX_INLINE sint32 Ifx__popcnt(sint32 a)
Definition: IfxCpu_IntrinsicsTasking.h:389
Ifx__float_to_sfract
IFX_INLINE sfract Ifx__float_to_sfract(float a)
Definition: IfxCpu_IntrinsicsTasking.h:288
Ifx__jump_and_link
IFX_INLINE void Ifx__jump_and_link(void(*fun)(void))
Definition: IfxCpu_IntrinsicsTasking.h:58
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx__setStackPointer
IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
Definition: IfxCpu_IntrinsicsTasking.h:352


iLLD_TC26B: IfxCpu_Irq.c Source File

  • Cpu
  • Irq
IfxCpu_Irq.c
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Irq.c
3 * \brief This file contains the APIs for Interrupt related functions.
4 *
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 *
43 */
44
45 /*******************************************************************************
46 ** Includes **
47 *******************************************************************************/
48 #include "Cpu/Irq/IfxCpu_Irq.h"
49 #include "Tricore/Compilers/Compilers.h"
50 #include "Cpu/Std/IfxCpu_Intrinsics.h"
51 #include "IfxCpu_reg.h"
52
53 /*******************************************************************************
54 ** Private macros **
55 *******************************************************************************/
56
57 /*******************************************************************************
58 ** Global variables/constants **
59 *******************************************************************************/
60 #if defined(IFX_USE_SW_MANAGED_INT)
61
62 typedef void (*Ifx_Isr)(void);
63
64 static Ifx_Isr IfxCpu_Irq_swIntVector[256];
65
66 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
67
68 /*******************************************************************************
69 ** Global Function definitions **
70 *******************************************************************************/
71 #if defined(IFX_USE_SW_MANAGED_INT)
72
73 /** \brief API to install the interrupt service routine for Software Managed Interrupts.
74 *
75 */
76 void IfxCpu_Irq_installInterruptHandler(void *isrFuncPointer, uint32 serviceReqPrioNumber)
77 {
78 IfxCpu_Irq_swIntVector[serviceReqPrioNumber] = (Ifx_Isr)isrFuncPointer;
79 }
80
81
82 /** SW managed Interrupt vector table
83 *
84 * This is vector table with single entry for Software Managed Interrupts.
85 * This function need to be located at boundary 0xXFE0 where (X=1,3,5 and so on). For the software managed
86 * interrupts to work correctly, the BIV must be set to address of this function.
87 *
88 */
89 IFX_INTERRUPT_INTERNAL(IfxCpu_Irq_intVecTable, 0, 255)
90 {
91 Ifx_CPU_ICR icr;
92
93 icr.U = __mfcr(CPU_ICR); /*Fetch the ICR value */
94
95 /*Call the ISR */
96 IfxCpu_Irq_swIntVector[icr.B.CCPN]();
97 }
98
99 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
__mfcr
sint32 __mfcr(const uint32) __attribute__((intrinsic_function(0x101
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCpu_Intrinsics.h
IFX_INTERRUPT_INTERNAL
#define IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
Definition: CompilerDcc.h:124
Compilers.h
IfxCpu_Irq.h
This file contains the APIs for Interrupt related functions.


iLLD_TC26B: IfxCpu_Irq.h Source File

  • Cpu
  • Irq
IfxCpu_Irq.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Irq.h
3 * \brief This file contains the APIs for Interrupt related functions.
4 *
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Cpu_Irq Interrupt Functions
42 * \ingroup IfxLld_Cpu
43 *
44 * \defgroup IfxLld_Cpu_Irq_Usage How to define Interrupts?
45 * \ingroup IfxLld_Cpu_Irq
46 *
47 * \defgroup IfxLld_Cpu_Irq_Functions Functions
48 * \ingroup IfxLld_Cpu_Irq
49 *
50 */
51 #ifndef IFXCPU_IRQ_H_
52 #define IFXCPU_IRQ_H_
53
54 /*******************************************************************************
55 ** Includes **
56 *******************************************************************************/
57 #include "Ifx_Cfg.h"
58 #include "Cpu/Std/Ifx_Types.h"
59 #include "Cpu/Std/IfxCpu.h"
60 #include "Src/Std/IfxSrc.h"
61 /*******************************************************************************
62 ** Type definitions **
63 *******************************************************************************/
64
65 /*******************************************************************************
66 ** Global Exported variables/constants **
67 *******************************************************************************/
68
69 /*******************************************************************************
70 ** Global Exported macros/inlines/function ptototypes **
71 *******************************************************************************/
72
73 #if defined(IFX_USE_SW_MANAGED_INT)
74 /** \addtogroup IfxLld_Cpu_Irq_Functions
75 * \{ */
76 /** \brief API for Interrupt handler install for SW Managed interrupts.
77 * This API installs the isr to SW interrupt vector.
78 * This must be used only when IFX_USE_SW_MANAGED_INT is defined in Ifx_Cfg.h
79 *
80 * \param isrFuncPointer pointer to ISR function.
81 * \param serviceReqPrioNumber ISR priority.
82 */
83
84 IFX_EXTERN void IfxCpu_Irq_installInterruptHandler(void *isrFuncPointer, uint32 serviceReqPrioNumber);
85
86 IFX_INLINE void interruptHandlerInstall(uint32 srpn, uint32 addr)
87 {
88 IfxCpu_Irq_installInterruptHandler((void *)addr, srpn);
89 }
90
91
92 /** \} */
93 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
94
95 /** \addtogroup IfxLld_Cpu_Irq_Functions
96 * \{ */
97 /** \brief API to get type of service of the caller CPU.
98 * \param coreId core id of the core
99 * \return type of service for the corresponding CPU.
100 */
101 IFX_INLINE IfxSrc_Tos IfxCpu_Irq_getTos(IfxCpu_ResourceCpu coreId)
102 {
103 return (IfxSrc_Tos)coreId;
104 }
105
106
107 /** \} */
108
109 /*Documentation */
110 /** \addtogroup IfxLld_Cpu_Irq_Usage
111 * \{
112 *
113 * This page describes how to use interrupts with application framework.\n
114 *
115 * \section IfxLld_Cpu_Irq_Terminology Interrupts Terminology:
116 * \subsection IfxLld_Cpu_Irq_HWManaged Hardware Managed Interrupt Mechanism.
117 * Hardware managed interrupts have static interrupt vector which are defined for each priority separately.
118 * These vectors have jump instruction to the interrupt handler.
119 *
120 * Advantages:\n
121 * This mechanism has less interrupt latency time.
122 *
123 * \subsection IfxLld_Cpu_Irq_SWManaged Software Managed Interrupt Mechanism.
124 * Software managed interrupts have single interrupt vector statically defined at vector position 255.
125 * This address is assigned to BIV during startup.\n
126 * For Tricore, this vector position is important, because whenever an interrupt occurs, with whichever priority,
127 * the execution control jumps to this vector position. The code at this vector position will:\n
128 * 1) fetch the priority of the targetted interrupt.\n
129 * 2) fetch the interrupt handler defined for this priority (this is done by Interrupt handler installation. Refer
130 * \ref IfxLld_Cpu_Irq_Step4\n
131 * 3) Then call the handler as notmal function call.
132 *
133 * Advantages:\n
134 * This kind of mechanism is useful when project wants to change the handler for an interrupt during runtime.
135 *
136 * Disadvantages:\n
137 * This mechanism has more interrupt latency time.
138 *
139 * of the interrupt and in tand jumps to the function
140 *
141 * \section IfxLld_Cpu_Irq_Steps Steps to use Interrupt Mechanism.
142 * Dependency: Ifx_Compilers, Ifx_Cpu, Ifx_Src, IfxCpu_Irq\n
143 * Following are the steps to use interrupt mechanism.
144 *
145 * \section IfxLld_Cpu_Irq_Step1 Step1: Define Interrupt priorities.
146 * Define priorities of all interrupts with names corresponding to their functionality. It is recommended to define
147 * such priority definitions in single header file, because it is easy to detect if ISR priorities are conflicting.
148 * In Tricore architecture, two Isrs can't have same priority at same point of time.
149 * \note These defines shall be defined without brackets surrounding priority number. (eg. #define PRIO (10) is not allowed)
150 *
151 * In a user defined file eg. Ifx_IntPrioDef.h, placed in folder: 0_AppSw/Tricore/DemoApp:
152 * \code
153 * //file: Ifx_IntPrioDef.h.
154 * #define IFX_INTPRIO_FUNCT1 1
155 * #define IFX_INTPRIO_FUNCT2 2
156 * #define IFX_INTPRIO_FUNCT3 5
157 * #define IFX_INTPRIO_STM0 8
158 * #define IFX_INTPRIO_ADC_FUNC1 10
159 * //etc.
160 * \endcode
161 *
162 * \note !! IMPORTANT !!\n As explained above, the definition with closing bracket around priority number as,
163 * #define IFX_INTPRIO_FUNCT1 (1) will cause compilation error. Because linker sections which are constructed
164 * using such information will also get these brackets included. Which look like ".intvec_tc0_(1)" instead of the
165 * expected ".intvec_tc0_1"\n
166 * Linker sections' definitions are predefined statically in .lsl file,
167 * for all 255 interrupts, with the format ".intvec_tc<vector number>_<interrupt priority>".
168 *
169 * \section IfxLld_Cpu_Irq_Step2 Step2: Define Type of interrupt mechanism.
170 * \subsection IfxLld_Cpu_Irq_HWManaged_Usage To use Hardware Managed Interrupt Mechanism.
171 * Refer \ref IfxLld_Cpu_Irq_HWManaged
172 * If project is designed for hardware managed interrupts, this feature is enabled at the file Ifx_Cfg.h, at path:
173 * 0_Src/0_AppSw/Config/Common/, as shown below. IFX_USE_SW_MANAGED_INT definition must be undefined (i.e. the
174 * statement "#define IFX_USE_SW_MANAGED_INT" shall be commented as below).
175 *
176 * \code
177 * //file: Ifx_Cfg.h
178 *
179 * //#define IFX_USE_SW_MANAGED_INT
180 *
181 * \endcode
182 *
183 * \subsection IfxLld_Cpu_Irq_SWManaged_Usage To use Software Managed Interrupt Mechanism.
184 * Refer \ref IfxLld_Cpu_Irq_SWManaged
185 * If project is designed for software managed interrupts, this feature is enabled at the file Ifx_Cfg.h, at path:
186 * 0_Src/0_AppSw/Config/Common/, as shown below.
187 * IFX_USE_SW_MANAGED_INT definition must be defined.
188 *
189 * \code
190 * //file: Ifx_Cfg.h
191 *
192 * #define IFX_USE_SW_MANAGED_INT
193 *
194 * \endcode
195 *
196 * Software managed interrupts must also install the "Interrupt Handlers" Refer \ref IfxLld_Cpu_Irq_Step4
197 *
198 * \section IfxLld_Cpu_Irq_Step3 Step3: How to define an Interrupt Service routine?
199 * Interrupt service routines or interrupt handlers are defined in driver specific files or application specific
200 * files.
201 *
202 * \code
203 * //file usercode1.c
204 * #include "Compilers.h" // to get the compiler abstracted macros for interrupt definition
205 * #include "Ifx_IntPrioDef.h" // to get the priority numbers
206 *
207 * //define an ISR with name Isr_Stm0 with priority defined by IFX_INTPRIO_STM0
208 * IFX_INTERRUPT (Isr_Stm0, 0, IFX_INTPRIO_STM0)
209 * {
210 * //Isr code here
211 * }
212 * \endcode
213 *
214 * \code
215 * //file usercode2.c
216 * #include "Compilers.h" // to get the compiler abstracted macros for interrupt definition
217 * #include "Ifx_IntPrioDef.h" // to get the priority numbers
218 *
219 * //define an ISR with name Isr_Adc_fun1 with priority defined by IFX_INTPRIO_ADC_FUNC1
220 * IFX_INTERRUPT (Isr_Adc_fun1, 0, IFX_INTPRIO_ADC_FUNC1)
221 * {
222 * //Isr code here
223 * }
224 * \endcode
225 *
226 * \section IfxLld_Cpu_Irq_Step4 Step4: How to install Interrupt Service routine/handler?
227 * This step is not required for HW managed interrupts.\n
228 * Interrupt service routines or interrupt handlers are installed in driver specific files or application specific
229 * files
230 *
231 * \code
232 * //file usermain.c
233 * #include "IfxCpu_Irq.h"
234 * #include "Ifx_IntPrioDef.h" // to get the priority numbers
235 *
236 * void userfunction_init(void)
237 * {
238 * //code for user function init
239 * // :
240 * // :
241 * IfxCpu_Irq_installInterruptHandler (Isr_Stm0, IFX_INTPRIO_STM0);
242 * IfxCpu_Irq_installInterruptHandler (Isr_Adc_fun1, IFX_INTPRIO_ADC_FUNC1);
243 *
244 * // :
245 * }
246 *
247 * \endcode
248 *
249 * \section IfxLld_Cpu_Irq_Step5 Step5: Managing the Service Request Node.
250 * For the interrupt to get activated, interrupt triggers are needed. These triggers are activated by peripheral modules
251 * and corresponding service request node must be\n
252 * 1) Configured with correct priority number\n
253 * 2) The request node must be enabled\n
254 * Refer to \ref IfxLld_Src_Usage
255 */
256
257 /** \} */
258 #endif /* IFXCPU_IRQ_H_ */
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCpu_Irq_getTos
IFX_INLINE IfxSrc_Tos IfxCpu_Irq_getTos(IfxCpu_ResourceCpu coreId)
API to get type of service of the caller CPU.
Definition: IfxCpu_Irq.h:101
IfxSrc.h
SRC basic functionality.
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:153
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxCpu.h
CPU basic functionality.


iLLD_TC26B: IfxCpu_Trap.c Source File

  • Cpu
  • Trap
IfxCpu_Trap.c
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Trap.c
3 * \brief This file contains the APIs for Trap related functions.
4 *
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /*******************************************************************************
45 ** Includes **
46 *******************************************************************************/
47 #include "IfxCpu_Trap.h"
48 #include "Cpu/Std/IfxCpu.h"
49 #include "Cpu/Std/IfxCpu_Intrinsics.h"
50 #include "IfxCpu_reg.h"
51 #include "Ifx_Cfg.h"
52 #ifdef IFX_CFG_EXTEND_TRAP_HOOKS
53 #include "Ifx_Cfg_Trap.h"
54 #endif
55
56 /******************************************************************************/
57 /* Macros */
58 /******************************************************************************/
59 /** \brief Configuration for CpuX enable.
60 *
61 */
62 #ifndef IFX_CFG_CPU_TRAP_TSR_HOOK
63 # define IFX_CFG_CPU_TRAP_TSR_HOOK(trapWatch) /**< By default macro is empty*/
64 #endif
65 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK
66 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
67 #endif
68 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK
69 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
70 #endif
71 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK
72 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
73 #endif
74 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK
75 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
76 #endif
77 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK
78 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
79 #endif
80 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK
81 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
82 #endif
83 #ifndef IFX_CFG_CPU_TRAP_NMI_HOOK
84 # define IFX_CFG_CPU_TRAP_NMI_HOOK(trapWatch) ((void)trapWatch) /**< By default NMI macro is empty*/
85 #endif
86 #ifndef IFX_CFG_CPU_TRAP_MME_HOOK
87 # define IFX_CFG_CPU_TRAP_MME_HOOK(trapWatch) ((void)trapWatch) /**< By default memory Management Error macro is empty*/
88 #endif
89 #ifndef IFX_CFG_CPU_TRAP_IPE_HOOK
90 # define IFX_CFG_CPU_TRAP_IPE_HOOK(trapWatch) ((void)trapWatch) /**< By default internal Protection Error macro is empty*/
91 #endif
92 #ifndef IFX_CFG_CPU_TRAP_IE_HOOK
93 # define IFX_CFG_CPU_TRAP_IE_HOOK(trapWatch) ((void)trapWatch) /**< By default instruction Error macro is empty*/
94 #endif
95 #ifndef IFX_CFG_CPU_TRAP_CME_HOOK
96 # define IFX_CFG_CPU_TRAP_CME_HOOK(trapWatch) ((void)trapWatch) /**< By default context Management Error macro is empty*/
97 #endif
98 #ifndef IFX_CFG_CPU_TRAP_BE_HOOK
99 # define IFX_CFG_CPU_TRAP_BE_HOOK(trapWatch) ((void)trapWatch) /**< By default bus Error macro is empty*/
100 #endif
101 #ifndef IFX_CFG_CPU_TRAP_ASSERT_HOOK
102 # define IFX_CFG_CPU_TRAP_ASSERT_HOOK(trapWatch) ((void)trapWatch) /**< By default assertion is empty*/
103 #endif
104
105 #ifndef IFX_CFG_CPU_TRAP_DEBUG
106 #define IFX_CFG_CPU_TRAP_DEBUG __debug()
107 #endif
108 /*******************************************************************************
109 ** variables **
110 *******************************************************************************/
111
112 /*******************************************************************************
113 ** Function definitions **
114 *******************************************************************************/
115 IFX_INLINE IfxCpu_Trap IfxCpu_Trap_extractTrapInfo(uint8 trapClass, uint32 tin)
116 {
117 IfxCpu_Trap trapInfo;
118 trapInfo.tAddr = (unsigned int)__getA11();
119 trapInfo.tClass = trapClass;
120 trapInfo.tId = tin;
121 trapInfo.tCpu = IfxCpu_getCoreId();
122 return trapInfo;
123 }
124
125
126 void IfxCpu_Trap_memoryManagementError(uint32 tin)
127 {
128 volatile IfxCpu_Trap trapWatch;
129 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_memoryManagement, tin);
130 IFX_CFG_CPU_TRAP_MME_HOOK(trapWatch);
131 IFX_CFG_CPU_TRAP_DEBUG;
132 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
133 __asm("rfe");
134 }
135
136
137 void IfxCpu_Trap_internalProtectionError(uint32 tin)
138 {
139 volatile IfxCpu_Trap trapWatch;
140 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_internalProtection, tin);
141 IFX_CFG_CPU_TRAP_IPE_HOOK(trapWatch);
142 IFX_CFG_CPU_TRAP_DEBUG;
143 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
144 __asm("rfe");
145 }
146
147
148 void IfxCpu_Trap_instructionError(uint32 tin)
149 {
150 volatile IfxCpu_Trap trapWatch;
151 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_instructionErrors, tin);
152 IFX_CFG_CPU_TRAP_IE_HOOK(trapWatch);
153 IFX_CFG_CPU_TRAP_DEBUG;
154 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
155 __asm("rfe");
156 }
157
158
159 void IfxCpu_Trap_contextManagementError(uint32 tin)
160 {
161 volatile IfxCpu_Trap trapWatch;
162 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_contextManagement, tin);
163 IFX_CFG_CPU_TRAP_CME_HOOK(trapWatch);
164 IFX_CFG_CPU_TRAP_DEBUG;
165 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
166 __asm("rfe");
167 }
168
169
170 void IfxCpu_Trap_busError(uint32 tin)
171 {
172 volatile IfxCpu_Trap trapWatch;
173 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_bus, tin);
174 IFX_CFG_CPU_TRAP_BE_HOOK(trapWatch);
175 IFX_CFG_CPU_TRAP_DEBUG;
176 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
177 __asm("rfe");
178 }
179
180
181 void IfxCpu_Trap_assertion(uint32 tin)
182 {
183 volatile IfxCpu_Trap trapWatch;
184 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_assertion, tin);
185 IFX_CFG_CPU_TRAP_ASSERT_HOOK(trapWatch);
186 IFX_CFG_CPU_TRAP_DEBUG;
187 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
188 __asm("rfe");
189 }
190
191
192 void IfxCpu_Trap_systemCall_Cpu0(uint32 tin)
193 {
194 volatile IfxCpu_Trap trapWatch;
195 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
196 IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK(trapWatch);
197 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
198 __asm("rfe");
199 }
200
201 #if IFXCPU_NUM_MODULES >= 2
202 void IfxCpu_Trap_systemCall_Cpu1(uint32 tin)
203 {
204 volatile IfxCpu_Trap trapWatch;
205 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
206 IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK(trapWatch);
207 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
208 __asm("rfe");
209 }
210 #endif
211
212 #if IFXCPU_NUM_MODULES >= 3
213 void IfxCpu_Trap_systemCall_Cpu2(uint32 tin)
214 {
215 volatile IfxCpu_Trap trapWatch;
216 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
217 IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK(trapWatch);
218 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
219 __asm("rfe");
220 }
221 #endif
222
223 #if IFXCPU_NUM_MODULES >= 4
224 void IfxCpu_Trap_systemCall_Cpu3(uint32 tin)
225 {
226 volatile IfxCpu_Trap trapWatch;
227 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
228 IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK(trapWatch);
229 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
230 __asm("rfe");
231 }
232 #endif
233
234 #if IFXCPU_NUM_MODULES >= 5
235 void IfxCpu_Trap_systemCall_Cpu4(uint32 tin)
236 {
237 volatile IfxCpu_Trap trapWatch;
238 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
239 IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK(trapWatch);
240 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
241 __asm("rfe");
242 }
243 #endif
244
245 #if IFXCPU_NUM_MODULES >= 6
246 void IfxCpu_Trap_systemCall_Cpu5(uint32 tin)
247 {
248 volatile IfxCpu_Trap trapWatch;
249 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
250 IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK(trapWatch);
251 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
252 __asm("rfe");
253 }
254 #endif
255
256 void IfxCpu_Trap_nonMaskableInterrupt(uint32 tin)
257 {
258 volatile IfxCpu_Trap trapWatch;
259 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_nonMaskableInterrupt, tin);
260 IFX_CFG_CPU_TRAP_NMI_HOOK(trapWatch);
261 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
262 __asm("rfe");
263 }
264
265
266 #if defined(__HIGHTEC__)
267 #pragma section
268 #pragma section ".traptab_cpu0" awx
269 #pragma GCC optimize ("O2")
270 #endif
271 #if defined(__DCC__)
272 #pragma section
273 #pragma section CODE ".traptab_cpu0" X
274 #endif
275 #if defined(__TASKING__)
276 #pragma protect on
277 #pragma section code "traptab_cpu0"
278 #endif
279 #if defined(__ghs__)
280 #pragma ghs section
281 #pragma ghs section text=".traptab_cpu0"
282 #endif
283 void IfxCpu_Trap_vectorTable0(void)
284 {
285 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
286 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
287 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
288 IfxCpu_Tsr_CallCSATSR(IfxCpu_Trap_contextManagementError);
289 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
290 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
291 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu0);
292 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
293 }
294
295
296 #if IFXCPU_NUM_MODULES >= 2
297 #if defined(__HIGHTEC__)
298 #pragma section
299 #pragma section ".traptab_cpu1" awx
300 #endif
301 #if defined(__DCC__)
302 #pragma section
303 #pragma section CODE ".traptab_cpu1" X
304 #endif
305 #if defined(__TASKING__)
306 #pragma section code "traptab_cpu1"
307 #endif
308 #if defined(__ghs__)
309 #pragma ghs section
310 #pragma ghs section text=".traptab_cpu1"
311 #endif
312 void IfxCpu_Trap_vectorTable1(void)
313 {
314 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
315 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
316 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
317 IfxCpu_Tsr_CallCSATSR(IfxCpu_Trap_contextManagementError);
318 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
319 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
320 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu1);
321 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
322 }
323
324
325 #endif
326
327 #if IFXCPU_NUM_MODULES >= 3
328 #if defined(__HIGHTEC__)
329 #pragma section
330 #pragma section ".traptab_cpu2" awx
331 #endif
332 #if defined(__DCC__)
333 #pragma section
334 #pragma section CODE ".traptab_cpu2" X
335 #endif
336 #if defined(__TASKING__)
337 #pragma section code "traptab_cpu2"
338 #endif
339 #if defined(__ghs__)
340 #pragma ghs section
341 #pragma ghs section text=".traptab_cpu2"
342 #endif
343
344 void IfxCpu_Trap_vectorTable2(void)
345 {
346 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
347 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
348 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
349 IfxCpu_Tsr_CallCSATSR(IfxCpu_Trap_contextManagementError);
350 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
351 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
352 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu2);
353 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
354 }
355
356
357 #endif
358
359 #if IFXCPU_NUM_MODULES >= 4
360 #if defined(__HIGHTEC__)
361 #pragma section
362 #pragma section ".traptab_cpu3" awx
363 #endif
364 #if defined(__DCC__)
365 #pragma section
366 #pragma section CODE ".traptab_cpu3" X
367 #endif
368 #if defined(__TASKING__)
369 #pragma section code "traptab_cpu3"
370 #endif
371 #if defined(__ghs__)
372 #pragma ghs section
373 #pragma ghs section text=".traptab_cpu3"
374 #endif
375
376
377 void IfxCpu_Trap_vectorTable3(void)
378 {
379 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
380 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
381 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
382 IfxCpu_Tsr_CallCSATSR(IfxCpu_Trap_contextManagementError);
383 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
384 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
385 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu3);
386 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
387 }
388
389
390 #endif
391
392 #if IFXCPU_NUM_MODULES >= 5
393 #if defined(__HIGHTEC__)
394 #pragma section
395 #pragma section ".traptab_cpu4" awx
396 #endif
397 #if defined(__DCC__)
398 #pragma section
399 #pragma section CODE ".traptab_cpu4" X
400 #endif
401 #if defined(__TASKING__)
402 #pragma section code "traptab_cpu4"
403 #endif
404 #if defined(__ghs__)
405 #pragma ghs section
406 #pragma ghs section text=".traptab_cpu4"
407 #endif
408
409 void IfxCpu_Trap_vectorTable4(void)
410 {
411 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
412 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
413 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
414 IfxCpu_Tsr_CallCSATSR(IfxCpu_Trap_contextManagementError);
415 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
416 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
417 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu4);
418 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
419 }
420
421
422 #endif
423
424 #if IFXCPU_NUM_MODULES >= 6
425 #if defined(__HIGHTEC__)
426 #pragma section
427 #pragma section ".traptab_cpu5" awx
428 #endif
429 #if defined(__DCC__)
430 #pragma section
431 #pragma section CODE ".traptab_cpu5" X
432 #endif
433 #if defined(__TASKING__)
434 #pragma section code "traptab_cpu5"
435 #endif
436 #if defined(__ghs__)
437 #pragma ghs section
438 #pragma ghs section text=".traptab_cpu5"
439 #endif
440
441 void IfxCpu_Trap_vectorTable5(void)
442 {
443 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
444 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
445 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
446 IfxCpu_Tsr_CallCSATSR(IfxCpu_Trap_contextManagementError);
447 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
448 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
449 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu5);
450 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
451 }
452
453
454 #endif
455
456 #if defined(__HIGHTEC__)
457 #pragma section
458 #endif
459 #if defined(__DCC__)
460 #pragma section
461 #endif
462 #if defined(__DCC__)
463 #pragma interrupt IfxInterruptEx
464 #endif
465 #if defined(__TASKING__)
466 #pragma endprotect
467 #endif
468 #if defined(__ghs__)
469 #pragma ghs section
470 #endif
IfxCpu_Trap::tAddr
unsigned int tAddr
Definition: IfxCpu_Trap.h:185
IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:78
IfxCpu_Trap_Class_contextManagement
Definition: IfxCpu_Trap.h:76
IfxCpu_Trap_systemCall_Cpu0
void IfxCpu_Trap_systemCall_Cpu0(uint32 tin)
Definition: IfxCpu_Trap.c:192
IfxCpu_Trap_assertion
void IfxCpu_Trap_assertion(uint32 tin)
Definition: IfxCpu_Trap.c:181
IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:69
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxCpu_Trap_busError
void IfxCpu_Trap_busError(uint32 tin)
Definition: IfxCpu_Trap.c:170
IfxCpu_Trap_instructionError
void IfxCpu_Trap_instructionError(uint32 tin)
Definition: IfxCpu_Trap.c:148
IFX_CFG_CPU_TRAP_NMI_HOOK
#define IFX_CFG_CPU_TRAP_NMI_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:84
IFX_CFG_CPU_TRAP_CME_HOOK
#define IFX_CFG_CPU_TRAP_CME_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:96
IfxCpu_Trap_contextManagementError
void IfxCpu_Trap_contextManagementError(uint32 tin)
Definition: IfxCpu_Trap.c:159
IfxCpu_Trap_Class_instructionErrors
Definition: IfxCpu_Trap.h:75
IfxCpu_Intrinsics.h
IfxCpu_Trap.h
IFX_CFG_CPU_TRAP_IE_HOOK
#define IFX_CFG_CPU_TRAP_IE_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:93
IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:66
IfxCpu_Trap_Class_memoryManagement
Definition: IfxCpu_Trap.h:73
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCpu_Trap_Class_systemCall
Definition: IfxCpu_Trap.h:79
IFX_CFG_CPU_TRAP_MME_HOOK
#define IFX_CFG_CPU_TRAP_MME_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:87
IFX_CFG_CPU_TRAP_DEBUG
#define IFX_CFG_CPU_TRAP_DEBUG
Definition: IfxCpu_Trap.c:106
IfxCpu_Trap::tId
unsigned int tId
Definition: IfxCpu_Trap.h:186
IfxCpu_Trap_Class_nonMaskableInterrupt
Definition: IfxCpu_Trap.h:80
IfxCpu_Trap_nonMaskableInterrupt
void IfxCpu_Trap_nonMaskableInterrupt(uint32 tin)
Definition: IfxCpu_Trap.c:256
IfxCpu_Trap_internalProtectionError
void IfxCpu_Trap_internalProtectionError(uint32 tin)
Definition: IfxCpu_Trap.c:137
__getA11
#define __getA11
Definition: IfxCpu_IntrinsicsDcc.h:2105
IfxCpu_Trap_vectorTable0
void IfxCpu_Trap_vectorTable0(void)
Definition: IfxCpu_Trap.c:283
IfxCpu.h
CPU basic functionality.
IfxCpu_Trap_Class_bus
Definition: IfxCpu_Trap.h:77
IfxCpu_Trap_extractTrapInfo
IFX_INLINE IfxCpu_Trap IfxCpu_Trap_extractTrapInfo(uint8 trapClass, uint32 tin)
Definition: IfxCpu_Trap.c:115
IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:81
IFX_CFG_CPU_TRAP_BE_HOOK
#define IFX_CFG_CPU_TRAP_BE_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:99
IfxCpu_Trap::tCpu
unsigned int tCpu
Definition: IfxCpu_Trap.h:188
IFX_CFG_CPU_TRAP_ASSERT_HOOK
#define IFX_CFG_CPU_TRAP_ASSERT_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:102
IfxCpu_Trap::tClass
unsigned int tClass
Definition: IfxCpu_Trap.h:187
IfxCpu_Trap_Class_internalProtection
Definition: IfxCpu_Trap.h:74
IfxCpu_Trap
Structure to contain the trap information.
Definition: IfxCpu_Trap.h:183
IfxCpu_getCoreId
IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu&#39;s may not be continguous and...
Definition: IfxCpu.h:770
IfxCpu_Trap_memoryManagementError
void IfxCpu_Trap_memoryManagementError(uint32 tin)
Definition: IfxCpu_Trap.c:126
IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:75
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IFX_CFG_CPU_TRAP_IPE_HOOK
#define IFX_CFG_CPU_TRAP_IPE_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:90
IfxCpu_Trap_Class_assertion
Definition: IfxCpu_Trap.h:78
IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:72


iLLD_TC26B: IfxCpu_Trap.h Source File

  • Cpu
  • Trap
IfxCpu_Trap.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Trap.c
3 * \brief This file contains the APIs for Trap related functions.
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 * \defgroup IfxLld_Cpu_Trap Trap Functions
42 * \ingroup IfxLld_Cpu
43 *
44 * \defgroup IfxLld_Cpu_Trap_Hooks Trap Function Hooks
45 * \ingroup IfxLld_Cpu_Trap
46 *
47 * \defgroup IfxLld_Cpu_Trap_Usage How to use the Trap Function Hooks?
48 * \ingroup IfxLld_Cpu_Trap
49 *
50 */
51
52 #ifndef IFXCPU_TRAPS_H_
53 #define IFXCPU_TRAPS_H_
54
55 /*******************************************************************************
56 ** Includes **
57 *******************************************************************************/
58 #include "Cpu/Std/Ifx_Types.h"
59 #include "Cpu/Std/IfxCpu_Intrinsics.h"
60 #include "Ifx_Cfg.h"
61
62 /*******************************************************************************
63 ** Type definitions **
64 *******************************************************************************/
65 /** \addtogroup IfxLld_Cpu_Trap_Hooks
66 * \{ */
67
68 /** \brief Enum for available Trap classes.
69 *
70 */
71 typedef enum
72 {
73 IfxCpu_Trap_Class_memoryManagement = 0U,
74 IfxCpu_Trap_Class_internalProtection = 1U,
75 IfxCpu_Trap_Class_instructionErrors = 2U,
76 IfxCpu_Trap_Class_contextManagement = 3U,
77 IfxCpu_Trap_Class_bus = 4U,
78 IfxCpu_Trap_Class_assertion = 5U,
79 IfxCpu_Trap_Class_systemCall = 6U,
80 IfxCpu_Trap_Class_nonMaskableInterrupt = 7U
81 } IfxCpu_Trap_Class;
82
83 /** \brief Enum for available Identification numbers under Memory Management Trap.
84 *
85 */
86 typedef enum
87 {
88 IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill = 0U,
89 IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection = 1U,
90 } IfxCpu_Trap_MemoryManagement_Id;
91
92 /** \brief Enum for available Identification numbers under Internal Protection Trap.
93 *
94 */
95 typedef enum
96 {
97 IfxCpu_Trap_InternalProtection_Id_privilegeViolation = 1U,
98 IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead = 2U,
99 IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite = 3U,
100 IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute = 4U,
101 IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess = 5U,
102 IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress = 6U,
103 IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection = 7U,
104 } IfxCpu_Trap_InternalProtection_Id;
105
106 /** \brief Enum for available Identification numbers under Instruction Errors Trap.
107 *
108 */
109 typedef enum
110 {
111 IfxCpu_Trap_InstructionErrors_Id_illegalOpcode = 1U,
112 IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode = 2U,
113 IfxCpu_Trap_InstructionErrors_Id_invalidOperand = 3U,
114 IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment = 4U,
115 IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress = 5U,
116 } IfxCpu_Trap_InstructionErrors_Id;
117
118 /** \brief Enum for available Identification numbers under Context Management Trap.
119 *
120 */
121 typedef enum
122 {
123 IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion = 1U,
124 IfxCpu_Trap_ContextManagement_Id_callDepthOverflow = 2U,
125 IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow = 3U,
126 IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow = 4U,
127 IfxCpu_Trap_ContextManagement_Id_callStackUnderflow = 5U,
128 IfxCpu_Trap_ContextManagement_Id_contextType = 6U,
129 IfxCpu_Trap_ContextManagement_Id_nestingError = 7U,
130 } IfxCpu_Trap_ContextManagement_Id;
131
132 /** \brief Enum for available Identification numbers under Bus Trap.
133 *
134 */
135 typedef enum
136 {
137 IfxCpu_Trap_Bus_Id_programFetchSynchronousError = 1U,
138 IfxCpu_Trap_Bus_Id_dataAccessSynchronousError = 2U,
139 IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError = 3U,
140 IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError = 4U,
141 IfxCpu_Trap_Bus_Id_programMemoryIntegrityError = 5U,
142 IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError = 6U,
143 IfxCpu_Trap_Bus_Id_temporalAsynchronousError = 7U,
144 } IfxCpu_Trap_Bus_Id;
145
146 /** \brief Enum for available Identification numbers under Assertion Trap.
147 *
148 */
149 typedef enum
150 {
151 IfxCpu_Trap_Assertion_Id_arithmeticOverflow = 1U,
152 IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow = 2U,
153 } IfxCpu_Trap_Assertion_Id;
154
155 /** \brief Type for Identification numbers under SystemCall Trap.
156 *
157 */
158 typedef sint32 IfxCpu_Trap_SystemCall_Id;
159
160 /** \brief Type for Identification number for Non Maskable Interrupt Trap.
161 *
162 */
163 typedef sint32 IfxCpu_Trap_NonMaskableInterrupt_Id;
164
165 /** \brief Union to abstract Identification numbers under Traps.
166 *
167 */
168 typedef union
169 {
170 IfxCpu_Trap_MemoryManagement_Id memoryManagement;
171 IfxCpu_Trap_InternalProtection_Id internalProtection;
172 IfxCpu_Trap_InstructionErrors_Id instructionErrors;
173 IfxCpu_Trap_ContextManagement_Id contextManagement;
174 IfxCpu_Trap_Bus_Id bus;
175 IfxCpu_Trap_Assertion_Id assertion;
176 IfxCpu_Trap_SystemCall_Id systemCall;
177 IfxCpu_Trap_NonMaskableInterrupt_Id nonMaskableInterrupt;
178 } IfxCpu_Trap_Id;
179
180 /** \brief Structure to contain the trap information.
181 *
182 */
183 typedef struct
184 {
185 unsigned int tAddr;
186 unsigned int tId : 8;
187 unsigned int tClass : 8;
188 unsigned int tCpu : 3;
189 } IfxCpu_Trap;
190
191 /*******************************************************************************
192 ** Global Exported variables/constants **
193 *******************************************************************************/
194
195 /*******************************************************************************
196 ** Global Exported macros/inlines/function ptototypes **
197 *******************************************************************************/
198 /** \brief Macro to define the trap vector table.
199 * This macro is provided to define the trap vector table in the frameowrk. User shall not use
200 * this macro.
201 * Refer to the documentation to extend the trap with hook functions. \ref IfxLld_Cpu_Trap_Usage
202 */
203 #if defined(__HIGHTEC__)
204 #define __ALIGN_TRAP_TAB__ __asm(" .align 5");
205 #define IfxCpu_Tsr_CallTSR(serviceRoutine) \
206 { \
207 __ALIGN_TRAP_TAB__; \
208 __asm("svlcx\n"); \
209 __asm("mov\t %d4, %d15"); \
210 __asm("ji\t %0" : : "a" (serviceRoutine)); \
211 __asm("rfe"); \
212 }
213 #elif defined(__ghs__)
214 #define __ALIGN_TRAP_TAB__ __asm(" .align 32");
215 #define IfxCpu_Tsr_CallTSR(serviceRoutine) \
216 { \
217 __ALIGN_TRAP_TAB__; \
218 __asm("svlcx\n"); \
219 __asm("mov\t d4, d15"); \
220 __asm("ji\t %0" : : "a" (serviceRoutine)); \
221 __asm("rfe"); \
222 }
223 #elif defined(__DCC__)
224 #define IfxCpu_Tsr_CallTSR(serviceRoutine) \
225 { \
226 __ALIGN_TRAP_TAB__; \
227 __asm("\n#$$bp\n"); \
228 __asm("svlcx\n"); \
229 __asm(" movh.a\t %a15,"#serviceRoutine "@ha\n"); \
230 __asm(" lea\t %a15,[%a15]"#serviceRoutine "@l\n"); \
231 __asm(" mov\t %d4,%d15\n"); \
232 __asm(" ji\t %a15\n"); \
233 __asm(" rfe"); \
234 __asm("#$$ep"); \
235 }
236 #define __ALIGN_TRAP_TAB__ __asm(" .align 5");
237 #elif defined(__TASKING__)
238 #define IfxCpu_Tsr_CallTSR(serviceRoutine) \
239 { \
240 __ALIGN_TRAP_TAB__; \
241 __asm("svlcx\n\tmov\td4,d15\n\tji\t%0\n" : : "a" (serviceRoutine) : "d4", "d15"); \
242 }
243 #define __ALIGN_TRAP_TAB__ __asm(" .align 32");
244 #endif
245
246 #if defined(__HIGHTEC__)
247 #define __ALIGN_TRAP_TAB__ __asm(" .align 5");
248 #define IfxCpu_Tsr_CallCSATSR(serviceRoutine) \
249 { \
250 __ALIGN_TRAP_TAB__; \
251 __asm("mov\t %d4, %d15"); \
252 __asm("ji\t %0" : : "a" (serviceRoutine)); \
253 __asm("rfe"); \
254 }
255 #elif defined(__ghs__)
256 #define __ALIGN_TRAP_TAB__ __asm(" .align 32");
257 #define IfxCpu_Tsr_CallCSATSR(serviceRoutine) \
258 { \
259 __ALIGN_TRAP_TAB__; \
260 __asm("mov\t d4, d15"); \
261 __asm("ji\t %0" : : "a" (serviceRoutine)); \
262 __asm("rfe"); \
263 }
264 #elif defined(__DCC__)
265 #define IfxCpu_Tsr_CallCSATSR(serviceRoutine) \
266 { \
267 __ALIGN_TRAP_TAB__; \
268 __asm("\n#$$bp\n"); \
269 __asm("movh.a\t %a15,"#serviceRoutine "@ha\n"); \
270 __asm(" lea\t %a15,[%a15]"#serviceRoutine "@l\n"); \
271 __asm(" mov\t %d4,%d15\n"); \
272 __asm(" ji\t %a15\n"); \
273 __asm(" rfe"); \
274 __asm("#$$ep"); \
275 }
276 #define __ALIGN_TRAP_TAB__ __asm(" .align 5");
277 #elif defined(__TASKING__)
278 #define IfxCpu_Tsr_CallCSATSR(serviceRoutine) \
279 { \
280 __ALIGN_TRAP_TAB__; \
281 __asm("mov\td4,d15\n\tji\t%0\n" : : "a" (serviceRoutine) : "d4", "d15"); \
282 }
283 #define __ALIGN_TRAP_TAB__ __asm(" .align 32");
284 #endif
285
286 /** \} */
287
288 /*Documentation */
289 /** \addtogroup IfxLld_Cpu_Trap_Usage
290 * \{
291 *
292 * This page describes how to use the trap function hooks with application framework.\n
293 * Framework has built in Trap Service Routines, which has minimal set of debug information.
294 * The execution of trap service is as below,\n
295 * 1) When a trap occurs, a variable "trapInfo" is updated with the information:\n
296 * a. Which CPU caused this trap,\n
297 * b. What is the trap address, trap class and\n
298 * c. What is the trap identification number\n
299 * 2) Call to a configurable hook function, passing structure trapInfo as parameter.\n
300 * 3) Then debug instruction executed.\n
301 * 4) Returning from the trap. (This instruction is not reached if debugger is connected because of
302 * "debug" instruction before)\n
303 * For normal cases during development, where user works with debugger, user can watch the structure variable
304 * "trapInfo" in the debugger.
305 *
306 * In case, user wants to make use of the information of trap for further processing,\n
307 * extend the traps, using the hook functions provided.
308 *
309 * \section IfxLld_Cpu_Trap_Hooks Extending the traps with hook functions.
310 *
311 * If the trap extensions are to be extended, it is very important to enable this feature. By default this
312 * feature is disabled.
313 *
314 * \subsection IfxLld_Cpu_Trap_Hooks_EnableExtn How to enable the trap extension feature?
315 * To extend the trap hook functions user must enable this feature by defining the macro
316 * "IFX_CFG_EXTEND_TRAP_HOOKS" in Ifx_Cfg.h, as shown below.
317 * \code
318 * //file: Ifx_Cfg.h
319 *
320 * #define IFX_CFG_EXTEND_TRAP_HOOKS
321 *
322 * \endcode
323 * Now the compiler will accept the further configurations to extend the hooks.\n
324 * Ifx_Cfg_Trap.h file shall be used to extend the traps. This provides two kind of hook functions.
325 * ie. Hook for error traps and hooks (per CPU available) for system calls.
326 *
327 * \subsection IfxLld_Cpu_Trap_ErrorHooks Extending the "Error traps" with hook function.
328 * Error trap occurs as a result of an error event such as an instruction error, memory-management error
329 * or an illegal access.\n
330 * To extend the error traps, following steps are to be followed:\n
331 * \subsubsection IfxLld_Cpu_Trap_ErrorHooksStep1 Step1: Define a routine to substitute the hook for error traps.
332 * This definition shall be as user defined code (Generally in DemoApps folder).\n
333 * Considerations:\n
334 * 1. Format: IFX_INLINE void <trap extension name>(IfxCpu_Trap trapInfo)
335 * \note Define such a routine with the consideration that the trap extension hook is not a function. In case
336 * of context management error, this extension itself will not call any other function.
337 *
338 * 2. Use the information trapInfo, which is available as parameter passed to this hook and process further.
339 * Example code in a user defined file eg. Ifx_TrapExtension.h,
340 * \code
341 * //Example "inlined" function for trap Extension Hook.
342 * IFX_INLINE myTrapExtensionHook(IfxCpu_Trap trapInfo)
343 * {
344 * switch (trapInfo.tClass)
345 * {
346 * case IfxCpu_Trap_Class_memoryManagement:
347 * {
348 * //user code: Function calls allowed.
349 * break;
350 * }
351 * case IfxCpu_Trap_Class_internalProtection:
352 * {
353 * //user code: Function calls allowed.
354 * break;
355 * }
356 * case IfxCpu_Trap_Class_instructionErrors:
357 * {
358 * //user code: Function calls allowed.
359 * break;
360 * }
361 * case IfxCpu_Trap_Class_contextManagement:
362 * {
363 * //user code: Function calls NOT allowed.
364 * break;
365 * }
366 * case IfxCpu_Trap_Class_bus:
367 * {
368 * //user code: Function calls allowed.
369 * break;
370 * }
371 * case IfxCpu_Trap_Class_assertion:
372 * {
373 * //user code: Function calls allowed.
374 * break;
375 * }
376 * case IfxCpu_Trap_Class_nonMaskableInterrupt:
377 * {
378 * //user code: Function calls allowed.
379 * break;
380 * }
381 * case default:
382 * {
383 * break;
384 * }
385 * }
386 * }
387 * \endcode
388 * \note The error trap functions execute the debug instruction immediately after returning from extension hooks.
389 *
390 * \subsubsection IfxLld_Cpu_Trap_ErrorHooksStep2 Step2: Configure error trap hook extension function.
391 * Configure error trap hook extension function as defined above to the macro as below:
392 * \note Configuration of hook extension is available in Ifx_Cfg_Trap.h
393 *
394 * \code
395 * //file: Ifx_Cfg_Trap.h
396 *
397 * #include "Ifx_TrapExtension.h" //Assuming this is the file name as in above example
398 *
399 * #define IFX_CFG_CPU_TRAP_TSR_HOOK(trapInfo) myTrapExtensionHook(trapInfo) //This is INLINE function.
400 *
401 * \endcode
402 * \note The exten hooks are effective only if the feature is enabled.
403 *
404 * \subsection IfxLld_Cpu_Trap_SysCallHooks Extending the cpu specific "system call" hook functions.
405 * Tricore architecture provides the system call trap which is executed by software trigger. The instruction "syscall"
406 * triggers this trap. Please refer Tricore architecture manual for more details.\n
407 * IfxCpu_trap driver provide hook function for each CPU separately. To extend System Call trap following steps
408 * are to be followed:\n
409 * \subsubsection IfxLld_Cpu_Trap_SysCallHooksStep1 Step1: Define routine/s to substitute the hook/s for System Call trap.
410 * This definition shall be as user defined code (Generally in DemoApps folder).\n
411 * Considerations:\n
412 * 1. Format: void <syscall function name>(IfxCpu_Trap trapInfo)
413 * It is allowed to define this trap extension as function definition, because this trap is not triggered due to any error.
414 * Depending on the application requirement, define single or per CPU instance of the extension.
415 *
416 * 2. Use the information trapInfo which is available as parameter passed to this hook and process further. The parameter
417 * passed, with syscall instruction, will be trap identification number (refer to Tricore architecture manual for more details).
418 * \note To hook extension, information about trap identification number is available through parameter "trapInfo".
419 *
420 * Example code in a user defined file eg. Ifx_TrapExtension.h,
421 * \code
422 * //Example function for System Call Extension Hook.
423 * IFX_INLINE mySysCallExtensionHook(IfxCpu_Trap trapInfo)
424 * {
425 * switch (trapInfo.tId)
426 * {
427 * case 0:
428 * {
429 * //user code: Function calls allowed.
430 * break;
431 * }
432 * case 1:
433 * {
434 * //user code: Function calls allowed.
435 * break;
436 * }
437 * // and so on..
438 * case default:
439 * {
440 * break;
441 * }
442 * }
443 * }
444 * \endcode
445 *
446 * \subsubsection IfxLld_Cpu_Trap_SysCallHooksStep2 Step2: Configure the extension function.\n
447 * Configure the hook extension function defined above, to the macro as below:
448 * \note Configuration of hook extension is available in Ifx_Cfg_Trap.h
449 * \code
450 * //file: Ifx_Cfg_Trap.h
451 *
452 * #include "Ifx_TrapExtension.h" //Assuming this is the file name as in above example
453 *
454 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU0_HOOK(trapInfo) mySysCallExtensionHook(trapInfo)
455 *
456 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU1_HOOK(trapInfo) // Not used in this example
457 *
458 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU2_HOOK(trapInfo) // Not used in this example
459 *
460 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU3_HOOK(trapInfo) // Not used in this example
461 *
462 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU4_HOOK(trapInfo) // Not used in this example
463 *
464 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU5_HOOK(trapInfo) // Not used in this example
465 *
466 * \endcode
467 *
468 * \note The exten hooks are effective only if this feature is enabled.
469 *
470 */
471 /** \} */
472
473 #endif /* IFXCPU_TRAPS_H_ */
IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError
Definition: IfxCpu_Trap.h:139
IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment
Definition: IfxCpu_Trap.h:114
IfxCpu_Trap::tAddr
unsigned int tAddr
Definition: IfxCpu_Trap.h:185
IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill
Definition: IfxCpu_Trap.h:88
IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError
Definition: IfxCpu_Trap.h:140
IfxCpu_Trap_Class_contextManagement
Definition: IfxCpu_Trap.h:76
IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead
Definition: IfxCpu_Trap.h:98
IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow
Definition: IfxCpu_Trap.h:126
IfxCpu_Trap_MemoryManagement_Id
IfxCpu_Trap_MemoryManagement_Id
Enum for available Identification numbers under Memory Management Trap.
Definition: IfxCpu_Trap.h:86
IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow
Definition: IfxCpu_Trap.h:152
IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess
Definition: IfxCpu_Trap.h:101
IfxCpu_Trap_ContextManagement_Id_contextType
Definition: IfxCpu_Trap.h:128
IfxCpu_Trap_Bus_Id_programFetchSynchronousError
Definition: IfxCpu_Trap.h:137
IfxCpu_Trap_Class_instructionErrors
Definition: IfxCpu_Trap.h:75
IfxCpu_Intrinsics.h
IfxCpu_Trap_Id::internalProtection
IfxCpu_Trap_InternalProtection_Id internalProtection
Definition: IfxCpu_Trap.h:171
IfxCpu_Trap_Class
IfxCpu_Trap_Class
Enum for available Trap classes.
Definition: IfxCpu_Trap.h:71
IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow
Definition: IfxCpu_Trap.h:125
IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion
Definition: IfxCpu_Trap.h:123
IfxCpu_Trap_ContextManagement_Id
IfxCpu_Trap_ContextManagement_Id
Enum for available Identification numbers under Context Management Trap.
Definition: IfxCpu_Trap.h:121
IfxCpu_Trap_InstructionErrors_Id_illegalOpcode
Definition: IfxCpu_Trap.h:111
IfxCpu_Trap_Id::memoryManagement
IfxCpu_Trap_MemoryManagement_Id memoryManagement
Definition: IfxCpu_Trap.h:170
IfxCpu_Trap_InstructionErrors_Id
IfxCpu_Trap_InstructionErrors_Id
Enum for available Identification numbers under Instruction Errors Trap.
Definition: IfxCpu_Trap.h:109
IfxCpu_Trap_Bus_Id
IfxCpu_Trap_Bus_Id
Enum for available Identification numbers under Bus Trap.
Definition: IfxCpu_Trap.h:135
IfxCpu_Trap_Class_memoryManagement
Definition: IfxCpu_Trap.h:73
IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress
Definition: IfxCpu_Trap.h:102
IfxCpu_Trap_Class_systemCall
Definition: IfxCpu_Trap.h:79
IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError
Definition: IfxCpu_Trap.h:142
IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute
Definition: IfxCpu_Trap.h:100
IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode
Definition: IfxCpu_Trap.h:112
IfxCpu_Trap_Bus_Id_dataAccessSynchronousError
Definition: IfxCpu_Trap.h:138
IfxCpu_Trap_InternalProtection_Id
IfxCpu_Trap_InternalProtection_Id
Enum for available Identification numbers under Internal Protection Trap.
Definition: IfxCpu_Trap.h:95
IfxCpu_Trap_Bus_Id_temporalAsynchronousError
Definition: IfxCpu_Trap.h:143
IfxCpu_Trap::tId
unsigned int tId
Definition: IfxCpu_Trap.h:186
IfxCpu_Trap_Class_nonMaskableInterrupt
Definition: IfxCpu_Trap.h:80
IfxCpu_Trap_Id::contextManagement
IfxCpu_Trap_ContextManagement_Id contextManagement
Definition: IfxCpu_Trap.h:173
IfxCpu_Trap_InstructionErrors_Id_invalidOperand
Definition: IfxCpu_Trap.h:113
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxCpu_Trap_NonMaskableInterrupt_Id
sint32 IfxCpu_Trap_NonMaskableInterrupt_Id
Type for Identification number for Non Maskable Interrupt Trap.
Definition: IfxCpu_Trap.h:163
IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection
Definition: IfxCpu_Trap.h:103
IfxCpu_Trap_Assertion_Id_arithmeticOverflow
Definition: IfxCpu_Trap.h:151
IfxCpu_Trap_ContextManagement_Id_callDepthOverflow
Definition: IfxCpu_Trap.h:124
IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite
Definition: IfxCpu_Trap.h:99
IfxCpu_Trap_Class_bus
Definition: IfxCpu_Trap.h:77
IfxCpu_Trap_ContextManagement_Id_callStackUnderflow
Definition: IfxCpu_Trap.h:127
IfxCpu_Trap::tCpu
unsigned int tCpu
Definition: IfxCpu_Trap.h:188
IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress
Definition: IfxCpu_Trap.h:115
IfxCpu_Trap_Id::instructionErrors
IfxCpu_Trap_InstructionErrors_Id instructionErrors
Definition: IfxCpu_Trap.h:172
sint32
long sint32
Definition: Platform_Types.h:134
IfxCpu_Trap::tClass
unsigned int tClass
Definition: IfxCpu_Trap.h:187
IfxCpu_Trap_Class_internalProtection
Definition: IfxCpu_Trap.h:74
IfxCpu_Trap_SystemCall_Id
sint32 IfxCpu_Trap_SystemCall_Id
Type for Identification numbers under SystemCall Trap.
Definition: IfxCpu_Trap.h:158
IfxCpu_Trap
Structure to contain the trap information.
Definition: IfxCpu_Trap.h:183
IfxCpu_Trap_ContextManagement_Id_nestingError
Definition: IfxCpu_Trap.h:129
IfxCpu_Trap_Id::nonMaskableInterrupt
IfxCpu_Trap_NonMaskableInterrupt_Id nonMaskableInterrupt
Definition: IfxCpu_Trap.h:177
IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection
Definition: IfxCpu_Trap.h:89
IfxCpu_Trap_Assertion_Id
IfxCpu_Trap_Assertion_Id
Enum for available Identification numbers under Assertion Trap.
Definition: IfxCpu_Trap.h:149
IfxCpu_Trap_Id::bus
IfxCpu_Trap_Bus_Id bus
Definition: IfxCpu_Trap.h:174
IfxCpu_Trap_InternalProtection_Id_privilegeViolation
Definition: IfxCpu_Trap.h:97
IfxCpu_Trap_Id::systemCall
IfxCpu_Trap_SystemCall_Id systemCall
Definition: IfxCpu_Trap.h:176
IfxCpu_Trap_Id
Union to abstract Identification numbers under Traps.
Definition: IfxCpu_Trap.h:168
IfxCpu_Trap_Class_assertion
Definition: IfxCpu_Trap.h:78
IfxCpu_Trap_Id::assertion
IfxCpu_Trap_Assertion_Id assertion
Definition: IfxCpu_Trap.h:175
IfxCpu_Trap_Bus_Id_programMemoryIntegrityError
Definition: IfxCpu_Trap.h:141


iLLD_TC26B: IfxCpu_cfg.c Source File

  • _Impl
IfxCpu_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_cfg.c
3 * \brief CPU on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxCpu_cfg.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
51
52 IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES] = {
53 {&MODULE_CPU0, (uint32)IfxCpu_ResourceCpu_0},
54 {&MODULE_CPU1, (uint32)IfxCpu_ResourceCpu_1}
55 };
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCpu_ResourceCpu_0
CPU 0.
Definition: IfxCpu_cfg.h:155
IfxCpu_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]
Definition: IfxCpu_cfg.c:52
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxCpu_cfg.h
CPU on-chip implementation data.
IFXCPU_NUM_MODULES
#define IFXCPU_NUM_MODULES
CPU count.
Definition: IfxCpu_cfg.h:65
IfxCpu_ResourceCpu_1
CPU 1.
Definition: IfxCpu_cfg.h:156


iLLD_TC26B: IfxCpu_cfg.h Source File

  • _Impl
IfxCpu_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_cfg.h
3 * \brief CPU on-chip implementation data
4 * \ingroup IfxLld_Cpu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Cpu CPU
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Cpu_Impl Implementation
44 * \ingroup IfxLld_Cpu
45 * \defgroup IfxLld_Cpu_Std Standard Driver
46 * \ingroup IfxLld_Cpu
47 */
48
49 #ifndef IFXCPU_CFG_H
50 #define IFXCPU_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "Cpu/Std/IfxCpu_Intrinsics.h"
57 #include "IfxCpu_reg.h"
58
59 /******************************************************************************/
60 /*-----------------------------------Macros-----------------------------------*/
61 /******************************************************************************/
62
63 /** \brief CPU count
64 */
65 #define IFXCPU_NUM_MODULES (2)
66
67 /** \brief Segment number of cachable flash region
68 */
69 #define IFXCPU_CACHABLE_FLASH_SEGMENT (8)
70
71 /** \brief Segment number of cachable LMU region
72 */
73 #define IFXCPU_CACHABLE_LMU_SEGMENT (9)
74
75 /** \brief All cores (coreIDs) mask. This macro can be defined by the user according to the number of core being enabled.
76 * So that can be used for syncronisation among multiple cores. In case user didn't define this macro, by default this
77 * mask will be generated for all the available cores of the device.
78 * e.g:
79 * 1. Check for synchronisation between core 0 and core 5
80 * # define 0x41U
81 * 2. Check for synchronisation between core 0 to core 5
82 * # define 0x5FU
83 *
84 * Note:
85 * Core id values read from CORE_ID register will be as shown below. The value
86 * indicates the position of the bit needs to be set while building the macro.
87 * Core 0: 0
88 * Core 1: 1
89 * Core 2: 2
90 * Core 3: 3
91 * Core 4: 4
92 * Core 5: 6
93 */
94 #ifndef IFXCPU_CFG_ALLCORE_DONE
95 #define IFXCPU_CFG_ALLCORE_DONE (0x3)
96 #endif
97
98 /** \brief
99 */
100 #ifndef IFXCPU_ALLCORE_DONE
101 #define IFXCPU_ALLCORE_DONE IFXCPU_CFG_ALLCORE_DONE
102 #else
103 #ifdef __TASKING__
104 # pragma message("IFXCPU_ALLCORE_DONE macro is going to be deprecated. Use IFXCPU_CFG_ALLCORE_DONE instead.")
105 #else
106 # warning IFXCPU_ALLCORE_DONE macro is going to be deprecated. Use IFXCPU_CFG_ALLCORE_DONE instead.
107 #endif
108 #endif
109
110 /******************************************************************************/
111 /*-------------------------------Enumerations---------------------------------*/
112 /******************************************************************************/
113
114 /** \brief Halt status
115 */
116 typedef enum
117 {
118 IfxCpu_DBGST_HALT_run = 0,
119 IfxCpu_DBGST_HALT_halt = 1
120 } IfxCpu_DBGST_HALT;
121
122 /** \brief List of the available CPU ids
123 */
124 typedef enum
125 {
126 IfxCpu_Id_0 = 0, /**< \brief CPU 0 */
127 IfxCpu_Id_1 = 1, /**< \brief CPU 1 */
128 IfxCpu_Id_none /**< \brief None of the CPU */
129 } IfxCpu_Id;
130
131 /** \brief List of the available CPU resources
132 */
133 typedef enum
134 {
135 IfxCpu_Index_0 = 0, /**< \brief CPU 0 */
136 IfxCpu_Index_1 = 1, /**< \brief CPU 1 */
137 IfxCpu_Index_none /**< \brief None of the CPU */
138 } IfxCpu_Index;
139
140 /** \brief Power management status
141 */
142 typedef enum
143 {
144 IfxCpu_PMCSR_PMST_normalMode = 1,
145 IfxCpu_PMCSR_PMST_idleModeRequest = 2,
146 IfxCpu_PMCSR_PMST_idleMode = 3,
147 IfxCpu_PMCSR_PMST_sleepModeRequest = 4,
148 IfxCpu_PMCSR_PMST_standbyModeRequest = 6
149 } IfxCpu_PMCSR_PMST;
150
151 /** \brief List of the available CPU resources
152 */
153 typedef enum
154 {
155 IfxCpu_ResourceCpu_0 = IfxCpu_Index_0, /**< \brief CPU 0 */
156 IfxCpu_ResourceCpu_1 = IfxCpu_Index_1, /**< \brief CPU 1 */
157 IfxCpu_ResourceCpu_none = IfxCpu_Index_none /**< \brief None of the CPU */
158 } IfxCpu_ResourceCpu;
159
160 /******************************************************************************/
161 /*-------------------Global Exported Variables/Constants----------------------*/
162 /******************************************************************************/
163
164 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES];
165
166 #endif /* IFXCPU_CFG_H */
IfxCpu_Id_none
None of the CPU.
Definition: IfxCpu_cfg.h:128
IfxCpu_DBGST_HALT_halt
Definition: IfxCpu_cfg.h:119
IfxCpu_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]
Definition: IfxCpu_cfg.h:164
IfxCpu_Index_0
CPU 0.
Definition: IfxCpu_cfg.h:135
IfxCpu_ResourceCpu_none
None of the CPU.
Definition: IfxCpu_cfg.h:157
IfxCpu_Index_1
CPU 1.
Definition: IfxCpu_cfg.h:136
IfxCpu_PMCSR_PMST
IfxCpu_PMCSR_PMST
Power management status.
Definition: IfxCpu_cfg.h:142
IfxCpu_PMCSR_PMST_sleepModeRequest
Definition: IfxCpu_cfg.h:147
IfxCpu_Intrinsics.h
IfxCpu_DBGST_HALT
IfxCpu_DBGST_HALT
Halt status.
Definition: IfxCpu_cfg.h:116
IfxCpu_PMCSR_PMST_normalMode
Definition: IfxCpu_cfg.h:144
IfxCpu_Id_0
CPU 0.
Definition: IfxCpu_cfg.h:126
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxCpu_PMCSR_PMST_idleMode
Definition: IfxCpu_cfg.h:146
IfxCpu_DBGST_HALT_run
Definition: IfxCpu_cfg.h:118
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:153
IfxCpu_Id
IfxCpu_Id
List of the available CPU ids.
Definition: IfxCpu_cfg.h:124
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxCpu_Id_1
CPU 1.
Definition: IfxCpu_cfg.h:127
IfxCpu_PMCSR_PMST_standbyModeRequest
Definition: IfxCpu_cfg.h:148
IfxCpu_PMCSR_PMST_idleModeRequest
Definition: IfxCpu_cfg.h:145
IfxCpu_Index_none
None of the CPU.
Definition: IfxCpu_cfg.h:137
IfxCpu_ResourceCpu_0
CPU 0.
Definition: IfxCpu_cfg.h:155
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IFXCPU_NUM_MODULES
#define IFXCPU_NUM_MODULES
CPU count.
Definition: IfxCpu_cfg.h:65
IfxCpu_Index
IfxCpu_Index
List of the available CPU resources.
Definition: IfxCpu_cfg.h:133
IfxCpu_ResourceCpu_1
CPU 1.
Definition: IfxCpu_cfg.h:156


iLLD_TC26B: IfxDma.c Source File

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  • Std
IfxDma.c
Go to the documentation of this file.
1 /**
2 * \file IfxDma.c
3 * \brief DMA basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxDma.h"
IfxDma.h
DMA basic functionality.


iLLD_TC26B: IfxDma.h Source File

  • Dma
  • Std
IfxDma.h
Go to the documentation of this file.
1 /**
2 * \file IfxDma.h
3 * \brief DMA basic functionality
4 * \ingroup IfxLld_Dma
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Dma_Std_Enum Enumerations
42 * \ingroup IfxLld_Dma_Std
43 * \defgroup IfxLld_Dma_Std_Reset Reset Functions
44 * \ingroup IfxLld_Dma_Std
45 * \defgroup IfxLld_Dma_Std_Channel_Transaction Channel Transaction Functions
46 * \ingroup IfxLld_Dma_Std
47 * \defgroup IfxLld_Dma_Std_Move_Engine Move Engine functions
48 * \ingroup IfxLld_Dma_Std
49 * \defgroup IfxLld_Dma_Std_Channel_Configure Channel configuration Functions
50 * \ingroup IfxLld_Dma_Std
51 * \defgroup IfxLld_Dma_Std_Channel_Halt Channel Halt Functions
52 * \ingroup IfxLld_Dma_Std
53 * \defgroup IfxLld_Dma_Std_Double_Buffer Double Buffer functions
54 * \ingroup IfxLld_Dma_Std
55 * \defgroup IfxLld_Dma_Std_Interrupts Interrupt functions
56 * \ingroup IfxLld_Dma_Std
57 */
58
59 #ifndef IFXDMA_H
60 #define IFXDMA_H 1
61
62 /******************************************************************************/
63 /*----------------------------------Includes----------------------------------*/
64 /******************************************************************************/
65
66 #include "_Impl/IfxDma_cfg.h"
67 #include "IfxDma_bf.h"
68 #include "Cpu/Std/IfxCpu_Intrinsics.h"
69 #include "IfxDma_reg.h"
70 #include "Src/Std/IfxSrc.h"
71 #include "Scu/Std/IfxScuWdt.h"
72 #include "Scu/Std/IfxScuCcu.h"
73
74 /******************************************************************************/
75 /*--------------------------------Enumerations--------------------------------*/
76 /******************************************************************************/
77
78 /** \addtogroup IfxLld_Dma_Std_Enum
79 * \{ */
80 /** \brief Bus Master Mode definition
81 * Definition in Ifx_DMA.MODE[4].B.MODE
82 */
83 typedef enum
84 {
85 IfxDma_BusMasterMode_user = 0, /**< \brief Selected hardware resource performs Bus access in user mode */
86 IfxDma_BusMasterMode_supervisor = 1 /**< \brief Selected hardware resource performs Bus access in supervisor mode */
87 } IfxDma_BusMasterMode;
88
89 /** \brief Channel Bus Priority definition
90 */
91 typedef enum
92 {
93 IfxDma_ChannelBusPriority_low = 0, /**< \brief low priority */
94 IfxDma_ChannelBusPriority_medium = 1, /**< \brief medium priority */
95 IfxDma_ChannelBusPriority_high = 2 /**< \brief high priority */
96 } IfxDma_ChannelBusPriority;
97
98 /** \brief DMA circular buffer (wrap around) definition
99 * Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD
100 */
101 typedef enum
102 {
103 IfxDma_ChannelIncrementCircular_none = 0, /**< \brief no circular buffer operation */
104 IfxDma_ChannelIncrementCircular_2 = 1, /**< \brief circular buffer size is 2 byte */
105 IfxDma_ChannelIncrementCircular_4 = 2, /**< \brief circular buffer size is 4 byte */
106 IfxDma_ChannelIncrementCircular_8 = 3, /**< \brief circular buffer size is 8 byte */
107 IfxDma_ChannelIncrementCircular_16 = 4, /**< \brief circular buffer size is 16 byte */
108 IfxDma_ChannelIncrementCircular_32 = 5, /**< \brief circular buffer size is 32 byte */
109 IfxDma_ChannelIncrementCircular_64 = 6, /**< \brief circular buffer size is 64 byte */
110 IfxDma_ChannelIncrementCircular_128 = 7, /**< \brief circular buffer size is 128 byte */
111 IfxDma_ChannelIncrementCircular_256 = 8, /**< \brief circular buffer size is 256 byte */
112 IfxDma_ChannelIncrementCircular_512 = 9, /**< \brief circular buffer size is 512 byte */
113 IfxDma_ChannelIncrementCircular_1024 = 10, /**< \brief circular buffer size is 1024 byte */
114 IfxDma_ChannelIncrementCircular_2048 = 11, /**< \brief circular buffer size is 2048 byte */
115 IfxDma_ChannelIncrementCircular_4096 = 12, /**< \brief circular buffer size is 4096 byte */
116 IfxDma_ChannelIncrementCircular_8192 = 13, /**< \brief circular buffer size is 8192 byte */
117 IfxDma_ChannelIncrementCircular_16384 = 14, /**< \brief circular buffer size is 16384 byte */
118 IfxDma_ChannelIncrementCircular_32768 = 15 /**< \brief circular buffer size is 32768 byte */
119 } IfxDma_ChannelIncrementCircular;
120
121 /** \brief DMA incrementation direction definition
122 * Definition in Ifx_DMA.CH[64].ADICR.B.INCS
123 */
124 typedef enum
125 {
126 IfxDma_ChannelIncrementDirection_negative = 0, /**< \brief pointer is decremented */
127 IfxDma_ChannelIncrementDirection_positive = 1 /**< \brief pointer is incremented */
128 } IfxDma_ChannelIncrementDirection;
129
130 /** \brief DMA incrementation definition
131 * Definition in Ifx_DMA.CH[64].ADICR.B.SMF
132 */
133 typedef enum
134 {
135 IfxDma_ChannelIncrementStep_1 = 0, /**< \brief increment by 1 width */
136 IfxDma_ChannelIncrementStep_2 = 1, /**< \brief increment by 2 width */
137 IfxDma_ChannelIncrementStep_4 = 2, /**< \brief increment by 4 width */
138 IfxDma_ChannelIncrementStep_8 = 3, /**< \brief increment by 8 width */
139 IfxDma_ChannelIncrementStep_16 = 4, /**< \brief increment by 16 width */
140 IfxDma_ChannelIncrementStep_32 = 5, /**< \brief increment by 32 width */
141 IfxDma_ChannelIncrementStep_64 = 6, /**< \brief increment by 64 width */
142 IfxDma_ChannelIncrementStep_128 = 7 /**< \brief increment by 128 width */
143 } IfxDma_ChannelIncrementStep;
144
145 /** \brief Channel Transfer Interrupt generation mechanism.
146 * Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0)
147 */
148 typedef enum
149 {
150 IfxDma_ChannelInterruptControl_thresholdLimitMatch = 0, /**< \brief interrupt when transfer count (TCOUNT) equals the threshold limit (IRDV) */
151 IfxDma_ChannelInterruptControl_transferCountDecremented = 1 /**< \brief interrupt when transfer count (TCOUNT) is decremented */
152 } IfxDma_ChannelInterruptControl;
153
154 /** \brief DMA transfer definition
155 * Definition in Ifx_DMA.BLK0.ME.CHCR.B.BLKM and Ifx_DMA.BLK1.ME.CHCR.B.BLKM
156 */
157 typedef enum
158 {
159 IfxDma_ChannelMove_1 = 0, /**< \brief 1 DMA move per DMA transfer */
160 IfxDma_ChannelMove_2 = 1, /**< \brief 2 DMA move per DMA transfer */
161 IfxDma_ChannelMove_4 = 2, /**< \brief 4 DMA move per DMA transfer */
162 IfxDma_ChannelMove_8 = 3, /**< \brief 8 DMA move per DMA transfer */
163 IfxDma_ChannelMove_16 = 4, /**< \brief 16 DMA move per DMA transfer */
164 IfxDma_ChannelMove_3 = 5, /**< \brief 3 DMA move per DMA transfer */
165 IfxDma_ChannelMove_5 = 6, /**< \brief 5 DMA move per DMA transfer */
166 IfxDma_ChannelMove_9 = 7 /**< \brief 9 DMA move per DMA transfer */
167 } IfxDma_ChannelMove;
168
169 /** \brief DMA move size definition
170 * Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHDW and Ifx_DMA.BLK1.ME.CHCR.B.CHDW
171 */
172 typedef enum
173 {
174 IfxDma_ChannelMoveSize_8bit = 0, /**< \brief 1 DMA move is 8 bit wide */
175 IfxDma_ChannelMoveSize_16bit = 1, /**< \brief 1 DMA move is 16 bit wide */
176 IfxDma_ChannelMoveSize_32bit = 2, /**< \brief 1 DMA move is 32 bit wide */
177 IfxDma_ChannelMoveSize_64bit = 3, /**< \brief 1 DMA move is 64 bit wide */
178 IfxDma_ChannelMoveSize_128bit = 4, /**< \brief 1 DMA move is 128 bit wide */
179 IfxDma_ChannelMoveSize_256bit = 5 /**< \brief 1 DMA move is 256 bit wide */
180 } IfxDma_ChannelMoveSize;
181
182 /** \brief DMA operation mode
183 * Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHMODE and Ifx_DMA.BLK1.ME.CHCR.B.CHMODE
184 */
185 typedef enum
186 {
187 IfxDma_ChannelOperationMode_single = 0, /**< \brief channel disabled after transaction */
188 IfxDma_ChannelOperationMode_continuous = 1 /**< \brief channel stays enabled after transaction */
189 } IfxDma_ChannelOperationMode;
190
191 /** \brief Pattern detection selection
192 * Definition in Ifx_DMA.BLK0.ME.CHCR.B.PATSEL and Ifx_DMA.BLK1.ME.CHCR.B.PATSEL
193 */
194 typedef enum
195 {
196 IfxDma_ChannelPattern_0_disable = 0, /**< \brief Pattern detect 0 disabled */
197 IfxDma_ChannelPattern_0_mode1 = 1, /**< \brief Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2] */
198 IfxDma_ChannelPattern_0_mode2 = 2, /**< \brief Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT0[1] masked by PAT0[3] */
199 IfxDma_ChannelPattern_0_mode3 = 3, /**< \brief Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2] of actual DMA read move and pattern compare of MExR.RD[0] to PAT0[1] masked by PAT0[3] of previous DMA read move */
200 IfxDma_ChannelPattern_1_disable = 4, /**< \brief Pattern detect 1 disabled */
201 IfxDma_ChannelPattern_1_mode1 = 5, /**< \brief Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2] */
202 IfxDma_ChannelPattern_1_mode2 = 6, /**< \brief Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT1[1] masked by PAT1[3] */
203 IfxDma_ChannelPattern_1_mode3 = 7 /**< \brief Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2] of actual DMA read move and pattern compare of MExR.RD[0] to PAT1[1] masked by PAT1[3] of previous DMA read move */
204 } IfxDma_ChannelPattern;
205
206 /** \brief Channel Priority definition
207 */
208 typedef enum
209 {
210 IfxDma_ChannelPriority_low = 0, /**< \brief low priority */
211 IfxDma_ChannelPriority_medium = 1, /**< \brief medium priority */
212 IfxDma_ChannelPriority_high = 2 /**< \brief high priority */
213 } IfxDma_ChannelPriority;
214
215 /** \brief DMA request mode
216 * Definition in Ifx_DMA.BLK0.ME.CHCR.B.RROAT and Ifx_DMA.BLK1.ME.CHCR.B.RROAT
217 */
218 typedef enum
219 {
220 IfxDma_ChannelRequestMode_oneTransferPerRequest = 0, /**< \brief a request initiates a single transfer */
221 IfxDma_ChannelRequestMode_completeTransactionPerRequest = 1 /**< \brief a request initiates a complete transaction */
222 } IfxDma_ChannelRequestMode;
223
224 /** \brief DMA request selection
225 * Definition in Ifx_DMA.BLK0.ME.CHCR.B.PRSEL and Ifx_DMA.BLK1.ME.CHCR.B.PRSEL
226 */
227 typedef enum
228 {
229 IfxDma_ChannelRequestSource_peripheral = 0, /**< \brief Transfer Request via Hardware Trigger */
230 IfxDma_ChannelRequestSource_daisyChain = 1 /**< \brief Transfer Request via next (higher priority) channel */
231 } IfxDma_ChannelRequestSource;
232
233 /** \brief shadow definition definition
234 * Definition in Ifx_DMA.CH[64].ADICR.B.SHCT
235 */
236 typedef enum
237 {
238 IfxDma_ChannelShadow_none = 0, /**< \brief shadow address register not used. Source and destination address register are written directly */
239 IfxDma_ChannelShadow_src = 1, /**< \brief Shadow address register used for source address buffering. When writing to SADRmx, the address is buffered in SHADRmx and transferred to SADRmx with the start of the next DMA transaction */
240 IfxDma_ChannelShadow_dst = 2, /**< \brief Shadow address register used for destination address buffering. When writing to DADRmx, the address is buffered in SHADRmx and transferred to DADRmx with the start of the next DMA transaction */
241 IfxDma_ChannelShadow_srcDirectWrite = 5, /**< \brief Shadow address used for source buffering. When writing to SADRz, the address is buffered in SHADRz and transferred to SADRz with the start of the next DMA transaction */
242 IfxDma_ChannelShadow_dstDirectWrite = 6, /**< \brief Shadow address used for destination buffering. When writing to DADRz, the address is buffered in SHADRz and transferred to DADRz with the start of the next DMA transaction */
243 IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch = 8, /**< \brief Software switch only. Shadow address used for double buffering */
244 IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch = 9, /**< \brief Automatic Hardware and Software switch. Shadow address used for double buffering */
245 IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch = 10, /**< \brief Software switch only. Shadow address used for double buffering */
246 IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch = 11, /**< \brief Automatic Hardware and Software switch. Shadow address used for double buffering */
247 IfxDma_ChannelShadow_linkedList = 12, /**< \brief The DMA controller reads a DMA channel transaction control set and overwrites 8 X words in the corresponding DMARAM channel z */
248 IfxDma_ChannelShadow_accumulatedLinkedList = 13, /**< \brief The DMA controller reads a DMA channel transaction control set and overwrites 6 X words in the corresponding DMARAM channel z */
249 IfxDma_ChannelShadow_safeLinkedList = 14, /**< \brief The DMA controller reads a DMA channel transaction control set. The Linked List only proceeds with the next DMA transaction if the existing SDCRC checksum matches the expected SDCRC checksum in the loaded from the new DMA transaction control set */
250 IfxDma_ChannelShadow_conditionalLinkedList = 15 /**< \brief Shadow address register (MExSHADR) and source and destination address CRC register (MExSDCRC) are used as address pointers to a Linked List. The selection of the address pointer is determined by DMA channel pattern detection conditions */
251 } IfxDma_ChannelShadow;
252
253 typedef enum
254 {
255 IfxDma_HardwareResourcePartition_0 = 0, /**< \brief "Set of DMA channels are associated with hardware resource partition " + str(x) */
256 IfxDma_HardwareResourcePartition_1, /**< \brief "Set of DMA channels are associated with hardware resource partition " + str(x) */
257 IfxDma_HardwareResourcePartition_2, /**< \brief "Set of DMA channels are associated with hardware resource partition " + str(x) */
258 IfxDma_HardwareResourcePartition_3 /**< \brief "Set of DMA channels are associated with hardware resource partition " + str(x) */
259 } IfxDma_HardwareResourcePartition;
260
261 /** \brief DMA move engine definition
262 */
263 typedef enum
264 {
265 IfxDma_MoveEngine_0 = 0, /**< \brief first move engine */
266 IfxDma_MoveEngine_1 = 1 /**< \brief second move engine */
267 } IfxDma_MoveEngine;
268
269 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
270 * Definition in Ifx_DMA.CLC.B.EDIS
271 */
272 typedef enum
273 {
274 IfxDma_SleepMode_enable = 0, /**< \brief enables sleep mode */
275 IfxDma_SleepMode_disable = 1 /**< \brief disables sleep mode */
276 } IfxDma_SleepMode;
277
278 /** \} */
279
280 /** \addtogroup IfxLld_Dma_Std_Reset
281 * \{ */
282
283 /******************************************************************************/
284 /*-------------------------Inline Function Prototypes-------------------------*/
285 /******************************************************************************/
286
287 /** \brief Return the status of a DMA channel (reset / not reset)
288 * This API needs to be used after the IfxDma_resetChannel()
289 * \param dma pointer to DMA module
290 * \param channelId DMA channel number
291 * \return TRUE if the channel is reset
292 * FALSE if the channel is not reset
293 *
294 * \code
295 * // check whether the channel is reset or not and also the hardware trigger disabled
296 *
297 * if (IfxDma_isChannelReset(chn[0].dma, chn[0].channelId) &&
298 * (!IfxDma_isChannelTransactionEnabled(chn[0].dma, chn[0].channelId))) {
299 * // Dma is out of RESET and there is no hardware request enabled
300 * IfxDma_Dma_startChannelTransaction(&chn[0]);
301 * }
302 * \endcode
303 *
304 */
305 IFX_INLINE boolean IfxDma_isChannelReset(Ifx_DMA *dma, IfxDma_ChannelId channelId);
306
307 /** \brief Reset the channel
308 * \param dma pointer to DMA module
309 * \param channelId DMA channel number
310 * \return None
311 *
312 * \code
313 * // Apply reset to the channel
314 * IfxDma_resetChannel(chn[0].dma, chn[0].channelId);
315 * \endcode
316 *
317 */
318 IFX_INLINE void IfxDma_resetChannel(Ifx_DMA *dma, IfxDma_ChannelId channelId);
319
320 /** \} */
321
322 /** \addtogroup IfxLld_Dma_Std_Channel_Transaction
323 * \{ */
324
325 /******************************************************************************/
326 /*-------------------------Inline Function Prototypes-------------------------*/
327 /******************************************************************************/
328
329 /** \brief Clear the channel transaction request lost flag status
330 * \param dma pointer to DMA module
331 * \param channelId DMA channel number
332 * \return None
333 *
334 * \code
335 * // Clear the channel transaction request lost flag status
336 * IfxDma_clearChannelTransactionRequestLost(chn[0].dma, chn[0].channelId);
337 * \endcode
338 *
339 */
340 IFX_INLINE void IfxDma_clearChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId);
341
342 /** \brief Disable a DMA channel hardware transaction request
343 * \param dma pointer to DMA module
344 * \param channelId DMA channel number
345 * \return None
346 *
347 * A coding example can be found in \ref IfxDma_enableChannelTransaction
348 *
349 */
350 IFX_INLINE void IfxDma_disableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId);
351
352 /** \brief Disable the generation of a channel transaction lost error interrupt
353 * \param dma pointer to DMA module
354 * \param channelId DMA channel number
355 * \return None
356 *
357 * \code
358 * // Disable the transaction request lost interrupt for given channel
359 * IfxDma_disableChannelTransactionLostError(chn[0].dma, chn[0].channelId);
360 * \endcode
361 *
362 */
363 IFX_INLINE void IfxDma_disableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId);
364
365 /** \brief Enable a DMA channel hardware transaction request
366 * \param dma pointer to DMA module
367 * \param channelId DMA channel number
368 * \return None
369 *
370 * \code
371 * unsigned *src = (unsigned *)((unsigned)&SRC_DMACH0.U + 4*NUM_CHANNELS);
372 * for(int chn=0; chn<NUM_CHANNELS; ++chn, ++src) {
373 * IfxSrc_setRequest(src);
374 * }
375 *
376 * // Do not restrict the hardware triggering to only one transaction
377 *
378 * IfxDma_setChannelContinuousMode(chn[0].dma, chn[0].channelId);
379 * IfxDma_setChannelContinuousMode(chn[1].dma, chn[1].channelId);
380 * IfxDma_setChannelContinuousMode(chn[2].dma, chn[2].channelId);
381 *
382 * // Check for end of transaction
383 *
384 * while(!(IfxDma_getAndClearChannelInterrupt(chn[0].dma, chn[0].channelId)));
385 *
386 * // Enable the hardware trigger for channel 3
387 * IfxDma_enableChannelTransaction(chn[3].dma, chn[3].channelId);
388 *
389 * // Disable the hardware trigger for channel 2
390 * IfxDma_disableChannelTransaction(chn[2].dma, chn[2].channelId);
391 * // Hardware triggers for second time
392 *
393 * unsigned *SRc = (unsigned *)((unsigned)&SRC_DMACH0.U + 4*NUM_CHANNELS);
394 * for(int chn=0; chn<NUM_CHANNELS; ++chn, ++src) {
395 * IfxSrc_setRequest(src);
396 * }
397 *
398 * // Restrict the hardware triggering to only one transaction
399 * IfxDma_setChannelSingleMode(chn[0].dma, chn[0].channelId);
400 * IfxDma_setChannelSingleMode(chn[1].dma, chn[1].channelId);
401 * \endcode
402 *
403 */
404 IFX_INLINE void IfxDma_enableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId);
405
406 /** \brief Enable the generation of a channel transaction lost error interrupt
407 * \param dma pointer to DMA module
408 * \param channelId DMA channel number
409 * \return None
410 *
411 * \code
412 * // Enable the transaction request lost interrupt for given channel
413 * IfxDma_enableChannelTransactionLostError(chn[0].dma, chn[0].channelId);
414 * \endcode
415 *
416 */
417 IFX_INLINE void IfxDma_enableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId);
418
419 /** \brief Check the channel transaction request lost flag status
420 * \param dma pointer to DMA module
421 * \param channelId DMA channel number
422 * \return TRUE if the TRL is set
423 * FALSE if the TRL is not set
424 *
425 * \code
426 * boolean trlFlag;
427 *
428 * // Check whether the channel transaction request lost flag is set or not
429 * trlFlag = IfxDma_getChannelTransactionRequestLost(chn[0].dma, chn[0].channelId));
430 * \endcode
431 *
432 */
433 IFX_INLINE boolean IfxDma_getChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId);
434
435 /** \brief Converts DMA circular range to circular code
436 * \param range DMA circular range
437 * \return DMA circular code
438 */
439 IFX_INLINE IfxDma_ChannelIncrementCircular IfxDma_getCircularRangeCode(uint16 range);
440
441 /** \brief Return the hardware transaction request status of a DMA channel
442 * \param dma pointer to DMA module
443 * \param channelId DMA channel number
444 * \return TRUE if the hardware transaction request is enabled
445 * FALSE if the hardware transaction request is disabled
446 *
447 * A coding example can be found in \ref IfxDma_isChannelReset
448 *
449 */
450 IFX_INLINE boolean IfxDma_isChannelTransactionEnabled(Ifx_DMA *dma, IfxDma_ChannelId channelId);
451
452 /** \brief Return the status of a DMA channel (transaction pending)
453 * \param dma pointer to DMA module
454 * \param channelId DMA channel number
455 * \return TRUE if a transaction request for the given channel is pending
456 *
457 * \code
458 * // check for the channel request pending with the channel
459 * if (IfxDma_isChannelTransactionPending(chn[0].dma, chn[0].channelId) == TRUE) {
460 * // There is channel request pending for channel 0
461 * result |= 0;
462 * }
463 * \endcode
464 *
465 */
466 IFX_INLINE boolean IfxDma_isChannelTransactionPending(Ifx_DMA *dma, IfxDma_ChannelId channelId);
467
468 /** \brief Sets the sensitivity of the module to sleep signal
469 * \param dma pointer to DMA registers
470 * \param mode mode selection (enable/disable)
471 * \return None
472 */
473 IFX_INLINE void IfxDma_setSleepMode(Ifx_DMA *dma, IfxDma_SleepMode mode);
474
475 /** \brief Request a DMA channel transaction
476 * \param dma pointer to DMA module
477 * \param channelId DMA channel number
478 * \return None
479 *
480 * A coding example can be found in \ref IfxDma_Dma_startChannelTransaction
481 *
482 */
483 IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId);
484
485 /** \} */
486
487 /** \addtogroup IfxLld_Dma_Std_Move_Engine
488 * \{ */
489
490 /******************************************************************************/
491 /*-------------------------Inline Function Prototypes-------------------------*/
492 /******************************************************************************/
493
494 /** \brief Clear the DMA error status flags
495 * \param dma pointer to DMA module
496 * \param moveEngine pointer to the DMA move engine
497 * \param mask value holds the bits to clear or mask
498 * \return None
499 *
500 * \code
501 * // Clear the status of the error flags (as defined in _Impl/IfxDma_cfg.h)
502 * IfxDma_clearErrorFlags(chn[0].dma,IfxDma_MoveEngine_1,
503 * IFXDMA_ERROR_S | // move engine source error
504 * IFXDMA_ERROR_D | // move engine destination error
505 * IFXDMA_ERROR_SPB | // bus error on SPB
506 * IFXDMA_ERROR_SRI | // bus error on SRI
507 * IFXDMA_ERROR_RAM | // RAM error
508 * IFXDMA_ERROR_SLL | // safe linked list CRC checksum error
509 * IFXDMA_ERROR_DLL); // failed linked list load error
510 * \endcode
511 *
512 */
513 IFX_INLINE void IfxDma_clearErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine, uint32 mask);
514
515 /** \brief Disable the generation of a Move engine destination error interrupt
516 * \param dma pointer to DMA module
517 * \param moveEngine pointer to the DMA move engine
518 * \return None
519 *
520 * A coding example can be found in \ref IfxDma_disableMoveEngineSourceError
521 *
522 */
523 IFX_INLINE void IfxDma_disableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine);
524
525 /** \brief Disable the generation of a Move engine source error interrupt
526 * \param dma pointer to DMA module
527 * \param moveEngine pointer to the DMA move engine
528 * \return None
529 *
530 * \code
531 * // Disable the move engine source and destination move errors
532 * IfxDma_disableMoveEngineSourceError(chn[0].dma,IfxDma_MoveEngine_1);
533 * IfxDma_disableMoveEngineDestinationError(chn[0].dma,IfxDma_MoveEngine_1);
534 * \endcode
535 *
536 */
537 IFX_INLINE void IfxDma_disableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine);
538
539 /** \brief Enable the generation of a Move engine destination error interrupt
540 * \param dma pointer to DMA module
541 * \param moveEngine pointer to the DMA move engine
542 * \return None
543 *
544 * A coding example can be found in \ref IfxDma_enableMoveEngineSourceError
545 *
546 */
547 IFX_INLINE void IfxDma_enableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine);
548
549 /** \brief Enable the generation of a Move engine source error interrupt
550 * \param dma pointer to DMA module
551 * \param moveEngine pointer to the DMA move engine
552 * \return None
553 *
554 * \code
555 * // Enable the move engine source and destination move errors
556 * IfxDma_enableMoveEngineSourceError(chn[0].dma,IfxDma_MoveEngine_1);
557 * IfxDma_enableMoveEngineDestinationError(chn[0].dma,IfxDma_MoveEngine_1);
558 * \endcode
559 *
560 */
561 IFX_INLINE void IfxDma_enableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine);
562
563 /** \brief Return the DMA error status flags
564 * \param dma pointer to DMA module
565 * \param moveEngine pointer to the DMA move engine
566 * \return the content of the DMA.ERRSR register
567 *
568 * \code
569 * uint32 errorFlags = 0;
570 *
571 * // Get the status of the error flags of move engine
572 * errorFlags = IfxDma_getErrorFlags(chn[0].dma,IfxDma_MoveEngine_1);
573 *
574 * if( errorFlags & IFXDMA_ERROR_S ) { // move engine source error
575 * }
576 *
577 * if( errorFlags & IFXDMA_ERROR_D ) { // move engine destination error
578 * // ...
579 * }
580 *
581 * if( errorFlags & IFXDMA_ERROR_SPB ) { // bus error on SPB
582 * // ...
583 * }
584 *
585 * if( errorFlags & IFXDMA_ERROR_SRI ) { // bus error on SRI
586 * // ...
587 * }
588 *
589 * if( errorFlags & IFXDMA_ERROR_RAM ) { // RAM error
590 * // ...
591 * }
592 *
593 * if( errorFlags & IFXDMA_ERROR_SLL ) { // safe linked list CRC checksum error
594 * // ...
595 * }
596 *
597 * if( errorFlags & IFXDMA_ERROR_DLL ) { // failed linked list load error
598 * // ...
599 * }
600 * \endcode
601 *
602 */
603 IFX_INLINE uint32 IfxDma_getErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine);
604
605 /** \} */
606
607 /** \addtogroup IfxLld_Dma_Std_Channel_Configure
608 * \{ */
609
610 /******************************************************************************/
611 /*-------------------------Inline Function Prototypes-------------------------*/
612 /******************************************************************************/
613
614 /** \brief Get a channel source address
615 * \param dma pointer to DMA module
616 * \param channelId DMA channel number
617 * \return Actual channel destination address
618 *
619 * \code
620 * uint32 destAddr = IfxDma_getChannelDestinationAddress(chn[2].dma, chn[2].channelId);
621 *
622 * \endcode
623 *
624 */
625 IFX_INLINE uint32 IfxDma_getChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId);
626
627 /** \brief Get a channel source address
628 * \param dma pointer to DMA module
629 * \param channelId DMA channel number
630 * \return Actual channel source address
631 *
632 * \code
633 * uint32 sourceAddr = IfxDma_getChannelSourceAddress(chn[2].dma, chn[2].channelId);
634 * \endcode
635 *
636 */
637 IFX_INLINE uint32 IfxDma_getChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId);
638
639 /** \brief Return the DMA channel suspend Mode status
640 * \param dma pointer to DMA module
641 * \param channelId DMA channel number
642 * \return Channel Suspend Mode or Frozen State Active status (1- DMA channel is in channel suspend mode or frozen state)
643 */
644 IFX_INLINE boolean IfxDma_getChannelSuspendModeStatus(Ifx_DMA *dma, IfxDma_ChannelId channelId);
645
646 /** \brief Return remaining DMA transfer count
647 * \param dma pointer to DMA module
648 * \param channelId DMA channel number
649 * \return Remaining DMA transfer count
650 *
651 * \code
652 * // Wait till transfer count (TCOUNT) becomes 0
653 *
654 * bool notFinished;
655 * do {
656 * notFinished = false;
657 * if( IfxDma_getChannelTransferCount(chn[0].dma, chn[0].channelId) ) {
658 * notFinished = true;
659 * break;
660 * }
661 * } while( notFinished );
662 * \endcode
663 *
664 */
665 IFX_INLINE uint32 IfxDma_getChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId);
666
667 /** \brief get the time stamp
668 * \param dma pointer to DMA module
669 * \return the current time stamp
670 *
671 * \code
672 * uint32 timestamp = IfxDma_getTimestamp(chn[0].dma);
673 * \endcode
674 *
675 */
676 IFX_INLINE uint32 IfxDma_getTimestamp(Ifx_DMA *dma);
677
678 /** \brief Configure the move count for each DMA channel transfer
679 * \param dma pointer to DMA module
680 * \param channelId DMA channel number
681 * \param blockMode value holds the number of moves with in a DMA transfer
682 * \return None
683 *
684 * A coding example can be found in \ref IfxDma_setChannelTransferCount
685 *
686 */
687 IFX_INLINE void IfxDma_setChannelBlockMode(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMove blockMode);
688
689 /** \brief Configure a DMA channel to "continous transaction mode"
690 * After a transaction, the hardware request transaction remain enabled
691 * \param dma pointer to DMA module
692 * \param channelId DMA channel number
693 * \return None
694 *
695 * A coding example can be found in \ref IfxDma_enableChannelTransaction
696 *
697 */
698 IFX_INLINE void IfxDma_setChannelContinuousMode(Ifx_DMA *dma, IfxDma_ChannelId channelId);
699
700 /** \brief Configure the destination address
701 * \param dma pointer to DMA module
702 * \param channelId DMA channel number
703 * \param address is the Initial address of the destination pointer
704 * \return None
705 *
706 * A coding example can be found in \ref IfxDma_setChannelSourceAddress
707 *
708 */
709 IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address);
710
711 /** \brief Configure a DMA channel destination pointer
712 * \param dma pointer to DMA module
713 * \param channelId DMA channel number
714 * \param incStep Specifies the pointer incrementation step
715 * \param direction Specifies the incrementation direction
716 * \param size Specifies the size of the circular buffer
717 * \return None
718 *
719 * A coding example can be found in \ref IfxDma_setChannelSourceIncrementStep
720 *
721 */
722 IFX_INLINE void IfxDma_setChannelDestinationIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size);
723
724 /** \brief Configure a DMA channel move
725 * \param dma pointer to DMA module
726 * \param channelId DMA channel number
727 * \param moveSize value holds the opcode or size of data of individual moves with in a DMA transfer
728 * \return None
729 *
730 * A coding example can be found in \ref IfxDma_setChannelTransferCount
731 *
732 */
733 IFX_INLINE void IfxDma_setChannelMoveSize(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize);
734
735 /** \brief Configure a DMA channel shadow pointer
736 * \param dma pointer to DMA module
737 * \param channelId DMA channel number
738 * \param shadow Specifies the shadow pointer
739 * \return None
740 *
741 * \code
742 * // Push the shadow mode into double buffer
743 * IfxDma_setChannelShadow(chn[0].dma, chn[0].channelId,
744 * IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch);
745 * \endcode
746 *
747 */
748 IFX_INLINE void IfxDma_setChannelShadow(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelShadow shadow);
749
750 /** \brief Configure a DMA channel to "single transaction mode"
751 * After a transaction, the hardware request transaction is disabled, and must be set by software again
752 * \param dma pointer to DMA module
753 * \param channelId DMA channel number
754 * \return None
755 *
756 * A coding example can be found in \ref IfxDma_enableChannelTransaction
757 *
758 */
759 IFX_INLINE void IfxDma_setChannelSingleMode(Ifx_DMA *dma, IfxDma_ChannelId channelId);
760
761 /** \brief Configure a DMA channel to "single transaction mode"
762 * One transfer request starts a complete DMA transaction
763 * \param dma pointer to DMA module
764 * \param channelId DMA channel number
765 * \return None
766 *
767 * A coding example can be found in \ref IfxDma_setChannelTransferCount
768 *
769 */
770 IFX_INLINE void IfxDma_setChannelSingleTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId);
771
772 /** \brief Configure a DMA channel to "single transfer mode"
773 * A transfer request is required for each transfer
774 * \param dma pointer to DMA module
775 * \param channelId DMA channel number
776 * \return None
777 *
778 * A coding example can be found in \ref IfxDma_setChannelTransferCount
779 *
780 */
781 IFX_INLINE void IfxDma_setChannelSingleTransfer(Ifx_DMA *dma, IfxDma_ChannelId channelId);
782
783 /** \brief Configure the source address
784 * \param dma pointer to DMA module
785 * \param channelId DMA channel number
786 * \param address is the Initial address of the source pointer
787 * \return None
788 *
789 * \code
790 * // Check for the end of current transaction and before trigger the channel request for
791 * // for another channel, re configure the source and destination addresses
792 *
793 * while(!(IfxDma_getAndClearChannelInterrupt(chn[1].dma, chn[1].channelId)));
794 *
795 * // Re-Program the source address for the channel 2
796 * IfxDma_setChannelSourceAddress(chn[2].dma, chn[2].channelId,Sadr);
797 *
798 * // Re-Program the destination address for channel 2
799 * IfxDma_setChannelDestinationAddress(chn[2].dma, chn[2].channelId,Dadr);
800 *
801 * // Start DMA transaction for channel 2
802 * IfxDma_Dma_startChannelTransaction(&chn[2]);
803 * \endcode
804 *
805 */
806 IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address);
807
808 /** \brief Configure a DMA channel source pointer
809 * \param dma pointer to DMA module
810 * \param channelId DMA channel number
811 * \param incStep Specifies the pointer incrementation step
812 * \param direction Specifies the incrementation direction
813 * \param size Specifies the size of the circular buffer
814 * \return None
815 *
816 * \code
817 * // Re-program the source and destination circular buffer control fields
818 * IfxDma_setChannelSourceIncrementStep(chn[0].dma, chn[0].channelId, IfxDma_ChannelIncrementStep_2, IfxDma_ChannelIncrementDirection_negative, IfxDma_ChannelIncrementCircular_16);
819 *
820 * IfxDma_setChannelDestinationIncrementStep(chn[0].dma, chn[0].channelId, IfxDma_ChannelIncrementStep_2, IfxDma_ChannelIncrementDirection_negative, IfxDma_ChannelIncrementCircular_16);
821 * \endcode
822 *
823 */
824 IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size);
825
826 /** \brief Configure a DMA channel suspend enable
827 * \param dma pointer to DMA module
828 * \param channelId DMA channel number
829 * \param enable enable (1) / disable (0)
830 * \return None
831 */
832 IFX_INLINE void IfxDma_setChannelSuspendEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId, boolean enable);
833
834 /** \brief Configure the move count of a DMA channel transaction
835 * \param dma pointer to DMA module
836 * \param channelId DMA channel number
837 * \param transferCount value holds the DMA transfers within a transaction (1..16383; 0 handled like 1 transaction)
838 * \return None
839 *
840 * \code
841 * // Start DMA transaction
842 * IfxDma_Dma_startChannelTransaction(&chn[0]);
843 *
844 * // Wait till end of transaction
845 * while(!(IfxDma_getAndClearChannelInterrupt(chn[0].dma, chn[0].channelId)));
846 *
847 * // Change the TREL configuration for channel 1
848 * IfxDma_setChannelTransferCount(chn[1].dma, chn[1].channelId,0x6);
849 *
850 * // Change the BLKM configuration for channel 1
851 * IfxDma_setChannelBlockMode(chn[1].dma, chn[1].channelId,IfxDma_ChannelMove_3);
852 *
853 * // Change the Move size configuration for channel 1
854 * IfxDma_setChannelMoveSize(chn[1].dma, chn[1].channelId,IfxDma_ChannelMoveSize_64bit);
855 *
856 * // Pull down the channel pending request after the first transfer is initiated
857 * IfxDma_setChannelSingleTransfer(chn[1].dma, chn[1].channelId);
858 *
859 * // Pull down the channel pending request after the transaction gets over
860 * IfxDma_setChannelSingleTransaction(chn[2].dma, chn[2].channelId);
861 *
862 * // Start DMA transaction
863 * IfxDma_Dma_startChannelTransaction(&chn[1]);
864 *
865 * // Start DMA transaction
866 * IfxDma_Dma_startChannelTransaction(&chn[2]);
867 * \endcode
868 *
869 */
870 IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount);
871
872 /** \brief Configure the shadow pointer register to read only
873 * \param dma pointer to DMA module
874 * \param channelId DMA channel number
875 * \return None
876 *
877 * \code
878 * // Disable the shadow mode to come out of double buffer mode
879 * IfxDma_writeChannelShadowDisable(chn[0].dma, chn[0].channelId);
880 * \endcode
881 *
882 */
883 IFX_INLINE void IfxDma_writeChannelShadowDisable(Ifx_DMA *dma, IfxDma_ChannelId channelId);
884
885 /** \brief Configure the shadow pointer register to write-able
886 * \param dma pointer to DMA module
887 * \param channelId DMA channel number
888 * \return None
889 *
890 * \code
891 * // Enable the shadow mode to come out of double buffer mode
892 * IfxDma_writeChannelShadowEnable(chn[0].dma, chn[0].channelId);
893 * \endcode
894 *
895 */
896 IFX_INLINE void IfxDma_writeChannelShadowEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId);
897
898 /** \} */
899
900 /** \addtogroup IfxLld_Dma_Std_Channel_Halt
901 * \{ */
902
903 /******************************************************************************/
904 /*-------------------------Inline Function Prototypes-------------------------*/
905 /******************************************************************************/
906
907 /** \brief Clear channel halt request and aknowledgement
908 * \param dma pointer to DMA module
909 * \param channelId DMA channel number
910 * \return None
911 *
912 * \code
913 * // Quit the halt mode of operation
914 * IfxDma_clearChannelHalt(chn[0].dma, chn[0].channelId);
915 * \endcode
916 *
917 */
918 IFX_INLINE void IfxDma_clearChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
919
920 /** \brief Get channel halt aknowledgement
921 * \param dma pointer to DMA module
922 * \param channelId DMA channel number
923 * \return halt aknowledgement
924 *
925 * \code
926 * // Check for the channel halt aknowledgement
927 * while(!(IfxDma_getChannelHalt(chn[0].dma, chn[0].channelId)));
928 * \endcode
929 *
930 */
931 IFX_INLINE boolean IfxDma_getChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
932
933 /** \brief setting channel halt request
934 * \param dma pointer to DMA module
935 * \param channelId DMA channel number
936 * \return None
937 *
938 * \code
939 * // Halt the channel processing
940 * IfxDma_setChannelHalt(chn[0].dma,chn[0].channelId);
941 * \endcode
942 *
943 */
944 IFX_INLINE void IfxDma_setChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
945
946 /** \} */
947
948 /** \addtogroup IfxLld_Dma_Std_Double_Buffer
949 * \{ */
950
951 /******************************************************************************/
952 /*-------------------------Inline Function Prototypes-------------------------*/
953 /******************************************************************************/
954
955 /** \brief get information on buffer being read by software and clear the notification flag
956 * \param dma pointer to DMA module
957 * \param channelId DMA channel number
958 * \return TRUE if one of the buffers is being read by software
959 * FALSE if one of the buffers is already read by software
960 *
961 * \code
962 * // Check the buffer being read (Double buffer operation mode)
963 * while(!(IfxDma_getDoubleBufferRead(chn[0].dma, chn[0].channelId)));
964 * \endcode
965 *
966 */
967 IFX_INLINE boolean IfxDma_getDoubleBufferRead(Ifx_DMA *dma, IfxDma_ChannelId channelId);
968
969 /** \brief get Double buffer selection
970 * \param dma pointer to DMA module
971 * \param channelId channelId DMA channel number
972 * \return TRUE if buffer 1 is being filled
973 * FALSE if buffer 0 is being filled
974 *
975 * \code
976 * boolean buffer_being_filled;
977 *
978 * // Check the buffer being filled (Double buffer operation mode)
979 * buffer_being_filled = IfxDma_getDoubleBufferSelection(chn[0].dma, chn[0].channelId));
980 * \endcode
981 *
982 */
983 IFX_INLINE boolean IfxDma_getDoubleBufferSelection(Ifx_DMA *dma, IfxDma_ChannelId channelId);
984
985 /** \brief keeps the double buffer active
986 * \param dma pointer to DMA module
987 * \param channelId DMA channel number
988 * \return None
989 *
990 * \code
991 * IfxDma_keepDoubleBufferActive(chn[0].dma, chn[0].channelId);
992 * \endcode
993 *
994 */
995 IFX_INLINE void IfxDma_keepDoubleBufferActive(Ifx_DMA *dma, IfxDma_ChannelId channelId);
996
997 /** \brief Double buffer switch application
998 * \param dma pointer to DMA module
999 * \param channelId DMA channel number
1000 * \return None
1001 *
1002 * \code
1003 * // Apply software buffer switch
1004 * IfxDma_switchDoubleBuffer(chn[0].dma, chn[0].channelId);
1005 * \endcode
1006 *
1007 */
1008 IFX_INLINE void IfxDma_switchDoubleBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1009
1010 /** \} */
1011
1012 /** \addtogroup IfxLld_Dma_Std_Interrupts
1013 * \{ */
1014
1015 /******************************************************************************/
1016 /*-------------------------Inline Function Prototypes-------------------------*/
1017 /******************************************************************************/
1018
1019 /** \brief Clear a channel transfer interrupt flag
1020 * \param dma pointer to DMA module
1021 * \param channelId channel for which the interrupt flag should be cleared
1022 * \return None
1023 *
1024 * see Dma.INTSR
1025 *
1026 */
1027 IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1028
1029 /** \brief Disable channel interrupt trigger
1030 * \param dma pointer to DMA module
1031 * \param channelId DMA channel number
1032 * \return None
1033 *
1034 * \code
1035 * IfxDma_disableChannelInterrupt(chn[0].dma, chn[0].channelId);
1036 * \endcode
1037 *
1038 */
1039 IFX_INLINE void IfxDma_disableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1040
1041 /** \brief Enable channel interrupt trigger
1042 * \param dma pointer to DMA module
1043 * \param channelId DMA channel number
1044 * \return None
1045 *
1046 * \code
1047 * IfxDma_enableChannelInterrupt(chn[0].dma, chn[0].channelId);
1048 * \endcode
1049 *
1050 */
1051 IFX_INLINE void IfxDma_enableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1052
1053 /** \brief Return and clear a channel transfer interrupt flag
1054 * The flag is automatically cleared with the call to this function
1055 * \param dma pointer to DMA module
1056 * \param channelId DMA channel number
1057 * \return TRUE if the interrupt flag is set
1058 * FALSE if the interrupt flag is not set
1059 *
1060 * \code
1061 * // wait for the end of transaction for intended channel by checking the channel interrupt flag
1062 * // and clear it once it is set and checked
1063 *
1064 * // Wait till end of the transaction
1065 * while(!(IfxDma_getAndClearChannelInterrupt(chn[2].dma, chn[2].channelId)));
1066 * \endcode
1067 *
1068 */
1069 IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1070
1071 /** \brief Returns and clears the pattern detection interrupt flag
1072 * \param dma pointer to DMA module
1073 * \param channelId DMA channel number
1074 * \return TRUE if pattern detection for a given channel is found
1075 * FALSE if pattern detection for a given channel is not found
1076 *
1077 * \code
1078 * // wait till pattern match is found for given channel
1079 * // and clear it once it is set and checked
1080 *
1081 * // Wait for the pattern detection
1082 * while(!(IfxDma_getAndClearChannelPatternDetectionInterrupt(chn[0].dma, chn[0].channelId)));
1083 * \endcode
1084 *
1085 */
1086 IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1087
1088 /** \brief Returns and clears the status of channel wrap destination buffer interrupt trigger flag
1089 * \param dma pointer to DMA module
1090 * \param channelId DMA channel number
1091 * \return TRUE if wrap destination buffer interrupt trigger flag is set
1092 * FALSE if wrap destination buffer interrupt trigger flag is not set or get cleared already
1093 *
1094 * \code
1095 * // wait for the destination buffer wrap interrupt flag
1096 * // and clear it once it is set and checked
1097 * boolean destinationWrapFlag;
1098 *
1099 * destinationWrapFlag = IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(chn[0].dma, chn[0].channelId);
1100 * \endcode
1101 *
1102 */
1103 IFX_INLINE boolean IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1104
1105 /** \brief Returns and clears the status of channel wrap source buffer interrupt trigger flag
1106 * \param dma pointer to DMA module
1107 * \param channelId DMA channel number
1108 * \return TRUE if wrap source buffer interrupt trigger flag is set
1109 * FALSE if wrap source buffer interrupt trigger flag is not set or get cleared already
1110 *
1111 * \code
1112 * // wait for the source buffer wrap interrupt flag
1113 * // and clear it once it is set and checked
1114 * boolean sourceWrapFlag;
1115 *
1116 * sourceWrapFlag = IfxDma_getAndClearChannelWrapSourceBufferInterrupt(chn[0].dma, chn[0].channelId);
1117 * \endcode
1118 *
1119 */
1120 IFX_INLINE boolean IfxDma_getAndClearChannelWrapSourceBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1121
1122 /** \brief Return a channel transfer interrupt flag
1123 * \param dma pointer to DMA module
1124 * \param channelId channel for which the interrupt flag should be returned
1125 * \return TRUE if the interrupt flag is set
1126 * FALSE if the interrupt flag is not set
1127 *
1128 * see Dma.INTSR
1129 *
1130 */
1131 IFX_INLINE boolean IfxDma_getChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1132
1133 /** \brief Returns whether the old value of pattern detection corresponding pattern comparison operation found a pattern match in previous DMA * read move or not
1134 * \param dma pointer to DMA module
1135 * \param channelId DMA channel number
1136 * \return TRUE if corresponding pattern comparison operation found a pattern match in previous DMA read move or not
1137 * FALSE if corresponding pattern comparison operation did not find a pattern match in previous DMA read move
1138 *
1139 * \code
1140 * boolean patternDetectOldVal;
1141 *
1142 * // Check the old value of the pattern detection
1143 * patternDetectOldVal = IfxDma_getChannelPatternDetectionOldValue(chn[0].dma, chn[0].channelId);
1144 * \endcode
1145 *
1146 */
1147 IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1148
1149 /** \brief Returns the SRC pointer for given DMA channel
1150 * \param dma pointer to DMA module
1151 * \param channelId DMA channel number
1152 * \return SRC pointer for given DMA channel
1153 *
1154 * \code
1155 *
1156 * \endcode
1157 *
1158 */
1159 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1160
1161 /** \brief Setting of channel interrupt service request by software
1162 * \param dma pointer to DMA module
1163 * \param channelId DMA channel number
1164 * \return None
1165 *
1166 * \code
1167 * // Set the channel interrupt service request through software
1168 * IfxDma_setChannelInterruptServiceRequest(chn[0].dma, chn[0].channelId);
1169 * \endcode
1170 *
1171 */
1172 IFX_INLINE void IfxDma_setChannelInterruptServiceRequest(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1173
1174 /** \} */
1175
1176 /******************************************************************************/
1177 /*-------------------------Inline Function Prototypes-------------------------*/
1178 /******************************************************************************/
1179
1180 /** \brief Configure the hardware resource partition
1181 * \param dma pointer to DMA module
1182 * \param channelId DMA channel number
1183 * \param resourcePartition Hardware resource partition
1184 * \return None
1185 *
1186 * \code
1187 * // Set the required hardware resource partition
1188 * IfxDma_setChannelHardwareResourcePartition(chn[0].dma, chn[0].channelId,setChannelHardwareResourcePartition);
1189 * \endcode
1190 *
1191 */
1192 IFX_INLINE void IfxDma_setChannelHardwareResourcePartition(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_HardwareResourcePartition resourcePartition);
1193
1194 /** \brief Sets the Interrupt control value
1195 * \param dma pointer to DMA module
1196 * \param channelId DMA channel number
1197 * \param value Interrupt control value
1198 * \return None
1199 */
1200 IFX_INLINE void IfxDma_setInterruptControlValue(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint8 value);
1201
1202 /** \brief Sets the Circular Buffer Destination Length
1203 * \param dma pointer to DMA module
1204 * \param channelId DMA channel number
1205 * \param length Circular Buffer Destination Length
1206 * \return None
1207 */
1208 IFX_INLINE void IfxDma_setCircularBufferDestinationLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length);
1209
1210 /** \brief Sets the Circular Buffer Source Length
1211 * \param dma pointer to DMA module
1212 * \param channelId DMA channel number
1213 * \param length Circular Buffer Source Length
1214 * \return None
1215 */
1216 IFX_INLINE void IfxDma_setCircularBufferSourceLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length);
1217
1218 /** \brief Enable the Source Circular Buffer
1219 * \param dma pointer to DMA module
1220 * \param channelId DMA channel number
1221 * \return None
1222 */
1223 IFX_INLINE void IfxDma_enableSourceCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1224
1225 /** \brief Enable the Destination Circular Buffer
1226 * \param dma pointer to DMA module
1227 * \param channelId DMA channel number
1228 * \return None
1229 */
1230 IFX_INLINE void IfxDma_enableDestinationCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1231
1232 /** \brief Returns the Data CRC
1233 * \param dma pointer to DMA module
1234 * \param channelId DMA channel number
1235 * \return The Data CRC value
1236 */
1237 IFX_INLINE uint32 IfxDma_getDataCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1238
1239 /** \brief Returns the Source and Destination CRC
1240 * \param dma pointer to DMA module
1241 * \param channelId DMA channel number
1242 * \return The source and destination CRC values
1243 */
1244 IFX_INLINE uint32 IfxDma_getSourceAndDestinationCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1245
1246 /** \brief Returns the ERR pointer
1247 * \param dma pointer to DMA module
1248 * \return ERR pointer for given DMA
1249 */
1250 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_getErrPointer(Ifx_DMA *dma);
1251
1252 /******************************************************************************/
1253 /*---------------------Inline Function Implementations------------------------*/
1254 /******************************************************************************/
1255
1256 IFX_INLINE void IfxDma_clearChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1257 {
1258 dma->TSR[channelId].B.HLTCLR = 1;
1259 }
1260
1261
1262 IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1263 {
1264 dma->CH[channelId].CHCSR.B.CICH = 1;
1265 }
1266
1267
1268 IFX_INLINE void IfxDma_clearChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1269 {
1270 dma->TSR[channelId].B.CTL = 1;
1271 }
1272
1273
1274 IFX_INLINE void IfxDma_clearErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine, uint32 mask)
1275 {
1276 if (moveEngine == IfxDma_MoveEngine_1)
1277 {
1278 dma->BLK1.CLRE.U = mask;
1279 }
1280 else
1281 {
1282 dma->BLK0.CLRE.U = mask;
1283 }
1284 }
1285
1286
1287 IFX_INLINE void IfxDma_disableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1288 {
1289 dma->CH[channelId].ADICR.B.INTCT &= ~(1 << 1); // TODO: should we define a special bitmask for this bit manipulation?
1290 }
1291
1292
1293 IFX_INLINE void IfxDma_disableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1294 {
1295 dma->TSR[channelId].B.DCH = 1;
1296 }
1297
1298
1299 IFX_INLINE void IfxDma_disableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1300 {
1301 dma->CH[channelId].ADICR.B.ETRL = 0;
1302 }
1303
1304
1305 IFX_INLINE void IfxDma_disableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
1306 {
1307 if (moveEngine == IfxDma_MoveEngine_1)
1308 {
1309 dma->BLK1.EER.B.EDER = 0;
1310 }
1311 else
1312 {
1313 dma->BLK0.EER.B.EDER = 0;
1314 }
1315 }
1316
1317
1318 IFX_INLINE void IfxDma_disableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
1319 {
1320 if (moveEngine == IfxDma_MoveEngine_1)
1321 {
1322 dma->BLK1.EER.B.ESER = 0;
1323 }
1324 else
1325 {
1326 dma->BLK0.EER.B.ESER = 0;
1327 }
1328 }
1329
1330
1331 IFX_INLINE void IfxDma_enableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1332 {
1333 dma->CH[channelId].ADICR.B.INTCT |= (1 << 1); // TODO: should we define a special bitmask for this bit manipulation?
1334 }
1335
1336
1337 IFX_INLINE void IfxDma_enableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1338 {
1339 dma->TSR[channelId].B.ECH = 1;
1340 }
1341
1342
1343 IFX_INLINE void IfxDma_enableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1344 {
1345 dma->CH[channelId].ADICR.B.ETRL = 1;
1346 }
1347
1348
1349 IFX_INLINE void IfxDma_enableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
1350 {
1351 if (moveEngine == IfxDma_MoveEngine_1)
1352 {
1353 dma->BLK1.EER.B.EDER = 1;
1354 }
1355 else
1356 {
1357 dma->BLK0.EER.B.EDER = 1;
1358 }
1359 }
1360
1361
1362 IFX_INLINE void IfxDma_enableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
1363 {
1364 if (moveEngine == IfxDma_MoveEngine_1)
1365 {
1366 dma->BLK1.EER.B.ESER = 1;
1367 }
1368 else
1369 {
1370 dma->BLK0.EER.B.ESER = 1;
1371 }
1372 }
1373
1374
1375 IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1376 {
1377 boolean result;
1378
1379 result = dma->CH[channelId].CHCSR.B.ICH != 0;
1380
1381 if (result == 1)
1382 {
1383 dma->CH[channelId].CHCSR.B.CICH = TRUE;
1384 }
1385
1386 return result;
1387 }
1388
1389
1390 IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1391 {
1392 boolean result;
1393
1394 result = dma->CH[channelId].CHCSR.B.IPM != 0;
1395
1396 if (result == 1)
1397 {
1398 dma->CH[channelId].CHCSR.B.CICH = TRUE;
1399 }
1400
1401 return result;
1402 }
1403
1404
1405 IFX_INLINE boolean IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1406 {
1407 boolean result;
1408
1409 result = dma->CH[channelId].CHCSR.B.WRPD != 0;
1410
1411 if (result == 1)
1412 {
1413 dma->CH[channelId].CHCSR.B.CWRP = TRUE;
1414 }
1415
1416 return result;
1417 }
1418
1419
1420 IFX_INLINE boolean IfxDma_getAndClearChannelWrapSourceBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1421 {
1422 boolean result;
1423
1424 result = dma->CH[channelId].CHCSR.B.WRPS != 0;
1425
1426 if (result == 1)
1427 {
1428 dma->CH[channelId].CHCSR.B.CWRP = TRUE;
1429 }
1430
1431 return result;
1432 }
1433
1434
1435 IFX_INLINE uint32 IfxDma_getChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1436 {
1437 return dma->CH[channelId].DADR.U;
1438 }
1439
1440
1441 IFX_INLINE boolean IfxDma_getChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1442 {
1443 return dma->TSR[channelId].B.HLTACK != 0;
1444 }
1445
1446
1447 IFX_INLINE boolean IfxDma_getChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1448 {
1449 boolean result;
1450
1451 result = dma->CH[channelId].CHCSR.B.ICH;
1452
1453 return result;
1454 }
1455
1456
1457 IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1458 {
1459 return dma->CH[channelId].CHCSR.B.LXO != 0;
1460 }
1461
1462
1463 IFX_INLINE uint32 IfxDma_getChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1464 {
1465 return dma->CH[channelId].SADR.U;
1466 }
1467
1468
1469 IFX_INLINE boolean IfxDma_getChannelSuspendModeStatus(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1470 {
1471 return dma->SUSACR[channelId].B.SUSAC;
1472 }
1473
1474
1475 IFX_INLINE boolean IfxDma_getChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1476 {
1477 return dma->TSR[channelId].B.TRL != 0;
1478 }
1479
1480
1481 IFX_INLINE uint32 IfxDma_getChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1482 {
1483 return dma->CH[channelId].CHCSR.B.TCOUNT;
1484 }
1485
1486
1487 IFX_INLINE IfxDma_ChannelIncrementCircular IfxDma_getCircularRangeCode(uint16 range)
1488 {
1489 return (IfxDma_ChannelIncrementCircular)(31 - __clz((uint32)range));
1490 }
1491
1492
1493 IFX_INLINE boolean IfxDma_getDoubleBufferRead(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1494 {
1495 boolean result;
1496
1497 result = dma->CH[channelId].CHCSR.B.FROZEN != 0;
1498
1499 if (result == 1)
1500 {
1501 dma->CH[channelId].CHCSR.B.FROZEN = FALSE;
1502 }
1503
1504 return result;
1505 }
1506
1507
1508 IFX_INLINE boolean IfxDma_getDoubleBufferSelection(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1509 {
1510 return dma->CH[channelId].CHCSR.B.BUFFER != 0;
1511 }
1512
1513
1514 IFX_INLINE uint32 IfxDma_getErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
1515 {
1516 if (moveEngine == IfxDma_MoveEngine_1)
1517 {
1518 return dma->BLK1.ERRSR.U;
1519 }
1520 else
1521 {
1522 return dma->BLK0.ERRSR.U;
1523 }
1524 }
1525
1526
1527 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1528 {
1529 IFX_UNUSED_PARAMETER(dma);
1530 // only a single DMA available, therefore no check for the dma pointer required
1531 return &MODULE_SRC.DMA.DMA[0].CH[channelId];
1532 }
1533
1534
1535 IFX_INLINE uint32 IfxDma_getTimestamp(Ifx_DMA *dma)
1536 {
1537 return dma->TIME.U;
1538 }
1539
1540
1541 IFX_INLINE boolean IfxDma_isChannelReset(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1542 {
1543 return dma->TSR[channelId].B.RST == 0;
1544 }
1545
1546
1547 IFX_INLINE boolean IfxDma_isChannelTransactionEnabled(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1548 {
1549 return dma->TSR[channelId].B.HTRE != 0;
1550 }
1551
1552
1553 IFX_INLINE boolean IfxDma_isChannelTransactionPending(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1554 {
1555 return dma->TSR[channelId].B.CH != 0;
1556 }
1557
1558
1559 IFX_INLINE void IfxDma_keepDoubleBufferActive(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1560 {
1561 dma->CH[channelId].CHCSR.U = 0U << IFX_DMA_CH_CHCSR_FROZEN_OFF;
1562 }
1563
1564
1565 IFX_INLINE void IfxDma_resetChannel(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1566 {
1567 dma->TSR[channelId].B.RST = 1;
1568 }
1569
1570
1571 IFX_INLINE void IfxDma_setChannelBlockMode(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMove blockMode)
1572 {
1573 dma->CH[channelId].CHCFGR.B.BLKM = blockMode;
1574 }
1575
1576
1577 IFX_INLINE void IfxDma_setChannelContinuousMode(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1578 {
1579 dma->CH[channelId].CHCFGR.B.CHMODE = 1;
1580 }
1581
1582
1583 IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
1584 {
1585 dma->CH[channelId].DADR.U = (uint32)address;
1586 }
1587
1588
1589 IFX_INLINE void IfxDma_setChannelDestinationIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
1590 {
1591 Ifx_DMA_CH_ADICR adicr;
1592 adicr.U = dma->CH[channelId].ADICR.U;
1593 adicr.B.DMF = incStep;
1594 adicr.B.INCD = direction;
1595 adicr.B.CBLD = size;
1596 dma->CH[channelId].ADICR.U = adicr.U;
1597 }
1598
1599
1600 IFX_INLINE void IfxDma_setChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1601 {
1602 dma->TSR[channelId].B.HLTREQ = 1;
1603 }
1604
1605
1606 IFX_INLINE void IfxDma_setChannelInterruptServiceRequest(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1607 {
1608 dma->CH[channelId].CHCSR.B.SIT = 1;
1609 }
1610
1611
1612 IFX_INLINE void IfxDma_setChannelMoveSize(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
1613 {
1614 dma->CH[channelId].CHCFGR.B.CHDW = moveSize;
1615 }
1616
1617
1618 IFX_INLINE void IfxDma_setChannelShadow(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelShadow shadow)
1619 {
1620 dma->CH[channelId].ADICR.B.SHCT = shadow;
1621 }
1622
1623
1624 IFX_INLINE void IfxDma_setChannelSingleMode(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1625 {
1626 dma->CH[channelId].CHCFGR.B.CHMODE = 0;
1627 }
1628
1629
1630 IFX_INLINE void IfxDma_setChannelSingleTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1631 {
1632 dma->CH[channelId].CHCFGR.B.RROAT = 1;
1633 }
1634
1635
1636 IFX_INLINE void IfxDma_setChannelSingleTransfer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1637 {
1638 dma->CH[channelId].CHCFGR.B.RROAT = 0;
1639 }
1640
1641
1642 IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
1643 {
1644 dma->CH[channelId].SADR.U = (uint32)address;
1645 }
1646
1647
1648 IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
1649 {
1650 Ifx_DMA_CH_ADICR adicr;
1651 adicr.U = dma->CH[channelId].ADICR.U;
1652 adicr.B.SMF = incStep;
1653 adicr.B.INCS = direction;
1654 adicr.B.CBLS = size;
1655 dma->CH[channelId].ADICR.U = adicr.U;
1656 }
1657
1658
1659 IFX_INLINE void IfxDma_setChannelSuspendEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId, boolean enable)
1660 {
1661 dma->SUSENR[channelId].B.SUSEN = enable;
1662 }
1663
1664
1665 IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
1666 {
1667 dma->CH[channelId].CHCFGR.B.TREL = transferCount;
1668 }
1669
1670
1671 IFX_INLINE void IfxDma_setSleepMode(Ifx_DMA *dma, IfxDma_SleepMode mode)
1672 {
1673 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1674 IfxScuWdt_clearCpuEndinit(passwd);
1675 dma->CLC.B.EDIS = mode;
1676 IfxScuWdt_setCpuEndinit(passwd);
1677 }
1678
1679
1680 IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1681 {
1682 dma->CH[channelId].CHCSR.B.SCH = 1;
1683 }
1684
1685
1686 IFX_INLINE void IfxDma_switchDoubleBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1687 {
1688 dma->CH[channelId].CHCSR.B.SWB = 1;
1689 }
1690
1691
1692 IFX_INLINE void IfxDma_writeChannelShadowDisable(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1693 {
1694 dma->CH[channelId].ADICR.B.SHCT &= ~(3 << 2);
1695 }
1696
1697
1698 IFX_INLINE void IfxDma_writeChannelShadowEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1699 {
1700 dma->CH[channelId].ADICR.B.SHCT |= (1 << 2);
1701 dma->CH[channelId].ADICR.B.SHCT &= ~(1 << 3);
1702 }
1703
1704
1705 IFX_INLINE void IfxDma_setChannelHardwareResourcePartition(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_HardwareResourcePartition resourcePartition)
1706 {
1707 uint16 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPasswordInline();
1708 IfxScuWdt_clearSafetyEndinitInline(endinitSfty_pw);
1709 dma->HRR[channelId].B.HRP = resourcePartition;
1710 IfxScuWdt_setSafetyEndinitInline(endinitSfty_pw);
1711 }
1712
1713
1714 IFX_INLINE void IfxDma_setInterruptControlValue(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint8 value)
1715 {
1716 dma->CH[channelId].ADICR.B.INTCT = value;
1717 }
1718
1719
1720 IFX_INLINE void IfxDma_setCircularBufferDestinationLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
1721 {
1722 dma->CH[channelId].ADICR.B.CBLD = length;
1723 }
1724
1725
1726 IFX_INLINE void IfxDma_setCircularBufferSourceLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
1727 {
1728 dma->CH[channelId].ADICR.B.CBLS = length;
1729 }
1730
1731
1732 IFX_INLINE void IfxDma_enableSourceCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1733 {
1734 dma->CH[channelId].ADICR.B.SCBE = 0x1U;
1735 }
1736
1737
1738 IFX_INLINE void IfxDma_enableDestinationCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1739 {
1740 dma->CH[channelId].ADICR.B.DCBE = 0x1U;
1741 }
1742
1743
1744 IFX_INLINE uint32 IfxDma_getDataCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1745 {
1746 return dma->CH[channelId].RDCRCR.U;
1747 }
1748
1749
1750 IFX_INLINE uint32 IfxDma_getSourceAndDestinationCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1751 {
1752 return dma->CH[channelId].SDCRCR.U;
1753 }
1754
1755
1756 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_getErrPointer(Ifx_DMA *dma)
1757 {
1758 IFX_UNUSED_PARAMETER(dma);
1759 return &MODULE_SRC.DMA.DMA[0].ERR;
1760 }
1761
1762
1763 #endif /* IFXDMA_H */
IfxDma_ChannelBusPriority_high
high priority
Definition: IfxDma.h:95
IfxScuWdt_setSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:544
IfxDma_SleepMode_disable
disables sleep mode
Definition: IfxDma.h:275
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxScuWdt_getSafetyWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
SCUWDT Inline API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.h:506
IfxDma_ChannelPattern_1_mode3
Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2] of actual ...
Definition: IfxDma.h:203
IfxDma_MoveEngine
IfxDma_MoveEngine
DMA move engine definition.
Definition: IfxDma.h:263
IfxDma_ChannelShadow_accumulatedLinkedList
The DMA controller reads a DMA channel transaction control set and overwrites 6 X words in the corres...
Definition: IfxDma.h:248
IfxDma_BusMasterMode_user
Selected hardware resource performs Bus access in user mode.
Definition: IfxDma.h:85
IfxDma_clearChannelTransactionRequestLost
IFX_INLINE void IfxDma_clearChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear the channel transaction request lost flag status.
Definition: IfxDma.h:1268
IfxDma_ChannelMove_9
9 DMA move per DMA transfer
Definition: IfxDma.h:166
IfxDma_ChannelIncrementDirection
IfxDma_ChannelIncrementDirection
DMA incrementation direction definition Definition in Ifx_DMA.CH[64].ADICR.B.INCS.
Definition: IfxDma.h:124
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
IfxDma_ChannelOperationMode_continuous
channel stays enabled after transaction
Definition: IfxDma.h:188
IfxDma_setSleepMode
IFX_INLINE void IfxDma_setSleepMode(Ifx_DMA *dma, IfxDma_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxDma.h:1671
IfxDma_setChannelHardwareResourcePartition
IFX_INLINE void IfxDma_setChannelHardwareResourcePartition(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_HardwareResourcePartition resourcePartition)
Configure the hardware resource partition.
Definition: IfxDma.h:1705
IfxDma_getTimestamp
IFX_INLINE uint32 IfxDma_getTimestamp(Ifx_DMA *dma)
get the time stamp
Definition: IfxDma.h:1535
IfxDma_SleepMode
IfxDma_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_DMA.CLC.B.EDIS.
Definition: IfxDma.h:272
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:457
IfxDma_ChannelIncrementStep_2
increment by 2 width
Definition: IfxDma.h:136
IfxDma_ChannelMove
IfxDma_ChannelMove
DMA transfer definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.BLKM and Ifx_DMA.BLK1.ME.CHCR.B.BLKM.
Definition: IfxDma.h:157
IfxDma_setChannelSuspendEnable
IFX_INLINE void IfxDma_setChannelSuspendEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId, boolean enable)
Configure a DMA channel suspend enable.
Definition: IfxDma.h:1659
IfxDma_setChannelSourceAddress
IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address.
Definition: IfxDma.h:1642
IfxDma_setChannelBlockMode
IFX_INLINE void IfxDma_setChannelBlockMode(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMove blockMode)
Configure the move count for each DMA channel transfer.
Definition: IfxDma.h:1571
IfxDma_enableMoveEngineSourceError
IFX_INLINE void IfxDma_enableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine source error interrupt.
Definition: IfxDma.h:1362
IfxDma_ChannelIncrementCircular_16
circular buffer size is 16 byte
Definition: IfxDma.h:107
IfxDma_ChannelIncrementCircular_32
circular buffer size is 32 byte
Definition: IfxDma.h:108
IfxDma_ChannelMoveSize_16bit
1 DMA move is 16 bit wide
Definition: IfxDma.h:175
IfxDma_ChannelMoveSize_8bit
1 DMA move is 8 bit wide
Definition: IfxDma.h:174
IfxDma_getChannelDestinationAddress
IFX_INLINE uint32 IfxDma_getChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address.
Definition: IfxDma.h:1435
IfxDma_disableChannelTransactionLostError
IFX_INLINE void IfxDma_disableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable the generation of a channel transaction lost error interrupt.
Definition: IfxDma.h:1299
IfxDma_ChannelIncrementCircular_8
circular buffer size is 8 byte
Definition: IfxDma.h:106
IfxDma_ChannelIncrementCircular_256
circular buffer size is 256 byte
Definition: IfxDma.h:111
IfxDma_ChannelIncrementStep_128
increment by 128 width
Definition: IfxDma.h:142
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch
Automatic Hardware and Software switch. Shadow address used for double buffering. ...
Definition: IfxDma.h:246
IfxDma_isChannelTransactionPending
IFX_INLINE boolean IfxDma_isChannelTransactionPending(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (transaction pending)
Definition: IfxDma.h:1553
IfxDma_getChannelInterrupt
IFX_INLINE boolean IfxDma_getChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return a channel transfer interrupt flag.
Definition: IfxDma.h:1447
IfxDma_setChannelDestinationIncrementStep
IFX_INLINE void IfxDma_setChannelDestinationIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel destination pointer.
Definition: IfxDma.h:1589
IfxDma_ChannelIncrementCircular_512
circular buffer size is 512 byte
Definition: IfxDma.h:112
IfxDma_ChannelMove_8
8 DMA move per DMA transfer
Definition: IfxDma.h:162
IfxDma_ChannelInterruptControl_thresholdLimitMatch
interrupt when transfer count (TCOUNT) equals the threshold limit (IRDV)
Definition: IfxDma.h:150
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxDma_enableChannelTransaction
IFX_INLINE void IfxDma_enableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable a DMA channel hardware transaction request.
Definition: IfxDma.h:1337
IfxDma_clearErrorFlags
IFX_INLINE void IfxDma_clearErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine, uint32 mask)
Clear the DMA error status flags.
Definition: IfxDma.h:1274
IfxSrc.h
SRC basic functionality.
IfxDma_startChannelTransaction
IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Request a DMA channel transaction.
Definition: IfxDma.h:1680
IfxDma_switchDoubleBuffer
IFX_INLINE void IfxDma_switchDoubleBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Double buffer switch application.
Definition: IfxDma.h:1686
IfxDma_ChannelIncrementStep_16
increment by 16 width
Definition: IfxDma.h:139
IfxDma_ChannelIncrementCircular_128
circular buffer size is 128 byte
Definition: IfxDma.h:110
IfxDma_ChannelBusPriority_low
low priority
Definition: IfxDma.h:93
IfxCpu_Intrinsics.h
IfxDma_ChannelShadow
IfxDma_ChannelShadow
shadow definition definition Definition in Ifx_DMA.CH[64].ADICR.B.SHCT
Definition: IfxDma.h:236
IfxDma_writeChannelShadowDisable
IFX_INLINE void IfxDma_writeChannelShadowDisable(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to read only.
Definition: IfxDma.h:1692
IfxDma_enableChannelTransactionLostError
IFX_INLINE void IfxDma_enableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the generation of a channel transaction lost error interrupt.
Definition: IfxDma.h:1343
IfxDma_ChannelPriority
IfxDma_ChannelPriority
Channel Priority definition.
Definition: IfxDma.h:208
IfxDma_ChannelMoveSize_128bit
1 DMA move is 128 bit wide
Definition: IfxDma.h:178
IfxDma_enableMoveEngineDestinationError
IFX_INLINE void IfxDma_enableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine destination error interrupt.
Definition: IfxDma.h:1349
IfxDma_setChannelSourceIncrementStep
IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel source pointer.
Definition: IfxDma.h:1648
IfxDma_setChannelSingleMode
IFX_INLINE void IfxDma_setChannelSingleMode(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" After a transaction, the hardware request transa...
Definition: IfxDma.h:1624
IfxDma_BusMasterMode_supervisor
Selected hardware resource performs Bus access in supervisor mode.
Definition: IfxDma.h:86
IfxDma_getDoubleBufferSelection
IFX_INLINE boolean IfxDma_getDoubleBufferSelection(Ifx_DMA *dma, IfxDma_ChannelId channelId)
get Double buffer selection
Definition: IfxDma.h:1508
IfxDma_ChannelMove_3
3 DMA move per DMA transfer
Definition: IfxDma.h:164
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxDma_getAndClearChannelInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to...
Definition: IfxDma.h:1375
IfxDma_enableDestinationCircularBuffer
IFX_INLINE void IfxDma_enableDestinationCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the Destination Circular Buffer.
Definition: IfxDma.h:1738
IfxScuWdt.h
SCU basic functionality.
IfxDma_getAndClearChannelWrapDestinationBufferInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap destination buffer interrupt trigger flag...
Definition: IfxDma.h:1405
IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch
Automatic Hardware and Software switch. Shadow address used for double buffering. ...
Definition: IfxDma.h:244
IfxDma_ChannelRequestSource
IfxDma_ChannelRequestSource
DMA request selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PRSEL and Ifx_DMA.BLK1.ME.CHCR.B.PRSEL.
Definition: IfxDma.h:227
IfxDma_setChannelSingleTransaction
IFX_INLINE void IfxDma_setChannelSingleTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" One transfer request starts a complete DMA trans...
Definition: IfxDma.h:1630
IfxDma_ChannelShadow_none
shadow address register not used. Source and destination address register are written directly ...
Definition: IfxDma.h:238
IfxDma_isChannelReset
IFX_INLINE boolean IfxDma_isChannelReset(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (reset / not reset) This API needs to be used after the IfxDma_res...
Definition: IfxDma.h:1541
IfxDma_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel.
Definition: IfxDma.h:1527
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxDma_disableMoveEngineSourceError
IFX_INLINE void IfxDma_disableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine source error interrupt.
Definition: IfxDma.h:1318
IfxDma_setCircularBufferDestinationLength
IFX_INLINE void IfxDma_setCircularBufferDestinationLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
Sets the Circular Buffer Destination Length.
Definition: IfxDma.h:1720
IfxDma_BusMasterMode
IfxDma_BusMasterMode
Bus Master Mode definition Definition in Ifx_DMA.MODE[4].B.MODE.
Definition: IfxDma.h:83
IfxDma_setChannelShadow
IFX_INLINE void IfxDma_setChannelShadow(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelShadow shadow)
Configure a DMA channel shadow pointer.
Definition: IfxDma.h:1618
IfxDma_setChannelSingleTransfer
IFX_INLINE void IfxDma_setChannelSingleTransfer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transfer mode" A transfer request is required for each transfer...
Definition: IfxDma.h:1636
IfxDma_cfg.h
DMA on-chip implementation data.
IfxDma_ChannelRequestMode
IfxDma_ChannelRequestMode
DMA request mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.RROAT and Ifx_DMA.BLK1.ME.CHCR.B.RROAT.
Definition: IfxDma.h:218
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxDma_getChannelPatternDetectionOldValue
IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns whether the old value of pattern detection corresponding pattern comparison operation found a...
Definition: IfxDma.h:1457
IfxDma_ChannelMove_1
1 DMA move per DMA transfer
Definition: IfxDma.h:159
IfxDma_ChannelMoveSize_32bit
1 DMA move is 32 bit wide
Definition: IfxDma.h:176
IfxDma_ChannelShadow_srcDirectWrite
Shadow address used for source buffering. When writing to SADRz, the address is buffered in SHADRz an...
Definition: IfxDma.h:241
IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch
Software switch only. Shadow address used for double buffering.
Definition: IfxDma.h:243
IfxDma_HardwareResourcePartition_2
"Set of DMA channels are associated with hardware resource partition " + str(x)
Definition: IfxDma.h:257
IfxDma_ChannelRequestSource_peripheral
Transfer Request via Hardware Trigger.
Definition: IfxDma.h:229
IfxDma_ChannelShadow_safeLinkedList
The DMA controller reads a DMA channel transaction control set. The Linked List only proceeds with th...
Definition: IfxDma.h:249
IfxDma_MoveEngine_1
second move engine
Definition: IfxDma.h:266
IfxDma_ChannelShadow_conditionalLinkedList
Shadow address register (MExSHADR) and source and destination address CRC register (MExSDCRC) are use...
Definition: IfxDma.h:250
IfxDma_setChannelContinuousMode
IFX_INLINE void IfxDma_setChannelContinuousMode(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "continous transaction mode" After a transaction, the hardware request tra...
Definition: IfxDma.h:1577
IfxDma_ChannelIncrementStep_1
increment by 1 width
Definition: IfxDma.h:135
IfxDma_ChannelIncrementCircular_64
circular buffer size is 64 byte
Definition: IfxDma.h:109
IfxDma_ChannelShadow_dst
Shadow address register used for destination address buffering. When writing to DADRmx, the address is buffered in SHADRmx and transferred to DADRmx with the start of the next DMA transaction.
Definition: IfxDma.h:240
IfxDma_ChannelIncrementCircular_2048
circular buffer size is 2048 byte
Definition: IfxDma.h:114
IfxDma_ChannelPattern_0_mode1
Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2]...
Definition: IfxDma.h:197
IfxDma_ChannelInterruptControl
IfxDma_ChannelInterruptControl
Channel Transfer Interrupt generation mechanism. Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0)
Definition: IfxDma.h:148
IfxDma_HardwareResourcePartition_0
"Set of DMA channels are associated with hardware resource partition " + str(x)
Definition: IfxDma.h:255
IfxDma_setCircularBufferSourceLength
IFX_INLINE void IfxDma_setCircularBufferSourceLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
Sets the Circular Buffer Source Length.
Definition: IfxDma.h:1726
IfxDma_setChannelHalt
IFX_INLINE void IfxDma_setChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
setting channel halt request
Definition: IfxDma.h:1600
IfxDma_writeChannelShadowEnable
IFX_INLINE void IfxDma_writeChannelShadowEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to write-able.
Definition: IfxDma.h:1698
IfxDma_ChannelRequestMode_oneTransferPerRequest
a request initiates a single transfer
Definition: IfxDma.h:220
IfxDma_ChannelIncrementCircular_4
circular buffer size is 4 byte
Definition: IfxDma.h:105
IfxDma_getErrPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getErrPointer(Ifx_DMA *dma)
Returns the ERR pointer.
Definition: IfxDma.h:1756
IfxDma_ChannelPattern
IfxDma_ChannelPattern
Pattern detection selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PATSEL and Ifx_DMA.BLK1.ME.CHCR.B.PATSEL.
Definition: IfxDma.h:194
IfxDma_ChannelIncrementStep_4
increment by 4 width
Definition: IfxDma.h:137
IfxDma_ChannelInterruptControl_transferCountDecremented
interrupt when transfer count (TCOUNT) is decremented
Definition: IfxDma.h:151
IfxDma_ChannelBusPriority_medium
medium priority
Definition: IfxDma.h:94
IfxDma_ChannelBusPriority
IfxDma_ChannelBusPriority
Channel Bus Priority definition.
Definition: IfxDma.h:91
IfxDma_getSourceAndDestinationCRC
IFX_INLINE uint32 IfxDma_getSourceAndDestinationCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the Source and Destination CRC.
Definition: IfxDma.h:1750
IfxDma_enableSourceCircularBuffer
IFX_INLINE void IfxDma_enableSourceCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the Source Circular Buffer.
Definition: IfxDma.h:1732
IfxDma_getChannelTransactionRequestLost
IFX_INLINE boolean IfxDma_getChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Check the channel transaction request lost flag status.
Definition: IfxDma.h:1475
IfxDma_disableChannelTransaction
IFX_INLINE void IfxDma_disableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable a DMA channel hardware transaction request.
Definition: IfxDma.h:1293
IfxDma_getAndClearChannelWrapSourceBufferInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelWrapSourceBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap source buffer interrupt trigger flag.
Definition: IfxDma.h:1420
IfxDma_ChannelIncrementCircular_4096
circular buffer size is 4096 byte
Definition: IfxDma.h:115
IfxDma_ChannelIncrementCircular_1024
circular buffer size is 1024 byte
Definition: IfxDma.h:113
IfxDma_getDoubleBufferRead
IFX_INLINE boolean IfxDma_getDoubleBufferRead(Ifx_DMA *dma, IfxDma_ChannelId channelId)
get information on buffer being read by software and clear the notification flag
Definition: IfxDma.h:1493
IfxDma_ChannelOperationMode_single
channel disabled after transaction
Definition: IfxDma.h:187
IfxDma_ChannelPattern_0_mode2
Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT0[1] masked by PAT0[3]...
Definition: IfxDma.h:198
IfxDma_ChannelIncrementCircular_8192
circular buffer size is 8192 byte
Definition: IfxDma.h:116
IfxDma_MoveEngine_0
first move engine
Definition: IfxDma.h:265
IfxDma_getAndClearChannelPatternDetectionInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the pattern detection interrupt flag.
Definition: IfxDma.h:1390
IfxDma_enableChannelInterrupt
IFX_INLINE void IfxDma_enableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable channel interrupt trigger.
Definition: IfxDma.h:1331
IfxDma_ChannelMove_2
2 DMA move per DMA transfer
Definition: IfxDma.h:160
IfxDma_setChannelTransferCount
IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction.
Definition: IfxDma.h:1665
IfxDma_keepDoubleBufferActive
IFX_INLINE void IfxDma_keepDoubleBufferActive(Ifx_DMA *dma, IfxDma_ChannelId channelId)
keeps the double buffer active
Definition: IfxDma.h:1559
IfxDma_resetChannel
IFX_INLINE void IfxDma_resetChannel(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Reset the channel.
Definition: IfxDma.h:1565
IfxDma_ChannelMoveSize_256bit
1 DMA move is 256 bit wide
Definition: IfxDma.h:179
IfxDma_getErrorFlags
IFX_INLINE uint32 IfxDma_getErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Return the DMA error status flags.
Definition: IfxDma.h:1514
IfxDma_ChannelIncrementDirection_positive
pointer is incremented
Definition: IfxDma.h:127
IfxDma_HardwareResourcePartition
IfxDma_HardwareResourcePartition
Definition: IfxDma.h:253
IfxDma_ChannelMove_4
4 DMA move per DMA transfer
Definition: IfxDma.h:161
IfxDma_setInterruptControlValue
IFX_INLINE void IfxDma_setInterruptControlValue(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint8 value)
Sets the Interrupt control value.
Definition: IfxDma.h:1714
IfxDma_SleepMode_enable
enables sleep mode
Definition: IfxDma.h:274
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxDma_disableChannelInterrupt
IFX_INLINE void IfxDma_disableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable channel interrupt trigger.
Definition: IfxDma.h:1287
IfxDma_ChannelMove_16
16 DMA move per DMA transfer
Definition: IfxDma.h:163
IfxDma_clearChannelInterrupt
IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag.
Definition: IfxDma.h:1262
IfxDma_getCircularRangeCode
IFX_INLINE IfxDma_ChannelIncrementCircular IfxDma_getCircularRangeCode(uint16 range)
Converts DMA circular range to circular code.
Definition: IfxDma.h:1487
IfxDma_ChannelIncrementCircular
IfxDma_ChannelIncrementCircular
DMA circular buffer (wrap around) definition Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD.
Definition: IfxDma.h:101
IfxDma_ChannelIncrementCircular_32768
circular buffer size is 32768 byte
Definition: IfxDma.h:118
IfxDma_ChannelPriority_medium
medium priority
Definition: IfxDma.h:211
IfxScuCcu.h
SCU basic functionality.
IfxDma_setChannelDestinationAddress
IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address.
Definition: IfxDma.h:1583
IfxDma_clearChannelHalt
IFX_INLINE void IfxDma_clearChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear channel halt request and aknowledgement.
Definition: IfxDma.h:1256
IfxDma_isChannelTransactionEnabled
IFX_INLINE boolean IfxDma_isChannelTransactionEnabled(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the hardware transaction request status of a DMA channel.
Definition: IfxDma.h:1547
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxDma_ChannelPattern_0_disable
Pattern detect 0 disabled.
Definition: IfxDma.h:196
IfxDma_getChannelHalt
IFX_INLINE boolean IfxDma_getChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get channel halt aknowledgement.
Definition: IfxDma.h:1441
IfxDma_ChannelIncrementCircular_16384
circular buffer size is 16384 byte
Definition: IfxDma.h:117
IfxDma_setChannelMoveSize
IFX_INLINE void IfxDma_setChannelMoveSize(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
Configure a DMA channel move.
Definition: IfxDma.h:1612
IfxDma_getChannelSourceAddress
IFX_INLINE uint32 IfxDma_getChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address.
Definition: IfxDma.h:1463
IfxDma_ChannelPriority_high
high priority
Definition: IfxDma.h:212
IfxDma_ChannelIncrementStep_8
increment by 8 width
Definition: IfxDma.h:138
IfxDma_ChannelShadow_src
Shadow address register used for source address buffering. When writing to SADRmx, the address is buffered in SHADRmx and transferred to SADRmx with the start of the next DMA transaction.
Definition: IfxDma.h:239
IfxDma_ChannelIncrementDirection_negative
pointer is decremented
Definition: IfxDma.h:126
IfxDma_ChannelPattern_0_mode3
Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2] of actual ...
Definition: IfxDma.h:199
IfxDma_ChannelIncrementStep_32
increment by 32 width
Definition: IfxDma.h:140
IfxDma_ChannelRequestSource_daisyChain
Transfer Request via next (higher priority) channel.
Definition: IfxDma.h:230
IfxDma_HardwareResourcePartition_1
"Set of DMA channels are associated with hardware resource partition " + str(x)
Definition: IfxDma.h:256
IfxDma_ChannelIncrementStep_64
increment by 64 width
Definition: IfxDma.h:141
IfxDma_ChannelMoveSize
IfxDma_ChannelMoveSize
DMA move size definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHDW and Ifx_DMA.BLK1.ME.CHCR.B.CHDW.
Definition: IfxDma.h:172
IfxDma_getChannelTransferCount
IFX_INLINE uint32 IfxDma_getChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return remaining DMA transfer count.
Definition: IfxDma.h:1481
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxDma_ChannelPattern_1_mode2
Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT1[1] masked by PAT1[3]...
Definition: IfxDma.h:202
IfxDma_setChannelInterruptServiceRequest
IFX_INLINE void IfxDma_setChannelInterruptServiceRequest(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Setting of channel interrupt service request by software.
Definition: IfxDma.h:1606
IfxDma_ChannelOperationMode
IfxDma_ChannelOperationMode
DMA operation mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHMODE and Ifx_DMA.BLK1.ME.CHCR.B.CHMODE.
Definition: IfxDma.h:185
IfxDma_HardwareResourcePartition_3
"Set of DMA channels are associated with hardware resource partition " + str(x)
Definition: IfxDma.h:258
IfxDma_ChannelMove_5
5 DMA move per DMA transfer
Definition: IfxDma.h:165
IfxDma_ChannelPattern_1_disable
Pattern detect 1 disabled.
Definition: IfxDma.h:200
IfxDma_ChannelPattern_1_mode1
Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2]...
Definition: IfxDma.h:201
IfxDma_ChannelShadow_linkedList
The DMA controller reads a DMA channel transaction control set and overwrites 8 X words in the corres...
Definition: IfxDma.h:247
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxDma_getDataCRC
IFX_INLINE uint32 IfxDma_getDataCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the Data CRC.
Definition: IfxDma.h:1744
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxDma_getChannelSuspendModeStatus
IFX_INLINE boolean IfxDma_getChannelSuspendModeStatus(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the DMA channel suspend Mode status.
Definition: IfxDma.h:1469
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxDma_ChannelPriority_low
low priority
Definition: IfxDma.h:210
IfxDma_disableMoveEngineDestinationError
IFX_INLINE void IfxDma_disableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine destination error interrupt.
Definition: IfxDma.h:1305
IfxDma_ChannelIncrementCircular_2
circular buffer size is 2 byte
Definition: IfxDma.h:104
IfxDma_ChannelShadow_dstDirectWrite
Shadow address used for destination buffering. When writing to DADRz, the address is buffered in SHAD...
Definition: IfxDma.h:242
IfxDma_ChannelRequestMode_completeTransactionPerRequest
a request initiates a complete transaction
Definition: IfxDma.h:221
IfxDma_ChannelMoveSize_64bit
1 DMA move is 64 bit wide
Definition: IfxDma.h:177
IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch
Software switch only. Shadow address used for double buffering.
Definition: IfxDma.h:245
IfxDma_ChannelIncrementCircular_none
no circular buffer operation
Definition: IfxDma.h:103
IfxDma_ChannelIncrementStep
IfxDma_ChannelIncrementStep
DMA incrementation definition Definition in Ifx_DMA.CH[64].ADICR.B.SMF.
Definition: IfxDma.h:133


iLLD_TC26B: IfxDma_Dma.c Source File

  • Dma
  • Dma
IfxDma_Dma.c
Go to the documentation of this file.
1 /**
2 * \file IfxDma_Dma.c
3 * \brief DMA DMA details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxDma_Dma.h"
47
48 /******************************************************************************/
49 /*-----------------------Private Function Prototypes--------------------------*/
50 /******************************************************************************/
51
52 /** \brief local function to copy a transaction set into DMA channel SFRs or memory location (for linked lists)
53 * \param channel Specifies the pointer to DMA channel registers
54 * \param config pointer to the DMA default channel configuration structure
55 * \return None
56 */
57 IFX_STATIC void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH *channel, const IfxDma_Dma_ChannelConfig *config);
58
59 /******************************************************************************/
60 /*-------------------------Function Implementations---------------------------*/
61 /******************************************************************************/
62
63 IFX_STATIC void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH *channel, const IfxDma_Dma_ChannelConfig *config)
64 {
65 /* shadow address shall be 32-Byte Aligned */
66 {
67 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, ((config->shadowAddress & 0x1F) == 0U));
68 }
69
70 {
71 Ifx_DMA_CH_CHCFGR chcfgr;
72 chcfgr.U = 0;
73 chcfgr.B.TREL = config->transferCount;
74 chcfgr.B.BLKM = config->blockMode;
75 chcfgr.B.RROAT = config->requestMode;
76 chcfgr.B.CHMODE = config->operationMode;
77 chcfgr.B.CHDW = config->moveSize;
78 chcfgr.B.PRSEL = config->requestSource;
79 chcfgr.B.PATSEL = config->pattern;
80
81 channel->CHCFGR.U = chcfgr.U;
82 }
83
84 {
85 Ifx_DMA_CH_ADICR adicr;
86 adicr.U = 0;
87 adicr.B.SMF = config->sourceAddressIncrementStep;
88 adicr.B.INCS = config->sourceAddressIncrementDirection;
89 adicr.B.CBLS = config->sourceAddressCircularRange;
90 adicr.B.SCBE = config->sourceCircularBufferEnabled;
91 adicr.B.DMF = config->destinationAddressIncrementStep;
92 adicr.B.INCD = config->destinationAddressIncrementDirection;
93 adicr.B.CBLD = config->destinationAddressCircularRange;
94 adicr.B.DCBE = config->destinationCircularBufferEnabled;
95 adicr.B.SHCT = config->shadowControl;
96 adicr.B.STAMP = config->timestampEnabled;
97 adicr.B.WRPSE = config->wrapSourceInterruptEnabled;
98 adicr.B.WRPDE = config->wrapDestinationInterruptEnabled;
99 adicr.B.INTCT = (config->channelInterruptEnabled ? 2 : 0) | (config->channelInterruptControl ? 1 : 0);
100 adicr.B.IRDV = config->interruptRaiseThreshold;
101 adicr.B.ETRL = config->transactionRequestLostInterruptEnabled;
102 //enter also the circular buffer enable bits
103
104 channel->ADICR.U = adicr.U;
105 }
106 channel->SADR.U = config->sourceAddress;
107 channel->DADR.U = config->destinationAddress;
108 channel->SDCRCR.U = config->sourceDestinationAddressCrc;
109 channel->RDCRCR.U = config->readDataCrc;
110
111 // write not allowed if SHCT=1 or SHCT=2
112 if ((config->shadowControl != IfxDma_ChannelShadow_none) &&
113 (config->shadowControl != IfxDma_ChannelShadow_src) &&
114 (config->shadowControl != IfxDma_ChannelShadow_dst))
115 {
116 channel->SHADR.U = config->shadowAddress;
117 }
118 }
119
120
121 void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
122 {
123 dmaHandle->dma = dma;
124 }
125
126
127 void IfxDma_Dma_deInitChannel(IfxDma_Dma *dma, IfxDma_ChannelId channel)
128 {
129 if (IfxDma_isChannelTransactionEnabled(dma->dma, channel))
130 {
131 IfxDma_disableChannelTransaction(dma->dma, channel);
132 }
133
134 IfxDma_resetChannel(dma->dma, channel);
135
136 while (!(IfxDma_isChannelReset(dma->dma, channel)))
137 {}
138 }
139
140
141 void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
142 {
143 Ifx_DMA *dma = config->module->dma;
144
145 channel->dma = dma;
146 channel->channelId = config->channelId;
147 channel->channel = &dma->CH[config->channelId];
148
149 IfxDma_Dma_configureTransactionSet(channel->channel, config);
150
151 {
152 Ifx_DMA_TSR tsr;
153 tsr.U = 0;
154
155 if (config->hardwareRequestEnabled)
156 {
157 tsr.B.ECH = 1;
158 }
159 else
160 {
161 tsr.B.DCH = 1;
162 }
163
164 dma->TSR[channel->channelId].U = tsr.U;
165 }
166
167 if (config->channelInterruptPriority > 0)
168 {
169 volatile Ifx_SRC_SRCR *src = IfxDma_getSrcPointer(channel->dma, channel->channelId);
170 IfxSrc_init(src, config->channelInterruptTypeOfService, config->channelInterruptPriority);
171 IfxSrc_enable(src);
172 }
173 }
174
175
176 void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
177 {
178 const IfxDma_Dma_ChannelConfig defaultConfig = {
179 .module = NULL_PTR,
180 .channelId = IfxDma_ChannelId_0,
181 .sourceAddress = 0,
182 .destinationAddress = 0,
183 .shadowAddress = 0,
184 .readDataCrc = 0,
185 .sourceDestinationAddressCrc = 0,
186 .transferCount = 0,
187 .blockMode = IfxDma_ChannelMove_1,
188 .requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest,
189 .operationMode = IfxDma_ChannelOperationMode_single,
190 .moveSize = IfxDma_ChannelMoveSize_8bit,
191 .pattern = IfxDma_ChannelPattern_0_disable,
192 .requestSource = IfxDma_ChannelRequestSource_peripheral,
193 .busPriority = IfxDma_ChannelBusPriority_medium,
194 .hardwareRequestEnabled = FALSE,
195 .sourceAddressIncrementStep = IfxDma_ChannelIncrementStep_1,
196 .sourceAddressIncrementDirection = IfxDma_ChannelIncrementDirection_positive,
197 .sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_32768,
198 .destinationAddressIncrementStep = IfxDma_ChannelIncrementStep_1,
199 .destinationAddressIncrementDirection = IfxDma_ChannelIncrementDirection_positive,
200 .destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_32768,
201 .shadowControl = IfxDma_ChannelShadow_none,
202 .sourceCircularBufferEnabled = FALSE,
203 .destinationCircularBufferEnabled = FALSE,
204 .timestampEnabled = FALSE,
205 .wrapSourceInterruptEnabled = FALSE,
206 .wrapDestinationInterruptEnabled = FALSE,
207 .channelInterruptEnabled = FALSE,
208 .channelInterruptControl = IfxDma_ChannelInterruptControl_thresholdLimitMatch,
209 .interruptRaiseThreshold = 0,
210 .transactionRequestLostInterruptEnabled = FALSE,
211 .channelInterruptPriority = 0,
212 .channelInterruptTypeOfService = IfxSrc_Tos_cpu0
213 };
214
215 /* Default Configuration */
216 *config = defaultConfig;
217
218 /* take over module pointer */
219 config->module = dma;
220 }
221
222
223 void IfxDma_Dma_initLinkedListEntry(void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
224 {
225 IfxDma_Dma_configureTransactionSet((Ifx_DMA_CH *)ptrToAddress, config);
226 }
227
228
229 void IfxDma_Dma_initModule(IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
230 {
231 dma->dma = config->dma;
232 }
233
234
235 void IfxDma_Dma_initModuleConfig(IfxDma_Dma_Config *config, Ifx_DMA *dma)
236 {
237 config->dma = dma;
238 }
IfxDma_Dma_Config
Configuration data structure of the Module.
Definition: IfxDma_Dma.h:520
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxDma_Dma_ChannelConfig::moveSize
IfxDma_ChannelMoveSize moveSize
Read/write data size.
Definition: IfxDma_Dma.h:493
IfxDma_Dma_initModuleConfig
void IfxDma_Dma_initModuleConfig(IfxDma_Dma_Config *config, Ifx_DMA *dma)
initialize the DMA module configuration
Definition: IfxDma_Dma.c:235
IfxDma_Dma_ChannelConfig::sourceAddressCircularRange
IfxDma_ChannelIncrementCircular sourceAddressCircularRange
Determines which part of the source address remains unchanged and therby not updated after each move...
Definition: IfxDma_Dma.h:500
IfxDma_Dma_Channel::channelId
IfxDma_ChannelId channelId
Specifies the DMA channel.
Definition: IfxDma_Dma.h:474
IfxDma_Dma_ChannelConfig::readDataCrc
uint32 readDataCrc
Checksum for read data of the channel.
Definition: IfxDma_Dma.h:487
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxDma_Dma_ChannelConfig::sourceAddressIncrementStep
IfxDma_ChannelIncrementStep sourceAddressIncrementStep
Describes the address offset with which the source address should be modified after each move...
Definition: IfxDma_Dma.h:498
IfxDma_Dma_ChannelConfig::destinationAddressIncrementStep
IfxDma_ChannelIncrementStep destinationAddressIncrementStep
Describes the address offset with which the destination address should be modified after each move...
Definition: IfxDma_Dma.h:501
IfxDma_Dma_initChannelConfig
void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration
Definition: IfxDma_Dma.c:176
IfxDma_ChannelMoveSize_8bit
1 DMA move is 8 bit wide
Definition: IfxDma.h:174
IfxDma_Dma.h
DMA DMA details.
IfxDma_Dma_ChannelConfig::sourceAddress
uint32 sourceAddress
Source address for the DMA channel.
Definition: IfxDma_Dma.h:484
IfxDma_Dma_initModule
void IfxDma_Dma_initModule(IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
Initialize the DMA module.
Definition: IfxDma_Dma.c:229
IfxDma_Dma_ChannelConfig::blockMode
IfxDma_ChannelMove blockMode
Number of moves in a transfer.
Definition: IfxDma_Dma.h:490
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxDma_Dma_ChannelConfig::sourceCircularBufferEnabled
boolean sourceCircularBufferEnabled
Enables/Disables the source circular buffering.
Definition: IfxDma_Dma.h:505
IfxDma_Dma_ChannelConfig::timestampEnabled
boolean timestampEnabled
Enables/Disables the appendage of the time stamp after end of the last DMA move in a transaction...
Definition: IfxDma_Dma.h:507
IfxDma_ChannelInterruptControl_thresholdLimitMatch
interrupt when transfer count (TCOUNT) equals the threshold limit (IRDV)
Definition: IfxDma.h:150
IfxDma_Dma_ChannelConfig::destinationCircularBufferEnabled
boolean destinationCircularBufferEnabled
Enables/Disables the destination circular buffering.
Definition: IfxDma_Dma.h:506
IfxDma_Dma_ChannelConfig::interruptRaiseThreshold
uint8 interruptRaiseThreshold
The value of the transferCount at which the interrupt should be raised.
Definition: IfxDma_Dma.h:512
IfxDma_Dma_ChannelConfig::hardwareRequestEnabled
boolean hardwareRequestEnabled
Enabling channel transaction via hardware request.
Definition: IfxDma_Dma.h:497
IfxDma_Dma_ChannelConfig::wrapSourceInterruptEnabled
boolean wrapSourceInterruptEnabled
An interrupt should be triggered whenever source address is wrapped.
Definition: IfxDma_Dma.h:508
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxDma_Dma_deInitChannel
void IfxDma_Dma_deInitChannel(IfxDma_Dma *dma, IfxDma_ChannelId channel)
de-initialize the DMA channel
Definition: IfxDma_Dma.c:127
IfxDma_Dma_Channel::channel
Ifx_DMA_CH * channel
Specifies the pointer to DMA channel registers.
Definition: IfxDma_Dma.h:475
IfxDma_Dma_ChannelConfig::channelInterruptPriority
Ifx_Priority channelInterruptPriority
Priority of the channel interrupt trigger.
Definition: IfxDma_Dma.h:514
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxDma_Dma_initLinkedListEntry
void IfxDma_Dma_initLinkedListEntry(void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
linked list functionality within the DMA module
Definition: IfxDma_Dma.c:223
IfxDma_ChannelShadow_none
shadow address register not used. Source and destination address register are written directly ...
Definition: IfxDma.h:238
IfxDma_isChannelReset
IFX_INLINE boolean IfxDma_isChannelReset(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (reset / not reset) This API needs to be used after the IfxDma_res...
Definition: IfxDma.h:1541
IfxDma_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel.
Definition: IfxDma.h:1527
IfxDma_Dma_ChannelConfig::sourceAddressIncrementDirection
IfxDma_ChannelIncrementDirection sourceAddressIncrementDirection
Decides whether the source address offset after each move should be added or decremented from the exi...
Definition: IfxDma_Dma.h:499
IfxDma_ChannelMove_1
1 DMA move per DMA transfer
Definition: IfxDma.h:159
IfxDma_Dma_ChannelConfig::transferCount
uint16 transferCount
Number of transfers in a transaction.
Definition: IfxDma_Dma.h:489
IfxDma_ChannelRequestSource_peripheral
Transfer Request via Hardware Trigger.
Definition: IfxDma.h:229
IfxDma_Dma_ChannelConfig::pattern
IfxDma_ChannelPattern pattern
Pattern selection operation modes.
Definition: IfxDma_Dma.h:494
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxDma_Dma::dma
Ifx_DMA * dma
Specifies the pointer to the DMA registers.
Definition: IfxDma_Dma.h:462
IfxDma_ChannelIncrementStep_1
increment by 1 width
Definition: IfxDma.h:135
IfxDma_ChannelShadow_dst
Shadow address register used for destination address buffering. When writing to DADRmx, the address is buffered in SHADRmx and transferred to DADRmx with the start of the next DMA transaction.
Definition: IfxDma.h:240
IfxDma_Dma_configureTransactionSet
IFX_STATIC void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH *channel, const IfxDma_Dma_ChannelConfig *config)
local function to copy a transaction set into DMA channel SFRs or memory location (for linked lists) ...
Definition: IfxDma_Dma.c:63
IfxDma_ChannelRequestMode_oneTransferPerRequest
a request initiates a single transfer
Definition: IfxDma.h:220
IfxDma_Dma_createModuleHandle
void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it&#39;s en...
Definition: IfxDma_Dma.c:121
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxDma_ChannelId_0
Ifx_DMA Channel 0.
Definition: IfxDma_cfg.h:105
IfxDma_ChannelBusPriority_medium
medium priority
Definition: IfxDma.h:94
IfxDma_Dma_ChannelConfig::sourceDestinationAddressCrc
uint32 sourceDestinationAddressCrc
Checksum for source and destination address of channel.
Definition: IfxDma_Dma.h:488
IfxDma_Dma
DMA base address data structure (Module handle)
Definition: IfxDma_Dma.h:460
IfxDma_Dma_ChannelConfig::transactionRequestLostInterruptEnabled
boolean transactionRequestLostInterruptEnabled
Enables/Disables the channel transaction request lost interrupt.
Definition: IfxDma_Dma.h:513
IfxDma_disableChannelTransaction
IFX_INLINE void IfxDma_disableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable a DMA channel hardware transaction request.
Definition: IfxDma.h:1293
IfxDma_ChannelOperationMode_single
channel disabled after transaction
Definition: IfxDma.h:187
IfxDma_Dma_ChannelConfig::wrapDestinationInterruptEnabled
boolean wrapDestinationInterruptEnabled
An interrupt should be triggered whenever destination address is wrapped.
Definition: IfxDma_Dma.h:509
IfxDma_resetChannel
IFX_INLINE void IfxDma_resetChannel(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Reset the channel.
Definition: IfxDma.h:1565
IfxDma_Dma_ChannelConfig::operationMode
IfxDma_ChannelOperationMode operationMode
keep enable/disable the hardware channel request after a transaction
Definition: IfxDma_Dma.h:492
IfxDma_ChannelIncrementDirection_positive
pointer is incremented
Definition: IfxDma.h:127
IfxDma_Dma_ChannelConfig
Configuration data structure of the channel.
Definition: IfxDma_Dma.h:480
IfxDma_Dma_initChannel
void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel
Definition: IfxDma_Dma.c:141
IfxDma_Dma_ChannelConfig::shadowAddress
uint32 shadowAddress
Initial content of shadow address for the DMA channel.
Definition: IfxDma_Dma.h:486
IfxDma_ChannelIncrementCircular_32768
circular buffer size is 32768 byte
Definition: IfxDma.h:118
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxDma_isChannelTransactionEnabled
IFX_INLINE boolean IfxDma_isChannelTransactionEnabled(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the hardware transaction request status of a DMA channel.
Definition: IfxDma.h:1547
IfxDma_ChannelPattern_0_disable
Pattern detect 0 disabled.
Definition: IfxDma.h:196
IfxDma_Dma_ChannelConfig::shadowControl
IfxDma_ChannelShadow shadowControl
selects the shadow transfer mode
Definition: IfxDma_Dma.h:504
IfxDma_Dma_ChannelConfig::destinationAddress
uint32 destinationAddress
Destination address for the DMA channel.
Definition: IfxDma_Dma.h:485
IfxDma_ChannelShadow_src
Shadow address register used for source address buffering. When writing to SADRmx, the address is buffered in SHADRmx and transferred to SADRmx with the start of the next DMA transaction.
Definition: IfxDma.h:239
IfxDma_Dma_ChannelConfig::requestMode
IfxDma_ChannelRequestMode requestMode
A service request initiates a single transfer, or the complete transaction.
Definition: IfxDma_Dma.h:491
IfxDma_Dma_ChannelConfig::destinationAddressCircularRange
IfxDma_ChannelIncrementCircular destinationAddressCircularRange
Determines which part of the destination address remains unchanged and therby not updated after each ...
Definition: IfxDma_Dma.h:503
IfxDma_Dma_ChannelConfig::destinationAddressIncrementDirection
IfxDma_ChannelIncrementDirection destinationAddressIncrementDirection
Decides whether the destination address offset after each move should be added or decremented from th...
Definition: IfxDma_Dma.h:502
IfxDma_Dma_ChannelConfig::requestSource
IfxDma_ChannelRequestSource requestSource
Request of channel transfer through hardware or daisy chain. channel transfer complete interrupt of p...
Definition: IfxDma_Dma.h:495
IfxDma_Dma_ChannelConfig::channelInterruptEnabled
boolean channelInterruptEnabled
The channel transfer interrupt should be triggered. See also channelInterruptControl.
Definition: IfxDma_Dma.h:510
IfxDma_Dma_Channel
Channel handle.
Definition: IfxDma_Dma.h:471
IfxDma_Dma_ChannelConfig::module
IfxDma_Dma * module
Specifies pointer to the IfxDma_Dma module handle.
Definition: IfxDma_Dma.h:482
IfxDma_Dma_ChannelConfig::channelInterruptControl
IfxDma_ChannelInterruptControl channelInterruptControl
The channel transfer interrupt can either be triggered depending on the interruptRaiseThreshold, or each time the transaction count is decremented.
Definition: IfxDma_Dma.h:511
IfxDma_Dma_ChannelConfig::channelInterruptTypeOfService
IfxSrc_Tos channelInterruptTypeOfService
Interrupt service provider.
Definition: IfxDma_Dma.h:515
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271


iLLD_TC26B: IfxDma_Dma.h Source File

  • Dma
  • Dma
IfxDma_Dma.h
Go to the documentation of this file.
1 /**
2 * \file IfxDma_Dma.h
3 * \brief DMA DMA details
4 * \ingroup IfxLld_Dma
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
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40 *
41 * \defgroup IfxLld_Dma_Dma_Usage How to use the DMA Interface driver?
42 * \ingroup IfxLld_Dma
43 *
44 * The DMA interface driver provides a default configuration for data moves without intervention of the CPU or other on chip devices.
45 *
46 * In the following sections it will be described, how to integrate the driver into the application framework for different use cases.
47 *
48 * \section IfxLld_Dma_Dma_Preparation Preparation
49 * \subsection IfxLld_Dma_Dma_Include Include Files
50 *
51 * Include following header file into your C code:
52 *
53 * \code
54 * #include <Dma/Dma/IfxDma_Dma.h>
55 * #include <Vadc/Adc/IfxVadc_Adc.h>
56 *
57 * \endcode
58 *
59 *
60 * \subsection IfxLld_Dma_Dma_Module Module initialisation
61 *
62 * Declare the dma handle as a global variable:
63 *
64 * \code
65 * // DMA handle
66 * IfxDma_Dma dma;
67 * \endcode
68 *
69 * Initialize the DMA with following code:
70 * \code
71 * // create module config
72 * IfxDma_Dma_Config dmaConfig;
73 * IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
74 *
75 * // initialize module
76 * // IfxDma_Dma dma; // declared globally
77 * IfxDma_Dma_initModule(&dma, &dmaConfig);
78 * \endcode
79 *
80 * This only has to be done once in the application.
81 *
82 * The "IfxDma_Dma dma" handle should either be declared as a global variable (as shown in this example),
83 * or it can be created locally if desired:
84 *
85 * \code
86 * IfxDma_Dma dma;
87 * IfxDma_Dma_createModuleHandle(&dma, &MODULE_DMA);
88 * \endcode
89 *
90 * \subsection IfxLld_Dma_Dma_Simple Memory-to-Memory Transfers
91 *
92 * A large amount of data should be copied between SRI based memories, e.g. from Flash into the DSPR
93 * of the current CPU. It's recommended to use 256 bit moves for this purpose for best performance.
94 *
95 * This requires, that source and target locations are 256 bit (32 byte) aligned. With the GCC compiler
96 * this can be achieved by adding __attribute__ ((aligned(64))) to the arrays:
97 *
98 * \code
99 * #define MEMORY_TRANSFER_NUM_WORDS 1024
100 * uint32 __attribute__ ((aligned(64))) memoryDestination[MEMORY_TRANSFER_NUM_WORDS];
101 * \endcode
102 *
103 * Channel configuration and handling for the data move:
104 * \code
105 * // construct the channel configuration
106 * IfxDma_Dma_ChannelConfig chnCfg;
107 * IfxDma_Dma_initChannelConfig(&chnCfg, &dma);
108 *
109 * // select DMA channel which should be used
110 * chnCfg.channelId = IfxDma_ChannelId_0;
111 *
112 * // source and destination address
113 * chnCfg.sourceAddress = (uint32)0x80000000; // somewhere in flash section, here: start of PFlash (only for demo)
114 * chnCfg.destinationAddress = (uint32)memoryDestination;
115 *
116 * // move size, transfer count and request/operation mode
117 * chnCfg.moveSize = IfxDma_ChannelMoveSize_256bit;
118 * chnCfg.transferCount = (4 * MEMORY_TRANSFER_NUM_WORDS) / 32; // e.g. 1024 words require 128 * 256 bit moves
119 * chnCfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
120 * chnCfg.operationMode = IfxDma_ChannelOperationMode_continuous;
121 *
122 * // transfer configuration into DMA channel registers
123 * IfxDma_Dma_Channel chn;
124 * IfxDma_Dma_initChannel(&chn, &chnCfg);
125 *
126 * // start transfer and wait until it's finished
127 * IfxDma_Dma_startChannelTransaction(&chn);
128 * while( IfxDma_Dma_isChannelTransactionPending(&chn) == TRUE );
129 * \endcode
130 *
131 *
132 * \subsection IfxLld_Dma_Dma_Peripheral Peripheral-to-Memory Transfers
133 *
134 * The content of 8 ADC result registers should be transfered to a memory location in DSPR whenever
135 * an VADC autoscan has been finished. After the DMA transaction, an interrupt should be triggered
136 * so that the CPU can process the conversion results.
137 *
138 * We use following global variables:
139 * \code
140 * // buffer for autoscanned conversion result values
141 * #define NUM_SCANNED_CHANNELS 8
142 * static uint16 vadcResultBuffer[NUM_SCANNED_CHANNELS];
143 *
144 * // VADC handle
145 * IfxVadc_Adc vadc;
146 *
147 * // VADC group handle
148 * static IfxVadc_Adc_Group adcGroup;
149 *
150 * // DMA channel handle
151 * static IfxDma_Dma_Channel dmaChn;
152 * \endcode
153 *
154 *
155 * Create an interrupt handler for the DMA channel request:
156 * \code
157 * // priorities are normally defined in Ifx_IntPrioDef.h
158 * #define IFX_INTPRIO_DMA_CH0 1
159 *
160 * IFX_INTERRUPT(dmaCh0ISR, 0, IFX_INTPRIO_DMA_CH0)
161 * {
162 * // ...
163 * // do something with the conversion results in vadcResultBuffer[]
164 * // ...
165 *
166 * // re-init DMA channel destination address
167 * IfxDma_Dma_setChannelDestinationAddress(&dmaChn, ADDR_CPU_DSPR(IfxCpu_getCoreId(), &vadcResultBuffer[0]));
168 *
169 * // start new transaction
170 * IfxDma_Dma_setChannelTransferCount(&dmaChn, NUM_SCANNED_CHANNELS);
171 *
172 * {
173 * uint32 channels = 0xff; // all 8 channels
174 * uint32 mask = 0xff; // modify the selection of all channels
175 *
176 * // configure autoscan (single shot, not continuous scan)
177 * IfxVadc_Adc_setScan(&adcGroup, channels, mask);
178 * }
179 * }
180 * \endcode
181 *
182 * ADC configuration:
183 * \code
184 * // create configuration
185 * IfxVadc_Adc_Config adcConfig;
186 * IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
187 *
188 * adcConfig.startupCalibration = TRUE;
189 *
190 * // initialize module
191 * // IfxVadc_Adc vadc; // declared globally
192 * IfxVadc_Adc_initModule(&vadc, &adcConfig);
193 *
194 * // create group config
195 * IfxVadc_Adc_GroupConfig adcGroupConfig;
196 * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
197 *
198 * // initialize the group
199 * //IfxVadc_Adc_Group adcGroup; // defined globally
200 * adcGroupConfig.groupId = IfxVadc_GroupId_0;
201 * adcGroupConfig.master = adcGroupConfig.groupId;
202 *
203 * // enable all arbiter request sources
204 * adcGroupConfig.arbiter.requestSlotQueueEnabled = TRUE; // enable Queue mode
205 * adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE; // enable Scan mode
206 * adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE; // enable Background scan
207 *
208 * // enable all gates in "always" mode (no edge detection)
209 * adcGroupConfig.queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
210 * adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
211 * adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
212 *
213 * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
214 *
215 * {
216 * // create channel config
217 * IfxVadc_Adc_ChannelConfig adcChannelConfig;
218 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig, &adcGroup);
219 *
220 * // initialize the channels
221 * for(int i=0; i<NUM_SCANNED_CHANNELS; ++i) {
222 * adcChannelConfig.channelId = (IfxVadc_ChannelId)i;
223 * adcChannelConfig.resultRegister = IfxVadc_ChannelResult_0;
224 *
225 * // initialize the channel
226 * IfxVadc_Adc_Channel adcChannel;
227 * IfxVadc_Adc_initChannel(&adcChannel, &adcChannelConfig);
228 *
229 * IfxVadc_Adc_configureWaitForReadMode(&adcChannel, TRUE);
230 * }
231 * }
232 * adcGroup.group->RCR[0].B.SRGEN = 1; // interrupt when new result is available
233 *
234 * // send service request to DMA Channel 0
235 * IfxSrc_init((Ifx_SRC_SRCR*)&MODULE_SRC.VADC.G[0], IfxSrc_Tos_dma, 0);
236 * IfxSrc_enable((Ifx_SRC_SRCR*)&MODULE_SRC.VADC.G[0]);
237 * \endcode
238 *
239 * And finally the DMA channel configuration
240 * \code
241 * // create module config
242 * IfxDma_Dma_Config dmaConfig;
243 * IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
244 *
245 * // initialize module
246 * IfxDma_Dma dma;
247 * IfxDma_Dma_initModule(&dma, &dmaConfig);
248 *
249 * {
250 * // construct the channel configuration
251 * IfxDma_Dma_ChannelConfig chnCfg;
252 * IfxDma_Dma_initChannelConfig(&chnCfg, &dma);
253 *
254 * // select DMA channel which should be used
255 * chnCfg.channelId = IfxDma_ChannelId_0;
256 * chnCfg.hardwareRequestEnabled = TRUE; // will be triggered from VADC service request
257 *
258 * // interrupt configuration
259 * chnCfg.channelInterruptEnabled = TRUE; // service request from DMA after all words have been transfered
260 * chnCfg.channelInterruptPriority = IFX_INTPRIO_DMA_CH0;
261 * chnCfg.channelInterruptTypeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
262 *
263 * // source and destination address
264 * chnCfg.sourceAddress = (uint32)&adcGroup.group->RES[0]; // first result register
265 * chnCfg.sourceCircularBufferEnabled = TRUE;
266 * chnCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_1; // keep this address
267 *
268 * chnCfg.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &vadcResultBuffer[0]); // move into result buffer
269 * chnCfg.destinationAddressIncrementStep = IfxDma_ChannelIncrementStep_1; // increment once (=2 bytes) with each write
270 *
271 * // move size, transfer count and request/operation mode
272 * chnCfg.moveSize = IfxDma_ChannelMoveSize_16bit;
273 * chnCfg.transferCount = NUM_SCANNED_CHANNELS; // for the scanned channels
274 * chnCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
275 * chnCfg.operationMode = IfxDma_ChannelOperationMode_continuous; // hw request enable remains set after transaction
276 *
277 *
278 * // transfer configuration into DMA channel registers
279 * // IfxDma_Dma_Channel dmaChn; // declared globally
280 * IfxDma_Dma_initChannel(&dmaChn, &chnCfg);
281 *
282 * // configure IRQ handler which will be called after all result registers have been transfered
283 * IfxCpu_Irq_installInterruptHandler(&dmaCh0ISR, IFX_INTPRIO_DMA_CH0);
284 *
285 * // enable CPU interrupts
286 * IfxCpu_enableInterrupts();
287 * }
288 * \endcode
289 *
290 * In order to start the initial channel conversions, use:
291 * \code
292 * {
293 * uint32 channels = 0xff; // all 8 channels
294 * uint32 mask = 0xff; // modify the selection of all channels
295 *
296 * // configure and start autoscan (single shot, not continuous mode)
297 * IfxVadc_Adc_setScan(&adcGroup, channels, mask);
298 * }
299 * \endcode
300 *
301 * DMA will transfer the results to DSPR during the autoscan (whenever a new result is availale), and
302 * invoke the dmaCh0ISR function once all channels have been converted.
303 *
304 * The ISR will re-configure the DMA channel and re-start the autoscan.
305 *
306 *
307 * \subsection IfxLld_Dma_Dma_LinkedList Linked Lists
308 *
309 * Linked lists allow to initiate multiple DMA transactions from independent transaction sets which are
310 * typically stored in a DSPR memory location, and fetched and executed from the DMA channel without
311 * further CPU interaction.
312 *
313 * Following example demonstrates, how 5 different transactions can be initiated from a single request.
314 * We copy the data of 5 CAN message objects to a DSPR location.
315 *
316 * Includes and global variables:
317 * \code
318 * #include <Dma/Dma/IfxDma_Dma.h>
319 * #include <Scu/Std/IfxScuWdt.h>
320 * #include <IfxCan_reg.h>
321 *
322 * // DMA channel handle
323 * IfxDma_Dma_Channel chn;
324 *
325 * // Linked List storage
326 * // IMPORTANT: it has to be aligned to an 256bit address, otherwise DMA can't read it
327 * #define NUM_LINKED_LIST_ITEMS 5
328 * IFX_ALIGN(256) Ifx_DMA_CH linkedList[NUM_LINKED_LIST_ITEMS] ;
329 *
330 * // transfer these values to various CAN_MODATA[LH] registers via linked lists
331 * #define NUM_TRANSFERED_WORDS 2
332 * uint32 sourceBuffer[NUM_LINKED_LIST_ITEMS][NUM_TRANSFERED_WORDS];
333 *
334 * const uint32 destinationAddresses[NUM_LINKED_LIST_ITEMS] = {
335 * (uint32)&CAN_MODATAL0,
336 * (uint32)&CAN_MODATAL1,
337 * (uint32)&CAN_MODATAL2,
338 * (uint32)&CAN_MODATAL3,
339 * (uint32)&CAN_MODATAL4,
340 * };
341 * \endcode
342 *
343 * Following code to prepare CAN for this demo:
344 * \code
345 * // enable CAN (no Ifx LLD available yet)
346 * {
347 * uint32 passwd = IfxScuWdt_getCpuWatchdogPassword();
348 * IfxScuWdt_clearCpuEndinit(passwd);
349 *
350 * CAN_CLC.U = 0x0100;
351 * if( CAN_CLC.U ); // synch access
352 *
353 * // select f_clc as kernel clock
354 * CAN_MCR.B.CLKSEL = 1;
355 *
356 * // configure fractional divider
357 * CAN_FDR.U = 0x43ff;
358 *
359 * // wait until RAM has been initialized
360 * while( CAN_PANCTR.B.BUSY );
361 *
362 * IfxScuWdt_setCpuEndinit(passwd);
363 * }
364 * \endcode
365 *
366 *
367 * Build a linked list
368 * \code
369 * // create module config
370 * IfxDma_Dma_Config dmaConfig;
371 * IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
372 *
373 * // initialize module
374 * IfxDma_Dma dma;
375 * IfxDma_Dma_initModule(&dma, &dmaConfig);
376 *
377 * // initial channel configuration
378 * IfxDma_Dma_ChannelConfig cfg;
379 * IfxDma_Dma_initChannelConfig(&cfg, &dma);
380 *
381 * // following settings are used by all transactions
382 * cfg.transferCount = NUM_TRANSFERED_WORDS;
383 * cfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
384 * cfg.moveSize = IfxDma_ChannelMoveSize_32bit;
385 * cfg.shadowControl = IfxDma_ChannelShadow_linkedList;
386 *
387 * // generate linked list items
388 * for(int i=0; i<NUM_LINKED_LIST_ITEMS; ++i) {
389 * cfg.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i]);
390 * cfg.destinationAddress = destinationAddresses[i];
391 *
392 * // address to next transaction set
393 * cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)&linkedList[(i + 1) % NUM_LINKED_LIST_ITEMS]);
394 *
395 * // transfer first transaction set into DMA channel
396 * if( i == 0 ) {
397 * IfxDma_Dma_initChannel(&chn, &cfg);
398 * }
399 *
400 * // transfer into linked list storage
401 * IfxDma_Dma_initLinkedListEntry((void *)&linkedList[i], &cfg);
402 *
403 * if( i == 0 ) {
404 * // - trigger channel interrupt once the first transaction set has been loaded (again) into DMA channel
405 * linkedList[i].CHCSR.B.SIT = 1;
406 * } else {
407 * // - activate SCH (transaction request) for each entry, except for the first one (linked list terminated here)
408 * linkedList[i].CHCSR.B.SCH = 1;
409 * }
410 * }
411 * \endcode
412 *
413 * The transfer can be started via software with:
414 * \code
415 * // clear service request flag
416 * (IfxDma_Dma_getSrcPointer(&chn))->B.CLRR = 1;
417 *
418 * // start linked list transaction
419 * IfxDma_Dma_startChannelTransaction(&chn);
420 *
421 * // wait for service request which is triggered at the end of linked list transfers
422 * while( !(IfxDma_Dma_getSrcPointer(&chn))->B.SRR );
423 * \endcode
424 *
425 * In order to synchronize with the end of linked list operations, it's recommended to poll the service request flag (triggered via linkedList[NUM_LINKED_LIST_ITEMS-1].CHCSR.B.SIT after the last word has been transfered), and not the transaction count as shown before, because a linked list will initiate multiple transactions.
426 *
427 * \defgroup IfxLld_Dma_Dma DMA
428 * \ingroup IfxLld_Dma
429 * \defgroup IfxLld_Dma_Dma_Data_Structures Data Structures
430 * \ingroup IfxLld_Dma_Dma
431 * \defgroup IfxLld_Dma_Dma_Module_Initialize Module Initialization
432 * \ingroup IfxLld_Dma_Dma
433 * \defgroup IfxLld_Dma_Dma_Channel_Initialize Channel Initialization
434 * \ingroup IfxLld_Dma_Dma
435 * \defgroup IfxLld_Dma_Dma_Linked_List Linked Lists
436 * \ingroup IfxLld_Dma_Dma
437 * \defgroup IfxLld_Dma_Dma_Channel_Transaction_Initiate Channel Transactions
438 * \ingroup IfxLld_Dma_Dma
439 */
440
441 #ifndef IFXDMA_DMA_H
442 #define IFXDMA_DMA_H 1
443
444 /******************************************************************************/
445 /*----------------------------------Includes----------------------------------*/
446 /******************************************************************************/
447
448 #include "_Impl/IfxDma_cfg.h"
449 #include "Dma/Std/IfxDma.h"
450 #include "Cpu/Std/IfxCpu.h"
451
452 /******************************************************************************/
453 /*-----------------------------Data Structures--------------------------------*/
454 /******************************************************************************/
455
456 /** \addtogroup IfxLld_Dma_Dma_Data_Structures
457 * \{ */
458 /** \brief DMA base address data structure (Module handle)
459 */
460 typedef struct
461 {
462 Ifx_DMA *dma; /**< \brief Specifies the pointer to the DMA registers */
463 } IfxDma_Dma;
464
465 /** \} */
466
467 /** \addtogroup IfxLld_Dma_Dma_Data_Structures
468 * \{ */
469 /** \brief Channel handle
470 */
471 typedef struct
472 {
473 Ifx_DMA *dma; /**< \brief Specifies the pointer to the DMA registers */
474 IfxDma_ChannelId channelId; /**< \brief Specifies the DMA channel */
475 Ifx_DMA_CH *channel; /**< \brief Specifies the pointer to DMA channel registers */
476 } IfxDma_Dma_Channel;
477
478 /** \brief Configuration data structure of the channel
479 */
480 typedef struct
481 {
482 IfxDma_Dma *module; /**< \brief Specifies pointer to the IfxDma_Dma module handle */
483 IfxDma_ChannelId channelId; /**< \brief Specifies the channel being used */
484 uint32 sourceAddress; /**< \brief Source address for the DMA channel */
485 uint32 destinationAddress; /**< \brief Destination address for the DMA channel */
486 uint32 shadowAddress; /**< \brief Initial content of shadow address for the DMA channel */
487 uint32 readDataCrc; /**< \brief Checksum for read data of the channel */
488 uint32 sourceDestinationAddressCrc; /**< \brief Checksum for source and destination address of channel */
489 uint16 transferCount; /**< \brief Number of transfers in a transaction */
490 IfxDma_ChannelMove blockMode; /**< \brief Number of moves in a transfer */
491 IfxDma_ChannelRequestMode requestMode; /**< \brief A service request initiates a single transfer, or the complete transaction */
492 IfxDma_ChannelOperationMode operationMode; /**< \brief keep enable/disable the hardware channel request after a transaction */
493 IfxDma_ChannelMoveSize moveSize; /**< \brief Read/write data size */
494 IfxDma_ChannelPattern pattern; /**< \brief Pattern selection operation modes */
495 IfxDma_ChannelRequestSource requestSource; /**< \brief Request of channel transfer through hardware or daisy chain. channel transfer complete interrupt of previous channel will trigger the next channel request */
496 IfxDma_ChannelBusPriority busPriority; /**< \brief Bus priority selection */
497 boolean hardwareRequestEnabled; /**< \brief Enabling channel transaction via hardware request */
498 IfxDma_ChannelIncrementStep sourceAddressIncrementStep; /**< \brief Describes the address offset with which the source address should be modified after each move */
499 IfxDma_ChannelIncrementDirection sourceAddressIncrementDirection; /**< \brief Decides whether the source address offset after each move should be added or decremented from the exisiting address */
500 IfxDma_ChannelIncrementCircular sourceAddressCircularRange; /**< \brief Determines which part of the source address remains unchanged and therby not updated after each move */
501 IfxDma_ChannelIncrementStep destinationAddressIncrementStep; /**< \brief Describes the address offset with which the destination address should be modified after each move */
502 IfxDma_ChannelIncrementDirection destinationAddressIncrementDirection; /**< \brief Decides whether the destination address offset after each move should be added or decremented from the exisiting address */
503 IfxDma_ChannelIncrementCircular destinationAddressCircularRange; /**< \brief Determines which part of the destination address remains unchanged and therby not updated after each move */
504 IfxDma_ChannelShadow shadowControl; /**< \brief selects the shadow transfer mode */
505 boolean sourceCircularBufferEnabled; /**< \brief Enables/Disables the source circular buffering */
506 boolean destinationCircularBufferEnabled; /**< \brief Enables/Disables the destination circular buffering */
507 boolean timestampEnabled; /**< \brief Enables/Disables the appendage of the time stamp after end of the last DMA move in a transaction */
508 boolean wrapSourceInterruptEnabled; /**< \brief An interrupt should be triggered whenever source address is wrapped */
509 boolean wrapDestinationInterruptEnabled; /**< \brief An interrupt should be triggered whenever destination address is wrapped */
510 boolean channelInterruptEnabled; /**< \brief The channel transfer interrupt should be triggered. See also channelInterruptControl */
511 IfxDma_ChannelInterruptControl channelInterruptControl; /**< \brief The channel transfer interrupt can either be triggered depending on the interruptRaiseThreshold, or each time the transaction count is decremented */
512 uint8 interruptRaiseThreshold; /**< \brief The value of the transferCount at which the interrupt should be raised */
513 boolean transactionRequestLostInterruptEnabled; /**< \brief Enables/Disables the channel transaction request lost interrupt */
514 Ifx_Priority channelInterruptPriority; /**< \brief Priority of the channel interrupt trigger */
515 IfxSrc_Tos channelInterruptTypeOfService; /**< \brief Interrupt service provider */
516 } IfxDma_Dma_ChannelConfig;
517
518 /** \brief Configuration data structure of the Module
519 */
520 typedef struct
521 {
522 Ifx_DMA *dma; /**< \brief Specifies the pointer to the DMA registers */
523 } IfxDma_Dma_Config;
524
525 /** \} */
526
527 /** \addtogroup IfxLld_Dma_Dma_Module_Initialize
528 * \{ */
529
530 /******************************************************************************/
531 /*-------------------------Global Function Prototypes-------------------------*/
532 /******************************************************************************/
533
534 /** \brief initializes a DMA module handle based on the current configuration.
535 * Can be used in code where it's ensure that the DMA module is already initialized, and a DMA handle isn't globally available.
536 * \param dmaHandle pointer to the DMA module handle
537 * \param dma pointer to the DMA registers
538 * \return None
539 *
540 * \code
541 * IfxDma_Dma dma;
542 * IfxDma_Dma_createModuleHandle(&dma, &MODULE_DMA);
543 * \endcode
544 *
545 */
546 IFX_EXTERN void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma);
547
548 /** \brief de-initialize the DMA channel
549 * \param dma pointer to the DMA module handle
550 * \param channel the DMA channel ID
551 * \return None
552 */
553 IFX_EXTERN void IfxDma_Dma_deInitChannel(IfxDma_Dma *dma, IfxDma_ChannelId channel);
554
555 /** \brief Initialize the DMA module
556 * \param dma pointer to the DMA module handle
557 * \param config Pointer to configuration structure of the DMA module
558 * \return None
559 *
560 * See \ref IfxLld_Dma_Dma_Simple
561 *
562 */
563 IFX_EXTERN void IfxDma_Dma_initModule(IfxDma_Dma *dma, const IfxDma_Dma_Config *config);
564
565 /** \brief initialize the DMA module configuration
566 * \param config Pointer to configuration structure of the DMA module
567 * \param dma pointer to the DMA registers
568 * \return None
569 *
570 * See \ref IfxLld_Dma_Dma_Simple
571 *
572 */
573 IFX_EXTERN void IfxDma_Dma_initModuleConfig(IfxDma_Dma_Config *config, Ifx_DMA *dma);
574
575 /** \} */
576
577 /** \addtogroup IfxLld_Dma_Dma_Channel_Initialize
578 * \{ */
579
580 /******************************************************************************/
581 /*-------------------------Global Function Prototypes-------------------------*/
582 /******************************************************************************/
583
584 /** \brief initialize the DMA channel
585 * \param channel pointer to the DMA base address and channel ID
586 * \param config pointer to the DMA default channel configuration structure
587 * \return None
588 *
589 * See \ref IfxLld_Dma_Dma_Simple
590 *
591 */
592 IFX_EXTERN void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config);
593
594 /** \brief initialize the DMA module channel configuration
595 * \param config pointer to the DMA default channel configuration structure
596 * \param dma pointer to the DMA module handle
597 * \return None
598 *
599 * See \ref IfxLld_Dma_Dma_Simple
600 *
601 */
602 IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma);
603
604 /** \} */
605
606 /** \addtogroup IfxLld_Dma_Dma_Linked_List
607 * \{ */
608
609 /******************************************************************************/
610 /*-------------------------Inline Function Prototypes-------------------------*/
611 /******************************************************************************/
612
613 /** \brief Returns the SRC pointer for given DMA channel
614 * \param channel pointer to the DMA base address and channel ID
615 * \return SRC pointer for given DMA channel
616 */
617 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_Dma_getSrcPointer(IfxDma_Dma_Channel *channel);
618
619 /******************************************************************************/
620 /*-------------------------Global Function Prototypes-------------------------*/
621 /******************************************************************************/
622
623 /** \brief linked list functionality within the DMA module
624 * \param ptrToAddress pointer to the memory location where the linked list entry should be stored
625 * \param config pointer to the DMA default channel configuration structure
626 * \return None
627 *
628 * See \ref IfxLld_Dma_Dma_LinkedList
629 *
630 */
631 IFX_EXTERN void IfxDma_Dma_initLinkedListEntry(void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config);
632
633 /** \} */
634
635 /** \addtogroup IfxLld_Dma_Dma_Channel_Transaction_Initiate
636 * \{ */
637
638 /******************************************************************************/
639 /*-------------------------Inline Function Prototypes-------------------------*/
640 /******************************************************************************/
641
642 /** \brief Clear a channel transfer interrupt flag
643 * \param channel pointer to the DMA base address and channel ID
644 * \return None
645 */
646 IFX_INLINE void IfxDma_Dma_clearChannelInterrupt(IfxDma_Dma_Channel *channel);
647
648 /** \brief Return and clear a channel transfer interrupt flag
649 * The flag is automatically cleared with the call to this function
650 * \param channel pointer to the DMA base address and channel ID
651 * \return TRUE if the interrupt flag is set
652 * FALSE if the interrupt flag is not set
653 */
654 IFX_INLINE boolean IfxDma_Dma_getAndClearChannelInterrupt(IfxDma_Dma_Channel *channel);
655
656 /** \brief Return a channel transfer interrupt flag
657 * \param channel pointer to the DMA base address and channel ID
658 * \return TRUE if the interrupt flag is set
659 * FALSE if the interrupt flag is not set
660 */
661 IFX_INLINE boolean IfxDma_Dma_getChannelInterrupt(IfxDma_Dma_Channel *channel);
662
663 /** \brief Poll for an ongoing transaction
664 * \param channel pointer to the DMA base address and channel ID
665 * \return TRUE if a transaction request for the given channel is pending
666 *
667 * See \ref IfxLld_Dma_Dma_Simple
668 *
669 */
670 IFX_INLINE boolean IfxDma_Dma_isChannelTransactionPending(IfxDma_Dma_Channel *channel);
671
672 /** \brief Re-initialize the destination address after a transaction
673 * \param channel pointer to the DMA base address and channel ID
674 * \param address is the Initial address of the destination pointer
675 * \return None
676 *
677 * See \ref IfxLld_Dma_Dma_Simple
678 *
679 */
680 IFX_INLINE void IfxDma_Dma_setChannelDestinationAddress(IfxDma_Dma_Channel *channel, uint32 address);
681
682 /** \brief Re-initialize the source address after a transaction
683 * \param channel pointer to the DMA base address and channel ID
684 * \param address is the Initial address of the source pointer
685 * \return None
686 *
687 * See \ref IfxLld_Dma_Dma_Simple
688 *
689 */
690 IFX_INLINE void IfxDma_Dma_setChannelSourceAddress(IfxDma_Dma_Channel *channel, uint32 address);
691
692 /** \brief Re-initialize the transfer count after a transaction
693 * \param channel pointer to the DMA base address and channel ID
694 * \param transferCount value holds the DMA transfers within a transaction (1..16383; 0 handled like 1 transaction)
695 * \return None
696 *
697 * See \ref IfxLld_Dma_Dma_Simple
698 *
699 */
700 IFX_INLINE void IfxDma_Dma_setChannelTransferCount(IfxDma_Dma_Channel *channel, uint32 transferCount);
701
702 /** \brief initiate the DMA move transaction
703 * \param channel pointer to the DMA base address and channel ID
704 * \return None
705 *
706 * See \ref IfxLld_Dma_Dma_Simple
707 *
708 */
709 IFX_INLINE void IfxDma_Dma_startChannelTransaction(IfxDma_Dma_Channel *channel);
710
711 /** \} */
712
713 /******************************************************************************/
714 /*---------------------Inline Function Implementations------------------------*/
715 /******************************************************************************/
716
717 IFX_INLINE void IfxDma_Dma_clearChannelInterrupt(IfxDma_Dma_Channel *channel)
718 {
719 IfxDma_clearChannelInterrupt(channel->dma, channel->channelId);
720 }
721
722
723 IFX_INLINE boolean IfxDma_Dma_getAndClearChannelInterrupt(IfxDma_Dma_Channel *channel)
724 {
725 return IfxDma_getAndClearChannelInterrupt(channel->dma, channel->channelId);
726 }
727
728
729 IFX_INLINE boolean IfxDma_Dma_getChannelInterrupt(IfxDma_Dma_Channel *channel)
730 {
731 return IfxDma_getChannelInterrupt(channel->dma, channel->channelId);
732 }
733
734
735 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_Dma_getSrcPointer(IfxDma_Dma_Channel *channel)
736 {
737 return IfxDma_getSrcPointer(channel->dma, channel->channelId);
738 }
739
740
741 IFX_INLINE boolean IfxDma_Dma_isChannelTransactionPending(IfxDma_Dma_Channel *channel)
742 {
743 return IfxDma_isChannelTransactionPending(channel->dma, channel->channelId);
744 }
745
746
747 IFX_INLINE void IfxDma_Dma_setChannelDestinationAddress(IfxDma_Dma_Channel *channel, uint32 address)
748 {
749 IfxDma_setChannelDestinationAddress(channel->dma, channel->channelId, (void *)address);
750 }
751
752
753 IFX_INLINE void IfxDma_Dma_setChannelSourceAddress(IfxDma_Dma_Channel *channel, uint32 address)
754 {
755 IfxDma_setChannelSourceAddress(channel->dma, channel->channelId, (void *)address);
756 }
757
758
759 IFX_INLINE void IfxDma_Dma_setChannelTransferCount(IfxDma_Dma_Channel *channel, uint32 transferCount)
760 {
761 IfxDma_setChannelTransferCount(channel->dma, channel->channelId, transferCount);
762 }
763
764
765 IFX_INLINE void IfxDma_Dma_startChannelTransaction(IfxDma_Dma_Channel *channel)
766 {
767 IfxDma_startChannelTransaction(channel->dma, channel->channelId);
768 }
769
770
771 #endif /* IFXDMA_DMA_H */
IfxDma_Dma_Config
Configuration data structure of the Module.
Definition: IfxDma_Dma.h:520
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxDma_Dma_ChannelConfig::moveSize
IfxDma_ChannelMoveSize moveSize
Read/write data size.
Definition: IfxDma_Dma.h:493
IfxDma_ChannelIncrementDirection
IfxDma_ChannelIncrementDirection
DMA incrementation direction definition Definition in Ifx_DMA.CH[64].ADICR.B.INCS.
Definition: IfxDma.h:124
IfxDma_Dma_setChannelSourceAddress
IFX_INLINE void IfxDma_Dma_setChannelSourceAddress(IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the source address after a transaction.
Definition: IfxDma_Dma.h:753
IfxDma_Dma_initModuleConfig
IFX_EXTERN void IfxDma_Dma_initModuleConfig(IfxDma_Dma_Config *config, Ifx_DMA *dma)
initialize the DMA module configuration
Definition: IfxDma_Dma.c:235
IfxDma_Dma_ChannelConfig::sourceAddressCircularRange
IfxDma_ChannelIncrementCircular sourceAddressCircularRange
Determines which part of the source address remains unchanged and therby not updated after each move...
Definition: IfxDma_Dma.h:500
IfxDma_Dma_Channel::channelId
IfxDma_ChannelId channelId
Specifies the DMA channel.
Definition: IfxDma_Dma.h:474
IfxDma_Dma_ChannelConfig::readDataCrc
uint32 readDataCrc
Checksum for read data of the channel.
Definition: IfxDma_Dma.h:487
IfxDma_Dma_clearChannelInterrupt
IFX_INLINE void IfxDma_Dma_clearChannelInterrupt(IfxDma_Dma_Channel *channel)
Clear a channel transfer interrupt flag.
Definition: IfxDma_Dma.h:717
IfxDma_ChannelMove
IfxDma_ChannelMove
DMA transfer definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.BLKM and Ifx_DMA.BLK1.ME.CHCR.B.BLKM.
Definition: IfxDma.h:157
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxDma_setChannelSourceAddress
IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address.
Definition: IfxDma.h:1642
IfxDma_Dma_ChannelConfig::sourceAddressIncrementStep
IfxDma_ChannelIncrementStep sourceAddressIncrementStep
Describes the address offset with which the source address should be modified after each move...
Definition: IfxDma_Dma.h:498
IfxDma_Dma_ChannelConfig::destinationAddressIncrementStep
IfxDma_ChannelIncrementStep destinationAddressIncrementStep
Describes the address offset with which the destination address should be modified after each move...
Definition: IfxDma_Dma.h:501
IfxDma_Dma_initChannelConfig
IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration
Definition: IfxDma_Dma.c:176
IfxDma_Dma_setChannelTransferCount
IFX_INLINE void IfxDma_Dma_setChannelTransferCount(IfxDma_Dma_Channel *channel, uint32 transferCount)
Re-initialize the transfer count after a transaction.
Definition: IfxDma_Dma.h:759
IfxDma.h
DMA basic functionality.
IfxDma_Dma_ChannelConfig::sourceAddress
uint32 sourceAddress
Source address for the DMA channel.
Definition: IfxDma_Dma.h:484
IfxDma_Dma_initModule
IFX_EXTERN void IfxDma_Dma_initModule(IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
Initialize the DMA module.
Definition: IfxDma_Dma.c:229
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxDma_Dma_ChannelConfig::blockMode
IfxDma_ChannelMove blockMode
Number of moves in a transfer.
Definition: IfxDma_Dma.h:490
IfxDma_isChannelTransactionPending
IFX_INLINE boolean IfxDma_isChannelTransactionPending(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (transaction pending)
Definition: IfxDma.h:1553
IfxDma_getChannelInterrupt
IFX_INLINE boolean IfxDma_getChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return a channel transfer interrupt flag.
Definition: IfxDma.h:1447
IfxDma_Dma_ChannelConfig::sourceCircularBufferEnabled
boolean sourceCircularBufferEnabled
Enables/Disables the source circular buffering.
Definition: IfxDma_Dma.h:505
IfxDma_Dma_ChannelConfig::timestampEnabled
boolean timestampEnabled
Enables/Disables the appendage of the time stamp after end of the last DMA move in a transaction...
Definition: IfxDma_Dma.h:507
IfxDma_startChannelTransaction
IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Request a DMA channel transaction.
Definition: IfxDma.h:1680
IfxDma_Dma_ChannelConfig::destinationCircularBufferEnabled
boolean destinationCircularBufferEnabled
Enables/Disables the destination circular buffering.
Definition: IfxDma_Dma.h:506
IfxDma_Dma_isChannelTransactionPending
IFX_INLINE boolean IfxDma_Dma_isChannelTransactionPending(IfxDma_Dma_Channel *channel)
Poll for an ongoing transaction.
Definition: IfxDma_Dma.h:741
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxDma_ChannelShadow
IfxDma_ChannelShadow
shadow definition definition Definition in Ifx_DMA.CH[64].ADICR.B.SHCT
Definition: IfxDma.h:236
IfxDma_Dma_ChannelConfig::interruptRaiseThreshold
uint8 interruptRaiseThreshold
The value of the transferCount at which the interrupt should be raised.
Definition: IfxDma_Dma.h:512
IfxDma_Dma_ChannelConfig::hardwareRequestEnabled
boolean hardwareRequestEnabled
Enabling channel transaction via hardware request.
Definition: IfxDma_Dma.h:497
IfxDma_Dma_ChannelConfig::wrapSourceInterruptEnabled
boolean wrapSourceInterruptEnabled
An interrupt should be triggered whenever source address is wrapped.
Definition: IfxDma_Dma.h:508
IfxDma_Dma_deInitChannel
IFX_EXTERN void IfxDma_Dma_deInitChannel(IfxDma_Dma *dma, IfxDma_ChannelId channel)
de-initialize the DMA channel
Definition: IfxDma_Dma.c:127
IfxDma_Dma_Channel::channel
Ifx_DMA_CH * channel
Specifies the pointer to DMA channel registers.
Definition: IfxDma_Dma.h:475
IfxDma_Dma_ChannelConfig::channelInterruptPriority
Ifx_Priority channelInterruptPriority
Priority of the channel interrupt trigger.
Definition: IfxDma_Dma.h:514
IfxDma_getAndClearChannelInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to...
Definition: IfxDma.h:1375
IfxDma_Dma_getChannelInterrupt
IFX_INLINE boolean IfxDma_Dma_getChannelInterrupt(IfxDma_Dma_Channel *channel)
Return a channel transfer interrupt flag.
Definition: IfxDma_Dma.h:729
IfxDma_ChannelRequestSource
IfxDma_ChannelRequestSource
DMA request selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PRSEL and Ifx_DMA.BLK1.ME.CHCR.B.PRSEL.
Definition: IfxDma.h:227
IfxDma_Dma_initLinkedListEntry
IFX_EXTERN void IfxDma_Dma_initLinkedListEntry(void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
linked list functionality within the DMA module
Definition: IfxDma_Dma.c:223
IfxDma_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel.
Definition: IfxDma.h:1527
IfxDma_cfg.h
DMA on-chip implementation data.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxDma_Dma_ChannelConfig::sourceAddressIncrementDirection
IfxDma_ChannelIncrementDirection sourceAddressIncrementDirection
Decides whether the source address offset after each move should be added or decremented from the exi...
Definition: IfxDma_Dma.h:499
IfxDma_ChannelRequestMode
IfxDma_ChannelRequestMode
DMA request mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.RROAT and Ifx_DMA.BLK1.ME.CHCR.B.RROAT.
Definition: IfxDma.h:218
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxDma_Dma_ChannelConfig::transferCount
uint16 transferCount
Number of transfers in a transaction.
Definition: IfxDma_Dma.h:489
IfxDma_Dma_ChannelConfig::pattern
IfxDma_ChannelPattern pattern
Pattern selection operation modes.
Definition: IfxDma_Dma.h:494
IfxDma_Dma::dma
Ifx_DMA * dma
Specifies the pointer to the DMA registers.
Definition: IfxDma_Dma.h:462
IfxDma_ChannelInterruptControl
IfxDma_ChannelInterruptControl
Channel Transfer Interrupt generation mechanism. Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0)
Definition: IfxDma.h:148
IfxDma_Dma_createModuleHandle
IFX_EXTERN void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it&#39;s en...
Definition: IfxDma_Dma.c:121
IfxDma_ChannelPattern
IfxDma_ChannelPattern
Pattern detection selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PATSEL and Ifx_DMA.BLK1.ME.CHCR.B.PATSEL.
Definition: IfxDma.h:194
IfxDma_Dma_ChannelConfig::sourceDestinationAddressCrc
uint32 sourceDestinationAddressCrc
Checksum for source and destination address of channel.
Definition: IfxDma_Dma.h:488
IfxDma_ChannelBusPriority
IfxDma_ChannelBusPriority
Channel Bus Priority definition.
Definition: IfxDma.h:91
IfxDma_Dma
DMA base address data structure (Module handle)
Definition: IfxDma_Dma.h:460
IfxDma_Dma_setChannelDestinationAddress
IFX_INLINE void IfxDma_Dma_setChannelDestinationAddress(IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the destination address after a transaction.
Definition: IfxDma_Dma.h:747
IfxDma_Dma_ChannelConfig::transactionRequestLostInterruptEnabled
boolean transactionRequestLostInterruptEnabled
Enables/Disables the channel transaction request lost interrupt.
Definition: IfxDma_Dma.h:513
IfxDma_Dma_ChannelConfig::wrapDestinationInterruptEnabled
boolean wrapDestinationInterruptEnabled
An interrupt should be triggered whenever destination address is wrapped.
Definition: IfxDma_Dma.h:509
IfxDma_setChannelTransferCount
IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction.
Definition: IfxDma.h:1665
IfxCpu.h
CPU basic functionality.
IfxDma_Dma_ChannelConfig::operationMode
IfxDma_ChannelOperationMode operationMode
keep enable/disable the hardware channel request after a transaction
Definition: IfxDma_Dma.h:492
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxDma_Dma_ChannelConfig
Configuration data structure of the channel.
Definition: IfxDma_Dma.h:480
IfxDma_Dma_getAndClearChannelInterrupt
IFX_INLINE boolean IfxDma_Dma_getAndClearChannelInterrupt(IfxDma_Dma_Channel *channel)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to...
Definition: IfxDma_Dma.h:723
IfxDma_clearChannelInterrupt
IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag.
Definition: IfxDma.h:1262
IfxDma_Dma_initChannel
IFX_EXTERN void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel
Definition: IfxDma_Dma.c:141
IfxDma_ChannelIncrementCircular
IfxDma_ChannelIncrementCircular
DMA circular buffer (wrap around) definition Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD.
Definition: IfxDma.h:101
IfxDma_Dma_ChannelConfig::shadowAddress
uint32 shadowAddress
Initial content of shadow address for the DMA channel.
Definition: IfxDma_Dma.h:486
IfxDma_setChannelDestinationAddress
IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address.
Definition: IfxDma.h:1583
IfxDma_Dma_ChannelConfig::shadowControl
IfxDma_ChannelShadow shadowControl
selects the shadow transfer mode
Definition: IfxDma_Dma.h:504
IfxDma_Dma_ChannelConfig::destinationAddress
uint32 destinationAddress
Destination address for the DMA channel.
Definition: IfxDma_Dma.h:485
IfxDma_Dma_ChannelConfig::requestMode
IfxDma_ChannelRequestMode requestMode
A service request initiates a single transfer, or the complete transaction.
Definition: IfxDma_Dma.h:491
IfxDma_Dma_ChannelConfig::destinationAddressCircularRange
IfxDma_ChannelIncrementCircular destinationAddressCircularRange
Determines which part of the destination address remains unchanged and therby not updated after each ...
Definition: IfxDma_Dma.h:503
IfxDma_ChannelMoveSize
IfxDma_ChannelMoveSize
DMA move size definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHDW and Ifx_DMA.BLK1.ME.CHCR.B.CHDW.
Definition: IfxDma.h:172
IfxDma_Dma_ChannelConfig::destinationAddressIncrementDirection
IfxDma_ChannelIncrementDirection destinationAddressIncrementDirection
Decides whether the destination address offset after each move should be added or decremented from th...
Definition: IfxDma_Dma.h:502
IfxDma_Dma_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_Dma_getSrcPointer(IfxDma_Dma_Channel *channel)
Returns the SRC pointer for given DMA channel.
Definition: IfxDma_Dma.h:735
IfxDma_Dma_startChannelTransaction
IFX_INLINE void IfxDma_Dma_startChannelTransaction(IfxDma_Dma_Channel *channel)
initiate the DMA move transaction
Definition: IfxDma_Dma.h:765
IfxDma_ChannelOperationMode
IfxDma_ChannelOperationMode
DMA operation mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHMODE and Ifx_DMA.BLK1.ME.CHCR.B.CHMODE.
Definition: IfxDma.h:185
IfxDma_Dma_ChannelConfig::requestSource
IfxDma_ChannelRequestSource requestSource
Request of channel transfer through hardware or daisy chain. channel transfer complete interrupt of p...
Definition: IfxDma_Dma.h:495
IfxDma_Dma_ChannelConfig::channelInterruptEnabled
boolean channelInterruptEnabled
The channel transfer interrupt should be triggered. See also channelInterruptControl.
Definition: IfxDma_Dma.h:510
IfxDma_Dma_Channel
Channel handle.
Definition: IfxDma_Dma.h:471
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxDma_Dma_ChannelConfig::module
IfxDma_Dma * module
Specifies pointer to the IfxDma_Dma module handle.
Definition: IfxDma_Dma.h:482
IfxDma_Dma_ChannelConfig::channelInterruptControl
IfxDma_ChannelInterruptControl channelInterruptControl
The channel transfer interrupt can either be triggered depending on the interruptRaiseThreshold, or each time the transaction count is decremented.
Definition: IfxDma_Dma.h:511
IfxDma_Dma_ChannelConfig::channelInterruptTypeOfService
IfxSrc_Tos channelInterruptTypeOfService
Interrupt service provider.
Definition: IfxDma_Dma.h:515
IfxDma_Dma_ChannelConfig::busPriority
IfxDma_ChannelBusPriority busPriority
Bus priority selection.
Definition: IfxDma_Dma.h:496
IfxDma_ChannelIncrementStep
IfxDma_ChannelIncrementStep
DMA incrementation definition Definition in Ifx_DMA.CH[64].ADICR.B.SMF.
Definition: IfxDma.h:133


iLLD_TC26B: IfxDma_cfg.c Source File

  • _Impl
IfxDma_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxDma_cfg.c
3 * \brief DMA on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxDma_cfg.h"
IfxDma_cfg.h
DMA on-chip implementation data.


iLLD_TC26B: IfxDma_cfg.h Source File

  • _Impl
IfxDma_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxDma_cfg.h
3 * \brief DMA on-chip implementation data
4 * \ingroup IfxLld_Dma
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Dma DMA
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Dma_Impl Implementation
44 * \ingroup IfxLld_Dma
45 * \defgroup IfxLld_Dma_Std Standard Driver
46 * \ingroup IfxLld_Dma
47 */
48
49 #ifndef IFXDMA_CFG_H
50 #define IFXDMA_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "Cpu/Std/Ifx_Types.h"
57
58 /******************************************************************************/
59 /*-----------------------------------Macros-----------------------------------*/
60 /******************************************************************************/
61
62 /** \brief Number of channels
63 */
64 #define IFXDMA_NUM_CHANNELS 48
65
66 /** \brief Error mask for move engine source error
67 */
68 #define IFXDMA_ERROR_S (IFX_DMA_BLK_CLRE_CSER_MSK << IFX_DMA_BLK_CLRE_CSER_OFF)
69
70 /** \brief Error mask for move engine destination error
71 */
72 #define IFXDMA_ERROR_D (IFX_DMA_BLK_CLRE_CDER_MSK << IFX_DMA_BLK_CLRE_CDER_OFF)
73
74 /** \brief Error mask for bus error on SPB
75 */
76 #define IFXDMA_ERROR_SPB (IFX_DMA_BLK_CLRE_CSPBER_MSK << IFX_DMA_BLK_CLRE_CSPBER_OFF)
77
78 /** \brief Error mask for bus error on SRI
79 */
80 #define IFXDMA_ERROR_SRI (IFX_DMA_BLK_CLRE_CSRIER_MSK << IFX_DMA_BLK_CLRE_CSRIER_OFF)
81
82 /** \brief Error mask for RAM error
83 */
84 #define IFXDMA_ERROR_RAM (IFX_DMA_BLK_CLRE_CRAMER_MSK << IFX_DMA_BLK_CLRE_CRAMER_OFF)
85
86 /** \brief Error mask for SLL (safe linked list CRC checksum) error
87 */
88 #define IFXDMA_ERROR_SLL (IFX_DMA_BLK_CLRE_CSLLER_MSK << IFX_DMA_BLK_CLRE_CSLLER_OFF)
89
90 /** \brief Error mask for DLL (failed linked list load) error
91 */
92 #define IFXDMA_ERROR_DLL (IFX_DMA_BLK_CLRE_CDLLER_MSK << IFX_DMA_BLK_CLRE_CDLLER_OFF)
93
94 #define IFXDMA_NUM_MODULES (1)
95
96 /******************************************************************************/
97 /*-------------------------------Enumerations---------------------------------*/
98 /******************************************************************************/
99
100 /** \brief DMA channel resources definition
101 */
102 typedef enum
103 {
104 IfxDma_ChannelId_none = -1, /**< \brief None of the Ifx_DMA Channels */
105 IfxDma_ChannelId_0 = 0, /**< \brief Ifx_DMA Channel 0 */
106 IfxDma_ChannelId_1, /**< \brief Ifx_DMA Channel 1 */
107 IfxDma_ChannelId_2, /**< \brief Ifx_DMA Channel 2 */
108 IfxDma_ChannelId_3, /**< \brief Ifx_DMA Channel 3 */
109 IfxDma_ChannelId_4, /**< \brief Ifx_DMA Channel 4 */
110 IfxDma_ChannelId_5, /**< \brief Ifx_DMA Channel 5 */
111 IfxDma_ChannelId_6, /**< \brief Ifx_DMA Channel 6 */
112 IfxDma_ChannelId_7, /**< \brief Ifx_DMA Channel 7 */
113 IfxDma_ChannelId_8, /**< \brief Ifx_DMA Channel 8 */
114 IfxDma_ChannelId_9, /**< \brief Ifx_DMA Channel 9 */
115 IfxDma_ChannelId_10, /**< \brief Ifx_DMA Channel 10 */
116 IfxDma_ChannelId_11, /**< \brief Ifx_DMA Channel 11 */
117 IfxDma_ChannelId_12, /**< \brief Ifx_DMA Channel 12 */
118 IfxDma_ChannelId_13, /**< \brief Ifx_DMA Channel 13 */
119 IfxDma_ChannelId_14, /**< \brief Ifx_DMA Channel 14 */
120 IfxDma_ChannelId_15, /**< \brief Ifx_DMA Channel 15 */
121 IfxDma_ChannelId_16, /**< \brief Ifx_DMA Channel 16 */
122 IfxDma_ChannelId_17, /**< \brief Ifx_DMA Channel 17 */
123 IfxDma_ChannelId_18, /**< \brief Ifx_DMA Channel 18 */
124 IfxDma_ChannelId_19, /**< \brief Ifx_DMA Channel 19 */
125 IfxDma_ChannelId_20, /**< \brief Ifx_DMA Channel 20 */
126 IfxDma_ChannelId_21, /**< \brief Ifx_DMA Channel 21 */
127 IfxDma_ChannelId_22, /**< \brief Ifx_DMA Channel 22 */
128 IfxDma_ChannelId_23, /**< \brief Ifx_DMA Channel 23 */
129 IfxDma_ChannelId_24, /**< \brief Ifx_DMA Channel 24 */
130 IfxDma_ChannelId_25, /**< \brief Ifx_DMA Channel 25 */
131 IfxDma_ChannelId_26, /**< \brief Ifx_DMA Channel 26 */
132 IfxDma_ChannelId_27, /**< \brief Ifx_DMA Channel 27 */
133 IfxDma_ChannelId_28, /**< \brief Ifx_DMA Channel 28 */
134 IfxDma_ChannelId_29, /**< \brief Ifx_DMA Channel 29 */
135 IfxDma_ChannelId_30, /**< \brief Ifx_DMA Channel 30 */
136 IfxDma_ChannelId_31, /**< \brief Ifx_DMA Channel 31 */
137 IfxDma_ChannelId_32, /**< \brief Ifx_DMA Channel 32 */
138 IfxDma_ChannelId_33, /**< \brief Ifx_DMA Channel 33 */
139 IfxDma_ChannelId_34, /**< \brief Ifx_DMA Channel 34 */
140 IfxDma_ChannelId_35, /**< \brief Ifx_DMA Channel 35 */
141 IfxDma_ChannelId_36, /**< \brief Ifx_DMA Channel 36 */
142 IfxDma_ChannelId_37, /**< \brief Ifx_DMA Channel 37 */
143 IfxDma_ChannelId_38, /**< \brief Ifx_DMA Channel 38 */
144 IfxDma_ChannelId_39, /**< \brief Ifx_DMA Channel 39 */
145 IfxDma_ChannelId_40, /**< \brief Ifx_DMA Channel 40 */
146 IfxDma_ChannelId_41, /**< \brief Ifx_DMA Channel 41 */
147 IfxDma_ChannelId_42, /**< \brief Ifx_DMA Channel 42 */
148 IfxDma_ChannelId_43, /**< \brief Ifx_DMA Channel 43 */
149 IfxDma_ChannelId_44, /**< \brief Ifx_DMA Channel 44 */
150 IfxDma_ChannelId_45, /**< \brief Ifx_DMA Channel 45 */
151 IfxDma_ChannelId_46, /**< \brief Ifx_DMA Channel 46 */
152 IfxDma_ChannelId_47 /**< \brief Ifx_DMA Channel 47 */
153 } IfxDma_ChannelId;
154
155 #endif /* IFXDMA_CFG_H */
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxDma_ChannelId_5
Ifx_DMA Channel 5.
Definition: IfxDma_cfg.h:110
IfxDma_ChannelId_47
Ifx_DMA Channel 47.
Definition: IfxDma_cfg.h:152
IfxDma_ChannelId_1
Ifx_DMA Channel 1.
Definition: IfxDma_cfg.h:106
IfxDma_ChannelId_29
Ifx_DMA Channel 29.
Definition: IfxDma_cfg.h:134
IfxDma_ChannelId_10
Ifx_DMA Channel 10.
Definition: IfxDma_cfg.h:115
IfxDma_ChannelId_3
Ifx_DMA Channel 3.
Definition: IfxDma_cfg.h:108
IfxDma_ChannelId_43
Ifx_DMA Channel 43.
Definition: IfxDma_cfg.h:148
IfxDma_ChannelId_45
Ifx_DMA Channel 45.
Definition: IfxDma_cfg.h:150
IfxDma_ChannelId_13
Ifx_DMA Channel 13.
Definition: IfxDma_cfg.h:118
IfxDma_ChannelId_24
Ifx_DMA Channel 24.
Definition: IfxDma_cfg.h:129
IfxDma_ChannelId_26
Ifx_DMA Channel 26.
Definition: IfxDma_cfg.h:131
IfxDma_ChannelId_42
Ifx_DMA Channel 42.
Definition: IfxDma_cfg.h:147
IfxDma_ChannelId_21
Ifx_DMA Channel 21.
Definition: IfxDma_cfg.h:126
IfxDma_ChannelId_41
Ifx_DMA Channel 41.
Definition: IfxDma_cfg.h:146
IfxDma_ChannelId_40
Ifx_DMA Channel 40.
Definition: IfxDma_cfg.h:145
IfxDma_ChannelId_30
Ifx_DMA Channel 30.
Definition: IfxDma_cfg.h:135
IfxDma_ChannelId_6
Ifx_DMA Channel 6.
Definition: IfxDma_cfg.h:111
IfxDma_ChannelId_44
Ifx_DMA Channel 44.
Definition: IfxDma_cfg.h:149
IfxDma_ChannelId_7
Ifx_DMA Channel 7.
Definition: IfxDma_cfg.h:112
IfxDma_ChannelId_16
Ifx_DMA Channel 16.
Definition: IfxDma_cfg.h:121
IfxDma_ChannelId_22
Ifx_DMA Channel 22.
Definition: IfxDma_cfg.h:127
IfxDma_ChannelId_28
Ifx_DMA Channel 28.
Definition: IfxDma_cfg.h:133
IfxDma_ChannelId_33
Ifx_DMA Channel 33.
Definition: IfxDma_cfg.h:138
IfxDma_ChannelId_31
Ifx_DMA Channel 31.
Definition: IfxDma_cfg.h:136
IfxDma_ChannelId_37
Ifx_DMA Channel 37.
Definition: IfxDma_cfg.h:142
IfxDma_ChannelId_32
Ifx_DMA Channel 32.
Definition: IfxDma_cfg.h:137
IfxDma_ChannelId_46
Ifx_DMA Channel 46.
Definition: IfxDma_cfg.h:151
IfxDma_ChannelId_2
Ifx_DMA Channel 2.
Definition: IfxDma_cfg.h:107
IfxDma_ChannelId_15
Ifx_DMA Channel 15.
Definition: IfxDma_cfg.h:120
IfxDma_ChannelId_0
Ifx_DMA Channel 0.
Definition: IfxDma_cfg.h:105
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxDma_ChannelId_27
Ifx_DMA Channel 27.
Definition: IfxDma_cfg.h:132
IfxDma_ChannelId_34
Ifx_DMA Channel 34.
Definition: IfxDma_cfg.h:139
IfxDma_ChannelId_18
Ifx_DMA Channel 18.
Definition: IfxDma_cfg.h:123
IfxDma_ChannelId_4
Ifx_DMA Channel 4.
Definition: IfxDma_cfg.h:109
IfxDma_ChannelId_39
Ifx_DMA Channel 39.
Definition: IfxDma_cfg.h:144
IfxDma_ChannelId_12
Ifx_DMA Channel 12.
Definition: IfxDma_cfg.h:117
IfxDma_ChannelId_11
Ifx_DMA Channel 11.
Definition: IfxDma_cfg.h:116
IfxDma_ChannelId_14
Ifx_DMA Channel 14.
Definition: IfxDma_cfg.h:119
IfxDma_ChannelId_36
Ifx_DMA Channel 36.
Definition: IfxDma_cfg.h:141
IfxDma_ChannelId_17
Ifx_DMA Channel 17.
Definition: IfxDma_cfg.h:122
IfxDma_ChannelId_8
Ifx_DMA Channel 8.
Definition: IfxDma_cfg.h:113
IfxDma_ChannelId_23
Ifx_DMA Channel 23.
Definition: IfxDma_cfg.h:128
IfxDma_ChannelId_20
Ifx_DMA Channel 20.
Definition: IfxDma_cfg.h:125
IfxDma_ChannelId_none
None of the Ifx_DMA Channels.
Definition: IfxDma_cfg.h:104
IfxDma_ChannelId_9
Ifx_DMA Channel 9.
Definition: IfxDma_cfg.h:114
IfxDma_ChannelId_19
Ifx_DMA Channel 19.
Definition: IfxDma_cfg.h:124
IfxDma_ChannelId_35
Ifx_DMA Channel 35.
Definition: IfxDma_cfg.h:140
IfxDma_ChannelId_25
Ifx_DMA Channel 25.
Definition: IfxDma_cfg.h:130
IfxDma_ChannelId_38
Ifx_DMA Channel 38.
Definition: IfxDma_cfg.h:143


iLLD_TC26B: IfxDsadc.c Source File

  • Dsadc
  • Std
IfxDsadc.c
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc.c
3 * \brief DSADC basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxDsadc.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 volatile Ifx_SRC_SRCR *IfxDsadc_getAuxSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
53 {
54 return (volatile Ifx_SRC_SRCR *)((uint32)&(MODULE_SRC.DSADC.DSADC0.SRA) + 8 * channel);
55 }
56
57
58 float32 IfxDsadc_getIntegratorOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
59 {
60 float32 frequency = IfxDsadc_getMainCombOutFreq(dsadc, channel);
61
62 frequency = frequency / ((float32)1.0 + dsadc->CH[channel].IWCTR.B.NVALINT);
63 Ifx_DSADC_CH_FCFGM fcfgm = dsadc->CH[channel].FCFGM;
64
65 if (fcfgm.B.FIR0EN != 0)
66 {
67 frequency = frequency / 2;
68 }
69
70 if (fcfgm.B.FIR1EN != 0)
71 {
72 frequency = frequency / 2;
73 }
74
75 return frequency;
76 }
77
78
79 float32 IfxDsadc_getMainCombOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
80 {
81 float32 frequency = IfxDsadc_getModulatorClockFreq(dsadc, channel);
82
83 return frequency / ((float32)1.0 + dsadc->CH[channel].FCFGC.B.CFMDF);
84 }
85
86
87 float32 IfxDsadc_getMainGroupDelay(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
88 {
89 Ifx_DSADC_CH_FCFGC fcfgc = dsadc->CH[channel].FCFGC;
90 Ifx_DSADC_CH_FCFGM fcfgm = dsadc->CH[channel].FCFGM;
91 Ifx_DSADC_CH_DICFG dicfg = dsadc->CH[channel].DICFG;
92 Ifx_DSADC_CH_IWCTR iwctr = dsadc->CH[channel].IWCTR;
93 float32 tsMod = 1.0 / IfxDsadc_getModulatorClockFreq(dsadc, channel);
94 float32 tsCic = tsMod * (1 + fcfgc.B.CFMDF);
95 float32 tsFir0 = tsCic * (1 + fcfgm.B.FIR0EN);
96 float32 tsFir1 = tsFir0 * (1 + fcfgm.B.FIR1EN);
97
98 float32 gdDsA = (7 + 1) * tsMod;
99 float32 cicN = (1 + fcfgc.B.CFMDF);
100 float32 cick = (1 + fcfgc.B.CFMC);
101 float32 gdCic = tsMod * ((cick < 4) ? (0.5 * cick * (cicN - 1.0)) : ((2.0 * cicN) - 1.0));
102 float32 gdFir0 = (fcfgm.B.FIR0EN != 0) ? ((3.5 + (3.0 / cicN)) * tsCic) : 0.0;
103 float32 gdFir1;
104
105 if (fcfgm.B.FIR0EN)
106 {
107 gdFir1 = (fcfgm.B.FIR1EN != 0) ? (0.5 * (28.0 + (5.0 / cicN)) * tsFir0) : 0.0;
108 }
109 else
110 {
111 gdFir1 = (fcfgm.B.FIR1EN != 0) ? ((28.0 + (5.0 / cicN)) * tsFir0) : 0.0;
112 }
113
114 float32 gdInt = (dicfg.B.ITRMODE == IfxDsadc_IntegratorTrigger_bypassed) ? 0 : ((iwctr.B.NVALINT) * tsFir1);
115
116 return gdDsA + gdCic + gdFir0 + gdFir1 + gdInt;
117 }
118
119
120 volatile Ifx_SRC_SRCR *IfxDsadc_getMainSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
121 {
122 return (volatile Ifx_SRC_SRCR *)((uint32)&(MODULE_SRC.DSADC.DSADC0.SRM) + 8 * channel);
123 }
124
125
126 float32 IfxDsadc_getModulatorClockFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
127 {
128 float32 sourceFreq = IfxDsadc_getModulatorInputClockFreq(dsadc);
129
130 return sourceFreq / ((dsadc->CH[channel].MODCFG.B.DIVM + 1) * 2);
131 }
132
133
134 float32 IfxDsadc_getModulatorInputClockFreq(Ifx_DSADC *dsadc)
135 {
136 float32 result;
137
138 switch (dsadc->GLOBCFG.B.MCSEL)
139 {
140 case IfxDsadc_ModulatorClock_fOSC0:
141 result = IfxScuCcu_getOsc0Frequency();
142 break;
143 case IfxDsadc_ModulatorClock_fERAY:
144 result = IfxScuCcu_getPllErayFrequency();
145 break;
146 case IfxDsadc_ModulatorClock_fDSD:
147 result = IfxScuCcu_getSpbFrequency();
148 break;
149 default:
150 result = 0;
151 break;
152 }
153
154 return result;
155 }
156
157
158 void IfxDsadc_resetModule(Ifx_DSADC *dsadc)
159 {
160 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
161
162 IfxScuWdt_clearCpuEndinit(passwd);
163 dsadc->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
164 dsadc->KRST1.B.RST = 1;
165 IfxScuWdt_setCpuEndinit(passwd);
166
167 while (0 == dsadc->KRST0.B.RSTSTAT) /* Wait until reset is executed */
168
169 {}
170
171 IfxScuWdt_clearCpuEndinit(passwd);
172 dsadc->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
173 IfxScuWdt_setCpuEndinit(passwd);
174 }
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:572
IfxDsadc_ChannelId
IfxDsadc_ChannelId
Specifies the channel Index.
Definition: IfxDsadc.h:137
IfxDsadc_getMainSrc
volatile Ifx_SRC_SRCR * IfxDsadc_getMainSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the interrupt source register for a Main event.
Definition: IfxDsadc.c:120
IfxScuCcu_getPllErayFrequency
float32 IfxScuCcu_getPllErayFrequency(void)
API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON...
Definition: IfxScuCcu.c:457
IfxDsadc_getMainGroupDelay
float32 IfxDsadc_getMainGroupDelay(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Estimate the group delay of main-chain filters in seconds.
Definition: IfxDsadc.c:87
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxDsadc_getIntegratorOutFreq
float32 IfxDsadc_getIntegratorOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the integrator output in Hz.
Definition: IfxDsadc.c:58
IfxDsadc_ModulatorClock_fOSC0
f_osc0 clock selected
Definition: IfxDsadc.h:294
IfxDsadc_IntegratorTrigger_bypassed
No integration trigger, integrator bypassed.
Definition: IfxDsadc.h:238
IfxDsadc_ModulatorClock_fERAY
f_eray clock selected
Definition: IfxDsadc.h:293
IfxDsadc_getMainCombOutFreq
float32 IfxDsadc_getMainCombOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the main COMB filter output in Hz.
Definition: IfxDsadc.c:79
IfxScuCcu_getOsc0Frequency
float32 IfxScuCcu_getOsc0Frequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.c:429
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxDsadc_getModulatorInputClockFreq
float32 IfxDsadc_getModulatorInputClockFreq(Ifx_DSADC *dsadc)
Get the input frequency of DSADC in Hz.
Definition: IfxDsadc.c:134
IfxDsadc_getAuxSrc
volatile Ifx_SRC_SRCR * IfxDsadc_getAuxSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Address/pointer to the interrupt source register.
Definition: IfxDsadc.c:52
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxDsadc_ModulatorClock_fDSD
f_dsd clock selected
Definition: IfxDsadc.h:292
IfxDsadc_getModulatorClockFreq
float32 IfxDsadc_getModulatorClockFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the modulator clock frequency in Hz.
Definition: IfxDsadc.c:126
IfxDsadc_resetModule
void IfxDsadc_resetModule(Ifx_DSADC *dsadc)
resets the DSADC kernel
Definition: IfxDsadc.c:158
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxDsadc.h
DSADC basic functionality.


iLLD_TC26B: IfxDsadc.h Source File

  • Dsadc
  • Std
IfxDsadc.h
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc.h
3 * \brief DSADC basic functionality
4 * \ingroup IfxLld_Dsadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Dsadc_Std_Enum Enumerations
42 * \ingroup IfxLld_Dsadc_Std
43 * \defgroup IfxLld_Dsadc_Std_Operative Operative Functions
44 * \ingroup IfxLld_Dsadc_Std
45 * \defgroup IfxLld_Dsadc_Std_Support Support Functions
46 * \ingroup IfxLld_Dsadc_Std
47 * \defgroup IfxLld_Dsadc_Std_Interrupt Interrupt Functions
48 * \ingroup IfxLld_Dsadc_Std
49 * \defgroup IfxLld_Dsadc_Std_IO IO Pin Configuration Functions
50 * \ingroup IfxLld_Dsadc_Std
51 */
52
53 #ifndef IFXDSADC_H
54 #define IFXDSADC_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "_Impl/IfxDsadc_cfg.h"
61 #include "Src/Std/IfxSrc.h"
62 #include "Scu/Std/IfxScuCcu.h"
63 #include "_PinMap/IfxDsadc_PinMap.h"
64 #include "IfxDsadc_reg.h"
65 #include "Cpu/Std/IfxCpu_Intrinsics.h"
66
67 /******************************************************************************/
68 /*--------------------------------Enumerations--------------------------------*/
69 /******************************************************************************/
70
71 /** \addtogroup IfxLld_Dsadc_Std_Enum
72 * \{ */
73 /** \brief Comb Filter (auxiliary) shift control\n
74 * Definition in Ifx_DSADC.FCFGA.B.AFSC
75 */
76 typedef enum
77 {
78 IfxDsadc_AuxCombFilterShift_noShift = 0, /**< \brief no shift, use full range */
79 IfxDsadc_AuxCombFilterShift_shiftBy1 = 1, /**< \brief Shift by 1 */
80 IfxDsadc_AuxCombFilterShift_shiftBy2 = 2, /**< \brief Shift by 2 */
81 IfxDsadc_AuxCombFilterShift_shiftBy3 = 3 /**< \brief Shift by 3 */
82 } IfxDsadc_AuxCombFilterShift;
83
84 /** \brief Comb Filter (auxiliary) configuration/type\n
85 * Definition in Ifx_DSADC.FCFGA.B.CFAC
86 */
87 typedef enum
88 {
89 IfxDsadc_AuxCombFilterType_comb1 = 0, /**< \brief CIC1 */
90 IfxDsadc_AuxCombFilterType_comb2 = 1, /**< \brief CIC2 */
91 IfxDsadc_AuxCombFilterType_comb3 = 2, /**< \brief CIC3 */
92 IfxDsadc_AuxCombFilterType_combF = 3 /**< \brief CICF */
93 } IfxDsadc_AuxCombFilterType;
94
95 /** \brief Service request generation (auxiliary)\n
96 * Definition in Ifx_DSADC.FCFGA.B.ESEL
97 */
98 typedef enum
99 {
100 IfxDsadc_AuxEvent_everyNewResult = 0, /**< \brief Always, for each new result value */
101 IfxDsadc_AuxEvent_insideBoundary = 1, /**< \brief If result is inside the boundary band */
102 IfxDsadc_AuxEvent_outsideBoundary = 2 /**< \brief If result is outside the boundary band */
103 } IfxDsadc_AuxEvent;
104
105 /** \brief Service request generation (auxiliary)\n
106 * Definition in Ifx_DSADC.FCFGA.B.EGT
107 */
108 typedef enum
109 {
110 IfxDsadc_AuxGate_definedByESEL = 0, /**< \brief Separate: generate events according to ESEL */
111 IfxDsadc_AuxGate_coupledToIntegrator = 1 /**< \brief Coupled: generate events only when the integrator is enabled and after the discard phase defined by bitfield NVALDIS */
112 } IfxDsadc_AuxGate;
113
114 /** \brief Service request generation (auxiliary)\n
115 * Definition in Ifx_DSADC.FCFGA.B.SRGA
116 */
117 typedef enum
118 {
119 IfxDsadc_AuxServiceRequest_never = 0, /**< \brief Never, service requests disabled */
120 IfxDsadc_AuxServiceRequest_auxFilter = 1, /**< \brief Auxiliary filter: As selected by bitfield ESEL (\ref IfxDsadc_AuxEvent) */
121 IfxDsadc_AuxServiceRequest_altSource = 2 /**< \brief Alternate source: Capturing of a sign delay value to register CGSYNCx (x = 0 - 5) */
122 } IfxDsadc_AuxServiceRequest;
123
124 /** \brief Carrier generation mode\n
125 * Definition in Ifx_DSADC.CGCFG.B.CGMOD
126 */
127 typedef enum
128 {
129 IfxDsadc_CarrierWaveformMode_stopped = 0, /**< \brief Carrier Generator stopped */
130 IfxDsadc_CarrierWaveformMode_square = 1, /**< \brief Carrier Generator generates square wave */
131 IfxDsadc_CarrierWaveformMode_triangle = 2, /**< \brief Carrier Generator generates triangle wave */
132 IfxDsadc_CarrierWaveformMode_sine = 3 /**< \brief Carrier Generator generates sine wave */
133 } IfxDsadc_CarrierWaveformMode;
134
135 /** \brief Specifies the channel Index
136 */
137 typedef enum
138 {
139 IfxDsadc_ChannelId_0 = 0, /**< \brief Specifies the channel Index 0 */
140 IfxDsadc_ChannelId_2 = 2, /**< \brief Specifies the channel Index 2 */
141 IfxDsadc_ChannelId_3 = 3 /**< \brief Specifies the channel Index 3 */
142 } IfxDsadc_ChannelId;
143
144 /** \brief Modulator common mode voltage selection\n
145 * Definition in Ifx_DSADC.MODCFGx.B.CMVS
146 */
147 typedef enum
148 {
149 IfxDsadc_CommonModeVoltage_a = 0, /**< \brief VCM = VAREF / 3.03 (1.65 V for VAREF = 5.0 V), recommended for VDDM = 3.3 V1.65V */
150 IfxDsadc_CommonModeVoltage_b = 1, /**< \brief VCM = VAREF / 2.27 (2.2 V for VAREF = 5.0 V), recommended for low distortion of AC-coupled signals */
151 IfxDsadc_CommonModeVoltage_c = 2 /**< \brief VCM = VAREF / 2.0 (2.5 V for VAREF = 5.0 V), recommended for DC-coupled signals */
152 } IfxDsadc_CommonModeVoltage;
153
154 /** \brief FIR data shift control\n
155 * Selects the displacement caused by the data shifter at the FIR filter output\n
156 * Definition in Ifx_DSADC.FCFGM.B.DSH
157 */
158 typedef enum
159 {
160 IfxDsadc_FirDataShift_noShift = 0, /**< \brief no shift, use full range */
161 IfxDsadc_FirDataShift_shiftBy1 = 1, /**< \brief Shift by 1 */
162 IfxDsadc_FirDataShift_shiftBy2 = 2, /**< \brief Shift by 2 */
163 IfxDsadc_FirDataShift_shiftBy3 = 3 /**< \brief Shift by 3 */
164 } IfxDsadc_FirDataShift;
165
166 /** \brief FIR shift control\n
167 * Selects the displacement caused by the data shifter inbetween the FIR filter blocks.\n
168 * Definition in Ifx_DSADC.FCFGM.B.FSH
169 */
170 typedef enum
171 {
172 IfxDsadc_FirInternalShift_noShift = 0, /**< \brief no shift, use full range */
173 IfxDsadc_FirInternalShift_shiftBy1 = 1 /**< \brief Shift by 1 */
174 } IfxDsadc_FirInternalShift;
175
176 /** \brief Modulator configuration of positive/negative input line\n
177 * Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN
178 */
179 typedef enum
180 {
181 IfxDsadc_InputConfig_inputPin = 0, /**< \brief Modulator input connected to external pin */
182 IfxDsadc_InputConfig_supplyVoltage = 1, /**< \brief Modulator input connected to supply voltage V_ddm */
183 IfxDsadc_InputConfig_commonModeVoltage = 2, /**< \brief Modulator input connected to common mode voltage V_cm */
184 IfxDsadc_InputConfig_referenceGround = 3 /**< \brief Modulator input connected to reference ground V_ref */
185 } IfxDsadc_InputConfig;
186
187 /** \brief Demodulator input data source selection\n
188 * Definition in Ifx_DSADC.DICFG.B.DSRC
189 */
190 typedef enum
191 {
192 IfxDsadc_InputDataSource_onChipStandAlone = 0, /**< \brief On-chip modulator, standalone (3rd order) */
193 IfxDsadc_InputDataSource_onChipCombined = 1, /**< \brief On-chip modulator, yield (2nd order) */
194 IfxDsadc_InputDataSource_directInputA = 2, /**< \brief External, from input A, direct */
195 IfxDsadc_InputDataSource_invertedInputA = 3, /**< \brief External, from input A, inverted */
196 IfxDsadc_InputDataSource_directInputB = 4, /**< \brief External, from input B, direct */
197 IfxDsadc_InputDataSource_invertedInputB = 5 /**< \brief External, from input B, inverted */
198 } IfxDsadc_InputDataSource;
199
200 /** \brief Modulator gain select of analog input path\n
201 * Definition in Ifx_DSADC.MODCFGx.B.GAINSEL
202 */
203 typedef enum
204 {
205 IfxDsadc_InputGain_factor1 = 0, /**< \brief Input gain factor: 1 */
206 IfxDsadc_InputGain_factor2 = 1, /**< \brief Input gain factor: 2 */
207 IfxDsadc_InputGain_factor4 = 2, /**< \brief Input gain factor: 4 */
208 IfxDsadc_InputGain_factor8 = 3, /**< \brief Input gain factor: 8 */
209 IfxDsadc_InputGain_factor16 = 4 /**< \brief Input gain factor: 16 */
210 } IfxDsadc_InputGain;
211
212 /** \brief Modulator input pin selection\n
213 * Definition in Ifx_DSADC.MODCFGx.B.INMUX
214 */
215 typedef enum
216 {
217 IfxDsadc_InputPin_a = 0, /**< \brief Pin A connected to modulator input */
218 IfxDsadc_InputPin_b = 1, /**< \brief Pin B connected to modulator input */
219 IfxDsadc_InputPin_c = 2, /**< \brief Pin C connected to modulator input */
220 IfxDsadc_InputPin_d = 3 /**< \brief Pin D connected to modulator input */
221 } IfxDsadc_InputPin;
222
223 /** \brief Integrator window size\n
224 * Definition in Ifx_DSADC.IWCTR.B.IWS
225 */
226 typedef enum
227 {
228 IfxDsadc_IntegrationWindowSize_internalControl = 0, /**< \brief Internal control: stop integrator after REPVAL+1 integration cycles */
229 IfxDsadc_IntegrationWindowSize_externalControl = 1 /**< \brief External control: stop integrator when bit INTEN becomes 0 */
230 } IfxDsadc_IntegrationWindowSize;
231
232 /** \brief Integrator trigger mode\n
233 * NOTE: switch-first to bypassed before using other mode\n
234 * Definition in Ifx_DSADC.DICFG.B.ITRMODE
235 */
236 typedef enum
237 {
238 IfxDsadc_IntegratorTrigger_bypassed = 0, /**< \brief No integration trigger, integrator bypassed */
239 IfxDsadc_IntegratorTrigger_fallingEdge = 1, /**< \brief Trigger event upon a falling edge */
240 IfxDsadc_IntegratorTrigger_risingEdge = 2, /**< \brief Trigger event upon a rising edge */
241 IfxDsadc_IntegratorTrigger_alwaysActive = 3 /**< \brief No trigger, integrator active all the time */
242 } IfxDsadc_IntegratorTrigger;
243
244 /** \brief Low power supply voltage select\n
245 * Definition in Ifx_DSADC.GLOBCFG.B.LOSUP
246 */
247 typedef enum
248 {
249 IfxDsadc_LowPowerSupply_5V = 0, /**< \brief Supply Voltage for Analog Circuitry set to 5V */
250 IfxDsadc_LowPowerSupply_3_3V = 1 /**< \brief Supply Voltage for Analog Circuitry set to 3.3V */
251 } IfxDsadc_LowPowerSupply;
252
253 /** \brief Comb Filter (Main Chain) shift control\n
254 * Definition in Ifx_DSADC.FCFGC.B.MFSC
255 */
256 typedef enum
257 {
258 IfxDsadc_MainCombFilterShift_noShift = 0, /**< \brief no shift, use full range */
259 IfxDsadc_MainCombFilterShift_shiftBy1 = 1, /**< \brief Shift by 1 */
260 IfxDsadc_MainCombFilterShift_shiftBy2 = 2, /**< \brief Shift by 2 */
261 IfxDsadc_MainCombFilterShift_shiftBy3 = 3 /**< \brief Shift by 3 */
262 } IfxDsadc_MainCombFilterShift;
263
264 /** \brief Comb Filter (Main Chain) configuration/type\n
265 * Definition in Ifx_DSADC.FCFGC.B.CFMC
266 */
267 typedef enum
268 {
269 IfxDsadc_MainCombFilterType_comb1 = 0, /**< \brief CIC1 */
270 IfxDsadc_MainCombFilterType_comb2 = 1, /**< \brief CIC2 */
271 IfxDsadc_MainCombFilterType_comb3 = 2, /**< \brief CIC3 */
272 IfxDsadc_MainCombFilterType_combF = 3 /**< \brief CICF */
273 } IfxDsadc_MainCombFilterType;
274
275 /** \brief Service request generation (main chain)\n
276 * Definition in Ifx_DSADC.FCFGC.B.SRGM
277 */
278 typedef enum
279 {
280 IfxDsadc_MainServiceRequest_never = 0, /**< \brief Never, service requests disabled */
281 IfxDsadc_MainServiceRequest_highGateSignal = 1, /**< \brief While gate (selected trigger signal) is high */
282 IfxDsadc_MainServiceRequest_lowGateSignal = 2, /**< \brief While gate (selected trigger signal) is low */
283 IfxDsadc_MainServiceRequest_everyNewResult = 3 /**< \brief Always, for each new result value */
284 } IfxDsadc_MainServiceRequest;
285
286 /** \brief Modulator clock select\n
287 * Definition in Ifx_DSADC.GLOBCFG.B.MCSEL
288 */
289 typedef enum
290 {
291 IfxDsadc_ModulatorClock_off = 0, /**< \brief Internal clock off, no source selected */
292 IfxDsadc_ModulatorClock_fDSD = 1, /**< \brief f_dsd clock selected */
293 IfxDsadc_ModulatorClock_fERAY = 2, /**< \brief f_eray clock selected */
294 IfxDsadc_ModulatorClock_fOSC0 = 3 /**< \brief f_osc0 clock selected */
295 } IfxDsadc_ModulatorClock;
296
297 /** \brief Modulator divider factor for modulator clock\n
298 * Definition in Ifx_DSADC.MODCFGx.B.DIVM
299 */
300 typedef enum
301 {
302 IfxDsadc_ModulatorClockDivider_div2 = 0, /**< \brief f_mod = f_clk / 2 */
303 IfxDsadc_ModulatorClockDivider_div4, /**< \brief f_mod = f_clk / 4 */
304 IfxDsadc_ModulatorClockDivider_div6, /**< \brief f_mod = f_clk / 6 */
305 IfxDsadc_ModulatorClockDivider_div8, /**< \brief f_mod = f_clk / 8 */
306 IfxDsadc_ModulatorClockDivider_div10, /**< \brief f_mod = f_clk / 10 */
307 IfxDsadc_ModulatorClockDivider_div12, /**< \brief f_mod = f_clk / 12 */
308 IfxDsadc_ModulatorClockDivider_div14, /**< \brief f_mod = f_clk / 14 */
309 IfxDsadc_ModulatorClockDivider_div16, /**< \brief f_mod = f_clk / 16 */
310 IfxDsadc_ModulatorClockDivider_div18, /**< \brief f_mod = f_clk / 18 */
311 IfxDsadc_ModulatorClockDivider_div20, /**< \brief f_mod = f_clk / 20 */
312 IfxDsadc_ModulatorClockDivider_div22, /**< \brief f_mod = f_clk / 22 */
313 IfxDsadc_ModulatorClockDivider_div24, /**< \brief f_mod = f_clk / 24 */
314 IfxDsadc_ModulatorClockDivider_div26, /**< \brief f_mod = f_clk / 26 */
315 IfxDsadc_ModulatorClockDivider_div28, /**< \brief f_mod = f_clk / 28 */
316 IfxDsadc_ModulatorClockDivider_div30, /**< \brief f_mod = f_clk / 30 */
317 IfxDsadc_ModulatorClockDivider_div32 /**< \brief f_mod = f_clk / 32 */
318 } IfxDsadc_ModulatorClockDivider;
319
320 /** \brief Rectifier sign source\n
321 * Selects the sign signal that is to be delayed.\n
322 * Definition in Ifx_DSADC.RECT.B.SSRC
323 */
324 typedef enum
325 {
326 IfxDsadc_RectifierSignSource_onChipGenerator = 0, /**< \brief On-chip carrier generator */
327 IfxDsadc_RectifierSignSource_nextChannel = 1, /**< \brief Sign of result of next channel */
328 IfxDsadc_RectifierSignSource_externalA = 2, /**< \brief External sign signal A */
329 IfxDsadc_RectifierSignSource_externalB = 3 /**< \brief External sign signal B */
330 } IfxDsadc_RectifierSignSource;
331
332 /** \brief Demodulator sample clock source select\n
333 * Definition in Ifx_DSADC.DICFG.B.CSRC
334 */
335 typedef enum
336 {
337 IfxDsadc_SampleClockSource_internal = 0, /**< \brief Internal clock */
338 IfxDsadc_SampleClockSource_inputA = 1, /**< \brief External clock, from Input A */
339 IfxDsadc_SampleClockSource_inputB = 2, /**< \brief External clock, from Input B */
340 IfxDsadc_SampleClockSource_inputC = 3 /**< \brief External clock, from Input C */
341 } IfxDsadc_SampleClockSource;
342
343 /** \brief Demodulator data strobe generation mode\n
344 * Definition in Ifx_DSADC.DICFG.B.STROBE
345 */
346 typedef enum
347 {
348 IfxDsadc_SampleStrobe_noDataStrobe = 0, /**< \brief No data strobe */
349 IfxDsadc_SampleStrobe_sampleOnRisingEdge = 1, /**< \brief Direct clock, a sample trigger is generated at each rising clock edge */
350 IfxDsadc_SampleStrobe_sampleOnFallingEdge = 2, /**< \brief Direct clock, a sample trigger is generated at each falling clock edge */
351 IfxDsadc_SampleStrobe_sampleOnBothEdges = 3, /**< \brief Double data, a sample trigger is generated at each rising and falling clock edge */
352 IfxDsadc_SampleStrobe_reserved = 4, /**< \brief don't use */
353 IfxDsadc_SampleStrobe_sampleOnTwoRisingEdges = 5, /**< \brief Double clock, a sample trigger is generated at every 2nd rising clock edge */
354 IfxDsadc_SampleStrobe_sampleOnTwoFallingEdges = 6 /**< \brief Double clock, a sample trigger is generated at every 2nd falling clock edge */
355 } IfxDsadc_SampleStrobe;
356
357 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
358 * Definition in Ifx_DSADC.CLC.B.EDIS
359 */
360 typedef enum
361 {
362 IfxDsadc_SleepMode_enable = 0, /**< \brief enables sleep mode */
363 IfxDsadc_SleepMode_disable = 1 /**< \brief disables sleep mode */
364 } IfxDsadc_SleepMode;
365
366 /** \brief Timestamp trigger mode\n
367 * Definition in Ifx_DSADC.DICFG.B.TSTRMODE
368 */
369 typedef enum
370 {
371 IfxDsadc_TimestampTrigger_noTrigger = 0, /**< \brief No timestamp trigger */
372 IfxDsadc_TimestampTrigger_fallingEdge = 1, /**< \brief Trigger event upon a falling edge */
373 IfxDsadc_TimestampTrigger_risingEdge = 2, /**< \brief Trigger event upon a rising edge */
374 IfxDsadc_TimestampTrigger_eachEdge = 3 /**< \brief Trigger event upon each edge */
375 } IfxDsadc_TimestampTrigger;
376
377 /** \brief Trigger select\n
378 * Definition in Ifx_DSADC.DICFG.B.TRSEL
379 */
380 typedef enum
381 {
382 IfxDsadc_TriggerInput_a = 0, /**< \brief dsadc trig 0 */
383 IfxDsadc_TriggerInput_b = 1, /**< \brief dsadc trig 1 */
384 IfxDsadc_TriggerInput_c = 2, /**< \brief vadc trig 0 */
385 IfxDsadc_TriggerInput_d = 3, /**< \brief vadc trig 1 */
386 IfxDsadc_TriggerInput_e = 4, /**< \brief external pin e */
387 IfxDsadc_TriggerInput_f = 5, /**< \brief external pin f */
388 IfxDsadc_TriggerInput_g = 6,
389 IfxDsadc_TriggerInput_h = 7
390 } IfxDsadc_TriggerInput;
391
392 /** \} */
393
394 /** \addtogroup IfxLld_Dsadc_Std_Operative
395 * \{ */
396
397 /******************************************************************************/
398 /*-------------------------Inline Function Prototypes-------------------------*/
399 /******************************************************************************/
400
401 /** \brief Sets the sensitivity of the module to sleep signal
402 * \param dsadc pointer to DSADC registers
403 * \param mode mode selection (enable/disable)
404 * \return None
405 */
406 IFX_INLINE void IfxDsadc_setSleepMode(Ifx_DSADC *dsadc, IfxDsadc_SleepMode mode);
407
408 /** \brief Enables the conversion of multiple channels
409 * \param dsadc Pointer to the DSADC register space
410 * \param modulatorMask the modulator which should be running (bitwise selection)
411 * \param channelMask the channels which should be scanned (bitwise selection)
412 * \return None
413 *
414 * \code
415 * // enable the conversion of all 6 DSADC channels
416 * IfxDsadc_startScan(&MODULE_DSADC, 0x3FU, 0x3FU);
417 * // results are now available in IFXDSADC(ds).CH[x].RESM.B.RESULT (x=0..5)
418 * \endcode
419 *
420 */
421 IFX_INLINE void IfxDsadc_startScan(Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask);
422
423 /** \brief Disables the conversion of multiple channels
424 * \param dsadc Pointer to the DSADC register space
425 * \param modulatorMask the modulator which should be disabled (bitwise selection)
426 * \return None
427 *
428 * \code
429 * // disable the modulators of all 6 DSADC channels
430 * IfxDsadc_stopScan(&MODULE_DSADC, 0x3FU);
431 * \endcode
432 *
433 */
434 IFX_INLINE void IfxDsadc_stopScan(Ifx_DSADC *dsadc, uint32 modulatorMask);
435
436 /******************************************************************************/
437 /*-------------------------Global Function Prototypes-------------------------*/
438 /******************************************************************************/
439
440 /** \brief resets the DSADC kernel
441 * \param dsadc pointer to DSADC registers
442 * \return None
443 */
444 IFX_EXTERN void IfxDsadc_resetModule(Ifx_DSADC *dsadc);
445
446 /** \} */
447
448 /** \addtogroup IfxLld_Dsadc_Std_Support
449 * \{ */
450
451 /******************************************************************************/
452 /*-------------------------Inline Function Prototypes-------------------------*/
453 /******************************************************************************/
454
455 /** \brief Get result from the auxiliary chain
456 * \param dsadc Pointer to the DSADC register space
457 * \param channel Channel Id
458 * \return result from the auxiliary chain
459 */
460 IFX_INLINE sint16 IfxDsadc_getAuxResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
461
462 /** \brief Get the main comb decimation factor
463 * \param dsadc Pointer to the DSADC register space
464 * \param channel Channel Id
465 * \return the main comb decimation factor
466 */
467 IFX_INLINE uint16 IfxDsadc_getMainCombDecimation(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
468
469 /** \brief Get result from the main chain
470 * \param dsadc Pointer to the DSADC register space
471 * \param channel Channel Id
472 * \return result from the main chain
473 */
474 IFX_INLINE sint16 IfxDsadc_getMainResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
475
476 /** \brief Return TRUE if DSADC module is enabled
477 * \param dsadc Pointer to the DSADC register space
478 * \return TRUE if DSADC module is enabled
479 */
480 IFX_INLINE boolean IfxDsadc_isModuleEnabled(Ifx_DSADC *dsadc);
481
482 /** \brief Set the carrier waveform mode
483 * \param dsadc Pointer to the DSADC register space
484 * \param waveformMode the waveform mode
485 * \return None
486 */
487 IFX_INLINE void IfxDsadc_setCarrierMode(Ifx_DSADC *dsadc, IfxDsadc_CarrierWaveformMode waveformMode);
488
489 /******************************************************************************/
490 /*-------------------------Global Function Prototypes-------------------------*/
491 /******************************************************************************/
492
493 /** \brief Get the sample frequency of the integrator output in Hz
494 * \param dsadc Pointer to the DSADC register space
495 * \param channel Channel Id
496 * \return frequency in Hz
497 */
498 IFX_EXTERN float32 IfxDsadc_getIntegratorOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
499
500 /** \brief Get the sample frequency of the main COMB filter output in Hz
501 * \param dsadc Pointer to the DSADC register space
502 * \param channel Channel Id
503 * \return frequency in Hz
504 */
505 IFX_EXTERN float32 IfxDsadc_getMainCombOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
506
507 /** \brief Estimate the group delay of main-chain filters in seconds
508 * \param dsadc Pointer to the DSADC register space
509 * \param channel Channel Id
510 * \return delay in seconds
511 */
512 IFX_EXTERN float32 IfxDsadc_getMainGroupDelay(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
513
514 /** \brief Get the modulator clock frequency in Hz
515 * \param dsadc Pointer to the DSADC register space
516 * \param channel Channel Id
517 * \return frequency in Hz
518 */
519 IFX_EXTERN float32 IfxDsadc_getModulatorClockFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
520
521 /** \brief Get the input frequency of DSADC in Hz
522 * \param dsadc Pointer to the DSADC register space
523 * \return frequency in Hz
524 */
525 IFX_EXTERN float32 IfxDsadc_getModulatorInputClockFreq(Ifx_DSADC *dsadc);
526
527 /** \} */
528
529 /** \addtogroup IfxLld_Dsadc_Std_Interrupt
530 * \{ */
531
532 /******************************************************************************/
533 /*-------------------------Global Function Prototypes-------------------------*/
534 /******************************************************************************/
535
536 /** \brief Address/pointer to the interrupt source register
537 * \param dsadc Pointer to the DSADC register space
538 * \param channel Channel Id
539 * \return Address/pointer to the interrupt source register
540 */
541 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxDsadc_getAuxSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
542
543 /** \brief Get the interrupt source register for a Main event
544 * \param dsadc Pointer to the DSADC register space
545 * \param channel Channel Id
546 * \return Address/pointer to the interrupt source register
547 */
548 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxDsadc_getMainSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
549
550 /** \} */
551
552 /** \addtogroup IfxLld_Dsadc_Std_IO
553 * \{ */
554
555 /******************************************************************************/
556 /*-------------------------Inline Function Prototypes-------------------------*/
557 /******************************************************************************/
558
559 /** \brief Initializes a CGPWM output
560 * \param cgPwm the CGPWM Pin which should be configured
561 * \param pinMode the pin output mode which should be configured
562 * \param padDriver the pad driver mode which should be configured
563 * \return None
564 */
565 IFX_INLINE void IfxDsadc_initCgPwmPin(const IfxDsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
566
567 /** \brief Initializes a CIN input
568 * \param cIn the CIN Pin which should be configured
569 * \param cInMode the pin input mode which should be configured
570 * \param padDriver Pad Driver Configuration
571 * \return None
572 */
573 IFX_INLINE void IfxDsadc_initCinPin(const IfxDsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver);
574
575 /** \brief Initializes a COUT output
576 * \param cout the COUT Pin which should be configured
577 * \param pinMode the pin output mode which should be configured
578 * \param padDriver the pad driver mode which should be configured
579 * \return None
580 */
581 IFX_INLINE void IfxDsadc_initCoutPin(const IfxDsadc_Cout_Out *cout, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
582
583 /** \brief Initializes a DIN input
584 * \param dIn the DIN Pin which should be configured
585 * \param dInMode the pin input mode which should be configured
586 * \param padDriver Pad Driver Configuration
587 * \return None
588 */
589 IFX_INLINE void IfxDsadc_initDinPin(const IfxDsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver);
590
591 /** \brief Initializes a DS input
592 * \param dsn the DSN Pin which should be configured
593 * \param pinMode the pin input mode which should be configured
594 * \param padDriver Pad Driver Configuration
595 * \return None
596 */
597 IFX_INLINE void IfxDsadc_initDsnPin(const IfxDsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
598
599 /** \brief Initializes a DS input
600 * \param dsp the DSP Pin which should be configured
601 * \param pinMode the pin input mode which should be configured
602 * \param padDriver Pad Driver Configuration
603 * \return None
604 */
605 IFX_INLINE void IfxDsadc_initDspPin(const IfxDsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
606
607 /** \brief Initializes a ITR input
608 * \param itr the ITR Pin which should be configured
609 * \param itrMode the pin input mode which should be configured
610 * \param padDriver Pad Driver Configuration
611 * \return None
612 */
613 IFX_INLINE void IfxDsadc_initItrPin(const IfxDsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver);
614
615 /** \brief Initializes a SG input
616 * \param sg the SG Pin which should be configured
617 * \param pinMode the pin input mode which should be configured
618 * \param padDriver Pad Driver Configuration
619 * \return None
620 */
621 IFX_INLINE void IfxDsadc_initSgPin(const IfxDsadc_Sg_In *sg, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
622
623 /** \} */
624
625 /******************************************************************************/
626 /*---------------------Inline Function Implementations------------------------*/
627 /******************************************************************************/
628
629 IFX_INLINE sint16 IfxDsadc_getAuxResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
630 {
631 return (sint16)(dsadc->CH[channel].RESA.B.RESULT);
632 }
633
634
635 IFX_INLINE uint16 IfxDsadc_getMainCombDecimation(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
636 {
637 return (uint16)(1U + dsadc->CH[channel].FCFGC.B.CFMDF);
638 }
639
640
641 IFX_INLINE sint16 IfxDsadc_getMainResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
642 {
643 return (sint16)(dsadc->CH[channel].RESM.B.RESULT);
644 }
645
646
647 IFX_INLINE void IfxDsadc_initCgPwmPin(const IfxDsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
648 {
649 IfxPort_setPinModeOutput(cgPwm->pin.port, cgPwm->pin.pinIndex, pinMode, cgPwm->select);
650 IfxPort_setPinPadDriver(cgPwm->pin.port, cgPwm->pin.pinIndex, padDriver);
651 }
652
653
654 IFX_INLINE void IfxDsadc_initCinPin(const IfxDsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver)
655 {
656 if (cIn->pin.port != NULL_PTR)
657 {
658 IfxPort_setPinModeInput(cIn->pin.port, cIn->pin.pinIndex, cInMode);
659 IfxPort_setPinPadDriver(cIn->pin.port, cIn->pin.pinIndex, padDriver);
660 }
661 }
662
663
664 IFX_INLINE void IfxDsadc_initCoutPin(const IfxDsadc_Cout_Out *cout, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
665 {
666 if (cout->pin.port != NULL_PTR)
667 {
668 IfxPort_setPinModeOutput(cout->pin.port, cout->pin.pinIndex, pinMode, cout->select);
669 IfxPort_setPinPadDriver(cout->pin.port, cout->pin.pinIndex, padDriver);
670 }
671 }
672
673
674 IFX_INLINE void IfxDsadc_initDinPin(const IfxDsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver)
675 {
676 if (dIn->pin.port != NULL_PTR)
677 {
678 IfxPort_setPinModeInput(dIn->pin.port, dIn->pin.pinIndex, dInMode);
679 IfxPort_setPinPadDriver(dIn->pin.port, dIn->pin.pinIndex, padDriver);
680 }
681 }
682
683
684 IFX_INLINE void IfxDsadc_initDsnPin(const IfxDsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
685 {
686 if (dsn->pin.port != NULL_PTR)
687 {
688 IfxPort_setPinModeInput(dsn->pin.port, dsn->pin.pinIndex, pinMode);
689 IfxPort_setPinPadDriver(dsn->pin.port, dsn->pin.pinIndex, padDriver);
690 }
691 }
692
693
694 IFX_INLINE void IfxDsadc_initDspPin(const IfxDsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
695 {
696 if (dsp->pin.port != NULL_PTR)
697 {
698 IfxPort_setPinModeInput(dsp->pin.port, dsp->pin.pinIndex, pinMode);
699 IfxPort_setPinPadDriver(dsp->pin.port, dsp->pin.pinIndex, padDriver);
700 }
701 }
702
703
704 IFX_INLINE void IfxDsadc_initItrPin(const IfxDsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver)
705 {
706 if (itr->pin.port != NULL_PTR)
707 {
708 IfxPort_setPinModeInput(itr->pin.port, itr->pin.pinIndex, itrMode);
709 IfxPort_setPinPadDriver(itr->pin.port, itr->pin.pinIndex, padDriver);
710 }
711 }
712
713
714 IFX_INLINE void IfxDsadc_initSgPin(const IfxDsadc_Sg_In *sg, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
715 {
716 if (sg->pin.port != NULL_PTR)
717 {
718 IfxPort_setPinModeInput(sg->pin.port, sg->pin.pinIndex, pinMode);
719 IfxPort_setPinPadDriver(sg->pin.port, sg->pin.pinIndex, padDriver);
720 }
721 }
722
723
724 IFX_INLINE boolean IfxDsadc_isModuleEnabled(Ifx_DSADC *dsadc)
725 {
726 return dsadc->CLC.B.DISS == 0;
727 }
728
729
730 IFX_INLINE void IfxDsadc_setCarrierMode(Ifx_DSADC *dsadc, IfxDsadc_CarrierWaveformMode waveformMode)
731 {
732 dsadc->CGCFG.B.CGMOD = waveformMode;
733 }
734
735
736 IFX_INLINE void IfxDsadc_setSleepMode(Ifx_DSADC *dsadc, IfxDsadc_SleepMode mode)
737 {
738 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
739 IfxScuWdt_clearCpuEndinit(passwd);
740 dsadc->CLC.B.EDIS = mode;
741 IfxScuWdt_setCpuEndinit(passwd);
742 }
743
744
745 IFX_INLINE void IfxDsadc_startScan(Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask)
746 {
747 dsadc->GLOBRC.U = dsadc->GLOBRC.U | ((modulatorMask << 16) | (channelMask));
748 }
749
750
751 IFX_INLINE void IfxDsadc_stopScan(Ifx_DSADC *dsadc, uint32 modulatorMask)
752 {
753 dsadc->GLOBRC.U &= ~(modulatorMask << 16);
754 }
755
756
757 #endif /* IFXDSADC_H */
IfxDsadc_Cgpwm_Out
CGPWM pin mapping structure.
Definition: IfxDsadc_PinMap.h:101
IfxDsadc_TimestampTrigger_fallingEdge
Trigger event upon a falling edge.
Definition: IfxDsadc.h:372
IfxDsadc_InputConfig_inputPin
Modulator input connected to external pin.
Definition: IfxDsadc.h:181
IfxDsadc_TriggerInput_h
Definition: IfxDsadc.h:389
IfxDsadc_CommonModeVoltage_a
VCM = VAREF / 3.03 (1.65 V for VAREF = 5.0 V), recommended for VDDM = 3.3 V1.65V. ...
Definition: IfxDsadc.h:149
IfxDsadc_TimestampTrigger
IfxDsadc_TimestampTrigger
Timestamp trigger mode Definition in Ifx_DSADC.DICFG.B.TSTRMODE.
Definition: IfxDsadc.h:369
IfxDsadc_AuxGate_coupledToIntegrator
Coupled: generate events only when the integrator is enabled and after the discard phase defined by b...
Definition: IfxDsadc.h:111
IfxDsadc_ChannelId
IfxDsadc_ChannelId
Specifies the channel Index.
Definition: IfxDsadc.h:137
IfxDsadc_TriggerInput_c
vadc trig 0
Definition: IfxDsadc.h:384
IfxDsadc_FirDataShift_shiftBy1
Shift by 1.
Definition: IfxDsadc.h:161
IfxDsadc_AuxCombFilterType
IfxDsadc_AuxCombFilterType
Comb Filter (auxiliary) configuration/type Definition in Ifx_DSADC.FCFGA.B.CFAC.
Definition: IfxDsadc.h:87
IfxDsadc_Dsp_In
DS positive pin mapping structure.
Definition: IfxDsadc_PinMap.h:65
IfxDsadc_IntegratorTrigger_fallingEdge
Trigger event upon a falling edge.
Definition: IfxDsadc.h:239
IfxDsadc_ModulatorClockDivider_div20
f_mod = f_clk / 20
Definition: IfxDsadc.h:311
IfxDsadc_MainServiceRequest_highGateSignal
While gate (selected trigger signal) is high.
Definition: IfxDsadc.h:281
IfxDsadc_isModuleEnabled
IFX_INLINE boolean IfxDsadc_isModuleEnabled(Ifx_DSADC *dsadc)
Return TRUE if DSADC module is enabled.
Definition: IfxDsadc.h:724
IfxDsadc_MainServiceRequest_never
Never, service requests disabled.
Definition: IfxDsadc.h:280
IfxDsadc_InputDataSource_invertedInputA
External, from input A, inverted.
Definition: IfxDsadc.h:195
IfxDsadc_getMainSrc
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxDsadc_getMainSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the interrupt source register for a Main event.
Definition: IfxDsadc.c:120
IfxDsadc_MainCombFilterType_comb3
CIC3.
Definition: IfxDsadc.h:271
IfxDsadc_SleepMode
IfxDsadc_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_DSADC.CLC.B.EDIS.
Definition: IfxDsadc.h:360
IfxDsadc_TriggerInput_f
external pin f
Definition: IfxDsadc.h:387
IfxDsadc_SampleStrobe_sampleOnFallingEdge
Direct clock, a sample trigger is generated at each falling clock edge.
Definition: IfxDsadc.h:350
IfxDsadc_getMainGroupDelay
IFX_EXTERN float32 IfxDsadc_getMainGroupDelay(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Estimate the group delay of main-chain filters in seconds.
Definition: IfxDsadc.c:87
IfxDsadc_InputConfig_supplyVoltage
Modulator input connected to supply voltage V_ddm.
Definition: IfxDsadc.h:182
IfxDsadc_InputPin
IfxDsadc_InputPin
Modulator input pin selection Definition in Ifx_DSADC.MODCFGx.B.INMUX.
Definition: IfxDsadc.h:215
IfxDsadc_CarrierWaveformMode_stopped
Carrier Generator stopped.
Definition: IfxDsadc.h:129
IfxDsadc_LowPowerSupply_5V
Supply Voltage for Analog Circuitry set to 5V.
Definition: IfxDsadc.h:249
IfxDsadc_InputDataSource_onChipCombined
On-chip modulator, yield (2nd order)
Definition: IfxDsadc.h:193
IfxDsadc_IntegratorTrigger_risingEdge
Trigger event upon a rising edge.
Definition: IfxDsadc.h:240
IfxDsadc_InputPin_a
Pin A connected to modulator input.
Definition: IfxDsadc.h:217
IfxDsadc_getAuxResult
IFX_INLINE sint16 IfxDsadc_getAuxResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the auxiliary chain.
Definition: IfxDsadc.h:629
IfxDsadc_ModulatorClockDivider_div26
f_mod = f_clk / 26
Definition: IfxDsadc.h:314
IfxDsadc_MainCombFilterShift_shiftBy2
Shift by 2.
Definition: IfxDsadc.h:260
IfxDsadc_RectifierSignSource_nextChannel
Sign of result of next channel.
Definition: IfxDsadc.h:327
IfxDsadc_AuxServiceRequest_auxFilter
Auxiliary filter: As selected by bitfield ESEL (IfxDsadc_AuxEvent)
Definition: IfxDsadc.h:120
IfxDsadc_AuxGate_definedByESEL
Separate: generate events according to ESEL.
Definition: IfxDsadc.h:110
IfxDsadc_setCarrierMode
IFX_INLINE void IfxDsadc_setCarrierMode(Ifx_DSADC *dsadc, IfxDsadc_CarrierWaveformMode waveformMode)
Set the carrier waveform mode.
Definition: IfxDsadc.h:730
IfxDsadc_AuxCombFilterShift_shiftBy2
Shift by 2.
Definition: IfxDsadc.h:80
IfxDsadc_FirDataShift_shiftBy3
Shift by 3.
Definition: IfxDsadc.h:163
IfxDsadc_initCoutPin
IFX_INLINE void IfxDsadc_initCoutPin(const IfxDsadc_Cout_Out *cout, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a COUT output.
Definition: IfxDsadc.h:664
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxDsadc_SampleStrobe_sampleOnBothEdges
Double data, a sample trigger is generated at each rising and falling clock edge. ...
Definition: IfxDsadc.h:351
IfxDsadc_ModulatorClockDivider_div6
f_mod = f_clk / 6
Definition: IfxDsadc.h:304
IfxDsadc_MainCombFilterShift
IfxDsadc_MainCombFilterShift
Comb Filter (Main Chain) shift control Definition in Ifx_DSADC.FCFGC.B.MFSC.
Definition: IfxDsadc.h:256
float32
float float32
Definition: Platform_Types.h:170
IfxDsadc_InputDataSource_onChipStandAlone
On-chip modulator, standalone (3rd order)
Definition: IfxDsadc.h:192
IfxDsadc_FirInternalShift_shiftBy1
Shift by 1.
Definition: IfxDsadc.h:173
IfxDsadc_AuxCombFilterShift
IfxDsadc_AuxCombFilterShift
Comb Filter (auxiliary) shift control Definition in Ifx_DSADC.FCFGA.B.AFSC.
Definition: IfxDsadc.h:76
IfxDsadc_MainCombFilterShift_noShift
no shift, use full range
Definition: IfxDsadc.h:258
IfxDsadc_SleepMode_disable
disables sleep mode
Definition: IfxDsadc.h:363
IfxDsadc_ModulatorClock_off
Internal clock off, no source selected.
Definition: IfxDsadc.h:291
IfxDsadc_getMainCombDecimation
IFX_INLINE uint16 IfxDsadc_getMainCombDecimation(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the main comb decimation factor.
Definition: IfxDsadc.h:635
IfxDsadc_InputGain_factor8
Input gain factor: 8.
Definition: IfxDsadc.h:208
IfxDsadc_CarrierWaveformMode_square
Carrier Generator generates square wave.
Definition: IfxDsadc.h:130
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxDsadc_InputConfig_referenceGround
Modulator input connected to reference ground V_ref.
Definition: IfxDsadc.h:184
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxDsadc_RectifierSignSource_externalB
External sign signal B.
Definition: IfxDsadc.h:329
IfxDsadc_FirInternalShift
IfxDsadc_FirInternalShift
FIR shift control Selects the displacement caused by the data shifter inbetween the FIR filter blocks...
Definition: IfxDsadc.h:170
IfxSrc.h
SRC basic functionality.
IfxDsadc_Cout_Out
COUT pin mapping structure.
Definition: IfxDsadc_PinMap.h:117
IfxDsadc_InputDataSource_invertedInputB
External, from input B, inverted.
Definition: IfxDsadc.h:197
IfxDsadc_getIntegratorOutFreq
IFX_EXTERN float32 IfxDsadc_getIntegratorOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the integrator output in Hz.
Definition: IfxDsadc.c:58
IfxDsadc_ModulatorClockDivider_div12
f_mod = f_clk / 12
Definition: IfxDsadc.h:307
IfxCpu_Intrinsics.h
IfxDsadc_IntegratorTrigger_alwaysActive
No trigger, integrator active all the time.
Definition: IfxDsadc.h:241
IfxDsadc_IntegratorTrigger
IfxDsadc_IntegratorTrigger
Integrator trigger mode NOTE: switch-first to bypassed before using other mode Definition in Ifx_DSAD...
Definition: IfxDsadc.h:236
IfxDsadc_Sg_In
SG pin mapping structure.
Definition: IfxDsadc_PinMap.h:109
IfxDsadc_IntegrationWindowSize_internalControl
Internal control: stop integrator after REPVAL+1 integration cycles.
Definition: IfxDsadc.h:228
IfxDsadc_Cgpwm_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxDsadc_PinMap.h:104
IfxDsadc_ModulatorClock_fOSC0
f_osc0 clock selected
Definition: IfxDsadc.h:294
IfxDsadc_SleepMode_enable
enables sleep mode
Definition: IfxDsadc.h:362
IfxDsadc_initSgPin
IFX_INLINE void IfxDsadc_initSgPin(const IfxDsadc_Sg_In *sg, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SG input.
Definition: IfxDsadc.h:714
IfxDsadc_AuxCombFilterShift_shiftBy3
Shift by 3.
Definition: IfxDsadc.h:81
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxDsadc_IntegrationWindowSize_externalControl
External control: stop integrator when bit INTEN becomes 0.
Definition: IfxDsadc.h:229
IfxDsadc_IntegratorTrigger_bypassed
No integration trigger, integrator bypassed.
Definition: IfxDsadc.h:238
IfxDsadc_ModulatorClock_fERAY
f_eray clock selected
Definition: IfxDsadc.h:293
IfxDsadc_CarrierWaveformMode_triangle
Carrier Generator generates triangle wave.
Definition: IfxDsadc.h:131
IfxDsadc_Itr_In
ITR pin mapping structure.
Definition: IfxDsadc_PinMap.h:92
IfxDsadc_startScan
IFX_INLINE void IfxDsadc_startScan(Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels.
Definition: IfxDsadc.h:745
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
IfxDsadc_SampleStrobe_sampleOnTwoFallingEdges
Double clock, a sample trigger is generated at every 2nd falling clock edge.
Definition: IfxDsadc.h:354
IfxDsadc_getMainCombOutFreq
IFX_EXTERN float32 IfxDsadc_getMainCombOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the main COMB filter output in Hz.
Definition: IfxDsadc.c:79
IfxDsadc_MainCombFilterType
IfxDsadc_MainCombFilterType
Comb Filter (Main Chain) configuration/type Definition in Ifx_DSADC.FCFGC.B.CFMC. ...
Definition: IfxDsadc.h:267
IfxDsadc_InputPin_b
Pin B connected to modulator input.
Definition: IfxDsadc.h:218
IfxDsadc_SampleStrobe
IfxDsadc_SampleStrobe
Demodulator data strobe generation mode Definition in Ifx_DSADC.DICFG.B.STROBE.
Definition: IfxDsadc.h:346
sint16
short sint16
Definition: Platform_Types.h:129
IfxDsadc_FirDataShift
IfxDsadc_FirDataShift
FIR data shift control Selects the displacement caused by the data shifter at the FIR filter output D...
Definition: IfxDsadc.h:158
IfxDsadc_ModulatorClockDivider_div8
f_mod = f_clk / 8
Definition: IfxDsadc.h:305
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxDsadc_AuxEvent_insideBoundary
If result is inside the boundary band.
Definition: IfxDsadc.h:101
IfxDsadc_SampleClockSource_internal
Internal clock.
Definition: IfxDsadc.h:337
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxDsadc_MainServiceRequest_everyNewResult
Always, for each new result value.
Definition: IfxDsadc.h:283
IfxDsadc_LowPowerSupply_3_3V
Supply Voltage for Analog Circuitry set to 3.3V.
Definition: IfxDsadc.h:250
IfxDsadc_SampleClockSource_inputA
External clock, from Input A.
Definition: IfxDsadc.h:338
IfxDsadc_AuxServiceRequest_altSource
Alternate source: Capturing of a sign delay value to register CGSYNCx (x = 0 - 5) ...
Definition: IfxDsadc.h:121
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxDsadc_InputConfig_commonModeVoltage
Modulator input connected to common mode voltage V_cm.
Definition: IfxDsadc.h:183
IfxDsadc_InputDataSource
IfxDsadc_InputDataSource
Demodulator input data source selection Definition in Ifx_DSADC.DICFG.B.DSRC.
Definition: IfxDsadc.h:190
IfxDsadc_CommonModeVoltage_b
VCM = VAREF / 2.27 (2.2 V for VAREF = 5.0 V), recommended for low distortion of AC-coupled signals...
Definition: IfxDsadc.h:150
IfxDsadc_MainCombFilterType_combF
CICF.
Definition: IfxDsadc.h:272
IfxDsadc_CommonModeVoltage
IfxDsadc_CommonModeVoltage
Modulator common mode voltage selection Definition in Ifx_DSADC.MODCFGx.B.CMVS.
Definition: IfxDsadc.h:147
IfxDsadc_SampleClockSource
IfxDsadc_SampleClockSource
Demodulator sample clock source select Definition in Ifx_DSADC.DICFG.B.CSRC.
Definition: IfxDsadc.h:335
IfxDsadc_ModulatorClockDivider_div28
f_mod = f_clk / 28
Definition: IfxDsadc.h:315
IfxDsadc_ModulatorClockDivider_div18
f_mod = f_clk / 18
Definition: IfxDsadc.h:310
IfxDsadc_InputConfig
IfxDsadc_InputConfig
Modulator configuration of positive/negative input line Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN.
Definition: IfxDsadc.h:179
IfxDsadc_SampleStrobe_reserved
don&#39;t use
Definition: IfxDsadc.h:352
IfxDsadc_CarrierWaveformMode_sine
Carrier Generator generates sine wave.
Definition: IfxDsadc.h:132
IfxDsadc_TriggerInput_b
dsadc trig 1
Definition: IfxDsadc.h:383
IfxDsadc_AuxCombFilterType_comb2
CIC2.
Definition: IfxDsadc.h:90
IfxDsadc_InputGain
IfxDsadc_InputGain
Modulator gain select of analog input path Definition in Ifx_DSADC.MODCFGx.B.GAINSEL.
Definition: IfxDsadc.h:203
IfxDsadc_getModulatorInputClockFreq
IFX_EXTERN float32 IfxDsadc_getModulatorInputClockFreq(Ifx_DSADC *dsadc)
Get the input frequency of DSADC in Hz.
Definition: IfxDsadc.c:134
IfxDsadc_ModulatorClockDivider_div4
f_mod = f_clk / 4
Definition: IfxDsadc.h:303
IfxDsadc_InputGain_factor4
Input gain factor: 4.
Definition: IfxDsadc.h:207
IfxDsadc_AuxCombFilterType_combF
CICF.
Definition: IfxDsadc.h:92
IfxDsadc_MainCombFilterType_comb2
CIC2.
Definition: IfxDsadc.h:270
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxDsadc_ModulatorClockDivider
IfxDsadc_ModulatorClockDivider
Modulator divider factor for modulator clock Definition in Ifx_DSADC.MODCFGx.B.DIVM.
Definition: IfxDsadc.h:300
IfxDsadc_AuxCombFilterType_comb3
CIC3.
Definition: IfxDsadc.h:91
IfxDsadc_InputDataSource_directInputB
External, from input B, direct.
Definition: IfxDsadc.h:196
IfxDsadc_initCinPin
IFX_INLINE void IfxDsadc_initCinPin(const IfxDsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver)
Initializes a CIN input.
Definition: IfxDsadc.h:654
IfxDsadc_Cgpwm_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxDsadc_PinMap.h:105
IfxDsadc_getAuxSrc
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxDsadc_getAuxSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Address/pointer to the interrupt source register.
Definition: IfxDsadc.c:52
IfxDsadc_IntegrationWindowSize
IfxDsadc_IntegrationWindowSize
Integrator window size Definition in Ifx_DSADC.IWCTR.B.IWS.
Definition: IfxDsadc.h:226
IfxDsadc_CarrierWaveformMode
IfxDsadc_CarrierWaveformMode
Carrier generation mode Definition in Ifx_DSADC.CGCFG.B.CGMOD.
Definition: IfxDsadc.h:127
IfxDsadc_ModulatorClockDivider_div24
f_mod = f_clk / 24
Definition: IfxDsadc.h:313
IfxDsadc_RectifierSignSource
IfxDsadc_RectifierSignSource
Rectifier sign source Selects the sign signal that is to be delayed. Definition in Ifx_DSADC...
Definition: IfxDsadc.h:324
IfxDsadc_setSleepMode
IFX_INLINE void IfxDsadc_setSleepMode(Ifx_DSADC *dsadc, IfxDsadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxDsadc.h:736
IfxDsadc_AuxServiceRequest_never
Never, service requests disabled.
Definition: IfxDsadc.h:119
IfxDsadc_SampleStrobe_noDataStrobe
No data strobe.
Definition: IfxDsadc.h:348
IfxDsadc_TriggerInput
IfxDsadc_TriggerInput
Trigger select Definition in Ifx_DSADC.DICFG.B.TRSEL.
Definition: IfxDsadc.h:380
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxDsadc_InputPin_c
Pin C connected to modulator input.
Definition: IfxDsadc.h:219
IfxDsadc_AuxServiceRequest
IfxDsadc_AuxServiceRequest
Service request generation (auxiliary) Definition in Ifx_DSADC.FCFGA.B.SRGA.
Definition: IfxDsadc.h:117
IfxDsadc_LowPowerSupply
IfxDsadc_LowPowerSupply
Low power supply voltage select Definition in Ifx_DSADC.GLOBCFG.B.LOSUP.
Definition: IfxDsadc.h:247
IfxDsadc_AuxEvent_everyNewResult
Always, for each new result value.
Definition: IfxDsadc.h:100
IfxDsadc_getMainResult
IFX_INLINE sint16 IfxDsadc_getMainResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the main chain.
Definition: IfxDsadc.h:641
IfxDsadc_TimestampTrigger_noTrigger
No timestamp trigger.
Definition: IfxDsadc.h:371
IfxDsadc_RectifierSignSource_onChipGenerator
On-chip carrier generator.
Definition: IfxDsadc.h:326
IfxDsadc_initDspPin
IFX_INLINE void IfxDsadc_initDspPin(const IfxDsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input.
Definition: IfxDsadc.h:694
IfxDsadc_AuxEvent_outsideBoundary
If result is outside the boundary band.
Definition: IfxDsadc.h:102
IfxDsadc_ModulatorClockDivider_div10
f_mod = f_clk / 10
Definition: IfxDsadc.h:306
IfxDsadc_ModulatorClockDivider_div14
f_mod = f_clk / 14
Definition: IfxDsadc.h:308
IfxDsadc_InputGain_factor16
Input gain factor: 16.
Definition: IfxDsadc.h:209
IfxDsadc_ModulatorClockDivider_div30
f_mod = f_clk / 30
Definition: IfxDsadc.h:316
IfxDsadc_RectifierSignSource_externalA
External sign signal A.
Definition: IfxDsadc.h:328
IfxDsadc_ModulatorClockDivider_div2
f_mod = f_clk / 2
Definition: IfxDsadc.h:302
IfxDsadc_stopScan
IFX_INLINE void IfxDsadc_stopScan(Ifx_DSADC *dsadc, uint32 modulatorMask)
Disables the conversion of multiple channels.
Definition: IfxDsadc.h:751
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxDsadc_ChannelId_3
Specifies the channel Index 3.
Definition: IfxDsadc.h:141
IfxDsadc_SampleClockSource_inputB
External clock, from Input B.
Definition: IfxDsadc.h:339
IfxDsadc_TriggerInput_a
dsadc trig 0
Definition: IfxDsadc.h:382
IfxDsadc_MainCombFilterShift_shiftBy1
Shift by 1.
Definition: IfxDsadc.h:259
IfxDsadc_AuxGate
IfxDsadc_AuxGate
Service request generation (auxiliary) Definition in Ifx_DSADC.FCFGA.B.EGT.
Definition: IfxDsadc.h:108
IfxDsadc_AuxCombFilterType_comb1
CIC1.
Definition: IfxDsadc.h:89
IfxDsadc_initDinPin
IFX_INLINE void IfxDsadc_initDinPin(const IfxDsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver)
Initializes a DIN input.
Definition: IfxDsadc.h:674
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxDsadc_initItrPin
IFX_INLINE void IfxDsadc_initItrPin(const IfxDsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver)
Initializes a ITR input.
Definition: IfxDsadc.h:704
IfxDsadc_ChannelId_2
Specifies the channel Index 2.
Definition: IfxDsadc.h:140
IfxDsadc_ModulatorClock_fDSD
f_dsd clock selected
Definition: IfxDsadc.h:292
IfxDsadc_initDsnPin
IFX_INLINE void IfxDsadc_initDsnPin(const IfxDsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input.
Definition: IfxDsadc.h:684
IfxDsadc_MainCombFilterType_comb1
CIC1.
Definition: IfxDsadc.h:269
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxDsadc_ModulatorClockDivider_div22
f_mod = f_clk / 22
Definition: IfxDsadc.h:312
IfxDsadc_SampleStrobe_sampleOnRisingEdge
Direct clock, a sample trigger is generated at each rising clock edge.
Definition: IfxDsadc.h:349
IfxDsadc_AuxCombFilterShift_shiftBy1
Shift by 1.
Definition: IfxDsadc.h:79
IfxDsadc_getModulatorClockFreq
IFX_EXTERN float32 IfxDsadc_getModulatorClockFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the modulator clock frequency in Hz.
Definition: IfxDsadc.c:126
IfxDsadc_TriggerInput_d
vadc trig 1
Definition: IfxDsadc.h:385
IfxDsadc_Dsn_In
DS negative pin mapping structure.
Definition: IfxDsadc_PinMap.h:56
IfxDsadc_InputGain_factor2
Input gain factor: 2.
Definition: IfxDsadc.h:206
IfxDsadc_TimestampTrigger_eachEdge
Trigger event upon each edge.
Definition: IfxDsadc.h:374
IfxDsadc_MainCombFilterShift_shiftBy3
Shift by 3.
Definition: IfxDsadc.h:261
IfxDsadc_PinMap.h
DSADC I/O map.
IfxDsadc_resetModule
IFX_EXTERN void IfxDsadc_resetModule(Ifx_DSADC *dsadc)
resets the DSADC kernel
Definition: IfxDsadc.c:158
IfxDsadc_MainServiceRequest_lowGateSignal
While gate (selected trigger signal) is low.
Definition: IfxDsadc.h:282
IfxDsadc_FirInternalShift_noShift
no shift, use full range
Definition: IfxDsadc.h:172
IfxDsadc_ModulatorClock
IfxDsadc_ModulatorClock
Modulator clock select Definition in Ifx_DSADC.GLOBCFG.B.MCSEL.
Definition: IfxDsadc.h:289
IfxDsadc_FirDataShift_shiftBy2
Shift by 2.
Definition: IfxDsadc.h:162
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxDsadc_MainServiceRequest
IfxDsadc_MainServiceRequest
Service request generation (main chain) Definition in Ifx_DSADC.FCFGC.B.SRGM.
Definition: IfxDsadc.h:278
IfxDsadc_AuxEvent
IfxDsadc_AuxEvent
Service request generation (auxiliary) Definition in Ifx_DSADC.FCFGA.B.ESEL.
Definition: IfxDsadc.h:98
IfxDsadc_InputGain_factor1
Input gain factor: 1.
Definition: IfxDsadc.h:205
IfxDsadc_ChannelId_0
Specifies the channel Index 0.
Definition: IfxDsadc.h:139
IfxDsadc_FirDataShift_noShift
no shift, use full range
Definition: IfxDsadc.h:160
IfxDsadc_SampleStrobe_sampleOnTwoRisingEdges
Double clock, a sample trigger is generated at every 2nd rising clock edge.
Definition: IfxDsadc.h:353
IfxDsadc_TriggerInput_g
Definition: IfxDsadc.h:388
IfxDsadc_Cin_In
CIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:74
IfxDsadc_SampleClockSource_inputC
External clock, from Input C.
Definition: IfxDsadc.h:340
IfxDsadc_Din_In
DIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:83
IfxDsadc_InputPin_d
Pin D connected to modulator input.
Definition: IfxDsadc.h:220
IfxDsadc_initCgPwmPin
IFX_INLINE void IfxDsadc_initCgPwmPin(const IfxDsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a CGPWM output.
Definition: IfxDsadc.h:647
IfxDsadc_TriggerInput_e
external pin e
Definition: IfxDsadc.h:386
IfxDsadc_CommonModeVoltage_c
VCM = VAREF / 2.0 (2.5 V for VAREF = 5.0 V), recommended for DC-coupled signals.
Definition: IfxDsadc.h:151
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxDsadc_TimestampTrigger_risingEdge
Trigger event upon a rising edge.
Definition: IfxDsadc.h:373
IfxDsadc_cfg.h
DSADC on-chip implementation data.
IfxDsadc_ModulatorClockDivider_div32
f_mod = f_clk / 32
Definition: IfxDsadc.h:317
IfxDsadc_ModulatorClockDivider_div16
f_mod = f_clk / 16
Definition: IfxDsadc.h:309
IfxDsadc_InputDataSource_directInputA
External, from input A, direct.
Definition: IfxDsadc.h:194
IfxDsadc_AuxCombFilterShift_noShift
no shift, use full range
Definition: IfxDsadc.h:78


iLLD_TC26B: IfxDsadc_Dsadc.c Source File

  • Dsadc
  • Dsadc
IfxDsadc_Dsadc.c
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc_Dsadc.c
3 * \brief DSADC DSADC details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxDsadc_Dsadc.h"
47
48 /******************************************************************************/
49 /*-----------------------Private Function Prototypes--------------------------*/
50 /******************************************************************************/
51
52 /** \brief calculate division factor
53 * \param sourceFreq Source frequency
54 * \param targetFreq Target frequency
55 * \return division factor
56 */
57 IFX_STATIC sint32 IfxDsadc_Dsadc_calcDIVx(float32 sourceFreq, float32 *targetFreq);
58
59 /** \brief Initialises the auxilary filter
60 * \param channel Pointer to the DSADC channel handle
61 * \param config pointer to the DSADC fir auxilary filter configuration
62 * \return None
63 */
64 IFX_STATIC void IfxDsadc_Dsadc_initAuxFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_AuxFilterConfig *config);
65
66 /** \brief Initialises the comb filter
67 * \param channel Pointer to the DSADC channel handle
68 * \param config pointer to the DSADC comb filter configuration
69 * \return None
70 */
71 IFX_STATIC void IfxDsadc_Dsadc_initCombFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_CombFilterConfig *config);
72
73 /** \brief Initialises the demodulator
74 * \param channel Pointer to the DSADC channel handle
75 * \param config pointer to the DSADC demodulator configuration
76 * \return None
77 */
78 IFX_STATIC void IfxDsadc_Dsadc_initDemodulator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_DemodulatorConfig *config);
79
80 /** \brief Initialises the fir filter
81 * \param channel Pointer to the DSADC channel handle
82 * \param config pointer to the DSADC fir filter configuration
83 * \return None
84 */
85 IFX_STATIC void IfxDsadc_Dsadc_initFirFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_FirFilterConfig *config);
86
87 /** \brief Initialises the integrator
88 * \param channel Pointer to the DSADC channel handle
89 * \param config pointer to the DSADC fir integrator configuration
90 * \return None
91 */
92 IFX_STATIC void IfxDsadc_Dsadc_initIntegrator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_IntegratorConfig *config);
93
94 /** \brief Initialises the modulator
95 * \param channel Pointer to the DSADC channel handle
96 * \param config pointer to the DSADC modulator configuration
97 * \return None
98 */
99 IFX_STATIC void IfxDsadc_Dsadc_initModulator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ModulatorConfig *config);
100
101 /** \brief Initialises the rectifier
102 * \param channel Pointer to the DSADC channel handle
103 * \param config pointer to the DSADC fir rectifier configuration
104 * \return None
105 */
106 IFX_STATIC void IfxDsadc_Dsadc_initRectifier(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_RectifierConfig *config);
107
108 /******************************************************************************/
109 /*-------------------------Function Implementations---------------------------*/
110 /******************************************************************************/
111
112 IFX_STATIC sint32 IfxDsadc_Dsadc_calcDIVx(float32 sourceFreq, float32 *targetFreq)
113 {
114 float32 bestError = 10e6;
115 sint32 bestDiv = 2, i;
116
117 for (i = 2; i <= 32; i += 2)
118 {
119 float32 freq = sourceFreq / i;
120 float32 error = __absf(freq - *targetFreq);
121
122 if (__leqf(error, bestError))
123 {
124 bestError = error;
125 bestDiv = i;
126
127 if (!__neqf(error, 0))
128 {
129 break;
130 }
131 }
132 }
133
134 *targetFreq = sourceFreq / bestDiv;
135
136 return (bestDiv / 2) - 1;
137 }
138
139
140 sint16 IfxDsadc_Dsadc_getAuxResult(IfxDsadc_Dsadc_Channel *channel)
141 {
142 return IfxDsadc_getAuxResult(channel->module, channel->channelId);
143 }
144
145
146 IFX_STATIC void IfxDsadc_Dsadc_initAuxFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_AuxFilterConfig *config)
147 {
148 Ifx_DSADC_CH_FCFGA fcfga;
149
150 fcfga.U = 0;
151
152 fcfga.B.CFADF = config->decimationFactor - 1;
153 fcfga.B.CFAC = config->combFilterType;
154
155 fcfga.B.SRGA = config->serviceRequest;
156 fcfga.B.ESEL = config->eventSelect;
157 fcfga.B.EGT = config->eventGate;
158
159 fcfga.B.AFSC = config->combFilterShift;
160
161 (channel->channel)->FCFGA = fcfga;
162 }
163
164
165 void IfxDsadc_Dsadc_initCarrierGen(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_CarrierGenConfig *config)
166 {
167 Ifx_DSADC_CGCFG cgcfg;
168
169 cgcfg.U = 0;
170
171 float32 sourceFreq = IfxDsadc_getModulatorInputClockFreq(dsadc->dsadc);
172 float32 targetFreq = config->frequency;
173 cgcfg.B.DIVCG = IfxDsadc_Dsadc_calcDIVx(sourceFreq / (32 * 32), &targetFreq);
174 cgcfg.B.SIGPOL = (config->inverted == FALSE) ? 0 : 1;
175 cgcfg.B.BREV = (config->bitReversed == FALSE) ? 0 : 1;
176 cgcfg.B.CGMOD = config->carrierWaveformMode;
177
178 dsadc->dsadc->CGCFG = cgcfg;
179
180 const IfxDsadc_Cgpwm_Out *pinPos = config->pinPos;
181
182 if (pinPos != NULL_PTR)
183 { /* Initialise positive carrier pin */
184 IfxDsadc_initCgPwmPin(pinPos, config->pinMode, config->pinDriver);
185 }
186
187 const IfxDsadc_Cgpwm_Out *pinNeg = config->pinNeg;
188
189 if (pinNeg != NULL_PTR)
190 { /* Initialise negative carrier pin */
191 IfxDsadc_initCgPwmPin(pinNeg, config->pinMode, config->pinDriver);
192 }
193 }
194
195
196 void IfxDsadc_Dsadc_initChannel(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ChannelConfig *config)
197 {
198 Ifx_DSADC *dsadc = config->module;
199
200 channel->channelId = config->channelId;
201 channel->module = dsadc;
202 channel->channel = (Ifx_DSADC_CH *)&dsadc->CH[config->channelId];
203
204 IfxDsadc_Dsadc_initModulator(channel, &config->modulator);
205 IfxDsadc_Dsadc_initDemodulator(channel, &config->demodulator);
206 IfxDsadc_Dsadc_initCombFilter(channel, &config->combFilter);
207 IfxDsadc_Dsadc_initFirFilter(channel, &config->firFilter);
208 IfxDsadc_Dsadc_initIntegrator(channel, &config->integrator);
209 IfxDsadc_Dsadc_initAuxFilter(channel, &config->auxFilter);
210 IfxDsadc_Dsadc_initRectifier(channel, &config->rectifier);
211
212 const IfxDsadc_Dsadc_ChannelPins *pins = config->channelPins;
213
214 if (pins != NULL_PTR)
215 {
216 const IfxDsadc_Dsn_In *dsn = pins->dsn;
217
218 if (dsn != NULL_PTR)
219 {
220 IfxDsadc_initDsnPin(dsn, pins->dsnMode, pins->pinDriver);
221 }
222
223 const IfxDsadc_Dsp_In *dsp = pins->dsp;
224
225 if (dsp != NULL_PTR)
226 {
227 IfxDsadc_initDspPin(dsp, pins->dspMode, pins->pinDriver);
228 }
229
230 const IfxDsadc_Cin_In *cin = pins->cin;
231
232 if (cin != NULL_PTR)
233 {
234 IfxDsadc_initCinPin(cin, pins->cinMode, pins->pinDriver);
235 }
236
237 const IfxDsadc_Din_In *din = pins->din;
238
239 if (din != NULL_PTR)
240 {
241 IfxDsadc_initDinPin(din, pins->dinMode, pins->pinDriver);
242 }
243
244 const IfxDsadc_Itr_In *itr = pins->itr;
245
246 if (itr != NULL_PTR)
247 {
248 IfxDsadc_initItrPin(itr, pins->itrMode, pins->pinDriver);
249 }
250 }
251 }
252
253
254 void IfxDsadc_Dsadc_initChannelConfig(IfxDsadc_Dsadc_ChannelConfig *config, IfxDsadc_Dsadc *dsadc)
255 {
256 const IfxDsadc_Dsadc_ChannelConfig IfxDsadc_Dsadc_defaultChannelConfig = {
257 .modulator = {
258 .positiveInput = IfxDsadc_InputConfig_inputPin,
259 .negativeInput = IfxDsadc_InputConfig_referenceGround,
260 .inputGain = IfxDsadc_InputGain_factor1,
261 .inputPin = IfxDsadc_InputPin_a,
262 .modulatorClockFreq = 10.0e6,
263 .commonModeVoltage = IfxDsadc_CommonModeVoltage_c,
264 },
265 .demodulator = {
266 .inputDataSource = IfxDsadc_InputDataSource_onChipStandAlone,
267 .triggerInput = IfxDsadc_TriggerInput_a,
268 .integrationTrigger = IfxDsadc_IntegratorTrigger_bypassed,
269 .timestampTrigger = IfxDsadc_TimestampTrigger_noTrigger,
270 .sampleClockSource = IfxDsadc_SampleClockSource_internal,
271 .sampleStrobe = IfxDsadc_SampleStrobe_sampleOnRisingEdge,
272 },
273 .combFilter = {
274 .bypassed = FALSE,
275 .combFilterType = IfxDsadc_MainCombFilterType_comb3,
276 .combFilterShift = IfxDsadc_MainCombFilterShift_noShift,
277 .serviceRequest = IfxDsadc_MainServiceRequest_everyNewResult,
278 .decimationFactor = 50,
279 .startValue = 0,
280 },
281 .firFilter = {
282 .fir0Enabled = FALSE,
283 .fir1Enabled = FALSE,
284 .offsetCompensation = FALSE,
285 .dataShift = IfxDsadc_FirDataShift_noShift,
286 .internalShift = IfxDsadc_FirInternalShift_noShift,
287 },
288 .integrator = {
289 .windowSize = IfxDsadc_IntegrationWindowSize_internalControl,
290 .discardCount = 0,
291 .integrationCount = 20,
292 .integrationCycles = 1,
293 },
294 .auxFilter = {
295 .bypassed = TRUE,
296 .combFilterType = IfxDsadc_AuxCombFilterType_comb1,
297 .combFilterShift = IfxDsadc_AuxCombFilterShift_noShift,
298 .serviceRequest = IfxDsadc_AuxServiceRequest_never,
299 .eventSelect = IfxDsadc_AuxEvent_everyNewResult,
300 .eventGate = IfxDsadc_AuxGate_definedByESEL,
301 .decimationFactor = 4,
302 },
303 .rectifier = {
304 .enabled = FALSE,
305 .signSource = IfxDsadc_RectifierSignSource_onChipGenerator,
306 .signDelay = 0,
307 .signPeriod = 0,
308 },
309
310 .channelPins = NULL_PTR
311 };
312
313 *config = IfxDsadc_Dsadc_defaultChannelConfig;
314 config->channelId = IfxDsadc_ChannelId_0;
315
316 if (dsadc != NULL_PTR)
317 {
318 config->module = dsadc->dsadc;
319 }
320 else
321 {
322 config->module = NULL_PTR;
323 }
324 }
325
326
327 IFX_STATIC void IfxDsadc_Dsadc_initCombFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_CombFilterConfig *config)
328 {
329 Ifx_DSADC_CH_FCFGC fcfgc;
330
331 fcfgc.U = 0;
332
333 fcfgc.B.CFMDF = config->decimationFactor - 1;
334 fcfgc.B.CFMC = config->combFilterType;
335 fcfgc.B.CFEN = (config->bypassed == FALSE) ? 1 : 0;
336
337 fcfgc.B.MFSC = config->combFilterShift;
338
339 fcfgc.B.SRGM = config->serviceRequest;
340 fcfgc.B.CFMSV = config->startValue - 1;
341
342 (channel->channel)->FCFGC = fcfgc;
343 }
344
345
346 IFX_STATIC void IfxDsadc_Dsadc_initDemodulator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_DemodulatorConfig *config)
347 {
348 Ifx_DSADC_CH_DICFG dicfg;
349
350 dicfg.U = 0;
351
352 dicfg.B.DSRC = config->inputDataSource;
353 dicfg.B.DSWC = 1; // enable write access for this bitfield
354
355 dicfg.B.ITRMODE = config->integrationTrigger;
356 dicfg.B.TSTRMODE = config->timestampTrigger;
357 dicfg.B.TRSEL = config->triggerInput;
358 dicfg.B.TRWC = 1; // enable write access for these bitfields
359
360 dicfg.B.CSRC = config->sampleClockSource;
361 dicfg.B.STROBE = config->sampleStrobe;
362 dicfg.B.SCWC = 1; // enable write access for these bitfields
363
364 (channel->channel)->DICFG = dicfg;
365 }
366
367
368 IFX_STATIC void IfxDsadc_Dsadc_initFirFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_FirFilterConfig *config)
369 {
370 Ifx_DSADC_CH_FCFGM fcfgm;
371
372 fcfgm.U = 0;
373
374 fcfgm.B.FIR0EN = (config->fir0Enabled != FALSE) ? 1 : 0;
375 fcfgm.B.FIR1EN = (config->fir1Enabled != FALSE) ? 1 : 0;
376 fcfgm.B.OCEN = (config->offsetCompensation != FALSE) ? 1 : 0;
377 fcfgm.B.DSH = config->dataShift;
378 fcfgm.B.FSH = config->internalShift;
379
380 (channel->channel)->FCFGM = fcfgm;
381 }
382
383
384 IFX_STATIC void IfxDsadc_Dsadc_initIntegrator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_IntegratorConfig *config)
385 {
386 Ifx_DSADC_CH_IWCTR iwctr;
387
388 iwctr.U = 0;
389
390 iwctr.B.REPVAL = config->integrationCycles - 1;
391 iwctr.B.NVALDIS = config->discardCount;
392 iwctr.B.IWS = config->windowSize;
393 iwctr.B.NVALINT = config->integrationCount - 1;
394
395 (channel->channel)->IWCTR = iwctr;
396 }
397
398
399 IFX_STATIC void IfxDsadc_Dsadc_initModulator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ModulatorConfig *config)
400 {
401 Ifx_DSADC_CH_MODCFG modcfg;
402
403 modcfg.U = 0;
404
405 modcfg.B.INCFGP = config->positiveInput;
406 modcfg.B.INCFGN = config->negativeInput;
407 modcfg.B.GAINSEL = config->inputGain;
408 modcfg.B.INSEL = config->inputPin;
409 modcfg.B.INCWC = 1; // enable write access for these bitfields
410
411 float32 targetFreq = config->modulatorClockFreq;
412 float32 sourceFreq = IfxDsadc_getModulatorInputClockFreq(channel->module);
413 modcfg.B.DIVM = IfxDsadc_Dsadc_calcDIVx(sourceFreq, &targetFreq);
414 modcfg.B.DWC = 1; // enable write access for this bitfield
415
416 modcfg.B.CMVS = config->commonModeVoltage;
417 modcfg.B.GCEN = 0; // normal operation (calibration mode disabled)
418 modcfg.B.MWC = 1; // enable write access for these bitfields
419
420 (channel->channel)->MODCFG = modcfg;
421 }
422
423
424 void IfxDsadc_Dsadc_initModule(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_Config *config)
425 {
426 Ifx_DSADC *dsadcSFR = config->dsadc;
427
428 dsadc->dsadc = dsadcSFR;
429
430 {
431 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
432 IfxScuWdt_clearCpuEndinit(passwd);
433 dsadcSFR->CLC.U = 0x00000000;
434
435 if (dsadcSFR->CLC.U)
436 {} // sync access
437
438 IfxScuWdt_setCpuEndinit(passwd);
439
440 {
441 Ifx_DSADC_GLOBCFG globcfg;
442 globcfg.U = dsadcSFR->GLOBCFG.U;
443
444 globcfg.B.MCSEL = config->modulatorClockSelect;
445 globcfg.B.LOSUP = config->lowPowerSupply;
446 globcfg.B.PSWC = 1;
447
448 dsadcSFR->GLOBCFG.U = globcfg.U;
449 }
450 }
451 }
452
453
454 void IfxDsadc_Dsadc_initModuleConfig(IfxDsadc_Dsadc_Config *config, Ifx_DSADC *dsadc)
455 {
456 const IfxDsadc_Dsadc_Config IfxDsadc_Dsadc_defaultConfig = {
457 .modulatorClockSelect = IfxDsadc_ModulatorClock_fDSD,
458 .lowPowerSupply = IfxDsadc_LowPowerSupply_5V
459 };
460
461 *config = IfxDsadc_Dsadc_defaultConfig;
462 config->dsadc = dsadc;
463 }
464
465
466 IFX_STATIC void IfxDsadc_Dsadc_initRectifier(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_RectifierConfig *config)
467 {
468 Ifx_DSADC_CH_RECTCFG rect;
469
470 rect.U = 0;
471 rect.B.RFEN = config->enabled;
472 rect.B.SSRC = config->signSource;
473 (channel->channel)->RECTCFG = rect;
474 (channel->channel)->CGSYNC.B.SDPOS = config->signDelay;
475 (channel->channel)->CGSYNC.B.SDNEG = config->signDelay + (config->signPeriod / 2);
476 (channel->channel)->IWCTR.B.NVALDIS = config->signDelay + 1;
477 }
478
479
480 void IfxDsadc_Dsadc_initCarrierGenConfig(IfxDsadc_Dsadc_CarrierGenConfig *config)
481 {
482 config->bitReversed = FALSE;
483 config->carrierWaveformMode = IfxDsadc_CarrierWaveformMode_sine;
484 config->frequency = 10000;
485 config->inverted = FALSE;
486 config->pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
487 config->pinMode = IfxPort_OutputMode_pushPull;
488 config->pinNeg = NULL_PTR;
489 config->pinPos = NULL_PTR;
490 }
IfxDsadc_Dsadc_AuxFilterConfig::combFilterShift
IfxDsadc_AuxCombFilterShift combFilterShift
Comb Filter (auxiliary) shift control.
Definition: IfxDsadc_Dsadc.h:196
IfxDsadc_Dsadc_FirFilterConfig::fir0Enabled
boolean fir0Enabled
FIR filter 0 enable/disable selection.
Definition: IfxDsadc_Dsadc.h:248
IfxDsadc_Cgpwm_Out
CGPWM pin mapping structure.
Definition: IfxDsadc_PinMap.h:101
IfxDsadc_Dsadc::dsadc
Ifx_DSADC * dsadc
Specifies the pointer to the DSADC module registers.
Definition: IfxDsadc_Dsadc.h:295
IfxDsadc_Dsadc_initDemodulator
IFX_STATIC void IfxDsadc_Dsadc_initDemodulator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_DemodulatorConfig *config)
Initialises the demodulator.
Definition: IfxDsadc_Dsadc.c:346
IfxDsadc_InputConfig_inputPin
Modulator input connected to external pin.
Definition: IfxDsadc.h:181
IfxDsadc_Dsadc_AuxFilterConfig::decimationFactor
uint8 decimationFactor
CIC Filter (Auxiliary) decimation factor (4 .. 32)
Definition: IfxDsadc_Dsadc.h:200
IfxDsadc_Dsadc_ChannelPins::din
IFX_CONST IfxDsadc_Din_In * din
the DIN Pin which should be configured
Definition: IfxDsadc_Dsadc.h:209
IfxDsadc_Dsadc_DemodulatorConfig
Demodulator configuration structure.
Definition: IfxDsadc_Dsadc.h:234
IfxDsadc_Dsp_In
DS positive pin mapping structure.
Definition: IfxDsadc_PinMap.h:65
__neqf
#define __neqf
Definition: IfxCpu_IntrinsicsDcc.h:1665
IfxDsadc_Dsadc_Channel::module
Ifx_DSADC * module
Specifies the pointer to the DSADC module registers.
Definition: IfxDsadc_Dsadc.h:316
IfxDsadc_Dsadc_ChannelPins::dsnMode
IfxPort_InputMode dsnMode
the DSN pin output mode which should be configured
Definition: IfxDsadc_Dsadc.h:214
IfxDsadc_Dsadc_IntegratorConfig::discardCount
uint16 discardCount
Number of discarded values to after active trigger: 1 .. 64.
Definition: IfxDsadc_Dsadc.h:260
IfxDsadc_Dsadc_ChannelConfig::channelPins
IFX_CONST IfxDsadc_Dsadc_ChannelPins * channelPins
Channel Pins Configuration structure.
Definition: IfxDsadc_Dsadc.h:334
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:133
IfxDsadc_MainCombFilterType_comb3
CIC3.
Definition: IfxDsadc.h:271
IfxDsadc_Dsadc_DemodulatorConfig::sampleClockSource
IfxDsadc_SampleClockSource sampleClockSource
Demodulator sample clock source selection.
Definition: IfxDsadc_Dsadc.h:240
IfxDsadc_Dsadc_CombFilterConfig
Comb filter configuration structure.
Definition: IfxDsadc_Dsadc.h:222
IfxDsadc_Dsadc_initChannel
void IfxDsadc_Dsadc_initChannel(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ChannelConfig *config)
Initialise a DSADC channel with the supplied configuration.
Definition: IfxDsadc_Dsadc.c:196
IfxDsadc_Dsadc_IntegratorConfig
Integrator configuration structure.
Definition: IfxDsadc_Dsadc.h:257
IfxDsadc_Dsadc_initCombFilter
IFX_STATIC void IfxDsadc_Dsadc_initCombFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_CombFilterConfig *config)
Initialises the comb filter.
Definition: IfxDsadc_Dsadc.c:327
IfxDsadc_LowPowerSupply_5V
Supply Voltage for Analog Circuitry set to 5V.
Definition: IfxDsadc.h:249
IfxDsadc_Dsadc.h
DSADC DSADC details.
IfxDsadc_Dsadc_ModulatorConfig::negativeInput
IfxDsadc_InputConfig negativeInput
Modulator configuration of negative input line.
Definition: IfxDsadc_Dsadc.h:270
IfxDsadc_InputPin_a
Pin A connected to modulator input.
Definition: IfxDsadc.h:217
IfxDsadc_Dsadc_initIntegrator
IFX_STATIC void IfxDsadc_Dsadc_initIntegrator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_IntegratorConfig *config)
Initialises the integrator.
Definition: IfxDsadc_Dsadc.c:384
IfxDsadc_Dsadc_ChannelPins::dinMode
IfxPort_InputMode dinMode
the DIN pin input mode which should be configured
Definition: IfxDsadc_Dsadc.h:210
IfxDsadc_getAuxResult
IFX_INLINE sint16 IfxDsadc_getAuxResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the auxiliary chain.
Definition: IfxDsadc.h:629
IfxDsadc_Dsadc_Config::modulatorClockSelect
IfxDsadc_ModulatorClock modulatorClockSelect
Modulator clock selection.
Definition: IfxDsadc_Dsadc.h:342
IfxDsadc_Dsadc_CarrierGenConfig::pinDriver
IfxPort_PadDriver pinDriver
Carrier pins pad driver.
Definition: IfxDsadc_Dsadc.h:309
IfxDsadc_AuxGate_definedByESEL
Separate: generate events according to ESEL.
Definition: IfxDsadc.h:110
float32
float float32
Definition: Platform_Types.h:170
IfxDsadc_Dsadc_ChannelConfig::rectifier
IfxDsadc_Dsadc_RectifierConfig rectifier
Rectifier configuration structure.
Definition: IfxDsadc_Dsadc.h:333
IfxDsadc_InputDataSource_onChipStandAlone
On-chip modulator, standalone (3rd order)
Definition: IfxDsadc.h:192
IfxDsadc_MainCombFilterShift_noShift
no shift, use full range
Definition: IfxDsadc.h:258
IfxDsadc_Dsadc_Channel::channelId
IfxDsadc_ChannelId channelId
Channel Id.
Definition: IfxDsadc_Dsadc.h:318
IfxDsadc_Dsadc_DemodulatorConfig::inputDataSource
IfxDsadc_InputDataSource inputDataSource
Demodulator input data source selection.
Definition: IfxDsadc_Dsadc.h:236
IfxDsadc_InputConfig_referenceGround
Modulator input connected to reference ground V_ref.
Definition: IfxDsadc.h:184
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxDsadc_Dsadc_initModuleConfig
void IfxDsadc_Dsadc_initModuleConfig(IfxDsadc_Dsadc_Config *config, Ifx_DSADC *dsadc)
Initialise the config struct with default DSADC configuration.
Definition: IfxDsadc_Dsadc.c:454
IfxDsadc_Dsadc_CarrierGenConfig::bitReversed
boolean bitReversed
Bit-Reverse PWM Generation (Normal / Bit reverse mode) selection.
Definition: IfxDsadc_Dsadc.h:304
IfxDsadc_Dsadc_initRectifier
IFX_STATIC void IfxDsadc_Dsadc_initRectifier(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_RectifierConfig *config)
Initialises the rectifier.
Definition: IfxDsadc_Dsadc.c:466
IfxDsadc_Dsadc
DSADC handle data structure.
Definition: IfxDsadc_Dsadc.h:293
IfxDsadc_Dsadc_AuxFilterConfig
Auxiliary comb filter configuration structure.
Definition: IfxDsadc_Dsadc.h:192
IfxDsadc_IntegrationWindowSize_internalControl
Internal control: stop integrator after REPVAL+1 integration cycles.
Definition: IfxDsadc.h:228
IfxDsadc_Dsadc_FirFilterConfig::internalShift
IfxDsadc_FirInternalShift internalShift
FIR shift control selction.
Definition: IfxDsadc_Dsadc.h:252
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxDsadc_IntegratorTrigger_bypassed
No integration trigger, integrator bypassed.
Definition: IfxDsadc.h:238
IfxDsadc_Dsadc_ChannelConfig::firFilter
IfxDsadc_Dsadc_FirFilterConfig firFilter
FIR filters configuration structure.
Definition: IfxDsadc_Dsadc.h:330
IfxDsadc_Itr_In
ITR pin mapping structure.
Definition: IfxDsadc_PinMap.h:92
FALSE
#define FALSE
Definition: Platform_Types.h:93
__leqf
#define __leqf
Definition: IfxCpu_IntrinsicsDcc.h:1669
IfxDsadc_Dsadc_FirFilterConfig::dataShift
IfxDsadc_FirDataShift dataShift
FIR data shift control selection.
Definition: IfxDsadc_Dsadc.h:251
IfxDsadc_Dsadc_CarrierGenConfig::pinPos
IFX_CONST IfxDsadc_Cgpwm_Out * pinPos
Positive-carrier pin configuration.
Definition: IfxDsadc_Dsadc.h:306
sint16
short sint16
Definition: Platform_Types.h:129
IfxDsadc_Dsadc_AuxFilterConfig::serviceRequest
IfxDsadc_AuxServiceRequest serviceRequest
Service request generation (auxiliary)
Definition: IfxDsadc_Dsadc.h:197
IfxDsadc_Dsadc_CarrierGenConfig::frequency
float32 frequency
Expected excitation frequency in Hz.
Definition: IfxDsadc_Dsadc.h:305
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxDsadc_Dsadc_IntegratorConfig::integrationCount
uint16 integrationCount
Number of integrated values after discard step: 1 .. 64.
Definition: IfxDsadc_Dsadc.h:261
IfxDsadc_SampleClockSource_internal
Internal clock.
Definition: IfxDsadc.h:337
IfxDsadc_Dsadc_CombFilterConfig::decimationFactor
uint16 decimationFactor
4 .. 256
Definition: IfxDsadc_Dsadc.h:228
IfxDsadc_Dsadc_Channel
Channel handle structure.
Definition: IfxDsadc_Dsadc.h:314
__absf
#define __absf
Definition: IfxCpu_IntrinsicsDcc.h:1629
IfxDsadc_MainServiceRequest_everyNewResult
Always, for each new result value.
Definition: IfxDsadc.h:283
IfxDsadc_Dsadc_ChannelPins::dsn
IFX_CONST IfxDsadc_Dsn_In * dsn
the DSN Pin which should be configured
Definition: IfxDsadc_Dsadc.h:213
IfxDsadc_Dsadc_IntegratorConfig::windowSize
IfxDsadc_IntegrationWindowSize windowSize
Integrator window size.
Definition: IfxDsadc_Dsadc.h:259
IfxDsadc_Dsadc_FirFilterConfig::fir1Enabled
boolean fir1Enabled
FIR filter 0 enable/disable selection.
Definition: IfxDsadc_Dsadc.h:249
IfxDsadc_Dsadc_initAuxFilter
IFX_STATIC void IfxDsadc_Dsadc_initAuxFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_AuxFilterConfig *config)
Initialises the auxilary filter.
Definition: IfxDsadc_Dsadc.c:146
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:144
IfxDsadc_Dsadc_ModulatorConfig::positiveInput
IfxDsadc_InputConfig positiveInput
Modulator configuration of positive input line.
Definition: IfxDsadc_Dsadc.h:269
IfxDsadc_Dsadc_Config
Clock configuration data structure.
Definition: IfxDsadc_Dsadc.h:339
IfxDsadc_Dsadc_CarrierGenConfig::pinMode
IfxPort_OutputMode pinMode
Carrier pins output mode.
Definition: IfxDsadc_Dsadc.h:308
IfxDsadc_Dsadc_CarrierGenConfig::pinNeg
IFX_CONST IfxDsadc_Cgpwm_Out * pinNeg
Negative-carrier pin configuration.
Definition: IfxDsadc_Dsadc.h:307
IfxDsadc_Dsadc_CombFilterConfig::startValue
uint16 startValue
4 .. decimationFactor
Definition: IfxDsadc_Dsadc.h:229
IfxDsadc_Dsadc_ChannelConfig::modulator
IfxDsadc_Dsadc_ModulatorConfig modulator
Modulator configuration structure.
Definition: IfxDsadc_Dsadc.h:327
IfxDsadc_Dsadc_getAuxResult
sint16 IfxDsadc_Dsadc_getAuxResult(IfxDsadc_Dsadc_Channel *channel)
Get result from the auxilary chain.
Definition: IfxDsadc_Dsadc.c:140
IfxDsadc_CarrierWaveformMode_sine
Carrier Generator generates sine wave.
Definition: IfxDsadc.h:132
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxDsadc_getModulatorInputClockFreq
float32 IfxDsadc_getModulatorInputClockFreq(Ifx_DSADC *dsadc)
Get the input frequency of DSADC in Hz.
Definition: IfxDsadc.c:134
IfxDsadc_Dsadc_initFirFilter
IFX_STATIC void IfxDsadc_Dsadc_initFirFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_FirFilterConfig *config)
Initialises the fir filter.
Definition: IfxDsadc_Dsadc.c:368
IfxDsadc_Dsadc_ChannelPins::itr
IFX_CONST IfxDsadc_Itr_In * itr
the ITR Pin which should be configured
Definition: IfxDsadc_Dsadc.h:211
IfxDsadc_Dsadc_ChannelConfig::integrator
IfxDsadc_Dsadc_IntegratorConfig integrator
Integrator configuration structure.
Definition: IfxDsadc_Dsadc.h:331
IfxDsadc_Dsadc_Channel::channel
Ifx_DSADC_CH * channel
Specifies the pointer to the DSADC channel registers.
Definition: IfxDsadc_Dsadc.h:317
IfxDsadc_Dsadc_ChannelConfig::combFilter
IfxDsadc_Dsadc_CombFilterConfig combFilter
Comb filter configuration structure.
Definition: IfxDsadc_Dsadc.h:329
IfxDsadc_Dsadc_Config::lowPowerSupply
IfxDsadc_LowPowerSupply lowPowerSupply
Low power supply voltage selection.
Definition: IfxDsadc_Dsadc.h:343
IfxDsadc_Dsadc_RectifierConfig::signDelay
uint8 signDelay
Sign delay value.
Definition: IfxDsadc_Dsadc.h:283
IfxDsadc_Dsadc_ModulatorConfig::modulatorClockFreq
float32 modulatorClockFreq
Modulator clock frequency.
Definition: IfxDsadc_Dsadc.h:273
IfxDsadc_Dsadc_CombFilterConfig::combFilterShift
IfxDsadc_MainCombFilterShift combFilterShift
Comb Filter (Main Chain) shift control.
Definition: IfxDsadc_Dsadc.h:226
IfxDsadc_initCinPin
IFX_INLINE void IfxDsadc_initCinPin(const IfxDsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver)
Initializes a CIN input.
Definition: IfxDsadc.h:654
IfxDsadc_Dsadc_AuxFilterConfig::eventSelect
IfxDsadc_AuxEvent eventSelect
Service request generation (auxiliary)
Definition: IfxDsadc_Dsadc.h:198
IfxDsadc_Dsadc_FirFilterConfig
FIR filters configuration structure.
Definition: IfxDsadc_Dsadc.h:246
IfxDsadc_Dsadc_DemodulatorConfig::triggerInput
IfxDsadc_TriggerInput triggerInput
Trigger selection.
Definition: IfxDsadc_Dsadc.h:237
IfxDsadc_Dsadc_ModulatorConfig::inputPin
IfxDsadc_InputPin inputPin
Modulator input pin selection.
Definition: IfxDsadc_Dsadc.h:272
IfxDsadc_Dsadc_CarrierGenConfig::carrierWaveformMode
IfxDsadc_CarrierWaveformMode carrierWaveformMode
Carrier generation mode.
Definition: IfxDsadc_Dsadc.h:302
IfxDsadc_Dsadc_ModulatorConfig
Modulator configuration structure.
Definition: IfxDsadc_Dsadc.h:267
IfxDsadc_Dsadc_ModulatorConfig::commonModeVoltage
IfxDsadc_CommonModeVoltage commonModeVoltage
Modulator common mode voltage selection.
Definition: IfxDsadc_Dsadc.h:274
IfxDsadc_AuxServiceRequest_never
Never, service requests disabled.
Definition: IfxDsadc.h:119
IfxDsadc_Dsadc_RectifierConfig
Rectifier configuration structure.
Definition: IfxDsadc_Dsadc.h:279
IfxDsadc_Dsadc_initCarrierGenConfig
void IfxDsadc_Dsadc_initCarrierGenConfig(IfxDsadc_Dsadc_CarrierGenConfig *config)
Definition: IfxDsadc_Dsadc.c:480
IfxDsadc_Dsadc_calcDIVx
IFX_STATIC sint32 IfxDsadc_Dsadc_calcDIVx(float32 sourceFreq, float32 *targetFreq)
calculate division factor
Definition: IfxDsadc_Dsadc.c:112
IfxDsadc_Dsadc_initModule
void IfxDsadc_Dsadc_initModule(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_Config *config)
Initialise the DSADC with the supplied configuration.
Definition: IfxDsadc_Dsadc.c:424
IfxDsadc_Dsadc_AuxFilterConfig::eventGate
IfxDsadc_AuxGate eventGate
Service request generation (auxiliary)
Definition: IfxDsadc_Dsadc.h:199
IfxDsadc_AuxEvent_everyNewResult
Always, for each new result value.
Definition: IfxDsadc.h:100
IfxDsadc_TimestampTrigger_noTrigger
No timestamp trigger.
Definition: IfxDsadc.h:371
IfxDsadc_RectifierSignSource_onChipGenerator
On-chip carrier generator.
Definition: IfxDsadc.h:326
IfxDsadc_Dsadc_DemodulatorConfig::timestampTrigger
IfxDsadc_TimestampTrigger timestampTrigger
Timestamp trigger mode selection.
Definition: IfxDsadc_Dsadc.h:239
IfxDsadc_initDspPin
IFX_INLINE void IfxDsadc_initDspPin(const IfxDsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input.
Definition: IfxDsadc.h:694
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxDsadc_Dsadc_AuxFilterConfig::combFilterType
IfxDsadc_AuxCombFilterType combFilterType
Comb Filter (auxiliary) configuration/type.
Definition: IfxDsadc_Dsadc.h:195
IfxDsadc_TriggerInput_a
dsadc trig 0
Definition: IfxDsadc.h:382
IfxDsadc_Dsadc_ChannelConfig
Single channel configuration structure.
Definition: IfxDsadc_Dsadc.h:323
IfxDsadc_Dsadc_ChannelPins::cinMode
IfxPort_InputMode cinMode
the CIN pin input mode which should be configured
Definition: IfxDsadc_Dsadc.h:208
IfxDsadc_AuxCombFilterType_comb1
CIC1.
Definition: IfxDsadc.h:89
IfxDsadc_Dsadc_CombFilterConfig::serviceRequest
IfxDsadc_MainServiceRequest serviceRequest
Service request generation (main chain)
Definition: IfxDsadc_Dsadc.h:227
IfxDsadc_initDinPin
IFX_INLINE void IfxDsadc_initDinPin(const IfxDsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver)
Initializes a DIN input.
Definition: IfxDsadc.h:674
IfxDsadc_Dsadc_ModulatorConfig::inputGain
IfxDsadc_InputGain inputGain
Modulator gain select of analog input path.
Definition: IfxDsadc_Dsadc.h:271
IfxDsadc_initItrPin
IFX_INLINE void IfxDsadc_initItrPin(const IfxDsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver)
Initializes a ITR input.
Definition: IfxDsadc.h:704
sint32
long sint32
Definition: Platform_Types.h:134
IfxDsadc_Dsadc_ChannelPins::itrMode
IfxPort_InputMode itrMode
the ITR pin input mode which should be configured
Definition: IfxDsadc_Dsadc.h:212
IfxDsadc_Dsadc_RectifierConfig::signPeriod
uint8 signPeriod
Sign period.
Definition: IfxDsadc_Dsadc.h:284
IfxDsadc_ModulatorClock_fDSD
f_dsd clock selected
Definition: IfxDsadc.h:292
IfxDsadc_initDsnPin
IFX_INLINE void IfxDsadc_initDsnPin(const IfxDsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input.
Definition: IfxDsadc.h:684
IfxDsadc_SampleStrobe_sampleOnRisingEdge
Direct clock, a sample trigger is generated at each rising clock edge.
Definition: IfxDsadc.h:349
IfxDsadc_Dsn_In
DS negative pin mapping structure.
Definition: IfxDsadc_PinMap.h:56
IfxDsadc_Dsadc_RectifierConfig::enabled
boolean enabled
Rectification enable/disable selection.
Definition: IfxDsadc_Dsadc.h:281
IfxDsadc_Dsadc_FirFilterConfig::offsetCompensation
boolean offsetCompensation
Offset Compensation Filter enable/disable selection.
Definition: IfxDsadc_Dsadc.h:250
IfxDsadc_Dsadc_ChannelPins::dsp
IFX_CONST IfxDsadc_Dsp_In * dsp
the DSP Pin which should be configured
Definition: IfxDsadc_Dsadc.h:215
IfxDsadc_Dsadc_RectifierConfig::signSource
IfxDsadc_RectifierSignSource signSource
Rectifier sign source.
Definition: IfxDsadc_Dsadc.h:282
IfxDsadc_FirInternalShift_noShift
no shift, use full range
Definition: IfxDsadc.h:172
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxDsadc_Dsadc_DemodulatorConfig::sampleStrobe
IfxDsadc_SampleStrobe sampleStrobe
Demodulator data strobe generation mode selection.
Definition: IfxDsadc_Dsadc.h:241
IfxDsadc_Dsadc_CombFilterConfig::combFilterType
IfxDsadc_MainCombFilterType combFilterType
Comb Filter (Main Chain) configuration/type.
Definition: IfxDsadc_Dsadc.h:225
IfxDsadc_Dsadc_initModulator
IFX_STATIC void IfxDsadc_Dsadc_initModulator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ModulatorConfig *config)
Initialises the modulator.
Definition: IfxDsadc_Dsadc.c:399
IfxDsadc_InputGain_factor1
Input gain factor: 1.
Definition: IfxDsadc.h:205
IfxDsadc_Dsadc_ChannelConfig::auxFilter
IfxDsadc_Dsadc_AuxFilterConfig auxFilter
Auxiliary comb filter configuration structure.
Definition: IfxDsadc_Dsadc.h:332
IfxDsadc_Dsadc_CombFilterConfig::bypassed
boolean bypassed
CIC Filter enable/bypass selection.
Definition: IfxDsadc_Dsadc.h:224
IfxDsadc_Dsadc_ChannelPins
Channel Pins Configuration structure.
Definition: IfxDsadc_Dsadc.h:205
IfxDsadc_Dsadc_IntegratorConfig::integrationCycles
uint16 integrationCycles
Number of integration cycles: 1 .. 16. Used only when IfxDsadc_IntegrationWindowSize_internalControl...
Definition: IfxDsadc_Dsadc.h:262
IfxDsadc_Dsadc_ChannelConfig::demodulator
IfxDsadc_Dsadc_DemodulatorConfig demodulator
Demodulator configuration structure.
Definition: IfxDsadc_Dsadc.h:328
IfxDsadc_ChannelId_0
Specifies the channel Index 0.
Definition: IfxDsadc.h:139
IfxDsadc_FirDataShift_noShift
no shift, use full range
Definition: IfxDsadc.h:160
IfxDsadc_Dsadc_ChannelPins::dspMode
IfxPort_InputMode dspMode
the DSP pin output mode which should be configured
Definition: IfxDsadc_Dsadc.h:216
IfxDsadc_Cin_In
CIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:74
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxDsadc_Dsadc_initCarrierGen
void IfxDsadc_Dsadc_initCarrierGen(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_CarrierGenConfig *config)
Initialise the DSADC carrier generator.
Definition: IfxDsadc_Dsadc.c:165
IfxDsadc_Din_In
DIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:83
IfxDsadc_initCgPwmPin
IFX_INLINE void IfxDsadc_initCgPwmPin(const IfxDsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a CGPWM output.
Definition: IfxDsadc.h:647
IfxDsadc_Dsadc_CarrierGenConfig
Carrier generation configuration structure.
Definition: IfxDsadc_Dsadc.h:300
IfxDsadc_CommonModeVoltage_c
VCM = VAREF / 2.0 (2.5 V for VAREF = 5.0 V), recommended for DC-coupled signals.
Definition: IfxDsadc.h:151
IfxDsadc_Dsadc_initChannelConfig
void IfxDsadc_Dsadc_initChannelConfig(IfxDsadc_Dsadc_ChannelConfig *config, IfxDsadc_Dsadc *dsadc)
Initialise the config struct with default DSADC channel configuration.
Definition: IfxDsadc_Dsadc.c:254
IfxDsadc_Dsadc_DemodulatorConfig::integrationTrigger
IfxDsadc_IntegratorTrigger integrationTrigger
Integrator trigger mode selection.
Definition: IfxDsadc_Dsadc.h:238
IfxDsadc_Dsadc_ChannelPins::cin
IFX_CONST IfxDsadc_Cin_In * cin
the CIN Pin which should be configured
Definition: IfxDsadc_Dsadc.h:207
IfxDsadc_Dsadc_CarrierGenConfig::inverted
boolean inverted
Signal polarity (Normal / Inverted) selection.
Definition: IfxDsadc_Dsadc.h:303
IfxDsadc_AuxCombFilterShift_noShift
no shift, use full range
Definition: IfxDsadc.h:78


iLLD_TC26B: IfxDsadc_Dsadc.h Source File

  • Dsadc
  • Dsadc
IfxDsadc_Dsadc.h
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc_Dsadc.h
3 * \brief DSADC DSADC details
4 * \ingroup IfxLld_Dsadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Dsadc_Dsadc_Usage How to use the DSADC Interface driver?
42 * \ingroup IfxLld_Dsadc
43 *
44 * The DSADC interface driver provides a default DSADC configuration for converting analog data streams inputs from external modulators via digital input channels, into digital values by using the on-chip demodulator channels.
45 *
46 * In the following sections it will be described, how to integrate the driver into the application framework.
47 *
48 * \section IfxLld_Dsadc_Dsadc_Preparation Preparation
49 * \subsection IfxLld_Dsadc_Dsadc_Include Include Files
50 *
51 * Include following header file into your C code:
52 * \code
53 * #include <Dsadc/Dsadc/IfxDsadc_Dsadc.h>
54 *
55 * \endcode
56 *
57 * \subsection IfxLld_Dsadc_Dsadc_Variables Variables
58 *
59 * Declare the DSADC channel handle and available channels as global variables in your C code:
60 *
61 * \code
62 * static IfxDsadc_Dsadc dsadc;
63 * IfxDsadc_Dsadc_Channel dsadcChannel[IFXDSADC_NUM_CHANNELS];
64 *
65 * #if defined(DERIVATIVE_TC22x) || defined(DERIVATIVE_TC23x) || defined(DERIVATIVE_TC24x)
66 * uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 0, 0, 1 };
67 *
68 * #elif defined(DERIVATIVE_TC27x) || defined(DERIVATIVE_TC27xB) || defined(DERIVATIVE_TC27xC) || defined(DERIVATIVE_TC27xD)
69 * uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 1, 1, 1, 1, 1 };
70 *
71 * #elif defined(DERIVATIVE_TC26x) || defined(DERIVATIVE_TC26xB)
72 * uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 0, 1, 1 };
73 *
74 * #elif defined(DERIVATIVE_TC29x) || defined(DERIVATIVE_TC29xB)
75 * uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
76 *
77 * #else
78 * # error "Testcase not prepared for this derivative!"
79 * #endif
80 * \endcode
81 *
82 *
83 * \subsection IfxLld_Dsadc_Dsadc_Init Module Initialisation
84 *
85 * The module initialisation can be done in the same function. Here an example:
86 * \code
87 *
88 * // create module config
89 * IfxDsadc_Dsadc_Config dsadcConfig;
90 * IfxDsadc_Dsadc_initModuleConfig(&dsadcConfig, &MODULE_DSADC);
91 *
92 * // initialize module
93 *
94 * IfxDsadc_Dsadc_initModule(&dsadc, &dsadcConfig);
95 *
96 * // create channel config
97 * IfxDsadc_Dsadc_ChannelConfig dsadcChannelConfig;
98 * IfxDsadc_Dsadc_initChannelConfig(&dsadcChannelConfig, &dsadc);
99 *
100 * // modify default configuration
101 * dsadcChannelConfig.modulator.positiveInput = IfxDsadc_InputConfig_inputPin;
102 * dsadcChannelConfig.modulator.negativeInput = IfxDsadc_InputConfig_inputPin;
103 * dsadcChannelConfig.modulator.inputGain = IfxDsadc_InputGain_factor1;
104 * dsadcChannelConfig.modulator.inputPin = IfxDsadc_InputPin_a;
105 * dsadcChannelConfig.modulator.modulatorClockFreq = 10.0e6;
106 * dsadcChannelConfig.modulator.commonModeVoltage = IfxDsadc_CommonModeVoltage_c;
107 *
108 * dsadcChannelConfig.combFilter.bypassed = FALSE;
109 * dsadcChannelConfig.combFilter.combFilterType = IfxDsadc_MainCombFilterType_comb3;
110 * dsadcChannelConfig.combFilter.combFilterShift = IfxDsadc_MainCombFilterShift_noShift;
111 * dsadcChannelConfig.combFilter.serviceRequest = IfxDsadc_MainServiceRequest_everyNewResult;
112 * dsadcChannelConfig.combFilter.decimationFactor = 32;
113 * dsadcChannelConfig.combFilter.startValue = 32;
114 *
115 * dsadcChannelConfig.firFilter.fir0Enabled = TRUE;
116 * dsadcChannelConfig.firFilter.fir1Enabled = TRUE;
117 * dsadcChannelConfig.firFilter.offsetCompensation = FALSE;
118 * dsadcChannelConfig.firFilter.dataShift = IfxDsadc_FirDataShift_shiftBy2;
119 * dsadcChannelConfig.firFilter.internalShift = IfxDsadc_FirInternalShift_shiftBy1;
120 *
121 *
122 * // initialize channels
123 * for(int chn=0; chn<IFXDSADC_NUM_CHANNELS; ++chn) {
124 * if( dsadcChannelAvailable[chn] ) {
125 * dsadcChannelConfig.channelId = (IfxDsadc_ChannelId)chn;
126 *
127 * IfxDsadc_Dsadc_initChannel(&dsadcChannel[chn], &dsadcChannelConfig);
128 * }
129 * }
130 * \endcode
131 *
132 * The DSADC is ready for use now!
133 *
134 *
135 * \section IfxLld_Dsadc_Dsadc_Conversions Conversions
136 *
137 * The DSADC driver provides simple to use Conversion function,
138 *
139 * \code
140 * // start conversions
141 * IfxDsadc_Dsadc_startScan(&dsadc, 0x3f, 0x3f);
142 *
143 * // results are now available in IFXDSADC(ds).CH[x].RESM.B.RESULT (x=0..5)
144 * \endcode
145 *
146 * The converted data can be collected using the following function
147 *
148 * \code
149 * // declared globally
150 * // sint16 result[];
151 * for(int chn=0; chn<IFXDSADC_NUM_CHANNELS; ++chn) {
152 * if( dsadcChannelAvailable[chn] ) {
153 * result = IfxDsadc_Dsadc_getMainResult(&dsadcChannel[chn]));
154 * }
155 * }
156 * \endcode
157 *
158 * \defgroup IfxLld_Dsadc_Dsadc DSADC
159 * \ingroup IfxLld_Dsadc
160 * \defgroup IfxLld_Dsadc_Dsadc_DataStructures Data Structures
161 * \ingroup IfxLld_Dsadc_Dsadc
162 * \defgroup IfxLld_Dsadc_Dsadc_Module Module Functions
163 * \ingroup IfxLld_Dsadc_Dsadc
164 * \defgroup IfxLld_Dsadc_Dsadc_Channel Channel Functions
165 * \ingroup IfxLld_Dsadc_Dsadc
166 * \defgroup IfxLld_Dsadc_Dsadc_Operative Operative Functions
167 * \ingroup IfxLld_Dsadc_Dsadc
168 * \defgroup IfxLld_Dsadc_Dsadc_Results Result Functions
169 * \ingroup IfxLld_Dsadc_Dsadc
170 * \defgroup IfxLld_Dsadc_Dsadc_Interrupt Interrupt Functions
171 * \ingroup IfxLld_Dsadc_Dsadc
172 */
173
174 #ifndef IFXDSADC_DSADC_H
175 #define IFXDSADC_DSADC_H 1
176
177 /******************************************************************************/
178 /*----------------------------------Includes----------------------------------*/
179 /******************************************************************************/
180
181 #include "Dsadc/Std/IfxDsadc.h"
182 #include "Scu/Std/IfxScuWdt.h"
183
184 /******************************************************************************/
185 /*-----------------------------Data Structures--------------------------------*/
186 /******************************************************************************/
187
188 /** \addtogroup IfxLld_Dsadc_Dsadc_DataStructures
189 * \{ */
190 /** \brief Auxiliary comb filter configuration structure
191 */
192 typedef struct
193 {
194 boolean bypassed;
195 IfxDsadc_AuxCombFilterType combFilterType; /**< \brief Comb Filter (auxiliary) configuration/type */
196 IfxDsadc_AuxCombFilterShift combFilterShift; /**< \brief Comb Filter (auxiliary) shift control */
197 IfxDsadc_AuxServiceRequest serviceRequest; /**< \brief Service request generation (auxiliary) */
198 IfxDsadc_AuxEvent eventSelect; /**< \brief Service request generation (auxiliary) */
199 IfxDsadc_AuxGate eventGate; /**< \brief Service request generation (auxiliary) */
200 uint8 decimationFactor; /**< \brief CIC Filter (Auxiliary) decimation factor (4 .. 32) */
201 } IfxDsadc_Dsadc_AuxFilterConfig;
202
203 /** \brief Channel Pins Configuration structure
204 */
205 typedef struct
206 {
207 IFX_CONST IfxDsadc_Cin_In *cin; /**< \brief the CIN Pin which should be configured */
208 IfxPort_InputMode cinMode; /**< \brief the CIN pin input mode which should be configured */
209 IFX_CONST IfxDsadc_Din_In *din; /**< \brief the DIN Pin which should be configured */
210 IfxPort_InputMode dinMode; /**< \brief the DIN pin input mode which should be configured */
211 IFX_CONST IfxDsadc_Itr_In *itr; /**< \brief the ITR Pin which should be configured */
212 IfxPort_InputMode itrMode; /**< \brief the ITR pin input mode which should be configured */
213 IFX_CONST IfxDsadc_Dsn_In *dsn; /**< \brief the DSN Pin which should be configured */
214 IfxPort_InputMode dsnMode; /**< \brief the DSN pin output mode which should be configured */
215 IFX_CONST IfxDsadc_Dsp_In *dsp; /**< \brief the DSP Pin which should be configured */
216 IfxPort_InputMode dspMode; /**< \brief the DSP pin output mode which should be configured */
217 IfxPort_PadDriver pinDriver; /**< \brief Pin Driver Configuration */
218 } IfxDsadc_Dsadc_ChannelPins;
219
220 /** \brief Comb filter configuration structure
221 */
222 typedef struct
223 {
224 boolean bypassed; /**< \brief CIC Filter enable/bypass selection */
225 IfxDsadc_MainCombFilterType combFilterType; /**< \brief Comb Filter (Main Chain) configuration/type */
226 IfxDsadc_MainCombFilterShift combFilterShift; /**< \brief Comb Filter (Main Chain) shift control */
227 IfxDsadc_MainServiceRequest serviceRequest; /**< \brief Service request generation (main chain) */
228 uint16 decimationFactor; /**< \brief 4 .. 256 */
229 uint16 startValue; /**< \brief 4 .. decimationFactor */
230 } IfxDsadc_Dsadc_CombFilterConfig;
231
232 /** \brief Demodulator configuration structure
233 */
234 typedef struct
235 {
236 IfxDsadc_InputDataSource inputDataSource; /**< \brief Demodulator input data source selection */
237 IfxDsadc_TriggerInput triggerInput; /**< \brief Trigger selection */
238 IfxDsadc_IntegratorTrigger integrationTrigger; /**< \brief Integrator trigger mode selection */
239 IfxDsadc_TimestampTrigger timestampTrigger; /**< \brief Timestamp trigger mode selection */
240 IfxDsadc_SampleClockSource sampleClockSource; /**< \brief Demodulator sample clock source selection */
241 IfxDsadc_SampleStrobe sampleStrobe; /**< \brief Demodulator data strobe generation mode selection */
242 } IfxDsadc_Dsadc_DemodulatorConfig;
243
244 /** \brief FIR filters configuration structure
245 */
246 typedef struct
247 {
248 boolean fir0Enabled; /**< \brief FIR filter 0 enable/disable selection */
249 boolean fir1Enabled; /**< \brief FIR filter 0 enable/disable selection */
250 boolean offsetCompensation; /**< \brief Offset Compensation Filter enable/disable selection */
251 IfxDsadc_FirDataShift dataShift; /**< \brief FIR data shift control selection */
252 IfxDsadc_FirInternalShift internalShift; /**< \brief FIR shift control selction */
253 } IfxDsadc_Dsadc_FirFilterConfig;
254
255 /** \brief Integrator configuration structure
256 */
257 typedef struct
258 {
259 IfxDsadc_IntegrationWindowSize windowSize; /**< \brief Integrator window size */
260 uint16 discardCount; /**< \brief Number of discarded values to after active trigger: 1 .. 64 */
261 uint16 integrationCount; /**< \brief Number of integrated values after discard step: 1 .. 64 */
262 uint16 integrationCycles; /**< \brief Number of integration cycles: 1 .. 16. Used only when \ref IfxDsadc_IntegrationWindowSize_internalControl */
263 } IfxDsadc_Dsadc_IntegratorConfig;
264
265 /** \brief Modulator configuration structure
266 */
267 typedef struct
268 {
269 IfxDsadc_InputConfig positiveInput; /**< \brief Modulator configuration of positive input line */
270 IfxDsadc_InputConfig negativeInput; /**< \brief Modulator configuration of negative input line */
271 IfxDsadc_InputGain inputGain; /**< \brief Modulator gain select of analog input path */
272 IfxDsadc_InputPin inputPin; /**< \brief Modulator input pin selection */
273 float32 modulatorClockFreq; /**< \brief Modulator clock frequency */
274 IfxDsadc_CommonModeVoltage commonModeVoltage; /**< \brief Modulator common mode voltage selection */
275 } IfxDsadc_Dsadc_ModulatorConfig;
276
277 /** \brief Rectifier configuration structure
278 */
279 typedef struct
280 {
281 boolean enabled; /**< \brief Rectification enable/disable selection */
282 IfxDsadc_RectifierSignSource signSource; /**< \brief Rectifier sign source */
283 uint8 signDelay; /**< \brief Sign delay value */
284 uint8 signPeriod; /**< \brief Sign period */
285 } IfxDsadc_Dsadc_RectifierConfig;
286
287 /** \} */
288
289 /** \addtogroup IfxLld_Dsadc_Dsadc_DataStructures
290 * \{ */
291 /** \brief DSADC handle data structure
292 */
293 typedef struct
294 {
295 Ifx_DSADC *dsadc; /**< \brief Specifies the pointer to the DSADC module registers */
296 } IfxDsadc_Dsadc;
297
298 /** \brief Carrier generation configuration structure
299 */
300 typedef struct
301 {
302 IfxDsadc_CarrierWaveformMode carrierWaveformMode; /**< \brief Carrier generation mode */
303 boolean inverted; /**< \brief Signal polarity (Normal / Inverted) selection */
304 boolean bitReversed; /**< \brief Bit-Reverse PWM Generation (Normal / Bit reverse mode) selection */
305 float32 frequency; /**< \brief Expected excitation frequency in Hz. */
306 IFX_CONST IfxDsadc_Cgpwm_Out *pinPos; /**< \brief Positive-carrier pin configuration */
307 IFX_CONST IfxDsadc_Cgpwm_Out *pinNeg; /**< \brief Negative-carrier pin configuration */
308 IfxPort_OutputMode pinMode; /**< \brief Carrier pins output mode */
309 IfxPort_PadDriver pinDriver; /**< \brief Carrier pins pad driver */
310 } IfxDsadc_Dsadc_CarrierGenConfig;
311
312 /** \brief Channel handle structure
313 */
314 typedef struct
315 {
316 Ifx_DSADC *module; /**< \brief Specifies the pointer to the DSADC module registers */
317 Ifx_DSADC_CH *channel; /**< \brief Specifies the pointer to the DSADC channel registers */
318 IfxDsadc_ChannelId channelId; /**< \brief Channel Id */
319 } IfxDsadc_Dsadc_Channel;
320
321 /** \brief Single channel configuration structure
322 */
323 typedef struct
324 {
325 Ifx_DSADC *module; /**< \brief Specifies the pointer to the DSADC module registers */
326 IfxDsadc_ChannelId channelId; /**< \brief Channel Id */
327 IfxDsadc_Dsadc_ModulatorConfig modulator; /**< \brief Modulator configuration structure */
328 IfxDsadc_Dsadc_DemodulatorConfig demodulator; /**< \brief Demodulator configuration structure */
329 IfxDsadc_Dsadc_CombFilterConfig combFilter; /**< \brief Comb filter configuration structure */
330 IfxDsadc_Dsadc_FirFilterConfig firFilter; /**< \brief FIR filters configuration structure */
331 IfxDsadc_Dsadc_IntegratorConfig integrator; /**< \brief Integrator configuration structure */
332 IfxDsadc_Dsadc_AuxFilterConfig auxFilter; /**< \brief Auxiliary comb filter configuration structure */
333 IfxDsadc_Dsadc_RectifierConfig rectifier; /**< \brief Rectifier configuration structure */
334 IFX_CONST IfxDsadc_Dsadc_ChannelPins *channelPins; /**< \brief Channel Pins Configuration structure */
335 } IfxDsadc_Dsadc_ChannelConfig;
336
337 /** \brief Clock configuration data structure
338 */
339 typedef struct
340 {
341 Ifx_DSADC *dsadc; /**< \brief Specifies the pointer to the DSADC module registers */
342 IfxDsadc_ModulatorClock modulatorClockSelect; /**< \brief Modulator clock selection */
343 IfxDsadc_LowPowerSupply lowPowerSupply; /**< \brief Low power supply voltage selection */
344 } IfxDsadc_Dsadc_Config;
345
346 /** \} */
347
348 /** \addtogroup IfxLld_Dsadc_Dsadc_Module
349 * \{ */
350
351 /******************************************************************************/
352 /*-------------------------Global Function Prototypes-------------------------*/
353 /******************************************************************************/
354
355 /** \brief Initialise the DSADC carrier generator
356 * \param dsadc pointer to the DSADC handle (it will be initialized by this function)
357 * \param config pointer to the DSADC carrier configuration
358 * \return None
359 */
360 IFX_EXTERN void IfxDsadc_Dsadc_initCarrierGen(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_CarrierGenConfig *config);
361
362 /** \brief Initialise the DSADC with the supplied configuration
363 * \param dsadc pointer to the DSADC handle (it will be initialized by this function)
364 * \param config pointer to the DSADC module configuration
365 * \return None
366 *
367 * A coding example can be found in \ref IfxLld_Dsadc_Dsadc_Usage
368 *
369 */
370 IFX_EXTERN void IfxDsadc_Dsadc_initModule(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_Config *config);
371
372 /** \brief Initialise the config struct with default DSADC configuration
373 * \param config pointer to the DSADC module configuration
374 * \param dsadc base address of the DSADC register space
375 * \return None
376 *
377 * A coding example can be found in \ref IfxLld_Dsadc_Dsadc_Usage
378 *
379 */
380 IFX_EXTERN void IfxDsadc_Dsadc_initModuleConfig(IfxDsadc_Dsadc_Config *config, Ifx_DSADC *dsadc);
381
382 /** \} */
383
384 /** \addtogroup IfxLld_Dsadc_Dsadc_Channel
385 * \{ */
386
387 /******************************************************************************/
388 /*-------------------------Global Function Prototypes-------------------------*/
389 /******************************************************************************/
390
391 /** \brief Initialise a DSADC channel with the supplied configuration
392 * \param channel pointer to the DSADC channel handle (it will be initialized by this function)
393 * \param config pointer to the DSADC Channel configuration
394 * \return None
395 *
396 * A coding example can be found in \ref IfxLld_Dsadc_Dsadc_Usage
397 *
398 */
399 IFX_EXTERN void IfxDsadc_Dsadc_initChannel(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ChannelConfig *config);
400
401 /** \brief Initialise the config struct with default DSADC channel configuration
402 * \param config pointer to the DSADC Channel configuration (it will be initialized by this function)
403 * \param dsadc pointer to the DSADC handle
404 * \return None
405 *
406 * A coding example can be found in \ref IfxLld_Dsadc_Dsadc_Usage
407 *
408 */
409 IFX_EXTERN void IfxDsadc_Dsadc_initChannelConfig(IfxDsadc_Dsadc_ChannelConfig *config, IfxDsadc_Dsadc *dsadc);
410
411 /** \} */
412
413 /** \addtogroup IfxLld_Dsadc_Dsadc_Operative
414 * \{ */
415
416 /******************************************************************************/
417 /*-------------------------Inline Function Prototypes-------------------------*/
418 /******************************************************************************/
419
420 /** \brief Enables the conversion of multiple channels
421 * \param dsadc Pointer to the DSADC handle
422 * \param modulatorMask the modulator which should be running (bitwise selection)
423 * \param channelMask the channels which should be scanned (bitwise selection)
424 * \return None
425 *
426 * A coding example can be found in \ref IfxLld_Dsadc_Dsadc_Usage
427 *
428 */
429 IFX_INLINE void IfxDsadc_Dsadc_startScan(IfxDsadc_Dsadc *dsadc, uint32 modulatorMask, uint32 channelMask);
430
431 /** \brief Disables the conversion of multiple channels
432 * \param dsadc Pointer to the DSADC handle
433 * \param modulatorMask the modulator which should be running (bitwise selection)
434 * \return None
435 *
436 * \code
437 * // disable the modulators of all 6 DSADC channels
438 * IfxDsadc_Dsadc_stopScan(&dsadc, 0x3f);
439 * \endcode
440 *
441 */
442 IFX_INLINE void IfxDsadc_Dsadc_stopScan(IfxDsadc_Dsadc *dsadc, uint32 modulatorMask);
443
444 /** \} */
445
446 /** \addtogroup IfxLld_Dsadc_Dsadc_Results
447 * \{ */
448
449 /******************************************************************************/
450 /*-------------------------Inline Function Prototypes-------------------------*/
451 /******************************************************************************/
452
453 /** \brief Get result from the main chain
454 * \param channel Pointer to the DSADC channel handle
455 * \return result from the main chain
456 */
457 IFX_INLINE sint16 IfxDsadc_Dsadc_getMainResult(IfxDsadc_Dsadc_Channel *channel);
458
459 /******************************************************************************/
460 /*-------------------------Global Function Prototypes-------------------------*/
461 /******************************************************************************/
462
463 /** \brief Get result from the auxilary chain
464 * \param channel Pointer to the DSADC channel handle
465 * \return result from the auxiliary chain
466 */
467 IFX_EXTERN sint16 IfxDsadc_Dsadc_getAuxResult(IfxDsadc_Dsadc_Channel *channel);
468
469 /** \} */
470
471 /** \addtogroup IfxLld_Dsadc_Dsadc_Interrupt
472 * \{ */
473
474 /******************************************************************************/
475 /*-------------------------Inline Function Prototypes-------------------------*/
476 /******************************************************************************/
477
478 /** \brief Get the interrupt source register for a Aux event
479 * \param channel Pointer to the DSADC channel handle
480 * \return Address/pointer to the interrupt source register
481 */
482 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDsadc_Dsadc_getAuxSrc(IfxDsadc_Dsadc_Channel *channel);
483
484 /** \brief Get the interrupt source register for a Main event
485 * \param channel Pointer to the DSADC channel handle
486 * \return Address/pointer to the interrupt source register
487 */
488 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDsadc_Dsadc_getMainSrc(IfxDsadc_Dsadc_Channel *channel);
489
490 /** \} */
491
492 /******************************************************************************/
493 /*-------------------------Global Function Prototypes-------------------------*/
494 /******************************************************************************/
495
496 /**
497 * \param config Pointer to DSADC Carrier Configuration
498 * \return None
499 */
500 IFX_EXTERN void IfxDsadc_Dsadc_initCarrierGenConfig(IfxDsadc_Dsadc_CarrierGenConfig *config);
501
502 /******************************************************************************/
503 /*---------------------Inline Function Implementations------------------------*/
504 /******************************************************************************/
505
506 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDsadc_Dsadc_getAuxSrc(IfxDsadc_Dsadc_Channel *channel)
507 {
508 return IfxDsadc_getAuxSrc(channel->module, channel->channelId);
509 }
510
511
512 IFX_INLINE sint16 IfxDsadc_Dsadc_getMainResult(IfxDsadc_Dsadc_Channel *channel)
513 {
514 return IfxDsadc_getMainResult(channel->module, channel->channelId);
515 }
516
517
518 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDsadc_Dsadc_getMainSrc(IfxDsadc_Dsadc_Channel *channel)
519 {
520 return IfxDsadc_getMainSrc(channel->module, channel->channelId);
521 }
522
523
524 IFX_INLINE void IfxDsadc_Dsadc_startScan(IfxDsadc_Dsadc *dsadc, uint32 modulatorMask, uint32 channelMask)
525 {
526 IfxDsadc_startScan(dsadc->dsadc, modulatorMask, channelMask);
527 }
528
529
530 IFX_INLINE void IfxDsadc_Dsadc_stopScan(IfxDsadc_Dsadc *dsadc, uint32 modulatorMask)
531 {
532 IfxDsadc_stopScan(dsadc->dsadc, modulatorMask);
533 }
534
535
536 #endif /* IFXDSADC_DSADC_H */
IfxDsadc_Dsadc_AuxFilterConfig::combFilterShift
IfxDsadc_AuxCombFilterShift combFilterShift
Comb Filter (auxiliary) shift control.
Definition: IfxDsadc_Dsadc.h:196
IfxDsadc_Dsadc_FirFilterConfig::fir0Enabled
boolean fir0Enabled
FIR filter 0 enable/disable selection.
Definition: IfxDsadc_Dsadc.h:248
IfxDsadc_Cgpwm_Out
CGPWM pin mapping structure.
Definition: IfxDsadc_PinMap.h:101
IfxDsadc_Dsadc::dsadc
Ifx_DSADC * dsadc
Specifies the pointer to the DSADC module registers.
Definition: IfxDsadc_Dsadc.h:295
IfxDsadc_Dsadc_AuxFilterConfig::decimationFactor
uint8 decimationFactor
CIC Filter (Auxiliary) decimation factor (4 .. 32)
Definition: IfxDsadc_Dsadc.h:200
IfxDsadc_Dsadc_ChannelPins::din
IFX_CONST IfxDsadc_Din_In * din
the DIN Pin which should be configured
Definition: IfxDsadc_Dsadc.h:209
IfxDsadc_TimestampTrigger
IfxDsadc_TimestampTrigger
Timestamp trigger mode Definition in Ifx_DSADC.DICFG.B.TSTRMODE.
Definition: IfxDsadc.h:369
IfxDsadc_Dsadc_DemodulatorConfig
Demodulator configuration structure.
Definition: IfxDsadc_Dsadc.h:234
IfxDsadc_ChannelId
IfxDsadc_ChannelId
Specifies the channel Index.
Definition: IfxDsadc.h:137
IfxDsadc_AuxCombFilterType
IfxDsadc_AuxCombFilterType
Comb Filter (auxiliary) configuration/type Definition in Ifx_DSADC.FCFGA.B.CFAC.
Definition: IfxDsadc.h:87
IfxDsadc_Dsp_In
DS positive pin mapping structure.
Definition: IfxDsadc_PinMap.h:65
IfxDsadc_Dsadc_Channel::module
Ifx_DSADC * module
Specifies the pointer to the DSADC module registers.
Definition: IfxDsadc_Dsadc.h:316
IfxDsadc_Dsadc_ChannelPins::dsnMode
IfxPort_InputMode dsnMode
the DSN pin output mode which should be configured
Definition: IfxDsadc_Dsadc.h:214
IfxDsadc_Dsadc_IntegratorConfig::discardCount
uint16 discardCount
Number of discarded values to after active trigger: 1 .. 64.
Definition: IfxDsadc_Dsadc.h:260
IfxDsadc_Dsadc_ChannelConfig::channelPins
IFX_CONST IfxDsadc_Dsadc_ChannelPins * channelPins
Channel Pins Configuration structure.
Definition: IfxDsadc_Dsadc.h:334
IfxDsadc_getMainSrc
volatile Ifx_SRC_SRCR * IfxDsadc_getMainSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the interrupt source register for a Main event.
Definition: IfxDsadc.c:120
IfxDsadc_Dsadc_DemodulatorConfig::sampleClockSource
IfxDsadc_SampleClockSource sampleClockSource
Demodulator sample clock source selection.
Definition: IfxDsadc_Dsadc.h:240
IfxDsadc_Dsadc_CombFilterConfig
Comb filter configuration structure.
Definition: IfxDsadc_Dsadc.h:222
IfxDsadc_Dsadc_initChannel
IFX_EXTERN void IfxDsadc_Dsadc_initChannel(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ChannelConfig *config)
Initialise a DSADC channel with the supplied configuration.
Definition: IfxDsadc_Dsadc.c:196
IfxDsadc_Dsadc_IntegratorConfig
Integrator configuration structure.
Definition: IfxDsadc_Dsadc.h:257
IfxDsadc_InputPin
IfxDsadc_InputPin
Modulator input pin selection Definition in Ifx_DSADC.MODCFGx.B.INMUX.
Definition: IfxDsadc.h:215
IfxDsadc_Dsadc_ModulatorConfig::negativeInput
IfxDsadc_InputConfig negativeInput
Modulator configuration of negative input line.
Definition: IfxDsadc_Dsadc.h:270
IfxDsadc_Dsadc_ChannelPins::dinMode
IfxPort_InputMode dinMode
the DIN pin input mode which should be configured
Definition: IfxDsadc_Dsadc.h:210
IfxDsadc_Dsadc_Config::modulatorClockSelect
IfxDsadc_ModulatorClock modulatorClockSelect
Modulator clock selection.
Definition: IfxDsadc_Dsadc.h:342
IfxDsadc_Dsadc_ChannelPins::pinDriver
IfxPort_PadDriver pinDriver
Pin Driver Configuration.
Definition: IfxDsadc_Dsadc.h:217
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxDsadc_MainCombFilterShift
IfxDsadc_MainCombFilterShift
Comb Filter (Main Chain) shift control Definition in Ifx_DSADC.FCFGC.B.MFSC.
Definition: IfxDsadc.h:256
float32
float float32
Definition: Platform_Types.h:170
IfxDsadc_Dsadc_ChannelConfig::rectifier
IfxDsadc_Dsadc_RectifierConfig rectifier
Rectifier configuration structure.
Definition: IfxDsadc_Dsadc.h:333
IfxDsadc_AuxCombFilterShift
IfxDsadc_AuxCombFilterShift
Comb Filter (auxiliary) shift control Definition in Ifx_DSADC.FCFGA.B.AFSC.
Definition: IfxDsadc.h:76
IfxDsadc_Dsadc_Channel::channelId
IfxDsadc_ChannelId channelId
Channel Id.
Definition: IfxDsadc_Dsadc.h:318
IfxDsadc_Dsadc_DemodulatorConfig::inputDataSource
IfxDsadc_InputDataSource inputDataSource
Demodulator input data source selection.
Definition: IfxDsadc_Dsadc.h:236
IfxDsadc_Dsadc_startScan
IFX_INLINE void IfxDsadc_Dsadc_startScan(IfxDsadc_Dsadc *dsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels.
Definition: IfxDsadc_Dsadc.h:524
IfxDsadc_Dsadc_initModuleConfig
IFX_EXTERN void IfxDsadc_Dsadc_initModuleConfig(IfxDsadc_Dsadc_Config *config, Ifx_DSADC *dsadc)
Initialise the config struct with default DSADC configuration.
Definition: IfxDsadc_Dsadc.c:454
IfxDsadc_Dsadc_CarrierGenConfig::bitReversed
boolean bitReversed
Bit-Reverse PWM Generation (Normal / Bit reverse mode) selection.
Definition: IfxDsadc_Dsadc.h:304
IfxDsadc_FirInternalShift
IfxDsadc_FirInternalShift
FIR shift control Selects the displacement caused by the data shifter inbetween the FIR filter blocks...
Definition: IfxDsadc.h:170
IfxDsadc_Dsadc
DSADC handle data structure.
Definition: IfxDsadc_Dsadc.h:293
IfxDsadc_Dsadc_AuxFilterConfig
Auxiliary comb filter configuration structure.
Definition: IfxDsadc_Dsadc.h:192
IfxDsadc_IntegratorTrigger
IfxDsadc_IntegratorTrigger
Integrator trigger mode NOTE: switch-first to bypassed before using other mode Definition in Ifx_DSAD...
Definition: IfxDsadc.h:236
IfxDsadc_Dsadc_FirFilterConfig::internalShift
IfxDsadc_FirInternalShift internalShift
FIR shift control selction.
Definition: IfxDsadc_Dsadc.h:252
IfxDsadc_Dsadc_ChannelConfig::firFilter
IfxDsadc_Dsadc_FirFilterConfig firFilter
FIR filters configuration structure.
Definition: IfxDsadc_Dsadc.h:330
IfxDsadc_Itr_In
ITR pin mapping structure.
Definition: IfxDsadc_PinMap.h:92
IfxDsadc_startScan
IFX_INLINE void IfxDsadc_startScan(Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels.
Definition: IfxDsadc.h:745
IfxDsadc_MainCombFilterType
IfxDsadc_MainCombFilterType
Comb Filter (Main Chain) configuration/type Definition in Ifx_DSADC.FCFGC.B.CFMC. ...
Definition: IfxDsadc.h:267
IfxDsadc_SampleStrobe
IfxDsadc_SampleStrobe
Demodulator data strobe generation mode Definition in Ifx_DSADC.DICFG.B.STROBE.
Definition: IfxDsadc.h:346
IfxDsadc_Dsadc_FirFilterConfig::dataShift
IfxDsadc_FirDataShift dataShift
FIR data shift control selection.
Definition: IfxDsadc_Dsadc.h:251
IfxScuWdt.h
SCU basic functionality.
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxDsadc_Dsadc_CarrierGenConfig::pinPos
IFX_CONST IfxDsadc_Cgpwm_Out * pinPos
Positive-carrier pin configuration.
Definition: IfxDsadc_Dsadc.h:306
sint16
short sint16
Definition: Platform_Types.h:129
IfxDsadc_Dsadc_initCarrierGenConfig
IFX_EXTERN void IfxDsadc_Dsadc_initCarrierGenConfig(IfxDsadc_Dsadc_CarrierGenConfig *config)
Definition: IfxDsadc_Dsadc.c:480
IfxDsadc_Dsadc_AuxFilterConfig::serviceRequest
IfxDsadc_AuxServiceRequest serviceRequest
Service request generation (auxiliary)
Definition: IfxDsadc_Dsadc.h:197
IfxDsadc_FirDataShift
IfxDsadc_FirDataShift
FIR data shift control Selects the displacement caused by the data shifter at the FIR filter output D...
Definition: IfxDsadc.h:158
IfxDsadc_Dsadc_CarrierGenConfig::frequency
float32 frequency
Expected excitation frequency in Hz.
Definition: IfxDsadc_Dsadc.h:305
IfxDsadc_Dsadc_IntegratorConfig::integrationCount
uint16 integrationCount
Number of integrated values after discard step: 1 .. 64.
Definition: IfxDsadc_Dsadc.h:261
IfxDsadc_Dsadc_CombFilterConfig::decimationFactor
uint16 decimationFactor
4 .. 256
Definition: IfxDsadc_Dsadc.h:228
IfxDsadc_Dsadc_Channel
Channel handle structure.
Definition: IfxDsadc_Dsadc.h:314
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxDsadc_Dsadc_ChannelPins::dsn
IFX_CONST IfxDsadc_Dsn_In * dsn
the DSN Pin which should be configured
Definition: IfxDsadc_Dsadc.h:213
IfxDsadc_Dsadc_IntegratorConfig::windowSize
IfxDsadc_IntegrationWindowSize windowSize
Integrator window size.
Definition: IfxDsadc_Dsadc.h:259
IfxDsadc_Dsadc_FirFilterConfig::fir1Enabled
boolean fir1Enabled
FIR filter 0 enable/disable selection.
Definition: IfxDsadc_Dsadc.h:249
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxDsadc_InputDataSource
IfxDsadc_InputDataSource
Demodulator input data source selection Definition in Ifx_DSADC.DICFG.B.DSRC.
Definition: IfxDsadc.h:190
IfxDsadc_Dsadc_ModulatorConfig::positiveInput
IfxDsadc_InputConfig positiveInput
Modulator configuration of positive input line.
Definition: IfxDsadc_Dsadc.h:269
IfxDsadc_Dsadc_Config
Clock configuration data structure.
Definition: IfxDsadc_Dsadc.h:339
IfxDsadc_Dsadc_CarrierGenConfig::pinMode
IfxPort_OutputMode pinMode
Carrier pins output mode.
Definition: IfxDsadc_Dsadc.h:308
IfxDsadc_Dsadc_CarrierGenConfig::pinNeg
IFX_CONST IfxDsadc_Cgpwm_Out * pinNeg
Negative-carrier pin configuration.
Definition: IfxDsadc_Dsadc.h:307
IfxDsadc_Dsadc_CombFilterConfig::startValue
uint16 startValue
4 .. decimationFactor
Definition: IfxDsadc_Dsadc.h:229
IfxDsadc_CommonModeVoltage
IfxDsadc_CommonModeVoltage
Modulator common mode voltage selection Definition in Ifx_DSADC.MODCFGx.B.CMVS.
Definition: IfxDsadc.h:147
IfxDsadc_SampleClockSource
IfxDsadc_SampleClockSource
Demodulator sample clock source select Definition in Ifx_DSADC.DICFG.B.CSRC.
Definition: IfxDsadc.h:335
IfxDsadc_Dsadc_ChannelConfig::modulator
IfxDsadc_Dsadc_ModulatorConfig modulator
Modulator configuration structure.
Definition: IfxDsadc_Dsadc.h:327
IfxDsadc_Dsadc_getAuxResult
IFX_EXTERN sint16 IfxDsadc_Dsadc_getAuxResult(IfxDsadc_Dsadc_Channel *channel)
Get result from the auxilary chain.
Definition: IfxDsadc_Dsadc.c:140
IfxDsadc_InputConfig
IfxDsadc_InputConfig
Modulator configuration of positive/negative input line Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN.
Definition: IfxDsadc.h:179
IfxDsadc_InputGain
IfxDsadc_InputGain
Modulator gain select of analog input path Definition in Ifx_DSADC.MODCFGx.B.GAINSEL.
Definition: IfxDsadc.h:203
IfxDsadc_Dsadc_stopScan
IFX_INLINE void IfxDsadc_Dsadc_stopScan(IfxDsadc_Dsadc *dsadc, uint32 modulatorMask)
Disables the conversion of multiple channels.
Definition: IfxDsadc_Dsadc.h:530
IfxDsadc_Dsadc_ChannelPins::itr
IFX_CONST IfxDsadc_Itr_In * itr
the ITR Pin which should be configured
Definition: IfxDsadc_Dsadc.h:211
IfxDsadc_Dsadc_ChannelConfig::integrator
IfxDsadc_Dsadc_IntegratorConfig integrator
Integrator configuration structure.
Definition: IfxDsadc_Dsadc.h:331
IfxDsadc_Dsadc_Channel::channel
Ifx_DSADC_CH * channel
Specifies the pointer to the DSADC channel registers.
Definition: IfxDsadc_Dsadc.h:317
IfxDsadc_Dsadc_ChannelConfig::combFilter
IfxDsadc_Dsadc_CombFilterConfig combFilter
Comb filter configuration structure.
Definition: IfxDsadc_Dsadc.h:329
IfxDsadc_Dsadc_Config::lowPowerSupply
IfxDsadc_LowPowerSupply lowPowerSupply
Low power supply voltage selection.
Definition: IfxDsadc_Dsadc.h:343
IfxDsadc_Dsadc_RectifierConfig::signDelay
uint8 signDelay
Sign delay value.
Definition: IfxDsadc_Dsadc.h:283
IfxDsadc_Dsadc_ModulatorConfig::modulatorClockFreq
float32 modulatorClockFreq
Modulator clock frequency.
Definition: IfxDsadc_Dsadc.h:273
IfxDsadc_Dsadc_CombFilterConfig::combFilterShift
IfxDsadc_MainCombFilterShift combFilterShift
Comb Filter (Main Chain) shift control.
Definition: IfxDsadc_Dsadc.h:226
IfxDsadc_Dsadc_getAuxSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDsadc_Dsadc_getAuxSrc(IfxDsadc_Dsadc_Channel *channel)
Get the interrupt source register for a Aux event.
Definition: IfxDsadc_Dsadc.h:506
IfxDsadc_getAuxSrc
volatile Ifx_SRC_SRCR * IfxDsadc_getAuxSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Address/pointer to the interrupt source register.
Definition: IfxDsadc.c:52
IfxDsadc_Dsadc_AuxFilterConfig::eventSelect
IfxDsadc_AuxEvent eventSelect
Service request generation (auxiliary)
Definition: IfxDsadc_Dsadc.h:198
IfxDsadc_IntegrationWindowSize
IfxDsadc_IntegrationWindowSize
Integrator window size Definition in Ifx_DSADC.IWCTR.B.IWS.
Definition: IfxDsadc.h:226
IfxDsadc_Dsadc_FirFilterConfig
FIR filters configuration structure.
Definition: IfxDsadc_Dsadc.h:246
IfxDsadc_Dsadc_DemodulatorConfig::triggerInput
IfxDsadc_TriggerInput triggerInput
Trigger selection.
Definition: IfxDsadc_Dsadc.h:237
IfxDsadc_Dsadc_ModulatorConfig::inputPin
IfxDsadc_InputPin inputPin
Modulator input pin selection.
Definition: IfxDsadc_Dsadc.h:272
IfxDsadc_CarrierWaveformMode
IfxDsadc_CarrierWaveformMode
Carrier generation mode Definition in Ifx_DSADC.CGCFG.B.CGMOD.
Definition: IfxDsadc.h:127
IfxDsadc_Dsadc_CarrierGenConfig::carrierWaveformMode
IfxDsadc_CarrierWaveformMode carrierWaveformMode
Carrier generation mode.
Definition: IfxDsadc_Dsadc.h:302
IfxDsadc_RectifierSignSource
IfxDsadc_RectifierSignSource
Rectifier sign source Selects the sign signal that is to be delayed. Definition in Ifx_DSADC...
Definition: IfxDsadc.h:324
IfxDsadc_Dsadc_ModulatorConfig
Modulator configuration structure.
Definition: IfxDsadc_Dsadc.h:267
IfxDsadc_Dsadc_ModulatorConfig::commonModeVoltage
IfxDsadc_CommonModeVoltage commonModeVoltage
Modulator common mode voltage selection.
Definition: IfxDsadc_Dsadc.h:274
IfxDsadc_Dsadc_RectifierConfig
Rectifier configuration structure.
Definition: IfxDsadc_Dsadc.h:279
IfxDsadc_TriggerInput
IfxDsadc_TriggerInput
Trigger select Definition in Ifx_DSADC.DICFG.B.TRSEL.
Definition: IfxDsadc.h:380
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxDsadc_Dsadc_initModule
IFX_EXTERN void IfxDsadc_Dsadc_initModule(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_Config *config)
Initialise the DSADC with the supplied configuration.
Definition: IfxDsadc_Dsadc.c:424
IfxDsadc_Dsadc_AuxFilterConfig::eventGate
IfxDsadc_AuxGate eventGate
Service request generation (auxiliary)
Definition: IfxDsadc_Dsadc.h:199
IfxDsadc_AuxServiceRequest
IfxDsadc_AuxServiceRequest
Service request generation (auxiliary) Definition in Ifx_DSADC.FCFGA.B.SRGA.
Definition: IfxDsadc.h:117
IfxDsadc_LowPowerSupply
IfxDsadc_LowPowerSupply
Low power supply voltage select Definition in Ifx_DSADC.GLOBCFG.B.LOSUP.
Definition: IfxDsadc.h:247
IfxDsadc_getMainResult
IFX_INLINE sint16 IfxDsadc_getMainResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the main chain.
Definition: IfxDsadc.h:641
IfxDsadc_Dsadc_DemodulatorConfig::timestampTrigger
IfxDsadc_TimestampTrigger timestampTrigger
Timestamp trigger mode selection.
Definition: IfxDsadc_Dsadc.h:239
IfxDsadc_Dsadc_getMainSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDsadc_Dsadc_getMainSrc(IfxDsadc_Dsadc_Channel *channel)
Get the interrupt source register for a Main event.
Definition: IfxDsadc_Dsadc.h:518
IfxDsadc_stopScan
IFX_INLINE void IfxDsadc_stopScan(Ifx_DSADC *dsadc, uint32 modulatorMask)
Disables the conversion of multiple channels.
Definition: IfxDsadc.h:751
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxDsadc_Dsadc_AuxFilterConfig::combFilterType
IfxDsadc_AuxCombFilterType combFilterType
Comb Filter (auxiliary) configuration/type.
Definition: IfxDsadc_Dsadc.h:195
IfxDsadc_AuxGate
IfxDsadc_AuxGate
Service request generation (auxiliary) Definition in Ifx_DSADC.FCFGA.B.EGT.
Definition: IfxDsadc.h:108
IfxDsadc_Dsadc_ChannelConfig
Single channel configuration structure.
Definition: IfxDsadc_Dsadc.h:323
IfxDsadc_Dsadc_ChannelPins::cinMode
IfxPort_InputMode cinMode
the CIN pin input mode which should be configured
Definition: IfxDsadc_Dsadc.h:208
IfxDsadc_Dsadc_CombFilterConfig::serviceRequest
IfxDsadc_MainServiceRequest serviceRequest
Service request generation (main chain)
Definition: IfxDsadc_Dsadc.h:227
IfxDsadc_Dsadc_ModulatorConfig::inputGain
IfxDsadc_InputGain inputGain
Modulator gain select of analog input path.
Definition: IfxDsadc_Dsadc.h:271
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxDsadc_Dsadc_ChannelPins::itrMode
IfxPort_InputMode itrMode
the ITR pin input mode which should be configured
Definition: IfxDsadc_Dsadc.h:212
IfxDsadc_Dsadc_RectifierConfig::signPeriod
uint8 signPeriod
Sign period.
Definition: IfxDsadc_Dsadc.h:284
IfxDsadc_Dsn_In
DS negative pin mapping structure.
Definition: IfxDsadc_PinMap.h:56
IfxDsadc_Dsadc_RectifierConfig::enabled
boolean enabled
Rectification enable/disable selection.
Definition: IfxDsadc_Dsadc.h:281
IfxDsadc_Dsadc_FirFilterConfig::offsetCompensation
boolean offsetCompensation
Offset Compensation Filter enable/disable selection.
Definition: IfxDsadc_Dsadc.h:250
IfxDsadc_Dsadc_ChannelPins::dsp
IFX_CONST IfxDsadc_Dsp_In * dsp
the DSP Pin which should be configured
Definition: IfxDsadc_Dsadc.h:215
IfxDsadc_Dsadc_RectifierConfig::signSource
IfxDsadc_RectifierSignSource signSource
Rectifier sign source.
Definition: IfxDsadc_Dsadc.h:282
IfxDsadc_ModulatorClock
IfxDsadc_ModulatorClock
Modulator clock select Definition in Ifx_DSADC.GLOBCFG.B.MCSEL.
Definition: IfxDsadc.h:289
IfxDsadc_Dsadc_DemodulatorConfig::sampleStrobe
IfxDsadc_SampleStrobe sampleStrobe
Demodulator data strobe generation mode selection.
Definition: IfxDsadc_Dsadc.h:241
IfxDsadc_MainServiceRequest
IfxDsadc_MainServiceRequest
Service request generation (main chain) Definition in Ifx_DSADC.FCFGC.B.SRGM.
Definition: IfxDsadc.h:278
IfxDsadc_AuxEvent
IfxDsadc_AuxEvent
Service request generation (auxiliary) Definition in Ifx_DSADC.FCFGA.B.ESEL.
Definition: IfxDsadc.h:98
IfxDsadc_Dsadc_CombFilterConfig::combFilterType
IfxDsadc_MainCombFilterType combFilterType
Comb Filter (Main Chain) configuration/type.
Definition: IfxDsadc_Dsadc.h:225
IfxDsadc_Dsadc_ChannelConfig::auxFilter
IfxDsadc_Dsadc_AuxFilterConfig auxFilter
Auxiliary comb filter configuration structure.
Definition: IfxDsadc_Dsadc.h:332
IfxDsadc_Dsadc_AuxFilterConfig::bypassed
boolean bypassed
Definition: IfxDsadc_Dsadc.h:194
IfxDsadc_Dsadc_ChannelPins
Channel Pins Configuration structure.
Definition: IfxDsadc_Dsadc.h:205
IfxDsadc_Dsadc_IntegratorConfig::integrationCycles
uint16 integrationCycles
Number of integration cycles: 1 .. 16. Used only when IfxDsadc_IntegrationWindowSize_internalControl...
Definition: IfxDsadc_Dsadc.h:262
IfxDsadc_Dsadc_ChannelConfig::demodulator
IfxDsadc_Dsadc_DemodulatorConfig demodulator
Demodulator configuration structure.
Definition: IfxDsadc_Dsadc.h:328
IfxDsadc_Dsadc_ChannelPins::dspMode
IfxPort_InputMode dspMode
the DSP pin output mode which should be configured
Definition: IfxDsadc_Dsadc.h:216
IfxDsadc_Cin_In
CIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:74
IfxDsadc_Dsadc_initCarrierGen
IFX_EXTERN void IfxDsadc_Dsadc_initCarrierGen(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_CarrierGenConfig *config)
Initialise the DSADC carrier generator.
Definition: IfxDsadc_Dsadc.c:165
IfxDsadc_Din_In
DIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:83
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxDsadc_Dsadc_getMainResult
IFX_INLINE sint16 IfxDsadc_Dsadc_getMainResult(IfxDsadc_Dsadc_Channel *channel)
Get result from the main chain.
Definition: IfxDsadc_Dsadc.h:512
IfxDsadc_Dsadc_CarrierGenConfig
Carrier generation configuration structure.
Definition: IfxDsadc_Dsadc.h:300
IfxDsadc_Dsadc_initChannelConfig
IFX_EXTERN void IfxDsadc_Dsadc_initChannelConfig(IfxDsadc_Dsadc_ChannelConfig *config, IfxDsadc_Dsadc *dsadc)
Initialise the config struct with default DSADC channel configuration.
Definition: IfxDsadc_Dsadc.c:254
IfxDsadc_Dsadc_DemodulatorConfig::integrationTrigger
IfxDsadc_IntegratorTrigger integrationTrigger
Integrator trigger mode selection.
Definition: IfxDsadc_Dsadc.h:238
IfxDsadc_Dsadc_ChannelPins::cin
IFX_CONST IfxDsadc_Cin_In * cin
the CIN Pin which should be configured
Definition: IfxDsadc_Dsadc.h:207
IfxDsadc_Dsadc_CarrierGenConfig::inverted
boolean inverted
Signal polarity (Normal / Inverted) selection.
Definition: IfxDsadc_Dsadc.h:303
IfxDsadc.h
DSADC basic functionality.


iLLD_TC26B: IfxDsadc_PinMap.c Source File

  • _PinMap
IfxDsadc_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc_PinMap.c
3 * \brief DSADC I/O map
4 * \ingroup IfxLld_Dsadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxDsadc_PinMap.h"
44
45 IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT = {&MODULE_DSADC, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt2};
46 IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT = {&MODULE_DSADC, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt4};
47 IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT = {&MODULE_DSADC, {&MODULE_P33,11}, IfxPort_OutputIdx_alt6};
48 IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT = {&MODULE_DSADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt2};
49 IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT = {&MODULE_DSADC, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt4};
50 IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT = {&MODULE_DSADC, {&MODULE_P33,12}, IfxPort_OutputIdx_alt6};
51 IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN = {&MODULE_DSADC, 0, {&MODULE_P00, 1}, Ifx_RxSel_a};
52 IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 5}, Ifx_RxSel_b};
53 IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN = {&MODULE_DSADC, 2, {&MODULE_P00, 5}, Ifx_RxSel_a};
54 IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 1}, Ifx_RxSel_b};
55 IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 3}, Ifx_RxSel_a};
56 IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 7}, Ifx_RxSel_b};
57 IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT = {&MODULE_DSADC, 0, {&MODULE_P00,11}, IfxPort_OutputIdx_alt4};
58 IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT = {&MODULE_DSADC, 0, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt4};
59 IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT = {&MODULE_DSADC, 0, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt4};
60 IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT = {&MODULE_DSADC, 2, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt4};
61 IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT = {&MODULE_DSADC, 2, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt4};
62 IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT = {&MODULE_DSADC, 3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt4};
63 IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT = {&MODULE_DSADC, 3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt4};
64 IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN = {&MODULE_DSADC, 0, {&MODULE_P00, 2}, Ifx_RxSel_a};
65 IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 6}, Ifx_RxSel_b};
66 IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN = {&MODULE_DSADC, 2, {&MODULE_P00, 6}, Ifx_RxSel_a};
67 IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 2}, Ifx_RxSel_b};
68 IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 4}, Ifx_RxSel_a};
69 IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 8}, Ifx_RxSel_b};
70 IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN = {&MODULE_DSADC, 0, {NULL_PTR, 3}, Ifx_RxSel_a};
71 IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN = {&MODULE_DSADC, 0, {NULL_PTR, 1}, Ifx_RxSel_b};
72 IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN = {&MODULE_DSADC, 2, {NULL_PTR,21}, Ifx_RxSel_a};
73 IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN = {&MODULE_DSADC, 3, {NULL_PTR,37}, Ifx_RxSel_a};
74 IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 7}, Ifx_RxSel_a};
75 IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN = {&MODULE_DSADC, 3, {NULL_PTR,39}, Ifx_RxSel_b};
76 IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 9}, Ifx_RxSel_b};
77 IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN = {&MODULE_DSADC, 3, {NULL_PTR,45}, Ifx_RxSel_c};
78 IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN = {&MODULE_DSADC, 3, {NULL_PTR,47}, Ifx_RxSel_d};
79 IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN = {&MODULE_DSADC, 0, {NULL_PTR, 2}, Ifx_RxSel_a};
80 IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN = {&MODULE_DSADC, 0, {NULL_PTR, 0}, Ifx_RxSel_b};
81 IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN = {&MODULE_DSADC, 2, {NULL_PTR,20}, Ifx_RxSel_a};
82 IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN = {&MODULE_DSADC, 3, {NULL_PTR,36}, Ifx_RxSel_a};
83 IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 6}, Ifx_RxSel_a};
84 IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN = {&MODULE_DSADC, 3, {NULL_PTR,38}, Ifx_RxSel_b};
85 IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 8}, Ifx_RxSel_b};
86 IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN = {&MODULE_DSADC, 3, {NULL_PTR,44}, Ifx_RxSel_c};
87 IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN = {&MODULE_DSADC, 3, {NULL_PTR,46}, Ifx_RxSel_d};
88 IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 0}, Ifx_RxSel_e};
89 IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 4}, Ifx_RxSel_f};
90 IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 2}, Ifx_RxSel_e};
91 IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 6}, Ifx_RxSel_f};
92 IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 8}, Ifx_RxSel_e};
93 IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 9}, Ifx_RxSel_f};
94 IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN = {&MODULE_DSADC, {&MODULE_P00, 4}, Ifx_RxSel_a};
95 IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN = {&MODULE_DSADC, {&MODULE_P33,13}, Ifx_RxSel_b};
96
97
98 const IfxDsadc_Cgpwm_Out *IfxDsadc_Cgpwm_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS] = {
99 {
100 &IfxDsadc_CGPWMN_P00_5_OUT,
101 &IfxDsadc_CGPWMP_P00_6_OUT,
102 &IfxDsadc_CGPWMN_P02_0_OUT,
103 &IfxDsadc_CGPWMP_P02_1_OUT,
104 &IfxDsadc_CGPWMN_P33_11_OUT,
105 &IfxDsadc_CGPWMP_P33_12_OUT
106 }
107 };
108
109 const IfxDsadc_Cin_In *IfxDsadc_Cin_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS] = {
110 {
111 {
112 &IfxDsadc_CIN0A_P00_1_IN,
113 &IfxDsadc_CIN0B_P33_5_IN
114 },
115 {
116 NULL_PTR,
117 NULL_PTR
118 },
119 {
120 &IfxDsadc_CIN2A_P00_5_IN,
121 &IfxDsadc_CIN2B_P33_1_IN
122 },
123 {
124 &IfxDsadc_CIN3A_P00_3_IN,
125 &IfxDsadc_CIN3B_P02_7_IN
126 }
127 }
128 };
129
130 const IfxDsadc_Cout_Out *IfxDsadc_Cout_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS] = {
131 {
132 {
133 &IfxDsadc_COUT0_P00_1_OUT,
134 &IfxDsadc_COUT0_P00_11_OUT,
135 &IfxDsadc_COUT0_P33_5_OUT
136 },
137 {
138 NULL_PTR,
139 NULL_PTR,
140 NULL_PTR
141 },
142 {
143 &IfxDsadc_COUT2_P00_5_OUT,
144 &IfxDsadc_COUT2_P33_1_OUT,
145 NULL_PTR
146 },
147 {
148 &IfxDsadc_COUT3_P00_3_OUT,
149 &IfxDsadc_COUT3_P02_7_OUT,
150 NULL_PTR
151 }
152 }
153 };
154
155 const IfxDsadc_Din_In *IfxDsadc_Din_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS] = {
156 {
157 {
158 &IfxDsadc_DIN0A_P00_2_IN,
159 &IfxDsadc_DIN0B_P33_6_IN
160 },
161 {
162 NULL_PTR,
163 NULL_PTR
164 },
165 {
166 &IfxDsadc_DIN2A_P00_6_IN,
167 &IfxDsadc_DIN2B_P33_2_IN
168 },
169 {
170 &IfxDsadc_DIN3A_P00_4_IN,
171 &IfxDsadc_DIN3B_P02_8_IN
172 }
173 }
174 };
175
176 const IfxDsadc_Dsn_In *IfxDsadc_Dsn_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS] = {
177 {
178 {
179 &IfxDsadc_DS0NA_AN3_IN,
180 &IfxDsadc_DS0NB_AN1_IN,
181 NULL_PTR,
182 NULL_PTR
183 },
184 {
185 NULL_PTR,
186 NULL_PTR,
187 NULL_PTR,
188 NULL_PTR
189 },
190 {
191 &IfxDsadc_DS2NA_AN21_IN,
192 NULL_PTR,
193 NULL_PTR,
194 NULL_PTR
195 },
196 {
197 &IfxDsadc_DS3NA_P40_7_IN,
198 &IfxDsadc_DS3NB_P40_9_IN,
199 &IfxDsadc_DS3NC_AN45_IN,
200 &IfxDsadc_DS3ND_AN47_IN
201 }
202 }
203 };
204
205 const IfxDsadc_Dsp_In *IfxDsadc_Dsp_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS] = {
206 {
207 {
208 &IfxDsadc_DS0PA_AN2_IN,
209 &IfxDsadc_DS0PB_AN0_IN,
210 NULL_PTR,
211 NULL_PTR
212 },
213 {
214 NULL_PTR,
215 NULL_PTR,
216 NULL_PTR,
217 NULL_PTR
218 },
219 {
220 &IfxDsadc_DS2PA_AN20_IN,
221 NULL_PTR,
222 NULL_PTR,
223 NULL_PTR
224 },
225 {
226 &IfxDsadc_DS3PA_P40_6_IN,
227 &IfxDsadc_DS3PB_P40_8_IN,
228 &IfxDsadc_DS3PC_AN44_IN,
229 &IfxDsadc_DS3PD_AN46_IN
230 }
231 }
232 };
233
234 const IfxDsadc_Itr_In *IfxDsadc_Itr_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS] = {
235 {
236 {
237 NULL_PTR,
238 NULL_PTR,
239 NULL_PTR,
240 NULL_PTR,
241 &IfxDsadc_ITR0E_P33_0_IN,
242 &IfxDsadc_ITR0F_P33_4_IN
243 },
244 {
245 NULL_PTR,
246 NULL_PTR,
247 NULL_PTR,
248 NULL_PTR,
249 NULL_PTR,
250 NULL_PTR
251 },
252 {
253 NULL_PTR,
254 NULL_PTR,
255 NULL_PTR,
256 NULL_PTR,
257 &IfxDsadc_ITR2E_P33_2_IN,
258 &IfxDsadc_ITR2F_P33_6_IN
259 },
260 {
261 NULL_PTR,
262 NULL_PTR,
263 NULL_PTR,
264 NULL_PTR,
265 &IfxDsadc_ITR3E_P02_8_IN,
266 &IfxDsadc_ITR3F_P00_9_IN
267 }
268 }
269 };
270
271 const IfxDsadc_Sg_In *IfxDsadc_Sg_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS] = {
272 {
273 &IfxDsadc_SGNA_P00_4_IN,
274 &IfxDsadc_SGNB_P33_13_IN
275 }
276 };
IfxDsadc_Cgpwm_Out
CGPWM pin mapping structure.
Definition: IfxDsadc_PinMap.h:101
IfxDsadc_DS0PA_AN2_IN
IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN
Definition: IfxDsadc_PinMap.c:79
IfxDsadc_DS3NB_P40_9_IN
IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN
Definition: IfxDsadc_PinMap.c:76
Ifx_RxSel_e
Definition: Ifx_Types.h:133
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxDsadc_Dsp_In
DS positive pin mapping structure.
Definition: IfxDsadc_PinMap.h:65
IfxDsadc_DIN0B_P33_6_IN
IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN
Definition: IfxDsadc_PinMap.c:65
IfxDsadc_ITR2E_P33_2_IN
IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN
Definition: IfxDsadc_PinMap.c:90
IfxDsadc_CGPWMN_P02_0_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT
Definition: IfxDsadc_PinMap.c:46
IfxDsadc_DS2NA_AN21_IN
IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN
Definition: IfxDsadc_PinMap.c:72
IfxDsadc_SGNA_P00_4_IN
IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN
Definition: IfxDsadc_PinMap.c:94
IfxDsadc_DS3NC_AN45_IN
IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN
Definition: IfxDsadc_PinMap.c:77
IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:186
IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:185
IfxDsadc_DIN2B_P33_2_IN
IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN
Definition: IfxDsadc_PinMap.c:67
IfxDsadc_DS0NA_AN3_IN
IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN
Definition: IfxDsadc_PinMap.c:70
IfxDsadc_SGNB_P33_13_IN
IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN
Definition: IfxDsadc_PinMap.c:95
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:121
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxDsadc_Dsn_In_pinTable
const IfxDsadc_Dsn_In * IfxDsadc_Dsn_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS]
Definition: IfxDsadc_PinMap.c:176
IfxDsadc_DS3PB_P40_8_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN
Definition: IfxDsadc_PinMap.c:85
IfxDsadc_DS3PB_AN38_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN
Definition: IfxDsadc_PinMap.c:84
IfxDsadc_CIN2A_P00_5_IN
IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN
Definition: IfxDsadc_PinMap.c:53
IfxDsadc_Cout_Out
COUT pin mapping structure.
Definition: IfxDsadc_PinMap.h:117
IfxDsadc_DS0NB_AN1_IN
IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN
Definition: IfxDsadc_PinMap.c:71
IfxDsadc_Sg_In
SG pin mapping structure.
Definition: IfxDsadc_PinMap.h:109
IfxDsadc_DS0PB_AN0_IN
IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN
Definition: IfxDsadc_PinMap.c:80
IfxDsadc_DS3NB_AN39_IN
IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN
Definition: IfxDsadc_PinMap.c:75
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxDsadc_COUT3_P02_7_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT
Definition: IfxDsadc_PinMap.c:63
IfxDsadc_COUT2_P33_1_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT
Definition: IfxDsadc_PinMap.c:61
IfxDsadc_Itr_In
ITR pin mapping structure.
Definition: IfxDsadc_PinMap.h:92
IfxDsadc_ITR0F_P33_4_IN
IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN
Definition: IfxDsadc_PinMap.c:89
IfxDsadc_CGPWMN_P33_11_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT
Definition: IfxDsadc_PinMap.c:47
IfxDsadc_CIN0A_P00_1_IN
IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN
Definition: IfxDsadc_PinMap.c:51
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:125
IfxDsadc_COUT2_P00_5_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT
Definition: IfxDsadc_PinMap.c:60
IfxDsadc_Cin_In_pinTable
const IfxDsadc_Cin_In * IfxDsadc_Cin_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS]
Definition: IfxDsadc_PinMap.c:109
IfxDsadc_ITR2F_P33_6_IN
IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN
Definition: IfxDsadc_PinMap.c:91
IfxDsadc_DS3NA_AN37_IN
IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN
Definition: IfxDsadc_PinMap.c:73
IfxDsadc_COUT0_P00_11_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT
Definition: IfxDsadc_PinMap.c:57
IfxDsadc_ITR3F_P00_9_IN
IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN
Definition: IfxDsadc_PinMap.c:93
IfxDsadc_DS3PC_AN44_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN
Definition: IfxDsadc_PinMap.c:86
IfxDsadc_DS3PA_P40_6_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN
Definition: IfxDsadc_PinMap.c:83
IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:183
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:184
IfxDsadc_Cgpwm_Out_pinTable
const IfxDsadc_Cgpwm_Out * IfxDsadc_Cgpwm_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
Definition: IfxDsadc_PinMap.c:98
IfxDsadc_DIN0A_P00_2_IN
IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN
Definition: IfxDsadc_PinMap.c:64
IfxDsadc_DS3ND_AN47_IN
IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN
Definition: IfxDsadc_PinMap.c:78
IFXDSADC_PINMAP_NUM_MODULES
#define IFXDSADC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxDsadc_PinMap.h:178
IfxDsadc_Itr_In_pinTable
const IfxDsadc_Itr_In * IfxDsadc_Itr_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS]
Definition: IfxDsadc_PinMap.c:234
IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS
#define IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:182
IfxDsadc_CIN3A_P00_3_IN
IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN
Definition: IfxDsadc_PinMap.c:55
IfxDsadc_DIN3B_P02_8_IN
IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN
Definition: IfxDsadc_PinMap.c:69
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:123
IfxDsadc_CIN0B_P33_5_IN
IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN
Definition: IfxDsadc_PinMap.c:52
IfxDsadc_Din_In_pinTable
const IfxDsadc_Din_In * IfxDsadc_Din_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS]
Definition: IfxDsadc_PinMap.c:155
IfxDsadc_DS3PA_AN36_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN
Definition: IfxDsadc_PinMap.c:82
IfxDsadc_CIN2B_P33_1_IN
IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN
Definition: IfxDsadc_PinMap.c:54
IfxDsadc_DS2PA_AN20_IN
IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN
Definition: IfxDsadc_PinMap.c:81
Ifx_RxSel_f
Definition: Ifx_Types.h:134
IfxDsadc_DIN3A_P00_4_IN
IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN
Definition: IfxDsadc_PinMap.c:68
IfxDsadc_CGPWMP_P00_6_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT
Definition: IfxDsadc_PinMap.c:48
IfxDsadc_CIN3B_P02_7_IN
IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN
Definition: IfxDsadc_PinMap.c:56
IFXDSADC_PINMAP_SG_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_SG_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:187
IfxDsadc_Sg_In_pinTable
const IfxDsadc_Sg_In * IfxDsadc_Sg_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS]
Definition: IfxDsadc_PinMap.c:271
IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:181
IfxDsadc_DS3NA_P40_7_IN
IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN
Definition: IfxDsadc_PinMap.c:74
IfxDsadc_COUT0_P33_5_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT
Definition: IfxDsadc_PinMap.c:59
IfxDsadc_ITR0E_P33_0_IN
IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN
Definition: IfxDsadc_PinMap.c:88
IFXDSADC_PINMAP_NUM_CHANNELS
#define IFXDSADC_PINMAP_NUM_CHANNELS
Definition: IfxDsadc_PinMap.h:179
IfxDsadc_Dsn_In
DS negative pin mapping structure.
Definition: IfxDsadc_PinMap.h:56
IfxDsadc_DIN2A_P00_6_IN
IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN
Definition: IfxDsadc_PinMap.c:66
IfxDsadc_CGPWMP_P33_12_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT
Definition: IfxDsadc_PinMap.c:50
IfxDsadc_PinMap.h
DSADC I/O map.
IfxDsadc_CGPWMP_P02_1_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT
Definition: IfxDsadc_PinMap.c:49
IfxDsadc_COUT3_P00_3_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT
Definition: IfxDsadc_PinMap.c:62
IfxDsadc_Cout_Out_pinTable
const IfxDsadc_Cout_Out * IfxDsadc_Cout_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS]
Definition: IfxDsadc_PinMap.c:130
IfxDsadc_DS3PD_AN46_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN
Definition: IfxDsadc_PinMap.c:87
IfxDsadc_COUT0_P00_1_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT
Definition: IfxDsadc_PinMap.c:58
IfxDsadc_ITR3E_P02_8_IN
IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN
Definition: IfxDsadc_PinMap.c:92
IfxDsadc_CGPWMN_P00_5_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT
Definition: IfxDsadc_PinMap.c:45
IfxDsadc_Cin_In
CIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:74
IfxDsadc_Din_In
DIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:83
IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS
#define IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:180
IfxDsadc_Dsp_In_pinTable
const IfxDsadc_Dsp_In * IfxDsadc_Dsp_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS]
Definition: IfxDsadc_PinMap.c:205


iLLD_TC26B: IfxDsadc_PinMap.h Source File

  • _PinMap
IfxDsadc_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc_PinMap.h
3 * \brief DSADC I/O map
4 * \ingroup IfxLld_Dsadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Dsadc_pinmap DSADC Pin Mapping
42 * \ingroup IfxLld_Dsadc
43 */
44
45 #ifndef IFXDSADC_PINMAP_H
46 #define IFXDSADC_PINMAP_H
47
48 #include <IfxDsadc_reg.h>
49 #include <_Impl/IfxDsadc_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Dsadc_pinmap
53 * \{ */
54
55 /** \brief DS negative pin mapping structure */
56 typedef const struct
57 {
58 Ifx_DSADC* module; /**< \brief Base address */
59 uint8 channel; /**< \brief Channel number */
60 IfxPort_Pin pin; /**< \brief Port pin */
61 Ifx_RxSel select; /**< \brief Input multiplexer value */
62 } IfxDsadc_Dsn_In;
63
64 /** \brief DS positive pin mapping structure */
65 typedef const struct
66 {
67 Ifx_DSADC* module; /**< \brief Base address */
68 uint8 channel; /**< \brief Channel number */
69 IfxPort_Pin pin; /**< \brief Port pin */
70 Ifx_RxSel select; /**< \brief Input multiplexer value */
71 } IfxDsadc_Dsp_In;
72
73 /** \brief CIN pin mapping structure */
74 typedef const struct
75 {
76 Ifx_DSADC* module; /**< \brief Base address */
77 uint8 channel; /**< \brief Channel number */
78 IfxPort_Pin pin; /**< \brief Port pin */
79 Ifx_RxSel select; /**< \brief Input multiplexer value */
80 } IfxDsadc_Cin_In;
81
82 /** \brief DIN pin mapping structure */
83 typedef const struct
84 {
85 Ifx_DSADC* module; /**< \brief Base address */
86 uint8 channel; /**< \brief Channel number */
87 IfxPort_Pin pin; /**< \brief Port pin */
88 Ifx_RxSel select; /**< \brief Input multiplexer value */
89 } IfxDsadc_Din_In;
90
91 /** \brief ITR pin mapping structure */
92 typedef const struct
93 {
94 Ifx_DSADC* module; /**< \brief Base address */
95 uint8 channel; /**< \brief Channel number */
96 IfxPort_Pin pin; /**< \brief Port pin */
97 Ifx_RxSel select; /**< \brief Input multiplexer value */
98 } IfxDsadc_Itr_In;
99
100 /** \brief CGPWM pin mapping structure */
101 typedef const struct
102 {
103 Ifx_DSADC* module; /**< \brief Base address */
104 IfxPort_Pin pin; /**< \brief Port pin */
105 IfxPort_OutputIdx select; /**< \brief Port control code */
106 } IfxDsadc_Cgpwm_Out;
107
108 /** \brief SG pin mapping structure */
109 typedef const struct
110 {
111 Ifx_DSADC* module; /**< \brief Base address */
112 IfxPort_Pin pin; /**< \brief Port pin */
113 Ifx_RxSel select; /**< \brief Input multiplexer value */
114 } IfxDsadc_Sg_In;
115
116 /** \brief COUT pin mapping structure */
117 typedef const struct
118 {
119 Ifx_DSADC* module; /**< \brief Base address */
120 uint8 channel; /**< \brief Channel number */
121 IfxPort_Pin pin; /**< \brief Port pin */
122 IfxPort_OutputIdx select; /**< \brief Port control code */
123 } IfxDsadc_Cout_Out;
124
125 IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT; /**< \brief DSADC_CGPWMN: DSADC output */
126 IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT; /**< \brief DSADC_CGPWMN: DSADC output */
127 IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT; /**< \brief DSADC_CGPWMN: DSADC output */
128 IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT; /**< \brief DSADC_CGPWMP: DSADC output */
129 IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT; /**< \brief DSADC_CGPWMP: DSADC output */
130 IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT; /**< \brief DSADC_CGPWMP: DSADC output */
131 IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN; /**< \brief DSADC_CIN0A: DSADC input */
132 IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN; /**< \brief DSADC_CIN0B: DSADC input */
133 IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN; /**< \brief DSADC_CIN2A: DSADC input */
134 IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN; /**< \brief DSADC_CIN2B: DSADC input */
135 IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN; /**< \brief DSADC_CIN3A: DSADC input */
136 IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN; /**< \brief DSADC_CIN3B: DSADC input */
137 IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT; /**< \brief DSADC_COUT0: DSADC output */
138 IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT; /**< \brief DSADC_COUT0: DSADC output */
139 IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT; /**< \brief DSADC_COUT0: DSADC output */
140 IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT; /**< \brief DSADC_COUT2: DSADC output */
141 IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT; /**< \brief DSADC_COUT2: DSADC output */
142 IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT; /**< \brief DSADC_COUT3: DSADC output */
143 IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT; /**< \brief DSADC_COUT3: DSADC output */
144 IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN; /**< \brief DSADC_DIN0A: DSADC input */
145 IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN; /**< \brief DSADC_DIN0B: DSADC input */
146 IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN; /**< \brief DSADC_DIN2A: DSADC input */
147 IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN; /**< \brief DSADC_DIN2B: DSADC input */
148 IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN; /**< \brief DSADC_DIN3A: DSADC input */
149 IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN; /**< \brief DSADC_DIN3B: DSADC input */
150 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN; /**< \brief DSADC_DS0NA: DSADC: negative analog input channel of DSADC 0 pin A */
151 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN; /**< \brief DSADC_DS0NB: DSADC: negative analog input channel of DSADC 0 pin B */
152 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN; /**< \brief DSADC_DS2NA: DSADC: negative analog input channel of DSADC 2 pin A */
153 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN; /**< \brief DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3 pin A */
154 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN; /**< \brief DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3, pin A */
155 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN; /**< \brief DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3 pin B */
156 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN; /**< \brief DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3, pin B */
157 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN; /**< \brief DSADC_DS3NC: DSADC: negative analog input channel of DSADC 3 pin C */
158 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN; /**< \brief DSADC_DS3ND: DSADC: negative analog input channel of DSADC 3 pin D */
159 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN; /**< \brief DSADC_DS0PA: DSADC: positive analog input channel of DSADC 0 pin A */
160 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN; /**< \brief DSADC_DS0PB: DSADC: positive analog input channel of DSADC 0 pin B */
161 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN; /**< \brief DSADC_DS2PA: DSADC: positive analog input channel of DSADC 2 pin A */
162 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN; /**< \brief DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3 pin A */
163 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN; /**< \brief DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3, pin A */
164 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN; /**< \brief DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3 pin B */
165 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN; /**< \brief DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3, pin B */
166 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN; /**< \brief DSADC_DS3PC: DSADC: positive analog input channel of DSADC 3 pin C */
167 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN; /**< \brief DSADC_DS3PD: DSADC: positive analog input channel of DSADC 3 pin D */
168 IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN; /**< \brief DSADC_ITR0E: DSADC input */
169 IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN; /**< \brief DSADC_ITR0F: DSADC input */
170 IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN; /**< \brief DSADC_ITR2E: DSADC input */
171 IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN; /**< \brief DSADC_ITR2F: DSADC input */
172 IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN; /**< \brief DSADC_ITR3E: DSADC input */
173 IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN; /**< \brief DSADC_ITR3F: DSADC input */
174 IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN; /**< \brief DSADC_SGNA: DSADC input */
175 IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN; /**< \brief DSADC_SGNB: DSADC input */
176
177 /** \brief Table dimensions */
178 #define IFXDSADC_PINMAP_NUM_MODULES 1
179 #define IFXDSADC_PINMAP_NUM_CHANNELS 4
180 #define IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS 6
181 #define IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS 2
182 #define IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS 3
183 #define IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS 2
184 #define IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS 4
185 #define IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS 4
186 #define IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS 6
187 #define IFXDSADC_PINMAP_SG_IN_NUM_ITEMS 2
188
189
190 /** \brief IfxDsadc_Cgpwm_Out table */
191 IFX_EXTERN const IfxDsadc_Cgpwm_Out *IfxDsadc_Cgpwm_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS];
192
193 /** \brief IfxDsadc_Cin_In table */
194 IFX_EXTERN const IfxDsadc_Cin_In *IfxDsadc_Cin_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS];
195
196 /** \brief IfxDsadc_Cout_Out table */
197 IFX_EXTERN const IfxDsadc_Cout_Out *IfxDsadc_Cout_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS];
198
199 /** \brief IfxDsadc_Din_In table */
200 IFX_EXTERN const IfxDsadc_Din_In *IfxDsadc_Din_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS];
201
202 /** \brief IfxDsadc_Dsn_In table */
203 IFX_EXTERN const IfxDsadc_Dsn_In *IfxDsadc_Dsn_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS];
204
205 /** \brief IfxDsadc_Dsp_In table */
206 IFX_EXTERN const IfxDsadc_Dsp_In *IfxDsadc_Dsp_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS];
207
208 /** \brief IfxDsadc_Itr_In table */
209 IFX_EXTERN const IfxDsadc_Itr_In *IfxDsadc_Itr_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS];
210
211 /** \brief IfxDsadc_Sg_In table */
212 IFX_EXTERN const IfxDsadc_Sg_In *IfxDsadc_Sg_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS];
213
214 /** \} */
215
216 #endif /* IFXDSADC_PINMAP_H */
IfxDsadc_Dsn_In_pinTable
IFX_EXTERN const IfxDsadc_Dsn_In * IfxDsadc_Dsn_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS]
IfxDsadc_Dsn_In table.
Definition: IfxDsadc_PinMap.h:203
IfxDsadc_Cgpwm_Out
CGPWM pin mapping structure.
Definition: IfxDsadc_PinMap.h:101
IfxDsadc_Cin_In_pinTable
IFX_EXTERN const IfxDsadc_Cin_In * IfxDsadc_Cin_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS]
IfxDsadc_Cin_In table.
Definition: IfxDsadc_PinMap.h:194
IfxDsadc_DS0NA_AN3_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN
DSADC_DS0NA: DSADC: negative analog input channel of DSADC 0 pin A.
Definition: IfxDsadc_PinMap.h:150
IfxDsadc_CIN2B_P33_1_IN
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN
DSADC_CIN2B: DSADC input.
Definition: IfxDsadc_PinMap.h:134
IfxDsadc_Dsp_In
DS positive pin mapping structure.
Definition: IfxDsadc_PinMap.h:65
IfxDsadc_ITR3F_P00_9_IN
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN
DSADC_ITR3F: DSADC input.
Definition: IfxDsadc_PinMap.h:173
IfxDsadc_Dsn_In::channel
uint8 channel
Channel number.
Definition: IfxDsadc_PinMap.h:59
IfxDsadc_Din_In_pinTable
IFX_EXTERN const IfxDsadc_Din_In * IfxDsadc_Din_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS]
IfxDsadc_Din_In table.
Definition: IfxDsadc_PinMap.h:200
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxDsadc_CIN0B_P33_5_IN
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN
DSADC_CIN0B: DSADC input.
Definition: IfxDsadc_PinMap.h:132
IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:186
IfxDsadc_DS3PB_AN38_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN
DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3 pin B.
Definition: IfxDsadc_PinMap.h:164
IfxDsadc_CGPWMN_P02_0_OUT
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT
DSADC_CGPWMN: DSADC output.
Definition: IfxDsadc_PinMap.h:126
IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:185
IfxDsadc_SGNA_P00_4_IN
IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN
DSADC_SGNA: DSADC input.
Definition: IfxDsadc_PinMap.h:174
IfxDsadc_DS3NA_AN37_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN
DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3 pin A.
Definition: IfxDsadc_PinMap.h:153
IfxDsadc_DS3PD_AN46_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN
DSADC_DS3PD: DSADC: positive analog input channel of DSADC 3 pin D.
Definition: IfxDsadc_PinMap.h:167
IfxDsadc_CIN2A_P00_5_IN
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN
DSADC_CIN2A: DSADC input.
Definition: IfxDsadc_PinMap.h:133
IfxDsadc_DS3PC_AN44_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN
DSADC_DS3PC: DSADC: positive analog input channel of DSADC 3 pin C.
Definition: IfxDsadc_PinMap.h:166
IfxDsadc_DIN0A_P00_2_IN
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN
DSADC_DIN0A: DSADC input.
Definition: IfxDsadc_PinMap.h:144
IfxDsadc_DS3NB_AN39_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN
DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3 pin B.
Definition: IfxDsadc_PinMap.h:155
IfxDsadc_Dsn_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxDsadc_PinMap.h:61
IfxDsadc_DS2NA_AN21_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN
DSADC_DS2NA: DSADC: negative analog input channel of DSADC 2 pin A.
Definition: IfxDsadc_PinMap.h:152
IfxDsadc_DS3PB_P40_8_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN
DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3, pin B.
Definition: IfxDsadc_PinMap.h:165
IfxDsadc_DIN0B_P33_6_IN
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN
DSADC_DIN0B: DSADC input.
Definition: IfxDsadc_PinMap.h:145
IfxDsadc_Cout_Out
COUT pin mapping structure.
Definition: IfxDsadc_PinMap.h:117
IfxDsadc_DS2PA_AN20_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN
DSADC_DS2PA: DSADC: positive analog input channel of DSADC 2 pin A.
Definition: IfxDsadc_PinMap.h:161
IfxDsadc_Sg_In
SG pin mapping structure.
Definition: IfxDsadc_PinMap.h:109
IfxDsadc_Dsn_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxDsadc_PinMap.h:60
IfxDsadc_Itr_In
ITR pin mapping structure.
Definition: IfxDsadc_PinMap.h:92
IfxDsadc_ITR0E_P33_0_IN
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN
DSADC_ITR0E: DSADC input.
Definition: IfxDsadc_PinMap.h:168
IfxDsadc_Sg_In_pinTable
IFX_EXTERN const IfxDsadc_Sg_In * IfxDsadc_Sg_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS]
IfxDsadc_Sg_In table.
Definition: IfxDsadc_PinMap.h:212
IfxDsadc_DIN2B_P33_2_IN
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN
DSADC_DIN2B: DSADC input.
Definition: IfxDsadc_PinMap.h:147
IfxDsadc_SGNB_P33_13_IN
IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN
DSADC_SGNB: DSADC input.
Definition: IfxDsadc_PinMap.h:175
IfxDsadc_Itr_In_pinTable
IFX_EXTERN const IfxDsadc_Itr_In * IfxDsadc_Itr_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS]
IfxDsadc_Itr_In table.
Definition: IfxDsadc_PinMap.h:209
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxDsadc_DS3NB_P40_9_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN
DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3, pin B.
Definition: IfxDsadc_PinMap.h:156
IfxDsadc_DS3ND_AN47_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN
DSADC_DS3ND: DSADC: negative analog input channel of DSADC 3 pin D.
Definition: IfxDsadc_PinMap.h:158
IfxDsadc_CIN3A_P00_3_IN
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN
DSADC_CIN3A: DSADC input.
Definition: IfxDsadc_PinMap.h:135
IfxDsadc_DS3NC_AN45_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN
DSADC_DS3NC: DSADC: negative analog input channel of DSADC 3 pin C.
Definition: IfxDsadc_PinMap.h:157
IfxDsadc_DIN3B_P02_8_IN
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN
DSADC_DIN3B: DSADC input.
Definition: IfxDsadc_PinMap.h:149
IfxDsadc_COUT0_P00_11_OUT
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT
DSADC_COUT0: DSADC output.
Definition: IfxDsadc_PinMap.h:137
IfxDsadc_CGPWMP_P02_1_OUT
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT
DSADC_CGPWMP: DSADC output.
Definition: IfxDsadc_PinMap.h:129
IfxDsadc_DS0PA_AN2_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN
DSADC_DS0PA: DSADC: positive analog input channel of DSADC 0 pin A.
Definition: IfxDsadc_PinMap.h:159
IfxDsadc_COUT2_P00_5_OUT
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT
DSADC_COUT2: DSADC output.
Definition: IfxDsadc_PinMap.h:140
IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:183
IfxDsadc_CGPWMN_P33_11_OUT
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT
DSADC_CGPWMN: DSADC output.
Definition: IfxDsadc_PinMap.h:127
IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:184
IFXDSADC_PINMAP_NUM_MODULES
#define IFXDSADC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxDsadc_PinMap.h:178
IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS
#define IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:182
IfxDsadc_Cgpwm_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxDsadc_PinMap.h:105
IfxDsadc_COUT3_P02_7_OUT
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT
DSADC_COUT3: DSADC output.
Definition: IfxDsadc_PinMap.h:143
IfxDsadc_DS3PA_P40_6_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN
DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3, pin A.
Definition: IfxDsadc_PinMap.h:163
IfxDsadc_Dsn_In::module
Ifx_DSADC * module
Base address.
Definition: IfxDsadc_PinMap.h:58
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxDsadc_Cgpwm_Out_pinTable
IFX_EXTERN const IfxDsadc_Cgpwm_Out * IfxDsadc_Cgpwm_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
IfxDsadc_Cgpwm_Out table.
Definition: IfxDsadc_PinMap.h:191
IfxDsadc_COUT0_P00_1_OUT
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT
DSADC_COUT0: DSADC output.
Definition: IfxDsadc_PinMap.h:138
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxDsadc_DS0PB_AN0_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN
DSADC_DS0PB: DSADC: positive analog input channel of DSADC 0 pin B.
Definition: IfxDsadc_PinMap.h:160
IfxDsadc_Dsp_In_pinTable
IFX_EXTERN const IfxDsadc_Dsp_In * IfxDsadc_Dsp_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS]
IfxDsadc_Dsp_In table.
Definition: IfxDsadc_PinMap.h:206
IfxDsadc_COUT3_P00_3_OUT
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT
DSADC_COUT3: DSADC output.
Definition: IfxDsadc_PinMap.h:142
IfxDsadc_DS0NB_AN1_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN
DSADC_DS0NB: DSADC: negative analog input channel of DSADC 0 pin B.
Definition: IfxDsadc_PinMap.h:151
IFXDSADC_PINMAP_SG_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_SG_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:187
IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:181
IfxDsadc_ITR2E_P33_2_IN
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN
DSADC_ITR2E: DSADC input.
Definition: IfxDsadc_PinMap.h:170
IFXDSADC_PINMAP_NUM_CHANNELS
#define IFXDSADC_PINMAP_NUM_CHANNELS
Definition: IfxDsadc_PinMap.h:179
IfxDsadc_COUT2_P33_1_OUT
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT
DSADC_COUT2: DSADC output.
Definition: IfxDsadc_PinMap.h:141
IfxDsadc_ITR0F_P33_4_IN
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN
DSADC_ITR0F: DSADC input.
Definition: IfxDsadc_PinMap.h:169
IfxDsadc_CGPWMP_P00_6_OUT
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT
DSADC_CGPWMP: DSADC output.
Definition: IfxDsadc_PinMap.h:128
IfxDsadc_Dsn_In
DS negative pin mapping structure.
Definition: IfxDsadc_PinMap.h:56
IfxDsadc_CIN3B_P02_7_IN
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN
DSADC_CIN3B: DSADC input.
Definition: IfxDsadc_PinMap.h:136
IfxDsadc_CGPWMP_P33_12_OUT
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT
DSADC_CGPWMP: DSADC output.
Definition: IfxDsadc_PinMap.h:130
IfxDsadc_DIN2A_P00_6_IN
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN
DSADC_DIN2A: DSADC input.
Definition: IfxDsadc_PinMap.h:146
IfxDsadc_COUT0_P33_5_OUT
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT
DSADC_COUT0: DSADC output.
Definition: IfxDsadc_PinMap.h:139
IfxDsadc_ITR2F_P33_6_IN
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN
DSADC_ITR2F: DSADC input.
Definition: IfxDsadc_PinMap.h:171
IfxDsadc_Cin_In
CIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:74
IfxDsadc_Din_In
DIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:83
IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS
#define IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:180
IfxDsadc_Cout_Out_pinTable
IFX_EXTERN const IfxDsadc_Cout_Out * IfxDsadc_Cout_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS]
IfxDsadc_Cout_Out table.
Definition: IfxDsadc_PinMap.h:197
IfxDsadc_DS3PA_AN36_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN
DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3 pin A.
Definition: IfxDsadc_PinMap.h:162
IfxDsadc_CGPWMN_P00_5_OUT
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT
DSADC_CGPWMN: DSADC output.
Definition: IfxDsadc_PinMap.h:125
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxDsadc_ITR3E_P02_8_IN
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN
DSADC_ITR3E: DSADC input.
Definition: IfxDsadc_PinMap.h:172
IfxDsadc_DS3NA_P40_7_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN
DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3, pin A.
Definition: IfxDsadc_PinMap.h:154
IfxDsadc_cfg.h
DSADC on-chip implementation data.
IfxDsadc_DIN3A_P00_4_IN
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN
DSADC_DIN3A: DSADC input.
Definition: IfxDsadc_PinMap.h:148
IfxDsadc_CIN0A_P00_1_IN
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN
DSADC_CIN0A: DSADC input.
Definition: IfxDsadc_PinMap.h:131
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxDsadc_Rdc.c Source File

  • Dsadc
  • Rdc
IfxDsadc_Rdc.c
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc_Rdc.c
3 * \brief DSADC RDC details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxDsadc_Rdc.h"
47 #include "string.h"
48 #include "Gtm/Trig/IfxGtm_Trig.h"
49
50 /** \addtogroup IfxLld_Dsadc_Rdc_func_config
51 * \{ */
52
53 /******************************************************************************/
54 /*-----------------------Private Function Prototypes--------------------------*/
55 /******************************************************************************/
56
57 /**
58 * \param gtm Pointer to GTM module registers
59 * \param tim TIM Number
60 * \param timCh TIM Channel Number
61 * \param risingEdge Signal level control
62 */
63 IFX_STATIC Ifx_GTM_TIM_CH *IfxDsadc_Rdc_initGtmTim(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch timCh, boolean risingEdge);
64
65 /** \brief Initialise the DSADC hardware channels
66 * \param driver Driver handle
67 * \param config DSADC RDC configuration structure
68 */
69 IFX_STATIC boolean IfxDsadc_Rdc_initHwChannels(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config);
70
71 /** \brief Initialise the GTM timestamp hardware resources
72 * \param driver Driver handle
73 * \param config DSADC RDC configuration structure
74 * \return None
75 */
76 IFX_STATIC void IfxDsadc_Rdc_initHwTimestamp(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config);
77
78 /** \} */
79
80 /** \addtogroup IfxLld_Dsadc_Rdc_func_utility
81 * \{ */
82 /******************************************************************************/
83 /*------------------------Inline Function Prototypes--------------------------*/
84 /******************************************************************************/
85
86 /** \brief Updating RDC timestamps
87 * \param driver Driver handle
88 * \return None
89 */
90 IFX_INLINE void IfxDsadc_Rdc_updateTimestamp(IfxDsadc_Rdc *driver);
91
92 /******************************************************************************/
93 /*-----------------------Private Function Prototypes--------------------------*/
94 /******************************************************************************/
95
96 /** \brief Group Dalay calculation
97 * \param driver Driver handle
98 */
99 IFX_STATIC float32 IfxDsadc_Rdc_calculateGroupDelay(IfxDsadc_Rdc *driver);
100
101 /**
102 * \param config DSADC RDC configuration structure
103 */
104 IFX_STATIC float32 IfxDsadc_Rdc_calculateTimestampPeriod(const IfxDsadc_Rdc_Config *config);
105
106 /** \brief Return the update period.
107 * \param driver Driver handle
108 * \return Return the update period in [seconds], i.e. the period of new result (and interrupt)
109 */
110 IFX_STATIC float32 IfxDsadc_Rdc_getUpdatePeriod(IfxDsadc_Rdc *driver);
111
112 /** \} */
113
114 /** \addtogroup IfxLld_Dsadc_Rdc_variable
115 * \{ */
116
117 /******************************************************************************/
118 /*------------------------Private Variables/Constants-------------------------*/
119 /******************************************************************************/
120
121 /** \brief GTM TIM Configuration settings
122 */
123 IFX_STATIC IFX_CONST Ifx_GTM_TIM_CH_CTRL_Bits IfxDsadc_Rdc_GtmTimCfg = {
124 .TIM_EN = 1,
125 .TIM_MODE = IfxGtm_Tim_Mode_inputEvent,
126 .GPR0_SEL = IfxGtm_Tim_GprSel_tbuTs0,
127 .GPR1_SEL = IfxGtm_Tim_GprSel_tbuTs0,
128 .CNTS_SEL = IfxGtm_Tim_CntsSel_cntReg,
129 /*.EGPR0_SEL= 0, //not available in A-step */
130 .DSL = 0, /* 0 = falling or low */
131 .ISL = 0, /* 1 = both edges, ignore DSL */
132 };
133
134 /** \} */
135
136 /******************************************************************************/
137 /*---------------------Inline Function Implementations------------------------*/
138 /******************************************************************************/
139
140 IFX_INLINE void IfxDsadc_Rdc_updateTimestamp(IfxDsadc_Rdc *driver)
141 {
142 IfxDsadc_Rdc_Ts *timestamp = &driver->timestamp;
143 IfxDsadc_Rdc_Hw *hwHandle = &driver->hardware;
144
145 uint32 tsPwm = hwHandle->pwmTimCh->GPR0.B.GPR0;
146 uint32 clockTicks = (tsPwm - timestamp->rdc) % timestamp->maxTicks;
147 # if IFXDSADC_RDC_CFG_DEBUG
148 timestamp->inTicks = clockTicks;
149 timestamp->pwm = tsPwm;
150 # endif
151 timestamp->inSeconds = timestamp->clockPeriod * (float32)clockTicks;
152 }
153
154
155 /******************************************************************************/
156 /*-------------------------Function Implementations---------------------------*/
157 /******************************************************************************/
158
159 IFX_STATIC float32 IfxDsadc_Rdc_calculateGroupDelay(IfxDsadc_Rdc *driver)
160 {
161 Ifx_DSADC *dsadc = driver->hardware.inputSin.module;
162 return IfxDsadc_getMainGroupDelay(dsadc, driver->hardware.inputSin.channelId);
163 }
164
165
166 IFX_STATIC float32 IfxDsadc_Rdc_calculateTimestampPeriod(const IfxDsadc_Rdc_Config *config)
167 {
168 Ifx_GTM *gtm = config->hardware.gtmTimestamp.gtm;
169 return 1.0F / IfxGtm_Tbu_getClockFrequency(gtm, IfxGtm_Tbu_Ts_0);
170 }
171
172
173 float32 IfxDsadc_Rdc_getAbsolutePosition(IfxDsadc_Rdc *driver)
174 {
175 return Ifx_AngleTrkF32_getAbsolutePosition(&driver->angleTrk);
176 }
177
178
179 IfxStdIf_Pos_Dir IfxDsadc_Rdc_getDirection(IfxDsadc_Rdc *driver)
180 {
181 return Ifx_AngleTrkF32_getDirection(&driver->angleTrk);
182 }
183
184
185 sint32 IfxDsadc_Rdc_getOffset(IfxDsadc_Rdc *driver)
186 {
187 return Ifx_AngleTrkF32_getOffset(&driver->angleTrk);
188 }
189
190
191 float32 IfxDsadc_Rdc_getPosition(IfxDsadc_Rdc *driver)
192 {
193 return Ifx_AngleTrkF32_getPosition(&driver->angleTrk);
194 }
195
196
197 float32 IfxDsadc_Rdc_getRefreshPeriod(IfxDsadc_Rdc *driver)
198 {
199 return Ifx_AngleTrkF32_getRefreshPeriod(&driver->angleTrk);
200 }
201
202
203 sint32 IfxDsadc_Rdc_getResolution(IfxDsadc_Rdc *driver)
204 {
205 return Ifx_AngleTrkF32_getResolution(&driver->angleTrk);
206 }
207
208
209 IfxStdIf_Pos_SensorType IfxDsadc_Rdc_getSensorType(IfxDsadc_Rdc *driver)
210 {
211 return IfxStdIf_Pos_SensorType_resolver;
212 }
213
214
215 sint32 IfxDsadc_Rdc_getTurn(IfxDsadc_Rdc *driver)
216 {
217 return Ifx_AngleTrkF32_getTurn(&driver->angleTrk);
218 }
219
220
221 IFX_STATIC float32 IfxDsadc_Rdc_getUpdatePeriod(IfxDsadc_Rdc *driver)
222 {
223 IfxDsadc_Rdc_Hw *hwHandle = &(driver->hardware);
224 return 1.0F / IfxDsadc_getIntegratorOutFreq(hwHandle->inputSin.module, hwHandle->inputSin.channelId);
225 }
226
227
228 boolean IfxDsadc_Rdc_init(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
229 {
230 boolean result = TRUE;
231 /* Initialise the DSADC hardware channels */
232 result &= IfxDsadc_Rdc_initHwChannels(driver, config);
233
234 /* Initialise the GTM timestamp hardware resources */
235 IfxDsadc_Rdc_initHwTimestamp(driver, config);
236
237 /* Initialise the software resources */
238 {
239 driver->updatePeriod = IfxDsadc_Rdc_getUpdatePeriod(driver);
240 driver->groupDelay = IfxDsadc_Rdc_calculateGroupDelay(driver);
241 driver->timestamp.enabled = TRUE;
242 driver->timestamp.clockPeriod = IfxDsadc_Rdc_calculateTimestampPeriod(config);
243 driver->timestamp.maxTicks = (uint32)(driver->updatePeriod / driver->timestamp.clockPeriod);
244 }
245
246 /* Initialise angle-tracking observer */
247 {
248 Ifx_AngleTrkF32_Config atoConfig;
249 Ifx_AngleTrkF32_initConfig(&atoConfig, &(driver->sinIn), &(driver->cosIn));
250
251 atoConfig.offset = config->offset;
252 atoConfig.speedLpfFc = config->speedLpfFc;
253 atoConfig.reversed = config->reversed;
254 atoConfig.errorThreshold = config->errorThreshold;
255 atoConfig.sqrAmplMax = config->sqrAmplMax;
256 atoConfig.sqrAmplMin = config->sqrAmplMin;
257 atoConfig.periodPerRotation = config->periodPerRotation;
258
259 atoConfig.kp = config->kp;
260 atoConfig.ki = config->ki;
261 atoConfig.kd = config->kd;
262 atoConfig.resolution = config->resolution;
263
264 #if IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION
265 Ifx_AngleTrkF32_init(&(driver->angleTrk), &atoConfig, config->userTs);
266 #else
267 Ifx_AngleTrkF32_init(&(driver->angleTrk), &atoConfig, driver->updatePeriod);
268 #endif
269 }
270
271 /* Optional calibration init */
272 {}
273 return result;
274 }
275
276
277 void IfxDsadc_Rdc_initConfig(IfxDsadc_Rdc_Config *config)
278 {
279 config->kp = 0; /* Force to used default from Ifx_AngleTrkF32 */
280 config->ki = 0;
281 config->kd = 0;
282 config->speedLpfFc = 100;
283 config->errorThreshold = 5.0f / 180 * IFX_PI;
284 config->userTs = 0;
285 config->sqrAmplMax = (sint32)((1.01f * 1.01f) * 2048);
286 config->sqrAmplMin = (sint32)((0.99f * 0.99f) * 2048);
287 config->periodPerRotation = 1;
288 config->reversed = FALSE;
289 config->resolution = (1UL << 12); /** \brief 12-bit default resolution */
290 config->offset = 0;
291 IfxDsadc_Dsadc_initCarrierGenConfig(&config->hardware.carrierGen);
292 config->hardware.gtmTimestamp.gtm = &MODULE_GTM;
293 config->hardware.gtmTimestamp.pwmTim = NULL_PTR;
294 config->hardware.gtmTimestamp.rdcTim = IfxGtm_Tim_0;
295 config->hardware.gtmTimestamp.rdcTimChannel = IfxGtm_Tim_Ch_0;
296 config->hardware.gtmTimestamp.rdcTimMuxValue = 0;
297 IfxDsadc_Dsadc_initChannelConfig(&config->hardware.inputConfig, NULL_PTR);
298 config->hardware.inputCos = IfxDsadc_ChannelId_0;
299
300 config->hardware.inputSin = IfxDsadc_ChannelId_2;
301
302 config->hardware.outputClock = NULL_PTR;
303 config->hardware.servReqPriority = 0;
304 config->hardware.servReqProvider = IfxSrc_Tos_cpu0;
305 config->hardware.startScan = FALSE;
306 }
307
308
309 IFX_STATIC Ifx_GTM_TIM_CH *IfxDsadc_Rdc_initGtmTim(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch timCh, boolean risingEdge)
310 {
311 Ifx_GTM_TIM_CH *pTimCh = IfxGtm_Tim_getChannel(&gtm->TIM[tim], timCh);
312 Ifx_GTM_TIM_CH_CTRL ctrl;
313 ctrl.B = IfxDsadc_Rdc_GtmTimCfg;
314 ctrl.B.DSL = (risingEdge != FALSE) ? 1 : 0;
315 pTimCh->CTRL.U = ctrl.U;
316 return pTimCh;
317 }
318
319
320 IFX_STATIC boolean IfxDsadc_Rdc_initHwChannels(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
321 {
322 // #if IFXDSADC_HW_INIT
323 IfxDsadc_Rdc_Hw *hwHandle = &(driver->hardware);
324 const IfxDsadc_Rdc_ConfigHw *configHw = &config->hardware;
325 Ifx_DSADC *module = configHw->inputConfig.module;
326 boolean result = (module != NULL_PTR) ? TRUE : FALSE;
327
328 if (result != FALSE)
329 {
330 /* Initialise input channels */
331 {
332 IfxDsadc_Dsadc_ChannelConfig channelConfig = configHw->inputConfig;
333 channelConfig.channelId = configHw->inputCos;
334 IfxDsadc_Dsadc_initChannel(&hwHandle->inputCos, &channelConfig);
335
336 channelConfig.channelId = configHw->inputSin;
337 IfxDsadc_Dsadc_initChannel(&hwHandle->inputSin, &channelConfig);
338
339 if (configHw->servReqPriority != 0)
340 {
341 IfxDsadc_ChannelId ch = channelConfig.channelId;
342
343 volatile Ifx_SRC_SRCR *srcr;
344
345 if (ch == 0)
346 {
347 srcr = &MODULE_SRC.DSADC.DSADC0.SRM;
348 }
349
350 else if (ch == 2)
351 {
352 srcr = &MODULE_SRC.DSADC.DSADC2.SRM;
353 }
354
355 else if (ch == 3)
356 {
357 srcr = &MODULE_SRC.DSADC.DSADC3.SRM;
358 }
359
360 IfxSrc_init(srcr, configHw->servReqProvider, configHw->servReqPriority);
361 IfxSrc_enable(srcr);
362 }
363 }
364
365 /* Initialise carrier generator, if necessary */
366 if ((configHw->carrierGen.pinNeg != NULL_PTR) || (configHw->carrierGen.pinPos != NULL_PTR))
367 {
368 IfxDsadc_Dsadc_initCarrierGen(config->dsadc, &configHw->carrierGen);
369 }
370
371 /* Start conversion, if necessary */
372 if (configHw->startScan != FALSE)
373 {
374 IfxDsadc_Rdc_startConversion(driver);
375 }
376
377 /* Initialise modulator clock output, if necessary */
378 if (configHw->outputClock != NULL_PTR)
379 {
380 const IfxPort_Pin *clkPin = &(configHw->outputClock->pin);
381 IfxPort_setPinModeOutput(clkPin->port, clkPin->pinIndex, configHw->carrierGen.pinMode, configHw->outputClock->select);
382 IfxPort_setPinPadDriver(clkPin->port, clkPin->pinIndex, IfxPort_PadDriver_cmosAutomotiveSpeed1);
383 }
384 }
385
386 return result;
387 }
388
389
390 IFX_STATIC void IfxDsadc_Rdc_initHwTimestamp(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
391 {
392 IfxDsadc_Rdc_Hw *hwHandle = &(driver->hardware);
393 const IfxDsadc_Rdc_ConfigHw *configHw = &config->hardware;
394 const IfxDsadc_Rdc_GtmTimestamp *tsConfig = &(configHw->gtmTimestamp);
395 Ifx_GTM *gtm = tsConfig->gtm;
396
397 /** - Initialize TIM channel which is triggered by application's PWM */
398 {
399 boolean risingEdge = (configHw->inputConfig.demodulator.timestampTrigger == IfxDsadc_TimestampTrigger_risingEdge);
400 hwHandle->pwmTimCh = IfxDsadc_Rdc_initGtmTim(gtm, tsConfig->pwmTim->tim, tsConfig->pwmTim->channel, risingEdge);
401
402 /* connect into TIM timer input: */
403 IfxGtm_PinMap_setTimTin(tsConfig->pwmTim, IfxPort_InputMode_undefined);
404 }
405 /** - Initialize TIM channel which is triggered by DSADC sample event */
406 {
407 hwHandle->rdcTimCh = IfxDsadc_Rdc_initGtmTim(gtm, tsConfig->rdcTim, tsConfig->rdcTimChannel, TRUE);
408
409 /** - Connect DSADC trigger to TIM mux */
410 IfxGtm_Trig_fromDsadc(gtm, configHw->inputSin, tsConfig->rdcTim, tsConfig->rdcTimChannel);
411
412 /** - Connect into TIM input */
413 uint32 shift = tsConfig->rdcTimChannel * 4;
414 __ldmst_c(&(gtm->INOUTSEL.TIM[tsConfig->rdcTim].INSEL.U), (0xFU << shift), (tsConfig->rdcTimMuxValue << shift));
415 }
416 IfxGtm_Tbu_enableChannel(gtm, IfxGtm_Tbu_Ts_0);
417 }
418
419
420 void IfxDsadc_Rdc_onEventA(IfxDsadc_Rdc *driver)
421 {
422 driver->timestamp.rdc = driver->hardware.rdcTimCh->GPR0.B.GPR0;
423
424 Ifx_DSADC *dsadc = driver->hardware.inputSin.module;
425 driver->sinIn = IfxDsadc_getMainResult(dsadc, driver->hardware.inputSin.channelId);
426 driver->cosIn = IfxDsadc_getMainResult(dsadc, driver->hardware.inputCos.channelId);
427 /*
428 */
429
430 #if IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION == 0
431 {
432 sint16 sinIn = driver->sinIn;
433 sint16 cosIn = driver->cosIn;
434
435 /* tracking observer (note: atan2 lookup function is available inside) */
436 Ifx_AngleTrkF32_step(&(driver->angleTrk), sinIn, cosIn, 0);
437 Ifx_AngleTrkF32_updateStatus(&(driver->angleTrk), sinIn, cosIn);
438 }
439 #endif
440 }
441
442
443 void IfxDsadc_Rdc_reset(IfxDsadc_Rdc *driver)
444 {
445 Ifx_AngleTrkF32_reset(&driver->angleTrk);
446 }
447
448
449 void IfxDsadc_Rdc_resetFaults(IfxDsadc_Rdc *driver)
450 {
451 Ifx_AngleTrkF32_resetFaults(&driver->angleTrk);
452 }
453
454
455 void IfxDsadc_Rdc_setOffset(IfxDsadc_Rdc *driver, sint32 offset)
456 {
457 Ifx_AngleTrkF32_setOffset(&driver->angleTrk, offset);
458 }
459
460
461 void IfxDsadc_Rdc_setRefreshPeriod(IfxDsadc_Rdc *driver, float32 updatePeriod)
462 {
463 Ifx_AngleTrkF32_setRefreshPeriod(&driver->angleTrk, updatePeriod);
464 }
465
466
467 void IfxDsadc_Rdc_startConversion(IfxDsadc_Rdc *driver)
468 {
469 Ifx_DSADC *module = driver->hardware.inputSin.module;
470 uint32 mask =
471 (1U << driver->hardware.inputCos.channelId) |
472 (1U << driver->hardware.inputSin.channelId);
473 IfxDsadc_startScan(module, mask, mask);
474 }
475
476
477 boolean IfxDsadc_Rdc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxDsadc_Rdc *driver)
478 {
479 /* Ensure the stdif is reset to zeros */
480 memset(stdif, 0, sizeof(IfxStdIf_Pos));
481
482 /* Set the driver */
483 stdif->driver = driver;
484
485 /* *INDENT-OFF* Note: this file was indented manually by the author. */
486 /* Set the API link */
487 stdif->onZeroIrq =(IfxStdIf_Pos_OnZeroIrq )NULL_PTR;
488 stdif->getAbsolutePosition=(IfxStdIf_Pos_GetAbsolutePosition )&IfxDsadc_Rdc_getAbsolutePosition;
489 stdif->getDirection =(IfxStdIf_Pos_GetDirection )&IfxDsadc_Rdc_getDirection;
490 stdif->getFault =(IfxStdIf_Pos_GetFault )&IfxDsadc_Rdc_getFault;
491 stdif->getOffset =(IfxStdIf_Pos_GetOffset )&IfxDsadc_Rdc_getOffset;
492 stdif->getPeriodPerRotation =(IfxStdIf_Pos_GetPeriodPerRotation )&IfxDsadc_Rdc_getPeriodPerRotation;
493 stdif->getPosition =(IfxStdIf_Pos_GetPosition )&IfxDsadc_Rdc_getPosition;
494 stdif->getRawPosition =(IfxStdIf_Pos_GetRawPosition )&IfxDsadc_Rdc_getRawPosition;
495 stdif->getRefreshPeriod =(IfxStdIf_Pos_GetRefreshPeriod )&IfxDsadc_Rdc_getRefreshPeriod;
496 stdif->getResolution =(IfxStdIf_Pos_GetResolution )&IfxDsadc_Rdc_getResolution;
497 stdif->getSensorType =(IfxStdIf_Pos_GetSensorType )&IfxDsadc_Rdc_getSensorType;
498 stdif->reset =(IfxStdIf_Pos_Reset )&IfxDsadc_Rdc_reset;
499 stdif->resetFaults =(IfxStdIf_Pos_ResetFaults )&IfxDsadc_Rdc_resetFaults;
500 stdif->getSpeed =(IfxStdIf_Pos_GetSpeed )&IfxDsadc_Rdc_getSpeed;
501 stdif->update =(IfxStdIf_Pos_Update )&IfxDsadc_Rdc_update;
502 stdif->setPosition =(IfxStdIf_Pos_SetPosition )NULL_PTR;
503 stdif->setRawPosition =(IfxStdIf_Pos_SetRawPosition )NULL_PTR;
504 stdif->setSpeed =(IfxStdIf_Pos_SetSpeed )NULL_PTR;
505 stdif->setOffset =(IfxStdIf_Pos_SetOffset )&IfxDsadc_Rdc_setOffset;
506 stdif->setRefreshPeriod =(IfxStdIf_Pos_SetRefreshPeriod )&IfxDsadc_Rdc_setRefreshPeriod;
507 stdif->getTurn =(IfxStdIf_Pos_GetTurn )&IfxDsadc_Rdc_getTurn;
508 stdif->onEventA =(IfxStdIf_Pos_OnEventA )&IfxDsadc_Rdc_onEventA;
509 /* *INDENT-ON* */
510
511 return TRUE;
512 }
513
514
515 void IfxDsadc_Rdc_update(IfxDsadc_Rdc *driver)
516 {
517 float32 groupDelayAngle;
518 float32 timeStampAngle;
519 float32 angleOut;
520 float32 speedEst;
521 float32 angleCorrection;
522
523 /* previous estimated speed */
524 speedEst = Ifx_AngleTrkF32_getLoopSpeed(&(driver->angleTrk));
525
526 /* angular component due to group delay */
527 groupDelayAngle = driver->groupDelay * speedEst;
528
529 /* angular component due to time-stamp, if time-stamping is enabled */
530 if (driver->timestamp.enabled != FALSE)
531 {
532 IfxDsadc_Rdc_updateTimestamp(driver);
533 timeStampAngle = IfxDsadc_Rdc_getTimestamp(driver) * speedEst;
534 }
535 else
536 {
537 timeStampAngle = 0;
538 }
539
540 /* angle correction value */
541 angleCorrection = groupDelayAngle + timeStampAngle;
542
543 #if IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION != 0
544 /*
545 * driver->sinIn = (sint16)driver->hardware.inputSin.channel->TSTMP.B.RESULT;
546 * driver->cosIn = (sint16)driver->hardware.inputCos.channel->TSTMP.B.RESULT;
547 */
548
549 {
550 sint16 sinIn = driver->sinIn;
551 sint16 cosIn = driver->cosIn;
552
553 /* tracking observer (note: atan2 lookup function is available inside) */
554 Ifx_AngleTrkF32_step(&(driver->angleTrk), sinIn, cosIn, angleCorrection);
555 Ifx_AngleTrkF32_updateStatus(&(driver->angleTrk), sinIn, cosIn);
556 }
557 angleOut = driver->angleTrk.angleEst;
558 #else
559 angleOut = driver->angleTrk.angleEst + angleCorrection;
560 #endif
561
562 /* final output estimation */
563 {
564 Ifx_AngleTrkF32_PosIf *base = &(driver->angleTrk).base;
565 IfxStdIf_Pos_RawAngle newPosition = (IfxStdIf_Pos_RawAngle)(angleOut * (base->resolution / 2) / IFX_PI);
566 newPosition = (newPosition + base->offset) & (base->resolution - 1);
567 base->rawPosition = newPosition;
568 }
569 }
Ifx_AngleTrkF32_resetFaults
void Ifx_AngleTrkF32_resetFaults(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:396
IfxDsadc_Rdc_Config::periodPerRotation
uint16 periodPerRotation
Number of electrical periods per mechanical rotation.
Definition: IfxDsadc_Rdc.h:404
Ifx_AngleTrkF32_Config::periodPerRotation
uint16 periodPerRotation
Number of electrical periods per mechanical rotation.
Definition: Ifx_AngleTrkF32.h:82
IfxDsadc_Rdc_initHwChannels
IFX_STATIC boolean IfxDsadc_Rdc_initHwChannels(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the DSADC hardware channels.
Definition: IfxDsadc_Rdc.c:320
IfxDsadc_Rdc_Hw::rdcTimCh
Ifx_GTM_TIM_CH * rdcTimCh
TIM channel for DSADC timestamp.
Definition: IfxDsadc_Rdc.h:358
Ifx_AngleTrkF32_Config::offset
IfxStdIf_Pos_RawAngle offset
Offset in ticks. [0 .. (Ifx_AngleTrkF32_Config::resolution - 1)].
Definition: Ifx_AngleTrkF32.h:85
IfxGtm_Tim_0
TIM object 0.
Definition: IfxGtm_cfg.h:254
IfxDsadc_Rdc_ConfigHw::servReqPriority
Ifx_Priority servReqPriority
Interrupt priority. NOTE: Only used by inputSin and will override value given in the inputConfig...
Definition: IfxDsadc_Rdc.h:342
IfxGtm_PinMap_setTimTin
void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
Definition: IfxGtm_PinMap.c:706
Ifx_AngleTrkF32_getAbsolutePosition
float32 Ifx_AngleTrkF32_getAbsolutePosition(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:335
IfxStdIf_Pos_GetRefreshPeriod
float32(* IfxStdIf_Pos_GetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf)
Get the update period.
Definition: IfxStdIf_Pos.h:187
IfxDsadc_ChannelId
IfxDsadc_ChannelId
Specifies the channel Index.
Definition: IfxDsadc.h:137
IfxDsadc_Rdc_Config::userTs
float32 userTs
Sampling period of the application.
Definition: IfxDsadc_Rdc.h:401
IfxDsadc_Rdc_ConfigHw::inputSin
IfxDsadc_ChannelId inputSin
Channel ID of DSADC used for SIN input. This will override value given in the inputConfig.
Definition: IfxDsadc_Rdc.h:340
IfxDsadc_Rdc_Config::offset
IfxStdIf_Pos_RawAngle offset
Offset in ticks. [0 .. (IfxDsadc_Rdc_Config::resolution - 1)].
Definition: IfxDsadc_Rdc.h:407
Ifx_AngleTrkF32_initConfig
void Ifx_AngleTrkF32_initConfig(Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
Fill config with default values.
Definition: Ifx_AngleTrkF32.c:130
IfxDsadc_Rdc_ConfigHw::startScan
boolean startScan
Specifies whether the conversion will be started as soon as the IfxDsadc_Rdc_initHw() is called...
Definition: IfxDsadc_Rdc.h:344
IfxStdIf_Pos_::setRefreshPeriod
IfxStdIf_Pos_SetRefreshPeriod setRefreshPeriod
Definition: IfxStdIf_Pos.h:307
IfxGtm_Tim_Mode_inputEvent
TIEM.
Definition: IfxGtm_Tim.h:110
IfxDsadc_Dsadc_Channel::module
Ifx_DSADC * module
Specifies the pointer to the DSADC module registers.
Definition: IfxDsadc_Dsadc.h:316
IfxStdIf_Pos_GetOffset
sint32(* IfxStdIf_Pos_GetOffset)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position sensor offset.
Definition: IfxStdIf_Pos.h:139
IfxDsadc_Rdc_ConfigHw
RDC hardware configuration.
Definition: IfxDsadc_Rdc.h:337
IfxDsadc_Rdc_GtmTimestamp::rdcTim
IfxGtm_Tim rdcTim
Definition: IfxDsadc_Rdc.h:325
IfxDsadc_Rdc_calculateGroupDelay
IFX_STATIC float32 IfxDsadc_Rdc_calculateGroupDelay(IfxDsadc_Rdc *driver)
Group Dalay calculation.
Definition: IfxDsadc_Rdc.c:159
IfxGtm_Tim_GprSel_tbuTs0
Definition: IfxGtm_Tim.h:94
IfxStdIf_Pos_SetRawPosition
void(* IfxStdIf_Pos_SetRawPosition)(IfxStdIf_InterfaceDriver stdIf, sint32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:265
IfxDsadc_Dsadc_initChannel
void IfxDsadc_Dsadc_initChannel(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ChannelConfig *config)
Initialise a DSADC channel with the supplied configuration.
Definition: IfxDsadc_Dsadc.c:196
IfxDsadc_Rdc_resetFaults
void IfxDsadc_Rdc_resetFaults(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:449
IfxDsadc_Rdc_GtmTimestamp::gtm
Ifx_GTM * gtm
Pointer to GTM SFRs.
Definition: IfxDsadc_Rdc.h:324
IfxGtm_Tbu_enableChannel
IFX_INLINE void IfxGtm_Tbu_enableChannel(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Enables the channel.
Definition: IfxGtm_Tbu.h:115
IfxDsadc_Rdc_getRawPosition
IFX_INLINE IfxStdIf_Pos_RawAngle IfxDsadc_Rdc_getRawPosition(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.h:613
IfxDsadc_getMainGroupDelay
float32 IfxDsadc_getMainGroupDelay(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Estimate the group delay of main-chain filters in seconds.
Definition: IfxDsadc.c:87
IfxStdIf_Pos_::setOffset
IfxStdIf_Pos_SetOffset setOffset
Definition: IfxStdIf_Pos.h:303
IfxStdIf_Pos_::setPosition
IfxStdIf_Pos_SetPosition setPosition
Definition: IfxStdIf_Pos.h:304
IfxGtm_Tim_Ch_0
TIM channel 0.
Definition: IfxGtm_cfg.h:263
IfxGtm_Tbu_Ts_0
Definition: IfxGtm_Tbu.h:68
IfxStdIf_Pos_GetSpeed
float32(* IfxStdIf_Pos_GetSpeed)(IfxStdIf_InterfaceDriver stdIf)
Return the speed.
Definition: IfxStdIf_Pos.h:205
Ifx_AngleTrkF32_Config::kd
float32 kd
Derivative gain.
Definition: Ifx_AngleTrkF32.h:77
Ifx_AngleTrkF32_getResolution
sint32 Ifx_AngleTrkF32_getResolution(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:377
Ifx_AngleTrkF32::angleEst
float32 angleEst
Definition: Ifx_AngleTrkF32.h:125
IfxStdIf_Pos_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Pos.h:285
IfxDsadc_Rdc_Config::kp
float32 kp
Observer proportional gain.
Definition: IfxDsadc_Rdc.h:396
IfxDsadc_Rdc_ConfigHw::inputConfig
IfxDsadc_Dsadc_ChannelConfig inputConfig
Default channel configuration for both SIN and COS input.
Definition: IfxDsadc_Rdc.h:339
IfxDsadc_Rdc::cosIn
sint16 cosIn
Definition: IfxDsadc_Rdc.h:384
IfxDsadc_Rdc_getDirection
IfxStdIf_Pos_Dir IfxDsadc_Rdc_getDirection(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:179
Ifx_AngleTrkF32_Config::ki
float32 ki
Integrator gain.
Definition: Ifx_AngleTrkF32.h:76
Ifx_AngleTrkF32_PosIf::rawPosition
IfxStdIf_Pos_RawAngle rawPosition
raw position in ticks.
Definition: Ifx_AngleTrkF32.h:102
Ifx_AngleTrkF32_Config::sqrAmplMax
sint32 sqrAmplMax
Maximum value for square of signal amplitudes.
Definition: Ifx_AngleTrkF32.h:80
IfxDsadc_Rdc_ConfigHw::gtmTimestamp
IfxDsadc_Rdc_GtmTimestamp gtmTimestamp
Timestamp helper using GTM.
Definition: IfxDsadc_Rdc.h:348
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Trig_fromDsadc
boolean IfxGtm_Trig_fromDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
Definition: IfxGtm_Trig.c:174
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:108
IfxDsadc_Dsadc_Channel::channelId
IfxDsadc_ChannelId channelId
Channel Id.
Definition: IfxDsadc_Dsadc.h:318
IfxStdIf_Pos_::getRawPosition
IfxStdIf_Pos_GetRawPosition getRawPosition
Definition: IfxStdIf_Pos.h:292
IfxStdIf_Pos_::getPeriodPerRotation
IfxStdIf_Pos_GetPeriodPerRotation getPeriodPerRotation
Definition: IfxStdIf_Pos.h:293
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
Ifx_AngleTrkF32_Config::resolution
sint32 resolution
Sensor resolution.
Definition: Ifx_AngleTrkF32.h:84
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:252
IfxStdIf_Pos_RawAngle
sint32 IfxStdIf_Pos_RawAngle
Definition: IfxStdIf_Pos.h:113
IfxDsadc_Rdc_Hw::inputCos
IfxDsadc_Dsadc_Channel inputCos
Handle to COS input channel.
Definition: IfxDsadc_Rdc.h:356
IfxDsadc_Rdc_Config
DSADC RDC configuration structure Note: if ALL kp, ki, kd are zero, then the init function will use d...
Definition: IfxDsadc_Rdc.h:394
IfxStdIf_Pos_::getSensorType
IfxStdIf_Pos_GetSensorType getSensorType
Definition: IfxStdIf_Pos.h:296
Ifx_AngleTrkF32_init
void Ifx_AngleTrkF32_init(Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
Initialize the Angle Tracking object.
Definition: Ifx_AngleTrkF32.c:162
IfxDsadc_Rdc_GtmTimestamp::rdcTimMuxValue
uint32 rdcTimMuxValue
Mux value used.
Definition: IfxDsadc_Rdc.h:327
IfxDsadc_getIntegratorOutFreq
float32 IfxDsadc_getIntegratorOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the integrator output in Hz.
Definition: IfxDsadc.c:58
IfxDsadc_Cout_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxDsadc_PinMap.h:121
IfxPort_InputMode_undefined
Definition: IfxPort.h:82
IfxDsadc_Rdc_getSensorType
IfxStdIf_Pos_SensorType IfxDsadc_Rdc_getSensorType(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:209
IfxStdIf_Pos_::getDirection
IfxStdIf_Pos_GetDirection getDirection
Definition: IfxStdIf_Pos.h:290
IfxDsadc_Rdc_Ts::inSeconds
float32 inSeconds
Definition: IfxDsadc_Rdc.h:366
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxStdIf_Pos_OnZeroIrq
void(* IfxStdIf_Pos_OnZeroIrq)(IfxStdIf_InterfaceDriver stdIf)
Handles the zero interrupt.
Definition: IfxStdIf_Pos.h:132
Ifx_AngleTrkF32_step
float32 Ifx_AngleTrkF32_step(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisa...
Definition: Ifx_AngleTrkF32.c:220
IfxDsadc_Rdc_getPosition
float32 IfxDsadc_Rdc_getPosition(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:191
IfxDsadc_startScan
IFX_INLINE void IfxDsadc_startScan(Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels.
Definition: IfxDsadc.h:745
IfxGtm_Tim_TinMap::tim
IfxGtm_Tim tim
TIM unit index.
Definition: IfxGtm_PinMap.h:95
IfxStdIf_Pos_::setRawPosition
IfxStdIf_Pos_SetRawPosition setRawPosition
Definition: IfxStdIf_Pos.h:305
FALSE
#define FALSE
Definition: Platform_Types.h:93
Ifx_AngleTrkF32_Config::kp
float32 kp
Proportional gain.
Definition: Ifx_AngleTrkF32.h:75
IfxStdIf_Pos_::getRefreshPeriod
IfxStdIf_Pos_GetRefreshPeriod getRefreshPeriod
Definition: IfxStdIf_Pos.h:294
IfxGtm_Tim_CntsSel_cntReg
Definition: IfxGtm_Tim.h:72
Ifx_AngleTrkF32_Config::errorThreshold
float32 errorThreshold
Threshold of error value in the tracking loop.
Definition: Ifx_AngleTrkF32.h:79
Ifx_AngleTrkF32_getDirection
IfxStdIf_Pos_Dir Ifx_AngleTrkF32_getDirection(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:341
IfxStdIf_Pos_::getPosition
IfxStdIf_Pos_GetPosition getPosition
Definition: IfxStdIf_Pos.h:289
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxDsadc_Rdc_stdIfPosInit
boolean IfxDsadc_Rdc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxDsadc_Rdc *driver)
Initializes the standard interface "Pos".
Definition: IfxDsadc_Rdc.c:477
IfxDsadc_Dsadc_CarrierGenConfig::pinPos
IFX_CONST IfxDsadc_Cgpwm_Out * pinPos
Positive-carrier pin configuration.
Definition: IfxDsadc_Dsadc.h:306
sint16
short sint16
Definition: Platform_Types.h:129
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:217
IfxStdIf_Pos_::getFault
IfxStdIf_Pos_GetFault getFault
Definition: IfxStdIf_Pos.h:291
IfxDsadc_Rdc_Config::ki
float32 ki
Observer integral gain.
Definition: IfxDsadc_Rdc.h:397
IfxStdIf_Pos_GetSensorType
IfxStdIf_Pos_SensorType(* IfxStdIf_Pos_GetSensorType)(IfxStdIf_InterfaceDriver stdIf)
Get the sensor type.
Definition: IfxStdIf_Pos.h:199
IfxDsadc_Rdc_GtmTimCfg
IFX_STATIC IFX_CONST Ifx_GTM_TIM_CH_CTRL_Bits IfxDsadc_Rdc_GtmTimCfg
GTM TIM Configuration settings.
Definition: IfxDsadc_Rdc.c:123
IFXDSADC_RDC_CFG_DEBUG
#define IFXDSADC_RDC_CFG_DEBUG
Definition: IfxDsadc_Rdc.h:311
IfxDsadc_Rdc_Ts::rdc
uint32 rdc
Absolute time of DSADC result.
Definition: IfxDsadc_Rdc.h:367
Ifx_AngleTrkF32_reset
void Ifx_AngleTrkF32_reset(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:408
IfxStdIf_Pos_SetPosition
void(* IfxStdIf_Pos_SetPosition)(IfxStdIf_InterfaceDriver stdIf, float32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:259
IfxStdIf_Pos_GetRawPosition
sint32(* IfxStdIf_Pos_GetRawPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position in ticks.
Definition: IfxStdIf_Pos.h:181
IfxDsadc_Rdc_Config::hardware
IfxDsadc_Rdc_ConfigHw hardware
Pointer to hardware config.
Definition: IfxDsadc_Rdc.h:408
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:144
IfxStdIf_Pos_GetDirection
IfxStdIf_Pos_Dir(* IfxStdIf_Pos_GetDirection)(IfxStdIf_InterfaceDriver stdIf)
Return the direction.
Definition: IfxStdIf_Pos.h:158
IfxDsadc_Dsadc_CarrierGenConfig::pinMode
IfxPort_OutputMode pinMode
Carrier pins output mode.
Definition: IfxDsadc_Dsadc.h:308
IfxDsadc_Rdc_initConfig
void IfxDsadc_Rdc_initConfig(IfxDsadc_Rdc_Config *config)
Definition: IfxDsadc_Rdc.c:277
Ifx_AngleTrkF32_getTurn
sint32 Ifx_AngleTrkF32_getTurn(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:390
IfxDsadc_Rdc_initGtmTim
IFX_STATIC Ifx_GTM_TIM_CH * IfxDsadc_Rdc_initGtmTim(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch timCh, boolean risingEdge)
Definition: IfxDsadc_Rdc.c:309
IfxDsadc_Dsadc_CarrierGenConfig::pinNeg
IFX_CONST IfxDsadc_Cgpwm_Out * pinNeg
Negative-carrier pin configuration.
Definition: IfxDsadc_Dsadc.h:307
IfxDsadc_Rdc_getTurn
sint32 IfxDsadc_Rdc_getTurn(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:215
IfxDsadc_Rdc_Config::sqrAmplMax
sint32 sqrAmplMax
Maximum value for square of signal amplitudes.
Definition: IfxDsadc_Rdc.h:402
Ifx_AngleTrkF32_PosIf::resolution
IfxStdIf_Pos_RawAngle resolution
resolution of this position sensor interface
Definition: Ifx_AngleTrkF32.h:110
IfxDsadc_Rdc_setOffset
void IfxDsadc_Rdc_setOffset(IfxDsadc_Rdc *driver, sint32 offset)
Definition: IfxDsadc_Rdc.c:455
IfxStdIf_Pos_SetRefreshPeriod
void(* IfxStdIf_Pos_SetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod)
Set the update period.
Definition: IfxStdIf_Pos.h:279
IfxDsadc_Rdc_getRefreshPeriod
float32 IfxDsadc_Rdc_getRefreshPeriod(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:197
IfxDsadc_Rdc::angleTrk
Ifx_AngleTrkF32 angleTrk
Definition: IfxDsadc_Rdc.h:382
Ifx_AngleTrkF32_Config
Angle Tracking Observer configuration.
Definition: Ifx_AngleTrkF32.h:73
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
Ifx_AngleTrkF32_Config::speedLpfFc
float32 speedLpfFc
Cut-off frequency of speed low-pass filter.
Definition: Ifx_AngleTrkF32.h:78
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:92
IfxStdIf_Pos_OnEventA
void(* IfxStdIf_Pos_OnEventA)(IfxStdIf_InterfaceDriver stdIf)
Handles the A sensor event Event A is a sensor defined event. it is optional.
Definition: IfxStdIf_Pos.h:218
IfxGtm_Tbu_getClockFrequency
float32 IfxGtm_Tbu_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Returns the clock frequency.
Definition: IfxGtm_Tbu.c:53
IfxStdIf_Pos_GetPeriodPerRotation
uint16(* IfxStdIf_Pos_GetPeriodPerRotation)(IfxStdIf_InterfaceDriver stdIf)
Return the period per rotation setting.
Definition: IfxStdIf_Pos.h:172
IfxStdIf_Pos_::getResolution
IfxStdIf_Pos_GetResolution getResolution
Definition: IfxStdIf_Pos.h:295
Ifx_AngleTrkF32_setRefreshPeriod
void Ifx_AngleTrkF32_setRefreshPeriod(Ifx_AngleTrkF32 *driver, float32 updatePeriod)
Definition: Ifx_AngleTrkF32.c:402
IfxDsadc_Rdc
DSADC RDC data structure.
Definition: IfxDsadc_Rdc.h:380
IfxDsadc_Rdc_update
void IfxDsadc_Rdc_update(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:515
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:283
Ifx_AngleTrkF32_Config::reversed
boolean reversed
TRUE: reversed direction, FALSE: straight direction.
Definition: Ifx_AngleTrkF32.h:83
IfxDsadc_Rdc_updateTimestamp
IFX_INLINE void IfxDsadc_Rdc_updateTimestamp(IfxDsadc_Rdc *driver)
Updating RDC timestamps.
Definition: IfxDsadc_Rdc.c:140
IfxDsadc_Rdc_getFault
IFX_INLINE IfxStdIf_Pos_Status IfxDsadc_Rdc_getFault(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.h:601
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:81
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxDsadc_Rdc_Config::resolution
sint32 resolution
Sensor resolution.
Definition: IfxDsadc_Rdc.h:406
Ifx_AngleTrkF32_getLoopSpeed
IFX_INLINE float32 Ifx_AngleTrkF32_getLoopSpeed(Ifx_AngleTrkF32 *aObsv)
get the speed.
Definition: Ifx_AngleTrkF32.h:175
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxDsadc_Cout_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxDsadc_PinMap.h:122
IfxDsadc_Rdc_ConfigHw::outputClock
IfxDsadc_Cout_Out * outputClock
if not NULL_PTR, modulator clock output pin from inputSin channel will be configured ...
Definition: IfxDsadc_Rdc.h:347
IfxDsadc_Rdc_initHwTimestamp
IFX_STATIC void IfxDsadc_Rdc_initHwTimestamp(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the GTM timestamp hardware resources.
Definition: IfxDsadc_Rdc.c:390
IfxDsadc_Rdc_Config::kd
float32 kd
Observer differential gain.
Definition: IfxDsadc_Rdc.h:398
IfxStdIf_Pos_GetFault
IfxStdIf_Pos_Status(* IfxStdIf_Pos_GetFault)(IfxStdIf_InterfaceDriver stdIf)
Return the sensor status.
Definition: IfxStdIf_Pos.h:165
IfxDsadc_Rdc_onEventA
void IfxDsadc_Rdc_onEventA(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:420
Ifx_AngleTrkF32_getRefreshPeriod
float32 Ifx_AngleTrkF32_getRefreshPeriod(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:371
IfxDsadc_Rdc::updatePeriod
float32 updatePeriod
Definition: IfxDsadc_Rdc.h:385
IfxDsadc_Dsadc_initCarrierGenConfig
void IfxDsadc_Dsadc_initCarrierGenConfig(IfxDsadc_Dsadc_CarrierGenConfig *config)
Definition: IfxDsadc_Dsadc.c:480
IfxDsadc_Rdc_setRefreshPeriod
void IfxDsadc_Rdc_setRefreshPeriod(IfxDsadc_Rdc *driver, float32 updatePeriod)
Definition: IfxDsadc_Rdc.c:461
IfxGtm_Tim_TinMap::channel
IfxGtm_Tim_Ch channel
TIM channel index.
Definition: IfxGtm_PinMap.h:96
IfxDsadc_Rdc_Ts
Definition: IfxDsadc_Rdc.h:363
IfxStdIf_Pos_SetSpeed
void(* IfxStdIf_Pos_SetSpeed)(IfxStdIf_InterfaceDriver stdIf, float32 speed)
Set the sensor speed (virtual sensor)
Definition: IfxStdIf_Pos.h:272
IfxStdIf_Pos_::getSpeed
IfxStdIf_Pos_GetSpeed getSpeed
Definition: IfxStdIf_Pos.h:301
IfxDsadc_getMainResult
IFX_INLINE sint16 IfxDsadc_getMainResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the main chain.
Definition: IfxDsadc.h:641
IfxStdIf_Pos_SetOffset
void(* IfxStdIf_Pos_SetOffset)(IfxStdIf_InterfaceDriver stdIf, sint32 offset)
Set the sensor offset.
Definition: IfxStdIf_Pos.h:252
IfxDsadc_Dsadc_DemodulatorConfig::timestampTrigger
IfxDsadc_TimestampTrigger timestampTrigger
Timestamp trigger mode selection.
Definition: IfxDsadc_Dsadc.h:239
IfxDsadc_Rdc_Hw
DSADC RDC hardware object structure.
Definition: IfxDsadc_Rdc.h:353
IfxDsadc_Rdc_calculateTimestampPeriod
IFX_STATIC float32 IfxDsadc_Rdc_calculateTimestampPeriod(const IfxDsadc_Rdc_Config *config)
Definition: IfxDsadc_Rdc.c:166
IfxStdIf_Pos_Reset
void(* IfxStdIf_Pos_Reset)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver.
Definition: IfxStdIf_Pos.h:236
Ifx_AngleTrkF32_PosIf
Definition: Ifx_AngleTrkF32.h:100
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxDsadc_Rdc_Config::speedLpfFc
float32 speedLpfFc
Cut-off frequency of speed low-pass filter (in Hertz).
Definition: IfxDsadc_Rdc.h:399
IfxDsadc_Rdc_ConfigHw::inputCos
IfxDsadc_ChannelId inputCos
Channel ID of DSADC used for COS input. This will override value given in the inputConfig.
Definition: IfxDsadc_Rdc.h:341
IfxStdIf_Pos_::getOffset
IfxStdIf_Pos_GetOffset getOffset
Definition: IfxStdIf_Pos.h:288
IfxStdIf_Pos_::getAbsolutePosition
IfxStdIf_Pos_GetAbsolutePosition getAbsolutePosition
Return the absolute position.
Definition: IfxStdIf_Pos.h:287
IfxDsadc_Rdc_getResolution
sint32 IfxDsadc_Rdc_getResolution(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:203
IfxDsadc_Dsadc_ChannelConfig
Single channel configuration structure.
Definition: IfxDsadc_Dsadc.h:323
IfxDsadc_Rdc_getOffset
sint32 IfxDsadc_Rdc_getOffset(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:185
IfxDsadc_Rdc_getPeriodPerRotation
IFX_INLINE uint16 IfxDsadc_Rdc_getPeriodPerRotation(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.h:607
IfxDsadc_Rdc_GtmTimestamp::rdcTimChannel
IfxGtm_Tim_Ch rdcTimChannel
TIM channel triggered by DSADC channel.
Definition: IfxDsadc_Rdc.h:326
IfxStdIf_Pos_::update
IfxStdIf_Pos_Update update
Definition: IfxStdIf_Pos.h:302
IfxDsadc_Rdc_ConfigHw::servReqProvider
IfxSrc_Tos servReqProvider
Service provider. NOTE: Only used by inputSin and will override value given in the inputConfig...
Definition: IfxDsadc_Rdc.h:343
IfxStdIf_Pos_GetTurn
sint32(* IfxStdIf_Pos_GetTurn)(IfxStdIf_InterfaceDriver stdIf)
Return position in turn.
Definition: IfxStdIf_Pos.h:211
sint32
long sint32
Definition: Platform_Types.h:134
IfxDsadc_ChannelId_2
Specifies the channel Index 2.
Definition: IfxDsadc.h:140
IfxStdIf_Pos_GetAbsolutePosition
float32(* IfxStdIf_Pos_GetAbsolutePosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position, inclusive turns.
Definition: IfxStdIf_Pos.h:126
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxDsadc_Rdc_Hw::inputSin
IfxDsadc_Dsadc_Channel inputSin
Handle to SIN input channel.
Definition: IfxDsadc_Rdc.h:355
IfxDsadc_Rdc_GtmTimestamp::pwmTim
IfxGtm_Tim_TinMap * pwmTim
TIM channel triggered by PWM trigger.
Definition: IfxDsadc_Rdc.h:328
IfxDsadc_Rdc_Config::reversed
boolean reversed
TRUE: reversed direction, FALSE: straight direction.
Definition: IfxDsadc_Rdc.h:405
IfxStdIf_Pos_::resetFaults
IfxStdIf_Pos_ResetFaults resetFaults
Definition: IfxStdIf_Pos.h:300
IfxDsadc_Rdc_Config::sqrAmplMin
sint32 sqrAmplMin
Minimum value for square of signal amplitudes.
Definition: IfxDsadc_Rdc.h:403
IfxStdIf_Pos_Update
void(* IfxStdIf_Pos_Update)(IfxStdIf_InterfaceDriver stdIf)
Refresh the status.
Definition: IfxStdIf_Pos.h:227
IfxDsadc_Rdc_Ts::inTicks
sint32 inTicks
Time-stamp of last result (in ticks). Used only if IFXDSADC_RDC_CFG_DEBUG is set. ...
Definition: IfxDsadc_Rdc.h:369
IfxDsadc_Rdc_Ts::pwm
uint32 pwm
Absolute time of user&#39;s PWM trigger. Used only if IFXDSADC_RDC_CFG_DEBUG is set.
Definition: IfxDsadc_Rdc.h:368
IfxDsadc_Rdc_getTimestamp
IFX_INLINE float32 IfxDsadc_Rdc_getTimestamp(IfxDsadc_Rdc *driver)
Return timestamp in seconds.
Definition: IfxDsadc_Rdc.h:625
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:261
IfxStdIf_Pos_::onZeroIrq
IfxStdIf_Pos_OnZeroIrq onZeroIrq
Definition: IfxStdIf_Pos.h:286
IfxDsadc_Rdc_Config::errorThreshold
float32 errorThreshold
Threshold of error value in the tracking loop (in radian)
Definition: IfxDsadc_Rdc.h:400
Ifx_AngleTrkF32_getOffset
sint32 Ifx_AngleTrkF32_getOffset(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:353
IfxDsadc_Rdc::sinIn
sint16 sinIn
Definition: IfxDsadc_Rdc.h:383
IfxDsadc_Rdc::groupDelay
float32 groupDelay
Definition: IfxDsadc_Rdc.h:386
IfxDsadc_Rdc_getUpdatePeriod
IFX_STATIC float32 IfxDsadc_Rdc_getUpdatePeriod(IfxDsadc_Rdc *driver)
Return the update period.
Definition: IfxDsadc_Rdc.c:221
IfxStdIf_Pos_::onEventA
IfxStdIf_Pos_OnEventA onEventA
Definition: IfxStdIf_Pos.h:298
IfxStdIf_Pos_SensorType_resolver
Definition: IfxStdIf_Pos.h:85
IfxDsadc_Rdc_reset
void IfxDsadc_Rdc_reset(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:443
IfxDsadc_Rdc_Hw::pwmTimCh
Ifx_GTM_TIM_CH * pwmTimCh
TIM channel for PWM timestamp.
Definition: IfxDsadc_Rdc.h:357
Ifx_AngleTrkF32_Config::sqrAmplMin
sint32 sqrAmplMin
Minimum value for square of signal amplitudes.
Definition: Ifx_AngleTrkF32.h:81
Ifx_AngleTrkF32_getPosition
float32 Ifx_AngleTrkF32_getPosition(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:365
IfxDsadc_Rdc_getSpeed
IFX_INLINE float32 IfxDsadc_Rdc_getSpeed(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.h:619
IfxDsadc_Dsadc_ChannelConfig::demodulator
IfxDsadc_Dsadc_DemodulatorConfig demodulator
Demodulator configuration structure.
Definition: IfxDsadc_Dsadc.h:328
IfxDsadc_ChannelId_0
Specifies the channel Index 0.
Definition: IfxDsadc.h:139
IfxDsadc_Rdc_Config::dsadc
IfxDsadc_Dsadc * dsadc
Pointer to the DSADC driver.
Definition: IfxDsadc_Rdc.h:409
IfxDsadc_Rdc.h
DSADC RDC details.
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Tim_getChannel
IFX_INLINE Ifx_GTM_TIM_CH * IfxGtm_Tim_getChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Returns the pointer to the TIM channel.
Definition: IfxGtm_Tim.h:370
IfxDsadc_Dsadc_initCarrierGen
void IfxDsadc_Dsadc_initCarrierGen(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_CarrierGenConfig *config)
Initialise the DSADC carrier generator.
Definition: IfxDsadc_Dsadc.c:165
IfxGtm_Trig.h
GTM TRIG details.
IfxStdIf_Pos_::getTurn
IfxStdIf_Pos_GetTurn getTurn
Definition: IfxStdIf_Pos.h:297
IfxDsadc_Rdc::hardware
IfxDsadc_Rdc_Hw hardware
Definition: IfxDsadc_Rdc.h:387
IfxDsadc_Rdc_startConversion
void IfxDsadc_Rdc_startConversion(IfxDsadc_Rdc *driver)
Synchronously start of both DSADC H/W channels.
Definition: IfxDsadc_Rdc.c:467
IfxStdIf_Pos_::reset
IfxStdIf_Pos_Reset reset
Definition: IfxStdIf_Pos.h:299
IfxDsadc_Rdc_init
boolean IfxDsadc_Rdc_init(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the DSADC RDC driver by initialising:
Definition: IfxDsadc_Rdc.c:228
IfxDsadc_Rdc_Ts::clockPeriod
float32 clockPeriod
Period of absolute time clock (in second)
Definition: IfxDsadc_Rdc.h:371
IfxDsadc_Rdc_Ts::enabled
boolean enabled
Definition: IfxDsadc_Rdc.h:365
IfxDsadc_Rdc::timestamp
IfxDsadc_Rdc_Ts timestamp
Definition: IfxDsadc_Rdc.h:388
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxDsadc_TimestampTrigger_risingEdge
Trigger event upon a rising edge.
Definition: IfxDsadc.h:373
IfxDsadc_Dsadc_initChannelConfig
void IfxDsadc_Dsadc_initChannelConfig(IfxDsadc_Dsadc_ChannelConfig *config, IfxDsadc_Dsadc *dsadc)
Initialise the config struct with default DSADC channel configuration.
Definition: IfxDsadc_Dsadc.c:254
IfxDsadc_Rdc_GtmTimestamp
DSADC timestamp helper using GTM.
Definition: IfxDsadc_Rdc.h:322
IfxDsadc_Rdc_ConfigHw::carrierGen
IfxDsadc_Dsadc_CarrierGenConfig carrierGen
Pointer to the carrier signal generation configuration.
Definition: IfxDsadc_Rdc.h:345
IfxStdIf_Pos_GetPosition
float32(* IfxStdIf_Pos_GetPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position.
Definition: IfxStdIf_Pos.h:149
IfxStdIf_Pos_GetResolution
sint32(* IfxStdIf_Pos_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Get the resolution.
Definition: IfxStdIf_Pos.h:193
IfxStdIf_Pos_ResetFaults
void(* IfxStdIf_Pos_ResetFaults)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver fault.
Definition: IfxStdIf_Pos.h:245
IfxStdIf_Pos_::setSpeed
IfxStdIf_Pos_SetSpeed setSpeed
Definition: IfxStdIf_Pos.h:306
Ifx_AngleTrkF32_setOffset
void Ifx_AngleTrkF32_setOffset(Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
Set the position offset (in ticks)
Definition: Ifx_AngleTrkF32.c:271
Ifx_AngleTrkF32_updateStatus
void Ifx_AngleTrkF32_updateStatus(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
Update the status flags.
Definition: Ifx_AngleTrkF32.c:284
IfxDsadc_Rdc_getAbsolutePosition
float32 IfxDsadc_Rdc_getAbsolutePosition(IfxDsadc_Rdc *driver)
see IfxStdIf_Pos_GetAbsolutePosition
Definition: IfxDsadc_Rdc.c:173
IfxDsadc_Rdc_Ts::maxTicks
uint32 maxTicks
Maximum time-stamp value (in ticks of absolute time clock)
Definition: IfxDsadc_Rdc.h:370


iLLD_TC26B: IfxDsadc_Rdc.h Source File

  • Dsadc
  • Rdc
IfxDsadc_Rdc.h
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc_Rdc.h
3 * \brief DSADC RDC details
4 * \ingroup IfxLld_Dsadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * Please refer to page \ref page_dsadc_rdc for more details.
42 * This module uses the following modules:
43 * - \ref IfxLld_Dsadc
44 * - \ref library_srvsw_sysse_math_f32_angletrk
45 *
46 *
47 *
48 * Example usage:
49 * Initialisation shall be done by using IfxDsadc_Rdc_init().
50 * \code
51 * IfxDsadc_Rdc rdcHandle;
52 * IfxDsadc_Rdc_Config rdcConfig;
53 *
54 * IfxDsadc_Rdc_initConfig(&rdcConfig);
55 * rdcConfig.hardware.inputConfig.module = &MODULE_DSADC;
56 * IfxDsadc_Rdc_init(&rdcHandle, &rdcConfig);
57 * IfxDsadc_Rdc_startConversion(&rdcHandle);
58 *
59 * \endcode
60 *
61 * After successful initialisation, one DSADC channel may generate interrupt request to CPU.
62 * Function IfxDsadc_Rdc_onEventA() shall be called in the interrupt service routine.
63 *
64 * The function IfxDsadc_Rdc_update() shall be called in the user application's task
65 * or interrupt context for updating the final outputs (position and speed),
66 * (e.g. running inside motor PWM interrupt context)
67 * \name Getting result functions
68 *
69 * \code
70 * { // within context of user's application interrupt or task
71 * extern IfxDsadc_Rdc rdcHandle;
72 *
73 * IfxDsadc_Rdc_update(&rdcHandle); // final update
74 *
75 * IfxStdIf_Pos_RawAngle position = IfxDsadc_Rdc_getRawPosition(&rdcHandle);
76 * StdReal speedRad_s = IfxDsadc_Rdc_getSpeed(&rdcHandle);
77 * }
78 * \endcode
79 *
80 * Alternatively, the application may use \ref library_srvsw_stdif_posif for accessing the actual results.
81 *
82 * \code
83 * { // within context of user's application interrupt or task
84 * extern IfxDsadc_Rdc rdcHandle;
85 * Ifx_AngleTrkF32_PosIf* posIf = (Ifx_AngleTrkF32_PosIf*)&rdcHandle; // cast is safe because it's located in the same address
86 *
87 * PosIf_update(posIf); // final update, alias of IfxDsadc_Rdc_update()
88 *
89 * elAngle = PosIf_getElAngle(posIf);
90 * elSpeed = PosIf_getElSpeed(posIf);
91 * faultOccurred = PosIf_isFault(posIf);
92 * }
93 * \endcode
94 *
95 * \note the IfxDsadc_Rdc_update() is implementing the PosIf_update(). Therefore,
96 * only one of them shall be used.
97 *
98 *
99 *
100 *
101 *
102 *
103 *
104 * \page page_dsadc_rdc Resolver-to-digital Converter with DSADC
105 *
106 * \tableofcontents
107 *
108 * One of the popular rotor positioning sensor used by electric motor drive is resolver.
109 * A resolver device modulates carrier signal R1-R2 by the SINE and COSINE function of actual
110 * angle and feeds it back into the controller unit (S1-S3, S2-S6).
111 *
112 * AURIX family provides support for resolver-to-digital converter (RDC) by providing the
113 * following functionalities:
114 * - Carrier generation (DSADC hardware)
115 * - Signal acquisition and carrier cancellation (DSADC hardware)
116 * - Timestamp acquisition (GTM TIM hardware)
117 *
118 * Additionally, the following functionalities are provided by software:
119 * - Angle tracking observer function
120 * - Fault detection
121 *
122 * This page contains concept documentation of the driver software (\ref IfxLld_Dsadc_rdc "DSADC RDC"),
123 * especially implemented in files: IfxDsadc_Rdc.h and IfxDsadc_Rdc.c
124 *
125 * \section sec_dsadc_rdc_cgen Carrier generation
126 *
127 * DSADC hardware supports the generation of resolver excitation carrier by providing PWM
128 * pin outputs which can be simply filtered by low-pass filter circuit to obtain a pair of
129 * differential signal.
130 *
131 * Common configuration of the positive and negative signals are:
132 * - carrier signal frequency
133 * - bit-reversed PWM (optional, but recommended)
134 * - waveform mode: square, triangle, or sinusoidal
135 *
136 * Those configuration are set by IfxDsadc_initCarrierGen() function which is called in the
137 * context of IfxDsadc_Rdc_init() function. Therefore, user only needs to call
138 * IfxDsadc_Rdc_init().
139 *
140 * For each pin output (positive and negative), a low-pass filter and amplifier circuitry
141 * is required to drive a resolver device. Example of such circuitry can be seen in the
142 * figure below.
143 *
144 * TODO: add picture
145 *
146 * \section sec_dsadc_rdc_acq Signal acquisition and carrier cancellation
147 *
148 * Two differential signals are generated from a resolver device (Sin+, Sin-, Cos+, Cos- or
149 * some write also as S1-S3, S2-S6). These signals basically can be connected directly into
150 * the two channels of DSADC, where each DSADC channel has P and N inputs.
151 *
152 * Single DSADC channel and carrier cancelation configuration is done by function
153 * IfxDsadc_initChannel() which is called in the context of IfxDsadc_Rdc_init() function.
154 * Therefore, user only needs to call IfxDsadc_Rdc_init().
155 *
156 * Common configuration items for each DSADC channel are:
157 * - modulator frequency (default: 10MHz)
158 * - CIC filter type (default: COMB3)
159 * - CIC decimation factor (default: 32)
160 * - FIR0 and FIR1 blocks (default: disabled)
161 *
162 * Common configuration items of the carrier cancelation in each DSADC channel are:
163 * - offset compensation block (default: enabled)
164 * - integration count (default: 32)
165 *
166 * With above default values (modulator frequency 10MHz, CIC decimation factor = 32, both FIRs
167 * disabled and integration count = 32), the output sample rate is:
168 * 10MHz / (32 * 32) = ~9.7kHz
169 *
170 * In each acquired sample, interrupt service is requested by the first DSADC channel
171 * initialised by IfxDsadc_Rdc_init(). User's application shall provide an interrupt service
172 * routine (ISR) to handle this request. In the ISR, or an OS task which is synchronised to
173 * the event, user shall call IfxDsadc_Rdc_onEventA() function in order to update all
174 * necessary driver data related to this event.
175 *
176 * \section sec_dsadc_rdc_tstmp Timestamp acquisition
177 *
178 * Typically, user's application run at different sampling rate than DSADC output sampling
179 * rate. For example, motor control PWM interrupt occurs with 10 kHz sampling whereas the
180 * DSADC interrupt runs with ~9.7 kHz. This condition creates situation where the sampled
181 * resolver position is already aged with a few timer ticks, but can be significant to the
182 * motor control algorithm.
183 *
184 * Therefore, timestamp which indicates the elapsed time since last DSADC channel sampling
185 * is required for compensating or computing the missing rotor position. In addition, this
186 * timestamp is also used for compensating the group delay which is inherent property of
187 * DSADC.
188 *
189 * The implementation of timestamp acquisition uses following hardware resources:
190 * - one timebase unit or global timer (free-running), i.e. GTM TBU
191 * - first timer capture unit, to capture the time at the DSADC sample output event, i.e.
192 * using GTM TIM channel
193 * - second timer capture unit, to capture the time at the application sample point (e.g.
194 * PWM event), i.e. using GTM TIM channel.
195 *
196 * Those resources are initialised by IfxDsadc_Rdc_initHwTimestamp() function which is called
197 * in the context of IfxDsadc_Rdc_init() function. Therefore, user **doesn't need** to call
198 * IfxDsadc_Rdc_initHwTimestamp() separately.
199 *
200 * The user shall call IfxDsadc_Rdc_update() function in order to execute:
201 * - timestamp and group delay compensation
202 * - angle tracking observer
203 * - fault-detection
204 *
205 * \section sec_dsadc_rdc_ato Angle tracking observer
206 *
207 * Output samples acquired by DSADC channel and carrier cancelation are the envelope of SINE
208 * and COSINE resolver signals. In principle, ATAN2 function can be used to calculate the
209 * rotor position (angle), but in this driver a \ref library_srvsw_sysse_math_f32_angletrk "Ifx_AngleTrkF32" module is used.
210 *
211 * When user's application calls function IfxDsadc_Rdc_update(), function Ifx_AngleTrkF32_step()
212 * is also called which contains implementation of:
213 * - ATAN2,
214 * - 3rd order angle tracking observer
215 *
216 * The following figure shows the idea:
217 *
218 * TODO: add picture
219 *
220 * ATAN2 function computes the initial angle for the observer. Additional phase is computed
221 * from the timestamp and group delay to compensate 'missing' rotor position (angle).
222 * The combined initial angle and phase are used as reference for the first integrator for
223 * estimating acceleration. The second integrator estimates speed. The final integrator
224 * estimates the output angle.
225 *
226 * The output angle is normally more 'smooth' in steady-state than the angle from ATAN2
227 * function, albeit some settling time and overshoot which occur during transient. The dynamic
228 * performance depends on the gain constants set in the integrators. By default, the constants
229 * are calculated using formula from proceeding's paper
230 * [Design of advanced resolver-to-digital converters](http://www.univ-nantes.fr/servlet/com.univ.collaboratif.utils.LectureFichiergw?CODE_FICHIER=1307605985775&ID_FICHE=1329),
231 * by Auger, et.al, in Electrimacs 2011, CergyPontoise (France), 6-8 june 2011.
232 *
233 * \subsection sec_dsadc_rdc_groupDelay Group delay estimation
234 *
235 * It is shown in previous figure that group delay is required to estimate the actual position
236 * based on the angular speed and measured position.
237 *
238 * The group delay of itself is estimated to be the sum of group delay of components of the
239 * DSADC channel used for acquisition such as CIC filter, FIR0, FIR1, and Integrator blocks.
240 *
241 * The following formulas are used to estimate the group delays:
242 *
243 * <table>
244 * <tr><td>CIC group delay: \f$ \tau_{CIC} = \frac{N.k}{2.F_{mod}} \f$</td></tr>
245 * <tr><td>FIR0 group delay: \f$ \tau_{FIR0} = \frac{7}{2.F_{FIR0_{in}}} \f$</td></tr>
246 * <tr><td>FIR1 group delay: \f$ \tau_{FIR1} = \frac{27}{2.F_{FIR1_{in}}} \f$</td></tr>
247 * <tr><td>Integrator group delay: \f$ \tau_{INT} = \frac{N_{INT}-1}{2.F_{INT_{in}}} \f$</td></tr>
248 * </table>
249 *
250 * The function IfxDsadc_getMainGroupDelay() implements those formulas, invoked by
251 * IfxDsadc_Rdc_update().
252 *
253 * \section sec_dsadc_rdc_fault Fault detection
254 *
255 * When application calls function IfxDsadc_Rdc_update(), fault detection
256 * implemented in \ref library_srvsw_sysse_math_f32_angletrk "Ifx_AngleTrkF32" module is also executed.
257 * The fault-detection is based on simple trigonometry equation:
258 *
259 * \f$ \sin^2(\phi) + \cos^2(\phi) = 1 \f$
260 *
261 * With some tolerance, whenever the amplitude of one of SINE or COSINE signal is outside
262 * the allowed band, then fault flag is set. "SignalLoss" flag is set when the amplitude is
263 * below lower boundary. "SignalDegradation" flag is set when the amplitude is higher than
264 * upper boundary.
265 *
266 * In addition, the flag "TrackingLoss" is set when the internal error value of the angle
267 * tracking observer is above a threshold.
268 *
269 * Functions IfxDsadc_Rdc_getFault() can be used to
270 * check the error flags.
271 *
272 * Configuration of the fault-detection (tolerance) boundary values and threshold are done
273 * by user's call to IfxDsadc_Rdc_init().
274 *
275 * \defgroup IfxLld_Dsadc_Rdc RDC
276 * \ingroup IfxLld_Dsadc
277 * \defgroup IfxLld_Dsadc_Rdc_variable Variables
278 * \ingroup IfxLld_Dsadc_Rdc
279 * \defgroup IfxLld_Dsadc_Rdc_func_config Configuration Functions
280 * \ingroup IfxLld_Dsadc_Rdc
281 * \defgroup IfxLld_Dsadc_Rdc_library_srvsw_sysse_virtualDevice_positionSensor_StdIf_Functions StdIf Functions
282 * \ingroup IfxLld_Dsadc_Rdc
283 * \defgroup IfxLld_Dsadc_Rdc_structures Structures
284 * \ingroup IfxLld_Dsadc_Rdc
285 * \defgroup IfxLld_Dsadc_Rdc_func_utility Utility Functions
286 * \ingroup IfxLld_Dsadc_Rdc
287 */
288
289 #ifndef IFXDSADC_RDC_H
290 #define IFXDSADC_RDC_H 1
291
292 /******************************************************************************/
293 /*----------------------------------Includes----------------------------------*/
294 /******************************************************************************/
295
296 #include "SysSe/Math/Ifx_AngleTrkF32.h"
297 #include "Dsadc/Dsadc/IfxDsadc_Dsadc.h"
298 #include "Gtm/Std/IfxGtm_Tim.h"
299 #include "_PinMap/IfxGtm_PinMap.h"
300 #include "Ifx_Cfg.h"
301
302 /******************************************************************************/
303 /*-----------------------------------Macros-----------------------------------*/
304 /******************************************************************************/
305
306 #ifndef IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION
307 #define IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION (1)
308 #endif
309
310 #ifndef IFXDSADC_RDC_CFG_DEBUG
311 #define IFXDSADC_RDC_CFG_DEBUG (0)
312 #endif
313
314 /******************************************************************************/
315 /*-----------------------------Data Structures--------------------------------*/
316 /******************************************************************************/
317
318 /** \addtogroup IfxLld_Dsadc_Rdc_structures
319 * \{ */
320 /** \brief DSADC timestamp helper using GTM
321 */
322 typedef struct
323 {
324 Ifx_GTM *gtm; /**< \brief Pointer to GTM SFRs */
325 IfxGtm_Tim rdcTim;
326 IfxGtm_Tim_Ch rdcTimChannel; /**< \brief TIM channel triggered by DSADC channel */
327 uint32 rdcTimMuxValue; /**< \brief Mux value used */
328 IfxGtm_Tim_TinMap *pwmTim; /**< \brief TIM channel triggered by PWM trigger */
329 } IfxDsadc_Rdc_GtmTimestamp;
330
331 /** \} */
332
333 /** \addtogroup IfxLld_Dsadc_Rdc_structures
334 * \{ */
335 /** \brief RDC hardware configuration
336 */
337 typedef struct
338 {
339 IfxDsadc_Dsadc_ChannelConfig inputConfig; /**< \brief Default channel configuration for both SIN and COS input. */
340 IfxDsadc_ChannelId inputSin; /**< \brief Channel ID of DSADC used for SIN input. This will override value given in the inputConfig */
341 IfxDsadc_ChannelId inputCos; /**< \brief Channel ID of DSADC used for COS input. This will override value given in the inputConfig */
342 Ifx_Priority servReqPriority; /**< \brief Interrupt priority. NOTE: Only used by inputSin and will override value given in the inputConfig */
343 IfxSrc_Tos servReqProvider; /**< \brief Service provider. NOTE: Only used by inputSin and will override value given in the inputConfig */
344 boolean startScan; /**< \brief Specifies whether the conversion will be started as soon as the IfxDsadc_Rdc_initHw() is called */
345 IfxDsadc_Dsadc_CarrierGenConfig carrierGen; /**< \brief Pointer to the carrier signal generation configuration.
346 * \note If NULL_PTR, it is assumed that the carrier generation has been pre-configured */
347 IfxDsadc_Cout_Out *outputClock; /**< \brief if not NULL_PTR, modulator clock output pin from inputSin channel will be configured */
348 IfxDsadc_Rdc_GtmTimestamp gtmTimestamp; /**< \brief Timestamp helper using GTM */
349 } IfxDsadc_Rdc_ConfigHw;
350
351 /** \brief DSADC RDC hardware object structure
352 */
353 typedef struct
354 {
355 IfxDsadc_Dsadc_Channel inputSin; /**< \brief Handle to SIN input channel */
356 IfxDsadc_Dsadc_Channel inputCos; /**< \brief Handle to COS input channel */
357 Ifx_GTM_TIM_CH *pwmTimCh; /**< \brief TIM channel for PWM timestamp */
358 Ifx_GTM_TIM_CH *rdcTimCh; /**< \brief TIM channel for DSADC timestamp */
359 } IfxDsadc_Rdc_Hw;
360
361 /** \brief
362 */
363 typedef struct
364 {
365 boolean enabled;
366 float32 inSeconds;
367 uint32 rdc; /**< \brief Absolute time of DSADC result */
368 uint32 pwm; /**< \brief Absolute time of user's PWM trigger. Used only if IFXDSADC_RDC_CFG_DEBUG is set */
369 sint32 inTicks; /**< \brief Time-stamp of last result (in ticks). Used only if IFXDSADC_RDC_CFG_DEBUG is set */
370 uint32 maxTicks; /**< \brief Maximum time-stamp value (in ticks of absolute time clock) */
371 float32 clockPeriod; /**< \brief Period of absolute time clock (in second) */
372 } IfxDsadc_Rdc_Ts;
373
374 /** \} */
375
376 /** \addtogroup IfxLld_Dsadc_Rdc_structures
377 * \{ */
378 /** \brief DSADC RDC data structure
379 */
380 typedef struct
381 {
382 Ifx_AngleTrkF32 angleTrk;
383 sint16 sinIn;
384 sint16 cosIn;
385 float32 updatePeriod;
386 float32 groupDelay;
387 IfxDsadc_Rdc_Hw hardware;
388 IfxDsadc_Rdc_Ts timestamp;
389 } IfxDsadc_Rdc;
390
391 /** \brief DSADC RDC configuration structure
392 * Note: if ALL kp, ki, kd are zero, then the init function will use default value.
393 */
394 typedef struct
395 {
396 float32 kp; /**< \brief Observer proportional gain */
397 float32 ki; /**< \brief Observer integral gain */
398 float32 kd; /**< \brief Observer differential gain */
399 float32 speedLpfFc; /**< \brief Cut-off frequency of speed low-pass filter (in Hertz). */
400 float32 errorThreshold; /**< \brief Threshold of error value in the tracking loop (in radian) */
401 float32 userTs; /**< \brief Sampling period of the application */
402 sint32 sqrAmplMax; /**< \brief Maximum value for square of signal amplitudes */
403 sint32 sqrAmplMin; /**< \brief Minimum value for square of signal amplitudes */
404 uint16 periodPerRotation; /**< \brief Number of electrical periods per mechanical rotation */
405 boolean reversed; /**< \brief TRUE: reversed direction, FALSE: straight direction */
406 sint32 resolution; /**< \brief Sensor resolution */
407 IfxStdIf_Pos_RawAngle offset; /**< \brief Offset in ticks. [0 .. (\ref IfxDsadc_Rdc_Config.resolution - 1)] */
408 IfxDsadc_Rdc_ConfigHw hardware; /**< \brief Pointer to hardware config. */
409 IfxDsadc_Dsadc *dsadc; /**< \brief Pointer to the DSADC driver */
410 } IfxDsadc_Rdc_Config;
411
412 /** \} */
413
414 /** \addtogroup IfxLld_Dsadc_Rdc_func_config
415 * \{ */
416
417 /******************************************************************************/
418 /*-------------------------Global Function Prototypes-------------------------*/
419 /******************************************************************************/
420
421 /** \brief Initialise the DSADC RDC driver by initialising:
422 * - Two DSADC hardware channel resources
423 * - Carrier generation hardware resources
424 * - Time-stamp hardware resources
425 * - Driver's run-time data (RAM): tracking observer, fault-detection, interface layer etc.
426 * \param driver Driver's handle, i.e. pointer to \ref IfxDsadc_Rdc RAM location
427 * \param config Config Pointer to the driver's configuration
428 * \return TRUE in case of success else FALSE
429 */
430 IFX_EXTERN boolean IfxDsadc_Rdc_init(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config);
431
432 /** \brief
433 * \param config DSADC RDC configuration structure
434 * \return None
435 */
436 IFX_EXTERN void IfxDsadc_Rdc_initConfig(IfxDsadc_Rdc_Config *config);
437
438 /** \} */
439
440 /** \addtogroup IfxLld_Dsadc_Rdc_library_srvsw_sysse_virtualDevice_positionSensor_StdIf_Functions
441 * \{ */
442
443 /******************************************************************************/
444 /*-------------------------Inline Function Prototypes-------------------------*/
445 /******************************************************************************/
446
447 /** \brief \see IfxStdIf_Pos_GetFault
448 * \param driver Driver handle
449 * \return Fault
450 */
451 IFX_INLINE IfxStdIf_Pos_Status IfxDsadc_Rdc_getFault(IfxDsadc_Rdc *driver);
452
453 /** \brief \see IfxStdIf_Pos_GetPeriodPerRotation
454 * \param driver Driver handle
455 * \return Period per rotation
456 */
457 IFX_INLINE uint16 IfxDsadc_Rdc_getPeriodPerRotation(IfxDsadc_Rdc *driver);
458
459 /** \brief \see IfxStdIf_Pos_GetRawPosition
460 * \param driver Driver handle
461 * \return Position in ticks
462 */
463 IFX_INLINE IfxStdIf_Pos_RawAngle IfxDsadc_Rdc_getRawPosition(IfxDsadc_Rdc *driver);
464
465 /** \brief \see IfxStdIf_Pos_GetSpeed
466 * \param driver Driver handle
467 * \return speed
468 */
469 IFX_INLINE float32 IfxDsadc_Rdc_getSpeed(IfxDsadc_Rdc *driver);
470
471 /******************************************************************************/
472 /*-------------------------Global Function Prototypes-------------------------*/
473 /******************************************************************************/
474
475 /** \brief see IfxStdIf_Pos_GetAbsolutePosition
476 * \param driver Driver handle
477 * \return Absolute position
478 */
479 IFX_EXTERN float32 IfxDsadc_Rdc_getAbsolutePosition(IfxDsadc_Rdc *driver);
480
481 /** \brief \see IfxStdIf_Pos_GetDirection
482 * \param driver Driver handle
483 * \return Direction
484 */
485 IFX_EXTERN IfxStdIf_Pos_Dir IfxDsadc_Rdc_getDirection(IfxDsadc_Rdc *driver);
486
487 /** \brief \see IfxStdIf_Pos_GetOffset
488 * \param driver Driver handle
489 * \return Offset address
490 */
491 IFX_EXTERN sint32 IfxDsadc_Rdc_getOffset(IfxDsadc_Rdc *driver);
492
493 /** \brief \see IfxStdIf_Pos_GetPosition
494 * \param driver Driver handle
495 * \return Position
496 */
497 IFX_EXTERN float32 IfxDsadc_Rdc_getPosition(IfxDsadc_Rdc *driver);
498
499 /** \brief \see IfxStdIf_Pos_GetRefreshPeriod
500 * \param driver driver handle
501 * \return Update period
502 */
503 IFX_EXTERN float32 IfxDsadc_Rdc_getRefreshPeriod(IfxDsadc_Rdc *driver);
504
505 /** \brief \see IfxStdIf_Pos_GetResolution
506 * \param driver Driver handle
507 * \return Resolution
508 */
509 IFX_EXTERN sint32 IfxDsadc_Rdc_getResolution(IfxDsadc_Rdc *driver);
510
511 /** \brief \see IfxStdIf_Pos_GetSensorType
512 * \param driver driver handle
513 * \return Sensor type
514 */
515 IFX_EXTERN IfxStdIf_Pos_SensorType IfxDsadc_Rdc_getSensorType(IfxDsadc_Rdc *driver);
516
517 /** \brief \see IfxStdIf_Pos_GetTurn
518 * \param driver Driver handle
519 * \return Returns the number of turns
520 */
521 IFX_EXTERN sint32 IfxDsadc_Rdc_getTurn(IfxDsadc_Rdc *driver);
522
523 /** \brief \see IfxStdIf_Pos_OnEventA
524 * The API handles the event A which corresponds to the DSADC interrupt event.
525 * \param driver Driver's handle
526 * \return None
527 */
528 IFX_EXTERN void IfxDsadc_Rdc_onEventA(IfxDsadc_Rdc *driver);
529
530 /** \brief \see IfxStdIf_Pos_Reset
531 * \param driver Driver handle
532 * \return None
533 */
534 IFX_EXTERN void IfxDsadc_Rdc_reset(IfxDsadc_Rdc *driver);
535
536 /** \brief \see IfxStdIf_Pos_ResetFaults
537 * \param driver Driver handle
538 * \return None
539 */
540 IFX_EXTERN void IfxDsadc_Rdc_resetFaults(IfxDsadc_Rdc *driver);
541
542 /** \brief \see IfxStdIf_Pos_SetOffset
543 * \param driver Driver handle
544 * \param offset Offset
545 * \return None
546 */
547 IFX_EXTERN void IfxDsadc_Rdc_setOffset(IfxDsadc_Rdc *driver, sint32 offset);
548
549 /** \brief \see IfxStdIf_Pos_SetRefreshPeriod
550 * \param driver Driver handle
551 * \param updatePeriod Update period
552 * \return None
553 */
554 IFX_EXTERN void IfxDsadc_Rdc_setRefreshPeriod(IfxDsadc_Rdc *driver, float32 updatePeriod);
555
556 /** \brief Initializes the standard interface "Pos"
557 * \param stdif Standard interface position object
558 * \param driver Virtual position sensor
559 * \return TRUE on success else FALSE
560 */
561 IFX_EXTERN boolean IfxDsadc_Rdc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxDsadc_Rdc *driver);
562
563 /** \brief \see IfxStdIf_Pos_Update
564 * This function is to be executed at user's application interrupt or task, e.g. motor control
565 * \param driver Driver's handle
566 * \return None
567 */
568 IFX_EXTERN void IfxDsadc_Rdc_update(IfxDsadc_Rdc *driver);
569
570 /** \} */
571
572 /** \addtogroup IfxLld_Dsadc_Rdc_func_utility
573 * \{ */
574
575 /******************************************************************************/
576 /*-------------------------Inline Function Prototypes-------------------------*/
577 /******************************************************************************/
578
579 /** \brief Return timestamp in seconds
580 * \param driver Driver handle
581 * \return timestamp in seconds.
582 */
583 IFX_INLINE float32 IfxDsadc_Rdc_getTimestamp(IfxDsadc_Rdc *driver);
584
585 /******************************************************************************/
586 /*-------------------------Global Function Prototypes-------------------------*/
587 /******************************************************************************/
588
589 /** \brief Synchronously start of both DSADC H/W channels
590 * \param driver Driver's handle, i.e. pointer to \ref IfxDsadc_Rdc RAM location
591 * \return None
592 */
593 IFX_EXTERN void IfxDsadc_Rdc_startConversion(IfxDsadc_Rdc *driver);
594
595 /** \} */
596
597 /******************************************************************************/
598 /*---------------------Inline Function Implementations------------------------*/
599 /******************************************************************************/
600
601 IFX_INLINE IfxStdIf_Pos_Status IfxDsadc_Rdc_getFault(IfxDsadc_Rdc *driver)
602 {
603 return Ifx_AngleTrkF32_getFault(&driver->angleTrk);
604 }
605
606
607 IFX_INLINE uint16 IfxDsadc_Rdc_getPeriodPerRotation(IfxDsadc_Rdc *driver)
608 {
609 return Ifx_AngleTrkF32_getPeriodPerRotation(&driver->angleTrk);
610 }
611
612
613 IFX_INLINE IfxStdIf_Pos_RawAngle IfxDsadc_Rdc_getRawPosition(IfxDsadc_Rdc *driver)
614 {
615 return Ifx_AngleTrkF32_getRawPosition(&driver->angleTrk);
616 }
617
618
619 IFX_INLINE float32 IfxDsadc_Rdc_getSpeed(IfxDsadc_Rdc *driver)
620 {
621 return Ifx_AngleTrkF32_getSpeed(&driver->angleTrk);
622 }
623
624
625 IFX_INLINE float32 IfxDsadc_Rdc_getTimestamp(IfxDsadc_Rdc *driver)
626 {
627 return driver->timestamp.inSeconds;
628 }
629
630
631 #endif /* IFXDSADC_RDC_H */
IfxDsadc_Rdc_Config::periodPerRotation
uint16 periodPerRotation
Number of electrical periods per mechanical rotation.
Definition: IfxDsadc_Rdc.h:404
IfxDsadc_Rdc_Hw::rdcTimCh
Ifx_GTM_TIM_CH * rdcTimCh
TIM channel for DSADC timestamp.
Definition: IfxDsadc_Rdc.h:358
Ifx_AngleTrkF32_getRawPosition
IfxStdIf_Pos_RawAngle Ifx_AngleTrkF32_getRawPosition(Ifx_AngleTrkF32 *aObsv)
Returns the actual position.
Definition: Ifx_AngleTrkF32.c:314
IfxDsadc_Rdc_ConfigHw::servReqPriority
Ifx_Priority servReqPriority
Interrupt priority. NOTE: Only used by inputSin and will override value given in the inputConfig...
Definition: IfxDsadc_Rdc.h:342
IfxDsadc_ChannelId
IfxDsadc_ChannelId
Specifies the channel Index.
Definition: IfxDsadc.h:137
IfxDsadc_Rdc_Config::userTs
float32 userTs
Sampling period of the application.
Definition: IfxDsadc_Rdc.h:401
IfxDsadc_Rdc_ConfigHw::inputSin
IfxDsadc_ChannelId inputSin
Channel ID of DSADC used for SIN input. This will override value given in the inputConfig.
Definition: IfxDsadc_Rdc.h:340
IfxDsadc_Rdc_Config::offset
IfxStdIf_Pos_RawAngle offset
Offset in ticks. [0 .. (IfxDsadc_Rdc_Config::resolution - 1)].
Definition: IfxDsadc_Rdc.h:407
IfxDsadc_Rdc_ConfigHw::startScan
boolean startScan
Specifies whether the conversion will be started as soon as the IfxDsadc_Rdc_initHw() is called...
Definition: IfxDsadc_Rdc.h:344
IfxDsadc_Rdc_ConfigHw
RDC hardware configuration.
Definition: IfxDsadc_Rdc.h:337
IfxDsadc_Rdc_GtmTimestamp::rdcTim
IfxGtm_Tim rdcTim
Definition: IfxDsadc_Rdc.h:325
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxDsadc_Rdc_resetFaults
IFX_EXTERN void IfxDsadc_Rdc_resetFaults(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:449
IfxDsadc_Rdc_GtmTimestamp::gtm
Ifx_GTM * gtm
Pointer to GTM SFRs.
Definition: IfxDsadc_Rdc.h:324
IfxDsadc_Rdc_getRawPosition
IFX_INLINE IfxStdIf_Pos_RawAngle IfxDsadc_Rdc_getRawPosition(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.h:613
IfxDsadc_Dsadc.h
DSADC DSADC details.
IfxDsadc_Rdc_Config::kp
float32 kp
Observer proportional gain.
Definition: IfxDsadc_Rdc.h:396
IfxDsadc_Rdc_ConfigHw::inputConfig
IfxDsadc_Dsadc_ChannelConfig inputConfig
Default channel configuration for both SIN and COS input.
Definition: IfxDsadc_Rdc.h:339
IfxDsadc_Rdc::cosIn
sint16 cosIn
Definition: IfxDsadc_Rdc.h:384
IfxDsadc_Rdc_getDirection
IFX_EXTERN IfxStdIf_Pos_Dir IfxDsadc_Rdc_getDirection(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:179
IfxDsadc_Rdc_ConfigHw::gtmTimestamp
IfxDsadc_Rdc_GtmTimestamp gtmTimestamp
Timestamp helper using GTM.
Definition: IfxDsadc_Rdc.h:348
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:252
IfxDsadc_Dsadc
DSADC handle data structure.
Definition: IfxDsadc_Dsadc.h:293
IfxStdIf_Pos_RawAngle
sint32 IfxStdIf_Pos_RawAngle
Definition: IfxStdIf_Pos.h:113
IfxDsadc_Cout_Out
COUT pin mapping structure.
Definition: IfxDsadc_PinMap.h:117
IfxDsadc_Rdc_Hw::inputCos
IfxDsadc_Dsadc_Channel inputCos
Handle to COS input channel.
Definition: IfxDsadc_Rdc.h:356
IfxDsadc_Rdc_Config
DSADC RDC configuration structure Note: if ALL kp, ki, kd are zero, then the init function will use d...
Definition: IfxDsadc_Rdc.h:394
IfxDsadc_Rdc_GtmTimestamp::rdcTimMuxValue
uint32 rdcTimMuxValue
Mux value used.
Definition: IfxDsadc_Rdc.h:327
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxDsadc_Rdc_getSensorType
IFX_EXTERN IfxStdIf_Pos_SensorType IfxDsadc_Rdc_getSensorType(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:209
IfxDsadc_Rdc_Ts::inSeconds
float32 inSeconds
Definition: IfxDsadc_Rdc.h:366
Ifx_AngleTrkF32_getFault
IfxStdIf_Pos_Status Ifx_AngleTrkF32_getFault(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:347
IfxDsadc_Rdc_getPosition
IFX_EXTERN float32 IfxDsadc_Rdc_getPosition(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:191
Ifx_AngleTrkF32.h
Angle-tracking observer for sin/cos analog position sensor.
IfxDsadc_Rdc_stdIfPosInit
IFX_EXTERN boolean IfxDsadc_Rdc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxDsadc_Rdc *driver)
Initializes the standard interface "Pos".
Definition: IfxDsadc_Rdc.c:477
sint16
short sint16
Definition: Platform_Types.h:129
IfxDsadc_Rdc_Config::ki
float32 ki
Observer integral gain.
Definition: IfxDsadc_Rdc.h:397
IfxDsadc_Dsadc_Channel
Channel handle structure.
Definition: IfxDsadc_Dsadc.h:314
IfxGtm_Tim.h
GTM basic functionality.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxDsadc_Rdc_Ts::rdc
uint32 rdc
Absolute time of DSADC result.
Definition: IfxDsadc_Rdc.h:367
IfxDsadc_Rdc_Config::hardware
IfxDsadc_Rdc_ConfigHw hardware
Pointer to hardware config.
Definition: IfxDsadc_Rdc.h:408
IfxGtm_Tim_TinMap
TIN pin mapping structure.
Definition: IfxGtm_PinMap.h:93
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxDsadc_Rdc_initConfig
IFX_EXTERN void IfxDsadc_Rdc_initConfig(IfxDsadc_Rdc_Config *config)
Definition: IfxDsadc_Rdc.c:277
IfxDsadc_Rdc_getTurn
IFX_EXTERN sint32 IfxDsadc_Rdc_getTurn(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:215
IfxDsadc_Rdc_Config::sqrAmplMax
sint32 sqrAmplMax
Maximum value for square of signal amplitudes.
Definition: IfxDsadc_Rdc.h:402
IfxDsadc_Rdc_setOffset
IFX_EXTERN void IfxDsadc_Rdc_setOffset(IfxDsadc_Rdc *driver, sint32 offset)
Definition: IfxDsadc_Rdc.c:455
IfxDsadc_Rdc_getRefreshPeriod
IFX_EXTERN float32 IfxDsadc_Rdc_getRefreshPeriod(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:197
IfxDsadc_Rdc::angleTrk
Ifx_AngleTrkF32 angleTrk
Definition: IfxDsadc_Rdc.h:382
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:92
IfxDsadc_Rdc
DSADC RDC data structure.
Definition: IfxDsadc_Rdc.h:380
IfxDsadc_Rdc_update
IFX_EXTERN void IfxDsadc_Rdc_update(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:515
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:283
IfxDsadc_Rdc_getFault
IFX_INLINE IfxStdIf_Pos_Status IfxDsadc_Rdc_getFault(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.h:601
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:81
IfxDsadc_Rdc_Config::resolution
sint32 resolution
Sensor resolution.
Definition: IfxDsadc_Rdc.h:406
IfxDsadc_Rdc_ConfigHw::outputClock
IfxDsadc_Cout_Out * outputClock
if not NULL_PTR, modulator clock output pin from inputSin channel will be configured ...
Definition: IfxDsadc_Rdc.h:347
IfxDsadc_Rdc_Config::kd
float32 kd
Observer differential gain.
Definition: IfxDsadc_Rdc.h:398
IfxDsadc_Rdc_onEventA
IFX_EXTERN void IfxDsadc_Rdc_onEventA(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:420
IfxDsadc_Rdc::updatePeriod
float32 updatePeriod
Definition: IfxDsadc_Rdc.h:385
IfxDsadc_Rdc_setRefreshPeriod
IFX_EXTERN void IfxDsadc_Rdc_setRefreshPeriod(IfxDsadc_Rdc *driver, float32 updatePeriod)
Definition: IfxDsadc_Rdc.c:461
Ifx_AngleTrkF32_getSpeed
float32 Ifx_AngleTrkF32_getSpeed(Ifx_AngleTrkF32 *aObsv)
Returns the Speed.
Definition: Ifx_AngleTrkF32.c:324
IfxDsadc_Rdc_Ts
Definition: IfxDsadc_Rdc.h:363
Ifx_AngleTrkF32
Angle Tracking Observer object.
Definition: Ifx_AngleTrkF32.h:116
IfxDsadc_Rdc_Hw
DSADC RDC hardware object structure.
Definition: IfxDsadc_Rdc.h:353
IfxDsadc_Rdc_Config::speedLpfFc
float32 speedLpfFc
Cut-off frequency of speed low-pass filter (in Hertz).
Definition: IfxDsadc_Rdc.h:399
IfxDsadc_Rdc_ConfigHw::inputCos
IfxDsadc_ChannelId inputCos
Channel ID of DSADC used for COS input. This will override value given in the inputConfig.
Definition: IfxDsadc_Rdc.h:341
uint16
unsigned short uint16
Definition: Platform_Types.h:112
Ifx_AngleTrkF32_getPeriodPerRotation
uint16 Ifx_AngleTrkF32_getPeriodPerRotation(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:359
IfxDsadc_Rdc_getResolution
IFX_EXTERN sint32 IfxDsadc_Rdc_getResolution(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:203
IfxDsadc_Dsadc_ChannelConfig
Single channel configuration structure.
Definition: IfxDsadc_Dsadc.h:323
IfxDsadc_Rdc_getOffset
IFX_EXTERN sint32 IfxDsadc_Rdc_getOffset(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:185
IfxDsadc_Rdc_getPeriodPerRotation
IFX_INLINE uint16 IfxDsadc_Rdc_getPeriodPerRotation(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.h:607
IfxDsadc_Rdc_GtmTimestamp::rdcTimChannel
IfxGtm_Tim_Ch rdcTimChannel
TIM channel triggered by DSADC channel.
Definition: IfxDsadc_Rdc.h:326
IfxDsadc_Rdc_ConfigHw::servReqProvider
IfxSrc_Tos servReqProvider
Service provider. NOTE: Only used by inputSin and will override value given in the inputConfig...
Definition: IfxDsadc_Rdc.h:343
sint32
long sint32
Definition: Platform_Types.h:134
IfxDsadc_Rdc_Hw::inputSin
IfxDsadc_Dsadc_Channel inputSin
Handle to SIN input channel.
Definition: IfxDsadc_Rdc.h:355
IfxDsadc_Rdc_GtmTimestamp::pwmTim
IfxGtm_Tim_TinMap * pwmTim
TIM channel triggered by PWM trigger.
Definition: IfxDsadc_Rdc.h:328
IfxDsadc_Rdc_Config::reversed
boolean reversed
TRUE: reversed direction, FALSE: straight direction.
Definition: IfxDsadc_Rdc.h:405
IfxDsadc_Rdc_Config::sqrAmplMin
sint32 sqrAmplMin
Minimum value for square of signal amplitudes.
Definition: IfxDsadc_Rdc.h:403
IfxDsadc_Rdc_Ts::inTicks
sint32 inTicks
Time-stamp of last result (in ticks). Used only if IFXDSADC_RDC_CFG_DEBUG is set. ...
Definition: IfxDsadc_Rdc.h:369
IfxDsadc_Rdc_Ts::pwm
uint32 pwm
Absolute time of user&#39;s PWM trigger. Used only if IFXDSADC_RDC_CFG_DEBUG is set.
Definition: IfxDsadc_Rdc.h:368
IfxDsadc_Rdc_getTimestamp
IFX_INLINE float32 IfxDsadc_Rdc_getTimestamp(IfxDsadc_Rdc *driver)
Return timestamp in seconds.
Definition: IfxDsadc_Rdc.h:625
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:261
IfxDsadc_Rdc_Config::errorThreshold
float32 errorThreshold
Threshold of error value in the tracking loop (in radian)
Definition: IfxDsadc_Rdc.h:400
IfxDsadc_Rdc::sinIn
sint16 sinIn
Definition: IfxDsadc_Rdc.h:383
IfxDsadc_Rdc::groupDelay
float32 groupDelay
Definition: IfxDsadc_Rdc.h:386
IfxDsadc_Rdc_reset
IFX_EXTERN void IfxDsadc_Rdc_reset(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:443
IfxDsadc_Rdc_Hw::pwmTimCh
Ifx_GTM_TIM_CH * pwmTimCh
TIM channel for PWM timestamp.
Definition: IfxDsadc_Rdc.h:357
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:100
IfxDsadc_Rdc_getSpeed
IFX_INLINE float32 IfxDsadc_Rdc_getSpeed(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.h:619
IfxDsadc_Rdc_Config::dsadc
IfxDsadc_Dsadc * dsadc
Pointer to the DSADC driver.
Definition: IfxDsadc_Rdc.h:409
IfxDsadc_Rdc::hardware
IfxDsadc_Rdc_Hw hardware
Definition: IfxDsadc_Rdc.h:387
IfxDsadc_Rdc_startConversion
IFX_EXTERN void IfxDsadc_Rdc_startConversion(IfxDsadc_Rdc *driver)
Synchronously start of both DSADC H/W channels.
Definition: IfxDsadc_Rdc.c:467
IfxDsadc_Rdc_init
IFX_EXTERN boolean IfxDsadc_Rdc_init(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the DSADC RDC driver by initialising:
Definition: IfxDsadc_Rdc.c:228
IfxDsadc_Rdc_Ts::clockPeriod
float32 clockPeriod
Period of absolute time clock (in second)
Definition: IfxDsadc_Rdc.h:371
IfxDsadc_Rdc_Ts::enabled
boolean enabled
Definition: IfxDsadc_Rdc.h:365
IfxDsadc_Rdc::timestamp
IfxDsadc_Rdc_Ts timestamp
Definition: IfxDsadc_Rdc.h:388
IfxDsadc_Dsadc_CarrierGenConfig
Carrier generation configuration structure.
Definition: IfxDsadc_Dsadc.h:300
IfxDsadc_Rdc_GtmTimestamp
DSADC timestamp helper using GTM.
Definition: IfxDsadc_Rdc.h:322
IfxDsadc_Rdc_ConfigHw::carrierGen
IfxDsadc_Dsadc_CarrierGenConfig carrierGen
Pointer to the carrier signal generation configuration.
Definition: IfxDsadc_Rdc.h:345
IfxDsadc_Rdc_getAbsolutePosition
IFX_EXTERN float32 IfxDsadc_Rdc_getAbsolutePosition(IfxDsadc_Rdc *driver)
see IfxStdIf_Pos_GetAbsolutePosition
Definition: IfxDsadc_Rdc.c:173
IfxDsadc_Rdc_Ts::maxTicks
uint32 maxTicks
Maximum time-stamp value (in ticks of absolute time clock)
Definition: IfxDsadc_Rdc.h:370


iLLD_TC26B: IfxDsadc_cfg.h Source File

  • _Impl
IfxDsadc_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc_cfg.h
3 * \brief DSADC on-chip implementation data
4 * \ingroup IfxLld_Dsadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Dsadc DSADC
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Dsadc_Impl Implementation
44 * \ingroup IfxLld_Dsadc
45 * \defgroup IfxLld_Dsadc_Std Standard Driver
46 * \ingroup IfxLld_Dsadc
47 */
48
49 #ifndef IFXDSADC_CFG_H
50 #define IFXDSADC_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56
57 /******************************************************************************/
58 /*-----------------------------------Macros-----------------------------------*/
59 /******************************************************************************/
60
61 /** \brief Number of channels
62 */
63 #define IFXDSADC_NUM_CHANNELS 4
64
65 #define IFXDSADC_NUM_MODULES (1)
66
67
68 #endif /* IFXDSADC_CFG_H */


iLLD_TC26B: IfxDts.c Source File

  • Dts
  • Std
IfxDts.c
Go to the documentation of this file.
1 /**
2 * \file IfxDts.c
3 * \brief DTS basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxDts.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 boolean IfxDts_isReady(void)
53 {
54 return MODULE_SCU.DTSSTAT.B.RDY == 1 ? TRUE : FALSE;
55 }
IfxDts_isReady
boolean IfxDts_isReady(void)
Returns the current READY status of the Sensor.
Definition: IfxDts.c:52
FALSE
#define FALSE
Definition: Platform_Types.h:93
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxDts.h
DTS basic functionality.


iLLD_TC26B: IfxDts.h Source File

  • Dts
  • Std
IfxDts.h
Go to the documentation of this file.
1 /**
2 * \file IfxDts.h
3 * \brief DTS basic functionality
4 * \ingroup IfxLld_Dts
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Dts_Std_Control Control functions
42 * \ingroup IfxLld_Dts_Std
43 * \defgroup IfxLld_Dts_Std_Status Status functions
44 * \ingroup IfxLld_Dts_Std
45 */
46
47 #ifndef IFXDTS_H
48 #define IFXDTS_H 1
49
50 /******************************************************************************/
51 /*----------------------------------Includes----------------------------------*/
52 /******************************************************************************/
53
54 #include "_Impl/IfxDts_cfg.h"
55 #include "IfxScu_reg.h"
56 #include "IfxScu_bf.h"
57 #include "Cpu/Std/IfxCpu_Intrinsics.h"
58 #include "Src/Std/IfxSrc.h"
59 /** \addtogroup IfxLld_Dts_Std_Control
60 * \{ */
61
62 /******************************************************************************/
63 /*-------------------------Inline Function Prototypes-------------------------*/
64 /******************************************************************************/
65
66 /** \brief Disable the writing of register bits except START bit.
67 * \return None
68 */
69 IFX_INLINE void IfxDts_disableSensorControl(void);
70
71 /** \brief Enables the DTS sensor
72 * \return None
73 */
74 IFX_INLINE void IfxDts_enableSensor(void);
75
76 /** \brief Starts the next temperature measurement.
77 * \return None
78 */
79 IFX_INLINE void IfxDts_startSensor(void);
80
81 /** \} */
82
83 /** \addtogroup IfxLld_Dts_Std_Status
84 * \{ */
85
86 /******************************************************************************/
87 /*-------------------------Inline Function Prototypes-------------------------*/
88 /******************************************************************************/
89
90 /** \brief Gets the Interrupt request source.
91 * \return Address of interrupt request source
92 */
93 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDts_getSrcPointer(void);
94
95 /** \brief Read the temperature measurement result
96 * \return Temperature measurement result
97 */
98 IFX_INLINE uint16 IfxDts_getTemperatureValue(void);
99
100 /** \brief Returns the current BUSY status of the Sensor
101 * \return TRUE if Sensor is busy in measuring temperature otherwise FALSE
102 */
103 IFX_INLINE boolean IfxDts_isBusy(void);
104
105 /** \} */
106
107 /******************************************************************************/
108 /*-------------------------Global Function Prototypes-------------------------*/
109 /******************************************************************************/
110
111 /** \brief Returns the current READY status of the Sensor.
112 * \return TRUE if Sensor is ready for measuring temperature otherwise FALSE
113 */
114 IFX_EXTERN boolean IfxDts_isReady(void);
115
116 /******************************************************************************/
117 /*---------------------Inline Function Implementations------------------------*/
118 /******************************************************************************/
119
120 IFX_INLINE void IfxDts_disableSensorControl(void)
121 {
122 MODULE_SCU.DTSCON.B.SLCK = 1;
123 MODULE_SCU.DTSLIM.B.SLCK = 1;
124 }
125
126
127 IFX_INLINE void IfxDts_enableSensor(void)
128 {
129 MODULE_SCU.DTSCON.B.PWD = 0;
130 }
131
132
133 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDts_getSrcPointer(void)
134 {
135 return &SRC_SCUDTS;
136 }
137
138
139 IFX_INLINE uint16 IfxDts_getTemperatureValue(void)
140 {
141 return (uint16)MODULE_SCU.DTSSTAT.B.RESULT;
142 }
143
144
145 IFX_INLINE boolean IfxDts_isBusy(void)
146 {
147 return MODULE_SCU.DTSSTAT.B.BUSY == 1 ? TRUE : FALSE;
148 }
149
150
151 IFX_INLINE void IfxDts_startSensor(void)
152 {
153 MODULE_SCU.DTSCON.B.START = 1;
154 }
155
156
157 #endif /* IFXDTS_H */
IfxDts_isBusy
IFX_INLINE boolean IfxDts_isBusy(void)
Returns the current BUSY status of the Sensor.
Definition: IfxDts.h:145
IfxDts_getTemperatureValue
IFX_INLINE uint16 IfxDts_getTemperatureValue(void)
Read the temperature measurement result.
Definition: IfxDts.h:139
IfxDts_startSensor
IFX_INLINE void IfxDts_startSensor(void)
Starts the next temperature measurement.
Definition: IfxDts.h:151
IfxDts_disableSensorControl
IFX_INLINE void IfxDts_disableSensorControl(void)
Disable the writing of register bits except START bit.
Definition: IfxDts.h:120
IfxSrc.h
SRC basic functionality.
IfxCpu_Intrinsics.h
IfxDts_enableSensor
IFX_INLINE void IfxDts_enableSensor(void)
Enables the DTS sensor.
Definition: IfxDts.h:127
FALSE
#define FALSE
Definition: Platform_Types.h:93
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxDts_cfg.h
DTS on-chip implementation data.
IfxDts_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDts_getSrcPointer(void)
Gets the Interrupt request source.
Definition: IfxDts.h:133
IfxDts_isReady
IFX_EXTERN boolean IfxDts_isReady(void)
Returns the current READY status of the Sensor.
Definition: IfxDts.c:52
uint16
unsigned short uint16
Definition: Platform_Types.h:112
TRUE
#define TRUE
Definition: Platform_Types.h:90


iLLD_TC26B: IfxDts_Dts.c Source File

  • Dts
  • Dts
IfxDts_Dts.c
Go to the documentation of this file.
1 /**
2 * \file IfxDts_Dts.c
3 * \brief DTS DTS details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxDts_Dts.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 uint16 IfxDts_Dts_convertFromCelsius(float32 temperatureValue)
53 {
54 sint32 dtsValue = (sint32)(temperatureValue + 285.5) / 0.467;
55
56 if (dtsValue < 0)
57 {
58 dtsValue = 0;
59 }
60 else if (dtsValue > 1023)
61 {
62 dtsValue = 1023;
63 }
64
65 return (uint16)dtsValue;
66 }
67
68
69 float32 IfxDts_Dts_convertToCelsius(uint16 dtsValue)
70 {
71 return ((float32)dtsValue * 0.467) - 285.5;
72 }
73
74
75 void IfxDts_Dts_initModule(const IfxDts_Dts_Config *config)
76 {
77 IfxDts_enableSensor();
78
79 /* wait for two measurements before enabling the limits */
80 {
81 int i;
82
83 /* disable limits */
84 MODULE_SCU.DTSLIM.B.LOWER = 0;
85 MODULE_SCU.DTSLIM.B.UPPER = 1023;
86
87 /* wait until DTS is ready */
88 while (!IfxDts_isReady())
89 {}
90
91 /* two dummy measurements */
92 for (i = 0; i < 2; ++i)
93 {
94 IfxDts_Dts_startSensor();
95
96 while (IfxDts_Dts_isBusy())
97 {}
98 }
99 }
100
101 /* change to the requested limits */
102 MODULE_SCU.DTSLIM.B.LOWER = IfxDts_Dts_convertFromCelsius(config->lowerTemperatureLimit);
103 MODULE_SCU.DTSLIM.B.UPPER = IfxDts_Dts_convertFromCelsius(config->upperTemperatureLimit);
104
105 /* lock configuration? */
106 if (config->enableSecureLock == TRUE)
107 {
108 IfxDts_disableSensorControl();
109 }
110 else
111 {
112 /* do Nothing */
113 }
114
115 /* enable DTS IRQ */
116 if (config->isrPriority > 0)
117 {
118 volatile Ifx_SRC_SRCR *src = IfxDts_getSrcPointer();
119 IfxSrc_init(src, config->isrTypeOfService, config->isrPriority);
120 IfxSrc_enable(src);
121 }
122 }
123
124
125 void IfxDts_Dts_initModuleConfig(IfxDts_Dts_Config *config)
126 {
127 config->sensorControlDisabled = FALSE;
128 config->lowerTemperatureLimit = -40.0; // Celsius
129 config->upperTemperatureLimit = 170.0; // Celsius
130
131 config->isrTypeOfService = IfxSrc_Tos_cpu0;
132 config->isrPriority = 0;
133
134 config->enableSecureLock = FALSE;
135 }
IfxDts_isReady
boolean IfxDts_isReady(void)
Returns the current READY status of the Sensor.
Definition: IfxDts.c:52
IfxDts_Dts_Config::upperTemperatureLimit
float32 upperTemperatureLimit
Specifies the upper temperature limit compared against die temperature in Celsius.
Definition: IfxDts_Dts.h:187
IfxDts_disableSensorControl
IFX_INLINE void IfxDts_disableSensorControl(void)
Disable the writing of register bits except START bit.
Definition: IfxDts.h:120
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
IfxDts_enableSensor
IFX_INLINE void IfxDts_enableSensor(void)
Enables the DTS sensor.
Definition: IfxDts.h:127
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxDts_Dts_convertToCelsius
float32 IfxDts_Dts_convertToCelsius(uint16 dtsValue)
Converts the measurement value returned from DTS to Celsius.
Definition: IfxDts_Dts.c:69
IfxDts_Dts_Config::isrPriority
uint16 isrPriority
interrupt priority
Definition: IfxDts_Dts.h:190
IfxDts_Dts_Config::lowerTemperatureLimit
float32 lowerTemperatureLimit
Specifies the lower temperature limit compared against die temperature in Celsius.
Definition: IfxDts_Dts.h:184
IfxDts_Dts_Config::isrTypeOfService
IfxSrc_Tos isrTypeOfService
type of interrupt service
Definition: IfxDts_Dts.h:191
IfxDts_Dts_isBusy
IFX_INLINE boolean IfxDts_Dts_isBusy(void)
Returns the current BUSY status of the Sensor.
Definition: IfxDts_Dts.h:302
IfxDts_Dts_Config::sensorControlDisabled
boolean sensorControlDisabled
MODULE_SCU.DTSCON.SCLK, specifies the control register lock except MODULE_SCU.DTSCON.START.
Definition: IfxDts_Dts.h:183
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxDts_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDts_getSrcPointer(void)
Gets the Interrupt request source.
Definition: IfxDts.h:133
uint16
unsigned short uint16
Definition: Platform_Types.h:112
sint32
long sint32
Definition: Platform_Types.h:134
IfxDts_Dts.h
DTS DTS details.
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxDts_Dts_startSensor
IFX_INLINE void IfxDts_Dts_startSensor(void)
Starts the next temperature measurement.
Definition: IfxDts_Dts.h:308
IfxDts_Dts_convertFromCelsius
uint16 IfxDts_Dts_convertFromCelsius(float32 temperatureValue)
Converts a temperature value in Celsius to DTS value.
Definition: IfxDts_Dts.c:52
IfxDts_Dts_Config
DTS module configuration structure.
Definition: IfxDts_Dts.h:181
IfxDts_Dts_Config::enableSecureLock
boolean enableSecureLock
MODULE_SCU.DTSCON.SLCK,MODULE_SCU.DTSLIM.SLCK, Specifies the Security Lock for Configuration and Limi...
Definition: IfxDts_Dts.h:192
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxDts_Dts_initModuleConfig
void IfxDts_Dts_initModuleConfig(IfxDts_Dts_Config *config)
Intialises the module configuration buffer with default configuration.
Definition: IfxDts_Dts.c:125
IfxDts_Dts_initModule
void IfxDts_Dts_initModule(const IfxDts_Dts_Config *config)
Initialise the DTS with supplied configuration.
Definition: IfxDts_Dts.c:75


iLLD_TC26B: IfxDts_Dts.h Source File

  • Dts
  • Dts
IfxDts_Dts.h
Go to the documentation of this file.
1 /**
2 * \file IfxDts_Dts.h
3 * \brief DTS DTS details
4 * \ingroup IfxLld_Dts
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Dts_Dts_Usage How to use the DTS Interface driver?
42 * \ingroup IfxLld_Dts
43 *
44 * DTS gives the die-temperature result which will decoded to standard temperature value. Minimum first two temperature results are to be ignored to get reliable temperature.
45 *
46 * In the following sections it will be described, how to integrate the driver into the application framework.
47 *
48 * \section IfxLld_Dts_Dts_Preparation Preparation
49 * \subsection IfxLld_Dts_Dts_Include Include Files
50 *
51 * Include following header file into your C code:
52 *
53 * \code
54 * #include <Dts/Dts/IfxDts_Dts.h>
55 * \endcode
56 *
57 * \subsection IfxLld_Dts_Dts_Interrupt Interrupt Handler Installation
58 *
59 * See also \ref IfxLld_Cpu_Irq_Usage
60 *
61 * Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
62 * \code
63 * // priorities are normally defined in Ifx_IntPrioDef.h
64 * #define IFX_INTPRIO_DTS 1
65 * \endcode
66 *
67 * Add the interrupt service routine to your C code which should do the error flag handling:
68 * \code
69 * IFX_INTERRUPT(dtsISR, 0, IFX_INTPRIO_DTS)
70 * {
71 * // DTS finished temperature measurement
72 *
73 * uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
74 * // here we could do something with the value...
75 * // and the DTS can be restarted
76 * IfxDts_Dts_startSensor();
77 * }
78 * \endcode
79 *
80 * Finally install the interrupt handler in your initialisation function:
81 * \code
82 * // install interrupt handler
83 * IfxCpu_Irq_installInterruptHandler(&dtsISR, IFX_INTPRIO_DTS);
84 * IfxCpu_enableInterrupts();
85 * \endcode
86 *
87 * \subsection IfxLld_Dts_Dts_Module DTS Module Initialisation
88 *
89 * The module initialisation can be done in the same function:
90 * \code
91 * // Get the default configuration
92 * IfxDts_Dts_Config dtsConfig;
93 * IfxDts_Dts_initModuleConfig(&dtsConfig);
94 *
95 * // Adapt the default configuration if required
96 * dtsConfig.isrPriority = IFX_INTPRIO_DTS;
97 * dtsConfig.isrTypeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
98 * dtsConfig.lowerTemperatureLimit = -35; // SMU alarm if temperature value is below this Celsius value
99 * dtsConfig.upperTemperatureLimit = 150; // SMU alarm if temperature value is above this Celsius value
100 *
101 * // Module initialisation
102 * IfxDts_Dts_initModule(&dtsConfig);
103 * \endcode
104 * Now, DTS is initialised for starting temperature measurements:
105 * \code
106 * IfxDts_Dts_startSensor();
107 * \endcode
108 *
109 * \subsection IfxLld_Dts_Dts_IrqBased IRQ based measurements
110 *
111 * Whenever the interrupt handler is called, a new measurment result is available and could be processed further (e.g. for statistical analysis).
112 *
113 * \code
114 * IFX_INTERRUPT(dtsISR, 0, IFX_INTPRIO_DTS)
115 * {
116 * // DTS finished temperature measurement
117 *
118 * uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
119 * // here we could do something with the value...
120 * // and the DTS can be restarted
121 * IfxDts_Dts_startSensor();
122 * }
123 * \endcode
124 *
125 *
126 * \subsection IfxLld_Dts_Dts_NonIrqBased Measurements without IRQs
127 *
128 * If no interrupt routine should be used, a new measurement result can be requested the following way:
129 *
130 * \code
131 * // start Sensor
132 * IfxDts_Dts_startSensor();
133 *
134 * // wait until a new result is available
135 * while( IfxDts_Dts_isBusy() );
136 * uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
137 * \endcode
138 *
139 *
140 * Alternatively (and this is the normal usage), the DTS could be periodically started from a timer routine, e.g. each mS. The conversion itself takes 100 uS maximum.
141 *
142 *
143 * \subsection IfxLld_Dts_Dts_Converted Temperature conversion
144 *
145 * Following function returns the actual temperature in Celsius:
146 *
147 * \code
148 * float32 temperature = IfxDts_Dts_getTemperatureCelsius();
149 * \endcode
150 *
151 * \defgroup IfxLld_Dts_Dts DTS
152 * \ingroup IfxLld_Dts
153 * \defgroup IfxLld_Dts_Dts_Structures Data Structures
154 * \ingroup IfxLld_Dts_Dts
155 * \defgroup IfxLld_Dts_Dts_Module Module Initialisation functions
156 * \ingroup IfxLld_Dts_Dts
157 * \defgroup IfxLld_Dts_Dts_Sensor Sensor Functions
158 * \ingroup IfxLld_Dts_Dts
159 * \defgroup IfxLld_Dts_Dts_Conversion Conversion Functions
160 * \ingroup IfxLld_Dts_Dts
161 */
162
163 #ifndef IFXDTS_DTS_H
164 #define IFXDTS_DTS_H 1
165
166 /******************************************************************************/
167 /*----------------------------------Includes----------------------------------*/
168 /******************************************************************************/
169
170 #include "Dts/Std/IfxDts.h"
171 #include "Cpu/Std/IfxCpu.h"
172
173 /******************************************************************************/
174 /*-----------------------------Data Structures--------------------------------*/
175 /******************************************************************************/
176
177 /** \addtogroup IfxLld_Dts_Dts_Structures
178 * \{ */
179 /** \brief DTS module configuration structure
180 */
181 typedef struct
182 {
183 boolean sensorControlDisabled; /**< \brief MODULE_SCU.DTSCON.SCLK, specifies the control register lock except MODULE_SCU.DTSCON.START. */
184 float32 lowerTemperatureLimit; /**< \brief Specifies the lower temperature limit compared against die temperature in Celsius
185 *
186 * A SMU will be triggered if the measurement result is below this limit */
187 float32 upperTemperatureLimit; /**< \brief Specifies the upper temperature limit compared against die temperature in Celsius.
188 *
189 * A SMU will be triggered if the measurement result is above this limit */
190 uint16 isrPriority; /**< \brief interrupt priority */
191 IfxSrc_Tos isrTypeOfService; /**< \brief type of interrupt service */
192 boolean enableSecureLock; /**< \brief MODULE_SCU.DTSCON.SLCK,MODULE_SCU.DTSLIM.SLCK, Specifies the Security Lock for Configuration and Limitation register. */
193 } IfxDts_Dts_Config;
194
195 /** \} */
196
197 /** \addtogroup IfxLld_Dts_Dts_Module
198 * \{ */
199
200 /******************************************************************************/
201 /*-------------------------Global Function Prototypes-------------------------*/
202 /******************************************************************************/
203
204 /** \brief Initialise the DTS with supplied configuration.
205 * \param config pointer to module configuration structure
206 * \return None
207 *
208 * Usage Example : \ref IfxLld_Dts_Dts_Usage
209 *
210 */
211 IFX_EXTERN void IfxDts_Dts_initModule(const IfxDts_Dts_Config *config);
212
213 /** \brief Intialises the module configuration buffer with default configuration.
214 * \param config pointer to module configuration structure
215 * \return None
216 *
217 * Usage Example : \ref IfxLld_Dts_Dts_Usage
218 *
219 */
220 IFX_EXTERN void IfxDts_Dts_initModuleConfig(IfxDts_Dts_Config *config);
221
222 /** \} */
223
224 /** \addtogroup IfxLld_Dts_Dts_Sensor
225 * \{ */
226
227 /******************************************************************************/
228 /*-------------------------Inline Function Prototypes-------------------------*/
229 /******************************************************************************/
230
231 /** \brief Returns the converted temperature in Celsius
232 * \return The temperature based on the DTS temperature value
233 *
234 * Usage Example : \ref IfxLld_Dts_Dts_Usage
235 *
236 */
237 IFX_INLINE float32 IfxDts_Dts_getTemperatureCelsius(void);
238
239 /** \brief Returns the unconverted temperature measurement result
240 * \return current sensor measured result.
241 *
242 * Usage Example : \ref IfxLld_Dts_Dts_Usage
243 *
244 */
245 IFX_INLINE uint16 IfxDts_Dts_getTemperatureValue(void);
246
247 /** \brief Returns the current BUSY status of the Sensor
248 * \return TRUE if Sensor is busy in measuring temperature otherwise FALSE
249 *
250 * Usage Example : \ref IfxLld_Dts_Dts_Usage
251 *
252 */
253 IFX_INLINE boolean IfxDts_Dts_isBusy(void);
254
255 /** \brief Starts the next temperature measurement.
256 * \return None
257 *
258 * Usage Example : \ref IfxLld_Dts_Dts_Usage
259 *
260 */
261 IFX_INLINE void IfxDts_Dts_startSensor(void);
262
263 /** \} */
264
265 /** \addtogroup IfxLld_Dts_Dts_Conversion
266 * \{ */
267
268 /******************************************************************************/
269 /*-------------------------Global Function Prototypes-------------------------*/
270 /******************************************************************************/
271
272 /** \brief Converts a temperature value in Celsius to DTS value
273 * \param temperatureValue the temperature in Celsius
274 * \return the appr. DTS value
275 */
276 IFX_EXTERN uint16 IfxDts_Dts_convertFromCelsius(float32 temperatureValue);
277
278 /** \brief Converts the measurement value returned from DTS to Celsius
279 * \param dtsValue measurement value returned from DTS
280 * \return temperature in Celsius
281 */
282 IFX_EXTERN float32 IfxDts_Dts_convertToCelsius(uint16 dtsValue);
283
284 /** \} */
285
286 /******************************************************************************/
287 /*---------------------Inline Function Implementations------------------------*/
288 /******************************************************************************/
289
290 IFX_INLINE float32 IfxDts_Dts_getTemperatureCelsius(void)
291 {
292 return IfxDts_Dts_convertToCelsius(IfxDts_getTemperatureValue());
293 }
294
295
296 IFX_INLINE uint16 IfxDts_Dts_getTemperatureValue(void)
297 {
298 return (uint16)IfxDts_getTemperatureValue();
299 }
300
301
302 IFX_INLINE boolean IfxDts_Dts_isBusy(void)
303 {
304 return IfxDts_isBusy();
305 }
306
307
308 IFX_INLINE void IfxDts_Dts_startSensor(void)
309 {
310 /* start sensor */
311 IfxDts_startSensor();
312
313 /* one dummy read to a SCU register which ensures that the BUSY flag is synchronized
314 * into the status register before IfxDts_Dts_isBusy() is called */
315 if (IfxDts_isBusy())
316 {}
317 }
318
319
320 #endif /* IFXDTS_DTS_H */
IfxDts_isBusy
IFX_INLINE boolean IfxDts_isBusy(void)
Returns the current BUSY status of the Sensor.
Definition: IfxDts.h:145
IfxDts_getTemperatureValue
IFX_INLINE uint16 IfxDts_getTemperatureValue(void)
Read the temperature measurement result.
Definition: IfxDts.h:139
IfxDts_startSensor
IFX_INLINE void IfxDts_startSensor(void)
Starts the next temperature measurement.
Definition: IfxDts.h:151
IfxDts_Dts_Config::upperTemperatureLimit
float32 upperTemperatureLimit
Specifies the upper temperature limit compared against die temperature in Celsius.
Definition: IfxDts_Dts.h:187
float32
float float32
Definition: Platform_Types.h:170
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxDts_Dts_convertToCelsius
IFX_EXTERN float32 IfxDts_Dts_convertToCelsius(uint16 dtsValue)
Converts the measurement value returned from DTS to Celsius.
Definition: IfxDts_Dts.c:69
IfxDts_Dts_Config::isrPriority
uint16 isrPriority
interrupt priority
Definition: IfxDts_Dts.h:190
IfxDts_Dts_Config::lowerTemperatureLimit
float32 lowerTemperatureLimit
Specifies the lower temperature limit compared against die temperature in Celsius.
Definition: IfxDts_Dts.h:184
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxDts_Dts_Config::isrTypeOfService
IfxSrc_Tos isrTypeOfService
type of interrupt service
Definition: IfxDts_Dts.h:191
IfxDts_Dts_isBusy
IFX_INLINE boolean IfxDts_Dts_isBusy(void)
Returns the current BUSY status of the Sensor.
Definition: IfxDts_Dts.h:302
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxDts_Dts_Config::sensorControlDisabled
boolean sensorControlDisabled
MODULE_SCU.DTSCON.SCLK, specifies the control register lock except MODULE_SCU.DTSCON.START.
Definition: IfxDts_Dts.h:183
IfxDts_Dts_getTemperatureValue
IFX_INLINE uint16 IfxDts_Dts_getTemperatureValue(void)
Returns the unconverted temperature measurement result.
Definition: IfxDts_Dts.h:296
IfxDts_Dts_getTemperatureCelsius
IFX_INLINE float32 IfxDts_Dts_getTemperatureCelsius(void)
Returns the converted temperature in Celsius.
Definition: IfxDts_Dts.h:290
IfxCpu.h
CPU basic functionality.
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxDts_Dts_startSensor
IFX_INLINE void IfxDts_Dts_startSensor(void)
Starts the next temperature measurement.
Definition: IfxDts_Dts.h:308
IfxDts_Dts_convertFromCelsius
IFX_EXTERN uint16 IfxDts_Dts_convertFromCelsius(float32 temperatureValue)
Converts a temperature value in Celsius to DTS value.
Definition: IfxDts_Dts.c:52
IfxDts_Dts_Config
DTS module configuration structure.
Definition: IfxDts_Dts.h:181
IfxDts_Dts_Config::enableSecureLock
boolean enableSecureLock
MODULE_SCU.DTSCON.SLCK,MODULE_SCU.DTSLIM.SLCK, Specifies the Security Lock for Configuration and Limi...
Definition: IfxDts_Dts.h:192
IfxDts.h
DTS basic functionality.
IfxDts_Dts_initModuleConfig
IFX_EXTERN void IfxDts_Dts_initModuleConfig(IfxDts_Dts_Config *config)
Intialises the module configuration buffer with default configuration.
Definition: IfxDts_Dts.c:125
IfxDts_Dts_initModule
IFX_EXTERN void IfxDts_Dts_initModule(const IfxDts_Dts_Config *config)
Initialise the DTS with supplied configuration.
Definition: IfxDts_Dts.c:75


iLLD_TC26B: IfxDts_cfg.h Source File

  • _Impl
IfxDts_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxDts_cfg.h
3 * \brief DTS on-chip implementation data
4 * \ingroup IfxLld_Dts
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Dts DTS
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Dts_Impl Implementation
44 * \ingroup IfxLld_Dts
45 * \defgroup IfxLld_Dts_Std Standard Driver
46 * \ingroup IfxLld_Dts
47 */
48
49 #ifndef IFXDTS_CFG_H
50 #define IFXDTS_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 /******************************************************************************/
57 /*-----------------------------------Macros-----------------------------------*/
58 /******************************************************************************/
59
60 #define IFXDTS_NUM_MODULES (1)
61
62 #endif /* IFXDTS_CFG_H */


iLLD_TC26B: IfxEmem.c Source File

  • Emem
  • Std
IfxEmem.c
Go to the documentation of this file.
1 /**
2 * \file IfxEmem.c
3 * \brief EMEM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxEmem.h"
47 #include "Cpu/Std/IfxCpu_Intrinsics.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 IfxEmem_LockedState IfxEmem_getLockedState(void)
54 {
55 return (IfxEmem_LockedState)MODULE_EMEM.SBRCTR.B.STBLOCK;
56 }
57
58
59 void IfxEmem_setClockEnableState(const IfxEmem_State state)
60 {
61 /* bit is inverted */
62 if (IfxEmem_State_enabled == state)
63 {
64 MODULE_EMEM.CLC.B.DISR = 0;
65 }
66 else
67 {
68 MODULE_EMEM.CLC.B.DISR = 1;
69 }
70
71 /* wait one cycle for module to be enabled */
72 __nop();
73 }
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
IfxCpu_Intrinsics.h
IfxEmem_State
IfxEmem_State
EMEM module clock enabled or disabled state defined in MODULE_EMEM.CLC.B.DISR.
Definition: IfxEmem.h:73
IfxEmem_setClockEnableState
void IfxEmem_setClockEnableState(const IfxEmem_State state)
Sets state of the EMEM module clock. Note: Do not use this API for enabling and disabling EMEM withou...
Definition: IfxEmem.c:59
IfxEmem_LockedState
IfxEmem_LockedState
EMEM lock state defined in MODULE_EMEM.SBRCTR.B.STBLOCK.
Definition: IfxEmem.h:65
IfxEmem_State_enabled
EMEM module clock enabled state.
Definition: IfxEmem.h:76
IfxEmem.h
EMEM basic functionality.
IfxEmem_getLockedState
IfxEmem_LockedState IfxEmem_getLockedState(void)
Gets the EMEM stand RAM lock state.
Definition: IfxEmem.c:53


iLLD_TC26B: IfxEmem.h Source File

  • Emem
  • Std
IfxEmem.h
Go to the documentation of this file.
1 /**
2 * \file IfxEmem.h
3 * \brief EMEM basic functionality
4 * \ingroup IfxLld_Emem
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Emem_Std_Enumerations Enumerations
42 * \ingroup IfxLld_Emem_Std
43 * \defgroup IfxLld_Emem_Std_Module Module Functions
44 * \ingroup IfxLld_Emem_Std
45 */
46
47 #ifndef IFXEMEM_H
48 #define IFXEMEM_H 1
49
50 /******************************************************************************/
51 /*----------------------------------Includes----------------------------------*/
52 /******************************************************************************/
53
54 #include "_Impl/IfxEmem_cfg.h"
55 #include "Scu/Std/IfxScuWdt.h"
56
57 /******************************************************************************/
58 /*--------------------------------Enumerations--------------------------------*/
59 /******************************************************************************/
60
61 /** \addtogroup IfxLld_Emem_Std_Enumerations
62 * \{ */
63 /** \brief EMEM lock state defined in MODULE_EMEM.SBRCTR.B.STBLOCK.
64 */
65 typedef enum
66 {
67 IfxEmem_LockedState_locked = 0, /**< \brief EMEM locked state. */
68 IfxEmem_LockedState_unlocked = 1 /**< \brief EMEM unlocked state. */
69 } IfxEmem_LockedState;
70
71 /** \brief EMEM module clock enabled or disabled state defined in MODULE_EMEM.CLC.B.DISR.
72 */
73 typedef enum
74 {
75 IfxEmem_State_disabled = 0, /**< \brief EMEM module clock disabled state. */
76 IfxEmem_State_enabled = 1 /**< \brief EMEM module clock enabled state. */
77 } IfxEmem_State;
78
79 /** \brief EMEM tile configuration mode defined in MODULE_EMEM.TILECONFIG.B.Tx( x = 0,1,..).
80 */
81 typedef enum
82 {
83 IfxEmem_TileConfigMode_calibMode = 0 /**< \brief EMEM tile mode to calibration memory. */
84 } IfxEmem_TileConfigMode;
85
86 /** \brief Tile Number
87 */
88 typedef enum
89 {
90 IfxEmem_TileNumber_0 = 0, /**< \brief Tile Number0 */
91 IfxEmem_TileNumber_1, /**< \brief Tile Number1 */
92 IfxEmem_TileNumber_2, /**< \brief Tile Number2 */
93 IfxEmem_TileNumber_3, /**< \brief Tile Number3 */
94 IfxEmem_TileNumber_4, /**< \brief Tile Number4 */
95 IfxEmem_TileNumber_5, /**< \brief Tile Number5 */
96 IfxEmem_TileNumber_6, /**< \brief Tile Number6 */
97 IfxEmem_TileNumber_7, /**< \brief Tile Number7 */
98 IfxEmem_TileNumber_8, /**< \brief Tile Number8 */
99 IfxEmem_TileNumber_9, /**< \brief Tile Number9 */
100 IfxEmem_TileNumber_10, /**< \brief Tile Number10 */
101 IfxEmem_TileNumber_11, /**< \brief Tile Number11 */
102 IfxEmem_TileNumber_12, /**< \brief Tile Number12 */
103 IfxEmem_TileNumber_13, /**< \brief Tile Number13 */
104 IfxEmem_TileNumber_14, /**< \brief Tile Number14 */
105 IfxEmem_TileNumber_15 /**< \brief Tile Number15 */
106 } IfxEmem_TileNumber;
107
108 /** \} */
109
110 /** \addtogroup IfxLld_Emem_Std_Module
111 * \{ */
112
113 /******************************************************************************/
114 /*-------------------------Inline Function Prototypes-------------------------*/
115 /******************************************************************************/
116
117 /** \brief Returns the status of module enabled or disabled
118 * \return Status (TRUE / FALSE)
119 */
120 IFX_INLINE boolean IfxEmem_isModuleEnabled(void);
121
122 /** \brief Sets all EMEM tiles to calibration memory mode.
123 * \param mode EMEM tile configuration mode.
124 * \param tile tile number
125 * \return None
126 */
127 IFX_INLINE void IfxEmem_setTileConfigMode(const IfxEmem_TileConfigMode mode, IfxEmem_TileNumber tile);
128
129 /** \brief Sets Unlock standby lock flag.
130 * \param flag Unlock standby lock flag value.
131 * \return None
132 */
133 IFX_INLINE void IfxEmem_setUnlockStandbyLockFlag(const uint8 flag);
134
135 /******************************************************************************/
136 /*-------------------------Global Function Prototypes-------------------------*/
137 /******************************************************************************/
138
139 /** \brief Gets the EMEM stand RAM lock state.
140 * \return EMEM stand RAM lock state.
141 */
142 IFX_EXTERN IfxEmem_LockedState IfxEmem_getLockedState(void);
143
144 /** \brief Sets state of the EMEM module clock.
145 * Note: Do not use this API for enabling and disabling EMEM without handling Endinit protection in application.
146 * for complete enable and disable of EMEM with endint protection handling, please use the following APIs
147 * /ref IfxEmem_enableModule
148 * /ref IfxEmem_disableModule
149 * \param state EMEM module clock enabled or disabled state.
150 * \return None
151 */
152 IFX_EXTERN void IfxEmem_setClockEnableState(const IfxEmem_State state);
153
154 /** \} */
155
156 /******************************************************************************/
157 /*---------------------Inline Function Implementations------------------------*/
158 /******************************************************************************/
159
160 IFX_INLINE boolean IfxEmem_isModuleEnabled(void)
161 {
162 return (MODULE_EMEM.CLC.B.DISS == 0) ? TRUE : FALSE;
163 }
164
165
166 IFX_INLINE void IfxEmem_setTileConfigMode(const IfxEmem_TileConfigMode mode, IfxEmem_TileNumber tile)
167 {
168 uint32 shift = tile * 2;
169 uint32 mask = ~(0x3 << shift);
170 uint32 value = (uint32)mode << shift;
171 MODULE_EMEM.TILECONFIG.U = (MODULE_EMEM.TILESTATE.U & mask) | value;
172 }
173
174
175 IFX_INLINE void IfxEmem_setUnlockStandbyLockFlag(const uint8 flag)
176 {
177 if (8 > flag)
178 {
179 MODULE_EMEM.SBRCTR.B.STBULK = flag;
180 }
181 }
182
183
184 #endif /* IFXEMEM_H */
IfxEmem_TileConfigMode
IfxEmem_TileConfigMode
EMEM tile configuration mode defined in MODULE_EMEM.TILECONFIG.B.Tx( x = 0,1,..). ...
Definition: IfxEmem.h:81
IfxEmem_TileNumber_12
Tile Number12.
Definition: IfxEmem.h:102
IfxEmem_TileConfigMode_calibMode
EMEM tile mode to calibration memory.
Definition: IfxEmem.h:83
IfxEmem_TileNumber_3
Tile Number3.
Definition: IfxEmem.h:93
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEmem_TileNumber
IfxEmem_TileNumber
Tile Number.
Definition: IfxEmem.h:88
IfxEmem_TileNumber_0
Tile Number0.
Definition: IfxEmem.h:90
IfxEmem_isModuleEnabled
IFX_INLINE boolean IfxEmem_isModuleEnabled(void)
Returns the status of module enabled or disabled.
Definition: IfxEmem.h:160
IfxEmem_State
IfxEmem_State
EMEM module clock enabled or disabled state defined in MODULE_EMEM.CLC.B.DISR.
Definition: IfxEmem.h:73
IfxEmem_LockedState_unlocked
EMEM unlocked state.
Definition: IfxEmem.h:68
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxEmem_TileNumber_15
Tile Number15.
Definition: IfxEmem.h:105
IfxEmem_TileNumber_8
Tile Number8.
Definition: IfxEmem.h:98
IfxScuWdt.h
SCU basic functionality.
IfxEmem_State_disabled
EMEM module clock disabled state.
Definition: IfxEmem.h:75
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEmem_TileNumber_2
Tile Number2.
Definition: IfxEmem.h:92
IfxEmem_setClockEnableState
IFX_EXTERN void IfxEmem_setClockEnableState(const IfxEmem_State state)
Sets state of the EMEM module clock. Note: Do not use this API for enabling and disabling EMEM withou...
Definition: IfxEmem.c:59
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxEmem_TileNumber_13
Tile Number13.
Definition: IfxEmem.h:103
IfxEmem_TileNumber_6
Tile Number6.
Definition: IfxEmem.h:96
IfxEmem_TileNumber_5
Tile Number5.
Definition: IfxEmem.h:95
IfxEmem_LockedState
IfxEmem_LockedState
EMEM lock state defined in MODULE_EMEM.SBRCTR.B.STBLOCK.
Definition: IfxEmem.h:65
IfxEmem_TileNumber_14
Tile Number14.
Definition: IfxEmem.h:104
IfxEmem_State_enabled
EMEM module clock enabled state.
Definition: IfxEmem.h:76
IfxEmem_TileNumber_7
Tile Number7.
Definition: IfxEmem.h:97
IfxEmem_TileNumber_11
Tile Number11.
Definition: IfxEmem.h:101
IfxEmem_setTileConfigMode
IFX_INLINE void IfxEmem_setTileConfigMode(const IfxEmem_TileConfigMode mode, IfxEmem_TileNumber tile)
Sets all EMEM tiles to calibration memory mode.
Definition: IfxEmem.h:166
IfxEmem_TileNumber_1
Tile Number1.
Definition: IfxEmem.h:91
IfxEmem_setUnlockStandbyLockFlag
IFX_INLINE void IfxEmem_setUnlockStandbyLockFlag(const uint8 flag)
Sets Unlock standby lock flag.
Definition: IfxEmem.h:175
IfxEmem_getLockedState
IFX_EXTERN IfxEmem_LockedState IfxEmem_getLockedState(void)
Gets the EMEM stand RAM lock state.
Definition: IfxEmem.c:53
IfxEmem_TileNumber_10
Tile Number10.
Definition: IfxEmem.h:100
IfxEmem_LockedState_locked
EMEM locked state.
Definition: IfxEmem.h:67
IfxEmem_TileNumber_4
Tile Number4.
Definition: IfxEmem.h:94
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxEmem_cfg.h
EMEM on-chip implementation data.
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEmem_TileNumber_9
Tile Number9.
Definition: IfxEmem.h:99


iLLD_TC26B: IfxEmem_cfg.c Source File

  • _Impl
IfxEmem_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxEmem_cfg.c
3 * \brief EMEM on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxEmem_cfg.h"
IfxEmem_cfg.h
EMEM on-chip implementation data.


iLLD_TC26B: IfxEmem_cfg.h Source File

  • _Impl
IfxEmem_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxEmem_cfg.h
3 * \brief EMEM on-chip implementation data
4 * \ingroup IfxLld_Emem
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Emem EMEM
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Emem_Impl Implementation
44 * \ingroup IfxLld_Emem
45 * \defgroup IfxLld_Emem_Std Standard Driver
46 * \ingroup IfxLld_Emem
47 */
48
49 #ifndef IFXEMEM_CFG_H
50 #define IFXEMEM_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "Cpu/Std/Ifx_Types.h"
57 #include "IfxEmem_reg.h"
58
59 /******************************************************************************/
60 /*-----------------------------------Macros-----------------------------------*/
61 /******************************************************************************/
62
63 #define IFXEMEM_START_ADDR_CPU_CACHED 0x9F000000UL
64
65 #define IFXEMEM_START_ADDR_CPU 0xBF000000UL
66
67 #define IFXEMEM_START_ADDR_BBB (0xAF000000UL)
68
69 #define IFXEMEM_SIZE (0x50000UL)
70
71 #define IFXEMEM_NUM_MODULES (1)
72
73 /******************************************************************************/
74 /*-------------------------------Enumerations---------------------------------*/
75 /******************************************************************************/
76
77 #endif /* IFXEMEM_CFG_H */
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.


iLLD_TC26B: IfxEray.c Source File

  • Eray
  • Std
IfxEray.c
Go to the documentation of this file.
1 /**
2 * \file IfxEray.c
3 * \brief ERAY basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxEray.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 uint16 IfxEray_calcHeaderCrc(uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
53 {
54 uint32 headerValue = ((syncFrameIndicator & 0x1) << 19) | ((startupFrameIndicator & 0x1) << 18) | ((frameId & 0x7FF) << 7) | (payloadLength &
55 0x7F);
56
57 uint32 crcInit = 0x1A;
58 uint32 length = 20;
59 uint32 crcNext;
60 uint32 crcPoly = 0x385;
61 uint32 crcRegX = crcInit;
62 uint32 headerTemp, regTemp;
63
64 headerValue <<= 11;
65 crcRegX <<= 21;
66 crcPoly <<= 21;
67
68 while (length)
69 {
70 headerValue <<= 1;
71 headerTemp = headerValue & 0x80000000;
72 regTemp = crcRegX & 0x80000000;
73
74 if (headerTemp ^ regTemp) // Step 1
75 {
76 crcNext = 1;
77 }
78 else
79 {
80 crcNext = 0;
81 }
82
83 crcRegX <<= 1; // Step 2
84
85 if (crcNext)
86 {
87 crcRegX ^= crcPoly; // Step 3
88 }
89
90 length--;
91 }
92
93 crcRegX >>= 21;
94
95 return (uint16)crcRegX;
96 }
97
98
99 boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
100 {
101 boolean result;
102
103 // wait if Communication controller is busy
104 while (eray->SUCC1.B.PBSY == 1)
105 {}
106
107 eray->SUCC1.B.CMD = pocCommand;
108
109 // if command not accepted, return FALSE
110 if (eray->SUCC1.B.CMD == 0)
111 {
112 result = FALSE;
113 }
114 else
115 {
116 result = TRUE;
117 }
118
119 return result;
120 }
121
122
123 void IfxEray_clearAllFlags(Ifx_ERAY *eray)
124 {
125 eray->EIR.U = 0xFFFFFFFFU; /* Clear Error Int. */
126 eray->SIR.U = 0xFFFFFFFFU; /* Clear Status Int. */
127 eray->EIER.U = 0xFFFFFFFFU; /* Disable all Error Int. */
128 eray->SIER.U = 0xFFFFFFFFU; /* Disable all Status Int. */
129 eray->MHDS.U = 0x7F7F7FFFU; /* Clear Error Int. */
130 }
131
132
133 void IfxEray_enableInterruptLines(Ifx_ERAY *eray)
134 {
135 eray->ILE.U = 0x00000003U; //enable both the interrupt lines
136 eray->EILS.U = 0x00000000U; // all interrupt lines to INT0SRC
137 eray->SILS.U = 0x00000800U; // TOBC interrupt line to INT1SRC
138 eray->SIES.U = 0x0303FFFFU; // all status interrupts are enabled
139 eray->EIES.U = 0x07070FFFU; // all error interrupts are enabled
140 eray->NDIC1.U = 0x00000000U; // all interrupt lines to NADT0SRC
141 eray->NDIC2.U = 0x00000000U; // all interrupt lines to NADT0SRC
142 eray->NDIC3.U = 0x00000000U; // all interrupt lines to NADT0SRC
143 eray->NDIC4.U = 0x00000000U; // all interrupt lines to NADT0SRC
144 eray->MSIC1.U = 0x00000000U; // all interrupt lines to MBSC0SRC
145 eray->MSIC2.U = 0x00000000U; // all interrupt lines to MBSC0SRC
146 eray->MSIC3.U = 0x00000000U; // all interrupt lines to MBSC0SRC
147 eray->MSIC4.U = 0x00000000U; // all interrupt lines to MBSC0SRC
148 }
149
150
151 Ifx_ERAY *IfxEray_getAddress(IfxEray_Index eray)
152 {
153 Ifx_ERAY *module;
154
155 if (eray < IFXERAY_NUM_MODULES)
156 {
157 module = (Ifx_ERAY *)IfxEray_cfg_indexMap[eray].module;
158 }
159 else
160 {
161 module = NULL_PTR;
162 }
163
164 return module;
165 }
166
167
168 IfxEray_Index IfxEray_getIndex(Ifx_ERAY *eray)
169 {
170 uint32 index;
171 IfxEray_Index result;
172
173 result = IfxEray_Index_none;
174
175 for (index = 0; index < IFXERAY_NUM_MODULES; index++)
176 {
177 if (IfxEray_cfg_indexMap[index].module == eray)
178 {
179 result = (IfxEray_Index)IfxEray_cfg_indexMap[index].index;
180 break;
181 }
182 }
183
184 return result;
185 }
186
187
188 void IfxEray_readData(Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
189 {
190 if (data != NULL_PTR)
191 {
192 uint16 length = (payloadLength + 1) / 2;
193 uint8 index;
194
195 for (index = 0; index < length; index++)
196 {
197 *data++ = eray->RDDS_1S[index].U;
198 }
199 }
200 }
201
202
203 void IfxEray_readFrame(Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
204 {
205 {
206 Ifx_ERAY_RDHS1 rdhs1;
207 rdhs1.U = eray->RDHS1.U;
208 Ifx_ERAY_RDHS2 rdhs2;
209 rdhs2.U = eray->RDHS2.U;
210 Ifx_ERAY_RDHS3 rdhs3;
211 rdhs3.U = eray->RDHS3.U;
212
213 header->frameId = rdhs1.B.FID;
214 header->payloadLength = rdhs2.B.PLR;
215 header->headerCrc = rdhs2.B.CRC;
216 header->payloadPreambleIndicator = rdhs3.B.PPI;
217 header->nullFrameIndicator = rdhs3.B.NFI;
218 header->syncFrame = rdhs3.B.SYN;
219 header->startupFrame = rdhs3.B.SFI;
220 header->cycleNumber = rdhs3.B.RCC;
221 }
222
223 IfxEray_readData(eray, data, (header->payloadLength > maxPayloadLength) ? maxPayloadLength : header->payloadLength);
224 }
225
226
227 void IfxEray_resetModule(Ifx_ERAY *eray)
228 {
229 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
230 IfxScuWdt_clearCpuEndinit(passwd);
231 eray->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
232 eray->KRST0.B.RST = 1;
233
234 IfxScuWdt_setCpuEndinit(passwd);
235
236 while (eray->KRST0.B.RSTSTAT == 0)
237 {
238 /* Wait until reset is executed */
239 }
240
241 IfxScuWdt_clearCpuEndinit(passwd);
242 eray->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
243 IfxScuWdt_setCpuEndinit(passwd);
244 }
245
246
247 void IfxEray_setMessageBufferInterruptDestination(Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
248 {
249 uint8 ix = messageBuffer / 32;
250 uint32 mask = 1 << (messageBuffer % 32);
251 Ifx_ERAY_MSIC1 *msicSFR = (Ifx_ERAY_MSIC1 *)((uint32)&eray->MSIC1 + 4 * ix);
252
253 if (messageBufferDestination == FALSE)
254 {
255 msicSFR->U &= ~mask;
256 }
257 else
258 {
259 msicSFR->U |= mask;
260 }
261 }
262
263
264 void IfxEray_setNewDataInterruptDestination(Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
265 {
266 IFX_UNUSED_PARAMETER(ndat);
267 uint8 ix = ndatDestination / 32;
268 uint32 mask = 1 << (ndatDestination % 32);
269 Ifx_ERAY_NDIC1 *ndicSFR = (Ifx_ERAY_NDIC1 *)((uint32)&eray->NDIC1 + 4 * ix);
270
271 if (ndatDestination == FALSE)
272 {
273 ndicSFR->U &= ~mask;
274 }
275 else
276 {
277 ndicSFR->U |= mask;
278 }
279 }
280
281
282 void IfxEray_setPocReady(Ifx_ERAY *eray)
283 {
284 // wait CC is busy
285 while (eray->SUCC1.B.PBSY == 1)
286 {}
287
288 // Ready unlock sequence
289 eray->LCK.B.CLK = 0xCE;
290 eray->LCK.B.CLK = 0x31;
291 eray->SUCC1.B.CMD = IfxEray_PocCommand_ready;
292 }
293
294
295 void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
296 {
297 // wait if Host is busy with another transfer
298 while (IfxEray_getInputBufferBusyHostStatus(eray) == TRUE)
299 {}
300
301 if (header != NULL_PTR)
302 {
303 {
304 Ifx_ERAY_WRHS1 wrhs1;
305 wrhs1.U = 0;
306 wrhs1.B.FID = header->frameId;
307 wrhs1.B.CYC = header->cycleCode;
308 wrhs1.B.CHA = header->channelAFiltered;
309 wrhs1.B.CHB = header->channelBFiltered;
310 wrhs1.B.CFG = header->bufferDirection;
311 wrhs1.B.PPIT = header->transmitPayloadIndicatior;
312 wrhs1.B.TXM = header->transmissionMode;
313 wrhs1.B.MBI = header->bufferServiceEnabled;
314 eray->WRHS1.U = wrhs1.U;
315 }
316 {
317 Ifx_ERAY_WRHS2 wrhs2;
318 wrhs2.U = 0;
319
320 if (header->bufferDirection == IfxEray_BufferDirection_transmit)
321 {
322 wrhs2.B.CRC = IfxEray_calcHeaderCrc(header->payloadLength, header->frameId, header->startupFrameIndicator, header->syncFrameIndicator);
323 }
324
325 wrhs2.B.PLC = header->payloadLength;
326 eray->WRHS2.U = wrhs2.U;
327 }
328
329 eray->WRHS3.U = header->dataPointer;
330 }
331
332 IfxEray_writeData(eray, data, header->payloadLength);
333
334 eray->IBCM.B.LHSH = slotConfig->headerTransfered;
335 eray->IBCM.B.LDSH = slotConfig->dataTransfered;
336 eray->IBCM.B.STXRH = slotConfig->transferRequested;
337 eray->IBCR.B.IBRH = slotConfig->bufferIndex;
338
339 // wait if Shadow is busy with another transfer
340 while (IfxEray_getInputBufferBusyShadowStatus(eray) == TRUE)
341 {}
342
343 while (IfxEray_getInputBufferBusyHostStatus(eray) == TRUE)
344 {}
345 }
346
347
348 void IfxEray_writeData(Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
349 {
350 if (data != NULL_PTR)
351 {
352 uint16 length = (payloadLength + 1) / 2;
353 uint8 index;
354
355 for (index = 0; index < length; index++)
356 {
357 eray->WRDS_1S[index].U = *data++;
358 }
359 }
360 }
IfxEray_SlotConfig
Transmit control structure.
Definition: IfxEray.h:413
IfxEray_setSlot
void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots.
Definition: IfxEray.c:295
IfxEray_Header::bufferDirection
IfxEray_BufferDirection bufferDirection
selects buffer as a transmit buffer or as a receive buffer.
Definition: IfxEray.h:387
IfxEray_calcHeaderCrc
uint16 IfxEray_calcHeaderCrc(uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
Calculate and returns the CRC for frame.
Definition: IfxEray.c:52
IfxEray_setPocReady
void IfxEray_setPocReady(Ifx_ERAY *eray)
Sets the POC state to Ready state.
Definition: IfxEray.c:282
IfxEray_ReceivedHeader::syncFrame
uint8 syncFrame
0 : received frame is not a synch frame ; 1 : receive frame is a synch frame.
Definition: IfxEray.h:405
IfxEray_BufferDirection_transmit
buffer is configured as transmit buffer
Definition: IfxEray.h:91
IfxEray_setNewDataInterruptDestination
void IfxEray_setNewDataInterruptDestination(Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination.
Definition: IfxEray.c:264
IfxEray_ReceivedHeader
Received header in a frame.
Definition: IfxEray.h:399
IfxEray_Header::transmissionMode
IfxEray_TransmissionMode transmissionMode
transmission mode of Header.
Definition: IfxEray.h:389
IfxEray_Header::transmitPayloadIndicatior
boolean transmitPayloadIndicatior
weather payload indicator is set or not.
Definition: IfxEray.h:388
IfxEray_getIndex
IfxEray_Index IfxEray_getIndex(Ifx_ERAY *eray)
API to get the resource index of the ERAY specified.
Definition: IfxEray.c:168
IfxEray_SlotConfig::dataTransfered
boolean dataTransfered
whether data is transfered from input buffers to Message RAM or not.
Definition: IfxEray.h:416
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEray_ReceivedHeader::payloadPreambleIndicator
uint8 payloadPreambleIndicator
1 : received payload segment has network management and message id or not; 0 : It hasn&#39;t...
Definition: IfxEray.h:408
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxEray_getInputBufferBusyHostStatus
IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus(Ifx_ERAY *eray)
Gets the Input Buffer Host Busy status.
Definition: IfxEray.h:1266
IfxEray_Header::dataPointer
uint16 dataPointer
pointer to the data section of message buffer in RAM.
Definition: IfxEray.h:392
IfxEray_Header::startupFrameIndicator
boolean startupFrameIndicator
whether startup frame is indicated or not.
Definition: IfxEray.h:393
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEray_Header::bufferServiceEnabled
boolean bufferServiceEnabled
wether buffer service request is enabled or not.
Definition: IfxEray.h:390
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxEray_ReceivedHeader::headerCrc
uint16 headerCrc
received header crc.
Definition: IfxEray.h:403
IfxEray.h
ERAY basic functionality.
IfxEray_writeData
void IfxEray_writeData(Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers.
Definition: IfxEray.c:348
IfxEray_SlotConfig::transferRequested
boolean transferRequested
transmit buffer released for transmission or not.
Definition: IfxEray.h:417
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxEray_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES]
Definition: IfxEray_cfg.c:52
IfxEray_getInputBufferBusyShadowStatus
IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus(Ifx_ERAY *eray)
Gets the Input Buffer Shadow status.
Definition: IfxEray.h:1272
IfxEray_setMessageBufferInterruptDestination
void IfxEray_setMessageBufferInterruptDestination(Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination.
Definition: IfxEray.c:247
IfxEray_Header
Header section in a frame.
Definition: IfxEray.h:381
IFXERAY_NUM_MODULES
#define IFXERAY_NUM_MODULES
Definition: IfxEray_cfg.h:65
IfxEray_SlotConfig::bufferIndex
uint8 bufferIndex
buffer index in the Message RAM.
Definition: IfxEray.h:418
IfxEray_ReceivedHeader::payloadLength
uint8 payloadLength
received payload length.
Definition: IfxEray.h:402
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxEray_ReceivedHeader::nullFrameIndicator
uint8 nullFrameIndicator
0 : no data frame received; 1: atleast one data frame received.
Definition: IfxEray.h:404
IfxEray_Header::channelAFiltered
boolean channelAFiltered
channel A serves as a control for transmit and filter for receive buffers.
Definition: IfxEray.h:385
IfxEray_ReceivedHeader::startupFrame
uint8 startupFrame
0 : received frame is not a startup frame ; 1 : receive frame is a startup frame. ...
Definition: IfxEray.h:406
IfxEray_Header::syncFrameIndicator
boolean syncFrameIndicator
whether sync frame is indicated or not.
Definition: IfxEray.h:394
IfxEray_resetModule
void IfxEray_resetModule(Ifx_ERAY *eray)
Resets the ERAY kernel.
Definition: IfxEray.c:227
IfxEray_getAddress
Ifx_ERAY * IfxEray_getAddress(IfxEray_Index eray)
Definition: IfxEray.c:151
IfxEray_Header::channelBFiltered
boolean channelBFiltered
channel B serves as a control for transmit and filter for receive buffers.
Definition: IfxEray.h:386
IfxEray_Index_none
Not Selected.
Definition: IfxEray_cfg.h:81
IfxEray_SlotConfig::headerTransfered
boolean headerTransfered
whether header is transfered from input buffers to Message RAM or not.
Definition: IfxEray.h:415
IfxEray_PocCommand
IfxEray_PocCommand
Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD.
Definition: IfxEray.h:264
IfxEray_ReceivedHeader::cycleNumber
uint8 cycleNumber
cycle number in which frame is received.
Definition: IfxEray.h:407
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxEray_PocCommand_ready
command to controller to enter READY.
Definition: IfxEray.h:268
IfxEray_readFrame
void IfxEray_readFrame(Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers.
Definition: IfxEray.c:203
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxEray_clearAllFlags
void IfxEray_clearAllFlags(Ifx_ERAY *eray)
Clears all the error flags.
Definition: IfxEray.c:123
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxEray_enableInterruptLines
void IfxEray_enableInterruptLines(Ifx_ERAY *eray)
Enables all the Interrupt lines.
Definition: IfxEray.c:133
IfxEray_Index
IfxEray_Index
List of the available Eray resources.
Definition: IfxEray_cfg.h:79
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEray_changePocState
boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state.
Definition: IfxEray.c:99
IfxEray_Header::cycleCode
uint8 cycleCode
the cycle set used for cycle counter filtering.
Definition: IfxEray.h:384
IfxEray_readData
void IfxEray_readData(Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers.
Definition: IfxEray.c:188
IfxEray_ReceivedHeader::frameId
uint16 frameId
received frame id.
Definition: IfxEray.h:401


iLLD_TC26B: IfxEray.h Source File

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IfxEray.h
Go to the documentation of this file.
1 /**
2 * \file IfxEray.h
3 * \brief ERAY basic functionality
4 * \ingroup IfxLld_Eray
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Eray_Std_Enumerations Enumerations
42 * \ingroup IfxLld_Eray_Std
43 * \defgroup IfxLld_Eray_Std_Interrupt Interrupt Functions
44 * \ingroup IfxLld_Eray_Std
45 * \defgroup IfxLld_Eray_Std_IO IO Pin Configuration Functions
46 * \ingroup IfxLld_Eray_Std
47 * \defgroup IfxLld_Eray_Std_Module Module Functions
48 * \ingroup IfxLld_Eray_Std
49 * \defgroup IfxLld_Eray_Std_Status Status Functions
50 * \ingroup IfxLld_Eray_Std
51 * \defgroup IfxLld_Eray_Std_Configuration Configuration Functions
52 * \ingroup IfxLld_Eray_Std
53 * \defgroup IfxLld_Eray_Std_Structures Data Structures
54 * \ingroup IfxLld_Eray_Std
55 * \defgroup IfxLld_Eray_Std_Operative Operative Functions
56 * \ingroup IfxLld_Eray_Std
57 */
58
59 #ifndef IFXERAY_H
60 #define IFXERAY_H 1
61
62 /******************************************************************************/
63 /*----------------------------------Includes----------------------------------*/
64 /******************************************************************************/
65
66 #include "_Impl/IfxEray_cfg.h"
67 #include "_PinMap/IfxEray_PinMap.h"
68 #include "Src/Std/IfxSrc.h"
69 #include "IfxEray_reg.h"
70
71 /******************************************************************************/
72 /*--------------------------------Enumerations--------------------------------*/
73 /******************************************************************************/
74
75 /** \addtogroup IfxLld_Eray_Std_Enumerations
76 * \{ */
77 /** \brief Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP.
78 */
79 typedef enum
80 {
81 IfxEray_Baudrate_10 = 0, /**< \brief baudrate is 10MBits/Sec */
82 IfxEray_Baudrate_5 = 1, /**< \brief baudrate is 5MBits/Sec */
83 IfxEray_Baudrate_2_5 = 2 /**< \brief baudrate is 2.5MBits/Sec */
84 } IfxEray_Baudrate;
85
86 /** \brief wheather transmit buffer or receive buffer, defined in MODULE_ERAY0.WRHS1.B.CFG.
87 */
88 typedef enum
89 {
90 IfxEray_BufferDirection_receive = 0, /**< \brief buffer is configured as receive buffer */
91 IfxEray_BufferDirection_transmit = 1 /**< \brief buffer is configured as transmit buffer */
92 } IfxEray_BufferDirection;
93
94 /** \brief Channel Id
95 */
96 typedef enum
97 {
98 IfxEray_Channel_a = 0, /**< \brief channel A */
99 IfxEray_Channel_b = 1 /**< \brief channel B */
100 } IfxEray_Channel;
101
102 /** \brief Selection of error flag to clear defined in MODULE_ERAY.EIR.U
103 */
104 typedef enum
105 {
106 IfxEray_ClearErrorFlag_pemc = 1, /**< \brief POC error mode change bit. */
107 IfxEray_ClearErrorFlag_cna = 2, /**< \brief command not accepted event bit. */
108 IfxEray_ClearErrorFlag_sfbm = 4, /**< \brief sync frame below minimum bit. */
109 IfxEray_ClearErrorFlag_sfo = 8, /**< \brief sync frame overflow event bit */
110 IfxEray_ClearErrorFlag_ccf = 16, /**< \brief clock correction failure event. */
111 IfxEray_ClearErrorFlag_ccl = 32, /**< \brief CHI command locked event. */
112 IfxEray_ClearErrorFlag_eerr = 64, /**< \brief ECC error event bit. */
113 IfxEray_ClearErrorFlag_rfo = 128, /**< \brief RxFIFO overrun event bit. */
114 IfxEray_ClearErrorFlag_efa = 256, /**< \brief empty FIFO access event bit. */
115 IfxEray_ClearErrorFlag_iiba = 512, /**< \brief illegal input buffer access event. */
116 IfxEray_ClearErrorFlag_ioba = 1024, /**< \brief illegal output buffer access event. */
117 IfxEray_ClearErrorFlag_mhf = 2048, /**< \brief message handler constraint flag. */
118 IfxEray_ClearErrorFlag_eda = 65536, /**< \brief error event on channel A. */
119 IfxEray_ClearErrorFlag_ltva = 131072, /**< \brief latest transmit violation flag on channel A . */
120 IfxEray_ClearErrorFlag_taba = 262144, /**< \brief transmission across channel A boundary flag. */
121 IfxEray_ClearErrorFlag_edb = 16777216, /**< \brief error event on channel B. */
122 IfxEray_ClearErrorFlag_ltvb = 33554432, /**< \brief latest transmit violation flag on channel B . */
123 IfxEray_ClearErrorFlag_tabb = 67108864 /**< \brief transmission across channel B boundary flag. */
124 } IfxEray_ClearErrorFlag;
125
126 /** \brief Selection of status flag to clear defined in MODULE_ERAY.SIR.U
127 */
128 typedef enum
129 {
130 IfxEray_ClearStatusFlag_wst = 1, /**< \brief wakeup status bit. */
131 IfxEray_ClearStatusFlag_cas = 2, /**< \brief collision avoidance bit. */
132 IfxEray_ClearStatusFlag_cycs = 4, /**< \brief cycle start service bit. */
133 IfxEray_ClearStatusFlag_txi = 8, /**< \brief transmit service request bit. */
134 IfxEray_ClearStatusFlag_rxi = 16, /**< \brief receive service request bit. */
135 IfxEray_ClearStatusFlag_rfne = 32, /**< \brief receive fifo not empty bit. */
136 IfxEray_ClearStatusFlag_rfcl = 64, /**< \brief RxFIFO critical level reached bit. */
137 IfxEray_ClearStatusFlag_nmvc = 128, /**< \brief network management vector bit. */
138 IfxEray_ClearStatusFlag_ti0 = 256, /**< \brief timer0 service request bit. */
139 IfxEray_ClearStatusFlag_ti1 = 512, /**< \brief timer1 service request bit. */
140 IfxEray_ClearStatusFlag_tibc = 1024, /**< \brief transfer input buffer completion request bit. */
141 IfxEray_ClearStatusFlag_tobc = 2048, /**< \brief transfer output buffer completion request bit. */
142 IfxEray_ClearStatusFlag_swe = 4096, /**< \brief stop watch event bit. */
143 IfxEray_ClearStatusFlag_sucs = 8192, /**< \brief startup success event bit. */
144 IfxEray_ClearStatusFlag_mbsi = 16384, /**< \brief message buffer service status bit. */
145 IfxEray_ClearStatusFlag_sds = 32768, /**< \brief dynamic segment start bit. */
146 IfxEray_ClearStatusFlag_wupa = 65536, /**< \brief wakeup pattern channel A bit. */
147 IfxEray_ClearStatusFlag_mtsa = 131072, /**< \brief MTS receive channel A bit. */
148 IfxEray_ClearStatusFlag_wupb = 16777216, /**< \brief wakeup pattern channel B bit. */
149 IfxEray_ClearStatusFlag_mtsb = 33554432 /**< \brief MTS receive channel B bit. */
150 } IfxEray_ClearStatusFlag;
151
152 /** \brief Clock divider in RUN mode, defined in MODULE_ERAY0.B.RMC.
153 */
154 typedef enum
155 {
156 IfxEray_ClockDivider_none = 0, /**< \brief no clock signal */
157 IfxEray_ClockDivider_1 = 1, /**< \brief run mode clock divider 1 */
158 IfxEray_ClockDivider_2, /**< \brief run mode clock divider 2 */
159 IfxEray_ClockDivider_3, /**< \brief run mode clock divider 3 */
160 IfxEray_ClockDivider_4, /**< \brief run mode clock divider 4 */
161 IfxEray_ClockDivider_5, /**< \brief run mode clock divider 5 */
162 IfxEray_ClockDivider_6, /**< \brief run mode clock divider 6 */
163 IfxEray_ClockDivider_7 /**< \brief run mode clock divider 7 */
164 } IfxEray_ClockDivider;
165
166 /** \brief External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC.
167 */
168 typedef enum
169 {
170 IfxEray_ExternalOffset_noCorrection = 1, /**< \brief No external correction control. */
171 IfxEray_ExternalOffset_correctionSubtracted = 2, /**< \brief External offset correction subtracted from calculated correction. */
172 IfxEray_ExternalOffset_correctionAdded = 3 /**< \brief External offset correction added to calculated correction. */
173 } IfxEray_ExternalOffset;
174
175 /** \brief External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC.
176 */
177 typedef enum
178 {
179 IfxEray_ExternalOffsetCorrection_0 = 0, /**< \brief external clock offset correction value 0 */
180 IfxEray_ExternalOffsetCorrection_1, /**< \brief external clock offset correction value 1 */
181 IfxEray_ExternalOffsetCorrection_2, /**< \brief external clock offset correction value 2 */
182 IfxEray_ExternalOffsetCorrection_3, /**< \brief external clock offset correction value 3 */
183 IfxEray_ExternalOffsetCorrection_4, /**< \brief external clock offset correction value 4 */
184 IfxEray_ExternalOffsetCorrection_5, /**< \brief external clock offset correction value 5 */
185 IfxEray_ExternalOffsetCorrection_6, /**< \brief external clock offset correction value 6 */
186 IfxEray_ExternalOffsetCorrection_7 /**< \brief external clock offset correction value 7 */
187 } IfxEray_ExternalOffsetCorrection;
188
189 /** \brief External rate correction control MODULE_ERAY0.GTU11.B.ERCC.
190 */
191 typedef enum
192 {
193 IfxEray_ExternalRate_noCorrection = 1, /**< \brief No external correction control. */
194 IfxEray_ExternalRate_correctionSubtracted = 2, /**< \brief External rate correction subtracted from calculated correction. */
195 IfxEray_ExternalRate_correctionAdded = 3 /**< \brief External rate correction added to calculated correction. */
196 } IfxEray_ExternalRate;
197
198 /** \brief External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC.
199 */
200 typedef enum
201 {
202 IfxEray_ExternalRateCorrection_0 = 0, /**< \brief external clock rate correction value 0 */
203 IfxEray_ExternalRateCorrection_1, /**< \brief external clock rate correction value 1 */
204 IfxEray_ExternalRateCorrection_2, /**< \brief external clock rate correction value 2 */
205 IfxEray_ExternalRateCorrection_3, /**< \brief external clock rate correction value 3 */
206 IfxEray_ExternalRateCorrection_4, /**< \brief external clock rate correction value 4 */
207 IfxEray_ExternalRateCorrection_5, /**< \brief external clock rate correction value 5 */
208 IfxEray_ExternalRateCorrection_6, /**< \brief external clock rate correction value 6 */
209 IfxEray_ExternalRateCorrection_7 /**< \brief external clock rate correction value 7 */
210 } IfxEray_ExternalRateCorrection;
211
212 /** \brief Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI.
213 */
214 typedef enum
215 {
216 IfxEray_IdleDynamicSlots_0 = 0, /**< \brief duration of dynamic slot idle phase is 0 */
217 IfxEray_IdleDynamicSlots_1, /**< \brief duration of dynamic slot idle phase is 1 */
218 IfxEray_IdleDynamicSlots_2 /**< \brief duration of dynamic slot idle phase is 2 */
219 } IfxEray_IdleDynamicSlots;
220
221 /** \brief Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN.
222 */
223 typedef enum
224 {
225 IfxEray_ListenTimeOutNoise_2 = 1, /**< \brief listen Time-out noise 2 */
226 IfxEray_ListenTimeOutNoise_3, /**< \brief listen Time-out noise 3 */
227 IfxEray_ListenTimeOutNoise_4, /**< \brief listen Time-out noise 4 */
228 IfxEray_ListenTimeOutNoise_5, /**< \brief listen Time-out noise 5 */
229 IfxEray_ListenTimeOutNoise_6, /**< \brief listen Time-out noise 6 */
230 IfxEray_ListenTimeOutNoise_7, /**< \brief listen Time-out noise 7 */
231 IfxEray_ListenTimeOutNoise_8, /**< \brief listen Time-out noise 8 */
232 IfxEray_ListenTimeOutNoise_9, /**< \brief listen Time-out noise 9 */
233 IfxEray_ListenTimeOutNoise_10, /**< \brief listen Time-out noise 10 */
234 IfxEray_ListenTimeOutNoise_11, /**< \brief listen Time-out noise 11 */
235 IfxEray_ListenTimeOutNoise_12, /**< \brief listen Time-out noise 12 */
236 IfxEray_ListenTimeOutNoise_13, /**< \brief listen Time-out noise 13 */
237 IfxEray_ListenTimeOutNoise_14, /**< \brief listen Time-out noise 14 */
238 IfxEray_ListenTimeOutNoise_15, /**< \brief listen Time-out noise 15 */
239 IfxEray_ListenTimeOutNoise_16 /**< \brief listen Time-out noise 16 */
240 } IfxEray_ListenTimeOutNoise;
241
242 /** \brief Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM.
243 */
244 typedef enum
245 {
246 IfxEray_MaxSynchFrames_2 = 2, /**< \brief Maximum number of sync frames in a cluster are 2 */
247 IfxEray_MaxSynchFrames_3, /**< \brief Maximum number of sync frames in a cluster are 3 */
248 IfxEray_MaxSynchFrames_4, /**< \brief Maximum number of sync frames in a cluster are 4 */
249 IfxEray_MaxSynchFrames_5, /**< \brief Maximum number of sync frames in a cluster are 5 */
250 IfxEray_MaxSynchFrames_6, /**< \brief Maximum number of sync frames in a cluster are 6 */
251 IfxEray_MaxSynchFrames_7, /**< \brief Maximum number of sync frames in a cluster are 7 */
252 IfxEray_MaxSynchFrames_8, /**< \brief Maximum number of sync frames in a cluster are 8 */
253 IfxEray_MaxSynchFrames_9, /**< \brief Maximum number of sync frames in a cluster are 9 */
254 IfxEray_MaxSynchFrames_10, /**< \brief Maximum number of sync frames in a cluster are 10 */
255 IfxEray_MaxSynchFrames_11, /**< \brief Maximum number of sync frames in a cluster are 11 */
256 IfxEray_MaxSynchFrames_12, /**< \brief Maximum number of sync frames in a cluster are 12 */
257 IfxEray_MaxSynchFrames_13, /**< \brief Maximum number of sync frames in a cluster are 13 */
258 IfxEray_MaxSynchFrames_14, /**< \brief Maximum number of sync frames in a cluster are 14 */
259 IfxEray_MaxSynchFrames_15 /**< \brief Maximum number of sync frames in a cluster are 15 */
260 } IfxEray_MaxSynchFrames;
261
262 /** \brief Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD.
263 */
264 typedef enum
265 {
266 IfxEray_PocCommand_notAccepted = 0, /**< \brief command not accepted. */
267 IfxEray_PocCommand_config = 1, /**< \brief command to controller to enter CONFIG */
268 IfxEray_PocCommand_ready = 2, /**< \brief command to controller to enter READY. */
269 IfxEray_PocCommand_wakeup = 3, /**< \brief command to controller to enter WAKEUP */
270 IfxEray_PocCommand_run = 4, /**< \brief command to controller to enter RUN */
271 IfxEray_PocCommand_allSlots = 5, /**< \brief command to controller to enter ALL_SLOTS */
272 IfxEray_PocCommand_halt = 6, /**< \brief command to controller to enter HALT */
273 IfxEray_PocCommand_freeze = 7, /**< \brief command to controller to enter FREEZE */
274 IfxEray_PocCommand_sendMts = 8, /**< \brief command to controller to enter SEND_MTS */
275 IfxEray_PocCommand_coldStart = 9, /**< \brief command to controller to enter COLD_START */
276 IfxEray_PocCommand_reset = 10, /**< \brief command to controller to enter RESET */
277 IfxEray_PocCommand_monitor = 11, /**< \brief command to controller to enter MONITOR */
278 IfxEray_PocCommand_clearRam = 12 /**< \brief command to controller to enter CLEAR_RAM */
279 } IfxEray_PocCommand;
280
281 /** \brief State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS.
282 */
283 typedef enum
284 {
285 IfxEray_PocState_defaultConfig = 0, /**< \brief controller entered default config state */
286 IfxEray_PocState_ready = 1, /**< \brief controller entered ready state */
287 IfxEray_PocState_normalActive = 2, /**< \brief controller entered normal-active state */
288 IfxEray_PocState_normalPassive = 3, /**< \brief controller entered normal-passive state */
289 IfxEray_PocState_halt = 4, /**< \brief controller entered halt state */
290 IfxEray_PocState_monitor = 5, /**< \brief controller entered monitor state */
291 IfxEray_PocState_config = 15, /**< \brief controller entered config state */
292 IfxEray_PocState_wakeupStandby = 16, /**< \brief controller entered wakeup standby state */
293 IfxEray_PocState_wakeupListen = 17, /**< \brief controller entered wakeup-listen state */
294 IfxEray_PocState_wakeupSend = 18, /**< \brief controller entered wakeup-send state */
295 IfxEray_PocState_wakeupDetect = 19, /**< \brief controller entered wakeup-detection state */
296 IfxEray_PocState_startup = 32, /**< \brief controller entered startup state */
297 IfxEray_PocState_coldStartListen = 33, /**< \brief controller entered clod-start listen state */
298 IfxEray_PocState_collisionResolution = 34, /**< \brief controller entered collission-resolution state. */
299 IfxEray_PocState_consistencyCheck = 35, /**< \brief controller entered consistency-check. */
300 IfxEray_PocState_gap = 36, /**< \brief controller entered gap state. */
301 IfxEray_PocState_join = 37, /**< \brief controller entered join state. */
302 IfxEray_PocState_integrationCheck = 38, /**< \brief controller entered integration-check. */
303 IfxEray_PocState_integrationListen = 39, /**< \brief controller entered integration-listen state. */
304 IfxEray_PocState_integrationConsistencyCheck = 40, /**< \brief controller entered integration consistency check state */
305 IfxEray_PocState_initializeSchedule = 41, /**< \brief controller entered initialise schedule state */
306 IfxEray_PocState_staruAborted = 42, /**< \brief controller entered startup-abort state */
307 IfxEray_PocState_startupSucced = 43 /**< \brief controller entered startup succeed state. */
308 } IfxEray_PocState;
309
310 /** \brief Receiving channel, defined in MODULE_ERAY0.FRF.B.CH.
311 */
312 typedef enum
313 {
314 IfxEray_ReceiveChannel_both = 0, /**< \brief both channels for reception */
315 IfxEray_ReceiveChannel_b = 1, /**< \brief channel A for reception */
316 IfxEray_ReceiveChannel_a = 2, /**< \brief channel B for reception */
317 IfxEray_ReceiveChannel_none = 3 /**< \brief none channels for reception */
318 } IfxEray_ReceiveChannel;
319
320 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
321 * Definition in Ifx_ERAY.CLC.B.EDIS
322 */
323 typedef enum
324 {
325 IfxEray_SleepMode_enable = 0, /**< \brief enables sleep mode */
326 IfxEray_SleepMode_disable = 1 /**< \brief disables sleep mode */
327 } IfxEray_SleepMode;
328
329 /** \brief Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP.
330 */
331 typedef enum
332 {
333 IfxEray_StrobePosition_5 = 0, /**< \brief Sample count 5 for strobing */
334 IfxEray_StrobePosition_4 = 1, /**< \brief Sample count 4 for strobing */
335 IfxEray_StrobePosition_6 = 2 /**< \brief Sample count 6 for strobing */
336 } IfxEray_StrobePosition;
337
338 /** \brief OCDS Suspend Control (OCDS.SUS)
339 */
340 typedef enum
341 {
342 IfxEray_SuspendMode_none = 0, /**< \brief No suspend */
343 IfxEray_SuspendMode_hard = 1, /**< \brief Hard Suspend */
344 IfxEray_SuspendMode_soft = 2 /**< \brief Soft Suspend */
345 } IfxEray_SuspendMode;
346
347 /** \brief Transmission mode of Header, defined in MODULE_ERAY0.WRHS1.B.TXM.
348 */
349 typedef enum
350 {
351 IfxEray_TransmissionMode_continuous = 0, /**< \brief continuos transmission mode */
352 IfxEray_TransmissionMode_singleShot = 1 /**< \brief single transmission mode */
353 } IfxEray_TransmissionMode;
354
355 /** \brief Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM.
356 */
357 typedef enum
358 {
359 IfxEray_TransmissionSlotMode_all = 0, /**< \brief transmission in all slots. */
360 IfxEray_TransmissionSlotMode_single = 1 /**< \brief transmission in key slot. */
361 } IfxEray_TransmissionSlotMode;
362
363 /** \brief Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS.
364 */
365 typedef enum
366 {
367 IfxEray_WakeupChannel_a = 0, /**< \brief send wakeup channel pattern on channel A */
368 IfxEray_WakeupChannel_b = 1 /**< \brief send wakeup channel pattern on channel B */
369 } IfxEray_WakeupChannel;
370
371 /** \} */
372
373 /******************************************************************************/
374 /*-----------------------------Data Structures--------------------------------*/
375 /******************************************************************************/
376
377 /** \addtogroup IfxLld_Eray_Std_Structures
378 * \{ */
379 /** \brief Header section in a frame.
380 */
381 typedef struct
382 {
383 uint16 frameId; /**< \brief slot ID of the selected Message Buffer. */
384 uint8 cycleCode; /**< \brief the cycle set used for cycle counter filtering. */
385 boolean channelAFiltered; /**< \brief channel A serves as a control for transmit and filter for receive buffers. */
386 boolean channelBFiltered; /**< \brief channel B serves as a control for transmit and filter for receive buffers. */
387 IfxEray_BufferDirection bufferDirection; /**< \brief selects buffer as a transmit buffer or as a receive buffer. */
388 boolean transmitPayloadIndicatior; /**< \brief weather payload indicator is set or not. */
389 IfxEray_TransmissionMode transmissionMode; /**< \brief transmission mode of Header. */
390 boolean bufferServiceEnabled; /**< \brief wether buffer service request is enabled or not. */
391 uint8 payloadLength; /**< \brief length of data section. */
392 uint16 dataPointer; /**< \brief pointer to the data section of message buffer in RAM. */
393 boolean startupFrameIndicator; /**< \brief whether startup frame is indicated or not. */
394 boolean syncFrameIndicator; /**< \brief whether sync frame is indicated or not. */
395 } IfxEray_Header;
396
397 /** \brief Received header in a frame.
398 */
399 typedef struct
400 {
401 uint16 frameId : 11; /**< \brief received frame id. */
402 uint8 payloadLength : 7; /**< \brief received payload length. */
403 uint16 headerCrc : 11; /**< \brief received header crc. */
404 uint8 nullFrameIndicator : 1; /**< \brief 0 : no data frame received; 1: atleast one data frame received. */
405 uint8 syncFrame : 1; /**< \brief 0 : received frame is not a synch frame ; 1 : receive frame is a synch frame. */
406 uint8 startupFrame : 1; /**< \brief 0 : received frame is not a startup frame ; 1 : receive frame is a startup frame. */
407 uint8 cycleNumber : 7; /**< \brief cycle number in which frame is received. */
408 uint8 payloadPreambleIndicator : 1; /**< \brief 1 : received payload segment has network management and message id or not; 0 : It hasn't. */
409 } IfxEray_ReceivedHeader;
410
411 /** \brief Transmit control structure.
412 */
413 typedef struct
414 {
415 boolean headerTransfered; /**< \brief whether header is transfered from input buffers to Message RAM or not. */
416 boolean dataTransfered; /**< \brief whether data is transfered from input buffers to Message RAM or not. */
417 boolean transferRequested; /**< \brief transmit buffer released for transmission or not. */
418 uint8 bufferIndex; /**< \brief buffer index in the Message RAM. */
419 } IfxEray_SlotConfig;
420
421 /** \} */
422
423 /** \addtogroup IfxLld_Eray_Std_Interrupt
424 * \{ */
425
426 /******************************************************************************/
427 /*-------------------------Inline Function Prototypes-------------------------*/
428 /******************************************************************************/
429
430 /** \brief Clears the error flag requested.
431 * \param eray pointer to ERAY module registers.
432 * \param errorFlag error flag to be cleared.
433 * \return None
434 */
435 IFX_INLINE void IfxEray_clearErrorFlag(Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag);
436
437 /** \brief Clears the status flag requested.
438 * \param eray pointer to ERAY module registers.
439 * \param statusFlag status flag to be cleared.
440 * \return None
441 */
442 IFX_INLINE void IfxEray_clearStatusFlag(Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag);
443
444 /** \brief Gets the error interrupt flags.
445 * \param eray pointer to ERAY module registers.
446 * \return error interrupt flags.
447 */
448 IFX_INLINE Ifx_ERAY_EIR IfxEray_getErrorInterrupts(Ifx_ERAY *eray);
449
450 /** \brief Gets the IBUSY service request.
451 * \param eray pointer to ERAY module registers.
452 * \return address of IBUSY service request value.
453 */
454 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInputBufferBusySrcPtr(Ifx_ERAY *eray);
455
456 /** \brief Gets the INT0 service request.
457 * \param eray pointer to ERAY module registers.
458 * \return address of INT0 service request value.
459 */
460 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInterruptLine0SrcPtr(Ifx_ERAY *eray);
461
462 /** \brief Gets the INT1 service request.
463 * \param eray pointer to ERAY module registers.
464 * \return address of INT1 service request value.
465 */
466 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInterruptLine1SrcPtr(Ifx_ERAY *eray);
467
468 /** \brief Gets the message buffers interrupt status.
469 * \param eray pointer to ERAY module registers.
470 * \param messageBuffer message buffer to which interrupt status be checked.
471 * \return message buffer interrupt status.
472 */
473 IFX_INLINE boolean IfxEray_getMessageBufferInterruptStatus(Ifx_ERAY *eray, uint8 messageBuffer);
474
475 /** \brief Gets the MBSC0 service request.
476 * \param eray pointer to ERAY module registers.
477 * \return address of MBSC0 service request value.
478 */
479 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getMessageBufferStatus0SrcPtr(Ifx_ERAY *eray);
480
481 /** \brief Gets the MBSC1 service request.
482 * \param eray pointer to ERAY module registers.
483 * \return address of MBSC1 service request value.
484 */
485 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getMessageBufferStatus1SrcPtr(Ifx_ERAY *eray);
486
487 /** \brief Gets the NDAT0 service request.
488 * \param eray pointer to ERAY module registers.
489 * \return address of NDAT0 service request value.
490 */
491 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getNewDataInterrupt0SrcPtr(Ifx_ERAY *eray);
492
493 /** \brief Gets the NDAT1 service request.
494 * \param eray pointer to ERAY module registers.
495 * \return address of NDAT1 service request value.
496 */
497 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getNewDataInterrupt1SrcPtr(Ifx_ERAY *eray);
498
499 /** \brief Gets the new data interrupt buffers status.
500 * \param eray pointer to ERAY module registers.
501 * \param ndat message buffer number configured to which ndat occurs.
502 * \return ndat interrupt buffer.
503 */
504 IFX_INLINE boolean IfxEray_getNewDataInterruptStatus(Ifx_ERAY *eray, uint8 ndat);
505
506 /** \brief Gets the OBUSY service request.
507 * \param eray pointer to ERAY module registers.
508 * \return address of OBUSY service request value.
509 */
510 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getOutputBufferBusySrcPtr(Ifx_ERAY *eray);
511
512 /** \brief Gets the status interrupt flags.
513 * \param eray pointer to ERAY module registers.
514 * \return status interrupt flags.
515 */
516 IFX_INLINE Ifx_ERAY_SIR IfxEray_getStatusInterrupts(Ifx_ERAY *eray);
517
518 /** \brief Gets the TINT0 service request.
519 * \param eray pointer to ERAY module registers.
520 * \return address of TINT0 service request value.
521 */
522 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getTimerInterrupt0SrcPtr(Ifx_ERAY *eray);
523
524 /** \brief Gets the TINT1 service request.
525 * \param eray pointer to ERAY module registers.
526 * \return address of TINT1 service request value.
527 */
528 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getTimerInterrupt1SrcPtr(Ifx_ERAY *eray);
529
530 /******************************************************************************/
531 /*-------------------------Global Function Prototypes-------------------------*/
532 /******************************************************************************/
533
534 /** \brief Clears all the error flags.
535 * \param eray pointer to ERAY module registers.
536 * \return None
537 */
538 IFX_EXTERN void IfxEray_clearAllFlags(Ifx_ERAY *eray);
539
540 /** \brief Enables all the Interrupt lines.
541 * \param eray pointer to ERAY module registers.
542 * \return None
543 */
544 IFX_EXTERN void IfxEray_enableInterruptLines(Ifx_ERAY *eray);
545
546 /** \brief Selects between MBSC0 and MBSC1 interrupt destination
547 * \param eray pointer to ERAY module registers.
548 * \param messageBuffer message buffer interrupt which should be configured
549 * \param messageBufferDestination selects MBSC0 or MBSC1 interrupt output
550 * \return None
551 */
552 IFX_EXTERN void IfxEray_setMessageBufferInterruptDestination(Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination);
553
554 /** \brief Selects between NDAT0 and NDAT1 interrupt destination
555 * \param eray pointer to ERAY module registers.
556 * \param ndat NDAT interrupt which should be configured
557 * \param ndatDestination selects NDAT0 or NDAT1 interrupt output
558 * \return None
559 */
560 IFX_EXTERN void IfxEray_setNewDataInterruptDestination(Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination);
561
562 /** \} */
563
564 /** \addtogroup IfxLld_Eray_Std_IO
565 * \{ */
566
567 /******************************************************************************/
568 /*-------------------------Inline Function Prototypes-------------------------*/
569 /******************************************************************************/
570
571 /** \brief Initialises a RX pin.
572 * \param rx the RX Pin which should be configured.
573 * \param rxMode the pin input mode which should be configured.
574 * \return None
575 */
576 IFX_INLINE void IfxEray_initRxPin(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode);
577
578 /** \brief Initializes a TX Enable output.
579 * \param txEn the TX Enable Pin which should be configured.
580 * \param txEnMode the pin output mode which should be configured.
581 * \param padDriver the pad driver mode which should be configured.
582 * \return None
583 */
584 IFX_INLINE void IfxEray_initTxEnPin(const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver);
585
586 /** \brief Initializes a TX output.
587 * \param tx the TX Pin which should be configured.
588 * \param txMode the pin output mode which should be configured.
589 * \param padDriver the pad driver mode which should be configured.
590 * \return None
591 */
592 IFX_INLINE void IfxEray_initTxPin(const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver);
593
594 /** \} */
595
596 /** \addtogroup IfxLld_Eray_Std_Module
597 * \{ */
598
599 /******************************************************************************/
600 /*-------------------------Inline Function Prototypes-------------------------*/
601 /******************************************************************************/
602
603 /** \brief Disables the ERAY module.
604 * \param eray pointer to ERAY module registers.
605 * \return None
606 */
607 IFX_INLINE void IfxEray_disableModule(Ifx_ERAY *eray);
608
609 /** \brief Enables the ERAY module.
610 * \param eray pointer to ERAY module registers.
611 * \return None
612 */
613 IFX_INLINE void IfxEray_enableModule(Ifx_ERAY *eray);
614
615 /** \brief Returns the module's suspend state.
616 * TRUE :if module is suspended.
617 * FALSE:if module is not yet suspended.
618 * \param eray Pointer to ERAY module registers
619 * \return Suspend status (TRUE / FALSE)
620 */
621 IFX_INLINE boolean IfxEray_isModuleSuspended(Ifx_ERAY *eray);
622
623 /** \brief Sets the sensitivity of the module to sleep signal
624 * \param eray pointer to ERAY registers
625 * \param mode mode selection (enable/disable)
626 * \return None
627 */
628 IFX_INLINE void IfxEray_setSleepMode(Ifx_ERAY *eray, IfxEray_SleepMode mode);
629
630 /******************************************************************************/
631 /*-------------------------Global Function Prototypes-------------------------*/
632 /******************************************************************************/
633
634 /**
635 * \param eray Resource index of the ERAY
636 * \return ERAY module register address
637 */
638 IFX_EXTERN Ifx_ERAY *IfxEray_getAddress(IfxEray_Index eray);
639
640 /** \brief API to get the resource index of the ERAY specified.
641 * \param eray Pointer to the ERAY HW module (register memory map)
642 * \return Resource index of the ERAY
643 */
644 IFX_EXTERN IfxEray_Index IfxEray_getIndex(Ifx_ERAY *eray);
645
646 /** \brief Resets the ERAY kernel.
647 * \param eray pointer to ERAY module registers.
648 * \return None
649 */
650 IFX_EXTERN void IfxEray_resetModule(Ifx_ERAY *eray);
651
652 /** \} */
653
654 /** \addtogroup IfxLld_Eray_Std_Status
655 * \{ */
656
657 /******************************************************************************/
658 /*-------------------------Inline Function Prototypes-------------------------*/
659 /******************************************************************************/
660
661 /** \brief Gets the FIFO status.
662 * \param eray pointer to ERAY module registers.
663 * \return FIFO status.
664 */
665 IFX_INLINE Ifx_ERAY_FSR IfxEray_getFifoStatus(Ifx_ERAY *eray);
666
667 /** \brief Gets the Input Buffer Host Busy status.
668 * \param eray pointer to ERAY module registers.
669 * \return TRUE if Host is Busy otherwise FALSE.
670 */
671 IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus(Ifx_ERAY *eray);
672
673 /** \brief Gets the Input Buffer Shadow status.
674 * \param eray pointer to ERAY module registers.
675 * \return TRUE if busy otherwise FALSE
676 */
677 IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus(Ifx_ERAY *eray);
678
679 /** \brief Gets the output buffer index.
680 * \param eray pointer to ERAY module registers.
681 * \return output buffer index.
682 */
683 IFX_INLINE uint8 IfxEray_getOutputBuffer(Ifx_ERAY *eray);
684
685 /** \brief Gets the Output Buffer Shadow status.
686 * \param eray pointer to ERAY module registers.
687 * \return TRUE if busy otherwise FALSE
688 */
689 IFX_INLINE boolean IfxEray_getOutputBufferBusyShadowStatus(Ifx_ERAY *eray);
690
691 /** \brief Gets the current POC state.
692 * \param eray pointer to ERAY module registers.
693 * \return current POC state.
694 */
695 IFX_INLINE IfxEray_PocState IfxEray_getPocState(Ifx_ERAY *eray);
696
697 /** \brief Gets the received wakeup pattern channel.
698 * \param eray pointer to ERAY module registers.
699 * \return received wakeup pattern channel.
700 */
701 IFX_INLINE IfxEray_WakeupChannel IfxEray_getWakeupPatternReceivedChannel(Ifx_ERAY *eray);
702
703 /** \brief Waits until the controller enters required POC state.
704 * \param eray pointer to ERAY module registers.
705 * \param pocState POC state upto which controller waits.
706 * \return None
707 */
708 IFX_INLINE void IfxEray_waitForPocState(Ifx_ERAY *eray, IfxEray_PocState pocState);
709
710 /******************************************************************************/
711 /*-------------------------Global Function Prototypes-------------------------*/
712 /******************************************************************************/
713
714 /** \brief Changes the Commmunication Controller state.
715 * \param eray pointer to ERAY module registers.
716 * \param pocCommand POC command which triggers the Controller state.
717 * \return TRUE if command accepted otherwise FALSE.
718 */
719 IFX_EXTERN boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand);
720
721 /** \brief Sets the POC state to Ready state.
722 * \param eray pointer to ERAY module registers.
723 * \return None
724 */
725 IFX_EXTERN void IfxEray_setPocReady(Ifx_ERAY *eray);
726
727 /** \} */
728
729 /** \addtogroup IfxLld_Eray_Std_Configuration
730 * \{ */
731
732 /******************************************************************************/
733 /*-------------------------Inline Function Prototypes-------------------------*/
734 /******************************************************************************/
735
736 /** \brief request to receive header section from message buffer.
737 * \param eray pointer to ERAY module registers.
738 * \param headerReceived whether header is received or not.
739 * \return None
740 */
741 IFX_INLINE void IfxEray_receiveHeader(Ifx_ERAY *eray, boolean headerReceived);
742
743 /** \brief sets the bit to send header in frame.
744 * \param eray pointer to ERAY module registers.
745 * \param headerTransfered whether header transfered or not.
746 * \return None
747 */
748 IFX_INLINE void IfxEray_sendHeader(Ifx_ERAY *eray, boolean headerTransfered);
749
750 /** \brief Sets number of cycle pairs for Active state.
751 * \param eray pointer to ERAY module registers.
752 * \param numberOfCyclePairsForActive number of cycle pairs for Active state.
753 * \return None
754 */
755 IFX_INLINE void IfxEray_setActiveCyclePairs(Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive);
756
757 /** \brief Sets auto delays between input, output buffers and message RAM
758 * \param eray pointer to ERAY module registers.
759 * \return None
760 */
761 IFX_INLINE void IfxEray_setAutoDelayBuffers(Ifx_ERAY *eray);
762
763 /** \brief Sets baudrate on Flexray bus.
764 * \param eray pointer to ERAY module registers.
765 * \param baudrate baudrate on flexray bus.
766 * \return None
767 */
768 IFX_INLINE void IfxEray_setBaudrate(Ifx_ERAY *eray, IfxEray_Baudrate baudrate);
769
770 /** \brief Sets secured buffers in message RAM.
771 * \param eray pointer to ERAY module registers.
772 * \param secureValue secure value.
773 * \return None
774 */
775 IFX_INLINE void IfxEray_setBufferReconfigSecure(Ifx_ERAY *eray, uint8 secureValue);
776
777 /** \brief Sets channel A initial offstes.
778 * \param eray pointer to ERAY module registers.
779 * \param channelAMicrotickInitialOffset difference between reference points on channel A in microticks.
780 * \param channelAMacrotickInitialOffset difference between reference points on channel A in macroticks.
781 * \return None
782 */
783 IFX_INLINE void IfxEray_setChannelAInitialOffsets(Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset);
784
785 /** \brief Sets channel B initial offstes.
786 * \param eray pointer to ERAY module registers.
787 * \param channelBMicrotickInitialOffset difference between reference points on channel B in microticks.
788 * \param channelBMacrotickInitialOffset difference between reference points on channel B in macroticks.
789 * \return None
790 */
791 IFX_INLINE void IfxEray_setChannelBInitialOffsets(Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset);
792
793 /** \brief Sets receive delays on channels.
794 * \param eray pointer to ERAY module registers.
795 * \param channelAReceptionDelay reception delay on channel A.
796 * \param channelBReceptionDelay reception delay on channel B.
797 * \return None
798 */
799 IFX_INLINE void IfxEray_setChannelsReceiveDelay(Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay);
800
801 /** \brief Sets clock correction cycles for Passive and Halt.
802 * \param eray pointer to ERAY module registers.
803 * \param clockCorrectionCyclesPassive maximum number of cycles missing clock correction leading for passive state.
804 * \param clockCorrectionCyclesHalt maximum number of cycles missing clock correction leading for halt state.
805 * \return None
806 */
807 IFX_INLINE void IfxEray_setClockCorrectionCycles(Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt);
808
809 /** \brief lead to halt state in clock synch error.
810 * \param eray pointer to ERAY module registers.
811 * \param clockSyncErrorHalt whether to enter halt in clock synch error or not.
812 * \return None
813 */
814 IFX_INLINE void IfxEray_setClockSynchErrorHalt(Ifx_ERAY *eray, boolean clockSyncErrorHalt);
815
816 /** \brief Sets cluster drift values.
817 * \param eray pointer to ERAY module registers.
818 * \param clusterDrift cluster drift damping value used in clock synchronization.
819 * \param maxDriftOffset maximum drift offset between two nodes.
820 * \return None
821 */
822 IFX_INLINE void IfxEray_setClusterDriftValues(Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset);
823
824 /** \brief Sets cluster startup deviation.
825 * \param eray pointer to ERAY module registers.
826 * \param acceptedStartupDeviation deviation for startup Frames during integration.
827 * \return None
828 */
829 IFX_INLINE void IfxEray_setClusterStartupDeviation(Ifx_ERAY *eray, uint16 acceptedStartupDeviation);
830
831 /** \brief Sets CAS symbol window duration.
832 * \param eray pointer to ERAY module registers.
833 * \param collisionAvoidanceDuration accepted duration of CAS symbol.
834 * \return None
835 */
836 IFX_INLINE void IfxEray_setCollisionAvoidanceDuration(Ifx_ERAY *eray, uint8 collisionAvoidanceDuration);
837
838 /** \brief sets duration of the communication cycle in Macroticks.
839 * \param eray pointer to ERAY module registers.
840 * \param macroticks duration of the communication cycle in Macroticks.
841 * \return None
842 */
843 IFX_INLINE void IfxEray_setCycleDurationMacroticks(Ifx_ERAY *eray, uint16 macroticks);
844
845 /** \brief sets duration of the communication cycle in Microticks.
846 * \param eray pointer to ERAY module registers.
847 * \param microticks duration of the communication cycle in Microticks.
848 * \return None
849 */
850 IFX_INLINE void IfxEray_setCycleDurationMicroticks(Ifx_ERAY *eray, uint32 microticks);
851
852 /** \brief Sets decoding correction value.
853 * \param eray pointer to ERAY module registers.
854 * \param decodingCorrection decoding correction value.
855 * \return None
856 */
857 IFX_INLINE void IfxEray_setDecodingCorrectionValue(Ifx_ERAY *eray, uint8 decodingCorrection);
858
859 /** \brief Sets dynamic slots count and length.
860 * \param eray pointer to ERAY module registers.
861 * \param dynamicSlotLength duration of dynamic slot in macroticks.
862 * \param dynamicSlotCount number of dynamic slots in a communication cycle.
863 * \param idleDynamicSlots duration of dynamic slot idle phase.
864 * \return None
865 */
866 IFX_INLINE void IfxEray_setDynamicSlots(Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots);
867
868 /** \brief Sets external correction controls.
869 * \param eray pointer to ERAY module registers.
870 * \param externalOffset External offset correction control.
871 * \param externalRate External rate correction control.
872 * \return None
873 */
874 IFX_INLINE void IfxEray_setExternalCorrectionControl(Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate);
875
876 /** \brief Sets external correction values.
877 * \param eray pointer to ERAY module registers.
878 * \param externalOffsetCorrection external clock offset correction value.
879 * \param externalRateCorrection external clock rate correction value.
880 * \return None
881 */
882 IFX_INLINE void IfxEray_setExternalCorrectionValues(Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection);
883
884 /** \brief Sets FIFO buffer start idex.
885 * \param eray pointer to ERAY module registers.
886 * \param fifoBufferStartIndex FIFO buffer start idex.
887 * \return None
888 */
889 IFX_INLINE void IfxEray_setFifoBufferStartIndex(Ifx_ERAY *eray, uint8 fifoBufferStartIndex);
890
891 /** \brief Sets FIFO filter configurations.
892 * \param eray pointer to ERAY module registers.
893 * \param rejectedFrameId rejected frameId by FIFO.
894 * \param filteredCycleNumber filtered cycle number.
895 * \param fifoNullFramesRejected null frames rejection selection.
896 * \param frameIdFilter filtered frameid by FIFO.
897 * \return None
898 */
899 IFX_INLINE void IfxEray_setFifoFilterConfigurations(Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter);
900
901 /** \brief Sets FIFO configurations.
902 * \param eray pointer to ERAY module registers.
903 * \param receiveChannel FIFO receive channel.
904 * \param staticFifoDisabled static FIFO selection.
905 * \param fifoDepth FIFO depth.
906 * \return None
907 */
908 IFX_INLINE void IfxEray_setFifoMessageBufferConfigurations(Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth);
909
910 /** \brief Sets first dynamic buffer.
911 * \param eray pointer to ERAY module registers.
912 * \param firstDynamicBuffer first dynamic buffer.
913 * \return None
914 */
915 IFX_INLINE void IfxEray_setFirstDynamicBuffer(Ifx_ERAY *eray, uint8 firstDynamicBuffer);
916
917 /** \brief Sets startup or wakeup listen timeouts.
918 * \param eray pointer to ERAY module registers.
919 * \param listenTimeOut wakeup or startup listen timeout in microticks.
920 * \param listenTimeOutNoise upper limit for startup or wakeup listen timeout in presence of noise.
921 * \return None
922 */
923 IFX_INLINE void IfxEray_setListenTimeOuts(Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise);
924
925 /** \brief Sets the maximum cold start attempts for active state.
926 * \param eray pointer to ERAY module registers.
927 * \param maxColdStartAttempts maximum number of attempts that a cold start node allows.
928 * \return None
929 */
930 IFX_INLINE void IfxEray_setMaxColdStartAttempts(Ifx_ERAY *eray, uint8 maxColdStartAttempts);
931
932 /** \brief Sets max limit correction values.
933 * \param eray pointer to ERAY module registers.
934 * \param maxOffsetCorrection maximum offset correction.
935 * \param maxRateCorrection maximum rate correction.
936 * \return None
937 */
938 IFX_INLINE void IfxEray_setMaxCorrectionValues(Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection);
939
940 /** \brief Sets maximum synch frames in a cluster.
941 * \param eray pointer to ERAY module registers.
942 * \param maxSyncFrames maximum synch frames in a cluster.
943 * \return None
944 */
945 IFX_INLINE void IfxEray_setMaxSynchFrames(Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames);
946
947 /** \brief Sets number of message buffers.
948 * \param eray pointer to ERAY module registers.
949 * \param numberOfMessageBuffers number of message buffers.
950 * \return None
951 */
952 IFX_INLINE void IfxEray_setMessageBufferCount(Ifx_ERAY *eray, uint8 numberOfMessageBuffers);
953
954 /** \brief Sets Message Handler configurations.
955 * \param eray pointer to ERAY module registers.
956 * \param staticFramepayload payload length of static frames in double bytes.
957 * \param latestTransmissionStart dynamic slots befor transmission of inhibit frame in dynamic segment.
958 * \return None
959 */
960 IFX_INLINE void IfxEray_setMessageHandlerConfigurations(Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart);
961
962 /** \brief Sets network start Idle time.
963 * \param eray pointer to ERAY module registers.
964 * \param networkStartIdleTime starting point of Network Idle Time Phase.
965 * \return None
966 */
967 IFX_INLINE void IfxEray_setNetworkStartIdleTime(Ifx_ERAY *eray, uint16 networkStartIdleTime);
968
969 /** \brief Sets network management vector length.
970 * \param eray pointer to ERAY module registers.
971 * \param networkVectorLength length of network management vector.
972 * \return None
973 */
974 IFX_INLINE void IfxEray_setNetworkVectorLength(Ifx_ERAY *eray, uint32 networkVectorLength);
975
976 /** \brief Sets channels connected to node.
977 * \param eray pointer to ERAY module registers.
978 * \param channelAConnectedNode whether node connected to channel A or not.
979 * \param channelBConnectedNode whether node connected to channel B or not.
980 * \return None
981 */
982 IFX_INLINE void IfxEray_setNodeChannels(Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode);
983
984 /** \brief Sets offset correction starting point.
985 * \param eray pointer to ERAY module registers.
986 * \param correctionOffset offset correction start point.
987 * \return None
988 */
989 IFX_INLINE void IfxEray_setOffsetCorrection(Ifx_ERAY *eray, uint16 correctionOffset);
990
991 /** \brief requests to receive the frame.
992 * \param eray pointer to ERAY module registers.
993 * \param receiveRequested whether frame to be received or not.
994 * \return None
995 */
996 IFX_INLINE void IfxEray_setReceiveRequest(Ifx_ERAY *eray, boolean receiveRequested);
997
998 /** \brief Sets receive wakeup times.
999 * \param eray pointer to ERAY module registers.
1000 * \param receiveWakeupTestDuration duration of receive wakeup pattern.
1001 * \param receiveWakeupIdleTime duration of receive wakeup idle time.
1002 * \param receiveWakeupLowTime duration of receive wakeup low time.
1003 * \return None
1004 */
1005 IFX_INLINE void IfxEray_setReceiveWakeupTimes(Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime);
1006
1007 /** \brief sets buffer number in which frame is received.
1008 * \param eray pointer to ERAY module registers.
1009 * \param bufferIndex buffer number in which frame is received.
1010 * \return None
1011 */
1012 IFX_INLINE void IfxEray_setRxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex);
1013
1014 /** \brief Sets slots action points.
1015 * \param eray pointer to ERAY module registers.
1016 * \param staticActionPoint static slots and symbol window action point.
1017 * \param dynamicActionPoint dynamic slots action point.
1018 * \return None
1019 */
1020 IFX_INLINE void IfxEray_setSlotActionPoints(Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint);
1021
1022 /** \brief Sets static slots count and length.
1023 * \param eray pointer to ERAY module registers.
1024 * \param staticSlotLength duration of static slot in macroticks.
1025 * \param staticSlotsCount number of static slots in a communication cycle.
1026 * \return None
1027 */
1028 IFX_INLINE void IfxEray_setStaticSlots(Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount);
1029
1030 /** \brief Sets sample point for strobing.
1031 * \param eray pointer to ERAY module registers.
1032 * \param strobePosition strobing sample count.
1033 * \return None
1034 */
1035 IFX_INLINE void IfxEray_setStrobePosition(Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition);
1036
1037 /** \brief Sets channels which transmits symbols.
1038 * \param eray pointer to ERAY module registers.
1039 * \param channelASymbolTransmitted whether symbol is transmitted in Channel A or not.
1040 * \param channelBSymbolTransmitted whether symbol is transmitted in Channel B or not.
1041 * \return None
1042 */
1043 IFX_INLINE void IfxEray_setSymbolChannels(Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted);
1044
1045 /** \brief Sets the transmit slot mode.
1046 * \param eray pointer to ERAY module registers.
1047 * \param transmissionSlotMode transmission slot mode.
1048 * \return None
1049 */
1050 IFX_INLINE void IfxEray_setTransmissionSlotMode(Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode);
1051
1052 /** \brief Sets transmission start time duration.
1053 * \param eray pointer to ERAY module registers.
1054 * \param transmissionStartTime transmission start time.
1055 * \return None
1056 */
1057 IFX_INLINE void IfxEray_setTransmissionStartTime(Ifx_ERAY *eray, uint8 transmissionStartTime);
1058
1059 /** \brief Sets transfer request to send frame.
1060 * \param eray pointer to ERAY module registers.
1061 * \param transferRequested whether transfer requested or not.
1062 * \return None
1063 */
1064 IFX_INLINE void IfxEray_setTransmitRequest(Ifx_ERAY *eray, boolean transferRequested);
1065
1066 /** \brief Sets transmit wakeup times.
1067 * \param eray pointer to ERAY module registers.
1068 * \param transmitWakeupRepetitions transmission wakeup repetitions.
1069 * \param transmitWakeupIdleTime duration of transmit wakeup idle time.
1070 * \param transmitWakeupLowTime duration of transmit wakeup low time.
1071 * \return None
1072 */
1073 IFX_INLINE void IfxEray_setTransmitWakeupTimes(Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime);
1074
1075 /** \brief Configures transmitted frames for startup and synchronization.
1076 * \param eray pointer to ERAY module registers.
1077 * \param startupFrameTransmitted whether startup Frame transmitted or not.
1078 * \param synchFrameTransmitted whether synch Frame transmitted or not.
1079 * \return None
1080 */
1081 IFX_INLINE void IfxEray_setTransmittedFrames(Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted);
1082
1083 /** \brief Sets the transmit buffer number.
1084 * \param eray pointer to ERAY module registers.
1085 * \param bufferIndex buffer number in which frame is sent.
1086 * \return None
1087 */
1088 IFX_INLINE void IfxEray_setTxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex);
1089
1090 /** \brief Swaps the shadow and Host output registers.
1091 * \param eray pointer to ERAY module registers.
1092 * \param swapRequested whether swap is requested or not.
1093 * \return None
1094 */
1095 IFX_INLINE void IfxEray_setViewData(Ifx_ERAY *eray, boolean swapRequested);
1096
1097 /** \brief Sets the cluster wakeup channel.
1098 * \param eray pointer to ERAY module registers.
1099 * \param wakeupPatternChannel cluster wakeup pattern channel.
1100 * \return None
1101 */
1102 IFX_INLINE void IfxEray_setWakeupPatternChannel(Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel);
1103
1104 /** \} */
1105
1106 /** \addtogroup IfxLld_Eray_Std_Operative
1107 * \{ */
1108
1109 /******************************************************************************/
1110 /*-------------------------Inline Function Prototypes-------------------------*/
1111 /******************************************************************************/
1112
1113 /** \brief requests to receive data from message buffer.
1114 * \param eray pointer to ERAY module registers.
1115 * \param dataReceived whether data to be received or not.
1116 * \return None
1117 */
1118 IFX_INLINE void IfxEray_receiveData(Ifx_ERAY *eray, boolean dataReceived);
1119
1120 /** \brief sets the bit to send data in frame.
1121 * \param eray pointer to ERAY module registers.
1122 * \param dataTransfered whether data transfered or not.
1123 * \return None
1124 */
1125 IFX_INLINE void IfxEray_sendData(Ifx_ERAY *eray, boolean dataTransfered);
1126
1127 /******************************************************************************/
1128 /*-------------------------Global Function Prototypes-------------------------*/
1129 /******************************************************************************/
1130
1131 /** \brief Calculate and returns the CRC for frame.
1132 * \param payloadLength payload length configured for frame.
1133 * \param frameId slot id
1134 * \param startupFrameIndicator whether startup frame is indicated or not.
1135 * \param syncFrameIndicator whether sync frame is indicated or not.
1136 * \return calculated CRC value.
1137 */
1138 IFX_EXTERN uint16 IfxEray_calcHeaderCrc(uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator);
1139
1140 /** \brief Reads the received data from output registers.
1141 * \param eray pointer to ERAY module registers.
1142 * \param data pointer to received data buffer.
1143 * \param payloadLength payload length received in a frame.
1144 * \return None
1145 */
1146 IFX_EXTERN void IfxEray_readData(Ifx_ERAY *eray, uint32 *data, uint8 payloadLength);
1147
1148 /** \brief Reads header and data from output buffers.
1149 * \param eray pointer to ERAY module registers.
1150 * \param header header received in a frame.
1151 * \param data data received in a frame.
1152 * \param maxPayloadLength maximum payload length received in a frame.
1153 * \return None
1154 */
1155 IFX_EXTERN void IfxEray_readFrame(Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength);
1156
1157 /** \brief Writes header and data to Input buffers and set the slots.
1158 * \param eray pointer to ERAY module registers.
1159 * \param header Header section of message buffer.
1160 * \param data data section of message buffer.
1161 * \param slotConfig pointer slot allocation configuration structure.
1162 * \return None
1163 */
1164 IFX_EXTERN void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig);
1165
1166 /** \brief Writes data section of a frame to input data registers.
1167 * \param eray pointer to ERAY module registers.
1168 * \param data data segment in a frame.
1169 * \param payloadLength payload length configured for slot buffer.
1170 * \return None
1171 */
1172 IFX_EXTERN void IfxEray_writeData(Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength);
1173
1174 /** \} */
1175
1176 /******************************************************************************/
1177 /*-------------------------Inline Function Prototypes-------------------------*/
1178 /******************************************************************************/
1179
1180 /** \brief Gets the FIFO index.
1181 * \param eray pointer to ERAY module registers.
1182 * \return FIFO buffer index.
1183 */
1184 IFX_INLINE uint8 IfxEray_getFifoIndex(Ifx_ERAY *eray);
1185
1186 /** \brief Configure the Module to Hard/Soft suspend mode.
1187 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
1188 * \param eray Pointer to ERAY module registers
1189 * \param mode Module suspend mode
1190 * \return None
1191 */
1192 IFX_INLINE void IfxEray_setSuspendMode(Ifx_ERAY *eray, IfxEray_SuspendMode mode);
1193
1194 /** \brief Provides functionality for both setting of pin direction as input and configuring pad driver.
1195 * \param rx the RX Pin which should be configured.
1196 * \param rxMode the pin input mode which should be configured.
1197 * \param padDriver Pad Driver Configuration
1198 * \return None
1199 */
1200 IFX_INLINE void IfxEray_initRxPinWithPadLevel(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode, IfxPort_PadDriver padDriver);
1201
1202 /******************************************************************************/
1203 /*---------------------Inline Function Implementations------------------------*/
1204 /******************************************************************************/
1205
1206 IFX_INLINE void IfxEray_clearErrorFlag(Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag)
1207 {
1208 eray->EIR.U = errorFlag;
1209 }
1210
1211
1212 IFX_INLINE void IfxEray_clearStatusFlag(Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag)
1213 {
1214 eray->SIR.U = statusFlag;
1215 }
1216
1217
1218 IFX_INLINE void IfxEray_disableModule(Ifx_ERAY *eray)
1219 {
1220 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1221 IfxScuWdt_clearCpuEndinit(passwd);
1222 //disable the module
1223 eray->CLC.B.DISR = 1;
1224 IfxScuWdt_setCpuEndinit(passwd);
1225 }
1226
1227
1228 IFX_INLINE void IfxEray_enableModule(Ifx_ERAY *eray)
1229 {
1230 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1231 IfxScuWdt_clearCpuEndinit(passwd);
1232 // Run Mode Clock divider to 1
1233 //enable the module
1234 eray->CLC.U = 0x00000100;
1235
1236 // ensure that write access finished before leaving this function
1237 if (eray->CLC.U)
1238 {}
1239
1240 IfxScuWdt_setCpuEndinit(passwd);
1241 }
1242
1243
1244 IFX_INLINE Ifx_ERAY_EIR IfxEray_getErrorInterrupts(Ifx_ERAY *eray)
1245 {
1246 Ifx_ERAY_EIR interruptFlags;
1247 interruptFlags.U = eray->EIR.U;
1248 return interruptFlags;
1249 }
1250
1251
1252 IFX_INLINE uint8 IfxEray_getFifoIndex(Ifx_ERAY *eray)
1253 {
1254 return eray->MRC.B.FFB;
1255 }
1256
1257
1258 IFX_INLINE Ifx_ERAY_FSR IfxEray_getFifoStatus(Ifx_ERAY *eray)
1259 {
1260 Ifx_ERAY_FSR fifoStatus;
1261 fifoStatus.U = eray->FSR.U;
1262 return fifoStatus;
1263 }
1264
1265
1266 IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus(Ifx_ERAY *eray)
1267 {
1268 return (eray->IBCR.B.IBSYH == 1) ? TRUE : FALSE;
1269 }
1270
1271
1272 IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus(Ifx_ERAY *eray)
1273 {
1274 return (eray->IBCR.B.IBSYS == 1) ? TRUE : FALSE;
1275 }
1276
1277
1278 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInputBufferBusySrcPtr(Ifx_ERAY *eray)
1279 {
1280 IFX_UNUSED_PARAMETER(eray);
1281 return &MODULE_SRC.ERAY.ERAY[0].IBUSY;
1282 }
1283
1284
1285 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInterruptLine0SrcPtr(Ifx_ERAY *eray)
1286 {
1287 IFX_UNUSED_PARAMETER(eray);
1288 return &MODULE_SRC.ERAY.ERAY[0].INT[0];
1289 }
1290
1291
1292 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInterruptLine1SrcPtr(Ifx_ERAY *eray)
1293 {
1294 IFX_UNUSED_PARAMETER(eray);
1295 return &MODULE_SRC.ERAY.ERAY[0].INT[1];
1296 }
1297
1298
1299 IFX_INLINE boolean IfxEray_getMessageBufferInterruptStatus(Ifx_ERAY *eray, uint8 messageBuffer)
1300 {
1301 uint8 ix = messageBuffer / 32;
1302 uint32 mask = 1 << (messageBuffer % 32);
1303 Ifx_ERAY_MBSC1 *mbscSFR = (Ifx_ERAY_MBSC1 *)((uint32)&eray->MBSC1 + 4 * ix);
1304 boolean messageBufferInterrupt = (mbscSFR->U & mask) ? TRUE : FALSE;
1305
1306 return messageBufferInterrupt;
1307 }
1308
1309
1310 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getMessageBufferStatus0SrcPtr(Ifx_ERAY *eray)
1311 {
1312 IFX_UNUSED_PARAMETER(eray);
1313 return &MODULE_SRC.ERAY.ERAY[0].MBSC[0];
1314 }
1315
1316
1317 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getMessageBufferStatus1SrcPtr(Ifx_ERAY *eray)
1318 {
1319 IFX_UNUSED_PARAMETER(eray);
1320 return &MODULE_SRC.ERAY.ERAY[0].MBSC[1];
1321 }
1322
1323
1324 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getNewDataInterrupt0SrcPtr(Ifx_ERAY *eray)
1325 {
1326 IFX_UNUSED_PARAMETER(eray);
1327 return &MODULE_SRC.ERAY.ERAY[0].NDAT[0];
1328 }
1329
1330
1331 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getNewDataInterrupt1SrcPtr(Ifx_ERAY *eray)
1332 {
1333 IFX_UNUSED_PARAMETER(eray);
1334 return &MODULE_SRC.ERAY.ERAY[0].NDAT[1];
1335 }
1336
1337
1338 IFX_INLINE boolean IfxEray_getNewDataInterruptStatus(Ifx_ERAY *eray, uint8 ndat)
1339 {
1340 uint8 ix = ndat / 32;
1341 uint32 mask = 1 << (ndat % 32);
1342 Ifx_ERAY_NDAT1 *ndatSFR = (Ifx_ERAY_NDAT1 *)((uint32)&eray->NDAT1 + 4 * ix);
1343 boolean ndatInterrupt = (ndatSFR->U & mask) ? TRUE : FALSE;
1344
1345 return ndatInterrupt;
1346 }
1347
1348
1349 IFX_INLINE uint8 IfxEray_getOutputBuffer(Ifx_ERAY *eray)
1350 {
1351 return eray->OBCR.B.OBRH;
1352 }
1353
1354
1355 IFX_INLINE boolean IfxEray_getOutputBufferBusyShadowStatus(Ifx_ERAY *eray)
1356 {
1357 return (eray->OBCR.B.OBSYS == 1) ? TRUE : FALSE;
1358 }
1359
1360
1361 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getOutputBufferBusySrcPtr(Ifx_ERAY *eray)
1362 {
1363 IFX_UNUSED_PARAMETER(eray);
1364 return &MODULE_SRC.ERAY.ERAY[0].OBUSY;
1365 }
1366
1367
1368 IFX_INLINE IfxEray_PocState IfxEray_getPocState(Ifx_ERAY *eray)
1369 {
1370 return (IfxEray_PocState)eray->CCSV.B.POCS;
1371 }
1372
1373
1374 IFX_INLINE Ifx_ERAY_SIR IfxEray_getStatusInterrupts(Ifx_ERAY *eray)
1375 {
1376 Ifx_ERAY_SIR interruptFlags;
1377 interruptFlags.U = eray->SIR.U;
1378 return interruptFlags;
1379 }
1380
1381
1382 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getTimerInterrupt0SrcPtr(Ifx_ERAY *eray)
1383 {
1384 IFX_UNUSED_PARAMETER(eray);
1385 return &MODULE_SRC.ERAY.ERAY[0].TINT[0];
1386 }
1387
1388
1389 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getTimerInterrupt1SrcPtr(Ifx_ERAY *eray)
1390 {
1391 IFX_UNUSED_PARAMETER(eray);
1392 return &MODULE_SRC.ERAY.ERAY[0].TINT[1];
1393 }
1394
1395
1396 IFX_INLINE IfxEray_WakeupChannel IfxEray_getWakeupPatternReceivedChannel(Ifx_ERAY *eray)
1397 {
1398 IfxEray_WakeupChannel wakeupChannel = IfxEray_WakeupChannel_a;
1399
1400 if (eray->SIR.B.WUPA == 1)
1401 {
1402 wakeupChannel = IfxEray_WakeupChannel_a;
1403 }
1404 else if (eray->SIR.B.WUPB == 1)
1405 {
1406 wakeupChannel = IfxEray_WakeupChannel_b;
1407 }
1408
1409 return wakeupChannel;
1410 }
1411
1412
1413 IFX_INLINE void IfxEray_initRxPin(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode)
1414 {
1415 IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, rxMode);
1416
1417 if (rx->nodeId == IfxEray_NodeId_a)
1418 {
1419 rx->module->CUST1.B.RISA = rx->select;
1420 }
1421 else
1422 {
1423 rx->module->CUST1.B.RISB = rx->select;
1424 }
1425 }
1426
1427
1428 IFX_INLINE void IfxEray_initTxEnPin(const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver)
1429 {
1430 IfxPort_setPinModeOutput(txEn->pin.port, txEn->pin.pinIndex, txEnMode, txEn->select);
1431 IfxPort_setPinPadDriver(txEn->pin.port, txEn->pin.pinIndex, padDriver);
1432 }
1433
1434
1435 IFX_INLINE void IfxEray_initTxPin(const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver)
1436 {
1437 IfxPort_setPinModeOutput(tx->pin.port, tx->pin.pinIndex, txMode, tx->select);
1438 IfxPort_setPinPadDriver(tx->pin.port, tx->pin.pinIndex, padDriver);
1439 }
1440
1441
1442 IFX_INLINE boolean IfxEray_isModuleSuspended(Ifx_ERAY *eray)
1443 {
1444 Ifx_ERAY_OCS ocs;
1445
1446 // read the status
1447 ocs.U = eray->OCS.U;
1448
1449 // return the status
1450 return ocs.B.SUSSTA;
1451 }
1452
1453
1454 IFX_INLINE void IfxEray_receiveData(Ifx_ERAY *eray, boolean dataReceived)
1455 {
1456 eray->OBCM.B.RDSS = dataReceived;
1457 }
1458
1459
1460 IFX_INLINE void IfxEray_receiveHeader(Ifx_ERAY *eray, boolean headerReceived)
1461 {
1462 eray->OBCM.B.RHSS = headerReceived;
1463 }
1464
1465
1466 IFX_INLINE void IfxEray_sendData(Ifx_ERAY *eray, boolean dataTransfered)
1467 {
1468 eray->IBCM.B.LDSH = dataTransfered;
1469 }
1470
1471
1472 IFX_INLINE void IfxEray_sendHeader(Ifx_ERAY *eray, boolean headerTransfered)
1473 {
1474 eray->IBCM.B.LHSH = headerTransfered;
1475 }
1476
1477
1478 IFX_INLINE void IfxEray_setActiveCyclePairs(Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive)
1479 {
1480 eray->SUCC1.B.PTA = numberOfCyclePairsForActive;
1481 }
1482
1483
1484 IFX_INLINE void IfxEray_setAutoDelayBuffers(Ifx_ERAY *eray)
1485 {
1486 eray->CUST1.B.IEN = 1;
1487 eray->CUST1.B.OEN = 1;
1488 eray->CUST3.U = 0xFFFFFFFF;
1489 }
1490
1491
1492 IFX_INLINE void IfxEray_setBaudrate(Ifx_ERAY *eray, IfxEray_Baudrate baudrate)
1493 {
1494 eray->PRTC1.B.BRP = baudrate;
1495 }
1496
1497
1498 IFX_INLINE void IfxEray_setBufferReconfigSecure(Ifx_ERAY *eray, uint8 secureValue)
1499 {
1500 eray->MRC.B.SEC = secureValue;
1501 }
1502
1503
1504 IFX_INLINE void IfxEray_setChannelAInitialOffsets(Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset)
1505 {
1506 eray->GTUC03.B.UIOA = channelAMicrotickInitialOffset;
1507 eray->GTUC03.B.MIOA = channelAMacrotickInitialOffset;
1508 }
1509
1510
1511 IFX_INLINE void IfxEray_setChannelBInitialOffsets(Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset)
1512 {
1513 eray->GTUC03.B.UIOB = channelBMicrotickInitialOffset;
1514 eray->GTUC03.B.MIOB = channelBMacrotickInitialOffset;
1515 }
1516
1517
1518 IFX_INLINE void IfxEray_setChannelsReceiveDelay(Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay)
1519 {
1520 eray->GTUC05.B.DCA = channelAReceptionDelay;
1521 eray->GTUC05.B.DCB = channelBReceptionDelay;
1522 }
1523
1524
1525 IFX_INLINE void IfxEray_setClockCorrectionCycles(Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt)
1526 {
1527 Ifx_ERAY_SUCC3 succ3;
1528 succ3.U = 0;
1529 succ3.B.WCP = clockCorrectionCyclesPassive;
1530 succ3.B.WCF = clockCorrectionCyclesHalt;
1531 eray->SUCC3.U = succ3.U;
1532 }
1533
1534
1535 IFX_INLINE void IfxEray_setClockSynchErrorHalt(Ifx_ERAY *eray, boolean clockSyncErrorHalt)
1536 {
1537 eray->SUCC1.B.HCSE = clockSyncErrorHalt;
1538 }
1539
1540
1541 IFX_INLINE void IfxEray_setClusterDriftValues(Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset)
1542 {
1543 eray->GTUC05.B.CDD = clusterDrift;
1544 eray->GTUC06.B.MOD = maxDriftOffset;
1545 }
1546
1547
1548 IFX_INLINE void IfxEray_setClusterStartupDeviation(Ifx_ERAY *eray, uint16 acceptedStartupDeviation)
1549 {
1550 eray->GTUC06.B.ASR = acceptedStartupDeviation;
1551 }
1552
1553
1554 IFX_INLINE void IfxEray_setCollisionAvoidanceDuration(Ifx_ERAY *eray, uint8 collisionAvoidanceDuration)
1555 {
1556 eray->PRTC1.B.CASM = collisionAvoidanceDuration;
1557 }
1558
1559
1560 IFX_INLINE void IfxEray_setCycleDurationMacroticks(Ifx_ERAY *eray, uint16 macroticks)
1561 {
1562 eray->GTUC02.B.MPC = macroticks;
1563 }
1564
1565
1566 IFX_INLINE void IfxEray_setCycleDurationMicroticks(Ifx_ERAY *eray, uint32 microticks)
1567 {
1568 eray->GTUC01.U = microticks;
1569 }
1570
1571
1572 IFX_INLINE void IfxEray_setDecodingCorrectionValue(Ifx_ERAY *eray, uint8 decodingCorrection)
1573 {
1574 eray->GTUC05.B.DEC = decodingCorrection;
1575 }
1576
1577
1578 IFX_INLINE void IfxEray_setDynamicSlots(Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots)
1579 {
1580 eray->GTUC08.B.MSL = dynamicSlotLength;
1581 eray->GTUC08.B.NMS = dynamicSlotCount;
1582 eray->GTUC09.B.DSI = idleDynamicSlots;
1583 }
1584
1585
1586 IFX_INLINE void IfxEray_setExternalCorrectionControl(Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate)
1587 {
1588 eray->GTUC11.B.EOCC = externalOffset;
1589 eray->GTUC11.B.ERCC = externalRate;
1590 }
1591
1592
1593 IFX_INLINE void IfxEray_setExternalCorrectionValues(Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection)
1594 {
1595 eray->GTUC11.B.EOC = externalOffsetCorrection;
1596 eray->GTUC11.B.ERC = externalRateCorrection;
1597 }
1598
1599
1600 IFX_INLINE void IfxEray_setFifoBufferStartIndex(Ifx_ERAY *eray, uint8 fifoBufferStartIndex)
1601 {
1602 // Buffers from MRC.B.FFB to MRC.B.LCB are assigned FIFO
1603 eray->MRC.B.FFB = fifoBufferStartIndex;
1604 }
1605
1606
1607 IFX_INLINE void IfxEray_setFifoFilterConfigurations(Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter)
1608 {
1609 eray->FRF.B.FID = rejectedFrameId;
1610 eray->FRF.B.CYF = filteredCycleNumber;
1611 eray->FRF.B.RNF = fifoNullFramesRejected;
1612 eray->FRFM.B.MFID = frameIdFilter;
1613 }
1614
1615
1616 IFX_INLINE void IfxEray_setFifoMessageBufferConfigurations(Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth)
1617 {
1618 eray->FRF.B.CH = receiveChannel;
1619 eray->FRF.B.RSS = staticFifoDisabled;
1620 eray->FCL.U = fifoDepth;
1621 }
1622
1623
1624 IFX_INLINE void IfxEray_setFirstDynamicBuffer(Ifx_ERAY *eray, uint8 firstDynamicBuffer)
1625 {
1626 // 0: No static bufers, 0x01...0x7F: 0 to (MRC.B.FDB - 1) are static buffers, 0x80...0xFF:No dynamic buffers
1627 eray->MRC.B.FDB = firstDynamicBuffer;
1628 }
1629
1630
1631 IFX_INLINE void IfxEray_setListenTimeOuts(Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise)
1632 {
1633 Ifx_ERAY_SUCC2 succ2;
1634 succ2.U = 0;
1635 succ2.B.LT = listenTimeOut;
1636 succ2.B.LTN = listenTimeOutNoise;
1637 eray->SUCC2.U = succ2.U;
1638 }
1639
1640
1641 IFX_INLINE void IfxEray_setMaxColdStartAttempts(Ifx_ERAY *eray, uint8 maxColdStartAttempts)
1642 {
1643 eray->SUCC1.B.CSA = maxColdStartAttempts;
1644 }
1645
1646
1647 IFX_INLINE void IfxEray_setMaxCorrectionValues(Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection)
1648 {
1649 eray->GTUC10.B.MOC = maxOffsetCorrection;
1650 eray->GTUC10.B.MRC = maxRateCorrection;
1651 }
1652
1653
1654 IFX_INLINE void IfxEray_setMaxSynchFrames(Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames)
1655 {
1656 eray->GTUC02.B.SNM = maxSyncFrames;
1657 }
1658
1659
1660 IFX_INLINE void IfxEray_setMessageBufferCount(Ifx_ERAY *eray, uint8 numberOfMessageBuffers)
1661 {
1662 eray->MRC.B.LCB = numberOfMessageBuffers - 1;
1663 }
1664
1665
1666 IFX_INLINE void IfxEray_setMessageHandlerConfigurations(Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart)
1667 {
1668 Ifx_ERAY_MHDC mhdc;
1669 mhdc.U = 0;
1670 mhdc.B.SFDL = staticFramepayload;
1671 mhdc.B.SLT = latestTransmissionStart;
1672 eray->MHDC.U = mhdc.U;
1673 }
1674
1675
1676 IFX_INLINE void IfxEray_setNetworkStartIdleTime(Ifx_ERAY *eray, uint16 networkStartIdleTime)
1677 {
1678 eray->GTUC04.B.NIT = networkStartIdleTime;
1679 }
1680
1681
1682 IFX_INLINE void IfxEray_setNetworkVectorLength(Ifx_ERAY *eray, uint32 networkVectorLength)
1683 {
1684 eray->NEMC.U = networkVectorLength;
1685 }
1686
1687
1688 IFX_INLINE void IfxEray_setNodeChannels(Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode)
1689 {
1690 eray->SUCC1.B.CCHA = channelAConnectedNode;
1691 eray->SUCC1.B.CCHB = channelBConnectedNode;
1692 }
1693
1694
1695 IFX_INLINE void IfxEray_setOffsetCorrection(Ifx_ERAY *eray, uint16 correctionOffset)
1696 {
1697 eray->GTUC04.B.OCS = correctionOffset;
1698 }
1699
1700
1701 IFX_INLINE void IfxEray_setReceiveRequest(Ifx_ERAY *eray, boolean receiveRequested)
1702 {
1703 eray->OBCR.B.REQ = receiveRequested;
1704 }
1705
1706
1707 IFX_INLINE void IfxEray_setReceiveWakeupTimes(Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime)
1708 {
1709 eray->PRTC1.B.RXW = receiveWakeupTestDuration;
1710 eray->PRTC2.B.RXI = receiveWakeupIdleTime;
1711 eray->PRTC2.B.RXL = receiveWakeupLowTime;
1712 }
1713
1714
1715 IFX_INLINE void IfxEray_setRxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
1716 {
1717 eray->OBCR.B.OBRS = bufferIndex;
1718 }
1719
1720
1721 IFX_INLINE void IfxEray_setSleepMode(Ifx_ERAY *eray, IfxEray_SleepMode mode)
1722 {
1723 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1724 IfxScuWdt_clearCpuEndinit(passwd);
1725 eray->CLC.B.EDIS = mode;
1726 IfxScuWdt_setCpuEndinit(passwd);
1727 }
1728
1729
1730 IFX_INLINE void IfxEray_setSlotActionPoints(Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint)
1731 {
1732 eray->GTUC09.B.MAPO = dynamicActionPoint;
1733 eray->GTUC09.B.APO = staticActionPoint;
1734 }
1735
1736
1737 IFX_INLINE void IfxEray_setStaticSlots(Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount)
1738 {
1739 eray->GTUC07.B.SSL = staticSlotLength;
1740 eray->GTUC07.B.NSS = staticSlotsCount;
1741 }
1742
1743
1744 IFX_INLINE void IfxEray_setStrobePosition(Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition)
1745 {
1746 eray->PRTC1.B.SPP = strobePosition;
1747 }
1748
1749
1750 IFX_INLINE void IfxEray_setSuspendMode(Ifx_ERAY *eray, IfxEray_SuspendMode mode)
1751 {
1752 Ifx_ERAY_OCS ocs;
1753
1754 // remove protection and configure the suspend mode.
1755 ocs.B.SUS_P = 1;
1756 ocs.B.SUS = mode;
1757 eray->OCS.U = ocs.U;
1758 }
1759
1760
1761 IFX_INLINE void IfxEray_setSymbolChannels(Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted)
1762 {
1763 eray->SUCC1.B.MTSA = channelASymbolTransmitted;
1764 eray->SUCC1.B.MTSB = channelBSymbolTransmitted;
1765 }
1766
1767
1768 IFX_INLINE void IfxEray_setTransmissionSlotMode(Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode)
1769 {
1770 eray->SUCC1.B.TSM = transmissionSlotMode;
1771 }
1772
1773
1774 IFX_INLINE void IfxEray_setTransmissionStartTime(Ifx_ERAY *eray, uint8 transmissionStartTime)
1775 {
1776 eray->PRTC1.B.TSST = transmissionStartTime;
1777 }
1778
1779
1780 IFX_INLINE void IfxEray_setTransmitRequest(Ifx_ERAY *eray, boolean transferRequested)
1781 {
1782 eray->IBCM.B.STXRH = transferRequested;
1783 }
1784
1785
1786 IFX_INLINE void IfxEray_setTransmitWakeupTimes(Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime)
1787 {
1788 eray->PRTC1.B.RWP = transmitWakeupRepetitions;
1789 eray->PRTC2.B.TXI = transmitWakeupIdleTime;
1790 eray->PRTC2.B.TXL = transmitWakeupLowTime;
1791 }
1792
1793
1794 IFX_INLINE void IfxEray_setTransmittedFrames(Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted)
1795 {
1796 eray->SUCC1.B.TXST = startupFrameTransmitted;
1797 eray->SUCC1.B.TXSY = synchFrameTransmitted;
1798 }
1799
1800
1801 IFX_INLINE void IfxEray_setTxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
1802 {
1803 eray->IBCR.B.IBRH = bufferIndex;
1804 }
1805
1806
1807 IFX_INLINE void IfxEray_setViewData(Ifx_ERAY *eray, boolean swapRequested)
1808 {
1809 eray->OBCR.B.VIEW = swapRequested;
1810 }
1811
1812
1813 IFX_INLINE void IfxEray_setWakeupPatternChannel(Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel)
1814 {
1815 eray->SUCC1.B.WUCS = wakeupPatternChannel;
1816 }
1817
1818
1819 IFX_INLINE void IfxEray_waitForPocState(Ifx_ERAY *eray, IfxEray_PocState pocState)
1820 {
1821 while (eray->CCSV.B.POCS != (uint8)pocState)
1822 {}
1823 }
1824
1825
1826 IFX_INLINE void IfxEray_initRxPinWithPadLevel(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode, IfxPort_PadDriver padDriver)
1827 {
1828 IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, rxMode);
1829 IfxPort_setPinPadDriver(rx->pin.port, rx->pin.pinIndex, padDriver);
1830
1831 if (rx->nodeId == IfxEray_NodeId_a)
1832 {
1833 rx->module->CUST1.B.RISA = rx->select;
1834 }
1835 else
1836 {
1837 rx->module->CUST1.B.RISB = rx->select;
1838 }
1839 }
1840
1841
1842 #endif /* IFXERAY_H */
IfxEray_ExternalOffsetCorrection_2
external clock offset correction value 2
Definition: IfxEray.h:181
IfxEray_isModuleSuspended
IFX_INLINE boolean IfxEray_isModuleSuspended(Ifx_ERAY *eray)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxEray.h:1442
IfxEray_SlotConfig
Transmit control structure.
Definition: IfxEray.h:413
IfxEray_Txd_Out
TXD pin mapping structure.
Definition: IfxEray_PinMap.h:65
IfxEray_WakeupChannel
IfxEray_WakeupChannel
Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS.
Definition: IfxEray.h:365
IfxEray_setCollisionAvoidanceDuration
IFX_INLINE void IfxEray_setCollisionAvoidanceDuration(Ifx_ERAY *eray, uint8 collisionAvoidanceDuration)
Sets CAS symbol window duration.
Definition: IfxEray.h:1554
IfxEray_setSlot
IFX_EXTERN void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots.
Definition: IfxEray.c:295
IfxEray_ReceiveChannel_a
channel B for reception
Definition: IfxEray.h:316
IfxEray_getOutputBuffer
IFX_INLINE uint8 IfxEray_getOutputBuffer(Ifx_ERAY *eray)
Gets the output buffer index.
Definition: IfxEray.h:1349
IfxEray_MaxSynchFrames_7
Maximum number of sync frames in a cluster are 7.
Definition: IfxEray.h:251
IfxEray_PocCommand_run
command to controller to enter RUN
Definition: IfxEray.h:270
IfxEray_Header::bufferDirection
IfxEray_BufferDirection bufferDirection
selects buffer as a transmit buffer or as a receive buffer.
Definition: IfxEray.h:387
IfxEray_ListenTimeOutNoise_12
listen Time-out noise 12
Definition: IfxEray.h:235
IfxEray_BufferDirection_receive
buffer is configured as receive buffer
Definition: IfxEray.h:90
IfxEray_Baudrate_10
baudrate is 10MBits/Sec
Definition: IfxEray.h:81
IfxEray_Rxd_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxEray_PinMap.h:60
IfxEray_calcHeaderCrc
IFX_EXTERN uint16 IfxEray_calcHeaderCrc(uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
Calculate and returns the CRC for frame.
Definition: IfxEray.c:52
IfxEray_setPocReady
IFX_EXTERN void IfxEray_setPocReady(Ifx_ERAY *eray)
Sets the POC state to Ready state.
Definition: IfxEray.c:282
IfxEray_ReceivedHeader::syncFrame
uint8 syncFrame
0 : received frame is not a synch frame ; 1 : receive frame is a synch frame.
Definition: IfxEray.h:405
IfxEray_initRxPinWithPadLevel
IFX_INLINE void IfxEray_initRxPinWithPadLevel(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of pin direction as input and configuring pad driver...
Definition: IfxEray.h:1826
IfxEray_PocCommand_notAccepted
command not accepted.
Definition: IfxEray.h:266
IfxEray_TransmissionSlotMode_single
transmission in key slot.
Definition: IfxEray.h:360
IfxEray_BufferDirection_transmit
buffer is configured as transmit buffer
Definition: IfxEray.h:91
IfxEray_PocState_join
controller entered join state.
Definition: IfxEray.h:301
IfxEray_setStaticSlots
IFX_INLINE void IfxEray_setStaticSlots(Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount)
Sets static slots count and length.
Definition: IfxEray.h:1737
IfxEray_SuspendMode_none
No suspend.
Definition: IfxEray.h:342
IfxEray_PocCommand_halt
command to controller to enter HALT
Definition: IfxEray.h:272
IfxEray_setNewDataInterruptDestination
IFX_EXTERN void IfxEray_setNewDataInterruptDestination(Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination.
Definition: IfxEray.c:264
IfxEray_initTxEnPin
IFX_INLINE void IfxEray_initTxEnPin(const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver)
Initializes a TX Enable output.
Definition: IfxEray.h:1428
IfxEray_ClearStatusFlag_txi
transmit service request bit.
Definition: IfxEray.h:133
IfxEray_ListenTimeOutNoise_11
listen Time-out noise 11
Definition: IfxEray.h:234
IfxEray_receiveData
IFX_INLINE void IfxEray_receiveData(Ifx_ERAY *eray, boolean dataReceived)
requests to receive data from message buffer.
Definition: IfxEray.h:1454
IfxEray_setBufferReconfigSecure
IFX_INLINE void IfxEray_setBufferReconfigSecure(Ifx_ERAY *eray, uint8 secureValue)
Sets secured buffers in message RAM.
Definition: IfxEray.h:1498
IfxEray_ClockDivider_none
no clock signal
Definition: IfxEray.h:156
IfxEray_ReceiveChannel
IfxEray_ReceiveChannel
Receiving channel, defined in MODULE_ERAY0.FRF.B.CH.
Definition: IfxEray.h:312
IfxEray_waitForPocState
IFX_INLINE void IfxEray_waitForPocState(Ifx_ERAY *eray, IfxEray_PocState pocState)
Waits until the controller enters required POC state.
Definition: IfxEray.h:1819
IfxEray_PocState
IfxEray_PocState
State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS.
Definition: IfxEray.h:283
IfxEray_setOffsetCorrection
IFX_INLINE void IfxEray_setOffsetCorrection(Ifx_ERAY *eray, uint16 correctionOffset)
Sets offset correction starting point.
Definition: IfxEray.h:1695
IfxEray_ReceiveChannel_b
channel A for reception
Definition: IfxEray.h:315
IfxEray_ClearStatusFlag
IfxEray_ClearStatusFlag
Selection of status flag to clear defined in MODULE_ERAY.SIR.U.
Definition: IfxEray.h:128
IfxEray_ClearErrorFlag_pemc
POC error mode change bit.
Definition: IfxEray.h:106
IfxEray_ListenTimeOutNoise_8
listen Time-out noise 8
Definition: IfxEray.h:231
IfxEray_PocState_startupSucced
controller entered startup succeed state.
Definition: IfxEray.h:307
IfxEray_setBaudrate
IFX_INLINE void IfxEray_setBaudrate(Ifx_ERAY *eray, IfxEray_Baudrate baudrate)
Sets baudrate on Flexray bus.
Definition: IfxEray.h:1492
IfxEray_TransmissionMode_singleShot
single transmission mode
Definition: IfxEray.h:352
IfxEray_ExternalOffset_noCorrection
No external correction control.
Definition: IfxEray.h:170
IfxEray_ReceivedHeader
Received header in a frame.
Definition: IfxEray.h:399
IfxEray_setClusterStartupDeviation
IFX_INLINE void IfxEray_setClusterStartupDeviation(Ifx_ERAY *eray, uint16 acceptedStartupDeviation)
Sets cluster startup deviation.
Definition: IfxEray.h:1548
IfxEray_setWakeupPatternChannel
IFX_INLINE void IfxEray_setWakeupPatternChannel(Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel)
Sets the cluster wakeup channel.
Definition: IfxEray.h:1813
IfxEray_SleepMode
IfxEray_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_ERAY.CLC.B.EDIS.
Definition: IfxEray.h:323
IfxEray_Header::transmissionMode
IfxEray_TransmissionMode transmissionMode
transmission mode of Header.
Definition: IfxEray.h:389
IfxEray_setTxBufferNumber
IFX_INLINE void IfxEray_setTxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
Sets the transmit buffer number.
Definition: IfxEray.h:1801
IfxEray_Txen_Out
TXEN pin mapping structure.
Definition: IfxEray_PinMap.h:74
IfxEray_ExternalRateCorrection_1
external clock rate correction value 1
Definition: IfxEray.h:203
IfxEray_ExternalRateCorrection_2
external clock rate correction value 2
Definition: IfxEray.h:204
IfxEray_ClearErrorFlag_ccf
clock correction failure event.
Definition: IfxEray.h:110
IfxEray_Header::transmitPayloadIndicatior
boolean transmitPayloadIndicatior
weather payload indicator is set or not.
Definition: IfxEray.h:388
IfxEray_getNewDataInterrupt0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt0SrcPtr(Ifx_ERAY *eray)
Gets the NDAT0 service request.
Definition: IfxEray.h:1324
IfxEray_getIndex
IFX_EXTERN IfxEray_Index IfxEray_getIndex(Ifx_ERAY *eray)
API to get the resource index of the ERAY specified.
Definition: IfxEray.c:168
IfxEray_SlotConfig::dataTransfered
boolean dataTransfered
whether data is transfered from input buffers to Message RAM or not.
Definition: IfxEray.h:416
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxEray_getMessageBufferInterruptStatus
IFX_INLINE boolean IfxEray_getMessageBufferInterruptStatus(Ifx_ERAY *eray, uint8 messageBuffer)
Gets the message buffers interrupt status.
Definition: IfxEray.h:1299
IfxEray_ClearStatusFlag_ti0
timer0 service request bit.
Definition: IfxEray.h:138
IfxEray_setActiveCyclePairs
IFX_INLINE void IfxEray_setActiveCyclePairs(Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive)
Sets number of cycle pairs for Active state.
Definition: IfxEray.h:1478
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEray_ListenTimeOutNoise_9
listen Time-out noise 9
Definition: IfxEray.h:232
IfxEray_ReceivedHeader::payloadPreambleIndicator
uint8 payloadPreambleIndicator
1 : received payload segment has network management and message id or not; 0 : It hasn&#39;t...
Definition: IfxEray.h:408
IfxEray_WakeupChannel_a
send wakeup channel pattern on channel A
Definition: IfxEray.h:367
IfxEray_ClearStatusFlag_cycs
cycle start service bit.
Definition: IfxEray.h:132
IfxEray_ExternalOffsetCorrection
IfxEray_ExternalOffsetCorrection
External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC.
Definition: IfxEray.h:177
IfxEray_ClearStatusFlag_tobc
transfer output buffer completion request bit.
Definition: IfxEray.h:141
IfxEray_ReceiveChannel_none
none channels for reception
Definition: IfxEray.h:317
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxEray_PocCommand_clearRam
command to controller to enter CLEAR_RAM
Definition: IfxEray.h:278
IfxEray_ExternalRate_correctionSubtracted
External rate correction subtracted from calculated correction.
Definition: IfxEray.h:194
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxEray_Baudrate_5
baudrate is 5MBits/Sec
Definition: IfxEray.h:82
IfxEray_PocState_collisionResolution
controller entered collission-resolution state.
Definition: IfxEray.h:298
IfxEray_ExternalOffset_correctionAdded
External offset correction added to calculated correction.
Definition: IfxEray.h:172
IfxEray_ExternalRate
IfxEray_ExternalRate
External rate correction control MODULE_ERAY0.GTU11.B.ERCC.
Definition: IfxEray.h:191
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxEray_getStatusInterrupts
IFX_INLINE Ifx_ERAY_SIR IfxEray_getStatusInterrupts(Ifx_ERAY *eray)
Gets the status interrupt flags.
Definition: IfxEray.h:1374
IfxEray_receiveHeader
IFX_INLINE void IfxEray_receiveHeader(Ifx_ERAY *eray, boolean headerReceived)
request to receive header section from message buffer.
Definition: IfxEray.h:1460
IfxEray_TransmissionMode
IfxEray_TransmissionMode
Transmission mode of Header, defined in MODULE_ERAY0.WRHS1.B.TXM.
Definition: IfxEray.h:349
IfxEray_ListenTimeOutNoise
IfxEray_ListenTimeOutNoise
Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN.
Definition: IfxEray.h:223
IfxEray_getInputBufferBusyHostStatus
IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus(Ifx_ERAY *eray)
Gets the Input Buffer Host Busy status.
Definition: IfxEray.h:1266
IfxEray_MaxSynchFrames_2
Maximum number of sync frames in a cluster are 2.
Definition: IfxEray.h:246
IfxEray_Txen_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxEray_PinMap.h:79
IfxEray_setTransmissionStartTime
IFX_INLINE void IfxEray_setTransmissionStartTime(Ifx_ERAY *eray, uint8 transmissionStartTime)
Sets transmission start time duration.
Definition: IfxEray.h:1774
IfxSrc.h
SRC basic functionality.
IfxEray_ClearErrorFlag_mhf
message handler constraint flag.
Definition: IfxEray.h:117
IfxEray_setExternalCorrectionControl
IFX_INLINE void IfxEray_setExternalCorrectionControl(Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate)
Sets external correction controls.
Definition: IfxEray.h:1586
IfxEray_MaxSynchFrames_8
Maximum number of sync frames in a cluster are 8.
Definition: IfxEray.h:252
IfxEray_MaxSynchFrames_11
Maximum number of sync frames in a cluster are 11.
Definition: IfxEray.h:255
IfxEray_setTransmitRequest
IFX_INLINE void IfxEray_setTransmitRequest(Ifx_ERAY *eray, boolean transferRequested)
Sets transfer request to send frame.
Definition: IfxEray.h:1780
IfxEray_getTimerInterrupt0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt0SrcPtr(Ifx_ERAY *eray)
Gets the TINT0 service request.
Definition: IfxEray.h:1382
IfxEray_ClearErrorFlag_taba
transmission across channel A boundary flag.
Definition: IfxEray.h:120
IfxEray_ListenTimeOutNoise_15
listen Time-out noise 15
Definition: IfxEray.h:238
IfxEray_ClearErrorFlag_sfo
sync frame overflow event bit
Definition: IfxEray.h:109
IfxEray_setMessageHandlerConfigurations
IFX_INLINE void IfxEray_setMessageHandlerConfigurations(Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart)
Sets Message Handler configurations.
Definition: IfxEray.h:1666
IfxEray_Header::dataPointer
uint16 dataPointer
pointer to the data section of message buffer in RAM.
Definition: IfxEray.h:392
IfxEray_Header::startupFrameIndicator
boolean startupFrameIndicator
whether startup frame is indicated or not.
Definition: IfxEray.h:393
IfxEray_ExternalOffsetCorrection_4
external clock offset correction value 4
Definition: IfxEray.h:183
IfxEray_ExternalOffsetCorrection_7
external clock offset correction value 7
Definition: IfxEray.h:186
IfxEray_ClearErrorFlag_ioba
illegal output buffer access event.
Definition: IfxEray.h:116
IfxEray_ClearErrorFlag_cna
command not accepted event bit.
Definition: IfxEray.h:107
IfxEray_Channel
IfxEray_Channel
Channel Id.
Definition: IfxEray.h:96
IfxEray_Header::bufferServiceEnabled
boolean bufferServiceEnabled
wether buffer service request is enabled or not.
Definition: IfxEray.h:390
IfxEray_PocState_gap
controller entered gap state.
Definition: IfxEray.h:300
IfxEray_PocState_halt
controller entered halt state
Definition: IfxEray.h:289
IfxEray_ClockDivider
IfxEray_ClockDivider
Clock divider in RUN mode, defined in MODULE_ERAY0.B.RMC.
Definition: IfxEray.h:154
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
IfxEray_setMaxSynchFrames
IFX_INLINE void IfxEray_setMaxSynchFrames(Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames)
Sets maximum synch frames in a cluster.
Definition: IfxEray.h:1654
IfxEray_TransmissionMode_continuous
continuos transmission mode
Definition: IfxEray.h:351
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxEray_setListenTimeOuts
IFX_INLINE void IfxEray_setListenTimeOuts(Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise)
Sets startup or wakeup listen timeouts.
Definition: IfxEray.h:1631
IfxEray_sendData
IFX_INLINE void IfxEray_sendData(Ifx_ERAY *eray, boolean dataTransfered)
sets the bit to send data in frame.
Definition: IfxEray.h:1466
IfxEray_ExternalOffsetCorrection_0
external clock offset correction value 0
Definition: IfxEray.h:179
IfxEray_PocState_config
controller entered config state
Definition: IfxEray.h:291
IfxEray_ReceivedHeader::headerCrc
uint16 headerCrc
received header crc.
Definition: IfxEray.h:403
IfxEray_setStrobePosition
IFX_INLINE void IfxEray_setStrobePosition(Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition)
Sets sample point for strobing.
Definition: IfxEray.h:1744
IfxEray_setSleepMode
IFX_INLINE void IfxEray_setSleepMode(Ifx_ERAY *eray, IfxEray_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxEray.h:1721
IfxEray_PocState_consistencyCheck
controller entered consistency-check.
Definition: IfxEray.h:299
IfxEray_PocCommand_sendMts
command to controller to enter SEND_MTS
Definition: IfxEray.h:274
IfxEray_ClearErrorFlag_sfbm
sync frame below minimum bit.
Definition: IfxEray.h:108
IfxEray_SleepMode_disable
disables sleep mode
Definition: IfxEray.h:326
IfxEray_ClearStatusFlag_wst
wakeup status bit.
Definition: IfxEray.h:130
IfxEray_ClearStatusFlag_mtsa
MTS receive channel A bit.
Definition: IfxEray.h:147
IfxEray_writeData
IFX_EXTERN void IfxEray_writeData(Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers.
Definition: IfxEray.c:348
IfxEray_PocState_monitor
controller entered monitor state
Definition: IfxEray.h:290
IfxEray_SlotConfig::transferRequested
boolean transferRequested
transmit buffer released for transmission or not.
Definition: IfxEray.h:417
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxEray_getInputBufferBusySrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInputBufferBusySrcPtr(Ifx_ERAY *eray)
Gets the IBUSY service request.
Definition: IfxEray.h:1278
IfxEray_MaxSynchFrames_15
Maximum number of sync frames in a cluster are 15.
Definition: IfxEray.h:259
IfxEray_ClearErrorFlag_ltvb
latest transmit violation flag on channel B .
Definition: IfxEray.h:122
IfxEray_Rxd_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxEray_PinMap.h:61
IfxEray_ClearStatusFlag_swe
stop watch event bit.
Definition: IfxEray.h:142
IfxEray_Baudrate_2_5
baudrate is 2.5MBits/Sec
Definition: IfxEray.h:83
IfxEray_MaxSynchFrames_13
Maximum number of sync frames in a cluster are 13.
Definition: IfxEray.h:257
IfxEray_ClockDivider_5
run mode clock divider 5
Definition: IfxEray.h:161
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEray_ClearErrorFlag_eda
error event on channel A.
Definition: IfxEray.h:118
IfxEray_getFifoIndex
IFX_INLINE uint8 IfxEray_getFifoIndex(Ifx_ERAY *eray)
Gets the FIFO index.
Definition: IfxEray.h:1252
IfxEray_ClearStatusFlag_sucs
startup success event bit.
Definition: IfxEray.h:143
IfxEray_ExternalOffset
IfxEray_ExternalOffset
External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC.
Definition: IfxEray.h:168
IfxEray_ClockDivider_2
run mode clock divider 2
Definition: IfxEray.h:158
IfxEray_setAutoDelayBuffers
IFX_INLINE void IfxEray_setAutoDelayBuffers(Ifx_ERAY *eray)
Sets auto delays between input, output buffers and message RAM.
Definition: IfxEray.h:1484
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxEray_setViewData
IFX_INLINE void IfxEray_setViewData(Ifx_ERAY *eray, boolean swapRequested)
Swaps the shadow and Host output registers.
Definition: IfxEray.h:1807
IfxEray_PocState_normalActive
controller entered normal-active state
Definition: IfxEray.h:287
IfxEray_setFifoBufferStartIndex
IFX_INLINE void IfxEray_setFifoBufferStartIndex(Ifx_ERAY *eray, uint8 fifoBufferStartIndex)
Sets FIFO buffer start idex.
Definition: IfxEray.h:1600
IfxEray_setRxBufferNumber
IFX_INLINE void IfxEray_setRxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
sets buffer number in which frame is received.
Definition: IfxEray.h:1715
IfxEray_ExternalOffsetCorrection_3
external clock offset correction value 3
Definition: IfxEray.h:182
IfxEray_setFifoMessageBufferConfigurations
IFX_INLINE void IfxEray_setFifoMessageBufferConfigurations(Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth)
Sets FIFO configurations.
Definition: IfxEray.h:1616
IfxEray_setTransmissionSlotMode
IFX_INLINE void IfxEray_setTransmissionSlotMode(Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode)
Sets the transmit slot mode.
Definition: IfxEray.h:1768
IfxEray_getInputBufferBusyShadowStatus
IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus(Ifx_ERAY *eray)
Gets the Input Buffer Shadow status.
Definition: IfxEray.h:1272
IfxEray_getNewDataInterrupt1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt1SrcPtr(Ifx_ERAY *eray)
Gets the NDAT1 service request.
Definition: IfxEray.h:1331
IfxEray_setMaxCorrectionValues
IFX_INLINE void IfxEray_setMaxCorrectionValues(Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection)
Sets max limit correction values.
Definition: IfxEray.h:1647
IfxEray_setCycleDurationMicroticks
IFX_INLINE void IfxEray_setCycleDurationMicroticks(Ifx_ERAY *eray, uint32 microticks)
sets duration of the communication cycle in Microticks.
Definition: IfxEray.h:1566
IfxEray_setReceiveRequest
IFX_INLINE void IfxEray_setReceiveRequest(Ifx_ERAY *eray, boolean receiveRequested)
requests to receive the frame.
Definition: IfxEray.h:1701
IfxEray_PocCommand_monitor
command to controller to enter MONITOR
Definition: IfxEray.h:277
IfxEray_MaxSynchFrames_12
Maximum number of sync frames in a cluster are 12.
Definition: IfxEray.h:256
IfxEray_ClearErrorFlag_rfo
RxFIFO overrun event bit.
Definition: IfxEray.h:113
IfxEray_setCycleDurationMacroticks
IFX_INLINE void IfxEray_setCycleDurationMacroticks(Ifx_ERAY *eray, uint16 macroticks)
sets duration of the communication cycle in Macroticks.
Definition: IfxEray.h:1560
IfxEray_getInterruptLine0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine0SrcPtr(Ifx_ERAY *eray)
Gets the INT0 service request.
Definition: IfxEray.h:1285
IfxEray_setNodeChannels
IFX_INLINE void IfxEray_setNodeChannels(Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode)
Sets channels connected to node.
Definition: IfxEray.h:1688
IfxEray_TransmissionSlotMode_all
transmission in all slots.
Definition: IfxEray.h:359
IfxEray_PocState_startup
controller entered startup state
Definition: IfxEray.h:296
IfxEray_ListenTimeOutNoise_2
listen Time-out noise 2
Definition: IfxEray.h:225
IfxEray_PinMap.h
ERAY I/O map.
IfxEray_Rxd_In::nodeId
IfxEray_NodeId nodeId
Node ID.
Definition: IfxEray_PinMap.h:59
IfxEray_setChannelAInitialOffsets
IFX_INLINE void IfxEray_setChannelAInitialOffsets(Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset)
Sets channel A initial offstes.
Definition: IfxEray.h:1504
IfxEray_SuspendMode_hard
Hard Suspend.
Definition: IfxEray.h:343
IfxEray_PocCommand_freeze
command to controller to enter FREEZE
Definition: IfxEray.h:273
IfxEray_getInterruptLine1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine1SrcPtr(Ifx_ERAY *eray)
Gets the INT1 service request.
Definition: IfxEray.h:1292
IfxEray_setMessageBufferInterruptDestination
IFX_EXTERN void IfxEray_setMessageBufferInterruptDestination(Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination.
Definition: IfxEray.c:247
IfxEray_ExternalRateCorrection
IfxEray_ExternalRateCorrection
External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC.
Definition: IfxEray.h:200
IfxEray_setExternalCorrectionValues
IFX_INLINE void IfxEray_setExternalCorrectionValues(Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection)
Sets external correction values.
Definition: IfxEray.h:1593
IfxEray_PocCommand_allSlots
command to controller to enter ALL_SLOTS
Definition: IfxEray.h:271
IfxEray_ClearStatusFlag_cas
collision avoidance bit.
Definition: IfxEray.h:131
IfxEray_getTimerInterrupt1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt1SrcPtr(Ifx_ERAY *eray)
Gets the TINT1 service request.
Definition: IfxEray.h:1389
IfxEray_WakeupChannel_b
send wakeup channel pattern on channel B
Definition: IfxEray.h:368
IfxEray_Header
Header section in a frame.
Definition: IfxEray.h:381
IfxEray_ClearStatusFlag_mbsi
message buffer service status bit.
Definition: IfxEray.h:144
IfxEray_MaxSynchFrames_6
Maximum number of sync frames in a cluster are 6.
Definition: IfxEray.h:250
IfxEray_Channel_a
channel A
Definition: IfxEray.h:98
IfxEray_MaxSynchFrames_3
Maximum number of sync frames in a cluster are 3.
Definition: IfxEray.h:247
IfxEray_ListenTimeOutNoise_6
listen Time-out noise 6
Definition: IfxEray.h:229
IfxEray_initRxPin
IFX_INLINE void IfxEray_initRxPin(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode)
Initialises a RX pin.
Definition: IfxEray.h:1413
IfxEray_ClearStatusFlag_rfne
receive fifo not empty bit.
Definition: IfxEray.h:135
IfxEray_ClearStatusFlag_rfcl
RxFIFO critical level reached bit.
Definition: IfxEray.h:136
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxEray_getMessageBufferStatus0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus0SrcPtr(Ifx_ERAY *eray)
Gets the MBSC0 service request.
Definition: IfxEray.h:1310
IfxEray_setSymbolChannels
IFX_INLINE void IfxEray_setSymbolChannels(Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted)
Sets channels which transmits symbols.
Definition: IfxEray.h:1761
IfxEray_IdleDynamicSlots
IfxEray_IdleDynamicSlots
Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI.
Definition: IfxEray.h:214
IfxEray_ClearErrorFlag_efa
empty FIFO access event bit.
Definition: IfxEray.h:114
IfxEray_ClearErrorFlag_ccl
CHI command locked event.
Definition: IfxEray.h:111
IfxEray_StrobePosition_6
Sample count 6 for strobing.
Definition: IfxEray.h:335
IfxEray_setNetworkStartIdleTime
IFX_INLINE void IfxEray_setNetworkStartIdleTime(Ifx_ERAY *eray, uint16 networkStartIdleTime)
Sets network start Idle time.
Definition: IfxEray.h:1676
IfxEray_PocCommand_reset
command to controller to enter RESET
Definition: IfxEray.h:276
IfxEray_disableModule
IFX_INLINE void IfxEray_disableModule(Ifx_ERAY *eray)
Disables the ERAY module.
Definition: IfxEray.h:1218
IfxEray_setClusterDriftValues
IFX_INLINE void IfxEray_setClusterDriftValues(Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset)
Sets cluster drift values.
Definition: IfxEray.h:1541
IfxEray_PocState_integrationConsistencyCheck
controller entered integration consistency check state
Definition: IfxEray.h:304
IfxEray_ClockDivider_6
run mode clock divider 6
Definition: IfxEray.h:162
IfxEray_setChannelsReceiveDelay
IFX_INLINE void IfxEray_setChannelsReceiveDelay(Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay)
Sets receive delays on channels.
Definition: IfxEray.h:1518
IfxEray_setTransmitWakeupTimes
IFX_INLINE void IfxEray_setTransmitWakeupTimes(Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime)
Sets transmit wakeup times.
Definition: IfxEray.h:1786
IfxEray_ClearStatusFlag_mtsb
MTS receive channel B bit.
Definition: IfxEray.h:149
IfxEray_setFifoFilterConfigurations
IFX_INLINE void IfxEray_setFifoFilterConfigurations(Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter)
Sets FIFO filter configurations.
Definition: IfxEray.h:1607
IfxEray_StrobePosition
IfxEray_StrobePosition
Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP.
Definition: IfxEray.h:331
IfxEray_getOutputBufferBusySrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getOutputBufferBusySrcPtr(Ifx_ERAY *eray)
Gets the OBUSY service request.
Definition: IfxEray.h:1361
IfxEray_initTxPin
IFX_INLINE void IfxEray_initTxPin(const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxEray.h:1435
IfxEray_ExternalOffsetCorrection_6
external clock offset correction value 6
Definition: IfxEray.h:185
IfxEray_PocState_integrationListen
controller entered integration-listen state.
Definition: IfxEray.h:303
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxEray_ExternalRateCorrection_0
external clock rate correction value 0
Definition: IfxEray.h:202
IfxEray_Baudrate
IfxEray_Baudrate
Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP.
Definition: IfxEray.h:79
IfxEray_clearErrorFlag
IFX_INLINE void IfxEray_clearErrorFlag(Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag)
Clears the error flag requested.
Definition: IfxEray.h:1206
IfxEray_setFirstDynamicBuffer
IFX_INLINE void IfxEray_setFirstDynamicBuffer(Ifx_ERAY *eray, uint8 firstDynamicBuffer)
Sets first dynamic buffer.
Definition: IfxEray.h:1624
IfxEray_SuspendMode
IfxEray_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxEray.h:340
IfxEray_ExternalRateCorrection_6
external clock rate correction value 6
Definition: IfxEray.h:208
IfxEray_ExternalOffsetCorrection_1
external clock offset correction value 1
Definition: IfxEray.h:180
IfxEray_MaxSynchFrames_5
Maximum number of sync frames in a cluster are 5.
Definition: IfxEray.h:249
IfxEray_sendHeader
IFX_INLINE void IfxEray_sendHeader(Ifx_ERAY *eray, boolean headerTransfered)
sets the bit to send header in frame.
Definition: IfxEray.h:1472
IfxEray_getOutputBufferBusyShadowStatus
IFX_INLINE boolean IfxEray_getOutputBufferBusyShadowStatus(Ifx_ERAY *eray)
Gets the Output Buffer Shadow status.
Definition: IfxEray.h:1355
IfxEray_ExternalOffsetCorrection_5
external clock offset correction value 5
Definition: IfxEray.h:184
IfxEray_Channel_b
channel B
Definition: IfxEray.h:99
IfxEray_SlotConfig::bufferIndex
uint8 bufferIndex
buffer index in the Message RAM.
Definition: IfxEray.h:418
IfxEray_Rxd_In::module
Ifx_ERAY * module
Base address.
Definition: IfxEray_PinMap.h:58
IfxEray_Header::payloadLength
uint8 payloadLength
length of data section.
Definition: IfxEray.h:391
IfxEray_PocState_initializeSchedule
controller entered initialise schedule state
Definition: IfxEray.h:305
IfxEray_PocState_ready
controller entered ready state
Definition: IfxEray.h:286
IfxEray_ListenTimeOutNoise_14
listen Time-out noise 14
Definition: IfxEray.h:237
IfxEray_PocState_staruAborted
controller entered startup-abort state
Definition: IfxEray.h:306
IfxEray_setDecodingCorrectionValue
IFX_INLINE void IfxEray_setDecodingCorrectionValue(Ifx_ERAY *eray, uint8 decodingCorrection)
Sets decoding correction value.
Definition: IfxEray.h:1572
IfxEray_ClearStatusFlag_nmvc
network management vector bit.
Definition: IfxEray.h:137
IfxEray_setReceiveWakeupTimes
IFX_INLINE void IfxEray_setReceiveWakeupTimes(Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime)
Sets receive wakeup times.
Definition: IfxEray.h:1707
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxEray_Rxd_In
RXD pin mapping structure.
Definition: IfxEray_PinMap.h:56
IfxEray_setDynamicSlots
IFX_INLINE void IfxEray_setDynamicSlots(Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots)
Sets dynamic slots count and length.
Definition: IfxEray.h:1578
IfxEray_ReceivedHeader::nullFrameIndicator
uint8 nullFrameIndicator
0 : no data frame received; 1: atleast one data frame received.
Definition: IfxEray.h:404
IfxEray_Header::channelAFiltered
boolean channelAFiltered
channel A serves as a control for transmit and filter for receive buffers.
Definition: IfxEray.h:385
IfxEray_getErrorInterrupts
IFX_INLINE Ifx_ERAY_EIR IfxEray_getErrorInterrupts(Ifx_ERAY *eray)
Gets the error interrupt flags.
Definition: IfxEray.h:1244
IfxEray_MaxSynchFrames
IfxEray_MaxSynchFrames
Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM.
Definition: IfxEray.h:244
IfxEray_setMaxColdStartAttempts
IFX_INLINE void IfxEray_setMaxColdStartAttempts(Ifx_ERAY *eray, uint8 maxColdStartAttempts)
Sets the maximum cold start attempts for active state.
Definition: IfxEray.h:1641
IfxEray_TransmissionSlotMode
IfxEray_TransmissionSlotMode
Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM.
Definition: IfxEray.h:357
IfxEray_ListenTimeOutNoise_5
listen Time-out noise 5
Definition: IfxEray.h:228
IfxEray_PocState_integrationCheck
controller entered integration-check.
Definition: IfxEray.h:302
IfxEray_ExternalRate_noCorrection
No external correction control.
Definition: IfxEray.h:193
IfxEray_ClearErrorFlag_edb
error event on channel B.
Definition: IfxEray.h:121
IfxEray_ReceivedHeader::startupFrame
uint8 startupFrame
0 : received frame is not a startup frame ; 1 : receive frame is a startup frame. ...
Definition: IfxEray.h:406
IfxEray_ClearErrorFlag_iiba
illegal input buffer access event.
Definition: IfxEray.h:115
IfxEray_NodeId_a
Ifx_ERAY Node A.
Definition: IfxEray_cfg.h:89
IfxEray_Header::syncFrameIndicator
boolean syncFrameIndicator
whether sync frame is indicated or not.
Definition: IfxEray.h:394
IfxEray_PocCommand_config
command to controller to enter CONFIG
Definition: IfxEray.h:267
IfxEray_setChannelBInitialOffsets
IFX_INLINE void IfxEray_setChannelBInitialOffsets(Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset)
Sets channel B initial offstes.
Definition: IfxEray.h:1511
IfxEray_PocState_normalPassive
controller entered normal-passive state
Definition: IfxEray.h:288
IfxEray_setSlotActionPoints
IFX_INLINE void IfxEray_setSlotActionPoints(Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint)
Sets slots action points.
Definition: IfxEray.h:1730
IfxEray_PocState_wakeupStandby
controller entered wakeup standby state
Definition: IfxEray.h:292
IfxEray_ExternalRateCorrection_7
external clock rate correction value 7
Definition: IfxEray.h:209
IfxEray_setNetworkVectorLength
IFX_INLINE void IfxEray_setNetworkVectorLength(Ifx_ERAY *eray, uint32 networkVectorLength)
Sets network management vector length.
Definition: IfxEray.h:1682
IfxEray_ClearStatusFlag_wupb
wakeup pattern channel B bit.
Definition: IfxEray.h:148
IfxEray_setMessageBufferCount
IFX_INLINE void IfxEray_setMessageBufferCount(Ifx_ERAY *eray, uint8 numberOfMessageBuffers)
Sets number of message buffers.
Definition: IfxEray.h:1660
IfxEray_ExternalRateCorrection_5
external clock rate correction value 5
Definition: IfxEray.h:207
IfxEray_ClearErrorFlag
IfxEray_ClearErrorFlag
Selection of error flag to clear defined in MODULE_ERAY.EIR.U.
Definition: IfxEray.h:104
IfxEray_resetModule
IFX_EXTERN void IfxEray_resetModule(Ifx_ERAY *eray)
Resets the ERAY kernel.
Definition: IfxEray.c:227
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxEray_ListenTimeOutNoise_16
listen Time-out noise 16
Definition: IfxEray.h:239
IfxEray_ExternalRateCorrection_3
external clock rate correction value 3
Definition: IfxEray.h:205
IfxEray_PocState_defaultConfig
controller entered default config state
Definition: IfxEray.h:285
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxEray_ClearErrorFlag_eerr
ECC error event bit.
Definition: IfxEray.h:112
IfxEray_getPocState
IFX_INLINE IfxEray_PocState IfxEray_getPocState(Ifx_ERAY *eray)
Gets the current POC state.
Definition: IfxEray.h:1368
IfxEray_getAddress
IFX_EXTERN Ifx_ERAY * IfxEray_getAddress(IfxEray_Index eray)
Definition: IfxEray.c:151
IfxEray_ClearStatusFlag_ti1
timer1 service request bit.
Definition: IfxEray.h:139
IfxEray_ClockDivider_1
run mode clock divider 1
Definition: IfxEray.h:157
IfxEray_Header::channelBFiltered
boolean channelBFiltered
channel B serves as a control for transmit and filter for receive buffers.
Definition: IfxEray.h:386
IfxEray_MaxSynchFrames_4
Maximum number of sync frames in a cluster are 4.
Definition: IfxEray.h:248
IfxEray_IdleDynamicSlots_1
duration of dynamic slot idle phase is 1
Definition: IfxEray.h:217
IfxEray_getFifoStatus
IFX_INLINE Ifx_ERAY_FSR IfxEray_getFifoStatus(Ifx_ERAY *eray)
Gets the FIFO status.
Definition: IfxEray.h:1258
IfxEray_SlotConfig::headerTransfered
boolean headerTransfered
whether header is transfered from input buffers to Message RAM or not.
Definition: IfxEray.h:415
IfxEray_MaxSynchFrames_14
Maximum number of sync frames in a cluster are 14.
Definition: IfxEray.h:258
IfxEray_PocCommand
IfxEray_PocCommand
Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD.
Definition: IfxEray.h:264
IfxEray_ClearErrorFlag_tabb
transmission across channel B boundary flag.
Definition: IfxEray.h:123
IfxEray_MaxSynchFrames_9
Maximum number of sync frames in a cluster are 9.
Definition: IfxEray.h:253
IfxEray_PocState_wakeupDetect
controller entered wakeup-detection state
Definition: IfxEray.h:295
IfxEray_PocState_wakeupListen
controller entered wakeup-listen state
Definition: IfxEray.h:293
IfxEray_ReceivedHeader::cycleNumber
uint8 cycleNumber
cycle number in which frame is received.
Definition: IfxEray.h:407
IfxEray_ExternalRate_correctionAdded
External rate correction added to calculated correction.
Definition: IfxEray.h:195
IfxEray_ClearStatusFlag_rxi
receive service request bit.
Definition: IfxEray.h:134
IfxEray_ClockDivider_7
run mode clock divider 7
Definition: IfxEray.h:163
IfxEray_StrobePosition_5
Sample count 5 for strobing.
Definition: IfxEray.h:333
IfxEray_enableModule
IFX_INLINE void IfxEray_enableModule(Ifx_ERAY *eray)
Enables the ERAY module.
Definition: IfxEray.h:1228
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxEray_PocCommand_coldStart
command to controller to enter COLD_START
Definition: IfxEray.h:275
IfxEray_getNewDataInterruptStatus
IFX_INLINE boolean IfxEray_getNewDataInterruptStatus(Ifx_ERAY *eray, uint8 ndat)
Gets the new data interrupt buffers status.
Definition: IfxEray.h:1338
IfxEray_ListenTimeOutNoise_10
listen Time-out noise 10
Definition: IfxEray.h:233
IfxEray_IdleDynamicSlots_0
duration of dynamic slot idle phase is 0
Definition: IfxEray.h:216
IfxEray_ClockDivider_3
run mode clock divider 3
Definition: IfxEray.h:159
IfxEray_MaxSynchFrames_10
Maximum number of sync frames in a cluster are 10.
Definition: IfxEray.h:254
IfxEray_PocCommand_ready
command to controller to enter READY.
Definition: IfxEray.h:268
IfxEray_ListenTimeOutNoise_3
listen Time-out noise 3
Definition: IfxEray.h:226
IfxEray_PocState_coldStartListen
controller entered clod-start listen state
Definition: IfxEray.h:297
IfxEray_SuspendMode_soft
Soft Suspend.
Definition: IfxEray.h:344
IfxEray_readFrame
IFX_EXTERN void IfxEray_readFrame(Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers.
Definition: IfxEray.c:203
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxEray_PocState_wakeupSend
controller entered wakeup-send state
Definition: IfxEray.h:294
IfxEray_ListenTimeOutNoise_13
listen Time-out noise 13
Definition: IfxEray.h:236
IfxEray_clearAllFlags
IFX_EXTERN void IfxEray_clearAllFlags(Ifx_ERAY *eray)
Clears all the error flags.
Definition: IfxEray.c:123
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxEray_enableInterruptLines
IFX_EXTERN void IfxEray_enableInterruptLines(Ifx_ERAY *eray)
Enables all the Interrupt lines.
Definition: IfxEray.c:133
IfxEray_Index
IfxEray_Index
List of the available Eray resources.
Definition: IfxEray_cfg.h:79
IfxEray_getMessageBufferStatus1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus1SrcPtr(Ifx_ERAY *eray)
Gets the MBSC1 service request.
Definition: IfxEray.h:1317
IfxEray_ReceiveChannel_both
both channels for reception
Definition: IfxEray.h:314
IfxEray_cfg.h
ERAY on-chip implementation data.
IfxEray_ExternalOffset_correctionSubtracted
External offset correction subtracted from calculated correction.
Definition: IfxEray.h:171
IfxEray_ClearStatusFlag_tibc
transfer input buffer completion request bit.
Definition: IfxEray.h:140
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEray_clearStatusFlag
IFX_INLINE void IfxEray_clearStatusFlag(Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status flag requested.
Definition: IfxEray.h:1212
IfxEray_ListenTimeOutNoise_4
listen Time-out noise 4
Definition: IfxEray.h:227
IfxEray_BufferDirection
IfxEray_BufferDirection
wheather transmit buffer or receive buffer, defined in MODULE_ERAY0.WRHS1.B.CFG.
Definition: IfxEray.h:88
IfxEray_ClearErrorFlag_ltva
latest transmit violation flag on channel A .
Definition: IfxEray.h:119
IfxEray_setSuspendMode
IFX_INLINE void IfxEray_setSuspendMode(Ifx_ERAY *eray, IfxEray_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxEray.h:1750
IfxEray_setTransmittedFrames
IFX_INLINE void IfxEray_setTransmittedFrames(Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted)
Configures transmitted frames for startup and synchronization.
Definition: IfxEray.h:1794
IfxEray_changePocState
IFX_EXTERN boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state.
Definition: IfxEray.c:99
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxEray_Header::cycleCode
uint8 cycleCode
the cycle set used for cycle counter filtering.
Definition: IfxEray.h:384
IfxEray_ExternalRateCorrection_4
external clock rate correction value 4
Definition: IfxEray.h:206
IfxEray_readData
IFX_EXTERN void IfxEray_readData(Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers.
Definition: IfxEray.c:188
IfxEray_getWakeupPatternReceivedChannel
IFX_INLINE IfxEray_WakeupChannel IfxEray_getWakeupPatternReceivedChannel(Ifx_ERAY *eray)
Gets the received wakeup pattern channel.
Definition: IfxEray.h:1396
IfxEray_StrobePosition_4
Sample count 4 for strobing.
Definition: IfxEray.h:334
IfxEray_ListenTimeOutNoise_7
listen Time-out noise 7
Definition: IfxEray.h:230
IfxEray_ClearStatusFlag_wupa
wakeup pattern channel A bit.
Definition: IfxEray.h:146
IfxEray_setClockSynchErrorHalt
IFX_INLINE void IfxEray_setClockSynchErrorHalt(Ifx_ERAY *eray, boolean clockSyncErrorHalt)
lead to halt state in clock synch error.
Definition: IfxEray.h:1535
IfxEray_PocCommand_wakeup
command to controller to enter WAKEUP
Definition: IfxEray.h:269
IfxEray_SleepMode_enable
enables sleep mode
Definition: IfxEray.h:325
IfxEray_ClockDivider_4
run mode clock divider 4
Definition: IfxEray.h:160
IfxEray_setClockCorrectionCycles
IFX_INLINE void IfxEray_setClockCorrectionCycles(Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt)
Sets clock correction cycles for Passive and Halt.
Definition: IfxEray.h:1525
IfxEray_IdleDynamicSlots_2
duration of dynamic slot idle phase is 2
Definition: IfxEray.h:218
IfxEray_Header::frameId
uint16 frameId
slot ID of the selected Message Buffer.
Definition: IfxEray.h:383
IfxEray_ClearStatusFlag_sds
dynamic segment start bit.
Definition: IfxEray.h:145


iLLD_TC26B: IfxEray_Eray.c Source File

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IfxEray_Eray.c
Go to the documentation of this file.
1 /**
2 * \file IfxEray_Eray.c
3 * \brief ERAY ERAY details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxEray_Eray.h"
47 #include "Mtu/Std/IfxMtu.h"
48
49 /** \addtogroup IfxLld_Eray_Eray_Node
50 * \{ */
51
52 /******************************************************************************/
53 /*-----------------------Private Function Prototypes--------------------------*/
54 /******************************************************************************/
55
56 /** \brief Inialises the communication controller.
57 * \param eray pointer to ERAY Module handle.
58 * \param config pointer to communication controller config structure.
59 * \return None
60 */
61 IFX_STATIC void IfxEray_Eray_Node_initCommunicationController(IfxEray_Eray *eray, const IfxEray_Eray_ControllerConfig *config);
62
63 /** \brief Initialises the Global Timing Unit.
64 * \param eray pointer to ERAY Module handle.
65 * \param config global timing unit Configuration structure.
66 * \return None
67 */
68 IFX_STATIC void IfxEray_Eray_Node_initGTU(IfxEray_Eray *eray, const IfxEray_Eray_GTUConfig *config);
69
70 /** \brief Inialises the message RAM.
71 * \param eray pointer to ERAY Module handle.
72 * \param config pointer to message RAM config structure.
73 * \return None
74 */
75 IFX_STATIC void IfxEray_Eray_Node_initMessageRAM(IfxEray_Eray *eray, const IfxEray_Eray_MessageRAMConfig *config);
76
77 /** \} */
78
79 /******************************************************************************/
80 /*-------------------------Function Implementations---------------------------*/
81 /******************************************************************************/
82
83 void IfxEray_Eray_Node_init(IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
84 {
85 Ifx_ERAY *eraySFR = eray->eray;
86 // clear all the flags
87 IfxEray_clearAllFlags(eraySFR);
88
89 // set Communication Controller to config state
90 if (IfxEray_getPocState(eraySFR) != IfxEray_PocState_config)
91 {
92 IfxEray_changePocState(eraySFR, IfxEray_PocCommand_freeze);
93 IfxEray_waitForPocState(eraySFR, IfxEray_PocState_halt);
94 IfxEray_changePocState(eraySFR, IfxEray_PocCommand_config);
95 IfxEray_waitForPocState(eraySFR, IfxEray_PocState_defaultConfig);
96 IfxEray_changePocState(eraySFR, IfxEray_PocCommand_config);
97 IfxEray_waitForPocState(eraySFR, IfxEray_PocState_config);
98 }
99
100 // enable interrupt lines
101 IfxEray_enableInterruptLines(eraySFR);
102 IfxEray_setAutoDelayBuffers(eraySFR);
103 //configure message RAM ( slots and slot buffers )
104 IfxEray_Eray_Node_initMessageRAM(eray, &config->messageRAMConfig);
105 //configure communication controller for clock corrections
106 IfxEray_Eray_Node_initCommunicationController(eray, &config->controllerConfig);
107 // initialise the Node pins.
108 const IfxEray_Eray_Pins *pins = config->pins;
109
110 if (pins != NULL_PTR)
111 {
112 const IfxEray_Eray_NodeA *nodeAPins = pins->nodeAPins;
113
114 if (nodeAPins != NULL_PTR)
115 {
116 const IfxEray_Rxd_In *rx = nodeAPins->rxIn;
117
118 if (rx != NULL_PTR)
119 {
120 IfxEray_initRxPinWithPadLevel(rx, nodeAPins->rxInMode, nodeAPins->pinDriver);
121 }
122
123 const IfxEray_Txd_Out *tx = nodeAPins->txOut;
124
125 if (tx != NULL_PTR)
126 {
127 IfxEray_initTxPin(tx, nodeAPins->txOutMode, nodeAPins->pinDriver);
128 }
129
130 const IfxEray_Txen_Out *txEn = nodeAPins->txEnOut;
131
132 if (txEn != NULL_PTR)
133 {
134 IfxEray_initTxEnPin(txEn, nodeAPins->txEnOutMode, nodeAPins->pinDriver);
135 }
136 }
137
138 const IfxEray_Eray_NodeB *nodeBPins = pins->nodeBPins;
139
140 if (nodeBPins != NULL_PTR)
141 {
142 const IfxEray_Rxd_In *rx = nodeBPins->rxIn;
143
144 if (rx != NULL_PTR)
145 {
146 IfxEray_initRxPinWithPadLevel(rx, nodeBPins->rxInMode, nodeBPins->pinDriver);
147 }
148
149 const IfxEray_Txd_Out *tx = nodeBPins->txOut;
150
151 if (tx != NULL_PTR)
152 {
153 IfxEray_initTxPin(tx, nodeBPins->txOutMode, nodeBPins->pinDriver);
154 }
155
156 const IfxEray_Txen_Out *txEn = nodeBPins->txEnOut;
157
158 if (txEn != NULL_PTR)
159 {
160 IfxEray_initTxEnPin(txEn, nodeBPins->txEnOutMode, nodeBPins->pinDriver);
161 }
162 }
163 }
164
165 // set the Communication Controller to ready state
166 IfxEray_setPocReady(eraySFR);
167 }
168
169
170 IFX_STATIC void IfxEray_Eray_Node_initCommunicationController(IfxEray_Eray *eray, const IfxEray_Eray_ControllerConfig *config)
171 {
172 Ifx_ERAY *eraySFR = eray->eray;
173 //SUCC1
174 IfxEray_setTransmittedFrames(eraySFR, config->succ1Config.startupFrameTransmitted, config->succ1Config.syncFrameTransmitted);
175 IfxEray_setMaxColdStartAttempts(eraySFR, config->succ1Config.maxColdStartAttempts);
176 IfxEray_setActiveCyclePairs(eraySFR, config->succ1Config.numberOfCyclePairsForActive);
177 IfxEray_setWakeupPatternChannel(eraySFR, config->succ1Config.wakeupPatternChannel);
178 IfxEray_setTransmissionSlotMode(eraySFR, config->succ1Config.transmissionSlotMode);
179 IfxEray_setClockSynchErrorHalt(eraySFR, config->succ1Config.clockSyncErrorHalt);
180 IfxEray_setSymbolChannels(eraySFR, config->succ1Config.channelASymbolTransmitted, config->succ1Config.channelBSymbolTransmitted);
181 IfxEray_setNodeChannels(eraySFR, config->succ1Config.channelAConnectedNode, config->succ1Config.channelBConnectedNode);
182 //SUCC2
183 IfxEray_setListenTimeOuts(eraySFR, config->succ2Config.listenTimeOut, config->succ2Config.listenTimeOutNoise);
184 //SUCC3
185 IfxEray_setClockCorrectionCycles(eraySFR, config->succ3Config.clockCorrectionCyclesPassive, config->succ3Config.clockCorrectionCyclesHalt);
186 //NEMC
187 IfxEray_setNetworkVectorLength(eraySFR, config->networkVectorLength);
188 //PRTC1, PRTC2
189 IfxEray_setTransmissionStartTime(eraySFR, (uint8)config->prtc1Control.transmissionStartTime);
190 IfxEray_setCollisionAvoidanceDuration(eraySFR, config->prtc1Control.collisionAvoidanceDuration);
191 IfxEray_setStrobePosition(eraySFR, config->prtc1Control.strobePosition);
192 IfxEray_setBaudrate(eraySFR, config->prtc1Control.baudrate);
193 IfxEray_setReceiveWakeupTimes(eraySFR, config->prtc1Control.receiveWakeupTestDuration, config->prtc2Control.receiveWakeupIdleTime, config->prtc2Control.receiveWakeupLowTime
194 );
195 IfxEray_setTransmitWakeupTimes(eraySFR, config->prtc1Control.transmitWakeupRepetitions, config->prtc2Control.transmitWakeupIdleTime, config->prtc2Control.transmitWakeupLowTime);
196 //MHDC
197 IfxEray_setMessageHandlerConfigurations(eraySFR, config->staticFramepayload, config->latestTransmissionStart);
198 // GTU
199 IfxEray_Eray_Node_initGTU(eray, &config->gtuConfig);
200 }
201
202
203 void IfxEray_Eray_Node_initConfig(IfxEray_Eray_NodeConfig *config)
204 {
205 // Default node configurations buffer
206 const IfxEray_Eray_NodeConfig nodeConfig = {
207 .messageRAMConfig = {
208 .firstDynamicBuffer = 0,
209 .numberOfMessageBuffers = 0,
210 .fifoBufferStartIndex = 0x80,
211 .fifoDepth = 30,
212 .frameIdFilter = 0x7FD,
213 .receiveChannel = IfxEray_ReceiveChannel_a,
214 .rejectedFrameId = 2,
215 .filteredCycleNumber = 0,
216 .staticFifoDisabled = FALSE,
217 .fifoNullFramesRejected = FALSE,
218 .bufferReconfigEnabled = TRUE,
219 .fifoConfigured = FALSE
220 },
221
222 .controllerConfig = {
223 .networkVectorLength = 0x2,
224 .staticFramepayload = 0x4,
225 .latestTransmissionStart = 0x3F,
226
227 .prtc1Control = {
228 .transmissionStartTime = 0xA,
229 .collisionAvoidanceDuration = 0x61,
230 .strobePosition = IfxEray_StrobePosition_5,
231 .baudrate = IfxEray_Baudrate_10,
232 .receiveWakeupTestDuration = 0x8C,
233 .transmitWakeupRepetitions = 0x2
234 },
235
236 .prtc2Control = {
237 .receiveWakeupIdleTime = 0x2D,
238 .receiveWakeupLowTime = 0x12,
239 .transmitWakeupIdleTime = 0x2D,
240 .transmitWakeupLowTime = 0x12
241 },
242
243 .succ1Config = {
244 .channelAConnectedNode = TRUE,
245 .channelBConnectedNode = TRUE,
246 .channelASymbolTransmitted = FALSE,
247 .channelBSymbolTransmitted = FALSE,
248 .clockSyncErrorHalt = TRUE,
249 .transmissionSlotMode = IfxEray_TransmissionSlotMode_single,
250 .wakeupPatternChannel = IfxEray_WakeupChannel_a,
251 .numberOfCyclePairsForActive = 0x7,
252 .maxColdStartAttempts = 0x1F,
253 .syncFrameTransmitted = TRUE,
254 .startupFrameTransmitted = TRUE
255 },
256
257 .succ2Config = {
258 .listenTimeOut = 0x13972,
259 .listenTimeOutNoise = IfxEray_ListenTimeOutNoise_16
260 },
261
262 .succ3Config = {
263 .clockCorrectionCyclesPassive = 0x1,
264 .clockCorrectionCyclesHalt = 0x1
265 },
266
267 .gtuConfig = {
268 .gtu01Config.microticksPerCycle = 0x9C40,
269
270 .gtu02Config = {
271 .macroticksPerCycle = 0x3E8,
272 .maxSyncFrames = 0x4
273 },
274
275 .gtu03Config = {
276 .channelAMicrotickInitialOffset = 0x19,
277 .channelBMicrotickInitialOffset = 0x19,
278 .channelAMacrotickInitialOffset = 0xA,
279 .channelBMacrotickInitialOffset = 0x2
280 },
281
282 .gtu04Config = {
283 .networkStartIdleTime = 0x38E,
284 .correctionOffset = 0x394
285 },
286
287 .gtu05Config = {
288 .channelAReceptionDelay = 0x4,
289 .channelBReceptionDelay = 0x4,
290 .clusterDrift = 1,
291 .decodingCorrection = 0x34
292 },
293
294 .gtu06Config = {
295 .acceptedStartupDeviation = 0x81,
296 .maxDriftOffset = 0xD2
297 },
298
299 .gtu07Config = {
300 .staticSlotLength = 0x32,
301 .staticSlotsCount = 0xC
302 },
303
304 .gtu08Config = {
305 .dynamicSlotLength = 4,
306 .dynamicSlotCount = 0x4B,
307 },
308
309 .gtu09Config = {
310 .idleDynamicSlots = IfxEray_IdleDynamicSlots_1,
311 .staticActionPoint = 8,
312 .dynamicActionPoint = 3
313 },
314
315 .gtu10Config = {
316 .maxOffsetCorrection = 0x32,
317 .maxRateCorrection = 0xD2
318 },
319
320 .gtu11Config = {
321 .externalOffsetCorrection = IfxEray_ExternalOffsetCorrection_0,
322 .externalRateCorrection = IfxEray_ExternalRateCorrection_0,
323 .externalOffset = IfxEray_ExternalOffset_noCorrection,
324 .externalRate = IfxEray_ExternalRate_noCorrection
325 },
326 },
327 },
328 .pins = NULL_PTR
329 };
330
331 *config = nodeConfig;
332 }
333
334
335 IFX_STATIC void IfxEray_Eray_Node_initGTU(IfxEray_Eray *eray, const IfxEray_Eray_GTUConfig *config)
336 {
337 Ifx_ERAY *eraySFR = eray->eray;
338
339 IfxEray_setCycleDurationMicroticks(eraySFR, config->gtu01Config.microticksPerCycle);
340 IfxEray_setCycleDurationMacroticks(eraySFR, config->gtu02Config.macroticksPerCycle);
341 IfxEray_setMaxSynchFrames(eraySFR, (IfxEray_MaxSynchFrames)config->gtu02Config.maxSyncFrames);
342 IfxEray_setChannelAInitialOffsets(eraySFR, config->gtu03Config.channelAMicrotickInitialOffset, config->gtu03Config.channelAMacrotickInitialOffset);
343 IfxEray_setChannelBInitialOffsets(eraySFR, config->gtu03Config.channelBMicrotickInitialOffset, config->gtu03Config.channelBMacrotickInitialOffset);
344 IfxEray_setNetworkStartIdleTime(eraySFR, config->gtu04Config.networkStartIdleTime);
345 IfxEray_setOffsetCorrection(eraySFR, config->gtu04Config.correctionOffset);
346 IfxEray_setChannelsReceiveDelay(eraySFR, config->gtu05Config.channelAReceptionDelay, config->gtu05Config.channelBReceptionDelay);
347 IfxEray_setDecodingCorrectionValue(eraySFR, config->gtu05Config.decodingCorrection);
348 IfxEray_setClusterDriftValues(eraySFR, config->gtu05Config.clusterDrift, config->gtu06Config.maxDriftOffset);
349 IfxEray_setClusterStartupDeviation(eraySFR, config->gtu06Config.acceptedStartupDeviation);
350 IfxEray_setStaticSlots(eraySFR, config->gtu07Config.staticSlotLength, config->gtu07Config.staticSlotsCount);
351 IfxEray_setDynamicSlots(eraySFR, config->gtu08Config.dynamicSlotLength, config->gtu08Config.dynamicSlotCount, config->gtu09Config.idleDynamicSlots);
352 IfxEray_setSlotActionPoints(eraySFR, config->gtu09Config.staticActionPoint, config->gtu09Config.dynamicActionPoint);
353 IfxEray_setMaxCorrectionValues(eraySFR, config->gtu10Config.maxOffsetCorrection, config->gtu10Config.maxRateCorrection);
354 IfxEray_setExternalCorrectionControl(eraySFR, config->gtu11Config.externalOffset, config->gtu11Config.externalRate);
355 IfxEray_setExternalCorrectionValues(eraySFR, config->gtu11Config.externalOffsetCorrection, config->gtu11Config.externalRateCorrection);
356 }
357
358
359 IFX_STATIC void IfxEray_Eray_Node_initMessageRAM(IfxEray_Eray *eray, const IfxEray_Eray_MessageRAMConfig *config)
360 {
361 Ifx_ERAY *eraySFR = eray->eray;
362 uint32 bufferCount;
363 //group of Message Buffers exclusively for the static segment configured
364 IfxEray_setFirstDynamicBuffer(eraySFR, config->firstDynamicBuffer);
365 /* Last Configured Buffer
366 * 01H..7FH: Number of Message Buffers is LCB + 1
367 * 80H..FFH: No Message Buffer configured
368 */
369 IfxEray_setMessageBufferCount(eraySFR, config->numberOfMessageBuffers);
370
371 // receive FIFO buffers configuration
372 if (config->fifoConfigured == TRUE)
373 {
374 IfxEray_setFifoBufferStartIndex(eraySFR, (uint8)config->fifoBufferStartIndex);
375 IfxEray_setFifoMessageBufferConfigurations(eraySFR, config->receiveChannel, config->staticFifoDisabled, config->fifoDepth);
376 IfxEray_setFifoFilterConfigurations(eraySFR, config->rejectedFrameId, config->filteredCycleNumber, config->fifoNullFramesRejected, config->frameIdFilter);
377 }
378 else
379 {
380 // FIFO is not supported. No message buffers assigned to the FIFO, if FFB >= 128
381 IfxEray_setFifoBufferStartIndex(eraySFR, (uint8)config->fifoBufferStartIndex);
382 }
383
384 if (config->bufferReconfigEnabled == TRUE)
385 {
386 //buffers reconfigured
387 IfxEray_setBufferReconfigSecure(eraySFR, 0);
388 }
389 else
390 {
391 //buffer reconfiguration locked
392 IfxEray_setBufferReconfigSecure(eraySFR, 2);
393 }
394
395 for (bufferCount = 0; bufferCount < config->numberOfMessageBuffers; bufferCount++)
396 {
397 IfxEray_setSlot(eraySFR, config->header[bufferCount], config->data[bufferCount], config->slotControl[bufferCount]);
398 }
399 }
400
401
402 void IfxEray_Eray_initModule(IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
403 {
404 eray->eray = config->module;
405 Ifx_ERAY *eraySFR = config->module;
406 // Enable MTU clock
407 {
408 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
409 IfxScuWdt_clearCpuEndinit(password);
410 IfxMtu_enableModule();
411 IfxScuWdt_setCpuEndinit(password);
412 }
413 // clear RAMS
414 {
415 uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
416 IfxScuWdt_clearSafetyEndinit(password);
417 IfxMtu_clearSram(IfxMtu_MbistSel_erayObf);
418 IfxMtu_clearSram(IfxMtu_MbistSel_erayIbfTbf);
419 IfxMtu_clearSram(IfxMtu_MbistSel_erayMbf);
420
421 IfxScuWdt_setSafetyEndinit(password);
422 }
423
424 {
425 IfxEray_enableModule(eraySFR);
426 }
427
428 /** NOTE: If not DMA, the interrupt service provider is assigned to the CPU ID where
429 * this function is called from */
430 {
431 if ((config->interrupt.int0Priority != 0) || (config->interrupt.int0IsrProvider == IfxSrc_Tos_dma))
432 {
433 volatile Ifx_SRC_SRCR *src = IfxEray_getInterruptLine0SrcPtr(eraySFR);
434 IfxSrc_init(src, config->interrupt.int0IsrProvider, config->interrupt.int0Priority);
435 IfxSrc_enable(src);
436 }
437
438 if ((config->interrupt.int1Priority != 0) || (config->interrupt.int1IsrProvider == IfxSrc_Tos_dma))
439 {
440 volatile Ifx_SRC_SRCR *src = IfxEray_getInterruptLine1SrcPtr(eraySFR);
441 IfxSrc_init(src, config->interrupt.int1IsrProvider, config->interrupt.int1Priority);
442 IfxSrc_enable(src);
443 }
444
445 if ((config->interrupt.tint0Priority != 0) || (config->interrupt.tint0IsrProvider == IfxSrc_Tos_dma))
446 {
447 volatile Ifx_SRC_SRCR *src = IfxEray_getTimerInterrupt0SrcPtr(eraySFR);
448 IfxSrc_init(src, config->interrupt.tint0IsrProvider, config->interrupt.tint0Priority);
449 IfxSrc_enable(src);
450 }
451
452 if ((config->interrupt.tint1Priority != 0) || (config->interrupt.tint1IsrProvider == IfxSrc_Tos_dma))
453 {
454 volatile Ifx_SRC_SRCR *src = IfxEray_getTimerInterrupt1SrcPtr(eraySFR);
455 IfxSrc_init(src, config->interrupt.tint1IsrProvider, config->interrupt.tint1Priority);
456 IfxSrc_enable(src);
457 }
458
459 if ((config->interrupt.mbsc0Priority != 0) || (config->interrupt.mbsc0IsrProvider == IfxSrc_Tos_dma))
460 {
461 volatile Ifx_SRC_SRCR *src = IfxEray_getMessageBufferStatus0SrcPtr(eraySFR);
462 IfxSrc_init(src, config->interrupt.mbsc0IsrProvider, config->interrupt.mbsc0Priority);
463 IfxSrc_enable(src);
464 }
465
466 if ((config->interrupt.mbsc1Priority != 0) || (config->interrupt.mbsc1IsrProvider == IfxSrc_Tos_dma))
467 {
468 volatile Ifx_SRC_SRCR *src = IfxEray_getMessageBufferStatus1SrcPtr(eraySFR);
469 IfxSrc_init(src, config->interrupt.mbsc1IsrProvider, config->interrupt.mbsc1Priority);
470 IfxSrc_enable(src);
471 }
472
473 if ((config->interrupt.ibusyPriority != 0) || (config->interrupt.ibusyIsrProvider == IfxSrc_Tos_dma))
474 {
475 volatile Ifx_SRC_SRCR *src = IfxEray_getInputBufferBusySrcPtr(eraySFR);
476 IfxSrc_init(src, config->interrupt.ibusyIsrProvider, config->interrupt.ibusyPriority);
477 IfxSrc_enable(src);
478 }
479
480 if ((config->interrupt.obusyPriority != 0) || (config->interrupt.obusyIsrProvider == IfxSrc_Tos_dma))
481 {
482 volatile Ifx_SRC_SRCR *src = IfxEray_getOutputBufferBusySrcPtr(eraySFR);
483 IfxSrc_init(src, config->interrupt.obusyIsrProvider, config->interrupt.obusyPriority);
484 IfxSrc_enable(src);
485 }
486
487 if ((config->interrupt.ndat0Priority != 0) || (config->interrupt.ndat0IsrProvider == IfxSrc_Tos_dma))
488 {
489 volatile Ifx_SRC_SRCR *src = IfxEray_getNewDataInterrupt0SrcPtr(eraySFR);
490 IfxSrc_init(src, config->interrupt.ndat0IsrProvider, config->interrupt.ndat0Priority);
491 IfxSrc_enable(src);
492 }
493
494 if ((config->interrupt.ndat1Priority != 0) || (config->interrupt.ndat1IsrProvider == IfxSrc_Tos_dma))
495 {
496 volatile Ifx_SRC_SRCR *src = IfxEray_getNewDataInterrupt1SrcPtr(eraySFR);
497 IfxSrc_init(src, config->interrupt.ndat1IsrProvider, config->interrupt.ndat1Priority);
498 IfxSrc_enable(src);
499 }
500 }
501 }
502
503
504 void IfxEray_Eray_initModuleConfig(IfxEray_Eray_Config *config, Ifx_ERAY *eray)
505 {
506 config->module = eray;
507 config->interrupt.int0IsrProvider = IfxSrc_Tos_cpu0;
508 config->interrupt.int1IsrProvider = IfxSrc_Tos_cpu0;
509 config->interrupt.tint0IsrProvider = IfxSrc_Tos_cpu0;
510 config->interrupt.tint1IsrProvider = IfxSrc_Tos_cpu0;
511 config->interrupt.ndat0IsrProvider = IfxSrc_Tos_cpu0;
512 config->interrupt.ndat1IsrProvider = IfxSrc_Tos_cpu0;
513 config->interrupt.mbsc0IsrProvider = IfxSrc_Tos_cpu0;
514 config->interrupt.mbsc1IsrProvider = IfxSrc_Tos_cpu0;
515 config->interrupt.ibusyIsrProvider = IfxSrc_Tos_cpu0;
516 config->interrupt.obusyIsrProvider = IfxSrc_Tos_cpu0;
517
518 config->interrupt.int0Priority = 0;
519 config->interrupt.int1Priority = 0;
520 config->interrupt.tint0Priority = 0;
521 config->interrupt.tint1Priority = 0;
522 config->interrupt.ndat0Priority = 0;
523 config->interrupt.ndat1Priority = 0;
524 config->interrupt.mbsc0Priority = 0;
525 config->interrupt.mbsc1Priority = 0;
526 config->interrupt.ibusyPriority = 0;
527 config->interrupt.obusyPriority = 0;
528 }
529
530
531 void IfxEray_Eray_receiveFifoFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
532 {
533 Ifx_ERAY *eraySFR = eray->eray;
534
535 Ifx_ERAY_FSR fifoStatus = IfxEray_getFifoStatus(eraySFR);
536
537 // Check if FIFO is not empty
538 if (fifoStatus.B.RFNE == 1)
539 {
540 if (fifoStatus.B.RFO == 1)
541 {
542 //FIX ME: FIFO overrun error
543 }
544 else
545 {
546 while (IfxEray_getOutputBufferBusyShadowStatus(eraySFR) == TRUE)
547 {}
548
549 IfxEray_receiveHeader(eraySFR, config->headerReceived);
550 IfxEray_receiveData(eraySFR, config->dataReceived);
551 //Transfer the first message buffer ID of FIFO
552 IfxEray_setRxBufferNumber(eraySFR, IfxEray_getFifoIndex(eraySFR));
553 IfxEray_setReceiveRequest(eraySFR, config->receiveRequested);
554
555 while (IfxEray_getOutputBufferBusyShadowStatus(eraySFR))
556 {}
557
558 if (config->swapRequested && (IfxEray_getOutputBuffer(eraySFR) != config->bufferIndex))
559 {
560 IfxEray_setViewData(eraySFR, config->swapRequested);
561 }
562 }
563 }
564 }
565
566
567 void IfxEray_Eray_receiveFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
568 {
569 Ifx_ERAY *eraySFR = eray->eray;
570
571 while (IfxEray_getOutputBufferBusyShadowStatus(eraySFR) == TRUE)
572 {}
573
574 IfxEray_receiveHeader(eraySFR, config->headerReceived);
575 IfxEray_receiveData(eraySFR, config->dataReceived);
576 IfxEray_setRxBufferNumber(eraySFR, config->bufferIndex);
577 IfxEray_setReceiveRequest(eraySFR, config->receiveRequested);
578
579 while (IfxEray_getOutputBufferBusyShadowStatus(eraySFR) == TRUE)
580 {}
581
582 if (config->swapRequested && (IfxEray_getOutputBuffer(eraySFR) != config->bufferIndex))
583 {
584 IfxEray_setViewData(eraySFR, config->swapRequested);
585 }
586 }
587
588
589 void IfxEray_Eray_transmitFrame(IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
590 {
591 Ifx_ERAY *eraySFR = eray->eray;
592
593 while (IfxEray_getInputBufferBusyHostStatus(eraySFR) == TRUE)
594 {}
595
596 IfxEray_sendHeader(eraySFR, transmitControl->headerTransfered);
597 IfxEray_sendData(eraySFR, transmitControl->dataTransfered);
598 IfxEray_setTransmitRequest(eraySFR, transmitControl->transferRequested);
599 IfxEray_setTxBufferNumber(eraySFR, transmitControl->bufferIndex);
600
601 while (IfxEray_getInputBufferBusyShadowStatus(eraySFR) == TRUE)
602 {}
603
604 while (IfxEray_getInputBufferBusyHostStatus(eraySFR) == TRUE)
605 {}
606 }
IfxEray_Eray_Gtu04Config::networkStartIdleTime
uint16 networkStartIdleTime
starting point of Network Idle Time Phase.
Definition: IfxEray_Eray.h:560
IfxEray_Txd_Out
TXD pin mapping structure.
Definition: IfxEray_PinMap.h:65
IfxEray_setCollisionAvoidanceDuration
IFX_INLINE void IfxEray_setCollisionAvoidanceDuration(Ifx_ERAY *eray, uint8 collisionAvoidanceDuration)
Sets CAS symbol window duration.
Definition: IfxEray.h:1554
IfxEray_Eray_initModuleConfig
void IfxEray_Eray_initModuleConfig(IfxEray_Eray_Config *config, Ifx_ERAY *eray)
Inialises the default module configuration buffer.
Definition: IfxEray_Eray.c:504
IfxEray_Eray_GTUConfig::gtu07Config
IfxEray_Eray_Gtu07Config gtu07Config
GTU07 configuration.
Definition: IfxEray_Eray.h:639
IfxEray_Eray_Succ3Config::clockCorrectionCyclesHalt
uint8 clockCorrectionCyclesHalt
maximum number of cycles missing clock correctionlead to active or passive to halt.
Definition: IfxEray_Eray.h:724
IfxEray_setSlot
void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots.
Definition: IfxEray.c:295
IfxMtu.h
MTU basic functionality.
IfxEray_ReceiveChannel_a
channel B for reception
Definition: IfxEray.h:316
IfxEray_Eray_NodeA::txEnOutMode
IfxPort_OutputMode txEnOutMode
the TXEN pin output mode which should be configured.
Definition: IfxEray_Eray.h:653
IfxEray_getOutputBuffer
IFX_INLINE uint8 IfxEray_getOutputBuffer(Ifx_ERAY *eray)
Gets the output buffer index.
Definition: IfxEray.h:1349
IfxEray_Eray_Interrupt::ndat0Priority
uint16 ndat0Priority
the new data interrupt 0 priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:754
IfxEray_Eray_Gtu05Config::decodingCorrection
uint8 decodingCorrection
decoding correction to determine the primary time reference point.
Definition: IfxEray_Eray.h:571
IfxEray_Eray_Interrupt::mbsc1Priority
uint16 mbsc1Priority
the message buffer status changed interrupt 1 priority. Always 1 since all interrupts are handled at ...
Definition: IfxEray_Eray.h:757
IfxEray_Baudrate_10
baudrate is 10MBits/Sec
Definition: IfxEray.h:81
IfxEray_setPocReady
void IfxEray_setPocReady(Ifx_ERAY *eray)
Sets the POC state to Ready state.
Definition: IfxEray.c:282
IfxEray_Eray_Config::module
Ifx_ERAY * module
pointer to ERAY module registers.
Definition: IfxEray_Eray.h:829
IfxEray_initRxPinWithPadLevel
IFX_INLINE void IfxEray_initRxPinWithPadLevel(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of pin direction as input and configuring pad driver...
Definition: IfxEray.h:1826
IfxEray_TransmissionSlotMode_single
transmission in key slot.
Definition: IfxEray.h:360
IfxEray_Eray_NodeA::rxIn
IFX_CONST IfxEray_Rxd_In * rxIn
the RX Pin which should be configured.
Definition: IfxEray_Eray.h:654
IfxMtu_MbistSel_erayObf
Definition: IfxMtu_cfg.h:103
IfxEray_Eray_Succ1Config::channelAConnectedNode
boolean channelAConnectedNode
whether the node is connected to channel A.
Definition: IfxEray_Eray.h:707
IfxEray_Eray_Succ1Config::transmissionSlotMode
IfxEray_TransmissionSlotMode transmissionSlotMode
Initial transmission mode.
Definition: IfxEray_Eray.h:703
IfxEray_setStaticSlots
IFX_INLINE void IfxEray_setStaticSlots(Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount)
Sets static slots count and length.
Definition: IfxEray.h:1737
IfxEray_Eray_initModule
void IfxEray_Eray_initModule(IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
Initialises the ERAY module with supplied configuration.
Definition: IfxEray_Eray.c:402
IfxEray_initTxEnPin
IFX_INLINE void IfxEray_initTxEnPin(const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver)
Initializes a TX Enable output.
Definition: IfxEray.h:1428
IfxEray_Eray_Gtu11Config::externalRate
IfxEray_ExternalRate externalRate
External rate correction control.
Definition: IfxEray_Eray.h:622
IfxEray_Eray_Interrupt::obusyPriority
uint16 obusyPriority
the output buffer interrupt priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:759
IfxEray_Eray_TransmitControl::headerTransfered
boolean headerTransfered
whether header section of frame is transfered or not.
Definition: IfxEray_Eray.h:865
IfxEray_receiveData
IFX_INLINE void IfxEray_receiveData(Ifx_ERAY *eray, boolean dataReceived)
requests to receive data from message buffer.
Definition: IfxEray.h:1454
IfxEray_Eray_MessageRAMConfig
Message RAM configuration structure.
Definition: IfxEray_Eray.h:774
IfxEray_setBufferReconfigSecure
IFX_INLINE void IfxEray_setBufferReconfigSecure(Ifx_ERAY *eray, uint8 secureValue)
Sets secured buffers in message RAM.
Definition: IfxEray.h:1498
IfxEray_Eray_GTUConfig::gtu01Config
IfxEray_Eray_Gtu01Config gtu01Config
GTU01 configuration.
Definition: IfxEray_Eray.h:633
IfxEray_Eray_Gtu03Config::channelBMacrotickInitialOffset
uint8 channelBMacrotickInitialOffset
difference between two adjacent static slots on channel B in macroticks.
Definition: IfxEray_Eray.h:553
IfxEray_Eray_NodeA::txEnOut
IFX_CONST IfxEray_Txen_Out * txEnOut
the TXEN Pin which should be configured.
Definition: IfxEray_Eray.h:656
IfxEray_waitForPocState
IFX_INLINE void IfxEray_waitForPocState(Ifx_ERAY *eray, IfxEray_PocState pocState)
Waits until the controller enters required POC state.
Definition: IfxEray.h:1819
IfxEray_Eray_NodeConfig
Node configuration structure.
Definition: IfxEray_Eray.h:835
IfxEray_Eray_Interrupt::ibusyPriority
uint16 ibusyPriority
the inputput buffer interrupt priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:758
IfxEray_setOffsetCorrection
IFX_INLINE void IfxEray_setOffsetCorrection(Ifx_ERAY *eray, uint16 correctionOffset)
Sets offset correction starting point.
Definition: IfxEray.h:1695
IfxEray_Eray_ControllerConfig::succ1Config
IfxEray_Eray_Succ1Config succ1Config
communication controller control properties.
Definition: IfxEray_Eray.h:739
IfxEray_Eray_Node_initConfig
void IfxEray_Eray_Node_initConfig(IfxEray_Eray_NodeConfig *config)
Initialises the default node configuration buffer.
Definition: IfxEray_Eray.c:203
IfxEray_setBaudrate
IFX_INLINE void IfxEray_setBaudrate(Ifx_ERAY *eray, IfxEray_Baudrate baudrate)
Sets baudrate on Flexray bus.
Definition: IfxEray.h:1492
IfxEray_Eray_Prtc2Control::receiveWakeupIdleTime
uint8 receiveWakeupIdleTime
duration of received wakeup symbol idle phase.
Definition: IfxEray_Eray.h:688
IfxEray_Eray_ControllerConfig::networkVectorLength
uint32 networkVectorLength
length of network management vector.
Definition: IfxEray_Eray.h:735
IfxEray_ExternalOffset_noCorrection
No external correction control.
Definition: IfxEray.h:170
IfxEray_Eray_Gtu10Config::maxOffsetCorrection
uint16 maxOffsetCorrection
maximum offset correction to be applied by the internal clock synchronization algorithm.
Definition: IfxEray_Eray.h:611
IfxEray_setClusterStartupDeviation
IFX_INLINE void IfxEray_setClusterStartupDeviation(Ifx_ERAY *eray, uint16 acceptedStartupDeviation)
Sets cluster startup deviation.
Definition: IfxEray.h:1548
IfxEray_setWakeupPatternChannel
IFX_INLINE void IfxEray_setWakeupPatternChannel(Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel)
Sets the cluster wakeup channel.
Definition: IfxEray.h:1813
IfxEray_Eray_Node_initMessageRAM
IFX_STATIC void IfxEray_Eray_Node_initMessageRAM(IfxEray_Eray *eray, const IfxEray_Eray_MessageRAMConfig *config)
Inialises the message RAM.
Definition: IfxEray_Eray.c:359
IfxMtu_clearSram
void IfxMtu_clearSram(IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit ...
Definition: IfxMtu.c:77
IfxEray_setTxBufferNumber
IFX_INLINE void IfxEray_setTxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
Sets the transmit buffer number.
Definition: IfxEray.h:1801
IfxMtu_MbistSel_erayMbf
Definition: IfxMtu_cfg.h:105
IfxEray_Txen_Out
TXEN pin mapping structure.
Definition: IfxEray_PinMap.h:74
IfxEray_Eray_Gtu09Config::staticActionPoint
uint8 staticActionPoint
static slots and symbol window action point.
Definition: IfxEray_Eray.h:602
IfxEray_getNewDataInterrupt0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt0SrcPtr(Ifx_ERAY *eray)
Gets the NDAT0 service request.
Definition: IfxEray.h:1324
IfxEray_Eray_TransmitControl::dataTransfered
boolean dataTransfered
whether data section of message buffer is transfered or not.
Definition: IfxEray_Eray.h:866
IfxEray_Eray_NodeConfig::controllerConfig
IfxEray_Eray_ControllerConfig controllerConfig
Communication Controller configuration structure.
Definition: IfxEray_Eray.h:838
IfxEray_Eray_Succ1Config::numberOfCyclePairsForActive
uint8 numberOfCyclePairsForActive
number of even / odd cycle pairs that must have valid clock correction terms.
Definition: IfxEray_Eray.h:701
IfxEray_Eray_Gtu03Config::channelAMicrotickInitialOffset
uint8 channelAMicrotickInitialOffset
difference between adjacent time reference points on channel A in microticks.
Definition: IfxEray_Eray.h:550
IfxEray_setActiveCyclePairs
IFX_INLINE void IfxEray_setActiveCyclePairs(Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive)
Sets number of cycle pairs for Active state.
Definition: IfxEray.h:1478
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEray_Eray_Succ1Config::channelASymbolTransmitted
boolean channelASymbolTransmitted
selects channel A for MTS symbol transmission.
Definition: IfxEray_Eray.h:705
IfxEray_Eray_receiveFrame
void IfxEray_Eray_receiveFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers header and data from message buffer to output buffer.
Definition: IfxEray_Eray.c:567
IfxEray_Eray_Interrupt::int1Priority
uint16 int1Priority
the interrupt line 1 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:751
IfxEray_WakeupChannel_a
send wakeup channel pattern on channel A
Definition: IfxEray.h:367
IfxEray_Eray_Gtu09Config::dynamicActionPoint
uint8 dynamicActionPoint
dynamic slots action point.
Definition: IfxEray_Eray.h:603
IfxEray_Eray_transmitFrame
void IfxEray_Eray_transmitFrame(IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
Transfers the frame in given slot.
Definition: IfxEray_Eray.c:589
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxEray_Eray_Interrupt::tint1IsrProvider
IfxSrc_Tos tint1IsrProvider
the timer interrupt line 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:763
IfxEray_Eray_Gtu11Config::externalOffsetCorrection
IfxEray_ExternalOffsetCorrection externalOffsetCorrection
External clock offset correction value.
Definition: IfxEray_Eray.h:619
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxEray_receiveHeader
IFX_INLINE void IfxEray_receiveHeader(Ifx_ERAY *eray, boolean headerReceived)
request to receive header section from message buffer.
Definition: IfxEray.h:1460
IfxEray_Eray_GTUConfig::gtu05Config
IfxEray_Eray_Gtu05Config gtu05Config
GTU05 configuration.
Definition: IfxEray_Eray.h:637
IfxEray_getInputBufferBusyHostStatus
IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus(Ifx_ERAY *eray)
Gets the Input Buffer Host Busy status.
Definition: IfxEray.h:1266
IfxEray_Eray_Prtc1Control::transmissionStartTime
uint16 transmissionStartTime
duration of transmission start time.
Definition: IfxEray_Eray.h:681
IfxEray_Eray_Interrupt::tint0Priority
uint16 tint0Priority
the timer interrupt 0 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:752
IfxEray_setTransmissionStartTime
IFX_INLINE void IfxEray_setTransmissionStartTime(Ifx_ERAY *eray, uint8 transmissionStartTime)
Sets transmission start time duration.
Definition: IfxEray.h:1774
IfxEray_setExternalCorrectionControl
IFX_INLINE void IfxEray_setExternalCorrectionControl(Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate)
Sets external correction controls.
Definition: IfxEray.h:1586
IfxEray_Eray_MessageRAMConfig::fifoDepth
uint8 fifoDepth
fifo critical level.
Definition: IfxEray_Eray.h:779
IfxEray_setTransmitRequest
IFX_INLINE void IfxEray_setTransmitRequest(Ifx_ERAY *eray, boolean transferRequested)
Sets transfer request to send frame.
Definition: IfxEray.h:1780
IfxEray_getTimerInterrupt0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt0SrcPtr(Ifx_ERAY *eray)
Gets the TINT0 service request.
Definition: IfxEray.h:1382
IfxEray_Eray_Gtu11Config::externalOffset
IfxEray_ExternalOffset externalOffset
External offset correction control.
Definition: IfxEray_Eray.h:621
IfxEray_setMessageHandlerConfigurations
IFX_INLINE void IfxEray_setMessageHandlerConfigurations(Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart)
Sets Message Handler configurations.
Definition: IfxEray.h:1666
IfxEray_Eray_MessageRAMConfig::fifoConfigured
boolean fifoConfigured
Whether receive FIFO configured or not.
Definition: IfxEray_Eray.h:787
IfxEray_Eray_GTUConfig::gtu11Config
IfxEray_Eray_Gtu11Config gtu11Config
GTU11 configuration.
Definition: IfxEray_Eray.h:643
IfxEray_Eray_ControllerConfig
Communication Controller configuration structure.
Definition: IfxEray_Eray.h:733
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEray_Eray_GTUConfig
Gloabl Timing Unit configuration structure.
Definition: IfxEray_Eray.h:631
IfxEray_Eray_Prtc2Control::receiveWakeupLowTime
uint8 receiveWakeupLowTime
duration of received wakeup symbol low phase.
Definition: IfxEray_Eray.h:689
IfxEray_PocState_halt
controller entered halt state
Definition: IfxEray.h:289
IfxEray_Eray_ControllerConfig::staticFramepayload
uint8 staticFramepayload
payload length of static frame in double bytes.
Definition: IfxEray_Eray.h:736
IfxEray_Eray_GTUConfig::gtu03Config
IfxEray_Eray_Gtu03Config gtu03Config
GTU03 configuration.
Definition: IfxEray_Eray.h:635
IfxEray_setMaxSynchFrames
IFX_INLINE void IfxEray_setMaxSynchFrames(Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames)
Sets maximum synch frames in a cluster.
Definition: IfxEray.h:1654
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxEray_setListenTimeOuts
IFX_INLINE void IfxEray_setListenTimeOuts(Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise)
Sets startup or wakeup listen timeouts.
Definition: IfxEray.h:1631
IfxEray_Eray_MessageRAMConfig::slotControl
IfxEray_SlotConfig * slotControl[128]
Transmit control properties.
Definition: IfxEray_Eray.h:789
IfxEray_sendData
IFX_INLINE void IfxEray_sendData(Ifx_ERAY *eray, boolean dataTransfered)
sets the bit to send data in frame.
Definition: IfxEray.h:1466
IfxEray_ExternalOffsetCorrection_0
external clock offset correction value 0
Definition: IfxEray.h:179
IfxEray_PocState_config
controller entered config state
Definition: IfxEray.h:291
IfxEray_Eray_GTUConfig::gtu06Config
IfxEray_Eray_Gtu06Config gtu06Config
GTU06 configuration.
Definition: IfxEray_Eray.h:638
IfxEray_setStrobePosition
IFX_INLINE void IfxEray_setStrobePosition(Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition)
Sets sample point for strobing.
Definition: IfxEray.h:1744
IfxEray_Eray_Succ2Config::listenTimeOut
uint32 listenTimeOut
wakeup or startup listen timeout in microticks.
Definition: IfxEray_Eray.h:715
IfxEray_Eray_GTUConfig::gtu09Config
IfxEray_Eray_Gtu09Config gtu09Config
GTU09 configuration.
Definition: IfxEray_Eray.h:641
IfxEray_Eray_Prtc1Control::strobePosition
IfxEray_StrobePosition strobePosition
sample count value for strobing.
Definition: IfxEray_Eray.h:677
IfxMtu_enableModule
IFX_INLINE void IfxMtu_enableModule(void)
Enables the MTU module.
Definition: IfxMtu.h:504
IfxEray_Eray_Gtu07Config::staticSlotsCount
uint16 staticSlotsCount
number of static slots in a communication cycle.
Definition: IfxEray_Eray.h:587
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:195
IfxEray_Eray_ControllerConfig::prtc1Control
IfxEray_Eray_Prtc1Control prtc1Control
protocol operation control properties.
Definition: IfxEray_Eray.h:742
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxEray_getInputBufferBusySrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInputBufferBusySrcPtr(Ifx_ERAY *eray)
Gets the IBUSY service request.
Definition: IfxEray.h:1278
IfxEray_Eray_Prtc2Control::transmitWakeupLowTime
uint8 transmitWakeupLowTime
duration of transmit wakeup symbol low phase.
Definition: IfxEray_Eray.h:691
IfxEray_Eray_NodeA::rxInMode
IfxPort_InputMode rxInMode
the RX pin input mode which should be configured
Definition: IfxEray_Eray.h:650
IfxEray_Eray_Gtu05Config::channelAReceptionDelay
uint8 channelAReceptionDelay
reception delay on channel A.
Definition: IfxEray_Eray.h:568
IfxEray_Eray_Succ1Config::startupFrameTransmitted
boolean startupFrameTransmitted
whether the key slot is used to transmit startup Frames.
Definition: IfxEray_Eray.h:698
IfxEray_getFifoIndex
IFX_INLINE uint8 IfxEray_getFifoIndex(Ifx_ERAY *eray)
Gets the FIFO index.
Definition: IfxEray.h:1252
IfxEray_Eray_Interrupt::mbsc0IsrProvider
IfxSrc_Tos mbsc0IsrProvider
the message buffer status changed interrupt 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:766
IfxEray_setAutoDelayBuffers
IFX_INLINE void IfxEray_setAutoDelayBuffers(Ifx_ERAY *eray)
Sets auto delays between input, output buffers and message RAM.
Definition: IfxEray.h:1484
IfxEray_Eray_Succ2Config::listenTimeOutNoise
IfxEray_ListenTimeOutNoise listenTimeOutNoise
upper limit for startup and wakeup listen timeout in the presence of noise.
Definition: IfxEray_Eray.h:716
IfxEray_setViewData
IFX_INLINE void IfxEray_setViewData(Ifx_ERAY *eray, boolean swapRequested)
Swaps the shadow and Host output registers.
Definition: IfxEray.h:1807
IfxEray_Eray_Config
Module configuration structure.
Definition: IfxEray_Eray.h:827
IfxEray_Eray_Interrupt::ndat1Priority
uint16 ndat1Priority
the new data interrupt 1 priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:755
IfxEray_setFifoBufferStartIndex
IFX_INLINE void IfxEray_setFifoBufferStartIndex(Ifx_ERAY *eray, uint8 fifoBufferStartIndex)
Sets FIFO buffer start idex.
Definition: IfxEray.h:1600
IfxEray_Eray_Interrupt::ndat1IsrProvider
IfxSrc_Tos ndat1IsrProvider
the new data interrupt 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:765
IfxEray_setRxBufferNumber
IFX_INLINE void IfxEray_setRxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
sets buffer number in which frame is received.
Definition: IfxEray.h:1715
IfxEray_setFifoMessageBufferConfigurations
IFX_INLINE void IfxEray_setFifoMessageBufferConfigurations(Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth)
Sets FIFO configurations.
Definition: IfxEray.h:1616
IfxEray_Eray_Interrupt::int0IsrProvider
IfxSrc_Tos int0IsrProvider
the interrupt line 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:760
IfxEray_setTransmissionSlotMode
IFX_INLINE void IfxEray_setTransmissionSlotMode(Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode)
Sets the transmit slot mode.
Definition: IfxEray.h:1768
IfxEray_getInputBufferBusyShadowStatus
IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus(Ifx_ERAY *eray)
Gets the Input Buffer Shadow status.
Definition: IfxEray.h:1272
IfxEray_getNewDataInterrupt1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt1SrcPtr(Ifx_ERAY *eray)
Gets the NDAT1 service request.
Definition: IfxEray.h:1331
IfxEray_setMaxCorrectionValues
IFX_INLINE void IfxEray_setMaxCorrectionValues(Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection)
Sets max limit correction values.
Definition: IfxEray.h:1647
IfxEray_setCycleDurationMicroticks
IFX_INLINE void IfxEray_setCycleDurationMicroticks(Ifx_ERAY *eray, uint32 microticks)
sets duration of the communication cycle in Microticks.
Definition: IfxEray.h:1566
IfxEray_Eray_NodeA::txOutMode
IfxPort_OutputMode txOutMode
the TX pin output mode which should be configured.
Definition: IfxEray_Eray.h:651
IfxEray_setReceiveRequest
IFX_INLINE void IfxEray_setReceiveRequest(Ifx_ERAY *eray, boolean receiveRequested)
requests to receive the frame.
Definition: IfxEray.h:1701
IfxEray_Eray_Succ3Config::clockCorrectionCyclesPassive
uint8 clockCorrectionCyclesPassive
maximum number of cycles missing clock correction lead active to passive state.
Definition: IfxEray_Eray.h:723
IfxEray_Eray_Interrupt::ndat0IsrProvider
IfxSrc_Tos ndat0IsrProvider
the new data interrupt 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:764
IfxEray_Eray_Succ1Config::maxColdStartAttempts
uint8 maxColdStartAttempts
maximum number of attempts that a cold starting node is permitted.
Definition: IfxEray_Eray.h:700
IfxEray_setCycleDurationMacroticks
IFX_INLINE void IfxEray_setCycleDurationMacroticks(Ifx_ERAY *eray, uint16 macroticks)
sets duration of the communication cycle in Macroticks.
Definition: IfxEray.h:1560
IfxEray_Eray_Gtu02Config::maxSyncFrames
uint8 maxSyncFrames
Maximum number of sync frames in a cluster.
Definition: IfxEray_Eray.h:543
IfxEray_getInterruptLine0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine0SrcPtr(Ifx_ERAY *eray)
Gets the INT0 service request.
Definition: IfxEray.h:1285
IfxEray_setNodeChannels
IFX_INLINE void IfxEray_setNodeChannels(Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode)
Sets channels connected to node.
Definition: IfxEray.h:1688
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:70
IfxEray_setChannelAInitialOffsets
IFX_INLINE void IfxEray_setChannelAInitialOffsets(Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset)
Sets channel A initial offstes.
Definition: IfxEray.h:1504
IfxEray_Eray_Gtu01Config::microticksPerCycle
uint32 microticksPerCycle
Duration of the communication cycle in Microticks.
Definition: IfxEray_Eray.h:535
IfxEray_PocCommand_freeze
command to controller to enter FREEZE
Definition: IfxEray.h:273
IfxEray_getInterruptLine1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine1SrcPtr(Ifx_ERAY *eray)
Gets the INT1 service request.
Definition: IfxEray.h:1292
IfxEray_Eray_ReceiveControl::bufferIndex
uint8 bufferIndex
buffer index in the Message RAM.
Definition: IfxEray_Eray.h:850
IfxEray_setExternalCorrectionValues
IFX_INLINE void IfxEray_setExternalCorrectionValues(Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection)
Sets external correction values.
Definition: IfxEray.h:1593
IfxEray_Eray_GTUConfig::gtu08Config
IfxEray_Eray_Gtu08Config gtu08Config
GTU08 configuration.
Definition: IfxEray_Eray.h:640
IfxEray_getTimerInterrupt1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt1SrcPtr(Ifx_ERAY *eray)
Gets the TINT1 service request.
Definition: IfxEray.h:1389
IfxEray_Eray_Interrupt::int0Priority
uint16 int0Priority
the interrupt line 0 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:750
IfxEray_Eray_Pins::nodeBPins
IFX_CONST IfxEray_Eray_NodeB * nodeBPins
Pins configuration structure for Node B.
Definition: IfxEray_Eray.h:802
IfxEray_Eray_ControllerConfig::latestTransmissionStart
uint8 latestTransmissionStart
number of dynamic slots before inhibit frame transmission in dynamic segment.
Definition: IfxEray_Eray.h:737
IfxEray_Eray_MessageRAMConfig::bufferReconfigEnabled
boolean bufferReconfigEnabled
whether reconfiguration of message buffers is enabled or not.
Definition: IfxEray_Eray.h:786
IfxEray_Eray_Succ1Config::wakeupPatternChannel
IfxEray_WakeupChannel wakeupPatternChannel
Wakeup pattern carry channel.
Definition: IfxEray_Eray.h:702
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxEray_getMessageBufferStatus0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus0SrcPtr(Ifx_ERAY *eray)
Gets the MBSC0 service request.
Definition: IfxEray.h:1310
IfxEray_Eray_receiveFifoFrame
void IfxEray_Eray_receiveFifoFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers frame from fifo in message RAM to Output buffer.
Definition: IfxEray_Eray.c:531
IfxEray_setSymbolChannels
IFX_INLINE void IfxEray_setSymbolChannels(Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted)
Sets channels which transmits symbols.
Definition: IfxEray.h:1761
IfxEray_Eray_ControllerConfig::succ3Config
IfxEray_Eray_Succ3Config succ3Config
clock correction fail properties.
Definition: IfxEray_Eray.h:741
IfxEray_Eray_Interrupt::tint0IsrProvider
IfxSrc_Tos tint0IsrProvider
the timer interrupt line 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:762
IfxEray_setNetworkStartIdleTime
IFX_INLINE void IfxEray_setNetworkStartIdleTime(Ifx_ERAY *eray, uint16 networkStartIdleTime)
Sets network start Idle time.
Definition: IfxEray.h:1676
IfxEray_Eray_MessageRAMConfig::fifoNullFramesRejected
boolean fifoNullFramesRejected
whether null frames stored in fifo or not.
Definition: IfxEray_Eray.h:785
IfxEray_setClusterDriftValues
IFX_INLINE void IfxEray_setClusterDriftValues(Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset)
Sets cluster drift values.
Definition: IfxEray.h:1541
IfxEray_setChannelsReceiveDelay
IFX_INLINE void IfxEray_setChannelsReceiveDelay(Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay)
Sets receive delays on channels.
Definition: IfxEray.h:1518
IfxEray_setTransmitWakeupTimes
IFX_INLINE void IfxEray_setTransmitWakeupTimes(Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime)
Sets transmit wakeup times.
Definition: IfxEray.h:1786
IfxEray_Eray_GTUConfig::gtu04Config
IfxEray_Eray_Gtu04Config gtu04Config
GTU04 configuration.
Definition: IfxEray_Eray.h:636
IfxEray_setFifoFilterConfigurations
IFX_INLINE void IfxEray_setFifoFilterConfigurations(Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter)
Sets FIFO filter configurations.
Definition: IfxEray.h:1607
IfxEray_getOutputBufferBusySrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getOutputBufferBusySrcPtr(Ifx_ERAY *eray)
Gets the OBUSY service request.
Definition: IfxEray.h:1361
IfxEray_initTxPin
IFX_INLINE void IfxEray_initTxPin(const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxEray.h:1435
IfxEray_Eray_ReceiveControl::dataReceived
boolean dataReceived
whether data selected for transfer from Message RAM to Output Buffer or not.
Definition: IfxEray_Eray.h:847
IfxEray_ExternalRateCorrection_0
external clock rate correction value 0
Definition: IfxEray.h:202
IfxEray_Eray_Gtu07Config::staticSlotLength
uint16 staticSlotLength
duration of static slot in macroticks.
Definition: IfxEray_Eray.h:586
IfxEray_Eray_Node_init
void IfxEray_Eray_Node_init(IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
Initialises the Node with supplied configuration.
Definition: IfxEray_Eray.c:83
IfxEray_Eray_Gtu08Config::dynamicSlotCount
uint16 dynamicSlotCount
number of dynamic slots in a communication cycle.
Definition: IfxEray_Eray.h:595
IfxEray_Eray_Prtc1Control::baudrate
IfxEray_Baudrate baudrate
baud rate on the flexray bus.
Definition: IfxEray_Eray.h:678
IfxEray_setFirstDynamicBuffer
IFX_INLINE void IfxEray_setFirstDynamicBuffer(Ifx_ERAY *eray, uint8 firstDynamicBuffer)
Sets first dynamic buffer.
Definition: IfxEray.h:1624
IfxEray_Eray_NodeConfig::pins
IFX_CONST IfxEray_Eray_Pins * pins
Pins configuration structure.
Definition: IfxEray_Eray.h:839
IfxEray_Eray_Interrupt::mbsc1IsrProvider
IfxSrc_Tos mbsc1IsrProvider
the message buffer status changed interrupt 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:767
IfxEray_Eray_Interrupt::int1IsrProvider
IfxSrc_Tos int1IsrProvider
the interrupt line 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:761
IfxEray_Eray::eray
Ifx_ERAY * eray
pointer to ERAY module registers.
Definition: IfxEray_Eray.h:813
IfxEray_sendHeader
IFX_INLINE void IfxEray_sendHeader(Ifx_ERAY *eray, boolean headerTransfered)
sets the bit to send header in frame.
Definition: IfxEray.h:1472
IfxEray_getOutputBufferBusyShadowStatus
IFX_INLINE boolean IfxEray_getOutputBufferBusyShadowStatus(Ifx_ERAY *eray)
Gets the Output Buffer Shadow status.
Definition: IfxEray.h:1355
IfxEray_Eray_Prtc1Control::transmitWakeupRepetitions
uint8 transmitWakeupRepetitions
duration of transmitted wakeup pattern in bit times.
Definition: IfxEray_Eray.h:680
IfxEray_Eray_Succ1Config::channelBConnectedNode
boolean channelBConnectedNode
whether the node is connected to channel B.
Definition: IfxEray_Eray.h:708
IfxEray_Eray_MessageRAMConfig::firstDynamicBuffer
uint8 firstDynamicBuffer
first dynamic buffer index.
Definition: IfxEray_Eray.h:776
IfxEray_Eray_Prtc1Control::collisionAvoidanceDuration
uint8 collisionAvoidanceDuration
accepted duration of collision avoidance symbol.
Definition: IfxEray_Eray.h:676
IfxEray_Eray_Succ1Config::channelBSymbolTransmitted
boolean channelBSymbolTransmitted
selects channel B for MTS symbol transmission
Definition: IfxEray_Eray.h:706
IfxEray_Eray_ReceiveControl::swapRequested
boolean swapRequested
whether output buffer shadow and output buffer host are swapped or not.
Definition: IfxEray_Eray.h:848
IfxEray_setDecodingCorrectionValue
IFX_INLINE void IfxEray_setDecodingCorrectionValue(Ifx_ERAY *eray, uint8 decodingCorrection)
Sets decoding correction value.
Definition: IfxEray.h:1572
IfxEray_Eray_Gtu05Config::channelBReceptionDelay
uint8 channelBReceptionDelay
reception delay on channel B.
Definition: IfxEray_Eray.h:569
IfxEray_Eray_NodeConfig::messageRAMConfig
IfxEray_Eray_MessageRAMConfig messageRAMConfig
Message RAM configuration structure.
Definition: IfxEray_Eray.h:837
IfxEray_setReceiveWakeupTimes
IFX_INLINE void IfxEray_setReceiveWakeupTimes(Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime)
Sets receive wakeup times.
Definition: IfxEray.h:1707
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxEray_Eray_GTUConfig::gtu02Config
IfxEray_Eray_Gtu02Config gtu02Config
GTU02 configuration.
Definition: IfxEray_Eray.h:634
IfxEray_Rxd_In
RXD pin mapping structure.
Definition: IfxEray_PinMap.h:56
IfxEray_setDynamicSlots
IFX_INLINE void IfxEray_setDynamicSlots(Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots)
Sets dynamic slots count and length.
Definition: IfxEray.h:1578
IfxEray_Eray_MessageRAMConfig::header
IfxEray_Header * header[128]
Header section of message buffer.
Definition: IfxEray_Eray.h:788
IfxEray_MaxSynchFrames
IfxEray_MaxSynchFrames
Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM.
Definition: IfxEray.h:244
IfxEray_setMaxColdStartAttempts
IFX_INLINE void IfxEray_setMaxColdStartAttempts(Ifx_ERAY *eray, uint8 maxColdStartAttempts)
Sets the maximum cold start attempts for active state.
Definition: IfxEray.h:1641
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:424
IfxEray_Eray_ReceiveControl::headerReceived
boolean headerReceived
whether header selected for transfer from Message RAM to Output Buffer or not.
Definition: IfxEray_Eray.h:846
IfxEray_ExternalRate_noCorrection
No external correction control.
Definition: IfxEray.h:193
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:253
IfxEray_Eray_Gtu08Config::dynamicSlotLength
uint8 dynamicSlotLength
duration of dynamic slot in macroticks.
Definition: IfxEray_Eray.h:594
IfxEray_Eray_MessageRAMConfig::staticFifoDisabled
boolean staticFifoDisabled
fifo is not used in static segment.
Definition: IfxEray_Eray.h:784
IfxEray_Eray_Node_initGTU
IFX_STATIC void IfxEray_Eray_Node_initGTU(IfxEray_Eray *eray, const IfxEray_Eray_GTUConfig *config)
Initialises the Global Timing Unit.
Definition: IfxEray_Eray.c:335
IfxEray_PocCommand_config
command to controller to enter CONFIG
Definition: IfxEray.h:267
IfxEray_setChannelBInitialOffsets
IFX_INLINE void IfxEray_setChannelBInitialOffsets(Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset)
Sets channel B initial offstes.
Definition: IfxEray.h:1511
IfxEray_Eray_Interrupt::ibusyIsrProvider
IfxSrc_Tos ibusyIsrProvider
the input buffer interrupt service provider. CPU or DMA.
Definition: IfxEray_Eray.h:768
IfxEray_setSlotActionPoints
IFX_INLINE void IfxEray_setSlotActionPoints(Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint)
Sets slots action points.
Definition: IfxEray.h:1730
IfxMtu_MbistSel_erayIbfTbf
Definition: IfxMtu_cfg.h:104
IfxEray_setNetworkVectorLength
IFX_INLINE void IfxEray_setNetworkVectorLength(Ifx_ERAY *eray, uint32 networkVectorLength)
Sets network management vector length.
Definition: IfxEray.h:1682
IfxEray_Eray_Pins::nodeAPins
IFX_CONST IfxEray_Eray_NodeA * nodeAPins
Pins configuration structure for Node A.
Definition: IfxEray_Eray.h:801
IfxEray_setMessageBufferCount
IFX_INLINE void IfxEray_setMessageBufferCount(Ifx_ERAY *eray, uint8 numberOfMessageBuffers)
Sets number of message buffers.
Definition: IfxEray.h:1660
IfxEray_Eray_Pins
Pins configuration structure.
Definition: IfxEray_Eray.h:799
IfxEray_ListenTimeOutNoise_16
listen Time-out noise 16
Definition: IfxEray.h:239
IfxEray_Eray_ReceiveControl
Receive control properties structure.
Definition: IfxEray_Eray.h:844
IfxEray_PocState_defaultConfig
controller entered default config state
Definition: IfxEray.h:285
IfxEray_Eray_MessageRAMConfig::fifoBufferStartIndex
uint32 fifoBufferStartIndex
message buffers assigned FIFO.
Definition: IfxEray_Eray.h:778
IfxEray_Eray_ControllerConfig::prtc2Control
IfxEray_Eray_Prtc2Control prtc2Control
wakeup symbol control properties.
Definition: IfxEray_Eray.h:743
IfxEray_Eray_MessageRAMConfig::data
uint32 * data[128]
data section of message buffer.
Definition: IfxEray_Eray.h:790
IfxEray_Eray_Gtu02Config::macroticksPerCycle
uint16 macroticksPerCycle
Duration of the communication cycle in Macroticks.
Definition: IfxEray_Eray.h:542
IfxEray_getPocState
IFX_INLINE IfxEray_PocState IfxEray_getPocState(Ifx_ERAY *eray)
Gets the current POC state.
Definition: IfxEray.h:1368
IfxEray_Eray_MessageRAMConfig::frameIdFilter
uint16 frameIdFilter
Frame ID used for rejection filtering.
Definition: IfxEray_Eray.h:780
IfxEray_Eray.h
ERAY ERAY details.
IfxEray_Eray_MessageRAMConfig::numberOfMessageBuffers
uint8 numberOfMessageBuffers
last configured buffer.
Definition: IfxEray_Eray.h:777
IfxEray_Eray_ReceiveControl::receiveRequested
boolean receiveRequested
Definition: IfxEray_Eray.h:849
IfxEray_Eray_Gtu10Config::maxRateCorrection
uint16 maxRateCorrection
maximum rate correction to be applied by the internal clock synchronization algorithm.
Definition: IfxEray_Eray.h:612
IfxEray_Eray_Succ1Config::clockSyncErrorHalt
boolean clockSyncErrorHalt
transition to HALT state due to a clock synchronization error.
Definition: IfxEray_Eray.h:704
IfxEray_IdleDynamicSlots_1
duration of dynamic slot idle phase is 1
Definition: IfxEray.h:217
IfxEray_Eray_MessageRAMConfig::receiveChannel
IfxEray_ReceiveChannel receiveChannel
FIFO receive channel.
Definition: IfxEray_Eray.h:781
IfxEray_getFifoStatus
IFX_INLINE Ifx_ERAY_FSR IfxEray_getFifoStatus(Ifx_ERAY *eray)
Gets the FIFO status.
Definition: IfxEray.h:1258
IfxEray_Eray_Succ1Config::syncFrameTransmitted
boolean syncFrameTransmitted
whether the key slot is used to transmit SYNC Frames.
Definition: IfxEray_Eray.h:699
IfxEray_Eray_NodeA::txOut
IFX_CONST IfxEray_Txd_Out * txOut
the TX Pin which should be configured.
Definition: IfxEray_Eray.h:655
IfxEray_Eray_NodeA
Pins configuration structure for Node A.
Definition: IfxEray_Eray.h:648
IfxEray_Eray_NodeB
Pins configuration structure for Node B.
Definition: IfxEray_Eray.h:661
IfxEray_Eray_TransmitControl::transferRequested
boolean transferRequested
whether frame in a slot is transfered or not.
Definition: IfxEray_Eray.h:867
IfxEray_StrobePosition_5
Sample count 5 for strobing.
Definition: IfxEray.h:333
IfxEray_enableModule
IFX_INLINE void IfxEray_enableModule(Ifx_ERAY *eray)
Enables the ERAY module.
Definition: IfxEray.h:1228
IfxEray_Eray_TransmitControl
Transfer control in a slot.
Definition: IfxEray_Eray.h:863
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxEray_Eray
ERAY Module handle.
Definition: IfxEray_Eray.h:811
IfxEray_Eray_NodeA::pinDriver
IfxPort_PadDriver pinDriver
the pad driver mode which should be configured.
Definition: IfxEray_Eray.h:652
IfxEray_Eray_Gtu05Config::clusterDrift
uint8 clusterDrift
cluster drift damping value used in clock synchronization.
Definition: IfxEray_Eray.h:570
IfxEray_Eray_Gtu11Config::externalRateCorrection
IfxEray_ExternalRateCorrection externalRateCorrection
External clock rate correction value.
Definition: IfxEray_Eray.h:620
IfxEray_Eray_Gtu09Config::idleDynamicSlots
IfxEray_IdleDynamicSlots idleDynamicSlots
duration of dynamic slot idle phase.
Definition: IfxEray_Eray.h:604
IfxEray_Eray_ControllerConfig::gtuConfig
IfxEray_Eray_GTUConfig gtuConfig
gloabl timing unit configuration structure.
Definition: IfxEray_Eray.h:738
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxEray_clearAllFlags
void IfxEray_clearAllFlags(Ifx_ERAY *eray)
Clears all the error flags.
Definition: IfxEray.c:123
IfxEray_enableInterruptLines
void IfxEray_enableInterruptLines(Ifx_ERAY *eray)
Enables all the Interrupt lines.
Definition: IfxEray.c:133
IfxEray_Eray_Interrupt::obusyIsrProvider
IfxSrc_Tos obusyIsrProvider
the output buffer interrupt service provider. CPU or DMA.
Definition: IfxEray_Eray.h:769
IfxEray_getMessageBufferStatus1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus1SrcPtr(Ifx_ERAY *eray)
Gets the MBSC1 service request.
Definition: IfxEray.h:1317
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEray_Eray_ControllerConfig::succ2Config
IfxEray_Eray_Succ2Config succ2Config
communication listen timeout properties.
Definition: IfxEray_Eray.h:740
IfxEray_Eray_Interrupt::mbsc0Priority
uint16 mbsc0Priority
the message buffer status changed interrupt 0 priority. Always 1 since all interrupts are handled at ...
Definition: IfxEray_Eray.h:756
IfxEray_setTransmittedFrames
IFX_INLINE void IfxEray_setTransmittedFrames(Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted)
Configures transmitted frames for startup and synchronization.
Definition: IfxEray.h:1794
IfxEray_changePocState
boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state.
Definition: IfxEray.c:99
IfxEray_Eray_GTUConfig::gtu10Config
IfxEray_Eray_Gtu10Config gtu10Config
GTU10 configuration.
Definition: IfxEray_Eray.h:642
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxEray_Eray_Gtu03Config::channelAMacrotickInitialOffset
uint8 channelAMacrotickInitialOffset
difference between two adjacent static slots on channel A in macroticks.
Definition: IfxEray_Eray.h:552
IfxEray_Eray_Gtu04Config::correctionOffset
uint16 correctionOffset
offset correction start point.
Definition: IfxEray_Eray.h:561
IfxEray_Eray_Prtc1Control::receiveWakeupTestDuration
uint8 receiveWakeupTestDuration
duration of received wakeup pattern in bit times.
Definition: IfxEray_Eray.h:679
IfxEray_Eray_Gtu06Config::maxDriftOffset
uint16 maxDriftOffset
maximum drift offset between two nodes.
Definition: IfxEray_Eray.h:579
IfxEray_setClockSynchErrorHalt
IFX_INLINE void IfxEray_setClockSynchErrorHalt(Ifx_ERAY *eray, boolean clockSyncErrorHalt)
lead to halt state in clock synch error.
Definition: IfxEray.h:1535
IfxEray_Eray_Prtc2Control::transmitWakeupIdleTime
uint8 transmitWakeupIdleTime
duration of transmit wakeup symbol idle phase.
Definition: IfxEray_Eray.h:690
IfxEray_Eray_MessageRAMConfig::filteredCycleNumber
uint8 filteredCycleNumber
the cycle set to which Frame ID and channel rejection filter are applied.
Definition: IfxEray_Eray.h:783
IfxEray_Eray_Gtu03Config::channelBMicrotickInitialOffset
uint8 channelBMicrotickInitialOffset
difference between adjacent time reference points on channel B in microticks.
Definition: IfxEray_Eray.h:551
IfxEray_Eray_MessageRAMConfig::rejectedFrameId
uint16 rejectedFrameId
frame ID to be rejected by the FIFO.
Definition: IfxEray_Eray.h:782
IfxEray_Eray_Interrupt::tint1Priority
uint16 tint1Priority
the timer interrupt 1 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:753
IfxEray_setClockCorrectionCycles
IFX_INLINE void IfxEray_setClockCorrectionCycles(Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt)
Sets clock correction cycles for Passive and Halt.
Definition: IfxEray.h:1525
IfxEray_Eray_Gtu06Config::acceptedStartupDeviation
uint16 acceptedStartupDeviation
expanded range of measured deviation for startup Frames during integration.
Definition: IfxEray_Eray.h:578
IfxEray_Eray_Node_initCommunicationController
IFX_STATIC void IfxEray_Eray_Node_initCommunicationController(IfxEray_Eray *eray, const IfxEray_Eray_ControllerConfig *config)
Inialises the communication controller.
Definition: IfxEray_Eray.c:170
IfxEray_Eray_Config::interrupt
IfxEray_Eray_Interrupt interrupt
Interrupt control properties.
Definition: IfxEray_Eray.h:830


iLLD_TC26B: IfxEray_Eray.h Source File

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IfxEray_Eray.h
Go to the documentation of this file.
1 /**
2 * \file IfxEray_Eray.h
3 * \brief ERAY ERAY details
4 * \ingroup IfxLld_Eray
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Eray_Eray_Usage How to use the ERAY Interface driver?
42 * \ingroup IfxLld_Eray
43 *
44 * \section IfxLld_Eray_Eray_Preparation Preparation
45 * \subsection IfxLld_Eray_Eray_Include Include Files
46 *
47 * Include following header file into your C code:
48 *
49 * \code
50 * #include <Eray/Eray/IfxEray_Eray.h>
51 * #include <Scu/Std/IfxScuWdt.h>
52 * #include <eray_commands.h>
53 * \endcode
54 *
55 *
56 *
57 * \subsection IfxLld_Eray_Eray_Defines Defines
58 * \code
59 *
60 * // Number of tested communication cycles
61 * #define NUMBER_ERAY_COMM_CYCLES 8
62 * #define NO_OF_SLOTS 2
63 * \endcode
64 *
65 * \subsection IfxLld_Eray_Eray_Variables Variables
66 *
67 * \code
68 * // global variables
69 * static IfxEray_Eray eray;
70 * volatile unsigned receivedDataCounter;
71 * uint32 receivedData[NUMBER_ERAY_COMM_CYCLES][NO_OF_SLOTS];
72 * \endcode
73 *
74 * \subsection IfxLld_Eray_Eray_Interrupt Interrupt Handler Installation
75 * Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
76 * \code
77 * #define IFX_ERAY_INT0_PRIO 1
78 * #define IFX_ERAY_INT1_PRIO 2
79 * #define IFX_ERAY_NDAT0_PRIO 3
80 * #define IFX_ERAY_NDAT1_PRIO 4
81 * #define IFX_ERAY_MBSC0_PRIO 5
82 * #define IFX_ERAY_MBSC1_PRIO 6
83 * \endcode
84 *
85 * Add the interrupt service routine to your C code. It has to call the ERAY interrupt handler:
86 * \code
87 * // ISR routines for interrupt handling
88 * void ERAY_irqInt0Handler();
89 * void ERAY_irqInt1Handler();
90 * void ERAY_irqNdat0Handler();
91 * void ERAY_irqNdat1Handler();
92 * void ERAY_irqMbsc0Handler();
93 * void ERAY_irqMbsc1Handler();
94 *
95 * IFX_INTERRUPT(eray0Int0ISR, 0, IFX_ERAY_INT0_PRIO)
96 * {
97 * ERAY_irqInt0Handler();
98 * }
99 * IFX_INTERRUPT(eray0Int1ISR, 0, IFX_ERAY_INT1_PRIO)
100 * {
101 * ERAY_irqInt1Handler();
102 * }
103 * IFX_INTERRUPT(eray0Ndat0ISR, 0, IFX_ERAY_NDAT0_PRIO)
104 * {
105 * ERAY_irqNdat0Handler();
106 * }
107 * IFX_INTERRUPT(eray0Ndat1ISR, 0, IFX_ERAY_NDAT1_PRIO)
108 * {
109 * ERAY_irqNdat1Handler();
110 * }
111 * IFX_INTERRUPT(eray0Mbsc0ISR, 0, IFX_ERAY_MBSC0_PRIO)
112 * {
113 * ERAY_irqMbsc0Handler();
114 * }
115 * IFX_INTERRUPT(eray0Mbsc1ISR, 0, IFX_ERAY_MBSC1_PRIO)
116 * {
117 * ERAY_irqMbsc1Handler();
118 * }
119 * \endcode
120 *
121 * Finally install the interrupt handlers in your initialisation function:
122 * \code
123 * // install interrupt handler
124 * IfxCpu_Irq_installInterruptHandler(&eray0Int0ISR, IFX_ERAY_INT0_PRIO);
125 * IfxCpu_Irq_installInterruptHandler(&eray0Int1ISR, IFX_ERAY_INT1_PRIO);
126 * IfxCpu_Irq_installInterruptHandler(&eray0Ndat0ISR, IFX_ERAY_NDAT0_PRIO);
127 * IfxCpu_Irq_installInterruptHandler(&eray0Ndat1ISR, IFX_ERAY_NDAT1_PRIO);
128 * IfxCpu_Irq_installInterruptHandler(&eray0Mbsc0ISR, IFX_ERAY_MBSC0_PRIO);
129 * IfxCpu_Irq_installInterruptHandler(&eray0Mbsc1ISR, IFX_ERAY_MBSC1_PRIO);
130 *
131 * // enable all cpu0 interrupts
132 * IfxCpu_enableInterrupts();
133 * \endcode
134 *
135 *
136 * \subsection IfxLld_Eray_Eray_Init Module Initialisation
137 *
138 * First ensure that the ERAY PLL is configured to output a 80 MHz clock for the ERAY module:
139 * \code
140 * // initialize Eray PLL
141 * //clib_ver_printf("Initialize ERAY PLL\n");
142 * {
143 * IfxScuCcu_ErayPllConfig ErayPllConfig;
144 * IfxScuCcu_initErayPllConfig(&ErayPllConfig);
145 * result |= IfxScuCcu_initErayPll(&ErayPllConfig);
146 * }
147 * \endcode
148 *
149 * Thereafter initialize the module:
150 * \code
151 * // create module config
152 * IfxEray_Eray_Config erayModuleConfig;
153 * #if TEST_ERAY1
154 * //clib_ver_printf("Initialize ERAY1\n");
155 * IfxEray_Eray_initModuleConfig(&erayModuleConfig, &MODULE_ERAY1);
156 * #else
157 * //clib_ver_printf("Initialize ERAY0\n");
158 * IfxEray_Eray_initModuleConfig(&erayModuleConfig, &MODULE_ERAY0);
159 * #endif
160 *
161 * // ISR priorities
162 * erayModuleConfig.interrupt.int0Priority = IFX_ERAY_INT0_PRIO;
163 * erayModuleConfig.interrupt.int1Priority = IFX_ERAY_INT1_PRIO;
164 * erayModuleConfig.interrupt.ndat0Priority = IFX_ERAY_NDAT0_PRIO;
165 * erayModuleConfig.interrupt.ndat1Priority = IFX_ERAY_NDAT1_PRIO;
166 * erayModuleConfig.interrupt.mbsc0Priority = IFX_ERAY_MBSC0_PRIO;
167 * erayModuleConfig.interrupt.mbsc1Priority = IFX_ERAY_MBSC1_PRIO;
168 *
169 * // init module
170 * IfxEray_Eray_initModule( &eray, &erayModuleConfig );
171 * \endcode
172 *
173 * Note: Application should explicitly configure the system DMA, if system DMA is selected as the service provider for the interrupt.
174 *
175 * \subsection IfxLld_Eray_Eray_Node_Init Node Initialisation
176 *
177 * The node initialisation can be done in the same function.
178 * \code
179 * // get ERAY node default configuration
180 * IfxEray_Eray_NodeConfig nodeConfig;
181 * IfxEray_Eray_Node_initConfig(&nodeConfig);
182 *
183 * // configuration changes for interaction with external testbench element
184 * {
185 * // only for simulation: start external ERAY node
186 * {
187 * TbeMessage reply;
188 *
189 * // start ERay Testbench Element
190 * sendMessage(MSG_ID_TESTBENCH_ERAY, CMD_ERAY_TBE_START, 0 );
191 * receiveMessageBlockingFrom(MSG_ID_TESTBENCH_ERAY, reply);
192 * }
193 *
194 * {
195 * // SUCC1
196 * IfxEray_Eray_Succ1Config *succ1 = &nodeConfig.controllerConfig.succ1Config;
197 *
198 * succ1->clockSyncErrorHalt = FALSE;
199 * }
200 *
201 * {
202 * // PRTC1
203 * IfxEray_Eray_Prtc1Control *prtc1 = &nodeConfig.controllerConfig.prtc1Control;
204 *
205 * prtc1->transmissionStartTime = 10;
206 * prtc1->collisionAvoidanceDuration = 0;
207 * prtc1->strobePosition = IfxEray_StrobePosition_5;
208 * prtc1->baudrate = IfxEray_Baudrate_10;
209 * prtc1->receiveWakeupTestDuration = 76;
210 * prtc1->transmitWakeupRepetitions = 2;
211 * }
212 *
213 * {
214 * // PRTC2
215 * IfxEray_Eray_Prtc2Control *prtc2 = &nodeConfig.controllerConfig.prtc2Control;
216 *
217 * prtc2->receiveWakeupIdleTime = 18;
218 * prtc2->receiveWakeupLowTime = 18;
219 * prtc2->transmitWakeupIdleTime = 180;
220 * prtc2->transmitWakeupLowTime = 60;
221 * }
222 *
223 * {
224 * // SUCC2
225 * IfxEray_Eray_Succ2Config *succ2 = &nodeConfig.controllerConfig.succ2Config;
226 * succ2->listenTimeOut = 2500;
227 * succ2->listenTimeOutNoise = IfxEray_ListenTimeOutNoise_16;
228 * }
229 *
230 * {
231 * // GTU
232 * IfxEray_Eray_GTUConfig *gtu = &nodeConfig.controllerConfig.gtuConfig;
233 *
234 * gtu->gtu01Config.microticksPerCycle = 3000;
235 * gtu->gtu02Config.macroticksPerCycle = 50;
236 * gtu->gtu02Config.maxSyncFrames = 15;
237 * gtu->gtu03Config.channelAMicrotickInitialOffset = 0;
238 * gtu->gtu03Config.channelBMicrotickInitialOffset = 0;
239 * gtu->gtu03Config.channelAMacrotickInitialOffset = 2;
240 * gtu->gtu03Config.channelBMacrotickInitialOffset = 2;
241 * gtu->gtu04Config.networkStartIdleTime = 0x2f;
242 * gtu->gtu04Config.correctionOffset = 0x30;
243 * gtu->gtu05Config.channelAReceptionDelay = 0x4;
244 * gtu->gtu05Config.channelBReceptionDelay = 0x4;
245 * gtu->gtu05Config.clusterDrift = 1;
246 * gtu->gtu05Config.decodingCorrection = 0x34;
247 * gtu->gtu06Config.acceptedStartupDeviation = 0x81;
248 * gtu->gtu06Config.maxDriftOffset = 0x31;
249 * gtu->gtu07Config.staticSlotLength = 0x10;
250 * gtu->gtu07Config.staticSlotsCount = 0x2;
251 * gtu->gtu08Config.dynamicSlotLength = 2;
252 * gtu->gtu08Config.dynamicSlotCount = 2;
253 * gtu->gtu09Config.idleDynamicSlots = IfxEray_IdleDynamicSlots_1; // bug: not set by IfxEray_setDynamicSlots
254 * gtu->gtu09Config.staticActionPoint = 1;
255 * gtu->gtu09Config.dynamicActionPoint = 1;
256 * gtu->gtu10Config.maxOffsetCorrection = 0xcd;
257 * gtu->gtu10Config.maxRateCorrection = 0x31;
258 * gtu->gtu11Config.externalOffsetCorrection = IfxEray_ExternalOffsetCorrection_0;
259 * gtu->gtu11Config.externalRateCorrection = IfxEray_ExternalRateCorrection_0;
260 * gtu->gtu11Config.externalOffset = IfxEray_ExternalOffset_noCorrection;
261 * gtu->gtu11Config.externalRate = IfxEray_ExternalRate_noCorrection;
262 * }
263 * }
264 *
265 * // Messages
266 * nodeConfig.messageRAMConfig.numberOfMessageBuffers = 2;
267 * nodeConfig.messageRAMConfig.firstDynamicBuffer = 0x40;
268 * nodeConfig.messageRAMConfig.fifoBufferStartIndex = 0x40;
269 *
270 * // Frame header
271 * IfxEray_Header header[2] = {
272 * // fid cyc cha chb buffer direction ppit transmission mode mbi pl dp startupfr syncfr
273 * { 1, 1, TRUE, TRUE, IfxEray_BufferDirection_transmit, TRUE, IfxEray_TransmissionMode_continuous, TRUE, 4, 0x30, TRUE, TRUE },
274 * { 2, 1, TRUE, TRUE, IfxEray_BufferDirection_receive, FALSE, IfxEray_TransmissionMode_continuous, TRUE, 4, 0x40, FALSE, FALSE },
275 * };
276 *
277 * // slot buffer
278 * IfxEray_SlotConfig slot[2] = {
279 * // header data stxrh buffNum
280 * { TRUE, TRUE, TRUE, 0 },
281 * { TRUE, FALSE, FALSE, 1 },
282 * };
283 *
284 * for(int i=0; i < 2; ++i) {
285 * nodeConfig.messageRAMConfig.header[i] = &header[i];
286 * nodeConfig.messageRAMConfig.slotControl[i] = &slot[i];
287 * nodeConfig.messageRAMConfig.data[i] = NULL_PTR;
288 * }
289 *
290 * #if TEST_ERAY1
291 * // channel A pins
292 * const IfxEray_Eray_NodeA nodeAPins = {
293 * IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
294 * IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
295 * &IfxEray1_RXDA0_P14_8_IN, &IfxEray1_TXDA_P14_10_OUT,
296 * &IfxEray1_TXENA_P14_9_OUT
297 * };
298 *
299 * // channel B pins
300 * const IfxEray_Eray_NodeB nodeBPins = {
301 * IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
302 * IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
303 * &IfxEray1_RXDB0_P14_7_IN, &IfxEray1_TXDB_P14_5_OUT,
304 * &IfxEray1_TXENB_P14_6_OUT
305 * };
306 * #else
307 * // channel A pins
308 * const IfxEray_Eray_NodeA nodeAPins = {
309 * IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
310 * IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
311 * &IfxEray0_RXDA0_P14_8_IN, &IfxEray0_TXDA_P14_10_OUT,
312 * &IfxEray0_TXENA_P14_9_OUT
313 * };
314 *
315 * // channel B pins
316 * const IfxEray_Eray_NodeB nodeBPins = {
317 * IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
318 * IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
319 * &IfxEray0_RXDB0_P14_7_IN, &IfxEray0_TXDB_P14_5_OUT,
320 * &IfxEray0_TXENB_P14_6_OUT
321 * };
322 * #endif
323 *
324 * const IfxEray_Eray_Pins pins = { (IfxEray_Eray_NodeA *)&nodeAPins, (IfxEray_Eray_NodeB *)&nodeBPins };
325 * nodeConfig.pins = (IfxEray_Eray_Pins *)&pins;
326 *
327 * // ERAY node initialisation with supplied configuration
328 * IfxEray_Eray_Node_init(&eray, &nodeConfig);
329 *
330 * // set interrupt outputs for data and message buffers
331 * IfxEray_Eray_setNewDataInterruptDestination(&eray, 0, 0); // New Data #0 -> NDAT0
332 * IfxEray_Eray_setNewDataInterruptDestination(&eray, 1, 1); // New Data #1 -> NDAT1
333 * IfxEray_Eray_setMessageBufferInterruptDestination(&eray, 0, 0); // Message Buffer #0 -> MBSC0
334 * IfxEray_Eray_setMessageBufferInterruptDestination(&eray, 1, 1); // Message Buffer #1 -> MBSC1
335 *
336 * //clib_ver_printf("Send wakeup pattern\n");
337 *
338 * // send wakeup pattern on default configured channel ( IfxEray_Channel_a )
339 * IfxEray_PocState pocState;
340 * do {
341 * pocState = IfxEray_Eray_getPocState( &eray );
342 * if ( pocState != IfxEray_PocState_wakeupListen ) {
343 * while ( !IfxEray_Eray_changePocState( &eray, IfxEray_PocCommand_wakeup ));
344 * }
345 * } while ( pocState != IfxEray_PocState_wakeupListen );
346 *
347 * // allow node to cold-start and wait until cold-start is successful
348 * while( !IfxEray_Eray_allowColdStart(&eray) );
349 *
350 * // start the communication in cluster and wait until communication is successfull
351 * while( !IfxEray_Eray_startCommunication(&eray) );
352 *
353 * // wait until communication Controller enters NORMAL_ACTIVE or NORMAL_PASSIVE state, exit if communication Controller enters HALT state.
354 * do {
355 * pocState = IfxEray_Eray_getPocState( &eray );
356 * // if communication Controller enters HALT state, break the loop.
357 * if( pocState == IfxEray_PocState_halt) {
358 * break;
359 * }
360 * } while( !((pocState == IfxEray_PocState_normalActive) || (pocState == IfxEray_PocState_normalPassive)) );
361 *
362 * // enter ALL_SLOTS mode when Communication Controller is in NORMAL_ACTIVE or NORMAL_PASSIVE state only.
363 * if ( pocState == IfxEray_PocState_normalActive || pocState == IfxEray_PocState_normalPassive ) {
364 * while ( !IfxEray_Eray_setPocAllSlots(&eray) );
365 * }
366 * \endcode
367 *
368 * \subsection IfxLld_Eray_Eray_TxRx Transactions
369 *
370 * \code
371 * unsigned prevReceivedDataCounter = 0;
372 * while( 1 ) {
373 * if( receivedDataCounter != prevReceivedDataCounter ) {
374 * prevReceivedDataCounter = receivedDataCounter;
375 * //clib_ver_printf("Received %d packets", receivedDataCounter);
376 *
377 * if( receivedDataCounter >= NUMBER_ERAY_COMM_CYCLES )
378 * break;
379 * }
380 * };
381 * \endcode
382 *
383 *
384 * \subsection IfxLld_Eray_Eray_ISR Interrupt Service Handlers
385 *
386 * The ISR has to be implemented in the application. Following templates can be used to react on the events:
387 *
388 * \code
389 * void ERAY_irqInt0Handler()
390 * {
391 * //clib_ver_note(1); // for debugging in simulation: notify Int0
392 *
393 * Ifx_ERAY_EIR ErrIntStat = IfxEray_Eray_getErrorInterrupts( &eray );
394 * Ifx_ERAY_SIR StatusIntStat = IfxEray_Eray_getStatusInterrupts( &eray );
395 *
396 * if(StatusIntStat.B.SDS)
397 * {
398 * // SDS must be cleared for getting the next interrupt
399 * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_sds );
400 * }
401 * if(StatusIntStat.B.CYCS)
402 * {
403 * // CYCS must be cleared for getting the next interrupt
404 * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_cycs );
405 * }
406 * if(StatusIntStat.B.SUCS)
407 * {
408 * // SUCS must be cleared for getting the next interrupt
409 * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_sucs );
410 * }
411 * if(StatusIntStat.B.TIBC)
412 * {
413 * // TIBC must be cleared for getting the next interrupt
414 * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_tibc );
415 * }
416 * if(ErrIntStat.B.MHF)
417 * {
418 * // clear flag MHF
419 * IfxEray_Eray_clearErrorFlag( &eray, IfxEray_ClearErrorFlag_mhf );
420 * }
421 * }
422 *
423 * void ERAY_irqInt1Handler()
424 * {
425 * //clib_ver_note(2); // for debugging in simulation: notify Int1
426 *
427 * // TOBC must be cleared for getting the next interrupt
428 * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_tobc );
429 * }
430 *
431 * void ERAY_irqNdat0Handler()
432 * {
433 * //clib_ver_note(3); // for debugging in simulation: notify Ndat0
434 * }
435 *
436 * void ERAY_irqNdat1Handler()
437 * {
438 * //clib_ver_note(4); // for debugging in simulation: notify Ndat1
439 *
440 * // message received in slot1 buffer?
441 * if( IfxEray_Eray_getNewDataInterruptStatus(&eray, 1) == 1 )
442 * {
443 * // read data
444 * uint32 data[2];
445 *
446 * {
447 * IfxEray_Eray_ReceiveControl config;
448 * config.headerReceived = TRUE;
449 * config.dataReceived = TRUE;
450 * config.receiveRequested = TRUE;
451 * config.swapRequested = TRUE;
452 * config.bufferIndex = 1;
453 *
454 * IfxEray_Eray_receiveFrame(&eray, &config);
455 * IfxEray_Eray_readData(&eray, data, 2*2);
456 * }
457 *
458 * // display received data (Here received data has to be displayed)
459 * //clib_ver_data(data[0]);
460 * //clib_ver_data(data[1]);
461 *
462 * // store received data
463 * if( receivedDataCounter < NUMBER_ERAY_COMM_CYCLES ) {
464 * receivedData[receivedDataCounter][0] = data[0];
465 * receivedData[receivedDataCounter][1] = data[1];
466 * }
467 * ++receivedDataCounter;
468 *
469 * // put some new data into slot0
470 * ++data[0];
471 * ++data[1];
472 *
473 * {
474 * IfxEray_Eray_TransmitControl config;
475 * config.headerTransfered = FALSE;
476 * config.dataTransfered = TRUE;
477 * config.transferRequested = TRUE;
478 * config.bufferIndex = 0;
479 *
480 * IfxEray_Eray_writeData(&eray, data, 2*2);
481 * IfxEray_Eray_transmitFrame(&eray, &config);
482 * }
483 * }
484 * }
485 *
486 * void ERAY_irqMbsc0Handler()
487 * {
488 * //clib_ver_note(5); // for debugging in simulation: notify Mbsc0
489 * }
490 *
491 * void ERAY_irqMbsc1Handler()
492 * {
493 * //clib_ver_note(6); // for debugging in simulation: notify Mbsc1
494 * }
495 * \endcode
496 *
497 * \defgroup IfxLld_Eray_Eray ERAY
498 * \ingroup IfxLld_Eray
499 * \defgroup IfxLld_Eray_Eray_Structures Data Structures
500 * \ingroup IfxLld_Eray_Eray
501 * \defgroup IfxLld_Eray_Eray_Module Module Initialisation Functions
502 * \ingroup IfxLld_Eray_Eray
503 * \defgroup IfxLld_Eray_Eray_Node Node Initialisation Functions
504 * \ingroup IfxLld_Eray_Eray
505 * \defgroup IfxLld_Eray_Eray_Operative Operative Functions
506 * \ingroup IfxLld_Eray_Eray
507 * \defgroup IfxLld_Eray_Eray_Status Status Functions
508 * \ingroup IfxLld_Eray_Eray
509 * \defgroup IfxLld_Eray_Eray_Interrupt Interrupt Functions
510 * \ingroup IfxLld_Eray_Eray
511 */
512
513 #ifndef IFXERAY_ERAY_H
514 #define IFXERAY_ERAY_H 1
515
516 /******************************************************************************/
517 /*----------------------------------Includes----------------------------------*/
518 /******************************************************************************/
519
520 #include "Eray/Std/IfxEray.h"
521 #include "Cpu/Std/IfxCpu.h"
522 #include "Scu/Std/IfxScuWdt.h"
523 #include "Scu/Std/IfxScuCcu.h"
524
525 /******************************************************************************/
526 /*-----------------------------Data Structures--------------------------------*/
527 /******************************************************************************/
528
529 /** \addtogroup IfxLld_Eray_Eray_Structures
530 * \{ */
531 /** \brief GTU01 configuration.
532 */
533 typedef struct
534 {
535 uint32 microticksPerCycle; /**< \brief Duration of the communication cycle in Microticks. */
536 } IfxEray_Eray_Gtu01Config;
537
538 /** \brief GTU02 configuration.
539 */
540 typedef struct
541 {
542 uint16 macroticksPerCycle; /**< \brief Duration of the communication cycle in Macroticks. */
543 uint8 maxSyncFrames; /**< \brief Maximum number of sync frames in a cluster. */
544 } IfxEray_Eray_Gtu02Config;
545
546 /** \brief GTU03 configuration.
547 */
548 typedef struct
549 {
550 uint8 channelAMicrotickInitialOffset; /**< \brief difference between adjacent time reference points on channel A in microticks. */
551 uint8 channelBMicrotickInitialOffset; /**< \brief difference between adjacent time reference points on channel B in microticks. */
552 uint8 channelAMacrotickInitialOffset; /**< \brief difference between two adjacent static slots on channel A in macroticks. */
553 uint8 channelBMacrotickInitialOffset; /**< \brief difference between two adjacent static slots on channel B in macroticks. */
554 } IfxEray_Eray_Gtu03Config;
555
556 /** \brief GTU04 configuration.
557 */
558 typedef struct
559 {
560 uint16 networkStartIdleTime; /**< \brief starting point of Network Idle Time Phase. */
561 uint16 correctionOffset; /**< \brief offset correction start point. */
562 } IfxEray_Eray_Gtu04Config;
563
564 /** \brief GTU05 configuration.
565 */
566 typedef struct
567 {
568 uint8 channelAReceptionDelay; /**< \brief reception delay on channel A. */
569 uint8 channelBReceptionDelay; /**< \brief reception delay on channel B. */
570 uint8 clusterDrift; /**< \brief cluster drift damping value used in clock synchronization. */
571 uint8 decodingCorrection; /**< \brief decoding correction to determine the primary time reference point. */
572 } IfxEray_Eray_Gtu05Config;
573
574 /** \brief GTU06 configuration.
575 */
576 typedef struct
577 {
578 uint16 acceptedStartupDeviation; /**< \brief expanded range of measured deviation for startup Frames during integration. */
579 uint16 maxDriftOffset; /**< \brief maximum drift offset between two nodes. */
580 } IfxEray_Eray_Gtu06Config;
581
582 /** \brief GTU07 configuration.
583 */
584 typedef struct
585 {
586 uint16 staticSlotLength; /**< \brief duration of static slot in macroticks. */
587 uint16 staticSlotsCount; /**< \brief number of static slots in a communication cycle. */
588 } IfxEray_Eray_Gtu07Config;
589
590 /** \brief GTU08 configuration.
591 */
592 typedef struct
593 {
594 uint8 dynamicSlotLength; /**< \brief duration of dynamic slot in macroticks. */
595 uint16 dynamicSlotCount; /**< \brief number of dynamic slots in a communication cycle. */
596 } IfxEray_Eray_Gtu08Config;
597
598 /** \brief GTU09 configuration.
599 */
600 typedef struct
601 {
602 uint8 staticActionPoint; /**< \brief static slots and symbol window action point. */
603 uint8 dynamicActionPoint; /**< \brief dynamic slots action point. */
604 IfxEray_IdleDynamicSlots idleDynamicSlots; /**< \brief duration of dynamic slot idle phase. */
605 } IfxEray_Eray_Gtu09Config;
606
607 /** \brief GTU10 configuration.
608 */
609 typedef struct
610 {
611 uint16 maxOffsetCorrection; /**< \brief maximum offset correction to be applied by the internal clock synchronization algorithm. */
612 uint16 maxRateCorrection; /**< \brief maximum rate correction to be applied by the internal clock synchronization algorithm. */
613 } IfxEray_Eray_Gtu10Config;
614
615 /** \brief GTU11 configuration.
616 */
617 typedef struct
618 {
619 IfxEray_ExternalOffsetCorrection externalOffsetCorrection; /**< \brief External clock offset correction value. */
620 IfxEray_ExternalRateCorrection externalRateCorrection; /**< \brief External clock rate correction value. */
621 IfxEray_ExternalOffset externalOffset; /**< \brief External offset correction control. */
622 IfxEray_ExternalRate externalRate; /**< \brief External rate correction control. */
623 } IfxEray_Eray_Gtu11Config;
624
625 /** \} */
626
627 /** \addtogroup IfxLld_Eray_Eray_Structures
628 * \{ */
629 /** \brief Gloabl Timing Unit configuration structure.
630 */
631 typedef struct
632 {
633 IfxEray_Eray_Gtu01Config gtu01Config; /**< \brief GTU01 configuration. */
634 IfxEray_Eray_Gtu02Config gtu02Config; /**< \brief GTU02 configuration. */
635 IfxEray_Eray_Gtu03Config gtu03Config; /**< \brief GTU03 configuration. */
636 IfxEray_Eray_Gtu04Config gtu04Config; /**< \brief GTU04 configuration. */
637 IfxEray_Eray_Gtu05Config gtu05Config; /**< \brief GTU05 configuration. */
638 IfxEray_Eray_Gtu06Config gtu06Config; /**< \brief GTU06 configuration. */
639 IfxEray_Eray_Gtu07Config gtu07Config; /**< \brief GTU07 configuration. */
640 IfxEray_Eray_Gtu08Config gtu08Config; /**< \brief GTU08 configuration. */
641 IfxEray_Eray_Gtu09Config gtu09Config; /**< \brief GTU09 configuration. */
642 IfxEray_Eray_Gtu10Config gtu10Config; /**< \brief GTU10 configuration. */
643 IfxEray_Eray_Gtu11Config gtu11Config; /**< \brief GTU11 configuration. */
644 } IfxEray_Eray_GTUConfig;
645
646 /** \brief Pins configuration structure for Node A.
647 */
648 typedef struct
649 {
650 IfxPort_InputMode rxInMode; /**< \brief the RX pin input mode which should be configured */
651 IfxPort_OutputMode txOutMode; /**< \brief the TX pin output mode which should be configured. */
652 IfxPort_PadDriver pinDriver; /**< \brief the pad driver mode which should be configured. */
653 IfxPort_OutputMode txEnOutMode; /**< \brief the TXEN pin output mode which should be configured. */
654 IFX_CONST IfxEray_Rxd_In *rxIn; /**< \brief the RX Pin which should be configured. */
655 IFX_CONST IfxEray_Txd_Out *txOut; /**< \brief the TX Pin which should be configured. */
656 IFX_CONST IfxEray_Txen_Out *txEnOut; /**< \brief the TXEN Pin which should be configured. */
657 } IfxEray_Eray_NodeA;
658
659 /** \brief Pins configuration structure for Node B.
660 */
661 typedef struct
662 {
663 IfxPort_InputMode rxInMode; /**< \brief the RX pin input mode which should be configured */
664 IfxPort_OutputMode txOutMode; /**< \brief the TX pin output mode which should be configured. */
665 IfxPort_PadDriver pinDriver; /**< \brief the pad driver mode which should be configured. */
666 IfxPort_OutputMode txEnOutMode; /**< \brief the TXEN pin output mode which should be configured. */
667 IFX_CONST IfxEray_Rxd_In *rxIn; /**< \brief the RX Pin which should be configured. */
668 IFX_CONST IfxEray_Txd_Out *txOut; /**< \brief the TX Pin which should be configured. */
669 IFX_CONST IfxEray_Txen_Out *txEnOut; /**< \brief the TXEN Pin which should be configured. */
670 } IfxEray_Eray_NodeB;
671
672 /** \brief Protocol operation control properties.
673 */
674 typedef struct
675 {
676 uint8 collisionAvoidanceDuration; /**< \brief accepted duration of collision avoidance symbol. */
677 IfxEray_StrobePosition strobePosition; /**< \brief sample count value for strobing. */
678 IfxEray_Baudrate baudrate; /**< \brief baud rate on the flexray bus. */
679 uint8 receiveWakeupTestDuration; /**< \brief duration of received wakeup pattern in bit times. */
680 uint8 transmitWakeupRepetitions; /**< \brief duration of transmitted wakeup pattern in bit times. */
681 uint16 transmissionStartTime; /**< \brief duration of transmission start time. */
682 } IfxEray_Eray_Prtc1Control;
683
684 /** \brief Wakeup symbol control properties.
685 */
686 typedef struct
687 {
688 uint8 receiveWakeupIdleTime; /**< \brief duration of received wakeup symbol idle phase. */
689 uint8 receiveWakeupLowTime; /**< \brief duration of received wakeup symbol low phase. */
690 uint8 transmitWakeupIdleTime; /**< \brief duration of transmit wakeup symbol idle phase. */
691 uint8 transmitWakeupLowTime; /**< \brief duration of transmit wakeup symbol low phase. */
692 } IfxEray_Eray_Prtc2Control;
693
694 /** \brief communication controller control properties.
695 */
696 typedef struct
697 {
698 boolean startupFrameTransmitted; /**< \brief whether the key slot is used to transmit startup Frames. */
699 boolean syncFrameTransmitted; /**< \brief whether the key slot is used to transmit SYNC Frames. */
700 uint8 maxColdStartAttempts; /**< \brief maximum number of attempts that a cold starting node is permitted. */
701 uint8 numberOfCyclePairsForActive; /**< \brief number of even / odd cycle pairs that must have valid clock correction terms. */
702 IfxEray_WakeupChannel wakeupPatternChannel; /**< \brief Wakeup pattern carry channel */
703 IfxEray_TransmissionSlotMode transmissionSlotMode; /**< \brief Initial transmission mode. */
704 boolean clockSyncErrorHalt; /**< \brief transition to HALT state due to a clock synchronization error. */
705 boolean channelASymbolTransmitted; /**< \brief selects channel A for MTS symbol transmission. */
706 boolean channelBSymbolTransmitted; /**< \brief selects channel B for MTS symbol transmission */
707 boolean channelAConnectedNode; /**< \brief whether the node is connected to channel A. */
708 boolean channelBConnectedNode; /**< \brief whether the node is connected to channel B. */
709 } IfxEray_Eray_Succ1Config;
710
711 /** \brief Communication listen timeout properties.
712 */
713 typedef struct
714 {
715 uint32 listenTimeOut; /**< \brief wakeup or startup listen timeout in microticks. */
716 IfxEray_ListenTimeOutNoise listenTimeOutNoise; /**< \brief upper limit for startup and wakeup listen timeout in the presence of noise. */
717 } IfxEray_Eray_Succ2Config;
718
719 /** \brief Clock correction fail properties.
720 */
721 typedef struct
722 {
723 uint8 clockCorrectionCyclesPassive; /**< \brief maximum number of cycles missing clock correction lead active to passive state. */
724 uint8 clockCorrectionCyclesHalt; /**< \brief maximum number of cycles missing clock correctionlead to active or passive to halt. */
725 } IfxEray_Eray_Succ3Config;
726
727 /** \} */
728
729 /** \addtogroup IfxLld_Eray_Eray_Structures
730 * \{ */
731 /** \brief Communication Controller configuration structure.
732 */
733 typedef struct
734 {
735 uint32 networkVectorLength; /**< \brief length of network management vector. */
736 uint8 staticFramepayload; /**< \brief payload length of static frame in double bytes. */
737 uint8 latestTransmissionStart; /**< \brief number of dynamic slots before inhibit frame transmission in dynamic segment. */
738 IfxEray_Eray_GTUConfig gtuConfig; /**< \brief gloabl timing unit configuration structure. */
739 IfxEray_Eray_Succ1Config succ1Config; /**< \brief communication controller control properties. */
740 IfxEray_Eray_Succ2Config succ2Config; /**< \brief communication listen timeout properties. */
741 IfxEray_Eray_Succ3Config succ3Config; /**< \brief clock correction fail properties. */
742 IfxEray_Eray_Prtc1Control prtc1Control; /**< \brief protocol operation control properties. */
743 IfxEray_Eray_Prtc2Control prtc2Control; /**< \brief wakeup symbol control properties. */
744 } IfxEray_Eray_ControllerConfig;
745
746 /** \brief Interrupt control properties.
747 */
748 typedef struct
749 {
750 uint16 int0Priority; /**< \brief the interrupt line 0 priority. Always 1 since all interrupts are handled at a time. */
751 uint16 int1Priority; /**< \brief the interrupt line 1 priority. Always 1 since all interrupts are handled at a time. */
752 uint16 tint0Priority; /**< \brief the timer interrupt 0 priority. Always 1 since all interrupts are handled at a time. */
753 uint16 tint1Priority; /**< \brief the timer interrupt 1 priority. Always 1 since all interrupts are handled at a time. */
754 uint16 ndat0Priority; /**< \brief the new data interrupt 0 priority. Always 1 since all interrupts are handled at a time. */
755 uint16 ndat1Priority; /**< \brief the new data interrupt 1 priority. Always 1 since all interrupts are handled at a time. */
756 uint16 mbsc0Priority; /**< \brief the message buffer status changed interrupt 0 priority. Always 1 since all interrupts are handled at a time. */
757 uint16 mbsc1Priority; /**< \brief the message buffer status changed interrupt 1 priority. Always 1 since all interrupts are handled at a time. */
758 uint16 ibusyPriority; /**< \brief the inputput buffer interrupt priority. Always 1 since all interrupts are handled at a time. */
759 uint16 obusyPriority; /**< \brief the output buffer interrupt priority. Always 1 since all interrupts are handled at a time. */
760 IfxSrc_Tos int0IsrProvider; /**< \brief the interrupt line 0 service provider. CPU or DMA. */
761 IfxSrc_Tos int1IsrProvider; /**< \brief the interrupt line 1 service provider. CPU or DMA. */
762 IfxSrc_Tos tint0IsrProvider; /**< \brief the timer interrupt line 0 service provider. CPU or DMA. */
763 IfxSrc_Tos tint1IsrProvider; /**< \brief the timer interrupt line 1 service provider. CPU or DMA. */
764 IfxSrc_Tos ndat0IsrProvider; /**< \brief the new data interrupt 0 service provider. CPU or DMA. */
765 IfxSrc_Tos ndat1IsrProvider; /**< \brief the new data interrupt 1 service provider. CPU or DMA. */
766 IfxSrc_Tos mbsc0IsrProvider; /**< \brief the message buffer status changed interrupt 0 service provider. CPU or DMA. */
767 IfxSrc_Tos mbsc1IsrProvider; /**< \brief the message buffer status changed interrupt 1 service provider. CPU or DMA. */
768 IfxSrc_Tos ibusyIsrProvider; /**< \brief the input buffer interrupt service provider. CPU or DMA. */
769 IfxSrc_Tos obusyIsrProvider; /**< \brief the output buffer interrupt service provider. CPU or DMA. */
770 } IfxEray_Eray_Interrupt;
771
772 /** \brief Message RAM configuration structure.
773 */
774 typedef struct
775 {
776 uint8 firstDynamicBuffer; /**< \brief first dynamic buffer index. */
777 uint8 numberOfMessageBuffers; /**< \brief last configured buffer. */
778 uint32 fifoBufferStartIndex; /**< \brief message buffers assigned FIFO. */
779 uint8 fifoDepth; /**< \brief fifo critical level. */
780 uint16 frameIdFilter; /**< \brief Frame ID used for rejection filtering. */
781 IfxEray_ReceiveChannel receiveChannel; /**< \brief FIFO receive channel. */
782 uint16 rejectedFrameId; /**< \brief frame ID to be rejected by the FIFO. */
783 uint8 filteredCycleNumber; /**< \brief the cycle set to which Frame ID and channel rejection filter are applied. */
784 boolean staticFifoDisabled; /**< \brief fifo is not used in static segment. */
785 boolean fifoNullFramesRejected; /**< \brief whether null frames stored in fifo or not. */
786 boolean bufferReconfigEnabled; /**< \brief whether reconfiguration of message buffers is enabled or not. */
787 boolean fifoConfigured; /**< \brief Whether receive FIFO configured or not. */
788 IfxEray_Header *header[128]; /**< \brief Header section of message buffer. */
789 IfxEray_SlotConfig *slotControl[128]; /**< \brief Transmit control properties. */
790 uint32 *data[128]; /**< \brief data section of message buffer. */
791 } IfxEray_Eray_MessageRAMConfig;
792
793 /** \} */
794
795 /** \addtogroup IfxLld_Eray_Eray_Node
796 * \{ */
797 /** \brief Pins configuration structure.
798 */
799 typedef struct
800 {
801 IFX_CONST IfxEray_Eray_NodeA *nodeAPins; /**< \brief Pins configuration structure for Node A. */
802 IFX_CONST IfxEray_Eray_NodeB *nodeBPins; /**< \brief Pins configuration structure for Node B. */
803 } IfxEray_Eray_Pins;
804
805 /** \} */
806
807 /** \addtogroup IfxLld_Eray_Eray_Structures
808 * \{ */
809 /** \brief ERAY Module handle.
810 */
811 typedef struct
812 {
813 Ifx_ERAY *eray; /**< \brief pointer to ERAY module registers. */
814 } IfxEray_Eray;
815
816 /** \brief Reconfigurable buffer structure.
817 */
818 typedef struct
819 {
820 IfxEray_Header *header; /**< \brief header of a reconfigurable buffer. */
821 uint32 data[64]; /**< \brief data section of a reconfigurable buffer. */
822 IfxEray_SlotConfig *slotControl; /**< \brief message buffer configuration in message RAM. */
823 } IfxEray_Eray_BufferReconfig;
824
825 /** \brief Module configuration structure
826 */
827 typedef struct
828 {
829 Ifx_ERAY *module; /**< \brief pointer to ERAY module registers. */
830 IfxEray_Eray_Interrupt interrupt; /**< \brief Interrupt control properties. */
831 } IfxEray_Eray_Config;
832
833 /** \brief Node configuration structure.
834 */
835 typedef struct
836 {
837 IfxEray_Eray_MessageRAMConfig messageRAMConfig; /**< \brief Message RAM configuration structure. */
838 IfxEray_Eray_ControllerConfig controllerConfig; /**< \brief Communication Controller configuration structure. */
839 IFX_CONST IfxEray_Eray_Pins *pins; /**< \brief Pins configuration structure. */
840 } IfxEray_Eray_NodeConfig;
841
842 /** \brief Receive control properties structure.
843 */
844 typedef struct
845 {
846 boolean headerReceived; /**< \brief whether header selected for transfer from Message RAM to Output Buffer or not. */
847 boolean dataReceived; /**< \brief whether data selected for transfer from Message RAM to Output Buffer or not. */
848 boolean swapRequested; /**< \brief whether output buffer shadow and output buffer host are swapped or not. */
849 boolean receiveRequested; /**< \brief */
850 uint8 bufferIndex; /**< \brief buffer index in the Message RAM. */
851 } IfxEray_Eray_ReceiveControl;
852
853 /** \brief Received Frame.
854 */
855 typedef struct
856 {
857 IfxEray_ReceivedHeader header; /**< \brief received header in a frame. */
858 uint32 data[64]; /**< \brief received data in a frame. */
859 } IfxEray_Eray_ReceivedFrame;
860
861 /** \brief Transfer control in a slot.
862 */
863 typedef struct
864 {
865 boolean headerTransfered; /**< \brief whether header section of frame is transfered or not. */
866 boolean dataTransfered; /**< \brief whether data section of message buffer is transfered or not. */
867 boolean transferRequested; /**< \brief whether frame in a slot is transfered or not. */
868 uint8 bufferIndex; /**< \brief buffer index which gives slot for transfers. */
869 } IfxEray_Eray_TransmitControl;
870
871 /** \} */
872
873 /** \addtogroup IfxLld_Eray_Eray_Module
874 * \{ */
875
876 /******************************************************************************/
877 /*-------------------------Inline Function Prototypes-------------------------*/
878 /******************************************************************************/
879
880 /** \brief De-initialises the ERAY module.
881 * \param eray pointer to module handle.
882 * \return None
883 *
884 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
885 *
886 */
887 IFX_INLINE void IfxEray_Eray_deInitModule(IfxEray_Eray *eray);
888
889 /******************************************************************************/
890 /*-------------------------Global Function Prototypes-------------------------*/
891 /******************************************************************************/
892
893 /** \brief Initialises the ERAY module with supplied configuration.
894 * \param eray pointer to ERAY Module handle.
895 * \param config pointer to module configuration structure.
896 * \return None
897 *
898 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
899 *
900 */
901 IFX_EXTERN void IfxEray_Eray_initModule(IfxEray_Eray *eray, const IfxEray_Eray_Config *config);
902
903 /** \brief Inialises the default module configuration buffer.
904 * \param config pointer to module configuration structure.
905 * \param eray pointer ERAY module registers.
906 * \return None
907 *
908 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
909 *
910 */
911 IFX_EXTERN void IfxEray_Eray_initModuleConfig(IfxEray_Eray_Config *config, Ifx_ERAY *eray);
912
913 /** \} */
914
915 /** \addtogroup IfxLld_Eray_Eray_Node
916 * \{ */
917
918 /******************************************************************************/
919 /*-------------------------Global Function Prototypes-------------------------*/
920 /******************************************************************************/
921
922 /** \brief Initialises the Node with supplied configuration.
923 * \param eray pointer to ERAY Module handle.
924 * \param config pointer to node configuration structure.
925 * \return None
926 *
927 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
928 *
929 */
930 IFX_EXTERN void IfxEray_Eray_Node_init(IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config);
931
932 /** \brief Initialises the default node configuration buffer.
933 * \param config pointer to node configuration structure.
934 * \return None
935 *
936 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
937 *
938 */
939 IFX_EXTERN void IfxEray_Eray_Node_initConfig(IfxEray_Eray_NodeConfig *config);
940
941 /** \} */
942
943 /** \addtogroup IfxLld_Eray_Eray_Operative
944 * \{ */
945
946 /******************************************************************************/
947 /*-------------------------Inline Function Prototypes-------------------------*/
948 /******************************************************************************/
949
950 /** \brief Allows node to enter the cold startup state.
951 * \param eray pointer to ERAY Module handle.
952 * \return TRUE if cold start successful otherwise FALSE.
953 *
954 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
955 *
956 */
957 IFX_INLINE boolean IfxEray_Eray_allowColdStart(IfxEray_Eray *eray);
958
959 /** \brief Reconfiguring the buffer or changing the slot.
960 * \param eray pointer to module handle.
961 * \param reconfigBuffer pointer reconfigurable buffer structure.
962 * \return None
963 *
964 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
965 *
966 */
967 IFX_INLINE void IfxEray_Eray_bufferReconfig(IfxEray_Eray *eray, IfxEray_Eray_BufferReconfig *reconfigBuffer);
968
969 /** \brief Changes the POC state and return status.
970 * \param eray pointer to module handle.
971 * \param PocCommand POC command to change state.
972 * \return TRUE if command accepted.
973 */
974 IFX_INLINE boolean IfxEray_Eray_changePocState(IfxEray_Eray *eray, IfxEray_PocCommand PocCommand);
975
976 /** \brief Reads the received data from output registers.
977 * \param eray pointer to module handle.
978 * \param data pointer to received data buffer.
979 * \param payloadLength payload length received in a frame.
980 * \return None
981 */
982 IFX_INLINE void IfxEray_Eray_readData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength);
983
984 /** \brief reads the frame received in a buffer.
985 * \param eray pointer to module handle.
986 * \param frame received frame in a buffer.
987 * \param maxPayloadLength maximum payload length received in a frame.
988 * \return None
989 *
990 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
991 *
992 */
993 IFX_INLINE void IfxEray_Eray_readFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceivedFrame *frame, Ifx_SizeT maxPayloadLength);
994
995 /** \brief Sets the Controller state to ALL Slots mode.
996 * \param eray pointer to module handle.
997 * \return TRUE if All slots mode is successful otherwise FALSE.
998 *
999 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1000 *
1001 */
1002 IFX_INLINE boolean IfxEray_Eray_setPocAllSlots(IfxEray_Eray *eray);
1003
1004 /** \brief Runs the communication controller.
1005 * \param eray pointer to ERAY Module handle.
1006 * \return TRUE if communication started otherwise FALSE.
1007 *
1008 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1009 *
1010 */
1011 IFX_INLINE boolean IfxEray_Eray_startCommunication(IfxEray_Eray *eray);
1012
1013 /** \brief Wakeups the channel in a cluster.
1014 * \param eray pointer to ERAY Module handle.
1015 * \param channel wakeup channel Id.
1016 * \return None
1017 *
1018 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1019 *
1020 */
1021 IFX_INLINE void IfxEray_Eray_wakeUpChannel(IfxEray_Eray *eray, IfxEray_Channel channel);
1022
1023 /** \brief Wakeups the node in a cluster.
1024 * \param eray pointer to ERAY Module handle.
1025 * \return TRUE if cluster is wakeup otherwise FALSE.
1026 *
1027 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1028 *
1029 */
1030 IFX_INLINE boolean IfxEray_Eray_wakeUpCluster(IfxEray_Eray *eray);
1031
1032 /** \brief Writes data section of a frame to input data registers.
1033 * \param eray pointer to module handle.
1034 * \param data data section in frame.
1035 * \param payloadLength payload length configured for slot buffer.
1036 * \return None
1037 *
1038 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1039 *
1040 */
1041 IFX_INLINE void IfxEray_Eray_writeData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength);
1042
1043 /******************************************************************************/
1044 /*-------------------------Global Function Prototypes-------------------------*/
1045 /******************************************************************************/
1046
1047 /** \brief Transfers frame from fifo in message RAM to Output buffer.
1048 * \param eray pointer to ERAY Module handle.
1049 * \param config pointer to receive control structure.
1050 * \return None
1051 *
1052 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1053 *
1054 */
1055 IFX_EXTERN void IfxEray_Eray_receiveFifoFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config);
1056
1057 /** \brief Transfers header and data from message buffer to output buffer.
1058 * \param eray pointer to ERAY Module handle.
1059 * \param config pointer to receive control structure.
1060 * \return None
1061 *
1062 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1063 *
1064 */
1065 IFX_EXTERN void IfxEray_Eray_receiveFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config);
1066
1067 /** \brief Transfers the frame in given slot.
1068 * \param eray pointer to module handle.
1069 * \param transmitControl transmits frame in a given slot.
1070 * \return None
1071 *
1072 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1073 *
1074 */
1075 IFX_EXTERN void IfxEray_Eray_transmitFrame(IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl);
1076
1077 /** \} */
1078
1079 /** \addtogroup IfxLld_Eray_Eray_Status
1080 * \{ */
1081
1082 /******************************************************************************/
1083 /*-------------------------Inline Function Prototypes-------------------------*/
1084 /******************************************************************************/
1085
1086 /** \brief Gets the current node controller POC state.
1087 * \param eray pointer to module handle.
1088 * \return current POC state.
1089 */
1090 IFX_INLINE IfxEray_PocState IfxEray_Eray_getPocState(IfxEray_Eray *eray);
1091
1092 /** \brief Gets the received wakeup pattern channel.
1093 * \param eray pointer to module handle.
1094 * \return received wakeup pattern channel.
1095 *
1096 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1097 *
1098 */
1099 IFX_INLINE IfxEray_WakeupChannel IfxEray_Eray_getWakeupPatternReceivedChannel(IfxEray_Eray *eray);
1100
1101 /** \} */
1102
1103 /** \addtogroup IfxLld_Eray_Eray_Interrupt
1104 * \{ */
1105
1106 /******************************************************************************/
1107 /*-------------------------Inline Function Prototypes-------------------------*/
1108 /******************************************************************************/
1109
1110 /** \brief clears the error interrupt flag requested.
1111 * \param eray pointer to module handle.
1112 * \param errorFlag error flag to be cleared.
1113 * \return None
1114 */
1115 IFX_INLINE void IfxEray_Eray_clearErrorFlag(IfxEray_Eray *eray, IfxEray_ClearErrorFlag errorFlag);
1116
1117 /** \brief Clears the status interrupt flag requested.
1118 * \param eray pointer to module handle.
1119 * \param statusFlag status flag to be cleared.
1120 * \return None
1121 */
1122 IFX_INLINE void IfxEray_Eray_clearStatusFlag(IfxEray_Eray *eray, IfxEray_ClearStatusFlag statusFlag);
1123
1124 /** \brief Gets the error interrupt status.
1125 * \param eray pointer to module handle.
1126 * \return error interrupt status.
1127 */
1128 IFX_INLINE Ifx_ERAY_EIR IfxEray_Eray_getErrorInterrupts(IfxEray_Eray *eray);
1129
1130 /** \brief Gets the message buffer interrupt status.
1131 * \param eray pointer to module handle.
1132 * \param messageBuffer message buffer to which interrupt status be checked.
1133 * \return message buffer interrupt status.
1134 */
1135 IFX_INLINE uint8 IfxEray_Eray_getMessageBufferInterruptStatus(IfxEray_Eray *eray, uint8 messageBuffer);
1136
1137 /** \brief Gets the new data interrupt buffers status.
1138 * \param eray pointer to module handle.
1139 * \param ndat ndat buffer to which interrupt status be checked.
1140 * \return ndat buffer interrupt status.
1141 */
1142 IFX_INLINE uint8 IfxEray_Eray_getNewDataInterruptStatus(IfxEray_Eray *eray, uint8 ndat);
1143
1144 /** \brief Gets the node status interrupts.
1145 * \param eray pointer to module handle.
1146 * \return node status interrupts.
1147 */
1148 IFX_INLINE Ifx_ERAY_SIR IfxEray_Eray_getStatusInterrupts(IfxEray_Eray *eray);
1149
1150 /** \brief Enables the message buffer interrupt line.
1151 * \param eray pointer to module handle.
1152 * \param messageBuffer message buffer interrupt which should be configured
1153 * \param messageBufferDestination selects MBSC0 or MBSC1 interrupt output
1154 * \return None
1155 *
1156 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1157 *
1158 */
1159 IFX_INLINE void IfxEray_Eray_setMessageBufferInterruptDestination(IfxEray_Eray *eray, uint8 messageBuffer, uint8 messageBufferDestination);
1160
1161 /** \brief Enables the NDAT buffer interrupt line.
1162 * \param eray pointer to module handle.
1163 * \param ndat message buffer number configured to which ndat interrupt line to be set.
1164 * \param ndatDestination selects NDAT0 or NDAT1 interrupt output
1165 * \return None
1166 *
1167 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1168 *
1169 */
1170 IFX_INLINE void IfxEray_Eray_setNewDataInterruptDestination(IfxEray_Eray *eray, uint8 ndat, uint8 ndatDestination);
1171
1172 /** \} */
1173
1174 /******************************************************************************/
1175 /*---------------------Inline Function Implementations------------------------*/
1176 /******************************************************************************/
1177
1178 IFX_INLINE boolean IfxEray_Eray_allowColdStart(IfxEray_Eray *eray)
1179 {
1180 return IfxEray_changePocState(eray->eray, IfxEray_PocCommand_coldStart);
1181 }
1182
1183
1184 IFX_INLINE void IfxEray_Eray_bufferReconfig(IfxEray_Eray *eray, IfxEray_Eray_BufferReconfig *reconfigBuffer)
1185 {
1186 IfxEray_setSlot(eray->eray, reconfigBuffer->header, reconfigBuffer->data, reconfigBuffer->slotControl);
1187 }
1188
1189
1190 IFX_INLINE boolean IfxEray_Eray_changePocState(IfxEray_Eray *eray, IfxEray_PocCommand PocCommand)
1191 {
1192 boolean status = IfxEray_changePocState(eray->eray, PocCommand);
1193 return status;
1194 }
1195
1196
1197 IFX_INLINE void IfxEray_Eray_clearErrorFlag(IfxEray_Eray *eray, IfxEray_ClearErrorFlag errorFlag)
1198 {
1199 IfxEray_clearErrorFlag(eray->eray, errorFlag);
1200 }
1201
1202
1203 IFX_INLINE void IfxEray_Eray_clearStatusFlag(IfxEray_Eray *eray, IfxEray_ClearStatusFlag statusFlag)
1204 {
1205 IfxEray_clearStatusFlag(eray->eray, statusFlag);
1206 }
1207
1208
1209 IFX_INLINE void IfxEray_Eray_deInitModule(IfxEray_Eray *eray)
1210 {
1211 //resets the kernel
1212 IfxEray_resetModule(eray->eray);
1213 }
1214
1215
1216 IFX_INLINE Ifx_ERAY_EIR IfxEray_Eray_getErrorInterrupts(IfxEray_Eray *eray)
1217 {
1218 Ifx_ERAY_EIR interruptFlags;
1219 interruptFlags = IfxEray_getErrorInterrupts(eray->eray);
1220 return interruptFlags;
1221 }
1222
1223
1224 IFX_INLINE uint8 IfxEray_Eray_getMessageBufferInterruptStatus(IfxEray_Eray *eray, uint8 messageBuffer)
1225 {
1226 uint8 messageBufferInterrupt = IfxEray_getMessageBufferInterruptStatus(eray->eray, messageBuffer);
1227 return messageBufferInterrupt;
1228 }
1229
1230
1231 IFX_INLINE uint8 IfxEray_Eray_getNewDataInterruptStatus(IfxEray_Eray *eray, uint8 ndat)
1232 {
1233 uint8 ndatInterrupt = IfxEray_getNewDataInterruptStatus(eray->eray, ndat);
1234 return ndatInterrupt;
1235 }
1236
1237
1238 IFX_INLINE IfxEray_PocState IfxEray_Eray_getPocState(IfxEray_Eray *eray)
1239 {
1240 return IfxEray_getPocState(eray->eray);
1241 }
1242
1243
1244 IFX_INLINE Ifx_ERAY_SIR IfxEray_Eray_getStatusInterrupts(IfxEray_Eray *eray)
1245 {
1246 Ifx_ERAY_SIR statusInterrupts = IfxEray_getStatusInterrupts(eray->eray);
1247 return statusInterrupts;
1248 }
1249
1250
1251 IFX_INLINE IfxEray_WakeupChannel IfxEray_Eray_getWakeupPatternReceivedChannel(IfxEray_Eray *eray)
1252 {
1253 IfxEray_WakeupChannel rxWakeupChannel;
1254 rxWakeupChannel = IfxEray_getWakeupPatternReceivedChannel(eray->eray);
1255
1256 return rxWakeupChannel;
1257 }
1258
1259
1260 IFX_INLINE void IfxEray_Eray_readData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
1261 {
1262 IfxEray_readData(eray->eray, data, payloadLength);
1263 }
1264
1265
1266 IFX_INLINE void IfxEray_Eray_readFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceivedFrame *frame, Ifx_SizeT maxPayloadLength)
1267 {
1268 IfxEray_readFrame(eray->eray, &(frame->header), frame->data, maxPayloadLength);
1269 }
1270
1271
1272 IFX_INLINE void IfxEray_Eray_setMessageBufferInterruptDestination(IfxEray_Eray *eray, uint8 messageBuffer, uint8 messageBufferDestination)
1273 {
1274 IfxEray_setMessageBufferInterruptDestination(eray->eray, messageBuffer, messageBufferDestination);
1275 }
1276
1277
1278 IFX_INLINE void IfxEray_Eray_setNewDataInterruptDestination(IfxEray_Eray *eray, uint8 ndat, uint8 ndatDestination)
1279 {
1280 IfxEray_setNewDataInterruptDestination(eray->eray, ndat, ndatDestination);
1281 }
1282
1283
1284 IFX_INLINE boolean IfxEray_Eray_setPocAllSlots(IfxEray_Eray *eray)
1285 {
1286 return IfxEray_changePocState(eray->eray, IfxEray_PocCommand_allSlots);
1287 }
1288
1289
1290 IFX_INLINE boolean IfxEray_Eray_startCommunication(IfxEray_Eray *eray)
1291 {
1292 return IfxEray_changePocState(eray->eray, IfxEray_PocCommand_run);
1293 }
1294
1295
1296 IFX_INLINE void IfxEray_Eray_wakeUpChannel(IfxEray_Eray *eray, IfxEray_Channel channel)
1297 {
1298 Ifx_ERAY *eraySFR = eray->eray;
1299 boolean result = IfxEray_changePocState(eraySFR, IfxEray_PocCommand_config);
1300
1301 if (result == TRUE)
1302 {
1303 eraySFR->SUCC1.B.WUCS = channel;
1304 IfxEray_setPocReady(eray->eray);
1305 }
1306 }
1307
1308
1309 IFX_INLINE boolean IfxEray_Eray_wakeUpCluster(IfxEray_Eray *eray)
1310 {
1311 return IfxEray_changePocState(eray->eray, IfxEray_PocCommand_wakeup);
1312 }
1313
1314
1315 IFX_INLINE void IfxEray_Eray_writeData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
1316 {
1317 IfxEray_writeData(eray->eray, data, payloadLength);
1318 }
1319
1320
1321 #endif /* IFXERAY_ERAY_H */
IfxEray_SlotConfig
Transmit control structure.
Definition: IfxEray.h:413
IfxEray_Eray_Gtu04Config::networkStartIdleTime
uint16 networkStartIdleTime
starting point of Network Idle Time Phase.
Definition: IfxEray_Eray.h:560
IfxEray_Txd_Out
TXD pin mapping structure.
Definition: IfxEray_PinMap.h:65
IfxEray_WakeupChannel
IfxEray_WakeupChannel
Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS.
Definition: IfxEray.h:365
IfxEray_Eray_initModuleConfig
IFX_EXTERN void IfxEray_Eray_initModuleConfig(IfxEray_Eray_Config *config, Ifx_ERAY *eray)
Inialises the default module configuration buffer.
Definition: IfxEray_Eray.c:504
IfxEray_Eray_GTUConfig::gtu07Config
IfxEray_Eray_Gtu07Config gtu07Config
GTU07 configuration.
Definition: IfxEray_Eray.h:639
IfxEray_Eray_Succ3Config::clockCorrectionCyclesHalt
uint8 clockCorrectionCyclesHalt
maximum number of cycles missing clock correctionlead to active or passive to halt.
Definition: IfxEray_Eray.h:724
IfxEray_setSlot
void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots.
Definition: IfxEray.c:295
IfxEray_Eray_getNewDataInterruptStatus
IFX_INLINE uint8 IfxEray_Eray_getNewDataInterruptStatus(IfxEray_Eray *eray, uint8 ndat)
Gets the new data interrupt buffers status.
Definition: IfxEray_Eray.h:1231
IfxEray_Eray_NodeA::txEnOutMode
IfxPort_OutputMode txEnOutMode
the TXEN pin output mode which should be configured.
Definition: IfxEray_Eray.h:653
IfxEray_Eray_Interrupt::ndat0Priority
uint16 ndat0Priority
the new data interrupt 0 priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:754
IfxEray_Eray_Gtu05Config::decodingCorrection
uint8 decodingCorrection
decoding correction to determine the primary time reference point.
Definition: IfxEray_Eray.h:571
IfxEray_Eray_Prtc1Control
Protocol operation control properties.
Definition: IfxEray_Eray.h:674
IfxEray_PocCommand_run
command to controller to enter RUN
Definition: IfxEray.h:270
IfxEray_Eray_Interrupt::mbsc1Priority
uint16 mbsc1Priority
the message buffer status changed interrupt 1 priority. Always 1 since all interrupts are handled at ...
Definition: IfxEray_Eray.h:757
IfxEray_Eray_deInitModule
IFX_INLINE void IfxEray_Eray_deInitModule(IfxEray_Eray *eray)
De-initialises the ERAY module.
Definition: IfxEray_Eray.h:1209
IfxEray_Eray_Prtc2Control
Wakeup symbol control properties.
Definition: IfxEray_Eray.h:686
IfxEray_setPocReady
void IfxEray_setPocReady(Ifx_ERAY *eray)
Sets the POC state to Ready state.
Definition: IfxEray.c:282
IfxEray_Eray_Config::module
Ifx_ERAY * module
pointer to ERAY module registers.
Definition: IfxEray_Eray.h:829
IfxEray_Eray_NodeA::rxIn
IFX_CONST IfxEray_Rxd_In * rxIn
the RX Pin which should be configured.
Definition: IfxEray_Eray.h:654
IfxEray_Eray_readData
IFX_INLINE void IfxEray_Eray_readData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers.
Definition: IfxEray_Eray.h:1260
IfxEray_Eray_Succ1Config::channelAConnectedNode
boolean channelAConnectedNode
whether the node is connected to channel A.
Definition: IfxEray_Eray.h:707
IfxEray_Eray_Succ1Config::transmissionSlotMode
IfxEray_TransmissionSlotMode transmissionSlotMode
Initial transmission mode.
Definition: IfxEray_Eray.h:703
IfxEray_Eray_setMessageBufferInterruptDestination
IFX_INLINE void IfxEray_Eray_setMessageBufferInterruptDestination(IfxEray_Eray *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Enables the message buffer interrupt line.
Definition: IfxEray_Eray.h:1272
IfxEray_Eray_initModule
IFX_EXTERN void IfxEray_Eray_initModule(IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
Initialises the ERAY module with supplied configuration.
Definition: IfxEray_Eray.c:402
IfxEray_setNewDataInterruptDestination
void IfxEray_setNewDataInterruptDestination(Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination.
Definition: IfxEray.c:264
IfxEray_Eray_Gtu11Config::externalRate
IfxEray_ExternalRate externalRate
External rate correction control.
Definition: IfxEray_Eray.h:622
IfxEray_Eray_Interrupt::obusyPriority
uint16 obusyPriority
the output buffer interrupt priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:759
IfxEray_Eray_TransmitControl::headerTransfered
boolean headerTransfered
whether header section of frame is transfered or not.
Definition: IfxEray_Eray.h:865
IfxEray_Eray_MessageRAMConfig
Message RAM configuration structure.
Definition: IfxEray_Eray.h:774
IfxEray_Eray_GTUConfig::gtu01Config
IfxEray_Eray_Gtu01Config gtu01Config
GTU01 configuration.
Definition: IfxEray_Eray.h:633
IfxEray_Eray_Gtu03Config::channelBMacrotickInitialOffset
uint8 channelBMacrotickInitialOffset
difference between two adjacent static slots on channel B in macroticks.
Definition: IfxEray_Eray.h:553
IfxEray_Eray_setPocAllSlots
IFX_INLINE boolean IfxEray_Eray_setPocAllSlots(IfxEray_Eray *eray)
Sets the Controller state to ALL Slots mode.
Definition: IfxEray_Eray.h:1284
IfxEray_ReceiveChannel
IfxEray_ReceiveChannel
Receiving channel, defined in MODULE_ERAY0.FRF.B.CH.
Definition: IfxEray.h:312
IfxEray_Eray_NodeA::txEnOut
IFX_CONST IfxEray_Txen_Out * txEnOut
the TXEN Pin which should be configured.
Definition: IfxEray_Eray.h:656
IfxEray_Eray_NodeConfig
Node configuration structure.
Definition: IfxEray_Eray.h:835
IfxEray_Eray_ReceivedFrame
Received Frame.
Definition: IfxEray_Eray.h:855
IfxEray_PocState
IfxEray_PocState
State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS.
Definition: IfxEray.h:283
IfxEray_Eray_Interrupt::ibusyPriority
uint16 ibusyPriority
the inputput buffer interrupt priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:758
IfxEray_Eray_ControllerConfig::succ1Config
IfxEray_Eray_Succ1Config succ1Config
communication controller control properties.
Definition: IfxEray_Eray.h:739
IfxEray_ClearStatusFlag
IfxEray_ClearStatusFlag
Selection of status flag to clear defined in MODULE_ERAY.SIR.U.
Definition: IfxEray.h:128
IfxEray_Eray_Node_initConfig
IFX_EXTERN void IfxEray_Eray_Node_initConfig(IfxEray_Eray_NodeConfig *config)
Initialises the default node configuration buffer.
Definition: IfxEray_Eray.c:203
IfxEray_Eray_Prtc2Control::receiveWakeupIdleTime
uint8 receiveWakeupIdleTime
duration of received wakeup symbol idle phase.
Definition: IfxEray_Eray.h:688
IfxEray_Eray_ControllerConfig::networkVectorLength
uint32 networkVectorLength
length of network management vector.
Definition: IfxEray_Eray.h:735
IfxEray_Eray_Gtu10Config::maxOffsetCorrection
uint16 maxOffsetCorrection
maximum offset correction to be applied by the internal clock synchronization algorithm.
Definition: IfxEray_Eray.h:611
IfxEray_ReceivedHeader
Received header in a frame.
Definition: IfxEray.h:399
IfxEray_Txen_Out
TXEN pin mapping structure.
Definition: IfxEray_PinMap.h:74
IfxEray_Eray_Gtu09Config::staticActionPoint
uint8 staticActionPoint
static slots and symbol window action point.
Definition: IfxEray_Eray.h:602
IfxEray_Eray_TransmitControl::dataTransfered
boolean dataTransfered
whether data section of message buffer is transfered or not.
Definition: IfxEray_Eray.h:866
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxEray_Eray_NodeConfig::controllerConfig
IfxEray_Eray_ControllerConfig controllerConfig
Communication Controller configuration structure.
Definition: IfxEray_Eray.h:838
IfxEray_getMessageBufferInterruptStatus
IFX_INLINE boolean IfxEray_getMessageBufferInterruptStatus(Ifx_ERAY *eray, uint8 messageBuffer)
Gets the message buffers interrupt status.
Definition: IfxEray.h:1299
IfxEray_Eray_Succ1Config::numberOfCyclePairsForActive
uint8 numberOfCyclePairsForActive
number of even / odd cycle pairs that must have valid clock correction terms.
Definition: IfxEray_Eray.h:701
IfxEray_Eray_Gtu03Config::channelAMicrotickInitialOffset
uint8 channelAMicrotickInitialOffset
difference between adjacent time reference points on channel A in microticks.
Definition: IfxEray_Eray.h:550
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEray_Eray_Succ1Config::channelASymbolTransmitted
boolean channelASymbolTransmitted
selects channel A for MTS symbol transmission.
Definition: IfxEray_Eray.h:705
IfxEray_Eray_BufferReconfig::header
IfxEray_Header * header
header of a reconfigurable buffer.
Definition: IfxEray_Eray.h:820
IfxEray_Eray_receiveFrame
IFX_EXTERN void IfxEray_Eray_receiveFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers header and data from message buffer to output buffer.
Definition: IfxEray_Eray.c:567
IfxEray_Eray_Interrupt::int1Priority
uint16 int1Priority
the interrupt line 1 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:751
IfxEray_Eray_Gtu09Config::dynamicActionPoint
uint8 dynamicActionPoint
dynamic slots action point.
Definition: IfxEray_Eray.h:603
IfxEray_Eray_transmitFrame
IFX_EXTERN void IfxEray_Eray_transmitFrame(IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
Transfers the frame in given slot.
Definition: IfxEray_Eray.c:589
IfxEray_Eray_Interrupt::tint1IsrProvider
IfxSrc_Tos tint1IsrProvider
the timer interrupt line 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:763
IfxEray_ExternalOffsetCorrection
IfxEray_ExternalOffsetCorrection
External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC.
Definition: IfxEray.h:177
IfxEray_Eray_clearErrorFlag
IFX_INLINE void IfxEray_Eray_clearErrorFlag(IfxEray_Eray *eray, IfxEray_ClearErrorFlag errorFlag)
clears the error interrupt flag requested.
Definition: IfxEray_Eray.h:1197
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxEray_Eray_Gtu11Config::externalOffsetCorrection
IfxEray_ExternalOffsetCorrection externalOffsetCorrection
External clock offset correction value.
Definition: IfxEray_Eray.h:619
IfxEray_Eray_ReceivedFrame::header
IfxEray_ReceivedHeader header
received header in a frame.
Definition: IfxEray_Eray.h:857
IfxEray_Eray_Succ2Config
Communication listen timeout properties.
Definition: IfxEray_Eray.h:713
IfxEray_Eray_Succ1Config
communication controller control properties.
Definition: IfxEray_Eray.h:696
IfxEray_ExternalRate
IfxEray_ExternalRate
External rate correction control MODULE_ERAY0.GTU11.B.ERCC.
Definition: IfxEray.h:191
IfxEray_getStatusInterrupts
IFX_INLINE Ifx_ERAY_SIR IfxEray_getStatusInterrupts(Ifx_ERAY *eray)
Gets the status interrupt flags.
Definition: IfxEray.h:1374
IfxEray_ListenTimeOutNoise
IfxEray_ListenTimeOutNoise
Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN.
Definition: IfxEray.h:223
IfxEray_Eray_GTUConfig::gtu05Config
IfxEray_Eray_Gtu05Config gtu05Config
GTU05 configuration.
Definition: IfxEray_Eray.h:637
IfxEray_Eray_BufferReconfig::slotControl
IfxEray_SlotConfig * slotControl
message buffer configuration in message RAM.
Definition: IfxEray_Eray.h:822
IfxEray_Eray_Prtc1Control::transmissionStartTime
uint16 transmissionStartTime
duration of transmission start time.
Definition: IfxEray_Eray.h:681
IfxEray_Eray_Interrupt::tint0Priority
uint16 tint0Priority
the timer interrupt 0 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:752
IfxEray_Eray_Succ3Config
Clock correction fail properties.
Definition: IfxEray_Eray.h:721
IfxEray_Eray_MessageRAMConfig::fifoDepth
uint8 fifoDepth
fifo critical level.
Definition: IfxEray_Eray.h:779
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxEray_Eray_Gtu11Config::externalOffset
IfxEray_ExternalOffset externalOffset
External offset correction control.
Definition: IfxEray_Eray.h:621
IfxEray_Eray_MessageRAMConfig::fifoConfigured
boolean fifoConfigured
Whether receive FIFO configured or not.
Definition: IfxEray_Eray.h:787
IfxEray_Eray_startCommunication
IFX_INLINE boolean IfxEray_Eray_startCommunication(IfxEray_Eray *eray)
Runs the communication controller.
Definition: IfxEray_Eray.h:1290
IfxEray_Eray_GTUConfig::gtu11Config
IfxEray_Eray_Gtu11Config gtu11Config
GTU11 configuration.
Definition: IfxEray_Eray.h:643
IfxEray_Eray_ControllerConfig
Communication Controller configuration structure.
Definition: IfxEray_Eray.h:733
IfxEray_Eray_GTUConfig
Gloabl Timing Unit configuration structure.
Definition: IfxEray_Eray.h:631
IfxEray_Eray_setNewDataInterruptDestination
IFX_INLINE void IfxEray_Eray_setNewDataInterruptDestination(IfxEray_Eray *eray, uint8 ndat, uint8 ndatDestination)
Enables the NDAT buffer interrupt line.
Definition: IfxEray_Eray.h:1278
IfxEray_Channel
IfxEray_Channel
Channel Id.
Definition: IfxEray.h:96
IfxEray_Eray_Prtc2Control::receiveWakeupLowTime
uint8 receiveWakeupLowTime
duration of received wakeup symbol low phase.
Definition: IfxEray_Eray.h:689
IfxEray_Eray_getMessageBufferInterruptStatus
IFX_INLINE uint8 IfxEray_Eray_getMessageBufferInterruptStatus(IfxEray_Eray *eray, uint8 messageBuffer)
Gets the message buffer interrupt status.
Definition: IfxEray_Eray.h:1224
IfxEray_Eray_ControllerConfig::staticFramepayload
uint8 staticFramepayload
payload length of static frame in double bytes.
Definition: IfxEray_Eray.h:736
IfxEray_Eray_GTUConfig::gtu03Config
IfxEray_Eray_Gtu03Config gtu03Config
GTU03 configuration.
Definition: IfxEray_Eray.h:635
IfxEray_Eray_GTUConfig::gtu06Config
IfxEray_Eray_Gtu06Config gtu06Config
GTU06 configuration.
Definition: IfxEray_Eray.h:638
IfxEray_Eray_Succ2Config::listenTimeOut
uint32 listenTimeOut
wakeup or startup listen timeout in microticks.
Definition: IfxEray_Eray.h:715
IfxEray_Eray_GTUConfig::gtu09Config
IfxEray_Eray_Gtu09Config gtu09Config
GTU09 configuration.
Definition: IfxEray_Eray.h:641
IfxEray_Eray_Prtc1Control::strobePosition
IfxEray_StrobePosition strobePosition
sample count value for strobing.
Definition: IfxEray_Eray.h:677
IfxScuWdt.h
SCU basic functionality.
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxEray_Eray_Gtu07Config::staticSlotsCount
uint16 staticSlotsCount
number of static slots in a communication cycle.
Definition: IfxEray_Eray.h:587
IfxEray.h
ERAY basic functionality.
IfxEray_Eray_ControllerConfig::prtc1Control
IfxEray_Eray_Prtc1Control prtc1Control
protocol operation control properties.
Definition: IfxEray_Eray.h:742
IfxEray_writeData
void IfxEray_writeData(Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers.
Definition: IfxEray.c:348
IfxEray_Eray_BufferReconfig::data
uint32 data[64]
data section of a reconfigurable buffer.
Definition: IfxEray_Eray.h:821
IfxEray_Eray_Prtc2Control::transmitWakeupLowTime
uint8 transmitWakeupLowTime
duration of transmit wakeup symbol low phase.
Definition: IfxEray_Eray.h:691
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEray_Eray_NodeA::rxInMode
IfxPort_InputMode rxInMode
the RX pin input mode which should be configured
Definition: IfxEray_Eray.h:650
IfxEray_Eray_Gtu05Config::channelAReceptionDelay
uint8 channelAReceptionDelay
reception delay on channel A.
Definition: IfxEray_Eray.h:568
IfxEray_Eray_Succ1Config::startupFrameTransmitted
boolean startupFrameTransmitted
whether the key slot is used to transmit startup Frames.
Definition: IfxEray_Eray.h:698
IfxEray_Eray_Interrupt::mbsc0IsrProvider
IfxSrc_Tos mbsc0IsrProvider
the message buffer status changed interrupt 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:766
IfxEray_ExternalOffset
IfxEray_ExternalOffset
External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC.
Definition: IfxEray.h:168
IfxEray_Eray_Succ2Config::listenTimeOutNoise
IfxEray_ListenTimeOutNoise listenTimeOutNoise
upper limit for startup and wakeup listen timeout in the presence of noise.
Definition: IfxEray_Eray.h:716
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxEray_Eray_Config
Module configuration structure.
Definition: IfxEray_Eray.h:827
IfxEray_Eray_Interrupt::ndat1Priority
uint16 ndat1Priority
the new data interrupt 1 priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:755
IfxEray_Eray_Interrupt::ndat1IsrProvider
IfxSrc_Tos ndat1IsrProvider
the new data interrupt 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:765
IfxEray_Eray_Interrupt::int0IsrProvider
IfxSrc_Tos int0IsrProvider
the interrupt line 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:760
IfxEray_Eray_changePocState
IFX_INLINE boolean IfxEray_Eray_changePocState(IfxEray_Eray *eray, IfxEray_PocCommand PocCommand)
Changes the POC state and return status.
Definition: IfxEray_Eray.h:1190
IfxEray_Eray_NodeA::txOutMode
IfxPort_OutputMode txOutMode
the TX pin output mode which should be configured.
Definition: IfxEray_Eray.h:651
IfxEray_Eray_Succ3Config::clockCorrectionCyclesPassive
uint8 clockCorrectionCyclesPassive
maximum number of cycles missing clock correction lead active to passive state.
Definition: IfxEray_Eray.h:723
IfxEray_Eray_Interrupt::ndat0IsrProvider
IfxSrc_Tos ndat0IsrProvider
the new data interrupt 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:764
IfxEray_Eray_Succ1Config::maxColdStartAttempts
uint8 maxColdStartAttempts
maximum number of attempts that a cold starting node is permitted.
Definition: IfxEray_Eray.h:700
IfxEray_Eray_Gtu02Config::maxSyncFrames
uint8 maxSyncFrames
Maximum number of sync frames in a cluster.
Definition: IfxEray_Eray.h:543
IfxEray_Eray_Gtu01Config::microticksPerCycle
uint32 microticksPerCycle
Duration of the communication cycle in Microticks.
Definition: IfxEray_Eray.h:535
IfxEray_Eray_ReceiveControl::bufferIndex
uint8 bufferIndex
buffer index in the Message RAM.
Definition: IfxEray_Eray.h:850
IfxEray_setMessageBufferInterruptDestination
void IfxEray_setMessageBufferInterruptDestination(Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination.
Definition: IfxEray.c:247
IfxEray_Eray_getErrorInterrupts
IFX_INLINE Ifx_ERAY_EIR IfxEray_Eray_getErrorInterrupts(IfxEray_Eray *eray)
Gets the error interrupt status.
Definition: IfxEray_Eray.h:1216
IfxEray_ExternalRateCorrection
IfxEray_ExternalRateCorrection
External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC.
Definition: IfxEray.h:200
IfxEray_PocCommand_allSlots
command to controller to enter ALL_SLOTS
Definition: IfxEray.h:271
IfxEray_Eray_GTUConfig::gtu08Config
IfxEray_Eray_Gtu08Config gtu08Config
GTU08 configuration.
Definition: IfxEray_Eray.h:640
IfxEray_Header
Header section in a frame.
Definition: IfxEray.h:381
IfxEray_Eray_Interrupt::int0Priority
uint16 int0Priority
the interrupt line 0 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:750
IfxEray_Eray_Pins::nodeBPins
IFX_CONST IfxEray_Eray_NodeB * nodeBPins
Pins configuration structure for Node B.
Definition: IfxEray_Eray.h:802
IfxEray_Eray_ControllerConfig::latestTransmissionStart
uint8 latestTransmissionStart
number of dynamic slots before inhibit frame transmission in dynamic segment.
Definition: IfxEray_Eray.h:737
IfxEray_Eray_MessageRAMConfig::bufferReconfigEnabled
boolean bufferReconfigEnabled
whether reconfiguration of message buffers is enabled or not.
Definition: IfxEray_Eray.h:786
IfxEray_Eray_Succ1Config::wakeupPatternChannel
IfxEray_WakeupChannel wakeupPatternChannel
Wakeup pattern carry channel.
Definition: IfxEray_Eray.h:702
IfxEray_Eray_receiveFifoFrame
IFX_EXTERN void IfxEray_Eray_receiveFifoFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers frame from fifo in message RAM to Output buffer.
Definition: IfxEray_Eray.c:531
IfxEray_IdleDynamicSlots
IfxEray_IdleDynamicSlots
Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI.
Definition: IfxEray.h:214
IfxEray_Eray_ControllerConfig::succ3Config
IfxEray_Eray_Succ3Config succ3Config
clock correction fail properties.
Definition: IfxEray_Eray.h:741
IfxEray_Eray_Interrupt::tint0IsrProvider
IfxSrc_Tos tint0IsrProvider
the timer interrupt line 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:762
IfxEray_Eray_getWakeupPatternReceivedChannel
IFX_INLINE IfxEray_WakeupChannel IfxEray_Eray_getWakeupPatternReceivedChannel(IfxEray_Eray *eray)
Gets the received wakeup pattern channel.
Definition: IfxEray_Eray.h:1251
IfxEray_Eray_wakeUpChannel
IFX_INLINE void IfxEray_Eray_wakeUpChannel(IfxEray_Eray *eray, IfxEray_Channel channel)
Wakeups the channel in a cluster.
Definition: IfxEray_Eray.h:1296
IfxEray_Eray_MessageRAMConfig::fifoNullFramesRejected
boolean fifoNullFramesRejected
whether null frames stored in fifo or not.
Definition: IfxEray_Eray.h:785
IfxEray_Eray_GTUConfig::gtu04Config
IfxEray_Eray_Gtu04Config gtu04Config
GTU04 configuration.
Definition: IfxEray_Eray.h:636
IfxEray_StrobePosition
IfxEray_StrobePosition
Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP.
Definition: IfxEray.h:331
IfxEray_Eray_ReceiveControl::dataReceived
boolean dataReceived
whether data selected for transfer from Message RAM to Output Buffer or not.
Definition: IfxEray_Eray.h:847
IfxEray_Eray_clearStatusFlag
IFX_INLINE void IfxEray_Eray_clearStatusFlag(IfxEray_Eray *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status interrupt flag requested.
Definition: IfxEray_Eray.h:1203
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxEray_Eray_Gtu07Config::staticSlotLength
uint16 staticSlotLength
duration of static slot in macroticks.
Definition: IfxEray_Eray.h:586
IfxEray_Eray_Node_init
IFX_EXTERN void IfxEray_Eray_Node_init(IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
Initialises the Node with supplied configuration.
Definition: IfxEray_Eray.c:83
IfxEray_Baudrate
IfxEray_Baudrate
Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP.
Definition: IfxEray.h:79
IfxEray_Eray_Gtu08Config::dynamicSlotCount
uint16 dynamicSlotCount
number of dynamic slots in a communication cycle.
Definition: IfxEray_Eray.h:595
IfxEray_clearErrorFlag
IFX_INLINE void IfxEray_clearErrorFlag(Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag)
Clears the error flag requested.
Definition: IfxEray.h:1206
IfxEray_Eray_Prtc1Control::baudrate
IfxEray_Baudrate baudrate
baud rate on the flexray bus.
Definition: IfxEray_Eray.h:678
IfxEray_Eray_NodeConfig::pins
IFX_CONST IfxEray_Eray_Pins * pins
Pins configuration structure.
Definition: IfxEray_Eray.h:839
IfxEray_Eray_Interrupt::mbsc1IsrProvider
IfxSrc_Tos mbsc1IsrProvider
the message buffer status changed interrupt 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:767
IfxEray_Eray_Interrupt::int1IsrProvider
IfxSrc_Tos int1IsrProvider
the interrupt line 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:761
IfxEray_Eray::eray
Ifx_ERAY * eray
pointer to ERAY module registers.
Definition: IfxEray_Eray.h:813
IfxEray_Eray_Prtc1Control::transmitWakeupRepetitions
uint8 transmitWakeupRepetitions
duration of transmitted wakeup pattern in bit times.
Definition: IfxEray_Eray.h:680
IfxCpu.h
CPU basic functionality.
IfxEray_Eray_Succ1Config::channelBConnectedNode
boolean channelBConnectedNode
whether the node is connected to channel B.
Definition: IfxEray_Eray.h:708
IfxEray_Eray_MessageRAMConfig::firstDynamicBuffer
uint8 firstDynamicBuffer
first dynamic buffer index.
Definition: IfxEray_Eray.h:776
IfxEray_Eray_Prtc1Control::collisionAvoidanceDuration
uint8 collisionAvoidanceDuration
accepted duration of collision avoidance symbol.
Definition: IfxEray_Eray.h:676
IfxEray_Eray_Succ1Config::channelBSymbolTransmitted
boolean channelBSymbolTransmitted
selects channel B for MTS symbol transmission
Definition: IfxEray_Eray.h:706
IfxEray_Eray_Gtu10Config
GTU10 configuration.
Definition: IfxEray_Eray.h:609
IfxEray_Eray_getStatusInterrupts
IFX_INLINE Ifx_ERAY_SIR IfxEray_Eray_getStatusInterrupts(IfxEray_Eray *eray)
Gets the node status interrupts.
Definition: IfxEray_Eray.h:1244
IfxEray_Eray_ReceiveControl::swapRequested
boolean swapRequested
whether output buffer shadow and output buffer host are swapped or not.
Definition: IfxEray_Eray.h:848
IfxEray_Eray_Gtu11Config
GTU11 configuration.
Definition: IfxEray_Eray.h:617
IfxEray_Eray_Gtu03Config
GTU03 configuration.
Definition: IfxEray_Eray.h:548
IfxEray_Eray_Gtu06Config
GTU06 configuration.
Definition: IfxEray_Eray.h:576
IfxEray_Eray_Gtu05Config
GTU05 configuration.
Definition: IfxEray_Eray.h:566
IfxEray_Eray_Gtu08Config
GTU08 configuration.
Definition: IfxEray_Eray.h:592
IfxEray_Eray_Gtu05Config::channelBReceptionDelay
uint8 channelBReceptionDelay
reception delay on channel B.
Definition: IfxEray_Eray.h:569
IfxEray_Eray_Gtu07Config
GTU07 configuration.
Definition: IfxEray_Eray.h:584
IfxEray_Eray_Gtu09Config
GTU09 configuration.
Definition: IfxEray_Eray.h:600
IfxEray_Eray_NodeConfig::messageRAMConfig
IfxEray_Eray_MessageRAMConfig messageRAMConfig
Message RAM configuration structure.
Definition: IfxEray_Eray.h:837
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxEray_Eray_GTUConfig::gtu02Config
IfxEray_Eray_Gtu02Config gtu02Config
GTU02 configuration.
Definition: IfxEray_Eray.h:634
IfxEray_Rxd_In
RXD pin mapping structure.
Definition: IfxEray_PinMap.h:56
IfxEray_Eray_Gtu02Config
GTU02 configuration.
Definition: IfxEray_Eray.h:540
IfxEray_Eray_Gtu01Config
GTU01 configuration.
Definition: IfxEray_Eray.h:533
IfxEray_getErrorInterrupts
IFX_INLINE Ifx_ERAY_EIR IfxEray_getErrorInterrupts(Ifx_ERAY *eray)
Gets the error interrupt flags.
Definition: IfxEray.h:1244
IfxEray_TransmissionSlotMode
IfxEray_TransmissionSlotMode
Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM.
Definition: IfxEray.h:357
IfxEray_Eray_ReceiveControl::headerReceived
boolean headerReceived
whether header selected for transfer from Message RAM to Output Buffer or not.
Definition: IfxEray_Eray.h:846
IfxEray_Eray_Gtu08Config::dynamicSlotLength
uint8 dynamicSlotLength
duration of dynamic slot in macroticks.
Definition: IfxEray_Eray.h:594
IfxEray_Eray_MessageRAMConfig::staticFifoDisabled
boolean staticFifoDisabled
fifo is not used in static segment.
Definition: IfxEray_Eray.h:784
IfxEray_Eray_Gtu04Config
GTU04 configuration.
Definition: IfxEray_Eray.h:558
IfxEray_Eray_bufferReconfig
IFX_INLINE void IfxEray_Eray_bufferReconfig(IfxEray_Eray *eray, IfxEray_Eray_BufferReconfig *reconfigBuffer)
Reconfiguring the buffer or changing the slot.
Definition: IfxEray_Eray.h:1184
IfxEray_PocCommand_config
command to controller to enter CONFIG
Definition: IfxEray.h:267
IfxEray_Eray_Interrupt::ibusyIsrProvider
IfxSrc_Tos ibusyIsrProvider
the input buffer interrupt service provider. CPU or DMA.
Definition: IfxEray_Eray.h:768
IfxEray_Eray_Pins::nodeAPins
IFX_CONST IfxEray_Eray_NodeA * nodeAPins
Pins configuration structure for Node A.
Definition: IfxEray_Eray.h:801
IfxEray_ClearErrorFlag
IfxEray_ClearErrorFlag
Selection of error flag to clear defined in MODULE_ERAY.EIR.U.
Definition: IfxEray.h:104
IfxEray_resetModule
void IfxEray_resetModule(Ifx_ERAY *eray)
Resets the ERAY kernel.
Definition: IfxEray.c:227
IfxScuCcu.h
SCU basic functionality.
IfxEray_Eray_Pins
Pins configuration structure.
Definition: IfxEray_Eray.h:799
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxEray_Eray_ReceiveControl
Receive control properties structure.
Definition: IfxEray_Eray.h:844
IfxEray_Eray_MessageRAMConfig::fifoBufferStartIndex
uint32 fifoBufferStartIndex
message buffers assigned FIFO.
Definition: IfxEray_Eray.h:778
IfxEray_Eray_ControllerConfig::prtc2Control
IfxEray_Eray_Prtc2Control prtc2Control
wakeup symbol control properties.
Definition: IfxEray_Eray.h:743
IfxEray_Eray_Gtu02Config::macroticksPerCycle
uint16 macroticksPerCycle
Duration of the communication cycle in Macroticks.
Definition: IfxEray_Eray.h:542
IfxEray_Eray_Interrupt
Interrupt control properties.
Definition: IfxEray_Eray.h:748
IfxEray_Eray_getPocState
IFX_INLINE IfxEray_PocState IfxEray_Eray_getPocState(IfxEray_Eray *eray)
Gets the current node controller POC state.
Definition: IfxEray_Eray.h:1238
IfxEray_getPocState
IFX_INLINE IfxEray_PocState IfxEray_getPocState(Ifx_ERAY *eray)
Gets the current POC state.
Definition: IfxEray.h:1368
IfxEray_Eray_MessageRAMConfig::frameIdFilter
uint16 frameIdFilter
Frame ID used for rejection filtering.
Definition: IfxEray_Eray.h:780
IfxEray_Eray_MessageRAMConfig::numberOfMessageBuffers
uint8 numberOfMessageBuffers
last configured buffer.
Definition: IfxEray_Eray.h:777
IfxEray_Eray_ReceiveControl::receiveRequested
boolean receiveRequested
Definition: IfxEray_Eray.h:849
IfxEray_Eray_Gtu10Config::maxRateCorrection
uint16 maxRateCorrection
maximum rate correction to be applied by the internal clock synchronization algorithm.
Definition: IfxEray_Eray.h:612
IfxEray_Eray_Succ1Config::clockSyncErrorHalt
boolean clockSyncErrorHalt
transition to HALT state due to a clock synchronization error.
Definition: IfxEray_Eray.h:704
IfxEray_Eray_MessageRAMConfig::receiveChannel
IfxEray_ReceiveChannel receiveChannel
FIFO receive channel.
Definition: IfxEray_Eray.h:781
IfxEray_PocCommand
IfxEray_PocCommand
Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD.
Definition: IfxEray.h:264
IfxEray_Eray_Succ1Config::syncFrameTransmitted
boolean syncFrameTransmitted
whether the key slot is used to transmit SYNC Frames.
Definition: IfxEray_Eray.h:699
IfxEray_Eray_NodeA::txOut
IFX_CONST IfxEray_Txd_Out * txOut
the TX Pin which should be configured.
Definition: IfxEray_Eray.h:655
IfxEray_Eray_allowColdStart
IFX_INLINE boolean IfxEray_Eray_allowColdStart(IfxEray_Eray *eray)
Allows node to enter the cold startup state.
Definition: IfxEray_Eray.h:1178
IfxEray_Eray_NodeA
Pins configuration structure for Node A.
Definition: IfxEray_Eray.h:648
IfxEray_Eray_NodeB
Pins configuration structure for Node B.
Definition: IfxEray_Eray.h:661
IfxEray_Eray_TransmitControl::transferRequested
boolean transferRequested
whether frame in a slot is transfered or not.
Definition: IfxEray_Eray.h:867
IfxEray_Eray_wakeUpCluster
IFX_INLINE boolean IfxEray_Eray_wakeUpCluster(IfxEray_Eray *eray)
Wakeups the node in a cluster.
Definition: IfxEray_Eray.h:1309
IfxEray_Eray_TransmitControl
Transfer control in a slot.
Definition: IfxEray_Eray.h:863
IfxEray_PocCommand_coldStart
command to controller to enter COLD_START
Definition: IfxEray.h:275
IfxEray_Eray
ERAY Module handle.
Definition: IfxEray_Eray.h:811
IfxEray_Eray_NodeA::pinDriver
IfxPort_PadDriver pinDriver
the pad driver mode which should be configured.
Definition: IfxEray_Eray.h:652
IfxEray_Eray_Gtu05Config::clusterDrift
uint8 clusterDrift
cluster drift damping value used in clock synchronization.
Definition: IfxEray_Eray.h:570
IfxEray_getNewDataInterruptStatus
IFX_INLINE boolean IfxEray_getNewDataInterruptStatus(Ifx_ERAY *eray, uint8 ndat)
Gets the new data interrupt buffers status.
Definition: IfxEray.h:1338
IfxEray_Eray_Gtu11Config::externalRateCorrection
IfxEray_ExternalRateCorrection externalRateCorrection
External clock rate correction value.
Definition: IfxEray_Eray.h:620
IfxEray_Eray_Gtu09Config::idleDynamicSlots
IfxEray_IdleDynamicSlots idleDynamicSlots
duration of dynamic slot idle phase.
Definition: IfxEray_Eray.h:604
IfxEray_Eray_ControllerConfig::gtuConfig
IfxEray_Eray_GTUConfig gtuConfig
gloabl timing unit configuration structure.
Definition: IfxEray_Eray.h:738
IfxEray_readFrame
void IfxEray_readFrame(Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers.
Definition: IfxEray.c:203
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxEray_Eray_BufferReconfig
Reconfigurable buffer structure.
Definition: IfxEray_Eray.h:818
IfxEray_Eray_Interrupt::obusyIsrProvider
IfxSrc_Tos obusyIsrProvider
the output buffer interrupt service provider. CPU or DMA.
Definition: IfxEray_Eray.h:769
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEray_clearStatusFlag
IFX_INLINE void IfxEray_clearStatusFlag(Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status flag requested.
Definition: IfxEray.h:1212
IfxEray_Eray_ControllerConfig::succ2Config
IfxEray_Eray_Succ2Config succ2Config
communication listen timeout properties.
Definition: IfxEray_Eray.h:740
IfxEray_Eray_Interrupt::mbsc0Priority
uint16 mbsc0Priority
the message buffer status changed interrupt 0 priority. Always 1 since all interrupts are handled at ...
Definition: IfxEray_Eray.h:756
IfxEray_changePocState
boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state.
Definition: IfxEray.c:99
IfxEray_Eray_GTUConfig::gtu10Config
IfxEray_Eray_Gtu10Config gtu10Config
GTU10 configuration.
Definition: IfxEray_Eray.h:642
IfxEray_readData
void IfxEray_readData(Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers.
Definition: IfxEray.c:188
IfxEray_getWakeupPatternReceivedChannel
IFX_INLINE IfxEray_WakeupChannel IfxEray_getWakeupPatternReceivedChannel(Ifx_ERAY *eray)
Gets the received wakeup pattern channel.
Definition: IfxEray.h:1396
IfxEray_Eray_Gtu03Config::channelAMacrotickInitialOffset
uint8 channelAMacrotickInitialOffset
difference between two adjacent static slots on channel A in macroticks.
Definition: IfxEray_Eray.h:552
IfxEray_Eray_Gtu04Config::correctionOffset
uint16 correctionOffset
offset correction start point.
Definition: IfxEray_Eray.h:561
IfxEray_Eray_Prtc1Control::receiveWakeupTestDuration
uint8 receiveWakeupTestDuration
duration of received wakeup pattern in bit times.
Definition: IfxEray_Eray.h:679
IfxEray_Eray_Gtu06Config::maxDriftOffset
uint16 maxDriftOffset
maximum drift offset between two nodes.
Definition: IfxEray_Eray.h:579
IfxEray_PocCommand_wakeup
command to controller to enter WAKEUP
Definition: IfxEray.h:269
IfxEray_Eray_Prtc2Control::transmitWakeupIdleTime
uint8 transmitWakeupIdleTime
duration of transmit wakeup symbol idle phase.
Definition: IfxEray_Eray.h:690
IfxEray_Eray_readFrame
IFX_INLINE void IfxEray_Eray_readFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceivedFrame *frame, Ifx_SizeT maxPayloadLength)
reads the frame received in a buffer.
Definition: IfxEray_Eray.h:1266
IfxEray_Eray_MessageRAMConfig::filteredCycleNumber
uint8 filteredCycleNumber
the cycle set to which Frame ID and channel rejection filter are applied.
Definition: IfxEray_Eray.h:783
IfxEray_Eray_Gtu03Config::channelBMicrotickInitialOffset
uint8 channelBMicrotickInitialOffset
difference between adjacent time reference points on channel B in microticks.
Definition: IfxEray_Eray.h:551
IfxEray_Eray_MessageRAMConfig::rejectedFrameId
uint16 rejectedFrameId
frame ID to be rejected by the FIFO.
Definition: IfxEray_Eray.h:782
IfxEray_Eray_Interrupt::tint1Priority
uint16 tint1Priority
the timer interrupt 1 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:753
IfxEray_Eray_writeData
IFX_INLINE void IfxEray_Eray_writeData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers.
Definition: IfxEray_Eray.h:1315
IfxEray_Eray_Gtu06Config::acceptedStartupDeviation
uint16 acceptedStartupDeviation
expanded range of measured deviation for startup Frames during integration.
Definition: IfxEray_Eray.h:578
IfxEray_Eray_Config::interrupt
IfxEray_Eray_Interrupt interrupt
Interrupt control properties.
Definition: IfxEray_Eray.h:830


iLLD_TC26B: IfxEray_PinMap.c Source File

  • _PinMap
IfxEray_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxEray_PinMap.c
3 * \brief ERAY I/O map
4 * \ingroup IfxLld_Eray
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxEray_PinMap.h"
44
45 IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 8}, Ifx_RxSel_a};
46 IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 9}, Ifx_RxSel_b};
47 IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 1}, Ifx_RxSel_c};
48 IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 1}, Ifx_RxSel_d};
49 IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 7}, Ifx_RxSel_a};
50 IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,10}, Ifx_RxSel_b};
51 IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 3}, Ifx_RxSel_c};
52 IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 1}, Ifx_RxSel_d};
53 IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt6};
54 IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt4};
55 IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt3};
56 IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14,10}, IfxPort_OutputIdx_alt6};
57 IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt6};
58 IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,12}, IfxPort_OutputIdx_alt4};
59 IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt4};
60 IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt6};
61 IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt6};
62 IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt4};
63 IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt6};
64 IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt6};
65 IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,11}, IfxPort_OutputIdx_alt6};
66 IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt2};
67 IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt6};
68 IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt5};
69
70
71 const IfxEray_Rxd_In *IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS] = {
72 {
73 {
74 &IfxEray0_RXDA0_P14_8_IN,
75 &IfxEray0_RXDA1_P11_9_IN,
76 &IfxEray0_RXDA2_P02_1_IN,
77 &IfxEray0_RXDA3_P14_1_IN
78 },
79 {
80 &IfxEray0_RXDB0_P14_7_IN,
81 &IfxEray0_RXDB1_P11_10_IN,
82 &IfxEray0_RXDB2_P02_3_IN,
83 &IfxEray0_RXDB3_P14_1_IN
84 }
85 }
86 };
87
88 const IfxEray_Txd_Out *IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS] = {
89 {
90 {
91 &IfxEray0_TXDA_P02_0_OUT,
92 &IfxEray0_TXDA_P11_3_OUT,
93 &IfxEray0_TXDA_P14_0_OUT,
94 &IfxEray0_TXDA_P14_10_OUT
95 },
96 {
97 &IfxEray0_TXDB_P02_2_OUT,
98 &IfxEray0_TXDB_P11_12_OUT,
99 &IfxEray0_TXDB_P14_0_OUT,
100 &IfxEray0_TXDB_P14_5_OUT
101 }
102 }
103 };
104
105 const IfxEray_Txen_Out *IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS] = {
106 {
107 {
108 &IfxEray0_TXENA_P02_4_OUT,
109 &IfxEray0_TXENA_P11_6_OUT,
110 &IfxEray0_TXENA_P14_9_OUT,
111 NULL_PTR,
112 NULL_PTR
113 },
114 {
115 &IfxEray0_TXENB_P02_5_OUT,
116 &IfxEray0_TXENB_P11_6_OUT,
117 &IfxEray0_TXENB_P11_11_OUT,
118 &IfxEray0_TXENB_P14_6_OUT,
119 &IfxEray0_TXENB_P14_9_OUT
120 }
121 }
122 };
IfxEray_Txd_Out
TXD pin mapping structure.
Definition: IfxEray_PinMap.h:65
IfxEray0_TXENB_P02_5_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT
Definition: IfxEray_PinMap.c:64
IfxEray0_TXENB_P11_6_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT
Definition: IfxEray_PinMap.c:66
IfxEray0_TXENA_P11_6_OUT
IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT
Definition: IfxEray_PinMap.c:62
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxEray0_TXDA_P11_3_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT
Definition: IfxEray_PinMap.c:54
IfxEray_Txen_Out_pinTable
const IfxEray_Txen_Out * IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]
Definition: IfxEray_PinMap.c:105
IfxEray0_RXDB2_P02_3_IN
IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN
Definition: IfxEray_PinMap.c:51
IfxEray0_TXDA_P02_0_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT
Definition: IfxEray_PinMap.c:53
IfxEray_NodeId_b
Ifx_ERAY Node B.
Definition: IfxEray_cfg.h:90
IfxEray_Txen_Out
TXEN pin mapping structure.
Definition: IfxEray_PinMap.h:74
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:121
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxEray0_RXDB3_P14_1_IN
IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN
Definition: IfxEray_PinMap.c:52
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEray0_TXENB_P14_6_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT
Definition: IfxEray_PinMap.c:67
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IFXERAY_PINMAP_RXD_IN_NUM_ITEMS
#define IFXERAY_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxEray_PinMap.h:110
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:125
IfxEray_Rxd_In_pinTable
const IfxEray_Rxd_In * IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
Definition: IfxEray_PinMap.c:71
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:122
IfxEray0_RXDB1_P11_10_IN
IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN
Definition: IfxEray_PinMap.c:50
IfxEray0_TXENA_P02_4_OUT
IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT
Definition: IfxEray_PinMap.c:61
IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS
#define IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS
Definition: IfxEray_PinMap.h:112
IfxEray_PinMap.h
ERAY I/O map.
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxEray0_TXDB_P02_2_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT
Definition: IfxEray_PinMap.c:57
IfxEray0_RXDA0_P14_8_IN
IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN
Definition: IfxEray_PinMap.c:45
IfxEray0_TXENB_P14_9_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT
Definition: IfxEray_PinMap.c:68
IfxEray0_TXDA_P14_10_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT
Definition: IfxEray_PinMap.c:56
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:123
IFXERAY_PINMAP_NUM_MODULES
#define IFXERAY_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxEray_PinMap.h:108
IfxEray0_TXENB_P11_11_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT
Definition: IfxEray_PinMap.c:65
IfxEray_Txd_Out_pinTable
const IfxEray_Txd_Out * IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
Definition: IfxEray_PinMap.c:88
IfxEray0_TXDB_P14_0_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT
Definition: IfxEray_PinMap.c:59
IfxEray0_RXDA1_P11_9_IN
IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN
Definition: IfxEray_PinMap.c:46
IfxEray_Rxd_In
RXD pin mapping structure.
Definition: IfxEray_PinMap.h:56
IfxEray_NodeId_a
Ifx_ERAY Node A.
Definition: IfxEray_cfg.h:89
IfxEray0_TXDB_P11_12_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT
Definition: IfxEray_PinMap.c:58
IfxEray0_RXDA2_P02_1_IN
IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN
Definition: IfxEray_PinMap.c:47
IfxEray0_RXDA3_P14_1_IN
IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN
Definition: IfxEray_PinMap.c:48
IfxEray0_RXDB0_P14_7_IN
IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN
Definition: IfxEray_PinMap.c:49
IFXERAY_PINMAP_NUM_NODES
#define IFXERAY_PINMAP_NUM_NODES
Definition: IfxEray_PinMap.h:109
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:124
IfxEray0_TXDA_P14_0_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT
Definition: IfxEray_PinMap.c:55
IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxEray_PinMap.h:111
IfxEray0_TXDB_P14_5_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT
Definition: IfxEray_PinMap.c:60
IfxEray0_TXENA_P14_9_OUT
IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT
Definition: IfxEray_PinMap.c:63


iLLD_TC26B: IfxEray_PinMap.h Source File

  • _PinMap
IfxEray_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxEray_PinMap.h
3 * \brief ERAY I/O map
4 * \ingroup IfxLld_Eray
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Eray_pinmap ERAY Pin Mapping
42 * \ingroup IfxLld_Eray
43 */
44
45 #ifndef IFXERAY_PINMAP_H
46 #define IFXERAY_PINMAP_H
47
48 #include <IfxEray_reg.h>
49 #include <_Impl/IfxEray_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Eray_pinmap
53 * \{ */
54
55 /** \brief RXD pin mapping structure */
56 typedef const struct
57 {
58 Ifx_ERAY* module; /**< \brief Base address */
59 IfxEray_NodeId nodeId; /**< \brief Node ID */
60 IfxPort_Pin pin; /**< \brief Port pin */
61 Ifx_RxSel select; /**< \brief Input multiplexer value */
62 } IfxEray_Rxd_In;
63
64 /** \brief TXD pin mapping structure */
65 typedef const struct
66 {
67 Ifx_ERAY* module; /**< \brief Base address */
68 IfxEray_NodeId nodeId; /**< \brief Node ID */
69 IfxPort_Pin pin; /**< \brief Port pin */
70 IfxPort_OutputIdx select; /**< \brief Port control code */
71 } IfxEray_Txd_Out;
72
73 /** \brief TXEN pin mapping structure */
74 typedef const struct
75 {
76 Ifx_ERAY* module; /**< \brief Base address */
77 IfxEray_NodeId nodeId; /**< \brief Node ID */
78 IfxPort_Pin pin; /**< \brief Port pin */
79 IfxPort_OutputIdx select; /**< \brief Port control code */
80 } IfxEray_Txen_Out;
81
82 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN; /**< \brief ERAY_RXDA0: ERAY input */
83 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN; /**< \brief ERAY_RXDA1: ERAY input */
84 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN; /**< \brief ERAY_RXDA2: ERAY input */
85 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN; /**< \brief ERAY_RXDA3: ERAY input */
86 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN; /**< \brief ERAY_RXDB0: ERAY input */
87 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN; /**< \brief ERAY_RXDB1: ERAY input */
88 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN; /**< \brief ERAY_RXDB2: ERAY input */
89 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN; /**< \brief ERAY_RXDB3: ERAY input */
90 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT; /**< \brief ERAY_TXDA: ERAY output */
91 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT; /**< \brief ERAY_TXDA: ERAY output */
92 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT; /**< \brief ERAY_TXDA: ERAY output */
93 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT; /**< \brief ERAY_TXDA: ERAY output */
94 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT; /**< \brief ERAY_TXDB: ERAY output */
95 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT; /**< \brief ERAY_TXDB: ERAY output */
96 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT; /**< \brief ERAY_TXDB: ERAY output */
97 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT; /**< \brief ERAY_TXDB: ERAY output */
98 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT; /**< \brief ERAY_TXENA: ERAY output */
99 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT; /**< \brief ERAY_TXENA: ERAY output */
100 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT; /**< \brief ERAY_TXENA: ERAY output */
101 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT; /**< \brief ERAY_TXENB: ERAY output */
102 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT; /**< \brief ERAY_TXENB: ERAY output */
103 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT; /**< \brief ERAY_TXENB: ERAY output */
104 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT; /**< \brief ERAY_TXENB: ERAY output */
105 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT; /**< \brief ERAY_TXENB: ERAY output */
106
107 /** \brief Table dimensions */
108 #define IFXERAY_PINMAP_NUM_MODULES 1
109 #define IFXERAY_PINMAP_NUM_NODES 2
110 #define IFXERAY_PINMAP_RXD_IN_NUM_ITEMS 4
111 #define IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS 4
112 #define IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS 5
113
114
115 /** \brief IfxEray_Rxd_In table */
116 IFX_EXTERN const IfxEray_Rxd_In *IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS];
117
118 /** \brief IfxEray_Txd_Out table */
119 IFX_EXTERN const IfxEray_Txd_Out *IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS];
120
121 /** \brief IfxEray_Txen_Out table */
122 IFX_EXTERN const IfxEray_Txen_Out *IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS];
123
124 /** \} */
125
126 #endif /* IFXERAY_PINMAP_H */
IfxEray_Txd_Out
TXD pin mapping structure.
Definition: IfxEray_PinMap.h:65
IfxEray0_TXENB_P11_6_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT
ERAY_TXENB: ERAY output.
Definition: IfxEray_PinMap.h:103
IfxEray_Rxd_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxEray_PinMap.h:60
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxEray_Rxd_In_pinTable
IFX_EXTERN const IfxEray_Rxd_In * IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
IfxEray_Rxd_In table.
Definition: IfxEray_PinMap.h:116
IfxEray_Txen_Out
TXEN pin mapping structure.
Definition: IfxEray_PinMap.h:74
IfxEray0_RXDA2_P02_1_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN
ERAY_RXDA2: ERAY input.
Definition: IfxEray_PinMap.h:84
IfxEray0_TXENB_P14_6_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT
ERAY_TXENB: ERAY output.
Definition: IfxEray_PinMap.h:104
IfxEray_Txd_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxEray_PinMap.h:70
IfxEray0_TXENA_P14_9_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT
ERAY_TXENA: ERAY output.
Definition: IfxEray_PinMap.h:100
IFXERAY_PINMAP_RXD_IN_NUM_ITEMS
#define IFXERAY_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxEray_PinMap.h:110
IfxEray0_TXDB_P14_0_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT
ERAY_TXDB: ERAY output.
Definition: IfxEray_PinMap.h:96
IfxEray0_RXDB2_P02_3_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN
ERAY_RXDB2: ERAY input.
Definition: IfxEray_PinMap.h:88
IfxEray_Rxd_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxEray_PinMap.h:61
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEray0_TXENA_P02_4_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT
ERAY_TXENA: ERAY output.
Definition: IfxEray_PinMap.h:98
IfxEray0_RXDB0_P14_7_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN
ERAY_RXDB0: ERAY input.
Definition: IfxEray_PinMap.h:86
IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS
#define IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS
Definition: IfxEray_PinMap.h:112
IfxEray0_TXENB_P11_11_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT
ERAY_TXENB: ERAY output.
Definition: IfxEray_PinMap.h:102
IfxEray_Txen_Out_pinTable
IFX_EXTERN const IfxEray_Txen_Out * IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxEray_Txen_Out table.
Definition: IfxEray_PinMap.h:122
IfxEray_Rxd_In::nodeId
IfxEray_NodeId nodeId
Node ID.
Definition: IfxEray_PinMap.h:59
IfxEray0_TXENB_P02_5_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT
ERAY_TXENB: ERAY output.
Definition: IfxEray_PinMap.h:101
IfxEray0_RXDB3_P14_1_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN
ERAY_RXDB3: ERAY input.
Definition: IfxEray_PinMap.h:89
IfxEray0_TXENB_P14_9_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT
ERAY_TXENB: ERAY output.
Definition: IfxEray_PinMap.h:105
IfxEray0_TXDA_P11_3_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT
ERAY_TXDA: ERAY output.
Definition: IfxEray_PinMap.h:91
IfxEray0_TXDB_P02_2_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT
ERAY_TXDB: ERAY output.
Definition: IfxEray_PinMap.h:94
IFXERAY_PINMAP_NUM_MODULES
#define IFXERAY_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxEray_PinMap.h:108
IfxEray_Rxd_In::module
Ifx_ERAY * module
Base address.
Definition: IfxEray_PinMap.h:58
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxEray0_TXENA_P11_6_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT
ERAY_TXENA: ERAY output.
Definition: IfxEray_PinMap.h:99
IfxEray0_RXDB1_P11_10_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN
ERAY_RXDB1: ERAY input.
Definition: IfxEray_PinMap.h:87
IfxEray_Rxd_In
RXD pin mapping structure.
Definition: IfxEray_PinMap.h:56
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxEray0_TXDA_P14_0_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT
ERAY_TXDA: ERAY output.
Definition: IfxEray_PinMap.h:92
IfxEray0_RXDA1_P11_9_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN
ERAY_RXDA1: ERAY input.
Definition: IfxEray_PinMap.h:83
IfxEray0_TXDB_P11_12_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT
ERAY_TXDB: ERAY output.
Definition: IfxEray_PinMap.h:95
IfxEray0_RXDA3_P14_1_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN
ERAY_RXDA3: ERAY input.
Definition: IfxEray_PinMap.h:85
IFXERAY_PINMAP_NUM_NODES
#define IFXERAY_PINMAP_NUM_NODES
Definition: IfxEray_PinMap.h:109
IfxEray0_TXDA_P02_0_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT
ERAY_TXDA: ERAY output.
Definition: IfxEray_PinMap.h:90
IfxEray0_RXDA0_P14_8_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN
ERAY_RXDA0: ERAY input.
Definition: IfxEray_PinMap.h:82
IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxEray_PinMap.h:111
IfxEray_cfg.h
ERAY on-chip implementation data.
IfxEray_NodeId
IfxEray_NodeId
Node Id in communication cycle.
Definition: IfxEray_cfg.h:87
IfxEray0_TXDB_P14_5_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT
ERAY_TXDB: ERAY output.
Definition: IfxEray_PinMap.h:97
IfxEray_Txd_Out_pinTable
IFX_EXTERN const IfxEray_Txd_Out * IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
IfxEray_Txd_Out table.
Definition: IfxEray_PinMap.h:119
IfxEray0_TXDA_P14_10_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT
ERAY_TXDA: ERAY output.
Definition: IfxEray_PinMap.h:93
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxEray_cfg.c Source File

  • _Impl
IfxEray_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxEray_cfg.c
3 * \brief ERAY on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxEray_cfg.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
51
52 IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES] = {
53 {&MODULE_ERAY0, (uint32)IfxEray_Index_0},
54 };
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxEray_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES]
Definition: IfxEray_cfg.c:52
IfxEray_Index_0
ERAY index 0.
Definition: IfxEray_cfg.h:82
IFXERAY_NUM_MODULES
#define IFXERAY_NUM_MODULES
Definition: IfxEray_cfg.h:65
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxEray_cfg.h
ERAY on-chip implementation data.


iLLD_TC26B: IfxEray_cfg.h Source File

  • _Impl
IfxEray_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxEray_cfg.h
3 * \brief ERAY on-chip implementation data
4 * \ingroup IfxLld_Eray
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Eray ERAY
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Eray_Impl Implementation
44 * \ingroup IfxLld_Eray
45 * \defgroup IfxLld_Eray_Std Standard Driver
46 * \ingroup IfxLld_Eray
47 * \defgroup IfxLld_Eray_Impl_Enumerations Enumerations
48 * \ingroup IfxLld_Eray_Impl
49 */
50
51 #ifndef IFXERAY_CFG_H
52 #define IFXERAY_CFG_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 #include "Cpu/Std/Ifx_Types.h"
59 #include "IfxEray_reg.h"
60
61 /******************************************************************************/
62 /*-----------------------------------Macros-----------------------------------*/
63 /******************************************************************************/
64
65 #define IFXERAY_NUM_MODULES (1)
66
67 #define IFXERAY_NUM_SLOTS (128)
68
69 #define IFXERAY_NUM_CHANNELS (2)
70
71 /******************************************************************************/
72 /*--------------------------------Enumerations--------------------------------*/
73 /******************************************************************************/
74
75 /** \addtogroup IfxLld_Eray_Impl_Enumerations
76 * \{ */
77 /** \brief List of the available Eray resources
78 */
79 typedef enum
80 {
81 IfxEray_Index_none = -1, /**< \brief Not Selected */
82 IfxEray_Index_0 = 0, /**< \brief ERAY index 0 */
83 } IfxEray_Index;
84
85 /** \brief Node Id in communication cycle.
86 */
87 typedef enum
88 {
89 IfxEray_NodeId_a = 0, /**< \brief Ifx_ERAY Node A */
90 IfxEray_NodeId_b = 1, /**< \brief Ifx_ERAY Node B */
91 IfxEray_NodeId_none = -1 /**< \brief None of the Ifx_ERAY Nodes */
92 } IfxEray_NodeId;
93
94 /** \} */
95
96 /** \addtogroup IfxLld_Eray_Impl_Enumerations
97 * \{ */
98
99 /******************************************************************************/
100 /*-------------------Global Exported Variables/Constants----------------------*/
101 /******************************************************************************/
102
103 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES];
104
105 /** \} */
106
107 #endif /* IFXERAY_CFG_H */
IfxEray_NodeId_none
None of the Ifx_ERAY Nodes.
Definition: IfxEray_cfg.h:91
IfxEray_NodeId_b
Ifx_ERAY Node B.
Definition: IfxEray_cfg.h:90
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEray_Index_0
ERAY index 0.
Definition: IfxEray_cfg.h:82
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IFXERAY_NUM_MODULES
#define IFXERAY_NUM_MODULES
Definition: IfxEray_cfg.h:65
IfxEray_NodeId_a
Ifx_ERAY Node A.
Definition: IfxEray_cfg.h:89
IfxEray_Index_none
Not Selected.
Definition: IfxEray_cfg.h:81
IfxEray_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES]
Definition: IfxEray_cfg.h:103
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxEray_Index
IfxEray_Index
List of the available Eray resources.
Definition: IfxEray_cfg.h:79
IfxEray_NodeId
IfxEray_NodeId
Node Id in communication cycle.
Definition: IfxEray_cfg.h:87


iLLD_TC26B: IfxEth.c Source File

  • Eth
  • Std
IfxEth.c
Go to the documentation of this file.
1 /**
2 * \file IfxEth.c
3 * \brief ETH basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxEth.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
51
52 uint8 IfxEth_rxBuffer[IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE];
53
54 IfxEth_RxDescrList IfxEth_rxDescr;
55
56 uint8 IfxEth_txBuffer[IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE];
57
58 IfxEth_TxDescrList IfxEth_txDescr;
59
60 /******************************************************************************/
61 /*-------------------------Function Implementations---------------------------*/
62 /******************************************************************************/
63
64 void IfxEth_disableModule(void)
65 {
66 uint16 l_TempVar = IfxScuWdt_getCpuWatchdogPassword();
67 IfxScuWdt_clearCpuEndinit(l_TempVar);
68 ETH_CLC.B.DISR = 1;
69 IfxScuWdt_setCpuEndinit(l_TempVar);
70 }
71
72
73 void IfxEth_enableModule(void)
74 {
75 {
76 uint16 l_TempVar = IfxScuWdt_getCpuWatchdogPassword();
77 IfxScuWdt_clearCpuEndinit(l_TempVar);
78 ETH_CLC.U = 0;
79 IfxScuWdt_setCpuEndinit(l_TempVar);
80 }
81 }
82
83
84 void IfxEth_freeReceiveBuffer(IfxEth *eth)
85 {
86 IfxEth_RxDescr *descr = IfxEth_getActualRxDescriptor(eth);
87 IfxEth_RxDescr_release(descr);
88 IfxEth_shuffleRxDescriptor(eth);
89 }
90
91
92 void *IfxEth_getReceiveBuffer(IfxEth *eth)
93 {
94 void *result = 0;
95 IfxEth_RxDescr *descr;
96
97 if (IfxEth_isRxDataAvailable(eth))
98 {
99 eth->rxCount++;
100 descr = IfxEth_getActualRxDescriptor(eth);
101 result = (void *)(descr->RDES2.U);
102 }
103
104 IfxEth_wakeupReceiver(eth);
105
106 return result;
107 }
108
109
110 void *IfxEth_getTransmitBuffer(IfxEth *eth)
111 {
112 void *buffer = NULL_PTR;
113 IfxEth_TxDescr *descr = IfxEth_getActualTxDescriptor(eth);
114
115 // check descriptor / buffer is free.
116 if (descr->TDES0.A.OWN == 0)
117 {
118 buffer = ((void *)descr->TDES2.U);
119 }
120
121 return buffer;
122 }
123
124
125 void IfxEth_init(IfxEth *eth, const IfxEth_Config *config)
126 {
127 eth->ethSfr = config->ethSfr;
128
129 #ifndef _WIN32
130 IfxEth_enableModule();
131
132 if (config->phyInterfaceMode == IfxEth_PhyInterfaceMode_rmii)
133 {
134 if (config->rmiiPins != NULL_PTR)
135 {
136 IfxEth_setupRmiiOutputPins(eth, config->rmiiPins);
137 IfxEth_setupRmiiInputPins(eth, config->rmiiPins);
138 }
139 }
140 else
141 {
142 if (config->miiPins != NULL_PTR)
143 {
144 IfxEth_setupMiiOutputPins(eth, config->miiPins);
145 IfxEth_setupMiiInputPins(eth, config->miiPins);
146 }
147 }
148
149 #endif
150
151 IfxEth_resetModule();
152
153 /* select the Phy Interface Mode */
154 IfxEth_setPhyInterfaceMode(eth, config->phyInterfaceMode);
155 IfxEth_applySoftwareReset(eth);
156
157 /* wait until reset is finished or timeout. */
158 {
159 uint32 timeout = 0;
160
161 while ((IfxEth_isSoftwareResetDone(eth) == 0) && (timeout < IFXETH_MAX_TIMEOUT_VALUE))
162 {
163 timeout++;
164 }
165 }
166
167 /* configure bus mode */
168 {
169 Ifx_ETH_BUS_MODE busMode;
170 busMode.U = ETH_BUS_MODE.U;
171 busMode.B.DSL = 0; /* descriptor skip length in ring mode */
172 busMode.B.ATDS = 0; /* alternate descriptor size: 0 => 4 DWORDS, 1 => 8 DWORDS */
173 busMode.B.DA = 0; /* 0 = weighted round-robin, 1 = fixed priority */
174
175 ETH_BUS_MODE.U = busMode.U;
176 }
177
178 /* configure ETH MAC */
179 {
180 Ifx_ETH_MAC_CONFIGURATION ethMacCfg;
181 ethMacCfg.U = ETH_MAC_CONFIGURATION.U;
182
183 ethMacCfg.B.PRELEN = 0; /* 7 bytes preamble */
184 // ethMacCfg.B.RE = 0; /* disable receiver */
185 // ethMacCfg.B.TE = 0; /* disable transmitter */
186 ethMacCfg.B.DC = 0; /* Deferral Check */
187 // ethMacCfg.B.BL = 0; /* Backoff Limit */
188 ethMacCfg.B.ACS = 1; /* Automatic Pad/CRC stripping--less than 1536 bytes */
189 // ethMacCfg.B.DR = 0; /* Disable Retry */
190 ethMacCfg.B.IPC = 0; /* checksum offload */
191 ethMacCfg.B.DM = 1; /* Duplex Mode: 0=Half Duplex, 1=Full duplex */
192 ethMacCfg.B.LM = 0; /* Loopback Mode */
193 // ethMacCfg.B.DO = 0; /* Disable Receive Own */
194 ethMacCfg.B.FES = 1; /* Speed 0->10mbps 1->100mbps */
195 ethMacCfg.B.PS = 1; /* port select 10/100mbps */
196 ethMacCfg.B.IFG = 0; /* Inter Frame Gap - gap between frames = 96 bit times */
197 ethMacCfg.B.JE = 0; /* Jumbo Frame Enable - no jumbo frames */
198 ethMacCfg.B.JD = 0; /* Jabber Disable - cut of transmission after 2,048 data bytes. */
199 ethMacCfg.B.WD = 0; /* Watchdog Disable - cut off frame after 2,048 bytes. */
200 ethMacCfg.B.CST = 1; /* CRC stripping - last four bytes are stripped and dropped to application. */
201 ethMacCfg.B.TWOKPE = 0; /* 2K Packets Enable - with JE=0 - all received frames of size > 1,518bytes are Giant frames.*/
202
203 ETH_MAC_CONFIGURATION.U = ethMacCfg.U;
204 }
205
206 IfxEth_setMacAddress(eth, config->macAddress);
207
208 /* setup MMC */
209 ETH_MMC_CONTROL.B.CNTFREEZ = 1; /* disable MMC counters - counters reset */
210
211 /* setup GMAC */
212 ETH_STATUS.U = 0x0001e7ff; /* reset all interrupt flag(s) */
213 ETH_MAC_FRAME_FILTER.U = 0x00000010; /* Hash Unicast */
214
215 ETH_INTERRUPT_ENABLE.U = 0x00010041; /* enable tx & rx interrupts */
216
217 #ifndef _WIN32
218
219 if (config->isrPriority)
220 {
221 IfxSrc_init(&SRC_ETH, config->isrProvider, config->isrPriority);
222 IfxSrc_enable(&SRC_ETH);
223 }
224
225 if (config->phyInit != NULL_PTR)
226 {
227 config->phyInit(); /* init PHY (100Mbit, full duplex with RMII) */
228 }
229
230 #endif
231
232 eth->config = *config;
233 eth->error = 0;
234 eth->status.U = 0;
235 eth->rxCount = 0;
236 eth->txCount = 0;
237
238 IfxEth_stopTransmitter(eth);
239
240 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, sizeof(IfxEth_TxDescr) == (IFXETH_DESCR_SIZE * sizeof(uint32)));
241 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, sizeof(IfxEth_RxDescr) == (IFXETH_DESCR_SIZE * sizeof(uint32)));
242
243 eth->rxDescr = config->rxDescr;
244 eth->txDescr = config->txDescr;
245
246 eth->descriptorMode = config->descriptorMode;
247
248 if (config->descriptorMode == IfxEth_DescriptorMode_chain)
249 {
250 IfxEth_initReceiveDescriptors(eth);
251 IfxEth_initTransmitDescriptors(eth);
252 }
253 else if (config->descriptorMode == IfxEth_DescriptorMode_ring)
254 {
255 IfxEth_initReceiveDescriptorsRingMode(eth, &config->ringModeBuffersConfig.rxConfig);
256 IfxEth_initTransmitDescriptorsRingMode(eth, &config->ringModeBuffersConfig.txConfig);
257 }
258 else
259 {}
260 }
261
262
263 void IfxEth_initConfig(IfxEth_Config *config, Ifx_ETH *ethSfr)
264 {
265 const IfxEth_Config defaultConfig = {
266 {0x00, 0x11, 0x22, 0x33, 0x44, 0x55}, /* MAC address */
267 NULL_PTR,
268 NULL_PTR,
269 IfxEth_PhyInterfaceMode_rmii, /* PHY Interfac mode RMII */
270 NULL_PTR, /* Pointer to the RMII pin config */
271 NULL_PTR, /* Pointer to the MII pin config */
272 (Ifx_Priority)0, /* Interrupt serivce priority */
273 IfxSrc_Tos_cpu0, /* Interrupt serivce provider */
274 NULL_PTR, /* Pointer to register base */
275 &IfxEth_rxDescr, /* pointer to RX descriptor RAM */
276 &IfxEth_txDescr, /* pointer to TX descriptor RAM */
277 IfxEth_DescriptorMode_chain, /* chain mode descreptors */
278 {
279 {
280 IfxEth_RingModeBufferUsed_buffer1,
281 0x0,
282 0x0,
283 IFXETH_RTX_BUFFER_SIZE,
284 0,
285 },
286 {
287 IfxEth_RingModeBufferUsed_buffer1,
288 0x0,
289 0x0,
290 IFXETH_RTX_BUFFER_SIZE,
291 0,
292 },
293 },
294 };
295
296 *config = defaultConfig;
297 config->ethSfr = ethSfr;
298 }
299
300
301 void IfxEth_initReceiveDescriptors(IfxEth *eth)
302 {
303 /* Use enhanced descriptors, because ETH is generally configured to precision time protocol. */
304 int i;
305 IfxEth_RxDescr *descr = IfxEth_getBaseRxDescriptor(eth);
306
307 eth->pRxDescr = descr;
308
309 /* init descriptor chained mode */
310 for (i = 0; i < IFXETH_MAX_RX_BUFFERS; i++)
311 {
312 descr->RDES0.U = 0;
313 descr->RDES0.A.OWN = 1U;
314
315 descr->RDES1.U = 0;
316 descr->RDES1.A.RCH = 1U;
317 descr->RDES1.A.RBS1 = (IFXETH_RTX_BUFFER_SIZE);
318
319 #ifndef IFXETH_RX_BUFFER_BY_USER
320 IfxEth_RxDescr_setBuffer(descr, &(IfxEth_rxBuffer[i][0]));
321 #endif
322
323 /* with RCH set, link to next descriptor address */
324 descr->RDES3.U = (uint32)&(descr[1]);
325 descr = &descr[1];
326 }
327
328 /* correction for last descriptor */
329 {
330 descr = &descr[-1];
331
332 /* indicate end of ring */
333 descr->RDES1.A.RER = 1U;
334
335 /* with RCH set, link to first descriptor address */
336 eth->pRxDescr = IfxEth_getBaseRxDescriptor(eth);
337 descr->RDES3.U = (uint32)eth->pRxDescr;
338 }
339
340 eth->rxCount = 0;
341
342 /* write descriptor list base address */
343 IfxEth_setReceiveDescriptorAddress(&MODULE_ETH, IfxEth_getBaseRxDescriptor(eth));
344 }
345
346
347 void IfxEth_initReceiveDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeRxBuffersConfig *config)
348 {
349 /* Use enhanced descriptors, because ETH is generally configured to precision time protocol. */
350 int i;
351 uint32 buffer1StartAddress = 0;
352 uint32 buffer2StartAddress = 0;
353
354 IfxEth_RxDescr *descr = IfxEth_getBaseRxDescriptor(eth);
355
356 eth->pRxDescr = descr;
357
358 /* init descriptors in ring mode */
359
360 for (i = 0; i < IFXETH_MAX_RX_BUFFERS; i++)
361 {
362 descr->RDES0.U = 0;
363 descr->RDES0.A.OWN = 1U;
364
365 descr->RDES1.U = 0;
366
367 if ((config->rxBufferUsed == IfxEth_RingModeBufferUsed_buffer1) || (config->rxBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
368 {
369 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->rxBuffer1Size) % 4 == 0);
370 buffer1StartAddress = (uint32)(config->rxBuffer1StartAddress + (config->rxBuffer1Size * i));
371 IfxEth_setReceiveBuffer1RingMode(eth, descr, buffer1StartAddress, config->rxBuffer1Size);
372 }
373 else
374 {
375 IfxEth_setReceiveBuffer1RingMode(eth, descr, 0x0, 0);
376 }
377
378 if ((config->rxBufferUsed == IfxEth_RingModeBufferUsed_buffer2) || (config->rxBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
379 {
380 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->rxBuffer2Size) % 4 == 0);
381 buffer2StartAddress = (uint32)(config->rxBuffer2StartAddress + (config->rxBuffer2Size * i));
382 IfxEth_setReceiveBuffer2RingMode(eth, descr, buffer2StartAddress, config->rxBuffer2Size);
383 }
384 else
385 {
386 IfxEth_setReceiveBuffer2RingMode(eth, descr, 0x0, 0);
387 }
388
389 descr = &descr[1];
390 }
391
392 /* correction for last descriptor */
393 {
394 descr = &descr[-1];
395
396 /* indicate end of ring */
397 descr->RDES1.A.RER = 1U;
398
399 eth->pRxDescr = IfxEth_getBaseRxDescriptor(eth);
400 }
401
402 eth->rxCount = 0;
403
404 /* write descriptor list base address */
405 IfxEth_setReceiveDescriptorAddress(&MODULE_ETH, IfxEth_getBaseRxDescriptor(eth));
406
407 eth->rxBufferUsed = config->rxBufferUsed;
408 }
409
410
411 void IfxEth_initTransmitDescriptors(IfxEth *eth)
412 {
413 int i;
414 IfxEth_TxDescr *descr = IfxEth_getBaseTxDescriptor(eth);
415
416 eth->pTxDescr = descr;
417
418 /* Initialize chained descriptor mode */
419 for (i = 0; i < IFXETH_MAX_TX_BUFFERS; i++)
420 {
421 descr->TDES0.U = 0;
422 descr->TDES0.A.IC = 1U;
423 descr->TDES0.A.FS = 1U;
424 descr->TDES0.A.LS = 1U;
425 descr->TDES0.A.TCH = 1U;
426
427 #ifndef IFXETH_TX_BUFFER_BY_USER
428 IfxEth_TxDescr_setBuffer(descr, &(IfxEth_txBuffer[i][0]));
429 #endif
430
431 /* with TCH set, TDES3 points to next descriptor */
432 descr->TDES3.U = (uint32)&descr[1];
433 descr = &descr[1];
434 }
435
436 /* correction for last descriptor */
437 {
438 descr = &descr[-1];
439
440 /* indicate end of ring */
441 descr->TDES0.A.TER = 1U;
442
443 /* with TCH set, TDES3 points to the first descriptor */
444 eth->pTxDescr = IfxEth_getBaseTxDescriptor(eth);
445 descr->TDES3.U = (uint32)eth->pTxDescr;
446 }
447
448 eth->txCount = 0;
449
450 /* write descriptor list base address */
451 IfxEth_setTransmitDescriptorAddress(&MODULE_ETH, IfxEth_getBaseTxDescriptor(eth));
452 }
453
454
455 void IfxEth_initTransmitDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeTxBuffersConfig *config)
456 {
457 int i;
458 uint32 buffer1StartAddress = 0;
459 uint32 buffer2StartAddress = 0;
460
461 IfxEth_TxDescr *descr = IfxEth_getBaseTxDescriptor(eth);
462
463 eth->pTxDescr = descr;
464
465 /* Initialize descriptors in ring mode */
466 for (i = 0; i < IFXETH_MAX_TX_BUFFERS; i++)
467 {
468 descr->TDES0.U = 0;
469 descr->TDES0.A.IC = 1U;
470 descr->TDES0.A.FS = 1U;
471 descr->TDES0.A.LS = 1U;
472
473 if ((config->txBufferUsed == IfxEth_RingModeBufferUsed_buffer1) || (config->txBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
474 {
475 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->txBuffer1Size) % 4 == 0);
476
477 buffer1StartAddress = (uint32)(config->txBuffer1StartAddress + (config->txBuffer1Size * i));
478 IfxEth_setTransmitBuffer1RingMode(eth, descr, buffer1StartAddress, config->txBuffer1Size);
479 }
480 else
481 {
482 IfxEth_setTransmitBuffer1RingMode(eth, descr, 0x0, 0);
483 }
484
485 if ((config->txBufferUsed == IfxEth_RingModeBufferUsed_buffer2) || (config->txBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
486 {
487 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->txBuffer2Size) % 4 == 0);
488
489 buffer2StartAddress = (uint32)(config->txBuffer2StartAddress + (config->txBuffer2Size * i));
490 IfxEth_setTransmitBuffer2RingMode(eth, descr, buffer2StartAddress, config->txBuffer2Size);
491 }
492 else
493 {
494 IfxEth_setTransmitBuffer2RingMode(eth, descr, 0x0, 0);
495 }
496
497 descr = &descr[1];
498 }
499
500 /* correction for last descriptor */
501 {
502 descr = &descr[-1];
503
504 /* indicate end of ring */
505 descr->TDES0.A.TER = 1U;
506
507 eth->pTxDescr = IfxEth_getBaseTxDescriptor(eth);
508 }
509
510 eth->txCount = 0;
511
512 /* write descriptor list base address */
513 IfxEth_setTransmitDescriptorAddress(&MODULE_ETH, IfxEth_getBaseTxDescriptor(eth));
514
515 eth->txBufferUsed = config->txBufferUsed;
516 }
517
518
519 void IfxEth_readMacAddress(IfxEth *eth, uint8 *macAddress)
520 {
521 (void)eth;
522 *((uint32 *)macAddress) = ETH_MAC_ADDRESS_G00_LOW.U;
523 *((uint16 *)(&macAddress[4])) = (uint16)(ETH_MAC_ADDRESS_G00_HIGH.U & 0xFFFFU);
524 }
525
526
527 void IfxEth_resetModule(void)
528 {
529 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
530 IfxScuWdt_clearCpuEndinit(passwd);
531
532 ETH_KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
533 ETH_KRST1.B.RST = 1;
534 IfxScuWdt_setCpuEndinit(passwd);
535
536 while (0 == ETH_KRST0.B.RSTSTAT) /* Wait until reset is executed */
537 {}
538
539 IfxScuWdt_clearCpuEndinit(passwd);
540 ETH_KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
541
542 IfxScuWdt_setCpuEndinit(passwd);
543 }
544
545
546 void IfxEth_sendTransmitBuffer(IfxEth *eth, uint16 len)
547 {
548 IfxEth_TxDescr *descr = IfxEth_getActualTxDescriptor(eth);
549
550 descr->TDES1.U = len; /* with TCH set, TBS1 is used for buffer size */
551 descr->TDES0.A.OWN = 1U; /* release to DMA */
552
553 IfxEth_wakeupTransmitter(eth);
554 IfxEth_shuffleTxDescriptor(eth);
555
556 eth->txCount++;
557 }
558
559
560 void IfxEth_sendTransmitBuffersRingMode(IfxEth *eth, uint16 buffer1Length, uint16 buffer2Length)
561 {
562 IfxEth_TxDescr *descr = IfxEth_getActualTxDescriptor(eth);
563
564 if ((eth->txBufferUsed == IfxEth_RingModeBufferUsed_buffer1) || (eth->txBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
565 {
566 descr->TDES1.A.TBS1 = buffer1Length;
567 }
568
569 if ((eth->txBufferUsed == IfxEth_RingModeBufferUsed_buffer2) || (eth->txBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
570 {
571 descr->TDES1.A.TBS2 = buffer2Length;
572 }
573
574 descr->TDES0.A.OWN = 1U; /* release to DMA */
575
576 IfxEth_wakeupTransmitter(eth);
577 IfxEth_shuffleTxDescriptor(eth);
578
579 eth->txCount++;
580 }
581
582
583 void IfxEth_setAndSendTransmitBuffer(IfxEth *eth, void *buffer, uint16 len)
584 {
585 IfxEth_TxDescr_setBuffer(IfxEth_getActualTxDescriptor(eth), buffer);
586 IfxEth_sendTransmitBuffer(eth, len);
587 }
588
589
590 void IfxEth_setMacAddress(IfxEth *eth, const uint8 *macAddress)
591 {
592 (void)eth;
593 ETH_MAC_ADDRESS_G00_HIGH.U = 0
594 | ((uint32)macAddress[4] << 0U)
595 | ((uint32)macAddress[5] << 8U)
596 | 0x80000000U;
597
598 ETH_MAC_ADDRESS_G00_LOW.U = 0
599 | ((uint32)macAddress[0] << 0U)
600 | ((uint32)macAddress[1] << 8U)
601 | ((uint32)macAddress[2] << 16U)
602 | ((uint32)macAddress[3] << 24U)
603 ;
604 }
605
606
607 void IfxEth_setupChecksumEngine(IfxEth *eth, IfxEth_ChecksumMode mode)
608 {
609 int i;
610
611 if (mode != IfxEth_ChecksumMode_bypass)
612 {
613 ETH_OPERATION_MODE.B.TSF = 1U;
614 ETH_OPERATION_MODE.B.DT = 0U; /* 0 = drop TCP/IP frame with checksum error */
615 ETH_MAC_CONFIGURATION.B.IPC = 1U; /* 1 = enable received IP frame checksum engine */
616
617 IfxEth_TxDescr *descr = IfxEth_getBaseTxDescriptor(eth);
618
619 for (i = 0; i < IFXETH_MAX_TX_BUFFERS; i++)
620 {
621 descr->TDES0.A.CIC = mode;
622 descr = IfxEth_TxDescr_getNext(descr);
623 }
624 }
625 }
626
627
628 void IfxEth_setupMiiInputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins)
629 {
630 (void)eth;
631
632 IfxPort_InputMode mode = IfxPort_InputMode_noPullDevice;
633 IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed1;
634
635 if (miiPins->crs != NULL_PTR)
636 {
637 IfxEth_Crs_In *crs = miiPins->crs;
638 ETH_GPCTL.B.ALTI2 = crs->select;
639 IfxPort_setPinModeInput(crs->pin.port, crs->pin.pinIndex, mode);
640 IfxPort_setPinPadDriver(crs->pin.port, crs->pin.pinIndex, speedGrade);
641 }
642 else
643 {
644 /* MII lite mode */
645 ETH_GPCTL.B.ALTI2 = Ifx_RxSel_d;
646 }
647
648 if (miiPins->col != NULL_PTR)
649 {
650 IfxEth_Col_In *col = miiPins->col;
651 ETH_GPCTL.B.ALTI3 = col->select;
652 IfxPort_setPinModeInput(col->pin.port, col->pin.pinIndex, mode);
653 IfxPort_setPinPadDriver(col->pin.port, col->pin.pinIndex, speedGrade);
654 }
655 else
656 {
657 /* MII lite mode */
658 ETH_GPCTL.B.ALTI3 = Ifx_RxSel_d;
659 }
660
661 IfxEth_Txclk_In *txClk = miiPins->txClk;
662 ETH_GPCTL.B.ALTI10 = txClk->select;
663 IfxPort_setPinModeInput(txClk->pin.port, txClk->pin.pinIndex, mode);
664 IfxPort_setPinPadDriver(txClk->pin.port, txClk->pin.pinIndex, speedGrade);
665
666 IfxEth_Rxclk_In *rxClk = miiPins->rxClk;
667 ETH_GPCTL.B.ALTI1 = rxClk->select;
668 IfxPort_setPinModeInput(rxClk->pin.port, rxClk->pin.pinIndex, mode);
669 IfxPort_setPinPadDriver(rxClk->pin.port, rxClk->pin.pinIndex, speedGrade);
670
671 IfxEth_Rxdv_In *rxDv = miiPins->rxDv;
672 ETH_GPCTL.B.ALTI4 = rxDv->select;
673 IfxPort_setPinModeInput(rxDv->pin.port, rxDv->pin.pinIndex, mode);
674 IfxPort_setPinPadDriver(rxDv->pin.port, rxDv->pin.pinIndex, speedGrade);
675
676 if (miiPins->rxEr != NULL_PTR)
677 {
678 IfxEth_Rxer_In *rxEr = miiPins->rxEr;
679 ETH_GPCTL.B.ALTI5 = rxEr->select;
680 IfxPort_setPinModeInput(rxEr->pin.port, rxEr->pin.pinIndex, mode);
681 IfxPort_setPinPadDriver(rxEr->pin.port, rxEr->pin.pinIndex, speedGrade);
682 }
683 else
684 {
685 /* MII lite mode */
686 ETH_GPCTL.B.ALTI5 = Ifx_RxSel_d;
687 }
688
689 IfxEth_Rxd_In *rxd0 = miiPins->rxd0;
690 ETH_GPCTL.B.ALTI6 = rxd0->select;
691 IfxPort_setPinModeInput(rxd0->pin.port, rxd0->pin.pinIndex, mode);
692 IfxPort_setPinPadDriver(rxd0->pin.port, rxd0->pin.pinIndex, speedGrade);
693
694 IfxEth_Rxd_In *rxd1 = miiPins->rxd1;
695 ETH_GPCTL.B.ALTI7 = rxd1->select;
696 IfxPort_setPinModeInput(rxd1->pin.port, rxd1->pin.pinIndex, mode);
697 IfxPort_setPinPadDriver(rxd1->pin.port, rxd1->pin.pinIndex, speedGrade);
698
699 IfxEth_Rxd_In *rxd2 = miiPins->rxd2;
700 ETH_GPCTL.B.ALTI8 = rxd2->select;
701 IfxPort_setPinModeInput(rxd2->pin.port, rxd2->pin.pinIndex, mode);
702 IfxPort_setPinPadDriver(rxd2->pin.port, rxd2->pin.pinIndex, speedGrade);
703
704 IfxEth_Rxd_In *rxd3 = miiPins->rxd3;
705 ETH_GPCTL.B.ALTI9 = rxd3->select;
706 IfxPort_setPinModeInput(rxd3->pin.port, rxd3->pin.pinIndex, mode);
707 IfxPort_setPinPadDriver(rxd3->pin.port, rxd3->pin.pinIndex, speedGrade);
708
709 IfxEth_Mdio_InOut *mdio = miiPins->mdio;
710 ETH_GPCTL.B.ALTI0 = mdio->inSelect;
711 }
712
713
714 void IfxEth_setupMiiOutputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins)
715 {
716 (void)eth;
717 IfxPort_OutputMode mode = IfxPort_OutputMode_pushPull;
718 IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed1;
719
720 IfxEth_Txen_Out *txEn = miiPins->txEn;
721 IfxPort_setPinPadDriver(txEn->pin.port, txEn->pin.pinIndex, speedGrade);
722 IfxPort_setPinModeOutput(txEn->pin.port, txEn->pin.pinIndex, mode, txEn->select);
723
724 if (miiPins->txEr != NULL_PTR)
725 {
726 IfxEth_Txer_Out *txEr = miiPins->txEr;
727 IfxPort_setPinPadDriver(txEr->pin.port, txEr->pin.pinIndex, speedGrade);
728 IfxPort_setPinModeOutput(txEr->pin.port, txEr->pin.pinIndex, mode, txEr->select);
729 }
730
731 IfxEth_Txd_Out *txd0 = miiPins->txd0;
732 IfxPort_setPinPadDriver(txd0->pin.port, txd0->pin.pinIndex, speedGrade);
733 IfxPort_setPinModeOutput(txd0->pin.port, txd0->pin.pinIndex, mode, txd0->select);
734
735 IfxEth_Txd_Out *txd1 = miiPins->txd1;
736 IfxPort_setPinPadDriver(txd1->pin.port, txd1->pin.pinIndex, speedGrade);
737 IfxPort_setPinModeOutput(txd1->pin.port, txd1->pin.pinIndex, mode, txd1->select);
738
739 IfxEth_Txd_Out *txd2 = miiPins->txd2;
740 IfxPort_setPinPadDriver(txd2->pin.port, txd2->pin.pinIndex, speedGrade);
741 IfxPort_setPinModeOutput(txd2->pin.port, txd2->pin.pinIndex, mode, txd2->select);
742
743 IfxEth_Txd_Out *txd3 = miiPins->txd3;
744 IfxPort_setPinPadDriver(txd3->pin.port, txd3->pin.pinIndex, speedGrade);
745 IfxPort_setPinModeOutput(txd3->pin.port, txd3->pin.pinIndex, mode, txd3->select);
746
747 IfxEth_Mdc_Out *mdc = miiPins->mdc;
748 IfxPort_setPinPadDriver(mdc->pin.port, mdc->pin.pinIndex, speedGrade);
749 IfxPort_setPinModeOutput(mdc->pin.port, mdc->pin.pinIndex, mode, mdc->select);
750 }
751
752
753 void IfxEth_setupRmiiInputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
754 {
755 (void)eth;
756
757 ETH_GPCTL.B.ALTI0 = rmiiPins->mdio->inSelect;
758 ETH_GPCTL.B.ALTI1 = rmiiPins->refClk->select;
759 ETH_GPCTL.B.ALTI4 = rmiiPins->crsDiv->select;
760 ETH_GPCTL.B.ALTI6 = rmiiPins->rxd0->select;
761 ETH_GPCTL.B.ALTI7 = rmiiPins->rxd1->select;
762
763 {
764 IfxPort_InputMode mode = IfxPort_InputMode_noPullDevice;
765 IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed1;
766
767 IfxEth_Crsdv_In *crsDiv = rmiiPins->crsDiv;
768 IfxEth_Refclk_In *refClk = rmiiPins->refClk;
769 IfxEth_Rxd_In *rxd0 = rmiiPins->rxd0;
770 IfxEth_Rxd_In *rxd1 = rmiiPins->rxd1;
771
772 IfxPort_setPinModeInput(crsDiv->pin.port, crsDiv->pin.pinIndex, mode);
773 IfxPort_setPinModeInput(refClk->pin.port, refClk->pin.pinIndex, mode);
774 IfxPort_setPinModeInput(rxd0->pin.port, rxd0->pin.pinIndex, mode);
775 IfxPort_setPinModeInput(rxd1->pin.port, rxd1->pin.pinIndex, mode);
776
777 IfxPort_setPinPadDriver(crsDiv->pin.port, crsDiv->pin.pinIndex, speedGrade);
778 IfxPort_setPinPadDriver(refClk->pin.port, refClk->pin.pinIndex, speedGrade);
779 IfxPort_setPinPadDriver(rxd0->pin.port, rxd0->pin.pinIndex, speedGrade);
780 IfxPort_setPinPadDriver(rxd1->pin.port, rxd1->pin.pinIndex, speedGrade);
781 }
782 }
783
784
785 void IfxEth_setupRmiiOutputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
786 {
787 IfxPort_OutputMode mode = IfxPort_OutputMode_pushPull;
788 IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed1;
789
790 IfxEth_Mdc_Out *mdc = rmiiPins->mdc;
791 IfxEth_Mdio_InOut *mdio = rmiiPins->mdio;
792 IfxEth_Txen_Out *txen = rmiiPins->txEn;
793 IfxEth_Txd_Out *txd0 = rmiiPins->txd0;
794 IfxEth_Txd_Out *txd1 = rmiiPins->txd1;
795
796 (void)eth;
797
798 #if 0
799 IfxPort_setPinPadDriver(mdc->pin.port, mdc->pin.pinIndex, speedGrade);
800 IfxPort_setPinPadDriver(mdio->pin.port, mdio->pin.pinIndex, speedGrade);
801 #endif
802 IfxPort_setPinPadDriver(txen->pin.port, txen->pin.pinIndex, speedGrade);
803 IfxPort_setPinPadDriver(txd0->pin.port, txd0->pin.pinIndex, speedGrade);
804 IfxPort_setPinPadDriver(txd1->pin.port, txd1->pin.pinIndex, speedGrade);
805
806 IfxPort_setPinModeOutput(mdc->pin.port, mdc->pin.pinIndex, mode, mdc->select);
807 IfxPort_setPinModeOutput(txen->pin.port, txen->pin.pinIndex, mode, txen->select);
808 IfxPort_setPinModeOutput(txd0->pin.port, txd0->pin.pinIndex, mode, txd0->select);
809 IfxPort_setPinModeOutput(txd1->pin.port, txd1->pin.pinIndex, mode, txd1->select);
810
811 // For MDIO, when P21.1 is used it should be configured as output
812 if ((mdio->pin.port == (&MODULE_P21)) && (mdio->pin.pinIndex == 1))
813 {
814 IfxPort_setPinModeOutput(mdio->pin.port, mdio->pin.pinIndex, mode, mdio->outSelect);
815 }
816 }
817
818
819 void IfxEth_shuffleRxDescriptor(IfxEth *eth)
820 {
821 if (eth->descriptorMode == IfxEth_DescriptorMode_chain)
822 {
823 eth->pRxDescr = IfxEth_RxDescr_getNext(eth->pRxDescr);
824 }
825 else if ((eth->descriptorMode == IfxEth_DescriptorMode_ring) && (eth->pRxDescr->RDES1.A.RER != 1))
826 {
827 eth->pRxDescr = &eth->pRxDescr[1];
828 }
829 else
830 {
831 eth->pRxDescr = IfxEth_getBaseRxDescriptor(eth);
832 }
833 }
834
835
836 void IfxEth_shuffleTxDescriptor(IfxEth *eth)
837 {
838 if (eth->descriptorMode == IfxEth_DescriptorMode_chain)
839 {
840 eth->pTxDescr = IfxEth_TxDescr_getNext(eth->pTxDescr);
841 }
842 else if ((eth->descriptorMode == IfxEth_DescriptorMode_ring) && (eth->pTxDescr->TDES0.A.TER != 1))
843 {
844 eth->pTxDescr = &eth->pTxDescr[1];
845 }
846 else
847 {
848 eth->pTxDescr = IfxEth_getBaseTxDescriptor(eth);
849 }
850 }
851
852
853 void IfxEth_startReceiver(IfxEth *eth)
854 {
855 (void)eth;
856
857 // enable receiver and RX DMA
858 ETH_OPERATION_MODE.B.SR = 1;
859 ETH_MAC_CONFIGURATION.B.RE = 1;
860 ETH_RECEIVE_POLL_DEMAND.U = 1;
861 }
862
863
864 void IfxEth_startTransmitter(IfxEth *eth)
865 {
866 (void)eth;
867
868 ETH_MAC_CONFIGURATION.B.TE = 1;
869 ETH_OPERATION_MODE.B.ST = 1;
870 ETH_TRANSMIT_POLL_DEMAND.U = 1;
871 }
872
873
874 void IfxEth_stopReceiver(IfxEth *eth)
875 {
876 (void)eth;
877
878 ETH_OPERATION_MODE.B.SR = 0;
879 ETH_MAC_CONFIGURATION.B.RE = 0;
880 ETH_RECEIVE_POLL_DEMAND.U = 0;
881 }
882
883
884 void IfxEth_stopTransmitter(IfxEth *eth)
885 {
886 (void)eth;
887
888 ETH_TRANSMIT_POLL_DEMAND.U = 0;
889 ETH_OPERATION_MODE.B.ST = 0;
890 ETH_MAC_CONFIGURATION.B.TE = 0;
891 }
892
893
894 void IfxEth_wakeupReceiver(IfxEth *eth)
895 {
896 eth->status.U = ETH_STATUS.U;
897
898 // check if receiver suspended
899 if (eth->status.U & (4U << IFX_ETH_STATUS_RS_OFF))
900 {
901 if (eth->status.B.RU)
902 {
903 ETH_STATUS.U = (IFX_ETH_STATUS_RU_MSK << IFX_ETH_STATUS_RU_OFF);
904 }
905
906 IfxEth_startReceiver(eth);
907 }
908 }
909
910
911 void IfxEth_wakeupTransmitter(IfxEth *eth)
912 {
913 eth->status.U = ETH_STATUS.U;
914
915 // check if suspended
916 if (eth->status.U & 0x00600000)
917 {
918 if (eth->status.B.TU)
919 {
920 // clear transmit unavailable and underflow flags
921 ETH_STATUS.U = (IFX_ETH_STATUS_TU_MSK << IFX_ETH_STATUS_TU_OFF) |
922 (IFX_ETH_STATUS_UNF_MSK << IFX_ETH_STATUS_UNF_OFF);
923 }
924
925 IfxEth_startTransmitter(eth);
926 }
927 }
928
929
930 void IfxEth_writeHeader(IfxEth *eth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 packetSize)
931 {
932 (void)eth;
933 uint32 i;
934
935 /* Destination Address */
936 for (i = 0; i < 6; i++)
937 {
938 *txBuffer++ = *destinationAddress++;
939 }
940
941 /* Source Address */
942 for (i = 0; i < 6; i++)
943 {
944 *txBuffer++ = *sourceAddress++;
945 }
946
947 /* packet size */
948 *txBuffer++ = (uint8)(packetSize / 256);
949 *txBuffer = (uint8)(packetSize % 256);
950 }
IfxEth_Txd_Out
TXD pin mapping structure.
Definition: IfxEth_PinMap.h:137
IfxEth_RingModeTxBuffersConfig::txBufferUsed
IfxEth_RingModeBufferUsed txBufferUsed
Transmit Buffer(s) used in ringmode.
Definition: IfxEth.h:335
IfxEth_init
void IfxEth_init(IfxEth *eth, const IfxEth_Config *config)
Initialises the driver.
Definition: IfxEth.c:125
IfxEth_RxDescr1::A
IfxEth_AltRxDescr1_Bits A
Structure for RX descriptor DWORD 1 Bit field access.
Definition: IfxEth.h:268
IfxEth_RxDescr_release
IFX_INLINE void IfxEth_RxDescr_release(IfxEth_RxDescr *descr)
release RX descriptor
Definition: IfxEth.h:1230
IfxEth_Rxclk_In
RXCLK pin mapping structure.
Definition: IfxEth_PinMap.h:88
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxEth_RingModeBufferUsed_bothBuffers
BOth Buffers used.
Definition: IfxEth.h:146
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxEth_MiiPins::txd3
IfxEth_Txd_Out * txd3
Pointer to TXD3 output pin config.
Definition: IfxEth.h:385
IfxEth_RingModeTxBuffersConfig::txBuffer1Size
uint16 txBuffer1Size
Size of Tx Buffer 1.
Definition: IfxEth.h:338
IfxEth_TxDescr::TDES2
IfxEth_TxDescr2 TDES2
TX descriptor DWORD 2.
Definition: IfxEth.h:358
IfxEth_RingModeTxBuffersConfig::txBuffer1StartAddress
uint32 txBuffer1StartAddress
Start address of Tx Buffer 1.
Definition: IfxEth.h:336
IfxEth_MiiPins::rxClk
IfxEth_Rxclk_In * rxClk
Pointer to RXCLK input pin config.
Definition: IfxEth.h:373
IfxEth_Txer_Out
TXER pin mapping structure.
Definition: IfxEth_PinMap.h:153
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:133
IfxEth_Config
ETH configuration structure.
Definition: IfxEth.h:435
IFXETH_RTX_BUFFER_SIZE
#define IFXETH_RTX_BUFFER_SIZE
Size of one ethernet frame buffer.
Definition: IfxEth.h:79
IfxEth_RingModeTxBuffersConfig
Configuration structure for Ring Mode Transmit buffers.
Definition: IfxEth.h:333
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxEth_DescriptorMode_ring
ring mode descriptors
Definition: IfxEth.h:115
IfxEth::txDescr
IfxEth_TxDescrList * txDescr
pointer to TX descriptor RAM
Definition: IfxEth.h:471
IfxEth_RingModeRxBuffersConfig::rxBufferUsed
IfxEth_RingModeBufferUsed rxBufferUsed
Receive Buffer(s) used in ringmode.
Definition: IfxEth.h:324
IfxEth_TxDescr1::A
IfxEth_AltTxDescr1_Bits A
Structure for RX descriptor DWORD 1 Bit field access.
Definition: IfxEth.h:298
IfxEth_MiiPins::rxd2
IfxEth_Rxd_In * rxd2
Pointer to RXD2 input pin config.
Definition: IfxEth.h:378
IfxEth_getReceiveBuffer
void * IfxEth_getReceiveBuffer(IfxEth *eth)
Gets receive buffer note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffe...
Definition: IfxEth.c:92
IfxEth_Mdio_InOut::outSelect
IfxPort_OutputIdx outSelect
Port control code.
Definition: IfxEth_PinMap.h:133
IfxEth_MiiPins::col
IfxEth_Col_In * col
pointer to COL input pin config
Definition: IfxEth.h:371
IfxEth_DescriptorMode_chain
chain mode descriptors
Definition: IfxEth.h:114
IfxEth::pRxDescr
IfxEth_RxDescr * pRxDescr
Definition: IfxEth.h:472
IfxEth_getActualRxDescriptor
IFX_INLINE IfxEth_RxDescr * IfxEth_getActualRxDescriptor(IfxEth *eth)
Get pointer to actual RX descriptor.
Definition: IfxEth.h:1382
IfxEth_RxDescr::RDES1
IfxEth_RxDescr1 RDES1
RX descriptor DWORD 1.
Definition: IfxEth.h:347
IfxEth_isSoftwareResetDone
IFX_INLINE boolean IfxEth_isSoftwareResetDone(IfxEth *eth)
Returns the status of Software Reset.
Definition: IfxEth.h:1532
IfxEth_Txen_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxEth_PinMap.h:149
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEth_RingModeRxBuffersConfig
Configuration structure for Ring Mode Receive Buffers.
Definition: IfxEth.h:322
IfxEth_MiiPins::mdc
IfxEth_Mdc_Out * mdc
Pointer to MDC pin config.
Definition: IfxEth.h:386
IfxEth_resetModule
void IfxEth_resetModule(void)
resets Ethernet kernel
Definition: IfxEth.c:527
IfxEth_Rxer_In
RXER pin mapping structure.
Definition: IfxEth_PinMap.h:161
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxEth::ethSfr
Ifx_ETH * ethSfr
Pointer to register base.
Definition: IfxEth.h:474
IfxEth_AltTxDescr0_Bits::TCH
uint32 TCH
Second Address Chained.
Definition: IfxEth.h:229
IfxEth_Mdio_InOut::inSelect
Ifx_RxSel inSelect
Input multiplexer value.
Definition: IfxEth_PinMap.h:132
IfxEth_PhyInterfaceMode_rmii
RMII mode.
Definition: IfxEth.h:123
IfxEth_Mdio_InOut
MDIO pin mapping structure.
Definition: IfxEth_PinMap.h:128
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxEth_MiiPins::txd2
IfxEth_Txd_Out * txd2
Pointer to TXD2 output pin config.
Definition: IfxEth.h:384
IfxEth_TxDescr::TDES0
IfxEth_TxDescr0 TDES0
TX descriptor DWORD 0.
Definition: IfxEth.h:356
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxEth_rxDescr
IfxEth_RxDescrList IfxEth_rxDescr
Definition: IfxEth.c:54
IfxEth_RxDescr::RDES3
IfxEth_RxDescr3 RDES3
RX descriptor DWORD 3.
Definition: IfxEth.h:349
IfxEth::txCount
uint32 txCount
Number of frames transmitted.
Definition: IfxEth.h:462
IfxEth_writeHeader
void IfxEth_writeHeader(IfxEth *eth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 packetSize)
writes the header format into buffrer
Definition: IfxEth.c:930
IfxEth_MiiPins::rxd0
IfxEth_Rxd_In * rxd0
Pointer to RXD0 input pin config.
Definition: IfxEth.h:376
IfxEth_setupRmiiInputPins
void IfxEth_setupRmiiInputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
Set up input pins.
Definition: IfxEth.c:753
IfxEth_Config::isrPriority
Ifx_Priority isrPriority
Interrupt service priority.
Definition: IfxEth.h:443
IfxEth_initReceiveDescriptorsRingMode
void IfxEth_initReceiveDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeRxBuffersConfig *config)
Initialises the receive descriptors.
Definition: IfxEth.c:347
IfxEth_Txen_Out
TXEN pin mapping structure.
Definition: IfxEth_PinMap.h:145
IfxEth_applySoftwareReset
IFX_INLINE void IfxEth_applySoftwareReset(IfxEth *eth)
Applies the Software Reset.
Definition: IfxEth.h:1278
IfxEth_txBuffer
uint8 IfxEth_txBuffer[IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]
Definition: IfxEth.c:56
IfxEth_txDescr
IfxEth_TxDescrList IfxEth_txDescr
Definition: IfxEth.c:58
IfxEth_setupMiiOutputPins
void IfxEth_setupMiiOutputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins)
setup MII mode output pins
Definition: IfxEth.c:714
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEth_TxDescr_setBuffer
IFX_INLINE void IfxEth_TxDescr_setBuffer(IfxEth_TxDescr *descr, void *buffer)
Set buffer of a TX descriptor.
Definition: IfxEth.h:1260
IfxEth_RingModeBuffersConfig::rxConfig
IfxEth_RingModeRxBuffersConfig rxConfig
Receive buffers ring mode config.
Definition: IfxEth.h:395
IfxEth_shuffleTxDescriptor
void IfxEth_shuffleTxDescriptor(IfxEth *eth)
Shuffle to next TX descriptor.
Definition: IfxEth.c:836
IfxEth_startReceiver
void IfxEth_startReceiver(IfxEth *eth)
Start the receiver functions.
Definition: IfxEth.c:853
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
IfxEth_MiiPins::txEr
IfxEth_Txer_Out * txEr
Pointer to TXER output pin config.
Definition: IfxEth.h:381
IfxEth_RingModeRxBuffersConfig::rxBuffer2StartAddress
uint32 rxBuffer2StartAddress
Start address of Rx Buffer 2.
Definition: IfxEth.h:326
IfxEth_MiiPins::txd1
IfxEth_Txd_Out * txd1
Pointer to TXD1 output pin config.
Definition: IfxEth.h:383
IfxEth_MiiPins::txEn
IfxEth_Txen_Out * txEn
Pointer to TXEN output pin config.
Definition: IfxEth.h:380
IfxEth
ETH driver structure.
Definition: IfxEth.h:458
IfxEth_MiiPins::crs
IfxEth_Crs_In * crs
pointer to CRS input pin config
Definition: IfxEth.h:370
IfxEth_setPhyInterfaceMode
IFX_INLINE void IfxEth_setPhyInterfaceMode(IfxEth *eth, IfxEth_PhyInterfaceMode mode)
Sets the Phy Interface mode.
Definition: IfxEth.h:1589
IfxEth_setTransmitDescriptorAddress
IFX_INLINE void IfxEth_setTransmitDescriptorAddress(Ifx_ETH *eth, void *address)
Sets transmit descriptor address.
Definition: IfxEth.h:1651
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxEth_getActualTxDescriptor
IFX_INLINE IfxEth_TxDescr * IfxEth_getActualTxDescriptor(IfxEth *eth)
Get pointer to actual TX descriptor.
Definition: IfxEth.h:1395
IfxEth_initTransmitDescriptors
void IfxEth_initTransmitDescriptors(IfxEth *eth)
Initialises transmit descriptors.
Definition: IfxEth.c:411
IfxEth_readMacAddress
void IfxEth_readMacAddress(IfxEth *eth, uint8 *macAddress)
Reads the MAC address from module register.
Definition: IfxEth.c:519
IfxEth_setReceiveBuffer2RingMode
IFX_INLINE void IfxEth_setReceiveBuffer2RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
Sets the receive buffer2 of the receive descriptor along with its size.
Definition: IfxEth.h:1603
IfxEth_Col_In
COL pin mapping structure.
Definition: IfxEth_PinMap.h:112
IfxEth_RxDescr
Normal RX descriptor.
Definition: IfxEth.h:344
IfxEth_TxDescr
Normal TX descriptor.
Definition: IfxEth.h:354
IfxEth::rxDescr
IfxEth_RxDescrList * rxDescr
pointer to RX descriptor RAM
Definition: IfxEth.h:470
IfxEth_setupRmiiOutputPins
void IfxEth_setupRmiiOutputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
set output pin of port
Definition: IfxEth.c:785
IfxEth_ChecksumMode_bypass
Definition: IfxEth.h:106
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:144
IfxEth_RingModeRxBuffersConfig::rxBuffer1Size
uint16 rxBuffer1Size
Size of Rx Buffer 1.
Definition: IfxEth.h:327
IFXETH_MAX_TX_BUFFERS
#define IFXETH_MAX_TX_BUFFERS
Tx buffers (ring mode)
Definition: IfxEth.h:91
IfxEth_AltTxDescr0_Bits::CIC
uint32 CIC
Checksum Insertion Control.
Definition: IfxEth.h:231
IFXETH_MAX_TIMEOUT_VALUE
#define IFXETH_MAX_TIMEOUT_VALUE
Definition: IfxEth_cfg.h:60
IfxEth_TxDescr_getNext
IFX_INLINE IfxEth_TxDescr * IfxEth_TxDescr_getNext(IfxEth_TxDescr *descr)
Get pointer to next TX descriptor.
Definition: IfxEth.h:1242
IfxEth_getTransmitBuffer
void * IfxEth_getTransmitBuffer(IfxEth *eth)
Get a free transmit buffer.
Definition: IfxEth.c:110
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:83
IfxEth_setTransmitBuffer2RingMode
IFX_INLINE void IfxEth_setTransmitBuffer2RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
Sets the transmit buffer2 of the receive descriptor along with its size.
Definition: IfxEth.h:1644
IfxEth_ChecksumMode
IfxEth_ChecksumMode
Definition: IfxEth.h:104
IfxEth_MiiPins
Port pins for MII mode configuration.
Definition: IfxEth.h:368
IfxEth_AltTxDescr0_Bits::IC
uint32 IC
Interrupt on Completion.
Definition: IfxEth.h:238
IfxEth::descriptorMode
IfxEth_DescriptorMode descriptorMode
Descriptor mode (chain or ring)
Definition: IfxEth.h:475
IfxEth_AltTxDescr0_Bits::LS
uint32 LS
Last Segment.
Definition: IfxEth.h:237
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxEth.h
ETH basic functionality.
IfxEth_RxDescr::RDES0
IfxEth_RxDescr0 RDES0
RX descriptor DWORD 0.
Definition: IfxEth.h:346
IfxEth_rxBuffer
uint8 IfxEth_rxBuffer[IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]
Definition: IfxEth.c:52
IfxEth_MiiPins::txClk
IfxEth_Txclk_In * txClk
Pointer to TXCLK input pin config.
Definition: IfxEth.h:372
IfxEth_RingModeTxBuffersConfig::txBuffer2Size
uint16 txBuffer2Size
Size of Tx Buffer 2.
Definition: IfxEth.h:339
IfxEth_MiiPins::rxEr
IfxEth_Rxer_In * rxEr
Pointer to RXER input pin config.
Definition: IfxEth.h:375
IfxEth::error
uint32 error
Indicate an error has occurred during execution.
Definition: IfxEth.h:463
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxEth_RxDescr_setBuffer
IFX_INLINE void IfxEth_RxDescr_setBuffer(IfxEth_RxDescr *descr, void *buffer)
Set buffer of an RX descriptor.
Definition: IfxEth.h:1236
IfxEth_Crs_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxEth_PinMap.h:59
IfxEth_Crs_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxEth_PinMap.h:60
IfxEth_sendTransmitBuffersRingMode
void IfxEth_sendTransmitBuffersRingMode(IfxEth *eth, uint16 buffer1Length, uint16 buffer2Length)
Request to send the transmit buffer.
Definition: IfxEth.c:560
IfxEth_Rxd_In
RXD pin mapping structure.
Definition: IfxEth_PinMap.h:104
IfxEth_AltTxDescr0_Bits::TER
uint32 TER
Transmit End of Ring.
Definition: IfxEth.h:230
IfxEth_RxDescr_getNext
IFX_INLINE IfxEth_RxDescr * IfxEth_RxDescr_getNext(IfxEth_RxDescr *descr)
Get pointer to next RX descriptor.
Definition: IfxEth.h:1224
IFXETH_MAX_RX_BUFFERS
#define IFXETH_MAX_RX_BUFFERS
Rx buffers (ring mode)
Definition: IfxEth.h:85
IFXETH_DESCR_SIZE
#define IFXETH_DESCR_SIZE
4 DWORDS (16 bytes)
Definition: IfxEth.h:96
IfxEth_getBaseTxDescriptor
IFX_INLINE IfxEth_TxDescr * IfxEth_getBaseTxDescriptor(IfxEth *eth)
Get pointer to base TX descriptor.
Definition: IfxEth.h:1407
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxEth_TxDescr::TDES1
IfxEth_TxDescr1 TDES1
TX descriptor DWORD 1.
Definition: IfxEth.h:357
IfxEth_RingModeBuffersConfig::txConfig
IfxEth_RingModeTxBuffersConfig txConfig
Transmit buffers ring mode config.
Definition: IfxEth.h:394
IfxEth_setupChecksumEngine
void IfxEth_setupChecksumEngine(IfxEth *eth, IfxEth_ChecksumMode mode)
Set up checksum Engine.
Definition: IfxEth.c:607
IfxEth_RxDescr2::U
uint32 U
unsigned long access
Definition: IfxEth.h:276
IfxEth_AltRxDescr1_Bits::RCH
uint32 RCH
Second Address Chained.
Definition: IfxEth.h:202
IfxEth_setupMiiInputPins
void IfxEth_setupMiiInputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins)
Set up MII mode input pins.
Definition: IfxEth.c:628
IfxEth_MiiPins::txd0
IfxEth_Txd_Out * txd0
Pointer to TXD0 output pin config.
Definition: IfxEth.h:382
IfxEth_Config::miiPins
IFX_CONST IfxEth_MiiPins * miiPins
Pointer to port pins configuration of MII mode.
Definition: IfxEth.h:442
IfxEth::pTxDescr
IfxEth_TxDescr * pTxDescr
Definition: IfxEth.h:473
IfxEth_RxDescrList
Definition: IfxEth.h:417
IfxEth_RingModeRxBuffersConfig::rxBuffer1StartAddress
uint32 rxBuffer1StartAddress
Start address of Rx Buffer 1.
Definition: IfxEth.h:325
IfxEth_Config::macAddress
uint8 macAddress[6]
MAC address for the ethernet, should be unique in the network.
Definition: IfxEth.h:437
IfxEth_TxDescr::TDES3
IfxEth_TxDescr3 TDES3
TX descriptor DWORD 3.
Definition: IfxEth.h:359
IfxEth_AltRxDescr1_Bits::RBS1
uint32 RBS1
Receive Buffer 1 Size.
Definition: IfxEth.h:200
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxEth_RxDescr0::A
IfxEth_AltRxDescr0_Bits A
Structure for RX descriptor DWORD 0 Bit field access.
Definition: IfxEth.h:260
IfxEth_setReceiveDescriptorAddress
IFX_INLINE void IfxEth_setReceiveDescriptorAddress(Ifx_ETH *eth, void *address)
Sets receive descriptor address.
Definition: IfxEth.h:1610
IfxEth_setAndSendTransmitBuffer
void IfxEth_setAndSendTransmitBuffer(IfxEth *eth, void *buffer, uint16 len)
Definition: IfxEth.c:583
IfxEth_setMacAddress
void IfxEth_setMacAddress(IfxEth *eth, const uint8 *macAddress)
Sets the MAC address.
Definition: IfxEth.c:590
IfxEth_disableModule
void IfxEth_disableModule(void)
Disable ETH Module.
Definition: IfxEth.c:64
IfxEth_startTransmitter
void IfxEth_startTransmitter(IfxEth *eth)
Start the transmitter functions.
Definition: IfxEth.c:864
IfxEth::status
Ifx_ETH_STATUS status
Intermediate variable to use register content in control structure.
Definition: IfxEth.h:460
IfxEth_AltTxDescr0_Bits::OWN
uint32 OWN
Own Bit, 1 = own by DMA.
Definition: IfxEth.h:239
IfxEth_Mdc_Out
MDC pin mapping structure.
Definition: IfxEth_PinMap.h:120
IfxEth_wakeupReceiver
void IfxEth_wakeupReceiver(IfxEth *eth)
Wakeup the receiver functions.
Definition: IfxEth.c:894
IfxEth_MiiPins::mdio
IfxEth_Mdio_InOut * mdio
Pointer to MDIO pin config.
Definition: IfxEth.h:387
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxEth_AltRxDescr1_Bits::RER
uint32 RER
Receive End of Ring.
Definition: IfxEth.h:203
IfxEth_initConfig
void IfxEth_initConfig(IfxEth_Config *config, Ifx_ETH *ethSfr)
Initialises the configuration Structure.
Definition: IfxEth.c:263
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxEth_AltTxDescr1_Bits::TBS1
uint32 TBS1
Transmit Buffer 1 Size.
Definition: IfxEth.h:246
IfxEth_RmiiPins::refClk
IfxEth_Refclk_In * refClk
Pointer to REFCLK input pin config.
Definition: IfxEth.h:403
IfxEth_Crsdv_In
CRSDV pin mapping structure.
Definition: IfxEth_PinMap.h:64
IfxEth_sendTransmitBuffer
void IfxEth_sendTransmitBuffer(IfxEth *eth, uint16 len)
Request to send the transmit buffer.
Definition: IfxEth.c:546
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxEth_Refclk_In
REFCLK pin mapping structure.
Definition: IfxEth_PinMap.h:80
IfxEth_AltTxDescr1_Bits::TBS2
uint32 TBS2
Transmit Buffer 2 Size.
Definition: IfxEth.h:248
IfxEth_MiiPins::rxd1
IfxEth_Rxd_In * rxd1
Pointer to RXD1 input pin config.
Definition: IfxEth.h:377
IfxEth_Rxdv_In
RXDV pin mapping structure.
Definition: IfxEth_PinMap.h:72
IfxEth_enableModule
void IfxEth_enableModule(void)
Enable ETH Module.
Definition: IfxEth.c:73
IfxEth_Config::ringModeBuffersConfig
IfxEth_RingModeBuffersConfig ringModeBuffersConfig
Ring mode buffers condiguration.
Definition: IfxEth.h:449
IfxEth_RingModeBufferUsed_buffer1
Buffer 1 used.
Definition: IfxEth.h:144
IfxEth_MiiPins::rxDv
IfxEth_Rxdv_In * rxDv
Pointer to RXDV input pin config.
Definition: IfxEth.h:374
IfxEth_MiiPins::rxd3
IfxEth_Rxd_In * rxd3
Pointer to RXD3 input pin config.
Definition: IfxEth.h:379
IfxEth_Config::phyInit
uint32(* phyInit)(void)
Pointer to the transceiver init function.
Definition: IfxEth.h:438
IfxEth_stopReceiver
void IfxEth_stopReceiver(IfxEth *eth)
Stops the receiver functions.
Definition: IfxEth.c:874
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxEth_getBaseRxDescriptor
IFX_INLINE IfxEth_RxDescr * IfxEth_getBaseRxDescriptor(IfxEth *eth)
Get pointer to base RX descriptor.
Definition: IfxEth.h:1401
IfxEth_TxDescr0::A
IfxEth_AltTxDescr0_Bits A
Structure for TX descriptor DWORD 0 Bit field access.
Definition: IfxEth.h:290
IfxEth_Txclk_In
TXCLK pin mapping structure.
Definition: IfxEth_PinMap.h:96
IfxEth_setTransmitBuffer1RingMode
IFX_INLINE void IfxEth_setTransmitBuffer1RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
Sets the transmit buffer1 of the receive descriptor along with its size.
Definition: IfxEth.h:1637
IfxEth_Config::rmiiPins
IFX_CONST IfxEth_RmiiPins * rmiiPins
Pointer to port pins configuration of RMII mode.
Definition: IfxEth.h:441
IfxEth_setReceiveBuffer1RingMode
IFX_INLINE void IfxEth_setReceiveBuffer1RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
Sets the receive buffer1 of the receive descriptor along with its size.
Definition: IfxEth.h:1596
IfxEth::rxCount
uint32 rxCount
Number of frames received.
Definition: IfxEth.h:461
IfxEth_freeReceiveBuffer
void IfxEth_freeReceiveBuffer(IfxEth *eth)
Free the receive buffer, enabling it for the further reception.
Definition: IfxEth.c:84
IfxEth_wakeupTransmitter
void IfxEth_wakeupTransmitter(IfxEth *eth)
Wakeup the transmitter functions.
Definition: IfxEth.c:911
IfxEth_RmiiPins
Port pins for RMII mode configuration.
Definition: IfxEth.h:400
IfxEth_RingModeRxBuffersConfig::rxBuffer2Size
uint16 rxBuffer2Size
Size of Rx Buffer 2.
Definition: IfxEth.h:328
IfxEth_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider.
Definition: IfxEth.h:444
IfxEth_AltTxDescr0_Bits::FS
uint32 FS
First Segment.
Definition: IfxEth.h:236
IfxEth::config
IfxEth_Config config
Copy of the configuration passed through IfxEth_init()
Definition: IfxEth.h:469
IfxEth_initTransmitDescriptorsRingMode
void IfxEth_initTransmitDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeTxBuffersConfig *config)
Initialises transmit descriptors.
Definition: IfxEth.c:455
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEth_isRxDataAvailable
IFX_INLINE boolean IfxEth_isRxDataAvailable(IfxEth *eth)
Checks whether one or more RX data is available.
Definition: IfxEth.h:1517
IfxEth_RingModeTxBuffersConfig::txBuffer2StartAddress
uint32 txBuffer2StartAddress
Start address of Tx Buffer 2.
Definition: IfxEth.h:337
IfxEth_Crs_In
CRS pin mapping structure.
Definition: IfxEth_PinMap.h:56
IfxEth_initReceiveDescriptors
void IfxEth_initReceiveDescriptors(IfxEth *eth)
Initialises the receive descriptors.
Definition: IfxEth.c:301
IfxEth_RingModeBufferUsed_buffer2
Buffer 2 used.
Definition: IfxEth.h:145
IfxEth_stopTransmitter
void IfxEth_stopTransmitter(IfxEth *eth)
Stop the transmitter functions.
Definition: IfxEth.c:884
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxEth_TxDescrList
Definition: IfxEth.h:423
IfxEth_Config::phyInterfaceMode
IfxEth_PhyInterfaceMode phyInterfaceMode
Phy Interface mode.
Definition: IfxEth.h:440
IfxEth_RmiiPins::crsDiv
IfxEth_Crsdv_In * crsDiv
pointer to CRSDIV input pin config
Definition: IfxEth.h:402
IfxEth_RxDescr::RDES2
IfxEth_RxDescr2 RDES2
RX descriptor DWORD 2.
Definition: IfxEth.h:348
IfxEth_shuffleRxDescriptor
void IfxEth_shuffleRxDescriptor(IfxEth *eth)
Shuffle to next RX descriptor.
Definition: IfxEth.c:819


iLLD_TC26B: IfxEth.h Source File

  • Eth
  • Std
IfxEth.h
Go to the documentation of this file.
1 /**
2 * \file IfxEth.h
3 * \brief ETH basic functionality
4 * \ingroup IfxLld_Eth
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Eth_Std_DataStructures Data Structures
42 * \ingroup IfxLld_Eth_Std
43 * \defgroup IfxLld_Eth_Std_Unions Unions
44 * \ingroup IfxLld_Eth_Std
45 * \defgroup IfxLld_Eth_Std_Configuration Configuration Functions
46 * \ingroup IfxLld_Eth_Std
47 * \defgroup IfxLld_Eth_Std_Utility Utility Functions
48 * \ingroup IfxLld_Eth_Std
49 * \defgroup IfxLld_Eth_Std_Initialisation Initialisation Functions
50 * \ingroup IfxLld_Eth_Std
51 * \defgroup IfxLld_Eth_Std_Enum Enumerations
52 * \ingroup IfxLld_Eth_Std
53 */
54
55 #ifndef IFXET_H
56 #define IFXET_H 1
57
58 /******************************************************************************/
59 /*----------------------------------Includes----------------------------------*/
60 /******************************************************************************/
61
62 #include "_Impl/IfxEth_cfg.h"
63 #include "Cpu/Std/Ifx_Types.h"
64 #include "IfxEth_reg.h"
65 #include "IfxEth_bf.h"
66 #include "_PinMap/IfxEth_PinMap.h"
67 #include "Src/Std/IfxSrc.h"
68 #include "Scu/Std/IfxScuWdt.h"
69 #include "_Utilities/Ifx_Assert.h"
70 #include "Cpu/Std/IfxCpu.h"
71
72 /******************************************************************************/
73 /*-----------------------------------Macros-----------------------------------*/
74 /******************************************************************************/
75
76 /** \brief Size of one ethernet frame buffer
77 */
78 #ifndef IFXETH_RTX_BUFFER_SIZE
79 #define IFXETH_RTX_BUFFER_SIZE 1536
80 #endif
81
82 /** \brief Rx buffers (ring mode)
83 */
84 #ifndef IFXETH_MAX_RX_BUFFERS
85 #define IFXETH_MAX_RX_BUFFERS 8
86 #endif
87
88 /** \brief Tx buffers (ring mode)
89 */
90 #ifndef IFXETH_MAX_TX_BUFFERS
91 #define IFXETH_MAX_TX_BUFFERS 16
92 #endif
93
94 /** \brief 4 DWORDS (16 bytes)
95 */
96 #define IFXETH_DESCR_SIZE 4
97
98 /******************************************************************************/
99 /*--------------------------------Enumerations--------------------------------*/
100 /******************************************************************************/
101
102 /** \addtogroup IfxLld_Eth_Std_Enum
103 * \{ */
104 typedef enum
105 {
106 IfxEth_ChecksumMode_bypass = 0,
107 IfxEth_ChecksumMode_ipv4 = 1,
108 IfxEth_ChecksumMode_tcpUdpIcmpSegment = 2,
109 IfxEth_ChecksumMode_tcpUdpIcmpFull = 3
110 } IfxEth_ChecksumMode;
111
112 typedef enum
113 {
114 IfxEth_DescriptorMode_chain, /**< \brief chain mode descriptors */
115 IfxEth_DescriptorMode_ring /**< \brief ring mode descriptors */
116 } IfxEth_DescriptorMode;
117
118 /** \brief External Phy Interface RMII Mode
119 */
120 typedef enum
121 {
122 IfxEth_PhyInterfaceMode_mii, /**< \brief MII mode */
123 IfxEth_PhyInterfaceMode_rmii /**< \brief RMII mode */
124 } IfxEth_PhyInterfaceMode;
125
126 /** \brief indicates the Receive DMA FSM state
127 */
128 typedef enum
129 {
130 IfxEth_ReceiveProcessState_reset, /**< \brief Stopped: Reset or Stop Receive Command issued */
131 IfxEth_ReceiveProcessState_fetching, /**< \brief Running: Fetching Receive Transfer Descriptor */
132 IfxEth_ReceiveProcessState_none, /**< \brief Reserved for future use */
133 IfxEth_ReceiveProcessState_waiting, /**< \brief Running: Waiting for receive packet */
134 IfxEth_ReceiveProcessState_suspended, /**< \brief Suspended: Receive Descriptor Unavailable */
135 IfxEth_ReceiveProcessState_closing, /**< \brief Running: Closing Receive Descriptor */
136 IfxEth_ReceiveProcessState_timestampWrite, /**< \brief TIME_STAMP write state */
137 IfxEth_ReceiveProcessState_transfering /**< \brief Running: Transferring the receive packet data from receive buffer to host memory */
138 } IfxEth_ReceiveProcessState;
139
140 /** \brief Buffer(s) used in ring mode
141 */
142 typedef enum
143 {
144 IfxEth_RingModeBufferUsed_buffer1, /**< \brief Buffer 1 used */
145 IfxEth_RingModeBufferUsed_buffer2, /**< \brief Buffer 2 used */
146 IfxEth_RingModeBufferUsed_bothBuffers /**< \brief BOth Buffers used */
147 } IfxEth_RingModeBufferUsed;
148
149 /** \brief indicates the Transmit DMA FSM state
150 */
151 typedef enum
152 {
153 IfxEth_TransmitProcessState_reset, /**< \brief Stopped; Reset or Stop Transmit Command issued */
154 IfxEth_TransmitProcessState_fetching, /**< \brief Running; Fetching Transmit Transfer Descriptor */
155 IfxEth_TransmitProcessState_waiting, /**< \brief Running; Waiting for status */
156 IfxEth_TransmitProcessState_reading, /**< \brief Running; Reading Data from host memory buffer and queuing it to transmit buffer (Tx FIFO) */
157 IfxEth_TransmitProcessState_timestampWrite, /**< \brief TIME_STAMP write state */
158 IfxEth_TransmitProcessState_none, /**< \brief Reserved for future use */
159 IfxEth_TransmitProcessState_suspended, /**< \brief Suspended; Transmit Descriptor Unavailable or Transmit Buffer Underflow */
160 IfxEth_TransmitProcessState_closing /**< \brief Running; Closing Transmit Descriptor */
161 } IfxEth_TransmitProcessState;
162
163 /** \} */
164
165 /******************************************************************************/
166 /*-----------------------------Data Structures--------------------------------*/
167 /******************************************************************************/
168
169 /** \addtogroup IfxLld_Eth_Std_DataStructures
170 * \{ */
171 /** \brief Structure for Alternate/Enhanced RX descriptor DWORD 0 Bit field access
172 */
173 typedef struct
174 {
175 uint32 ext : 1; /**< \brief Extended Status Available/Rx MAC Address */
176 uint32 CE : 1; /**< \brief CRC Error */
177 uint32 DBE : 1; /**< \brief Dribble Bit Error */
178 uint32 RE : 1; /**< \brief Receive Error */
179 uint32 RWT : 1; /**< \brief Receive Watchdog Timeout */
180 uint32 FT : 1; /**< \brief Frame Type */
181 uint32 LC : 1; /**< \brief Late Collision */
182 uint32 IPC : 1; /**< \brief IPC Checksum Error/Giant Frame */
183 uint32 LS : 1; /**< \brief Last Descriptor */
184 uint32 FS : 1; /**< \brief First Descriptor */
185 uint32 VLAN : 1; /**< \brief VLAN Tag */
186 uint32 OE : 1; /**< \brief Overflow Error */
187 uint32 LE : 1; /**< \brief Length Error */
188 uint32 SAF : 1; /**< \brief Source Address Filter Fail */
189 uint32 DE : 1; /**< \brief Descriptor Error */
190 uint32 ES : 1; /**< \brief Error Summary, ES = PCE | CE | RE | RWT | LC | IPC | OE | DE */
191 uint32 FL : 14; /**< \brief Frame Length */
192 uint32 AFM : 1; /**< \brief Destination Address Filter Fail */
193 uint32 OWN : 1; /**< \brief Own Bit, 1 = own by DMA */
194 } IfxEth_AltRxDescr0_Bits;
195
196 /** \brief Structure for Alternate/Enhanced RX descriptor DWORD 1 Bit field access
197 */
198 typedef struct
199 {
200 uint32 RBS1 : 13; /**< \brief Receive Buffer 1 Size */
201 uint32 resv1 : 1; /**< \brief reserved */
202 uint32 RCH : 1; /**< \brief Second Address Chained */
203 uint32 RER : 1; /**< \brief Receive End of Ring */
204 uint32 RBS2 : 13; /**< \brief Receive Buffer 2 Size */
205 uint32 resv : 2; /**< \brief reserved) */
206 uint32 DIC : 1; /**< \brief Disable Interrupt on Completion */
207 } IfxEth_AltRxDescr1_Bits;
208
209 /** \brief Structure for Alternate/Enhanced TX descriptor DWORD 0 Bit field access
210 */
211 typedef struct
212 {
213 uint32 DB : 1; /**< \brief Deferred bit */
214 uint32 UF : 1; /**< \brief Underflow error */
215 uint32 ED : 1; /**< \brief Excessive deferral */
216 uint32 CC : 4; /**< \brief Collision count */
217 uint32 VLAN : 1; /**< \brief VLAN TAG */
218 uint32 EC : 1; /**< \brief Excessive Collision */
219 uint32 LC : 1; /**< \brief Late Collision */
220 uint32 NC : 1; /**< \brief No Carrier */
221 uint32 LOC : 1; /**< \brief Loss of Carrier */
222 uint32 PCE : 1; /**< \brief Payload Checksum Error */
223 uint32 FF : 1; /**< \brief Frame Flushed */
224 uint32 JT : 1; /**< \brief Jabber Timeout */
225 uint32 ES : 1; /**< \brief Error Summary, ES = JT | FF | LOC | NC | LC | EC | ED | UF */
226 uint32 IHE : 1; /**< \brief IP Header Error */
227 uint32 TTSS : 1; /**< \brief Transmit Time Stamp Status */
228 uint32 resv : 2; /**< \brief (reserved) */
229 uint32 TCH : 1; /**< \brief Second Address Chained */
230 uint32 TER : 1; /**< \brief Transmit End of Ring */
231 uint32 CIC : 2; /**< \brief Checksum Insertion Control */
232 uint32 resv1 : 1; /**< \brief (Reserved) */
233 uint32 TTSE : 1; /**< \brief Transmit Time Stamp Enable */
234 uint32 DP : 1; /**< \brief Disable Padding */
235 uint32 DC : 1; /**< \brief Disable CRC */
236 uint32 FS : 1; /**< \brief First Segment */
237 uint32 LS : 1; /**< \brief Last Segment */
238 uint32 IC : 1; /**< \brief Interrupt on Completion */
239 uint32 OWN : 1; /**< \brief Own Bit, 1 = own by DMA */
240 } IfxEth_AltTxDescr0_Bits;
241
242 /** \brief Structure for Alternate/Enhanced TX descriptor DWORD 1 Bit field access
243 */
244 typedef struct
245 {
246 uint32 TBS1 : 13; /**< \brief Transmit Buffer 1 Size */
247 uint32 resv1 : 3; /**< \brief (reserved) */
248 uint32 TBS2 : 13; /**< \brief Transmit Buffer 2 Size */
249 uint32 resv2 : 3; /**< \brief (reserved) */
250 } IfxEth_AltTxDescr1_Bits;
251
252 /** \} */
253
254 /** \addtogroup IfxLld_Eth_Std_Unions
255 * \{ */
256 /** \brief Union for RX descriptor DWORD 0
257 */
258 typedef union
259 {
260 IfxEth_AltRxDescr0_Bits A; /**< \brief Structure for RX descriptor DWORD 0 Bit field access */
261 uint32 U; /**< \brief Unsigned long access */
262 } IfxEth_RxDescr0;
263
264 /** \brief Union for RX descriptor DWORD 1
265 */
266 typedef union
267 {
268 IfxEth_AltRxDescr1_Bits A; /**< \brief Structure for RX descriptor DWORD 1 Bit field access */
269 uint32 U; /**< \brief unsigned long access */
270 } IfxEth_RxDescr1;
271
272 /** \brief Union for RX descriptor DWORD 2
273 */
274 typedef union
275 {
276 uint32 U; /**< \brief unsigned long access */
277 } IfxEth_RxDescr2;
278
279 /** \brief Union for RX descriptor DWORD 3
280 */
281 typedef union
282 {
283 uint32 U; /**< \brief unsigned long access */
284 } IfxEth_RxDescr3;
285
286 /** \brief Union for TX descriptor DWORD 0
287 */
288 typedef union
289 {
290 IfxEth_AltTxDescr0_Bits A; /**< \brief Structure for TX descriptor DWORD 0 Bit field access */
291 uint32 U; /**< \brief Unsigned long access */
292 } IfxEth_TxDescr0;
293
294 /** \brief Union for TX descriptor DWORD 1
295 */
296 typedef union
297 {
298 IfxEth_AltTxDescr1_Bits A; /**< \brief Structure for RX descriptor DWORD 1 Bit field access */
299 uint32 U; /**< \brief unsigned long access */
300 } IfxEth_TxDescr1;
301
302 /** \brief Union for TX descriptor DWORD 2
303 */
304 typedef union
305 {
306 uint32 U; /**< \brief unsigned long access */
307 } IfxEth_TxDescr2;
308
309 /** \brief Union for TX descriptor DWORD 3
310 */
311 typedef union
312 {
313 uint32 U; /**< \brief unsigned long access */
314 } IfxEth_TxDescr3;
315
316 /** \} */
317
318 /** \addtogroup IfxLld_Eth_Std_DataStructures
319 * \{ */
320 /** \brief Configuration structure for Ring Mode Receive Buffers
321 */
322 typedef struct
323 {
324 IfxEth_RingModeBufferUsed rxBufferUsed; /**< \brief Receive Buffer(s) used in ringmode */
325 uint32 rxBuffer1StartAddress; /**< \brief Start address of Rx Buffer 1 */
326 uint32 rxBuffer2StartAddress; /**< \brief Start address of Rx Buffer 2 */
327 uint16 rxBuffer1Size; /**< \brief Size of Rx Buffer 1 */
328 uint16 rxBuffer2Size; /**< \brief Size of Rx Buffer 2 */
329 } IfxEth_RingModeRxBuffersConfig;
330
331 /** \brief Configuration structure for Ring Mode Transmit buffers
332 */
333 typedef struct
334 {
335 IfxEth_RingModeBufferUsed txBufferUsed; /**< \brief Transmit Buffer(s) used in ringmode */
336 uint32 txBuffer1StartAddress; /**< \brief Start address of Tx Buffer 1 */
337 uint32 txBuffer2StartAddress; /**< \brief Start address of Tx Buffer 2 */
338 uint16 txBuffer1Size; /**< \brief Size of Tx Buffer 1 */
339 uint16 txBuffer2Size; /**< \brief Size of Tx Buffer 2 */
340 } IfxEth_RingModeTxBuffersConfig;
341
342 /** \brief Normal RX descriptor
343 */
344 typedef struct
345 {
346 IfxEth_RxDescr0 RDES0; /**< \brief RX descriptor DWORD 0 */
347 IfxEth_RxDescr1 RDES1; /**< \brief RX descriptor DWORD 1 */
348 IfxEth_RxDescr2 RDES2; /**< \brief RX descriptor DWORD 2 */
349 IfxEth_RxDescr3 RDES3; /**< \brief RX descriptor DWORD 3 */
350 } IfxEth_RxDescr;
351
352 /** \brief Normal TX descriptor
353 */
354 typedef struct
355 {
356 IfxEth_TxDescr0 TDES0; /**< \brief TX descriptor DWORD 0 */
357 IfxEth_TxDescr1 TDES1; /**< \brief TX descriptor DWORD 1 */
358 IfxEth_TxDescr2 TDES2; /**< \brief TX descriptor DWORD 2 */
359 IfxEth_TxDescr3 TDES3; /**< \brief TX descriptor DWORD 3 */
360 } IfxEth_TxDescr;
361
362 /** \} */
363
364 /** \addtogroup IfxLld_Eth_Std_DataStructures
365 * \{ */
366 /** \brief Port pins for MII mode configuration
367 */
368 typedef struct
369 {
370 IfxEth_Crs_In *crs; /**< \brief pointer to CRS input pin config */
371 IfxEth_Col_In *col; /**< \brief pointer to COL input pin config */
372 IfxEth_Txclk_In *txClk; /**< \brief Pointer to TXCLK input pin config */
373 IfxEth_Rxclk_In *rxClk; /**< \brief Pointer to RXCLK input pin config */
374 IfxEth_Rxdv_In *rxDv; /**< \brief Pointer to RXDV input pin config */
375 IfxEth_Rxer_In *rxEr; /**< \brief Pointer to RXER input pin config */
376 IfxEth_Rxd_In *rxd0; /**< \brief Pointer to RXD0 input pin config */
377 IfxEth_Rxd_In *rxd1; /**< \brief Pointer to RXD1 input pin config */
378 IfxEth_Rxd_In *rxd2; /**< \brief Pointer to RXD2 input pin config */
379 IfxEth_Rxd_In *rxd3; /**< \brief Pointer to RXD3 input pin config */
380 IfxEth_Txen_Out *txEn; /**< \brief Pointer to TXEN output pin config */
381 IfxEth_Txer_Out *txEr; /**< \brief Pointer to TXER output pin config */
382 IfxEth_Txd_Out *txd0; /**< \brief Pointer to TXD0 output pin config */
383 IfxEth_Txd_Out *txd1; /**< \brief Pointer to TXD1 output pin config */
384 IfxEth_Txd_Out *txd2; /**< \brief Pointer to TXD2 output pin config */
385 IfxEth_Txd_Out *txd3; /**< \brief Pointer to TXD3 output pin config */
386 IfxEth_Mdc_Out *mdc; /**< \brief Pointer to MDC pin config */
387 IfxEth_Mdio_InOut *mdio; /**< \brief Pointer to MDIO pin config */
388 } IfxEth_MiiPins;
389
390 /** \brief Configuration structure for Ring Mode descriptors
391 */
392 typedef struct
393 {
394 IfxEth_RingModeTxBuffersConfig txConfig; /**< \brief Transmit buffers ring mode config */
395 IfxEth_RingModeRxBuffersConfig rxConfig; /**< \brief Receive buffers ring mode config */
396 } IfxEth_RingModeBuffersConfig;
397
398 /** \brief Port pins for RMII mode configuration
399 */
400 typedef struct
401 {
402 IfxEth_Crsdv_In *crsDiv; /**< \brief pointer to CRSDIV input pin config */
403 IfxEth_Refclk_In *refClk; /**< \brief Pointer to REFCLK input pin config */
404 IfxEth_Rxd_In *rxd0; /**< \brief Pointer to RXD0 input pin config */
405 IfxEth_Rxd_In *rxd1; /**< \brief Pointer to RXD1 input pin config */
406 IfxEth_Mdc_Out *mdc; /**< \brief Pointer to MDC output pin config */
407 IfxEth_Mdio_InOut *mdio; /**< \brief Pointer to MDIO pin config */
408 IfxEth_Txd_Out *txd0; /**< \brief Pointer to TXD0 output pin config */
409 IfxEth_Txd_Out *txd1; /**< \brief Pointer to TXD1 output pin config */
410 IfxEth_Txen_Out *txEn; /**< \brief Pointer to TXEN output pin config */
411 } IfxEth_RmiiPins;
412
413 /** \} */
414
415 /** \addtogroup IfxLld_Eth_Std_Unions
416 * \{ */
417 typedef union
418 {
419 IfxEth_RxDescr items[IFXETH_MAX_RX_BUFFERS];
420 uint32 U[IFXETH_MAX_RX_BUFFERS][IFXETH_DESCR_SIZE];
421 } IfxEth_RxDescrList;
422
423 typedef union
424 {
425 IfxEth_TxDescr items[IFXETH_MAX_TX_BUFFERS];
426 uint32 U[IFXETH_MAX_TX_BUFFERS][IFXETH_DESCR_SIZE];
427 } IfxEth_TxDescrList;
428
429 /** \} */
430
431 /** \addtogroup IfxLld_Eth_Std_DataStructures
432 * \{ */
433 /** \brief ETH configuration structure
434 */
435 typedef struct
436 {
437 uint8 macAddress[6]; /**< \brief MAC address for the ethernet, should be unique in the network */
438 uint32 (*phyInit)(void); /**< \brief Pointer to the transceiver init function */
439 boolean (*phyLink)(void); /**< \brief Pointer to the transceiver link function */
440 IfxEth_PhyInterfaceMode phyInterfaceMode; /**< \brief Phy Interface mode */
441 IFX_CONST IfxEth_RmiiPins *rmiiPins; /**< \brief Pointer to port pins configuration of RMII mode */
442 IFX_CONST IfxEth_MiiPins *miiPins; /**< \brief Pointer to port pins configuration of MII mode */
443 Ifx_Priority isrPriority; /**< \brief Interrupt service priority */
444 IfxSrc_Tos isrProvider; /**< \brief Interrupt service provider */
445 Ifx_ETH *ethSfr; /**< \brief Pointer to register base */
446 IfxEth_RxDescrList *rxDescr; /**< \brief pointer to RX descriptor RAM */
447 IfxEth_TxDescrList *txDescr; /**< \brief pointer to TX descriptor RAM */
448 IfxEth_DescriptorMode descriptorMode; /**< \brief Descriptor mode (chain or ring) */
449 IfxEth_RingModeBuffersConfig ringModeBuffersConfig; /**< \brief Ring mode buffers condiguration */
450 } IfxEth_Config;
451
452 /** \} */
453
454 /** \addtogroup IfxLld_Eth_Std_DataStructures
455 * \{ */
456 /** \brief ETH driver structure
457 */
458 typedef struct
459 {
460 Ifx_ETH_STATUS status; /**< \brief Intermediate variable to use register content in control structure */
461 uint32 rxCount; /**< \brief Number of frames received */
462 uint32 txCount; /**< \brief Number of frames transmitted */
463 uint32 error; /**< \brief Indicate an error has occurred during execution */
464 sint32 isrRxCount; /**< \brief Count of RX ISR */
465 sint32 isrTxCount; /**< \brief Count of TX ISR */
466 sint32 txDiff; /**< \brief Difference between isrTxCount and txCount */
467 sint32 rxDiff; /**< \brief Difference between isrRxCount and rxCount */
468 sint32 isrCount; /**< \brief count of all ISR */
469 IfxEth_Config config; /**< \brief Copy of the configuration passed through IfxEth_init() */
470 IfxEth_RxDescrList *rxDescr; /**< \brief pointer to RX descriptor RAM */
471 IfxEth_TxDescrList *txDescr; /**< \brief pointer to TX descriptor RAM */
472 IfxEth_RxDescr *pRxDescr;
473 IfxEth_TxDescr *pTxDescr;
474 Ifx_ETH *ethSfr; /**< \brief Pointer to register base */
475 IfxEth_DescriptorMode descriptorMode; /**< \brief Descriptor mode (chain or ring) */
476 IfxEth_RingModeBufferUsed txBufferUsed; /**< \brief Transmit Buffer(s) used in ringmode */
477 IfxEth_RingModeBufferUsed rxBufferUsed; /**< \brief Receive Buffer(s) used in ringmode */
478 } IfxEth;
479
480 /** \brief Structure for RX descriptor DWORD 0 Bit field access
481 */
482 typedef struct
483 {
484 uint32 PCE : 1; /**< \brief Rx MAC Address/Payload Checksum Error */
485 uint32 CE : 1; /**< \brief CRC Error */
486 uint32 DBE : 1; /**< \brief Dribble Bit Error */
487 uint32 RE : 1; /**< \brief Receive Error */
488 uint32 RWT : 1; /**< \brief Receive Watchdog Timeout */
489 uint32 FT : 1; /**< \brief Frame Type */
490 uint32 LC : 1; /**< \brief Late Collision */
491 uint32 IPC : 1; /**< \brief IPC Checksum Error/Giant Frame */
492 uint32 LS : 1; /**< \brief Last Descriptor */
493 uint32 FS : 1; /**< \brief First Descriptor */
494 uint32 VLAN : 1; /**< \brief VLAN Tag */
495 uint32 OE : 1; /**< \brief Overflow Error */
496 uint32 LE : 1; /**< \brief Length Error */
497 uint32 SAF : 1; /**< \brief Source Address Filter Fail */
498 uint32 DE : 1; /**< \brief Descriptor Error */
499 uint32 ES : 1; /**< \brief Error Summary, ES = PCE | CE | RE | RWT | LC | IPC | OE | DE */
500 uint32 FL : 14; /**< \brief Frame Length */
501 uint32 AFM : 1; /**< \brief Destination Address Filter Fail */
502 uint32 OWN : 1; /**< \brief Own Bit, 1 = own by DMA */
503 } IfxEth_RxDescr0_Bits;
504
505 /** \brief Structure for RX descriptor DWORD 1 Bit field access
506 */
507 typedef struct
508 {
509 uint32 RBS1 : 11; /**< \brief Receive Buffer 1 Size */
510 uint32 RBS2 : 11; /**< \brief Receive Buffer 2 Size */
511 uint32 resv : 2; /**< \brief (reserved) */
512 uint32 RCH : 1; /**< \brief Second Address Chained */
513 uint32 RER : 1; /**< \brief Receive End of Ring */
514 uint32 resv2 : 5; /**< \brief (reserved) */
515 uint32 DIC : 1; /**< \brief Disable Interrupt on Completion */
516 } IfxEth_RxDescr1_Bits;
517
518 /** \brief Structure for TX descriptor DWORD 0 Bit field access
519 */
520 typedef struct
521 {
522 uint32 DB : 1; /**< \brief Deferred Bit */
523 uint32 UF : 1; /**< \brief Underflow Error */
524 uint32 ED : 1; /**< \brief Excessive Deferral */
525 uint32 CC : 4; /**< \brief Collision Count */
526 uint32 VLAN : 1; /**< \brief VLAN Tag */
527 uint32 EC : 1; /**< \brief Excessive Collision */
528 uint32 LC : 1; /**< \brief Late Collision */
529 uint32 NC : 1; /**< \brief No Carrier */
530 uint32 LOC : 1; /**< \brief Loss of Carrier */
531 uint32 PCE : 1; /**< \brief Payload Checksum Error */
532 uint32 FF : 1; /**< \brief Frame Flushed */
533 uint32 JT : 1; /**< \brief Jabber Timeout */
534 uint32 ES : 1; /**< \brief Error Summary, ES = JT | FF | LOC | NC | LC | EC | ED | UF */
535 uint32 IHE : 1; /**< \brief IP Header Error */
536 uint32 TTSS : 1; /**< \brief Tx Time Stamp Status */
537 uint32 resv : 13; /**< \brief (reserved) */
538 uint32 OWN : 1; /**< \brief Own Bit, 1 = own by DMA */
539 } IfxEth_TxDescr0_Bits;
540
541 /** \brief Structure for TX descriptor DWORD 1 Bit field access
542 */
543 typedef struct
544 {
545 uint32 TBS1 : 11; /**< \brief Transmit Buffer 1 Size */
546 uint32 TBS2 : 11; /**< \brief Transmit Buffer 2 Size */
547 uint32 TTSE : 1; /**< \brief Transmit Time Stamp Enable */
548 uint32 DP : 1; /**< \brief Disable Padding */
549 uint32 TCH : 1; /**< \brief Second Address Chained */
550 uint32 TER : 1; /**< \brief Transmit End of Ring */
551 uint32 DC : 1; /**< \brief Disable CRC */
552 uint32 CIC : 2; /**< \brief Checksum Insertion Control */
553 uint32 FS : 1; /**< \brief First Segment */
554 uint32 LS : 1; /**< \brief Last Segment */
555 uint32 IC : 1; /**< \brief Interrupt on Completion */
556 } IfxEth_TxDescr1_Bits;
557
558 /** \} */
559
560 /** \addtogroup IfxLld_Eth_Std_Configuration
561 * \{ */
562
563 /******************************************************************************/
564 /*-------------------------Inline Function Prototypes-------------------------*/
565 /******************************************************************************/
566
567 /** \brief Set buffer of an RX descriptor
568 * \param descr descr Pointer to an RX descriptor
569 * \param buffer pointer to buffer
570 * \return None
571 */
572 IFX_INLINE void IfxEth_RxDescr_setBuffer(IfxEth_RxDescr *descr, void *buffer);
573
574 /** \brief Get pointer to next TX descriptor
575 * \param descr descr Pointer to a TX descriptor
576 * \return next Tx descriptor
577 */
578 IFX_INLINE IfxEth_TxDescr *IfxEth_TxDescr_getNext(IfxEth_TxDescr *descr);
579
580 /** \brief Return TRUE if a TX descriptor is available for setup
581 * \param descr pointer to descriptor
582 */
583 IFX_INLINE boolean IfxEth_TxDescr_isAvailable(IfxEth_TxDescr *descr);
584
585 /** \brief Set buffer of a TX descriptor
586 * \param descr Entdescr Pointer to a TX descriptorer_String_here
587 * \param buffer pointer to Buffer
588 * \return None
589 */
590 IFX_INLINE void IfxEth_TxDescr_setBuffer(IfxEth_TxDescr *descr, void *buffer);
591
592 /** \brief Applies the Software Reset
593 * \param eth ETH driver structure
594 * \return None
595 */
596 IFX_INLINE void IfxEth_applySoftwareReset(IfxEth *eth);
597
598 /** \brief Clear Early Receive Interrupt request
599 * \param eth ETH driver structure
600 * \return None
601 */
602 IFX_INLINE void IfxEth_clearEriInterrupt(IfxEth *eth);
603
604 /** \brief Clear receive interrupt request
605 * \param eth ETH driver structure
606 * \return None
607 */
608 IFX_INLINE void IfxEth_clearRxInterrupt(IfxEth *eth);
609
610 /** \brief Clear Transmit Buffer Unavailable request
611 * \param eth ETH driver structure
612 * \return None
613 */
614 IFX_INLINE void IfxEth_clearTuInterrupt(IfxEth *eth);
615
616 /** \brief Clear transmit interrupt request
617 * \param eth ETH driver structure
618 * \return None
619 */
620 IFX_INLINE void IfxEth_clearTxInterrupt(IfxEth *eth);
621
622 /** \brief Disables Timestamp Fine or Coarse Update
623 * \param eth ETH driver structure
624 * \return None
625 */
626 IFX_INLINE void IfxEth_disableTimeStampCoarseUpdate(IfxEth *eth);
627
628 /** \brief Disables Processing of PTP frames sent over IPV4 UDP
629 * \param eth ETH driver structure
630 * \return None
631 */
632 IFX_INLINE void IfxEth_disableTimeStampForIpv4Frames(IfxEth *eth);
633
634 /** \brief Enables theMMC counter
635 * \param eth ETH driver structure
636 * \return None
637 */
638 IFX_INLINE void IfxEth_enableMmcCounter(IfxEth *eth);
639
640 /** \brief Enables the TimeStamp
641 * \param eth ETH driver structure
642 * \return None
643 */
644 IFX_INLINE void IfxEth_enableTimeStamp(IfxEth *eth);
645
646 /** \brief Enables Timestamp Fine or Coarse Update
647 * \param eth ETH driver structure
648 * \return None
649 */
650 IFX_INLINE void IfxEth_enableTimeStampCoarseUpdate(IfxEth *eth);
651
652 /** \brief Enables the TimeStamp for All frames
653 * \param eth ETH driver structure
654 * \return None
655 */
656 IFX_INLINE void IfxEth_enableTimeStampForAllFrames(IfxEth *eth);
657
658 /** \brief Enables Processing of PTP over Ethernet Frames
659 * \param eth ETH driver structure
660 * \return None
661 */
662 IFX_INLINE void IfxEth_enableTimeStampForEthFrames(IfxEth *eth);
663
664 /** \brief Enables Processing of PTP frames sent over IPV4 UDP
665 * \param eth ETH driver structure
666 * \return None
667 */
668 IFX_INLINE void IfxEth_enableTimeStampForIpv4Frames(IfxEth *eth);
669
670 /** \brief Enables PTP packet Processing for Version 2 Format
671 * \param eth ETH driver structure
672 * \return None
673 */
674 IFX_INLINE void IfxEth_enableTimeStampForVer2Format(IfxEth *eth);
675
676 /** \brief returns the status of the TimeStamp Initialisation
677 * \param eth ETH driver structure
678 * \return Status, TRUE: initialising, FLASE: initialised
679 */
680 IFX_INLINE boolean IfxEth_getTimeStampInitialiseStatus(IfxEth *eth);
681
682 /** \brief returns the status of the System Time updation
683 * \param eth ETH driver structure
684 * \return Status, TRUE: initialising, FLASE: initialised
685 */
686 IFX_INLINE boolean IfxEth_getTimeStampUpdateStatus(IfxEth *eth);
687
688 /** \brief Initialises the TimeStamp
689 * \param eth ETH driver structure
690 * \return None
691 */
692 IFX_INLINE void IfxEth_initialiseTimeStamp(IfxEth *eth);
693
694 /** \brief Returns the status of Software Reset
695 * \param eth ETH driver structure
696 * \return Status
697 */
698 IFX_INLINE boolean IfxEth_isSoftwareResetDone(IfxEth *eth);
699
700 /** \brief Sets addition, the time value is added with the contents of the update register
701 * \param eth ETH driver structure
702 * \return None
703 */
704 IFX_INLINE void IfxEth_setAddToTimeUpdate(IfxEth *eth);
705
706 /** \brief Enable/Disables Timestamp Digital or Binary Rollover Control
707 * \param eth ETH driver structure
708 * \param enabled Enable = 1 / Disable = 0
709 * \return None
710 */
711 IFX_INLINE void IfxEth_setBinaryRolloverControl(IfxEth *eth, boolean enabled);
712
713 /** \brief Sets the loopback mode
714 * \param eth ETH driver structure
715 * \param loopbackMode loopback mode enable/disbale
716 * \return None
717 */
718 IFX_INLINE void IfxEth_setLoopbackMode(IfxEth *eth, boolean loopbackMode);
719
720 /** \brief Sets the time in sub seconds representation, to be initialized or added to the system time
721 * \param eth ETH driver structure
722 * \param value Sub Second Increment Value
723 * \return None
724 */
725 IFX_INLINE void IfxEth_setNanoSecondsUpdateValue(IfxEth *eth, uint8 value);
726
727 /** \brief Sets the Phy Interface mode
728 * \param eth ETH driver structure
729 * \param mode Phy interface mode
730 * \return None
731 */
732 IFX_INLINE void IfxEth_setPhyInterfaceMode(IfxEth *eth, IfxEth_PhyInterfaceMode mode);
733
734 /** \brief Sets receive descriptor address
735 * \param eth pointer to the ethernet module
736 * \param address Address
737 * \return None
738 */
739 IFX_INLINE void IfxEth_setReceiveDescriptorAddress(Ifx_ETH *eth, void *address);
740
741 /** \brief Sets the time in seconds to be initialized or added to the system time
742 * \param eth ETH driver structure
743 * \param value Sub Second Increment Value
744 * \return None
745 */
746 IFX_INLINE void IfxEth_setSecondsUpdateValue(IfxEth *eth, uint8 value);
747
748 /** \brief Sets the Sub Second Increment Value
749 * \param eth ETH driver structure
750 * \param value Sub Second Increment Value
751 * \return None
752 */
753 IFX_INLINE void IfxEth_setSubSecondIncrementValue(IfxEth *eth, uint8 value);
754
755 /** \brief Sets subtraction, the time value is subtracted with the contents of the update register
756 * \param eth ETH driver structure
757 * \return None
758 */
759 IFX_INLINE void IfxEth_setSubtractToTimeUpdate(IfxEth *eth);
760
761 /** \brief Sets transmit descriptor address
762 * \param eth pointer to the ethernet module
763 * \param address Address
764 * \return None
765 */
766 IFX_INLINE void IfxEth_setTransmitDescriptorAddress(Ifx_ETH *eth, void *address);
767
768 /** \brief Updates the System time with specified values in SECONDS and NANOSECONDS registers
769 * \param eth ETH driver structure
770 * \return None
771 */
772 IFX_INLINE void IfxEth_updateTimeStamp(IfxEth *eth);
773
774 /** \brief Waits for one TX buffer becomes available
775 * \param eth ETH driver structure
776 * retval non NULL_PTR TX buffer is available at the address pointed by the returned value
777 * retval NULL_PTR TX buffer is busy.
778 */
779 IFX_INLINE void *IfxEth_waitTransmitBuffer(IfxEth *eth);
780
781 /******************************************************************************/
782 /*-------------------------Global Function Prototypes-------------------------*/
783 /******************************************************************************/
784
785 /** \brief Free the receive buffer, enabling it for the further reception
786 * \param eth ETH driver structure
787 * \return None
788 */
789 IFX_EXTERN void IfxEth_freeReceiveBuffer(IfxEth *eth);
790
791 /** \brief Request to send the transmit buffer
792 *
793 * The transmit buffer is the last one specified by IfxEth_getTransmitBuffer()
794 * \param eth ETH driver structure
795 * \param len Length of the data put in the transmit buffer (in bytes)
796 * \return None
797 */
798 IFX_EXTERN void IfxEth_sendTransmitBuffer(IfxEth *eth, uint16 len);
799
800 /** \brief Request to send the transmit buffer
801 *
802 * The transmit buffer is the last one specified by IfxEth_getTransmitBuffer()
803 * \param eth ETH driver structure
804 * \param buffer1Length Length of the data put in the transmit buffer 1 (in bytes)
805 * \param buffer2Length Length of the data put in the transmit buffer 2 (in bytes)
806 * \return None
807 */
808 IFX_EXTERN void IfxEth_sendTransmitBuffersRingMode(IfxEth *eth, uint16 buffer1Length, uint16 buffer2Length);
809
810 /** \brief Sets the MAC address
811 * \param eth ETH driver structure
812 * \param macAddress MAC address
813 * \return None
814 */
815 IFX_EXTERN void IfxEth_setMacAddress(IfxEth *eth, const uint8 *macAddress);
816
817 /** \brief Start the receiver functions
818 * \param eth ETH driver structure
819 * \return None
820 */
821 IFX_EXTERN void IfxEth_startReceiver(IfxEth *eth);
822
823 /** \brief Stops the receiver functions
824 * \param eth ETH driver structure
825 * \return None
826 */
827 IFX_EXTERN void IfxEth_stopReceiver(IfxEth *eth);
828
829 /** \brief writes the header format into buffrer
830 * \param eth ETH driver structure
831 * \param txBuffer pointer to tx buffer
832 * \param destinationAddress pointer to destination address
833 * \param sourceAddress pointer to source address
834 * \param packetSize size of the packet
835 * \return None
836 */
837 IFX_EXTERN void IfxEth_writeHeader(IfxEth *eth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 packetSize);
838
839 /** \} */
840
841 /** \addtogroup IfxLld_Eth_Std_Utility
842 * \{ */
843
844 /******************************************************************************/
845 /*-------------------------Inline Function Prototypes-------------------------*/
846 /******************************************************************************/
847
848 /** \brief Get pointer to next RX descriptor
849 * \param descr descr Pointer to an RX descriptor
850 * \return next RX descriptor
851 */
852 IFX_INLINE IfxEth_RxDescr *IfxEth_RxDescr_getNext(IfxEth_RxDescr *descr);
853
854 /** \brief release RX descriptor
855 * \param descr pointer to Rx descriptor
856 * \return None
857 */
858 IFX_INLINE void IfxEth_RxDescr_release(IfxEth_RxDescr *descr);
859
860 /** \brief Release a TX descriptor for transmit queue
861 * \param descr Enter_String_herdescr Pointer to a TX descriptore
862 * \return None
863 */
864 IFX_INLINE void IfxEth_TxDescr_release(IfxEth_TxDescr *descr);
865
866 /** \brief resets Ethernet Configuration register
867 * \return None
868 */
869 IFX_INLINE void IfxEth_clearMacConfiguration(void);
870
871 /** \brief Get pointer to actual RX descriptor
872 * \param eth eth ETH driver structure
873 */
874 IFX_INLINE IfxEth_RxDescr *IfxEth_getActualRxDescriptor(IfxEth *eth);
875
876 /**
877 */
878 IFX_INLINE uint32 IfxEth_getActualRxIndex(IfxEth *eth);
879
880 /** \brief Get pointer to actual TX descriptor
881 * \param eth eth ETH driver structure
882 */
883 IFX_INLINE IfxEth_TxDescr *IfxEth_getActualTxDescriptor(IfxEth *eth);
884
885 /** \brief Get pointer to base RX descriptor
886 * \param eth eth ETH driver structure
887 */
888 IFX_INLINE IfxEth_RxDescr *IfxEth_getBaseRxDescriptor(IfxEth *eth);
889
890 /** \brief Get pointer to base TX descriptor
891 * \param eth eth ETH driver structure
892 */
893 IFX_INLINE IfxEth_TxDescr *IfxEth_getBaseTxDescriptor(IfxEth *eth);
894
895 /** \brief returns the status of th eloopback mode
896 * \param eth ETH driver structure
897 * \return Loop back mode status (TRUE / FALSE)
898 */
899 IFX_INLINE boolean IfxEth_getLoopbackMode(IfxEth *eth);
900
901 /** \brief Returns pointer to the MAC address configured for this ETH
902 * \param eth ETH driver structure
903 */
904 IFX_INLINE void *IfxEth_getMacAddressPointer(IfxEth *eth);
905
906 /** \brief returns the Receive Process State
907 * \param eth ETH driver structure
908 * \return Receive Process State
909 */
910 IFX_INLINE IfxEth_ReceiveProcessState IfxEth_getReceiveProcessState(IfxEth *eth);
911
912 /** \brief Returns length of the oldest available RX data
913 * \param eth ETH driver structure
914 * \return Data length
915 */
916 IFX_INLINE uint16 IfxEth_getRxDataLength(IfxEth *eth);
917
918 /** \brief Returns the SRC pointer of Eth
919 * \param eth ETH driver structure
920 * \return pointer to ETH SRCR register
921 */
922 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEth_getSrcPointer(IfxEth *eth);
923
924 /** \brief returns the Transmit Process State
925 * \param eth ETH driver structure
926 * \return Transmit Process State
927 */
928 IFX_INLINE IfxEth_TransmitProcessState IfxEth_getTransmitProcessState(IfxEth *eth);
929
930 /** \brief Checks whether Early Receive interrupt is requested
931 * \param eth ETH driver structure
932 * \return TRUE/FALSE
933 */
934 IFX_INLINE boolean IfxEth_isEriInterrupt(IfxEth *eth);
935
936 /** \brief Checks whether physical connection is active
937 * \param eth ETH driver structure
938 * \return retval zero Connection is inactive
939 * retval non zero Connection is active
940 */
941 IFX_INLINE boolean IfxEth_isLinkActive(IfxEth *eth);
942
943 /** \brief Checks whether NIS interrupt is requested
944 * \param eth ETH driver structure
945 * \return TRUE/FALSE
946 */
947 IFX_INLINE boolean IfxEth_isNisInterrupt(IfxEth *eth);
948
949 /**
950 * \param eth pointer to ETH driver structure
951 */
952 IFX_INLINE boolean IfxEth_isRxChecksumError(IfxEth *eth);
953
954 /** \brief Checks whether one or more RX data is available
955 * \param eth ETH driver structure
956 * \return retval TRUE one or more RX data is available
957 * retval FALSE no RX data is available
958 */
959 IFX_INLINE boolean IfxEth_isRxDataAvailable(IfxEth *eth);
960
961 /** \brief Checks whether receive interrupt is requested
962 * \param eth ETH driver structure
963 * \return TRUE/FALSE
964 */
965 IFX_INLINE boolean IfxEth_isRxInterrupt(IfxEth *eth);
966
967 /** \brief Checks whether Transmit Buffer Unavailable interrupt is requested
968 * \param eth ETH driver structure
969 * \return TRUE/FALSE
970 */
971 IFX_INLINE boolean IfxEth_isTuInterrupt(IfxEth *eth);
972
973 /** \brief Checks whether transmit interrupt is requested
974 * \param eth ETH driver structure
975 * \return TRUE/FALSE
976 */
977 IFX_INLINE boolean IfxEth_isTxInterrupt(IfxEth *eth);
978
979 /** \brief reads the status of all flags
980 * \param eth ETH driver structure
981 * \return None
982 */
983 IFX_INLINE void IfxEth_readAllFlags(IfxEth *eth);
984
985 /******************************************************************************/
986 /*-------------------------Global Function Prototypes-------------------------*/
987 /******************************************************************************/
988
989 /** \brief Disable ETH Module
990 * \return None
991 */
992 IFX_EXTERN void IfxEth_disableModule(void);
993
994 /** \brief Enable ETH Module
995 * \return None
996 */
997 IFX_EXTERN void IfxEth_enableModule(void);
998
999 /** \brief Gets receive buffer\n
1000 * note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffer has been processed
1001 * \param eth ETH driver structure
1002 * \return retval NULL_PTR no received frame
1003 * retval !NULL_PTR a frame has been received
1004 */
1005 IFX_EXTERN void *IfxEth_getReceiveBuffer(IfxEth *eth);
1006
1007 /** \brief Get a free transmit buffer
1008 * \param eth ETH driver structure
1009 * \return retval NULL_PTR no free transmit buffer is available
1010 * retval !NULL_PTR a free transmit buffer is available
1011 */
1012 IFX_EXTERN void *IfxEth_getTransmitBuffer(IfxEth *eth);
1013
1014 /** \brief Reads the MAC address from module register
1015 * \param eth ETH driver structure
1016 * \param macAddress MAC address
1017 * \return None
1018 */
1019 IFX_EXTERN void IfxEth_readMacAddress(IfxEth *eth, uint8 *macAddress);
1020
1021 /** \brief resets Ethernet kernel
1022 * \return None
1023 */
1024 IFX_EXTERN void IfxEth_resetModule(void);
1025
1026 /**
1027 * \param eth pointer to ETH driver structure
1028 * \param len length of buffer
1029 * \return None
1030 */
1031 IFX_EXTERN void IfxEth_setAndSendTransmitBuffer(IfxEth *eth, void *buffer, uint16 len);
1032
1033 /** \brief Set up checksum Engine
1034 * \param eth eth ETH driver structure
1035 * \param mode specifies checksum mode
1036 * \return None
1037 */
1038 IFX_EXTERN void IfxEth_setupChecksumEngine(IfxEth *eth, IfxEth_ChecksumMode mode);
1039
1040 /** \brief Shuffle to next RX descriptor
1041 * \param eth eth ETH driver structure
1042 * \return None
1043 */
1044 IFX_EXTERN void IfxEth_shuffleRxDescriptor(IfxEth *eth);
1045
1046 /** \brief Shuffle to next TX descriptor
1047 * \param eth eth ETH driver structure
1048 * \return None
1049 */
1050 IFX_EXTERN void IfxEth_shuffleTxDescriptor(IfxEth *eth);
1051
1052 /** \brief Start the transmitter functions
1053 * \param eth eth ETH driver structure
1054 * \return None
1055 */
1056 IFX_EXTERN void IfxEth_startTransmitter(IfxEth *eth);
1057
1058 /** \brief Stop the transmitter functions
1059 * \param eth eth ETH driver structure
1060 * \return None
1061 */
1062 IFX_EXTERN void IfxEth_stopTransmitter(IfxEth *eth);
1063
1064 /** \brief Wakeup the receiver functions
1065 * \param eth eth ETH driver structure
1066 * \return None
1067 */
1068 IFX_EXTERN void IfxEth_wakeupReceiver(IfxEth *eth);
1069
1070 /** \brief Wakeup the transmitter functions
1071 * \param eth eth ETH driver structure
1072 * \return None
1073 */
1074 IFX_EXTERN void IfxEth_wakeupTransmitter(IfxEth *eth);
1075
1076 /** \} */
1077
1078 /** \addtogroup IfxLld_Eth_Std_Initialisation
1079 * \{ */
1080
1081 /******************************************************************************/
1082 /*-------------------------Inline Function Prototypes-------------------------*/
1083 /******************************************************************************/
1084
1085 /** \brief Setup some properties of a TX descriptor
1086 * \param descr Enter_Sdescr Pointer to a TX descriptortring_here
1087 * \param length specifies length of transmit descriptor
1088 * \param firstSegment specifies first segment of frame
1089 * \param lastSegment specifies last segment of frame
1090 * \return None
1091 */
1092 IFX_INLINE void IfxEth_TxDescr_setup(IfxEth_TxDescr *descr, uint16 length, boolean firstSegment, boolean lastSegment);
1093
1094 /** \brief Sets the receive buffer1 of the receive descriptor along with its size
1095 * \param eth ETH driver structure
1096 * \param descr Pointer to Rx descreptor
1097 * \param address Buffer 1 start address
1098 * \param size Buffer 1 size
1099 * \return None
1100 */
1101 IFX_INLINE void IfxEth_setReceiveBuffer1RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size);
1102
1103 /** \brief Sets the receive buffer2 of the receive descriptor along with its size
1104 * \param eth ETH driver structure
1105 * \param descr Pointer to Rx descreptor
1106 * \param address Buffer 1 start address
1107 * \param size Buffer 1 size
1108 * \return None
1109 */
1110 IFX_INLINE void IfxEth_setReceiveBuffer2RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size);
1111
1112 /** \brief Sets the transmit buffer1 of the receive descriptor along with its size
1113 * \param eth ETH driver structure
1114 * \param descr Pointer to Tx descreptor
1115 * \param address Buffer 1 start address
1116 * \param size Buffer 1 size
1117 * \return None
1118 */
1119 IFX_INLINE void IfxEth_setTransmitBuffer1RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size);
1120
1121 /** \brief Sets the transmit buffer2 of the receive descriptor along with its size
1122 * \param eth ETH driver structure
1123 * \param descr Pointer to Tx descreptor
1124 * \param address Buffer 1 start address
1125 * \param size Buffer 1 size
1126 * \return None
1127 */
1128 IFX_INLINE void IfxEth_setTransmitBuffer2RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size);
1129
1130 /******************************************************************************/
1131 /*-------------------------Global Function Prototypes-------------------------*/
1132 /******************************************************************************/
1133
1134 /** \brief Initialises the driver
1135 * \param eth ETH driver structure
1136 * \param config ETH configuration structure
1137 * \return None
1138 */
1139 IFX_EXTERN void IfxEth_init(IfxEth *eth, const IfxEth_Config *config);
1140
1141 /** \brief Initialises the configuration Structure
1142 * \param config ETH configuration structure
1143 * \param ethSfr Pointer to register base
1144 * \return None
1145 */
1146 IFX_EXTERN void IfxEth_initConfig(IfxEth_Config *config, Ifx_ETH *ethSfr);
1147
1148 /** \brief Initialises the receive descriptors
1149 * \param eth ETH driver structure
1150 * \return None
1151 */
1152 IFX_EXTERN void IfxEth_initReceiveDescriptors(IfxEth *eth);
1153
1154 /** \brief Initialises the receive descriptors
1155 * \param eth ETH driver structure
1156 * \param config Ring mode Rx buffers configuration
1157 * \return None
1158 */
1159 IFX_EXTERN void IfxEth_initReceiveDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeRxBuffersConfig *config);
1160
1161 /** \brief Initialises transmit descriptors
1162 * \param eth pointer to ETH driver structure
1163 * \return None
1164 */
1165 IFX_EXTERN void IfxEth_initTransmitDescriptors(IfxEth *eth);
1166
1167 /** \brief Initialises transmit descriptors
1168 * \param eth pointer to ETH driver structure
1169 * \param config Ring mode Tx buffers configuration
1170 * \return None
1171 */
1172 IFX_EXTERN void IfxEth_initTransmitDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeTxBuffersConfig *config);
1173
1174 /** \brief Set up MII mode input pins
1175 * \param eth eth pointer to ETH driver structure
1176 * \param miiPins pin of port to be set
1177 * \return None
1178 */
1179 IFX_EXTERN void IfxEth_setupMiiInputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins);
1180
1181 /** \brief setup MII mode output pins
1182 * \param eth eth pointer to ETH driver structure
1183 * \param miiPins pin of port to be set
1184 * \return None
1185 */
1186 IFX_EXTERN void IfxEth_setupMiiOutputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins);
1187
1188 /** \brief Set up input pins
1189 * \param eth eth pointer to ETH driver structure
1190 * \param rmiiPins pin of port to be set
1191 * \return None
1192 */
1193 IFX_EXTERN void IfxEth_setupRmiiInputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins);
1194
1195 /** \brief set output pin of port
1196 * \param eth eth pointer to ETH driver structure
1197 * \param rmiiPins pin of port to be set
1198 * \return None
1199 */
1200 IFX_EXTERN void IfxEth_setupRmiiOutputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins);
1201
1202 /** \} */
1203
1204 /******************************************************************************/
1205 /*-------------------Global Exported Variables/Constants----------------------*/
1206 /******************************************************************************/
1207
1208 /** \brief receive buffers
1209 */
1210 IFX_EXTERN uint8 IfxEth_rxBuffer[IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE];
1211
1212 IFX_EXTERN IfxEth_RxDescrList IfxEth_rxDescr;
1213
1214 /** \brief Transmit buffers
1215 */
1216 IFX_EXTERN uint8 IfxEth_txBuffer[IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE];
1217
1218 IFX_EXTERN IfxEth_TxDescrList IfxEth_txDescr;
1219
1220 /******************************************************************************/
1221 /*---------------------Inline Function Implementations------------------------*/
1222 /******************************************************************************/
1223
1224 IFX_INLINE IfxEth_RxDescr *IfxEth_RxDescr_getNext(IfxEth_RxDescr *descr)
1225 {
1226 return (IfxEth_RxDescr *)(descr->RDES3.U);
1227 }
1228
1229
1230 IFX_INLINE void IfxEth_RxDescr_release(IfxEth_RxDescr *descr)
1231 {
1232 descr->RDES0.A.OWN = 1U;
1233 }
1234
1235
1236 IFX_INLINE void IfxEth_RxDescr_setBuffer(IfxEth_RxDescr *descr, void *buffer)
1237 {
1238 descr->RDES2.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), buffer);
1239 }
1240
1241
1242 IFX_INLINE IfxEth_TxDescr *IfxEth_TxDescr_getNext(IfxEth_TxDescr *descr)
1243 {
1244 return (IfxEth_TxDescr *)(descr->TDES3.U);
1245 }
1246
1247
1248 IFX_INLINE boolean IfxEth_TxDescr_isAvailable(IfxEth_TxDescr *descr)
1249 {
1250 return (descr->TDES0.A.OWN == 0) ? TRUE : FALSE;
1251 }
1252
1253
1254 IFX_INLINE void IfxEth_TxDescr_release(IfxEth_TxDescr *descr)
1255 {
1256 descr->TDES0.A.OWN = 1U;
1257 }
1258
1259
1260 IFX_INLINE void IfxEth_TxDescr_setBuffer(IfxEth_TxDescr *descr, void *buffer)
1261 {
1262 descr->TDES2.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), buffer);
1263 }
1264
1265
1266 IFX_INLINE void IfxEth_TxDescr_setup(IfxEth_TxDescr *descr, uint16 length, boolean firstSegment, boolean lastSegment)
1267 {
1268 IfxEth_TxDescr0 tdes0;
1269
1270 tdes0.U = descr->TDES0.U;
1271 tdes0.A.FS = firstSegment;
1272 tdes0.A.LS = lastSegment;
1273 descr->TDES0.U = tdes0.U;
1274 descr->TDES1.U = length;
1275 }
1276
1277
1278 IFX_INLINE void IfxEth_applySoftwareReset(IfxEth *eth)
1279 {
1280 (void)eth;
1281 ETH_BUS_MODE.B.SWR = 1; /* reset module */
1282 }
1283
1284
1285 IFX_INLINE void IfxEth_clearEriInterrupt(IfxEth *eth)
1286 {
1287 (void)eth;
1288 MODULE_ETH.STATUS.U = (uint32)((1 << IFX_ETH_STATUS_NIS_OFF) | (1 << IFX_ETH_STATUS_ERI_OFF));
1289 }
1290
1291
1292 IFX_INLINE void IfxEth_clearMacConfiguration(void)
1293 {
1294 MODULE_ETH.MAC_CONFIGURATION.U = 0;
1295 }
1296
1297
1298 IFX_INLINE void IfxEth_clearRxInterrupt(IfxEth *eth)
1299 {
1300 (void)eth;
1301 MODULE_ETH.STATUS.U = (uint32)((1 << IFX_ETH_STATUS_NIS_OFF) | (1 << IFX_ETH_STATUS_RI_OFF));
1302 }
1303
1304
1305 IFX_INLINE void IfxEth_clearTuInterrupt(IfxEth *eth)
1306 {
1307 (void)eth;
1308 MODULE_ETH.STATUS.U = (uint32)((1 << IFX_ETH_STATUS_NIS_OFF) | (1 << IFX_ETH_STATUS_TU_OFF));
1309 }
1310
1311
1312 IFX_INLINE void IfxEth_clearTxInterrupt(IfxEth *eth)
1313 {
1314 (void)eth;
1315 MODULE_ETH.STATUS.U = (uint32)((1 << IFX_ETH_STATUS_NIS_OFF) | (1 << IFX_ETH_STATUS_TI_OFF));
1316 }
1317
1318
1319 IFX_INLINE void IfxEth_disableTimeStampCoarseUpdate(IfxEth *eth)
1320 {
1321 (void)eth;
1322 MODULE_ETH.TIMESTAMP_CONTROL.B.TSCFUPDT = 0;
1323 }
1324
1325
1326 IFX_INLINE void IfxEth_disableTimeStampForIpv4Frames(IfxEth *eth)
1327 {
1328 (void)eth;
1329 MODULE_ETH.TIMESTAMP_CONTROL.B.TSIPV4ENA = 0;
1330 }
1331
1332
1333 IFX_INLINE void IfxEth_enableMmcCounter(IfxEth *eth)
1334 {
1335 (void)eth;
1336 MODULE_ETH.MMC_CONTROL.B.CNTFREEZ = 0;
1337 }
1338
1339
1340 IFX_INLINE void IfxEth_enableTimeStamp(IfxEth *eth)
1341 {
1342 (void)eth;
1343 MODULE_ETH.TIMESTAMP_CONTROL.B.TSENA = 1;
1344 }
1345
1346
1347 IFX_INLINE void IfxEth_enableTimeStampCoarseUpdate(IfxEth *eth)
1348 {
1349 (void)eth;
1350 MODULE_ETH.TIMESTAMP_CONTROL.B.TSCFUPDT = 1;
1351 }
1352
1353
1354 IFX_INLINE void IfxEth_enableTimeStampForAllFrames(IfxEth *eth)
1355 {
1356 (void)eth;
1357 MODULE_ETH.TIMESTAMP_CONTROL.B.TSENALL = 1;
1358 }
1359
1360
1361 IFX_INLINE void IfxEth_enableTimeStampForEthFrames(IfxEth *eth)
1362 {
1363 (void)eth;
1364 MODULE_ETH.TIMESTAMP_CONTROL.B.TSIPENA = 1;
1365 }
1366
1367
1368 IFX_INLINE void IfxEth_enableTimeStampForIpv4Frames(IfxEth *eth)
1369 {
1370 (void)eth;
1371 MODULE_ETH.TIMESTAMP_CONTROL.B.TSIPV4ENA = 1;
1372 }
1373
1374
1375 IFX_INLINE void IfxEth_enableTimeStampForVer2Format(IfxEth *eth)
1376 {
1377 (void)eth;
1378 MODULE_ETH.TIMESTAMP_CONTROL.B.TSVER2ENA = 1;
1379 }
1380
1381
1382 IFX_INLINE IfxEth_RxDescr *IfxEth_getActualRxDescriptor(IfxEth *eth)
1383 {
1384 return eth->pRxDescr;
1385 }
1386
1387
1388 IFX_INLINE uint32 IfxEth_getActualRxIndex(IfxEth *eth)
1389 {
1390 uint32 offset = (uint32)eth->pRxDescr - (uint32)IfxEth_getBaseRxDescriptor(eth);
1391 return offset / sizeof(IfxEth_RxDescr);
1392 }
1393
1394
1395 IFX_INLINE IfxEth_TxDescr *IfxEth_getActualTxDescriptor(IfxEth *eth)
1396 {
1397 return eth->pTxDescr;
1398 }
1399
1400
1401 IFX_INLINE IfxEth_RxDescr *IfxEth_getBaseRxDescriptor(IfxEth *eth)
1402 {
1403 return eth->rxDescr->items;
1404 }
1405
1406
1407 IFX_INLINE IfxEth_TxDescr *IfxEth_getBaseTxDescriptor(IfxEth *eth)
1408 {
1409 return eth->txDescr->items;
1410 }
1411
1412
1413 IFX_INLINE boolean IfxEth_getLoopbackMode(IfxEth *eth)
1414 {
1415 (void)eth;
1416 return (ETH_MAC_CONFIGURATION.B.LM != 0) ? TRUE : FALSE;
1417 }
1418
1419
1420 IFX_INLINE void *IfxEth_getMacAddressPointer(IfxEth *eth)
1421 {
1422 return (void *)eth->config.macAddress;
1423 }
1424
1425
1426 IFX_INLINE IfxEth_ReceiveProcessState IfxEth_getReceiveProcessState(IfxEth *eth)
1427 {
1428 (void)eth;
1429 return (IfxEth_ReceiveProcessState)MODULE_ETH.STATUS.B.RS;
1430 }
1431
1432
1433 IFX_INLINE uint16 IfxEth_getRxDataLength(IfxEth *eth)
1434 {
1435 uint16 length = 0;
1436
1437 if (IfxEth_isRxDataAvailable(eth) != FALSE)
1438 {
1439 length = (uint16)IfxEth_getActualRxDescriptor(eth)->RDES0.A.FL;
1440 }
1441
1442 return length;
1443 }
1444
1445
1446 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEth_getSrcPointer(IfxEth *eth)
1447 {
1448 (void)eth;
1449 return &MODULE_SRC.ETH.ETH[0].SR;
1450 }
1451
1452
1453 IFX_INLINE boolean IfxEth_getTimeStampInitialiseStatus(IfxEth *eth)
1454 {
1455 (void)eth;
1456 return MODULE_ETH.TIMESTAMP_CONTROL.B.TSINIT;
1457 }
1458
1459
1460 IFX_INLINE boolean IfxEth_getTimeStampUpdateStatus(IfxEth *eth)
1461 {
1462 (void)eth;
1463 return MODULE_ETH.TIMESTAMP_CONTROL.B.TSUPDT;
1464 }
1465
1466
1467 IFX_INLINE IfxEth_TransmitProcessState IfxEth_getTransmitProcessState(IfxEth *eth)
1468 {
1469 (void)eth;
1470 return (IfxEth_TransmitProcessState)MODULE_ETH.STATUS.B.TS;
1471 }
1472
1473
1474 IFX_INLINE void IfxEth_initialiseTimeStamp(IfxEth *eth)
1475 {
1476 (void)eth;
1477
1478 if (MODULE_ETH.TIMESTAMP_CONTROL.B.TSINIT == 0)
1479 {
1480 MODULE_ETH.TIMESTAMP_CONTROL.B.TSINIT = 1;
1481 }
1482 }
1483
1484
1485 IFX_INLINE boolean IfxEth_isEriInterrupt(IfxEth *eth)
1486 {
1487 (void)eth;
1488
1489 return MODULE_ETH.STATUS.B.ERI != 0;
1490 }
1491
1492
1493 IFX_INLINE boolean IfxEth_isLinkActive(IfxEth *eth)
1494 {
1495 return eth->config.phyLink() != 0;
1496 }
1497
1498
1499 IFX_INLINE boolean IfxEth_isNisInterrupt(IfxEth *eth)
1500 {
1501 (void)eth;
1502
1503 return MODULE_ETH.STATUS.B.NIS != 0;
1504 }
1505
1506
1507 IFX_INLINE boolean IfxEth_isRxChecksumError(IfxEth *eth)
1508 {
1509 IfxEth_RxDescr *descr = IfxEth_getActualRxDescriptor(eth);
1510 boolean error = (descr->RDES0.A.IPC != 0);
1511 descr->RDES0.A.IPC = 0;
1512
1513 return error;
1514 }
1515
1516
1517 IFX_INLINE boolean IfxEth_isRxDataAvailable(IfxEth *eth)
1518 {
1519 //return (IfxEth_rxDescr[eth->rxIndex][0] & (1U << 31)) == 0);
1520 return IfxEth_getActualRxDescriptor(eth)->RDES0.A.OWN == 0;
1521 }
1522
1523
1524 IFX_INLINE boolean IfxEth_isRxInterrupt(IfxEth *eth)
1525 {
1526 (void)eth;
1527
1528 return MODULE_ETH.STATUS.B.RI != 0;
1529 }
1530
1531
1532 IFX_INLINE boolean IfxEth_isSoftwareResetDone(IfxEth *eth)
1533 {
1534 (void)eth;
1535 return ETH_BUS_MODE.B.SWR == 0 ? 1 : 0;
1536 }
1537
1538
1539 IFX_INLINE boolean IfxEth_isTuInterrupt(IfxEth *eth)
1540 {
1541 (void)eth;
1542
1543 return MODULE_ETH.STATUS.B.TU != 0;
1544 }
1545
1546
1547 IFX_INLINE boolean IfxEth_isTxInterrupt(IfxEth *eth)
1548 {
1549 (void)eth;
1550
1551 return MODULE_ETH.STATUS.B.TI != 0;
1552 }
1553
1554
1555 IFX_INLINE void IfxEth_readAllFlags(IfxEth *eth)
1556 {
1557 eth->status.U = ETH_STATUS.U;
1558 }
1559
1560
1561 IFX_INLINE void IfxEth_setAddToTimeUpdate(IfxEth *eth)
1562 {
1563 (void)eth;
1564 MODULE_ETH.SYSTEM_TIME_NANOSECONDS_UPDATE.B.ADDSUB = 0;
1565 }
1566
1567
1568 IFX_INLINE void IfxEth_setBinaryRolloverControl(IfxEth *eth, boolean enabled)
1569 {
1570 (void)eth;
1571 MODULE_ETH.TIMESTAMP_CONTROL.B.TSCTRLSSR = 1;
1572 }
1573
1574
1575 IFX_INLINE void IfxEth_setLoopbackMode(IfxEth *eth, boolean loopbackMode)
1576 {
1577 (void)eth;
1578 ETH_MAC_CONFIGURATION.B.LM = loopbackMode ? 1 : 0;
1579 }
1580
1581
1582 IFX_INLINE void IfxEth_setNanoSecondsUpdateValue(IfxEth *eth, uint8 value)
1583 {
1584 (void)eth;
1585 MODULE_ETH.SYSTEM_TIME_NANOSECONDS_UPDATE.B.TSSS = value;
1586 }
1587
1588
1589 IFX_INLINE void IfxEth_setPhyInterfaceMode(IfxEth *eth, IfxEth_PhyInterfaceMode mode)
1590 {
1591 (void)eth;
1592 ETH_GPCTL.B.EPR = mode;
1593 }
1594
1595
1596 IFX_INLINE void IfxEth_setReceiveBuffer1RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
1597 {
1598 descr->RDES2.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), address);
1599 descr->RDES1.A.RBS1 = size;
1600 }
1601
1602
1603 IFX_INLINE void IfxEth_setReceiveBuffer2RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
1604 {
1605 descr->RDES3.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), address);
1606 descr->RDES1.A.RBS2 = size;
1607 }
1608
1609
1610 IFX_INLINE void IfxEth_setReceiveDescriptorAddress(Ifx_ETH *eth, void *address)
1611 {
1612 eth->RECEIVE_DESCRIPTOR_LIST_ADDRESS.U = (uint32)address;
1613 }
1614
1615
1616 IFX_INLINE void IfxEth_setSecondsUpdateValue(IfxEth *eth, uint8 value)
1617 {
1618 (void)eth;
1619 MODULE_ETH.SYSTEM_TIME_SECONDS_UPDATE.B.TSS = value;
1620 }
1621
1622
1623 IFX_INLINE void IfxEth_setSubSecondIncrementValue(IfxEth *eth, uint8 value)
1624 {
1625 (void)eth;
1626 MODULE_ETH.SUB_SECOND_INCREMENT.B.SSINC = value;
1627 }
1628
1629
1630 IFX_INLINE void IfxEth_setSubtractToTimeUpdate(IfxEth *eth)
1631 {
1632 (void)eth;
1633 MODULE_ETH.SYSTEM_TIME_NANOSECONDS_UPDATE.B.ADDSUB = 1;
1634 }
1635
1636
1637 IFX_INLINE void IfxEth_setTransmitBuffer1RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
1638 {
1639 descr->TDES2.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), address);
1640 descr->TDES1.A.TBS1 = size;
1641 }
1642
1643
1644 IFX_INLINE void IfxEth_setTransmitBuffer2RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
1645 {
1646 descr->TDES3.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), address);
1647 descr->TDES1.A.TBS2 = size;
1648 }
1649
1650
1651 IFX_INLINE void IfxEth_setTransmitDescriptorAddress(Ifx_ETH *eth, void *address)
1652 {
1653 eth->TRANSMIT_DESCRIPTOR_LIST_ADDRESS.U = (uint32)address;
1654 }
1655
1656
1657 IFX_INLINE void IfxEth_updateTimeStamp(IfxEth *eth)
1658 {
1659 (void)eth;
1660
1661 if (MODULE_ETH.TIMESTAMP_CONTROL.B.TSUPDT == 0)
1662 {
1663 MODULE_ETH.TIMESTAMP_CONTROL.B.TSUPDT = 1;
1664 }
1665 }
1666
1667
1668 IFX_INLINE void *IfxEth_waitTransmitBuffer(IfxEth *eth)
1669 {
1670 void *tx;
1671
1672 do
1673 {
1674 tx = IfxEth_getTransmitBuffer(eth);
1675 } while (tx == NULL_PTR);
1676
1677 return tx;
1678 }
1679
1680
1681 #endif /* IFXET_H */
IfxEth_Txd_Out
TXD pin mapping structure.
Definition: IfxEth_PinMap.h:137
IfxEth_AltRxDescr0_Bits::RE
uint32 RE
Receive Error.
Definition: IfxEth.h:178
IfxEth_AltRxDescr0_Bits::CE
uint32 CE
CRC Error.
Definition: IfxEth.h:176
IfxEth_AltTxDescr0_Bits::ED
uint32 ED
Excessive deferral.
Definition: IfxEth.h:215
IfxEth_isRxChecksumError
IFX_INLINE boolean IfxEth_isRxChecksumError(IfxEth *eth)
Definition: IfxEth.h:1507
IfxEth_RingModeTxBuffersConfig::txBufferUsed
IfxEth_RingModeBufferUsed txBufferUsed
Transmit Buffer(s) used in ringmode.
Definition: IfxEth.h:335
IfxEth::isrTxCount
sint32 isrTxCount
Count of TX ISR.
Definition: IfxEth.h:465
IfxEth_AltRxDescr0_Bits::DE
uint32 DE
Descriptor Error.
Definition: IfxEth.h:189
IfxEth_init
IFX_EXTERN void IfxEth_init(IfxEth *eth, const IfxEth_Config *config)
Initialises the driver.
Definition: IfxEth.c:125
IfxEth_RxDescr1::A
IfxEth_AltRxDescr1_Bits A
Structure for RX descriptor DWORD 1 Bit field access.
Definition: IfxEth.h:268
IfxEth_RxDescr_release
IFX_INLINE void IfxEth_RxDescr_release(IfxEth_RxDescr *descr)
release RX descriptor
Definition: IfxEth.h:1230
IfxEth_Rxclk_In
RXCLK pin mapping structure.
Definition: IfxEth_PinMap.h:88
IfxEth_RingModeBufferUsed_bothBuffers
BOth Buffers used.
Definition: IfxEth.h:146
IfxEth_updateTimeStamp
IFX_INLINE void IfxEth_updateTimeStamp(IfxEth *eth)
Updates the System time with specified values in SECONDS and NANOSECONDS registers.
Definition: IfxEth.h:1657
IfxEth_MiiPins::txd3
IfxEth_Txd_Out * txd3
Pointer to TXD3 output pin config.
Definition: IfxEth.h:385
IfxEth_waitTransmitBuffer
IFX_INLINE void * IfxEth_waitTransmitBuffer(IfxEth *eth)
Waits for one TX buffer becomes available.
Definition: IfxEth.h:1668
IfxEth_RingModeTxBuffersConfig::txBuffer1Size
uint16 txBuffer1Size
Size of Tx Buffer 1.
Definition: IfxEth.h:338
IfxEth_TxDescr::TDES2
IfxEth_TxDescr2 TDES2
TX descriptor DWORD 2.
Definition: IfxEth.h:358
IfxEth_RingModeTxBuffersConfig::txBuffer1StartAddress
uint32 txBuffer1StartAddress
Start address of Tx Buffer 1.
Definition: IfxEth.h:336
IfxEth_MiiPins::rxClk
IfxEth_Rxclk_In * rxClk
Pointer to RXCLK input pin config.
Definition: IfxEth.h:373
IfxEth_getLoopbackMode
IFX_INLINE boolean IfxEth_getLoopbackMode(IfxEth *eth)
returns the status of th eloopback mode
Definition: IfxEth.h:1413
IfxEth_clearRxInterrupt
IFX_INLINE void IfxEth_clearRxInterrupt(IfxEth *eth)
Clear receive interrupt request.
Definition: IfxEth.h:1298
IfxEth_Txer_Out
TXER pin mapping structure.
Definition: IfxEth_PinMap.h:153
IfxEth_isLinkActive
IFX_INLINE boolean IfxEth_isLinkActive(IfxEth *eth)
Checks whether physical connection is active.
Definition: IfxEth.h:1493
IfxEth_AltRxDescr0_Bits::RWT
uint32 RWT
Receive Watchdog Timeout.
Definition: IfxEth.h:179
IfxEth_Config
ETH configuration structure.
Definition: IfxEth.h:435
IfxEth_isTuInterrupt
IFX_INLINE boolean IfxEth_isTuInterrupt(IfxEth *eth)
Checks whether Transmit Buffer Unavailable interrupt is requested.
Definition: IfxEth.h:1539
IfxEth_TransmitProcessState_reset
Stopped; Reset or Stop Transmit Command issued.
Definition: IfxEth.h:153
IfxEth_ReceiveProcessState_suspended
Suspended: Receive Descriptor Unavailable.
Definition: IfxEth.h:134
IFXETH_RTX_BUFFER_SIZE
#define IFXETH_RTX_BUFFER_SIZE
Size of one ethernet frame buffer.
Definition: IfxEth.h:79
IfxEth_RingModeTxBuffersConfig
Configuration structure for Ring Mode Transmit buffers.
Definition: IfxEth.h:333
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxEth_TxDescr1_Bits
Structure for TX descriptor DWORD 1 Bit field access.
Definition: IfxEth.h:543
IfxEth_TxDescr0_Bits
Structure for TX descriptor DWORD 0 Bit field access.
Definition: IfxEth.h:520
IfxEth_DescriptorMode_ring
ring mode descriptors
Definition: IfxEth.h:115
IfxEth_Config::txDescr
IfxEth_TxDescrList * txDescr
pointer to TX descriptor RAM
Definition: IfxEth.h:447
IfxEth_AltRxDescr0_Bits::VLAN
uint32 VLAN
VLAN Tag.
Definition: IfxEth.h:185
IfxEth_isEriInterrupt
IFX_INLINE boolean IfxEth_isEriInterrupt(IfxEth *eth)
Checks whether Early Receive interrupt is requested.
Definition: IfxEth.h:1485
IfxEth_RingModeBufferUsed
IfxEth_RingModeBufferUsed
Buffer(s) used in ring mode.
Definition: IfxEth.h:142
IfxEth_RingModeRxBuffersConfig::rxBufferUsed
IfxEth_RingModeBufferUsed rxBufferUsed
Receive Buffer(s) used in ringmode.
Definition: IfxEth.h:324
IfxEth_AltTxDescr0_Bits::DB
uint32 DB
Deferred bit.
Definition: IfxEth.h:213
IfxEth_enableTimeStampForIpv4Frames
IFX_INLINE void IfxEth_enableTimeStampForIpv4Frames(IfxEth *eth)
Enables Processing of PTP frames sent over IPV4 UDP.
Definition: IfxEth.h:1368
IfxEth_TxDescr1::A
IfxEth_AltTxDescr1_Bits A
Structure for RX descriptor DWORD 1 Bit field access.
Definition: IfxEth.h:298
IfxEth_MiiPins::rxd2
IfxEth_Rxd_In * rxd2
Pointer to RXD2 input pin config.
Definition: IfxEth.h:378
IfxEth_AltTxDescr0_Bits::JT
uint32 JT
Jabber Timeout.
Definition: IfxEth.h:224
IfxEth_getReceiveBuffer
IFX_EXTERN void * IfxEth_getReceiveBuffer(IfxEth *eth)
Gets receive buffer note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffe...
Definition: IfxEth.c:92
IfxEth_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEth_getSrcPointer(IfxEth *eth)
Returns the SRC pointer of Eth.
Definition: IfxEth.h:1446
IfxEth_MiiPins::col
IfxEth_Col_In * col
pointer to COL input pin config
Definition: IfxEth.h:371
IfxEth_DescriptorMode_chain
chain mode descriptors
Definition: IfxEth.h:114
IfxEth::pRxDescr
IfxEth_RxDescr * pRxDescr
Definition: IfxEth.h:472
IfxEth_enableTimeStamp
IFX_INLINE void IfxEth_enableTimeStamp(IfxEth *eth)
Enables the TimeStamp.
Definition: IfxEth.h:1340
IfxEth_setBinaryRolloverControl
IFX_INLINE void IfxEth_setBinaryRolloverControl(IfxEth *eth, boolean enabled)
Enable/Disables Timestamp Digital or Binary Rollover Control.
Definition: IfxEth.h:1568
IfxEth_getActualRxDescriptor
IFX_INLINE IfxEth_RxDescr * IfxEth_getActualRxDescriptor(IfxEth *eth)
Get pointer to actual RX descriptor.
Definition: IfxEth.h:1382
IfxEth_rxBuffer
IFX_EXTERN uint8 IfxEth_rxBuffer[IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]
receive buffers
Definition: IfxEth.h:1210
IfxEth_RxDescr::RDES1
IfxEth_RxDescr1 RDES1
RX descriptor DWORD 1.
Definition: IfxEth.h:347
IfxEth_AltTxDescr0_Bits::UF
uint32 UF
Underflow error.
Definition: IfxEth.h:214
IfxEth_isSoftwareResetDone
IFX_INLINE boolean IfxEth_isSoftwareResetDone(IfxEth *eth)
Returns the status of Software Reset.
Definition: IfxEth.h:1532
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEth_isNisInterrupt
IFX_INLINE boolean IfxEth_isNisInterrupt(IfxEth *eth)
Checks whether NIS interrupt is requested.
Definition: IfxEth.h:1499
IfxEth_RingModeRxBuffersConfig
Configuration structure for Ring Mode Receive Buffers.
Definition: IfxEth.h:322
IfxEth_setAddToTimeUpdate
IFX_INLINE void IfxEth_setAddToTimeUpdate(IfxEth *eth)
Sets addition, the time value is added with the contents of the update register.
Definition: IfxEth.h:1561
IfxEth_MiiPins::mdc
IfxEth_Mdc_Out * mdc
Pointer to MDC pin config.
Definition: IfxEth.h:386
IfxEth_resetModule
IFX_EXTERN void IfxEth_resetModule(void)
resets Ethernet kernel
Definition: IfxEth.c:527
IfxEth_Rxer_In
RXER pin mapping structure.
Definition: IfxEth_PinMap.h:161
IfxEth_Config::ethSfr
Ifx_ETH * ethSfr
Pointer to register base.
Definition: IfxEth.h:445
IfxEth_AltTxDescr0_Bits::TCH
uint32 TCH
Second Address Chained.
Definition: IfxEth.h:229
Ifx_Assert.h
Assert functions.
IfxEth_txDescr
IFX_EXTERN IfxEth_TxDescrList IfxEth_txDescr
Definition: IfxEth.h:1218
IfxEth_PhyInterfaceMode_mii
MII mode.
Definition: IfxEth.h:122
IfxEth_PhyInterfaceMode_rmii
RMII mode.
Definition: IfxEth.h:123
IfxEth_Mdio_InOut
MDIO pin mapping structure.
Definition: IfxEth_PinMap.h:128
IfxEth_ReceiveProcessState_none
Reserved for future use.
Definition: IfxEth.h:132
IfxEth_TransmitProcessState_none
Reserved for future use.
Definition: IfxEth.h:158
IfxEth_MiiPins::txd2
IfxEth_Txd_Out * txd2
Pointer to TXD2 output pin config.
Definition: IfxEth.h:384
IfxEth_TxDescr::TDES0
IfxEth_TxDescr0 TDES0
TX descriptor DWORD 0.
Definition: IfxEth.h:356
IfxEth_initialiseTimeStamp
IFX_INLINE void IfxEth_initialiseTimeStamp(IfxEth *eth)
Initialises the TimeStamp.
Definition: IfxEth.h:1474
IfxEth_isTxInterrupt
IFX_INLINE boolean IfxEth_isTxInterrupt(IfxEth *eth)
Checks whether transmit interrupt is requested.
Definition: IfxEth.h:1547
IfxEth_AltTxDescr0_Bits::CC
uint32 CC
Collision count.
Definition: IfxEth.h:216
IfxEth_RxDescr::RDES3
IfxEth_RxDescr3 RDES3
RX descriptor DWORD 3.
Definition: IfxEth.h:349
IfxEth::txCount
uint32 txCount
Number of frames transmitted.
Definition: IfxEth.h:462
IfxEth_writeHeader
IFX_EXTERN void IfxEth_writeHeader(IfxEth *eth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 packetSize)
writes the header format into buffrer
Definition: IfxEth.c:930
IfxSrc.h
SRC basic functionality.
IfxEth_MiiPins::rxd0
IfxEth_Rxd_In * rxd0
Pointer to RXD0 input pin config.
Definition: IfxEth.h:376
IfxEth_setupRmiiInputPins
IFX_EXTERN void IfxEth_setupRmiiInputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
Set up input pins.
Definition: IfxEth.c:753
IfxEth_Config::isrPriority
Ifx_Priority isrPriority
Interrupt service priority.
Definition: IfxEth.h:443
IfxEth_TransmitProcessState_waiting
Running; Waiting for status.
Definition: IfxEth.h:155
IfxEth_initReceiveDescriptorsRingMode
IFX_EXTERN void IfxEth_initReceiveDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeRxBuffersConfig *config)
Initialises the receive descriptors.
Definition: IfxEth.c:347
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxEth_setLoopbackMode
IFX_INLINE void IfxEth_setLoopbackMode(IfxEth *eth, boolean loopbackMode)
Sets the loopback mode.
Definition: IfxEth.h:1575
IfxEth_Txen_Out
TXEN pin mapping structure.
Definition: IfxEth_PinMap.h:145
IfxEth_applySoftwareReset
IFX_INLINE void IfxEth_applySoftwareReset(IfxEth *eth)
Applies the Software Reset.
Definition: IfxEth.h:1278
IfxEth_DescriptorMode
IfxEth_DescriptorMode
Definition: IfxEth.h:112
IfxEth_setupMiiOutputPins
IFX_EXTERN void IfxEth_setupMiiOutputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins)
setup MII mode output pins
Definition: IfxEth.c:714
IfxEth::isrCount
sint32 isrCount
count of all ISR
Definition: IfxEth.h:468
IfxEth_RxDescr1_Bits
Structure for RX descriptor DWORD 1 Bit field access.
Definition: IfxEth.h:507
IfxEth_RxDescr0_Bits
Structure for RX descriptor DWORD 0 Bit field access.
Definition: IfxEth.h:482
IfxEth_TransmitProcessState_timestampWrite
TIME_STAMP write state.
Definition: IfxEth.h:157
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxEth_TxDescr_setBuffer
IFX_INLINE void IfxEth_TxDescr_setBuffer(IfxEth_TxDescr *descr, void *buffer)
Set buffer of a TX descriptor.
Definition: IfxEth.h:1260
IfxEth_RingModeBuffersConfig::rxConfig
IfxEth_RingModeRxBuffersConfig rxConfig
Receive buffers ring mode config.
Definition: IfxEth.h:395
IfxEth_shuffleTxDescriptor
IFX_EXTERN void IfxEth_shuffleTxDescriptor(IfxEth *eth)
Shuffle to next TX descriptor.
Definition: IfxEth.c:836
IfxEth_AltRxDescr0_Bits::LE
uint32 LE
Length Error.
Definition: IfxEth.h:187
IfxEth_startReceiver
IFX_EXTERN void IfxEth_startReceiver(IfxEth *eth)
Start the receiver functions.
Definition: IfxEth.c:853
IfxEth_disableTimeStampCoarseUpdate
IFX_INLINE void IfxEth_disableTimeStampCoarseUpdate(IfxEth *eth)
Disables Timestamp Fine or Coarse Update.
Definition: IfxEth.h:1319
IfxEth_ReceiveProcessState_transfering
Running: Transferring the receive packet data from receive buffer to host memory. ...
Definition: IfxEth.h:137
IfxEth_MiiPins::txEr
IfxEth_Txer_Out * txEr
Pointer to TXER output pin config.
Definition: IfxEth.h:381
IfxEth_enableTimeStampCoarseUpdate
IFX_INLINE void IfxEth_enableTimeStampCoarseUpdate(IfxEth *eth)
Enables Timestamp Fine or Coarse Update.
Definition: IfxEth.h:1347
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxEth_RingModeRxBuffersConfig::rxBuffer2StartAddress
uint32 rxBuffer2StartAddress
Start address of Rx Buffer 2.
Definition: IfxEth.h:326
IfxEth_MiiPins::txd1
IfxEth_Txd_Out * txd1
Pointer to TXD1 output pin config.
Definition: IfxEth.h:383
IfxEth_MiiPins::txEn
IfxEth_Txen_Out * txEn
Pointer to TXEN output pin config.
Definition: IfxEth.h:380
IfxEth_PinMap.h
ETH I/O map.
IfxEth_AltTxDescr0_Bits::EC
uint32 EC
Excessive Collision.
Definition: IfxEth.h:218
IfxScuWdt.h
SCU basic functionality.
IfxEth
ETH driver structure.
Definition: IfxEth.h:458
IfxEth_MiiPins::crs
IfxEth_Crs_In * crs
pointer to CRS input pin config
Definition: IfxEth.h:370
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxEth_setPhyInterfaceMode
IFX_INLINE void IfxEth_setPhyInterfaceMode(IfxEth *eth, IfxEth_PhyInterfaceMode mode)
Sets the Phy Interface mode.
Definition: IfxEth.h:1589
IfxEth_enableTimeStampForVer2Format
IFX_INLINE void IfxEth_enableTimeStampForVer2Format(IfxEth *eth)
Enables PTP packet Processing for Version 2 Format.
Definition: IfxEth.h:1375
IfxEth_AltTxDescr0_Bits::NC
uint32 NC
No Carrier.
Definition: IfxEth.h:220
IfxEth_AltTxDescr1_Bits
Structure for Alternate/Enhanced TX descriptor DWORD 1 Bit field access.
Definition: IfxEth.h:244
IfxEth_AltRxDescr1_Bits::resv
uint32 resv
reserved)
Definition: IfxEth.h:205
IfxEth_AltTxDescr0_Bits
Structure for Alternate/Enhanced TX descriptor DWORD 0 Bit field access.
Definition: IfxEth.h:211
IfxEth_setTransmitDescriptorAddress
IFX_INLINE void IfxEth_setTransmitDescriptorAddress(Ifx_ETH *eth, void *address)
Sets transmit descriptor address.
Definition: IfxEth.h:1651
IfxEth_ReceiveProcessState
IfxEth_ReceiveProcessState
indicates the Receive DMA FSM state
Definition: IfxEth.h:128
IfxEth_getActualTxDescriptor
IFX_INLINE IfxEth_TxDescr * IfxEth_getActualTxDescriptor(IfxEth *eth)
Get pointer to actual TX descriptor.
Definition: IfxEth.h:1395
IfxEth_initTransmitDescriptors
IFX_EXTERN void IfxEth_initTransmitDescriptors(IfxEth *eth)
Initialises transmit descriptors.
Definition: IfxEth.c:411
IfxEth_readMacAddress
IFX_EXTERN void IfxEth_readMacAddress(IfxEth *eth, uint8 *macAddress)
Reads the MAC address from module register.
Definition: IfxEth.c:519
IfxEth_setReceiveBuffer2RingMode
IFX_INLINE void IfxEth_setReceiveBuffer2RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
Sets the receive buffer2 of the receive descriptor along with its size.
Definition: IfxEth.h:1603
IfxEth_Col_In
COL pin mapping structure.
Definition: IfxEth_PinMap.h:112
IfxEth_AltRxDescr0_Bits::AFM
uint32 AFM
Destination Address Filter Fail.
Definition: IfxEth.h:192
IfxEth_RxDescr
Normal RX descriptor.
Definition: IfxEth.h:344
IfxEth_TxDescr
Normal TX descriptor.
Definition: IfxEth.h:354
IfxEth_setNanoSecondsUpdateValue
IFX_INLINE void IfxEth_setNanoSecondsUpdateValue(IfxEth *eth, uint8 value)
Sets the time in sub seconds representation, to be initialized or added to the system time...
Definition: IfxEth.h:1582
IfxEth_Config::rxDescr
IfxEth_RxDescrList * rxDescr
pointer to RX descriptor RAM
Definition: IfxEth.h:446
IfxEth_AltTxDescr0_Bits::LOC
uint32 LOC
Loss of Carrier.
Definition: IfxEth.h:221
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEth_setupRmiiOutputPins
IFX_EXTERN void IfxEth_setupRmiiOutputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
set output pin of port
Definition: IfxEth.c:785
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxEth_AltRxDescr1_Bits::RBS2
uint32 RBS2
Receive Buffer 2 Size.
Definition: IfxEth.h:204
IfxEth_ChecksumMode_bypass
Definition: IfxEth.h:106
IfxEth_setSubtractToTimeUpdate
IFX_INLINE void IfxEth_setSubtractToTimeUpdate(IfxEth *eth)
Sets subtraction, the time value is subtracted with the contents of the update register.
Definition: IfxEth.h:1630
IfxEth_getTransmitProcessState
IFX_INLINE IfxEth_TransmitProcessState IfxEth_getTransmitProcessState(IfxEth *eth)
returns the Transmit Process State
Definition: IfxEth.h:1467
IfxEth_RingModeBuffersConfig
Configuration structure for Ring Mode descriptors.
Definition: IfxEth.h:392
IfxEth_enableTimeStampForEthFrames
IFX_INLINE void IfxEth_enableTimeStampForEthFrames(IfxEth *eth)
Enables Processing of PTP over Ethernet Frames.
Definition: IfxEth.h:1361
IfxEth_AltRxDescr0_Bits::LC
uint32 LC
Late Collision.
Definition: IfxEth.h:181
IfxEth_AltRxDescr0_Bits::OE
uint32 OE
Overflow Error.
Definition: IfxEth.h:186
IfxEth_AltRxDescr0_Bits::ES
uint32 ES
Error Summary, ES = PCE | CE | RE | RWT | LC | IPC | OE | DE.
Definition: IfxEth.h:190
IfxEth_RingModeRxBuffersConfig::rxBuffer1Size
uint16 rxBuffer1Size
Size of Rx Buffer 1.
Definition: IfxEth.h:327
IfxEth_ChecksumMode_tcpUdpIcmpSegment
Definition: IfxEth.h:108
IfxEth_AltRxDescr0_Bits::FT
uint32 FT
Frame Type.
Definition: IfxEth.h:180
IfxEth_TransmitProcessState_fetching
Running; Fetching Transmit Transfer Descriptor.
Definition: IfxEth.h:154
IFXETH_MAX_TX_BUFFERS
#define IFXETH_MAX_TX_BUFFERS
Tx buffers (ring mode)
Definition: IfxEth.h:91
IfxEth_clearTuInterrupt
IFX_INLINE void IfxEth_clearTuInterrupt(IfxEth *eth)
Clear Transmit Buffer Unavailable request.
Definition: IfxEth.h:1305
IfxEth_TransmitProcessState_suspended
Suspended; Transmit Descriptor Unavailable or Transmit Buffer Underflow.
Definition: IfxEth.h:159
IfxEth_AltRxDescr0_Bits::SAF
uint32 SAF
Source Address Filter Fail.
Definition: IfxEth.h:188
IfxEth_AltTxDescr0_Bits::CIC
uint32 CIC
Checksum Insertion Control.
Definition: IfxEth.h:231
IfxEth_AltRxDescr0_Bits::DBE
uint32 DBE
Dribble Bit Error.
Definition: IfxEth.h:177
IfxEth_TxDescr_getNext
IFX_INLINE IfxEth_TxDescr * IfxEth_TxDescr_getNext(IfxEth_TxDescr *descr)
Get pointer to next TX descriptor.
Definition: IfxEth.h:1242
IfxEth_getTransmitBuffer
IFX_EXTERN void * IfxEth_getTransmitBuffer(IfxEth *eth)
Get a free transmit buffer.
Definition: IfxEth.c:110
IfxEth_setSecondsUpdateValue
IFX_INLINE void IfxEth_setSecondsUpdateValue(IfxEth *eth, uint8 value)
Sets the time in seconds to be initialized or added to the system time.
Definition: IfxEth.h:1616
IfxEth_TransmitProcessState_closing
Running; Closing Transmit Descriptor.
Definition: IfxEth.h:160
IfxEth_rxDescr
IFX_EXTERN IfxEth_RxDescrList IfxEth_rxDescr
Definition: IfxEth.h:1212
IfxEth_AltTxDescr0_Bits::IHE
uint32 IHE
IP Header Error.
Definition: IfxEth.h:226
IFXCPU_GLB_ADDR_DSPR
#define IFXCPU_GLB_ADDR_DSPR(cpu, address)
Convert local DSPR address to global DSPR address which can be accessed from the SRI bus...
Definition: IfxCpu.h:90
IfxEth_ReceiveProcessState_timestampWrite
TIME_STAMP write state.
Definition: IfxEth.h:136
IfxEth_setTransmitBuffer2RingMode
IFX_INLINE void IfxEth_setTransmitBuffer2RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
Sets the transmit buffer2 of the receive descriptor along with its size.
Definition: IfxEth.h:1644
IfxEth_ChecksumMode
IfxEth_ChecksumMode
Definition: IfxEth.h:104
IfxEth_MiiPins
Port pins for MII mode configuration.
Definition: IfxEth.h:368
IfxEth_AltTxDescr0_Bits::IC
uint32 IC
Interrupt on Completion.
Definition: IfxEth.h:238
IfxEth_Config::descriptorMode
IfxEth_DescriptorMode descriptorMode
Descriptor mode (chain or ring)
Definition: IfxEth.h:448
IfxEth_AltRxDescr0_Bits::LS
uint32 LS
Last Descriptor.
Definition: IfxEth.h:183
IfxEth_AltRxDescr1_Bits
Structure for Alternate/Enhanced RX descriptor DWORD 1 Bit field access.
Definition: IfxEth.h:198
IfxEth_AltRxDescr0_Bits
Structure for Alternate/Enhanced RX descriptor DWORD 0 Bit field access.
Definition: IfxEth.h:173
IfxEth_RxDescr::RDES0
IfxEth_RxDescr0 RDES0
RX descriptor DWORD 0.
Definition: IfxEth.h:346
IfxEth_MiiPins::txClk
IfxEth_Txclk_In * txClk
Pointer to TXCLK input pin config.
Definition: IfxEth.h:372
IfxEth_RingModeTxBuffersConfig::txBuffer2Size
uint16 txBuffer2Size
Size of Tx Buffer 2.
Definition: IfxEth.h:339
IfxEth_MiiPins::rxEr
IfxEth_Rxer_In * rxEr
Pointer to RXER input pin config.
Definition: IfxEth.h:375
IfxEth_TransmitProcessState_reading
Running; Reading Data from host memory buffer and queuing it to transmit buffer (Tx FIFO) ...
Definition: IfxEth.h:156
IfxEth::error
uint32 error
Indicate an error has occurred during execution.
Definition: IfxEth.h:463
IfxEth_RxDescr_setBuffer
IFX_INLINE void IfxEth_RxDescr_setBuffer(IfxEth_RxDescr *descr, void *buffer)
Set buffer of an RX descriptor.
Definition: IfxEth.h:1236
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxEth_sendTransmitBuffersRingMode
IFX_EXTERN void IfxEth_sendTransmitBuffersRingMode(IfxEth *eth, uint16 buffer1Length, uint16 buffer2Length)
Request to send the transmit buffer.
Definition: IfxEth.c:560
IfxEth_AltRxDescr1_Bits::resv1
uint32 resv1
reserved
Definition: IfxEth.h:201
IfxEth_Rxd_In
RXD pin mapping structure.
Definition: IfxEth_PinMap.h:104
IfxEth_AltTxDescr0_Bits::TER
uint32 TER
Transmit End of Ring.
Definition: IfxEth.h:230
IfxEth_RxDescr_getNext
IFX_INLINE IfxEth_RxDescr * IfxEth_RxDescr_getNext(IfxEth_RxDescr *descr)
Get pointer to next RX descriptor.
Definition: IfxEth.h:1224
IFXETH_MAX_RX_BUFFERS
#define IFXETH_MAX_RX_BUFFERS
Rx buffers (ring mode)
Definition: IfxEth.h:85
IfxEth_TxDescr_isAvailable
IFX_INLINE boolean IfxEth_TxDescr_isAvailable(IfxEth_TxDescr *descr)
Return TRUE if a TX descriptor is available for setup.
Definition: IfxEth.h:1248
IfxEth::txDiff
sint32 txDiff
Difference between isrTxCount and txCount.
Definition: IfxEth.h:466
IfxEth_getTimeStampUpdateStatus
IFX_INLINE boolean IfxEth_getTimeStampUpdateStatus(IfxEth *eth)
returns the status of the System Time updation
Definition: IfxEth.h:1460
IFXETH_DESCR_SIZE
#define IFXETH_DESCR_SIZE
4 DWORDS (16 bytes)
Definition: IfxEth.h:96
IfxEth_getReceiveProcessState
IFX_INLINE IfxEth_ReceiveProcessState IfxEth_getReceiveProcessState(IfxEth *eth)
returns the Receive Process State
Definition: IfxEth.h:1426
IfxEth_RxDescrList::items
IfxEth_RxDescr items[IFXETH_MAX_RX_BUFFERS]
Definition: IfxEth.h:419
IfxEth_getBaseTxDescriptor
IFX_INLINE IfxEth_TxDescr * IfxEth_getBaseTxDescriptor(IfxEth *eth)
Get pointer to base TX descriptor.
Definition: IfxEth.h:1407
IfxEth_TxDescr_release
IFX_INLINE void IfxEth_TxDescr_release(IfxEth_TxDescr *descr)
Release a TX descriptor for transmit queue.
Definition: IfxEth.h:1254
IfxEth_clearEriInterrupt
IFX_INLINE void IfxEth_clearEriInterrupt(IfxEth *eth)
Clear Early Receive Interrupt request.
Definition: IfxEth.h:1285
IfxEth_TxDescr::TDES1
IfxEth_TxDescr1 TDES1
TX descriptor DWORD 1.
Definition: IfxEth.h:357
IfxEth_RingModeBuffersConfig::txConfig
IfxEth_RingModeTxBuffersConfig txConfig
Transmit buffers ring mode config.
Definition: IfxEth.h:394
IfxEth_getMacAddressPointer
IFX_INLINE void * IfxEth_getMacAddressPointer(IfxEth *eth)
Returns pointer to the MAC address configured for this ETH.
Definition: IfxEth.h:1420
IfxEth_setupChecksumEngine
IFX_EXTERN void IfxEth_setupChecksumEngine(IfxEth *eth, IfxEth_ChecksumMode mode)
Set up checksum Engine.
Definition: IfxEth.c:607
IfxEth_RxDescr0::U
uint32 U
Unsigned long access.
Definition: IfxEth.h:261
IfxEth_AltRxDescr1_Bits::RCH
uint32 RCH
Second Address Chained.
Definition: IfxEth.h:202
boolean
unsigned char boolean
Definition: Platform_Types.h:104
IfxEth_ReceiveProcessState_fetching
Running: Fetching Receive Transfer Descriptor.
Definition: IfxEth.h:131
IfxEth_setupMiiInputPins
IFX_EXTERN void IfxEth_setupMiiInputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins)
Set up MII mode input pins.
Definition: IfxEth.c:628
IfxEth_Config::miiPins
IFX_CONST IfxEth_MiiPins * miiPins
Pointer to port pins configuration of MII mode.
Definition: IfxEth.h:442
IfxEth_MiiPins::txd0
IfxEth_Txd_Out * txd0
Pointer to TXD0 output pin config.
Definition: IfxEth.h:382
IfxEth::pTxDescr
IfxEth_TxDescr * pTxDescr
Definition: IfxEth.h:473
IfxEth_RxDescrList
Definition: IfxEth.h:417
IfxEth_RingModeRxBuffersConfig::rxBuffer1StartAddress
uint32 rxBuffer1StartAddress
Start address of Rx Buffer 1.
Definition: IfxEth.h:325
IfxCpu.h
CPU basic functionality.
IfxEth_Config::macAddress
uint8 macAddress[6]
MAC address for the ethernet, should be unique in the network.
Definition: IfxEth.h:437
IfxEth_TxDescrList::items
IfxEth_TxDescr items[IFXETH_MAX_TX_BUFFERS]
Definition: IfxEth.h:425
IfxEth_TxDescr::TDES3
IfxEth_TxDescr3 TDES3
TX descriptor DWORD 3.
Definition: IfxEth.h:359
IfxEth_isRxInterrupt
IFX_INLINE boolean IfxEth_isRxInterrupt(IfxEth *eth)
Checks whether receive interrupt is requested.
Definition: IfxEth.h:1524
IfxEth_enableMmcCounter
IFX_INLINE void IfxEth_enableMmcCounter(IfxEth *eth)
Enables theMMC counter.
Definition: IfxEth.h:1333
IfxEth_AltRxDescr1_Bits::RBS1
uint32 RBS1
Receive Buffer 1 Size.
Definition: IfxEth.h:200
IfxEth_cfg.h
ETH on-chip implementation data.
IfxEth_ReceiveProcessState_reset
Stopped: Reset or Stop Receive Command issued.
Definition: IfxEth.h:130
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxEth_AltRxDescr1_Bits::DIC
uint32 DIC
Disable Interrupt on Completion.
Definition: IfxEth.h:206
IfxEth_RxDescr0::A
IfxEth_AltRxDescr0_Bits A
Structure for RX descriptor DWORD 0 Bit field access.
Definition: IfxEth.h:260
IfxEth_setReceiveDescriptorAddress
IFX_INLINE void IfxEth_setReceiveDescriptorAddress(Ifx_ETH *eth, void *address)
Sets receive descriptor address.
Definition: IfxEth.h:1610
IfxEth_setAndSendTransmitBuffer
IFX_EXTERN void IfxEth_setAndSendTransmitBuffer(IfxEth *eth, void *buffer, uint16 len)
Definition: IfxEth.c:583
IfxEth_readAllFlags
IFX_INLINE void IfxEth_readAllFlags(IfxEth *eth)
reads the status of all flags
Definition: IfxEth.h:1555
IfxEth_AltTxDescr0_Bits::PCE
uint32 PCE
Payload Checksum Error.
Definition: IfxEth.h:222
IfxEth_setMacAddress
IFX_EXTERN void IfxEth_setMacAddress(IfxEth *eth, const uint8 *macAddress)
Sets the MAC address.
Definition: IfxEth.c:590
IfxEth_AltRxDescr0_Bits::ext
uint32 ext
Extended Status Available/Rx MAC Address.
Definition: IfxEth.h:175
IfxEth_disableModule
IFX_EXTERN void IfxEth_disableModule(void)
Disable ETH Module.
Definition: IfxEth.c:64
IfxEth_startTransmitter
IFX_EXTERN void IfxEth_startTransmitter(IfxEth *eth)
Start the transmitter functions.
Definition: IfxEth.c:864
IfxEth::status
Ifx_ETH_STATUS status
Intermediate variable to use register content in control structure.
Definition: IfxEth.h:460
IfxEth_AltRxDescr0_Bits::IPC
uint32 IPC
IPC Checksum Error/Giant Frame.
Definition: IfxEth.h:182
IfxEth_AltRxDescr0_Bits::OWN
uint32 OWN
Own Bit, 1 = own by DMA.
Definition: IfxEth.h:193
IfxEth_Mdc_Out
MDC pin mapping structure.
Definition: IfxEth_PinMap.h:120
IfxEth_RxDescr0
Union for RX descriptor DWORD 0.
Definition: IfxEth.h:258
IfxEth_RxDescr1
Union for RX descriptor DWORD 1.
Definition: IfxEth.h:266
IfxEth_RxDescr2
Union for RX descriptor DWORD 2.
Definition: IfxEth.h:274
IfxEth_RxDescr3
Union for RX descriptor DWORD 3.
Definition: IfxEth.h:281
IfxEth_enableTimeStampForAllFrames
IFX_INLINE void IfxEth_enableTimeStampForAllFrames(IfxEth *eth)
Enables the TimeStamp for All frames.
Definition: IfxEth.h:1354
IfxEth_AltTxDescr0_Bits::DC
uint32 DC
Disable CRC.
Definition: IfxEth.h:235
IfxEth_wakeupReceiver
IFX_EXTERN void IfxEth_wakeupReceiver(IfxEth *eth)
Wakeup the receiver functions.
Definition: IfxEth.c:894
IfxEth_MiiPins::mdio
IfxEth_Mdio_InOut * mdio
Pointer to MDIO pin config.
Definition: IfxEth.h:387
sint32
long sint32
Definition: Platform_Types.h:134
IfxEth_AltRxDescr1_Bits::RER
uint32 RER
Receive End of Ring.
Definition: IfxEth.h:203
IfxEth_initConfig
IFX_EXTERN void IfxEth_initConfig(IfxEth_Config *config, Ifx_ETH *ethSfr)
Initialises the configuration Structure.
Definition: IfxEth.c:263
IfxEth_txBuffer
IFX_EXTERN uint8 IfxEth_txBuffer[IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]
Transmit buffers.
Definition: IfxEth.h:1216
IfxEth_AltTxDescr1_Bits::TBS1
uint32 TBS1
Transmit Buffer 1 Size.
Definition: IfxEth.h:246
IfxEth_RmiiPins::refClk
IfxEth_Refclk_In * refClk
Pointer to REFCLK input pin config.
Definition: IfxEth.h:403
IfxEth_Crsdv_In
CRSDV pin mapping structure.
Definition: IfxEth_PinMap.h:64
IfxEth_sendTransmitBuffer
IFX_EXTERN void IfxEth_sendTransmitBuffer(IfxEth *eth, uint16 len)
Request to send the transmit buffer.
Definition: IfxEth.c:546
IfxEth_AltTxDescr0_Bits::TTSE
uint32 TTSE
Transmit Time Stamp Enable.
Definition: IfxEth.h:233
IfxEth_Refclk_In
REFCLK pin mapping structure.
Definition: IfxEth_PinMap.h:80
IfxEth_AltTxDescr0_Bits::DP
uint32 DP
Disable Padding.
Definition: IfxEth.h:234
IfxEth_AltTxDescr1_Bits::TBS2
uint32 TBS2
Transmit Buffer 2 Size.
Definition: IfxEth.h:248
IfxEth_MiiPins::rxd1
IfxEth_Rxd_In * rxd1
Pointer to RXD1 input pin config.
Definition: IfxEth.h:377
IfxEth::rxDiff
sint32 rxDiff
Difference between isrRxCount and rxCount.
Definition: IfxEth.h:467
IfxEth_Rxdv_In
RXDV pin mapping structure.
Definition: IfxEth_PinMap.h:72
IfxEth_enableModule
IFX_EXTERN void IfxEth_enableModule(void)
Enable ETH Module.
Definition: IfxEth.c:73
IfxEth_Config::ringModeBuffersConfig
IfxEth_RingModeBuffersConfig ringModeBuffersConfig
Ring mode buffers condiguration.
Definition: IfxEth.h:449
IfxEth_RingModeBufferUsed_buffer1
Buffer 1 used.
Definition: IfxEth.h:144
IfxEth_disableTimeStampForIpv4Frames
IFX_INLINE void IfxEth_disableTimeStampForIpv4Frames(IfxEth *eth)
Disables Processing of PTP frames sent over IPV4 UDP.
Definition: IfxEth.h:1326
IfxEth_PhyInterfaceMode
IfxEth_PhyInterfaceMode
External Phy Interface RMII Mode.
Definition: IfxEth.h:120
IfxEth_ReceiveProcessState_closing
Running: Closing Receive Descriptor.
Definition: IfxEth.h:135
IfxEth_clearTxInterrupt
IFX_INLINE void IfxEth_clearTxInterrupt(IfxEth *eth)
Clear transmit interrupt request.
Definition: IfxEth.h:1312
IfxCpu_getCoreId
IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu&#39;s may not be continguous and...
Definition: IfxCpu.h:770
IfxEth_MiiPins::rxDv
IfxEth_Rxdv_In * rxDv
Pointer to RXDV input pin config.
Definition: IfxEth.h:374
IfxEth_MiiPins::rxd3
IfxEth_Rxd_In * rxd3
Pointer to RXD3 input pin config.
Definition: IfxEth.h:379
IfxEth_stopReceiver
IFX_EXTERN void IfxEth_stopReceiver(IfxEth *eth)
Stops the receiver functions.
Definition: IfxEth.c:874
IfxEth_getBaseRxDescriptor
IFX_INLINE IfxEth_RxDescr * IfxEth_getBaseRxDescriptor(IfxEth *eth)
Get pointer to base RX descriptor.
Definition: IfxEth.h:1401
IfxEth_TxDescr0::A
IfxEth_AltTxDescr0_Bits A
Structure for TX descriptor DWORD 0 Bit field access.
Definition: IfxEth.h:290
IfxEth_Txclk_In
TXCLK pin mapping structure.
Definition: IfxEth_PinMap.h:96
IfxEth_AltTxDescr0_Bits::TTSS
uint32 TTSS
Transmit Time Stamp Status.
Definition: IfxEth.h:227
IfxEth_setTransmitBuffer1RingMode
IFX_INLINE void IfxEth_setTransmitBuffer1RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
Sets the transmit buffer1 of the receive descriptor along with its size.
Definition: IfxEth.h:1637
IfxEth_Config::rmiiPins
IFX_CONST IfxEth_RmiiPins * rmiiPins
Pointer to port pins configuration of RMII mode.
Definition: IfxEth.h:441
IfxEth_setReceiveBuffer1RingMode
IFX_INLINE void IfxEth_setReceiveBuffer1RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
Sets the receive buffer1 of the receive descriptor along with its size.
Definition: IfxEth.h:1596
IfxEth_getRxDataLength
IFX_INLINE uint16 IfxEth_getRxDataLength(IfxEth *eth)
Returns length of the oldest available RX data.
Definition: IfxEth.h:1433
IfxEth::rxCount
uint32 rxCount
Number of frames received.
Definition: IfxEth.h:461
IfxEth_freeReceiveBuffer
IFX_EXTERN void IfxEth_freeReceiveBuffer(IfxEth *eth)
Free the receive buffer, enabling it for the further reception.
Definition: IfxEth.c:84
IfxEth_AltTxDescr0_Bits::FF
uint32 FF
Frame Flushed.
Definition: IfxEth.h:223
IfxEth_ReceiveProcessState_waiting
Running: Waiting for receive packet.
Definition: IfxEth.h:133
IfxEth_getActualRxIndex
IFX_INLINE uint32 IfxEth_getActualRxIndex(IfxEth *eth)
Definition: IfxEth.h:1388
IfxEth_Config::phyLink
boolean(* phyLink)(void)
Pointer to the transceiver link function.
Definition: IfxEth.h:439
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxEth_wakeupTransmitter
IFX_EXTERN void IfxEth_wakeupTransmitter(IfxEth *eth)
Wakeup the transmitter functions.
Definition: IfxEth.c:911
IfxEth_TxDescr0
Union for TX descriptor DWORD 0.
Definition: IfxEth.h:288
IfxEth_TxDescr1
Union for TX descriptor DWORD 1.
Definition: IfxEth.h:296
IfxEth_TxDescr2
Union for TX descriptor DWORD 2.
Definition: IfxEth.h:304
IfxEth_TxDescr3
Union for TX descriptor DWORD 3.
Definition: IfxEth.h:311
IfxEth_RmiiPins
Port pins for RMII mode configuration.
Definition: IfxEth.h:400
IfxEth_RingModeRxBuffersConfig::rxBuffer2Size
uint16 rxBuffer2Size
Size of Rx Buffer 2.
Definition: IfxEth.h:328
IfxEth_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider.
Definition: IfxEth.h:444
IfxEth_AltRxDescr0_Bits::FS
uint32 FS
First Descriptor.
Definition: IfxEth.h:184
IfxEth::config
IfxEth_Config config
Copy of the configuration passed through IfxEth_init()
Definition: IfxEth.h:469
IfxEth_TxDescr_setup
IFX_INLINE void IfxEth_TxDescr_setup(IfxEth_TxDescr *descr, uint16 length, boolean firstSegment, boolean lastSegment)
Setup some properties of a TX descriptor.
Definition: IfxEth.h:1266
IfxEth_initTransmitDescriptorsRingMode
IFX_EXTERN void IfxEth_initTransmitDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeTxBuffersConfig *config)
Initialises transmit descriptors.
Definition: IfxEth.c:455
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxEth_isRxDataAvailable
IFX_INLINE boolean IfxEth_isRxDataAvailable(IfxEth *eth)
Checks whether one or more RX data is available.
Definition: IfxEth.h:1517
IfxEth_RingModeTxBuffersConfig::txBuffer2StartAddress
uint32 txBuffer2StartAddress
Start address of Tx Buffer 2.
Definition: IfxEth.h:337
IfxEth::isrRxCount
sint32 isrRxCount
Count of RX ISR.
Definition: IfxEth.h:464
IfxEth_Crs_In
CRS pin mapping structure.
Definition: IfxEth_PinMap.h:56
IfxEth_initReceiveDescriptors
IFX_EXTERN void IfxEth_initReceiveDescriptors(IfxEth *eth)
Initialises the receive descriptors.
Definition: IfxEth.c:301
IfxEth_RingModeBufferUsed_buffer2
Buffer 2 used.
Definition: IfxEth.h:145
IfxEth_AltRxDescr0_Bits::FL
uint32 FL
Frame Length.
Definition: IfxEth.h:191
IfxEth_stopTransmitter
IFX_EXTERN void IfxEth_stopTransmitter(IfxEth *eth)
Stop the transmitter functions.
Definition: IfxEth.c:884
IfxEth_TransmitProcessState
IfxEth_TransmitProcessState
indicates the Transmit DMA FSM state
Definition: IfxEth.h:151
IfxEth_TxDescrList
Definition: IfxEth.h:423
IfxEth_Config::phyInterfaceMode
IfxEth_PhyInterfaceMode phyInterfaceMode
Phy Interface mode.
Definition: IfxEth.h:440
IfxEth_setSubSecondIncrementValue
IFX_INLINE void IfxEth_setSubSecondIncrementValue(IfxEth *eth, uint8 value)
Sets the Sub Second Increment Value.
Definition: IfxEth.h:1623
IfxEth_getTimeStampInitialiseStatus
IFX_INLINE boolean IfxEth_getTimeStampInitialiseStatus(IfxEth *eth)
returns the status of the TimeStamp Initialisation
Definition: IfxEth.h:1453
IfxEth_RmiiPins::crsDiv
IfxEth_Crsdv_In * crsDiv
pointer to CRSDIV input pin config
Definition: IfxEth.h:402
IfxEth_ChecksumMode_ipv4
Definition: IfxEth.h:107
IfxEth_RxDescr::RDES2
IfxEth_RxDescr2 RDES2
RX descriptor DWORD 2.
Definition: IfxEth.h:348
IfxEth_clearMacConfiguration
IFX_INLINE void IfxEth_clearMacConfiguration(void)
resets Ethernet Configuration register
Definition: IfxEth.h:1292
IfxEth_ChecksumMode_tcpUdpIcmpFull
Definition: IfxEth.h:109
IfxEth_shuffleRxDescriptor
IFX_EXTERN void IfxEth_shuffleRxDescriptor(IfxEth *eth)
Shuffle to next RX descriptor.
Definition: IfxEth.c:819
IfxEth_AltTxDescr1_Bits::resv2
uint32 resv2
(reserved)
Definition: IfxEth.h:249


iLLD_TC26B: IfxEth_Phy_Pef7071.c Source File

  • Eth
  • Phy_Pef7071
IfxEth_Phy_Pef7071.c
Go to the documentation of this file.
1 /**
2 * \file IfxEth_Phy_Pef7071.c
3 * \brief ETH PHY_PEF7071 details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxEth_Phy_Pef7071.h"
47
48 /******************************************************************************/
49 /*----------------------------------Macros------------------------------------*/
50 /******************************************************************************/
51
52 #define IFXETH_PHY_PEF7071_MDIO_CTRL 0x00
53
54 #define IFXETH_PHY_PEF7071_MDIO_STAT 0x01
55
56 #define IFXETH_PHY_PEF7071_MDIO_PHYID1 0x02
57
58 #define IFXETH_PHY_PEF7071_MDIO_PHYID2 0x03
59
60 #define IFXETH_PHY_PEF7071_MDIO_AN_ADV 0x04
61
62 #define IFXETH_PHY_PEF7071_MDIO_AN_LPA 0x05
63
64 #define IFXETH_PHY_PEF7071_MDIO_AN_EXP 0x06
65
66 #define IFXETH_PHY_PEF7071_MDIO_AN_NPTX 0x07
67
68 #define IFXETH_PHY_PEF7071_MDIO_AN_NPRX 0x08
69
70 #define IFXETH_PHY_PEF7071_MDIO_GCTRL 0x09
71
72 #define IFXETH_PHY_PEF7071_MDIO_GSTAT 0x0A
73
74 #define IFXETH_PHY_PEF7071_MDIO_RES11 0x0B
75
76 #define IFXETH_PHY_PEF7071_MDIO_RES12 0x0C
77
78 #define IFXETH_PHY_PEF7071_MDIO_MMDCTRL 0x0D
79
80 #define IFXETH_PHY_PEF7071_MDIO_MMDDATA 0x0E
81
82 #define IFXETH_PHY_PEF7071_MDIO_XSTAT 0x0F
83
84 #define IFXETH_PHY_PEF7071_MDIO_PHYPERF 0x10
85
86 #define IFXETH_PHY_PEF7071_MDIO_PHYSTAT1 0x11
87
88 #define IFXETH_PHY_PEF7071_MDIO_PHYSTAT2 0x12
89
90 #define IFXETH_PHY_PEF7071_MDIO_PHYCTL1 0x13
91
92 #define IFXETH_PHY_PEF7071_MDIO_PHYCTL2 0x14
93
94 #define IFXETH_PHY_PEF7071_MDIO_ERRCNT 0x15
95
96 #define IFXETH_PHY_PEF7071_MDIO_EECTRL 0x16
97
98 #define IFXETH_PHY_PEF7071_MDIO_MIICTRL 0x17
99
100 #define IFXETH_PHY_PEF7071_MDIO_MIISTAT 0x18
101
102 #define IFXETH_PHY_PEF7071_MDIO_IMASK 0x19
103
104 #define IFXETH_PHY_PEF7071_MDIO_ISTAT 0x1A
105
106 #define IFXETH_PHY_PEF7071_MDIO_LED 0x1B
107
108 #define IFXETH_PHY_PEF7071_MDIO_TPGCTRL 0x1C
109
110 #define IFXETH_PHY_PEF7071_MDIO_TPGDATA 0x1D
111
112 #define IFXETH_PHY_PEF7071_MDIO_FWV 0x1E
113
114 #define IFXETH_PHY_PEF7071_MDIO_RES1F 0x1F
115
116 #define IFXETH_PHY_PEF7071_WAIT_GMII_READY() while (ETH_GMII_ADDRESS.B.GB) {}
117
118 /** \brief Access type for indirectly accessing Address Type of MMD register in PHY
119 */
120 #define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR 0x00
121
122 /** \brief Access type for indirectly accessing Data Type of MMD register in PHY
123 */
124 #define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA 0x4000
125
126 /** \brief Access type for indirectly accessing Data Type with post increment of MMD register in PHY
127 */
128 #define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA_PI 0x8000
129
130 /******************************************************************************/
131 /*-----------------------Exported Variables/Constants-------------------------*/
132 /******************************************************************************/
133
134 uint32 IfxEth_Phy_Pef7071_iPhyInitDone = 0;
135
136 /******************************************************************************/
137 /*-------------------------Function Implementations---------------------------*/
138 /******************************************************************************/
139
140 uint32 IfxEth_Phy_Pef7071_init(void)
141 {
142 IFXETH_PHY_PEF7071_WAIT_GMII_READY();
143
144 /* // read once all PHY registers
145 * int i;
146 * for(i = 0; i < 31; i++)
147 * {
148 * uint32 value;
149 * read_mdio_reg(0, i, &value);
150 * } */
151
152 // reset PHY
153 IfxEth_Phy_Pef7071_write_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_CTRL, 0x8000); // reset
154 uint32 value;
155
156 do
157 {
158 IfxEth_Phy_Pef7071_read_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_CTRL, &value);
159 } while (value & 0x8000); // wait for reset to finish
160
161 // setup PHY
162 IfxEth_Phy_Pef7071_write_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_MIICTRL, 0xF702); // skew adaptation is needed, RMII mode (10/100MBit)
163 IfxEth_Phy_Pef7071_write_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_GCTRL, 0x0000); // advertise no 1000BASE-T (full/half duplex)
164 IfxEth_Phy_Pef7071_write_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_AN_ADV, 0x0101); // advertise 100BASE-TX full duplex only
165 IfxEth_Phy_Pef7071_write_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_CTRL, 0x1200); // enable auto-negotiation, restart auto-negotiation
166
167 // we set our loop mode (RJ45) in side the PHY (PHYCTL1 register) if we will have a loop
168 // if (CONFIG_ETH._loop)
169 // write_mdio_reg (0, 0x13, (0x4 << 13) | 0x1);
170
171 // done
172 IfxEth_Phy_Pef7071_iPhyInitDone = 1;
173
174 return 1;
175 }
176
177
178 boolean IfxEth_Phy_Pef7071_link(void)
179 {
180 boolean linkEstablished = FALSE;
181
182 if (IfxEth_Phy_Pef7071_iPhyInitDone)
183 {
184 uint32 value;
185 IfxEth_Phy_Pef7071_read_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_STAT, &value);
186 linkEstablished = ((value & (1 << 2)) != 0) ? TRUE : FALSE;
187 }
188
189 return linkEstablished;
190 }
191
192
193 void IfxEth_Phy_Pef7071_read_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 *pdata)
194 {
195 // 5bit Physical Layer Adddress, 5bit GMII Regnr, 4bit csrclock divider, Read, Busy
196 ETH_GMII_ADDRESS.U = (layeraddr << 11) | (regaddr << 6) | (0 << 2) | (0 << 1) | (1 << 0);
197
198 IFXETH_PHY_PEF7071_WAIT_GMII_READY();
199
200 // get data
201 *pdata = ETH_GMII_DATA.U;
202 }
203
204
205 void IfxEth_Phy_Pef7071_write_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 data)
206 {
207 // put data
208 ETH_GMII_DATA.U = data;
209
210 // 5bit Physical Layer Adddress, 5bit GMII Regnr, 4bit csrclock divider, Write, Busy
211 ETH_GMII_ADDRESS.U = (layeraddr << 11) | (regaddr << 6) | (0 << 2) | (1 << 1) | (1 << 0);
212
213 IFXETH_PHY_PEF7071_WAIT_GMII_READY();
214 }
215
216
217 void IfxEth_Phy_Pef7071_write_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
218 {
219 /* Select access type as ADDR for MMD access and select the Device address */
220 IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDCTRL, IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR | devaddr);
221 /* Select PHY register for write operation */
222 IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDDATA, regaddr);
223 /* select the DATA operation and device address */
224 IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDCTRL, IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA | devaddr);
225 /* Write the data */
226 IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDDATA, data);
227 }
228
229
230 void IfxEth_Phy_Pef7071_read_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
231 {
232 /* Select access type as ADDR for MMD access and select the Device address */
233 IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDCTRL, IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR | devaddr);
234 /* Select PHY register for read operation */
235 IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDDATA, regaddr);
236 /* select the DATA operation and device address */
237 IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDCTRL, IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA | devaddr);
238 /* Read the data */
239 IfxEth_Phy_Pef7071_read_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDDATA, &data);
240 }
IFXETH_PHY_PEF7071_MDIO_GCTRL
#define IFXETH_PHY_PEF7071_MDIO_GCTRL
Definition: IfxEth_Phy_Pef7071.c:70
IfxEth_Phy_Pef7071_link
boolean IfxEth_Phy_Pef7071_link(void)
Definition: IfxEth_Phy_Pef7071.c:178
IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA
#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA
Access type for indirectly accessing Data Type of MMD register in PHY.
Definition: IfxEth_Phy_Pef7071.c:124
IfxEth_Phy_Pef7071.h
ETH PHY_PEF7071 details.
IfxEth_Phy_Pef7071_iPhyInitDone
uint32 IfxEth_Phy_Pef7071_iPhyInitDone
Definition: IfxEth_Phy_Pef7071.c:134
IFXETH_PHY_PEF7071_MDIO_MMDDATA
#define IFXETH_PHY_PEF7071_MDIO_MMDDATA
Definition: IfxEth_Phy_Pef7071.c:80
uint32
unsigned long uint32
Definition: Platform_Types.h:116
FALSE
#define FALSE
Definition: Platform_Types.h:93
IFXETH_PHY_PEF7071_MDIO_MIICTRL
#define IFXETH_PHY_PEF7071_MDIO_MIICTRL
Definition: IfxEth_Phy_Pef7071.c:98
IfxEth_Phy_Pef7071_write_mdio_reg
void IfxEth_Phy_Pef7071_write_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 data)
Definition: IfxEth_Phy_Pef7071.c:205
IFXETH_PHY_PEF7071_MDIO_MMDCTRL
#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL
Definition: IfxEth_Phy_Pef7071.c:78
IfxEth_Phy_Pef7071_read_mmd_indirect
void IfxEth_Phy_Pef7071_read_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Read data from MMD register of PHY.
Definition: IfxEth_Phy_Pef7071.c:230
IfxEth_Phy_Pef7071_write_mmd_indirect
void IfxEth_Phy_Pef7071_write_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Write the data into the MMD register of PHY.
Definition: IfxEth_Phy_Pef7071.c:217
IFXETH_PHY_PEF7071_MDIO_STAT
#define IFXETH_PHY_PEF7071_MDIO_STAT
Definition: IfxEth_Phy_Pef7071.c:54
IFXETH_PHY_PEF7071_MDIO_CTRL
#define IFXETH_PHY_PEF7071_MDIO_CTRL
Definition: IfxEth_Phy_Pef7071.c:52
IfxEth_Phy_Pef7071_read_mdio_reg
void IfxEth_Phy_Pef7071_read_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 *pdata)
Definition: IfxEth_Phy_Pef7071.c:193
IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR
#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR
Access type for indirectly accessing Address Type of MMD register in PHY.
Definition: IfxEth_Phy_Pef7071.c:120
IfxEth_Phy_Pef7071_init
uint32 IfxEth_Phy_Pef7071_init(void)
Definition: IfxEth_Phy_Pef7071.c:140
TRUE
#define TRUE
Definition: Platform_Types.h:90
IFXETH_PHY_PEF7071_WAIT_GMII_READY
#define IFXETH_PHY_PEF7071_WAIT_GMII_READY()
Definition: IfxEth_Phy_Pef7071.c:116
IFXETH_PHY_PEF7071_MDIO_AN_ADV
#define IFXETH_PHY_PEF7071_MDIO_AN_ADV
Definition: IfxEth_Phy_Pef7071.c:60


iLLD_TC26B: IfxEth_Phy_Pef7071.h Source File

  • Eth
  • Phy_Pef7071
IfxEth_Phy_Pef7071.h
Go to the documentation of this file.
1 /**
2 * \file IfxEth_Phy_Pef7071.h
3 * \brief ETH PHY_PEF7071 details
4 * \ingroup IfxLld_Eth
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Eth_Phy_Pef7071 PHY_PEF7071
42 * \ingroup IfxLld_Eth
43 * \defgroup IfxLld_Eth_Phy_Pef7071_Functions Functions
44 * \ingroup IfxLld_Eth_Phy_Pef7071
45 */
46
47 #ifndef IFXETH_PHY_PEF7071_H
48 #define IFXETH_PHY_PEF7071_H 1
49
50 /******************************************************************************/
51 /*----------------------------------Includes----------------------------------*/
52 /******************************************************************************/
53
54 #include "Eth/Std/IfxEth.h"
55 /** \addtogroup IfxLld_Eth_Phy_Pef7071_Functions
56 * \{ */
57
58 /******************************************************************************/
59 /*-------------------------Global Function Prototypes-------------------------*/
60 /******************************************************************************/
61
62 /**
63 * \return Status
64 */
65 IFX_EXTERN uint32 IfxEth_Phy_Pef7071_init(void);
66
67 /**
68 * \return Link status
69 */
70 IFX_EXTERN boolean IfxEth_Phy_Pef7071_link(void);
71
72 /**
73 * \return None
74 */
75 IFX_EXTERN void IfxEth_Phy_Pef7071_read_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 *pdata);
76
77 /**
78 * \return None
79 */
80 IFX_EXTERN void IfxEth_Phy_Pef7071_write_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 data);
81
82 /** \brief Write the data into the MMD register of PHY
83 * \param layeraddr physical layer address
84 * \param devaddr Device address in PHY
85 * \param regaddr Register address in PHY
86 * \param data Data to be written
87 * \return None
88 */
89 IFX_EXTERN void IfxEth_Phy_Pef7071_write_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data);
90
91 /** \brief Read data from MMD register of PHY
92 * \param layeraddr physical layer address
93 * \param devaddr Device address in PHY
94 * \param regaddr Register address in PHY
95 * \param data Data from PHY register
96 * \return None
97 */
98 IFX_EXTERN void IfxEth_Phy_Pef7071_read_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data);
99
100 /** \} */
101
102 /******************************************************************************/
103 /*-------------------Global Exported Variables/Constants----------------------*/
104 /******************************************************************************/
105
106 IFX_EXTERN uint32 IfxEth_Phy_Pef7071_iPhyInitDone;
107
108 #endif /* IFXETH_PHY_PEF7071_H */
IfxEth_Phy_Pef7071_link
IFX_EXTERN boolean IfxEth_Phy_Pef7071_link(void)
Definition: IfxEth_Phy_Pef7071.c:178
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxEth_Phy_Pef7071_iPhyInitDone
IFX_EXTERN uint32 IfxEth_Phy_Pef7071_iPhyInitDone
Definition: IfxEth_Phy_Pef7071.h:106
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEth_Phy_Pef7071_write_mdio_reg
IFX_EXTERN void IfxEth_Phy_Pef7071_write_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 data)
Definition: IfxEth_Phy_Pef7071.c:205
IfxEth_Phy_Pef7071_read_mmd_indirect
IFX_EXTERN void IfxEth_Phy_Pef7071_read_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Read data from MMD register of PHY.
Definition: IfxEth_Phy_Pef7071.c:230
IfxEth_Phy_Pef7071_write_mmd_indirect
IFX_EXTERN void IfxEth_Phy_Pef7071_write_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Write the data into the MMD register of PHY.
Definition: IfxEth_Phy_Pef7071.c:217
IfxEth.h
ETH basic functionality.
IfxEth_Phy_Pef7071_read_mdio_reg
IFX_EXTERN void IfxEth_Phy_Pef7071_read_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 *pdata)
Definition: IfxEth_Phy_Pef7071.c:193
IfxEth_Phy_Pef7071_init
IFX_EXTERN uint32 IfxEth_Phy_Pef7071_init(void)
Definition: IfxEth_Phy_Pef7071.c:140


iLLD_TC26B: IfxEth_PinMap.c Source File

  • _PinMap
IfxEth_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxEth_PinMap.c
3 * \brief ETH I/O map
4 * \ingroup IfxLld_Eth
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxEth_PinMap.h"
44
45 IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN = {&MODULE_ETH, {&MODULE_P11,11}, Ifx_RxSel_a};
46 IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT = {&MODULE_ETH, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt6};
47 IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT = {&MODULE_ETH, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt6};
48 IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT = {&MODULE_ETH, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt5};
49 IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT = {&MODULE_ETH, {&MODULE_P00, 0}, Ifx_RxSel_a, IfxPort_OutputIdx_alt1};
50 IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT = {&MODULE_ETH, {&MODULE_P21, 3}, Ifx_RxSel_d, IfxPort_OutputIdx_alt1};
51 IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT = {&MODULE_ETH, {&MODULE_P21, 1}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6};
52 IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_a};
53 IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_a};
54 IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN = {&MODULE_ETH, {&MODULE_P11,10}, Ifx_RxSel_a};
55 IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN = {&MODULE_ETH, {&MODULE_P11, 9}, Ifx_RxSel_a};
56 IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN = {&MODULE_ETH, {&MODULE_P21, 7}, Ifx_RxSel_b};
57 IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_b};
58 IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT = {&MODULE_ETH, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt6};
59 IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT = {&MODULE_ETH, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt6};
60 IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT = {&MODULE_ETH, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt6};
61
62
63 const IfxEth_Crsdv_In *IfxEth_Crsdv_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS] = {
64 {
65 &IfxEth_CRSDVA_P11_11_IN
66 }
67 };
68
69 const IfxEth_Mdc_Out *IfxEth_Mdc_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS] = {
70 {
71 &IfxEth_MDC_P02_8_OUT,
72 &IfxEth_MDC_P21_0_OUT,
73 &IfxEth_MDC_P21_2_OUT
74 }
75 };
76
77 const IfxEth_Mdio_InOut *IfxEth_Mdio_InOut_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS] = {
78 {
79 NULL_PTR,
80 &IfxEth_MDIOA_P00_0_INOUT,
81 NULL_PTR,
82 NULL_PTR,
83 NULL_PTR,
84 NULL_PTR,
85 &IfxEth_MDIO_P21_1_INOUT
86 }
87 };
88
89 const IfxEth_Refclk_In *IfxEth_Refclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS] = {
90 {
91 &IfxEth_REFCLK_P11_12_IN
92 }
93 };
94
95 const IfxEth_Rxclk_In *IfxEth_Rxclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS] = {
96 {
97 &IfxEth_RXCLKA_P11_12_IN
98 }
99 };
100
101 const IfxEth_Rxd_In *IfxEth_Rxd_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS] = {
102 {
103 &IfxEth_RXD1_P11_9_IN
104 }
105 };
106
107 const IfxEth_Rxer_In *IfxEth_Rxer_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS] = {
108 {
109 NULL_PTR,
110 &IfxEth_RXERB_P21_7_IN
111 }
112 };
113
114 const IfxEth_Txclk_In *IfxEth_Txclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS] = {
115 {
116 NULL_PTR,
117 &IfxEth_TXCLKB_P11_12_IN
118 }
119 };
120
121 const IfxEth_Txd_Out *IfxEth_Txd_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS] = {
122 {
123 &IfxEth_TXD1_P11_2_OUT,
124 &IfxEth_TXD0_P11_3_OUT
125 }
126 };
127
128 const IfxEth_Txen_Out *IfxEth_Txen_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS] = {
129 {
130 &IfxEth_TXEN_P11_6_OUT
131 }
132 };
IfxEth_Txd_Out
TXD pin mapping structure.
Definition: IfxEth_PinMap.h:137
IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS
#define IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:191
IfxEth_Rxclk_In
RXCLK pin mapping structure.
Definition: IfxEth_PinMap.h:88
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxEth_Rxd_In_pinTable
const IfxEth_Rxd_In * IfxEth_Rxd_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS]
Definition: IfxEth_PinMap.c:101
IfxEth_MDC_P21_0_OUT
IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT
Definition: IfxEth_PinMap.c:47
IfxEth_Mdio_InOut_pinTable
const IfxEth_Mdio_InOut * IfxEth_Mdio_InOut_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
Definition: IfxEth_PinMap.c:77
IfxEth_CRSDVA_P11_11_IN
IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN
Definition: IfxEth_PinMap.c:45
IfxEth_RXD1_P11_9_IN
IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN
Definition: IfxEth_PinMap.c:55
IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS
#define IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:187
IfxEth_MDIOD_P21_3_INOUT
IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT
Definition: IfxEth_PinMap.c:50
IfxEth_RXCLKA_P11_12_IN
IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN
Definition: IfxEth_PinMap.c:53
IfxEth_Rxer_In
RXER pin mapping structure.
Definition: IfxEth_PinMap.h:161
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IFXETH_PINMAP_RXD_IN_NUM_ITEMS
#define IFXETH_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:192
IfxEth_Mdio_InOut
MDIO pin mapping structure.
Definition: IfxEth_PinMap.h:128
IfxEth_Txd_Out_pinTable
const IfxEth_Txd_Out * IfxEth_Txd_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS]
Definition: IfxEth_PinMap.c:121
IfxEth_Refclk_In_pinTable
const IfxEth_Refclk_In * IfxEth_Refclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS]
Definition: IfxEth_PinMap.c:89
IfxEth_Txen_Out
TXEN pin mapping structure.
Definition: IfxEth_PinMap.h:145
IfxEth_MDC_P02_8_OUT
IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT
Definition: IfxEth_PinMap.c:46
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS
#define IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS
Definition: IfxEth_PinMap.h:196
IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS
#define IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:194
IfxEth_TXD0_P11_3_OUT
IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT
Definition: IfxEth_PinMap.c:58
IfxEth_PinMap.h
ETH I/O map.
IfxEth_RXERB_P21_7_IN
IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN
Definition: IfxEth_PinMap.c:56
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:125
IFXETH_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXETH_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxEth_PinMap.h:195
IfxEth_Mdc_Out_pinTable
const IfxEth_Mdc_Out * IfxEth_Mdc_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS]
Definition: IfxEth_PinMap.c:69
IfxPort_OutputIdx_alt1
Definition: IfxPort.h:120
IfxEth_Rxd_In
RXD pin mapping structure.
Definition: IfxEth_PinMap.h:104
IfxEth_RXD0_P11_10_IN
IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN
Definition: IfxEth_PinMap.c:54
IfxEth_Rxclk_In_pinTable
const IfxEth_Rxclk_In * IfxEth_Rxclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS]
Definition: IfxEth_PinMap.c:95
IfxEth_TXCLKB_P11_12_IN
IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN
Definition: IfxEth_PinMap.c:57
IfxEth_Crsdv_In_pinTable
const IfxEth_Crsdv_In * IfxEth_Crsdv_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS]
Definition: IfxEth_PinMap.c:63
IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS
#define IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:190
IfxEth_Txclk_In_pinTable
const IfxEth_Txclk_In * IfxEth_Txclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS]
Definition: IfxEth_PinMap.c:114
IFXETH_PINMAP_NUM_MODULES
#define IFXETH_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxEth_PinMap.h:186
IfxEth_Mdc_Out
MDC pin mapping structure.
Definition: IfxEth_PinMap.h:120
IfxEth_MDIOA_P00_0_INOUT
IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT
Definition: IfxEth_PinMap.c:49
IfxEth_Crsdv_In
CRSDV pin mapping structure.
Definition: IfxEth_PinMap.h:64
IfxEth_Refclk_In
REFCLK pin mapping structure.
Definition: IfxEth_PinMap.h:80
IfxEth_Rxer_In_pinTable
const IfxEth_Rxer_In * IfxEth_Rxer_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS]
Definition: IfxEth_PinMap.c:107
IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS
#define IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS
Definition: IfxEth_PinMap.h:189
IfxEth_MDIO_P21_1_INOUT
IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT
Definition: IfxEth_PinMap.c:51
IfxEth_Txen_Out_pinTable
const IfxEth_Txen_Out * IfxEth_Txen_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS]
Definition: IfxEth_PinMap.c:128
IfxEth_Txclk_In
TXCLK pin mapping structure.
Definition: IfxEth_PinMap.h:96
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:124
IfxEth_TXD1_P11_2_OUT
IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT
Definition: IfxEth_PinMap.c:59
IFXETH_PINMAP_RXER_IN_NUM_ITEMS
#define IFXETH_PINMAP_RXER_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:193
IFXETH_PINMAP_MDC_OUT_NUM_ITEMS
#define IFXETH_PINMAP_MDC_OUT_NUM_ITEMS
Definition: IfxEth_PinMap.h:188
IfxEth_MDC_P21_2_OUT
IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT
Definition: IfxEth_PinMap.c:48
IfxEth_REFCLK_P11_12_IN
IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN
Definition: IfxEth_PinMap.c:52
IfxEth_TXEN_P11_6_OUT
IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT
Definition: IfxEth_PinMap.c:60


iLLD_TC26B: IfxEth_PinMap.h Source File

  • _PinMap
IfxEth_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxEth_PinMap.h
3 * \brief ETH I/O map
4 * \ingroup IfxLld_Eth
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Eth_pinmap ETH Pin Mapping
42 * \ingroup IfxLld_Eth
43 */
44
45 #ifndef IFXETH_PINMAP_H
46 #define IFXETH_PINMAP_H
47
48 #include <IfxEth_reg.h>
49 #include <_Impl/IfxEth_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Eth_pinmap
53 * \{ */
54
55 /** \brief CRS pin mapping structure */
56 typedef const struct
57 {
58 Ifx_ETH* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel select; /**< \brief Input multiplexer value */
61 } IfxEth_Crs_In;
62
63 /** \brief CRSDV pin mapping structure */
64 typedef const struct
65 {
66 Ifx_ETH* module; /**< \brief Base address */
67 IfxPort_Pin pin; /**< \brief Port pin */
68 Ifx_RxSel select; /**< \brief Input multiplexer value */
69 } IfxEth_Crsdv_In;
70
71 /** \brief RXDV pin mapping structure */
72 typedef const struct
73 {
74 Ifx_ETH* module; /**< \brief Base address */
75 IfxPort_Pin pin; /**< \brief Port pin */
76 Ifx_RxSel select; /**< \brief Input multiplexer value */
77 } IfxEth_Rxdv_In;
78
79 /** \brief REFCLK pin mapping structure */
80 typedef const struct
81 {
82 Ifx_ETH* module; /**< \brief Base address */
83 IfxPort_Pin pin; /**< \brief Port pin */
84 Ifx_RxSel select; /**< \brief Input multiplexer value */
85 } IfxEth_Refclk_In;
86
87 /** \brief RXCLK pin mapping structure */
88 typedef const struct
89 {
90 Ifx_ETH* module; /**< \brief Base address */
91 IfxPort_Pin pin; /**< \brief Port pin */
92 Ifx_RxSel select; /**< \brief Input multiplexer value */
93 } IfxEth_Rxclk_In;
94
95 /** \brief TXCLK pin mapping structure */
96 typedef const struct
97 {
98 Ifx_ETH* module; /**< \brief Base address */
99 IfxPort_Pin pin; /**< \brief Port pin */
100 Ifx_RxSel select; /**< \brief Input multiplexer value */
101 } IfxEth_Txclk_In;
102
103 /** \brief RXD pin mapping structure */
104 typedef const struct
105 {
106 Ifx_ETH* module; /**< \brief Base address */
107 IfxPort_Pin pin; /**< \brief Port pin */
108 Ifx_RxSel select; /**< \brief Input multiplexer value */
109 } IfxEth_Rxd_In;
110
111 /** \brief COL pin mapping structure */
112 typedef const struct
113 {
114 Ifx_ETH* module; /**< \brief Base address */
115 IfxPort_Pin pin; /**< \brief Port pin */
116 Ifx_RxSel select; /**< \brief Input multiplexer value */
117 } IfxEth_Col_In;
118
119 /** \brief MDC pin mapping structure */
120 typedef const struct
121 {
122 Ifx_ETH* module; /**< \brief Base address */
123 IfxPort_Pin pin; /**< \brief Port pin */
124 IfxPort_OutputIdx select; /**< \brief Port control code */
125 } IfxEth_Mdc_Out;
126
127 /** \brief MDIO pin mapping structure */
128 typedef const struct
129 {
130 Ifx_ETH* module; /**< \brief Base address */
131 IfxPort_Pin pin; /**< \brief Port pin */
132 Ifx_RxSel inSelect; /**< \brief Input multiplexer value */
133 IfxPort_OutputIdx outSelect;/**< \brief Port control code */
134 } IfxEth_Mdio_InOut;
135
136 /** \brief TXD pin mapping structure */
137 typedef const struct
138 {
139 Ifx_ETH* module; /**< \brief Base address */
140 IfxPort_Pin pin; /**< \brief Port pin */
141 IfxPort_OutputIdx select; /**< \brief Port control code */
142 } IfxEth_Txd_Out;
143
144 /** \brief TXEN pin mapping structure */
145 typedef const struct
146 {
147 Ifx_ETH* module; /**< \brief Base address */
148 IfxPort_Pin pin; /**< \brief Port pin */
149 IfxPort_OutputIdx select; /**< \brief Port control code */
150 } IfxEth_Txen_Out;
151
152 /** \brief TXER pin mapping structure */
153 typedef const struct
154 {
155 Ifx_ETH* module; /**< \brief Base address */
156 IfxPort_Pin pin; /**< \brief Port pin */
157 IfxPort_OutputIdx select; /**< \brief Port control code */
158 } IfxEth_Txer_Out;
159
160 /** \brief RXER pin mapping structure */
161 typedef const struct
162 {
163 Ifx_ETH* module; /**< \brief Base address */
164 IfxPort_Pin pin; /**< \brief Port pin */
165 Ifx_RxSel select; /**< \brief Input multiplexer value */
166 } IfxEth_Rxer_In;
167
168 IFX_EXTERN IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN; /**< \brief ETH_CRSDVA: ETH input */
169 IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT; /**< \brief ETH_MDC: ETH output */
170 IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT; /**< \brief ETH_MDC: ETH output */
171 IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT; /**< \brief ETH_MDC: ETH output */
172 IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT; /**< \brief ETH_MDIOA: ETH input/output */
173 IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT; /**< \brief ETH_MDIOD: ETH input/output */
174 IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT; /**< \brief ETH_MDIO: ETH output (Not for production purposes) */
175 IFX_EXTERN IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN; /**< \brief ETH_REFCLK: ETH input */
176 IFX_EXTERN IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN; /**< \brief ETH_RXCLKA: ETH input (Not for productive purposes) */
177 IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN; /**< \brief ETH_RXD0: ETH input */
178 IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN; /**< \brief ETH_RXD1: ETH input */
179 IFX_EXTERN IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN; /**< \brief ETH_RXERB: ETH input */
180 IFX_EXTERN IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN; /**< \brief ETH_TXCLKB: ETH input (Not for productive purposes) */
181 IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT; /**< \brief ETH_TXD0: ETH output */
182 IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT; /**< \brief ETH_TXD1: ETH output */
183 IFX_EXTERN IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT; /**< \brief ETH_TXEN: ETH output */
184
185 /** \brief Table dimensions */
186 #define IFXETH_PINMAP_NUM_MODULES 1
187 #define IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS 1
188 #define IFXETH_PINMAP_MDC_OUT_NUM_ITEMS 3
189 #define IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS 7
190 #define IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS 1
191 #define IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS 1
192 #define IFXETH_PINMAP_RXD_IN_NUM_ITEMS 1
193 #define IFXETH_PINMAP_RXER_IN_NUM_ITEMS 2
194 #define IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS 2
195 #define IFXETH_PINMAP_TXD_OUT_NUM_ITEMS 2
196 #define IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS 1
197
198
199 /** \brief IfxEth_Crsdv_In table */
200 IFX_EXTERN const IfxEth_Crsdv_In *IfxEth_Crsdv_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS];
201
202 /** \brief IfxEth_Mdc_Out table */
203 IFX_EXTERN const IfxEth_Mdc_Out *IfxEth_Mdc_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS];
204
205 /** \brief IfxEth_Mdio_InOut table */
206 IFX_EXTERN const IfxEth_Mdio_InOut *IfxEth_Mdio_InOut_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS];
207
208 /** \brief IfxEth_Refclk_In table */
209 IFX_EXTERN const IfxEth_Refclk_In *IfxEth_Refclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS];
210
211 /** \brief IfxEth_Rxclk_In table */
212 IFX_EXTERN const IfxEth_Rxclk_In *IfxEth_Rxclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS];
213
214 /** \brief IfxEth_Rxd_In table */
215 IFX_EXTERN const IfxEth_Rxd_In *IfxEth_Rxd_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS];
216
217 /** \brief IfxEth_Rxer_In table */
218 IFX_EXTERN const IfxEth_Rxer_In *IfxEth_Rxer_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS];
219
220 /** \brief IfxEth_Txclk_In table */
221 IFX_EXTERN const IfxEth_Txclk_In *IfxEth_Txclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS];
222
223 /** \brief IfxEth_Txd_Out table */
224 IFX_EXTERN const IfxEth_Txd_Out *IfxEth_Txd_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS];
225
226 /** \brief IfxEth_Txen_Out table */
227 IFX_EXTERN const IfxEth_Txen_Out *IfxEth_Txen_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS];
228
229 /** \} */
230
231 #endif /* IFXETH_PINMAP_H */
IfxEth_Txd_Out
TXD pin mapping structure.
Definition: IfxEth_PinMap.h:137
IfxEth_RXD1_P11_9_IN
IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN
ETH_RXD1: ETH input.
Definition: IfxEth_PinMap.h:178
IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS
#define IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:191
IfxEth_Rxclk_In
RXCLK pin mapping structure.
Definition: IfxEth_PinMap.h:88
IfxEth_Crsdv_In_pinTable
IFX_EXTERN const IfxEth_Crsdv_In * IfxEth_Crsdv_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS]
IfxEth_Crsdv_In table.
Definition: IfxEth_PinMap.h:200
IfxEth_Txer_Out
TXER pin mapping structure.
Definition: IfxEth_PinMap.h:153
IfxEth_RXCLKA_P11_12_IN
IFX_EXTERN IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN
ETH_RXCLKA: ETH input (Not for productive purposes)
Definition: IfxEth_PinMap.h:176
IfxEth_RXERB_P21_7_IN
IFX_EXTERN IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN
ETH_RXERB: ETH input.
Definition: IfxEth_PinMap.h:179
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxEth_MDIO_P21_1_INOUT
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT
ETH_MDIO: ETH output (Not for production purposes)
Definition: IfxEth_PinMap.h:174
IfxEth_Txd_Out_pinTable
IFX_EXTERN const IfxEth_Txd_Out * IfxEth_Txd_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS]
IfxEth_Txd_Out table.
Definition: IfxEth_PinMap.h:224
IfxEth_Mdio_InOut::outSelect
IfxPort_OutputIdx outSelect
Port control code.
Definition: IfxEth_PinMap.h:133
IfxEth_MDC_P21_2_OUT
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT
ETH_MDC: ETH output.
Definition: IfxEth_PinMap.h:171
IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS
#define IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:187
IfxEth_Mdc_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxEth_PinMap.h:124
IfxEth_Rxer_In
RXER pin mapping structure.
Definition: IfxEth_PinMap.h:161
IFXETH_PINMAP_RXD_IN_NUM_ITEMS
#define IFXETH_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:192
IfxEth_Mdio_InOut::inSelect
Ifx_RxSel inSelect
Input multiplexer value.
Definition: IfxEth_PinMap.h:132
IfxEth_TXD0_P11_3_OUT
IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT
ETH_TXD0: ETH output.
Definition: IfxEth_PinMap.h:181
IfxEth_Mdio_InOut
MDIO pin mapping structure.
Definition: IfxEth_PinMap.h:128
IfxEth_TXCLKB_P11_12_IN
IFX_EXTERN IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN
ETH_TXCLKB: ETH input (Not for productive purposes)
Definition: IfxEth_PinMap.h:180
IfxEth_Rxer_In_pinTable
IFX_EXTERN const IfxEth_Rxer_In * IfxEth_Rxer_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS]
IfxEth_Rxer_In table.
Definition: IfxEth_PinMap.h:218
IfxEth_Txen_Out
TXEN pin mapping structure.
Definition: IfxEth_PinMap.h:145
IfxEth_MDC_P02_8_OUT
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT
ETH_MDC: ETH output.
Definition: IfxEth_PinMap.h:169
IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS
#define IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS
Definition: IfxEth_PinMap.h:196
IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS
#define IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:194
IfxEth_Col_In
COL pin mapping structure.
Definition: IfxEth_PinMap.h:112
IFXETH_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXETH_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxEth_PinMap.h:195
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxEth_Mdc_Out_pinTable
IFX_EXTERN const IfxEth_Mdc_Out * IfxEth_Mdc_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS]
IfxEth_Mdc_Out table.
Definition: IfxEth_PinMap.h:203
IfxEth_TXD1_P11_2_OUT
IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT
ETH_TXD1: ETH output.
Definition: IfxEth_PinMap.h:182
IfxEth_Crs_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxEth_PinMap.h:59
IfxEth_CRSDVA_P11_11_IN
IFX_EXTERN IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN
ETH_CRSDVA: ETH input.
Definition: IfxEth_PinMap.h:168
IfxEth_Crs_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxEth_PinMap.h:60
IfxEth_Rxclk_In_pinTable
IFX_EXTERN const IfxEth_Rxclk_In * IfxEth_Rxclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS]
IfxEth_Rxclk_In table.
Definition: IfxEth_PinMap.h:212
IfxEth_Rxd_In
RXD pin mapping structure.
Definition: IfxEth_PinMap.h:104
IfxEth_RXD0_P11_10_IN
IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN
ETH_RXD0: ETH input.
Definition: IfxEth_PinMap.h:177
IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS
#define IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:190
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxEth_cfg.h
ETH on-chip implementation data.
IfxEth_MDIOA_P00_0_INOUT
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT
ETH_MDIOA: ETH input/output.
Definition: IfxEth_PinMap.h:172
IfxEth_REFCLK_P11_12_IN
IFX_EXTERN IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN
ETH_REFCLK: ETH input.
Definition: IfxEth_PinMap.h:175
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxEth_MDC_P21_0_OUT
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT
ETH_MDC: ETH output.
Definition: IfxEth_PinMap.h:170
IFXETH_PINMAP_NUM_MODULES
#define IFXETH_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxEth_PinMap.h:186
IfxEth_Mdc_Out
MDC pin mapping structure.
Definition: IfxEth_PinMap.h:120
IfxEth_Refclk_In_pinTable
IFX_EXTERN const IfxEth_Refclk_In * IfxEth_Refclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS]
IfxEth_Refclk_In table.
Definition: IfxEth_PinMap.h:209
IfxEth_TXEN_P11_6_OUT
IFX_EXTERN IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT
ETH_TXEN: ETH output.
Definition: IfxEth_PinMap.h:183
IfxEth_Crsdv_In
CRSDV pin mapping structure.
Definition: IfxEth_PinMap.h:64
IfxEth_Mdio_InOut_pinTable
IFX_EXTERN const IfxEth_Mdio_InOut * IfxEth_Mdio_InOut_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
IfxEth_Mdio_InOut table.
Definition: IfxEth_PinMap.h:206
IfxEth_Refclk_In
REFCLK pin mapping structure.
Definition: IfxEth_PinMap.h:80
IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS
#define IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS
Definition: IfxEth_PinMap.h:189
IfxEth_MDIOD_P21_3_INOUT
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT
ETH_MDIOD: ETH input/output.
Definition: IfxEth_PinMap.h:173
IfxEth_Rxdv_In
RXDV pin mapping structure.
Definition: IfxEth_PinMap.h:72
IfxEth_Txclk_In_pinTable
IFX_EXTERN const IfxEth_Txclk_In * IfxEth_Txclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS]
IfxEth_Txclk_In table.
Definition: IfxEth_PinMap.h:221
IfxEth_Txclk_In
TXCLK pin mapping structure.
Definition: IfxEth_PinMap.h:96
IfxEth_Rxd_In_pinTable
IFX_EXTERN const IfxEth_Rxd_In * IfxEth_Rxd_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS]
IfxEth_Rxd_In table.
Definition: IfxEth_PinMap.h:215
IFXETH_PINMAP_RXER_IN_NUM_ITEMS
#define IFXETH_PINMAP_RXER_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:193
IfxEth_Crs_In
CRS pin mapping structure.
Definition: IfxEth_PinMap.h:56
IFXETH_PINMAP_MDC_OUT_NUM_ITEMS
#define IFXETH_PINMAP_MDC_OUT_NUM_ITEMS
Definition: IfxEth_PinMap.h:188
IfxEth_Crs_In::module
Ifx_ETH * module
Base address.
Definition: IfxEth_PinMap.h:58
IfxEth_Txen_Out_pinTable
IFX_EXTERN const IfxEth_Txen_Out * IfxEth_Txen_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxEth_Txen_Out table.
Definition: IfxEth_PinMap.h:227
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxEth_cfg.h Source File

  • _Impl
IfxEth_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxEth_cfg.h
3 * \brief ETH on-chip implementation data
4 * \ingroup IfxLld_Eth
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Eth ETH
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Eth_Impl Implementation
44 * \ingroup IfxLld_Eth
45 * \defgroup IfxLld_Eth_Std Standard Driver
46 * \ingroup IfxLld_Eth
47 */
48
49 #ifndef IFXETH_CFG_H
50 #define IFXETH_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 /******************************************************************************/
57 /*-----------------------------------Macros-----------------------------------*/
58 /******************************************************************************/
59
60 #define IFXETH_MAX_TIMEOUT_VALUE 1000
61
62 #define IFXETH_NUM_MODULES (1)
63
64 #endif /* IFXETH_CFG_H */


iLLD_TC26B: IfxFce.c Source File

  • Fce
  • Std
IfxFce.c
Go to the documentation of this file.
1 /**
2 * \file IfxFce.c
3 * \brief FCE basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxFce.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 Ifx_FCE_STS IfxFce_getCrc16InterruptStatus(Ifx_FCE *fce)
54 {
55 Ifx_FCE_STS interruptStatus;
56 interruptStatus.U = fce->IN2.STS.U;
57 return interruptStatus;
58 }
59
60
61 Ifx_FCE_STS IfxFce_getCrc32InterruptStatus(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
62 {
63 Ifx_FCE_STS interruptStatus;
64
65 if (crc32Kernel == IfxFce_Crc32Kernel_0)
66 {
67 interruptStatus.U = fce->IN0.STS.U;
68 }
69 else
70 {
71 interruptStatus.U = fce->IN1.STS.U;
72 }
73
74 return interruptStatus;
75 }
76
77
78 Ifx_FCE_STS IfxFce_getCrc8InterruptStatus(Ifx_FCE *fce)
79 {
80 Ifx_FCE_STS interruptStatus;
81 interruptStatus.U = fce->IN3.STS.U;
82 return interruptStatus;
83 }
84
85
86 uint32 IfxFce_reflectCrc32(uint32 crcStartValue, uint8 crcLength)
87 {
88 uint32 ReversedData = 0x0U;
89 uint8 inputDataCounter;
90
91 for (inputDataCounter = 0; inputDataCounter < crcLength; ++inputDataCounter)
92 {
93 if (crcStartValue & 0x01)
94 {
95 ReversedData |= (uint32)((uint32)1 << ((crcLength - 1) - inputDataCounter));
96 }
97
98 crcStartValue = (uint32)((uint32)crcStartValue >> (uint32)1);
99 }
100
101 return ReversedData;
102 }
103
104
105 void IfxFce_resetModule(Ifx_FCE *fce)
106 {
107 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
108
109 IfxScuWdt_clearCpuEndinit(password);
110 fce->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
111 fce->KRST0.B.RST = 1;
112 IfxScuWdt_setCpuEndinit(password);
113
114 while (0 == fce->KRST0.B.RSTSTAT) /* Wait until reset is executed */
115
116 {}
117
118 IfxScuWdt_clearCpuEndinit(password);
119 fce->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
120 IfxScuWdt_setCpuEndinit(password);
121 }
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxFce_getCrc32InterruptStatus
Ifx_FCE_STS IfxFce_getCrc32InterruptStatus(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Gets the CRC-32 interrupt status.
Definition: IfxFce.c:61
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxFce_reflectCrc32
uint32 IfxFce_reflectCrc32(uint32 crcStartValue, uint8 crcLength)
Reflects the CRC data and returns it.
Definition: IfxFce.c:86
IfxFce_Crc32Kernel_0
Specifies the kernel0 used for CRC-32.
Definition: IfxFce.h:75
IfxFce_Crc32Kernel
IfxFce_Crc32Kernel
Ifx_FCE_INx(x= 0,1), Specifies the kernel used for CRC-32.
Definition: IfxFce.h:73
IfxFce_resetModule
void IfxFce_resetModule(Ifx_FCE *fce)
Reset the module by clearing the kernel.
Definition: IfxFce.c:105
IfxFce_getCrc8InterruptStatus
Ifx_FCE_STS IfxFce_getCrc8InterruptStatus(Ifx_FCE *fce)
Gets the CRC-8 interrupt status.
Definition: IfxFce.c:78
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxFce_getCrc16InterruptStatus
Ifx_FCE_STS IfxFce_getCrc16InterruptStatus(Ifx_FCE *fce)
Gets the CRC-16 interrupt status.
Definition: IfxFce.c:53
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxFce.h
FCE basic functionality.
uint8
unsigned char uint8
Definition: Platform_Types.h:108


iLLD_TC26B: IfxFce.h Source File

  • Fce
  • Std
IfxFce.h
Go to the documentation of this file.
1 /**
2 * \file IfxFce.h
3 * \brief FCE basic functionality
4 * \ingroup IfxLld_Fce
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Fce_Std_Enum Enumerations
43 * \ingroup IfxLld_Fce_Std
44 * \defgroup IfxLld_Fce_Std_Module Module Functions
45 * \ingroup IfxLld_Fce_Std
46 * \defgroup IfxLld_Fce_Std_Support Support Function
47 * \ingroup IfxLld_Fce_Std
48 * \defgroup IfxLld_Fce_Std_InterruptStatus Interrupt Status Functions
49 * \ingroup IfxLld_Fce_Std
50 */
51
52 #ifndef IFXFCE_H
53 #define IFXFCE_H 1
54
55 /******************************************************************************/
56 /*----------------------------------Includes----------------------------------*/
57 /******************************************************************************/
58
59 #include "_Impl/IfxFce_cfg.h"
60 #include "Cpu/Std/IfxCpu_Intrinsics.h"
61 #include "Scu/Std/IfxScuWdt.h"
62 #include "IfxFce_reg.h"
63 #include "Src/Std/IfxSrc.h"
64
65 /******************************************************************************/
66 /*--------------------------------Enumerations--------------------------------*/
67 /******************************************************************************/
68
69 /** \addtogroup IfxLld_Fce_Std_Enum
70 * \{ */
71 /** \brief Ifx_FCE_INx(x= 0,1), Specifies the kernel used for CRC-32
72 */
73 typedef enum
74 {
75 IfxFce_Crc32Kernel_0 = 0, /**< \brief Specifies the kernel0 used for CRC-32 */
76 IfxFce_Crc32Kernel_1 /**< \brief Specifies the kernel1 used for CRC-32 */
77 } IfxFce_Crc32Kernel;
78
79 /** \brief Specifies the CRC mode
80 */
81 typedef enum
82 {
83 IfxFce_CrcMode_8 = 0, /**< \brief Specifies the 8-bit CRC mode */
84 IfxFce_CrcMode_16 = 1, /**< \brief Specifies the 16-bit CRC mode */
85 IfxFce_CrcMode_32 = 2 /**< \brief Specifies the 32-bit CRC mode */
86 } IfxFce_CrcMode;
87
88 /** \} */
89
90 /** \addtogroup IfxLld_Fce_Std_Module
91 * \{ */
92
93 /******************************************************************************/
94 /*-------------------------Inline Function Prototypes-------------------------*/
95 /******************************************************************************/
96
97 /** \brief Disable the control of FCE module
98 * \param fce Specifies pointer to FCE module registers
99 * \return None
100 */
101 IFX_INLINE void IfxFce_disableModule(Ifx_FCE *fce);
102
103 /** \brief Enable the control of FCE module
104 * \param fce Specifies pointer to FCE module registers
105 * \return None
106 */
107 IFX_INLINE void IfxFce_enableModule(Ifx_FCE *fce);
108
109 /******************************************************************************/
110 /*-------------------------Global Function Prototypes-------------------------*/
111 /******************************************************************************/
112
113 /** \brief Reset the module by clearing the kernel
114 * \param fce Specifies pointer to FCE module registers
115 * \return None
116 */
117 IFX_EXTERN void IfxFce_resetModule(Ifx_FCE *fce);
118
119 /** \} */
120
121 /** \addtogroup IfxLld_Fce_Std_Support
122 * \{ */
123
124 /******************************************************************************/
125 /*-------------------------Global Function Prototypes-------------------------*/
126 /******************************************************************************/
127
128 /** \brief Reflects the CRC data and returns it
129 * \param crcStartValue start value for reflection
130 * \param crcLength length of reflected value
131 * \return Reflected CRC data
132 */
133 IFX_EXTERN uint32 IfxFce_reflectCrc32(uint32 crcStartValue, uint8 crcLength);
134
135 /** \} */
136
137 /** \addtogroup IfxLld_Fce_Std_InterruptStatus
138 * \{ */
139
140 /******************************************************************************/
141 /*-------------------------Inline Function Prototypes-------------------------*/
142 /******************************************************************************/
143
144 /** \brief Clears the CRC-16 error flags
145 * \param fce Specifies pointer to FCE module registers
146 * \return None
147 */
148 IFX_INLINE void IfxFce_clearCrc16ErrorFlags(Ifx_FCE *fce);
149
150 /** \brief Clears the CRC-32 error flags
151 * \param fce Specifies pointer to FCE module registers
152 * \param crc32Kernel Specifies the kernel used for CRC-32
153 * \return None
154 */
155 IFX_INLINE void IfxFce_clearCrc32ErrorFlags(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel);
156
157 /** \brief Clears the CRC-8 error flags
158 * \param fce Specifies pointer to FCE module registers
159 * \return None
160 */
161 IFX_INLINE void IfxFce_clearCrc8ErrorFlags(Ifx_FCE *fce);
162
163 /** \brief Returns the SRC pointer for FCE
164 * \param fce Specifies pointer to FCE module registers
165 */
166 IFX_INLINE volatile Ifx_SRC_SRCR *IfxFce_getSrcPointer(Ifx_FCE *fce);
167
168 /******************************************************************************/
169 /*-------------------------Global Function Prototypes-------------------------*/
170 /******************************************************************************/
171
172 /** \brief Gets the CRC-16 interrupt status
173 * \param fce Specifies pointer to FCE module registers
174 * \return Current CRC-16 interrupt status
175 */
176 IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc16InterruptStatus(Ifx_FCE *fce);
177
178 /** \brief Gets the CRC-32 interrupt status
179 * \param fce Specifies pointer to FCE module registers
180 * \param crc32Kernel Specifies the kernel used for CRC-32
181 * \return Current CRC-32 interrupt status
182 */
183 IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc32InterruptStatus(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel);
184
185 /** \brief Gets the CRC-8 interrupt status
186 * \param fce Specifies pointer to FCE module registers
187 * \return Current CRC-8 interrupt status
188 */
189 IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc8InterruptStatus(Ifx_FCE *fce);
190
191 /** \} */
192
193 /******************************************************************************/
194 /*---------------------Inline Function Implementations------------------------*/
195 /******************************************************************************/
196
197 IFX_INLINE void IfxFce_clearCrc16ErrorFlags(Ifx_FCE *fce)
198 {
199 fce->IN2.STS.U = 0x0000000fU;
200 }
201
202
203 IFX_INLINE void IfxFce_clearCrc32ErrorFlags(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
204 {
205 if (crc32Kernel == IfxFce_Crc32Kernel_0)
206 {
207 fce->IN0.STS.U = 0x0000000fU;
208 }
209 else
210 {
211 fce->IN1.STS.U = 0x0000000fU;
212 }
213 }
214
215
216 IFX_INLINE void IfxFce_clearCrc8ErrorFlags(Ifx_FCE *fce)
217 {
218 fce->IN3.STS.U = 0x0000000fU;
219 }
220
221
222 IFX_INLINE void IfxFce_disableModule(Ifx_FCE *fce)
223 {
224 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
225 IfxScuWdt_clearCpuEndinit(password);
226 fce->CLC.B.DISR = 1;
227 IfxScuWdt_setCpuEndinit(password);
228 }
229
230
231 IFX_INLINE void IfxFce_enableModule(Ifx_FCE *fce)
232 {
233 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
234 IfxScuWdt_clearCpuEndinit(password);
235 fce->CLC.B.DISR = 0;
236 IfxScuWdt_setCpuEndinit(password);
237 }
238
239
240 IFX_INLINE volatile Ifx_SRC_SRCR *IfxFce_getSrcPointer(Ifx_FCE *fce)
241 {
242 IFX_UNUSED_PARAMETER(fce);
243 return &SRC_FCE;
244 }
245
246
247 #endif /* IFXFCE_H */
IfxFce_enableModule
IFX_INLINE void IfxFce_enableModule(Ifx_FCE *fce)
Enable the control of FCE module.
Definition: IfxFce.h:231
IfxFce_disableModule
IFX_INLINE void IfxFce_disableModule(Ifx_FCE *fce)
Disable the control of FCE module.
Definition: IfxFce.h:222
IfxFce_Crc32Kernel_1
Specifies the kernel1 used for CRC-32.
Definition: IfxFce.h:76
IfxFce_CrcMode
IfxFce_CrcMode
Specifies the CRC mode.
Definition: IfxFce.h:81
IfxFce_CrcMode_32
Specifies the 32-bit CRC mode.
Definition: IfxFce.h:85
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxFce_CrcMode_8
Specifies the 8-bit CRC mode.
Definition: IfxFce.h:83
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxSrc.h
SRC basic functionality.
IfxCpu_Intrinsics.h
IfxFce_clearCrc8ErrorFlags
IFX_INLINE void IfxFce_clearCrc8ErrorFlags(Ifx_FCE *fce)
Clears the CRC-8 error flags.
Definition: IfxFce.h:216
IfxFce_getCrc32InterruptStatus
IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc32InterruptStatus(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Gets the CRC-32 interrupt status.
Definition: IfxFce.c:61
IfxScuWdt.h
SCU basic functionality.
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxFce_reflectCrc32
IFX_EXTERN uint32 IfxFce_reflectCrc32(uint32 crcStartValue, uint8 crcLength)
Reflects the CRC data and returns it.
Definition: IfxFce.c:86
IfxFce_Crc32Kernel_0
Specifies the kernel0 used for CRC-32.
Definition: IfxFce.h:75
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxFce_clearCrc32ErrorFlags
IFX_INLINE void IfxFce_clearCrc32ErrorFlags(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Clears the CRC-32 error flags.
Definition: IfxFce.h:203
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxFce_CrcMode_16
Specifies the 16-bit CRC mode.
Definition: IfxFce.h:84
IfxFce_Crc32Kernel
IfxFce_Crc32Kernel
Ifx_FCE_INx(x= 0,1), Specifies the kernel used for CRC-32.
Definition: IfxFce.h:73
IfxFce_cfg.h
FCE on-chip implementation data.
IfxFce_resetModule
IFX_EXTERN void IfxFce_resetModule(Ifx_FCE *fce)
Reset the module by clearing the kernel.
Definition: IfxFce.c:105
IfxFce_getCrc8InterruptStatus
IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc8InterruptStatus(Ifx_FCE *fce)
Gets the CRC-8 interrupt status.
Definition: IfxFce.c:78
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxFce_clearCrc16ErrorFlags
IFX_INLINE void IfxFce_clearCrc16ErrorFlags(Ifx_FCE *fce)
Clears the CRC-16 error flags.
Definition: IfxFce.h:197
IfxFce_getCrc16InterruptStatus
IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc16InterruptStatus(Ifx_FCE *fce)
Gets the CRC-16 interrupt status.
Definition: IfxFce.c:53
IfxFce_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxFce_getSrcPointer(Ifx_FCE *fce)
Returns the SRC pointer for FCE.
Definition: IfxFce.h:240
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
uint8
unsigned char uint8
Definition: Platform_Types.h:108


iLLD_TC26B: IfxFce_Crc.c Source File

  • Fce
  • Crc
IfxFce_Crc.c
Go to the documentation of this file.
1 /**
2 * \file IfxFce_Crc.c
3 * \brief FCE CRC details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxFce_Crc.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 uint16 IfxFce_Crc_calculateCrc16(IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue)
54 {
55 Ifx_FCE *fceSFR = fce->fce;
56 uint32 inputDataCounter;
57 uint16 crcResultValue;
58 uint16 *dataPtr = (uint16 *)crcData;
59
60 fceSFR->IN2.CHECK.U = 0xFACECAFE;
61 fceSFR->IN2.LENGTH.U = 0xFACECAFE;
62 fceSFR->IN2.CHECK.U = (uint16)fce->expectedCrc;
63 fceSFR->IN2.LENGTH.U = crcDataLength;
64
65 /*Configure CRC register*/
66 fceSFR->IN2.CRC.U = crcStartValue;
67 {
68 /*Code for CRC-16 calculaion with 0x1021 polynomial*/
69 for (inputDataCounter = 0; inputDataCounter < crcDataLength; inputDataCounter++)
70 {
71 fceSFR->IN2.IR.U = *(dataPtr++);
72 }
73 }
74
75 crcResultValue = (uint16)fceSFR->IN2.RES.U;
76
77 return crcResultValue;
78 }
79
80
81 uint32 IfxFce_Crc_calculateCrc32(IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue)
82 {
83 Ifx_FCE *fceSFR = fce->fce;
84 uint32 inputDataCounter;
85 uint32 crcResultValue;
86 uint32 *dataPtr = (uint32 *)crcData;
87 volatile uint32 *inPtr;
88
89 /*Crc-32 calculaion with 0x04C11DB7 polynomial*/
90 if (fce->crc32Kernel == IfxFce_Crc32Kernel_0)
91 {
92 fceSFR->IN0.CHECK.U = 0xFACECAFE;
93 fceSFR->IN0.LENGTH.U = 0xFACECAFE;
94 fceSFR->IN0.CHECK.U = fce->expectedCrc;
95 fceSFR->IN0.LENGTH.U = crcDataLength;
96 fceSFR->IN0.CRC.U = crcStartValue;
97
98 inPtr = (volatile uint32 *)&fceSFR->IN0.IR.U;
99 }
100 else
101 {
102 fceSFR->IN1.CHECK.U = 0xFACECAFE;
103 fceSFR->IN1.LENGTH.U = 0xFACECAFE;
104 fceSFR->IN1.CHECK.U = fce->expectedCrc;
105 fceSFR->IN1.LENGTH.U = crcDataLength;
106 fceSFR->IN1.CRC.U = crcStartValue;
107
108 inPtr = (volatile uint32 *)&fceSFR->IN1.IR.U;
109 }
110
111 {
112 for (inputDataCounter = 0; inputDataCounter < crcDataLength; inputDataCounter++)
113 {
114 *inPtr = *(dataPtr++);
115 }
116 }
117
118 if (fce->crc32Kernel == IfxFce_Crc32Kernel_0)
119 {
120 crcResultValue = fceSFR->IN0.RES.U;
121 }
122 else
123 {
124 crcResultValue = fceSFR->IN1.RES.U;
125 }
126
127 return crcResultValue;
128 }
129
130
131 uint8 IfxFce_Crc_calculateCrc8(IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue)
132 {
133 Ifx_FCE *fceSFR = fce->fce;
134 uint32 inputDataCounter;
135 uint8 crcResultValue;
136 uint8 *dataPtr = (uint8 *)crcData;
137
138 fceSFR->IN3.CHECK.U = 0xFACECAFE;
139 fceSFR->IN3.LENGTH.U = 0xFACECAFE;
140 fceSFR->IN3.CHECK.U = (uint8)fce->expectedCrc;
141 fceSFR->IN3.LENGTH.U = crcDataLength;
142
143 /*Configure CRC register*/
144 fceSFR->IN3.CRC.U = crcStartValue;
145
146 /*Code for CRC-8 calculaion for 0x1D polynomials*/
147 {
148 /* input in INIT register */
149 for (inputDataCounter = 0; inputDataCounter < crcDataLength; ++inputDataCounter)
150 {
151 fceSFR->IN3.IR.U = *(dataPtr++);
152 }
153 }
154 crcResultValue = (uint8)fceSFR->IN3.RES.U;
155
156 return crcResultValue;
157 }
158
159
160 void IfxFce_Crc_clearErrorFlags(IfxFce_Crc_Crc *fce)
161 {
162 if (fce->crcMode == IfxFce_CrcMode_8)
163 {
164 IfxFce_clearCrc8ErrorFlags(fce->fce);
165 }
166 else if (fce->crcMode == IfxFce_CrcMode_16)
167 {
168 IfxFce_clearCrc16ErrorFlags(fce->fce);
169 }
170 else
171 {
172 IfxFce_clearCrc32ErrorFlags(fce->fce, fce->crc32Kernel);
173 }
174 }
175
176
177 void IfxFce_Crc_deInitModule(IfxFce_Crc_Crc *fce)
178 {
179 IfxFce_resetModule(fce->fce);
180 }
181
182
183 Ifx_FCE_STS IfxFce_Crc_getInterruptStatus(IfxFce_Crc_Crc *fce)
184 {
185 if (fce->crcMode == IfxFce_CrcMode_8)
186 {
187 return IfxFce_getCrc8InterruptStatus(fce->fce);
188 }
189 else if (fce->crcMode == IfxFce_CrcMode_16)
190 {
191 return IfxFce_getCrc16InterruptStatus(fce->fce);
192 }
193 else
194 {
195 return IfxFce_getCrc32InterruptStatus(fce->fce, fce->crc32Kernel);
196 }
197 }
198
199
200 void IfxFce_Crc_initCrc(IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
201 {
202 fceCrc->fce = crcConfig->fce;
203 Ifx_FCE *fceSFR = crcConfig->fce;
204
205 fceCrc->crcMode = crcConfig->crcMode;
206 fceCrc->expectedCrc = crcConfig->expectedCrc;
207
208 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
209 IfxScuWdt_clearCpuEndinit(password);
210
211 Ifx_FCE_CFG tempCFG;
212 tempCFG.U = 0;
213 tempCFG.B.CMI = crcConfig->enabledInterrupts.crcMismatch;
214 tempCFG.B.CEI = crcConfig->enabledInterrupts.configError;
215 tempCFG.B.LEI = crcConfig->enabledInterrupts.lengthError;
216 tempCFG.B.BEI = crcConfig->enabledInterrupts.busError;
217 tempCFG.B.CCE = crcConfig->crcCheckCompared;
218 tempCFG.B.ALR = crcConfig->automaticLengthReload;
219 tempCFG.B.REFIN = crcConfig->dataByteReflectionEnabled;
220 tempCFG.B.REFOUT = crcConfig->crc32BitReflectionEnabled;
221 tempCFG.B.XSEL = crcConfig->crcResultInverted;
222
223 if (crcConfig->crcMode == IfxFce_CrcMode_8)
224 {
225 fceSFR->IN3.CFG.U = tempCFG.U;
226 }
227 else if (crcConfig->crcMode == IfxFce_CrcMode_16)
228 {
229 fceSFR->IN2.CFG.U = tempCFG.U;
230 }
231 else
232 {
233 fceCrc->crc32Kernel = crcConfig->crc32Kernel;
234
235 if (crcConfig->crc32Kernel == IfxFce_Crc32Kernel_0)
236 {
237 fceSFR->IN0.CFG.U = tempCFG.U;
238 }
239 else
240 {
241 fceSFR->IN1.CFG.U = tempCFG.U;
242 }
243 }
244
245 IfxScuWdt_setCpuEndinit(password);
246 }
247
248
249 void IfxFce_Crc_initCrcConfig(IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
250 {
251 crcConfig->fce = fce->fce;
252 crcConfig->crcMode = IfxFce_CrcMode_32;
253 crcConfig->crcCheckCompared = TRUE;
254 crcConfig->automaticLengthReload = FALSE;
255 crcConfig->dataByteReflectionEnabled = TRUE;
256 crcConfig->crc32BitReflectionEnabled = TRUE;
257 crcConfig->crcResultInverted = TRUE;
258 crcConfig->enabledInterrupts.crcMismatch = FALSE; // enable if CRC is already known
259 crcConfig->enabledInterrupts.configError = TRUE;
260 crcConfig->enabledInterrupts.lengthError = TRUE;
261 crcConfig->enabledInterrupts.busError = TRUE;
262 }
263
264
265 void IfxFce_Crc_initModule(IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
266 {
267 fce->fce = config->fce;
268 Ifx_FCE *fceSFR = config->fce;
269
270 IfxFce_enableModule(fceSFR);
271
272 volatile Ifx_SRC_SRCR *src = IfxFce_getSrcPointer(fceSFR);
273 IfxSrc_init(src, config->isrTypeOfService, config->isrPriority);
274 IfxSrc_enable(src);
275 }
276
277
278 void IfxFce_Crc_initModuleConfig(IfxFce_Crc_Config *config, Ifx_FCE *fce)
279 {
280 config->fce = fce;
281 config->isrPriority = 0;
282 config->isrTypeOfService = IfxSrc_Tos_cpu0;
283 }
IfxFce_Crc_Config::isrTypeOfService
IfxSrc_Tos isrTypeOfService
type of interrupt service
Definition: IfxFce_Crc.h:398
IfxFce_enableModule
IFX_INLINE void IfxFce_enableModule(Ifx_FCE *fce)
Enable the control of FCE module.
Definition: IfxFce.h:231
IfxFce_Crc_Crc::fce
Ifx_FCE * fce
Specifies pointer to FCE module registers.
Definition: IfxFce_Crc.h:405
IfxFce_Crc_Crc
Specifies the pointer to FCE module handler.
Definition: IfxFce_Crc.h:403
IfxFce_Crc.h
FCE CRC details.
IfxFce_Crc_calculateCrc32
uint32 IfxFce_Crc_calculateCrc32(IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue)
Calculate the XORed 32-bit CRC value and returns it. It takes the precomputed XORed and reversed...
Definition: IfxFce_Crc.c:81
IfxFce_Crc_getInterruptStatus
Ifx_FCE_STS IfxFce_Crc_getInterruptStatus(IfxFce_Crc_Crc *fce)
Gets the current CRC interrupt status.
Definition: IfxFce_Crc.c:183
IfxFce_CrcMode_32
Specifies the 32-bit CRC mode.
Definition: IfxFce.h:85
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxFce_CrcMode_8
Specifies the 8-bit CRC mode.
Definition: IfxFce.h:83
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxFce_Crc_Crc::expectedCrc
uint32 expectedCrc
Specifies the expected CRC to be compared with resulted.
Definition: IfxFce_Crc.h:407
IfxFce_Crc_initCrcConfig
void IfxFce_Crc_initCrcConfig(IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
Initialises the default CRC configuration buffer.
Definition: IfxFce_Crc.c:249
IfxFce_Crc_EnabledInterrupts::lengthError
boolean lengthError
Specifies enabel/disable of length error interrupt.
Definition: IfxFce_Crc.h:377
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxFce_Crc_initCrc
void IfxFce_Crc_initCrc(IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
Initialise the FCE module for CRC computation according to CRC mode.
Definition: IfxFce_Crc.c:200
IfxFce_Crc_CrcConfig::automaticLengthReload
boolean automaticLengthReload
Specifies the enable/disable of automatic length reload.
Definition: IfxFce_Crc.h:417
IfxFce_Crc_clearErrorFlags
void IfxFce_Crc_clearErrorFlags(IfxFce_Crc_Crc *fce)
Clears the error flags.
Definition: IfxFce_Crc.c:160
IfxFce_Crc_calculateCrc8
uint8 IfxFce_Crc_calculateCrc8(IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue)
Calculate the XORed 8-bit CRC value and returns it. It takes the precomputed XORed and reversed...
Definition: IfxFce_Crc.c:131
IfxFce_Crc_CrcConfig::dataByteReflectionEnabled
boolean dataByteReflectionEnabled
Specifies enable/disable of input data byte wise reflection.
Definition: IfxFce_Crc.h:418
IfxFce_clearCrc8ErrorFlags
IFX_INLINE void IfxFce_clearCrc8ErrorFlags(Ifx_FCE *fce)
Clears the CRC-8 error flags.
Definition: IfxFce.h:216
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxFce_getCrc32InterruptStatus
Ifx_FCE_STS IfxFce_getCrc32InterruptStatus(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Gets the CRC-32 interrupt status.
Definition: IfxFce.c:61
IfxFce_Crc_CrcConfig::crcResultInverted
boolean crcResultInverted
Specifies the XOR valueto get the final CRC.
Definition: IfxFce_Crc.h:422
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxFce_Crc32Kernel_0
Specifies the kernel0 used for CRC-32.
Definition: IfxFce.h:75
IfxFce_clearCrc32ErrorFlags
IFX_INLINE void IfxFce_clearCrc32ErrorFlags(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Clears the CRC-32 error flags.
Definition: IfxFce.h:203
IfxFce_CrcMode_16
Specifies the 16-bit CRC mode.
Definition: IfxFce.h:84
IfxFce_Crc_CrcConfig::enabledInterrupts
IfxFce_Crc_EnabledInterrupts enabledInterrupts
Specifies the interrupt enable structure.
Definition: IfxFce_Crc.h:424
IfxFce_Crc_Config
Configuration structure of the module.
Definition: IfxFce_Crc.h:394
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxFce_Crc_initModule
void IfxFce_Crc_initModule(IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
Usage Example: see How to use the FCE CRC Interface driver?.
Definition: IfxFce_Crc.c:265
IfxFce_resetModule
void IfxFce_resetModule(Ifx_FCE *fce)
Reset the module by clearing the kernel.
Definition: IfxFce.c:105
IfxFce_Crc
FCE Module Handle;.
Definition: IfxFce_Crc.h:387
IfxFce_Crc_EnabledInterrupts::configError
boolean configError
Specifies enabel/disable of configuration error interrupt.
Definition: IfxFce_Crc.h:376
IfxFce_getCrc8InterruptStatus
Ifx_FCE_STS IfxFce_getCrc8InterruptStatus(Ifx_FCE *fce)
Gets the CRC-8 interrupt status.
Definition: IfxFce.c:78
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxFce_Crc_EnabledInterrupts::busError
boolean busError
Specifies enabel/disable of bus error interrupt.
Definition: IfxFce_Crc.h:378
IfxFce_Crc_deInitModule
void IfxFce_Crc_deInitModule(IfxFce_Crc_Crc *fce)
Deinitialises the FCE module.
Definition: IfxFce_Crc.c:177
IfxFce_clearCrc16ErrorFlags
IFX_INLINE void IfxFce_clearCrc16ErrorFlags(Ifx_FCE *fce)
Clears the CRC-16 error flags.
Definition: IfxFce.h:197
IfxFce_getCrc16InterruptStatus
Ifx_FCE_STS IfxFce_getCrc16InterruptStatus(Ifx_FCE *fce)
Gets the CRC-16 interrupt status.
Definition: IfxFce.c:53
IfxFce_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxFce_getSrcPointer(Ifx_FCE *fce)
Returns the SRC pointer for FCE.
Definition: IfxFce.h:240
IfxFce_Crc_initModuleConfig
void IfxFce_Crc_initModuleConfig(IfxFce_Crc_Config *config, Ifx_FCE *fce)
Fills the config structure with default values.
Definition: IfxFce_Crc.c:278
IfxFce_Crc_CrcConfig::crcCheckCompared
boolean crcCheckCompared
Specifies whether CRC check comparision is enabled or not.
Definition: IfxFce_Crc.h:416
IfxFce_Crc_CrcConfig::crc32BitReflectionEnabled
boolean crc32BitReflectionEnabled
Specifies enable/disable of CRC 32-bit wise reflection.
Definition: IfxFce_Crc.h:419
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxFce_Crc_Crc::crcMode
IfxFce_CrcMode crcMode
Specifies the CRC mode.
Definition: IfxFce_Crc.h:406
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxFce_Crc_Crc::crc32Kernel
IfxFce_Crc32Kernel crc32Kernel
Specifies the kernel used for CRC-32.
Definition: IfxFce_Crc.h:408
IfxFce_Crc_EnabledInterrupts::crcMismatch
boolean crcMismatch
Specifies enabel/disable of CRC mismatch interrupt.
Definition: IfxFce_Crc.h:375
IfxFce_Crc_calculateCrc16
uint16 IfxFce_Crc_calculateCrc16(IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue)
Calculate the XORed 16-bit CRC value and returns it. It takes the precomputed XORed and reversed...
Definition: IfxFce_Crc.c:53
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxFce_Crc_Config::isrPriority
uint16 isrPriority
interrupt priority
Definition: IfxFce_Crc.h:397
IfxFce_Crc_CrcConfig
Specifies the module configuration structure.
Definition: IfxFce_Crc.h:413


iLLD_TC26B: IfxFce_Crc.h Source File

  • Fce
  • Crc
IfxFce_Crc.h
Go to the documentation of this file.
1 /**
2 * \file IfxFce_Crc.h
3 * \brief FCE CRC details
4 * \ingroup IfxLld_Fce
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Fce_Crc_Usage How to use the FCE CRC Interface driver?
43 * \ingroup IfxLld_Fce
44 *
45 *
46 *
47 * FCE gives CRC-x(x= 8,16,32) message signatures. Kernel 3 is used for CRC-8,Kernel 2 is used for CRC-16,Kernel 0 1nd Kernel 1 is used for CRC-32.
48 *
49 * In the following sections it will be described, how to integrate the driver into the application framework.
50 *
51 * \section IfxLld_Fce_Fce_Preparation Preparation
52 * \subsection IfxLld_Fce_Fce_Include Include Files
53 *
54 * Include following header file into your C code:
55 *
56 * \code
57 * #include <Fce/Crc/IfxFce_Crc.h>
58 *
59 * \endcode
60 *
61 * \subsection IfxLld_Fce_Crc_Variables Variables
62 *
63 * Declare the FCE and CRC handles as global variable in your C code:
64 * \code
65 * // used globally
66 * static IfxFce_Crc fce;
67 * static IfxFce_Crc_Crc fceCrc32_0;
68 * static IfxFce_Crc_Crc fceCrc32_1;
69 * static IfxFce_Crc_Crc fceCrc16;
70 * static IfxFce_Crc_Crc fceCrc8;
71 * \endcode
72 *
73 * \subsection IfxLld_Fce_Crc_Interrupt Interrupt Handler Installation
74 *
75 * See also \ref IfxLld_Cpu_Irq_Usage
76 *
77 * Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
78 * \code
79 * // priorities are normally defined in Ifx_IntPrioDef.h
80 * #define IFX_INTPRIO_FCE 1
81 * \endcode
82 *
83 * Add the interrupt service routine to your C code which should do the error flag handling:
84 * \code
85 * IFX_INTERRUPT(fceISR, 0, IFX_INTPRIO_FCE)
86 * {
87 * {
88 * Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc32_0);
89 * if (interruptStatus.U )
90 * {
91 * if ( interruptStatus.B.CMF == 1)
92 * {
93 * // CRC Mismatch Error...!
94 * }
95 * if( interruptStatus.B.CEF == 1)
96 * {
97 * // Configuration Error...!
98 * }
99 * if ( interruptStatus.B.LEF == 1)
100 * {
101 * // Length Error...!
102 * }
103 * if ( interruptStatus.B.BEF == 1)
104 * {
105 * // Bus Error...!
106 * }
107 * }
108 * IfxFce_Crc_clearErrorFlags(&fceCrc32_0);
109 * }
110 *
111 * {
112 * Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc32_1);
113 * if (interruptStatus.U )
114 * {
115 * if ( interruptStatus.B.CMF == 1)
116 * {
117 * // CRC Mismatch Error...!
118 * }
119 * if( interruptStatus.B.CEF == 1)
120 * {
121 * // Configuration Error...!
122 * }
123 * if ( interruptStatus.B.LEF == 1)
124 * {
125 * // Length Error...!
126 * }
127 * if ( interruptStatus.B.BEF == 1)
128 * {
129 * // Bus Error...!
130 * }
131 * }
132 * IfxFce_Crc_clearErrorFlags(&fceCrc32_1);
133 * }
134 *
135 * {
136 * Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc16);
137 * if (interruptStatus.U )
138 * {
139 * if ( interruptStatus.B.CMF == 1)
140 * {
141 * // CRC Mismatch Error...!
142 * }
143 * if( interruptStatus.B.CEF == 1)
144 * {
145 * // Configuration Error...!
146 * }
147 * if ( interruptStatus.B.LEF == 1)
148 * {
149 * // Length Error...!
150 * }
151 * if ( interruptStatus.B.BEF == 1)
152 * {
153 * // Bus Error...!
154 * }
155 * }
156 * IfxFce_Crc_clearErrorFlags(&fceCrc16);
157 * }
158 *
159 * {
160 * Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc8);
161 * if (interruptStatus.U )
162 * {
163 * if ( interruptStatus.B.CMF == 1)
164 * {
165 * // CRC Mismatch Error...!
166 * }
167 * if( interruptStatus.B.CEF == 1)
168 * {
169 * // Configuration Error...!
170 * }
171 * if ( interruptStatus.B.LEF == 1)
172 * {
173 * // Length Error...!
174 * }
175 * if ( interruptStatus.B.BEF == 1)
176 * {
177 * // Bus Error...!
178 * }
179 * }
180 * IfxFce_Crc_clearErrorFlags(&fceCrc8);
181 * }
182 * }
183 * \endcode
184 *
185 * Finally install the interrupt handler in your initialisation function:
186 * \code
187 * // install interrupt handler
188 * IfxCpu_Irq_installInterruptHandler(fceISR, IFX_INTPRIO_FCE);
189 * IfxCpu_enableInterrupts();
190 * \endcode
191 *
192 * \subsection IfxLld_Fce_Fce_InitCrc Module Initialisation
193 *
194 * The module initialisation can be done in the same function. Here an example for all CRC kernels:
195 * \code
196 * // create module config
197 * IfxFce_Crc_Config fceConfig;
198 * IfxFce_Crc_initModuleConfig(&fceConfig, &MODULE_FCE0);
199 *
200 * // ISR priorities and interrupt target
201 * fceConfig.isrPriority = IFX_INTPRIO_FCE;
202 * fceConfig.isrTypeOfService = IfxCpu_Irq_getTos( IfxCpu_getCoreIndex());
203 *
204 * // initialize module
205 * //IfxFce_Crc fce; // defined globally
206 * IfxFce_Crc_initModule(&fce, &fceConfig);
207 *
208 * // initialize CRC kernels
209 * IfxFce_Crc_CrcConfig crcConfig;
210 * IfxFce_Crc_initCrcConfig(&crcConfig, &fce);
211 *
212 * //IfxFce_Crc_Crc fceCrc32_0; // defined globally
213 * IfxFce_Crc_initCrc(&fceCrc32_0, &crcConfig);
214 * //IfxFce_Crc_Crc fceCrc32_1; // defined globally
215 * crcConfig.crc32Kernel = IfxFce_Crc32Kernel_1;
216 *
217 *
218 * IfxFce_Crc_initCrc(&fceCrc32_1, &crcConfig);
219 * crcConfig.crc32Kernel = IfxFce_Crc32Kernel_0;
220 *
221 * //IfxFce_Crc_Crc fceCrc16; // defined globally
222 * crcConfig.crcMode = IfxFce_CrcMode_16;
223 * IfxFce_Crc_initCrc(&fceCrc16, &crcConfig);
224 *
225 * //IfxFce_Crc_Crc fceCrc8; // defined globally
226 * crcConfig.crcMode = IfxFce_CrcMode_8;
227 * crcConfig.useDma = TRUE; // Enable Dma transfer
228 * crcConfig.fceChannelId = IfxDma_ChannelId_0;
229 * IfxFce_Crc_initCrc(&fceCrc8, &crcConfig);
230 * \endcode
231 *
232 *
233 * \subsection IfxLld_Fce_Fce_ErrorIRQ Error Interrupt on CRC mismatch
234 *
235 * By default, all error interrupts aside from the CRC mismatch interrupt (CMF) are enabled.
236 *
237 * In order to use the CMF interrupt as well, the appr. error flag has to be enabled during configuration:
238 * \code
239 * // initialize CRC kernel with CRC check enabled
240 * IfxFce_Crc_CrcConfig crcConfig;
241 * IfxFce_Crc_initCrcConfig(&crcConfig, &fce);
242 * crcConfig.enabledInterrupts.crcMismatch = TRUE;
243 * IfxFce_Crc_initCrc(&fceCrc32_0, &crcConfig);
244 * \endcode
245 *
246 * And the expected CRC value has to be written into the expectedCrc field of the handle before the CRC calculation is started.
247 *
248 * \code
249 * {
250 * // Expected CRC:
251 * fceCrc32_0.expectedCrc = 0xd95def75;
252 *
253 * // do calculation
254 * uint32 fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_0, checkData, CHECK_DATA_SIZE, 0x00000000);
255 *
256 * // we can expect, that an error interrupt has been triggered if the CRC over checkData didn't match.
257 * }
258 * \endcode
259 *
260 * \subsection IfxLld_Fce_Fce_calculateCrc CRC Calculation
261 *
262 * Now, all 4 FCE kernels are configured and can be used to calculate CRC values.
263 *
264 * In following examples, CRC is calculated over following array:
265 * \code
266 * #define CHECK_DATA_SIZE 25 // declare this portion globally
267 * // if Dma is enabled, align memory to 32 byte
268 * uint32 checkData[CHECK_DATA_SIZE] = {
269 * 0xbe9957bb,
270 * 0x1c706c1e,
271 * 0x14c3db3f,
272 * 0x7fb17a93,
273 * 0xb0d9d5a7,
274 * 0x768093e0,
275 * 0x88b206a0,
276 * 0xc51299e4,
277 * 0xe8a97d48,
278 * 0x89367f27,
279 * 0x70095984,
280 * 0xec030f75,
281 * 0xdc22f8d4,
282 * 0xd951407b,
283 * 0x34ae18c6,
284 * 0x4d47ba7d,
285 * 0x0e2e4622,
286 * 0x4a2e90d3,
287 * 0xdaec3752,
288 * 0xcd3ed11c,
289 * 0x36b416b7,
290 * 0x8ea28658,
291 * 0xdd37eee3,
292 * 0x23928b62,
293 * 0x84eb4b22,
294 * };
295 * \endcode
296 *
297 * Function calls:
298 * \code
299 * // Common usage:
300 * {
301 * uint32 fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_0, checkData, CHECK_DATA_SIZE, 0x00000000);
302 *
303 * // -> CRC32 will be 0xd95def75
304 * }
305 *
306 * // Piecewise CRC calculation over two (more more) memory blocks.
307 * // Please note that the initial value requires a bytewise reflection, and an inversion whenever it's passed for the next calculation:
308 * {
309 * uint32 fceCrc;
310 *
311 * fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_1, (uint32 *)&checkData[0], CHECK_DATA_SIZE-10, 0x00000000);
312 * fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_1, (uint32 *)&checkData[CHECK_DATA_SIZE-10], 10, ~IfxFce_reflectCrc32(fceCrc, 32));
313 *
314 * // -> CRC32 will be 0xd95def75 (as well)
315 * }
316 *
317 * // using the CRC16 kernel
318 * {
319 * uint32 fceCrc;
320 *
321 * fceCrc = IfxFce_Crc_calculateCrc16(&fceCrc16, (uint16 *)checkData, CHECK_DATA_SIZE*2, 0x00000000);
322 *
323 * // -> CRC16 will be 0xda6f
324 * }
325 *
326 * // using the CRC8 kernel
327 * {
328 * uint32 fceCrc;
329 *
330 * fceCrc = IfxFce_Crc_calculateCrc8(&fceCrc8, (uint8 *)checkData, CHECK_DATA_SIZE*4, 0x00000000);
331 *
332 * // -> CRC8 will be 0x61
333 * }
334 * \endcode
335 *
336 * /
337 *
338 *
339 *
340 *
341 *
342 *
343 * \defgroup IfxLld_Fce_Crc CRC
344 * \ingroup IfxLld_Fce
345 * \defgroup IfxLld_Fce_Crc_DataStructures Data Structures
346 * \ingroup IfxLld_Fce_Crc
347 * \defgroup IfxLld_Fce_Crc_Module Module Initialise Functions
348 * \ingroup IfxLld_Fce_Crc
349 * \defgroup IfxLld_Fce_Crc_Operative CRC Operation Functions
350 * \ingroup IfxLld_Fce_Crc
351 * \defgroup IfxLld_Fce_Crc_Interrupt Interrupt Status Function
352 * \ingroup IfxLld_Fce_Crc
353 */
354
355 #ifndef IFXFCE_CRC_H
356 #define IFXFCE_CRC_H 1
357
358 /******************************************************************************/
359 /*----------------------------------Includes----------------------------------*/
360 /******************************************************************************/
361
362 #include "Fce/Std/IfxFce.h"
363 #include "Cpu/Irq/IfxCpu_Irq.h"
364
365 /******************************************************************************/
366 /*-----------------------------Data Structures--------------------------------*/
367 /******************************************************************************/
368
369 /** \addtogroup IfxLld_Fce_Crc_DataStructures
370 * \{ */
371 /** \brief Specifies the interrupt enable structure
372 */
373 typedef struct
374 {
375 boolean crcMismatch; /**< \brief Specifies enabel/disable of CRC mismatch interrupt */
376 boolean configError; /**< \brief Specifies enabel/disable of configuration error interrupt */
377 boolean lengthError; /**< \brief Specifies enabel/disable of length error interrupt */
378 boolean busError; /**< \brief Specifies enabel/disable of bus error interrupt */
379 } IfxFce_Crc_EnabledInterrupts;
380
381 /** \} */
382
383 /** \addtogroup IfxLld_Fce_Crc_DataStructures
384 * \{ */
385 /** \brief FCE Module Handle;
386 */
387 typedef struct
388 {
389 Ifx_FCE *fce; /**< \brief Pointer to FCE registers */
390 } IfxFce_Crc;
391
392 /** \brief Configuration structure of the module
393 */
394 typedef struct
395 {
396 Ifx_FCE *fce; /**< \brief Pointer to FCE registers */
397 uint16 isrPriority; /**< \brief interrupt priority */
398 IfxSrc_Tos isrTypeOfService; /**< \brief type of interrupt service */
399 } IfxFce_Crc_Config;
400
401 /** \brief Specifies the pointer to FCE module handler
402 */
403 typedef struct
404 {
405 Ifx_FCE *fce; /**< \brief Specifies pointer to FCE module registers */
406 IfxFce_CrcMode crcMode; /**< \brief Specifies the CRC mode */
407 uint32 expectedCrc; /**< \brief Specifies the expected CRC to be compared with resulted. */
408 IfxFce_Crc32Kernel crc32Kernel; /**< \brief Specifies the kernel used for CRC-32 */
409 } IfxFce_Crc_Crc;
410
411 /** \brief Specifies the module configuration structure
412 */
413 typedef struct
414 {
415 Ifx_FCE *fce; /**< \brief Specifies pointer to FCE module registers */
416 boolean crcCheckCompared; /**< \brief Specifies whether CRC check comparision is enabled or not */
417 boolean automaticLengthReload; /**< \brief Specifies the enable/disable of automatic length reload */
418 boolean dataByteReflectionEnabled; /**< \brief Specifies enable/disable of input data byte wise reflection */
419 boolean crc32BitReflectionEnabled; /**< \brief Specifies enable/disable of CRC 32-bit wise reflection */
420 uint32 expectedCrc; /**< \brief Specifies the expected CRC to be compared with resulted. */
421 IfxFce_CrcMode crcMode; /**< \brief Specifies the CRC mode */
422 boolean crcResultInverted; /**< \brief Specifies the XOR valueto get the final CRC */
423 IfxFce_Crc32Kernel crc32Kernel; /**< \brief Specifies the kernel used for CRC-32 */
424 IfxFce_Crc_EnabledInterrupts enabledInterrupts; /**< \brief Specifies the interrupt enable structure */
425 } IfxFce_Crc_CrcConfig;
426
427 /** \} */
428
429 /** \addtogroup IfxLld_Fce_Crc_Module
430 * \{ */
431
432 /******************************************************************************/
433 /*-------------------------Global Function Prototypes-------------------------*/
434 /******************************************************************************/
435
436 /** \brief Deinitialises the FCE module
437 * \param fce Specifies the pointer to FCE module handler
438 * \return None
439 *
440 * Reset the module
441 *
442 * \code
443 * IfxFce_Crc fce;
444 * //Deinitialise the module
445 * IfxFce_Crc_deInitModule(&fce);
446 * \endcode
447 *
448 */
449 IFX_EXTERN void IfxFce_Crc_deInitModule(IfxFce_Crc_Crc *fce);
450
451 /** \brief Initialise the FCE module for CRC computation according to CRC mode
452 * \param fceCrc Specifies the pointer to CRC handle
453 * \param crcConfig Specifies the FCE CRC configuration structure
454 * \return None
455 *
456 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
457 *
458 */
459 IFX_EXTERN void IfxFce_Crc_initCrc(IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig);
460
461 /** \brief Initialises the default CRC configuration buffer
462 * \param crcConfig Specifies the FCE CRC configuration structure
463 * \param fce Pointer to the FCE module handle
464 * \return None
465 *
466 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
467 *
468 */
469 IFX_EXTERN void IfxFce_Crc_initCrcConfig(IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce);
470
471 /** \brief Usage Example: see \ref IfxLld_Fce_Crc_Usage
472 * \param fce module handle
473 * \param config predefined configuration structure of the module
474 * \return None
475 */
476 IFX_EXTERN void IfxFce_Crc_initModule(IfxFce_Crc *fce, const IfxFce_Crc_Config *config);
477
478 /** \brief Fills the config structure with default values
479 * \param config configuration structure of the module
480 * \param fce pointer to FCE registers
481 * \return None
482 *
483 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
484 *
485 */
486 IFX_EXTERN void IfxFce_Crc_initModuleConfig(IfxFce_Crc_Config *config, Ifx_FCE *fce);
487
488 /** \} */
489
490 /** \addtogroup IfxLld_Fce_Crc_Operative
491 * \{ */
492
493 /******************************************************************************/
494 /*-------------------------Global Function Prototypes-------------------------*/
495 /******************************************************************************/
496
497 /** \brief Calculate the XORed 16-bit CRC value and returns it. It takes the precomputed XORed and reversed.
498 * \param fce Specifies the pointer to FCE module handler
499 * \param crcData Length of the input data block
500 * \param crcDataLength Length of the input data block
501 * \param crcStartValue start value for CRC calculation
502 * \return Final CRC after XORed with XOR value.
503 *
504 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
505 *
506 */
507 IFX_EXTERN uint16 IfxFce_Crc_calculateCrc16(IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue);
508
509 /** \brief Calculate the XORed 32-bit CRC value and returns it. It takes the precomputed XORed and reversed.
510 * \param fce Specifies the pointer to FCE module handler
511 * \param crcData pointer to the input data block
512 * \param crcDataLength Length of the input data block
513 * \param crcStartValue start value for CRC calculation
514 * \return Final CRC after XORed with XOR value.
515 *
516 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
517 *
518 */
519 IFX_EXTERN uint32 IfxFce_Crc_calculateCrc32(IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue);
520
521 /** \brief Calculate the XORed 8-bit CRC value and returns it. It takes the precomputed XORed and reversed.
522 * \param fce Specifies the pointer to FCE module handler
523 * \param crcData Length of the input data block
524 * \param crcDataLength Length of the input data block
525 * \param crcStartValue start value for CRC calculation
526 * \return Final CRC after XORed with XOR value.
527 *
528 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
529 *
530 */
531 IFX_EXTERN uint8 IfxFce_Crc_calculateCrc8(IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue);
532
533 /** \} */
534
535 /** \addtogroup IfxLld_Fce_Crc_Interrupt
536 * \{ */
537
538 /******************************************************************************/
539 /*-------------------------Global Function Prototypes-------------------------*/
540 /******************************************************************************/
541
542 /** \brief Clears the error flags
543 * \param fce Specifies the pointer to FCE module handler
544 * \return None
545 *
546 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
547 *
548 */
549 IFX_EXTERN void IfxFce_Crc_clearErrorFlags(IfxFce_Crc_Crc *fce);
550
551 /** \brief Gets the current CRC interrupt status.
552 * \param fce Specifies the pointer to FCE module handler
553 * \return Current interrupt status
554 *
555 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
556 *
557 */
558 IFX_EXTERN Ifx_FCE_STS IfxFce_Crc_getInterruptStatus(IfxFce_Crc_Crc *fce);
559
560 /** \} */
561
562 #endif /* IFXFCE_CRC_H */
IfxFce_Crc_Config::isrTypeOfService
IfxSrc_Tos isrTypeOfService
type of interrupt service
Definition: IfxFce_Crc.h:398
IfxFce_Crc_EnabledInterrupts
Specifies the interrupt enable structure.
Definition: IfxFce_Crc.h:373
IfxFce_Crc::fce
Ifx_FCE * fce
Pointer to FCE registers.
Definition: IfxFce_Crc.h:389
IfxFce_Crc_Crc
Specifies the pointer to FCE module handler.
Definition: IfxFce_Crc.h:403
IfxFce_Crc_calculateCrc32
IFX_EXTERN uint32 IfxFce_Crc_calculateCrc32(IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue)
Calculate the XORed 32-bit CRC value and returns it. It takes the precomputed XORed and reversed...
Definition: IfxFce_Crc.c:81
IfxFce_CrcMode
IfxFce_CrcMode
Specifies the CRC mode.
Definition: IfxFce.h:81
IfxFce_Crc_getInterruptStatus
IFX_EXTERN Ifx_FCE_STS IfxFce_Crc_getInterruptStatus(IfxFce_Crc_Crc *fce)
Gets the current CRC interrupt status.
Definition: IfxFce_Crc.c:183
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxFce_Crc_Crc::expectedCrc
uint32 expectedCrc
Specifies the expected CRC to be compared with resulted.
Definition: IfxFce_Crc.h:407
IfxFce_Crc_initCrcConfig
IFX_EXTERN void IfxFce_Crc_initCrcConfig(IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
Initialises the default CRC configuration buffer.
Definition: IfxFce_Crc.c:249
IfxFce_Crc_EnabledInterrupts::lengthError
boolean lengthError
Specifies enabel/disable of length error interrupt.
Definition: IfxFce_Crc.h:377
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxFce_Crc_initCrc
IFX_EXTERN void IfxFce_Crc_initCrc(IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
Initialise the FCE module for CRC computation according to CRC mode.
Definition: IfxFce_Crc.c:200
IfxFce_Crc_CrcConfig::automaticLengthReload
boolean automaticLengthReload
Specifies the enable/disable of automatic length reload.
Definition: IfxFce_Crc.h:417
IfxFce_Crc_clearErrorFlags
IFX_EXTERN void IfxFce_Crc_clearErrorFlags(IfxFce_Crc_Crc *fce)
Clears the error flags.
Definition: IfxFce_Crc.c:160
IfxFce_Crc_calculateCrc8
IFX_EXTERN uint8 IfxFce_Crc_calculateCrc8(IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue)
Calculate the XORed 8-bit CRC value and returns it. It takes the precomputed XORed and reversed...
Definition: IfxFce_Crc.c:131
IfxFce_Crc_CrcConfig::dataByteReflectionEnabled
boolean dataByteReflectionEnabled
Specifies enable/disable of input data byte wise reflection.
Definition: IfxFce_Crc.h:418
IfxFce_Crc_CrcConfig::crcResultInverted
boolean crcResultInverted
Specifies the XOR valueto get the final CRC.
Definition: IfxFce_Crc.h:422
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxFce_Crc_CrcConfig::enabledInterrupts
IfxFce_Crc_EnabledInterrupts enabledInterrupts
Specifies the interrupt enable structure.
Definition: IfxFce_Crc.h:424
IfxFce_Crc_Config
Configuration structure of the module.
Definition: IfxFce_Crc.h:394
IfxFce_Crc32Kernel
IfxFce_Crc32Kernel
Ifx_FCE_INx(x= 0,1), Specifies the kernel used for CRC-32.
Definition: IfxFce.h:73
IfxFce_Crc_initModule
IFX_EXTERN void IfxFce_Crc_initModule(IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
Usage Example: see How to use the FCE CRC Interface driver?.
Definition: IfxFce_Crc.c:265
IfxFce_Crc
FCE Module Handle;.
Definition: IfxFce_Crc.h:387
IfxFce_Crc_EnabledInterrupts::configError
boolean configError
Specifies enabel/disable of configuration error interrupt.
Definition: IfxFce_Crc.h:376
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxFce_Crc_EnabledInterrupts::busError
boolean busError
Specifies enabel/disable of bus error interrupt.
Definition: IfxFce_Crc.h:378
IfxFce_Crc_deInitModule
IFX_EXTERN void IfxFce_Crc_deInitModule(IfxFce_Crc_Crc *fce)
Deinitialises the FCE module.
Definition: IfxFce_Crc.c:177
IfxFce_Crc_initModuleConfig
IFX_EXTERN void IfxFce_Crc_initModuleConfig(IfxFce_Crc_Config *config, Ifx_FCE *fce)
Fills the config structure with default values.
Definition: IfxFce_Crc.c:278
IfxFce_Crc_CrcConfig::crcCheckCompared
boolean crcCheckCompared
Specifies whether CRC check comparision is enabled or not.
Definition: IfxFce_Crc.h:416
IfxFce_Crc_CrcConfig::crc32BitReflectionEnabled
boolean crc32BitReflectionEnabled
Specifies enable/disable of CRC 32-bit wise reflection.
Definition: IfxFce_Crc.h:419
IfxCpu_Irq.h
This file contains the APIs for Interrupt related functions.
IfxFce.h
FCE basic functionality.
IfxFce_Crc_Crc::crcMode
IfxFce_CrcMode crcMode
Specifies the CRC mode.
Definition: IfxFce_Crc.h:406
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxFce_Crc_Crc::crc32Kernel
IfxFce_Crc32Kernel crc32Kernel
Specifies the kernel used for CRC-32.
Definition: IfxFce_Crc.h:408
IfxFce_Crc_EnabledInterrupts::crcMismatch
boolean crcMismatch
Specifies enabel/disable of CRC mismatch interrupt.
Definition: IfxFce_Crc.h:375
IfxFce_Crc_calculateCrc16
IFX_EXTERN uint16 IfxFce_Crc_calculateCrc16(IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue)
Calculate the XORed 16-bit CRC value and returns it. It takes the precomputed XORed and reversed...
Definition: IfxFce_Crc.c:53
IfxFce_Crc_Config::isrPriority
uint16 isrPriority
interrupt priority
Definition: IfxFce_Crc.h:397
IfxFce_Crc_CrcConfig
Specifies the module configuration structure.
Definition: IfxFce_Crc.h:413


iLLD_TC26B: IfxFce_cfg.h Source File

  • _Impl
IfxFce_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxFce_cfg.h
3 * \brief FCE on-chip implementation data
4 * \ingroup IfxLld_Fce
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Fce FCE
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Fce_Impl Implementation
44 * \ingroup IfxLld_Fce
45 * \defgroup IfxLld_Fce_Std Standard Driver
46 * \ingroup IfxLld_Fce
47 */
48
49 #ifndef IFXFCE_CFG_H
50 #define IFXFCE_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 /******************************************************************************/
57 /*-----------------------------------Macros-----------------------------------*/
58 /******************************************************************************/
59
60 #define IFXFCE_NUM_KERNEL (4)
61
62 #define IFXFCE_NUM_MODULES (1)
63
64 #endif /* IFXFCE_CFG_H */


iLLD_TC26B: IfxFft.c Source File

  • Fft
  • Std
IfxFft.c
Go to the documentation of this file.
1 /**
2 * \file IfxFft.c
3 * \brief FFT basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxFft.h"
IfxFft.h
FFT basic functionality.


iLLD_TC26B: IfxFft.h Source File

  • Fft
  • Std
IfxFft.h
Go to the documentation of this file.
1 /**
2 * \file IfxFft.h
3 * \brief FFT basic functionality
4 * \ingroup IfxLld_Fft
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Fft_Std_Enumerations Enumerations
42 * \ingroup IfxLld_Fft_Std
43 * \defgroup IfxLld_Fft_Std_UtilityFunctions Utility Functions
44 * \ingroup IfxLld_Fft_Std
45 */
46
47 #ifndef IFXFFT_H
48 #define IFXFFT_H 1
49
50 /******************************************************************************/
51 /*----------------------------------Includes----------------------------------*/
52 /******************************************************************************/
53
54 #include "_Impl/IfxFft_cfg.h"
55 #include "Cpu/Std/IfxCpu_Intrinsics.h"
56 #include "Src/Std/IfxSrc.h"
57 #include "IfxFft_reg.h"
58 #include "IfxLmu_reg.h"
59 #include "Scu/Std/IfxScuWdt.h"
60
61 /******************************************************************************/
62 /*--------------------------------Enumerations--------------------------------*/
63 /******************************************************************************/
64
65 /** \addtogroup IfxLld_Fft_Std_Enumerations
66 * \{ */
67 /** \brief Input format
68 * Definition in Ifx_FFT.CSR.B.IN.FMT
69 */
70 typedef enum
71 {
72 IfxFft_Input_complexSInt32 = 0, /**< \brief 1 complex 32-bit data per 64-bit word */
73 IfxFft_Input_realSInt32 = 1, /**< \brief 2 real 32-bit data per 64-bit word */
74 IfxFft_Input_complexSInt16 = 2, /**< \brief 2 complex 16-bit data per 64-bit word */
75 IfxFft_Input_realSInt16 = 3 /**< \brief 4 real 16-bit data per 64-bit word */
76 } IfxFft_Input;
77
78 /** \brief Length of transform. Log base 2 of the required transform size.
79 * Length must be between 3 (transform of 8) and 11 (transform of 2048).
80 * Definition in Ifx_FFT.CSR.B.LENGTH
81 */
82 typedef enum
83 {
84 IfxFft_Length_8 = 3, /**< \brief transform of 8 */
85 IfxFft_Length_16 = 4, /**< \brief transform of 16 */
86 IfxFft_Length_32 = 5, /**< \brief transform of 32 */
87 IfxFft_Length_64 = 6, /**< \brief transform of 64 */
88 IfxFft_Length_128 = 7, /**< \brief transform of 128 */
89 IfxFft_Length_256 = 8, /**< \brief transform of 256 */
90 IfxFft_Length_512 = 9, /**< \brief transform of 512 */
91 IfxFft_Length_1024 = 10 /**< \brief transform of 1024 */
92 } IfxFft_Length;
93
94 /** \brief Operation (FFT / IFFT)
95 * Definition in Ifx_FFT.CSR.B.IFFT
96 */
97 typedef enum
98 {
99 IfxFft_Operation_fft = 0, /**< \brief perform FFT */
100 IfxFft_Operation_ifft = 1 /**< \brief perform IFFT */
101 } IfxFft_Operation;
102
103 /** \brief Output format
104 * Definition in Ifx_FFT.CSR.B.OUT.FMT
105 */
106 typedef enum
107 {
108 IfxFft_Output_complexSInt32 = 0, /**< \brief 1 complex 32-bit data per 64-bit word */
109 IfxFft_Output_complexSInt16 = 1 /**< \brief 2 complex 16-bit data per 64-bit word */
110 } IfxFft_Output;
111
112 /** \brief OCDS Suspend Control (OCDS.SUS)
113 */
114 typedef enum
115 {
116 IfxFft_SuspendMode_none = 0, /**< \brief No suspend */
117 IfxFft_SuspendMode_hard = 1, /**< \brief Hard Suspend */
118 IfxFft_SuspendMode_soft = 2 /**< \brief Soft Suspend */
119 } IfxFft_SuspendMode;
120
121 /** \} */
122
123 /** \addtogroup IfxLld_Fft_Std_UtilityFunctions
124 * \{ */
125
126 /******************************************************************************/
127 /*-------------------------Inline Function Prototypes-------------------------*/
128 /******************************************************************************/
129
130 /** \brief Disables the FFT module and also the LMU interface
131 * \param fft pointer to FFT registers
132 * \param lmu pointer to LMU registers
133 * \return None
134 */
135 IFX_INLINE void IfxFft_disableModule(Ifx_FFT *fft, Ifx_LMU *lmu);
136
137 /** \brief Enables the FFT module and also the LMU interface
138 * \param fft pointer to FFT registers
139 * \param lmu pointer to LMU registers
140 * \return None
141 */
142 IFX_INLINE void IfxFft_enableModule(Ifx_FFT *fft, Ifx_LMU *lmu);
143
144 /** \brief Returns the input format
145 * \param fft pointer to FFT registers
146 * \return Input format
147 */
148 IFX_INLINE IfxFft_Input IfxFft_getInputFormat(Ifx_FFT *fft);
149
150 /** \brief Returns the length of the transform (length code, 3 to 10)
151 * \param fft pointer to FFT registers
152 * \return Length of the transform (length code)
153 */
154 IFX_INLINE IfxFft_Length IfxFft_getLength(Ifx_FFT *fft);
155
156 /** \brief Converts the given input length into the transform length code, to write into Ifx_FFT.CSR.B.LENGTH
157 * \param length Input length of the transform
158 * \return Length of the transform (code, 3 to 10)
159 */
160 IFX_INLINE IfxFft_Length IfxFft_getLengthCode(uint16 length);
161
162 /** \brief Retruns the actual length of the transform from the length code
163 * \param length Length of transform
164 * \return Actual length of the transform
165 */
166 IFX_INLINE uint16 IfxFft_getLengthFromCode(IfxFft_Length length);
167
168 /** \brief Returns the output format
169 * \param fft pointer to FFT registers
170 * \return Output format
171 */
172 IFX_INLINE IfxFft_Output IfxFft_getOutputFormat(Ifx_FFT *fft);
173
174 /** \brief Returns the status of FFT DONE request
175 * \param fft pointer to FFT registers
176 * \return Status of FFT DONE request
177 */
178 IFX_INLINE volatile Ifx_SRC_SRCR *IfxFft_getSrcPointerDone(Ifx_FFT *fft);
179
180 /** \brief Returns the status of FFT RFS request
181 * \param fft pointer to FFT registers
182 * \return Status of FFT RFS request
183 */
184 IFX_INLINE volatile Ifx_SRC_SRCR *IfxFft_getSrcPointerRfs(Ifx_FFT *fft);
185
186 /** \brief Returns the actual length of the transform
187 * \param fft pointer to FFT registers
188 * \return Actual length of the transform ()
189 */
190 IFX_INLINE uint16 IfxFft_getTransformLength(Ifx_FFT *fft);
191
192 /** \brief Returns the status of whether the FFT Engine is Idle or has at least one transform in operation.
193 * \param fft pointer to FFT registers
194 * \return (true / false)
195 */
196 IFX_INLINE boolean IfxFft_isEngineBusy(Ifx_FFT *fft);
197
198 /** \brief Returns the status of whether the module is enabled or not
199 * \param fft pointer to FFT registers
200 * \return (true / false)
201 */
202 IFX_INLINE boolean IfxFft_isModuleEnabled(Ifx_FFT *fft);
203
204 /** \brief Returns the module's suspend state.
205 * TRUE :if module is suspended.
206 * FALSE:if module is not yet suspended.
207 * \param fft Pointer to FFT module registers
208 * \return Suspend status (TRUE / FALSE)
209 */
210 IFX_INLINE boolean IfxFft_isModuleSuspended(Ifx_FFT *fft);
211
212 /** \brief Returns the status of whether the module can accept a START operation or not
213 * \param fft Pointer to FFT registers
214 * \return (true / false)
215 */
216 IFX_INLINE boolean IfxFft_isReadyForStart(Ifx_FFT *fft);
217
218 /** \brief Configure the Module to Hard/Soft suspend mode.
219 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
220 * \param fft Pointer to FFT module registers
221 * \param mode Module suspend mode
222 * \return None
223 */
224 IFX_INLINE void IfxFft_setSuspendMode(Ifx_FFT *fft, IfxFft_SuspendMode mode);
225
226 /** \} */
227
228 /******************************************************************************/
229 /*---------------------Inline Function Implementations------------------------*/
230 /******************************************************************************/
231
232 IFX_INLINE void IfxFft_disableModule(Ifx_FFT *fft, Ifx_LMU *lmu)
233 {
234 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
235 IfxScuWdt_clearCpuEndinit(password);
236 // FFT clock disable
237 fft->CLC.B.DISR = 1;
238 IfxScuWdt_setCpuEndinit(password);
239 }
240
241
242 IFX_INLINE void IfxFft_enableModule(Ifx_FFT *fft, Ifx_LMU *lmu)
243 {
244 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
245 IfxScuWdt_clearCpuEndinit(password);
246 // FFT clock enable
247 fft->CLC.U = 0x0;
248 IfxScuWdt_setCpuEndinit(password);
249 }
250
251
252 IFX_INLINE IfxFft_Input IfxFft_getInputFormat(Ifx_FFT *fft)
253 {
254 return (IfxFft_Input)fft->CSR.B.IN_FMT;
255 }
256
257
258 IFX_INLINE IfxFft_Length IfxFft_getLength(Ifx_FFT *fft)
259 {
260 return (IfxFft_Length)fft->CSR.B.LENGTH;
261 }
262
263
264 IFX_INLINE IfxFft_Length IfxFft_getLengthCode(uint16 length)
265 {
266 return (IfxFft_Length)(31 - __clz((uint32)length));
267 }
268
269
270 IFX_INLINE uint16 IfxFft_getLengthFromCode(IfxFft_Length length)
271 {
272 return 1 << (uint32)length;
273 }
274
275
276 IFX_INLINE IfxFft_Output IfxFft_getOutputFormat(Ifx_FFT *fft)
277 {
278 return (IfxFft_Output)fft->CSR.B.OUT_FMT;
279 }
280
281
282 IFX_INLINE volatile Ifx_SRC_SRCR *IfxFft_getSrcPointerDone(Ifx_FFT *fft)
283 {
284 // only a single FFT available, therefore no check for the fft pointer required
285 return &MODULE_SRC.FFT.FFT[0].DONE;
286 }
287
288
289 IFX_INLINE volatile Ifx_SRC_SRCR *IfxFft_getSrcPointerRfs(Ifx_FFT *fft)
290 {
291 // only a single FFT available, therefore no check for the fft pointer required
292 return &MODULE_SRC.FFT.FFT[0].RFS;
293 }
294
295
296 IFX_INLINE uint16 IfxFft_getTransformLength(Ifx_FFT *fft)
297 {
298 return 1U << fft->CSR.B.LENGTH;
299 }
300
301
302 IFX_INLINE boolean IfxFft_isEngineBusy(Ifx_FFT *fft)
303 {
304 return fft->CSR.B.BUSY != 0;
305 }
306
307
308 IFX_INLINE boolean IfxFft_isModuleEnabled(Ifx_FFT *fft)
309 {
310 return fft->CLC.B.DISS == 0;
311 }
312
313
314 IFX_INLINE boolean IfxFft_isModuleSuspended(Ifx_FFT *fft)
315 {
316 Ifx_FFT_OCS ocs;
317
318 // read the status
319 ocs.U = fft->OCS.U;
320
321 // return the status
322 return ocs.B.SUSSTA;
323 }
324
325
326 IFX_INLINE boolean IfxFft_isReadyForStart(Ifx_FFT *fft)
327 {
328 return fft->CSR.B.RFS != 0;
329 }
330
331
332 IFX_INLINE void IfxFft_setSuspendMode(Ifx_FFT *fft, IfxFft_SuspendMode mode)
333 {
334 Ifx_FFT_OCS ocs;
335
336 // remove protection and configure the suspend mode.
337 ocs.B.SUS_P = 1;
338 ocs.B.SUS = mode;
339 fft->OCS.U = ocs.U;
340 }
341
342
343 #endif /* IFXFFT_H */
IfxFft_isModuleEnabled
IFX_INLINE boolean IfxFft_isModuleEnabled(Ifx_FFT *fft)
Returns the status of whether the module is enabled or not.
Definition: IfxFft.h:308
IfxFft_Output_complexSInt16
2 complex 16-bit data per 64-bit word
Definition: IfxFft.h:109
IfxFft_disableModule
IFX_INLINE void IfxFft_disableModule(Ifx_FFT *fft, Ifx_LMU *lmu)
Disables the FFT module and also the LMU interface.
Definition: IfxFft.h:232
IfxFft_getTransformLength
IFX_INLINE uint16 IfxFft_getTransformLength(Ifx_FFT *fft)
Returns the actual length of the transform.
Definition: IfxFft.h:296
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
IfxFft_Input_realSInt16
4 real 16-bit data per 64-bit word
Definition: IfxFft.h:75
IfxFft_getInputFormat
IFX_INLINE IfxFft_Input IfxFft_getInputFormat(Ifx_FFT *fft)
Returns the input format.
Definition: IfxFft.h:252
IfxFft_getSrcPointerDone
IFX_INLINE volatile Ifx_SRC_SRCR * IfxFft_getSrcPointerDone(Ifx_FFT *fft)
Returns the status of FFT DONE request.
Definition: IfxFft.h:282
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxFft_getSrcPointerRfs
IFX_INLINE volatile Ifx_SRC_SRCR * IfxFft_getSrcPointerRfs(Ifx_FFT *fft)
Returns the status of FFT RFS request.
Definition: IfxFft.h:289
IfxFft_SuspendMode_none
No suspend.
Definition: IfxFft.h:116
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxFft_getLengthFromCode
IFX_INLINE uint16 IfxFft_getLengthFromCode(IfxFft_Length length)
Retruns the actual length of the transform from the length code.
Definition: IfxFft.h:270
IfxSrc.h
SRC basic functionality.
IfxFft_enableModule
IFX_INLINE void IfxFft_enableModule(Ifx_FFT *fft, Ifx_LMU *lmu)
Enables the FFT module and also the LMU interface.
Definition: IfxFft.h:242
IfxCpu_Intrinsics.h
IfxFft_SuspendMode
IfxFft_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxFft.h:114
IfxFft_Length_16
transform of 16
Definition: IfxFft.h:85
IfxFft_Operation
IfxFft_Operation
Operation (FFT / IFFT) Definition in Ifx_FFT.CSR.B.IFFT.
Definition: IfxFft.h:97
IfxScuWdt.h
SCU basic functionality.
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxFft_Input_complexSInt32
1 complex 32-bit data per 64-bit word
Definition: IfxFft.h:72
IfxFft_Length_512
transform of 512
Definition: IfxFft.h:90
IfxFft_Length_256
transform of 256
Definition: IfxFft.h:89
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxFft_Output
IfxFft_Output
Output format Definition in Ifx_FFT.CSR.B.OUT.FMT.
Definition: IfxFft.h:106
IfxFft_getOutputFormat
IFX_INLINE IfxFft_Output IfxFft_getOutputFormat(Ifx_FFT *fft)
Returns the output format.
Definition: IfxFft.h:276
IfxFft_Output_complexSInt32
1 complex 32-bit data per 64-bit word
Definition: IfxFft.h:108
IfxFft_isEngineBusy
IFX_INLINE boolean IfxFft_isEngineBusy(Ifx_FFT *fft)
Returns the status of whether the FFT Engine is Idle or has at least one transform in operation...
Definition: IfxFft.h:302
IfxFft_Operation_fft
perform FFT
Definition: IfxFft.h:99
IfxFft_getLength
IFX_INLINE IfxFft_Length IfxFft_getLength(Ifx_FFT *fft)
Returns the length of the transform (length code, 3 to 10)
Definition: IfxFft.h:258
IfxFft_Input_realSInt32
2 real 32-bit data per 64-bit word
Definition: IfxFft.h:73
IfxFft_getLengthCode
IFX_INLINE IfxFft_Length IfxFft_getLengthCode(uint16 length)
Converts the given input length into the transform length code, to write into Ifx_FFT.CSR.B.LENGTH.
Definition: IfxFft.h:264
IfxFft_isModuleSuspended
IFX_INLINE boolean IfxFft_isModuleSuspended(Ifx_FFT *fft)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxFft.h:314
IfxFft_Length
IfxFft_Length
Length of transform. Log base 2 of the required transform size. Length must be between 3 (transform o...
Definition: IfxFft.h:82
IfxFft_Length_32
transform of 32
Definition: IfxFft.h:86
IfxFft_isReadyForStart
IFX_INLINE boolean IfxFft_isReadyForStart(Ifx_FFT *fft)
Returns the status of whether the module can accept a START operation or not.
Definition: IfxFft.h:326
IfxFft_Length_1024
transform of 1024
Definition: IfxFft.h:91
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxFft_SuspendMode_hard
Hard Suspend.
Definition: IfxFft.h:117
IfxFft_Operation_ifft
perform IFFT
Definition: IfxFft.h:100
IfxFft_cfg.h
FFT on-chip implementation data.
IfxFft_Length_128
transform of 128
Definition: IfxFft.h:88
IfxFft_Length_64
transform of 64
Definition: IfxFft.h:87
IfxFft_Input
IfxFft_Input
Input format Definition in Ifx_FFT.CSR.B.IN.FMT.
Definition: IfxFft.h:70
IfxFft_SuspendMode_soft
Soft Suspend.
Definition: IfxFft.h:118
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxFft_Input_complexSInt16
2 complex 16-bit data per 64-bit word
Definition: IfxFft.h:74
IfxFft_setSuspendMode
IFX_INLINE void IfxFft_setSuspendMode(Ifx_FFT *fft, IfxFft_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxFft.h:332
IfxFft_Length_8
transform of 8
Definition: IfxFft.h:84


iLLD_TC26B: IfxFft_Fft.c Source File

  • Fft
  • Fft
IfxFft_Fft.c
Go to the documentation of this file.
1 /**
2 * \file IfxFft_Fft.c
3 * \brief FFT FFT details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxFft_Fft.h"
47
48 /******************************************************************************/
49 /*----------------------------------Macros------------------------------------*/
50 /******************************************************************************/
51
52 #define IFXFFT_FFT_DATA_TRANSFER (*((volatile uint64 *)IFXFFT_DATA_SPACE))
53
54 #define IFXFFT_FFT_WINDOW_TRANSFER (*((volatile uint64 *)IFXFFT_WINDOW_SPACE))
55
56 #define IFXFFT_FFT_DMADISCARDCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE + 2)
57
58 #define IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE + 1)
59
60 #define IFXFFT_FFT_DMAINPUTCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE)
61
62 #define IFXFFT_FFT_DMADISCARDCHANNELID (dmaDiscard->channelId)
63
64 #define IFXFFT_FFT_DMAOUTPUTCHANNELID (dmaOutput->channelId)
65
66 #define IFXFFT_FFT_DMAINPUTCHANNELID (dmaInput->channelId)
67
68 #define IFXFFT_FFT_MOVE_BTR4 1
69
70 #define IFXFFT_FFT_MOVE_SIZE IfxDma_ChannelMoveSize_256bit
71
72 #define IFXFFT_FFT_MOVE_DIV 4
73
74 #define IFXFFT_FFT_ISALIGNED(address) ((Ifx_AlignOn256((uint32)address) == (uint32)address))
75
76 /** \addtogroup IfxLld_Fft_Fft_ModuleFunctions
77 * \{ */
78
79 /******************************************************************************/
80 /*-----------------------Private Function Prototypes--------------------------*/
81 /******************************************************************************/
82
83 /** \brief Configures the CSR register
84 * \param config Configuration structure for the FFT job
85 * \return Desired value to write into the Ifx_FFT.CSR register
86 */
87 IFX_STATIC uint32 IfxFft_Fft_calcCSR(const IfxFft_Fft_JobConfig *config);
88
89 /** \} */
90
91 /** \addtogroup IfxLld_Fft_Fft_TransformFuntions
92 * \{ */
93
94 /******************************************************************************/
95 /*-----------------------Private Function Prototypes--------------------------*/
96 /******************************************************************************/
97
98 /** \brief Unloads output data from the FFT engine
99 * \param job FFT job handle
100 * \return None
101 */
102 IFX_STATIC void IfxFft_Fft_unloadOutput(IfxFft_Fft_Job *job);
103
104 /** \brief Loads input data into the FFT engine
105 * \param job FFT job handle
106 * \return None
107 */
108 IFX_STATIC void IfxFft_Fft_loadInput(IfxFft_Fft_Job *job);
109
110 /** \} */
111
112 /******************************************************************************/
113 /*-----------------------Private Function Prototypes--------------------------*/
114 /******************************************************************************/
115
116 /** \brief Calculates the input counters and output counters
117 * \param job job FFT job
118 * \param jobConfig jobConfig Pointer to the job configuration
119 * \return None
120 */
121 IFX_STATIC void IfxFft_Fft_calcCounters(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig);
122
123 /******************************************************************************/
124 /*------------------------Private Variables/Constants-------------------------*/
125 /******************************************************************************/
126
127 IFX_STATIC uint64 IfxFft_Fft_dummy256[IFXFFT_FFT_MOVE_DIV];
128
129 /******************************************************************************/
130 /*-------------------------Function Implementations---------------------------*/
131 /******************************************************************************/
132
133 IFX_STATIC uint32 IfxFft_Fft_calcCSR(const IfxFft_Fft_JobConfig *config)
134 {
135 uint32 csr =
136 (config->fftLength << IFX_FFT_CSR_LENGTH_OFF) |
137 (config->inputFormat << IFX_FFT_CSR_IN_FMT_OFF) |
138 (config->outputFormat << IFX_FFT_CSR_OUT_FMT_OFF) |
139 (config->operation << IFX_FFT_CSR_IFFT_OFF) |
140 ((config->useWindowFunction ? 0U : 1U) << IFX_FFT_CSR_WIN_BYP_OFF);
141 return csr;
142 }
143
144
145 void IfxFft_Fft_cloneAndLinkJobs(IfxFft_Fft_Job *originalJob, IfxFft_Fft_Job *newJob)
146 {
147 *newJob = *originalJob;
148 originalJob->nextJob = newJob;
149 }
150
151
152 IFX_STATIC void IfxFft_Fft_unloadOutput(IfxFft_Fft_Job *job)
153 {
154 #if IFXFFT_FFT_DMA_SUPPORT
155 #if IFXFFT_FFT_HW_EXEC
156 volatile Ifx_SRC_SRCR *srcr;
157 sint16 discardCount;
158
159 #if !IFXFFT_FFT_OPTIMIZED
160 IfxDma_Dma_Channel *dmaOutput = &(job->fft->outputDmaChannel);
161 IfxDma_Dma_Channel *dmaDiscard = &(job->fft->discardDmaChannel);
162 Ifx_DMA *dmaSFR = dmaOutput->dma;
163 #else
164 Ifx_DMA *dmaSFR = (&MODULE_DMA);
165 #endif
166 #if IFXFFT_FFT_OPTIMIZED
167 IfxDma_setChannelDestinationAddress(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT, job->outputPtr);
168 IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT, job->count64.output);
169 #else
170 IfxDma_setChannelDestinationAddress(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID, job->outputPtr);
171 IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID, job->count64.output);
172 #endif
173 discardCount = (job->count64.result - job->count64.output);
174
175 if (discardCount > 0)
176 {
177 #if IFXFFT_FFT_OPTIMIZED
178 IfxDma_setChannelDestinationAddress(dmaSFR, IFXFFT_FFT_DMADISCARDCHANNELID_OPT, IfxFft_Fft_dummy256);
179 IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMADISCARDCHANNELID_OPT, discardCount);
180 #else
181 IfxDma_setChannelDestinationAddress(dmaSFR, IFXFFT_FFT_DMADISCARDCHANNELID, IfxFft_Fft_dummy256);
182 IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMADISCARDCHANNELID, discardCount);
183 #endif
184
185 #if IFXFFT_FFT_OPTIMIZED
186 srcr = IfxDma_getSrcPointer(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT);
187 #else
188 srcr = IfxDma_getSrcPointer(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID);
189 #endif
190 srcr->B = job->fft->srcrOutDis;
191 }
192 else
193 {
194 #if IFXFFT_FFT_OPTIMIZED
195 srcr = IfxDma_getSrcPointer(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT);
196 #else
197 srcr = IfxDma_getSrcPointer(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID);
198 #endif
199 srcr->B = job->fft->srcrOutEnd;
200 }
201
202 #if IFXFFT_FFT_OPTIMIZED
203 IfxDma_startChannelTransaction(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT);
204 #else
205 IfxDma_startChannelTransaction(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID);
206 #endif
207 #endif
208
209 #else
210 sint16 i;
211 uint64 *output64;
212
213 output64 = job->outputPtr;
214
215 for (i = 0; i < job->count64.output; i++)
216 {
217 *(output64++) = IFXFFT_FFT_DATA_TRANSFER;
218 }
219
220 for ( ; i < job->count64.result; i++)
221 {
222 volatile uint64 dummy64 = IFXFFT_FFT_DATA_TRANSFER;
223
224 if (dummy64) // avoid warning message (unused variable)
225 {}
226 }
227
228 #endif
229 }
230
231
232 void IfxFft_Fft_initJob(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
233 {
234 // take over FFT handle
235 job->fft = jobConfig->fft;
236 job->nextJob = NULL_PTR;
237
238 // engine control
239 job->csr.U = IfxFft_Fft_calcCSR(jobConfig);
240 job->inputPtr = jobConfig->inputPtr;
241 job->outputPtr = jobConfig->outputPtr;
242
243 // move counters
244 IfxFft_Fft_calcCounters(job, jobConfig);
245
246 // config check
247 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (IfxFft_getLengthFromCode(jobConfig->fftLength)) <= IFXFFT_MAX_LENGTH);
248 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, jobConfig->inputLength > 0);
249 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, jobConfig->outputLength > 0);
250 #if IFXFFT_FFT_DMA_SUPPORT
251 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (IfxFft_getLengthFromCode(jobConfig->fftLength)) == jobConfig->inputLength);
252 #else
253 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (IfxFft_getLengthFromCode(jobConfig->fftLength)) >= jobConfig->inputLength);
254 #endif
255 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (IfxFft_getLengthFromCode(jobConfig->fftLength)) >= jobConfig->outputLength);
256 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IFXFFT_FFT_ISALIGNED(jobConfig->outputLength));
257 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IFXFFT_FFT_ISALIGNED(job->inputPtr));
258 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IFXFFT_FFT_ISALIGNED(job->outputPtr));
259 }
260
261
262 void IfxFft_Fft_initJobConfig(IfxFft_Fft_JobConfig *config, IfxFft_Fft *fft)
263 {
264 config->fft = fft;
265 config->inputLength = 256;
266 config->outputLength = 256;
267 config->fftLength = IfxFft_Length_256;
268 config->inputFormat = IfxFft_Input_realSInt32;
269 config->outputFormat = IfxFft_Output_complexSInt32;
270 config->operation = IfxFft_Operation_fft;
271 config->useWindowFunction = FALSE;
272 config->inputPtr = NULL_PTR;
273 config->outputPtr = NULL_PTR;
274 }
275
276
277 void IfxFft_Fft_initModule(IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
278 {
279 #if !IFXFFT_FFT_OPTIMIZED
280 Ifx_FFT *fftSFR = config->fft;
281 Ifx_LMU *lmuSFR = config->lmu;
282
283 fft->fft = fftSFR;
284 fft->lmu = lmuSFR;
285 #else
286 Ifx_FFT *fftSFR = (&MODULE_FFT);
287 Ifx_LMU *lmuSFR = (&MODULE_LMU);
288 #endif
289 #if IFXFFT_FFT_DMA_SUPPORT
290
291 fft->inputIdx = 0;
292 fft->job[0] = 0;
293 fft->job[1] = 0;
294 #endif
295
296 if (IfxFft_isModuleEnabled(fftSFR) == FALSE)
297 {
298 IfxFft_enableModule(fftSFR, lmuSFR);
299 }
300
301 #if IFXFFT_FFT_DMA_SUPPORT
302 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->outputPriority > 0);
303 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->inputPriority > 0);
304 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->intraPriority > 0);
305
306 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->inputDmaChannelId != IfxDma_ChannelId_none);
307 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->outputDmaChannelId != IfxDma_ChannelId_none);
308 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->discardDmaChannelId != IfxDma_ChannelId_none);
309
310 IfxFft_Fft_initDma(fft, config);
311 #else
312 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->typeOfService != IfxSrc_Tos_dma);
313
314 if (config->outputPriority > 0)
315 {
316 volatile Ifx_SRC_SRCR *srcr;
317 // FFT DONE as ISR output
318 srcr = IfxFft_getSrcPointerDone(fftSFR);
319 IfxSrc_init(srcr, config->typeOfService, config->outputPriority);
320 IfxSrc_enable(srcr);
321 }
322
323 #endif
324 }
325
326
327 void IfxFft_Fft_initModuleConfig(IfxFft_Fft_Config *config, Ifx_FFT *fft, Ifx_LMU *lmu)
328 {
329 #if !IFXFFT_FFT_OPTIMIZED
330 config->fft = fft;
331 config->lmu = lmu;
332 #endif
333
334 #if IFXFFT_FFT_DMA_SUPPORT
335 #if IFXFFT_FFT_OPTIMIZED
336 config->inputDmaChannelId = IFXFFT_FFT_DMA_CHANNEL_BASE;
337 config->outputDmaChannelId = IFXFFT_FFT_DMA_CHANNEL_BASE + 1;
338 config->discardDmaChannelId = IFXFFT_FFT_DMA_CHANNEL_BASE + 2;
339 #else
340 config->fft = fft;
341 config->lmu = lmu;
342 config->inputDmaChannelId = IfxDma_ChannelId_none;
343 config->outputDmaChannelId = IfxDma_ChannelId_none;
344 config->discardDmaChannelId = IfxDma_ChannelId_none;
345 #endif
346 #endif
347 config->inputPriority = 0;
348 config->outputPriority = 0;
349 config->typeOfService = IfxSrc_Tos_cpu0;
350 }
351
352
353 void IfxFft_Fft_initWindow(IfxFft_Fft *fft, const uint64 *windowData)
354 {
355 int i;
356 const uint64 *ptr = windowData;
357
358 #if !IFXFFT_FFT_OPTIMIZED
359 /*IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, MODULE_LMU.MEMCON.B.FFTPFT == 0);*/
360 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, !IfxFft_isEngineBusy(fft->fft));
361 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IfxFft_isReadyForStart(fft->fft));
362 #else
363 /*IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, MODULE_LMU.MEMCON.B.FFTPFT == 0);*/
364 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, !IfxFft_isEngineBusy(&MODULE_FFT));
365 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IfxFft_isReadyForStart(&MODULE_FFT));
366 #endif
367
368 uint64 *wmem = (uint64 *)IFXFFT_WINDOW_SPACE;
369
370 for (i = 0; i < (IFXFFT_MAX_WINDOW_LENGTH / (sizeof(uint64) / sizeof(uint16))); i++)
371 {
372 *(wmem++) = *(ptr++);
373 }
374 }
375
376
377 void IfxFft_Fft_isrInput(IfxFft_Fft *fft)
378 {
379 #if IFXFFT_FFT_DMA_SUPPORT
380
381 #if IFXFFT_FFT_PIPELINED
382 IfxFft_Fft_Job *inputJob = fft->job[0];
383
384 if (fft->inputIdx == 0)
385 {
386 if (inputJob != NULL_PTR)
387 {
388 IfxFft_Fft_startJob(inputJob);
389 }
390 }
391 else
392 {
393 if (fft->flags & IFXFFT_FFT_FLAG_DONE)
394 {
395 fft->flags = 0;
396 IfxFft_Fft_unloadOutput(fft->job[1]);
397 fft->job[1] = fft->job[1]->nextJob;
398 }
399 else
400 {
401 if (fft->inputIdx > fft->intraIdx)
402 {
403 fft->flags = IFXFFT_FFT_FLAG_INPUT;
404 }
405 }
406 }
407
408 if (fft->inputIdx == IFXFFT_FFT_NUM_JOBS)
409 {
410 __debug();
411 }
412
413 fft->inputIdx++;
414
415 #endif
416 #endif
417 }
418
419
420 void IfxFft_Fft_isrOutput(IfxFft_Fft *fft)
421 {
422 #if IFXFFT_FFT_PIPELINED
423 IfxFft_Fft_Job *outputJob = fft->job[1];
424
425 if (outputJob != NULL_PTR)
426 {
427 if (outputJob->nextJob != NULL_PTR)
428 {
429 IfxFft_Fft_Job *inputJob = fft->job[0];
430
431 if (inputJob != NULL_PTR)
432 {
433 IfxFft_Fft_startJob(inputJob);
434 }
435 else
436 {
437 if (fft->flags & IFXFFT_FFT_FLAG_DONE)
438 {
439 fft->flags = 0;
440 IfxFft_Fft_unloadOutput(outputJob);
441 fft->job[1] = outputJob->nextJob;
442 }
443 else
444 {
445 fft->flags = IFXFFT_FFT_FLAG_INPUT;
446 }
447 }
448 }
449 else
450 {
451 if (fft->flags & IFXFFT_FFT_FLAG_DONE)
452 {
453 fft->flags = 0;
454 IfxFft_Fft_unloadOutput(outputJob);
455 fft->job[1] = outputJob->nextJob;
456 }
457 else
458 {
459 fft->flags = IFXFFT_FFT_FLAG_INPUT;
460 }
461 }
462 }
463
464 #else
465 IfxFft_Fft_Job *outputJob = fft->job[0];
466
467 #if !IFXFFT_FFT_DMA_SUPPORT
468 IfxFft_Fft_unloadOutput(outputJob);
469 #endif
470
471 if (outputJob->nextJob != NULL_PTR)
472 {
473 boolean result = IfxFft_Fft_startJob(outputJob->nextJob);
474 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result);
475 }
476 else
477 {
478 fft->job[0] = NULL_PTR;
479 }
480
481 #endif
482 }
483
484
485 IFX_STATIC void IfxFft_Fft_loadInput(IfxFft_Fft_Job *job)
486 {
487 #if IFXFFT_FFT_DMA_SUPPORT
488
489 #if !IFXFFT_FFT_OPTIMIZED
490 IfxDma_Dma_Channel *dmaInput = &job->fft->inputDmaChannel;
491 Ifx_DMA *dmaSFR = dmaInput->dma;
492 #else
493 Ifx_DMA *dmaSFR = (&MODULE_DMA);
494 #endif
495 #if IFXFFT_FFT_HW_EXEC
496 #if IFXFFT_FFT_OPTIMIZED
497 IfxDma_setChannelSourceAddress(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID_OPT, job->inputPtr);
498 IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID_OPT, job->count64.input);
499 IfxDma_startChannelTransaction(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID_OPT);
500 #else
501 IfxDma_setChannelSourceAddress(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID, job->inputPtr);
502 IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID, job->count64.input);
503 IfxDma_startChannelTransaction(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID);
504 #endif
505 #endif
506 #else
507 sint16 i;
508 const uint64 *input64 = job->inputPtr;
509
510 for (i = 0; i < job->count64.input; i++)
511 {
512 IFXFFT_FFT_DATA_TRANSFER = *(input64++);
513 }
514
515 for ( ; i < job->count64.expect; i++)
516 {
517 IFXFFT_FFT_DATA_TRANSFER = (uint64)0ULL;
518 }
519
520 #endif
521 }
522
523
524 void IfxFft_Fft_modifyDataPointers(IfxFft_Fft_Job *job, const void *inputPtr, void *outputPtr)
525 {
526 job->inputPtr = inputPtr;
527 job->outputPtr = outputPtr;
528 }
529
530
531 boolean IfxFft_Fft_startJob(IfxFft_Fft_Job *job)
532 {
533 IfxFft_Fft *fft = job->fft;
534 #if !IFXFFT_FFT_OPTIMIZED
535 Ifx_FFT *fftSFR = fft->fft;
536 #else
537 Ifx_FFT *fftSFR = (&MODULE_FFT);
538 #endif
539 boolean result = IfxFft_isReadyForStart(fftSFR);
540
541 if (result != FALSE)
542 {
543 IfxFft_Fft_triggerEngine(fftSFR, job->csr.U);
544 #if IFXFFT_FFT_PIPELINED
545
546 if (fft->job[1] == NULL_PTR)
547 {
548 fft->inputIdx = 0;
549 fft->intraIdx = 0;
550 fft->job[1] = job;
551 fft->flags = 0;
552 }
553
554 #endif
555 IfxFft_Fft_loadInput(job);
556
557 #if IFXFFT_FFT_PIPELINED
558 fft->job[0] = job->nextJob;
559 #else
560 fft->job[0] = job;
561 #endif
562 }
563
564 return result;
565 }
566
567
568 IFX_STATIC void IfxFft_Fft_calcCounters(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
569 {
570 uint16 shift;
571
572 /* input counters */
573 if (jobConfig->inputFormat == IfxFft_Input_complexSInt32)
574 {
575 shift = 0;
576 }
577 else if (jobConfig->inputFormat == IfxFft_Input_realSInt16)
578 {
579 shift = 2;
580 }
581 else
582 {
583 shift = 1;
584 }
585
586 uint16 fftLength = IfxFft_getLengthFromCode(jobConfig->fftLength);
587 #if IFXFFT_FFT_DMA_SUPPORT
588 job->count64.input = (jobConfig->inputLength >> shift) / IFXFFT_FFT_MOVE_DIV;
589 job->count64.expect = (fftLength >> shift) / IFXFFT_FFT_MOVE_DIV;
590 #else
591 job->count64.input = jobConfig->inputLength >> shift;
592 job->count64.expect = fftLength >> shift;
593 #endif
594 /* output counters */
595 shift = (jobConfig->outputFormat == IfxFft_Output_complexSInt32) ? 0 : 1;
596 #if IFXFFT_FFT_DMA_SUPPORT
597 job->count64.result = (fftLength >> shift) / IFXFFT_FFT_MOVE_DIV;
598 job->count64.output = (jobConfig->outputLength >> shift) / IFXFFT_FFT_MOVE_DIV;
599 #else
600 job->count64.result = fftLength >> shift;
601 job->count64.output = jobConfig->outputLength >> shift;
602 #endif
603 }
604
605
606 void IfxFft_Fft_isrIntra(IfxFft_Fft *fft)
607 {
608 #if IFXFFT_FFT_DMA_SUPPORT
609
610 # if IFXFFT_FFT_PIPELINED
611
612 if (fft->intraIdx == 0)
613 {
614 fft->flags = 0;
615 IfxFft_Fft_unloadOutput(fft->job[1]);
616 fft->job[1] = fft->job[1]->nextJob;
617 }
618 else
619 {
620 if (fft->flags & IFXFFT_FFT_FLAG_INPUT)
621 {
622 fft->flags = 0;
623 IfxFft_Fft_unloadOutput(fft->job[1]);
624 fft->job[1] = fft->job[1]->nextJob;
625 }
626 else
627 {
628 fft->flags = IFXFFT_FFT_FLAG_DONE;
629 }
630 }
631
632 fft->intraIdx++;
633 # else
634 IfxFft_Fft_unloadOutput(fft->job[0]);
635 # endif
636 #endif
637 }
638
639
640 void IfxFft_Fft_initDma(IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
641 {
642 #if IFXFFT_FFT_DMA_SUPPORT
643 #if !IFXFFT_FFT_OPTIMIZED
644 Ifx_DMA *dmaSFR = &MODULE_DMA;
645 Ifx_FFT *fftSFR = config->fft;
646 IfxDma_Dma_Channel *inputDmaChannel = &fft->inputDmaChannel;
647 IfxDma_Dma_Channel *discardDmaChannel = &fft->discardDmaChannel;
648 IfxDma_Dma_Channel *outputDmaChannel = &fft->outputDmaChannel;
649 #else
650 Ifx_FFT *fftSFR = (&MODULE_FFT);
651 Ifx_DMA *dmaSFR = (&MODULE_DMA);
652 IfxDma_Dma_Channel dmaChannel;
653 IfxDma_Dma_Channel *inputDmaChannel = &dmaChannel;
654 IfxDma_Dma_Channel *discardDmaChannel = &dmaChannel;
655 IfxDma_Dma_Channel *outputDmaChannel = &dmaChannel;
656 #endif
657
658 IfxDma_Dma dma;
659 IfxDma_Dma_createModuleHandle(&dma, dmaSFR);
660
661 IfxDma_Dma_ChannelConfig dmaCfg;
662 IfxDma_Dma_initChannelConfig(&dmaCfg, &dma);
663
664 dmaCfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
665 dmaCfg.operationMode = IfxDma_ChannelOperationMode_continuous;
666 dmaCfg.moveSize = IFXFFT_FFT_MOVE_SIZE;
667 dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
668 dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
669
670 {
671 /* output channel */
672 dmaCfg.channelId = config->outputDmaChannelId;
673 dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered via software
674 dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
675
676 // source address is fixed; use circular mode to stay at this address for each move
677 dmaCfg.sourceAddress = IFXFFT_DATA_SPACE;
678 dmaCfg.sourceCircularBufferEnabled = TRUE;
679
680 // destination address and transfer count will be configured during runtime
681 dmaCfg.destinationAddress = 0;
682 dmaCfg.destinationCircularBufferEnabled = FALSE;
683 dmaCfg.transferCount = 0;
684
685 IfxDma_Dma_initChannel(outputDmaChannel, &dmaCfg);
686 }
687 {
688 /* discard channel, reuse most configuration of output channel */
689 dmaCfg.channelId = config->discardDmaChannelId;
690 dmaCfg.hardwareRequestEnabled = TRUE; // will be triggered via output DMA channel
691 IfxDma_Dma_initChannel(discardDmaChannel, &dmaCfg);
692 }
693 {
694 /* input channel */
695 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->inputDmaChannelId != config->outputDmaChannelId);
696 dmaCfg.channelId = config->inputDmaChannelId;
697 dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered via software
698 #if IFXFFT_FFT_PIPELINED
699 dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
700 #else
701 dmaCfg.channelInterruptEnabled = FALSE; // no interrupt at end of transaction
702 #endif
703 // source address and transfer count will be configured during runtime
704 dmaCfg.sourceAddress = 0;
705 dmaCfg.sourceCircularBufferEnabled = FALSE;
706 dmaCfg.transferCount = 0;
707
708 // destination address is fixed; use circular mode to stay at this address for each move
709 dmaCfg.destinationAddress = IFXFFT_DATA_SPACE;
710 dmaCfg.destinationCircularBufferEnabled = TRUE;
711
712 IfxDma_Dma_initChannel(inputDmaChannel, &dmaCfg);
713 }
714
715 {
716 volatile Ifx_SRC_SRCR *srcr;
717 #if IFXFFT_FFT_PIPELINED
718 //Route DMA input SRC to CPU as ISR input
719 srcr = IfxDma_getSrcPointer(dmaSFR, config->inputDmaChannelId);
720 IfxSrc_init(srcr, config->typeOfService, config->inputPriority);
721 IfxSrc_enable(srcr);
722 #endif
723 //Route FFT DONE SRC to CPU as ISR midjob
724 srcr = IfxFft_getSrcPointerDone(fftSFR);
725 IfxSrc_init(srcr, config->typeOfService, config->intraPriority);
726 IfxSrc_enable(srcr);
727
728 //Route output DMA request to discard DMA
729 srcr = IfxDma_getSrcPointer(dmaSFR, config->outputDmaChannelId);
730 IfxSrc_init(srcr, IfxSrc_Tos_dma, (Ifx_Priority)config->discardDmaChannelId);
731 IfxSrc_enable(srcr);
732 fft->srcrOutDis = srcr->B;
733
734 //Route DMA discard interrupt to CPU as ISR output
735 srcr = IfxDma_getSrcPointer(dmaSFR, config->discardDmaChannelId);
736 IfxSrc_init(srcr, config->typeOfService, config->outputPriority);
737 IfxSrc_enable(srcr);
738 fft->srcrOutEnd = srcr->B;
739 }
740 #endif
741 }
IfxFft_isModuleEnabled
IFX_INLINE boolean IfxFft_isModuleEnabled(Ifx_FFT *fft)
Returns the status of whether the module is enabled or not.
Definition: IfxFft.h:308
IfxFft_Fft_isrInput
void IfxFft_Fft_isrInput(IfxFft_Fft *fft)
ISR input routine.
Definition: IfxFft_Fft.c:377
IfxFft_Fft_calcCounters
IFX_STATIC void IfxFft_Fft_calcCounters(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
Calculates the input counters and output counters.
Definition: IfxFft_Fft.c:568
IfxDma_Dma_ChannelConfig::moveSize
IfxDma_ChannelMoveSize moveSize
Read/write data size.
Definition: IfxDma_Dma.h:493
IfxFft_Fft::job
IfxFft_Fft_Job * job[2]
FFT job handle.
Definition: IfxFft_Fft.h:250
IfxFft_Fft_modifyDataPointers
void IfxFft_Fft_modifyDataPointers(IfxFft_Fft_Job *job, const void *inputPtr, void *outputPtr)
Updates the input and output pointers in the FFT job handle.
Definition: IfxFft_Fft.c:524
IfxDma_ChannelOperationMode_continuous
channel stays enabled after transaction
Definition: IfxDma.h:188
IfxDma_Dma_ChannelConfig::sourceAddressCircularRange
IfxDma_ChannelIncrementCircular sourceAddressCircularRange
Determines which part of the source address remains unchanged and therby not updated after each move...
Definition: IfxDma_Dma.h:500
IFXFFT_FFT_DMADISCARDCHANNELID
#define IFXFFT_FFT_DMADISCARDCHANNELID
Definition: IfxFft_Fft.c:62
IfxDma_Dma_ChannelConfig::channelId
IfxDma_ChannelId channelId
Specifies the channel being used.
Definition: IfxDma_Dma.h:483
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxFft_Input_realSInt16
4 real 16-bit data per 64-bit word
Definition: IfxFft.h:75
IfxFft_Fft_initJob
void IfxFft_Fft_initJob(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
Initialises the FFT job.
Definition: IfxFft_Fft.c:232
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxDma_setChannelSourceAddress
IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address.
Definition: IfxDma.h:1642
IFXFFT_FFT_DMAINPUTCHANNELID_OPT
#define IFXFFT_FFT_DMAINPUTCHANNELID_OPT
Definition: IfxFft_Fft.c:60
IfxFft_Fft_initJobConfig
void IfxFft_Fft_initJobConfig(IfxFft_Fft_JobConfig *config, IfxFft_Fft *fft)
Fills the job configuration structure with default values.
Definition: IfxFft_Fft.c:262
IfxFft_Fft::discardDmaChannel
IfxDma_Dma_Channel discardDmaChannel
Discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) ...
Definition: IfxFft_Fft.h:244
IfxDma_Dma_initChannelConfig
void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration
Definition: IfxDma_Dma.c:176
IfxFft_Fft_Job_s::inputPtr
IFX_CONST void * inputPtr
Input pointer.
Definition: IfxFft_Fft.h:304
IfxFft_Fft_initModule
void IfxFft_Fft_initModule(IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialises the module.
Definition: IfxFft_Fft.c:277
IfxFft_Fft::outputDmaChannel
IfxDma_Dma_Channel outputDmaChannel
Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) ...
Definition: IfxFft_Fft.h:243
IfxDma_Dma_ChannelConfig::sourceAddress
uint32 sourceAddress
Source address for the DMA channel.
Definition: IfxDma_Dma.h:484
IfxFft_Fft_JobConfig::outputLength
uint16 outputLength
Length of the output.
Definition: IfxFft_Fft.h:288
IfxFft_getSrcPointerDone
IFX_INLINE volatile Ifx_SRC_SRCR * IfxFft_getSrcPointerDone(Ifx_FFT *fft)
Returns the status of FFT DONE request.
Definition: IfxFft.h:282
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxFft_Fft::inputDmaChannel
IfxDma_Dma_Channel inputDmaChannel
Input DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) ...
Definition: IfxFft_Fft.h:242
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IFXFFT_FFT_NUM_JOBS
#define IFXFFT_FFT_NUM_JOBS
Definition: IfxFft_cfg.h:82
IfxDma_Dma_ChannelConfig::sourceCircularBufferEnabled
boolean sourceCircularBufferEnabled
Enables/Disables the source circular buffering.
Definition: IfxDma_Dma.h:505
IfxFft_Fft_Job_s::fft
IfxFft_Fft * fft
Pointer to FFT registers. Used when (IFXFFT_FFT_OPTIMIZED == 0)
Definition: IfxFft_Fft.h:302
IfxFft_Fft_JobConfig::outputFormat
IfxFft_Output outputFormat
Output format.
Definition: IfxFft_Fft.h:291
IfxFft_getLengthFromCode
IFX_INLINE uint16 IfxFft_getLengthFromCode(IfxFft_Length length)
Retruns the actual length of the transform from the length code.
Definition: IfxFft.h:270
IfxFft_Fft::srcrOutDis
Ifx_SRC_SRCR_Bits srcrOutDis
Cache of discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:248
IfxDma_startChannelTransaction
IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Request a DMA channel transaction.
Definition: IfxDma.h:1680
IfxFft_Fft_Job_s
FFT job handle.
Definition: IfxFft_Fft.h:300
IfxDma_Dma_ChannelConfig::destinationCircularBufferEnabled
boolean destinationCircularBufferEnabled
Enables/Disables the destination circular buffering.
Definition: IfxDma_Dma.h:506
IfxFft_enableModule
IFX_INLINE void IfxFft_enableModule(Ifx_FFT *fft, Ifx_LMU *lmu)
Enables the FFT module and also the LMU interface.
Definition: IfxFft.h:242
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxFft_Fft_Config::outputPriority
Ifx_Priority outputPriority
"output unloading finished" interrupt priority
Definition: IfxFft_Fft.h:275
IfxDma_Dma_ChannelConfig::hardwareRequestEnabled
boolean hardwareRequestEnabled
Enabling channel transaction via hardware request.
Definition: IfxDma_Dma.h:497
IFXFFT_FFT_MOVE_SIZE
#define IFXFFT_FFT_MOVE_SIZE
Definition: IfxFft_Fft.c:70
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxFft_Fft_Config::lmu
Ifx_LMU * lmu
Pointer to LMU registers.Used when (IFXFFT_FFT_OPTIMIZED == 0)
Definition: IfxFft_Fft.h:272
IfxFft_Fft
Module handle.
Definition: IfxFft_Fft.h:238
IfxFft_Fft_Config
Configuration structure of the module.
Definition: IfxFft_Fft.h:269
IfxFft_Fft_Count64::input
uint16 input
Input count.
Definition: IfxFft_Fft.h:257
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxFft_Fft_isrOutput
void IfxFft_Fft_isrOutput(IfxFft_Fft *fft)
ISR output routine.
Definition: IfxFft_Fft.c:420
IfxFft_Fft::srcrOutEnd
Ifx_SRC_SRCR_Bits srcrOutEnd
Cache of end of output DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:249
sint16
short sint16
Definition: Platform_Types.h:129
IfxDma_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel.
Definition: IfxDma.h:1527
IfxFft_Input_complexSInt32
1 complex 32-bit data per 64-bit word
Definition: IfxFft.h:72
IFXFFT_FFT_FLAG_DONE
#define IFXFFT_FFT_FLAG_DONE
Definition: IfxFft_Fft.h:220
IfxFft_Length_256
transform of 256
Definition: IfxFft.h:89
IFXFFT_FFT_DATA_TRANSFER
#define IFXFFT_FFT_DATA_TRANSFER
Definition: IfxFft_Fft.c:52
IfxFft_Fft::inputIdx
uint32 inputIdx
Input interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:246
IFXFFT_MAX_WINDOW_LENGTH
#define IFXFFT_MAX_WINDOW_LENGTH
Definition: IfxFft_cfg.h:72
IfxFft_Output_complexSInt32
1 complex 32-bit data per 64-bit word
Definition: IfxFft.h:108
IfxFft_Fft_startJob
boolean IfxFft_Fft_startJob(IfxFft_Fft_Job *job)
Starts the FFT job.
Definition: IfxFft_Fft.c:531
IfxFft_Fft_cloneAndLinkJobs
void IfxFft_Fft_cloneAndLinkJobs(IfxFft_Fft_Job *originalJob, IfxFft_Fft_Job *newJob)
Clones and links the jobs.
Definition: IfxFft_Fft.c:145
IfxDma_Dma_ChannelConfig::transferCount
uint16 transferCount
Number of transfers in a transaction.
Definition: IfxDma_Dma.h:489
IfxFft_Fft_Job_s::csr
Ifx_FFT_CSR csr
FFT.CSR register duplicate.
Definition: IfxFft_Fft.h:303
IfxFft_isEngineBusy
IFX_INLINE boolean IfxFft_isEngineBusy(Ifx_FFT *fft)
Returns the status of whether the FFT Engine is Idle or has at least one transform in operation...
Definition: IfxFft.h:302
IfxFft_Fft_Config::typeOfService
IfxSrc_Tos typeOfService
Type of interrupt service.
Definition: IfxFft_Fft.h:276
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:70
IFXFFT_FFT_DMADISCARDCHANNELID_OPT
#define IFXFFT_FFT_DMADISCARDCHANNELID_OPT
Definition: IfxFft_Fft.c:56
IfxDma_Dma_Channel::dma
Ifx_DMA * dma
Specifies the pointer to the DMA registers.
Definition: IfxDma_Dma.h:473
IfxFft_Operation_fft
perform FFT
Definition: IfxFft.h:99
IFXFFT_FFT_DMAINPUTCHANNELID
#define IFXFFT_FFT_DMAINPUTCHANNELID
Definition: IfxFft_Fft.c:66
IfxFft_Fft_isrIntra
void IfxFft_Fft_isrIntra(IfxFft_Fft *fft)
Definition: IfxFft_Fft.c:606
IFXFFT_MAX_LENGTH
#define IFXFFT_MAX_LENGTH
Maximim possible length of the transform.
Definition: IfxFft_cfg.h:70
IfxFft_Fft_JobConfig::inputFormat
IfxFft_Input inputFormat
Input format.
Definition: IfxFft_Fft.h:290
IfxFft_Fft_Job_s::count64
IfxFft_Fft_Count64 count64
Counters.
Definition: IfxFft_Fft.h:306
IfxFft_Fft_initWindow
void IfxFft_Fft_initWindow(IfxFft_Fft *fft, const uint64 *windowData)
Initialises the window transfer.
Definition: IfxFft_Fft.c:353
IfxFft_Fft_Count64::expect
uint16 expect
Padding.
Definition: IfxFft_Fft.h:258
IfxDma_Dma_createModuleHandle
void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it&#39;s en...
Definition: IfxDma_Dma.c:121
IfxFft_Input_realSInt32
2 real 32-bit data per 64-bit word
Definition: IfxFft.h:73
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxFft_Fft_triggerEngine
IFX_INLINE void IfxFft_Fft_triggerEngine(Ifx_FFT *fft, uint32 csr)
Definition: IfxFft_Fft.h:452
__debug
void __debug(void) __attribute__((intrinsic_function(0x103
IfxDma_Dma
DMA base address data structure (Module handle)
Definition: IfxDma_Dma.h:460
IfxFft_Fft::intraIdx
uint32 intraIdx
Intra interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:247
IfxFft_Fft_Config::intraPriority
Ifx_Priority intraPriority
"intra transfer" interrupt priority
Definition: IfxFft_Fft.h:274
IfxFft_Fft_Job_s::outputPtr
void * outputPtr
Output pointer.
Definition: IfxFft_Fft.h:305
IfxFft_Fft.h
FFT FFT details.
IfxFft_Fft_JobConfig
Configuration structure for the FFT job.
Definition: IfxFft_Fft.h:284
IfxFft_Fft_unloadOutput
IFX_STATIC void IfxFft_Fft_unloadOutput(IfxFft_Fft_Job *job)
Unloads output data from the FFT engine.
Definition: IfxFft_Fft.c:152
IfxDma_setChannelTransferCount
IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction.
Definition: IfxDma.h:1665
IfxFft_Fft_JobConfig::inputLength
uint16 inputLength
Length of the input.
Definition: IfxFft_Fft.h:287
IfxFft_Fft_Job_s::nextJob
IfxFft_Fft_Job * nextJob
Pointer to the next job.
Definition: IfxFft_Fft.h:307
IfxDma_Dma_ChannelConfig::operationMode
IfxDma_ChannelOperationMode operationMode
keep enable/disable the hardware channel request after a transaction
Definition: IfxDma_Dma.h:492
IfxFft_isReadyForStart
IFX_INLINE boolean IfxFft_isReadyForStart(Ifx_FFT *fft)
Returns the status of whether the module can accept a START operation or not.
Definition: IfxFft.h:326
IFXFFT_WINDOW_SPACE
#define IFXFFT_WINDOW_SPACE
Window coefficient space starting address.
Definition: IfxFft_cfg.h:66
IFXFFT_FFT_MOVE_DIV
#define IFXFFT_FFT_MOVE_DIV
Definition: IfxFft_Fft.c:72
IfxFft_Fft_initDma
void IfxFft_Fft_initDma(IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialization of DMA.
Definition: IfxFft_Fft.c:640
IfxFft_Fft_Count64::result
uint16 result
Discard.
Definition: IfxFft_Fft.h:260
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxDma_Dma_ChannelConfig
Configuration data structure of the channel.
Definition: IfxDma_Dma.h:480
IfxFft_Fft_JobConfig::useWindowFunction
boolean useWindowFunction
Selection to use window function.
Definition: IfxFft_Fft.h:293
IfxFft_Fft_dummy256
IFX_STATIC uint64 IfxFft_Fft_dummy256[IFXFFT_FFT_MOVE_DIV]
Definition: IfxFft_Fft.c:127
IfxFft_Fft_JobConfig::fftLength
IfxFft_Length fftLength
Length of the transform.
Definition: IfxFft_Fft.h:289
IfxDma_Dma_initChannel
void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel
Definition: IfxDma_Dma.c:141
IfxDma_setChannelDestinationAddress
IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address.
Definition: IfxDma.h:1583
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IFXFFT_FFT_DMA_CHANNEL_BASE
#define IFXFFT_FFT_DMA_CHANNEL_BASE
Definition: IfxFft_cfg.h:78
IfxFft_Fft_calcCSR
IFX_STATIC uint32 IfxFft_Fft_calcCSR(const IfxFft_Fft_JobConfig *config)
Configures the CSR register.
Definition: IfxFft_Fft.c:133
IfxDma_ChannelId_none
None of the Ifx_DMA Channels.
Definition: IfxDma_cfg.h:104
IfxFft_Fft_initModuleConfig
void IfxFft_Fft_initModuleConfig(IfxFft_Fft_Config *config, Ifx_FFT *fft, Ifx_LMU *lmu)
Fills the config structure with default values.
Definition: IfxFft_Fft.c:327
IfxDma_Dma_ChannelConfig::destinationAddress
uint32 destinationAddress
Destination address for the DMA channel.
Definition: IfxDma_Dma.h:485
IfxFft_Fft_Config::inputDmaChannelId
IfxDma_ChannelId inputDmaChannelId
Input DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:277
IfxDma_Dma_ChannelConfig::requestMode
IfxDma_ChannelRequestMode requestMode
A service request initiates a single transfer, or the complete transaction.
Definition: IfxDma_Dma.h:491
IfxDma_Dma_ChannelConfig::destinationAddressCircularRange
IfxDma_ChannelIncrementCircular destinationAddressCircularRange
Determines which part of the destination address remains unchanged and therby not updated after each ...
Definition: IfxDma_Dma.h:503
IFXFFT_FFT_ISALIGNED
#define IFXFFT_FFT_ISALIGNED(address)
Definition: IfxFft_Fft.c:74
IfxFft_Fft_Count64::output
uint16 output
Output count.
Definition: IfxFft_Fft.h:259
IfxFft_Fft_Config::outputDmaChannelId
IfxDma_ChannelId outputDmaChannelId
Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:278
IfxFft_Fft_Config::inputPriority
Ifx_Priority inputPriority
"input loading finished" interrupt priority
Definition: IfxFft_Fft.h:273
IfxDma_Dma_ChannelConfig::channelInterruptEnabled
boolean channelInterruptEnabled
The channel transfer interrupt should be triggered. See also channelInterruptControl.
Definition: IfxDma_Dma.h:510
IfxFft_Fft::flags
uint32 flags
Driver flags. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:245
TRUE
#define TRUE
Definition: Platform_Types.h:90
IFXFFT_DATA_SPACE
#define IFXFFT_DATA_SPACE
Data space starting address.
Definition: IfxFft_cfg.h:62
IFXFFT_FFT_DMAOUTPUTCHANNELID
#define IFXFFT_FFT_DMAOUTPUTCHANNELID
Definition: IfxFft_Fft.c:64
IfxDma_Dma_Channel
Channel handle.
Definition: IfxDma_Dma.h:471
IfxFft_Fft_JobConfig::operation
IfxFft_Operation operation
Operation (FFT / IFFT)
Definition: IfxFft_Fft.h:292
IFXFFT_FFT_FLAG_INPUT
#define IFXFFT_FFT_FLAG_INPUT
Definition: IfxFft_Fft.h:218
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxFft_Fft_Config::fft
Ifx_FFT * fft
Pointer to FFT registers.Used when (IFXFFT_FFT_OPTIMIZED == 0)
Definition: IfxFft_Fft.h:271
IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT
#define IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT
Definition: IfxFft_Fft.c:58
IfxFft_Fft_Config::discardDmaChannelId
IfxDma_ChannelId discardDmaChannelId
DMA channel for discarding unused samples. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) ...
Definition: IfxFft_Fft.h:279
IfxFft_Fft_loadInput
IFX_STATIC void IfxFft_Fft_loadInput(IfxFft_Fft_Job *job)
Loads input data into the FFT engine.
Definition: IfxFft_Fft.c:485
IfxDma_ChannelRequestMode_completeTransactionPerRequest
a request initiates a complete transaction
Definition: IfxDma.h:221
IfxDma_ChannelIncrementCircular_none
no circular buffer operation
Definition: IfxDma.h:103


iLLD_TC26B: IfxFft_Fft.h Source File

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IfxFft_Fft.h
Go to the documentation of this file.
1 /**
2 * \file IfxFft_Fft.h
3 * \brief FFT FFT details
4 * \ingroup IfxLld_Fft
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Fft_Fft_Usage How to use the FFT driver?
42 * \ingroup IfxLld_Fft
43 *
44 * The FFT interface driver provides a default FFT configuration for calculating forward and inverse FFTs of lengths 8 to 1024 (powers of 2 only) of real or complex input operands.
45 *
46 * In the following sections it will be described, how to integrate the driver into the application framework.
47 *
48 * \section IfxLld_Fft_Fft_Preparation Preparation
49 * \subsection IfxLld_Fft_Fft_Include Include Files
50 *
51 * Include following header file into your C code:
52 *
53 * \code
54 * #include <Fft/Fft/IfxFft_Fft.h>
55 * \endcode
56 *
57 * \subsection IfxLld_Fft_Fft_Variables Variables
58 *
59 * Declare the FFT handle, FFT job handle and the input output locations as global variables in your C code:
60 *
61 * \code
62 * // FFT window length
63 * #define FFT_LENGTH 512
64 *
65 * // source waveform (must be 256bit aligned!)
66 * __attribute__ ((aligned(256))) sint32 fftIn[FFT_LENGTH] = {
67 * #include "sinewave.inc"
68 * };
69 *
70 * // FFT result (must be 256bit aligned!)
71 * __attribute__ ((aligned(256))) sint32 fftOut[FFT_LENGTH*2];
72 *
73 * // used globally
74 * IfxFft_Fft fft;
75 * IfxFft_Fft_Job fftJob;
76 *
77 * volatile uint32 fftInterruptCounter;
78 * \endcode
79 *
80 * \subsection IfxLld_Fft_Fft_Interrupt Interrupt Handler Installation
81 *
82 * See also \ref IfxLld_Cpu_Irq_Usage
83 *
84 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
85 * \code
86 * // priorities are normally defined in Ifx_IntPrioDef.h
87 * #define ISR_PRIORITY_FFT_OUTPUT 1
88 * #define ISR_PRIORITY_FFT_INPUT 2
89 * #define ISR_PRIORITY_FFT_INTRA 3
90 * \endcode
91 *
92 * Add the interrupt service routines to your C code. They have to call the FFT interrupt handlers by passing the fftJob handle:
93 * \code
94 * IFX_INTERRUPT(ISR_Fft_intra, 0, ISR_PRIORITY_FFT_INTRA)
95 * {
96 * IfxFft_Fft_isrIntra(&fft);
97 * }
98 *
99 * IFX_INTERRUPT(ISR_Fft_input, 0, ISR_PRIORITY_FFT_INPUT)
100 * {
101 * IfxFft_Fft_isrInput(&fft);
102 * }
103 *
104 * IFX_INTERRUPT(ISR_Fft_output, 0, ISR_PRIORITY_FFT_output)
105 * {
106 * ++fftInterruptCounter;
107 *
108 * IfxFft_Fft_isrOutput(&fft);
109 *
110 * // do the next transform:
111 * while (IfxFft_Fft_startJob(&fftJob) == FALSE) {}
112 * }
113 * \endcode
114 *
115 * Finally install the interrupt handlers in your initialisation function:
116 * \code
117 * // install interrupt handlers
118 * IfxCpu_Irq_installInterruptHandler(&ISR_Fft_input, ISR_PRIORITY_FFT_INPUT);
119 * IfxCpu_Irq_installInterruptHandler(&ISR_Fft_output, ISR_PRIORITY_FFT_OUTPUT);
120 * IfxCpu_enableInterrupts();
121 * \endcode
122 *
123 * \subsection IfxLld_Fft_Fft_InitModule Module Initialisation
124 *
125 * The module initialisation can be done in the same function. Here an example:
126 * \code
127 * // create module config
128 * IfxFft_Fft_Config fftConfig;
129 * IfxFft_Fft_initModuleConfig(&fftConfig, &MODULE_FFT, &MODULE_LMU);
130 *
131 * // configure interrupts
132 * fftConfig.inputPriority = ISR_PRIORITY_FFT_INPUT;
133 * fftConfig.intraPriority = ISR_PRIORITY_FFT_INTRA;
134 * fftConfig.outputPriority = ISR_PRIORITY_FFT_OUTPUT;
135 * fftConfig.typeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
136 *
137 * // use DMA channels for input/output transfers
138 * fftConfig.inputDmaChannelId = IfxDma_ChannelId_4;
139 * fftConfig.outputDmaChannelId = IfxDma_ChannelId_5;
140 * fftConfig.discardDmaChannelId = IfxDma_ChannelId_6;
141 *
142 * // initialize module
143 * // IfxFft_Fft fft; // defined globally
144 * IfxFft_Fft_initModule(&fft, &fftConfig);
145 * \endcode
146 *
147 * \subsection IfxLld_Fft_Fft_InitJob Job Initialisation
148 *
149 * The FFT job initialisation can also be done in the same function. Here an example:
150 * \code
151 * // create FFT job config
152 * IfxFft_Fft_JobConfig fftJobConfig;
153 * IfxFft_Fft_initJobConfig(&fftJobConfig, &fft);
154 *
155 * // customize job
156 * fftJobConfig.fftLength = IfxFft_Length_512;
157 *
158 * fftJobConfig.inputFormat = IfxFft_Input_realSInt32;
159 * fftJobConfig.inputPtr = (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)fftIn);
160 * fftJobConfig.inputLength = FFT_LENGTH;
161 *
162 * fftJobConfig.outputFormat = IfxFft_Output_complexSInt32;
163 * fftJobConfig.outputPtr = (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)fftOut);
164 * fftJobConfig.outputLength = FFT_LENGTH;
165 *
166 * // initialize FFT job
167 * // IfxFft_Fft_Job fftJob; // defined globally
168 * IfxFft_Fft_initJob(&fftJob, &fftJobConfig);
169 * \endcode
170 *
171 * The FFT is ready for use now!
172 *
173 *
174 * \section IfxLld_Fft_Fft_TransformFunctions Transform Functions
175 *
176 * The FFT driver provides simple function to perform the transforms.
177 *
178 * This means: you only have to start the FFT job with pre configured job handle and the transform will be done automatically by the FFT engine and an interrupt will be raised, indicating the end of treansform(DONE).
179 *
180 * \code
181 * // start job until return TRUE.
182 * while (IfxFft_Fft_startJob(&fftJob) == FALSE) {}
183 *
184 * // wait for 3 interrupts
185 * while( fftInterruptCounter < 3 );
186 * \endcode
187 *
188 * \defgroup IfxLld_Fft_Fft FFT
189 * \ingroup IfxLld_Fft
190 * \defgroup IfxLld_Fft_Fft_DataStructures Data Structures
191 * \ingroup IfxLld_Fft_Fft
192 * \defgroup IfxLld_Fft_Fft_ModuleFunctions Module Functions
193 * \ingroup IfxLld_Fft_Fft
194 * \defgroup IfxLld_Fft_Fft_InterruptFunctions Interrupt Functions
195 * \ingroup IfxLld_Fft_Fft
196 * \defgroup IfxLld_Fft_Fft_TransformFuntions Transform Funtions
197 * \ingroup IfxLld_Fft_Fft
198 */
199
200 #ifndef IFXFFT_FFT_H
201 #define IFXFFT_FFT_H 1
202
203 /******************************************************************************/
204 /*----------------------------------Includes----------------------------------*/
205 /******************************************************************************/
206
207 #include "_Utilities/Ifx_Assert.h"
208 #include "IfxFft_bf.h"
209 #include "Fft/Std/IfxFft.h"
210 #include "Dma/Dma/IfxDma_Dma.h"
211 #include "Scu/Std/IfxScuWdt.h"
212 #include "Cpu/Std/IfxCpu.h"
213
214 /******************************************************************************/
215 /*-----------------------------------Macros-----------------------------------*/
216 /******************************************************************************/
217
218 #define IFXFFT_FFT_FLAG_INPUT (1)
219
220 #define IFXFFT_FFT_FLAG_DONE (2)
221
222 #define IFXFFT_FFT_HW_EXEC (1)
223
224 /******************************************************************************/
225 /*------------------------------Type Definitions------------------------------*/
226 /******************************************************************************/
227
228 typedef struct IfxFft_Fft_Job_s IfxFft_Fft_Job;
229
230 /******************************************************************************/
231 /*-----------------------------Data Structures--------------------------------*/
232 /******************************************************************************/
233
234 /** \addtogroup IfxLld_Fft_Fft_DataStructures
235 * \{ */
236 /** \brief Module handle
237 */
238 typedef struct
239 {
240 Ifx_FFT *fft; /**< \brief Pointer to FFT registers. Used when (IFXFFT_FFT_OPTIMIZED == 0) */
241 Ifx_LMU *lmu; /**< \brief Pointer to LMU registers.Used when (IFXFFT_FFT_OPTIMIZED == 0) */
242 IfxDma_Dma_Channel inputDmaChannel; /**< \brief Input DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) */
243 IfxDma_Dma_Channel outputDmaChannel; /**< \brief Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) */
244 IfxDma_Dma_Channel discardDmaChannel; /**< \brief Discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) */
245 uint32 flags; /**< \brief Driver flags. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
246 uint32 inputIdx; /**< \brief Input interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
247 uint32 intraIdx; /**< \brief Intra interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
248 Ifx_SRC_SRCR_Bits srcrOutDis; /**< \brief Cache of discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
249 Ifx_SRC_SRCR_Bits srcrOutEnd; /**< \brief Cache of end of output DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
250 IfxFft_Fft_Job *job[2]; /**< \brief FFT job handle */
251 } IfxFft_Fft;
252
253 /** \brief Structure for counters
254 */
255 typedef struct
256 {
257 uint16 input; /**< \brief Input count */
258 uint16 expect; /**< \brief Padding */
259 uint16 output; /**< \brief Output count */
260 uint16 result; /**< \brief Discard */
261 } IfxFft_Fft_Count64;
262
263 /** \} */
264
265 /** \addtogroup IfxLld_Fft_Fft_DataStructures
266 * \{ */
267 /** \brief Configuration structure of the module
268 */
269 typedef struct
270 {
271 Ifx_FFT *fft; /**< \brief Pointer to FFT registers.Used when (IFXFFT_FFT_OPTIMIZED == 0) */
272 Ifx_LMU *lmu; /**< \brief Pointer to LMU registers.Used when (IFXFFT_FFT_OPTIMIZED == 0) */
273 Ifx_Priority inputPriority; /**< \brief "input loading finished" interrupt priority */
274 Ifx_Priority intraPriority; /**< \brief "intra transfer" interrupt priority */
275 Ifx_Priority outputPriority; /**< \brief "output unloading finished" interrupt priority */
276 IfxSrc_Tos typeOfService; /**< \brief Type of interrupt service */
277 IfxDma_ChannelId inputDmaChannelId; /**< \brief Input DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
278 IfxDma_ChannelId outputDmaChannelId; /**< \brief Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
279 IfxDma_ChannelId discardDmaChannelId; /**< \brief DMA channel for discarding unused samples. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
280 } IfxFft_Fft_Config;
281
282 /** \brief Configuration structure for the FFT job
283 */
284 typedef struct
285 {
286 IfxFft_Fft *fft; /**< \brief Pointer To FFT.Used when (IFXFFT_FFT_OPTIMIZED == 0) */
287 uint16 inputLength; /**< \brief Length of the input */
288 uint16 outputLength; /**< \brief Length of the output */
289 IfxFft_Length fftLength; /**< \brief Length of the transform */
290 IfxFft_Input inputFormat; /**< \brief Input format */
291 IfxFft_Output outputFormat; /**< \brief Output format */
292 IfxFft_Operation operation; /**< \brief Operation (FFT / IFFT) */
293 boolean useWindowFunction; /**< \brief Selection to use window function */
294 IFX_CONST void *inputPtr; /**< \brief Pointer to input data */
295 void *outputPtr; /**< \brief Pointer to output data */
296 } IfxFft_Fft_JobConfig;
297
298 /** \brief FFT job handle
299 */
300 struct IfxFft_Fft_Job_s
301 {
302 IfxFft_Fft *fft; /**< \brief Pointer to FFT registers. Used when (IFXFFT_FFT_OPTIMIZED == 0) */
303 Ifx_FFT_CSR csr; /**< \brief FFT.CSR register duplicate */
304 IFX_CONST void *inputPtr; /**< \brief Input pointer */
305 void *outputPtr; /**< \brief Output pointer */
306 IfxFft_Fft_Count64 count64; /**< \brief Counters */
307 IfxFft_Fft_Job *nextJob; /**< \brief Pointer to the next job */
308 };
309
310 /** \} */
311
312 /** \addtogroup IfxLld_Fft_Fft_ModuleFunctions
313 * \{ */
314
315 /******************************************************************************/
316 /*-------------------------Global Function Prototypes-------------------------*/
317 /******************************************************************************/
318
319 /** \brief Initialises the module
320 * \param fft Module handle
321 * \param config Configuration structure of the module
322 * \return None
323 *
324 * A coding example can be found in \ref IfxLld_Fft_Fft_Usage
325 *
326 */
327 IFX_EXTERN void IfxFft_Fft_initModule(IfxFft_Fft *fft, const IfxFft_Fft_Config *config);
328
329 /** \brief Fills the config structure with default values
330 * \param config Configuration structure of the module
331 * \param fft Pointer to FFT registers
332 * \param lmu Pointer to LMU registers
333 * \return None
334 *
335 * A coding example can be found in \ref IfxLld_Fft_Fft_Usage
336 *
337 */
338 IFX_EXTERN void IfxFft_Fft_initModuleConfig(IfxFft_Fft_Config *config, Ifx_FFT *fft, Ifx_LMU *lmu);
339
340 /** \} */
341
342 /** \addtogroup IfxLld_Fft_Fft_InterruptFunctions
343 * \{ */
344
345 /******************************************************************************/
346 /*-------------------------Global Function Prototypes-------------------------*/
347 /******************************************************************************/
348
349 /** \brief ISR input routine
350 * \param fft Module handle
351 * \return None
352 */
353 IFX_EXTERN void IfxFft_Fft_isrInput(IfxFft_Fft *fft);
354
355 /** \brief ISR output routine
356 * \param fft Module handle
357 * \return None
358 */
359 IFX_EXTERN void IfxFft_Fft_isrOutput(IfxFft_Fft *fft);
360
361 /** \} */
362
363 /** \addtogroup IfxLld_Fft_Fft_TransformFuntions
364 * \{ */
365
366 /******************************************************************************/
367 /*-------------------------Global Function Prototypes-------------------------*/
368 /******************************************************************************/
369
370 /** \brief Clones and links the jobs
371 * \param originalJob Current (original)FFT job handle
372 * \param newJob Modified (new) FFT job handle
373 * \return None
374 */
375 IFX_EXTERN void IfxFft_Fft_cloneAndLinkJobs(IfxFft_Fft_Job *originalJob, IfxFft_Fft_Job *newJob);
376
377 /** \brief Initialises the FFT job
378 * \param job FFT job handle
379 * \param jobConfig Configuration structure for the FFT job
380 * \return None
381 *
382 * A coding example can be found in \ref IfxLld_Fft_Fft_Usage
383 *
384 */
385 IFX_EXTERN void IfxFft_Fft_initJob(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig);
386
387 /** \brief Fills the job configuration structure with default values
388 * \param config Configuration structure for the FFT job
389 * \param fft Module handle
390 * \return None
391 *
392 * A coding example can be found in \ref IfxLld_Fft_Fft_Usage
393 *
394 */
395 IFX_EXTERN void IfxFft_Fft_initJobConfig(IfxFft_Fft_JobConfig *config, IfxFft_Fft *fft);
396
397 /** \brief Initialises the window transfer
398 * \param fft Module handle
399 * \param windowData Window data
400 * \return None
401 */
402 IFX_EXTERN void IfxFft_Fft_initWindow(IfxFft_Fft *fft, const uint64 *windowData);
403
404 /** \brief Updates the input and output pointers in the FFT job handle
405 * \param job FFT job handle
406 * \param inputPtr Input pointer
407 * \param outputPtr Output pointer
408 * \return None
409 */
410 IFX_EXTERN void IfxFft_Fft_modifyDataPointers(IfxFft_Fft_Job *job, const void *inputPtr, void *outputPtr);
411
412 /** \brief Starts the FFT job
413 * \param job FFT job handle
414 * \return Module's ready for start (RFS) status (true / false)
415 *
416 * A coding example can be found in \ref IfxLld_Fft_Fft_Usage
417 *
418 */
419 IFX_EXTERN boolean IfxFft_Fft_startJob(IfxFft_Fft_Job *job);
420
421 /** \} */
422
423 /******************************************************************************/
424 /*-------------------------Inline Function Prototypes-------------------------*/
425 /******************************************************************************/
426
427 /**
428 * \return None
429 */
430 IFX_INLINE void IfxFft_Fft_triggerEngine(Ifx_FFT *fft, uint32 csr);
431
432 /******************************************************************************/
433 /*-------------------------Global Function Prototypes-------------------------*/
434 /******************************************************************************/
435
436 /**
437 * \return None
438 */
439 IFX_EXTERN void IfxFft_Fft_isrIntra(IfxFft_Fft *fft);
440
441 /** \brief Initialization of DMA
442 * \param fft fft Module handle
443 * \param config pointing to config strucuture of fft
444 * \return None
445 */
446 IFX_EXTERN void IfxFft_Fft_initDma(IfxFft_Fft *fft, const IfxFft_Fft_Config *config);
447
448 /******************************************************************************/
449 /*---------------------Inline Function Implementations------------------------*/
450 /******************************************************************************/
451
452 IFX_INLINE void IfxFft_Fft_triggerEngine(Ifx_FFT *fft, uint32 csr)
453 {
454 #if IFXFFT_FFT_HW_EXEC
455 fft->CSR.U = csr | (IFX_FFT_CSR_START_MSK << IFX_FFT_CSR_START_OFF);
456 #endif
457 }
458
459
460 #endif /* IFXFFT_FFT_H */
IfxFft_Fft_isrInput
IFX_EXTERN void IfxFft_Fft_isrInput(IfxFft_Fft *fft)
ISR input routine.
Definition: IfxFft_Fft.c:377
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxFft_Fft_modifyDataPointers
IFX_EXTERN void IfxFft_Fft_modifyDataPointers(IfxFft_Fft_Job *job, const void *inputPtr, void *outputPtr)
Updates the input and output pointers in the FFT job handle.
Definition: IfxFft_Fft.c:524
IfxFft_Fft_initJob
IFX_EXTERN void IfxFft_Fft_initJob(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
Initialises the FFT job.
Definition: IfxFft_Fft.c:232
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxFft_Fft_initJobConfig
IFX_EXTERN void IfxFft_Fft_initJobConfig(IfxFft_Fft_JobConfig *config, IfxFft_Fft *fft)
Fills the job configuration structure with default values.
Definition: IfxFft_Fft.c:262
IfxFft_Fft::discardDmaChannel
IfxDma_Dma_Channel discardDmaChannel
Discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) ...
Definition: IfxFft_Fft.h:244
IfxFft_Fft_JobConfig::inputPtr
IFX_CONST void * inputPtr
Pointer to input data.
Definition: IfxFft_Fft.h:294
IfxFft_Fft_initModule
IFX_EXTERN void IfxFft_Fft_initModule(IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialises the module.
Definition: IfxFft_Fft.c:277
IfxFft_Fft::outputDmaChannel
IfxDma_Dma_Channel outputDmaChannel
Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) ...
Definition: IfxFft_Fft.h:243
IfxDma_Dma.h
DMA DMA details.
IfxFft_Fft_JobConfig::outputLength
uint16 outputLength
Length of the output.
Definition: IfxFft_Fft.h:288
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxFft_Fft::inputDmaChannel
IfxDma_Dma_Channel inputDmaChannel
Input DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) ...
Definition: IfxFft_Fft.h:242
Ifx_Assert.h
Assert functions.
IfxFft_Fft_JobConfig::fft
IfxFft_Fft * fft
Pointer To FFT.Used when (IFXFFT_FFT_OPTIMIZED == 0)
Definition: IfxFft_Fft.h:286
IfxFft_Fft_JobConfig::outputFormat
IfxFft_Output outputFormat
Output format.
Definition: IfxFft_Fft.h:291
IfxFft_Fft::srcrOutDis
Ifx_SRC_SRCR_Bits srcrOutDis
Cache of discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:248
IfxFft_Fft_Job_s
FFT job handle.
Definition: IfxFft_Fft.h:300
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxFft_Fft_Config::outputPriority
Ifx_Priority outputPriority
"output unloading finished" interrupt priority
Definition: IfxFft_Fft.h:275
IfxFft_Fft::lmu
Ifx_LMU * lmu
Pointer to LMU registers.Used when (IFXFFT_FFT_OPTIMIZED == 0)
Definition: IfxFft_Fft.h:241
IfxFft_Fft
Module handle.
Definition: IfxFft_Fft.h:238
IfxFft_Fft_Config
Configuration structure of the module.
Definition: IfxFft_Fft.h:269
IfxFft_Fft_isrIntra
IFX_EXTERN void IfxFft_Fft_isrIntra(IfxFft_Fft *fft)
Definition: IfxFft_Fft.c:606
IfxFft_Fft_Count64::input
uint16 input
Input count.
Definition: IfxFft_Fft.h:257
IfxFft_Fft_isrOutput
IFX_EXTERN void IfxFft_Fft_isrOutput(IfxFft_Fft *fft)
ISR output routine.
Definition: IfxFft_Fft.c:420
IfxFft_Operation
IfxFft_Operation
Operation (FFT / IFFT) Definition in Ifx_FFT.CSR.B.IFFT.
Definition: IfxFft.h:97
IfxScuWdt.h
SCU basic functionality.
IfxFft_Fft::srcrOutEnd
Ifx_SRC_SRCR_Bits srcrOutEnd
Cache of end of output DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:249
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxFft_Fft::inputIdx
uint32 inputIdx
Input interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:246
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxFft_Output
IfxFft_Output
Output format Definition in Ifx_FFT.CSR.B.OUT.FMT.
Definition: IfxFft.h:106
IfxFft_Fft_startJob
IFX_EXTERN boolean IfxFft_Fft_startJob(IfxFft_Fft_Job *job)
Starts the FFT job.
Definition: IfxFft_Fft.c:531
IfxFft_Fft_cloneAndLinkJobs
IFX_EXTERN void IfxFft_Fft_cloneAndLinkJobs(IfxFft_Fft_Job *originalJob, IfxFft_Fft_Job *newJob)
Clones and links the jobs.
Definition: IfxFft_Fft.c:145
IfxFft_Fft_Job_s::csr
Ifx_FFT_CSR csr
FFT.CSR register duplicate.
Definition: IfxFft_Fft.h:303
IfxFft_Fft_Config::typeOfService
IfxSrc_Tos typeOfService
Type of interrupt service.
Definition: IfxFft_Fft.h:276
IfxFft.h
FFT basic functionality.
IfxFft_Fft_JobConfig::inputFormat
IfxFft_Input inputFormat
Input format.
Definition: IfxFft_Fft.h:290
IfxFft_Fft_Job_s::count64
IfxFft_Fft_Count64 count64
Counters.
Definition: IfxFft_Fft.h:306
IfxFft_Fft_initWindow
IFX_EXTERN void IfxFft_Fft_initWindow(IfxFft_Fft *fft, const uint64 *windowData)
Initialises the window transfer.
Definition: IfxFft_Fft.c:353
IfxFft_Fft_Count64::expect
uint16 expect
Padding.
Definition: IfxFft_Fft.h:258
IfxFft_Fft_triggerEngine
IFX_INLINE void IfxFft_Fft_triggerEngine(Ifx_FFT *fft, uint32 csr)
Definition: IfxFft_Fft.h:452
IfxFft_Fft::intraIdx
uint32 intraIdx
Intra interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:247
IfxFft_Fft_Config::intraPriority
Ifx_Priority intraPriority
"intra transfer" interrupt priority
Definition: IfxFft_Fft.h:274
IfxFft_Fft_JobConfig::outputPtr
void * outputPtr
Pointer to output data.
Definition: IfxFft_Fft.h:295
IfxFft_Length
IfxFft_Length
Length of transform. Log base 2 of the required transform size. Length must be between 3 (transform o...
Definition: IfxFft.h:82
IfxFft_Fft_JobConfig
Configuration structure for the FFT job.
Definition: IfxFft_Fft.h:284
IfxFft_Fft_JobConfig::inputLength
uint16 inputLength
Length of the input.
Definition: IfxFft_Fft.h:287
IfxCpu.h
CPU basic functionality.
IfxFft_Fft_Job_s::nextJob
IfxFft_Fft_Job * nextJob
Pointer to the next job.
Definition: IfxFft_Fft.h:307
IfxFft_Fft_Count64::result
uint16 result
Discard.
Definition: IfxFft_Fft.h:260
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxFft_Fft_initDma
IFX_EXTERN void IfxFft_Fft_initDma(IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialization of DMA.
Definition: IfxFft_Fft.c:640
IfxFft_Fft_JobConfig::useWindowFunction
boolean useWindowFunction
Selection to use window function.
Definition: IfxFft_Fft.h:293
IfxFft_Fft_JobConfig::fftLength
IfxFft_Length fftLength
Length of the transform.
Definition: IfxFft_Fft.h:289
IfxFft_Fft_Count64
Structure for counters.
Definition: IfxFft_Fft.h:255
IfxFft_Input
IfxFft_Input
Input format Definition in Ifx_FFT.CSR.B.IN.FMT.
Definition: IfxFft.h:70
IfxFft_Fft_initModuleConfig
IFX_EXTERN void IfxFft_Fft_initModuleConfig(IfxFft_Fft_Config *config, Ifx_FFT *fft, Ifx_LMU *lmu)
Fills the config structure with default values.
Definition: IfxFft_Fft.c:327
IfxFft_Fft_Config::inputDmaChannelId
IfxDma_ChannelId inputDmaChannelId
Input DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:277
IfxFft_Fft_Count64::output
uint16 output
Output count.
Definition: IfxFft_Fft.h:259
IfxFft_Fft_Config::outputDmaChannelId
IfxDma_ChannelId outputDmaChannelId
Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:278
IfxFft_Fft_Config::inputPriority
Ifx_Priority inputPriority
"input loading finished" interrupt priority
Definition: IfxFft_Fft.h:273
IfxFft_Fft::flags
uint32 flags
Driver flags. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:245
IfxDma_Dma_Channel
Channel handle.
Definition: IfxDma_Dma.h:471
IfxFft_Fft_JobConfig::operation
IfxFft_Operation operation
Operation (FFT / IFFT)
Definition: IfxFft_Fft.h:292
IfxFft_Fft::fft
Ifx_FFT * fft
Pointer to FFT registers. Used when (IFXFFT_FFT_OPTIMIZED == 0)
Definition: IfxFft_Fft.h:240
IfxFft_Fft_Config::discardDmaChannelId
IfxDma_ChannelId discardDmaChannelId
DMA channel for discarding unused samples. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) ...
Definition: IfxFft_Fft.h:279


iLLD_TC26B: IfxFft_cfg.h Source File

  • _Impl
IfxFft_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxFft_cfg.h
3 * \brief FFT on-chip implementation data
4 * \ingroup IfxLld_Fft
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Fft FFT
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Fft_Impl Implementation
44 * \ingroup IfxLld_Fft
45 * \defgroup IfxLld_Fft_Std Standard Driver
46 * \ingroup IfxLld_Fft
47 */
48
49 #ifndef IFXFFT_CFG_H
50 #define IFXFFT_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 /******************************************************************************/
57 /*-----------------------------------Macros-----------------------------------*/
58 /******************************************************************************/
59
60 /** \brief Data space starting address
61 */
62 #define IFXFFT_DATA_SPACE 0xBE000000U
63
64 /** \brief Window coefficient space starting address
65 */
66 #define IFXFFT_WINDOW_SPACE 0xBE100000U
67
68 /** \brief Maximim possible length of the transform
69 */
70 #define IFXFFT_MAX_LENGTH 2048
71
72 #define IFXFFT_MAX_WINDOW_LENGTH (IFXFFT_MAX_LENGTH / 2)
73
74 #define IFXFFT_FFT_DMA_SUPPORT (1)
75
76 #define IFXFFT_FFT_OPTIMIZED (0)
77
78 #define IFXFFT_FFT_DMA_CHANNEL_BASE 4
79
80 #define IFXFFT_FFT_PIPELINED (1)
81
82 #define IFXFFT_FFT_NUM_JOBS (8)
83
84 #define IFXFFT_NUM_MODULES (1)
85
86 #endif /* IFXFFT_CFG_H */


iLLD_TC26B: IfxFlash.c Source File

  • Flash
  • Std
IfxFlash.c
Go to the documentation of this file.
1 /**
2 * \file IfxFlash.c
3 * \brief FLASH basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxFlash.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxFlash_clearCorrectableErrorTracking(IfxFlash_PortId portId)
54 {
55 MODULE_FLASH0.CBAB[portId].CFG.B.CLR = 1;
56 }
57
58
59 void IfxFlash_clearUncorrectableErrorTracking(IfxFlash_PortId portId)
60 {
61 MODULE_FLASH0.UBAB[portId].CFG.B.CLR = 1;
62 }
63
64
65 void IfxFlash_disableCorrectableErrorTracking(IfxFlash_PortId portId, boolean disable)
66 {
67 MODULE_FLASH0.CBAB[portId].CFG.B.DIS = disable;
68 }
69
70
71 void IfxFlash_disableUncorrectableErrorTracking(IfxFlash_PortId portId, boolean disable)
72 {
73 MODULE_FLASH0.UBAB[portId].CFG.B.DIS = disable;
74 }
75
76
77 void IfxFlash_disableWriteProtection(uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
78 {
79 IFX_UNUSED_PARAMETER(flash);
80 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x553c);
81 uint32 i;
82
83 *addr1 = ucb;
84
85 for (i = 0; i < 8; i++)
86 {
87 *addr1 = password[i];
88 }
89
90 __dsync();
91 }
92
93
94 uint32 IfxFlash_getTrackedCorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
95 {
96 uint32 numErrors = 0;
97 uint32 fillingLevel = MODULE_FLASH0.CBAB[portId].STAT.U;
98
99 int i;
100
101 for (i = 0;
102 i < IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS &&
103 (fillingLevel & (1 << i)) != 0;
104 ++i)
105 {
106 Ifx_FLASH_CBAB_TOP top;
107 top.U = MODULE_FLASH0.CBAB[portId].TOP.U;
108
109 if (top.B.VLD)
110 {
111 trackedFlashAdresses[numErrors].address = 0xa0000000 | (top.B.ADDR << 5);
112 trackedFlashAdresses[numErrors].errorType = (IfxFlash_ErrorTracking)top.B.ERR;
113 ++numErrors;
114 }
115
116 // clear entry
117 MODULE_FLASH0.CBAB[portId].TOP.U = (((uint32)1) << 31);
118 }
119
120 return numErrors;
121 }
122
123
124 uint32 IfxFlash_getTrackedUncorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
125 {
126 uint32 numErrors = 0;
127 uint32 fillingLevel = MODULE_FLASH0.UBAB[portId].STAT.U;
128
129 int i;
130
131 for (i = 0;
132 i < IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS &&
133 (fillingLevel & (1 << i)) != 0;
134 ++i)
135 {
136 Ifx_FLASH_UBAB_TOP top;
137 top.U = MODULE_FLASH0.UBAB[portId].TOP.U;
138
139 if (top.B.VLD)
140 {
141 trackedFlashAdresses[numErrors].address = 0xa0000000 | (top.B.ADDR << 5);
142 trackedFlashAdresses[numErrors].errorType = (IfxFlash_ErrorTracking)top.B.ERR;
143 ++numErrors;
144 }
145
146 // clear entry
147 MODULE_FLASH0.UBAB[portId].TOP.U = (((uint32)1) << 31);
148 }
149
150 return numErrors;
151 }
152
153
154 void IfxFlash_selectCorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
155 {
156 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR,
157 errorTracking == IfxFlash_ErrorTracking_none ||
158 errorTracking == IfxFlash_ErrorTracking_correctedSingleBitError ||
159 errorTracking == IfxFlash_ErrorTracking_correctedDoubleBitError ||
160 errorTracking == IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError);
161
162 MODULE_FLASH0.CBAB[portId].CFG.B.SEL = errorTracking;
163 }
164
165
166 void IfxFlash_selectUncorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
167 {
168 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR,
169 errorTracking == IfxFlash_ErrorTracking_none ||
170 errorTracking == IfxFlash_ErrorTracking_uncorrectableMultiBitError);
171
172 MODULE_FLASH0.UBAB[portId].CFG.B.SEL = errorTracking;
173 }
IfxFlash_clearUncorrectableErrorTracking
void IfxFlash_clearUncorrectableErrorTracking(IfxFlash_PortId portId)
Select the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) ...
Definition: IfxFlash.c:59
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxFlash_disableWriteProtection
void IfxFlash_disableWriteProtection(uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled...
Definition: IfxFlash.c:77
IfxFlash_ErrorTracking_Address::address
uint32 address
Flash address for error tracking.
Definition: IfxFlash.h:98
IfxFlash_disableCorrectableErrorTracking
void IfxFlash_disableCorrectableErrorTracking(IfxFlash_PortId portId, boolean disable)
Disable the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) regis...
Definition: IfxFlash.c:65
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxFlash_ErrorTracking_none
Error tracking disabled.
Definition: IfxFlash.h:71
IfxFlash_ErrorTracking
IfxFlash_ErrorTracking
enumeration for Flash Error tracking
Definition: IfxFlash.h:69
IfxFlash_getTrackedUncorrectableErrors
uint32 IfxFlash_getTrackedUncorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked uncorrectable error addresses, error types and number of errors which are stored ...
Definition: IfxFlash.c:124
IfxFlash_UcbType
IfxFlash_UcbType
user configuration block type
Definition: IfxFlash_cfg.h:160
IfxFlash_ErrorTracking_Address
Error tracking address structure.
Definition: IfxFlash.h:96
IfxFlash.h
FLASH basic functionality.
IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS
#define IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS
Definition: IfxFlash_cfg.h:101
IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS
#define IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS
Definition: IfxFlash_cfg.h:105
IfxFlash_disableUncorrectableErrorTracking
void IfxFlash_disableUncorrectableErrorTracking(IfxFlash_PortId portId, boolean disable)
Clear the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) r...
Definition: IfxFlash.c:71
IfxFlash_clearCorrectableErrorTracking
void IfxFlash_clearCorrectableErrorTracking(IfxFlash_PortId portId)
Clear the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) registe...
Definition: IfxFlash.c:53
IfxFlash_selectUncorrectableErrorTracking
void IfxFlash_selectUncorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for uncorrectable flash errors.
Definition: IfxFlash.c:166
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
IFXFLASH_CMD_BASE_ADDRESS
#define IFXFLASH_CMD_BASE_ADDRESS
base address for general command sequences
Definition: IfxFlash_cfg.h:69
IfxFlash_ErrorTracking_uncorrectableMultiBitError
Detected uncorrectable errors.
Definition: IfxFlash.h:75
IfxFlash_selectCorrectableErrorTracking
void IfxFlash_selectCorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for correctable flash errors.
Definition: IfxFlash.c:154
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError
Corrected single-bit and double-bit errors.
Definition: IfxFlash.h:74
IfxFlash_ErrorTracking_Address::errorType
IfxFlash_ErrorTracking errorType
Error type.
Definition: IfxFlash.h:99
IfxFlash_getTrackedCorrectableErrors
uint32 IfxFlash_getTrackedCorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked correctable error addresses, error types and number of errors which are stored in...
Definition: IfxFlash.c:94
IfxFlash_ErrorTracking_correctedDoubleBitError
Corrected double-bit errors.
Definition: IfxFlash.h:73
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
disable
void disable
Definition: IfxCpu_IntrinsicsDcc.h:465
IfxFlash_PortId
IfxFlash_PortId
Corrected/UnCorrected Bits Address Buffer Port Id.
Definition: IfxFlash.h:80
IfxFlash_ErrorTracking_correctedSingleBitError
corrected single bit errors
Definition: IfxFlash.h:72


iLLD_TC26B: IfxFlash.h Source File

  • Flash
  • Std
IfxFlash.h
Go to the documentation of this file.
1 /**
2 * \file IfxFlash.h
3 * \brief FLASH basic functionality
4 * \ingroup IfxLld_Flash
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Flash_Std_Enumerations Enumerations
43 * \ingroup IfxLld_Flash_Std
44 * \defgroup IfxLld_Flash_Std_CommandSequence CommandSequence Functions
45 * \ingroup IfxLld_Flash_Std
46 * \defgroup IfxLld_Flash_Std_ErrorTracking Error Tracking Functions
47 * \ingroup IfxLld_Flash_Std
48 */
49
50 #ifndef IFXFLAS_H
51 #define IFXFLAS_H 1
52
53 /******************************************************************************/
54 /*----------------------------------Includes----------------------------------*/
55 /******************************************************************************/
56
57 #include "_Impl/IfxFlash_cfg.h"
58 #include "_Utilities/Ifx_Assert.h"
59 #include "IfxFlash_reg.h"
60
61 /******************************************************************************/
62 /*--------------------------------Enumerations--------------------------------*/
63 /******************************************************************************/
64
65 /** \addtogroup IfxLld_Flash_Std_Enumerations
66 * \{ */
67 /** \brief enumeration for Flash Error tracking
68 */
69 typedef enum
70 {
71 IfxFlash_ErrorTracking_none = 0, /**< \brief Error tracking disabled */
72 IfxFlash_ErrorTracking_correctedSingleBitError = 1, /**< \brief corrected single bit errors */
73 IfxFlash_ErrorTracking_correctedDoubleBitError = 2, /**< \brief Corrected double-bit errors */
74 IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError = 3, /**< \brief Corrected single-bit and double-bit errors */
75 IfxFlash_ErrorTracking_uncorrectableMultiBitError = 4 /**< \brief Detected uncorrectable errors */
76 } IfxFlash_ErrorTracking;
77
78 /** \brief Corrected/UnCorrected Bits Address Buffer Port Id
79 */
80 typedef enum
81 {
82 IfxFlash_PortId_PortId_0 = 0, /**< \brief Port Id 0 */
83 IfxFlash_PortId_PortId_1 = 1 /**< \brief Port Id 1 */
84 } IfxFlash_PortId;
85
86 /** \} */
87
88 /******************************************************************************/
89 /*-----------------------------Data Structures--------------------------------*/
90 /******************************************************************************/
91
92 /** \addtogroup IfxLld_Flash_Std_Enumerations
93 * \{ */
94 /** \brief Error tracking address structure
95 */
96 typedef struct
97 {
98 uint32 address; /**< \brief Flash address for error tracking */
99 IfxFlash_ErrorTracking errorType; /**< \brief Error type */
100 } IfxFlash_ErrorTracking_Address;
101
102 /** \} */
103
104 /** \addtogroup IfxLld_Flash_Std_CommandSequence
105 * \{ */
106
107 /******************************************************************************/
108 /*-------------------------Inline Function Prototypes-------------------------*/
109 /******************************************************************************/
110
111 /** \brief Performs the "Clear Status" sequence. Operation and error flags are cleared.
112 * \param flash selects the flash (PMU) module
113 * \return None
114 */
115 IFX_INLINE void IfxFlash_clearStatus(uint32 flash);
116
117 /** \brief Performs the sequence for entering program page mode
118 * \param pageAddr pageAddr specifies the page being written - the command sequence will be varied accordingly
119 * \return 0 on success, != 0 if invalid or not available page is selected
120 *
121 * Usage Example:
122 * \code
123 *
124 * unsigned int pageAddr = IFXFLASH_DFLASH_START + page*IFXFLASH_DFLASH_PAGE_LENGTH;
125 *
126 * // enter page mode
127 * IfxFlash_enterPageMode(pageAddr);
128 *
129 * \endcode
130 *
131 */
132 IFX_INLINE uint8 IfxFlash_enterPageMode(uint32 pageAddr);
133
134 /** \brief Performs the erase sequence for n sectors in program or data flash
135 * \param sectorAddr sector address
136 * \param numSector the no.of sectors to be erased
137 * \return None
138 *
139 * Usage Example:
140 * \code
141 *
142 * // erase the first and second data flash
143 * IfxFlash_eraseMultiplePhysicalSectors(IFXFLASH_DFLASH_START,2);
144 *
145 * \endcode
146 *
147 */
148 IFX_INLINE void IfxFlash_eraseMultiplePhysicalSectors(uint32 sectorAddr, uint32 numSector);
149
150 /** \brief Performs the erase sequence for n sectors in program or data flash
151 * \param sectorAddr sector address
152 * \param numSector the no.of sectors to be erased
153 * \return None
154 *
155 * Usage Example:
156 * \code
157 *
158 * // erase logical sectors of program flash
159 * IfxFlash_eraseMultipleSectors(pFlashTableLog[sector].start,2);
160 *
161 * \endcode
162 *
163 */
164 IFX_INLINE void IfxFlash_eraseMultipleSectors(uint32 sectorAddr, uint32 numSector);
165
166 /** \brief Performs the erase sequence for a physical sector in program or data flash
167 * \param sectorAddr sector address
168 * \return None
169 *
170 * Usage Example:
171 * \code
172 *
173 * // erase the first data flash
174 * IfxFlash_erasePhysicalSector(IFXFLASH_DFLASH_START);
175 *
176 *
177 * \endcode
178 *
179 */
180 IFX_INLINE void IfxFlash_erasePhysicalSector(uint32 sectorAddr);
181
182 /** \brief Performs the erase sequence for a sector in program or data flash.
183 * \param sectorAddr sector address
184 * \return None
185 *
186 * Usage Example:
187 * \code
188 *
189 *
190 * // erase all sectors of program flash
191 * for(sector=0; sector<IFXFLASH_PFLASH_NO_OF_LOG_SECTORS; ++sector) {
192 * // get address from predefined table
193 * unsigned int sector_addr = pFlashTableLog[sector].start;
194 * // erase sector
195 * IfxFlash_eraseSector(sector_addr);
196 * }
197 *
198 *
199 * \endcode
200 *
201 */
202 IFX_INLINE void IfxFlash_eraseSector(uint32 sectorAddr);
203
204 /** \brief Performs the "Erase Verify" sequence for multiple sectors
205 * \param sectorAddr sector address which should be verified
206 * \param numSector no.of sectors to be operated on
207 * \return None
208 */
209 IFX_INLINE void IfxFlash_eraseVerifyMultipleSectors(uint32 sectorAddr, uint32 numSector);
210
211 /** \brief Performs the "Erase Verify" sequence
212 * \param sectorAddr sector address which should be verified
213 * \return None
214 */
215 IFX_INLINE void IfxFlash_eraseVerifySector(uint32 sectorAddr);
216
217 /** \brief performs a load page sequence with a single 64bit access
218 * \param pageAddr pageAddr start address of page which should be programmed
219 * \param wordL Lower Address word
220 * \param wordU Upper address word
221 * \return None
222 *
223 * Usage Example:
224 * \code
225 *
226 * // load 64bit into assembly buffer of program flash
227 * IfxFlash_loadPage(IFXFLASH_PFLASH_START, 0x55555555, 0xaaaaaaaa);
228 *
229 * // load 64bit into assembly buffer of data flash
230 * IfxFlash_loadPage(0XAF000000, 0x55555555, 0xaaaaaaaa);
231 * \endcode
232 *
233 */
234 IFX_INLINE void IfxFlash_loadPage(uint32 pageAddr, uint32 wordL, uint32 wordU);
235
236 /** \brief performs a load page sequence with two 32bit accesses
237 * \param pageAddr pageAddr start address of page which should be programmed
238 * \param wordL Lower Address word
239 * \param wordU Upper Address word
240 * \return None
241 *
242 * Usage Example:
243 * \code
244 *
245 * // load 2*32bit into assembly buffer of program flash
246 * IfxFlash_loadPage2X32(IFXFLASH_PFLASH_START, 0x55555555, 0xaaaaaaaa);
247 *
248 * // load 2*32bit into assembly buffer of data flash
249 * IfxFlash_loadPage2X32(0XAF000000, 0x55555555, 0xaaaaaaaa);
250 * \endcode
251 *
252 */
253 IFX_INLINE void IfxFlash_loadPage2X32(uint32 pageAddr, uint32 wordL, uint32 wordU);
254
255 /** \brief reset to read mode
256 * \param flash flash selects the flash (PMU) module
257 * \return None
258 *
259 * Usage Example:
260 * \code
261 *
262 * // reset to read mode
263 * IfxFlash_resetToRead(0);
264 *
265 * \endcode
266 *
267 */
268 IFX_INLINE void IfxFlash_resetToRead(uint32 flash);
269
270 /** \brief Performs the "Resume Protection" sequence
271 * \param flash selects the flash (PMU) module
272 * \return None
273 */
274 IFX_INLINE void IfxFlash_resumeProtection(uint32 flash);
275
276 /** \brief Performs the "Suspend Resume" sequence for multiple sectors
277 * \param sectorAddr sector address
278 * \param numSector the no.of sectors to be operated on
279 * \return None
280 */
281 IFX_INLINE void IfxFlash_suspendResumeMultipleSectors(uint32 sectorAddr, uint32 numSector);
282
283 /** \brief Performs the "Suspend Resume" sequence
284 * \param sectorAddr sector address which should be resumed
285 * \return None
286 */
287 IFX_INLINE void IfxFlash_suspendResumeSector(uint32 sectorAddr);
288
289 /** \brief Polls the selected status flag in flash status register until it turns to 0
290 * \param flash selects the flash (PMU) module
291 * \param flashType selects the flash type
292 * \return 0 on success, != 0 if invalid or not available page is selected
293 *
294 * Usage Example:
295 * \code
296 *
297 * // wait until data flash 0 is unbusy
298 * IfxFlash_waitUnbusy(0, IfxFlash_FlashType_D0);
299 *
300 * \endcode
301 *
302 */
303 IFX_INLINE uint8 IfxFlash_waitUnbusy(uint32 flash, IfxFlash_FlashType flashType);
304
305 /** \brief Performs the "Write Burst" sequence, similar to write page but performs a burst transfer instead of page.Make sure the appropriate amount of data is loaded using load page command
306 * \param pageAddr start address of page which should be programmed
307 * \return None
308 *
309 * Usage Example:
310 * \code
311 *
312 * // program the second page of the first sector of the Program Flash
313 * IfxFlash_writeBurst(0xa0000100);
314 *
315 * \endcode
316 *
317 */
318 IFX_INLINE void IfxFlash_writeBurst(uint32 pageAddr);
319
320 /** \brief Performs the "Write Page" sequence
321 * \param pageAddr start address of page which should be programmed
322 * \return None
323 *
324 * Usage Example:
325 * \code
326 *
327 * // program the second page of the first sector of the Program Flash
328 * IfxFlash_writePage(0xa0000100);
329 *
330 * \endcode
331 *
332 */
333 IFX_INLINE void IfxFlash_writePage(uint32 pageAddr);
334
335 /** \brief Performs the "Write Page Once" sequence, similar to write page but performs a program verify after writing.
336 * \param pageAddr start address of page which should be programmed
337 * \return None
338 *
339 * Usage Example:
340 * \code
341 *
342 * // program the second page of the first sector of the Program Flash
343 * IfxFlash_writePageOnce(0xa0000100);
344 *
345 * \endcode
346 *
347 */
348 IFX_INLINE void IfxFlash_writePageOnce(uint32 pageAddr);
349
350 /******************************************************************************/
351 /*-------------------------Global Function Prototypes-------------------------*/
352 /******************************************************************************/
353
354 /** \brief The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled. The command fails by setting PROER when any of the supplied PWs does not match. In this case until the next application reset all further calls of "Disable Protection" fail with PROER independent of the supplied password.
355 * \param flash selects the flash (PMU) module
356 * \param ucb selects the user configuration block (0 for UCB0, 1 for UCB1, 5 for UCB_HSMC)
357 * \param password password pointer to an array of 8 words
358 * \return None
359 */
360 IFX_EXTERN void IfxFlash_disableWriteProtection(uint32 flash, IfxFlash_UcbType ucb, uint32 *password);
361
362 /** \} */
363
364 /** \addtogroup IfxLld_Flash_Std_ErrorTracking
365 * \{ */
366
367 /******************************************************************************/
368 /*-------------------------Global Function Prototypes-------------------------*/
369 /******************************************************************************/
370
371 /** \brief Clear the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register
372 * \param portId Corrected Bits Address Buffer Port Id
373 * \return None
374 */
375 IFX_EXTERN void IfxFlash_clearCorrectableErrorTracking(IfxFlash_PortId portId);
376
377 /** \brief Select the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register
378 * \param portId UnCorrected Bits Address Buffer Port Id
379 * \return None
380 */
381 IFX_EXTERN void IfxFlash_clearUncorrectableErrorTracking(IfxFlash_PortId portId);
382
383 /** \brief Disable the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register
384 * \param portId Corrected Bits Address Buffer Port Id
385 * \param disable Disable/enable the error tracking
386 * \return None
387 */
388 IFX_EXTERN void IfxFlash_disableCorrectableErrorTracking(IfxFlash_PortId portId, boolean disable);
389
390 /** \brief Clear the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register
391 * \param portId UnCorrected Bits Address Buffer Port Id
392 * \param disable Disable/enable the error tracking
393 * \return None
394 */
395 IFX_EXTERN void IfxFlash_disableUncorrectableErrorTracking(IfxFlash_PortId portId, boolean disable);
396
397 /** \brief Returns the tracked correctable error addresses, error types and number of errors which are stored in the CBAB registers.
398 * \param portId Corrected Bits Address Buffer Port Id
399 * \param trackedFlashAdresses tracked flash addresses for correctable errors
400 * \return numErrors
401 *
402 * Example usage to print out tracked errors :
403 *
404 * \code
405 * {
406 * IfxFlash_ErrorTracking_Address trackedAddresses[IFX_FLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS];
407 * IfxFlash_portId portId = 0;
408 * uint8 numTrackedAddresses = IfxFlash_getTrackedCorrectableErrors(portId, trackedAddresses);
409 *
410 * for(int i=0; i<numTrackedAddresses; ++i) {
411 * printf("%d: A:0x%04x Error Type:%d \n",
412 * i,
413 * trackedAddresses[i].address,
414 * trackedAddresses[i].errorType);
415 * }
416 * }
417 * \endcode
418 *
419 */
420 IFX_EXTERN uint32 IfxFlash_getTrackedCorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses);
421
422 /** \brief Returns the tracked uncorrectable error addresses, error types and number of errors which are stored in the UBAB registers.
423 * \param portId UnCorrected Bits Address Buffer Port Id
424 * \param trackedFlashAdresses tracked flash addresses for uncorrectable errors
425 * \return numErrors
426 *
427 * Example usage to print out tracked errors :
428 *
429 * \code
430 * {
431 * IfxFlash_ErrorTracking_Address trackedAddresses[IFX_FLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS];
432 * IfxFlash_portId portId = 0;
433 * uint8 numTrackedAddresses = IfxFlash_getTrackedUnCorrectableErrors(portId, trackedAddresses);
434 *
435 * for(int i=0; i<numTrackedAddresses; ++i) {
436 * printf("%d: A:0x%04x Error Type:%d \n",
437 * i,
438 * trackedAddresses[i].address,
439 * trackedAddresses[i].errorType);
440 * }
441 * }
442 * \endcode
443 *
444 */
445 IFX_EXTERN uint32 IfxFlash_getTrackedUncorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses);
446
447 /** \brief Enables error tracking for correctable flash errors
448 * \param portId Corrected Bits Address Buffer Port Id
449 * \param errorTracking Error Tracking to be selected
450 * \return None
451 *
452 * Usage example: how to enable error tracking for two flash ports:
453 * \code
454 * // enable error tracking
455 * {
456 * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
457 * IfxScuWdt_clearCpuEndinit(password);
458 *
459 * // PFlash0
460 * IfxFlash_selectCorrectableErrorTracking(IfxFlash_PortId_PortId_0, IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError);
461 * IfxFlash_selectUncorrectableErrorTracking(IfxFlash_PortId_PortId_0, IfxFlash_ErrorTracking_uncorrectableMultiBitError);
462 *
463 * // PFlash1
464 * IfxFlash_selectCorrectableErrorTracking(IfxFlash_PortId_PortId_1, IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError);
465 * IfxFlash_selectUncorrectableErrorTracking(IfxFlash_PortId_PortId_1, IfxFlash_ErrorTracking_uncorrectableMultiBitError);
466 *
467 * IfxScuWdt_setCpuEndinit(password);
468 * }
469 * \endcode
470 *
471 */
472 IFX_EXTERN void IfxFlash_selectCorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking);
473
474 /** \brief Enables error tracking for uncorrectable flash errors
475 * \param portId UnCorrected Bits Address Buffer Port Id
476 * \param errorTracking Error Tracking to be selected
477 * \return None
478 *
479 * Usage example: see \ref IfxFlash_selectCorrectableErrorTracking
480 *
481 */
482 IFX_EXTERN void IfxFlash_selectUncorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking);
483
484 /** \} */
485
486 /******************************************************************************/
487 /*-------------------------Inline Function Prototypes-------------------------*/
488 /******************************************************************************/
489
490 /** \brief This function will wait till all the flash banks are out of busy state
491 * \return Return 0 on success.Success means none of the flash banks are in busy state.
492 */
493 IFX_INLINE boolean IfxFlash_waitUnbusyAll(void);
494
495 /******************************************************************************/
496 /*---------------------Inline Function Implementations------------------------*/
497 /******************************************************************************/
498
499 IFX_INLINE void IfxFlash_clearStatus(uint32 flash)
500 {
501 IFX_UNUSED_PARAMETER(flash);
502 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x5554);
503
504 *addr1 = 0xFA;
505
506 __dsync();
507 }
508
509
510 IFX_INLINE uint8 IfxFlash_enterPageMode(uint32 pageAddr)
511 {
512 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x5554);
513
514 if ((pageAddr & 0xff000000) == 0xa0000000) // program flash
515 {
516 *addr1 = 0x50;
517 return 0;
518 }
519 else if ((pageAddr & 0xff000000) == 0xaf000000) // data flash
520 {
521 *addr1 = 0x5D;
522 return 0;
523 }
524
525 __dsync();
526 return 1; // invalid flash address
527 }
528
529
530 IFX_INLINE void IfxFlash_eraseMultiplePhysicalSectors(uint32 sectorAddr, uint32 numSector)
531 {
532 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
533 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
534 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
535 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
536
537 *addr1 = sectorAddr;
538 *addr2 = numSector;
539 *addr3 = 0x80;
540 *addr4 = 0x5a;
541
542 __dsync();
543 }
544
545
546 IFX_INLINE void IfxFlash_eraseMultipleSectors(uint32 sectorAddr, uint32 numSector)
547 {
548 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
549 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
550 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
551 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
552
553 *addr1 = sectorAddr;
554 *addr2 = numSector;
555 *addr3 = 0x80;
556 *addr4 = 0x50;
557
558 __dsync();
559 }
560
561
562 IFX_INLINE void IfxFlash_erasePhysicalSector(uint32 sectorAddr)
563 {
564 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
565 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
566 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
567 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
568
569 *addr1 = sectorAddr;
570 *addr2 = 1;
571 *addr3 = 0x80;
572 *addr4 = 0x5a;
573
574 __dsync();
575 }
576
577
578 IFX_INLINE void IfxFlash_eraseSector(uint32 sectorAddr)
579 {
580 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
581 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
582 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
583 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
584
585 *addr1 = sectorAddr;
586 *addr2 = 1;
587 *addr3 = 0x80;
588 *addr4 = 0x50;
589
590 __dsync();
591 }
592
593
594 IFX_INLINE void IfxFlash_eraseVerifyMultipleSectors(uint32 sectorAddr, uint32 numSector)
595 {
596 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
597 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
598 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
599 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
600
601 *addr1 = sectorAddr;
602 *addr2 = numSector;
603 *addr3 = 0x80;
604 *addr4 = 0x5F;
605
606 __dsync();
607 }
608
609
610 IFX_INLINE void IfxFlash_eraseVerifySector(uint32 sectorAddr)
611 {
612 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
613 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
614 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
615 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
616
617 *addr1 = sectorAddr;
618 *addr2 = 1;
619 *addr3 = 0x80;
620 *addr4 = 0x5F;
621
622 __dsync();
623 }
624
625
626 IFX_INLINE void IfxFlash_loadPage(uint32 pageAddr, uint32 wordL, uint32 wordU)
627 {
628 IFX_UNUSED_PARAMETER(pageAddr);
629 uint64 *addr1 = (uint64 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x55f0);
630
631 __st64_lu(addr1, wordL, wordU);
632
633 __dsync();
634 }
635
636
637 IFX_INLINE void IfxFlash_loadPage2X32(uint32 pageAddr, uint32 wordL, uint32 wordU)
638 {
639 IFX_UNUSED_PARAMETER(pageAddr);
640
641 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x55f0);
642
643 *addr1 = wordL;
644 addr1++;
645 *addr1 = wordU;
646
647 __dsync();
648 }
649
650
651 IFX_INLINE void IfxFlash_resetToRead(uint32 flash)
652 {
653 IFX_UNUSED_PARAMETER(flash);
654 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x5554);
655 *addr1 = 0xf0;
656
657 __dsync();
658 }
659
660
661 IFX_INLINE void IfxFlash_resumeProtection(uint32 flash)
662 {
663 IFX_UNUSED_PARAMETER(flash);
664
665 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x5554);
666
667 *addr1 = 0xF5;
668
669 __dsync();
670 }
671
672
673 IFX_INLINE void IfxFlash_suspendResumeMultipleSectors(uint32 sectorAddr, uint32 numSector)
674 {
675 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
676 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
677 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
678 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
679
680 *addr1 = sectorAddr;
681 *addr2 = numSector;
682 *addr3 = 0x70;
683 *addr4 = 0xCC;
684
685 __dsync();
686 }
687
688
689 IFX_INLINE void IfxFlash_suspendResumeSector(uint32 sectorAddr)
690 {
691 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
692 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
693 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
694 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
695
696 *addr1 = sectorAddr;
697 *addr2 = 1;
698 *addr3 = 0x70;
699 *addr4 = 0xCC;
700
701 __dsync();
702 }
703
704
705 IFX_INLINE uint8 IfxFlash_waitUnbusy(uint32 flash, IfxFlash_FlashType flashType)
706 {
707 if (flash == 0)
708 {
709 while (FLASH0_FSR.U & (1 << flashType))
710 {}
711 }
712
713 #if IFXFLASH_NUM_FLASH_MODULES > 1
714 else if (flash == 1)
715 {
716 while (FLASH1_FSR.U & (1 << flashType))
717 {}
718 }
719 #endif
720 else
721 {
722 return 1; // invalid flash selected
723 }
724 __dsync();
725 return 0; // finished
726 }
727
728
729 IFX_INLINE void IfxFlash_writeBurst(uint32 pageAddr)
730 {
731 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
732 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
733 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
734 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
735
736 *addr1 = pageAddr;
737 *addr2 = 0x00;
738 *addr3 = 0xa0;
739 *addr4 = 0x7a;
740
741 __dsync();
742 }
743
744
745 IFX_INLINE void IfxFlash_writePage(uint32 pageAddr)
746 {
747 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
748 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
749 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
750 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
751
752 *addr1 = pageAddr;
753 *addr2 = 0x00;
754 *addr3 = 0xa0;
755 *addr4 = 0xaa;
756
757 __dsync();
758 }
759
760
761 IFX_INLINE void IfxFlash_writePageOnce(uint32 pageAddr)
762 {
763 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
764 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
765 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
766 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
767
768 *addr1 = pageAddr;
769 *addr2 = 0x00;
770 *addr3 = 0xa0;
771 *addr4 = 0x9a;
772
773 __dsync();
774 }
775
776
777 IFX_INLINE boolean IfxFlash_waitUnbusyAll(void)
778 {
779 while (FLASH0_FSR.U & 0x1EU)
780 {}
781
782 __dsync();
783 return 0;
784 }
785
786
787 #endif /* IFXFLAS_H */
IfxFlash_clearUncorrectableErrorTracking
IFX_EXTERN void IfxFlash_clearUncorrectableErrorTracking(IfxFlash_PortId portId)
Select the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) ...
Definition: IfxFlash.c:59
IfxFlash_writePage
IFX_INLINE void IfxFlash_writePage(uint32 pageAddr)
Performs the "Write Page" sequence.
Definition: IfxFlash.h:745
IfxFlash_disableWriteProtection
IFX_EXTERN void IfxFlash_disableWriteProtection(uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled...
Definition: IfxFlash.c:77
IfxFlash_ErrorTracking_Address::address
uint32 address
Flash address for error tracking.
Definition: IfxFlash.h:98
IfxFlash_PortId_PortId_0
Port Id 0.
Definition: IfxFlash.h:82
IfxFlash_resumeProtection
IFX_INLINE void IfxFlash_resumeProtection(uint32 flash)
Performs the "Resume Protection" sequence.
Definition: IfxFlash.h:661
IfxFlash_eraseSector
IFX_INLINE void IfxFlash_eraseSector(uint32 sectorAddr)
Performs the erase sequence for a sector in program or data flash.
Definition: IfxFlash.h:578
IfxFlash_disableCorrectableErrorTracking
IFX_EXTERN void IfxFlash_disableCorrectableErrorTracking(IfxFlash_PortId portId, boolean disable)
Disable the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) regis...
Definition: IfxFlash.c:65
IfxFlash_eraseMultipleSectors
IFX_INLINE void IfxFlash_eraseMultipleSectors(uint32 sectorAddr, uint32 numSector)
Performs the erase sequence for n sectors in program or data flash.
Definition: IfxFlash.h:546
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_Assert.h
Assert functions.
IfxFlash_ErrorTracking_none
Error tracking disabled.
Definition: IfxFlash.h:71
IfxFlash_ErrorTracking
IfxFlash_ErrorTracking
enumeration for Flash Error tracking
Definition: IfxFlash.h:69
IfxFlash_getTrackedUncorrectableErrors
IFX_EXTERN uint32 IfxFlash_getTrackedUncorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked uncorrectable error addresses, error types and number of errors which are stored ...
Definition: IfxFlash.c:124
IfxFlash_eraseVerifyMultipleSectors
IFX_INLINE void IfxFlash_eraseVerifyMultipleSectors(uint32 sectorAddr, uint32 numSector)
Performs the "Erase Verify" sequence for multiple sectors.
Definition: IfxFlash.h:594
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxFlash_loadPage
IFX_INLINE void IfxFlash_loadPage(uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with a single 64bit access
Definition: IfxFlash.h:626
IfxFlash_UcbType
IfxFlash_UcbType
user configuration block type
Definition: IfxFlash_cfg.h:160
IfxFlash_ErrorTracking_Address
Error tracking address structure.
Definition: IfxFlash.h:96
IfxFlash_waitUnbusy
IFX_INLINE uint8 IfxFlash_waitUnbusy(uint32 flash, IfxFlash_FlashType flashType)
Polls the selected status flag in flash status register until it turns to 0.
Definition: IfxFlash.h:705
IfxFlash_waitUnbusyAll
IFX_INLINE boolean IfxFlash_waitUnbusyAll(void)
This function will wait till all the flash banks are out of busy state.
Definition: IfxFlash.h:777
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxFlash_erasePhysicalSector
IFX_INLINE void IfxFlash_erasePhysicalSector(uint32 sectorAddr)
Performs the erase sequence for a physical sector in program or data flash.
Definition: IfxFlash.h:562
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxFlash_disableUncorrectableErrorTracking
IFX_EXTERN void IfxFlash_disableUncorrectableErrorTracking(IfxFlash_PortId portId, boolean disable)
Clear the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) r...
Definition: IfxFlash.c:71
IfxFlash_enterPageMode
IFX_INLINE uint8 IfxFlash_enterPageMode(uint32 pageAddr)
Performs the sequence for entering program page mode.
Definition: IfxFlash.h:510
IfxFlash_suspendResumeMultipleSectors
IFX_INLINE void IfxFlash_suspendResumeMultipleSectors(uint32 sectorAddr, uint32 numSector)
Performs the "Suspend Resume" sequence for multiple sectors.
Definition: IfxFlash.h:673
IfxFlash_cfg.h
FLASH on-chip implementation data.
IfxFlash_resetToRead
IFX_INLINE void IfxFlash_resetToRead(uint32 flash)
reset to read mode
Definition: IfxFlash.h:651
IfxFlash_clearCorrectableErrorTracking
IFX_EXTERN void IfxFlash_clearCorrectableErrorTracking(IfxFlash_PortId portId)
Clear the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) registe...
Definition: IfxFlash.c:53
__st64_lu
IFX_INLINE void __st64_lu(void *addr, uint32 valueLower, uint32 valueUpper)
Definition: IfxCpu_Intrinsics.h:159
IfxFlash_selectUncorrectableErrorTracking
IFX_EXTERN void IfxFlash_selectUncorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for uncorrectable flash errors.
Definition: IfxFlash.c:166
IfxFlash_loadPage2X32
IFX_INLINE void IfxFlash_loadPage2X32(uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with two 32bit accesses
Definition: IfxFlash.h:637
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
IfxFlash_writePageOnce
IFX_INLINE void IfxFlash_writePageOnce(uint32 pageAddr)
Performs the "Write Page Once" sequence, similar to write page but performs a program verify after wr...
Definition: IfxFlash.h:761
IfxFlash_FlashType
IfxFlash_FlashType
Definition: IfxFlash_cfg.h:147
IfxFlash_suspendResumeSector
IFX_INLINE void IfxFlash_suspendResumeSector(uint32 sectorAddr)
Performs the "Suspend Resume" sequence.
Definition: IfxFlash.h:689
IFXFLASH_CMD_BASE_ADDRESS
#define IFXFLASH_CMD_BASE_ADDRESS
base address for general command sequences
Definition: IfxFlash_cfg.h:69
IfxFlash_ErrorTracking_uncorrectableMultiBitError
Detected uncorrectable errors.
Definition: IfxFlash.h:75
IfxFlash_writeBurst
IFX_INLINE void IfxFlash_writeBurst(uint32 pageAddr)
Performs the "Write Burst" sequence, similar to write page but performs a burst transfer instead of p...
Definition: IfxFlash.h:729
IfxFlash_selectCorrectableErrorTracking
IFX_EXTERN void IfxFlash_selectCorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for correctable flash errors.
Definition: IfxFlash.c:154
IfxFlash_PortId_PortId_1
Port Id 1.
Definition: IfxFlash.h:83
IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError
Corrected single-bit and double-bit errors.
Definition: IfxFlash.h:74
IfxFlash_ErrorTracking_Address::errorType
IfxFlash_ErrorTracking errorType
Error type.
Definition: IfxFlash.h:99
IfxFlash_getTrackedCorrectableErrors
IFX_EXTERN uint32 IfxFlash_getTrackedCorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked correctable error addresses, error types and number of errors which are stored in...
Definition: IfxFlash.c:94
IfxFlash_ErrorTracking_correctedDoubleBitError
Corrected double-bit errors.
Definition: IfxFlash.h:73
IfxFlash_clearStatus
IFX_INLINE void IfxFlash_clearStatus(uint32 flash)
Performs the "Clear Status" sequence. Operation and error flags are cleared.
Definition: IfxFlash.h:499
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
disable
void disable
Definition: IfxCpu_IntrinsicsDcc.h:465
IfxFlash_eraseMultiplePhysicalSectors
IFX_INLINE void IfxFlash_eraseMultiplePhysicalSectors(uint32 sectorAddr, uint32 numSector)
Performs the erase sequence for n sectors in program or data flash.
Definition: IfxFlash.h:530
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxFlash_PortId
IfxFlash_PortId
Corrected/UnCorrected Bits Address Buffer Port Id.
Definition: IfxFlash.h:80
IfxFlash_eraseVerifySector
IFX_INLINE void IfxFlash_eraseVerifySector(uint32 sectorAddr)
Performs the "Erase Verify" sequence.
Definition: IfxFlash.h:610
IfxFlash_ErrorTracking_correctedSingleBitError
corrected single bit errors
Definition: IfxFlash.h:72


iLLD_TC26B: IfxFlash_cfg.c Source File

  • _Impl
IfxFlash_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxFlash_cfg.c
3 * \brief FLASH on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxFlash_cfg.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
51
52 IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS] = {
53 {0xAF000000 + 0 * 0x2000, 0xAF000000 + 1 * 0x2000 - 1 },
54 {0xAF000000 + 1 * 0x2000, 0xAF000000 + 2 * 0x2000 - 1 },
55 {0xAF000000 + 2 * 0x2000, 0xAF000000 + 3 * 0x2000 - 1 },
56 {0xAF000000 + 3 * 0x2000, 0xAF000000 + 4 * 0x2000 - 1 },
57 {0xAF000000 + 4 * 0x2000, 0xAF000000 + 5 * 0x2000 - 1 },
58 {0xAF000000 + 5 * 0x2000, 0xAF000000 + 6 * 0x2000 - 1 },
59 {0xAF000000 + 6 * 0x2000, 0xAF000000 + 7 * 0x2000 - 1 },
60 {0xAF000000 + 7 * 0x2000, 0xAF000000 + 8 * 0x2000 - 1 },
61 {0xAF000000 + 8 * 0x2000, 0xAF000000 + 9 * 0x2000 - 1 },
62 {0xAF000000 + 9 * 0x2000, 0xAF000000 + 10 * 0x2000 - 1},
63 {0xAF000000 + 10 * 0x2000, 0xAF000000 + 11 * 0x2000 - 1},
64 {0xAF000000 + 11 * 0x2000, 0xAF000000 + 12 * 0x2000 - 1},
65 };
66
67 IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS] = {
68 {IFXFLASH_DFLASH_START, IFXFLASH_DFLASH_END},
69 };
70
71 IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS] = {
72 {0xaf100000, 0xaf1003ff}, // UCB0
73 {0xaf100400, 0xaf1007ff}, // UCB1
74 {0xaf100800, 0xaf100bff}, // UCB2
75 {0xaf100c00, 0xaf100fff}, // UCB3
76 {0xaf101000, 0xaf1013ff}, // UCB4
77 {0xaf101400, 0xaf1017ff}, // UCB5
78 {0xaf101800, 0xaf101bff}, // UCB6
79 {0xaf101c00, 0xaf101fff}, // UCB7
80 {0xaf102000, 0xaf1023ff}, // UCB8
81 {0xaf102400, 0xaf1027ff}, // UCB9
82 {0xaf102800, 0xaf102bff}, // UCB10
83 {0xaf102c00, 0xaf102fff}, // UCB11
84 {0xaf103000, 0xaf1033ff}, // UCB12
85 {0xaf103400, 0xaf1037ff}, // UCB13
86 {0xaf103800, 0xaf103bff}, // UCB14
87 {0xaf103c00, 0xaf103fff}, // UCB15
88 };
89
90 IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS] = {
91 {0xa0000000, 0xa0003fff}, // PF0 S0
92 {0xa0004000, 0xa0007fff}, // PF0 S1
93 {0xa0008000, 0xa000bfff}, // PF0 S2
94 {0xa000c000, 0xa000ffff}, // PF0 S3
95 {0xa0010000, 0xa0013fff}, // PF0 S4
96 {0xa0014000, 0xa0017fff}, // PF0 S5
97 {0xa0018000, 0xa001bfff}, // PF0 S6
98 {0xa001c000, 0xa001ffff}, // PF0 S7
99 {0xa0020000, 0xa0027fff}, // PF0 S8
100 {0xa0028000, 0xa002ffff}, // PF0 S9
101 {0xa0030000, 0xa0037fff}, // PF0 S10
102 {0xa0038000, 0xa003ffff}, // PF0 S11
103 {0xa0040000, 0xa0047fff}, // PF0 S12
104 {0xa0048000, 0xa004ffff}, // PF0 S13
105 {0xa0050000, 0xa0057fff}, // PF0 S14
106 {0xa0058000, 0xa005ffff}, // PF0 S15
107 {0xa0060000, 0xa006ffff}, // PF0 S16
108 {0xa0070000, 0xa007ffff}, // PF0 S17
109 {0xa0080000, 0xa008ffff}, // PF0 S18
110 {0xa0090000, 0xa009ffff}, // PF0 S19
111 {0xa00a0000, 0xa00bffff}, // PF0 S20
112 {0xa00c0000, 0xa00dffff}, // PF0 S21
113 {0xa00e0000, 0xa00fffff}, // PF0 S22
114 // TC26x has only 1MB PF0 and 1.5MB PF1
115 {0xa0100000, 0xa0103fff}, // PF1 S0
116 {0xa0104000, 0xa0107fff}, // PF1 S1
117 {0xa0108000, 0xa010bfff}, // PF1 S2
118 {0xa010c000, 0xa010ffff}, // PF1 S3
119 {0xa0110000, 0xa0113fff}, // PF1 S4
120 {0xa0114000, 0xa0117fff}, // PF1 S5
121 {0xa0118000, 0xa011bfff}, // PF1 S6
122 {0xa011c000, 0xa011ffff}, // PF1 S7
123 {0xa0120000, 0xa0127fff}, // PF1 S8
124 {0xa0128000, 0xa012ffff}, // PF1 S9
125 {0xa0130000, 0xa0137fff}, // PF1 S10
126 {0xa0138000, 0xa013ffff}, // PF1 S11
127 {0xa0140000, 0xa0147fff}, // PF1 S12
128 {0xa0148000, 0xa014ffff}, // PF1 S13
129 {0xa0150000, 0xa0157fff}, // PF1 S14
130 {0xa0158000, 0xa015ffff}, // PF1 S15
131 {0xa0160000, 0xa016ffff}, // PF1 S16
132 {0xa0170000, 0xa017ffff}, // PF1 S17
133 {0xa0180000, 0xa018ffff}, // PF1 S18
134 {0xa0190000, 0xa019ffff}, // PF1 S19
135 {0xa01a0000, 0xa01bffff}, // PF1 S20
136 {0xa01c0000, 0xa01dffff}, // PF1 S21
137 {0xa01e0000, 0xa01fffff}, // PF1 S22
138 {0xa0200000, 0xa023ffff}, // PF1 S23
139 {0xa0240000, 0xa027ffff}, // PF1 S24
140 };
141
142 IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS] = {
143 {0xa0000000, 0xa007ffff}, // PF0 PS0
144 {0xa0080000, 0xa00fffff}, // PF0 PS1
145 {0xa0100000, 0xa017ffff}, // PF1 PS0
146 {0xa0180000, 0xa01fffff}, // PF1 PS1
147 {0xa0200000, 0xa027ffff}, // PF1 PS2
148 };
IfxFlash_dFlashTableEepLog
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS]
Definition: IfxFlash_cfg.c:52
IfxFlash_flashSector
contains start and end address of sectors
Definition: IfxFlash_cfg.h:173
IFXFLASH_PFLASH_NUM_LOG_SECTORS
#define IFXFLASH_PFLASH_NUM_LOG_SECTORS
Definition: IfxFlash_cfg.h:123
IfxFlash_dFlashTableUcbLog
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]
Definition: IfxFlash_cfg.c:71
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxFlash_pFlashTablePhys
IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]
Definition: IfxFlash_cfg.c:142
IfxFlash_dFlashTablePhys
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]
Definition: IfxFlash_cfg.c:67
IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS
#define IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS
Phy sector for DF.
Definition: IfxFlash_cfg.h:87
IfxFlash_cfg.h
FLASH on-chip implementation data.
IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS
#define IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS
Definition: IfxFlash_cfg.h:89
IFXFLASH_DFLASH_START
#define IFXFLASH_DFLASH_START
Definition: IfxFlash_cfg.h:97
IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS
#define IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS
Definition: IfxFlash_cfg.h:125
IFXFLASH_DFLASH_END
#define IFXFLASH_DFLASH_END
Definition: IfxFlash_cfg.h:81
IFXFLASH_DFLASH_NUM_LOG_SECTORS
#define IFXFLASH_DFLASH_NUM_LOG_SECTORS
Definition: IfxFlash_cfg.h:83
IfxFlash_pFlashTableLog
IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS]
Definition: IfxFlash_cfg.c:90


iLLD_TC26B: IfxFlash_cfg.h Source File

  • _Impl
IfxFlash_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxFlash_cfg.h
3 * \brief FLASH on-chip implementation data
4 * \ingroup IfxLld_Flash
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Flash FLASH
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Flash_Impl Implementation
44 * \ingroup IfxLld_Flash
45 * \defgroup IfxLld_Flash_Std Standard Driver
46 * \ingroup IfxLld_Flash
47 */
48
49 #ifndef IFXFLASH_CFG_H
50 #define IFXFLASH_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "Cpu/Std/IfxCpu_Intrinsics.h"
57
58 /******************************************************************************/
59 /*-----------------------------------Macros-----------------------------------*/
60 /******************************************************************************/
61
62 /** \brief number of flash modules.
63 * This macro may be deprecated in future. Use IFXFLASH_NUM_MODULES instead.
64 */
65 #define IFXFLASH_NUM_FLASH_MODULES (1)
66
67 /** \brief base address for general command sequences
68 */
69 #define IFXFLASH_CMD_BASE_ADDRESS (0xaf000000)
70
71 /** \brief offset between command areas (in DFlash range)
72 */
73 #define IFXFLASH_CMD_BASE_OFFSET (0x00100000)
74
75 #define IFXFLASH_DFLASH_BANKS (1)
76
77 /** \brief Dflash burst length
78 */
79 #define IFXFLASH_DFLASH_BURST_LENGTH (0x20)
80
81 #define IFXFLASH_DFLASH_END (IFXFLASH_DFLASH_START + IFXFLASH_DFLASH_SIZE - 1)
82
83 #define IFXFLASH_DFLASH_NUM_LOG_SECTORS (12)
84
85 /** \brief Phy sector for DF
86 */
87 #define IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS (1)
88
89 #define IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS (16)
90
91 /** \brief 8 bytes
92 */
93 #define IFXFLASH_DFLASH_PAGE_LENGTH (8)
94
95 #define IFXFLASH_DFLASH_SIZE (IFXFLASH_DFLASH_NUM_LOG_SECTORS * 0x2000)
96
97 #define IFXFLASH_DFLASH_START (0xaf000000)
98
99 /** \brief
100 */
101 #define IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS (10)
102
103 /** \brief
104 */
105 #define IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS (1)
106
107 /** \brief number of flash modules
108 */
109 #define IFXFLASH_NUM_MODULES (1)
110
111 #define IFXFLASH_PFLASH_BANKS (2)
112
113 /** \brief P flash burst length
114 */
115 #define IFXFLASH_PFLASH_BURST_LENGTH (0x100)
116
117 /** \brief p flash end
118 */
119 #define IFXFLASH_PFLASH_END ()
120
121 /** \brief
122 */
123 #define IFXFLASH_PFLASH_NUM_LOG_SECTORS (23 + 25)
124
125 #define IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS (2 + 3)
126
127 /** \brief offset between PMU PFlash ranges
128 */
129 #define IFXFLASH_PFLASH_OFFSET (0x00800000)
130
131 #define IFXFLASH_PFLASH_PAGE_LENGTH (32)
132
133 /** \brief p flash size
134 */
135 #define IFXFLASH_PFLASH_SIZE (0x00280000)
136
137 /** \brief p flash start
138 */
139 #define IFXFLASH_PFLASH_START (0xa0000000)
140
141 /******************************************************************************/
142 /*-------------------------------Enumerations---------------------------------*/
143 /******************************************************************************/
144
145 /** \brief
146 */
147 typedef enum
148 {
149 IfxFlash_FlashType_Fa = 0, /**< \brief Flash Array */
150 IfxFlash_FlashType_D0 = 1, /**< \brief data flash #0 */
151 IfxFlash_FlashType_D1 = 2, /**< \brief data flash #1 */
152 IfxFlash_FlashType_P0 = 3, /**< \brief program flash #0 */
153 IfxFlash_FlashType_P1 = 4, /**< \brief program flash #1 */
154 IfxFlash_FlashType_P2 = 5, /**< \brief program flash #2 */
155 IfxFlash_FlashType_P3 = 6 /**< \brief program flash #3 */
156 } IfxFlash_FlashType;
157
158 /** \brief user configuration block type
159 */
160 typedef enum
161 {
162 IfxFlash_UcbType_ucb0 = 0, /**< \brief UCB 0 */
163 IfxFlash_UcbType_ucb1 = 1, /**< \brief UCB 1 */
164 IfxFlash_UcbType_ucbHsmc = 5 /**< \brief HSM UCB */
165 } IfxFlash_UcbType;
166
167 /******************************************************************************/
168 /*-----------------------------Data Structures--------------------------------*/
169 /******************************************************************************/
170
171 /** \brief contains start and end address of sectors
172 */
173 typedef struct
174 {
175 uint32 start; /**< \brief start address of sector */
176 uint32 end; /**< \brief end address of sector */
177 } IfxFlash_flashSector;
178
179 /******************************************************************************/
180 /*-------------------Global Exported Variables/Constants----------------------*/
181 /******************************************************************************/
182
183 IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS];
184
185 IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS];
186
187 IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS];
188
189 IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS];
190
191 IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS];
192
193 #endif /* IFXFLASH_CFG_H */
IfxFlash_FlashType_D1
data flash #1
Definition: IfxFlash_cfg.h:151
IfxFlash_dFlashTableEepLog
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS]
Definition: IfxFlash_cfg.h:183
IfxFlash_flashSector
contains start and end address of sectors
Definition: IfxFlash_cfg.h:173
IfxFlash_dFlashTablePhys
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]
Definition: IfxFlash_cfg.h:185
IFXFLASH_PFLASH_NUM_LOG_SECTORS
#define IFXFLASH_PFLASH_NUM_LOG_SECTORS
Definition: IfxFlash_cfg.h:123
IfxFlash_UcbType_ucb1
UCB 1.
Definition: IfxFlash_cfg.h:163
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxFlash_FlashType_Fa
Flash Array.
Definition: IfxFlash_cfg.h:149
IfxFlash_flashSector::end
uint32 end
end address of sector
Definition: IfxFlash_cfg.h:176
IfxCpu_Intrinsics.h
IfxFlash_UcbType
IfxFlash_UcbType
user configuration block type
Definition: IfxFlash_cfg.h:160
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxFlash_UcbType_ucbHsmc
HSM UCB.
Definition: IfxFlash_cfg.h:164
IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS
#define IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS
Phy sector for DF.
Definition: IfxFlash_cfg.h:87
IfxFlash_flashSector::start
uint32 start
start address of sector
Definition: IfxFlash_cfg.h:175
IfxFlash_UcbType_ucb0
UCB 0.
Definition: IfxFlash_cfg.h:162
IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS
#define IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS
Definition: IfxFlash_cfg.h:89
IfxFlash_FlashType
IfxFlash_FlashType
Definition: IfxFlash_cfg.h:147
IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS
#define IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS
Definition: IfxFlash_cfg.h:125
IfxFlash_FlashType_P3
program flash #3
Definition: IfxFlash_cfg.h:155
IfxFlash_pFlashTablePhys
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]
Definition: IfxFlash_cfg.h:191
IFXFLASH_DFLASH_NUM_LOG_SECTORS
#define IFXFLASH_DFLASH_NUM_LOG_SECTORS
Definition: IfxFlash_cfg.h:83
IfxFlash_FlashType_P2
program flash #2
Definition: IfxFlash_cfg.h:154
IfxFlash_FlashType_P1
program flash #1
Definition: IfxFlash_cfg.h:153
IfxFlash_FlashType_P0
program flash #0
Definition: IfxFlash_cfg.h:152
IfxFlash_FlashType_D0
data flash #0
Definition: IfxFlash_cfg.h:150
IfxFlash_pFlashTableLog
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS]
Definition: IfxFlash_cfg.h:189
IfxFlash_dFlashTableUcbLog
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]
Definition: IfxFlash_cfg.h:187


iLLD_TC26B: IfxGlobal_cfg.h Source File

  • _Impl
IfxGlobal_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxGlobal_cfg.h
3 * \brief Global definitions
4 * \ingroup IfxLld_Global
5 *
6 *
7 * \version iLLD_1_0_1_12_0
8 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 * \defgroup IfxLld_Global Global Definitions
43 * \ingroup IfxLld
44 *
45 */
46
47 #ifndef IFXGLOBAL_H
48 #define IFXGLOBAL_H 1
49
50 /******************************************************************************/
51 /*-----------------------------------Macros-----------------------------------*/
52 /******************************************************************************/
53 /** \brief Microcontroller derivative corresponding to the iLLD implementation
54 */
55 #define IFXGLOBAL_DERIVATIVE_TC26xB (1)
56
57 /** \brief Microcontroller derivative name
58 */
59 #define IFXGLOBAL_DERIVATIVE_NAME "TC26xB"
60
61 #endif /* IFXGLOBAL_H */


iLLD_TC26B: IfxGpt12.c Source File

  • Gpt12
  • Std
IfxGpt12.c
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12.c
3 * \brief GPT12 basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGpt12.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 float32 IfxGpt12_T2_getFrequency(Ifx_GPT12 *gpt12)
53 {
54 float32 freq = IfxGpt12_getModuleFrequency(gpt12);
55
56 IfxGpt12_Mode mode;
57 IfxGpt12_TimerInputPrescaler prescaler;
58
59 IfxGpt12_Gpt1BlockPrescaler bps1 = (IfxGpt12_Gpt1BlockPrescaler)gpt12->T3CON.B.BPS1;
60
61 switch (bps1)
62 {
63 case IfxGpt12_Gpt1BlockPrescaler_4:
64 freq = freq / 4;
65 break;
66 case IfxGpt12_Gpt1BlockPrescaler_8:
67 freq = freq / 8;
68 break;
69 case IfxGpt12_Gpt1BlockPrescaler_16:
70 freq = freq / 16;
71 break;
72 default: /* case IfxGpt12_Gpt1BlockPrescaler_32: */
73 freq = freq / 32;
74 break;
75 }
76
77 mode = IfxGpt12_T2_getMode(gpt12);
78 prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T2CON.B.T2I;
79
80 if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
81 {
82 freq = freq / (1 << prescaler);
83 }
84 else
85 {
86 freq = freq / 2;
87 }
88
89 return freq;
90 }
91
92
93 float32 IfxGpt12_T3_getFrequency(Ifx_GPT12 *gpt12)
94 {
95 float32 freq = IfxGpt12_getModuleFrequency(gpt12);
96
97 IfxGpt12_Mode mode;
98 IfxGpt12_TimerInputPrescaler prescaler;
99
100 IfxGpt12_Gpt1BlockPrescaler bps1 = (IfxGpt12_Gpt1BlockPrescaler)gpt12->T3CON.B.BPS1;
101
102 switch (bps1)
103 {
104 case IfxGpt12_Gpt1BlockPrescaler_4:
105 freq = freq / 4;
106 break;
107 case IfxGpt12_Gpt1BlockPrescaler_8:
108 freq = freq / 8;
109 break;
110 case IfxGpt12_Gpt1BlockPrescaler_16:
111 freq = freq / 16;
112 break;
113 default: /* case IfxGpt12_Gpt1BlockPrescaler_32: */
114 freq = freq / 32;
115 break;
116 }
117
118 mode = (IfxGpt12_Mode)gpt12->T3CON.B.T3M;
119 prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T3CON.B.T3I;
120
121 if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
122 {
123 freq = freq / (1 << prescaler);
124 }
125 else
126 {
127 freq = freq / 2;
128 }
129
130 return freq;
131 }
132
133
134 float32 IfxGpt12_T4_getFrequency(Ifx_GPT12 *gpt12)
135 {
136 float32 freq = IfxGpt12_getModuleFrequency(gpt12);
137
138 IfxGpt12_Mode mode;
139 IfxGpt12_TimerInputPrescaler prescaler;
140
141 IfxGpt12_Gpt1BlockPrescaler bps1 = (IfxGpt12_Gpt1BlockPrescaler)gpt12->T3CON.B.BPS1;
142
143 switch (bps1)
144 {
145 case IfxGpt12_Gpt1BlockPrescaler_4:
146 freq = freq / 4;
147 break;
148 case IfxGpt12_Gpt1BlockPrescaler_8:
149 freq = freq / 8;
150 break;
151 case IfxGpt12_Gpt1BlockPrescaler_16:
152 freq = freq / 16;
153 break;
154 default: /* case IfxGpt12_Gpt1BlockPrescaler_32: */
155 freq = freq / 32;
156 break;
157 }
158
159 mode = (IfxGpt12_Mode)gpt12->T4CON.B.T4M;
160 prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T4CON.B.T4I;
161
162 if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
163 {
164 freq = freq / (1 << prescaler);
165 }
166 else
167 {
168 freq = freq / 2;
169 }
170
171 return freq;
172 }
173
174
175 float32 IfxGpt12_T5_getFrequency(Ifx_GPT12 *gpt12)
176 {
177 float32 freq = IfxGpt12_getModuleFrequency(gpt12);
178
179 IfxGpt12_Mode mode;
180 IfxGpt12_TimerInputPrescaler prescaler;
181
182 IfxGpt12_Gpt2BlockPrescaler bps2 = (IfxGpt12_Gpt2BlockPrescaler)gpt12->T6CON.B.BPS2;
183
184 switch (bps2)
185 {
186 case IfxGpt12_Gpt2BlockPrescaler_2:
187 freq = freq / 2;
188 break;
189 case IfxGpt12_Gpt2BlockPrescaler_4:
190 freq = freq / 4;
191 break;
192 case IfxGpt12_Gpt2BlockPrescaler_8:
193 freq = freq / 8;
194 break;
195 default: /* case IfxGpt12_Gpt2BlockPrescaler_16: */
196 freq = freq / 16;
197 break;
198 }
199
200 mode = (IfxGpt12_Mode)gpt12->T5CON.B.T5M;
201 prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T5CON.B.T5I;
202
203 if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
204 {
205 freq = freq / (1 << prescaler);
206 }
207 else
208 {
209 freq = freq / 2;
210 }
211
212 return freq;
213 }
214
215
216 float32 IfxGpt12_T6_getFrequency(Ifx_GPT12 *gpt12)
217 {
218 float32 freq = IfxGpt12_getModuleFrequency(gpt12);
219
220 IfxGpt12_Mode mode;
221 IfxGpt12_TimerInputPrescaler prescaler;
222
223 IfxGpt12_Gpt2BlockPrescaler bps2 = (IfxGpt12_Gpt2BlockPrescaler)gpt12->T6CON.B.BPS2;
224
225 switch (bps2)
226 {
227 case IfxGpt12_Gpt2BlockPrescaler_2:
228 freq = freq / 2;
229 break;
230 case IfxGpt12_Gpt2BlockPrescaler_4:
231 freq = freq / 4;
232 break;
233 case IfxGpt12_Gpt2BlockPrescaler_8:
234 freq = freq / 8;
235 break;
236 default: /* case IfxGpt12_Gpt2BlockPrescaler_16: */
237 freq = freq / 16;
238 break;
239 }
240
241 mode = (IfxGpt12_Mode)gpt12->T6CON.B.T6M;
242 prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T6CON.B.T6I;
243
244 if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
245 {
246 freq = freq / (1 << prescaler);
247 }
248 else
249 {
250 freq = freq / 2;
251 }
252
253 return freq;
254 }
255
256
257 void IfxGpt12_disableModule(Ifx_GPT12 *gpt12)
258 {
259 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
260 IfxScuWdt_clearCpuEndinit(psw);
261 gpt12->CLC.B.DISR = 1;
262 IfxScuWdt_setCpuEndinit(psw);
263 }
264
265
266 void IfxGpt12_enableModule(Ifx_GPT12 *gpt12)
267 {
268 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
269 IfxScuWdt_clearCpuEndinit(psw);
270 gpt12->CLC.B.DISR = 0;
271 IfxScuWdt_setCpuEndinit(psw);
272 }
273
274
275 void IfxGpt12_initTxEudInPin(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
276 {
277 IfxPort_setPinModeInput(txEudIn->pin.port, txEudIn->pin.pinIndex, inputMode);
278
279 switch (txEudIn->timer)
280 {
281 case 2:
282 IfxGpt12_T2_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
283 break;
284 case 3:
285 IfxGpt12_T3_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
286 break;
287 case 4:
288 IfxGpt12_T4_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
289 break;
290 case 5:
291 IfxGpt12_T5_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
292 break;
293 case 6:
294 IfxGpt12_T6_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
295 break;
296 default:
297 break;
298 }
299 }
300
301
302 void IfxGpt12_initTxEudInPinWithPadLevel(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
303 {
304 IfxPort_setPinModeInput(txEudIn->pin.port, txEudIn->pin.pinIndex, inputMode);
305 IfxPort_setPinPadDriver(txEudIn->pin.port, txEudIn->pin.pinIndex, padDriver);
306
307 switch (txEudIn->timer)
308 {
309 case 2:
310 IfxGpt12_T2_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
311 break;
312 case 3:
313 IfxGpt12_T3_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
314 break;
315 case 4:
316 IfxGpt12_T4_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
317 break;
318 case 5:
319 IfxGpt12_T5_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
320 break;
321 case 6:
322 IfxGpt12_T6_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
323 break;
324 default:
325 break;
326 }
327 }
328
329
330 void IfxGpt12_initTxInPin(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
331 {
332 IfxPort_setPinModeInput(txIn->pin.port, txIn->pin.pinIndex, inputMode);
333
334 switch (txIn->timer)
335 {
336 case 2:
337 IfxGpt12_T2_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
338 break;
339 case 3:
340 IfxGpt12_T3_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
341 break;
342 case 4:
343 IfxGpt12_T4_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
344 break;
345 case 5:
346 IfxGpt12_T5_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
347 break;
348 case 6:
349 IfxGpt12_T6_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
350 break;
351 default:
352 break;
353 }
354 }
355
356
357 void IfxGpt12_initTxInPinWithPadLevel(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
358 {
359 IfxPort_setPinModeInput(txIn->pin.port, txIn->pin.pinIndex, inputMode);
360 IfxPort_setPinPadDriver(txIn->pin.port, txIn->pin.pinIndex, padDriver);
361
362 switch (txIn->timer)
363 {
364 case 2:
365 IfxGpt12_T2_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
366 break;
367 case 3:
368 IfxGpt12_T3_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
369 break;
370 case 4:
371 IfxGpt12_T4_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
372 break;
373 case 5:
374 IfxGpt12_T5_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
375 break;
376 case 6:
377 IfxGpt12_T6_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
378 break;
379 default:
380 break;
381 }
382 }
383
384
385 void IfxGpt12_resetModule(Ifx_GPT12 *gpt12)
386 {
387 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
388
389 IfxScuWdt_clearCpuEndinit(passwd);
390 gpt12->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
391 gpt12->KRST1.B.RST = 1;
392 IfxScuWdt_setCpuEndinit(passwd);
393
394 while (0 == gpt12->KRST0.B.RSTSTAT) /* Wait until reset is executed */
395
396 {}
397
398 IfxScuWdt_clearCpuEndinit(passwd);
399 gpt12->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
400 IfxScuWdt_setCpuEndinit(passwd);
401 }
IfxGpt12_Mode_highGatedTimer
High Gated Timer Mode selected.
Definition: IfxGpt12.h:191
IfxGpt12_T4_setInput
IFX_INLINE void IfxGpt12_T4_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T4 timer.
Definition: IfxGpt12.h:1327
IfxGpt12_Gpt2BlockPrescaler_4
fGPT/4
Definition: IfxGpt12.h:155
IfxGpt12_T2_setInput
IFX_INLINE void IfxGpt12_T2_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T2 timer.
Definition: IfxGpt12.h:1124
IfxGpt12_TxEud_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxGpt12_PinMap.h:69
IfxGpt12_initTxEudInPin
void IfxGpt12_initTxEudInPin(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
Initializes a TxEUDIn_IN input.
Definition: IfxGpt12.c:275
IfxGpt12_Gpt1BlockPrescaler_4
fGPT/4
Definition: IfxGpt12.h:145
IfxGpt12_T4_setEudInput
IFX_INLINE void IfxGpt12_T4_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T4 timer.
Definition: IfxGpt12.h:1315
IfxGpt12_Input
IfxGpt12_Input
Input Select for TxIN Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4)
Definition: IfxGpt12.h:175
IfxGpt12_EudInput
IfxGpt12_EudInput
Input Select for TxEUD Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4)
Definition: IfxGpt12.h:131
IfxGpt12_TimerInputPrescaler
IfxGpt12_TimerInputPrescaler
Input prescaler Selection for the timer Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4) ...
Definition: IfxGpt12.h:251
IfxGpt12_Mode_lowGatedTimer
Low Gated Timer Mode selected.
Definition: IfxGpt12.h:190
IfxGpt12_TxEud_In
TxEUD pin mapping structure.
Definition: IfxGpt12_PinMap.h:64
IfxGpt12_T6_getFrequency
float32 IfxGpt12_T6_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T6 timer.
Definition: IfxGpt12.c:216
IfxGpt12_resetModule
void IfxGpt12_resetModule(Ifx_GPT12 *gpt12)
resets GPT12 kernel
Definition: IfxGpt12.c:385
IfxGpt12_T2_getFrequency
float32 IfxGpt12_T2_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T2 timer.
Definition: IfxGpt12.c:52
float32
float float32
Definition: Platform_Types.h:170
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
IfxGpt12_Gpt2BlockPrescaler
IfxGpt12_Gpt2BlockPrescaler
Gpt2 block prescaler Selection Definition in IfxGPT12.T6CON.B.BPS2.
Definition: IfxGpt12.h:153
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxGpt12_disableModule
void IfxGpt12_disableModule(Ifx_GPT12 *gpt12)
Disables the module.
Definition: IfxGpt12.c:257
IfxGpt12_getModuleFrequency
IFX_INLINE float32 IfxGpt12_getModuleFrequency(Ifx_GPT12 *gpt12)
Returns the gpt12 module frequency.
Definition: IfxGpt12.h:1577
IfxGpt12_Gpt1BlockPrescaler_8
fGPT/8
Definition: IfxGpt12.h:144
IfxGpt12_TxEud_In::timer
uint8 timer
Timer number.
Definition: IfxGpt12_PinMap.h:67
IfxGpt12.h
GPT12 basic functionality.
IfxGpt12_Gpt2BlockPrescaler_2
fGPT/2
Definition: IfxGpt12.h:156
IfxGpt12_Gpt2BlockPrescaler_8
fGPT/8
Definition: IfxGpt12.h:158
IfxGpt12_Mode
IfxGpt12_Mode
Timer operating mode Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4)
Definition: IfxGpt12.h:186
IfxGpt12_T6_setInput
IFX_INLINE void IfxGpt12_T6_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T6 timer.
Definition: IfxGpt12.h:1532
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxGpt12_Gpt1BlockPrescaler
IfxGpt12_Gpt1BlockPrescaler
GPT1 block prescaler Selection Definition in IfxGPT12.T3CON.B.BPS1.
Definition: IfxGpt12.h:142
IfxGpt12_TxIn_In
TxIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:73
IfxGpt12_T2_setEudInput
IFX_INLINE void IfxGpt12_T2_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T2 timer.
Definition: IfxGpt12.h:1111
IfxGpt12_T3_setEudInput
IFX_INLINE void IfxGpt12_T3_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T3 timer.
Definition: IfxGpt12.h:1217
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxGpt12_initTxInPin
void IfxGpt12_initTxInPin(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
Initializes a TxIn input.
Definition: IfxGpt12.c:330
IfxGpt12_Gpt1BlockPrescaler_16
fGPT/16
Definition: IfxGpt12.h:147
IfxGpt12_initTxInPinWithPadLevel
void IfxGpt12_initTxInPinWithPadLevel(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXIN pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:357
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGpt12_enableModule
void IfxGpt12_enableModule(Ifx_GPT12 *gpt12)
Enables the module.
Definition: IfxGpt12.c:266
IfxGpt12_T4_getFrequency
float32 IfxGpt12_T4_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T4 timer.
Definition: IfxGpt12.c:134
IfxGpt12_T6_setEudInput
IFX_INLINE void IfxGpt12_T6_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T6 timer.
Definition: IfxGpt12.h:1525
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxGpt12_initTxEudInPinWithPadLevel
void IfxGpt12_initTxEudInPinWithPadLevel(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:302
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxGpt12_TxEud_In::module
Ifx_GPT12 * module
Base address.
Definition: IfxGpt12_PinMap.h:66
IfxGpt12_T3_setInput
IFX_INLINE void IfxGpt12_T3_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T3 timer.
Definition: IfxGpt12.h:1229
IfxGpt12_T5_setEudInput
IFX_INLINE void IfxGpt12_T5_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T5 timer.
Definition: IfxGpt12.h:1436
IfxGpt12_Mode_timer
Timer Mode selected.
Definition: IfxGpt12.h:188
IfxGpt12_T2_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T2_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T2 timer.
Definition: IfxGpt12.h:1068
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxGpt12_TxEud_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGpt12_PinMap.h:68
IfxGpt12_T5_setInput
IFX_INLINE void IfxGpt12_T5_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T5 timer.
Definition: IfxGpt12.h:1443
IfxGpt12_T3_getFrequency
float32 IfxGpt12_T3_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T3 timer.
Definition: IfxGpt12.c:93
IfxGpt12_T5_getFrequency
float32 IfxGpt12_T5_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer.
Definition: IfxGpt12.c:175


iLLD_TC26B: IfxGpt12.h Source File

  • Gpt12
  • Std
IfxGpt12.h
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12.h
3 * \brief GPT12 basic functionality
4 * \ingroup IfxLld_Gpt12
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gpt12_Std_Enumerations Enumerations
42 * \ingroup IfxLld_Gpt12_Std
43 * \defgroup IfxLld_Gpt12_Std_InterruptFunctions Interrupt Functions
44 * \ingroup IfxLld_Gpt12_Std
45 * \defgroup IfxLld_Gpt12_Std_ConfigurationFunctions Configuration Functions
46 * \ingroup IfxLld_Gpt12_Std
47 * \defgroup IfxLld_Gpt12_Std_UtilityFunctions Utility Functions
48 * \ingroup IfxLld_Gpt12_Std
49 * \defgroup IfxLld_Gpt12_Std_OperativeFunctions Operative Functions
50 * \ingroup IfxLld_Gpt12_Std
51 */
52
53 #ifndef IFXGPT12_H
54 #define IFXGPT12_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "_Impl/IfxGpt12_cfg.h"
61 #include "Src/Std/IfxSrc.h"
62 #include "_Utilities/Ifx_Assert.h"
63 #include "Scu/Std/IfxScuCcu.h"
64 #include "IfxGpt12_reg.h"
65 #include "_PinMap/IfxGpt12_PinMap.h"
66
67 /******************************************************************************/
68 /*--------------------------------Enumerations--------------------------------*/
69 /******************************************************************************/
70
71 /** \addtogroup IfxLld_Gpt12_Std_Enumerations
72 * \{ */
73 /** \brief Input Select for CAPIN \n
74 * Definition in IfxGPT12.PISEL.B.ISCAPIN
75 */
76 typedef enum
77 {
78 IfxGpt12_CaptureInput_A = 0, /**< \brief signal CAPINA selected */
79 IfxGpt12_CaptureInput_B = 1, /**< \brief signal CAPINB selected */
80 IfxGpt12_CaptureInput_C = 2, /**< \brief signal CAPINC selected */
81 IfxGpt12_CaptureInput_D = 3 /**< \brief signal CAPIND selected */
82 } IfxGpt12_CaptureInput;
83
84 /** \brief Tx Input Edge Selection (Capture Mode, x=2,4)
85 */
86 typedef enum
87 {
88 IfxGpt12_CaptureInputMode_none = 0, /**< \brief None, Counter is disabled */
89 IfxGpt12_CaptureInputMode_risingEdgeTxIN = 1, /**< \brief rising edge on TxIN */
90 IfxGpt12_CaptureInputMode_fallingEdgeTxIN = 2, /**< \brief falling edge on TxIN */
91 IfxGpt12_CaptureInputMode_bothEdgesTxIN = 3 /**< \brief (rising or falling edge) on TxIN */
92 } IfxGpt12_CaptureInputMode;
93
94 /** \brief Capture Trigger Enable \n
95 * Definition in IfxGPT12.T5CON.B.CT3
96 */
97 typedef enum
98 {
99 IfxGpt12_CaptureTrigger_capin = 0, /**< \brief Capture Trigger Enable from CAPIN */
100 IfxGpt12_CaptureTrigger_t3inOrT3EUD = 1 /**< \brief Capture Trigger Enable from T3IN/T3EUD */
101 } IfxGpt12_CaptureTrigger;
102
103 /** \brief Capture Trigger Selection \n
104 * Definition in IfxGPT12.T5CON.B.CI
105 */
106 typedef enum
107 {
108 IfxGpt12_CaptureTriggerMode_disabled = 0, /**< \brief capture disabled */
109 IfxGpt12_CaptureTriggerMode_risingEdge = 1, /**< \brief positive Transition on CAPIN or any Transition on T3IN */
110 IfxGpt12_CaptureTriggerMode_fallingEdge = 2, /**< \brief negative Transition on CAPIN or any Transition on T3EUD */
111 IfxGpt12_CaptureTriggerMode_randomEdge = 3 /**< \brief Any Transition on CAPIN or any Transition on T3IN/T3EUD */
112 } IfxGpt12_CaptureTriggerMode;
113
114 /** \brief Input Edge Selection for counter mode\n
115 * Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 6)
116 */
117 typedef enum
118 {
119 IfxGpt12_CounterInputMode_counterDisabled = 0, /**< \brief Counter Tx is disabled */
120 IfxGpt12_CounterInputMode_risingEdgeTxIN = 1, /**< \brief rising edge on TxIN */
121 IfxGpt12_CounterInputMode_fallingEdgeTxIN = 2, /**< \brief falling edge on TxIN */
122 IfxGpt12_CounterInputMode_bothEdgesTxIN = 3, /**< \brief rising or falling edge on TxIN */
123 IfxGpt12_CounterInputMode_risingEdgeTxOTL = 5, /**< \brief rising edge of TxOTL (x=3,6) */
124 IfxGpt12_CounterInputMode_fallingEdgeTxOTL = 6, /**< \brief falling edge of TxOTL */
125 IfxGpt12_CounterInputMode_bothEdgesTxOTL = 7 /**< \brief rising or falling edge of TxOTL */
126 } IfxGpt12_CounterInputMode;
127
128 /** \brief Input Select for TxEUD \n
129 * Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4)
130 */
131 typedef enum
132 {
133 IfxGpt12_EudInput_A = 0, /**< \brief signal TXEUDA selected */
134 IfxGpt12_EudInput_B = 1, /**< \brief signal TXEUDB selected */
135 IfxGpt12_EudInput_C = 2, /**< \brief signal TXEUDC selected */
136 IfxGpt12_EudInput_D = 3 /**< \brief signal TXEUDD selected */
137 } IfxGpt12_EudInput;
138
139 /** \brief GPT1 block prescaler Selection\n
140 * Definition in IfxGPT12.T3CON.B.BPS1
141 */
142 typedef enum
143 {
144 IfxGpt12_Gpt1BlockPrescaler_8 = 0, /**< \brief fGPT/8 */
145 IfxGpt12_Gpt1BlockPrescaler_4 = 1, /**< \brief fGPT/4 */
146 IfxGpt12_Gpt1BlockPrescaler_32 = 2, /**< \brief fGPT/32 */
147 IfxGpt12_Gpt1BlockPrescaler_16 = 3 /**< \brief fGPT/16 */
148 } IfxGpt12_Gpt1BlockPrescaler;
149
150 /** \brief Gpt2 block prescaler Selection\n
151 * Definition in IfxGPT12.T6CON.B.BPS2
152 */
153 typedef enum
154 {
155 IfxGpt12_Gpt2BlockPrescaler_4 = 0, /**< \brief fGPT/4 */
156 IfxGpt12_Gpt2BlockPrescaler_2 = 1, /**< \brief fGPT/2 */
157 IfxGpt12_Gpt2BlockPrescaler_16 = 2, /**< \brief fGPT/16 */
158 IfxGpt12_Gpt2BlockPrescaler_8 = 3 /**< \brief fGPT/8 */
159 } IfxGpt12_Gpt2BlockPrescaler;
160
161 /** \brief Input Edge Selection for Incremental Interface mode\n
162 * Definition in IfxGPT12.TxCON.B.TxI (x=2, 3 and 4)
163 */
164 typedef enum
165 {
166 IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx = 0, /**< \brief Counter Tx Stop */
167 IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN = 1, /**< \brief (rising or falling edge) on TxIN */
168 IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD = 2, /**< \brief (rising or falling edge) on TxEUD */
169 IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD = 3 /**< \brief (rising or falling edge) on any Tx input (TxIN or TxEUD) */
170 } IfxGpt12_IncrementalInterfaceInputMode;
171
172 /** \brief Input Select for TxIN \n
173 * Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4)
174 */
175 typedef enum
176 {
177 IfxGpt12_Input_A = 0, /**< \brief signal TXINA selected */
178 IfxGpt12_Input_B = 1, /**< \brief signal TXINB selected */
179 IfxGpt12_Input_C = 2, /**< \brief signal TXINC selected */
180 IfxGpt12_Input_D = 3 /**< \brief signal TXIND selected */
181 } IfxGpt12_Input;
182
183 /** \brief Timer operating mode \n
184 * Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4)
185 */
186 typedef enum
187 {
188 IfxGpt12_Mode_timer = 0, /**< \brief Timer Mode selected */
189 IfxGpt12_Mode_counter = 1, /**< \brief Counter Mode selected */
190 IfxGpt12_Mode_lowGatedTimer = 2, /**< \brief Low Gated Timer Mode selected */
191 IfxGpt12_Mode_highGatedTimer = 3, /**< \brief High Gated Timer Mode selected */
192 IfxGpt12_Mode_reload = 4, /**< \brief Reload Mode selected */
193 IfxGpt12_Mode_capture = 5, /**< \brief Capture Mode selected */
194 IfxGpt12_Mode_incrementalInterfaceRotationDetection = 6, /**< \brief Incremental Interface Mode selected */
195 IfxGpt12_Mode_incrementalInterfaceEdgeDetection = 7 /**< \brief Incremental Interface Mode selected */
196 } IfxGpt12_Mode;
197
198 /** \brief Input Edge Selection for reload mode\n
199 * Definition in IfxGPT12.TxCON.B.TxI (x = 2 and 4)
200 */
201 typedef enum
202 {
203 IfxGpt12_ReloadInputMode_counterDisabled = 0, /**< \brief Counter Tx is disabled */
204 IfxGpt12_ReloadInputMode_risingEdgeTxIN = 1, /**< \brief rising edge on TxIN */
205 IfxGpt12_ReloadInputMode_fallingEdgeTxIN = 2, /**< \brief falling edge on TxIN */
206 IfxGpt12_ReloadInputMode_bothEdgesTxIN = 3, /**< \brief rising or falling edge on TxIN */
207 IfxGpt12_ReloadInputMode_risingEdgeTxOTL = 5, /**< \brief rising edge of Tx toggle latch TxOTL */
208 IfxGpt12_ReloadInputMode_fallingEdgeTxOTL = 6, /**< \brief falling edge of Tx toggle latch TxOTL */
209 IfxGpt12_ReloadInputMode_bothEdgesTxOTL = 7 /**< \brief rising or falling edge of Tx toggle latch TxOTL */
210 } IfxGpt12_ReloadInputMode;
211
212 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
213 * Definition in Ifx_GPT12.CLC.B.EDIS
214 */
215 typedef enum
216 {
217 IfxGpt12_SleepMode_enable = 0, /**< \brief enables sleep mode */
218 IfxGpt12_SleepMode_disable = 1 /**< \brief disables sleep mode */
219 } IfxGpt12_SleepMode;
220
221 /** \brief OCDS Suspend Control (OCDS.SUS)
222 */
223 typedef enum
224 {
225 IfxGpt12_SuspendMode_none = 0, /**< \brief No suspend */
226 IfxGpt12_SuspendMode_hard = 1, /**< \brief Hard Suspend */
227 IfxGpt12_SuspendMode_soft = 2 /**< \brief Soft Suspend */
228 } IfxGpt12_SuspendMode;
229
230 /** \brief Timer Count Direction\n
231 * Definition in IfxGPT12.TxCON.B.TxUD (x=2 to 6)
232 */
233 typedef enum
234 {
235 IfxGpt12_TimerDirection_up = 0, /**< \brief Timer Up Direction selected */
236 IfxGpt12_TimerDirection_down = 1 /**< \brief Timer Down Direction selected */
237 } IfxGpt12_TimerDirection;
238
239 /** \brief Timer count direction control source\n
240 * Definition in IfxGPT12.TxCON.B.TxUDE (x=2 to 6)
241 */
242 typedef enum
243 {
244 IfxGpt12_TimerDirectionSource_internal = 0, /**< \brief Timer Dir Control = TxUD (x=2,3,4) */
245 IfxGpt12_TimerDirectionSource_external = 1 /**< \brief Timer Dir Control = TxUD (x=2,3,4) */
246 } IfxGpt12_TimerDirectionSource;
247
248 /** \brief Input prescaler Selection for the timer\n
249 * Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4)
250 */
251 typedef enum
252 {
253 IfxGpt12_TimerInputPrescaler_1 = 0,
254 IfxGpt12_TimerInputPrescaler_2 = 1,
255 IfxGpt12_TimerInputPrescaler_4 = 2,
256 IfxGpt12_TimerInputPrescaler_8 = 3,
257 IfxGpt12_TimerInputPrescaler_16 = 4,
258 IfxGpt12_TimerInputPrescaler_32 = 5,
259 IfxGpt12_TimerInputPrescaler_64 = 6,
260 IfxGpt12_TimerInputPrescaler_128 = 7
261 } IfxGpt12_TimerInputPrescaler;
262
263 /** \brief Timer Reload Mode\n
264 * Definition in IfxGPT12.T6CON.B.T6SR
265 */
266 typedef enum
267 {
268 IfxGpt12_TimerReloadMode_disable, /**< \brief Reload mode disabled */
269 IfxGpt12_TimerReloadMode_enable /**< \brief Reload mode enabled */
270 } IfxGpt12_TimerReloadMode;
271
272 /** \brief Timer Remote Control enable choice \n
273 * Definition in IfxGPT12.TxCON.B.TxRC (x = 2 and 4)
274 */
275 typedef enum
276 {
277 IfxGpt12_TimerRemoteControl_off = 0, /**< \brief T2 RemoteControl Off */
278 IfxGpt12_TimerRemoteControl_on = 1 /**< \brief T2 RemoteControl On */
279 } IfxGpt12_TimerRemoteControl;
280
281 /** \brief Timer Run / stop control choice (only if TxCON.B.TxRC = 0)\n
282 * Definition in IfxGPT12.TxCON.B.TxR (x = 2 to 6)
283 */
284 typedef enum
285 {
286 IfxGpt12_TimerRun_stop = 0, /**< \brief Timer x Stops */
287 IfxGpt12_TimerRun_start = 1 /**< \brief Timer X Run */
288 } IfxGpt12_TimerRun;
289
290 /** \} */
291
292 /** \addtogroup IfxLld_Gpt12_Std_InterruptFunctions
293 * \{ */
294
295 /******************************************************************************/
296 /*-------------------------Inline Function Prototypes-------------------------*/
297 /******************************************************************************/
298
299 /** \brief Returns the address of Timer 2 service request
300 * \param gpt12 Pointer to module base address
301 * \return address of timer 2 Interrupt
302 */
303 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T2_getSrc(Ifx_GPT12 *gpt12);
304
305 /** \brief Returns the address of Timer 3 service request
306 * \param gpt12 Pointer to module base address
307 * \return address of Timer 3 Interrupt
308 */
309 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T3_getSrc(Ifx_GPT12 *gpt12);
310
311 /** \brief Returns the address of Timer 4 service request
312 * \param gpt12 Pointer to module base address
313 * \return address of timer 4 interrupt
314 */
315 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T4_getSrc(Ifx_GPT12 *gpt12);
316
317 /** \brief Returns the address of Timer 5 service request
318 * \param gpt12 Pointer to module base address
319 * \return address of Timer 5 Interrupt
320 */
321 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T5_getSrc(Ifx_GPT12 *gpt12);
322
323 /** \brief Returns the address of Timer 6 service request
324 * \param gpt12 Pointer to module base address
325 * \return address of Timer 6 interrupt
326 */
327 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T6_getSrc(Ifx_GPT12 *gpt12);
328
329 /** \brief Returns the address of capture service request
330 * \param gpt12 Pointer to module base address
331 * \return address of capture Interrupt
332 */
333 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_getCaptureSrc(Ifx_GPT12 *gpt12);
334
335 /** \} */
336
337 /** \addtogroup IfxLld_Gpt12_Std_ConfigurationFunctions
338 * \{ */
339
340 /******************************************************************************/
341 /*-------------------------Inline Function Prototypes-------------------------*/
342 /******************************************************************************/
343
344 /** \brief Sets the input edge selection for the capture mode of the T2 timer
345 * \param gpt12 Pointer to module base address
346 * \param inputMode input prescaler value in capture mode
347 * \return None
348 */
349 IFX_INLINE void IfxGpt12_T2_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode);
350
351 /** \brief Sets the input edge selection for the counter mode of the T2 timer
352 * \param gpt12 Pointer to module base address
353 * \param inputMode input edge selection in counter mode
354 * \return None
355 */
356 IFX_INLINE void IfxGpt12_T2_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
357
358 /** \brief Sets the T2 timer count direction source internal / external
359 * \param gpt12 Pointer to module base address
360 * \param source direction source
361 * \return None
362 */
363 IFX_INLINE void IfxGpt12_T2_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
364
365 /** \brief Sets the EUD input for the T2 timer
366 * \param gpt12 Pointer to module base address
367 * \param input Select the EUD input signal
368 * \return None
369 */
370 IFX_INLINE void IfxGpt12_T2_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
371
372 /** \brief Sets the input edge selection for the incremental interface mode of the T2 timer
373 * \param gpt12 Pointer to module base address
374 * \param inputMode input edge selection in IIM mode
375 * \return None
376 */
377 IFX_INLINE void IfxGpt12_T2_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode);
378
379 /** \brief Sets the input for the T2 timer
380 * \param gpt12 Pointer to module base address
381 * \param input Select the Input signal
382 * \return None
383 */
384 IFX_INLINE void IfxGpt12_T2_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
385
386 /** \brief Enables / Disables the interrupt generation of the T2 timer
387 * \param gpt12 pointer to module base address
388 * \param enabled Enable/Disable choice
389 * \return None
390 */
391 IFX_INLINE void IfxGpt12_T2_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled);
392
393 /** \brief Sets the mode of operation od T2 timer
394 * \param gpt12 Pointer to module base address
395 * \param mode Select the mode of operation
396 * \return None
397 */
398 IFX_INLINE void IfxGpt12_T2_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
399
400 /** \brief Sets the input edge selection for the reload mode of the T2 timer
401 * \param gpt12 Pointer to module base address
402 * \param inputMode input prescaler value in reload mode
403 * \return None
404 */
405 IFX_INLINE void IfxGpt12_T2_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode);
406
407 /** \brief Sets the remote control of the T2 timer
408 * \param gpt12 pointer to module base address
409 * \param control enable the remote control
410 * \return None
411 */
412 IFX_INLINE void IfxGpt12_T2_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control);
413
414 /** \brief Sets the T2 timer count direction
415 * \param gpt12 Pointer to module base address
416 * \param direction select the Timer direction
417 * \return None
418 */
419 IFX_INLINE void IfxGpt12_T2_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
420
421 /** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T2 timer
422 * \param gpt12 Pointer to module base address
423 * \param inputPrescaler input prescaler value in timer mode and gated timer mode
424 * \return None
425 */
426 IFX_INLINE void IfxGpt12_T2_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
427
428 /** \brief Enable / Disable the T3 Output on pin T3OUT
429 * \param gpt12 Pointer to module base address
430 * \param enable enable / disable choice for T3OE
431 * \return None
432 */
433 IFX_INLINE void IfxGpt12_T3_enableOutput(Ifx_GPT12 *gpt12, boolean enable);
434
435 /** \brief Sets the input edge selection for the counter mode of the T3 timer
436 * \param gpt12 Pointer to module base address
437 * \param inputMode input edge selection in counter mode
438 * \return None
439 */
440 IFX_INLINE void IfxGpt12_T3_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
441
442 /** \brief Sets the T3 timer count direction source internal / external
443 * \param gpt12 Pointer to module base address
444 * \param source direction source
445 * \return None
446 */
447 IFX_INLINE void IfxGpt12_T3_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
448
449 /** \brief Sets the EUD input for the T3 timer
450 * \param gpt12 Pointer to module base address
451 * \param input Select the EUD input signal
452 * \return None
453 */
454 IFX_INLINE void IfxGpt12_T3_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
455
456 /** \brief Sets the input edge selection for the incremental interface mode of the T3 timer
457 * \param gpt12 Pointer to module base address
458 * \param inputMode input edge selection in IIM mode
459 * \return None
460 */
461 IFX_INLINE void IfxGpt12_T3_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode);
462
463 /** \brief Sets the input for the T3 timer
464 * \param gpt12 Pointer to module base address
465 * \param input Select the Input signal
466 * \return None
467 */
468 IFX_INLINE void IfxGpt12_T3_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
469
470 /** \brief Sets the mode of operation od T3 timer
471 * \param gpt12 Pointer to module base address
472 * \param mode Select the mode of operation
473 * \return None
474 */
475 IFX_INLINE void IfxGpt12_T3_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
476
477 /** \brief Sets the T3 timer count direction
478 * \param gpt12 Pointer to module base address
479 * \param direction select the Timer direction
480 * \return None
481 */
482 IFX_INLINE void IfxGpt12_T3_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
483
484 /** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T3 timer
485 * \param gpt12 Pointer to module base address
486 * \param inputPrescaler input prescaler value in timer mode and gated timer mode
487 * \return None
488 */
489 IFX_INLINE void IfxGpt12_T3_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
490
491 /** \brief Enables / Disables the clear timer T2 bit of the T4 timer
492 * \param gpt12 pointer to module base address
493 * \param enabled Enable/Disable choice
494 * \return None
495 */
496 IFX_INLINE void IfxGpt12_T4_enableClearTimerT2(Ifx_GPT12 *gpt12, boolean enabled);
497
498 /** \brief Enables / Disables the clear timer T3 bit of the T4 timer
499 * \param gpt12 pointer to module base address
500 * \param enabled Enable/Disable choice
501 * \return None
502 */
503 IFX_INLINE void IfxGpt12_T4_enableClearTimerT3(Ifx_GPT12 *gpt12, boolean enabled);
504
505 /** \brief Sets the input edge selection for the capture mode of the T4 timer
506 * \param gpt12 Pointer to module base address
507 * \param inputMode input prescaler value in capture mode
508 * \return None
509 */
510 IFX_INLINE void IfxGpt12_T4_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode);
511
512 /** \brief Sets the input edge selection for the counter mode of the T4 timer
513 * \param gpt12 Pointer to module base address
514 * \param inputMode input edge selection in counter mode
515 * \return None
516 */
517 IFX_INLINE void IfxGpt12_T4_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
518
519 /** \brief Sets the T4 timer count direction source internal / external
520 * \param gpt12 Pointer to module base address
521 * \param source direction source
522 * \return None
523 */
524 IFX_INLINE void IfxGpt12_T4_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
525
526 /** \brief Sets the EUD input for the T4 timer
527 * \param gpt12 Pointer to module base address
528 * \param input Select the EUD input signal
529 * \return None
530 */
531 IFX_INLINE void IfxGpt12_T4_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
532
533 /** \brief Sets the input edge selection for the incremental interface mode of the T4 timer
534 * \param gpt12 Pointer to module base address
535 * \param inputMode input edge selection in IIM mode
536 * \return None
537 */
538 IFX_INLINE void IfxGpt12_T4_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode);
539
540 /** \brief Sets the input for the T4 timer
541 * \param gpt12 Pointer to module base address
542 * \param input Select the Input signal
543 * \return None
544 */
545 IFX_INLINE void IfxGpt12_T4_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
546
547 /** \brief Enables / Disables the interrupt generation of the T4 timer
548 * \param gpt12 pointer to module base address
549 * \param enabled Enable/Disable choice
550 * \return None
551 */
552 IFX_INLINE void IfxGpt12_T4_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled);
553
554 /** \brief Sets the mode of operation od T4 timer
555 * \param gpt12 Pointer to module base address
556 * \param mode Select the mode of operation
557 * \return None
558 */
559 IFX_INLINE void IfxGpt12_T4_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
560
561 /** \brief Sets the input edge selection for the reload mode of the T4 timer
562 * \param gpt12 Pointer to module base address
563 * \param inputMode input prescaler value in reload mode
564 * \return None
565 */
566 IFX_INLINE void IfxGpt12_T4_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode);
567
568 /** \brief Sets the remote control of the T4 timer
569 * \param gpt12 pointer to module base address
570 * \param control enable the remote control
571 * \return None
572 */
573 IFX_INLINE void IfxGpt12_T4_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control);
574
575 /** \brief Sets the T4 timer count direction
576 * \param gpt12 Pointer to module base address
577 * \param direction select the Timer direction
578 * \return None
579 */
580 IFX_INLINE void IfxGpt12_T4_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
581
582 /** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T4 timer
583 * \param gpt12 Pointer to module base address
584 * \param inputPrescaler input prescaler value in timer mode and gated timer mode
585 * \return None
586 */
587 IFX_INLINE void IfxGpt12_T4_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
588
589 /** \brief Enables / Disables the clear timer bit of the T5 timer
590 * \param gpt12 pointer to module base address
591 * \param enabled Enable/Disable choice
592 * \return None
593 */
594 IFX_INLINE void IfxGpt12_T5_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled);
595
596 /** \brief Sets the capture trigger of teh T5 timer
597 * \param gpt12 Pointer to Module base address
598 * \param trigger Capture trigger
599 * \return None
600 */
601 IFX_INLINE void IfxGpt12_T5_setCaptureTrigger(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger);
602
603 /** \brief Enables / Disables the capture trigger of the T5 timer
604 * \param gpt12 pointer to module base address
605 * \param enabled Enable/Disable choice
606 * \return None
607 */
608 IFX_INLINE void IfxGpt12_T5_setCaptureTriggerEnable(Ifx_GPT12 *gpt12, boolean enabled);
609
610 /** \brief Sets the capture trigger mode of the T5 timer
611 * \param gpt12 Pointer to module base address
612 * \param mode Select the capture trigger mode
613 * \return None
614 */
615 IFX_INLINE void IfxGpt12_T5_setCaptureTriggerMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode);
616
617 /** \brief Sets the input edge selection for the counter mode of the T5 timer
618 * \param gpt12 Pointer to module base address
619 * \param inputMode input edge selection in counter mode
620 * \return None
621 */
622 IFX_INLINE void IfxGpt12_T5_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
623
624 /** \brief Sets the T5 timer count direction source internal / external
625 * \param gpt12 Pointer to module base address
626 * \param source direction source
627 * \return None
628 */
629 IFX_INLINE void IfxGpt12_T5_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
630
631 /** \brief Sets the EUD input for the T5 timer
632 * \param gpt12 Pointer to module base address
633 * \param input Select the EUD input signal
634 * \return None
635 */
636 IFX_INLINE void IfxGpt12_T5_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
637
638 /** \brief Sets the input for the T5 timer
639 * \param gpt12 Pointer to module base address
640 * \param input Select the Input signal
641 * \return None
642 */
643 IFX_INLINE void IfxGpt12_T5_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
644
645 /** \brief Sets the mode of operation od T5 timer
646 * \param gpt12 Pointer to module base address
647 * \param mode Select the mode of operation
648 * \return None
649 */
650 IFX_INLINE void IfxGpt12_T5_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
651
652 /** \brief Sets the remote control of the T5 timer
653 * \param gpt12 pointer to module base address
654 * \param control enable the remote control
655 * \return None
656 */
657 IFX_INLINE void IfxGpt12_T5_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control);
658
659 /** \brief Sets the T5 timer count direction
660 * \param gpt12 Pointer to module base address
661 * \param direction select the Timer direction
662 * \return None
663 */
664 IFX_INLINE void IfxGpt12_T5_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
665
666 /** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer
667 * \param gpt12 Pointer to module base address
668 * \param inputPrescaler input prescaler value in timer mode and gated timer mode
669 * \return None
670 */
671 IFX_INLINE void IfxGpt12_T5_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
672
673 /** \brief Enables / Disables the clear timer bit of the T6 timer
674 * \param gpt12 pointer to module base address
675 * \param enabled Enable/Disable choice
676 * \return None
677 */
678 IFX_INLINE void IfxGpt12_T6_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled);
679
680 /** \brief Sets the input edge selection for the counter mode of the T6 timer
681 * \param gpt12 Pointer to module base address
682 * \param inputMode input edge selection in counter mode
683 * \return None
684 */
685 IFX_INLINE void IfxGpt12_T6_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
686
687 /** \brief sets the T6 timer count direction source internal / external
688 * \param gpt12 Pointer to module base address
689 * \param source direction source
690 * \return None
691 */
692 IFX_INLINE void IfxGpt12_T6_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
693
694 /** \brief Sets the EUD input for the T6 timer
695 * \param gpt12 Pointer to module base address
696 * \param input Select the EUD input signal
697 * \return None
698 */
699 IFX_INLINE void IfxGpt12_T6_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
700
701 /** \brief Sets the input for the T6 timer
702 * \param gpt12 Pointer to module base address
703 * \param input Select the Input signal
704 * \return None
705 */
706 IFX_INLINE void IfxGpt12_T6_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
707
708 /** \brief Sets the mode of operation od T6 timer
709 * \param gpt12 Pointer to module base address
710 * \param mode Select the mode of operation
711 * \return None
712 */
713 IFX_INLINE void IfxGpt12_T6_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
714
715 /** \brief sets the T6 timer count direction
716 * \param gpt12 Pointer to module base address
717 * \param mode Timer Reload Mode
718 * \return None
719 */
720 IFX_INLINE void IfxGpt12_T6_setReloadMode(Ifx_GPT12 *gpt12, IfxGpt12_TimerReloadMode mode);
721
722 /** \brief sets the T6 timer count direction
723 * \param gpt12 Pointer to module base address
724 * \param direction select the Timer direction
725 * \return None
726 */
727 IFX_INLINE void IfxGpt12_T6_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
728
729 /** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T6 timer
730 * \param gpt12 Pointer to module base address
731 * \param inputPrescaler input prescaler value in timer mode and gated timer mode
732 * \return None
733 */
734 IFX_INLINE void IfxGpt12_T6_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
735
736 /** \brief Initializes a Capin_In input
737 * \param capIn the TxIn Pin which should be configured
738 * \param inputMode the pin input mode which should be configured
739 * \return None
740 */
741 IFX_INLINE void IfxGpt12_initCapInPin(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode);
742
743 /** \brief Initializes a SLSO output
744 * \param txOut the TxOUT Pin which should be configured
745 * \param outputMode the pin output mode which should be configured
746 * \param padDriver the pad driver mode which should be configured
747 * \return None
748 */
749 IFX_INLINE void IfxGpt12_initTxOutPin(const IfxGpt12_TxOut_Out *txOut, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
750
751 /** \brief Sets the capture input
752 * \param gpt12 Pointer to Module base address
753 * \param input Select the capture input signal
754 * \return None
755 */
756 IFX_INLINE void IfxGpt12_setCaptureInput(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInput input);
757
758 /** \brief Sets the GPT1 block prescaler
759 * \param gpt12 Pointer to module base address
760 * \param bps1 Select the GPT1 block Prescaler
761 * \return None
762 */
763 IFX_INLINE void IfxGpt12_setGpt1BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt1BlockPrescaler bps1);
764
765 /** \brief Sets the GPT2 block prescaler
766 * \param gpt12 Pointer to module base address
767 * \param bps2 Select the GPT2 block Prescaler
768 * \return None
769 */
770 IFX_INLINE void IfxGpt12_setGpt2BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt2BlockPrescaler bps2);
771
772 /******************************************************************************/
773 /*-------------------------Global Function Prototypes-------------------------*/
774 /******************************************************************************/
775
776 /** \brief Disables the module
777 * \param gpt12 Pointer to module base address
778 * \return None
779 */
780 IFX_EXTERN void IfxGpt12_disableModule(Ifx_GPT12 *gpt12);
781
782 /** \brief Enables the module
783 * \param gpt12 Pointer to module base address
784 * \return None
785 */
786 IFX_EXTERN void IfxGpt12_enableModule(Ifx_GPT12 *gpt12);
787
788 /** \brief Initializes a TxEUDIn_IN input
789 * \param txEudIn the TxEUD_IN Pin which should be configured
790 * \param inputMode the pin input mode which should be configured
791 * \return None
792 */
793 IFX_EXTERN void IfxGpt12_initTxEudInPin(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode);
794
795 /** \brief Initializes a TxIn input
796 * \param txIn the TxIn Pin which should be configured
797 * \param inputMode the pin input mode which should be configured
798 * \return None
799 */
800 IFX_EXTERN void IfxGpt12_initTxInPin(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode);
801
802 /** \} */
803
804 /** \addtogroup IfxLld_Gpt12_Std_UtilityFunctions
805 * \{ */
806
807 /******************************************************************************/
808 /*-------------------------Inline Function Prototypes-------------------------*/
809 /******************************************************************************/
810
811 /** \brief Returns the operating mode of the T2 timer
812 * \param gpt12 Pointer to module base address
813 * \return mode of operation
814 */
815 IFX_INLINE IfxGpt12_Mode IfxGpt12_T2_getMode(Ifx_GPT12 *gpt12);
816
817 /** \brief Returns the timer value of the T2 timer
818 * \param gpt12 Pointer to module base address
819 * \return timer current value
820 */
821 IFX_INLINE uint16 IfxGpt12_T2_getTimerValue(Ifx_GPT12 *gpt12);
822
823 /** \brief Returns the operating mode of the T3 timer
824 * \param gpt12 Pointer to module base address
825 * \return mode of operation
826 */
827 IFX_INLINE IfxGpt12_Mode IfxGpt12_T3_getMode(Ifx_GPT12 *gpt12);
828
829 /** \brief Returns the timer value of the T3 timer
830 * \param gpt12 Pointer to module base address
831 * \return timer current value
832 */
833 IFX_INLINE uint16 IfxGpt12_T3_getTimerValue(Ifx_GPT12 *gpt12);
834
835 /** \brief Returns the operating mode of the T4 timer
836 * \param gpt12 Pointer to module base address
837 * \return mode of operation
838 */
839 IFX_INLINE IfxGpt12_Mode IfxGpt12_T4_getMode(Ifx_GPT12 *gpt12);
840
841 /** \brief Returns the timer value of the T4 timer
842 * \param gpt12 Pointer to module base address
843 * \return timer current value
844 */
845 IFX_INLINE uint16 IfxGpt12_T4_getTimerValue(Ifx_GPT12 *gpt12);
846
847 /** \brief Returns the operating mode of the T5 timer
848 * \param gpt12 Pointer to module base address
849 * \return mode of operation
850 */
851 IFX_INLINE IfxGpt12_Mode IfxGpt12_T5_getMode(Ifx_GPT12 *gpt12);
852
853 /** \brief Returns the timer value of the T5 timer
854 * \param gpt12 Pointer to module base address
855 * \return timer current value
856 */
857 IFX_INLINE uint16 IfxGpt12_T5_getTimerValue(Ifx_GPT12 *gpt12);
858
859 /** \brief Returns the operating mode of the T6 timer
860 * \param gpt12 Pointer to module base address
861 * \return mode of operation
862 */
863 IFX_INLINE IfxGpt12_Mode IfxGpt12_T6_getMode(Ifx_GPT12 *gpt12);
864
865 /** \brief Returns the timer value of the T6 timer
866 * \param gpt12 Pointer to module base address
867 * \return timer current value
868 */
869 IFX_INLINE uint16 IfxGpt12_T6_getTimerValue(Ifx_GPT12 *gpt12);
870
871 /** \brief Returns the gpt12 module frequency
872 * \param gpt12 Pointer to module base address
873 * \return gpt12 module frequency
874 */
875 IFX_INLINE float32 IfxGpt12_getModuleFrequency(Ifx_GPT12 *gpt12);
876
877 /******************************************************************************/
878 /*-------------------------Global Function Prototypes-------------------------*/
879 /******************************************************************************/
880
881 /** \brief Returns the frequency of the T2 timer
882 * \param gpt12 Pointer to Module base address
883 * \return frequency
884 */
885 IFX_EXTERN float32 IfxGpt12_T2_getFrequency(Ifx_GPT12 *gpt12);
886
887 /** \brief Returns the frequency of the T3 timer
888 * \param gpt12 Pointer to Module base address
889 * \return frequency
890 */
891 IFX_EXTERN float32 IfxGpt12_T3_getFrequency(Ifx_GPT12 *gpt12);
892
893 /** \brief Returns the frequency of the T4 timer
894 * \param gpt12 Pointer to Module base address
895 * \return frequency
896 */
897 IFX_EXTERN float32 IfxGpt12_T4_getFrequency(Ifx_GPT12 *gpt12);
898
899 /** \brief Returns the frequency of the T5 timer
900 * \param gpt12 Pointer to Module base address
901 * \return frequency
902 */
903 IFX_EXTERN float32 IfxGpt12_T5_getFrequency(Ifx_GPT12 *gpt12);
904
905 /** \brief Returns the frequency of the T6 timer
906 * \param gpt12 Pointer to Module base address
907 * \return frequency
908 */
909 IFX_EXTERN float32 IfxGpt12_T6_getFrequency(Ifx_GPT12 *gpt12);
910
911 /** \} */
912
913 /** \addtogroup IfxLld_Gpt12_Std_OperativeFunctions
914 * \{ */
915
916 /******************************************************************************/
917 /*-------------------------Inline Function Prototypes-------------------------*/
918 /******************************************************************************/
919
920 /** \brief Starts / stops the T2 Timer
921 * \param gpt12 Pointer to Module base address
922 * \param runTimer Start/stop Timer 2
923 * \return None
924 */
925 IFX_INLINE void IfxGpt12_T2_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
926
927 /** \brief Sets value for the T2 timer
928 * \param gpt12 pointer to module base address
929 * \param value Timer Value
930 * \return None
931 */
932 IFX_INLINE void IfxGpt12_T2_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
933
934 /** \brief Starts / stops the T3 Timer
935 * \param gpt12 Pointer to module base address
936 * \param runTimer start/stop Timer 3
937 * \return None
938 */
939 IFX_INLINE void IfxGpt12_T3_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
940
941 /** \brief Sets value for the T3 Timer
942 * \param gpt12 pointer to module base address
943 * \param value Timer Value
944 * \return None
945 */
946 IFX_INLINE void IfxGpt12_T3_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
947
948 /** \brief Starts / stops the T4 Timer
949 * \param gpt12 Pointer to module base address
950 * \param runTimer Start/stop Timer 4
951 * \return None
952 */
953 IFX_INLINE void IfxGpt12_T4_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
954
955 /** \brief Sets value for the T4 timer
956 * \param gpt12 pointer to module base address
957 * \param value Timer Value
958 * \return None
959 */
960 IFX_INLINE void IfxGpt12_T4_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
961
962 /** \brief Starts / stops the T5 Timer
963 * \param gpt12 Pointer to module base address
964 * \param runTimer Start/stop Timer 5
965 * \return None
966 */
967 IFX_INLINE void IfxGpt12_T5_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
968
969 /** \brief Sets value for the T5 timer
970 * \param gpt12 pointer to module base address
971 * \param value Timer Value
972 * \return None
973 */
974 IFX_INLINE void IfxGpt12_T5_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
975
976 /** \brief Starts / stops the T6 Timer
977 * \param gpt12 Pointer to module base address
978 * \param runTimer Start/stop Timer 6
979 * \return None
980 */
981 IFX_INLINE void IfxGpt12_T6_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
982
983 /** \brief Sets value for the T6 timer
984 * \param gpt12 pointer to module base address
985 * \param value Timer Value
986 * \return None
987 */
988 IFX_INLINE void IfxGpt12_T6_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
989
990 /** \brief Sets the sensitivity of the module to sleep signal
991 * \param gpt12 pointer to GPT12 registers
992 * \param value Reload value
993 * \return None
994 */
995 IFX_INLINE void IfxGpt12_setCaptureReload(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode value);
996
997 /** \brief Sets the sensitivity of the module to sleep signal
998 * \param gpt12 pointer to GPT12 registers
999 * \param mode mode selection (enable/disable)
1000 * \return None
1001 */
1002 IFX_INLINE void IfxGpt12_setSleepMode(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode mode);
1003
1004 /** \brief Configure the Module to Hard/Soft suspend mode.
1005 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
1006 * \param gpt12 Pointer to GPT12 module registers
1007 * \param mode Module suspend mode
1008 * \return None
1009 */
1010 IFX_INLINE void IfxGpt12_setSuspendMode(Ifx_GPT12 *gpt12, IfxGpt12_SuspendMode mode);
1011
1012 /******************************************************************************/
1013 /*-------------------------Global Function Prototypes-------------------------*/
1014 /******************************************************************************/
1015
1016 /** \brief resets GPT12 kernel
1017 * \param gpt12 pointer to GPT12 registers
1018 * \return None
1019 */
1020 IFX_EXTERN void IfxGpt12_resetModule(Ifx_GPT12 *gpt12);
1021
1022 /** \} */
1023
1024 /******************************************************************************/
1025 /*-------------------------Inline Function Prototypes-------------------------*/
1026 /******************************************************************************/
1027
1028 /** \brief Provides functionality for both setting of CAPIN pin direction as input and configuring pad driver
1029 * \param capIn the TxIn Pin which should be configured
1030 * \param inputMode the pin input mode which should be configured
1031 * \param padDriver the pad driver mode which should be configured
1032 * \return None
1033 */
1034 IFX_INLINE void IfxGpt12_initCapInPinWithPadLevel(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1035
1036 /** \brief Returns the module's suspend state.
1037 * TRUE :if module is suspended.
1038 * FALSE:if module is not yet suspended.
1039 * \param gpt12 Pointer to GPT12 module registers
1040 * \return Suspend status (TRUE / FALSE)
1041 */
1042 IFX_INLINE boolean IfxGpt12_isModuleSuspended(Ifx_GPT12 *gpt12);
1043
1044 /******************************************************************************/
1045 /*-------------------------Global Function Prototypes-------------------------*/
1046 /******************************************************************************/
1047
1048 /** \brief Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver
1049 * \param txEudIn the TxEUD_IN Pin which should be configured
1050 * \param inputMode the pin input mode which should be configured
1051 * \param padDriver the pad driver mode which should be configured
1052 * \return None
1053 */
1054 IFX_EXTERN void IfxGpt12_initTxEudInPinWithPadLevel(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1055
1056 /** \brief Provides functionality for both setting of TXIN pin direction as input and configuring pad driver
1057 * \param txIn the TxIn Pin which should be configured
1058 * \param inputMode the pin input mode which should be configured
1059 * \param padDriver the pad driver mode which should be configured
1060 * \return None
1061 */
1062 IFX_EXTERN void IfxGpt12_initTxInPinWithPadLevel(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1063
1064 /******************************************************************************/
1065 /*---------------------Inline Function Implementations------------------------*/
1066 /******************************************************************************/
1067
1068 IFX_INLINE IfxGpt12_Mode IfxGpt12_T2_getMode(Ifx_GPT12 *gpt12)
1069 {
1070 return (IfxGpt12_Mode)gpt12->T2CON.B.T2M;
1071 }
1072
1073
1074 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T2_getSrc(Ifx_GPT12 *gpt12)
1075 {
1076 IFX_UNUSED_PARAMETER(gpt12)
1077 return &MODULE_SRC.GPT12.GPT12[0].T2;
1078 }
1079
1080
1081 IFX_INLINE uint16 IfxGpt12_T2_getTimerValue(Ifx_GPT12 *gpt12)
1082 {
1083 return (uint16)gpt12->T2.U;
1084 }
1085
1086
1087 IFX_INLINE void IfxGpt12_T2_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
1088 {
1089 gpt12->T2CON.B.T2R = runTimer;
1090 }
1091
1092
1093 IFX_INLINE void IfxGpt12_T2_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
1094 {
1095 gpt12->T2CON.B.T2I = inputMode;
1096 }
1097
1098
1099 IFX_INLINE void IfxGpt12_T2_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
1100 {
1101 gpt12->T2CON.B.T2I = inputMode;
1102 }
1103
1104
1105 IFX_INLINE void IfxGpt12_T2_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
1106 {
1107 gpt12->T2CON.B.T2UDE = source;
1108 }
1109
1110
1111 IFX_INLINE void IfxGpt12_T2_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
1112 {
1113 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1114 gpt12->PISEL.B.IST2EUD = input;
1115 }
1116
1117
1118 IFX_INLINE void IfxGpt12_T2_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
1119 {
1120 gpt12->T2CON.B.T2I = inputMode;
1121 }
1122
1123
1124 IFX_INLINE void IfxGpt12_T2_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
1125 {
1126 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1127 gpt12->PISEL.B.IST2IN = input;
1128 }
1129
1130
1131 IFX_INLINE void IfxGpt12_T2_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled)
1132 {
1133 gpt12->T2CON.B.T2IRDIS = enabled ? 0 : 1;
1134 }
1135
1136
1137 IFX_INLINE void IfxGpt12_T2_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
1138 {
1139 gpt12->T2CON.B.T2M = mode;
1140 }
1141
1142
1143 IFX_INLINE void IfxGpt12_T2_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
1144 {
1145 gpt12->T2CON.B.T2I = inputMode;
1146 }
1147
1148
1149 IFX_INLINE void IfxGpt12_T2_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
1150 {
1151 gpt12->T2CON.B.T2RC = control;
1152 }
1153
1154
1155 IFX_INLINE void IfxGpt12_T2_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
1156 {
1157 gpt12->T2CON.B.T2UD = direction;
1158 }
1159
1160
1161 IFX_INLINE void IfxGpt12_T2_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
1162 {
1163 gpt12->T2CON.B.T2I = inputPrescaler;
1164 }
1165
1166
1167 IFX_INLINE void IfxGpt12_T2_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
1168 {
1169 gpt12->T2.U = value;
1170 }
1171
1172
1173 IFX_INLINE void IfxGpt12_T3_enableOutput(Ifx_GPT12 *gpt12, boolean enable)
1174 {
1175 gpt12->T3CON.B.T3OE = enable ? 1 : 0;
1176 }
1177
1178
1179 IFX_INLINE IfxGpt12_Mode IfxGpt12_T3_getMode(Ifx_GPT12 *gpt12)
1180 {
1181 return (IfxGpt12_Mode)gpt12->T3CON.B.T3M;
1182 }
1183
1184
1185 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T3_getSrc(Ifx_GPT12 *gpt12)
1186 {
1187 IFX_UNUSED_PARAMETER(gpt12)
1188 return &MODULE_SRC.GPT12.GPT12[0].T3;
1189 }
1190
1191
1192 IFX_INLINE uint16 IfxGpt12_T3_getTimerValue(Ifx_GPT12 *gpt12)
1193 {
1194 return (uint16)gpt12->T3.U;
1195 }
1196
1197
1198 IFX_INLINE void IfxGpt12_T3_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
1199 {
1200 gpt12->T3CON.B.T3R = runTimer;
1201 }
1202
1203
1204 IFX_INLINE void IfxGpt12_T3_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
1205 {
1206 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, inputMode <= IfxGpt12_CounterInputMode_bothEdgesTxIN); /* wrong selection */
1207 gpt12->T3CON.B.T3I = inputMode;
1208 }
1209
1210
1211 IFX_INLINE void IfxGpt12_T3_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
1212 {
1213 gpt12->T3CON.B.T3UDE = source;
1214 }
1215
1216
1217 IFX_INLINE void IfxGpt12_T3_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
1218 {
1219 gpt12->PISEL.B.IST3EUD = input;
1220 }
1221
1222
1223 IFX_INLINE void IfxGpt12_T3_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
1224 {
1225 gpt12->T3CON.B.T3I = inputMode;
1226 }
1227
1228
1229 IFX_INLINE void IfxGpt12_T3_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
1230 {
1231 gpt12->PISEL.B.IST3IN = input;
1232 }
1233
1234
1235 IFX_INLINE void IfxGpt12_T3_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
1236 {
1237 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, ((mode != IfxGpt12_Mode_reload) && (mode != IfxGpt12_Mode_capture))); /* wrong selection */
1238 gpt12->T3CON.B.T3M = mode;
1239 }
1240
1241
1242 IFX_INLINE void IfxGpt12_T3_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
1243 {
1244 gpt12->T3CON.B.T3UD = direction;
1245 }
1246
1247
1248 IFX_INLINE void IfxGpt12_T3_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
1249 {
1250 gpt12->T3CON.B.T3I = inputPrescaler;
1251 }
1252
1253
1254 IFX_INLINE void IfxGpt12_T3_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
1255 {
1256 gpt12->T3.U = value;
1257 }
1258
1259
1260 IFX_INLINE void IfxGpt12_T4_enableClearTimerT2(Ifx_GPT12 *gpt12, boolean enabled)
1261 {
1262 gpt12->T4CON.B.CLRT2EN = enabled ? 1 : 0;
1263 }
1264
1265
1266 IFX_INLINE void IfxGpt12_T4_enableClearTimerT3(Ifx_GPT12 *gpt12, boolean enabled)
1267 {
1268 gpt12->T4CON.B.CLRT3EN = enabled ? 1 : 0;
1269 }
1270
1271
1272 IFX_INLINE IfxGpt12_Mode IfxGpt12_T4_getMode(Ifx_GPT12 *gpt12)
1273 {
1274 return (IfxGpt12_Mode)gpt12->T4CON.B.T4M;
1275 }
1276
1277
1278 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T4_getSrc(Ifx_GPT12 *gpt12)
1279 {
1280 IFX_UNUSED_PARAMETER(gpt12)
1281 return &MODULE_SRC.GPT12.GPT12[0].T4;
1282 }
1283
1284
1285 IFX_INLINE uint16 IfxGpt12_T4_getTimerValue(Ifx_GPT12 *gpt12)
1286 {
1287 return (uint16)gpt12->T4.U;
1288 }
1289
1290
1291 IFX_INLINE void IfxGpt12_T4_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
1292 {
1293 gpt12->T4CON.B.T4R = runTimer;
1294 }
1295
1296
1297 IFX_INLINE void IfxGpt12_T4_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
1298 {
1299 gpt12->T4CON.B.T4I = inputMode;
1300 }
1301
1302
1303 IFX_INLINE void IfxGpt12_T4_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
1304 {
1305 gpt12->T4CON.B.T4I = inputMode;
1306 }
1307
1308
1309 IFX_INLINE void IfxGpt12_T4_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
1310 {
1311 gpt12->T4CON.B.T4UDE = source;
1312 }
1313
1314
1315 IFX_INLINE void IfxGpt12_T4_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
1316 {
1317 gpt12->PISEL.B.IST4EUD = input;
1318 }
1319
1320
1321 IFX_INLINE void IfxGpt12_T4_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
1322 {
1323 gpt12->T4CON.B.T4I = inputMode;
1324 }
1325
1326
1327 IFX_INLINE void IfxGpt12_T4_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
1328 {
1329 gpt12->PISEL.B.IST4IN = input;
1330 }
1331
1332
1333 IFX_INLINE void IfxGpt12_T4_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled)
1334 {
1335 gpt12->T4CON.B.T4IRDIS = enabled ? 0 : 1;
1336 }
1337
1338
1339 IFX_INLINE void IfxGpt12_T4_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
1340 {
1341 gpt12->T4CON.B.T4M = mode;
1342 }
1343
1344
1345 IFX_INLINE void IfxGpt12_T4_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
1346 {
1347 gpt12->T4CON.B.T4I = inputMode;
1348 }
1349
1350
1351 IFX_INLINE void IfxGpt12_T4_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
1352 {
1353 gpt12->T4CON.B.T4RC = control;
1354 }
1355
1356
1357 IFX_INLINE void IfxGpt12_T4_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
1358 {
1359 gpt12->T4CON.B.T4UD = direction;
1360 }
1361
1362
1363 IFX_INLINE void IfxGpt12_T4_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
1364 {
1365 gpt12->T4CON.B.T4I = inputPrescaler;
1366 }
1367
1368
1369 IFX_INLINE void IfxGpt12_T4_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
1370 {
1371 gpt12->T4.U = value;
1372 }
1373
1374
1375 IFX_INLINE void IfxGpt12_T5_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled)
1376 {
1377 gpt12->T5CON.B.T5CLR = enabled ? 1 : 0;
1378 }
1379
1380
1381 IFX_INLINE IfxGpt12_Mode IfxGpt12_T5_getMode(Ifx_GPT12 *gpt12)
1382 {
1383 return (IfxGpt12_Mode)gpt12->T5CON.B.T5M;
1384 }
1385
1386
1387 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T5_getSrc(Ifx_GPT12 *gpt12)
1388 {
1389 IFX_UNUSED_PARAMETER(gpt12)
1390 return &MODULE_SRC.GPT12.GPT12[0].T5;
1391 }
1392
1393
1394 IFX_INLINE uint16 IfxGpt12_T5_getTimerValue(Ifx_GPT12 *gpt12)
1395 {
1396 return (uint16)gpt12->T5.U;
1397 }
1398
1399
1400 IFX_INLINE void IfxGpt12_T5_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
1401 {
1402 gpt12->T5CON.B.T5R = runTimer;
1403 }
1404
1405
1406 IFX_INLINE void IfxGpt12_T5_setCaptureTrigger(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger)
1407 {
1408 gpt12->T5CON.B.CT3 = trigger;
1409 }
1410
1411
1412 IFX_INLINE void IfxGpt12_T5_setCaptureTriggerEnable(Ifx_GPT12 *gpt12, boolean enabled)
1413 {
1414 gpt12->T5CON.B.T5SC = enabled;
1415 }
1416
1417
1418 IFX_INLINE void IfxGpt12_T5_setCaptureTriggerMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode)
1419 {
1420 gpt12->T5CON.B.CI = mode;
1421 }
1422
1423
1424 IFX_INLINE void IfxGpt12_T5_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
1425 {
1426 gpt12->T5CON.B.T5I = inputMode;
1427 }
1428
1429
1430 IFX_INLINE void IfxGpt12_T5_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
1431 {
1432 gpt12->T5CON.B.T5UDE = source;
1433 }
1434
1435
1436 IFX_INLINE void IfxGpt12_T5_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
1437 {
1438 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1439 gpt12->PISEL.B.IST5EUD = input;
1440 }
1441
1442
1443 IFX_INLINE void IfxGpt12_T5_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
1444 {
1445 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1446 gpt12->PISEL.B.IST5IN = input;
1447 }
1448
1449
1450 IFX_INLINE void IfxGpt12_T5_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
1451 {
1452 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode <= IfxGpt12_Mode_highGatedTimer); /* wrong selection */
1453 gpt12->T5CON.B.T5M = mode;
1454 }
1455
1456
1457 IFX_INLINE void IfxGpt12_T5_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
1458 {
1459 gpt12->T5CON.B.T5RC = control;
1460 }
1461
1462
1463 IFX_INLINE void IfxGpt12_T5_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
1464 {
1465 gpt12->T5CON.B.T5UD = direction;
1466 }
1467
1468
1469 IFX_INLINE void IfxGpt12_T5_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
1470 {
1471 gpt12->T5CON.B.T5I = inputPrescaler;
1472 }
1473
1474
1475 IFX_INLINE void IfxGpt12_T5_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
1476 {
1477 gpt12->T5.U = value;
1478 }
1479
1480
1481 IFX_INLINE void IfxGpt12_T6_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled)
1482 {
1483 gpt12->T6CON.B.T6CLR = enabled ? 1 : 0;
1484 }
1485
1486
1487 IFX_INLINE IfxGpt12_Mode IfxGpt12_T6_getMode(Ifx_GPT12 *gpt12)
1488 {
1489 return (IfxGpt12_Mode)gpt12->T6CON.B.T6M;
1490 }
1491
1492
1493 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T6_getSrc(Ifx_GPT12 *gpt12)
1494 {
1495 IFX_UNUSED_PARAMETER(gpt12)
1496 return &MODULE_SRC.GPT12.GPT12[0].T6;
1497 }
1498
1499
1500 IFX_INLINE uint16 IfxGpt12_T6_getTimerValue(Ifx_GPT12 *gpt12)
1501 {
1502 return (uint16)gpt12->T6.U;
1503 }
1504
1505
1506 IFX_INLINE void IfxGpt12_T6_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
1507 {
1508 gpt12->T6CON.B.T6R = runTimer;
1509 }
1510
1511
1512 IFX_INLINE void IfxGpt12_T6_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
1513 {
1514 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, inputMode <= IfxGpt12_CounterInputMode_bothEdgesTxIN); /* wrong selection */
1515 gpt12->T6CON.B.T6I = inputMode;
1516 }
1517
1518
1519 IFX_INLINE void IfxGpt12_T6_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
1520 {
1521 gpt12->T6CON.B.T6UDE = source;
1522 }
1523
1524
1525 IFX_INLINE void IfxGpt12_T6_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
1526 {
1527 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1528 gpt12->PISEL.B.IST6EUD = input;
1529 }
1530
1531
1532 IFX_INLINE void IfxGpt12_T6_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
1533 {
1534 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1535 gpt12->PISEL.B.IST6IN = input;
1536 }
1537
1538
1539 IFX_INLINE void IfxGpt12_T6_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
1540 {
1541 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode <= IfxGpt12_Mode_highGatedTimer); /* wrong selection */
1542 gpt12->T6CON.B.T6M = mode;
1543 }
1544
1545
1546 IFX_INLINE void IfxGpt12_T6_setReloadMode(Ifx_GPT12 *gpt12, IfxGpt12_TimerReloadMode mode)
1547 {
1548 gpt12->T6CON.B.T6SR = mode;
1549 }
1550
1551
1552 IFX_INLINE void IfxGpt12_T6_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
1553 {
1554 gpt12->T6CON.B.T6UD = direction;
1555 }
1556
1557
1558 IFX_INLINE void IfxGpt12_T6_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
1559 {
1560 gpt12->T6CON.B.T6I = inputPrescaler;
1561 }
1562
1563
1564 IFX_INLINE void IfxGpt12_T6_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
1565 {
1566 gpt12->T6.U = value;
1567 }
1568
1569
1570 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_getCaptureSrc(Ifx_GPT12 *gpt12)
1571 {
1572 IFX_UNUSED_PARAMETER(gpt12)
1573 return &MODULE_SRC.GPT12.GPT12[0].CIRQ;
1574 }
1575
1576
1577 IFX_INLINE float32 IfxGpt12_getModuleFrequency(Ifx_GPT12 *gpt12)
1578 {
1579 IFX_UNUSED_PARAMETER(gpt12)
1580 return IfxScuCcu_getSpbFrequency();
1581 }
1582
1583
1584 IFX_INLINE void IfxGpt12_initCapInPin(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode)
1585 {
1586 IfxPort_setPinModeInput(capIn->pin.port, capIn->pin.pinIndex, inputMode);
1587 IfxGpt12_setCaptureInput(capIn->module, (IfxGpt12_CaptureInput)capIn->select);
1588 }
1589
1590
1591 IFX_INLINE void IfxGpt12_initCapInPinWithPadLevel(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1592 {
1593 IfxPort_setPinModeInput(capIn->pin.port, capIn->pin.pinIndex, inputMode);
1594 IfxPort_setPinPadDriver(capIn->pin.port, capIn->pin.pinIndex, padDriver);
1595 IfxGpt12_setCaptureInput(capIn->module, (IfxGpt12_CaptureInput)capIn->select);
1596 }
1597
1598
1599 IFX_INLINE void IfxGpt12_initTxOutPin(const IfxGpt12_TxOut_Out *txOut, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1600 {
1601 IfxPort_setPinModeOutput(txOut->pin.port, txOut->pin.pinIndex, outputMode, txOut->select);
1602 IfxPort_setPinPadDriver(txOut->pin.port, txOut->pin.pinIndex, padDriver);
1603 }
1604
1605
1606 IFX_INLINE boolean IfxGpt12_isModuleSuspended(Ifx_GPT12 *gpt12)
1607 {
1608 Ifx_GPT12_OCS ocs;
1609
1610 // read the status
1611 ocs.U = gpt12->OCS.U;
1612
1613 // return the status
1614 return ocs.B.SUSSTA;
1615 }
1616
1617
1618 IFX_INLINE void IfxGpt12_setCaptureInput(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInput input)
1619 {
1620 gpt12->PISEL.B.ISCAPIN = input;
1621 }
1622
1623
1624 IFX_INLINE void IfxGpt12_setCaptureReload(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode value)
1625 {
1626 gpt12->CAPREL.B.CAPREL = value;
1627 }
1628
1629
1630 IFX_INLINE void IfxGpt12_setGpt1BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt1BlockPrescaler bps1)
1631 {
1632 gpt12->T3CON.B.BPS1 = bps1;
1633 }
1634
1635
1636 IFX_INLINE void IfxGpt12_setGpt2BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt2BlockPrescaler bps2)
1637 {
1638 gpt12->T6CON.B.BPS2 = bps2;
1639 }
1640
1641
1642 IFX_INLINE void IfxGpt12_setSleepMode(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode mode)
1643 {
1644 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1645 IfxScuWdt_clearCpuEndinit(passwd);
1646 gpt12->CLC.B.EDIS = mode;
1647 IfxScuWdt_setCpuEndinit(passwd);
1648 }
1649
1650
1651 IFX_INLINE void IfxGpt12_setSuspendMode(Ifx_GPT12 *gpt12, IfxGpt12_SuspendMode mode)
1652 {
1653 Ifx_GPT12_OCS ocs;
1654
1655 // remove protection and configure the suspend mode.
1656 ocs.B.SUS_P = 1;
1657 ocs.B.SUS = mode;
1658 gpt12->OCS.U = ocs.U;
1659 }
1660
1661
1662 #endif /* IFXGPT12_H */
IfxGpt12_T5_setTimerValue
IFX_INLINE void IfxGpt12_T5_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T5 timer.
Definition: IfxGpt12.h:1475
IfxGpt12_Mode_highGatedTimer
High Gated Timer Mode selected.
Definition: IfxGpt12.h:191
IfxGpt12_T4_setInput
IFX_INLINE void IfxGpt12_T4_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T4 timer.
Definition: IfxGpt12.h:1327
IfxGpt12_T3_enableOutput
IFX_INLINE void IfxGpt12_T3_enableOutput(Ifx_GPT12 *gpt12, boolean enable)
Enable / Disable the T3 Output on pin T3OUT.
Definition: IfxGpt12.h:1173
IfxGpt12_initCapInPinWithPadLevel
IFX_INLINE void IfxGpt12_initCapInPinWithPadLevel(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CAPIN pin direction as input and configuring pad driver...
Definition: IfxGpt12.h:1591
IfxGpt12_TimerRemoteControl_off
T2 RemoteControl Off.
Definition: IfxGpt12.h:277
IfxGpt12_T4_setReloadInputMode
IFX_INLINE void IfxGpt12_T4_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T4 timer.
Definition: IfxGpt12.h:1345
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:572
IfxGpt12_T3_setMode
IFX_INLINE void IfxGpt12_T3_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T3 timer.
Definition: IfxGpt12.h:1235
IfxGpt12_setSuspendMode
IFX_INLINE void IfxGpt12_setSuspendMode(Ifx_GPT12 *gpt12, IfxGpt12_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxGpt12.h:1651
IfxGpt12_Gpt2BlockPrescaler_4
fGPT/4
Definition: IfxGpt12.h:155
IfxGpt12_ReloadInputMode_bothEdgesTxOTL
rising or falling edge of Tx toggle latch TxOTL
Definition: IfxGpt12.h:209
IfxGpt12_CounterInputMode_counterDisabled
Counter Tx is disabled.
Definition: IfxGpt12.h:119
IfxGpt12_T2_setInput
IFX_INLINE void IfxGpt12_T2_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T2 timer.
Definition: IfxGpt12.h:1124
IfxGpt12_TxIn_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxGpt12_PinMap.h:78
IfxGpt12_initTxEudInPin
IFX_EXTERN void IfxGpt12_initTxEudInPin(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
Initializes a TxEUDIn_IN input.
Definition: IfxGpt12.c:275
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxGpt12_initTxOutPin
IFX_INLINE void IfxGpt12_initTxOutPin(const IfxGpt12_TxOut_Out *txOut, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output.
Definition: IfxGpt12.h:1599
IfxGpt12_Gpt1BlockPrescaler_4
fGPT/4
Definition: IfxGpt12.h:145
IfxGpt12_T4_setEudInput
IFX_INLINE void IfxGpt12_T4_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T4 timer.
Definition: IfxGpt12.h:1315
IfxGpt12_Input
IfxGpt12_Input
Input Select for TxIN Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4)
Definition: IfxGpt12.h:175
IfxGpt12_T3_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T3_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 3 service request.
Definition: IfxGpt12.h:1185
IfxGpt12_setCaptureReload
IFX_INLINE void IfxGpt12_setCaptureReload(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode value)
Sets the sensitivity of the module to sleep signal.
Definition: IfxGpt12.h:1624
IfxGpt12_CaptureInputMode_none
None, Counter is disabled.
Definition: IfxGpt12.h:88
IfxGpt12_initCapInPin
IFX_INLINE void IfxGpt12_initCapInPin(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode)
Initializes a Capin_In input.
Definition: IfxGpt12.h:1584
IfxGpt12_EudInput
IfxGpt12_EudInput
Input Select for TxEUD Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4)
Definition: IfxGpt12.h:131
IfxGpt12_T2_setTimerDirection
IFX_INLINE void IfxGpt12_T2_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T2 timer count direction.
Definition: IfxGpt12.h:1155
IfxGpt12_TimerInputPrescaler
IfxGpt12_TimerInputPrescaler
Input prescaler Selection for the timer Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4) ...
Definition: IfxGpt12.h:251
IfxGpt12_T6_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T6_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 6 service request.
Definition: IfxGpt12.h:1493
IfxGpt12_T5_enableClearTimer
IFX_INLINE void IfxGpt12_T5_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T5 timer.
Definition: IfxGpt12.h:1375
IfxGpt12_Mode_lowGatedTimer
Low Gated Timer Mode selected.
Definition: IfxGpt12.h:190
IfxGpt12_T2_setCaptureInputMode
IFX_INLINE void IfxGpt12_T2_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T2 timer.
Definition: IfxGpt12.h:1093
IfxGpt12_ReloadInputMode_fallingEdgeTxOTL
falling edge of Tx toggle latch TxOTL
Definition: IfxGpt12.h:208
IfxGpt12_TxEud_In
TxEUD pin mapping structure.
Definition: IfxGpt12_PinMap.h:64
IfxGpt12_T4_setRemoteControl
IFX_INLINE void IfxGpt12_T4_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T4 timer.
Definition: IfxGpt12.h:1351
IfxGpt12_T6_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T6_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T6 timer.
Definition: IfxGpt12.h:1487
IfxGpt12_ReloadInputMode_risingEdgeTxIN
rising edge on TxIN
Definition: IfxGpt12.h:204
IfxGpt12_T6_getTimerValue
IFX_INLINE uint16 IfxGpt12_T6_getTimerValue(Ifx_GPT12 *gpt12)
Returns the timer value of the T6 timer.
Definition: IfxGpt12.h:1500
IfxGpt12_T3_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T3_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T3 timer.
Definition: IfxGpt12.h:1179
IfxGpt12_Mode_counter
Counter Mode selected.
Definition: IfxGpt12.h:189
IfxGpt12_T6_getFrequency
IFX_EXTERN float32 IfxGpt12_T6_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T6 timer.
Definition: IfxGpt12.c:216
IfxGpt12_resetModule
IFX_EXTERN void IfxGpt12_resetModule(Ifx_GPT12 *gpt12)
resets GPT12 kernel
Definition: IfxGpt12.c:385
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxGpt12_T2_getFrequency
IFX_EXTERN float32 IfxGpt12_T2_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T2 timer.
Definition: IfxGpt12.c:52
IfxGpt12_TimerRemoteControl_on
T2 RemoteControl On.
Definition: IfxGpt12.h:278
IfxGpt12_SuspendMode_none
No suspend.
Definition: IfxGpt12.h:225
IfxGpt12_CaptureInput_C
signal CAPINC selected
Definition: IfxGpt12.h:80
float32
float float32
Definition: Platform_Types.h:170
IfxGpt12_T3_getTimerValue
IFX_INLINE uint16 IfxGpt12_T3_getTimerValue(Ifx_GPT12 *gpt12)
Returns the timer value of the T3 timer.
Definition: IfxGpt12.h:1192
IfxGpt12_T5_setCaptureTriggerMode
IFX_INLINE void IfxGpt12_T5_setCaptureTriggerMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode)
Sets the capture trigger mode of the T5 timer.
Definition: IfxGpt12.h:1418
Ifx_Assert.h
Assert functions.
IfxGpt12_initTxInPinWithPadLevel
IFX_EXTERN void IfxGpt12_initTxInPinWithPadLevel(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXIN pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:357
IfxGpt12_TimerDirectionSource_external
Timer Dir Control = TxUD (x=2,3,4)
Definition: IfxGpt12.h:245
IfxGpt12_SleepMode_enable
enables sleep mode
Definition: IfxGpt12.h:217
IfxGpt12_T4_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T4_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 4 service request.
Definition: IfxGpt12.h:1278
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxGpt12_T5_setTimerPrescaler
IFX_INLINE void IfxGpt12_T5_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer.
Definition: IfxGpt12.h:1469
IfxGpt12_CaptureTriggerMode_disabled
capture disabled
Definition: IfxGpt12.h:108
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxGpt12_T2_setReloadInputMode
IFX_INLINE void IfxGpt12_T2_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T2 timer.
Definition: IfxGpt12.h:1143
IfxSrc.h
SRC basic functionality.
IfxGpt12_T3_setTimerDirection
IFX_INLINE void IfxGpt12_T3_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T3 timer count direction.
Definition: IfxGpt12.h:1242
IfxGpt12_T3_setTimerValue
IFX_INLINE void IfxGpt12_T3_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T3 Timer.
Definition: IfxGpt12.h:1254
IfxGpt12_T5_setCounterInputMode
IFX_INLINE void IfxGpt12_T5_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T5 timer.
Definition: IfxGpt12.h:1424
IfxGpt12_setGpt2BlockPrescaler
IFX_INLINE void IfxGpt12_setGpt2BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt2BlockPrescaler bps2)
Sets the GPT2 block prescaler.
Definition: IfxGpt12.h:1636
IfxGpt12_setCaptureInput
IFX_INLINE void IfxGpt12_setCaptureInput(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInput input)
Sets the capture input.
Definition: IfxGpt12.h:1618
IfxGpt12_T4_setTimerValue
IFX_INLINE void IfxGpt12_T4_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T4 timer.
Definition: IfxGpt12.h:1369
IfxGpt12_T6_setDirectionSource
IFX_INLINE void IfxGpt12_T6_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
sets the T6 timer count direction source internal / external
Definition: IfxGpt12.h:1519
IfxGpt12_T4_setTimerDirection
IFX_INLINE void IfxGpt12_T4_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T4 timer count direction.
Definition: IfxGpt12.h:1357
IfxGpt12_CaptureInputMode
IfxGpt12_CaptureInputMode
Tx Input Edge Selection (Capture Mode, x=2,4)
Definition: IfxGpt12.h:86
IfxGpt12_T6_setReloadMode
IFX_INLINE void IfxGpt12_T6_setReloadMode(Ifx_GPT12 *gpt12, IfxGpt12_TimerReloadMode mode)
sets the T6 timer count direction
Definition: IfxGpt12.h:1546
IfxGpt12_CaptureInput
IfxGpt12_CaptureInput
Input Select for CAPIN Definition in IfxGPT12.PISEL.B.ISCAPIN.
Definition: IfxGpt12.h:76
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
IfxGpt12_T2_setTimerPrescaler
IFX_INLINE void IfxGpt12_T2_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T2 timer.
Definition: IfxGpt12.h:1161
IfxGpt12_T4_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T4_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T4 timer.
Definition: IfxGpt12.h:1272
IfxGpt12_TimerInputPrescaler_4
Definition: IfxGpt12.h:255
IfxGpt12_Gpt2BlockPrescaler
IfxGpt12_Gpt2BlockPrescaler
Gpt2 block prescaler Selection Definition in IfxGPT12.T6CON.B.BPS2.
Definition: IfxGpt12.h:153
IfxGpt12_TimerDirection_down
Timer Down Direction selected.
Definition: IfxGpt12.h:236
IfxGpt12_Mode_capture
Capture Mode selected.
Definition: IfxGpt12.h:193
IfxGpt12_PinMap.h
GPT12 I/O map.
IfxGpt12_T4_setDirectionSource
IFX_INLINE void IfxGpt12_T4_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T4 timer count direction source internal / external.
Definition: IfxGpt12.h:1309
IfxGpt12_EudInput_B
signal TXEUDB selected
Definition: IfxGpt12.h:134
IfxGpt12_TxOut_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxGpt12_PinMap.h:87
IfxGpt12_T2_run
IFX_INLINE void IfxGpt12_T2_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T2 Timer.
Definition: IfxGpt12.h:1087
IfxGpt12_ReloadInputMode
IfxGpt12_ReloadInputMode
Input Edge Selection for reload mode Definition in IfxGPT12.TxCON.B.TxI (x = 2 and 4) ...
Definition: IfxGpt12.h:201
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD
(rising or falling edge) on any Tx input (TxIN or TxEUD)
Definition: IfxGpt12.h:169
IfxGpt12_CounterInputMode_risingEdgeTxIN
rising edge on TxIN
Definition: IfxGpt12.h:120
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxGpt12_disableModule
IFX_EXTERN void IfxGpt12_disableModule(Ifx_GPT12 *gpt12)
Disables the module.
Definition: IfxGpt12.c:257
IfxGpt12_T3_run
IFX_INLINE void IfxGpt12_T3_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T3 Timer.
Definition: IfxGpt12.h:1198
IfxGpt12_Input_B
signal TXINB selected
Definition: IfxGpt12.h:178
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGpt12_getModuleFrequency
IFX_INLINE float32 IfxGpt12_getModuleFrequency(Ifx_GPT12 *gpt12)
Returns the gpt12 module frequency.
Definition: IfxGpt12.h:1577
IfxGpt12_Gpt1BlockPrescaler_32
fGPT/32
Definition: IfxGpt12.h:146
IfxGpt12_Gpt1BlockPrescaler_8
fGPT/8
Definition: IfxGpt12.h:144
IfxGpt12_T6_setMode
IFX_INLINE void IfxGpt12_T6_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T6 timer.
Definition: IfxGpt12.h:1539
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGpt12_Gpt2BlockPrescaler_16
fGPT/16
Definition: IfxGpt12.h:157
IfxGpt12_TxOut_Out
TxOUT pin mapping structure.
Definition: IfxGpt12_PinMap.h:82
IfxGpt12_setSleepMode
IFX_INLINE void IfxGpt12_setSleepMode(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxGpt12.h:1642
IfxGpt12_T5_setRemoteControl
IFX_INLINE void IfxGpt12_T5_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T5 timer.
Definition: IfxGpt12.h:1457
IfxGpt12_getCaptureSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_getCaptureSrc(Ifx_GPT12 *gpt12)
Returns the address of capture service request.
Definition: IfxGpt12.h:1570
IfxGpt12_Gpt2BlockPrescaler_2
fGPT/2
Definition: IfxGpt12.h:156
IfxGpt12_Mode_incrementalInterfaceEdgeDetection
Incremental Interface Mode selected.
Definition: IfxGpt12.h:195
IfxGpt12_CaptureTriggerMode_fallingEdge
negative Transition on CAPIN or any Transition on T3EUD
Definition: IfxGpt12.h:110
IfxGpt12_EudInput_C
signal TXEUDC selected
Definition: IfxGpt12.h:135
IfxGpt12_SuspendMode
IfxGpt12_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxGpt12.h:223
IfxGpt12_ReloadInputMode_counterDisabled
Counter Tx is disabled.
Definition: IfxGpt12.h:203
IfxGpt12_T5_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T5_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T5 timer.
Definition: IfxGpt12.h:1381
IfxGpt12_T2_setTimerValue
IFX_INLINE void IfxGpt12_T2_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T2 timer.
Definition: IfxGpt12.h:1167
IfxGpt12_T4_enableClearTimerT3
IFX_INLINE void IfxGpt12_T4_enableClearTimerT3(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T3 bit of the T4 timer.
Definition: IfxGpt12.h:1266
IfxGpt12_Gpt2BlockPrescaler_8
fGPT/8
Definition: IfxGpt12.h:158
IfxGpt12_Mode
IfxGpt12_Mode
Timer operating mode Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4)
Definition: IfxGpt12.h:186
IfxGpt12_TimerReloadMode
IfxGpt12_TimerReloadMode
Timer Reload Mode Definition in IfxGPT12.T6CON.B.T6SR.
Definition: IfxGpt12.h:266
IfxGpt12_CaptureTrigger_t3inOrT3EUD
Capture Trigger Enable from T3IN/T3EUD.
Definition: IfxGpt12.h:100
IfxGpt12_T6_setInput
IFX_INLINE void IfxGpt12_T6_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T6 timer.
Definition: IfxGpt12.h:1532
IfxGpt12_TimerInputPrescaler_8
Definition: IfxGpt12.h:256
IfxGpt12_T5_getTimerValue
IFX_INLINE uint16 IfxGpt12_T5_getTimerValue(Ifx_GPT12 *gpt12)
Returns the timer value of the T5 timer.
Definition: IfxGpt12.h:1394
IfxGpt12_T4_setMode
IFX_INLINE void IfxGpt12_T4_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T4 timer.
Definition: IfxGpt12.h:1339
IfxGpt12_Input_C
signal TXINC selected
Definition: IfxGpt12.h:179
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxGpt12_CaptureInput_A
signal CAPINA selected
Definition: IfxGpt12.h:78
IfxGpt12_T2_setInterruptEnable
IFX_INLINE void IfxGpt12_T2_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T2 timer.
Definition: IfxGpt12.h:1131
IfxGpt12_Gpt1BlockPrescaler
IfxGpt12_Gpt1BlockPrescaler
GPT1 block prescaler Selection Definition in IfxGPT12.T3CON.B.BPS1.
Definition: IfxGpt12.h:142
IfxGpt12_T5_setTimerDirection
IFX_INLINE void IfxGpt12_T5_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T5 timer count direction.
Definition: IfxGpt12.h:1463
IfxGpt12_CaptureInput_D
signal CAPIND selected
Definition: IfxGpt12.h:81
IfxGpt12_ReloadInputMode_bothEdgesTxIN
rising or falling edge on TxIN
Definition: IfxGpt12.h:206
IfxGpt12_TimerReloadMode_disable
Reload mode disabled.
Definition: IfxGpt12.h:268
IfxGpt12_T4_getTimerValue
IFX_INLINE uint16 IfxGpt12_T4_getTimerValue(Ifx_GPT12 *gpt12)
Returns the timer value of the T4 timer.
Definition: IfxGpt12.h:1285
IfxGpt12_TimerInputPrescaler_16
Definition: IfxGpt12.h:257
IfxGpt12_T3_setCounterInputMode
IFX_INLINE void IfxGpt12_T3_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T3 timer.
Definition: IfxGpt12.h:1204
IfxGpt12_T6_setCounterInputMode
IFX_INLINE void IfxGpt12_T6_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T6 timer.
Definition: IfxGpt12.h:1512
IfxGpt12_CaptureTriggerMode
IfxGpt12_CaptureTriggerMode
Capture Trigger Selection Definition in IfxGPT12.T5CON.B.CI.
Definition: IfxGpt12.h:106
IfxGpt12_CounterInputMode_bothEdgesTxIN
rising or falling edge on TxIN
Definition: IfxGpt12.h:122
IfxGpt12_CaptureInputMode_fallingEdgeTxIN
falling edge on TxIN
Definition: IfxGpt12.h:90
IfxGpt12_T2_setCounterInputMode
IFX_INLINE void IfxGpt12_T2_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T2 timer.
Definition: IfxGpt12.h:1099
IfxGpt12_TxIn_In
TxIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:73
IfxGpt12_T2_setEudInput
IFX_INLINE void IfxGpt12_T2_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T2 timer.
Definition: IfxGpt12.h:1111
IfxGpt12_T3_setEudInput
IFX_INLINE void IfxGpt12_T3_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T3 timer.
Definition: IfxGpt12.h:1217
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxGpt12_T4_setCaptureInputMode
IFX_INLINE void IfxGpt12_T4_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T4 timer.
Definition: IfxGpt12.h:1297
IfxGpt12_T4_setTimerPrescaler
IFX_INLINE void IfxGpt12_T4_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T4 timer.
Definition: IfxGpt12.h:1363
IfxGpt12_T4_enableClearTimerT2
IFX_INLINE void IfxGpt12_T4_enableClearTimerT2(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T2 bit of the T4 timer.
Definition: IfxGpt12.h:1260
IfxGpt12_TimerRun_start
Timer X Run.
Definition: IfxGpt12.h:287
IfxGpt12_IncrementalInterfaceInputMode
IfxGpt12_IncrementalInterfaceInputMode
Input Edge Selection for Incremental Interface mode Definition in IfxGPT12.TxCON.B.TxI (x=2, 3 and 4)
Definition: IfxGpt12.h:164
IfxGpt12_T4_setIncrementalInterfaceInputMode
IFX_INLINE void IfxGpt12_T4_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T4 timer. ...
Definition: IfxGpt12.h:1321
IfxGpt12_T5_setCaptureTriggerEnable
IFX_INLINE void IfxGpt12_T5_setCaptureTriggerEnable(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the capture trigger of the T5 timer.
Definition: IfxGpt12.h:1412
IfxGpt12_TimerInputPrescaler_128
Definition: IfxGpt12.h:260
IfxGpt12_CaptureTrigger
IfxGpt12_CaptureTrigger
Capture Trigger Enable Definition in IfxGPT12.T5CON.B.CT3.
Definition: IfxGpt12.h:97
IfxGpt12_Mode_incrementalInterfaceRotationDetection
Incremental Interface Mode selected.
Definition: IfxGpt12.h:194
IfxGpt12_CaptureTrigger_capin
Capture Trigger Enable from CAPIN.
Definition: IfxGpt12.h:99
IfxGpt12_Input_A
signal TXINA selected
Definition: IfxGpt12.h:177
IfxGpt12_CaptureInputMode_risingEdgeTxIN
rising edge on TxIN
Definition: IfxGpt12.h:89
IfxGpt12_CounterInputMode_risingEdgeTxOTL
rising edge of TxOTL (x=3,6)
Definition: IfxGpt12.h:123
IfxGpt12_T3_setTimerPrescaler
IFX_INLINE void IfxGpt12_T3_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T3 timer.
Definition: IfxGpt12.h:1248
IfxGpt12_EudInput_D
signal TXEUDD selected
Definition: IfxGpt12.h:136
IfxGpt12_initTxInPin
IFX_EXTERN void IfxGpt12_initTxInPin(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
Initializes a TxIn input.
Definition: IfxGpt12.c:330
IfxGpt12_T5_setDirectionSource
IFX_INLINE void IfxGpt12_T5_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T5 timer count direction source internal / external.
Definition: IfxGpt12.h:1430
IfxGpt12_Gpt1BlockPrescaler_16
fGPT/16
Definition: IfxGpt12.h:147
IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx
Counter Tx Stop.
Definition: IfxGpt12.h:166
IfxGpt12_T2_setRemoteControl
IFX_INLINE void IfxGpt12_T2_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T2 timer.
Definition: IfxGpt12.h:1149
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGpt12_enableModule
IFX_EXTERN void IfxGpt12_enableModule(Ifx_GPT12 *gpt12)
Enables the module.
Definition: IfxGpt12.c:266
IfxGpt12_setGpt1BlockPrescaler
IFX_INLINE void IfxGpt12_setGpt1BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt1BlockPrescaler bps1)
Sets the GPT1 block prescaler.
Definition: IfxGpt12.h:1630
IfxGpt12_T6_enableClearTimer
IFX_INLINE void IfxGpt12_T6_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T6 timer.
Definition: IfxGpt12.h:1481
IfxGpt12_T6_setTimerPrescaler
IFX_INLINE void IfxGpt12_T6_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T6 timer.
Definition: IfxGpt12.h:1558
IfxGpt12_T6_setTimerDirection
IFX_INLINE void IfxGpt12_T6_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
sets the T6 timer count direction
Definition: IfxGpt12.h:1552
IfxGpt12_TimerReloadMode_enable
Reload mode enabled.
Definition: IfxGpt12.h:269
IfxGpt12_TimerRun_stop
Timer x Stops.
Definition: IfxGpt12.h:286
IfxGpt12_ReloadInputMode_fallingEdgeTxIN
falling edge on TxIN
Definition: IfxGpt12.h:205
IfxGpt12_T4_getFrequency
IFX_EXTERN float32 IfxGpt12_T4_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T4 timer.
Definition: IfxGpt12.c:134
IfxGpt12_T6_setTimerValue
IFX_INLINE void IfxGpt12_T6_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T6 timer.
Definition: IfxGpt12.h:1564
IfxGpt12_T6_setEudInput
IFX_INLINE void IfxGpt12_T6_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T6 timer.
Definition: IfxGpt12.h:1525
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxGpt12_CaptureInput_B
signal CAPINB selected
Definition: IfxGpt12.h:79
IfxGpt12_isModuleSuspended
IFX_INLINE boolean IfxGpt12_isModuleSuspended(Ifx_GPT12 *gpt12)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxGpt12.h:1606
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxGpt12_CaptureTriggerMode_randomEdge
Any Transition on CAPIN or any Transition on T3IN/T3EUD.
Definition: IfxGpt12.h:111
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxGpt12_Mode_reload
Reload Mode selected.
Definition: IfxGpt12.h:192
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxGpt12_T4_setCounterInputMode
IFX_INLINE void IfxGpt12_T4_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T4 timer.
Definition: IfxGpt12.h:1303
IfxGpt12_T5_setCaptureTrigger
IFX_INLINE void IfxGpt12_T5_setCaptureTrigger(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger)
Sets the capture trigger of teh T5 timer.
Definition: IfxGpt12.h:1406
IfxGpt12_T5_run
IFX_INLINE void IfxGpt12_T5_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T5 Timer.
Definition: IfxGpt12.h:1400
IfxGpt12_SleepMode_disable
disables sleep mode
Definition: IfxGpt12.h:218
IfxGpt12_TxIn_In::module
Ifx_GPT12 * module
Base address.
Definition: IfxGpt12_PinMap.h:75
IfxGpt12_T3_setInput
IFX_INLINE void IfxGpt12_T3_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T3 timer.
Definition: IfxGpt12.h:1229
IfxGpt12_T2_setMode
IFX_INLINE void IfxGpt12_T2_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T2 timer.
Definition: IfxGpt12.h:1137
IfxGpt12_T2_setIncrementalInterfaceInputMode
IFX_INLINE void IfxGpt12_T2_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T2 timer. ...
Definition: IfxGpt12.h:1118
IfxGpt12_T4_setInterruptEnable
IFX_INLINE void IfxGpt12_T4_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T4 timer.
Definition: IfxGpt12.h:1333
IfxGpt12_T2_getTimerValue
IFX_INLINE uint16 IfxGpt12_T2_getTimerValue(Ifx_GPT12 *gpt12)
Returns the timer value of the T2 timer.
Definition: IfxGpt12.h:1081
IfxGpt12_TimerDirection
IfxGpt12_TimerDirection
Timer Count Direction Definition in IfxGPT12.TxCON.B.TxUD (x=2 to 6)
Definition: IfxGpt12.h:233
IfxGpt12_SleepMode
IfxGpt12_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_GPT12.CLC.B.EDIS.
Definition: IfxGpt12.h:215
IfxGpt12_CounterInputMode_fallingEdgeTxOTL
falling edge of TxOTL
Definition: IfxGpt12.h:124
IfxGpt12_ReloadInputMode_risingEdgeTxOTL
rising edge of Tx toggle latch TxOTL
Definition: IfxGpt12.h:207
IfxGpt12_T5_setEudInput
IFX_INLINE void IfxGpt12_T5_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T5 timer.
Definition: IfxGpt12.h:1436
IfxGpt12_CounterInputMode_fallingEdgeTxIN
falling edge on TxIN
Definition: IfxGpt12.h:121
IfxGpt12_TimerInputPrescaler_32
Definition: IfxGpt12.h:258
IfxGpt12_TimerInputPrescaler_1
Definition: IfxGpt12.h:253
IfxGpt12_Mode_timer
Timer Mode selected.
Definition: IfxGpt12.h:188
IfxGpt12_initTxEudInPinWithPadLevel
IFX_EXTERN void IfxGpt12_initTxEudInPinWithPadLevel(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:302
IfxGpt12_EudInput_A
signal TXEUDA selected
Definition: IfxGpt12.h:133
IfxGpt12_T2_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T2_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T2 timer.
Definition: IfxGpt12.h:1068
IfxGpt12_TimerDirectionSource
IfxGpt12_TimerDirectionSource
Timer count direction control source Definition in IfxGPT12.TxCON.B.TxUDE (x=2 to 6) ...
Definition: IfxGpt12.h:242
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxGpt12_T5_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T5_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 5 service request.
Definition: IfxGpt12.h:1387
IfxGpt12_CounterInputMode
IfxGpt12_CounterInputMode
Input Edge Selection for counter mode Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 6) ...
Definition: IfxGpt12.h:117
IfxGpt12_CaptureTriggerMode_risingEdge
positive Transition on CAPIN or any Transition on T3IN
Definition: IfxGpt12.h:109
IfxGpt12_T5_setMode
IFX_INLINE void IfxGpt12_T5_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T5 timer.
Definition: IfxGpt12.h:1450
IfxGpt12_T3_setIncrementalInterfaceInputMode
IFX_INLINE void IfxGpt12_T3_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T3 timer. ...
Definition: IfxGpt12.h:1223
IfxGpt12_cfg.h
GPT12 on-chip implementation data.
IfxGpt12_SuspendMode_hard
Hard Suspend.
Definition: IfxGpt12.h:226
IfxGpt12_T2_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T2_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 2 service request.
Definition: IfxGpt12.h:1074
IfxGpt12_T4_run
IFX_INLINE void IfxGpt12_T4_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T4 Timer.
Definition: IfxGpt12.h:1291
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN
(rising or falling edge) on TxIN
Definition: IfxGpt12.h:167
IfxGpt12_TxIn_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGpt12_PinMap.h:77
IfxGpt12_SuspendMode_soft
Soft Suspend.
Definition: IfxGpt12.h:227
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxGpt12_T3_setDirectionSource
IFX_INLINE void IfxGpt12_T3_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T3 timer count direction source internal / external.
Definition: IfxGpt12.h:1211
IfxGpt12_T5_setInput
IFX_INLINE void IfxGpt12_T5_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T5 timer.
Definition: IfxGpt12.h:1443
IfxGpt12_CaptureInputMode_bothEdgesTxIN
(rising or falling edge) on TxIN
Definition: IfxGpt12.h:91
IfxGpt12_TimerDirection_up
Timer Up Direction selected.
Definition: IfxGpt12.h:235
IfxGpt12_TimerRun
IfxGpt12_TimerRun
Timer Run / stop control choice (only if TxCON.B.TxRC = 0) Definition in IfxGPT12.TxCON.B.TxR (x = 2 to 6)
Definition: IfxGpt12.h:284
IfxGpt12_T3_getFrequency
IFX_EXTERN float32 IfxGpt12_T3_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T3 timer.
Definition: IfxGpt12.c:93
IfxGpt12_Input_D
signal TXIND selected
Definition: IfxGpt12.h:180
IfxGpt12_TimerRemoteControl
IfxGpt12_TimerRemoteControl
Timer Remote Control enable choice Definition in IfxGPT12.TxCON.B.TxRC (x = 2 and 4) ...
Definition: IfxGpt12.h:275
IfxGpt12_TimerDirectionSource_internal
Timer Dir Control = TxUD (x=2,3,4)
Definition: IfxGpt12.h:244
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD
(rising or falling edge) on TxEUD
Definition: IfxGpt12.h:168
IfxGpt12_T5_getFrequency
IFX_EXTERN float32 IfxGpt12_T5_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer.
Definition: IfxGpt12.c:175
IfxGpt12_TimerInputPrescaler_2
Definition: IfxGpt12.h:254
IfxGpt12_T2_setDirectionSource
IFX_INLINE void IfxGpt12_T2_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T2 timer count direction source internal / external.
Definition: IfxGpt12.h:1105
IfxGpt12_TimerInputPrescaler_64
Definition: IfxGpt12.h:259
IfxGpt12_T6_run
IFX_INLINE void IfxGpt12_T6_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T6 Timer.
Definition: IfxGpt12.h:1506
IfxGpt12_CounterInputMode_bothEdgesTxOTL
rising or falling edge of TxOTL
Definition: IfxGpt12.h:125


iLLD_TC26B: IfxGpt12_IncrEnc.c Source File

  • Gpt12
  • IncrEnc
IfxGpt12_IncrEnc.c
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12_IncrEnc.c
3 * \brief GPT12 INCRENC details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGpt12_IncrEnc.h"
47
48 /******************************************************************************/
49 /*-----------------------Private Function Prototypes--------------------------*/
50 /******************************************************************************/
51
52 /** \brief Update internal data when incremental mode is using T2.\n
53 * This function shall be periodically called
54 * \param driver driver handle
55 * \return None
56 */
57 IFX_STATIC void IfxGpt12_IncrEnc_updateFromT2(IfxGpt12_IncrEnc *driver);
58
59 /** \brief Update internal data when incremental mode is using T3.\n
60 * This function shall be periodically called
61 * \param driver driver handle
62 * \return None
63 */
64 IFX_STATIC void IfxGpt12_IncrEnc_updateFromT3(IfxGpt12_IncrEnc *driver);
65
66 /** \brief Updates the speed
67 * \param driver driver handle
68 * \param newPosition new position
69 * \return None
70 */
71 IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT2(IfxGpt12_IncrEnc *driver, sint32 newPosition);
72
73 /** \brief Updates the speed
74 * \param driver driver handle
75 * \param newPosition new position
76 * \return None
77 */
78 IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT3(IfxGpt12_IncrEnc *driver, sint32 newPosition);
79
80 /******************************************************************************/
81 /*-------------------------Function Implementations---------------------------*/
82 /******************************************************************************/
83
84 float32 IfxGpt12_IncrEnc_getAbsolutePosition(IfxGpt12_IncrEnc *driver)
85 {
86 return ((float32)driver->turn + (float32)driver->rawPosition / (float32)driver->resolution) * 2.0 * IFX_PI;
87 }
88
89
90 IfxStdIf_Pos_Dir IfxGpt12_IncrEnc_getDirection(IfxGpt12_IncrEnc *driver)
91 {
92 return driver->direction;
93 }
94
95
96 IfxStdIf_Pos_Status IfxGpt12_IncrEnc_getFault(IfxGpt12_IncrEnc *driver)
97 {
98 return driver->status;
99 }
100
101
102 sint32 IfxGpt12_IncrEnc_getOffset(IfxGpt12_IncrEnc *driver)
103 {
104 return driver->offset;
105 }
106
107
108 uint16 IfxGpt12_IncrEnc_getPeriodPerRotation(IfxGpt12_IncrEnc *driver)
109 {
110 IFX_UNUSED_PARAMETER(driver)
111 return 1; /* Period per rotation is 1*/
112 }
113
114
115 float32 IfxGpt12_IncrEnc_getPosition(IfxGpt12_IncrEnc *driver)
116 {
117 return (float32)driver->rawPosition * driver->positionConst;
118 }
119
120
121 sint32 IfxGpt12_IncrEnc_getRawPosition(IfxGpt12_IncrEnc *driver)
122 {
123 return driver->rawPosition;
124 }
125
126
127 float32 IfxGpt12_IncrEnc_getRefreshPeriod(IfxGpt12_IncrEnc *driver)
128 {
129 return driver->updatePeriod;
130 }
131
132
133 sint32 IfxGpt12_IncrEnc_getResolution(IfxGpt12_IncrEnc *driver)
134 {
135 return driver->resolution;
136 }
137
138
139 IfxStdIf_Pos_SensorType IfxGpt12_IncrEnc_getSensorType(IfxGpt12_IncrEnc *driver)
140 {
141 IFX_UNUSED_PARAMETER(driver)
142 return IfxStdIf_Pos_SensorType_encoder;
143 }
144
145
146 float32 IfxGpt12_IncrEnc_getSpeed(IfxGpt12_IncrEnc *driver)
147 {
148 return driver->speed;
149 }
150
151
152 sint32 IfxGpt12_IncrEnc_getTurn(IfxGpt12_IncrEnc *driver)
153 {
154 return driver->turn;
155 }
156
157
158 boolean IfxGpt12_IncrEnc_init(IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
159 {
160 boolean status = TRUE;
161 Ifx_GPT12 *gpt12 = config->module;
162
163 driver->module = gpt12;
164
165 driver->offset = config->base.offset;
166 driver->resolution = config->base.resolution * config->base.resolutionFactor;
167 driver->positionConst = 1.0 / (float32)driver->resolution * 2.0 * IFX_PI;
168 driver->speedModeThreshold = config->base.speedModeThreshold;
169 IfxGpt12_IncrEnc_setRefreshPeriod(driver, config->base.updatePeriod);
170
171 driver->status.status = 0;
172 driver->status.B.notSynchronised = 1;
173 driver->minSpeed = config->base.minSpeed;
174 driver->maxSpeed = config->base.maxSpeed;
175
176 driver->rawPosition = 0;
177 driver->speed = 0;
178 driver->direction = IfxStdIf_Pos_Dir_unknown;
179 driver->turn = 0;
180
181 if (config->pinA->timer == 3)
182 {
183 /* T3 Configuration */
184 IfxGpt12_T3_setMode(gpt12, IfxGpt12_Mode_incrementalInterfaceEdgeDetection);
185
186 switch (config->base.resolutionFactor)
187 {
188 case IfxStdIf_Pos_ResolutionFactor_twoFold:
189 IfxGpt12_T3_setIncrementalInterfaceInputMode(gpt12, IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN);
190 break;
191 case IfxStdIf_Pos_ResolutionFactor_fourFold:
192 IfxGpt12_T3_setIncrementalInterfaceInputMode(gpt12, IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD);
193 break;
194 default:
195 status = FALSE;
196 break;
197 }
198
199 IfxGpt12_T3_setDirectionSource(gpt12, IfxGpt12_TimerDirectionSource_external);
200 IfxGpt12_T3_setTimerDirection(gpt12, config->base.reversed ? IfxGpt12_TimerDirection_up : IfxGpt12_TimerDirection_down);
201 IfxGpt12_T3_enableOutput(gpt12, FALSE);
202 IfxGpt12_T3_run(gpt12, IfxGpt12_TimerRun_start);
203
204 if (config->pinZ != NULL_PTR)
205 { /* Only configure T4 if zero signal is available. Zero has to be on T4IN */
206 /* T4 Configuration */
207 IfxGpt12_T4_setMode(gpt12, IfxGpt12_Mode_capture);
208 IfxGpt12_T4_setCaptureInputMode(gpt12, IfxGpt12_CaptureInputMode_risingEdgeTxIN);
209 IfxGpt12_T4_enableClearTimerT2(gpt12, FALSE);
210 IfxGpt12_T4_enableClearTimerT3(gpt12, TRUE);
211 IfxGpt12_T4_setInterruptEnable(gpt12, config->zeroIsrPriority != 0);
212 IfxGpt12_T4_setRemoteControl(gpt12, IfxGpt12_TimerRemoteControl_off);
213 IfxGpt12_T4_run(gpt12, IfxGpt12_TimerRun_stop);
214
215 if (config->zeroIsrPriority)
216 {
217 /* setup interrupt */
218 volatile Ifx_SRC_SRCR *src = IfxGpt12_T4_getSrc(gpt12);
219 IfxSrc_init(src, config->zeroIsrProvider, config->zeroIsrPriority);
220 IfxSrc_enable(src);
221 }
222 }
223
224 /* T5 Configuration */
225 IfxGpt12_T5_setMode(gpt12, IfxGpt12_Mode_timer);
226 IfxGpt12_T5_setTimerPrescaler(gpt12, IfxGpt12_TimerInputPrescaler_4);
227 IfxGpt12_T5_setCaptureTrigger(gpt12, IfxGpt12_CaptureTrigger_t3inOrT3EUD);
228 IfxGpt12_T5_setCaptureTriggerMode(gpt12, IfxGpt12_CaptureTriggerMode_risingEdge);
229 IfxGpt12_T5_enableClearTimer(gpt12, TRUE);
230 IfxGpt12_T5_setCaptureTriggerEnable(gpt12, TRUE);
231 IfxGpt12_T5_setRemoteControl(gpt12, IfxGpt12_TimerRemoteControl_off);
232 IfxGpt12_T5_setDirectionSource(gpt12, IfxGpt12_TimerDirectionSource_internal);
233 IfxGpt12_T5_setTimerDirection(gpt12, IfxGpt12_TimerDirection_up);
234 IfxGpt12_T5_run(gpt12, IfxGpt12_TimerRun_start);
235
236 driver->update = (IfxGpt12_IncrEnc_Update) & IfxGpt12_IncrEnc_updateFromT3;
237 }
238 else if (config->pinA->timer == 2)
239 {
240 /* T2 Configuration */
241 IfxGpt12_T2_setMode(gpt12, IfxGpt12_Mode_incrementalInterfaceEdgeDetection);
242
243 switch (config->base.resolutionFactor)
244 {
245 case IfxStdIf_Pos_ResolutionFactor_twoFold:
246 IfxGpt12_T2_setIncrementalInterfaceInputMode(gpt12, IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN);
247 break;
248 case IfxStdIf_Pos_ResolutionFactor_fourFold:
249 IfxGpt12_T2_setIncrementalInterfaceInputMode(gpt12, IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD);
250 break;
251 default:
252 status = FALSE;
253 break;
254 }
255
256 IfxGpt12_T2_setDirectionSource(gpt12, IfxGpt12_TimerDirectionSource_external);
257 IfxGpt12_T2_setTimerDirection(gpt12, config->base.reversed ? IfxGpt12_TimerDirection_up : IfxGpt12_TimerDirection_down);
258 IfxGpt12_T2_run(gpt12, IfxGpt12_TimerRun_start);
259
260 if (config->pinZ != NULL_PTR)
261 { /* Only configure T4 if zero signal is available. Zero has to be on T4EUD */
262 /* T4 Configuration */
263 IfxGpt12_T4_setMode(gpt12, IfxGpt12_Mode_capture);
264 IfxGpt12_T4_setCaptureInputMode(gpt12, IfxGpt12_CaptureInputMode_none);
265 IfxGpt12_T4_enableClearTimerT2(gpt12, TRUE);
266 IfxGpt12_T4_enableClearTimerT3(gpt12, FALSE);
267 IfxGpt12_T4_setInterruptEnable(gpt12, FALSE);
268 IfxGpt12_T4_setRemoteControl(gpt12, IfxGpt12_TimerRemoteControl_off);
269 IfxGpt12_T4_run(gpt12, IfxGpt12_TimerRun_stop);
270 }
271
272 driver->update = (IfxGpt12_IncrEnc_Update) & IfxGpt12_IncrEnc_updateFromT2;
273 }
274
275 if (config->initPins == TRUE)
276 {
277 IfxGpt12_initTxInPinWithPadLevel(config->pinA, config->pinMode, config->pinDriver);
278 IfxGpt12_initTxEudInPinWithPadLevel(config->pinB, config->pinMode, config->pinDriver);
279
280 if (config->pinZ != NULL_PTR)
281 {
282 IfxGpt12_initTxInPinWithPadLevel(config->pinZ, config->pinMode, config->pinDriver);
283 }
284 }
285
286 driver->speedConstTimeDiff =
287 (2.0 * IFX_PI) / (config->base.resolution * 2) * IfxGpt12_T5_getFrequency(gpt12);
288
289 return status;
290 }
291
292
293 void IfxGpt12_IncrEnc_initConfig(IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
294 {
295 IfxStdIf_Pos_initConfig(&config->base);
296 config->base.resolutionFactor = IfxStdIf_Pos_ResolutionFactor_twoFold;
297 config->base.minSpeed = 1.0 / 60.0 * (2 * IFX_PI); // 1 rpm
298 config->base.maxSpeed = 20000.0 / 60.0 * (2 * IFX_PI); // 20000 rpm
299 config->base.speedFilerCutOffFrequency = config->base.maxSpeed / 2 * IFX_PI * 10;
300
301 config->pinA = NULL_PTR;
302 config->pinB = NULL_PTR;
303 config->pinZ = NULL_PTR;
304 config->pinMode = IfxPort_InputMode_noPullDevice;
305 config->module = gpt12;
306 config->zeroIsrPriority = 0;
307 config->zeroIsrProvider = IfxSrc_Tos_cpu0;
308 config->pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
309
310 config->initPins = TRUE;
311 }
312
313
314 void IfxGpt12_IncrEnc_onZeroIrq(IfxGpt12_IncrEnc *driver)
315 {
316 if (driver->status.B.notSynchronised)
317 {
318 driver->status.B.notSynchronised = 0;
319 }
320
321 if (driver->direction == IfxStdIf_Pos_Dir_forward)
322 {
323 driver->turn++;
324 }
325 else
326 {
327 driver->turn--;
328 }
329 }
330
331
332 void IfxGpt12_IncrEnc_reset(IfxGpt12_IncrEnc *driver)
333 {
334 driver->rawPosition = 0;
335 driver->turn = 0;
336 driver->speed = 0;
337 driver->status.status = 0;
338 driver->status.B.notSynchronised = 1;
339 }
340
341
342 void IfxGpt12_IncrEnc_resetFaults(IfxGpt12_IncrEnc *driver)
343 {
344 IfxStdIf_Pos_Status status;
345 status.status = 0;
346 status.B.notSynchronised = driver->status.B.notSynchronised;
347 driver->status.status = status.status;
348 }
349
350
351 void IfxGpt12_IncrEnc_setOffset(IfxGpt12_IncrEnc *driver, sint32 offset)
352 {
353 driver->offset = offset;
354 driver->status.B.notSynchronised = 0;
355 }
356
357
358 void IfxGpt12_IncrEnc_setRefreshPeriod(IfxGpt12_IncrEnc *driver, float32 updatePeriod)
359 {
360 driver->updatePeriod = updatePeriod;
361 driver->speedConstPulseCount = (2.0 * IFX_PI) / driver->resolution / updatePeriod;
362 driver->speedModeThresholdTick = driver->speedModeThreshold * driver->resolution * updatePeriod / (2.0 * IFX_PI);
363 }
364
365
366 boolean IfxGpt12_IncrEnc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver)
367 {
368 /* Ensure the stdif is reset to zeros */
369 memset(stdif, 0, sizeof(IfxStdIf_Pos));
370
371 /* Set the driver */
372 stdif->driver = driver;
373
374 /* *INDENT-OFF* Note: this file was indented manually by the author. */
375 /* Set the API link */
376 stdif->onZeroIrq =(IfxStdIf_Pos_OnZeroIrq )&IfxGpt12_IncrEnc_onZeroIrq;
377 stdif->getAbsolutePosition=(IfxStdIf_Pos_GetAbsolutePosition )&IfxGpt12_IncrEnc_getAbsolutePosition;
378 stdif->getDirection =(IfxStdIf_Pos_GetDirection )&IfxGpt12_IncrEnc_getDirection;
379 stdif->getFault =(IfxStdIf_Pos_GetFault )&IfxGpt12_IncrEnc_getFault;
380 stdif->getOffset =(IfxStdIf_Pos_GetOffset )&IfxGpt12_IncrEnc_getOffset;
381 stdif->getPeriodPerRotation =(IfxStdIf_Pos_GetPeriodPerRotation )&IfxGpt12_IncrEnc_getPeriodPerRotation;
382 stdif->getPosition =(IfxStdIf_Pos_GetPosition )&IfxGpt12_IncrEnc_getPosition;
383 stdif->getRawPosition =(IfxStdIf_Pos_GetRawPosition )&IfxGpt12_IncrEnc_getRawPosition;
384 stdif->getRefreshPeriod =(IfxStdIf_Pos_GetRefreshPeriod )&IfxGpt12_IncrEnc_getRefreshPeriod;
385 stdif->getResolution =(IfxStdIf_Pos_GetResolution )&IfxGpt12_IncrEnc_getResolution;
386 stdif->getSensorType =(IfxStdIf_Pos_GetSensorType )&IfxGpt12_IncrEnc_getSensorType;
387 stdif->reset =(IfxStdIf_Pos_Reset )&IfxGpt12_IncrEnc_reset;
388 stdif->resetFaults =(IfxStdIf_Pos_ResetFaults )&IfxGpt12_IncrEnc_resetFaults;
389 stdif->getSpeed =(IfxStdIf_Pos_GetSpeed )&IfxGpt12_IncrEnc_getSpeed;
390 stdif->update =(IfxStdIf_Pos_Update )&IfxGpt12_IncrEnc_update;
391 stdif->setOffset =(IfxStdIf_Pos_SetOffset )&IfxGpt12_IncrEnc_setOffset;
392 stdif->setRefreshPeriod =(IfxStdIf_Pos_SetRefreshPeriod )&IfxGpt12_IncrEnc_setRefreshPeriod;
393 stdif->getTurn =(IfxStdIf_Pos_GetTurn )&IfxGpt12_IncrEnc_getTurn;
394 /* *INDENT-ON* */
395
396 return TRUE;
397 }
398
399
400 void IfxGpt12_IncrEnc_update(IfxGpt12_IncrEnc *driver)
401 {
402 driver->update(driver);
403 }
404
405
406 IFX_STATIC void IfxGpt12_IncrEnc_updateFromT2(IfxGpt12_IncrEnc *driver)
407 {
408 Ifx_GPT12 *gpt12 = driver->module;
409 sint32 newPosition;
410 driver->direction = gpt12->T2CON.B.T2RDIR ? IfxStdIf_Pos_Dir_backward : IfxStdIf_Pos_Dir_forward;
411
412 newPosition = gpt12->T2.U;
413
414 newPosition = (newPosition + driver->offset);
415
416 if (newPosition >= driver->resolution)
417 {
418 newPosition %= driver->resolution;
419 }
420 else if (newPosition < 0)
421 {
422 newPosition = (newPosition + driver->resolution);
423 }
424
425 IfxGpt12_IncrEnc_updateSpeedFromT2(driver, newPosition);
426 driver->rawPosition = newPosition;
427 }
428
429
430 IFX_STATIC void IfxGpt12_IncrEnc_updateFromT3(IfxGpt12_IncrEnc *driver)
431 {
432 Ifx_GPT12 *gpt12 = driver->module;
433 sint32 newPosition;
434 driver->direction = gpt12->T3CON.B.T3RDIR ? IfxStdIf_Pos_Dir_backward : IfxStdIf_Pos_Dir_forward;
435
436 newPosition = gpt12->T3.U;
437
438 newPosition = (newPosition + driver->offset);
439
440 if (newPosition >= driver->resolution)
441 {
442 newPosition %= driver->resolution;
443 }
444 else if (newPosition < 0)
445 {
446 newPosition = (newPosition + driver->resolution);
447 }
448
449 IfxGpt12_IncrEnc_updateSpeedFromT3(driver, newPosition);
450 driver->rawPosition = newPosition;
451 }
452
453
454 IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT2(IfxGpt12_IncrEnc *driver, sint32 newPosition)
455 {
456 float32 speed;
457 sint32 diff;
458
459 if (driver->direction == IfxStdIf_Pos_Dir_forward)
460 {
461 diff = newPosition - driver->rawPosition;
462 }
463 else
464 {
465 diff = driver->rawPosition - newPosition;
466 }
467
468 if (diff < 0)
469 {
470 diff += driver->resolution;
471 }
472
473 speed = diff * driver->speedConstPulseCount;
474
475 speed = driver->direction == IfxStdIf_Pos_Dir_forward ? speed : -speed;
476 driver->speed = speed;
477 }
478
479
480 IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT3(IfxGpt12_IncrEnc *driver, sint32 newPosition)
481 {
482 float32 speed;
483 sint32 diff;
484
485 if (driver->direction == IfxStdIf_Pos_Dir_forward)
486 {
487 diff = newPosition - driver->rawPosition;
488 }
489 else
490 {
491 diff = driver->rawPosition - newPosition;
492 }
493
494 if (diff < 0)
495 {
496 diff += driver->resolution;
497 }
498
499 if (diff > driver->speedModeThresholdTick)
500 { /* Use pulse count mode ( Fast speed ) */
501 speed = diff * driver->speedConstPulseCount;
502 }
503 else
504 { /* Use time diff mode (slow speed), only if T3 is used as core */
505 Ifx_GPT12 *gpt12 = driver->module;
506 volatile Ifx_SRC_SRCR *srcT5 = IfxGpt12_T5_getSrc(gpt12);
507
508 if (srcT5->B.SRR != 1)
509 { // NO overflow of T5
510 volatile Ifx_SRC_SRCR *srcCap = IfxGpt12_getCaptureSrc(gpt12);
511
512 // Check if a new value is captured
513 if (srcCap->B.SRR != 0)
514 {
515 // Delete Capture Request Bit
516 srcCap->B.CLRR = 1;
517 speed = driver->speedConstTimeDiff / gpt12->CAPREL.B.CAPREL;
518 }
519 else
520 {
521 speed = driver->speed;
522 }
523 }
524 else
525 { // T5 overflow detected
526 // Delete Overflow Request bit
527 srcT5->B.CLRR = 1;
528 speed = 0.0;
529 }
530 }
531
532 speed = driver->direction == IfxStdIf_Pos_Dir_forward ? speed : -speed;
533 driver->speed = speed;
534 }
IfxGpt12_IncrEnc_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins. User handles separately.
Definition: IfxGpt12_IncrEnc.h:243
IfxGpt12_IncrEnc::positionConst
float32 positionConst
constant for calculating mechanical position (in rad) from raw position
Definition: IfxGpt12_IncrEnc.h:221
IfxGpt12_T3_enableOutput
IFX_INLINE void IfxGpt12_T3_enableOutput(Ifx_GPT12 *gpt12, boolean enable)
Enable / Disable the T3 Output on pin T3OUT.
Definition: IfxGpt12.h:1173
IfxGpt12_IncrEnc_getPosition
float32 IfxGpt12_IncrEnc_getPosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:115
IfxStdIf_Pos_Config::speedModeThreshold
float32 speedModeThreshold
Speed threshold used for the speed calculation mode. For encoder, above the threshold the pulse count...
Definition: IfxStdIf_Pos.h:319
IfxGpt12_TimerRemoteControl_off
T2 RemoteControl Off.
Definition: IfxGpt12.h:277
IfxStdIf_Pos_Config::resolution
sint32 resolution
Sensor resolution. For encoder with 1024 pulse per revolution, the value should be 1024...
Definition: IfxStdIf_Pos.h:315
IfxGpt12_IncrEnc_Config::zeroIsrPriority
Ifx_Priority zeroIsrPriority
Interrupt isrPriority of the zero interrupt, if 0 the interrupt is disable.
Definition: IfxGpt12_IncrEnc.h:240
IfxGpt12_T3_setMode
IFX_INLINE void IfxGpt12_T3_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T3 timer.
Definition: IfxGpt12.h:1235
IfxGpt12_IncrEnc.h
GPT12 INCRENC details.
IfxStdIf_Pos_GetRefreshPeriod
float32(* IfxStdIf_Pos_GetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf)
Get the update period.
Definition: IfxStdIf_Pos.h:187
IfxGpt12_IncrEnc_Config::pinDriver
IfxPort_PadDriver pinDriver
Pad Driver.
Definition: IfxGpt12_IncrEnc.h:242
IfxStdIf_Pos_::setRefreshPeriod
IfxStdIf_Pos_SetRefreshPeriod setRefreshPeriod
Definition: IfxStdIf_Pos.h:307
IfxStdIf_Pos_GetOffset
sint32(* IfxStdIf_Pos_GetOffset)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position sensor offset.
Definition: IfxStdIf_Pos.h:139
IfxGpt12_CaptureInputMode_none
None, Counter is disabled.
Definition: IfxGpt12.h:88
IfxGpt12_IncrEnc::speedModeThreshold
float32 speedModeThreshold
treshold used for speed calculation using pulse count mode or time diff mode in rad/s ...
Definition: IfxGpt12_IncrEnc.h:222
IfxGpt12_IncrEnc_Config::pinB
IfxGpt12_TxEud_In * pinB
Encoder B signal. Should be connecting to T2 or T3 TxEUD. See GPT12 pin map data. ...
Definition: IfxGpt12_IncrEnc.h:237
IfxGpt12_IncrEnc_Config::zeroIsrProvider
IfxSrc_Tos zeroIsrProvider
Interrupt service provider for the zero interrupt.
Definition: IfxGpt12_IncrEnc.h:241
IfxGpt12_IncrEnc_Config
Configuration structure for GPT12.
Definition: IfxGpt12_IncrEnc.h:232
IfxStdIf_Pos_::setOffset
IfxStdIf_Pos_SetOffset setOffset
Definition: IfxStdIf_Pos.h:303
IfxStdIf_Pos_initConfig
void IfxStdIf_Pos_initConfig(IfxStdIf_Pos_Config *config)
Definition: IfxStdIf_Pos.c:45
IfxGpt12_IncrEnc_setOffset
void IfxGpt12_IncrEnc_setOffset(IfxGpt12_IncrEnc *driver, sint32 offset)
Definition: IfxGpt12_IncrEnc.c:351
IfxGpt12_T2_setTimerDirection
IFX_INLINE void IfxGpt12_T2_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T2 timer count direction.
Definition: IfxGpt12.h:1155
IfxStdIf_Pos_GetSpeed
float32(* IfxStdIf_Pos_GetSpeed)(IfxStdIf_InterfaceDriver stdIf)
Return the speed.
Definition: IfxStdIf_Pos.h:205
IfxStdIf_Pos_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Pos.h:285
IfxStdIf_Pos_Dir_unknown
Unknown direction.
Definition: IfxStdIf_Pos.h:96
IfxGpt12_T5_enableClearTimer
IFX_INLINE void IfxGpt12_T5_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T5 timer.
Definition: IfxGpt12.h:1375
IfxGpt12_T4_setRemoteControl
IFX_INLINE void IfxGpt12_T4_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T4 timer.
Definition: IfxGpt12.h:1351
IfxGpt12_IncrEnc_getRawPosition
sint32 IfxGpt12_IncrEnc_getRawPosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:121
IfxGpt12_IncrEnc_updateFromT3
IFX_STATIC void IfxGpt12_IncrEnc_updateFromT3(IfxGpt12_IncrEnc *driver)
Update internal data when incremental mode is using T3. This function shall be periodically called...
Definition: IfxGpt12_IncrEnc.c:430
IfxGpt12_IncrEnc::rawPosition
sint32 rawPosition
raw position in ticks.
Definition: IfxGpt12_IncrEnc.h:211
IfxStdIf_Pos_Config::minSpeed
float32 minSpeed
Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Definition: IfxStdIf_Pos.h:320
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
IfxGpt12_T5_setCaptureTriggerMode
IFX_INLINE void IfxGpt12_T5_setCaptureTriggerMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode)
Sets the capture trigger mode of the T5 timer.
Definition: IfxGpt12.h:1418
IfxGpt12_TimerDirectionSource_external
Timer Dir Control = TxUD (x=2,3,4)
Definition: IfxGpt12.h:245
IfxStdIf_Pos_::getRawPosition
IfxStdIf_Pos_GetRawPosition getRawPosition
Definition: IfxStdIf_Pos.h:292
IfxStdIf_Pos_Config::resolutionFactor
IfxStdIf_Pos_ResolutionFactor resolutionFactor
Resolution multiplier for encoder interface, valid is 2, 4.
Definition: IfxStdIf_Pos.h:317
IfxStdIf_Pos_::getPeriodPerRotation
IfxStdIf_Pos_GetPeriodPerRotation getPeriodPerRotation
Definition: IfxStdIf_Pos.h:293
IfxGpt12_IncrEnc_Config::base
IfxStdIf_Pos_Config base
Configuration data of Standard interface: Position interface.
Definition: IfxGpt12_IncrEnc.h:234
IfxGpt12_T4_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T4_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 4 service request.
Definition: IfxGpt12.h:1278
IfxGpt12_T5_setTimerPrescaler
IFX_INLINE void IfxGpt12_T5_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer.
Definition: IfxGpt12.h:1469
IfxStdIf_Pos_Status::status
uint32 status
Global status access.
Definition: IfxStdIf_Pos.h:102
IfxGpt12_IncrEnc_setRefreshPeriod
void IfxGpt12_IncrEnc_setRefreshPeriod(IfxGpt12_IncrEnc *driver, float32 updatePeriod)
Definition: IfxGpt12_IncrEnc.c:358
IfxGpt12_IncrEnc::status
IfxStdIf_Pos_Status status
error code (0 = no error)
Definition: IfxGpt12_IncrEnc.h:215
IfxGpt12_T3_setTimerDirection
IFX_INLINE void IfxGpt12_T3_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T3 timer count direction.
Definition: IfxGpt12.h:1242
IfxStdIf_Pos_::getSensorType
IfxStdIf_Pos_GetSensorType getSensorType
Definition: IfxStdIf_Pos.h:296
IfxStdIf_Pos_::getDirection
IfxStdIf_Pos_GetDirection getDirection
Definition: IfxStdIf_Pos.h:290
IfxGpt12_IncrEnc_updateFromT2
IFX_STATIC void IfxGpt12_IncrEnc_updateFromT2(IfxGpt12_IncrEnc *driver)
Update internal data when incremental mode is using T2. This function shall be periodically called...
Definition: IfxGpt12_IncrEnc.c:406
IfxGpt12_IncrEnc
Incremental encoder object.
Definition: IfxGpt12_IncrEnc.h:209
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxStdIf_Pos_OnZeroIrq
void(* IfxStdIf_Pos_OnZeroIrq)(IfxStdIf_InterfaceDriver stdIf)
Handles the zero interrupt.
Definition: IfxStdIf_Pos.h:132
IfxGpt12_IncrEnc_resetFaults
void IfxGpt12_IncrEnc_resetFaults(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:342
IfxStdIf_Pos_ResolutionFactor_twoFold
2-fold resolution. Valid for encoder
Definition: IfxStdIf_Pos.h:76
IfxGpt12_IncrEnc::maxSpeed
float32 maxSpeed
Absolute maximal allowed speed. Above speed is recognized as error.
Definition: IfxGpt12_IncrEnc.h:226
IfxStdIf_Pos_Config::maxSpeed
float32 maxSpeed
Absolute maximal allowed speed. Above speed is recognized as error.
Definition: IfxStdIf_Pos.h:321
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStdIf_Pos_::getRefreshPeriod
IfxStdIf_Pos_GetRefreshPeriod getRefreshPeriod
Definition: IfxStdIf_Pos.h:294
IfxStdIf_Pos_Status::B
struct IfxStdIf_Pos_Status::@0 B
Bitfielf status access.
IfxGpt12_TimerInputPrescaler_4
Definition: IfxGpt12.h:255
IfxGpt12_TimerDirection_down
Timer Down Direction selected.
Definition: IfxGpt12.h:236
IfxGpt12_Mode_capture
Capture Mode selected.
Definition: IfxGpt12.h:193
IfxStdIf_Pos_::getPosition
IfxStdIf_Pos_GetPosition getPosition
Definition: IfxStdIf_Pos.h:289
IfxGpt12_IncrEnc_update
void IfxGpt12_IncrEnc_update(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:400
IfxGpt12_T2_run
IFX_INLINE void IfxGpt12_T2_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T2 Timer.
Definition: IfxGpt12.h:1087
IfxGpt12_IncrEnc::turn
sint32 turn
number of mechanical turns
Definition: IfxGpt12_IncrEnc.h:213
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD
(rising or falling edge) on any Tx input (TxIN or TxEUD)
Definition: IfxGpt12.h:169
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:217
IfxGpt12_IncrEnc_getTurn
sint32 IfxGpt12_IncrEnc_getTurn(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:152
IfxGpt12_IncrEnc_Update
IfxStdIf_Pos_Update IfxGpt12_IncrEnc_Update
Definition: IfxGpt12_IncrEnc.h:199
IfxGpt12_IncrEnc::direction
IfxStdIf_Pos_Dir direction
rotation direction
Definition: IfxGpt12_IncrEnc.h:214
IfxStdIf_Pos_::getFault
IfxStdIf_Pos_GetFault getFault
Definition: IfxStdIf_Pos.h:291
IfxGpt12_IncrEnc_init
boolean IfxGpt12_IncrEnc_init(IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
Initialises the Incremental interface.
Definition: IfxGpt12_IncrEnc.c:158
IfxGpt12_T3_run
IFX_INLINE void IfxGpt12_T3_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T3 Timer.
Definition: IfxGpt12.h:1198
IfxStdIf_Pos_Config::reversed
boolean reversed
If true, the sensor direction is reversed.
Definition: IfxStdIf_Pos.h:314
IfxStdIf_Pos_GetSensorType
IfxStdIf_Pos_SensorType(* IfxStdIf_Pos_GetSensorType)(IfxStdIf_InterfaceDriver stdIf)
Get the sensor type.
Definition: IfxStdIf_Pos.h:199
IfxGpt12_IncrEnc_stdIfPosInit
boolean IfxGpt12_IncrEnc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver)
Initializes the standard interface "Pos".
Definition: IfxGpt12_IncrEnc.c:366
IfxStdIf_Pos_GetRawPosition
sint32(* IfxStdIf_Pos_GetRawPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position in ticks.
Definition: IfxStdIf_Pos.h:181
IfxGpt12_TxIn_In::timer
uint8 timer
Timer number.
Definition: IfxGpt12_PinMap.h:76
IfxGpt12_IncrEnc::speedConstTimeDiff
float32 speedConstTimeDiff
constant for calculating mechanical speed (in rad/s) from raw speed in time diff mode ...
Definition: IfxGpt12_IncrEnc.h:220
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:144
IfxStdIf_Pos_GetDirection
IfxStdIf_Pos_Dir(* IfxStdIf_Pos_GetDirection)(IfxStdIf_InterfaceDriver stdIf)
Return the direction.
Definition: IfxStdIf_Pos.h:158
IfxGpt12_T5_setRemoteControl
IFX_INLINE void IfxGpt12_T5_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T5 timer.
Definition: IfxGpt12.h:1457
IfxGpt12_getCaptureSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_getCaptureSrc(Ifx_GPT12 *gpt12)
Returns the address of capture service request.
Definition: IfxGpt12.h:1570
IfxGpt12_Mode_incrementalInterfaceEdgeDetection
Incremental Interface Mode selected.
Definition: IfxGpt12.h:195
IfxStdIf_Pos_Config::updatePeriod
float32 updatePeriod
period in seconds, at which the application calls IfxStdIf_Pos_update()
Definition: IfxStdIf_Pos.h:318
IfxStdIf_Pos_SensorType_encoder
Definition: IfxStdIf_Pos.h:83
IfxGpt12_IncrEnc::speedModeThresholdTick
sint32 speedModeThresholdTick
treshold used for speed calculation using pulse count mode or time diff mode in ticks ...
Definition: IfxGpt12_IncrEnc.h:223
IfxGpt12_IncrEnc_getResolution
sint32 IfxGpt12_IncrEnc_getResolution(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:133
IfxStdIf_Pos_SetRefreshPeriod
void(* IfxStdIf_Pos_SetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod)
Set the update period.
Definition: IfxStdIf_Pos.h:279
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:92
IfxGpt12_T4_enableClearTimerT3
IFX_INLINE void IfxGpt12_T4_enableClearTimerT3(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T3 bit of the T4 timer.
Definition: IfxGpt12.h:1266
IfxStdIf_Pos_GetPeriodPerRotation
uint16(* IfxStdIf_Pos_GetPeriodPerRotation)(IfxStdIf_InterfaceDriver stdIf)
Return the period per rotation setting.
Definition: IfxStdIf_Pos.h:172
IfxStdIf_Pos_Dir_backward
Backward direction. For rotating position sensor, fackward is counter-clockwise rotation.
Definition: IfxStdIf_Pos.h:95
IfxGpt12_CaptureTrigger_t3inOrT3EUD
Capture Trigger Enable from T3IN/T3EUD.
Definition: IfxGpt12.h:100
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:83
IfxStdIf_Pos_::getResolution
IfxStdIf_Pos_GetResolution getResolution
Definition: IfxStdIf_Pos.h:295
IfxGpt12_IncrEnc_getSensorType
IfxStdIf_Pos_SensorType IfxGpt12_IncrEnc_getSensorType(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:139
IfxGpt12_T4_setMode
IFX_INLINE void IfxGpt12_T4_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T4 timer.
Definition: IfxGpt12.h:1339
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:283
IfxGpt12_IncrEnc::update
IfxGpt12_IncrEnc_Update update
Update call back API.
Definition: IfxGpt12_IncrEnc.h:227
IfxStdIf_Pos_Dir_forward
Forward direction. For rotating position sensor, forward is clockwise rotation.
Definition: IfxStdIf_Pos.h:94
IfxGpt12_IncrEnc::speed
float32 speed
mechanical speed in rad/s
Definition: IfxGpt12_IncrEnc.h:212
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:81
IfxGpt12_IncrEnc::updatePeriod
float32 updatePeriod
update period in seconds
Definition: IfxGpt12_IncrEnc.h:218
IfxGpt12_IncrEnc_getSpeed
float32 IfxGpt12_IncrEnc_getSpeed(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:146
IfxGpt12_T5_setTimerDirection
IFX_INLINE void IfxGpt12_T5_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T5 timer count direction.
Definition: IfxGpt12.h:1463
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxGpt12_IncrEnc_getOffset
sint32 IfxGpt12_IncrEnc_getOffset(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:102
IfxGpt12_IncrEnc::resolution
sint32 resolution
resolution of this position sensor interface
Definition: IfxGpt12_IncrEnc.h:217
IfxGpt12_IncrEnc_updateSpeedFromT3
IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT3(IfxGpt12_IncrEnc *driver, sint32 newPosition)
Updates the speed.
Definition: IfxGpt12_IncrEnc.c:480
IfxStdIf_Pos_GetFault
IfxStdIf_Pos_Status(* IfxStdIf_Pos_GetFault)(IfxStdIf_InterfaceDriver stdIf)
Return the sensor status.
Definition: IfxStdIf_Pos.h:165
IfxGpt12_IncrEnc_Config::pinA
IfxGpt12_TxIn_In * pinA
Encoder A signal. Should be connecting to T2 or T3 TxIN. See GPT12 pin map data.
Definition: IfxGpt12_IncrEnc.h:236
IfxGpt12_IncrEnc_getDirection
IfxStdIf_Pos_Dir IfxGpt12_IncrEnc_getDirection(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:90
IfxGpt12_T4_setCaptureInputMode
IFX_INLINE void IfxGpt12_T4_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T4 timer.
Definition: IfxGpt12.h:1297
IfxGpt12_T4_enableClearTimerT2
IFX_INLINE void IfxGpt12_T4_enableClearTimerT2(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T2 bit of the T4 timer.
Definition: IfxGpt12.h:1260
IfxGpt12_TimerRun_start
Timer X Run.
Definition: IfxGpt12.h:287
IfxStdIf_Pos_::getSpeed
IfxStdIf_Pos_GetSpeed getSpeed
Definition: IfxStdIf_Pos.h:301
IfxStdIf_Pos_SetOffset
void(* IfxStdIf_Pos_SetOffset)(IfxStdIf_InterfaceDriver stdIf, sint32 offset)
Set the sensor offset.
Definition: IfxStdIf_Pos.h:252
IfxGpt12_T5_setCaptureTriggerEnable
IFX_INLINE void IfxGpt12_T5_setCaptureTriggerEnable(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the capture trigger of the T5 timer.
Definition: IfxGpt12.h:1412
IfxGpt12_IncrEnc_updateSpeedFromT2
IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT2(IfxGpt12_IncrEnc *driver, sint32 newPosition)
Updates the speed.
Definition: IfxGpt12_IncrEnc.c:454
IfxStdIf_Pos_Reset
void(* IfxStdIf_Pos_Reset)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver.
Definition: IfxStdIf_Pos.h:236
IfxGpt12_CaptureInputMode_risingEdgeTxIN
rising edge on TxIN
Definition: IfxGpt12.h:89
IfxStdIf_Pos_Config::offset
sint32 offset
Position sensor offset.
Definition: IfxStdIf_Pos.h:313
IfxGpt12_T5_setDirectionSource
IFX_INLINE void IfxGpt12_T5_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T5 timer count direction source internal / external.
Definition: IfxGpt12.h:1430
IfxStdIf_Pos_::getOffset
IfxStdIf_Pos_GetOffset getOffset
Definition: IfxStdIf_Pos.h:288
IfxGpt12_initTxInPinWithPadLevel
void IfxGpt12_initTxInPinWithPadLevel(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXIN pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:357
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGpt12_IncrEnc_getPeriodPerRotation
uint16 IfxGpt12_IncrEnc_getPeriodPerRotation(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:108
IfxStdIf_Pos_::getAbsolutePosition
IfxStdIf_Pos_GetAbsolutePosition getAbsolutePosition
Return the absolute position.
Definition: IfxStdIf_Pos.h:287
IfxGpt12_IncrEnc_onZeroIrq
void IfxGpt12_IncrEnc_onZeroIrq(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:314
IfxGpt12_IncrEnc_Config::module
Ifx_GPT12 * module
Pointer to module base address.
Definition: IfxGpt12_IncrEnc.h:235
IfxGpt12_TimerRun_stop
Timer x Stops.
Definition: IfxGpt12.h:286
IfxStdIf_Pos_::update
IfxStdIf_Pos_Update update
Definition: IfxStdIf_Pos.h:302
IfxStdIf_Pos_GetTurn
sint32(* IfxStdIf_Pos_GetTurn)(IfxStdIf_InterfaceDriver stdIf)
Return position in turn.
Definition: IfxStdIf_Pos.h:211
sint32
long sint32
Definition: Platform_Types.h:134
IfxGpt12_initTxEudInPinWithPadLevel
void IfxGpt12_initTxEudInPinWithPadLevel(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:302
IfxStdIf_Pos_GetAbsolutePosition
float32(* IfxStdIf_Pos_GetAbsolutePosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position, inclusive turns.
Definition: IfxStdIf_Pos.h:126
IfxGpt12_T5_setCaptureTrigger
IFX_INLINE void IfxGpt12_T5_setCaptureTrigger(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger)
Sets the capture trigger of teh T5 timer.
Definition: IfxGpt12.h:1406
IfxGpt12_T5_run
IFX_INLINE void IfxGpt12_T5_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T5 Timer.
Definition: IfxGpt12.h:1400
IfxGpt12_IncrEnc_getFault
IfxStdIf_Pos_Status IfxGpt12_IncrEnc_getFault(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:96
IfxStdIf_Pos_::resetFaults
IfxStdIf_Pos_ResetFaults resetFaults
Definition: IfxStdIf_Pos.h:300
IfxGpt12_T2_setMode
IFX_INLINE void IfxGpt12_T2_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T2 timer.
Definition: IfxGpt12.h:1137
IfxGpt12_T2_setIncrementalInterfaceInputMode
IFX_INLINE void IfxGpt12_T2_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T2 timer. ...
Definition: IfxGpt12.h:1118
IfxGpt12_T4_setInterruptEnable
IFX_INLINE void IfxGpt12_T4_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T4 timer.
Definition: IfxGpt12.h:1333
IfxStdIf_Pos_Update
void(* IfxStdIf_Pos_Update)(IfxStdIf_InterfaceDriver stdIf)
Refresh the status.
Definition: IfxStdIf_Pos.h:227
IfxStdIf_Pos_Config::speedFilerCutOffFrequency
float32 speedFilerCutOffFrequency
Speed low pass filter cut off frequency.
Definition: IfxStdIf_Pos.h:323
IfxStdIf_Pos_::onZeroIrq
IfxStdIf_Pos_OnZeroIrq onZeroIrq
Definition: IfxStdIf_Pos.h:286
IfxGpt12_IncrEnc_getAbsolutePosition
float32 IfxGpt12_IncrEnc_getAbsolutePosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:84
IfxGpt12_Mode_timer
Timer Mode selected.
Definition: IfxGpt12.h:188
IfxStdIf_Pos_ResolutionFactor_fourFold
4-fold resolution. Valid for encoder
Definition: IfxStdIf_Pos.h:77
IfxGpt12_T5_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T5_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 5 service request.
Definition: IfxGpt12.h:1387
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:100
IfxGpt12_IncrEnc_getRefreshPeriod
float32 IfxGpt12_IncrEnc_getRefreshPeriod(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:127
IfxGpt12_CaptureTriggerMode_risingEdge
positive Transition on CAPIN or any Transition on T3IN
Definition: IfxGpt12.h:109
IfxGpt12_IncrEnc_Config::pinMode
IfxPort_InputMode pinMode
Pin mode for A, B and Z inputs.
Definition: IfxGpt12_IncrEnc.h:239
IfxGpt12_T5_setMode
IFX_INLINE void IfxGpt12_T5_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T5 timer.
Definition: IfxGpt12.h:1450
IfxGpt12_T3_setIncrementalInterfaceInputMode
IFX_INLINE void IfxGpt12_T3_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T3 timer. ...
Definition: IfxGpt12.h:1223
IfxGpt12_T4_run
IFX_INLINE void IfxGpt12_T4_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T4 Timer.
Definition: IfxGpt12.h:1291
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN
(rising or falling edge) on TxIN
Definition: IfxGpt12.h:167
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxStdIf_Pos_::getTurn
IfxStdIf_Pos_GetTurn getTurn
Definition: IfxStdIf_Pos.h:297
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxGpt12_IncrEnc::minSpeed
float32 minSpeed
Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Definition: IfxGpt12_IncrEnc.h:225
IfxGpt12_T3_setDirectionSource
IFX_INLINE void IfxGpt12_T3_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T3 timer count direction source internal / external.
Definition: IfxGpt12.h:1211
IfxGpt12_IncrEnc_reset
void IfxGpt12_IncrEnc_reset(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:332
IfxStdIf_Pos_::reset
IfxStdIf_Pos_Reset reset
Definition: IfxStdIf_Pos.h:299
IfxGpt12_TimerDirection_up
Timer Up Direction selected.
Definition: IfxGpt12.h:235
IfxGpt12_TimerDirectionSource_internal
Timer Dir Control = TxUD (x=2,3,4)
Definition: IfxGpt12.h:244
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxGpt12_IncrEnc_initConfig
void IfxGpt12_IncrEnc_initConfig(IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
Initializes the configuration structure to default.
Definition: IfxGpt12_IncrEnc.c:293
IfxGpt12_IncrEnc_Config::pinZ
IfxGpt12_TxIn_In * pinZ
Encoder Z signal. Should be connecting to T4 TxIn for use with T3 and TxEUD (Ignore compiler type con...
Definition: IfxGpt12_IncrEnc.h:238
IfxGpt12_IncrEnc::offset
sint32 offset
raw position offset
Definition: IfxGpt12_IncrEnc.h:216
IfxGpt12_IncrEnc::speedConstPulseCount
float32 speedConstPulseCount
constant for calculating mechanical speed (in rad/s) from raw speed in pulse count mode ...
Definition: IfxGpt12_IncrEnc.h:219
IfxStdIf_Pos_GetPosition
float32(* IfxStdIf_Pos_GetPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position.
Definition: IfxStdIf_Pos.h:149
IfxStdIf_Pos_GetResolution
sint32(* IfxStdIf_Pos_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Get the resolution.
Definition: IfxStdIf_Pos.h:193
IfxStdIf_Pos_ResetFaults
void(* IfxStdIf_Pos_ResetFaults)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver fault.
Definition: IfxStdIf_Pos.h:245
IfxGpt12_T5_getFrequency
float32 IfxGpt12_T5_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer.
Definition: IfxGpt12.c:175
IfxGpt12_T2_setDirectionSource
IFX_INLINE void IfxGpt12_T2_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T2 timer count direction source internal / external.
Definition: IfxGpt12.h:1105


iLLD_TC26B: IfxGpt12_IncrEnc.h Source File

  • Gpt12
  • IncrEnc
IfxGpt12_IncrEnc.h
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12_IncrEnc.h
3 * \brief GPT12 INCRENC details
4 * \ingroup IfxLld_Gpt12
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gpt12_IncrEnc INCRENC
42 * \ingroup IfxLld_Gpt12
43 *
44 * \defgroup IfxLld_Gpt12_IncrEnc_Usage How to use the GPT12 Incremental Encoder Driver
45 * \ingroup IfxLld_Gpt12_IncrEnc
46 *
47 * The IncrEnc interface can be used in one of the following configurations T3 as core or T2 as core
48 *
49 * Setup with T3 as core
50 * - T3 as incremental mode
51 * - Multiplication factor:
52 * - twoFold: use both edges of TxIn
53 * - fourFold: use both edges of TxIn and TxEUD
54 * - Reverse of direction supported by GPT12
55 * - T3 value diff is used for speed calculation at high speed (speed > speedModeThreshold)
56 * - T4 used for zero signal detection if pinZ is not NULL
57 * - interrupt is generated to support turn calculation if zeroIsrPriority != 0
58 * - T4 clears T3 on zero signal event on TxIn input
59 * - T5 used for low speed calculation (speed < speedModeThreshold)
60 * - Rising edge of TxIn or TxEUD captures the T5 timer in CAPREL
61 *
62 * Setup with T2 as core
63 * - T2 as incremental mode
64 * - Multiplication factor:
65 * - twoFold: sample on both edges of TxIn
66 * - fourFold: sample on both edges of TxIn and TxEUD
67 * - Reverse of direction supported by GPT12
68 * - T2 value diff is used for speed calculation at high speed
69 * - T4 used for zero signal detection if pinZeroTxEUD is not NULL
70 * - T4 clears T2 on zero signal event on TxEUD input
71 *
72 * \section IfxLld_Gpt12_IncrEnc_Preparation Preparation
73 * \subsection IfxLld_Gpt12_IncrEnc_Include Include Files
74 *
75 * Include following header file into your C code:
76 * \code
77 * #include <Gpt12/Gpt/IfxGpt12_IncrEnc.h>
78 * \endcode
79 *
80 * \subsection IfxLld_Gpt12_IncrEnc_Variables Variables
81 *
82 * \code
83 * // used globally
84 * static IfxGpt12_IncrEnc gpt12;
85 * \endcode
86 *
87 * \subsection IfxLld_Gpt12_Gpt_Interrupt Interrupt Handler Installation
88 *
89 * See also \ref IfxLld_Cpu_Irq_Usage
90 *
91 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
92 * \code
93 * // priorities are normally defined in Ifx_IntPrioDef.h
94 * #define ISR_PRIORITY_INCRENC_ZERO 6
95 * \endcode
96 *
97 * Add the interrupt service routines to your C code. They have to call the GPT12 interrupt handlers by passing the gpt12 handle:
98 * \code
99 * IFX_INTERRUPT(ISR_IncrIncZero, 0, ISR_PRIORITY_INCRENC_ZERO)
100 * {
101 * IfxGpt12_IncrEnc_onZeroIrq(&gpt12);
102 * }
103 * \endcode
104 *
105 * Finally install the interrupt handlers in your initialisation function:
106 * \code
107 * // install interrupt handlers
108 * IfxCpu_Irq_installInterruptHandler(&ISR_IncrIncZero, ISR_PRIORITY_INCRENC_ZERO);
109 * IfxCpu_enableInterrupts();
110 * \endcode
111 *
112 * \subsection IfxLld_Gpt12_Gpt_Init Module Initialisation
113 *
114 * The module initialisation can be done in the same function. Here an example:
115 * \code
116 * // Initialize global clocks
117 * IfxGpt12_enableModule(&MODULE_GPT120);
118 * IfxGpt12_setGpt1BlockPrescaler(&MODULE_GPT120, IfxGpt12_Gpt1BlockPrescaler_8);
119 * IfxGpt12_setGpt2BlockPrescaler(&MODULE_GPT120, IfxGpt12_Gpt2BlockPrescaler_4);
120 *
121 * // create module config
122 * IfxGpt12_IncrEnc_Config gpt12Config;
123 * IfxGpt12_IncrEnc_initConfig(&gpt12Config , &MODULE_GPT120);
124 *
125 * // implementation with T3 as core
126 * gpt12Config.base.offset = 0;
127 * gpt12Config.base.reversed = FALSE;
128 * gpt12Config.base.resolution = 2048;
129 * gpt12Config.base.periodPerRotation = 1;
130 * gpt12Config.base.resolutionFactor = IfxStdIf_Pos_ResolutionFactor_fourFold;
131 * gpt12Config.base.updatePeriod = 100e-6;
132 * gpt12Config.base.speedModeThreshold = 200;
133 * gpt12Config.base.minSpeed = 10;
134 * gpt12Config.base.maxSpeed = 500;
135 * gpt12Config.zeroIsrPriority = ISR_PRIORITY(INTERRUPT_INCRINC_ZERO);
136 * gpt12Config.zeroIsrProvider = ISR_PROVIDER(INTERRUPT_INCRINC_ZERO);
137 * gpt12Config.pinA = &IfxGpt120_T3INA_P02_6_IN;
138 * gpt12Config.pinB = &IfxGpt120_T3EUDA_P02_7_IN;
139 * gpt12Config.pinZ = &IfxGpt120_T4INA_P02_8_IN;
140 * gpt12Config.pinMode = IfxPort_InputMode_noPullDevice;
141 *
142 * gpt12Config.base.speedFilterEnabled = TRUE;
143 * gpt12Config.base.speedFilerCutOffFrequency = config.base.maxSpeed / 2 * IFX_PI * 2;
144 *
145 *
146 * // initialize module
147 * //IfxGpt12_IncrEnc gpt12; // defined globally
148 * IfxGpt12_IncrEnc_init(&gpt12, &gpt12Config);
149 * \endcode
150 *
151 * \section IfxLld_Gpt12_IncrEnc_Update Update
152 *
153 * speed, position and direction of the incremental encoder can be collected by the following
154 *
155 * \code
156 * float32 speed, rawPosition;
157 * IfxStdIf_Pos_Dir direction;
158 *
159 * Ifx_TickTime tickRefresh = gpt12.updatePeriod * TimeConst_1s;
160 *
161 * Ifx_TickTime refreshDeadLine = now();
162 *
163 * if (isDeadLine(refreshDeadLine))
164 * {
165 * refreshDeadLine = addTTime(refreshDeadLine, tickRefresh);
166 * IfxGpt12_IncrEnc_update(&gpt12);
167 *
168 * speed = IfxGpt12_IncrEnc_getSpeed(&gpt12);
169 * rawPosition = IfxGpt12_IncrEnc_getRawPosition(&gpt12);
170 * direction = IfxGpt12_IncrEnc_getDirection(&gpt12);
171 * }
172 * \endcode
173 *
174 * \defgroup IfxLld_Gpt12_IncrEnc INCRENC
175 * \ingroup IfxLld_Gpt12
176 * \defgroup IfxLld_Gpt12_IncrEnc_Datastructures Data structures
177 * \ingroup IfxLld_Gpt12_IncrEnc
178 * \defgroup IfxLld_Gpt12_IncrEnc_Functions Functions
179 * \ingroup IfxLld_Gpt12_IncrEnc
180 * \defgroup IfxLld_Gpt12_IncrEnc_StdIf_Functions StdIf Functions
181 * \ingroup IfxLld_Gpt12_IncrEnc
182 */
183
184 #ifndef IFXGPT12_INCRENC_H
185 #define IFXGPT12_INCRENC_H 1
186
187 /******************************************************************************/
188 /*----------------------------------Includes----------------------------------*/
189 /******************************************************************************/
190
191 #include "StdIf/IfxStdIf_Pos.h"
192 #include "Gpt12/Std/IfxGpt12.h"
193 #include "string.h"
194
195 /******************************************************************************/
196 /*------------------------------Type Definitions------------------------------*/
197 /******************************************************************************/
198
199 typedef IfxStdIf_Pos_Update IfxGpt12_IncrEnc_Update;
200
201 /******************************************************************************/
202 /*-----------------------------Data Structures--------------------------------*/
203 /******************************************************************************/
204
205 /** \addtogroup IfxLld_Gpt12_IncrEnc_Datastructures
206 * \{ */
207 /** \brief Incremental encoder object
208 */
209 typedef struct
210 {
211 sint32 rawPosition; /**< \brief raw position in ticks. \note: the value already contains the offset */
212 float32 speed; /**< \brief mechanical speed in rad/s */
213 sint32 turn; /**< \brief number of mechanical turns */
214 IfxStdIf_Pos_Dir direction; /**< \brief rotation direction */
215 IfxStdIf_Pos_Status status; /**< \brief error code (0 = no error) */
216 sint32 offset; /**< \brief raw position offset */
217 sint32 resolution; /**< \brief resolution of this position sensor interface */
218 float32 updatePeriod; /**< \brief update period in seconds */
219 float32 speedConstPulseCount; /**< \brief constant for calculating mechanical speed (in rad/s) from raw speed in pulse count mode */
220 float32 speedConstTimeDiff; /**< \brief constant for calculating mechanical speed (in rad/s) from raw speed in time diff mode */
221 float32 positionConst; /**< \brief constant for calculating mechanical position (in rad) from raw position */
222 float32 speedModeThreshold; /**< \brief treshold used for speed calculation using pulse count mode or time diff mode in rad/s */
223 sint32 speedModeThresholdTick; /**< \brief treshold used for speed calculation using pulse count mode or time diff mode in ticks */
224 Ifx_GPT12 *module; /**< \brief Pointer to the GPT12 module */
225 float32 minSpeed; /**< \brief Absolute minimal allowed speed. below speed is recognized as 0rad/s */
226 float32 maxSpeed; /**< \brief Absolute maximal allowed speed. Above speed is recognized as error */
227 IfxGpt12_IncrEnc_Update update; /**< \brief Update call back API */
228 } IfxGpt12_IncrEnc;
229
230 /** \brief Configuration structure for GPT12
231 */
232 typedef struct
233 {
234 IfxStdIf_Pos_Config base; /**< \brief Configuration data of \ref library_srvsw_stdif_posif */
235 Ifx_GPT12 *module; /**< \brief Pointer to module base address */
236 IfxGpt12_TxIn_In *pinA; /**< \brief Encoder A signal. Should be connecting to T2 or T3 TxIN. See \ref IfxLld_Gpt12_pinmap "GPT12 pin map data" */
237 IfxGpt12_TxEud_In *pinB; /**< \brief Encoder B signal. Should be connecting to T2 or T3 TxEUD. See \ref IfxLld_Gpt12_pinmap "GPT12 pin map data" */
238 IfxGpt12_TxIn_In *pinZ; /**< \brief Encoder Z signal. Should be connecting to T4 TxIn for use with T3 and TxEUD (Ignore compiler type conflict warning) for use with T4. See \ref IfxLld_Gpt12_pinmap "GPT12 pin map data" */
239 IfxPort_InputMode pinMode; /**< \brief Pin mode for A, B and Z inputs */
240 Ifx_Priority zeroIsrPriority; /**< \brief Interrupt isrPriority of the zero interrupt, if 0 the interrupt is disable */
241 IfxSrc_Tos zeroIsrProvider; /**< \brief Interrupt service provider for the zero interrupt */
242 IfxPort_PadDriver pinDriver; /**< \brief Pad Driver */
243 boolean initPins; /**< \brief TRUE: Initialize pins in driver
244 * FALSE: Don't initialize pins. User handles separately. */
245 } IfxGpt12_IncrEnc_Config;
246
247 /** \} */
248
249 /** \addtogroup IfxLld_Gpt12_IncrEnc_Functions
250 * \{ */
251
252 /******************************************************************************/
253 /*-------------------------Global Function Prototypes-------------------------*/
254 /******************************************************************************/
255
256 /** \brief Initialises the Incremental interface
257 * \param driver incremental encoder interface Handle
258 * \param config Configuration structure for incremental encoder
259 * \return TRUE on success else FALSE
260 *
261 * \code
262 * // create module config
263 * IfxGpt12_IncrEnc_Config gptConfig;
264 * IfxGpt12_IncrEnc_initConfig(&gptConfig , &MODULE_GPT120);
265 *
266 * // initialize module
267 * //IfxGpt12_IncrEnc gpt12; // defined globally
268 *
269 * IfxGpt12_IncrEnc_init(&gpt12, &gptConfig);
270 * \endcode
271 *
272 */
273 IFX_EXTERN boolean IfxGpt12_IncrEnc_init(IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config);
274
275 /** \brief Initializes the configuration structure to default
276 * \param config Configuration structure for incremental encoder
277 * \param gpt12 pointer to module base address
278 * \return None
279 *
280 * see \ref IfxGpt12_IncrEnc_init
281 *
282 */
283 IFX_EXTERN void IfxGpt12_IncrEnc_initConfig(IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12);
284
285 /** \} */
286
287 /** \addtogroup IfxLld_Gpt12_IncrEnc_StdIf_Functions
288 * \{ */
289
290 /******************************************************************************/
291 /*-------------------------Global Function Prototypes-------------------------*/
292 /******************************************************************************/
293
294 /** \brief \see IfxStdIf_Pos_GetAbsolutePosition
295 * \param driver driver handle
296 * \return absolute position
297 */
298 IFX_EXTERN float32 IfxGpt12_IncrEnc_getAbsolutePosition(IfxGpt12_IncrEnc *driver);
299
300 /** \brief \see IfxStdIf_Pos_GetDirection
301 * \param driver driver handle
302 * \return direction
303 */
304 IFX_EXTERN IfxStdIf_Pos_Dir IfxGpt12_IncrEnc_getDirection(IfxGpt12_IncrEnc *driver);
305
306 /** \brief \see IfxStdIf_Pos_GetFault
307 * \param driver driver handle
308 * \return Fault
309 */
310 IFX_EXTERN IfxStdIf_Pos_Status IfxGpt12_IncrEnc_getFault(IfxGpt12_IncrEnc *driver);
311
312 /** \brief \see IfxStdIf_Pos_GetOffset
313 * \param driver driver handle
314 * \return offset address
315 */
316 IFX_EXTERN sint32 IfxGpt12_IncrEnc_getOffset(IfxGpt12_IncrEnc *driver);
317
318 /** \brief \see IfxStdIf_Pos_GetPeriodPerRotation
319 * \param driver driver handle
320 * \return Period per rotation
321 */
322 IFX_EXTERN uint16 IfxGpt12_IncrEnc_getPeriodPerRotation(IfxGpt12_IncrEnc *driver);
323
324 /** \brief \see IfxStdIf_Pos_GetPosition
325 * \param driver driver handle
326 * \return position
327 */
328 IFX_EXTERN float32 IfxGpt12_IncrEnc_getPosition(IfxGpt12_IncrEnc *driver);
329
330 /** \brief \see IfxStdIf_Pos_GetRawPosition
331 * \param driver driver handle
332 * \return position in ticks
333 */
334 IFX_EXTERN sint32 IfxGpt12_IncrEnc_getRawPosition(IfxGpt12_IncrEnc *driver);
335
336 /** \brief \see IfxStdIf_Pos_GetRefreshPeriod
337 * \param driver driver handle
338 * \return update period
339 */
340 IFX_EXTERN float32 IfxGpt12_IncrEnc_getRefreshPeriod(IfxGpt12_IncrEnc *driver);
341
342 /** \brief \see IfxStdIf_Pos_GetResolution
343 * \param driver driver handle
344 * \return resolution
345 */
346 IFX_EXTERN sint32 IfxGpt12_IncrEnc_getResolution(IfxGpt12_IncrEnc *driver);
347
348 /** \brief \see IfxStdIf_Pos_GetSensorType
349 * \param driver driver handle
350 * \return sensor type
351 */
352 IFX_EXTERN IfxStdIf_Pos_SensorType IfxGpt12_IncrEnc_getSensorType(IfxGpt12_IncrEnc *driver);
353
354 /** \brief \see IfxStdIf_Pos_GetSpeed
355 * \param driver driver handle
356 * \return speed
357 */
358 IFX_EXTERN float32 IfxGpt12_IncrEnc_getSpeed(IfxGpt12_IncrEnc *driver);
359
360 /** \brief \see IfxStdIf_Pos_GetTurn
361 * \param driver driver handle
362 * \return the number of turns
363 */
364 IFX_EXTERN sint32 IfxGpt12_IncrEnc_getTurn(IfxGpt12_IncrEnc *driver);
365
366 /** \brief \see IfxStdIf_Pos_OnZeroIrq
367 * \param driver driver handle
368 * \return None
369 */
370 IFX_EXTERN void IfxGpt12_IncrEnc_onZeroIrq(IfxGpt12_IncrEnc *driver);
371
372 /** \brief \see IfxStdIf_Pos_Reset
373 * \param driver driver handle
374 * \return None
375 */
376 IFX_EXTERN void IfxGpt12_IncrEnc_reset(IfxGpt12_IncrEnc *driver);
377
378 /** \brief \see IfxStdIf_Pos_ResetFaults
379 * \param driver driver handle
380 * \return None
381 */
382 IFX_EXTERN void IfxGpt12_IncrEnc_resetFaults(IfxGpt12_IncrEnc *driver);
383
384 /** \brief \see IfxStdIf_Pos_SetOffset
385 * \param driver driver handle
386 * \param offset offset address
387 * \return None
388 */
389 IFX_EXTERN void IfxGpt12_IncrEnc_setOffset(IfxGpt12_IncrEnc *driver, sint32 offset);
390
391 /** \brief \see IfxStdIf_Pos_SetRefreshPeriod
392 * \param driver driver handle
393 * \param updatePeriod update period
394 * \return None
395 */
396 IFX_EXTERN void IfxGpt12_IncrEnc_setRefreshPeriod(IfxGpt12_IncrEnc *driver, float32 updatePeriod);
397
398 /** \brief \see IfxStdIf_Pos_Update
399 * \param driver driver handle
400 * \return None
401 */
402 IFX_EXTERN void IfxGpt12_IncrEnc_update(IfxGpt12_IncrEnc *driver);
403
404 /** \} */
405
406 /******************************************************************************/
407 /*-------------------------Global Function Prototypes-------------------------*/
408 /******************************************************************************/
409
410 /** \brief Initializes the standard interface "Pos"
411 * \param stdif Standard interface position object
412 * \param driver incremental encoder interface Handle
413 * \return TRUE on success else FALSE
414 */
415 IFX_EXTERN boolean IfxGpt12_IncrEnc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver);
416
417 #endif /* IFXGPT12_INCRENC_H */
IfxGpt12_IncrEnc_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins. User handles separately.
Definition: IfxGpt12_IncrEnc.h:243
IfxGpt12_IncrEnc::positionConst
float32 positionConst
constant for calculating mechanical position (in rad) from raw position
Definition: IfxGpt12_IncrEnc.h:221
IfxGpt12_IncrEnc_getPosition
IFX_EXTERN float32 IfxGpt12_IncrEnc_getPosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:115
IfxGpt12_IncrEnc_Config::zeroIsrPriority
Ifx_Priority zeroIsrPriority
Interrupt isrPriority of the zero interrupt, if 0 the interrupt is disable.
Definition: IfxGpt12_IncrEnc.h:240
IfxGpt12_IncrEnc_Config::pinDriver
IfxPort_PadDriver pinDriver
Pad Driver.
Definition: IfxGpt12_IncrEnc.h:242
IfxGpt12_IncrEnc::speedModeThreshold
float32 speedModeThreshold
treshold used for speed calculation using pulse count mode or time diff mode in rad/s ...
Definition: IfxGpt12_IncrEnc.h:222
IfxGpt12_IncrEnc_Config::pinB
IfxGpt12_TxEud_In * pinB
Encoder B signal. Should be connecting to T2 or T3 TxEUD. See GPT12 pin map data. ...
Definition: IfxGpt12_IncrEnc.h:237
IfxGpt12_IncrEnc_Config::zeroIsrProvider
IfxSrc_Tos zeroIsrProvider
Interrupt service provider for the zero interrupt.
Definition: IfxGpt12_IncrEnc.h:241
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxGpt12_IncrEnc_Config
Configuration structure for GPT12.
Definition: IfxGpt12_IncrEnc.h:232
IfxGpt12_IncrEnc_setOffset
IFX_EXTERN void IfxGpt12_IncrEnc_setOffset(IfxGpt12_IncrEnc *driver, sint32 offset)
Definition: IfxGpt12_IncrEnc.c:351
IfxGpt12_TxEud_In
TxEUD pin mapping structure.
Definition: IfxGpt12_PinMap.h:64
IfxGpt12_IncrEnc_getRawPosition
IFX_EXTERN sint32 IfxGpt12_IncrEnc_getRawPosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:121
IfxGpt12_IncrEnc::rawPosition
sint32 rawPosition
raw position in ticks.
Definition: IfxGpt12_IncrEnc.h:211
float32
float float32
Definition: Platform_Types.h:170
IfxGpt12_IncrEnc_Config::base
IfxStdIf_Pos_Config base
Configuration data of Standard interface: Position interface.
Definition: IfxGpt12_IncrEnc.h:234
IfxGpt12_IncrEnc_setRefreshPeriod
IFX_EXTERN void IfxGpt12_IncrEnc_setRefreshPeriod(IfxGpt12_IncrEnc *driver, float32 updatePeriod)
Definition: IfxGpt12_IncrEnc.c:358
IfxGpt12_IncrEnc::status
IfxStdIf_Pos_Status status
error code (0 = no error)
Definition: IfxGpt12_IncrEnc.h:215
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxGpt12_IncrEnc
Incremental encoder object.
Definition: IfxGpt12_IncrEnc.h:209
IfxGpt12_IncrEnc_resetFaults
IFX_EXTERN void IfxGpt12_IncrEnc_resetFaults(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:342
IfxGpt12_IncrEnc::maxSpeed
float32 maxSpeed
Absolute maximal allowed speed. Above speed is recognized as error.
Definition: IfxGpt12_IncrEnc.h:226
IfxGpt12_IncrEnc_update
IFX_EXTERN void IfxGpt12_IncrEnc_update(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:400
IfxGpt12_IncrEnc::turn
sint32 turn
number of mechanical turns
Definition: IfxGpt12_IncrEnc.h:213
IfxGpt12_IncrEnc_getTurn
IFX_EXTERN sint32 IfxGpt12_IncrEnc_getTurn(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:152
IfxGpt12_IncrEnc_Update
IfxStdIf_Pos_Update IfxGpt12_IncrEnc_Update
Definition: IfxGpt12_IncrEnc.h:199
IfxGpt12_IncrEnc::direction
IfxStdIf_Pos_Dir direction
rotation direction
Definition: IfxGpt12_IncrEnc.h:214
IfxGpt12_IncrEnc_init
IFX_EXTERN boolean IfxGpt12_IncrEnc_init(IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
Initialises the Incremental interface.
Definition: IfxGpt12_IncrEnc.c:158
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStdIf_Pos.h
Standard interface: Position interface.
IfxGpt12_IncrEnc::speedConstTimeDiff
float32 speedConstTimeDiff
constant for calculating mechanical speed (in rad/s) from raw speed in time diff mode ...
Definition: IfxGpt12_IncrEnc.h:220
IfxGpt12.h
GPT12 basic functionality.
IfxGpt12_IncrEnc::speedModeThresholdTick
sint32 speedModeThresholdTick
treshold used for speed calculation using pulse count mode or time diff mode in ticks ...
Definition: IfxGpt12_IncrEnc.h:223
IfxGpt12_IncrEnc_getResolution
IFX_EXTERN sint32 IfxGpt12_IncrEnc_getResolution(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:133
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:92
IfxGpt12_IncrEnc_getSensorType
IFX_EXTERN IfxStdIf_Pos_SensorType IfxGpt12_IncrEnc_getSensorType(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:139
IfxStdIf_Pos_Config
Position interface configuration.
Definition: IfxStdIf_Pos.h:311
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:283
IfxGpt12_IncrEnc::update
IfxGpt12_IncrEnc_Update update
Update call back API.
Definition: IfxGpt12_IncrEnc.h:227
IfxGpt12_IncrEnc::speed
float32 speed
mechanical speed in rad/s
Definition: IfxGpt12_IncrEnc.h:212
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:81
IfxGpt12_IncrEnc::updatePeriod
float32 updatePeriod
update period in seconds
Definition: IfxGpt12_IncrEnc.h:218
IfxGpt12_IncrEnc_getSpeed
IFX_EXTERN float32 IfxGpt12_IncrEnc_getSpeed(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:146
IfxGpt12_IncrEnc_getOffset
IFX_EXTERN sint32 IfxGpt12_IncrEnc_getOffset(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:102
IfxGpt12_IncrEnc::resolution
sint32 resolution
resolution of this position sensor interface
Definition: IfxGpt12_IncrEnc.h:217
IfxGpt12_IncrEnc_Config::pinA
IfxGpt12_TxIn_In * pinA
Encoder A signal. Should be connecting to T2 or T3 TxIN. See GPT12 pin map data.
Definition: IfxGpt12_IncrEnc.h:236
IfxGpt12_IncrEnc_getDirection
IFX_EXTERN IfxStdIf_Pos_Dir IfxGpt12_IncrEnc_getDirection(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:90
IfxGpt12_TxIn_In
TxIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:73
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGpt12_IncrEnc_getPeriodPerRotation
IFX_EXTERN uint16 IfxGpt12_IncrEnc_getPeriodPerRotation(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:108
IfxGpt12_IncrEnc_onZeroIrq
IFX_EXTERN void IfxGpt12_IncrEnc_onZeroIrq(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:314
IfxGpt12_IncrEnc::module
Ifx_GPT12 * module
Pointer to the GPT12 module.
Definition: IfxGpt12_IncrEnc.h:224
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
sint32
long sint32
Definition: Platform_Types.h:134
IfxGpt12_IncrEnc_getFault
IFX_EXTERN IfxStdIf_Pos_Status IfxGpt12_IncrEnc_getFault(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:96
IfxStdIf_Pos_Update
void(* IfxStdIf_Pos_Update)(IfxStdIf_InterfaceDriver stdIf)
Refresh the status.
Definition: IfxStdIf_Pos.h:227
IfxGpt12_IncrEnc_stdIfPosInit
IFX_EXTERN boolean IfxGpt12_IncrEnc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver)
Initializes the standard interface "Pos".
Definition: IfxGpt12_IncrEnc.c:366
IfxGpt12_IncrEnc_getAbsolutePosition
IFX_EXTERN float32 IfxGpt12_IncrEnc_getAbsolutePosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:84
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:100
IfxGpt12_IncrEnc_getRefreshPeriod
IFX_EXTERN float32 IfxGpt12_IncrEnc_getRefreshPeriod(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:127
IfxGpt12_IncrEnc_Config::pinMode
IfxPort_InputMode pinMode
Pin mode for A, B and Z inputs.
Definition: IfxGpt12_IncrEnc.h:239
IfxGpt12_IncrEnc::minSpeed
float32 minSpeed
Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Definition: IfxGpt12_IncrEnc.h:225
IfxGpt12_IncrEnc_reset
IFX_EXTERN void IfxGpt12_IncrEnc_reset(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:332
IfxGpt12_IncrEnc_initConfig
IFX_EXTERN void IfxGpt12_IncrEnc_initConfig(IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
Initializes the configuration structure to default.
Definition: IfxGpt12_IncrEnc.c:293
IfxGpt12_IncrEnc_Config::pinZ
IfxGpt12_TxIn_In * pinZ
Encoder Z signal. Should be connecting to T4 TxIn for use with T3 and TxEUD (Ignore compiler type con...
Definition: IfxGpt12_IncrEnc.h:238
IfxGpt12_IncrEnc::offset
sint32 offset
raw position offset
Definition: IfxGpt12_IncrEnc.h:216
IfxGpt12_IncrEnc::speedConstPulseCount
float32 speedConstPulseCount
constant for calculating mechanical speed (in rad/s) from raw speed in pulse count mode ...
Definition: IfxGpt12_IncrEnc.h:219


iLLD_TC26B: IfxGpt12_PinMap.c Source File

  • _PinMap
IfxGpt12_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12_PinMap.c
3 * \brief GPT12 I/O map
4 * \ingroup IfxLld_Gpt12
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxGpt12_PinMap.h"
44
45 IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN = {&MODULE_GPT120, {&MODULE_P13, 2}, Ifx_RxSel_a};
46 IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 8}, Ifx_RxSel_a};
47 IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 6}, Ifx_RxSel_b};
48 IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 7}, Ifx_RxSel_a};
49 IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 7}, Ifx_RxSel_b};
50 IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN = {&MODULE_GPT120, 4, {&MODULE_P00, 9}, Ifx_RxSel_a};
51 IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN = {&MODULE_GPT120, 4, {&MODULE_P33, 5}, Ifx_RxSel_b};
52 IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 6}, Ifx_RxSel_a};
53 IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 1}, Ifx_RxSel_b};
54 IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 0}, Ifx_RxSel_a};
55 IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 0}, Ifx_RxSel_b};
56 IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 7}, Ifx_RxSel_a};
57 IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 7}, Ifx_RxSel_b};
58 IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 6}, Ifx_RxSel_a};
59 IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 4}, Ifx_RxSel_b};
60 IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN = {&MODULE_GPT120, 4, {&MODULE_P02, 8}, Ifx_RxSel_a};
61 IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN = {&MODULE_GPT120, 4, {&MODULE_P10, 8}, Ifx_RxSel_b};
62 IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 7}, Ifx_RxSel_a};
63 IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 3}, Ifx_RxSel_b};
64 IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 3}, Ifx_RxSel_a};
65 IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 2}, Ifx_RxSel_b};
66 IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt4};
67 IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt7};
68 IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT = {&MODULE_GPT120, 6, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt5};
69 IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT = {&MODULE_GPT120, 6, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt7};
70
71
72 const IfxGpt12_Capin_In *IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS] = {
73 {
74 &IfxGpt120_CAPINA_P13_2_IN
75 }
76 };
77
78 const IfxGpt12_TxEud_In *IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS] = {
79 {
80 {
81 NULL_PTR,
82 NULL_PTR
83 },
84 {
85 NULL_PTR,
86 NULL_PTR
87 },
88 {
89 &IfxGpt120_T2EUDA_P00_8_IN,
90 &IfxGpt120_T2EUDB_P33_6_IN
91 },
92 {
93 &IfxGpt120_T3EUDA_P02_7_IN,
94 &IfxGpt120_T3EUDB_P10_7_IN
95 },
96 {
97 &IfxGpt120_T4EUDA_P00_9_IN,
98 &IfxGpt120_T4EUDB_P33_5_IN
99 },
100 {
101 &IfxGpt120_T5EUDA_P21_6_IN,
102 &IfxGpt120_T5EUDB_P10_1_IN
103 },
104 {
105 &IfxGpt120_T6EUDA_P20_0_IN,
106 &IfxGpt120_T6EUDB_P10_0_IN
107 }
108 }
109 };
110
111 const IfxGpt12_TxIn_In *IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS] = {
112 {
113 {
114 NULL_PTR,
115 NULL_PTR
116 },
117 {
118 NULL_PTR,
119 NULL_PTR
120 },
121 {
122 &IfxGpt120_T2INA_P00_7_IN,
123 &IfxGpt120_T2INB_P33_7_IN
124 },
125 {
126 &IfxGpt120_T3INA_P02_6_IN,
127 &IfxGpt120_T3INB_P10_4_IN
128 },
129 {
130 &IfxGpt120_T4INA_P02_8_IN,
131 &IfxGpt120_T4INB_P10_8_IN
132 },
133 {
134 &IfxGpt120_T5INA_P21_7_IN,
135 &IfxGpt120_T5INB_P10_3_IN
136 },
137 {
138 &IfxGpt120_T6INA_P20_3_IN,
139 &IfxGpt120_T6INB_P10_2_IN
140 }
141 }
142 };
143
144 const IfxGpt12_TxOut_Out *IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS] = {
145 {
146 {
147 NULL_PTR,
148 NULL_PTR
149 },
150 {
151 NULL_PTR,
152 NULL_PTR
153 },
154 {
155 NULL_PTR,
156 NULL_PTR
157 },
158 {
159 &IfxGpt120_T3OUT_P10_6_OUT,
160 &IfxGpt120_T3OUT_P21_6_OUT
161 },
162 {
163 NULL_PTR,
164 NULL_PTR
165 },
166 {
167 NULL_PTR,
168 NULL_PTR
169 },
170 {
171 &IfxGpt120_T6OUT_P10_5_OUT,
172 &IfxGpt120_T6OUT_P21_7_OUT
173 }
174 }
175 };
IfxGpt12_Capin_In_pinTable
const IfxGpt12_Capin_In * IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
Definition: IfxGpt12_PinMap.c:72
IfxGpt120_T6OUT_P21_7_OUT
IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT
Definition: IfxGpt12_PinMap.c:69
IfxGpt120_T6EUDA_P20_0_IN
IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN
Definition: IfxGpt12_PinMap.c:54
IfxGpt120_T3EUDB_P10_7_IN
IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN
Definition: IfxGpt12_PinMap.c:49
IFXGPT12_PINMAP_NUM_TIMERS
#define IFXGPT12_PINMAP_NUM_TIMERS
Definition: IfxGpt12_PinMap.h:118
IfxGpt12_TxEud_In
TxEUD pin mapping structure.
Definition: IfxGpt12_PinMap.h:64
IfxGpt120_T5EUDA_P21_6_IN
IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN
Definition: IfxGpt12_PinMap.c:52
IfxGpt120_T3EUDA_P02_7_IN
IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN
Definition: IfxGpt12_PinMap.c:48
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxGpt120_T3OUT_P21_6_OUT
IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT
Definition: IfxGpt12_PinMap.c:67
IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:120
IfxGpt120_T5EUDB_P10_1_IN
IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN
Definition: IfxGpt12_PinMap.c:53
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxGpt120_T4EUDB_P33_5_IN
IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN
Definition: IfxGpt12_PinMap.c:51
IfxGpt12_PinMap.h
GPT12 I/O map.
IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS
#define IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:122
IfxGpt120_T6EUDB_P10_0_IN
IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN
Definition: IfxGpt12_PinMap.c:55
IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:119
IfxGpt120_T2EUDA_P00_8_IN
IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN
Definition: IfxGpt12_PinMap.c:46
IfxGpt120_T4INB_P10_8_IN
IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN
Definition: IfxGpt12_PinMap.c:61
IfxGpt12_TxOut_Out
TxOUT pin mapping structure.
Definition: IfxGpt12_PinMap.h:82
IfxGpt120_T2INB_P33_7_IN
IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN
Definition: IfxGpt12_PinMap.c:57
IfxGpt120_T3INA_P02_6_IN
IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN
Definition: IfxGpt12_PinMap.c:58
IfxGpt120_T6INA_P20_3_IN
IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN
Definition: IfxGpt12_PinMap.c:64
IfxGpt120_CAPINA_P13_2_IN
IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN
Definition: IfxGpt12_PinMap.c:45
IfxGpt12_TxIn_In_pinTable
const IfxGpt12_TxIn_In * IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]
Definition: IfxGpt12_PinMap.c:111
IfxGpt120_T5INA_P21_7_IN
IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN
Definition: IfxGpt12_PinMap.c:62
IFXGPT12_PINMAP_NUM_MODULES
#define IFXGPT12_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxGpt12_PinMap.h:117
IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:121
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:123
IfxGpt12_TxIn_In
TxIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:73
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:126
IfxGpt120_T4EUDA_P00_9_IN
IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN
Definition: IfxGpt12_PinMap.c:50
IfxGpt120_T2EUDB_P33_6_IN
IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN
Definition: IfxGpt12_PinMap.c:47
IfxGpt120_T6OUT_P10_5_OUT
IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT
Definition: IfxGpt12_PinMap.c:68
IfxGpt120_T3INB_P10_4_IN
IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN
Definition: IfxGpt12_PinMap.c:59
IfxGpt120_T2INA_P00_7_IN
IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN
Definition: IfxGpt12_PinMap.c:56
IfxGpt12_TxEud_In_pinTable
const IfxGpt12_TxEud_In * IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]
Definition: IfxGpt12_PinMap.c:78
IfxGpt120_T3OUT_P10_6_OUT
IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT
Definition: IfxGpt12_PinMap.c:66
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:124
IfxGpt120_T5INB_P10_3_IN
IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN
Definition: IfxGpt12_PinMap.c:63
IfxGpt12_TxOut_Out_pinTable
const IfxGpt12_TxOut_Out * IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]
Definition: IfxGpt12_PinMap.c:144
IfxGpt120_T6INB_P10_2_IN
IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN
Definition: IfxGpt12_PinMap.c:65
IfxGpt120_T4INA_P02_8_IN
IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN
Definition: IfxGpt12_PinMap.c:60
IfxGpt12_Capin_In
CAPIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:56


iLLD_TC26B: IfxGpt12_PinMap.h Source File

  • _PinMap
IfxGpt12_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12_PinMap.h
3 * \brief GPT12 I/O map
4 * \ingroup IfxLld_Gpt12
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gpt12_pinmap GPT12 Pin Mapping
42 * \ingroup IfxLld_Gpt12
43 */
44
45 #ifndef IFXGPT12_PINMAP_H
46 #define IFXGPT12_PINMAP_H
47
48 #include <IfxGpt12_reg.h>
49 #include <_Impl/IfxGpt12_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Gpt12_pinmap
53 * \{ */
54
55 /** \brief CAPIN pin mapping structure */
56 typedef const struct
57 {
58 Ifx_GPT12* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel select; /**< \brief Input multiplexer value */
61 } IfxGpt12_Capin_In;
62
63 /** \brief TxEUD pin mapping structure */
64 typedef const struct
65 {
66 Ifx_GPT12* module; /**< \brief Base address */
67 uint8 timer; /**< \brief Timer number */
68 IfxPort_Pin pin; /**< \brief Port pin */
69 Ifx_RxSel select; /**< \brief Input multiplexer value */
70 } IfxGpt12_TxEud_In;
71
72 /** \brief TxIN pin mapping structure */
73 typedef const struct
74 {
75 Ifx_GPT12* module; /**< \brief Base address */
76 uint8 timer; /**< \brief Timer number */
77 IfxPort_Pin pin; /**< \brief Port pin */
78 Ifx_RxSel select; /**< \brief Input multiplexer value */
79 } IfxGpt12_TxIn_In;
80
81 /** \brief TxOUT pin mapping structure */
82 typedef const struct
83 {
84 Ifx_GPT12* module; /**< \brief Base address */
85 uint8 timer; /**< \brief Timer number */
86 IfxPort_Pin pin; /**< \brief Port pin */
87 IfxPort_OutputIdx select; /**< \brief Port control code */
88 } IfxGpt12_TxOut_Out;
89
90 IFX_EXTERN IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN; /**< \brief GPT120_CAPINA: GPT120 input */
91 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN; /**< \brief GPT120_T2EUDA: GPT120 input */
92 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN; /**< \brief GPT120_T2EUDB: GPT120 input */
93 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN; /**< \brief GPT120_T3EUDA: GPT120 input */
94 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN; /**< \brief GPT120_T3EUDB: GPT120 input */
95 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN; /**< \brief GPT120_T4EUDA: GPT120 input */
96 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN; /**< \brief GPT120_T4EUDB: GPT120 input */
97 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN; /**< \brief GPT120_T5EUDA: GPT120 input */
98 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN; /**< \brief GPT120_T5EUDB: GPT120 input */
99 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN; /**< \brief GPT120_T6EUDA: GPT120 input */
100 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN; /**< \brief GPT120_T6EUDB: GPT120 input */
101 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN; /**< \brief GPT120_T2INA: GPT120 input */
102 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN; /**< \brief GPT120_T2INB: GPT120 input */
103 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN; /**< \brief GPT120_T3INA: GPT120 input */
104 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN; /**< \brief GPT120_T3INB: GPT120 input */
105 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN; /**< \brief GPT120_T4INA: GPT120 input */
106 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN; /**< \brief GPT120_T4INB: GPT120 input */
107 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN; /**< \brief GPT120_T5INA: GPT120 input */
108 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN; /**< \brief GPT120_T5INB: GPT120 input */
109 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN; /**< \brief GPT120_T6INA: GPT120 input */
110 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN; /**< \brief GPT120_T6INB: GPT120 input */
111 IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT; /**< \brief GPT120_T3OUT: GPT120 output */
112 IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT; /**< \brief GPT120_T3OUT: GPT120 output */
113 IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT; /**< \brief GPT120_T6OUT: GPT120 output */
114 IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT; /**< \brief GPT120_T6OUT: GPT120 output */
115
116 /** \brief Table dimensions */
117 #define IFXGPT12_PINMAP_NUM_MODULES 1
118 #define IFXGPT12_PINMAP_NUM_TIMERS 7
119 #define IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS 1
120 #define IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS 2
121 #define IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS 2
122 #define IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS 2
123
124
125 /** \brief IfxGpt12_Capin_In table */
126 IFX_EXTERN const IfxGpt12_Capin_In *IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS];
127
128 /** \brief IfxGpt12_TxEud_In table */
129 IFX_EXTERN const IfxGpt12_TxEud_In *IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS];
130
131 /** \brief IfxGpt12_TxIn_In table */
132 IFX_EXTERN const IfxGpt12_TxIn_In *IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS];
133
134 /** \brief IfxGpt12_TxOut_Out table */
135 IFX_EXTERN const IfxGpt12_TxOut_Out *IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS];
136
137 /** \} */
138
139 #endif /* IFXGPT12_PINMAP_H */
IfxGpt120_T3OUT_P21_6_OUT
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT
GPT120_T3OUT: GPT120 output.
Definition: IfxGpt12_PinMap.h:112
IfxGpt12_Capin_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxGpt12_PinMap.h:60
IfxGpt120_T6EUDB_P10_0_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN
GPT120_T6EUDB: GPT120 input.
Definition: IfxGpt12_PinMap.h:100
IfxGpt120_T6EUDA_P20_0_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN
GPT120_T6EUDA: GPT120 input.
Definition: IfxGpt12_PinMap.h:99
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IFXGPT12_PINMAP_NUM_TIMERS
#define IFXGPT12_PINMAP_NUM_TIMERS
Definition: IfxGpt12_PinMap.h:118
IfxGpt12_TxEud_In
TxEUD pin mapping structure.
Definition: IfxGpt12_PinMap.h:64
IfxGpt120_T4INB_P10_8_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN
GPT120_T4INB: GPT120 input.
Definition: IfxGpt12_PinMap.h:106
IfxGpt120_T5EUDA_P21_6_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN
GPT120_T5EUDA: GPT120 input.
Definition: IfxGpt12_PinMap.h:97
IfxGpt120_T3EUDB_P10_7_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN
GPT120_T3EUDB: GPT120 input.
Definition: IfxGpt12_PinMap.h:94
IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:120
IfxGpt120_T5INB_P10_3_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN
GPT120_T5INB: GPT120 input.
Definition: IfxGpt12_PinMap.h:108
IfxGpt120_T3OUT_P10_6_OUT
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT
GPT120_T3OUT: GPT120 output.
Definition: IfxGpt12_PinMap.h:111
IfxGpt120_T5EUDB_P10_1_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN
GPT120_T5EUDB: GPT120 input.
Definition: IfxGpt12_PinMap.h:98
IfxGpt12_Capin_In_pinTable
IFX_EXTERN const IfxGpt12_Capin_In * IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
IfxGpt12_Capin_In table.
Definition: IfxGpt12_PinMap.h:126
IfxGpt12_TxOut_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxGpt12_PinMap.h:87
IfxGpt120_T2EUDB_P33_6_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN
GPT120_T2EUDB: GPT120 input.
Definition: IfxGpt12_PinMap.h:92
IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS
#define IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:122
IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:119
IfxGpt120_T3INA_P02_6_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN
GPT120_T3INA: GPT120 input.
Definition: IfxGpt12_PinMap.h:103
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGpt120_T3EUDA_P02_7_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN
GPT120_T3EUDA: GPT120 input.
Definition: IfxGpt12_PinMap.h:93
IfxGpt120_T4EUDB_P33_5_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN
GPT120_T4EUDB: GPT120 input.
Definition: IfxGpt12_PinMap.h:96
IfxGpt12_TxEud_In::timer
uint8 timer
Timer number.
Definition: IfxGpt12_PinMap.h:67
IfxGpt12_TxOut_Out
TxOUT pin mapping structure.
Definition: IfxGpt12_PinMap.h:82
IfxGpt12_TxEud_In_pinTable
IFX_EXTERN const IfxGpt12_TxEud_In * IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]
IfxGpt12_TxEud_In table.
Definition: IfxGpt12_PinMap.h:129
IfxGpt120_CAPINA_P13_2_IN
IFX_EXTERN IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN
GPT120_CAPINA: GPT120 input.
Definition: IfxGpt12_PinMap.h:90
IfxGpt120_T4INA_P02_8_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN
GPT120_T4INA: GPT120 input.
Definition: IfxGpt12_PinMap.h:105
IfxGpt120_T2INA_P00_7_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN
GPT120_T2INA: GPT120 input.
Definition: IfxGpt12_PinMap.h:101
IfxGpt12_TxOut_Out_pinTable
IFX_EXTERN const IfxGpt12_TxOut_Out * IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]
IfxGpt12_TxOut_Out table.
Definition: IfxGpt12_PinMap.h:135
IFXGPT12_PINMAP_NUM_MODULES
#define IFXGPT12_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxGpt12_PinMap.h:117
IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:121
IfxGpt120_T6OUT_P10_5_OUT
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT
GPT120_T6OUT: GPT120 output.
Definition: IfxGpt12_PinMap.h:113
IfxGpt120_T3INB_P10_4_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN
GPT120_T3INB: GPT120 input.
Definition: IfxGpt12_PinMap.h:104
IfxGpt12_TxIn_In
TxIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:73
IfxGpt120_T6OUT_P21_7_OUT
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT
GPT120_T6OUT: GPT120 output.
Definition: IfxGpt12_PinMap.h:114
IfxGpt120_T6INA_P20_3_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN
GPT120_T6INA: GPT120 input.
Definition: IfxGpt12_PinMap.h:109
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxGpt12_TxIn_In_pinTable
IFX_EXTERN const IfxGpt12_TxIn_In * IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]
IfxGpt12_TxIn_In table.
Definition: IfxGpt12_PinMap.h:132
IfxGpt120_T5INA_P21_7_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN
GPT120_T5INA: GPT120 input.
Definition: IfxGpt12_PinMap.h:107
IfxGpt12_Capin_In::module
Ifx_GPT12 * module
Base address.
Definition: IfxGpt12_PinMap.h:58
IfxGpt120_T6INB_P10_2_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN
GPT120_T6INB: GPT120 input.
Definition: IfxGpt12_PinMap.h:110
IfxGpt12_cfg.h
GPT12 on-chip implementation data.
IfxGpt12_Capin_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGpt12_PinMap.h:59
IfxGpt120_T4EUDA_P00_9_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN
GPT120_T4EUDA: GPT120 input.
Definition: IfxGpt12_PinMap.h:95
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGpt120_T2INB_P33_7_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN
GPT120_T2INB: GPT120 input.
Definition: IfxGpt12_PinMap.h:102
IfxGpt120_T2EUDA_P00_8_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN
GPT120_T2EUDA: GPT120 input.
Definition: IfxGpt12_PinMap.h:91
IfxGpt12_Capin_In
CAPIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:56
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxGpt12_cfg.h Source File

  • _Impl
IfxGpt12_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12_cfg.h
3 * \brief GPT12 on-chip implementation data
4 * \ingroup IfxLld_Gpt12
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gpt12 GPT12
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Gpt12_Impl Implementation
44 * \ingroup IfxLld_Gpt12
45 * \defgroup IfxLld_Gpt12_Std Standard Driver
46 * \ingroup IfxLld_Gpt12
47 */
48
49 #ifndef IFXGPT12_CFG_H
50 #define IFXGPT12_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 /******************************************************************************/
57 /*-----------------------------------Macros-----------------------------------*/
58 /******************************************************************************/
59
60 #define IFXGPT12_NUM_MODULES (1)
61
62 #endif /* IFXGPT12_CFG_H */


iLLD_TC26B: IfxGtm.c Source File

  • Gtm
  • Std
IfxGtm.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm.h"
47 #include "Scu/Std/IfxScuWdt.h"
48 #include "Scu/Std/IfxScuCcu.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxGtm_disable(Ifx_GTM *gtm)
55 {
56 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
57
58 IfxScuWdt_clearCpuEndinit(psw);
59 gtm->CLC.B.DISR = 1;
60 IfxScuWdt_setCpuEndinit(psw);
61 }
62
63
64 void IfxGtm_enable(Ifx_GTM *gtm)
65 {
66 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
67
68 IfxScuWdt_clearCpuEndinit(psw);
69 gtm->CLC.B.DISR = 0;
70 IfxScuWdt_setCpuEndinit(psw);
71 }
72
73
74 float32 IfxGtm_getSysClkFrequency(void)
75 {
76 return IfxScuCcu_getGtmFrequency();
77 }
float32
float float32
Definition: Platform_Types.h:170
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxScuWdt.h
SCU basic functionality.
IfxGtm_disable
void IfxGtm_disable(Ifx_GTM *gtm)
Disables the module.
Definition: IfxGtm.c:54
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxGtm_getSysClkFrequency
float32 IfxGtm_getSysClkFrequency(void)
returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK...
Definition: IfxGtm.c:74
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuCcu.h
SCU basic functionality.
IfxGtm_enable
void IfxGtm_enable(Ifx_GTM *gtm)
Enables the module.
Definition: IfxGtm.c:64
IfxScuCcu_getGtmFrequency
IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void)
API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register an...
Definition: IfxScuCcu.h:1088
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxGtm.h
GTM basic functionality.


iLLD_TC26B: IfxGtm.h Source File

  • Gtm
  • Std
IfxGtm.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Std_Basic_Functions Basic Functions
42 * \ingroup IfxLld_Gtm_Std
43 * \defgroup IfxLld_Gtm_Std_Enumerations Enumerations
44 * \ingroup IfxLld_Gtm_Std
45 */
46
47 #ifndef IFXGTM_H
48 #define IFXGTM_H 1
49
50 /******************************************************************************/
51 /*----------------------------------Includes----------------------------------*/
52 /******************************************************************************/
53
54 #include "_Impl/IfxGtm_cfg.h"
55
56 /******************************************************************************/
57 /*--------------------------------Enumerations--------------------------------*/
58 /******************************************************************************/
59
60 /** \addtogroup IfxLld_Gtm_Std_Enumerations
61 * \{ */
62 /** \brief Enum for GTM interrupt modes
63 */
64 typedef enum
65 {
66 IfxGtm_IrqMode_level = 0,
67 IfxGtm_IrqMode_pulse = 1,
68 IfxGtm_IrqMode_pulseNotify = 2,
69 IfxGtm_IrqMode_singlePulse = 3
70 } IfxGtm_IrqMode;
71
72 /** \brief OCDS Suspend Control (OCDS.SUS)
73 */
74 typedef enum
75 {
76 IfxGtm_SuspendMode_none = 0, /**< \brief No suspend */
77 IfxGtm_SuspendMode_hard = 1, /**< \brief Hard Suspend */
78 IfxGtm_SuspendMode_soft = 2 /**< \brief Soft Suspend */
79 } IfxGtm_SuspendMode;
80
81 /** \} */
82
83 /** \addtogroup IfxLld_Gtm_Std_Basic_Functions
84 * \{ */
85
86 /******************************************************************************/
87 /*-------------------------Inline Function Prototypes-------------------------*/
88 /******************************************************************************/
89
90 /** \brief Returs the status of module enabled or disabled
91 * \param gtm Pointer to GTM module
92 * \return status: TRUE/FALSE
93 */
94 IFX_INLINE boolean IfxGtm_isEnabled(Ifx_GTM *gtm);
95
96 /** \brief Returns the module's suspend state.
97 * TRUE :if module is suspended.
98 * FALSE:if module is not yet suspended.
99 * \param gtm Pointer to GTM module registers
100 * \return Suspend status (TRUE / FALSE)
101 */
102 IFX_INLINE boolean IfxGtm_isModuleSuspended(Ifx_GTM *gtm);
103
104 /** \brief Configure the Module to Hard/Soft suspend mode.
105 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
106 * \param gtm Pointer to GTM module registers
107 * \param mode Module suspend mode
108 * \return None
109 */
110 IFX_INLINE void IfxGtm_setSuspendMode(Ifx_GTM *gtm, IfxGtm_SuspendMode mode);
111
112 /******************************************************************************/
113 /*-------------------------Global Function Prototypes-------------------------*/
114 /******************************************************************************/
115
116 /** \brief Disables the module
117 * \param gtm Pointer to GTM module
118 * \return None
119 */
120 IFX_EXTERN void IfxGtm_disable(Ifx_GTM *gtm);
121
122 /** \brief Enables the module
123 * \param gtm Pointer to GTM module
124 * \return None
125 */
126 IFX_EXTERN void IfxGtm_enable(Ifx_GTM *gtm);
127
128 /** \} */
129
130 /******************************************************************************/
131 /*-------------------------Global Function Prototypes-------------------------*/
132 /******************************************************************************/
133
134 /** \brief returns the GTM SYSCLK frequency.
135 * Refer to the Clock distribution for details on GTM SYS CLK.
136 * \return sysFreq
137 */
138 IFX_EXTERN float32 IfxGtm_getSysClkFrequency(void);
139
140 /******************************************************************************/
141 /*---------------------Inline Function Implementations------------------------*/
142 /******************************************************************************/
143
144 IFX_INLINE boolean IfxGtm_isEnabled(Ifx_GTM *gtm)
145 {
146 return gtm->CLC.B.DISS == 0;
147 }
148
149
150 IFX_INLINE boolean IfxGtm_isModuleSuspended(Ifx_GTM *gtm)
151 {
152 Ifx_GTM_OCS ocs;
153
154 // read the status
155 ocs.U = gtm->OCS.U;
156
157 // return the status
158 return ocs.B.SUSSTA;
159 }
160
161
162 IFX_INLINE void IfxGtm_setSuspendMode(Ifx_GTM *gtm, IfxGtm_SuspendMode mode)
163 {
164 Ifx_GTM_OCS ocs;
165
166 // remove protection and configure the suspend mode.
167 ocs.B.SUS_P = 1;
168 ocs.B.SUS = mode;
169
170 gtm->OCS.U = ocs.U;
171 }
172
173
174 #endif /* IFXGTM_H */
IfxGtm_IrqMode_level
Definition: IfxGtm.h:66
IfxGtm_IrqMode_pulse
Definition: IfxGtm.h:67
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_isModuleSuspended
IFX_INLINE boolean IfxGtm_isModuleSuspended(Ifx_GTM *gtm)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxGtm.h:150
IfxGtm_isEnabled
IFX_INLINE boolean IfxGtm_isEnabled(Ifx_GTM *gtm)
Returs the status of module enabled or disabled.
Definition: IfxGtm.h:144
IfxGtm_disable
IFX_EXTERN void IfxGtm_disable(Ifx_GTM *gtm)
Disables the module.
Definition: IfxGtm.c:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_SuspendMode_soft
Soft Suspend.
Definition: IfxGtm.h:78
IfxGtm_setSuspendMode
IFX_INLINE void IfxGtm_setSuspendMode(Ifx_GTM *gtm, IfxGtm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxGtm.h:162
IfxGtm_SuspendMode_none
No suspend.
Definition: IfxGtm.h:76
IfxGtm_getSysClkFrequency
IFX_EXTERN float32 IfxGtm_getSysClkFrequency(void)
returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK...
Definition: IfxGtm.c:74
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:68
IfxGtm_SuspendMode
IfxGtm_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxGtm.h:74
IfxGtm_SuspendMode_hard
Hard Suspend.
Definition: IfxGtm.h:77
IfxGtm_enable
IFX_EXTERN void IfxGtm_enable(Ifx_GTM *gtm)
Enables the module.
Definition: IfxGtm.c:64
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_IrqMode_singlePulse
Definition: IfxGtm.h:69
IfxGtm_cfg.h
GTM on-chip implementation data.


iLLD_TC26B: IfxGtm_Atom.c Source File

  • Gtm
  • Std
IfxGtm_Atom.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Atom.h"
47 #include "IfxGtm_bf.h"
48
49 /******************************************************************************/
50 /*----------------------------------Macros------------------------------------*/
51 /******************************************************************************/
52
53 /** \brief Number of channels per ATOM AGC
54 */
55 #define IFXGTM_ATOM_NUM_AGC_CHANNELS (8)
56
57 /******************************************************************************/
58 /*-------------------------Function Implementations---------------------------*/
59 /******************************************************************************/
60
61 uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
62 {
63 uint8 i;
64 uint32 reg = 0;
65 uint32 mask = enableMask | (disableMask << 16);
66
67 for (i = 0; i < IFXGTM_ATOM_NUM_AGC_CHANNELS; i++)
68 {
69 /* Bitfield length is 2 bits */
70 uint8 shift = (i * 2) + bitfieldOffset;
71
72 if (mask & 0x1)
73 {
74 reg |= IfxGtm_FeatureControl_enable << shift;
75 }
76
77 if (mask & 0x10000)
78 {
79 reg |= IfxGtm_FeatureControl_disable << shift;
80 }
81
82 mask = mask >> 1;
83 }
84
85 return reg;
86 }
87
88
89 uint32 IfxGtm_Atom_Agc_buildFeatureForChannel(IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
90 {
91 uint32 reg = 0;
92
93 /* Bitfield length is 2 bits */
94 uint8 shift = (((uint8)channel % 8) * 2) + bitfieldOffset;
95
96 if (enabled == 1)
97 {
98 reg = IfxGtm_FeatureControl_enable << shift;
99 }
100 else
101 {
102 reg = IfxGtm_FeatureControl_disable << shift;
103 }
104
105 return reg;
106 }
107
108
109 void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
110 {
111 uint32 value;
112
113 value = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_ENDIS_CTRL_ENDIS_CTRL0_OFF);
114
115 if (immediate)
116 {
117 agc->ENDIS_CTRL.U = value;
118 agc->ENDIS_STAT.U = value;
119 }
120 else
121 {
122 agc->ENDIS_CTRL.U = value;
123 }
124 }
125
126
127 void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
128 {
129 uint32 value;
130
131 value = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_OUTEN_CTRL_OUTEN_CTRL0_OFF);
132
133 if (immediate)
134 {
135 agc->OUTEN_CTRL.U = value;
136 agc->OUTEN_STAT.U = value;
137 }
138 else
139 {
140 agc->OUTEN_CTRL.U = value;
141 }
142 }
143
144
145 void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
146 {
147 agc->GLB_CTRL.U = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
148 }
149
150
151 void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
152 {
153 uint32 value;
154
155 value = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_ENDIS_CTRL_ENDIS_CTRL0_OFF);
156
157 if (immediate)
158 {
159 agc->ENDIS_CTRL.U = value;
160 agc->ENDIS_STAT.U = value;
161 }
162 else
163 {
164 agc->ENDIS_CTRL.U = value;
165 }
166 }
167
168
169 void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
170 {
171 uint32 value;
172
173 value = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_OUTEN_CTRL_OUTEN_CTRL0_OFF);
174
175 if (immediate)
176 {
177 agc->OUTEN_CTRL.U = value;
178 agc->OUTEN_STAT.U = value;
179 }
180 else
181 {
182 agc->OUTEN_CTRL.U = value;
183 }
184 }
185
186
187 void IfxGtm_Atom_Agc_enableChannelsTrigger(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
188 {
189 agc->INT_TRIG.U = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_INT_TRIG_INT_TRIG0_OFF);
190 }
191
192
193 void IfxGtm_Atom_Agc_enableChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
194 {
195 agc->GLB_CTRL.U = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
196 }
197
198
199 void IfxGtm_Atom_Agc_enableTimeTrigger(Ifx_GTM_ATOM_AGC *agc, boolean enabled)
200 {
201 agc->ACT_TB.B.TB_TRIG = enabled ? 1 : 0;
202 }
203
204
205 void IfxGtm_Atom_Agc_resetChannels(Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
206 {
207 uint8 i;
208 uint32 reg = 0;
209
210 for (i = 0; i < IFXGTM_ATOM_NUM_AGC_CHANNELS; i++)
211 {
212 if (resetMask & 0x1)
213 {
214 reg |= 1 << i;
215 }
216
217 resetMask = resetMask >> 1;
218 }
219
220 agc->GLB_CTRL.U = reg << IFX_GTM_ATOM_AGC_GLB_CTRL_RST_CH0_OFF;
221 }
222
223
224 void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
225 {
226 uint32 regEnable, regReset;
227
228 regEnable = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_FUPD_CTRL_FUPD_CTRL0_OFF);
229 regReset = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, resetEnabled, IFX_GTM_ATOM_AGC_FUPD_CTRL_RSTCN0_CH0_OFF);
230
231 agc->FUPD_CTRL.U = regEnable | (regReset << 16);
232 }
233
234
235 void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
236 {
237 uint32 regEnable, regReset;
238
239 regEnable = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_FUPD_CTRL_FUPD_CTRL0_OFF);
240 regReset = IfxGtm_Atom_Agc_buildFeature(resetEnableMask, resetDisableMask, IFX_GTM_ATOM_AGC_FUPD_CTRL_RSTCN0_CH0_OFF);
241 agc->FUPD_CTRL.U = regEnable | regReset;
242 }
243
244
245 void IfxGtm_Atom_Agc_setTimeTrigger(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
246 {
247 Ifx_GTM_ATOM_AGC_ACT_TB act_tb;
248
249 act_tb.U = agc->ACT_TB.U;
250 act_tb.B.TBU_SEL = base;
251 act_tb.B.ACT_TB = value;
252 agc->ACT_TB.U = act_tb.U;
253 }
254
255
256 void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
257 {
258 agc->GLB_CTRL.U = 1 << IFX_GTM_ATOM_AGC_GLB_CTRL_HOST_TRIG_OFF;
259 }
260
261
262 void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
263 {
264 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
265
266 atomCh->IRQ_NOTIFY.B.CCU1TC = 1;
267 }
268
269
270 void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
271 {
272 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
273
274 atomCh->IRQ_NOTIFY.B.CCU0TC = 1;
275 }
276
277
278 void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
279 {
280 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
281 Ifx_GTM_ATOM_CH_CTRL ctrl;
282
283 ctrl.U = 0;
284 ctrl.B.MODE = IfxGtm_Atom_Mode_outputPwm;
285
286 ctrl.B.CLK_SRC = clock;
287
288 ctrl.B.RST_CCU0 = resetEvent;
289 ctrl.B.SL = (activeState == Ifx_ActiveState_high ? 1 : 0);
290 ctrl.B.TRIGOUT = trigger;
291
292 atomCh->CTRL.U = ctrl.U;
293 }
294
295
296 float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
297 {
298 IfxGtm_Cmu_Clk clock;
299
300 clock = IfxGtm_Atom_Ch_getClockSource(atom, channel);
301
302 return IfxGtm_Cmu_getClkFrequency(gtm, clock, TRUE);
303 }
304
305
306 IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
307 {
308 IfxGtm_Cmu_Clk clock;
309 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
310 clock = (IfxGtm_Cmu_Clk)atomCh->CTRL.B.CLK_SRC;
311
312 return clock;
313 }
314
315
316 uint32 IfxGtm_Atom_Ch_getCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
317 {
318 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
319
320 return atomCh->CM1.U;
321 }
322
323
324 volatile uint32 *IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
325 {
326 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
327
328 return (volatile uint32 *)&atomCh->CM1;
329 }
330
331
332 uint32 IfxGtm_Atom_Ch_getCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
333 {
334 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
335
336 return atomCh->CM0.U;
337 }
338
339
340 volatile uint32 *IfxGtm_Atom_Ch_getCompareZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
341 {
342 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
343
344 return (volatile uint32 *)&atomCh->CM0;
345 }
346
347
348 boolean IfxGtm_Atom_Ch_getOutputLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
349 {
350 boolean result;
351 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
352
353 result = atomCh->STAT.B.OL == 1;
354
355 return result;
356 }
357
358
359 volatile Ifx_SRC_SRCR *IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
360 {
361 IFX_UNUSED_PARAMETER(gtm)
362 return &MODULE_SRC.GTM.GTM[0].ATOM[atom][channel / 2];
363 }
364
365
366 volatile uint32 *IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
367 {
368 return (volatile uint32 *)((uint32)&(atom->CH0.CN0.U) + channel * (offsetof(Ifx_GTM_ATOM, CH1) - offsetof(Ifx_GTM_ATOM, CH0)));
369 }
370
371
372 boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
373 {
374 boolean result;
375 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
376 result = atomCh->IRQ_NOTIFY.B.CCU1TC != 0;
377 return result;
378 }
379
380
381 boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
382 {
383 boolean result;
384 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
385 result = atomCh->IRQ_NOTIFY.B.CCU0TC != 0;
386 return result;
387 }
388
389
390 void IfxGtm_Atom_Ch_raiseInterruptOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
391 {
392 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
393
394 atomCh->IRQ_FORCINT.B.TRG_CCU1TC = 1;
395 }
396
397
398 void IfxGtm_Atom_Ch_raiseInterruptZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
399 {
400 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
401
402 atomCh->IRQ_FORCINT.B.TRG_CCU0TC = 1;
403 }
404
405
406 void IfxGtm_Atom_Ch_setClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
407 {
408 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
409
410 atomCh->CTRL.B.CLK_SRC = clock;
411 }
412
413
414 void IfxGtm_Atom_Ch_setCompare(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
415 {
416 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
417
418 atomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
419 atomCh->CM1.U = compareOne;
420 }
421
422
423 void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
424 {
425 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
426
427 atomCh->CM1.U = compareOne; // TK: replaced .B access to optimize runtime
428 }
429
430
431 void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
432 {
433 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
434
435 atomCh->SR1.U = shadowOne; // TK: replaced .B access to optimize runtime
436 }
437
438
439 void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
440 {
441 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
442
443 atomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
444 }
445
446
447 void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
448 {
449 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
450
451 atomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
452 }
453
454
455 void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
456 {
457 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
458
459 atomCh->CN0.U = value; // TK: replaced .B access to optimize runtime
460 }
461
462
463 void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
464 {
465 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
466
467 atomCh->CTRL.B.MODE = mode;
468 }
469
470
471 void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
472 {
473 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
474
475 Ifx_GTM_ATOM_CH_IRQ_EN en;
476 en.U = atomCh->IRQ_EN.U;
477
478 /* Disable all interrupts of the interrupt set to change mode */
479 atomCh->IRQ_EN.U = IFX_ZEROS;
480 atomCh->IRQ_MODE.B.IRQ_MODE = mode;
481 atomCh->IRQ_EN.U = en.U; /* Set the values back */
482
483 en.B.CCU0TC_IRQ_EN = interruptOnCompareZero ? 1 : 0;
484 en.B.CCU1TC_IRQ_EN = interruptOnCompareOne ? 1 : 0;
485 atomCh->IRQ_EN.U = en.U;
486 }
487
488
489 void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
490 {
491 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
492
493 atomCh->CTRL.B.OSM = enabled ? 1 : 0;
494 }
495
496
497 void IfxGtm_Atom_Ch_setResetSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
498 {
499 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
500
501 atomCh->CTRL.B.RST_CCU0 = event;
502 }
503
504
505 void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
506 {
507 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
508
509 atomCh->CTRL.B.SL = activeState == Ifx_ActiveState_high ? 1 : 0;
510 }
511
512
513 void IfxGtm_Atom_Ch_setTriggerOutput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
514 {
515 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
516
517 atomCh->CTRL.B.TRIGOUT = trigger;
518 }
519
520
521 void IfxGtm_Atom_Ch_setAruInput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
522 {
523 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
524
525 atomCh->CTRL.B.ARU_EN = enabled;
526 }
527
528
529 uint32 IfxGtm_Atom_Ch_getCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
530 {
531 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
532
533 return atomCh->CN0.U;
534 }
535
536
537 void IfxGtm_Atom_Ch_setSomcControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control)
538 {
539 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
540
541 atomCh->SOMC.B.ACB42 = control;
542 }
543
544
545 void IfxGtm_Atom_Ch_setSomcSignalLevelControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl)
546 {
547 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
548
549 atomCh->SOMC.B.ACB10 = ctrl;
550 }
551
552
553 void IfxGtm_Atom_Ch_setAruReadAddress0(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
554 {
555 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
556 atomCh->RDADDR.B.RDADDR0 = address;
557 }
558
559
560 void IfxGtm_Atom_Ch_setAruReadAddress1(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
561 {
562 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
563 atomCh->RDADDR.B.RDADDR1 = address;
564 }
565
566
567 uint32 IfxGtm_Atom_getShadowZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
568 {
569 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
570
571 return atomCh->SR0.U;
572 }
573
574
575 volatile uint32 *IfxGtm_Atom_getShadowZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
576 {
577 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
578
579 return (volatile uint32 *)&atomCh->SR0;
580 }
581
582
583 uint32 IfxGtm_Atom_getShadowOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
584 {
585 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
586
587 return atomCh->SR1.U;
588 }
589
590
591 volatile uint32 *IfxGtm_Atom_getShadowOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
592 {
593 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
594
595 return (volatile uint32 *)&atomCh->SR1;
596 }
IfxGtm_Atom_Agc_enableChannelsOutput
void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Atom.c:169
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxGtm_Atom_Ch_setResetSource
void IfxGtm_Atom_Ch_setResetSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Atom.c:497
IfxGtm_Atom_Ch_ResetEvent
IfxGtm_Atom_Ch_ResetEvent
Reset event for channel counter CN0.
Definition: IfxGtm_Atom.h:83
IfxGtm_Atom_getShadowZero
uint32 IfxGtm_Atom_getShadowZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow zero value.
Definition: IfxGtm_Atom.c:567
IfxGtm_Atom_Agc_setChannelsForceUpdate
void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Atom.c:235
IfxGtm_Atom_getShadowZeroPointer
volatile uint32 * IfxGtm_Atom_getShadowZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow zero pointer.
Definition: IfxGtm_Atom.c:575
IfxGtm_Atom_Ch_clearOneNotification
void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Atom.c:262
IfxGtm_Atom_Ch_setNotification
void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Atom.c:471
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:66
IfxGtm_Atom_Ch_clearZeroNotification
void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Atom.c:270
IfxGtm_Atom_Ch_getClockSource
IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Atom.c:306
IfxGtm_Atom_Agc_buildFeature
uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Atom.c:61
IfxGtm_Atom_Ch_setAruInput
void IfxGtm_Atom_Ch_setAruInput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
enable/disable ARU input for the ATOM channel specified.
Definition: IfxGtm_Atom.c:521
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Atom_SomcSignalLevelControl
IfxGtm_Atom_SomcSignalLevelControl
SOMC signal level Control.
Definition: IfxGtm_Atom.h:125
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Atom_Ch_configurePwmMode
void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
Definition: IfxGtm_Atom.c:278
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:209
IfxGtm_Atom_Agc_setTimeTrigger
void IfxGtm_Atom_Agc_setTimeTrigger(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value.
Definition: IfxGtm_Atom.c:245
IFXGTM_ATOM_NUM_AGC_CHANNELS
#define IFXGTM_ATOM_NUM_AGC_CHANNELS
Number of channels per ATOM AGC.
Definition: IfxGtm_Atom.c:55
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Atom_Agc_enableChannelsUpdate
void IfxGtm_Atom_Agc_enableChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN)
Definition: IfxGtm_Atom.c:193
IfxGtm_Atom_Ch_setCompareOne
void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Atom.c:423
IfxGtm_Atom_Ch_getClockFrequency
float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz.
Definition: IfxGtm_Atom.c:296
IfxGtm_Atom_Ch_raiseInterruptOne
void IfxGtm_Atom_Ch_raiseInterruptOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 1.
Definition: IfxGtm_Atom.c:390
IfxGtm_Atom_Ch_getChannelPointer
IFX_INLINE Ifx_GTM_ATOM_CH * IfxGtm_Atom_Ch_getChannelPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the base addredd of selected Atom channel.
Definition: IfxGtm_Atom.h:613
IfxGtm_Atom_Ch_setCounterValue
void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Atom.c:455
IfxGtm_Atom_Agc_enableChannelUpdate
void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Atom.c:145
IfxGtm_Atom_Ch_getCounterValue
uint32 IfxGtm_Atom_Ch_getCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Get the counter value.
Definition: IfxGtm_Atom.c:529
IfxGtm_FeatureControl_disable
disable
Definition: IfxGtm_cfg.h:245
IfxGtm_Atom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC.
Definition: IfxGtm_Atom.c:359
IfxGtm_Atom_Ch_raiseInterruptZero
void IfxGtm_Atom_Ch_raiseInterruptZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 0.
Definition: IfxGtm_Atom.c:398
IfxGtm_Atom_Agc_enableChannels
void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Atom.c:151
IfxGtm_Atom_Agc_buildFeatureForChannel
uint32 IfxGtm_Atom_Agc_buildFeatureForChannel(IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel.
Definition: IfxGtm_Atom.c:89
IfxGtm_Atom_Ch_getTimerPointer
volatile uint32 * IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Atom.c:366
IfxGtm_Atom_Ch_getOutputLevel
boolean IfxGtm_Atom_Ch_getOutputLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Gets the ATOM output level.
Definition: IfxGtm_Atom.c:348
IfxGtm_Atom_Mode
IfxGtm_Atom_Mode
Enum for ATOM mode.
Definition: IfxGtm_Atom.h:91
IFX_ZEROS
#define IFX_ZEROS
Definition: Ifx_Types.h:81
IfxGtm_Atom_SomcControl
IfxGtm_Atom_SomcControl
Match Compare control modes.
Definition: IfxGtm_Atom.h:111
IfxGtm_Atom_Mode_outputPwm
Definition: IfxGtm_Atom.h:95
IfxGtm_FeatureControl_enable
enable
Definition: IfxGtm_cfg.h:246
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Atom_Ch_setTriggerOutput
void IfxGtm_Atom_Ch_setTriggerOutput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Atom.c:513
IfxGtm_Atom_Ch_setAruReadAddress1
void IfxGtm_Atom_Ch_setAruReadAddress1(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 1
Definition: IfxGtm_Atom.c:560
IfxGtm_Atom_Ch_setOneShotMode
void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Atom.c:489
IfxGtm_Atom_Ch_isZeroNotification
boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Atom.c:381
IfxGtm_Atom_Ch_setCompareOneShadow
void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Atom.c:431
IfxGtm_Atom_Ch_setSignalLevel
void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Atom.c:505
IfxGtm_Atom_Ch_getCompareZero
uint32 IfxGtm_Atom_Ch_getCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero value.
Definition: IfxGtm_Atom.c:332
IfxGtm_Atom_Ch_setClockSource
void IfxGtm_Atom_Ch_setClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
Sets the channel clock source.
Definition: IfxGtm_Atom.c:406
IfxGtm_Atom_Ch_isOneNotification
boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Atom.c:372
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Atom_Agc_setChannelForceUpdate
void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Atom.c:224
IfxGtm_Atom_Ch_OutputTrigger
IfxGtm_Atom_Ch_OutputTrigger
Reset source for channel counter CN0.
Definition: IfxGtm_Atom.h:75
IfxGtm_Atom_Ch_setCompareZeroShadow
void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Atom.c:447
IfxGtm_Atom_Ch_getCompareOnePointer
volatile uint32 * IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Atom.c:324
IfxGtm_Atom_Ch_getCompareOne
uint32 IfxGtm_Atom_Ch_getCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Atom.c:316
IfxGtm_Atom_Ch_setCompare
void IfxGtm_Atom_Ch_setCompare(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values.
Definition: IfxGtm_Atom.c:414
IfxGtm_Atom_Ch_setAruReadAddress0
void IfxGtm_Atom_Ch_setAruReadAddress0(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 0
Definition: IfxGtm_Atom.c:553
IfxGtm_Atom_Agc_enableChannelsTrigger
void IfxGtm_Atom_Agc_enableChannelsTrigger(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger.
Definition: IfxGtm_Atom.c:187
IfxGtm_Atom_Ch_setMode
void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode
Definition: IfxGtm_Atom.c:463
IfxGtm_Atom_Agc_resetChannels
void IfxGtm_Atom_Agc_resetChannels(Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
Reset one or more channels.
Definition: IfxGtm_Atom.c:205
IfxGtm_Atom_Ch_setCompareZero
void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Atom.c:439
IfxGtm_Atom_Ch_getCompareZeroPointer
volatile uint32 * IfxGtm_Atom_Ch_getCompareZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero pointer.
Definition: IfxGtm_Atom.c:340
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Atom_getShadowOnePointer
volatile uint32 * IfxGtm_Atom_getShadowOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow One pointer.
Definition: IfxGtm_Atom.c:591
IfxGtm_Atom_getShadowOne
uint32 IfxGtm_Atom_getShadowOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow one value.
Definition: IfxGtm_Atom.c:583
IfxGtm_Atom_Agc_trigger
void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Atom.c:256
IfxGtm_Atom.h
GTM basic functionality.
IfxGtm_Atom_Agc_enableTimeTrigger
void IfxGtm_Atom_Agc_enableTimeTrigger(Ifx_GTM_ATOM_AGC *agc, boolean enabled)
Enable/disable the time base trigger.
Definition: IfxGtm_Atom.c:199
TRUE
#define TRUE
Definition: Platform_Types.h:90
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxGtm_Atom_Agc_enableChannelOutput
void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Atom.c:127
IfxGtm_Atom_Ch_setSomcSignalLevelControl
void IfxGtm_Atom_Ch_setSomcSignalLevelControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl)
sets the SL control for SOMC mode.
Definition: IfxGtm_Atom.c:545
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Cmu_getClkFrequency
float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:64
IfxGtm_Atom_Agc_enableChannel
void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Atom.c:109
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:219
IfxGtm_Atom_Ch_setSomcControl
void IfxGtm_Atom_Ch_setSomcControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control)
sets the SOMC control bits for the specified ATOM channel
Definition: IfxGtm_Atom.c:537


iLLD_TC26B: IfxGtm_Atom.h Source File

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IfxGtm_Atom.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
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41 *
42 *
43 * \defgroup IfxLld_Gtm_Std_Atom Atom Basic Functionality
44 * \ingroup IfxLld_Gtm_Std
45 * \defgroup IfxLld_Gtm_Std_Atom_Enumerations ATOM Enumerations
46 * \ingroup IfxLld_Gtm_Std_Atom
47 * \defgroup IfxLld_Gtm_Std_Atom_Channel_Functions ATOM Channel Functions
48 * \ingroup IfxLld_Gtm_Std_Atom
49 * \defgroup IfxLld_Gtm_Std_Atom_AGC_Functions ATOM AGC Functions
50 * \ingroup IfxLld_Gtm_Std_Atom
51 */
52
53 #ifndef IFXGTM_ATOM_H
54 #define IFXGTM_ATOM_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "_Impl/IfxGtm_cfg.h"
61 #include "IfxGtm.h"
62 #include "IfxGtm_Tbu.h"
63 #include "Src/Std/IfxSrc.h"
64 #include "IfxGtm_Cmu.h"
65 #include "stddef.h"
66
67 /******************************************************************************/
68 /*--------------------------------Enumerations--------------------------------*/
69 /******************************************************************************/
70
71 /** \addtogroup IfxLld_Gtm_Std_Atom_Enumerations
72 * \{ */
73 /** \brief Reset source for channel counter CN0
74 */
75 typedef enum
76 {
77 IfxGtm_Atom_Ch_OutputTrigger_forward = 0, /**< \brief Forward the trigger from the previous channel */
78 IfxGtm_Atom_Ch_OutputTrigger_generate = 1 /**< \brief Generate the trigger from the current channel */
79 } IfxGtm_Atom_Ch_OutputTrigger;
80
81 /** \brief Reset event for channel counter CN0
82 */
83 typedef enum
84 {
85 IfxGtm_Atom_Ch_ResetEvent_onCm0 = 0,
86 IfxGtm_Atom_Ch_ResetEvent_onTrigger = 1
87 } IfxGtm_Atom_Ch_ResetEvent;
88
89 /** \brief Enum for ATOM mode
90 */
91 typedef enum
92 {
93 IfxGtm_Atom_Mode_outputImmediate,
94 IfxGtm_Atom_Mode_outputCompare,
95 IfxGtm_Atom_Mode_outputPwm,
96 IfxGtm_Atom_Mode_outputSerial
97 } IfxGtm_Atom_Mode;
98
99 /** \} */
100
101 /** \brief Enable/disable of Aru Input to ATOM channel
102 */
103 typedef enum
104 {
105 IfxGtm_Atom_AruInput_disabled = 0, /**< \brief ARU input disabled */
106 IfxGtm_Atom_AruInput_enabled = 1 /**< \brief ARU input enabled */
107 } IfxGtm_Atom_AruInput;
108
109 /** \brief Match Compare control modes
110 */
111 typedef enum
112 {
113 IfxGtm_Atom_SomcControl_compareBoth = 0, /**< \brief compare CCU0 and CCU1 in parallel */
114 IfxGtm_Atom_SomcControl_compareBoth1 = 1, /**< \brief compare CCU0 and CCU1 in parallel */
115 IfxGtm_Atom_SomcControl_ccu0Ts0 = 2, /**< \brief compare CCU0 against TS0 */
116 IfxGtm_Atom_SomcControl_ccu1Ts12 = 3, /**< \brief compare only CCU1 against TS1 or TS2 */
117 IfxGtm_Atom_SomcControl_ccu0ccu1Ts0 = 4, /**< \brief compare CCU0 then CCU1, use TS0 */
118 IfxGtm_Atom_SomcControl_ccu0ccu1Ts12 = 5, /**< \brief compare CCU0 then CCU1. Use TS1 or TS2 */
119 IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12 = 6, /**< \brief compare CCU0 with TS0 then CCU1 with TS1 or TS2 */
120 IfxGtm_Atom_SomcControl_cancelCompare = 7 /**< \brief Cancel pending compare events */
121 } IfxGtm_Atom_SomcControl;
122
123 /** \brief SOMC signal level Control
124 */
125 typedef enum
126 {
127 IfxGtm_Atom_SomcSignalLevelControl_noChange = 0, /**< \brief no signal level change at output */
128 IfxGtm_Atom_SomcSignalLevelControl_sl0out1 = 1, /**< \brief SL= 0 -> Out=1; SL=1->Out=0 */
129 IfxGtm_Atom_SomcSignalLevelControl_sl0out0 = 2, /**< \brief SL=0->Out=0; SL=1->Out=1 */
130 IfxGtm_Atom_SomcSignalLevelControl_toggle = 3 /**< \brief toggle the output signal level */
131 } IfxGtm_Atom_SomcSignalLevelControl;
132
133 /** \addtogroup IfxLld_Gtm_Std_Atom_Channel_Functions
134 * \{ */
135
136 /******************************************************************************/
137 /*-------------------------Inline Function Prototypes-------------------------*/
138 /******************************************************************************/
139
140 /** \brief Returns the base addredd of selected Atom channel
141 * \param atom Pointer to the ATOM object
142 * \param channel Channel index
143 * \return Pointer to channel base address
144 */
145 IFX_INLINE Ifx_GTM_ATOM_CH *IfxGtm_Atom_Ch_getChannelPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
146
147 /** \brief Sets the compare 0 and 1 shadow values
148 * \param atom Pointer to the ATOM object
149 * \param channel Channel index
150 * \param shadowZero Compare zero shadow value
151 * \param shadowOne Compare one shadow value
152 * \return None
153 */
154 IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne);
155
156 /******************************************************************************/
157 /*-------------------------Global Function Prototypes-------------------------*/
158 /******************************************************************************/
159
160 /** \brief Clears the channel One notification
161 * \param atom Pointer to the ATOM object
162 * \param channel Channel index
163 * \return None
164 */
165 IFX_EXTERN void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
166
167 /** \brief Clears the channel Zero notification
168 * \param atom Pointer to the ATOM object
169 * \param channel Channel index
170 * \return None
171 */
172 IFX_EXTERN void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
173
174 /** \brief
175 * \param atom Pointer to the ATOM object
176 * \param channel Channel index
177 * \param clock Clock source
178 * \param activeState Active State
179 * \param resetEvent Channel reset event
180 * \param trigger Channel trigger output mode
181 * \return None
182 */
183 IFX_EXTERN void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger);
184
185 /** \brief Returns the ATOM channel input clock frequency in Hz
186 * \param gtm Pointer to GTM module
187 * \param atom Pointer to the ATOM object
188 * \param channel Channel index
189 * \return ATOM channel input clock frequency in Hz
190 */
191 IFX_EXTERN float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
192
193 /** \brief Returns the channel clock source
194 * \param atom Pointer to the ATOM object
195 * \param channel Channel index
196 * \return The clock source
197 */
198 IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
199
200 /** \brief Returns the compare one value
201 * \param atom Pointer to the ATOM object
202 * \param channel Channel index
203 * \return compare one value
204 */
205 IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
206
207 /** \brief Returns the compare one pointer
208 * \param atom Pointer to the ATOM object
209 * \param channel Channel index
210 * \return compare one pointer
211 */
212 IFX_EXTERN volatile uint32 *IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
213
214 /** \brief Returns the compare zero value
215 * \param atom Pointer to the ATOM object
216 * \param channel Channel index
217 * \return compare zero value
218 */
219 IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
220
221 /** \brief Returns the compare zero pointer
222 * \param atom Pointer to the ATOM object
223 * \param channel Channel index
224 * \return compare zero pointer
225 */
226 IFX_EXTERN volatile uint32 *IfxGtm_Atom_Ch_getCompareZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
227
228 /** \brief Gets the ATOM output level
229 * \param atom Pointer to the ATOM object
230 * \param channel Channel index
231 * \return TRUE the output is high, FALSE the output is low
232 */
233 IFX_EXTERN boolean IfxGtm_Atom_Ch_getOutputLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
234
235 /** \brief Returns a pointer to the ATOM channel SRC
236 * \param gtm Pointer to GTM module
237 * \param atom Specifies the atom object
238 * \param channel Channel index
239 * \return Pointer to the TOM channel SRC
240 */
241 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel);
242
243 /** \brief Returns the Timer pointer
244 * \param atom Pointer to the ATOM object
245 * \param channel Channel index
246 * \return Timer pointer
247 */
248 IFX_EXTERN volatile uint32 *IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
249
250 /** \brief Returns the status of channel One notification
251 * \param atom Pointer to the ATOM object
252 * \param channel Channel index
253 * \return Status of channel One notification
254 */
255 IFX_EXTERN boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
256
257 /** \brief Returns the status of channel Zero notification
258 * \param atom Pointer to the ATOM object
259 * \param channel Channel index
260 * \return Status of channel Zero notification
261 */
262 IFX_EXTERN boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
263
264 /** \brief Raises the interrupt for Compare 1
265 * \param atom Pointer to the ATOM object
266 * \param channel Channel index
267 * \return None
268 */
269 IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
270
271 /** \brief Raises the interrupt for Compare 0
272 * \param atom Pointer to the ATOM object
273 * \param channel Channel index
274 * \return None
275 */
276 IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
277
278 /** \brief Sets the channel clock source
279 * \param atom Pointer to the ATOM object
280 * \param channel Channel index
281 * \param clock Channel clock source
282 * \return None
283 */
284 IFX_EXTERN void IfxGtm_Atom_Ch_setClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock);
285
286 /** \brief Sets the compare 0 and 1 values
287 * \param atom Pointer to the ATOM object
288 * \param channel Channel index
289 * \param compareZero Compare zero value
290 * \param compareOne Compare one value
291 * \return None
292 */
293 IFX_EXTERN void IfxGtm_Atom_Ch_setCompare(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne);
294
295 /** \brief Sets the compare 1 value
296 * \param atom Pointer to the ATOM object
297 * \param channel Channel index
298 * \param compareOne Compare one value
299 * \return None
300 */
301 IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne);
302
303 /** \brief Sets the compare 1 shadow value
304 * \param atom Pointer to the ATOM object
305 * \param channel Channel index
306 * \param shadowOne Compare one shadow value
307 * \return None
308 */
309 IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne);
310
311 /** \brief Sets the compare 0 value
312 * \param atom Pointer to the ATOM object
313 * \param channel Channel index
314 * \param compareZero Compare zero value
315 * \return None
316 */
317 IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero);
318
319 /** \brief Sets the compare 0 shadow value
320 * \param atom Pointer to the ATOM object
321 * \param channel Channel index
322 * \param shadowZero Compare zero shadow value
323 * \return None
324 */
325 IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero);
326
327 /** \brief Sets the counter value
328 * \param atom Pointer to the ATOM object
329 * \param channel Channel index
330 * \param value Counter value
331 * \return None
332 */
333 IFX_EXTERN void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value);
334
335 /** \brief set the Atom operating mode
336 * \param atom Pointer to the ATOM object
337 * \param channel Channel index
338 * \param mode Atom operating mode
339 * \return None
340 */
341 IFX_EXTERN void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode);
342
343 /** \brief Sets the channel notification
344 * \param atom Pointer to the ATOM object
345 * \param channel Channel index
346 * \param mode Interrupt mode
347 * \param interruptOnCompareZero If TRUE, an interrupt is generated on compare 0, else no interrupt is generated
348 * \param interruptOnCompareOne If TRUE, an interrupt is generated on compare 1, else no interrupt is generated
349 * \return None
350 */
351 IFX_EXTERN void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne);
352
353 /** \brief Enable/disable the one shot mode
354 * \param atom Pointer to the ATOM object
355 * \param channel Channel index
356 * \param enabled If TRUE, the feature is enabled, else disabled
357 * \return None
358 */
359 IFX_EXTERN void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled);
360
361 /** \brief Sets the channel clock source either from local or from previous channel
362 * \param atom Pointer to the ATOM object
363 * \param channel Channel index
364 * \param event Channel reset event
365 * \return None
366 */
367 IFX_EXTERN void IfxGtm_Atom_Ch_setResetSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event);
368
369 /** \brief Sets the signal level
370 * \param atom Pointer to the ATOM object
371 * \param channel Channel index
372 * \param activeState Signal level active state. In case the channel is reset, the output is set to not active. The signal is active between 0 and the leading edge (CM1) and inactive between the leading edge and the trailing edge (CM0).
373 * \return None
374 */
375 IFX_EXTERN void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState);
376
377 /** \brief Sets the channel trigger output
378 * \param atom Pointer to the ATOM object
379 * \param channel Channel index
380 * \param trigger Channel trigger output mode
381 * \return None
382 */
383 IFX_EXTERN void IfxGtm_Atom_Ch_setTriggerOutput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger);
384
385 /** \brief Get the counter value
386 * \param atom pointer to the ATOM instance
387 * \param channel channel index of the ATOM
388 * \return counter value
389 */
390 IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
391
392 /** \} */
393
394 /** \addtogroup IfxLld_Gtm_Std_Atom_AGC_Functions
395 * \{ */
396
397 /******************************************************************************/
398 /*-------------------------Inline Function Prototypes-------------------------*/
399 /******************************************************************************/
400
401 /** \brief Sets the channels for update (UPEN)
402 * \param agc Pointer to the AGC object
403 * \param value value for the channel enable (bit 0: Channel 0, bit 1: channel 1, ...)
404 * \return None
405 */
406 IFX_INLINE void IfxGtm_Atom_Agc_setChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint32 value);
407
408 /******************************************************************************/
409 /*-------------------------Global Function Prototypes-------------------------*/
410 /******************************************************************************/
411
412 /** \brief Builds the register value for the feature enable/disable
413 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
414 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
415 * \param bitfieldOffset Offset of the channel 0 bitfield in the register
416 * \return The register value
417 */
418 IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset);
419
420 /** \brief Builds the register value for the feature enable/disable for a single channel
421 * \param channel Channel index
422 * \param enabled Enable/ Disable choise of the feature
423 * \param bitfieldOffset Offset of the channel 0 bitfield in the register
424 * \return The register value
425 */
426 IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeatureForChannel(IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset);
427
428 /** \brief Enable/disable one channel (ENDIS)
429 * \param agc Pointer to the AGC object
430 * \param channel Channel index
431 * \param enabled Enable/ Disable choise of the feature
432 * \param immediate If TRUE, the action is done immediately else, the action is done on AGC trigger (CTRL_TRIG)
433 * \return None
434 */
435 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate);
436
437 /** \brief Enable/disable one channel output (OUTEN)
438 * \param agc Pointer to the AGC object
439 * \param channel Channel index
440 * \param enabled Enable/ Disable choise of the feature
441 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
442 * \return None
443 */
444 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate);
445
446 /** \brief Enable/disable one channel for update (UPEN)
447 * \param agc Pointer to the AGC object
448 * \param channel Channel index
449 * \param enabled Enable/ Disable choise of the feature
450 * \return None
451 */
452 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled);
453
454 /** \brief Enable/disable one or more channels (ENDIS)
455 * \param agc Pointer to the AGC object
456 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
457 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
458 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
459 * \return None
460 */
461 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate);
462
463 /** \brief Enable/disable one or more channels output (OUTEN)
464 * \param agc Pointer to the TGC object
465 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
466 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
467 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
468 * \return None
469 */
470 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate);
471
472 /** \brief Enable/disable the TGC channels trigger
473 * \param agc Pointer to the AGC object
474 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
475 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
476 * \return None
477 */
478 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsTrigger(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask);
479
480 /** \brief Enable/disable one or more channels for update (UPEN)
481 * \param agc Pointer to the AGC object
482 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
483 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
484 * \return None
485 */
486 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask);
487
488 /** \brief Enable/disable the time base trigger
489 * \param agc Pointer to the AGC object
490 * \param enabled If TRUE, the trigger is enabled else disabled
491 * \return None
492 */
493 IFX_EXTERN void IfxGtm_Atom_Agc_enableTimeTrigger(Ifx_GTM_ATOM_AGC *agc, boolean enabled);
494
495 /** \brief Reset one or more channels
496 * \param agc Pointer to the AGC object
497 * \param resetMask Mask for the channel reset (bit 0: Channel 0, bit 1: channel 1, ...)
498 * \return None
499 */
500 IFX_EXTERN void IfxGtm_Atom_Agc_resetChannels(Ifx_GTM_ATOM_AGC *agc, uint32 resetMask);
501
502 /** \brief Enable/disable one channel for update (FUPD)
503 * \param agc Pointer to the AGC object
504 * \param channel Channel index
505 * \param enabled Enable/ Disable choise of the feature
506 * \param resetEnabled Enable/ Disable reset choise of the feature
507 * \return None
508 */
509 IFX_EXTERN void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled);
510
511 /** \brief Enable/disable one or more channels for the force update feature (FUPD)
512 * \param agc Pointer to the AGC object
513 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
514 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
515 * \param resetEnableMask Mask for the enabled channels counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...) Channel 0, bit 1: channel 1, ...)
516 * \param resetDisableMask Mask for the disabled channels with no counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...)
517 * \return None
518 */
519 IFX_EXTERN void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask);
520
521 /** \brief Sets the trigger time base and time base value
522 * \param agc Pointer to the AGC object
523 * \param base Time base used for comparison
524 * \param value Compare value that raise the trigger
525 * \return None
526 */
527 IFX_EXTERN void IfxGtm_Atom_Agc_setTimeTrigger(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value);
528
529 /** \brief Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
530 * \param agc Pointer to the AGC object
531 * \return None
532 */
533 IFX_EXTERN void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc);
534
535 /** \} */
536
537 /******************************************************************************/
538 /*-------------------------Global Function Prototypes-------------------------*/
539 /******************************************************************************/
540
541 /** \brief enable/disable ARU input for the ATOM channel specified.
542 * \param atom pointer to the ATOM instance
543 * \param channel index of ATOM channel
544 * \param enabled ARU enable status
545 * \return None
546 */
547 IFX_EXTERN void IfxGtm_Atom_Ch_setAruInput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled);
548
549 /** \brief sets the SOMC control bits for the specified ATOM channel
550 * \param atom pointer to ATOM instance
551 * \param channel ATOM channel index
552 * \param control SOMC control mode enum
553 * \return None
554 */
555 IFX_EXTERN void IfxGtm_Atom_Ch_setSomcControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control);
556
557 /** \brief sets the SL control for SOMC mode.
558 * \param atom pointer to the ATOM instance
559 * \param channel index of ATOM channel
560 * \param ctrl SIgnal level control
561 * \return None
562 */
563 IFX_EXTERN void IfxGtm_Atom_Ch_setSomcSignalLevelControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl);
564
565 /** \brief set the ARU read address 0
566 * \param atom pointer to ATOM instance
567 * \param channel ATOM channel index
568 * \param address ARU read address 0
569 * \return None
570 */
571 IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress0(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address);
572
573 /** \brief set the ARU read address 1
574 * \param atom pointer to ATOM instance
575 * \param channel ATOM channel index
576 * \param address ARU read address 1
577 * \return None
578 */
579 IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress1(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address);
580
581 /** \brief Returns the shadow zero value
582 * \param atom Pointer to the ATOM object
583 * \param channel Channel index
584 * \return shadow zero value
585 */
586 IFX_EXTERN uint32 IfxGtm_Atom_getShadowZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
587
588 /** \brief Returns the shadow zero pointer
589 * \param atom Pointer to the ATOM object
590 * \param channel Channel index
591 * \return shadow zero value
592 */
593 IFX_EXTERN volatile uint32 *IfxGtm_Atom_getShadowZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
594
595 /** \brief Returns the shadow one value
596 * \param atom Pointer to the ATOM object
597 * \param channel Channel index
598 * \return shadow one value
599 */
600 IFX_EXTERN uint32 IfxGtm_Atom_getShadowOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
601
602 /** \brief Returns the shadow One pointer
603 * \param atom Pointer to the ATOM object
604 * \param channel channel index
605 * \return shadow One pointer
606 */
607 IFX_EXTERN volatile uint32 *IfxGtm_Atom_getShadowOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
608
609 /******************************************************************************/
610 /*---------------------Inline Function Implementations------------------------*/
611 /******************************************************************************/
612
613 IFX_INLINE Ifx_GTM_ATOM_CH *IfxGtm_Atom_Ch_getChannelPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
614 {
615 return (Ifx_GTM_ATOM_CH *)((uint32)&atom->CH0.RDADDR.U + 0x80 * channel);
616 }
617
618
619 IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
620 {
621 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
622
623 atomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
624 atomCh->SR1.U = shadowOne;
625 }
626
627
628 IFX_INLINE void IfxGtm_Atom_Agc_setChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint32 value)
629 {
630 agc->GLB_CTRL.U = value;
631 }
632
633
634 #endif /* IFXGTM_ATOM_H */
IfxGtm_Atom_Agc_enableChannelsOutput
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Atom.c:169
IfxGtm_Atom_Ch_setResetSource
IFX_EXTERN void IfxGtm_Atom_Ch_setResetSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Atom.c:497
IfxGtm_Atom_Ch_ResetEvent
IfxGtm_Atom_Ch_ResetEvent
Reset event for channel counter CN0.
Definition: IfxGtm_Atom.h:83
IfxGtm_Atom_getShadowZeroPointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_getShadowZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow zero pointer.
Definition: IfxGtm_Atom.c:575
IfxGtm_Atom_SomcControl_ccu0ccu1Ts0
compare CCU0 then CCU1, use TS0
Definition: IfxGtm_Atom.h:117
IfxGtm_Atom_Agc_setChannelsForceUpdate
IFX_EXTERN void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Atom.c:235
IfxGtm_Atom_Ch_ResetEvent_onCm0
Definition: IfxGtm_Atom.h:85
IfxGtm_Atom_Ch_clearOneNotification
IFX_EXTERN void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Atom.c:262
IfxGtm_Atom_AruInput_disabled
ARU input disabled.
Definition: IfxGtm_Atom.h:105
IfxGtm_Atom_Ch_OutputTrigger_generate
Generate the trigger from the current channel.
Definition: IfxGtm_Atom.h:78
IfxGtm_Atom_Ch_setNotification
IFX_EXTERN void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Atom.c:471
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:66
IfxGtm_Atom_Ch_clearZeroNotification
IFX_EXTERN void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Atom.c:270
IfxGtm_Atom_getShadowOne
IFX_EXTERN uint32 IfxGtm_Atom_getShadowOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow one value.
Definition: IfxGtm_Atom.c:583
IfxGtm_Atom_Ch_getClockSource
IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Atom.c:306
IfxGtm_Atom_Agc_buildFeature
IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Atom.c:61
IfxGtm_Atom_Ch_setAruReadAddress0
IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress0(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 0
Definition: IfxGtm_Atom.c:553
IfxGtm_Atom_SomcControl_ccu1Ts12
compare only CCU1 against TS1 or TS2
Definition: IfxGtm_Atom.h:116
IfxGtm_Atom_SomcControl_ccu0ccu1Ts12
compare CCU0 then CCU1. Use TS1 or TS2
Definition: IfxGtm_Atom.h:118
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Atom_SomcSignalLevelControl
IfxGtm_Atom_SomcSignalLevelControl
SOMC signal level Control.
Definition: IfxGtm_Atom.h:125
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Atom_Ch_configurePwmMode
IFX_EXTERN void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
Definition: IfxGtm_Atom.c:278
IfxGtm_Atom_Agc_setChannelsUpdate
IFX_INLINE void IfxGtm_Atom_Agc_setChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint32 value)
Sets the channels for update (UPEN)
Definition: IfxGtm_Atom.h:628
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:209
IfxGtm_Atom_Agc_setTimeTrigger
IFX_EXTERN void IfxGtm_Atom_Agc_setTimeTrigger(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value.
Definition: IfxGtm_Atom.c:245
IfxSrc.h
SRC basic functionality.
IfxGtm_Atom_Mode_outputSerial
Definition: IfxGtm_Atom.h:96
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Atom_Agc_enableChannelsUpdate
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN)
Definition: IfxGtm_Atom.c:193
IfxGtm_Atom_Ch_setCompareOne
IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Atom.c:423
IfxGtm_Atom_Ch_getClockFrequency
IFX_EXTERN float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz.
Definition: IfxGtm_Atom.c:296
IfxGtm_Atom_Ch_raiseInterruptOne
IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 1.
Definition: IfxGtm_Atom.c:390
IfxGtm_Atom_Ch_getChannelPointer
IFX_INLINE Ifx_GTM_ATOM_CH * IfxGtm_Atom_Ch_getChannelPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the base addredd of selected Atom channel.
Definition: IfxGtm_Atom.h:613
IfxGtm_Atom_Ch_setCompareShadow
IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values.
Definition: IfxGtm_Atom.h:619
IfxGtm_Atom_Ch_setCounterValue
IFX_EXTERN void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Atom.c:455
IfxGtm_Atom_Ch_setSomcSignalLevelControl
IFX_EXTERN void IfxGtm_Atom_Ch_setSomcSignalLevelControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl)
sets the SL control for SOMC mode.
Definition: IfxGtm_Atom.c:545
IfxGtm_Atom_Agc_enableChannelUpdate
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Atom.c:145
IfxGtm_Atom_SomcSignalLevelControl_noChange
no signal level change at output
Definition: IfxGtm_Atom.h:127
IfxGtm_Atom_SomcSignalLevelControl_sl0out0
SL=0->Out=0; SL=1->Out=1.
Definition: IfxGtm_Atom.h:129
IfxGtm_Atom_Ch_getCounterValue
IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Get the counter value.
Definition: IfxGtm_Atom.c:529
IfxGtm_Atom_Mode_outputCompare
Definition: IfxGtm_Atom.h:94
IfxGtm_Atom_Ch_getSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC.
Definition: IfxGtm_Atom.c:359
IfxGtm_Atom_Ch_raiseInterruptZero
IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 0.
Definition: IfxGtm_Atom.c:398
IfxGtm_Atom_Agc_enableChannels
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Atom.c:151
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Atom_Agc_buildFeatureForChannel
IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeatureForChannel(IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel.
Definition: IfxGtm_Atom.c:89
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_Atom_SomcSignalLevelControl_toggle
toggle the output signal level
Definition: IfxGtm_Atom.h:130
IfxGtm_Atom_Ch_getTimerPointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Atom.c:366
IfxGtm_Atom_Ch_getOutputLevel
IFX_EXTERN boolean IfxGtm_Atom_Ch_getOutputLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Gets the ATOM output level.
Definition: IfxGtm_Atom.c:348
IfxGtm_Atom_SomcControl_ccu0Ts0
compare CCU0 against TS0
Definition: IfxGtm_Atom.h:115
IfxGtm_Atom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Atom.h:77
IfxGtm_Atom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Atom.h:86
IfxGtm_Atom_Mode
IfxGtm_Atom_Mode
Enum for ATOM mode.
Definition: IfxGtm_Atom.h:91
IfxGtm_Atom_SomcControl
IfxGtm_Atom_SomcControl
Match Compare control modes.
Definition: IfxGtm_Atom.h:111
IfxGtm_Atom_Mode_outputPwm
Definition: IfxGtm_Atom.h:95
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Atom_Ch_setTriggerOutput
IFX_EXTERN void IfxGtm_Atom_Ch_setTriggerOutput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Atom.c:513
IfxGtm_Atom_Ch_setOneShotMode
IFX_EXTERN void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Atom.c:489
IfxGtm_Atom_Ch_setAruInput
IFX_EXTERN void IfxGtm_Atom_Ch_setAruInput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
enable/disable ARU input for the ATOM channel specified.
Definition: IfxGtm_Atom.c:521
IfxGtm_Atom_AruInput
IfxGtm_Atom_AruInput
Enable/disable of Aru Input to ATOM channel.
Definition: IfxGtm_Atom.h:103
IfxGtm_Atom_getShadowOnePointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_getShadowOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow One pointer.
Definition: IfxGtm_Atom.c:591
IfxGtm_Atom_Ch_isZeroNotification
IFX_EXTERN boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Atom.c:381
IfxGtm_Atom_SomcControl_compareBoth1
compare CCU0 and CCU1 in parallel
Definition: IfxGtm_Atom.h:114
IfxGtm_Atom_Ch_setCompareOneShadow
IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Atom.c:431
IfxGtm_Atom_Ch_setSignalLevel
IFX_EXTERN void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Atom.c:505
IfxGtm_Atom_Ch_setAruReadAddress1
IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress1(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 1
Definition: IfxGtm_Atom.c:560
IfxGtm_Tbu.h
GTM basic functionality.
IfxGtm_Atom_Ch_getCompareZero
IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero value.
Definition: IfxGtm_Atom.c:332
IfxGtm_Atom_Ch_setClockSource
IFX_EXTERN void IfxGtm_Atom_Ch_setClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
Sets the channel clock source.
Definition: IfxGtm_Atom.c:406
IfxGtm_Atom_Ch_isOneNotification
IFX_EXTERN boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Atom.c:372
IfxGtm_Atom_SomcSignalLevelControl_sl0out1
SL= 0 -> Out=1; SL=1->Out=0.
Definition: IfxGtm_Atom.h:128
IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12
compare CCU0 with TS0 then CCU1 with TS1 or TS2
Definition: IfxGtm_Atom.h:119
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Atom_Agc_setChannelForceUpdate
IFX_EXTERN void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Atom.c:224
IfxGtm_Atom_Ch_OutputTrigger
IfxGtm_Atom_Ch_OutputTrigger
Reset source for channel counter CN0.
Definition: IfxGtm_Atom.h:75
IfxGtm_Atom_Ch_setCompareZeroShadow
IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Atom.c:447
IfxGtm_Atom_Ch_getCompareOnePointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Atom.c:324
IfxGtm_Atom_Ch_getCompareOne
IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Atom.c:316
IfxGtm_Atom_Ch_setCompare
IFX_EXTERN void IfxGtm_Atom_Ch_setCompare(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values.
Definition: IfxGtm_Atom.c:414
IfxGtm_Atom_Ch_setSomcControl
IFX_EXTERN void IfxGtm_Atom_Ch_setSomcControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control)
sets the SOMC control bits for the specified ATOM channel
Definition: IfxGtm_Atom.c:537
IfxGtm_Atom_AruInput_enabled
ARU input enabled.
Definition: IfxGtm_Atom.h:106
IfxGtm_Atom_Agc_enableChannelsTrigger
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsTrigger(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger.
Definition: IfxGtm_Atom.c:187
IfxGtm_Atom_SomcControl_cancelCompare
Cancel pending compare events.
Definition: IfxGtm_Atom.h:120
IfxGtm_Atom_Ch_setMode
IFX_EXTERN void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode
Definition: IfxGtm_Atom.c:463
IfxGtm_Atom_Agc_resetChannels
IFX_EXTERN void IfxGtm_Atom_Agc_resetChannels(Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
Reset one or more channels.
Definition: IfxGtm_Atom.c:205
IfxGtm_Atom_Ch_setCompareZero
IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Atom.c:439
IfxGtm_Atom_Ch_getCompareZeroPointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_Ch_getCompareZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero pointer.
Definition: IfxGtm_Atom.c:340
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Atom_getShadowZero
IFX_EXTERN uint32 IfxGtm_Atom_getShadowZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the shadow zero value.
Definition: IfxGtm_Atom.c:567
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Atom_Agc_trigger
IFX_EXTERN void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Atom.c:256
IfxGtm_Atom_Agc_enableTimeTrigger
IFX_EXTERN void IfxGtm_Atom_Agc_enableTimeTrigger(Ifx_GTM_ATOM_AGC *agc, boolean enabled)
Enable/disable the time base trigger.
Definition: IfxGtm_Atom.c:199
IfxGtm_Atom_Agc_enableChannelOutput
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Atom.c:127
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm.h
GTM basic functionality.
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Atom_SomcControl_compareBoth
compare CCU0 and CCU1 in parallel
Definition: IfxGtm_Atom.h:113
IfxGtm_Atom_Agc_enableChannel
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Atom.c:109
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:219
IfxGtm_Atom_Mode_outputImmediate
Definition: IfxGtm_Atom.h:93


iLLD_TC26B: IfxGtm_Atom_Pwm.c Source File

  • Gtm
  • Atom
  • Pwm
IfxGtm_Atom_Pwm.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_Pwm.c
3 * \brief GTM PWM details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Atom_Pwm.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 boolean IfxGtm_Atom_Pwm_init(IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
53 {
54 boolean result = TRUE;
55
56 driver->gtm = config->gtm;
57 driver->atomIndex = config->atom;
58
59 Ifx_GTM_ATOM *atomSFR = &config->gtm->ATOM[config->atom];
60 driver->atom = atomSFR;
61 driver->atomChannel = config->atomChannel;
62 Ifx_GTM_ATOM_AGC *agc = &atomSFR->AGC;
63 driver->agc = agc;
64
65 /* Initialize the timer part */
66 if (config->synchronousUpdateEnabled == 1)
67 {
68 IfxGtm_Atom_Agc_enableChannelUpdate(agc, config->atomChannel, TRUE);
69 }
70
71 IfxGtm_Atom_Agc_setChannelForceUpdate(agc, config->atomChannel, TRUE, TRUE);
72
73 IfxGtm_Atom_Ch_setSignalLevel(atomSFR, config->atomChannel, config->signalLevel);
74
75 IfxGtm_Atom_Ch_setMode(atomSFR, config->atomChannel, config->mode);
76
77 if (config->pin.outputPin != NULL_PTR)
78 {
79 IfxGtm_PinMap_setAtomTout(config->pin.outputPin, config->pin.outputMode, config->pin.padDriver);
80 }
81
82 // enable and initialise interrupts if chosen
83 if ((config->interrupt.ccu0Enabled == 1) || (config->interrupt.ccu1Enabled == 1))
84 {
85 IfxGtm_Atom_Ch_setNotification(atomSFR, config->atomChannel, config->interrupt.mode, config->interrupt.ccu0Enabled, config->interrupt.ccu1Enabled);
86
87 volatile Ifx_SRC_SRCR *src;
88 src = IfxGtm_Atom_Ch_getSrcPointer(config->gtm, config->atom, config->atomChannel);
89 IfxSrc_init(src, config->interrupt.isrProvider, config->interrupt.isrPriority);
90 IfxSrc_enable(src);
91 }
92
93 if (config->synchronousUpdateEnabled == 1)
94 {
95 IfxGtm_Atom_Ch_setCompareZeroShadow(atomSFR, config->atomChannel, config->period);
96 IfxGtm_Atom_Ch_setCompareOneShadow(atomSFR, config->atomChannel, config->dutyCycle);
97 }
98 else
99 {
100 IfxGtm_Atom_Ch_setCompareZero(atomSFR, config->atomChannel, config->period);
101 IfxGtm_Atom_Ch_setCompareOne(atomSFR, config->atomChannel, config->dutyCycle);
102 }
103
104 IfxGtm_Atom_Agc_enableChannel(agc, config->atomChannel, TRUE, FALSE);
105 IfxGtm_Atom_Agc_enableChannelOutput(agc, config->atomChannel, TRUE, FALSE);
106
107 if (config->immediateStartEnabled == TRUE)
108 {
109 IfxGtm_Atom_Agc_trigger(driver->agc);
110 }
111
112 return result;
113 }
114
115
116 void IfxGtm_Atom_Pwm_initConfig(IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
117 {
118 config->gtm = gtm;
119 config->atom = IfxGtm_Atom_0;
120 config->atomChannel = IfxGtm_Atom_Ch_0;
121 config->period = 20;
122 config->dutyCycle = 10;
123 config->signalLevel = Ifx_ActiveState_high;
124 config->mode = IfxGtm_Atom_Mode_outputPwm;
125 config->oneShotModeEnabled = FALSE;
126 config->synchronousUpdateEnabled = FALSE;
127 config->immediateStartEnabled = TRUE;
128 config->interrupt.ccu0Enabled = FALSE;
129 config->interrupt.ccu1Enabled = FALSE;
130 config->interrupt.mode = IfxGtm_IrqMode_pulseNotify;
131 config->interrupt.isrProvider = IfxSrc_Tos_cpu0;
132 config->interrupt.isrPriority = 0;
133 config->pin.outputPin = NULL_PTR;
134 config->pin.outputMode = IfxPort_OutputMode_pushPull;
135 config->pin.padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
136 }
137
138
139 void IfxGtm_Atom_Pwm_start(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
140 {
141 /* Enable channel if not enabled already */
142 IfxGtm_Atom_Agc_enableChannel(driver->agc, driver->atomChannel, TRUE, immediate);
143 IfxGtm_Atom_Agc_enableChannelOutput(driver->agc, driver->atomChannel, TRUE, immediate);
144
145 /* Trigger the start now */
146 IfxGtm_Atom_Agc_trigger(driver->agc);
147 }
148
149
150 void IfxGtm_Atom_Pwm_stop(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
151 {
152 /* Disable channels */
153 IfxGtm_Atom_Agc_enableChannel(driver->agc, driver->atomChannel, FALSE, immediate);
154 IfxGtm_Atom_Agc_enableChannelOutput(driver->agc, driver->atomChannel, FALSE, immediate);
155
156 /* Trigger the stop now */
157 IfxGtm_Atom_Agc_trigger(driver->agc);
158 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxGtm_Atom_Pwm_Config::immediateStartEnabled
boolean immediateStartEnabled
enable immediate start after init
Definition: IfxGtm_Atom_Pwm.h:171
IfxGtm_Atom_Pwm.h
GTM PWM details.
IfxGtm_Atom_Pwm_Config::mode
IfxGtm_Atom_Mode mode
Atom mode of operation.
Definition: IfxGtm_Atom_Pwm.h:165
IfxGtm_Atom_Pwm_Config::oneShotModeEnabled
boolean oneShotModeEnabled
Enable/Disable the one shot mode.
Definition: IfxGtm_Atom_Pwm.h:169
IfxGtm_Atom_Pwm_Interrupt::ccu0Enabled
boolean ccu0Enabled
Enable/Disable choice for CCU0 trigger interrupt.
Definition: IfxGtm_Atom_Pwm.h:138
IfxGtm_Atom_Pwm_pin::outputPin
IfxGtm_Atom_ToutMap * outputPin
output pin
Definition: IfxGtm_Atom_Pwm.h:149
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:133
IfxGtm_Atom_Ch_setNotification
void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Atom.c:471
IfxGtm_Atom_Ch_0
ATOM channel 0.
Definition: IfxGtm_cfg.h:222
IfxGtm_Atom_Pwm_Config::period
uint32 period
Period.
Definition: IfxGtm_Atom_Pwm.h:166
IfxGtm_Atom_Pwm_Driver::atomIndex
IfxGtm_Atom atomIndex
Index of the ATOM object used.
Definition: IfxGtm_Atom_Pwm.h:181
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxGtm_Atom_Pwm_Config::interrupt
IfxGtm_Atom_Pwm_Interrupt interrupt
configuration structure for interrupt
Definition: IfxGtm_Atom_Pwm.h:172
IfxGtm_Atom_Pwm_Config::signalLevel
Ifx_ActiveState signalLevel
Signal Level.
Definition: IfxGtm_Atom_Pwm.h:168
IfxGtm_Atom_Pwm_Config::dutyCycle
uint32 dutyCycle
Duty Cycle.
Definition: IfxGtm_Atom_Pwm.h:167
IfxGtm_Atom_Pwm_Driver::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Atom_Pwm.h:180
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGtm_Atom_Ch_setCompareOne
void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Atom.c:423
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Atom_Agc_enableChannelUpdate
void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Atom.c:145
IfxGtm_Atom_Pwm_stop
void IfxGtm_Atom_Pwm_stop(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel.
Definition: IfxGtm_Atom_Pwm.c:150
IfxGtm_Atom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC.
Definition: IfxGtm_Atom.c:359
IfxGtm_Atom_Pwm_Interrupt::mode
IfxGtm_IrqMode mode
IRQ mode of interrupt.
Definition: IfxGtm_Atom_Pwm.h:140
IfxGtm_Atom_Pwm_Interrupt::ccu1Enabled
boolean ccu1Enabled
Enable/Disable choice for CCU1 trigger interrupt.
Definition: IfxGtm_Atom_Pwm.h:139
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:144
IfxGtm_Atom_Pwm_start
void IfxGtm_Atom_Pwm_start(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Starts the PWM generation from the configured channel.
Definition: IfxGtm_Atom_Pwm.c:139
IfxGtm_Atom_Pwm_Config::pin
IfxGtm_Atom_Pwm_pin pin
configuration structure for output pin
Definition: IfxGtm_Atom_Pwm.h:173
IfxGtm_Atom_Mode_outputPwm
Definition: IfxGtm_Atom.h:95
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxGtm_Atom_Pwm_Config::synchronousUpdateEnabled
boolean synchronousUpdateEnabled
Synchronous or Asynchronous update.
Definition: IfxGtm_Atom_Pwm.h:170
IfxGtm_Atom_Pwm_Driver::atomChannel
IfxGtm_Atom_Ch atomChannel
ATOM channel used for the timer.
Definition: IfxGtm_Atom_Pwm.h:182
IfxGtm_Atom_Pwm_Config
Configuration structure.
Definition: IfxGtm_Atom_Pwm.h:160
IfxGtm_Atom_Ch_setCompareOneShadow
void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Atom.c:431
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:68
IfxGtm_Atom_Ch_setSignalLevel
void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Atom.c:505
IfxGtm_Atom_Pwm_pin::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxGtm_Atom_Pwm.h:151
IfxGtm_Atom_Pwm_Driver::agc
Ifx_GTM_ATOM_AGC * agc
Pointer to the AGC object.
Definition: IfxGtm_Atom_Pwm.h:184
IfxGtm_Atom_0
ATOM object 0.
Definition: IfxGtm_cfg.h:211
IfxGtm_Atom_Pwm_Config::atom
IfxGtm_Atom atom
Index of the ATOM object used.
Definition: IfxGtm_Atom_Pwm.h:163
IfxGtm_Atom_Agc_setChannelForceUpdate
void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Atom.c:224
IfxGtm_Atom_Pwm_Driver::atom
Ifx_GTM_ATOM * atom
Pointer to the ATOM object.
Definition: IfxGtm_Atom_Pwm.h:183
IfxGtm_Atom_Ch_setCompareZeroShadow
void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Atom.c:447
IfxGtm_Atom_Pwm_Driver
Driver Handle.
Definition: IfxGtm_Atom_Pwm.h:178
IfxGtm_Atom_Ch_setMode
void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode
Definition: IfxGtm_Atom.c:463
IfxGtm_Atom_Ch_setCompareZero
void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Atom.c:439
IfxGtm_Atom_Pwm_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Type of Service for Ccu0/1 interrupt.
Definition: IfxGtm_Atom_Pwm.h:141
IfxGtm_Atom_Pwm_pin::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxGtm_Atom_Pwm.h:150
IfxGtm_Atom_Agc_trigger
void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Atom.c:256
IfxGtm_Atom_Pwm_initConfig
void IfxGtm_Atom_Pwm_initConfig(IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Atom_Pwm.c:116
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Atom_Pwm_Interrupt::isrPriority
Ifx_Priority isrPriority
Priority for Ccu0/1 interrupt.
Definition: IfxGtm_Atom_Pwm.h:142
IfxGtm_Atom_Agc_enableChannelOutput
void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Atom.c:127
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxGtm_Atom_Agc_enableChannel
void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Atom.c:109
IfxGtm_PinMap_setAtomTout
void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:718
IfxGtm_Atom_Pwm_init
boolean IfxGtm_Atom_Pwm_init(IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
Initialises the Timer object.
Definition: IfxGtm_Atom_Pwm.c:52


iLLD_TC26B: IfxGtm_Atom_Pwm.h Source File

  • Gtm
  • Atom
  • Pwm
IfxGtm_Atom_Pwm.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_Pwm.h
3 * \brief GTM PWM details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Atom_Pwm_Usage How to use the GTM ATOM PWM Driver
42 * \ingroup IfxLld_Gtm_Atom_Pwm
43 *
44 * This interface allows to generate simple PWM signal on a ATOM out put and can generate interrupts if enabled.
45 * this output can also be routed to port pin if required.
46 *
47 * \section Preparation Preparation
48 * \subsection Include Include Files
49 *
50 * Include following header file into your C code:
51 * \code
52 * #include <Gtm/Atom/Pwm/IfxGtm_Atom_Pwm.h>
53 * \endcode
54 *
55 * \subsection Variables Variables
56 * define global variables if necessary
57 *
58 * \code
59 * Ifx_GTM *gtm = &MODULE_GTM;
60 * #define ATOM0_CH0_PRIO 20
61 * \endcode
62 *
63 * \subsection Interrupts Interrupts
64 * define Interrupts if needed
65 *
66 * \code
67 * IFX_INTERRUPT(ATOM0Ch0_ISR, 0, ATOM0_CH0_PRIO)
68 * {}
69 * \endcode
70 *
71 * \subsection Initialization Initialization
72 *
73 * \code
74 * // install interrupt handlers
75 * IfxCpu_Irq_installInterruptHandler (ATOM0Ch0_ISR, ATOM0_CH0_PRIO);
76 *
77 * // enable GTM clock
78 * {
79 * float32 frequency = IfxGtm_Cmu_getModuleFrequency(gtm);
80 * // Enables the GTM
81 * IfxGtm_enable(gtm);
82 * // Set the global clock frequency to the max
83 * IfxGtm_Cmu_setGclkFrequency(gtm, frequency);
84 * // Set the CMU CLK0
85 * IfxGtm_Cmu_setClkFrequency(gtm, IfxGtm_Cmu_Clk_0, frequency);
86 * // FXCLK: used by TOM and CLK0: used by ATOM
87 * IfxGtm_Cmu_enableClocks(gtm, IFXGTM_CMU_CLKEN_FXCLK | IFXGTM_CMU_CLKEN_CLK0);
88 * }
89 *
90 * // initialise ATOM
91 * IfxGtm_Atom_Pwm_Config atomConfig; \\configuration structure
92 * IfxGtm_Atom_Pwm_Driver atomHandle; \\ handle
93 *
94 * IfxGtm_Atom_Pwm_initConfig(&atomConfig, gtm);
95 *
96 * atomConfig.tomChannel = IfxGtm_Tom_Ch_0;
97 * atomConfig.period = 20;
98 * atomConfig.dutyCycle = 10;
99 * atomConfig.interrupt.ccu0Enabled = TRUE;
100 * atomConfig.interrupt.isrPriority = ATOM0_CH0_PRIO;
101 * atomConfig.pin.outputPin = &IfxGtm_ATOM0_0_TOUT0_P02_0_OUT;
102 *
103 * IfxGtm_Atom_Pwm_init(&atomHandle, &atomConfig);
104 * \endcode
105 *
106 * ATOM will be now generating a PWM signal on the selected port pin while generating selected interrupt according to above configured period and duty cycle.
107 *
108 * \defgroup IfxLld_Gtm_Atom_Pwm ATOM PWM Interface Driver
109 * \ingroup IfxLld_Gtm_Atom
110 * \defgroup IfxLld_Gtm_Atom_Pwm_DataStructures ATOM PWM DataStructures
111 * \ingroup IfxLld_Gtm_Atom_Pwm
112 * \defgroup IfxLld_Gtm_Atom_Pwm_Pwm_Functions Pwm Functions
113 * \ingroup IfxLld_Gtm_Atom_Pwm
114 */
115
116 #ifndef IFXGTM_ATOM_PWM_H
117 #define IFXGTM_ATOM_PWM_H 1
118
119 /******************************************************************************/
120 /*----------------------------------Includes----------------------------------*/
121 /******************************************************************************/
122
123 #include "_PinMap/IfxGtm_PinMap.h"
124 #include "Gtm/Std/IfxGtm_Atom.h"
125 #include "Gtm/Std/IfxGtm_Cmu.h"
126 #include "Cpu/Std/IfxCpu.h"
127
128 /******************************************************************************/
129 /*-----------------------------Data Structures--------------------------------*/
130 /******************************************************************************/
131
132 /** \addtogroup IfxLld_Gtm_Atom_Pwm_DataStructures
133 * \{ */
134 /** \brief configuration structure for interrupts
135 */
136 typedef struct
137 {
138 boolean ccu0Enabled; /**< \brief Enable/Disable choice for CCU0 trigger interrupt */
139 boolean ccu1Enabled; /**< \brief Enable/Disable choice for CCU1 trigger interrupt */
140 IfxGtm_IrqMode mode; /**< \brief IRQ mode of interrupt */
141 IfxSrc_Tos isrProvider; /**< \brief Type of Service for Ccu0/1 interrupt */
142 Ifx_Priority isrPriority; /**< \brief Priority for Ccu0/1 interrupt */
143 } IfxGtm_Atom_Pwm_Interrupt;
144
145 /** \brief configuration structure for output pin
146 */
147 typedef struct
148 {
149 IfxGtm_Atom_ToutMap *outputPin; /**< \brief output pin */
150 IfxPort_OutputMode outputMode; /**< \brief Output mode */
151 IfxPort_PadDriver padDriver; /**< \brief Pad driver */
152 } IfxGtm_Atom_Pwm_pin;
153
154 /** \} */
155
156 /** \addtogroup IfxLld_Gtm_Atom_Pwm_DataStructures
157 * \{ */
158 /** \brief Configuration structure
159 */
160 typedef struct
161 {
162 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
163 IfxGtm_Atom atom; /**< \brief Index of the ATOM object used */
164 IfxGtm_Atom_Ch atomChannel; /**< \brief ATOM channel used for the timer */
165 IfxGtm_Atom_Mode mode; /**< \brief Atom mode of operation */
166 uint32 period; /**< \brief Period */
167 uint32 dutyCycle; /**< \brief Duty Cycle */
168 Ifx_ActiveState signalLevel; /**< \brief Signal Level */
169 boolean oneShotModeEnabled; /**< \brief Enable/Disable the one shot mode */
170 boolean synchronousUpdateEnabled; /**< \brief Synchronous or Asynchronous update */
171 boolean immediateStartEnabled; /**< \brief enable immediate start after init */
172 IfxGtm_Atom_Pwm_Interrupt interrupt; /**< \brief configuration structure for interrupt */
173 IfxGtm_Atom_Pwm_pin pin; /**< \brief configuration structure for output pin */
174 } IfxGtm_Atom_Pwm_Config;
175
176 /** \brief Driver Handle
177 */
178 typedef struct
179 {
180 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
181 IfxGtm_Atom atomIndex; /**< \brief Index of the ATOM object used */
182 IfxGtm_Atom_Ch atomChannel; /**< \brief ATOM channel used for the timer */
183 Ifx_GTM_ATOM *atom; /**< \brief Pointer to the ATOM object */
184 Ifx_GTM_ATOM_AGC *agc; /**< \brief Pointer to the AGC object */
185 IfxGtm_Atom_Mode mode; /**< \brief Atom mode of operation */
186 } IfxGtm_Atom_Pwm_Driver;
187
188 /** \} */
189
190 /** \addtogroup IfxLld_Gtm_Atom_Pwm_Pwm_Functions
191 * \{ */
192
193 /******************************************************************************/
194 /*-------------------------Global Function Prototypes-------------------------*/
195 /******************************************************************************/
196
197 /** \brief Initialises the Timer object
198 * \param driver ATOM Handle
199 * \param config Configuration structure for ATOM
200 * \return TRUE on success else FALSE
201 */
202 IFX_EXTERN boolean IfxGtm_Atom_Pwm_init(IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config);
203
204 /** \brief Initializes the configuration structure to default
205 * \param config This parameter is Initialised by the function
206 * \param gtm Pointer to GTM module
207 * \return None
208 */
209 IFX_EXTERN void IfxGtm_Atom_Pwm_initConfig(IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm);
210
211 /** \brief Starts the PWM generation from the configured channel.
212 * \param driver handle for the PWM device.
213 * \param immediate immediate start or not.
214 * \return None
215 */
216 IFX_EXTERN void IfxGtm_Atom_Pwm_start(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate);
217
218 /** \brief Stops the PWM generation from the configured channel
219 * \param driver handle for the PWM device
220 * \param immediate immediate start or not.
221 * \return None
222 */
223 IFX_EXTERN void IfxGtm_Atom_Pwm_stop(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate);
224
225 /** \} */
226
227 #endif /* IFXGTM_ATOM_PWM_H */
IfxGtm_Atom_Pwm_Config::immediateStartEnabled
boolean immediateStartEnabled
enable immediate start after init
Definition: IfxGtm_Atom_Pwm.h:171
IfxGtm_Atom_Pwm_Config::mode
IfxGtm_Atom_Mode mode
Atom mode of operation.
Definition: IfxGtm_Atom_Pwm.h:165
IfxGtm_Atom_Pwm_Config::oneShotModeEnabled
boolean oneShotModeEnabled
Enable/Disable the one shot mode.
Definition: IfxGtm_Atom_Pwm.h:169
IfxGtm_Atom_Pwm_Interrupt::ccu0Enabled
boolean ccu0Enabled
Enable/Disable choice for CCU0 trigger interrupt.
Definition: IfxGtm_Atom_Pwm.h:138
IfxGtm_Atom_Pwm_pin::outputPin
IfxGtm_Atom_ToutMap * outputPin
output pin
Definition: IfxGtm_Atom_Pwm.h:149
IfxGtm_Atom_Pwm_Interrupt
configuration structure for interrupts
Definition: IfxGtm_Atom_Pwm.h:136
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxGtm_Atom_Pwm_Config::period
uint32 period
Period.
Definition: IfxGtm_Atom_Pwm.h:166
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxGtm_Atom_Pwm_Driver::atomIndex
IfxGtm_Atom atomIndex
Index of the ATOM object used.
Definition: IfxGtm_Atom_Pwm.h:181
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Atom_Pwm_pin
configuration structure for output pin
Definition: IfxGtm_Atom_Pwm.h:147
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:209
IfxGtm_Atom_Pwm_Config::interrupt
IfxGtm_Atom_Pwm_Interrupt interrupt
configuration structure for interrupt
Definition: IfxGtm_Atom_Pwm.h:172
IfxGtm_Atom_Pwm_Config::signalLevel
Ifx_ActiveState signalLevel
Signal Level.
Definition: IfxGtm_Atom_Pwm.h:168
IfxGtm_Atom_Pwm_Config::dutyCycle
uint32 dutyCycle
Duty Cycle.
Definition: IfxGtm_Atom_Pwm.h:167
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Atom_Pwm_Config::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Atom_Pwm.h:162
IfxGtm_Atom_Pwm_stop
IFX_EXTERN void IfxGtm_Atom_Pwm_stop(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel.
Definition: IfxGtm_Atom_Pwm.c:150
IfxGtm_Atom_Pwm_Interrupt::mode
IfxGtm_IrqMode mode
IRQ mode of interrupt.
Definition: IfxGtm_Atom_Pwm.h:140
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Atom_Pwm_Interrupt::ccu1Enabled
boolean ccu1Enabled
Enable/Disable choice for CCU1 trigger interrupt.
Definition: IfxGtm_Atom_Pwm.h:139
IfxGtm_Atom_Pwm_start
IFX_EXTERN void IfxGtm_Atom_Pwm_start(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Starts the PWM generation from the configured channel.
Definition: IfxGtm_Atom_Pwm.c:139
IfxGtm_Atom_Pwm_Config::pin
IfxGtm_Atom_Pwm_pin pin
configuration structure for output pin
Definition: IfxGtm_Atom_Pwm.h:173
IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:102
IfxGtm_Atom_Mode
IfxGtm_Atom_Mode
Enum for ATOM mode.
Definition: IfxGtm_Atom.h:91
IfxGtm_Atom_Pwm_Config::synchronousUpdateEnabled
boolean synchronousUpdateEnabled
Synchronous or Asynchronous update.
Definition: IfxGtm_Atom_Pwm.h:170
IfxGtm_Atom_Pwm_Config::atomChannel
IfxGtm_Atom_Ch atomChannel
ATOM channel used for the timer.
Definition: IfxGtm_Atom_Pwm.h:164
IfxGtm_Atom_Pwm_Config
Configuration structure.
Definition: IfxGtm_Atom_Pwm.h:160
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxCpu.h
CPU basic functionality.
IfxGtm_Atom_Pwm_pin::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxGtm_Atom_Pwm.h:151
IfxGtm_Atom_Pwm_Driver::agc
Ifx_GTM_ATOM_AGC * agc
Pointer to the AGC object.
Definition: IfxGtm_Atom_Pwm.h:184
IfxGtm_Atom_Pwm_Config::atom
IfxGtm_Atom atom
Index of the ATOM object used.
Definition: IfxGtm_Atom_Pwm.h:163
IfxGtm_Atom_Pwm_Driver::atom
Ifx_GTM_ATOM * atom
Pointer to the ATOM object.
Definition: IfxGtm_Atom_Pwm.h:183
IfxGtm_Atom_Pwm_Driver
Driver Handle.
Definition: IfxGtm_Atom_Pwm.h:178
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Atom_Pwm_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Type of Service for Ccu0/1 interrupt.
Definition: IfxGtm_Atom_Pwm.h:141
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Atom_Pwm_pin::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxGtm_Atom_Pwm.h:150
IfxGtm_Atom_Pwm_initConfig
IFX_EXTERN void IfxGtm_Atom_Pwm_initConfig(IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Atom_Pwm.c:116
IfxGtm_Atom.h
GTM basic functionality.
IfxGtm_Atom_Pwm_Interrupt::isrPriority
Ifx_Priority isrPriority
Priority for Ccu0/1 interrupt.
Definition: IfxGtm_Atom_Pwm.h:142
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:219
IfxGtm_Atom_Pwm_init
IFX_EXTERN boolean IfxGtm_Atom_Pwm_init(IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
Initialises the Timer object.
Definition: IfxGtm_Atom_Pwm.c:52


iLLD_TC26B: IfxGtm_Atom_PwmHl.c Source File

  • Gtm
  • Atom
  • PwmHl
IfxGtm_Atom_PwmHl.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_PwmHl.c
3 * \brief GTM PWMHL details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Atom_PwmHl.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "stddef.h"
49 #include "string.h"
50
51 /** \addtogroup IfxLld_Gtm_Atom_PwmHl_PwmHl_StdIf_Functions
52 * \{ */
53 /******************************************************************************/
54 /*------------------------Inline Function Prototypes--------------------------*/
55 /******************************************************************************/
56
57 /** \brief Inverts the active state
58 * \param activeState Active state
59 * \return State
60 */
61 IFX_INLINE Ifx_ActiveState IfxGtm_Atom_PwmHl_invertActiveState(Ifx_ActiveState activeState);
62
63 /******************************************************************************/
64 /*-----------------------Private Function Prototypes--------------------------*/
65 /******************************************************************************/
66
67 /** \brief Sets switched to OFF
68 * \param driver GTM ATOM PWM driver
69 * \param tOn ON time
70 * \param shift Shift value in ticks
71 * \return None
72 */
73 IFX_STATIC void IfxGtm_Atom_PwmHl_updateAndShiftOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
74
75 /** \brief Updates the x output duty cycle in center aligned and center aligned inverted modes
76 * \param driver GTM ATOM PWM driver
77 * \param tOn T on
78 * \return None
79 */
80 IFX_STATIC void IfxGtm_Atom_PwmHl_updateCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
81
82 /** \brief Updates the x output duty cycle in edge aligned modes (left and right aligned)
83 * \param driver GTM ATOM PWM driver
84 * \param tOn T on
85 * \return None
86 */
87 IFX_STATIC void IfxGtm_Atom_PwmHl_updateEdgeAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
88
89 /** \brief Set the outputs to inactive
90 * \param driver GTM ATOM PWM driver
91 * \param tOn T on
92 * \return None
93 */
94 IFX_STATIC void IfxGtm_Atom_PwmHl_updateOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
95
96 /** \brief Update Pulse
97 * \param driver GTM ATOM PWM driver
98 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
99 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
100 * \return None
101 */
102 IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset);
103
104 /** \brief Set Pulse to OFF
105 * \param driver GTM ATOM PWM driver
106 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
107 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
108 * \return None
109 */
110 IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulseOff(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset);
111
112 /** \brief Update Shift Center Aligned
113 * \param driver GTM ATOM PWM driver
114 * \param tOn ON time
115 * \param shift Shift value in ticks
116 * \return None
117 */
118 IFX_STATIC void IfxGtm_Atom_PwmHl_updateShiftCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
119
120 /** \} */
121
122 /******************************************************************************/
123 /*------------------------Private Variables/Constants-------------------------*/
124 /******************************************************************************/
125
126 IFX_STATIC IFX_CONST IfxGtm_Atom_PwmHl_Mode IfxGtm_Atom_PwmHl_modes[Ifx_Pwm_Mode_off + 1] = {
127 {Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Atom_PwmHl_updateCenterAligned, &IfxGtm_Atom_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_PwmHl_updatePulse },
128 {Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Atom_PwmHl_updateCenterAligned, &IfxGtm_Atom_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_PwmHl_updatePulse },
129 {Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Atom_PwmHl_updateEdgeAligned, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulse },
130 {Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Atom_PwmHl_updateEdgeAligned, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulse },
131 {Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Atom_PwmHl_updateOff, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulseOff},
132 };
133
134 /******************************************************************************/
135 /*---------------------Inline Function Implementations------------------------*/
136 /******************************************************************************/
137
138 IFX_INLINE Ifx_ActiveState IfxGtm_Atom_PwmHl_invertActiveState(Ifx_ActiveState activeState)
139 {
140 return activeState == Ifx_ActiveState_low ? Ifx_ActiveState_high : Ifx_ActiveState_low;
141 }
142
143
144 /******************************************************************************/
145 /*-------------------------Function Implementations---------------------------*/
146 /******************************************************************************/
147
148 float32 IfxGtm_Atom_PwmHl_getDeadtime(IfxGtm_Atom_PwmHl *driver)
149 {
150 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.deadtime);
151 }
152
153
154 float32 IfxGtm_Atom_PwmHl_getMinPulse(IfxGtm_Atom_PwmHl *driver)
155 {
156 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.minPulse - driver->base.deadtime);
157 }
158
159
160 Ifx_Pwm_Mode IfxGtm_Atom_PwmHl_getMode(IfxGtm_Atom_PwmHl *driver)
161 {
162 return driver->base.mode;
163 }
164
165
166 boolean IfxGtm_Atom_PwmHl_init(IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
167 {
168 boolean result = TRUE;
169 uint16 channelMask;
170 uint16 channelsMask = 0;
171 uint32 channelIndex;
172
173 IfxGtm_Atom_Timer *timer = config->timer;
174
175 driver->base.mode = Ifx_Pwm_Mode_init;
176 driver->timer = timer;
177 driver->base.setMode = 0;
178 driver->base.inverted = FALSE;
179 driver->base.ccxActiveState = config->base.ccxActiveState;
180 driver->base.coutxActiveState = config->base.coutxActiveState;
181 driver->base.channelCount = config->base.channelCount;
182
183 IfxGtm_Atom_PwmHl_setDeadtime(driver, config->base.deadtime);
184 IfxGtm_Atom_PwmHl_setMinPulse(driver, config->base.minPulse);
185
186 driver->atom = &(timer->gtm->ATOM[config->atom]);
187 /* Only one AGC */
188 driver->agc = (Ifx_GTM_ATOM_AGC *)&driver->atom->AGC.GLB_CTRL;
189
190 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.channelCount <= IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS);
191
192 IfxGtm_Cmu_Clk clock = IfxGtm_Atom_Ch_getClockSource(timer->atom, timer->timerChannel);
193
194 for (channelIndex = 0; channelIndex < config->base.channelCount; channelIndex++)
195 {
196 IfxGtm_Atom_Ch channel;
197 /* CCX */
198 channel = config->ccx[channelIndex]->channel;
199 driver->ccx[channelIndex] = channel;
200 channelMask = 1 << channel;
201 channelsMask |= channelMask;
202
203 /* Initialize the timer part */
204 IfxGtm_Atom_Ch_configurePwmMode(driver->atom, channel, clock,
205 driver->base.inverted ? config->base.ccxActiveState :
206 IfxGtm_Atom_PwmHl_invertActiveState(config->base.ccxActiveState),
207 IfxGtm_Atom_Ch_ResetEvent_onTrigger, IfxGtm_Atom_Ch_OutputTrigger_forward);
208
209 /* Initialize the port */
210 if (config->initPins == TRUE)
211 {
212 IfxGtm_PinMap_setAtomTout(config->ccx[channelIndex],
213 config->base.outputMode, config->base.outputDriver);
214 }
215
216 /* COUTX */
217 channel = config->coutx[channelIndex]->channel;
218 driver->coutx[channelIndex] = channel;
219 channelMask = 1 << channel;
220 channelsMask |= channelMask;
221
222 /* Initialize the timer part */
223 IfxGtm_Atom_Ch_configurePwmMode(driver->atom, channel, clock,
224 driver->base.inverted ?
225 IfxGtm_Atom_PwmHl_invertActiveState(config->base.coutxActiveState)
226 : config->base.coutxActiveState,
227 IfxGtm_Atom_Ch_ResetEvent_onTrigger, IfxGtm_Atom_Ch_OutputTrigger_forward);
228
229 /* Initialize the port */
230 if (config->initPins == TRUE)
231 {
232 IfxGtm_PinMap_setAtomTout(config->coutx[channelIndex],
233 config->base.outputMode, config->base.outputDriver);
234 }
235 }
236
237 IfxGtm_Atom_Agc_enableChannelsOutput(driver->agc, channelsMask, 0, TRUE);
238 IfxGtm_Atom_Agc_enableChannels(driver->agc, channelsMask, 0, TRUE);
239
240 IfxGtm_Atom_PwmHl_setMode(driver, Ifx_Pwm_Mode_off);
241
242 Ifx_TimerValue tOn[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS] = {0};
243 IfxGtm_Atom_PwmHl_updateOff(driver, tOn); /* tOn do not need defined values */
244
245 /* Transfer the shadow registers */
246 IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, channelsMask, 0, 0, 0);
247 IfxGtm_Atom_Agc_trigger(driver->agc);
248 IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, 0, channelsMask, 0, 0);
249
250 /* Enable timer to update the channels */
251
252 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
253 {
254 IfxGtm_Atom_Timer_addToChannelMask(timer, driver->ccx[channelIndex]);
255 IfxGtm_Atom_Timer_addToChannelMask(timer, driver->coutx[channelIndex]);
256 }
257
258 return result;
259 }
260
261
262 void IfxGtm_Atom_PwmHl_initConfig(IfxGtm_Atom_PwmHl_Config *config)
263 {
264 IfxStdIf_PwmHl_initConfig(&config->base);
265 config->timer = NULL_PTR;
266 config->atom = IfxGtm_Atom_0;
267 config->ccx = NULL_PTR;
268 config->coutx = NULL_PTR;
269 config->initPins = TRUE;
270 }
271
272
273 boolean IfxGtm_Atom_PwmHl_setDeadtime(IfxGtm_Atom_PwmHl *driver, float32 deadtime)
274 {
275 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, deadtime);
276 driver->base.deadtime = value;
277
278 return TRUE;
279 }
280
281
282 boolean IfxGtm_Atom_PwmHl_setMinPulse(IfxGtm_Atom_PwmHl *driver, float32 minPulse)
283 {
284 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, minPulse);
285
286 driver->base.minPulse = value + driver->base.deadtime;
287 driver->base.maxPulse = driver->timer->base.period - driver->base.minPulse;
288
289 return TRUE;
290 }
291
292
293 boolean IfxGtm_Atom_PwmHl_setMode(IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
294 {
295 boolean result = TRUE;
296 IfxGtm_Atom_PwmHl_Base *base = &driver->base;
297
298 if (base->mode != mode)
299 {
300 if ((mode > Ifx_Pwm_Mode_off) || (IfxGtm_Atom_PwmHl_modes[mode].update == NULL_PTR))
301 {
302 mode = Ifx_Pwm_Mode_off;
303 result = FALSE;
304 }
305
306 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode == IfxGtm_Atom_PwmHl_modes[mode].mode);
307
308 base->mode = mode;
309 driver->update = IfxGtm_Atom_PwmHl_modes[mode].update;
310 driver->updateAndShift = IfxGtm_Atom_PwmHl_modes[mode].updateAndShift;
311 driver->updatePulse = IfxGtm_Atom_PwmHl_modes[mode].updatePulse;
312
313 if (base->mode != Ifx_Pwm_Mode_off)
314 {
315 base->inverted = IfxGtm_Atom_PwmHl_modes[mode].inverted;
316 }
317 else
318 { /* Keep previous inverted for off mode */
319 }
320
321 if (base->inverted)
322 {
323 driver->ccxTemp = driver->coutx;
324 driver->coutxTemp = driver->ccx;
325 }
326 else
327 {
328 driver->ccxTemp = driver->ccx;
329 driver->coutxTemp = driver->coutx;
330 }
331
332 { /* Workaround to enable the signal inversion required for center aligned inverted
333 * and right aligned modes */
334 /** \note Changing signal level may produce short circuit at the power stage,
335 * in which case the inverter must be disable during this action.*/
336
337 /* Ifx_Pwm_Mode_centerAligned and Ifx_Pwm_Mode_LeftAligned use inverted=FALSE */
338 /* Ifx_Pwm_Mode_centerAlignedInverted and Ifx_Pwm_Mode_RightAligned use inverted=TRUE */
339 uint32 channelIndex;
340
341 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
342 {
343 IfxGtm_Atom_Ch channel;
344
345 channel = driver->ccx[channelIndex];
346 IfxGtm_Atom_Ch_setSignalLevel(driver->atom, channel, base->inverted
347 ? base->ccxActiveState
348 : IfxGtm_Atom_PwmHl_invertActiveState(driver->base.ccxActiveState));
349
350 channel = driver->coutx[channelIndex];
351 IfxGtm_Atom_Ch_setSignalLevel(driver->atom, channel, base->inverted
352 ? IfxGtm_Atom_PwmHl_invertActiveState(driver->base.coutxActiveState)
353 : base->coutxActiveState);
354 }
355 }
356 }
357
358 return result;
359 }
360
361
362 void IfxGtm_Atom_PwmHl_setOnTime(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
363 {
364 driver->update(driver, tOn);
365 }
366
367
368 void IfxGtm_Atom_PwmHl_setOnTimeAndShift(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
369 {
370 driver->updateAndShift(driver, tOn, shift);
371 }
372
373
374 void IfxGtm_Atom_PwmHl_setPulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
375 {
376 driver->updatePulse(driver, tOn, offset);
377 }
378
379
380 void IfxGtm_Atom_PwmHl_setupChannels(IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
381 {
382 /* Dummy Function for StdIf Compile*/
383 IFX_UNUSED_PARAMETER(driver)
384 IFX_UNUSED_PARAMETER(activeCh)
385 IFX_UNUSED_PARAMETER(stuckSt)
386 }
387
388
389 boolean IfxGtm_Atom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
390 {
391 /* Ensure the stdif is reset to zeros */
392 memset(stdif, 0, sizeof(IfxStdIf_PwmHl));
393
394 /* *INDENT-OFF* Note: this file was indented manually by the author. */
395 /* Set the API link */
396 stdif->driver = driver;
397 stdif->setDeadtime = (IfxStdIf_PwmHl_SetDeadtime )&IfxGtm_Atom_PwmHl_setDeadtime;
398 stdif->getDeadtime = (IfxStdIf_PwmHl_GetDeadtime )&IfxGtm_Atom_PwmHl_getDeadtime;
399 stdif->setMinPulse = (IfxStdIf_PwmHl_SetMinPulse )&IfxGtm_Atom_PwmHl_setMinPulse;
400 stdif->getMinPulse = (IfxStdIf_PwmHl_GetMinPulse )&IfxGtm_Atom_PwmHl_getMinPulse;
401 stdif->getMode = (IfxStdIf_PwmHl_GetMode )&IfxGtm_Atom_PwmHl_getMode;
402 stdif->setMode = (IfxStdIf_PwmHl_SetMode )&IfxGtm_Atom_PwmHl_setMode;
403 stdif->setOnTime = (IfxStdIf_PwmHl_SetOnTime )&IfxGtm_Atom_PwmHl_setOnTime;
404 stdif->setOnTimeAndShift = (IfxStdIf_PwmHl_SetOnTimeAndShift)&IfxGtm_Atom_PwmHl_setOnTimeAndShift;
405 stdif->setPulse = (IfxStdIf_PwmHl_SetPulse )&IfxGtm_Atom_PwmHl_setPulse;
406 stdif->setupChannels = (IfxStdIf_PwmHl_SetupChannels )&IfxGtm_Atom_PwmHl_setupChannels;
407 IfxGtm_Atom_Timer_stdIfTimerInit(&stdif->timer, driver->timer);
408 /* *INDENT-ON* */
409
410 return TRUE;
411 }
412
413
414 IFX_STATIC void IfxGtm_Atom_PwmHl_updateAndShiftOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
415 {
416 IfxGtm_Atom_PwmHl_updateOff(driver, NULL_PTR);
417 IFX_UNUSED_PARAMETER(tOn)
418 IFX_UNUSED_PARAMETER(shift)
419 }
420
421
422 IFX_STATIC void IfxGtm_Atom_PwmHl_updateCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
423 {
424 uint8 channelIndex;
425 Ifx_TimerValue period;
426 Ifx_TimerValue deadtime = driver->base.deadtime;
427
428 period = driver->timer->base.period;
429
430 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
431 {
432 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
433 Ifx_TimerValue cm0, cm1;
434 x = tOn[channelIndex];
435
436 if (driver->base.inverted != FALSE)
437 {
438 x = period - x;
439 }
440 else
441 {}
442
443 if ((x < driver->base.minPulse) || (x <= deadtime))
444 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
445 x = 0;
446 }
447 else if (x > driver->base.maxPulse)
448 {
449 x = period;
450 }
451 else
452 {}
453
454 /* Special handling due to GTM issue */
455 if (x == period)
456 { /* 100% duty cycle */
457 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
458 period + 1 /* No compare event */,
459 2 /* 1st compare event (issue: expected to be 1)*/ + deadtime);
460 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex],
461 period + 2 /* No compare event, issues has been seen with +1 */,
462 2 /* 1st compare event (issue: expected to be 1)*/);
463 }
464 else if (x == 0)
465 {
466 cm0 = 1;
467 cm1 = period + 2;
468 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
469 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
470 }
471 else
472 { /* x% duty cycle */
473 cm1 = (period - x) / 2; // CM1
474 cm0 = (period + x) / 2; // CM0
475 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
476 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
477 }
478 }
479 }
480
481
482 IFX_STATIC void IfxGtm_Atom_PwmHl_updateEdgeAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
483 {
484 uint8 channelIndex;
485 Ifx_TimerValue period;
486 Ifx_TimerValue deadtime = driver->base.deadtime;
487
488 period = driver->timer->base.period;
489
490 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
491 {
492 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
493 Ifx_TimerValue cm0, cm1;
494 x = tOn[channelIndex];
495
496 if (driver->base.inverted != FALSE)
497 {
498 x = period - x;
499 }
500 else
501 {}
502
503 if ((x < driver->base.minPulse) || (x <= deadtime))
504 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
505 x = 0;
506 }
507 else if (x > driver->base.maxPulse)
508 {
509 x = period;
510 }
511 else
512 {}
513
514 /* Special handling due to GTM issue */
515 if (x == period)
516 { /* 100% duty cycle */
517 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
518 period + 1 /* No compare event */,
519 2 /* 1st compare event (issue: expected to be 1)*/ + deadtime);
520 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex],
521 period + 2 /* No compare event, issues has been seen with +1 */,
522 2 /* 1st compare event (issue: expected to be 1)*/);
523 }
524 else if (x == 0)
525 {
526 cm0 = 1;
527 cm1 = period + 2;
528 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
529 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
530 }
531 else
532 { /* x% duty cycle */
533 cm1 = 2; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
534 cm0 = x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
535 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
536 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
537 }
538 }
539 }
540
541
542 IFX_STATIC void IfxGtm_Atom_PwmHl_updateOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
543 {
544 IFX_UNUSED_PARAMETER(tOn)
545 uint8 channelIndex;
546 Ifx_TimerValue period;
547 period = driver->timer->base.period;
548
549 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
550 {
551 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
552 2 /* 1 will keep the previous level*/, period + 2);
553 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], period + 1, 2);
554 }
555 }
556
557
558 IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
559 {
560 uint8 channelIndex;
561 Ifx_TimerValue period;
562
563 period = driver->timer->base.period;
564
565 /* Top channels */
566 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
567 {
568 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
569 Ifx_TimerValue o;
570 Ifx_TimerValue cm0, cm1;
571
572 x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex]);
573 o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex]);
574
575 if (driver->base.inverted != FALSE)
576 {
577 x = period - x;
578 }
579 else
580 {}
581
582 if ((x < driver->base.minPulse) || (o > period))
583 {
584 x = 0;
585 }
586 else if ((x > driver->base.maxPulse) || (o + x > period))
587 {
588 x = period;
589 }
590 else
591 {}
592
593 /* Special handling due to GTM issue */
594 if (x == period)
595 { /* 100% duty cycle */
596 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
597 period + 1 /* No compare event */,
598 2 /* 1st compare event (issue: expected to be 1)*/);
599 }
600 else if (x == 0)
601 {
602 cm0 = 1;
603 cm1 = period + 2;
604 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
605 }
606 else
607 { /* x% duty cycle */
608 cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
609 cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
610 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
611 }
612 }
613
614 /* Bottom channels */
615 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
616 {
617 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
618 Ifx_TimerValue o;
619 Ifx_TimerValue cm0, cm1;
620
621 x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex + driver->base.channelCount]);
622 o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex + driver->base.channelCount]);
623
624 if (driver->base.inverted != FALSE)
625 {
626 x = period - x;
627 }
628 else
629 {}
630
631 if (x < driver->base.minPulse)
632 {
633 x = 0;
634 }
635 else if (x > driver->base.maxPulse)
636 {
637 x = period;
638 }
639 else
640 {}
641
642 /* Special handling due to GTM issue */
643 if (x == period)
644 { /* 100% duty cycle */
645 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex],
646 period + 2 /* No compare event, issues has been seen with +1 */,
647 2 /* 1st compare event (issue: expected to be 1)*/);
648 }
649 else if (x == 0)
650 {
651 cm0 = 1;
652 cm1 = period + 2;
653 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0, cm1);
654 }
655 else
656 { /* x% duty cycle */
657 cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
658 cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
659 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0, cm1);
660 }
661 }
662 }
663
664
665 IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulseOff(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
666 {
667 IFX_UNUSED_PARAMETER(tOn)
668 IFX_UNUSED_PARAMETER(offset)
669
670 IfxGtm_Atom_PwmHl_updateOff(driver, NULL_PTR);
671 }
672
673
674 IFX_STATIC void IfxGtm_Atom_PwmHl_updateShiftCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
675 {
676 uint8 channelIndex;
677 Ifx_TimerValue period;
678 Ifx_TimerValue deadtime = driver->base.deadtime;
679
680 period = driver->timer->base.period;
681
682 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
683 {
684 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
685 Ifx_TimerValue s; /* Shift value */
686 Ifx_TimerValue cm0, cm1;
687 x = tOn[channelIndex];
688
689 if (driver->base.inverted != FALSE)
690 {
691 x = period - x;
692 }
693 else
694 {}
695
696 if ((x < driver->base.minPulse) || (x <= deadtime))
697 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
698 x = 0;
699 }
700 else if (x > driver->base.maxPulse)
701 {
702 x = period;
703 }
704 else
705 {}
706
707 /* Special handling due to GTM issue */
708 if (x == period)
709 { /* 100% duty cycle */
710 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
711 period + 1 /* No compare event */,
712 2 /* 1st compare event (issue: expected to be 1)*/ + deadtime);
713 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex],
714 period + 2 /* No compare event, issues has been seen with +1 */,
715 2 /* 1st compare event (issue: expected to be 1)*/);
716 }
717 else if (x == 0)
718 {
719 cm0 = 1;
720 cm1 = period + 2;
721 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
722 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
723 }
724 else
725 { /* x% duty cycle */
726 s = shift[channelIndex];
727
728 if (s > 0)
729 {
730 s = __minX(s, (period - x) / 2 - 1);
731 }
732 else
733 {
734 s = __maxX(s, (x - period) / 2 + 1);
735 }
736
737 cm1 = s + (period - x) / 2; // CM1
738 cm0 = s + (period + x) / 2; // CM0
739 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
740 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
741 }
742 }
743 }
IfxGtm_Atom_Agc_enableChannelsOutput
void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Atom.c:169
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxStdIf_PwmHl_::timer
IfxStdIf_Timer timer
Timer related standard interface.
Definition: IfxStdIf_PwmHl.h:196
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxGtm_Atom_PwmHl_updateAndShiftOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updateAndShiftOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF.
Definition: IfxGtm_Atom_PwmHl.c:414
IfxGtm_Atom_Timer_stdIfTimerInit
boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Atom_Timer.c:351
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
IfxGtm_Atom_PwmHl_Config::atom
IfxGtm_Atom atom
ATOM unit used.
Definition: IfxGtm_Atom_PwmHl.h:151
IfxGtm_Atom_PwmHl_init
boolean IfxGtm_Atom_PwmHl_init(IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do n...
Definition: IfxGtm_Atom_PwmHl.c:166
IfxGtm_Atom_PwmHl_updateShiftCenterAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateShiftCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned.
Definition: IfxGtm_Atom_PwmHl.c:674
IfxGtm_Atom_ToutMap::channel
IfxGtm_Atom_Ch channel
ATOM channel index.
Definition: IfxGtm_PinMap.h:105
IfxGtm_Atom_PwmHl_s::updateAndShift
IfxGtm_Atom_PwmHl_UpdateShift updateAndShift
Update shift function for actual selected mode.
Definition: IfxGtm_Atom_PwmHl.h:176
IfxStdIf_PwmHl_::setupChannels
IfxStdIf_PwmHl_SetupChannels setupChannels
IfxStdIf_PwmHl_SetupChannels.
Definition: IfxStdIf_PwmHl.h:194
IfxGtm_Atom_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxGtm_Atom_PwmHl.h:134
IfxGtm_Atom_Timer::atom
Ifx_GTM_ATOM * atom
ATOM used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:121
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxStdIf_PwmHl_::getMinPulse
IfxStdIf_PwmHl_GetMinPulse getMinPulse
IfxStdIf_PwmHl_GetMinPulse.
Definition: IfxStdIf_PwmHl.h:188
IfxGtm_Atom_PwmHl_Config
GTM ATOM: PWM HL configuration.
Definition: IfxGtm_Atom_PwmHl.h:147
IfxGtm_Atom_Timer::gtm
Ifx_GTM * gtm
GTM module used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:120
IfxStdIf_PwmHl_::getDeadtime
IfxStdIf_PwmHl_GetDeadtime getDeadtime
IfxStdIf_PwmHl_GetDeadtime.
Definition: IfxStdIf_PwmHl.h:185
IfxGtm_Atom_Agc_setChannelsForceUpdate
void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Atom.c:235
IfxGtm_Atom_PwmHl.h
GTM PWMHL details.
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
IfxGtm_Atom_Ch_getClockSource
IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Atom.c:306
IfxGtm_Atom_PwmHl_initConfig
void IfxGtm_Atom_PwmHl_initConfig(IfxGtm_Atom_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxGtm_Atom_PwmHl.c:262
IfxStdIf_PwmHl_SetupChannels
void(* IfxStdIf_PwmHl_SetupChannels)(IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxStdIf_PwmHl.h:175
IfxStdIf_PwmHl_GetMode
Ifx_Pwm_Mode(* IfxStdIf_PwmHl_GetMode)(IfxStdIf_InterfaceDriver stdIf)
Return the PWM mode.
Definition: IfxStdIf_PwmHl.h:125
IfxStdIf_PwmHl_initConfig
void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
Definition: IfxStdIf_PwmHl.c:45
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output...
Definition: IfxGtm_Atom_PwmHl.h:106
IfxGtm_Atom_Timer::timerChannel
IfxGtm_Atom_Ch timerChannel
ATOM channel used for the timer.
Definition: IfxGtm_Atom_Timer.h:124
IfxGtm_Atom_Timer
TOM Timer interface.
Definition: IfxGtm_Atom_Timer.h:117
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Atom_Ch_configurePwmMode
void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
Definition: IfxGtm_Atom.c:278
Ifx_Assert.h
Assert functions.
IfxGtm_Atom_PwmHl_updateEdgeAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateEdgeAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxGtm_Atom_PwmHl.c:482
IfxStdIf_PwmHl_::setPulse
IfxStdIf_PwmHl_SetPulse setPulse
IfxStdIf_PwmHl_Pulse.
Definition: IfxStdIf_PwmHl.h:193
IfxGtm_Atom_PwmHl_s::timer
IfxGtm_Atom_Timer * timer
Pointer to the linked timer object.
Definition: IfxGtm_Atom_PwmHl.h:174
IfxGtm_Atom_PwmHl_setMode
boolean IfxGtm_Atom_PwmHl_setMode(IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxGtm_Atom_PwmHl.c:293
__maxX
#define __maxX
Definition: IfxCpu_IntrinsicsDcc.h:1597
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Atom_PwmHl_s::ccxTemp
IfxGtm_Atom_Ch * ccxTemp
cached value
Definition: IfxGtm_Atom_PwmHl.h:182
IfxGtm_Atom_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxGtm_Atom_PwmHl.h:132
IfxGtm_Atom_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Atom_PwmHl.h:128
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxStdIf_PwmHl_Config::deadtime
float32 deadtime
Dead time between the top and bottom channels in seconds.
Definition: IfxStdIf_PwmHl.h:202
IfxGtm_Atom_Ch_setCompareShadow
IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values.
Definition: IfxGtm_Atom.h:619
IfxGtm_Atom_PwmHl_s::agc
Ifx_GTM_ATOM_AGC * agc
AGC unit used.
Definition: IfxGtm_Atom_PwmHl.h:179
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStdIf_PwmHl_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_PwmHl.h:181
IfxGtm_Atom_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxGtm_Atom_PwmHl.h:136
IfxGtm_Atom_Timer_addToChannelMask
void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run.
Definition: IfxGtm_Atom_Timer.c:88
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxGtm_Atom_PwmHl_invertActiveState
IFX_INLINE Ifx_ActiveState IfxGtm_Atom_PwmHl_invertActiveState(Ifx_ActiveState activeState)
Inverts the active state.
Definition: IfxGtm_Atom_PwmHl.c:138
IfxGtm_Atom_PwmHl_setupChannels
void IfxGtm_Atom_PwmHl_setupChannels(IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels.
Definition: IfxGtm_Atom_PwmHl.c:380
IfxStdIf_PwmHl_SetPulse
void(* IfxStdIf_PwmHl_SetPulse)(IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently.
Definition: IfxStdIf_PwmHl.h:156
IfxGtm_Atom_Agc_enableChannels
void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Atom.c:151
IfxGtm_Atom_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxGtm_Atom_PwmHl.h:149
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
IfxStdIf_PwmHl_GetMinPulse
float32(* IfxStdIf_PwmHl_GetMinPulse)(IfxStdIf_InterfaceDriver stdIf)
Return the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:117
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_Atom_PwmHl_s::coutx
IfxGtm_Atom_Ch coutx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]
ATOM channels used for the OUTX outputs.
Definition: IfxGtm_Atom_PwmHl.h:181
IfxStdIf_PwmHl_Config::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:208
IfxStdIf_PwmHl_Config::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxStdIf_PwmHl.h:211
Ifx_Pwm_Mode_init
Initialisation mode, do not use at run time.
Definition: Ifx_Types.h:182
IfxGtm_Atom_PwmHl_stdIfPwmHlInit
boolean IfxGtm_Atom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxGtm_Atom_PwmHl.c:389
IfxGtm_Atom_PwmHl_s::base
IfxGtm_Atom_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Atom_PwmHl.h:173
IfxGtm_Atom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Atom.h:77
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
IfxGtm_Atom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Atom.h:86
__minX
#define __minX
Definition: IfxCpu_IntrinsicsDcc.h:1593
IfxStdIf_PwmHl_::setOnTime
IfxStdIf_PwmHl_SetOnTime setOnTime
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:191
IfxGtm_Atom_PwmHl_getMode
Ifx_Pwm_Mode IfxGtm_Atom_PwmHl_getMode(IfxGtm_Atom_PwmHl *driver)
Returns Pwm mode.
Definition: IfxGtm_Atom_PwmHl.c:160
IfxStdIf_PwmHl_SetMinPulse
boolean(* IfxStdIf_PwmHl_SetMinPulse)(IfxStdIf_InterfaceDriver stdIf, float32 minPulse)
Set the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:109
IfxGtm_Atom_PwmHl_getMinPulse
float32 IfxGtm_Atom_PwmHl_getMinPulse(IfxGtm_Atom_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxGtm_Atom_PwmHl.c:154
IfxGtm_Atom_PwmHl_getDeadtime
float32 IfxGtm_Atom_PwmHl_getDeadtime(IfxGtm_Atom_PwmHl *driver)
Returns the dead time.
Definition: IfxGtm_Atom_PwmHl.c:148
IfxGtm_Atom_PwmHl_s::updatePulse
IfxGtm_Atom_PwmHl_UpdatePulse updatePulse
Update pulse function for actual selected mode.
Definition: IfxGtm_Atom_PwmHl.h:177
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxStdIf_PwmHl_Config::minPulse
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds.
Definition: IfxStdIf_PwmHl.h:203
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
IfxGtm_Atom_PwmHl_setPulse
void IfxGtm_Atom_PwmHl_setPulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent.
Definition: IfxGtm_Atom_PwmHl.c:374
IfxGtm_Atom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Atom_Timer.h:107
IfxGtm_Atom_PwmHl_updateCenterAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxGtm_Atom_PwmHl.c:422
IfxStdIf_PwmHl_::setMode
IfxStdIf_PwmHl_SetMode setMode
IfxStdIf_PwmHl_SetMode.
Definition: IfxStdIf_PwmHl.h:190
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
IfxStdIf_PwmHl_Config::outputMode
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:207
IfxGtm_Atom_PwmHl_s::ccx
IfxGtm_Atom_Ch ccx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]
ATOM channels used for the CCCX outputs.
Definition: IfxGtm_Atom_PwmHl.h:180
IfxGtm_Atom_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxGtm_Atom_PwmHl.h:135
IfxStdIf_PwmHl_SetDeadtime
boolean(* IfxStdIf_PwmHl_SetDeadtime)(IfxStdIf_InterfaceDriver stdIf, float32 deadtime)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:86
IfxGtm_Atom_Ch_setSignalLevel
void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Atom.c:505
IfxGtm_Atom_PwmHl_updatePulse
IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse.
Definition: IfxGtm_Atom_PwmHl.c:558
IfxGtm_Atom_Timer::base
IfxGtm_Atom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Atom_Timer.h:119
IfxGtm_Atom_PwmHl_setOnTime
void IfxGtm_Atom_PwmHl_setOnTime(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time.
Definition: IfxGtm_Atom_PwmHl.c:362
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxStdIf_PwmHl_Config::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxStdIf_PwmHl.h:204
IfxGtm_Atom_0
ATOM object 0.
Definition: IfxGtm_cfg.h:211
IfxGtm_Atom_PwmHl_setDeadtime
boolean IfxGtm_Atom_PwmHl_setDeadtime(IfxGtm_Atom_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxGtm_Atom_PwmHl.c:273
IfxStdIf_PwmHl_::setMinPulse
IfxStdIf_PwmHl_SetMinPulse setMinPulse
IfxStdIf_PwmHl_SetMinPulse.
Definition: IfxStdIf_PwmHl.h:187
IfxGtm_Atom_PwmHl_updatePulseOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulseOff(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF.
Definition: IfxGtm_Atom_PwmHl.c:665
IfxGtm_Atom_PwmHl_setMinPulse
boolean IfxGtm_Atom_PwmHl_setMinPulse(IfxGtm_Atom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxGtm_Atom_PwmHl.c:282
IfxStdIf_PwmHl_::setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:192
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxGtm_Atom_PwmHl_s::update
IfxGtm_Atom_PwmHl_Update update
Update function for actual selected mode.
Definition: IfxGtm_Atom_PwmHl.h:175
IfxStdIf_PwmHl_SetOnTime
void(* IfxStdIf_PwmHl_SetOnTime)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time.
Definition: IfxStdIf_PwmHl.h:140
IfxGtm_Atom_PwmHl_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver. User handles separately...
Definition: IfxGtm_Atom_PwmHl.h:154
IfxGtm_Atom_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxGtm_Atom_PwmHl.h:133
IfxStdIf_PwmHl_::getMode
IfxStdIf_PwmHl_GetMode getMode
IfxStdIf_PwmHl_GetMode.
Definition: IfxStdIf_PwmHl.h:189
IfxGtm_Atom_PwmHl_modes
IFX_STATIC IFX_CONST IfxGtm_Atom_PwmHl_Mode IfxGtm_Atom_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Definition: IfxGtm_Atom_PwmHl.c:126
IfxGtm_Atom_PwmHl_s::coutxTemp
IfxGtm_Atom_Ch * coutxTemp
cached value
Definition: IfxGtm_Atom_PwmHl.h:183
IfxGtm_Atom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Atom_Timer.h:105
IfxGtm_Atom_PwmHl_Config::ccx
IFX_CONST IfxGtm_Atom_ToutMapP * ccx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Atom_PwmHl.h:152
IfxGtm_Atom_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxGtm_Atom_PwmHl.h:131
IfxStdIf_PwmHl_SetOnTimeAndShift
void(* IfxStdIf_PwmHl_SetOnTimeAndShift)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value.
Definition: IfxStdIf_PwmHl.h:148
IfxStdIf_PwmHl_GetDeadtime
float32(* IfxStdIf_PwmHl_GetDeadtime)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time in s.
Definition: IfxStdIf_PwmHl.h:94
IfxStdIf_PwmHl_::setDeadtime
IfxStdIf_PwmHl_SetDeadtime setDeadtime
IfxStdIf_PwmHl_SetDeadtime.
Definition: IfxStdIf_PwmHl.h:184
IfxGtm_Atom_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxGtm_Atom_PwmHl.h:138
IfxGtm_Atom_Agc_trigger
void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Atom.c:256
IfxGtm_Atom_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxGtm_Atom_PwmHl.h:130
IfxGtm_Atom_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxGtm_Atom_PwmHl.h:137
IfxGtm_Atom_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxGtm_Atom_PwmHl.h:160
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxStdIf_PwmHl_Config::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxStdIf_PwmHl.h:212
IfxGtm_Atom_PwmHl_Config::coutx
IFX_CONST IfxGtm_Atom_ToutMapP * coutx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Atom_PwmHl.h:153
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxGtm_Atom_PwmHl_s
GTM ATOM PWM driver.
Definition: IfxGtm_Atom_PwmHl.h:171
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Atom_PwmHl_s::atom
Ifx_GTM_ATOM * atom
ATOM unit used.
Definition: IfxGtm_Atom_PwmHl.h:178
IfxGtm_Atom_PwmHl_setOnTimeAndShift
void IfxGtm_Atom_PwmHl_setOnTimeAndShift(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift.
Definition: IfxGtm_Atom_PwmHl.c:368
IfxGtm_Atom_PwmHl_updateOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updateOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxGtm_Atom_PwmHl.c:542
IfxStdIf_PwmHl_SetMode
boolean(* IfxStdIf_PwmHl_SetMode)(IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode.
Definition: IfxStdIf_PwmHl.h:133
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:219
IfxGtm_PinMap_setAtomTout
void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:718


iLLD_TC26B: IfxGtm_Atom_PwmHl.h Source File

  • Gtm
  • Atom
  • PwmHl
IfxGtm_Atom_PwmHl.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_PwmHl.h
3 * \brief GTM PWMHL details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Atom_PwmHl_Usage How to use the GTM ATOM PWM Driver
42 * \ingroup IfxLld_Gtm_Atom_PwmHl
43 *
44 * This driver implements the PWM functionalities as defined by \ref library_srvsw_stdif_pwmhl.
45 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_pwmhl "standard interface APIs".
46 *
47 * \section Specific Specific implementation
48 * Implementation is similar to \ref IfxLld_Gtm_Tom_PwmHl
49 *
50 * \todo add documentation
51 *
52 * For a detailed configuration of the microcontroller, see \ref IfxGtm_Atom_PwmHl_init().
53 *
54 * \section Example Usage example
55 * Initialisation is done by, e.g:
56 * \code
57 * IfxGtm_Atom_PwmHl_Config driverConfig;
58 * IfxGtm_Atom_PwmHl driverData;
59 * IfxStdIf_PwmHl pwmhl;
60 * IfxGtm_Atom_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
61 * IfxGtm_Atom_PwmHl_init(&driverData, &driverConfig);
62 * IfxGtm_Atom_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);
63 * \endcode
64 *
65 * During run-time, \ref library_srvsw_stdif_pwmhl "the interface functions" shall be used, e.g.:
66 * \code
67 * IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
68 * Ifx_TimerValue onTime[3]; // assume configured for three HL channels
69 *
70 * onTime[0] = 10;
71 * onTime[1] = 20;
72 * onTime[2] = 30;
73 *
74 * IfxStdIf_Timer_disableUpdate(timer);
75 * IfxStdIf_Timer_setPeriod(timer, period);
76 * IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
77 * IfxStdIf_Timer_applyUpdate(timer);
78 * \endcode
79 *
80 * \defgroup IfxLld_Gtm_Atom_PwmHl ATOM PWM HL Interface Driver
81 * \ingroup IfxLld_Gtm_Atom
82 * \defgroup IfxLld_Gtm_Atom_PwmHl_Data_Structures Data Structures
83 * \ingroup IfxLld_Gtm_Atom_PwmHl
84 * \defgroup IfxLld_Gtm_Atom_PwmHl_Functions PwmHl Functions
85 * \ingroup IfxLld_Gtm_Atom_PwmHl
86 * \defgroup IfxLld_Gtm_Atom_PwmHl_PwmHl_StdIf_Functions PwmHl StdIf Functions
87 * \ingroup IfxLld_Gtm_Atom_PwmHl
88 */
89
90 #ifndef IFXGTM_ATOM_PWMHL_H
91 #define IFXGTM_ATOM_PWMHL_H 1
92
93 /******************************************************************************/
94 /*----------------------------------Includes----------------------------------*/
95 /******************************************************************************/
96
97 #include "StdIf/IfxStdIf_PwmHl.h"
98 #include "Gtm/Atom/Timer/IfxGtm_Atom_Timer.h"
99
100 /******************************************************************************/
101 /*-----------------------------------Macros-----------------------------------*/
102 /******************************************************************************/
103
104 /** \brief Maximal number of channels handled by the driver. One channel has a top and bottom pwm output
105 */
106 #define IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS (8)
107
108 /******************************************************************************/
109 /*------------------------------Type Definitions------------------------------*/
110 /******************************************************************************/
111
112 typedef struct IfxGtm_Atom_PwmHl_s IfxGtm_Atom_PwmHl;
113
114 typedef void (*IfxGtm_Atom_PwmHl_Update)(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
115
116 typedef void (*IfxGtm_Atom_PwmHl_UpdateShift)(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
117
118 typedef void (*IfxGtm_Atom_PwmHl_UpdatePulse)(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset);
119
120 /******************************************************************************/
121 /*-----------------------------Data Structures--------------------------------*/
122 /******************************************************************************/
123
124 /** \addtogroup IfxLld_Gtm_Atom_PwmHl_Data_Structures
125 * \{ */
126 /** \brief Multi-channels PWM object definition (channels only)
127 */
128 typedef struct
129 {
130 Ifx_TimerValue deadtime; /**< \brief Dead time between the top and bottom channel in ticks */
131 Ifx_TimerValue minPulse; /**< \brief minimum pulse that is output, shorter pulse time will be output as 0% duty cycle */
132 Ifx_TimerValue maxPulse; /**< \brief internal parameter */
133 Ifx_Pwm_Mode mode; /**< \brief actual PWM mode */
134 sint8 setMode; /**< \brief A non zero flag indicates that the PWM mode is being modified */
135 Ifx_ActiveState ccxActiveState; /**< \brief Top PWM active state */
136 Ifx_ActiveState coutxActiveState; /**< \brief Bottom PWM active state */
137 boolean inverted; /**< \brief Flag indicating the center aligned inverted mode (TRUE) */
138 uint8 channelCount; /**< \brief Number of PWM channels, one channel is made of a top and bottom channel */
139 } IfxGtm_Atom_PwmHl_Base;
140
141 /** \} */
142
143 /** \addtogroup IfxLld_Gtm_Atom_PwmHl_Data_Structures
144 * \{ */
145 /** \brief GTM ATOM: PWM HL configuration
146 */
147 typedef struct
148 {
149 IfxStdIf_PwmHl_Config base; /**< \brief PWM HL standard interface configuration */
150 IfxGtm_Atom_Timer *timer; /**< \brief Pointer to the linked timer object */
151 IfxGtm_Atom atom; /**< \brief ATOM unit used */
152 IFX_CONST IfxGtm_Atom_ToutMapP *ccx; /**< \brief Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels */
153 IFX_CONST IfxGtm_Atom_ToutMapP *coutx; /**< \brief Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels */
154 boolean initPins; /**< \brief TRUE: Initialize pins in driver
155 * FALSE: Don't initialize pins in driver. User handles separately. */
156 } IfxGtm_Atom_PwmHl_Config;
157
158 /** \brief Structure for PWM configuration
159 */
160 typedef struct
161 {
162 Ifx_Pwm_Mode mode; /**< \brief Pwm Mode */
163 boolean inverted; /**< \brief Inverted configuration for the selected mode */
164 IfxGtm_Atom_PwmHl_Update update; /**< \brief update call back function for the selected mode */
165 IfxGtm_Atom_PwmHl_UpdateShift updateAndShift; /**< \brief update shift call back function for the selected mode */
166 IfxGtm_Atom_PwmHl_UpdatePulse updatePulse; /**< \brief update pulse call back function for the selected mode */
167 } IfxGtm_Atom_PwmHl_Mode;
168
169 /** \brief GTM ATOM PWM driver
170 */
171 struct IfxGtm_Atom_PwmHl_s
172 {
173 IfxGtm_Atom_PwmHl_Base base; /**< \brief Multi-channels PWM object definition (channels only) */
174 IfxGtm_Atom_Timer *timer; /**< \brief Pointer to the linked timer object */
175 IfxGtm_Atom_PwmHl_Update update; /**< \brief Update function for actual selected mode */
176 IfxGtm_Atom_PwmHl_UpdateShift updateAndShift; /**< \brief Update shift function for actual selected mode */
177 IfxGtm_Atom_PwmHl_UpdatePulse updatePulse; /**< \brief Update pulse function for actual selected mode */
178 Ifx_GTM_ATOM *atom; /**< \brief ATOM unit used */
179 Ifx_GTM_ATOM_AGC *agc; /**< \brief AGC unit used */
180 IfxGtm_Atom_Ch ccx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief ATOM channels used for the CCCX outputs */
181 IfxGtm_Atom_Ch coutx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief ATOM channels used for the OUTX outputs */
182 IfxGtm_Atom_Ch *ccxTemp; /**< \brief cached value */
183 IfxGtm_Atom_Ch *coutxTemp; /**< \brief cached value */
184 };
185
186 /** \} */
187
188 /** \addtogroup IfxLld_Gtm_Atom_PwmHl_Functions
189 * \{ */
190
191 /******************************************************************************/
192 /*-------------------------Global Function Prototypes-------------------------*/
193 /******************************************************************************/
194
195 /** \brief Initializes the timer object
196 * note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.
197 * \param driver GTM ATOM PWM driver
198 * \param config GTM ATOM: PWM HL configuration
199 * \return TRUE on success else FALSE
200 */
201 IFX_EXTERN boolean IfxGtm_Atom_PwmHl_init(IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config);
202
203 /** \brief Initialize the configuration structure to default
204 * \param config Channel configuration. This parameter is Initialised by the function
205 * \return None
206 */
207 IFX_EXTERN void IfxGtm_Atom_PwmHl_initConfig(IfxGtm_Atom_PwmHl_Config *config);
208
209 /** \} */
210
211 /** \addtogroup IfxLld_Gtm_Atom_PwmHl_PwmHl_StdIf_Functions
212 * \{ */
213
214 /******************************************************************************/
215 /*-------------------------Global Function Prototypes-------------------------*/
216 /******************************************************************************/
217
218 /** \brief Returns the dead time
219 * \see IfxStdIf_PwmHl_GetDeadtime
220 * \param driver GTM ATOM PWM driver
221 * \return Dead Time
222 */
223 IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getDeadtime(IfxGtm_Atom_PwmHl *driver);
224
225 /** \brief Returns the minimum pulse
226 * \see IfxStdIf_PwmHl_GetMinPulse
227 * \param driver GTM ATOM PWM driver
228 * \return Min Pulse
229 */
230 IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getMinPulse(IfxGtm_Atom_PwmHl *driver);
231
232 /** \brief Returns Pwm mode
233 * \see IfxStdIf_PwmHl_GetMode
234 * \param driver GTM ATOM PWM driver
235 * \return Pwm mode
236 */
237 IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Atom_PwmHl_getMode(IfxGtm_Atom_PwmHl *driver);
238
239 /** \brief Sets the dead time
240 * \see IfxStdIf_PwmHl_SetDeadtime
241 * \param driver GTM ATOM PWM driver
242 * \param deadtime Dead time value
243 * \return TRUE on success else FALSE
244 */
245 IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setDeadtime(IfxGtm_Atom_PwmHl *driver, float32 deadtime);
246
247 /** \brief Sets the minimum pulse
248 * \see IfxStdIf_PwmHl_SetMinPulse
249 * \param driver GTM ATOM PWM driver
250 * \param minPulse Minimum pulse
251 * \return TRUE on success else FALSE
252 */
253 IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMinPulse(IfxGtm_Atom_PwmHl *driver, float32 minPulse);
254
255 /** \brief Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
256 * \see IfxStdIf_PwmHl_SetMode
257 * \param driver GTM ATOM PWM driver
258 * \param mode Pwm mode
259 * \return TRUE on success else FALSE
260 */
261 IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMode(IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode);
262
263 /** \brief Sets the ON time
264 * \see IfxStdIf_PwmHl_SetOnTime
265 * \param driver GTM ATOM PWM driver
266 * \param tOn ON time
267 * \return None
268 */
269 IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTime(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
270
271 /** \brief Sets the ON time and Shift
272 * \param driver GTM ATOM PWM driver
273 * \param tOn ON time
274 * \param shift Shift value in ticks
275 * \return None
276 */
277 IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTimeAndShift(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
278
279 /** \brief Sets the ON time and offset, all switched are independent
280 * \param driver GTM ATOM PWM driver
281 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
282 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
283 * \return None
284 */
285 IFX_EXTERN void IfxGtm_Atom_PwmHl_setPulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset);
286
287 /** \brief Set up channels
288 * \see IfxStdIf_PwmHl_SetupChannels
289 * \param driver GTM ATOM PWM driver
290 * \param activeCh Active channel
291 * \param stuckSt Stuck state
292 * \return None
293 */
294 IFX_EXTERN void IfxGtm_Atom_PwmHl_setupChannels(IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt);
295
296 /** \brief Initialises the statndard interface Pwm
297 * \param stdif Standard interface object, will be initialized by the function
298 * \param driver Interface driver to be used by the standard interface. must be initialised separately
299 * \return TRUE on success else FALSE
300 */
301 IFX_EXTERN boolean IfxGtm_Atom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver);
302
303 /** \} */
304
305 #endif /* IFXGTM_ATOM_PWMHL_H */
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxGtm_Atom_PwmHl_Config::atom
IfxGtm_Atom atom
ATOM unit used.
Definition: IfxGtm_Atom_PwmHl.h:151
IfxGtm_Atom_PwmHl_init
IFX_EXTERN boolean IfxGtm_Atom_PwmHl_init(IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do n...
Definition: IfxGtm_Atom_PwmHl.c:166
IfxGtm_Atom_PwmHl_Mode::updateAndShift
IfxGtm_Atom_PwmHl_UpdateShift updateAndShift
update shift call back function for the selected mode
Definition: IfxGtm_Atom_PwmHl.h:165
IfxGtm_Atom_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxGtm_Atom_PwmHl.h:134
IfxGtm_Atom_PwmHl_Config
GTM ATOM: PWM HL configuration.
Definition: IfxGtm_Atom_PwmHl.h:147
IfxGtm_Atom_PwmHl_UpdatePulse
void(* IfxGtm_Atom_PwmHl_UpdatePulse)(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Definition: IfxGtm_Atom_PwmHl.h:118
IfxGtm_Atom_Timer.h
GTM TIMER details.
IfxGtm_Atom_PwmHl_initConfig
IFX_EXTERN void IfxGtm_Atom_PwmHl_initConfig(IfxGtm_Atom_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxGtm_Atom_PwmHl.c:262
IfxGtm_Atom_PwmHl_Update
void(* IfxGtm_Atom_PwmHl_Update)(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Definition: IfxGtm_Atom_PwmHl.h:114
IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output...
Definition: IfxGtm_Atom_PwmHl.h:106
IfxGtm_Atom_Timer
TOM Timer interface.
Definition: IfxGtm_Atom_Timer.h:117
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:209
IfxGtm_Atom_PwmHl_Config::timer
IfxGtm_Atom_Timer * timer
Pointer to the linked timer object.
Definition: IfxGtm_Atom_PwmHl.h:150
IfxGtm_Atom_PwmHl_setMode
IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMode(IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxGtm_Atom_PwmHl.c:293
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Atom_PwmHl_s::ccxTemp
IfxGtm_Atom_Ch * ccxTemp
cached value
Definition: IfxGtm_Atom_PwmHl.h:182
IfxGtm_Atom_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxGtm_Atom_PwmHl.h:132
IfxGtm_Atom_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Atom_PwmHl.h:128
IfxGtm_Atom_PwmHl_s::agc
Ifx_GTM_ATOM_AGC * agc
AGC unit used.
Definition: IfxGtm_Atom_PwmHl.h:179
IfxGtm_Atom_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxGtm_Atom_PwmHl.h:136
IfxGtm_Atom_PwmHl_UpdateShift
void(* IfxGtm_Atom_PwmHl_UpdateShift)(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Definition: IfxGtm_Atom_PwmHl.h:116
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxGtm_Atom_PwmHl_setupChannels
IFX_EXTERN void IfxGtm_Atom_PwmHl_setupChannels(IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels.
Definition: IfxGtm_Atom_PwmHl.c:380
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Atom_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxGtm_Atom_PwmHl.h:149
IfxGtm_Atom_PwmHl_s::coutx
IfxGtm_Atom_Ch coutx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]
ATOM channels used for the OUTX outputs.
Definition: IfxGtm_Atom_PwmHl.h:181
IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:102
IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration.
Definition: IfxStdIf_PwmHl.h:200
IfxGtm_Atom_PwmHl_stdIfPwmHlInit
IFX_EXTERN boolean IfxGtm_Atom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxGtm_Atom_PwmHl.c:389
IfxGtm_Atom_PwmHl_s::base
IfxGtm_Atom_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Atom_PwmHl.h:173
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IfxGtm_Atom_PwmHl_getMode
IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Atom_PwmHl_getMode(IfxGtm_Atom_PwmHl *driver)
Returns Pwm mode.
Definition: IfxGtm_Atom_PwmHl.c:160
IfxGtm_Atom_PwmHl_getMinPulse
IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getMinPulse(IfxGtm_Atom_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxGtm_Atom_PwmHl.c:154
IfxGtm_Atom_PwmHl_getDeadtime
IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getDeadtime(IfxGtm_Atom_PwmHl *driver)
Returns the dead time.
Definition: IfxGtm_Atom_PwmHl.c:148
IfxGtm_Atom_PwmHl_Mode::updatePulse
IfxGtm_Atom_PwmHl_UpdatePulse updatePulse
update pulse call back function for the selected mode
Definition: IfxGtm_Atom_PwmHl.h:166
IfxGtm_Atom_PwmHl_setPulse
IFX_EXTERN void IfxGtm_Atom_PwmHl_setPulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent.
Definition: IfxGtm_Atom_PwmHl.c:374
IfxStdIf_PwmHl.h
Standard interface: Multi-channels, dual-complementary PWM interface.
IfxGtm_Atom_PwmHl_s::ccx
IfxGtm_Atom_Ch ccx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]
ATOM channels used for the CCCX outputs.
Definition: IfxGtm_Atom_PwmHl.h:180
IfxGtm_Atom_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxGtm_Atom_PwmHl.h:135
IfxGtm_Atom_PwmHl_setOnTime
IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTime(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time.
Definition: IfxGtm_Atom_PwmHl.c:362
IfxGtm_Atom_PwmHl_setDeadtime
IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setDeadtime(IfxGtm_Atom_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxGtm_Atom_PwmHl.c:273
IfxGtm_Atom_PwmHl_setMinPulse
IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMinPulse(IfxGtm_Atom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxGtm_Atom_PwmHl.c:282
IfxGtm_Atom_PwmHl_Mode::update
IfxGtm_Atom_PwmHl_Update update
update call back function for the selected mode
Definition: IfxGtm_Atom_PwmHl.h:164
IfxGtm_Atom_PwmHl_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver. User handles separately...
Definition: IfxGtm_Atom_PwmHl.h:154
IfxGtm_Atom_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxGtm_Atom_PwmHl.h:133
IfxGtm_Atom_PwmHl_s::coutxTemp
IfxGtm_Atom_Ch * coutxTemp
cached value
Definition: IfxGtm_Atom_PwmHl.h:183
IfxGtm_Atom_PwmHl_Config::ccx
IFX_CONST IfxGtm_Atom_ToutMapP * ccx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Atom_PwmHl.h:152
IfxGtm_Atom_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxGtm_Atom_PwmHl.h:131
IfxGtm_Atom_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxGtm_Atom_PwmHl.h:138
IfxGtm_Atom_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxGtm_Atom_PwmHl.h:130
IfxGtm_Atom_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxGtm_Atom_PwmHl.h:137
IfxGtm_Atom_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxGtm_Atom_PwmHl.h:160
IfxGtm_Atom_PwmHl_Config::coutx
IFX_CONST IfxGtm_Atom_ToutMapP * coutx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Atom_PwmHl.h:153
IfxGtm_Atom_PwmHl_s
GTM ATOM PWM driver.
Definition: IfxGtm_Atom_PwmHl.h:171
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Atom_PwmHl_s::atom
Ifx_GTM_ATOM * atom
ATOM unit used.
Definition: IfxGtm_Atom_PwmHl.h:178
IfxGtm_Atom_PwmHl_setOnTimeAndShift
IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTimeAndShift(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift.
Definition: IfxGtm_Atom_PwmHl.c:368
sint8
signed char sint8
Definition: Platform_Types.h:125
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:219


iLLD_TC26B: IfxGtm_Atom_Timer.c Source File

  • Gtm
  • Atom
  • Timer
IfxGtm_Atom_Timer.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_Timer.c
3 * \brief GTM TIMER details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Atom_Timer.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "IfxGtm_bf.h"
49 #include "stddef.h"
50 #include "string.h"
51
52 /******************************************************************************/
53 /*-------------------------Function Implementations---------------------------*/
54 /******************************************************************************/
55
56 boolean IfxGtm_Atom_Timer_acknowledgeTimerIrq(IfxGtm_Atom_Timer *driver)
57 {
58 boolean event;
59 event = IfxGtm_Atom_Ch_isZeroNotification(driver->atom, driver->timerChannel);
60
61 if (event)
62 {
63 IfxGtm_Atom_Ch_clearZeroNotification(driver->atom, driver->timerChannel);
64 }
65 else
66 {}
67
68 return event;
69 }
70
71
72 boolean IfxGtm_Atom_Timer_acknowledgeTriggerIrq(IfxGtm_Atom_Timer *driver)
73 {
74 boolean event;
75 event = IfxGtm_Atom_Ch_isOneNotification(driver->atom, driver->triggerChannel);
76
77 if (event)
78 {
79 IfxGtm_Atom_Ch_clearOneNotification(driver->atom, driver->triggerChannel);
80 }
81 else
82 {}
83
84 return event;
85 }
86
87
88 void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
89 {
90 driver->channelsMask |= 1 << channel;
91 driver->agcDisableUpdate = IfxGtm_Atom_Agc_buildFeature(0, driver->channelsMask, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
92 driver->agcApplyUpdate = IfxGtm_Atom_Agc_buildFeature(driver->channelsMask, 0, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
93 }
94
95
96 void IfxGtm_Atom_Timer_applyUpdate(IfxGtm_Atom_Timer *driver)
97 {
98 IfxGtm_Atom_Agc_setChannelsUpdate(driver->agc, driver->agcApplyUpdate);
99 }
100
101
102 void IfxGtm_Atom_Timer_disableUpdate(IfxGtm_Atom_Timer *driver)
103 {
104 IfxGtm_Atom_Agc_setChannelsUpdate(driver->agc, driver->agcDisableUpdate);
105 }
106
107
108 float32 IfxGtm_Atom_Timer_getFrequency(IfxGtm_Atom_Timer *driver)
109 {
110 return 1.0 / IfxStdIf_Timer_tickToS(driver->base.clockFreq, driver->base.period);
111 }
112
113
114 float32 IfxGtm_Atom_Timer_getInputFrequency(IfxGtm_Atom_Timer *driver)
115 {
116 return driver->base.clockFreq;
117 }
118
119
120 Ifx_TimerValue IfxGtm_Atom_Timer_getOffset(IfxGtm_Atom_Timer *driver)
121 {
122 return driver->offset;
123 }
124
125
126 Ifx_TimerValue IfxGtm_Atom_Timer_getPeriod(IfxGtm_Atom_Timer *driver)
127 {
128 return driver->base.period;
129 }
130
131
132 volatile uint32 *IfxGtm_Atom_Timer_getPointer(IfxGtm_Atom_Timer *driver)
133 {
134 return IfxGtm_Atom_Ch_getTimerPointer(driver->atom, driver->timerChannel);
135 }
136
137
138 float32 IfxGtm_Atom_Timer_getResolution(IfxGtm_Atom_Timer *driver)
139 {
140 return 1.0 / driver->base.clockFreq;
141 }
142
143
144 Ifx_TimerValue IfxGtm_Atom_Timer_getTrigger(IfxGtm_Atom_Timer *driver)
145 {
146 return IfxGtm_Atom_Ch_getCompareOne(driver->atom, driver->triggerChannel) - 1;
147 }
148
149
150 volatile uint32 *IfxGtm_Atom_Timer_getTriggerPointer(IfxGtm_Atom_Timer *driver)
151 {
152 return IfxGtm_Atom_Ch_getCompareOnePointer(driver->atom, driver->triggerChannel);
153 }
154
155
156 boolean IfxGtm_Atom_Timer_init(IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
157 {
158 boolean result = TRUE;
159 IfxGtm_Atom_Timer_Base *base = &driver->base;
160
161 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.countDir == IfxStdIf_Timer_CountDir_up); /* only this mode is supported */
162
163 driver->gtm = config->gtm;
164 driver->atomIndex = config->atom;
165 driver->atom = &config->gtm->ATOM[config->atom];
166 driver->timerChannel = config->timerChannel;
167
168 base->triggerEnabled = config->base.trigger.enabled;
169
170 if (base->triggerEnabled)
171 {
172 if (config->triggerOut != NULL_PTR)
173 {
174 driver->triggerChannel = config->triggerOut->channel;
175 }
176 else
177 {
178 result = FALSE;
179 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result); /* triggerOut is required */
180 }
181 }
182 else
183 {
184 driver->triggerChannel = driver->timerChannel; // Set to timer channel to disable its use
185 }
186
187 driver->agc = (Ifx_GTM_ATOM_AGC *)&driver->atom->AGC.GLB_CTRL;
188
189 driver->channelsMask = 0;
190 driver->agcApplyUpdate = 0;
191 driver->agcDisableUpdate = 0;
192
193 /* Initialize the timer part */
194 IfxGtm_Atom_Ch_configurePwmMode(driver->atom, driver->timerChannel, config->clock,
195 (Ifx_ActiveState)config->base.trigger.risingEdgeAtPeriod, IfxGtm_Atom_Ch_ResetEvent_onCm0,
196 IfxGtm_Atom_Ch_OutputTrigger_generate);
197
198 IfxGtm_Atom_Timer_updateInputFrequency(driver);
199
200 if ((config->base.minResolution > 0) && ((1.0 / base->clockFreq) > config->base.minResolution))
201 {
202 result = FALSE;
203 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
204 }
205 else
206 {}
207
208 IfxGtm_Atom_Timer_setFrequency(driver, config->base.frequency);
209 driver->offset = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / config->base.frequency * config->base.startOffset);
210
211 IfxGtm_Atom_Ch_setCounterValue(driver->atom, driver->timerChannel, driver->offset);
212
213 /* Initialize the trigger part */
214 IfxGtm_Atom_Timer_addToChannelMask(driver, driver->timerChannel);
215
216 if (base->triggerEnabled)
217 {
218 IfxGtm_Atom_Ch triggerChannel = driver->triggerChannel;
219 uint16 triggerChannelMask = 1 << triggerChannel;
220
221 IfxGtm_Atom_Ch_setSignalLevel(driver->atom, triggerChannel, config->base.trigger.risingEdgeAtPeriod ? Ifx_ActiveState_high : Ifx_ActiveState_low);
222
223 IfxGtm_Atom_Ch_setCounterValue(driver->atom, triggerChannel, driver->offset);
224
225 if (triggerChannel != driver->timerChannel)
226 {
227 IfxGtm_Atom_Ch_configurePwmMode(driver->atom, triggerChannel, config->clock,
228 (Ifx_ActiveState)config->base.trigger.risingEdgeAtPeriod, IfxGtm_Atom_Ch_ResetEvent_onTrigger,
229 IfxGtm_Atom_Ch_OutputTrigger_forward);
230 IfxGtm_Atom_Agc_enableChannels(driver->agc, triggerChannelMask, 0, FALSE);
231 IfxGtm_Atom_Timer_addToChannelMask(driver, driver->triggerChannel);
232 }
233 else
234 {}
235
236 /* Signal must go out of the GTM even if the port outpout is not enabled */
237 IfxGtm_Atom_Agc_enableChannelsOutput(driver->agc, triggerChannelMask, 0, FALSE);
238
239 if ((config->base.trigger.outputEnabled) && (config->initPins == TRUE))
240 {
241 /* Initialize the port */
242 IfxGtm_PinMap_setAtomTout(config->triggerOut, config->base.trigger.outputMode, config->base.trigger.outputDriver);
243 }
244 else
245 {}
246
247 IfxGtm_Atom_Timer_setTrigger(driver, config->base.trigger.triggerPoint);
248 }
249 else
250 {}
251
252 /* Interrupt configuration */
253 {
254 volatile Ifx_SRC_SRCR *src;
255 boolean timerHasIrq = config->base.isrPriority > 0;
256 boolean triggerHasIrq = (config->base.trigger.isrPriority > 0) && base->triggerEnabled;
257
258 if (driver->triggerChannel == driver->timerChannel)
259 {
260 IfxGtm_Atom_Ch_setNotification(driver->atom, driver->timerChannel, timerHasIrq ? config->irqModeTimer : config->irqModeTrigger, timerHasIrq, triggerHasIrq);
261 src = IfxGtm_Atom_Ch_getSrcPointer(driver->gtm, config->atom, driver->timerChannel);
262 IfxSrc_init(src, timerHasIrq ? config->base.isrProvider : config->base.trigger.isrProvider, timerHasIrq ? config->base.isrPriority : config->base.trigger.isrPriority);
263 IfxSrc_enable(src);
264 }
265 else
266 {
267 IfxGtm_IrqMode irqMode = IfxGtm_IrqMode_pulseNotify;
268
269 if (timerHasIrq)
270 {
271 IfxGtm_Atom_Ch_setNotification(driver->atom, driver->timerChannel, irqMode, TRUE, FALSE);
272 src = IfxGtm_Atom_Ch_getSrcPointer(driver->gtm, config->atom, driver->timerChannel);
273 IfxSrc_init(src, config->base.isrProvider, config->base.isrPriority);
274 IfxSrc_enable(src);
275 }
276
277 if (triggerHasIrq)
278 {
279 IfxGtm_Atom_Ch_setNotification(driver->atom, driver->triggerChannel, irqMode, FALSE, TRUE);
280 src = IfxGtm_Atom_Ch_getSrcPointer(driver->gtm, config->atom, driver->triggerChannel);
281 IfxSrc_init(src, config->base.trigger.isrProvider, config->base.trigger.isrPriority);
282 IfxSrc_enable(src);
283 }
284 }
285 }
286
287 /* Transfer the shadow registers */
288 IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, driver->channelsMask, 0, 0, 0);
289 IfxGtm_Atom_Agc_trigger(driver->agc);
290 IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, 0, driver->channelsMask, 0, 0);
291
292 return result;
293 }
294
295
296 void IfxGtm_Atom_Timer_initConfig(IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
297 {
298 IfxStdIf_Timer_initConfig(&config->base);
299 config->gtm = gtm;
300 config->atom = IfxGtm_Atom_0;
301 config->timerChannel = IfxGtm_Atom_Ch_0;
302 config->triggerOut = NULL_PTR;
303 config->clock = IfxGtm_Cmu_Clk_0;
304 config->base.countDir = IfxStdIf_Timer_CountDir_up;
305 config->irqModeTimer = IfxGtm_IrqMode_level;
306 config->irqModeTrigger = IfxGtm_IrqMode_level;
307 config->initPins = TRUE;
308 }
309
310
311 void IfxGtm_Atom_Timer_run(IfxGtm_Atom_Timer *driver)
312 {
313 IfxGtm_Atom_Agc_enableChannels(driver->agc, driver->channelsMask, 0, TRUE);
314 }
315
316
317 boolean IfxGtm_Atom_Timer_setFrequency(IfxGtm_Atom_Timer *driver, float32 frequency)
318 {
319 Ifx_TimerValue period = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / frequency);
320
321 return IfxGtm_Atom_Timer_setPeriod(driver, period);
322 }
323
324
325 boolean IfxGtm_Atom_Timer_setPeriod(IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
326 {
327 driver->base.period = period;
328 IfxGtm_Atom_Ch_setCompareZeroShadow(driver->atom, driver->timerChannel, period);
329
330 if (driver->triggerChannel != driver->timerChannel)
331 {
332 IfxGtm_Atom_Ch_setCompareZeroShadow(driver->atom, driver->triggerChannel, period);
333 }
334
335 return TRUE;
336 }
337
338
339 void IfxGtm_Atom_Timer_setSingleMode(IfxGtm_Atom_Timer *driver, boolean enabled)
340 {
341 IfxGtm_Atom_Ch_setOneShotMode(driver->atom, driver->timerChannel, enabled);
342 }
343
344
345 void IfxGtm_Atom_Timer_setTrigger(IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
346 {
347 IfxGtm_Atom_Ch_setCompareOneShadow(driver->atom, driver->triggerChannel, triggerPoint + 1);
348 }
349
350
351 boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
352 {
353 /* Ensure the stdif is reset to zeros */
354 memset(stdif, 0, sizeof(IfxStdIf_Timer));
355
356 /* *INDENT-OFF* Note: this file was indented manually by the author. */
357 /* Set the API link */
358 stdif->driver = driver;
359 stdif->getFrequency =(IfxStdIf_Timer_GetFrequency )&IfxGtm_Atom_Timer_getFrequency;
360 stdif->getPeriod =(IfxStdIf_Timer_GetPeriod )&IfxGtm_Atom_Timer_getPeriod;
361 stdif->getResolution =(IfxStdIf_Timer_GetResolution )&IfxGtm_Atom_Timer_getResolution;
362 stdif->getTrigger =(IfxStdIf_Timer_GetTrigger )&IfxGtm_Atom_Timer_getTrigger;
363 stdif->setFrequency =(IfxStdIf_Timer_SetFrequency )&IfxGtm_Atom_Timer_setFrequency;
364 stdif->updateInputFrequency =(IfxStdIf_Timer_UpdateInputFrequency)&IfxGtm_Atom_Timer_updateInputFrequency;
365 stdif->applyUpdate =(IfxStdIf_Timer_ApplyUpdate )&IfxGtm_Atom_Timer_applyUpdate;
366 stdif->disableUpdate =(IfxStdIf_Timer_DisableUpdate )&IfxGtm_Atom_Timer_disableUpdate;
367 stdif->getInputFrequency =(IfxStdIf_Timer_GetInputFrequency )&IfxGtm_Atom_Timer_getInputFrequency;
368 stdif->run =(IfxStdIf_Timer_Run )&IfxGtm_Atom_Timer_run;
369 stdif->setPeriod =(IfxStdIf_Timer_SetPeriod )&IfxGtm_Atom_Timer_setPeriod;
370 stdif->setSingleMode =(IfxStdIf_Timer_SetSingleMode )&IfxGtm_Atom_Timer_setSingleMode;
371 stdif->setTrigger =(IfxStdIf_Timer_SetTrigger )&IfxGtm_Atom_Timer_setTrigger;
372 stdif->stop =(IfxStdIf_Timer_Stop )&IfxGtm_Atom_Timer_stop;
373 stdif->ackTimerIrq =(IfxStdIf_Timer_AckTimerIrq )&IfxGtm_Atom_Timer_acknowledgeTimerIrq;
374 stdif->ackTriggerIrq =(IfxStdIf_Timer_AckTriggerIrq )&IfxGtm_Atom_Timer_acknowledgeTriggerIrq;
375 /* *INDENT-ON* */
376
377 return TRUE;
378 }
379
380
381 void IfxGtm_Atom_Timer_stop(IfxGtm_Atom_Timer *driver)
382 {
383 IfxGtm_Atom_Agc_enableChannels(driver->agc, 0, driver->channelsMask, TRUE);
384 }
385
386
387 void IfxGtm_Atom_Timer_updateInputFrequency(IfxGtm_Atom_Timer *driver)
388 {
389 driver->base.clockFreq = IfxGtm_Atom_Ch_getClockFrequency(driver->gtm, driver->atom, driver->timerChannel);
390 }
IfxGtm_Atom_Agc_enableChannelsOutput
void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Atom.c:169
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxStdIf_Timer_::getTrigger
IfxStdIf_Timer_GetTrigger getTrigger
Definition: IfxStdIf_Timer.h:243
IfxGtm_Atom_Timer_Config::triggerOut
IfxGtm_Atom_ToutMap * triggerOut
ATOM channel used for the trigger output, can be identical to the timer channe.
Definition: IfxGtm_Atom_Timer.h:140
IfxGtm_Atom_Timer_stdIfTimerInit
boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Atom_Timer.c:351
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
IfxStdIf_Timer_GetTrigger
Ifx_TimerValue(* IfxStdIf_Timer_GetTrigger)(IfxStdIf_InterfaceDriver stdIf)
Return the timer trigger point.
Definition: IfxStdIf_Timer.h:117
IfxGtm_Atom_Timer_setSingleMode
void IfxGtm_Atom_Timer_setSingleMode(IfxGtm_Atom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxGtm_Atom_Timer.c:339
IfxGtm_Atom_Timer_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver : user handles separately...
Definition: IfxGtm_Atom_Timer.h:144
IfxGtm_Atom_Timer_getFrequency
float32 IfxGtm_Atom_Timer_getFrequency(IfxGtm_Atom_Timer *driver)
Returns the frequency.
Definition: IfxGtm_Atom_Timer.c:108
IfxStdIf_Timer_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxStdIf_Timer.h:276
IfxGtm_Atom_ToutMap::channel
IfxGtm_Atom_Ch channel
ATOM channel index.
Definition: IfxGtm_PinMap.h:105
IfxGtm_Atom_Timer::atom
Ifx_GTM_ATOM * atom
ATOM used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:121
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxGtm_IrqMode_level
Definition: IfxGtm.h:66
IfxStdIf_Timer_GetFrequency
float32(* IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:99
IfxGtm_Atom_Timer::gtm
Ifx_GTM * gtm
GTM module used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:120
IfxGtm_Atom_Agc_setChannelsForceUpdate
void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Atom.c:235
IfxGtm_Atom_Timer_setPeriod
boolean IfxGtm_Atom_Timer_setPeriod(IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxGtm_Atom_Timer.c:325
IfxGtm_Atom_Ch_ResetEvent_onCm0
Definition: IfxGtm_Atom.h:85
IfxGtm_Atom_Ch_clearOneNotification
void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Atom.c:262
IfxGtm_Atom_Timer_Config::irqModeTrigger
IfxGtm_IrqMode irqModeTrigger
Interrupt mode for the trigger.
Definition: IfxGtm_Atom_Timer.h:143
IfxGtm_Atom_Ch_OutputTrigger_generate
Generate the trigger from the current channel.
Definition: IfxGtm_Atom.h:78
IfxGtm_Atom_Ch_setNotification
void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Atom.c:471
IfxGtm_Atom_Ch_0
ATOM channel 0.
Definition: IfxGtm_cfg.h:222
IfxStdIf_Timer_AckTriggerIrq
boolean(* IfxStdIf_Timer_AckTriggerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the trigger interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:233
IfxGtm_Atom_Timer.h
GTM TIMER details.
IfxStdIf_Timer_UpdateInputFrequency
void(* IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:131
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:253
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:251
IfxGtm_Atom_Timer_setFrequency
boolean IfxGtm_Atom_Timer_setFrequency(IfxGtm_Atom_Timer *driver, float32 frequency)
Sets the frequency.
Definition: IfxGtm_Atom_Timer.c:317
IfxGtm_Atom_Ch_clearZeroNotification
void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Atom.c:270
IfxStdIf_Timer_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Timer.h:239
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
IfxGtm_Atom_Agc_buildFeature
uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Atom.c:61
IfxStdIf_Timer_TrigConfig::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver.
Definition: IfxStdIf_Timer.h:266
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Atom_Timer::timerChannel
IfxGtm_Atom_Ch timerChannel
ATOM channel used for the timer.
Definition: IfxGtm_Atom_Timer.h:124
IfxStdIf_Timer_SetFrequency
boolean(* IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:125
IfxGtm_Atom_Timer
TOM Timer interface.
Definition: IfxGtm_Atom_Timer.h:117
IfxGtm_Atom_Timer::triggerChannel
IfxGtm_Atom_Ch triggerChannel
ATOM channel used for the trigger, if identical to the timerChannel, the trigger interrupt is having ...
Definition: IfxGtm_Atom_Timer.h:125
IfxGtm_Atom_Timer_getPointer
volatile uint32 * IfxGtm_Atom_Timer_getPointer(IfxGtm_Atom_Timer *driver)
Returns the pointer to timer channel.
Definition: IfxGtm_Atom_Timer.c:132
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Atom_Ch_configurePwmMode
void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
Definition: IfxGtm_Atom.c:278
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxGtm_Atom_Agc_setChannelsUpdate
IFX_INLINE void IfxGtm_Atom_Agc_setChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint32 value)
Sets the channels for update (UPEN)
Definition: IfxGtm_Atom.h:628
Ifx_Assert.h
Assert functions.
IfxGtm_Atom_Timer_Base
Structure for the timer base.
Definition: IfxGtm_Atom_Timer.h:103
IfxGtm_Atom_Timer_Config::atom
IfxGtm_Atom atom
ATOM used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:138
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:240
IfxGtm_Atom_Timer_setTrigger
void IfxGtm_Atom_Timer_setTrigger(IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxGtm_Atom_Timer.c:345
IfxGtm_Atom_Timer_getOffset
Ifx_TimerValue IfxGtm_Atom_Timer_getOffset(IfxGtm_Atom_Timer *driver)
Returns the initial timer offset in ticks.
Definition: IfxGtm_Atom_Timer.c:120
IfxStdIf_Timer_GetResolution
float32(* IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:111
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Atom_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxGtm_Atom_Timer.h:106
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGtm_Atom_Ch_getClockFrequency
float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz.
Definition: IfxGtm_Atom.c:296
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Atom_Ch_setCounterValue
void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Atom.c:455
IfxGtm_Atom_Timer_initConfig
void IfxGtm_Atom_Timer_initConfig(IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Atom_Timer.c:296
IfxGtm_Atom_Timer_addToChannelMask
void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run.
Definition: IfxGtm_Atom_Timer.c:88
IfxGtm_Atom_Timer::atomIndex
IfxGtm_Atom atomIndex
Enum for ATOM objects.
Definition: IfxGtm_Atom_Timer.h:123
IfxGtm_Cmu_Clk_0
Definition: IfxGtm_Cmu.h:66
IfxStdIf_Timer_Config::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:275
IfxGtm_Atom_Timer_stop
void IfxGtm_Atom_Timer_stop(IfxGtm_Atom_Timer *driver)
Stops the timer.
Definition: IfxGtm_Atom_Timer.c:381
IfxGtm_Atom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC.
Definition: IfxGtm_Atom.c:359
IfxGtm_Atom_Agc_enableChannels
void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Atom.c:151
IfxGtm_Atom_Timer_getResolution
float32 IfxGtm_Atom_Timer_getResolution(IfxGtm_Atom_Timer *driver)
Returns the resolution.
Definition: IfxGtm_Atom_Timer.c:138
IfxStdIf_Timer_::disableUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
Definition: IfxStdIf_Timer.h:247
IfxGtm_Atom_Timer::agcApplyUpdate
uint32 agcApplyUpdate
AGC value for apply update.
Definition: IfxGtm_Atom_Timer.h:129
IfxGtm_Atom_Ch_getTimerPointer
volatile uint32 * IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Atom.c:366
IfxGtm_Atom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Atom.h:77
IfxStdIf_Timer_GetInputFrequency
float32(* IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:175
IfxStdIf_Timer_SetTrigger
void(* IfxStdIf_Timer_SetTrigger)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
Set trigger point.
Definition: IfxStdIf_Timer.h:215
IfxGtm_Atom_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxGtm_Atom_Timer.h:136
IfxGtm_Atom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Atom.h:86
IfxGtm_Atom_Timer::channelsMask
uint16 channelsMask
Mask for channels to be modified together.
Definition: IfxGtm_Atom_Timer.h:126
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:279
IfxStdIf_Timer_TrigConfig::risingEdgeAtPeriod
boolean risingEdgeAtPeriod
Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset...
Definition: IfxStdIf_Timer.h:267
IfxGtm_Atom_Timer_disableUpdate
void IfxGtm_Atom_Timer_disableUpdate(IfxGtm_Atom_Timer *driver)
Disables the upadte.
Definition: IfxGtm_Atom_Timer.c:102
IfxGtm_Atom_Timer_updateInputFrequency
void IfxGtm_Atom_Timer_updateInputFrequency(IfxGtm_Atom_Timer *driver)
Updates the input frequency.
Definition: IfxGtm_Atom_Timer.c:387
IfxStdIf_Timer_initConfig
void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:45
IfxGtm_Atom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Atom_Timer.h:107
IfxGtm_Atom_Ch_setOneShotMode
void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Atom.c:489
IfxStdIf_Timer_CountDir_up
Timer is counting up.
Definition: IfxStdIf_Timer.h:87
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:248
IfxGtm_Atom_Ch_isZeroNotification
boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Atom.c:381
IfxGtm_Atom_Timer_acknowledgeTriggerIrq
boolean IfxGtm_Atom_Timer_acknowledgeTriggerIrq(IfxGtm_Atom_Timer *driver)
Returns the trigger event.
Definition: IfxGtm_Atom_Timer.c:72
IfxGtm_Atom_Timer::agc
Ifx_GTM_ATOM_AGC * agc
Pointer to the AGC object.
Definition: IfxGtm_Atom_Timer.h:122
IfxGtm_Atom_Timer_Config::irqModeTimer
IfxGtm_IrqMode irqModeTimer
Interrupt mode for the timer.
Definition: IfxGtm_Atom_Timer.h:142
IfxGtm_Atom_Timer_acknowledgeTimerIrq
boolean IfxGtm_Atom_Timer_acknowledgeTimerIrq(IfxGtm_Atom_Timer *driver)
Returns the timer event.
Definition: IfxGtm_Atom_Timer.c:56
IfxGtm_Atom_Timer_getInputFrequency
float32 IfxGtm_Atom_Timer_getInputFrequency(IfxGtm_Atom_Timer *driver)
Returns the Input frequncy.
Definition: IfxGtm_Atom_Timer.c:114
IfxGtm_Atom_Timer::agcDisableUpdate
uint32 agcDisableUpdate
AGC value for disable update.
Definition: IfxGtm_Atom_Timer.h:128
IfxGtm_Atom_Ch_setCompareOneShadow
void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Atom.c:431
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:68
IfxGtm_Atom_Timer_getTrigger
Ifx_TimerValue IfxGtm_Atom_Timer_getTrigger(IfxGtm_Atom_Timer *driver)
Returns the trigger point.
Definition: IfxGtm_Atom_Timer.c:144
IfxGtm_Atom_Ch_setSignalLevel
void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Atom.c:505
IfxStdIf_Timer_TrigConfig::triggerPoint
Ifx_TimerValue triggerPoint
Trigger point in timer ticks.
Definition: IfxStdIf_Timer.h:262
IfxGtm_Atom_Timer_Config::clock
IfxGtm_Cmu_Clk clock
Timer input clock.
Definition: IfxGtm_Atom_Timer.h:141
IfxGtm_Atom_Timer::base
IfxGtm_Atom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Atom_Timer.h:119
IfxStdIf_Timer_::setTrigger
IfxStdIf_Timer_SetTrigger setTrigger
Definition: IfxStdIf_Timer.h:252
IfxGtm_Atom_Ch_isOneNotification
boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Atom.c:372
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Atom_0
ATOM object 0.
Definition: IfxGtm_cfg.h:211
IfxGtm_Atom_Timer_getPeriod
Ifx_TimerValue IfxGtm_Atom_Timer_getPeriod(IfxGtm_Atom_Timer *driver)
Returns the period of the timer.
Definition: IfxGtm_Atom_Timer.c:126
IfxGtm_Atom_Timer_run
void IfxGtm_Atom_Timer_run(IfxGtm_Atom_Timer *driver)
Runs the timer.
Definition: IfxGtm_Atom_Timer.c:311
IfxGtm_Atom_Ch_setCompareZeroShadow
void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Atom.c:447
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:244
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:249
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:245
IfxGtm_Atom_Timer_init
boolean IfxGtm_Atom_Timer_init(IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
Initialises the timer object.
Definition: IfxGtm_Atom_Timer.c:156
IfxGtm_Atom_Timer_applyUpdate
void IfxGtm_Atom_Timer_applyUpdate(IfxGtm_Atom_Timer *driver)
Enables the transfer of the shadow registers.
Definition: IfxGtm_Atom_Timer.c:96
IfxGtm_Atom_Ch_getCompareOnePointer
volatile uint32 * IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Atom.c:324
IfxGtm_Atom_Ch_getCompareOne
uint32 IfxGtm_Atom_Ch_getCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Atom.c:316
IfxStdIf_Timer_GetPeriod
Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:105
IfxStdIf_Timer_DisableUpdate
void(* IfxStdIf_Timer_DisableUpdate)(IfxStdIf_InterfaceDriver stdIf)
Disable updates.
Definition: IfxStdIf_Timer.h:169
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:250
IfxStdIf_Timer_::ackTriggerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
Definition: IfxStdIf_Timer.h:255
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:274
IfxStdIf_Timer_ApplyUpdate
void(* IfxStdIf_Timer_ApplyUpdate)(IfxStdIf_InterfaceDriver stdIf)
Apply requested updates.
Definition: IfxStdIf_Timer.h:152
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Atom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Atom_Timer.h:105
IfxStdIf_Timer_Run
void(* IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:184
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:242
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:278
IfxGtm_Atom_Agc_trigger
void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Atom.c:256
IfxGtm_Atom_Timer_Config
Configuration structure for TOM Timer.
Definition: IfxGtm_Atom_Timer.h:134
IfxStdIf_Timer_Config::startOffset
float32 startOffset
FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
Definition: IfxStdIf_Timer.h:280
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxStdIf_Timer_Stop
void(* IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:221
IfxStdIf_Timer_::applyUpdate
IfxStdIf_Timer_ApplyUpdate applyUpdate
Definition: IfxStdIf_Timer.h:246
IfxStdIf_Timer_AckTimerIrq
boolean(* IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:227
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:261
IfxGtm_Atom_Timer_getTriggerPointer
volatile uint32 * IfxGtm_Atom_Timer_getTriggerPointer(IfxGtm_Atom_Timer *driver)
Returns the pointer to trigger channel.
Definition: IfxGtm_Atom_Timer.c:150
IfxGtm_Atom_Timer::offset
Ifx_TimerValue offset
Timer initial offset in ticks.
Definition: IfxGtm_Atom_Timer.h:127
IfxStdIf_Timer_TrigConfig::outputEnabled
boolean outputEnabled
If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
Definition: IfxStdIf_Timer.h:268
IfxStdIf_Timer_SetPeriod
boolean(* IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:194
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:277
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxStdIf_Timer_TrigConfig::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxStdIf_Timer.h:265
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:254
IfxStdIf_Timer_SetSingleMode
void(* IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:203
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:241
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:219
IfxGtm_PinMap_setAtomTout
void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:718


iLLD_TC26B: IfxGtm_Atom_Timer.h Source File

  • Gtm
  • Atom
  • Timer
IfxGtm_Atom_Timer.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_Timer.h
3 * \brief GTM TIMER details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Atom_Timer_Usage How to use the GTM ATOM Timer Driver
42 * \ingroup IfxLld_Gtm_Atom_Timer
43 *
44 * This driver implements the timer functionalities as defined by \ref library_srvsw_stdif_timer.
45 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_timer "standard interface APIs".
46 *
47 * \section Specific Specific implementation
48 * Implementation is similar to \ref IfxLld_Gtm_Tom_Timer.
49 *
50 * \todo Add documentation
51 *
52 * For a detailed configuration of the microcontroller, see \ref IfxGtm_Atom_Timer_init().
53 *
54 * \section Example Usage example
55 * Initialisation:
56 * \code
57 * IfxGtm_Atom_Timer_Config driverConfig;
58 * IfxGtm_Atom_Timer driverData;
59 * IfxStdIf_Timer timer;
60 * IfxGtm_Atom_Timer_initConfig(&driverConfig, &MODULE_GTM);
61 * IfxGtm_Atom_Timer_init (&driverData, &driverConfig);
62 * boolean IfxGtm_Atom_Timer_stdIfTimerInit(&timer, &driverData);
63 * \endcode
64 *
65 * During run-time, \ref library_srvsw_stdif_timer "the interface functions" should be used:
66 * \code
67 * IfxStdIf_Timer_run(timer);
68 * IfxStdIf_Timer_disableUpdate(timer);
69 * IfxStdIf_Timer_setPeriod(timer, period);
70 * IfxStdIf_Timer_applyUpdate(timer);
71 * \endcode
72 *
73 * \defgroup IfxLld_Gtm_Atom_Timer ATOM Timer Interface Driver
74 * \ingroup IfxLld_Gtm_Atom
75 * \defgroup IfxLld_Gtm_Atom_Timer_Timer_StdIf_Functions Timer StdIf Functions
76 * \ingroup IfxLld_Gtm_Atom_Timer
77 * \defgroup IfxLld_Gtm_Atom_Timer_Timer_Functions Timer Functions
78 * \ingroup IfxLld_Gtm_Atom_Timer
79 * \defgroup IfxLld_Gtm_Atom_Timer_Data_Structures Data Structures
80 * \ingroup IfxLld_Gtm_Atom_Timer
81 */
82
83 #ifndef IFXGTM_ATOM_TIMER_H
84 #define IFXGTM_ATOM_TIMER_H 1
85
86 /******************************************************************************/
87 /*----------------------------------Includes----------------------------------*/
88 /******************************************************************************/
89
90 #include "_PinMap/IfxGtm_PinMap.h"
91 #include "Gtm/Std/IfxGtm_Atom.h"
92 #include "Gtm/Std/IfxGtm_Cmu.h"
93 #include "StdIf/IfxStdIf_Timer.h"
94
95 /******************************************************************************/
96 /*-----------------------------Data Structures--------------------------------*/
97 /******************************************************************************/
98
99 /** \addtogroup IfxLld_Gtm_Atom_Timer_Data_Structures
100 * \{ */
101 /** \brief Structure for the timer base
102 */
103 typedef struct
104 {
105 Ifx_TimerValue period; /**< \brief Timer period in ticks (cached value) */
106 boolean triggerEnabled; /**< \brief If TRUE, the trigger functionality is Initialised */
107 float32 clockFreq; /**< \brief Timer input clock frequency (cached value) */
108 IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
109 } IfxGtm_Atom_Timer_Base;
110
111 /** \} */
112
113 /** \addtogroup IfxLld_Gtm_Atom_Timer_Data_Structures
114 * \{ */
115 /** \brief TOM Timer interface
116 */
117 typedef struct
118 {
119 IfxGtm_Atom_Timer_Base base; /**< \brief Timer base structure */
120 Ifx_GTM *gtm; /**< \brief GTM module used for the timer functionality */
121 Ifx_GTM_ATOM *atom; /**< \brief ATOM used for the timer functionality */
122 Ifx_GTM_ATOM_AGC *agc; /**< \brief Pointer to the AGC object */
123 IfxGtm_Atom atomIndex; /**< \brief Enum for ATOM objects */
124 IfxGtm_Atom_Ch timerChannel; /**< \brief ATOM channel used for the timer */
125 IfxGtm_Atom_Ch triggerChannel; /**< \brief ATOM channel used for the trigger, if identical to the timerChannel, the trigger interrupt is having the same interrupt level as the timer interrupt */
126 uint16 channelsMask; /**< \brief Mask for channels to be modified together */
127 Ifx_TimerValue offset; /**< \brief Timer initial offset in ticks */
128 uint32 agcDisableUpdate; /**< \brief AGC value for disable update */
129 uint32 agcApplyUpdate; /**< \brief AGC value for apply update */
130 } IfxGtm_Atom_Timer;
131
132 /** \brief Configuration structure for TOM Timer
133 */
134 typedef struct
135 {
136 IfxStdIf_Timer_Config base; /**< \brief Standard interface timer configuration */
137 Ifx_GTM *gtm; /**< \brief GTM used for the timer functionality */
138 IfxGtm_Atom atom; /**< \brief ATOM used for the timer functionality */
139 IfxGtm_Atom_Ch timerChannel; /**< \brief ATOM channel used for the timer */
140 IfxGtm_Atom_ToutMap *triggerOut; /**< \brief ATOM channel used for the trigger output, can be identical to the timer channe */
141 IfxGtm_Cmu_Clk clock; /**< \brief Timer input clock */
142 IfxGtm_IrqMode irqModeTimer; /**< \brief Interrupt mode for the timer */
143 IfxGtm_IrqMode irqModeTrigger; /**< \brief Interrupt mode for the trigger */
144 boolean initPins; /**< \brief TRUE: Initialize pins in driver
145 * FALSE: Don't initialize pins in driver : user handles separately */
146 } IfxGtm_Atom_Timer_Config;
147
148 /** \} */
149
150 /** \addtogroup IfxLld_Gtm_Atom_Timer_Timer_StdIf_Functions
151 * \{ */
152
153 /******************************************************************************/
154 /*-------------------------Global Function Prototypes-------------------------*/
155 /******************************************************************************/
156
157 /** \brief Returns the timer event
158 * \see IfxStdIf_Timer_AckTimerIrq
159 * \param driver ATOM Timer interface Handle
160 * \return Timer event
161 */
162 IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTimerIrq(IfxGtm_Atom_Timer *driver);
163
164 /** \brief Returns the trigger event
165 * \see IfxStdIf_Timer_AckTriggerIrq
166 * \param driver ATOM Timer interface Handle
167 * \return Trigger event
168 */
169 IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTriggerIrq(IfxGtm_Atom_Timer *driver);
170
171 /** \brief Add a channel to the channel mask
172 * Channels present in the mask are started, stopped, updated at the same time as the timer:
173 * IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run
174 * \param driver ATOM Timer interface Handle
175 * \param channel Channel to ba added to the mask
176 * \return None
177 */
178 IFX_EXTERN void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel);
179
180 /** \brief Enables the transfer of the shadow registers
181 * \see IfxStdIf_Timer_ApplyUpdate
182 * \param driver ATOM Timer interface Handle
183 * \return None
184 */
185 IFX_EXTERN void IfxGtm_Atom_Timer_applyUpdate(IfxGtm_Atom_Timer *driver);
186
187 /** \brief Disables the upadte
188 * \see IfxStdIf_Timer_DisableUpdate
189 * \param driver ATOM Timer interface Handle
190 * \return None
191 */
192 IFX_EXTERN void IfxGtm_Atom_Timer_disableUpdate(IfxGtm_Atom_Timer *driver);
193
194 /** \brief Returns the frequency
195 * \see IfxStdIf_Timer_GetFrequency
196 * \param driver ATOM Timer interface Handle
197 * \return Frequency
198 */
199 IFX_EXTERN float32 IfxGtm_Atom_Timer_getFrequency(IfxGtm_Atom_Timer *driver);
200
201 /** \brief Returns the Input frequncy
202 * \see IfxStdIf_Timer_GetInputFrequency
203 * \param driver ATOM Timer interface Handle
204 * \return Frequency
205 */
206 IFX_EXTERN float32 IfxGtm_Atom_Timer_getInputFrequency(IfxGtm_Atom_Timer *driver);
207
208 /** \brief Returns the period of the timer
209 * \see IfxStdIf_Timer_GetPeriod
210 * \param driver ATOM Timer interface Handle
211 * \return Period
212 */
213 IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getPeriod(IfxGtm_Atom_Timer *driver);
214
215 /** \brief Returns the resolution
216 * \see IfxStdIf_Timer_GetResolution
217 * \param driver ATOM Timer interface Handle
218 * \return Resolution
219 */
220 IFX_EXTERN float32 IfxGtm_Atom_Timer_getResolution(IfxGtm_Atom_Timer *driver);
221
222 /** \brief Returns the trigger point
223 * \param driver ATOM Timer interface Handle
224 * \return Trigger point
225 */
226 IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getTrigger(IfxGtm_Atom_Timer *driver);
227
228 /** \brief Runs the timer
229 * \see IfxStdIf_Timer_Run
230 * \param driver ATOM Timer interface Handle
231 * \return None
232 */
233 IFX_EXTERN void IfxGtm_Atom_Timer_run(IfxGtm_Atom_Timer *driver);
234
235 /** \brief Sets the frequency
236 * \see IfxStdIf_Timer_SetFrequency
237 * \param driver ATOM Timer interface Handle
238 * \param frequency Frequency
239 * \return TRUE on success else FALSE
240 */
241 IFX_EXTERN boolean IfxGtm_Atom_Timer_setFrequency(IfxGtm_Atom_Timer *driver, float32 frequency);
242
243 /** \brief Sets the period for the timer
244 * \see IfxStdIf_Timer_SetPeriod
245 * \param driver ATOM Timer interface Handle
246 * \param period Period value
247 * \return TRUE on success else FALSE
248 */
249 IFX_EXTERN boolean IfxGtm_Atom_Timer_setPeriod(IfxGtm_Atom_Timer *driver, Ifx_TimerValue period);
250
251 /** \brief Sets the single shot mode of the timer
252 * \see IfxStdIf_Timer_SetSingleMode
253 * \param driver ATOM Timer interface Handle
254 * \param enabled If TRUE, sets the single shot mode
255 * \return None
256 */
257 IFX_EXTERN void IfxGtm_Atom_Timer_setSingleMode(IfxGtm_Atom_Timer *driver, boolean enabled);
258
259 /** \brief Sets the trigger
260 * \see IfxStdIf_Timer_SetTrigger
261 * \param driver ATOM Timer interface Handle
262 * \param triggerPoint Trigger point value
263 * \return None
264 */
265 IFX_EXTERN void IfxGtm_Atom_Timer_setTrigger(IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint);
266
267 /** \brief Initializes the standard interface timer
268 * \param stdif Standard interface object, will be initialized by the function
269 * \param driver Interface driver to be used by the standard interface. must be initialised separately
270 * \return TRUE on success else FALSE
271 */
272 IFX_EXTERN boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver);
273
274 /** \brief Stops the timer
275 * \see IfxStdIf_Timer_Stop
276 * \param driver ATOM Timer interface Handle
277 * \return None
278 */
279 IFX_EXTERN void IfxGtm_Atom_Timer_stop(IfxGtm_Atom_Timer *driver);
280
281 /** \brief Updates the input frequency
282 * \see IfxStdIf_Timer_UpdateInputFrequency
283 * \param driver ATOM Timer interface Handle
284 * \return None
285 */
286 IFX_EXTERN void IfxGtm_Atom_Timer_updateInputFrequency(IfxGtm_Atom_Timer *driver);
287
288 /** \} */
289
290 /** \addtogroup IfxLld_Gtm_Atom_Timer_Timer_Functions
291 * \{ */
292
293 /******************************************************************************/
294 /*-------------------------Global Function Prototypes-------------------------*/
295 /******************************************************************************/
296
297 /** \brief Returns the initial timer offset in ticks
298 * \see IfxStdIf_Timer_GetOffset
299 * \param driver ATOM Timer interface Handle
300 * \return Returns the initial timer offset in ticks
301 */
302 IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getOffset(IfxGtm_Atom_Timer *driver);
303
304 /** \brief Returns the pointer to timer channel
305 * \param driver ATOM Timer interface Handle
306 * \return Pointer
307 */
308 IFX_EXTERN volatile uint32 *IfxGtm_Atom_Timer_getPointer(IfxGtm_Atom_Timer *driver);
309
310 /** \brief Returns the pointer to trigger channel
311 * \param driver ATOM Timer interface Handle
312 * \return Pointer
313 */
314 IFX_EXTERN volatile uint32 *IfxGtm_Atom_Timer_getTriggerPointer(IfxGtm_Atom_Timer *driver);
315
316 /** \brief Initialises the timer object
317 * \param driver ATOM Timer interface Handle
318 * \param config Configuration structure for ATOM Timer
319 * \return TRUE on success else FALSE
320 */
321 IFX_EXTERN boolean IfxGtm_Atom_Timer_init(IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config);
322
323 /** \brief Initializes the configuration structure to default
324 * \param config Configuration structure for ATOM Timer
325 * \param gtm Pointer to GTM module
326 * \return None
327 */
328 IFX_EXTERN void IfxGtm_Atom_Timer_initConfig(IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm);
329
330 /** \} */
331
332 #endif /* IFXGTM_ATOM_TIMER_H */
IfxGtm_Atom_Timer_Config::triggerOut
IfxGtm_Atom_ToutMap * triggerOut
ATOM channel used for the trigger output, can be identical to the timer channe.
Definition: IfxGtm_Atom_Timer.h:140
IfxGtm_Atom_Timer_stdIfTimerInit
IFX_EXTERN boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Atom_Timer.c:351
IfxGtm_Atom_Timer_setSingleMode
IFX_EXTERN void IfxGtm_Atom_Timer_setSingleMode(IfxGtm_Atom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxGtm_Atom_Timer.c:339
IfxGtm_Atom_Timer_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver : user handles separately...
Definition: IfxGtm_Atom_Timer.h:144
IfxGtm_Atom_Timer_getFrequency
IFX_EXTERN float32 IfxGtm_Atom_Timer_getFrequency(IfxGtm_Atom_Timer *driver)
Returns the frequency.
Definition: IfxGtm_Atom_Timer.c:108
IfxGtm_Atom_Timer::atom
Ifx_GTM_ATOM * atom
ATOM used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:121
IfxGtm_Atom_Timer::gtm
Ifx_GTM * gtm
GTM module used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:120
IfxGtm_Atom_Timer_setPeriod
IFX_EXTERN boolean IfxGtm_Atom_Timer_setPeriod(IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxGtm_Atom_Timer.c:325
IfxGtm_Atom_Timer_Config::irqModeTrigger
IfxGtm_IrqMode irqModeTrigger
Interrupt mode for the trigger.
Definition: IfxGtm_Atom_Timer.h:143
IfxGtm_Atom_Timer_setFrequency
IFX_EXTERN boolean IfxGtm_Atom_Timer_setFrequency(IfxGtm_Atom_Timer *driver, float32 frequency)
Sets the frequency.
Definition: IfxGtm_Atom_Timer.c:317
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Atom_Timer::timerChannel
IfxGtm_Atom_Ch timerChannel
ATOM channel used for the timer.
Definition: IfxGtm_Atom_Timer.h:124
IfxGtm_Atom_Timer
TOM Timer interface.
Definition: IfxGtm_Atom_Timer.h:117
IfxGtm_Atom_Timer::triggerChannel
IfxGtm_Atom_Ch triggerChannel
ATOM channel used for the trigger, if identical to the timerChannel, the trigger interrupt is having ...
Definition: IfxGtm_Atom_Timer.h:125
IfxGtm_Atom_Timer_getPointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_Timer_getPointer(IfxGtm_Atom_Timer *driver)
Returns the pointer to timer channel.
Definition: IfxGtm_Atom_Timer.c:132
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:209
IfxGtm_Atom_Timer_Base
Structure for the timer base.
Definition: IfxGtm_Atom_Timer.h:103
IfxGtm_Atom_Timer_Config::atom
IfxGtm_Atom atom
ATOM used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:138
IfxGtm_Atom_Timer_setTrigger
IFX_EXTERN void IfxGtm_Atom_Timer_setTrigger(IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxGtm_Atom_Timer.c:345
IfxGtm_Atom_Timer_getOffset
IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getOffset(IfxGtm_Atom_Timer *driver)
Returns the initial timer offset in ticks.
Definition: IfxGtm_Atom_Timer.c:120
IfxGtm_Atom_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxGtm_Atom_Timer.h:106
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:272
IfxGtm_Atom_Timer_initConfig
IFX_EXTERN void IfxGtm_Atom_Timer_initConfig(IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Atom_Timer.c:296
IfxGtm_Atom_Timer_addToChannelMask
IFX_EXTERN void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run.
Definition: IfxGtm_Atom_Timer.c:88
IfxGtm_Atom_Timer::atomIndex
IfxGtm_Atom atomIndex
Enum for ATOM objects.
Definition: IfxGtm_Atom_Timer.h:123
IfxGtm_Atom_Timer_stop
IFX_EXTERN void IfxGtm_Atom_Timer_stop(IfxGtm_Atom_Timer *driver)
Stops the timer.
Definition: IfxGtm_Atom_Timer.c:381
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Atom_Timer_getResolution
IFX_EXTERN float32 IfxGtm_Atom_Timer_getResolution(IfxGtm_Atom_Timer *driver)
Returns the resolution.
Definition: IfxGtm_Atom_Timer.c:138
IfxGtm_Atom_Timer::agcApplyUpdate
uint32 agcApplyUpdate
AGC value for apply update.
Definition: IfxGtm_Atom_Timer.h:129
IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:102
IfxGtm_Atom_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxGtm_Atom_Timer.h:136
IfxGtm_Atom_Timer::channelsMask
uint16 channelsMask
Mask for channels to be modified together.
Definition: IfxGtm_Atom_Timer.h:126
IfxGtm_Atom_Timer_disableUpdate
IFX_EXTERN void IfxGtm_Atom_Timer_disableUpdate(IfxGtm_Atom_Timer *driver)
Disables the upadte.
Definition: IfxGtm_Atom_Timer.c:102
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Atom_Timer_updateInputFrequency
IFX_EXTERN void IfxGtm_Atom_Timer_updateInputFrequency(IfxGtm_Atom_Timer *driver)
Updates the input frequency.
Definition: IfxGtm_Atom_Timer.c:387
IfxGtm_Atom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Atom_Timer.h:107
IfxStdIf_Timer.h
Standard interface: Timer.
IfxGtm_Atom_Timer_acknowledgeTriggerIrq
IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTriggerIrq(IfxGtm_Atom_Timer *driver)
Returns the trigger event.
Definition: IfxGtm_Atom_Timer.c:72
IfxGtm_Atom_Timer::agc
Ifx_GTM_ATOM_AGC * agc
Pointer to the AGC object.
Definition: IfxGtm_Atom_Timer.h:122
IfxStdIf_Timer_CountDir
IfxStdIf_Timer_CountDir
Timer increment direction.
Definition: IfxStdIf_Timer.h:85
IfxGtm_Atom_Timer_Config::irqModeTimer
IfxGtm_IrqMode irqModeTimer
Interrupt mode for the timer.
Definition: IfxGtm_Atom_Timer.h:142
IfxGtm_Atom_Timer_acknowledgeTimerIrq
IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTimerIrq(IfxGtm_Atom_Timer *driver)
Returns the timer event.
Definition: IfxGtm_Atom_Timer.c:56
IfxGtm_Atom_Timer_getInputFrequency
IFX_EXTERN float32 IfxGtm_Atom_Timer_getInputFrequency(IfxGtm_Atom_Timer *driver)
Returns the Input frequncy.
Definition: IfxGtm_Atom_Timer.c:114
IfxGtm_Atom_Timer::agcDisableUpdate
uint32 agcDisableUpdate
AGC value for disable update.
Definition: IfxGtm_Atom_Timer.h:128
IfxGtm_Atom_Timer_getTrigger
IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getTrigger(IfxGtm_Atom_Timer *driver)
Returns the trigger point.
Definition: IfxGtm_Atom_Timer.c:144
IfxGtm_Atom_Timer_Config::clock
IfxGtm_Cmu_Clk clock
Timer input clock.
Definition: IfxGtm_Atom_Timer.h:141
IfxGtm_Atom_Timer::base
IfxGtm_Atom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Atom_Timer.h:119
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Atom_Timer_getPeriod
IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getPeriod(IfxGtm_Atom_Timer *driver)
Returns the period of the timer.
Definition: IfxGtm_Atom_Timer.c:126
IfxGtm_Atom_Timer_run
IFX_EXTERN void IfxGtm_Atom_Timer_run(IfxGtm_Atom_Timer *driver)
Runs the timer.
Definition: IfxGtm_Atom_Timer.c:311
IfxGtm_Atom_Timer_init
IFX_EXTERN boolean IfxGtm_Atom_Timer_init(IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
Initialises the timer object.
Definition: IfxGtm_Atom_Timer.c:156
IfxGtm_Atom_Timer_applyUpdate
IFX_EXTERN void IfxGtm_Atom_Timer_applyUpdate(IfxGtm_Atom_Timer *driver)
Enables the transfer of the shadow registers.
Definition: IfxGtm_Atom_Timer.c:96
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Atom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Atom_Timer.h:105
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Atom_Timer_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxGtm_Atom_Timer.h:108
IfxGtm_Atom_Timer_Config
Configuration structure for TOM Timer.
Definition: IfxGtm_Atom_Timer.h:134
IfxGtm_Atom.h
GTM basic functionality.
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxGtm_Atom_Timer_getTriggerPointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_Timer_getTriggerPointer(IfxGtm_Atom_Timer *driver)
Returns the pointer to trigger channel.
Definition: IfxGtm_Atom_Timer.c:150
IfxGtm_Atom_Timer::offset
Ifx_TimerValue offset
Timer initial offset in ticks.
Definition: IfxGtm_Atom_Timer.h:127
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:219


iLLD_TC26B: IfxGtm_Cmu.c Source File

  • Gtm
  • Std
IfxGtm_Cmu.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Cmu.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Cmu.h"
47 #include "IfxGtm_Dpll.h"
48 #include "Scu/Std/IfxScuCcu.h"
49 #include "Scu/Std/IfxScuWdt.h"
50 #include "math.h"
51 #include "IfxGtm_bf.h"
52 #include "IfxGtm.h"
53
54 /******************************************************************************/
55 /*-------------------------Function Implementations---------------------------*/
56 /******************************************************************************/
57
58 void IfxGtm_Cmu_enableClocks(Ifx_GTM *gtm, uint32 clkMask)
59 {
60 gtm->CMU.CLK_EN.U = clkMask;
61 }
62
63
64 float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
65 {
66 float32 frequency;
67
68 if ((IfxGtm_Cmu_isClkClockEnabled(gtm, clkIndex) != FALSE) || (assumeEnabled != FALSE))
69 {
70 switch (clkIndex)
71 {
72 case IfxGtm_Cmu_Clk_0:
73 case IfxGtm_Cmu_Clk_1:
74 case IfxGtm_Cmu_Clk_2:
75 case IfxGtm_Cmu_Clk_3:
76 case IfxGtm_Cmu_Clk_4:
77 case IfxGtm_Cmu_Clk_5:
78 frequency = IfxGtm_Cmu_getGclkFrequency(gtm) / (gtm->CMU.CLK0_5[clkIndex].CTRL.B.CLK_CNT + 1);
79 break;
80 case IfxGtm_Cmu_Clk_6:
81
82 if (gtm->CMU.CLK_6.CTRL.B.CLK6_SEL == 0)
83 {
84 frequency = IfxGtm_Cmu_getGclkFrequency(gtm) / (gtm->CMU.CLK_6.CTRL.B.CLK_CNT + 1);
85 }
86 else
87 {
88 frequency = IfxGtm_Dpll_getSubIncFrequency(gtm, IfxGtm_Dpll_SubInc_2);
89 }
90
91 break;
92 case IfxGtm_Cmu_Clk_7:
93
94 if (gtm->CMU.CLK_7.CTRL.B.CLK7_SEL == 0)
95 {
96 frequency = IfxGtm_Cmu_getGclkFrequency(gtm) / (gtm->CMU.CLK_7.CTRL.B.CLK_CNT + 1);
97 }
98 else
99 {
100 frequency = IfxGtm_Dpll_getSubIncFrequency(gtm, IfxGtm_Dpll_SubInc_1);
101 }
102
103 break;
104 default:
105 frequency = 0.0;
106 break;
107 }
108 }
109 else
110 {
111 frequency = 0.0;
112 }
113
114 return frequency;
115 }
116
117
118 float32 IfxGtm_Cmu_getEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
119 {
120 float32 frequency;
121
122 if (IfxGtm_Cmu_isEclkClockEnabled(gtm, clkIndex) || (assumeEnabled != FALSE))
123 {
124 float32 Z = gtm->CMU.ECLK[clkIndex].NUM.B.ECLK_NUM;
125 float32 N = gtm->CMU.ECLK[clkIndex].DEN.B.ECLK_DEN;
126 float32 multiplier = N / Z / 2;
127 frequency = IfxGtm_Cmu_getGclkFrequency(gtm) * multiplier;
128 }
129 else
130 {
131 frequency = 0.0;
132 }
133
134 return frequency;
135 }
136
137
138 float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
139 {
140 float32 frequency;
141 uint8 fxSelect;
142
143 if (IfxGtm_Cmu_isFxClockEnabled(gtm) || (assumeEnabled != FALSE))
144 {
145 fxSelect = gtm->CMU.FXCLK.CTRL.B.FXCLK_SEL;
146
147 if (fxSelect == 0)
148 {
149 frequency = IfxGtm_Cmu_getGclkFrequency(gtm);
150 }
151 else if (fxSelect <= 6)
152 {
153 frequency = IfxGtm_Cmu_getClkFrequency(gtm, IfxGtm_Cmu_Clk_5, assumeEnabled);
154 }
155 else if (fxSelect == 7)
156 {
157 frequency = IfxGtm_Cmu_getClkFrequency(gtm, IfxGtm_Cmu_Clk_6, assumeEnabled);
158 }
159 else if (fxSelect == 8)
160 {
161 frequency = IfxGtm_Cmu_getClkFrequency(gtm, IfxGtm_Cmu_Clk_7, assumeEnabled);
162 }
163 else
164 {
165 frequency = IfxGtm_Cmu_getGclkFrequency(gtm);
166 }
167
168 switch (clkIndex)
169 {
170 case IfxGtm_Cmu_Fxclk_0:
171 frequency = frequency / 1;
172 break;
173 case IfxGtm_Cmu_Fxclk_1:
174 frequency = frequency / 16;
175 break;
176 case IfxGtm_Cmu_Fxclk_2:
177 frequency = frequency / 256;
178 break;
179 case IfxGtm_Cmu_Fxclk_3:
180 frequency = frequency / 4096;
181 break;
182 case IfxGtm_Cmu_Fxclk_4:
183 frequency = frequency / 65536;
184 break;
185 default:
186 frequency = 0.0;
187 break;
188 }
189 }
190 else
191 {
192 frequency = 0.0;
193 }
194
195 return frequency;
196 }
197
198
199 float32 IfxGtm_Cmu_getGclkFrequency(Ifx_GTM *gtm)
200 {
201 float32 N = gtm->CMU.GCLK_DEN.B.GCLK_DEN;
202 float32 Z = gtm->CMU.GCLK_NUM.B.GCLK_NUM;
203 float32 multiplier = N / Z;
204
205 return IfxGtm_Cmu_getModuleFrequency(gtm) * multiplier;
206 }
207
208
209 float32 IfxGtm_Cmu_getModuleFrequency(Ifx_GTM *gtm)
210 {
211 return IfxGtm_getSysClkFrequency();
212 }
213
214
215 boolean IfxGtm_Cmu_isClkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
216 {
217 return ((gtm->CMU.CLK_EN.U >> (2 * clkIndex)) & IFX_GTM_CMU_CLK_EN_EN_CLK0_MSK) == 0x3;
218 }
219
220
221 boolean IfxGtm_Cmu_isEclkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
222 {
223 return ((gtm->CMU.CLK_EN.U >> (2 * clkIndex + 16)) & IFX_GTM_CMU_CLK_EN_EN_CLK0_MSK) == 0x3;
224 }
225
226
227 boolean IfxGtm_Cmu_isFxClockEnabled(Ifx_GTM *gtm)
228 {
229 return gtm->CMU.CLK_EN.B.EN_FXCLK == 0x3;
230 }
231
232
233 void IfxGtm_Cmu_selectClkInput(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
234 {
235 switch (clkIndex)
236 {
237 case IfxGtm_Cmu_Clk_6:
238 gtm->CMU.CLK_6.CTRL.B.CLK6_SEL = useGlobal ? 0 : 1;
239 break;
240 case IfxGtm_Cmu_Clk_7:
241 gtm->CMU.CLK_7.CTRL.B.CLK7_SEL = useGlobal ? 0 : 1;
242 break;
243 default:
244 break;
245 }
246 }
247
248
249 void IfxGtm_Cmu_setClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
250 {
251 float32 t = (IfxGtm_Cmu_getGclkFrequency(gtm) / frequency) - 1;
252 uint32 cnt = (uint32)t;
253
254 if ((t - (float32)cnt) > 0.5)
255 { /* Round to nearest */
256 cnt++;
257 }
258
259 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
260 IfxScuWdt_clearCpuEndinit(psw);
261
262 switch (clkIndex)
263 {
264 case IfxGtm_Cmu_Clk_0:
265 case IfxGtm_Cmu_Clk_1:
266 case IfxGtm_Cmu_Clk_2:
267 case IfxGtm_Cmu_Clk_3:
268 case IfxGtm_Cmu_Clk_4:
269 case IfxGtm_Cmu_Clk_5:
270 gtm->CMU.CLK0_5[clkIndex].CTRL.B.CLK_CNT = cnt;
271 break;
272 case IfxGtm_Cmu_Clk_6:
273 gtm->CMU.CLK_6.CTRL.B.CLK_CNT = cnt;
274 break;
275 case IfxGtm_Cmu_Clk_7:
276 gtm->CMU.CLK_7.CTRL.B.CLK_CNT = cnt;
277 break;
278 default:
279 break;
280 }
281
282 IfxScuWdt_setCpuEndinit(psw);
283 }
284
285
286 void IfxGtm_Cmu_setEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
287 {
288 float32 f;
289 float32 bestDistance = frequency;
290 float32 fIn = IfxGtm_Cmu_getGclkFrequency(gtm) * 2;
291 uint32 z, n, nBest = 1, zBest = 1;
292 float32 t;
293
294 for (z = 1; z < 0xFFFFFF; z++)
295 {
296 boolean endLoop = FALSE;
297 t = fIn / z;
298
299 for (n = z; n > 0; n--)
300 {
301 float32 distance;
302 f = t * n;
303 distance = fabsf(frequency - f);
304
305 if (distance < bestDistance)
306 {
307 bestDistance = distance;
308 nBest = n;
309 zBest = z;
310 }
311
312 if (bestDistance < 0.1)
313 {
314 endLoop = TRUE;
315 break;
316 }
317 }
318
319 if (endLoop)
320 {
321 break;
322 }
323 }
324
325 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
326 IfxScuWdt_clearCpuEndinit(psw);
327 gtm->CMU.ECLK[clkIndex].NUM.B.ECLK_NUM = zBest;
328 gtm->CMU.ECLK[clkIndex].NUM.B.ECLK_NUM = zBest; /* write twice to be sure */
329 gtm->CMU.ECLK[clkIndex].DEN.B.ECLK_DEN = nBest;
330 IfxScuWdt_setCpuEndinit(psw);
331 }
332
333
334 void IfxGtm_Cmu_setGclkFrequency(Ifx_GTM *gtm, float32 frequency)
335 {
336 float32 f;
337 float32 bestDistance = frequency;
338
339 float32 fIn = IfxGtm_Cmu_getModuleFrequency(gtm);
340 uint32 z, n, nBest = 1, zBest = 1;
341 float32 t;
342
343 #if 1
344
345 for (z = 1; z < 0xFFFFFF; z++)
346 {
347 boolean endLoop = FALSE;
348 t = fIn / z;
349
350 for (n = z; n > 0; n--)
351 {
352 float32 distance;
353 f = t * n;
354 distance = fabsf(frequency - f);
355
356 if (distance < bestDistance)
357 {
358 bestDistance = distance;
359 nBest = n;
360 zBest = z;
361 }
362
363 if (bestDistance < 0.1)
364 {
365 endLoop = TRUE;
366 break;
367 }
368 }
369
370 if (endLoop)
371 {
372 break;
373 }
374 }
375
376 #else
377
378 for (n = 1; n < 0xFFFFFF; n++)
379 {
380 float32 distance;
381 /* get best z */
382 z = floorf(frequency * n / fIn);
383 t = fIn / n;
384
385 /* lower value */
386 f = t * z;
387 distance = fabsf(frequency - f);
388
389 if (distance < bestDistance)
390 {
391 bestDistance = distance;
392 nBest = n;
393 zBest = z;
394 }
395
396 /* upper value */
397 f = t * (z + 1);
398 distance = fabsf(frequency - f);
399
400 if (distance < bestDistance)
401 {
402 bestDistance = distance;
403 nBest = n;
404 zBest = z;
405 }
406
407 if (bestDistance == 0.0)
408 {
409 break;
410 }
411 }
412
413 #endif
414
415 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
416 IfxScuWdt_clearCpuEndinit(psw);
417 gtm->CMU.GCLK_NUM.B.GCLK_NUM = zBest;
418 gtm->CMU.GCLK_NUM.B.GCLK_NUM = zBest; /* write twice to be sure */
419 gtm->CMU.GCLK_DEN.B.GCLK_DEN = nBest;
420 IfxScuWdt_setCpuEndinit(psw);
421 }
IfxGtm_Cmu_Fxclk_4
Definition: IfxGtm_Cmu.h:89
IfxGtm_Cmu_enableClocks
void IfxGtm_Cmu_enableClocks(Ifx_GTM *gtm, uint32 clkMask)
Enable / Disable the configurable, fixed, and external clocks.
Definition: IfxGtm_Cmu.c:58
IfxGtm_Cmu_Fxclk_3
Definition: IfxGtm_Cmu.h:88
IfxGtm_Dpll_SubInc_1
subincrement1
Definition: IfxGtm_cfg.h:236
IfxGtm_Cmu_Fxclk_0
Definition: IfxGtm_Cmu.h:85
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Cmu_getEclkFrequency
float32 IfxGtm_Cmu_getEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
Returns the GTM external clock frequency in Hz.
Definition: IfxGtm_Cmu.c:118
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxGtm_Cmu_getGclkFrequency
float32 IfxGtm_Cmu_getGclkFrequency(Ifx_GTM *gtm)
Returns the GTM global clock frequency in Hz.
Definition: IfxGtm_Cmu.c:199
IfxGtm_Cmu_setClkFrequency
void IfxGtm_Cmu_setClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
Set the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:249
IfxGtm_Dpll.h
GTM basic functionality.
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Cmu_setEclkFrequency
void IfxGtm_Cmu_setEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
Set the GTM external clock frequency in Hz.
Definition: IfxGtm_Cmu.c:286
IfxGtm_Cmu_Clk_5
Definition: IfxGtm_Cmu.h:71
IfxGtm_Cmu_isClkClockEnabled
boolean IfxGtm_Cmu_isClkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
Returns the configurable clock enable status.
Definition: IfxGtm_Cmu.c:215
IfxGtm_Cmu_setGclkFrequency
void IfxGtm_Cmu_setGclkFrequency(Ifx_GTM *gtm, float32 frequency)
Set the GTM global clock frequency in Hz.
Definition: IfxGtm_Cmu.c:334
IfxGtm_Cmu_Fxclk_1
Definition: IfxGtm_Cmu.h:86
IfxScuWdt.h
SCU basic functionality.
IfxGtm_Cmu_Clk_0
Definition: IfxGtm_Cmu.h:66
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxGtm_getSysClkFrequency
float32 IfxGtm_getSysClkFrequency(void)
returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK...
Definition: IfxGtm.c:74
IfxGtm_Cmu_Clk_6
Definition: IfxGtm_Cmu.h:72
IfxGtm_Cmu_Fxclk
IfxGtm_Cmu_Fxclk
Definition: IfxGtm_Cmu.h:83
IfxGtm_Cmu_Clk_4
Definition: IfxGtm_Cmu.h:70
IfxGtm_Cmu_Eclk
IfxGtm_Cmu_Eclk
Definition: IfxGtm_Cmu.h:76
IfxGtm_Cmu_Fxclk_2
Definition: IfxGtm_Cmu.h:87
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Cmu_Clk_2
Definition: IfxGtm_Cmu.h:68
t
uint32 ins t
Definition: IfxCpu_IntrinsicsDcc.h:414
IfxGtm_Cmu_Clk_3
Definition: IfxGtm_Cmu.h:69
IfxGtm_Cmu_getFxClkFrequency
float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz.
Definition: IfxGtm_Cmu.c:138
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Dpll_SubInc_2
subincrement2
Definition: IfxGtm_cfg.h:237
IfxScuCcu.h
SCU basic functionality.
IfxGtm_Cmu_getModuleFrequency
float32 IfxGtm_Cmu_getModuleFrequency(Ifx_GTM *gtm)
returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency:...
Definition: IfxGtm_Cmu.c:209
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Cmu_selectClkInput
void IfxGtm_Cmu_selectClkInput(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the correspondi...
Definition: IfxGtm_Cmu.c:233
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxGtm_Cmu_isFxClockEnabled
boolean IfxGtm_Cmu_isFxClockEnabled(Ifx_GTM *gtm)
Returns the fixed clock enable status.
Definition: IfxGtm_Cmu.c:227
IfxGtm_Cmu_isEclkClockEnabled
boolean IfxGtm_Cmu_isEclkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
Returns the external clock enable status.
Definition: IfxGtm_Cmu.c:221
TRUE
#define TRUE
Definition: Platform_Types.h:90
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm.h
GTM basic functionality.
IfxGtm_Cmu_Clk_1
Definition: IfxGtm_Cmu.h:67
IfxGtm_Dpll_getSubIncFrequency
float32 IfxGtm_Dpll_getSubIncFrequency(Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F.
Definition: IfxGtm_Dpll.c:52
IfxGtm_Cmu_getClkFrequency
float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:64
IfxGtm_Cmu_Clk_7
Definition: IfxGtm_Cmu.h:73


iLLD_TC26B: IfxGtm_Cmu.h Source File

  • Gtm
  • Std
IfxGtm_Cmu.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Cmu.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Std_Cmu Cmu Basic Functionality
42 * \ingroup IfxLld_Gtm_Std
43 * \defgroup IfxLld_Gtm_Std_Cmu_CMUEnumerations CMU Enumerations
44 * \ingroup IfxLld_Gtm_Std_Cmu
45 * \defgroup IfxLld_Gtm_Std_Cmu_CMU_Basic_Functions CMU Basic Functions
46 * \ingroup IfxLld_Gtm_Std_Cmu
47 */
48
49 #ifndef IFXGTM_CMU_H
50 #define IFXGTM_CMU_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "_Impl/IfxGtm_cfg.h"
57
58 /******************************************************************************/
59 /*--------------------------------Enumerations--------------------------------*/
60 /******************************************************************************/
61
62 /** \addtogroup IfxLld_Gtm_Std_Cmu_CMUEnumerations
63 * \{ */
64 typedef enum
65 {
66 IfxGtm_Cmu_Clk_0 = 0,
67 IfxGtm_Cmu_Clk_1,
68 IfxGtm_Cmu_Clk_2,
69 IfxGtm_Cmu_Clk_3,
70 IfxGtm_Cmu_Clk_4,
71 IfxGtm_Cmu_Clk_5,
72 IfxGtm_Cmu_Clk_6,
73 IfxGtm_Cmu_Clk_7
74 } IfxGtm_Cmu_Clk;
75
76 typedef enum
77 {
78 IfxGtm_Cmu_Eclk_0 = 0,
79 IfxGtm_Cmu_Eclk_1,
80 IfxGtm_Cmu_Eclk_2
81 } IfxGtm_Cmu_Eclk;
82
83 typedef enum
84 {
85 IfxGtm_Cmu_Fxclk_0 = 0,
86 IfxGtm_Cmu_Fxclk_1,
87 IfxGtm_Cmu_Fxclk_2,
88 IfxGtm_Cmu_Fxclk_3,
89 IfxGtm_Cmu_Fxclk_4
90 } IfxGtm_Cmu_Fxclk;
91
92 /** \brief Tim Filter counter frequency select
93 */
94 typedef enum
95 {
96 IfxGtm_Cmu_Tim_Filter_Clk_0, /**< \brief FLT_CNT counts with CMU_CLK0 */
97 IfxGtm_Cmu_Tim_Filter_Clk_1, /**< \brief FLT_CNT counts with CMU_CLK1 */
98 IfxGtm_Cmu_Tim_Filter_Clk_6, /**< \brief FLT_CNT counts with CMU_CLK6 */
99 IfxGtm_Cmu_Tim_Filter_Clk_7 /**< \brief FLT_CNT counts with CMU_CLK7 */
100 } IfxGtm_Cmu_Tim_Filter_Clk;
101
102 /** \} */
103
104 /** \addtogroup IfxLld_Gtm_Std_Cmu_CMU_Basic_Functions
105 * \{ */
106
107 /******************************************************************************/
108 /*-------------------------Global Function Prototypes-------------------------*/
109 /******************************************************************************/
110
111 /** \brief Enable / Disable the configurable, fixed, and external clocks
112 * \param gtm Pointer to GTM module
113 * \param clkMask Enable / Disable mask.
114 * \return None
115 */
116 IFX_EXTERN void IfxGtm_Cmu_enableClocks(Ifx_GTM *gtm, uint32 clkMask);
117
118 /** \brief Returns the GTM configurable clock frequency in Hz
119 * \param gtm Pointer to GTM module
120 * \param clkIndex Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
121 * \param assumeEnabled When TRUE, attempt to calculate the frequency as if the clock is enabled.
122 * \return GTM configurable clock frequency in Hz
123 */
124 IFX_EXTERN float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled);
125
126 /** \brief Returns the GTM external clock frequency in Hz
127 * \param gtm Pointer to GTM module
128 * \param clkIndex Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
129 * \param assumeEnabled When TRUE, attempt to calculate the frequency as if the clock is enabled.
130 * \return GTM external clock frequency in Hz
131 */
132 IFX_EXTERN float32 IfxGtm_Cmu_getEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled);
133
134 /** \brief Returns the GTM fixed clock frequency in Hz
135 * \param gtm Pointer to GTM module
136 * \param clkIndex Index of the fixed clock 0=CMU_FXCLK0, 1=CMU_FXCLK1, ...
137 * \param assumeEnabled When TRUE, attempt to calculate the frequency as if the clock is enabled.
138 * \return GTM fixed clock frequency in Hz
139 */
140 IFX_EXTERN float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled);
141
142 /** \brief Returns the GTM global clock frequency in Hz
143 * \param gtm Pointer to GTM module
144 * \return GTM global clock frequency in Hz
145 */
146 IFX_EXTERN float32 IfxGtm_Cmu_getGclkFrequency(Ifx_GTM *gtm);
147
148 /** \brief returns the CMU module frequency in Hz. This is only for CMU module frequency.
149 * For GTM SYS frequency: IfxGtm_getSysClkFrequency() is to be used.
150 * \param gtm Pointer to GTM module
151 * \return GTM module frequency in Hz
152 */
153 IFX_EXTERN float32 IfxGtm_Cmu_getModuleFrequency(Ifx_GTM *gtm);
154
155 /** \brief Returns the configurable clock enable status
156 * \param gtm Pointer to GTM module
157 * \param clkIndex Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
158 * \return TRUE The clock is enabled, FALSE The clock is disabled
159 */
160 IFX_EXTERN boolean IfxGtm_Cmu_isClkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex);
161
162 /** \brief Returns the external clock enable status
163 * \param gtm Pointer to GTM module
164 * \param clkIndex Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
165 * \return TRUE The clock is enabled, FALSE The clock is disabled
166 */
167 IFX_EXTERN boolean IfxGtm_Cmu_isEclkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex);
168
169 /** \brief Returns the fixed clock enable status
170 * \param gtm Pointer to GTM module
171 * \return TRUE The clock is enabled, FALSE The clock is disabled
172 */
173 IFX_EXTERN boolean IfxGtm_Cmu_isFxClockEnabled(Ifx_GTM *gtm);
174
175 /** \brief Select the clock input for CLK6 and CLK7
176 * note The frequency can only be modified when the corresponding clock is disabled using IfxGtm_Cmu_enableClocks()
177 * \param gtm Pointer to GTM module
178 * \param clkIndex Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
179 * \param useGlobal if TRUE, uses the global clock as an input, else use the SUB_INC input
180 * \return None
181 */
182 IFX_EXTERN void IfxGtm_Cmu_selectClkInput(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal);
183
184 /** \brief Set the GTM configurable clock frequency in Hz
185 * \param gtm Pointer to GTM module
186 * \param clkIndex Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
187 * \param frequency Frequency in Hz
188 * \return None
189 */
190 IFX_EXTERN void IfxGtm_Cmu_setClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency);
191
192 /** \brief Set the GTM external clock frequency in Hz
193 * \param gtm Pointer to GTM module
194 * \param clkIndex Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
195 * \param frequency Frequency in Hz
196 * \return None
197 */
198 IFX_EXTERN void IfxGtm_Cmu_setEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency);
199
200 /** \brief Set the GTM global clock frequency in Hz
201 * \param gtm Pointer to GTM module
202 * \param frequency Frequency in Hz
203 * \return None
204 */
205 IFX_EXTERN void IfxGtm_Cmu_setGclkFrequency(Ifx_GTM *gtm, float32 frequency);
206
207 /** \} */
208
209 #endif /* IFXGTM_CMU_H */
IfxGtm_Cmu_Fxclk_4
Definition: IfxGtm_Cmu.h:89
IfxGtm_Cmu_enableClocks
IFX_EXTERN void IfxGtm_Cmu_enableClocks(Ifx_GTM *gtm, uint32 clkMask)
Enable / Disable the configurable, fixed, and external clocks.
Definition: IfxGtm_Cmu.c:58
IfxGtm_Cmu_Fxclk_3
Definition: IfxGtm_Cmu.h:88
IfxGtm_Cmu_Tim_Filter_Clk_6
FLT_CNT counts with CMU_CLK6.
Definition: IfxGtm_Cmu.h:98
IfxGtm_Cmu_Fxclk_0
Definition: IfxGtm_Cmu.h:85
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Cmu_getEclkFrequency
IFX_EXTERN float32 IfxGtm_Cmu_getEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
Returns the GTM external clock frequency in Hz.
Definition: IfxGtm_Cmu.c:118
IfxGtm_Cmu_getGclkFrequency
IFX_EXTERN float32 IfxGtm_Cmu_getGclkFrequency(Ifx_GTM *gtm)
Returns the GTM global clock frequency in Hz.
Definition: IfxGtm_Cmu.c:199
IfxGtm_Cmu_setClkFrequency
IFX_EXTERN void IfxGtm_Cmu_setClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
Set the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:249
IfxGtm_Cmu_setEclkFrequency
IFX_EXTERN void IfxGtm_Cmu_setEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
Set the GTM external clock frequency in Hz.
Definition: IfxGtm_Cmu.c:286
IfxGtm_Cmu_Tim_Filter_Clk_1
FLT_CNT counts with CMU_CLK1.
Definition: IfxGtm_Cmu.h:97
IfxGtm_Cmu_Clk_5
Definition: IfxGtm_Cmu.h:71
IfxGtm_Cmu_isClkClockEnabled
IFX_EXTERN boolean IfxGtm_Cmu_isClkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
Returns the configurable clock enable status.
Definition: IfxGtm_Cmu.c:215
IfxGtm_Cmu_setGclkFrequency
IFX_EXTERN void IfxGtm_Cmu_setGclkFrequency(Ifx_GTM *gtm, float32 frequency)
Set the GTM global clock frequency in Hz.
Definition: IfxGtm_Cmu.c:334
IfxGtm_Cmu_Fxclk_1
Definition: IfxGtm_Cmu.h:86
IfxGtm_Cmu_Clk_0
Definition: IfxGtm_Cmu.h:66
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Cmu_Tim_Filter_Clk
IfxGtm_Cmu_Tim_Filter_Clk
Tim Filter counter frequency select.
Definition: IfxGtm_Cmu.h:94
IfxGtm_Cmu_Clk_6
Definition: IfxGtm_Cmu.h:72
IfxGtm_Cmu_Fxclk
IfxGtm_Cmu_Fxclk
Definition: IfxGtm_Cmu.h:83
IfxGtm_Cmu_Clk_4
Definition: IfxGtm_Cmu.h:70
IfxGtm_Cmu_Tim_Filter_Clk_7
FLT_CNT counts with CMU_CLK7.
Definition: IfxGtm_Cmu.h:99
IfxGtm_Cmu_Eclk
IfxGtm_Cmu_Eclk
Definition: IfxGtm_Cmu.h:76
IfxGtm_Cmu_Fxclk_2
Definition: IfxGtm_Cmu.h:87
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Cmu_Clk_2
Definition: IfxGtm_Cmu.h:68
IfxGtm_Cmu_Clk_3
Definition: IfxGtm_Cmu.h:69
IfxGtm_Cmu_Eclk_1
Definition: IfxGtm_Cmu.h:79
IfxGtm_Cmu_getFxClkFrequency
IFX_EXTERN float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz.
Definition: IfxGtm_Cmu.c:138
IfxGtm_Cmu_getModuleFrequency
IFX_EXTERN float32 IfxGtm_Cmu_getModuleFrequency(Ifx_GTM *gtm)
returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency:...
Definition: IfxGtm_Cmu.c:209
IfxGtm_Cmu_selectClkInput
IFX_EXTERN void IfxGtm_Cmu_selectClkInput(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the correspondi...
Definition: IfxGtm_Cmu.c:233
IfxGtm_Cmu_isFxClockEnabled
IFX_EXTERN boolean IfxGtm_Cmu_isFxClockEnabled(Ifx_GTM *gtm)
Returns the fixed clock enable status.
Definition: IfxGtm_Cmu.c:227
IfxGtm_Cmu_isEclkClockEnabled
IFX_EXTERN boolean IfxGtm_Cmu_isEclkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
Returns the external clock enable status.
Definition: IfxGtm_Cmu.c:221
IfxGtm_Cmu_Eclk_2
Definition: IfxGtm_Cmu.h:80
IfxGtm_Cmu_Clk_1
Definition: IfxGtm_Cmu.h:67
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Cmu_Eclk_0
Definition: IfxGtm_Cmu.h:78
IfxGtm_Cmu_Tim_Filter_Clk_0
FLT_CNT counts with CMU_CLK0.
Definition: IfxGtm_Cmu.h:96
IfxGtm_Cmu_getClkFrequency
IFX_EXTERN float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:64
IfxGtm_Cmu_Clk_7
Definition: IfxGtm_Cmu.h:73


iLLD_TC26B: IfxGtm_Dpll.c Source File

  • Gtm
  • Std
IfxGtm_Dpll.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Dpll.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Dpll.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 float32 IfxGtm_Dpll_getSubIncFrequency(Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
53 {
54 IFX_UNUSED_PARAMETER(gtm)
55 IFX_UNUSED_PARAMETER(index)
56 return 0.0F;
57 }
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Dpll.h
GTM basic functionality.
IfxGtm_Dpll_SubInc
IfxGtm_Dpll_SubInc
Enum for Dpll subincrements.
Definition: IfxGtm_cfg.h:234
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxGtm_Dpll_getSubIncFrequency
float32 IfxGtm_Dpll_getSubIncFrequency(Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F.
Definition: IfxGtm_Dpll.c:52


iLLD_TC26B: IfxGtm_Dpll.h Source File

  • Gtm
  • Std
IfxGtm_Dpll.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Dpll.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Std_Dpll Dpll Basic Functionality
42 * \ingroup IfxLld_Gtm_Std
43 * \defgroup IfxLld_Gtm_Std_Dpll_Basic_Functions DPLL Basic Functions
44 * \ingroup IfxLld_Gtm_Std_Dpll
45 */
46
47 #ifndef IFXGTM_DPLL_H
48 #define IFXGTM_DPLL_H 1
49
50 /******************************************************************************/
51 /*----------------------------------Includes----------------------------------*/
52 /******************************************************************************/
53
54 #include "_Impl/IfxGtm_cfg.h"
55 /** \addtogroup IfxLld_Gtm_Std_Dpll_Basic_Functions
56 * \{ */
57
58 /******************************************************************************/
59 /*-------------------------Global Function Prototypes-------------------------*/
60 /******************************************************************************/
61
62 /** \brief Dummy Function, returns 0.0F
63 * \param gtm Pointer to GTM module
64 * \param index Dpll subincrement index
65 * \return frequency
66 */
67 IFX_EXTERN float32 IfxGtm_Dpll_getSubIncFrequency(Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index);
68
69 /** \} */
70
71 #endif /* IFXGTM_DPLL_H */
float32
float float32
Definition: Platform_Types.h:170
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Dpll_SubInc
IfxGtm_Dpll_SubInc
Enum for Dpll subincrements.
Definition: IfxGtm_cfg.h:234
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Dpll_getSubIncFrequency
IFX_EXTERN float32 IfxGtm_Dpll_getSubIncFrequency(Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F.
Definition: IfxGtm_Dpll.c:52


iLLD_TC26B: IfxGtm_PinMap.c Source File

  • _PinMap
IfxGtm_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_PinMap.c
3 * \brief GTM I/O map
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxGtm_PinMap.h"
44
45 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};
46 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};
47 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};
48 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};
49 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1};
50 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};
51 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};
52 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};
53 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};
54 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};
55 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};
56 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};
57 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1};
58 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};
59 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};
60 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};
61 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};
62 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};
63 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};
64 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};
65 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};
66 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};
67 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1};
68 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};
69 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};
70 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};
71 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};
72 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};
73 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};
74 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};
75 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};
76 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};
77 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};
78 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};
79 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};
80 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};
81 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};
82 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};
83 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};
84 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};
85 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};
86 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};
87 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};
88 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};
89 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};
90 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};
91 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};
92 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};
93 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};
94 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};
95 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};
96 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};
97 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};
98 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};
99 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};
100 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};
101 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};
102 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};
103 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};
104 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};
105 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};
106 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};
107 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};
108 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};
109 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};
110 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};
111 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};
112 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};
113 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};
114 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};
115 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};
116 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};
117 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};
118 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1};
119 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};
120 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};
121 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};
122 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};
123 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};
124 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};
125 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};
126 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};
127 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};
128 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};
129 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};
130 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};
131 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};
132 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};
133 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};
134 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};
135 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};
136 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};
137 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};
138 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};
139 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};
140 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};
141 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};
142 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};
143 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};
144 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};
145 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};
146 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};
147 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};
148 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};
149 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};
150 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};
151 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};
152 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};
153 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};
154 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};
155 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};
156 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};
157 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};
158 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};
159 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};
160 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};
161 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};
162 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};
163 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};
164 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};
165 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};
166 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};
167 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};
168 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};
169 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};
170 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};
171 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};
172 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};
173 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};
174 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};
175 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};
176 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};
177 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};
178 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};
179 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};
180 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};
181 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};
182 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};
183 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};
184 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};
185 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};
186 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};
187 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};
188 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};
189 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};
190 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};
191 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};
192 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};
193 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};
194 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};
195 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};
196 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};
197 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};
198 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};
199 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};
200 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};
201 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};
202 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};
203 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};
204 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};
205 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};
206 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};
207 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};
208 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};
209 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};
210 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};
211 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};
212 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};
213 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};
214 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};
215 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};
216 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};
217 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};
218 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};
219 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};
220 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};
221 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};
222 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};
223 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};
224 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1};
225 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};
226 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};
227 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};
228 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};
229 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};
230 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};
231 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};
232 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};
233 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};
234 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};
235 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};
236 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};
237 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};
238 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};
239 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1};
240 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};
241 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};
242 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};
243 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};
244 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};
245 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};
246 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};
247 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};
248 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};
249 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};
250 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};
251 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};
252 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};
253 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};
254 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};
255 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};
256 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};
257 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};
258 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};
259 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};
260 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};
261 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};
262 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};
263 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};
264 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};
265 IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT = {&MODULE_GTM, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt4};
266 IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT = {&MODULE_GTM, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt4};
267 IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT = {&MODULE_GTM, {&MODULE_P11,12}, IfxPort_OutputIdx_alt3};
268 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2};
269 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)3};
270 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1};
271 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10};
272 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9};
273 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)12};
274 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8};
275 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7};
276 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6};
277 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4};
278 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)5};
279 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)11};
280 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)13};
281 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3};
282 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)10};
283 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)11};
284 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)1};
285 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2};
286 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8};
287 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9};
288 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)12};
289 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7};
290 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6};
291 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5};
292 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4};
293 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3};
294 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4};
295 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)1};
296 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9};
297 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2};
298 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8};
299 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)11};
300 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)7};
301 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6};
302 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5};
303 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3};
304 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4};
305 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)1};
306 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9};
307 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8};
308 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2};
309 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7};
310 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P21, 0}, (IfxGtm_ChXSel)11};
311 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6};
312 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)10};
313 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5};
314 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2};
315 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6};
316 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7};
317 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5};
318 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1};
319 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4};
320 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P21, 1}, (IfxGtm_ChXSel)10};
321 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8};
322 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)9};
323 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3};
324 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2};
325 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P33, 1}, (IfxGtm_ChXSel)6};
326 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5};
327 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4};
328 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7};
329 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1};
330 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3};
331 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)1};
332 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6};
333 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4};
334 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5};
335 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7};
336 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)2};
337 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3};
338 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6};
339 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4};
340 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5};
341 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)7};
342 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3};
343 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1};
344 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2};
345 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2};
346 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)14};
347 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1};
348 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10};
349 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9};
350 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8};
351 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7};
352 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)15};
353 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)5};
354 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6};
355 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4};
356 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)13};
357 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3};
358 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3};
359 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)14};
360 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2};
361 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8};
362 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9};
363 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7};
364 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6};
365 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)10};
366 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5};
367 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4};
368 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)1};
369 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3};
370 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4};
371 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1};
372 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)14};
373 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9};
374 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2};
375 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8};
376 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)15};
377 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6};
378 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)10};
379 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5};
380 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)7};
381 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3};
382 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4};
383 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1};
384 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)11};
385 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9};
386 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8};
387 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2};
388 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7};
389 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6};
390 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)10};
391 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5};
392 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)12};
393 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2};
394 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)9};
395 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6};
396 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7};
397 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5};
398 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1};
399 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4};
400 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8};
401 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)12};
402 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3};
403 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)11};
404 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2};
405 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)11};
406 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5};
407 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4};
408 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7};
409 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1};
410 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)9};
411 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)8};
412 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3};
413 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)6};
414 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)12};
415 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)12};
416 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)2};
417 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)11};
418 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6};
419 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4};
420 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5};
421 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7};
422 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)9};
423 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P02, 6}, (IfxGtm_ChXSel)1};
424 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)8};
425 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3};
426 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)13};
427 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)12};
428 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)11};
429 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6};
430 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4};
431 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5};
432 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3};
433 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)8};
434 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)7};
435 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1};
436 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2};
437 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)9};
438 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)6};
439 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)5};
440 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)4};
441 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)2};
442 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3};
443 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)1};
444 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)1};
445 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)2};
446 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)5};
447 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)4};
448 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)3};
449 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1};
450 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)5};
451 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)4};
452 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P14, 8}, (IfxGtm_ChXSel)3};
453 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)2};
454 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1};
455 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)5};
456 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)4};
457 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P14, 9}, (IfxGtm_ChXSel)3};
458 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)2};
459 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)1};
460 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P21, 0}, (IfxGtm_ChXSel)6};
461 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)5};
462 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)4};
463 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P14,10}, (IfxGtm_ChXSel)3};
464 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)2};
465 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)1};
466 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P21, 1}, (IfxGtm_ChXSel)6};
467 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)5};
468 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)4};
469 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)3};
470 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)2};
471 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)2};
472 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)1};
473 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)5};
474 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)6};
475 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)4};
476 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)3};
477 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)2};
478 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)1};
479 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)5};
480 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)6};
481 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)4};
482 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)3};
483 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};
484 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};
485 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};
486 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};
487 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};
488 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};
489 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};
490 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1};
491 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};
492 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};
493 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};
494 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};
495 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};
496 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};
497 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};
498 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};
499 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};
500 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};
501 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};
502 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};
503 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};
504 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};
505 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};
506 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};
507 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};
508 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};
509 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};
510 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};
511 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};
512 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};
513 IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};
514 IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};
515 IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};
516 IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};
517 IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};
518 IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};
519 IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};
520 IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};
521 IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};
522 IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};
523 IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};
524 IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};
525 IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};
526 IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};
527 IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};
528 IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};
529 IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};
530 IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};
531 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};
532 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};
533 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};
534 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};
535 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};
536 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};
537 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};
538 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};
539 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};
540 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};
541 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};
542 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};
543 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};
544 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};
545 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};
546 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};
547 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};
548 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};
549 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};
550 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};
551 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};
552 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};
553 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};
554 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};
555 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};
556 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};
557 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};
558 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};
559 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};
560 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};
561 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};
562 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};
563 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};
564 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};
565 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};
566 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};
567 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};
568 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};
569 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};
570 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};
571 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};
572 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};
573 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1};
574 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};
575 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};
576 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};
577 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};
578 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};
579 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};
580 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};
581 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};
582 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};
583 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};
584 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};
585 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};
586 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};
587 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};
588 IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};
589 IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};
590 IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};
591 IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1};
592 IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};
593 IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};
594 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};
595 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};
596 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};
597 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};
598 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};
599 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};
600 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};
601 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};
602 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1};
603 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};
604 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};
605 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};
606 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};
607 IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};
608 IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};
609 IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};
610 IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};
611 IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};
612 IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};
613 IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};
614 IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};
615 IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};
616 IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};
617 IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};
618 IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};
619 IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};
620 IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};
621 IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};
622 IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};
623 IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};
624 IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};
625 IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};
626 IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};
627 IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};
628 IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};
629 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};
630 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};
631 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};
632 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};
633 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};
634 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1};
635 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};
636 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};
637 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};
638 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};
639 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};
640 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};
641 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};
642 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};
643 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};
644 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};
645 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};
646 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};
647 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};
648 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};
649 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};
650 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};
651 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};
652 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};
653 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};
654 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};
655 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};
656 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};
657 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};
658 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};
659 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};
660 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};
661 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};
662 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};
663 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};
664 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};
665 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};
666 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};
667 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};
668 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};
669 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};
670 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};
671 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};
672 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};
673 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};
674 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};
675 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};
676 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};
677 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};
678 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};
679 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};
680 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};
681 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};
682 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};
683 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};
684 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};
685 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};
686 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1};
687 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};
688 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};
689 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};
690 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};
691 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};
692 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};
693 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};
694 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};
695 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};
696 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};
697 IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};
698 IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};
699 IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};
700 IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};
701 IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};
702 IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};
703
704 #include "IfxGtm_bf.h"
705
706 void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
707 {
708 uint32 shift = config->channel * 4;
709
710 __ldmst_c(&(MODULE_GTM.INOUTSEL.TIM[config->tim].INSEL.U), (0xFU << shift), ((uint32)config->select) << shift);
711
712 if (inputMode != IfxPort_InputMode_undefined)
713 {
714 IfxPort_setPinModeInput(config->pin.port, config->pin.pinIndex, inputMode);
715 }
716 }
717
718 void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
719 {
720 uint32 outselReg = (config->toutn >> 4);
721 uint32 shift = (config->toutn & 0xFU) * 2;
722 uint32 outsel = (uint32)config->toutSel << shift;
723 uint32 mask = 0x3U << shift;
724
725 __ldmst_c(&(MODULE_GTM.INOUTSEL.T.OUTSEL[outselReg].U), mask, outsel);
726 IfxPort_setPinModeOutput(config->pin.port, config->pin.pinIndex, outputMode, config->select);
727 IfxPort_setPinPadDriver(config->pin.port, config->pin.pinIndex, padDriver);
728 }
729
730 void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
731 {
732 uint32 outselReg = (config->toutn >> 4);
733 uint32 shift = (config->toutn & 0xFU) * 2;
734 uint32 outsel = (uint32)config->toutSel << shift;
735 uint32 mask = 0x3U << shift;
736
737 __ldmst_c(&(MODULE_GTM.INOUTSEL.T.OUTSEL[outselReg].U), mask, outsel);
738 IfxPort_setPinModeOutput(config->pin.port, config->pin.pinIndex, outputMode, config->select);
739 IfxPort_setPinPadDriver(config->pin.port, config->pin.pinIndex, padDriver);
740 }
IfxGtm_ATOM0_4_TOUT14_P00_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT
Definition: IfxGtm_PinMap.c:78
IfxGtm_TIM0_1_TIN19_P00_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN
Definition: IfxGtm_PinMap.c:284
IfxGtm_ATOM0_3_TOUT60_P20_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT
Definition: IfxGtm_PinMap.c:75
IfxGtm_TOM1_14_TOUT36_P32_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT
Definition: IfxGtm_PinMap.c:624
IfxGtm_TOM1_3_TOUT56_P21_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT
Definition: IfxGtm_PinMap.c:655
IfxGtm_TOM1_12_TOUT61_P20_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT
Definition: IfxGtm_PinMap.c:619
IfxGtm_TIM0_5_TIN41_P23_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN
Definition: IfxGtm_PinMap.c:327
IfxGtm_TIM1_0_TIN76_P15_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN
Definition: IfxGtm_PinMap.c:353
IfxGtm_TOM0_4_TOUT81_P14_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT
Definition: IfxGtm_PinMap.c:561
IfxGtm_TOM0_8_TOUT94_P13_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT
Definition: IfxGtm_PinMap.c:585
IfxGtm_ATOM1_5_TOUT40_P32_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT
Definition: IfxGtm_PinMap.c:153
IfxGtm_TIM1_0_TIN18_P00_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN
Definition: IfxGtm_PinMap.c:347
IfxGtm_ATOM1_0_TOUT68_P20_12_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT
Definition: IfxGtm_PinMap.c:107
IfxGtm_ATOM2_7_TOUT93_P13_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT
Definition: IfxGtm_PinMap.c:218
IfxGtm_TIM2_0_TIN34_P33_12_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN
Definition: IfxGtm_PinMap.c:438
IfxGtm_Atom_2
ATOM object 2.
Definition: IfxGtm_cfg.h:213
IfxGtm_TIM1_1_TIN78_P15_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN
Definition: IfxGtm_PinMap.c:366
IfxGtm_TOM1_0_TOUT87_P14_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT
Definition: IfxGtm_PinMap.c:603
IfxGtm_ATOM2_5_TOUT73_P15_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT
Definition: IfxGtm_PinMap.c:204
IfxGtm_TOM1_6_TOUT74_P15_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT
Definition: IfxGtm_PinMap.c:685
IfxGtm_ATOM0_1_TOUT47_P22_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT
Definition: IfxGtm_PinMap.c:57
IfxGtm_TIM1_7_TIN17_P00_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN
Definition: IfxGtm_PinMap.c:428
IfxGtm_TOM0_13_TOUT99_P11_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT
Definition: IfxGtm_PinMap.c:518
IfxGtm_ATOM0_1_TOUT1_P02_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT
Definition: IfxGtm_PinMap.c:55
IfxGtm_ATOM0_4_TOUT39_P32_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT
Definition: IfxGtm_PinMap.c:79
IfxGtm_ATOM1_6_TOUT74_P15_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT
Definition: IfxGtm_PinMap.c:166
IfxGtm_TIM0_3_TIN105_P10_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN
Definition: IfxGtm_PinMap.c:303
IfxGtm_Tim_0
TIM object 0.
Definition: IfxGtm_cfg.h:254
IfxGtm_TOM0_2_TOUT55_P21_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT
Definition: IfxGtm_PinMap.c:543
IfxGtm_ATOM0_3_TOUT82_P14_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT
Definition: IfxGtm_PinMap.c:76
IfxGtm_TIM1_6_TIN42_P23_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN
Definition: IfxGtm_PinMap.c:419
IfxGtm_PinMap_setTimTin
void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
Definition: IfxGtm_PinMap.c:706
IfxGtm_ATOM3_4_TOUT51_P21_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT
Definition: IfxGtm_PinMap.c:250
IfxGtm_TOM0_8_TOUT9_P00_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT
Definition: IfxGtm_PinMap.c:587
IfxGtm_TOM0_4_TOUT30_P33_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT
Definition: IfxGtm_PinMap.c:557
IfxGtm_ATOM1_7_TOUT45_P23_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT
Definition: IfxGtm_PinMap.c:169
IfxGtm_ATOM3_1_TOUT79_P15_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT
Definition: IfxGtm_PinMap.c:231
IfxGtm_Tom_1
TOM object 1.
Definition: IfxGtm_cfg.h:278
IfxGtm_TIM2_3_TIN60_P20_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN
Definition: IfxGtm_PinMap.c:455
IfxGtm_TIM0_2_TIN104_P10_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN
Definition: IfxGtm_PinMap.c:293
IfxGtm_ATOM3_0_TOUT77_P15_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT
Definition: IfxGtm_PinMap.c:223
IfxGtm_TIM0_4_TIN57_P21_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN
Definition: IfxGtm_PinMap.c:321
IfxGtm_TOM1_10_TOUT107_P10_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT
Definition: IfxGtm_PinMap.c:608
IfxGtm_TOM0_12_TOUT34_P33_12_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT
Definition: IfxGtm_PinMap.c:507
IfxGtm_ATOM2_7_TOUT63_P20_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT
Definition: IfxGtm_PinMap.c:214
IfxGtm_ATOM3_0_TOUT85_P14_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT
Definition: IfxGtm_PinMap.c:224
IfxGtm_ATOM1_4_TOUT4_P02_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT
Definition: IfxGtm_PinMap.c:145
IfxGtm_ATOM3_2_TOUT96_P11_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT
Definition: IfxGtm_PinMap.c:241
IfxGtm_TOM0_7_TOUT64_P20_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT
Definition: IfxGtm_PinMap.c:577
IfxGtm_ATOM1_7_TOUT67_P20_11_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT
Definition: IfxGtm_PinMap.c:170
IfxGtm_TIM1_5_TIN99_P11_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN
Definition: IfxGtm_PinMap.c:414
IfxGtm_ATOM0_7_TOUT17_P00_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT
Definition: IfxGtm_PinMap.c:98
IfxGtm_TIM0_4_TIN4_P02_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN
Definition: IfxGtm_PinMap.c:318
IfxGtm_Clk_Out
GTM Clock Output.
Definition: IfxGtm_PinMap.h:127
IfxGtm_TIM2_4_TIN72_P15_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN
Definition: IfxGtm_PinMap.c:462
IfxGtm_ATOM3_1_TOUT84_P14_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT
Definition: IfxGtm_PinMap.c:232
IfxGtm_ATOM1_4_TOUT57_P21_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT
Definition: IfxGtm_PinMap.c:147
IfxGtm_ATOM1_3_TOUT3_P02_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT
Definition: IfxGtm_PinMap.c:137
IfxGtm_Atom_ToutMap::toutn
uint32 toutn
TOUT number.
Definition: IfxGtm_PinMap.h:107
IfxGtm_ATOM2_3_TOUT71_P15_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT
Definition: IfxGtm_PinMap.c:191
IfxGtm_ATOM0_1_TOUT103_P10_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT
Definition: IfxGtm_PinMap.c:52
IfxGtm_TIM0_1_TIN10_P00_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN
Definition: IfxGtm_PinMap.c:282
IfxGtm_TIM0_0_TIN87_P14_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN
Definition: IfxGtm_PinMap.c:278
IfxGtm_TOM1_5_TOUT91_P13_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT
Definition: IfxGtm_PinMap.c:677
IfxGtm_TOM0_5_TOUT23_P33_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT
Definition: IfxGtm_PinMap.c:564
IfxGtm_ATOM3_0_TOUT18_P00_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT
Definition: IfxGtm_PinMap.c:219
IfxGtm_TOM0_7_TOUT93_P13_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT
Definition: IfxGtm_PinMap.c:579
IfxGtm_TIM2_7_TIN63_P20_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN
Definition: IfxGtm_PinMap.c:479
IfxGtm_TOM1_7_TOUT25_P33_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT
Definition: IfxGtm_PinMap.c:690
IfxGtm_TIM1_5_TIN82_P14_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN
Definition: IfxGtm_PinMap.c:412
IfxGtm_ATOM3_0_TOUT87_P14_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT
Definition: IfxGtm_PinMap.c:225
IfxGtm_TOM0_12_TOUT98_P11_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT
Definition: IfxGtm_PinMap.c:512
IfxGtm_ATOM2_1_TOUT27_P33_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT
Definition: IfxGtm_PinMap.c:179
IfxGtm_TOM1_1_TOUT19_P00_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT
Definition: IfxGtm_PinMap.c:631
IfxGtm_TOM0_14_TOUT74_P15_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT
Definition: IfxGtm_PinMap.c:524
IfxGtm_ATOM1_0_TOUT8_P02_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT
Definition: IfxGtm_PinMap.c:111
IfxGtm_TIM0_5_TIN23_P33_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN
Definition: IfxGtm_PinMap.c:325
IfxGtm_ATOM0_1_TOUT11_P00_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT
Definition: IfxGtm_PinMap.c:54
IfxGtm_TOM1_4_TOUT30_P33_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT
Definition: IfxGtm_PinMap.c:662
IfxGtm_ATOM0_6_TOUT59_P20_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT
Definition: IfxGtm_PinMap.c:96
IfxGtm_ATOM2_4_TOUT72_P15_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT
Definition: IfxGtm_PinMap.c:198
IfxGtm_TOM0_14_TOUT36_P32_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT
Definition: IfxGtm_PinMap.c:521
IfxGtm_TOM0_2_TOUT20_P00_11_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT
Definition: IfxGtm_PinMap.c:540
IfxGtm_TIM0_3_TIN60_P20_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN
Definition: IfxGtm_PinMap.c:312
IfxGtm_ATOM2_0_TOUT26_P33_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT
Definition: IfxGtm_PinMap.c:174
IfxGtm_ATOM2_2_TOUT70_P20_14_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT
Definition: IfxGtm_PinMap.c:186
IfxGtm_ATOM2_3_TOUT29_P33_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT
Definition: IfxGtm_PinMap.c:190
IfxGtm_TOM0_3_TOUT21_P00_12_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT
Definition: IfxGtm_PinMap.c:548
IfxGtm_TIM1_1_TIN47_P22_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN
Definition: IfxGtm_PinMap.c:363
IfxGtm_TIM0_0_TIN77_P15_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN
Definition: IfxGtm_PinMap.c:276
IfxGtm_TIM0_1_TIN47_P22_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN
Definition: IfxGtm_PinMap.c:289
IfxGtm_TIM1_3_TIN13_P00_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN
Definition: IfxGtm_PinMap.c:383
IfxGtm_TOM1_15_TOUT7_P02_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT
Definition: IfxGtm_PinMap.c:628
IfxGtm_TIM1_6_TIN106_P10_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN
Definition: IfxGtm_PinMap.c:416
IfxGtm_TOM0_11_TOUT3_P02_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT
Definition: IfxGtm_PinMap.c:500
IfxGtm_TOM1_4_TOUT14_P00_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT
Definition: IfxGtm_PinMap.c:660
IfxGtm_ATOM1_3_TOUT38_P32_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT
Definition: IfxGtm_PinMap.c:136
IfxGtm_TOM1_0_TOUT8_P02_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT
Definition: IfxGtm_PinMap.c:604
IfxGtm_ATOM2_7_TOUT67_P20_11_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT
Definition: IfxGtm_PinMap.c:216
IfxGtm_TOM0_15_TOUT17_P00_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT
Definition: IfxGtm_PinMap.c:526
IfxGtm_ATOM2_1_TOUT95_P11_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT
Definition: IfxGtm_PinMap.c:182
IfxGtm_Tim_Ch_0
TIM channel 0.
Definition: IfxGtm_cfg.h:263
IfxGtm_TIM1_3_TIN21_P00_12_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN
Definition: IfxGtm_PinMap.c:384
IfxGtm_Atom_Ch_0
ATOM channel 0.
Definition: IfxGtm_cfg.h:222
IfxGtm_TIM1_7_TIN25_P33_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN
Definition: IfxGtm_PinMap.c:429
IfxGtm_ATOM1_2_TOUT46_P23_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT
Definition: IfxGtm_PinMap.c:129
IfxGtm_ATOM2_6_TOUT62_P20_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT
Definition: IfxGtm_PinMap.c:209
IfxGtm_TOM1_0_TOUT48_P22_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT
Definition: IfxGtm_PinMap.c:597
IfxGtm_TOM1_6_TOUT43_P23_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT
Definition: IfxGtm_PinMap.c:683
IfxGtm_TIM1_4_TIN30_P33_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN
Definition: IfxGtm_PinMap.c:396
IfxGtm_TIM0_1_TIN11_P00_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN
Definition: IfxGtm_PinMap.c:283
IfxGtm_TIM1_0_TIN77_P15_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN
Definition: IfxGtm_PinMap.c:354
IfxGtm_TOM1_3_TOUT38_P32_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT
Definition: IfxGtm_PinMap.c:653
IfxGtm_TOM1_1_TOUT95_P11_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT
Definition: IfxGtm_PinMap.c:639
IfxGtm_TIM2_1_TIN95_P11_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN
Definition: IfxGtm_PinMap.c:448
IfxGtm_PinMap_setTomTout
void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:730
IfxGtm_ATOM0_2_TOUT46_P23_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT
Definition: IfxGtm_PinMap.c:65
IfxGtm_TIM0_1_TIN54_P21_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN
Definition: IfxGtm_PinMap.c:290
IfxGtm_TOM0_9_TOUT47_P22_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT
Definition: IfxGtm_PinMap.c:591
IfxGtm_ATOM3_7_TOUT93_P13_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT
Definition: IfxGtm_PinMap.c:264
IfxGtm_TOM1_6_TOUT100_P11_11_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT
Definition: IfxGtm_PinMap.c:679
IfxGtm_ATOM1_7_TOUT75_P15_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT
Definition: IfxGtm_PinMap.c:171
IfxGtm_ATOM3_0_TOUT32_P33_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT
Definition: IfxGtm_PinMap.c:221
IfxGtm_ATOM1_3_TOUT60_P20_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT
Definition: IfxGtm_PinMap.c:140
IfxGtm_TOM0_5_TOUT91_P13_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT
Definition: IfxGtm_PinMap.c:568
IfxGtm_TIM2_6_TIN66_P20_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN
Definition: IfxGtm_PinMap.c:474
IfxGtm_TIM0_6_TIN24_P33_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN
Definition: IfxGtm_PinMap.c:332
IfxGtm_TIM1_7_TIN67_P20_11_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN
Definition: IfxGtm_PinMap.c:433
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxGtm_TOM0_9_TOUT52_P21_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT
Definition: IfxGtm_PinMap.c:592
IfxGtm_ATOM0_5_TOUT15_P00_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT
Definition: IfxGtm_PinMap.c:86
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_TIM0_3_TIN29_P33_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN
Definition: IfxGtm_PinMap.c:306
IfxGtm_TIM2_1_TIN11_P00_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN
Definition: IfxGtm_PinMap.c:445
IfxGtm_TOM0_0_TOUT32_P33_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT
Definition: IfxGtm_PinMap.c:486
IfxGtm_TOM1_7_TOUT75_P15_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT
Definition: IfxGtm_PinMap.c:694
IfxGtm_TOM1_11_TOUT105_P10_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT
Definition: IfxGtm_PinMap.c:611
IfxGtm_TIM0_1_TIN78_P15_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN
Definition: IfxGtm_PinMap.c:291
IfxGtm_ATOM1_4_TOUT102_P10_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT
Definition: IfxGtm_PinMap.c:142
IfxGtm_Tim_2
TIM object 2.
Definition: IfxGtm_cfg.h:256
IfxGtm_TOM1_5_TOUT23_P33_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT
Definition: IfxGtm_PinMap.c:671
IfxGtm_Atom_ToutMap::toutSel
IfxGtm_ToutSel toutSel
TOUTSEL register control code.
Definition: IfxGtm_PinMap.h:106
IfxGtm_ATOM3_2_TOUT88_P14_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT
Definition: IfxGtm_PinMap.c:240
IfxGtm_TOM0_8_TOUT68_P20_12_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT
Definition: IfxGtm_PinMap.c:583
IfxGtm_TIM1_3_TIN29_P33_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN
Definition: IfxGtm_PinMap.c:385
IfxGtm_ATOM3_2_TOUT28_P33_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT
Definition: IfxGtm_PinMap.c:236
IfxGtm_TOM0_11_TOUT49_P22_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT
Definition: IfxGtm_PinMap.c:502
IfxGtm_TOM1_2_TOUT88_P14_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT
Definition: IfxGtm_PinMap.c:648
IfxGtm_ATOM3_2_TOUT44_P23_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT
Definition: IfxGtm_PinMap.c:237
IfxGtm_TIM1_7_TIN75_P15_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN
Definition: IfxGtm_PinMap.c:434
IfxGtm_TOM1_1_TOUT47_P22_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT
Definition: IfxGtm_PinMap.c:634
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:108
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_TIM2_0_TIN94_P13_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN
Definition: IfxGtm_PinMap.c:442
IfxGtm_ToutSel_c
Definition: IfxGtm_PinMap.h:87
IfxGtm_TIM0_0_TIN26_P33_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN
Definition: IfxGtm_PinMap.c:271
IfxGtm_TOM0_13_TOUT35_P33_13_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT
Definition: IfxGtm_PinMap.c:514
IfxGtm_ATOM3_7_TOUT63_P20_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT
Definition: IfxGtm_PinMap.c:263
IfxGtm_TIM2_2_TIN12_P00_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN
Definition: IfxGtm_PinMap.c:449
IfxGtm_TIM1_5_TIN15_P00_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN
Definition: IfxGtm_PinMap.c:405
IfxGtm_ATOM0_3_TOUT49_P22_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT
Definition: IfxGtm_PinMap.c:73
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxGtm_TOM1_0_TOUT9_P00_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT
Definition: IfxGtm_PinMap.c:606
IfxGtm_TIM2_7_TIN93_P13_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN
Definition: IfxGtm_PinMap.c:482
IfxGtm_TOM1_8_TOUT51_P21_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT
Definition: IfxGtm_PinMap.c:699
IfxGtm_TOM0_1_TOUT19_P00_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT
Definition: IfxGtm_PinMap.c:532
IfxGtm_Atom_Ch_4
ATOM channel 4.
Definition: IfxGtm_cfg.h:226
IfxGtm_TIM0_0_TIN109_P10_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN
Definition: IfxGtm_PinMap.c:269
IfxGtm_TOM1_1_TOUT86_P14_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT
Definition: IfxGtm_PinMap.c:638
IfxGtm_Tom_Ch_10
TOM channel 10.
Definition: IfxGtm_cfg.h:296
IfxGtm_ATOM0_7_TOUT25_P33_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT
Definition: IfxGtm_PinMap.c:99
IfxGtm_ATOM1_3_TOUT13_P00_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT
Definition: IfxGtm_PinMap.c:135
IfxGtm_ATOM2_2_TOUT28_P33_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT
Definition: IfxGtm_PinMap.c:184
IfxGtm_TIM0_3_TIN38_P32_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN
Definition: IfxGtm_PinMap.c:307
IfxGtm_TOM0_10_TOUT2_P02_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT
Definition: IfxGtm_PinMap.c:493
IfxGtm_ATOM0_0_TOUT85_P14_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT
Definition: IfxGtm_PinMap.c:49
IfxGtm_TIM1_0_TIN68_P20_12_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN
Definition: IfxGtm_PinMap.c:352
IfxGtm_TOM1_1_TOUT78_P15_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT
Definition: IfxGtm_PinMap.c:637
IfxGtm_TOM1_8_TOUT0_P02_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT
Definition: IfxGtm_PinMap.c:697
IfxGtm_ATOM3_3_TOUT97_P11_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT
Definition: IfxGtm_PinMap.c:246
IfxGtm_ATOM1_6_TOUT66_P20_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT
Definition: IfxGtm_PinMap.c:164
IfxGtm_ATOM1_6_TOUT16_P00_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT
Definition: IfxGtm_PinMap.c:160
IfxGtm_TOM0_14_TOUT100_P11_11_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT
Definition: IfxGtm_PinMap.c:519
IfxGtm_TIM0_3_TIN51_P21_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN
Definition: IfxGtm_PinMap.c:310
IfxGtm_TOM0_1_TOUT103_P10_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT
Definition: IfxGtm_PinMap.c:531
IfxGtm_TIM1_3_TIN80_P14_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN
Definition: IfxGtm_PinMap.c:391
IfxGtm_ATOM0_4_TOUT50_P22_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT
Definition: IfxGtm_PinMap.c:81
IfxGtm_TOM1_1_TOUT10_P00_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT
Definition: IfxGtm_PinMap.c:629
IfxGtm_ATOM1_2_TOUT2_P02_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT
Definition: IfxGtm_PinMap.c:127
IfxGtm_ATOM2_0_TOUT68_P20_12_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT
Definition: IfxGtm_PinMap.c:176
IfxGtm_TOM1_2_TOUT20_P00_11_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT
Definition: IfxGtm_PinMap.c:641
IfxGtm_ATOM1_2_TOUT104_P10_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT
Definition: IfxGtm_PinMap.c:124
IfxGtm_TOM1_6_TOUT92_P13_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT
Definition: IfxGtm_PinMap.c:687
IfxGtm_TOM0_0_TOUT77_P15_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT
Definition: IfxGtm_PinMap.c:489
IfxGtm_TIM0_6_TIN62_P20_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN
Definition: IfxGtm_PinMap.c:336
IfxGtm_TOM0_12_TOUT72_P15_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT
Definition: IfxGtm_PinMap.c:511
IfxGtm_ATOM0_6_TOUT16_P00_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT
Definition: IfxGtm_PinMap.c:93
IfxGtm_ATOM3_1_TOUT43_P23_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT
Definition: IfxGtm_PinMap.c:229
IfxGtm_TOM0_14_TOUT66_P20_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT
Definition: IfxGtm_PinMap.c:522
IfxGtm_TOM0_0_TOUT53_P21_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT
Definition: IfxGtm_PinMap.c:487
IfxGtm_TOM0_10_TOUT41_P23_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT
Definition: IfxGtm_PinMap.c:494
IfxPort_InputMode_undefined
Definition: IfxPort.h:82
IfxGtm_TOM0_14_TOUT6_P02_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT
Definition: IfxGtm_PinMap.c:523
IfxGtm_TIM0_7_TIN45_P23_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN
Definition: IfxGtm_PinMap.c:340
IfxGtm_TOM0_8_TOUT0_P02_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT
Definition: IfxGtm_PinMap.c:580
IfxGtm_TIM1_0_TIN32_P33_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN
Definition: IfxGtm_PinMap.c:349
IfxGtm_TIM1_7_TIN44_P23_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN
Definition: IfxGtm_PinMap.c:430
IfxGtm_TOM0_4_TOUT90_P14_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT
Definition: IfxGtm_PinMap.c:562
IfxGtm_ChXSel
IfxGtm_ChXSel
CHxSEL register control code.
Definition: IfxGtm_PinMap.h:59
IfxGtm_TIM2_7_TIN101_P11_12_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN
Definition: IfxGtm_PinMap.c:477
IfxGtm_TOM1_7_TOUT44_P23_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT
Definition: IfxGtm_PinMap.c:691
IfxGtm_ATOM1_5_TOUT23_P33_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT
Definition: IfxGtm_PinMap.c:152
IfxGtm_TOM1_3_TOUT97_P11_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT
Definition: IfxGtm_PinMap.c:659
IfxGtm_TIM0_0_TIN8_P02_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN
Definition: IfxGtm_PinMap.c:279
IfxGtm_TIM1_0_TIN0_P02_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN
Definition: IfxGtm_PinMap.c:345
IfxGtm_ATOM2_5_TOUT35_P33_13_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT
Definition: IfxGtm_PinMap.c:201
IfxGtm_Tom_Ch_9
TOM channel 9.
Definition: IfxGtm_cfg.h:295
IfxGtm_TIM0_7_TIN44_P23_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN
Definition: IfxGtm_PinMap.c:339
IfxGtm_ATOM0_0_TOUT8_P02_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT
Definition: IfxGtm_PinMap.c:50
IfxGtm_TIM1_2_TIN96_P11_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN
Definition: IfxGtm_PinMap.c:380
IfxGtm_TOM1_0_TOUT32_P33_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT
Definition: IfxGtm_PinMap.c:596
IfxGtm_TOM0_13_TOUT5_P02_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT
Definition: IfxGtm_PinMap.c:515
IfxGtm_ATOM1_5_TOUT65_P20_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT
Definition: IfxGtm_PinMap.c:157
IfxGtm_TOM0_2_TOUT104_P10_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT
Definition: IfxGtm_PinMap.c:538
IfxGtm_ATOM1_1_TOUT69_P20_13_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT
Definition: IfxGtm_PinMap.c:120
IfxGtm_TOM0_5_TOUT110_P10_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT
Definition: IfxGtm_PinMap.c:563
IfxGtm_TIM1_7_TIN64_P20_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN
Definition: IfxGtm_PinMap.c:432
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
IfxGtm_TOM1_2_TOUT28_P33_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT
Definition: IfxGtm_PinMap.c:642
IfxGtm_TIM1_7_TIN101_P11_12_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN
Definition: IfxGtm_PinMap.c:427
IfxGtm_Tim_TinMap::tim
IfxGtm_Tim tim
TIM unit index.
Definition: IfxGtm_PinMap.h:95
IfxGtm_TOM0_3_TOUT89_P14_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT
Definition: IfxGtm_PinMap.c:554
IfxGtm_ATOM3_1_TOUT86_P14_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT
Definition: IfxGtm_PinMap.c:233
IfxGtm_TOM1_0_TOUT77_P15_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT
Definition: IfxGtm_PinMap.c:601
IfxGtm_ATOM0_0_TOUT9_P00_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT
Definition: IfxGtm_PinMap.c:51
IfxGtm_TOM1_6_TOUT106_P10_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT
Definition: IfxGtm_PinMap.c:680
IfxGtm_ATOM2_4_TOUT22_P33_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT
Definition: IfxGtm_PinMap.c:194
IfxGtm_ATOM3_1_TOUT19_P00_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT
Definition: IfxGtm_PinMap.c:227
IfxGtm_TIM0_2_TIN55_P21_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN
Definition: IfxGtm_PinMap.c:301
IfxGtm_ATOM2_7_TOUT64_P20_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT
Definition: IfxGtm_PinMap.c:215
IfxGtm_ATOM2_3_TOUT89_P14_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT
Definition: IfxGtm_PinMap.c:192
IfxGtm_ATOM1_1_TOUT10_P00_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT
Definition: IfxGtm_PinMap.c:114
IfxGtm_ATOM1_4_TOUT72_P15_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT
Definition: IfxGtm_PinMap.c:149
IfxGtm_TOM1_1_TOUT69_P20_13_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT
Definition: IfxGtm_PinMap.c:636
IfxGtm_TIM1_7_TIN93_P13_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN
Definition: IfxGtm_PinMap.c:437
IfxGtm_TOM1_12_TOUT102_P10_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT
Definition: IfxGtm_PinMap.c:616
IfxGtm_ATOM3_2_TOUT80_P14_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT
Definition: IfxGtm_PinMap.c:238
IfxGtm_ATOM1_5_TOUT58_P21_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT
Definition: IfxGtm_PinMap.c:155
IfxGtm_TIM0_7_TIN84_P14_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN
Definition: IfxGtm_PinMap.c:344
IfxGtm_ATOM0_3_TOUT108_P10_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT
Definition: IfxGtm_PinMap.c:69
IfxGtm_ATOM0_2_TOUT12_P00_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT
Definition: IfxGtm_PinMap.c:62
IfxGtm_TIM2_5_TIN65_P20_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN
Definition: IfxGtm_PinMap.c:467
IfxGtm_TIM0_5_TIN58_P21_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN
Definition: IfxGtm_PinMap.c:328
IfxGtm_TIM0_1_TIN35_P33_13_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN
Definition: IfxGtm_PinMap.c:288
IfxGtm_Tim_Ch_5
TIM channel 5.
Definition: IfxGtm_cfg.h:268
IfxGtm_ATOM1_1_TOUT31_P33_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT
Definition: IfxGtm_PinMap.c:117
IfxGtm_TOM0_2_TOUT79_P15_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT
Definition: IfxGtm_PinMap.c:544
IfxGtm_TOM1_2_TOUT46_P23_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT
Definition: IfxGtm_PinMap.c:644
IfxGtm_TIM0_3_TIN3_P02_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN
Definition: IfxGtm_PinMap.c:308
IfxGtm_Tom_Ch_3
TOM channel 3.
Definition: IfxGtm_cfg.h:289
IfxGtm_TIM1_6_TIN6_P02_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN
Definition: IfxGtm_PinMap.c:423
IfxGtm_ATOM1_2_TOUT80_P14_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT
Definition: IfxGtm_PinMap.c:132
IfxGtm_ATOM1_5_TOUT110_P10_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT
Definition: IfxGtm_PinMap.c:150
IfxGtm_Tom_Ch_13
TOM channel 13.
Definition: IfxGtm_cfg.h:299
IfxGtm_ATOM3_3_TOUT21_P00_12_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT
Definition: IfxGtm_PinMap.c:242
IfxGtm_TOM1_2_TOUT12_P00_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT
Definition: IfxGtm_PinMap.c:640
IfxGtm_TIM0_0_TIN9_P00_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN
Definition: IfxGtm_PinMap.c:280
IfxGtm_TOM0_6_TOUT24_P33_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT
Definition: IfxGtm_PinMap.c:570
IfxGtm_TOM0_4_TOUT57_P21_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT
Definition: IfxGtm_PinMap.c:559
IfxGtm_ATOM2_5_TOUT91_P13_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT
Definition: IfxGtm_PinMap.c:205
IfxGtm_ATOM3_7_TOUT101_P11_12_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT
Definition: IfxGtm_PinMap.c:262
IfxGtm_TOM1_4_TOUT98_P11_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT
Definition: IfxGtm_PinMap.c:669
IfxGtm_TIM1_5_TIN41_P23_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN
Definition: IfxGtm_PinMap.c:407
IfxGtm_ATOM0_2_TOUT104_P10_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT
Definition: IfxGtm_PinMap.c:60
IfxGtm_TIM0_1_TIN31_P33_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN
Definition: IfxGtm_PinMap.c:287
IfxGtm_ATOM2_4_TOUT90_P14_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT
Definition: IfxGtm_PinMap.c:199
IfxGtm_ATOM1_1_TOUT47_P22_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT
Definition: IfxGtm_PinMap.c:118
IfxGtm_ATOM0_3_TOUT105_P10_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT
Definition: IfxGtm_PinMap.c:68
IfxGtm_TOM1_10_TOUT2_P02_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT
Definition: IfxGtm_PinMap.c:609
IfxGtm_TIM1_2_TIN104_P10_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN
Definition: IfxGtm_PinMap.c:369
IfxGtm_ATOM2_4_TOUT34_P33_12_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT
Definition: IfxGtm_PinMap.c:196
IfxGtm_Tom_Ch_1
TOM channel 1.
Definition: IfxGtm_cfg.h:287
IfxGtm_TIM1_4_TIN14_P00_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN
Definition: IfxGtm_PinMap.c:394
IfxGtm_ATOM3_0_TOUT94_P13_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT
Definition: IfxGtm_PinMap.c:226
IfxGtm_ATOM2_2_TOUT96_P11_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT
Definition: IfxGtm_PinMap.c:188
IfxGtm_TOM0_6_TOUT83_P14_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT
Definition: IfxGtm_PinMap.c:573
IfxGtm_ATOM0_6_TOUT24_P33_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT
Definition: IfxGtm_PinMap.c:94
IfxGtm_TIM0_5_TIN5_P02_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN
Definition: IfxGtm_PinMap.c:329
IfxGtm_Atom_ToutMap::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxGtm_PinMap.h:109
IfxGtm_TOM1_0_TOUT76_P15_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT
Definition: IfxGtm_PinMap.c:600
IfxGtm_Atom_Ch_6
ATOM channel 6.
Definition: IfxGtm_cfg.h:228
IfxGtm_TIM2_4_TIN98_P11_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN
Definition: IfxGtm_PinMap.c:464
IfxGtm_TIM2_0_TIN8_P02_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN
Definition: IfxGtm_PinMap.c:441
IfxGtm_TIM1_4_TIN50_P22_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN
Definition: IfxGtm_PinMap.c:399
IfxGtm_TOM0_11_TOUT71_P15_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT
Definition: IfxGtm_PinMap.c:504
IfxGtm_ATOM0_1_TOUT84_P14_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT
Definition: IfxGtm_PinMap.c:59
IfxGtm_TIM2_4_TIN61_P20_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN
Definition: IfxGtm_PinMap.c:461
IfxGtm_TOM1_5_TOUT15_P00_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT
Definition: IfxGtm_PinMap.c:670
IfxGtm_TOM1_2_TOUT55_P21_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT
Definition: IfxGtm_PinMap.c:645
IfxGtm_ATOM3_2_TOUT20_P00_11_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT
Definition: IfxGtm_PinMap.c:235
IfxGtm_TIM1_1_TIN103_P10_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN
Definition: IfxGtm_PinMap.c:358
IfxGtm_TOM0_2_TOUT33_P33_11_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT
Definition: IfxGtm_PinMap.c:542
IfxGtm_ATOM0_4_TOUT81_P14_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT
Definition: IfxGtm_PinMap.c:84
IfxGtm_Tim_TinMap::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGtm_PinMap.h:97
IfxGtm_TIM1_1_TIN86_P14_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN
Definition: IfxGtm_PinMap.c:367
IfxGtm_TIM2_6_TIN74_P15_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN
Definition: IfxGtm_PinMap.c:475
IfxGtm_ATOM3_4_TOUT81_P14_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT
Definition: IfxGtm_PinMap.c:251
IfxGtm_TOM1_1_TOUT54_P21_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT
Definition: IfxGtm_PinMap.c:635
IfxGtm_Atom_Ch_2
ATOM channel 2.
Definition: IfxGtm_cfg.h:224
IfxGtm_Tim_TinMap
TIN pin mapping structure.
Definition: IfxGtm_PinMap.h:93
IfxGtm_TOM0_3_TOUT38_P32_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT
Definition: IfxGtm_PinMap.c:550
IfxGtm_ATOM0_6_TOUT6_P02_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT
Definition: IfxGtm_PinMap.c:97
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:122
IfxGtm_ATOM1_3_TOUT71_P15_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT
Definition: IfxGtm_PinMap.c:141
IfxGtm_TIM2_1_TIN10_P00_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN
Definition: IfxGtm_PinMap.c:444
IfxGtm_TIM1_1_TIN54_P21_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN
Definition: IfxGtm_PinMap.c:364
IfxGtm_TOM0_9_TOUT69_P20_13_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT
Definition: IfxGtm_PinMap.c:593
IfxGtm_ATOM0_3_TOUT3_P02_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT
Definition: IfxGtm_PinMap.c:72
IfxGtm_ATOM1_5_TOUT5_P02_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT
Definition: IfxGtm_PinMap.c:156
IfxGtm_ATOM0_0_TOUT53_P21_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT
Definition: IfxGtm_PinMap.c:48
IfxGtm_TOM0_10_TOUT70_P20_14_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT
Definition: IfxGtm_PinMap.c:497
IfxGtm_TOM0_0_TOUT76_P15_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT
Definition: IfxGtm_PinMap.c:488
IfxGtm_Tim_1
TIM object 1.
Definition: IfxGtm_cfg.h:255
IfxGtm_TIM0_4_TIN52_P21_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN
Definition: IfxGtm_PinMap.c:320
IfxGtm_TIM0_4_TIN102_P10_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN
Definition: IfxGtm_PinMap.c:314
IfxGtm_TOM0_6_TOUT59_P20_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT
Definition: IfxGtm_PinMap.c:572
IfxGtm_TIM0_1_TIN1_P02_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN
Definition: IfxGtm_PinMap.c:285
IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:102
IfxGtm_TIM1_5_TIN5_P02_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN
Definition: IfxGtm_PinMap.c:409
IfxGtm_TOM1_5_TOUT99_P11_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT
Definition: IfxGtm_PinMap.c:678
IfxGtm_TOM0_5_TOUT40_P32_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT
Definition: IfxGtm_PinMap.c:565
IfxGtm_ATOM0_3_TOUT38_P32_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT
Definition: IfxGtm_PinMap.c:71
IfxGtm_TOM1_0_TOUT85_P14_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT
Definition: IfxGtm_PinMap.c:602
IfxGtm_TIM2_5_TIN52_P21_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN
Definition: IfxGtm_PinMap.c:466
IfxGtm_TIM0_2_TIN46_P23_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN
Definition: IfxGtm_PinMap.c:300
IfxGtm_ATOM2_4_TOUT98_P11_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT
Definition: IfxGtm_PinMap.c:200
IfxGtm_TOM0_13_TOUT73_P15_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT
Definition: IfxGtm_PinMap.c:517
IfxGtm_Tom_Ch_6
TOM channel 6.
Definition: IfxGtm_cfg.h:292
IfxGtm_TIM0_4_TIN39_P32_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN
Definition: IfxGtm_PinMap.c:317
IfxGtm_TIM1_5_TIN40_P32_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN
Definition: IfxGtm_PinMap.c:406
IfxGtm_TOM0_1_TOUT31_P33_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT
Definition: IfxGtm_PinMap.c:534
IfxGtm_TOM1_15_TOUT67_P20_11_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT
Definition: IfxGtm_PinMap.c:627
IfxGtm_TIM1_6_TIN92_P13_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN
Definition: IfxGtm_PinMap.c:426
IfxGtm_TIM2_3_TIN97_P11_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN
Definition: IfxGtm_PinMap.c:458
IfxGtm_TIM2_3_TIN89_P14_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN
Definition: IfxGtm_PinMap.c:457
IfxGtm_TIM1_2_TIN2_P02_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN
Definition: IfxGtm_PinMap.c:374
IfxGtm_ATOM2_1_TOUT43_P23_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT
Definition: IfxGtm_PinMap.c:180
IfxGtm_ATOM0_5_TOUT41_P23_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT
Definition: IfxGtm_PinMap.c:89
IfxGtm_TOM0_8_TOUT95_P11_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT
Definition: IfxGtm_PinMap.c:586
IfxGtm_TOM0_12_TOUT4_P02_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT
Definition: IfxGtm_PinMap.c:509
IfxGtm_TIM2_2_TIN88_P14_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN
Definition: IfxGtm_PinMap.c:452
IfxGtm_TIM2_2_TIN96_P11_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN
Definition: IfxGtm_PinMap.c:453
IfxGtm_ATOM3_2_TOUT83_P14_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT
Definition: IfxGtm_PinMap.c:239
IfxGtm_TOM1_0_TOUT18_P00_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT
Definition: IfxGtm_PinMap.c:594
IfxGtm_TIM1_6_TIN74_P15_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN
Definition: IfxGtm_PinMap.c:424
IfxGtm_TIM0_0_TIN0_P02_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN
Definition: IfxGtm_PinMap.c:268
IfxGtm_Tom_Ch_4
TOM channel 4.
Definition: IfxGtm_cfg.h:290
IfxGtm_ATOM1_7_TOUT7_P02_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT
Definition: IfxGtm_PinMap.c:172
IfxGtm_TIM1_1_TIN95_P11_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN
Definition: IfxGtm_PinMap.c:368
IfxGtm_TOM0_7_TOUT25_P33_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT
Definition: IfxGtm_PinMap.c:575
IfxGtm_TOM0_4_TOUT22_P33_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT
Definition: IfxGtm_PinMap.c:556
IfxGtm_ATOM3_3_TOUT29_P33_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT
Definition: IfxGtm_PinMap.c:243
IfxGtm_TOM0_0_TOUT18_P00_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT
Definition: IfxGtm_PinMap.c:484
IfxGtm_TOM1_6_TOUT59_P20_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT
Definition: IfxGtm_PinMap.c:684
IfxGtm_TOM1_0_TOUT68_P20_12_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT
Definition: IfxGtm_PinMap.c:599
IfxGtm_TOM0_13_TOUT15_P00_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT
Definition: IfxGtm_PinMap.c:513
IfxGtm_TIM0_3_TIN80_P14_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN
Definition: IfxGtm_PinMap.c:313
IfxGtm_ATOM0_1_TOUT31_P33_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT
Definition: IfxGtm_PinMap.c:56
IfxGtm_TIM2_6_TIN62_P20_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN
Definition: IfxGtm_PinMap.c:473
IfxGtm_Tim_Ch_7
TIM channel 7.
Definition: IfxGtm_cfg.h:270
IfxGtm_ATOM1_2_TOUT55_P21_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT
Definition: IfxGtm_PinMap.c:130
IfxGtm_TOM1_1_TOUT11_P00_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT
Definition: IfxGtm_PinMap.c:630
IfxGtm_ATOM0_0_TOUT109_P10_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT
Definition: IfxGtm_PinMap.c:46
IfxGtm_ATOM3_4_TOUT90_P14_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT
Definition: IfxGtm_PinMap.c:252
IfxGtm_TOM1_4_TOUT57_P21_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT
Definition: IfxGtm_PinMap.c:665
IfxGtm_TIM1_3_TIN3_P02_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN
Definition: IfxGtm_PinMap.c:387
IfxGtm_TOM1_9_TOUT52_P21_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT
Definition: IfxGtm_PinMap.c:702
IfxGtm_ATOM1_0_TOUT53_P21_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT
Definition: IfxGtm_PinMap.c:106
IfxGtm_TOM0_15_TOUT42_P23_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT
Definition: IfxGtm_PinMap.c:527
IfxGtm_TIM0_2_TIN33_P33_11_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN
Definition: IfxGtm_PinMap.c:298
IfxGtm_ATOM3_6_TOUT100_P11_11_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT
Definition: IfxGtm_PinMap.c:258
IfxGtm_TOM1_13_TOUT5_P02_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT
Definition: IfxGtm_PinMap.c:622
IfxGtm_ATOM2_3_TOUT21_P00_12_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT
Definition: IfxGtm_PinMap.c:189
IfxGtm_TIM1_2_TIN55_P21_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN
Definition: IfxGtm_PinMap.c:377
IfxGtm_TOM0_9_TOUT1_P02_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT
Definition: IfxGtm_PinMap.c:590
IfxGtm_TOM1_6_TOUT24_P33_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT
Definition: IfxGtm_PinMap.c:682
IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:116
IfxGtm_TIM2_3_TIN13_P00_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN
Definition: IfxGtm_PinMap.c:454
IfxGtm_ATOM2_6_TOUT74_P15_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT
Definition: IfxGtm_PinMap.c:211
IfxPort_OutputIdx_alt1
Definition: IfxPort.h:120
IfxGtm_TOM1_4_TOUT81_P14_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT
Definition: IfxGtm_PinMap.c:667
IfxGtm_ATOM2_2_TOUT88_P14_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT
Definition: IfxGtm_PinMap.c:187
IfxGtm_TOM0_2_TOUT28_P33_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT
Definition: IfxGtm_PinMap.c:541
IfxGtm_ATOM2_1_TOUT69_P20_13_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT
Definition: IfxGtm_PinMap.c:181
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxGtm_TIM0_5_TIN40_P32_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN
Definition: IfxGtm_PinMap.c:326
IfxGtm_ATOM1_6_TOUT106_P10_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT
Definition: IfxGtm_PinMap.c:159
IfxGtm_ATOM0_2_TOUT55_P21_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT
Definition: IfxGtm_PinMap.c:66
IfxGtm_TIM1_1_TIN27_P33_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN
Definition: IfxGtm_PinMap.c:361
IfxGtm_TOM1_0_TOUT94_P13_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT
Definition: IfxGtm_PinMap.c:605
IfxGtm_ATOM2_2_TOUT44_P23_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT
Definition: IfxGtm_PinMap.c:185
IfxGtm_TIM2_5_TIN73_P15_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN
Definition: IfxGtm_PinMap.c:468
IfxGtm_Atom_1
ATOM object 1.
Definition: IfxGtm_cfg.h:212
IfxGtm_ATOM3_1_TOUT78_P15_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT
Definition: IfxGtm_PinMap.c:230
IfxGtm_ATOM0_3_TOUT56_P21_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT
Definition: IfxGtm_PinMap.c:74
IfxGtm_ATOM3_4_TOUT34_P33_12_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT
Definition: IfxGtm_PinMap.c:249
IfxGtm_TOM0_15_TOUT101_P11_12_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT
Definition: IfxGtm_PinMap.c:525
IfxGtm_ATOM1_0_TOUT76_P15_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT
Definition: IfxGtm_PinMap.c:108
IfxGtm_TOM0_9_TOUT10_P00_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT
Definition: IfxGtm_PinMap.c:588
IfxGtm_TOM1_7_TOUT45_P23_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT
Definition: IfxGtm_PinMap.c:692
IfxGtm_TOM0_5_TOUT82_P14_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT
Definition: IfxGtm_PinMap.c:567
IfxGtm_ATOM0_5_TOUT23_P33_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT
Definition: IfxGtm_PinMap.c:87
IfxGtm_Tim_Ch_6
TIM channel 6.
Definition: IfxGtm_cfg.h:269
IfxGtm_ATOM2_4_TOUT30_P33_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT
Definition: IfxGtm_PinMap.c:195
IfxGtm_TOM0_5_TOUT58_P21_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT
Definition: IfxGtm_PinMap.c:566
IfxGtm_TOM0_12_TOUT50_P22_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT
Definition: IfxGtm_PinMap.c:510
IfxGtm_Tom_Ch_12
TOM channel 12.
Definition: IfxGtm_cfg.h:298
IfxGtm_TIM0_1_TIN27_P33_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN
Definition: IfxGtm_PinMap.c:286
IfxGtm_TOM1_3_TOUT13_P00_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT
Definition: IfxGtm_PinMap.c:650
IfxGtm_ToutSel_d
Definition: IfxGtm_PinMap.h:88
IfxGtm_ATOM1_6_TOUT6_P02_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT
Definition: IfxGtm_PinMap.c:165
IfxGtm_TOM0_2_TOUT107_P10_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT
Definition: IfxGtm_PinMap.c:539
IfxGtm_ATOM1_1_TOUT1_P02_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT
Definition: IfxGtm_PinMap.c:116
IfxGtm_TIM1_0_TIN26_P33_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN
Definition: IfxGtm_PinMap.c:348
IfxGtm_ATOM0_2_TOUT2_P02_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT
Definition: IfxGtm_PinMap.c:63
IfxGtm_TIM0_3_TIN49_P22_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN
Definition: IfxGtm_PinMap.c:309
IfxGtm_TIM0_4_TIN81_P14_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN
Definition: IfxGtm_PinMap.c:323
IfxGtm_TOM0_7_TOUT45_P23_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT
Definition: IfxGtm_PinMap.c:576
IfxGtm_ATOM0_6_TOUT42_P23_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT
Definition: IfxGtm_PinMap.c:95
IfxGtm_TIM1_3_TIN71_P15_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN
Definition: IfxGtm_PinMap.c:390
IfxGtm_TOM0_3_TOUT29_P33_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT
Definition: IfxGtm_PinMap.c:549
IfxGtm_TOM0_11_TOUT63_P20_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT
Definition: IfxGtm_PinMap.c:503
IfxGtm_ATOM3_3_TOUT89_P14_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT
Definition: IfxGtm_PinMap.c:245
IfxGtm_TIM0_1_TIN103_P10_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN
Definition: IfxGtm_PinMap.c:281
IfxGtm_TOM0_2_TOUT88_P14_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT
Definition: IfxGtm_PinMap.c:545
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:123
IfxGtm_ATOM3_4_TOUT98_P11_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT
Definition: IfxGtm_PinMap.c:253
IfxGtm_ATOM1_7_TOUT25_P33_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT
Definition: IfxGtm_PinMap.c:168
IfxGtm_ATOM0_4_TOUT57_P21_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT
Definition: IfxGtm_PinMap.c:82
IfxGtm_TOM1_14_TOUT66_P20_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT
Definition: IfxGtm_PinMap.c:625
IfxGtm_TIM2_3_TIN71_P15_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN
Definition: IfxGtm_PinMap.c:456
IfxGtm_TIM2_0_TIN76_P15_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN
Definition: IfxGtm_PinMap.c:440
IfxGtm_Tim_Ch_3
TIM channel 3.
Definition: IfxGtm_cfg.h:266
IfxGtm_Tom_Ch_5
TOM channel 5.
Definition: IfxGtm_cfg.h:291
IfxGtm_ATOM1_3_TOUT49_P22_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT
Definition: IfxGtm_PinMap.c:138
IfxGtm_TOM1_3_TOUT89_P14_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT
Definition: IfxGtm_PinMap.c:658
IfxGtm_TOM0_4_TOUT102_P10_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT
Definition: IfxGtm_PinMap.c:555
IfxGtm_ATOM3_5_TOUT35_P33_13_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT
Definition: IfxGtm_PinMap.c:254
IfxGtm_TIM1_5_TIN65_P20_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN
Definition: IfxGtm_PinMap.c:410
IfxGtm_TOM0_15_TOUT75_P15_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT
Definition: IfxGtm_PinMap.c:529
IfxGtm_TIM0_2_TIN107_P10_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN
Definition: IfxGtm_PinMap.c:294
IfxGtm_Atom_Ch_3
ATOM channel 3.
Definition: IfxGtm_cfg.h:225
IfxGtm_ATOM2_0_TOUT94_P13_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT
Definition: IfxGtm_PinMap.c:177
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxGtm_TOM1_7_TOUT101_P11_12_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT
Definition: IfxGtm_PinMap.c:688
IfxGtm_Atom_Ch_1
ATOM channel 1.
Definition: IfxGtm_cfg.h:223
IfxGtm_TIM0_0_TIN32_P33_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN
Definition: IfxGtm_PinMap.c:272
IfxGtm_Atom_3
ATOM object 3.
Definition: IfxGtm_cfg.h:214
IfxGtm_TOM0_11_TOUT43_P23_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT
Definition: IfxGtm_PinMap.c:501
IfxGtm_TOM1_5_TOUT82_P14_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT
Definition: IfxGtm_PinMap.c:676
IfxGtm_ATOM0_0_TOUT0_P02_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT
Definition: IfxGtm_PinMap.c:45
IfxGtm_TOM1_4_TOUT22_P33_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT
Definition: IfxGtm_PinMap.c:661
IfxGtm_TIM0_4_TIN61_P20_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN
Definition: IfxGtm_PinMap.c:322
IfxGtm_ATOM1_4_TOUT14_P00_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT
Definition: IfxGtm_PinMap.c:143
IfxGtm_Tim_TinMap::channel
IfxGtm_Tim_Ch channel
TIM channel index.
Definition: IfxGtm_PinMap.h:96
IfxGtm_TIM0_5_TIN110_P10_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN
Definition: IfxGtm_PinMap.c:324
IfxGtm_ATOM0_1_TOUT54_P21_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT
Definition: IfxGtm_PinMap.c:58
IfxGtm_TIM1_2_TIN12_P00_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN
Definition: IfxGtm_PinMap.c:371
IfxGtm_ATOM0_5_TOUT58_P21_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT
Definition: IfxGtm_PinMap.c:90
IfxGtm_TOM0_13_TOUT65_P20_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT
Definition: IfxGtm_PinMap.c:516
IfxGtm_TIM2_5_TIN99_P11_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN
Definition: IfxGtm_PinMap.c:470
IfxGtm_ATOM2_6_TOUT92_P13_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT
Definition: IfxGtm_PinMap.c:212
IfxGtm_TOM0_11_TOUT13_P00_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT
Definition: IfxGtm_PinMap.c:499
IfxGtm_ATOM0_7_TOUT7_P02_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT
Definition: IfxGtm_PinMap.c:102
IfxGtm_TIM1_0_TIN85_P14_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN
Definition: IfxGtm_PinMap.c:355
IfxGtm_ATOM1_4_TOUT61_P20_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT
Definition: IfxGtm_PinMap.c:148
IfxGtm_ATOM1_0_TOUT0_P02_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT
Definition: IfxGtm_PinMap.c:103
IfxGtm_ATOM3_6_TOUT62_P20_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT
Definition: IfxGtm_PinMap.c:260
IfxGtm_TOM1_0_TOUT53_P21_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT
Definition: IfxGtm_PinMap.c:598
IfxGtm_ATOM0_1_TOUT10_P00_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT
Definition: IfxGtm_PinMap.c:53
IfxGtm_TIM1_0_TIN87_P14_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN
Definition: IfxGtm_PinMap.c:356
IfxGtm_TIM2_0_TIN68_P20_12_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN
Definition: IfxGtm_PinMap.c:439
IfxGtm_TOM0_6_TOUT92_P13_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT
Definition: IfxGtm_PinMap.c:574
IfxGtm_ATOM0_6_TOUT106_P10_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT
Definition: IfxGtm_PinMap.c:92
IfxGtm_TIM1_5_TIN73_P15_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN
Definition: IfxGtm_PinMap.c:411
IfxGtm_TIM1_4_TIN22_P33_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN
Definition: IfxGtm_PinMap.c:395
IfxGtm_ATOM1_1_TOUT54_P21_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT
Definition: IfxGtm_PinMap.c:119
IfxGtm_TIM2_4_TIN90_P14_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN
Definition: IfxGtm_PinMap.c:463
IfxGtm_ATOM1_4_TOUT50_P22_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT
Definition: IfxGtm_PinMap.c:146
IfxGtm_TIM1_6_TIN59_P20_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN
Definition: IfxGtm_PinMap.c:421
IfxGtm_TIM0_5_TIN82_P14_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN
Definition: IfxGtm_PinMap.c:330
IfxGtm_ATOM2_3_TOUT97_P11_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT
Definition: IfxGtm_PinMap.c:193
IfxGtm_ATOM1_2_TOUT107_P10_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT
Definition: IfxGtm_PinMap.c:125
IfxGtm_TOM0_8_TOUT48_P22_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT
Definition: IfxGtm_PinMap.c:581
IfxGtm_TOM0_8_TOUT51_P21_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT
Definition: IfxGtm_PinMap.c:582
IfxGtm_ATOM1_6_TOUT42_P23_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT
Definition: IfxGtm_PinMap.c:162
IfxGtm_TOM1_11_TOUT60_P20_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT
Definition: IfxGtm_PinMap.c:614
IfxGtm_TIM0_6_TIN42_P23_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN
Definition: IfxGtm_PinMap.c:333
IfxGtm_ATOM2_6_TOUT66_P20_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT
Definition: IfxGtm_PinMap.c:210
IfxGtm_TOM1_2_TOUT70_P20_14_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT
Definition: IfxGtm_PinMap.c:646
IfxGtm_TOM0_1_TOUT54_P21_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT
Definition: IfxGtm_PinMap.c:535
IfxGtm_TIM1_4_TIN4_P02_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN
Definition: IfxGtm_PinMap.c:398
IfxGtm_TIM2_6_TIN16_P00_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN
Definition: IfxGtm_PinMap.c:472
IfxGtm_TIM0_2_TIN28_P33_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN
Definition: IfxGtm_PinMap.c:296
IfxGtm_ToutSel_b
Definition: IfxGtm_PinMap.h:86
IfxGtm_ATOM1_3_TOUT56_P21_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT
Definition: IfxGtm_PinMap.c:139
IfxGtm_TIM1_2_TIN79_P15_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN
Definition: IfxGtm_PinMap.c:379
IfxGtm_TOM1_3_TOUT49_P22_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT
Definition: IfxGtm_PinMap.c:654
IfxGtm_TIM1_6_TIN100_P11_11_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN
Definition: IfxGtm_PinMap.c:415
IfxGtm_Tom_Ch_0
TOM channel 0.
Definition: IfxGtm_cfg.h:286
IfxGtm_TOM1_3_TOUT71_P15_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT
Definition: IfxGtm_PinMap.c:656
IfxGtm_TIM1_4_TIN81_P14_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN
Definition: IfxGtm_PinMap.c:402
IfxGtm_TOM1_12_TOUT34_P33_12_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT
Definition: IfxGtm_PinMap.c:617
IfxGtm_ATOM3_1_TOUT95_P11_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT
Definition: IfxGtm_PinMap.c:234
IfxGtm_TOM1_9_TOUT1_P02_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT
Definition: IfxGtm_PinMap.c:701
IfxGtm_TIM2_6_TIN92_P13_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN
Definition: IfxGtm_PinMap.c:476
IfxGtm_TIM2_6_TIN100_P11_11_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN
Definition: IfxGtm_PinMap.c:471
IfxGtm_TOM1_1_TOUT31_P33_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT
Definition: IfxGtm_PinMap.c:633
IfxGtm_TOM1_4_TOUT39_P32_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT
Definition: IfxGtm_PinMap.c:663
IfxGtm_Atom_0
ATOM object 0.
Definition: IfxGtm_cfg.h:211
IfxGtm_TIM1_2_TIN70_P20_14_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN
Definition: IfxGtm_PinMap.c:378
IfxGtm_ATOM0_7_TOUT64_P20_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT
Definition: IfxGtm_PinMap.c:101
IfxGtm_TOM0_6_TOUT106_P10_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT
Definition: IfxGtm_PinMap.c:569
IfxGtm_TOM1_5_TOUT40_P32_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT
Definition: IfxGtm_PinMap.c:672
IfxGtm_TOM1_6_TOUT16_P00_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT
Definition: IfxGtm_PinMap.c:681
IfxGtm_TOM0_12_TOUT44_P23_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT
Definition: IfxGtm_PinMap.c:508
IfxGtm_TOM1_3_TOUT29_P33_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT
Definition: IfxGtm_PinMap.c:652
IfxGtm_ATOM1_5_TOUT15_P00_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT
Definition: IfxGtm_PinMap.c:151
IfxGtm_ATOM1_2_TOUT33_P33_11_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT
Definition: IfxGtm_PinMap.c:128
IfxGtm_TIM0_4_TIN22_P33_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN
Definition: IfxGtm_PinMap.c:315
IfxGtm_TOM1_13_TOUT110_P10_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT
Definition: IfxGtm_PinMap.c:620
IfxGtm_TIM1_0_TIN48_P22_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN
Definition: IfxGtm_PinMap.c:350
IfxGtm_ATOM2_5_TOUT99_P11_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT
Definition: IfxGtm_PinMap.c:206
IfxGtm_TIM1_2_TIN28_P33_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN
Definition: IfxGtm_PinMap.c:373
IfxGtm_TIM0_6_TIN106_P10_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN
Definition: IfxGtm_PinMap.c:331
IfxGtm_TIM1_3_TIN49_P22_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN
Definition: IfxGtm_PinMap.c:388
IfxGtm_TIM1_1_TIN31_P33_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN
Definition: IfxGtm_PinMap.c:362
IfxGtm_ATOM2_5_TOUT52_P21_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT
Definition: IfxGtm_PinMap.c:202
IfxGtm_ATOM3_3_TOUT82_P14_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT
Definition: IfxGtm_PinMap.c:244
IfxGtm_ATOM1_1_TOUT103_P10_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT
Definition: IfxGtm_PinMap.c:113
IfxGtm_TOM0_15_TOUT7_P02_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT
Definition: IfxGtm_PinMap.c:530
IfxGtm_Tom_Ch_11
TOM channel 11.
Definition: IfxGtm_cfg.h:297
IfxGtm_TOM1_7_TOUT17_P00_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT
Definition: IfxGtm_PinMap.c:689
IfxGtm_TOM1_14_TOUT6_P02_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT
Definition: IfxGtm_PinMap.c:626
IfxGtm_TOM0_10_TOUT62_P20_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT
Definition: IfxGtm_PinMap.c:496
IfxGtm_TIM0_2_TIN36_P32_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN
Definition: IfxGtm_PinMap.c:299
IfxGtm_TOM1_5_TOUT58_P21_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT
Definition: IfxGtm_PinMap.c:674
IfxGtm_TOM0_1_TOUT27_P33_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT
Definition: IfxGtm_PinMap.c:533
IfxGtm_TIM0_6_TIN59_P20_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN
Definition: IfxGtm_PinMap.c:335
IfxGtm_ATOM1_0_TOUT9_P00_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT
Definition: IfxGtm_PinMap.c:112
IfxGtm_TIM0_0_TIN48_P22_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN
Definition: IfxGtm_PinMap.c:274
IfxGtm_TIM1_5_TIN58_P21_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN
Definition: IfxGtm_PinMap.c:408
IfxGtm_TIM1_5_TIN110_P10_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN
Definition: IfxGtm_PinMap.c:404
IfxGtm_TIM0_2_TIN2_P02_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN
Definition: IfxGtm_PinMap.c:297
IfxGtm_ATOM0_4_TOUT61_P20_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT
Definition: IfxGtm_PinMap.c:83
IfxGtm_ATOM1_0_TOUT87_P14_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT
Definition: IfxGtm_PinMap.c:110
IfxGtm_TOM1_4_TOUT90_P14_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT
Definition: IfxGtm_PinMap.c:668
IfxGtm_TIM0_0_TIN53_P21_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN
Definition: IfxGtm_PinMap.c:275
IfxGtm_ATOM1_6_TOUT24_P33_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT
Definition: IfxGtm_PinMap.c:161
IfxGtm_TIM0_3_TIN56_P21_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN
Definition: IfxGtm_PinMap.c:311
IfxGtm_ATOM1_3_TOUT108_P10_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT
Definition: IfxGtm_PinMap.c:134
IfxGtm_TOM1_9_TOUT103_P10_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT
Definition: IfxGtm_PinMap.c:700
IfxGtm_TIM1_3_TIN108_P10_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN
Definition: IfxGtm_PinMap.c:382
IfxGtm_TIM0_1_TIN86_P14_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN
Definition: IfxGtm_PinMap.c:292
IfxGtm_TIM0_0_TIN18_P00_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN
Definition: IfxGtm_PinMap.c:270
IfxGtm_ATOM0_3_TOUT13_P00_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT
Definition: IfxGtm_PinMap.c:70
IfxGtm_TIM1_6_TIN16_P00_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN
Definition: IfxGtm_PinMap.c:417
IfxGtm_TOM0_3_TOUT56_P21_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT
Definition: IfxGtm_PinMap.c:551
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxGtm_TOM0_0_TOUT87_P14_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT
Definition: IfxGtm_PinMap.c:491
IfxGtm_TIM2_7_TIN75_P15_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN
Definition: IfxGtm_PinMap.c:481
IfxGtm_TOM1_2_TOUT79_P15_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT
Definition: IfxGtm_PinMap.c:647
IfxGtm_TIM1_4_TIN98_P11_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN
Definition: IfxGtm_PinMap.c:403
IfxGtm_TIM1_3_TIN56_P21_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN
Definition: IfxGtm_PinMap.c:389
IfxGtm_TIM2_7_TIN67_P20_11_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN
Definition: IfxGtm_PinMap.c:480
IfxGtm_ATOM1_5_TOUT73_P15_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT
Definition: IfxGtm_PinMap.c:158
IfxGtm_TOM0_6_TOUT42_P23_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT
Definition: IfxGtm_PinMap.c:571
IfxGtm_Tom_0
TOM object 0.
Definition: IfxGtm_cfg.h:277
IfxGtm_ATOM2_0_TOUT18_P00_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT
Definition: IfxGtm_PinMap.c:173
IfxGtm_ATOM3_6_TOUT36_P32_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT
Definition: IfxGtm_PinMap.c:259
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxGtm_TIM0_7_TIN63_P20_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN
Definition: IfxGtm_PinMap.c:341
IfxGtm_TIM1_3_TIN97_P11_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN
Definition: IfxGtm_PinMap.c:392
IfxGtm_TIM2_2_TIN36_P32_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN
Definition: IfxGtm_PinMap.c:450
IfxGtm_TOM0_3_TOUT105_P10_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT
Definition: IfxGtm_PinMap.c:546
IfxGtm_TIM0_0_TIN34_P33_12_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN
Definition: IfxGtm_PinMap.c:273
IfxGtm_ATOM0_5_TOUT110_P10_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT
Definition: IfxGtm_PinMap.c:85
IfxGtm_Atom_Ch_7
ATOM channel 7.
Definition: IfxGtm_cfg.h:229
IfxGtm_TOM0_10_TOUT96_P11_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT
Definition: IfxGtm_PinMap.c:498
IfxGtm_TIM1_2_TIN46_P23_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN
Definition: IfxGtm_PinMap.c:376
IfxGtm_TOM0_0_TOUT26_P33_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT
Definition: IfxGtm_PinMap.c:485
IfxGtm_TIM1_4_TIN57_P21_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN
Definition: IfxGtm_PinMap.c:400
IfxGtm_TOM1_7_TOUT93_P13_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT
Definition: IfxGtm_PinMap.c:696
IfxGtm_TIM1_1_TIN1_P02_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN
Definition: IfxGtm_PinMap.c:360
IfxGtm_ATOM2_6_TOUT36_P32_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT
Definition: IfxGtm_PinMap.c:208
IfxGtm_TOM1_2_TOUT96_P11_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT
Definition: IfxGtm_PinMap.c:649
IfxGtm_TIM1_0_TIN109_P10_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN
Definition: IfxGtm_PinMap.c:346
IfxGtm_CLK1_P32_4_OUT
IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT
Definition: IfxGtm_PinMap.c:266
IfxGtm_CLK2_P11_12_OUT
IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT
Definition: IfxGtm_PinMap.c:267
IfxGtm_TIM1_1_TIN69_P20_13_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN
Definition: IfxGtm_PinMap.c:365
IfxGtm_ATOM3_5_TOUT52_P21_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT
Definition: IfxGtm_PinMap.c:255
IfxGtm_TIM1_2_TIN107_P10_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN
Definition: IfxGtm_PinMap.c:370
IfxGtm_TOM0_3_TOUT80_P14_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT
Definition: IfxGtm_PinMap.c:553
IfxGtm_Tim_TinMap::select
IfxGtm_ChXSel select
Input multiplexer value.
Definition: IfxGtm_PinMap.h:98
IfxGtm_TOM1_12_TOUT4_P02_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT
Definition: IfxGtm_PinMap.c:618
IfxGtm_TOM0_8_TOUT8_P02_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT
Definition: IfxGtm_PinMap.c:584
IfxGtm_TIM2_4_TIN14_P00_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN
Definition: IfxGtm_PinMap.c:459
IfxGtm_TIM0_0_TIN85_P14_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN
Definition: IfxGtm_PinMap.c:277
IfxGtm_Tim_Ch_1
TIM channel 1.
Definition: IfxGtm_cfg.h:264
IfxGtm_Tom_Ch_7
TOM channel 7.
Definition: IfxGtm_cfg.h:293
IfxGtm_TIM1_3_TIN38_P32_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN
Definition: IfxGtm_PinMap.c:386
IfxGtm_TIM1_3_TIN105_P10_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN
Definition: IfxGtm_PinMap.c:381
IfxGtm_ATOM1_5_TOUT41_P23_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT
Definition: IfxGtm_PinMap.c:154
IfxGtm_ATOM0_2_TOUT33_P33_11_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT
Definition: IfxGtm_PinMap.c:64
IfxGtm_ATOM0_4_TOUT4_P02_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT
Definition: IfxGtm_PinMap.c:80
IfxGtm_TOM1_11_TOUT108_P10_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT
Definition: IfxGtm_PinMap.c:612
IfxGtm_Tom_Ch_8
TOM channel 8.
Definition: IfxGtm_cfg.h:294
IfxGtm_TOM1_11_TOUT63_P20_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT
Definition: IfxGtm_PinMap.c:615
IfxGtm_ATOM1_0_TOUT48_P22_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT
Definition: IfxGtm_PinMap.c:105
IfxGtm_TIM1_6_TIN43_P23_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN
Definition: IfxGtm_PinMap.c:420
IfxGtm_TOM1_10_TOUT62_P20_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT
Definition: IfxGtm_PinMap.c:610
IfxGtm_ATOM2_6_TOUT100_P11_11_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT
Definition: IfxGtm_PinMap.c:207
IfxGtm_TOM0_10_TOUT12_P00_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT
Definition: IfxGtm_PinMap.c:492
IfxGtm_ATOM2_2_TOUT20_P00_11_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT
Definition: IfxGtm_PinMap.c:183
IfxGtm_TOM1_13_TOUT35_P33_13_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT
Definition: IfxGtm_PinMap.c:621
IfxGtm_TIM2_7_TIN17_P00_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN
Definition: IfxGtm_PinMap.c:478
IfxGtm_TOM0_10_TOUT46_P23_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT
Definition: IfxGtm_PinMap.c:495
IfxGtm_TOM0_11_TOUT97_P11_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT
Definition: IfxGtm_PinMap.c:505
IfxGtm_TIM1_1_TIN19_P00_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN
Definition: IfxGtm_PinMap.c:359
IfxGtm_TIM1_6_TIN24_P33_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN
Definition: IfxGtm_PinMap.c:418
IfxGtm_ATOM1_0_TOUT109_P10_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT
Definition: IfxGtm_PinMap.c:104
IfxGtm_TOM1_6_TOUT83_P14_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT
Definition: IfxGtm_PinMap.c:686
IfxGtm_TIM0_3_TIN21_P00_12_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN
Definition: IfxGtm_PinMap.c:305
IfxGtm_TIM0_7_TIN64_P20_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN
Definition: IfxGtm_PinMap.c:342
IfxGtm_TOM0_4_TOUT61_P20_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT
Definition: IfxGtm_PinMap.c:560
IfxGtm_ATOM0_2_TOUT83_P14_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT
Definition: IfxGtm_PinMap.c:67
IfxGtm_TIM1_7_TIN7_P02_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN
Definition: IfxGtm_PinMap.c:435
IfxGtm_TOM0_0_TOUT85_P14_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT
Definition: IfxGtm_PinMap.c:490
IfxGtm_ATOM3_6_TOUT92_P13_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT
Definition: IfxGtm_PinMap.c:261
IfxGtm_TIM2_4_TIN51_P21_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN
Definition: IfxGtm_PinMap.c:460
IfxGtm_ATOM1_6_TOUT59_P20_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT
Definition: IfxGtm_PinMap.c:163
IfxGtm_TOM0_12_TOUT14_P00_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT
Definition: IfxGtm_PinMap.c:506
IfxGtm_TIM1_5_TIN91_P13_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN
Definition: IfxGtm_PinMap.c:413
IfxGtm_TOM1_4_TOUT50_P22_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT
Definition: IfxGtm_PinMap.c:664
IfxGtm_ATOM1_1_TOUT11_P00_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT
Definition: IfxGtm_PinMap.c:115
IfxGtm_TIM0_4_TIN50_P22_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN
Definition: IfxGtm_PinMap.c:319
IfxGtm_TIM2_1_TIN69_P20_13_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN
Definition: IfxGtm_PinMap.c:447
IfxGtm_ATOM1_2_TOUT70_P20_14_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT
Definition: IfxGtm_PinMap.c:131
IfxGtm_TOM0_1_TOUT78_P15_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT
Definition: IfxGtm_PinMap.c:536
IfxGtm_TOM1_13_TOUT65_P20_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT
Definition: IfxGtm_PinMap.c:623
IfxGtm_Tom_Ch_2
TOM channel 2.
Definition: IfxGtm_cfg.h:288
IfxGtm_TIM1_4_TIN102_P10_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN
Definition: IfxGtm_PinMap.c:393
IfxGtm_ATOM3_0_TOUT26_P33_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT
Definition: IfxGtm_PinMap.c:220
IfxGtm_TOM1_5_TOUT73_P15_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT
Definition: IfxGtm_PinMap.c:675
IfxGtm_TIM0_7_TIN7_P02_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN
Definition: IfxGtm_PinMap.c:343
IfxGtm_TIM1_4_TIN39_P32_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN
Definition: IfxGtm_PinMap.c:397
IfxGtm_ATOM2_5_TOUT65_P20_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT
Definition: IfxGtm_PinMap.c:203
IfxGtm_TOM1_1_TOUT27_P33_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT
Definition: IfxGtm_PinMap.c:632
IfxGtm_ATOM2_7_TOUT101_P11_12_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT
Definition: IfxGtm_PinMap.c:213
IfxGtm_TOM0_3_TOUT108_P10_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT
Definition: IfxGtm_PinMap.c:547
IfxGtm_TIM0_6_TIN83_P14_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN
Definition: IfxGtm_PinMap.c:337
IfxGtm_TOM0_1_TOUT86_P14_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT
Definition: IfxGtm_PinMap.c:537
IfxGtm_TOM1_4_TOUT72_P15_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT
Definition: IfxGtm_PinMap.c:666
IfxGtm_ATOM2_0_TOUT32_P33_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT
Definition: IfxGtm_PinMap.c:175
IfxGtm_TOM1_7_TOUT64_P20_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT
Definition: IfxGtm_PinMap.c:693
IfxGtm_TOM0_0_TOUT109_P10_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT
Definition: IfxGtm_PinMap.c:483
IfxGtm_TOM1_11_TOUT3_P02_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT
Definition: IfxGtm_PinMap.c:613
IfxGtm_TOM0_9_TOUT11_P00_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT
Definition: IfxGtm_PinMap.c:589
IfxGtm_Tim_Ch_4
TIM channel 4.
Definition: IfxGtm_cfg.h:267
IfxGtm_ATOM3_5_TOUT91_P13_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT
Definition: IfxGtm_PinMap.c:256
IfxGtm_TIM1_0_TIN53_P21_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN
Definition: IfxGtm_PinMap.c:351
IfxGtm_TIM1_7_TIN45_P23_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN
Definition: IfxGtm_PinMap.c:431
IfxGtm_ATOM3_5_TOUT99_P11_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT
Definition: IfxGtm_PinMap.c:257
IfxGtm_TOM0_4_TOUT39_P32_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT
Definition: IfxGtm_PinMap.c:558
IfxGtm_TOM1_8_TOUT109_P10_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT
Definition: IfxGtm_PinMap.c:698
IfxGtm_Tim_Ch_2
TIM channel 2.
Definition: IfxGtm_cfg.h:265
IfxGtm_TIM1_7_TIN84_P14_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN
Definition: IfxGtm_PinMap.c:436
IfxGtm_TIM2_2_TIN70_P20_14_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN
Definition: IfxGtm_PinMap.c:451
IfxGtm_ATOM3_1_TOUT27_P33_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT
Definition: IfxGtm_PinMap.c:228
IfxGtm_TOM1_7_TOUT84_P14_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT
Definition: IfxGtm_PinMap.c:695
IfxGtm_TIM0_2_TIN79_P15_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN
Definition: IfxGtm_PinMap.c:302
IfxGtm_ATOM1_1_TOUT86_P14_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT
Definition: IfxGtm_PinMap.c:123
IfxGtm_ATOM3_0_TOUT76_P15_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT
Definition: IfxGtm_PinMap.c:222
IfxGtm_TIM0_3_TIN108_P10_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN
Definition: IfxGtm_PinMap.c:304
IfxGtm_TIM0_7_TIN25_P33_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN
Definition: IfxGtm_PinMap.c:338
IfxGtm_TIM1_4_TIN72_P15_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN
Definition: IfxGtm_PinMap.c:401
IfxGtm_TIM0_2_TIN20_P00_11_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN
Definition: IfxGtm_PinMap.c:295
IfxGtm_ATOM1_1_TOUT78_P15_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT
Definition: IfxGtm_PinMap.c:121
IfxGtm_ATOM3_4_TOUT30_P33_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT
Definition: IfxGtm_PinMap.c:248
IfxGtm_TIM1_6_TIN83_P14_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN
Definition: IfxGtm_PinMap.c:425
IfxGtm_TOM0_7_TOUT84_P14_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT
Definition: IfxGtm_PinMap.c:578
IfxGtm_TIM0_6_TIN43_P23_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN
Definition: IfxGtm_PinMap.c:334
IfxGtm_ATOM1_0_TOUT77_P15_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT
Definition: IfxGtm_PinMap.c:109
IfxGtm_CLK0_P23_1_OUT
IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT
Definition: IfxGtm_PinMap.c:265
IfxGtm_ATOM0_5_TOUT40_P32_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT
Definition: IfxGtm_PinMap.c:88
IfxGtm_ATOM3_4_TOUT22_P33_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT
Definition: IfxGtm_PinMap.c:247
IfxGtm_TIM1_2_TIN20_P00_11_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN
Definition: IfxGtm_PinMap.c:372
IfxGtm_TOM1_2_TOUT33_P33_11_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT
Definition: IfxGtm_PinMap.c:643
IfxGtm_TIM2_1_TIN35_P33_13_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN
Definition: IfxGtm_PinMap.c:446
IfxGtm_TOM1_3_TOUT80_P14_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT
Definition: IfxGtm_PinMap.c:657
IfxGtm_Atom_Ch_5
ATOM channel 5.
Definition: IfxGtm_cfg.h:227
IfxGtm_ATOM1_4_TOUT39_P32_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT
Definition: IfxGtm_PinMap.c:144
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxGtm_ATOM2_1_TOUT19_P00_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT
Definition: IfxGtm_PinMap.c:178
IfxGtm_ATOM0_5_TOUT5_P02_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT
Definition: IfxGtm_PinMap.c:91
IfxGtm_TOM0_14_TOUT16_P00_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT
Definition: IfxGtm_PinMap.c:520
IfxGtm_ATOM0_7_TOUT45_P23_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT
Definition: IfxGtm_PinMap.c:100
IfxGtm_ATOM0_4_TOUT102_P10_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT
Definition: IfxGtm_PinMap.c:77
IfxGtm_TOM0_15_TOUT67_P20_11_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT
Definition: IfxGtm_PinMap.c:528
IfxGtm_ATOM0_0_TOUT48_P22_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT
Definition: IfxGtm_PinMap.c:47
IfxGtm_TIM2_5_TIN91_P13_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN
Definition: IfxGtm_PinMap.c:469
IfxGtm_ATOM1_3_TOUT105_P10_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT
Definition: IfxGtm_PinMap.c:133
IfxGtm_ATOM1_2_TOUT12_P00_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT
Definition: IfxGtm_PinMap.c:126
IfxGtm_TOM1_10_TOUT104_P10_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT
Definition: IfxGtm_PinMap.c:607
IfxGtm_ATOM2_4_TOUT51_P21_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT
Definition: IfxGtm_PinMap.c:197
IfxGtm_TOM1_0_TOUT26_P33_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT
Definition: IfxGtm_PinMap.c:595
IfxGtm_Tom_Ch_15
TOM channel 15.
Definition: IfxGtm_cfg.h:301
IfxGtm_Tom_Ch_14
TOM channel 14.
Definition: IfxGtm_cfg.h:300
IfxGtm_TIM2_0_TIN9_P00_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN
Definition: IfxGtm_PinMap.c:443
IfxGtm_TIM1_0_TIN94_P13_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN
Definition: IfxGtm_PinMap.c:357
IfxGtm_TIM0_4_TIN30_P33_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN
Definition: IfxGtm_PinMap.c:316
IfxGtm_TIM2_5_TIN15_P00_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN
Definition: IfxGtm_PinMap.c:465
IfxGtm_ATOM0_2_TOUT107_P10_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT
Definition: IfxGtm_PinMap.c:61
IfxGtm_PinMap_setAtomTout
void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:718
IfxGtm_TIM1_2_TIN33_P33_11_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN
Definition: IfxGtm_PinMap.c:375
IfxGtm_TOM1_3_TOUT21_P00_12_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT
Definition: IfxGtm_PinMap.c:651
IfxGtm_TOM1_5_TOUT41_P23_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT
Definition: IfxGtm_PinMap.c:673
IfxGtm_ATOM1_7_TOUT17_P00_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT
Definition: IfxGtm_PinMap.c:167
IfxGtm_ATOM2_7_TOUT75_P15_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT
Definition: IfxGtm_PinMap.c:217
IfxGtm_ATOM1_1_TOUT79_P15_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT
Definition: IfxGtm_PinMap.c:122
IfxGtm_TIM1_6_TIN66_P20_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN
Definition: IfxGtm_PinMap.c:422
IfxGtm_ToutSel_a
Definition: IfxGtm_PinMap.h:85
IfxGtm_TOM0_3_TOUT60_P20_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT
Definition: IfxGtm_PinMap.c:552


iLLD_TC26B: IfxGtm_PinMap.h Source File

  • _PinMap
IfxGtm_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_PinMap.h
3 * \brief GTM I/O map
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_pinmap GTM Pin Mapping
42 * \ingroup IfxLld_Gtm
43 */
44
45 #ifndef IFXGTM_PINMAP_H
46 #define IFXGTM_PINMAP_H
47
48 #include <IfxGtm_reg.h>
49 #include <_Impl/IfxGtm_cfg.h>
50 #include <Port/Std/IfxPort.h>
51 #include <Gtm/Std/IfxGtm_Atom.h>
52 #include <Gtm/Std/IfxGtm_Tom.h>
53 #include <Gtm/Std/IfxGtm_Tim.h>
54
55 /** \addtogroup IfxLld_Gtm_pinmap
56 * \{ */
57
58 /** \brief CHxSEL register control code */
59 typedef enum
60 {
61 IfxGtm_ChXSel_a,
62 IfxGtm_ChXSel_b,
63 IfxGtm_ChXSel_c,
64 IfxGtm_ChXSel_d,
65
66 IfxGtm_ChXSel_e,
67 IfxGtm_ChXSel_f,
68 IfxGtm_ChXSel_g,
69 IfxGtm_ChXSel_h,
70
71 IfxGtm_ChXSel_i,
72 IfxGtm_ChXSel_j,
73 IfxGtm_ChXSel_k,
74 IfxGtm_ChXSel_l,
75
76 IfxGtm_ChXSel_m,
77 IfxGtm_ChXSel_n,
78 IfxGtm_ChXSel_o,
79 IfxGtm_ChXSel_p
80 } IfxGtm_ChXSel;
81
82 /** \brief TOUTSEL register control code */
83 typedef enum
84 {
85 IfxGtm_ToutSel_a,
86 IfxGtm_ToutSel_b,
87 IfxGtm_ToutSel_c,
88 IfxGtm_ToutSel_d,
89 IfxGtm_ToutSel_e
90 } IfxGtm_ToutSel;
91
92 /** \brief TIN pin mapping structure */
93 typedef const struct
94 {
95 IfxGtm_Tim tim; /**< \brief TIM unit index */
96 IfxGtm_Tim_Ch channel; /**< \brief TIM channel index */
97 IfxPort_Pin pin; /**< \brief Port pin */
98 IfxGtm_ChXSel select; /**< \brief Input multiplexer value */
99 } IfxGtm_Tim_TinMap;
100
101 /** \brief ATOM TOUT pin mapping structure */
102 typedef const struct
103 {
104 IfxGtm_Atom atom; /**< \brief ATOM unit index */
105 IfxGtm_Atom_Ch channel; /**< \brief ATOM channel index */
106 IfxGtm_ToutSel toutSel; /**< \brief TOUTSEL register control code */
107 uint32 toutn; /**< \brief TOUT number */
108 IfxPort_Pin pin; /**< \brief Port pin */
109 IfxPort_OutputIdx select; /**< \brief Port control code */
110 } IfxGtm_Atom_ToutMap;
111
112 /** \brief Pointer to \ref IfxGtm_Atom_ToutMap */
113 typedef IfxGtm_Atom_ToutMap *IfxGtm_Atom_ToutMapP;
114
115 /** \brief TOM TOUT pin mapping structure */
116 typedef const struct
117 {
118 IfxGtm_Tom tom; /**< \brief TOM unit index */
119 IfxGtm_Tom_Ch channel; /**< \brief TOM channel index */
120 IfxGtm_ToutSel toutSel; /**< \brief TOUTSEL register control code */
121 uint32 toutn; /**< \brief TOUT number */
122 IfxPort_Pin pin; /**< \brief Port pin */
123 IfxPort_OutputIdx select; /**< \brief Port control code */
124 } IfxGtm_Tom_ToutMap;
125
126 /** \brief GTM Clock Output */
127 typedef const struct
128 {
129 Ifx_GTM* module; /**< \brief Base address */
130 IfxPort_Pin pin; /**< \brief Port pin */
131 IfxPort_OutputIdx select; /**< \brief Port control code */
132 } IfxGtm_Clk_Out;
133
134 /** \brief Pointer to \ref IfxGtm_Tom_ToutMap */
135 typedef IfxGtm_Tom_ToutMap *IfxGtm_Tom_ToutMapP;
136
137 IFX_EXTERN void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode);
138 IFX_EXTERN void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
139 IFX_EXTERN void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
140
141 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT0_P02_0_OUT */
142 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT109_P10_7_OUT */
143 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT48_P22_1_OUT */
144 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT53_P21_2_OUT */
145 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT85_P14_5_OUT */
146 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT8_P02_8_OUT */
147 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT9_P00_0_OUT */
148 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT103_P10_1_OUT */
149 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT10_P00_1_OUT */
150 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT11_P00_2_OUT */
151 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT1_P02_1_OUT */
152 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT31_P33_9_OUT */
153 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT47_P22_0_OUT */
154 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT54_P21_3_OUT */
155 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT84_P14_4_OUT */
156 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT104_P10_2_OUT */
157 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT107_P10_5_OUT */
158 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT12_P00_3_OUT */
159 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT2_P02_2_OUT */
160 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT33_P33_11_OUT */
161 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT46_P23_5_OUT */
162 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT55_P21_4_OUT */
163 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT83_P14_3_OUT */
164 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT105_P10_3_OUT */
165 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT108_P10_6_OUT */
166 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT13_P00_4_OUT */
167 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT38_P32_2_OUT */
168 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT3_P02_3_OUT */
169 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT49_P22_2_OUT */
170 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT56_P21_5_OUT */
171 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT60_P20_1_OUT */
172 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT82_P14_2_OUT */
173 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT102_P10_0_OUT */
174 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT14_P00_5_OUT */
175 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT39_P32_3_OUT */
176 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT4_P02_4_OUT */
177 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT50_P22_3_OUT */
178 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT57_P21_6_OUT */
179 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT61_P20_3_OUT */
180 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT81_P14_1_OUT */
181 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT110_P10_8_OUT */
182 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT15_P00_6_OUT */
183 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT23_P33_1_OUT */
184 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT40_P32_4_OUT */
185 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT41_P23_0_OUT */
186 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT58_P21_7_OUT */
187 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT5_P02_5_OUT */
188 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT106_P10_4_OUT */
189 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT16_P00_7_OUT */
190 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT24_P33_2_OUT */
191 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT42_P23_1_OUT */
192 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT59_P20_0_OUT */
193 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT6_P02_6_OUT */
194 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT17_P00_8_OUT */
195 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT25_P33_3_OUT */
196 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT45_P23_4_OUT */
197 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT64_P20_8_OUT */
198 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT7_P02_7_OUT */
199 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT0_P02_0_OUT */
200 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT109_P10_7_OUT */
201 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT48_P22_1_OUT */
202 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT53_P21_2_OUT */
203 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT68_P20_12_OUT */
204 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT76_P15_5_OUT */
205 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT77_P15_6_OUT */
206 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT87_P14_7_OUT */
207 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT8_P02_8_OUT */
208 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT9_P00_0_OUT */
209 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT103_P10_1_OUT */
210 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT10_P00_1_OUT */
211 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT11_P00_2_OUT */
212 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT1_P02_1_OUT */
213 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT31_P33_9_OUT */
214 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT47_P22_0_OUT */
215 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT54_P21_3_OUT */
216 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT69_P20_13_OUT */
217 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT78_P15_7_OUT */
218 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT79_P15_8_OUT */
219 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT86_P14_6_OUT */
220 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT104_P10_2_OUT */
221 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT107_P10_5_OUT */
222 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT12_P00_3_OUT */
223 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT2_P02_2_OUT */
224 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT33_P33_11_OUT */
225 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT46_P23_5_OUT */
226 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT55_P21_4_OUT */
227 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT70_P20_14_OUT */
228 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT80_P14_0_OUT */
229 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT105_P10_3_OUT */
230 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT108_P10_6_OUT */
231 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT13_P00_4_OUT */
232 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT38_P32_2_OUT */
233 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT3_P02_3_OUT */
234 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT49_P22_2_OUT */
235 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT56_P21_5_OUT */
236 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT60_P20_1_OUT */
237 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT71_P15_0_OUT */
238 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT102_P10_0_OUT */
239 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT14_P00_5_OUT */
240 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT39_P32_3_OUT */
241 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT4_P02_4_OUT */
242 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT50_P22_3_OUT */
243 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT57_P21_6_OUT */
244 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT61_P20_3_OUT */
245 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT72_P15_1_OUT */
246 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT110_P10_8_OUT */
247 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT15_P00_6_OUT */
248 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT23_P33_1_OUT */
249 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT40_P32_4_OUT */
250 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT41_P23_0_OUT */
251 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT58_P21_7_OUT */
252 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT5_P02_5_OUT */
253 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT65_P20_9_OUT */
254 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT73_P15_2_OUT */
255 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT106_P10_4_OUT */
256 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT16_P00_7_OUT */
257 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT24_P33_2_OUT */
258 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT42_P23_1_OUT */
259 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT59_P20_0_OUT */
260 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT66_P20_10_OUT */
261 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT6_P02_6_OUT */
262 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT74_P15_3_OUT */
263 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT17_P00_8_OUT */
264 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT25_P33_3_OUT */
265 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT45_P23_4_OUT */
266 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT67_P20_11_OUT */
267 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT75_P15_4_OUT */
268 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT7_P02_7_OUT */
269 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT18_P00_9_OUT */
270 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT26_P33_4_OUT */
271 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT32_P33_10_OUT */
272 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT68_P20_12_OUT */
273 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT94_P13_3_OUT */
274 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT19_P00_10_OUT */
275 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT27_P33_5_OUT */
276 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT43_P23_2_OUT */
277 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT69_P20_13_OUT */
278 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT95_P11_2_OUT */
279 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT20_P00_11_OUT */
280 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT28_P33_6_OUT */
281 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT44_P23_3_OUT */
282 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT70_P20_14_OUT */
283 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT88_P14_8_OUT */
284 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT96_P11_3_OUT */
285 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT21_P00_12_OUT */
286 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT29_P33_7_OUT */
287 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT71_P15_0_OUT */
288 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT89_P14_9_OUT */
289 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT97_P11_6_OUT */
290 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT22_P33_0_OUT */
291 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT30_P33_8_OUT */
292 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT34_P33_12_OUT */
293 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT51_P21_0_OUT */
294 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT72_P15_1_OUT */
295 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT90_P14_10_OUT */
296 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT98_P11_9_OUT */
297 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT35_P33_13_OUT */
298 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT52_P21_1_OUT */
299 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT65_P20_9_OUT */
300 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT73_P15_2_OUT */
301 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT91_P13_0_OUT */
302 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT99_P11_10_OUT */
303 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT100_P11_11_OUT */
304 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT36_P32_0_OUT */
305 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT62_P20_6_OUT */
306 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT66_P20_10_OUT */
307 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT74_P15_3_OUT */
308 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT92_P13_1_OUT */
309 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT101_P11_12_OUT */
310 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT63_P20_7_OUT */
311 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT64_P20_8_OUT */
312 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT67_P20_11_OUT */
313 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT75_P15_4_OUT */
314 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT93_P13_2_OUT */
315 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT18_P00_9_OUT */
316 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT26_P33_4_OUT */
317 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT32_P33_10_OUT */
318 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT76_P15_5_OUT */
319 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT77_P15_6_OUT */
320 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT85_P14_5_OUT */
321 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT87_P14_7_OUT */
322 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT94_P13_3_OUT */
323 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT19_P00_10_OUT */
324 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT27_P33_5_OUT */
325 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT43_P23_2_OUT */
326 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT78_P15_7_OUT */
327 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT79_P15_8_OUT */
328 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT84_P14_4_OUT */
329 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT86_P14_6_OUT */
330 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT95_P11_2_OUT */
331 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT20_P00_11_OUT */
332 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT28_P33_6_OUT */
333 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT44_P23_3_OUT */
334 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT80_P14_0_OUT */
335 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT83_P14_3_OUT */
336 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT88_P14_8_OUT */
337 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT96_P11_3_OUT */
338 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT21_P00_12_OUT */
339 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT29_P33_7_OUT */
340 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT82_P14_2_OUT */
341 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT89_P14_9_OUT */
342 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT97_P11_6_OUT */
343 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT22_P33_0_OUT */
344 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT30_P33_8_OUT */
345 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT34_P33_12_OUT */
346 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT51_P21_0_OUT */
347 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT81_P14_1_OUT */
348 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT90_P14_10_OUT */
349 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT98_P11_9_OUT */
350 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT35_P33_13_OUT */
351 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT52_P21_1_OUT */
352 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT91_P13_0_OUT */
353 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT99_P11_10_OUT */
354 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT100_P11_11_OUT */
355 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT36_P32_0_OUT */
356 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT62_P20_6_OUT */
357 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT92_P13_1_OUT */
358 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT; /**< \brief IfxGtm_ATOM3_7_TOUT101_P11_12_OUT */
359 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT; /**< \brief IfxGtm_ATOM3_7_TOUT63_P20_7_OUT */
360 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT; /**< \brief IfxGtm_ATOM3_7_TOUT93_P13_2_OUT */
361 IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT; /**< \brief GTM_CLK0: GTM output */
362 IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT; /**< \brief GTM_CLK1: GTM output */
363 IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT; /**< \brief GTM_CLK2: GTM output */
364 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN; /**< \brief IfxGtm_TIM0_0_TIN0_P02_0_IN */
365 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN; /**< \brief IfxGtm_TIM0_0_TIN109_P10_7_IN */
366 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN; /**< \brief IfxGtm_TIM0_0_TIN18_P00_9_IN */
367 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN; /**< \brief IfxGtm_TIM0_0_TIN26_P33_4_IN */
368 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN; /**< \brief IfxGtm_TIM0_0_TIN32_P33_10_IN */
369 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN; /**< \brief IfxGtm_TIM0_0_TIN34_P33_12_IN */
370 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN; /**< \brief IfxGtm_TIM0_0_TIN48_P22_1_IN */
371 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN; /**< \brief IfxGtm_TIM0_0_TIN53_P21_2_IN */
372 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN; /**< \brief IfxGtm_TIM0_0_TIN77_P15_6_IN */
373 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN; /**< \brief IfxGtm_TIM0_0_TIN85_P14_5_IN */
374 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN; /**< \brief IfxGtm_TIM0_0_TIN87_P14_7_IN */
375 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN; /**< \brief IfxGtm_TIM0_0_TIN8_P02_8_IN */
376 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN; /**< \brief IfxGtm_TIM0_0_TIN9_P00_0_IN */
377 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN; /**< \brief IfxGtm_TIM0_1_TIN103_P10_1_IN */
378 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN; /**< \brief IfxGtm_TIM0_1_TIN10_P00_1_IN */
379 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN; /**< \brief IfxGtm_TIM0_1_TIN11_P00_2_IN */
380 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN; /**< \brief IfxGtm_TIM0_1_TIN19_P00_10_IN */
381 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN; /**< \brief IfxGtm_TIM0_1_TIN1_P02_1_IN */
382 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN; /**< \brief IfxGtm_TIM0_1_TIN27_P33_5_IN */
383 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN; /**< \brief IfxGtm_TIM0_1_TIN31_P33_9_IN */
384 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN; /**< \brief IfxGtm_TIM0_1_TIN35_P33_13_IN */
385 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN; /**< \brief IfxGtm_TIM0_1_TIN47_P22_0_IN */
386 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN; /**< \brief IfxGtm_TIM0_1_TIN54_P21_3_IN */
387 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN; /**< \brief IfxGtm_TIM0_1_TIN78_P15_7_IN */
388 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN; /**< \brief IfxGtm_TIM0_1_TIN86_P14_6_IN */
389 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN; /**< \brief IfxGtm_TIM0_2_TIN104_P10_2_IN */
390 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN; /**< \brief IfxGtm_TIM0_2_TIN107_P10_5_IN */
391 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN; /**< \brief IfxGtm_TIM0_2_TIN20_P00_11_IN */
392 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN; /**< \brief IfxGtm_TIM0_2_TIN28_P33_6_IN */
393 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN; /**< \brief IfxGtm_TIM0_2_TIN2_P02_2_IN */
394 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN; /**< \brief IfxGtm_TIM0_2_TIN33_P33_11_IN */
395 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN; /**< \brief IfxGtm_TIM0_2_TIN36_P32_0_IN */
396 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN; /**< \brief IfxGtm_TIM0_2_TIN46_P23_5_IN */
397 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN; /**< \brief IfxGtm_TIM0_2_TIN55_P21_4_IN */
398 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN; /**< \brief IfxGtm_TIM0_2_TIN79_P15_8_IN */
399 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN; /**< \brief IfxGtm_TIM0_3_TIN105_P10_3_IN */
400 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN; /**< \brief IfxGtm_TIM0_3_TIN108_P10_6_IN */
401 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN; /**< \brief IfxGtm_TIM0_3_TIN21_P00_12_IN */
402 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN; /**< \brief IfxGtm_TIM0_3_TIN29_P33_7_IN */
403 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN; /**< \brief IfxGtm_TIM0_3_TIN38_P32_2_IN */
404 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN; /**< \brief IfxGtm_TIM0_3_TIN3_P02_3_IN */
405 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN; /**< \brief IfxGtm_TIM0_3_TIN49_P22_2_IN */
406 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN; /**< \brief IfxGtm_TIM0_3_TIN51_P21_0_IN */
407 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN; /**< \brief IfxGtm_TIM0_3_TIN56_P21_5_IN */
408 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN; /**< \brief IfxGtm_TIM0_3_TIN60_P20_1_IN */
409 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN; /**< \brief IfxGtm_TIM0_3_TIN80_P14_0_IN */
410 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN; /**< \brief IfxGtm_TIM0_4_TIN102_P10_0_IN */
411 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN; /**< \brief IfxGtm_TIM0_4_TIN22_P33_0_IN */
412 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN; /**< \brief IfxGtm_TIM0_4_TIN30_P33_8_IN */
413 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN; /**< \brief IfxGtm_TIM0_4_TIN39_P32_3_IN */
414 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN; /**< \brief IfxGtm_TIM0_4_TIN4_P02_4_IN */
415 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN; /**< \brief IfxGtm_TIM0_4_TIN50_P22_3_IN */
416 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN; /**< \brief IfxGtm_TIM0_4_TIN52_P21_1_IN */
417 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN; /**< \brief IfxGtm_TIM0_4_TIN57_P21_6_IN */
418 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN; /**< \brief IfxGtm_TIM0_4_TIN61_P20_3_IN */
419 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN; /**< \brief IfxGtm_TIM0_4_TIN81_P14_1_IN */
420 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN; /**< \brief IfxGtm_TIM0_5_TIN110_P10_8_IN */
421 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN; /**< \brief IfxGtm_TIM0_5_TIN23_P33_1_IN */
422 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN; /**< \brief IfxGtm_TIM0_5_TIN40_P32_4_IN */
423 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN; /**< \brief IfxGtm_TIM0_5_TIN41_P23_0_IN */
424 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN; /**< \brief IfxGtm_TIM0_5_TIN58_P21_7_IN */
425 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN; /**< \brief IfxGtm_TIM0_5_TIN5_P02_5_IN */
426 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN; /**< \brief IfxGtm_TIM0_5_TIN82_P14_2_IN */
427 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN; /**< \brief IfxGtm_TIM0_6_TIN106_P10_4_IN */
428 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN; /**< \brief IfxGtm_TIM0_6_TIN24_P33_2_IN */
429 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN; /**< \brief IfxGtm_TIM0_6_TIN42_P23_1_IN */
430 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN; /**< \brief IfxGtm_TIM0_6_TIN43_P23_2_IN */
431 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN; /**< \brief IfxGtm_TIM0_6_TIN59_P20_0_IN */
432 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN; /**< \brief IfxGtm_TIM0_6_TIN62_P20_6_IN */
433 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN; /**< \brief IfxGtm_TIM0_6_TIN83_P14_3_IN */
434 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN; /**< \brief IfxGtm_TIM0_7_TIN25_P33_3_IN */
435 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN; /**< \brief IfxGtm_TIM0_7_TIN44_P23_3_IN */
436 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN; /**< \brief IfxGtm_TIM0_7_TIN45_P23_4_IN */
437 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN; /**< \brief IfxGtm_TIM0_7_TIN63_P20_7_IN */
438 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN; /**< \brief IfxGtm_TIM0_7_TIN64_P20_8_IN */
439 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN; /**< \brief IfxGtm_TIM0_7_TIN7_P02_7_IN */
440 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN; /**< \brief IfxGtm_TIM0_7_TIN84_P14_4_IN */
441 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN; /**< \brief IfxGtm_TIM1_0_TIN0_P02_0_IN */
442 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN; /**< \brief IfxGtm_TIM1_0_TIN109_P10_7_IN */
443 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN; /**< \brief IfxGtm_TIM1_0_TIN18_P00_9_IN */
444 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN; /**< \brief IfxGtm_TIM1_0_TIN26_P33_4_IN */
445 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN; /**< \brief IfxGtm_TIM1_0_TIN32_P33_10_IN */
446 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN; /**< \brief IfxGtm_TIM1_0_TIN48_P22_1_IN */
447 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN; /**< \brief IfxGtm_TIM1_0_TIN53_P21_2_IN */
448 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN; /**< \brief IfxGtm_TIM1_0_TIN68_P20_12_IN */
449 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN; /**< \brief IfxGtm_TIM1_0_TIN76_P15_5_IN */
450 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN; /**< \brief IfxGtm_TIM1_0_TIN77_P15_6_IN */
451 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN; /**< \brief IfxGtm_TIM1_0_TIN85_P14_5_IN */
452 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN; /**< \brief IfxGtm_TIM1_0_TIN87_P14_7_IN */
453 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN; /**< \brief IfxGtm_TIM1_0_TIN94_P13_3_IN */
454 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN; /**< \brief IfxGtm_TIM1_1_TIN103_P10_1_IN */
455 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN; /**< \brief IfxGtm_TIM1_1_TIN19_P00_10_IN */
456 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN; /**< \brief IfxGtm_TIM1_1_TIN1_P02_1_IN */
457 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN; /**< \brief IfxGtm_TIM1_1_TIN27_P33_5_IN */
458 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN; /**< \brief IfxGtm_TIM1_1_TIN31_P33_9_IN */
459 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN; /**< \brief IfxGtm_TIM1_1_TIN47_P22_0_IN */
460 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN; /**< \brief IfxGtm_TIM1_1_TIN54_P21_3_IN */
461 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN; /**< \brief IfxGtm_TIM1_1_TIN69_P20_13_IN */
462 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN; /**< \brief IfxGtm_TIM1_1_TIN78_P15_7_IN */
463 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN; /**< \brief IfxGtm_TIM1_1_TIN86_P14_6_IN */
464 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN; /**< \brief IfxGtm_TIM1_1_TIN95_P11_2_IN */
465 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN; /**< \brief IfxGtm_TIM1_2_TIN104_P10_2_IN */
466 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN; /**< \brief IfxGtm_TIM1_2_TIN107_P10_5_IN */
467 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN; /**< \brief IfxGtm_TIM1_2_TIN12_P00_3_IN */
468 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN; /**< \brief IfxGtm_TIM1_2_TIN20_P00_11_IN */
469 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN; /**< \brief IfxGtm_TIM1_2_TIN28_P33_6_IN */
470 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN; /**< \brief IfxGtm_TIM1_2_TIN2_P02_2_IN */
471 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN; /**< \brief IfxGtm_TIM1_2_TIN33_P33_11_IN */
472 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN; /**< \brief IfxGtm_TIM1_2_TIN46_P23_5_IN */
473 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN; /**< \brief IfxGtm_TIM1_2_TIN55_P21_4_IN */
474 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN; /**< \brief IfxGtm_TIM1_2_TIN70_P20_14_IN */
475 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN; /**< \brief IfxGtm_TIM1_2_TIN79_P15_8_IN */
476 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN; /**< \brief IfxGtm_TIM1_2_TIN96_P11_3_IN */
477 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN; /**< \brief IfxGtm_TIM1_3_TIN105_P10_3_IN */
478 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN; /**< \brief IfxGtm_TIM1_3_TIN108_P10_6_IN */
479 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN; /**< \brief IfxGtm_TIM1_3_TIN13_P00_4_IN */
480 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN; /**< \brief IfxGtm_TIM1_3_TIN21_P00_12_IN */
481 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN; /**< \brief IfxGtm_TIM1_3_TIN29_P33_7_IN */
482 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN; /**< \brief IfxGtm_TIM1_3_TIN38_P32_2_IN */
483 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN; /**< \brief IfxGtm_TIM1_3_TIN3_P02_3_IN */
484 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN; /**< \brief IfxGtm_TIM1_3_TIN49_P22_2_IN */
485 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN; /**< \brief IfxGtm_TIM1_3_TIN56_P21_5_IN */
486 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN; /**< \brief IfxGtm_TIM1_3_TIN71_P15_0_IN */
487 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN; /**< \brief IfxGtm_TIM1_3_TIN80_P14_0_IN */
488 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN; /**< \brief IfxGtm_TIM1_3_TIN97_P11_6_IN */
489 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN; /**< \brief IfxGtm_TIM1_4_TIN102_P10_0_IN */
490 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN; /**< \brief IfxGtm_TIM1_4_TIN14_P00_5_IN */
491 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN; /**< \brief IfxGtm_TIM1_4_TIN22_P33_0_IN */
492 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN; /**< \brief IfxGtm_TIM1_4_TIN30_P33_8_IN */
493 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN; /**< \brief IfxGtm_TIM1_4_TIN39_P32_3_IN */
494 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN; /**< \brief IfxGtm_TIM1_4_TIN4_P02_4_IN */
495 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN; /**< \brief IfxGtm_TIM1_4_TIN50_P22_3_IN */
496 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN; /**< \brief IfxGtm_TIM1_4_TIN57_P21_6_IN */
497 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN; /**< \brief IfxGtm_TIM1_4_TIN72_P15_1_IN */
498 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN; /**< \brief IfxGtm_TIM1_4_TIN81_P14_1_IN */
499 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN; /**< \brief IfxGtm_TIM1_4_TIN98_P11_9_IN */
500 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN; /**< \brief IfxGtm_TIM1_5_TIN110_P10_8_IN */
501 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN; /**< \brief IfxGtm_TIM1_5_TIN15_P00_6_IN */
502 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN; /**< \brief IfxGtm_TIM1_5_TIN40_P32_4_IN */
503 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN; /**< \brief IfxGtm_TIM1_5_TIN41_P23_0_IN */
504 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN; /**< \brief IfxGtm_TIM1_5_TIN58_P21_7_IN */
505 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN; /**< \brief IfxGtm_TIM1_5_TIN5_P02_5_IN */
506 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN; /**< \brief IfxGtm_TIM1_5_TIN65_P20_9_IN */
507 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN; /**< \brief IfxGtm_TIM1_5_TIN73_P15_2_IN */
508 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN; /**< \brief IfxGtm_TIM1_5_TIN82_P14_2_IN */
509 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN; /**< \brief IfxGtm_TIM1_5_TIN91_P13_0_IN */
510 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN; /**< \brief IfxGtm_TIM1_5_TIN99_P11_10_IN */
511 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN; /**< \brief IfxGtm_TIM1_6_TIN100_P11_11_IN */
512 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN; /**< \brief IfxGtm_TIM1_6_TIN106_P10_4_IN */
513 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN; /**< \brief IfxGtm_TIM1_6_TIN16_P00_7_IN */
514 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN; /**< \brief IfxGtm_TIM1_6_TIN24_P33_2_IN */
515 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN; /**< \brief IfxGtm_TIM1_6_TIN42_P23_1_IN */
516 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN; /**< \brief IfxGtm_TIM1_6_TIN43_P23_2_IN */
517 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN; /**< \brief IfxGtm_TIM1_6_TIN59_P20_0_IN */
518 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN; /**< \brief IfxGtm_TIM1_6_TIN66_P20_10_IN */
519 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN; /**< \brief IfxGtm_TIM1_6_TIN6_P02_6_IN */
520 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN; /**< \brief IfxGtm_TIM1_6_TIN74_P15_3_IN */
521 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN; /**< \brief IfxGtm_TIM1_6_TIN83_P14_3_IN */
522 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN; /**< \brief IfxGtm_TIM1_6_TIN92_P13_1_IN */
523 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN; /**< \brief IfxGtm_TIM1_7_TIN101_P11_12_IN */
524 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN; /**< \brief IfxGtm_TIM1_7_TIN17_P00_8_IN */
525 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN; /**< \brief IfxGtm_TIM1_7_TIN25_P33_3_IN */
526 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN; /**< \brief IfxGtm_TIM1_7_TIN44_P23_3_IN */
527 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN; /**< \brief IfxGtm_TIM1_7_TIN45_P23_4_IN */
528 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN; /**< \brief IfxGtm_TIM1_7_TIN64_P20_8_IN */
529 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN; /**< \brief IfxGtm_TIM1_7_TIN67_P20_11_IN */
530 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN; /**< \brief IfxGtm_TIM1_7_TIN75_P15_4_IN */
531 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN; /**< \brief IfxGtm_TIM1_7_TIN7_P02_7_IN */
532 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN; /**< \brief IfxGtm_TIM1_7_TIN84_P14_4_IN */
533 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN; /**< \brief IfxGtm_TIM1_7_TIN93_P13_2_IN */
534 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN; /**< \brief IfxGtm_TIM2_0_TIN34_P33_12_IN */
535 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN; /**< \brief IfxGtm_TIM2_0_TIN68_P20_12_IN */
536 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN; /**< \brief IfxGtm_TIM2_0_TIN76_P15_5_IN */
537 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN; /**< \brief IfxGtm_TIM2_0_TIN8_P02_8_IN */
538 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN; /**< \brief IfxGtm_TIM2_0_TIN94_P13_3_IN */
539 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN; /**< \brief IfxGtm_TIM2_0_TIN9_P00_0_IN */
540 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN; /**< \brief IfxGtm_TIM2_1_TIN10_P00_1_IN */
541 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN; /**< \brief IfxGtm_TIM2_1_TIN11_P00_2_IN */
542 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN; /**< \brief IfxGtm_TIM2_1_TIN35_P33_13_IN */
543 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN; /**< \brief IfxGtm_TIM2_1_TIN69_P20_13_IN */
544 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN; /**< \brief IfxGtm_TIM2_1_TIN95_P11_2_IN */
545 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN; /**< \brief IfxGtm_TIM2_2_TIN12_P00_3_IN */
546 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN; /**< \brief IfxGtm_TIM2_2_TIN36_P32_0_IN */
547 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN; /**< \brief IfxGtm_TIM2_2_TIN70_P20_14_IN */
548 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN; /**< \brief IfxGtm_TIM2_2_TIN88_P14_8_IN */
549 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN; /**< \brief IfxGtm_TIM2_2_TIN96_P11_3_IN */
550 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN; /**< \brief IfxGtm_TIM2_3_TIN13_P00_4_IN */
551 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN; /**< \brief IfxGtm_TIM2_3_TIN60_P20_1_IN */
552 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN; /**< \brief IfxGtm_TIM2_3_TIN71_P15_0_IN */
553 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN; /**< \brief IfxGtm_TIM2_3_TIN89_P14_9_IN */
554 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN; /**< \brief IfxGtm_TIM2_3_TIN97_P11_6_IN */
555 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN; /**< \brief IfxGtm_TIM2_4_TIN14_P00_5_IN */
556 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN; /**< \brief IfxGtm_TIM2_4_TIN51_P21_0_IN */
557 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN; /**< \brief IfxGtm_TIM2_4_TIN61_P20_3_IN */
558 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN; /**< \brief IfxGtm_TIM2_4_TIN72_P15_1_IN */
559 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN; /**< \brief IfxGtm_TIM2_4_TIN90_P14_10_IN */
560 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN; /**< \brief IfxGtm_TIM2_4_TIN98_P11_9_IN */
561 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN; /**< \brief IfxGtm_TIM2_5_TIN15_P00_6_IN */
562 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN; /**< \brief IfxGtm_TIM2_5_TIN52_P21_1_IN */
563 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN; /**< \brief IfxGtm_TIM2_5_TIN65_P20_9_IN */
564 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN; /**< \brief IfxGtm_TIM2_5_TIN73_P15_2_IN */
565 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN; /**< \brief IfxGtm_TIM2_5_TIN91_P13_0_IN */
566 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN; /**< \brief IfxGtm_TIM2_5_TIN99_P11_10_IN */
567 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN; /**< \brief IfxGtm_TIM2_6_TIN100_P11_11_IN */
568 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN; /**< \brief IfxGtm_TIM2_6_TIN16_P00_7_IN */
569 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN; /**< \brief IfxGtm_TIM2_6_TIN62_P20_6_IN */
570 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN; /**< \brief IfxGtm_TIM2_6_TIN66_P20_10_IN */
571 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN; /**< \brief IfxGtm_TIM2_6_TIN74_P15_3_IN */
572 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN; /**< \brief IfxGtm_TIM2_6_TIN92_P13_1_IN */
573 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN; /**< \brief IfxGtm_TIM2_7_TIN101_P11_12_IN */
574 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN; /**< \brief IfxGtm_TIM2_7_TIN17_P00_8_IN */
575 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN; /**< \brief IfxGtm_TIM2_7_TIN63_P20_7_IN */
576 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN; /**< \brief IfxGtm_TIM2_7_TIN67_P20_11_IN */
577 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN; /**< \brief IfxGtm_TIM2_7_TIN75_P15_4_IN */
578 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN; /**< \brief IfxGtm_TIM2_7_TIN93_P13_2_IN */
579 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT; /**< \brief IfxGtm_TOM0_0_TOUT109_P10_7_OUT */
580 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT; /**< \brief IfxGtm_TOM0_0_TOUT18_P00_9_OUT */
581 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT; /**< \brief IfxGtm_TOM0_0_TOUT26_P33_4_OUT */
582 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT; /**< \brief IfxGtm_TOM0_0_TOUT32_P33_10_OUT */
583 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT; /**< \brief IfxGtm_TOM0_0_TOUT53_P21_2_OUT */
584 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT; /**< \brief IfxGtm_TOM0_0_TOUT76_P15_5_OUT */
585 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT; /**< \brief IfxGtm_TOM0_0_TOUT77_P15_6_OUT */
586 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT; /**< \brief IfxGtm_TOM0_0_TOUT85_P14_5_OUT */
587 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT; /**< \brief IfxGtm_TOM0_0_TOUT87_P14_7_OUT */
588 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT; /**< \brief IfxGtm_TOM0_10_TOUT12_P00_3_OUT */
589 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT; /**< \brief IfxGtm_TOM0_10_TOUT2_P02_2_OUT */
590 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT; /**< \brief IfxGtm_TOM0_10_TOUT41_P23_0_OUT */
591 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT; /**< \brief IfxGtm_TOM0_10_TOUT46_P23_5_OUT */
592 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT; /**< \brief IfxGtm_TOM0_10_TOUT62_P20_6_OUT */
593 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT; /**< \brief IfxGtm_TOM0_10_TOUT70_P20_14_OUT */
594 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT; /**< \brief IfxGtm_TOM0_10_TOUT96_P11_3_OUT */
595 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT; /**< \brief IfxGtm_TOM0_11_TOUT13_P00_4_OUT */
596 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT; /**< \brief IfxGtm_TOM0_11_TOUT3_P02_3_OUT */
597 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT; /**< \brief IfxGtm_TOM0_11_TOUT43_P23_2_OUT */
598 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT; /**< \brief IfxGtm_TOM0_11_TOUT49_P22_2_OUT */
599 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT; /**< \brief IfxGtm_TOM0_11_TOUT63_P20_7_OUT */
600 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT; /**< \brief IfxGtm_TOM0_11_TOUT71_P15_0_OUT */
601 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT; /**< \brief IfxGtm_TOM0_11_TOUT97_P11_6_OUT */
602 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT; /**< \brief IfxGtm_TOM0_12_TOUT14_P00_5_OUT */
603 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT; /**< \brief IfxGtm_TOM0_12_TOUT34_P33_12_OUT */
604 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT; /**< \brief IfxGtm_TOM0_12_TOUT44_P23_3_OUT */
605 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT; /**< \brief IfxGtm_TOM0_12_TOUT4_P02_4_OUT */
606 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT; /**< \brief IfxGtm_TOM0_12_TOUT50_P22_3_OUT */
607 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT; /**< \brief IfxGtm_TOM0_12_TOUT72_P15_1_OUT */
608 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT; /**< \brief IfxGtm_TOM0_12_TOUT98_P11_9_OUT */
609 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT; /**< \brief IfxGtm_TOM0_13_TOUT15_P00_6_OUT */
610 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT; /**< \brief IfxGtm_TOM0_13_TOUT35_P33_13_OUT */
611 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT; /**< \brief IfxGtm_TOM0_13_TOUT5_P02_5_OUT */
612 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT; /**< \brief IfxGtm_TOM0_13_TOUT65_P20_9_OUT */
613 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT; /**< \brief IfxGtm_TOM0_13_TOUT73_P15_2_OUT */
614 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT; /**< \brief IfxGtm_TOM0_13_TOUT99_P11_10_OUT */
615 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT; /**< \brief IfxGtm_TOM0_14_TOUT100_P11_11_OUT */
616 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT; /**< \brief IfxGtm_TOM0_14_TOUT16_P00_7_OUT */
617 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT; /**< \brief IfxGtm_TOM0_14_TOUT36_P32_0_OUT */
618 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT; /**< \brief IfxGtm_TOM0_14_TOUT66_P20_10_OUT */
619 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT; /**< \brief IfxGtm_TOM0_14_TOUT6_P02_6_OUT */
620 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT; /**< \brief IfxGtm_TOM0_14_TOUT74_P15_3_OUT */
621 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT; /**< \brief IfxGtm_TOM0_15_TOUT101_P11_12_OUT */
622 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT; /**< \brief IfxGtm_TOM0_15_TOUT17_P00_8_OUT */
623 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT; /**< \brief IfxGtm_TOM0_15_TOUT42_P23_1_OUT */
624 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT; /**< \brief IfxGtm_TOM0_15_TOUT67_P20_11_OUT */
625 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT; /**< \brief IfxGtm_TOM0_15_TOUT75_P15_4_OUT */
626 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT; /**< \brief IfxGtm_TOM0_15_TOUT7_P02_7_OUT */
627 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT; /**< \brief IfxGtm_TOM0_1_TOUT103_P10_1_OUT */
628 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT; /**< \brief IfxGtm_TOM0_1_TOUT19_P00_10_OUT */
629 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT; /**< \brief IfxGtm_TOM0_1_TOUT27_P33_5_OUT */
630 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT; /**< \brief IfxGtm_TOM0_1_TOUT31_P33_9_OUT */
631 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT; /**< \brief IfxGtm_TOM0_1_TOUT54_P21_3_OUT */
632 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT; /**< \brief IfxGtm_TOM0_1_TOUT78_P15_7_OUT */
633 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT; /**< \brief IfxGtm_TOM0_1_TOUT86_P14_6_OUT */
634 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT; /**< \brief IfxGtm_TOM0_2_TOUT104_P10_2_OUT */
635 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT; /**< \brief IfxGtm_TOM0_2_TOUT107_P10_5_OUT */
636 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT; /**< \brief IfxGtm_TOM0_2_TOUT20_P00_11_OUT */
637 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT; /**< \brief IfxGtm_TOM0_2_TOUT28_P33_6_OUT */
638 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT; /**< \brief IfxGtm_TOM0_2_TOUT33_P33_11_OUT */
639 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT; /**< \brief IfxGtm_TOM0_2_TOUT55_P21_4_OUT */
640 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT; /**< \brief IfxGtm_TOM0_2_TOUT79_P15_8_OUT */
641 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT; /**< \brief IfxGtm_TOM0_2_TOUT88_P14_8_OUT */
642 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT; /**< \brief IfxGtm_TOM0_3_TOUT105_P10_3_OUT */
643 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT; /**< \brief IfxGtm_TOM0_3_TOUT108_P10_6_OUT */
644 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT; /**< \brief IfxGtm_TOM0_3_TOUT21_P00_12_OUT */
645 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT; /**< \brief IfxGtm_TOM0_3_TOUT29_P33_7_OUT */
646 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT; /**< \brief IfxGtm_TOM0_3_TOUT38_P32_2_OUT */
647 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT; /**< \brief IfxGtm_TOM0_3_TOUT56_P21_5_OUT */
648 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT; /**< \brief IfxGtm_TOM0_3_TOUT60_P20_1_OUT */
649 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT; /**< \brief IfxGtm_TOM0_3_TOUT80_P14_0_OUT */
650 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT; /**< \brief IfxGtm_TOM0_3_TOUT89_P14_9_OUT */
651 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT; /**< \brief IfxGtm_TOM0_4_TOUT102_P10_0_OUT */
652 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT; /**< \brief IfxGtm_TOM0_4_TOUT22_P33_0_OUT */
653 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT; /**< \brief IfxGtm_TOM0_4_TOUT30_P33_8_OUT */
654 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT; /**< \brief IfxGtm_TOM0_4_TOUT39_P32_3_OUT */
655 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT; /**< \brief IfxGtm_TOM0_4_TOUT57_P21_6_OUT */
656 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT; /**< \brief IfxGtm_TOM0_4_TOUT61_P20_3_OUT */
657 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT; /**< \brief IfxGtm_TOM0_4_TOUT81_P14_1_OUT */
658 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT; /**< \brief IfxGtm_TOM0_4_TOUT90_P14_10_OUT */
659 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT; /**< \brief IfxGtm_TOM0_5_TOUT110_P10_8_OUT */
660 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT; /**< \brief IfxGtm_TOM0_5_TOUT23_P33_1_OUT */
661 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT; /**< \brief IfxGtm_TOM0_5_TOUT40_P32_4_OUT */
662 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT; /**< \brief IfxGtm_TOM0_5_TOUT58_P21_7_OUT */
663 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT; /**< \brief IfxGtm_TOM0_5_TOUT82_P14_2_OUT */
664 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT; /**< \brief IfxGtm_TOM0_5_TOUT91_P13_0_OUT */
665 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT; /**< \brief IfxGtm_TOM0_6_TOUT106_P10_4_OUT */
666 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT; /**< \brief IfxGtm_TOM0_6_TOUT24_P33_2_OUT */
667 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT; /**< \brief IfxGtm_TOM0_6_TOUT42_P23_1_OUT */
668 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT; /**< \brief IfxGtm_TOM0_6_TOUT59_P20_0_OUT */
669 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT; /**< \brief IfxGtm_TOM0_6_TOUT83_P14_3_OUT */
670 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT; /**< \brief IfxGtm_TOM0_6_TOUT92_P13_1_OUT */
671 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT; /**< \brief IfxGtm_TOM0_7_TOUT25_P33_3_OUT */
672 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT; /**< \brief IfxGtm_TOM0_7_TOUT45_P23_4_OUT */
673 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT; /**< \brief IfxGtm_TOM0_7_TOUT64_P20_8_OUT */
674 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT; /**< \brief IfxGtm_TOM0_7_TOUT84_P14_4_OUT */
675 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT; /**< \brief IfxGtm_TOM0_7_TOUT93_P13_2_OUT */
676 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT; /**< \brief IfxGtm_TOM0_8_TOUT0_P02_0_OUT */
677 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT; /**< \brief IfxGtm_TOM0_8_TOUT48_P22_1_OUT */
678 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT; /**< \brief IfxGtm_TOM0_8_TOUT51_P21_0_OUT */
679 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT; /**< \brief IfxGtm_TOM0_8_TOUT68_P20_12_OUT */
680 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT; /**< \brief IfxGtm_TOM0_8_TOUT8_P02_8_OUT */
681 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT; /**< \brief IfxGtm_TOM0_8_TOUT94_P13_3_OUT */
682 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT; /**< \brief IfxGtm_TOM0_8_TOUT95_P11_2_OUT */
683 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT; /**< \brief IfxGtm_TOM0_8_TOUT9_P00_0_OUT */
684 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT; /**< \brief IfxGtm_TOM0_9_TOUT10_P00_1_OUT */
685 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT; /**< \brief IfxGtm_TOM0_9_TOUT11_P00_2_OUT */
686 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT; /**< \brief IfxGtm_TOM0_9_TOUT1_P02_1_OUT */
687 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT; /**< \brief IfxGtm_TOM0_9_TOUT47_P22_0_OUT */
688 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT; /**< \brief IfxGtm_TOM0_9_TOUT52_P21_1_OUT */
689 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT; /**< \brief IfxGtm_TOM0_9_TOUT69_P20_13_OUT */
690 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT; /**< \brief IfxGtm_TOM1_0_TOUT18_P00_9_OUT */
691 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT; /**< \brief IfxGtm_TOM1_0_TOUT26_P33_4_OUT */
692 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT; /**< \brief IfxGtm_TOM1_0_TOUT32_P33_10_OUT */
693 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT; /**< \brief IfxGtm_TOM1_0_TOUT48_P22_1_OUT */
694 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT; /**< \brief IfxGtm_TOM1_0_TOUT53_P21_2_OUT */
695 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT; /**< \brief IfxGtm_TOM1_0_TOUT68_P20_12_OUT */
696 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT; /**< \brief IfxGtm_TOM1_0_TOUT76_P15_5_OUT */
697 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT; /**< \brief IfxGtm_TOM1_0_TOUT77_P15_6_OUT */
698 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT; /**< \brief IfxGtm_TOM1_0_TOUT85_P14_5_OUT */
699 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT; /**< \brief IfxGtm_TOM1_0_TOUT87_P14_7_OUT */
700 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT; /**< \brief IfxGtm_TOM1_0_TOUT8_P02_8_OUT */
701 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT; /**< \brief IfxGtm_TOM1_0_TOUT94_P13_3_OUT */
702 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT; /**< \brief IfxGtm_TOM1_0_TOUT9_P00_0_OUT */
703 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT; /**< \brief IfxGtm_TOM1_10_TOUT104_P10_2_OUT */
704 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT; /**< \brief IfxGtm_TOM1_10_TOUT107_P10_5_OUT */
705 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT; /**< \brief IfxGtm_TOM1_10_TOUT2_P02_2_OUT */
706 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT; /**< \brief IfxGtm_TOM1_10_TOUT62_P20_6_OUT */
707 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT; /**< \brief IfxGtm_TOM1_11_TOUT105_P10_3_OUT */
708 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT; /**< \brief IfxGtm_TOM1_11_TOUT108_P10_6_OUT */
709 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT; /**< \brief IfxGtm_TOM1_11_TOUT3_P02_3_OUT */
710 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT; /**< \brief IfxGtm_TOM1_11_TOUT60_P20_1_OUT */
711 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT; /**< \brief IfxGtm_TOM1_11_TOUT63_P20_7_OUT */
712 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT; /**< \brief IfxGtm_TOM1_12_TOUT102_P10_0_OUT */
713 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT; /**< \brief IfxGtm_TOM1_12_TOUT34_P33_12_OUT */
714 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT; /**< \brief IfxGtm_TOM1_12_TOUT4_P02_4_OUT */
715 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT; /**< \brief IfxGtm_TOM1_12_TOUT61_P20_3_OUT */
716 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT; /**< \brief IfxGtm_TOM1_13_TOUT110_P10_8_OUT */
717 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT; /**< \brief IfxGtm_TOM1_13_TOUT35_P33_13_OUT */
718 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT; /**< \brief IfxGtm_TOM1_13_TOUT5_P02_5_OUT */
719 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT; /**< \brief IfxGtm_TOM1_13_TOUT65_P20_9_OUT */
720 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT; /**< \brief IfxGtm_TOM1_14_TOUT36_P32_0_OUT */
721 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT; /**< \brief IfxGtm_TOM1_14_TOUT66_P20_10_OUT */
722 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT; /**< \brief IfxGtm_TOM1_14_TOUT6_P02_6_OUT */
723 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT; /**< \brief IfxGtm_TOM1_15_TOUT67_P20_11_OUT */
724 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT; /**< \brief IfxGtm_TOM1_15_TOUT7_P02_7_OUT */
725 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT; /**< \brief IfxGtm_TOM1_1_TOUT10_P00_1_OUT */
726 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT; /**< \brief IfxGtm_TOM1_1_TOUT11_P00_2_OUT */
727 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT; /**< \brief IfxGtm_TOM1_1_TOUT19_P00_10_OUT */
728 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT; /**< \brief IfxGtm_TOM1_1_TOUT27_P33_5_OUT */
729 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT; /**< \brief IfxGtm_TOM1_1_TOUT31_P33_9_OUT */
730 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT; /**< \brief IfxGtm_TOM1_1_TOUT47_P22_0_OUT */
731 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT; /**< \brief IfxGtm_TOM1_1_TOUT54_P21_3_OUT */
732 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT; /**< \brief IfxGtm_TOM1_1_TOUT69_P20_13_OUT */
733 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT; /**< \brief IfxGtm_TOM1_1_TOUT78_P15_7_OUT */
734 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT; /**< \brief IfxGtm_TOM1_1_TOUT86_P14_6_OUT */
735 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT; /**< \brief IfxGtm_TOM1_1_TOUT95_P11_2_OUT */
736 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT; /**< \brief IfxGtm_TOM1_2_TOUT12_P00_3_OUT */
737 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT; /**< \brief IfxGtm_TOM1_2_TOUT20_P00_11_OUT */
738 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT; /**< \brief IfxGtm_TOM1_2_TOUT28_P33_6_OUT */
739 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT; /**< \brief IfxGtm_TOM1_2_TOUT33_P33_11_OUT */
740 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT; /**< \brief IfxGtm_TOM1_2_TOUT46_P23_5_OUT */
741 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT; /**< \brief IfxGtm_TOM1_2_TOUT55_P21_4_OUT */
742 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT; /**< \brief IfxGtm_TOM1_2_TOUT70_P20_14_OUT */
743 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT; /**< \brief IfxGtm_TOM1_2_TOUT79_P15_8_OUT */
744 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT; /**< \brief IfxGtm_TOM1_2_TOUT88_P14_8_OUT */
745 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT; /**< \brief IfxGtm_TOM1_2_TOUT96_P11_3_OUT */
746 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT; /**< \brief IfxGtm_TOM1_3_TOUT13_P00_4_OUT */
747 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT; /**< \brief IfxGtm_TOM1_3_TOUT21_P00_12_OUT */
748 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT; /**< \brief IfxGtm_TOM1_3_TOUT29_P33_7_OUT */
749 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT; /**< \brief IfxGtm_TOM1_3_TOUT38_P32_2_OUT */
750 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT; /**< \brief IfxGtm_TOM1_3_TOUT49_P22_2_OUT */
751 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT; /**< \brief IfxGtm_TOM1_3_TOUT56_P21_5_OUT */
752 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT; /**< \brief IfxGtm_TOM1_3_TOUT71_P15_0_OUT */
753 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT; /**< \brief IfxGtm_TOM1_3_TOUT80_P14_0_OUT */
754 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT; /**< \brief IfxGtm_TOM1_3_TOUT89_P14_9_OUT */
755 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT; /**< \brief IfxGtm_TOM1_3_TOUT97_P11_6_OUT */
756 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT; /**< \brief IfxGtm_TOM1_4_TOUT14_P00_5_OUT */
757 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT; /**< \brief IfxGtm_TOM1_4_TOUT22_P33_0_OUT */
758 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT; /**< \brief IfxGtm_TOM1_4_TOUT30_P33_8_OUT */
759 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT; /**< \brief IfxGtm_TOM1_4_TOUT39_P32_3_OUT */
760 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT; /**< \brief IfxGtm_TOM1_4_TOUT50_P22_3_OUT */
761 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT; /**< \brief IfxGtm_TOM1_4_TOUT57_P21_6_OUT */
762 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT; /**< \brief IfxGtm_TOM1_4_TOUT72_P15_1_OUT */
763 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT; /**< \brief IfxGtm_TOM1_4_TOUT81_P14_1_OUT */
764 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT; /**< \brief IfxGtm_TOM1_4_TOUT90_P14_10_OUT */
765 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT; /**< \brief IfxGtm_TOM1_4_TOUT98_P11_9_OUT */
766 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT; /**< \brief IfxGtm_TOM1_5_TOUT15_P00_6_OUT */
767 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT; /**< \brief IfxGtm_TOM1_5_TOUT23_P33_1_OUT */
768 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT; /**< \brief IfxGtm_TOM1_5_TOUT40_P32_4_OUT */
769 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT; /**< \brief IfxGtm_TOM1_5_TOUT41_P23_0_OUT */
770 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT; /**< \brief IfxGtm_TOM1_5_TOUT58_P21_7_OUT */
771 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT; /**< \brief IfxGtm_TOM1_5_TOUT73_P15_2_OUT */
772 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT; /**< \brief IfxGtm_TOM1_5_TOUT82_P14_2_OUT */
773 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT; /**< \brief IfxGtm_TOM1_5_TOUT91_P13_0_OUT */
774 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT; /**< \brief IfxGtm_TOM1_5_TOUT99_P11_10_OUT */
775 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT; /**< \brief IfxGtm_TOM1_6_TOUT100_P11_11_OUT */
776 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT; /**< \brief IfxGtm_TOM1_6_TOUT106_P10_4_OUT */
777 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT; /**< \brief IfxGtm_TOM1_6_TOUT16_P00_7_OUT */
778 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT; /**< \brief IfxGtm_TOM1_6_TOUT24_P33_2_OUT */
779 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT; /**< \brief IfxGtm_TOM1_6_TOUT43_P23_2_OUT */
780 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT; /**< \brief IfxGtm_TOM1_6_TOUT59_P20_0_OUT */
781 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT; /**< \brief IfxGtm_TOM1_6_TOUT74_P15_3_OUT */
782 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT; /**< \brief IfxGtm_TOM1_6_TOUT83_P14_3_OUT */
783 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT; /**< \brief IfxGtm_TOM1_6_TOUT92_P13_1_OUT */
784 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT; /**< \brief IfxGtm_TOM1_7_TOUT101_P11_12_OUT */
785 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT; /**< \brief IfxGtm_TOM1_7_TOUT17_P00_8_OUT */
786 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT; /**< \brief IfxGtm_TOM1_7_TOUT25_P33_3_OUT */
787 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT; /**< \brief IfxGtm_TOM1_7_TOUT44_P23_3_OUT */
788 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT; /**< \brief IfxGtm_TOM1_7_TOUT45_P23_4_OUT */
789 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT; /**< \brief IfxGtm_TOM1_7_TOUT64_P20_8_OUT */
790 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT; /**< \brief IfxGtm_TOM1_7_TOUT75_P15_4_OUT */
791 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT; /**< \brief IfxGtm_TOM1_7_TOUT84_P14_4_OUT */
792 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT; /**< \brief IfxGtm_TOM1_7_TOUT93_P13_2_OUT */
793 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT; /**< \brief IfxGtm_TOM1_8_TOUT0_P02_0_OUT */
794 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT; /**< \brief IfxGtm_TOM1_8_TOUT109_P10_7_OUT */
795 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT; /**< \brief IfxGtm_TOM1_8_TOUT51_P21_0_OUT */
796 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT; /**< \brief IfxGtm_TOM1_9_TOUT103_P10_1_OUT */
797 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT; /**< \brief IfxGtm_TOM1_9_TOUT1_P02_1_OUT */
798 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT; /**< \brief IfxGtm_TOM1_9_TOUT52_P21_1_OUT */
799
800 /** \} */
801
802 #endif /* IFXGTM_PINMAP_H */
IfxGtm_TOM0_1_TOUT19_P00_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT
IfxGtm_TOM0_1_TOUT19_P00_10_OUT.
Definition: IfxGtm_PinMap.h:628
IfxGtm_TOM1_6_TOUT83_P14_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT
IfxGtm_TOM1_6_TOUT83_P14_3_OUT.
Definition: IfxGtm_PinMap.h:782
IfxGtm_ATOM1_1_TOUT78_P15_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT
IfxGtm_ATOM1_1_TOUT78_P15_7_OUT.
Definition: IfxGtm_PinMap.h:217
IfxGtm_TOM1_4_TOUT14_P00_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT
IfxGtm_TOM1_4_TOUT14_P00_5_OUT.
Definition: IfxGtm_PinMap.h:756
IfxGtm_TOM1_2_TOUT46_P23_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT
IfxGtm_TOM1_2_TOUT46_P23_5_OUT.
Definition: IfxGtm_PinMap.h:740
IfxGtm_ATOM2_4_TOUT22_P33_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT
IfxGtm_ATOM2_4_TOUT22_P33_0_OUT.
Definition: IfxGtm_PinMap.h:290
IfxGtm_TIM1_3_TIN56_P21_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN
IfxGtm_TIM1_3_TIN56_P21_5_IN.
Definition: IfxGtm_PinMap.h:485
IfxGtm_TOM1_0_TOUT9_P00_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT
IfxGtm_TOM1_0_TOUT9_P00_0_OUT.
Definition: IfxGtm_PinMap.h:702
IfxGtm_TIM1_5_TIN5_P02_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN
IfxGtm_TIM1_5_TIN5_P02_5_IN.
Definition: IfxGtm_PinMap.h:505
IfxGtm_TIM1_3_TIN80_P14_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN
IfxGtm_TIM1_3_TIN80_P14_0_IN.
Definition: IfxGtm_PinMap.h:487
IfxGtm_TOM0_1_TOUT54_P21_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT
IfxGtm_TOM0_1_TOUT54_P21_3_OUT.
Definition: IfxGtm_PinMap.h:631
IfxGtm_ATOM1_0_TOUT0_P02_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT
IfxGtm_ATOM1_0_TOUT0_P02_0_OUT.
Definition: IfxGtm_PinMap.h:199
IfxGtm_TIM1_5_TIN91_P13_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN
IfxGtm_TIM1_5_TIN91_P13_0_IN.
Definition: IfxGtm_PinMap.h:509
IfxGtm_ATOM2_4_TOUT34_P33_12_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT
IfxGtm_ATOM2_4_TOUT34_P33_12_OUT.
Definition: IfxGtm_PinMap.h:292
IfxGtm_TIM1_0_TIN87_P14_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN
IfxGtm_TIM1_0_TIN87_P14_7_IN.
Definition: IfxGtm_PinMap.h:452
IfxGtm_ATOM1_1_TOUT69_P20_13_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT
IfxGtm_ATOM1_1_TOUT69_P20_13_OUT.
Definition: IfxGtm_PinMap.h:216
IfxGtm_TOM0_3_TOUT21_P00_12_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT
IfxGtm_TOM0_3_TOUT21_P00_12_OUT.
Definition: IfxGtm_PinMap.h:644
IfxGtm_TOM0_0_TOUT76_P15_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT
IfxGtm_TOM0_0_TOUT76_P15_5_OUT.
Definition: IfxGtm_PinMap.h:584
IfxGtm_TOM1_0_TOUT77_P15_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT
IfxGtm_TOM1_0_TOUT77_P15_6_OUT.
Definition: IfxGtm_PinMap.h:697
IfxGtm_TIM2_0_TIN94_P13_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN
IfxGtm_TIM2_0_TIN94_P13_3_IN.
Definition: IfxGtm_PinMap.h:538
IfxGtm_ATOM2_6_TOUT62_P20_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT
IfxGtm_ATOM2_6_TOUT62_P20_6_OUT.
Definition: IfxGtm_PinMap.h:305
IfxGtm_ATOM0_6_TOUT6_P02_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT
IfxGtm_ATOM0_6_TOUT6_P02_6_OUT.
Definition: IfxGtm_PinMap.h:193
IfxGtm_TIM1_0_TIN0_P02_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN
IfxGtm_TIM1_0_TIN0_P02_0_IN.
Definition: IfxGtm_PinMap.h:441
IfxGtm_ATOM1_1_TOUT47_P22_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT
IfxGtm_ATOM1_1_TOUT47_P22_0_OUT.
Definition: IfxGtm_PinMap.h:214
IfxGtm_ATOM1_6_TOUT66_P20_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT
IfxGtm_ATOM1_6_TOUT66_P20_10_OUT.
Definition: IfxGtm_PinMap.h:260
IfxGtm_TOM0_0_TOUT18_P00_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT
IfxGtm_TOM0_0_TOUT18_P00_9_OUT.
Definition: IfxGtm_PinMap.h:580
IfxGtm_ATOM2_0_TOUT26_P33_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT
IfxGtm_ATOM2_0_TOUT26_P33_4_OUT.
Definition: IfxGtm_PinMap.h:270
IfxGtm_PinMap_setTimTin
IFX_EXTERN void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
Definition: IfxGtm_PinMap.c:706
IfxGtm_TOM0_10_TOUT96_P11_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT
IfxGtm_TOM0_10_TOUT96_P11_3_OUT.
Definition: IfxGtm_PinMap.h:594
IfxGtm_TIM1_7_TIN44_P23_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN
IfxGtm_TIM1_7_TIN44_P23_3_IN.
Definition: IfxGtm_PinMap.h:526
IfxGtm_TOM0_1_TOUT78_P15_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT
IfxGtm_TOM0_1_TOUT78_P15_7_OUT.
Definition: IfxGtm_PinMap.h:632
IfxGtm_ATOM1_6_TOUT42_P23_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT
IfxGtm_ATOM1_6_TOUT42_P23_1_OUT.
Definition: IfxGtm_PinMap.h:258
IfxGtm_TOM0_11_TOUT13_P00_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT
IfxGtm_TOM0_11_TOUT13_P00_4_OUT.
Definition: IfxGtm_PinMap.h:595
IfxGtm_ATOM1_0_TOUT9_P00_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT
IfxGtm_ATOM1_0_TOUT9_P00_0_OUT.
Definition: IfxGtm_PinMap.h:208
IfxGtm_ATOM2_5_TOUT99_P11_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT
IfxGtm_ATOM2_5_TOUT99_P11_10_OUT.
Definition: IfxGtm_PinMap.h:302
IfxGtm_TIM2_2_TIN70_P20_14_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN
IfxGtm_TIM2_2_TIN70_P20_14_IN.
Definition: IfxGtm_PinMap.h:547
IfxGtm_TOM0_7_TOUT64_P20_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT
IfxGtm_TOM0_7_TOUT64_P20_8_OUT.
Definition: IfxGtm_PinMap.h:673
IfxGtm_Atom_ToutMap::channel
IfxGtm_Atom_Ch channel
ATOM channel index.
Definition: IfxGtm_PinMap.h:105
IfxGtm_TOM1_7_TOUT25_P33_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT
IfxGtm_TOM1_7_TOUT25_P33_3_OUT.
Definition: IfxGtm_PinMap.h:786
IfxGtm_TIM1_5_TIN40_P32_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN
IfxGtm_TIM1_5_TIN40_P32_4_IN.
Definition: IfxGtm_PinMap.h:502
IfxGtm_TIM0_1_TIN10_P00_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN
IfxGtm_TIM0_1_TIN10_P00_1_IN.
Definition: IfxGtm_PinMap.h:378
IfxGtm_TOM0_9_TOUT69_P20_13_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT
IfxGtm_TOM0_9_TOUT69_P20_13_OUT.
Definition: IfxGtm_PinMap.h:689
IfxGtm_ATOM0_5_TOUT41_P23_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT
IfxGtm_ATOM0_5_TOUT41_P23_0_OUT.
Definition: IfxGtm_PinMap.h:185
IfxGtm_TIM2_1_TIN35_P33_13_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN
IfxGtm_TIM2_1_TIN35_P33_13_IN.
Definition: IfxGtm_PinMap.h:542
IfxGtm_ATOM1_1_TOUT11_P00_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT
IfxGtm_ATOM1_1_TOUT11_P00_2_OUT.
Definition: IfxGtm_PinMap.h:211
IfxGtm_ATOM1_4_TOUT72_P15_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT
IfxGtm_ATOM1_4_TOUT72_P15_1_OUT.
Definition: IfxGtm_PinMap.h:245
IfxGtm_TOM1_9_TOUT1_P02_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT
IfxGtm_TOM1_9_TOUT1_P02_1_OUT.
Definition: IfxGtm_PinMap.h:797
IfxGtm_ATOM3_1_TOUT79_P15_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT
IfxGtm_ATOM3_1_TOUT79_P15_8_OUT.
Definition: IfxGtm_PinMap.h:327
IfxGtm_Clk_Out
GTM Clock Output.
Definition: IfxGtm_PinMap.h:127
IfxGtm_ATOM3_1_TOUT43_P23_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT
IfxGtm_ATOM3_1_TOUT43_P23_2_OUT.
Definition: IfxGtm_PinMap.h:325
IfxGtm_TOM1_5_TOUT91_P13_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT
IfxGtm_TOM1_5_TOUT91_P13_0_OUT.
Definition: IfxGtm_PinMap.h:773
IfxGtm_Atom_ToutMap::toutn
uint32 toutn
TOUT number.
Definition: IfxGtm_PinMap.h:107
IfxGtm_TOM1_0_TOUT94_P13_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT
IfxGtm_TOM1_0_TOUT94_P13_3_OUT.
Definition: IfxGtm_PinMap.h:701
IfxGtm_ATOM2_1_TOUT27_P33_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT
IfxGtm_ATOM2_1_TOUT27_P33_5_OUT.
Definition: IfxGtm_PinMap.h:275
IfxGtm_TIM2_3_TIN13_P00_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN
IfxGtm_TIM2_3_TIN13_P00_4_IN.
Definition: IfxGtm_PinMap.h:550
IfxGtm_TOM1_15_TOUT7_P02_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT
IfxGtm_TOM1_15_TOUT7_P02_7_OUT.
Definition: IfxGtm_PinMap.h:724
IfxGtm_ATOM1_1_TOUT86_P14_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT
IfxGtm_ATOM1_1_TOUT86_P14_6_OUT.
Definition: IfxGtm_PinMap.h:219
IfxGtm_TIM0_4_TIN57_P21_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN
IfxGtm_TIM0_4_TIN57_P21_6_IN.
Definition: IfxGtm_PinMap.h:417
IfxGtm_TOM0_11_TOUT49_P22_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT
IfxGtm_TOM0_11_TOUT49_P22_2_OUT.
Definition: IfxGtm_PinMap.h:598
IfxGtm_TIM1_3_TIN105_P10_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN
IfxGtm_TIM1_3_TIN105_P10_3_IN.
Definition: IfxGtm_PinMap.h:477
IfxGtm_ATOM3_0_TOUT87_P14_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT
IfxGtm_ATOM3_0_TOUT87_P14_7_OUT.
Definition: IfxGtm_PinMap.h:321
IfxGtm_TOM1_14_TOUT6_P02_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT
IfxGtm_TOM1_14_TOUT6_P02_6_OUT.
Definition: IfxGtm_PinMap.h:722
IfxGtm_ATOM1_4_TOUT39_P32_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT
IfxGtm_ATOM1_4_TOUT39_P32_3_OUT.
Definition: IfxGtm_PinMap.h:240
IfxGtm_TIM1_0_TIN94_P13_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN
IfxGtm_TIM1_0_TIN94_P13_3_IN.
Definition: IfxGtm_PinMap.h:453
IfxGtm_TOM1_0_TOUT85_P14_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT
IfxGtm_TOM1_0_TOUT85_P14_5_OUT.
Definition: IfxGtm_PinMap.h:698
IfxGtm_TIM0_4_TIN39_P32_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN
IfxGtm_TIM0_4_TIN39_P32_3_IN.
Definition: IfxGtm_PinMap.h:413
IfxGtm_TOM0_8_TOUT94_P13_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT
IfxGtm_TOM0_8_TOUT94_P13_3_OUT.
Definition: IfxGtm_PinMap.h:681
IfxGtm_ATOM0_4_TOUT102_P10_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT
IfxGtm_ATOM0_4_TOUT102_P10_0_OUT.
Definition: IfxGtm_PinMap.h:173
IfxGtm_TOM1_12_TOUT4_P02_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT
IfxGtm_TOM1_12_TOUT4_P02_4_OUT.
Definition: IfxGtm_PinMap.h:714
IfxGtm_TIM1_4_TIN57_P21_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN
IfxGtm_TIM1_4_TIN57_P21_6_IN.
Definition: IfxGtm_PinMap.h:496
IfxGtm_ATOM2_7_TOUT67_P20_11_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT
IfxGtm_ATOM2_7_TOUT67_P20_11_OUT.
Definition: IfxGtm_PinMap.h:312
IfxGtm_TIM2_0_TIN68_P20_12_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN
IfxGtm_TIM2_0_TIN68_P20_12_IN.
Definition: IfxGtm_PinMap.h:535
IfxGtm_TOM0_11_TOUT43_P23_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT
IfxGtm_TOM0_11_TOUT43_P23_2_OUT.
Definition: IfxGtm_PinMap.h:597
IfxGtm_TIM0_5_TIN41_P23_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN
IfxGtm_TIM0_5_TIN41_P23_0_IN.
Definition: IfxGtm_PinMap.h:423
IfxGtm_TIM1_3_TIN21_P00_12_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN
IfxGtm_TIM1_3_TIN21_P00_12_IN.
Definition: IfxGtm_PinMap.h:480
IfxGtm_ATOM0_2_TOUT104_P10_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT
IfxGtm_ATOM0_2_TOUT104_P10_2_OUT.
Definition: IfxGtm_PinMap.h:156
IfxGtm_TOM0_9_TOUT11_P00_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT
IfxGtm_TOM0_9_TOUT11_P00_2_OUT.
Definition: IfxGtm_PinMap.h:685
IfxGtm_TIM1_7_TIN64_P20_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN
IfxGtm_TIM1_7_TIN64_P20_8_IN.
Definition: IfxGtm_PinMap.h:528
IfxGtm_TOM0_9_TOUT10_P00_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT
IfxGtm_TOM0_9_TOUT10_P00_1_OUT.
Definition: IfxGtm_PinMap.h:684
IfxGtm_TIM1_7_TIN93_P13_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN
IfxGtm_TIM1_7_TIN93_P13_2_IN.
Definition: IfxGtm_PinMap.h:533
IfxGtm_TOM0_0_TOUT26_P33_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT
IfxGtm_TOM0_0_TOUT26_P33_4_OUT.
Definition: IfxGtm_PinMap.h:581
IfxGtm_ATOM1_0_TOUT76_P15_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT
IfxGtm_ATOM1_0_TOUT76_P15_5_OUT.
Definition: IfxGtm_PinMap.h:204
IfxGtm_TIM1_5_TIN110_P10_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN
IfxGtm_TIM1_5_TIN110_P10_8_IN.
Definition: IfxGtm_PinMap.h:500
IfxGtm_ATOM0_2_TOUT46_P23_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT
IfxGtm_ATOM0_2_TOUT46_P23_5_OUT.
Definition: IfxGtm_PinMap.h:161
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxGtm_TIM2_5_TIN91_P13_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN
IfxGtm_TIM2_5_TIN91_P13_0_IN.
Definition: IfxGtm_PinMap.h:565
IfxGtm_TIM0_7_TIN64_P20_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN
IfxGtm_TIM0_7_TIN64_P20_8_IN.
Definition: IfxGtm_PinMap.h:438
IfxGtm_TOM1_5_TOUT99_P11_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT
IfxGtm_TOM1_5_TOUT99_P11_10_OUT.
Definition: IfxGtm_PinMap.h:774
IfxGtm_TOM1_5_TOUT15_P00_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT
IfxGtm_TOM1_5_TOUT15_P00_6_OUT.
Definition: IfxGtm_PinMap.h:766
IfxGtm_TOM1_5_TOUT41_P23_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT
IfxGtm_TOM1_5_TOUT41_P23_0_OUT.
Definition: IfxGtm_PinMap.h:769
IfxGtm_Clk_Out::module
Ifx_GTM * module
Base address.
Definition: IfxGtm_PinMap.h:129
IfxGtm_TIM1_2_TIN2_P02_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN
IfxGtm_TIM1_2_TIN2_P02_2_IN.
Definition: IfxGtm_PinMap.h:470
IfxGtm_TIM0_5_TIN82_P14_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN
IfxGtm_TIM0_5_TIN82_P14_2_IN.
Definition: IfxGtm_PinMap.h:426
IfxGtm_ATOM2_6_TOUT36_P32_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT
IfxGtm_ATOM2_6_TOUT36_P32_0_OUT.
Definition: IfxGtm_PinMap.h:304
IfxGtm_CLK1_P32_4_OUT
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT
GTM_CLK1: GTM output.
Definition: IfxGtm_PinMap.h:362
IfxGtm_ATOM3_0_TOUT32_P33_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT
IfxGtm_ATOM3_0_TOUT32_P33_10_OUT.
Definition: IfxGtm_PinMap.h:317
IfxGtm_TOM1_3_TOUT29_P33_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT
IfxGtm_TOM1_3_TOUT29_P33_7_OUT.
Definition: IfxGtm_PinMap.h:748
IfxGtm_TOM0_2_TOUT20_P00_11_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT
IfxGtm_TOM0_2_TOUT20_P00_11_OUT.
Definition: IfxGtm_PinMap.h:636
IfxGtm_ATOM1_3_TOUT71_P15_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT
IfxGtm_ATOM1_3_TOUT71_P15_0_OUT.
Definition: IfxGtm_PinMap.h:237
IfxGtm_TOM1_10_TOUT104_P10_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT
IfxGtm_TOM1_10_TOUT104_P10_2_OUT.
Definition: IfxGtm_PinMap.h:703
IfxGtm_TOM1_11_TOUT105_P10_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT
IfxGtm_TOM1_11_TOUT105_P10_3_OUT.
Definition: IfxGtm_PinMap.h:707
IfxGtm_TIM1_1_TIN47_P22_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN
IfxGtm_TIM1_1_TIN47_P22_0_IN.
Definition: IfxGtm_PinMap.h:459
IfxGtm_TIM1_2_TIN96_P11_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN
IfxGtm_TIM1_2_TIN96_P11_3_IN.
Definition: IfxGtm_PinMap.h:476
IfxGtm_ATOM0_1_TOUT11_P00_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT
IfxGtm_ATOM0_1_TOUT11_P00_2_OUT.
Definition: IfxGtm_PinMap.h:150
IfxGtm_TIM0_1_TIN19_P00_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN
IfxGtm_TIM0_1_TIN19_P00_10_IN.
Definition: IfxGtm_PinMap.h:380
IfxGtm_TOM0_13_TOUT65_P20_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT
IfxGtm_TOM0_13_TOUT65_P20_9_OUT.
Definition: IfxGtm_PinMap.h:612
IfxGtm_TOM0_11_TOUT97_P11_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT
IfxGtm_TOM0_11_TOUT97_P11_6_OUT.
Definition: IfxGtm_PinMap.h:601
IfxGtm_ATOM1_3_TOUT56_P21_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT
IfxGtm_ATOM1_3_TOUT56_P21_5_OUT.
Definition: IfxGtm_PinMap.h:235
IfxGtm_ATOM1_0_TOUT53_P21_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT
IfxGtm_ATOM1_0_TOUT53_P21_2_OUT.
Definition: IfxGtm_PinMap.h:202
IfxGtm_TOM1_4_TOUT39_P32_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT
IfxGtm_TOM1_4_TOUT39_P32_3_OUT.
Definition: IfxGtm_PinMap.h:759
IfxGtm_ATOM0_5_TOUT40_P32_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT
IfxGtm_ATOM0_5_TOUT40_P32_4_OUT.
Definition: IfxGtm_PinMap.h:184
IfxGtm_ATOM1_4_TOUT102_P10_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT
IfxGtm_ATOM1_4_TOUT102_P10_0_OUT.
Definition: IfxGtm_PinMap.h:238
IfxGtm_PinMap_setTomTout
IFX_EXTERN void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:730
IfxGtm_ATOM3_5_TOUT35_P33_13_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT
IfxGtm_ATOM3_5_TOUT35_P33_13_OUT.
Definition: IfxGtm_PinMap.h:350
IfxGtm_TOM0_12_TOUT34_P33_12_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT
IfxGtm_TOM0_12_TOUT34_P33_12_OUT.
Definition: IfxGtm_PinMap.h:603
IfxGtm_TOM1_6_TOUT24_P33_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT
IfxGtm_TOM1_6_TOUT24_P33_2_OUT.
Definition: IfxGtm_PinMap.h:778
IfxGtm_TIM0_4_TIN81_P14_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN
IfxGtm_TIM0_4_TIN81_P14_1_IN.
Definition: IfxGtm_PinMap.h:419
IfxGtm_TOM0_14_TOUT6_P02_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT
IfxGtm_TOM0_14_TOUT6_P02_6_OUT.
Definition: IfxGtm_PinMap.h:619
IfxGtm_TOM1_5_TOUT73_P15_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT
IfxGtm_TOM1_5_TOUT73_P15_2_OUT.
Definition: IfxGtm_PinMap.h:771
IfxGtm_TIM0_4_TIN30_P33_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN
IfxGtm_TIM0_4_TIN30_P33_8_IN.
Definition: IfxGtm_PinMap.h:412
IfxGtm_ATOM3_0_TOUT94_P13_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT
IfxGtm_ATOM3_0_TOUT94_P13_3_OUT.
Definition: IfxGtm_PinMap.h:322
IfxGtm_ATOM1_7_TOUT7_P02_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT
IfxGtm_ATOM1_7_TOUT7_P02_7_OUT.
Definition: IfxGtm_PinMap.h:268
IfxGtm_ATOM0_3_TOUT105_P10_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT
IfxGtm_ATOM0_3_TOUT105_P10_3_OUT.
Definition: IfxGtm_PinMap.h:164
IfxGtm_ATOM3_6_TOUT100_P11_11_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT
IfxGtm_ATOM3_6_TOUT100_P11_11_OUT.
Definition: IfxGtm_PinMap.h:354
IfxGtm_ATOM1_2_TOUT55_P21_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT
IfxGtm_ATOM1_2_TOUT55_P21_4_OUT.
Definition: IfxGtm_PinMap.h:226
IfxGtm_TOM1_8_TOUT109_P10_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT
IfxGtm_TOM1_8_TOUT109_P10_7_OUT.
Definition: IfxGtm_PinMap.h:794
IfxGtm_TIM1_2_TIN46_P23_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN
IfxGtm_TIM1_2_TIN46_P23_5_IN.
Definition: IfxGtm_PinMap.h:472
IfxGtm_ATOM0_5_TOUT58_P21_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT
IfxGtm_ATOM0_5_TOUT58_P21_7_OUT.
Definition: IfxGtm_PinMap.h:186
IfxGtm_ATOM1_3_TOUT105_P10_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT
IfxGtm_ATOM1_3_TOUT105_P10_3_OUT.
Definition: IfxGtm_PinMap.h:229
IfxGtm_TIM0_2_TIN2_P02_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN
IfxGtm_TIM0_2_TIN2_P02_2_IN.
Definition: IfxGtm_PinMap.h:393
IfxGtm_TOM1_5_TOUT82_P14_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT
IfxGtm_TOM1_5_TOUT82_P14_2_OUT.
Definition: IfxGtm_PinMap.h:772
IfxGtm_TOM0_12_TOUT14_P00_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT
IfxGtm_TOM0_12_TOUT14_P00_5_OUT.
Definition: IfxGtm_PinMap.h:602
IfxGtm_TIM0_3_TIN51_P21_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN
IfxGtm_TIM0_3_TIN51_P21_0_IN.
Definition: IfxGtm_PinMap.h:406
IfxGtm_TOM1_2_TOUT79_P15_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT
IfxGtm_TOM1_2_TOUT79_P15_8_OUT.
Definition: IfxGtm_PinMap.h:743
IfxGtm_TOM1_11_TOUT3_P02_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT
IfxGtm_TOM1_11_TOUT3_P02_3_OUT.
Definition: IfxGtm_PinMap.h:709
IfxGtm_TOM1_6_TOUT92_P13_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT
IfxGtm_TOM1_6_TOUT92_P13_1_OUT.
Definition: IfxGtm_PinMap.h:783
IfxGtm_TIM0_3_TIN56_P21_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN
IfxGtm_TIM0_3_TIN56_P21_5_IN.
Definition: IfxGtm_PinMap.h:407
IfxGtm_ATOM2_6_TOUT92_P13_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT
IfxGtm_ATOM2_6_TOUT92_P13_1_OUT.
Definition: IfxGtm_PinMap.h:308
IfxGtm_TIM0_1_TIN86_P14_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN
IfxGtm_TIM0_1_TIN86_P14_6_IN.
Definition: IfxGtm_PinMap.h:388
IfxGtm_ATOM2_4_TOUT98_P11_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT
IfxGtm_ATOM2_4_TOUT98_P11_9_OUT.
Definition: IfxGtm_PinMap.h:296
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxGtm_TIM1_4_TIN14_P00_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN
IfxGtm_TIM1_4_TIN14_P00_5_IN.
Definition: IfxGtm_PinMap.h:490
IfxGtm_TIM1_6_TIN74_P15_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN
IfxGtm_TIM1_6_TIN74_P15_3_IN.
Definition: IfxGtm_PinMap.h:520
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_TIM0_2_TIN20_P00_11_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN
IfxGtm_TIM0_2_TIN20_P00_11_IN.
Definition: IfxGtm_PinMap.h:391
IfxGtm_TIM0_5_TIN23_P33_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN
IfxGtm_TIM0_5_TIN23_P33_1_IN.
Definition: IfxGtm_PinMap.h:421
IfxGtm_TIM0_1_TIN31_P33_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN
IfxGtm_TIM0_1_TIN31_P33_9_IN.
Definition: IfxGtm_PinMap.h:383
IfxGtm_TOM1_0_TOUT87_P14_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT
IfxGtm_TOM1_0_TOUT87_P14_7_OUT.
Definition: IfxGtm_PinMap.h:699
IfxGtm_TIM2_4_TIN61_P20_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN
IfxGtm_TIM2_4_TIN61_P20_3_IN.
Definition: IfxGtm_PinMap.h:557
IfxGtm_TIM1_2_TIN12_P00_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN
IfxGtm_TIM1_2_TIN12_P00_3_IN.
Definition: IfxGtm_PinMap.h:467
IfxGtm_ChXSel_a
Definition: IfxGtm_PinMap.h:61
IfxGtm_Atom_ToutMap::toutSel
IfxGtm_ToutSel toutSel
TOUTSEL register control code.
Definition: IfxGtm_PinMap.h:106
IfxGtm_ATOM0_0_TOUT9_P00_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT
IfxGtm_ATOM0_0_TOUT9_P00_0_OUT.
Definition: IfxGtm_PinMap.h:147
IfxGtm_TOM1_6_TOUT106_P10_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT
IfxGtm_TOM1_6_TOUT106_P10_4_OUT.
Definition: IfxGtm_PinMap.h:776
IfxGtm_ATOM0_3_TOUT60_P20_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT
IfxGtm_ATOM0_3_TOUT60_P20_1_OUT.
Definition: IfxGtm_PinMap.h:171
IfxGtm_TOM0_6_TOUT92_P13_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT
IfxGtm_TOM0_6_TOUT92_P13_1_OUT.
Definition: IfxGtm_PinMap.h:670
IfxGtm_TIM1_4_TIN4_P02_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN
IfxGtm_TIM1_4_TIN4_P02_4_IN.
Definition: IfxGtm_PinMap.h:494
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:209
IfxGtm_TOM0_2_TOUT28_P33_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT
IfxGtm_TOM0_2_TOUT28_P33_6_OUT.
Definition: IfxGtm_PinMap.h:637
IfxGtm_ToutSel_c
Definition: IfxGtm_PinMap.h:87
IfxGtm_TOM1_5_TOUT40_P32_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT
IfxGtm_TOM1_5_TOUT40_P32_4_OUT.
Definition: IfxGtm_PinMap.h:768
IfxGtm_TOM0_3_TOUT80_P14_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT
IfxGtm_TOM0_3_TOUT80_P14_0_OUT.
Definition: IfxGtm_PinMap.h:649
IfxGtm_TIM1_2_TIN28_P33_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN
IfxGtm_TIM1_2_TIN28_P33_6_IN.
Definition: IfxGtm_PinMap.h:469
IfxGtm_TOM0_3_TOUT38_P32_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT
IfxGtm_TOM0_3_TOUT38_P32_2_OUT.
Definition: IfxGtm_PinMap.h:646
IfxGtm_ATOM0_0_TOUT109_P10_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT
IfxGtm_ATOM0_0_TOUT109_P10_7_OUT.
Definition: IfxGtm_PinMap.h:142
IfxGtm_TIM1_7_TIN17_P00_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN
IfxGtm_TIM1_7_TIN17_P00_8_IN.
Definition: IfxGtm_PinMap.h:524
IfxGtm_TIM0_6_TIN42_P23_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN
IfxGtm_TIM0_6_TIN42_P23_1_IN.
Definition: IfxGtm_PinMap.h:429
IfxGtm_ATOM3_5_TOUT52_P21_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT
IfxGtm_ATOM3_5_TOUT52_P21_1_OUT.
Definition: IfxGtm_PinMap.h:351
IfxGtm_TOM1_0_TOUT53_P21_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT
IfxGtm_TOM1_0_TOUT53_P21_2_OUT.
Definition: IfxGtm_PinMap.h:694
IfxGtm_ChXSel_f
Definition: IfxGtm_PinMap.h:67
IfxGtm_TOM0_14_TOUT66_P20_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT
IfxGtm_TOM0_14_TOUT66_P20_10_OUT.
Definition: IfxGtm_PinMap.h:618
IfxGtm_Atom_ToutMap::atom
IfxGtm_Atom atom
ATOM unit index.
Definition: IfxGtm_PinMap.h:104
IfxGtm_TIM1_0_TIN109_P10_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN
IfxGtm_TIM1_0_TIN109_P10_7_IN.
Definition: IfxGtm_PinMap.h:442
IfxGtm_TOM0_2_TOUT55_P21_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT
IfxGtm_TOM0_2_TOUT55_P21_4_OUT.
Definition: IfxGtm_PinMap.h:639
IfxGtm_TOM1_4_TOUT90_P14_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT
IfxGtm_TOM1_4_TOUT90_P14_10_OUT.
Definition: IfxGtm_PinMap.h:764
IfxGtm_TIM2_3_TIN60_P20_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN
IfxGtm_TIM2_3_TIN60_P20_1_IN.
Definition: IfxGtm_PinMap.h:551
IfxGtm_ATOM3_2_TOUT44_P23_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT
IfxGtm_ATOM3_2_TOUT44_P23_3_OUT.
Definition: IfxGtm_PinMap.h:333
IfxGtm_TOM0_11_TOUT71_P15_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT
IfxGtm_TOM0_11_TOUT71_P15_0_OUT.
Definition: IfxGtm_PinMap.h:600
IfxGtm_TIM1_0_TIN26_P33_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN
IfxGtm_TIM1_0_TIN26_P33_4_IN.
Definition: IfxGtm_PinMap.h:444
IfxGtm_ATOM3_3_TOUT29_P33_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT
IfxGtm_ATOM3_3_TOUT29_P33_7_OUT.
Definition: IfxGtm_PinMap.h:339
IfxGtm_ATOM2_0_TOUT18_P00_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT
IfxGtm_ATOM2_0_TOUT18_P00_9_OUT.
Definition: IfxGtm_PinMap.h:269
IfxGtm_TOM0_9_TOUT47_P22_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT
IfxGtm_TOM0_9_TOUT47_P22_0_OUT.
Definition: IfxGtm_PinMap.h:687
IfxGtm_TIM1_6_TIN66_P20_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN
IfxGtm_TIM1_6_TIN66_P20_10_IN.
Definition: IfxGtm_PinMap.h:518
IfxGtm_TIM1_6_TIN59_P20_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN
IfxGtm_TIM1_6_TIN59_P20_0_IN.
Definition: IfxGtm_PinMap.h:517
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:252
IfxGtm_TIM0_0_TIN109_P10_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN
IfxGtm_TIM0_0_TIN109_P10_7_IN.
Definition: IfxGtm_PinMap.h:365
IfxGtm_TIM0_5_TIN40_P32_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN
IfxGtm_TIM0_5_TIN40_P32_4_IN.
Definition: IfxGtm_PinMap.h:422
IfxGtm_TOM1_3_TOUT21_P00_12_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT
IfxGtm_TOM1_3_TOUT21_P00_12_OUT.
Definition: IfxGtm_PinMap.h:747
IfxGtm_TIM1_5_TIN99_P11_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN
IfxGtm_TIM1_5_TIN99_P11_10_IN.
Definition: IfxGtm_PinMap.h:510
IfxGtm_TIM0_2_TIN79_P15_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN
IfxGtm_TIM0_2_TIN79_P15_8_IN.
Definition: IfxGtm_PinMap.h:398
IfxGtm_ATOM0_4_TOUT4_P02_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT
IfxGtm_ATOM0_4_TOUT4_P02_4_OUT.
Definition: IfxGtm_PinMap.h:176
IfxGtm_Atom_ToutMapP
IfxGtm_Atom_ToutMap * IfxGtm_Atom_ToutMapP
Pointer to IfxGtm_Atom_ToutMap.
Definition: IfxGtm_PinMap.h:113
IfxGtm_TOM0_7_TOUT84_P14_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT
IfxGtm_TOM0_7_TOUT84_P14_4_OUT.
Definition: IfxGtm_PinMap.h:674
IfxGtm_TIM0_6_TIN83_P14_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN
IfxGtm_TIM0_6_TIN83_P14_3_IN.
Definition: IfxGtm_PinMap.h:433
IfxGtm_TOM0_8_TOUT0_P02_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT
IfxGtm_TOM0_8_TOUT0_P02_0_OUT.
Definition: IfxGtm_PinMap.h:676
IfxGtm_TOM0_3_TOUT29_P33_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT
IfxGtm_TOM0_3_TOUT29_P33_7_OUT.
Definition: IfxGtm_PinMap.h:645
IfxGtm_TOM1_7_TOUT45_P23_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT
IfxGtm_TOM1_7_TOUT45_P23_4_OUT.
Definition: IfxGtm_PinMap.h:788
IfxGtm_TIM1_1_TIN78_P15_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN
IfxGtm_TIM1_1_TIN78_P15_7_IN.
Definition: IfxGtm_PinMap.h:462
IfxGtm_TIM0_1_TIN54_P21_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN
IfxGtm_TIM0_1_TIN54_P21_3_IN.
Definition: IfxGtm_PinMap.h:386
IfxGtm_TIM2_5_TIN73_P15_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN
IfxGtm_TIM2_5_TIN73_P15_2_IN.
Definition: IfxGtm_PinMap.h:564
IfxGtm_TIM0_3_TIN49_P22_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN
IfxGtm_TIM0_3_TIN49_P22_2_IN.
Definition: IfxGtm_PinMap.h:405
IfxGtm_TOM0_15_TOUT7_P02_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT
IfxGtm_TOM0_15_TOUT7_P02_7_OUT.
Definition: IfxGtm_PinMap.h:626
IfxGtm_ATOM0_3_TOUT56_P21_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT
IfxGtm_ATOM0_3_TOUT56_P21_5_OUT.
Definition: IfxGtm_PinMap.h:170
IfxGtm_TIM0_2_TIN55_P21_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN
IfxGtm_TIM0_2_TIN55_P21_4_IN.
Definition: IfxGtm_PinMap.h:397
IfxGtm_TIM2_6_TIN66_P20_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN
IfxGtm_TIM2_6_TIN66_P20_10_IN.
Definition: IfxGtm_PinMap.h:570
IfxGtm_TOM0_4_TOUT22_P33_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT
IfxGtm_TOM0_4_TOUT22_P33_0_OUT.
Definition: IfxGtm_PinMap.h:652
IfxGtm_TOM1_11_TOUT60_P20_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT
IfxGtm_TOM1_11_TOUT60_P20_1_OUT.
Definition: IfxGtm_PinMap.h:710
IfxGtm_TIM1_7_TIN25_P33_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN
IfxGtm_TIM1_7_TIN25_P33_3_IN.
Definition: IfxGtm_PinMap.h:525
IfxGtm_ChXSel_h
Definition: IfxGtm_PinMap.h:69
IfxGtm_TIM2_5_TIN52_P21_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN
IfxGtm_TIM2_5_TIN52_P21_1_IN.
Definition: IfxGtm_PinMap.h:562
IfxGtm_ATOM0_5_TOUT15_P00_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT
IfxGtm_ATOM0_5_TOUT15_P00_6_OUT.
Definition: IfxGtm_PinMap.h:182
IfxGtm_ChXSel
IfxGtm_ChXSel
CHxSEL register control code.
Definition: IfxGtm_PinMap.h:59
IfxGtm_TOM1_10_TOUT107_P10_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT
IfxGtm_TOM1_10_TOUT107_P10_5_OUT.
Definition: IfxGtm_PinMap.h:704
IfxGtm_TOM0_4_TOUT57_P21_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT
IfxGtm_TOM0_4_TOUT57_P21_6_OUT.
Definition: IfxGtm_PinMap.h:655
IfxGtm_TOM1_1_TOUT31_P33_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT
IfxGtm_TOM1_1_TOUT31_P33_9_OUT.
Definition: IfxGtm_PinMap.h:729
IfxGtm_ATOM3_1_TOUT27_P33_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT
IfxGtm_ATOM3_1_TOUT27_P33_5_OUT.
Definition: IfxGtm_PinMap.h:324
IfxGtm_TOM1_13_TOUT110_P10_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT
IfxGtm_TOM1_13_TOUT110_P10_8_OUT.
Definition: IfxGtm_PinMap.h:716
IfxGtm_TIM0_3_TIN29_P33_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN
IfxGtm_TIM0_3_TIN29_P33_7_IN.
Definition: IfxGtm_PinMap.h:402
IfxGtm_TIM1_1_TIN1_P02_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN
IfxGtm_TIM1_1_TIN1_P02_1_IN.
Definition: IfxGtm_PinMap.h:456
IfxGtm_ToutSel_e
Definition: IfxGtm_PinMap.h:89
IfxGtm_TOM0_8_TOUT48_P22_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT
IfxGtm_TOM0_8_TOUT48_P22_1_OUT.
Definition: IfxGtm_PinMap.h:677
IfxGtm_TOM0_0_TOUT77_P15_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT
IfxGtm_TOM0_0_TOUT77_P15_6_OUT.
Definition: IfxGtm_PinMap.h:585
IfxGtm_TIM1_7_TIN67_P20_11_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN
IfxGtm_TIM1_7_TIN67_P20_11_IN.
Definition: IfxGtm_PinMap.h:529
IfxGtm_TIM1_4_TIN39_P32_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN
IfxGtm_TIM1_4_TIN39_P32_3_IN.
Definition: IfxGtm_PinMap.h:493
IfxGtm_ATOM0_6_TOUT16_P00_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT
IfxGtm_ATOM0_6_TOUT16_P00_7_OUT.
Definition: IfxGtm_PinMap.h:189
IfxGtm_TOM0_14_TOUT100_P11_11_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT
IfxGtm_TOM0_14_TOUT100_P11_11_OUT.
Definition: IfxGtm_PinMap.h:615
IfxGtm_ATOM1_5_TOUT65_P20_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT
IfxGtm_ATOM1_5_TOUT65_P20_9_OUT.
Definition: IfxGtm_PinMap.h:253
IfxGtm_TIM2_7_TIN75_P15_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN
IfxGtm_TIM2_7_TIN75_P15_4_IN.
Definition: IfxGtm_PinMap.h:577
IfxGtm_TIM0_4_TIN102_P10_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN
IfxGtm_TIM0_4_TIN102_P10_0_IN.
Definition: IfxGtm_PinMap.h:410
IfxGtm_TIM0_0_TIN0_P02_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN
IfxGtm_TIM0_0_TIN0_P02_0_IN.
Definition: IfxGtm_PinMap.h:364
IfxGtm_ATOM0_0_TOUT48_P22_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT
IfxGtm_ATOM0_0_TOUT48_P22_1_OUT.
Definition: IfxGtm_PinMap.h:143
IfxGtm_ATOM1_1_TOUT10_P00_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT
IfxGtm_ATOM1_1_TOUT10_P00_1_OUT.
Definition: IfxGtm_PinMap.h:210
IfxGtm_Tim_TinMap::tim
IfxGtm_Tim tim
TIM unit index.
Definition: IfxGtm_PinMap.h:95
IfxGtm_TIM0_3_TIN3_P02_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN
IfxGtm_TIM0_3_TIN3_P02_3_IN.
Definition: IfxGtm_PinMap.h:404
IfxGtm_TOM1_1_TOUT11_P00_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT
IfxGtm_TOM1_1_TOUT11_P00_2_OUT.
Definition: IfxGtm_PinMap.h:726
IfxGtm_TOM0_3_TOUT60_P20_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT
IfxGtm_TOM0_3_TOUT60_P20_1_OUT.
Definition: IfxGtm_PinMap.h:648
IfxGtm_ATOM2_3_TOUT89_P14_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT
IfxGtm_ATOM2_3_TOUT89_P14_9_OUT.
Definition: IfxGtm_PinMap.h:288
IfxGtm_TOM1_2_TOUT28_P33_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT
IfxGtm_TOM1_2_TOUT28_P33_6_OUT.
Definition: IfxGtm_PinMap.h:738
IfxGtm_TOM1_3_TOUT71_P15_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT
IfxGtm_TOM1_3_TOUT71_P15_0_OUT.
Definition: IfxGtm_PinMap.h:752
IfxGtm_ATOM0_6_TOUT59_P20_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT
IfxGtm_ATOM0_6_TOUT59_P20_0_OUT.
Definition: IfxGtm_PinMap.h:192
IfxGtm_ATOM0_7_TOUT25_P33_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT
IfxGtm_ATOM0_7_TOUT25_P33_3_OUT.
Definition: IfxGtm_PinMap.h:195
IfxGtm_TIM1_6_TIN43_P23_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN
IfxGtm_TIM1_6_TIN43_P23_2_IN.
Definition: IfxGtm_PinMap.h:516
IfxGtm_TIM2_2_TIN96_P11_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN
IfxGtm_TIM2_2_TIN96_P11_3_IN.
Definition: IfxGtm_PinMap.h:549
IfxGtm_TOM0_13_TOUT15_P00_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT
IfxGtm_TOM0_13_TOUT15_P00_6_OUT.
Definition: IfxGtm_PinMap.h:609
IfxGtm_TOM1_1_TOUT78_P15_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT
IfxGtm_TOM1_1_TOUT78_P15_7_OUT.
Definition: IfxGtm_PinMap.h:733
IfxGtm_TOM0_1_TOUT31_P33_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT
IfxGtm_TOM0_1_TOUT31_P33_9_OUT.
Definition: IfxGtm_PinMap.h:630
IfxGtm_TOM1_1_TOUT19_P00_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT
IfxGtm_TOM1_1_TOUT19_P00_10_OUT.
Definition: IfxGtm_PinMap.h:727
IfxGtm_TOM1_13_TOUT35_P33_13_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT
IfxGtm_TOM1_13_TOUT35_P33_13_OUT.
Definition: IfxGtm_PinMap.h:717
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:283
IfxGtm_TIM2_1_TIN10_P00_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN
IfxGtm_TIM2_1_TIN10_P00_1_IN.
Definition: IfxGtm_PinMap.h:540
IfxGtm_ChXSel_o
Definition: IfxGtm_PinMap.h:78
IfxGtm_TIM0_7_TIN44_P23_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN
IfxGtm_TIM0_7_TIN44_P23_3_IN.
Definition: IfxGtm_PinMap.h:435
IfxGtm_TIM1_2_TIN79_P15_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN
IfxGtm_TIM1_2_TIN79_P15_8_IN.
Definition: IfxGtm_PinMap.h:475
IfxGtm_ATOM1_6_TOUT6_P02_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT
IfxGtm_ATOM1_6_TOUT6_P02_6_OUT.
Definition: IfxGtm_PinMap.h:261
IfxGtm_TOM1_4_TOUT22_P33_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT
IfxGtm_TOM1_4_TOUT22_P33_0_OUT.
Definition: IfxGtm_PinMap.h:757
IfxGtm_ATOM3_4_TOUT22_P33_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT
IfxGtm_ATOM3_4_TOUT22_P33_0_OUT.
Definition: IfxGtm_PinMap.h:343
IfxGtm_TOM0_4_TOUT81_P14_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT
IfxGtm_TOM0_4_TOUT81_P14_1_OUT.
Definition: IfxGtm_PinMap.h:657
IfxGtm_ATOM2_6_TOUT74_P15_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT
IfxGtm_ATOM2_6_TOUT74_P15_3_OUT.
Definition: IfxGtm_PinMap.h:307
IfxGtm_ATOM1_4_TOUT50_P22_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT
IfxGtm_ATOM1_4_TOUT50_P22_3_OUT.
Definition: IfxGtm_PinMap.h:242
IfxGtm_TOM0_4_TOUT30_P33_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT
IfxGtm_TOM0_4_TOUT30_P33_8_OUT.
Definition: IfxGtm_PinMap.h:653
IfxGtm_TIM1_4_TIN72_P15_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN
IfxGtm_TIM1_4_TIN72_P15_1_IN.
Definition: IfxGtm_PinMap.h:497
IfxGtm_TOM1_6_TOUT43_P23_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT
IfxGtm_TOM1_6_TOUT43_P23_2_OUT.
Definition: IfxGtm_PinMap.h:779
IfxGtm_TOM0_10_TOUT2_P02_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT
IfxGtm_TOM0_10_TOUT2_P02_2_OUT.
Definition: IfxGtm_PinMap.h:589
IfxGtm_ChXSel_e
Definition: IfxGtm_PinMap.h:66
IfxGtm_TOM0_3_TOUT56_P21_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT
IfxGtm_TOM0_3_TOUT56_P21_5_OUT.
Definition: IfxGtm_PinMap.h:647
IfxGtm_ATOM2_3_TOUT21_P00_12_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT
IfxGtm_ATOM2_3_TOUT21_P00_12_OUT.
Definition: IfxGtm_PinMap.h:285
IfxGtm_ATOM2_6_TOUT66_P20_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT
IfxGtm_ATOM2_6_TOUT66_P20_10_OUT.
Definition: IfxGtm_PinMap.h:306
IfxGtm_TIM0_2_TIN104_P10_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN
IfxGtm_TIM0_2_TIN104_P10_2_IN.
Definition: IfxGtm_PinMap.h:389
IfxGtm_ATOM0_4_TOUT14_P00_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT
IfxGtm_ATOM0_4_TOUT14_P00_5_OUT.
Definition: IfxGtm_PinMap.h:174
IfxGtm_ATOM0_3_TOUT3_P02_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT
IfxGtm_ATOM0_3_TOUT3_P02_3_OUT.
Definition: IfxGtm_PinMap.h:168
IfxGtm_TIM2_6_TIN100_P11_11_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN
IfxGtm_TIM2_6_TIN100_P11_11_IN.
Definition: IfxGtm_PinMap.h:567
IfxGtm_TOM1_1_TOUT54_P21_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT
IfxGtm_TOM1_1_TOUT54_P21_3_OUT.
Definition: IfxGtm_PinMap.h:731
IfxGtm_TIM0_6_TIN24_P33_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN
IfxGtm_TIM0_6_TIN24_P33_2_IN.
Definition: IfxGtm_PinMap.h:428
IfxGtm_TOM1_6_TOUT16_P00_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT
IfxGtm_TOM1_6_TOUT16_P00_7_OUT.
Definition: IfxGtm_PinMap.h:777
IfxGtm_ATOM1_1_TOUT103_P10_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT
IfxGtm_ATOM1_1_TOUT103_P10_1_OUT.
Definition: IfxGtm_PinMap.h:209
IfxGtm_ATOM1_7_TOUT45_P23_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT
IfxGtm_ATOM1_7_TOUT45_P23_4_OUT.
Definition: IfxGtm_PinMap.h:265
IfxGtm_ATOM1_0_TOUT77_P15_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT
IfxGtm_ATOM1_0_TOUT77_P15_6_OUT.
Definition: IfxGtm_PinMap.h:205
IfxGtm_ATOM3_7_TOUT93_P13_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT
IfxGtm_ATOM3_7_TOUT93_P13_2_OUT.
Definition: IfxGtm_PinMap.h:360
IfxGtm_ATOM2_3_TOUT97_P11_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT
IfxGtm_ATOM2_3_TOUT97_P11_6_OUT.
Definition: IfxGtm_PinMap.h:289
IfxGtm_ATOM1_2_TOUT107_P10_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT
IfxGtm_ATOM1_2_TOUT107_P10_5_OUT.
Definition: IfxGtm_PinMap.h:221
IfxGtm_TIM1_4_TIN81_P14_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN
IfxGtm_TIM1_4_TIN81_P14_1_IN.
Definition: IfxGtm_PinMap.h:498
IfxGtm_TOM1_10_TOUT2_P02_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT
IfxGtm_TOM1_10_TOUT2_P02_2_OUT.
Definition: IfxGtm_PinMap.h:705
IfxGtm_Atom_ToutMap::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxGtm_PinMap.h:109
IfxGtm_TIM0_1_TIN27_P33_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN
IfxGtm_TIM0_1_TIN27_P33_5_IN.
Definition: IfxGtm_PinMap.h:382
IfxGtm_TIM0_3_TIN80_P14_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN
IfxGtm_TIM0_3_TIN80_P14_0_IN.
Definition: IfxGtm_PinMap.h:409
IfxGtm_TOM0_14_TOUT36_P32_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT
IfxGtm_TOM0_14_TOUT36_P32_0_OUT.
Definition: IfxGtm_PinMap.h:617
IfxGtm_ATOM1_1_TOUT79_P15_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT
IfxGtm_ATOM1_1_TOUT79_P15_8_OUT.
Definition: IfxGtm_PinMap.h:218
IfxGtm_Tim.h
GTM basic functionality.
IfxGtm_TIM0_0_TIN32_P33_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN
IfxGtm_TIM0_0_TIN32_P33_10_IN.
Definition: IfxGtm_PinMap.h:368
IfxGtm_ATOM0_1_TOUT10_P00_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT
IfxGtm_ATOM0_1_TOUT10_P00_1_OUT.
Definition: IfxGtm_PinMap.h:149
IfxGtm_ATOM3_6_TOUT92_P13_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT
IfxGtm_ATOM3_6_TOUT92_P13_1_OUT.
Definition: IfxGtm_PinMap.h:357
IfxGtm_ATOM2_7_TOUT75_P15_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT
IfxGtm_ATOM2_7_TOUT75_P15_4_OUT.
Definition: IfxGtm_PinMap.h:313
IfxGtm_ATOM1_5_TOUT110_P10_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT
IfxGtm_ATOM1_5_TOUT110_P10_8_OUT.
Definition: IfxGtm_PinMap.h:246
IfxGtm_TOM0_10_TOUT41_P23_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT
IfxGtm_TOM0_10_TOUT41_P23_0_OUT.
Definition: IfxGtm_PinMap.h:590
IfxGtm_ChXSel_m
Definition: IfxGtm_PinMap.h:76
IfxGtm_TOM0_4_TOUT61_P20_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT
IfxGtm_TOM0_4_TOUT61_P20_3_OUT.
Definition: IfxGtm_PinMap.h:656
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_CLK0_P23_1_OUT
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT
GTM_CLK0: GTM output.
Definition: IfxGtm_PinMap.h:361
IfxGtm_TOM1_2_TOUT33_P33_11_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT
IfxGtm_TOM1_2_TOUT33_P33_11_OUT.
Definition: IfxGtm_PinMap.h:739
IfxGtm_TIM2_2_TIN36_P32_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN
IfxGtm_TIM2_2_TIN36_P32_0_IN.
Definition: IfxGtm_PinMap.h:546
IfxGtm_TIM1_1_TIN86_P14_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN
IfxGtm_TIM1_1_TIN86_P14_6_IN.
Definition: IfxGtm_PinMap.h:463
IfxGtm_ATOM1_2_TOUT70_P20_14_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT
IfxGtm_ATOM1_2_TOUT70_P20_14_OUT.
Definition: IfxGtm_PinMap.h:227
IfxGtm_ATOM0_1_TOUT103_P10_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT
IfxGtm_ATOM0_1_TOUT103_P10_1_OUT.
Definition: IfxGtm_PinMap.h:148
IfxGtm_TIM2_5_TIN99_P11_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN
IfxGtm_TIM2_5_TIN99_P11_10_IN.
Definition: IfxGtm_PinMap.h:566
IfxGtm_ChXSel_p
Definition: IfxGtm_PinMap.h:79
IfxGtm_TIM2_5_TIN65_P20_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN
IfxGtm_TIM2_5_TIN65_P20_9_IN.
Definition: IfxGtm_PinMap.h:563
IfxGtm_Tim_TinMap::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGtm_PinMap.h:97
IfxGtm_TIM2_6_TIN16_P00_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN
IfxGtm_TIM2_6_TIN16_P00_7_IN.
Definition: IfxGtm_PinMap.h:568
IfxGtm_ATOM3_4_TOUT51_P21_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT
IfxGtm_ATOM3_4_TOUT51_P21_0_OUT.
Definition: IfxGtm_PinMap.h:346
IfxGtm_ATOM0_5_TOUT5_P02_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT
IfxGtm_ATOM0_5_TOUT5_P02_5_OUT.
Definition: IfxGtm_PinMap.h:187
IfxGtm_Tim_TinMap
TIN pin mapping structure.
Definition: IfxGtm_PinMap.h:93
IfxGtm_TOM1_4_TOUT81_P14_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT
IfxGtm_TOM1_4_TOUT81_P14_1_OUT.
Definition: IfxGtm_PinMap.h:763
IfxGtm_ATOM1_3_TOUT3_P02_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT
IfxGtm_ATOM1_3_TOUT3_P02_3_OUT.
Definition: IfxGtm_PinMap.h:233
IfxGtm_TOM1_13_TOUT5_P02_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT
IfxGtm_TOM1_13_TOUT5_P02_5_OUT.
Definition: IfxGtm_PinMap.h:718
IfxGtm_ATOM2_2_TOUT70_P20_14_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT
IfxGtm_ATOM2_2_TOUT70_P20_14_OUT.
Definition: IfxGtm_PinMap.h:282
IfxGtm_TIM2_4_TIN98_P11_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN
IfxGtm_TIM2_4_TIN98_P11_9_IN.
Definition: IfxGtm_PinMap.h:560
IfxGtm_TOM1_7_TOUT75_P15_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT
IfxGtm_TOM1_7_TOUT75_P15_4_OUT.
Definition: IfxGtm_PinMap.h:790
IfxGtm_TOM0_12_TOUT44_P23_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT
IfxGtm_TOM0_12_TOUT44_P23_3_OUT.
Definition: IfxGtm_PinMap.h:604
IfxGtm_ATOM0_2_TOUT55_P21_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT
IfxGtm_ATOM0_2_TOUT55_P21_4_OUT.
Definition: IfxGtm_PinMap.h:162
IfxGtm_TIM0_4_TIN22_P33_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN
IfxGtm_TIM0_4_TIN22_P33_0_IN.
Definition: IfxGtm_PinMap.h:411
IfxGtm_TIM2_1_TIN95_P11_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN
IfxGtm_TIM2_1_TIN95_P11_2_IN.
Definition: IfxGtm_PinMap.h:544
IfxGtm_ATOM3_7_TOUT63_P20_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT
IfxGtm_ATOM3_7_TOUT63_P20_7_OUT.
Definition: IfxGtm_PinMap.h:359
IfxGtm_TOM0_7_TOUT93_P13_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT
IfxGtm_TOM0_7_TOUT93_P13_2_OUT.
Definition: IfxGtm_PinMap.h:675
IfxGtm_TOM0_13_TOUT35_P33_13_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT
IfxGtm_TOM0_13_TOUT35_P33_13_OUT.
Definition: IfxGtm_PinMap.h:610
IfxGtm_TIM1_6_TIN100_P11_11_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN
IfxGtm_TIM1_6_TIN100_P11_11_IN.
Definition: IfxGtm_PinMap.h:511
IfxGtm_TOM0_4_TOUT39_P32_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT
IfxGtm_TOM0_4_TOUT39_P32_3_OUT.
Definition: IfxGtm_PinMap.h:654
IfxGtm_ATOM0_4_TOUT39_P32_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT
IfxGtm_ATOM0_4_TOUT39_P32_3_OUT.
Definition: IfxGtm_PinMap.h:175
IfxGtm_TIM1_1_TIN54_P21_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN
IfxGtm_TIM1_1_TIN54_P21_3_IN.
Definition: IfxGtm_PinMap.h:460
IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:102
IfxGtm_TIM1_2_TIN107_P10_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN
IfxGtm_TIM1_2_TIN107_P10_5_IN.
Definition: IfxGtm_PinMap.h:466
IfxGtm_TIM2_0_TIN34_P33_12_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN
IfxGtm_TIM2_0_TIN34_P33_12_IN.
Definition: IfxGtm_PinMap.h:534
IfxGtm_ATOM1_0_TOUT68_P20_12_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT
IfxGtm_ATOM1_0_TOUT68_P20_12_OUT.
Definition: IfxGtm_PinMap.h:203
IfxGtm_ATOM3_2_TOUT83_P14_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT
IfxGtm_ATOM3_2_TOUT83_P14_3_OUT.
Definition: IfxGtm_PinMap.h:335
IfxGtm_TOM0_12_TOUT98_P11_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT
IfxGtm_TOM0_12_TOUT98_P11_9_OUT.
Definition: IfxGtm_PinMap.h:608
IfxGtm_ATOM3_0_TOUT26_P33_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT
IfxGtm_ATOM3_0_TOUT26_P33_4_OUT.
Definition: IfxGtm_PinMap.h:316
IfxGtm_TOM1_7_TOUT101_P11_12_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT
IfxGtm_TOM1_7_TOUT101_P11_12_OUT.
Definition: IfxGtm_PinMap.h:784
IfxGtm_ChXSel_b
Definition: IfxGtm_PinMap.h:62
IfxGtm_ATOM1_0_TOUT87_P14_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT
IfxGtm_ATOM1_0_TOUT87_P14_7_OUT.
Definition: IfxGtm_PinMap.h:206
IfxGtm_TIM1_2_TIN20_P00_11_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN
IfxGtm_TIM1_2_TIN20_P00_11_IN.
Definition: IfxGtm_PinMap.h:468
IfxGtm_ATOM0_1_TOUT1_P02_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT
IfxGtm_ATOM0_1_TOUT1_P02_1_OUT.
Definition: IfxGtm_PinMap.h:151
IfxGtm_TIM1_0_TIN77_P15_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN
IfxGtm_TIM1_0_TIN77_P15_6_IN.
Definition: IfxGtm_PinMap.h:450
IfxGtm_TIM1_5_TIN65_P20_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN
IfxGtm_TIM1_5_TIN65_P20_9_IN.
Definition: IfxGtm_PinMap.h:506
IfxGtm_ATOM2_0_TOUT32_P33_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT
IfxGtm_ATOM2_0_TOUT32_P33_10_OUT.
Definition: IfxGtm_PinMap.h:271
IfxGtm_TIM1_5_TIN58_P21_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN
IfxGtm_TIM1_5_TIN58_P21_7_IN.
Definition: IfxGtm_PinMap.h:504
IfxGtm_TOM0_12_TOUT72_P15_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT
IfxGtm_TOM0_12_TOUT72_P15_1_OUT.
Definition: IfxGtm_PinMap.h:607
IfxGtm_Tom_ToutMap::tom
IfxGtm_Tom tom
TOM unit index.
Definition: IfxGtm_PinMap.h:118
IfxGtm_ATOM0_4_TOUT61_P20_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT
IfxGtm_ATOM0_4_TOUT61_P20_3_OUT.
Definition: IfxGtm_PinMap.h:179
IfxGtm_TIM2_6_TIN74_P15_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN
IfxGtm_TIM2_6_TIN74_P15_3_IN.
Definition: IfxGtm_PinMap.h:571
IfxGtm_ATOM2_7_TOUT63_P20_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT
IfxGtm_ATOM2_7_TOUT63_P20_7_OUT.
Definition: IfxGtm_PinMap.h:310
IfxGtm_ATOM2_7_TOUT93_P13_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT
IfxGtm_ATOM2_7_TOUT93_P13_2_OUT.
Definition: IfxGtm_PinMap.h:314
IfxGtm_TOM1_1_TOUT10_P00_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT
IfxGtm_TOM1_1_TOUT10_P00_1_OUT.
Definition: IfxGtm_PinMap.h:725
IfxGtm_TIM1_7_TIN7_P02_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN
IfxGtm_TIM1_7_TIN7_P02_7_IN.
Definition: IfxGtm_PinMap.h:531
IfxGtm_TOM1_0_TOUT76_P15_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT
IfxGtm_TOM1_0_TOUT76_P15_5_OUT.
Definition: IfxGtm_PinMap.h:696
IfxGtm_ATOM1_6_TOUT16_P00_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT
IfxGtm_ATOM1_6_TOUT16_P00_7_OUT.
Definition: IfxGtm_PinMap.h:256
IfxGtm_ATOM3_0_TOUT77_P15_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT
IfxGtm_ATOM3_0_TOUT77_P15_6_OUT.
Definition: IfxGtm_PinMap.h:319
IfxGtm_TOM0_7_TOUT25_P33_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT
IfxGtm_TOM0_7_TOUT25_P33_3_OUT.
Definition: IfxGtm_PinMap.h:671
IfxGtm_ATOM3_1_TOUT84_P14_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT
IfxGtm_ATOM3_1_TOUT84_P14_4_OUT.
Definition: IfxGtm_PinMap.h:328
IfxGtm_TOM0_15_TOUT42_P23_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT
IfxGtm_TOM0_15_TOUT42_P23_1_OUT.
Definition: IfxGtm_PinMap.h:623
IfxGtm_ATOM3_3_TOUT21_P00_12_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT
IfxGtm_ATOM3_3_TOUT21_P00_12_OUT.
Definition: IfxGtm_PinMap.h:338
IfxGtm_ATOM0_6_TOUT24_P33_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT
IfxGtm_ATOM0_6_TOUT24_P33_2_OUT.
Definition: IfxGtm_PinMap.h:190
IfxGtm_TOM1_5_TOUT58_P21_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT
IfxGtm_TOM1_5_TOUT58_P21_7_OUT.
Definition: IfxGtm_PinMap.h:770
IfxGtm_ATOM3_1_TOUT95_P11_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT
IfxGtm_ATOM3_1_TOUT95_P11_2_OUT.
Definition: IfxGtm_PinMap.h:330
IfxGtm_ATOM2_4_TOUT30_P33_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT
IfxGtm_ATOM2_4_TOUT30_P33_8_OUT.
Definition: IfxGtm_PinMap.h:291
IfxGtm_ATOM3_3_TOUT97_P11_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT
IfxGtm_ATOM3_3_TOUT97_P11_6_OUT.
Definition: IfxGtm_PinMap.h:342
IfxGtm_TOM1_4_TOUT30_P33_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT
IfxGtm_TOM1_4_TOUT30_P33_8_OUT.
Definition: IfxGtm_PinMap.h:758
IfxGtm_TIM1_0_TIN85_P14_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN
IfxGtm_TIM1_0_TIN85_P14_5_IN.
Definition: IfxGtm_PinMap.h:451
IfxGtm_TIM2_4_TIN51_P21_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN
IfxGtm_TIM2_4_TIN51_P21_0_IN.
Definition: IfxGtm_PinMap.h:556
IfxGtm_TIM0_0_TIN9_P00_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN
IfxGtm_TIM0_0_TIN9_P00_0_IN.
Definition: IfxGtm_PinMap.h:376
IfxGtm_TOM0_2_TOUT104_P10_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT
IfxGtm_TOM0_2_TOUT104_P10_2_OUT.
Definition: IfxGtm_PinMap.h:634
IfxGtm_TOM0_2_TOUT88_P14_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT
IfxGtm_TOM0_2_TOUT88_P14_8_OUT.
Definition: IfxGtm_PinMap.h:641
IfxGtm_TIM1_2_TIN104_P10_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN
IfxGtm_TIM1_2_TIN104_P10_2_IN.
Definition: IfxGtm_PinMap.h:465
IfxGtm_ATOM0_2_TOUT12_P00_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT
IfxGtm_ATOM0_2_TOUT12_P00_3_OUT.
Definition: IfxGtm_PinMap.h:158
IfxGtm_TOM1_11_TOUT108_P10_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT
IfxGtm_TOM1_11_TOUT108_P10_6_OUT.
Definition: IfxGtm_PinMap.h:708
IfxGtm_TOM1_0_TOUT32_P33_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT
IfxGtm_TOM1_0_TOUT32_P33_10_OUT.
Definition: IfxGtm_PinMap.h:692
IfxGtm_ATOM0_3_TOUT49_P22_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT
IfxGtm_ATOM0_3_TOUT49_P22_2_OUT.
Definition: IfxGtm_PinMap.h:169
IfxGtm_TIM2_7_TIN101_P11_12_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN
IfxGtm_TIM2_7_TIN101_P11_12_IN.
Definition: IfxGtm_PinMap.h:573
IfxGtm_TOM0_5_TOUT91_P13_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT
IfxGtm_TOM0_5_TOUT91_P13_0_OUT.
Definition: IfxGtm_PinMap.h:664
IfxGtm_TIM1_5_TIN15_P00_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN
IfxGtm_TIM1_5_TIN15_P00_6_IN.
Definition: IfxGtm_PinMap.h:501
IfxGtm_TOM0_3_TOUT108_P10_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT
IfxGtm_TOM0_3_TOUT108_P10_6_OUT.
Definition: IfxGtm_PinMap.h:643
IfxGtm_TIM1_1_TIN27_P33_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN
IfxGtm_TIM1_1_TIN27_P33_5_IN.
Definition: IfxGtm_PinMap.h:457
IfxGtm_ATOM3_4_TOUT34_P33_12_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT
IfxGtm_ATOM3_4_TOUT34_P33_12_OUT.
Definition: IfxGtm_PinMap.h:345
IfxGtm_ATOM1_7_TOUT75_P15_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT
IfxGtm_ATOM1_7_TOUT75_P15_4_OUT.
Definition: IfxGtm_PinMap.h:267
IfxGtm_TIM0_0_TIN8_P02_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN
IfxGtm_TIM0_0_TIN8_P02_8_IN.
Definition: IfxGtm_PinMap.h:375
IfxGtm_ATOM3_5_TOUT91_P13_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT
IfxGtm_ATOM3_5_TOUT91_P13_0_OUT.
Definition: IfxGtm_PinMap.h:352
IfxGtm_ATOM1_5_TOUT73_P15_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT
IfxGtm_ATOM1_5_TOUT73_P15_2_OUT.
Definition: IfxGtm_PinMap.h:254
IfxGtm_ATOM1_1_TOUT54_P21_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT
IfxGtm_ATOM1_1_TOUT54_P21_3_OUT.
Definition: IfxGtm_PinMap.h:215
IfxGtm_TIM0_7_TIN63_P20_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN
IfxGtm_TIM0_7_TIN63_P20_7_IN.
Definition: IfxGtm_PinMap.h:437
IfxGtm_ATOM1_5_TOUT5_P02_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT
IfxGtm_ATOM1_5_TOUT5_P02_5_OUT.
Definition: IfxGtm_PinMap.h:252
IfxGtm_ATOM1_5_TOUT23_P33_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT
IfxGtm_ATOM1_5_TOUT23_P33_1_OUT.
Definition: IfxGtm_PinMap.h:248
IfxGtm_TIM2_2_TIN12_P00_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN
IfxGtm_TIM2_2_TIN12_P00_3_IN.
Definition: IfxGtm_PinMap.h:545
IfxGtm_ATOM3_3_TOUT82_P14_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT
IfxGtm_ATOM3_3_TOUT82_P14_2_OUT.
Definition: IfxGtm_PinMap.h:340
IfxGtm_ATOM1_7_TOUT17_P00_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT
IfxGtm_ATOM1_7_TOUT17_P00_8_OUT.
Definition: IfxGtm_PinMap.h:263
IfxGtm_TIM0_0_TIN53_P21_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN
IfxGtm_TIM0_0_TIN53_P21_2_IN.
Definition: IfxGtm_PinMap.h:371
IfxGtm_TOM0_6_TOUT24_P33_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT
IfxGtm_TOM0_6_TOUT24_P33_2_OUT.
Definition: IfxGtm_PinMap.h:666
IfxGtm_TIM1_4_TIN30_P33_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN
IfxGtm_TIM1_4_TIN30_P33_8_IN.
Definition: IfxGtm_PinMap.h:492
IfxGtm_ATOM2_4_TOUT51_P21_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT
IfxGtm_ATOM2_4_TOUT51_P21_0_OUT.
Definition: IfxGtm_PinMap.h:293
IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:116
IfxGtm_TIM1_4_TIN98_P11_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN
IfxGtm_TIM1_4_TIN98_P11_9_IN.
Definition: IfxGtm_PinMap.h:499
IfxGtm_TIM1_6_TIN42_P23_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN
IfxGtm_TIM1_6_TIN42_P23_1_IN.
Definition: IfxGtm_PinMap.h:515
IfxGtm_ATOM3_2_TOUT88_P14_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT
IfxGtm_ATOM3_2_TOUT88_P14_8_OUT.
Definition: IfxGtm_PinMap.h:336
IfxGtm_TIM0_4_TIN52_P21_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN
IfxGtm_TIM0_4_TIN52_P21_1_IN.
Definition: IfxGtm_PinMap.h:416
IfxGtm_TOM0_15_TOUT75_P15_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT
IfxGtm_TOM0_15_TOUT75_P15_4_OUT.
Definition: IfxGtm_PinMap.h:625
IfxGtm_TOM1_7_TOUT84_P14_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT
IfxGtm_TOM1_7_TOUT84_P14_4_OUT.
Definition: IfxGtm_PinMap.h:791
IfxGtm_TOM0_0_TOUT85_P14_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT
IfxGtm_TOM0_0_TOUT85_P14_5_OUT.
Definition: IfxGtm_PinMap.h:586
IfxGtm_ATOM0_1_TOUT31_P33_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT
IfxGtm_ATOM0_1_TOUT31_P33_9_OUT.
Definition: IfxGtm_PinMap.h:152
IfxGtm_TIM1_7_TIN84_P14_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN
IfxGtm_TIM1_7_TIN84_P14_4_IN.
Definition: IfxGtm_PinMap.h:532
IfxGtm_TIM0_3_TIN105_P10_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN
IfxGtm_TIM0_3_TIN105_P10_3_IN.
Definition: IfxGtm_PinMap.h:399
IfxGtm_TIM1_6_TIN6_P02_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN
IfxGtm_TIM1_6_TIN6_P02_6_IN.
Definition: IfxGtm_PinMap.h:519
IfxGtm_TOM1_1_TOUT27_P33_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT
IfxGtm_TOM1_1_TOUT27_P33_5_OUT.
Definition: IfxGtm_PinMap.h:728
IfxGtm_TIM1_2_TIN70_P20_14_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN
IfxGtm_TIM1_2_TIN70_P20_14_IN.
Definition: IfxGtm_PinMap.h:474
IfxGtm_ATOM1_4_TOUT4_P02_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT
IfxGtm_ATOM1_4_TOUT4_P02_4_OUT.
Definition: IfxGtm_PinMap.h:241
IfxGtm_TIM1_3_TIN97_P11_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN
IfxGtm_TIM1_3_TIN97_P11_6_IN.
Definition: IfxGtm_PinMap.h:488
IfxGtm_TOM1_13_TOUT65_P20_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT
IfxGtm_TOM1_13_TOUT65_P20_9_OUT.
Definition: IfxGtm_PinMap.h:719
IfxGtm_TIM1_1_TIN31_P33_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN
IfxGtm_TIM1_1_TIN31_P33_9_IN.
Definition: IfxGtm_PinMap.h:458
IfxGtm_ATOM3_4_TOUT98_P11_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT
IfxGtm_ATOM3_4_TOUT98_P11_9_OUT.
Definition: IfxGtm_PinMap.h:349
IfxGtm_TOM1_15_TOUT67_P20_11_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT
IfxGtm_TOM1_15_TOUT67_P20_11_OUT.
Definition: IfxGtm_PinMap.h:723
IfxGtm_ChXSel_d
Definition: IfxGtm_PinMap.h:64
IfxGtm_TOM0_3_TOUT89_P14_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT
IfxGtm_TOM0_3_TOUT89_P14_9_OUT.
Definition: IfxGtm_PinMap.h:650
IfxGtm_ChXSel_i
Definition: IfxGtm_PinMap.h:71
IfxGtm_TOM1_6_TOUT59_P20_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT
IfxGtm_TOM1_6_TOUT59_P20_0_OUT.
Definition: IfxGtm_PinMap.h:780
IfxGtm_ChXSel_c
Definition: IfxGtm_PinMap.h:63
IfxGtm_TOM0_6_TOUT106_P10_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT
IfxGtm_TOM0_6_TOUT106_P10_4_OUT.
Definition: IfxGtm_PinMap.h:665
IfxGtm_ATOM1_7_TOUT25_P33_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT
IfxGtm_ATOM1_7_TOUT25_P33_3_OUT.
Definition: IfxGtm_PinMap.h:264
IfxGtm_TIM1_0_TIN76_P15_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN
IfxGtm_TIM1_0_TIN76_P15_5_IN.
Definition: IfxGtm_PinMap.h:449
IfxGtm_TOM0_10_TOUT46_P23_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT
IfxGtm_TOM0_10_TOUT46_P23_5_OUT.
Definition: IfxGtm_PinMap.h:591
IfxGtm_Tom_ToutMap::channel
IfxGtm_Tom_Ch channel
TOM channel index.
Definition: IfxGtm_PinMap.h:119
IfxGtm_ToutSel_d
Definition: IfxGtm_PinMap.h:88
IfxGtm_ATOM2_7_TOUT64_P20_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT
IfxGtm_ATOM2_7_TOUT64_P20_8_OUT.
Definition: IfxGtm_PinMap.h:311
IfxGtm_ATOM3_1_TOUT86_P14_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT
IfxGtm_ATOM3_1_TOUT86_P14_6_OUT.
Definition: IfxGtm_PinMap.h:329
IfxGtm_TOM1_2_TOUT12_P00_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT
IfxGtm_TOM1_2_TOUT12_P00_3_OUT.
Definition: IfxGtm_PinMap.h:736
IfxGtm_ATOM2_5_TOUT91_P13_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT
IfxGtm_ATOM2_5_TOUT91_P13_0_OUT.
Definition: IfxGtm_PinMap.h:301
IfxGtm_ATOM2_6_TOUT100_P11_11_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT
IfxGtm_ATOM2_6_TOUT100_P11_11_OUT.
Definition: IfxGtm_PinMap.h:303
IfxGtm_TOM1_12_TOUT34_P33_12_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT
IfxGtm_TOM1_12_TOUT34_P33_12_OUT.
Definition: IfxGtm_PinMap.h:713
IfxGtm_TOM0_3_TOUT105_P10_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT
IfxGtm_TOM0_3_TOUT105_P10_3_OUT.
Definition: IfxGtm_PinMap.h:642
IfxGtm_CLK2_P11_12_OUT
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT
GTM_CLK2: GTM output.
Definition: IfxGtm_PinMap.h:363
IfxGtm_TOM1_7_TOUT17_P00_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT
IfxGtm_TOM1_7_TOUT17_P00_8_OUT.
Definition: IfxGtm_PinMap.h:785
IfxGtm_TOM0_2_TOUT79_P15_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT
IfxGtm_TOM0_2_TOUT79_P15_8_OUT.
Definition: IfxGtm_PinMap.h:640
IfxGtm_ATOM0_4_TOUT81_P14_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT
IfxGtm_ATOM0_4_TOUT81_P14_1_OUT.
Definition: IfxGtm_PinMap.h:180
IfxGtm_TOM1_1_TOUT95_P11_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT
IfxGtm_TOM1_1_TOUT95_P11_2_OUT.
Definition: IfxGtm_PinMap.h:735
IfxGtm_TIM1_2_TIN33_P33_11_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN
IfxGtm_TIM1_2_TIN33_P33_11_IN.
Definition: IfxGtm_PinMap.h:471
IfxGtm_TOM0_2_TOUT33_P33_11_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT
IfxGtm_TOM0_2_TOUT33_P33_11_OUT.
Definition: IfxGtm_PinMap.h:638
IfxGtm_TIM2_4_TIN90_P14_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN
IfxGtm_TIM2_4_TIN90_P14_10_IN.
Definition: IfxGtm_PinMap.h:559
IfxGtm_TIM0_1_TIN11_P00_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN
IfxGtm_TIM0_1_TIN11_P00_2_IN.
Definition: IfxGtm_PinMap.h:379
IfxGtm_TOM0_0_TOUT32_P33_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT
IfxGtm_TOM0_0_TOUT32_P33_10_OUT.
Definition: IfxGtm_PinMap.h:582
IfxGtm_TOM1_7_TOUT64_P20_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT
IfxGtm_TOM1_7_TOUT64_P20_8_OUT.
Definition: IfxGtm_PinMap.h:789
IfxGtm_TOM0_5_TOUT58_P21_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT
IfxGtm_TOM0_5_TOUT58_P21_7_OUT.
Definition: IfxGtm_PinMap.h:662
IfxGtm_TOM0_13_TOUT73_P15_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT
IfxGtm_TOM0_13_TOUT73_P15_2_OUT.
Definition: IfxGtm_PinMap.h:613
IfxGtm_TOM1_14_TOUT36_P32_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT
IfxGtm_TOM1_14_TOUT36_P32_0_OUT.
Definition: IfxGtm_PinMap.h:720
IfxGtm_ATOM0_7_TOUT64_P20_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT
IfxGtm_ATOM0_7_TOUT64_P20_8_OUT.
Definition: IfxGtm_PinMap.h:197
IfxGtm_ATOM1_4_TOUT57_P21_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT
IfxGtm_ATOM1_4_TOUT57_P21_6_OUT.
Definition: IfxGtm_PinMap.h:243
IfxGtm_ATOM1_7_TOUT67_P20_11_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT
IfxGtm_ATOM1_7_TOUT67_P20_11_OUT.
Definition: IfxGtm_PinMap.h:266
IfxGtm_ATOM2_2_TOUT96_P11_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT
IfxGtm_ATOM2_2_TOUT96_P11_3_OUT.
Definition: IfxGtm_PinMap.h:284
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxGtm_ATOM2_3_TOUT29_P33_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT
IfxGtm_ATOM2_3_TOUT29_P33_7_OUT.
Definition: IfxGtm_PinMap.h:286
IfxGtm_TOM0_9_TOUT1_P02_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT
IfxGtm_TOM0_9_TOUT1_P02_1_OUT.
Definition: IfxGtm_PinMap.h:686
IfxGtm_TIM2_3_TIN89_P14_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN
IfxGtm_TIM2_3_TIN89_P14_9_IN.
Definition: IfxGtm_PinMap.h:553
IfxGtm_Tim_TinMap::channel
IfxGtm_Tim_Ch channel
TIM channel index.
Definition: IfxGtm_PinMap.h:96
IfxGtm_ATOM1_0_TOUT8_P02_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT
IfxGtm_ATOM1_0_TOUT8_P02_8_OUT.
Definition: IfxGtm_PinMap.h:207
IfxGtm_ATOM1_4_TOUT14_P00_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT
IfxGtm_ATOM1_4_TOUT14_P00_5_OUT.
Definition: IfxGtm_PinMap.h:239
IfxGtm_ATOM0_5_TOUT110_P10_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT
IfxGtm_ATOM0_5_TOUT110_P10_8_OUT.
Definition: IfxGtm_PinMap.h:181
IfxGtm_ToutSel
IfxGtm_ToutSel
TOUTSEL register control code.
Definition: IfxGtm_PinMap.h:83
IfxGtm_ATOM3_1_TOUT78_P15_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT
IfxGtm_ATOM3_1_TOUT78_P15_7_OUT.
Definition: IfxGtm_PinMap.h:326
IfxGtm_ATOM3_2_TOUT28_P33_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT
IfxGtm_ATOM3_2_TOUT28_P33_6_OUT.
Definition: IfxGtm_PinMap.h:332
IfxGtm_TOM1_11_TOUT63_P20_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT
IfxGtm_TOM1_11_TOUT63_P20_7_OUT.
Definition: IfxGtm_PinMap.h:711
IfxGtm_TOM0_10_TOUT12_P00_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT
IfxGtm_TOM0_10_TOUT12_P00_3_OUT.
Definition: IfxGtm_PinMap.h:588
IfxGtm_TOM1_2_TOUT70_P20_14_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT
IfxGtm_TOM1_2_TOUT70_P20_14_OUT.
Definition: IfxGtm_PinMap.h:742
IfxGtm_TOM0_6_TOUT59_P20_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT
IfxGtm_TOM0_6_TOUT59_P20_0_OUT.
Definition: IfxGtm_PinMap.h:668
IfxGtm_TIM1_3_TIN29_P33_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN
IfxGtm_TIM1_3_TIN29_P33_7_IN.
Definition: IfxGtm_PinMap.h:481
IfxGtm_ATOM1_1_TOUT31_P33_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT
IfxGtm_ATOM1_1_TOUT31_P33_9_OUT.
Definition: IfxGtm_PinMap.h:213
IfxGtm_TOM0_0_TOUT87_P14_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT
IfxGtm_TOM0_0_TOUT87_P14_7_OUT.
Definition: IfxGtm_PinMap.h:587
IfxGtm_TIM0_0_TIN18_P00_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN
IfxGtm_TIM0_0_TIN18_P00_9_IN.
Definition: IfxGtm_PinMap.h:366
IfxGtm_ATOM2_2_TOUT20_P00_11_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT
IfxGtm_ATOM2_2_TOUT20_P00_11_OUT.
Definition: IfxGtm_PinMap.h:279
IfxGtm_TOM0_8_TOUT51_P21_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT
IfxGtm_TOM0_8_TOUT51_P21_0_OUT.
Definition: IfxGtm_PinMap.h:678
IfxGtm_TOM0_15_TOUT67_P20_11_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT
IfxGtm_TOM0_15_TOUT67_P20_11_OUT.
Definition: IfxGtm_PinMap.h:624
IfxGtm_TIM2_7_TIN93_P13_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN
IfxGtm_TIM2_7_TIN93_P13_2_IN.
Definition: IfxGtm_PinMap.h:578
IfxGtm_TOM0_1_TOUT103_P10_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT
IfxGtm_TOM0_1_TOUT103_P10_1_OUT.
Definition: IfxGtm_PinMap.h:627
IfxGtm_TOM1_0_TOUT48_P22_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT
IfxGtm_TOM1_0_TOUT48_P22_1_OUT.
Definition: IfxGtm_PinMap.h:693
IfxGtm_ATOM2_1_TOUT69_P20_13_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT
IfxGtm_ATOM2_1_TOUT69_P20_13_OUT.
Definition: IfxGtm_PinMap.h:277
IfxGtm_TIM1_2_TIN55_P21_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN
IfxGtm_TIM1_2_TIN55_P21_4_IN.
Definition: IfxGtm_PinMap.h:473
IfxGtm_TOM0_5_TOUT23_P33_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT
IfxGtm_TOM0_5_TOUT23_P33_1_OUT.
Definition: IfxGtm_PinMap.h:660
IfxGtm_ATOM1_2_TOUT80_P14_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT
IfxGtm_ATOM1_2_TOUT80_P14_0_OUT.
Definition: IfxGtm_PinMap.h:228
IfxGtm_ATOM0_1_TOUT84_P14_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT
IfxGtm_ATOM0_1_TOUT84_P14_4_OUT.
Definition: IfxGtm_PinMap.h:155
IfxGtm_TOM1_3_TOUT49_P22_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT
IfxGtm_TOM1_3_TOUT49_P22_2_OUT.
Definition: IfxGtm_PinMap.h:750
IfxGtm_ATOM0_5_TOUT23_P33_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT
IfxGtm_ATOM0_5_TOUT23_P33_1_OUT.
Definition: IfxGtm_PinMap.h:183
IfxGtm_TIM0_2_TIN28_P33_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN
IfxGtm_TIM0_2_TIN28_P33_6_IN.
Definition: IfxGtm_PinMap.h:392
IfxGtm_TIM2_6_TIN62_P20_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN
IfxGtm_TIM2_6_TIN62_P20_6_IN.
Definition: IfxGtm_PinMap.h:569
IfxGtm_TOM0_9_TOUT52_P21_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT
IfxGtm_TOM0_9_TOUT52_P21_1_OUT.
Definition: IfxGtm_PinMap.h:688
IfxGtm_TIM0_0_TIN34_P33_12_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN
IfxGtm_TIM0_0_TIN34_P33_12_IN.
Definition: IfxGtm_PinMap.h:369
IfxGtm_TIM0_2_TIN33_P33_11_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN
IfxGtm_TIM0_2_TIN33_P33_11_IN.
Definition: IfxGtm_PinMap.h:394
IfxGtm_ATOM0_3_TOUT82_P14_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT
IfxGtm_ATOM0_3_TOUT82_P14_2_OUT.
Definition: IfxGtm_PinMap.h:172
IfxGtm_TOM0_14_TOUT16_P00_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT
IfxGtm_TOM0_14_TOUT16_P00_7_OUT.
Definition: IfxGtm_PinMap.h:616
IfxGtm_ATOM3_2_TOUT96_P11_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT
IfxGtm_ATOM3_2_TOUT96_P11_3_OUT.
Definition: IfxGtm_PinMap.h:337
IfxGtm_Tom_ToutMapP
IfxGtm_Tom_ToutMap * IfxGtm_Tom_ToutMapP
Pointer to IfxGtm_Tom_ToutMap.
Definition: IfxGtm_PinMap.h:135
IfxGtm_TOM1_7_TOUT44_P23_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT
IfxGtm_TOM1_7_TOUT44_P23_3_OUT.
Definition: IfxGtm_PinMap.h:787
IfxGtm_TOM1_3_TOUT80_P14_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT
IfxGtm_TOM1_3_TOUT80_P14_0_OUT.
Definition: IfxGtm_PinMap.h:753
IfxGtm_TIM0_6_TIN43_P23_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN
IfxGtm_TIM0_6_TIN43_P23_2_IN.
Definition: IfxGtm_PinMap.h:430
IfxGtm_ATOM1_4_TOUT61_P20_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT
IfxGtm_ATOM1_4_TOUT61_P20_3_OUT.
Definition: IfxGtm_PinMap.h:244
IfxGtm_ToutSel_b
Definition: IfxGtm_PinMap.h:86
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxGtm_TIM0_5_TIN110_P10_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN
IfxGtm_TIM0_5_TIN110_P10_8_IN.
Definition: IfxGtm_PinMap.h:420
IfxGtm_ATOM1_6_TOUT24_P33_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT
IfxGtm_ATOM1_6_TOUT24_P33_2_OUT.
Definition: IfxGtm_PinMap.h:257
IfxGtm_TIM2_6_TIN92_P13_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN
IfxGtm_TIM2_6_TIN92_P13_1_IN.
Definition: IfxGtm_PinMap.h:572
IfxGtm_TOM1_14_TOUT66_P20_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT
IfxGtm_TOM1_14_TOUT66_P20_10_OUT.
Definition: IfxGtm_PinMap.h:721
IfxGtm_TOM0_8_TOUT95_P11_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT
IfxGtm_TOM0_8_TOUT95_P11_2_OUT.
Definition: IfxGtm_PinMap.h:682
IfxGtm_TIM0_5_TIN5_P02_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN
IfxGtm_TIM0_5_TIN5_P02_5_IN.
Definition: IfxGtm_PinMap.h:425
IfxGtm_TOM0_10_TOUT62_P20_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT
IfxGtm_TOM0_10_TOUT62_P20_6_OUT.
Definition: IfxGtm_PinMap.h:592
IfxGtm_TIM2_1_TIN11_P00_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN
IfxGtm_TIM2_1_TIN11_P00_2_IN.
Definition: IfxGtm_PinMap.h:541
IfxGtm_TIM1_1_TIN103_P10_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN
IfxGtm_TIM1_1_TIN103_P10_1_IN.
Definition: IfxGtm_PinMap.h:454
IfxGtm_TIM0_7_TIN45_P23_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN
IfxGtm_TIM0_7_TIN45_P23_4_IN.
Definition: IfxGtm_PinMap.h:436
IfxGtm_TOM0_15_TOUT101_P11_12_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT
IfxGtm_TOM0_15_TOUT101_P11_12_OUT.
Definition: IfxGtm_PinMap.h:621
IfxGtm_TOM0_4_TOUT102_P10_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT
IfxGtm_TOM0_4_TOUT102_P10_0_OUT.
Definition: IfxGtm_PinMap.h:651
IfxGtm_TOM1_10_TOUT62_P20_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT
IfxGtm_TOM1_10_TOUT62_P20_6_OUT.
Definition: IfxGtm_PinMap.h:706
IfxGtm_TOM1_5_TOUT23_P33_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT
IfxGtm_TOM1_5_TOUT23_P33_1_OUT.
Definition: IfxGtm_PinMap.h:767
IfxGtm_ATOM2_5_TOUT65_P20_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT
IfxGtm_ATOM2_5_TOUT65_P20_9_OUT.
Definition: IfxGtm_PinMap.h:299
IfxGtm_TIM2_4_TIN14_P00_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN
IfxGtm_TIM2_4_TIN14_P00_5_IN.
Definition: IfxGtm_PinMap.h:555
IfxGtm_TIM1_1_TIN95_P11_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN
IfxGtm_TIM1_1_TIN95_P11_2_IN.
Definition: IfxGtm_PinMap.h:464
IfxGtm_TIM0_1_TIN103_P10_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN
IfxGtm_TIM0_1_TIN103_P10_1_IN.
Definition: IfxGtm_PinMap.h:377
IfxGtm_TIM0_3_TIN38_P32_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN
IfxGtm_TIM0_3_TIN38_P32_2_IN.
Definition: IfxGtm_PinMap.h:403
IfxGtm_ATOM2_3_TOUT71_P15_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT
IfxGtm_ATOM2_3_TOUT71_P15_0_OUT.
Definition: IfxGtm_PinMap.h:287
IfxGtm_TIM1_3_TIN13_P00_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN
IfxGtm_TIM1_3_TIN13_P00_4_IN.
Definition: IfxGtm_PinMap.h:479
IfxGtm_TOM0_11_TOUT3_P02_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT
IfxGtm_TOM0_11_TOUT3_P02_3_OUT.
Definition: IfxGtm_PinMap.h:596
IfxGtm_ATOM0_3_TOUT13_P00_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT
IfxGtm_ATOM0_3_TOUT13_P00_4_OUT.
Definition: IfxGtm_PinMap.h:166
IfxGtm_ATOM1_6_TOUT74_P15_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT
IfxGtm_ATOM1_6_TOUT74_P15_3_OUT.
Definition: IfxGtm_PinMap.h:262
IfxGtm_ATOM0_1_TOUT54_P21_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT
IfxGtm_ATOM0_1_TOUT54_P21_3_OUT.
Definition: IfxGtm_PinMap.h:154
IfxGtm_TIM0_2_TIN46_P23_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN
IfxGtm_TIM0_2_TIN46_P23_5_IN.
Definition: IfxGtm_PinMap.h:396
IfxGtm_TIM0_6_TIN106_P10_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN
IfxGtm_TIM0_6_TIN106_P10_4_IN.
Definition: IfxGtm_PinMap.h:427
IfxGtm_TIM2_4_TIN72_P15_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN
IfxGtm_TIM2_4_TIN72_P15_1_IN.
Definition: IfxGtm_PinMap.h:558
IfxGtm_TIM1_4_TIN50_P22_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN
IfxGtm_TIM1_4_TIN50_P22_3_IN.
Definition: IfxGtm_PinMap.h:495
IfxGtm_TOM1_1_TOUT69_P20_13_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT
IfxGtm_TOM1_1_TOUT69_P20_13_OUT.
Definition: IfxGtm_PinMap.h:732
IfxGtm_ATOM1_2_TOUT104_P10_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT
IfxGtm_ATOM1_2_TOUT104_P10_2_OUT.
Definition: IfxGtm_PinMap.h:220
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:275
IfxGtm_TIM1_3_TIN71_P15_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN
IfxGtm_TIM1_3_TIN71_P15_0_IN.
Definition: IfxGtm_PinMap.h:486
IfxGtm_ATOM1_3_TOUT108_P10_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT
IfxGtm_ATOM1_3_TOUT108_P10_6_OUT.
Definition: IfxGtm_PinMap.h:230
IfxGtm_TOM1_3_TOUT97_P11_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT
IfxGtm_TOM1_3_TOUT97_P11_6_OUT.
Definition: IfxGtm_PinMap.h:755
IfxGtm_TIM1_6_TIN92_P13_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN
IfxGtm_TIM1_6_TIN92_P13_1_IN.
Definition: IfxGtm_PinMap.h:522
IfxGtm_ATOM0_2_TOUT83_P14_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT
IfxGtm_ATOM0_2_TOUT83_P14_3_OUT.
Definition: IfxGtm_PinMap.h:163
IfxGtm_TOM0_15_TOUT17_P00_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT
IfxGtm_TOM0_15_TOUT17_P00_8_OUT.
Definition: IfxGtm_PinMap.h:622
IfxGtm_TIM1_0_TIN48_P22_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN
IfxGtm_TIM1_0_TIN48_P22_1_IN.
Definition: IfxGtm_PinMap.h:446
IfxGtm_TIM0_3_TIN108_P10_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN
IfxGtm_TIM0_3_TIN108_P10_6_IN.
Definition: IfxGtm_PinMap.h:400
IfxGtm_TOM0_6_TOUT83_P14_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT
IfxGtm_TOM0_6_TOUT83_P14_3_OUT.
Definition: IfxGtm_PinMap.h:669
IfxGtm_ATOM3_3_TOUT89_P14_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT
IfxGtm_ATOM3_3_TOUT89_P14_9_OUT.
Definition: IfxGtm_PinMap.h:341
IfxGtm_TIM0_4_TIN61_P20_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN
IfxGtm_TIM0_4_TIN61_P20_3_IN.
Definition: IfxGtm_PinMap.h:418
IfxGtm_ATOM1_5_TOUT15_P00_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT
IfxGtm_ATOM1_5_TOUT15_P00_6_OUT.
Definition: IfxGtm_PinMap.h:247
IfxGtm_TOM0_1_TOUT86_P14_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT
IfxGtm_TOM0_1_TOUT86_P14_6_OUT.
Definition: IfxGtm_PinMap.h:633
IfxGtm_ATOM2_4_TOUT72_P15_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT
IfxGtm_ATOM2_4_TOUT72_P15_1_OUT.
Definition: IfxGtm_PinMap.h:294
IfxGtm_TIM1_0_TIN18_P00_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN
IfxGtm_TIM1_0_TIN18_P00_9_IN.
Definition: IfxGtm_PinMap.h:443
IfxGtm_TIM1_5_TIN73_P15_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN
IfxGtm_TIM1_5_TIN73_P15_2_IN.
Definition: IfxGtm_PinMap.h:507
IfxGtm_TOM1_1_TOUT86_P14_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT
IfxGtm_TOM1_1_TOUT86_P14_6_OUT.
Definition: IfxGtm_PinMap.h:734
IfxGtm_ATOM0_0_TOUT0_P02_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT
IfxGtm_ATOM0_0_TOUT0_P02_0_OUT.
Definition: IfxGtm_PinMap.h:141
IfxGtm_TOM1_3_TOUT13_P00_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT
IfxGtm_TOM1_3_TOUT13_P00_4_OUT.
Definition: IfxGtm_PinMap.h:746
IfxGtm_TOM0_14_TOUT74_P15_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT
IfxGtm_TOM0_14_TOUT74_P15_3_OUT.
Definition: IfxGtm_PinMap.h:620
IfxGtm_TIM1_4_TIN22_P33_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN
IfxGtm_TIM1_4_TIN22_P33_0_IN.
Definition: IfxGtm_PinMap.h:491
IfxGtm_TIM1_6_TIN106_P10_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN
IfxGtm_TIM1_6_TIN106_P10_4_IN.
Definition: IfxGtm_PinMap.h:512
IfxGtm_TOM1_2_TOUT88_P14_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT
IfxGtm_TOM1_2_TOUT88_P14_8_OUT.
Definition: IfxGtm_PinMap.h:744
IfxGtm_ATOM1_0_TOUT48_P22_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT
IfxGtm_ATOM1_0_TOUT48_P22_1_OUT.
Definition: IfxGtm_PinMap.h:201
IfxGtm_TIM0_7_TIN7_P02_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN
IfxGtm_TIM0_7_TIN7_P02_7_IN.
Definition: IfxGtm_PinMap.h:439
IfxGtm_ATOM2_0_TOUT68_P20_12_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT
IfxGtm_ATOM2_0_TOUT68_P20_12_OUT.
Definition: IfxGtm_PinMap.h:272
IfxGtm_ATOM1_5_TOUT58_P21_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT
IfxGtm_ATOM1_5_TOUT58_P21_7_OUT.
Definition: IfxGtm_PinMap.h:251
IfxGtm_ATOM1_6_TOUT106_P10_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT
IfxGtm_ATOM1_6_TOUT106_P10_4_OUT.
Definition: IfxGtm_PinMap.h:255
IfxGtm_TOM1_6_TOUT100_P11_11_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT
IfxGtm_TOM1_6_TOUT100_P11_11_OUT.
Definition: IfxGtm_PinMap.h:775
IfxGtm_TIM1_6_TIN83_P14_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN
IfxGtm_TIM1_6_TIN83_P14_3_IN.
Definition: IfxGtm_PinMap.h:521
IfxGtm_TIM2_5_TIN15_P00_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN
IfxGtm_TIM2_5_TIN15_P00_6_IN.
Definition: IfxGtm_PinMap.h:561
IfxGtm_TIM0_0_TIN77_P15_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN
IfxGtm_TIM0_0_TIN77_P15_6_IN.
Definition: IfxGtm_PinMap.h:372
IfxGtm_TOM1_12_TOUT61_P20_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT
IfxGtm_TOM1_12_TOUT61_P20_3_OUT.
Definition: IfxGtm_PinMap.h:715
IfxGtm_ATOM0_2_TOUT107_P10_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT
IfxGtm_ATOM0_2_TOUT107_P10_5_OUT.
Definition: IfxGtm_PinMap.h:157
IfxGtm_TIM1_1_TIN19_P00_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN
IfxGtm_TIM1_1_TIN19_P00_10_IN.
Definition: IfxGtm_PinMap.h:455
IfxGtm_TOM0_8_TOUT8_P02_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT
IfxGtm_TOM0_8_TOUT8_P02_8_OUT.
Definition: IfxGtm_PinMap.h:680
IfxGtm_TIM0_0_TIN85_P14_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN
IfxGtm_TIM0_0_TIN85_P14_5_IN.
Definition: IfxGtm_PinMap.h:373
IfxGtm_TIM2_7_TIN67_P20_11_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN
IfxGtm_TIM2_7_TIN67_P20_11_IN.
Definition: IfxGtm_PinMap.h:576
IfxGtm_ATOM1_5_TOUT41_P23_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT
IfxGtm_ATOM1_5_TOUT41_P23_0_OUT.
Definition: IfxGtm_PinMap.h:250
IfxGtm_TIM2_0_TIN76_P15_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN
IfxGtm_TIM2_0_TIN76_P15_5_IN.
Definition: IfxGtm_PinMap.h:536
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxGtm_TIM0_7_TIN25_P33_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN
IfxGtm_TIM0_7_TIN25_P33_3_IN.
Definition: IfxGtm_PinMap.h:434
IfxGtm_ATOM0_2_TOUT2_P02_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT
IfxGtm_ATOM0_2_TOUT2_P02_2_OUT.
Definition: IfxGtm_PinMap.h:159
IfxGtm_ChXSel_j
Definition: IfxGtm_PinMap.h:72
IfxGtm_ATOM2_1_TOUT95_P11_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT
IfxGtm_ATOM2_1_TOUT95_P11_2_OUT.
Definition: IfxGtm_PinMap.h:278
IfxGtm_TOM0_6_TOUT42_P23_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT
IfxGtm_TOM0_6_TOUT42_P23_1_OUT.
Definition: IfxGtm_PinMap.h:667
IfxGtm_ATOM2_4_TOUT90_P14_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT
IfxGtm_ATOM2_4_TOUT90_P14_10_OUT.
Definition: IfxGtm_PinMap.h:295
IfxGtm_ATOM0_1_TOUT47_P22_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT
IfxGtm_ATOM0_1_TOUT47_P22_0_OUT.
Definition: IfxGtm_PinMap.h:153
IfxGtm_TOM0_5_TOUT82_P14_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT
IfxGtm_TOM0_5_TOUT82_P14_2_OUT.
Definition: IfxGtm_PinMap.h:663
IfxGtm_ATOM2_5_TOUT52_P21_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT
IfxGtm_ATOM2_5_TOUT52_P21_1_OUT.
Definition: IfxGtm_PinMap.h:298
IfxGtm_TIM1_1_TIN69_P20_13_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN
IfxGtm_TIM1_1_TIN69_P20_13_IN.
Definition: IfxGtm_PinMap.h:461
IfxGtm_TOM1_4_TOUT50_P22_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT
IfxGtm_TOM1_4_TOUT50_P22_3_OUT.
Definition: IfxGtm_PinMap.h:760
IfxGtm_TOM1_4_TOUT98_P11_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT
IfxGtm_TOM1_4_TOUT98_P11_9_OUT.
Definition: IfxGtm_PinMap.h:765
IfxGtm_TOM0_5_TOUT110_P10_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT
IfxGtm_TOM0_5_TOUT110_P10_8_OUT.
Definition: IfxGtm_PinMap.h:659
IfxGtm_TIM0_0_TIN87_P14_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN
IfxGtm_TIM0_0_TIN87_P14_7_IN.
Definition: IfxGtm_PinMap.h:374
IfxGtm_TOM1_7_TOUT93_P13_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT
IfxGtm_TOM1_7_TOUT93_P13_2_OUT.
Definition: IfxGtm_PinMap.h:792
IfxGtm_ATOM1_3_TOUT38_P32_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT
IfxGtm_ATOM1_3_TOUT38_P32_2_OUT.
Definition: IfxGtm_PinMap.h:232
IfxGtm_TIM0_1_TIN1_P02_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN
IfxGtm_TIM0_1_TIN1_P02_1_IN.
Definition: IfxGtm_PinMap.h:381
IfxGtm_ATOM2_5_TOUT35_P33_13_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT
IfxGtm_ATOM2_5_TOUT35_P33_13_OUT.
Definition: IfxGtm_PinMap.h:297
IfxGtm_TIM1_0_TIN68_P20_12_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN
IfxGtm_TIM1_0_TIN68_P20_12_IN.
Definition: IfxGtm_PinMap.h:448
IfxGtm_Tim_TinMap::select
IfxGtm_ChXSel select
Input multiplexer value.
Definition: IfxGtm_PinMap.h:98
IfxGtm_TOM0_10_TOUT70_P20_14_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT
IfxGtm_TOM0_10_TOUT70_P20_14_OUT.
Definition: IfxGtm_PinMap.h:593
IfxGtm_TIM1_4_TIN102_P10_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN
IfxGtm_TIM1_4_TIN102_P10_0_IN.
Definition: IfxGtm_PinMap.h:489
IfxGtm_TOM0_13_TOUT99_P11_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT
IfxGtm_TOM0_13_TOUT99_P11_10_OUT.
Definition: IfxGtm_PinMap.h:614
IfxGtm_ATOM2_5_TOUT73_P15_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT
IfxGtm_ATOM2_5_TOUT73_P15_2_OUT.
Definition: IfxGtm_PinMap.h:300
IfxGtm_TIM1_5_TIN41_P23_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN
IfxGtm_TIM1_5_TIN41_P23_0_IN.
Definition: IfxGtm_PinMap.h:503
IfxGtm_ATOM1_1_TOUT1_P02_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT
IfxGtm_ATOM1_1_TOUT1_P02_1_OUT.
Definition: IfxGtm_PinMap.h:212
IfxGtm_TIM2_0_TIN9_P00_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN
IfxGtm_TIM2_0_TIN9_P00_0_IN.
Definition: IfxGtm_PinMap.h:539
IfxGtm_TOM0_8_TOUT68_P20_12_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT
IfxGtm_TOM0_8_TOUT68_P20_12_OUT.
Definition: IfxGtm_PinMap.h:679
IfxGtm_TOM0_13_TOUT5_P02_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT
IfxGtm_TOM0_13_TOUT5_P02_5_OUT.
Definition: IfxGtm_PinMap.h:611
IfxGtm_ChXSel_k
Definition: IfxGtm_PinMap.h:73
IfxGtm_TOM1_0_TOUT26_P33_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT
IfxGtm_TOM1_0_TOUT26_P33_4_OUT.
Definition: IfxGtm_PinMap.h:691
IfxGtm_TOM1_4_TOUT72_P15_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT
IfxGtm_TOM1_4_TOUT72_P15_1_OUT.
Definition: IfxGtm_PinMap.h:762
IfxGtm_ATOM3_4_TOUT30_P33_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT
IfxGtm_ATOM3_4_TOUT30_P33_8_OUT.
Definition: IfxGtm_PinMap.h:344
IfxGtm_ATOM3_0_TOUT85_P14_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT
IfxGtm_ATOM3_0_TOUT85_P14_5_OUT.
Definition: IfxGtm_PinMap.h:320
IfxGtm_TOM1_9_TOUT103_P10_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT
IfxGtm_TOM1_9_TOUT103_P10_1_OUT.
Definition: IfxGtm_PinMap.h:796
IfxGtm_TIM0_3_TIN60_P20_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN
IfxGtm_TIM0_3_TIN60_P20_1_IN.
Definition: IfxGtm_PinMap.h:408
IfxGtm_TOM0_5_TOUT40_P32_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT
IfxGtm_TOM0_5_TOUT40_P32_4_OUT.
Definition: IfxGtm_PinMap.h:661
IfxGtm_ATOM2_1_TOUT19_P00_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT
IfxGtm_ATOM2_1_TOUT19_P00_10_OUT.
Definition: IfxGtm_PinMap.h:274
IfxGtm_ATOM2_2_TOUT44_P23_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT
IfxGtm_ATOM2_2_TOUT44_P23_3_OUT.
Definition: IfxGtm_PinMap.h:281
IfxGtm_ATOM1_2_TOUT33_P33_11_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT
IfxGtm_ATOM1_2_TOUT33_P33_11_OUT.
Definition: IfxGtm_PinMap.h:224
IfxGtm_TOM1_0_TOUT8_P02_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT
IfxGtm_TOM1_0_TOUT8_P02_8_OUT.
Definition: IfxGtm_PinMap.h:700
IfxGtm_ATOM3_6_TOUT36_P32_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT
IfxGtm_ATOM3_6_TOUT36_P32_0_OUT.
Definition: IfxGtm_PinMap.h:355
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:261
IfxGtm_ATOM1_2_TOUT12_P00_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT
IfxGtm_ATOM1_2_TOUT12_P00_3_OUT.
Definition: IfxGtm_PinMap.h:222
IfxGtm_ATOM0_0_TOUT53_P21_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT
IfxGtm_ATOM0_0_TOUT53_P21_2_OUT.
Definition: IfxGtm_PinMap.h:144
IfxGtm_ATOM1_2_TOUT2_P02_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT
IfxGtm_ATOM1_2_TOUT2_P02_2_OUT.
Definition: IfxGtm_PinMap.h:223
IfxGtm_TOM1_8_TOUT51_P21_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT
IfxGtm_TOM1_8_TOUT51_P21_0_OUT.
Definition: IfxGtm_PinMap.h:795
IfxGtm_TOM1_8_TOUT0_P02_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT
IfxGtm_TOM1_8_TOUT0_P02_0_OUT.
Definition: IfxGtm_PinMap.h:793
IfxGtm_ATOM3_7_TOUT101_P11_12_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT
IfxGtm_ATOM3_7_TOUT101_P11_12_OUT.
Definition: IfxGtm_PinMap.h:358
IfxGtm_TIM0_2_TIN36_P32_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN
IfxGtm_TIM0_2_TIN36_P32_0_IN.
Definition: IfxGtm_PinMap.h:395
IfxGtm_TOM0_0_TOUT109_P10_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT
IfxGtm_TOM0_0_TOUT109_P10_7_OUT.
Definition: IfxGtm_PinMap.h:579
IfxGtm_ATOM2_1_TOUT43_P23_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT
IfxGtm_ATOM2_1_TOUT43_P23_2_OUT.
Definition: IfxGtm_PinMap.h:276
IfxGtm_TOM1_0_TOUT68_P20_12_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT
IfxGtm_TOM1_0_TOUT68_P20_12_OUT.
Definition: IfxGtm_PinMap.h:695
IfxGtm_TOM1_3_TOUT89_P14_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT
IfxGtm_TOM1_3_TOUT89_P14_9_OUT.
Definition: IfxGtm_PinMap.h:754
IfxGtm_TOM1_2_TOUT20_P00_11_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT
IfxGtm_TOM1_2_TOUT20_P00_11_OUT.
Definition: IfxGtm_PinMap.h:737
IfxGtm_ATOM2_2_TOUT88_P14_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT
IfxGtm_ATOM2_2_TOUT88_P14_8_OUT.
Definition: IfxGtm_PinMap.h:283
IfxGtm_ATOM1_2_TOUT46_P23_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT
IfxGtm_ATOM1_2_TOUT46_P23_5_OUT.
Definition: IfxGtm_PinMap.h:225
IfxGtm_ChXSel_n
Definition: IfxGtm_PinMap.h:77
IfxGtm_ATOM1_0_TOUT109_P10_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT
IfxGtm_ATOM1_0_TOUT109_P10_7_OUT.
Definition: IfxGtm_PinMap.h:200
IfxGtm_TIM1_3_TIN3_P02_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN
IfxGtm_TIM1_3_TIN3_P02_3_IN.
Definition: IfxGtm_PinMap.h:483
IfxGtm_TIM1_3_TIN49_P22_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN
IfxGtm_TIM1_3_TIN49_P22_2_IN.
Definition: IfxGtm_PinMap.h:484
IfxGtm_TIM2_3_TIN97_P11_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN
IfxGtm_TIM2_3_TIN97_P11_6_IN.
Definition: IfxGtm_PinMap.h:554
IfxGtm_ATOM0_4_TOUT50_P22_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT
IfxGtm_ATOM0_4_TOUT50_P22_3_OUT.
Definition: IfxGtm_PinMap.h:177
IfxGtm_TIM1_3_TIN108_P10_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN
IfxGtm_TIM1_3_TIN108_P10_6_IN.
Definition: IfxGtm_PinMap.h:478
IfxGtm_TIM0_1_TIN35_P33_13_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN
IfxGtm_TIM0_1_TIN35_P33_13_IN.
Definition: IfxGtm_PinMap.h:384
IfxGtm_ATOM1_3_TOUT49_P22_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT
IfxGtm_ATOM1_3_TOUT49_P22_2_OUT.
Definition: IfxGtm_PinMap.h:234
IfxGtm_TIM1_7_TIN75_P15_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN
IfxGtm_TIM1_7_TIN75_P15_4_IN.
Definition: IfxGtm_PinMap.h:530
IfxGtm_TIM0_1_TIN47_P22_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN
IfxGtm_TIM0_1_TIN47_P22_0_IN.
Definition: IfxGtm_PinMap.h:385
IfxGtm_TIM2_3_TIN71_P15_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN
IfxGtm_TIM2_3_TIN71_P15_0_IN.
Definition: IfxGtm_PinMap.h:552
IfxGtm_ATOM2_2_TOUT28_P33_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT
IfxGtm_ATOM2_2_TOUT28_P33_6_OUT.
Definition: IfxGtm_PinMap.h:280
IfxGtm_TOM1_4_TOUT57_P21_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT
IfxGtm_TOM1_4_TOUT57_P21_6_OUT.
Definition: IfxGtm_PinMap.h:761
IfxGtm_TOM1_2_TOUT96_P11_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT
IfxGtm_TOM1_2_TOUT96_P11_3_OUT.
Definition: IfxGtm_PinMap.h:745
IfxGtm_TOM1_2_TOUT55_P21_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT
IfxGtm_TOM1_2_TOUT55_P21_4_OUT.
Definition: IfxGtm_PinMap.h:741
IfxGtm_ATOM3_0_TOUT76_P15_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT
IfxGtm_ATOM3_0_TOUT76_P15_5_OUT.
Definition: IfxGtm_PinMap.h:318
IfxGtm_TOM1_6_TOUT74_P15_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT
IfxGtm_TOM1_6_TOUT74_P15_3_OUT.
Definition: IfxGtm_PinMap.h:781
IfxGtm_ChXSel_g
Definition: IfxGtm_PinMap.h:68
IfxGtm_TIM1_7_TIN45_P23_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN
IfxGtm_TIM1_7_TIN45_P23_4_IN.
Definition: IfxGtm_PinMap.h:527
IfxGtm_ATOM0_2_TOUT33_P33_11_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT
IfxGtm_ATOM0_2_TOUT33_P33_11_OUT.
Definition: IfxGtm_PinMap.h:160
IfxGtm_ATOM0_7_TOUT17_P00_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT
IfxGtm_ATOM0_7_TOUT17_P00_8_OUT.
Definition: IfxGtm_PinMap.h:194
IfxGtm_ATOM0_7_TOUT45_P23_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT
IfxGtm_ATOM0_7_TOUT45_P23_4_OUT.
Definition: IfxGtm_PinMap.h:196
IfxGtm_TIM2_0_TIN8_P02_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN
IfxGtm_TIM2_0_TIN8_P02_8_IN.
Definition: IfxGtm_PinMap.h:537
IfxGtm_Atom.h
GTM basic functionality.
IfxGtm_TOM0_11_TOUT63_P20_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT
IfxGtm_TOM0_11_TOUT63_P20_7_OUT.
Definition: IfxGtm_PinMap.h:599
IfxGtm_ATOM3_4_TOUT90_P14_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT
IfxGtm_ATOM3_4_TOUT90_P14_10_OUT.
Definition: IfxGtm_PinMap.h:348
IfxGtm_TIM1_0_TIN32_P33_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN
IfxGtm_TIM1_0_TIN32_P33_10_IN.
Definition: IfxGtm_PinMap.h:445
IfxGtm_TIM2_1_TIN69_P20_13_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN
IfxGtm_TIM2_1_TIN69_P20_13_IN.
Definition: IfxGtm_PinMap.h:543
IfxGtm_TIM0_7_TIN84_P14_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN
IfxGtm_TIM0_7_TIN84_P14_4_IN.
Definition: IfxGtm_PinMap.h:440
IfxGtm_ATOM0_7_TOUT7_P02_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT
IfxGtm_ATOM0_7_TOUT7_P02_7_OUT.
Definition: IfxGtm_PinMap.h:198
IfxGtm_TOM0_12_TOUT50_P22_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT
IfxGtm_TOM0_12_TOUT50_P22_3_OUT.
Definition: IfxGtm_PinMap.h:606
IfxGtm_ATOM3_1_TOUT19_P00_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT
IfxGtm_ATOM3_1_TOUT19_P00_10_OUT.
Definition: IfxGtm_PinMap.h:323
IfxGtm_TOM1_3_TOUT56_P21_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT
IfxGtm_TOM1_3_TOUT56_P21_5_OUT.
Definition: IfxGtm_PinMap.h:751
IfxGtm_ATOM0_6_TOUT106_P10_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT
IfxGtm_ATOM0_6_TOUT106_P10_4_OUT.
Definition: IfxGtm_PinMap.h:188
IfxGtm_ATOM0_3_TOUT38_P32_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT
IfxGtm_ATOM0_3_TOUT38_P32_2_OUT.
Definition: IfxGtm_PinMap.h:167
IfxGtm_TIM2_7_TIN17_P00_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN
IfxGtm_TIM2_7_TIN17_P00_8_IN.
Definition: IfxGtm_PinMap.h:574
IfxGtm_TIM0_6_TIN62_P20_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN
IfxGtm_TIM0_6_TIN62_P20_6_IN.
Definition: IfxGtm_PinMap.h:432
IfxGtm_TIM0_5_TIN58_P21_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN
IfxGtm_TIM0_5_TIN58_P21_7_IN.
Definition: IfxGtm_PinMap.h:424
IfxGtm_TIM1_6_TIN24_P33_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN
IfxGtm_TIM1_6_TIN24_P33_2_IN.
Definition: IfxGtm_PinMap.h:514
IfxGtm_TOM0_0_TOUT53_P21_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT
IfxGtm_TOM0_0_TOUT53_P21_2_OUT.
Definition: IfxGtm_PinMap.h:583
IfxGtm_ATOM3_4_TOUT81_P14_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT
IfxGtm_ATOM3_4_TOUT81_P14_1_OUT.
Definition: IfxGtm_PinMap.h:347
IfxGtm_TIM1_6_TIN16_P00_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN
IfxGtm_TIM1_6_TIN16_P00_7_IN.
Definition: IfxGtm_PinMap.h:513
IfxGtm_ATOM1_3_TOUT60_P20_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT
IfxGtm_ATOM1_3_TOUT60_P20_1_OUT.
Definition: IfxGtm_PinMap.h:236
IfxGtm_ATOM1_6_TOUT59_P20_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT
IfxGtm_ATOM1_6_TOUT59_P20_0_OUT.
Definition: IfxGtm_PinMap.h:259
IfxGtm_ATOM1_3_TOUT13_P00_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT
IfxGtm_ATOM1_3_TOUT13_P00_4_OUT.
Definition: IfxGtm_PinMap.h:231
IfxGtm_ATOM2_7_TOUT101_P11_12_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT
IfxGtm_ATOM2_7_TOUT101_P11_12_OUT.
Definition: IfxGtm_PinMap.h:309
IfxGtm_TIM0_0_TIN48_P22_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN
IfxGtm_TIM0_0_TIN48_P22_1_IN.
Definition: IfxGtm_PinMap.h:370
IfxGtm_TOM0_12_TOUT4_P02_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT
IfxGtm_TOM0_12_TOUT4_P02_4_OUT.
Definition: IfxGtm_PinMap.h:605
IfxGtm_TOM0_2_TOUT107_P10_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT
IfxGtm_TOM0_2_TOUT107_P10_5_OUT.
Definition: IfxGtm_PinMap.h:635
IfxGtm_ATOM1_5_TOUT40_P32_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT
IfxGtm_ATOM1_5_TOUT40_P32_4_OUT.
Definition: IfxGtm_PinMap.h:249
IfxGtm_TIM1_7_TIN101_P11_12_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN
IfxGtm_TIM1_7_TIN101_P11_12_IN.
Definition: IfxGtm_PinMap.h:523
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_TIM1_5_TIN82_P14_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN
IfxGtm_TIM1_5_TIN82_P14_2_IN.
Definition: IfxGtm_PinMap.h:508
IfxGtm_TOM0_8_TOUT9_P00_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT
IfxGtm_TOM0_8_TOUT9_P00_0_OUT.
Definition: IfxGtm_PinMap.h:683
IfxGtm_ATOM0_3_TOUT108_P10_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT
IfxGtm_ATOM0_3_TOUT108_P10_6_OUT.
Definition: IfxGtm_PinMap.h:165
IfxGtm_TIM0_1_TIN78_P15_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN
IfxGtm_TIM0_1_TIN78_P15_7_IN.
Definition: IfxGtm_PinMap.h:387
IfxGtm_TOM1_3_TOUT38_P32_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT
IfxGtm_TOM1_3_TOUT38_P32_2_OUT.
Definition: IfxGtm_PinMap.h:749
IfxGtm_TIM0_6_TIN59_P20_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN
IfxGtm_TIM0_6_TIN59_P20_0_IN.
Definition: IfxGtm_PinMap.h:431
IfxGtm_TIM0_4_TIN50_P22_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN
IfxGtm_TIM0_4_TIN50_P22_3_IN.
Definition: IfxGtm_PinMap.h:415
IfxGtm_ATOM3_6_TOUT62_P20_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT
IfxGtm_ATOM3_6_TOUT62_P20_6_OUT.
Definition: IfxGtm_PinMap.h:356
IfxGtm_TIM1_0_TIN53_P21_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN
IfxGtm_TIM1_0_TIN53_P21_2_IN.
Definition: IfxGtm_PinMap.h:447
IfxGtm_TIM0_0_TIN26_P33_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN
IfxGtm_TIM0_0_TIN26_P33_4_IN.
Definition: IfxGtm_PinMap.h:367
IfxGtm_TIM1_3_TIN38_P32_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN
IfxGtm_TIM1_3_TIN38_P32_2_IN.
Definition: IfxGtm_PinMap.h:482
IfxGtm_TOM0_7_TOUT45_P23_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT
IfxGtm_TOM0_7_TOUT45_P23_4_OUT.
Definition: IfxGtm_PinMap.h:672
IfxGtm_TIM0_2_TIN107_P10_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN
IfxGtm_TIM0_2_TIN107_P10_5_IN.
Definition: IfxGtm_PinMap.h:390
IfxGtm_TIM0_4_TIN4_P02_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN
IfxGtm_TIM0_4_TIN4_P02_4_IN.
Definition: IfxGtm_PinMap.h:414
IfxGtm_TOM1_12_TOUT102_P10_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT
IfxGtm_TOM1_12_TOUT102_P10_0_OUT.
Definition: IfxGtm_PinMap.h:712
IfxGtm_Tom.h
GTM basic functionality.
IfxGtm_ATOM0_6_TOUT42_P23_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT
IfxGtm_ATOM0_6_TOUT42_P23_1_OUT.
Definition: IfxGtm_PinMap.h:191
IfxGtm_TOM0_4_TOUT90_P14_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT
IfxGtm_TOM0_4_TOUT90_P14_10_OUT.
Definition: IfxGtm_PinMap.h:658
IfxGtm_TOM0_1_TOUT27_P33_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT
IfxGtm_TOM0_1_TOUT27_P33_5_OUT.
Definition: IfxGtm_PinMap.h:629
IfxGtm_TOM1_1_TOUT47_P22_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT
IfxGtm_TOM1_1_TOUT47_P22_0_OUT.
Definition: IfxGtm_PinMap.h:730
IfxGtm_ATOM3_0_TOUT18_P00_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT
IfxGtm_ATOM3_0_TOUT18_P00_9_OUT.
Definition: IfxGtm_PinMap.h:315
IfxGtm_TIM2_7_TIN63_P20_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN
IfxGtm_TIM2_7_TIN63_P20_7_IN.
Definition: IfxGtm_PinMap.h:575
IfxGtm_ATOM0_0_TOUT85_P14_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT
IfxGtm_ATOM0_0_TOUT85_P14_5_OUT.
Definition: IfxGtm_PinMap.h:145
IfxGtm_ATOM3_2_TOUT20_P00_11_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT
IfxGtm_ATOM3_2_TOUT20_P00_11_OUT.
Definition: IfxGtm_PinMap.h:331
IfxGtm_TOM1_0_TOUT18_P00_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT
IfxGtm_TOM1_0_TOUT18_P00_9_OUT.
Definition: IfxGtm_PinMap.h:690
IfxGtm_TIM0_3_TIN21_P00_12_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN
IfxGtm_TIM0_3_TIN21_P00_12_IN.
Definition: IfxGtm_PinMap.h:401
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:219
IfxGtm_ATOM0_4_TOUT57_P21_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT
IfxGtm_ATOM0_4_TOUT57_P21_6_OUT.
Definition: IfxGtm_PinMap.h:178
IfxGtm_PinMap_setAtomTout
IFX_EXTERN void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:718
IfxGtm_ATOM0_0_TOUT8_P02_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT
IfxGtm_ATOM0_0_TOUT8_P02_8_OUT.
Definition: IfxGtm_PinMap.h:146
IfxGtm_ATOM3_5_TOUT99_P11_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT
IfxGtm_ATOM3_5_TOUT99_P11_10_OUT.
Definition: IfxGtm_PinMap.h:353
IfxPort.h
PORT basic functionality.
IfxGtm_TOM1_9_TOUT52_P21_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT
IfxGtm_TOM1_9_TOUT52_P21_1_OUT.
Definition: IfxGtm_PinMap.h:798
IfxGtm_ChXSel_l
Definition: IfxGtm_PinMap.h:74
IfxGtm_ToutSel_a
Definition: IfxGtm_PinMap.h:85
IfxGtm_ATOM3_2_TOUT80_P14_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT
IfxGtm_ATOM3_2_TOUT80_P14_0_OUT.
Definition: IfxGtm_PinMap.h:334
IfxGtm_TIM2_2_TIN88_P14_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN
IfxGtm_TIM2_2_TIN88_P14_8_IN.
Definition: IfxGtm_PinMap.h:548
IfxGtm_ATOM2_0_TOUT94_P13_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT
IfxGtm_ATOM2_0_TOUT94_P13_3_OUT.
Definition: IfxGtm_PinMap.h:273


iLLD_TC26B: IfxGtm_Tbu.c Source File

  • Gtm
  • Std
IfxGtm_Tbu.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tbu.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Tbu.h"
47 #include "IfxGtm_Cmu.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 float32 IfxGtm_Tbu_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
54 {
55 float32 result = 0.0F;
56
57 if (channel == IfxGtm_Tbu_Ts_0)
58 {
59 result = IfxGtm_Cmu_getClkFrequency(gtm, (IfxGtm_Cmu_Clk)gtm->TBU.CH0_CTRL.B.CH_CLK_SRC, TRUE);
60 }
61 else if (channel == IfxGtm_Tbu_Ts_1)
62 {
63 result = IfxGtm_Cmu_getClkFrequency(gtm, (IfxGtm_Cmu_Clk)gtm->TBU.CH1_CTRL.B.CH_CLK_SRC, TRUE);
64 }
65 else if (channel == IfxGtm_Tbu_Ts_2)
66 {
67 result = IfxGtm_Cmu_getClkFrequency(gtm, (IfxGtm_Cmu_Clk)gtm->TBU.CH2_CTRL.B.CH_CLK_SRC, TRUE);
68 }
69
70 return result;
71 }
IfxGtm_Tbu_Ts_0
Definition: IfxGtm_Tbu.h:68
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:66
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Tbu_getClockFrequency
float32 IfxGtm_Tbu_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Returns the clock frequency.
Definition: IfxGtm_Tbu.c:53
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Tbu.h
GTM basic functionality.
IfxGtm_Tbu_Ts_1
Definition: IfxGtm_Tbu.h:69
IfxGtm_Cmu.h
GTM basic functionality.
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Tbu_Ts_2
Definition: IfxGtm_Tbu.h:70
IfxGtm_Cmu_getClkFrequency
float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:64


iLLD_TC26B: IfxGtm_Tbu.h Source File

  • Gtm
  • Std
IfxGtm_Tbu.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tbu.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Std_Tbu Tbu Basic Functionality
42 * \ingroup IfxLld_Gtm_Std
43 * \defgroup IfxLld_Gtm_Std_Tbu_Enumerations TBU Enumerations
44 * \ingroup IfxLld_Gtm_Std_Tbu
45 * \defgroup IfxLld_Gtm_Std_Tbu_Basic_Functions TBU Basic Functions
46 * \ingroup IfxLld_Gtm_Std_Tbu
47 */
48
49 #ifndef IFXGTM_TBU_H
50 #define IFXGTM_TBU_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "_Impl/IfxGtm_cfg.h"
57
58 /******************************************************************************/
59 /*--------------------------------Enumerations--------------------------------*/
60 /******************************************************************************/
61
62 /** \addtogroup IfxLld_Gtm_Std_Tbu_Enumerations
63 * \{ */
64 /** \brief GTM TOM TBU Time stamps
65 */
66 typedef enum
67 {
68 IfxGtm_Tbu_Ts_0,
69 IfxGtm_Tbu_Ts_1,
70 IfxGtm_Tbu_Ts_2
71 } IfxGtm_Tbu_Ts;
72
73 /** \} */
74
75 /** \addtogroup IfxLld_Gtm_Std_Tbu_Basic_Functions
76 * \{ */
77
78 /******************************************************************************/
79 /*-------------------------Inline Function Prototypes-------------------------*/
80 /******************************************************************************/
81
82 /** \brief Enables the channel
83 * \param gtm Pointer to GTM module
84 * \param channel TBU Time stamps
85 * \return None
86 */
87 IFX_INLINE void IfxGtm_Tbu_enableChannel(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel);
88
89 /** \brief Function to check if a TBU channel is enabled.
90 * Returns TRUE if the corresponding channel is enabled
91 * Returns FALSE if the corresponding channel is disabled.
92 * \param gtm Pointer to GTM SFR
93 * \param channel Channel of TBU
94 * \return TRUE: channel is enabled
95 */
96 IFX_INLINE boolean IfxGtm_Tbu_isChannelEnabled(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel);
97
98 /******************************************************************************/
99 /*-------------------------Global Function Prototypes-------------------------*/
100 /******************************************************************************/
101
102 /** \brief Returns the clock frequency
103 * \param gtm Pointer to GTM module
104 * \param channel TBU Time stamps
105 * \return frequency
106 */
107 IFX_EXTERN float32 IfxGtm_Tbu_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel);
108
109 /** \} */
110
111 /******************************************************************************/
112 /*---------------------Inline Function Implementations------------------------*/
113 /******************************************************************************/
114
115 IFX_INLINE void IfxGtm_Tbu_enableChannel(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
116 {
117 uint32 shift = channel * 2;
118
119 __ldmst_c(&gtm->TBU.CHEN.U, (3U << shift), (IfxGtm_FeatureControl_enable << shift));
120 }
121
122
123 IFX_INLINE boolean IfxGtm_Tbu_isChannelEnabled(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
124 {
125 uint32 shift = channel * 2;
126 uint32 enable_status = (gtm->TBU.CHEN.U & ((uint32)3 << shift)) >> shift;
127
128 return enable_status == (uint32)IfxGtm_FeatureControl_enabled;
129 }
130
131
132 #endif /* IFXGTM_TBU_H */
IfxGtm_Tbu_enableChannel
IFX_INLINE void IfxGtm_Tbu_enableChannel(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Enables the channel.
Definition: IfxGtm_Tbu.h:115
IfxGtm_Tbu_Ts_0
Definition: IfxGtm_Tbu.h:68
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:66
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:108
IfxGtm_Tbu_isChannelEnabled
IFX_INLINE boolean IfxGtm_Tbu_isChannelEnabled(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Function to check if a TBU channel is enabled. Returns TRUE if the corresponding channel is enabled R...
Definition: IfxGtm_Tbu.h:123
IfxGtm_FeatureControl_enabled
enabled
Definition: IfxGtm_cfg.h:247
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_Tbu_getClockFrequency
IFX_EXTERN float32 IfxGtm_Tbu_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Returns the clock frequency.
Definition: IfxGtm_Tbu.c:53
IfxGtm_FeatureControl_enable
enable
Definition: IfxGtm_cfg.h:246
IfxGtm_Tbu_Ts_1
Definition: IfxGtm_Tbu.h:69
IfxGtm_Tbu_Ts_2
Definition: IfxGtm_Tbu.h:70
IfxGtm_cfg.h
GTM on-chip implementation data.


iLLD_TC26B: IfxGtm_Tim.c Source File

  • Gtm
  • Std
IfxGtm_Tim.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tim.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Tim.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 float32 IfxGtm_Tim_Ch_getCaptureClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
53 {
54 IfxGtm_Cmu_Clk clock;
55
56 clock = IfxGtm_Tim_Ch_getCaptureClockSource(channel);
57
58 return IfxGtm_Cmu_getClkFrequency(gtm, clock, TRUE);
59 }
60
61
62 IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getCaptureClockSource(Ifx_GTM_TIM_CH *channel)
63 {
64 return (IfxGtm_Cmu_Clk)channel->CTRL.B.CLK_SEL;
65 }
66
67
68 float32 IfxGtm_Tim_Ch_getFilterClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
69 {
70 IfxGtm_Cmu_Tim_Filter_Clk filterClock;
71 IfxGtm_Cmu_Clk clock;
72
73 filterClock = IfxGtm_Tim_Ch_getFilterClockSource(channel);
74
75 switch (filterClock)
76 {
77 case IfxGtm_Cmu_Tim_Filter_Clk_0:
78 clock = IfxGtm_Cmu_Clk_0;
79 break;
80 case IfxGtm_Cmu_Tim_Filter_Clk_1:
81 clock = IfxGtm_Cmu_Clk_1;
82 break;
83 case IfxGtm_Cmu_Tim_Filter_Clk_6:
84 clock = IfxGtm_Cmu_Clk_6;
85 break;
86 case IfxGtm_Cmu_Tim_Filter_Clk_7:
87 clock = IfxGtm_Cmu_Clk_7;
88 break;
89 default:
90 clock = IfxGtm_Cmu_Clk_0; // This case never occurs
91 break;
92 }
93
94 return IfxGtm_Cmu_getClkFrequency(gtm, clock, TRUE);
95 }
96
97
98 IfxGtm_Cmu_Tim_Filter_Clk IfxGtm_Tim_Ch_getFilterClockSource(Ifx_GTM_TIM_CH *channel)
99 {
100 return (IfxGtm_Cmu_Tim_Filter_Clk)channel->CTRL.B.FLT_CNT_FRQ;
101 }
102
103
104 float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
105 {
106 IfxGtm_Cmu_Clk clock;
107
108 clock = IfxGtm_Tim_Ch_getTimeoutClockSource(channel);
109
110 return IfxGtm_Cmu_getClkFrequency(gtm, clock, TRUE);
111 }
112
113
114 IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getTimeoutClockSource(Ifx_GTM_TIM_CH *channel)
115 {
116 return (IfxGtm_Cmu_Clk)channel->TDUV.B.TCS;
117 }
118
119
120 void IfxGtm_Tim_Ch_setChannelNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
121 {
122 Ifx_GTM_TIM_CH_IRQ_EN en;
123 en.U = channel->IRQ_EN.U;
124
125 en.B.NEWVAL_IRQ_EN = irqOnNewVal ? 1 : 0;
126 en.B.CNTOFL_IRQ_EN = irqOnCntOverflow ? 1 : 0;
127 en.B.ECNTOFL_IRQ_EN = irqOnEcntOverflow ? 1 : 0;
128 en.B.GPROFL_IRQ_EN = irqOnDatalost ? 1 : 0;
129 channel->IRQ_EN.U = en.U;
130 }
131
132
133 void IfxGtm_Tim_Ch_setClockSource(Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
134 {
135 channel->CTRL.B.CLK_SEL = clock;
136 }
137
138
139 void IfxGtm_Tim_Ch_setFilterNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
140 {
141 Ifx_GTM_TIM_CH_IRQ_EN en;
142 en.U = channel->IRQ_EN.U;
143
144 en.B.GLITCHDET_IRQ_EN = irqOnGlitch ? 1 : 0;
145
146 channel->IRQ_EN.U = en.U;
147 }
148
149
150 void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
151 {
152 Ifx_GTM_TIM_CH_IRQ_EN en;
153 en.U = channel->IRQ_EN.U;
154
155 /* Disable all interrupts of the interrupt set to change mode */
156 channel->IRQ_EN.U = 0;
157 channel->IRQ_MODE.B.IRQ_MODE = mode;
158 channel->IRQ_EN.U = en.U; /* Set the values back */
159 }
160
161
162 void IfxGtm_Tim_Ch_setTimeoutNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
163 {
164 Ifx_GTM_TIM_CH_IRQ_EN en;
165 en.U = channel->IRQ_EN.U;
166
167 en.B.TODET_IRQ_EN = irqOnTimeout ? 1 : 0;
168
169 channel->IRQ_EN.U = en.U;
170 }
IfxGtm_Tim_Ch_setTimeoutNotification
void IfxGtm_Tim_Ch_setTimeoutNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification.
Definition: IfxGtm_Tim.c:162
IfxGtm_Cmu_Tim_Filter_Clk_6
FLT_CNT counts with CMU_CLK6.
Definition: IfxGtm_Cmu.h:98
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Tim_Ch_getFilterClockFrequency
float32 IfxGtm_Tim_Ch_getFilterClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency.
Definition: IfxGtm_Tim.c:68
IfxGtm_Tim_Ch_getCaptureClockFrequency
float32 IfxGtm_Tim_Ch_getCaptureClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency.
Definition: IfxGtm_Tim.c:52
IfxGtm_Cmu_Tim_Filter_Clk_1
FLT_CNT counts with CMU_CLK1.
Definition: IfxGtm_Cmu.h:97
IfxGtm_Cmu_Clk_0
Definition: IfxGtm_Cmu.h:66
IfxGtm_Tim.h
GTM basic functionality.
IfxGtm_Cmu_Tim_Filter_Clk
IfxGtm_Cmu_Tim_Filter_Clk
Tim Filter counter frequency select.
Definition: IfxGtm_Cmu.h:94
IfxGtm_Cmu_Clk_6
Definition: IfxGtm_Cmu.h:72
IfxGtm_Tim_Ch_setFilterNotification
void IfxGtm_Tim_Ch_setFilterNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification.
Definition: IfxGtm_Tim.c:139
IfxGtm_Tim_Ch_setChannelNotification
void IfxGtm_Tim_Ch_setChannelNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification.
Definition: IfxGtm_Tim.c:120
IfxGtm_Cmu_Tim_Filter_Clk_7
FLT_CNT counts with CMU_CLK7.
Definition: IfxGtm_Cmu.h:99
IfxGtm_Tim_Ch_setNotificationMode
void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode.
Definition: IfxGtm_Tim.c:150
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Tim_Ch_getTimeoutClockFrequency
float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency.
Definition: IfxGtm_Tim.c:104
IfxGtm_Tim_Ch_getTimeoutClockSource
IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getTimeoutClockSource(Ifx_GTM_TIM_CH *channel)
Returns the Timeout clock source selected.
Definition: IfxGtm_Tim.c:114
IfxGtm_Tim_Ch_setClockSource
void IfxGtm_Tim_Ch_setClockSource(Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source.
Definition: IfxGtm_Tim.c:133
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Tim_Ch_getCaptureClockSource
IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getCaptureClockSource(Ifx_GTM_TIM_CH *channel)
Returns the capture clock source selected.
Definition: IfxGtm_Tim.c:62
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Cmu_Clk_1
Definition: IfxGtm_Cmu.h:67
IfxGtm_Cmu_Tim_Filter_Clk_0
FLT_CNT counts with CMU_CLK0.
Definition: IfxGtm_Cmu.h:96
IfxGtm_Cmu_getClkFrequency
float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:64
IfxGtm_Tim_Ch_getFilterClockSource
IfxGtm_Cmu_Tim_Filter_Clk IfxGtm_Tim_Ch_getFilterClockSource(Ifx_GTM_TIM_CH *channel)
Returns the Filter clock source selected.
Definition: IfxGtm_Tim.c:98
IfxGtm_Cmu_Clk_7
Definition: IfxGtm_Cmu.h:73


iLLD_TC26B: IfxGtm_Tim.h Source File

  • Gtm
  • Std
IfxGtm_Tim.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tim.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 *
43 * \defgroup IfxLld_Gtm_Std_Tim Tim Basic Functionality
44 * \ingroup IfxLld_Gtm_Std
45 * \defgroup IfxLld_Gtm_Std_Tim_Enumerations TIM Enumerations
46 * \ingroup IfxLld_Gtm_Std_Tim
47 * \defgroup IfxLld_Gtm_Std_Tim_Channel_Functions TIM Channel Functions
48 * \ingroup IfxLld_Gtm_Std_Tim
49 */
50
51 #ifndef IFXGTM_TIM_H
52 #define IFXGTM_TIM_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 #include "_Impl/IfxGtm_cfg.h"
59 #include "Src/Std/IfxSrc.h"
60 #include "IfxGtm.h"
61 #include "IfxGtm_Cmu.h"
62 #include "IfxGtm_bf.h"
63
64 /******************************************************************************/
65 /*--------------------------------Enumerations--------------------------------*/
66 /******************************************************************************/
67
68 /** \addtogroup IfxLld_Gtm_Std_Tim_Enumerations
69 * \{ */
70 typedef enum
71 {
72 IfxGtm_Tim_CntsSel_cntReg = 0,
73 IfxGtm_Tim_CntsSel_tbuTs0
74 } IfxGtm_Tim_CntsSel;
75
76 /** \brief Enum for Filter counter
77 */
78 typedef enum
79 {
80 IfxGtm_Tim_FilterCounter_upDown = 0,
81 IfxGtm_Tim_FilterCounter_hold
82 } IfxGtm_Tim_FilterCounter;
83
84 /** \brief Enum for Filter mode
85 */
86 typedef enum
87 {
88 IfxGtm_Tim_FilterMode_immediateEdgePropagation = 0, /**< \brief Immediate edge Propagation mode */
89 IfxGtm_Tim_FilterMode_individualDeglitchTime /**< \brief Individual deglitch mode */
90 } IfxGtm_Tim_FilterMode;
91
92 typedef enum
93 {
94 IfxGtm_Tim_GprSel_tbuTs0 = 0,
95 IfxGtm_Tim_GprSel_tbuTs1,
96 IfxGtm_Tim_GprSel_tbuTs2,
97 IfxGtm_Tim_GprSel_cnts
98 } IfxGtm_Tim_GprSel;
99
100 typedef enum
101 {
102 IfxGtm_Tim_Input_currentChannel = 0,
103 IfxGtm_Tim_Input_adjacentChannel
104 } IfxGtm_Tim_Input;
105
106 typedef enum
107 {
108 IfxGtm_Tim_Mode_pwmMeasurement = 0, /**< \brief TPWM */
109 IfxGtm_Tim_Mode_pulseIntegration, /**< \brief TPIM */
110 IfxGtm_Tim_Mode_inputEvent, /**< \brief TIEM */
111 IfxGtm_Tim_Mode_inputPrescaler, /**< \brief TIPM */
112 IfxGtm_Tim_Mode_bitCompression /**< \brief TBCM */
113 } IfxGtm_Tim_Mode;
114
115 /** \brief Enum for Timeout control
116 */
117 typedef enum
118 {
119 IfxGtm_Tim_Timeout_disabled, /**< \brief Timeout feature disabled */
120 IfxGtm_Tim_Timeout_risingEdge, /**< \brief Timeout feature enabled for rising edge only */
121 IfxGtm_Tim_Timeout_fallingEdge, /**< \brief Timeout feature enabled for falling edge only */
122 IfxGtm_Tim_Timeout_bothEdge /**< \brief Timeout feature enabled for both edges */
123 } IfxGtm_Tim_Timeout;
124
125 /** \} */
126
127 /** \addtogroup IfxLld_Gtm_Std_Tim_Channel_Functions
128 * \{ */
129
130 /******************************************************************************/
131 /*-------------------------Inline Function Prototypes-------------------------*/
132 /******************************************************************************/
133
134 /** \brief Clears the counter overflow flag
135 * \param channel TIM channel pointer
136 * \return None
137 */
138 IFX_INLINE void IfxGtm_Tim_Ch_clearCntOverflowEvent(Ifx_GTM_TIM_CH *channel);
139
140 /** \brief Clears the data lost flag
141 * \param channel TIM channel pointer
142 * \return None
143 */
144 IFX_INLINE void IfxGtm_Tim_Ch_clearDataLostEvent(Ifx_GTM_TIM_CH *channel);
145
146 /** \brief Clears the event counter overflow flag
147 * \param channel TIM channel pointer
148 * \return None
149 */
150 IFX_INLINE void IfxGtm_Tim_Ch_clearEcntOverflowEvent(Ifx_GTM_TIM_CH *channel);
151
152 /** \brief Clears the glitch flag
153 * \param channel TIM channel pointer
154 * \return None
155 */
156 IFX_INLINE void IfxGtm_Tim_Ch_clearGlitchEvent(Ifx_GTM_TIM_CH *channel);
157
158 /** \brief Clears the new value flag
159 * \param channel TIM channel pointer
160 * \return None
161 */
162 IFX_INLINE void IfxGtm_Tim_Ch_clearNewValueEvent(Ifx_GTM_TIM_CH *channel);
163
164 /** \brief Returns a pointer to the TIM channel SRC
165 * \param gtm Pointer to GTM module
166 * \param tim Specifies the tim module no
167 * \param channel Channel index
168 * \return Pointer to the TIM channel SRC
169 */
170 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGtm_Tim_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel);
171
172 /** \brief Test the counter overflow flag
173 * \param channel TIM channel pointer
174 * \return TRUE if the flag is set, else FALSE
175 */
176 IFX_INLINE boolean IfxGtm_Tim_Ch_isCntOverflowEvent(Ifx_GTM_TIM_CH *channel);
177
178 /** \brief Test the data lost flag
179 * \param channel TIM channel pointer
180 * \return TRUE if the flag is set, else FALSE
181 */
182 IFX_INLINE boolean IfxGtm_Tim_Ch_isDataLostEvent(Ifx_GTM_TIM_CH *channel);
183
184 /** \brief Test the event counter overflow flag
185 * \param channel TIM channel pointer
186 * \return TRUE if the flag is set, else FALSE
187 */
188 IFX_INLINE boolean IfxGtm_Tim_Ch_isEcntOverflowEvent(Ifx_GTM_TIM_CH *channel);
189
190 /** \brief Test the glitch flag
191 * \param channel TIM channel pointer
192 * \return TRUE if the flag is set, else FALSE
193 */
194 IFX_INLINE boolean IfxGtm_Tim_Ch_isGlitchEvent(Ifx_GTM_TIM_CH *channel);
195
196 /** \brief Test the new value flag
197 * \param channel TIM channel pointer
198 * \return TRUE if the flag is set, else FALSE
199 */
200 IFX_INLINE boolean IfxGtm_Tim_Ch_isNewValueEvent(Ifx_GTM_TIM_CH *channel);
201
202 /** \brief Returns the pointer to the TIM channel
203 * \param tim Pointer to Tim base
204 * \param channel TIM channel
205 * \return Pointer to TIM channel base
206 */
207 IFX_INLINE Ifx_GTM_TIM_CH *IfxGtm_Tim_getChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel);
208
209 /** \brief Reset the specified TIM channel
210 * \param tim Pointer to GTM TIM instance
211 * \param channel Channel index
212 * \return None
213 */
214 IFX_INLINE void IfxGtm_Tim_Ch_resetChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel);
215
216 /******************************************************************************/
217 /*-------------------------Global Function Prototypes-------------------------*/
218 /******************************************************************************/
219
220 /** \brief Returns the Capture Clock Frequency
221 * \param gtm Pointer to GTM module
222 * \param channel Pointer to TIM channel base
223 * \return Capture clock frequency
224 */
225 IFX_EXTERN float32 IfxGtm_Tim_Ch_getCaptureClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel);
226
227 /** \brief Returns the capture clock source selected
228 * \param channel TIM channel pointer
229 * \return capture clock source
230 */
231 IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getCaptureClockSource(Ifx_GTM_TIM_CH *channel);
232
233 /** \brief Returns the Filter Clock Frequency
234 * \param gtm Pointer to GTM module
235 * \param channel Pointer to TIM channel base
236 * \return Filter clock frequency
237 */
238 IFX_EXTERN float32 IfxGtm_Tim_Ch_getFilterClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel);
239
240 /** \brief Returns the Filter clock source selected
241 * \param channel TIM channel pointer
242 * \return Filter clock source
243 */
244 IFX_EXTERN IfxGtm_Cmu_Tim_Filter_Clk IfxGtm_Tim_Ch_getFilterClockSource(Ifx_GTM_TIM_CH *channel);
245
246 /** \brief Returns the Timeout Clock Frequency
247 * \param gtm Pointer to GTM module
248 * \param channel Pointer to TIM channel base
249 * \return Timeout clock frequency
250 */
251 IFX_EXTERN float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel);
252
253 /** \brief Returns the Timeout clock source selected
254 * \param channel TIM channel pointer
255 * \return Timeout clock source
256 */
257 IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getTimeoutClockSource(Ifx_GTM_TIM_CH *channel);
258
259 /** \brief Set the channel notification
260 * \param channel TIM channel pointer
261 * \param irqOnNewVal If TRUE, the interrupt on new value is enabled
262 * \param irqOnCntOverflow If TRUE, the interrupt on CNT overflow is enabled
263 * \param irqOnEcntOverflow If TRUE, the interrupt on ECNT overflow is enabled
264 * \param irqOnDatalost If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled
265 * \return None
266 */
267 IFX_EXTERN void IfxGtm_Tim_Ch_setChannelNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost);
268
269 /** \brief Set the channel clock source
270 * \param channel TIM channel pointer
271 * \param clock Selected clock
272 * \return None
273 */
274 IFX_EXTERN void IfxGtm_Tim_Ch_setClockSource(Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock);
275
276 /** \brief Set the filter notification
277 * \param channel TIM channel pointer
278 * \param irqOnGlitch If TRUE, the interrupt on glitch is enabled
279 * \return None
280 */
281 IFX_EXTERN void IfxGtm_Tim_Ch_setFilterNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch);
282
283 /** \brief This function configures the TIM channel IRQ mode
284 * \param channel TIM channel pointer
285 * \param mode Notification Mode
286 * \return None
287 */
288 IFX_EXTERN void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode);
289
290 /** \brief Set the timeout notification
291 * \param channel TIM channel pointer
292 * \param irqOnTimeout If TRUE, the interrupt on timeout is enabled
293 * \return None
294 */
295 IFX_EXTERN void IfxGtm_Tim_Ch_setTimeoutNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout);
296
297 /** \} */
298
299 /******************************************************************************/
300 /*---------------------Inline Function Implementations------------------------*/
301 /******************************************************************************/
302
303 IFX_INLINE void IfxGtm_Tim_Ch_clearCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
304 {
305 channel->IRQ_NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_CNTOFL_OFF;
306 }
307
308
309 IFX_INLINE void IfxGtm_Tim_Ch_clearDataLostEvent(Ifx_GTM_TIM_CH *channel)
310 {
311 channel->IRQ_NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_GPROFL_OFF;
312 }
313
314
315 IFX_INLINE void IfxGtm_Tim_Ch_clearEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
316 {
317 channel->IRQ_NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_ECNTOFL_OFF;
318 }
319
320
321 IFX_INLINE void IfxGtm_Tim_Ch_clearGlitchEvent(Ifx_GTM_TIM_CH *channel)
322 {
323 channel->IRQ_NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_GLITCHDET_OFF;
324 }
325
326
327 IFX_INLINE void IfxGtm_Tim_Ch_clearNewValueEvent(Ifx_GTM_TIM_CH *channel)
328 {
329 channel->IRQ_NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_NEWVAL_OFF;
330 }
331
332
333 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGtm_Tim_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel)
334 {
335 IFX_UNUSED_PARAMETER(gtm)
336 return &MODULE_SRC.GTM.GTM[0].TIM[tim][channel];
337 }
338
339
340 IFX_INLINE boolean IfxGtm_Tim_Ch_isCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
341 {
342 return channel->IRQ_NOTIFY.B.CNTOFL == 1;
343 }
344
345
346 IFX_INLINE boolean IfxGtm_Tim_Ch_isDataLostEvent(Ifx_GTM_TIM_CH *channel)
347 {
348 return channel->IRQ_NOTIFY.B.GPROFL == 1;
349 }
350
351
352 IFX_INLINE boolean IfxGtm_Tim_Ch_isEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
353 {
354 return channel->IRQ_NOTIFY.B.ECNTOFL == 1;
355 }
356
357
358 IFX_INLINE boolean IfxGtm_Tim_Ch_isGlitchEvent(Ifx_GTM_TIM_CH *channel)
359 {
360 return channel->IRQ_NOTIFY.B.GLITCHDET == 1;
361 }
362
363
364 IFX_INLINE boolean IfxGtm_Tim_Ch_isNewValueEvent(Ifx_GTM_TIM_CH *channel)
365 {
366 return channel->IRQ_NOTIFY.B.NEWVAL == 1;
367 }
368
369
370 IFX_INLINE Ifx_GTM_TIM_CH *IfxGtm_Tim_getChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
371 {
372 return (Ifx_GTM_TIM_CH *)((uint32)&tim->CH0.GPR0.U + ((uint32)&tim->CH1 - (uint32)&tim->CH0) * channel);
373 }
374
375
376 IFX_INLINE void IfxGtm_Tim_Ch_resetChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
377 {
378 tim->RST.U |= (uint32)1 << (uint32)channel;
379 }
380
381
382 #endif /* IFXGTM_TIM_H */
IfxGtm_Tim_GprSel_tbuTs2
Definition: IfxGtm_Tim.h:96
IfxGtm_Tim_Timeout_risingEdge
Timeout feature enabled for rising edge only.
Definition: IfxGtm_Tim.h:120
IfxGtm_Tim_Timeout_bothEdge
Timeout feature enabled for both edges.
Definition: IfxGtm_Tim.h:122
IfxGtm_Tim_Mode_inputEvent
TIEM.
Definition: IfxGtm_Tim.h:110
IfxGtm_Tim_Input_currentChannel
Definition: IfxGtm_Tim.h:102
IfxGtm_Tim_GprSel_tbuTs0
Definition: IfxGtm_Tim.h:94
IfxGtm_Tim_Ch_setTimeoutNotification
IFX_EXTERN void IfxGtm_Tim_Ch_setTimeoutNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification.
Definition: IfxGtm_Tim.c:162
IfxGtm_Tim_Timeout_disabled
Timeout feature disabled.
Definition: IfxGtm_Tim.h:119
IfxGtm_Tim_Timeout
IfxGtm_Tim_Timeout
Enum for Timeout control.
Definition: IfxGtm_Tim.h:117
IfxGtm_Tim_Ch_isNewValueEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isNewValueEvent(Ifx_GTM_TIM_CH *channel)
Test the new value flag.
Definition: IfxGtm_Tim.h:364
IfxGtm_Tim_Mode_inputPrescaler
TIPM.
Definition: IfxGtm_Tim.h:111
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Tim_Ch_getFilterClockFrequency
IFX_EXTERN float32 IfxGtm_Tim_Ch_getFilterClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency.
Definition: IfxGtm_Tim.c:68
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:252
IfxSrc.h
SRC basic functionality.
IfxGtm_Tim_GprSel
IfxGtm_Tim_GprSel
Definition: IfxGtm_Tim.h:92
IfxGtm_Tim_GprSel_tbuTs1
Definition: IfxGtm_Tim.h:95
IfxGtm_Tim_FilterCounter
IfxGtm_Tim_FilterCounter
Enum for Filter counter.
Definition: IfxGtm_Tim.h:78
IfxGtm_Tim_Ch_getCaptureClockFrequency
IFX_EXTERN float32 IfxGtm_Tim_Ch_getCaptureClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency.
Definition: IfxGtm_Tim.c:52
IfxGtm_Tim_Ch_isDataLostEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isDataLostEvent(Ifx_GTM_TIM_CH *channel)
Test the data lost flag.
Definition: IfxGtm_Tim.h:346
IfxGtm_Tim_GprSel_cnts
Definition: IfxGtm_Tim.h:97
IfxGtm_Tim_CntsSel_cntReg
Definition: IfxGtm_Tim.h:72
IfxGtm_Tim_FilterMode_immediateEdgePropagation
Immediate edge Propagation mode.
Definition: IfxGtm_Tim.h:88
IfxGtm_Tim_Ch_isGlitchEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isGlitchEvent(Ifx_GTM_TIM_CH *channel)
Test the glitch flag.
Definition: IfxGtm_Tim.h:358
IfxGtm_Tim_FilterCounter_hold
Definition: IfxGtm_Tim.h:81
IfxGtm_Tim_CntsSel_tbuTs0
Definition: IfxGtm_Tim.h:73
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Tim_FilterMode
IfxGtm_Tim_FilterMode
Enum for Filter mode.
Definition: IfxGtm_Tim.h:86
IfxGtm_Cmu_Tim_Filter_Clk
IfxGtm_Cmu_Tim_Filter_Clk
Tim Filter counter frequency select.
Definition: IfxGtm_Cmu.h:94
IfxGtm_Tim_FilterMode_individualDeglitchTime
Individual deglitch mode.
Definition: IfxGtm_Tim.h:89
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_Tim_Ch_setFilterNotification
IFX_EXTERN void IfxGtm_Tim_Ch_setFilterNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification.
Definition: IfxGtm_Tim.c:139
IfxGtm_Tim_Ch_setChannelNotification
IFX_EXTERN void IfxGtm_Tim_Ch_setChannelNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification.
Definition: IfxGtm_Tim.c:120
IfxGtm_Tim_Ch_setNotificationMode
IFX_EXTERN void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode.
Definition: IfxGtm_Tim.c:150
IfxGtm_Tim_Ch_resetChannel
IFX_INLINE void IfxGtm_Tim_Ch_resetChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Reset the specified TIM channel.
Definition: IfxGtm_Tim.h:376
IfxGtm_Tim_Mode_pulseIntegration
TPIM.
Definition: IfxGtm_Tim.h:109
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Tim_Ch_isEcntOverflowEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Test the event counter overflow flag.
Definition: IfxGtm_Tim.h:352
IfxGtm_Tim_Ch_clearEcntOverflowEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Clears the event counter overflow flag.
Definition: IfxGtm_Tim.h:315
IfxGtm_Tim_Mode
IfxGtm_Tim_Mode
Definition: IfxGtm_Tim.h:106
IfxGtm_Tim_Ch_getTimeoutClockFrequency
IFX_EXTERN float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency.
Definition: IfxGtm_Tim.c:104
IfxGtm_Tim_Ch_clearDataLostEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearDataLostEvent(Ifx_GTM_TIM_CH *channel)
Clears the data lost flag.
Definition: IfxGtm_Tim.h:309
IfxGtm_Tim_Ch_getTimeoutClockSource
IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getTimeoutClockSource(Ifx_GTM_TIM_CH *channel)
Returns the Timeout clock source selected.
Definition: IfxGtm_Tim.c:114
IfxGtm_Tim_Ch_setClockSource
IFX_EXTERN void IfxGtm_Tim_Ch_setClockSource(Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source.
Definition: IfxGtm_Tim.c:133
IfxGtm_Tim_Ch_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGtm_Tim_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel)
Returns a pointer to the TIM channel SRC.
Definition: IfxGtm_Tim.h:333
IfxGtm_Tim_Ch_isCntOverflowEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Test the counter overflow flag.
Definition: IfxGtm_Tim.h:340
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Tim_CntsSel
IfxGtm_Tim_CntsSel
Definition: IfxGtm_Tim.h:70
IfxGtm_Tim_Ch_clearGlitchEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearGlitchEvent(Ifx_GTM_TIM_CH *channel)
Clears the glitch flag.
Definition: IfxGtm_Tim.h:321
IfxGtm_Tim_Ch_clearCntOverflowEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Clears the counter overflow flag.
Definition: IfxGtm_Tim.h:303
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:261
IfxGtm_Tim_Input_adjacentChannel
Definition: IfxGtm_Tim.h:103
IfxGtm_Tim_Ch_getCaptureClockSource
IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getCaptureClockSource(Ifx_GTM_TIM_CH *channel)
Returns the capture clock source selected.
Definition: IfxGtm_Tim.c:62
IfxGtm_Tim_Input
IfxGtm_Tim_Input
Definition: IfxGtm_Tim.h:100
IfxGtm_Tim_FilterCounter_upDown
Definition: IfxGtm_Tim.h:80
IfxGtm_Tim_Mode_pwmMeasurement
TPWM.
Definition: IfxGtm_Tim.h:108
IfxGtm_Tim_Ch_clearNewValueEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearNewValueEvent(Ifx_GTM_TIM_CH *channel)
Clears the new value flag.
Definition: IfxGtm_Tim.h:327
IfxGtm_Tim_getChannel
IFX_INLINE Ifx_GTM_TIM_CH * IfxGtm_Tim_getChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Returns the pointer to the TIM channel.
Definition: IfxGtm_Tim.h:370
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxGtm.h
GTM basic functionality.
IfxGtm_Tim_Mode_bitCompression
TBCM.
Definition: IfxGtm_Tim.h:112
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Tim_Timeout_fallingEdge
Timeout feature enabled for falling edge only.
Definition: IfxGtm_Tim.h:121
IfxGtm_Tim_Ch_getFilterClockSource
IFX_EXTERN IfxGtm_Cmu_Tim_Filter_Clk IfxGtm_Tim_Ch_getFilterClockSource(Ifx_GTM_TIM_CH *channel)
Returns the Filter clock source selected.
Definition: IfxGtm_Tim.c:98


iLLD_TC26B: IfxGtm_Tim_In.c Source File

  • Gtm
  • Tim
  • In
IfxGtm_Tim_In.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tim_In.c
3 * \brief GTM IN details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Tim_In.h"
47 #include "IfxGtm_bf.h"
48 #include "string.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 boolean IfxGtm_Tim_In_init(IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
55 {
56 boolean result = TRUE;
57 Ifx_GTM_TIM_CH *channel;
58
59 IfxGtm_Tim_Ch channelIndex;
60 IfxGtm_Tim timIndex;
61 IfxGtm_Tim_In_Input input;
62
63 if (config->filter.inputPin != NULL_PTR)
64 {
65 channelIndex = config->filter.inputPin->channel;
66 timIndex = config->filter.inputPin->tim;
67
68 input = IfxGtm_Tim_In_Input_currentChannel;
69 }
70 else
71 {
72 channelIndex = config->channelIndex;
73 timIndex = config->timIndex;
74 input = config->filter.input;
75 }
76
77 channel = IfxGtm_Tim_getChannel(&config->gtm->TIM[timIndex], channelIndex);
78 driver->timIndex = config->timIndex;
79 driver->channelIndex = config->channelIndex;
80 driver->channel = channel;
81 driver->periodTick = 0;
82 driver->pulseLengthTick = 0;
83 driver->dataCoherent = FALSE;
84 driver->newData = FALSE;
85 driver->dataLost = FALSE;
86 driver->overflowCnt = FALSE;
87 driver->edgeCounterUpper = 0;
88
89 channel->CTRL.B.TIM_MODE = IfxGtm_Tim_Mode_pwmMeasurement;
90
91 IfxGtm_Tim_Ch_setClockSource(channel, config->capture.clock);
92
93 driver->captureClockFrequency = IfxGtm_Tim_Ch_getCaptureClockFrequency(config->gtm, channel);
94
95 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->capture.mode == Ifx_Pwm_Mode_leftAligned) || (config->capture.mode == Ifx_Pwm_Mode_rightAligned));
96
97 result &= (config->capture.mode == Ifx_Pwm_Mode_leftAligned) || (config->capture.mode == Ifx_Pwm_Mode_rightAligned);
98 channel->CTRL.B.DSL = config->capture.mode == Ifx_Pwm_Mode_leftAligned ? 1 : 0;
99
100 channel->CTRL.B.CNTS_SEL = IfxGtm_Tim_CntsSel_cntReg;
101 channel->CTRL.B.GPR0_SEL = IfxGtm_Tim_GprSel_cnts; /* Use CNTS as input for GPR0 */
102 channel->CTRL.B.GPR1_SEL = IfxGtm_Tim_GprSel_cnts; /* Use CNT as input for GPR1 */
103
104 /* Interrupt configuration */
105 if (config->isrPriority)
106 {
107 volatile Ifx_SRC_SRCR *src;
108 IfxGtm_Tim_Ch_setNotificationMode(channel, config->irqMode);
109 IfxGtm_Tim_Ch_setChannelNotification(channel, config->capture.irqOnNewVal,
110 config->capture.irqOnCntOverflow, config->capture.irqOnEcntOverflow, config->capture.irqOnDatalost);
111
112 src = IfxGtm_Tim_Ch_getSrcPointer(config->gtm, timIndex, channelIndex);
113 IfxSrc_init(src, config->isrProvider, config->isrPriority);
114 IfxSrc_enable(src);
115 }
116
117 /* Timeout configuration */
118 if (config->timeout.timeout > 0)
119 {
120 float32 clockFrequency;
121 sint32 timeout;
122 channel->TDUV.B.TCS = config->timeout.clock;
123 clockFrequency = IfxGtm_Tim_Ch_getTimeoutClockFrequency(config->gtm, channel);
124
125 timeout = (uint32)(config->timeout.timeout * clockFrequency) - 1;
126
127 if (timeout < 0)
128 {
129 timeout = 0;
130 }
131 else if (timeout >= (1 << IFX_GTM_TIM_CH_TDUV_TCS_MSK))
132 {
133 timeout = IFX_GTM_TIM_CH_TDUV_TCS_MSK;
134 result = FALSE;
135 }
136
137 channel->CTRL.B.TOCTRL = config->capture.mode == Ifx_Pwm_Mode_leftAligned ? IfxGtm_Tim_Timeout_risingEdge : IfxGtm_Tim_Timeout_fallingEdge;
138 channel->TDUV.B.TOV = timeout;
139
140 IfxGtm_Tim_Ch_setTimeoutNotification(channel, config->timeout.irqOnTimeout);
141 }
142
143 /* Input configuration */
144
145 config->gtm->TIM[timIndex].IN_SRC.U = 1 << (IFX_GTM_TIM_IN_SRC_MODE_0_OFF + channelIndex * (IFX_GTM_TIM_IN_SRC_MODE_1_OFF - IFX_GTM_TIM_IN_SRC_MODE_0_OFF)); // MODE 0
146
147 switch (input)
148 {
149 case IfxGtm_Tim_In_Input_currentChannel:
150 config->gtm->TIM[timIndex].IN_SRC.U = 1 << (IFX_GTM_TIM_IN_SRC_VAL_0_OFF + channelIndex * (IFX_GTM_TIM_IN_SRC_VAL_1_OFF - IFX_GTM_TIM_IN_SRC_VAL_0_OFF)); // VAL 0
151 channel->CTRL.B.CICTRL = IfxGtm_Tim_Input_currentChannel;
152 break;
153 case IfxGtm_Tim_In_Input_adjacentChannel:
154 config->gtm->TIM[timIndex].IN_SRC.U = 1 << (IFX_GTM_TIM_IN_SRC_VAL_0_OFF + channelIndex * (IFX_GTM_TIM_IN_SRC_VAL_1_OFF - IFX_GTM_TIM_IN_SRC_VAL_0_OFF)); // VAL 0
155 channel->CTRL.B.CICTRL = IfxGtm_Tim_Input_adjacentChannel;
156 break;
157 case IfxGtm_Tim_In_Input_aux:
158 config->gtm->TIM[timIndex].IN_SRC.U = 2 << (IFX_GTM_TIM_IN_SRC_VAL_0_OFF + channelIndex * (IFX_GTM_TIM_IN_SRC_VAL_1_OFF - IFX_GTM_TIM_IN_SRC_VAL_0_OFF)); // VAL 1
159 break;
160 }
161
162 if (config->filter.inputPin != NULL_PTR)
163 {
164 IfxGtm_PinMap_setTimTin(config->filter.inputPin, config->filter.inputPinMode);
165 }
166
167 /*Filter configuration */
168 if ((config->filter.fallingEdgeMode != IfxGtm_Tim_In_ConfigFilterMode_none)
169 || (config->filter.risingEdgeMode != IfxGtm_Tim_In_ConfigFilterMode_none))
170 {
171 float32 clockFrequency;
172 sint32 fallingfilterTime;
173 sint32 risingfilterTime;
174
175 channel->CTRL.B.FLT_EN = 1;
176 channel->CTRL.B.FLT_CNT_FRQ = config->filter.clock;
177
178 clockFrequency = IfxGtm_Tim_Ch_getFilterClockFrequency(config->gtm, channel);
179
180 fallingfilterTime = (uint32)(config->filter.fallingEdgeFilterTime * clockFrequency) - 1;
181
182 if (fallingfilterTime < 0)
183 {
184 fallingfilterTime = 0;
185 }
186 else if (fallingfilterTime > (sint32)IFX_GTM_TIM_CH_FLT_FE_FLT_FE_MSK)
187 {
188 fallingfilterTime = IFX_GTM_TIM_CH_FLT_FE_FLT_FE_MSK;
189 result = FALSE;
190 }
191
192 channel->FLT_FE.B.FLT_FE = fallingfilterTime;
193
194 risingfilterTime = (uint32)(config->filter.risingEdgeFilterTime * clockFrequency) - 1;
195
196 if (risingfilterTime < 0)
197 {
198 risingfilterTime = 0;
199 }
200 else if (risingfilterTime > (sint32)IFX_GTM_TIM_CH_FLT_FE_FLT_FE_MSK)
201 {
202 risingfilterTime = IFX_GTM_TIM_CH_FLT_FE_FLT_FE_MSK;
203 result = FALSE;
204 }
205
206 channel->FLT_RE.B.FLT_RE = risingfilterTime;
207
208 if (config->filter.fallingEdgeMode != IfxGtm_Tim_In_ConfigFilterMode_none)
209 {
210 if (config->filter.fallingEdgeMode == IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation)
211 {
212 channel->CTRL.B.FLT_MODE_FE = IfxGtm_Tim_FilterMode_immediateEdgePropagation;
213 }
214 else
215 {
216 channel->CTRL.B.FLT_MODE_FE = IfxGtm_Tim_FilterMode_individualDeglitchTime;
217 channel->CTRL.B.FLT_CTR_FE = config->filter.fallingEdgeMode == IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown ? IfxGtm_Tim_FilterCounter_upDown : IfxGtm_Tim_FilterCounter_hold;
218 }
219 }
220 else
221 {
222 channel->CTRL.B.FLT_MODE_FE = IfxGtm_Tim_FilterMode_immediateEdgePropagation;
223 channel->FLT_FE.B.FLT_FE = 0;
224 }
225
226 if (config->filter.risingEdgeMode != IfxGtm_Tim_In_ConfigFilterMode_none)
227 {
228 if (config->filter.risingEdgeMode == IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation)
229 {
230 channel->CTRL.B.FLT_MODE_RE = IfxGtm_Tim_FilterMode_immediateEdgePropagation;
231 }
232 else
233 {
234 channel->CTRL.B.FLT_MODE_RE = IfxGtm_Tim_FilterMode_individualDeglitchTime;
235 channel->CTRL.B.FLT_CTR_RE = config->filter.risingEdgeMode == IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown ? IfxGtm_Tim_FilterCounter_upDown : IfxGtm_Tim_FilterCounter_hold;
236 }
237 }
238 else
239 {
240 channel->CTRL.B.FLT_MODE_RE = IfxGtm_Tim_FilterMode_immediateEdgePropagation;
241 channel->FLT_RE.B.FLT_RE = 0;
242 }
243
244 IfxGtm_Tim_Ch_setFilterNotification(channel, config->filter.irqOnGlitch);
245 }
246
247 /* Enable TIM channel */
248 channel->CTRL.B.TIM_EN = 1;
249
250 return result;
251 }
252
253
254 void IfxGtm_Tim_In_initConfig(IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
255 {
256 memset(config, 0, sizeof(IfxGtm_Tim_In_Config));
257
258 config->gtm = gtm;
259 config->timIndex = IfxGtm_Tim_0;
260 config->channelIndex = IfxGtm_Tim_Ch_0;
261 config->irqMode = IfxGtm_IrqMode_pulseNotify;
262 config->isrProvider = IfxSrc_Tos_cpu0;
263 config->isrPriority = 0;
264 config->capture.irqOnNewVal = FALSE;
265 config->capture.irqOnCntOverflow = FALSE;
266 config->capture.irqOnEcntOverflow = FALSE;
267 config->capture.irqOnDatalost = FALSE;
268 config->capture.clock = IfxGtm_Cmu_Clk_0;
269 config->capture.mode = Ifx_Pwm_Mode_leftAligned;
270 config->timeout.irqOnTimeout = FALSE;
271 config->timeout.clock = IfxGtm_Cmu_Clk_0;
272 config->timeout.timeout = 0.0;
273 config->filter.input = IfxGtm_Tim_In_Input_currentChannel;
274 config->filter.inputPin = NULL_PTR;
275 config->filter.inputPinMode = IfxPort_InputMode_noPullDevice;
276 config->filter.risingEdgeMode = IfxGtm_Tim_In_ConfigFilterMode_none;
277 config->filter.fallingEdgeMode = IfxGtm_Tim_In_ConfigFilterMode_none;
278 config->filter.risingEdgeFilterTime = 0;
279 config->filter.fallingEdgeFilterTime = 0;
280 config->filter.clock = IfxGtm_Cmu_Tim_Filter_Clk_0;
281 }
282
283
284 void IfxGtm_Tim_In_onIsr(IfxGtm_Tim_In *driver)
285 {
286 IfxGtm_Tim_In_update(driver);
287 }
288
289
290 void IfxGtm_Tim_In_update(IfxGtm_Tim_In *driver)
291 {
292 driver->dataLost = IfxGtm_Tim_Ch_isDataLostEvent(driver->channel);
293
294 if (driver->dataLost)
295 {
296 IfxGtm_Tim_Ch_clearDataLostEvent(driver->channel);
297 }
298
299 driver->glitch = IfxGtm_Tim_Ch_isGlitchEvent(driver->channel);
300
301 if (driver->glitch)
302 {
303 IfxGtm_Tim_Ch_clearGlitchEvent(driver->channel);
304 }
305
306 driver->newData = IfxGtm_Tim_Ch_isNewValueEvent(driver->channel);
307
308 if (driver->newData)
309 {
310 Ifx_GTM_TIM_CH_GPR0 gpr0;
311 Ifx_GTM_TIM_CH_GPR1 gpr1;
312
313 gpr0.U = driver->channel->GPR0.U;
314 gpr1.U = driver->channel->GPR1.U;
315 driver->periodTick = gpr1.B.GPR1;
316 driver->pulseLengthTick = gpr0.B.GPR0;
317 driver->dataCoherent = gpr0.B.ECNT == gpr1.B.ECNT;
318
319 // read the edge counter
320 driver->edgeCount = driver->channel->ECNT.B.ECNT;
321
322 if (IfxGtm_Tim_Ch_isEcntOverflowEvent(driver->channel))
323 {
324 driver->edgeCounterUpper++;
325 IfxGtm_Tim_Ch_clearEcntOverflowEvent(driver->channel);
326 }
327
328 driver->overflowCnt = IfxGtm_Tim_Ch_isCntOverflowEvent(driver->channel);
329
330 if (driver->overflowCnt)
331 {
332 driver->newData = FALSE;
333 IfxGtm_Tim_Ch_clearCntOverflowEvent(driver->channel);
334 }
335
336 IfxGtm_Tim_Ch_clearNewValueEvent(driver->channel);
337 }
338 }
IfxGtm_Tim_In::pulseLengthTick
uint32 pulseLengthTick
Duty value in clock ticks.
Definition: IfxGtm_Tim_In.h:143
IfxGtm_Tim_In_ConfigCapture::mode
Ifx_Pwm_Mode mode
PWM mode, only Ifx_Pwm_Mode_leftAligned and Ifx_Pwm_Mode_righAligned are supported.
Definition: IfxGtm_Tim_In.h:106
IfxGtm_Tim_In::dataCoherent
boolean dataCoherent
TRUE, if the duty and period values are measured from the same period.
Definition: IfxGtm_Tim_In.h:144
IfxGtm_Tim_Timeout_risingEdge
Timeout feature enabled for rising edge only.
Definition: IfxGtm_Tim.h:120
IfxGtm_Tim_0
TIM object 0.
Definition: IfxGtm_cfg.h:254
IfxGtm_PinMap_setTimTin
void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
Definition: IfxGtm_PinMap.c:706
IfxGtm_Tim_In::newData
boolean newData
TRUE when values are updated, and if none of the counter CNT, CNTS have overflowed.
Definition: IfxGtm_Tim_In.h:146
IfxGtm_Tim_In_Config
Configuration structure for TIM input capture.
Definition: IfxGtm_Tim_In.h:158
IfxGtm_Tim_Input_currentChannel
Definition: IfxGtm_Tim.h:102
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxGtm_Tim_In_ConfigCapture::irqOnDatalost
boolean irqOnDatalost
If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled.
Definition: IfxGtm_Tim_In.h:104
IfxGtm_Tim_In_Input_adjacentChannel
Use the input from the adjacent channel.
Definition: IfxGtm_Tim_In.h:85
IfxGtm_Tim_In_ConfigFilter::clock
IfxGtm_Cmu_Tim_Filter_Clk clock
Timeout clock.
Definition: IfxGtm_Tim_In.h:113
IfxGtm_Tim_In::edgeCount
uint16 edgeCount
number of edges counted.
Definition: IfxGtm_Tim_In.h:153
IfxGtm_Tim_Ch_setTimeoutNotification
void IfxGtm_Tim_Ch_setTimeoutNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification.
Definition: IfxGtm_Tim.c:162
IfxGtm_Tim_In_ConfigFilter::fallingEdgeMode
IfxGtm_Tim_In_ConfigFilterMode fallingEdgeMode
Filter mode for falling edge.
Definition: IfxGtm_Tim_In.h:115
IfxGtm_Tim_Ch_0
TIM channel 0.
Definition: IfxGtm_cfg.h:263
IfxGtm_Tim_Ch_isNewValueEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isNewValueEvent(Ifx_GTM_TIM_CH *channel)
Test the new value flag.
Definition: IfxGtm_Tim.h:364
IfxGtm_Tim_In_Config::gtm
Ifx_GTM * gtm
GTM used.
Definition: IfxGtm_Tim_In.h:160
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxGtm_Tim_In_ConfigTimeout::irqOnTimeout
boolean irqOnTimeout
If TRUE, the interrupt on timeout is enabled.
Definition: IfxGtm_Tim_In.h:130
IfxGtm_Tim_In_Config::capture
IfxGtm_Tim_In_ConfigCapture capture
Capture configuration.
Definition: IfxGtm_Tim_In.h:166
IfxGtm_Tim_In_ConfigFilter::fallingEdgeFilterTime
float32 fallingEdgeFilterTime
Falling edge filter time in second.
Definition: IfxGtm_Tim_In.h:117
IfxGtm_Tim_Ch_getFilterClockFrequency
float32 IfxGtm_Tim_Ch_getFilterClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency.
Definition: IfxGtm_Tim.c:68
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:252
IfxGtm_Tim_In_Input_aux
Use the input from the aux.
Definition: IfxGtm_Tim_In.h:86
IfxGtm_Tim_In_Input_currentChannel
Use the input from the current channel.
Definition: IfxGtm_Tim_In.h:84
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGtm_Tim_Ch_getCaptureClockFrequency
float32 IfxGtm_Tim_Ch_getCaptureClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency.
Definition: IfxGtm_Tim.c:52
IfxGtm_Tim_Ch_isDataLostEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isDataLostEvent(Ifx_GTM_TIM_CH *channel)
Test the data lost flag.
Definition: IfxGtm_Tim.h:346
IfxGtm_Tim_GprSel_cnts
Definition: IfxGtm_Tim.h:97
IfxGtm_Tim_TinMap::tim
IfxGtm_Tim tim
TIM unit index.
Definition: IfxGtm_PinMap.h:95
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Tim_CntsSel_cntReg
Definition: IfxGtm_Tim.h:72
IfxGtm_Tim_In_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxGtm_Tim_In.h:164
IfxGtm_Tim_In_Config::timIndex
IfxGtm_Tim timIndex
TIM index.
Definition: IfxGtm_Tim_In.h:161
IfxGtm_Tim_FilterMode_immediateEdgePropagation
Immediate edge Propagation mode.
Definition: IfxGtm_Tim.h:88
IfxGtm_Tim_Ch_isGlitchEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isGlitchEvent(Ifx_GTM_TIM_CH *channel)
Test the glitch flag.
Definition: IfxGtm_Tim.h:358
IfxGtm_Cmu_Clk_0
Definition: IfxGtm_Cmu.h:66
IfxGtm_Tim_In::glitch
boolean glitch
TRUE if glitch is detected.
Definition: IfxGtm_Tim_In.h:149
IfxGtm_Tim_FilterCounter_hold
Definition: IfxGtm_Tim.h:81
IfxGtm_Tim_In_ConfigFilter::input
IfxGtm_Tim_In_Input input
selected input
Definition: IfxGtm_Tim_In.h:119
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
IfxGtm_Tim_In_ConfigFilter::risingEdgeFilterTime
float32 risingEdgeFilterTime
Rising edge filter time in second.
Definition: IfxGtm_Tim_In.h:116
IfxGtm_Tim_FilterMode_individualDeglitchTime
Individual deglitch mode.
Definition: IfxGtm_Tim.h:89
IfxGtm_Tim_Ch_setFilterNotification
void IfxGtm_Tim_Ch_setFilterNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification.
Definition: IfxGtm_Tim.c:139
IfxGtm_Tim_Ch_setChannelNotification
void IfxGtm_Tim_Ch_setChannelNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification.
Definition: IfxGtm_Tim.c:120
IfxGtm_Tim_In::overflowCnt
boolean overflowCnt
TRUE if the last measurement show an overflow in CNT.
Definition: IfxGtm_Tim_In.h:145
IfxGtm_Tim_In_ConfigFilter::inputPin
IfxGtm_Tim_TinMap * inputPin
If defined, this value overwrites the IfxGtm_Tim_In_Config.filter.input, IfxGtm_Tim_In_Config.timIndex, IfxGtm_Tim_In_Config.channelIndex.
Definition: IfxGtm_Tim_In.h:120
IfxGtm_Tim_Ch_setNotificationMode
void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode.
Definition: IfxGtm_Tim.c:150
IfxGtm_Tim_In_ConfigCapture::irqOnCntOverflow
boolean irqOnCntOverflow
If TRUE, the interrupt on CNT overflow is enabled.
Definition: IfxGtm_Tim_In.h:102
IfxGtm_Tim_In_ConfigCapture::irqOnNewVal
boolean irqOnNewVal
If TRUE, the interrupt on new value is enabled.
Definition: IfxGtm_Tim_In.h:101
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:83
IfxGtm_Tim_In_ConfigTimeout::timeout
float32 timeout
Timeout in second. Value of 0 disable the timeout functionality see 27.10.3 Timeout Detection Unit (T...
Definition: IfxGtm_Tim_In.h:129
IfxGtm_Tim_Ch_isEcntOverflowEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Test the event counter overflow flag.
Definition: IfxGtm_Tim.h:352
IfxGtm_Tim_In
Driver Handle.
Definition: IfxGtm_Tim_In.h:139
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxGtm_Tim_In_Config::filter
IfxGtm_Tim_In_ConfigFilter filter
Filter configuration.
Definition: IfxGtm_Tim_In.h:167
IfxGtm_Tim_In_update
void IfxGtm_Tim_In_update(IfxGtm_Tim_In *driver)
Updates the period and duty cycle.
Definition: IfxGtm_Tim_In.c:290
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation
Immediate edge propagation mode.
Definition: IfxGtm_Tim_In.h:74
IfxGtm_Tim_In::dataLost
boolean dataLost
TRUE if data are lost.
Definition: IfxGtm_Tim_In.h:147
IfxGtm_Tim_In_ConfigCapture::irqOnEcntOverflow
boolean irqOnEcntOverflow
If TRUE, the interrupt on ECNT (Edge counter) overflow is enabled.
Definition: IfxGtm_Tim_In.h:103
IfxGtm_Tim_Ch_clearEcntOverflowEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Clears the event counter overflow flag.
Definition: IfxGtm_Tim.h:315
IfxGtm_Tim_Ch_getTimeoutClockFrequency
float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency.
Definition: IfxGtm_Tim.c:104
IfxGtm_Tim_In::periodTick
uint32 periodTick
Period value in clock ticks.
Definition: IfxGtm_Tim_In.h:142
IfxGtm_Tim_In_ConfigFilter::risingEdgeMode
IfxGtm_Tim_In_ConfigFilterMode risingEdgeMode
Filter mode for rising edge.
Definition: IfxGtm_Tim_In.h:114
IfxGtm_Tim_TinMap::channel
IfxGtm_Tim_Ch channel
TIM channel index.
Definition: IfxGtm_PinMap.h:96
IfxGtm_Tim_In_init
boolean IfxGtm_Tim_In_init(IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
Initializes the input capture object.
Definition: IfxGtm_Tim_In.c:54
IfxGtm_Tim_In::captureClockFrequency
float32 captureClockFrequency
Capture clock frequency in Hz.
Definition: IfxGtm_Tim_In.h:150
IfxGtm_Tim_In_Input
IfxGtm_Tim_In_Input
Input Source.
Definition: IfxGtm_Tim_In.h:82
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:68
IfxGtm_Tim_In_initConfig
void IfxGtm_Tim_In_initConfig(IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tim_In.c:254
IfxGtm_Tim_In_Config::irqMode
IfxGtm_IrqMode irqMode
Interrupt mode for the new value available.
Definition: IfxGtm_Tim_In.h:163
IfxGtm_Tim_Ch_clearDataLostEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearDataLostEvent(Ifx_GTM_TIM_CH *channel)
Clears the data lost flag.
Definition: IfxGtm_Tim.h:309
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown
Individual deglitch time mode (Up Down)
Definition: IfxGtm_Tim_In.h:75
IfxGtm_Tim_Ch_setClockSource
void IfxGtm_Tim_Ch_setClockSource(Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source.
Definition: IfxGtm_Tim.c:133
IfxGtm_Tim_In_Config::isrPriority
Ifx_Priority isrPriority
Set the interrupt priority for new value available. If 0, no interrupt will be generated.
Definition: IfxGtm_Tim_In.h:165
IfxGtm_Tim_In::edgeCounterUpper
uint32 edgeCounterUpper
upper part of the edge counter
Definition: IfxGtm_Tim_In.h:148
IfxGtm_Tim_In_Config::timeout
IfxGtm_Tim_In_ConfigTimeout timeout
Timeout configuration.
Definition: IfxGtm_Tim_In.h:168
sint32
long sint32
Definition: Platform_Types.h:134
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxGtm_Tim_In_ConfigFilter::inputPinMode
IfxPort_InputMode inputPinMode
Input pin mode.
Definition: IfxGtm_Tim_In.h:121
IfxGtm_Tim_Ch_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGtm_Tim_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel)
Returns a pointer to the TIM channel SRC.
Definition: IfxGtm_Tim.h:333
IfxGtm_Tim_In_ConfigCapture::clock
IfxGtm_Cmu_Clk clock
Timer input clock.
Definition: IfxGtm_Tim_In.h:105
IfxGtm_Tim_In_onIsr
void IfxGtm_Tim_In_onIsr(IfxGtm_Tim_In *driver)
will update the driver state To be called in the interrupt generated by the IfxGtm_Tim_In driver ...
Definition: IfxGtm_Tim_In.c:284
IfxGtm_Tim_Ch_isCntOverflowEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Test the counter overflow flag.
Definition: IfxGtm_Tim.h:340
IfxGtm_Tim_In::channel
Ifx_GTM_TIM_CH * channel
TIM channel used.
Definition: IfxGtm_Tim_In.h:141
IfxGtm_Tim_Ch_clearGlitchEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearGlitchEvent(Ifx_GTM_TIM_CH *channel)
Clears the glitch flag.
Definition: IfxGtm_Tim.h:321
IfxGtm_Tim_Ch_clearCntOverflowEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Clears the counter overflow flag.
Definition: IfxGtm_Tim.h:303
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:261
IfxGtm_Tim_Input_adjacentChannel
Definition: IfxGtm_Tim.h:103
IfxGtm_Tim_In_ConfigFilter::irqOnGlitch
boolean irqOnGlitch
If TRUE, the interrupt on glitch is enabled.
Definition: IfxGtm_Tim_In.h:118
IfxGtm_Tim_FilterCounter_upDown
Definition: IfxGtm_Tim.h:80
IfxGtm_Tim_Mode_pwmMeasurement
TPWM.
Definition: IfxGtm_Tim.h:108
IfxGtm_Tim_Ch_clearNewValueEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearNewValueEvent(Ifx_GTM_TIM_CH *channel)
Clears the new value flag.
Definition: IfxGtm_Tim.h:327
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Tim_getChannel
IFX_INLINE Ifx_GTM_TIM_CH * IfxGtm_Tim_getChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Returns the pointer to the TIM channel.
Definition: IfxGtm_Tim.h:370
IfxGtm_Tim_In.h
GTM IN details.
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxGtm_Tim_In_ConfigFilterMode_none
No filter.
Definition: IfxGtm_Tim_In.h:77
IfxGtm_Cmu_Tim_Filter_Clk_0
FLT_CNT counts with CMU_CLK0.
Definition: IfxGtm_Cmu.h:96
IfxGtm_Tim_Timeout_fallingEdge
Timeout feature enabled for falling edge only.
Definition: IfxGtm_Tim.h:121
IfxGtm_Tim_In_Config::channelIndex
IfxGtm_Tim_Ch channelIndex
Channel index.
Definition: IfxGtm_Tim_In.h:162


iLLD_TC26B: IfxGtm_Tim_In.h Source File

  • Gtm
  • Tim
  • In
IfxGtm_Tim_In.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tim_In.h
3 * \brief GTM IN details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Tim_In TIM Input Interface
42 * \ingroup IfxLld_Gtm_Tim
43 * \defgroup IfxLld_Gtm_Tim_In_DataStructures Data Structures
44 * \ingroup IfxLld_Gtm_Tim_In
45 * \defgroup IfxLld_Gtm_Tim_In_Enumerations Enumerations
46 * \ingroup IfxLld_Gtm_Tim_In
47 * \defgroup IfxLld_Gtm_Tim_In_Funtions Funtions
48 * \ingroup IfxLld_Gtm_Tim_In
49 */
50
51 #ifndef IFXGTM_TIM_IN_H
52 #define IFXGTM_TIM_IN_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 #include "_PinMap/IfxGtm_PinMap.h"
59 #include "Gtm/Std/IfxGtm_Tim.h"
60 #include "Gtm/Std/IfxGtm_Cmu.h"
61 #include "Cpu/Std/IfxCpu.h"
62 #include "_Utilities/Ifx_Assert.h"
63
64 /******************************************************************************/
65 /*--------------------------------Enumerations--------------------------------*/
66 /******************************************************************************/
67
68 /** \addtogroup IfxLld_Gtm_Tim_In_Enumerations
69 * \{ */
70 /** \brief Config Filter Mode
71 */
72 typedef enum
73 {
74 IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation, /**< \brief Immediate edge propagation mode */
75 IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown, /**< \brief Individual deglitch time mode (Up Down) */
76 IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold, /**< \brief Individual deglitch time mode (Hold) */
77 IfxGtm_Tim_In_ConfigFilterMode_none /**< \brief No filter */
78 } IfxGtm_Tim_In_ConfigFilterMode;
79
80 /** \brief Input Source
81 */
82 typedef enum
83 {
84 IfxGtm_Tim_In_Input_currentChannel, /**< \brief Use the input from the current channel */
85 IfxGtm_Tim_In_Input_adjacentChannel, /**< \brief Use the input from the adjacent channel */
86 IfxGtm_Tim_In_Input_aux /**< \brief Use the input from the aux */
87 } IfxGtm_Tim_In_Input;
88
89 /** \} */
90
91 /******************************************************************************/
92 /*-----------------------------Data Structures--------------------------------*/
93 /******************************************************************************/
94
95 /** \addtogroup IfxLld_Gtm_Tim_In_DataStructures
96 * \{ */
97 /** \brief Configuration structure for TIM capture
98 */
99 typedef struct
100 {
101 boolean irqOnNewVal; /**< \brief If TRUE, the interrupt on new value is enabled */
102 boolean irqOnCntOverflow; /**< \brief If TRUE, the interrupt on CNT overflow is enabled */
103 boolean irqOnEcntOverflow; /**< \brief If TRUE, the interrupt on ECNT (Edge counter) overflow is enabled */
104 boolean irqOnDatalost; /**< \brief If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled */
105 IfxGtm_Cmu_Clk clock; /**< \brief Timer input clock */
106 Ifx_Pwm_Mode mode; /**< \brief PWM mode, only Ifx_Pwm_Mode_leftAligned and Ifx_Pwm_Mode_righAligned are supported */
107 } IfxGtm_Tim_In_ConfigCapture;
108
109 /** \brief Configuration structure for TIM filter
110 */
111 typedef struct
112 {
113 IfxGtm_Cmu_Tim_Filter_Clk clock; /**< \brief Timeout clock */
114 IfxGtm_Tim_In_ConfigFilterMode risingEdgeMode; /**< \brief Filter mode for rising edge */
115 IfxGtm_Tim_In_ConfigFilterMode fallingEdgeMode; /**< \brief Filter mode for falling edge */
116 float32 risingEdgeFilterTime; /**< \brief Rising edge filter time in second */
117 float32 fallingEdgeFilterTime; /**< \brief Falling edge filter time in second */
118 boolean irqOnGlitch; /**< \brief If TRUE, the interrupt on glitch is enabled */
119 IfxGtm_Tim_In_Input input; /**< \brief selected input */
120 IfxGtm_Tim_TinMap *inputPin; /**< \brief If defined, this value overwrites the IfxGtm_Tim_In_Config.filter.input, IfxGtm_Tim_In_Config.timIndex, IfxGtm_Tim_In_Config.channelIndex */
121 IfxPort_InputMode inputPinMode; /**< \brief Input pin mode */
122 } IfxGtm_Tim_In_ConfigFilter;
123
124 /** \brief Configuration structure for TIM timeout
125 */
126 typedef struct
127 {
128 IfxGtm_Cmu_Clk clock; /**< \brief Timeout clock */
129 float32 timeout; /**< \brief Timeout in second. Value of 0 disable the timeout functionality see 27.10.3 Timeout Detection Unit (TDU) */
130 boolean irqOnTimeout; /**< \brief If TRUE, the interrupt on timeout is enabled */
131 } IfxGtm_Tim_In_ConfigTimeout;
132
133 /** \} */
134
135 /** \addtogroup IfxLld_Gtm_Tim_In_DataStructures
136 * \{ */
137 /** \brief Driver Handle
138 */
139 typedef struct
140 {
141 Ifx_GTM_TIM_CH *channel; /**< \brief TIM channel used */
142 uint32 periodTick; /**< \brief Period value in clock ticks */
143 uint32 pulseLengthTick; /**< \brief Duty value in clock ticks */
144 boolean dataCoherent; /**< \brief TRUE, if the duty and period values are measured from the same period */
145 boolean overflowCnt; /**< \brief TRUE if the last measurement show an overflow in CNT */
146 boolean newData; /**< \brief TRUE when values are updated, and if none of the counter CNT, CNTS have overflowed */
147 boolean dataLost; /**< \brief TRUE if data are lost */
148 uint32 edgeCounterUpper; /**< \brief upper part of the edge counter */
149 boolean glitch; /**< \brief TRUE if glitch is detected */
150 float32 captureClockFrequency; /**< \brief Capture clock frequency in Hz */
151 IfxGtm_Tim timIndex; /**< \brief Index of the TIM module being used. */
152 IfxGtm_Tim_Ch channelIndex; /**< \brief Index of the TIM channel being used. */
153 uint16 edgeCount; /**< \brief number of edges counted. */
154 } IfxGtm_Tim_In;
155
156 /** \brief Configuration structure for TIM input capture
157 */
158 typedef struct
159 {
160 Ifx_GTM *gtm; /**< \brief GTM used */
161 IfxGtm_Tim timIndex; /**< \brief TIM index */
162 IfxGtm_Tim_Ch channelIndex; /**< \brief Channel index */
163 IfxGtm_IrqMode irqMode; /**< \brief Interrupt mode for the new value available */
164 IfxSrc_Tos isrProvider; /**< \brief Interrupt service provider for the timer interrupt */
165 Ifx_Priority isrPriority; /**< \brief Set the interrupt priority for new value available. If 0, no interrupt will be generated */
166 IfxGtm_Tim_In_ConfigCapture capture; /**< \brief Capture configuration */
167 IfxGtm_Tim_In_ConfigFilter filter; /**< \brief Filter configuration */
168 IfxGtm_Tim_In_ConfigTimeout timeout; /**< \brief Timeout configuration */
169 } IfxGtm_Tim_In_Config;
170
171 /** \} */
172
173 /** \addtogroup IfxLld_Gtm_Tim_In_Funtions
174 * \{ */
175
176 /******************************************************************************/
177 /*-------------------------Inline Function Prototypes-------------------------*/
178 /******************************************************************************/
179
180 /** \brief Clear the new data flag
181 * \param driver TIM Input object
182 * \return None
183 */
184 IFX_INLINE void IfxGtm_Tim_In_clearNewData(IfxGtm_Tim_In *driver);
185
186 /** \brief return the dutycycle in percent
187 * \param driver TIM Input object
188 * \param dataCoherent If true, the duty cycle has been calculated with coherent values for the period and duty, else the period and duty value are from 2 adjacent periods
189 * \return duty
190 */
191 IFX_INLINE float32 IfxGtm_Tim_In_getDutyPercent(IfxGtm_Tim_In *driver, boolean *dataCoherent);
192
193 /** \brief Return the period in second
194 * \param driver TIM Input object
195 * \return period value in seconds
196 */
197 IFX_INLINE float32 IfxGtm_Tim_In_getPeriodSecond(IfxGtm_Tim_In *driver);
198
199 /** \brief Return the period value in tick
200 * \param driver TIM Input object
201 * \return period value in ticks
202 */
203 IFX_INLINE sint32 IfxGtm_Tim_In_getPeriodTicks(IfxGtm_Tim_In *driver);
204
205 /** \brief Return the pulse length value in tick
206 * \param driver TIM Input object
207 * \return pulse length
208 */
209 IFX_INLINE sint32 IfxGtm_Tim_In_getPulseLengthTick(IfxGtm_Tim_In *driver);
210
211 /** \brief Indicates if data were lost
212 * \param driver TIM Input object
213 * \return TRUE if Data is lost FALSE otherwise
214 */
215 IFX_INLINE boolean IfxGtm_Tim_In_isDataLost(IfxGtm_Tim_In *driver);
216
217 /** \brief Indicates if new data are present (new data flag)
218 * \param driver TIM Input object
219 * \return TRUE if New Data FALSE otherwise
220 */
221 IFX_INLINE boolean IfxGtm_Tim_In_isNewData(IfxGtm_Tim_In *driver);
222
223 /******************************************************************************/
224 /*-------------------------Global Function Prototypes-------------------------*/
225 /******************************************************************************/
226
227 /** \brief Initializes the input capture object
228 * \param driver TIM Input object
229 * \param config Configuration structure for the input capture Timer
230 * \return TRUE on success else FALSE
231 */
232 IFX_EXTERN boolean IfxGtm_Tim_In_init(IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config);
233
234 /** \brief Initializes the configuration structure to default
235 * \param config Configuration structure for the input capture Timer
236 * \param gtm Pointer to GTM module
237 * \return None
238 */
239 IFX_EXTERN void IfxGtm_Tim_In_initConfig(IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm);
240
241 /** \brief will update the driver state\n
242 * To be called in the interrupt generated by the IfxGtm_Tim_In driver
243 * \param driver TIM Input object
244 * \return None
245 */
246 IFX_EXTERN void IfxGtm_Tim_In_onIsr(IfxGtm_Tim_In *driver);
247
248 /** \brief Updates the period and duty cycle
249 * \param driver TIM Input object
250 * \return None
251 */
252 IFX_EXTERN void IfxGtm_Tim_In_update(IfxGtm_Tim_In *driver);
253
254 /** \} */
255
256 /******************************************************************************/
257 /*---------------------Inline Function Implementations------------------------*/
258 /******************************************************************************/
259
260 IFX_INLINE void IfxGtm_Tim_In_clearNewData(IfxGtm_Tim_In *driver)
261 {
262 driver->newData = FALSE;
263 }
264
265
266 IFX_INLINE float32 IfxGtm_Tim_In_getDutyPercent(IfxGtm_Tim_In *driver, boolean *dataCoherent)
267 {
268 float32 duty;
269 boolean interruptState = IfxCpu_disableInterrupts();
270 duty = (float32)(driver->pulseLengthTick * 100) / driver->periodTick;
271 *dataCoherent = driver->dataCoherent;
272 IfxCpu_restoreInterrupts(interruptState);
273
274 return duty;
275 }
276
277
278 IFX_INLINE float32 IfxGtm_Tim_In_getPeriodSecond(IfxGtm_Tim_In *driver)
279 {
280 return IfxGtm_Tim_In_getPeriodTicks(driver) / driver->captureClockFrequency;
281 }
282
283
284 IFX_INLINE sint32 IfxGtm_Tim_In_getPeriodTicks(IfxGtm_Tim_In *driver)
285 {
286 return driver->periodTick;
287 }
288
289
290 IFX_INLINE sint32 IfxGtm_Tim_In_getPulseLengthTick(IfxGtm_Tim_In *driver)
291 {
292 return driver->pulseLengthTick;
293 }
294
295
296 IFX_INLINE boolean IfxGtm_Tim_In_isDataLost(IfxGtm_Tim_In *driver)
297 {
298 return driver->dataLost;
299 }
300
301
302 IFX_INLINE boolean IfxGtm_Tim_In_isNewData(IfxGtm_Tim_In *driver)
303 {
304 return driver->newData;
305 }
306
307
308 #endif /* IFXGTM_TIM_IN_H */
IfxGtm_Tim_In::pulseLengthTick
uint32 pulseLengthTick
Duty value in clock ticks.
Definition: IfxGtm_Tim_In.h:143
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxGtm_Tim_In_ConfigFilter
Configuration structure for TIM filter.
Definition: IfxGtm_Tim_In.h:111
IfxGtm_Tim_In_ConfigCapture::mode
Ifx_Pwm_Mode mode
PWM mode, only Ifx_Pwm_Mode_leftAligned and Ifx_Pwm_Mode_righAligned are supported.
Definition: IfxGtm_Tim_In.h:106
IfxGtm_Tim_In::dataCoherent
boolean dataCoherent
TRUE, if the duty and period values are measured from the same period.
Definition: IfxGtm_Tim_In.h:144
IfxGtm_Tim_In::newData
boolean newData
TRUE when values are updated, and if none of the counter CNT, CNTS have overflowed.
Definition: IfxGtm_Tim_In.h:146
IfxGtm_Tim_In_Config
Configuration structure for TIM input capture.
Definition: IfxGtm_Tim_In.h:158
IfxGtm_Tim_In_ConfigCapture::irqOnDatalost
boolean irqOnDatalost
If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled.
Definition: IfxGtm_Tim_In.h:104
IfxGtm_Tim_In_Input_adjacentChannel
Use the input from the adjacent channel.
Definition: IfxGtm_Tim_In.h:85
IfxGtm_Tim_In_ConfigFilter::clock
IfxGtm_Cmu_Tim_Filter_Clk clock
Timeout clock.
Definition: IfxGtm_Tim_In.h:113
IfxGtm_Tim_In::edgeCount
uint16 edgeCount
number of edges counted.
Definition: IfxGtm_Tim_In.h:153
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxGtm_Tim_In_ConfigFilter::fallingEdgeMode
IfxGtm_Tim_In_ConfigFilterMode fallingEdgeMode
Filter mode for falling edge.
Definition: IfxGtm_Tim_In.h:115
IfxGtm_Tim_In_isNewData
IFX_INLINE boolean IfxGtm_Tim_In_isNewData(IfxGtm_Tim_In *driver)
Indicates if new data are present (new data flag)
Definition: IfxGtm_Tim_In.h:302
IfxGtm_Tim_In_Config::gtm
Ifx_GTM * gtm
GTM used.
Definition: IfxGtm_Tim_In.h:160
IfxGtm_Tim_In_getPeriodTicks
IFX_INLINE sint32 IfxGtm_Tim_In_getPeriodTicks(IfxGtm_Tim_In *driver)
Return the period value in tick.
Definition: IfxGtm_Tim_In.h:284
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_Tim_In_ConfigTimeout::irqOnTimeout
boolean irqOnTimeout
If TRUE, the interrupt on timeout is enabled.
Definition: IfxGtm_Tim_In.h:130
Ifx_Assert.h
Assert functions.
IfxGtm_Tim_In_ConfigCapture
Configuration structure for TIM capture.
Definition: IfxGtm_Tim_In.h:99
IfxGtm_Tim_In_Config::capture
IfxGtm_Tim_In_ConfigCapture capture
Capture configuration.
Definition: IfxGtm_Tim_In.h:166
IfxGtm_Tim_In_ConfigFilter::fallingEdgeFilterTime
float32 fallingEdgeFilterTime
Falling edge filter time in second.
Definition: IfxGtm_Tim_In.h:117
IfxGtm_Tim_In_getPulseLengthTick
IFX_INLINE sint32 IfxGtm_Tim_In_getPulseLengthTick(IfxGtm_Tim_In *driver)
Return the pulse length value in tick.
Definition: IfxGtm_Tim_In.h:290
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:252
IfxGtm_Tim_In_Input_aux
Use the input from the aux.
Definition: IfxGtm_Tim_In.h:86
IfxGtm_Tim_In_Input_currentChannel
Use the input from the current channel.
Definition: IfxGtm_Tim_In.h:84
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:933
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Tim_In_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxGtm_Tim_In.h:164
IfxGtm_Tim_In::timIndex
IfxGtm_Tim timIndex
Index of the TIM module being used.
Definition: IfxGtm_Tim_In.h:151
IfxGtm_Tim_In::glitch
boolean glitch
TRUE if glitch is detected.
Definition: IfxGtm_Tim_In.h:149
IfxGtm_Tim.h
GTM basic functionality.
IfxGtm_Tim_In_ConfigFilter::input
IfxGtm_Tim_In_Input input
selected input
Definition: IfxGtm_Tim_In.h:119
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Cmu_Tim_Filter_Clk
IfxGtm_Cmu_Tim_Filter_Clk
Tim Filter counter frequency select.
Definition: IfxGtm_Cmu.h:94
IfxGtm_Tim_In_ConfigFilter::risingEdgeFilterTime
float32 risingEdgeFilterTime
Rising edge filter time in second.
Definition: IfxGtm_Tim_In.h:116
IfxGtm_Tim_TinMap
TIN pin mapping structure.
Definition: IfxGtm_PinMap.h:93
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:656
IfxGtm_Tim_In::overflowCnt
boolean overflowCnt
TRUE if the last measurement show an overflow in CNT.
Definition: IfxGtm_Tim_In.h:145
IfxGtm_Tim_In_ConfigTimeout
Configuration structure for TIM timeout.
Definition: IfxGtm_Tim_In.h:126
IfxGtm_Tim_In_ConfigFilter::inputPin
IfxGtm_Tim_TinMap * inputPin
If defined, this value overwrites the IfxGtm_Tim_In_Config.filter.input, IfxGtm_Tim_In_Config.timIndex, IfxGtm_Tim_In_Config.channelIndex.
Definition: IfxGtm_Tim_In.h:120
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold
Individual deglitch time mode (Hold)
Definition: IfxGtm_Tim_In.h:76
IfxGtm_Tim_In_ConfigCapture::irqOnCntOverflow
boolean irqOnCntOverflow
If TRUE, the interrupt on CNT overflow is enabled.
Definition: IfxGtm_Tim_In.h:102
IfxGtm_Tim_In_ConfigCapture::irqOnNewVal
boolean irqOnNewVal
If TRUE, the interrupt on new value is enabled.
Definition: IfxGtm_Tim_In.h:101
IfxGtm_Tim_In_getPeriodSecond
IFX_INLINE float32 IfxGtm_Tim_In_getPeriodSecond(IfxGtm_Tim_In *driver)
Return the period in second.
Definition: IfxGtm_Tim_In.h:278
IfxGtm_Tim_In_ConfigTimeout::timeout
float32 timeout
Timeout in second. Value of 0 disable the timeout functionality see 27.10.3 Timeout Detection Unit (T...
Definition: IfxGtm_Tim_In.h:129
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:64
IfxGtm_Tim_In
Driver Handle.
Definition: IfxGtm_Tim_In.h:139
IfxGtm_Tim_In_isDataLost
IFX_INLINE boolean IfxGtm_Tim_In_isDataLost(IfxGtm_Tim_In *driver)
Indicates if data were lost.
Definition: IfxGtm_Tim_In.h:296
IfxGtm_Tim_In_Config::filter
IfxGtm_Tim_In_ConfigFilter filter
Filter configuration.
Definition: IfxGtm_Tim_In.h:167
IfxGtm_Tim_In_update
IFX_EXTERN void IfxGtm_Tim_In_update(IfxGtm_Tim_In *driver)
Updates the period and duty cycle.
Definition: IfxGtm_Tim_In.c:290
IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation
Immediate edge propagation mode.
Definition: IfxGtm_Tim_In.h:74
IfxGtm_Tim_In::dataLost
boolean dataLost
TRUE if data are lost.
Definition: IfxGtm_Tim_In.h:147
IfxGtm_Tim_In_ConfigCapture::irqOnEcntOverflow
boolean irqOnEcntOverflow
If TRUE, the interrupt on ECNT (Edge counter) overflow is enabled.
Definition: IfxGtm_Tim_In.h:103
IfxGtm_Tim_In::periodTick
uint32 periodTick
Period value in clock ticks.
Definition: IfxGtm_Tim_In.h:142
IfxGtm_Tim_In_ConfigFilter::risingEdgeMode
IfxGtm_Tim_In_ConfigFilterMode risingEdgeMode
Filter mode for rising edge.
Definition: IfxGtm_Tim_In.h:114
IfxGtm_Tim_In_init
IFX_EXTERN boolean IfxGtm_Tim_In_init(IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
Initializes the input capture object.
Definition: IfxGtm_Tim_In.c:54
IfxGtm_Tim_In_clearNewData
IFX_INLINE void IfxGtm_Tim_In_clearNewData(IfxGtm_Tim_In *driver)
Clear the new data flag.
Definition: IfxGtm_Tim_In.h:260
IfxGtm_Tim_In::captureClockFrequency
float32 captureClockFrequency
Capture clock frequency in Hz.
Definition: IfxGtm_Tim_In.h:150
IfxGtm_Tim_In_Input
IfxGtm_Tim_In_Input
Input Source.
Definition: IfxGtm_Tim_In.h:82
IfxCpu.h
CPU basic functionality.
IfxGtm_Tim_In_initConfig
IFX_EXTERN void IfxGtm_Tim_In_initConfig(IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tim_In.c:254
IfxGtm_Tim_In_Config::irqMode
IfxGtm_IrqMode irqMode
Interrupt mode for the new value available.
Definition: IfxGtm_Tim_In.h:163
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown
Individual deglitch time mode (Up Down)
Definition: IfxGtm_Tim_In.h:75
IfxGtm_Tim_In_Config::isrPriority
Ifx_Priority isrPriority
Set the interrupt priority for new value available. If 0, no interrupt will be generated.
Definition: IfxGtm_Tim_In.h:165
IfxGtm_Tim_In::edgeCounterUpper
uint32 edgeCounterUpper
upper part of the edge counter
Definition: IfxGtm_Tim_In.h:148
IfxGtm_Tim_In_Config::timeout
IfxGtm_Tim_In_ConfigTimeout timeout
Timeout configuration.
Definition: IfxGtm_Tim_In.h:168
IfxGtm_Tim_In_getDutyPercent
IFX_INLINE float32 IfxGtm_Tim_In_getDutyPercent(IfxGtm_Tim_In *driver, boolean *dataCoherent)
return the dutycycle in percent
Definition: IfxGtm_Tim_In.h:266
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
sint32
long sint32
Definition: Platform_Types.h:134
IfxGtm_Tim_In_ConfigFilter::inputPinMode
IfxPort_InputMode inputPinMode
Input pin mode.
Definition: IfxGtm_Tim_In.h:121
IfxGtm_Tim_In_ConfigCapture::clock
IfxGtm_Cmu_Clk clock
Timer input clock.
Definition: IfxGtm_Tim_In.h:105
IfxGtm_Tim_In_onIsr
IFX_EXTERN void IfxGtm_Tim_In_onIsr(IfxGtm_Tim_In *driver)
will update the driver state To be called in the interrupt generated by the IfxGtm_Tim_In driver ...
Definition: IfxGtm_Tim_In.c:284
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Tim_In::channel
Ifx_GTM_TIM_CH * channel
TIM channel used.
Definition: IfxGtm_Tim_In.h:141
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:261
IfxGtm_Tim_In_ConfigFilter::irqOnGlitch
boolean irqOnGlitch
If TRUE, the interrupt on glitch is enabled.
Definition: IfxGtm_Tim_In.h:118
IfxGtm_Tim_In_ConfigFilterMode
IfxGtm_Tim_In_ConfigFilterMode
Config Filter Mode.
Definition: IfxGtm_Tim_In.h:72
IfxGtm_Tim_In_ConfigFilterMode_none
No filter.
Definition: IfxGtm_Tim_In.h:77
IfxGtm_Tim_In::channelIndex
IfxGtm_Tim_Ch channelIndex
Index of the TIM channel being used.
Definition: IfxGtm_Tim_In.h:152


iLLD_TC26B: IfxGtm_Tom.c Source File

  • Gtm
  • Std
IfxGtm_Tom.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Tom.h"
47 #include "IfxGtm_bf.h"
48 #include "IfxGtm_Cmu.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxGtm_Tom_Ch_clearOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
55 {
56 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
57 tomCh->IRQ_NOTIFY.B.CCU1TC = 1;
58 }
59
60
61 void IfxGtm_Tom_Ch_clearZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
62 {
63 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
64 tomCh->IRQ_NOTIFY.B.CCU0TC = 1;
65 }
66
67
68 float32 IfxGtm_Tom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
69 {
70 IfxGtm_Tom_Ch_ClkSrc clock;
71 IfxGtm_Cmu_Fxclk clkIndex[5] = {
72 IfxGtm_Cmu_Fxclk_0, /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 */
73 IfxGtm_Cmu_Fxclk_1, /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 */
74 IfxGtm_Cmu_Fxclk_2, /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 */
75 IfxGtm_Cmu_Fxclk_3, /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 */
76 IfxGtm_Cmu_Fxclk_4 /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 */
77 };
78
79 clock = IfxGtm_Tom_Ch_getClockSource(tom, channel);
80
81 if (clock == IfxGtm_Tom_Ch_ClkSrc_noClock)
82 {
83 return 0.0;
84 }
85 else
86 {
87 return IfxGtm_Cmu_getFxClkFrequency(gtm, clkIndex[clock], TRUE);
88 }
89 }
90
91
92 IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
93 {
94 IfxGtm_Tom_Ch_ClkSrc clock = IfxGtm_Tom_Ch_ClkSrc_noClock;
95
96 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
97
98 clock = (IfxGtm_Tom_Ch_ClkSrc)tomCh->CTRL.B.CLK_SRC_SR;
99
100 return clock;
101 }
102
103
104 uint32 IfxGtm_Tom_Ch_getCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
105 {
106 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
107
108 return tomCh->CM1.U;
109 }
110
111
112 volatile uint32 *IfxGtm_Tom_Ch_getCompareOnePointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
113 {
114 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
115
116 return (volatile uint32 *)&tomCh->CM1.U;
117 }
118
119
120 uint32 IfxGtm_Tom_Ch_getCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
121 {
122 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
123
124 return tomCh->CM0.U;
125 }
126
127
128 volatile uint32 *IfxGtm_Tom_Ch_getCompareZeroPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
129 {
130 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
131 return (volatile uint32 *)&tomCh->CM0.U;
132 }
133
134
135 boolean IfxGtm_Tom_Ch_getOutputLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
136 {
137 boolean result;
138 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
139
140 result = tomCh->STAT.B.OL == 1;
141
142 return result;
143 }
144
145
146 volatile Ifx_SRC_SRCR *IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
147 {
148 IFX_UNUSED_PARAMETER(gtm)
149 return &MODULE_SRC.GTM.GTM[0].TOM[tom][channel / 2];
150 }
151
152
153 Ifx_GTM_TOM_TGC *IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
154 {
155 Ifx_GTM_TOM_TGC *pointer;
156
157 if (tgcIndex == 0)
158 {
159 pointer = (Ifx_GTM_TOM_TGC *)&tom->TGC0_GLB_CTRL;
160 }
161 else
162 {
163 pointer = (Ifx_GTM_TOM_TGC *)&tom->TGC1_GLB_CTRL;
164 }
165
166 return pointer;
167 }
168
169
170 volatile uint32 *IfxGtm_Tom_Ch_getTimerPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
171 {
172 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
173 return (volatile uint32 *)&tomCh->CN0.U;
174 }
175
176
177 boolean IfxGtm_Tom_Ch_isOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
178 {
179 boolean result;
180 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
181 result = tomCh->IRQ_NOTIFY.B.CCU1TC != 0;
182 return result;
183 }
184
185
186 boolean IfxGtm_Tom_Ch_isZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
187 {
188 boolean result;
189 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
190 result = tomCh->IRQ_NOTIFY.B.CCU0TC != 0;
191 return result;
192 }
193
194
195 void IfxGtm_Tom_Ch_raiseInterruptOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
196 {
197 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
198 tomCh->IRQ_FORCINT.B.TRG_CCU1TC0 = 1;
199 }
200
201
202 void IfxGtm_Tom_Ch_raiseInterruptZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
203 {
204 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
205 tomCh->IRQ_FORCINT.B.TRG_CCU0TC0 = 1;
206 }
207
208
209 void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
210 {
211 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
212
213 tomCh->CTRL.B.CLK_SRC_SR = clock;
214 }
215
216
217 void IfxGtm_Tom_Ch_setCompare(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
218 {
219 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
220
221 tomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
222 tomCh->CM1.U = compareOne;
223 }
224
225
226 void IfxGtm_Tom_Ch_setCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
227 {
228 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
229
230 tomCh->CM1.U = compareOne; // TK: replaced .B access to optimize runtime
231 }
232
233
234 void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
235 {
236 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
237
238 tomCh->SR1.U = shadowOne; // TK: replaced .B access to optimize runtime
239 }
240
241
242 void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
243 {
244 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
245
246 tomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
247 tomCh->SR1.U = shadowOne;
248 }
249
250
251 void IfxGtm_Tom_Ch_setCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
252 {
253 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
254
255 tomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
256 }
257
258
259 void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
260 {
261 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
262
263 tomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
264 }
265
266
267 void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
268 {
269 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
270
271 tomCh->CN0.U = value; // TK: replaced .B access to optimize runtime
272 }
273
274
275 void IfxGtm_Tom_Ch_setGatedCounter(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
276 {
277 if (channel <= IfxGtm_Tom_Ch_7)
278 {
279 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
280
281 tomCh->CTRL.B.GCM = enabled ? 1 : 0;
282 }
283 }
284
285
286 void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
287 {
288 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
289
290 Ifx_GTM_TOM_CH_IRQ_EN en;
291 en.U = tomCh->IRQ_EN.U;
292
293 /* Disable all interrupts of the interrupt set to change mode */
294 tomCh->IRQ_EN.U = IFX_ZEROS;
295 tomCh->IRQ_MODE.B.IRQ_MODE = mode;
296 tomCh->IRQ_EN.U = en.U; /* Set the values back */
297
298 en.B.CCU0TC_IRQ_EN = interruptOnCompareZero ? 1 : 0;
299 en.B.CCU1TC_IRQ_EN = interruptOnCompareOne ? 1 : 0;
300 tomCh->IRQ_EN.U = en.U;
301 }
302
303
304 void IfxGtm_Tom_Ch_setOneShotMode(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
305 {
306 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
307
308 tomCh->CTRL.B.OSM = enabled ? 1 : 0;
309 }
310
311
312 void IfxGtm_Tom_Ch_setPcm(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
313 {
314 if (channel == IfxGtm_Tom_Ch_15)
315 {
316 tom->CH15.CTRL.B.BITREV = enabled ? 1 : 0;
317 }
318 }
319
320
321 void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
322 {
323 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
324
325 tomCh->CTRL.B.RST_CCU0 = event;
326 }
327
328
329 void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
330 {
331 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
332
333 tomCh->CTRL.B.SL = activeState == Ifx_ActiveState_high ? 1 : 0;
334 }
335
336
337 void IfxGtm_Tom_Ch_setSpe(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
338 {
339 if (channel <= IfxGtm_Tom_Ch_7)
340 {
341 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
342
343 tomCh->CTRL.B.SPEM = enabled ? 1 : 0;
344 }
345 }
346
347
348 void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
349 {
350 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
351
352 tomCh->CTRL.B.TRIGOUT = trigger;
353 }
354
355
356 uint32 IfxGtm_Tom_Tgc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
357 {
358 uint8 i;
359 uint32 reg = 0;
360 uint32 mask = enableMask | (disableMask << 16);
361
362 for (i = 0; i < IFXGTM_TOM_NUM_TGC_CHANNELS; i++)
363 {
364 /* Bitfield length is 2 bits */
365 uint8 shift = (i * 2) + bitfieldOffset;
366
367 if (mask & 0x1)
368 {
369 reg |= IfxGtm_FeatureControl_enable << shift;
370 }
371
372 if (mask & 0x10000)
373 {
374 reg |= IfxGtm_FeatureControl_disable << shift;
375 }
376
377 mask = mask >> 1;
378 }
379
380 return reg;
381 }
382
383
384 uint32 IfxGtm_Tom_Tgc_buildFeatureForChannel(IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
385 {
386 uint32 reg = 0;
387
388 /* Bitfield length is 2 bits */
389 uint8 shift = ((channel % 8) * 2) + bitfieldOffset;
390
391 if (enabled == 1)
392 {
393 reg = IfxGtm_FeatureControl_enable << shift;
394 }
395 else
396 {
397 reg = IfxGtm_FeatureControl_disable << shift;
398 }
399
400 return reg;
401 }
402
403
404 void IfxGtm_Tom_Tgc_enableChannel(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
405 {
406 uint32 value;
407
408 value = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, enabled, IFX_GTM_TOM_TGC0_ENDIS_CTRL_ENDIS_CTRL0_OFF);
409
410 if (immediate)
411 {
412 tgc->ENDIS_CTRL.U = value;
413 tgc->ENDIS_STAT.U = value;
414 }
415 else
416 {
417 tgc->ENDIS_CTRL.U = value;
418 }
419 }
420
421
422 void IfxGtm_Tom_Tgc_enableChannelOutput(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
423 {
424 uint32 value;
425
426 value = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, enabled, IFX_GTM_TOM_TGC0_OUTEN_CTRL_OUTEN_CTRL0_OFF);
427
428 if (immediate)
429 {
430 tgc->OUTEN_CTRL.U = value;
431 tgc->OUTEN_STAT.U = value;
432 }
433 else
434 {
435 tgc->OUTEN_CTRL.U = value;
436 }
437 }
438
439
440 void IfxGtm_Tom_Tgc_enableChannelUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
441 {
442 tgc->GLB_CTRL.U = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, enabled, IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
443 }
444
445
446 void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
447 {
448 uint32 value;
449
450 value = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_ENDIS_CTRL_ENDIS_CTRL0_OFF);
451
452 if (immediate)
453 {
454 tgc->ENDIS_CTRL.U = value;
455 tgc->ENDIS_STAT.U = value;
456 }
457 else
458 {
459 tgc->ENDIS_CTRL.U = value;
460 }
461 }
462
463
464 void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
465 {
466 uint32 value;
467
468 value = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_OUTEN_CTRL_OUTEN_CTRL0_OFF);
469
470 if (immediate)
471 {
472 tgc->OUTEN_CTRL.U = value;
473 tgc->OUTEN_STAT.U = value;
474 }
475 else
476 {
477 tgc->OUTEN_CTRL.U = value;
478 }
479 }
480
481
482 void IfxGtm_Tom_Tgc_enableChannelsTrigger(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
483 {
484 tgc->INT_TRIG.U = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_INT_TRIG_INT_TRIG0_OFF);
485 }
486
487
488 void IfxGtm_Tom_Tgc_enableChannelsUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
489 {
490 tgc->GLB_CTRL.U = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
491 }
492
493
494 void IfxGtm_Tom_Tgc_enableTimeTrigger(Ifx_GTM_TOM_TGC *tgc, boolean enabled)
495 {
496 tgc->ACT_TB.B.TB_TRIG = enabled ? 1 : 0;
497 }
498
499
500 void IfxGtm_Tom_Tgc_resetChannels(Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
501 {
502 uint8 i;
503 uint32 reg = 0;
504
505 for (i = 0; i < IFXGTM_TOM_NUM_TGC_CHANNELS; i++)
506 {
507 if (resetMask & 0x1)
508 {
509 reg |= 1 << i;
510 }
511
512 resetMask = resetMask >> 1;
513 }
514
515 tgc->GLB_CTRL.U = reg << IFX_GTM_TOM_TGC0_GLB_CTRL_RST_CH0_OFF;
516 }
517
518
519 void IfxGtm_Tom_Tgc_setChannelForceUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
520 {
521 uint32 regEnable, regReset;
522
523 regEnable = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, enabled, IFX_GTM_TOM_TGC0_FUPD_CTRL_FUPD_CTRL0_OFF);
524 regReset = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, resetEnabled, IFX_GTM_TOM_TGC0_FUPD_CTRL_RSTCN0_CH0_OFF);
525
526 tgc->FUPD_CTRL.U = regEnable | (regReset << 16);
527 }
528
529
530 void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
531 {
532 uint32 regEnable, regReset;
533
534 regEnable = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_FUPD_CTRL_FUPD_CTRL0_OFF);
535 regReset = IfxGtm_Tom_Tgc_buildFeature(resetEnableMask, resetDisableMask, IFX_GTM_TOM_TGC0_FUPD_CTRL_RSTCN0_CH0_OFF);
536
537 tgc->FUPD_CTRL.U = regEnable | regReset;
538 }
539
540
541 void IfxGtm_Tom_Tgc_setTimeTrigger(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
542 {
543 Ifx_GTM_TOM_TGC0_ACT_TB act_tb;
544
545 act_tb.U = tgc->ACT_TB.U;
546 act_tb.B.TBU_SEL = base;
547 act_tb.B.ACT_TB = value;
548 tgc->ACT_TB.U = act_tb.U;
549 }
550
551
552 void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
553 {
554 tgc->GLB_CTRL.U = 1 << IFX_GTM_TOM_TGC0_GLB_CTRL_HOST_TRIG_OFF;
555 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxGtm_Cmu_Fxclk_4
Definition: IfxGtm_Cmu.h:89
IfxGtm_Tom_Ch_setTriggerOutput
void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Tom.c:348
IfxGtm_Tom_Ch_raiseInterruptZero
void IfxGtm_Tom_Ch_raiseInterruptZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 0.
Definition: IfxGtm_Tom.c:202
IfxGtm_Tom_Tgc_setTimeTrigger
void IfxGtm_Tom_Tgc_setTimeTrigger(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value.
Definition: IfxGtm_Tom.c:541
IfxGtm_Tom_Ch_getCompareOnePointer
volatile uint32 * IfxGtm_Tom_Ch_getCompareOnePointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Tom.c:112
IfxGtm_Tom_Tgc_buildFeature
uint32 IfxGtm_Tom_Tgc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Tom.c:356
IfxGtm_Tom_Tgc_resetChannels
void IfxGtm_Tom_Tgc_resetChannels(Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
Reset one or more channels.
Definition: IfxGtm_Tom.c:500
IfxGtm_Cmu_Fxclk_3
Definition: IfxGtm_Cmu.h:88
IfxGtm_Tom_Ch_isZeroNotification
boolean IfxGtm_Tom_Ch_isZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Tom.c:186
IfxGtm_Tom_Ch_setResetSource
void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Tom.c:321
IfxGtm_Cmu_Fxclk_0
Definition: IfxGtm_Cmu.h:85
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:66
IfxGtm_Tom_Ch_setSignalLevel
void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Tom.c:329
IfxGtm_Tom_Ch_isOneNotification
boolean IfxGtm_Tom_Ch_isOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Tom.c:177
IfxGtm_Tom_Ch_getTgcPointer
Ifx_GTM_TOM_TGC * IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer.
Definition: IfxGtm_Tom.c:153
IfxGtm_Tom_Ch_setCompare
void IfxGtm_Tom_Ch_setCompare(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values.
Definition: IfxGtm_Tom.c:217
IfxGtm_Tom_Ch_setNotification
void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Tom.c:286
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Tom_Tgc_setChannelForceUpdate
void IfxGtm_Tom_Tgc_setChannelForceUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Tom.c:519
IfxGtm_Tom_Ch_setSpe
void IfxGtm_Tom_Ch_setSpe(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the SPE mode (channel 0 to 7 only)
Definition: IfxGtm_Tom.c:337
IfxGtm_Tom_Ch_OutputTrigger
IfxGtm_Tom_Ch_OutputTrigger
Reset source for channel counter CN0.
Definition: IfxGtm_Tom.h:93
IfxGtm_Cmu_Fxclk_1
Definition: IfxGtm_Cmu.h:86
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:283
IfxGtm_Tom_Ch_getCompareZeroPointer
volatile uint32 * IfxGtm_Tom_Ch_getCompareZeroPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero pointer.
Definition: IfxGtm_Tom.c:128
IfxGtm_Tom_Ch_setOneShotMode
void IfxGtm_Tom_Ch_setOneShotMode(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Tom.c:304
IfxGtm_FeatureControl_disable
disable
Definition: IfxGtm_cfg.h:245
IfxGtm_Tom_Ch_setCompareZero
void IfxGtm_Tom_Ch_setCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Tom.c:251
IfxGtm_Tom_Ch_getClockFrequency
float32 IfxGtm_Tom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz.
Definition: IfxGtm_Tom.c:68
IFXGTM_TOM_NUM_TGC_CHANNELS
#define IFXGTM_TOM_NUM_TGC_CHANNELS
Number of channels per TOM TGC.
Definition: IfxGtm_Tom.h:71
IfxGtm_Tom_Ch_getCompareZero
uint32 IfxGtm_Tom_Ch_getCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero value.
Definition: IfxGtm_Tom.c:120
IfxGtm_Cmu_Fxclk
IfxGtm_Cmu_Fxclk
Definition: IfxGtm_Cmu.h:83
IfxGtm_Tom_Ch_setCompareShadow
void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values.
Definition: IfxGtm_Tom.c:242
IfxGtm_Tom_Ch_clearZeroNotification
void IfxGtm_Tom_Ch_clearZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Tom.c:61
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:199
IFX_ZEROS
#define IFX_ZEROS
Definition: Ifx_Types.h:81
IfxGtm_Tom_Ch_setCounterValue
void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Tom.c:267
IfxGtm_FeatureControl_enable
enable
Definition: IfxGtm_cfg.h:246
IfxGtm_Tom_Ch_ClkSrc_noClock
no clock
Definition: IfxGtm_Tom.h:88
IfxGtm_Cmu_Fxclk_2
Definition: IfxGtm_Cmu.h:87
IfxGtm_Tom_Ch_getCompareOne
uint32 IfxGtm_Tom_Ch_getCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Tom.c:104
IfxGtm_Tom_Tgc_trigger
void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Tom.c:552
IfxGtm_Tom_Ch_clearOneNotification
void IfxGtm_Tom_Ch_clearOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Tom.c:54
IfxGtm_Tom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC.
Definition: IfxGtm_Tom.c:146
IfxGtm_Tom_Ch_setGatedCounter
void IfxGtm_Tom_Ch_setGatedCounter(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the gated counter mode (channel 0 to 7 only)
Definition: IfxGtm_Tom.c:275
IfxGtm_Cmu_getFxClkFrequency
float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz.
Definition: IfxGtm_Cmu.c:138
IfxGtm_Tom_Ch_setCompareOneShadow
void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Tom.c:234
IfxGtm_Tom_Ch_ResetEvent
IfxGtm_Tom_Ch_ResetEvent
Reset event for channel counter CN0.
Definition: IfxGtm_Tom.h:101
IfxGtm_Tom_Tgc_enableChannelUpdate
void IfxGtm_Tom_Tgc_enableChannelUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Tom.c:440
IfxGtm_Tom_Ch_getTimerPointer
volatile uint32 * IfxGtm_Tom_Ch_getTimerPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Tom.c:170
IfxGtm_Tom_Tgc_enableChannelsUpdate
void IfxGtm_Tom_Tgc_enableChannelsUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN)
Definition: IfxGtm_Tom.c:488
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:275
IfxGtm_Tom_Ch_setClockSource
void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source.
Definition: IfxGtm_Tom.c:209
IfxGtm_Tom_Ch_getClockSource
IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Tom.c:92
IfxGtm_Tom_Ch_setCompareOne
void IfxGtm_Tom_Ch_setCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Tom.c:226
IfxGtm_Tom_Tgc_setChannelsForceUpdate
void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Tom.c:530
IfxGtm_Tom_Tgc_enableChannelsOutput
void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Tom.c:464
IfxGtm_Tom_Tgc_enableTimeTrigger
void IfxGtm_Tom_Tgc_enableTimeTrigger(Ifx_GTM_TOM_TGC *tgc, boolean enabled)
Enable/disable the time base trigger.
Definition: IfxGtm_Tom.c:494
IfxGtm_Tom_Tgc_enableChannelOutput
void IfxGtm_Tom_Tgc_enableChannelOutput(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Tom.c:422
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Tom_Ch_7
TOM channel 7.
Definition: IfxGtm_cfg.h:293
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Tom_Tgc_buildFeatureForChannel
uint32 IfxGtm_Tom_Tgc_buildFeatureForChannel(IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel.
Definition: IfxGtm_Tom.c:384
IfxGtm_Tom_Ch_setPcm
void IfxGtm_Tom_Ch_setPcm(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the PCM mode (channel 15 only)
Definition: IfxGtm_Tom.c:312
IfxGtm_Tom_Tgc_enableChannelsTrigger
void IfxGtm_Tom_Tgc_enableChannelsTrigger(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger.
Definition: IfxGtm_Tom.c:482
IfxGtm_Tom_Tgc_enableChannels
void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Tom.c:446
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Tom_Ch_getOutputLevel
boolean IfxGtm_Tom_Ch_getOutputLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Gets the TOM output level.
Definition: IfxGtm_Tom.c:135
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxGtm_Tom_Ch_getChannelPointer
IFX_INLINE Ifx_GTM_TOM_CH * IfxGtm_Tom_Ch_getChannelPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the base addredd of selected Tom channel.
Definition: IfxGtm_Tom.h:522
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Tom_Ch_setCompareZeroShadow
void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Tom.c:259
IfxGtm_Tom_Ch_ClkSrc
IfxGtm_Tom_Ch_ClkSrc
Clock source for the TOM channels.
Definition: IfxGtm_Tom.h:81
IfxGtm_Tom.h
GTM basic functionality.
IfxGtm_Tom_Ch_15
TOM channel 15.
Definition: IfxGtm_cfg.h:301
IfxGtm_Tom_Ch_raiseInterruptOne
void IfxGtm_Tom_Ch_raiseInterruptOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 1.
Definition: IfxGtm_Tom.c:195
IfxGtm_Tom_Tgc_enableChannel
void IfxGtm_Tom_Tgc_enableChannel(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Tom.c:404


iLLD_TC26B: IfxGtm_Tom.h Source File

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IfxGtm_Tom.h
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1 /**
2 * \file IfxGtm_Tom.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 *
43 * \defgroup IfxLld_Gtm_Std_Tom Tom Basic Functionality
44 * \ingroup IfxLld_Gtm_Std
45 * \defgroup IfxLld_Gtm_Std_Tom_Enumerations TOM Enumerations
46 * \ingroup IfxLld_Gtm_Std_Tom
47 * \defgroup IfxLld_Gtm_Std_Tom_Channel_Functions TOM Channel Functions
48 * \ingroup IfxLld_Gtm_Std_Tom
49 * \defgroup IfxLld_Gtm_Std_Tom_TGC_Functions TOM TGC Functions
50 * \ingroup IfxLld_Gtm_Std_Tom
51 */
52
53 #ifndef IFXGTM_TOM_H
54 #define IFXGTM_TOM_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "_Impl/IfxGtm_cfg.h"
61 #include "IfxGtm.h"
62 #include "IfxGtm_Tbu.h"
63 #include "Src/Std/IfxSrc.h"
64
65 /******************************************************************************/
66 /*-----------------------------------Macros-----------------------------------*/
67 /******************************************************************************/
68
69 /** \brief Number of channels per TOM TGC
70 */
71 #define IFXGTM_TOM_NUM_TGC_CHANNELS (8)
72
73 /******************************************************************************/
74 /*--------------------------------Enumerations--------------------------------*/
75 /******************************************************************************/
76
77 /** \addtogroup IfxLld_Gtm_Std_Tom_Enumerations
78 * \{ */
79 /** \brief Clock source for the TOM channels
80 */
81 typedef enum
82 {
83 IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 = 0, /**< \brief div 1 */
84 IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 = 1, /**< \brief div 16 */
85 IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 = 2, /**< \brief div 256 */
86 IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 = 3, /**< \brief div 4096 */
87 IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 = 4, /**< \brief div 32768 */
88 IfxGtm_Tom_Ch_ClkSrc_noClock = 5 /**< \brief no clock */
89 } IfxGtm_Tom_Ch_ClkSrc;
90
91 /** \brief Reset source for channel counter CN0
92 */
93 typedef enum
94 {
95 IfxGtm_Tom_Ch_OutputTrigger_forward = 0, /**< \brief Forward the trigger from the previous channel */
96 IfxGtm_Tom_Ch_OutputTrigger_generate = 1 /**< \brief Generate the trigger from the current channel */
97 } IfxGtm_Tom_Ch_OutputTrigger;
98
99 /** \brief Reset event for channel counter CN0
100 */
101 typedef enum
102 {
103 IfxGtm_Tom_Ch_ResetEvent_onCm0 = 0,
104 IfxGtm_Tom_Ch_ResetEvent_onTrigger = 1
105 } IfxGtm_Tom_Ch_ResetEvent;
106
107 /** \} */
108
109 /** \addtogroup IfxLld_Gtm_Std_Tom_Channel_Functions
110 * \{ */
111
112 /******************************************************************************/
113 /*-------------------------Inline Function Prototypes-------------------------*/
114 /******************************************************************************/
115
116 /** \brief Returns the base addredd of selected Tom channel
117 * \param tom Pointer to the TOM object
118 * \param channel Channel index
119 * \return Pointer to channel base address
120 */
121 IFX_INLINE Ifx_GTM_TOM_CH *IfxGtm_Tom_Ch_getChannelPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
122
123 /******************************************************************************/
124 /*-------------------------Global Function Prototypes-------------------------*/
125 /******************************************************************************/
126
127 /** \brief Clears the channel One notification
128 * \param tom Pointer to the TOM object
129 * \param channel Channel index
130 * \return None
131 */
132 IFX_EXTERN void IfxGtm_Tom_Ch_clearOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
133
134 /** \brief Clears the channel Zero notification
135 * \param tom Pointer to the TOM object
136 * \param channel Channel index
137 * \return None
138 */
139 IFX_EXTERN void IfxGtm_Tom_Ch_clearZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
140
141 /** \brief Returns the TOM channel input clock frequency in Hz
142 * \param gtm Pointer to GTM module
143 * \param tom Pointer to the TOM object
144 * \param channel Channel index
145 * \return TOM channel input clock frequency in Hz
146 */
147 IFX_EXTERN float32 IfxGtm_Tom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
148
149 /** \brief Returns the channel clock source
150 * \param tom Pointer to the TOM object
151 * \param channel Channel index
152 * \return The clock source
153 */
154 IFX_EXTERN IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
155
156 /** \brief Returns the compare one value
157 * \param tom Pointer to the TOM object
158 * \param channel Channel index
159 * \return compare one value
160 */
161 IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
162
163 /** \brief Returns the compare one pointer
164 * \param tom Pointer to the TOM object
165 * \param channel Channel index
166 * \return compare one pointer
167 */
168 IFX_EXTERN volatile uint32 *IfxGtm_Tom_Ch_getCompareOnePointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
169
170 /** \brief Returns the compare zero value
171 * \param tom Pointer to the TOM object
172 * \param channel Channel index
173 * \return compare zero value
174 */
175 IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
176
177 /** \brief Returns the compare zero pointer
178 * \param tom Pointer to the TOM object
179 * \param channel Channel index
180 * \return compare zero pointer
181 */
182 IFX_EXTERN volatile uint32 *IfxGtm_Tom_Ch_getCompareZeroPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
183
184 /** \brief Gets the TOM output level
185 * \param tom Pointer to the TOM object
186 * \param channel Channel index
187 * \return TRUE the output is high, FALSE the output is low
188 */
189 IFX_EXTERN boolean IfxGtm_Tom_Ch_getOutputLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
190
191 /** \brief Returns a pointer to the TOM channel SRC
192 * \param gtm Pointer to GTM module
193 * \param tom Specifies the tom object
194 * \param channel Channel index
195 * \return Pointer to the TOM channel SRC
196 */
197 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel);
198
199 /** \brief Returns the TGC pointer
200 * \param tom Pointer to the TOM object
201 * \param tgcIndex TGC index
202 * \return TOM TGC object pointer
203 */
204 IFX_EXTERN Ifx_GTM_TOM_TGC *IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex);
205
206 /** \brief Returns the Timer pointer
207 * \param tom Pointer to the TOM object
208 * \param channel Channel index
209 * \return Timer pointer
210 */
211 IFX_EXTERN volatile uint32 *IfxGtm_Tom_Ch_getTimerPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
212
213 /** \brief Returns the status of channel One notification
214 * \param tom Pointer to the TOM object
215 * \param channel Channel index
216 * \return Status of channel One notification
217 */
218 IFX_EXTERN boolean IfxGtm_Tom_Ch_isOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
219
220 /** \brief Returns the status of channel Zero notification
221 * \param tom Pointer to the TOM object
222 * \param channel Channel index
223 * \return Status of channel Zero notification
224 */
225 IFX_EXTERN boolean IfxGtm_Tom_Ch_isZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
226
227 /** \brief Raises the interrupt for Compare 1
228 * \param tom Pointer to the TOM object
229 * \param channel Channel index
230 * \return None
231 */
232 IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
233
234 /** \brief Raises the interrupt for Compare 0
235 * \param tom Pointer to the TOM object
236 * \param channel Channel index
237 * \return None
238 */
239 IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
240
241 /** \brief Sets the channel clock source
242 * \param tom Pointer to the TOM object
243 * \param channel Channel index
244 * \param clock Channel clock source
245 * \return None
246 */
247 IFX_EXTERN void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock);
248
249 /** \brief Sets the compare 0 and 1 values
250 * \param tom Pointer to the TOM object
251 * \param channel Channel index
252 * \param compareZero Compare zero value
253 * \param compareOne Compare one value
254 * \return None
255 */
256 IFX_EXTERN void IfxGtm_Tom_Ch_setCompare(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne);
257
258 /** \brief Sets the compare 1 value
259 * \param tom Pointer to the TOM object
260 * \param channel Channel index
261 * \param compareOne Compare one value
262 * \return None
263 */
264 IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne);
265
266 /** \brief Sets the compare 1 shadow value
267 * \param tom Pointer to the TOM object
268 * \param channel Channel index
269 * \param shadowOne Compare one shadow value
270 * \return None
271 */
272 IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne);
273
274 /** \brief Sets the compare 0 and 1 shadow values
275 * \param tom Pointer to the TOM object
276 * \param channel Channel index
277 * \param shadowZero Compare zero shadow value
278 * \param shadowOne Compare one shadow value
279 * \return None
280 */
281 IFX_EXTERN void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne);
282
283 /** \brief Sets the compare 0 value
284 * \param tom Pointer to the TOM object
285 * \param channel Channel index
286 * \param compareZero Compare zero value
287 * \return None
288 */
289 IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero);
290
291 /** \brief Sets the compare 0 shadow value
292 * \param tom Pointer to the TOM object
293 * \param channel Channel index
294 * \param shadowZero Compare zero shadow value
295 * \return None
296 */
297 IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero);
298
299 /** \brief Sets the counter value
300 * \param tom Pointer to the TOM object
301 * \param channel Channel index
302 * \param value Counter value
303 * \return None
304 */
305 IFX_EXTERN void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value);
306
307 /** \brief Enable/disable the gated counter mode (channel 0 to 7 only)
308 * \param tom Pointer to the TOM object
309 * \param channel Channel index
310 * \param enabled If TRUE, the feature is enabled, else disabled
311 * \return None
312 */
313 IFX_EXTERN void IfxGtm_Tom_Ch_setGatedCounter(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled);
314
315 /** \brief Sets the channel notification
316 * \param tom Pointer to the TOM object
317 * \param channel Channel index
318 * \param mode Interrupt mode
319 * \param interruptOnCompareZero If TRUE, an interrupt is generated on compare 0, else no interrupt is generated
320 * \param interruptOnCompareOne If TRUE, an interrupt is generated on compare 1, else no interrupt is generated
321 * \return None
322 */
323 IFX_EXTERN void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne);
324
325 /** \brief Enable/disable the one shot mode
326 * \param tom Pointer to the TOM object
327 * \param channel Channel index
328 * \param enabled If TRUE, the feature is enabled, else disabled
329 * \return None
330 */
331 IFX_EXTERN void IfxGtm_Tom_Ch_setOneShotMode(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled);
332
333 /** \brief Enable/disable the PCM mode (channel 15 only)
334 * \param tom Pointer to the TOM object
335 * \param channel Channel index
336 * \param enabled If TRUE, the feature is enabled, else disabled
337 * \return None
338 */
339 IFX_EXTERN void IfxGtm_Tom_Ch_setPcm(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled);
340
341 /** \brief Sets the channel clock source either from local or from previous channel
342 * \param tom Pointer to the TOM object
343 * \param channel Channel index
344 * \param event Channel reset event
345 * \return None
346 */
347 IFX_EXTERN void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event);
348
349 /** \brief Sets the signal level
350 * \param tom Pointer to the TOM object
351 * \param channel Channel index
352 * \param activeState Signal level active state. In case the channel is reset, the output is set to not active. The signal is active between 0 and the leading edge (CM1) and inactive between the leading edge and the trailing edge (CM0).
353 * \return None
354 */
355 IFX_EXTERN void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState);
356
357 /** \brief Enable/disable the SPE mode (channel 0 to 7 only)
358 * \param tom Pointer to the TOM object
359 * \param channel Channel index
360 * \param enabled If TRUE, the feature is enabled, else disabled
361 * \return None
362 */
363 IFX_EXTERN void IfxGtm_Tom_Ch_setSpe(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled);
364
365 /** \brief Sets the channel trigger output
366 * \param tom Pointer to the TOM object
367 * \param channel Channel index
368 * \param trigger Channel trigger output mode
369 * \return None
370 */
371 IFX_EXTERN void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger);
372
373 /** \} */
374
375 /** \addtogroup IfxLld_Gtm_Std_Tom_TGC_Functions
376 * \{ */
377
378 /******************************************************************************/
379 /*-------------------------Inline Function Prototypes-------------------------*/
380 /******************************************************************************/
381
382 /** \brief Sets the tgc global control value
383 * \param tgc Pointer to the TGC object
384 * \param control global control value
385 * \return None
386 */
387 IFX_INLINE void IfxGtm_Tom_Tgc_writeGlobalControl(Ifx_GTM_TOM_TGC *tgc, uint32 control);
388
389 /******************************************************************************/
390 /*-------------------------Global Function Prototypes-------------------------*/
391 /******************************************************************************/
392
393 /** \brief Builds the register value for the feature enable/disable
394 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
395 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
396 * \param bitfieldOffset Offset of the channel 0 bitfield in the register
397 * \return The register value
398 */
399 IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset);
400
401 /** \brief Builds the register value for the feature enable/disable for a single channel
402 * \param channel Channel index
403 * \param enabled Enable/ Disable choise of the feature
404 * \param bitfieldOffset Offset of the channel 0 bitfield in the register
405 * \return The register value
406 */
407 IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeatureForChannel(IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset);
408
409 /** \brief Enable/disable one channel (ENDIS)
410 * \param tgc Pointer to the TGC object
411 * \param channel Channel index
412 * \param enabled Enable/ Disable choise of the feature
413 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
414 * \return None
415 */
416 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannel(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate);
417
418 /** \brief Enable/disable one channel output (OUTEN)
419 * \param tgc Pointer to the TGC object
420 * \param channel Channel index
421 * \param enabled Enable/ Disable choise of the feature
422 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
423 * \return None
424 */
425 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelOutput(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate);
426
427 /** \brief Enable/disable one channel for update (UPEN)
428 * \param tgc Pointer to the TGC object
429 * \param channel Channel index
430 * \param enabled Enable/ Disable choise of the feature
431 * \return None
432 */
433 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled);
434
435 /** \brief Enable/disable one or more channels (ENDIS)
436 * \param tgc Pointer to the TGC object
437 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
438 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
439 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
440 * \return None
441 */
442 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate);
443
444 /** \brief Enable/disable one or more channels output (OUTEN)
445 * \param tgc Pointer to the TGC object
446 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
447 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
448 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
449 * \return None
450 */
451 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate);
452
453 /** \brief Enable/disable the TGC channels trigger
454 * \param tgc Pointer to the TGC object
455 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
456 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
457 * \return None
458 */
459 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsTrigger(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask);
460
461 /** \brief Enable/disable one or more channels for update (UPEN)
462 * \param tgc Pointer to the TGC object
463 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
464 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
465 * \return None
466 */
467 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask);
468
469 /** \brief Enable/disable the time base trigger
470 * \param tgc Pointer to the TGC object
471 * \param enabled If TRUE, the trigger is enabled else disabled
472 * \return None
473 */
474 IFX_EXTERN void IfxGtm_Tom_Tgc_enableTimeTrigger(Ifx_GTM_TOM_TGC *tgc, boolean enabled);
475
476 /** \brief Reset one or more channels
477 * \param tgc Pointer to the TGC object
478 * \param resetMask Mask for the channel reset (bit 0: Channel 0, bit 1: channel 1, ...)
479 * \return None
480 */
481 IFX_EXTERN void IfxGtm_Tom_Tgc_resetChannels(Ifx_GTM_TOM_TGC *tgc, uint32 resetMask);
482
483 /** \brief Enable/disable one channel for update (FUPD)
484 * \param tgc Pointer to the TGC object
485 * \param channel Channel index
486 * \param enabled Enable/ Disable choise of the feature
487 * \param resetEnabled Enable/ Disable reset choise of the feature
488 * \return None
489 */
490 IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelForceUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled);
491
492 /** \brief Enable/disable one or more channels for the force update feature (FUPD)
493 * \param tgc Pointer to the TGC object
494 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
495 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
496 * \param resetEnableMask Mask for the enabled channels counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...) Channel 0, bit 1: channel 1, ...)
497 * \param resetDisableMask Mask for the disabled channels with no counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...)
498 * \return None
499 */
500 IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask);
501
502 /** \brief Sets the trigger time base and time base value
503 * \param tgc Pointer to the TGC object
504 * \param base Time base used for comparison
505 * \param value Compare value that raise the trigger
506 * \return None
507 */
508 IFX_EXTERN void IfxGtm_Tom_Tgc_setTimeTrigger(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value);
509
510 /** \brief Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
511 * \param tgc Pointer to the TGC object
512 * \return None
513 */
514 IFX_EXTERN void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc);
515
516 /** \} */
517
518 /******************************************************************************/
519 /*---------------------Inline Function Implementations------------------------*/
520 /******************************************************************************/
521
522 IFX_INLINE Ifx_GTM_TOM_CH *IfxGtm_Tom_Ch_getChannelPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
523 {
524 return (Ifx_GTM_TOM_CH *)((uint32)&tom->CH0.CTRL.U + 0x40 * channel);
525 }
526
527
528 IFX_INLINE void IfxGtm_Tom_Tgc_writeGlobalControl(Ifx_GTM_TOM_TGC *tgc, uint32 control)
529 {
530 tgc->GLB_CTRL.U = control;
531 }
532
533
534 #endif /* IFXGTM_TOM_H */
IfxGtm_Tom_Ch_setTriggerOutput
IFX_EXTERN void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Tom.c:348
IfxGtm_Tom_Ch_raiseInterruptZero
IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 0.
Definition: IfxGtm_Tom.c:202
IfxGtm_Tom_Tgc_setTimeTrigger
IFX_EXTERN void IfxGtm_Tom_Tgc_setTimeTrigger(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value.
Definition: IfxGtm_Tom.c:541
IfxGtm_Tom_Ch_getCompareOnePointer
IFX_EXTERN volatile uint32 * IfxGtm_Tom_Ch_getCompareOnePointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Tom.c:112
IfxGtm_Tom_Tgc_buildFeature
IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Tom.c:356
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1
div 16
Definition: IfxGtm_Tom.h:84
IfxGtm_Tom_Tgc_resetChannels
IFX_EXTERN void IfxGtm_Tom_Tgc_resetChannels(Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
Reset one or more channels.
Definition: IfxGtm_Tom.c:500
IfxGtm_Tom_Ch_isZeroNotification
IFX_EXTERN boolean IfxGtm_Tom_Ch_isZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Tom.c:186
IfxGtm_Tom_Ch_setResetSource
IFX_EXTERN void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Tom.c:321
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:66
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0
div 1
Definition: IfxGtm_Tom.h:83
IfxGtm_Tom_Ch_setSignalLevel
IFX_EXTERN void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Tom.c:329
IfxGtm_Tom_Ch_isOneNotification
IFX_EXTERN boolean IfxGtm_Tom_Ch_isOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Tom.c:177
IfxGtm_Tom_Ch_getTgcPointer
IFX_EXTERN Ifx_GTM_TOM_TGC * IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer.
Definition: IfxGtm_Tom.c:153
IfxGtm_Tom_Ch_setCompare
IFX_EXTERN void IfxGtm_Tom_Ch_setCompare(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values.
Definition: IfxGtm_Tom.c:217
IfxGtm_Tom_Ch_setNotification
IFX_EXTERN void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Tom.c:286
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxSrc.h
SRC basic functionality.
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Tom_Tgc_setChannelForceUpdate
IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelForceUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Tom.c:519
IfxGtm_Tom_Ch_setSpe
IFX_EXTERN void IfxGtm_Tom_Ch_setSpe(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the SPE mode (channel 0 to 7 only)
Definition: IfxGtm_Tom.c:337
IfxGtm_Tom_Ch_OutputTrigger
IfxGtm_Tom_Ch_OutputTrigger
Reset source for channel counter CN0.
Definition: IfxGtm_Tom.h:93
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:283
IfxGtm_Tom_Ch_getCompareZeroPointer
IFX_EXTERN volatile uint32 * IfxGtm_Tom_Ch_getCompareZeroPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero pointer.
Definition: IfxGtm_Tom.c:128
IfxGtm_Tom_Ch_setOneShotMode
IFX_EXTERN void IfxGtm_Tom_Ch_setOneShotMode(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Tom.c:304
IfxGtm_Tom_Ch_setCompareZero
IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Tom.c:251
IfxGtm_Tom_Ch_getClockFrequency
IFX_EXTERN float32 IfxGtm_Tom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz.
Definition: IfxGtm_Tom.c:68
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Tom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Tom.h:104
IfxGtm_Tom_Ch_getCompareZero
IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero value.
Definition: IfxGtm_Tom.c:120
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_Tom_Ch_setCompareShadow
IFX_EXTERN void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values.
Definition: IfxGtm_Tom.c:242
IfxGtm_Tom_Ch_clearZeroNotification
IFX_EXTERN void IfxGtm_Tom_Ch_clearZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Tom.c:61
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:199
IfxGtm_Tom_Ch_setCounterValue
IFX_EXTERN void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Tom.c:267
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3
div 4096
Definition: IfxGtm_Tom.h:86
IfxGtm_Tom_Ch_ClkSrc_noClock
no clock
Definition: IfxGtm_Tom.h:88
IfxGtm_Tom_Ch_getCompareOne
IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Tom.c:104
IfxGtm_Tom_Tgc_trigger
IFX_EXTERN void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Tom.c:552
IfxGtm_Tom_Ch_clearOneNotification
IFX_EXTERN void IfxGtm_Tom_Ch_clearOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Tom.c:54
IfxGtm_Tom_Ch_getSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC.
Definition: IfxGtm_Tom.c:146
IfxGtm_Tom_Ch_setGatedCounter
IFX_EXTERN void IfxGtm_Tom_Ch_setGatedCounter(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the gated counter mode (channel 0 to 7 only)
Definition: IfxGtm_Tom.c:275
IfxGtm_Tom_Ch_setCompareOneShadow
IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Tom.c:234
IfxGtm_Tom_Ch_ResetEvent
IfxGtm_Tom_Ch_ResetEvent
Reset event for channel counter CN0.
Definition: IfxGtm_Tom.h:101
IfxGtm_Tbu.h
GTM basic functionality.
IfxGtm_Tom_Tgc_enableChannelUpdate
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Tom.c:440
IfxGtm_Tom_Ch_getTimerPointer
IFX_EXTERN volatile uint32 * IfxGtm_Tom_Ch_getTimerPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Tom.c:170
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4
div 32768
Definition: IfxGtm_Tom.h:87
IfxGtm_Tom_Tgc_enableChannelsUpdate
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN)
Definition: IfxGtm_Tom.c:488
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Tom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Tom.h:95
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:275
IfxGtm_Tom_Ch_setClockSource
IFX_EXTERN void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source.
Definition: IfxGtm_Tom.c:209
IfxGtm_Tom_Ch_getClockSource
IFX_EXTERN IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Tom.c:92
IfxGtm_Tom_Ch_setCompareOne
IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Tom.c:226
IfxGtm_Tom_Tgc_setChannelsForceUpdate
IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Tom.c:530
IfxGtm_Tom_Tgc_enableChannelsOutput
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Tom.c:464
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2
div 256
Definition: IfxGtm_Tom.h:85
IfxGtm_Tom_Tgc_enableTimeTrigger
IFX_EXTERN void IfxGtm_Tom_Tgc_enableTimeTrigger(Ifx_GTM_TOM_TGC *tgc, boolean enabled)
Enable/disable the time base trigger.
Definition: IfxGtm_Tom.c:494
IfxGtm_Tom_Tgc_writeGlobalControl
IFX_INLINE void IfxGtm_Tom_Tgc_writeGlobalControl(Ifx_GTM_TOM_TGC *tgc, uint32 control)
Sets the tgc global control value.
Definition: IfxGtm_Tom.h:528
IfxGtm_Tom_Tgc_enableChannelOutput
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelOutput(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Tom.c:422
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Tom_Tgc_buildFeatureForChannel
IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeatureForChannel(IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel.
Definition: IfxGtm_Tom.c:384
IfxGtm_Tom_Ch_setPcm
IFX_EXTERN void IfxGtm_Tom_Ch_setPcm(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the PCM mode (channel 15 only)
Definition: IfxGtm_Tom.c:312
IfxGtm_Tom_Tgc_enableChannelsTrigger
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsTrigger(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger.
Definition: IfxGtm_Tom.c:482
IfxGtm_Tom_Tgc_enableChannels
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Tom.c:446
IfxGtm_Tom_Ch_getOutputLevel
IFX_EXTERN boolean IfxGtm_Tom_Ch_getOutputLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Gets the TOM output level.
Definition: IfxGtm_Tom.c:135
IfxGtm_Tom_Ch_getChannelPointer
IFX_INLINE Ifx_GTM_TOM_CH * IfxGtm_Tom_Ch_getChannelPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the base addredd of selected Tom channel.
Definition: IfxGtm_Tom.h:522
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm.h
GTM basic functionality.
IfxGtm_Tom_Ch_setCompareZeroShadow
IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Tom.c:259
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Tom_Ch_ClkSrc
IfxGtm_Tom_Ch_ClkSrc
Clock source for the TOM channels.
Definition: IfxGtm_Tom.h:81
IfxGtm_Tom_Ch_OutputTrigger_generate
Generate the trigger from the current channel.
Definition: IfxGtm_Tom.h:96
IfxGtm_Tom_Ch_raiseInterruptOne
IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 1.
Definition: IfxGtm_Tom.c:195
IfxGtm_Tom_Ch_ResetEvent_onCm0
Definition: IfxGtm_Tom.h:103
IfxGtm_Tom_Tgc_enableChannel
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannel(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Tom.c:404


iLLD_TC26B: IfxGtm_Tom_Pwm.c Source File

  • Gtm
  • Tom
  • Pwm
IfxGtm_Tom_Pwm.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_Pwm.c
3 * \brief GTM PWM details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Tom_Pwm.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 boolean IfxGtm_Tom_Pwm_init(IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
53 {
54 boolean result = TRUE;
55
56 driver->gtm = config->gtm;
57 driver->tomIndex = config->tom;
58
59 Ifx_GTM_TOM *tomSFR = &config->gtm->TOM[config->tom];
60 driver->tom = tomSFR;
61 driver->tomChannel = config->tomChannel;
62
63 if (config->tomChannel <= 7)
64 {
65 driver->tgc[0] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 0);
66 driver->tgc[1] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
67 }
68 else
69 {
70 driver->tgc[0] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
71 driver->tgc[1] = NULL_PTR; /* NOTE currently no concatenation between TOMs */
72 }
73
74 /* Initialize the timer part */
75 if (config->synchronousUpdateEnabled == 1)
76 {
77 IfxGtm_Tom_Tgc_enableChannelUpdate(driver->tgc[0], config->tomChannel, TRUE);
78 }
79
80 IfxGtm_Tom_Ch_setClockSource(tomSFR, config->tomChannel, config->clock);
81
82 IfxGtm_Tom_Tgc_setChannelForceUpdate(driver->tgc[0], config->tomChannel, TRUE, TRUE);
83
84 IfxGtm_Tom_Ch_setSignalLevel(tomSFR, config->tomChannel, config->signalLevel);
85
86 if (config->pin.outputPin != NULL_PTR)
87 {
88 IfxGtm_PinMap_setTomTout(config->pin.outputPin, config->pin.outputMode, config->pin.padDriver);
89 }
90
91 // enable and initialise interrupts if chosen
92 if ((config->interrupt.ccu0Enabled == 1) || (config->interrupt.ccu1Enabled == 1))
93 {
94 IfxGtm_Tom_Ch_setNotification(tomSFR, config->tomChannel, config->interrupt.mode, config->interrupt.ccu0Enabled, config->interrupt.ccu1Enabled);
95
96 volatile Ifx_SRC_SRCR *src;
97 src = IfxGtm_Tom_Ch_getSrcPointer(config->gtm, config->tom, config->tomChannel);
98 IfxSrc_init(src, config->interrupt.isrProvider, config->interrupt.isrPriority);
99 IfxSrc_enable(src);
100 }
101
102 if (config->synchronousUpdateEnabled == 1)
103 {
104 IfxGtm_Tom_Ch_setCompareZeroShadow(tomSFR, config->tomChannel, config->period);
105 IfxGtm_Tom_Ch_setCompareOneShadow(tomSFR, config->tomChannel, config->dutyCycle);
106 IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
107 }
108 else
109 {
110 IfxGtm_Tom_Ch_setCompareZero(tomSFR, config->tomChannel, config->period);
111 IfxGtm_Tom_Ch_setCompareOne(tomSFR, config->tomChannel, config->dutyCycle);
112 }
113
114 IfxGtm_Tom_Tgc_enableChannel(driver->tgc[0], config->tomChannel, TRUE, FALSE);
115 IfxGtm_Tom_Tgc_enableChannelOutput(driver->tgc[0], config->tomChannel, TRUE, FALSE);
116
117 if (config->immediateStartEnabled == TRUE)
118 {
119 IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
120 }
121
122 return result;
123 }
124
125
126 void IfxGtm_Tom_Pwm_initConfig(IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
127 {
128 config->gtm = gtm;
129 config->tom = IfxGtm_Tom_0;
130 config->tomChannel = IfxGtm_Tom_Ch_0;
131 config->clock = IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0;
132 config->period = 20;
133 config->dutyCycle = 10;
134 config->signalLevel = Ifx_ActiveState_high;
135 config->oneShotModeEnabled = FALSE;
136 config->synchronousUpdateEnabled = FALSE;
137 config->immediateStartEnabled = TRUE;
138 config->interrupt.ccu0Enabled = FALSE;
139 config->interrupt.ccu1Enabled = FALSE;
140 config->interrupt.mode = IfxGtm_IrqMode_pulseNotify;
141 config->interrupt.isrProvider = IfxSrc_Tos_cpu0;
142 config->interrupt.isrPriority = 0;
143 config->pin.outputPin = NULL_PTR;
144 config->pin.outputMode = IfxPort_OutputMode_pushPull;
145 config->pin.padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
146 }
147
148
149 void IfxGtm_Tom_Pwm_start(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
150 {
151 /* Enable channel if not enabled already */
152 IfxGtm_Tom_Tgc_enableChannel(driver->tgc[0], driver->tomChannel, TRUE, immediate);
153 IfxGtm_Tom_Tgc_enableChannelOutput(driver->tgc[0], driver->tomChannel, TRUE, immediate);
154
155 /* Trigger the start now */
156 IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
157 }
158
159
160 void IfxGtm_Tom_Pwm_stop(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
161 {
162 /* Disable channels */
163 IfxGtm_Tom_Tgc_enableChannel(driver->tgc[0], driver->tomChannel, FALSE, immediate);
164 IfxGtm_Tom_Tgc_enableChannelOutput(driver->tgc[0], driver->tomChannel, FALSE, immediate);
165
166 /* Trigger the stop now */
167 IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
168 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxGtm_Tom_Pwm_initConfig
void IfxGtm_Tom_Pwm_initConfig(IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tom_Pwm.c:126
IfxGtm_Tom_Pwm_Driver::tgc
Ifx_GTM_TOM_TGC * tgc[2]
Pointer to the TGC object.
Definition: IfxGtm_Tom_Pwm.h:184
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:133
IfxGtm_Tom_Pwm_start
void IfxGtm_Tom_Pwm_start(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
starts the PWM generation from the configured channel
Definition: IfxGtm_Tom_Pwm.c:149
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0
div 1
Definition: IfxGtm_Tom.h:83
IfxGtm_PinMap_setTomTout
void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:730
IfxGtm_Tom_Ch_setSignalLevel
void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Tom.c:329
IfxGtm_Tom_Ch_getTgcPointer
Ifx_GTM_TOM_TGC * IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer.
Definition: IfxGtm_Tom.c:153
IfxGtm_Tom_Pwm_pin::outputPin
IfxGtm_Tom_ToutMap * outputPin
output pin
Definition: IfxGtm_Tom_Pwm.h:151
IfxGtm_Tom_Ch_setNotification
void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Tom.c:286
IfxGtm_Tom_Pwm_Interrupt::ccu1Enabled
boolean ccu1Enabled
Enable/Disable choice for CCU1 trigger interrupt.
Definition: IfxGtm_Tom_Pwm.h:139
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxGtm_Tom_Pwm_Config::signalLevel
Ifx_ActiveState signalLevel
Signal Level.
Definition: IfxGtm_Tom_Pwm.h:168
IfxGtm_Tom_Pwm_Driver::tomIndex
IfxGtm_Tom tomIndex
Index of the TOM object used.
Definition: IfxGtm_Tom_Pwm.h:181
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGtm_Tom_Tgc_setChannelForceUpdate
void IfxGtm_Tom_Tgc_setChannelForceUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Tom.c:519
IfxGtm_Tom_Pwm_Config::interrupt
IfxGtm_Tom_Pwm_Interrupt interrupt
configuration structure for interrupt
Definition: IfxGtm_Tom_Pwm.h:171
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Tom_Pwm_Driver
Driver Handle.
Definition: IfxGtm_Tom_Pwm.h:178
IfxGtm_Tom_Pwm_Config::tom
IfxGtm_Tom tom
Index of the TOM object used.
Definition: IfxGtm_Tom_Pwm.h:163
IfxGtm_Tom_Pwm_stop
void IfxGtm_Tom_Pwm_stop(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel.
Definition: IfxGtm_Tom_Pwm.c:160
IfxGtm_Tom_Ch_setCompareZero
void IfxGtm_Tom_Ch_setCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Tom.c:251
IfxGtm_Tom_Pwm_Interrupt::ccu0Enabled
boolean ccu0Enabled
Enable/Disable choice for CCU0 trigger interrupt.
Definition: IfxGtm_Tom_Pwm.h:138
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:144
IfxGtm_Tom_Pwm.h
GTM PWM details.
IfxGtm_Tom_Pwm_Config::oneShotModeEnabled
boolean oneShotModeEnabled
Enable/Disable the one shot mode.
Definition: IfxGtm_Tom_Pwm.h:169
IfxGtm_Tom_Pwm_Interrupt::mode
IfxGtm_IrqMode mode
IRQ mode of interrupt.
Definition: IfxGtm_Tom_Pwm.h:140
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxGtm_Tom_Pwm_init
boolean IfxGtm_Tom_Pwm_init(IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
Initialises the Timer object.
Definition: IfxGtm_Tom_Pwm.c:52
IfxGtm_Tom_Tgc_trigger
void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Tom.c:552
IfxGtm_Tom_Pwm_pin::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxGtm_Tom_Pwm.h:153
IfxGtm_Tom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC.
Definition: IfxGtm_Tom.c:146
IfxGtm_Tom_Pwm_Config::dutyCycle
uint32 dutyCycle
Duty Cycle.
Definition: IfxGtm_Tom_Pwm.h:167
IfxGtm_Tom_Pwm_Config::pin
IfxGtm_Tom_Pwm_pin pin
configuration structure for output pin
Definition: IfxGtm_Tom_Pwm.h:172
IfxGtm_Tom_Pwm_Driver::tomChannel
IfxGtm_Tom_Ch tomChannel
TOM channel used for the timer.
Definition: IfxGtm_Tom_Pwm.h:182
IfxGtm_Tom_Pwm_Config::immediateStartEnabled
boolean immediateStartEnabled
enable/disable immediate start of PWM
Definition: IfxGtm_Tom_Pwm.h:173
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:68
IfxGtm_Tom_Ch_setCompareOneShadow
void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Tom.c:234
IfxGtm_Tom_Tgc_enableChannelUpdate
void IfxGtm_Tom_Tgc_enableChannelUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Tom.c:440
IfxGtm_Tom_Ch_0
TOM channel 0.
Definition: IfxGtm_cfg.h:286
IfxGtm_Tom_Pwm_Driver::tom
Ifx_GTM_TOM * tom
Pointer to the TOM object.
Definition: IfxGtm_Tom_Pwm.h:183
IfxGtm_Tom_Pwm_Config
Configuration structure.
Definition: IfxGtm_Tom_Pwm.h:160
IfxGtm_Tom_Ch_setClockSource
void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source.
Definition: IfxGtm_Tom.c:209
IfxGtm_Tom_Ch_setCompareOne
void IfxGtm_Tom_Ch_setCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Tom.c:226
IfxGtm_Tom_Pwm_Config::clock
IfxGtm_Tom_Ch_ClkSrc clock
Timer input clock.
Definition: IfxGtm_Tom_Pwm.h:165
IfxGtm_Tom_Pwm_Driver::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tom_Pwm.h:180
IfxGtm_Tom_Pwm_Interrupt::isrPriority
Ifx_Priority isrPriority
Priority for Ccu0/1 interrupt.
Definition: IfxGtm_Tom_Pwm.h:142
IfxGtm_Tom_0
TOM object 0.
Definition: IfxGtm_cfg.h:277
IfxGtm_Tom_Tgc_enableChannelOutput
void IfxGtm_Tom_Tgc_enableChannelOutput(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Tom.c:422
IfxGtm_Tom_Pwm_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Type of Service for Ccu0/1 interrupt.
Definition: IfxGtm_Tom_Pwm.h:141
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxGtm_Tom_Pwm_Config::period
uint32 period
Period.
Definition: IfxGtm_Tom_Pwm.h:166
IfxGtm_Tom_Ch_setCompareZeroShadow
void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Tom.c:259
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxGtm_Tom_Pwm_Config::synchronousUpdateEnabled
boolean synchronousUpdateEnabled
Synchronous or Asynchronous update.
Definition: IfxGtm_Tom_Pwm.h:170
IfxGtm_Tom_Pwm_pin::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxGtm_Tom_Pwm.h:152
IfxGtm_Tom_Tgc_enableChannel
void IfxGtm_Tom_Tgc_enableChannel(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Tom.c:404


iLLD_TC26B: IfxGtm_Tom_Pwm.h Source File

  • Gtm
  • Tom
  • Pwm
IfxGtm_Tom_Pwm.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_Pwm.h
3 * \brief GTM PWM details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Tom_Pwm_Usage How to use the GTM TOM PWM Driver
42 * \ingroup IfxLld_Gtm_Tom_Pwm
43 *
44 * This interface allows to generate simple PWM signal on a TOM out put and can generate interrupts if enabled.
45 * this output can also be routed to port pin if required.
46 *
47 * \section Preparation Preparation
48 * \subsection Include Include Files
49 *
50 * Include following header file into your C code:
51 * \code
52 * #include <Gtm/Tom/Pwm/IfxGtm_Tom_Pwm.h>
53 * \endcode
54 *
55 * \subsection Variables Variables
56 * define global variables if necessary
57 *
58 * \code
59 * Ifx_GTM *gtm = &MODULE_GTM;
60 * #define TOM0_CH0_PRIO 10
61 * \endcode
62 *
63 * \subsection Interrupts Interrupts
64 * define Interrupts if needed
65 *
66 * \code
67 * IFX_INTERRUPT(TOM0Ch0_ISR, 0, TOM0_CH0_PRIO)
68 * {}
69 * \endcode
70 *
71 * \subsection Initialization Initialization
72 *
73 * \code
74 * // install interrupt handlers
75 * IfxCpu_Irq_installInterruptHandler (TOM0Ch0_ISR, TOM0_CH0_PRIO);
76 *
77 * // enable GTM clock
78 * {
79 * float32 frequency = IfxGtm_Cmu_getModuleFrequency(gtm);
80 * // Enables the GTM
81 * IfxGtm_enable(gtm);
82 * // Set the global clock frequency to the max
83 * IfxGtm_Cmu_setGclkFrequency(gtm, frequency);
84 * // Set the CMU CLK0
85 * IfxGtm_Cmu_setClkFrequency(gtm, IfxGtm_Cmu_Clk_0, frequency);
86 * // FXCLK: used by TOM and CLK0: used by ATOM
87 * IfxGtm_Cmu_enableClocks(gtm, IFXGTM_CMU_CLKEN_FXCLK | IFXGTM_CMU_CLKEN_CLK0);
88 * }
89 *
90 * // initialise TOM
91 * IfxGtm_Tom_Pwm_Config tomConfig; \\configuration structure
92 * IfxGtm_Tom_Pwm_Driver tomHandle; \\ handle
93 *
94 * IfxGtm_Tom_Pwm_initConfig(&tomConfig, gtm);
95 *
96 * tomConfig.tomChannel = IfxGtm_Tom_Ch_0;
97 * tomConfig.period = 20;
98 * tomConfig.dutyCycle = 10;
99 * tomConfig.interrupt.ccu0Enabled = TRUE;
100 * tomConfig.interrupt.isrPriority = TOM0_CH0_PRIO;
101 * tomConfig.pin.outputPin = &IfxGtm_TOM0_0_TOUT106_P10_4_OUT;
102 *
103 * IfxGtm_Tom_Pwm_init(&tomHandle, &tomConfig);
104 * \endcode
105 *
106 * TOM will be now generating a PWM signal on the selected port pin while generating selected interrupt according to above configured period and duty cycle.
107 *
108 * \defgroup IfxLld_Gtm_Tom_Pwm TOM PWM Interface Driver
109 * \ingroup IfxLld_Gtm_Tom
110 * \defgroup IfxLld_Gtm_Tom_Pwm_DataStructures TOM PWM DataStructures
111 * \ingroup IfxLld_Gtm_Tom_Pwm
112 * \defgroup IfxLld_Gtm_Tom_Pwm_Pwm_Functions Pwm Functions
113 * \ingroup IfxLld_Gtm_Tom_Pwm
114 */
115
116 #ifndef IFXGTM_TOM_PWM_H
117 #define IFXGTM_TOM_PWM_H 1
118
119 /******************************************************************************/
120 /*----------------------------------Includes----------------------------------*/
121 /******************************************************************************/
122
123 #include "_PinMap/IfxGtm_PinMap.h"
124 #include "Gtm/Std/IfxGtm_Tom.h"
125 #include "Gtm/Std/IfxGtm_Cmu.h"
126 #include "Cpu/Std/IfxCpu.h"
127
128 /******************************************************************************/
129 /*-----------------------------Data Structures--------------------------------*/
130 /******************************************************************************/
131
132 /** \addtogroup IfxLld_Gtm_Tom_Pwm_DataStructures
133 * \{ */
134 /** \brief configuration structure for interrupts
135 */
136 typedef struct
137 {
138 boolean ccu0Enabled; /**< \brief Enable/Disable choice for CCU0 trigger interrupt */
139 boolean ccu1Enabled; /**< \brief Enable/Disable choice for CCU1 trigger interrupt */
140 IfxGtm_IrqMode mode; /**< \brief IRQ mode of interrupt */
141 IfxSrc_Tos isrProvider; /**< \brief Type of Service for Ccu0/1 interrupt */
142 Ifx_Priority isrPriority; /**< \brief Priority for Ccu0/1 interrupt */
143 } IfxGtm_Tom_Pwm_Interrupt;
144
145 /** \} */
146
147 /** \brief configuration structure for output pin
148 */
149 typedef struct
150 {
151 IfxGtm_Tom_ToutMap *outputPin; /**< \brief output pin */
152 IfxPort_OutputMode outputMode; /**< \brief Output mode */
153 IfxPort_PadDriver padDriver; /**< \brief Pad driver */
154 } IfxGtm_Tom_Pwm_pin;
155
156 /** \addtogroup IfxLld_Gtm_Tom_Pwm_DataStructures
157 * \{ */
158 /** \brief Configuration structure
159 */
160 typedef struct
161 {
162 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
163 IfxGtm_Tom tom; /**< \brief Index of the TOM object used */
164 IfxGtm_Tom_Ch tomChannel; /**< \brief TOM channel used for the timer */
165 IfxGtm_Tom_Ch_ClkSrc clock; /**< \brief Timer input clock */
166 uint32 period; /**< \brief Period */
167 uint32 dutyCycle; /**< \brief Duty Cycle */
168 Ifx_ActiveState signalLevel; /**< \brief Signal Level */
169 boolean oneShotModeEnabled; /**< \brief Enable/Disable the one shot mode */
170 boolean synchronousUpdateEnabled; /**< \brief Synchronous or Asynchronous update */
171 IfxGtm_Tom_Pwm_Interrupt interrupt; /**< \brief configuration structure for interrupt */
172 IfxGtm_Tom_Pwm_pin pin; /**< \brief configuration structure for output pin */
173 boolean immediateStartEnabled; /**< \brief enable/disable immediate start of PWM */
174 } IfxGtm_Tom_Pwm_Config;
175
176 /** \brief Driver Handle
177 */
178 typedef struct
179 {
180 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
181 IfxGtm_Tom tomIndex; /**< \brief Index of the TOM object used */
182 IfxGtm_Tom_Ch tomChannel; /**< \brief TOM channel used for the timer */
183 Ifx_GTM_TOM *tom; /**< \brief Pointer to the TOM object */
184 Ifx_GTM_TOM_TGC *tgc[2]; /**< \brief Pointer to the TGC object */
185 } IfxGtm_Tom_Pwm_Driver;
186
187 /** \} */
188
189 /** \addtogroup IfxLld_Gtm_Tom_Pwm_Pwm_Functions
190 * \{ */
191
192 /******************************************************************************/
193 /*-------------------------Global Function Prototypes-------------------------*/
194 /******************************************************************************/
195
196 /** \brief Initialises the Timer object
197 * \param driver TOM Handle
198 * \param config Configuration structure for TOM Timer
199 * \return TRUE on success else FALSE
200 */
201 IFX_EXTERN boolean IfxGtm_Tom_Pwm_init(IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config);
202
203 /** \brief Initializes the configuration structure to default
204 * \param config This parameter is Initialised by the function
205 * \param gtm Pointer to GTM module
206 * \return None
207 */
208 IFX_EXTERN void IfxGtm_Tom_Pwm_initConfig(IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm);
209
210 /** \} */
211
212 /******************************************************************************/
213 /*-------------------------Global Function Prototypes-------------------------*/
214 /******************************************************************************/
215
216 /** \brief starts the PWM generation from the configured channel
217 * \param driver handle for the PWM device
218 * \param immediate immediate start or not
219 * \return None
220 */
221 IFX_EXTERN void IfxGtm_Tom_Pwm_start(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate);
222
223 /** \brief Stops the PWM generation from the configured channel
224 * \param driver handle for the PWM device
225 * \param immediate immediate start or not.
226 * \return None
227 */
228 IFX_EXTERN void IfxGtm_Tom_Pwm_stop(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate);
229
230 #endif /* IFXGTM_TOM_PWM_H */
IfxGtm_Tom_Pwm_initConfig
IFX_EXTERN void IfxGtm_Tom_Pwm_initConfig(IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tom_Pwm.c:126
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxGtm_Tom_Pwm_stop
IFX_EXTERN void IfxGtm_Tom_Pwm_stop(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel.
Definition: IfxGtm_Tom_Pwm.c:160
IfxGtm_Tom_Pwm_Interrupt
configuration structure for interrupts
Definition: IfxGtm_Tom_Pwm.h:136
IfxGtm_Tom_Pwm_pin::outputPin
IfxGtm_Tom_ToutMap * outputPin
output pin
Definition: IfxGtm_Tom_Pwm.h:151
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Tom_Pwm_Interrupt::ccu1Enabled
boolean ccu1Enabled
Enable/Disable choice for CCU1 trigger interrupt.
Definition: IfxGtm_Tom_Pwm.h:139
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_Tom_Pwm_Config::signalLevel
Ifx_ActiveState signalLevel
Signal Level.
Definition: IfxGtm_Tom_Pwm.h:168
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Tom_Pwm_Driver::tomIndex
IfxGtm_Tom tomIndex
Index of the TOM object used.
Definition: IfxGtm_Tom_Pwm.h:181
IfxGtm_Tom_Pwm_pin
configuration structure for output pin
Definition: IfxGtm_Tom_Pwm.h:149
IfxGtm_Tom_Pwm_Config::interrupt
IfxGtm_Tom_Pwm_Interrupt interrupt
configuration structure for interrupt
Definition: IfxGtm_Tom_Pwm.h:171
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:283
IfxGtm_Tom_Pwm_Driver
Driver Handle.
Definition: IfxGtm_Tom_Pwm.h:178
IfxGtm_Tom_Pwm_Config::tom
IfxGtm_Tom tom
Index of the TOM object used.
Definition: IfxGtm_Tom_Pwm.h:163
IfxGtm_Tom_Pwm_Interrupt::ccu0Enabled
boolean ccu0Enabled
Enable/Disable choice for CCU0 trigger interrupt.
Definition: IfxGtm_Tom_Pwm.h:138
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Tom_Pwm_Config::oneShotModeEnabled
boolean oneShotModeEnabled
Enable/Disable the one shot mode.
Definition: IfxGtm_Tom_Pwm.h:169
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:199
IfxGtm_Tom_Pwm_Interrupt::mode
IfxGtm_IrqMode mode
IRQ mode of interrupt.
Definition: IfxGtm_Tom_Pwm.h:140
IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:116
IfxGtm_Tom_Pwm_init
IFX_EXTERN boolean IfxGtm_Tom_Pwm_init(IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
Initialises the Timer object.
Definition: IfxGtm_Tom_Pwm.c:52
IfxGtm_Tom_Pwm_pin::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxGtm_Tom_Pwm.h:153
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxGtm_Tom_Pwm_Config::dutyCycle
uint32 dutyCycle
Duty Cycle.
Definition: IfxGtm_Tom_Pwm.h:167
IfxGtm_Tom_Pwm_Config::pin
IfxGtm_Tom_Pwm_pin pin
configuration structure for output pin
Definition: IfxGtm_Tom_Pwm.h:172
IfxGtm_Tom_Pwm_Config::tomChannel
IfxGtm_Tom_Ch tomChannel
TOM channel used for the timer.
Definition: IfxGtm_Tom_Pwm.h:164
IfxGtm_Tom_Pwm_Config::immediateStartEnabled
boolean immediateStartEnabled
enable/disable immediate start of PWM
Definition: IfxGtm_Tom_Pwm.h:173
IfxCpu.h
CPU basic functionality.
IfxGtm_Tom_Pwm_Driver::tom
Ifx_GTM_TOM * tom
Pointer to the TOM object.
Definition: IfxGtm_Tom_Pwm.h:183
IfxGtm_Tom_Pwm_Config
Configuration structure.
Definition: IfxGtm_Tom_Pwm.h:160
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:275
IfxGtm_Tom_Pwm_start
IFX_EXTERN void IfxGtm_Tom_Pwm_start(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
starts the PWM generation from the configured channel
Definition: IfxGtm_Tom_Pwm.c:149
IfxGtm_Tom_Pwm_Config::clock
IfxGtm_Tom_Ch_ClkSrc clock
Timer input clock.
Definition: IfxGtm_Tom_Pwm.h:165
IfxGtm_Tom_Pwm_Config::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tom_Pwm.h:162
IfxGtm_Tom_Pwm_Interrupt::isrPriority
Ifx_Priority isrPriority
Priority for Ccu0/1 interrupt.
Definition: IfxGtm_Tom_Pwm.h:142
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Tom_Pwm_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Type of Service for Ccu0/1 interrupt.
Definition: IfxGtm_Tom_Pwm.h:141
IfxGtm_Tom_Pwm_Config::period
uint32 period
Period.
Definition: IfxGtm_Tom_Pwm.h:166
IfxGtm_Tom_Ch_ClkSrc
IfxGtm_Tom_Ch_ClkSrc
Clock source for the TOM channels.
Definition: IfxGtm_Tom.h:81
IfxGtm_Tom_Pwm_Config::synchronousUpdateEnabled
boolean synchronousUpdateEnabled
Synchronous or Asynchronous update.
Definition: IfxGtm_Tom_Pwm.h:170
IfxGtm_Tom.h
GTM basic functionality.
IfxGtm_Tom_Pwm_pin::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxGtm_Tom_Pwm.h:152


iLLD_TC26B: IfxGtm_Tom_PwmHl.c Source File

  • Gtm
  • Tom
  • PwmHl
IfxGtm_Tom_PwmHl.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_PwmHl.c
3 * \brief GTM PWMHL details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Tom_PwmHl.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "stddef.h"
49 #include "string.h"
50
51 /** \addtogroup IfxLld_Gtm_Tom_PwmHl_PwmHl_StdIf_Functions
52 * \{ */
53 /******************************************************************************/
54 /*------------------------Inline Function Prototypes--------------------------*/
55 /******************************************************************************/
56
57 /** \brief Inverts the active state
58 * \param activeState Active state
59 * \return State
60 */
61 IFX_INLINE Ifx_ActiveState IfxGtm_Tom_PwmHl_invertActiveState(Ifx_ActiveState activeState);
62
63 /******************************************************************************/
64 /*-----------------------Private Function Prototypes--------------------------*/
65 /******************************************************************************/
66
67 /** \brief Sets switched to OFF
68 * \param driver GTM TOM PWM driver
69 * \param tOn ON time
70 * \param shift Shift value in ticks
71 * \return None
72 */
73 IFX_STATIC void IfxGtm_Tom_PwmHl_updateAndShiftOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
74
75 /** \brief Updates the x output duty cycle in center aligned and center aligned inverted modes
76 * \param driver GTM TOM PWM driver
77 * \param tOn T on
78 * \return None
79 */
80 IFX_STATIC void IfxGtm_Tom_PwmHl_updateCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
81
82 /** \brief Updates the x output duty cycle in edge aligned modes (left and right aligned)
83 * \param driver GTM TOM PWM driver
84 * \param tOn T on
85 * \return None
86 */
87 IFX_STATIC void IfxGtm_Tom_PwmHl_updateEdgeAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
88
89 /** \brief Set the outputs to inactive
90 * \param driver GTM TOM PWM driver
91 * \param tOn T on
92 * \return None
93 */
94 IFX_STATIC void IfxGtm_Tom_PwmHl_updateOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
95
96 /** \brief Update Pulse
97 * \param driver GTM TOM PWM driver
98 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
99 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
100 * \return None
101 */
102 IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset);
103
104 /** \brief Set Pulse to OFF
105 * \param driver GTM TOM PWM driver
106 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
107 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
108 * \return None
109 */
110 IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulseOff(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset);
111
112 /** \brief Update Shift Center Aligned
113 * \param driver GTM TOM PWM driver
114 * \param tOn ON time
115 * \param shift Shift value in ticks
116 * \return None
117 */
118 IFX_STATIC void IfxGtm_Tom_PwmHl_updateShiftCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
119
120 /** \} */
121
122 /******************************************************************************/
123 /*------------------------Private Variables/Constants-------------------------*/
124 /******************************************************************************/
125
126 IFX_STATIC IFX_CONST IfxGtm_Tom_PwmHl_Mode IfxGtm_Tom_PwmHl_modes[Ifx_Pwm_Mode_off + 1] = {
127 {Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Tom_PwmHl_updateCenterAligned, &IfxGtm_Tom_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_PwmHl_updatePulse },
128 {Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Tom_PwmHl_updateCenterAligned, &IfxGtm_Tom_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_PwmHl_updatePulse },
129 {Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Tom_PwmHl_updateEdgeAligned, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulse },
130 {Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Tom_PwmHl_updateEdgeAligned, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulse },
131 {Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Tom_PwmHl_updateOff, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulseOff}
132 };
133
134 /******************************************************************************/
135 /*---------------------Inline Function Implementations------------------------*/
136 /******************************************************************************/
137
138 IFX_INLINE Ifx_ActiveState IfxGtm_Tom_PwmHl_invertActiveState(Ifx_ActiveState activeState)
139 {
140 return activeState == Ifx_ActiveState_low ? Ifx_ActiveState_high : Ifx_ActiveState_low;
141 }
142
143
144 /******************************************************************************/
145 /*-------------------------Function Implementations---------------------------*/
146 /******************************************************************************/
147
148 float32 IfxGtm_Tom_PwmHl_getDeadtime(IfxGtm_Tom_PwmHl *driver)
149 {
150 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.deadtime);
151 }
152
153
154 float32 IfxGtm_Tom_PwmHl_getMinPulse(IfxGtm_Tom_PwmHl *driver)
155 {
156 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.minPulse - driver->base.deadtime);
157 }
158
159
160 Ifx_Pwm_Mode IfxGtm_Tom_PwmHl_getMode(IfxGtm_Tom_PwmHl *driver)
161 {
162 return driver->base.mode;
163 }
164
165
166 boolean IfxGtm_Tom_PwmHl_init(IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
167 {
168 boolean result = TRUE;
169 uint16 channelMask;
170 uint16 channelsMask = 0;
171 uint32 channelIndex;
172 uint16 maskShift = 0;
173 IfxGtm_Tom_Timer *timer = config->timer;
174
175 driver->base.mode = Ifx_Pwm_Mode_init;
176 driver->timer = timer;
177 driver->base.setMode = 0;
178 driver->base.inverted = FALSE;
179 driver->base.ccxActiveState = config->base.ccxActiveState;
180 driver->base.coutxActiveState = config->base.coutxActiveState;
181 driver->base.channelCount = config->base.channelCount;
182
183 IfxGtm_Tom_PwmHl_setDeadtime(driver, config->base.deadtime);
184 IfxGtm_Tom_PwmHl_setMinPulse(driver, config->base.minPulse);
185
186 driver->tom = &(timer->gtm->TOM[config->tom]);
187
188 /* config->ccx[0] is used for the definition of the TGC */
189 if (config->ccx[0]->channel <= 7)
190 {
191 driver->tgc = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 0);
192 }
193 else
194 {
195 driver->tgc = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
196 }
197
198 maskShift = (config->ccx[0]->channel <= 7) ? 0 : 8;
199
200 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.channelCount <= IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS);
201
202 IfxGtm_Tom_Ch_ClkSrc clock = IfxGtm_Tom_Ch_getClockSource(timer->tom, timer->timerChannel);
203
204 for (channelIndex = 0; channelIndex < config->base.channelCount; channelIndex++)
205 {
206 IfxGtm_Tom_Ch channel;
207 /* CCX */
208 channel = config->ccx[channelIndex]->channel;
209 driver->ccx[channelIndex] = channel;
210 channelMask = 1 << (channel - maskShift);
211 channelsMask |= channelMask;
212
213 /* Initialize the timer part */
214 IfxGtm_Tom_Ch_setClockSource(driver->tom, channel, clock);
215
216 /* Initialize the SOUR reset value and enable the channel */
217 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, !driver->base.inverted
218 ? config->base.ccxActiveState
219 : IfxGtm_Tom_PwmHl_invertActiveState(config->base.ccxActiveState));
220 IfxGtm_Tom_Tgc_enableChannels(driver->tgc, channelMask, 0, TRUE); /* Write the SOUR outout with !SL */
221 IfxGtm_Tom_Tgc_enableChannelsOutput(driver->tgc, channelMask, 0, TRUE);
222
223 /* Set the SL to the required level for run time */
224 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, driver->base.inverted
225 ? config->base.ccxActiveState
226 : IfxGtm_Tom_PwmHl_invertActiveState(config->base.ccxActiveState));
227 IfxGtm_Tom_Ch_setResetSource(driver->tom, channel, IfxGtm_Tom_Ch_ResetEvent_onTrigger);
228 IfxGtm_Tom_Ch_setTriggerOutput(driver->tom, channel, IfxGtm_Tom_Ch_OutputTrigger_forward);
229 IfxGtm_Tom_Ch_setCounterValue(driver->tom, channel, IfxGtm_Tom_Timer_getOffset(driver->timer));
230
231 /*Initialize the port */
232 if (config->initPins == TRUE)
233 {
234 IfxGtm_PinMap_setTomTout(config->ccx[channelIndex],
235 config->base.outputMode, config->base.outputDriver);
236 IfxPort_setPinState(config->ccx[channelIndex]->pin.port, config->ccx[channelIndex]->pin.pinIndex, config->base.ccxActiveState ? IfxPort_State_low : IfxPort_State_high);
237 }
238
239 /* COUTX */
240 channel = config->coutx[channelIndex]->channel;
241 driver->coutx[channelIndex] = channel;
242 channelMask = 1 << (channel - maskShift);
243 channelsMask |= channelMask;
244
245 /* Initialize the timer part */
246 IfxGtm_Tom_Ch_setClockSource(driver->tom, channel, clock);
247
248 /* Initialize the SOUR reset value, SL and enable the channel */
249 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, driver->base.inverted
250 ? IfxGtm_Tom_PwmHl_invertActiveState(config->base.coutxActiveState)
251 : config->base.coutxActiveState);
252 IfxGtm_Tom_Tgc_enableChannels(driver->tgc, channelMask, 0, TRUE);
253 IfxGtm_Tom_Tgc_enableChannelsOutput(driver->tgc, channelMask, 0, TRUE);
254
255 IfxGtm_Tom_Ch_setResetSource(driver->tom, channel, IfxGtm_Tom_Ch_ResetEvent_onTrigger);
256 IfxGtm_Tom_Ch_setTriggerOutput(driver->tom, channel, IfxGtm_Tom_Ch_OutputTrigger_forward);
257 IfxGtm_Tom_Ch_setCounterValue(driver->tom, channel, IfxGtm_Tom_Timer_getOffset(driver->timer));
258
259 /*Initialize the port */
260 if (config->initPins == TRUE)
261 {
262 IfxGtm_PinMap_setTomTout(config->coutx[channelIndex],
263 config->base.outputMode, config->base.outputDriver);
264 IfxPort_setPinState(config->coutx[channelIndex]->pin.port, config->coutx[channelIndex]->pin.pinIndex, config->base.coutxActiveState ? IfxPort_State_low : IfxPort_State_high);
265 }
266 }
267
268 IfxGtm_Tom_PwmHl_setMode(driver, Ifx_Pwm_Mode_off);
269
270 Ifx_TimerValue tOn[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS] = {0};
271 IfxGtm_Tom_PwmHl_updateOff(driver, tOn); /* tOn do not need defined values */
272
273 /* Transfer the shadow registers */
274 IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc, channelsMask, 0, 0, 0);
275 IfxGtm_Tom_Tgc_trigger(driver->tgc);
276 IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc, 0, channelsMask, 0, 0);
277
278 /* Enable timer to update the channels */
279 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
280 {
281 IfxGtm_Tom_Timer_addToChannelMask(timer, driver->ccx[channelIndex]);
282 IfxGtm_Tom_Timer_addToChannelMask(timer, driver->coutx[channelIndex]);
283 }
284
285 return result;
286 }
287
288
289 void IfxGtm_Tom_PwmHl_initConfig(IfxGtm_Tom_PwmHl_Config *config)
290 {
291 IfxStdIf_PwmHl_initConfig(&config->base);
292 config->timer = NULL_PTR;
293 config->tom = IfxGtm_Tom_0;
294 config->ccx = NULL_PTR;
295 config->coutx = NULL_PTR;
296 config->initPins = TRUE;
297 }
298
299
300 boolean IfxGtm_Tom_PwmHl_setDeadtime(IfxGtm_Tom_PwmHl *driver, float32 deadtime)
301 {
302 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, deadtime);
303 driver->base.deadtime = value;
304
305 return TRUE;
306 }
307
308
309 boolean IfxGtm_Tom_PwmHl_setMinPulse(IfxGtm_Tom_PwmHl *driver, float32 minPulse)
310 {
311 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, minPulse);
312
313 driver->base.minPulse = value + driver->base.deadtime;
314 driver->base.maxPulse = driver->timer->base.period - driver->base.minPulse;
315
316 return TRUE;
317 }
318
319
320 boolean IfxGtm_Tom_PwmHl_setMode(IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
321 {
322 boolean result = TRUE;
323 IfxGtm_Tom_PwmHl_Base *base = &driver->base;
324
325 if (base->mode != mode)
326 {
327 if ((mode > Ifx_Pwm_Mode_off) || (IfxGtm_Tom_PwmHl_modes[mode].update == NULL_PTR))
328 {
329 mode = Ifx_Pwm_Mode_off;
330 result = FALSE;
331 }
332
333 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode == IfxGtm_Tom_PwmHl_modes[mode].mode);
334
335 base->mode = mode;
336 driver->update = IfxGtm_Tom_PwmHl_modes[mode].update;
337 driver->updateAndShift = IfxGtm_Tom_PwmHl_modes[mode].updateAndShift;
338 driver->updatePulse = IfxGtm_Tom_PwmHl_modes[mode].updatePulse;
339
340 if (base->mode != Ifx_Pwm_Mode_off)
341 {
342 base->inverted = IfxGtm_Tom_PwmHl_modes[mode].inverted;
343 }
344 else
345 { /* Keep previous inverted for off mode */
346 }
347
348 if (base->inverted)
349 {
350 driver->ccxTemp = driver->coutx;
351 driver->coutxTemp = driver->ccx;
352 }
353 else
354 {
355 driver->ccxTemp = driver->ccx;
356 driver->coutxTemp = driver->coutx;
357 }
358
359 { /* Workaround to enable the signal inversion required for center aligned inverted
360 * and right aligned modes */
361 /** \note that changing signal level may produce short circuit at the power stage,
362 * in which case the inverter must be disable during this action. */
363
364 /* Ifx_Pwm_Mode_centerAligned and Ifx_Pwm_Mode_LeftAligned use inverted=FALSE */
365 /* Ifx_Pwm_Mode_centerAlignedInverted and Ifx_Pwm_Mode_RightAligned use inverted=TRUE */
366 uint32 channelIndex;
367
368 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
369 {
370 IfxGtm_Tom_Ch channel;
371
372 channel = driver->ccx[channelIndex];
373 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, base->inverted
374 ? base->ccxActiveState
375 : IfxGtm_Tom_PwmHl_invertActiveState(driver->base.ccxActiveState));
376
377 channel = driver->coutx[channelIndex];
378 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, base->inverted
379 ? IfxGtm_Tom_PwmHl_invertActiveState(driver->base.coutxActiveState)
380 : base->coutxActiveState);
381 }
382 }
383 }
384
385 return result;
386 }
387
388
389 void IfxGtm_Tom_PwmHl_setOnTime(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
390 {
391 driver->update(driver, tOn);
392 }
393
394
395 void IfxGtm_Tom_PwmHl_setOnTimeAndShift(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
396 {
397 driver->updateAndShift(driver, tOn, shift);
398 }
399
400
401 void IfxGtm_Tom_PwmHl_setPulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
402 {
403 driver->updatePulse(driver, tOn, offset);
404 }
405
406
407 void IfxGtm_Tom_PwmHl_setupChannels(IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
408 {
409 /* Dummy Function for StdIf compile */
410 IFX_UNUSED_PARAMETER(driver)
411 IFX_UNUSED_PARAMETER(activeCh)
412 IFX_UNUSED_PARAMETER(stuckSt)
413 }
414
415
416 boolean IfxGtm_Tom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
417 {
418 /* Ensure the stdif is reset to zeros */
419 memset(stdif, 0, sizeof(IfxStdIf_PwmHl));
420
421 /* *INDENT-OFF* Note: this file was indented manually by the author. */
422 /* Set the API link */
423 stdif->driver = driver;
424 stdif->setDeadtime = (IfxStdIf_PwmHl_SetDeadtime )&IfxGtm_Tom_PwmHl_setDeadtime;
425 stdif->getDeadtime = (IfxStdIf_PwmHl_GetDeadtime )&IfxGtm_Tom_PwmHl_getDeadtime;
426 stdif->setMinPulse = (IfxStdIf_PwmHl_SetMinPulse )&IfxGtm_Tom_PwmHl_setMinPulse;
427 stdif->getMinPulse = (IfxStdIf_PwmHl_GetMinPulse )&IfxGtm_Tom_PwmHl_getMinPulse;
428 stdif->getMode = (IfxStdIf_PwmHl_GetMode )&IfxGtm_Tom_PwmHl_getMode;
429 stdif->setMode = (IfxStdIf_PwmHl_SetMode )&IfxGtm_Tom_PwmHl_setMode;
430 stdif->setOnTime = (IfxStdIf_PwmHl_SetOnTime )&IfxGtm_Tom_PwmHl_setOnTime;
431 stdif->setOnTimeAndShift = (IfxStdIf_PwmHl_SetOnTimeAndShift)&IfxGtm_Tom_PwmHl_setOnTimeAndShift;
432 stdif->setPulse = (IfxStdIf_PwmHl_SetPulse )&IfxGtm_Tom_PwmHl_setPulse;
433 stdif->setupChannels = (IfxStdIf_PwmHl_SetupChannels )&IfxGtm_Tom_PwmHl_setupChannels;
434 IfxGtm_Tom_Timer_stdIfTimerInit(&stdif->timer, driver->timer);
435 /* *INDENT-ON* */
436
437 return TRUE;
438 }
439
440
441 IFX_STATIC void IfxGtm_Tom_PwmHl_updateAndShiftOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
442 {
443 IFX_UNUSED_PARAMETER(tOn)
444 IFX_UNUSED_PARAMETER(shift)
445
446 IfxGtm_Tom_PwmHl_updateOff(driver, NULL_PTR);
447 }
448
449
450 IFX_STATIC void IfxGtm_Tom_PwmHl_updateCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
451 {
452 uint8 channelIndex;
453 Ifx_TimerValue period;
454 Ifx_TimerValue deadtime = driver->base.deadtime;
455
456 period = driver->timer->base.period;
457
458 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
459 {
460 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
461 Ifx_TimerValue cm0, cm1;
462 x = tOn[channelIndex];
463
464 if (driver->base.inverted != FALSE)
465 {
466 x = period - x;
467 }
468 else
469 {}
470
471 if ((x < driver->base.minPulse) || (x <= deadtime))
472 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
473 x = 0;
474 }
475 else if (x > driver->base.maxPulse)
476 {
477 x = period;
478 }
479 else
480 {}
481
482 /* Special handling due to GTM issue */
483 if (x == period)
484 { /* 100% duty cycle */
485 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
486 period + 1 /* No compare event */,
487 2 /* 1st compare event (issue: expected to be 1) */ + deadtime);
488 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex],
489 period + 2 /* No compare event, issues has been seen with +1 */,
490 2 /* 1st compare event (issue: expected to be 1) */);
491 }
492 else if (x == 0)
493 {
494 cm0 = 1;
495 cm1 = period + 2;
496 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
497 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
498 }
499 else
500 { /* x% duty cycle */
501 cm1 = (period - x) / 2; // CM1
502 cm0 = (period + x) / 2; // CM0
503 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
504 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
505 }
506 }
507 }
508
509
510 IFX_STATIC void IfxGtm_Tom_PwmHl_updateEdgeAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
511 {
512 uint8 channelIndex;
513 Ifx_TimerValue period;
514 Ifx_TimerValue deadtime = driver->base.deadtime;
515
516 period = driver->timer->base.period;
517
518 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
519 {
520 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
521 Ifx_TimerValue cm0, cm1;
522 x = tOn[channelIndex];
523
524 if (driver->base.inverted != FALSE)
525 {
526 x = period - x;
527 }
528 else
529 {}
530
531 if ((x < driver->base.minPulse) || (x <= deadtime))
532 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
533 x = 0;
534 }
535 else if (x > driver->base.maxPulse)
536 {
537 x = period;
538 }
539 else
540 {}
541
542 /* Special handling due to GTM issue */
543 if (x == period)
544 { /* 100% duty cycle */
545 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
546 period + 1 /* No compare event */,
547 2 /* 1st compare event (issue: expected to be 1) */ + deadtime);
548 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex],
549 period + 2 /* No compare event, issues has been seen with +1 */,
550 2 /* 1st compare event (issue: expected to be 1) */);
551 }
552 else if (x == 0)
553 {
554 cm0 = 1;
555 cm1 = period + 2;
556 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
557 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
558 }
559 else
560 { /* x% duty cycle */
561 cm1 = 2; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
562 cm0 = x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
563 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
564 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
565 }
566 }
567 }
568
569
570 IFX_STATIC void IfxGtm_Tom_PwmHl_updateOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
571 {
572 IFX_UNUSED_PARAMETER(tOn)
573 uint8 channelIndex;
574 Ifx_TimerValue period;
575
576 period = driver->timer->base.period;
577
578 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
579 {
580 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
581 2 /* 1 will keep the previous level */, period + 2);
582 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], period + 1, 2);
583 }
584 }
585
586
587 IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
588 {
589 uint8 channelIndex;
590 Ifx_TimerValue period;
591
592 period = driver->timer->base.period;
593
594 /* Top channels */
595 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
596 {
597 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
598 Ifx_TimerValue o;
599 Ifx_TimerValue cm0, cm1;
600
601 x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex]);
602 o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex]);
603
604 if (driver->base.inverted != FALSE)
605 {
606 x = period - x;
607 }
608 else
609 {}
610
611 if ((x < driver->base.minPulse) || (o > period))
612 {
613 x = 0;
614 }
615 else if ((x > driver->base.maxPulse) || (o + x > period))
616 {
617 x = period;
618 }
619 else
620 {}
621
622 /* Special handling due to GTM issue */
623 if (x == period)
624 { /* 100% duty cycle */
625 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
626 period + 1 /* No compare event */,
627 2 /* 1st compare event (issue: expected to be 1)*/);
628 }
629 else if (x == 0)
630 {
631 cm0 = 1;
632 cm1 = period + 2;
633 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
634 }
635 else
636 { /* x% duty cycle */
637 cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
638 cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
639 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
640 }
641 }
642
643 /* Bottom channels */
644 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
645 {
646 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
647 Ifx_TimerValue o;
648 Ifx_TimerValue cm0, cm1;
649
650 x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex + driver->base.channelCount]);
651 o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex + driver->base.channelCount]);
652
653 if (driver->base.inverted != FALSE)
654 {
655 x = period - x;
656 }
657 else
658 {}
659
660 if (x < driver->base.minPulse)
661 {
662 x = 0;
663 }
664 else if (x > driver->base.maxPulse)
665 {
666 x = period;
667 }
668 else
669 {}
670
671 /* Special handling due to GTM issue */
672 if (x == period)
673 { /* 100% duty cycle */
674 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex],
675 period + 2 /* No compare event, issues has been seen with +1 */,
676 2 /* 1st compare event (issue: expected to be 1)*/);
677 }
678 else if (x == 0)
679 {
680 cm0 = 1;
681 cm1 = period + 2;
682 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0, cm1);
683 }
684 else
685 { /* x% duty cycle */
686 cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
687 cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
688 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0, cm1);
689 }
690 }
691 }
692
693
694 IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulseOff(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
695 {
696 IFX_UNUSED_PARAMETER(tOn)
697 IFX_UNUSED_PARAMETER(offset)
698 IfxGtm_Tom_PwmHl_updateOff(driver, NULL_PTR);
699 }
700
701
702 IFX_STATIC void IfxGtm_Tom_PwmHl_updateShiftCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
703 {
704 uint8 channelIndex;
705 Ifx_TimerValue period;
706 Ifx_TimerValue deadtime = driver->base.deadtime;
707
708 period = driver->timer->base.period;
709
710 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
711 {
712 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
713 Ifx_TimerValue s; /* Shift value */
714 Ifx_TimerValue cm0, cm1;
715 x = tOn[channelIndex];
716
717 if (driver->base.inverted != FALSE)
718 {
719 x = period - x;
720 }
721 else
722 {}
723
724 if ((x < driver->base.minPulse) || (x <= deadtime))
725 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
726 x = 0;
727 }
728 else if (x > driver->base.maxPulse)
729 {
730 x = period;
731 }
732 else
733 {}
734
735 /* Special handling due to GTM issue */
736 if (x == period)
737 { /* 100% duty cycle */
738 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
739 period + 1 /* No compare event */,
740 2 /* 1st compare event (issue: expected to be 1)*/ + deadtime);
741 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex],
742 period + 2 /* No compare event, issues has been seen with +1 */,
743 2 /* 1st compare event (issue: expected to be 1)*/);
744 }
745 else if (x == 0)
746 {
747 cm0 = 1;
748 cm1 = period + 2;
749 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
750 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
751 }
752 else
753 { /* x% duty cycle */
754 s = shift[channelIndex];
755
756 if (s > 0)
757 {
758 s = __minX(s, (period - x) / 2 - 1);
759 }
760 else
761 {
762 s = __maxX(s, (x - period) / 2 + 1);
763 }
764
765 cm1 = s + (period - x) / 2; // CM1
766 cm0 = s + (period + x) / 2; // CM0
767 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
768 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
769 }
770 }
771 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxStdIf_PwmHl_::timer
IfxStdIf_Timer timer
Timer related standard interface.
Definition: IfxStdIf_PwmHl.h:196
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxGtm_Tom_PwmHl_Config::coutx
IFX_CONST IfxGtm_Tom_ToutMapP * coutx
Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for c...
Definition: IfxGtm_Tom_PwmHl.h:193
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
IfxGtm_Tom_Timer_addToChannelMask
void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run.
Definition: IfxGtm_Tom_Timer.c:90
IfxGtm_Tom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Tom_Timer.h:150
IfxGtm_Tom_Ch_setTriggerOutput
void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Tom.c:348
IfxGtm_Tom_PwmHl_getMinPulse
float32 IfxGtm_Tom_PwmHl_getMinPulse(IfxGtm_Tom_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxGtm_Tom_PwmHl.c:154
IfxStdIf_PwmHl_::setupChannels
IfxStdIf_PwmHl_SetupChannels setupChannels
IfxStdIf_PwmHl_SetupChannels.
Definition: IfxStdIf_PwmHl.h:194
IfxGtm_Tom_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxGtm_Tom_PwmHl.h:172
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxGtm_Tom_Timer::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tom_Timer.h:163
IfxStdIf_PwmHl_::getMinPulse
IfxStdIf_PwmHl_GetMinPulse getMinPulse
IfxStdIf_PwmHl_GetMinPulse.
Definition: IfxStdIf_PwmHl.h:188
IfxStdIf_PwmHl_::getDeadtime
IfxStdIf_PwmHl_GetDeadtime getDeadtime
IfxStdIf_PwmHl_GetDeadtime.
Definition: IfxStdIf_PwmHl.h:185
IfxGtm_Tom_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxGtm_Tom_PwmHl.h:178
IfxGtm_Tom_PwmHl_setMinPulse
boolean IfxGtm_Tom_PwmHl_setMinPulse(IfxGtm_Tom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxGtm_Tom_PwmHl.c:309
IfxGtm_Tom_PwmHl_setPulse
void IfxGtm_Tom_PwmHl_setPulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent.
Definition: IfxGtm_Tom_PwmHl.c:401
IfxGtm_Tom_PwmHl_setDeadtime
boolean IfxGtm_Tom_PwmHl_setDeadtime(IfxGtm_Tom_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxGtm_Tom_PwmHl.c:300
IfxGtm_Tom_Ch_setResetSource
void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Tom.c:321
IfxGtm_Tom_PwmHl_s::base
IfxGtm_Tom_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Tom_PwmHl.h:213
IfxGtm_Tom_PwmHl_updatePulse
IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse.
Definition: IfxGtm_Tom_PwmHl.c:587
IfxGtm_Tom_PwmHl_updateCenterAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxGtm_Tom_PwmHl.c:450
IfxGtm_PinMap_setTomTout
void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:730
IfxPort_State_high
Ifx_P pin is set to high.
Definition: IfxPort.h:173
IfxGtm_Tom_PwmHl_updateAndShiftOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updateAndShiftOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF.
Definition: IfxGtm_Tom_PwmHl.c:441
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:177
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
IfxGtm_Tom_Ch_setSignalLevel
void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Tom.c:329
IfxStdIf_PwmHl_SetupChannels
void(* IfxStdIf_PwmHl_SetupChannels)(IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxStdIf_PwmHl.h:175
IfxGtm_Tom_Ch_getTgcPointer
Ifx_GTM_TOM_TGC * IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer.
Definition: IfxGtm_Tom.c:153
IfxGtm_Tom_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxGtm_Tom_PwmHl.h:189
IfxGtm_Tom_PwmHl_stdIfPwmHlInit
boolean IfxGtm_Tom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxGtm_Tom_PwmHl.c:416
IfxStdIf_PwmHl_GetMode
Ifx_Pwm_Mode(* IfxStdIf_PwmHl_GetMode)(IfxStdIf_InterfaceDriver stdIf)
Return the PWM mode.
Definition: IfxStdIf_PwmHl.h:125
IfxStdIf_PwmHl_initConfig
void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
Definition: IfxStdIf_PwmHl.c:45
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
float32
float float32
Definition: Platform_Types.h:170
Ifx_Assert.h
Assert functions.
IfxStdIf_PwmHl_::setPulse
IfxStdIf_PwmHl_SetPulse setPulse
IfxStdIf_PwmHl_Pulse.
Definition: IfxStdIf_PwmHl.h:193
__maxX
#define __maxX
Definition: IfxCpu_IntrinsicsDcc.h:1597
IfxGtm_Tom_PwmHl_setOnTimeAndShift
void IfxGtm_Tom_PwmHl_setOnTimeAndShift(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift.
Definition: IfxGtm_Tom_PwmHl.c:395
IfxGtm_Tom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Tom_Timer.h:148
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Tom_PwmHl_getDeadtime
float32 IfxGtm_Tom_PwmHl_getDeadtime(IfxGtm_Tom_PwmHl *driver)
Returns the dead time.
Definition: IfxGtm_Tom_PwmHl.c:148
IfxGtm_Tom_PwmHl.h
GTM PWMHL details.
IfxGtm_Tom_PwmHl_setMode
boolean IfxGtm_Tom_PwmHl_setMode(IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxGtm_Tom_PwmHl.c:320
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxStdIf_PwmHl_Config::deadtime
float32 deadtime
Dead time between the top and bottom channels in seconds.
Definition: IfxStdIf_PwmHl.h:202
IfxGtm_Tom_PwmHl_getMode
Ifx_Pwm_Mode IfxGtm_Tom_PwmHl_getMode(IfxGtm_Tom_PwmHl *driver)
Returns Pwm mode.
Definition: IfxGtm_Tom_PwmHl.c:160
IfxGtm_Tom_PwmHl_setupChannels
void IfxGtm_Tom_PwmHl_setupChannels(IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels.
Definition: IfxGtm_Tom_PwmHl.c:407
IfxGtm_Tom_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxGtm_Tom_PwmHl.h:175
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStdIf_PwmHl_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_PwmHl.h:181
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:283
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxStdIf_PwmHl_SetPulse
void(* IfxStdIf_PwmHl_SetPulse)(IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently.
Definition: IfxStdIf_PwmHl.h:156
IfxGtm_Tom_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxGtm_Tom_PwmHl.h:174
IfxGtm_Tom_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxGtm_Tom_PwmHl.h:173
IfxGtm_Tom_PwmHl_invertActiveState
IFX_INLINE Ifx_ActiveState IfxGtm_Tom_PwmHl_invertActiveState(Ifx_ActiveState activeState)
Inverts the active state.
Definition: IfxGtm_Tom_PwmHl.c:138
IfxGtm_Tom_PwmHl_s::coutx
IfxGtm_Tom_Ch coutx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]
TOM channels used for the OUTX outputs.
Definition: IfxGtm_Tom_PwmHl.h:221
IfxGtm_Tom_PwmHl_Config
GTM TOM: PWM HL configuration.
Definition: IfxGtm_Tom_PwmHl.h:187
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:179
IfxGtm_Tom_ToutMap::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGtm_PinMap.h:122
IfxGtm_Tom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Tom.h:104
IfxStdIf_PwmHl_GetMinPulse
float32(* IfxStdIf_PwmHl_GetMinPulse)(IfxStdIf_InterfaceDriver stdIf)
Return the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:117
IfxGtm_Tom_PwmHl_initConfig
void IfxGtm_Tom_PwmHl_initConfig(IfxGtm_Tom_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxGtm_Tom_PwmHl.c:289
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxGtm_Tom_PwmHl_s::ccxTemp
IfxGtm_Tom_Ch * ccxTemp
cached value
Definition: IfxGtm_Tom_PwmHl.h:222
IfxStdIf_PwmHl_Config::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:208
IfxStdIf_PwmHl_Config::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxStdIf_PwmHl.h:211
Ifx_Pwm_Mode_init
Initialisation mode, do not use at run time.
Definition: Ifx_Types.h:182
IfxGtm_Tom_Ch_setCompareShadow
void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values.
Definition: IfxGtm_Tom.c:242
IfxGtm_Tom_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxGtm_Tom_PwmHl.h:176
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IfxGtm_Tom_PwmHl_modes
IFX_STATIC IFX_CONST IfxGtm_Tom_PwmHl_Mode IfxGtm_Tom_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Definition: IfxGtm_Tom_PwmHl.c:126
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:181
__minX
#define __minX
Definition: IfxCpu_IntrinsicsDcc.h:1593
IfxStdIf_PwmHl_::setOnTime
IfxStdIf_PwmHl_SetOnTime setOnTime
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:191
IfxGtm_Tom_Timer_stdIfTimerInit
boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Tom_Timer.c:401
IfxGtm_Tom_Ch_setCounterValue
void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Tom.c:267
IfxStdIf_PwmHl_SetMinPulse
boolean(* IfxStdIf_PwmHl_SetMinPulse)(IfxStdIf_InterfaceDriver stdIf, float32 minPulse)
Set the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:109
IfxGtm_Tom_Timer::tom
Ifx_GTM_TOM * tom
Pointer to the TOM object.
Definition: IfxGtm_Tom_Timer.h:164
IfxGtm_Tom_PwmHl_updatePulseOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulseOff(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF.
Definition: IfxGtm_Tom_PwmHl.c:694
IfxPort_setPinState
IFX_INLINE void IfxPort_setPinState(Ifx_P *port, uint8 pinIndex, IfxPort_State action)
Set / Resets / Toggle the port output.
Definition: IfxPort.h:590
IfxGtm_Tom_PwmHl_init
boolean IfxGtm_Tom_PwmHl_init(IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do n...
Definition: IfxGtm_Tom_PwmHl.c:166
IfxGtm_Tom_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxGtm_Tom_PwmHl.h:171
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxStdIf_PwmHl_Config::minPulse
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds.
Definition: IfxStdIf_PwmHl.h:203
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:178
IfxGtm_Tom_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxGtm_Tom_PwmHl.h:170
IfxGtm_Tom_ToutMap::channel
IfxGtm_Tom_Ch channel
TOM channel index.
Definition: IfxGtm_PinMap.h:119
IfxGtm_Tom_Tgc_trigger
void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Tom.c:552
IfxStdIf_PwmHl_::setMode
IfxStdIf_PwmHl_SetMode setMode
IfxStdIf_PwmHl_SetMode.
Definition: IfxStdIf_PwmHl.h:190
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:180
IfxStdIf_PwmHl_Config::outputMode
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:207
IfxGtm_Tom_PwmHl_s::update
IfxGtm_Tom_PwmHl_Update update
Update function for actual selected mode.
Definition: IfxGtm_Tom_PwmHl.h:215
IfxGtm_Tom_Timer
TOM Timer interface Handle.
Definition: IfxGtm_Tom_Timer.h:160
IfxGtm_Tom_PwmHl_s::updatePulse
IfxGtm_Tom_PwmHl_UpdatePulse updatePulse
Update pulse function for actual selected mode.
Definition: IfxGtm_Tom_PwmHl.h:217
IfxStdIf_PwmHl_SetDeadtime
boolean(* IfxStdIf_PwmHl_SetDeadtime)(IfxStdIf_InterfaceDriver stdIf, float32 deadtime)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:86
IfxGtm_Tom_PwmHl_s
GTM TOM PWM driver.
Definition: IfxGtm_Tom_PwmHl.h:211
IfxPort_State_low
Ifx_P pin is set to low.
Definition: IfxPort.h:174
IfxGtm_Tom_PwmHl_s::timer
IfxGtm_Tom_Timer * timer
Pointer to the linked timer object.
Definition: IfxGtm_Tom_PwmHl.h:214
IfxGtm_Tom_PwmHl_updateShiftCenterAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateShiftCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned.
Definition: IfxGtm_Tom_PwmHl.c:702
IfxGtm_Tom_PwmHl_s::tgc
Ifx_GTM_TOM_TGC * tgc
TGC unit used.
Definition: IfxGtm_Tom_PwmHl.h:219
IfxGtm_Tom_PwmHl_s::tom
Ifx_GTM_TOM * tom
TOM unit used.
Definition: IfxGtm_Tom_PwmHl.h:218
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxStdIf_PwmHl_Config::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxStdIf_PwmHl.h:204
IfxGtm_Tom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Tom.h:95
IfxGtm_Tom_PwmHl_s::coutxTemp
IfxGtm_Tom_Ch * coutxTemp
cached value
Definition: IfxGtm_Tom_PwmHl.h:223
IfxGtm_Tom_Ch_setClockSource
void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source.
Definition: IfxGtm_Tom.c:209
IfxGtm_Tom_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxGtm_Tom_PwmHl.h:200
IfxGtm_Tom_Ch_getClockSource
IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Tom.c:92
IfxGtm_Tom_Tgc_setChannelsForceUpdate
void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Tom.c:530
IfxStdIf_PwmHl_::setMinPulse
IfxStdIf_PwmHl_SetMinPulse setMinPulse
IfxStdIf_PwmHl_SetMinPulse.
Definition: IfxStdIf_PwmHl.h:187
IfxGtm_Tom_Tgc_enableChannelsOutput
void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Tom.c:464
IfxStdIf_PwmHl_::setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:192
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxGtm_Tom_PwmHl_s::ccx
IfxGtm_Tom_Ch ccx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]
TOM channels used for the CCCX outputs.
Definition: IfxGtm_Tom_PwmHl.h:220
IfxGtm_Tom_0
TOM object 0.
Definition: IfxGtm_cfg.h:277
IfxGtm_Tom_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxGtm_Tom_PwmHl.h:177
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxStdIf_PwmHl_SetOnTime
void(* IfxStdIf_PwmHl_SetOnTime)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time.
Definition: IfxStdIf_PwmHl.h:140
IfxGtm_Tom_Timer::base
IfxGtm_Tom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Tom_Timer.h:162
IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output Limited...
Definition: IfxGtm_Tom_PwmHl.h:146
IfxStdIf_PwmHl_::getMode
IfxStdIf_PwmHl_GetMode getMode
IfxStdIf_PwmHl_GetMode.
Definition: IfxStdIf_PwmHl.h:189
IfxGtm_Tom_PwmHl_setOnTime
void IfxGtm_Tom_PwmHl_setOnTime(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time.
Definition: IfxGtm_Tom_PwmHl.c:389
IfxStdIf_PwmHl_SetOnTimeAndShift
void(* IfxStdIf_PwmHl_SetOnTimeAndShift)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value.
Definition: IfxStdIf_PwmHl.h:148
IfxStdIf_PwmHl_GetDeadtime
float32(* IfxStdIf_PwmHl_GetDeadtime)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time in s.
Definition: IfxStdIf_PwmHl.h:94
IfxStdIf_PwmHl_::setDeadtime
IfxStdIf_PwmHl_SetDeadtime setDeadtime
IfxStdIf_PwmHl_SetDeadtime.
Definition: IfxStdIf_PwmHl.h:184
IfxGtm_Tom_PwmHl_s::updateAndShift
IfxGtm_Tom_PwmHl_UpdateShift updateAndShift
Update shift function for actual selected mode.
Definition: IfxGtm_Tom_PwmHl.h:216
IfxGtm_Tom_PwmHl_Config::tom
IfxGtm_Tom tom
TOM unit used.
Definition: IfxGtm_Tom_PwmHl.h:191
IfxGtm_Tom_PwmHl_updateEdgeAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateEdgeAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxGtm_Tom_PwmHl.c:510
IfxGtm_Tom_Tgc_enableChannels
void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Tom.c:446
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxStdIf_PwmHl_Config::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxStdIf_PwmHl.h:212
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxGtm_Tom_Timer::timerChannel
IfxGtm_Tom_Ch timerChannel
TOM channel used for the timer.
Definition: IfxGtm_Tom_Timer.h:167
IfxGtm_Tom_PwmHl_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver: user handles separately...
Definition: IfxGtm_Tom_PwmHl.h:194
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Tom_PwmHl_Config::ccx
IFX_CONST IfxGtm_Tom_ToutMapP * ccx
Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for c...
Definition: IfxGtm_Tom_PwmHl.h:192
IfxStdIf_PwmHl_SetMode
boolean(* IfxStdIf_PwmHl_SetMode)(IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode.
Definition: IfxStdIf_PwmHl.h:133
IfxGtm_Tom_Ch_ClkSrc
IfxGtm_Tom_Ch_ClkSrc
Clock source for the TOM channels.
Definition: IfxGtm_Tom.h:81
IfxGtm_Tom_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Tom_PwmHl.h:168
IfxGtm_Tom_Timer_getOffset
Ifx_TimerValue IfxGtm_Tom_Timer_getOffset(IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks.
Definition: IfxGtm_Tom_Timer.c:150
IfxGtm_Tom_PwmHl_updateOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updateOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxGtm_Tom_PwmHl.c:570


iLLD_TC26B: IfxGtm_Tom_PwmHl.h Source File

  • Gtm
  • Tom
  • PwmHl
IfxGtm_Tom_PwmHl.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_PwmHl.h
3 * \brief GTM PWMHL details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Tom_PwmHl_Usage How to use the GTM TOM PWM Driver
42 * \ingroup IfxLld_Gtm_Tom_PwmHl
43 *
44 * This driver implements the PWM functionalities as defined by \ref library_srvsw_stdif_pwmhl.
45 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_pwmhl "standard interface APIs".
46 *
47 * \section specific Specific implementation
48 * The PWM driver is a concatenation of a \ref IfxLld_Gtm_Tom_Timer "timer" with additional PWM generation cells.
49 *
50 * The timer is implemented as described in \ref IfxLld_Gtm_Tom_Timer, it generate an internal trigger
51 * that is used to synchronize all the TOM channel used (shown in red in the pictures below).
52 *
53 * The picture below presents two configuration examples:
54 * - On the left, the timer and trigger are generated using the same TOM channel CH0. The 3 dual-complementary
55 * PWMs, CCx and COUTx, are generated using 6 additional TOM channels (CH1 to Ch6).
56 * - On the right, the timer and the trigger uses separate TOM channels to allow the triggering of the ADC
57 * conversions. The order of the CCx and COUTx has been allocated freely between CH9 up to CH14.
58 *
59 * \image html "IfxGtm_Tom_PwmHl-0.png" "PWM implementations on GTM TOM"
60 *
61 *
62 * Each of the TOM channel used for the generation of the CCx and COUTx signals are configured as in the figure below:
63 *
64 * \image html "IfxGtm_Tom_PwmHl-1.png" "TOM channel configuration".
65 *
66 * The internal trigger (red line) is generated by the \ref IfxLld_Gtm_Tom_Timer "timer" on timer rest and used by the
67 * TOM PWM channels to reset the counters CN0 and transfer the shadow values saved in SR0 and SR1 to the
68 * CM0 and CM1 registers. When the counter CN0 reach the values of the CM0 or CM1 compare registers,
69 * a rising or falling edge is generated on the output PWM signal. The signal active state configuration
70 * define which of the CM0 or CM1 is generating the falling or rising edge.
71 *
72 * This trigger mechanism ensure that all the PWM channels, period and trigger are updated at the
73 * exact same time, avoiding any possibility for glitch or incoherent signals.
74 *
75 * The clock use is the same as the timer clock.
76 *
77 * In order to ensure a coherent update of all registers, the internal trigger must be disable before updating
78 * the timer, trigger and PWM duty cycles shadow values, and enabled once the update is done. The transfer will ocucrs at the next timer reset.
79 *
80 * \subsection features Features
81 * - This implementation allows from 1 up to 3 dual-complementary PWM channels.
82 * - Resources used:
83 * - Additionally to the linked timer resources used, the following resources are used:
84 * - 2 TOM channels per PWM channels
85 * - All TOM channels used must be own by the same TOM and TGC as for the linked timer
86 * - The TOM channel used for the timer must always have a lower index than the TOM channels
87 * used for the pwm.
88 * - All TOM channels used (including the timer and the trigger) must be contiguous but the order of the TOM channels is free.
89 *
90 *
91 * For a detailed configuration of the microcontroller, see \ref IfxGtm_Tom_PwmHl_init().
92 *
93 * \section example Usage Example
94 * Initialisation is done by, e.g:
95 * \code
96 * IfxGtm_Tom_PwmHl_Config driverConfig;
97 * IfxGtm_Tom_PwmHl driverData;
98 * IfxStdIf_PwmHl pwmhl;
99 * IfxGtm_Tom_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
100 * IfxGtm_Tom_PwmHl_init(&driverData, &driverConfig);
101 * IfxGtm_Tom_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);
102 * \endcode
103 *
104 * During run-time, \ref library_srvsw_stdif_pwmhl "the interface functions" shall be used, e.g.:
105 * \code
106 * IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
107 * Ifx_TimerValue onTime[3]; // assume configured for three HL channels
108 *
109 * onTime[0] = 10;
110 * onTime[1] = 20;
111 * onTime[2] = 30;
112 *
113 * IfxStdIf_Timer_disableUpdate(timer);
114 * IfxStdIf_Timer_setPeriod(timer, period);
115 * IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
116 * IfxStdIf_Timer_applyUpdate(timer);
117 * \endcode
118 *
119 * \defgroup IfxLld_Gtm_Tom_PwmHl TOM PWM HL Interface Driver
120 * \ingroup IfxLld_Gtm_Tom
121 * \defgroup IfxLld_Gtm_Tom_PwmHl_Data_Structures Data Structures
122 * \ingroup IfxLld_Gtm_Tom_PwmHl
123 * \defgroup IfxLld_Gtm_Tom_PwmHl_PwmHl_Functions PwmHl Functions
124 * \ingroup IfxLld_Gtm_Tom_PwmHl
125 * \defgroup IfxLld_Gtm_Tom_PwmHl_PwmHl_StdIf_Functions PwmHl StdIf Functions
126 * \ingroup IfxLld_Gtm_Tom_PwmHl
127 */
128
129 #ifndef IFXGTM_TOM_PWMHL_H
130 #define IFXGTM_TOM_PWMHL_H 1
131
132 /******************************************************************************/
133 /*----------------------------------Includes----------------------------------*/
134 /******************************************************************************/
135
136 #include "StdIf/IfxStdIf_PwmHl.h"
137 #include "Gtm/Tom/Timer/IfxGtm_Tom_Timer.h"
138
139 /******************************************************************************/
140 /*-----------------------------------Macros-----------------------------------*/
141 /******************************************************************************/
142
143 /** \brief Maximal number of channels handled by the driver. One channel has a top and bottom pwm output
144 * Limited to 3 because the PWM channels used must be owned by the same TGC
145 */
146 #define IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS (3)
147
148 /******************************************************************************/
149 /*------------------------------Type Definitions------------------------------*/
150 /******************************************************************************/
151
152 typedef struct IfxGtm_Tom_PwmHl_s IfxGtm_Tom_PwmHl;
153
154 typedef void (*IfxGtm_Tom_PwmHl_Update)(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
155
156 typedef void (*IfxGtm_Tom_PwmHl_UpdateShift)(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
157
158 typedef void (*IfxGtm_Tom_PwmHl_UpdatePulse)(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset);
159
160 /******************************************************************************/
161 /*-----------------------------Data Structures--------------------------------*/
162 /******************************************************************************/
163
164 /** \addtogroup IfxLld_Gtm_Tom_PwmHl_Data_Structures
165 * \{ */
166 /** \brief Multi-channels PWM object definition (channels only)
167 */
168 typedef struct
169 {
170 Ifx_TimerValue deadtime; /**< \brief Dead time between the top and bottom channel in ticks */
171 Ifx_TimerValue minPulse; /**< \brief minimum pulse that is output, shorter pulse time will be output as 0% duty cycle */
172 Ifx_TimerValue maxPulse; /**< \brief internal parameter */
173 Ifx_Pwm_Mode mode; /**< \brief actual PWM mode */
174 sint8 setMode; /**< \brief A non zero flag indicates that the PWM mode is being modified */
175 Ifx_ActiveState ccxActiveState; /**< \brief Top PWM active state */
176 Ifx_ActiveState coutxActiveState; /**< \brief Bottom PWM active state */
177 boolean inverted; /**< \brief Flag indicating the center aligned inverted mode (TRUE) */
178 uint8 channelCount; /**< \brief Number of PWM channels, one channel is made of a top and bottom channel */
179 } IfxGtm_Tom_PwmHl_Base;
180
181 /** \} */
182
183 /** \addtogroup IfxLld_Gtm_Tom_PwmHl_Data_Structures
184 * \{ */
185 /** \brief GTM TOM: PWM HL configuration
186 */
187 typedef struct
188 {
189 IfxStdIf_PwmHl_Config base; /**< \brief PWM HL standard interface configuration */
190 IfxGtm_Tom_Timer *timer; /**< \brief Pointer to the linked timer object */
191 IfxGtm_Tom tom; /**< \brief TOM unit used */
192 IFX_CONST IfxGtm_Tom_ToutMapP *ccx; /**< \brief Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for ccx and coutx must be adjacent to the channel used for the timer, order is not important. */
193 IFX_CONST IfxGtm_Tom_ToutMapP *coutx; /**< \brief Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for ccx and coutx must be adjacent to the channel used for the timer, order is not important */
194 boolean initPins; /**< \brief TRUE: Initialize pins in driver
195 * FALSE: Don't initialize pins in driver: user handles separately */
196 } IfxGtm_Tom_PwmHl_Config;
197
198 /** \brief Structure for PWM configuration
199 */
200 typedef struct
201 {
202 Ifx_Pwm_Mode mode; /**< \brief Pwm Mode */
203 boolean inverted; /**< \brief Inverted configuration for the selected mode */
204 IfxGtm_Tom_PwmHl_Update update; /**< \brief update call back function for the selected mode */
205 IfxGtm_Tom_PwmHl_UpdateShift updateAndShift; /**< \brief update shift call back function for the selected mode */
206 IfxGtm_Tom_PwmHl_UpdatePulse updatePulse; /**< \brief update pulse call back function for the selected mode */
207 } IfxGtm_Tom_PwmHl_Mode;
208
209 /** \brief GTM TOM PWM driver
210 */
211 struct IfxGtm_Tom_PwmHl_s
212 {
213 IfxGtm_Tom_PwmHl_Base base; /**< \brief Multi-channels PWM object definition (channels only) */
214 IfxGtm_Tom_Timer *timer; /**< \brief Pointer to the linked timer object */
215 IfxGtm_Tom_PwmHl_Update update; /**< \brief Update function for actual selected mode */
216 IfxGtm_Tom_PwmHl_UpdateShift updateAndShift; /**< \brief Update shift function for actual selected mode */
217 IfxGtm_Tom_PwmHl_UpdatePulse updatePulse; /**< \brief Update pulse function for actual selected mode */
218 Ifx_GTM_TOM *tom; /**< \brief TOM unit used */
219 Ifx_GTM_TOM_TGC *tgc; /**< \brief TGC unit used */
220 IfxGtm_Tom_Ch ccx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief TOM channels used for the CCCX outputs */
221 IfxGtm_Tom_Ch coutx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief TOM channels used for the OUTX outputs */
222 IfxGtm_Tom_Ch *ccxTemp; /**< \brief cached value */
223 IfxGtm_Tom_Ch *coutxTemp; /**< \brief cached value */
224 };
225
226 /** \} */
227
228 /** \addtogroup IfxLld_Gtm_Tom_PwmHl_PwmHl_Functions
229 * \{ */
230
231 /******************************************************************************/
232 /*-------------------------Global Function Prototypes-------------------------*/
233 /******************************************************************************/
234
235 /** \brief Initializes the timer object
236 * note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.
237 * Note: all PWM channels must use the same TGC
238 * Note: the current implementation must use the same TGC for the timer and PWM channels
239 * \param driver GTM TOM PWM driver
240 * \param config GTM TOM: PWM HL configuration
241 * \return TRUE on success else FALSE
242 */
243 IFX_EXTERN boolean IfxGtm_Tom_PwmHl_init(IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config);
244
245 /** \brief Initialize the configuration structure to default
246 * \param config Channel configuration. This parameter is Initialised by the function
247 * \return None
248 */
249 IFX_EXTERN void IfxGtm_Tom_PwmHl_initConfig(IfxGtm_Tom_PwmHl_Config *config);
250
251 /** \} */
252
253 /** \addtogroup IfxLld_Gtm_Tom_PwmHl_PwmHl_StdIf_Functions
254 * \{ */
255
256 /******************************************************************************/
257 /*-------------------------Global Function Prototypes-------------------------*/
258 /******************************************************************************/
259
260 /** \brief Returns the dead time
261 * \see IfxStdIf_PwmHl_GetDeadtime
262 * \param driver GTM TOM PWM driver
263 * \return Dead Time
264 */
265 IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getDeadtime(IfxGtm_Tom_PwmHl *driver);
266
267 /** \brief Returns the minimum pulse
268 * \see IfxStdIf_PwmHl_GetMinPulse
269 * \param driver GTM TOM PWM driver
270 * \return Min Pulse
271 */
272 IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getMinPulse(IfxGtm_Tom_PwmHl *driver);
273
274 /** \brief Returns Pwm mode
275 * \see IfxStdIf_PwmHl_GetMode
276 * \param driver GTM TOM PWM driver
277 * \return Pwm mode
278 */
279 IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Tom_PwmHl_getMode(IfxGtm_Tom_PwmHl *driver);
280
281 /** \brief Sets the dead time
282 * \see IfxStdIf_PwmHl_setDeadtime
283 * \param driver GTM TOM PWM driver
284 * \param deadtime Dead time value
285 * \return TRUE on success else FALSE
286 */
287 IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setDeadtime(IfxGtm_Tom_PwmHl *driver, float32 deadtime);
288
289 /** \brief Sets the minimum pulse
290 * \see IfxStdIf_PwmHl_setMinPulse
291 * \param driver GTM TOM PWM driver
292 * \param minPulse Minimum pulse
293 * \return TRUE on success else FALSE
294 */
295 IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMinPulse(IfxGtm_Tom_PwmHl *driver, float32 minPulse);
296
297 /** \brief Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
298 * \see IfxStdIf_PwmHl_SetMode
299 * \param driver GTM TOM PWM driver
300 * \param mode Pwm mode
301 * \return TRUE on success else FALSE
302 */
303 IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMode(IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode);
304
305 /** \brief Sets the ON time
306 * \see IfxStdIf_PwmHl_SetOnTime
307 * \param driver GTM TOM PWM driver
308 * \param tOn ON time
309 * \return None
310 */
311 IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTime(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
312
313 /** \brief Sets the ON time and Shift
314 * \param driver GTM TOM PWM driver
315 * \param tOn ON time
316 * \param shift Shift value in ticks
317 * \return None
318 */
319 IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTimeAndShift(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
320
321 /** \brief Sets the ON time and offset, all switched are independent
322 * \param driver GTM TOM PWM driver
323 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
324 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
325 * \return None
326 */
327 IFX_EXTERN void IfxGtm_Tom_PwmHl_setPulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset);
328
329 /** \brief Set up channels
330 * \see IfxStdIf_PwmHl_SetupChannels
331 * \param driver GTM TOM PWM driver
332 * \param activeCh Active channel
333 * \param stuckSt Stuck state
334 * \return None
335 */
336 IFX_EXTERN void IfxGtm_Tom_PwmHl_setupChannels(IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt);
337
338 /** \brief Initialises the statndard interface Pwm
339 * \param stdif Standard interface object, will be initialized by the function
340 * \param driver Interface driver to be used by the standard interface. must be initialised separately
341 * \return TRUE on success else FALSE
342 */
343 IFX_EXTERN boolean IfxGtm_Tom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver);
344
345 /** \} */
346
347 #endif /* IFXGTM_TOM_PWMHL_H */
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxGtm_Tom_PwmHl_Config::coutx
IFX_CONST IfxGtm_Tom_ToutMapP * coutx
Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for c...
Definition: IfxGtm_Tom_PwmHl.h:193
IfxGtm_Tom_PwmHl_getMinPulse
IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getMinPulse(IfxGtm_Tom_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxGtm_Tom_PwmHl.c:154
IfxGtm_Tom_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxGtm_Tom_PwmHl.h:172
IfxGtm_Tom_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxGtm_Tom_PwmHl.h:178
IfxGtm_Tom_PwmHl_setMinPulse
IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMinPulse(IfxGtm_Tom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxGtm_Tom_PwmHl.c:309
IfxGtm_Tom_PwmHl_setPulse
IFX_EXTERN void IfxGtm_Tom_PwmHl_setPulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent.
Definition: IfxGtm_Tom_PwmHl.c:401
IfxGtm_Tom_PwmHl_setDeadtime
IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setDeadtime(IfxGtm_Tom_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxGtm_Tom_PwmHl.c:300
IfxGtm_Tom_PwmHl_s::base
IfxGtm_Tom_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Tom_PwmHl.h:213
IfxGtm_Tom_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxGtm_Tom_PwmHl.h:189
IfxGtm_Tom_PwmHl_stdIfPwmHlInit
IFX_EXTERN boolean IfxGtm_Tom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxGtm_Tom_PwmHl.c:416
float32
float float32
Definition: Platform_Types.h:170
IfxGtm_Tom_PwmHl_Update
void(* IfxGtm_Tom_PwmHl_Update)(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Definition: IfxGtm_Tom_PwmHl.h:154
IfxGtm_Tom_PwmHl_setOnTimeAndShift
IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTimeAndShift(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift.
Definition: IfxGtm_Tom_PwmHl.c:395
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxGtm_Tom_PwmHl_getDeadtime
IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getDeadtime(IfxGtm_Tom_PwmHl *driver)
Returns the dead time.
Definition: IfxGtm_Tom_PwmHl.c:148
IfxGtm_Tom_PwmHl_setMode
IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMode(IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxGtm_Tom_PwmHl.c:320
IfxGtm_Tom_PwmHl_getMode
IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Tom_PwmHl_getMode(IfxGtm_Tom_PwmHl *driver)
Returns Pwm mode.
Definition: IfxGtm_Tom_PwmHl.c:160
IfxGtm_Tom_PwmHl_setupChannels
IFX_EXTERN void IfxGtm_Tom_PwmHl_setupChannels(IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels.
Definition: IfxGtm_Tom_PwmHl.c:407
IfxGtm_Tom_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxGtm_Tom_PwmHl.h:175
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:283
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxGtm_Tom_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxGtm_Tom_PwmHl.h:174
IfxGtm_Tom_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxGtm_Tom_PwmHl.h:173
IfxGtm_Tom_PwmHl_s::coutx
IfxGtm_Tom_Ch coutx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]
TOM channels used for the OUTX outputs.
Definition: IfxGtm_Tom_PwmHl.h:221
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Tom_PwmHl_Config
GTM TOM: PWM HL configuration.
Definition: IfxGtm_Tom_PwmHl.h:187
IfxGtm_Tom_PwmHl_initConfig
IFX_EXTERN void IfxGtm_Tom_PwmHl_initConfig(IfxGtm_Tom_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxGtm_Tom_PwmHl.c:289
IfxGtm_Tom_PwmHl_s::ccxTemp
IfxGtm_Tom_Ch * ccxTemp
cached value
Definition: IfxGtm_Tom_PwmHl.h:222
IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration.
Definition: IfxStdIf_PwmHl.h:200
IfxGtm_Tom_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxGtm_Tom_PwmHl.h:176
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:199
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IfxGtm_Tom_PwmHl_UpdatePulse
void(* IfxGtm_Tom_PwmHl_UpdatePulse)(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Definition: IfxGtm_Tom_PwmHl.h:158
IfxGtm_Tom_PwmHl_init
IFX_EXTERN boolean IfxGtm_Tom_PwmHl_init(IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do n...
Definition: IfxGtm_Tom_PwmHl.c:166
IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:116
IfxGtm_Tom_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxGtm_Tom_PwmHl.h:171
IfxGtm_Tom_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxGtm_Tom_PwmHl.h:170
IfxGtm_Tom_PwmHl_Mode::update
IfxGtm_Tom_PwmHl_Update update
update call back function for the selected mode
Definition: IfxGtm_Tom_PwmHl.h:204
IfxStdIf_PwmHl.h
Standard interface: Multi-channels, dual-complementary PWM interface.
IfxGtm_Tom_Timer
TOM Timer interface Handle.
Definition: IfxGtm_Tom_Timer.h:160
IfxGtm_Tom_PwmHl_Mode::updatePulse
IfxGtm_Tom_PwmHl_UpdatePulse updatePulse
update pulse call back function for the selected mode
Definition: IfxGtm_Tom_PwmHl.h:206
IfxGtm_Tom_PwmHl_s
GTM TOM PWM driver.
Definition: IfxGtm_Tom_PwmHl.h:211
IfxGtm_Tom_PwmHl_Config::timer
IfxGtm_Tom_Timer * timer
Pointer to the linked timer object.
Definition: IfxGtm_Tom_PwmHl.h:190
IfxGtm_Tom_PwmHl_s::tgc
Ifx_GTM_TOM_TGC * tgc
TGC unit used.
Definition: IfxGtm_Tom_PwmHl.h:219
IfxGtm_Tom_PwmHl_s::tom
Ifx_GTM_TOM * tom
TOM unit used.
Definition: IfxGtm_Tom_PwmHl.h:218
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:275
IfxGtm_Tom_PwmHl_s::coutxTemp
IfxGtm_Tom_Ch * coutxTemp
cached value
Definition: IfxGtm_Tom_PwmHl.h:223
IfxGtm_Tom_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxGtm_Tom_PwmHl.h:200
IfxGtm_Tom_PwmHl_s::ccx
IfxGtm_Tom_Ch ccx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]
TOM channels used for the CCCX outputs.
Definition: IfxGtm_Tom_PwmHl.h:220
IfxGtm_Tom_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxGtm_Tom_PwmHl.h:177
IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output Limited...
Definition: IfxGtm_Tom_PwmHl.h:146
IfxGtm_Tom_PwmHl_setOnTime
IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTime(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time.
Definition: IfxGtm_Tom_PwmHl.c:389
IfxGtm_Tom_PwmHl_Mode::updateAndShift
IfxGtm_Tom_PwmHl_UpdateShift updateAndShift
update shift call back function for the selected mode
Definition: IfxGtm_Tom_PwmHl.h:205
IfxGtm_Tom_PwmHl_Config::tom
IfxGtm_Tom tom
TOM unit used.
Definition: IfxGtm_Tom_PwmHl.h:191
IfxGtm_Tom_PwmHl_UpdateShift
void(* IfxGtm_Tom_PwmHl_UpdateShift)(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Definition: IfxGtm_Tom_PwmHl.h:156
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxGtm_Tom_PwmHl_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver: user handles separately...
Definition: IfxGtm_Tom_PwmHl.h:194
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Tom_PwmHl_Config::ccx
IFX_CONST IfxGtm_Tom_ToutMapP * ccx
Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for c...
Definition: IfxGtm_Tom_PwmHl.h:192
sint8
signed char sint8
Definition: Platform_Types.h:125
IfxGtm_Tom_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Tom_PwmHl.h:168
IfxGtm_Tom_Timer.h
GTM TIMER details.


iLLD_TC26B: IfxGtm_Tom_Timer.c Source File

  • Gtm
  • Tom
  • Timer
IfxGtm_Tom_Timer.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_Timer.c
3 * \brief GTM TIMER details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Tom_Timer.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "IfxGtm_bf.h"
49 #include "stddef.h"
50 #include "string.h"
51
52 /******************************************************************************/
53 /*-------------------------Function Implementations---------------------------*/
54 /******************************************************************************/
55
56 boolean IfxGtm_Tom_Timer_acknowledgeTimerIrq(IfxGtm_Tom_Timer *driver)
57 {
58 boolean event;
59
60 event = IfxGtm_Tom_Ch_isZeroNotification(driver->tom, driver->timerChannel);
61
62 if (event)
63 {
64 IfxGtm_Tom_Ch_clearZeroNotification(driver->tom, driver->timerChannel);
65 }
66 else
67 {}
68
69 return event;
70 }
71
72
73 boolean IfxGtm_Tom_Timer_acknowledgeTriggerIrq(IfxGtm_Tom_Timer *driver)
74 {
75 boolean event;
76
77 event = IfxGtm_Tom_Ch_isOneNotification(driver->tom, driver->triggerChannel);
78
79 if (event)
80 {
81 IfxGtm_Tom_Ch_clearOneNotification(driver->tom, driver->triggerChannel);
82 }
83 else
84 {}
85
86 return event;
87 }
88
89
90 void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
91 {
92 if (driver->timerChannel <= IfxGtm_Tom_Ch_7)
93 {
94 if (channel <= IfxGtm_Tom_Ch_7)
95 {
96 driver->channelsMask[0] |= 1 << channel;
97 driver->tgcGlobalControlDisableUpdate[0] = IfxGtm_Tom_Tgc_buildFeature(0, driver->channelsMask[0], IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
98 driver->tgcGlobalControlApplyUpdate[0] = IfxGtm_Tom_Tgc_buildFeature(driver->channelsMask[0], 0, IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
99 }
100 else
101 {
102 driver->channelsMask[1] |= 1 << (channel - IfxGtm_Tom_Ch_8);
103 driver->tgcGlobalControlDisableUpdate[1] = IfxGtm_Tom_Tgc_buildFeature(0, driver->channelsMask[1], IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
104 driver->tgcGlobalControlApplyUpdate[1] = IfxGtm_Tom_Tgc_buildFeature(driver->channelsMask[1], 0, IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
105 }
106 }
107 else
108 {
109 driver->channelsMask[0] |= 1 << (channel - IfxGtm_Tom_Ch_8);
110 driver->tgcGlobalControlDisableUpdate[0] = IfxGtm_Tom_Tgc_buildFeature(0, driver->channelsMask[0], IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
111 driver->tgcGlobalControlApplyUpdate[0] = IfxGtm_Tom_Tgc_buildFeature(driver->channelsMask[0], 0, IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
112 }
113 }
114
115
116 void IfxGtm_Tom_Timer_applyUpdate(IfxGtm_Tom_Timer *driver)
117 {
118 IfxGtm_Tom_Tgc_writeGlobalControl(driver->tgc[0], driver->tgcGlobalControlApplyUpdate[0]);
119
120 if (driver->tgc[1])
121 {
122 IfxGtm_Tom_Tgc_writeGlobalControl(driver->tgc[1], driver->tgcGlobalControlApplyUpdate[1]); /* Note: Write of 0 value has no effect */
123 }
124 }
125
126
127 void IfxGtm_Tom_Timer_disableUpdate(IfxGtm_Tom_Timer *driver)
128 {
129 IfxGtm_Tom_Tgc_writeGlobalControl(driver->tgc[0], driver->tgcGlobalControlDisableUpdate[0]);
130
131 if (driver->tgc[1])
132 {
133 IfxGtm_Tom_Tgc_writeGlobalControl(driver->tgc[1], driver->tgcGlobalControlDisableUpdate[1]); /* Note: Write of 0 value has no effect */
134 }
135 }
136
137
138 float32 IfxGtm_Tom_Timer_getFrequency(IfxGtm_Tom_Timer *driver)
139 {
140 return 1.0 / IfxStdIf_Timer_tickToS(driver->base.clockFreq, driver->base.period);
141 }
142
143
144 float32 IfxGtm_Tom_Timer_getInputFrequency(IfxGtm_Tom_Timer *driver)
145 {
146 return driver->base.clockFreq;
147 }
148
149
150 Ifx_TimerValue IfxGtm_Tom_Timer_getOffset(IfxGtm_Tom_Timer *driver)
151 {
152 return driver->offset;
153 }
154
155
156 Ifx_TimerValue IfxGtm_Tom_Timer_getPeriod(IfxGtm_Tom_Timer *driver)
157 {
158 return driver->base.period;
159 }
160
161
162 volatile uint32 *IfxGtm_Tom_Timer_getPointer(IfxGtm_Tom_Timer *driver)
163 {
164 return IfxGtm_Tom_Ch_getTimerPointer(driver->tom, driver->timerChannel);
165 }
166
167
168 float32 IfxGtm_Tom_Timer_getResolution(IfxGtm_Tom_Timer *driver)
169 {
170 return 1.0 / driver->base.clockFreq;
171 }
172
173
174 Ifx_TimerValue IfxGtm_Tom_Timer_getTrigger(IfxGtm_Tom_Timer *driver)
175 {
176 return IfxGtm_Tom_Ch_getCompareOne(driver->tom, driver->triggerChannel) - 1;
177 }
178
179
180 volatile uint32 *IfxGtm_Tom_Timer_getTriggerPointer(IfxGtm_Tom_Timer *driver)
181 {
182 return IfxGtm_Tom_Ch_getCompareOnePointer(driver->tom, driver->triggerChannel);
183 }
184
185
186 boolean IfxGtm_Tom_Timer_init(IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
187 {
188 boolean result = TRUE;
189 IfxGtm_Tom_Timer_Base *base = &driver->base;
190 uint16 maskShift;
191
192 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.countDir == IfxStdIf_Timer_CountDir_up); /* only this mode is supported */
193
194 driver->gtm = config->gtm;
195 driver->tomIndex = config->tom;
196 driver->tom = &config->gtm->TOM[config->tom];
197 driver->timerChannel = config->timerChannel;
198
199 base->triggerEnabled = config->base.trigger.enabled;
200
201 if (base->triggerEnabled)
202 {
203 if (config->triggerOut != NULL_PTR)
204 {
205 driver->triggerChannel = config->triggerOut->channel;
206 }
207 else
208 {
209 result = FALSE;
210 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result); /* triggerOut is required */
211 }
212 }
213 else
214 {
215 driver->triggerChannel = driver->timerChannel; // Set to timer channel to disable its use
216 }
217
218 if (config->timerChannel <= 7)
219 {
220 driver->tgc[0] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 0);
221 driver->tgc[1] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
222 }
223 else
224 {
225 driver->tgc[0] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
226 driver->tgc[1] = NULL_PTR; /* NOTE currently no concatenation between TOMs */
227 }
228
229 driver->channelsMask[0] = 0;
230 driver->tgcGlobalControlApplyUpdate[0] = 0;
231 driver->tgcGlobalControlDisableUpdate[0] = 0;
232
233 driver->channelsMask[1] = 0;
234 driver->tgcGlobalControlApplyUpdate[1] = 0;
235 driver->tgcGlobalControlDisableUpdate[1] = 0;
236
237 /* Initialize the timer part */
238 IfxGtm_Tom_Ch_setClockSource(driver->tom, driver->timerChannel, config->clock);
239 IfxGtm_Tom_Ch_setTriggerOutput(driver->tom, driver->timerChannel, IfxGtm_Tom_Ch_OutputTrigger_generate);
240
241 IfxGtm_Tom_Timer_updateInputFrequency(driver);
242
243 if ((config->base.minResolution > 0) && ((1.0 / base->clockFreq) > config->base.minResolution))
244 {
245 result = FALSE;
246 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
247 }
248 else
249 {}
250
251 IfxGtm_Tom_Timer_setFrequency(driver, config->base.frequency);
252
253 driver->offset = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / config->base.frequency * config->base.startOffset);
254
255 IfxGtm_Tom_Ch_setCounterValue(driver->tom, driver->timerChannel, driver->offset);
256
257 /* Initialize the trigger part */
258 maskShift = (config->timerChannel <= 7) ? 0 : 8;
259 IfxGtm_Tom_Timer_addToChannelMask(driver, driver->timerChannel);
260
261 if (base->triggerEnabled)
262 {
263 IfxGtm_Tom_Ch triggerChannel = driver->triggerChannel;
264 uint16 triggerChannelMask = 1 << (triggerChannel - maskShift);
265 /* TO DO: enable the trigger to be not in the same TGC group as the timer */
266
267 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, triggerChannel, config->base.trigger.risingEdgeAtPeriod ? Ifx_ActiveState_high : Ifx_ActiveState_low);
268 IfxGtm_Tom_Ch_setCounterValue(driver->tom, triggerChannel, driver->offset);
269
270 if (triggerChannel != driver->timerChannel)
271 {
272 IfxGtm_Tom_Ch_setResetSource(driver->tom, triggerChannel, IfxGtm_Tom_Ch_ResetEvent_onTrigger);
273 IfxGtm_Tom_Ch_setClockSource(driver->tom, triggerChannel, config->clock);
274 IfxGtm_Tom_Ch_setTriggerOutput(driver->tom, triggerChannel, IfxGtm_Tom_Ch_OutputTrigger_forward);
275 IfxGtm_Tom_Tgc_enableChannels(driver->tgc[0], triggerChannelMask, 0, FALSE);
276 IfxGtm_Tom_Timer_addToChannelMask(driver, driver->triggerChannel);
277 }
278 else
279 {}
280
281 /* Signal must go out of the GTM even if the port outpout is not enabled */
282 IfxGtm_Tom_Tgc_enableChannelsOutput(driver->tgc[0], triggerChannelMask, 0, FALSE);
283
284 if ((config->base.trigger.outputEnabled) && (config->initPins == TRUE))
285 {
286 /* Initialize the port */
287 IfxGtm_PinMap_setTomTout(config->triggerOut, config->base.trigger.outputMode, config->base.trigger.outputDriver);
288 }
289 else
290 {}
291
292 IfxGtm_Tom_Timer_setTrigger(driver, config->base.trigger.triggerPoint);
293 }
294 else
295 {}
296
297 /* Interrupt configuration */
298 {
299 volatile Ifx_SRC_SRCR *src;
300 boolean timerHasIrq = config->base.isrPriority > 0;
301 boolean triggerHasIrq = (config->base.trigger.isrPriority > 0) && base->triggerEnabled;
302
303 if (driver->triggerChannel == driver->timerChannel)
304 {
305 IfxGtm_Tom_Ch_setNotification(driver->tom, driver->timerChannel, timerHasIrq ? config->irqModeTimer : config->irqModeTrigger, timerHasIrq, triggerHasIrq);
306 src = IfxGtm_Tom_Ch_getSrcPointer(driver->gtm, config->tom, driver->timerChannel);
307 IfxSrc_init(src, timerHasIrq ? config->base.isrProvider : config->base.trigger.isrProvider, timerHasIrq ? config->base.isrPriority : config->base.trigger.isrPriority);
308 IfxSrc_enable(src);
309 }
310 else
311 {
312 IfxGtm_IrqMode irqMode = IfxGtm_IrqMode_pulseNotify;
313
314 if (timerHasIrq)
315 {
316 IfxGtm_Tom_Ch_setNotification(driver->tom, driver->timerChannel, irqMode, TRUE, FALSE);
317 src = IfxGtm_Tom_Ch_getSrcPointer(driver->gtm, config->tom, driver->timerChannel);
318 IfxSrc_init(src, config->base.isrProvider, config->base.isrPriority);
319 IfxSrc_enable(src);
320 }
321
322 if (triggerHasIrq)
323 {
324 IfxGtm_Tom_Ch_setNotification(driver->tom, driver->triggerChannel, irqMode, FALSE, TRUE);
325 src = IfxGtm_Tom_Ch_getSrcPointer(driver->gtm, config->tom, driver->triggerChannel);
326 IfxSrc_init(src, config->base.trigger.isrProvider, config->base.trigger.isrPriority);
327 IfxSrc_enable(src);
328 }
329 }
330 }
331
332 /* Transfer the shadow registers */
333 IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc[0], driver->channelsMask[0], 0, 0, 0);
334 IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
335 IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc[0], 0, driver->channelsMask[0], 0, 0);
336
337 return result;
338 }
339
340
341 void IfxGtm_Tom_Timer_initConfig(IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
342 {
343 IfxStdIf_Timer_initConfig(&config->base);
344 config->gtm = gtm;
345 config->tom = IfxGtm_Tom_0;
346 config->timerChannel = IfxGtm_Tom_Ch_0;
347 config->triggerOut = NULL_PTR;
348 config->clock = IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0;
349 config->base.countDir = IfxStdIf_Timer_CountDir_up;
350 config->irqModeTimer = IfxGtm_IrqMode_level;
351 config->irqModeTrigger = IfxGtm_IrqMode_level;
352 config->initPins = TRUE;
353 }
354
355
356 void IfxGtm_Tom_Timer_run(IfxGtm_Tom_Timer *driver)
357 {
358 IfxGtm_Tom_Tgc_enableChannels(driver->tgc[0], driver->channelsMask[0], 0, TRUE);
359
360 if (driver->tgc[1])
361 {
362 IfxGtm_Tom_Tgc_enableChannels(driver->tgc[1], driver->channelsMask[1], 0, TRUE); /* Note: Write of 0 value has no effect */
363 }
364 }
365
366
367 boolean IfxGtm_Tom_Timer_setFrequency(IfxGtm_Tom_Timer *driver, float32 frequency)
368 {
369 Ifx_TimerValue period = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / frequency);
370
371 return IfxGtm_Tom_Timer_setPeriod(driver, period);
372 }
373
374
375 boolean IfxGtm_Tom_Timer_setPeriod(IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
376 {
377 driver->base.period = period;
378 IfxGtm_Tom_Ch_setCompareZeroShadow(driver->tom, driver->timerChannel, period);
379
380 if (driver->triggerChannel != driver->timerChannel)
381 {
382 IfxGtm_Tom_Ch_setCompareZeroShadow(driver->tom, driver->triggerChannel, period);
383 }
384
385 return TRUE;
386 }
387
388
389 void IfxGtm_Tom_Timer_setSingleMode(IfxGtm_Tom_Timer *driver, boolean enabled)
390 {
391 IfxGtm_Tom_Ch_setOneShotMode(driver->tom, driver->timerChannel, enabled);
392 }
393
394
395 void IfxGtm_Tom_Timer_setTrigger(IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
396 {
397 IfxGtm_Tom_Ch_setCompareOneShadow(driver->tom, driver->triggerChannel, triggerPoint + 1);
398 }
399
400
401 boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
402 {
403 /* Ensure the stdif is reset to zeros */
404 memset(stdif, 0, sizeof(IfxStdIf_Timer));
405
406 /* *INDENT-OFF* Note: this file was indented manually by the author. */
407 /* Set the API link */
408 stdif->driver = driver;
409 stdif->getFrequency =(IfxStdIf_Timer_GetFrequency )&IfxGtm_Tom_Timer_getFrequency;
410 stdif->getPeriod =(IfxStdIf_Timer_GetPeriod )&IfxGtm_Tom_Timer_getPeriod;
411 stdif->getResolution =(IfxStdIf_Timer_GetResolution )&IfxGtm_Tom_Timer_getResolution;
412 stdif->getTrigger =(IfxStdIf_Timer_GetTrigger )&IfxGtm_Tom_Timer_getTrigger;
413 stdif->setFrequency =(IfxStdIf_Timer_SetFrequency )&IfxGtm_Tom_Timer_setFrequency;
414 stdif->updateInputFrequency =(IfxStdIf_Timer_UpdateInputFrequency)&IfxGtm_Tom_Timer_updateInputFrequency;
415 stdif->applyUpdate =(IfxStdIf_Timer_ApplyUpdate )&IfxGtm_Tom_Timer_applyUpdate;
416 stdif->disableUpdate =(IfxStdIf_Timer_DisableUpdate )&IfxGtm_Tom_Timer_disableUpdate;
417 stdif->getInputFrequency =(IfxStdIf_Timer_GetInputFrequency )&IfxGtm_Tom_Timer_getInputFrequency;
418 stdif->run =(IfxStdIf_Timer_Run )&IfxGtm_Tom_Timer_run;
419 stdif->setPeriod =(IfxStdIf_Timer_SetPeriod )&IfxGtm_Tom_Timer_setPeriod;
420 stdif->setSingleMode =(IfxStdIf_Timer_SetSingleMode )&IfxGtm_Tom_Timer_setSingleMode;
421 stdif->setTrigger =(IfxStdIf_Timer_SetTrigger )&IfxGtm_Tom_Timer_setTrigger;
422 stdif->stop =(IfxStdIf_Timer_Stop )&IfxGtm_Tom_Timer_stop;
423 stdif->ackTimerIrq =(IfxStdIf_Timer_AckTimerIrq )&IfxGtm_Tom_Timer_acknowledgeTimerIrq;
424 stdif->ackTriggerIrq =(IfxStdIf_Timer_AckTriggerIrq )&IfxGtm_Tom_Timer_acknowledgeTriggerIrq;
425 /* *INDENT-ON* */
426
427 return TRUE;
428 }
429
430
431 void IfxGtm_Tom_Timer_stop(IfxGtm_Tom_Timer *driver)
432 {
433 IfxGtm_Tom_Tgc_enableChannels(driver->tgc[0], 0, driver->channelsMask[0], TRUE);
434
435 if (driver->tgc[1])
436 {
437 IfxGtm_Tom_Tgc_enableChannels(driver->tgc[1], 0, driver->channelsMask[1], TRUE); /* Note: Write of 0 value has no effect */
438 }
439 }
440
441
442 void IfxGtm_Tom_Timer_updateInputFrequency(IfxGtm_Tom_Timer *driver)
443 {
444 driver->base.clockFreq = IfxGtm_Tom_Ch_getClockFrequency(driver->gtm, driver->tom, driver->timerChannel);
445 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxStdIf_Timer_::getTrigger
IfxStdIf_Timer_GetTrigger getTrigger
Definition: IfxStdIf_Timer.h:243
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
IfxGtm_Tom_Timer_addToChannelMask
void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run.
Definition: IfxGtm_Tom_Timer.c:90
IfxGtm_Tom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Tom_Timer.h:150
IfxGtm_Tom_Ch_setTriggerOutput
void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Tom.c:348
IfxStdIf_Timer_GetTrigger
Ifx_TimerValue(* IfxStdIf_Timer_GetTrigger)(IfxStdIf_InterfaceDriver stdIf)
Return the timer trigger point.
Definition: IfxStdIf_Timer.h:117
IfxGtm_Tom_Timer_setFrequency
boolean IfxGtm_Tom_Timer_setFrequency(IfxGtm_Tom_Timer *driver, float32 frequency)
Sets the frequency.
Definition: IfxGtm_Tom_Timer.c:367
IfxGtm_Tom_Timer_Config::tom
IfxGtm_Tom tom
Index of the TOM object used.
Definition: IfxGtm_Tom_Timer.h:181
IfxStdIf_Timer_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxStdIf_Timer.h:276
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxGtm_Tom_Timer::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tom_Timer.h:163
IfxGtm_IrqMode_level
Definition: IfxGtm.h:66
IfxGtm_Tom_Ch_getCompareOnePointer
volatile uint32 * IfxGtm_Tom_Ch_getCompareOnePointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Tom.c:112
IfxStdIf_Timer_GetFrequency
float32(* IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:99
IfxGtm_Tom_Timer_Config::initPins
boolean initPins
TRUE : Initialize pins in driver. FALSE: Don&#39;t initialize pins : handled separately by user...
Definition: IfxGtm_Tom_Timer.h:187
IfxGtm_Tom_Tgc_buildFeature
uint32 IfxGtm_Tom_Tgc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Tom.c:356
IfxGtm_Tom_Ch_isZeroNotification
boolean IfxGtm_Tom_Ch_isZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Tom.c:186
IfxGtm_Tom_Timer_getPointer
volatile uint32 * IfxGtm_Tom_Timer_getPointer(IfxGtm_Tom_Timer *driver)
Returns the pointer to timer channel.
Definition: IfxGtm_Tom_Timer.c:162
IfxStdIf_Timer_AckTriggerIrq
boolean(* IfxStdIf_Timer_AckTriggerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the trigger interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:233
IfxStdIf_Timer_UpdateInputFrequency
void(* IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:131
IfxGtm_Tom_Ch_setResetSource
void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Tom.c:321
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:253
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:251
IfxGtm_Tom_Timer_getTriggerPointer
volatile uint32 * IfxGtm_Tom_Timer_getTriggerPointer(IfxGtm_Tom_Timer *driver)
Returns the pointer to trigger channel.
Definition: IfxGtm_Tom_Timer.c:180
IfxGtm_Tom_Timer_disableUpdate
void IfxGtm_Tom_Timer_disableUpdate(IfxGtm_Tom_Timer *driver)
Disables the upadte.
Definition: IfxGtm_Tom_Timer.c:127
IfxStdIf_Timer_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Timer.h:239
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0
div 1
Definition: IfxGtm_Tom.h:83
IfxGtm_PinMap_setTomTout
void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:730
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
IfxGtm_Tom_Ch_setSignalLevel
void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Tom.c:329
IfxStdIf_Timer_TrigConfig::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver.
Definition: IfxStdIf_Timer.h:266
IfxGtm_Tom_Ch_isOneNotification
boolean IfxGtm_Tom_Ch_isOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Tom.c:177
IfxGtm_Tom_Ch_getTgcPointer
Ifx_GTM_TOM_TGC * IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer.
Definition: IfxGtm_Tom.c:153
IfxGtm_Tom_Ch_setNotification
void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Tom.c:286
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Tom_Timer::tgcGlobalControlApplyUpdate
uint32 tgcGlobalControlApplyUpdate[2]
Cached value for TGC GLOB_CTR.
Definition: IfxGtm_Tom_Timer.h:172
IfxStdIf_Timer_SetFrequency
boolean(* IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:125
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
Ifx_Assert.h
Assert functions.
IfxGtm_Tom_Timer::offset
Ifx_TimerValue offset
Timer initial offset in ticks.
Definition: IfxGtm_Tom_Timer.h:170
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:240
IfxGtm_Tom_Timer_getFrequency
float32 IfxGtm_Tom_Timer_getFrequency(IfxGtm_Tom_Timer *driver)
Returns the frequency.
Definition: IfxGtm_Tom_Timer.c:138
IfxGtm_Tom_Timer_setTrigger
void IfxGtm_Tom_Timer_setTrigger(IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxGtm_Tom_Timer.c:395
IfxGtm_Tom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Tom_Timer.h:148
IfxStdIf_Timer_GetResolution
float32(* IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:111
IfxGtm_Tom_Timer_getResolution
float32 IfxGtm_Tom_Timer_getResolution(IfxGtm_Tom_Timer *driver)
Returns the resolution.
Definition: IfxGtm_Tom_Timer.c:168
IfxGtm_Tom_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxGtm_Tom_Timer.h:179
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGtm_Tom_Timer_acknowledgeTriggerIrq
boolean IfxGtm_Tom_Timer_acknowledgeTriggerIrq(IfxGtm_Tom_Timer *driver)
Returns the trigger event.
Definition: IfxGtm_Tom_Timer.c:73
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:283
IfxStdIf_Timer_Config::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:275
IfxGtm_Tom_Ch_setOneShotMode
void IfxGtm_Tom_Ch_setOneShotMode(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Tom.c:304
IfxGtm_Tom_Timer_Config::irqModeTimer
IfxGtm_IrqMode irqModeTimer
Interrupt mode for the timer.
Definition: IfxGtm_Tom_Timer.h:185
IfxGtm_Tom_Timer_getInputFrequency
float32 IfxGtm_Tom_Timer_getInputFrequency(IfxGtm_Tom_Timer *driver)
Returns the Input frequncy.
Definition: IfxGtm_Tom_Timer.c:144
IfxGtm_Tom_Timer_acknowledgeTimerIrq
boolean IfxGtm_Tom_Timer_acknowledgeTimerIrq(IfxGtm_Tom_Timer *driver)
Returns the timer event.
Definition: IfxGtm_Tom_Timer.c:56
IfxGtm_Tom_Ch_getClockFrequency
float32 IfxGtm_Tom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz.
Definition: IfxGtm_Tom.c:68
IfxGtm_Tom_Timer_run
void IfxGtm_Tom_Timer_run(IfxGtm_Tom_Timer *driver)
Runs the timer.
Definition: IfxGtm_Tom_Timer.c:356
IfxGtm_Tom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Tom.h:104
IfxStdIf_Timer_::disableUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
Definition: IfxStdIf_Timer.h:247
IfxGtm_Tom_Timer::tgc
Ifx_GTM_TOM_TGC * tgc[2]
Pointer to the TGC object.
Definition: IfxGtm_Tom_Timer.h:165
IfxGtm_Tom_Ch_clearZeroNotification
void IfxGtm_Tom_Ch_clearZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Tom.c:61
IfxStdIf_Timer_GetInputFrequency
float32(* IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:175
IfxStdIf_Timer_SetTrigger
void(* IfxStdIf_Timer_SetTrigger)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
Set trigger point.
Definition: IfxStdIf_Timer.h:215
IfxGtm_Tom_Timer_Config
Configuration structure for TOM Timer.
Definition: IfxGtm_Tom_Timer.h:177
IfxGtm_Tom_Timer_stdIfTimerInit
boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Tom_Timer.c:401
IfxGtm_Tom_Ch_setCounterValue
void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Tom.c:267
IfxGtm_Tom_Timer::tom
Ifx_GTM_TOM * tom
Pointer to the TOM object.
Definition: IfxGtm_Tom_Timer.h:164
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:279
IfxStdIf_Timer_TrigConfig::risingEdgeAtPeriod
boolean risingEdgeAtPeriod
Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset...
Definition: IfxStdIf_Timer.h:267
IfxGtm_Tom_Ch_getCompareOne
uint32 IfxGtm_Tom_Ch_getCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Tom.c:104
IfxGtm_Tom_Timer_getTrigger
Ifx_TimerValue IfxGtm_Tom_Timer_getTrigger(IfxGtm_Tom_Timer *driver)
Returns the trigger point.
Definition: IfxGtm_Tom_Timer.c:174
IfxGtm_Tom_Timer_applyUpdate
void IfxGtm_Tom_Timer_applyUpdate(IfxGtm_Tom_Timer *driver)
Enables the transfer of the shadow registers.
Definition: IfxGtm_Tom_Timer.c:116
IfxStdIf_Timer_initConfig
void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:45
IfxGtm_Tom_ToutMap::channel
IfxGtm_Tom_Ch channel
TOM channel index.
Definition: IfxGtm_PinMap.h:119
IfxGtm_Tom_Tgc_trigger
void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Tom.c:552
IfxGtm_Tom_Ch_clearOneNotification
void IfxGtm_Tom_Ch_clearOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Tom.c:54
IfxStdIf_Timer_CountDir_up
Timer is counting up.
Definition: IfxStdIf_Timer.h:87
IfxGtm_Tom_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxGtm_Tom_Timer.h:149
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:248
IfxGtm_Tom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC.
Definition: IfxGtm_Tom.c:146
IfxGtm_Tom_Timer
TOM Timer interface Handle.
Definition: IfxGtm_Tom_Timer.h:160
IfxGtm_Tom_Timer_setSingleMode
void IfxGtm_Tom_Timer_setSingleMode(IfxGtm_Tom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxGtm_Tom_Timer.c:389
IfxGtm_Tom_Timer_updateInputFrequency
void IfxGtm_Tom_Timer_updateInputFrequency(IfxGtm_Tom_Timer *driver)
Updates the input frequency.
Definition: IfxGtm_Tom_Timer.c:442
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:68
IfxGtm_Tom_Ch_setCompareOneShadow
void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Tom.c:234
IfxStdIf_Timer_TrigConfig::triggerPoint
Ifx_TimerValue triggerPoint
Trigger point in timer ticks.
Definition: IfxStdIf_Timer.h:262
IfxGtm_Tom_Ch_0
TOM channel 0.
Definition: IfxGtm_cfg.h:286
IfxGtm_Tom_Ch_getTimerPointer
volatile uint32 * IfxGtm_Tom_Ch_getTimerPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Tom.c:170
IfxGtm_Tom_Timer_setPeriod
boolean IfxGtm_Tom_Timer_setPeriod(IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxGtm_Tom_Timer.c:375
IfxStdIf_Timer_::setTrigger
IfxStdIf_Timer_SetTrigger setTrigger
Definition: IfxStdIf_Timer.h:252
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Tom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Tom.h:95
IfxGtm_Tom_Timer_Config::clock
IfxGtm_Tom_Ch_ClkSrc clock
Timer input clock.
Definition: IfxGtm_Tom_Timer.h:184
IfxGtm_Tom_Timer::channelsMask
uint16 channelsMask[2]
Mask for channels to be modified together, The 1st value corresponds to the Timer&#39;s TGC...
Definition: IfxGtm_Tom_Timer.h:169
IfxGtm_Tom_Ch_setClockSource
void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source.
Definition: IfxGtm_Tom.c:209
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:244
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:249
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:245
IfxGtm_Tom_Tgc_setChannelsForceUpdate
void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Tom.c:530
IfxGtm_Tom_Tgc_enableChannelsOutput
void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Tom.c:464
IfxStdIf_Timer_GetPeriod
Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:105
IfxGtm_Tom_Timer_initConfig
void IfxGtm_Tom_Timer_initConfig(IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tom_Timer.c:341
IfxStdIf_Timer_DisableUpdate
void(* IfxStdIf_Timer_DisableUpdate)(IfxStdIf_InterfaceDriver stdIf)
Disable updates.
Definition: IfxStdIf_Timer.h:169
IfxGtm_Tom_Timer_stop
void IfxGtm_Tom_Timer_stop(IfxGtm_Tom_Timer *driver)
Stops the timer.
Definition: IfxGtm_Tom_Timer.c:431
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxGtm_Tom_0
TOM object 0.
Definition: IfxGtm_cfg.h:277
IfxGtm_Tom_Tgc_writeGlobalControl
IFX_INLINE void IfxGtm_Tom_Tgc_writeGlobalControl(Ifx_GTM_TOM_TGC *tgc, uint32 control)
Sets the tgc global control value.
Definition: IfxGtm_Tom.h:528
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:250
IfxGtm_Tom_Timer_Config::triggerOut
IfxGtm_Tom_ToutMap * triggerOut
TOM channel used for the trigger output, can be identical to the timer channel.
Definition: IfxGtm_Tom_Timer.h:183
IfxStdIf_Timer_::ackTriggerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
Definition: IfxStdIf_Timer.h:255
IfxGtm_Tom_Timer::base
IfxGtm_Tom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Tom_Timer.h:162
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:274
IfxStdIf_Timer_ApplyUpdate
void(* IfxStdIf_Timer_ApplyUpdate)(IfxStdIf_InterfaceDriver stdIf)
Apply requested updates.
Definition: IfxStdIf_Timer.h:152
IfxGtm_Tom_Timer::tomIndex
IfxGtm_Tom tomIndex
Enum for TOM objects.
Definition: IfxGtm_Tom_Timer.h:166
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Tom_Ch_7
TOM channel 7.
Definition: IfxGtm_cfg.h:293
IfxStdIf_Timer_Run
void(* IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:184
IfxGtm_Tom_Ch_8
TOM channel 8.
Definition: IfxGtm_cfg.h:294
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:242
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:278
IfxGtm_Tom_Timer_Base
Structure for the timer base.
Definition: IfxGtm_Tom_Timer.h:146
IfxGtm_Tom_Timer_getPeriod
Ifx_TimerValue IfxGtm_Tom_Timer_getPeriod(IfxGtm_Tom_Timer *driver)
Returns the period of the timer.
Definition: IfxGtm_Tom_Timer.c:156
IfxGtm_Tom_Tgc_enableChannels
void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Tom.c:446
IfxStdIf_Timer_Config::startOffset
float32 startOffset
FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
Definition: IfxStdIf_Timer.h:280
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxStdIf_Timer_Stop
void(* IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:221
IfxStdIf_Timer_::applyUpdate
IfxStdIf_Timer_ApplyUpdate applyUpdate
Definition: IfxStdIf_Timer.h:246
IfxStdIf_Timer_AckTimerIrq
boolean(* IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:227
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxGtm_Tom_Timer::timerChannel
IfxGtm_Tom_Ch timerChannel
TOM channel used for the timer.
Definition: IfxGtm_Tom_Timer.h:167
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:261
IfxStdIf_Timer_TrigConfig::outputEnabled
boolean outputEnabled
If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
Definition: IfxStdIf_Timer.h:268
IfxGtm_Tom_Ch_setCompareZeroShadow
void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Tom.c:259
IfxStdIf_Timer_SetPeriod
boolean(* IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:194
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:277
IfxGtm_Tom_Timer_Config::irqModeTrigger
IfxGtm_IrqMode irqModeTrigger
Interrupt mode for the trigger.
Definition: IfxGtm_Tom_Timer.h:186
IfxGtm_Tom_Timer_init
boolean IfxGtm_Tom_Timer_init(IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
Initialises the timer object.
Definition: IfxGtm_Tom_Timer.c:186
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxGtm_Tom_Ch_OutputTrigger_generate
Generate the trigger from the current channel.
Definition: IfxGtm_Tom.h:96
IfxStdIf_Timer_TrigConfig::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxStdIf_Timer.h:265
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:254
IfxStdIf_Timer_SetSingleMode
void(* IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:203
IfxGtm_Tom_Timer_getOffset
Ifx_TimerValue IfxGtm_Tom_Timer_getOffset(IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks.
Definition: IfxGtm_Tom_Timer.c:150
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:241
IfxGtm_Tom_Timer.h
GTM TIMER details.
IfxGtm_Tom_Timer::tgcGlobalControlDisableUpdate
uint32 tgcGlobalControlDisableUpdate[2]
Cached value for TGC GLOB_CTR.
Definition: IfxGtm_Tom_Timer.h:171
IfxGtm_Tom_Timer::triggerChannel
IfxGtm_Tom_Ch triggerChannel
TOM channel used for the trigger, can be identical to the timer channel.
Definition: IfxGtm_Tom_Timer.h:168


iLLD_TC26B: IfxGtm_Tom_Timer.h Source File

  • Gtm
  • Tom
  • Timer
IfxGtm_Tom_Timer.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_Timer.h
3 * \brief GTM TIMER details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Tom_Timer_Usage How to use the GTM TOM Timer Driver
42 * \ingroup IfxLld_Gtm_Tom_Timer
43 *
44 * This driver implements the timer functionalities as defined by \ref library_srvsw_stdif_timer.
45 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_timer "standard interface APIs".
46 *
47 * \section specific Specific Implementation
48 * The timer fucntinality is implemented using either a single or 2 TOM channels. The dicision to use 1 or 2 channels is done
49 * depending on the following requirements:
50 * - relative position of the timer channel to the other channels used if any
51 * - need to trigger an other module, for example ADC triggering.
52 *
53 * The figure below show how the TOM is \ref IfxGtm_Tom_Timer_Config "configured" when a single TOM channel is used for the timer and trigger functinalities.
54 * The internal trigger signal (red line) is generated when the counter CN0 reach the CM0 compare register. The value of CM0 act as the period value. This internal
55 * trigger is used to reset the CN0 counter and simultaneously transfer the shadow values for the period value (SR0->CM0)
56 * and trigger edge (SR1->CM1). The internal trigger is used as a trigger input to the next TOM channel.
57 * The trigger signal (output trigger) is generated by the CM0 and CM1 compare values. Depending on the trigger signal active
58 * edge \ref IfxGtm_Tom_Timer_Config "configuiration", the CM0 will reset, and the CM1 will set the trigger signal, or vice versa.
59 *
60 * \image html "IfxGtm_Tom_Timer-0.png" "Timer using one signle TOM channel"
61 *
62 * In case 2 TOM channels are used for the timer and trigger functionalities,
63 * the 1st channel (CHz in the figure below) is used for the generation of the period,
64 * and the 2nd channel (CHz+n the below figure, the figure shows n=1 as example) is used for the trigger generation.
65 *
66 * The CHz TOM channel generates the internal trigger signal (red line) when the counter CN0 reach the CM0 compare register.
67 * The value of CM0 of CHz act as the period value. This internal trigger is used to reset the CN0 counter and simultaneously
68 * transfer the shadow period value (SR0->CM0). The internal trigger is used as an input for the next TOM channel.
69 *
70 * The CHz+n TOM channel, uses the internal trigger signal to simultaneously resets the
71 * counter CN0, and transfer the shadow values used for the generation of the trigger falling and rising edges (SR0->CM0 and SR1->CM1).
72 * The internal trigger is used as a trigger input to the next TOM channel.
73 * Depending on the trigger signal active edge \ref IfxGtm_Tom_Timer_Config "configuiration", the CM0 will reset, and the CM1 will set the trigger signal, or vice versa.
74 * In orter to have a similar behaviour to the single channel implementation,
75 * the CM0 is set to the same value as CHz CM0, and CM1 is used for the trigger edge.
76 *
77 * \image html "IfxGtm_Tom_Timer-1.png" "Timer using two different TOM channels for the timer and the trigger"
78 *
79 *
80 * In order to ensure a coherent update of all registers, the internal trigger must be disable before updating
81 * the timer and trigger shadow values, and enabled once the update is done. The transfer will ocucrs at the next timer reset.
82 *
83 * - Resources used:
84 * - if the trigger channel is identical to the timer channel, only one TOM channels is used
85 * - if the trigger channel is different from the timer channel, 2 TOM channels are used
86 * - All channels used must be own by the same TOM and TOM TGC
87 * - The timer counting direction is limited to \ref IfxStdIf_Timer_CountDir_up
88 * - If the TOM trigger channel is not the same as the TOM timer channels
89 * - The TOM channel used for the trigger must have a lower index than the TOM channels
90 * used for the timer.
91 * - the TOM channels must be contiguous, unless specified by the driver using the timer driver.
92 *
93 * Note: the timer and trigger must bepart of the same TGC, but PWM channels can be of different TGC of the same TOM as the timer
94 *
95 * For a detailed configuration of the microcontroller, see \ref IfxGtm_Tom_Timer_init().
96 *
97 * \section example Usage example
98 * Initialisation:
99 * \code
100 * IfxGtm_Tom_Timer_Config driverConfig;
101 * IfxGtm_Tom_Timer driverData;
102 * IfxStdIf_Timer timer;
103 * IfxGtm_Tom_Timer_initConfig(&driverConfig, &MODULE_GTM);
104 * IfxGtm_Tom_Timer_init (&driverData, &driverConfig);
105 * boolean IfxGtm_Tom_Timer_stdIfTimerInit(&timer, &driverData);
106 * \endcode
107 *
108 * During run-time, \ref library_srvsw_stdif_timer "the interface functions" should be used:
109 * \code
110 * IfxStdIf_Timer_run(timer);
111 * IfxStdIf_Timer_disableUpdate(timer);
112 * IfxStdIf_Timer_setPeriod(timer, period);
113 * IfxStdIf_Timer_applyUpdate(timer);
114 * \endcode
115 *
116 * \defgroup IfxLld_Gtm_Tom_Timer TOM Timer Interface Driver
117 * \ingroup IfxLld_Gtm_Tom
118 * \defgroup IfxLld_Gtm_Tom_Timer_Data_Structures Data Structures
119 * \ingroup IfxLld_Gtm_Tom_Timer
120 * \defgroup IfxLld_Gtm_Tom_Timer_Timer_Functions Timer Functions
121 * \ingroup IfxLld_Gtm_Tom_Timer
122 * \defgroup IfxLld_Gtm_Tom_Timer_Timer_StdIf_Functions Timer StdIf Functions
123 * \ingroup IfxLld_Gtm_Tom_Timer
124 */
125
126 #ifndef IFXGTM_TOM_TIMER_H
127 #define IFXGTM_TOM_TIMER_H 1
128
129 /******************************************************************************/
130 /*----------------------------------Includes----------------------------------*/
131 /******************************************************************************/
132
133 #include "_PinMap/IfxGtm_PinMap.h"
134 #include "Gtm/Std/IfxGtm_Tom.h"
135 #include "Gtm/Std/IfxGtm_Cmu.h"
136 #include "StdIf/IfxStdIf_Timer.h"
137
138 /******************************************************************************/
139 /*-----------------------------Data Structures--------------------------------*/
140 /******************************************************************************/
141
142 /** \addtogroup IfxLld_Gtm_Tom_Timer_Data_Structures
143 * \{ */
144 /** \brief Structure for the timer base
145 */
146 typedef struct
147 {
148 Ifx_TimerValue period; /**< \brief Timer period in ticks (cached value) */
149 boolean triggerEnabled; /**< \brief If TRUE, the trigger functionality is Initialised */
150 float32 clockFreq; /**< \brief Timer input clock frequency (cached value) */
151 IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
152 } IfxGtm_Tom_Timer_Base;
153
154 /** \} */
155
156 /** \addtogroup IfxLld_Gtm_Tom_Timer_Data_Structures
157 * \{ */
158 /** \brief TOM Timer interface Handle
159 */
160 typedef struct
161 {
162 IfxGtm_Tom_Timer_Base base; /**< \brief Timer base structure */
163 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
164 Ifx_GTM_TOM *tom; /**< \brief Pointer to the TOM object */
165 Ifx_GTM_TOM_TGC *tgc[2]; /**< \brief Pointer to the TGC object */
166 IfxGtm_Tom tomIndex; /**< \brief Enum for TOM objects */
167 IfxGtm_Tom_Ch timerChannel; /**< \brief TOM channel used for the timer */
168 IfxGtm_Tom_Ch triggerChannel; /**< \brief TOM channel used for the trigger, can be identical to the timer channel */
169 uint16 channelsMask[2]; /**< \brief Mask for channels to be modified together, The 1st value corresponds to the Timer's TGC, the 2nd value corresponds to the timer's next TGC if any */
170 Ifx_TimerValue offset; /**< \brief Timer initial offset in ticks */
171 uint32 tgcGlobalControlDisableUpdate[2]; /**< \brief Cached value for TGC GLOB_CTR */
172 uint32 tgcGlobalControlApplyUpdate[2]; /**< \brief Cached value for TGC GLOB_CTR */
173 } IfxGtm_Tom_Timer;
174
175 /** \brief Configuration structure for TOM Timer
176 */
177 typedef struct
178 {
179 IfxStdIf_Timer_Config base; /**< \brief Standard interface timer configuration */
180 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
181 IfxGtm_Tom tom; /**< \brief Index of the TOM object used */
182 IfxGtm_Tom_Ch timerChannel; /**< \brief TOM channel used for the timer */
183 IfxGtm_Tom_ToutMap *triggerOut; /**< \brief TOM channel used for the trigger output, can be identical to the timer channel */
184 IfxGtm_Tom_Ch_ClkSrc clock; /**< \brief Timer input clock */
185 IfxGtm_IrqMode irqModeTimer; /**< \brief Interrupt mode for the timer */
186 IfxGtm_IrqMode irqModeTrigger; /**< \brief Interrupt mode for the trigger */
187 boolean initPins; /**< \brief TRUE : Initialize pins in driver.
188 * FALSE: Don't initialize pins : handled separately by user */
189 } IfxGtm_Tom_Timer_Config;
190
191 /** \} */
192
193 /** \addtogroup IfxLld_Gtm_Tom_Timer_Timer_Functions
194 * \{ */
195
196 /******************************************************************************/
197 /*-------------------------Global Function Prototypes-------------------------*/
198 /******************************************************************************/
199
200 /** \brief Returns the initial timer offset in ticks
201 * \param driver TOM Timer interface Handle
202 * \return Returns the initial timer offset in ticks
203 */
204 IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getOffset(IfxGtm_Tom_Timer *driver);
205
206 /** \brief Returns the pointer to timer channel
207 * \param driver TOM Timer interface Handle
208 * \return Pointer
209 */
210 IFX_EXTERN volatile uint32 *IfxGtm_Tom_Timer_getPointer(IfxGtm_Tom_Timer *driver);
211
212 /** \brief Returns the pointer to trigger channel
213 * \param driver TOM Timer interface Handle
214 * \return Pointer
215 */
216 IFX_EXTERN volatile uint32 *IfxGtm_Tom_Timer_getTriggerPointer(IfxGtm_Tom_Timer *driver);
217
218 /** \brief Initialises the timer object
219 * \param driver TOM Timer interface Handle
220 * \param config Configuration structure for TOM Timer
221 * \return TRUE on success else FALSE
222 */
223 IFX_EXTERN boolean IfxGtm_Tom_Timer_init(IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config);
224
225 /** \brief Initializes the configuration structure to default
226 * \param config This parameter is Initialised by the function
227 * \param gtm Pointer to GTM module
228 * \return None
229 */
230 IFX_EXTERN void IfxGtm_Tom_Timer_initConfig(IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm);
231
232 /** \} */
233
234 /** \addtogroup IfxLld_Gtm_Tom_Timer_Timer_StdIf_Functions
235 * \{ */
236
237 /******************************************************************************/
238 /*-------------------------Global Function Prototypes-------------------------*/
239 /******************************************************************************/
240
241 /** \brief Returns the timer event
242 * \see IfxStdIf_Timer_AckTimerIrq
243 * \param driver TOM Timer interface Handle
244 * \return Timer event
245 */
246 IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTimerIrq(IfxGtm_Tom_Timer *driver);
247
248 /** \brief Returns the trigger event
249 * \see IfxStdIf_Timer_AckTriggerIrq
250 * \param driver TOM Timer interface Handle
251 * \return Trigger event
252 */
253 IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTriggerIrq(IfxGtm_Tom_Timer *driver);
254
255 /** \brief Add a channel to the channel mask
256 * Channels present in the mask are started, stopped, updated at the same time as the timer:
257 * IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run
258 * \param driver TOM Timer interface Handle
259 * \param channel Channel to ba added to the mask
260 * \return None
261 */
262 IFX_EXTERN void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel);
263
264 /** \brief Enables the transfer of the shadow registers
265 * \see IfxStdIf_Timer_ApplyUpdate
266 * Specific implementation: Enable the transfer of the shadow registers
267 * \param driver TOM Timer interface Handle
268 * \return None
269 */
270 IFX_EXTERN void IfxGtm_Tom_Timer_applyUpdate(IfxGtm_Tom_Timer *driver);
271
272 /** \brief Disables the upadte
273 * \see IfxStdIf_Timer_DisableUpdate
274 * Specific implementation: Disable the transfer of the shadow registers
275 * \param driver TOM Timer interface Handle
276 * \return None
277 */
278 IFX_EXTERN void IfxGtm_Tom_Timer_disableUpdate(IfxGtm_Tom_Timer *driver);
279
280 /** \brief Returns the frequency
281 * \see IfxStdIf_Timer_GetFrequency
282 * \param driver TOM Timer interface Handle
283 * \return Frequency
284 */
285 IFX_EXTERN float32 IfxGtm_Tom_Timer_getFrequency(IfxGtm_Tom_Timer *driver);
286
287 /** \brief Returns the Input frequncy
288 * \param driver TOM Timer interface Handle
289 * \return Frequency
290 */
291 IFX_EXTERN float32 IfxGtm_Tom_Timer_getInputFrequency(IfxGtm_Tom_Timer *driver);
292
293 /** \brief Returns the period of the timer
294 * \see IfxStdIf_Timer_GetPeriod
295 * \param driver TOM Timer interface Handle
296 * \return Period
297 */
298 IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getPeriod(IfxGtm_Tom_Timer *driver);
299
300 /** \brief Returns the resolution
301 * \see IfxStdIf_Timer_GetResolution
302 * \param driver TOM Timer interface Handle
303 * \return Resolution
304 */
305 IFX_EXTERN float32 IfxGtm_Tom_Timer_getResolution(IfxGtm_Tom_Timer *driver);
306
307 /** \brief Returns the trigger point
308 * \param driver TOM Timer interface Handle
309 * \return Trigger point
310 */
311 IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getTrigger(IfxGtm_Tom_Timer *driver);
312
313 /** \brief Runs the timer
314 * \see IfxStdIf_Timer_Run
315 * \param driver TOM Timer interface Handle
316 * \return None
317 */
318 IFX_EXTERN void IfxGtm_Tom_Timer_run(IfxGtm_Tom_Timer *driver);
319
320 /** \brief Sets the frequency
321 * \see IfxStdIf_Timer_SetFrequency
322 * \param driver TOM Timer interface Handle
323 * \param frequency Frequency
324 * \return TRUE on success else FALSE
325 */
326 IFX_EXTERN boolean IfxGtm_Tom_Timer_setFrequency(IfxGtm_Tom_Timer *driver, float32 frequency);
327
328 /** \brief Sets the period for the timer
329 * \see IfxStdIf_Timer_SetPeriod
330 * \param driver TOM Timer interface Handle
331 * \param period Period value
332 * \return TRUE on success else FALSE
333 */
334 IFX_EXTERN boolean IfxGtm_Tom_Timer_setPeriod(IfxGtm_Tom_Timer *driver, Ifx_TimerValue period);
335
336 /** \brief Sets the single shot mode of the timer
337 * \see IfxStdIf_Timer_SetSingleMode
338 * \param driver TOM Timer interface Handle
339 * \param enabled If TRUE, sets the single shot mode
340 * \return None
341 */
342 IFX_EXTERN void IfxGtm_Tom_Timer_setSingleMode(IfxGtm_Tom_Timer *driver, boolean enabled);
343
344 /** \brief Sets the trigger
345 * \see IfxStdIf_Timer_SetTrigger
346 * \param driver TOM Timer interface Handle
347 * \param triggerPoint Trigger point value
348 * \return None
349 */
350 IFX_EXTERN void IfxGtm_Tom_Timer_setTrigger(IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint);
351
352 /** \brief Initializes the standard interface timer
353 * \param stdif Standard interface timer object, will be initialized by the function
354 * \param driver Interface driver to be used by the standard interface. must be initialised separately
355 * \return TRUE on success else FALSE
356 */
357 IFX_EXTERN boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver);
358
359 /** \brief Stops the timer
360 * \see IfxStdIf_Timer_Stop
361 * \param driver TOM Timer interface Handle
362 * \return None
363 */
364 IFX_EXTERN void IfxGtm_Tom_Timer_stop(IfxGtm_Tom_Timer *driver);
365
366 /** \brief Updates the input frequency
367 * \see IfxStdIf_Timer_UpdateInputFrequency
368 * \param driver TOM Timer interface Handle
369 * \return None
370 */
371 IFX_EXTERN void IfxGtm_Tom_Timer_updateInputFrequency(IfxGtm_Tom_Timer *driver);
372
373 /** \} */
374
375 #endif /* IFXGTM_TOM_TIMER_H */
IfxGtm_Tom_Timer_addToChannelMask
IFX_EXTERN void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run.
Definition: IfxGtm_Tom_Timer.c:90
IfxGtm_Tom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Tom_Timer.h:150
IfxGtm_Tom_Timer_setFrequency
IFX_EXTERN boolean IfxGtm_Tom_Timer_setFrequency(IfxGtm_Tom_Timer *driver, float32 frequency)
Sets the frequency.
Definition: IfxGtm_Tom_Timer.c:367
IfxGtm_Tom_Timer_Config::tom
IfxGtm_Tom tom
Index of the TOM object used.
Definition: IfxGtm_Tom_Timer.h:181
IfxGtm_Tom_Timer_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxGtm_Tom_Timer.h:151
IfxGtm_Tom_Timer::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tom_Timer.h:163
IfxGtm_Tom_Timer_Config::initPins
boolean initPins
TRUE : Initialize pins in driver. FALSE: Don&#39;t initialize pins : handled separately by user...
Definition: IfxGtm_Tom_Timer.h:187
IfxGtm_Tom_Timer_getPointer
IFX_EXTERN volatile uint32 * IfxGtm_Tom_Timer_getPointer(IfxGtm_Tom_Timer *driver)
Returns the pointer to timer channel.
Definition: IfxGtm_Tom_Timer.c:162
IfxGtm_Tom_Timer_getTriggerPointer
IFX_EXTERN volatile uint32 * IfxGtm_Tom_Timer_getTriggerPointer(IfxGtm_Tom_Timer *driver)
Returns the pointer to trigger channel.
Definition: IfxGtm_Tom_Timer.c:180
IfxGtm_Tom_Timer_disableUpdate
IFX_EXTERN void IfxGtm_Tom_Timer_disableUpdate(IfxGtm_Tom_Timer *driver)
Disables the upadte.
Definition: IfxGtm_Tom_Timer.c:127
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_Tom_Timer::offset
Ifx_TimerValue offset
Timer initial offset in ticks.
Definition: IfxGtm_Tom_Timer.h:170
IfxGtm_Tom_Timer_getFrequency
IFX_EXTERN float32 IfxGtm_Tom_Timer_getFrequency(IfxGtm_Tom_Timer *driver)
Returns the frequency.
Definition: IfxGtm_Tom_Timer.c:138
IfxGtm_Tom_Timer_setTrigger
IFX_EXTERN void IfxGtm_Tom_Timer_setTrigger(IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxGtm_Tom_Timer.c:395
IfxGtm_Tom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Tom_Timer.h:148
IfxGtm_Tom_Timer_getResolution
IFX_EXTERN float32 IfxGtm_Tom_Timer_getResolution(IfxGtm_Tom_Timer *driver)
Returns the resolution.
Definition: IfxGtm_Tom_Timer.c:168
IfxGtm_Tom_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxGtm_Tom_Timer.h:179
IfxGtm_Tom_Timer_acknowledgeTriggerIrq
IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTriggerIrq(IfxGtm_Tom_Timer *driver)
Returns the trigger event.
Definition: IfxGtm_Tom_Timer.c:73
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:272
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:283
IfxGtm_Tom_Timer_Config::irqModeTimer
IfxGtm_IrqMode irqModeTimer
Interrupt mode for the timer.
Definition: IfxGtm_Tom_Timer.h:185
IfxGtm_Tom_Timer_getInputFrequency
IFX_EXTERN float32 IfxGtm_Tom_Timer_getInputFrequency(IfxGtm_Tom_Timer *driver)
Returns the Input frequncy.
Definition: IfxGtm_Tom_Timer.c:144
IfxGtm_Tom_Timer_acknowledgeTimerIrq
IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTimerIrq(IfxGtm_Tom_Timer *driver)
Returns the timer event.
Definition: IfxGtm_Tom_Timer.c:56
IfxGtm_Tom_Timer_run
IFX_EXTERN void IfxGtm_Tom_Timer_run(IfxGtm_Tom_Timer *driver)
Runs the timer.
Definition: IfxGtm_Tom_Timer.c:356
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:199
IfxGtm_Tom_Timer_Config
Configuration structure for TOM Timer.
Definition: IfxGtm_Tom_Timer.h:177
IfxGtm_Tom_Timer_stdIfTimerInit
IFX_EXTERN boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Tom_Timer.c:401
IfxGtm_Tom_Timer::tom
Ifx_GTM_TOM * tom
Pointer to the TOM object.
Definition: IfxGtm_Tom_Timer.h:164
IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:116
IfxGtm_Tom_Timer_getTrigger
IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getTrigger(IfxGtm_Tom_Timer *driver)
Returns the trigger point.
Definition: IfxGtm_Tom_Timer.c:174
IfxGtm_Tom_Timer_applyUpdate
IFX_EXTERN void IfxGtm_Tom_Timer_applyUpdate(IfxGtm_Tom_Timer *driver)
Enables the transfer of the shadow registers.
Definition: IfxGtm_Tom_Timer.c:116
IfxStdIf_Timer.h
Standard interface: Timer.
IfxGtm_Tom_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxGtm_Tom_Timer.h:149
IfxStdIf_Timer_CountDir
IfxStdIf_Timer_CountDir
Timer increment direction.
Definition: IfxStdIf_Timer.h:85
IfxGtm_Tom_Timer
TOM Timer interface Handle.
Definition: IfxGtm_Tom_Timer.h:160
IfxGtm_Tom_Timer_setSingleMode
IFX_EXTERN void IfxGtm_Tom_Timer_setSingleMode(IfxGtm_Tom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxGtm_Tom_Timer.c:389
IfxGtm_Tom_Timer_updateInputFrequency
IFX_EXTERN void IfxGtm_Tom_Timer_updateInputFrequency(IfxGtm_Tom_Timer *driver)
Updates the input frequency.
Definition: IfxGtm_Tom_Timer.c:442
IfxGtm_Tom_Timer_setPeriod
IFX_EXTERN boolean IfxGtm_Tom_Timer_setPeriod(IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxGtm_Tom_Timer.c:375
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxGtm_Tom_Timer_Config::clock
IfxGtm_Tom_Ch_ClkSrc clock
Timer input clock.
Definition: IfxGtm_Tom_Timer.h:184
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:275
IfxGtm_Tom_Timer_initConfig
IFX_EXTERN void IfxGtm_Tom_Timer_initConfig(IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tom_Timer.c:341
IfxGtm_Tom_Timer_stop
IFX_EXTERN void IfxGtm_Tom_Timer_stop(IfxGtm_Tom_Timer *driver)
Stops the timer.
Definition: IfxGtm_Tom_Timer.c:431
IfxGtm_Tom_Timer_Config::triggerOut
IfxGtm_Tom_ToutMap * triggerOut
TOM channel used for the trigger output, can be identical to the timer channel.
Definition: IfxGtm_Tom_Timer.h:183
IfxGtm_Tom_Timer::base
IfxGtm_Tom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Tom_Timer.h:162
IfxGtm_Tom_Timer::tomIndex
IfxGtm_Tom tomIndex
Enum for TOM objects.
Definition: IfxGtm_Tom_Timer.h:166
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:64
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Tom_Timer_Base
Structure for the timer base.
Definition: IfxGtm_Tom_Timer.h:146
IfxGtm_Tom_Timer_getPeriod
IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getPeriod(IfxGtm_Tom_Timer *driver)
Returns the period of the timer.
Definition: IfxGtm_Tom_Timer.c:156
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxGtm_Tom_Timer::timerChannel
IfxGtm_Tom_Ch timerChannel
TOM channel used for the timer.
Definition: IfxGtm_Tom_Timer.h:167
IfxGtm_Tom_Timer_Config::irqModeTrigger
IfxGtm_IrqMode irqModeTrigger
Interrupt mode for the trigger.
Definition: IfxGtm_Tom_Timer.h:186
IfxGtm_Tom_Timer_init
IFX_EXTERN boolean IfxGtm_Tom_Timer_init(IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
Initialises the timer object.
Definition: IfxGtm_Tom_Timer.c:186
IfxGtm_Tom_Ch_ClkSrc
IfxGtm_Tom_Ch_ClkSrc
Clock source for the TOM channels.
Definition: IfxGtm_Tom.h:81
IfxGtm_Tom.h
GTM basic functionality.
IfxGtm_Tom_Timer_getOffset
IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getOffset(IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks.
Definition: IfxGtm_Tom_Timer.c:150
IfxGtm_Tom_Timer::triggerChannel
IfxGtm_Tom_Ch triggerChannel
TOM channel used for the trigger, can be identical to the timer channel.
Definition: IfxGtm_Tom_Timer.h:168


iLLD_TC26B: IfxGtm_Trig.c Source File

  • Gtm
  • Trig
IfxGtm_Trig.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Trig.c
3 * \brief GTM TRIG details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_Trig.h"
47 #include "_Utilities/Ifx_Assert.h"
48 #include "Cpu/Std/IfxCpu_Intrinsics.h"
49
50 /******************************************************************************/
51 /*-----------------------------Data Structures--------------------------------*/
52 /******************************************************************************/
53
54 /** \addtogroup IfxLld_Gtm_Trig_Data_Structures
55 * \{ */
56 typedef struct
57 {
58 sint8 config; /**< \brief Value for SEL0/1. config=0xFF means "not available" */
59 } IfxGtm_Trig_Channel;
60
61 /** \} */
62
63 /** \addtogroup IfxLld_Gtm_Trig_Data_Structures
64 * \{ */
65 typedef struct
66 {
67 IfxGtm_Trig_Channel channel[IfxGtm_Trig_AdcTrigChannel_count];
68 } IfxGtm_Trig_Source;
69
70 /** \} */
71
72 /** \addtogroup IfxLld_Gtm_Trig_Data_Structures
73 * \{ */
74 typedef struct
75 {
76 IfxGtm_Trig_Source source[IfxGtm_Trig_AdcTrigSource_count];
77 } IfxGtm_Trig_Trigger;
78
79 /** \} */
80
81 /** \addtogroup IfxLld_Gtm_Trig_Data_Structures
82 * \{ */
83 typedef struct
84 {
85 IfxGtm_Trig_Trigger trigger[IfxGtm_Trig_AdcTrig_count];
86 } IfxGtm_Trig_AdcTrig_Table;
87
88 /** \} */
89
90 /******************************************************************************/
91 /*------------------------Private Variables/Constants-------------------------*/
92 /******************************************************************************/
93
94 IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc0_1_2 = {
95 .trigger = {
96 {.source = { //IfxGtm_AdcTrig_0
97 //{.channel = { {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
98 {.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
99 {.channel = { {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
100 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
101 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
102
103 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
104 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
105 }},
106 {.source = { //IfxGtm_AdcTrig_1
107 //{.channel = { {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
108 {.channel = { {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
109 {.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
110 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
111 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
112
113 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x09}, {.config = 0x0A}}}, //IfxGtm_AdcTrigSource_tom0
114 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
115 }}
116 }
117 };
118
119 IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc3_4 = {
120 .trigger = {
121 {.source = { //IfxGtm_AdcTrig_0
122 // IfxGtm_AdcTrig
123 //{.channel = { {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
124 {.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
125 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
126 {.channel = { {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
127 {.channel = { {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
128
129 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
130 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x09}, {.config = 0x0A}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
131 }},
132 {.source = { //IfxGtm_AdcTrig_1
133 //{.channel = { {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
134 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
135 {.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
136 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
137 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
138
139 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
140 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
141 }}
142 }
143 };
144
145 /** \brief Trigger table for SENT triggers
146 */
147 IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_SentTrig_table = {
148 .trigger = {
149 {.source = { //IfxGtm_AdcTrig_0
150 //{.channel = {{Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
151 {.channel = { {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
152 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
153 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
154 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
155 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x00}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
156 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
157 }},
158 {.source = { //IfxGtm_AdcTrig_1
159 //{.channel = {{Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
160 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
161 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
162 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
163 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
164 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
165 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
166 }}
167 }
168 };
169
170 /******************************************************************************/
171 /*-------------------------Function Implementations---------------------------*/
172 /******************************************************************************/
173
174 boolean IfxGtm_Trig_fromDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
175 {
176 boolean result = dsadcChannel <= 5;
177
178 if (result != FALSE)
179 {
180 uint32 mask = 0xFU << (timChannel * 4);
181 __ldmst_c(&(gtm->INOUTSEL.DSADC.INSEL[tim].U), mask, dsadcChannel << (timChannel * 4));
182 }
183
184 return result;
185 }
186
187
188 void IfxGtm_Trig_toDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Trig_DsadcTrig dsadcTrig, IfxGtm_Trig_DsadcTrigSource sel)
189 {
190 uint32 shift = dsadcChannel * 4;
191 uint32 mask = 0xFU << shift;
192 uint32 value = sel << shift;
193
194 switch (dsadcTrig)
195 {
196 case IfxGtm_Trig_DsadcTrig_0:
197 __ldmst_c(&(gtm->INOUTSEL.DSADC.OUTSEL00.U), mask, value);
198 break;
199 case IfxGtm_Trig_DsadcTrig_1:
200 __ldmst_c(&(gtm->INOUTSEL.DSADC.OUTSEL10.U), mask, value);
201 break;
202 }
203 }
204
205
206 boolean IfxGtm_Trig_toVadc(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
207 {
208 IFX_CONST IfxGtm_Trig_AdcTrig_Table *table = NULL_PTR;
209 uint8 config;
210
211 boolean result = 0;
212
213 switch (adcGroup)
214 {
215 case IfxGtm_Trig_AdcGroup_0:
216 case IfxGtm_Trig_AdcGroup_1:
217 case IfxGtm_Trig_AdcGroup_2:
218 table = &IfxGtm_Trig_AdcTrig_tableAdc0_1_2;
219 break;
220 case IfxGtm_Trig_AdcGroup_3:
221 case IfxGtm_Trig_AdcGroup_4:
222 table = &IfxGtm_Trig_AdcTrig_tableAdc3_4;
223 break;
224 default:
225 break;
226 }
227
228 if (table != NULL_PTR)
229 {
230 config = table->trigger[adcTrig].source[source].channel[channel].config;
231 result = config != 0xFF;
232 uint32 shift = adcGroup * 4;
233 uint32 mask = 0xFU << shift;
234 uint32 value = config << shift;
235
236 switch (adcTrig)
237 {
238 case IfxGtm_Trig_AdcTrig_0:
239 __ldmst_c(&(gtm->ADCTRIG0OUT0.U), mask, value);
240 break;
241 case IfxGtm_Trig_AdcTrig_1:
242 __ldmst_c(&(gtm->ADCTRIG1OUT0.U), mask, value);
243 break;
244 default:
245 result = FALSE;
246 break;
247 }
248 }
249
250 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result);
251
252 return result;
253 }
254
255
256 boolean IfxGtm_Trig_toSent(Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)
257 {
258 IFX_CONST IfxGtm_Trig_AdcTrig_Table *table = NULL_PTR;
259 uint8 config;
260 uint32 shift, mask, value;
261 boolean result = 0;
262
263 switch (sentGroup)
264 {
265 case IfxGtm_Trig_SentGroup_0:
266 case IfxGtm_Trig_SentGroup_1:
267 case IfxGtm_Trig_SentGroup_2:
268 table = &IfxGtm_Trig_AdcTrig_tableAdc0_1_2;
269 break;
270 case IfxGtm_Trig_SentGroup_3:
271 case IfxGtm_Trig_SentGroup_4:
272 table = &IfxGtm_Trig_AdcTrig_tableAdc3_4;
273 break;
274 case IfxGtm_Trig_SentGroup_5:
275 table = &IfxGtm_Trig_SentTrig_table;
276 break;
277 default:
278 break;
279 }
280
281 if (table != NULL_PTR)
282 {
283 config = table->trigger[sentTrig].source[source].channel[channel].config;
284 result = config != 0xFF;
285
286 if ((sentGroup / 6) == 0) // write to VADC registers
287 {
288 shift = (sentGroup % 5) * 4;
289 }
290 else // write to DSADC registers
291 {
292 shift = (sentGroup % 6) * 4;
293 }
294
295 mask = 0xFU << shift;
296 value = config << shift;
297
298 if ((sentGroup / 6) == 0) // write to VADC registers
299 {
300 __ldmst_c(&(gtm->ADCTRIG0OUT0.U), mask, value);
301 }
302 else // write to DSADC registers
303 {
304 __ldmst_c(&(gtm->INOUTSEL.DSADC.OUTSEL00.U), mask, value);
305 }
306 }
307
308 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result);
309
310 return result;
311 }
IfxGtm_Trig_SentTrig
IfxGtm_Trig_SentTrig
Enum for SENT trigger.
Definition: IfxGtm_Trig.h:151
IfxGtm_Trig_Source::channel
IfxGtm_Trig_Channel channel[IfxGtm_Trig_AdcTrigChannel_count]
Definition: IfxGtm_Trig.c:67
IfxGtm_Trig_AdcTrigChannel_count
count of the enum definition
Definition: IfxGtm_Trig.h:99
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxGtm_Trig_AdcTrig_count
count of the enum definition
Definition: IfxGtm_Trig.h:85
IfxGtm_Trig_AdcTrig_0
Definition: IfxGtm_Trig.h:83
IfxGtm_Trig_DsadcTrig_0
Definition: IfxGtm_Trig.h:119
IfxGtm_Trig_toDsadc
void IfxGtm_Trig_toDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Trig_DsadcTrig dsadcTrig, IfxGtm_Trig_DsadcTrigSource sel)
Definition: IfxGtm_Trig.c:188
IfxGtm_Trig_AdcTrig_1
Definition: IfxGtm_Trig.h:84
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Trig_Source
Definition: IfxGtm_Trig.c:65
IfxGtm_Trig_toSent
boolean IfxGtm_Trig_toSent(Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)
Definition: IfxGtm_Trig.c:256
IfxGtm_Trig_fromDsadc
boolean IfxGtm_Trig_fromDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
Definition: IfxGtm_Trig.c:174
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:108
Ifx_Assert.h
Assert functions.
IfxGtm_Trig_SentTrigSource
IfxGtm_Trig_SentTrigSource
Enum for SENT trigger source.
Definition: IfxGtm_Trig.h:172
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:252
IfxGtm_Trig_AdcTrig
IfxGtm_Trig_AdcTrig
Enum for ADC trigger.
Definition: IfxGtm_Trig.h:81
IfxCpu_Intrinsics.h
IfxGtm_Trig_AdcTrigSource_count
count of the enum definition
Definition: IfxGtm_Trig.h:112
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxGtm_Trig_SentTrigChannel
IfxGtm_Trig_SentTrigChannel
Enum for SENT trigger channel.
Definition: IfxGtm_Trig.h:158
FALSE
#define FALSE
Definition: Platform_Types.h:93
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxGtm_Trig_AdcGroup_1
For ADC group 1.
Definition: IfxGtm_Trig.h:73
IfxGtm_Trig_AdcTrigSource
IfxGtm_Trig_AdcTrigSource
Enum for ADC trigger source.
Definition: IfxGtm_Trig.h:104
IfxGtm_Trig_AdcTrig_Table
Definition: IfxGtm_Trig.c:83
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxGtm_Trig_AdcTrig_tableAdc3_4
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc3_4
Definition: IfxGtm_Trig.c:119
IfxGtm_Trig_Trigger
Definition: IfxGtm_Trig.c:74
IfxGtm_Trig_SentTrig_table
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_SentTrig_table
Trigger table for SENT triggers.
Definition: IfxGtm_Trig.c:147
IfxGtm_Trig_DsadcTrig_1
Definition: IfxGtm_Trig.h:120
IfxGtm_Trig_AdcGroup
IfxGtm_Trig_AdcGroup
Enum for ADC group.
Definition: IfxGtm_Trig.h:70
IfxGtm_Trig_SentGroup_2
For SENT group 2.
Definition: IfxGtm_Trig.h:143
IfxGtm_Trig_SentGroup_0
For SENT group 0.
Definition: IfxGtm_Trig.h:141
IfxGtm_Trig_SentGroup
IfxGtm_Trig_SentGroup
Enum for SENT group.
Definition: IfxGtm_Trig.h:139
IfxGtm_Trig_Channel
Definition: IfxGtm_Trig.c:56
IfxGtm_Trig_SentGroup_1
For SENT group 1.
Definition: IfxGtm_Trig.h:142
IfxGtm_Trig_AdcGroup_2
For ADC group 2.
Definition: IfxGtm_Trig.h:74
IfxGtm_Trig_AdcGroup_0
For ADC group 0.
Definition: IfxGtm_Trig.h:72
IfxGtm_Trig_AdcGroup_4
For ADC group 4.
Definition: IfxGtm_Trig.h:76
IfxGtm_Trig_SentGroup_3
For SENT group 3.
Definition: IfxGtm_Trig.h:144
IfxGtm_Trig_Channel::config
sint8 config
Value for SEL0/1. config=0xFF means "not available".
Definition: IfxGtm_Trig.c:58
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxGtm_Trig_DsadcTrig
IfxGtm_Trig_DsadcTrig
Enum for DSADC trigger.
Definition: IfxGtm_Trig.h:117
IfxGtm_Trig_AdcGroup_3
For ADC group 3.
Definition: IfxGtm_Trig.h:75
IfxGtm_Trig_SentGroup_5
For SENT group 5.
Definition: IfxGtm_Trig.h:146
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:261
IfxGtm_Trig_toVadc
boolean IfxGtm_Trig_toVadc(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
Definition: IfxGtm_Trig.c:206
IfxGtm_Trig_AdcTrigChannel
IfxGtm_Trig_AdcTrigChannel
Enum for ADC trigger channel.
Definition: IfxGtm_Trig.h:90
IfxGtm_Trig.h
GTM TRIG details.
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxGtm_Trig_SentGroup_4
For SENT group 4.
Definition: IfxGtm_Trig.h:145
sint8
signed char sint8
Definition: Platform_Types.h:125
IfxGtm_Trig_AdcTrig_tableAdc0_1_2
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc0_1_2
Definition: IfxGtm_Trig.c:94
IfxGtm_Trig_Trigger::source
IfxGtm_Trig_Source source[IfxGtm_Trig_AdcTrigSource_count]
Definition: IfxGtm_Trig.c:76
IfxGtm_Trig_DsadcTrigSource
IfxGtm_Trig_DsadcTrigSource
Enum for DSADC trigger source.
Definition: IfxGtm_Trig.h:125
IfxGtm_Trig_AdcTrig_Table::trigger
IfxGtm_Trig_Trigger trigger[IfxGtm_Trig_AdcTrig_count]
Definition: IfxGtm_Trig.c:85


iLLD_TC26B: IfxGtm_Trig.h Source File

  • Gtm
  • Trig
IfxGtm_Trig.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Trig.h
3 * \brief GTM TRIG details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm_Trig GTM Trigger Configuration
42 * \ingroup IfxLld_Gtm
43 * \defgroup IfxLld_Gtm_Trig_Enumerations Enumerations
44 * \ingroup IfxLld_Gtm_Trig
45 * \defgroup IfxLld_Gtm_Trig_Data_Structures Data Structures
46 * \ingroup IfxLld_Gtm_Trig
47 * \defgroup IfxLld_Gtm_Trig_Trigger_Functions Trigger Functions
48 * \ingroup IfxLld_Gtm_Trig
49 */
50
51 #ifndef IFXGTM_TRIG_H
52 #define IFXGTM_TRIG_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 #include "Cpu/Std/Ifx_Types.h"
59 #include "_Impl/IfxGtm_cfg.h"
60 #include "Gtm/Std/IfxGtm_Tim.h"
61
62 /******************************************************************************/
63 /*--------------------------------Enumerations--------------------------------*/
64 /******************************************************************************/
65
66 /** \addtogroup IfxLld_Gtm_Trig_Enumerations
67 * \{ */
68 /** \brief Enum for ADC group
69 */
70 typedef enum
71 {
72 IfxGtm_Trig_AdcGroup_0, /**< \brief For ADC group 0 */
73 IfxGtm_Trig_AdcGroup_1, /**< \brief For ADC group 1 */
74 IfxGtm_Trig_AdcGroup_2, /**< \brief For ADC group 2 */
75 IfxGtm_Trig_AdcGroup_3, /**< \brief For ADC group 3 */
76 IfxGtm_Trig_AdcGroup_4 /**< \brief For ADC group 4 */
77 } IfxGtm_Trig_AdcGroup;
78
79 /** \brief Enum for ADC trigger
80 */
81 typedef enum
82 {
83 IfxGtm_Trig_AdcTrig_0,
84 IfxGtm_Trig_AdcTrig_1,
85 IfxGtm_Trig_AdcTrig_count /**< \brief count of the enum definition */
86 } IfxGtm_Trig_AdcTrig;
87
88 /** \brief Enum for ADC trigger channel
89 */
90 typedef enum
91 {
92 IfxGtm_Trig_AdcTrigChannel_4,
93 IfxGtm_Trig_AdcTrigChannel_5,
94 IfxGtm_Trig_AdcTrigChannel_6,
95 IfxGtm_Trig_AdcTrigChannel_7,
96 IfxGtm_Trig_AdcTrigChannel_13,
97 IfxGtm_Trig_AdcTrigChannel_14,
98 IfxGtm_Trig_AdcTrigChannel_15,
99 IfxGtm_Trig_AdcTrigChannel_count /**< \brief count of the enum definition */
100 } IfxGtm_Trig_AdcTrigChannel;
101
102 /** \brief Enum for ADC trigger source
103 */
104 typedef enum
105 {
106 IfxGtm_Trig_AdcTrigSource_atom0,
107 IfxGtm_Trig_AdcTrigSource_atom1,
108 IfxGtm_Trig_AdcTrigSource_atom2,
109 IfxGtm_Trig_AdcTrigSource_atom3,
110 IfxGtm_Trig_AdcTrigSource_tom0,
111 IfxGtm_Trig_AdcTrigSource_tom1,
112 IfxGtm_Trig_AdcTrigSource_count /**< \brief count of the enum definition */
113 } IfxGtm_Trig_AdcTrigSource;
114
115 /** \brief Enum for DSADC trigger
116 */
117 typedef enum
118 {
119 IfxGtm_Trig_DsadcTrig_0,
120 IfxGtm_Trig_DsadcTrig_1
121 } IfxGtm_Trig_DsadcTrig;
122
123 /** \brief Enum for DSADC trigger source
124 */
125 typedef enum
126 {
127 IfxGtm_Trig_DsadcTrigSource_tomX_6,
128 IfxGtm_Trig_DsadcTrigSource_tomX_7,
129 IfxGtm_Trig_DsadcTrigSource_tomX_13,
130 IfxGtm_Trig_DsadcTrigSource_tomX_14,
131 IfxGtm_Trig_DsadcTrigSource_atomX_4,
132 IfxGtm_Trig_DsadcTrigSource_atomX_5,
133 IfxGtm_Trig_DsadcTrigSource_atomX_6,
134 IfxGtm_Trig_DsadcTrigSource_atomX_7
135 } IfxGtm_Trig_DsadcTrigSource;
136
137 /** \brief Enum for SENT group
138 */
139 typedef enum
140 {
141 IfxGtm_Trig_SentGroup_0, /**< \brief For SENT group 0 */
142 IfxGtm_Trig_SentGroup_1, /**< \brief For SENT group 1 */
143 IfxGtm_Trig_SentGroup_2, /**< \brief For SENT group 2 */
144 IfxGtm_Trig_SentGroup_3, /**< \brief For SENT group 3 */
145 IfxGtm_Trig_SentGroup_4, /**< \brief For SENT group 4 */
146 IfxGtm_Trig_SentGroup_5 /**< \brief For SENT group 5 */
147 } IfxGtm_Trig_SentGroup;
148
149 /** \brief Enum for SENT trigger
150 */
151 typedef enum
152 {
153 IfxGtm_Trig_SentTrig_0 /**< \brief sent trigger 0 */
154 } IfxGtm_Trig_SentTrig;
155
156 /** \brief Enum for SENT trigger channel
157 */
158 typedef enum
159 {
160 IfxGtm_Trig_SentTrigChannel_4,
161 IfxGtm_Trig_SentTrigChannel_5,
162 IfxGtm_Trig_SentTrigChannel_6,
163 IfxGtm_Trig_SentTrigChannel_7,
164 IfxGtm_Trig_SentTrigChannel_13,
165 IfxGtm_Trig_SentTrigChannel_14,
166 IfxGtm_Trig_SentTrigChannel_15,
167 IfxGtm_Trig_SentTrigChannel_count /**< \brief count of the enum definition */
168 } IfxGtm_Trig_SentTrigChannel;
169
170 /** \brief Enum for SENT trigger source
171 */
172 typedef enum
173 {
174 IfxGtm_Trig_SentTrigSource_atom0,
175 IfxGtm_Trig_SentTrigSource_atom1,
176 IfxGtm_Trig_SentTrigSource_atom2,
177 IfxGtm_Trig_SentTrigSource_atom3,
178 IfxGtm_Trig_SentTrigSource_tom0,
179 IfxGtm_Trig_SentTrigSource_tom1,
180 IfxGtm_Trig_SentTrigSource_count /**< \brief count of the enum definition */
181 } IfxGtm_Trig_SentTrigSource;
182
183 /** \} */
184
185 /** \addtogroup IfxLld_Gtm_Trig_Trigger_Functions
186 * \{ */
187
188 /******************************************************************************/
189 /*-------------------------Global Function Prototypes-------------------------*/
190 /******************************************************************************/
191
192 /**
193 * \param gtm Pointer to GTM module
194 * \param dsadcChannel DSADC channel
195 * \param tim TIM object
196 * \param timChannel TIM channel
197 * \return TRUE on success else FALSE
198 */
199 IFX_EXTERN boolean IfxGtm_Trig_fromDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel);
200
201 /**
202 * \param gtm Pointer to GTM module
203 * \param dsadcChannel DSADC channel
204 * \param dsadcTrig DSADC trigger
205 * \param sel DSADC trigger source
206 * \return None
207 */
208 IFX_EXTERN void IfxGtm_Trig_toDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Trig_DsadcTrig dsadcTrig, IfxGtm_Trig_DsadcTrigSource sel);
209
210 /**
211 * \param gtm Pointer to GTM module
212 * \param adcGroup ADC group
213 * \param adcTrig ADC trigger
214 * \param source ADC trigger source
215 * \param channel ADC trigger channel
216 * \return TRUE on success else FALSE
217 */
218 IFX_EXTERN boolean IfxGtm_Trig_toVadc(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel);
219
220 /**
221 * \param gtm Pointer to GTM module
222 * \param sentGroup SENT group
223 * \param sentTrig SENT trigger
224 * \param source SENT trigger source
225 * \param channel SENT trigger channel
226 * \return TRUE on success else FALSE
227 */
228 IFX_EXTERN boolean IfxGtm_Trig_toSent(Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel);
229
230 /** \} */
231
232 #endif /* IFXGTM_TRIG_H */
IfxGtm_Trig_AdcTrigSource_tom1
Definition: IfxGtm_Trig.h:111
IfxGtm_Trig_SentTrig
IfxGtm_Trig_SentTrig
Enum for SENT trigger.
Definition: IfxGtm_Trig.h:151
IfxGtm_Trig_SentTrigSource_atom3
Definition: IfxGtm_Trig.h:177
IfxGtm_Trig_AdcTrigChannel_count
count of the enum definition
Definition: IfxGtm_Trig.h:99
IfxGtm_Trig_AdcTrigSource_atom2
Definition: IfxGtm_Trig.h:108
IfxGtm_Trig_SentTrigSource_tom1
Definition: IfxGtm_Trig.h:179
IfxGtm_Trig_AdcTrig_count
count of the enum definition
Definition: IfxGtm_Trig.h:85
IfxGtm_Trig_AdcTrig_0
Definition: IfxGtm_Trig.h:83
IfxGtm_Trig_DsadcTrigSource_atomX_5
Definition: IfxGtm_Trig.h:132
IfxGtm_Trig_SentTrigSource_tom0
Definition: IfxGtm_Trig.h:178
IfxGtm_Trig_AdcTrigChannel_15
Definition: IfxGtm_Trig.h:98
IfxGtm_Trig_SentTrigSource_count
count of the enum definition
Definition: IfxGtm_Trig.h:180
IfxGtm_Trig_DsadcTrig_0
Definition: IfxGtm_Trig.h:119
IfxGtm_Trig_SentTrigChannel_6
Definition: IfxGtm_Trig.h:162
IfxGtm_Trig_DsadcTrigSource_tomX_13
Definition: IfxGtm_Trig.h:129
IfxGtm_Trig_toDsadc
IFX_EXTERN void IfxGtm_Trig_toDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Trig_DsadcTrig dsadcTrig, IfxGtm_Trig_DsadcTrigSource sel)
Definition: IfxGtm_Trig.c:188
IfxGtm_Trig_AdcTrig_1
Definition: IfxGtm_Trig.h:84
IfxGtm_Trig_SentTrigSource_atom1
Definition: IfxGtm_Trig.h:175
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxGtm_Trig_toSent
IFX_EXTERN boolean IfxGtm_Trig_toSent(Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)
Definition: IfxGtm_Trig.c:256
IfxGtm_Trig_fromDsadc
IFX_EXTERN boolean IfxGtm_Trig_fromDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
Definition: IfxGtm_Trig.c:174
IfxGtm_Trig_SentTrigChannel_15
Definition: IfxGtm_Trig.h:166
IfxGtm_Trig_AdcTrigChannel_13
Definition: IfxGtm_Trig.h:96
IfxGtm_Trig_SentTrigSource
IfxGtm_Trig_SentTrigSource
Enum for SENT trigger source.
Definition: IfxGtm_Trig.h:172
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:252
IfxGtm_Trig_AdcTrigChannel_4
Definition: IfxGtm_Trig.h:92
IfxGtm_Trig_AdcTrig
IfxGtm_Trig_AdcTrig
Enum for ADC trigger.
Definition: IfxGtm_Trig.h:81
IfxGtm_Trig_SentTrigChannel_7
Definition: IfxGtm_Trig.h:163
IfxGtm_Trig_AdcTrigSource_count
count of the enum definition
Definition: IfxGtm_Trig.h:112
IfxGtm_Trig_DsadcTrigSource_tomX_7
Definition: IfxGtm_Trig.h:128
IfxGtm_Trig_SentTrigChannel
IfxGtm_Trig_SentTrigChannel
Enum for SENT trigger channel.
Definition: IfxGtm_Trig.h:158
IfxGtm_Trig_AdcTrigSource_atom1
Definition: IfxGtm_Trig.h:107
IfxGtm_Trig_AdcGroup_1
For ADC group 1.
Definition: IfxGtm_Trig.h:73
IfxGtm_Tim.h
GTM basic functionality.
IfxGtm_Trig_AdcTrigSource
IfxGtm_Trig_AdcTrigSource
Enum for ADC trigger source.
Definition: IfxGtm_Trig.h:104
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxGtm_Trig_AdcTrigSource_atom0
Definition: IfxGtm_Trig.h:106
IfxGtm_Trig_DsadcTrigSource_tomX_14
Definition: IfxGtm_Trig.h:130
IfxGtm_Trig_DsadcTrigSource_atomX_6
Definition: IfxGtm_Trig.h:133
IfxGtm_Trig_SentTrigSource_atom2
Definition: IfxGtm_Trig.h:176
IfxGtm_Trig_DsadcTrig_1
Definition: IfxGtm_Trig.h:120
IfxGtm_Trig_AdcTrigChannel_6
Definition: IfxGtm_Trig.h:94
IfxGtm_Trig_AdcGroup
IfxGtm_Trig_AdcGroup
Enum for ADC group.
Definition: IfxGtm_Trig.h:70
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxGtm_Trig_AdcTrigSource_atom3
Definition: IfxGtm_Trig.h:109
IfxGtm_Trig_SentGroup_2
For SENT group 2.
Definition: IfxGtm_Trig.h:143
IfxGtm_Trig_SentGroup_0
For SENT group 0.
Definition: IfxGtm_Trig.h:141
IfxGtm_Trig_SentGroup
IfxGtm_Trig_SentGroup
Enum for SENT group.
Definition: IfxGtm_Trig.h:139
IfxGtm_Trig_DsadcTrigSource_atomX_4
Definition: IfxGtm_Trig.h:131
IfxGtm_Trig_SentTrigChannel_14
Definition: IfxGtm_Trig.h:165
IfxGtm_Trig_SentTrigSource_atom0
Definition: IfxGtm_Trig.h:174
IfxGtm_Trig_SentGroup_1
For SENT group 1.
Definition: IfxGtm_Trig.h:142
IfxGtm_Trig_SentTrigChannel_5
Definition: IfxGtm_Trig.h:161
IfxGtm_Trig_DsadcTrigSource_tomX_6
Definition: IfxGtm_Trig.h:127
IfxGtm_Trig_AdcGroup_2
For ADC group 2.
Definition: IfxGtm_Trig.h:74
IfxGtm_Trig_AdcGroup_0
For ADC group 0.
Definition: IfxGtm_Trig.h:72
IfxGtm_Trig_AdcGroup_4
For ADC group 4.
Definition: IfxGtm_Trig.h:76
IfxGtm_Trig_SentGroup_3
For SENT group 3.
Definition: IfxGtm_Trig.h:144
IfxGtm_Trig_AdcTrigSource_tom0
Definition: IfxGtm_Trig.h:110
IfxGtm_Trig_SentTrig_0
sent trigger 0
Definition: IfxGtm_Trig.h:153
IfxGtm_Trig_DsadcTrigSource_atomX_7
Definition: IfxGtm_Trig.h:134
IfxGtm_Trig_DsadcTrig
IfxGtm_Trig_DsadcTrig
Enum for DSADC trigger.
Definition: IfxGtm_Trig.h:117
IfxGtm_Trig_AdcGroup_3
For ADC group 3.
Definition: IfxGtm_Trig.h:75
IfxGtm_Trig_SentTrigChannel_13
Definition: IfxGtm_Trig.h:164
IfxGtm_Trig_AdcTrigChannel_5
Definition: IfxGtm_Trig.h:93
IfxGtm_Trig_SentGroup_5
For SENT group 5.
Definition: IfxGtm_Trig.h:146
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:261
IfxGtm_Trig_AdcTrigChannel_7
Definition: IfxGtm_Trig.h:95
IfxGtm_Trig_AdcTrigChannel_14
Definition: IfxGtm_Trig.h:97
IfxGtm_Trig_toVadc
IFX_EXTERN boolean IfxGtm_Trig_toVadc(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
Definition: IfxGtm_Trig.c:206
IfxGtm_Trig_AdcTrigChannel
IfxGtm_Trig_AdcTrigChannel
Enum for ADC trigger channel.
Definition: IfxGtm_Trig.h:90
IfxGtm_Trig_SentGroup_4
For SENT group 4.
Definition: IfxGtm_Trig.h:145
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Trig_SentTrigChannel_count
count of the enum definition
Definition: IfxGtm_Trig.h:167
IfxGtm_Trig_SentTrigChannel_4
Definition: IfxGtm_Trig.h:160
IfxGtm_Trig_DsadcTrigSource
IfxGtm_Trig_DsadcTrigSource
Enum for DSADC trigger source.
Definition: IfxGtm_Trig.h:125


iLLD_TC26B: IfxGtm_cfg.c Source File

  • _Impl
IfxGtm_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_cfg.c
3 * \brief GTM on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxGtm_cfg.h"
IfxGtm_cfg.h
GTM on-chip implementation data.


iLLD_TC26B: IfxGtm_cfg.h Source File

  • _Impl
IfxGtm_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_cfg.h
3 * \brief GTM on-chip implementation data
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Gtm GTM
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Gtm_Impl Implementation
44 * \ingroup IfxLld_Gtm
45 * \defgroup IfxLld_Gtm_Std Standard Driver
46 * \ingroup IfxLld_Gtm
47 * \defgroup IfxLld_Gtm_Atom Atom Interface Drivers
48 * \ingroup IfxLld_Gtm
49 * \defgroup IfxLld_Gtm_Tom TOM Interface Drivers
50 * \ingroup IfxLld_Gtm
51 * \defgroup IfxLld_Gtm_Tim Tim Interface Drivers
52 * \ingroup IfxLld_Gtm
53 * \defgroup IfxLld_Gtm_Impl_Enumerations Enumerations
54 * \ingroup IfxLld_Gtm_Impl
55 * \defgroup IfxLld_Gtm_Impl_Data_Structures Data Structures
56 * \ingroup IfxLld_Gtm_Impl
57 */
58
59 #ifndef IFXGTM_CFG_H
60 #define IFXGTM_CFG_H 1
61
62 /******************************************************************************/
63 /*----------------------------------Includes----------------------------------*/
64 /******************************************************************************/
65
66 #include "Cpu/Std/IfxCpu_Intrinsics.h"
67 #include "Ifx_Cfg.h"
68 #include "IfxGtm_reg.h"
69 #include "Port/Std/IfxPort.h"
70
71 /******************************************************************************/
72 /*-----------------------------------Macros-----------------------------------*/
73 /******************************************************************************/
74
75 /** \brief Mask for CMU_CLK_EN register (Enable): CLK0
76 */
77 #define IFXGTM_CMU_CLKEN_CLK0 (0x00000002)
78
79 /** \brief Mask for CMU_CLK_EN register (Enable): CLK1
80 */
81 #define IFXGTM_CMU_CLKEN_CLK1 (0x00000008)
82
83 /** \brief Mask for CMU_CLK_EN register (Enable): CLK2
84 */
85 #define IFXGTM_CMU_CLKEN_CLK2 (0x00000020)
86
87 /** \brief Mask for CMU_CLK_EN register (Enable): CLK3
88 */
89 #define IFXGTM_CMU_CLKEN_CLK3 (0x00000080)
90
91 /** \brief Mask for CMU_CLK_EN register (Enable): CLK4
92 */
93 #define IFXGTM_CMU_CLKEN_CLK4 (0x00000200)
94
95 /** \brief Mask for CMU_CLK_EN register (Enable): CLK5
96 */
97 #define IFXGTM_CMU_CLKEN_CLK5 (0x00000800)
98
99 /** \brief Mask for CMU_CLK_EN register (Enable): CLK6
100 */
101 #define IFXGTM_CMU_CLKEN_CLK6 (0x00002000)
102
103 /** \brief Mask for CMU_CLK_EN register (Enable): CLK7
104 */
105 #define IFXGTM_CMU_CLKEN_CLK7 (0x00008000)
106
107 /** \brief Mask for CMU_CLK_EN register (Enable): ECLK0
108 */
109 #define IFXGTM_CMU_CLKEN_ECLK0 (0x00020000)
110
111 /** \brief Mask for CMU_CLK_EN register (Enable): ECLK1
112 */
113 #define IFXGTM_CMU_CLKEN_ECLK1 (0x00080000)
114
115 /** \brief Mask for CMU_CLK_EN register (Enable): ECLK2
116 */
117 #define IFXGTM_CMU_CLKEN_ECLK2 (0x00200000)
118
119 /** \brief Mask for CMU_CLK_EN register (Enable): FXCLK
120 */
121 #define IFXGTM_CMU_CLKEN_FXCLK (0x00800000)
122
123 /** \brief Mask for CMU_CLK_EN register (Enable): ALL clocks
124 */
125 #define IFXGTM_CMU_CLKEN_ALL (0x00AAAAAA)
126
127 /** \brief Mask for CMU_CLK_EN register (Disable): CLK0
128 */
129 #define IFXGTM_CMU_CLKDIS_CLK0 (0x00000001)
130
131 /** \brief Mask for CMU_CLK_EN register (Disable): CLK1
132 */
133 #define IFXGTM_CMU_CLKDIS_CLK1 (0x00000004)
134
135 /** \brief Mask for CMU_CLK_EN register (Disable): CLK2
136 */
137 #define IFXGTM_CMU_CLKDIS_CLK2 (0x00000010)
138
139 /** \brief Mask for CMU_CLK_EN register (Disable): CLK3
140 */
141 #define IFXGTM_CMU_CLKDIS_CLK3 (0x00000040)
142
143 /** \brief Mask for CMU_CLK_EN register (Disable): CLK4
144 */
145 #define IFXGTM_CMU_CLKDIS_CLK4 (0x00000100)
146
147 /** \brief Mask for CMU_CLK_EN register (Disable): CLK5
148 */
149 #define IFXGTM_CMU_CLKDIS_CLK5 (0x00000400)
150
151 /** \brief Mask for CMU_CLK_EN register (Disable): CLK6
152 */
153 #define IFXGTM_CMU_CLKDIS_CLK6 (0x00001000)
154
155 /** \brief Mask for CMU_CLK_EN register (Disable): CLK7
156 */
157 #define IFXGTM_CMU_CLKDIS_CLK7 (0x00004000)
158
159 /** \brief Mask for CMU_CLK_EN register (Disable): ECLK0
160 */
161 #define IFXGTM_CMU_CLKDIS_ECLK0 (0x00010000)
162
163 /** \brief Mask for CMU_CLK_EN register (Disable): ECLK1
164 */
165 #define IFXGTM_CMU_CLKDIS_ECLK1 (0x00040000)
166
167 /** \brief Mask for CMU_CLK_EN register (Disable): ECLK2
168 */
169 #define IFXGTM_CMU_CLKDIS_ECLK2 (0x00100000)
170
171 /** \brief Mask for CMU_CLK_EN register (Disable): FXCLK
172 */
173 #define IFXGTM_CMU_CLKDIS_FXCLK (0x00400000)
174
175 /** \brief Mask for CMU_CLK_EN register (Disable): ALL clocks
176 */
177 #define IFXGTM_CMU_CLKDIS_ALL (0x00555555)
178
179 /** \brief
180 */
181 #define IFXGTM_NUM_ATOM_OBJECTS (4)
182
183 #define IFXGTM_NUM_TOM_OBJECTS (2)
184
185 #define IFXGTM_NUM_ATOM_CHANNELS (8)
186
187 #define IFXGTM_NUM_TOM_CHANNELS (16)
188
189 #define IFXGTM_NUM_MODULES (1)
190
191 /** \brief number of TIM channels.
192 */
193 #define IFXGTM_NUM_TIM_CHANNELS (8)
194
195 /******************************************************************************/
196 /*------------------------------Type Definitions------------------------------*/
197 /******************************************************************************/
198
199 typedef volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC;
200
201 /******************************************************************************/
202 /*--------------------------------Enumerations--------------------------------*/
203 /******************************************************************************/
204
205 /** \addtogroup IfxLld_Gtm_Impl_Enumerations
206 * \{ */
207 /** \brief Enum for ATOM objects
208 */
209 typedef enum
210 {
211 IfxGtm_Atom_0, /**< \brief ATOM object 0 */
212 IfxGtm_Atom_1, /**< \brief ATOM object 1 */
213 IfxGtm_Atom_2, /**< \brief ATOM object 2 */
214 IfxGtm_Atom_3 /**< \brief ATOM object 3 */
215 } IfxGtm_Atom;
216
217 /** \brief Enum for ATOM channels
218 */
219 typedef enum
220 {
221 IfxGtm_Atom_Ch_none = -1, /**< \brief Not Selected */
222 IfxGtm_Atom_Ch_0, /**< \brief ATOM channel 0 */
223 IfxGtm_Atom_Ch_1, /**< \brief ATOM channel 1 */
224 IfxGtm_Atom_Ch_2, /**< \brief ATOM channel 2 */
225 IfxGtm_Atom_Ch_3, /**< \brief ATOM channel 3 */
226 IfxGtm_Atom_Ch_4, /**< \brief ATOM channel 4 */
227 IfxGtm_Atom_Ch_5, /**< \brief ATOM channel 5 */
228 IfxGtm_Atom_Ch_6, /**< \brief ATOM channel 6 */
229 IfxGtm_Atom_Ch_7 /**< \brief ATOM channel 7 */
230 } IfxGtm_Atom_Ch;
231
232 /** \brief Enum for Dpll subincrements
233 */
234 typedef enum
235 {
236 IfxGtm_Dpll_SubInc_1 = 0, /**< \brief subincrement1 */
237 IfxGtm_Dpll_SubInc_2 /**< \brief subincrement2 */
238 } IfxGtm_Dpll_SubInc;
239
240 /** \brief Enum Enable disable feature control
241 */
242 typedef enum
243 {
244 IfxGtm_FeatureControl_disabled = 0, /**< \brief disabled */
245 IfxGtm_FeatureControl_disable = 1, /**< \brief disable */
246 IfxGtm_FeatureControl_enable = 2, /**< \brief enable */
247 IfxGtm_FeatureControl_enabled = 3 /**< \brief enabled */
248 } IfxGtm_FeatureControl;
249
250 /** \brief Enum for TIM objects
251 */
252 typedef enum
253 {
254 IfxGtm_Tim_0, /**< \brief TIM object 0 */
255 IfxGtm_Tim_1, /**< \brief TIM object 1 */
256 IfxGtm_Tim_2 /**< \brief TIM object 2 */
257 } IfxGtm_Tim;
258
259 /** \brief Enum for TIM channels
260 */
261 typedef enum
262 {
263 IfxGtm_Tim_Ch_0, /**< \brief TIM channel 0 */
264 IfxGtm_Tim_Ch_1, /**< \brief TIM channel 1 */
265 IfxGtm_Tim_Ch_2, /**< \brief TIM channel 2 */
266 IfxGtm_Tim_Ch_3, /**< \brief TIM channel 3 */
267 IfxGtm_Tim_Ch_4, /**< \brief TIM channel 4 */
268 IfxGtm_Tim_Ch_5, /**< \brief TIM channel 5 */
269 IfxGtm_Tim_Ch_6, /**< \brief TIM channel 6 */
270 IfxGtm_Tim_Ch_7 /**< \brief TIM channel 7 */
271 } IfxGtm_Tim_Ch;
272
273 /** \brief Enum for TOM objects
274 */
275 typedef enum
276 {
277 IfxGtm_Tom_0, /**< \brief TOM object 0 */
278 IfxGtm_Tom_1 /**< \brief TOM object 1 */
279 } IfxGtm_Tom;
280
281 /** \brief Enum for TOM channels
282 */
283 typedef enum
284 {
285 IfxGtm_Tom_Ch_none = -1, /**< \brief Not Selected */
286 IfxGtm_Tom_Ch_0, /**< \brief TOM channel 0 */
287 IfxGtm_Tom_Ch_1, /**< \brief TOM channel 1 */
288 IfxGtm_Tom_Ch_2, /**< \brief TOM channel 2 */
289 IfxGtm_Tom_Ch_3, /**< \brief TOM channel 3 */
290 IfxGtm_Tom_Ch_4, /**< \brief TOM channel 4 */
291 IfxGtm_Tom_Ch_5, /**< \brief TOM channel 5 */
292 IfxGtm_Tom_Ch_6, /**< \brief TOM channel 6 */
293 IfxGtm_Tom_Ch_7, /**< \brief TOM channel 7 */
294 IfxGtm_Tom_Ch_8, /**< \brief TOM channel 8 */
295 IfxGtm_Tom_Ch_9, /**< \brief TOM channel 9 */
296 IfxGtm_Tom_Ch_10, /**< \brief TOM channel 10 */
297 IfxGtm_Tom_Ch_11, /**< \brief TOM channel 11 */
298 IfxGtm_Tom_Ch_12, /**< \brief TOM channel 12 */
299 IfxGtm_Tom_Ch_13, /**< \brief TOM channel 13 */
300 IfxGtm_Tom_Ch_14, /**< \brief TOM channel 14 */
301 IfxGtm_Tom_Ch_15 /**< \brief TOM channel 15 */
302 } IfxGtm_Tom_Ch;
303
304 /** \brief Enum for TOM global channel control units
305 */
306 typedef enum
307 {
308 IfxGtm_Tom_Tgc_0, /**< \brief TOM global channel control unit0 */
309 IfxGtm_Tom_Tgc_1 /**< \brief TOM global channel control unit1 */
310 } IfxGtm_Tom_Tgc;
311
312 /** \} */
313
314 /******************************************************************************/
315 /*-----------------------------Data Structures--------------------------------*/
316 /******************************************************************************/
317
318 /** \addtogroup IfxLld_Gtm_Impl_Data_Structures
319 * \{ */
320 /** \brief TOM TGC objects
321 */
322 struct IfxGtm_Tom_TGC
323 {
324 Ifx_GTM_TOM_TGC0_GLB_CTRL GLB_CTRL; /**< \brief 30, TOM TGC0 Global Control Register */
325 Ifx_GTM_TOM_TGC0_ACT_TB ACT_TB; /**< \brief 34, TOM TGC0 Action Time Base Register */
326 Ifx_GTM_TOM_TGC0_FUPD_CTRL FUPD_CTRL; /**< \brief 38, TOM TGC0 Force Update Control Register */
327 Ifx_GTM_TOM_TGC0_INT_TRIG INT_TRIG; /**< \brief 3C, TOM TGC0 Internal Trigger Control Register */
328 Ifx_GTM_TOM_CH xxxCH1; /**< \brief 40, TOM channel objects */
329 Ifx_GTM_TOM_TGC0_ENDIS_CTRL ENDIS_CTRL; /**< \brief 70, TOM TGC0 Enable/Disable Control Register */
330 Ifx_GTM_TOM_TGC0_ENDIS_STAT ENDIS_STAT; /**< \brief 74, TOM TGC0 Enable/Disable Status Register */
331 Ifx_GTM_TOM_TGC0_OUTEN_CTRL OUTEN_CTRL; /**< \brief 78, TOM TGC0 Output Enable Control Register */
332 Ifx_GTM_TOM_TGC0_OUTEN_STAT OUTEN_STAT; /**< \brief 7C, TOM TGC0 Output Enable Status Register */
333 };
334
335 /** \} */
336
337 #endif /* IFXGTM_CFG_H */
IfxGtm_Tom_TGC::FUPD_CTRL
Ifx_GTM_TOM_TGC0_FUPD_CTRL FUPD_CTRL
38, TOM TGC0 Force Update Control Register
Definition: IfxGtm_cfg.h:326
IfxGtm_Atom_2
ATOM object 2.
Definition: IfxGtm_cfg.h:213
IfxGtm_Tom_TGC::ENDIS_CTRL
Ifx_GTM_TOM_TGC0_ENDIS_CTRL ENDIS_CTRL
70, TOM TGC0 Enable/Disable Control Register
Definition: IfxGtm_cfg.h:329
IfxGtm_Tim_0
TIM object 0.
Definition: IfxGtm_cfg.h:254
IfxGtm_FeatureControl_disabled
disabled
Definition: IfxGtm_cfg.h:244
IfxGtm_Tom_1
TOM object 1.
Definition: IfxGtm_cfg.h:278
IfxGtm_Tom_TGC::GLB_CTRL
Ifx_GTM_TOM_TGC0_GLB_CTRL GLB_CTRL
30, TOM TGC0 Global Control Register
Definition: IfxGtm_cfg.h:324
IfxGtm_Tim_Ch_0
TIM channel 0.
Definition: IfxGtm_cfg.h:263
IfxGtm_Atom_Ch_0
ATOM channel 0.
Definition: IfxGtm_cfg.h:222
IfxGtm_Dpll_SubInc_1
subincrement1
Definition: IfxGtm_cfg.h:236
IfxGtm_Tom_TGC::ENDIS_STAT
Ifx_GTM_TOM_TGC0_ENDIS_STAT ENDIS_STAT
74, TOM TGC0 Enable/Disable Status Register
Definition: IfxGtm_cfg.h:330
IfxGtm_Tim_2
TIM object 2.
Definition: IfxGtm_cfg.h:256
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:209
IfxGtm_Atom_Ch_4
ATOM channel 4.
Definition: IfxGtm_cfg.h:226
IfxGtm_Tom_Ch_10
TOM channel 10.
Definition: IfxGtm_cfg.h:296
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:252
IfxCpu_Intrinsics.h
IfxGtm_Tom_Ch_9
TOM channel 9.
Definition: IfxGtm_cfg.h:295
IfxGtm_Tom_Tgc_0
TOM global channel control unit0.
Definition: IfxGtm_cfg.h:308
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:283
IfxGtm_Tim_Ch_5
TIM channel 5.
Definition: IfxGtm_cfg.h:268
IfxGtm_Tom_Ch_3
TOM channel 3.
Definition: IfxGtm_cfg.h:289
IfxGtm_Tom_Ch_13
TOM channel 13.
Definition: IfxGtm_cfg.h:299
IfxGtm_Tom_TGC
TOM TGC objects.
Definition: IfxGtm_cfg.h:322
IfxGtm_FeatureControl_disable
disable
Definition: IfxGtm_cfg.h:245
IfxGtm_Tom_Ch_1
TOM channel 1.
Definition: IfxGtm_cfg.h:287
IfxGtm_Atom_Ch_6
ATOM channel 6.
Definition: IfxGtm_cfg.h:228
IfxGtm_FeatureControl_enabled
enabled
Definition: IfxGtm_cfg.h:247
IfxGtm_Atom_Ch_2
ATOM channel 2.
Definition: IfxGtm_cfg.h:224
IfxGtm_Tim_1
TIM object 1.
Definition: IfxGtm_cfg.h:255
IfxGtm_Tom_Ch_6
TOM channel 6.
Definition: IfxGtm_cfg.h:292
IfxGtm_Tom_TGC::ACT_TB
Ifx_GTM_TOM_TGC0_ACT_TB ACT_TB
34, TOM TGC0 Action Time Base Register
Definition: IfxGtm_cfg.h:325
IfxGtm_Dpll_SubInc
IfxGtm_Dpll_SubInc
Enum for Dpll subincrements.
Definition: IfxGtm_cfg.h:234
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:199
IfxGtm_Tom_Ch_4
TOM channel 4.
Definition: IfxGtm_cfg.h:290
IfxGtm_Tom_Ch_none
Not Selected.
Definition: IfxGtm_cfg.h:285
IfxGtm_Tom_TGC::OUTEN_CTRL
Ifx_GTM_TOM_TGC0_OUTEN_CTRL OUTEN_CTRL
78, TOM TGC0 Output Enable Control Register
Definition: IfxGtm_cfg.h:331
IfxGtm_Tim_Ch_7
TIM channel 7.
Definition: IfxGtm_cfg.h:270
IfxGtm_FeatureControl_enable
enable
Definition: IfxGtm_cfg.h:246
IfxGtm_FeatureControl
IfxGtm_FeatureControl
Enum Enable disable feature control.
Definition: IfxGtm_cfg.h:242
IfxGtm_Atom_1
ATOM object 1.
Definition: IfxGtm_cfg.h:212
IfxGtm_Tim_Ch_6
TIM channel 6.
Definition: IfxGtm_cfg.h:269
IfxGtm_Tom_Ch_12
TOM channel 12.
Definition: IfxGtm_cfg.h:298
IfxGtm_Tom_TGC::INT_TRIG
Ifx_GTM_TOM_TGC0_INT_TRIG INT_TRIG
3C, TOM TGC0 Internal Trigger Control Register
Definition: IfxGtm_cfg.h:327
IfxGtm_Tim_Ch_3
TIM channel 3.
Definition: IfxGtm_cfg.h:266
IfxGtm_Tom_Ch_5
TOM channel 5.
Definition: IfxGtm_cfg.h:291
IfxGtm_Atom_Ch_3
ATOM channel 3.
Definition: IfxGtm_cfg.h:225
IfxGtm_Atom_Ch_1
ATOM channel 1.
Definition: IfxGtm_cfg.h:223
IfxGtm_Atom_3
ATOM object 3.
Definition: IfxGtm_cfg.h:214
IfxGtm_Tom_Ch_0
TOM channel 0.
Definition: IfxGtm_cfg.h:286
IfxGtm_Atom_0
ATOM object 0.
Definition: IfxGtm_cfg.h:211
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:275
IfxGtm_Tom_TGC::OUTEN_STAT
Ifx_GTM_TOM_TGC0_OUTEN_STAT OUTEN_STAT
7C, TOM TGC0 Output Enable Status Register
Definition: IfxGtm_cfg.h:332
IfxGtm_Atom_Ch_none
Not Selected.
Definition: IfxGtm_cfg.h:221
IfxGtm_Dpll_SubInc_2
subincrement2
Definition: IfxGtm_cfg.h:237
IfxGtm_Tom_Ch_11
TOM channel 11.
Definition: IfxGtm_cfg.h:297
IfxGtm_Tom_0
TOM object 0.
Definition: IfxGtm_cfg.h:277
IfxGtm_Atom_Ch_7
ATOM channel 7.
Definition: IfxGtm_cfg.h:229
IfxGtm_Tom_Tgc_1
TOM global channel control unit1.
Definition: IfxGtm_cfg.h:309
IfxGtm_Tim_Ch_1
TIM channel 1.
Definition: IfxGtm_cfg.h:264
IfxGtm_Tom_Ch_7
TOM channel 7.
Definition: IfxGtm_cfg.h:293
IfxGtm_Tom_Ch_8
TOM channel 8.
Definition: IfxGtm_cfg.h:294
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:261
IfxGtm_Tom_Tgc
IfxGtm_Tom_Tgc
Enum for TOM global channel control units.
Definition: IfxGtm_cfg.h:306
IfxGtm_Tom_Ch_2
TOM channel 2.
Definition: IfxGtm_cfg.h:288
IfxGtm_Tim_Ch_4
TIM channel 4.
Definition: IfxGtm_cfg.h:267
IfxGtm_Tim_Ch_2
TIM channel 2.
Definition: IfxGtm_cfg.h:265
IfxGtm_Atom_Ch_5
ATOM channel 5.
Definition: IfxGtm_cfg.h:227
IfxGtm_Tom_Ch_15
TOM channel 15.
Definition: IfxGtm_cfg.h:301
IfxGtm_Tom_Ch_14
TOM channel 14.
Definition: IfxGtm_cfg.h:300
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:219
IfxGtm_Tom_TGC::xxxCH1
Ifx_GTM_TOM_CH xxxCH1
40, TOM channel objects
Definition: IfxGtm_cfg.h:328
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxHssl.c Source File

  • Hssl
  • Std
IfxHssl.c
Go to the documentation of this file.
1 /**
2 * \file IfxHssl.c
3 * \brief HSSL basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxHssl.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxHssl_disableHsctModule(Ifx_HSCT *hsct)
54 {
55 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
56 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
57 hsct->CLC.B.DISR = 1; /* disables the module */
58 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
59 }
60
61
62 void IfxHssl_disableHsslModule(Ifx_HSSL *hssl)
63 {
64 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
65 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
66 hssl->CLC.B.DISR = 1; /* disables the module */
67 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
68 }
69
70
71 void IfxHssl_enableHsctModule(Ifx_HSCT *hsct)
72 {
73 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
74 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
75 hsct->CLC.B.DISR = 0; /* enables the module */
76 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
77 }
78
79
80 void IfxHssl_enableHsslModule(Ifx_HSSL *hssl)
81 {
82 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
83 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
84 hssl->CLC.B.DISR = 0; /* enables the module */
85 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
86 }
87
88
89 Ifx_HSCT *IfxHssl_getHsctAddress(IfxHssl_hsctIndex hsct)
90 {
91 Ifx_HSCT *module;
92
93 if (hsct < IFXHSSL_NUM_MODULES)
94 {
95 module = (Ifx_HSCT *)IfxHssl_cfg_hsctIndexMap[hsct].module;
96 }
97 else
98 {
99 module = NULL_PTR;
100 }
101
102 return module;
103 }
104
105
106 IfxHssl_hsctIndex IfxHssl_getHsctIndex(Ifx_HSCT *hsct)
107 {
108 uint32 index;
109 IfxHssl_hsctIndex result;
110
111 result = IfxHssl_hsctIndex_none;
112
113 for (index = 0; index < IFXHSSL_NUM_MODULES; index++)
114 {
115 if (IfxHssl_cfg_hsctIndexMap[index].module == hsct)
116 {
117 result = (IfxHssl_hsctIndex)IfxHssl_cfg_hsctIndexMap[index].index;
118 break;
119 }
120 }
121
122 return result;
123 }
124
125
126 volatile Ifx_SRC_SRCR *IfxHssl_getHsctSrcPointer(Ifx_HSCT *hsct)
127 {
128 IFX_UNUSED_PARAMETER(hsct);
129 return &MODULE_SRC.HSCT.HSCT[0].SR;
130 }
131
132
133 Ifx_HSSL *IfxHssl_getHsslAddress(IfxHssl_hsslIndex hssl)
134 {
135 Ifx_HSSL *module;
136
137 if (hssl < IFXHSSL_NUM_MODULES)
138 {
139 module = (Ifx_HSSL *)IfxHssl_cfg_hsslIndexMap[hssl].module;
140 }
141 else
142 {
143 module = NULL_PTR;
144 }
145
146 return module;
147 }
148
149
150 volatile Ifx_SRC_SRCR *IfxHssl_getHsslCOKSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
151 {
152 IFX_UNUSED_PARAMETER(hssl);
153 return &MODULE_SRC.HSSL.HSSL[(uint32)channelId].COK;
154 }
155
156
157 volatile Ifx_SRC_SRCR *IfxHssl_getHsslERRSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
158 {
159 IFX_UNUSED_PARAMETER(hssl);
160 return &MODULE_SRC.HSSL.HSSL[(uint32)channelId].ERR;
161 }
162
163
164 volatile Ifx_SRC_SRCR *IfxHssl_getHsslEXISrcPointer(Ifx_HSSL *hssl)
165 {
166 IFX_UNUSED_PARAMETER(hssl);
167 return &MODULE_SRC.HSSL.EXI;
168 }
169
170
171 IfxHssl_hsslIndex IfxHssl_getHsslIndex(Ifx_HSSL *hssl)
172 {
173 uint32 index;
174 IfxHssl_hsslIndex result;
175
176 result = IfxHssl_hsslIndex_none;
177
178 for (index = 0; index < IFXHSSL_NUM_MODULES; index++)
179 {
180 if (IfxHssl_cfg_hsslIndexMap[index].module == hssl)
181 {
182 result = (IfxHssl_hsslIndex)IfxHssl_cfg_hsslIndexMap[index].index;
183 break;
184 }
185 }
186
187 return result;
188 }
189
190
191 volatile Ifx_SRC_SRCR *IfxHssl_getHsslRDISrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
192 {
193 IFX_UNUSED_PARAMETER(hssl);
194 return &MODULE_SRC.HSSL.HSSL[(uint32)channelId].RDI;
195 }
196
197
198 volatile Ifx_SRC_SRCR *IfxHssl_getHsslTRGSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
199 {
200 IFX_UNUSED_PARAMETER(hssl);
201 return &MODULE_SRC.HSSL.HSSL[(uint32)channelId].TRG;
202 }
203
204
205 void IfxHssl_resetHsctKernel(Ifx_HSCT *hsct)
206 {
207 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
208
209 IfxScuWdt_clearCpuEndinit(passwd);
210 hsct->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
211 hsct->KRST1.B.RST = 1;
212 IfxScuWdt_setCpuEndinit(passwd);
213
214 while (0 == hsct->KRST0.B.RSTSTAT) /* Wait until reset is executed */
215
216 {}
217
218 IfxScuWdt_clearCpuEndinit(passwd);
219 hsct->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
220 IfxScuWdt_setCpuEndinit(passwd);
221 }
222
223
224 void IfxHssl_resetHsslKernel(Ifx_HSSL *hssl)
225 {
226 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
227
228 IfxScuWdt_clearCpuEndinit(passwd);
229 hssl->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
230 hssl->KRST1.B.RST = 1;
231 IfxScuWdt_setCpuEndinit(passwd);
232
233 while (0 == hssl->KRST0.B.RSTSTAT) /* Wait until reset is executed */
234
235 {}
236
237 IfxScuWdt_clearCpuEndinit(passwd);
238 hssl->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
239 IfxScuWdt_setCpuEndinit(passwd);
240 }
IfxHssl_ChannelId
IfxHssl_ChannelId
channel selection
Definition: IfxHssl.h:74
IfxHssl_resetHsslKernel
void IfxHssl_resetHsslKernel(Ifx_HSSL *hssl)
resets the HSSL kernel
Definition: IfxHssl.c:224
IfxHssl_hsslIndex_none
Not Selected.
Definition: IfxHssl_cfg.h:90
IfxHssl_hsctIndex_none
Not Selected.
Definition: IfxHssl_cfg.h:82
IfxHssl_resetHsctKernel
void IfxHssl_resetHsctKernel(Ifx_HSCT *hsct)
resets HSCT kernel
Definition: IfxHssl.c:205
IfxHssl_enableHsslModule
void IfxHssl_enableHsslModule(Ifx_HSSL *hssl)
Enables the hssl module.
Definition: IfxHssl.c:80
IfxHssl_hsslIndex
IfxHssl_hsslIndex
List of the available Hssl resources.
Definition: IfxHssl_cfg.h:88
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxHssl_getHsslIndex
IfxHssl_hsslIndex IfxHssl_getHsslIndex(Ifx_HSSL *hssl)
API to get the resource index of the HSSL specified.
Definition: IfxHssl.c:171
IfxHssl_getHsctSrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsctSrcPointer(Ifx_HSCT *hsct)
Returns the SRC pointer for HSCT.
Definition: IfxHssl.c:126
IfxHssl_enableHsctModule
void IfxHssl_enableHsctModule(Ifx_HSCT *hsct)
Enables hsct module.
Definition: IfxHssl.c:71
IfxHssl_getHsslTRGSrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsslTRGSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL TRG of specified channel.
Definition: IfxHssl.c:198
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxHssl_getHsctAddress
Ifx_HSCT * IfxHssl_getHsctAddress(IfxHssl_hsctIndex hsct)
Definition: IfxHssl.c:89
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxHssl_getHsslAddress
Ifx_HSSL * IfxHssl_getHsslAddress(IfxHssl_hsslIndex hssl)
Definition: IfxHssl.c:133
IfxHssl_getHsslEXISrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsslEXISrcPointer(Ifx_HSSL *hssl)
Returns the SRC pointer for HSSL EXI interrupt.
Definition: IfxHssl.c:164
IfxHssl_getHsslRDISrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsslRDISrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel.
Definition: IfxHssl.c:191
IfxHssl_disableHsctModule
void IfxHssl_disableHsctModule(Ifx_HSCT *hsct)
Disables hsct module.
Definition: IfxHssl.c:53
IFXHSSL_NUM_MODULES
#define IFXHSSL_NUM_MODULES
Definition: IfxHssl_cfg.h:68
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxHssl_getHsctIndex
IfxHssl_hsctIndex IfxHssl_getHsctIndex(Ifx_HSCT *hsct)
API to get the resource index of the HSCT specified.
Definition: IfxHssl.c:106
IfxHssl_cfg_hsctIndexMap
IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.c:52
IfxHssl_getHsslCOKSrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsslCOKSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel.
Definition: IfxHssl.c:150
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxHssl_getHsslERRSrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsslERRSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL ERR of specified channel.
Definition: IfxHssl.c:157
IfxHssl_disableHsslModule
void IfxHssl_disableHsslModule(Ifx_HSSL *hssl)
DIsables the hssl module.
Definition: IfxHssl.c:62
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxHssl.h
HSSL basic functionality.
IfxHssl_cfg_hsslIndexMap
IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.c:56
IfxHssl_hsctIndex
IfxHssl_hsctIndex
List of the available Hsct resources.
Definition: IfxHssl_cfg.h:80


iLLD_TC26B: IfxHssl.h Source File

  • Hssl
  • Std
IfxHssl.h
Go to the documentation of this file.
1 /**
2 * \file IfxHssl.h
3 * \brief HSSL basic functionality
4 * \ingroup IfxLld_Hssl
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Hssl_Std_Enumerations Enumerations
43 * \ingroup IfxLld_Hssl_Std
44 * \defgroup IfxLld_Hssl_Std_HsctFunctions Hsct Functions
45 * \ingroup IfxLld_Hssl_Std
46 * \defgroup IfxLld_Hssl_Std_Structures Data Structures
47 * \ingroup IfxLld_Hssl_Std
48 * \defgroup IfxLld_Hssl_Std_HsslFunctions Hssl Functions
49 * \ingroup IfxLld_Hssl_Std
50 */
51
52 #ifndef IFXHSSL_H
53 #define IFXHSSL_H 1
54
55 /******************************************************************************/
56 /*----------------------------------Includes----------------------------------*/
57 /******************************************************************************/
58
59 #include "_Impl/IfxHssl_cfg.h"
60 #include "Cpu/Std/IfxCpu_Intrinsics.h"
61 #include "Scu/Std/IfxScuWdt.h"
62 #include "IfxHssl_bf.h"
63 #include "IfxHsct_bf.h"
64 #include "Src/Std/IfxSrc.h"
65
66 /******************************************************************************/
67 /*--------------------------------Enumerations--------------------------------*/
68 /******************************************************************************/
69
70 /** \addtogroup IfxLld_Hssl_Std_Enumerations
71 * \{ */
72 /** \brief channel selection
73 */
74 typedef enum
75 {
76 IfxHssl_ChannelId_0, /**< \brief Channel 0 */
77 IfxHssl_ChannelId_1, /**< \brief Channel 1 */
78 IfxHssl_ChannelId_2, /**< \brief Channel 2 */
79 IfxHssl_ChannelId_3 /**< \brief Channel 3 */
80 } IfxHssl_ChannelId;
81
82 /** \brief SysClk / Reference Clock Frequency rate
83 * Definition in Ifx_HSCT.INIT.B.SRCF
84 */
85 typedef enum
86 {
87 IfxHssl_ClockFrequencyRate_20Mhz = 0, /**< \brief SysClk/ RefClk is 20 MHz (Divider 1/1) */
88 IfxHssl_ClockFrequencyRate_10Mhz = 1 /**< \brief SysClk/ RefClk is 10 MHz (Divider 1/2) */
89 } IfxHssl_ClockFrequencyRate;
90
91 /** \brief communication command selection
92 * Definition in Ifx_HSSL.I.ICON.B.RWT
93 */
94 typedef enum
95 {
96 IfxHssl_Command_noAction = 0, /**< \brief command no action */
97 IfxHssl_Command_readFrame = 1, /**< \brief command read frame */
98 IfxHssl_Command_writeFrame = 2, /**< \brief command write frame */
99 IfxHssl_Command_triggerFrame = 3 /**< \brief command trigger frame */
100 } IfxHssl_Command;
101
102 /** \brief predefined control command payload values
103 */
104 typedef enum
105 {
106 IfxHssl_ControlCommand_ping = 0, /**< \brief ping (send by master. Slave sends back a fixed 32-bit payload result.) */
107 IfxHssl_ControlCommand_highSpeedClockStart = 2, /**< \brief slave interface clock multiplier start (in preparation for high speed mode) */
108 IfxHssl_ControlCommand_highSpeedClockStop = 4, /**< \brief slave interface clock multiplier stop (after fallback from high speed mode) */
109 IfxHssl_ControlCommand_lowSpeedTransmission = 8, /**< \brief select low speed mode for transfers from the Master to the Slave */
110 IfxHssl_ControlCommand_highSpeedTransmission = 16, /**< \brief select high speed mode for transfers from the Master to the Slave */
111 IfxHssl_ControlCommand_lowSpeedReception = 32, /**< \brief select low speed mode for transfers from the Slave to the Master */
112 IfxHssl_ControlCommand_mediumSpeedReception = 64, /**< \brief select medium speed mode for transfers from the Slave to the master */
113 IfxHssl_ControlCommand_highSpeedReception = 128, /**< \brief select high speed mode for transfers from the Slave to the master */
114 IfxHssl_ControlCommand_enableReception = 49, /**< \brief enable Slave interface transmitter */
115 IfxHssl_ControlCommand_disableReception = 50, /**< \brief disable Slave interface transmitter */
116 IfxHssl_ControlCommand_turnOnClockTestMode = 52, /**< \brief turn on clock test mode */
117 IfxHssl_ControlCommand_turnOffClockTestMode = 56, /**< \brief turn off clock test mode */
118 IfxHssl_ControlCommand_turnOnPayloadLoopback = 255 /**< \brief turn on payload loopback */
119 } IfxHssl_ControlCommand;
120
121 /** \brief Defines the length of the data in bits of the write and read command.
122 * Definition in Ifx_HSSL.I.ICON.B.DATLEN
123 */
124 typedef enum
125 {
126 IfxHssl_DataLength_8bit = 0, /**< \brief 8 bit */
127 IfxHssl_DataLength_16bit = 1, /**< \brief 16 bit */
128 IfxHssl_DataLength_32bit = 2 /**< \brief 32 bit */
129 } IfxHssl_DataLength;
130
131 /** \brief HSCT interrupt source
132 * Definition in Ifx_HSCT.IRQ
133 */
134 typedef enum
135 {
136 IfxHssl_Hsct_InterruptSource_headerError = IFX_HSCT_IRQ_HER_OFF, /**< \brief Header error detected */
137 IfxHssl_Hsct_InterruptSource_payloadError = IFX_HSCT_IRQ_PYER_OFF, /**< \brief Payload error detected */
138 IfxHssl_Hsct_InterruptSource_commandError = IFX_HSCT_IRQ_CER_OFF, /**< \brief HSCT Command error */
139 IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend = IFX_HSCT_IRQ_IFCFS_OFF, /**< \brief Interface control frame send */
140 IfxHssl_Hsct_InterruptSource_speedModeSwitchError = IFX_HSCT_IRQ_SMER_OFF, /**< \brief Speed mode switch error */
141 IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished = IFX_HSCT_IRQ_USMSF_OFF, /**< \brief Unsolicited message frame send finished */
142 IfxHssl_Hsct_InterruptSource_pllLockLosterror = IFX_HSCT_IRQ_PLER_OFF, /**< \brief Pll lock lost error */
143 IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived = IFX_HSCT_IRQ_USM_OFF, /**< \brief Unsolicited message received */
144 IfxHssl_Hsct_InterruptSource_pingAnswerReceived = IFX_HSCT_IRQ_PAR_OFF, /**< \brief PING Answer Received */
145 IfxHssl_Hsct_InterruptSource_txTransferError = IFX_HSCT_IRQ_TXTE_OFF, /**< \brief TX transfer error occurred on a disabled
146 * TX channel */
147 IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow = IFX_HSCT_IRQ_SFO_OFF, /**< \brief Synchronization FIFO overflow (in RX
148 * direction) */
149 IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow = IFX_HSCT_IRQ_SFU_OFF /**< \brief Synchronization FIFO underflow (in TX
150 * direction) */
151 } IfxHssl_Hsct_InterruptSource;
152
153 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
154 * Definition in Ifx_HSCT.CLC.B.EDIS
155 */
156 typedef enum
157 {
158 IfxHssl_Hsct_SleepMode_enable = 0, /**< \brief enables sleep mode */
159 IfxHssl_Hsct_SleepMode_disable = 1 /**< \brief disables sleep mode */
160 } IfxHssl_Hsct_SleepMode;
161
162 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
163 * Definition in Ifx_HSSL.CLC.B.EDIS
164 */
165 typedef enum
166 {
167 IfxHssl_Hssl_SleepMode_enable = 0, /**< \brief enables sleep mode */
168 IfxHssl_Hssl_SleepMode_disable = 1 /**< \brief disables sleep mode */
169 } IfxHssl_Hssl_SleepMode;
170
171 /** \brief interface mode (master IF /slave IF)
172 * Definition in Ifx_HSCT.INIT.B.IFM
173 */
174 typedef enum
175 {
176 IfxHssl_InterfaceMode_master = 0, /**< \brief master IF mode */
177 IfxHssl_InterfaceMode_slave = 1 /**< \brief slave IF mode */
178 } IfxHssl_InterfaceMode;
179
180 /** \brief master mode receive speed
181 * Definition in Ifx_HSCT.IFCTRL.B.MRXSPEED
182 */
183 typedef enum
184 {
185 IfxHssl_MasterModeRxSpeed_lowSpeed = 0, /**< \brief low speed */
186 IfxHssl_MasterModeRxSpeed_mediumSpeed = 1, /**< \brief medium speed */
187 IfxHssl_MasterModeRxSpeed_highSpeed = 2 /**< \brief high speed */
188 } IfxHssl_MasterModeRxSpeed;
189
190 /** \brief master mode transmit speed
191 * Definition in Ifx_HSCT.IFCTRL.B.MTXSPEED
192 */
193 typedef enum
194 {
195 IfxHssl_MasterModeTxSpeed_lowSpeed = 0, /**< \brief low speed */
196 IfxHssl_MasterModeTxSpeed_highSpeed = 2 /**< \brief high speed */
197 } IfxHssl_MasterModeTxSpeed;
198
199 /** \brief PLL reference clock
200 * Definition in Ifx_HSCT.CONFIGPHY.B.OSCCLKEN
201 */
202 typedef enum
203 {
204 IfxHssl_PllReferenceClock_hsctSystemClockInput = 0, /**< \brief hsct system clock input (HSCT SysClk_i) */
205 IfxHssl_PllReferenceClock_oscillatorInput = 1 /**< \brief oscillator input */
206 } IfxHssl_PllReferenceClock;
207
208 /** \brief streaming mode ( single / continuous )
209 * Definition in Ifx_HSSL.CFG.B.SMT/SMR
210 */
211 typedef enum
212 {
213 IfxHssl_StreamingMode_continuous = 0, /**< \brief streaming mode continuous (with two memory blocks) */
214 IfxHssl_StreamingMode_single = 1 /**< \brief streaming mode single (with one memory block) */
215 } IfxHssl_StreamingMode;
216
217 /** \brief OCDS Suspend Control (OCDS.SUS)
218 */
219 typedef enum
220 {
221 IfxHssl_SuspendMode_none = 0, /**< \brief No suspend */
222 IfxHssl_SuspendMode_hard = 1, /**< \brief Hard Suspend */
223 IfxHssl_SuspendMode_soft = 2 /**< \brief Soft Suspend */
224 } IfxHssl_SuspendMode;
225
226 /** \} */
227
228 /** \brief HSSL channel error interrupt source, which triggers the ERR interrupt
229 * Definition in Ifx_HSSL.MFLAGS
230 */
231 typedef enum
232 {
233 IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError = IFX_HSSL_MFLAGS_NACK_OFF, /**< \brief NACK error (triggers ERR interrupt) */
234 IfxHssl_Hssl_ERRInterruptSource_transactionTagError = IFX_HSSL_MFLAGS_TTE_OFF, /**< \brief Transaction Tag Error (triggers ERR interrupt) */
235 IfxHssl_Hssl_ERRInterruptSource_timeoutError = IFX_HSSL_MFLAGS_TIMEOUT_OFF, /**< \brief Timeout error (triggers ERR interrupt) */
236 IfxHssl_Hssl_ERRInterruptSource_unexpectedError = IFX_HSSL_MFLAGS_UNEXPECTED_OFF /**< \brief Unexpected error (triggers ERR interrupt) */
237 } IfxHssl_Hssl_ERRInterruptSource;
238
239 /** \brief HSSL global error interrupt source, which triggers the EXI interrupt
240 * Definition in Ifx_HSSL.MFLAGS
241 */
242 typedef enum
243 {
244 IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation = IFX_HSSL_MFLAGS_MAV_OFF, /**< \brief Memory Access Violation error (triggers EXI interrupt) */
245 IfxHssl_Hssl_EXIInterruptSource_busAccessError = IFX_HSSL_MFLAGS_SRIE_OFF, /**< \brief SRI/SPB Bus Access Error (triggers EXI interrupt) */
246 IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError = IFX_HSSL_MFLAGS_PIE1_OFF, /**< \brief PHY Inconsistency Error 1 (Channel Number
247 * Code Error, triggers EXI interrupt) */
248 IfxHssl_Hssl_EXIInterruptSource_dataLengthError = IFX_HSSL_MFLAGS_PIE2_OFF, /**< \brief PHY Inconsistency Error 2 (Data Length Error, triggers EXI interrupt) */
249 IfxHssl_Hssl_EXIInterruptSource_crcError = IFX_HSSL_MFLAGS_CRCE_OFF /**< \brief CRC error (triggers EXI interrupt) */
250 } IfxHssl_Hssl_EXIInterruptSource;
251
252 /******************************************************************************/
253 /*-----------------------------Data Structures--------------------------------*/
254 /******************************************************************************/
255
256 /** \addtogroup IfxLld_Hssl_Std_Structures
257 * \{ */
258 /** \brief HSCT module handle
259 */
260 typedef struct
261 {
262 Ifx_HSCT *hsct; /**< \brief pointer to HSCT registers */
263 boolean loopBack; /**< \brief loopc back selection */
264 } IfxHssl_Hsct;
265
266 /** \brief Configuration structure of the HSCT module
267 */
268 typedef struct
269 {
270 Ifx_HSCT *hsct; /**< \brief pointer to HSCT registers */
271 IfxHssl_InterfaceMode interfaceMode; /**< \brief interface mode (master IF /slave IF) */
272 boolean highSpeedMode; /**< \brief high speed mode selection */
273 boolean loopBack; /**< \brief loopc back selection */
274 } IfxHssl_Hsct_Config;
275
276 /** \} */
277
278 /** \addtogroup IfxLld_Hssl_Std_HsctFunctions
279 * \{ */
280
281 /******************************************************************************/
282 /*-------------------------Inline Function Prototypes-------------------------*/
283 /******************************************************************************/
284
285 /** \brief Clears the HSCT interrupt flag
286 * \param hsct pointer to HSCT registers
287 * \param source HSCT interrupt source
288 * \return None
289 */
290 IFX_INLINE void IfxHssl_clearHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source);
291
292 /** \brief Enables HSCT interrupt flag
293 * \param hsct pointer to HSCT registers
294 * \param source HSCT interrupt source
295 * \return None
296 */
297 IFX_INLINE void IfxHssl_disableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source);
298
299 /** \brief Enables HSCT interrupt
300 * \param hsct pointer to HSCT registers
301 * \param typeOfService Type of Service (Cpu or DMA)
302 * \param priority Priority of the interrupt
303 * \return None
304 */
305 IFX_INLINE void IfxHssl_enableHsctInterrupt(Ifx_HSCT *hsct, IfxSrc_Tos typeOfService, uint16 priority);
306
307 /** \brief Enables HSCT interrupt flag
308 * \param hsct pointer to HSCT registers
309 * \param source HSCT interrupt source
310 * \return None
311 */
312 IFX_INLINE void IfxHssl_enableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source);
313
314 /** \brief Returns the HSCT interrupt flag status
315 * \param hsct pointer to HSCT registers
316 * \param source HSCT interrupt source
317 * \return Status (TRUE / FALSE)
318 */
319 IFX_INLINE boolean IfxHssl_getHsctInterruptFlagStatus(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source);
320
321 /** \brief Sets the sensitivity of the module to sleep signal
322 * \param hsct pointer to HSCT registers
323 * \param mode mode selection (enable/disable)
324 * \return None
325 */
326 IFX_INLINE void IfxHssl_setHsctSleepMode(Ifx_HSCT *hsct, IfxHssl_Hsct_SleepMode mode);
327
328 /** \brief Get the last received unsolicited status message
329 * \param hsct pointer to HSCT registers
330 * \return Get the unsolicited status message.
331 */
332 IFX_INLINE uint32 IfxHssl_getHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct);
333
334 /** \brief Send the unsolicited status message
335 * \param hsct pointer to HSCT registers
336 * \param message Unsolicited status message to be sent
337 * \return None
338 */
339 IFX_INLINE void IfxHssl_sendHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct, uint32 message);
340
341 /** \brief Set the HSCT RX link speed
342 * \param hsct pointer to HSCT registers
343 * \param rxSpeed Speed for Rx link
344 * \return None
345 */
346 IFX_INLINE void IfxHssl_setHsctRxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeRxSpeed rxSpeed);
347
348 /** \brief Set the HSCT TX link speed
349 * \param hsct pointer to HSCT registers
350 * \param txSpeed Speed for Tx link
351 * \return None
352 */
353 IFX_INLINE void IfxHssl_setHsctTxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeTxSpeed txSpeed);
354
355 /** \brief Enable hsct transmit path in master interface
356 * \param hsct pointer to HSCT registers
357 * \return None
358 */
359 IFX_INLINE void IfxHssl_enableHsctTransmitPath(Ifx_HSCT *hsct);
360
361 /** \brief Enable hsct receive path in master interface
362 * \param hsct pointer to HSCT registers
363 * \return None
364 */
365 IFX_INLINE void IfxHssl_enableHsctReceivePath(Ifx_HSCT *hsct);
366
367 /** \brief Disable hsct transmit path in master interface
368 * \param hsct pointer to HSCT registers
369 * \return None
370 */
371 IFX_INLINE void IfxHssl_disableHsctTransmitPath(Ifx_HSCT *hsct);
372
373 /** \brief Disable hsct receive path in master interface
374 * \param hsct pointer to HSCT registers
375 * \return None
376 */
377 IFX_INLINE void IfxHssl_disableHsctReceivePath(Ifx_HSCT *hsct);
378
379 /******************************************************************************/
380 /*-------------------------Global Function Prototypes-------------------------*/
381 /******************************************************************************/
382
383 /** \brief Disables hsct module
384 * \param hsct pointer to HSCT registers
385 * \return None
386 */
387 IFX_EXTERN void IfxHssl_disableHsctModule(Ifx_HSCT *hsct);
388
389 /** \brief Enables hsct module
390 * \param hsct pointer to HSCT registers
391 * \return None
392 */
393 IFX_EXTERN void IfxHssl_enableHsctModule(Ifx_HSCT *hsct);
394
395 /**
396 * \param hsct Resource index of the HSCT
397 * \return HSCT module register address
398 */
399 IFX_EXTERN Ifx_HSCT *IfxHssl_getHsctAddress(IfxHssl_hsctIndex hsct);
400
401 /** \brief API to get the resource index of the HSCT specified.
402 * \return Resource index of the HSCT
403 */
404 IFX_EXTERN IfxHssl_hsctIndex IfxHssl_getHsctIndex(Ifx_HSCT *hsct);
405
406 /** \brief Returns the SRC pointer for HSCT
407 * \param hsct pointer to HSCT registers
408 * \return SRC pointer for HSCT
409 */
410 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsctSrcPointer(Ifx_HSCT *hsct);
411
412 /** \brief resets HSCT kernel
413 * \param hsct pointer to HSCT registers
414 * \return None
415 */
416 IFX_EXTERN void IfxHssl_resetHsctKernel(Ifx_HSCT *hsct);
417
418 /** \} */
419
420 /** \addtogroup IfxLld_Hssl_Std_HsslFunctions
421 * \{ */
422
423 /******************************************************************************/
424 /*-------------------------Inline Function Prototypes-------------------------*/
425 /******************************************************************************/
426
427 /** \brief Clears the HSSl channel error interrupt flag
428 * \param hssl pointer to HSSl registers
429 * \param source HSSL channel error interrupt source
430 * \param channelId HSSL channel number
431 * \return None
432 */
433 IFX_INLINE void IfxHssl_clearHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId);
434
435 /** \brief Clears the HSSl global error interrupt flag
436 * \param hssl pointer to HSSl registers
437 * \param source HSSL global error interrupt source
438 * \return None
439 */
440 IFX_INLINE void IfxHssl_clearHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source);
441
442 /** \brief Clears the Initialise Mode Flag status
443 * \param hssl pointer to HSSL registers
444 * \return None
445 */
446 IFX_INLINE void IfxHssl_clearInitialiseModeFlag(Ifx_HSSL *hssl);
447
448 /** \brief Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt
449 * \param hssl pointer to HSSl registers
450 * \param source HSSL channel error interrupt source
451 * \param channelId HSSL channel number
452 * \return None
453 */
454 IFX_INLINE void IfxHssl_disableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId);
455
456 /** \brief Disables the HSSl channel error interrupt flag, which trggers the EXI interrupt
457 * \param hssl pointer to HSSl registers
458 * \param source HSSL global error interrupt source
459 * \return None
460 */
461 IFX_INLINE void IfxHssl_disableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source);
462
463 /** \brief Enables all error flags
464 * \param hssl pointer to HSSL registers
465 * \return None
466 */
467 IFX_INLINE void IfxHssl_enableAllErrorFlags(Ifx_HSSL *hssl);
468
469 /** \brief Enables HSSL COK interrupt of specified channel
470 * \param hssl pointer to HSSl registers
471 * \param channelId HSSL channel number
472 * \param typeOfService Type of Service (Cpu or DMA)
473 * \param priority Priority of the interrupt
474 * \return None
475 */
476 IFX_INLINE void IfxHssl_enableHsslCOKInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority);
477
478 /** \brief Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt
479 * \param hssl pointer to HSSl registers
480 * \param source HSSL channel error interrupt source
481 * \param channelId HSSL channel number
482 * \return None
483 */
484 IFX_INLINE void IfxHssl_enableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId);
485
486 /** \brief Enables HSSL ERR interrupt of specified channel
487 * \param hssl pointer to HSSl registers
488 * \param channelId HSSL channel number
489 * \param typeOfService Type of Service (Cpu or DMA)
490 * \param priority Priority of the interrupt
491 * \return None
492 */
493 IFX_INLINE void IfxHssl_enableHsslERRInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority);
494
495 /** \brief Enables HSSL EXI interrupt of specified channel
496 * \param hssl pointer to HSSl registers
497 * \param typeOfService Type of Service (Cpu or DMA)
498 * \param priority Priority of the interrupt
499 * \return None
500 */
501 IFX_INLINE void IfxHssl_enableHsslEXIInterrupt(Ifx_HSSL *hssl, IfxSrc_Tos typeOfService, uint16 priority);
502
503 /** \brief Enables the HSSl global error interrupt flag, which trggers the EXI interrupt
504 * \param hssl pointer to HSSl registers
505 * \param source HSSL global error interrupt source
506 * \return None
507 */
508 IFX_INLINE void IfxHssl_enableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source);
509
510 /** \brief Enables HSSL RDI interrupt of specified channel
511 * \param hssl pointer to HSSl registers
512 * \param channelId HSSL channel number
513 * \param typeOfService Type of Service (Cpu or DMA)
514 * \param priority Priority of the interrupt
515 * \return None
516 */
517 IFX_INLINE void IfxHssl_enableHsslRDIInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority);
518
519 /** \brief Enables HSSL TRG interrupt of specified channel
520 * \param hssl pointer to HSSl registers
521 * \param channelId HSSL channel number
522 * \param typeOfService Type of Service (Cpu or DMA)
523 * \param priority Priority of the interrupt
524 * \return None
525 */
526 IFX_INLINE void IfxHssl_enableHsslTRGInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority);
527
528 /** \brief Returns the status of all MFLAGS status
529 * \param hssl pointer to HSSL registers
530 * \return MFLAGS status
531 */
532 IFX_INLINE uint32 IfxHssl_getAllMflagsStatus(Ifx_HSSL *hssl);
533
534 /** \brief Returns the Current Count value
535 * \param hssl pointer to HSSL registers
536 * \return Current Count value
537 */
538 IFX_INLINE uint16 IfxHssl_getCurrentCount(Ifx_HSSL *hssl);
539
540 /** \brief Clears the HSSl channel error interrupt flag
541 * \param hssl pointer to HSSl registers
542 * \param source HSSL channel error interrupt source
543 * \param channelId HSSL channel number
544 * \return Status (TRUE / FALSE)
545 */
546 IFX_INLINE boolean IfxHssl_getHsslChannelErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId);
547
548 /** \brief Clears the HSSl global error interrupt flag
549 * \param hssl pointer to HSSl registers
550 * \param source HSSL global error interrupt source
551 * \return Status (TRUE / FALSE)
552 */
553 IFX_INLINE boolean IfxHssl_getHsslGloabalErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source);
554
555 /** \brief Returns the Initialise Mode Flag status
556 * \param hssl pointer to HSSL registers
557 * \return status : TRUE/FALSE
558 */
559 IFX_INLINE boolean IfxHssl_getInitialiseModeFlagStatus(Ifx_HSSL *hssl);
560
561 /** \brief Returns the Reload Count value
562 * \param hssl pointer to HSSL registers
563 * \return Current Count value
564 */
565 IFX_INLINE uint16 IfxHssl_getReloadCount(Ifx_HSSL *hssl);
566
567 /** \brief Returns the module's suspend state.
568 * TRUE :if module is suspended.
569 * FALSE:if module is not yet suspended.
570 * \param hssl Pointer to HSSL module registers
571 * \return Suspend status (TRUE / FALSE)
572 */
573 IFX_INLINE boolean IfxHssl_isModuleSuspended(Ifx_HSSL *hssl);
574
575 /** \brief Sets the sensitivity of the module to sleep signal
576 * \param hssl pointer to HSSL registers
577 * \param mode mode selection (enable/disable)
578 * \return None
579 */
580 IFX_INLINE void IfxHssl_setHsslSleepMode(Ifx_HSSL *hssl, IfxHssl_Hssl_SleepMode mode);
581
582 /** \brief Sets the Initialise Mode Flag
583 * \param hssl pointer to HSSL registers
584 * \return None
585 */
586 IFX_INLINE void IfxHssl_setInitialiseModeFlag(Ifx_HSSL *hssl);
587
588 /** \brief Sets the reload Count
589 * \param hssl pointer to HSSL registers
590 * \param reloadValue Reload Value
591 * \return None
592 */
593 IFX_INLINE void IfxHssl_setReloadCount(Ifx_HSSL *hssl, uint16 reloadValue);
594
595 /** \brief Configure the Module to Hard/Soft suspend mode.
596 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
597 * \param hssl Pointer to HSSL module registers
598 * \param mode Module suspend mode
599 * \return None
600 */
601 IFX_INLINE void IfxHssl_setSuspendMode(Ifx_HSSL *hssl, IfxHssl_SuspendMode mode);
602
603 /** \brief Sets the Timeout Reload Value
604 * \param hssl pointer to HSSL registers
605 * \param channelId HSSL channel number
606 * \param timeoutValue Timeout Value
607 * \return None
608 */
609 IFX_INLINE void IfxHssl_setTimeoutReloadValue(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, uint8 timeoutValue);
610
611 /******************************************************************************/
612 /*-------------------------Global Function Prototypes-------------------------*/
613 /******************************************************************************/
614
615 /** \brief DIsables the hssl module
616 * \param hssl pointer to HSSl registers
617 * \return None
618 */
619 IFX_EXTERN void IfxHssl_disableHsslModule(Ifx_HSSL *hssl);
620
621 /** \brief Enables the hssl module
622 * \param hssl pointer to HSSl registers
623 * \return None
624 */
625 IFX_EXTERN void IfxHssl_enableHsslModule(Ifx_HSSL *hssl);
626
627 /**
628 * \param hssl Resource index of the HSSL
629 * \return HSSL module register address
630 */
631 IFX_EXTERN Ifx_HSSL *IfxHssl_getHsslAddress(IfxHssl_hsslIndex hssl);
632
633 /** \brief Returns the SRC pointer for HSSL COK of specified channel
634 * \param hssl pointer to HSSl registers
635 * \param channelId HSSL channel number
636 * \return SRC pointer for HSSL COK interrupt of specific channel
637 */
638 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslCOKSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId);
639
640 /** \brief Returns the SRC pointer for HSSL ERR of specified channel
641 * \param hssl pointer to HSSl registers
642 * \param channelId HSSL channel number
643 * \return SRC pointer for HSSL ERR interrupt of specific channel
644 */
645 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslERRSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId);
646
647 /** \brief Returns the SRC pointer for HSSL EXI interrupt
648 * \param hssl pointer to HSSl registers
649 * \return SRC pointer for HSSL EXI interrupt
650 */
651 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslEXISrcPointer(Ifx_HSSL *hssl);
652
653 /** \brief API to get the resource index of the HSSL specified.
654 * \return Resource index of the HSSL
655 */
656 IFX_EXTERN IfxHssl_hsslIndex IfxHssl_getHsslIndex(Ifx_HSSL *hssl);
657
658 /** \brief Returns the SRC pointer for HSSL COK of specified channel
659 * \param hssl pointer to HSSl registers
660 * \param channelId HSSL channel number
661 * \return SRC pointer for HSSL RDI interrupt of specific channel
662 */
663 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslRDISrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId);
664
665 /** \brief Returns the SRC pointer for HSSL TRG of specified channel
666 * \param hssl pointer to HSSl registers
667 * \param channelId HSSL channel number
668 * \return SRC pointer for HSSL TRG interrupt of specific channel
669 */
670 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslTRGSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId);
671
672 /** \brief resets the HSSL kernel
673 * \param hssl pointer to HSSL registers
674 * \return None
675 */
676 IFX_EXTERN void IfxHssl_resetHsslKernel(Ifx_HSSL *hssl);
677
678 /** \} */
679
680 /******************************************************************************/
681 /*---------------------Inline Function Implementations------------------------*/
682 /******************************************************************************/
683
684 IFX_INLINE void IfxHssl_clearHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
685 {
686 uint32 value = 1 << source;
687 hsct->IRQCLR.U = value;
688 }
689
690
691 IFX_INLINE void IfxHssl_clearHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
692 {
693 uint32 value = 1 << ((uint32)(channelId + source));
694 hssl->MFLAGSCL.U = value;
695 }
696
697
698 IFX_INLINE void IfxHssl_clearHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
699 {
700 uint32 value = 1 << source;
701 hssl->MFLAGSCL.U = value;
702 }
703
704
705 IFX_INLINE void IfxHssl_clearInitialiseModeFlag(Ifx_HSSL *hssl)
706 {
707 hssl->MFLAGSCL.B.INIC = 0x1U;
708 }
709
710
711 IFX_INLINE void IfxHssl_disableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
712 {
713 uint32 value = 1 << source;
714 hsct->IRQEN.U &= ~value;
715 }
716
717
718 IFX_INLINE void IfxHssl_disableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
719 {
720 uint32 value = 1 << ((uint32)(channelId + source));
721 hssl->MFLAGSEN.U &= ~value;
722 }
723
724
725 IFX_INLINE void IfxHssl_disableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
726 {
727 uint32 value = 1 << source;
728 hssl->MFLAGSEN.U &= ~value;
729 }
730
731
732 IFX_INLINE void IfxHssl_enableAllErrorFlags(Ifx_HSSL *hssl)
733 {
734 hssl->MFLAGSEN.U = 0x23E0FFFFU;
735 }
736
737
738 IFX_INLINE void IfxHssl_enableHsctInterrupt(Ifx_HSCT *hsct, IfxSrc_Tos typeOfService, uint16 priority)
739 {
740 volatile Ifx_SRC_SRCR *src;
741 src = IfxHssl_getHsctSrcPointer(hsct);
742 IfxSrc_init(src, typeOfService, priority);
743 IfxSrc_enable(src);
744 }
745
746
747 IFX_INLINE void IfxHssl_enableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
748 {
749 uint32 value = 1 << source;
750 hsct->IRQEN.U |= value;
751 }
752
753
754 IFX_INLINE void IfxHssl_enableHsslCOKInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
755 {
756 volatile Ifx_SRC_SRCR *src;
757 src = IfxHssl_getHsslCOKSrcPointer(hssl, channelId);
758 IfxSrc_init(src, typeOfService, priority);
759 IfxSrc_enable(src);
760 }
761
762
763 IFX_INLINE void IfxHssl_enableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
764 {
765 uint32 value = 1 << ((uint32)(channelId + source));
766 hssl->MFLAGSEN.U |= value;
767 }
768
769
770 IFX_INLINE void IfxHssl_enableHsslERRInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
771 {
772 volatile Ifx_SRC_SRCR *src;
773 src = IfxHssl_getHsslERRSrcPointer(hssl, channelId);
774 IfxSrc_init(src, typeOfService, priority);
775 IfxSrc_enable(src);
776 }
777
778
779 IFX_INLINE void IfxHssl_enableHsslEXIInterrupt(Ifx_HSSL *hssl, IfxSrc_Tos typeOfService, uint16 priority)
780 {
781 volatile Ifx_SRC_SRCR *src;
782 src = IfxHssl_getHsslEXISrcPointer(hssl);
783 IfxSrc_init(src, typeOfService, priority);
784 IfxSrc_enable(src);
785 }
786
787
788 IFX_INLINE void IfxHssl_enableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
789 {
790 uint32 value = 1 << source;
791 hssl->MFLAGSEN.U |= value;
792 }
793
794
795 IFX_INLINE void IfxHssl_enableHsslRDIInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
796 {
797 volatile Ifx_SRC_SRCR *src;
798 src = IfxHssl_getHsslRDISrcPointer(hssl, channelId);
799 IfxSrc_init(src, typeOfService, priority);
800 IfxSrc_enable(src);
801 }
802
803
804 IFX_INLINE void IfxHssl_enableHsslTRGInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
805 {
806 volatile Ifx_SRC_SRCR *src;
807 src = IfxHssl_getHsslTRGSrcPointer(hssl, channelId);
808 IfxSrc_init(src, typeOfService, priority);
809 IfxSrc_enable(src);
810 }
811
812
813 IFX_INLINE uint32 IfxHssl_getAllMflagsStatus(Ifx_HSSL *hssl)
814 {
815 return hssl->MFLAGS.U;
816 }
817
818
819 IFX_INLINE uint16 IfxHssl_getCurrentCount(Ifx_HSSL *hssl)
820 {
821 return hssl->IS.FC.B.CURCOUNT;
822 }
823
824
825 IFX_INLINE boolean IfxHssl_getHsctInterruptFlagStatus(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
826 {
827 return (hsct->IRQ.U >> source) & 0x1;
828 }
829
830
831 IFX_INLINE boolean IfxHssl_getHsslChannelErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
832 {
833 return (hssl->MFLAGS.U >> ((uint32)(channelId + source))) & 0x1;
834 }
835
836
837 IFX_INLINE boolean IfxHssl_getHsslGloabalErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
838 {
839 return (hssl->MFLAGS.U >> source) & 0x1;
840 }
841
842
843 IFX_INLINE boolean IfxHssl_getInitialiseModeFlagStatus(Ifx_HSSL *hssl)
844 {
845 return hssl->MFLAGS.B.INI != 0;
846 }
847
848
849 IFX_INLINE uint16 IfxHssl_getReloadCount(Ifx_HSSL *hssl)
850 {
851 return hssl->IS.FC.B.RELCOUNT;
852 }
853
854
855 IFX_INLINE boolean IfxHssl_isModuleSuspended(Ifx_HSSL *hssl)
856 {
857 Ifx_HSSL_OCS ocs;
858
859 /* read the status */
860 ocs.U = hssl->OCS.U;
861
862 /* return the status */
863 return ocs.B.SUSSTA;
864 }
865
866
867 IFX_INLINE void IfxHssl_setHsctSleepMode(Ifx_HSCT *hsct, IfxHssl_Hsct_SleepMode mode)
868 {
869 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
870 IfxScuWdt_clearCpuEndinit(passwd);
871 hsct->CLC.B.EDIS = mode;
872 IfxScuWdt_setCpuEndinit(passwd);
873 }
874
875
876 IFX_INLINE void IfxHssl_setHsslSleepMode(Ifx_HSSL *hssl, IfxHssl_Hssl_SleepMode mode)
877 {
878 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
879 IfxScuWdt_clearCpuEndinit(passwd);
880 hssl->CLC.B.EDIS = mode;
881 IfxScuWdt_setCpuEndinit(passwd);
882 }
883
884
885 IFX_INLINE void IfxHssl_setInitialiseModeFlag(Ifx_HSSL *hssl)
886 {
887 hssl->MFLAGSSET.B.INIS = 0x1U;
888 }
889
890
891 IFX_INLINE void IfxHssl_setReloadCount(Ifx_HSSL *hssl, uint16 reloadValue)
892 {
893 hssl->IS.FC.B.RELCOUNT = reloadValue;
894 }
895
896
897 IFX_INLINE void IfxHssl_setSuspendMode(Ifx_HSSL *hssl, IfxHssl_SuspendMode mode)
898 {
899 Ifx_HSSL_OCS ocs;
900
901 /* remove protection and configure the suspend mode. */
902 ocs.B.SUS_P = 1;
903 ocs.B.SUS = mode;
904 hssl->OCS.U = ocs.U;
905 }
906
907
908 IFX_INLINE void IfxHssl_setTimeoutReloadValue(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, uint8 timeoutValue)
909 {
910 hssl->I[channelId].ICON.B.TOREL = timeoutValue;
911 }
912
913
914 IFX_INLINE uint32 IfxHssl_getHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct)
915 {
916 return hsct->USMR.U;
917 }
918
919
920 IFX_INLINE void IfxHssl_sendHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct, uint32 message)
921 {
922 hsct->USMS.U = message;
923 }
924
925
926 IFX_INLINE void IfxHssl_setHsctRxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeRxSpeed rxSpeed)
927 {
928 hsct->IFCTRL.B.MRXSPEED = rxSpeed;
929 }
930
931
932 IFX_INLINE void IfxHssl_setHsctTxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeTxSpeed txSpeed)
933 {
934 hsct->IFCTRL.B.MTXSPEED = txSpeed;
935 }
936
937
938 IFX_INLINE void IfxHssl_enableHsctTransmitPath(Ifx_HSCT *hsct)
939 {
940 hsct->DISABLE.B.TX_DIS = 0x0U;
941 }
942
943
944 IFX_INLINE void IfxHssl_enableHsctReceivePath(Ifx_HSCT *hsct)
945 {
946 hsct->DISABLE.B.RX_DIS = 0x0U;
947 }
948
949
950 IFX_INLINE void IfxHssl_disableHsctTransmitPath(Ifx_HSCT *hsct)
951 {
952 hsct->DISABLE.B.TX_DIS = 0x1U;
953 }
954
955
956 IFX_INLINE void IfxHssl_disableHsctReceivePath(Ifx_HSCT *hsct)
957 {
958 hsct->DISABLE.B.RX_DIS = 0x1U;
959 }
960
961
962 #endif /* IFXHSSL_H */
IfxHssl_ChannelId
IfxHssl_ChannelId
channel selection
Definition: IfxHssl.h:74
IfxHssl_StreamingMode_continuous
streaming mode continuous (with two memory blocks)
Definition: IfxHssl.h:213
IfxHssl_resetHsslKernel
IFX_EXTERN void IfxHssl_resetHsslKernel(Ifx_HSSL *hssl)
resets the HSSL kernel
Definition: IfxHssl.c:224
IfxHssl_ChannelId_3
Channel 3.
Definition: IfxHssl.h:79
IfxHssl_ControlCommand_highSpeedTransmission
select high speed mode for transfers from the Master to the Slave
Definition: IfxHssl.h:110
IfxHssl_Hssl_EXIInterruptSource
IfxHssl_Hssl_EXIInterruptSource
HSSL global error interrupt source, which triggers the EXI interrupt Definition in Ifx_HSSL...
Definition: IfxHssl.h:242
IfxHssl_MasterModeTxSpeed_lowSpeed
low speed
Definition: IfxHssl.h:195
IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished
Unsolicited message frame send finished.
Definition: IfxHssl.h:141
IfxHssl_setHsctRxLinkSpeed
IFX_INLINE void IfxHssl_setHsctRxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeRxSpeed rxSpeed)
Set the HSCT RX link speed.
Definition: IfxHssl.h:926
IfxHssl_enableHsctTransmitPath
IFX_INLINE void IfxHssl_enableHsctTransmitPath(Ifx_HSCT *hsct)
Enable hsct transmit path in master interface.
Definition: IfxHssl.h:938
IfxHssl_clearInitialiseModeFlag
IFX_INLINE void IfxHssl_clearInitialiseModeFlag(Ifx_HSSL *hssl)
Clears the Initialise Mode Flag status.
Definition: IfxHssl.h:705
IfxHssl_enableHsctInterruptFlag
IFX_INLINE void IfxHssl_enableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag.
Definition: IfxHssl.h:747
IfxHssl_StreamingMode
IfxHssl_StreamingMode
streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR
Definition: IfxHssl.h:211
IfxHssl_ControlCommand_mediumSpeedReception
select medium speed mode for transfers from the Slave to the master
Definition: IfxHssl.h:112
IfxHssl_Hsct_InterruptSource_pingAnswerReceived
PING Answer Received.
Definition: IfxHssl.h:144
IfxHssl_Hssl_EXIInterruptSource_crcError
CRC error (triggers EXI interrupt)
Definition: IfxHssl.h:249
IfxHssl_resetHsctKernel
IFX_EXTERN void IfxHssl_resetHsctKernel(Ifx_HSCT *hsct)
resets HSCT kernel
Definition: IfxHssl.c:205
IfxHssl_ControlCommand_turnOffClockTestMode
turn off clock test mode
Definition: IfxHssl.h:117
IfxHssl_Hsct_InterruptSource
IfxHssl_Hsct_InterruptSource
HSCT interrupt source Definition in Ifx_HSCT.IRQ.
Definition: IfxHssl.h:134
IfxHssl_Hssl_SleepMode_disable
disables sleep mode
Definition: IfxHssl.h:168
IfxHssl_enableHsslERRInterrupt
IFX_INLINE void IfxHssl_enableHsslERRInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL ERR interrupt of specified channel.
Definition: IfxHssl.h:770
IfxHssl_getHsctInterruptFlagStatus
IFX_INLINE boolean IfxHssl_getHsctInterruptFlagStatus(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Returns the HSCT interrupt flag status.
Definition: IfxHssl.h:825
IfxHssl_ControlCommand_lowSpeedTransmission
select low speed mode for transfers from the Master to the Slave
Definition: IfxHssl.h:109
IfxHssl_clearHsslChannelErrorInterruptFlag
IFX_INLINE void IfxHssl_clearHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag.
Definition: IfxHssl.h:691
IfxHssl_Hsct_InterruptSource_headerError
Header error detected.
Definition: IfxHssl.h:136
IfxHssl_PllReferenceClock_oscillatorInput
oscillator input
Definition: IfxHssl.h:205
IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError
PHY Inconsistency Error 1 (Channel Number Code Error, triggers EXI interrupt)
Definition: IfxHssl.h:246
IfxHssl_sendHsctUnsolicitedStatusMessage
IFX_INLINE void IfxHssl_sendHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct, uint32 message)
Send the unsolicited status message.
Definition: IfxHssl.h:920
IfxHssl_enableHsslModule
IFX_EXTERN void IfxHssl_enableHsslModule(Ifx_HSSL *hssl)
Enables the hssl module.
Definition: IfxHssl.c:80
IfxHssl_Hsct_InterruptSource_txTransferError
TX transfer error occurred on a disabled TX channel.
Definition: IfxHssl.h:145
IfxHssl_Hsct_Config::interfaceMode
IfxHssl_InterfaceMode interfaceMode
interface mode (master IF /slave IF)
Definition: IfxHssl.h:271
IfxHssl_getHsctUnsolicitedStatusMessage
IFX_INLINE uint32 IfxHssl_getHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct)
Get the last received unsolicited status message.
Definition: IfxHssl.h:914
IfxHssl_getInitialiseModeFlagStatus
IFX_INLINE boolean IfxHssl_getInitialiseModeFlagStatus(Ifx_HSSL *hssl)
Returns the Initialise Mode Flag status.
Definition: IfxHssl.h:843
IfxHssl_ControlCommand_highSpeedClockStop
slave interface clock multiplier stop (after fallback from high speed mode)
Definition: IfxHssl.h:108
IfxHssl_hsslIndex
IfxHssl_hsslIndex
List of the available Hssl resources.
Definition: IfxHssl_cfg.h:88
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxHssl_SuspendMode_hard
Hard Suspend.
Definition: IfxHssl.h:222
IfxHssl_Hsct::loopBack
boolean loopBack
loopc back selection
Definition: IfxHssl.h:263
IfxHssl_MasterModeRxSpeed_lowSpeed
low speed
Definition: IfxHssl.h:185
IfxHssl_enableAllErrorFlags
IFX_INLINE void IfxHssl_enableAllErrorFlags(Ifx_HSSL *hssl)
Enables all error flags.
Definition: IfxHssl.h:732
IfxHssl_disableHsctInterruptFlag
IFX_INLINE void IfxHssl_disableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag.
Definition: IfxHssl.h:711
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxHssl_getAllMflagsStatus
IFX_INLINE uint32 IfxHssl_getAllMflagsStatus(Ifx_HSSL *hssl)
Returns the status of all MFLAGS status.
Definition: IfxHssl.h:813
IfxHssl_enableHsslRDIInterrupt
IFX_INLINE void IfxHssl_enableHsslRDIInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL RDI interrupt of specified channel.
Definition: IfxHssl.h:795
IfxHssl_getHsslIndex
IFX_EXTERN IfxHssl_hsslIndex IfxHssl_getHsslIndex(Ifx_HSSL *hssl)
API to get the resource index of the HSSL specified.
Definition: IfxHssl.c:171
IfxHssl_getHsctSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsctSrcPointer(Ifx_HSCT *hsct)
Returns the SRC pointer for HSCT.
Definition: IfxHssl.c:126
IfxHssl_Hsct_InterruptSource_commandError
HSCT Command error.
Definition: IfxHssl.h:138
IfxHssl_Hsct
HSCT module handle.
Definition: IfxHssl.h:260
IfxHssl_enableHsctModule
IFX_EXTERN void IfxHssl_enableHsctModule(Ifx_HSCT *hsct)
Enables hsct module.
Definition: IfxHssl.c:71
IfxHssl_Hssl_ERRInterruptSource_timeoutError
Timeout error (triggers ERR interrupt)
Definition: IfxHssl.h:235
IfxHssl_getHsslTRGSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsslTRGSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL TRG of specified channel.
Definition: IfxHssl.c:198
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxHssl_Command
IfxHssl_Command
communication command selection Definition in Ifx_HSSL.I.ICON.B.RWT
Definition: IfxHssl.h:94
IfxHssl_ChannelId_0
Channel 0.
Definition: IfxHssl.h:76
IfxSrc.h
SRC basic functionality.
IfxHssl_Hssl_EXIInterruptSource_busAccessError
SRI/SPB Bus Access Error (triggers EXI interrupt)
Definition: IfxHssl.h:245
IfxHssl_Hsct_InterruptSource_speedModeSwitchError
Speed mode switch error.
Definition: IfxHssl.h:140
IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow
Synchronization FIFO underflow (in TX direction)
Definition: IfxHssl.h:149
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCpu_Intrinsics.h
IfxHssl_Hsct_SleepMode_disable
disables sleep mode
Definition: IfxHssl.h:159
IfxHssl_enableHsslGlobalErrorInterruptFlag
IFX_INLINE void IfxHssl_enableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Enables the HSSl global error interrupt flag, which trggers the EXI interrupt.
Definition: IfxHssl.h:788
IfxHssl_getHsctAddress
IFX_EXTERN Ifx_HSCT * IfxHssl_getHsctAddress(IfxHssl_hsctIndex hsct)
Definition: IfxHssl.c:89
IfxHssl_Hssl_ERRInterruptSource
IfxHssl_Hssl_ERRInterruptSource
HSSL channel error interrupt source, which triggers the ERR interrupt Definition in Ifx_HSSL...
Definition: IfxHssl.h:231
IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow
Synchronization FIFO overflow (in RX direction)
Definition: IfxHssl.h:147
IfxHssl_ChannelId_1
Channel 1.
Definition: IfxHssl.h:77
IfxHssl_InterfaceMode_master
master IF mode
Definition: IfxHssl.h:176
IfxHssl_ControlCommand_highSpeedReception
select high speed mode for transfers from the Slave to the master
Definition: IfxHssl.h:113
IfxHssl_InterfaceMode
IfxHssl_InterfaceMode
interface mode (master IF /slave IF) Definition in Ifx_HSCT.INIT.B.IFM
Definition: IfxHssl.h:174
IfxScuWdt.h
SCU basic functionality.
IfxHssl_Hssl_SleepMode
IfxHssl_Hssl_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_HSSL.CLC.B.EDIS.
Definition: IfxHssl.h:165
IfxHssl_isModuleSuspended
IFX_INLINE boolean IfxHssl_isModuleSuspended(Ifx_HSSL *hssl)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxHssl.h:855
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxHssl_ControlCommand
IfxHssl_ControlCommand
predefined control command payload values
Definition: IfxHssl.h:104
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxHssl_getHsslAddress
IFX_EXTERN Ifx_HSSL * IfxHssl_getHsslAddress(IfxHssl_hsslIndex hssl)
Definition: IfxHssl.c:133
IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError
NACK error (triggers ERR interrupt)
Definition: IfxHssl.h:233
IfxHssl_clearHsslGlobalErrorInterruptFlag
IFX_INLINE void IfxHssl_clearHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag.
Definition: IfxHssl.h:698
IfxHssl_setInitialiseModeFlag
IFX_INLINE void IfxHssl_setInitialiseModeFlag(Ifx_HSSL *hssl)
Sets the Initialise Mode Flag.
Definition: IfxHssl.h:885
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxHssl_ControlCommand_lowSpeedReception
select low speed mode for transfers from the Slave to the Master
Definition: IfxHssl.h:111
IfxHssl_Command_writeFrame
command write frame
Definition: IfxHssl.h:98
IfxHssl_enableHsctReceivePath
IFX_INLINE void IfxHssl_enableHsctReceivePath(Ifx_HSCT *hsct)
Enable hsct receive path in master interface.
Definition: IfxHssl.h:944
IfxHssl_Hsct_SleepMode
IfxHssl_Hsct_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_HSCT.CLC.B.EDIS.
Definition: IfxHssl.h:156
IfxHssl_setReloadCount
IFX_INLINE void IfxHssl_setReloadCount(Ifx_HSSL *hssl, uint16 reloadValue)
Sets the reload Count.
Definition: IfxHssl.h:891
IfxHssl_PllReferenceClock_hsctSystemClockInput
hsct system clock input (HSCT SysClk_i)
Definition: IfxHssl.h:204
IfxHssl_MasterModeRxSpeed
IfxHssl_MasterModeRxSpeed
master mode receive speed Definition in Ifx_HSCT.IFCTRL.B.MRXSPEED
Definition: IfxHssl.h:183
IfxHssl_getReloadCount
IFX_INLINE uint16 IfxHssl_getReloadCount(Ifx_HSSL *hssl)
Returns the Reload Count value.
Definition: IfxHssl.h:849
IfxHssl_InterfaceMode_slave
slave IF mode
Definition: IfxHssl.h:177
IfxHssl_Command_triggerFrame
command trigger frame
Definition: IfxHssl.h:99
IfxHssl_ControlCommand_ping
ping (send by master. Slave sends back a fixed 32-bit payload result.)
Definition: IfxHssl.h:106
IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend
Interface control frame send.
Definition: IfxHssl.h:139
IfxHssl_getHsslEXISrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsslEXISrcPointer(Ifx_HSSL *hssl)
Returns the SRC pointer for HSSL EXI interrupt.
Definition: IfxHssl.c:164
IfxHssl_enableHsslEXIInterrupt
IFX_INLINE void IfxHssl_enableHsslEXIInterrupt(Ifx_HSSL *hssl, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL EXI interrupt of specified channel.
Definition: IfxHssl.h:779
IfxHssl_getHsslRDISrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsslRDISrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel.
Definition: IfxHssl.c:191
IfxHssl_DataLength
IfxHssl_DataLength
Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL...
Definition: IfxHssl.h:124
IfxHssl_cfg.h
HSSL on-chip implementation data.
IfxHssl_Hssl_EXIInterruptSource_dataLengthError
PHY Inconsistency Error 2 (Data Length Error, triggers EXI interrupt)
Definition: IfxHssl.h:248
IfxHssl_MasterModeTxSpeed_highSpeed
high speed
Definition: IfxHssl.h:196
IfxHssl_ControlCommand_turnOnClockTestMode
turn on clock test mode
Definition: IfxHssl.h:116
IfxHssl_DataLength_16bit
16 bit
Definition: IfxHssl.h:127
IfxHssl_SuspendMode
IfxHssl_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxHssl.h:219
IfxHssl_disableHsctModule
IFX_EXTERN void IfxHssl_disableHsctModule(Ifx_HSCT *hsct)
Disables hsct module.
Definition: IfxHssl.c:53
IfxHssl_Hssl_SleepMode_enable
enables sleep mode
Definition: IfxHssl.h:167
IfxHssl_Hsct_InterruptSource_pllLockLosterror
Pll lock lost error.
Definition: IfxHssl.h:142
IfxHssl_Hsct_Config::highSpeedMode
boolean highSpeedMode
high speed mode selection
Definition: IfxHssl.h:272
IfxHssl_DataLength_32bit
32 bit
Definition: IfxHssl.h:128
IfxHssl_SuspendMode_soft
Soft Suspend.
Definition: IfxHssl.h:223
IfxHssl_SuspendMode_none
No suspend.
Definition: IfxHssl.h:221
IfxHssl_DataLength_8bit
8 bit
Definition: IfxHssl.h:126
IfxHssl_enableHsctInterrupt
IFX_INLINE void IfxHssl_enableHsctInterrupt(Ifx_HSCT *hsct, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSCT interrupt.
Definition: IfxHssl.h:738
IfxHssl_disableHsctTransmitPath
IFX_INLINE void IfxHssl_disableHsctTransmitPath(Ifx_HSCT *hsct)
Disable hsct transmit path in master interface.
Definition: IfxHssl.h:950
IfxHssl_MasterModeRxSpeed_highSpeed
high speed
Definition: IfxHssl.h:187
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxHssl_getHsctIndex
IFX_EXTERN IfxHssl_hsctIndex IfxHssl_getHsctIndex(Ifx_HSCT *hsct)
API to get the resource index of the HSCT specified.
Definition: IfxHssl.c:106
IfxHssl_clearHsctInterruptFlag
IFX_INLINE void IfxHssl_clearHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Clears the HSCT interrupt flag.
Definition: IfxHssl.h:684
IfxHssl_setHsctSleepMode
IFX_INLINE void IfxHssl_setHsctSleepMode(Ifx_HSCT *hsct, IfxHssl_Hsct_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxHssl.h:867
IfxHssl_setHsslSleepMode
IFX_INLINE void IfxHssl_setHsslSleepMode(Ifx_HSSL *hssl, IfxHssl_Hssl_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxHssl.h:876
IfxHssl_MasterModeTxSpeed
IfxHssl_MasterModeTxSpeed
master mode transmit speed Definition in Ifx_HSCT.IFCTRL.B.MTXSPEED
Definition: IfxHssl.h:193
IfxHssl_Hsct_Config
Configuration structure of the HSCT module.
Definition: IfxHssl.h:268
IfxHssl_ClockFrequencyRate_10Mhz
SysClk/ RefClk is 10 MHz (Divider 1/2)
Definition: IfxHssl.h:88
IfxHssl_ControlCommand_disableReception
disable Slave interface transmitter
Definition: IfxHssl.h:115
IfxHssl_enableHsslChannelErrorInterruptFlag
IFX_INLINE void IfxHssl_enableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt.
Definition: IfxHssl.h:763
IfxHssl_Command_readFrame
command read frame
Definition: IfxHssl.h:97
IfxHssl_ChannelId_2
Channel 2.
Definition: IfxHssl.h:78
IfxHssl_getHsslGloabalErrorInterruptFlagStatus
IFX_INLINE boolean IfxHssl_getHsslGloabalErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag.
Definition: IfxHssl.h:837
IfxHssl_PllReferenceClock
IfxHssl_PllReferenceClock
PLL reference clock Definition in Ifx_HSCT.CONFIGPHY.B.OSCCLKEN.
Definition: IfxHssl.h:202
IfxHssl_setTimeoutReloadValue
IFX_INLINE void IfxHssl_setTimeoutReloadValue(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, uint8 timeoutValue)
Sets the Timeout Reload Value.
Definition: IfxHssl.h:908
IfxHssl_getHsslCOKSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsslCOKSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel.
Definition: IfxHssl.c:150
IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived
Unsolicited message received.
Definition: IfxHssl.h:143
IfxHssl_Hssl_ERRInterruptSource_unexpectedError
Unexpected error (triggers ERR interrupt)
Definition: IfxHssl.h:236
IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation
Memory Access Violation error (triggers EXI interrupt)
Definition: IfxHssl.h:244
IfxHssl_Hssl_ERRInterruptSource_transactionTagError
Transaction Tag Error (triggers ERR interrupt)
Definition: IfxHssl.h:234
IfxHssl_disableHsctReceivePath
IFX_INLINE void IfxHssl_disableHsctReceivePath(Ifx_HSCT *hsct)
Disable hsct receive path in master interface.
Definition: IfxHssl.h:956
IfxHssl_Command_noAction
command no action
Definition: IfxHssl.h:96
IfxHssl_MasterModeRxSpeed_mediumSpeed
medium speed
Definition: IfxHssl.h:186
IfxHssl_StreamingMode_single
streaming mode single (with one memory block)
Definition: IfxHssl.h:214
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxHssl_getHsslERRSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsslERRSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL ERR of specified channel.
Definition: IfxHssl.c:157
IfxHssl_Hsct_SleepMode_enable
enables sleep mode
Definition: IfxHssl.h:158
IfxHssl_setHsctTxLinkSpeed
IFX_INLINE void IfxHssl_setHsctTxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeTxSpeed txSpeed)
Set the HSCT TX link speed.
Definition: IfxHssl.h:932
IfxHssl_disableHsslModule
IFX_EXTERN void IfxHssl_disableHsslModule(Ifx_HSSL *hssl)
DIsables the hssl module.
Definition: IfxHssl.c:62
IfxHssl_ClockFrequencyRate_20Mhz
SysClk/ RefClk is 20 MHz (Divider 1/1)
Definition: IfxHssl.h:87
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxHssl_disableHsslChannelErrorInterruptFlag
IFX_INLINE void IfxHssl_disableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt.
Definition: IfxHssl.h:718
IfxHssl_Hsct_InterruptSource_payloadError
Payload error detected.
Definition: IfxHssl.h:137
IfxHssl_disableHsslGlobalErrorInterruptFlag
IFX_INLINE void IfxHssl_disableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Disables the HSSl channel error interrupt flag, which trggers the EXI interrupt.
Definition: IfxHssl.h:725
IfxHssl_getCurrentCount
IFX_INLINE uint16 IfxHssl_getCurrentCount(Ifx_HSSL *hssl)
Returns the Current Count value.
Definition: IfxHssl.h:819
IfxHssl_ControlCommand_enableReception
enable Slave interface transmitter
Definition: IfxHssl.h:114
IfxHssl_ControlCommand_highSpeedClockStart
slave interface clock multiplier start (in preparation for high speed mode)
Definition: IfxHssl.h:107
IfxHssl_ClockFrequencyRate
IfxHssl_ClockFrequencyRate
SysClk / Reference Clock Frequency rate Definition in Ifx_HSCT.INIT.B.SRCF.
Definition: IfxHssl.h:85
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxHssl_getHsslChannelErrorInterruptFlagStatus
IFX_INLINE boolean IfxHssl_getHsslChannelErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag.
Definition: IfxHssl.h:831
IfxHssl_enableHsslTRGInterrupt
IFX_INLINE void IfxHssl_enableHsslTRGInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL TRG interrupt of specified channel.
Definition: IfxHssl.h:804
IfxHssl_hsctIndex
IfxHssl_hsctIndex
List of the available Hsct resources.
Definition: IfxHssl_cfg.h:80
IfxHssl_Hsct::hsct
Ifx_HSCT * hsct
pointer to HSCT registers
Definition: IfxHssl.h:262
IfxHssl_setSuspendMode
IFX_INLINE void IfxHssl_setSuspendMode(Ifx_HSSL *hssl, IfxHssl_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxHssl.h:897
IfxHssl_enableHsslCOKInterrupt
IFX_INLINE void IfxHssl_enableHsslCOKInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL COK interrupt of specified channel.
Definition: IfxHssl.h:754
IfxHssl_ControlCommand_turnOnPayloadLoopback
turn on payload loopback
Definition: IfxHssl.h:118


iLLD_TC26B: IfxHssl_Hssl.c Source File

  • Hssl
  • Hssl
IfxHssl_Hssl.c
Go to the documentation of this file.
1 /**
2 * \file IfxHssl_Hssl.c
3 * \brief HSSL HSSL details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxHssl_Hssl.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxHssl_Hssl_checkErrors(IfxHssl_Hssl *hssl)
54 {
55 Ifx_HSSL *hsslSFR = hssl->hssl; /* pointer to HSSL registers */
56
57 /* store the errors in the structure */
58 if (hsslSFR->MFLAGS.B.NACK != 0)
59 {
60 hssl->errorFlags.notAcknowledgeError = 1;
61 }
62
63 if (hsslSFR->MFLAGS.B.TTE != 0)
64 {
65 hssl->errorFlags.transactionTagError = 1;
66 }
67
68 if (hsslSFR->MFLAGS.B.TIMEOUT != 0)
69 {
70 hssl->errorFlags.timeoutError = 1;
71 }
72
73 if (hsslSFR->MFLAGS.B.UNEXPECTED != 0)
74 {
75 hssl->errorFlags.unexpectedError = 1;
76 }
77
78 if (hsslSFR->MFLAGS.B.MAV != 0)
79 {
80 hssl->errorFlags.memoryAccessViolation = 1;
81 }
82
83 if (hsslSFR->MFLAGS.B.SRIE != 0)
84 {
85 hssl->errorFlags.busAccessError = 1;
86 }
87
88 if (hsslSFR->MFLAGS.B.PIE1 != 0)
89 {
90 hssl->errorFlags.channelNumberCodeError = 1;
91 }
92
93 if (hsslSFR->MFLAGS.B.PIE2 != 0)
94 {
95 hssl->errorFlags.dataLengthError = 1;
96 }
97
98 if (hsslSFR->MFLAGS.B.CRCE != 0)
99 {
100 hssl->errorFlags.crcError = 1;
101 }
102 }
103
104
105 void IfxHssl_Hssl_clearErrorFlags(IfxHssl_Hssl *hssl)
106 {
107 hssl->errorFlags.notAcknowledgeError = 0;
108 hssl->errorFlags.transactionTagError = 0;
109 hssl->errorFlags.timeoutError = 0;
110 hssl->errorFlags.unexpectedError = 0;
111 hssl->errorFlags.memoryAccessViolation = 0;
112 hssl->errorFlags.busAccessError = 0;
113 hssl->errorFlags.channelNumberCodeError = 0;
114 hssl->errorFlags.dataLengthError = 0;
115 hssl->errorFlags.crcError = 0;
116 }
117
118
119 void IfxHssl_Hssl_delay(IfxHssl_Hsct *hsct)
120 {
121 uint32 i;
122 IFX_UNUSED_PARAMETER(hsct);
123
124 for (i = 0; i < 8000; i++)
125 {
126 __nop();
127 }
128 }
129
130
131 void IfxHssl_Hssl_initChannel(IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
132 {
133 channel->hssl = channelConfig->hssl; /* adding HSSL register pointer to channel handle */
134 channel->hsct = channelConfig->hsct; /* adding HSCT register pointer to channel handle */
135
136 channel->channelId = channelConfig->channelId; /* adding channel id to channel handle */
137 channel->currentFrameRequest = IfxHssl_Hssl_FrameRequest_noAction; /* default request, no action */
138
139 channel->streamingModeOn = FALSE; /* command mode (used in waitAcknowledge function) */
140 channel->streamingMode = channelConfig->streamingMode; /* adding streaming mode to channel handle */
141 channel->loopBack = channelConfig->loopBack; /* adding loopback selection to channel handle */
142 }
143
144
145 void IfxHssl_Hssl_initChannelConfig(IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
146 {
147 channelConfig->hssl = hssl->hssl;
148 channelConfig->hsct = hsct->hsct;
149
150 channelConfig->channelId = IfxHssl_ChannelId_0; /* default channel 0 */
151 channelConfig->streamingMode = IfxHssl_StreamingMode_single; /* default streaming mode continuous */
152 channelConfig->loopBack = hsct->loopBack;
153 hssl->loopBack = hsct->loopBack; /* copy to hssl handle, used in trasfer apis */
154 }
155
156
157 void IfxHssl_Hssl_initHsctModule(IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
158 {
159 Ifx_HSCT *hsctSFR = config->hsct; /* pointer to HSCT registers */
160
161 hsct->hsct = hsctSFR; /* adding HSCT register pointer to module handle */
162 hsct->loopBack = config->loopBack; /* adding loopback selection to module handle */
163
164 #ifndef IFXHSSL_HSCT_DISABLE_PINCONFIG
165 /* Pad initialisiation */
166 IfxPort_setPinModeInput(&MODULE_P21, 2, IfxPort_InputMode_noPullDevice); /* RXDN */
167 IfxPort_setPinModeInput(&MODULE_P21, 3, IfxPort_InputMode_noPullDevice); /* RXDP */
168 IfxPort_setPinModeOutput(&MODULE_P21, 4, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general); /* TXDN */
169 IfxPort_setPinModeOutput(&MODULE_P21, 5, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general); /* TXDP */
170
171 /* select the clock direction */
172 if (config->interfaceMode == IfxHssl_InterfaceMode_master)
173 {
174 IfxPort_setPinModeOutput(&MODULE_P20, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_alt5); /* CLKOUT */
175 IfxPort_setPinPadDriver(&MODULE_P20, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);
176 }
177 else
178 {
179 IfxPort_setPinModeInput(&MODULE_P20, 0, IfxPort_InputMode_pullDown); /* CLKIN */
180 }
181
182 if (config->loopBack == FALSE)
183 /* LVDS configuration */
184 {
185 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
186 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
187
188 P21_LPCR1.B_P21.RDIS_CTRL = 1;
189 P21_LPCR1.B_P21.RX_DIS = 0;
190
191 P21_LPCR2.B.TDIS_CTRL = 1;
192 P21_LPCR2.B.TX_DIS = 0;
193 P21_LPCR2.B.TX_PD = 0;
194
195 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
196 }
197
198 #endif
199
200 /* HSCT initialisation */
201 IfxHssl_enableHsctModule(hsctSFR); /* enabling the HSCT module */
202
203 hsctSFR->IRQCLR.B.TXTECLR = 1; /* due to AI */
204
205 /* slave interface initialisation */
206 if (config->interfaceMode == IfxHssl_InterfaceMode_slave) /* slave mode initialisation */
207 {
208 hsctSFR->INIT.B.IFM = IfxHssl_InterfaceMode_slave; /* slave mode */
209 hsctSFR->INIT.B.SYS_CLK_EN = 0; /* disabling the system clock */
210 hsctSFR->INIT.B.SRCF = IfxHssl_ClockFrequencyRate_20Mhz; /* Reference Clock Frequency rate 20 MHz */
211 hsctSFR->CONFIGPHY.B.OSCCLKEN = IfxHssl_PllReferenceClock_hsctSystemClockInput; /* PLL reference clock is hsct system clock input */
212 hsctSFR->CONFIGPHY.B.PHYRST = 0; /* disable PHY reset */
213 hsctSFR->CONFIGPHY.B.PLLWMF = 16; /* PLL frequency control word multiplication factor */
214 }
215
216 /* master interface initialisation */
217 else /* master mode initialisation */
218 {
219 hsctSFR->INIT.B.IFM = IfxHssl_InterfaceMode_master; /* master mode */
220 hsctSFR->INIT.B.SYS_CLK_EN = 1; /* enabling the system clock */
221 hsctSFR->INIT.B.SRCF = IfxHssl_ClockFrequencyRate_20Mhz; /* Reference Clock Frequency rate 20 MHz */
222 hsctSFR->CONFIGPHY.B.OSCCLKEN = IfxHssl_PllReferenceClock_oscillatorInput; /* PLL reference clock is Oscillator input */
223 hsctSFR->CONFIGPHY.B.PHYRST = 0; /* disable PHY reset */
224 hsctSFR->CONFIGPHY.B.PLLPON = 1; /* PLL power on */
225 hsctSFR->CONFIGPHY.B.PLLWMF = 16; /* PLL frequency control word multiplication factor */
226 hsctSFR->IFCTRL.B.MTXSPEED = IfxHssl_MasterModeTxSpeed_lowSpeed; /* Tx low speed */
227 hsctSFR->IFCTRL.B.MRXSPEED = IfxHssl_MasterModeRxSpeed_lowSpeed; /* Rx low speed */
228
229 /* change from low speed to high speed */
230 if (config->highSpeedMode)
231 {
232 hsctSFR->IFCTRL.B.MTXSPEED = IfxHssl_MasterModeTxSpeed_highSpeed; /* Tx high speed */
233 hsctSFR->IFCTRL.B.MRXSPEED = IfxHssl_MasterModeRxSpeed_highSpeed; /* Rx high speed */
234 }
235
236 while (hsctSFR->STATPHY.B.PLOCK == 0) /* wait until pll is locked */
237 {}
238 }
239
240 hsctSFR->DISABLE.U = 0;
241 }
242
243
244 void IfxHssl_Hssl_initHsctModuleConfig(IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
245 {
246 config->hsct = hsct;
247
248 /* interface mode */
249 config->interfaceMode = IfxHssl_InterfaceMode_master;
250
251 /* high speed mode disabled */
252 config->highSpeedMode = FALSE;
253
254 config->loopBack = FALSE; /* default with out loopback */
255 }
256
257
258 void IfxHssl_Hssl_initHsslModule(IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
259 {
260 Ifx_HSSL *hsslSFR = config->hssl; /* pointer to HSSL registers */
261
262 hssl->hssl = hsslSFR; /* adding HSSL register pointer to module handle */
263
264 /* HSSL initialisation */
265 IfxHssl_enableHsslModule(hsslSFR); /* enabling the HSSL module */
266 hsslSFR->CFG.B.PREDIV = config->preDivider; /* predivivder */
267 hsslSFR->CFG.B.SCM = 0; /* command mode */
268
269 /* Access windows */
270 hsslSFR->AW[0].AWSTART.U = config->accessWindow0.start; /* start of access window */
271 hsslSFR->AW[0].AWEND.U = config->accessWindow0.end; /* end of access window */
272 hsslSFR->AW[1].AWSTART.U = config->accessWindow1.start; /* start of access window */
273 hsslSFR->AW[1].AWEND.U = config->accessWindow1.end; /* end of access window */
274 hsslSFR->AW[2].AWSTART.U = config->accessWindow2.start; /* start of access window */
275 hsslSFR->AW[2].AWEND.U = config->accessWindow2.end; /* end of access window */
276 hsslSFR->AW[3].AWSTART.U = config->accessWindow3.start; /* start of access window */
277 hsslSFR->AW[3].AWEND.U = config->accessWindow3.end; /* end of access window */
278
279 hsslSFR->AR.U = 0x000000ff; /* allow read/write access for all windows */
280
281 hsslSFR->MFLAGSCL.B.INIC = 1; /* chnage into run mode */
282 hsslSFR->TIDADD.U = (uint32)IFXHSSL_JTAG_ID_ADDRESS; /* Writing JTAG_ID of the device to TIDADD.This'll be used in the response when the other device queries for ID */
283
284 while (hsslSFR->MFLAGS.B.INI) /* wait until the mode changes */
285 {}
286 }
287
288
289 void IfxHssl_Hssl_initHsslModuleConfig(IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
290 {
291 config->hssl = hssl;
292
293 /* Access windows */
294 config->accessWindow0.start = 0x00000000; /* start of access window */
295 config->accessWindow0.end = 0xffffffff; /* end of access window */
296 config->accessWindow1.start = 0x00000000; /* start of access window */
297 config->accessWindow1.end = 0xffffffff; /* end of access window */
298 config->accessWindow2.start = 0x00000000; /* start of access window */
299 config->accessWindow2.end = 0xffffffff; /* end of access window */
300 config->accessWindow3.start = 0x00000000; /* start of access window */
301 config->accessWindow3.end = 0xffffffff; /* end of access window */
302
303 /* predivider */
304 config->preDivider = 256;
305 }
306
307
308 IfxHssl_Hssl_Status IfxHssl_Hssl_prepareStream(IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
309 {
310 IfxHssl_ChannelId channelId = channel->channelId;
311 Ifx_HSSL_TS_FC tsfcReg;
312
313 if (channelId == IfxHssl_ChannelId_2)
314 {
315 return IfxHssl_Hssl_Status_error;
316 }
317
318 /* target start address to memeroy block 0 on target device (writing into HSSL_TSSA0 of the target) */
319 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->TS.SA[0], slaveTargetAddress, IfxHssl_DataLength_32bit);
320
321 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
322 {
323 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
324 {
325 return IfxHssl_Hssl_Status_error;
326 }
327 }
328
329 /* Precautionary measure on target for any last streaming interruption */
330 /* Read count register on the target */
331 IfxHssl_Hssl_read(channel, (uint32)&channel->hssl->TS.FC, IfxHssl_DataLength_32bit);
332
333 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
334 {
335 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
336 {
337 return IfxHssl_Hssl_Status_error;
338 }
339 }
340
341 tsfcReg.U = IfxHssl_Hssl_getReadData(channel);
342 tsfcReg.B.RELCOUNT = tsfcReg.B.CURCOUNT;
343 /* Set the RELCOUNT equal to CURCOUNT on the target */
344 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->TS.FC, count, IfxHssl_DataLength_16bit);
345
346 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
347 {
348 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
349 {
350 return IfxHssl_Hssl_Status_error;
351 }
352 }
353
354 /* Disable the streaming on the target */
355 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->MFLAGSCL, (1 << IFX_HSSL_MFLAGSCL_TSEC_OFF), IfxHssl_DataLength_32bit);
356
357 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
358 {
359 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
360 {
361 return IfxHssl_Hssl_Status_error;
362 }
363 }
364
365 /* memory count into target reload count register on target device */
366 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->TS.FC, count, IfxHssl_DataLength_16bit);
367
368 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
369 {
370 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
371 {
372 return IfxHssl_Hssl_Status_error;
373 }
374 }
375
376 /* incase of transfers between two different devices (loopback off) */
377 if (!channel->loopBack)
378 {
379 /* Get the target configuration */
380 IfxHssl_Hssl_read(channel, (uint32)&channel->hssl->CFG, IfxHssl_DataLength_32bit);
381
382 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
383 {
384 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
385 {
386 return IfxHssl_Hssl_Status_error;
387 }
388 }
389
390 /* Check if the target streaming is enabled */
391 if ((IfxHssl_Hssl_getReadData(channel) & (0x00070100)) != 0x00070100)
392 {
393 /* enable streaming mode (single) of channel 2 on target device */
394 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->CFG, 0x00070100, IfxHssl_DataLength_32bit);
395
396 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
397 {
398 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
399 {
400 return IfxHssl_Hssl_Status_error;
401 }
402 }
403 }
404
405 /* enable streaming on target device */
406 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->MFLAGSSET, 0x10000000, IfxHssl_DataLength_32bit);
407
408 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
409 {
410 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
411 {
412 return IfxHssl_Hssl_Status_error;
413 }
414 }
415 }
416
417 channel->streamingModeOn = TRUE; /* for waitAcknowledge function */
418 /* preperation was successful */
419 return IfxHssl_Hssl_Status_ok;
420 }
421
422
423 IfxHssl_Hssl_Status IfxHssl_Hssl_read(IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
424 {
425 uint32 data = 0; /* not required, data will be read back */
426 return IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_readFrame, address, data, dataLength); /* initiate the read request */
427 }
428
429
430 void IfxHssl_Hssl_sendControlCommand(IfxHssl_Hsct *hsct, uint8 command)
431 {
432 Ifx_HSCT *hsctSFR = hsct->hsct;
433
434 hsctSFR->IFCTRL.B.IFCVS = command; /* write the command into the register */
435 hsctSFR->IFCTRL.B.SIFCV = 1; /* activate the command */
436
437 IfxHssl_Hssl_delay(hsct); /* wait until the change happens */
438 }
439
440
441 IfxHssl_Hssl_Status IfxHssl_Hssl_singleFrameRequest(IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
442 {
443 Ifx_HSSL_I *hsslI = (Ifx_HSSL_I *)&channel->hssl->I[channel->channelId];
444
445 if (channel->currentFrameRequest != IfxHssl_Hssl_FrameRequest_noAction)
446 {
447 return IfxHssl_Hssl_Status_busy;
448 }
449
450 hsslI->ICON.B.DATLEN = dataLength; /* 0x2 -> word size */
451 hsslI->ICON.B.TOREL = 0xff; /* max reload value */
452
453 switch (frameRequest)
454 {
455 case IfxHssl_Hssl_FrameRequest_readFrame:
456 hsslI->ICON.B.RWT = IfxHssl_Command_readFrame;
457 hsslI->IRWA.U = address;
458 break;
459 case IfxHssl_Hssl_FrameRequest_writeFrame:
460 hsslI->ICON.B.RWT = IfxHssl_Command_writeFrame;
461 hsslI->IWD.U = data;
462 hsslI->IRWA.U = address;
463 break;
464 case IfxHssl_Hssl_FrameRequest_triggerFrame:
465 hsslI->ICON.B.RWT = IfxHssl_Command_triggerFrame;
466 hsslI->IWD.U = data; /* dummy */
467 hsslI->IRWA.U = address; /* dummy */
468 break;
469 case IfxHssl_Hssl_FrameRequest_readId:
470 /* request an ID frame */
471 hsslI->ICON.B.IDQ = 1;
472 break;
473 default:
474 /* invalid request */
475 return IfxHssl_Hssl_Status_error;
476 }
477
478 channel->currentFrameRequest = frameRequest;
479
480 return IfxHssl_Hssl_Status_ok;
481 }
482
483
484 IfxHssl_Hssl_Status IfxHssl_Hssl_waitAcknowledge(IfxHssl_Hssl_Channel *channel)
485 {
486 uint32 requestType = channel->currentFrameRequest;
487 IfxHssl_ChannelId channelId = channel->channelId;
488
489 if ((channelId == IfxHssl_ChannelId_2) && (channel->hssl->CFG.B.SCM == 1))
490 {
491 while (channel->hssl->MFLAGS.B.ISB)
492 {
493 /* transfer in progress */
494 }
495 }
496 else
497 {
498 if (channel->currentFrameRequest == IfxHssl_Hssl_FrameRequest_writeFrame)
499 {
500 requestType = 1;
501 }
502
503 /* expect a read frame when requestType == IfxHssl_Hssl_FrameRequest_readId */
504 if ((channel->currentFrameRequest == IfxHssl_Hssl_FrameRequest_readFrame) || (channel->currentFrameRequest == IfxHssl_Hssl_FrameRequest_readId))
505 {
506 requestType = 2;
507 }
508
509 if (channel->currentFrameRequest == IfxHssl_Hssl_FrameRequest_triggerFrame)
510 {
511 requestType = 3;
512 }
513
514 uint32 qFlags = channel->hssl->QFLAGS.U;
515 uint32 mFlags = channel->hssl->MFLAGS.U;
516 uint32 acknwoledgeFlagsMask = ((requestType << (16 + (channel->channelId * 2))) | (1 << channel->channelId));
517 uint32 errorFlagsMask = ((0x03E00000) | (4369 << channel->channelId)); /* all the possible errors */
518
519 if (channel->hssl->I[channelId].ICON.B.BSY == 1)
520 {
521 return IfxHssl_Hssl_Status_busy;
522 }
523
524 if (qFlags & acknwoledgeFlagsMask) /* transfer in progress? */
525 {
526 return IfxHssl_Hssl_Status_busy; /* return busy status in case of no error */
527 }
528
529 if (mFlags & errorFlagsMask) /* check for errors */
530 {
531 channel->currentFrameRequest = IfxHssl_Hssl_FrameRequest_noAction;
532 return IfxHssl_Hssl_Status_error; /* return error status in case of an error */
533 }
534
535 /* transfer is finished */
536 channel->currentFrameRequest = IfxHssl_Hssl_FrameRequest_noAction;
537 }
538
539 return IfxHssl_Hssl_Status_ok;
540 }
541
542
543 IfxHssl_Hssl_Status IfxHssl_Hssl_write(IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
544 {
545 return IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, address, data, dataLength);
546 }
547
548
549 IfxHssl_Hssl_Status IfxHssl_Hssl_writeStream(IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
550 {
551 Ifx_HSSL *hsslSFR = hssl->hssl;
552 Ifx_HSSL_IS *hsslIS = (Ifx_HSSL_IS *)&hsslSFR->IS;
553 IfxHssl_StreamingMode streamingMode = IfxHssl_StreamingMode_single;
554
555 /* single memory block streaming */
556 hsslIS->SA[0].U = (uint32)data; /* initiator start address to memeroy block 0 */
557
558 hsslIS->FC.B.RELCOUNT = count; /* memory count into initiator reload count register */
559
560 hsslSFR->CFG.B.SCM = 1; /* enable streaming mode of channel 2 on the initiator */
561 hsslSFR->CFG.B.SMT = streamingMode; /* set transmitter streaming mode ( single / continuous ) on the initiator */
562 hsslSFR->CFG.B.SMR = streamingMode; /* set receiver streaming mode ( single / continuous ) on the initiator */
563 /* streaming is supported only on IfxHssl_ChannelId_2 */
564 hsslSFR->I[IfxHssl_ChannelId_2].ICON.B.TOREL = 0xff; /* set the transmitter reload value to 0xff.*/
565
566 /* incase of transfers within the device(loopback on) */
567 if (hssl->loopBack)
568 {
569 hsslSFR->MFLAGSSET.B.TSES = 1; /* enable target */
570 }
571
572 /* initiate the transfer */
573 hsslSFR->MFLAGSSET.B.ISBS = 1;
574
575 /* streaming started */
576 return IfxHssl_Hssl_Status_ok;
577 }
IfxHssl_ChannelId
IfxHssl_ChannelId
channel selection
Definition: IfxHssl.h:74
IfxHssl_Hssl_Channel::channelId
IfxHssl_ChannelId channelId
channel number (id)
Definition: IfxHssl_Hssl.h:517
IfxHssl_Hssl_Config
configuration structure of the HSSL module
Definition: IfxHssl_Hssl.h:537
IfxHssl_Hssl_AccessWindow::start
uint32 start
start of the access
Definition: IfxHssl_Hssl.h:479
IfxHssl_MasterModeTxSpeed_lowSpeed
low speed
Definition: IfxHssl.h:195
IfxHssl_Hssl_initChannel
void IfxHssl_Hssl_initChannel(IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
Initialises the channel.
Definition: IfxHssl_Hssl.c:131
IfxHssl_StreamingMode
IfxHssl_StreamingMode
streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR
Definition: IfxHssl.h:211
IfxHssl_Hssl_initHsctModuleConfig
void IfxHssl_Hssl_initHsctModuleConfig(IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
Fills the config structure with default values.
Definition: IfxHssl_Hssl.c:244
IfxHssl_Hssl_errorFlags::transactionTagError
uint8 transactionTagError
transaction tag error
Definition: IfxHssl_Hssl.h:490
IfxHssl_Hssl_errorFlags::unexpectedError
uint8 unexpectedError
unexpected type of frame error
Definition: IfxHssl_Hssl.h:492
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:133
IfxHssl_Hssl_Channel::currentFrameRequest
IfxHssl_Hssl_FrameRequest currentFrameRequest
current frame request
Definition: IfxHssl_Hssl.h:518
IfxHssl_Hssl_initHsctModule
void IfxHssl_Hssl_initHsctModule(IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
Initialises the module.
Definition: IfxHssl_Hssl.c:157
IfxHssl_PllReferenceClock_oscillatorInput
oscillator input
Definition: IfxHssl.h:205
IfxHssl_Hssl_delay
void IfxHssl_Hssl_delay(IfxHssl_Hsct *hsct)
a simple software delay
Definition: IfxHssl_Hssl.c:119
IfxHssl_enableHsslModule
void IfxHssl_enableHsslModule(Ifx_HSSL *hssl)
Enables the hssl module.
Definition: IfxHssl.c:80
IfxHssl_Hsct_Config::interfaceMode
IfxHssl_InterfaceMode interfaceMode
interface mode (master IF /slave IF)
Definition: IfxHssl.h:271
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxHssl_Hsct::loopBack
boolean loopBack
loopc back selection
Definition: IfxHssl.h:263
IfxHssl_MasterModeRxSpeed_lowSpeed
low speed
Definition: IfxHssl.h:185
IfxHssl_Hssl_Config::preDivider
uint16 preDivider
Defines the down-scaled module clock to be used by all channel timeout timers.
Definition: IfxHssl_Hssl.h:544
IfxHssl_Hssl_initChannelConfig
void IfxHssl_Hssl_initChannelConfig(IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
Fills the channel config structure with default values.
Definition: IfxHssl_Hssl.c:145
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxHssl_Hsct
HSCT module handle.
Definition: IfxHssl.h:260
IfxHssl_enableHsctModule
void IfxHssl_enableHsctModule(Ifx_HSCT *hsct)
Enables hsct module.
Definition: IfxHssl.c:71
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxHssl_ChannelId_0
Channel 0.
Definition: IfxHssl.h:76
IfxHssl_Hssl_FrameRequest_readFrame
read frame rquest
Definition: IfxHssl_Hssl.h:451
IfxHssl_Hssl_errorFlags::busAccessError
uint8 busAccessError
SRI/SPB bus access error.
Definition: IfxHssl_Hssl.h:494
IfxHssl_Hssl_FrameRequest_writeFrame
write frame rquest
Definition: IfxHssl_Hssl.h:452
IfxHssl_Hssl_write
IfxHssl_Hssl_Status IfxHssl_Hssl_write(IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
writes single frame of data into the specified address
Definition: IfxHssl_Hssl.c:543
IfxHssl_Hssl_initHsslModule
void IfxHssl_Hssl_initHsslModule(IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
Initialises the Hssl module.
Definition: IfxHssl_Hssl.c:258
IfxHssl_InterfaceMode_master
master IF mode
Definition: IfxHssl.h:176
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxHssl_Hssl_errorFlags::notAcknowledgeError
uint8 notAcknowledgeError
not acknowledge error / tag error
Definition: IfxHssl_Hssl.h:489
IfxHssl_Hssl_FrameRequest_readId
read id request
Definition: IfxHssl_Hssl.h:454
IfxHssl_Hssl_Channel
channel handle
Definition: IfxHssl_Hssl.h:513
IfxHssl_Hssl_errorFlags::channelNumberCodeError
uint8 channelNumberCodeError
PHY inconsistency error 1 (channel number code error)
Definition: IfxHssl_Hssl.h:495
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxHssl_Hssl_FrameRequest_noAction
no action
Definition: IfxHssl_Hssl.h:455
IfxHssl_Hssl_errorFlags::timeoutError
uint8 timeoutError
timeout error
Definition: IfxHssl_Hssl.h:491
IfxPort_OutputIdx_general
Definition: IfxPort.h:119
IfxHssl_Hssl_Config::accessWindow0
IfxHssl_Hssl_AccessWindow accessWindow0
access window of channel 0
Definition: IfxHssl_Hssl.h:540
IfxHssl_Hssl_prepareStream
IfxHssl_Hssl_Status IfxHssl_Hssl_prepareStream(IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
Prepares the target device for streaming.
Definition: IfxHssl_Hssl.c:308
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:144
IfxHssl_Hssl::hssl
Ifx_HSSL * hssl
pointer to HSSL register
Definition: IfxHssl_Hssl.h:506
IfxHssl_Hssl_sendControlCommand
void IfxHssl_Hssl_sendControlCommand(IfxHssl_Hsct *hsct, uint8 command)
sends a predefined command from master to slave
Definition: IfxHssl_Hssl.c:430
IfxHssl_Command_writeFrame
command write frame
Definition: IfxHssl.h:98
IfxHssl_Hssl_errorFlags::dataLengthError
uint8 dataLengthError
PHY inconsistency error 2 (data length error)
Definition: IfxHssl_Hssl.h:496
IfxHssl_Hssl_Channel::hsct
Ifx_HSCT * hsct
pointer to HSCT registers
Definition: IfxHssl_Hssl.h:516
IfxHssl_PllReferenceClock_hsctSystemClockInput
hsct system clock input (HSCT SysClk_i)
Definition: IfxHssl.h:204
IfxHssl_Hssl_Status_ok
status ok
Definition: IfxHssl_Hssl.h:462
IfxHssl_Hssl_ChannelConfig
configuration structure for channel
Definition: IfxHssl_Hssl.h:526
IFXHSSL_JTAG_ID_ADDRESS
#define IFXHSSL_JTAG_ID_ADDRESS
Definition: IfxHssl_cfg.h:70
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:83
IfxHssl_InterfaceMode_slave
slave IF mode
Definition: IfxHssl.h:177
IfxHssl_Hssl_checkErrors
void IfxHssl_Hssl_checkErrors(IfxHssl_Hssl *hssl)
stores the status of errors in the respective members of the error flags structure ...
Definition: IfxHssl_Hssl.c:53
IfxHssl_Hssl
HSSL Handle.
Definition: IfxHssl_Hssl.h:504
IfxHssl_Command_triggerFrame
command trigger frame
Definition: IfxHssl.h:99
IfxHssl_DataLength
IfxHssl_DataLength
Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL...
Definition: IfxHssl.h:124
IfxHssl_Hssl_writeStream
IfxHssl_Hssl_Status IfxHssl_Hssl_writeStream(IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
transfers one memory block of data useful for transfering huge data from one location to another and ...
Definition: IfxHssl_Hssl.c:549
IfxHssl_MasterModeTxSpeed_highSpeed
high speed
Definition: IfxHssl.h:196
IfxHssl_DataLength_16bit
16 bit
Definition: IfxHssl.h:127
IfxHssl_Hssl.h
HSSL HSSL details.
IfxHssl_Hsct_Config::highSpeedMode
boolean highSpeedMode
high speed mode selection
Definition: IfxHssl.h:272
IfxHssl_DataLength_32bit
32 bit
Definition: IfxHssl.h:128
IfxHssl_Hssl_Status_error
status error
Definition: IfxHssl_Hssl.h:464
IfxHssl_Hssl_Config::accessWindow1
IfxHssl_Hssl_AccessWindow accessWindow1
access window of channel 1
Definition: IfxHssl_Hssl.h:541
IfxHssl_MasterModeRxSpeed_highSpeed
high speed
Definition: IfxHssl.h:187
IfxPort_InputMode_pullDown
Definition: IfxPort.h:84
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxHssl_Hssl_read
IfxHssl_Hssl_Status IfxHssl_Hssl_read(IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
Initiates read request.
Definition: IfxHssl_Hssl.c:423
IfxHssl_Hsct_Config
Configuration structure of the HSCT module.
Definition: IfxHssl.h:268
IfxHssl_Hssl_Status_busy
status busy
Definition: IfxHssl_Hssl.h:463
IfxHssl_Hssl_FrameRequest_triggerFrame
trigger frame rquest
Definition: IfxHssl_Hssl.h:453
IfxHssl_Command_readFrame
command read frame
Definition: IfxHssl.h:97
IfxHssl_ChannelId_2
Channel 2.
Definition: IfxHssl.h:78
IfxHssl_Hssl_Channel::loopBack
boolean loopBack
loopback (enable / disable) for streaming transfers within the microcontroller
Definition: IfxHssl_Hssl.h:520
IfxHssl_Hssl_getReadData
IFX_INLINE uint32 IfxHssl_Hssl_getReadData(IfxHssl_Hssl_Channel *channel)
reads and returs the data
Definition: IfxHssl_Hssl.h:770
IfxHssl_StreamingMode_single
streaming mode single (with one memory block)
Definition: IfxHssl.h:214
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:124
IfxHssl_Hssl_initHsslModuleConfig
void IfxHssl_Hssl_initHsslModuleConfig(IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
Fills the config structure with default values.
Definition: IfxHssl_Hssl.c:289
IfxHssl_Hssl_singleFrameRequest
IfxHssl_Hssl_Status IfxHssl_Hssl_singleFrameRequest(IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
serves the frame request (read, write, trigger frame and read id)
Definition: IfxHssl_Hssl.c:441
IfxHssl_Hssl_AccessWindow::end
uint32 end
end of the access
Definition: IfxHssl_Hssl.h:480
TRUE
#define TRUE
Definition: Platform_Types.h:90
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxHssl_ClockFrequencyRate_20Mhz
SysClk/ RefClk is 20 MHz (Divider 1/1)
Definition: IfxHssl.h:87
IfxHssl_Hssl_FrameRequest
IfxHssl_Hssl_FrameRequest
frame request selection
Definition: IfxHssl_Hssl.h:449
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxHssl_Hssl::errorFlags
IfxHssl_Hssl_errorFlags errorFlags
structure for error flags
Definition: IfxHssl_Hssl.h:507
IfxHssl_Hssl_waitAcknowledge
IfxHssl_Hssl_Status IfxHssl_Hssl_waitAcknowledge(IfxHssl_Hssl_Channel *channel)
waits until the current transaction is done
Definition: IfxHssl_Hssl.c:484
IfxHssl_Hssl_Channel::streamingModeOn
boolean streamingModeOn
streaming mode or command mode
Definition: IfxHssl_Hssl.h:521
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxHssl_Hssl_errorFlags::memoryAccessViolation
uint8 memoryAccessViolation
memory access violation
Definition: IfxHssl_Hssl.h:493
IfxHssl_Hssl_errorFlags::crcError
uint8 crcError
CRC error.
Definition: IfxHssl_Hssl.h:497
IfxHssl_Hssl_Status
IfxHssl_Hssl_Status
module status
Definition: IfxHssl_Hssl.h:460
IfxHssl_Hssl_Channel::streamingMode
IfxHssl_StreamingMode streamingMode
streaming mode selection ( single / continuous )
Definition: IfxHssl_Hssl.h:519
IfxHssl_Hssl_clearErrorFlags
void IfxHssl_Hssl_clearErrorFlags(IfxHssl_Hssl *hssl)
clears the status of members in the error flags structure
Definition: IfxHssl_Hssl.c:105
IfxHssl_Hsct::hsct
Ifx_HSCT * hsct
pointer to HSCT registers
Definition: IfxHssl.h:262
IfxHssl_Hssl_Config::accessWindow2
IfxHssl_Hssl_AccessWindow accessWindow2
access window of channel 2
Definition: IfxHssl_Hssl.h:542
IfxHssl_Hssl_Config::accessWindow3
IfxHssl_Hssl_AccessWindow accessWindow3
access window of channel 3
Definition: IfxHssl_Hssl.h:543


iLLD_TC26B: IfxHssl_Hssl.h Source File

  • Hssl
  • Hssl
IfxHssl_Hssl.h
Go to the documentation of this file.
1 /**
2 * \file IfxHssl_Hssl.h
3 * \brief HSSL HSSL details
4 * \ingroup IfxLld_Hssl
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Hssl_Hssl_Usage How to use the HSSL Interface driver?
43 * \ingroup IfxLld_Hssl
44 *
45 * The HSSL interface driver provides a default HSSL/HSCT configuration for point to point communication at two transfer speeds, 5MBaud (low speed) and 320MBaud (high speed).
46 * It also supports streaming transfers of data a memory block at both low and high speeds.
47 *
48 * In the following sections it will be described, how to integrate the driver into the application framework.
49 *
50 * \section IfxLld_Hssl_Hssl_Preparation Preparation
51 * \subsection IfxLld_Hssl_Hssl_Include Include Files
52 *
53 * Include following header file into your C code:
54 * \code
55 * #include <Hssl/Hssl/IfxHssl_Hssl.h>
56 * \endcode
57 *
58 * \subsection IfxLld_Hssl_Hssl_Variables Variables
59 *
60 * Declare the HSSL handle, HSCT handle and channel array as global variables in your C code:
61 *
62 * \code
63 * // used globally
64 * static IfxHssl_Hssl hssl;
65 * static IfxHssl_Hsct hsct;
66 * IfxHssl_Hssl_Channel hsslChannel[4];
67 * __attribute__ ((aligned(256))) uint32 txData[80]; // needs to be declared globally in case of streaming transfers
68 * \endcode
69 *
70 * \subsection IfxLld_Hssl_Hssl_InitModule Module Initialisation
71 *
72 * The module initialisation can be done as follows:
73 *
74 * \code
75 * // create module config
76 * IfxHssl_Hsct_Config hsctConfig;
77 * IfxHssl_Hssl_initHsctModuleConfig(&hsctConfig, &MODULE_HSCT);
78 *
79 * // select the interface mode (in case of slave)
80 * hsctConfig.interfaceMode = IfxHssl_InterfaceMode_slave;
81 *
82 * // select the high speed mode if required
83 * hsctConfig.highSpeedMode = TRUE;
84 *
85 * // initialize module
86 * // IfxHssl_Hsct hsct; defined globally
87 * IfxHssl_Hssl_initHsctModule(&hsct, &hsctConfig);
88 *
89 * // create module config
90 * IfxHssl_Hssl_Config hsslConfig;
91 * IfxHssl_Hssl_initHsslModuleConfig(&hsslConfig, &MODULE_HSSL);
92 *
93 * // IfxHssl_Hssl hssl; defined globally
94 * IfxHssl_Hssl_initHsslModule(&hssl, &hsslConfig);
95 * \endcode
96 *
97 * If application intends to explicitly configure the pins for HSCT module IFXHSSL_HSCT_DISABLE_PINCONFIG macro should be defined in the application.
98 * The explicit pin assignment should be done prior to IfxHssl_Hssl_initHsctModule().
99 *
100 * \subsection IfxLld_Hssl_Hssl_InitChannel Channel Initialisation
101 *
102 * The Channel initialisation can be done as follows:
103 *
104 * \code
105 * // create HSSL channel config
106 * IfxHssl_Hssl_ChannelConfig hsslChannelConfig;
107 * IfxHssl_Hssl_initChannelConfig(&hsslChannelConfig, &hssl, &hsct);
108 *
109 * // initialize the channels
110 * // IfxHssl_Hssl_Channel hsslChannel[4]; defined globally
111 * for(int i=0; i<4; ++i)
112 * {
113 * hsslChannelConfig.channelId = (IfxHssl_ChannelId)i;
114 * IfxHssl_Hssl_initChannel(&hsslChannel[i], &hsslChannelConfig);
115 * }
116 * \endcode
117 *
118 * \subsection IfxLld_Hssl_Hssl_LinkSpeed Changing HSCT link speed
119 *
120 * The link speed change can be done as follows
121 *
122 * As per the above settings the HSCT master is in High speed reception and transmission.
123 *
124 * The pseudo code for setting the target to High speed is as below
125 *
126 * \code
127 *
128 * // Set the Tx link speed of the master to Low speed
129 * IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_lowSpeed);
130 *
131 * // Enable reception at the Slave
132 * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_enableReception);
133 *
134 * // Send interface commmand to change Rx to High speed at the target
135 * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_highSpeedReception);
136 *
137 * // Send interface commmand to change Tx to High speed at the target
138 * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_highSpeedTransmission);
139 *
140 * // Set the Tx link speed of the master to High speed
141 * IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_highSpeed);
142 *
143 * \endcode
144 *
145 * The pseudo code for setitng the target to Low speed from High speed (ie. if hsctConfig.highSpeedMode is set to TRUE).
146 *
147 * \code
148 *
149 * // Set the Tx link speed of master to Low speed
150 * IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_lowSpeed);
151 *
152 * // Send interface command to change Rx to low speed at the target
153 * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_lowSpeedReception);
154 *
155 * // Set the Rx link speed of master to Low speed
156 * IfxHssl_setHsctRxLinkSpeed(&hsct, IfxHssl_MasterModeRxSpeed_lowSpeed);
157 *
158 * // Send interface command to change Tx to low speed at the target
159 * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_lowSpeedTransmission);
160 *
161 * \endcode
162 *
163 * The HSSL is ready for use now!
164 *
165 *
166 * \section IfxLld_Hssl_Hssl_DataTransfers Data Transfers
167 * \subsection IfxLld_Hssl_Hssl_SimpleTransfers Simple Transfers
168 *
169 * The HSSL driver provides simple to use data transfer functions,
170 *
171 * It supports direct writing of 8/16/32 bit data from the initiator into a target's register, as well as reading a value from the target
172 *
173 * \code
174 * // write some data to remote location:
175 * IfxHssl_Hssl_write(&hsslChannel[0], 0x70000000, 0x12345678, IfxHssl_DataLength_32bit);
176 *
177 * // wait for the acknowledgement
178 * while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) != IfxHssl_Hssl_Status_ok )
179 * {
180 * if( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) == IfxHssl_Hssl_Status_error )
181 * {
182 * IfxHssl_Hssl_checkErrors(&hssl);
183 * break;
184 * }
185 * }
186 * \endcode
187 *
188 * A simple to use receive function is available as well.
189 *
190 * \code
191 * // read some data from remote location:
192 * IfxHssl_Hssl_read(&hsslChannel[0], 0x70000000, IfxHssl_DataLength_32bit);
193 *
194 * // wait for the acknowledgement
195 * while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) != IfxHssl_Hssl_Status_ok )
196 * {
197 * if( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) == IfxHssl_Hssl_Status_error )
198 * {
199 * IfxHssl_Hssl_checkErrors(&hssl);
200 * break;
201 * }
202 * }
203 *
204 * // read data from the register
205 * uint32 dataL = IfxHssl_Hssl_getReadData(&hsslChannel[0]);
206 * \endcode
207 *
208 * \subsection IfxLld_Hssl_Hssl_StreamingTransfers Streaming Transfers
209 *
210 * HSSL driver also supports streaming transfers of data as a memory block at both low and high speeds.
211 *
212 * Preparing the target for streaming with the desired memory location where the data needs to be transfered
213 *
214 * \code
215 * // choose a channel other than channel2 for register access
216 * // prepare streaming of single memory block
217 * IfxHssl_Hssl_prepareStream(&hsslChannel[0], 0x70000000, 10);
218 * \endcode
219 *
220 * Stream the memory block
221 *
222 * Usage Example:
223 * \code
224 * // __attribute__ ((aligned(256))) uint32 txData[80]; expected to be declared globally
225 *
226 * // for single block streaming transfer
227 * // change the txData address to global address before passing it to the API
228 *
229 * // IfxHssl_Hssl_writeStream(&hssl, (uint32 *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)txData), 10);
230 *
231 * IfxHssl_Hssl_writeStream(&hssl, txData, 10);
232 *
233 * // wait until the streaming is finished
234 * while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[2]) != IfxHssl_Hssl_Status_ok )
235 * {}
236 * \endcode
237 *
238 * \subsection IfxLld_Hssl_Hssl_DMAOperatedCommandQueues DMA Operated Command Queues
239 *
240 * It makes sense to do this from outside the driver, by initialising the DMA after HSSL, and send command queues through linked lists
241 * here is an example of how to use DMA operated command queues.
242 *
243 *
244 * Include following header files into your C code:
245 * \code
246 * #include <Hssl/Hssl/IfxHssl_Hssl.h>
247 * #include <Dma/Dma/IfxDma_Dma.h>
248 * #include <Scu/Std/IfxScuWdt.h>
249 * \endcode
250 *
251 * Declare the HSSL handle, HSCT handle, HSSL channel handle and DMA channel handle as global variables in your C code:
252 *
253 * \code
254 * // used globally
255 * static IfxHssl_Hssl hssl;
256 * static IfxHssl_Hsct hsct;
257 * IfxHssl_Hssl_Channel hsslChannel;
258 * // DMA channel handle
259 * IfxDma_Dma_Channel chn;
260 *
261 * // Linked List storage
262 * // IMPORTANT: it has to be aligned to an 64bit address, otherwise DMA can't read it
263 * #define NUM_LINKED_LIST_ITEMS 3
264 * __attribute__ ((aligned(64))) Ifx_DMA_CH linkedList[NUM_LINKED_LIST_ITEMS] ;
265 * // transfer these values to channel 0 : HSSL_IWD0, HSSL_ICON0, HSSL_IRWA0 registers via linked lists
266 * #define NUM_TRANSFERED_WORDS 3
267 * // three write command queues with different data and to different addresses on slave
268 * uint32 sourceBuffer[NUM_LINKED_LIST_ITEMS][NUM_TRANSFERED_WORDS] = {
269 * {0xC0CAC01A, 0xFF0A0000, 0x70000000},
270 * {0xBA5EBA11, 0xFF0A0000, 0x70000010},
271 * {0xDEADBEEF, 0xFF0A0000, 0x70000020}
272 * };
273 *
274 * // three command queues to the same channel 0
275 * const uint32 destinationAddresses[NUM_LINKED_LIST_ITEMS] = {
276 * (uint32)&HSSL_I0_IWD,
277 * (uint32)&HSSL_I0_IWD,
278 * (uint32)&HSSL_I0_IWD
279 * };
280 * \endcode
281 *
282 * Initialise the hssl module, see \ref IfxLld_Hssl_Hssl_InitModule
283 *
284 * Initialise the hssl channel
285 *
286 * \code
287 * // create HSSL channel config
288 * IfxHssl_Hssl_ChannelConfig hsslChannelConfig;
289 * IfxHssl_Hssl_initChannelConfig(&hsslChannelConfig, &hssl, &hsct);
290 *
291 * // initialize the channel 0
292 * // IfxHssl_Hssl_Channel hsslChannel; defined globally
293 * hsslChannelConfig.channelId = 0;
294 * IfxHssl_Hssl_initChannel(&hsslChannel, &hsslChannelConfig);
295 * \endcode
296 *
297 * Build a linked list
298 *
299 * \code
300 * // create module config
301 * IfxDma_Dma_Config dmaConfig;
302 * IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
303 * // initialize module
304 * IfxDma_Dma dma;
305 * IfxDma_Dma_initModule(&dma, &dmaConfig);
306 * // initial channel configuration
307 * IfxDma_Dma_ChannelConfig cfg;
308 * IfxDma_Dma_initChannelConfig(&cfg, &dma);
309 * // following settings are used by all transactions
310 * cfg.transferCount = NUM_TRANSFERED_WORDS;
311 * cfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
312 * cfg.moveSize = IfxDma_ChannelMoveSize_32bit;
313 * cfg.shadowControl = IfxDma_ChannelShadow_linkedList;
314 * // generate linked list items
315 * for(int i=0; i<NUM_LINKED_LIST_ITEMS; ++i) {
316 * cfg.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i]);
317 * cfg.destinationAddress = destinationAddresses[i];
318 * // address to next transaction set
319 * cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)&linkedList[(i + 1) % NUM_LINKED_LIST_ITEMS]);
320 * // transfer first transaction set into DMA channel
321 * if( i == 0 ) {
322 * IfxDma_Dma_initChannel(&chn, &cfg);
323 * }
324 * // transfer into linked list storage
325 * IfxDma_Dma_initLinkedListEntry((void *)&linkedList[i], &cfg);
326 * if( i == 0 ) {
327 * // - trigger channel interrupt once the first transaction set has been loaded (again) into DMA channel
328 * linkedList[i].CHCSR.B.SIT = 1;
329 * } else {
330 * // - activate SCH (transaction request) for each entry, expect for the first one (linked list terminated here)
331 * linkedList[i].CHCSR.B.SCH = 1;
332 * }
333 * }
334 * \endcode
335 *
336 * The transfer can be started via software with:
337 *
338 * \code
339 * // clear service request flag
340 * (IfxDma_Dma_getSrcPointer(&chn))->B.CLRR = 1;
341 * // start linked list transaction
342 * IfxDma_Dma_startChannelTransaction(&chn);
343 * // wait for service request which is triggered at the end of linked list transfers
344 * while( !(IfxDma_Dma_getSrcPointer(&chn))->B.SRR );
345 * \endcode
346 *
347 * \subsection IfxLld_Hssl_Hssl_Interrupts Interrupts usage
348 *
349 * Interrupts can be enabled from the application by using the APIs provided in the driver,
350 * there are APIs available in the driver to enable, disable, clear and read the status of interrupt falgs, along with these,\n
351 * APIs to enable the the enterrupts are also available.
352 *
353 * here is an example of how to use the interrupts in HSSL driver.
354 *
355 * Using HSCT interrupts
356 *
357 * After initialising HSCT module \ref IfxLld_Hssl_Hssl_InitModule
358 *
359 * choose what flags needs to be enabled for HSCT interrupt and call the following function once for each flag by choosing the right flag as parameter,\n
360 * and after choosing all the flags needed, enable the HSCT interrupt with desired type of service and priority.
361 *
362 * \code
363 * Ifx_HSCT *hsct = &MODULE_HSCT;
364 * IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_headerError);
365 * IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_payloadError);
366 * IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_commandError);
367 * IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_speedModeSwitchError);
368 *
369 * // enable the HSCT interrupt
370 * IfxHssl_enableHsctInterrupt(hsct, IfxSrc_Tos_cpu0, 4);
371 * \endcode
372 *
373 * Using HSSl interrupts
374 *
375 * HSSL global error interrupt (EXI)
376 *
377 * After initilaising HSSL module \ref IfxLld_Hssl_Hssl_InitModule
378 *
379 * choose what flags needs to be enabled for HSSL global error (EXI) interrupt and call the following function once for each flag by choosing the right flag as parameter,\n
380 * and after choosing all the flags needed, enable the HSSL EXI interrupt with desired type of service and priority
381 *
382 * \code
383 * Ifx_HSSL *hssl = &MODULE_HSSL;
384 * IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_busAccessError);
385 * IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_dataLengthError);
386 * IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_crcError);
387 *
388 *
389 * // enable the HSSL EXI interrupt
390 * IfxHssl_enableHsslEXIInterrupt(hssl, IfxSrc_Tos_cpu0, 6);
391 * \endcode
392 *
393 * HSSL channel specific error interrupt (ERR)
394 *
395 * After initilaising HSSL channel \ref IfxLld_Hssl_Hssl_InitChannel
396 *
397 * choose what flags needs to be enabled for HSSL channel specific error (ERR) interrupt and call the following function once for each flag by choosing the right flag as parameter,\n
398 * and after choosing all the flags needed, enable the HSSL ERR interrupt with desired channel, type of service and priority
399 *
400 * \code
401 * Ifx_HSSL *hssl = &MODULE_HSSL;
402 * IfxHssl_enableHsslChannelErrorInterruptFlag(hssl, channelId_0, IfxHssl_Hssl_ERRInterruptSource_transactionTagError);
403 * IfxHssl_enableHsslChannelErrorInterruptFlag(hssl, channelId_0, IfxHssl_Hssl_ERRInterruptSource_timeoutError);
404 *
405 * // enable the HSSL ERR interrupt
406 * IfxHssl_enableHsslERRInterrupt(hssl, channelId_0, IfxSrc_Tos_cpu0, 8);
407 * \endcode
408 *
409 * you can define the ISR of your own and service the interrupt, please refer to more general usage of interrupts \ref IfxLld_Cpu_Irq_Usage
410 *
411 * some additional APIs to clear, disable interrupt flags and get flag status are also available.
412 *
413 * \defgroup IfxLld_Hssl_Hssl HSSL
414 * \ingroup IfxLld_Hssl
415 * \defgroup IfxLld_Hssl_Hssl_DataStructures Data Structures
416 * \ingroup IfxLld_Hssl_Hssl
417 * \defgroup IfxLld_Hssl_Hssl_Enumerations Enumerations
418 * \ingroup IfxLld_Hssl_Hssl
419 * \defgroup IfxLld_Hssl_Hssl_ModuleFunctions Module Functions
420 * \ingroup IfxLld_Hssl_Hssl
421 * \defgroup IfxLld_Hssl_Hssl_ChannelFunctions Channel Functions
422 * \ingroup IfxLld_Hssl_Hssl
423 * \defgroup IfxLld_Hssl_Hssl_SimpleCom Simple Communication
424 * \ingroup IfxLld_Hssl_Hssl
425 * \defgroup IfxLld_Hssl_Hssl_ErrorHandling Error Handling
426 * \ingroup IfxLld_Hssl_Hssl
427 * \defgroup IfxLld_Hssl_Hssl_StreamingCom Streaming Communication
428 * \ingroup IfxLld_Hssl_Hssl
429 */
430
431 #ifndef IFXHSSL_HSSL_H
432 #define IFXHSSL_HSSL_H 1
433
434 /******************************************************************************/
435 /*----------------------------------Includes----------------------------------*/
436 /******************************************************************************/
437
438 #include "Hssl/Std/IfxHssl.h"
439 #include "Port/Std/IfxPort.h"
440
441 /******************************************************************************/
442 /*--------------------------------Enumerations--------------------------------*/
443 /******************************************************************************/
444
445 /** \addtogroup IfxLld_Hssl_Hssl_Enumerations
446 * \{ */
447 /** \brief frame request selection
448 */
449 typedef enum
450 {
451 IfxHssl_Hssl_FrameRequest_readFrame = 1, /**< \brief read frame rquest */
452 IfxHssl_Hssl_FrameRequest_writeFrame = 2, /**< \brief write frame rquest */
453 IfxHssl_Hssl_FrameRequest_triggerFrame = 3, /**< \brief trigger frame rquest */
454 IfxHssl_Hssl_FrameRequest_readId = 4, /**< \brief read id request */
455 IfxHssl_Hssl_FrameRequest_noAction = 5 /**< \brief no action */
456 } IfxHssl_Hssl_FrameRequest;
457
458 /** \brief module status
459 */
460 typedef enum
461 {
462 IfxHssl_Hssl_Status_ok = 0, /**< \brief status ok */
463 IfxHssl_Hssl_Status_busy = 1, /**< \brief status busy */
464 IfxHssl_Hssl_Status_error = 2 /**< \brief status error */
465 } IfxHssl_Hssl_Status;
466
467 /** \} */
468
469 /******************************************************************************/
470 /*-----------------------------Data Structures--------------------------------*/
471 /******************************************************************************/
472
473 /** \addtogroup IfxLld_Hssl_Hssl_DataStructures
474 * \{ */
475 /** \brief structure for access windows
476 */
477 typedef struct
478 {
479 uint32 start; /**< \brief start of the access */
480 uint32 end; /**< \brief end of the access */
481 } IfxHssl_Hssl_AccessWindow;
482
483 /** \} */
484
485 /** \brief structure for error flags
486 */
487 typedef struct
488 {
489 uint8 notAcknowledgeError : 1; /**< \brief not acknowledge error / tag error */
490 uint8 transactionTagError : 1; /**< \brief transaction tag error */
491 uint8 timeoutError : 1; /**< \brief timeout error */
492 uint8 unexpectedError : 1; /**< \brief unexpected type of frame error */
493 uint8 memoryAccessViolation : 1; /**< \brief memory access violation */
494 uint8 busAccessError : 1; /**< \brief SRI/SPB bus access error */
495 uint8 channelNumberCodeError : 1; /**< \brief PHY inconsistency error 1 (channel number code error) */
496 uint8 dataLengthError : 1; /**< \brief PHY inconsistency error 2 (data length error) */
497 uint8 crcError : 1; /**< \brief CRC error */
498 } IfxHssl_Hssl_errorFlags;
499
500 /** \addtogroup IfxLld_Hssl_Hssl_DataStructures
501 * \{ */
502 /** \brief HSSL Handle
503 */
504 typedef struct
505 {
506 Ifx_HSSL *hssl; /**< \brief pointer to HSSL register */
507 IfxHssl_Hssl_errorFlags errorFlags; /**< \brief structure for error flags */
508 boolean loopBack; /**< \brief loop back (enable / disable) for streaming transfers within the microcontroller */
509 } IfxHssl_Hssl;
510
511 /** \brief channel handle
512 */
513 typedef struct
514 {
515 Ifx_HSSL *hssl; /**< \brief pointer to HSSL registers */
516 Ifx_HSCT *hsct; /**< \brief pointer to HSCT registers */
517 IfxHssl_ChannelId channelId; /**< \brief channel number (id) */
518 IfxHssl_Hssl_FrameRequest currentFrameRequest; /**< \brief current frame request */
519 IfxHssl_StreamingMode streamingMode; /**< \brief streaming mode selection ( single / continuous ) */
520 boolean loopBack; /**< \brief loopback (enable / disable) for streaming transfers within the microcontroller */
521 boolean streamingModeOn; /**< \brief streaming mode or command mode */
522 } IfxHssl_Hssl_Channel;
523
524 /** \brief configuration structure for channel
525 */
526 typedef struct
527 {
528 Ifx_HSSL *hssl; /**< \brief pointer to HSSL registers */
529 Ifx_HSCT *hsct; /**< \brief pointer to HSCT registers */
530 IfxHssl_ChannelId channelId; /**< \brief channel number (id) */
531 IfxHssl_StreamingMode streamingMode; /**< \brief streaming mode selection ( single / continuous ) */
532 boolean loopBack; /**< \brief loop back (enable / disable) for streaming transfers within the microcontroller */
533 } IfxHssl_Hssl_ChannelConfig;
534
535 /** \brief configuration structure of the HSSL module
536 */
537 typedef struct
538 {
539 Ifx_HSSL *hssl; /**< \brief pointer to HSSL registers */
540 IfxHssl_Hssl_AccessWindow accessWindow0; /**< \brief access window of channel 0 */
541 IfxHssl_Hssl_AccessWindow accessWindow1; /**< \brief access window of channel 1 */
542 IfxHssl_Hssl_AccessWindow accessWindow2; /**< \brief access window of channel 2 */
543 IfxHssl_Hssl_AccessWindow accessWindow3; /**< \brief access window of channel 3 */
544 uint16 preDivider; /**< \brief Defines the down-scaled module clock to be used by all channel timeout timers */
545 } IfxHssl_Hssl_Config;
546
547 /** \} */
548
549 /** \addtogroup IfxLld_Hssl_Hssl_ModuleFunctions
550 * \{ */
551
552 /******************************************************************************/
553 /*-------------------------Global Function Prototypes-------------------------*/
554 /******************************************************************************/
555
556 /** \brief Initialises the module
557 * \param hsct HSCT Handle
558 * \param config configuration structure of the HSCT module
559 * \return None
560 *
561 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
562 *
563 */
564 IFX_EXTERN void IfxHssl_Hssl_initHsctModule(IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config);
565
566 /** \brief Fills the config structure with default values
567 * \param config configuration structure of the HSCT module
568 * \param hsct pointer to HSCT register
569 * \return None
570 *
571 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
572 *
573 */
574 IFX_EXTERN void IfxHssl_Hssl_initHsctModuleConfig(IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct);
575
576 /** \brief Initialises the Hssl module
577 * \param hssl HSSL handle
578 * \param config configuration structure of the module
579 * \return None
580 *
581 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
582 *
583 */
584 IFX_EXTERN void IfxHssl_Hssl_initHsslModule(IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config);
585
586 /** \brief Fills the config structure with default values
587 * \param config configuration structure of the module
588 * \param hssl pointer to HSSL registers
589 * \return None
590 *
591 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
592 *
593 */
594 IFX_EXTERN void IfxHssl_Hssl_initHsslModuleConfig(IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl);
595
596 /** \} */
597
598 /** \addtogroup IfxLld_Hssl_Hssl_ChannelFunctions
599 * \{ */
600
601 /******************************************************************************/
602 /*-------------------------Global Function Prototypes-------------------------*/
603 /******************************************************************************/
604
605 /** \brief Initialises the channel
606 * \param channel channel handle
607 * \param channelConfig configuration structure for channel
608 * \return None
609 *
610 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
611 *
612 */
613 IFX_EXTERN void IfxHssl_Hssl_initChannel(IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig);
614
615 /** \brief Fills the channel config structure with default values
616 * \param channelConfig configuration structure for channel
617 * \param hssl HSSL Handle
618 * \param hsct HSCT Handle
619 * \return None
620 *
621 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
622 *
623 */
624 IFX_EXTERN void IfxHssl_Hssl_initChannelConfig(IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct);
625
626 /** \} */
627
628 /** \addtogroup IfxLld_Hssl_Hssl_SimpleCom
629 * \{ */
630
631 /******************************************************************************/
632 /*-------------------------Inline Function Prototypes-------------------------*/
633 /******************************************************************************/
634
635 /** \brief reads and returs the data
636 * \param channel channel handle
637 * \return data
638 *
639 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
640 *
641 */
642 IFX_INLINE uint32 IfxHssl_Hssl_getReadData(IfxHssl_Hssl_Channel *channel);
643
644 /******************************************************************************/
645 /*-------------------------Global Function Prototypes-------------------------*/
646 /******************************************************************************/
647
648 /** \brief Initiates read request
649 * \param channel channel handle
650 * \param address address of the location from where the data is to be read
651 * \param dataLength length of the data
652 * \return module status (ok, busy, error)
653 *
654 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
655 *
656 */
657 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_read(IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength);
658
659 /** \brief sends a predefined command from master to slave
660 * \param hsct HSCT Handle
661 * \param command command value
662 * \return None
663 *
664 * Usage Example:
665 * \code
666 * // enable slave Tx channel (Rx disable to Rx low peed)
667 * IfxHssl_Hssl_sendControlCommand(&channel, IfxHssl_ControlCommand_enableReception);
668 * \endcode
669 *
670 */
671 IFX_EXTERN void IfxHssl_Hssl_sendControlCommand(IfxHssl_Hsct *hsct, uint8 command);
672
673 /** \brief serves the frame request (read, write, trigger frame and read id)
674 * \param channel channel handle
675 * \param frameRequest frame request
676 * \param address address of the location (to be written into / read from)
677 * \param data data to be written
678 * \param dataLength length of the data
679 * \return module status (ok, busy, error)
680 */
681 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_singleFrameRequest(IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength);
682
683 /** \brief waits until the current transaction is done
684 * \param channel channel handle
685 * \return module status (ok, busy, error)
686 *
687 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
688 *
689 */
690 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_waitAcknowledge(IfxHssl_Hssl_Channel *channel);
691
692 /** \brief writes single frame of data into the specified address
693 * \param channel channel handle
694 * \param address address of the location where the data is to be written
695 * \param data data that needs to be written
696 * \param dataLength length of the data (8, 16, 32 bit)
697 * \return module status (ok, busy, error)
698 *
699 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
700 *
701 */
702 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_write(IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength);
703
704 /** \} */
705
706 /** \addtogroup IfxLld_Hssl_Hssl_ErrorHandling
707 * \{ */
708
709 /******************************************************************************/
710 /*-------------------------Global Function Prototypes-------------------------*/
711 /******************************************************************************/
712
713 /** \brief stores the status of errors in the respective members of the error flags structure
714 * \param hssl HSSL Handle
715 * \return None
716 */
717 IFX_EXTERN void IfxHssl_Hssl_checkErrors(IfxHssl_Hssl *hssl);
718
719 /** \brief clears the status of members in the error flags structure
720 * \param hssl HSSL Handle
721 * \return None
722 */
723 IFX_EXTERN void IfxHssl_Hssl_clearErrorFlags(IfxHssl_Hssl *hssl);
724
725 /** \brief a simple software delay
726 * \param hsct HSCT Handle
727 * \return None
728 */
729 IFX_EXTERN void IfxHssl_Hssl_delay(IfxHssl_Hsct *hsct);
730
731 /** \} */
732
733 /** \addtogroup IfxLld_Hssl_Hssl_StreamingCom
734 * \{ */
735
736 /******************************************************************************/
737 /*-------------------------Global Function Prototypes-------------------------*/
738 /******************************************************************************/
739
740 /** \brief Prepares the target device for streaming
741 * \param channel channel handle
742 * \param slaveTargetAddress address of the location on target device where the data needs to be transfered
743 * \param count Frame count (length of the data in the memory as 256 bytes per frame)
744 * \return module status (ok, busy, error)
745 *
746 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
747 *
748 */
749 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_prepareStream(IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count);
750
751 /** \brief transfers one memory block of data
752 * useful for transfering huge data from one location to another and between devices.
753 * NOTE: This function should be called only for IfxHssl_ChannelId_2
754 * \param hssl HSSL handle
755 * \param data starting address of the location to be read from (memory block 0 / HSSL_ISSA0)
756 * \param count Frame count (length of the data in the memory as 256 bytes per frame)
757 * \return module status (ok, busy, error)
758 *
759 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
760 *
761 */
762 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_writeStream(IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count);
763
764 /** \} */
765
766 /******************************************************************************/
767 /*---------------------Inline Function Implementations------------------------*/
768 /******************************************************************************/
769
770 IFX_INLINE uint32 IfxHssl_Hssl_getReadData(IfxHssl_Hssl_Channel *channel)
771 {
772 Ifx_HSSL_I *hsslI = (Ifx_HSSL_I *)&channel->hssl->I[channel->channelId];
773 return hsslI->IRD.U; /* retutn the data read from the data register */
774 }
775
776
777 #endif /* IFXHSSL_HSSL_H */
IfxHssl_ChannelId
IfxHssl_ChannelId
channel selection
Definition: IfxHssl.h:74
IfxHssl_Hssl_Channel::channelId
IfxHssl_ChannelId channelId
channel number (id)
Definition: IfxHssl_Hssl.h:517
IfxHssl_Hssl_Config
configuration structure of the HSSL module
Definition: IfxHssl_Hssl.h:537
IfxHssl_Hssl_AccessWindow::start
uint32 start
start of the access
Definition: IfxHssl_Hssl.h:479
IfxHssl_Hssl_initChannel
IFX_EXTERN void IfxHssl_Hssl_initChannel(IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
Initialises the channel.
Definition: IfxHssl_Hssl.c:131
IfxHssl_StreamingMode
IfxHssl_StreamingMode
streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR
Definition: IfxHssl.h:211
IfxHssl_Hssl_initHsctModuleConfig
IFX_EXTERN void IfxHssl_Hssl_initHsctModuleConfig(IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
Fills the config structure with default values.
Definition: IfxHssl_Hssl.c:244
IfxHssl_Hssl_errorFlags::transactionTagError
uint8 transactionTagError
transaction tag error
Definition: IfxHssl_Hssl.h:490
IfxHssl_Hssl_errorFlags::unexpectedError
uint8 unexpectedError
unexpected type of frame error
Definition: IfxHssl_Hssl.h:492
IfxHssl_Hssl_Channel::currentFrameRequest
IfxHssl_Hssl_FrameRequest currentFrameRequest
current frame request
Definition: IfxHssl_Hssl.h:518
IfxHssl_Hssl_initHsctModule
IFX_EXTERN void IfxHssl_Hssl_initHsctModule(IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
Initialises the module.
Definition: IfxHssl_Hssl.c:157
IfxHssl_Hssl_delay
IFX_EXTERN void IfxHssl_Hssl_delay(IfxHssl_Hsct *hsct)
a simple software delay
Definition: IfxHssl_Hssl.c:119
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxHssl_Hssl_Config::preDivider
uint16 preDivider
Defines the down-scaled module clock to be used by all channel timeout timers.
Definition: IfxHssl_Hssl.h:544
IfxHssl_Hssl_initChannelConfig
IFX_EXTERN void IfxHssl_Hssl_initChannelConfig(IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
Fills the channel config structure with default values.
Definition: IfxHssl_Hssl.c:145
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxHssl_Hsct
HSCT module handle.
Definition: IfxHssl.h:260
IfxHssl_Hssl_FrameRequest_readFrame
read frame rquest
Definition: IfxHssl_Hssl.h:451
IfxHssl_Hssl_errorFlags::busAccessError
uint8 busAccessError
SRI/SPB bus access error.
Definition: IfxHssl_Hssl.h:494
IfxHssl_Hssl_FrameRequest_writeFrame
write frame rquest
Definition: IfxHssl_Hssl.h:452
IfxHssl_Hssl_write
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_write(IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
writes single frame of data into the specified address
Definition: IfxHssl_Hssl.c:543
IfxHssl_Hssl_initHsslModule
IFX_EXTERN void IfxHssl_Hssl_initHsslModule(IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
Initialises the Hssl module.
Definition: IfxHssl_Hssl.c:258
IfxHssl_Hssl_errorFlags::notAcknowledgeError
uint8 notAcknowledgeError
not acknowledge error / tag error
Definition: IfxHssl_Hssl.h:489
IfxHssl_Hssl_FrameRequest_readId
read id request
Definition: IfxHssl_Hssl.h:454
IfxHssl_Hssl_Channel
channel handle
Definition: IfxHssl_Hssl.h:513
IfxHssl_Hssl_errorFlags::channelNumberCodeError
uint8 channelNumberCodeError
PHY inconsistency error 1 (channel number code error)
Definition: IfxHssl_Hssl.h:495
IfxHssl_Hssl_FrameRequest_noAction
no action
Definition: IfxHssl_Hssl.h:455
IfxHssl_Hssl_errorFlags::timeoutError
uint8 timeoutError
timeout error
Definition: IfxHssl_Hssl.h:491
IfxHssl_Hssl_Config::accessWindow0
IfxHssl_Hssl_AccessWindow accessWindow0
access window of channel 0
Definition: IfxHssl_Hssl.h:540
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxHssl_Hssl_prepareStream
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_prepareStream(IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
Prepares the target device for streaming.
Definition: IfxHssl_Hssl.c:308
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxHssl_Hssl::hssl
Ifx_HSSL * hssl
pointer to HSSL register
Definition: IfxHssl_Hssl.h:506
IfxHssl_Hssl_sendControlCommand
IFX_EXTERN void IfxHssl_Hssl_sendControlCommand(IfxHssl_Hsct *hsct, uint8 command)
sends a predefined command from master to slave
Definition: IfxHssl_Hssl.c:430
IfxHssl_Hssl_errorFlags::dataLengthError
uint8 dataLengthError
PHY inconsistency error 2 (data length error)
Definition: IfxHssl_Hssl.h:496
IfxHssl_Hssl_Channel::hsct
Ifx_HSCT * hsct
pointer to HSCT registers
Definition: IfxHssl_Hssl.h:516
IfxHssl_Hssl_Status_ok
status ok
Definition: IfxHssl_Hssl.h:462
IfxHssl_Hssl_ChannelConfig
configuration structure for channel
Definition: IfxHssl_Hssl.h:526
IfxHssl_Hssl_checkErrors
IFX_EXTERN void IfxHssl_Hssl_checkErrors(IfxHssl_Hssl *hssl)
stores the status of errors in the respective members of the error flags structure ...
Definition: IfxHssl_Hssl.c:53
IfxHssl_Hssl
HSSL Handle.
Definition: IfxHssl_Hssl.h:504
IfxHssl_Hssl_errorFlags
structure for error flags
Definition: IfxHssl_Hssl.h:487
IfxHssl_DataLength
IfxHssl_DataLength
Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL...
Definition: IfxHssl.h:124
IfxHssl_Hssl_writeStream
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_writeStream(IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
transfers one memory block of data useful for transfering huge data from one location to another and ...
Definition: IfxHssl_Hssl.c:549
IfxHssl_Hssl_Status_error
status error
Definition: IfxHssl_Hssl.h:464
IfxHssl_Hssl_Config::accessWindow1
IfxHssl_Hssl_AccessWindow accessWindow1
access window of channel 1
Definition: IfxHssl_Hssl.h:541
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxHssl_Hssl_read
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_read(IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
Initiates read request.
Definition: IfxHssl_Hssl.c:423
IfxHssl_Hsct_Config
Configuration structure of the HSCT module.
Definition: IfxHssl.h:268
IfxHssl_Hssl_Status_busy
status busy
Definition: IfxHssl_Hssl.h:463
IfxHssl_Hssl_FrameRequest_triggerFrame
trigger frame rquest
Definition: IfxHssl_Hssl.h:453
IfxHssl_Hssl::loopBack
boolean loopBack
loop back (enable / disable) for streaming transfers within the microcontroller
Definition: IfxHssl_Hssl.h:508
IfxHssl_Hssl_getReadData
IFX_INLINE uint32 IfxHssl_Hssl_getReadData(IfxHssl_Hssl_Channel *channel)
reads and returs the data
Definition: IfxHssl_Hssl.h:770
IfxHssl_Hssl_initHsslModuleConfig
IFX_EXTERN void IfxHssl_Hssl_initHsslModuleConfig(IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
Fills the config structure with default values.
Definition: IfxHssl_Hssl.c:289
IfxHssl_Hssl_singleFrameRequest
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_singleFrameRequest(IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
serves the frame request (read, write, trigger frame and read id)
Definition: IfxHssl_Hssl.c:441
IfxHssl_Hssl_AccessWindow::end
uint32 end
end of the access
Definition: IfxHssl_Hssl.h:480
IfxHssl_Hssl_FrameRequest
IfxHssl_Hssl_FrameRequest
frame request selection
Definition: IfxHssl_Hssl.h:449
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxHssl.h
HSSL basic functionality.
IfxHssl_Hssl::errorFlags
IfxHssl_Hssl_errorFlags errorFlags
structure for error flags
Definition: IfxHssl_Hssl.h:507
IfxHssl_Hssl_waitAcknowledge
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_waitAcknowledge(IfxHssl_Hssl_Channel *channel)
waits until the current transaction is done
Definition: IfxHssl_Hssl.c:484
IfxHssl_Hssl_Channel::streamingModeOn
boolean streamingModeOn
streaming mode or command mode
Definition: IfxHssl_Hssl.h:521
IfxHssl_Hssl_errorFlags::memoryAccessViolation
uint8 memoryAccessViolation
memory access violation
Definition: IfxHssl_Hssl.h:493
IfxHssl_Hssl_errorFlags::crcError
uint8 crcError
CRC error.
Definition: IfxHssl_Hssl.h:497
IfxHssl_Hssl_Status
IfxHssl_Hssl_Status
module status
Definition: IfxHssl_Hssl.h:460
IfxHssl_Hssl_Channel::streamingMode
IfxHssl_StreamingMode streamingMode
streaming mode selection ( single / continuous )
Definition: IfxHssl_Hssl.h:519
IfxHssl_Hssl_clearErrorFlags
IFX_EXTERN void IfxHssl_Hssl_clearErrorFlags(IfxHssl_Hssl *hssl)
clears the status of members in the error flags structure
Definition: IfxHssl_Hssl.c:105
IfxPort.h
PORT basic functionality.
IfxHssl_Hssl_Config::accessWindow2
IfxHssl_Hssl_AccessWindow accessWindow2
access window of channel 2
Definition: IfxHssl_Hssl.h:542
IfxHssl_Hssl_AccessWindow
structure for access windows
Definition: IfxHssl_Hssl.h:477
IfxHssl_Hssl_Config::accessWindow3
IfxHssl_Hssl_AccessWindow accessWindow3
access window of channel 3
Definition: IfxHssl_Hssl.h:543


iLLD_TC26B: IfxHssl_cfg.c Source File

  • _Impl
IfxHssl_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxHssl_cfg.c
3 * \brief HSSL on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxHssl_cfg.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
51
52 IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES] = {
53 {&MODULE_HSCT, (uint32)IfxHssl_hsctIndex_0}
54 };
55
56 IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES] = {
57 {&MODULE_HSSL, (uint32)IfxHssl_hsslIndex_0}
58 };
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxHssl_hsctIndex_0
HSCT index 0.
Definition: IfxHssl_cfg.h:83
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxHssl_cfg.h
HSSL on-chip implementation data.
IFXHSSL_NUM_MODULES
#define IFXHSSL_NUM_MODULES
Definition: IfxHssl_cfg.h:68
IfxHssl_cfg_hsctIndexMap
IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.c:52
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxHssl_hsslIndex_0
HSSL index 0.
Definition: IfxHssl_cfg.h:91
IfxHssl_cfg_hsslIndexMap
IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.c:56


iLLD_TC26B: IfxHssl_cfg.h Source File

  • _Impl
IfxHssl_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxHssl_cfg.h
3 * \brief HSSL on-chip implementation data
4 * \ingroup IfxLld_Hssl
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Hssl HSSL
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Hssl_Impl Implementation
44 * \ingroup IfxLld_Hssl
45 * \defgroup IfxLld_Hssl_Std Standard Driver
46 * \ingroup IfxLld_Hssl
47 * \defgroup IfxLld_Hssl_Impl_Enumerations Enumerations
48 * \ingroup IfxLld_Hssl_Impl
49 */
50
51 #ifndef IFXHSSL_CFG_H
52 #define IFXHSSL_CFG_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 #include "Cpu/Std/Ifx_Types.h"
59 #include "IfxHssl_reg.h"
60 #include "IfxHsct_reg.h"
61
62 /******************************************************************************/
63 /*-----------------------------------Macros-----------------------------------*/
64 /******************************************************************************/
65
66 #define IFXHSSL_NUM_CHANNELS 4
67
68 #define IFXHSSL_NUM_MODULES 1
69
70 #define IFXHSSL_JTAG_ID_ADDRESS (0xF0000464u)
71
72 /******************************************************************************/
73 /*--------------------------------Enumerations--------------------------------*/
74 /******************************************************************************/
75
76 /** \addtogroup IfxLld_Hssl_Impl_Enumerations
77 * \{ */
78 /** \brief List of the available Hsct resources
79 */
80 typedef enum
81 {
82 IfxHssl_hsctIndex_none = -1, /**< \brief Not Selected */
83 IfxHssl_hsctIndex_0 = 0, /**< \brief HSCT index 0 */
84 } IfxHssl_hsctIndex;
85
86 /** \brief List of the available Hssl resources
87 */
88 typedef enum
89 {
90 IfxHssl_hsslIndex_none = -1, /**< \brief Not Selected */
91 IfxHssl_hsslIndex_0 = 0, /**< \brief HSSL index 0 */
92 } IfxHssl_hsslIndex;
93
94 /** \} */
95
96 /** \addtogroup IfxLld_Hssl_Impl_Enumerations
97 * \{ */
98
99 /******************************************************************************/
100 /*-------------------Global Exported Variables/Constants----------------------*/
101 /******************************************************************************/
102
103 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES];
104
105 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES];
106
107 /** \} */
108
109 #endif /* IFXHSSL_CFG_H */
IfxHssl_hsslIndex_none
Not Selected.
Definition: IfxHssl_cfg.h:90
IfxHssl_hsctIndex_none
Not Selected.
Definition: IfxHssl_cfg.h:82
IfxHssl_hsslIndex
IfxHssl_hsslIndex
List of the available Hssl resources.
Definition: IfxHssl_cfg.h:88
IfxHssl_cfg_hsctIndexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.h:103
IfxHssl_hsctIndex_0
HSCT index 0.
Definition: IfxHssl_cfg.h:83
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxHssl_cfg_hsslIndexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.h:105
IFXHSSL_NUM_MODULES
#define IFXHSSL_NUM_MODULES
Definition: IfxHssl_cfg.h:68
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxHssl_hsslIndex_0
HSSL index 0.
Definition: IfxHssl_cfg.h:91
IfxHssl_hsctIndex
IfxHssl_hsctIndex
List of the available Hsct resources.
Definition: IfxHssl_cfg.h:80


iLLD_TC26B: IfxI2c.c Source File

  • I2c
  • Std
IfxI2c.c
Go to the documentation of this file.
1 /**
2 * \file IfxI2c.c
3 * \brief I2C basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxI2c.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxI2c_configureAsMaster(Ifx_I2C *i2c)
55 {
56 // enter config Mode
57 IfxI2c_stop(i2c);
58
59 i2c->ADDRCFG.U = 0;
60 i2c->ADDRCFG.B.MnS = 1; // master mode
61 i2c->ADDRCFG.B.SONA = 0; // don't release the bus on NACK
62 i2c->ADDRCFG.B.SOPE = 0; // after transfer go into master restart state
63 i2c->ADDRCFG.B.TBAM = 0; // 7 bit address mode
64 i2c->FIFOCFG.U = 0;
65 i2c->FIFOCFG.B.TXFC = 1; // FIFO as flow controller
66 i2c->FIFOCFG.B.RXFC = 1; // FIFO as flow controller
67 i2c->FIFOCFG.B.TXBS = 0; // Burst size 1 word
68 i2c->FIFOCFG.B.RXBS = 0; // Burst size 1 word
69 i2c->FIFOCFG.B.TXFA = 0; // fifo is byte aligned
70 i2c->FIFOCFG.B.RXFA = 0; // fifo is byte aligned
71 }
72
73
74 void IfxI2c_disableModule(Ifx_I2C *i2c)
75 {
76 uint16 pwd = IfxScuWdt_getCpuWatchdogPassword();
77
78 IfxScuWdt_clearCpuEndinit(pwd);
79
80 i2c->CLC.B.DISR = 1;
81
82 while (i2c->CLC.B.DISS == 0)
83 {}
84
85 IfxScuWdt_setCpuEndinit(pwd);
86 }
87
88
89 void IfxI2c_enableBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
90 {
91 volatile Ifx_SRC_SRCR *src;
92 src = IfxI2c_getBurstDataTransferSrcPointer(i2c);
93 IfxSrc_init(src, typeOfService, priority);
94 IfxSrc_enable(src);
95 }
96
97
98 void IfxI2c_enableErrorInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
99 {
100 volatile Ifx_SRC_SRCR *src;
101 src = IfxI2c_getErrorSrcPointer(i2c);
102 IfxSrc_init(src, typeOfService, priority);
103 IfxSrc_enable(src);
104 }
105
106
107 void IfxI2c_enableLastBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
108 {
109 volatile Ifx_SRC_SRCR *src;
110 src = IfxI2c_getLastBurstDataTransferSrcPointer(i2c);
111 IfxSrc_init(src, typeOfService, priority);
112 IfxSrc_enable(src);
113 }
114
115
116 void IfxI2c_enableLastSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
117 {
118 volatile Ifx_SRC_SRCR *src;
119 src = IfxI2c_getLastSingleDataTransferSrcPointer(i2c);
120 IfxSrc_init(src, typeOfService, priority);
121 IfxSrc_enable(src);
122 }
123
124
125 void IfxI2c_enableModule(Ifx_I2C *i2c)
126 {
127 uint16 pwd = IfxScuWdt_getCpuWatchdogPassword();
128
129 IfxScuWdt_clearCpuEndinit(pwd);
130 i2c->CLC.B.DISR = 0U;
131
132 while (i2c->CLC.B.DISS == 1U)
133 {}
134
135 i2c->CLC1.B.RMC = 1U;
136
137 while (i2c->CLC1.B.RMC != 1U)
138 {}
139
140 i2c->CLC1.B.DISR = 0U;
141
142 while (i2c->CLC1.B.DISS == 1U)
143 {}
144
145 // disable all interrupts
146 i2c->ERRIRQSM.U = 0x00;
147 i2c->PIRQSM.U = 0x00;
148 i2c->IMSC.U = 0x00;
149
150 IfxScuWdt_setCpuEndinit(pwd);
151 }
152
153
154 void IfxI2c_enableProtocolInterrupt(void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
155 {
156 volatile Ifx_SRC_SRCR *src;
157 src = IfxI2c_getProtocolSrcPointer(i2c);
158 IfxSrc_init(src, typeOfService, priority);
159 IfxSrc_enable(src);
160 }
161
162
163 void IfxI2c_enableSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
164 {
165 volatile Ifx_SRC_SRCR *src;
166 src = IfxI2c_getSingleDataTransferSrcPointer(i2c);
167 IfxSrc_init(src, typeOfService, priority);
168 IfxSrc_enable(src);
169 }
170
171
172 Ifx_I2C *IfxI2c_getAddress(IfxI2c_Index i2c)
173 {
174 Ifx_I2C *module;
175
176 if (i2c < IFXI2C_NUM_MODULES)
177 {
178 module = (Ifx_I2C *)IfxI2c_cfg_indexMap[i2c].module;
179 }
180 else
181 {
182 module = NULL_PTR;
183 }
184
185 return module;
186 }
187
188
189 float32 IfxI2c_getBaudrate(Ifx_I2C *i2c)
190 {
191 uint8 inc = i2c->FDIVCFG.B.INC;
192 uint16 dec = i2c->FDIVCFG.B.DEC;
193 uint8 rmc = i2c->CLC1.B.RMC;
194 float32 fKernel = IfxScuCcu_getBaud1Frequency();
195
196 return (fKernel / rmc) / ((2 * dec / inc) + 3);
197 }
198
199
200 IfxI2c_Index IfxI2c_getIndex(Ifx_I2C *i2c)
201 {
202 uint32 index;
203 IfxI2c_Index result;
204
205 result = IfxI2c_Index_none;
206
207 for (index = 0; index < IFXI2C_NUM_MODULES; index++)
208 {
209 if (IfxI2c_cfg_indexMap[index].module == i2c)
210 {
211 result = (IfxI2c_Index)IfxI2c_cfg_indexMap[index].index;
212 break;
213 }
214 }
215
216 return result;
217 }
218
219
220 void IfxI2c_initSclSdaPin(const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
221 {
222 IfxPort_OutputMode mode = (IfxPort_OutputMode)IfxPort_Mode_outputOpenDrainGeneral;
223 IfxPort_setPinModeOutput(scl->pin.port, scl->pin.pinIndex, mode, scl->outSelect);
224 IfxPort_setPinModeOutput(sda->pin.port, sda->pin.pinIndex, mode, sda->outSelect);
225 IfxPort_setPinPadDriver(scl->pin.port, scl->pin.pinIndex, padDriver);
226 IfxPort_setPinPadDriver(sda->pin.port, sda->pin.pinIndex, padDriver);
227 IfxI2c_setPinSelection(scl->module, (IfxI2c_PinSelect)scl->inSelect); // note: uses the same PISEL register like SDA
228 }
229
230
231 void IfxI2c_releaseBus(Ifx_I2C *i2c)
232 {
233 // only set the set end of transmisson bit if bus is not free
234 if (i2c->BUSSTAT.B.BS != IfxI2c_BusStatus_idle)
235 {
236 i2c->ENDDCTRL.B.SETEND = 1;
237
238 // wait until bus is free
239 while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
240 {}
241
242 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
243 }
244 }
245
246
247 void IfxI2c_resetFifo(Ifx_I2C *i2c)
248 {
249 /* reset FIFO */
250 i2c->FIFOCFG.U = 0x0;
251 i2c->FIFOCFG.B.TXFC = 0U;
252 i2c->FIFOCFG.B.RXFC = 0U;
253 i2c->FIFOCFG.B.TXBS = 0U;
254 i2c->FIFOCFG.B.RXBS = 0U;
255 i2c->FIFOCFG.B.TXFA = 0U;
256 i2c->FIFOCFG.B.RXFA = 0U;
257 }
258
259
260 void IfxI2c_resetModule(Ifx_I2C *i2c)
261 {
262 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
263
264 IfxScuWdt_clearCpuEndinit(passwd);
265 i2c->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
266 i2c->KRST1.B.RST = 1;
267 IfxScuWdt_setCpuEndinit(passwd);
268
269 while (0 == i2c->KRST0.B.RSTSTAT) /* Wait until reset is executed */
270
271 {}
272
273 IfxScuWdt_clearCpuEndinit(passwd);
274 i2c->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
275 IfxScuWdt_setCpuEndinit(passwd);
276 }
277
278
279 void IfxI2c_setBaudrate(Ifx_I2C *i2c, float32 baudrate)
280 {
281 float32 fKernel = IfxScuCcu_getBaud1Frequency();
282 uint8 rmc = i2c->CLC1.B.RMC;
283 float32 dec;
284 dec = (((fKernel / rmc) / baudrate) - 3) / 2; // always: Inc = 1
285
286 // dec:inc must be at least 6
287 if (dec < 6)
288 {
289 dec = 6;
290 }
291 else if (dec > (1 << IFX_I2C_FDIVCFG_DEC_LEN) - 1)
292 {
293 dec = (1 << IFX_I2C_FDIVCFG_DEC_LEN) - 1;
294 }
295
296 uint16 pwd = IfxScuWdt_getCpuWatchdogPassword();
297
298 IfxScuWdt_clearCpuEndinit(pwd);
299 /* Baudrate configuration */
300 i2c->FDIVCFG.B.INC = 1;
301 i2c->FDIVCFG.B.DEC = (uint16)(dec + 0.5);
302 i2c->TIMCFG.B.SDA_DEL_HD_DAT = 0x3F;
303 i2c->TIMCFG.B.FS_SCL_LOW = 1;
304 i2c->TIMCFG.B.EN_SCL_LOW_LEN = 1;
305 i2c->TIMCFG.B.SCL_LOW_LEN = 0x20;
306
307 IfxScuWdt_setCpuEndinit(pwd);
308 }
IfxI2c_Index_none
Not Selected.
Definition: IfxI2c_cfg.h:79
IfxI2c_enableLastBurstDataTransferInterrupt
void IfxI2c_enableLastBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last burst data transfer interrupt
Definition: IfxI2c.c:107
IfxI2c_enableErrorInterrupt
void IfxI2c_enableErrorInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Error interrupt.
Definition: IfxI2c.c:98
IfxI2c_releaseBus
void IfxI2c_releaseBus(Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus.
Definition: IfxI2c.c:231
IfxI2c_PinSelect
IfxI2c_PinSelect
Definition: IfxI2c.h:90
IfxI2c_Scl_InOut::pin
IfxPort_Pin pin
Port pin.
Definition: IfxI2c_PinMap.h:59
IfxI2c_setBaudrate
void IfxI2c_setBaudrate(Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate.
Definition: IfxI2c.c:279
IfxI2c_enableSingleDataTransferInterrupt
void IfxI2c_enableSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the single data transfer interrupt
Definition: IfxI2c.c:163
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxI2c.h
I2C basic functionality.
IfxI2c_getLastBurstDataTransferSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getLastBurstDataTransferSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C last burst data transfer request interrupt.
Definition: IfxI2c.h:801
float32
float float32
Definition: Platform_Types.h:170
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxI2c_getBaudrate
float32 IfxI2c_getBaudrate(Ifx_I2C *i2c)
Returns the real Baudrate.
Definition: IfxI2c.c:189
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxI2c_Scl_InOut::inSelect
Ifx_RxSel inSelect
Input multiplexer value.
Definition: IfxI2c_PinMap.h:60
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxI2c_getProtocolSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getProtocolSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C Protocol interrupt.
Definition: IfxI2c.h:851
IfxI2c_Sda_InOut
SDA input mapping structure.
Definition: IfxI2c_PinMap.h:65
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxI2c_resetFifo
void IfxI2c_resetFifo(Ifx_I2C *i2c)
Definition: IfxI2c.c:247
IfxI2c_Index
IfxI2c_Index
List of the available I2c interfaces.
Definition: IfxI2c_cfg.h:77
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxI2c_getAddress
Ifx_I2C * IfxI2c_getAddress(IfxI2c_Index i2c)
Definition: IfxI2c.c:172
IfxI2c_enableBurstDataTransferInterrupt
void IfxI2c_enableBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Burst data transfer interrupt.
Definition: IfxI2c.c:89
IfxI2c_enableLastSingleDataTransferInterrupt
void IfxI2c_enableLastSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last single data transfer interrupt
Definition: IfxI2c.c:116
IfxI2c_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES]
Definition: IfxI2c_cfg.c:54
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxI2c_disableModule
void IfxI2c_disableModule(Ifx_I2C *i2c)
Disables the I2c Module.
Definition: IfxI2c.c:74
IfxScuCcu_getBaud1Frequency
float32 IfxScuCcu_getBaud1Frequency(void)
API to get BAUD1 divider frequency. This API returns the based on the divider value in CCUCON registe...
Definition: IfxScuCcu.c:212
IFXI2C_NUM_MODULES
#define IFXI2C_NUM_MODULES
Definition: IfxI2c_cfg.h:67
IfxI2c_Scl_InOut::module
Ifx_I2C * module
Base address.
Definition: IfxI2c_PinMap.h:58
IfxI2c_configureAsMaster
void IfxI2c_configureAsMaster(Ifx_I2C *i2c)
Configures the Module as Master.
Definition: IfxI2c.c:54
IfxPort_Mode_outputOpenDrainGeneral
Open-drain, General-purpose output.
Definition: IfxPort.h:105
IfxI2c_getSingleDataTransferSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getSingleDataTransferSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C single data transfer request interrupt.
Definition: IfxI2c.h:864
IfxI2c_enableProtocolInterrupt
void IfxI2c_enableProtocolInterrupt(void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the protocol interrupt.
Definition: IfxI2c.c:154
IfxI2c_enableModule
void IfxI2c_enableModule(Ifx_I2C *i2c)
Enables the I2c Module.
Definition: IfxI2c.c:125
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxI2c_clearProtocolInterruptSource
IFX_INLINE void IfxI2c_clearProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
clears the specified source of protocol interrupt
Definition: IfxI2c.h:643
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxI2c_initSclSdaPin
void IfxI2c_initSclSdaPin(const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
Definition: IfxI2c.c:220
IfxI2c_Scl_InOut
SCL input mapping structure.
Definition: IfxI2c_PinMap.h:56
IfxI2c_getProtocolInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
returns the status of specified protocol interrupt source
Definition: IfxI2c.h:845
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxI2c_stop
IFX_INLINE void IfxI2c_stop(Ifx_I2C *i2c)
Definition: IfxI2c.h:925
IfxI2c_getBurstDataTransferSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getBurstDataTransferSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C burst data transfer request interrupt.
Definition: IfxI2c.h:751
IfxI2c_getIndex
IfxI2c_Index IfxI2c_getIndex(Ifx_I2C *i2c)
API to get the resource index of the I2C specified.
Definition: IfxI2c.c:200
IfxI2c_getErrorSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getErrorSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C Error interrupt.
Definition: IfxI2c.h:788
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxI2c_resetModule
void IfxI2c_resetModule(Ifx_I2C *i2c)
resets the I2c kernel
Definition: IfxI2c.c:260
IfxI2c_ProtocolInterruptSource_transmissionEnd
transmission end service request
Definition: IfxI2c.h:112
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxI2c_BusStatus_idle
idle
Definition: IfxI2c.h:73
IfxI2c_setPinSelection
IFX_INLINE void IfxI2c_setPinSelection(Ifx_I2C *i2c, IfxI2c_PinSelect pisel)
selects the pin
Definition: IfxI2c.h:895
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxI2c_Scl_InOut::outSelect
IfxPort_OutputIdx outSelect
Port control code.
Definition: IfxI2c_PinMap.h:61
IfxI2c_getLastSingleDataTransferSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getLastSingleDataTransferSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C last single data transfer request interrupt.
Definition: IfxI2c.h:820


iLLD_TC26B: IfxI2c.h Source File

  • I2c
  • Std
IfxI2c.h
Go to the documentation of this file.
1 /**
2 * \file IfxI2c.h
3 * \brief I2C basic functionality
4 * \ingroup IfxLld_I2c
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_I2c_Std_enums Enumerations
44 * \ingroup IfxLld_I2c_Std
45 * \defgroup IfxLld_I2c_Std_functions Functions
46 * \ingroup IfxLld_I2c_Std
47 * \defgroup IfxLld_I2c_Std_structures Data Structures
48 * \ingroup IfxLld_I2c_Std
49 */
50
51 #ifndef IFXI2C_H
52 #define IFXI2C_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 #include "_Impl/IfxI2c_cfg.h"
59 #include "Scu/Std/IfxScuWdt.h"
60 #include "Scu/Std/IfxScuCcu.h"
61 #include "IfxI2c_bf.h"
62 #include "_PinMap/IfxI2c_PinMap.h"
63 #include "Src/Std/IfxSrc.h"
64
65 /******************************************************************************/
66 /*--------------------------------Enumerations--------------------------------*/
67 /******************************************************************************/
68
69 /** \addtogroup IfxLld_I2c_Std_enums
70 * \{ */
71 typedef enum
72 {
73 IfxI2c_BusStatus_idle = 0, /**< \brief idle */
74 IfxI2c_BusStatus_started = 1, /**< \brief started */
75 IfxI2c_BusStatus_busyMaster = 2, /**< \brief busy Master */
76 IfxI2c_BusStatus_remoteSlave = 3 /**< \brief remote Slave */
77 } IfxI2c_BusStatus;
78
79 /** \brief enable error interrupt request source
80 * Definition in Ifx.I2C.ERRIRQSM.U
81 */
82 typedef enum
83 {
84 IfxI2c_ErrorInterruptSource_rxFifoUnderflow = IFX_I2C_ERRIRQSM_RXF_UFL_OFF, /**< \brief receive fifo underflow service request */
85 IfxI2c_ErrorInterruptSource_rxFifoOverflow = IFX_I2C_ERRIRQSM_RXF_OFL_OFF, /**< \brief receive fifo overflow service request */
86 IfxI2c_ErrorInterruptSource_txFifoUnderflow = IFX_I2C_ERRIRQSM_TXF_UFL_OFF, /**< \brief transmit fifo underflow service request */
87 IfxI2c_ErrorInterruptSource_txFifoOverflow = IFX_I2C_ERRIRQSM_TXF_OFL_OFF /**< \brief transmit fifo overflow service request */
88 } IfxI2c_ErrorInterruptSource;
89
90 typedef enum
91 {
92 IfxI2c_PinSelect_a = 0,
93 IfxI2c_PinSelect_b = 1,
94 IfxI2c_PinSelect_c = 2,
95 IfxI2c_PinSelect_d = 3,
96 IfxI2c_PinSelect_e = 4,
97 IfxI2c_PinSelect_f = 5,
98 IfxI2c_PinSelect_g = 6,
99 IfxI2c_PinSelect_h = 7
100 } IfxI2c_PinSelect;
101
102 /** \brief enable protocol interrupt source
103 * Definition in Ifx.I2C.PIRQSM.U
104 */
105 typedef enum
106 {
107 IfxI2c_ProtocolInterruptSource_addressMatch = IFX_I2C_PIRQSM_AM_OFF, /**< \brief address match service request */
108 IfxI2c_ProtocolInterruptSource_generalCall = IFX_I2C_PIRQSM_GC_OFF, /**< \brief general call service request */
109 IfxI2c_ProtocolInterruptSource_masterCode = IFX_I2C_PIRQSM_MC_OFF, /**< \brief master code service request */
110 IfxI2c_ProtocolInterruptSource_arbitrationLost = IFX_I2C_PIRQSM_AL_OFF, /**< \brief arbitration lost service request */
111 IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived = IFX_I2C_PIRQSM_NACK_OFF, /**< \brief not acknowledge received service request */
112 IfxI2c_ProtocolInterruptSource_transmissionEnd = IFX_I2C_PIRQSM_TX_END_OFF, /**< \brief transmission end service request */
113 IfxI2c_ProtocolInterruptSource_receiveMode = IFX_I2C_PIRQSM_RX_OFF /**< \brief receive mode service request */
114 } IfxI2c_ProtocolInterruptSource;
115
116 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
117 * Definition in Ifx_I2C.CLC1.B.EDIS
118 */
119 typedef enum
120 {
121 IfxI2c_SleepMode_enable = 0, /**< \brief enables sleep mode */
122 IfxI2c_SleepMode_disable = 1 /**< \brief disables sleep mode */
123 } IfxI2c_SleepMode;
124
125 /** \} */
126
127 /******************************************************************************/
128 /*-----------------------------Data Structures--------------------------------*/
129 /******************************************************************************/
130
131 /** \addtogroup IfxLld_I2c_Std_structures
132 * \{ */
133 /** \brief Pin Structure
134 */
135 typedef struct
136 {
137 IfxI2c_Scl_InOut *scl;
138 IfxI2c_Sda_InOut *sda;
139 IfxPort_PadDriver padDriver;
140 } IfxI2c_Pins;
141
142 /** \} */
143
144 /** \addtogroup IfxLld_I2c_Std_functions
145 * \{ */
146
147 /******************************************************************************/
148 /*-------------------------Inline Function Prototypes-------------------------*/
149 /******************************************************************************/
150
151 /** \brief Returns if the bus is free
152 */
153 IFX_INLINE boolean IfxI2c_busIsFree(Ifx_I2C *i2c);
154
155 /** \brief clears all DTR interrupt sources
156 * \param i2c pointer to i2c registers
157 * \return None
158 */
159 IFX_INLINE void IfxI2c_clearAllDtrInterruptSources(Ifx_I2C *i2c);
160
161 /** \brief clears all Error Interrupt sources
162 * \param i2c pointer to i2c registers
163 * \return None
164 */
165 IFX_INLINE void IfxI2c_clearAllErrorInterruptSources(Ifx_I2C *i2c);
166
167 /** \brief Clears all Protocol Interrupt sources
168 * \param i2c pointer to i2c registers
169 * \return None
170 */
171 IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources(Ifx_I2C *i2c);
172
173 /** \brief clears burst request interrupt source
174 * \param i2c pointer to i2c registers
175 * \return None
176 */
177 IFX_INLINE void IfxI2c_clearBurstRequestInterruptSource(Ifx_I2C *i2c);
178
179 /** \brief clears the specified source of error interrupt
180 * \param i2c pointer to i2c registers
181 * \param source error interrupt source
182 * \return None
183 */
184 IFX_INLINE void IfxI2c_clearErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source);
185
186 /** \brief clears last burst request interrupt source
187 * \param i2c pointer to i2c registers
188 * \return None
189 */
190 IFX_INLINE void IfxI2c_clearLastBurstRequestInterruptSource(Ifx_I2C *i2c);
191
192 /** \brief clears last single request interrupt source
193 * \param i2c pointer to i2c registers
194 * \return None
195 */
196 IFX_INLINE void IfxI2c_clearLastSingleRequestInterruptSource(Ifx_I2C *i2c);
197
198 /** \brief clears the specified source of protocol interrupt
199 * \param i2c pointer to i2c registers
200 * \param source protocol interrupt source
201 * \return None
202 */
203 IFX_INLINE void IfxI2c_clearProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source);
204
205 /** \brief clears single request interrupt source
206 * \param i2c pointer to i2c registers
207 * \return None
208 */
209 IFX_INLINE void IfxI2c_clearSingleRequestInterruptSource(Ifx_I2C *i2c);
210
211 /** \brief disables burst request interrupt source
212 * \param i2c pointer to i2c registers
213 * \return None
214 */
215 IFX_INLINE void IfxI2c_disableBurstRequestInterruptSource(Ifx_I2C *i2c);
216
217 /** \brief disables the error interrupt flag
218 * \param i2c pointer to i2c registers
219 * \return None
220 */
221 IFX_INLINE void IfxI2c_disableErrorInterruptFlag(Ifx_I2C *i2c);
222
223 /** \brief disables the specified source of error interrupt
224 * \param i2c pointer to i2c registers
225 * \param source error interrupt source
226 * \return None
227 */
228 IFX_INLINE void IfxI2c_disableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source);
229
230 /** \brief disables last burst request interrupt source
231 * \param i2c pointer to i2c registers
232 * \return None
233 */
234 IFX_INLINE void IfxI2c_disableLastBurstRequestInterruptSource(Ifx_I2C *i2c);
235
236 /** \brief disables last single request interrupt source
237 * \param i2c pointer to i2c registers
238 * \return None
239 */
240 IFX_INLINE void IfxI2c_disableLastSingleRequestInterruptSource(Ifx_I2C *i2c);
241
242 /** \brief disables the Protocol interrupt flag
243 * \param i2c pointer to i2c registers
244 * \return None
245 */
246 IFX_INLINE void IfxI2c_disableProtocolInterruptFlag(Ifx_I2C *i2c);
247
248 /** \brief disables the specified source of protocol interrupt
249 * \param i2c pointer to i2c registers
250 * \param source protocol interrupt source
251 * \return None
252 */
253 IFX_INLINE void IfxI2c_disableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source);
254
255 /** \brief disables single request interrupt source
256 * \param i2c pointer to i2c registers
257 * \return None
258 */
259 IFX_INLINE void IfxI2c_disableSingleRequestInterruptSource(Ifx_I2C *i2c);
260
261 /** \brief enables burst request interrupt source
262 * \param i2c pointer to i2c registers
263 * \return None
264 */
265 IFX_INLINE void IfxI2c_enableBurstRequestInterruptSource(Ifx_I2C *i2c);
266
267 /** \brief enables the error interrupt flag
268 * \param i2c pointer to i2c registers
269 * \return None
270 */
271 IFX_INLINE void IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c);
272
273 /** \brief enables the specified source of error interrupt
274 * \param i2c pointer to i2c registers
275 * \param source error interrupt source
276 * \return None
277 */
278 IFX_INLINE void IfxI2c_enableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source);
279
280 /** \brief enables last burst request interrupt source
281 * \param i2c pointer to i2c registers
282 * \return None
283 */
284 IFX_INLINE void IfxI2c_enableLastBurstRequestInterruptSource(Ifx_I2C *i2c);
285
286 /** \brief enables last single request interrupt source
287 * \param i2c pointer to i2c registers
288 * \return None
289 */
290 IFX_INLINE void IfxI2c_enableLastSingleRequestInterruptSource(Ifx_I2C *i2c);
291
292 /** \brief enables the protocol interrupt flag
293 * \param i2c pointer to I2C registers
294 * \return None
295 */
296 IFX_INLINE void IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c);
297
298 /** \brief enables the specified source of protocol interrupt
299 * \param i2c pointer to I2C registers
300 * \param source protocol interrupt source
301 * \return None
302 */
303 IFX_INLINE void IfxI2c_enableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source);
304
305 /** \brief enables single request interrupt source
306 * \param i2c pointer to i2c registers
307 * \return None
308 */
309 IFX_INLINE void IfxI2c_enableSingleRequestInterruptSource(Ifx_I2C *i2c);
310
311 /** \brief Returns the SRC pointer for I2C burst data transfer request interrupt
312 * \param i2c pointer to i2c registers
313 * \return SRC pointer for I2C burst data transfer Service interrupt
314 */
315 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getBurstDataTransferSrcPointer(Ifx_I2C *i2c);
316
317 /** \brief returns the status of burst request interrupt source status
318 * \param i2c pointer to i2c registers
319 * \return status
320 */
321 IFX_INLINE boolean IfxI2c_getBurstRequestInterruptSourceStatus(Ifx_I2C *i2c);
322
323 /**
324 * \param i2c pointer to i2c registers
325 * \return BusStatus
326 */
327 IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus(Ifx_I2C *i2c);
328
329 /** \brief returns the current status of error interrupt flag
330 * \param i2c pointer to i2c registers
331 * \return status
332 */
333 IFX_INLINE boolean IfxI2c_getErrorInterruptFlagStatus(Ifx_I2C *i2c);
334
335 /** \brief returns the status of the error interrupt source
336 * \param i2c pointer to i2c registers
337 * \param source error interrupt source
338 * \return status
339 */
340 IFX_INLINE boolean IfxI2c_getErrorInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source);
341
342 /** \brief Returns the SRC pointer for I2C Error interrupt
343 * \param i2c pointer to i2c registers
344 * \return SRC pointer for I2C Error Service interrupt
345 */
346 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getErrorSrcPointer(Ifx_I2C *i2c);
347
348 /** \brief Returns the SRC pointer for I2C last burst data transfer request interrupt
349 * \param i2c pointer to i2c registers
350 * \return SRC pointer for I2C last burst data transfer Service interrupt
351 */
352 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getLastBurstDataTransferSrcPointer(Ifx_I2C *i2c);
353
354 /** \brief returns the status of last burst request interrupt source status
355 * \param i2c pointer to i2c registers
356 * \return status
357 */
358 IFX_INLINE boolean IfxI2c_getLastBurstRequestInterruptSourceStatus(Ifx_I2C *i2c);
359
360 /** \brief Returns the SRC pointer for I2C last single data transfer request interrupt
361 * \param i2c pointer to i2c registers
362 * \return SRC pointer for I2C last single data transfer Service interrupt
363 */
364 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getLastSingleDataTransferSrcPointer(Ifx_I2C *i2c);
365
366 /** \brief returns the status of last single request interrupt source status
367 * \param i2c pointer to i2c registers
368 * \return status
369 */
370 IFX_INLINE boolean IfxI2c_getLastSingleRequestInterruptSourceStatus(Ifx_I2C *i2c);
371
372 /** \brief returns the current raw status of protocol interrupt
373 * \param i2c pointer to i2c registers
374 * \return status
375 */
376 IFX_INLINE boolean IfxI2c_getProtocolInterruptFlagStatus(Ifx_I2C *i2c);
377
378 /** \brief returns the status of specified protocol interrupt source
379 * \param i2c pointer to i2c registers
380 * \param source protocol interrupt source
381 * \return status
382 */
383 IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source);
384
385 /** \brief Returns the SRC pointer for I2C Protocol interrupt
386 * \param i2c pointer to i2c registers
387 * \return SRC pointer for I2C Protocol Service interrupt
388 */
389 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getProtocolSrcPointer(Ifx_I2C *i2c);
390
391 /** \brief Returns the SRC pointer for I2C single data transfer request interrupt
392 * \param i2c pointer to i2c registers
393 * \return SRC pointer for I2C single data transfer Service interrupt
394 */
395 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getSingleDataTransferSrcPointer(Ifx_I2C *i2c);
396
397 /** \brief returns the status of single request interrupt source status
398 * \param i2c pointer to i2c registers
399 * \return status
400 */
401 IFX_INLINE boolean IfxI2c_getSingleRequestInterruptSourceStatus(Ifx_I2C *i2c);
402
403 /** \brief Returns if the Fifo is requesting new data
404 */
405 IFX_INLINE boolean IfxI2c_isFifoRequest(Ifx_I2C *i2c);
406
407 /**
408 * \param i2c pointer to i2c registers
409 * \return None
410 */
411 IFX_INLINE void IfxI2c_run(Ifx_I2C *i2c);
412
413 /** \brief selects the pin
414 * \param i2c pointer to i2c registers
415 * \param pisel pin to be select
416 * \return None
417 */
418 IFX_INLINE void IfxI2c_setPinSelection(Ifx_I2C *i2c, IfxI2c_PinSelect pisel);
419
420 /** \brief Sets the number of bytes to be received
421 * \param i2c pointer to i2c registers
422 * \param size number of packets
423 * \return None
424 */
425 IFX_INLINE void IfxI2c_setReceivePacketSize(Ifx_I2C *i2c, Ifx_SizeT size);
426
427 /**
428 * \param i2c pointer to i2c registers
429 * \param address device address
430 * \return None
431 */
432 IFX_INLINE void IfxI2c_setSlaveDeviceAddress(Ifx_I2C *i2c, uint16 address);
433
434 /** \brief Sets the sensitivity of the module to sleep signal
435 * \param i2c pointer to i2c registers
436 * \param mode mode selection (enable / disable)
437 * \return None
438 */
439 IFX_INLINE void IfxI2c_setSleepMode(Ifx_I2C *i2c, IfxI2c_SleepMode mode);
440
441 /** \brief Sets the number of bytes to be tansmitted
442 * \param i2c pointer to i2c registers
443 * \param size number of packets
444 * \return None
445 */
446 IFX_INLINE void IfxI2c_setTransmitPacketSize(Ifx_I2C *i2c, Ifx_SizeT size);
447
448 /**
449 * \param i2c pointer to i2c registers
450 * \return None
451 */
452 IFX_INLINE void IfxI2c_stop(Ifx_I2C *i2c);
453
454 /**
455 * \param i2c pointer to i2c registers
456 * \return None
457 */
458 IFX_INLINE void IfxI2c_waitBusFree(Ifx_I2C *i2c);
459
460 /** \brief Writes a packet (4 bytes) into the Fifo
461 * \param i2c pointer to i2c registers
462 * \param packet specifies the byte to be transfer
463 * \return None
464 */
465 IFX_INLINE void IfxI2c_writeFifo(Ifx_I2C *i2c, uint32 packet);
466
467 /******************************************************************************/
468 /*-------------------------Global Function Prototypes-------------------------*/
469 /******************************************************************************/
470
471 /** \brief Configures the Module as Master
472 * \param i2c pointer to i2c registers
473 * \return None
474 */
475 IFX_EXTERN void IfxI2c_configureAsMaster(Ifx_I2C *i2c);
476
477 /** \brief Disables the I2c Module
478 * \param i2c pointer to i2c registers
479 * \return None
480 */
481 IFX_EXTERN void IfxI2c_disableModule(Ifx_I2C *i2c);
482
483 /** \brief Enables the Burst data transfer interrupt
484 * \param i2c pointer to i2c registers
485 * \param typeOfService Type of Service (Cpu or DMA)
486 * \param priority priority of the interrupt
487 * \return None
488 */
489 IFX_EXTERN void IfxI2c_enableBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority);
490
491 /** \brief Enables the Error interrupt
492 * \param i2c pointer to i2c registers
493 * \param typeOfService Type of Service (Cpu or DMA)
494 * \param priority priority of the interrupt
495 * \return None
496 */
497 IFX_EXTERN void IfxI2c_enableErrorInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority);
498
499 /** \brief enables the last burst data transfer interrupt
500 * \param i2c pointer to i2c registers
501 * \param typeOfService Type of Service (Cpu or DMA)
502 * \param priority priority of the interrupt
503 * \return None
504 */
505 IFX_EXTERN void IfxI2c_enableLastBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority);
506
507 /** \brief enables the last single data transfer interrupt
508 * \param i2c pointer to i2c registers
509 * \param typeOfService Type of Service (Cpu or DMA)
510 * \param priority priority of the interrupt
511 * \return None
512 */
513 IFX_EXTERN void IfxI2c_enableLastSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority);
514
515 /** \brief Enables the I2c Module
516 * \param i2c pointer to i2c registers
517 * \return None
518 */
519 IFX_EXTERN void IfxI2c_enableModule(Ifx_I2C *i2c);
520
521 /** \brief Enables the protocol interrupt
522 * \param i2c pointer to i2c registers
523 * \param typeOfService Type of Service (Cpu or DMA)
524 * \param priority Priority of the interrupt
525 * \return None
526 */
527 IFX_EXTERN void IfxI2c_enableProtocolInterrupt(void *i2c, IfxSrc_Tos typeOfService, uint16 priority);
528
529 /** \brief enables the single data transfer interrupt
530 * \param i2c pointer to i2c registers
531 * \param typeOfService Type of Service (Cpu or DMA)
532 * \param priority priority of the interrupt
533 * \return None
534 */
535 IFX_EXTERN void IfxI2c_enableSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority);
536
537 /**
538 * \param i2c Resource index of the I2c
539 * \return I2C module register address
540 */
541 IFX_EXTERN Ifx_I2C *IfxI2c_getAddress(IfxI2c_Index i2c);
542
543 /** \brief Returns the real Baudrate
544 * \return Baudrate
545 */
546 IFX_EXTERN float32 IfxI2c_getBaudrate(Ifx_I2C *i2c);
547
548 /** \brief API to get the resource index of the I2C specified.
549 * \param i2c Pointer to the I2C HW module (register memory map)
550 * \return Resource index of the I2C
551 */
552 IFX_EXTERN IfxI2c_Index IfxI2c_getIndex(Ifx_I2C *i2c);
553
554 /**
555 * \return None
556 */
557 IFX_EXTERN void IfxI2c_initSclSdaPin(const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver);
558
559 /** \brief Releases the bus, i.e puts a stop condition on the bus
560 * \return None
561 */
562 IFX_EXTERN void IfxI2c_releaseBus(Ifx_I2C *i2c);
563
564 /**
565 * \return None
566 */
567 IFX_EXTERN void IfxI2c_resetFifo(Ifx_I2C *i2c);
568
569 /** \brief resets the I2c kernel
570 * \param i2c pointer to i2c registers
571 * \return None
572 */
573 IFX_EXTERN void IfxI2c_resetModule(Ifx_I2C *i2c);
574
575 /** \brief Calculates the desired baudrate
576 * \param i2c pointer to i2c registers
577 * \param baudrate specifies the baud rate
578 * \return None
579 */
580 IFX_EXTERN void IfxI2c_setBaudrate(Ifx_I2C *i2c, float32 baudrate);
581
582 /** \} */
583
584 /******************************************************************************/
585 /*---------------------Inline Function Implementations------------------------*/
586 /******************************************************************************/
587
588 IFX_INLINE boolean IfxI2c_busIsFree(Ifx_I2C *i2c)
589 {
590 boolean free = FALSE;
591
592 if (i2c->BUSSTAT.B.BS == IfxI2c_BusStatus_idle)
593 {
594 free = TRUE;
595 }
596
597 return free;
598 }
599
600
601 IFX_INLINE void IfxI2c_clearAllDtrInterruptSources(Ifx_I2C *i2c)
602 {
603 i2c->ICR.U = (1 << IFX_I2C_ICR_LSREQ_INT_OFF) | (1 << IFX_I2C_ICR_SREQ_INT_OFF) | (1 << IFX_I2C_ICR_LBREQ_INT_OFF) | (1 << IFX_I2C_ICR_BREQ_INT_OFF);
604 }
605
606
607 IFX_INLINE void IfxI2c_clearAllErrorInterruptSources(Ifx_I2C *i2c)
608 {
609 i2c->ERRIRQSC.U = (1 << IFX_I2C_ERRIRQSC_RXF_UFL_OFF) | (1 << IFX_I2C_ERRIRQSC_RXF_OFL_OFF) | (1 << IFX_I2C_ERRIRQSC_TXF_UFL_OFF) | (1 << IFX_I2C_ERRIRQSC_TXF_OFL_OFF);
610 }
611
612
613 IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources(Ifx_I2C *i2c)
614 {
615 i2c->PIRQSC.U = (1 << IFX_I2C_PIRQSC_AM_OFF) | (1 << IFX_I2C_PIRQSC_GC_OFF) | (1 << IFX_I2C_PIRQSC_MC_OFF) | (1 << IFX_I2C_PIRQSC_AL_OFF) | (1 << IFX_I2C_PIRQSC_NACK_OFF) | (1 << IFX_I2C_PIRQSC_TX_END_OFF) | (1 << IFX_I2C_PIRQSC_RX_OFF);
616 }
617
618
619 IFX_INLINE void IfxI2c_clearBurstRequestInterruptSource(Ifx_I2C *i2c)
620 {
621 i2c->ICR.B.BREQ_INT = 1;
622 }
623
624
625 IFX_INLINE void IfxI2c_clearErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
626 {
627 i2c->ERRIRQSC.U = (1 << source);
628 }
629
630
631 IFX_INLINE void IfxI2c_clearLastBurstRequestInterruptSource(Ifx_I2C *i2c)
632 {
633 i2c->ICR.B.LBREQ_INT = 1;
634 }
635
636
637 IFX_INLINE void IfxI2c_clearLastSingleRequestInterruptSource(Ifx_I2C *i2c)
638 {
639 i2c->ICR.B.LSREQ_INT = 1;
640 }
641
642
643 IFX_INLINE void IfxI2c_clearProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
644 {
645 i2c->PIRQSC.U = (1 << source);
646 }
647
648
649 IFX_INLINE void IfxI2c_clearSingleRequestInterruptSource(Ifx_I2C *i2c)
650 {
651 i2c->ICR.B.SREQ_INT = 1;
652 }
653
654
655 IFX_INLINE void IfxI2c_disableBurstRequestInterruptSource(Ifx_I2C *i2c)
656 {
657 i2c->IMSC.B.BREQ_INT = 0;
658 }
659
660
661 IFX_INLINE void IfxI2c_disableErrorInterruptFlag(Ifx_I2C *i2c)
662 {
663 i2c->IMSC.B.I2C_ERR_INT = 0;
664 }
665
666
667 IFX_INLINE void IfxI2c_disableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
668 {
669 i2c->ERRIRQSM.U &= ~(1 << source);
670 }
671
672
673 IFX_INLINE void IfxI2c_disableLastBurstRequestInterruptSource(Ifx_I2C *i2c)
674 {
675 i2c->IMSC.B.LBREQ_INT = 0;
676 }
677
678
679 IFX_INLINE void IfxI2c_disableLastSingleRequestInterruptSource(Ifx_I2C *i2c)
680 {
681 i2c->IMSC.B.LSREQ_INT = 0;
682 }
683
684
685 IFX_INLINE void IfxI2c_disableProtocolInterruptFlag(Ifx_I2C *i2c)
686 {
687 i2c->IMSC.B.I2C_P_INT = 0;
688 }
689
690
691 IFX_INLINE void IfxI2c_disableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
692 {
693 i2c->PIRQSM.U &= ~(1 << source);
694 }
695
696
697 IFX_INLINE void IfxI2c_disableSingleRequestInterruptSource(Ifx_I2C *i2c)
698 {
699 i2c->IMSC.B.SREQ_INT = 0;
700 }
701
702
703 IFX_INLINE void IfxI2c_enableBurstRequestInterruptSource(Ifx_I2C *i2c)
704 {
705 i2c->IMSC.B.BREQ_INT = 1;
706 }
707
708
709 IFX_INLINE void IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c)
710 {
711 i2c->IMSC.B.I2C_ERR_INT = 1;
712 }
713
714
715 IFX_INLINE void IfxI2c_enableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
716 {
717 i2c->ERRIRQSM.U |= (1 << source);
718 }
719
720
721 IFX_INLINE void IfxI2c_enableLastBurstRequestInterruptSource(Ifx_I2C *i2c)
722 {
723 i2c->IMSC.B.LBREQ_INT = 1;
724 }
725
726
727 IFX_INLINE void IfxI2c_enableLastSingleRequestInterruptSource(Ifx_I2C *i2c)
728 {
729 i2c->IMSC.B.LSREQ_INT = 1;
730 }
731
732
733 IFX_INLINE void IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c)
734 {
735 i2c->IMSC.B.I2C_P_INT = 1;
736 }
737
738
739 IFX_INLINE void IfxI2c_enableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
740 {
741 i2c->PIRQSM.U |= (1 << source);
742 }
743
744
745 IFX_INLINE void IfxI2c_enableSingleRequestInterruptSource(Ifx_I2C *i2c)
746 {
747 i2c->IMSC.B.SREQ_INT = 1;
748 }
749
750
751 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getBurstDataTransferSrcPointer(Ifx_I2C *i2c)
752 {
753 if (i2c == &MODULE_I2C0)
754 {
755 return &MODULE_SRC.I2C.I2C[0].BREQ;
756 }
757 else
758 {
759 return &MODULE_SRC.I2C.I2C[1].BREQ;
760 }
761 }
762
763
764 IFX_INLINE boolean IfxI2c_getBurstRequestInterruptSourceStatus(Ifx_I2C *i2c)
765 {
766 return i2c->RIS.B.BREQ_INT;
767 }
768
769
770 IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus(Ifx_I2C *i2c)
771 {
772 return (IfxI2c_BusStatus)i2c->BUSSTAT.B.BS;
773 }
774
775
776 IFX_INLINE boolean IfxI2c_getErrorInterruptFlagStatus(Ifx_I2C *i2c)
777 {
778 return i2c->RIS.B.I2C_ERR_INT;
779 }
780
781
782 IFX_INLINE boolean IfxI2c_getErrorInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
783 {
784 return (i2c->ERRIRQSS.U & (1 << source)) ? TRUE : FALSE;
785 }
786
787
788 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getErrorSrcPointer(Ifx_I2C *i2c)
789 {
790 if (i2c == &MODULE_I2C0)
791 {
792 return &MODULE_SRC.I2C.I2C[0].ERR;
793 }
794 else
795 {
796 return &MODULE_SRC.I2C.I2C[1].ERR;
797 }
798 }
799
800
801 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getLastBurstDataTransferSrcPointer(Ifx_I2C *i2c)
802 {
803 if (i2c == &MODULE_I2C0)
804 {
805 return &MODULE_SRC.I2C.I2C[0].LBREQ;
806 }
807 else
808 {
809 return &MODULE_SRC.I2C.I2C[1].LBREQ;
810 }
811 }
812
813
814 IFX_INLINE boolean IfxI2c_getLastBurstRequestInterruptSourceStatus(Ifx_I2C *i2c)
815 {
816 return i2c->RIS.B.LBREQ_INT;
817 }
818
819
820 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getLastSingleDataTransferSrcPointer(Ifx_I2C *i2c)
821 {
822 if (i2c == &MODULE_I2C0)
823 {
824 return &MODULE_SRC.I2C.I2C[0].LSREQ;
825 }
826 else
827 {
828 return &MODULE_SRC.I2C.I2C[1].LSREQ;
829 }
830 }
831
832
833 IFX_INLINE boolean IfxI2c_getLastSingleRequestInterruptSourceStatus(Ifx_I2C *i2c)
834 {
835 return i2c->RIS.B.LSREQ_INT;
836 }
837
838
839 IFX_INLINE boolean IfxI2c_getProtocolInterruptFlagStatus(Ifx_I2C *i2c)
840 {
841 return i2c->RIS.B.I2C_P_INT;
842 }
843
844
845 IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
846 {
847 return (i2c->PIRQSS.U & (1 << source)) ? TRUE : FALSE;
848 }
849
850
851 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getProtocolSrcPointer(Ifx_I2C *i2c)
852 {
853 if (i2c == &MODULE_I2C0)
854 {
855 return &MODULE_SRC.I2C.I2C[0].P;
856 }
857 else
858 {
859 return &MODULE_SRC.I2C.I2C[1].P;
860 }
861 }
862
863
864 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getSingleDataTransferSrcPointer(Ifx_I2C *i2c)
865 {
866 if (i2c == &MODULE_I2C0)
867 {
868 return &MODULE_SRC.I2C.I2C[0].SREQ;
869 }
870 else
871 {
872 return &MODULE_SRC.I2C.I2C[1].SREQ;
873 }
874 }
875
876
877 IFX_INLINE boolean IfxI2c_getSingleRequestInterruptSourceStatus(Ifx_I2C *i2c)
878 {
879 return i2c->RIS.B.SREQ_INT;
880 }
881
882
883 IFX_INLINE boolean IfxI2c_isFifoRequest(Ifx_I2C *i2c)
884 {
885 return i2c->RIS.U & 0x0F ? TRUE : FALSE;
886 }
887
888
889 IFX_INLINE void IfxI2c_run(Ifx_I2C *i2c)
890 {
891 i2c->RUNCTRL.U = 1;
892 }
893
894
895 IFX_INLINE void IfxI2c_setPinSelection(Ifx_I2C *i2c, IfxI2c_PinSelect pisel)
896 {
897 i2c->GPCTL.B.PISEL = pisel;
898 }
899
900
901 IFX_INLINE void IfxI2c_setReceivePacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
902 {
903 i2c->MRPSCTRL.B.MRPS = size;
904 }
905
906
907 IFX_INLINE void IfxI2c_setSlaveDeviceAddress(Ifx_I2C *i2c, uint16 address)
908 {
909 i2c->ADDRCFG.B.ADR = address;
910 }
911
912
913 IFX_INLINE void IfxI2c_setSleepMode(Ifx_I2C *i2c, IfxI2c_SleepMode mode)
914 {
915 i2c->CLC1.B.EDIS = mode;
916 }
917
918
919 IFX_INLINE void IfxI2c_setTransmitPacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
920 {
921 i2c->TPSCTRL.B.TPS = size;
922 }
923
924
925 IFX_INLINE void IfxI2c_stop(Ifx_I2C *i2c)
926 {
927 i2c->RUNCTRL.U = 0;
928 }
929
930
931 IFX_INLINE void IfxI2c_waitBusFree(Ifx_I2C *i2c)
932 {
933 while (IfxI2c_getBusStatus(i2c) != IfxI2c_BusStatus_idle)
934 {}
935 }
936
937
938 IFX_INLINE void IfxI2c_writeFifo(Ifx_I2C *i2c, uint32 packet)
939 {
940 i2c->TXD.U = packet;
941 }
942
943
944 #endif /* IFXI2C_H */
IfxI2c_getProtocolInterruptFlagStatus
IFX_INLINE boolean IfxI2c_getProtocolInterruptFlagStatus(Ifx_I2C *i2c)
returns the current raw status of protocol interrupt
Definition: IfxI2c.h:839
IfxI2c_enableLastBurstDataTransferInterrupt
IFX_EXTERN void IfxI2c_enableLastBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last burst data transfer interrupt
Definition: IfxI2c.c:107
IfxI2c_enableErrorInterrupt
IFX_EXTERN void IfxI2c_enableErrorInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Error interrupt.
Definition: IfxI2c.c:98
IfxI2c_clearLastSingleRequestInterruptSource
IFX_INLINE void IfxI2c_clearLastSingleRequestInterruptSource(Ifx_I2C *i2c)
clears last single request interrupt source
Definition: IfxI2c.h:637
IfxI2c_Pins::padDriver
IfxPort_PadDriver padDriver
Definition: IfxI2c.h:139
IfxI2c_writeFifo
IFX_INLINE void IfxI2c_writeFifo(Ifx_I2C *i2c, uint32 packet)
Writes a packet (4 bytes) into the Fifo.
Definition: IfxI2c.h:938
IfxI2c_releaseBus
IFX_EXTERN void IfxI2c_releaseBus(Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus.
Definition: IfxI2c.c:231
IfxI2c_BusStatus_remoteSlave
remote Slave
Definition: IfxI2c.h:76
IfxI2c_BusStatus
IfxI2c_BusStatus
Definition: IfxI2c.h:71
IfxI2c_BusStatus_busyMaster
busy Master
Definition: IfxI2c.h:75
IfxI2c_setReceivePacketSize
IFX_INLINE void IfxI2c_setReceivePacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be received.
Definition: IfxI2c.h:901
IfxI2c_busIsFree
IFX_INLINE boolean IfxI2c_busIsFree(Ifx_I2C *i2c)
Returns if the bus is free.
Definition: IfxI2c.h:588
IfxI2c_getBusStatus
IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus(Ifx_I2C *i2c)
Definition: IfxI2c.h:770
IfxI2c_disableBurstRequestInterruptSource
IFX_INLINE void IfxI2c_disableBurstRequestInterruptSource(Ifx_I2C *i2c)
disables burst request interrupt source
Definition: IfxI2c.h:655
IfxI2c_PinSelect_h
Definition: IfxI2c.h:99
IfxI2c_PinSelect
IfxI2c_PinSelect
Definition: IfxI2c.h:90
IfxI2c_ErrorInterruptSource_rxFifoUnderflow
receive fifo underflow service request
Definition: IfxI2c.h:84
IfxI2c_setBaudrate
IFX_EXTERN void IfxI2c_setBaudrate(Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate.
Definition: IfxI2c.c:279
IfxI2c_enableSingleDataTransferInterrupt
IFX_EXTERN void IfxI2c_enableSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the single data transfer interrupt
Definition: IfxI2c.c:163
IfxI2c_clearBurstRequestInterruptSource
IFX_INLINE void IfxI2c_clearBurstRequestInterruptSource(Ifx_I2C *i2c)
clears burst request interrupt source
Definition: IfxI2c.h:619
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxI2c_getLastBurstDataTransferSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getLastBurstDataTransferSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C last burst data transfer request interrupt.
Definition: IfxI2c.h:801
float32
float float32
Definition: Platform_Types.h:170
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxI2c_getBaudrate
IFX_EXTERN float32 IfxI2c_getBaudrate(Ifx_I2C *i2c)
Returns the real Baudrate.
Definition: IfxI2c.c:189
IfxI2c_SleepMode_enable
enables sleep mode
Definition: IfxI2c.h:121
IfxI2c_setSlaveDeviceAddress
IFX_INLINE void IfxI2c_setSlaveDeviceAddress(Ifx_I2C *i2c, uint16 address)
Definition: IfxI2c.h:907
IfxI2c_setSleepMode
IFX_INLINE void IfxI2c_setSleepMode(Ifx_I2C *i2c, IfxI2c_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxI2c.h:913
IfxI2c_ProtocolInterruptSource_generalCall
general call service request
Definition: IfxI2c.h:108
IfxSrc.h
SRC basic functionality.
IfxI2c_getProtocolSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getProtocolSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C Protocol interrupt.
Definition: IfxI2c.h:851
IfxI2c_Pins::scl
IfxI2c_Scl_InOut * scl
Definition: IfxI2c.h:137
IfxI2c_Sda_InOut
SDA input mapping structure.
Definition: IfxI2c_PinMap.h:65
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxI2c_getBurstRequestInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getBurstRequestInterruptSourceStatus(Ifx_I2C *i2c)
returns the status of burst request interrupt source status
Definition: IfxI2c.h:764
IfxI2c_resetFifo
IFX_EXTERN void IfxI2c_resetFifo(Ifx_I2C *i2c)
Definition: IfxI2c.c:247
IfxI2c_PinSelect_b
Definition: IfxI2c.h:93
IfxI2c_disableErrorInterruptSource
IFX_INLINE void IfxI2c_disableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
disables the specified source of error interrupt
Definition: IfxI2c.h:667
IfxI2c_Index
IfxI2c_Index
List of the available I2c interfaces.
Definition: IfxI2c_cfg.h:77
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxI2c_ErrorInterruptSource_txFifoOverflow
transmit fifo overflow service request
Definition: IfxI2c.h:87
IfxI2c_getAddress
IFX_EXTERN Ifx_I2C * IfxI2c_getAddress(IfxI2c_Index i2c)
Definition: IfxI2c.c:172
IfxI2c_enableBurstDataTransferInterrupt
IFX_EXTERN void IfxI2c_enableBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Burst data transfer interrupt.
Definition: IfxI2c.c:89
IfxI2c_enableLastSingleDataTransferInterrupt
IFX_EXTERN void IfxI2c_enableLastSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last single data transfer interrupt
Definition: IfxI2c.c:116
IfxI2c_enableProtocolInterruptFlag
IFX_INLINE void IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c)
enables the protocol interrupt flag
Definition: IfxI2c.h:733
IfxScuWdt.h
SCU basic functionality.
IfxI2c_getLastSingleRequestInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getLastSingleRequestInterruptSourceStatus(Ifx_I2C *i2c)
returns the status of last single request interrupt source status
Definition: IfxI2c.h:833
IfxI2c_enableBurstRequestInterruptSource
IFX_INLINE void IfxI2c_enableBurstRequestInterruptSource(Ifx_I2C *i2c)
enables burst request interrupt source
Definition: IfxI2c.h:703
IfxI2c_PinSelect_g
Definition: IfxI2c.h:98
IfxI2c_disableErrorInterruptFlag
IFX_INLINE void IfxI2c_disableErrorInterruptFlag(Ifx_I2C *i2c)
disables the error interrupt flag
Definition: IfxI2c.h:661
IfxI2c_disableLastBurstRequestInterruptSource
IFX_INLINE void IfxI2c_disableLastBurstRequestInterruptSource(Ifx_I2C *i2c)
disables last burst request interrupt source
Definition: IfxI2c.h:673
IfxI2c_disableModule
IFX_EXTERN void IfxI2c_disableModule(Ifx_I2C *i2c)
Disables the I2c Module.
Definition: IfxI2c.c:74
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxI2c_PinMap.h
I2C I/O map.
IfxI2c_ErrorInterruptSource_txFifoUnderflow
transmit fifo underflow service request
Definition: IfxI2c.h:86
IfxI2c_SleepMode
IfxI2c_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_I2C.CLC1.B.EDIS.
Definition: IfxI2c.h:119
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxI2c_enableSingleRequestInterruptSource
IFX_INLINE void IfxI2c_enableSingleRequestInterruptSource(Ifx_I2C *i2c)
enables single request interrupt source
Definition: IfxI2c.h:745
IfxI2c_configureAsMaster
IFX_EXTERN void IfxI2c_configureAsMaster(Ifx_I2C *i2c)
Configures the Module as Master.
Definition: IfxI2c.c:54
IfxI2c_ProtocolInterruptSource_receiveMode
receive mode service request
Definition: IfxI2c.h:113
IfxI2c_clearErrorInterruptSource
IFX_INLINE void IfxI2c_clearErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
clears the specified source of error interrupt
Definition: IfxI2c.h:625
IfxI2c_isFifoRequest
IFX_INLINE boolean IfxI2c_isFifoRequest(Ifx_I2C *i2c)
Returns if the Fifo is requesting new data.
Definition: IfxI2c.h:883
IfxI2c_enableErrorInterruptSource
IFX_INLINE void IfxI2c_enableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
enables the specified source of error interrupt
Definition: IfxI2c.h:715
IfxI2c_ErrorInterruptSource_rxFifoOverflow
receive fifo overflow service request
Definition: IfxI2c.h:85
IfxI2c_getSingleDataTransferSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getSingleDataTransferSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C single data transfer request interrupt.
Definition: IfxI2c.h:864
IfxI2c_enableProtocolInterrupt
IFX_EXTERN void IfxI2c_enableProtocolInterrupt(void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the protocol interrupt.
Definition: IfxI2c.c:154
IfxI2c_cfg.h
I2C on-chip implementation data.
IfxI2c_enableModule
IFX_EXTERN void IfxI2c_enableModule(Ifx_I2C *i2c)
Enables the I2c Module.
Definition: IfxI2c.c:125
IfxI2c_getErrorInterruptFlagStatus
IFX_INLINE boolean IfxI2c_getErrorInterruptFlagStatus(Ifx_I2C *i2c)
returns the current status of error interrupt flag
Definition: IfxI2c.h:776
IfxI2c_ProtocolInterruptSource_arbitrationLost
arbitration lost service request
Definition: IfxI2c.h:110
IfxI2c_clearProtocolInterruptSource
IFX_INLINE void IfxI2c_clearProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
clears the specified source of protocol interrupt
Definition: IfxI2c.h:643
IfxI2c_clearAllProtocolInterruptSources
IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources(Ifx_I2C *i2c)
Clears all Protocol Interrupt sources.
Definition: IfxI2c.h:613
IfxI2c_getLastBurstRequestInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getLastBurstRequestInterruptSourceStatus(Ifx_I2C *i2c)
returns the status of last burst request interrupt source status
Definition: IfxI2c.h:814
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxI2c_ErrorInterruptSource
IfxI2c_ErrorInterruptSource
enable error interrupt request source Definition in Ifx.I2C.ERRIRQSM.U
Definition: IfxI2c.h:82
IfxI2c_initSclSdaPin
IFX_EXTERN void IfxI2c_initSclSdaPin(const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
Definition: IfxI2c.c:220
IfxI2c_enableLastSingleRequestInterruptSource
IFX_INLINE void IfxI2c_enableLastSingleRequestInterruptSource(Ifx_I2C *i2c)
enables last single request interrupt source
Definition: IfxI2c.h:727
IfxI2c_clearAllDtrInterruptSources
IFX_INLINE void IfxI2c_clearAllDtrInterruptSources(Ifx_I2C *i2c)
clears all DTR interrupt sources
Definition: IfxI2c.h:601
IfxI2c_disableLastSingleRequestInterruptSource
IFX_INLINE void IfxI2c_disableLastSingleRequestInterruptSource(Ifx_I2C *i2c)
disables last single request interrupt source
Definition: IfxI2c.h:679
IfxI2c_disableSingleRequestInterruptSource
IFX_INLINE void IfxI2c_disableSingleRequestInterruptSource(Ifx_I2C *i2c)
disables single request interrupt source
Definition: IfxI2c.h:697
IfxI2c_Scl_InOut
SCL input mapping structure.
Definition: IfxI2c_PinMap.h:56
IfxI2c_getProtocolInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
returns the status of specified protocol interrupt source
Definition: IfxI2c.h:845
IfxI2c_disableProtocolInterruptFlag
IFX_INLINE void IfxI2c_disableProtocolInterruptFlag(Ifx_I2C *i2c)
disables the Protocol interrupt flag
Definition: IfxI2c.h:685
IfxI2c_waitBusFree
IFX_INLINE void IfxI2c_waitBusFree(Ifx_I2C *i2c)
Definition: IfxI2c.h:931
IfxI2c_getSingleRequestInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getSingleRequestInterruptSourceStatus(Ifx_I2C *i2c)
returns the status of single request interrupt source status
Definition: IfxI2c.h:877
IfxI2c_SleepMode_disable
disables sleep mode
Definition: IfxI2c.h:122
IfxI2c_enableProtocolInterruptSource
IFX_INLINE void IfxI2c_enableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
enables the specified source of protocol interrupt
Definition: IfxI2c.h:739
IfxI2c_BusStatus_started
started
Definition: IfxI2c.h:74
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxI2c_PinSelect_f
Definition: IfxI2c.h:97
IfxI2c_stop
IFX_INLINE void IfxI2c_stop(Ifx_I2C *i2c)
Definition: IfxI2c.h:925
IfxI2c_getErrorInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getErrorInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
returns the status of the error interrupt source
Definition: IfxI2c.h:782
IfxI2c_ProtocolInterruptSource
IfxI2c_ProtocolInterruptSource
enable protocol interrupt source Definition in Ifx.I2C.PIRQSM.U
Definition: IfxI2c.h:105
IfxI2c_getBurstDataTransferSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getBurstDataTransferSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C burst data transfer request interrupt.
Definition: IfxI2c.h:751
IfxI2c_getIndex
IFX_EXTERN IfxI2c_Index IfxI2c_getIndex(Ifx_I2C *i2c)
API to get the resource index of the I2C specified.
Definition: IfxI2c.c:200
IfxI2c_getErrorSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getErrorSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C Error interrupt.
Definition: IfxI2c.h:788
IfxScuCcu.h
SCU basic functionality.
IfxI2c_Pins
Pin Structure.
Definition: IfxI2c.h:135
IfxI2c_Pins::sda
IfxI2c_Sda_InOut * sda
Definition: IfxI2c.h:138
IfxI2c_resetModule
IFX_EXTERN void IfxI2c_resetModule(Ifx_I2C *i2c)
resets the I2c kernel
Definition: IfxI2c.c:260
IfxI2c_ProtocolInterruptSource_transmissionEnd
transmission end service request
Definition: IfxI2c.h:112
IfxI2c_run
IFX_INLINE void IfxI2c_run(Ifx_I2C *i2c)
Definition: IfxI2c.h:889
IfxI2c_ProtocolInterruptSource_addressMatch
address match service request
Definition: IfxI2c.h:107
IfxI2c_PinSelect_a
Definition: IfxI2c.h:92
IfxI2c_enableLastBurstRequestInterruptSource
IFX_INLINE void IfxI2c_enableLastBurstRequestInterruptSource(Ifx_I2C *i2c)
enables last burst request interrupt source
Definition: IfxI2c.h:721
IfxI2c_clearAllErrorInterruptSources
IFX_INLINE void IfxI2c_clearAllErrorInterruptSources(Ifx_I2C *i2c)
clears all Error Interrupt sources
Definition: IfxI2c.h:607
IfxI2c_setTransmitPacketSize
IFX_INLINE void IfxI2c_setTransmitPacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be tansmitted.
Definition: IfxI2c.h:919
IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived
not acknowledge received service request
Definition: IfxI2c.h:111
IfxI2c_clearLastBurstRequestInterruptSource
IFX_INLINE void IfxI2c_clearLastBurstRequestInterruptSource(Ifx_I2C *i2c)
clears last burst request interrupt source
Definition: IfxI2c.h:631
IfxI2c_enableErrorInterruptFlag
IFX_INLINE void IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c)
enables the error interrupt flag
Definition: IfxI2c.h:709
IfxI2c_clearSingleRequestInterruptSource
IFX_INLINE void IfxI2c_clearSingleRequestInterruptSource(Ifx_I2C *i2c)
clears single request interrupt source
Definition: IfxI2c.h:649
IfxI2c_PinSelect_d
Definition: IfxI2c.h:95
IfxI2c_PinSelect_e
Definition: IfxI2c.h:96
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxI2c_BusStatus_idle
idle
Definition: IfxI2c.h:73
IfxI2c_setPinSelection
IFX_INLINE void IfxI2c_setPinSelection(Ifx_I2C *i2c, IfxI2c_PinSelect pisel)
selects the pin
Definition: IfxI2c.h:895
IfxI2c_ProtocolInterruptSource_masterCode
master code service request
Definition: IfxI2c.h:109
IfxI2c_PinSelect_c
Definition: IfxI2c.h:94
IfxI2c_disableProtocolInterruptSource
IFX_INLINE void IfxI2c_disableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
disables the specified source of protocol interrupt
Definition: IfxI2c.h:691
IfxI2c_getLastSingleDataTransferSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getLastSingleDataTransferSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C last single data transfer request interrupt.
Definition: IfxI2c.h:820


iLLD_TC26B: IfxI2c_I2c.c Source File

  • I2c
  • I2c
IfxI2c_I2c.c
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_I2c.c
3 * \brief I2C I2C details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxI2c_I2c.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxI2c_I2c_initConfig(IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
55 {
56 config->i2c = i2c;
57 config->baudrate = 400000;
58 config->pins = NULL_PTR;
59 }
60
61
62 void IfxI2c_I2c_initDevice(IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
63 {
64 i2cDevice->i2c = i2cDeviceConfig->i2c;
65 i2cDevice->deviceAddress = i2cDeviceConfig->deviceAddress;
66 }
67
68
69 void IfxI2c_I2c_initDeviceConfig(IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
70 {
71 i2cDeviceConfig->i2c = i2c;
72 i2cDeviceConfig->deviceAddress = 0xff;
73 }
74
75
76 void IfxI2c_I2c_initModule(IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
77 {
78 Ifx_I2C *i2cSFR = config->i2c;
79 i2c->i2c = i2cSFR;
80
81 IfxI2c_enableModule(i2cSFR);
82 IfxI2c_stop(i2cSFR); // enter config Mode
83 IfxI2c_configureAsMaster(i2cSFR);
84 IfxI2c_setBaudrate(i2cSFR, config->baudrate);
85
86 if (config->pins != NULL_PTR)
87 {
88 IfxI2c_initSclSdaPin(config->pins->scl, config->pins->sda, config->pins->padDriver);
89 }
90
91 IfxI2c_run(i2cSFR);
92 i2c->baudrate = IfxI2c_getBaudrate(i2cSFR);
93 i2c->busStatus = IfxI2c_getBusStatus(i2cSFR);
94 i2c->status = IfxI2c_I2c_Status_ok;
95 }
96
97
98 IfxI2c_I2c_Status IfxI2c_I2c_read(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
99 {
100 IfxI2c_I2c_Status status = IfxI2c_I2c_Status_ok;
101 Ifx_I2C *i2c = i2cDevice->i2c->i2c;
102 uint32 packet;
103 uint8 slAddr = i2cDevice->deviceAddress;
104
105 union data
106 {
107 uint32 packet;
108 uint8 packetbyte[4];
109 } rxdata;
110
111 rxdata.packet = 0;
112
113 sint32 bytesToReceive = size;
114 uint32 bytes;
115
116 // bus free?
117 if (IfxI2c_busIsFree(i2c) == FALSE)
118 {
119 status = IfxI2c_I2c_Status_busNotFree;
120 i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
121 i2cDevice->i2c->status = status;
122 return status;
123 }
124
125 IfxI2c_clearAllProtocolInterruptSources(i2c);
126 IfxI2c_clearAllErrorInterruptSources(i2c);
127
128 // send device address with RnW bit set
129 packet = slAddr | 1; // set read bit
130 IfxI2c_setTransmitPacketSize(i2c, 1); // send slave address packet with RnW = 1
131 IfxI2c_setReceivePacketSize(i2c, size); // set number of bytes to reveive
132 IfxI2c_writeFifo(i2c, packet);
133 IfxI2c_clearLastSingleRequestInterruptSource(i2c);
134 IfxI2c_clearSingleRequestInterruptSource(i2c);
135 IfxI2c_clearLastBurstRequestInterruptSource(i2c);
136 IfxI2c_clearBurstRequestInterruptSource(i2c);
137
138 /* Poll until aribtration lost, nack, or rx mode flag is reset, or the error is gone*/
139 while ((i2c->PIRQSS.U & ((1 << IFX_I2C_PIRQSS_AL_OFF) | (1 << IFX_I2C_PIRQSS_NACK_OFF) | (1 << IFX_I2C_PIRQSS_RX_OFF))) || i2c->ERRIRQSS.U)
140 {}
141
142 /* check status*/
143 if (i2c->ERRIRQSS.U)
144 {
145 IfxI2c_clearAllErrorInterruptSources(i2c);
146 status = IfxI2c_I2c_Status_error;
147 }
148
149 /*Check Arbitration Lost in Protocol Interrupts*/
150 else if (i2c->PIRQSS.U & (1 << IFX_I2C_PIRQSS_AL_OFF))
151 {
152 i2c->PIRQSC.U = (1 << IFX_I2C_PIRQSS_AL_OFF);
153 status = IfxI2c_I2c_Status_al;
154 }
155 /*Check NACK in Protocol Interrupts*/
156 else if (i2c->PIRQSS.U & (1 << IFX_I2C_PIRQSS_NACK_OFF))
157 {
158 i2c->PIRQSC.U = (1 << IFX_I2C_PIRQSS_NACK_OFF);
159 status = IfxI2c_I2c_Status_nak;
160 }
161
162 else if (size > 0) // required to poll for nak
163
164 {
165 if (size > 32) // if fifo is too small => disable global interrupts!
166 { // assumes TC is faster than i2c and therefor a fifo overflow is not possible
167 boolean intEnabled = IfxCpu_disableInterrupts(); // disable global interrupts to prevent fifo overflow
168 uint32 i;
169
170 for (i = 0; i < (uint32)size; i += 4)
171 {
172 if (bytesToReceive >= 4)
173 {
174 bytes = 4;
175 bytesToReceive -= 4;
176 }
177 else
178 {
179 bytes = bytesToReceive;
180 bytesToReceive = 0;
181 }
182
183 uint32 ris;
184
185 while (!(ris = i2c->RIS.U)) // wait for fifo request or error
186
187 {}
188
189 // check request flags
190 if (ris & ((1 << IFX_I2C_RIS_LSREQ_INT_OFF) | (1 << IFX_I2C_RIS_SREQ_INT_OFF) | (1 << IFX_I2C_RIS_LBREQ_INT_OFF) | (1 << IFX_I2C_RIS_BREQ_INT_OFF)))
191 {
192 rxdata.packet = i2c->RXD.U;
193 uint32 k;
194
195 for (k = 0; k < bytes; k++)
196 {
197 data[i + k] = rxdata.packetbyte[k];
198 }
199
200 IfxI2c_clearLastSingleRequestInterruptSource(i2c);
201 IfxI2c_clearSingleRequestInterruptSource(i2c);
202 IfxI2c_clearLastBurstRequestInterruptSource(i2c);
203 IfxI2c_clearBurstRequestInterruptSource(i2c);
204 }
205
206 /* check errors. Must have enabled corresponding bits in Mask registers*/
207 if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
208 {
209 IfxI2c_clearAllErrorInterruptSources(i2c);
210 status = IfxI2c_I2c_Status_error;
211 break;
212 }
213
214 /* check protocol interrupts. Must have enabled corresponding bits in Mask registers*/
215 if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
216 {
217 /*Check Arbitration Lost*/
218 if (i2c->PIRQSS.U & (1 << IFX_I2C_PIRQSS_AL_OFF))
219 {
220 i2c->PIRQSC.U = (1 << IFX_I2C_PIRQSS_AL_OFF);
221 status = IfxI2c_I2c_Status_al;
222 break;
223 }
224
225 /*Check NACK*/
226 else if (i2c->PIRQSS.U & (1 << IFX_I2C_PIRQSS_NACK_OFF))
227 {
228 i2c->PIRQSC.U = (1 << IFX_I2C_PIRQSS_NACK_OFF);
229 status = IfxI2c_I2c_Status_nak;
230 break;
231 }
232
233 /*Check TX_END*/
234 if (i2c->PIRQSS.U & (1 << IFX_I2C_PIRQSS_TX_END_OFF))
235 {
236 /*Should not be cleared here, otherwise it will cause infinite while loop*/
237 status = IfxI2c_I2c_Status_ok; //Default value of status. Still kept for readability*/
238 }
239
240 /*Check and clear Address Match, General Call, Master Code and Receive Mode*/
241 if (i2c->PIRQSS.U & ((1 << IFX_I2C_PIRQSS_AM_OFF) | (1 << IFX_I2C_PIRQSS_GC_OFF) | (1 << IFX_I2C_PIRQSS_MC_OFF) | (1 << IFX_I2C_PIRQSS_RX_OFF)))
242 {
243 /*Just clearing the bits. Status need not be updated*/
244 i2c->PIRQSC.U = ((1 << IFX_I2C_PIRQSS_AM_OFF) | (1 << IFX_I2C_PIRQSS_GC_OFF) | (1 << IFX_I2C_PIRQSS_MC_OFF) | (1 << IFX_I2C_PIRQSS_RX_OFF));
245 }
246 }
247 }
248
249 IfxCpu_restoreInterrupts(intEnabled); // (re-) enable global interrupts
250
251 // TX_END: transmission finished
252 while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
253 {}
254
255 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
256 }
257 else
258 {
259 // wait until all bytes are received
260 while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
261 {}
262
263 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
264
265 // check errors
266 uint32 ris;
267 ris = i2c->RIS.U;
268
269 if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
270 {
271 IfxI2c_clearAllErrorInterruptSources(i2c);
272 status = IfxI2c_I2c_Status_error;
273 }
274
275 else if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
276 {
277 if (i2c->PIRQSS.U & (1 << IFX_I2C_PIRQSS_AL_OFF))
278 {
279 i2c->PIRQSC.U = (1 << IFX_I2C_PIRQSS_AL_OFF);
280 status = IfxI2c_I2c_Status_al;
281 }
282
283 else if (i2c->PIRQSS.U & (1 << IFX_I2C_PIRQSS_NACK_OFF))
284 {
285 i2c->PIRQSC.U = (1 << IFX_I2C_PIRQSS_NACK_OFF);
286 status = IfxI2c_I2c_Status_nak;
287 }
288
289 /*Clear remaining flags*/
290 /* Check and clear Address Match, General Call, Master Code, Transmission End and Receive Mode*/
291 if (i2c->PIRQSS.U & ((1 << IFX_I2C_PIRQSS_AM_OFF) | (1 << IFX_I2C_PIRQSS_GC_OFF) | (1 << IFX_I2C_PIRQSS_MC_OFF) | (1 << IFX_I2C_PIRQSS_TX_END_OFF) | (1 << IFX_I2C_PIRQSS_RX_OFF)))
292 {
293 /*Just clearing the bits. Status need not be updated*/
294 i2c->PIRQSC.U = ((1 << IFX_I2C_PIRQSS_AM_OFF) | (1 << IFX_I2C_PIRQSS_GC_OFF) | (1 << IFX_I2C_PIRQSS_MC_OFF) | (1 << IFX_I2C_PIRQSS_TX_END_OFF) | (1 << IFX_I2C_PIRQSS_RX_OFF));
295 }
296 }
297
298 if ((status != IfxI2c_I2c_Status_error) && (status != IfxI2c_I2c_Status_al) && (status != IfxI2c_I2c_Status_nak))
299 {
300 // read fifo
301 uint32 i;
302
303 for (i = 0; i < (uint32)size; i += 4)
304 {
305 if (bytesToReceive >= 4)
306 {
307 bytes = 4;
308 bytesToReceive -= 4;
309 }
310 else
311 {
312 bytes = bytesToReceive;
313 bytesToReceive = 0;
314 }
315
316 uint32 k;
317 rxdata.packet = i2c->RXD.U;
318 IfxI2c_clearLastSingleRequestInterruptSource(i2c);
319 IfxI2c_clearSingleRequestInterruptSource(i2c);
320 IfxI2c_clearLastBurstRequestInterruptSource(i2c);
321 IfxI2c_clearBurstRequestInterruptSource(i2c);
322
323 for (k = 0; k < bytes; k++)
324 {
325 data[i + k] = rxdata.packetbyte[k];
326 }
327 }
328 }
329 }
330 }
331
332 IfxI2c_clearAllErrorInterruptSources(i2c);
333 IfxI2c_clearAllProtocolInterruptSources(i2c);
334
335 IfxI2c_releaseBus(i2c);
336 i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
337 i2cDevice->i2c->status = status;
338 return status;
339 }
340
341
342 IfxI2c_I2c_Status IfxI2c_I2c_write(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
343 {
344 IfxI2c_I2c_Status status = IfxI2c_I2c_Status_ok;
345 Ifx_I2C *i2c = i2cDevice->i2c->i2c;
346 uint8 slAddr = i2cDevice->deviceAddress;
347 union data
348 {
349 uint32 packet;
350 uint8 packetbyte[4];
351 } txdata;
352
353 sint32 bytesToSend = size + 1; // +1 slave device address
354 uint32 bytes;
355
356 if (IfxI2c_busIsFree(i2c) == FALSE)
357 {
358 status = IfxI2c_I2c_Status_busNotFree;
359 i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
360 i2cDevice->i2c->status = status;
361 return status;
362 }
363
364 // build one packet containing the slave address
365
366 IfxI2c_clearAllProtocolInterruptSources(i2c);
367 IfxI2c_clearAllErrorInterruptSources(i2c);
368
369 // try to seize control, if not return
370 IfxI2c_setTransmitPacketSize(i2c, 1);
371 IfxI2c_writeFifo(i2c, slAddr);
372 IfxI2c_clearLastSingleRequestInterruptSource(i2c);
373 IfxI2c_clearSingleRequestInterruptSource(i2c);
374 IfxI2c_clearLastBurstRequestInterruptSource(i2c);
375 IfxI2c_clearBurstRequestInterruptSource(i2c);
376
377 // wait until packet is sent
378 while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
379 {}
380
381 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
382
383 // check status
384 if (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_arbitrationLost) == TRUE)
385 {
386 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_arbitrationLost);
387 status = IfxI2c_I2c_Status_al;
388 }
389 else if (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived) == TRUE)
390 {
391 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived);
392 status = IfxI2c_I2c_Status_nak;
393 }
394 else if (size > 0) // write i2c device
395
396 {
397 uint32 i, j = 0;
398
399 // assumes TC is faster then i2c and therefor a fifo underflow is not possible
400 boolean intEnabled = IfxCpu_disableInterrupts(); // disable global interrupts to prevent FIFO underflow
401 IfxI2c_setTransmitPacketSize(i2c, size + 1);
402
403 for (i = 0; i < (uint32)(size + 1); i += 4)
404 {
405 if (bytesToSend >= 4)
406 {
407 bytes = 4;
408 bytesToSend -= 4;
409 }
410 else
411 {
412 bytes = bytesToSend;
413 bytesToSend = 0;
414 }
415
416 txdata.packet = 0;
417
418 for (j = 0; j < bytes; j++)
419 {
420 if ((i == 0) && (j == 0))
421 {
422 txdata.packetbyte[j] = (uint8)slAddr;
423 }
424
425 else
426 {
427 txdata.packetbyte[j] = (uint8)data[i + j - 1];
428 }
429 }
430
431 do
432 {
433 // check errors
434 uint32 ris;
435 ris = i2c->RIS.U;
436
437 if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
438 {
439 IfxI2c_clearAllProtocolInterruptSources(i2c);
440 status = IfxI2c_I2c_Status_error;
441 }
442
443 if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
444 {
445 IfxI2c_clearAllErrorInterruptSources(i2c);
446 status = IfxI2c_I2c_Status_error;
447 }
448 } while (i2c->FFSSTAT.B.FFS == 8 && status != IfxI2c_I2c_Status_error); // wait to prevent FIFO overflow
449
450 if (status == IfxI2c_I2c_Status_error)
451 {
452 break;
453 }
454
455 IfxI2c_writeFifo(i2c, txdata.packet);
456 IfxI2c_clearLastSingleRequestInterruptSource(i2c);
457 IfxI2c_clearSingleRequestInterruptSource(i2c);
458 IfxI2c_clearLastBurstRequestInterruptSource(i2c);
459 IfxI2c_clearBurstRequestInterruptSource(i2c);
460 }
461
462 IfxCpu_restoreInterrupts(intEnabled); // (re-) enable global interrupts
463
464 // wait until all bytes are sent
465 while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
466 {}
467
468 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
469
470 // finally check errors
471 uint32 ris;
472 ris = i2c->RIS.U;
473
474 if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
475 {
476 IfxI2c_clearAllProtocolInterruptSources(i2c);
477 status = IfxI2c_I2c_Status_error;
478 }
479
480 if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
481 {
482 IfxI2c_clearAllErrorInterruptSources(i2c);
483 status = IfxI2c_I2c_Status_error;
484 }
485 }
486
487 IfxI2c_releaseBus(i2c);
488 i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
489 i2cDevice->i2c->status = status;
490 return status;
491 }
IfxI2c_clearLastSingleRequestInterruptSource
IFX_INLINE void IfxI2c_clearLastSingleRequestInterruptSource(Ifx_I2C *i2c)
clears last single request interrupt source
Definition: IfxI2c.h:637
IfxI2c_Pins::padDriver
IfxPort_PadDriver padDriver
Definition: IfxI2c.h:139
IfxI2c_writeFifo
IFX_INLINE void IfxI2c_writeFifo(Ifx_I2C *i2c, uint32 packet)
Writes a packet (4 bytes) into the Fifo.
Definition: IfxI2c.h:938
IfxI2c_releaseBus
void IfxI2c_releaseBus(Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus.
Definition: IfxI2c.c:231
IfxI2c_setReceivePacketSize
IFX_INLINE void IfxI2c_setReceivePacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be received.
Definition: IfxI2c.h:901
IfxI2c_busIsFree
IFX_INLINE boolean IfxI2c_busIsFree(Ifx_I2C *i2c)
Returns if the bus is free.
Definition: IfxI2c.h:588
IfxI2c_getBusStatus
IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus(Ifx_I2C *i2c)
Definition: IfxI2c.h:770
IfxI2c_setBaudrate
void IfxI2c_setBaudrate(Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate.
Definition: IfxI2c.c:279
IfxI2c_clearBurstRequestInterruptSource
IFX_INLINE void IfxI2c_clearBurstRequestInterruptSource(Ifx_I2C *i2c)
clears burst request interrupt source
Definition: IfxI2c.h:619
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxI2c_getBaudrate
float32 IfxI2c_getBaudrate(Ifx_I2C *i2c)
Returns the real Baudrate.
Definition: IfxI2c.c:189
IfxI2c_Pins::scl
IfxI2c_Scl_InOut * scl
Definition: IfxI2c.h:137
IfxI2c_I2c_Config::baudrate
float32 baudrate
Baudrate.
Definition: IfxI2c_I2c.h:349
IfxI2c_I2c_Config
Structure to configure the Module.
Definition: IfxI2c_I2c.h:346
IfxI2c_I2c_Device::deviceAddress
uint8 deviceAddress
Definition: IfxI2c_I2c.h:358
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:933
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxI2c_I2c_read
IfxI2c_I2c_Status IfxI2c_I2c_read(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
reads the I2c device
Definition: IfxI2c_I2c.c:98
IfxI2c_I2c_Status
IfxI2c_I2c_Status
Definition: IfxI2c_I2c.h:317
IfxI2c_I2c_Status_busNotFree
bus is not free
Definition: IfxI2c_I2c.h:322
IfxI2c_I2c_deviceConfig
Structure to configure the device&#39;s data structure.
Definition: IfxI2c_I2c.h:363
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:656
IfxI2c_configureAsMaster
void IfxI2c_configureAsMaster(Ifx_I2C *i2c)
Configures the Module as Master.
Definition: IfxI2c.c:54
IfxI2c_I2c_initModule
void IfxI2c_I2c_initModule(IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
Initializes the Module.
Definition: IfxI2c_I2c.c:76
IfxI2c_I2c_Device::i2c
IfxI2c_I2c * i2c
Module Pionter.
Definition: IfxI2c_I2c.h:357
IfxI2c_I2c_Config::i2c
Ifx_I2C * i2c
Module Pointer.
Definition: IfxI2c_I2c.h:348
IfxI2c_I2c_Status_nak
NAK.
Definition: IfxI2c_I2c.h:320
IfxI2c_enableModule
void IfxI2c_enableModule(Ifx_I2C *i2c)
Enables the I2c Module.
Definition: IfxI2c.c:125
IfxI2c_ProtocolInterruptSource_arbitrationLost
arbitration lost service request
Definition: IfxI2c.h:110
IfxI2c_I2c_write
IfxI2c_I2c_Status IfxI2c_I2c_write(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
writes to the I2c device
Definition: IfxI2c_I2c.c:342
IfxI2c_I2c::busStatus
IfxI2c_BusStatus busStatus
Status of the bus.
Definition: IfxI2c_I2c.h:339
IfxI2c_clearProtocolInterruptSource
IFX_INLINE void IfxI2c_clearProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
clears the specified source of protocol interrupt
Definition: IfxI2c.h:643
IfxI2c_clearAllProtocolInterruptSources
IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources(Ifx_I2C *i2c)
Clears all Protocol Interrupt sources.
Definition: IfxI2c.h:613
IfxI2c_I2c_Config::pins
IFX_CONST IfxI2c_Pins * pins
Pins.
Definition: IfxI2c_I2c.h:350
IfxI2c_initSclSdaPin
void IfxI2c_initSclSdaPin(const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
Definition: IfxI2c.c:220
IfxI2c_I2c_Status_error
error
Definition: IfxI2c_I2c.h:323
IfxI2c_getProtocolInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
returns the status of specified protocol interrupt source
Definition: IfxI2c.h:845
IfxI2c_stop
IFX_INLINE void IfxI2c_stop(Ifx_I2C *i2c)
Definition: IfxI2c.h:925
IfxI2c_I2c_Device
Structure with slave device data.
Definition: IfxI2c_I2c.h:355
sint32
long sint32
Definition: Platform_Types.h:134
IfxI2c_Pins::sda
IfxI2c_Sda_InOut * sda
Definition: IfxI2c.h:138
IfxI2c_I2c.h
I2C I2C details.
IfxI2c_I2c_initConfig
void IfxI2c_I2c_initConfig(IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
Fills the config structure with default values.
Definition: IfxI2c_I2c.c:54
IfxI2c_I2c_Status_al
Arbitration Lost.
Definition: IfxI2c_I2c.h:321
IfxI2c_I2c_initDeviceConfig
void IfxI2c_I2c_initDeviceConfig(IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
Fills the config structure of the slave device with default values.
Definition: IfxI2c_I2c.c:69
IfxI2c_I2c
Handler.
Definition: IfxI2c_I2c.h:336
IfxI2c_ProtocolInterruptSource_transmissionEnd
transmission end service request
Definition: IfxI2c.h:112
IfxI2c_run
IFX_INLINE void IfxI2c_run(Ifx_I2C *i2c)
Definition: IfxI2c.h:889
IfxI2c_I2c_initDevice
void IfxI2c_I2c_initDevice(IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
Initializes the device Handler.
Definition: IfxI2c_I2c.c:62
IfxI2c_I2c::status
IfxI2c_I2c_Status status
Status of the last bus operation.
Definition: IfxI2c_I2c.h:340
IfxI2c_clearAllErrorInterruptSources
IFX_INLINE void IfxI2c_clearAllErrorInterruptSources(Ifx_I2C *i2c)
clears all Error Interrupt sources
Definition: IfxI2c.h:607
IfxI2c_setTransmitPacketSize
IFX_INLINE void IfxI2c_setTransmitPacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be tansmitted.
Definition: IfxI2c.h:919
IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived
not acknowledge received service request
Definition: IfxI2c.h:111
IfxI2c_clearLastBurstRequestInterruptSource
IFX_INLINE void IfxI2c_clearLastBurstRequestInterruptSource(Ifx_I2C *i2c)
clears last burst request interrupt source
Definition: IfxI2c.h:631
IfxI2c_clearSingleRequestInterruptSource
IFX_INLINE void IfxI2c_clearSingleRequestInterruptSource(Ifx_I2C *i2c)
clears single request interrupt source
Definition: IfxI2c.h:649
TRUE
#define TRUE
Definition: Platform_Types.h:90
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxI2c_I2c_Status_ok
ok
Definition: IfxI2c_I2c.h:319


iLLD_TC26B: IfxI2c_I2c.h Source File

  • I2c
  • I2c
IfxI2c_I2c.h
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_I2c.h
3 * \brief I2C I2C details
4 * \ingroup IfxLld_I2c
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_I2c_I2c_Usage How to use the I2c driver?
44 * \ingroup IfxLld_I2c
45 *
46 * The I2c driver provides a default configuration for 8bit wide data transfers in Master mode.
47 *
48 * NOTE: Interrupts are disabled during data transfers as long as the driver operates on the I2C hardware FIFO,
49 * except for reading 32 bytes or less. This is due to limitations of the I2c Module.
50 *
51 * NOTE : Send Slave address as 8-bit by left shifting it by 1.E.g incase of EEPROM,slave address is 7 bit represented
52 * as 0x50, after left shifting it by 1, it will be 0xa0
53 *
54 * In the following sections it will be described, how to integrate the driver into the application framework.
55 *
56 * \section IfxLld_I2c_I2c Preparation Preparation
57 * \subsection IfxLld_I2c_I2c_Include Include Files
58 *
59 * Include following header file into your C code:
60 * \code
61 * #include <I2c/I2c/IfxI2c_I2c.h>
62 * \endcode
63 *
64 * \subsection IfxLld_I2c_I2c_Variables Variables
65 *
66 * Declare the I2c handle, the I2c device handle and the data buffer in your C code:
67 *
68 * \code
69 * // used globally
70 * static IfxI2c_I2c i2c; // i2c handle
71 * static IfxI2c_I2c_Device i2cDev; // slave device handle
72 * uint8 data[128]; // data buffer
73 * \endcode
74 *
75 * \subsection IfxLld_I2c_I2c_Init Module Initialisation
76 *
77 * \code
78 * // create config structure
79 * IfxI2c_I2c_Config config;
80 *
81 * // fill structure with default values and Module address
82 * IfxI2c_I2c_initConfig(&config, &MODULE_I2C0);
83 *
84 * // configure pins
85 * const IfxI2c_Pins pins = {
86 * &IfxI2c0_SCL_P02_5_INOUT,
87 * &IfxI2c0_SDA_P02_4_INOUT,
88 * IfxPort_PadDriver_cmosAutomotiveSpeed1
89 * };
90 *
91 * config.pins = &pins;
92 *
93 * config.baudrate = 400000; // 400 kHz
94 *
95 * // initialize module
96 * IfxI2c_I2c_initModule(&i2c, &config);
97 * \endcode
98 *
99 * \subsection IfxLld_I2c_I2c_InitDevice Device Initialisation
100 * Here the i2c device handle is initialized.
101 * \code
102 * // create device config
103 * IfxI2c_I2c_deviceConfig i2cDeviceConfig;
104 *
105 * // fill structure with default values and i2c Handler
106 * IfxI2c_I2c_initDeviceConfig(&i2cDeviceConfig, &i2c);
107 *
108 * // set device specifig values.
109 * i2cDeviceConfig.deviceAddress = 0xa0; // 8 bit device address
110 *
111 * // initialize the i2c device handle
112 * IfxI2c_I2c_initDevice(&i2cDev, &i2cDeviceConfig);
113 * \endcode
114 *
115 * \section IfxLld_I2c_I2c_DataTransfers Data Transfers
116 * Example for an i2c EEPROM.
117 *
118 * \subsection IfxLld_I2c_I2c_Write Write
119 *
120 * \code
121 * uint16 addr = 0x0000;
122 *
123 * // setup the device's internal address
124 * data[0] = addr >> 8; // High byte
125 * data[1] = (uint8)addr; // Low byte
126 * // setup data to be written
127 * data[2] = 0x01;
128 * data[3] = 0x02;
129 * data[4] = 0x03;
130 *
131 * uint8 size = 5; // 5 bytes to transmit to i2cDev (data and internal address)
132 *
133 * // write data to device as soon as it is ready
134 * while(IfxI2c_I2c_write(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);
135 * \endcode
136 *
137 * \subsection IfxLld_I2c_I2c_Read Read
138 *
139 * \code
140 * Ifx_SizeT size;
141 * uint16 addr = 0x0000;
142 *
143 * // setup internal address to be read from
144 * data[0] = addr >> 8; // High byte
145 * data[1] = (uint8)addr; // Low byte
146 * size = 2;
147 * while(IfxI2c_I2c_write(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);
148 *
149 * size = 8; // 8 bytes to read
150 *
151 * // read device data to data array
152 * while(IfxI2c_I2c_read(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);
153 * \endcode
154 *
155 * \subsection IfxLld_I2c_I2c_ACK Acknowledge Polling
156 * It is also possible to poll explicitly for NAK.
157 *
158 * By using write operations:
159 * \code
160 * // size = 0;
161 * while(IfxI2c_I2c_write(&i2cDev, data, 0) == IfxI2c_I2c_Status_nak)); // where data is just a dummy pointer
162 * \endcode
163 *
164 * By using read operations:
165 * \code
166 * // size = 0;
167 * while(IfxI2c_I2c_read(&i2cDev, data, 0) == IfxI2c_I2c_Status_nak)); // where data is just a dummy pointer
168 * \endcode
169 *
170 * \subsection IfxLld_I2c_I2c_Interrupts Interrupts usage
171 *
172 * Interrupts can be enabled from the application by using the APIs provided in the driver,
173 * there are APIs available in the driver to enable, disable, clear and read the status of interrupt falgs, along with these,\n
174 * APIs to enable the the interrupts are also available.
175 *
176 * here is an example of how to use the interrupts in I2C driver.
177 *
178 * Using I2C interrupts
179 *
180 *
181 * I2C burst data transfer interrupt
182 *
183 * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
184 *
185 * choose the burst data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing burst data transfer \n
186 * interrupt source, enable burst data transfer service request or interrupt with the desired type of service and priority
187 *
188 * \code
189 * //enable burst data transfer interrupt source
190 * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
191 * IfxI2c_enableBurstRequestInterruptSource(i2c);
192 *
193 * // enable the burst data transfer interrupt
194 * IfxI2c_enableBurstDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
195 * \endcode
196 *
197 * I2C last burst data transfer interrupt
198 *
199 * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
200 *
201 * choose the last burst data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing last burst data transfer \n
202 * interrupt source, enable burst data transfer service request or interrupt with the desired type of service and priority
203 *
204 * \code
205 * //enable last burst data transfer interrupt source
206 * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
207 * IfxI2c_enableLastBurstRequestInterruptSource(i2c);
208 *
209 * // enable the last burst data transfer interrupt
210 * IfxI2c_enableLastBurstDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
211 * \endcode
212 *
213 * I2C single data transfer interrupt
214 *
215 * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
216 *
217 * choose the single data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing single data transfer \n
218 * interrupt source, enable single data transfer service request or interrupt with the desired type of service and priority
219 *
220 * \code
221 * //enable burst data transfer interrupt source
222 * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
223 * IfxI2c_enableSingleRequestInterruptSource(i2c);
224 *
225 * // enable the burst data transfer interrupt
226 * IfxI2c_enableSingleDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
227 * \endcode
228 *
229 * I2C last single data transfer interrupt
230 *
231 * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
232 *
233 * choose the last single data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing last single data transfer \n
234 * interrupt source, enable last single data transfer service request or interrupt with the desired type of service and priority
235 *
236 * \code
237 * //enable burst data transfer interrupt source
238 * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
239 * IfxI2c_enableLastSingleRequestInterruptSource(i2c);
240 *
241 * // enable the burst data transfer interrupt
242 * IfxI2c_enableLastSingleDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
243 * \endcode
244 *
245 * I2C error interrupt (ERR)
246 *
247 * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
248 *
249 * choose the error interrupt sources needed to be enabled for I2C module and call the following functions once for each error interrupt source by choosing the right \n
250 * error interrupt source as parameter,and after choosing all the error interrupt sources, enable the I2C error interrupt flag and then enable I2C error service request or interrupt with desired type of service and priority
251 *
252 * \code
253 * //enable error interrupt sources
254 * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
255 * IfxI2c_enableErrorInterruptSource(i2c, IfxI2c_ErrorInterruptSource_rxFifoUnderflow);
256 * IfxI2c_enableErrorInterruptSource(i2c, IfxI2c_ErrorInterruptSource_txFifoOverflow);
257 *
258 * // enable the error interrupt flag
259 * IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c);
260 *
261 * // enable the error interrupt
262 * IfxI2c_enableErrorInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
263 * \endcode
264 *
265 *
266 * I2C protocol interrupt (PROTOCOL)
267 *
268 * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
269 *
270 * choose the protocol interrupt sources needed to be enabled for I2C module and call the following functions once for each protocol interrupt source by choosing the \n
271 * right protocol interrupt source as parameter,and after choosing all the protocol interrupt sources, enable the I2C protocol interrupt flag and then enable \n
272 * I2C protocol service request or interrupt with desired type of service and priority
273 *
274 * \code
275 * //enable protocol interrupt sources
276 * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
277 * IfxI2c_enableProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_addressMatch);
278 * IfxI2c_enableProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_arbitrationLost);
279 *
280 * // enable the protocol interrupt flag
281 * IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c);
282 *
283 * // enable the protocol interrupt
284 * IfxI2c_enableProtocolInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
285 * \endcode
286 *
287 * you can define the ISR of your own and service the interrupt, please refer to more general usage of interrupts \ref IfxLld_Cpu_Irq_Usage
288 *
289 * some additional APIs to clear, disable interrupt flags and get flag status are also available.
290 *
291 * \defgroup IfxLld_I2c_I2c I2C
292 * \ingroup IfxLld_I2c
293 * \defgroup IfxLld_I2c_I2c_Functions Module Functions
294 * \ingroup IfxLld_I2c_I2c
295 * \defgroup IfxLld_I2c_I2c_Enum Enumerations
296 * \ingroup IfxLld_I2c_I2c
297 * \defgroup IfxLld_I2c_I2c_DataStructures Data Structures
298 * \ingroup IfxLld_I2c_I2c
299 */
300
301 #ifndef IFXI2C_I2C_H
302 #define IFXI2C_I2C_H 1
303
304 /******************************************************************************/
305 /*----------------------------------Includes----------------------------------*/
306 /******************************************************************************/
307
308 #include "I2c/Std/IfxI2c.h"
309 #include "Cpu/Std/IfxCpu.h"
310
311 /******************************************************************************/
312 /*--------------------------------Enumerations--------------------------------*/
313 /******************************************************************************/
314
315 /** \addtogroup IfxLld_I2c_I2c_Enum
316 * \{ */
317 typedef enum
318 {
319 IfxI2c_I2c_Status_ok = 0, /**< \brief ok */
320 IfxI2c_I2c_Status_nak = 1, /**< \brief NAK */
321 IfxI2c_I2c_Status_al = 2, /**< \brief Arbitration Lost */
322 IfxI2c_I2c_Status_busNotFree = 3, /**< \brief bus is not free */
323 IfxI2c_I2c_Status_error = 4 /**< \brief error */
324 } IfxI2c_I2c_Status;
325
326 /** \} */
327
328 /******************************************************************************/
329 /*-----------------------------Data Structures--------------------------------*/
330 /******************************************************************************/
331
332 /** \addtogroup IfxLld_I2c_I2c_DataStructures
333 * \{ */
334 /** \brief Handler
335 */
336 typedef struct
337 {
338 Ifx_I2C *i2c; /**< \brief Module Pointer */
339 IfxI2c_BusStatus busStatus; /**< \brief Status of the bus */
340 IfxI2c_I2c_Status status; /**< \brief Status of the last bus operation */
341 float32 baudrate; /**< \brief Baudrate */
342 } IfxI2c_I2c;
343
344 /** \brief Structure to configure the Module
345 */
346 typedef struct
347 {
348 Ifx_I2C *i2c; /**< \brief Module Pointer */
349 float32 baudrate; /**< \brief Baudrate */
350 IFX_CONST IfxI2c_Pins *pins; /**< \brief Pins */
351 } IfxI2c_I2c_Config;
352
353 /** \brief Structure with slave device data
354 */
355 typedef struct
356 {
357 IfxI2c_I2c *i2c; /**< \brief Module Pionter */
358 uint8 deviceAddress;
359 } IfxI2c_I2c_Device;
360
361 /** \brief Structure to configure the device's data structure
362 */
363 typedef struct
364 {
365 IfxI2c_I2c *i2c; /**< \brief Module Pointer */
366 uint8 deviceAddress; /**< \brief the slave device's address */
367 } IfxI2c_I2c_deviceConfig;
368
369 /** \} */
370
371 /** \addtogroup IfxLld_I2c_I2c_Functions
372 * \{ */
373
374 /******************************************************************************/
375 /*-------------------------Global Function Prototypes-------------------------*/
376 /******************************************************************************/
377
378 /** \brief Fills the config structure with default values
379 * \param config Structure to configure the Module
380 * \param i2c Module address
381 * \return None
382 */
383 IFX_EXTERN void IfxI2c_I2c_initConfig(IfxI2c_I2c_Config *config, Ifx_I2C *i2c);
384
385 /** \brief Initializes the device Handler
386 * \param i2cDevice I2c device Handler
387 * \param i2cDeviceConfig Structure to configure the device's data structure
388 * \return None
389 *
390 * A coding example can be found in \ref IfxLld_I2c_I2c_Usage
391 *
392 */
393 IFX_EXTERN void IfxI2c_I2c_initDevice(IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig);
394
395 /** \brief Fills the config structure of the slave device with default values.
396 * \param i2cDeviceConfig Structure to configure the device's data structure
397 * \param i2c Handler
398 * \return None
399 */
400 IFX_EXTERN void IfxI2c_I2c_initDeviceConfig(IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c);
401
402 /** \brief Initializes the Module
403 * \param i2c Handler
404 * \param config Configuration structure
405 * \return None
406 *
407 * A coding example can be found in \ref IfxLld_I2c_I2c_Usage
408 *
409 */
410 IFX_EXTERN void IfxI2c_I2c_initModule(IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config);
411
412 /** \brief reads the I2c device
413 *
414 * A coding example can be found in \ref IfxLld_I2c_I2c_Usage
415 *
416 */
417 IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_read(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size);
418
419 /** \brief writes to the I2c device
420 *
421 * A coding example can be found in \ref IfxLld_I2c_I2c_Usage
422 *
423 */
424 IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_write(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size);
425
426 /** \} */
427
428 #endif /* IFXI2C_I2C_H */
IfxI2c_BusStatus
IfxI2c_BusStatus
Definition: IfxI2c.h:71
IfxI2c.h
I2C basic functionality.
float32
float float32
Definition: Platform_Types.h:170
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxI2c_I2c::baudrate
float32 baudrate
Baudrate.
Definition: IfxI2c_I2c.h:341
IfxI2c_I2c_Config
Structure to configure the Module.
Definition: IfxI2c_I2c.h:346
IfxI2c_I2c_Device::deviceAddress
uint8 deviceAddress
Definition: IfxI2c_I2c.h:358
IfxI2c_I2c_read
IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_read(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
reads the I2c device
Definition: IfxI2c_I2c.c:98
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxI2c_I2c_Status
IfxI2c_I2c_Status
Definition: IfxI2c_I2c.h:317
IfxI2c_I2c_Status_busNotFree
bus is not free
Definition: IfxI2c_I2c.h:322
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxI2c_I2c_deviceConfig
Structure to configure the device&#39;s data structure.
Definition: IfxI2c_I2c.h:363
IfxI2c_I2c_initModule
IFX_EXTERN void IfxI2c_I2c_initModule(IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
Initializes the Module.
Definition: IfxI2c_I2c.c:76
IfxI2c_I2c_Device::i2c
IfxI2c_I2c * i2c
Module Pionter.
Definition: IfxI2c_I2c.h:357
IfxI2c_I2c::i2c
Ifx_I2C * i2c
Module Pointer.
Definition: IfxI2c_I2c.h:338
IfxI2c_I2c_Status_nak
NAK.
Definition: IfxI2c_I2c.h:320
IfxI2c_I2c_write
IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_write(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
writes to the I2c device
Definition: IfxI2c_I2c.c:342
IfxI2c_I2c::busStatus
IfxI2c_BusStatus busStatus
Status of the bus.
Definition: IfxI2c_I2c.h:339
IfxI2c_I2c_Config::pins
IFX_CONST IfxI2c_Pins * pins
Pins.
Definition: IfxI2c_I2c.h:350
IfxI2c_I2c_Status_error
error
Definition: IfxI2c_I2c.h:323
IfxCpu.h
CPU basic functionality.
IfxI2c_I2c_Device
Structure with slave device data.
Definition: IfxI2c_I2c.h:355
IfxI2c_Pins
Pin Structure.
Definition: IfxI2c.h:135
IfxI2c_I2c_initConfig
IFX_EXTERN void IfxI2c_I2c_initConfig(IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
Fills the config structure with default values.
Definition: IfxI2c_I2c.c:54
IfxI2c_I2c_Status_al
Arbitration Lost.
Definition: IfxI2c_I2c.h:321
IfxI2c_I2c_initDeviceConfig
IFX_EXTERN void IfxI2c_I2c_initDeviceConfig(IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
Fills the config structure of the slave device with default values.
Definition: IfxI2c_I2c.c:69
IfxI2c_I2c
Handler.
Definition: IfxI2c_I2c.h:336
IfxI2c_I2c_initDevice
IFX_EXTERN void IfxI2c_I2c_initDevice(IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
Initializes the device Handler.
Definition: IfxI2c_I2c.c:62
IfxI2c_I2c::status
IfxI2c_I2c_Status status
Status of the last bus operation.
Definition: IfxI2c_I2c.h:340
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxI2c_I2c_Status_ok
ok
Definition: IfxI2c_I2c.h:319


iLLD_TC26B: IfxI2c_PinMap.c Source File

  • _PinMap
IfxI2c_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_PinMap.c
3 * \brief I2C I/O map
4 * \ingroup IfxLld_I2c
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxI2c_PinMap.h"
44
45 IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT = {&MODULE_I2C0, {&MODULE_P02, 5}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5};
46 IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT = {&MODULE_I2C0, {&MODULE_P13, 1}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6};
47 IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT = {&MODULE_I2C0, {&MODULE_P15, 4}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6};
48 IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT = {&MODULE_I2C0, {&MODULE_P02, 4}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5};
49 IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT = {&MODULE_I2C0, {&MODULE_P13, 2}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6};
50 IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT = {&MODULE_I2C0, {&MODULE_P15, 5}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6};
51
52
53 const IfxI2c_Scl_InOut *IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS] = {
54 {
55 &IfxI2c0_SCL_P02_5_INOUT,
56 &IfxI2c0_SCL_P13_1_INOUT,
57 &IfxI2c0_SCL_P15_4_INOUT
58 }
59 };
60
61 const IfxI2c_Sda_InOut *IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS] = {
62 {
63 &IfxI2c0_SDA_P02_4_INOUT,
64 &IfxI2c0_SDA_P13_2_INOUT,
65 &IfxI2c0_SDA_P15_5_INOUT
66 }
67 };
IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS
#define IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS
Definition: IfxI2c_PinMap.h:82
IfxI2c_Sda_InOut_pinTable
const IfxI2c_Sda_InOut * IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]
Definition: IfxI2c_PinMap.c:61
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxI2c_Sda_InOut
SDA input mapping structure.
Definition: IfxI2c_PinMap.h:65
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxI2c0_SCL_P13_1_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT
Definition: IfxI2c_PinMap.c:46
IfxI2c_Scl_InOut_pinTable
const IfxI2c_Scl_InOut * IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
Definition: IfxI2c_PinMap.c:53
IfxI2c0_SDA_P15_5_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT
Definition: IfxI2c_PinMap.c:50
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:125
IfxI2c0_SDA_P13_2_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT
Definition: IfxI2c_PinMap.c:49
IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS
#define IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS
Definition: IfxI2c_PinMap.h:83
IfxI2c_PinMap.h
I2C I/O map.
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxI2c0_SDA_P02_4_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT
Definition: IfxI2c_PinMap.c:48
IfxI2c0_SCL_P02_5_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT
Definition: IfxI2c_PinMap.c:45
IfxI2c_Scl_InOut
SCL input mapping structure.
Definition: IfxI2c_PinMap.h:56
IFXI2C_PINMAP_NUM_MODULES
#define IFXI2C_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxI2c_PinMap.h:81
IfxI2c0_SCL_P15_4_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT
Definition: IfxI2c_PinMap.c:47
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:124


iLLD_TC26B: IfxI2c_PinMap.h Source File

  • _PinMap
IfxI2c_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_PinMap.h
3 * \brief I2C I/O map
4 * \ingroup IfxLld_I2c
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_I2c_pinmap I2C Pin Mapping
42 * \ingroup IfxLld_I2c
43 */
44
45 #ifndef IFXI2C_PINMAP_H
46 #define IFXI2C_PINMAP_H
47
48 #include <IfxI2c_reg.h>
49 #include <_Impl/IfxI2c_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_I2c_pinmap
53 * \{ */
54
55 /** \brief SCL input mapping structure */
56 typedef const struct
57 {
58 Ifx_I2C* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel inSelect; /**< \brief Input multiplexer value */
61 IfxPort_OutputIdx outSelect; /**< \brief Port control code */
62 } IfxI2c_Scl_InOut;
63
64 /** \brief SDA input mapping structure */
65 typedef const struct
66 {
67 Ifx_I2C* module; /**< \brief Base address */
68 IfxPort_Pin pin; /**< \brief Port pin */
69 Ifx_RxSel inSelect; /**< \brief Input multiplexer value */
70 IfxPort_OutputIdx outSelect; /**< \brief Port control code */
71 } IfxI2c_Sda_InOut;
72
73 IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT; /**< \brief I2C0_SCL: I2C0 output and input */
74 IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT; /**< \brief I2C0_SCL: I2C0 output and input */
75 IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT; /**< \brief I2C0_SCL: I2C0 output and input */
76 IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT; /**< \brief I2C0_SDA: I2C0 output and input */
77 IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT; /**< \brief I2C0_SDA: I2C0 output and input */
78 IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT; /**< \brief I2C0_SDA: I2C0 output and input */
79
80 /** \brief Table dimensions */
81 #define IFXI2C_PINMAP_NUM_MODULES 1
82 #define IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS 3
83 #define IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS 3
84
85
86 /** \brief IfxI2c_Scl_InOut table */
87 IFX_EXTERN const IfxI2c_Scl_InOut *IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS];
88
89 /** \brief IfxI2c_Sda_InOut table */
90 IFX_EXTERN const IfxI2c_Sda_InOut *IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS];
91
92 /** \} */
93
94 #endif /* IFXI2C_PINMAP_H */
IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS
#define IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS
Definition: IfxI2c_PinMap.h:82
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxI2c_Scl_InOut::pin
IfxPort_Pin pin
Port pin.
Definition: IfxI2c_PinMap.h:59
IfxI2c0_SCL_P15_4_INOUT
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT
I2C0_SCL: I2C0 output and input.
Definition: IfxI2c_PinMap.h:75
IfxI2c_Scl_InOut::inSelect
Ifx_RxSel inSelect
Input multiplexer value.
Definition: IfxI2c_PinMap.h:60
IfxI2c_Sda_InOut
SDA input mapping structure.
Definition: IfxI2c_PinMap.h:65
IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS
#define IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS
Definition: IfxI2c_PinMap.h:83
IfxI2c0_SCL_P02_5_INOUT
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT
I2C0_SCL: I2C0 output and input.
Definition: IfxI2c_PinMap.h:73
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxI2c_Sda_InOut_pinTable
IFX_EXTERN const IfxI2c_Sda_InOut * IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]
IfxI2c_Sda_InOut table.
Definition: IfxI2c_PinMap.h:90
IfxI2c_Scl_InOut::module
Ifx_I2C * module
Base address.
Definition: IfxI2c_PinMap.h:58
IfxI2c_cfg.h
I2C on-chip implementation data.
IfxI2c_Scl_InOut_pinTable
IFX_EXTERN const IfxI2c_Scl_InOut * IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
IfxI2c_Scl_InOut table.
Definition: IfxI2c_PinMap.h:87
IfxI2c_Scl_InOut
SCL input mapping structure.
Definition: IfxI2c_PinMap.h:56
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IFXI2C_PINMAP_NUM_MODULES
#define IFXI2C_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxI2c_PinMap.h:81
IfxI2c0_SDA_P02_4_INOUT
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT
I2C0_SDA: I2C0 output and input.
Definition: IfxI2c_PinMap.h:76
IfxI2c0_SDA_P13_2_INOUT
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT
I2C0_SDA: I2C0 output and input.
Definition: IfxI2c_PinMap.h:77
IfxI2c0_SDA_P15_5_INOUT
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT
I2C0_SDA: I2C0 output and input.
Definition: IfxI2c_PinMap.h:78
IfxI2c0_SCL_P13_1_INOUT
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT
I2C0_SCL: I2C0 output and input.
Definition: IfxI2c_PinMap.h:74
IfxI2c_Scl_InOut::outSelect
IfxPort_OutputIdx outSelect
Port control code.
Definition: IfxI2c_PinMap.h:61
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxI2c_cfg.c Source File

  • _Impl
IfxI2c_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_cfg.c
3 * \brief I2C on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxI2c_cfg.h"
49
50 /******************************************************************************/
51 /*-----------------------Exported Variables/Constants-------------------------*/
52 /******************************************************************************/
53
54 IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES] = {
55 {&MODULE_I2C0, (uint32)IfxI2c_Index_0}
56 };
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxI2c_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES]
Definition: IfxI2c_cfg.c:54
IfxI2c_Index_0
I2C Index 0.
Definition: IfxI2c_cfg.h:80
IFXI2C_NUM_MODULES
#define IFXI2C_NUM_MODULES
Definition: IfxI2c_cfg.h:67
IfxI2c_cfg.h
I2C on-chip implementation data.
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140


iLLD_TC26B: IfxI2c_cfg.h Source File

  • _Impl
IfxI2c_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_cfg.h
3 * \brief I2C on-chip implementation data
4 * \ingroup IfxLld_I2c
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_I2c I2C
44 * \ingroup IfxLld
45 * \defgroup IfxLld_I2c_Impl Implementation
46 * \ingroup IfxLld_I2c
47 * \defgroup IfxLld_I2c_Std Standard Driver
48 * \ingroup IfxLld_I2c
49 * \defgroup IfxLld_I2c_Impl_Enumerations Enumerations
50 * \ingroup IfxLld_I2c_Impl
51 */
52
53 #ifndef IFXI2C_CFG_H
54 #define IFXI2C_CFG_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "Cpu/Std/Ifx_Types.h"
61 #include "IfxI2c_reg.h"
62
63 /******************************************************************************/
64 /*-----------------------------------Macros-----------------------------------*/
65 /******************************************************************************/
66
67 #define IFXI2C_NUM_MODULES (1)
68
69 /******************************************************************************/
70 /*--------------------------------Enumerations--------------------------------*/
71 /******************************************************************************/
72
73 /** \addtogroup IfxLld_I2c_Impl_Enumerations
74 * \{ */
75 /** \brief List of the available I2c interfaces
76 */
77 typedef enum
78 {
79 IfxI2c_Index_none = -1, /**< \brief Not Selected */
80 IfxI2c_Index_0 = 0, /**< \brief I2C Index 0 */
81 } IfxI2c_Index;
82
83 /** \} */
84
85 /** \addtogroup IfxLld_I2c_Impl_Enumerations
86 * \{ */
87
88 /******************************************************************************/
89 /*-------------------Global Exported Variables/Constants----------------------*/
90 /******************************************************************************/
91 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES];
92
93 /** \} */
94
95 #endif /* IFXI2C_CFG_H */
IfxI2c_Index_none
Not Selected.
Definition: IfxI2c_cfg.h:79
IfxI2c_Index
IfxI2c_Index
List of the available I2c interfaces.
Definition: IfxI2c_cfg.h:77
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxI2c_Index_0
I2C Index 0.
Definition: IfxI2c_cfg.h:80
IFXI2C_NUM_MODULES
#define IFXI2C_NUM_MODULES
Definition: IfxI2c_cfg.h:67
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxI2c_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES]
Definition: IfxI2c_cfg.h:91


iLLD_TC26B: IfxIom.c Source File

  • Iom
  • Std
IfxIom.c
Go to the documentation of this file.
1 /**
2 * \file IfxIom.c
3 * \brief IOM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxIom.h"
47 #include "Scu/Std/IfxScuCcu.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 float32 IfxIom_getFrequency(Ifx_IOM *iom)
54 {
55 IFX_UNUSED_PARAMETER(iom)
56 float32 fspb;
57 float32 fgtm;
58
59 fspb = IfxScuCcu_getSpbFrequency();
60 fgtm = IfxScuCcu_getGtmFrequency();
61
62 return fspb > fgtm ? fspb : fgtm;
63 }
64
65
66 void IfxIom_resetModule(Ifx_IOM *iom)
67 {
68 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
69
70 IfxScuWdt_clearCpuEndinit(passwd);
71 iom->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
72 iom->KRST0.B.RST = 1;
73 IfxScuWdt_setCpuEndinit(passwd);
74
75 while (iom->KRST0.B.RSTSTAT == 0) /* Wait until reset is executed */
76
77 {}
78
79 IfxScuWdt_clearCpuEndinit(passwd);
80 iom->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
81 IfxScuWdt_setCpuEndinit(passwd);
82 }
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:572
IfxIom.h
IOM basic functionality.
float32
float float32
Definition: Platform_Types.h:170
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxIom_getFrequency
float32 IfxIom_getFrequency(Ifx_IOM *iom)
Return the frequency used for the filter and timers clock.
Definition: IfxIom.c:53
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxIom_resetModule
void IfxIom_resetModule(Ifx_IOM *iom)
Reset the IOM module.
Definition: IfxIom.c:66
IfxScuCcu.h
SCU basic functionality.
IfxScuCcu_getGtmFrequency
IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void)
API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register an...
Definition: IfxScuCcu.h:1088
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222


iLLD_TC26B: IfxIom.h Source File

  • Iom
  • Std
IfxIom.h
Go to the documentation of this file.
1 /**
2 * \file IfxIom.h
3 * \brief IOM basic functionality
4 * \ingroup IfxLld_Iom
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Iom_Std_Enumeration Enumeration
42 * \ingroup IfxLld_Iom_Std
43 * \defgroup IfxLld_Iom_Std_Utility Utility Functions
44 * \ingroup IfxLld_Iom_Std
45 * \defgroup IfxLld_Iom_Std_Enumeration_Obsolete Enumeration Obsolete (NOt recommended for use)
46 * \ingroup IfxLld_Iom_Std
47 * \defgroup IfxLld_Iom_Std_Module_Obsolete Module Functions Obsolete (NOt recommended for use)
48 * \ingroup IfxLld_Iom_Std
49 */
50
51 #ifndef IFXIOM_H
52 #define IFXIOM_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 #include "_Impl/IfxIom_cfg.h"
59 #include "IfxIom_reg.h"
60 #include "Scu/Std/IfxScuWdt.h"
61 #include "Cpu/Std/IfxCpu_Intrinsics.h"
62
63 /******************************************************************************/
64 /*--------------------------------Enumerations--------------------------------*/
65 /******************************************************************************/
66
67 /** \addtogroup IfxLld_Iom_Std_Enumeration
68 * \{ */
69 /** \brief Event source configuration
70 * IOM_LAMCFGm.MOS
71 */
72 typedef enum
73 {
74 IfxIom_LamEventSource_mon = 0, /**< \brief Monitor signal is sourced directly from FPCmch */
75 IfxIom_LamEventSource_monXorRef = 1 /**< \brief Monitor signal is EXOR'd with FPCrch */
76 } IfxIom_LamEventSource;
77
78 /** \brief Event trigger configuration
79 * IOM_LAMCFGm.EDS upper two bits
80 */
81 typedef enum
82 {
83 IfxIom_LamEventTrigger_none = 0, /**< \brief Neither edge used to gate event generation */
84 IfxIom_LamEventTrigger_risingEdge = 1, /**< \brief Positive edge used to gate event generation */
85 IfxIom_LamEventTrigger_fallingEdge = 2, /**< \brief Negative edge used to gate event generation */
86 IfxIom_LamEventTrigger_anyEdge = 3 /**< \brief Either edge used to gate event generation */
87 } IfxIom_LamEventTrigger;
88
89 /** \brief Timer clear event configuration
90 * IOM_LAMCFGm.EDS upper lower bits
91 */
92 typedef enum
93 {
94 IfxIom_LamEventWindowClearEvent_none = 0, /**< \brief Neither edge used to clear event windowcounter */
95 IfxIom_LamEventWindowClearEvent_risingEdge = 1, /**< \brief Positive edge used to clear event windowcounter */
96 IfxIom_LamEventWindowClearEvent_fallingEdge = 2, /**< \brief Negative edge used to clear event windowcounter */
97 IfxIom_LamEventWindowClearEvent_anyEdge = 3 /**< \brief Either edge used to clear event windowcounter */
98 } IfxIom_LamEventWindowClearEvent;
99
100 /** \brief Timer control source configuration
101 * IOM_LAMCFGm.EWS
102 */
103 typedef enum
104 {
105 IfxIom_LamEventWindowControlSource_ref = 0, /**< \brief Event window generation is determined from the reference signal */
106 IfxIom_LamEventWindowControlSource_mon = 1 /**< \brief Event window generation is determined from the monitor signal */
107 } IfxIom_LamEventWindowControlSource;
108
109 /** \brief Timer run configuration
110 * IOM_LAMCFGm.RMS
111 */
112 typedef enum
113 {
114 IfxIom_LamEventWindowRunControl_freeRunning = 0, /**< \brief Event window generation is free-running. */
115 IfxIom_LamEventWindowRunControl_gated = 1 /**< \brief Event window generation is gated with the monitor or reference signal */
116 } IfxIom_LamEventWindowRunControl;
117
118 /** \brief FPC filer mode
119 * IOM_FPCCTRk.MOD, with additional definition for noFilter
120 */
121 typedef enum
122 {
123 IfxIom_LamFilterMode_delayDebounceBothEdge = 0, /**< \brief Delayed Debounce Filter Mode on both edges */
124 IfxIom_LamFilterMode_immediateDebounceBothEdge = 1, /**< \brief Immediate Debounce Filter Mode on both edges */
125 IfxIom_LamFilterMode_immediateDebounceRisingEdge = 2, /**< \brief Rising edge: Immediate Debounce Filter Mode, falling edge: no filtering */
126 IfxIom_LamFilterMode_immediateDebounceFallingEdge = 3, /**< \brief Rising edge: no filtering, falling edge: Immediate Debounce Filter Mode */
127 IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge = 4, /**< \brief Rising edge: Delayed Debounce Filter Mode, falling edge: Immediate Debounce Filter Mode */
128 IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge = 5, /**< \brief Immediate Debounce Filter Mode, falling edge: Delayed Debounce Filter Mode */
129 IfxIom_LamFilterMode_prescalerOnRisingEdge = 6, /**< \brief Prescaler Mode (triggered on rising edge) */
130 IfxIom_LamFilterMode_prescalerOnFallingEdge = 7, /**< \brief Prescaler Mode (triggered on falling edge) */
131 IfxIom_LamFilterMode_noFilter = 8 /**< \brief No filter (value used for software only ) */
132 } IfxIom_LamFilterMode;
133
134 /** \brief Specifies the Logic Module Analyser Module Number
135 */
136 typedef enum
137 {
138 IfxIom_LamId_0 = 0, /**< \brief Specifies the LAM Id0 */
139 IfxIom_LamId_1, /**< \brief Specifies the LAM Id1 */
140 IfxIom_LamId_2, /**< \brief Specifies the LAM Id2 */
141 IfxIom_LamId_3, /**< \brief Specifies the LAM Id3 */
142 IfxIom_LamId_4, /**< \brief Specifies the LAM Id4 */
143 IfxIom_LamId_5, /**< \brief Specifies the LAM Id5 */
144 IfxIom_LamId_6, /**< \brief Specifies the LAM Id6 */
145 IfxIom_LamId_7, /**< \brief Specifies the LAM Id7 */
146 IfxIom_LamId_8, /**< \brief Specifies the LAM Id8 */
147 IfxIom_LamId_9, /**< \brief Specifies the LAM Id9 */
148 IfxIom_LamId_10, /**< \brief Specifies the LAM Id10 */
149 IfxIom_LamId_11, /**< \brief Specifies the LAM Id11 */
150 IfxIom_LamId_12, /**< \brief Specifies the LAM Id12 */
151 IfxIom_LamId_13, /**< \brief Specifies the LAM Id13 */
152 IfxIom_LamId_14, /**< \brief Specifies the LAM Id14 */
153 IfxIom_LamId_15 /**< \brief Specifies the LAM Id15 */
154 } IfxIom_LamId;
155
156 /** \brief Enable/disable the sensitivity of the module to sleep signal
157 * Definition in Ifx_IOM.CLC.B.EDIS
158 */
159 typedef enum
160 {
161 IfxIom_SleepMode_enable = 0, /**< \brief Enables sleep mode */
162 IfxIom_SleepMode_disable = 1 /**< \brief Disables sleep mode */
163 } IfxIom_SleepMode;
164
165 /** \} */
166
167 /** \addtogroup IfxLld_Iom_Std_Enumeration_Obsolete
168 * \{ */
169 /** \} */
170
171 /** \addtogroup IfxLld_Iom_Std_Utility
172 * \{ */
173
174 /******************************************************************************/
175 /*-------------------------Inline Function Prototypes-------------------------*/
176 /******************************************************************************/
177
178 /** \brief Disables the IOM module .
179 * \param iom Pointer to IOM module registers
180 * \return None
181 */
182 IFX_INLINE void IfxIom_disableModule(Ifx_IOM *iom);
183
184 /** \brief Enable the IOM module control.
185 * \param iom Pointer to IOM module registers
186 * \param clockDivider IOM clock divider. Set to 1 for max clock.
187 * \return None
188 */
189 IFX_INLINE void IfxIom_enableModule(Ifx_IOM *iom, uint8 clockDivider);
190
191 /** \brief Enable/disable the sensitivity of the module to sleep signal
192 * \param iom Pointer to IOM registers
193 * \param mode Mode selection (enable/disable)
194 * \return None
195 */
196 IFX_INLINE void IfxIom_setSleepMode(Ifx_IOM *iom, IfxIom_SleepMode mode);
197
198 /******************************************************************************/
199 /*-------------------------Global Function Prototypes-------------------------*/
200 /******************************************************************************/
201
202 /** \brief Return the frequency used for the filter and timers clock
203 * \param iom Pointer to IOM module registers
204 */
205 IFX_EXTERN float32 IfxIom_getFrequency(Ifx_IOM *iom);
206
207 /** \brief Reset the IOM module
208 * \param iom Pointer to IOM module registers
209 * \return None
210 */
211 IFX_EXTERN void IfxIom_resetModule(Ifx_IOM *iom);
212
213 /** \} */
214
215 /******************************************************************************/
216 /*---------------------Inline Function Implementations------------------------*/
217 /******************************************************************************/
218
219 IFX_INLINE void IfxIom_disableModule(Ifx_IOM *iom)
220 {
221 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
222
223 IfxScuWdt_clearCpuEndinit(psw);
224 iom->CLC.B.DISR = 1;
225 IfxScuWdt_setCpuEndinit(psw);
226 }
227
228
229 IFX_INLINE void IfxIom_enableModule(Ifx_IOM *iom, uint8 clockDivider)
230 {
231 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
232
233 IfxScuWdt_clearCpuEndinit(psw);
234 iom->CLC.B.RMC = clockDivider;
235 iom->CLC.B.DISR = 0;
236 IfxScuWdt_setCpuEndinit(psw);
237 }
238
239
240 IFX_INLINE void IfxIom_setSleepMode(Ifx_IOM *iom, IfxIom_SleepMode mode)
241 {
242 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
243 IfxScuWdt_clearCpuEndinit(passwd);
244 iom->CLC.B.EDIS = mode;
245 IfxScuWdt_setCpuEndinit(passwd);
246 }
247
248
249 #endif /* IFXIOM_H */
IfxIom_LamEventWindowClearEvent_none
Neither edge used to clear event windowcounter.
Definition: IfxIom.h:94
IfxIom_LamId_7
Specifies the LAM Id7.
Definition: IfxIom.h:145
IfxIom_LamFilterMode_immediateDebounceBothEdge
Immediate Debounce Filter Mode on both edges.
Definition: IfxIom.h:124
IfxIom_LamId_0
Specifies the LAM Id0.
Definition: IfxIom.h:138
IfxIom_LamFilterMode
IfxIom_LamFilterMode
FPC filer mode IOM_FPCCTRk.MOD, with additional definition for noFilter.
Definition: IfxIom.h:121
IfxIom_LamId_14
Specifies the LAM Id14.
Definition: IfxIom.h:152
IfxIom_setSleepMode
IFX_INLINE void IfxIom_setSleepMode(Ifx_IOM *iom, IfxIom_SleepMode mode)
Enable/disable the sensitivity of the module to sleep signal.
Definition: IfxIom.h:240
IfxIom_LamFilterMode_delayDebounceBothEdge
Delayed Debounce Filter Mode on both edges.
Definition: IfxIom.h:123
IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge
Rising edge: Delayed Debounce Filter Mode, falling edge: Immediate Debounce Filter Mode...
Definition: IfxIom.h:127
IfxIom_LamEventWindowClearEvent_fallingEdge
Negative edge used to clear event windowcounter.
Definition: IfxIom.h:96
IfxIom_LamId_11
Specifies the LAM Id11.
Definition: IfxIom.h:149
float32
float float32
Definition: Platform_Types.h:170
IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge
Immediate Debounce Filter Mode, falling edge: Delayed Debounce Filter Mode.
Definition: IfxIom.h:128
IfxIom_LamId_15
Specifies the LAM Id15.
Definition: IfxIom.h:153
IfxIom_LamEventWindowClearEvent_risingEdge
Positive edge used to clear event windowcounter.
Definition: IfxIom.h:95
IfxIom_LamEventWindowControlSource_ref
Event window generation is determined from the reference signal.
Definition: IfxIom.h:105
IfxIom_LamId_4
Specifies the LAM Id4.
Definition: IfxIom.h:142
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxIom_SleepMode_enable
Enables sleep mode.
Definition: IfxIom.h:161
IfxCpu_Intrinsics.h
IfxIom_enableModule
IFX_INLINE void IfxIom_enableModule(Ifx_IOM *iom, uint8 clockDivider)
Enable the IOM module control.
Definition: IfxIom.h:229
IfxIom_LamEventWindowRunControl_gated
Event window generation is gated with the monitor or reference signal.
Definition: IfxIom.h:115
IfxIom_LamEventWindowControlSource
IfxIom_LamEventWindowControlSource
Timer control source configuration IOM_LAMCFGm.EWS.
Definition: IfxIom.h:103
IfxIom_LamEventWindowRunControl
IfxIom_LamEventWindowRunControl
Timer run configuration IOM_LAMCFGm.RMS.
Definition: IfxIom.h:112
IfxIom_LamEventTrigger_fallingEdge
Negative edge used to gate event generation.
Definition: IfxIom.h:85
IfxIom_LamEventSource_monXorRef
Monitor signal is EXOR&#39;d with FPCrch.
Definition: IfxIom.h:75
IfxScuWdt.h
SCU basic functionality.
IfxIom_LamFilterMode_immediateDebounceRisingEdge
Rising edge: Immediate Debounce Filter Mode, falling edge: no filtering.
Definition: IfxIom.h:125
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxIom_SleepMode_disable
Disables sleep mode.
Definition: IfxIom.h:162
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxIom_LamId_3
Specifies the LAM Id3.
Definition: IfxIom.h:141
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxIom_LamId_2
Specifies the LAM Id2.
Definition: IfxIom.h:140
IfxIom_LamEventWindowControlSource_mon
Event window generation is determined from the monitor signal.
Definition: IfxIom.h:106
IfxIom_cfg.h
IOM on-chip implementation data.
IfxIom_getFrequency
IFX_EXTERN float32 IfxIom_getFrequency(Ifx_IOM *iom)
Return the frequency used for the filter and timers clock.
Definition: IfxIom.c:53
IfxIom_LamEventWindowClearEvent_anyEdge
Either edge used to clear event windowcounter.
Definition: IfxIom.h:97
IfxIom_LamEventSource
IfxIom_LamEventSource
Event source configuration IOM_LAMCFGm.MOS.
Definition: IfxIom.h:72
IfxIom_LamFilterMode_noFilter
No filter (value used for software only )
Definition: IfxIom.h:131
IfxIom_LamEventTrigger
IfxIom_LamEventTrigger
Event trigger configuration IOM_LAMCFGm.EDS upper two bits.
Definition: IfxIom.h:81
IfxIom_LamEventTrigger_none
Neither edge used to gate event generation.
Definition: IfxIom.h:83
IfxIom_LamId
IfxIom_LamId
Specifies the Logic Module Analyser Module Number.
Definition: IfxIom.h:136
IfxIom_LamEventWindowRunControl_freeRunning
Event window generation is free-running.
Definition: IfxIom.h:114
IfxIom_disableModule
IFX_INLINE void IfxIom_disableModule(Ifx_IOM *iom)
Disables the IOM module .
Definition: IfxIom.h:219
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxIom_resetModule
IFX_EXTERN void IfxIom_resetModule(Ifx_IOM *iom)
Reset the IOM module.
Definition: IfxIom.c:66
IfxIom_LamId_9
Specifies the LAM Id9.
Definition: IfxIom.h:147
IfxIom_LamId_6
Specifies the LAM Id6.
Definition: IfxIom.h:144
IfxIom_LamFilterMode_immediateDebounceFallingEdge
Rising edge: no filtering, falling edge: Immediate Debounce Filter Mode.
Definition: IfxIom.h:126
IfxIom_LamFilterMode_prescalerOnFallingEdge
Prescaler Mode (triggered on falling edge)
Definition: IfxIom.h:130
IfxIom_LamId_13
Specifies the LAM Id13.
Definition: IfxIom.h:151
IfxIom_LamEventTrigger_risingEdge
Positive edge used to gate event generation.
Definition: IfxIom.h:84
IfxIom_LamEventSource_mon
Monitor signal is sourced directly from FPCmch.
Definition: IfxIom.h:74
IfxIom_LamEventTrigger_anyEdge
Either edge used to gate event generation.
Definition: IfxIom.h:86
IfxIom_LamId_8
Specifies the LAM Id8.
Definition: IfxIom.h:146
IfxIom_LamEventWindowClearEvent
IfxIom_LamEventWindowClearEvent
Timer clear event configuration IOM_LAMCFGm.EDS upper lower bits.
Definition: IfxIom.h:92
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxIom_LamId_12
Specifies the LAM Id12.
Definition: IfxIom.h:150
IfxIom_LamFilterMode_prescalerOnRisingEdge
Prescaler Mode (triggered on rising edge)
Definition: IfxIom.h:129
IfxIom_LamId_5
Specifies the LAM Id5.
Definition: IfxIom.h:143
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxIom_LamId_1
Specifies the LAM Id1.
Definition: IfxIom.h:139
IfxIom_LamId_10
Specifies the LAM Id10.
Definition: IfxIom.h:148
IfxIom_SleepMode
IfxIom_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_IOM.CLC.B.EDIS.
Definition: IfxIom.h:159


iLLD_TC26B: IfxIom_Driver.c Source File

  • Iom
  • Driver
IfxIom_Driver.c
Go to the documentation of this file.
1 /**
2 * \file IfxIom_Driver.c
3 * \brief IOM DRIVER details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxIom_Driver.h"
47 #include "IfxIom_bf.h"
48 #include "_Utilities/Ifx_Assert.h"
49
50 /******************************************************************************/
51 /*----------------------------------Macros------------------------------------*/
52 /******************************************************************************/
53
54 #define IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL(refInput) ((IfxIom_RefInputSignal)((refInput >> 8) & 0xFF))
55
56 #define IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL(monInput) ((IfxIom_MonInputSignal)((monInput >> 8) & 0xFF))
57
58 #define IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(refInput) ((refInput >> 0) & 0xFF)
59
60 #define IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(monInput) ((monInput >> 0) & 0xFF)
61
62 /******************************************************************************/
63 /*-------------------------Function Implementations---------------------------*/
64 /******************************************************************************/
65
66 void IfxIom_Driver_clearAllGlitch(IfxIom_Driver *driver)
67 {
68 Ifx_IOM *module = driver->module;
69 module->FPCESR.U = 0xFFFFFFFF;
70 }
71
72
73 void IfxIom_Driver_clearHistory(IfxIom_Driver *driver)
74 {
75 Ifx_IOM *module = driver->module;
76 module->ECMETH0.U = 0;
77 }
78
79
80 void IfxIom_Driver_clearLamMonGlitch(IfxIom_Driver_Lam *driver)
81 {
82 Ifx_IOM *module = driver->iomDriver->module;
83
84 if (driver->monInput == IfxIom_MonInputSignal_p)
85 {
86 module->FPCESR.U = 0x10001 << driver->monIndex;
87 }
88 }
89
90
91 void IfxIom_Driver_clearLamRefGlitch(IfxIom_Driver_Lam *driver)
92 {
93 Ifx_IOM *module = driver->iomDriver->module;
94
95 if (driver->refInput == IfxIom_RefInputSignal_p)
96 {
97 module->FPCESR.U = 0x10001 << driver->refIndex;
98 }
99 }
100
101
102 uint32 IfxIom_Driver_disableEvents(IfxIom_Driver *driver)
103 {
104 uint32 value;
105 value = driver->module->ECMSELR.U;
106 driver->module->ECMSELR.U = 0;
107 return value;
108 }
109
110
111 void IfxIom_Driver_disableLamEvent(IfxIom_Driver_Lam *driver)
112 {
113 IfxIom_Driver *iomDriver = driver->iomDriver;
114 Ifx_IOM *module = iomDriver->module;
115
116 /* Configure the ECM */
117 if (driver->systemEventTriggerThreshold == 1)
118 {
119 module->ECMSELR.U &= ~(1 << (driver->channel + IFX_IOM_ECMSELR_CES0_OFF));
120 }
121 else if (driver->systemEventTriggerThreshold >= 2)
122 {
123 module->ECMSELR.U &= ~(1 << (driver->accumulatedCounterIndex + IFX_IOM_ECMSELR_CTS0_OFF));
124 }
125 else
126 {
127 /* No event generated */
128 }
129 }
130
131
132 void IfxIom_Driver_enableLamEvent(IfxIom_Driver_Lam *driver)
133 {
134 IfxIom_Driver *iomDriver = driver->iomDriver;
135 Ifx_IOM *module = iomDriver->module;
136
137 /* Configure the ECM */
138 if (driver->systemEventTriggerThreshold == 1)
139 {
140 module->ECMSELR.U |= (1 << (driver->channel + IFX_IOM_ECMSELR_CES0_OFF));
141 }
142 else if (driver->systemEventTriggerThreshold >= 2)
143 {
144 module->ECMSELR.U |= (1 << (driver->accumulatedCounterIndex + IFX_IOM_ECMSELR_CTS0_OFF));
145 }
146 else
147 {
148 /* No event generated */
149 }
150 }
151
152
153 void IfxIom_Driver_getHistory(IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
154 {
155 Ifx_IOM *module = driver->module;
156 uint32 value;
157
158 value = module->ECMETH0.U;
159 *a = value & 0xFFFF;
160 *b = value >> 16;
161
162 value = module->ECMETH1.U;
163 *c = value & 0xFFFF;
164 *d = value >> 16;
165 }
166
167
168 boolean IfxIom_Driver_init(IfxIom_Driver *driver, IfxIom_Driver_Config *config)
169 {
170 driver->module = config->module;
171 driver->accumulatedEventUsedMask = 0;
172 driver->lamUsedMask = 0;
173 return TRUE;
174 }
175
176
177 void IfxIom_Driver_initConfig(IfxIom_Driver_Config *config, Ifx_IOM *module)
178 {
179 config->module = module;
180 }
181
182
183 boolean IfxIom_Driver_initLam(IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
184 {
185 boolean result = TRUE;
186 IfxIom_Driver *iomDriver = config->iomDriver;
187 Ifx_IOM *module = iomDriver->module;
188 float32 fiom;
189 fiom = IfxIom_getFrequency(module);
190
191 /* Check parameter ranges */
192 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->systemEventTriggerThreshold & (~IFX_IOM_ECMCCFG_THRC0_MSK)) == 0);
193
194 driver->accumulatedCounterIndex = -1;
195 driver->channel = config->channel;
196 driver->iomDriver = iomDriver;
197
198 if (iomDriver->lamUsedMask & (1 << driver->channel))
199 {
200 /* LAM already in use */
201 result = FALSE;
202 }
203 else
204 {
205 iomDriver->lamUsedMask |= 1 << driver->channel;
206
207 {
208 /* Configure reference input signal */
209 uint8 refIndex;
210 IfxIom_RefInputSignal refInput;
211
212 refIndex = IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(config->ref.input);
213 refInput = IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL(config->ref.input);
214 driver->refIndex = refIndex;
215 driver->refInput = refInput;
216
217 module->FPCCTR[refIndex].B.ISR = refInput;
218
219 if (refInput == IfxIom_RefInputSignal_p)
220 {
221 if (config->ref.filter.mode == IfxIom_LamFilterMode_noFilter)
222 {
223 module->FPCCTR[refIndex].B.MOD = IfxIom_LamFilterMode_immediateDebounceBothEdge;
224 module->FPCCTR[refIndex].B.CMP = 0;
225 }
226 else if ((config->ref.filter.mode == IfxIom_LamFilterMode_prescalerOnFallingEdge)
227 ||
228 (config->ref.filter.mode == IfxIom_LamFilterMode_prescalerOnRisingEdge))
229 {
230 module->FPCCTR[refIndex].B.MOD = config->ref.filter.mode;
231 module->FPCCTR[refIndex].B.CMP = config->ref.filter.prescalerFactor - 1;
232 }
233 else
234 {
235 module->FPCCTR[refIndex].B.MOD = config->ref.filter.mode;
236 module->FPCCTR[refIndex].B.CMP = fiom * config->ref.filter.risingEdgeFilterTime;
237 module->FPCCTR[refIndex].B.RTG = config->ref.filter.clearTimerOnGlitch ? 1 : 0;
238 }
239 }
240 }
241
242 {
243 /* Configure monitor input signal */
244 uint8 monIndex;
245 IfxIom_MonInputSignal monInput;
246
247 monIndex = IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(config->mon.input);
248 monInput = IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL(config->mon.input);
249 driver->monIndex = monIndex;
250 driver->monInput = monInput;
251
252 module->FPCCTR[monIndex].B.ISM = monInput;
253
254 if (monInput == IfxIom_MonInputSignal_p)
255 {
256 if (config->mon.filter.mode == IfxIom_LamFilterMode_noFilter)
257 {
258 module->FPCCTR[monIndex].B.MOD = IfxIom_LamFilterMode_immediateDebounceBothEdge;
259 module->FPCCTR[monIndex].B.CMP = 0;
260 }
261 else
262 {
263 module->FPCCTR[monIndex].B.MOD = config->mon.filter.mode;
264 module->FPCCTR[monIndex].B.CMP = fiom * config->mon.filter.risingEdgeFilterTime;
265 module->FPCCTR[monIndex].B.RTG = config->mon.filter.clearTimerOnGlitch ? 1 : 0;
266 }
267 }
268 }
269
270 {
271 /* Configure the LAM */
272 module->LAMCFG[driver->channel].B.IVR = config->ref.inverted ? 1 : 0;
273 module->LAMCFG[driver->channel].B.IVM = config->mon.inverted ? 1 : 0;
274 module->LAMCFG[driver->channel].B.MOS = config->event.source == IfxIom_LamEventSource_mon ? 0 : 1;
275 module->LAMCFG[driver->channel].B.RMS = config->eventWindow.run;
276 module->LAMCFG[driver->channel].B.EWS = config->eventWindow.controlSource;
277 module->LAMCFG[driver->channel].B.EDS =
278 ((config->eventWindow.clearEvent) << 0)
279 | ((config->event.trigger) << 2)
280 ;
281 module->LAMCFG[driver->channel].B.IVW = config->eventWindow.inverted ? 1 : 0;
282 module->LAMCFG[driver->channel].B.MCS = IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(config->mon.input);
283 module->LAMCFG[driver->channel].B.RCS = IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(config->ref.input);
284
285 module->LAMEWS[driver->channel].B.THR = fiom * config->eventWindow.threshold;
286 }
287
288 {
289 /* Configure the ECM */
290 driver->systemEventTriggerThreshold = config->systemEventTriggerThreshold;
291
292 if (driver->systemEventTriggerThreshold == 1)
293 {
294 module->ECMSELR.U |= 1 << (config->channel + IFX_IOM_ECMSELR_CES0_OFF);
295 }
296 else if (driver->systemEventTriggerThreshold >= 2)
297 {
298 /* Look for a free counter */
299 sint8 index;
300 uint8 accumulatedEventUsedMask = iomDriver->accumulatedEventUsedMask;
301 boolean success = FALSE;
302
303 for (index = 0; index < 4; index++)
304 {
305 if ((accumulatedEventUsedMask & (1 << index)) == 0)
306 {
307 success = TRUE;
308 iomDriver->accumulatedEventUsedMask |= 1 << index;
309 driver->accumulatedCounterIndex = index;
310 module->ECMSELR.U |= 1 << (index + IFX_IOM_ECMSELR_CTS0_OFF);
311
312 module->ECMCCFG.U |= (
313 (driver->channel << IFX_IOM_ECMCCFG_SELC0_OFF)
314 | (driver->systemEventTriggerThreshold << IFX_IOM_ECMCCFG_THRC0_OFF)
315 ) << (index * IFX_IOM_ECMCCFG_SELC1_OFF);
316 break;
317 }
318 }
319
320 result &= success;
321 }
322 else
323 {
324 /* No event generated */
325 }
326 }
327 }
328
329 return result;
330 }
331
332
333 void IfxIom_Driver_initLamConfig(IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
334 {
335 config->iomDriver = driver;
336 config->channel = IfxIom_LamId_0;
337 config->event.source = IfxIom_LamEventSource_mon;
338 config->event.trigger = IfxIom_LamEventTrigger_none;
339 config->eventWindow.clearEvent = IfxIom_LamEventWindowClearEvent_anyEdge;
340 config->eventWindow.controlSource = IfxIom_LamEventWindowControlSource_ref;
341 config->eventWindow.inverted = FALSE;
342 config->eventWindow.run = IfxIom_LamEventWindowRunControl_freeRunning;
343 config->eventWindow.threshold = 0.0;
344 config->mon.filter.clearTimerOnGlitch = FALSE;
345 config->mon.filter.fallingEdgeFilterTime = 0.0;
346 config->mon.filter.mode = IfxIom_LamFilterMode_noFilter;
347 config->mon.filter.prescalerFactor = 1;
348 config->mon.filter.risingEdgeFilterTime = 0.0;
349 config->mon.input = IfxIom_MonInput_p33_0;
350 config->mon.inverted = FALSE;
351 config->ref.filter.clearTimerOnGlitch = FALSE;
352 config->ref.filter.fallingEdgeFilterTime = 0.0;
353 config->ref.filter.mode = IfxIom_LamFilterMode_noFilter;
354 config->ref.filter.prescalerFactor = 1;
355 config->ref.filter.risingEdgeFilterTime = 0.0;
356 config->ref.input = IfxIom_RefInput_p33_0;
357 config->ref.inverted = FALSE;
358 config->systemEventTriggerThreshold = 1;
359 }
360
361
362 void IfxIom_Driver_isLamMonGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
363 {
364 Ifx_IOM *module = driver->iomDriver->module;
365
366 if (driver->monInput == IfxIom_MonInputSignal_p)
367 {
368 uint32 index;
369 index = driver->monIndex;
370 *risingEdgeGlitch = (module->FPCESR.U >> (index + IFX_IOM_FPCESR_REG0_OFF)) != 0;
371 *fallingEdgeGlitch = (module->FPCESR.U >> (index + IFX_IOM_FPCESR_FEG0_OFF)) != 0;
372 }
373 else
374 {
375 *risingEdgeGlitch = FALSE;
376 *fallingEdgeGlitch = FALSE;
377 }
378 }
379
380
381 void IfxIom_Driver_isLamRefGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
382 {
383 Ifx_IOM *module = driver->iomDriver->module;
384
385 if (driver->refInput == IfxIom_RefInputSignal_p)
386 {
387 uint32 index;
388 index = driver->refIndex;
389 *risingEdgeGlitch = (module->FPCESR.U >> (index + IFX_IOM_FPCESR_REG0_OFF)) != 0;
390 *fallingEdgeGlitch = (module->FPCESR.U >> (index + IFX_IOM_FPCESR_FEG0_OFF)) != 0;
391 }
392 else
393 {
394 *risingEdgeGlitch = FALSE;
395 *fallingEdgeGlitch = FALSE;
396 }
397 }
398
399
400 void IfxIom_Driver_restoreEvents(IfxIom_Driver *driver, uint32 mask)
401 {
402 driver->module->ECMSELR.U = mask;
403 }
IfxIom_Driver_init
boolean IfxIom_Driver_init(IfxIom_Driver *driver, IfxIom_Driver_Config *config)
Initialize the IOM Must be called before IfxIom_Driver_initLam()
Definition: IfxIom_Driver.c:168
IfxIom_LamFilterMode_immediateDebounceBothEdge
Immediate Debounce Filter Mode on both edges.
Definition: IfxIom.h:124
IfxIom_Driver_LamConfig
IOM LAM configuration.
Definition: IfxIom_Driver.h:208
IfxIom_Driver::module
Ifx_IOM * module
Pointer to IOM module SFR set.
Definition: IfxIom_Driver.h:139
IfxIom_Driver_Lam::refIndex
uint8 refIndex
Reference input index.
Definition: IfxIom_Driver.h:199
IfxIom_LamId_0
Specifies the LAM Id0.
Definition: IfxIom.h:138
IfxIom_Driver_Lam::accumulatedCounterIndex
sint8 accumulatedCounterIndex
Accumulated counter used. Negative value means no counter used.
Definition: IfxIom_Driver.h:202
IfxIom_Driver_LamFilterConfig::clearTimerOnGlitch
boolean clearTimerOnGlitch
If set, the timer is cleared on glitch, else it is decremented.
Definition: IfxIom_Driver.h:124
IfxIom_Driver_LamFilterConfig::risingEdgeFilterTime
float32 risingEdgeFilterTime
Rising edge filter time in second for immediate debounce filter mode. In delayed filter time this cor...
Definition: IfxIom_Driver.h:128
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxIom_RefInput_p33_0
Definition: IfxIom_cfg.h:173
IfxIom_Driver_Config
IOM Driver Configuration.
Definition: IfxIom_Driver.h:187
IfxIom_Driver_Lam::systemEventTriggerThreshold
uint8 systemEventTriggerThreshold
Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event...
Definition: IfxIom_Driver.h:203
IfxIom_Driver_LamEventWindowConfig::controlSource
IfxIom_LamEventWindowControlSource controlSource
Timer control source.
Definition: IfxIom_Driver.h:157
IfxIom_Driver_disableEvents
uint32 IfxIom_Driver_disableEvents(IfxIom_Driver *driver)
Disable all event generation.
Definition: IfxIom_Driver.c:102
IfxIom_Driver_LamConfig::mon
IfxIom_Driver_LamMonConfig mon
LAM Monitor input configuration.
Definition: IfxIom_Driver.h:214
IfxIom_Driver_LamRefConfig::input
IfxIom_RefInput input
Reference input.
Definition: IfxIom_Driver.h:177
IfxIom_Driver_clearAllGlitch
void IfxIom_Driver_clearAllGlitch(IfxIom_Driver *driver)
Clear all LAM monitor and reference glitch flags.
Definition: IfxIom_Driver.c:66
IfxIom_Driver_clearHistory
void IfxIom_Driver_clearHistory(IfxIom_Driver *driver)
Clear the IOM event history.
Definition: IfxIom_Driver.c:73
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxIom_Driver_LamRefConfig::inverted
boolean inverted
If TRUE, the signal is inverted.
Definition: IfxIom_Driver.h:178
float32
float float32
Definition: Platform_Types.h:170
Ifx_Assert.h
Assert functions.
IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX
#define IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(monInput)
Definition: IfxIom_Driver.c:60
IfxIom_LamEventWindowControlSource_ref
Event window generation is determined from the reference signal.
Definition: IfxIom.h:105
IfxIom_RefInputSignal
IfxIom_RefInputSignal
IOM_FPCCTRk.ISR.
Definition: IfxIom_cfg.h:86
IfxIom_Driver_LamConfig::event
IfxIom_Driver_LamEventConfig event
LAM event configuration.
Definition: IfxIom_Driver.h:212
IfxIom_Driver_Lam::channel
IfxIom_LamId channel
LAM Channel.
Definition: IfxIom_Driver.h:197
IfxIom_Driver_LamEventWindowConfig::clearEvent
IfxIom_LamEventWindowClearEvent clearEvent
Timer clear event.
Definition: IfxIom_Driver.h:156
IfxIom_Driver_isLamMonGlitch
void IfxIom_Driver_isLamMonGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM monitor glitch flags.
Definition: IfxIom_Driver.c:362
IfxIom_Driver.h
IOM DRIVER details.
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxIom_Driver_clearLamMonGlitch
void IfxIom_Driver_clearLamMonGlitch(IfxIom_Driver_Lam *driver)
Clear the LAM monitor signal glitch flag.
Definition: IfxIom_Driver.c:80
IfxIom_Driver_LamEventConfig::trigger
IfxIom_LamEventTrigger trigger
Event trigger.
Definition: IfxIom_Driver.h:149
IfxIom_Driver_LamFilterConfig::fallingEdgeFilterTime
float32 fallingEdgeFilterTime
Falling edge filter time in second for immediate debounce filter mode. In delayed filter time this co...
Definition: IfxIom_Driver.h:125
IfxIom_Driver_disableLamEvent
void IfxIom_Driver_disableLamEvent(IfxIom_Driver_Lam *driver)
Disable the event generation for the LAM.
Definition: IfxIom_Driver.c:111
IfxIom_Driver_initConfig
void IfxIom_Driver_initConfig(IfxIom_Driver_Config *config, Ifx_IOM *module)
Set the IOM default configuration.
Definition: IfxIom_Driver.c:177
IfxIom_Driver_isLamRefGlitch
void IfxIom_Driver_isLamRefGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM reference glitch flags.
Definition: IfxIom_Driver.c:381
IfxIom_Driver_LamRefConfig::filter
IfxIom_Driver_LamFilterConfig filter
Filter configuration.
Definition: IfxIom_Driver.h:176
IfxIom_getFrequency
float32 IfxIom_getFrequency(Ifx_IOM *iom)
Return the frequency used for the filter and timers clock.
Definition: IfxIom.c:53
IfxIom_LamEventWindowClearEvent_anyEdge
Either edge used to clear event windowcounter.
Definition: IfxIom.h:97
IfxIom_Driver_enableLamEvent
void IfxIom_Driver_enableLamEvent(IfxIom_Driver_Lam *driver)
Enable the event genration for the LAM.
Definition: IfxIom_Driver.c:132
IfxIom_MonInput_p33_0
Value=0xXXYY where XX=ISM, YY=k.
Definition: IfxIom_cfg.h:103
IfxIom_Driver
IOM driver.
Definition: IfxIom_Driver.h:137
IfxIom_LamFilterMode_noFilter
No filter (value used for software only )
Definition: IfxIom.h:131
IfxIom_Driver_getHistory
void IfxIom_Driver_getHistory(IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ...
Definition: IfxIom_Driver.c:153
IfxIom_Driver::lamUsedMask
uint16 lamUsedMask
Indicates the used / unused LAM. bit0=LAM0, bit1=LAM2, ... 0=unused, 1=used.
Definition: IfxIom_Driver.h:141
IfxIom_Driver_LamEventConfig::source
IfxIom_LamEventSource source
Event source.
Definition: IfxIom_Driver.h:148
IfxIom_RefInputSignal_p
Signal input Pn_IN (from portlogic) selected.
Definition: IfxIom_cfg.h:88
IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL
#define IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL(monInput)
Definition: IfxIom_Driver.c:56
IfxIom_Driver_LamConfig::eventWindow
IfxIom_Driver_LamEventWindowConfig eventWindow
LAM eventWindow configuration.
Definition: IfxIom_Driver.h:213
IfxIom_Driver_LamEventWindowConfig::run
IfxIom_LamEventWindowRunControl run
Timer run control.
Definition: IfxIom_Driver.h:159
IfxIom_Driver_LamConfig::ref
IfxIom_Driver_LamRefConfig ref
LAM reference input configuration.
Definition: IfxIom_Driver.h:215
IfxIom_Driver_clearLamRefGlitch
void IfxIom_Driver_clearLamRefGlitch(IfxIom_Driver_Lam *driver)
Clear the LAM reference signal glitch flag.
Definition: IfxIom_Driver.c:91
IfxIom_LamEventTrigger_none
Neither edge used to gate event generation.
Definition: IfxIom.h:83
IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL
#define IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL(refInput)
Definition: IfxIom_Driver.c:54
IfxIom_Driver_initLamConfig
void IfxIom_Driver_initLamConfig(IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
Set the LAM default configuration.
Definition: IfxIom_Driver.c:333
IfxIom_Driver_restoreEvents
void IfxIom_Driver_restoreEvents(IfxIom_Driver *driver, uint32 mask)
Restore the IOM event mask.
Definition: IfxIom_Driver.c:400
IfxIom_Driver::accumulatedEventUsedMask
uint8 accumulatedEventUsedMask
Indicates the used / unused accumulated counter ECM. bit0=CTS0, bit1=CTS2, ... 0=unused, 1=used.
Definition: IfxIom_Driver.h:140
IfxIom_LamEventWindowRunControl_freeRunning
Event window generation is free-running.
Definition: IfxIom.h:114
IfxIom_Driver_LamFilterConfig::prescalerFactor
uint32 prescalerFactor
Prescaler factor, must be > 0, only valid for prescaler mode.
Definition: IfxIom_Driver.h:127
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxIom_Driver_initLam
boolean IfxIom_Driver_initLam(IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
Initialize the LAM channel.
Definition: IfxIom_Driver.c:183
IfxIom_Driver_LamMonConfig::input
IfxIom_MonInput input
Monitor input.
Definition: IfxIom_Driver.h:168
IfxIom_Driver_Lam::refInput
IfxIom_RefInputSignal refInput
Reference input.
Definition: IfxIom_Driver.h:200
IfxIom_Driver_LamEventWindowConfig::threshold
float32 threshold
Event window threshold in second. If 0, no event are generated.
Definition: IfxIom_Driver.h:160
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxIom_LamFilterMode_prescalerOnFallingEdge
Prescaler Mode (triggered on falling edge)
Definition: IfxIom.h:130
IfxIom_LamEventSource_mon
Monitor signal is sourced directly from FPCmch.
Definition: IfxIom.h:74
IfxIom_MonInputSignal_p
Signal input Pn_IN (from portlogic) selected.
Definition: IfxIom_cfg.h:78
IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX
#define IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(refInput)
Definition: IfxIom_Driver.c:58
IfxIom_LamFilterMode_prescalerOnRisingEdge
Prescaler Mode (triggered on rising edge)
Definition: IfxIom.h:129
IfxIom_Driver_LamFilterConfig::mode
IfxIom_LamFilterMode mode
Filter mode.
Definition: IfxIom_Driver.h:126
TRUE
#define TRUE
Definition: Platform_Types.h:90
uint8
unsigned char uint8
Definition: Platform_Types.h:108
sint8
signed char sint8
Definition: Platform_Types.h:125
IfxIom_Driver_Lam
IOM LAM object.
Definition: IfxIom_Driver.h:194
IfxIom_Driver_Lam::iomDriver
IfxIom_Driver * iomDriver
Main IOM Driver.
Definition: IfxIom_Driver.h:196
IfxIom_MonInputSignal
IfxIom_MonInputSignal
IOM_FPCCTRk.ISM.
Definition: IfxIom_cfg.h:76
IfxIom_Driver_Lam::monIndex
uint8 monIndex
Monitor input index.
Definition: IfxIom_Driver.h:198
IfxIom_Driver_Lam::monInput
IfxIom_MonInputSignal monInput
Monitor input.
Definition: IfxIom_Driver.h:201


iLLD_TC26B: IfxIom_Driver.h Source File

  • Iom
  • Driver
IfxIom_Driver.h
Go to the documentation of this file.
1 /**
2 * \file IfxIom_Driver.h
3 * \brief IOM DRIVER details
4 * \ingroup IfxLld_Iom
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * The IOM driver enable easy usage of the IOM module, by abstracting the internal module structure.
42 * For it's configuration it requires the LAM channel to be used together with the reference and monitor signal. The muxes and filters
43 * are configured accordingly. The driver handles the event combiner "accumulated event timer" resources base on the single or multi-event
44 * configuration making use of the next free timer if required.
45 *
46 * Double resource usage (LAM channel, accumulated event timers) is checked and reported at driver initialization .
47 *
48 * The driver care for the timing and clock conversion, all timing configuration are to be given in second.
49 *
50 * Example of use:
51 * - Initialization of the Iom
52 * - Initialization of LAM channel 0 with:
53 * - IOM monitor input: External pin P20.13, delay debounce filter both edge 0.5us, signal inverted,
54 * - IOM reference: GTM TOUT14, no filter, not inverted
55 * - Event window controlled by ref signal, with a free running timer and cleared on any edge of the reference signal, threshold set to 1us
56 * - Event source is XOR of monitor and reference signal, event is triggered on falling edge of the XOR
57 * - An alarm signal is generated if the monitor signal is not within the threshold, after two events.
58 *
59 *
60 * \code
61 * void InitLam(IfxIom_Driver *driver, IfxIom_Driver *lam){
62 * IfxIom_Driver_Config configDriver;
63 * IfxIom_Driver_LamConfig configLam;
64 *
65 * IfxIom_Driver_initConfig(&configDriver, &MODULE_IOM);
66 * IfxIom_Driver_init(driver, &configDriver);
67 *
68 * IfxIom_Driver_initLamConfig(&configLam, driver);
69 *
70 * configLam.channel = IfxIom_LamId_0;
71 *
72 * configLam.mon.input = IfxIom_MonInput_p20_13;
73 * configLam.mon.filter.mode = IfxIom_LamFilterMode_delayDebounceBothEdge;
74 * configLam.mon.filter.clearTimerOnGlitch = FALSE;
75 * configLam.mon.filter.fallingEdgeFilterTime = 0.5e-6;
76 * configLam.mon.filter.risingEdgeFilterTime = configLam.ref.filter.fallingEdgeFilterTime;
77 * configLam.mon.inverted = TRUE;
78 *
79 * configLam.ref.input= IfxIom_RefInput_gtmTout14;
80 * configLam.ref.filter.mode = IfxIom_LamFilterMode_noFilter;
81 * configLam.ref.inverted = FALSE;
82 *
83 * configLam.eventWindow.controlSource = IfxIom_LamEventWindowControlSource_ref;
84 * configLam.eventWindow.run = IfxIom_LamEventWindowRunControl_freeRunning;
85 * configLam.eventWindow.clearEvent = IfxIom_LamEventWindowClearEvent_anyEdge;
86 * configLam.eventWindow.threshold = 1e-6;
87 * configLam.event.source = IfxIom_LamEventSource_monXorRef;
88 * configLam.event.trigger = IfxIom_LamEventTrigger_fallingEdge;
89 *
90 * configLam.systemEventTriggerThreshold = 2;
91 *
92 * IfxIom_Driver_initLam(lam, &configLam);
93 *
94 * }
95 * \endcode
96 *
97 * \defgroup IfxLld_Iom_Driver IOM Driver
98 * \ingroup IfxLld_Iom
99 * \defgroup IfxLld_Iom_Driver_func Driver Functions
100 * \ingroup IfxLld_Iom_Driver
101 * \defgroup IfxLld_Iom_Driver_struct Structures
102 * \ingroup IfxLld_Iom_Driver
103 */
104
105 #ifndef IFXIOM_DRIVER_H
106 #define IFXIOM_DRIVER_H 1
107
108 /******************************************************************************/
109 /*----------------------------------Includes----------------------------------*/
110 /******************************************************************************/
111
112 #include "Iom/Std/IfxIom.h"
113
114 /******************************************************************************/
115 /*-----------------------------Data Structures--------------------------------*/
116 /******************************************************************************/
117
118 /** \addtogroup IfxLld_Iom_Driver_struct
119 * \{ */
120 /** \brief IOM LAM filter configuration
121 */
122 typedef struct
123 {
124 boolean clearTimerOnGlitch; /**< \brief If set, the timer is cleared on glitch, else it is decremented */
125 float32 fallingEdgeFilterTime; /**< \brief Falling edge filter time in second for immediate debounce filter mode. In delayed filter time this corresponds to the minimal filter time. */
126 IfxIom_LamFilterMode mode; /**< \brief Filter mode */
127 uint32 prescalerFactor; /**< \brief Prescaler factor, must be > 0, only valid for prescaler mode */
128 float32 risingEdgeFilterTime; /**< \brief Rising edge filter time in second for immediate debounce filter mode. In delayed filter time this corresponds to the minimal filter time. */
129 } IfxIom_Driver_LamFilterConfig;
130
131 /** \} */
132
133 /** \addtogroup IfxLld_Iom_Driver_struct
134 * \{ */
135 /** \brief IOM driver
136 */
137 typedef struct
138 {
139 Ifx_IOM *module; /**< \brief Pointer to IOM module SFR set */
140 uint8 accumulatedEventUsedMask; /**< \brief Indicates the used / unused accumulated counter ECM. bit0=CTS0, bit1=CTS2, ... 0=unused, 1=used */
141 uint16 lamUsedMask; /**< \brief Indicates the used / unused LAM. bit0=LAM0, bit1=LAM2, ... 0=unused, 1=used */
142 } IfxIom_Driver;
143
144 /** \brief IOM LAM event configuration
145 */
146 typedef struct
147 {
148 IfxIom_LamEventSource source; /**< \brief Event source */
149 IfxIom_LamEventTrigger trigger; /**< \brief Event trigger */
150 } IfxIom_Driver_LamEventConfig;
151
152 /** \brief IOM LAM event window configuration
153 */
154 typedef struct
155 {
156 IfxIom_LamEventWindowClearEvent clearEvent; /**< \brief Timer clear event */
157 IfxIom_LamEventWindowControlSource controlSource; /**< \brief Timer control source */
158 boolean inverted; /**< \brief If TRUE, the event window is inverted */
159 IfxIom_LamEventWindowRunControl run; /**< \brief Timer run control */
160 float32 threshold; /**< \brief Event window threshold in second. If 0, no event are generated */
161 } IfxIom_Driver_LamEventWindowConfig;
162
163 /** \brief IOM LAM monitor input configuration
164 */
165 typedef struct
166 {
167 IfxIom_Driver_LamFilterConfig filter; /**< \brief Filter configuration */
168 IfxIom_MonInput input; /**< \brief Monitor input */
169 boolean inverted; /**< \brief If TRUE, the signal is inverted */
170 } IfxIom_Driver_LamMonConfig;
171
172 /** \brief IOM LAM reference input configuration
173 */
174 typedef struct
175 {
176 IfxIom_Driver_LamFilterConfig filter; /**< \brief Filter configuration */
177 IfxIom_RefInput input; /**< \brief Reference input */
178 boolean inverted; /**< \brief If TRUE, the signal is inverted */
179 } IfxIom_Driver_LamRefConfig;
180
181 /** \} */
182
183 /** \addtogroup IfxLld_Iom_Driver_struct
184 * \{ */
185 /** \brief IOM Driver Configuration
186 */
187 typedef struct
188 {
189 Ifx_IOM *module; /**< \brief IOM module SFRs */
190 } IfxIom_Driver_Config;
191
192 /** \brief IOM LAM object
193 */
194 typedef struct
195 {
196 IfxIom_Driver *iomDriver; /**< \brief Main IOM Driver */
197 IfxIom_LamId channel; /**< \brief LAM Channel */
198 uint8 monIndex; /**< \brief Monitor input index */
199 uint8 refIndex; /**< \brief Reference input index */
200 IfxIom_RefInputSignal refInput; /**< \brief Reference input */
201 IfxIom_MonInputSignal monInput; /**< \brief Monitor input */
202 sint8 accumulatedCounterIndex; /**< \brief Accumulated counter used. Negative value means no counter used */
203 uint8 systemEventTriggerThreshold; /**< \brief Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event. Value one enables the trigger event. Value from 2 to 15 will use the counter to filter events, max 4 counters exists for the IOM. */
204 } IfxIom_Driver_Lam;
205
206 /** \brief IOM LAM configuration
207 */
208 typedef struct
209 {
210 IfxIom_Driver *iomDriver; /**< \brief Pointer to the IOM driver */
211 IfxIom_LamId channel; /**< \brief LAM channel to be used */
212 IfxIom_Driver_LamEventConfig event; /**< \brief LAM event configuration */
213 IfxIom_Driver_LamEventWindowConfig eventWindow; /**< \brief LAM eventWindow configuration */
214 IfxIom_Driver_LamMonConfig mon; /**< \brief LAM Monitor input configuration */
215 IfxIom_Driver_LamRefConfig ref; /**< \brief LAM reference input configuration */
216 uint8 systemEventTriggerThreshold; /**< \brief Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event. Value one enables the trigger event. Value from 2 to 15 will use the counter to filter events, max 4 counters exists for the IOM. */
217 } IfxIom_Driver_LamConfig;
218
219 /** \} */
220
221 /** \addtogroup IfxLld_Iom_Driver_func
222 * \{ */
223
224 /******************************************************************************/
225 /*-------------------------Global Function Prototypes-------------------------*/
226 /******************************************************************************/
227
228 /** \brief Clear all LAM monitor and reference glitch flags
229 * \param driver Pointer to the IOM driver object
230 * \return None
231 */
232 IFX_EXTERN void IfxIom_Driver_clearAllGlitch(IfxIom_Driver *driver);
233
234 /** \brief Clear the IOM event history
235 * \param driver Pointer to the IOM driver object
236 * \return None
237 */
238 IFX_EXTERN void IfxIom_Driver_clearHistory(IfxIom_Driver *driver);
239
240 /** \brief Clear the LAM monitor signal glitch flag
241 * \param driver Pointer to the LAM driver object
242 * \return None
243 */
244 IFX_EXTERN void IfxIom_Driver_clearLamMonGlitch(IfxIom_Driver_Lam *driver);
245
246 /** \brief Clear the LAM reference signal glitch flag
247 * \param driver Pointer to the LAM driver object
248 * \return None
249 */
250 IFX_EXTERN void IfxIom_Driver_clearLamRefGlitch(IfxIom_Driver_Lam *driver);
251
252 /** \brief Disable all event generation
253 * \param driver Pointer to the IOM driver object
254 * \return Return the configured events
255 */
256 IFX_EXTERN uint32 IfxIom_Driver_disableEvents(IfxIom_Driver *driver);
257
258 /** \brief Disable the event generation for the LAM
259 * \param driver Pointer to the LAM driver object
260 * \return None
261 */
262 IFX_EXTERN void IfxIom_Driver_disableLamEvent(IfxIom_Driver_Lam *driver);
263
264 /** \brief Enable the event genration for the LAM
265 * \param driver Pointer to the LAM driver object
266 * \return None
267 */
268 IFX_EXTERN void IfxIom_Driver_enableLamEvent(IfxIom_Driver_Lam *driver);
269
270 /** \brief Return the IOM event history.
271 * In returned mask value, bit0= LAM0, bit1=LAM1, ...
272 * \param driver Pointer to the IOM driver object
273 * \param a Event mask of history level 0 (Last event)
274 * \param b Event mask of history level 1
275 * \param c Event mask of history level 2
276 * \param d Event mask of history level 3 (oldest event)
277 * \return None
278 */
279 IFX_EXTERN void IfxIom_Driver_getHistory(IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d);
280
281 /** \brief Initialize the IOM
282 * Must be called before IfxIom_Driver_initLam()
283 * \param driver Pointer to the IOM driver object. Will be initialized by the function
284 * \param config IOM driver configuration
285 * \return TRUE in case of success else FALSE
286 */
287 IFX_EXTERN boolean IfxIom_Driver_init(IfxIom_Driver *driver, IfxIom_Driver_Config *config);
288
289 /** \brief Set the IOM default configuration
290 * \param config IOM configuration. Will be initialized by the function
291 * \param module Pointer to the IOM module
292 * \return None
293 */
294 IFX_EXTERN void IfxIom_Driver_initConfig(IfxIom_Driver_Config *config, Ifx_IOM *module);
295
296 /** \brief Initialize the LAM channel
297 * \param driver Pointer to the LAM driver object. Will be initialized by the function
298 * \param config LAM driver configuration
299 * \return TRUE in case of success else FALSE
300 */
301 IFX_EXTERN boolean IfxIom_Driver_initLam(IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config);
302
303 /** \brief Set the LAM default configuration
304 * \param config LAM configuration. Will be initialized by the function
305 * \param driver Pointer to the IOM driver object
306 * \return None
307 */
308 IFX_EXTERN void IfxIom_Driver_initLamConfig(IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver);
309
310 /** \brief Return the LAM monitor glitch flags
311 * \param driver Pointer to the LAM driver object
312 * \param risingEdgeGlitch Set to TRUE by the function if rising edge glitch were detected on the monitor signal
313 * \param fallingEdgeGlitch Set to TRUE by the function if falling edge glitch were detected on the monitor signal
314 * \return None
315 */
316 IFX_EXTERN void IfxIom_Driver_isLamMonGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch);
317
318 /** \brief Return the LAM reference glitch flags
319 * \param driver Pointer to the LAM driver object
320 * \param risingEdgeGlitch Set to TRUE by the function if rising edge glitch were detected on the reference signal
321 * \param fallingEdgeGlitch Set to TRUE by the function if falling edge glitch were detected on the reference signal
322 * \return None
323 */
324 IFX_EXTERN void IfxIom_Driver_isLamRefGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch);
325
326 /** \brief Restore the IOM event mask
327 * \param driver Pointer to the IOM driver object
328 * \param mask Event configuration as returned by IfxIom_Driver_disableEvents()
329 * \return None
330 */
331 IFX_EXTERN void IfxIom_Driver_restoreEvents(IfxIom_Driver *driver, uint32 mask);
332
333 /** \} */
334
335 #endif /* IFXIOM_DRIVER_H */
IfxIom_Driver_init
IFX_EXTERN boolean IfxIom_Driver_init(IfxIom_Driver *driver, IfxIom_Driver_Config *config)
Initialize the IOM Must be called before IfxIom_Driver_initLam()
Definition: IfxIom_Driver.c:168
IfxIom_Driver_LamConfig
IOM LAM configuration.
Definition: IfxIom_Driver.h:208
IfxIom_Driver::module
Ifx_IOM * module
Pointer to IOM module SFR set.
Definition: IfxIom_Driver.h:139
IfxIom_Driver_Lam::refIndex
uint8 refIndex
Reference input index.
Definition: IfxIom_Driver.h:199
IfxIom_LamFilterMode
IfxIom_LamFilterMode
FPC filer mode IOM_FPCCTRk.MOD, with additional definition for noFilter.
Definition: IfxIom.h:121
IfxIom_Driver_Lam::accumulatedCounterIndex
sint8 accumulatedCounterIndex
Accumulated counter used. Negative value means no counter used.
Definition: IfxIom_Driver.h:202
IfxIom_Driver_LamEventWindowConfig
IOM LAM event window configuration.
Definition: IfxIom_Driver.h:154
IfxIom_Driver_LamFilterConfig::clearTimerOnGlitch
boolean clearTimerOnGlitch
If set, the timer is cleared on glitch, else it is decremented.
Definition: IfxIom_Driver.h:124
IfxIom_Driver_LamFilterConfig::risingEdgeFilterTime
float32 risingEdgeFilterTime
Rising edge filter time in second for immediate debounce filter mode. In delayed filter time this cor...
Definition: IfxIom_Driver.h:128
IfxIom_Driver_LamMonConfig
IOM LAM monitor input configuration.
Definition: IfxIom_Driver.h:165
IfxIom_Driver_Config
IOM Driver Configuration.
Definition: IfxIom_Driver.h:187
IfxIom_Driver_Lam::systemEventTriggerThreshold
uint8 systemEventTriggerThreshold
Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event...
Definition: IfxIom_Driver.h:203
IfxIom_Driver_LamEventWindowConfig::controlSource
IfxIom_LamEventWindowControlSource controlSource
Timer control source.
Definition: IfxIom_Driver.h:157
IfxIom_Driver_disableEvents
IFX_EXTERN uint32 IfxIom_Driver_disableEvents(IfxIom_Driver *driver)
Disable all event generation.
Definition: IfxIom_Driver.c:102
IfxIom_Driver_LamConfig::mon
IfxIom_Driver_LamMonConfig mon
LAM Monitor input configuration.
Definition: IfxIom_Driver.h:214
IfxIom_Driver_LamRefConfig::input
IfxIom_RefInput input
Reference input.
Definition: IfxIom_Driver.h:177
IfxIom_Driver_clearAllGlitch
IFX_EXTERN void IfxIom_Driver_clearAllGlitch(IfxIom_Driver *driver)
Clear all LAM monitor and reference glitch flags.
Definition: IfxIom_Driver.c:66
IfxIom.h
IOM basic functionality.
IfxIom_Driver_clearHistory
IFX_EXTERN void IfxIom_Driver_clearHistory(IfxIom_Driver *driver)
Clear the IOM event history.
Definition: IfxIom_Driver.c:73
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxIom_Driver_LamEventWindowConfig::inverted
boolean inverted
If TRUE, the event window is inverted.
Definition: IfxIom_Driver.h:158
float32
float float32
Definition: Platform_Types.h:170
IfxIom_RefInputSignal
IfxIom_RefInputSignal
IOM_FPCCTRk.ISR.
Definition: IfxIom_cfg.h:86
IfxIom_Driver_LamConfig::event
IfxIom_Driver_LamEventConfig event
LAM event configuration.
Definition: IfxIom_Driver.h:212
IfxIom_Driver_Lam::channel
IfxIom_LamId channel
LAM Channel.
Definition: IfxIom_Driver.h:197
IfxIom_LamEventWindowControlSource
IfxIom_LamEventWindowControlSource
Timer control source configuration IOM_LAMCFGm.EWS.
Definition: IfxIom.h:103
IfxIom_Driver_LamEventWindowConfig::clearEvent
IfxIom_LamEventWindowClearEvent clearEvent
Timer clear event.
Definition: IfxIom_Driver.h:156
IfxIom_Driver_LamRefConfig
IOM LAM reference input configuration.
Definition: IfxIom_Driver.h:174
IfxIom_Driver_isLamMonGlitch
IFX_EXTERN void IfxIom_Driver_isLamMonGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM monitor glitch flags.
Definition: IfxIom_Driver.c:362
IfxIom_LamEventWindowRunControl
IfxIom_LamEventWindowRunControl
Timer run configuration IOM_LAMCFGm.RMS.
Definition: IfxIom.h:112
IfxIom_Driver_clearLamMonGlitch
IFX_EXTERN void IfxIom_Driver_clearLamMonGlitch(IfxIom_Driver_Lam *driver)
Clear the LAM monitor signal glitch flag.
Definition: IfxIom_Driver.c:80
IfxIom_Driver_LamEventConfig::trigger
IfxIom_LamEventTrigger trigger
Event trigger.
Definition: IfxIom_Driver.h:149
IfxIom_Driver_LamFilterConfig::fallingEdgeFilterTime
float32 fallingEdgeFilterTime
Falling edge filter time in second for immediate debounce filter mode. In delayed filter time this co...
Definition: IfxIom_Driver.h:125
IfxIom_Driver_disableLamEvent
IFX_EXTERN void IfxIom_Driver_disableLamEvent(IfxIom_Driver_Lam *driver)
Disable the event generation for the LAM.
Definition: IfxIom_Driver.c:111
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxIom_Driver_initConfig
IFX_EXTERN void IfxIom_Driver_initConfig(IfxIom_Driver_Config *config, Ifx_IOM *module)
Set the IOM default configuration.
Definition: IfxIom_Driver.c:177
IfxIom_Driver_isLamRefGlitch
IFX_EXTERN void IfxIom_Driver_isLamRefGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM reference glitch flags.
Definition: IfxIom_Driver.c:381
IfxIom_Driver_LamMonConfig::filter
IfxIom_Driver_LamFilterConfig filter
Filter configuration.
Definition: IfxIom_Driver.h:167
IfxIom_LamEventSource
IfxIom_LamEventSource
Event source configuration IOM_LAMCFGm.MOS.
Definition: IfxIom.h:72
IfxIom_Driver_enableLamEvent
IFX_EXTERN void IfxIom_Driver_enableLamEvent(IfxIom_Driver_Lam *driver)
Enable the event genration for the LAM.
Definition: IfxIom_Driver.c:132
IfxIom_Driver
IOM driver.
Definition: IfxIom_Driver.h:137
IfxIom_Driver_getHistory
IFX_EXTERN void IfxIom_Driver_getHistory(IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ...
Definition: IfxIom_Driver.c:153
IfxIom_Driver::lamUsedMask
uint16 lamUsedMask
Indicates the used / unused LAM. bit0=LAM0, bit1=LAM2, ... 0=unused, 1=used.
Definition: IfxIom_Driver.h:141
IfxIom_Driver_LamEventConfig::source
IfxIom_LamEventSource source
Event source.
Definition: IfxIom_Driver.h:148
IfxIom_LamEventTrigger
IfxIom_LamEventTrigger
Event trigger configuration IOM_LAMCFGm.EDS upper two bits.
Definition: IfxIom.h:81
IfxIom_Driver_LamConfig::eventWindow
IfxIom_Driver_LamEventWindowConfig eventWindow
LAM eventWindow configuration.
Definition: IfxIom_Driver.h:213
IfxIom_Driver_LamEventWindowConfig::run
IfxIom_LamEventWindowRunControl run
Timer run control.
Definition: IfxIom_Driver.h:159
IfxIom_Driver_LamConfig::ref
IfxIom_Driver_LamRefConfig ref
LAM reference input configuration.
Definition: IfxIom_Driver.h:215
IfxIom_Driver_clearLamRefGlitch
IFX_EXTERN void IfxIom_Driver_clearLamRefGlitch(IfxIom_Driver_Lam *driver)
Clear the LAM reference signal glitch flag.
Definition: IfxIom_Driver.c:91
IfxIom_Driver_initLamConfig
IFX_EXTERN void IfxIom_Driver_initLamConfig(IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
Set the LAM default configuration.
Definition: IfxIom_Driver.c:333
IfxIom_Driver_restoreEvents
IFX_EXTERN void IfxIom_Driver_restoreEvents(IfxIom_Driver *driver, uint32 mask)
Restore the IOM event mask.
Definition: IfxIom_Driver.c:400
IfxIom_LamId
IfxIom_LamId
Specifies the Logic Module Analyser Module Number.
Definition: IfxIom.h:136
IfxIom_Driver::accumulatedEventUsedMask
uint8 accumulatedEventUsedMask
Indicates the used / unused accumulated counter ECM. bit0=CTS0, bit1=CTS2, ... 0=unused, 1=used.
Definition: IfxIom_Driver.h:140
IfxIom_Driver_LamFilterConfig::prescalerFactor
uint32 prescalerFactor
Prescaler factor, must be > 0, only valid for prescaler mode.
Definition: IfxIom_Driver.h:127
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxIom_Driver_LamEventConfig
IOM LAM event configuration.
Definition: IfxIom_Driver.h:146
IfxIom_Driver_LamFilterConfig
IOM LAM filter configuration.
Definition: IfxIom_Driver.h:122
IfxIom_Driver_initLam
IFX_EXTERN boolean IfxIom_Driver_initLam(IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
Initialize the LAM channel.
Definition: IfxIom_Driver.c:183
IfxIom_Driver_LamMonConfig::input
IfxIom_MonInput input
Monitor input.
Definition: IfxIom_Driver.h:168
IfxIom_Driver_Lam::refInput
IfxIom_RefInputSignal refInput
Reference input.
Definition: IfxIom_Driver.h:200
IfxIom_RefInput
IfxIom_RefInput
LAM ref inputs.
Definition: IfxIom_cfg.h:171
IfxIom_Driver_LamEventWindowConfig::threshold
float32 threshold
Event window threshold in second. If 0, no event are generated.
Definition: IfxIom_Driver.h:160
IfxIom_LamEventWindowClearEvent
IfxIom_LamEventWindowClearEvent
Timer clear event configuration IOM_LAMCFGm.EDS upper lower bits.
Definition: IfxIom.h:92
IfxIom_MonInput
IfxIom_MonInput
LAM mon inputs.
Definition: IfxIom_cfg.h:101
IfxIom_Driver_LamFilterConfig::mode
IfxIom_LamFilterMode mode
Filter mode.
Definition: IfxIom_Driver.h:126
uint8
unsigned char uint8
Definition: Platform_Types.h:108
sint8
signed char sint8
Definition: Platform_Types.h:125
IfxIom_Driver_Lam
IOM LAM object.
Definition: IfxIom_Driver.h:194
IfxIom_Driver_Lam::iomDriver
IfxIom_Driver * iomDriver
Main IOM Driver.
Definition: IfxIom_Driver.h:196
IfxIom_MonInputSignal
IfxIom_MonInputSignal
IOM_FPCCTRk.ISM.
Definition: IfxIom_cfg.h:76
IfxIom_Driver_Lam::monIndex
uint8 monIndex
Monitor input index.
Definition: IfxIom_Driver.h:198
IfxIom_Driver_Lam::monInput
IfxIom_MonInputSignal monInput
Monitor input.
Definition: IfxIom_Driver.h:201


iLLD_TC26B: IfxIom_cfg.h Source File

  • _Impl
IfxIom_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxIom_cfg.h
3 * \brief IOM on-chip implementation data
4 * \ingroup IfxLld_Iom
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Iom IOM
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Iom_Impl Implementation
44 * \ingroup IfxLld_Iom
45 * \defgroup IfxLld_Iom_Std Standard Driver
46 * \ingroup IfxLld_Iom
47 * \defgroup IfxLld_Iom_Impl_Enum Enum input signals
48 * \ingroup IfxLld_Iom_Impl
49 * \defgroup IfxLld_Iom_Impl_Enumeration Enumeration inputs
50 * \ingroup IfxLld_Iom_Impl
51 */
52
53 #ifndef IFXIOM_CFG_H
54 #define IFXIOM_CFG_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 /******************************************************************************/
61 /*-----------------------------------Macros-----------------------------------*/
62 /******************************************************************************/
63
64 /** \brief Specifies maximum number of channels
65 */
66 #define IFXIOM_NUM_CHANNELS 16
67
68 /******************************************************************************/
69 /*--------------------------------Enumerations--------------------------------*/
70 /******************************************************************************/
71
72 /** \addtogroup IfxLld_Iom_Impl_Enum
73 * \{ */
74 /** \brief IOM_FPCCTRk.ISM
75 */
76 typedef enum
77 {
78 IfxIom_MonInputSignal_p = 0, /**< \brief Signal input Pn_IN (from portlogic) selected */
79 IfxIom_MonInputSignal_0 = 1, /**< \brief Monitor Signal Input 0 selected */
80 IfxIom_MonInputSignal_1 = 2, /**< \brief Monitor Signal Input 1 selected */
81 IfxIom_MonInputSignal_2 = 3 /**< \brief Monitor Signal Input 2 selected */
82 } IfxIom_MonInputSignal;
83
84 /** \brief IOM_FPCCTRk.ISR
85 */
86 typedef enum
87 {
88 IfxIom_RefInputSignal_p = 0, /**< \brief Signal input Pn_IN (from portlogic) selected */
89 IfxIom_RefInputSignal_0 = 1, /**< \brief Monitor Signal Input 0 selected */
90 IfxIom_RefInputSignal_1 = 2, /**< \brief Monitor Signal Input 1 selected */
91 IfxIom_RefInputSignal_2 = 3, /**< \brief Monitor Signal Input 2 selected */
92 IfxIom_RefInputSignal_xorCombiner = 4 /**< \brief GTM XOR Combiner selected */
93 } IfxIom_RefInputSignal;
94
95 /** \} */
96
97 /** \addtogroup IfxLld_Iom_Impl_Enumeration
98 * \{ */
99 /** \brief LAM mon inputs
100 */
101 typedef enum
102 {
103 IfxIom_MonInput_p33_0 = (IfxIom_MonInputSignal_p << 8) | 0x0, /**< \brief Value=0xXXYY where XX=ISM, YY=k */
104 IfxIom_MonInput_p33_1 = (IfxIom_MonInputSignal_p << 8) | 0x1,
105 IfxIom_MonInput_p33_2 = (IfxIom_MonInputSignal_p << 8) | 0x2,
106 IfxIom_MonInput_p33_3 = (IfxIom_MonInputSignal_p << 8) | 0x3,
107 IfxIom_MonInput_p33_4 = (IfxIom_MonInputSignal_p << 8) | 0x4,
108 IfxIom_MonInput_p33_5 = (IfxIom_MonInputSignal_p << 8) | 0x5,
109 IfxIom_MonInput_p33_6 = (IfxIom_MonInputSignal_p << 8) | 0x6,
110 IfxIom_MonInput_p33_7 = (IfxIom_MonInputSignal_p << 8) | 0x7,
111 IfxIom_MonInput_p33_8 = (IfxIom_MonInputSignal_p << 8) | 0x8,
112 IfxIom_MonInput_p33_9 = (IfxIom_MonInputSignal_p << 8) | 0x9,
113 IfxIom_MonInput_p33_10 = (IfxIom_MonInputSignal_p << 8) | 0xa,
114 IfxIom_MonInput_p33_11 = (IfxIom_MonInputSignal_p << 8) | 0xb,
115 IfxIom_MonInput_p33_12 = (IfxIom_MonInputSignal_p << 8) | 0xc,
116 IfxIom_MonInput_p20_12 = (IfxIom_MonInputSignal_p << 8) | 0xd,
117 IfxIom_MonInput_p20_13 = (IfxIom_MonInputSignal_p << 8) | 0xe,
118 IfxIom_MonInput_p20_14 = (IfxIom_MonInputSignal_p << 8) | 0xf,
119 IfxIom_MonInput_gtmTout22 = (IfxIom_MonInputSignal_0 << 8) | 0x0,
120 IfxIom_MonInput_gtmTout23 = (IfxIom_MonInputSignal_0 << 8) | 0x1,
121 IfxIom_MonInput_gtmTout24 = (IfxIom_MonInputSignal_0 << 8) | 0x2,
122 IfxIom_MonInput_gtmTout25 = (IfxIom_MonInputSignal_0 << 8) | 0x3,
123 IfxIom_MonInput_gtmTout26 = (IfxIom_MonInputSignal_0 << 8) | 0x4,
124 IfxIom_MonInput_gtmTout27 = (IfxIom_MonInputSignal_0 << 8) | 0x5,
125 IfxIom_MonInput_gtmTout28 = (IfxIom_MonInputSignal_0 << 8) | 0x6,
126 IfxIom_MonInput_gtmTout29 = (IfxIom_MonInputSignal_0 << 8) | 0x7,
127 IfxIom_MonInput_gtmTout30 = (IfxIom_MonInputSignal_0 << 8) | 0x8,
128 IfxIom_MonInput_gtmTout31 = (IfxIom_MonInputSignal_0 << 8) | 0x9,
129 IfxIom_MonInput_gtmTout32 = (IfxIom_MonInputSignal_0 << 8) | 0xa,
130 IfxIom_MonInput_gtmTout33 = (IfxIom_MonInputSignal_0 << 8) | 0xb,
131 IfxIom_MonInput_gtmTout34 = (IfxIom_MonInputSignal_0 << 8) | 0xc,
132 IfxIom_MonInput_gtmTout68 = (IfxIom_MonInputSignal_0 << 8) | 0xd,
133 IfxIom_MonInput_gtmTout69 = (IfxIom_MonInputSignal_0 << 8) | 0xe,
134 IfxIom_MonInput_gtmTout70 = (IfxIom_MonInputSignal_0 << 8) | 0xf,
135 IfxIom_MonInput_ccu60Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0x0,
136 IfxIom_MonInput_ccu60Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x1,
137 IfxIom_MonInput_ccu60Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x2,
138 IfxIom_MonInput_ccu60Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0x3,
139 IfxIom_MonInput_ccu60Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0x4,
140 IfxIom_MonInput_ccu60Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0x5,
141 IfxIom_MonInput_ccu60Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x6,
142 IfxIom_MonInput_ccu61Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x7,
143 IfxIom_MonInput_ccu61Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x8,
144 IfxIom_MonInput_ccu61Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x9,
145 IfxIom_MonInput_ccu61Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0xa,
146 IfxIom_MonInput_ccu61Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0xb,
147 IfxIom_MonInput_ccu61Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0xc,
148 IfxIom_MonInput_ccu61Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0xd,
149 IfxIom_MonInput_psi5Psitx0 = (IfxIom_MonInputSignal_1 << 8) | 0xe,
150 IfxIom_MonInput_psi5Psitx1 = (IfxIom_MonInputSignal_1 << 8) | 0xf,
151 IfxIom_MonInput_qspi0Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x0,
152 IfxIom_MonInput_qspi1Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x1,
153 IfxIom_MonInput_qspi2Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x2,
154 IfxIom_MonInput_qspi3Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x3,
155 IfxIom_MonInput_gnd = (IfxIom_MonInputSignal_2 << 8) | 0x4,
156 IfxIom_MonInput_canNode0Txd = (IfxIom_MonInputSignal_2 << 8) | 0x5,
157 IfxIom_MonInput_canNode1Txd = (IfxIom_MonInputSignal_2 << 8) | 0x6,
158 IfxIom_MonInput_canNode2Txd = (IfxIom_MonInputSignal_2 << 8) | 0x7,
159 IfxIom_MonInput_canNode3Txd = (IfxIom_MonInputSignal_2 << 8) | 0x8,
160 IfxIom_MonInput_gtmTout104 = (IfxIom_MonInputSignal_2 << 8) | 0x9,
161 IfxIom_MonInput_gtmTout105 = (IfxIom_MonInputSignal_2 << 8) | 0xa,
162 IfxIom_MonInput_gtmTout106 = (IfxIom_MonInputSignal_2 << 8) | 0xb,
163 IfxIom_MonInput_asclin0Atx = (IfxIom_MonInputSignal_2 << 8) | 0xc,
164 IfxIom_MonInput_asclin1Atx = (IfxIom_MonInputSignal_2 << 8) | 0xd,
165 IfxIom_MonInput_asclin2Atx = (IfxIom_MonInputSignal_2 << 8) | 0xe,
166 IfxIom_MonInput_asclin3Atx = (IfxIom_MonInputSignal_2 << 8) | 0xf
167 } IfxIom_MonInput;
168
169 /** \brief LAM ref inputs
170 */
171 typedef enum
172 {
173 IfxIom_RefInput_p33_0 = (IfxIom_RefInputSignal_p << 8) | 0x0,
174 IfxIom_RefInput_p33_1 = (IfxIom_RefInputSignal_p << 8) | 0x1,
175 IfxIom_RefInput_p33_2 = (IfxIom_RefInputSignal_p << 8) | 0x2,
176 IfxIom_RefInput_p33_3 = (IfxIom_RefInputSignal_p << 8) | 0x3,
177 IfxIom_RefInput_p33_4 = (IfxIom_RefInputSignal_p << 8) | 0x4,
178 IfxIom_RefInput_p33_5 = (IfxIom_RefInputSignal_p << 8) | 0x5,
179 IfxIom_RefInput_p33_6 = (IfxIom_RefInputSignal_p << 8) | 0x6,
180 IfxIom_RefInput_p33_7 = (IfxIom_RefInputSignal_p << 8) | 0x7,
181 IfxIom_RefInput_p33_8 = (IfxIom_RefInputSignal_p << 8) | 0x8,
182 IfxIom_RefInput_p33_9 = (IfxIom_RefInputSignal_p << 8) | 0x9,
183 IfxIom_RefInput_p33_10 = (IfxIom_RefInputSignal_p << 8) | 0xa,
184 IfxIom_RefInput_p33_11 = (IfxIom_RefInputSignal_p << 8) | 0xb,
185 IfxIom_RefInput_p33_12 = (IfxIom_RefInputSignal_p << 8) | 0xc,
186 IfxIom_RefInput_p20_12 = (IfxIom_RefInputSignal_p << 8) | 0xd,
187 IfxIom_RefInput_p20_13 = (IfxIom_RefInputSignal_p << 8) | 0xe,
188 IfxIom_RefInput_p20_14 = (IfxIom_RefInputSignal_p << 8) | 0xf,
189 IfxIom_RefInput_gtmTout0 = (IfxIom_RefInputSignal_0 << 8) | 0x0,
190 IfxIom_RefInput_gtmTout1 = (IfxIom_RefInputSignal_0 << 8) | 0x1,
191 IfxIom_RefInput_gtmTout2 = (IfxIom_RefInputSignal_0 << 8) | 0x2,
192 IfxIom_RefInput_gtmTout3 = (IfxIom_RefInputSignal_0 << 8) | 0x3,
193 IfxIom_RefInput_gtmTout4 = (IfxIom_RefInputSignal_0 << 8) | 0x4,
194 IfxIom_RefInput_gtmTout5 = (IfxIom_RefInputSignal_0 << 8) | 0x5,
195 IfxIom_RefInput_gtmTout6 = (IfxIom_RefInputSignal_0 << 8) | 0x6,
196 IfxIom_RefInput_gtmTout7 = (IfxIom_RefInputSignal_0 << 8) | 0x7,
197 IfxIom_RefInput_gtmTout8 = (IfxIom_RefInputSignal_0 << 8) | 0x8,
198 IfxIom_RefInput_gtmTout9 = (IfxIom_RefInputSignal_0 << 8) | 0x9,
199 IfxIom_RefInput_gtmTout10 = (IfxIom_RefInputSignal_0 << 8) | 0xa,
200 IfxIom_RefInput_gtmTout11 = (IfxIom_RefInputSignal_0 << 8) | 0xb,
201 IfxIom_RefInput_gtmTout12 = (IfxIom_RefInputSignal_0 << 8) | 0xc,
202 IfxIom_RefInput_gtmTout13 = (IfxIom_RefInputSignal_0 << 8) | 0xd,
203 IfxIom_RefInput_gtmTout14 = (IfxIom_RefInputSignal_0 << 8) | 0xe,
204 IfxIom_RefInput_gtmTout15 = (IfxIom_RefInputSignal_0 << 8) | 0xf,
205 IfxIom_RefInput_ccu60Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x0,
206 IfxIom_RefInput_ccu60Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x1,
207 IfxIom_RefInput_ccu60Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x2,
208 IfxIom_RefInput_ccu60Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0x3,
209 IfxIom_RefInput_ccu60Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0x4,
210 IfxIom_RefInput_ccu60Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0x5,
211 IfxIom_RefInput_ccu60Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0x6,
212 IfxIom_RefInput_ccu61Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x7,
213 IfxIom_RefInput_ccu61Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x8,
214 IfxIom_RefInput_ccu61Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x9,
215 IfxIom_RefInput_ccu61Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0xa,
216 IfxIom_RefInput_ccu61Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0xb,
217 IfxIom_RefInput_ccu61Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0xc,
218 IfxIom_RefInput_ccu61Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0xd,
219 IfxIom_RefInput_psi5Psitx0 = (IfxIom_RefInputSignal_1 << 8) | 0xe,
220 IfxIom_RefInput_psi5Psitx2 = (IfxIom_RefInputSignal_1 << 8) | 0xf,
221 IfxIom_RefInput_qspi0Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x0,
222 IfxIom_RefInput_qspi1Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x1,
223 IfxIom_RefInput_qspi2Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x2,
224 IfxIom_RefInput_qspi3Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x3,
225 IfxIom_RefInput_gnd = (IfxIom_RefInputSignal_2 << 8) | 0x4,
226 IfxIom_RefInput_canNode0Txd = (IfxIom_RefInputSignal_2 << 8) | 0x5,
227 IfxIom_RefInput_canNode1Txd = (IfxIom_RefInputSignal_2 << 8) | 0x6,
228 IfxIom_RefInput_canNode2Txd = (IfxIom_RefInputSignal_2 << 8) | 0x7,
229 IfxIom_RefInput_canNode3Txd = (IfxIom_RefInputSignal_2 << 8) | 0x8,
230 IfxIom_RefInput_gtmTout107 = (IfxIom_RefInputSignal_2 << 8) | 0x9,
231 IfxIom_RefInput_gtmTout108 = (IfxIom_RefInputSignal_2 << 8) | 0xa,
232 IfxIom_RefInput_gtmTout109 = (IfxIom_RefInputSignal_2 << 8) | 0xb,
233 IfxIom_RefInput_asclin0Atx = (IfxIom_RefInputSignal_2 << 8) | 0xc,
234 IfxIom_RefInput_asclin1Atx = (IfxIom_RefInputSignal_2 << 8) | 0xd,
235 IfxIom_RefInput_asclin2Atx = (IfxIom_RefInputSignal_2 << 8) | 0xe,
236 IfxIom_RefInput_asclin3Atx = (IfxIom_RefInputSignal_2 << 8) | 0xf,
237 IfxIom_RefInput_exorCombiner = (IfxIom_RefInputSignal_xorCombiner << 8) | 0x0
238 } IfxIom_RefInput;
239
240 /** \} */
241
242 #endif /* IFXIOM_CFG_H */
IfxIom_RefInput_gtmTout6
Definition: IfxIom_cfg.h:195
IfxIom_MonInput_gtmTout69
Definition: IfxIom_cfg.h:133
IfxIom_MonInput_p33_12
Definition: IfxIom_cfg.h:115
IfxIom_MonInput_qspi1Mrst
Definition: IfxIom_cfg.h:152
IfxIom_RefInput_gtmTout2
Definition: IfxIom_cfg.h:191
IfxIom_MonInput_gtmTout27
Definition: IfxIom_cfg.h:124
IfxIom_MonInput_ccu61Cout63
Definition: IfxIom_cfg.h:142
IfxIom_MonInput_gtmTout34
Definition: IfxIom_cfg.h:131
IfxIom_MonInput_p33_5
Definition: IfxIom_cfg.h:108
IfxIom_RefInput_qspi2Mrst
Definition: IfxIom_cfg.h:223
IfxIom_RefInput_ccu60Cout60
Definition: IfxIom_cfg.h:208
IfxIom_RefInput_p33_0
Definition: IfxIom_cfg.h:173
IfxIom_RefInput_ccu61Cout62
Definition: IfxIom_cfg.h:213
IfxIom_RefInput_p20_13
Definition: IfxIom_cfg.h:187
IfxIom_RefInput_ccu60Cc61
Definition: IfxIom_cfg.h:210
IfxIom_MonInput_canNode1Txd
Definition: IfxIom_cfg.h:157
IfxIom_MonInput_asclin2Atx
Definition: IfxIom_cfg.h:165
IfxIom_RefInput_ccu61Cc61
Definition: IfxIom_cfg.h:217
IfxIom_MonInput_p33_11
Definition: IfxIom_cfg.h:114
IfxIom_MonInput_qspi2Mrst
Definition: IfxIom_cfg.h:153
IfxIom_MonInput_gtmTout28
Definition: IfxIom_cfg.h:125
IfxIom_RefInput_gtmTout7
Definition: IfxIom_cfg.h:196
IfxIom_MonInput_gtmTout104
Definition: IfxIom_cfg.h:160
IfxIom_MonInput_ccu61Cout61
Definition: IfxIom_cfg.h:147
IfxIom_RefInput_asclin0Atx
Definition: IfxIom_cfg.h:233
IfxIom_MonInputSignal_2
Monitor Signal Input 2 selected.
Definition: IfxIom_cfg.h:81
IfxIom_RefInput_ccu61Cc62
Definition: IfxIom_cfg.h:216
IfxIom_MonInput_qspi0Mrst
Definition: IfxIom_cfg.h:151
IfxIom_MonInput_p20_14
Definition: IfxIom_cfg.h:118
IfxIom_RefInput_gtmTout10
Definition: IfxIom_cfg.h:199
IfxIom_MonInput_p20_12
Definition: IfxIom_cfg.h:116
IfxIom_RefInput_ccu60Cout63
Definition: IfxIom_cfg.h:205
IfxIom_RefInput_gtmTout1
Definition: IfxIom_cfg.h:190
IfxIom_MonInput_ccu61Cc61
Definition: IfxIom_cfg.h:144
IfxIom_RefInput_gtmTout11
Definition: IfxIom_cfg.h:200
IfxIom_RefInputSignal
IfxIom_RefInputSignal
IOM_FPCCTRk.ISR.
Definition: IfxIom_cfg.h:86
IfxIom_RefInput_canNode1Txd
Definition: IfxIom_cfg.h:227
IfxIom_MonInput_p33_7
Definition: IfxIom_cfg.h:110
IfxIom_MonInputSignal_1
Monitor Signal Input 1 selected.
Definition: IfxIom_cfg.h:80
IfxIom_MonInput_p33_8
Definition: IfxIom_cfg.h:111
IfxIom_RefInput_gtmTout8
Definition: IfxIom_cfg.h:197
IfxIom_MonInput_psi5Psitx0
Definition: IfxIom_cfg.h:149
IfxIom_RefInput_ccu61Cc60
Definition: IfxIom_cfg.h:218
IfxIom_MonInput_gtmTout23
Definition: IfxIom_cfg.h:120
IfxIom_MonInput_gtmTout33
Definition: IfxIom_cfg.h:130
IfxIom_RefInput_ccu61Cout61
Definition: IfxIom_cfg.h:214
IfxIom_MonInput_gtmTout22
Definition: IfxIom_cfg.h:119
IfxIom_RefInputSignal_xorCombiner
GTM XOR Combiner selected.
Definition: IfxIom_cfg.h:92
IfxIom_MonInput_ccu61Cc60
Definition: IfxIom_cfg.h:143
IfxIom_MonInput_p33_1
Definition: IfxIom_cfg.h:104
IfxIom_MonInputSignal_0
Monitor Signal Input 0 selected.
Definition: IfxIom_cfg.h:79
IfxIom_MonInput_ccu60Cout61
Definition: IfxIom_cfg.h:139
IfxIom_RefInput_qspi1Mrst
Definition: IfxIom_cfg.h:222
IfxIom_MonInput_asclin3Atx
Definition: IfxIom_cfg.h:166
IfxIom_RefInput_asclin2Atx
Definition: IfxIom_cfg.h:235
IfxIom_MonInput_gtmTout25
Definition: IfxIom_cfg.h:122
IfxIom_MonInput_gtmTout70
Definition: IfxIom_cfg.h:134
IfxIom_MonInput_p33_6
Definition: IfxIom_cfg.h:109
IfxIom_MonInput_p33_9
Definition: IfxIom_cfg.h:112
IfxIom_MonInput_ccu61Cc62
Definition: IfxIom_cfg.h:145
IfxIom_RefInput_asclin3Atx
Definition: IfxIom_cfg.h:236
IfxIom_RefInput_canNode3Txd
Definition: IfxIom_cfg.h:229
IfxIom_RefInput_ccu60Cc60
Definition: IfxIom_cfg.h:211
IfxIom_MonInput_gnd
Definition: IfxIom_cfg.h:155
IfxIom_RefInput_ccu60Cout62
Definition: IfxIom_cfg.h:206
IfxIom_RefInput_ccu61Cout63
Definition: IfxIom_cfg.h:212
IfxIom_MonInput_p33_2
Definition: IfxIom_cfg.h:105
IfxIom_MonInput_qspi3Mrst
Definition: IfxIom_cfg.h:154
IfxIom_MonInput_gtmTout32
Definition: IfxIom_cfg.h:129
IfxIom_RefInput_p33_1
Definition: IfxIom_cfg.h:174
IfxIom_RefInput_p33_7
Definition: IfxIom_cfg.h:180
IfxIom_MonInput_asclin1Atx
Definition: IfxIom_cfg.h:164
IfxIom_MonInput_canNode2Txd
Definition: IfxIom_cfg.h:158
IfxIom_MonInput_p33_0
Value=0xXXYY where XX=ISM, YY=k.
Definition: IfxIom_cfg.h:103
IfxIom_RefInput_p33_4
Definition: IfxIom_cfg.h:177
IfxIom_MonInput_canNode3Txd
Definition: IfxIom_cfg.h:159
IfxIom_MonInput_ccu60Cc60
Definition: IfxIom_cfg.h:137
IfxIom_RefInput_gtmTout9
Definition: IfxIom_cfg.h:198
IfxIom_MonInput_gtmTout30
Definition: IfxIom_cfg.h:127
IfxIom_RefInputSignal_2
Monitor Signal Input 2 selected.
Definition: IfxIom_cfg.h:91
IfxIom_MonInput_ccu60Cout62
Definition: IfxIom_cfg.h:140
IfxIom_MonInput_psi5Psitx1
Definition: IfxIom_cfg.h:150
IfxIom_RefInput_exorCombiner
Definition: IfxIom_cfg.h:237
IfxIom_RefInputSignal_p
Signal input Pn_IN (from portlogic) selected.
Definition: IfxIom_cfg.h:88
IfxIom_MonInput_gtmTout105
Definition: IfxIom_cfg.h:161
IfxIom_RefInput_psi5Psitx0
Definition: IfxIom_cfg.h:219
IfxIom_RefInput_p33_3
Definition: IfxIom_cfg.h:176
IfxIom_MonInput_gtmTout31
Definition: IfxIom_cfg.h:128
IfxIom_MonInput_ccu60Cc61
Definition: IfxIom_cfg.h:136
IfxIom_MonInput_gtmTout106
Definition: IfxIom_cfg.h:162
IfxIom_MonInput_gtmTout68
Definition: IfxIom_cfg.h:132
IfxIom_RefInput_gtmTout15
Definition: IfxIom_cfg.h:204
IfxIom_RefInput_ccu60Cout61
Definition: IfxIom_cfg.h:207
IfxIom_RefInput_gtmTout108
Definition: IfxIom_cfg.h:231
IfxIom_MonInput_ccu60Cout60
Definition: IfxIom_cfg.h:138
IfxIom_MonInput_ccu60Cout63
Definition: IfxIom_cfg.h:141
IfxIom_RefInput_qspi0Mrst
Definition: IfxIom_cfg.h:221
IfxIom_RefInputSignal_0
Monitor Signal Input 0 selected.
Definition: IfxIom_cfg.h:89
IfxIom_RefInput_p33_11
Definition: IfxIom_cfg.h:184
IfxIom_RefInput_gtmTout5
Definition: IfxIom_cfg.h:194
IfxIom_MonInput_gtmTout24
Definition: IfxIom_cfg.h:121
IfxIom_RefInput_canNode0Txd
Definition: IfxIom_cfg.h:226
IfxIom_MonInput_gtmTout29
Definition: IfxIom_cfg.h:126
IfxIom_MonInput_ccu61Cout60
Definition: IfxIom_cfg.h:146
IfxIom_RefInput_gtmTout3
Definition: IfxIom_cfg.h:192
IfxIom_RefInput_asclin1Atx
Definition: IfxIom_cfg.h:234
IfxIom_RefInput
IfxIom_RefInput
LAM ref inputs.
Definition: IfxIom_cfg.h:171
IfxIom_MonInput_p33_10
Definition: IfxIom_cfg.h:113
IfxIom_RefInput_p33_6
Definition: IfxIom_cfg.h:179
IfxIom_RefInput_gtmTout109
Definition: IfxIom_cfg.h:232
IfxIom_MonInput_asclin0Atx
Definition: IfxIom_cfg.h:163
IfxIom_MonInput_gtmTout26
Definition: IfxIom_cfg.h:123
IfxIom_MonInput_ccu61Cout62
Definition: IfxIom_cfg.h:148
IfxIom_RefInput_gtmTout14
Definition: IfxIom_cfg.h:203
IfxIom_MonInputSignal_p
Signal input Pn_IN (from portlogic) selected.
Definition: IfxIom_cfg.h:78
IfxIom_MonInput_p33_3
Definition: IfxIom_cfg.h:106
IfxIom_RefInput_p20_14
Definition: IfxIom_cfg.h:188
IfxIom_RefInput_gtmTout107
Definition: IfxIom_cfg.h:230
IfxIom_RefInput_psi5Psitx2
Definition: IfxIom_cfg.h:220
IfxIom_RefInput_p33_9
Definition: IfxIom_cfg.h:182
IfxIom_RefInput_p33_5
Definition: IfxIom_cfg.h:178
IfxIom_RefInput_p33_2
Definition: IfxIom_cfg.h:175
IfxIom_MonInput
IfxIom_MonInput
LAM mon inputs.
Definition: IfxIom_cfg.h:101
IfxIom_RefInput_p33_8
Definition: IfxIom_cfg.h:181
IfxIom_MonInput_p20_13
Definition: IfxIom_cfg.h:117
IfxIom_RefInput_gnd
Definition: IfxIom_cfg.h:225
IfxIom_RefInput_gtmTout12
Definition: IfxIom_cfg.h:201
IfxIom_MonInput_ccu60Cc62
Definition: IfxIom_cfg.h:135
IfxIom_RefInput_ccu60Cc62
Definition: IfxIom_cfg.h:209
IfxIom_RefInput_qspi3Mrst
Definition: IfxIom_cfg.h:224
IfxIom_RefInputSignal_1
Monitor Signal Input 1 selected.
Definition: IfxIom_cfg.h:90
IfxIom_MonInput_canNode0Txd
Definition: IfxIom_cfg.h:156
IfxIom_RefInput_p33_10
Definition: IfxIom_cfg.h:183
IfxIom_RefInput_gtmTout0
Definition: IfxIom_cfg.h:189
IfxIom_MonInputSignal
IfxIom_MonInputSignal
IOM_FPCCTRk.ISM.
Definition: IfxIom_cfg.h:76
IfxIom_RefInput_gtmTout13
Definition: IfxIom_cfg.h:202
IfxIom_RefInput_p20_12
Definition: IfxIom_cfg.h:186
IfxIom_RefInput_canNode2Txd
Definition: IfxIom_cfg.h:228
IfxIom_RefInput_gtmTout4
Definition: IfxIom_cfg.h:193
IfxIom_MonInput_p33_4
Definition: IfxIom_cfg.h:107
IfxIom_RefInput_p33_12
Definition: IfxIom_cfg.h:185
IfxIom_RefInput_ccu61Cout60
Definition: IfxIom_cfg.h:215


iLLD_TC26B: IfxLldVersion.h Source File

IfxLldVersion.h
Go to the documentation of this file.
1 /**
2 *
3 * \version iLLD_1_0_1_12_0
4 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 * Use of this file is subject to the terms of use agreed between (i) you or
11 * the company in which ordinary course of business you are acting and (ii)
12 * Infineon Technologies AG or its licensees. If and as long as no such terms
13 * of use are agreed, use of this file is subject to following:
14 *
15 * Boost Software License - Version 1.0 - August 17th, 2003
16 *
17 * Permission is hereby granted, free of charge, to any person or organization
18 * obtaining a copy of the software and accompanying documentation covered by
19 * this license (the "Software") to use, reproduce, display, distribute,
20 * execute, and transmit the Software, and to prepare derivative works of the
21 * Software, and to permit third-parties to whom the Software is furnished to
22 * do so, all subject to the following:
23 *
24 * The copyright notices in the Software and this entire statement, including
25 * the above license grant, this restriction and the following disclaimer, must
26 * be included in all copies of the Software, in whole or in part, and all
27 * derivative works of the Software, unless such copies or derivative works are
28 * solely in the form of machine-executable object code generated by a source
29 * language processor.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
32 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
33 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
34 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
35 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
36 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
37 * DEALINGS IN THE SOFTWARE.
38 *
39 */
40 #ifndef IFX_LLD_VERSION_H
41 #define IFX_LLD_VERSION_H
42
43 #define IFX_LLD_VERSION_GENERATION 1 /**< \brief Indicates the driver generation */
44 #define IFX_LLD_VERSION_MAJOR 0 /**< \brief Informs about changes which could lead to incompatibilities */
45 #define IFX_LLD_VERSION_MAJOR_UPDATE 1 /**< \brief Informs about a release for a new derivative without further API changes */
46 #define IFX_LLD_VERSION_MINOR 12 /**< \brief Informs about new additions to the library */
47 #define IFX_LLD_VERSION_REVISION 0 /**< \brief Informs about patches and/or documentation changes */
48
49 #endif /* IFX_LLD_VERSION_H */


iLLD_TC26B: IfxMsc.c Source File

  • Msc
  • Std
IfxMsc.c
Go to the documentation of this file.
1 /**
2 * \file IfxMsc.c
3 * \brief MSC basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxMsc.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxMsc_clearDataFrameInterruptFlag(Ifx_MSC *msc)
55 {
56 /* Data Frame Interrupt Clear */
57 msc->ISC.B.CDEDI = 1;
58 }
59
60
61 void IfxMsc_clearReset(Ifx_MSC *msc)
62 {
63 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
64
65 IfxScuWdt_clearCpuEndinit(passwd);
66
67 if (msc->KRST0.B.RSTSTAT == 1)
68 {
69 msc->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
70 }
71
72 IfxScuWdt_setCpuEndinit(passwd);
73 }
74
75
76 void IfxMsc_disableModule(Ifx_MSC *msc)
77 {
78 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
79 IfxScuWdt_clearCpuEndinit(passwd);
80 /* Disable module */
81 msc->CLC.B.DISR = 1;
82 IfxScuWdt_setCpuEndinit(passwd);
83 }
84
85
86 uint32 IfxMsc_downstreamAbraBaudCalculator(uint32 baud)
87 {
88 uint32 fsys = IfxScuCcu_getSpbFrequency();
89 uint32 ndd = 0;
90
91 /* DSTE.NDD = fsys / 2*BR */
92
93 ndd = fsys / (2 * baud);
94
95 return ndd - 1;
96 }
97
98
99 uint64 IfxMsc_downstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
100 {
101 IFX_UNUSED_PARAMETER(msc);
102
103 float32 fsys = IfxScuCcu_getSpbFrequency();
104 uint64 step = 0;
105
106 step = (uint64)((uint64)(2 * baud * 1024)) / fsys;
107
108 return step;
109 }
110
111
112 uint32 IfxMsc_downstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
113 {
114 IFX_UNUSED_PARAMETER(msc);
115
116 float32 fsys = IfxScuCcu_getSpbFrequency();
117 uint32 step = 0;
118
119 /* FDR.STEP = 1024 - fsys / (2*BR) */
120
121 step = 1024 - (fsys / (2 * baud));
122
123 return step;
124 }
125
126
127 void IfxMsc_enableModule(Ifx_MSC *msc)
128 {
129 /* Disable module disable bit */
130 msc->CLC.U = 0;
131 }
132
133
134 boolean IfxMsc_getActiveDataFrameStatus(Ifx_MSC *msc)
135 {
136 return msc->DSS.B.DFA;
137 }
138
139
140 Ifx_MSC *IfxMsc_getAddress(IfxMsc_Index msc)
141 {
142 Ifx_MSC *module;
143
144 if (msc < IFXMSC_NUM_MODULES)
145 {
146 module = (Ifx_MSC *)IfxMsc_cfg_indexMap[msc].module;
147 }
148 else
149 {
150 module = NULL_PTR;
151 }
152
153 return module;
154 }
155
156
157 boolean IfxMsc_getDataFrameInterruptFlag(Ifx_MSC *msc)
158 {
159 boolean flag = 0;
160
161 flag = msc->ISR.B.DEDI;
162
163 return flag;
164 }
165
166
167 IfxMsc_Index IfxMsc_getIndex(Ifx_MSC *msc)
168 {
169 uint32 index;
170 IfxMsc_Index result;
171
172 result = IfxMsc_Index_none;
173
174 for (index = 0; index < IFXMSC_NUM_MODULES; index++)
175 {
176 if (IfxMsc_cfg_indexMap[index].module == msc)
177 {
178 result = (IfxMsc_Index)IfxMsc_cfg_indexMap[index].index;
179 break;
180 }
181 }
182
183 return result;
184 }
185
186
187 void IfxMsc_resetModule(Ifx_MSC *msc)
188 {
189 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
190
191 IfxScuWdt_clearCpuEndinit(passwd);
192
193 /* Reset kernel */
194 msc->KRST1.B.RST = 1;
195 msc->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
196
197 while (msc->KRST0.B.RSTSTAT == 0) /* Wait until reset is executed */
198
199 {}
200
201 /* TODO Check if CLC enable is required */
202 //msc->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
203
204 IfxScuWdt_setCpuEndinit(passwd);
205 }
206
207
208 uint64 IfxMsc_upstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
209 {
210 float32 fsys = IfxScuCcu_getSpbFrequency();
211 uint64 step = 0;
212 uint32 df = 1;
213
214 /* FDR.STEP = DF*BR*1024 / fsys */
215
216 if (msc->USR.B.URR != 0)
217 {
218 df = 1 << (msc->USR.B.URR + 1);
219 }
220 else
221 {
222 df = 0;
223 }
224
225 step = (uint64)((uint64)((df * baud) * 1024)) / fsys;
226
227 return step;
228 }
229
230
231 uint32 IfxMsc_upstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
232 {
233 float32 fsys = IfxScuCcu_getSpbFrequency();
234 uint32 step = 0;
235 uint32 df = 1;
236
237 /* FDR.STEP = 1024 - fsys / DF*BR */
238
239 if (msc->USR.B.URR != 0)
240 {
241 df = 1 << (msc->USR.B.URR + 1);
242 }
243 else
244 {
245 df = 0;
246 }
247
248 step = 1024 - (fsys / (df * baud));
249
250 return step;
251 }
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:572
IfxMsc_Index
IfxMsc_Index
List of the available MSC resources.
Definition: IfxMsc_cfg.h:79
IfxMsc_downstreamFractionalBaudCalculator
uint64 IfxMsc_downstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional for downstream...
Definition: IfxMsc.c:99
IfxMsc_downstreamAbraBaudCalculator
uint32 IfxMsc_downstreamAbraBaudCalculator(uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled.
Definition: IfxMsc.c:86
IfxMsc_Index_none
Not Selected.
Definition: IfxMsc_cfg.h:81
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxMsc_disableModule
void IfxMsc_disableModule(Ifx_MSC *msc)
Disable MSC kernel.
Definition: IfxMsc.c:76
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxMsc_clearReset
void IfxMsc_clearReset(Ifx_MSC *msc)
Clear reset bit of MSC kernel.
Definition: IfxMsc.c:61
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxMsc_getAddress
Ifx_MSC * IfxMsc_getAddress(IfxMsc_Index msc)
Definition: IfxMsc.c:140
IfxMsc_clearDataFrameInterruptFlag
void IfxMsc_clearDataFrameInterruptFlag(Ifx_MSC *msc)
clear data frame interrupt flag
Definition: IfxMsc.c:54
IfxMsc_upstreamFractionalBaudCalculator
uint64 IfxMsc_upstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional.
Definition: IfxMsc.c:208
IFXMSC_NUM_MODULES
#define IFXMSC_NUM_MODULES
Definition: IfxMsc_cfg.h:67
IfxMsc.h
MSC basic functionality.
IfxMsc_upstreamNormalBaudCalculator
uint32 IfxMsc_upstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal.
Definition: IfxMsc.c:231
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxMsc_getIndex
IfxMsc_Index IfxMsc_getIndex(Ifx_MSC *msc)
API to get the resource index of the MSC specified.
Definition: IfxMsc.c:167
IfxMsc_getActiveDataFrameStatus
boolean IfxMsc_getActiveDataFrameStatus(Ifx_MSC *msc)
get the status of the active data frame
Definition: IfxMsc.c:134
IfxMsc_downstreamNormalBaudCalculator
uint32 IfxMsc_downstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal for downstream.
Definition: IfxMsc.c:112
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxMsc_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES]
Definition: IfxMsc_cfg.c:54
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxMsc_enableModule
void IfxMsc_enableModule(Ifx_MSC *msc)
Enable MSC kernel.
Definition: IfxMsc.c:127
IfxMsc_getDataFrameInterruptFlag
boolean IfxMsc_getDataFrameInterruptFlag(Ifx_MSC *msc)
get the status of the data frame interrupt flag
Definition: IfxMsc.c:157
IfxMsc_resetModule
void IfxMsc_resetModule(Ifx_MSC *msc)
Reset MSC kernel.
Definition: IfxMsc.c:187


iLLD_TC26B: IfxMsc.h Source File

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IfxMsc.h
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1 /**
2 * \file IfxMsc.h
3 * \brief MSC basic functionality
4 * \ingroup IfxLld_Msc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Msc_Std_Enum Enumerations
44 * \ingroup IfxLld_Msc_Std
45 * \defgroup IfxLld_Msc_Std_Config_Flags Configure Flags
46 * \ingroup IfxLld_Msc_Std
47 * \defgroup IfxLld_Msc_Std_Set_Command_Target Set Command Target
48 * \ingroup IfxLld_Msc_Std
49 * \defgroup IfxLld_Msc_Std_Set_Data Set Data
50 * \ingroup IfxLld_Msc_Std
51 * \defgroup IfxLld_Msc_Std_Get_Data Get Data
52 * \ingroup IfxLld_Msc_Std
53 * \defgroup IfxLld_Msc_Std_Enable_Module Enable Module
54 * \ingroup IfxLld_Msc_Std
55 * \defgroup IfxLld_Msc_Std_Reset_Module Reset Module
56 * \ingroup IfxLld_Msc_Std
57 * \defgroup IfxLld_Msc_Std_Baud_Calculator Baud Calculator
58 * \ingroup IfxLld_Msc_Std
59 * \defgroup IfxLld_Msc_Std_IO IO Pin Configuration Functions
60 * \ingroup IfxLld_Msc_Std
61 * \defgroup IfxLld_Msc_Std_Module Module Functions
62 * \ingroup IfxLld_Msc_Std
63 */
64
65 #ifndef IFXMSC_H
66 #define IFXMSC_H 1
67
68 /******************************************************************************/
69 /*----------------------------------Includes----------------------------------*/
70 /******************************************************************************/
71
72 #include "_Impl/IfxMsc_cfg.h"
73 #include "Scu/Std/IfxScuCcu.h"
74 #include "Scu/Std/IfxScuWdt.h"
75 #include "_PinMap/IfxMsc_PinMap.h"
76 #include "Cpu/Std/IfxCpu_Intrinsics.h"
77
78 /******************************************************************************/
79 /*--------------------------------Enumerations--------------------------------*/
80 /******************************************************************************/
81
82 /** \addtogroup IfxLld_Msc_Std_Enum
83 * \{ */
84 /** \brief Enable SRL/SRH Active Phase Selection Bit\n
85 * Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL
86 */
87 typedef enum
88 {
89 IfxMsc_ActivePhaseSelection_none = 0, /**< \brief No selection bit inserted */
90 IfxMsc_ActivePhaseSelection_lowLevel = 1 /**< \brief Low level selection bit inserted */
91 } IfxMsc_ActivePhaseSelection;
92
93 /** \brief Asynchronous Block Configuration Register - Asynchronous Block Bypass\n
94 * Definition in Ifx_MSC.ABC.B.ABB
95 */
96 typedef enum
97 {
98 IfxMsc_AsynchronousBlock_bypassed = 0, /**< \brief Asynchronous block and the n-divider of the MSC downstream path are bypassed and are disabled */
99 IfxMsc_AsynchronousBlock_noBypassed = 1 /**< \brief Asynchronous block and the n-divider of the MSC downstream path are active */
100 } IfxMsc_AsynchronousBlock;
101
102 /** \brief Output Control Register - Chip Selection Line Polarity\n
103 * Definition in Ifx_MSC.OCR.B.CSLP
104 */
105 typedef enum
106 {
107 IfxMsc_ChipSelectActiveState_high = 0, /**< \brief EN[3:0] and ENL,ENH,ENC polarities are identical */
108 IfxMsc_ChipSelectActiveState_low = 1 /**< \brief EN[3:0] and ENL,ENH,ENC polarities are inverted */
109 } IfxMsc_ChipSelectActiveState;
110
111 /** \brief Asynchronous Block Configuration Register - Clock Select\n
112 * Definition in Ifx_MSC.ABC.B.CLKSEL
113 */
114 typedef enum
115 {
116 IfxMsc_ClockSelect_noClock = 0, /**< \brief no clock source for the ABRA block */
117 IfxMsc_ClockSelect_fspb = 1, /**< \brief f_SPB is the clock source for the ABRA block */
118 IfxMsc_ClockSelect_fsri = 2, /**< \brief f_SRI is the clock source for the ABRA block */
119 IfxMsc_ClockSelect_feray = 4 /**< \brief f_ERAY is the clock source for the ABRA block */
120 } IfxMsc_ClockSelect;
121
122 /** \brief Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode\n
123 * Definition in Ifx_MSC.DSCE.B.CDCM
124 */
125 typedef enum
126 {
127 IfxMsc_CommandDataCommandRepetitionMode_disabled = 0, /**< \brief Disables the automatic insertion of data */
128 IfxMsc_CommandDataCommandRepetitionMode_enabled = 1 /**< \brief Enables the automatic insertion of data */
129 } IfxMsc_CommandDataCommandRepetitionMode;
130
131 /** \brief Interrupt Control Register - Command Frame Interrupt Enable\n
132 * Definition in Ifx_MSC.ICR.B.ECIE
133 */
134 typedef enum
135 {
136 IfxMsc_CommandFrameInterrupt_disabled = 0, /**< \brief Interrupt generation disabled */
137 IfxMsc_CommandFrameInterrupt_enabled = 1 /**< \brief Interrupt generation enabled */
138 } IfxMsc_CommandFrameInterrupt;
139
140 /** \brief Interrupt Control Register - Command Frame Interrupt Node Pointer\n
141 * Definition in Ifx_MSC.ICR.B.ECIP
142 */
143 typedef enum
144 {
145 IfxMsc_CommandFrameInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
146 IfxMsc_CommandFrameInterruptNode_SR1, /**< \brief Service request output SR1 selected */
147 IfxMsc_CommandFrameInterruptNode_SR2, /**< \brief Service request output SR2 selected */
148 IfxMsc_CommandFrameInterruptNode_SR3 /**< \brief Service request output SR3 selected */
149 } IfxMsc_CommandFrameInterruptNode;
150
151 /** \brief Number of Bits shifted at command frames\n
152 * Definition in Ifx_MSC.DSC.B.NBC
153 */
154 typedef enum
155 {
156 IfxMsc_CommandFrameLength_0 = 0, /**< \brief No bit shifted */
157 IfxMsc_CommandFrameLength_1 = 1, /**< \brief SRL[0] Shifted */
158 IfxMsc_CommandFrameLength_2 = 2, /**< \brief SRL[1:0] Shifted */
159 IfxMsc_CommandFrameLength_3, /**< \brief SRL[2:0] Shifted */
160 IfxMsc_CommandFrameLength_4, /**< \brief SRL[3:0] Shifted */
161 IfxMsc_CommandFrameLength_5, /**< \brief SRL[4:0] Shifted */
162 IfxMsc_CommandFrameLength_6, /**< \brief SRL[5:0] Shifted */
163 IfxMsc_CommandFrameLength_7, /**< \brief SRL[6:0] Shifted */
164 IfxMsc_CommandFrameLength_8, /**< \brief SRL[7:0] Shifted */
165 IfxMsc_CommandFrameLength_9, /**< \brief SRL[8:0] Shifted */
166 IfxMsc_CommandFrameLength_10, /**< \brief SRL[9:0] Shifted */
167 IfxMsc_CommandFrameLength_11, /**< \brief SRL[10:0] Shifted */
168 IfxMsc_CommandFrameLength_12, /**< \brief SRL[11:0] Shifted */
169 IfxMsc_CommandFrameLength_13, /**< \brief SRL[12:0] Shifted */
170 IfxMsc_CommandFrameLength_14, /**< \brief SRL[13:0] Shifted */
171 IfxMsc_CommandFrameLength_15, /**< \brief SRL[14:0] Shifted */
172 IfxMsc_CommandFrameLength_16, /**< \brief SRL[15:0] Shifted */
173 IfxMsc_CommandFrameLength_17 = 17, /**< \brief SRL[15:0] and SRH[0] Shifted */
174 IfxMsc_CommandFrameLength_18 = 18, /**< \brief SRL[15:0] and SRH[1:0] Shifted */
175 IfxMsc_CommandFrameLength_19, /**< \brief SRL[15:0] and SRH[2:0] Shifted */
176 IfxMsc_CommandFrameLength_20, /**< \brief SRL[15:0] and SRH[3:0] Shifted */
177 IfxMsc_CommandFrameLength_21, /**< \brief SRL[15:0] and SRH[4:0] Shifted */
178 IfxMsc_CommandFrameLength_22, /**< \brief SRL[15:0] and SRH[5:0] Shifted */
179 IfxMsc_CommandFrameLength_23, /**< \brief SRL[15:0] and SRH[6:0] Shifted */
180 IfxMsc_CommandFrameLength_24, /**< \brief SRL[15:0] and SRH[7:0] Shifted */
181 IfxMsc_CommandFrameLength_25, /**< \brief SRL[15:0] and SRH[8:0] Shifted */
182 IfxMsc_CommandFrameLength_26, /**< \brief SRL[15:0] and SRH[9:0] Shifted */
183 IfxMsc_CommandFrameLength_27, /**< \brief SRL[15:0] and SRH[10:0] Shifted */
184 IfxMsc_CommandFrameLength_28, /**< \brief SRL[15:0] and SRH[11:0] Shifted */
185 IfxMsc_CommandFrameLength_29, /**< \brief SRL[15:0] and SRH[12:0] Shifted */
186 IfxMsc_CommandFrameLength_30, /**< \brief SRL[15:0] and SRH[13:0] Shifted */
187 IfxMsc_CommandFrameLength_31, /**< \brief SRL[15:0] and SRH[14:0] Shifted */
188 IfxMsc_CommandFrameLength_32 /**< \brief SRL[15:0] and SRH[15:0] Shifted */
189 } IfxMsc_CommandFrameLength;
190
191 /** \brief Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension\n
192 * Definition in Ifx_MSC.DSTE.B.PPCE
193 */
194 typedef enum
195 {
196 IfxMsc_ControlFrameExtensionPassivePhaseLength_0 = 0, /**< \brief Length of Command frames passive phase is 2 */
197 IfxMsc_ControlFrameExtensionPassivePhaseLength_1, /**< \brief Length of Command frames passive phase is 3 */
198 IfxMsc_ControlFrameExtensionPassivePhaseLength_2, /**< \brief Length of Command frames passive phase is 4 */
199 IfxMsc_ControlFrameExtensionPassivePhaseLength_3, /**< \brief Length of Command frames passive phase is 5 */
200 IfxMsc_ControlFrameExtensionPassivePhaseLength_4, /**< \brief Length of Command frames passive phase is 6 */
201 IfxMsc_ControlFrameExtensionPassivePhaseLength_5, /**< \brief Length of Command frames passive phase is 7 */
202 IfxMsc_ControlFrameExtensionPassivePhaseLength_6, /**< \brief Length of Command frames passive phase is 8 */
203 IfxMsc_ControlFrameExtensionPassivePhaseLength_7, /**< \brief Length of Command frames passive phase is 9 */
204 IfxMsc_ControlFrameExtensionPassivePhaseLength_8, /**< \brief Length of Command frames passive phase is 10 */
205 IfxMsc_ControlFrameExtensionPassivePhaseLength_9, /**< \brief Length of Command frames passive phase is 11 */
206 IfxMsc_ControlFrameExtensionPassivePhaseLength_10, /**< \brief Length of Command frames passive phase is 12 */
207 IfxMsc_ControlFrameExtensionPassivePhaseLength_11, /**< \brief Length of Command frames passive phase is 13 */
208 IfxMsc_ControlFrameExtensionPassivePhaseLength_12, /**< \brief Length of Command frames passive phase is 14 */
209 IfxMsc_ControlFrameExtensionPassivePhaseLength_13, /**< \brief Length of Command frames passive phase is 15 */
210 IfxMsc_ControlFrameExtensionPassivePhaseLength_14, /**< \brief Length of Command frames passive phase is 16 */
211 IfxMsc_ControlFrameExtensionPassivePhaseLength_15, /**< \brief Length of Command frames passive phase is 17 */
212 IfxMsc_ControlFrameExtensionPassivePhaseLength_16, /**< \brief Length of Command frames passive phase is 18 */
213 IfxMsc_ControlFrameExtensionPassivePhaseLength_17, /**< \brief Length of Command frames passive phase is 19 */
214 IfxMsc_ControlFrameExtensionPassivePhaseLength_18, /**< \brief Length of Command frames passive phase is 20 */
215 IfxMsc_ControlFrameExtensionPassivePhaseLength_19, /**< \brief Length of Command frames passive phase is 21 */
216 IfxMsc_ControlFrameExtensionPassivePhaseLength_20, /**< \brief Length of Command frames passive phase is 22 */
217 IfxMsc_ControlFrameExtensionPassivePhaseLength_21, /**< \brief Length of Command frames passive phase is 23 */
218 IfxMsc_ControlFrameExtensionPassivePhaseLength_22, /**< \brief Length of Command frames passive phase is 24 */
219 IfxMsc_ControlFrameExtensionPassivePhaseLength_23, /**< \brief Length of Command frames passive phase is 25 */
220 IfxMsc_ControlFrameExtensionPassivePhaseLength_24, /**< \brief Length of Command frames passive phase is 26 */
221 IfxMsc_ControlFrameExtensionPassivePhaseLength_25, /**< \brief Length of Command frames passive phase is 27 */
222 IfxMsc_ControlFrameExtensionPassivePhaseLength_26, /**< \brief Length of Command frames passive phase is 28 */
223 IfxMsc_ControlFrameExtensionPassivePhaseLength_27, /**< \brief Length of Command frames passive phase is 29 */
224 IfxMsc_ControlFrameExtensionPassivePhaseLength_28, /**< \brief Length of Command frames passive phase is 30 */
225 IfxMsc_ControlFrameExtensionPassivePhaseLength_29, /**< \brief Length of Command frames passive phase is 31 */
226 IfxMsc_ControlFrameExtensionPassivePhaseLength_30, /**< \brief Length of Command frames passive phase is 32 */
227 IfxMsc_ControlFrameExtensionPassivePhaseLength_31, /**< \brief Length of Command frames passive phase is 33 */
228 IfxMsc_ControlFrameExtensionPassivePhaseLength_32, /**< \brief Length of Command frames passive phase is 34 */
229 IfxMsc_ControlFrameExtensionPassivePhaseLength_33, /**< \brief Length of Command frames passive phase is 35 */
230 IfxMsc_ControlFrameExtensionPassivePhaseLength_34, /**< \brief Length of Command frames passive phase is 36 */
231 IfxMsc_ControlFrameExtensionPassivePhaseLength_35, /**< \brief Length of Command frames passive phase is 37 */
232 IfxMsc_ControlFrameExtensionPassivePhaseLength_36, /**< \brief Length of Command frames passive phase is 38 */
233 IfxMsc_ControlFrameExtensionPassivePhaseLength_37, /**< \brief Length of Command frames passive phase is 39 */
234 IfxMsc_ControlFrameExtensionPassivePhaseLength_38, /**< \brief Length of Command frames passive phase is 40 */
235 IfxMsc_ControlFrameExtensionPassivePhaseLength_39, /**< \brief Length of Command frames passive phase is 41 */
236 IfxMsc_ControlFrameExtensionPassivePhaseLength_40, /**< \brief Length of Command frames passive phase is 42 */
237 IfxMsc_ControlFrameExtensionPassivePhaseLength_41, /**< \brief Length of Command frames passive phase is 43 */
238 IfxMsc_ControlFrameExtensionPassivePhaseLength_42, /**< \brief Length of Command frames passive phase is 44 */
239 IfxMsc_ControlFrameExtensionPassivePhaseLength_43, /**< \brief Length of Command frames passive phase is 45 */
240 IfxMsc_ControlFrameExtensionPassivePhaseLength_44, /**< \brief Length of Command frames passive phase is 46 */
241 IfxMsc_ControlFrameExtensionPassivePhaseLength_45, /**< \brief Length of Command frames passive phase is 47 */
242 IfxMsc_ControlFrameExtensionPassivePhaseLength_46, /**< \brief Length of Command frames passive phase is 48 */
243 IfxMsc_ControlFrameExtensionPassivePhaseLength_47, /**< \brief Length of Command frames passive phase is 49 */
244 IfxMsc_ControlFrameExtensionPassivePhaseLength_48, /**< \brief Length of Command frames passive phase is 50 */
245 IfxMsc_ControlFrameExtensionPassivePhaseLength_49, /**< \brief Length of Command frames passive phase is 51 */
246 IfxMsc_ControlFrameExtensionPassivePhaseLength_50, /**< \brief Length of Command frames passive phase is 52 */
247 IfxMsc_ControlFrameExtensionPassivePhaseLength_51, /**< \brief Length of Command frames passive phase is 53 */
248 IfxMsc_ControlFrameExtensionPassivePhaseLength_52, /**< \brief Length of Command frames passive phase is 54 */
249 IfxMsc_ControlFrameExtensionPassivePhaseLength_53, /**< \brief Length of Command frames passive phase is 55 */
250 IfxMsc_ControlFrameExtensionPassivePhaseLength_54, /**< \brief Length of Command frames passive phase is 56 */
251 IfxMsc_ControlFrameExtensionPassivePhaseLength_55, /**< \brief Length of Command frames passive phase is 57 */
252 IfxMsc_ControlFrameExtensionPassivePhaseLength_56, /**< \brief Length of Command frames passive phase is 58 */
253 IfxMsc_ControlFrameExtensionPassivePhaseLength_57, /**< \brief Length of Command frames passive phase is 59 */
254 IfxMsc_ControlFrameExtensionPassivePhaseLength_58, /**< \brief Length of Command frames passive phase is 60 */
255 IfxMsc_ControlFrameExtensionPassivePhaseLength_59, /**< \brief Length of Command frames passive phase is 61 */
256 IfxMsc_ControlFrameExtensionPassivePhaseLength_60, /**< \brief Length of Command frames passive phase is 62 */
257 IfxMsc_ControlFrameExtensionPassivePhaseLength_61, /**< \brief Length of Command frames passive phase is 63 */
258 IfxMsc_ControlFrameExtensionPassivePhaseLength_62, /**< \brief Length of Command frames passive phase is 64 */
259 IfxMsc_ControlFrameExtensionPassivePhaseLength_63, /**< \brief Length of Command frames passive phase is 65 */
260 IfxMsc_ControlFrameExtensionPassivePhaseLength_64, /**< \brief Length of Command frames passive phase is 66 */
261 IfxMsc_ControlFrameExtensionPassivePhaseLength_65, /**< \brief Length of Command frames passive phase is 67 */
262 IfxMsc_ControlFrameExtensionPassivePhaseLength_66, /**< \brief Length of Command frames passive phase is 68 */
263 IfxMsc_ControlFrameExtensionPassivePhaseLength_67, /**< \brief Length of Command frames passive phase is 69 */
264 IfxMsc_ControlFrameExtensionPassivePhaseLength_68, /**< \brief Length of Command frames passive phase is 70 */
265 IfxMsc_ControlFrameExtensionPassivePhaseLength_69, /**< \brief Length of Command frames passive phase is 71 */
266 IfxMsc_ControlFrameExtensionPassivePhaseLength_70, /**< \brief Length of Command frames passive phase is 72 */
267 IfxMsc_ControlFrameExtensionPassivePhaseLength_71, /**< \brief Length of Command frames passive phase is 73 */
268 IfxMsc_ControlFrameExtensionPassivePhaseLength_72, /**< \brief Length of Command frames passive phase is 74 */
269 IfxMsc_ControlFrameExtensionPassivePhaseLength_73, /**< \brief Length of Command frames passive phase is 75 */
270 IfxMsc_ControlFrameExtensionPassivePhaseLength_74, /**< \brief Length of Command frames passive phase is 76 */
271 IfxMsc_ControlFrameExtensionPassivePhaseLength_75, /**< \brief Length of Command frames passive phase is 77 */
272 IfxMsc_ControlFrameExtensionPassivePhaseLength_76, /**< \brief Length of Command frames passive phase is 78 */
273 IfxMsc_ControlFrameExtensionPassivePhaseLength_77, /**< \brief Length of Command frames passive phase is 79 */
274 IfxMsc_ControlFrameExtensionPassivePhaseLength_78, /**< \brief Length of Command frames passive phase is 80 */
275 IfxMsc_ControlFrameExtensionPassivePhaseLength_79, /**< \brief Length of Command frames passive phase is 81 */
276 IfxMsc_ControlFrameExtensionPassivePhaseLength_80, /**< \brief Length of Command frames passive phase is 82 */
277 IfxMsc_ControlFrameExtensionPassivePhaseLength_81, /**< \brief Length of Command frames passive phase is 83 */
278 IfxMsc_ControlFrameExtensionPassivePhaseLength_82, /**< \brief Length of Command frames passive phase is 84 */
279 IfxMsc_ControlFrameExtensionPassivePhaseLength_83, /**< \brief Length of Command frames passive phase is 85 */
280 IfxMsc_ControlFrameExtensionPassivePhaseLength_84, /**< \brief Length of Command frames passive phase is 86 */
281 IfxMsc_ControlFrameExtensionPassivePhaseLength_85, /**< \brief Length of Command frames passive phase is 87 */
282 IfxMsc_ControlFrameExtensionPassivePhaseLength_86, /**< \brief Length of Command frames passive phase is 88 */
283 IfxMsc_ControlFrameExtensionPassivePhaseLength_87, /**< \brief Length of Command frames passive phase is 89 */
284 IfxMsc_ControlFrameExtensionPassivePhaseLength_88, /**< \brief Length of Command frames passive phase is 90 */
285 IfxMsc_ControlFrameExtensionPassivePhaseLength_89, /**< \brief Length of Command frames passive phase is 91 */
286 IfxMsc_ControlFrameExtensionPassivePhaseLength_90, /**< \brief Length of Command frames passive phase is 92 */
287 IfxMsc_ControlFrameExtensionPassivePhaseLength_91, /**< \brief Length of Command frames passive phase is 93 */
288 IfxMsc_ControlFrameExtensionPassivePhaseLength_92, /**< \brief Length of Command frames passive phase is 94 */
289 IfxMsc_ControlFrameExtensionPassivePhaseLength_93, /**< \brief Length of Command frames passive phase is 95 */
290 IfxMsc_ControlFrameExtensionPassivePhaseLength_94, /**< \brief Length of Command frames passive phase is 96 */
291 IfxMsc_ControlFrameExtensionPassivePhaseLength_95, /**< \brief Length of Command frames passive phase is 97 */
292 IfxMsc_ControlFrameExtensionPassivePhaseLength_96, /**< \brief Length of Command frames passive phase is 98 */
293 IfxMsc_ControlFrameExtensionPassivePhaseLength_97, /**< \brief Length of Command frames passive phase is 99 */
294 IfxMsc_ControlFrameExtensionPassivePhaseLength_98, /**< \brief Length of Command frames passive phase is 100 */
295 IfxMsc_ControlFrameExtensionPassivePhaseLength_99, /**< \brief Length of Command frames passive phase is 101 */
296 IfxMsc_ControlFrameExtensionPassivePhaseLength_100, /**< \brief Length of Command frames passive phase is 102 */
297 IfxMsc_ControlFrameExtensionPassivePhaseLength_101, /**< \brief Length of Command frames passive phase is 103 */
298 IfxMsc_ControlFrameExtensionPassivePhaseLength_102, /**< \brief Length of Command frames passive phase is 104 */
299 IfxMsc_ControlFrameExtensionPassivePhaseLength_103, /**< \brief Length of Command frames passive phase is 105 */
300 IfxMsc_ControlFrameExtensionPassivePhaseLength_104, /**< \brief Length of Command frames passive phase is 106 */
301 IfxMsc_ControlFrameExtensionPassivePhaseLength_105, /**< \brief Length of Command frames passive phase is 107 */
302 IfxMsc_ControlFrameExtensionPassivePhaseLength_106, /**< \brief Length of Command frames passive phase is 108 */
303 IfxMsc_ControlFrameExtensionPassivePhaseLength_107, /**< \brief Length of Command frames passive phase is 109 */
304 IfxMsc_ControlFrameExtensionPassivePhaseLength_108, /**< \brief Length of Command frames passive phase is 110 */
305 IfxMsc_ControlFrameExtensionPassivePhaseLength_109, /**< \brief Length of Command frames passive phase is 111 */
306 IfxMsc_ControlFrameExtensionPassivePhaseLength_110, /**< \brief Length of Command frames passive phase is 112 */
307 IfxMsc_ControlFrameExtensionPassivePhaseLength_111, /**< \brief Length of Command frames passive phase is 113 */
308 IfxMsc_ControlFrameExtensionPassivePhaseLength_112, /**< \brief Length of Command frames passive phase is 114 */
309 IfxMsc_ControlFrameExtensionPassivePhaseLength_113, /**< \brief Length of Command frames passive phase is 115 */
310 IfxMsc_ControlFrameExtensionPassivePhaseLength_114, /**< \brief Length of Command frames passive phase is 116 */
311 IfxMsc_ControlFrameExtensionPassivePhaseLength_115, /**< \brief Length of Command frames passive phase is 117 */
312 IfxMsc_ControlFrameExtensionPassivePhaseLength_116, /**< \brief Length of Command frames passive phase is 118 */
313 IfxMsc_ControlFrameExtensionPassivePhaseLength_117, /**< \brief Length of Command frames passive phase is 119 */
314 IfxMsc_ControlFrameExtensionPassivePhaseLength_118, /**< \brief Length of Command frames passive phase is 120 */
315 IfxMsc_ControlFrameExtensionPassivePhaseLength_119, /**< \brief Length of Command frames passive phase is 121 */
316 IfxMsc_ControlFrameExtensionPassivePhaseLength_120, /**< \brief Length of Command frames passive phase is 122 */
317 IfxMsc_ControlFrameExtensionPassivePhaseLength_121, /**< \brief Length of Command frames passive phase is 123 */
318 IfxMsc_ControlFrameExtensionPassivePhaseLength_122, /**< \brief Length of Command frames passive phase is 124 */
319 IfxMsc_ControlFrameExtensionPassivePhaseLength_123, /**< \brief Length of Command frames passive phase is 125 */
320 IfxMsc_ControlFrameExtensionPassivePhaseLength_124, /**< \brief Length of Command frames passive phase is 126 */
321 IfxMsc_ControlFrameExtensionPassivePhaseLength_125, /**< \brief Length of Command frames passive phase is 127 */
322 IfxMsc_ControlFrameExtensionPassivePhaseLength_126, /**< \brief Length of Command frames passive phase is 128 */
323 IfxMsc_ControlFrameExtensionPassivePhaseLength_127 /**< \brief Length of Command frames passive phase is 129 */
324 } IfxMsc_ControlFrameExtensionPassivePhaseLength;
325
326 /** \brief Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension\n
327 * Definition in Ifx_MSC.DSTE.B.PPDE
328 */
329 typedef enum
330 {
331 IfxMsc_DataFrameExtensionPassivePhaseLength_0 = 0, /**< \brief 0 Additional MSB bits extension of the PPD bit field */
332 IfxMsc_DataFrameExtensionPassivePhaseLength_1, /**< \brief 1 Additional MSB bits extension of the PPD bit field */
333 IfxMsc_DataFrameExtensionPassivePhaseLength_2, /**< \brief 2 Additional MSB bits extension of the PPD bit field */
334 IfxMsc_DataFrameExtensionPassivePhaseLength_3 /**< \brief 3 Additional MSB bits extension of the PPD bit field */
335 } IfxMsc_DataFrameExtensionPassivePhaseLength;
336
337 /** \brief Interrupt Control Register - Data Frame Interrupt Enable\n
338 * Definition in Ifx_MSC.ICR.B.EDIE
339 */
340 typedef enum
341 {
342 IfxMsc_DataFrameInterrupt_disabled = 0, /**< \brief Interrupt generation Disable */
343 IfxMsc_DataFrameInterrupt_atLastDataBit = 1, /**< \brief An interrupt is generated when the last data bit has been shifted out */
344 IfxMsc_DataFrameInterrupt_atFirstDataBit = 2 /**< \brief An interrupt is generated when the First data bit has been shifted out */
345 } IfxMsc_DataFrameInterrupt;
346
347 /** \brief Interrupt Control Register - Data Frame Interrupt Node Pointer\n
348 * Definition in Ifx_MSC.ICR.B.EDIP
349 */
350 typedef enum
351 {
352 IfxMsc_DataFrameInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
353 IfxMsc_DataFrameInterruptNode_SR1, /**< \brief Service request output SR1 selected */
354 IfxMsc_DataFrameInterruptNode_SR2, /**< \brief Service request output SR2 selected */
355 IfxMsc_DataFrameInterruptNode_SR3 /**< \brief Service request output SR3 selected */
356 } IfxMsc_DataFrameInterruptNode;
357
358 /** \brief Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames\n
359 * Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL
360 */
361 typedef enum
362 {
363 IfxMsc_DataFrameLength_0 = 0, /**< \brief No SRx bit shifted */
364 IfxMsc_DataFrameLength_1 = 1, /**< \brief SRx[0] Shifted */
365 IfxMsc_DataFrameLength_2 = 2, /**< \brief SRx[1:0] Shifted */
366 IfxMsc_DataFrameLength_3, /**< \brief SRx[2:0] Shifted */
367 IfxMsc_DataFrameLength_4, /**< \brief SRx[3:0] Shifted */
368 IfxMsc_DataFrameLength_5, /**< \brief SRx[4:0] Shifted */
369 IfxMsc_DataFrameLength_6, /**< \brief SRx[5:0] Shifted */
370 IfxMsc_DataFrameLength_7, /**< \brief SRx[6:0] Shifted */
371 IfxMsc_DataFrameLength_8, /**< \brief SRx[7:0] Shifted */
372 IfxMsc_DataFrameLength_9, /**< \brief SRx[8:0] Shifted */
373 IfxMsc_DataFrameLength_10, /**< \brief SRx[9:0] Shifted */
374 IfxMsc_DataFrameLength_11, /**< \brief SRx[10:0] Shifted */
375 IfxMsc_DataFrameLength_12, /**< \brief SRx[11:0] Shifted */
376 IfxMsc_DataFrameLength_13, /**< \brief SRx[12:0] Shifted */
377 IfxMsc_DataFrameLength_14, /**< \brief SRx[13:0] Shifted */
378 IfxMsc_DataFrameLength_15, /**< \brief SRx[14:0] Shifted */
379 IfxMsc_DataFrameLength_16 /**< \brief SRx[15:0] Shifted */
380 } IfxMsc_DataFrameLength;
381
382 /** \brief Passive Phase Length at Data Frames\n
383 * Definition in Ifx_MSC.DSC.B.PPD
384 */
385 typedef enum
386 {
387 IfxMsc_DataFramePassivePhaseLength_2 = 2, /**< \brief Passive phase length is 2 tFCL */
388 IfxMsc_DataFramePassivePhaseLength_3, /**< \brief Passive phase length is 3 tFCL */
389 IfxMsc_DataFramePassivePhaseLength_4, /**< \brief Passive phase length is 4 tFCL */
390 IfxMsc_DataFramePassivePhaseLength_5, /**< \brief Passive phase length is 5 tFCL */
391 IfxMsc_DataFramePassivePhaseLength_6, /**< \brief Passive phase length is 6 tFCL */
392 IfxMsc_DataFramePassivePhaseLength_7, /**< \brief Passive phase length is 7 tFCL */
393 IfxMsc_DataFramePassivePhaseLength_8, /**< \brief Passive phase length is 8 tFCL */
394 IfxMsc_DataFramePassivePhaseLength_9, /**< \brief Passive phase length is 9 tFCL */
395 IfxMsc_DataFramePassivePhaseLength_10, /**< \brief Passive phase length is 10 tFCL */
396 IfxMsc_DataFramePassivePhaseLength_11, /**< \brief Passive phase length is 11 tFCL */
397 IfxMsc_DataFramePassivePhaseLength_12, /**< \brief Passive phase length is 12 tFCL */
398 IfxMsc_DataFramePassivePhaseLength_13, /**< \brief Passive phase length is 13 tFCL */
399 IfxMsc_DataFramePassivePhaseLength_14, /**< \brief Passive phase length is 14 tFCL */
400 IfxMsc_DataFramePassivePhaseLength_15, /**< \brief Passive phase length is 15 tFCL */
401 IfxMsc_DataFramePassivePhaseLength_16, /**< \brief Passive phase length is 16 tFCL */
402 IfxMsc_DataFramePassivePhaseLength_17, /**< \brief Passive phase length is 17 tFCL */
403 IfxMsc_DataFramePassivePhaseLength_18, /**< \brief Passive phase length is 18 tFCL */
404 IfxMsc_DataFramePassivePhaseLength_19, /**< \brief Passive phase length is 19 tFCL */
405 IfxMsc_DataFramePassivePhaseLength_20, /**< \brief Passive phase length is 20 tFCL */
406 IfxMsc_DataFramePassivePhaseLength_21, /**< \brief Passive phase length is 21 tFCL */
407 IfxMsc_DataFramePassivePhaseLength_22, /**< \brief Passive phase length is 22 tFCL */
408 IfxMsc_DataFramePassivePhaseLength_23, /**< \brief Passive phase length is 23 tFCL */
409 IfxMsc_DataFramePassivePhaseLength_24, /**< \brief Passive phase length is 24 tFCL */
410 IfxMsc_DataFramePassivePhaseLength_25, /**< \brief Passive phase length is 25 tFCL */
411 IfxMsc_DataFramePassivePhaseLength_26, /**< \brief Passive phase length is 26 tFCL */
412 IfxMsc_DataFramePassivePhaseLength_27, /**< \brief Passive phase length is 27 tFCL */
413 IfxMsc_DataFramePassivePhaseLength_28, /**< \brief Passive phase length is 28 tFCL */
414 IfxMsc_DataFramePassivePhaseLength_29, /**< \brief Passive phase length is 29 tFCL */
415 IfxMsc_DataFramePassivePhaseLength_30, /**< \brief Passive phase length is 30 tFCL */
416 IfxMsc_DataFramePassivePhaseLength_31, /**< \brief Passive phase length is 31 tFCL */
417 IfxMsc_DataFramePassivePhaseLength_32 /**< \brief Passive phase length is 32 tFCL */
418 } IfxMsc_DataFramePassivePhaseLength;
419
420 /** \brief Divider mode
421 */
422 typedef enum
423 {
424 IfxMsc_DividerMode_normal = 1, /**< \brief divider mode is normal */
425 IfxMsc_DividerMode_fractional = 2 /**< \brief divider mode is fractional */
426 } IfxMsc_DividerMode;
427
428 /** \brief Emergency Stop Register - Emergency stop feature Enable or Disable - SRL and SRH\n
429 * Definition in Ifx_MSC.ESR
430 */
431 typedef enum
432 {
433 IfxMsc_EmergencyStop_disabled = 0, /**< \brief Emergency stop feature for SRx bit is Disabled */
434 IfxMsc_EmergencyStop_enabled = 1 /**< \brief Emergency stop feature for SRx bit is Enabled */
435 } IfxMsc_EmergencyStop;
436
437 /** \brief Downstream Control Enhanced Register - Extension Enable\n
438 * Definition in Ifx_MSC.DSCE.B.NDBLE
439 */
440 typedef enum
441 {
442 IfxMsc_Extension_disabled = 0, /**< \brief Disables the extension bit fields */
443 IfxMsc_Extension_enabled = 1 /**< \brief Enables the extension bit fields */
444 } IfxMsc_Extension;
445
446 /** \brief Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal\n
447 * Definition in Ifx_MSC.DSCE.B.INJPOSP0 and Ifx_MSC.DSCE.B.INJPOSP1
448 */
449 typedef enum
450 {
451 IfxMsc_ExternalBitInjectionPosition_0 = 0, /**< \brief Injected external bit is at Position 0 of the data frame */
452 IfxMsc_ExternalBitInjectionPosition_1, /**< \brief Injected external bit is at Position 1 of the data frame */
453 IfxMsc_ExternalBitInjectionPosition_2, /**< \brief Injected external bit is at Position 2 of the data frame */
454 IfxMsc_ExternalBitInjectionPosition_3, /**< \brief Injected external bit is at Position 3 of the data frame */
455 IfxMsc_ExternalBitInjectionPosition_4, /**< \brief Injected external bit is at Position 4 of the data frame */
456 IfxMsc_ExternalBitInjectionPosition_5, /**< \brief Injected external bit is at Position 5 of the data frame */
457 IfxMsc_ExternalBitInjectionPosition_6, /**< \brief Injected external bit is at Position 6 of the data frame */
458 IfxMsc_ExternalBitInjectionPosition_7, /**< \brief Injected external bit is at Position 7 of the data frame */
459 IfxMsc_ExternalBitInjectionPosition_8, /**< \brief Injected external bit is at Position 8 of the data frame */
460 IfxMsc_ExternalBitInjectionPosition_9, /**< \brief Injected external bit is at Position 9 of the data frame */
461 IfxMsc_ExternalBitInjectionPosition_10, /**< \brief Injected external bit is at Position 10 of the data frame */
462 IfxMsc_ExternalBitInjectionPosition_11, /**< \brief Injected external bit is at Position 11 of the data frame */
463 IfxMsc_ExternalBitInjectionPosition_12, /**< \brief Injected external bit is at Position 12 of the data frame */
464 IfxMsc_ExternalBitInjectionPosition_13, /**< \brief Injected external bit is at Position 13 of the data frame */
465 IfxMsc_ExternalBitInjectionPosition_14, /**< \brief Injected external bit is at Position 14 of the data frame */
466 IfxMsc_ExternalBitInjectionPosition_15, /**< \brief Injected external bit is at Position 15 of the data frame */
467 IfxMsc_ExternalBitInjectionPosition_16, /**< \brief Injected external bit is at Position 16 of the data frame */
468 IfxMsc_ExternalBitInjectionPosition_17, /**< \brief Injected external bit is at Position 17 of the data frame */
469 IfxMsc_ExternalBitInjectionPosition_18, /**< \brief Injected external bit is at Position 18 of the data frame */
470 IfxMsc_ExternalBitInjectionPosition_19, /**< \brief Injected external bit is at Position 19 of the data frame */
471 IfxMsc_ExternalBitInjectionPosition_20, /**< \brief Injected external bit is at Position 20 of the data frame */
472 IfxMsc_ExternalBitInjectionPosition_21, /**< \brief Injected external bit is at Position 21 of the data frame */
473 IfxMsc_ExternalBitInjectionPosition_22, /**< \brief Injected external bit is at Position 22 of the data frame */
474 IfxMsc_ExternalBitInjectionPosition_23, /**< \brief Injected external bit is at Position 23 of the data frame */
475 IfxMsc_ExternalBitInjectionPosition_24, /**< \brief Injected external bit is at Position 24 of the data frame */
476 IfxMsc_ExternalBitInjectionPosition_25, /**< \brief Injected external bit is at Position 25 of the data frame */
477 IfxMsc_ExternalBitInjectionPosition_26, /**< \brief Injected external bit is at Position 26 of the data frame */
478 IfxMsc_ExternalBitInjectionPosition_27, /**< \brief Injected external bit is at Position 27 of the data frame */
479 IfxMsc_ExternalBitInjectionPosition_28, /**< \brief Injected external bit is at Position 28 of the data frame */
480 IfxMsc_ExternalBitInjectionPosition_29, /**< \brief Injected external bit is at Position 29 of the data frame */
481 IfxMsc_ExternalBitInjectionPosition_30, /**< \brief Injected external bit is at Position 30 of the data frame */
482 IfxMsc_ExternalBitInjectionPosition_31, /**< \brief Injected external bit is at Position 31 of the data frame */
483 IfxMsc_ExternalBitInjectionPosition_32, /**< \brief Injected external bit is at Position 32 of the data frame */
484 IfxMsc_ExternalBitInjectionPosition_33, /**< \brief Injected external bit is at Position 33 of the data frame */
485 IfxMsc_ExternalBitInjectionPosition_34, /**< \brief Injected external bit is at Position 34 of the data frame */
486 IfxMsc_ExternalBitInjectionPosition_35, /**< \brief Injected external bit is at Position 35 of the data frame */
487 IfxMsc_ExternalBitInjectionPosition_36, /**< \brief Injected external bit is at Position 36 of the data frame */
488 IfxMsc_ExternalBitInjectionPosition_37, /**< \brief Injected external bit is at Position 37 of the data frame */
489 IfxMsc_ExternalBitInjectionPosition_38, /**< \brief Injected external bit is at Position 38 of the data frame */
490 IfxMsc_ExternalBitInjectionPosition_39, /**< \brief Injected external bit is at Position 39 of the data frame */
491 IfxMsc_ExternalBitInjectionPosition_40, /**< \brief Injected external bit is at Position 40 of the data frame */
492 IfxMsc_ExternalBitInjectionPosition_41, /**< \brief Injected external bit is at Position 41 of the data frame */
493 IfxMsc_ExternalBitInjectionPosition_42, /**< \brief Injected external bit is at Position 42 of the data frame */
494 IfxMsc_ExternalBitInjectionPosition_43, /**< \brief Injected external bit is at Position 43 of the data frame */
495 IfxMsc_ExternalBitInjectionPosition_44, /**< \brief Injected external bit is at Position 44 of the data frame */
496 IfxMsc_ExternalBitInjectionPosition_45, /**< \brief Injected external bit is at Position 45 of the data frame */
497 IfxMsc_ExternalBitInjectionPosition_46, /**< \brief Injected external bit is at Position 46 of the data frame */
498 IfxMsc_ExternalBitInjectionPosition_47, /**< \brief Injected external bit is at Position 47 of the data frame */
499 IfxMsc_ExternalBitInjectionPosition_48, /**< \brief Injected external bit is at Position 48 of the data frame */
500 IfxMsc_ExternalBitInjectionPosition_49, /**< \brief Injected external bit is at Position 49 of the data frame */
501 IfxMsc_ExternalBitInjectionPosition_50, /**< \brief Injected external bit is at Position 50 of the data frame */
502 IfxMsc_ExternalBitInjectionPosition_51, /**< \brief Injected external bit is at Position 51 of the data frame */
503 IfxMsc_ExternalBitInjectionPosition_52, /**< \brief Injected external bit is at Position 52 of the data frame */
504 IfxMsc_ExternalBitInjectionPosition_53, /**< \brief Injected external bit is at Position 53 of the data frame */
505 IfxMsc_ExternalBitInjectionPosition_54, /**< \brief Injected external bit is at Position 54 of the data frame */
506 IfxMsc_ExternalBitInjectionPosition_55, /**< \brief Injected external bit is at Position 55 of the data frame */
507 IfxMsc_ExternalBitInjectionPosition_56, /**< \brief Injected external bit is at Position 56 of the data frame */
508 IfxMsc_ExternalBitInjectionPosition_57, /**< \brief Injected external bit is at Position 57 of the data frame */
509 IfxMsc_ExternalBitInjectionPosition_58, /**< \brief Injected external bit is at Position 58 of the data frame */
510 IfxMsc_ExternalBitInjectionPosition_59, /**< \brief Injected external bit is at Position 59 of the data frame */
511 IfxMsc_ExternalBitInjectionPosition_60, /**< \brief Injected external bit is at Position 60 of the data frame */
512 IfxMsc_ExternalBitInjectionPosition_61, /**< \brief Injected external bit is at Position 61 of the data frame */
513 IfxMsc_ExternalBitInjectionPosition_62, /**< \brief Injected external bit is at Position 62 of the data frame */
514 IfxMsc_ExternalBitInjectionPosition_63 /**< \brief Injected external bit is at Position 63 of the data frame */
515 } IfxMsc_ExternalBitInjectionPosition;
516
517 /** \brief Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal\n
518 * Definition in Ifx_MSC.DSCE.B.INJENP0 and Ifx_MSC.DSCE.B.INJENP1
519 */
520 typedef enum
521 {
522 IfxMsc_ExternalSignalInjection_disabled = 0, /**< \brief Disables the external signal injection in a data frame */
523 IfxMsc_ExternalSignalInjection_enabled = 1 /**< \brief Enables the external signal injection in a data frame */
524 } IfxMsc_ExternalSignalInjection;
525
526 /** \brief Output Control Register - Clock Control\n
527 * Definition in Ifx_MSC.OCR.B.CLKCTRL
528 */
529 typedef enum
530 {
531 IfxMsc_FclClockControlEnabled_activePhaseOnly = 0, /**< \brief FCL is active during active phases of data or command frames */
532 IfxMsc_FclClockControlEnabled_always = 1 /**< \brief FCL is always active */
533 } IfxMsc_FclClockControlEnabled;
534
535 /** \brief Output Control Register - FCLP Line Polarity\n
536 * Definition in Ifx_MSC.OCR.B.CLP
537 */
538 typedef enum
539 {
540 IfxMsc_FclLinePolarity_nonInverted = 0, /**< \brief FCLP and FCL signal polarity is identical */
541 IfxMsc_FclLinePolarity_inverted = 1 /**< \brief FCLP signal has inverted FCL signal polarity */
542 } IfxMsc_FclLinePolarity;
543
544 /** \brief Enable hardware clock control
545 */
546 typedef enum
547 {
548 IfxMsc_HardwareClock_disabled = 0, /**< \brief Hardware clock disable */
549 IfxMsc_HardwareClock_enabled = 1 /**< \brief Hardware clock enable */
550 } IfxMsc_HardwareClock;
551
552 /** \brief Interrupt Service Request
553 */
554 typedef enum
555 {
556 IfxMsc_InterruptServiceRequest_0 = 0, /**< \brief Interrupt Service Request number0 */
557 IfxMsc_InterruptServiceRequest_1, /**< \brief Interrupt Service Request number1 */
558 IfxMsc_InterruptServiceRequest_2, /**< \brief Interrupt Service Request number2 */
559 IfxMsc_InterruptServiceRequest_3, /**< \brief Interrupt Service Request number3 */
560 IfxMsc_InterruptServiceRequest_4 /**< \brief Interrupt Service Request number4 */
561 } IfxMsc_InterruptServiceRequest;
562
563 /** \brief OCDS Control and Status - OCDS Suspend Control
564 * Definition in Ifx_MSC.OCS.B.SUS
565 */
566 typedef enum
567 {
568 IfxMsc_ModuleSuspendRequestBit_noSuspend = 0, /**< \brief OCDS is not suspended */
569 IfxMsc_ModuleSuspendRequestBit_hardSuspend = 1, /**< \brief OCDS is Hard suspended. Clock is switched off immediately */
570 IfxMsc_ModuleSuspendRequestBit_softSuspend = 2 /**< \brief OCDS is Soft suspended */
571 } IfxMsc_ModuleSuspendRequestBit;
572
573 /** \brief Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/NDBH)\n
574 * Definition in Ifx_MSC.DSCE.B.NDBLE and Ifx_MSC.DSCE.B.NDBHE
575 */
576 typedef enum
577 {
578 IfxMsc_MsbBitDataExtension_notPresent = 0, /**< \brief Additional MSB bit is not present in the extension of the NDBL/NDBH bit field */
579 IfxMsc_MsbBitDataExtension_present = 1 /**< \brief Additional MSB bit is present in the extension of the NDBL/NDBH bit field */
580 } IfxMsc_MsbBitDataExtension;
581
582 /** \brief Asynchronous Block Configuration Register - N Divider ABRA\n
583 * Definition in Ifx_MSC.ABC.B.NDA
584 */
585 typedef enum
586 {
587 IfxMsc_NDividerAbra_1 = 0, /**< \brief Division ratio is 1 */
588 IfxMsc_NDividerAbra_2, /**< \brief Division ratio is 2 */
589 IfxMsc_NDividerAbra_3, /**< \brief Division ratio is 3 */
590 IfxMsc_NDividerAbra_4, /**< \brief Division ratio is 4 */
591 IfxMsc_NDividerAbra_5, /**< \brief Division ratio is 5 */
592 IfxMsc_NDividerAbra_6, /**< \brief Division ratio is 6 */
593 IfxMsc_NDividerAbra_7, /**< \brief Division ratio is 7 */
594 IfxMsc_NDividerAbra_8 /**< \brief Division ratio is 8 */
595 } IfxMsc_NDividerAbra;
596
597 /** \brief Downstream Timing Extension Register - N Divider Downstream\n
598 * Definition in Ifx_MSC.DSTE.B.NDD
599 */
600 typedef enum
601 {
602 IfxMsc_NDividerDownstream_1 = 0, /**< \brief division ratio is 1 */
603 IfxMsc_NDividerDownstream_2, /**< \brief division ratio is 2 */
604 IfxMsc_NDividerDownstream_3, /**< \brief division ratio is 3 */
605 IfxMsc_NDividerDownstream_4, /**< \brief division ratio is 4 */
606 IfxMsc_NDividerDownstream_5, /**< \brief division ratio is 5 */
607 IfxMsc_NDividerDownstream_6, /**< \brief division ratio is 6 */
608 IfxMsc_NDividerDownstream_7, /**< \brief division ratio is 7 */
609 IfxMsc_NDividerDownstream_8, /**< \brief division ratio is 8 */
610 IfxMsc_NDividerDownstream_9, /**< \brief division ratio is 9 */
611 IfxMsc_NDividerDownstream_10, /**< \brief division ratio is 10 */
612 IfxMsc_NDividerDownstream_11, /**< \brief division ratio is 11 */
613 IfxMsc_NDividerDownstream_12, /**< \brief division ratio is 12 */
614 IfxMsc_NDividerDownstream_13, /**< \brief division ratio is 13 */
615 IfxMsc_NDividerDownstream_14, /**< \brief division ratio is 14 */
616 IfxMsc_NDividerDownstream_15, /**< \brief division ratio is 15 */
617 IfxMsc_NDividerDownstream_16 /**< \brief division ratio is 16 */
618 } IfxMsc_NDividerDownstream;
619
620 /** \brief Asynchronous Block Configuration Register - Overflow Interrupt Enable\n
621 * Definition in Ifx_MSC.ABC.B.OIE
622 */
623 typedef enum
624 {
625 IfxMsc_OverflowInterrupt_disabled = 0, /**< \brief Disables the path of the overflow interrupt towards the interrupt node */
626 IfxMsc_OverflowInterrupt_enabled = 1 /**< \brief Enables the path of the overflow interrupt towards the interrupt node */
627 } IfxMsc_OverflowInterrupt;
628
629 /** \brief Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer\n
630 * Definition in Ifx_MSC.ABC.B.OIP
631 */
632 typedef enum
633 {
634 IfxMsc_OverflowInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
635 IfxMsc_OverflowInterruptNode_SR1, /**< \brief Service request output SR1 selected */
636 IfxMsc_OverflowInterruptNode_SR2, /**< \brief Service request output SR2 selected */
637 IfxMsc_OverflowInterruptNode_SR3, /**< \brief Service request output SR3 selected */
638 IfxMsc_OverflowInterruptNode_SR4 /**< \brief Service request output SR4 selected */
639 } IfxMsc_OverflowInterruptNode;
640
641 /** \brief Parity Mode\n
642 * Definition in Ifx_MSC.USR.B.PCT
643 */
644 typedef enum
645 {
646 IfxMsc_Parity_even = 0, /**< \brief Even Parity */
647 IfxMsc_Parity_odd = 1 /**< \brief Odd Parity */
648 } IfxMsc_Parity;
649
650 /** \brief Downstream Status Register - Number Of Passive Time Frames\n
651 * Definition in Ifx_MSC.DSS.B.NPTF
652 */
653 typedef enum
654 {
655 IfxMsc_PassiveTimeFrameCount_0 = 0, /**< \brief No Passive time frames inserted */
656 IfxMsc_PassiveTimeFrameCount_1 = 1, /**< \brief 1 Passive time frames inserted */
657 IfxMsc_PassiveTimeFrameCount_2, /**< \brief 2 Passive time frames inserted */
658 IfxMsc_PassiveTimeFrameCount_3, /**< \brief 3 Passive time frames inserted */
659 IfxMsc_PassiveTimeFrameCount_4, /**< \brief 4 Passive time frames inserted */
660 IfxMsc_PassiveTimeFrameCount_5, /**< \brief 5 Passive time frames inserted */
661 IfxMsc_PassiveTimeFrameCount_6, /**< \brief 6 Passive time frames inserted */
662 IfxMsc_PassiveTimeFrameCount_7, /**< \brief 7 Passive time frames inserted */
663 IfxMsc_PassiveTimeFrameCount_8, /**< \brief 8 Passive time frames inserted */
664 IfxMsc_PassiveTimeFrameCount_9, /**< \brief 9 Passive time frames inserted */
665 IfxMsc_PassiveTimeFrameCount_10, /**< \brief 10 Passive time frames inserted */
666 IfxMsc_PassiveTimeFrameCount_11, /**< \brief 11 Passive time frames inserted */
667 IfxMsc_PassiveTimeFrameCount_12, /**< \brief 12 Passive time frames inserted */
668 IfxMsc_PassiveTimeFrameCount_13, /**< \brief 13 Passive time frames inserted */
669 IfxMsc_PassiveTimeFrameCount_14, /**< \brief 14 Passive time frames inserted */
670 IfxMsc_PassiveTimeFrameCount_15 /**< \brief 15 Passive time frames inserted */
671 } IfxMsc_PassiveTimeFrameCount;
672
673 /** \brief Interrupt Control Register - Receive Data Interrupt Enable\n
674 * Definition in Ifx_MSC.ICR.B.RDIE
675 */
676 typedef enum
677 {
678 IfxMsc_ReceiveDataInterrupt_disabled = 0, /**< \brief Interrupt generation disabled */
679 IfxMsc_ReceiveDataInterrupt_onDataReceive = 1, /**< \brief An interrupt is generated when data is received and written into the upstream data registers */
680 IfxMsc_ReceiveDataInterrupt_onRdieSet = 2, /**< \brief An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H */
681 IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 = 3 /**< \brief An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H */
682 } IfxMsc_ReceiveDataInterrupt;
683
684 /** \brief Interrupt Control Register - Receive Data Interrupt Pointer\n
685 * Definition in Ifx_MSC.ICR.B.RDIP
686 */
687 typedef enum
688 {
689 IfxMsc_ReceiveDataInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
690 IfxMsc_ReceiveDataInterruptNode_SR1, /**< \brief Service request output SR1 selected */
691 IfxMsc_ReceiveDataInterruptNode_SR2, /**< \brief Service request output SR2 selected */
692 IfxMsc_ReceiveDataInterruptNode_SR3 /**< \brief Service request output SR3 selected */
693 } IfxMsc_ReceiveDataInterruptNode;
694
695 /** \brief Output Control Register - SDI Line Polarity\n
696 * Definition in Ifx_MSC.OCR.B.ILP
697 */
698 typedef enum
699 {
700 IfxMsc_SdiLinePolarity_likeSi = 0, /**< \brief SDI and SI signal polarities are identical */
701 IfxMsc_SdiLinePolarity_invertedSi = 1 /**< \brief SDI and SI signal polarities are inverted */
702 } IfxMsc_SdiLinePolarity;
703
704 /** \brief Output Control Register - Serial Data Input Selection\n
705 * Definition in Ifx_MSC.OCR.B.SDISEL
706 */
707 typedef enum
708 {
709 IfxMsc_SerialDataInput_0 = 0, /**< \brief SDI0 is selected for the SDI of the upstream channel */
710 IfxMsc_SerialDataInput_1, /**< \brief SDI1 is selected for the SDI of the upstream channel */
711 IfxMsc_SerialDataInput_2, /**< \brief SDI2 is selected for the SDI of the upstream channel */
712 IfxMsc_SerialDataInput_3, /**< \brief SDI3 is selected for the SDI of the upstream channel */
713 IfxMsc_SerialDataInput_4, /**< \brief SDI4 is selected for the SDI of the upstream channel */
714 IfxMsc_SerialDataInput_5, /**< \brief SDI5 is selected for the SDI of the upstream channel */
715 IfxMsc_SerialDataInput_6, /**< \brief SDI6 is selected for the SDI of the upstream channel */
716 IfxMsc_SerialDataInput_7 /**< \brief SDI7 is selected for the SDI of the upstream channel */
717 } IfxMsc_SerialDataInput;
718
719 /** \brief Service Request Delay\n
720 * Definition in Ifx_MSC.USR.B.SRDC
721 */
722 typedef enum
723 {
724 IfxMsc_ServiceRequestDelay_noDelay = 0, /**< \brief No Delay */
725 IfxMsc_ServiceRequestDelay_1bit = 1 /**< \brief Delay of 1 bit time */
726 } IfxMsc_ServiceRequestDelay;
727
728 /** \brief Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock\n
729 * Definition in Ifx_MSC.ABC.B.LOW and Ifx_MSC.ABC.B.HIGH
730 */
731 typedef enum
732 {
733 IfxMsc_ShiftClockPhaseDuration_1 = 0, /**< \brief Duration in periods of f_A is 1 */
734 IfxMsc_ShiftClockPhaseDuration_2, /**< \brief Duration in periods of f_A is 2 */
735 IfxMsc_ShiftClockPhaseDuration_3, /**< \brief Duration in periods of f_A is 3 */
736 IfxMsc_ShiftClockPhaseDuration_4, /**< \brief Duration in periods of f_A is 4 */
737 IfxMsc_ShiftClockPhaseDuration_5, /**< \brief Duration in periods of f_A is 5 */
738 IfxMsc_ShiftClockPhaseDuration_6, /**< \brief Duration in periods of f_A is 6 */
739 IfxMsc_ShiftClockPhaseDuration_7, /**< \brief Duration in periods of f_A is 7 */
740 IfxMsc_ShiftClockPhaseDuration_8, /**< \brief Duration in periods of f_A is 8 */
741 IfxMsc_ShiftClockPhaseDuration_9, /**< \brief Duration in periods of f_A is 9 */
742 IfxMsc_ShiftClockPhaseDuration_10, /**< \brief Duration in periods of f_A is 10 */
743 IfxMsc_ShiftClockPhaseDuration_11, /**< \brief Duration in periods of f_A is 11 */
744 IfxMsc_ShiftClockPhaseDuration_12, /**< \brief Duration in periods of f_A is 12 */
745 IfxMsc_ShiftClockPhaseDuration_13, /**< \brief Duration in periods of f_A is 13 */
746 IfxMsc_ShiftClockPhaseDuration_14, /**< \brief Duration in periods of f_A is 14 */
747 IfxMsc_ShiftClockPhaseDuration_15, /**< \brief Duration in periods of f_A is 15 */
748 IfxMsc_ShiftClockPhaseDuration_16 /**< \brief Duration in periods of f_A is 16 */
749 } IfxMsc_ShiftClockPhaseDuration;
750
751 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
752 * Definition in Ifx_MSC.CLC.B.EDIS
753 */
754 typedef enum
755 {
756 IfxMsc_SleepMode_enable = 0, /**< \brief enables sleep mode */
757 IfxMsc_SleepMode_disable = 1 /**< \brief disables sleep mode */
758 } IfxMsc_SleepMode;
759
760 /** \brief Output Control Register - SOP Line Polarity\n
761 * Definition in Ifx_MSC.OCR.B.SLP
762 */
763 typedef enum
764 {
765 IfxMsc_SoLinePolarity_nonInverted = 0, /**< \brief SOP and SO polarity is identical */
766 IfxMsc_SoLinePolarity_inverted = 1 /**< \brief SOP and SO polarity is inverted */
767 } IfxMsc_SoLinePolarity;
768
769 /** \brief Downstream Select Data Source Low Register - Select Source for - SRL and SRHNumber Of Passive Time Frames\n
770 * Definition in Ifx_MSC.DSDSL and Ifx_MSC.DSDSH
771 */
772 typedef enum
773 {
774 IfxMsc_Source_downstreamDataRegister = 0, /**< \brief SRx[16] is taken from data Register DD.DDL[xx] */
775 IfxMsc_Source_alternateInputLine = 2, /**< \brief SRx[16] is taken from ALTINL input line */
776 IfxMsc_Source_alternateInputLineInverted = 3 /**< \brief SRx[16] is taken from ALTINL input line in inverted state */
777 } IfxMsc_Source;
778
779 /** \brief OCDS Suspend Control (OCDS.SUS)
780 */
781 typedef enum
782 {
783 IfxMsc_SuspendMode_none = 0, /**< \brief No suspend */
784 IfxMsc_SuspendMode_hard = 1, /**< \brief Hard Suspend */
785 IfxMsc_SuspendMode_soft = 2 /**< \brief Soft Suspend */
786 } IfxMsc_SuspendMode;
787
788 /** \brief Msc Targets - use as chip enable selection for ENH, ENL and ENC
789 */
790 typedef enum
791 {
792 IfxMsc_Target_en0 = 0, /**< \brief Target EN0 */
793 IfxMsc_Target_en1, /**< \brief Target EN1 */
794 IfxMsc_Target_en2, /**< \brief Target EN2 */
795 IfxMsc_Target_en3 /**< \brief Target EN3 */
796 } IfxMsc_Target;
797
798 /** \brief Interrupt Control Register - Time Frame Interrupt Enable\n
799 * Definition in Ifx_MSC.ICR.B.TFIE
800 */
801 typedef enum
802 {
803 IfxMsc_TimeFrameInterrupt_disabled = 0, /**< \brief Interrupt generation disabled */
804 IfxMsc_TimeFrameInterrupt_enabled = 1 /**< \brief Interrupt generation enabled */
805 } IfxMsc_TimeFrameInterrupt;
806
807 /** \brief Interrupt Control Register - Time Frame Interrupt Pointer\n
808 * Definition in Ifx_MSC.ICR.B.TFIP
809 */
810 typedef enum
811 {
812 IfxMsc_TimeFrameInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
813 IfxMsc_TimeFrameInterruptNode_SR1, /**< \brief Service request output SR1 selected */
814 IfxMsc_TimeFrameInterruptNode_SR2, /**< \brief Service request output SR2 selected */
815 IfxMsc_TimeFrameInterruptNode_SR3 /**< \brief Service request output SR3 selected */
816 } IfxMsc_TimeFrameInterruptNode;
817
818 /** \brief Downstream Channel Transmission Mode\n
819 * Definition in Ifx_MSC.DSC.B.TM
820 */
821 typedef enum
822 {
823 IfxMsc_TransmissionMode_triggered = 0, /**< \brief Triggered Mode */
824 IfxMsc_TransmissionMode_dataRepetition = 1 /**< \brief Data Repetition Mode */
825 } IfxMsc_TransmissionMode;
826
827 /** \brief Asynchronous Block Configuration Register - Underflow Interrupt Enable\n
828 * Definition in Ifx_MSC.ABC.B.UIE
829 */
830 typedef enum
831 {
832 IfxMsc_UnderflowInterrupt_disabled = 0, /**< \brief Disables the path of the Underflow interrupt towards the interrupt node */
833 IfxMsc_UnderflowInterrupt_enabled = 1 /**< \brief Enables the path of the Underflow interrupt towards the interrupt node */
834 } IfxMsc_UnderflowInterrupt;
835
836 /** \brief Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer\n
837 * Definition in Ifx_MSC.ABC.B.UIP
838 */
839 typedef enum
840 {
841 IfxMsc_UnderflowInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
842 IfxMsc_UnderflowInterruptNode_SR1, /**< \brief Service request output SR1 selected */
843 IfxMsc_UnderflowInterruptNode_SR2, /**< \brief Service request output SR2 selected */
844 IfxMsc_UnderflowInterruptNode_SR3, /**< \brief Service request output SR3 selected */
845 IfxMsc_UnderflowInterruptNode_SR4 /**< \brief Service request output SR4 selected */
846 } IfxMsc_UnderflowInterruptNode;
847
848 /** \brief Channel Frame Type\n
849 * Definition in Ifx_MSC.USR.B.UFT
850 */
851 typedef enum
852 {
853 IfxMsc_UpstreamChannelFrameType_12bit = 0, /**< \brief 12-bit Upstream frame selected */
854 IfxMsc_UpstreamChannelFrameType_16bit = 1 /**< \brief 16-bit Upstream frame selected */
855 } IfxMsc_UpstreamChannelFrameType;
856
857 /** \brief Upstream Receiving Rate\n
858 * Definition in Ifx_MSC.USR.B.URR
859 */
860 typedef enum
861 {
862 IfxMsc_UpstreamChannelReceivingRate_disabled = 0, /**< \brief Disabled */
863 IfxMsc_UpstreamChannelReceivingRate_4 = 1, /**< \brief Baud rate = f_MSC / 4 */
864 IfxMsc_UpstreamChannelReceivingRate_8 = 2, /**< \brief Baud rate = f_MSC / 8 */
865 IfxMsc_UpstreamChannelReceivingRate_16 = 3, /**< \brief Baud rate = f_MSC / 16 */
866 IfxMsc_UpstreamChannelReceivingRate_32 = 4, /**< \brief Baud rate = f_MSC / 32 */
867 IfxMsc_UpstreamChannelReceivingRate_64 = 5, /**< \brief Baud rate = f_MSC / 64 */
868 IfxMsc_UpstreamChannelReceivingRate_128 = 6, /**< \brief Baud rate = f_MSC / 128 */
869 IfxMsc_UpstreamChannelReceivingRate_256 = 7 /**< \brief Baud rate = f_MSC / 256 */
870 } IfxMsc_UpstreamChannelReceivingRate;
871
872 /** \brief Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable\n
873 * Definition in Ifx_MSC.USCE.B.USTOEN
874 */
875 typedef enum
876 {
877 IfxMsc_UpstreamTimeoutInterrupt_disabled = 0, /**< \brief Upstream Timeout Interrupt Disabled */
878 IfxMsc_UpstreamTimeoutInterrupt_enabled = 1 /**< \brief Upstream Timeout Interrupt Enabled */
879 } IfxMsc_UpstreamTimeoutInterrupt;
880
881 /** \brief Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer\n
882 * Definition in Ifx_MSC.USCE.B.USTOIP
883 */
884 typedef enum
885 {
886 IfxMsc_UpstreamTimeoutInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
887 IfxMsc_UpstreamTimeoutInterruptNode_SR1, /**< \brief Service request output SR1 selected */
888 IfxMsc_UpstreamTimeoutInterruptNode_SR2, /**< \brief Service request output SR2 selected */
889 IfxMsc_UpstreamTimeoutInterruptNode_SR3, /**< \brief Service request output SR3 selected */
890 IfxMsc_UpstreamTimeoutInterruptNode_SR4 /**< \brief Service request output SR4 selected */
891 } IfxMsc_UpstreamTimeoutInterruptNode;
892
893 /** \brief Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler\n
894 * Definition in Ifx_MSC.USCE.B.USTOPRE
895 */
896 typedef enum
897 {
898 IfxMsc_UpstreamTimeoutPrescaler_1 = 0, /**< \brief Prescale value 1 for the upstream time-out limit */
899 IfxMsc_UpstreamTimeoutPrescaler_2 = 1, /**< \brief Prescale value 2 for the upstream time-out limit */
900 IfxMsc_UpstreamTimeoutPrescaler_4 = 2, /**< \brief Prescale value 4 for the upstream time-out limit */
901 IfxMsc_UpstreamTimeoutPrescaler_8 = 3, /**< \brief Prescale value 8 for the upstream time-out limit */
902 IfxMsc_UpstreamTimeoutPrescaler_16 = 4, /**< \brief Prescale value 16 for the upstream time-out limit */
903 IfxMsc_UpstreamTimeoutPrescaler_32 = 5, /**< \brief Prescale value 32 for the upstream time-out limit */
904 IfxMsc_UpstreamTimeoutPrescaler_64 = 6, /**< \brief Prescale value 64 for the upstream time-out limit */
905 IfxMsc_UpstreamTimeoutPrescaler_128 = 7, /**< \brief Prescale value 128 for the upstream time-out limit */
906 IfxMsc_UpstreamTimeoutPrescaler_256 = 8, /**< \brief Prescale value 256 for the upstream time-out limit */
907 IfxMsc_UpstreamTimeoutPrescaler_512 = 9, /**< \brief Prescale value 512 for the upstream time-out limit */
908 IfxMsc_UpstreamTimeoutPrescaler_1024 = 10, /**< \brief Prescale value 1024 for the upstream time-out limit */
909 IfxMsc_UpstreamTimeoutPrescaler_2048 = 11, /**< \brief Prescale value 2048 for the upstream time-out limit */
910 IfxMsc_UpstreamTimeoutPrescaler_4096 = 12, /**< \brief Prescale value 4096 for the upstream time-out limit */
911 IfxMsc_UpstreamTimeoutPrescaler_8192 = 13, /**< \brief Prescale value 8192 for the upstream time-out limit */
912 IfxMsc_UpstreamTimeoutPrescaler_16384 = 14, /**< \brief Prescale value 16384 for the upstream time-out limit */
913 IfxMsc_UpstreamTimeoutPrescaler_32768 = 15 /**< \brief Prescale value 32768 for the upstream time-out limit */
914 } IfxMsc_UpstreamTimeoutPrescaler;
915
916 /** \brief Upstream Control Enhanced Register 1 - Upstream Timeout Value\n
917 * Definition in Ifx_MSC.USCE.B.USTOVAL
918 */
919 typedef enum
920 {
921 IfxMsc_UpstreamTimeoutValue_1 = 0, /**< \brief Upstream timeout value for the N-Divider */
922 IfxMsc_UpstreamTimeoutValue_2, /**< \brief Upstream timeout value for the N-Divider */
923 IfxMsc_UpstreamTimeoutValue_3, /**< \brief Upstream timeout value for the N-Divider */
924 IfxMsc_UpstreamTimeoutValue_4, /**< \brief Upstream timeout value for the N-Divider */
925 IfxMsc_UpstreamTimeoutValue_5, /**< \brief Upstream timeout value for the N-Divider */
926 IfxMsc_UpstreamTimeoutValue_6, /**< \brief Upstream timeout value for the N-Divider */
927 IfxMsc_UpstreamTimeoutValue_7, /**< \brief Upstream timeout value for the N-Divider */
928 IfxMsc_UpstreamTimeoutValue_8, /**< \brief Upstream timeout value for the N-Divider */
929 IfxMsc_UpstreamTimeoutValue_9, /**< \brief Upstream timeout value for the N-Divider */
930 IfxMsc_UpstreamTimeoutValue_10, /**< \brief Upstream timeout value for the N-Divider */
931 IfxMsc_UpstreamTimeoutValue_11, /**< \brief Upstream timeout value for the N-Divider */
932 IfxMsc_UpstreamTimeoutValue_12, /**< \brief Upstream timeout value for the N-Divider */
933 IfxMsc_UpstreamTimeoutValue_13, /**< \brief Upstream timeout value for the N-Divider */
934 IfxMsc_UpstreamTimeoutValue_14, /**< \brief Upstream timeout value for the N-Divider */
935 IfxMsc_UpstreamTimeoutValue_15, /**< \brief Upstream timeout value for the N-Divider */
936 IfxMsc_UpstreamTimeoutValue_16 /**< \brief Upstream timeout value for the N-Divider */
937 } IfxMsc_UpstreamTimeoutValue;
938
939 /** \} */
940
941 /** \addtogroup IfxLld_Msc_Std_Config_Flags
942 * \{ */
943
944 /******************************************************************************/
945 /*-------------------------Inline Function Prototypes-------------------------*/
946 /******************************************************************************/
947
948 /** \brief Clear ABRA overflow flag
949 * \param msc pointer to the base of MSC registers
950 * \return None
951 */
952 IFX_INLINE void IfxMsc_clearAbraOverflowFlag(Ifx_MSC *msc);
953
954 /** \brief Clear ABRA underflow flag
955 * \param msc pointer to the base of MSC registers
956 * \return None
957 */
958 IFX_INLINE void IfxMsc_clearAbraUnderflowFlag(Ifx_MSC *msc);
959
960 /** \brief Clear Upstream timeout
961 * \param msc pointer to the base of MSC registers
962 * \return None
963 */
964 IFX_INLINE void IfxMsc_clearUpstreamTimeout(Ifx_MSC *msc);
965
966 /** \brief Clear the valid flag
967 * \param msc pointer to the base of MSC registers
968 * \param upstreamIdx data register ID
969 * \return None
970 */
971 IFX_INLINE void IfxMsc_clearUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx);
972
973 /** \brief Get the status of the valid flag
974 * \param msc pointer to the base of MSC registers
975 * \param upstreamIdx data register ID
976 * \return Status TRUE or FALSE
977 */
978 IFX_INLINE boolean IfxMsc_getUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx);
979
980 /** \} */
981
982 /** \addtogroup IfxLld_Msc_Std_Set_Command_Target
983 * \{ */
984
985 /******************************************************************************/
986 /*-------------------------Inline Function Prototypes-------------------------*/
987 /******************************************************************************/
988
989 /** \brief Select the target for command phase
990 * \param msc pointer to the base of MSC registers
991 * \param enX Target to be selected
992 * \return None
993 */
994 IFX_INLINE void IfxMsc_setCommandTarget(Ifx_MSC *msc, IfxMsc_Target enX);
995
996 /** \} */
997
998 /** \addtogroup IfxLld_Msc_Std_Set_Data
999 * \{ */
1000
1001 /******************************************************************************/
1002 /*-------------------------Inline Function Prototypes-------------------------*/
1003 /******************************************************************************/
1004
1005 /** \brief Select the target for data high phase
1006 * \param msc pointer to the base of MSC registers
1007 * \param enX Target to be selected
1008 * \return None
1009 */
1010 IFX_INLINE void IfxMsc_setDataHighTarget(Ifx_MSC *msc, IfxMsc_Target enX);
1011
1012 /** \brief Select the target for data low phase
1013 * \param msc pointer to the base of MSC registers
1014 * \param enX Target to be selected
1015 * \return None
1016 */
1017 IFX_INLINE void IfxMsc_setDataLowTarget(Ifx_MSC *msc, IfxMsc_Target enX);
1018
1019 /** \} */
1020
1021 /** \addtogroup IfxLld_Msc_Std_Get_Data
1022 * \{ */
1023
1024 /******************************************************************************/
1025 /*-------------------------Inline Function Prototypes-------------------------*/
1026 /******************************************************************************/
1027
1028 /** \brief Get the upstream data from upstream data register
1029 * \param msc pointer to the base of MSC registers
1030 * \param upstreamIdx Upstream data register ID
1031 * \return Recevived data
1032 */
1033 IFX_INLINE uint16 IfxMsc_getData(Ifx_MSC *msc, uint8 upstreamIdx);
1034
1035 /** \brief Get the selected target during high phase
1036 * \param msc pointer to the base of MSC registers
1037 * \return Selected target
1038 */
1039 IFX_INLINE IfxMsc_Target IfxMsc_getDataHighTarget(Ifx_MSC *msc);
1040
1041 /** \brief Get the selected target during low phase
1042 * \param msc pointer to the base of MSC registers
1043 * \return Selected target
1044 */
1045 IFX_INLINE IfxMsc_Target IfxMsc_getDataLowTarget(Ifx_MSC *msc);
1046
1047 /** \} */
1048
1049 /** \addtogroup IfxLld_Msc_Std_Enable_Module
1050 * \{ */
1051
1052 /******************************************************************************/
1053 /*-------------------------Global Function Prototypes-------------------------*/
1054 /******************************************************************************/
1055
1056 /** \brief Disable MSC kernel
1057 * \param msc pointer to the base of MSC registers
1058 * \return None
1059 */
1060 IFX_EXTERN void IfxMsc_disableModule(Ifx_MSC *msc);
1061
1062 /** \brief Enable MSC kernel
1063 * \param msc pointer to the base of MSC registers
1064 * \return None
1065 */
1066 IFX_EXTERN void IfxMsc_enableModule(Ifx_MSC *msc);
1067
1068 /** \} */
1069
1070 /** \addtogroup IfxLld_Msc_Std_Reset_Module
1071 * \{ */
1072
1073 /******************************************************************************/
1074 /*-------------------------Global Function Prototypes-------------------------*/
1075 /******************************************************************************/
1076
1077 /** \brief Clear reset bit of MSC kernel
1078 * \param msc pointer to the base of MSC registers
1079 * \return None
1080 */
1081 IFX_EXTERN void IfxMsc_clearReset(Ifx_MSC *msc);
1082
1083 /** \brief Reset MSC kernel
1084 * \param msc pointer to the base of MSC registers
1085 * \return None
1086 */
1087 IFX_EXTERN void IfxMsc_resetModule(Ifx_MSC *msc);
1088
1089 /** \} */
1090
1091 /** \addtogroup IfxLld_Msc_Std_Baud_Calculator
1092 * \{ */
1093
1094 /******************************************************************************/
1095 /*-------------------------Global Function Prototypes-------------------------*/
1096 /******************************************************************************/
1097
1098 /** \brief Get the NDD value for the supplied baud rate when when ABRA block is enabled
1099 * \param baud Required baud rate
1100 * \return NDD value
1101 */
1102 IFX_EXTERN uint32 IfxMsc_downstreamAbraBaudCalculator(uint32 baud);
1103
1104 /** \brief Get the step value for the supplied baud rate when divider mode is fractional
1105 * \param msc pointer to the base of MSC registers
1106 * \param baud Required baud rate
1107 * \return Step value
1108 */
1109 IFX_EXTERN uint64 IfxMsc_upstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud);
1110
1111 /** \brief Get the step value for the supplied baud rate when divider mode is normal
1112 * \param msc pointer to the base of MSC registers
1113 * \param baud Required baud rate
1114 * \return Step value
1115 */
1116 IFX_EXTERN uint32 IfxMsc_upstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud);
1117
1118 /** \} */
1119
1120 /** \addtogroup IfxLld_Msc_Std_IO
1121 * \{ */
1122
1123 /******************************************************************************/
1124 /*-------------------------Inline Function Prototypes-------------------------*/
1125 /******************************************************************************/
1126
1127 /** \brief Initializes a EN output
1128 * \param en the EN Pin which should be configured
1129 * \param pinMode the pin output mode which should be configured
1130 * \param padDriver the pad driver mode which should be configured
1131 * \return None
1132 */
1133 IFX_INLINE void IfxMsc_initEnPin(const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
1134
1135 /** \brief Initializes a FCLN output
1136 * \param fcln the FCLN Pin which should be configured
1137 * \param pinMode the pin output mode which should be configured
1138 * \param padDriver the pad driver mode which should be configured
1139 * \return None
1140 */
1141 IFX_INLINE void IfxMsc_initFclnPin(const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
1142
1143 /** \brief Initializes a FCLP output
1144 * \param fclp the FCLP Pin which should be configured
1145 * \param pinMode the pin output mode which should be configured
1146 * \param padDriver the pad driver mode which should be configured
1147 * \return None
1148 */
1149 IFX_INLINE void IfxMsc_initFclpPin(const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
1150
1151 /** \brief Initializes a INJ input
1152 * \param inj the INJ Pin which should be configured
1153 * \param pinMode the pin input mode which should be configured
1154 * \param padDriver the pad driver mode which should be configured
1155 * \return None
1156 */
1157 IFX_INLINE void IfxMsc_initInjPin(const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
1158
1159 /** \brief Initializes a SDI input
1160 * \param sdi the SDI Pin which should be configured
1161 * \param pinMode the pin input mode which should be configured
1162 * \param padDriver the pad driver mode which should be configured
1163 * \return None
1164 */
1165 IFX_INLINE void IfxMsc_initSdiPin(const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
1166
1167 /** \brief Initializes a SON output
1168 * \param son the SON Pin which should be configured
1169 * \param pinMode the pin output mode which should be configured
1170 * \param padDriver the pad driver mode which should be configured
1171 * \return None
1172 */
1173 IFX_INLINE void IfxMsc_initSonPin(const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
1174
1175 /** \brief Initializes a SOP output
1176 * \param sop the SOP Pin which should be configured
1177 * \param pinMode the pin output mode which should be configured
1178 * \param padDriver the pad driver mode which should be configured
1179 * \return None
1180 */
1181 IFX_INLINE void IfxMsc_initSopPin(const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
1182
1183 /** \} */
1184
1185 /** \addtogroup IfxLld_Msc_Std_Module
1186 * \{ */
1187
1188 /******************************************************************************/
1189 /*-------------------------Global Function Prototypes-------------------------*/
1190 /******************************************************************************/
1191
1192 /**
1193 * \param msc Resource index of the MSC
1194 * \return MSC module register address
1195 */
1196 IFX_EXTERN Ifx_MSC *IfxMsc_getAddress(IfxMsc_Index msc);
1197
1198 /** \brief API to get the resource index of the MSC specified.
1199 * \param msc Pointer to the MSC HW module (register memory map)
1200 * \return Resource index of the ERAY
1201 */
1202 IFX_EXTERN IfxMsc_Index IfxMsc_getIndex(Ifx_MSC *msc);
1203
1204 /** \} */
1205
1206 /******************************************************************************/
1207 /*-------------------------Inline Function Prototypes-------------------------*/
1208 /******************************************************************************/
1209
1210 /** \brief Clears The Recieve Data Interrupt Flag
1211 * \param msc pointer to the base of MSC registers
1212 * \return None
1213 */
1214 IFX_INLINE void IfxMsc_clearRecieveDataInterruptFlag(Ifx_MSC *msc);
1215
1216 /** \brief Clears the Valid bit
1217 * \param msc pointer to the base of MSC registers
1218 * \param upstreamIdx upstream index
1219 * \return None
1220 */
1221 IFX_INLINE void IfxMsc_clearValidbit(Ifx_MSC *msc, uint8 upstreamIdx);
1222
1223 /** \brief Disables the Upstream Timeout Interrupt
1224 * \param msc pointer to the base of MSC registers
1225 * \return None
1226 */
1227 IFX_INLINE void IfxMsc_disableUpstreamTimeoutInterrupt(Ifx_MSC *msc);
1228
1229 /** \brief Enables the Upstream Timeout Interrupt
1230 * \param msc pointer to the base of MSC registers
1231 * \return None
1232 */
1233 IFX_INLINE void IfxMsc_enableUpstreamTimeoutInterrupt(Ifx_MSC *msc);
1234
1235 /** \brief Returns the value of Asynchronous clock Bypass bit.
1236 * \param msc pointer to the base of MSC registers
1237 * \return Get the value of Asynchronous clock bypass enable bit.
1238 */
1239 IFX_INLINE boolean IfxMsc_getAsyncClockBypass(Ifx_MSC *msc);
1240
1241 /** \brief Returns the value of Down stream extension enable bit.
1242 * \param msc pointer to the base of MSC registers
1243 * \return Get the value of Down stream extension enable bit.
1244 */
1245 IFX_INLINE boolean IfxMsc_getDownStreamExtension(Ifx_MSC *msc);
1246
1247 /** \brief Returns the Recieve DataInterrupt Flag Status
1248 * \param msc pointer to the base of MSC registers
1249 * \return Status
1250 */
1251 IFX_INLINE boolean IfxMsc_getRecieveDataInterruptFlag(Ifx_MSC *msc);
1252
1253 /** \brief Returns the Src pointer for the selected MSC interrupt node
1254 * \param msc pointer to the base of MSC registers
1255 * \param intRequest Interrupt Request
1256 * \return Pointer to SRCR register
1257 */
1258 IFX_INLINE volatile Ifx_SRC_SRCR *IfxMsc_getSrcPointer(Ifx_MSC *msc, IfxMsc_InterruptServiceRequest intRequest);
1259
1260 /** \brief Returns the Upstream Data
1261 * \param msc pointer to the base of MSC registers
1262 * \param upstreamIdx upstream index
1263 * \return Upstream Data
1264 */
1265 IFX_INLINE uint32 IfxMsc_getUpstreamData(Ifx_MSC *msc, uint8 upstreamIdx);
1266
1267 /** \brief Returns the Upstream Parity Error Flag Status
1268 * \param msc pointer to the base of MSC registers
1269 * \param upstreamIdx upstream index
1270 * \return Status
1271 */
1272 IFX_INLINE boolean IfxMsc_getUpstreamParityErrorFlag(Ifx_MSC *msc, uint8 upstreamIdx);
1273
1274 /** \brief Returns Upstream Timeout Flag Status
1275 * \param msc pointer to the base of MSC registers
1276 * \return Status
1277 */
1278 IFX_INLINE boolean IfxMsc_getUpstreamTimeoutFlag(Ifx_MSC *msc);
1279
1280 /** \brief Returns the module's suspend state.
1281 * TRUE :if module is suspended.
1282 * FALSE:if module is not yet suspended.
1283 * \param msc Pointer to MSC module registers
1284 * \return Suspend status (TRUE / FALSE)
1285 */
1286 IFX_INLINE boolean IfxMsc_isModuleSuspended(Ifx_MSC *msc);
1287
1288 /** \brief Set or reset the Asynchronous clock bypass bit.
1289 * \param msc pointer to the base of MSC registers
1290 * \param value Set / reset value.
1291 * \return None
1292 */
1293 IFX_INLINE void IfxMsc_setAsyncClockBypass(Ifx_MSC *msc, boolean value);
1294
1295 /** \brief Sets the Down stream data
1296 * \param msc pointer to the base of MSC registers
1297 * \param data Data
1298 * \return None
1299 */
1300 IFX_INLINE void IfxMsc_setDownStreamData(Ifx_MSC *msc, uint32 data);
1301
1302 /** \brief Set or reset the Down stream extension enable bit.
1303 * \param msc pointer to the base of MSC registers
1304 * \param value Set / reset value.
1305 * \return None
1306 */
1307 IFX_INLINE void IfxMsc_setDownStreamExtension(Ifx_MSC *msc, boolean value);
1308
1309 /** \brief Sets the Down stream Extension data
1310 * \param msc pointer to the base of MSC registers
1311 * \param data Data
1312 * \return None
1313 */
1314 IFX_INLINE void IfxMsc_setDownStreamExtensionData(Ifx_MSC *msc, uint32 data);
1315
1316 /** \brief Sets The Fractional Divider Step
1317 * \param msc pointer to the base of MSC registers
1318 * \param value Value
1319 * \return None
1320 */
1321 IFX_INLINE void IfxMsc_setFractionalDividerStep(Ifx_MSC *msc, uint16 value);
1322
1323 /** \brief Set the required N divider downstream value.
1324 * \param msc pointer to the base of MSC registers
1325 * \param divisionRatio select the required division ratio.
1326 * \return None
1327 */
1328 IFX_INLINE void IfxMsc_setNdividerDownstream(Ifx_MSC *msc, IfxMsc_NDividerDownstream divisionRatio);
1329
1330 /** \brief Sets The Serial Data Input Select
1331 * \param msc pointer to the base of MSC registers
1332 * \param select Serial Data Input Select
1333 * \return None
1334 */
1335 IFX_INLINE void IfxMsc_setSerialDataInputSelect(Ifx_MSC *msc, IfxMsc_SerialDataInput select);
1336
1337 /** \brief Sets the sensitivity of the module to sleep signal
1338 * \param msc pointer to MSC registers
1339 * \param mode mode selection (enable/disable)
1340 * \return None
1341 */
1342 IFX_INLINE void IfxMsc_setSleepMode(Ifx_MSC *msc, IfxMsc_SleepMode mode);
1343
1344 /** \brief Configure the Module to Hard/Soft suspend mode.
1345 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
1346 * \param msc Pointer to MSC module registers
1347 * \param mode Module suspend mode
1348 * \return None
1349 */
1350 IFX_INLINE void IfxMsc_setSuspendMode(Ifx_MSC *msc, IfxMsc_SuspendMode mode);
1351
1352 /** \brief Sets the Transmission Mode
1353 * \param msc pointer to the base of MSC registers
1354 * \param mode mode
1355 * \return None
1356 */
1357 IFX_INLINE void IfxMsc_setTransmissionMode(Ifx_MSC *msc, IfxMsc_TransmissionMode mode);
1358
1359 /** \brief Sets The Upstream Channel Recieve Rate
1360 * \param msc pointer to the base of MSC registers
1361 * \param recieveRate Recieve Rate
1362 * \return None
1363 */
1364 IFX_INLINE void IfxMsc_setUpstreamChannelRecieveRate(Ifx_MSC *msc, IfxMsc_UpstreamChannelReceivingRate recieveRate);
1365
1366 /** \brief Sets The Upstream Timeout
1367 * \param msc pointer to the base of MSC registers
1368 * \param timeoutVal Timeout Value
1369 * \return None
1370 */
1371 IFX_INLINE void IfxMsc_setUpstreamTimeout(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutValue timeoutVal);
1372
1373 /** \brief Sets The Upstream Timeout Prescalar
1374 * \param msc pointer to the base of MSC registers
1375 * \param prescalar prescalar
1376 * \return None
1377 */
1378 IFX_INLINE void IfxMsc_setUpstreamTimeoutPrescalar(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutPrescaler prescalar);
1379
1380 /******************************************************************************/
1381 /*-------------------------Global Function Prototypes-------------------------*/
1382 /******************************************************************************/
1383
1384 /** \brief clear data frame interrupt flag
1385 * \param msc pointer to the base of MSC registers
1386 * \return None
1387 */
1388 IFX_EXTERN void IfxMsc_clearDataFrameInterruptFlag(Ifx_MSC *msc);
1389
1390 /** \brief Get the step value for the supplied baud rate when divider mode is fractional for downstream
1391 * \param msc pointer to the base of MSC registers
1392 * \param baud Required baud rate
1393 * \return Step Value
1394 */
1395 IFX_EXTERN uint64 IfxMsc_downstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud);
1396
1397 /** \brief Get the step value for the supplied baud rate when divider mode is normal for downstream
1398 * \param msc Select DataType Ref
1399 * \param baud Required baud rate
1400 * \return Step value
1401 */
1402 IFX_EXTERN uint32 IfxMsc_downstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud);
1403
1404 /** \brief get the status of the active data frame
1405 * \param msc pointer to the base of MSC registers
1406 * \return Status TRUE or FALSE
1407 */
1408 IFX_EXTERN boolean IfxMsc_getActiveDataFrameStatus(Ifx_MSC *msc);
1409
1410 /** \brief get the status of the data frame interrupt flag
1411 * \param msc pointer to the base of MSC registers
1412 * \return Status TRUE or FALSE
1413 */
1414 IFX_EXTERN boolean IfxMsc_getDataFrameInterruptFlag(Ifx_MSC *msc);
1415
1416 /******************************************************************************/
1417 /*---------------------Inline Function Implementations------------------------*/
1418 /******************************************************************************/
1419
1420 IFX_INLINE void IfxMsc_clearAbraOverflowFlag(Ifx_MSC *msc)
1421 {
1422 /* Overflow Flag Clear */
1423 msc->ABC.B.OFM = 2;
1424 }
1425
1426
1427 IFX_INLINE void IfxMsc_clearAbraUnderflowFlag(Ifx_MSC *msc)
1428 {
1429 /* Underflow Flag Clear */
1430 msc->ABC.B.UFM = 2;
1431 }
1432
1433
1434 IFX_INLINE void IfxMsc_clearRecieveDataInterruptFlag(Ifx_MSC *msc)
1435 {
1436 msc->ISC.B.CURDI = 0x01U;
1437 }
1438
1439
1440 IFX_INLINE void IfxMsc_clearUpstreamTimeout(Ifx_MSC *msc)
1441 {
1442 /* Upstream Timeout Clear */
1443 msc->USCE.B.USTC = 1;
1444 }
1445
1446
1447 IFX_INLINE void IfxMsc_clearUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
1448 {
1449 msc->UD[upstreamIdx].B.C = 1;
1450 }
1451
1452
1453 IFX_INLINE void IfxMsc_clearValidbit(Ifx_MSC *msc, uint8 upstreamIdx)
1454 {
1455 msc->UD[upstreamIdx].B.C = 0x01U;
1456 }
1457
1458
1459 IFX_INLINE void IfxMsc_disableUpstreamTimeoutInterrupt(Ifx_MSC *msc)
1460 {
1461 msc->USCE.B.USTOEN = 0x0U;
1462 }
1463
1464
1465 IFX_INLINE void IfxMsc_enableUpstreamTimeoutInterrupt(Ifx_MSC *msc)
1466 {
1467 msc->USCE.B.USTOEN = 0x1U;
1468 }
1469
1470
1471 IFX_INLINE boolean IfxMsc_getAsyncClockBypass(Ifx_MSC *msc)
1472 {
1473 return msc->ABC.B.ABB;
1474 }
1475
1476
1477 IFX_INLINE uint16 IfxMsc_getData(Ifx_MSC *msc, uint8 upstreamIdx)
1478 {
1479 uint16 data = 0;
1480
1481 data = msc->UD[upstreamIdx].B.DATA;
1482
1483 return data;
1484 }
1485
1486
1487 IFX_INLINE IfxMsc_Target IfxMsc_getDataHighTarget(Ifx_MSC *msc)
1488 {
1489 /* get data high target - en0, en1, en2 or en3 */
1490 return (IfxMsc_Target)msc->OCR.B.CSH;
1491 }
1492
1493
1494 IFX_INLINE IfxMsc_Target IfxMsc_getDataLowTarget(Ifx_MSC *msc)
1495 {
1496 /* get data low target - en0, en1, en2 or en3 */
1497 return (IfxMsc_Target)msc->OCR.B.CSL;
1498 }
1499
1500
1501 IFX_INLINE boolean IfxMsc_getDownStreamExtension(Ifx_MSC *msc)
1502 {
1503 return msc->DSCE.B.EXEN;
1504 }
1505
1506
1507 IFX_INLINE boolean IfxMsc_getRecieveDataInterruptFlag(Ifx_MSC *msc)
1508 {
1509 return msc->ISR.B.URDI;
1510 }
1511
1512
1513 IFX_INLINE volatile Ifx_SRC_SRCR *IfxMsc_getSrcPointer(Ifx_MSC *msc, IfxMsc_InterruptServiceRequest intRequest)
1514 {
1515 IfxMsc_Index mscIndex;
1516 volatile Ifx_SRC_SRCR *src;
1517 mscIndex = IfxMsc_getIndex(msc);
1518
1519 switch (intRequest)
1520 {
1521 case IfxMsc_InterruptServiceRequest_0:
1522 src = &MODULE_SRC.MSC.MSC[mscIndex].SR0;
1523 break;
1524 case IfxMsc_InterruptServiceRequest_1:
1525 src = &MODULE_SRC.MSC.MSC[mscIndex].SR1;
1526 break;
1527 case IfxMsc_InterruptServiceRequest_2:
1528 src = &MODULE_SRC.MSC.MSC[mscIndex].SR2;
1529 break;
1530 case IfxMsc_InterruptServiceRequest_3:
1531 src = &MODULE_SRC.MSC.MSC[mscIndex].SR3;
1532 break;
1533 case IfxMsc_InterruptServiceRequest_4:
1534 src = &MODULE_SRC.MSC.MSC[mscIndex].SR4;
1535 break;
1536 default:
1537 break;
1538 }
1539
1540 return src;
1541 }
1542
1543
1544 IFX_INLINE uint32 IfxMsc_getUpstreamData(Ifx_MSC *msc, uint8 upstreamIdx)
1545 {
1546 return msc->UD[upstreamIdx].U;
1547 }
1548
1549
1550 IFX_INLINE boolean IfxMsc_getUpstreamParityErrorFlag(Ifx_MSC *msc, uint8 upstreamIdx)
1551 {
1552 return msc->UD[upstreamIdx].B.PERR;
1553 }
1554
1555
1556 IFX_INLINE boolean IfxMsc_getUpstreamTimeoutFlag(Ifx_MSC *msc)
1557 {
1558 return msc->USCE.B.USTF;
1559 }
1560
1561
1562 IFX_INLINE boolean IfxMsc_getUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
1563 {
1564 boolean flag = 0;
1565
1566 flag = msc->UD[upstreamIdx].B.V;
1567
1568 return flag;
1569 }
1570
1571
1572 IFX_INLINE void IfxMsc_initEnPin(const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
1573 {
1574 if (en->pin.port != NULL_PTR)
1575 {
1576 IfxPort_setPinModeOutput(en->pin.port, en->pin.pinIndex, pinMode, en->select);
1577 IfxPort_setPinPadDriver(en->pin.port, en->pin.pinIndex, padDriver);
1578 }
1579 }
1580
1581
1582 IFX_INLINE void IfxMsc_initFclnPin(const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
1583 {
1584 if (fcln->pin.port != NULL_PTR)
1585 {
1586 IfxPort_setPinModeOutput(fcln->pin.port, fcln->pin.pinIndex, pinMode, fcln->select);
1587 IfxPort_setPinPadDriver(fcln->pin.port, fcln->pin.pinIndex, padDriver);
1588 }
1589 }
1590
1591
1592 IFX_INLINE void IfxMsc_initFclpPin(const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
1593 {
1594 if (fclp->pin.port != NULL_PTR)
1595 {
1596 IfxPort_setPinModeOutput(fclp->pin.port, fclp->pin.pinIndex, pinMode, fclp->select);
1597 IfxPort_setPinPadDriver(fclp->pin.port, fclp->pin.pinIndex, padDriver);
1598 }
1599 }
1600
1601
1602 IFX_INLINE void IfxMsc_initInjPin(const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
1603 {
1604 if (inj->pin.port != NULL_PTR)
1605 {
1606 IfxPort_setPinModeInput(inj->pin.port, inj->pin.pinIndex, pinMode);
1607 IfxPort_setPinPadDriver(inj->pin.port, inj->pin.pinIndex, padDriver);
1608 }
1609 }
1610
1611
1612 IFX_INLINE void IfxMsc_initSdiPin(const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
1613 {
1614 if (sdi->pin.port != NULL_PTR)
1615 {
1616 IfxPort_setPinModeInput(sdi->pin.port, sdi->pin.pinIndex, pinMode);
1617 IfxPort_setPinPadDriver(sdi->pin.port, sdi->pin.pinIndex, padDriver);
1618 sdi->module->OCR.B.SDISEL = sdi->select;
1619 }
1620 }
1621
1622
1623 IFX_INLINE void IfxMsc_initSonPin(const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
1624 {
1625 if (son->pin.port != NULL_PTR)
1626 {
1627 IfxPort_setPinModeOutput(son->pin.port, son->pin.pinIndex, pinMode, son->select);
1628 IfxPort_setPinPadDriver(son->pin.port, son->pin.pinIndex, padDriver);
1629 }
1630 }
1631
1632
1633 IFX_INLINE void IfxMsc_initSopPin(const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
1634 {
1635 if (sop->pin.port != NULL_PTR)
1636 {
1637 IfxPort_setPinModeOutput(sop->pin.port, sop->pin.pinIndex, pinMode, sop->select);
1638 IfxPort_setPinPadDriver(sop->pin.port, sop->pin.pinIndex, padDriver);
1639 }
1640 }
1641
1642
1643 IFX_INLINE boolean IfxMsc_isModuleSuspended(Ifx_MSC *msc)
1644 {
1645 Ifx_MSC_OCS ocs;
1646
1647 // read the status
1648 ocs.U = msc->OCS.U;
1649
1650 // return the status
1651 return ocs.B.SUSSTA;
1652 }
1653
1654
1655 IFX_INLINE void IfxMsc_setAsyncClockBypass(Ifx_MSC *msc, boolean value)
1656 {
1657 msc->ABC.B.ABB = value;
1658 }
1659
1660
1661 IFX_INLINE void IfxMsc_setCommandTarget(Ifx_MSC *msc, IfxMsc_Target enX)
1662 {
1663 /* Set command target - en0, en1, en2 or en3 */
1664 msc->OCR.B.CSC = enX;
1665 }
1666
1667
1668 IFX_INLINE void IfxMsc_setDataHighTarget(Ifx_MSC *msc, IfxMsc_Target enX)
1669 {
1670 /* Set data high target - en0, en1, en2 or en3 */
1671 msc->OCR.B.CSH = enX;
1672 }
1673
1674
1675 IFX_INLINE void IfxMsc_setDataLowTarget(Ifx_MSC *msc, IfxMsc_Target enX)
1676 {
1677 /* Set data low target - en0, en1, en2 or en3 */
1678 msc->OCR.B.CSL = enX;
1679 }
1680
1681
1682 IFX_INLINE void IfxMsc_setDownStreamData(Ifx_MSC *msc, uint32 data)
1683 {
1684 msc->DD.U = data;
1685 }
1686
1687
1688 IFX_INLINE void IfxMsc_setDownStreamExtension(Ifx_MSC *msc, boolean value)
1689 {
1690 msc->DSCE.B.EXEN = value;
1691 }
1692
1693
1694 IFX_INLINE void IfxMsc_setDownStreamExtensionData(Ifx_MSC *msc, uint32 data)
1695 {
1696 msc->DDE.U = data;
1697 }
1698
1699
1700 IFX_INLINE void IfxMsc_setFractionalDividerStep(Ifx_MSC *msc, uint16 value)
1701 {
1702 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1703 IfxScuWdt_clearCpuEndinit(passwd);
1704
1705 msc->FDR.B.DISCLK = 1; /* Disable MSC clock*/
1706
1707 while (msc->FDR.B.DISCLK != 1)
1708 {}
1709
1710 /* Configure the DIVIDER STEP */
1711 msc->FDR.B.STEP = value;
1712 msc->FDR.B.DISCLK = 0; /* Enable MSC clock */
1713
1714 while (msc->FDR.B.DISCLK != 0)
1715 {}
1716
1717 IfxScuWdt_setCpuEndinit(passwd);
1718 }
1719
1720
1721 IFX_INLINE void IfxMsc_setNdividerDownstream(Ifx_MSC *msc, IfxMsc_NDividerDownstream divisionRatio)
1722 {
1723 msc->DSTE.B.NDD = divisionRatio;
1724 }
1725
1726
1727 IFX_INLINE void IfxMsc_setSerialDataInputSelect(Ifx_MSC *msc, IfxMsc_SerialDataInput select)
1728 {
1729 msc->OCR.B.SDISEL = select;
1730 }
1731
1732
1733 IFX_INLINE void IfxMsc_setSleepMode(Ifx_MSC *msc, IfxMsc_SleepMode mode)
1734 {
1735 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1736 IfxScuWdt_clearCpuEndinit(passwd);
1737 msc->CLC.B.EDIS = mode;
1738 IfxScuWdt_setCpuEndinit(passwd);
1739 }
1740
1741
1742 IFX_INLINE void IfxMsc_setSuspendMode(Ifx_MSC *msc, IfxMsc_SuspendMode mode)
1743 {
1744 Ifx_MSC_OCS ocs;
1745
1746 // remove protection and configure the suspend mode.
1747 ocs.B.SUS_P = 1;
1748 ocs.B.SUS = mode;
1749 msc->OCS.U = ocs.U;
1750 }
1751
1752
1753 IFX_INLINE void IfxMsc_setTransmissionMode(Ifx_MSC *msc, IfxMsc_TransmissionMode mode)
1754 {
1755 msc->DSC.B.TM = mode;
1756 }
1757
1758
1759 IFX_INLINE void IfxMsc_setUpstreamChannelRecieveRate(Ifx_MSC *msc, IfxMsc_UpstreamChannelReceivingRate recieveRate)
1760 {
1761 msc->USR.B.URR = recieveRate;
1762 }
1763
1764
1765 IFX_INLINE void IfxMsc_setUpstreamTimeout(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutValue timeoutVal)
1766 {
1767 msc->USCE.B.USTOVAL = timeoutVal;
1768 }
1769
1770
1771 IFX_INLINE void IfxMsc_setUpstreamTimeoutPrescalar(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutPrescaler prescalar)
1772 {
1773 msc->USCE.B.USTOPRE = prescalar;
1774 }
1775
1776
1777 #endif /* IFXMSC_H */
IfxMsc_ControlFrameExtensionPassivePhaseLength_81
Length of Command frames passive phase is 83.
Definition: IfxMsc.h:277
IfxMsc_ExternalBitInjectionPosition_42
Injected external bit is at Position 42 of the data frame.
Definition: IfxMsc.h:493
IfxMsc_UpstreamChannelReceivingRate_256
Baud rate = f_MSC / 256.
Definition: IfxMsc.h:869
IfxMsc_NDividerDownstream_3
division ratio is 3
Definition: IfxMsc.h:604
IfxMsc_CommandFrameLength_21
SRL[15:0] and SRH[4:0] Shifted.
Definition: IfxMsc.h:177
IfxMsc_ShiftClockPhaseDuration_13
Duration in periods of f_A is 13.
Definition: IfxMsc.h:745
IfxMsc_downstreamFractionalBaudCalculator
IFX_EXTERN uint64 IfxMsc_downstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional for downstream...
Definition: IfxMsc.c:99
IfxMsc_NDividerAbra_5
Division ratio is 5.
Definition: IfxMsc.h:591
IfxMsc_isModuleSuspended
IFX_INLINE boolean IfxMsc_isModuleSuspended(Ifx_MSC *msc)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxMsc.h:1643
IfxMsc_Source_alternateInputLineInverted
SRx[16] is taken from ALTINL input line in inverted state.
Definition: IfxMsc.h:776
IfxMsc_ControlFrameExtensionPassivePhaseLength_72
Length of Command frames passive phase is 74.
Definition: IfxMsc.h:268
IfxMsc_Sdi_In
SDI pin mapping structure.
Definition: IfxMsc_PinMap.h:64
IfxMsc_CommandFrameLength_10
SRL[9:0] Shifted.
Definition: IfxMsc.h:166
IfxMsc_ControlFrameExtensionPassivePhaseLength_61
Length of Command frames passive phase is 63.
Definition: IfxMsc.h:257
IfxMsc_ControlFrameExtensionPassivePhaseLength_39
Length of Command frames passive phase is 41.
Definition: IfxMsc.h:235
IfxMsc_ExternalBitInjectionPosition_6
Injected external bit is at Position 6 of the data frame.
Definition: IfxMsc.h:457
IfxMsc_ModuleSuspendRequestBit_noSuspend
OCDS is not suspended.
Definition: IfxMsc.h:568
IfxMsc_ExternalBitInjectionPosition_31
Injected external bit is at Position 31 of the data frame.
Definition: IfxMsc.h:482
IfxMsc_ControlFrameExtensionPassivePhaseLength_27
Length of Command frames passive phase is 29.
Definition: IfxMsc.h:223
IfxMsc_ExternalBitInjectionPosition_35
Injected external bit is at Position 35 of the data frame.
Definition: IfxMsc.h:486
IfxMsc_DataFrameLength_12
SRx[11:0] Shifted.
Definition: IfxMsc.h:375
IfxMsc_TimeFrameInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:814
IfxMsc_UpstreamTimeoutPrescaler_4096
Prescale value 4096 for the upstream time-out limit.
Definition: IfxMsc.h:910
IfxMsc_ExternalBitInjectionPosition_29
Injected external bit is at Position 29 of the data frame.
Definition: IfxMsc.h:480
IfxMsc_UpstreamTimeoutPrescaler_1024
Prescale value 1024 for the upstream time-out limit.
Definition: IfxMsc.h:908
IfxMsc_ControlFrameExtensionPassivePhaseLength_12
Length of Command frames passive phase is 14.
Definition: IfxMsc.h:208
IfxMsc_ExternalBitInjectionPosition_46
Injected external bit is at Position 46 of the data frame.
Definition: IfxMsc.h:497
IfxMsc_ExternalBitInjectionPosition_5
Injected external bit is at Position 5 of the data frame.
Definition: IfxMsc.h:456
IfxMsc_CommandFrameLength_2
SRL[1:0] Shifted.
Definition: IfxMsc.h:158
IfxMsc_clearUpstreamTimeout
IFX_INLINE void IfxMsc_clearUpstreamTimeout(Ifx_MSC *msc)
Clear Upstream timeout.
Definition: IfxMsc.h:1440
IfxMsc_ExternalBitInjectionPosition_54
Injected external bit is at Position 54 of the data frame.
Definition: IfxMsc.h:505
IfxMsc_ExternalBitInjectionPosition_59
Injected external bit is at Position 59 of the data frame.
Definition: IfxMsc.h:510
IfxMsc_DataFrameLength_16
SRx[15:0] Shifted.
Definition: IfxMsc.h:379
IfxMsc_ControlFrameExtensionPassivePhaseLength_67
Length of Command frames passive phase is 69.
Definition: IfxMsc.h:263
IfxMsc_ControlFrameExtensionPassivePhaseLength_22
Length of Command frames passive phase is 24.
Definition: IfxMsc.h:218
IfxMsc_ExternalBitInjectionPosition_2
Injected external bit is at Position 2 of the data frame.
Definition: IfxMsc.h:453
IfxMsc_DataFramePassivePhaseLength_11
Passive phase length is 11 tFCL.
Definition: IfxMsc.h:396
IfxMsc_CommandFrameInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:148
IfxMsc_Index
IfxMsc_Index
List of the available MSC resources.
Definition: IfxMsc_cfg.h:79
IfxMsc_CommandFrameLength_4
SRL[3:0] Shifted.
Definition: IfxMsc.h:160
IfxMsc_ExternalBitInjectionPosition_50
Injected external bit is at Position 50 of the data frame.
Definition: IfxMsc.h:501
IfxMsc_getUpstreamData
IFX_INLINE uint32 IfxMsc_getUpstreamData(Ifx_MSC *msc, uint8 upstreamIdx)
Returns the Upstream Data.
Definition: IfxMsc.h:1544
IfxMsc_DataFramePassivePhaseLength_13
Passive phase length is 13 tFCL.
Definition: IfxMsc.h:398
IfxMsc_ControlFrameExtensionPassivePhaseLength_79
Length of Command frames passive phase is 81.
Definition: IfxMsc.h:275
IfxMsc_ExternalBitInjectionPosition_28
Injected external bit is at Position 28 of the data frame.
Definition: IfxMsc.h:479
IfxMsc_UpstreamTimeoutPrescaler_256
Prescale value 256 for the upstream time-out limit.
Definition: IfxMsc.h:906
IfxMsc_getRecieveDataInterruptFlag
IFX_INLINE boolean IfxMsc_getRecieveDataInterruptFlag(Ifx_MSC *msc)
Returns the Recieve DataInterrupt Flag Status.
Definition: IfxMsc.h:1507
IfxMsc_ExternalSignalInjection
IfxMsc_ExternalSignalInjection
Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal Definition in Ifx_M...
Definition: IfxMsc.h:520
IfxMsc_ExternalBitInjectionPosition_4
Injected external bit is at Position 4 of the data frame.
Definition: IfxMsc.h:455
IfxMsc_ControlFrameExtensionPassivePhaseLength_88
Length of Command frames passive phase is 90.
Definition: IfxMsc.h:284
IfxMsc_ControlFrameExtensionPassivePhaseLength_49
Length of Command frames passive phase is 51.
Definition: IfxMsc.h:245
IfxMsc_setUpstreamChannelRecieveRate
IFX_INLINE void IfxMsc_setUpstreamChannelRecieveRate(Ifx_MSC *msc, IfxMsc_UpstreamChannelReceivingRate recieveRate)
Sets The Upstream Channel Recieve Rate.
Definition: IfxMsc.h:1759
IfxMsc_TimeFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:812
IfxMsc_CommandFrameLength_15
SRL[14:0] Shifted.
Definition: IfxMsc.h:171
IfxMsc_ControlFrameExtensionPassivePhaseLength_2
Length of Command frames passive phase is 4.
Definition: IfxMsc.h:198
IfxMsc_OverflowInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:634
IfxMsc_ControlFrameExtensionPassivePhaseLength_46
Length of Command frames passive phase is 48.
Definition: IfxMsc.h:242
IfxMsc_downstreamAbraBaudCalculator
IFX_EXTERN uint32 IfxMsc_downstreamAbraBaudCalculator(uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled.
Definition: IfxMsc.c:86
IfxMsc_ControlFrameExtensionPassivePhaseLength_9
Length of Command frames passive phase is 11.
Definition: IfxMsc.h:205
IfxMsc_FclLinePolarity_inverted
FCLP signal has inverted FCL signal polarity.
Definition: IfxMsc.h:541
IfxMsc_setDataHighTarget
IFX_INLINE void IfxMsc_setDataHighTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data high phase.
Definition: IfxMsc.h:1668
IfxMsc_ClockSelect_fspb
f_SPB is the clock source for the ABRA block
Definition: IfxMsc.h:117
IfxMsc_InterruptServiceRequest
IfxMsc_InterruptServiceRequest
Interrupt Service Request.
Definition: IfxMsc.h:554
IfxMsc_UpstreamTimeoutValue_2
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:922
IfxMsc_ExternalBitInjectionPosition_27
Injected external bit is at Position 27 of the data frame.
Definition: IfxMsc.h:478
IfxMsc_ControlFrameExtensionPassivePhaseLength_80
Length of Command frames passive phase is 82.
Definition: IfxMsc.h:276
IfxMsc_NDividerAbra_6
Division ratio is 6.
Definition: IfxMsc.h:592
IfxMsc_DataFramePassivePhaseLength_5
Passive phase length is 5 tFCL.
Definition: IfxMsc.h:390
IfxMsc_ReceiveDataInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:691
IfxMsc_ControlFrameExtensionPassivePhaseLength_104
Length of Command frames passive phase is 106.
Definition: IfxMsc.h:300
IfxMsc_ShiftClockPhaseDuration_16
Duration in periods of f_A is 16.
Definition: IfxMsc.h:748
IfxMsc_ReceiveDataInterrupt
IfxMsc_ReceiveDataInterrupt
Interrupt Control Register - Receive Data Interrupt Enable Definition in Ifx_MSC.ICR.B.RDIE.
Definition: IfxMsc.h:676
IfxMsc_CommandFrameLength_27
SRL[15:0] and SRH[10:0] Shifted.
Definition: IfxMsc.h:183
IfxMsc_setUpstreamTimeout
IFX_INLINE void IfxMsc_setUpstreamTimeout(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutValue timeoutVal)
Sets The Upstream Timeout.
Definition: IfxMsc.h:1765
IfxMsc_SdiLinePolarity_likeSi
SDI and SI signal polarities are identical.
Definition: IfxMsc.h:700
IfxMsc_CommandFrameLength_11
SRL[10:0] Shifted.
Definition: IfxMsc.h:167
IfxMsc_Source_alternateInputLine
SRx[16] is taken from ALTINL input line.
Definition: IfxMsc.h:775
IfxMsc_PassiveTimeFrameCount_4
4 Passive time frames inserted
Definition: IfxMsc.h:659
IfxMsc_TimeFrameInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:803
IfxMsc_ExternalBitInjectionPosition_18
Injected external bit is at Position 18 of the data frame.
Definition: IfxMsc.h:469
IfxMsc_ExternalBitInjectionPosition_7
Injected external bit is at Position 7 of the data frame.
Definition: IfxMsc.h:458
IfxMsc_PassiveTimeFrameCount_7
7 Passive time frames inserted
Definition: IfxMsc.h:662
IfxMsc_DataFramePassivePhaseLength_2
Passive phase length is 2 tFCL.
Definition: IfxMsc.h:387
IfxMsc_ExternalBitInjectionPosition_41
Injected external bit is at Position 41 of the data frame.
Definition: IfxMsc.h:492
IfxMsc_setNdividerDownstream
IFX_INLINE void IfxMsc_setNdividerDownstream(Ifx_MSC *msc, IfxMsc_NDividerDownstream divisionRatio)
Set the required N divider downstream value.
Definition: IfxMsc.h:1721
IfxMsc_NDividerDownstream_6
division ratio is 6
Definition: IfxMsc.h:607
IfxMsc_DataFramePassivePhaseLength_25
Passive phase length is 25 tFCL.
Definition: IfxMsc.h:410
IfxMsc_UpstreamTimeoutPrescaler
IfxMsc_UpstreamTimeoutPrescaler
Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler Definition in Ifx_MSC.USCE.B.USTOPRE.
Definition: IfxMsc.h:896
IfxMsc_CommandFrameLength_1
SRL[0] Shifted.
Definition: IfxMsc.h:157
IfxMsc_setDownStreamExtensionData
IFX_INLINE void IfxMsc_setDownStreamExtensionData(Ifx_MSC *msc, uint32 data)
Sets the Down stream Extension data.
Definition: IfxMsc.h:1694
IfxMsc_ControlFrameExtensionPassivePhaseLength_73
Length of Command frames passive phase is 75.
Definition: IfxMsc.h:269
IfxMsc_NDividerDownstream_1
division ratio is 1
Definition: IfxMsc.h:602
IfxMsc_SuspendMode_hard
Hard Suspend.
Definition: IfxMsc.h:784
IfxMsc_ControlFrameExtensionPassivePhaseLength_127
Length of Command frames passive phase is 129.
Definition: IfxMsc.h:323
IfxMsc_ControlFrameExtensionPassivePhaseLength_57
Length of Command frames passive phase is 59.
Definition: IfxMsc.h:253
IfxMsc_UpstreamTimeoutValue_1
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:921
IfxMsc_NDividerDownstream_4
division ratio is 4
Definition: IfxMsc.h:605
IfxMsc_Sdi_In::module
Ifx_MSC * module
Base address.
Definition: IfxMsc_PinMap.h:66
IfxMsc_DataFramePassivePhaseLength_17
Passive phase length is 17 tFCL.
Definition: IfxMsc.h:402
IfxMsc_ControlFrameExtensionPassivePhaseLength_63
Length of Command frames passive phase is 65.
Definition: IfxMsc.h:259
IfxMsc_DataFramePassivePhaseLength_6
Passive phase length is 6 tFCL.
Definition: IfxMsc.h:391
IfxMsc_UpstreamTimeoutValue_12
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:932
IfxMsc_DataFramePassivePhaseLength_22
Passive phase length is 22 tFCL.
Definition: IfxMsc.h:407
IfxMsc_ExternalSignalInjection_disabled
Disables the external signal injection in a data frame.
Definition: IfxMsc.h:522
IfxMsc_ExternalBitInjectionPosition_20
Injected external bit is at Position 20 of the data frame.
Definition: IfxMsc.h:471
IfxMsc_CommandFrameLength_3
SRL[2:0] Shifted.
Definition: IfxMsc.h:159
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxMsc_ControlFrameExtensionPassivePhaseLength_11
Length of Command frames passive phase is 13.
Definition: IfxMsc.h:207
IfxMsc_DataFramePassivePhaseLength_14
Passive phase length is 14 tFCL.
Definition: IfxMsc.h:399
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxMsc_ControlFrameExtensionPassivePhaseLength_25
Length of Command frames passive phase is 27.
Definition: IfxMsc.h:221
IfxMsc_ControlFrameExtensionPassivePhaseLength_125
Length of Command frames passive phase is 127.
Definition: IfxMsc.h:321
IfxMsc_ActivePhaseSelection
IfxMsc_ActivePhaseSelection
Enable SRL/SRH Active Phase Selection Bit Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL.
Definition: IfxMsc.h:87
IfxMsc_ShiftClockPhaseDuration_10
Duration in periods of f_A is 10.
Definition: IfxMsc.h:742
IfxMsc_setCommandTarget
IFX_INLINE void IfxMsc_setCommandTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for command phase.
Definition: IfxMsc.h:1661
IfxMsc_DataFrameLength_14
SRx[13:0] Shifted.
Definition: IfxMsc.h:377
IfxMsc_SuspendMode_soft
Soft Suspend.
Definition: IfxMsc.h:785
IfxMsc_ExternalBitInjectionPosition_12
Injected external bit is at Position 12 of the data frame.
Definition: IfxMsc.h:463
IfxMsc_NDividerDownstream
IfxMsc_NDividerDownstream
Downstream Timing Extension Register - N Divider Downstream Definition in Ifx_MSC.DSTE.B.NDD.
Definition: IfxMsc.h:600
IfxMsc_ControlFrameExtensionPassivePhaseLength_4
Length of Command frames passive phase is 6.
Definition: IfxMsc.h:200
IfxMsc_UpstreamChannelFrameType_12bit
12-bit Upstream frame selected
Definition: IfxMsc.h:853
IfxMsc_setDownStreamData
IFX_INLINE void IfxMsc_setDownStreamData(Ifx_MSC *msc, uint32 data)
Sets the Down stream data.
Definition: IfxMsc.h:1682
IfxMsc_ControlFrameExtensionPassivePhaseLength_98
Length of Command frames passive phase is 100.
Definition: IfxMsc.h:294
IfxMsc_ControlFrameExtensionPassivePhaseLength_0
Length of Command frames passive phase is 2.
Definition: IfxMsc.h:196
IfxMsc_ControlFrameExtensionPassivePhaseLength_100
Length of Command frames passive phase is 102.
Definition: IfxMsc.h:296
IfxMsc_ControlFrameExtensionPassivePhaseLength_103
Length of Command frames passive phase is 105.
Definition: IfxMsc.h:299
IfxMsc_OverflowInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:637
IfxMsc_CommandDataCommandRepetitionMode_enabled
Enables the automatic insertion of data.
Definition: IfxMsc.h:128
IfxMsc_UpstreamTimeoutPrescaler_8192
Prescale value 8192 for the upstream time-out limit.
Definition: IfxMsc.h:911
IfxMsc_ShiftClockPhaseDuration_8
Duration in periods of f_A is 8.
Definition: IfxMsc.h:740
IfxMsc_disableModule
IFX_EXTERN void IfxMsc_disableModule(Ifx_MSC *msc)
Disable MSC kernel.
Definition: IfxMsc.c:76
IfxMsc_getDataFrameInterruptFlag
IFX_EXTERN boolean IfxMsc_getDataFrameInterruptFlag(Ifx_MSC *msc)
get the status of the data frame interrupt flag
Definition: IfxMsc.c:157
IfxMsc_UpstreamTimeoutPrescaler_4
Prescale value 4 for the upstream time-out limit.
Definition: IfxMsc.h:900
IfxMsc_ControlFrameExtensionPassivePhaseLength_93
Length of Command frames passive phase is 95.
Definition: IfxMsc.h:289
IfxMsc_DataFramePassivePhaseLength_26
Passive phase length is 26 tFCL.
Definition: IfxMsc.h:411
IfxMsc_NDividerDownstream_5
division ratio is 5
Definition: IfxMsc.h:606
IfxMsc_ExternalBitInjectionPosition_10
Injected external bit is at Position 10 of the data frame.
Definition: IfxMsc.h:461
IfxMsc_DataFramePassivePhaseLength_3
Passive phase length is 3 tFCL.
Definition: IfxMsc.h:388
IfxMsc_ClockSelect_noClock
no clock source for the ABRA block
Definition: IfxMsc.h:116
IfxMsc_NDividerDownstream_2
division ratio is 2
Definition: IfxMsc.h:603
IfxMsc_NDividerAbra_2
Division ratio is 2.
Definition: IfxMsc.h:588
IfxMsc_ControlFrameExtensionPassivePhaseLength_8
Length of Command frames passive phase is 10.
Definition: IfxMsc.h:204
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxMsc_Parity_odd
Odd Parity.
Definition: IfxMsc.h:647
IfxMsc_DataFrameLength_8
SRx[7:0] Shifted.
Definition: IfxMsc.h:371
IfxMsc_UpstreamChannelReceivingRate_8
Baud rate = f_MSC / 8.
Definition: IfxMsc.h:864
IfxMsc_ExternalBitInjectionPosition_19
Injected external bit is at Position 19 of the data frame.
Definition: IfxMsc.h:470
IfxMsc_UpstreamTimeoutInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:887
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxMsc_setDataLowTarget
IFX_INLINE void IfxMsc_setDataLowTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data low phase.
Definition: IfxMsc.h:1675
IfxMsc_UpstreamTimeoutInterrupt_enabled
Upstream Timeout Interrupt Enabled.
Definition: IfxMsc.h:878
IfxMsc_ExternalSignalInjection_enabled
Enables the external signal injection in a data frame.
Definition: IfxMsc.h:523
IfxMsc_ExternalBitInjectionPosition_15
Injected external bit is at Position 15 of the data frame.
Definition: IfxMsc.h:466
IfxMsc_ControlFrameExtensionPassivePhaseLength_122
Length of Command frames passive phase is 124.
Definition: IfxMsc.h:318
IfxMsc_ControlFrameExtensionPassivePhaseLength_23
Length of Command frames passive phase is 25.
Definition: IfxMsc.h:219
IfxMsc_CommandDataCommandRepetitionMode_disabled
Disables the automatic insertion of data.
Definition: IfxMsc.h:127
IfxMsc_TimeFrameInterrupt
IfxMsc_TimeFrameInterrupt
Interrupt Control Register - Time Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.TFIE.
Definition: IfxMsc.h:801
IfxMsc_UpstreamTimeoutInterrupt
IfxMsc_UpstreamTimeoutInterrupt
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:875
IfxMsc_DataFrameInterrupt
IfxMsc_DataFrameInterrupt
Interrupt Control Register - Data Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.EDIE.
Definition: IfxMsc.h:340
IfxMsc_UpstreamTimeoutPrescaler_512
Prescale value 512 for the upstream time-out limit.
Definition: IfxMsc.h:907
IfxMsc_ShiftClockPhaseDuration_7
Duration in periods of f_A is 7.
Definition: IfxMsc.h:739
IfxMsc_ActivePhaseSelection_none
No selection bit inserted.
Definition: IfxMsc.h:89
IfxMsc_OverflowInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:638
IfxMsc_DataFramePassivePhaseLength_28
Passive phase length is 28 tFCL.
Definition: IfxMsc.h:413
IfxMsc_ControlFrameExtensionPassivePhaseLength_13
Length of Command frames passive phase is 15.
Definition: IfxMsc.h:209
IfxMsc_ControlFrameExtensionPassivePhaseLength_74
Length of Command frames passive phase is 76.
Definition: IfxMsc.h:270
IfxMsc_FclLinePolarity_nonInverted
FCLP and FCL signal polarity is identical.
Definition: IfxMsc.h:540
IfxMsc_ControlFrameExtensionPassivePhaseLength_101
Length of Command frames passive phase is 103.
Definition: IfxMsc.h:297
IfxMsc_ExternalBitInjectionPosition_25
Injected external bit is at Position 25 of the data frame.
Definition: IfxMsc.h:476
IfxMsc_initSopPin
IFX_INLINE void IfxMsc_initSopPin(const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SOP output.
Definition: IfxMsc.h:1633
IfxCpu_Intrinsics.h
IfxMsc_ControlFrameExtensionPassivePhaseLength_65
Length of Command frames passive phase is 67.
Definition: IfxMsc.h:261
IfxMsc_Extension
IfxMsc_Extension
Downstream Control Enhanced Register - Extension Enable Definition in Ifx_MSC.DSCE.B.NDBLE.
Definition: IfxMsc.h:440
IfxMsc_DataFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:352
IfxMsc_AsynchronousBlock
IfxMsc_AsynchronousBlock
Asynchronous Block Configuration Register - Asynchronous Block Bypass Definition in Ifx_MSC...
Definition: IfxMsc.h:96
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxMsc_clearReset
IFX_EXTERN void IfxMsc_clearReset(Ifx_MSC *msc)
Clear reset bit of MSC kernel.
Definition: IfxMsc.c:61
IfxMsc_AsynchronousBlock_bypassed
Asynchronous block and the n-divider of the MSC downstream path are bypassed and are disabled...
Definition: IfxMsc.h:98
IfxMsc_ControlFrameExtensionPassivePhaseLength_60
Length of Command frames passive phase is 62.
Definition: IfxMsc.h:256
IfxMsc_ControlFrameExtensionPassivePhaseLength_14
Length of Command frames passive phase is 16.
Definition: IfxMsc.h:210
IfxMsc_ExternalBitInjectionPosition_37
Injected external bit is at Position 37 of the data frame.
Definition: IfxMsc.h:488
IfxMsc_ControlFrameExtensionPassivePhaseLength_16
Length of Command frames passive phase is 18.
Definition: IfxMsc.h:212
IfxMsc_UpstreamTimeoutValue_16
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:936
IfxMsc_setSuspendMode
IFX_INLINE void IfxMsc_setSuspendMode(Ifx_MSC *msc, IfxMsc_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxMsc.h:1742
IfxMsc_setSerialDataInputSelect
IFX_INLINE void IfxMsc_setSerialDataInputSelect(Ifx_MSC *msc, IfxMsc_SerialDataInput select)
Sets The Serial Data Input Select.
Definition: IfxMsc.h:1727
IfxMsc_Target_en3
Target EN3.
Definition: IfxMsc.h:795
IfxMsc_PassiveTimeFrameCount_0
No Passive time frames inserted.
Definition: IfxMsc.h:655
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxMsc_ControlFrameExtensionPassivePhaseLength_123
Length of Command frames passive phase is 125.
Definition: IfxMsc.h:319
IfxMsc_getAsyncClockBypass
IFX_INLINE boolean IfxMsc_getAsyncClockBypass(Ifx_MSC *msc)
Returns the value of Asynchronous clock Bypass bit.
Definition: IfxMsc.h:1471
IfxMsc_setUpstreamTimeoutPrescalar
IFX_INLINE void IfxMsc_setUpstreamTimeoutPrescalar(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutPrescaler prescalar)
Sets The Upstream Timeout Prescalar.
Definition: IfxMsc.h:1771
IfxMsc_PassiveTimeFrameCount_11
11 Passive time frames inserted
Definition: IfxMsc.h:666
IfxMsc_DataFramePassivePhaseLength_27
Passive phase length is 27 tFCL.
Definition: IfxMsc.h:412
IfxMsc_initSdiPin
IFX_INLINE void IfxMsc_initSdiPin(const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SDI input.
Definition: IfxMsc.h:1612
IfxMsc_TransmissionMode
IfxMsc_TransmissionMode
Downstream Channel Transmission Mode Definition in Ifx_MSC.DSC.B.TM.
Definition: IfxMsc.h:821
IfxMsc_ControlFrameExtensionPassivePhaseLength_118
Length of Command frames passive phase is 120.
Definition: IfxMsc.h:314
IfxMsc_DataFrameLength_13
SRx[12:0] Shifted.
Definition: IfxMsc.h:376
IfxMsc_NDividerDownstream_12
division ratio is 12
Definition: IfxMsc.h:613
IfxMsc_DataFrameLength_6
SRx[5:0] Shifted.
Definition: IfxMsc.h:369
IfxMsc_UpstreamChannelReceivingRate
IfxMsc_UpstreamChannelReceivingRate
Upstream Receiving Rate Definition in Ifx_MSC.USR.B.URR.
Definition: IfxMsc.h:860
IfxMsc_ControlFrameExtensionPassivePhaseLength_18
Length of Command frames passive phase is 20.
Definition: IfxMsc.h:214
IfxMsc_ControlFrameExtensionPassivePhaseLength_53
Length of Command frames passive phase is 55.
Definition: IfxMsc.h:249
IfxMsc_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxMsc_getSrcPointer(Ifx_MSC *msc, IfxMsc_InterruptServiceRequest intRequest)
Returns the Src pointer for the selected MSC interrupt node.
Definition: IfxMsc.h:1513
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
IfxMsc_ChipSelectActiveState_low
EN[3:0] and ENL,ENH,ENC polarities are inverted.
Definition: IfxMsc.h:108
IfxMsc_ControlFrameExtensionPassivePhaseLength_28
Length of Command frames passive phase is 30.
Definition: IfxMsc.h:224
IfxMsc_ExternalBitInjectionPosition_45
Injected external bit is at Position 45 of the data frame.
Definition: IfxMsc.h:496
IfxMsc_OverflowInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:635
IfxMsc_clearAbraOverflowFlag
IFX_INLINE void IfxMsc_clearAbraOverflowFlag(Ifx_MSC *msc)
Clear ABRA overflow flag.
Definition: IfxMsc.h:1420
IfxMsc_SerialDataInput_6
SDI6 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:715
IfxMsc_Target_en2
Target EN2.
Definition: IfxMsc.h:794
IfxMsc_UpstreamChannelFrameType_16bit
16-bit Upstream frame selected
Definition: IfxMsc.h:854
IfxMsc_UpstreamTimeoutValue_14
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:934
IfxMsc_CommandFrameLength_24
SRL[15:0] and SRH[7:0] Shifted.
Definition: IfxMsc.h:180
IfxMsc_AsynchronousBlock_noBypassed
Asynchronous block and the n-divider of the MSC downstream path are active.
Definition: IfxMsc.h:99
IfxMsc_UpstreamTimeoutValue_11
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:931
IfxMsc_EmergencyStop
IfxMsc_EmergencyStop
Emergency Stop Register - Emergency stop feature Enable or Disable - SRL and SRH Definition in Ifx_MS...
Definition: IfxMsc.h:431
IfxMsc_ControlFrameExtensionPassivePhaseLength_55
Length of Command frames passive phase is 57.
Definition: IfxMsc.h:251
IfxMsc_InterruptServiceRequest_1
Interrupt Service Request number1.
Definition: IfxMsc.h:557
IfxMsc_ExternalBitInjectionPosition_34
Injected external bit is at Position 34 of the data frame.
Definition: IfxMsc.h:485
IfxMsc_ExternalBitInjectionPosition_44
Injected external bit is at Position 44 of the data frame.
Definition: IfxMsc.h:495
IfxMsc_CommandFrameLength_29
SRL[15:0] and SRH[12:0] Shifted.
Definition: IfxMsc.h:185
IfxMsc_ControlFrameExtensionPassivePhaseLength_119
Length of Command frames passive phase is 121.
Definition: IfxMsc.h:315
IfxMsc_initInjPin
IFX_INLINE void IfxMsc_initInjPin(const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a INJ input.
Definition: IfxMsc.h:1602
IfxMsc_ControlFrameExtensionPassivePhaseLength_111
Length of Command frames passive phase is 113.
Definition: IfxMsc.h:307
IfxMsc_DataFramePassivePhaseLength_30
Passive phase length is 30 tFCL.
Definition: IfxMsc.h:415
IfxScuWdt.h
SCU basic functionality.
IfxMsc_ControlFrameExtensionPassivePhaseLength_30
Length of Command frames passive phase is 32.
Definition: IfxMsc.h:226
IfxMsc_NDividerAbra_3
Division ratio is 3.
Definition: IfxMsc.h:589
IfxMsc_initFclnPin
IFX_INLINE void IfxMsc_initFclnPin(const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLN output.
Definition: IfxMsc.h:1582
IfxMsc_setSleepMode
IFX_INLINE void IfxMsc_setSleepMode(Ifx_MSC *msc, IfxMsc_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxMsc.h:1733
IfxMsc_ServiceRequestDelay_noDelay
No Delay.
Definition: IfxMsc.h:724
IfxMsc_InterruptServiceRequest_0
Interrupt Service Request number0.
Definition: IfxMsc.h:556
IfxMsc_EmergencyStop_disabled
Emergency stop feature for SRx bit is Disabled.
Definition: IfxMsc.h:433
IfxMsc_ControlFrameExtensionPassivePhaseLength_71
Length of Command frames passive phase is 73.
Definition: IfxMsc.h:267
IfxMsc_PassiveTimeFrameCount_10
10 Passive time frames inserted
Definition: IfxMsc.h:665
IfxMsc_ExternalBitInjectionPosition_62
Injected external bit is at Position 62 of the data frame.
Definition: IfxMsc.h:513
IfxMsc_ExternalBitInjectionPosition_30
Injected external bit is at Position 30 of the data frame.
Definition: IfxMsc.h:481
IfxMsc_ControlFrameExtensionPassivePhaseLength_41
Length of Command frames passive phase is 43.
Definition: IfxMsc.h:237
IfxMsc_ControlFrameExtensionPassivePhaseLength_48
Length of Command frames passive phase is 50.
Definition: IfxMsc.h:244
IfxMsc_clearRecieveDataInterruptFlag
IFX_INLINE void IfxMsc_clearRecieveDataInterruptFlag(Ifx_MSC *msc)
Clears The Recieve Data Interrupt Flag.
Definition: IfxMsc.h:1434
IfxMsc_UnderflowInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:844
IfxMsc_ModuleSuspendRequestBit_hardSuspend
OCDS is Hard suspended. Clock is switched off immediately.
Definition: IfxMsc.h:569
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxMsc_ControlFrameExtensionPassivePhaseLength
IfxMsc_ControlFrameExtensionPassivePhaseLength
Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension Definition in...
Definition: IfxMsc.h:194
IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3
An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H...
Definition: IfxMsc.h:681
IfxMsc_ReceiveDataInterrupt_onDataReceive
An interrupt is generated when data is received and written into the upstream data registers...
Definition: IfxMsc.h:679
IfxMsc_NDividerDownstream_13
division ratio is 13
Definition: IfxMsc.h:614
IfxMsc_ShiftClockPhaseDuration_9
Duration in periods of f_A is 9.
Definition: IfxMsc.h:741
IfxMsc_ControlFrameExtensionPassivePhaseLength_90
Length of Command frames passive phase is 92.
Definition: IfxMsc.h:286
IfxMsc_SerialDataInput_1
SDI1 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:710
IfxMsc_ControlFrameExtensionPassivePhaseLength_26
Length of Command frames passive phase is 28.
Definition: IfxMsc.h:222
IfxMsc_OverflowInterrupt_enabled
Enables the path of the overflow interrupt towards the interrupt node.
Definition: IfxMsc.h:626
IfxMsc_ControlFrameExtensionPassivePhaseLength_7
Length of Command frames passive phase is 9.
Definition: IfxMsc.h:203
IfxMsc_ControlFrameExtensionPassivePhaseLength_43
Length of Command frames passive phase is 45.
Definition: IfxMsc.h:239
IfxMsc_ControlFrameExtensionPassivePhaseLength_124
Length of Command frames passive phase is 126.
Definition: IfxMsc.h:320
IfxMsc_PassiveTimeFrameCount_15
15 Passive time frames inserted
Definition: IfxMsc.h:670
IfxMsc_UpstreamTimeoutValue_15
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:935
IfxMsc_CommandDataCommandRepetitionMode
IfxMsc_CommandDataCommandRepetitionMode
Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode Definition in Ifx...
Definition: IfxMsc.h:125
IfxMsc_MsbBitDataExtension_present
Additional MSB bit is present in the extension of the NDBL/NDBH bit field.
Definition: IfxMsc.h:579
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxMsc_ClockSelect_feray
f_ERAY is the clock source for the ABRA block
Definition: IfxMsc.h:119
IfxMsc_CommandFrameLength_0
No bit shifted.
Definition: IfxMsc.h:156
IfxMsc_getAddress
IFX_EXTERN Ifx_MSC * IfxMsc_getAddress(IfxMsc_Index msc)
Definition: IfxMsc.c:140
IfxMsc_En_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxMsc_PinMap.h:77
IfxMsc_DataFrameInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:353
IfxMsc_DataFramePassivePhaseLength_4
Passive phase length is 4 tFCL.
Definition: IfxMsc.h:389
IfxMsc_UpstreamTimeoutValue_13
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:933
IfxMsc_ControlFrameExtensionPassivePhaseLength_6
Length of Command frames passive phase is 8.
Definition: IfxMsc.h:202
IfxMsc_getDataHighTarget
IFX_INLINE IfxMsc_Target IfxMsc_getDataHighTarget(Ifx_MSC *msc)
Get the selected target during high phase.
Definition: IfxMsc.h:1487
IfxMsc_UpstreamTimeoutInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:889
IfxMsc_setAsyncClockBypass
IFX_INLINE void IfxMsc_setAsyncClockBypass(Ifx_MSC *msc, boolean value)
Set or reset the Asynchronous clock bypass bit.
Definition: IfxMsc.h:1655
IfxMsc_ControlFrameExtensionPassivePhaseLength_10
Length of Command frames passive phase is 12.
Definition: IfxMsc.h:206
IfxMsc_ControlFrameExtensionPassivePhaseLength_35
Length of Command frames passive phase is 37.
Definition: IfxMsc.h:231
IfxMsc_setFractionalDividerStep
IFX_INLINE void IfxMsc_setFractionalDividerStep(Ifx_MSC *msc, uint16 value)
Sets The Fractional Divider Step.
Definition: IfxMsc.h:1700
IfxMsc_DataFrameExtensionPassivePhaseLength_3
3 Additional MSB bits extension of the PPD bit field
Definition: IfxMsc.h:334
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxMsc_ControlFrameExtensionPassivePhaseLength_94
Length of Command frames passive phase is 96.
Definition: IfxMsc.h:290
IfxMsc_ControlFrameExtensionPassivePhaseLength_47
Length of Command frames passive phase is 49.
Definition: IfxMsc.h:243
IfxMsc_ChipSelectActiveState_high
EN[3:0] and ENL,ENH,ENC polarities are identical.
Definition: IfxMsc.h:107
IfxMsc_ReceiveDataInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:690
IfxMsc_ExternalBitInjectionPosition_43
Injected external bit is at Position 43 of the data frame.
Definition: IfxMsc.h:494
IfxMsc_ExternalBitInjectionPosition_24
Injected external bit is at Position 24 of the data frame.
Definition: IfxMsc.h:475
IfxMsc_MsbBitDataExtension
IfxMsc_MsbBitDataExtension
Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/...
Definition: IfxMsc.h:576
IfxMsc_OverflowInterruptNode
IfxMsc_OverflowInterruptNode
Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:632
IfxMsc_getActiveDataFrameStatus
IFX_EXTERN boolean IfxMsc_getActiveDataFrameStatus(Ifx_MSC *msc)
get the status of the active data frame
Definition: IfxMsc.c:134
IfxMsc_ExternalBitInjectionPosition_63
Injected external bit is at Position 63 of the data frame.
Definition: IfxMsc.h:514
IfxMsc_DataFramePassivePhaseLength_15
Passive phase length is 15 tFCL.
Definition: IfxMsc.h:400
IfxMsc_ExternalBitInjectionPosition_57
Injected external bit is at Position 57 of the data frame.
Definition: IfxMsc.h:508
IfxMsc_CommandFrameLength_14
SRL[13:0] Shifted.
Definition: IfxMsc.h:170
IfxMsc_ControlFrameExtensionPassivePhaseLength_120
Length of Command frames passive phase is 122.
Definition: IfxMsc.h:316
IfxMsc_ExternalBitInjectionPosition_22
Injected external bit is at Position 22 of the data frame.
Definition: IfxMsc.h:473
IfxMsc_HardwareClock
IfxMsc_HardwareClock
Enable hardware clock control.
Definition: IfxMsc.h:546
IfxMsc_ControlFrameExtensionPassivePhaseLength_126
Length of Command frames passive phase is 128.
Definition: IfxMsc.h:322
IfxMsc_DataFrameInterrupt_disabled
Interrupt generation Disable.
Definition: IfxMsc.h:342
IfxMsc_ControlFrameExtensionPassivePhaseLength_114
Length of Command frames passive phase is 116.
Definition: IfxMsc.h:310
IfxMsc_DividerMode
IfxMsc_DividerMode
Divider mode.
Definition: IfxMsc.h:422
IfxMsc_NDividerDownstream_14
division ratio is 14
Definition: IfxMsc.h:615
IfxMsc_MsbBitDataExtension_notPresent
Additional MSB bit is not present in the extension of the NDBL/NDBH bit field.
Definition: IfxMsc.h:578
IfxMsc_PassiveTimeFrameCount_12
12 Passive time frames inserted
Definition: IfxMsc.h:667
IfxMsc_PassiveTimeFrameCount_5
5 Passive time frames inserted
Definition: IfxMsc.h:660
IfxMsc_DataFrameExtensionPassivePhaseLength_0
0 Additional MSB bits extension of the PPD bit field
Definition: IfxMsc.h:331
IfxMsc_UpstreamTimeoutValue_9
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:929
IfxMsc_ExternalBitInjectionPosition_33
Injected external bit is at Position 33 of the data frame.
Definition: IfxMsc.h:484
IfxMsc_ControlFrameExtensionPassivePhaseLength_1
Length of Command frames passive phase is 3.
Definition: IfxMsc.h:197
IfxMsc_ExternalBitInjectionPosition_14
Injected external bit is at Position 14 of the data frame.
Definition: IfxMsc.h:465
IfxMsc_UpstreamTimeoutPrescaler_1
Prescale value 1 for the upstream time-out limit.
Definition: IfxMsc.h:898
IfxMsc_ControlFrameExtensionPassivePhaseLength_97
Length of Command frames passive phase is 99.
Definition: IfxMsc.h:293
IfxMsc_PassiveTimeFrameCount_1
1 Passive time frames inserted
Definition: IfxMsc.h:656
IfxMsc_SoLinePolarity
IfxMsc_SoLinePolarity
Output Control Register - SOP Line Polarity Definition in Ifx_MSC.OCR.B.SLP.
Definition: IfxMsc.h:763
IfxMsc_ControlFrameExtensionPassivePhaseLength_58
Length of Command frames passive phase is 60.
Definition: IfxMsc.h:254
IfxMsc_UpstreamTimeoutPrescaler_128
Prescale value 128 for the upstream time-out limit.
Definition: IfxMsc.h:905
IfxMsc_DataFramePassivePhaseLength_21
Passive phase length is 21 tFCL.
Definition: IfxMsc.h:406
IfxMsc_UpstreamTimeoutValue_6
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:926
IfxMsc_CommandFrameLength_7
SRL[6:0] Shifted.
Definition: IfxMsc.h:163
IfxMsc_PassiveTimeFrameCount_8
8 Passive time frames inserted
Definition: IfxMsc.h:663
IfxMsc_NDividerAbra_7
Division ratio is 7.
Definition: IfxMsc.h:593
IfxMsc_ControlFrameExtensionPassivePhaseLength_24
Length of Command frames passive phase is 26.
Definition: IfxMsc.h:220
IfxMsc_DataFrameLength_2
SRx[1:0] Shifted.
Definition: IfxMsc.h:365
IfxMsc_Son_Out
SON pin mapping structure.
Definition: IfxMsc_PinMap.h:105
IfxMsc_UpstreamTimeoutValue_10
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:930
IfxMsc_clearDataFrameInterruptFlag
IFX_EXTERN void IfxMsc_clearDataFrameInterruptFlag(Ifx_MSC *msc)
clear data frame interrupt flag
Definition: IfxMsc.c:54
IfxMsc_DataFrameLength_5
SRx[4:0] Shifted.
Definition: IfxMsc.h:368
IfxMsc_ServiceRequestDelay
IfxMsc_ServiceRequestDelay
Service Request Delay Definition in Ifx_MSC.USR.B.SRDC.
Definition: IfxMsc.h:722
IfxMsc_ShiftClockPhaseDuration_15
Duration in periods of f_A is 15.
Definition: IfxMsc.h:747
IfxMsc_UpstreamTimeoutPrescaler_2
Prescale value 2 for the upstream time-out limit.
Definition: IfxMsc.h:899
IfxMsc_ReceiveDataInterruptNode
IfxMsc_ReceiveDataInterruptNode
Interrupt Control Register - Receive Data Interrupt Pointer Definition in Ifx_MSC.ICR.B.RDIP.
Definition: IfxMsc.h:687
IfxMsc_CommandFrameLength_18
SRL[15:0] and SRH[1:0] Shifted.
Definition: IfxMsc.h:174
IfxMsc_CommandFrameLength_20
SRL[15:0] and SRH[3:0] Shifted.
Definition: IfxMsc.h:176
IfxMsc_SerialDataInput_4
SDI4 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:713
IfxMsc_ControlFrameExtensionPassivePhaseLength_113
Length of Command frames passive phase is 115.
Definition: IfxMsc.h:309
IfxMsc_Parity
IfxMsc_Parity
Parity Mode Definition in Ifx_MSC.USR.B.PCT.
Definition: IfxMsc.h:644
IfxMsc_ControlFrameExtensionPassivePhaseLength_86
Length of Command frames passive phase is 88.
Definition: IfxMsc.h:282
IfxMsc_FclClockControlEnabled_activePhaseOnly
FCL is active during active phases of data or command frames.
Definition: IfxMsc.h:531
IfxMsc_SerialDataInput_5
SDI5 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:714
IfxMsc_CommandFrameLength_30
SRL[15:0] and SRH[13:0] Shifted.
Definition: IfxMsc.h:186
IfxMsc_ControlFrameExtensionPassivePhaseLength_117
Length of Command frames passive phase is 119.
Definition: IfxMsc.h:313
IfxMsc_NDividerAbra
IfxMsc_NDividerAbra
Asynchronous Block Configuration Register - N Divider ABRA Definition in Ifx_MSC.ABC.B.NDA.
Definition: IfxMsc.h:585
IfxMsc_upstreamFractionalBaudCalculator
IFX_EXTERN uint64 IfxMsc_upstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional.
Definition: IfxMsc.c:208
IfxMsc_ExternalBitInjectionPosition_23
Injected external bit is at Position 23 of the data frame.
Definition: IfxMsc.h:474
IfxMsc_DataFrameLength_4
SRx[3:0] Shifted.
Definition: IfxMsc.h:367
IfxMsc_SleepMode_enable
enables sleep mode
Definition: IfxMsc.h:756
IfxMsc_PassiveTimeFrameCount
IfxMsc_PassiveTimeFrameCount
Downstream Status Register - Number Of Passive Time Frames Definition in Ifx_MSC.DSS.B.NPTF.
Definition: IfxMsc.h:653
IfxMsc_UpstreamTimeoutPrescaler_32768
Prescale value 32768 for the upstream time-out limit.
Definition: IfxMsc.h:913
IfxMsc_CommandFrameLength_26
SRL[15:0] and SRH[9:0] Shifted.
Definition: IfxMsc.h:182
IfxMsc_CommandFrameLength_17
SRL[15:0] and SRH[0] Shifted.
Definition: IfxMsc.h:173
IfxMsc_ControlFrameExtensionPassivePhaseLength_75
Length of Command frames passive phase is 77.
Definition: IfxMsc.h:271
IfxMsc_ClockSelect
IfxMsc_ClockSelect
Asynchronous Block Configuration Register - Clock Select Definition in Ifx_MSC.ABC.B.CLKSEL.
Definition: IfxMsc.h:114
IfxMsc_NDividerDownstream_10
division ratio is 10
Definition: IfxMsc.h:611
IfxMsc_ControlFrameExtensionPassivePhaseLength_64
Length of Command frames passive phase is 66.
Definition: IfxMsc.h:260
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxMsc_ExternalBitInjectionPosition_21
Injected external bit is at Position 21 of the data frame.
Definition: IfxMsc.h:472
IfxMsc_ControlFrameExtensionPassivePhaseLength_107
Length of Command frames passive phase is 109.
Definition: IfxMsc.h:303
IfxMsc_ControlFrameExtensionPassivePhaseLength_92
Length of Command frames passive phase is 94.
Definition: IfxMsc.h:288
IfxMsc_UpstreamChannelReceivingRate_32
Baud rate = f_MSC / 32.
Definition: IfxMsc.h:866
IfxMsc_ControlFrameExtensionPassivePhaseLength_51
Length of Command frames passive phase is 53.
Definition: IfxMsc.h:247
IfxMsc_SdiLinePolarity
IfxMsc_SdiLinePolarity
Output Control Register - SDI Line Polarity Definition in Ifx_MSC.OCR.B.ILP.
Definition: IfxMsc.h:698
IfxMsc_Fcln_Out
FCLN pin mapping structure.
Definition: IfxMsc_PinMap.h:89
IfxMsc_setDownStreamExtension
IFX_INLINE void IfxMsc_setDownStreamExtension(Ifx_MSC *msc, boolean value)
Set or reset the Down stream extension enable bit.
Definition: IfxMsc.h:1688
IfxMsc_ControlFrameExtensionPassivePhaseLength_38
Length of Command frames passive phase is 40.
Definition: IfxMsc.h:234
IfxMsc_ControlFrameExtensionPassivePhaseLength_29
Length of Command frames passive phase is 31.
Definition: IfxMsc.h:225
IfxMsc_ExternalBitInjectionPosition_17
Injected external bit is at Position 17 of the data frame.
Definition: IfxMsc.h:468
IfxMsc_DataFrameInterrupt_atLastDataBit
An interrupt is generated when the last data bit has been shifted out.
Definition: IfxMsc.h:343
IfxMsc_NDividerDownstream_16
division ratio is 16
Definition: IfxMsc.h:617
IfxMsc_UpstreamTimeoutPrescaler_8
Prescale value 8 for the upstream time-out limit.
Definition: IfxMsc.h:901
IfxMsc_Extension_enabled
Enables the extension bit fields.
Definition: IfxMsc.h:443
IfxMsc_SleepMode
IfxMsc_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_MSC.CLC.B.EDIS.
Definition: IfxMsc.h:754
IfxMsc_upstreamNormalBaudCalculator
IFX_EXTERN uint32 IfxMsc_upstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal.
Definition: IfxMsc.c:231
IfxMsc_UpstreamTimeoutValue_8
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:928
IfxMsc_UnderflowInterrupt_disabled
Disables the path of the Underflow interrupt towards the interrupt node.
Definition: IfxMsc.h:832
IfxMsc_PassiveTimeFrameCount_6
6 Passive time frames inserted
Definition: IfxMsc.h:661
IfxMsc_ControlFrameExtensionPassivePhaseLength_102
Length of Command frames passive phase is 104.
Definition: IfxMsc.h:298
IfxMsc_ShiftClockPhaseDuration_1
Duration in periods of f_A is 1.
Definition: IfxMsc.h:733
IfxMsc_PassiveTimeFrameCount_9
9 Passive time frames inserted
Definition: IfxMsc.h:664
IfxMsc_TimeFrameInterruptNode
IfxMsc_TimeFrameInterruptNode
Interrupt Control Register - Time Frame Interrupt Pointer Definition in Ifx_MSC.ICR.B.TFIP.
Definition: IfxMsc.h:810
IfxMsc_ControlFrameExtensionPassivePhaseLength_83
Length of Command frames passive phase is 85.
Definition: IfxMsc.h:279
IfxMsc_ShiftClockPhaseDuration_4
Duration in periods of f_A is 4.
Definition: IfxMsc.h:736
IfxMsc_En_Out
EN pin mapping structure.
Definition: IfxMsc_PinMap.h:72
IfxMsc_HardwareClock_enabled
Hardware clock enable.
Definition: IfxMsc.h:549
IfxMsc_enableUpstreamTimeoutInterrupt
IFX_INLINE void IfxMsc_enableUpstreamTimeoutInterrupt(Ifx_MSC *msc)
Enables the Upstream Timeout Interrupt.
Definition: IfxMsc.h:1465
IfxMsc_ControlFrameExtensionPassivePhaseLength_84
Length of Command frames passive phase is 86.
Definition: IfxMsc.h:280
IfxMsc_ControlFrameExtensionPassivePhaseLength_5
Length of Command frames passive phase is 7.
Definition: IfxMsc.h:201
IfxMsc_ShiftClockPhaseDuration_5
Duration in periods of f_A is 5.
Definition: IfxMsc.h:737
IfxMsc_CommandFrameLength
IfxMsc_CommandFrameLength
Number of Bits shifted at command frames Definition in Ifx_MSC.DSC.B.NBC.
Definition: IfxMsc.h:154
IfxMsc_DividerMode_fractional
divider mode is fractional
Definition: IfxMsc.h:425
IfxMsc_ExternalBitInjectionPosition_8
Injected external bit is at Position 8 of the data frame.
Definition: IfxMsc.h:459
IfxMsc_ExternalBitInjectionPosition_11
Injected external bit is at Position 11 of the data frame.
Definition: IfxMsc.h:462
IfxMsc_ExternalBitInjectionPosition_16
Injected external bit is at Position 16 of the data frame.
Definition: IfxMsc.h:467
IfxMsc_ShiftClockPhaseDuration_12
Duration in periods of f_A is 12.
Definition: IfxMsc.h:744
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxMsc_initFclpPin
IFX_INLINE void IfxMsc_initFclpPin(const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLP output.
Definition: IfxMsc.h:1592
IfxMsc_ControlFrameExtensionPassivePhaseLength_45
Length of Command frames passive phase is 47.
Definition: IfxMsc.h:241
IfxMsc_ControlFrameExtensionPassivePhaseLength_82
Length of Command frames passive phase is 84.
Definition: IfxMsc.h:278
IfxMsc_OverflowInterrupt_disabled
Disables the path of the overflow interrupt towards the interrupt node.
Definition: IfxMsc.h:625
IfxMsc_ControlFrameExtensionPassivePhaseLength_115
Length of Command frames passive phase is 117.
Definition: IfxMsc.h:311
IfxMsc_TimeFrameInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:813
IfxMsc_OverflowInterrupt
IfxMsc_OverflowInterrupt
Asynchronous Block Configuration Register - Overflow Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:623
IfxMsc_ActivePhaseSelection_lowLevel
Low level selection bit inserted.
Definition: IfxMsc.h:90
IfxMsc_ReceiveDataInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:689
IfxMsc_ExternalBitInjectionPosition_1
Injected external bit is at Position 1 of the data frame.
Definition: IfxMsc.h:452
IfxMsc_ExternalBitInjectionPosition_36
Injected external bit is at Position 36 of the data frame.
Definition: IfxMsc.h:487
IfxMsc_DataFrameInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:354
IfxMsc_DataFramePassivePhaseLength_12
Passive phase length is 12 tFCL.
Definition: IfxMsc.h:397
IfxMsc_ModuleSuspendRequestBit_softSuspend
OCDS is Soft suspended.
Definition: IfxMsc.h:570
IfxMsc_ExternalBitInjectionPosition_38
Injected external bit is at Position 38 of the data frame.
Definition: IfxMsc.h:489
IfxMsc_PassiveTimeFrameCount_14
14 Passive time frames inserted
Definition: IfxMsc.h:669
IfxMsc_ControlFrameExtensionPassivePhaseLength_95
Length of Command frames passive phase is 97.
Definition: IfxMsc.h:291
IfxMsc_DataFrameInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:355
IfxMsc_CommandFrameLength_31
SRL[15:0] and SRH[14:0] Shifted.
Definition: IfxMsc.h:187
IfxMsc_DataFrameLength_10
SRx[9:0] Shifted.
Definition: IfxMsc.h:373
IfxMsc_setTransmissionMode
IFX_INLINE void IfxMsc_setTransmissionMode(Ifx_MSC *msc, IfxMsc_TransmissionMode mode)
Sets the Transmission Mode.
Definition: IfxMsc.h:1753
IfxMsc_Fclp_Out
FCLP pin mapping structure.
Definition: IfxMsc_PinMap.h:81
IfxMsc_ControlFrameExtensionPassivePhaseLength_106
Length of Command frames passive phase is 108.
Definition: IfxMsc.h:302
IfxMsc_CommandFrameLength_5
SRL[4:0] Shifted.
Definition: IfxMsc.h:161
IfxMsc_ControlFrameExtensionPassivePhaseLength_37
Length of Command frames passive phase is 39.
Definition: IfxMsc.h:233
IfxMsc_ExternalBitInjectionPosition_40
Injected external bit is at Position 40 of the data frame.
Definition: IfxMsc.h:491
IfxMsc_NDividerDownstream_7
division ratio is 7
Definition: IfxMsc.h:608
IfxMsc_CommandFrameInterruptNode
IfxMsc_CommandFrameInterruptNode
Interrupt Control Register - Command Frame Interrupt Node Pointer Definition in Ifx_MSC.ICR.B.ECIP.
Definition: IfxMsc.h:143
IfxMsc_ControlFrameExtensionPassivePhaseLength_20
Length of Command frames passive phase is 22.
Definition: IfxMsc.h:216
IfxMsc_CommandFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:145
IfxMsc_SleepMode_disable
disables sleep mode
Definition: IfxMsc.h:757
IfxMsc_CommandFrameLength_25
SRL[15:0] and SRH[8:0] Shifted.
Definition: IfxMsc.h:181
IfxMsc_UpstreamTimeoutValue_3
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:923
IfxMsc_PassiveTimeFrameCount_2
2 Passive time frames inserted
Definition: IfxMsc.h:657
IfxMsc_SuspendMode
IfxMsc_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxMsc.h:781
IfxMsc_DataFramePassivePhaseLength_8
Passive phase length is 8 tFCL.
Definition: IfxMsc.h:393
IfxMsc_DataFramePassivePhaseLength_16
Passive phase length is 16 tFCL.
Definition: IfxMsc.h:401
IfxMsc_DataFrameExtensionPassivePhaseLength_1
1 Additional MSB bits extension of the PPD bit field
Definition: IfxMsc.h:332
IfxMsc_ControlFrameExtensionPassivePhaseLength_87
Length of Command frames passive phase is 89.
Definition: IfxMsc.h:283
IfxMsc_NDividerDownstream_9
division ratio is 9
Definition: IfxMsc.h:610
IfxMsc_ControlFrameExtensionPassivePhaseLength_50
Length of Command frames passive phase is 52.
Definition: IfxMsc.h:246
IfxMsc_ControlFrameExtensionPassivePhaseLength_36
Length of Command frames passive phase is 38.
Definition: IfxMsc.h:232
IfxMsc_CommandFrameLength_8
SRL[7:0] Shifted.
Definition: IfxMsc.h:164
IfxMsc_ControlFrameExtensionPassivePhaseLength_76
Length of Command frames passive phase is 78.
Definition: IfxMsc.h:272
IfxMsc_CommandFrameLength_16
SRL[15:0] Shifted.
Definition: IfxMsc.h:172
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxMsc_UpstreamTimeoutPrescaler_64
Prescale value 64 for the upstream time-out limit.
Definition: IfxMsc.h:904
IfxMsc_Source_downstreamDataRegister
SRx[16] is taken from data Register DD.DDL[xx].
Definition: IfxMsc.h:774
IfxMsc_ExternalBitInjectionPosition_48
Injected external bit is at Position 48 of the data frame.
Definition: IfxMsc.h:499
IfxMsc_ControlFrameExtensionPassivePhaseLength_89
Length of Command frames passive phase is 91.
Definition: IfxMsc.h:285
IfxMsc_Inj_In
INJ pin mapping structure.
Definition: IfxMsc_PinMap.h:56
IfxMsc_UpstreamChannelReceivingRate_128
Baud rate = f_MSC / 128.
Definition: IfxMsc.h:868
IfxMsc_DataFramePassivePhaseLength_32
Passive phase length is 32 tFCL.
Definition: IfxMsc.h:417
IfxMsc_DataFramePassivePhaseLength_20
Passive phase length is 20 tFCL.
Definition: IfxMsc.h:405
IfxMsc_ControlFrameExtensionPassivePhaseLength_66
Length of Command frames passive phase is 68.
Definition: IfxMsc.h:262
IfxMsc_getIndex
IFX_EXTERN IfxMsc_Index IfxMsc_getIndex(Ifx_MSC *msc)
API to get the resource index of the MSC specified.
Definition: IfxMsc.c:167
IfxMsc_ControlFrameExtensionPassivePhaseLength_77
Length of Command frames passive phase is 79.
Definition: IfxMsc.h:273
IfxMsc_Target_en1
Target EN1.
Definition: IfxMsc.h:793
IfxMsc_UnderflowInterrupt
IfxMsc_UnderflowInterrupt
Asynchronous Block Configuration Register - Underflow Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:830
IfxMsc_UpstreamTimeoutValue
IfxMsc_UpstreamTimeoutValue
Upstream Control Enhanced Register 1 - Upstream Timeout Value Definition in Ifx_MSC.USCE.B.USTOVAL.
Definition: IfxMsc.h:919
IfxMsc_ControlFrameExtensionPassivePhaseLength_17
Length of Command frames passive phase is 19.
Definition: IfxMsc.h:213
IfxMsc_ExternalBitInjectionPosition_51
Injected external bit is at Position 51 of the data frame.
Definition: IfxMsc.h:502
IfxMsc_getUpstreamParityErrorFlag
IFX_INLINE boolean IfxMsc_getUpstreamParityErrorFlag(Ifx_MSC *msc, uint8 upstreamIdx)
Returns the Upstream Parity Error Flag Status.
Definition: IfxMsc.h:1550
IfxMsc_SuspendMode_none
No suspend.
Definition: IfxMsc.h:783
IfxMsc_ExternalBitInjectionPosition_58
Injected external bit is at Position 58 of the data frame.
Definition: IfxMsc.h:509
IfxMsc_UnderflowInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:843
IfxMsc_ControlFrameExtensionPassivePhaseLength_19
Length of Command frames passive phase is 21.
Definition: IfxMsc.h:215
IfxMsc_DataFramePassivePhaseLength_31
Passive phase length is 31 tFCL.
Definition: IfxMsc.h:416
IfxMsc_ControlFrameExtensionPassivePhaseLength_78
Length of Command frames passive phase is 80.
Definition: IfxMsc.h:274
IfxMsc_clearValidbit
IFX_INLINE void IfxMsc_clearValidbit(Ifx_MSC *msc, uint8 upstreamIdx)
Clears the Valid bit.
Definition: IfxMsc.h:1453
IfxMsc_SerialDataInput
IfxMsc_SerialDataInput
Output Control Register - Serial Data Input Selection Definition in Ifx_MSC.OCR.B.SDISEL.
Definition: IfxMsc.h:707
IfxMsc_ExternalBitInjectionPosition_32
Injected external bit is at Position 32 of the data frame.
Definition: IfxMsc.h:483
IfxMsc_FclLinePolarity
IfxMsc_FclLinePolarity
Output Control Register - FCLP Line Polarity Definition in Ifx_MSC.OCR.B.CLP.
Definition: IfxMsc.h:538
IfxMsc_SerialDataInput_0
SDI0 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:709
IfxMsc_UpstreamTimeoutPrescaler_16
Prescale value 16 for the upstream time-out limit.
Definition: IfxMsc.h:902
IfxMsc_getUpstreamTimeoutFlag
IFX_INLINE boolean IfxMsc_getUpstreamTimeoutFlag(Ifx_MSC *msc)
Returns Upstream Timeout Flag Status.
Definition: IfxMsc.h:1556
IfxMsc_HardwareClock_disabled
Hardware clock disable.
Definition: IfxMsc.h:548
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxMsc_CommandFrameLength_23
SRL[15:0] and SRH[6:0] Shifted.
Definition: IfxMsc.h:179
IfxMsc_UpstreamTimeoutInterrupt_disabled
Upstream Timeout Interrupt Disabled.
Definition: IfxMsc.h:877
IfxMsc_TransmissionMode_dataRepetition
Data Repetition Mode.
Definition: IfxMsc.h:824
IfxMsc_ExternalBitInjectionPosition
IfxMsc_ExternalBitInjectionPosition
Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal Definition in Ifx...
Definition: IfxMsc.h:449
IfxMsc_SoLinePolarity_inverted
SOP and SO polarity is inverted.
Definition: IfxMsc.h:766
IfxMsc_disableUpstreamTimeoutInterrupt
IFX_INLINE void IfxMsc_disableUpstreamTimeoutInterrupt(Ifx_MSC *msc)
Disables the Upstream Timeout Interrupt.
Definition: IfxMsc.h:1459
IfxMsc_SerialDataInput_7
SDI7 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:716
IfxMsc_UpstreamTimeoutInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:888
IfxMsc_NDividerDownstream_15
division ratio is 15
Definition: IfxMsc.h:616
IfxMsc_ExternalBitInjectionPosition_0
Injected external bit is at Position 0 of the data frame.
Definition: IfxMsc.h:451
IfxMsc_NDividerAbra_8
Division ratio is 8.
Definition: IfxMsc.h:594
IfxMsc_SerialDataInput_3
SDI3 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:712
IfxMsc_ReceiveDataInterrupt_onRdieSet
An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H...
Definition: IfxMsc.h:680
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxMsc_SdiLinePolarity_invertedSi
SDI and SI signal polarities are inverted.
Definition: IfxMsc.h:701
IfxMsc_ControlFrameExtensionPassivePhaseLength_96
Length of Command frames passive phase is 98.
Definition: IfxMsc.h:292
IfxMsc_UpstreamTimeoutPrescaler_2048
Prescale value 2048 for the upstream time-out limit.
Definition: IfxMsc.h:909
IfxMsc_Parity_even
Even Parity.
Definition: IfxMsc.h:646
IfxMsc_OverflowInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:636
IfxMsc_DataFramePassivePhaseLength_19
Passive phase length is 19 tFCL.
Definition: IfxMsc.h:404
IfxMsc_InterruptServiceRequest_2
Interrupt Service Request number2.
Definition: IfxMsc.h:558
IfxMsc_SoLinePolarity_nonInverted
SOP and SO polarity is identical.
Definition: IfxMsc.h:765
IfxMsc_UnderflowInterruptNode
IfxMsc_UnderflowInterruptNode
Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:839
IfxMsc_ClockSelect_fsri
f_SRI is the clock source for the ABRA block
Definition: IfxMsc.h:118
IfxMsc_DataFramePassivePhaseLength_29
Passive phase length is 29 tFCL.
Definition: IfxMsc.h:414
IfxMsc_InterruptServiceRequest_4
Interrupt Service Request number4.
Definition: IfxMsc.h:560
IfxMsc_ExternalBitInjectionPosition_52
Injected external bit is at Position 52 of the data frame.
Definition: IfxMsc.h:503
IfxMsc_NDividerDownstream_11
division ratio is 11
Definition: IfxMsc.h:612
IfxMsc_ExternalBitInjectionPosition_49
Injected external bit is at Position 49 of the data frame.
Definition: IfxMsc.h:500
IfxMsc_Sop_Out
SOP pin mapping structure.
Definition: IfxMsc_PinMap.h:97
IfxMsc_SerialDataInput_2
SDI2 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:711
IfxMsc_FclClockControlEnabled_always
FCL is always active.
Definition: IfxMsc.h:532
IfxMsc_ControlFrameExtensionPassivePhaseLength_3
Length of Command frames passive phase is 5.
Definition: IfxMsc.h:199
IfxMsc_ExternalBitInjectionPosition_55
Injected external bit is at Position 55 of the data frame.
Definition: IfxMsc.h:506
IfxMsc_ExternalBitInjectionPosition_47
Injected external bit is at Position 47 of the data frame.
Definition: IfxMsc.h:498
IfxMsc_ExternalBitInjectionPosition_3
Injected external bit is at Position 3 of the data frame.
Definition: IfxMsc.h:454
IfxMsc_UpstreamTimeoutInterruptNode
IfxMsc_UpstreamTimeoutInterruptNode
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:884
IfxMsc_ControlFrameExtensionPassivePhaseLength_21
Length of Command frames passive phase is 23.
Definition: IfxMsc.h:217
IfxMsc_ServiceRequestDelay_1bit
Delay of 1 bit time.
Definition: IfxMsc.h:725
IfxMsc_UpstreamChannelReceivingRate_16
Baud rate = f_MSC / 16.
Definition: IfxMsc.h:865
IfxMsc_CommandFrameInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:146
IfxMsc_InterruptServiceRequest_3
Interrupt Service Request number3.
Definition: IfxMsc.h:559
IfxMsc_DataFramePassivePhaseLength_9
Passive phase length is 9 tFCL.
Definition: IfxMsc.h:394
IfxMsc_Sdi_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxMsc_PinMap.h:68
IfxMsc_UpstreamChannelFrameType
IfxMsc_UpstreamChannelFrameType
Channel Frame Type Definition in Ifx_MSC.USR.B.UFT.
Definition: IfxMsc.h:851
IfxMsc_DataFrameInterruptNode
IfxMsc_DataFrameInterruptNode
Interrupt Control Register - Data Frame Interrupt Node Pointer Definition in Ifx_MSC.ICR.B.EDIP.
Definition: IfxMsc.h:350
IfxMsc_ExternalBitInjectionPosition_9
Injected external bit is at Position 9 of the data frame.
Definition: IfxMsc.h:460
IfxMsc_UpstreamTimeoutValue_7
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:927
IfxMsc_ControlFrameExtensionPassivePhaseLength_15
Length of Command frames passive phase is 17.
Definition: IfxMsc.h:211
IfxMsc_DataFrameLength_7
SRx[6:0] Shifted.
Definition: IfxMsc.h:370
IfxMsc_PassiveTimeFrameCount_3
3 Passive time frames inserted
Definition: IfxMsc.h:658
IfxMsc_ControlFrameExtensionPassivePhaseLength_34
Length of Command frames passive phase is 36.
Definition: IfxMsc.h:230
IfxMsc_ControlFrameExtensionPassivePhaseLength_110
Length of Command frames passive phase is 112.
Definition: IfxMsc.h:306
IfxMsc_En_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxMsc_PinMap.h:76
IfxMsc_ShiftClockPhaseDuration
IfxMsc_ShiftClockPhaseDuration
Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock Definit...
Definition: IfxMsc.h:731
IfxMsc_UpstreamTimeoutValue_5
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:925
IfxMsc_UnderflowInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:842
IfxMsc_initEnPin
IFX_INLINE void IfxMsc_initEnPin(const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a EN output.
Definition: IfxMsc.h:1572
IfxMsc_UnderflowInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:845
IfxMsc_UpstreamChannelReceivingRate_64
Baud rate = f_MSC / 64.
Definition: IfxMsc.h:867
IfxMsc_ControlFrameExtensionPassivePhaseLength_121
Length of Command frames passive phase is 123.
Definition: IfxMsc.h:317
IfxMsc_DataFrameLength_15
SRx[14:0] Shifted.
Definition: IfxMsc.h:378
IfxMsc_UpstreamTimeoutValue_4
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:924
IfxMsc_ControlFrameExtensionPassivePhaseLength_32
Length of Command frames passive phase is 34.
Definition: IfxMsc.h:228
IfxMsc_DataFramePassivePhaseLength_18
Passive phase length is 18 tFCL.
Definition: IfxMsc.h:403
IfxMsc_ExternalBitInjectionPosition_13
Injected external bit is at Position 13 of the data frame.
Definition: IfxMsc.h:464
IfxMsc_ExternalBitInjectionPosition_56
Injected external bit is at Position 56 of the data frame.
Definition: IfxMsc.h:507
IfxMsc_ControlFrameExtensionPassivePhaseLength_109
Length of Command frames passive phase is 111.
Definition: IfxMsc.h:305
IfxMsc_ShiftClockPhaseDuration_2
Duration in periods of f_A is 2.
Definition: IfxMsc.h:734
IfxMsc_PassiveTimeFrameCount_13
13 Passive time frames inserted
Definition: IfxMsc.h:668
IfxMsc_ShiftClockPhaseDuration_14
Duration in periods of f_A is 14.
Definition: IfxMsc.h:746
IfxMsc_getUpstreamValidFlag
IFX_INLINE boolean IfxMsc_getUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
Get the status of the valid flag.
Definition: IfxMsc.h:1562
IfxMsc_ControlFrameExtensionPassivePhaseLength_69
Length of Command frames passive phase is 71.
Definition: IfxMsc.h:265
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxMsc_PinMap.h
MSC I/O map.
IfxMsc_TimeFrameInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:815
IfxMsc_ControlFrameExtensionPassivePhaseLength_59
Length of Command frames passive phase is 61.
Definition: IfxMsc.h:255
IfxMsc_UnderflowInterrupt_enabled
Enables the path of the Underflow interrupt towards the interrupt node.
Definition: IfxMsc.h:833
IfxMsc_ReceiveDataInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:678
IfxMsc_DataFrameLength_1
SRx[0] Shifted.
Definition: IfxMsc.h:364
IfxMsc_ExternalBitInjectionPosition_53
Injected external bit is at Position 53 of the data frame.
Definition: IfxMsc.h:504
IfxMsc_Extension_disabled
Disables the extension bit fields.
Definition: IfxMsc.h:442
IfxMsc_ReceiveDataInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:692
IfxMsc_ControlFrameExtensionPassivePhaseLength_31
Length of Command frames passive phase is 33.
Definition: IfxMsc.h:227
IfxMsc_CommandFrameInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:136
IfxMsc_DataFrameInterrupt_atFirstDataBit
An interrupt is generated when the First data bit has been shifted out.
Definition: IfxMsc.h:344
IfxMsc_ControlFrameExtensionPassivePhaseLength_44
Length of Command frames passive phase is 46.
Definition: IfxMsc.h:240
IfxMsc_DataFramePassivePhaseLength
IfxMsc_DataFramePassivePhaseLength
Passive Phase Length at Data Frames Definition in Ifx_MSC.DSC.B.PPD.
Definition: IfxMsc.h:385
IfxMsc_DataFrameLength_11
SRx[10:0] Shifted.
Definition: IfxMsc.h:374
IfxMsc_UpstreamTimeoutPrescaler_32
Prescale value 32 for the upstream time-out limit.
Definition: IfxMsc.h:903
IfxMsc_DataFrameLength
IfxMsc_DataFrameLength
Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL.
Definition: IfxMsc.h:361
IfxMsc_ExternalBitInjectionPosition_39
Injected external bit is at Position 39 of the data frame.
Definition: IfxMsc.h:490
IfxMsc_Source
IfxMsc_Source
Downstream Select Data Source Low Register - Select Source for - SRL and SRHNumber Of Passive Time Fr...
Definition: IfxMsc.h:772
IfxMsc_downstreamNormalBaudCalculator
IFX_EXTERN uint32 IfxMsc_downstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal for downstream.
Definition: IfxMsc.c:112
IfxMsc_ControlFrameExtensionPassivePhaseLength_70
Length of Command frames passive phase is 72.
Definition: IfxMsc.h:266
IfxMsc_DataFrameLength_9
SRx[8:0] Shifted.
Definition: IfxMsc.h:372
IfxMsc_DataFramePassivePhaseLength_24
Passive phase length is 24 tFCL.
Definition: IfxMsc.h:409
IfxMsc_UnderflowInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:841
IfxMsc_ControlFrameExtensionPassivePhaseLength_56
Length of Command frames passive phase is 58.
Definition: IfxMsc.h:252
IfxMsc_ShiftClockPhaseDuration_6
Duration in periods of f_A is 6.
Definition: IfxMsc.h:738
IfxMsc_TimeFrameInterrupt_enabled
Interrupt generation enabled.
Definition: IfxMsc.h:804
IfxMsc_CommandFrameLength_28
SRL[15:0] and SRH[11:0] Shifted.
Definition: IfxMsc.h:184
IfxMsc_Target_en0
Target EN0.
Definition: IfxMsc.h:792
IfxMsc_ExternalBitInjectionPosition_26
Injected external bit is at Position 26 of the data frame.
Definition: IfxMsc.h:477
IfxMsc_cfg.h
MSC on-chip implementation data.
IfxMsc_ModuleSuspendRequestBit
IfxMsc_ModuleSuspendRequestBit
OCDS Control and Status - OCDS Suspend Control Definition in Ifx_MSC.OCS.B.SUS.
Definition: IfxMsc.h:566
IfxMsc_Target
IfxMsc_Target
Msc Targets - use as chip enable selection for ENH, ENL and ENC.
Definition: IfxMsc.h:790
IfxMsc_ExternalBitInjectionPosition_61
Injected external bit is at Position 61 of the data frame.
Definition: IfxMsc.h:512
IfxMsc_UpstreamTimeoutPrescaler_16384
Prescale value 16384 for the upstream time-out limit.
Definition: IfxMsc.h:912
IfxMsc_ControlFrameExtensionPassivePhaseLength_62
Length of Command frames passive phase is 64.
Definition: IfxMsc.h:258
IfxMsc_ControlFrameExtensionPassivePhaseLength_85
Length of Command frames passive phase is 87.
Definition: IfxMsc.h:281
IfxMsc_CommandFrameLength_19
SRL[15:0] and SRH[2:0] Shifted.
Definition: IfxMsc.h:175
IfxMsc_getDownStreamExtension
IFX_INLINE boolean IfxMsc_getDownStreamExtension(Ifx_MSC *msc)
Returns the value of Down stream extension enable bit.
Definition: IfxMsc.h:1501
IfxMsc_UpstreamChannelReceivingRate_disabled
Disabled.
Definition: IfxMsc.h:862
IfxMsc_DataFramePassivePhaseLength_7
Passive phase length is 7 tFCL.
Definition: IfxMsc.h:392
IfxMsc_DataFramePassivePhaseLength_10
Passive phase length is 10 tFCL.
Definition: IfxMsc.h:395
IfxMsc_getData
IFX_INLINE uint16 IfxMsc_getData(Ifx_MSC *msc, uint8 upstreamIdx)
Get the upstream data from upstream data register.
Definition: IfxMsc.h:1477
IfxMsc_EmergencyStop_enabled
Emergency stop feature for SRx bit is Enabled.
Definition: IfxMsc.h:434
IfxMsc_NDividerAbra_4
Division ratio is 4.
Definition: IfxMsc.h:590
IfxMsc_CommandFrameLength_32
SRL[15:0] and SRH[15:0] Shifted.
Definition: IfxMsc.h:188
IfxMsc_ControlFrameExtensionPassivePhaseLength_42
Length of Command frames passive phase is 44.
Definition: IfxMsc.h:238
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxMsc_NDividerDownstream_8
division ratio is 8
Definition: IfxMsc.h:609
IfxMsc_ExternalBitInjectionPosition_60
Injected external bit is at Position 60 of the data frame.
Definition: IfxMsc.h:511
IfxMsc_UpstreamTimeoutInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:886
IfxMsc_ControlFrameExtensionPassivePhaseLength_33
Length of Command frames passive phase is 35.
Definition: IfxMsc.h:229
IfxMsc_enableModule
IFX_EXTERN void IfxMsc_enableModule(Ifx_MSC *msc)
Enable MSC kernel.
Definition: IfxMsc.c:127
IfxMsc_ControlFrameExtensionPassivePhaseLength_116
Length of Command frames passive phase is 118.
Definition: IfxMsc.h:312
IfxMsc_DataFramePassivePhaseLength_23
Passive phase length is 23 tFCL.
Definition: IfxMsc.h:408
IfxMsc_DataFrameExtensionPassivePhaseLength
IfxMsc_DataFrameExtensionPassivePhaseLength
Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension Definition in If...
Definition: IfxMsc.h:329
IfxMsc_CommandFrameInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:147
IfxMsc_UpstreamTimeoutInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:890
IfxMsc_initSonPin
IFX_INLINE void IfxMsc_initSonPin(const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SON output.
Definition: IfxMsc.h:1623
IfxMsc_ControlFrameExtensionPassivePhaseLength_108
Length of Command frames passive phase is 110.
Definition: IfxMsc.h:304
IfxMsc_clearUpstreamValidFlag
IFX_INLINE void IfxMsc_clearUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
Clear the valid flag.
Definition: IfxMsc.h:1447
IfxMsc_TransmissionMode_triggered
Triggered Mode.
Definition: IfxMsc.h:823
IfxMsc_CommandFrameLength_9
SRL[8:0] Shifted.
Definition: IfxMsc.h:165
IfxMsc_FclClockControlEnabled
IfxMsc_FclClockControlEnabled
Output Control Register - Clock Control Definition in Ifx_MSC.OCR.B.CLKCTRL.
Definition: IfxMsc.h:529
IfxMsc_DividerMode_normal
divider mode is normal
Definition: IfxMsc.h:424
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxMsc_CommandFrameLength_6
SRL[5:0] Shifted.
Definition: IfxMsc.h:162
IfxMsc_CommandFrameLength_12
SRL[11:0] Shifted.
Definition: IfxMsc.h:168
IfxMsc_ShiftClockPhaseDuration_3
Duration in periods of f_A is 3.
Definition: IfxMsc.h:735
IfxMsc_ControlFrameExtensionPassivePhaseLength_52
Length of Command frames passive phase is 54.
Definition: IfxMsc.h:248
IfxMsc_ShiftClockPhaseDuration_11
Duration in periods of f_A is 11.
Definition: IfxMsc.h:743
IfxMsc_ControlFrameExtensionPassivePhaseLength_68
Length of Command frames passive phase is 70.
Definition: IfxMsc.h:264
IfxMsc_DataFrameLength_0
No SRx bit shifted.
Definition: IfxMsc.h:363
IfxMsc_ControlFrameExtensionPassivePhaseLength_91
Length of Command frames passive phase is 93.
Definition: IfxMsc.h:287
IfxMsc_clearAbraUnderflowFlag
IFX_INLINE void IfxMsc_clearAbraUnderflowFlag(Ifx_MSC *msc)
Clear ABRA underflow flag.
Definition: IfxMsc.h:1427
IfxMsc_CommandFrameLength_13
SRL[12:0] Shifted.
Definition: IfxMsc.h:169
IfxMsc_ControlFrameExtensionPassivePhaseLength_112
Length of Command frames passive phase is 114.
Definition: IfxMsc.h:308
IfxMsc_DataFrameExtensionPassivePhaseLength_2
2 Additional MSB bits extension of the PPD bit field
Definition: IfxMsc.h:333
IfxMsc_CommandFrameLength_22
SRL[15:0] and SRH[5:0] Shifted.
Definition: IfxMsc.h:178
IfxMsc_ControlFrameExtensionPassivePhaseLength_54
Length of Command frames passive phase is 56.
Definition: IfxMsc.h:250
IfxMsc_CommandFrameInterrupt
IfxMsc_CommandFrameInterrupt
Interrupt Control Register - Command Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.ECIE.
Definition: IfxMsc.h:134
IfxMsc_UpstreamChannelReceivingRate_4
Baud rate = f_MSC / 4.
Definition: IfxMsc.h:863
IfxMsc_ControlFrameExtensionPassivePhaseLength_105
Length of Command frames passive phase is 107.
Definition: IfxMsc.h:301
IfxMsc_NDividerAbra_1
Division ratio is 1.
Definition: IfxMsc.h:587
IfxMsc_getDataLowTarget
IFX_INLINE IfxMsc_Target IfxMsc_getDataLowTarget(Ifx_MSC *msc)
Get the selected target during low phase.
Definition: IfxMsc.h:1494
IfxMsc_CommandFrameInterrupt_enabled
Interrupt generation enabled.
Definition: IfxMsc.h:137
IfxMsc_DataFrameLength_3
SRx[2:0] Shifted.
Definition: IfxMsc.h:366
IfxMsc_ControlFrameExtensionPassivePhaseLength_40
Length of Command frames passive phase is 42.
Definition: IfxMsc.h:236
IfxMsc_resetModule
IFX_EXTERN void IfxMsc_resetModule(Ifx_MSC *msc)
Reset MSC kernel.
Definition: IfxMsc.c:187
IfxMsc_ChipSelectActiveState
IfxMsc_ChipSelectActiveState
Output Control Register - Chip Selection Line Polarity Definition in Ifx_MSC.OCR.B.CSLP.
Definition: IfxMsc.h:105
IfxMsc_ControlFrameExtensionPassivePhaseLength_99
Length of Command frames passive phase is 101.
Definition: IfxMsc.h:295


iLLD_TC26B: IfxMsc_Msc.c Source File

  • Msc
  • Msc
IfxMsc_Msc.c
Go to the documentation of this file.
1 /**
2 * \file IfxMsc_Msc.c
3 * \brief MSC MSC details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxMsc_Msc.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxMsc_Msc_deInitModule(IfxMsc_Msc *msc)
55 {
56 IfxMsc_resetModule(msc->msc);
57 }
58
59
60 IfxMsc_Target IfxMsc_Msc_getTarget(IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
61 {
62 Ifx_MSC *mscSfr = msc->msc;
63 IfxMsc_Target enX = IfxMsc_Target_en0;
64
65 if (target == IfxMsc_Msc_Target_low)
66 {
67 enX = IfxMsc_getDataLowTarget(mscSfr);
68 }
69 else if (target == IfxMsc_Msc_Target_high)
70 {
71 enX = IfxMsc_getDataHighTarget(mscSfr);
72 }
73
74 return enX;
75 }
76
77
78 void IfxMsc_Msc_initModule(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
79 {
80 Ifx_MSC *mscSfr = config->msc;
81
82 msc->msc = mscSfr;
83
84 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
85 IfxScuWdt_clearCpuEndinit(passwd);
86
87 /* Enable the MSCx Clock */
88 IfxMsc_enableModule(mscSfr);
89
90 /* Configure MSC hadrware enable and set the divider mode */
91 {
92 Ifx_MSC_FDR fdr;
93
94 /* Read the FDR register content */
95 fdr.U = mscSfr->FDR.U;
96 /* Select the divider mode */
97 fdr.B.DM = config->clockConfig.dividerMode;
98 /* Enable Hardware Clock Control */
99 fdr.B.ENHW = IfxMsc_HardwareClock_enabled;
100
101 mscSfr->FDR.U = fdr.U;
102 }
103
104 /* Configure Upstream Channel Data Format */
105 {
106 Ifx_MSC_USR usr;
107
108 /* Read the USR register content */
109 usr.U = mscSfr->USR.U;
110 /* Service Request Delay Control */
111 usr.B.SRDC = config->upstreamConfig.serviceRequestDelay;
112 /* Select parity control Even - 0, Odd - 1 */
113 usr.B.PCTR = config->upstreamConfig.parity;
114 /* Select upstream baud rate fMSC/xx */
115 usr.B.URR = config->upstreamConfig.upstreamChannelReceivingRate;
116 /* Select 12 bit or 16 bit frame */
117 usr.B.UFT = config->upstreamConfig.upstreamChannelFrameType;
118
119 mscSfr->USR.U = usr.U;
120 }
121
122 /* Normal divider */
123 if (config->clockConfig.dividerMode == 1)
124 {
125 /* Initialize MSC BaudRate at 6.25MHz, Fsys = 100MHz */
126 mscSfr->FDR.B.STEP =
127 IfxMsc_upstreamNormalBaudCalculator(mscSfr, config->clockConfig.baudrate);
128 }
129 /* Fractional divider */
130 else
131 {
132 /* Initialize MSC BaudRate at 6.25MHz, Fsys = 100MHz */
133 mscSfr->FDR.B.STEP = (uint32)IfxMsc_upstreamFractionalBaudCalculator(mscSfr, config->clockConfig.baudrate);
134 }
135
136 IfxScuWdt_setCpuEndinit(passwd);
137
138 /* Configure IOs */
139 {
140 IfxMsc_Msc_Io *io = (IfxMsc_Msc_Io *)&config->io;
141
142 IfxMsc_Fclp_Out *fclp = io->fclp.pin;
143
144 if (fclp != NULL_PTR)
145 {
146 IfxMsc_initFclpPin(fclp, io->fclp.mode, io->pinDriver);
147 }
148
149 IfxMsc_Fcln_Out *fcln = io->fcln.pin;
150
151 if (fcln != NULL_PTR)
152 {
153 IfxMsc_initFclnPin(fcln, io->fcln.mode, io->pinDriver);
154 }
155
156 IfxMsc_Sop_Out *sop = io->sop.pin;
157
158 if (sop != NULL_PTR)
159 {
160 IfxMsc_initSopPin(sop, io->sop.mode, io->pinDriver);
161 }
162
163 IfxMsc_Son_Out *son = io->son.pin;
164
165 if (son != NULL_PTR)
166 {
167 IfxMsc_initSonPin(son, io->son.mode, io->pinDriver);
168 }
169
170 IfxMsc_En_Out *en0 = io->en0.pin;
171
172 if (en0 != NULL_PTR)
173 {
174 IfxMsc_initEnPin(en0, io->en0.mode, io->pinDriver);
175 }
176
177 IfxMsc_En_Out *en1 = io->en1.pin;
178
179 if (en1 != NULL_PTR)
180 {
181 IfxMsc_initEnPin(en1, io->en1.mode, io->pinDriver);
182 }
183
184 IfxMsc_En_Out *en2 = io->en2.pin;
185
186 if (en2 != NULL_PTR)
187 {
188 IfxMsc_initEnPin(en2, io->en2.mode, io->pinDriver);
189 }
190
191 IfxMsc_En_Out *en3 = io->en3.pin;
192
193 if (en3 != NULL_PTR)
194 {
195 IfxMsc_initEnPin(en3, io->en3.mode, io->pinDriver);
196 }
197
198 IfxMsc_Sdi_In *sdi = io->sdi.pin;
199
200 if (sdi != NULL_PTR)
201 {
202 IfxMsc_initSdiPin(sdi, io->sdi.mode, io->pinDriver);
203 }
204
205 IfxMsc_Inj_In *inj0 = io->inj0.pin;
206
207 if (inj0 != NULL_PTR)
208 {
209 IfxMsc_initInjPin(inj0, io->inj0.mode, io->pinDriver);
210 }
211
212 IfxMsc_Inj_In *inj1 = io->inj1.pin;
213
214 if (inj1 != NULL_PTR)
215 {
216 IfxMsc_initInjPin(inj1, io->inj1.mode, io->pinDriver);
217 }
218 }
219
220 /* Configure the control of upstream channel timeout feature */
221 {
222 Ifx_MSC_USCE usce;
223
224 /* Read the USCE register content */
225 usce.U = mscSfr->USCE.U;
226 /* Upstream Timeout Value */
227 usce.B.USTOVAL = config->upstreamConfig.upstreamTimeoutValue;
228 /* Upstream Timeout Prescaler */
229 usce.B.USTOPRE = config->upstreamConfig.upstreamTimeoutPrescaler;
230 /* Upstream Timeout Interrupt */
231 usce.B.USTOIP = config->interruptConfig.upstreamTimeoutInterruptNode,
232 usce.B.USTOEN = config->interruptConfig.upstreamTimeoutInterrupt,
233
234 mscSfr->USCE.U = usce.U;
235 }
236
237 /* Control the operation mode and frame layout of the downstream channel transmission */
238 {
239 Ifx_MSC_DSC dsc;
240
241 /* Read the DSC register content */
242 dsc.U = mscSfr->DSC.U;
243
244 /* Passive Phase Length */
245 dsc.B.PPD = config->downstreamConfig.dataFramePassivePhaseLength;
246 /* Number of command bits transmitted */
247 dsc.B.NBC = config->downstreamConfig.commandFrameLength;
248 /* SRH Selection Bit */
249 dsc.B.ENSELH = config->downstreamConfig.srhActivePhaseSelection;
250 /* SRL Selection Bit */
251 dsc.B.ENSELL = config->downstreamConfig.srlActivePhaseSelection;
252 /* Number of SRH Bits transmitted */
253 dsc.B.NDBH = config->downstreamConfig.srhDataFrameLength;
254 /* Number of SRL Bits transmitted */
255 dsc.B.NDBL = config->downstreamConfig.srlDataFrameLength;
256 /* Transmission Mode - Triggered or data repetition */
257 dsc.B.TM = config->downstreamConfig.transmissionMode;
258
259 mscSfr->DSC.U = dsc.U;
260 }
261
262 /* Number Of Passive Time Frames */
263 mscSfr->DSS.B.NPTF = config->downstreamConfig.passiveTimeFrameCount;
264
265 /* Select Source for SRL */
266 mscSfr->DSDSL.U = config->downstreamConfig.downstreamDataSourcesLow;
267 /* Select Source for SRH */
268 mscSfr->DSDSH.U = config->downstreamConfig.downstreamDataSourcesHigh;
269
270 /* Emergency Stop Enable for Bits */
271 mscSfr->ESR.U = config->downstreamConfig.emergencyStopEnableBits;
272
273 /* Interrupt configuration */
274 {
275 Ifx_MSC_ICR icr;
276
277 icr.U = mscSfr->ICR.U;
278
279 icr.B.EDIP = config->interruptConfig.dataFrameInterruptNode;
280 icr.B.EDIE = config->interruptConfig.dataFrameInterrupt;
281 icr.B.ECIP = config->interruptConfig.commandFrameInterruptNode;
282 icr.B.ECIE = config->interruptConfig.commandFrameInterrupt;
283 icr.B.TFIP = config->interruptConfig.timeFrameInterruptNode;
284 icr.B.TFIE = config->interruptConfig.timeFrameInterrupt;
285 icr.B.RDIP = config->interruptConfig.receiveDataInterruptNode;
286 icr.B.RDIE = config->interruptConfig.receiveDataInterrupt;
287
288 /* additional interrupt configured in USCE for Upstream Interrupt node SR4 */
289
290 Ifx_MSC_USCE usce;
291
292 /* Read the USCE register content */
293 usce.U = mscSfr->USCE.U;
294
295 if (config->interruptConfig.upstreamTimeoutInterruptNode == IfxMsc_UpstreamTimeoutInterruptNode_SR4)
296 {
297 usce.B.USTOIP = 0;
298 usce.B.UTASR = 1;
299 }
300 else
301 {
302 usce.B.USTOIP = config->interruptConfig.upstreamTimeoutInterruptNode;
303 usce.B.UTASR = 0;
304 }
305
306 usce.B.USTOEN = config->interruptConfig.upstreamTimeoutInterrupt;
307
308 mscSfr->USCE.U = usce.U;
309
310 mscSfr->ICR.U = icr.U;
311
312 /* ABRA */
313 Ifx_MSC_ABC abc;
314 abc.U = mscSfr->ABC.U;
315
316 if (config->interruptConfig.overflowInterruptNode == IfxMsc_OverflowInterruptNode_SR4)
317 {
318 abc.B.OIP = 0;
319 abc.B.OASR = 1;
320 }
321 else
322 {
323 abc.B.OIP = config->interruptConfig.overflowInterruptNode;
324 abc.B.OASR = 0;
325 }
326
327 abc.B.OIE = config->interruptConfig.overflowInterrupt;
328
329 if (config->interruptConfig.underflowInterruptNode == IfxMsc_UnderflowInterruptNode_SR4)
330 {
331 abc.B.UIP = 0;
332 abc.B.UASR = 1;
333 }
334 else
335 {
336 abc.B.UIP = config->interruptConfig.underflowInterruptNode;
337 abc.B.UASR = 0;
338 }
339
340 abc.B.UIE = config->interruptConfig.underflowInterrupt;
341
342 mscSfr->ABC.U = abc.U;
343 }
344
345 /* MSC inputs/outputs signal polarities */
346 {
347 Ifx_MSC_OCR ocr;
348
349 /* Read the OCR register content */
350 ocr.U = mscSfr->OCR.U;
351 /* FCL is activated during active phases or always */
352 ocr.B.CLKCTRL = config->outputControlConfig.fclClockControl;
353 /* SDI Line Polarity - SDI and SI */
354 ocr.B.ILP = config->outputControlConfig.sdiLinePolarity;
355 /* Chip Selection Lines Polarity - EN[0:3, ENL, ENH and ENC */
356 ocr.B.CSLP = config->outputControlConfig.cslpPolarity;
357 /* SOP Line Polarity - SOP, SON, SO */
358 ocr.B.SLP = config->outputControlConfig.sopPolarity;
359 /* FCLP Line Polarity - FCLP, FCLN and FCL */
360 ocr.B.CLP = config->outputControlConfig.fclpPolarity;
361
362 mscSfr->OCR.U = ocr.U;
363 }
364 /* Chip Enable Selection for ENL */
365 IfxMsc_setDataLowTarget(mscSfr, config->target[0]);
366
367 /* Chip Enable Selection for ENH */
368 IfxMsc_setDataHighTarget(mscSfr, config->target[0]);
369
370 /* Chip Enable Selection for ENC */
371 IfxMsc_setCommandTarget(mscSfr, IfxMsc_Msc_getTarget(msc, IfxMsc_Msc_Target_low));
372
373 /* Configure the Injection Enable and number of SRHE, SRLE Bits transmitted and Extension Enable */
374 {
375 Ifx_MSC_DSCE dsce;
376
377 /* Read the DSCE register content */
378 dsce.U = mscSfr->DSCE.U;
379 /* Command-Data-Command in Data Repetition Mode */
380 dsce.B.CDCM = config->downstreamConfig.commandDataCommandReceptionMode;
381 /* Injection Position of the Pin 1 Signal */
382 dsce.B.INJPOSP1 = config->downstreamConfig.injectionPositionPin1;
383 /* Injection Enable of the Pin 1 Signal */
384 dsce.B.INJENP1 = config->downstreamConfig.externalSignalInjectionPin1;
385 /* Injection Position of the Pin 0 Signal */
386 dsce.B.INJPOSP0 = config->downstreamConfig.injectionPositionPin0;
387 /* Injection Enable of the Pin 0 Signal */
388 dsce.B.INJENP0 = config->downstreamConfig.externalSignalInjectionPin0;
389
390 mscSfr->DSCE.U = dsce.U;
391 }
392
393 /* If enabled configure extension registers */
394 if (config->downstreamExtensionConfig.extension == IfxMsc_Extension_enabled)
395 {
396 IfxMsc_Msc_initializeDataExtension(msc, config);
397 }
398
399 /* If enabled, configure ABRA block */
400 if (config->abraConfig.abraBlockBypass != IfxMsc_AsynchronousBlock_bypassed)
401 {
402 IfxMsc_Msc_initializeAbra(msc, config);
403 }
404 }
405
406
407 void IfxMsc_Msc_initModuleConfig(IfxMsc_Msc_Config *config, Ifx_MSC *msc)
408 {
409 const IfxMsc_Msc_Config defaultConfig = {
410 .msc = NULL_PTR,
411 .clockConfig = {
412 .baudrate = 3125000,
413 .dividerMode = IfxMsc_DividerMode_normal,
414 .step = 0
415 },
416 .upstreamConfig = {
417 .upstreamChannelFrameType = IfxMsc_UpstreamChannelFrameType_12bit,
418 .upstreamChannelReceivingRate = IfxMsc_UpstreamChannelReceivingRate_16,
419 .parity = IfxMsc_Parity_even,
420 .serviceRequestDelay = IfxMsc_ServiceRequestDelay_noDelay,
421 .upstreamTimeoutPrescaler = IfxMsc_UpstreamTimeoutPrescaler_32768,
422 .upstreamTimeoutValue = IfxMsc_UpstreamTimeoutValue_16
423 },
424 .interruptConfig = {
425 .dataFrameInterruptNode = IfxMsc_DataFrameInterruptNode_SR0,
426 .dataFrameInterrupt = IfxMsc_DataFrameInterrupt_disabled,
427 .commandFrameInterruptNode = IfxMsc_CommandFrameInterruptNode_SR0,
428 .commandFrameInterrupt = IfxMsc_CommandFrameInterrupt_disabled,
429 .timeFrameInterruptNode = IfxMsc_TimeFrameInterruptNode_SR0,
430 .timeFrameInterrupt = IfxMsc_TimeFrameInterrupt_disabled,
431 .receiveDataInterruptNode = IfxMsc_ReceiveDataInterruptNode_SR0,
432 .receiveDataInterrupt = IfxMsc_ReceiveDataInterrupt_disabled,
433 .upstreamTimeoutInterruptNode = IfxMsc_UpstreamTimeoutInterruptNode_SR0,
434 .upstreamTimeoutInterrupt = IfxMsc_UpstreamTimeoutInterrupt_disabled,
435 .overflowInterruptNode = IfxMsc_OverflowInterruptNode_SR0,
436 .overflowInterrupt = IfxMsc_OverflowInterrupt_disabled,
437 .underflowInterruptNode = IfxMsc_UnderflowInterruptNode_SR0,
438 .underflowInterrupt = IfxMsc_UnderflowInterrupt_disabled
439 },
440 .outputControlConfig = {
441 .fclpPolarity = IfxMsc_FclLinePolarity_nonInverted,
442 .sopPolarity = IfxMsc_SoLinePolarity_nonInverted,
443 .cslpPolarity = IfxMsc_ChipSelectActiveState_low,
444 .sdiLinePolarity = IfxMsc_SdiLinePolarity_likeSi,
445 .fclClockControl = IfxMsc_FclClockControlEnabled_activePhaseOnly
446 },
447 .downstreamConfig = {
448 .transmissionMode = IfxMsc_TransmissionMode_triggered,
449 .srlDataFrameLength = IfxMsc_DataFrameLength_16,
450 .srhDataFrameLength = IfxMsc_DataFrameLength_16,
451 .srlActivePhaseSelection = IfxMsc_ActivePhaseSelection_none,
452 .srhActivePhaseSelection = IfxMsc_ActivePhaseSelection_none,
453 .commandFrameLength = IfxMsc_CommandFrameLength_32,
454 .dataFramePassivePhaseLength = IfxMsc_DataFramePassivePhaseLength_2,
455 .passiveTimeFrameCount = IfxMsc_PassiveTimeFrameCount_0,
456 .externalSignalInjectionPin0 = IfxMsc_ExternalSignalInjection_disabled,
457 .injectionPositionPin0 = IfxMsc_ExternalBitInjectionPosition_0,
458 .externalSignalInjectionPin1 = IfxMsc_ExternalSignalInjection_disabled,
459 .injectionPositionPin1 = IfxMsc_ExternalBitInjectionPosition_0,
460 .commandDataCommandReceptionMode = IfxMsc_CommandDataCommandRepetitionMode_disabled,
461 .downstreamDataSourcesLow = 0,
462 .downstreamDataSourcesHigh = 0,
463 .emergencyStopEnableBits = 0
464 },
465 .downstreamExtensionConfig = {
466 .extension = IfxMsc_Extension_disabled,
467 .srlBitsShiftedAtDataFramesExtension = IfxMsc_MsbBitDataExtension_notPresent,
468 .srhBitsShiftedAtDataFramesExtension = IfxMsc_MsbBitDataExtension_notPresent,
469 .downstreamExtensionDataSourcesLow = 0,
470 .downstreamExtensionDataSourcesHigh = 0,
471 .emergencyStopExtensionEnableBits = 0,
472 .dataFrameExtensionPassivePhaseLength = IfxMsc_DataFrameExtensionPassivePhaseLength_0,
473 .controlFrameExtensionPassivePhaseLength = IfxMsc_ControlFrameExtensionPassivePhaseLength_0,
474 .nDividerDownstream = IfxMsc_NDividerDownstream_1
475 },
476 .abraConfig = {
477 .abraDownstreamBlockBaudrate = 500000,
478 .lowPhaseOfShiftClock = IfxMsc_ShiftClockPhaseDuration_1,
479 .highPhaseOfShiftClock = IfxMsc_ShiftClockPhaseDuration_1,
480 .nDividerAbra = IfxMsc_NDividerAbra_1,
481 .abraBlockBypass = IfxMsc_AsynchronousBlock_bypassed,
482 .clockSelectAbra = IfxMsc_ClockSelect_fspb
483 },
484 .io = {
485 .fclp = {
486 .pin = NULL_PTR,
487 .mode = IfxPort_OutputMode_pushPull
488 },
489 .fcln = {
490 .pin = NULL_PTR,
491 .mode = IfxPort_OutputMode_pushPull
492 },
493 .sop = {
494 .pin = NULL_PTR,
495 .mode = IfxPort_OutputMode_pushPull
496 },
497 .son = {
498 .pin = NULL_PTR,
499 .mode = IfxPort_OutputMode_pushPull
500 },
501 .en0 = {
502 .pin = NULL_PTR,
503 .mode = IfxPort_OutputMode_pushPull
504 },
505 .en1 = {
506 .pin = NULL_PTR,
507 .mode = IfxPort_OutputMode_pushPull
508 },
509 .en2 = {
510 .pin = NULL_PTR,
511 .mode = IfxPort_OutputMode_pushPull
512 },
513 .en3 = {
514 .pin = NULL_PTR,
515 .mode = IfxPort_OutputMode_pushPull
516 },
517 .sdi = {
518 .pin = NULL_PTR,
519 .mode = IfxPort_InputMode_pullUp
520 },
521 .inj0 = {
522 .pin = NULL_PTR,
523 .mode = IfxPort_InputMode_pullUp
524 },
525 .inj1 = {
526 .pin = NULL_PTR,
527 .mode = IfxPort_InputMode_pullUp
528 },
529 .pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed3
530 }
531 };
532
533 /* Default Configuration */
534 *config = defaultConfig;
535
536 /* take over module pointer */
537 config->msc = msc;
538 }
539
540
541 void IfxMsc_Msc_initializeAbra(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
542 {
543 Ifx_MSC *mscSfr = msc->msc;
544
545 /* N Divider Downstream */
546 mscSfr->DSTE.B.NDD =
547 IfxMsc_downstreamAbraBaudCalculator(config->abraConfig.abraDownstreamBlockBaudrate);
548
549 /* Configure Asynchronous block */
550 {
551 Ifx_MSC_ABC abc;
552
553 /* Read the ABC register content */
554 abc.U = mscSfr->ABC.U;
555 /* Asynchronous Block Bypass */
556 abc.B.ABB = config->abraConfig.abraBlockBypass;
557 /* Clock Select */
558 abc.B.CLKSEL = config->abraConfig.clockSelectAbra;
559 /* N Divider ABRA */
560 abc.B.NDA = config->abraConfig.nDividerAbra;
561 /* Duration of the High Phase of the Shift Clock */
562 abc.B.HIGH = config->abraConfig.highPhaseOfShiftClock;
563 /* Duration of the Low Phase of the Shift Clock */
564 abc.B.LOW = config->abraConfig.lowPhaseOfShiftClock;
565
566 mscSfr->ABC.U = abc.U;
567 }
568 }
569
570
571 void IfxMsc_Msc_initializeDataExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
572 {
573 Ifx_MSC *mscSfr = msc->msc;
574
575 /* Configure the number of SRHE, SRLE Bits transmitted and Extension Enable */
576 {
577 Ifx_MSC_DSCE dsce;
578
579 /* Read the DSCE register content */
580 dsce.U = mscSfr->DSCE.U;
581 /* Extension Enable */
582 dsce.B.EXEN = config->downstreamExtensionConfig.extension;
583 /* Configure the number of SRLE Bits transmitted */
584 dsce.B.NDBLE = config->downstreamExtensionConfig.srlBitsShiftedAtDataFramesExtension;
585 /* Configure the number of SRHE Bits transmitted */
586 dsce.B.NDBHE = config->downstreamExtensionConfig.srhBitsShiftedAtDataFramesExtension;
587
588 mscSfr->DSCE.U = dsce.U;
589 }
590
591 /* Select Source for SRLE */
592 mscSfr->DSDSLE.U = config->downstreamExtensionConfig.downstreamExtensionDataSourcesLow;
593
594 /* Select Source for SRHE */
595 mscSfr->DSDSHE.U = config->downstreamExtensionConfig.downstreamExtensionDataSourcesHigh;
596
597 /* Emergency Stop Enable for Bit */
598 mscSfr->ESRE.U = config->downstreamExtensionConfig.emergencyStopExtensionEnableBits;
599
600 /* Passive Phase Length at Data and Control Frames Extension */
601 {
602 Ifx_MSC_DSTE dste;
603
604 /* Read the DSTE register content */
605 dste.U = mscSfr->DSTE.U;
606 /* Passive Phase Length at Control Frames Extension */
607 dste.B.PPCE = config->downstreamExtensionConfig.controlFrameExtensionPassivePhaseLength;
608 /* Passive Phase Length at Data Frames Extension */
609 dste.B.PPDE = config->downstreamExtensionConfig.dataFrameExtensionPassivePhaseLength;
610 /* N Divider for Downstream */
611 dste.B.NDD = config->downstreamExtensionConfig.nDividerDownstream;
612
613 mscSfr->DSTE.U = dste.U;
614 }
615 }
616
617
618 uint32 IfxMsc_Msc_receiveData(IfxMsc_Msc *msc, uint8 upstreamIdx)
619 {
620 Ifx_MSC *mscSfr = msc->msc;
621 uint16 data = 0;
622
623 /* Check for valid flag */
624 if (!IfxMsc_getUpstreamValidFlag(mscSfr, upstreamIdx))
625 {
626 return (uint32)0xFFFFFFFF;
627 }
628
629 /* Clear the flag */
630 IfxMsc_clearUpstreamValidFlag(mscSfr, upstreamIdx);
631
632 /* Read the data */
633 data = IfxMsc_getData(mscSfr, upstreamIdx);
634
635 return data;
636 }
637
638
639 void IfxMsc_Msc_sendCommand(IfxMsc_Msc *msc, uint32 command)
640 {
641 Ifx_MSC *mscSfr = msc->msc;
642
643 /* Downstream command */
644 mscSfr->DC.U = command;
645 }
646
647
648 void IfxMsc_Msc_sendData(IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
649 {
650 Ifx_MSC *mscSfr = msc->msc;
651
652 {
653 Ifx_MSC_DD dd;
654 dd.B.DDL = dataLow;
655 dd.B.DDH = dataHigh;
656
657 /* Downstream Data */
658 mscSfr->DD.U = dd.U;
659 }
660
661 /* Send data */
662 mscSfr->ISC.B.SDP = 1;
663 }
664
665
666 void IfxMsc_Msc_sendDataExtension(IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
667 {
668 Ifx_MSC *mscSfr = msc->msc;
669
670 /* Downstream Data (mirror) + extension */
671 mscSfr->DDE.U = dataExtension;
672 mscSfr->DDM.U = data;
673
674 /* Send data */
675 mscSfr->ISC.B.SDP = 1;
676 }
677
678
679 void IfxMsc_Msc_sendDataHigh(IfxMsc_Msc *msc, uint16 data)
680 {
681 Ifx_MSC *mscSfr = msc->msc;
682
683 /* Downstream Data High only */
684 mscSfr->DD.B.DDH = data;
685
686 /* Send data */
687 mscSfr->ISC.B.SDP = 1;
688 }
689
690
691 void IfxMsc_Msc_sendDataLow(IfxMsc_Msc *msc, uint16 data)
692 {
693 Ifx_MSC *mscSfr = msc->msc;
694
695 /* Downstream Data Low only */
696 mscSfr->DD.B.DDL = data;
697
698 /* Send data */
699 mscSfr->ISC.B.SDP = 1;
700 }
701
702
703 void IfxMsc_Msc_setCommandTarget(IfxMsc_Msc *msc, IfxMsc_Target enX)
704 {
705 Ifx_MSC *mscSfr = msc->msc;
706
707 IfxMsc_setCommandTarget(mscSfr, enX);
708 }
709
710
711 void IfxMsc_Msc_setDataTarget(IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
712 {
713 Ifx_MSC *mscSfr = msc->msc;
714
715 /* Set data low target */
716 IfxMsc_setDataLowTarget(mscSfr, enXLow);
717 /* Set data high target */
718 IfxMsc_setDataHighTarget(mscSfr, enXHigh);
719 }
IfxMsc_Msc_sendDataLow
void IfxMsc_Msc_sendDataLow(IfxMsc_Msc *msc, uint16 data)
send high downstream data
Definition: IfxMsc_Msc.c:691
IfxMsc_Msc_Target
IfxMsc_Msc_Target
Msc Instance Number.
Definition: IfxMsc_Msc.h:197
IfxMsc_Msc_UpstreamStatusConfig::upstreamTimeoutValue
IfxMsc_UpstreamTimeoutValue upstreamTimeoutValue
Specifies the Upstream Timeout Value.
Definition: IfxMsc_Msc.h:379
IfxMsc_Sdi_In
SDI pin mapping structure.
Definition: IfxMsc_PinMap.h:64
IfxMsc_Msc_DownstreamControlConfig::passiveTimeFrameCount
IfxMsc_PassiveTimeFrameCount passiveTimeFrameCount
Specifies the Number of Passive Time Frames.
Definition: IfxMsc_Msc.h:295
IfxMsc_Msc_Abra::clockSelectAbra
IfxMsc_ClockSelect clockSelectAbra
Specifies the clock select for ABRA.
Definition: IfxMsc_Msc.h:272
IfxMsc_DataFrameLength_16
SRx[15:0] Shifted.
Definition: IfxMsc.h:379
IfxMsc_Msc_DownstreamControlConfig::srhActivePhaseSelection
IfxMsc_ActivePhaseSelection srhActivePhaseSelection
Specifies the Enable SRL active phase selection bit.
Definition: IfxMsc_Msc.h:292
IfxMsc_Msc_Io::fclp
IfxMsc_Msc_fclp fclp
Definition: IfxMsc_Msc.h:345
IfxMsc_Msc_InterruptConfig::timeFrameInterrupt
IfxMsc_TimeFrameInterrupt timeFrameInterrupt
Specifies the Time Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:330
IfxMsc_Msc_OutputControlConfig::sopPolarity
IfxMsc_SoLinePolarity sopPolarity
Specifies the SLP Polarity.
Definition: IfxMsc_Msc.h:364
IfxMsc_Msc_Io::en1
IfxMsc_Msc_en en1
Definition: IfxMsc_Msc.h:350
IfxMsc_Msc_setCommandTarget
void IfxMsc_Msc_setCommandTarget(IfxMsc_Msc *msc, IfxMsc_Target enX)
set the command for target
Definition: IfxMsc_Msc.c:703
IfxMsc_Msc_DownstreamControlConfig::externalSignalInjectionPin0
IfxMsc_ExternalSignalInjection externalSignalInjectionPin0
Specifies the Injection Enable Pin 0.
Definition: IfxMsc_Msc.h:296
IfxMsc_Msc_UpstreamStatusConfig::serviceRequestDelay
IfxMsc_ServiceRequestDelay serviceRequestDelay
Specifies the Service Request Delay.
Definition: IfxMsc_Msc.h:377
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:133
IfxMsc_TimeFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:812
IfxMsc_OverflowInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:634
IfxMsc_downstreamAbraBaudCalculator
uint32 IfxMsc_downstreamAbraBaudCalculator(uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled.
Definition: IfxMsc.c:86
IfxMsc_setDataHighTarget
IFX_INLINE void IfxMsc_setDataHighTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data high phase.
Definition: IfxMsc.h:1668
IfxMsc_Msc
MSC base address data Structure.
Definition: IfxMsc_Msc.h:388
IfxMsc_ClockSelect_fspb
f_SPB is the clock source for the ABRA block
Definition: IfxMsc.h:117
IfxMsc_Msc_fclp::pin
IfxMsc_Fclp_Out * pin
Definition: IfxMsc_Msc.h:225
IfxMsc_Msc_Target_low
MSC Target Low.
Definition: IfxMsc_Msc.h:199
IfxMsc_Msc_en::pin
IfxMsc_En_Out * pin
Definition: IfxMsc_Msc.h:213
IfxMsc_Msc_DownstreamControlExtensionConfig::downstreamExtensionDataSourcesLow
uint32 downstreamExtensionDataSourcesLow
Specifies the Downstream Select Data Source Low Extension.
Definition: IfxMsc_Msc.h:313
IfxMsc_Msc_DownstreamControlConfig::dataFramePassivePhaseLength
IfxMsc_DataFramePassivePhaseLength dataFramePassivePhaseLength
Specifies the Passive Phase Length at Data Frames.
Definition: IfxMsc_Msc.h:294
IfxMsc_SdiLinePolarity_likeSi
SDI and SI signal polarities are identical.
Definition: IfxMsc.h:700
IfxMsc_TimeFrameInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:803
IfxMsc_DataFramePassivePhaseLength_2
Passive phase length is 2 tFCL.
Definition: IfxMsc.h:387
IfxMsc_Msc_Abra::highPhaseOfShiftClock
IfxMsc_ShiftClockPhaseDuration highPhaseOfShiftClock
Specifies High phase of shift clock.
Definition: IfxMsc_Msc.h:269
IfxMsc_Msc_Io::en3
IfxMsc_Msc_en en3
Definition: IfxMsc_Msc.h:352
IfxMsc_NDividerDownstream_1
division ratio is 1
Definition: IfxMsc.h:602
IfxMsc_Msc_InterruptConfig::receiveDataInterrupt
IfxMsc_ReceiveDataInterrupt receiveDataInterrupt
Specifies the Receive Interrupt Mode.
Definition: IfxMsc_Msc.h:332
IfxMsc_ExternalSignalInjection_disabled
Disables the external signal injection in a data frame.
Definition: IfxMsc.h:522
IfxMsc_Msc_OutputControlConfig::fclClockControl
IfxMsc_FclClockControlEnabled fclClockControl
Specifies the CLKCTRL Polarity.
Definition: IfxMsc_Msc.h:367
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxMsc_setCommandTarget
IFX_INLINE void IfxMsc_setCommandTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for command phase.
Definition: IfxMsc.h:1661
IfxMsc_UpstreamChannelFrameType_12bit
12-bit Upstream frame selected
Definition: IfxMsc.h:853
IfxMsc_ControlFrameExtensionPassivePhaseLength_0
Length of Command frames passive phase is 2.
Definition: IfxMsc.h:196
IfxMsc_Msc_DownstreamControlExtensionConfig::downstreamExtensionDataSourcesHigh
uint32 downstreamExtensionDataSourcesHigh
Specifies the Downstream Select Data Source High Extension.
Definition: IfxMsc_Msc.h:314
IfxMsc_Msc_sdi::mode
IfxPort_InputMode mode
Definition: IfxMsc_Msc.h:244
IfxMsc_Msc_sendDataHigh
void IfxMsc_Msc_sendDataHigh(IfxMsc_Msc *msc, uint16 data)
send high downstream data
Definition: IfxMsc_Msc.c:679
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxMsc_setDataLowTarget
IFX_INLINE void IfxMsc_setDataLowTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data low phase.
Definition: IfxMsc.h:1675
IfxMsc_Msc_InterruptConfig::underflowInterrupt
IfxMsc_UnderflowInterrupt underflowInterrupt
Specifies the ABRA Underflow Interrupt Mode.
Definition: IfxMsc_Msc.h:338
IfxMsc_CommandDataCommandRepetitionMode_disabled
Disables the automatic insertion of data.
Definition: IfxMsc.h:127
IfxMsc_ActivePhaseSelection_none
No selection bit inserted.
Definition: IfxMsc.h:89
IfxMsc_OverflowInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:638
IfxMsc_FclLinePolarity_nonInverted
FCLP and FCL signal polarity is identical.
Definition: IfxMsc.h:540
IfxMsc_Msc_DownstreamControlConfig::srlActivePhaseSelection
IfxMsc_ActivePhaseSelection srlActivePhaseSelection
Specifies the Enable SRL active phase selection bit.
Definition: IfxMsc_Msc.h:291
IfxMsc_initSopPin
IFX_INLINE void IfxMsc_initSopPin(const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SOP output.
Definition: IfxMsc.h:1633
IfxMsc_DataFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:352
IfxMsc_Msc_Config::abraConfig
IfxMsc_Msc_Abra abraConfig
Specifies the ABRA configuration.
Definition: IfxMsc_Msc.h:404
IfxMsc_AsynchronousBlock_bypassed
Asynchronous block and the n-divider of the MSC downstream path are bypassed and are disabled...
Definition: IfxMsc.h:98
IfxMsc_Msc_Io::pinDriver
IfxPort_PadDriver pinDriver
Definition: IfxMsc_Msc.h:356
IfxMsc_Msc_fcln::pin
IfxMsc_Fcln_Out * pin
Definition: IfxMsc_Msc.h:219
IfxMsc_UpstreamTimeoutValue_16
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:936
IfxMsc_PassiveTimeFrameCount_0
No Passive time frames inserted.
Definition: IfxMsc.h:655
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxMsc_Msc_UpstreamStatusConfig::upstreamTimeoutPrescaler
IfxMsc_UpstreamTimeoutPrescaler upstreamTimeoutPrescaler
Specifies the Upstream Timeout Prescaler.
Definition: IfxMsc_Msc.h:378
IfxMsc_initSdiPin
IFX_INLINE void IfxMsc_initSdiPin(const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SDI input.
Definition: IfxMsc.h:1612
IfxMsc_Msc_sendCommand
void IfxMsc_Msc_sendCommand(IfxMsc_Msc *msc, uint32 command)
send downstream command
Definition: IfxMsc_Msc.c:639
IfxMsc_ChipSelectActiveState_low
EN[3:0] and ENL,ENH,ENC polarities are inverted.
Definition: IfxMsc.h:108
IfxMsc_Msc_sdi::pin
IfxMsc_Sdi_In * pin
Definition: IfxMsc_Msc.h:243
IfxMsc_Msc_initModule
void IfxMsc_Msc_initModule(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC module
Definition: IfxMsc_Msc.c:78
IfxMsc_initInjPin
IFX_INLINE void IfxMsc_initInjPin(const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a INJ input.
Definition: IfxMsc.h:1602
IfxMsc_Msc_deInitModule
void IfxMsc_Msc_deInitModule(IfxMsc_Msc *msc)
de-initialize MSC module
Definition: IfxMsc_Msc.c:54
IfxMsc_initFclnPin
IFX_INLINE void IfxMsc_initFclnPin(const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLN output.
Definition: IfxMsc.h:1582
IfxMsc_Msc_setDataTarget
void IfxMsc_Msc_setDataTarget(IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
set the target data to be transmitted during low and high phase
Definition: IfxMsc_Msc.c:711
IfxMsc_ServiceRequestDelay_noDelay
No Delay.
Definition: IfxMsc.h:724
IfxMsc_Msc_Config::clockConfig
IfxMsc_Msc_Clock clockConfig
Specifies the Clock configuration.
Definition: IfxMsc_Msc.h:398
IfxMsc_Msc_DownstreamControlConfig::externalSignalInjectionPin1
IfxMsc_ExternalSignalInjection externalSignalInjectionPin1
Specifies the Injection Enable Pin 1.
Definition: IfxMsc_Msc.h:298
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxMsc_Msc_getTarget
IfxMsc_Target IfxMsc_Msc_getTarget(IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
get the target during high and low phase
Definition: IfxMsc_Msc.c:60
IfxMsc_Msc_son::pin
IfxMsc_Son_Out * pin
Definition: IfxMsc_Msc.h:249
IfxMsc_Msc_initializeAbra
void IfxMsc_Msc_initializeAbra(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the ABRA block
Definition: IfxMsc_Msc.c:541
IfxMsc_Msc_InterruptConfig::timeFrameInterruptNode
IfxMsc_TimeFrameInterruptNode timeFrameInterruptNode
Specifies the Time Frame Interrupt Node.
Definition: IfxMsc_Msc.h:329
IfxMsc_Msc_DownstreamControlConfig::srlDataFrameLength
IfxMsc_DataFrameLength srlDataFrameLength
Specifies the Number of SRL bits shifted at data frames.
Definition: IfxMsc_Msc.h:289
IfxMsc_getDataHighTarget
IFX_INLINE IfxMsc_Target IfxMsc_getDataHighTarget(Ifx_MSC *msc)
Get the selected target during high phase.
Definition: IfxMsc.h:1487
IfxMsc_Msc_InterruptConfig::overflowInterruptNode
IfxMsc_OverflowInterruptNode overflowInterruptNode
Specifies the ABRA Overflow Interrupt Node.
Definition: IfxMsc_Msc.h:335
IfxMsc_Msc_InterruptConfig::upstreamTimeoutInterrupt
IfxMsc_UpstreamTimeoutInterrupt upstreamTimeoutInterrupt
Specifies the Upstream Timeout Interrupt Mode.
Definition: IfxMsc_Msc.h:334
IfxMsc_Msc_initializeDataExtension
void IfxMsc_Msc_initializeDataExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC data extension block for 64bit operation
Definition: IfxMsc_Msc.c:571
IfxMsc_Msc_DownstreamControlConfig::injectionPositionPin1
IfxMsc_ExternalBitInjectionPosition injectionPositionPin1
Specifies the Injection Position Pin 1.
Definition: IfxMsc_Msc.h:299
IfxMsc_Msc_InterruptConfig::underflowInterruptNode
IfxMsc_UnderflowInterruptNode underflowInterruptNode
Specifies the ABRA Underflow Interrupt Node.
Definition: IfxMsc_Msc.h:337
IfxMsc_Msc_DownstreamControlConfig::commandDataCommandReceptionMode
IfxMsc_CommandDataCommandRepetitionMode commandDataCommandReceptionMode
Specifies the Command-Data-Command in Data Repetition Mode.
Definition: IfxMsc_Msc.h:300
IfxPort_PadDriver_cmosAutomotiveSpeed3
Speed grade 3.
Definition: IfxPort.h:146
IfxMsc_DataFrameInterrupt_disabled
Interrupt generation Disable.
Definition: IfxMsc.h:342
IfxMsc_MsbBitDataExtension_notPresent
Additional MSB bit is not present in the extension of the NDBL/NDBH bit field.
Definition: IfxMsc.h:578
IfxMsc_DataFrameExtensionPassivePhaseLength_0
0 Additional MSB bits extension of the PPD bit field
Definition: IfxMsc.h:331
IfxMsc_Msc_InterruptConfig::commandFrameInterruptNode
IfxMsc_CommandFrameInterruptNode commandFrameInterruptNode
Specifies the Command Frame Interrupt Node.
Definition: IfxMsc_Msc.h:327
IfxMsc_Msc_DownstreamControlExtensionConfig::emergencyStopExtensionEnableBits
uint32 emergencyStopExtensionEnableBits
Emergency Stop Extension.
Definition: IfxMsc_Msc.h:315
IfxMsc_Msc_Abra::abraDownstreamBlockBaudrate
uint32 abraDownstreamBlockBaudrate
Specifies ABRA downstream block baud.
Definition: IfxMsc_Msc.h:267
IfxMsc_Msc_Config::upstreamConfig
IfxMsc_Msc_UpstreamStatusConfig upstreamConfig
Specifies the Upstream configuration.
Definition: IfxMsc_Msc.h:399
IfxMsc_Msc_InterruptConfig::overflowInterrupt
IfxMsc_OverflowInterrupt overflowInterrupt
Specifies the ABRA Overflow Interrupt Mode.
Definition: IfxMsc_Msc.h:336
IfxMsc_Son_Out
SON pin mapping structure.
Definition: IfxMsc_PinMap.h:105
IfxMsc_Msc_Io::fcln
IfxMsc_Msc_fcln fcln
Definition: IfxMsc_Msc.h:346
IfxMsc_Msc_OutputControlConfig::cslpPolarity
IfxMsc_ChipSelectActiveState cslpPolarity
Specifies the CSLP Polarity.
Definition: IfxMsc_Msc.h:365
IfxMsc_FclClockControlEnabled_activePhaseOnly
FCL is active during active phases of data or command frames.
Definition: IfxMsc.h:531
IfxMsc_Msc_OutputControlConfig::fclpPolarity
IfxMsc_FclLinePolarity fclpPolarity
Specifies the FCLP Polarity.
Definition: IfxMsc_Msc.h:363
IfxMsc_Msc_Abra::abraBlockBypass
IfxMsc_AsynchronousBlock abraBlockBypass
Specifies ABRA block bypass.
Definition: IfxMsc_Msc.h:271
IfxMsc_Msc_sendData
void IfxMsc_Msc_sendData(IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
send complete downstream data, both high and low
Definition: IfxMsc_Msc.c:648
IfxMsc_upstreamFractionalBaudCalculator
uint64 IfxMsc_upstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional.
Definition: IfxMsc.c:208
IfxMsc_Msc_Io::sdi
IfxMsc_Msc_sdi sdi
Definition: IfxMsc_Msc.h:353
IfxMsc_UpstreamTimeoutPrescaler_32768
Prescale value 32768 for the upstream time-out limit.
Definition: IfxMsc.h:913
IfxMsc_Msc_InterruptConfig::dataFrameInterrupt
IfxMsc_DataFrameInterrupt dataFrameInterrupt
Specifies the Data Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:326
IfxMsc_Msc_Io::en2
IfxMsc_Msc_en en2
Definition: IfxMsc_Msc.h:351
IfxMsc_Fcln_Out
FCLN pin mapping structure.
Definition: IfxMsc_PinMap.h:89
IfxMsc_Msc_sendDataExtension
void IfxMsc_Msc_sendDataExtension(IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
Send downstream data extension (64bit)
Definition: IfxMsc_Msc.c:666
IfxMsc_Msc::msc
Ifx_MSC * msc
Specifies the pointer to the MSC registers.
Definition: IfxMsc_Msc.h:390
IfxMsc_Extension_enabled
Enables the extension bit fields.
Definition: IfxMsc.h:443
IfxMsc_Msc_InterruptConfig::upstreamTimeoutInterruptNode
IfxMsc_UpstreamTimeoutInterruptNode upstreamTimeoutInterruptNode
Specifies the Upstream Timeout Interrupt Node.
Definition: IfxMsc_Msc.h:333
IfxMsc_upstreamNormalBaudCalculator
uint32 IfxMsc_upstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal.
Definition: IfxMsc.c:231
IfxMsc_UnderflowInterrupt_disabled
Disables the path of the Underflow interrupt towards the interrupt node.
Definition: IfxMsc.h:832
IfxMsc_ShiftClockPhaseDuration_1
Duration in periods of f_A is 1.
Definition: IfxMsc.h:733
IfxMsc_Msc_InterruptConfig::dataFrameInterruptNode
IfxMsc_DataFrameInterruptNode dataFrameInterruptNode
Specifies the Data Frame Interrupt Node.
Definition: IfxMsc_Msc.h:325
IfxMsc_En_Out
EN pin mapping structure.
Definition: IfxMsc_PinMap.h:72
IfxMsc_HardwareClock_enabled
Hardware clock enable.
Definition: IfxMsc.h:549
IfxMsc_Msc_Clock::dividerMode
IfxMsc_DividerMode dividerMode
Specifies divided clock properties.
Definition: IfxMsc_Msc.h:280
IfxMsc_Msc_DownstreamControlConfig::downstreamDataSourcesHigh
uint32 downstreamDataSourcesHigh
Specifies the Downstream Data Source selections High.
Definition: IfxMsc_Msc.h:302
IfxMsc_initFclpPin
IFX_INLINE void IfxMsc_initFclpPin(const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLP output.
Definition: IfxMsc.h:1592
IfxMsc_Msc_Config::downstreamExtensionConfig
IfxMsc_Msc_DownstreamControlExtensionConfig downstreamExtensionConfig
Specifies the Downstream Extension configuration.
Definition: IfxMsc_Msc.h:403
IfxMsc_OverflowInterrupt_disabled
Disables the path of the overflow interrupt towards the interrupt node.
Definition: IfxMsc.h:625
IfxMsc_Msc_DownstreamControlExtensionConfig::nDividerDownstream
IfxMsc_NDividerDownstream nDividerDownstream
Specifies the division ratio for downstream generator clock.
Definition: IfxMsc_Msc.h:318
IfxMsc_Msc_Abra::nDividerAbra
IfxMsc_NDividerAbra nDividerAbra
Specifies the N divider.
Definition: IfxMsc_Msc.h:270
IfxMsc_Msc.h
MSC MSC details.
IfxMsc_ReceiveDataInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:689
IfxMsc_Msc_DownstreamControlConfig::commandFrameLength
IfxMsc_CommandFrameLength commandFrameLength
Specifies the Number of bits shifted at command frames.
Definition: IfxMsc_Msc.h:293
IfxMsc_Msc_Config::downstreamConfig
IfxMsc_Msc_DownstreamControlConfig downstreamConfig
Specifies the Downstream configuration.
Definition: IfxMsc_Msc.h:402
IfxMsc_Msc_fclp::mode
IfxPort_OutputMode mode
Definition: IfxMsc_Msc.h:226
IfxMsc_Fclp_Out
FCLP pin mapping structure.
Definition: IfxMsc_PinMap.h:81
IfxMsc_CommandFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:145
IfxMsc_Msc_InterruptConfig::commandFrameInterrupt
IfxMsc_CommandFrameInterrupt commandFrameInterrupt
Specifies the Command Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:328
IfxMsc_Msc_DownstreamControlExtensionConfig::srlBitsShiftedAtDataFramesExtension
IfxMsc_MsbBitDataExtension srlBitsShiftedAtDataFramesExtension
Specifies the Number of SRLE bits shifted at Data Frames.
Definition: IfxMsc_Msc.h:311
IfxMsc_Msc_receiveData
uint32 IfxMsc_Msc_receiveData(IfxMsc_Msc *msc, uint8 upstreamIdx)
receive upstream data
Definition: IfxMsc_Msc.c:618
IfxMsc_Msc_DownstreamControlConfig::injectionPositionPin0
IfxMsc_ExternalBitInjectionPosition injectionPositionPin0
Specifies the Injection Position Pin 0.
Definition: IfxMsc_Msc.h:297
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxMsc_Msc_UpstreamStatusConfig::upstreamChannelFrameType
IfxMsc_UpstreamChannelFrameType upstreamChannelFrameType
Specifies the Upstream Channel Frame Type.
Definition: IfxMsc_Msc.h:374
IfxMsc_Inj_In
INJ pin mapping structure.
Definition: IfxMsc_PinMap.h:56
IfxMsc_Msc_Config::interruptConfig
IfxMsc_Msc_InterruptConfig interruptConfig
Specifies the Interrupt configuration.
Definition: IfxMsc_Msc.h:400
IfxMsc_Msc_DownstreamControlConfig::emergencyStopEnableBits
uint32 emergencyStopEnableBits
Emergency Stop.
Definition: IfxMsc_Msc.h:303
IfxMsc_Msc_InterruptConfig::receiveDataInterruptNode
IfxMsc_ReceiveDataInterruptNode receiveDataInterruptNode
Specifies the Receive Interrupt Node.
Definition: IfxMsc_Msc.h:331
IfxMsc_Msc_Io::inj0
IfxMsc_Msc_inj0 inj0
Definition: IfxMsc_Msc.h:354
IfxMsc_Msc_initModuleConfig
void IfxMsc_Msc_initModuleConfig(IfxMsc_Msc_Config *config, Ifx_MSC *msc)
initialize the MSC module configuration
Definition: IfxMsc_Msc.c:407
IfxMsc_Msc_DownstreamControlConfig::downstreamDataSourcesLow
uint32 downstreamDataSourcesLow
Specifies the Downstream Data Source selections Low.
Definition: IfxMsc_Msc.h:301
IfxMsc_Msc_UpstreamStatusConfig::upstreamChannelReceivingRate
IfxMsc_UpstreamChannelReceivingRate upstreamChannelReceivingRate
Specifies the Upstream Channel Receiving Rate.
Definition: IfxMsc_Msc.h:375
IfxMsc_UpstreamTimeoutInterrupt_disabled
Upstream Timeout Interrupt Disabled.
Definition: IfxMsc.h:877
IfxMsc_Msc_Abra::lowPhaseOfShiftClock
IfxMsc_ShiftClockPhaseDuration lowPhaseOfShiftClock
Specifies Low phase of shift clock.
Definition: IfxMsc_Msc.h:268
IfxMsc_ExternalBitInjectionPosition_0
Injected external bit is at Position 0 of the data frame.
Definition: IfxMsc.h:451
IfxMsc_Msc_Clock::baudrate
uint32 baudrate
Specifies the baud rate.
Definition: IfxMsc_Msc.h:279
IfxMsc_Parity_even
Even Parity.
Definition: IfxMsc.h:646
IfxMsc_SoLinePolarity_nonInverted
SOP and SO polarity is identical.
Definition: IfxMsc.h:765
IfxMsc_Msc_DownstreamControlConfig::transmissionMode
IfxMsc_TransmissionMode transmissionMode
Specifies the transmission Mode.
Definition: IfxMsc_Msc.h:288
IfxMsc_Sop_Out
SOP pin mapping structure.
Definition: IfxMsc_PinMap.h:97
IfxMsc_UpstreamChannelReceivingRate_16
Baud rate = f_MSC / 16.
Definition: IfxMsc.h:865
IfxMsc_Msc_sop::pin
IfxMsc_Sop_Out * pin
Definition: IfxMsc_Msc.h:255
IfxMsc_initEnPin
IFX_INLINE void IfxMsc_initEnPin(const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a EN output.
Definition: IfxMsc.h:1572
IfxMsc_UnderflowInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:845
IfxMsc_Msc_OutputControlConfig::sdiLinePolarity
IfxMsc_SdiLinePolarity sdiLinePolarity
Specifies the ILP Polarity.
Definition: IfxMsc_Msc.h:366
IfxMsc_getUpstreamValidFlag
IFX_INLINE boolean IfxMsc_getUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
Get the status of the valid flag.
Definition: IfxMsc.h:1562
IfxMsc_Msc_Io
MSC Pin Configuration Structure.
Definition: IfxMsc_Msc.h:343
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxMsc_Msc_Io::en0
IfxMsc_Msc_en en0
Definition: IfxMsc_Msc.h:349
IfxMsc_ReceiveDataInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:678
IfxMsc_Extension_disabled
Disables the extension bit fields.
Definition: IfxMsc.h:442
IfxMsc_Msc_inj0::pin
IfxMsc_Inj_In * pin
Definition: IfxMsc_Msc.h:231
IfxMsc_CommandFrameInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:136
IfxMsc_Msc_Io::inj1
IfxMsc_Msc_inj1 inj1
Definition: IfxMsc_Msc.h:355
IfxMsc_Msc_Target_high
MSC Target High.
Definition: IfxMsc_Msc.h:200
IfxMsc_UnderflowInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:841
IfxMsc_Target_en0
Target EN0.
Definition: IfxMsc.h:792
IfxMsc_Target
IfxMsc_Target
Msc Targets - use as chip enable selection for ENH, ENL and ENC.
Definition: IfxMsc.h:790
IfxMsc_Msc_Io::son
IfxMsc_Msc_son son
Definition: IfxMsc_Msc.h:348
IfxMsc_Msc_Config
MSC Module Configuration Structure.
Definition: IfxMsc_Msc.h:395
IfxMsc_getData
IFX_INLINE uint16 IfxMsc_getData(Ifx_MSC *msc, uint8 upstreamIdx)
Get the upstream data from upstream data register.
Definition: IfxMsc.h:1477
IfxMsc_CommandFrameLength_32
SRL[15:0] and SRH[15:0] Shifted.
Definition: IfxMsc.h:188
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxMsc_UpstreamTimeoutInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:886
IfxMsc_enableModule
void IfxMsc_enableModule(Ifx_MSC *msc)
Enable MSC kernel.
Definition: IfxMsc.c:127
IfxMsc_Msc_DownstreamControlExtensionConfig::dataFrameExtensionPassivePhaseLength
IfxMsc_DataFrameExtensionPassivePhaseLength dataFrameExtensionPassivePhaseLength
Specifies the Passive Phase Length at Data Frames Extension.
Definition: IfxMsc_Msc.h:316
IfxMsc_UpstreamTimeoutInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:890
IfxPort_InputMode_pullUp
Definition: IfxPort.h:85
IfxMsc_Msc_DownstreamControlExtensionConfig::controlFrameExtensionPassivePhaseLength
IfxMsc_ControlFrameExtensionPassivePhaseLength controlFrameExtensionPassivePhaseLength
Specifies the Passive Phase Length at Control Frames Extension.
Definition: IfxMsc_Msc.h:317
IfxMsc_initSonPin
IFX_INLINE void IfxMsc_initSonPin(const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SON output.
Definition: IfxMsc.h:1623
IfxMsc_clearUpstreamValidFlag
IFX_INLINE void IfxMsc_clearUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
Clear the valid flag.
Definition: IfxMsc.h:1447
IfxMsc_TransmissionMode_triggered
Triggered Mode.
Definition: IfxMsc.h:823
IfxMsc_Msc_DownstreamControlConfig::srhDataFrameLength
IfxMsc_DataFrameLength srhDataFrameLength
Specifies the Number of SRH bits shifted at data frames.
Definition: IfxMsc_Msc.h:290
IfxMsc_Msc_DownstreamControlExtensionConfig::extension
IfxMsc_Extension extension
Specifies the Extension Enable.
Definition: IfxMsc_Msc.h:310
IfxMsc_DividerMode_normal
divider mode is normal
Definition: IfxMsc.h:424
IfxMsc_Msc_Config::outputControlConfig
IfxMsc_Msc_OutputControlConfig outputControlConfig
Specifies the Output Control configuration.
Definition: IfxMsc_Msc.h:401
IfxMsc_Msc_Config::io
IfxMsc_Msc_Io io
Specifies the IO Pin configuration.
Definition: IfxMsc_Msc.h:406
IfxMsc_Msc_DownstreamControlExtensionConfig::srhBitsShiftedAtDataFramesExtension
IfxMsc_MsbBitDataExtension srhBitsShiftedAtDataFramesExtension
Specifies the Number of SRHE bits shifted at Data Frames.
Definition: IfxMsc_Msc.h:312
IfxMsc_NDividerAbra_1
Division ratio is 1.
Definition: IfxMsc.h:587
IfxMsc_getDataLowTarget
IFX_INLINE IfxMsc_Target IfxMsc_getDataLowTarget(Ifx_MSC *msc)
Get the selected target during low phase.
Definition: IfxMsc.h:1494
IfxMsc_Msc_UpstreamStatusConfig::parity
IfxMsc_Parity parity
Specifies the Parity Mode.
Definition: IfxMsc_Msc.h:376
IfxMsc_Msc_Config::target
IfxMsc_Target target[IFXMSC_NUM_ENABLE_SELECT_LINES]
Specifies the Downstream targets.
Definition: IfxMsc_Msc.h:405
IfxMsc_resetModule
void IfxMsc_resetModule(Ifx_MSC *msc)
Reset MSC kernel.
Definition: IfxMsc.c:187
IfxMsc_Msc_Io::sop
IfxMsc_Msc_sop sop
Definition: IfxMsc_Msc.h:347


iLLD_TC26B: IfxMsc_Msc.h Source File

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IfxMsc_Msc.h
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1 /**
2 * \file IfxMsc_Msc.h
3 * \brief MSC MSC details
4 * \ingroup IfxLld_Msc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Msc_Msc_Usage How to use the MSC Interface driver?
44 * \ingroup IfxLld_Msc
45 *
46 * The MSC interface driver provides a default MSC configuration
47 *
48 *
49 *
50 * In the following sections it will be described, how to integrate the driver into the application framework.
51 *
52 * \section IfxLld_Msc_Msc_Preparation Preparation
53 * \subsection IfxLld_Msc_Msc_Include Include Files
54 *
55 * Include following header file into your C code:
56 * \code
57 * #include <Msc/Msc/IfxMsc_Msc.h>
58 * \endcode
59 *
60 * \subsection IfxLld_Msc_Msc_Variables Variables
61 *
62 * Declare the MSC handle as global variable in your C code:
63 *
64 * \code
65 * // MSC handle
66 * static IfxMsc_Msc *msc;
67 *
68 * // IO Pins
69 * static const IfxMsc_Msc_Io IfxMsc_PinMap[IFXMSC_NUM_MODULES] = {
70 * {
71 * { &IfxMsc0_FCLP_P13_1_OUT, IfxPort_OutputMode_pushPull },
72 * { &IfxMsc0_FCLN_P13_0_OUT, IfxPort_OutputMode_pushPull },
73 * { &IfxMsc0_SOP_P13_3_OUT, IfxPort_OutputMode_pushPull },
74 * { &IfxMsc0_SON_P13_2_OUT, IfxPort_OutputMode_pushPull },
75 * { &IfxMsc0_EN0_P10_3_OUT, IfxPort_OutputMode_pushPull },
76 * { &IfxMsc0_EN1_P11_2_OUT, IfxPort_OutputMode_pushPull },
77 * {NULL_PTR},
78 * {NULL_PTR},
79 * { &IfxMsc0_SDI0_P11_10_IN, IfxPort_InputMode_pullUp },
80 * { &IfxMsc0_INJ0_P00_0_IN, IfxPort_InputMode_pullUp },
81 * { &IfxMsc0_INJ1_P10_5_IN, IfxPort_InputMode_pullUp },
82 * IfxPort_PadDriver_cmosAutomotiveSpeed3
83 * },
84 *
85 * #if IFXMSC_NUM_MODULES >= 2
86 * {
87 * { &IfxMsc1_FCLP_P22_1_OUT, IfxPort_OutputMode_pushPull },
88 * { &IfxMsc1_FCLN_P22_0_OUT, IfxPort_OutputMode_pushPull },
89 * { &IfxMsc1_SOP_P22_3_OUT, IfxPort_OutputMode_pushPull },
90 * { &IfxMsc1_SON_P22_2_OUT, IfxPort_OutputMode_pushPull },
91 * { &IfxMsc1_EN0_P23_4_OUT, IfxPort_OutputMode_pushPull },
92 * { &IfxMsc1_EN1_P23_5_OUT, IfxPort_OutputMode_pushPull },
93 * {NULL_PTR},
94 * {NULL_PTR},
95 * { &IfxMsc1_SDI0_P23_1_IN, IfxPort_InputMode_pullUp },
96 * { &IfxMsc1_INJ0_P23_3_IN, IfxPort_InputMode_pullUp },
97 * { &IfxMsc1_INJ1_P33_13_IN, IfxPort_InputMode_pullUp },
98 * IfxPort_PadDriver_cmosAutomotiveSpeed3
99 * },
100 * #endif
101 * };
102 * \endcode
103 *
104 * \subsection IfxLld_Msc_Msc_Init Module Initialisation
105 *
106 * The module initialisation can be done as followed:
107 * \code
108 * // create configuration (same is used for all MSCs)
109 * IfxMsc_Msc_Config mscConfig;
110 * IfxMsc_Msc_initModuleConfig(&mscConfig, &MODULE_MSC0);
111 *
112 * // increase baudrate for faster simulation:
113 * mscConfig.clockConfig.baudrate = 25000000;
114 * mscConfig.clockConfig.dividerMode = IfxMsc_DividerMode_fractional;
115 *
116 * // FCL only activated on transfers
117 * mscConfig.outputControlConfig.fclClockControl = IfxMsc_FclClockControlEnabled_activePhaseOnly;
118 *
119 * // in this case we also don't need a selection bit
120 * mscConfig.downstreamConfig.srlActivePhaseSelection = IfxMsc_ActivePhaseSelection_none;
121 * mscConfig.downstreamConfig.srhActivePhaseSelection = IfxMsc_ActivePhaseSelection_none;
122 *
123 * // initialize MSCs
124 * for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
125 * // init module pointer
126 * mscConfig.msc = (Ifx_MSC*)IfxMsc_cfg_indexMap[i].module;
127 *
128 * // IO Config
129 * mscConfig.io = IfxMsc_PinMap[i];
130 *
131 * // initialize module
132 * IfxMsc_Msc_initModule(&msc[i], &mscConfig);
133 * }
134 * \endcode
135 *
136 * The MSC is ready for use now!
137 *
138 *
139 * \section IfxLld_Msc_Msc_DataTransfers Data Transfers
140 *
141 * The MSC driver provides simple to use transfer function
142 *
143 * \code
144 * for(int n=0; n<10; ++n) {
145 * // clear IRQ flag of previous transfer
146 * for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
147 * msc[i].msc->ISC.B.CDEDI = 1;
148 * }
149 *
150 * // new transfer
151 * for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
152 * const unsigned dataL = i*0x1000 + n;
153 * const unsigned dataH = i*0x1000 + 0x0100 + n;
154 * IfxMsc_Msc_sendData(&msc[i], dataL, dataH);
155 * }
156 * // wait until transfers are finished
157 * for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
158 * while( !msc[i].msc->ISR.B.DEDI ); // check if new data could be written
159 * while( msc[i].msc->DSS.B.DFA ); // check if we are still in the active data phase
160 * }
161 * }
162 * \endcode
163 *
164 * \defgroup IfxLld_Msc_Msc MSC
165 * \ingroup IfxLld_Msc
166 * \defgroup IfxLld_Msc_Msc_Enumerations Enumerations
167 * \ingroup IfxLld_Msc_Msc
168 * \defgroup IfxLld_Msc_Msc_Data_Structures Data Structures
169 * \ingroup IfxLld_Msc_Msc
170 * \defgroup IfxLld_Msc_Msc_Module_Initialize_Functions Module Initialize Functions
171 * \ingroup IfxLld_Msc_Msc
172 * \defgroup IfxLld_Msc_Msc_Send_Functions Send Functions
173 * \ingroup IfxLld_Msc_Msc
174 * \defgroup IfxLld_Msc_Msc_Receive_Functions Receive Functions
175 * \ingroup IfxLld_Msc_Msc
176 * \defgroup IfxLld_Msc_Msc_Target_Read_Write_Functions Target Read Write Functions
177 * \ingroup IfxLld_Msc_Msc
178 */
179
180 #ifndef IFXMSC_MSC_H
181 #define IFXMSC_MSC_H 1
182
183 /******************************************************************************/
184 /*----------------------------------Includes----------------------------------*/
185 /******************************************************************************/
186
187 #include "Msc/Std/IfxMsc.h"
188
189 /******************************************************************************/
190 /*--------------------------------Enumerations--------------------------------*/
191 /******************************************************************************/
192
193 /** \addtogroup IfxLld_Msc_Msc_Enumerations
194 * \{ */
195 /** \brief Msc Instance Number
196 */
197 typedef enum
198 {
199 IfxMsc_Msc_Target_low = 0, /**< \brief MSC Target Low */
200 IfxMsc_Msc_Target_high = 1 /**< \brief MSC Target High */
201 } IfxMsc_Msc_Target;
202
203 /** \} */
204
205 /******************************************************************************/
206 /*-----------------------------Data Structures--------------------------------*/
207 /******************************************************************************/
208
209 /** \addtogroup IfxLld_Msc_Msc_Data_Structures
210 * \{ */
211 typedef struct
212 {
213 IfxMsc_En_Out *pin;
214 IfxPort_OutputMode mode;
215 } IfxMsc_Msc_en;
216
217 typedef struct
218 {
219 IfxMsc_Fcln_Out *pin;
220 IfxPort_OutputMode mode;
221 } IfxMsc_Msc_fcln;
222
223 typedef struct
224 {
225 IfxMsc_Fclp_Out *pin;
226 IfxPort_OutputMode mode;
227 } IfxMsc_Msc_fclp;
228
229 typedef struct
230 {
231 IfxMsc_Inj_In *pin;
232 IfxPort_InputMode mode;
233 } IfxMsc_Msc_inj0;
234
235 typedef struct
236 {
237 IfxMsc_Inj_In *pin;
238 IfxPort_InputMode mode;
239 } IfxMsc_Msc_inj1;
240
241 typedef struct
242 {
243 IfxMsc_Sdi_In *pin;
244 IfxPort_InputMode mode;
245 } IfxMsc_Msc_sdi;
246
247 typedef struct
248 {
249 IfxMsc_Son_Out *pin;
250 IfxPort_OutputMode mode;
251 } IfxMsc_Msc_son;
252
253 typedef struct
254 {
255 IfxMsc_Sop_Out *pin;
256 IfxPort_OutputMode mode;
257 } IfxMsc_Msc_sop;
258
259 /** \} */
260
261 /** \addtogroup IfxLld_Msc_Msc_Data_Structures
262 * \{ */
263 /** \brief ABRA block Configuration Structure
264 */
265 typedef struct
266 {
267 uint32 abraDownstreamBlockBaudrate; /**< \brief Specifies ABRA downstream block baud */
268 IfxMsc_ShiftClockPhaseDuration lowPhaseOfShiftClock; /**< \brief Specifies Low phase of shift clock */
269 IfxMsc_ShiftClockPhaseDuration highPhaseOfShiftClock; /**< \brief Specifies High phase of shift clock */
270 IfxMsc_NDividerAbra nDividerAbra; /**< \brief Specifies the N divider */
271 IfxMsc_AsynchronousBlock abraBlockBypass; /**< \brief Specifies ABRA block bypass */
272 IfxMsc_ClockSelect clockSelectAbra; /**< \brief Specifies the clock select for ABRA */
273 } IfxMsc_Msc_Abra;
274
275 /** \brief Clock configuration data Structure
276 */
277 typedef struct
278 {
279 uint32 baudrate; /**< \brief Specifies the baud rate */
280 IfxMsc_DividerMode dividerMode; /**< \brief Specifies divided clock properties */
281 uint16 step; /**< \brief Specifies the step value */
282 } IfxMsc_Msc_Clock;
283
284 /** \brief Downstream Control Configuration Structure
285 */
286 typedef struct
287 {
288 IfxMsc_TransmissionMode transmissionMode; /**< \brief Specifies the transmission Mode */
289 IfxMsc_DataFrameLength srlDataFrameLength; /**< \brief Specifies the Number of SRL bits shifted at data frames */
290 IfxMsc_DataFrameLength srhDataFrameLength; /**< \brief Specifies the Number of SRH bits shifted at data frames */
291 IfxMsc_ActivePhaseSelection srlActivePhaseSelection; /**< \brief Specifies the Enable SRL active phase selection bit */
292 IfxMsc_ActivePhaseSelection srhActivePhaseSelection; /**< \brief Specifies the Enable SRL active phase selection bit */
293 IfxMsc_CommandFrameLength commandFrameLength; /**< \brief Specifies the Number of bits shifted at command frames */
294 IfxMsc_DataFramePassivePhaseLength dataFramePassivePhaseLength; /**< \brief Specifies the Passive Phase Length at Data Frames */
295 IfxMsc_PassiveTimeFrameCount passiveTimeFrameCount; /**< \brief Specifies the Number of Passive Time Frames */
296 IfxMsc_ExternalSignalInjection externalSignalInjectionPin0; /**< \brief Specifies the Injection Enable Pin 0 */
297 IfxMsc_ExternalBitInjectionPosition injectionPositionPin0; /**< \brief Specifies the Injection Position Pin 0 */
298 IfxMsc_ExternalSignalInjection externalSignalInjectionPin1; /**< \brief Specifies the Injection Enable Pin 1 */
299 IfxMsc_ExternalBitInjectionPosition injectionPositionPin1; /**< \brief Specifies the Injection Position Pin 1 */
300 IfxMsc_CommandDataCommandRepetitionMode commandDataCommandReceptionMode; /**< \brief Specifies the Command-Data-Command in Data Repetition Mode */
301 uint32 downstreamDataSourcesLow; /**< \brief Specifies the Downstream Data Source selections Low */
302 uint32 downstreamDataSourcesHigh; /**< \brief Specifies the Downstream Data Source selections High */
303 uint32 emergencyStopEnableBits; /**< \brief Emergency Stop */
304 } IfxMsc_Msc_DownstreamControlConfig;
305
306 /** \brief Downstream Control Extension Configuration Structure
307 */
308 typedef struct
309 {
310 IfxMsc_Extension extension; /**< \brief Specifies the Extension Enable */
311 IfxMsc_MsbBitDataExtension srlBitsShiftedAtDataFramesExtension; /**< \brief Specifies the Number of SRLE bits shifted at Data Frames */
312 IfxMsc_MsbBitDataExtension srhBitsShiftedAtDataFramesExtension; /**< \brief Specifies the Number of SRHE bits shifted at Data Frames */
313 uint32 downstreamExtensionDataSourcesLow; /**< \brief Specifies the Downstream Select Data Source Low Extension */
314 uint32 downstreamExtensionDataSourcesHigh; /**< \brief Specifies the Downstream Select Data Source High Extension */
315 uint32 emergencyStopExtensionEnableBits; /**< \brief Emergency Stop Extension */
316 IfxMsc_DataFrameExtensionPassivePhaseLength dataFrameExtensionPassivePhaseLength; /**< \brief Specifies the Passive Phase Length at Data Frames Extension */
317 IfxMsc_ControlFrameExtensionPassivePhaseLength controlFrameExtensionPassivePhaseLength; /**< \brief Specifies the Passive Phase Length at Control Frames Extension */
318 IfxMsc_NDividerDownstream nDividerDownstream; /**< \brief Specifies the division ratio for downstream generator clock */
319 } IfxMsc_Msc_DownstreamControlExtensionConfig;
320
321 /** \brief Interrupt Configuration Structure
322 */
323 typedef struct
324 {
325 IfxMsc_DataFrameInterruptNode dataFrameInterruptNode; /**< \brief Specifies the Data Frame Interrupt Node */
326 IfxMsc_DataFrameInterrupt dataFrameInterrupt; /**< \brief Specifies the Data Frame Interrupt Mode */
327 IfxMsc_CommandFrameInterruptNode commandFrameInterruptNode; /**< \brief Specifies the Command Frame Interrupt Node */
328 IfxMsc_CommandFrameInterrupt commandFrameInterrupt; /**< \brief Specifies the Command Frame Interrupt Mode */
329 IfxMsc_TimeFrameInterruptNode timeFrameInterruptNode; /**< \brief Specifies the Time Frame Interrupt Node */
330 IfxMsc_TimeFrameInterrupt timeFrameInterrupt; /**< \brief Specifies the Time Frame Interrupt Mode */
331 IfxMsc_ReceiveDataInterruptNode receiveDataInterruptNode; /**< \brief Specifies the Receive Interrupt Node */
332 IfxMsc_ReceiveDataInterrupt receiveDataInterrupt; /**< \brief Specifies the Receive Interrupt Mode */
333 IfxMsc_UpstreamTimeoutInterruptNode upstreamTimeoutInterruptNode; /**< \brief Specifies the Upstream Timeout Interrupt Node */
334 IfxMsc_UpstreamTimeoutInterrupt upstreamTimeoutInterrupt; /**< \brief Specifies the Upstream Timeout Interrupt Mode */
335 IfxMsc_OverflowInterruptNode overflowInterruptNode; /**< \brief Specifies the ABRA Overflow Interrupt Node */
336 IfxMsc_OverflowInterrupt overflowInterrupt; /**< \brief Specifies the ABRA Overflow Interrupt Mode */
337 IfxMsc_UnderflowInterruptNode underflowInterruptNode; /**< \brief Specifies the ABRA Underflow Interrupt Node */
338 IfxMsc_UnderflowInterrupt underflowInterrupt; /**< \brief Specifies the ABRA Underflow Interrupt Mode */
339 } IfxMsc_Msc_InterruptConfig;
340
341 /** \brief MSC Pin Configuration Structure
342 */
343 typedef struct
344 {
345 IfxMsc_Msc_fclp fclp;
346 IfxMsc_Msc_fcln fcln;
347 IfxMsc_Msc_sop sop;
348 IfxMsc_Msc_son son;
349 IfxMsc_Msc_en en0;
350 IfxMsc_Msc_en en1;
351 IfxMsc_Msc_en en2;
352 IfxMsc_Msc_en en3;
353 IfxMsc_Msc_sdi sdi;
354 IfxMsc_Msc_inj0 inj0;
355 IfxMsc_Msc_inj1 inj1;
356 IfxPort_PadDriver pinDriver;
357 } IfxMsc_Msc_Io;
358
359 /** \brief Output Control Configuration Structure
360 */
361 typedef struct
362 {
363 IfxMsc_FclLinePolarity fclpPolarity; /**< \brief Specifies the FCLP Polarity */
364 IfxMsc_SoLinePolarity sopPolarity; /**< \brief Specifies the SLP Polarity */
365 IfxMsc_ChipSelectActiveState cslpPolarity; /**< \brief Specifies the CSLP Polarity */
366 IfxMsc_SdiLinePolarity sdiLinePolarity; /**< \brief Specifies the ILP Polarity */
367 IfxMsc_FclClockControlEnabled fclClockControl; /**< \brief Specifies the CLKCTRL Polarity */
368 } IfxMsc_Msc_OutputControlConfig;
369
370 /** \brief Upstream Control Configuration Structure
371 */
372 typedef struct
373 {
374 IfxMsc_UpstreamChannelFrameType upstreamChannelFrameType; /**< \brief Specifies the Upstream Channel Frame Type */
375 IfxMsc_UpstreamChannelReceivingRate upstreamChannelReceivingRate; /**< \brief Specifies the Upstream Channel Receiving Rate */
376 IfxMsc_Parity parity; /**< \brief Specifies the Parity Mode */
377 IfxMsc_ServiceRequestDelay serviceRequestDelay; /**< \brief Specifies the Service Request Delay */
378 IfxMsc_UpstreamTimeoutPrescaler upstreamTimeoutPrescaler; /**< \brief Specifies the Upstream Timeout Prescaler */
379 IfxMsc_UpstreamTimeoutValue upstreamTimeoutValue; /**< \brief Specifies the Upstream Timeout Value */
380 } IfxMsc_Msc_UpstreamStatusConfig;
381
382 /** \} */
383
384 /** \addtogroup IfxLld_Msc_Msc_Data_Structures
385 * \{ */
386 /** \brief MSC base address data Structure
387 */
388 typedef struct
389 {
390 Ifx_MSC *msc; /**< \brief Specifies the pointer to the MSC registers */
391 } IfxMsc_Msc;
392
393 /** \brief MSC Module Configuration Structure
394 */
395 typedef struct
396 {
397 Ifx_MSC *msc; /**< \brief Specifies the pointer to the MSC registers */
398 IfxMsc_Msc_Clock clockConfig; /**< \brief Specifies the Clock configuration */
399 IfxMsc_Msc_UpstreamStatusConfig upstreamConfig; /**< \brief Specifies the Upstream configuration */
400 IfxMsc_Msc_InterruptConfig interruptConfig; /**< \brief Specifies the Interrupt configuration */
401 IfxMsc_Msc_OutputControlConfig outputControlConfig; /**< \brief Specifies the Output Control configuration */
402 IfxMsc_Msc_DownstreamControlConfig downstreamConfig; /**< \brief Specifies the Downstream configuration */
403 IfxMsc_Msc_DownstreamControlExtensionConfig downstreamExtensionConfig; /**< \brief Specifies the Downstream Extension configuration */
404 IfxMsc_Msc_Abra abraConfig; /**< \brief Specifies the ABRA configuration */
405 IfxMsc_Target target[IFXMSC_NUM_ENABLE_SELECT_LINES]; /**< \brief Specifies the Downstream targets */
406 IfxMsc_Msc_Io io; /**< \brief Specifies the IO Pin configuration */
407 } IfxMsc_Msc_Config;
408
409 /** \} */
410
411 /** \addtogroup IfxLld_Msc_Msc_Module_Initialize_Functions
412 * \{ */
413
414 /******************************************************************************/
415 /*-------------------------Global Function Prototypes-------------------------*/
416 /******************************************************************************/
417
418 /** \brief de-initialize MSC module
419 * \param msc pointer to the MSC module handle
420 * \return None
421 *
422 * \code
423 * IfxMsc_Msc_deInitModule(&msc);
424 * \endcode
425 *
426 */
427 IFX_EXTERN void IfxMsc_Msc_deInitModule(IfxMsc_Msc *msc);
428
429 /** \brief initialize the MSC module
430 * \param msc pointer to the MSC module handle
431 * \param config pointer to the MSC module configuration
432 * \return None
433 *
434 * A coding example can be found in \ref IfxLld_Msc_Msc_Usage
435 *
436 */
437 IFX_EXTERN void IfxMsc_Msc_initModule(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config);
438
439 /** \brief initialize the MSC module configuration
440 * \param config pointer to the MSC configuration
441 * \param msc pointer to the MSC registers
442 * \return None
443 *
444 * A coding example can be found in \ref IfxLld_Msc_Msc_Usage
445 *
446 */
447 IFX_EXTERN void IfxMsc_Msc_initModuleConfig(IfxMsc_Msc_Config *config, Ifx_MSC *msc);
448
449 /** \brief initialize the ABRA block
450 * \param msc pointer to the MSC module handle
451 * \param config pointer to the MSC module configuration
452 * \return None
453 */
454 IFX_EXTERN void IfxMsc_Msc_initializeAbra(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config);
455
456 /** \brief initialize the MSC data extension block for 64bit operation
457 * \param msc pointer to the MSC module handle
458 * \param config pointer to the MSC module configuration
459 * \return None
460 */
461 IFX_EXTERN void IfxMsc_Msc_initializeDataExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config);
462
463 /** \} */
464
465 /** \addtogroup IfxLld_Msc_Msc_Send_Functions
466 * \{ */
467
468 /******************************************************************************/
469 /*-------------------------Global Function Prototypes-------------------------*/
470 /******************************************************************************/
471
472 /** \brief send downstream command
473 * \param msc pointer to the MSC module handle
474 * \param command transmit command
475 * \return None
476 */
477 IFX_EXTERN void IfxMsc_Msc_sendCommand(IfxMsc_Msc *msc, uint32 command);
478
479 /** \brief send complete downstream data, both high and low
480 * \param msc pointer to the MSC module handle
481 * \param dataLow low data to be transmitted
482 * \param dataHigh high data to be transmitted
483 * \return None
484 *
485 * A coding example can be found in \ref IfxLld_Msc_Msc_Usage
486 *
487 */
488 IFX_EXTERN void IfxMsc_Msc_sendData(IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh);
489
490 /** \brief Send downstream data extension (64bit)
491 * \param msc pointer to the MSC module handle
492 * \param data Data to send
493 * \param dataExtension Data extension to send
494 * \return None
495 */
496 IFX_EXTERN void IfxMsc_Msc_sendDataExtension(IfxMsc_Msc *msc, uint32 data, uint32 dataExtension);
497
498 /** \brief send high downstream data
499 * \param msc pointer to the MSC module handle
500 * \param data high downstream data to be transmitted
501 * \return None
502 */
503 IFX_EXTERN void IfxMsc_Msc_sendDataHigh(IfxMsc_Msc *msc, uint16 data);
504
505 /** \brief send high downstream data
506 * \param msc pointer to the MSC module handle
507 * \param data low downstream data to be transmitted
508 * \return None
509 */
510 IFX_EXTERN void IfxMsc_Msc_sendDataLow(IfxMsc_Msc *msc, uint16 data);
511
512 /** \} */
513
514 /** \addtogroup IfxLld_Msc_Msc_Receive_Functions
515 * \{ */
516
517 /******************************************************************************/
518 /*-------------------------Global Function Prototypes-------------------------*/
519 /******************************************************************************/
520
521 /** \brief receive upstream data
522 * \param msc pointer to the MSC module handle
523 * \param upstreamIdx index of the upstream data register
524 * \return data
525 */
526 IFX_EXTERN uint32 IfxMsc_Msc_receiveData(IfxMsc_Msc *msc, uint8 upstreamIdx);
527
528 /** \} */
529
530 /** \addtogroup IfxLld_Msc_Msc_Target_Read_Write_Functions
531 * \{ */
532
533 /******************************************************************************/
534 /*-------------------------Global Function Prototypes-------------------------*/
535 /******************************************************************************/
536
537 /** \brief get the target during high and low phase
538 * \param msc pointer to the MSC module handle
539 * \param target low phase target or high phase target
540 * \return selected target
541 */
542 IFX_EXTERN IfxMsc_Target IfxMsc_Msc_getTarget(IfxMsc_Msc *msc, IfxMsc_Msc_Target target);
543
544 /** \brief set the command for target
545 * \param msc pointer to the MSC module handle
546 * \param enX enX target to be selected
547 * \return None
548 */
549 IFX_EXTERN void IfxMsc_Msc_setCommandTarget(IfxMsc_Msc *msc, IfxMsc_Target enX);
550
551 /** \brief set the target data to be transmitted during low and high phase
552 * \param msc pointer to the MSC module handle
553 * \param enXHigh high target to be selected
554 * \param enXLow low target to be selected
555 * \return None
556 */
557 IFX_EXTERN void IfxMsc_Msc_setDataTarget(IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow);
558
559 /** \} */
560
561 /******************************************************************************/
562 /*-------------------------Inline Function Prototypes-------------------------*/
563 /******************************************************************************/
564
565 /**
566 * \param msc pointer to the MSC module handle
567 * \return None
568 */
569 IFX_INLINE void IfxMsc_Msc_clearDataFrameInterrupt(IfxMsc_Msc *msc);
570
571 /**
572 * \param msc pointer to the MSC module handle
573 * \return status of the active data frame
574 */
575 IFX_INLINE boolean IfxMsc_Msc_getActiveDataFrameStatus(IfxMsc_Msc *msc);
576
577 /**
578 * \param msc pointer to the MSC module handle
579 * \return status of the data frame interrupt
580 */
581 IFX_INLINE boolean IfxMsc_Msc_getDataFrameInterruptStatus(IfxMsc_Msc *msc);
582
583 /******************************************************************************/
584 /*---------------------Inline Function Implementations------------------------*/
585 /******************************************************************************/
586
587 IFX_INLINE void IfxMsc_Msc_clearDataFrameInterrupt(IfxMsc_Msc *msc)
588 {
589 IfxMsc_clearDataFrameInterruptFlag(msc->msc);
590 }
591
592
593 IFX_INLINE boolean IfxMsc_Msc_getActiveDataFrameStatus(IfxMsc_Msc *msc)
594 {
595 return IfxMsc_getActiveDataFrameStatus(msc->msc);
596 }
597
598
599 IFX_INLINE boolean IfxMsc_Msc_getDataFrameInterruptStatus(IfxMsc_Msc *msc)
600 {
601 return IfxMsc_getDataFrameInterruptFlag(msc->msc);
602 }
603
604
605 #endif /* IFXMSC_MSC_H */
IfxMsc_Msc_sendDataLow
IFX_EXTERN void IfxMsc_Msc_sendDataLow(IfxMsc_Msc *msc, uint16 data)
send high downstream data
Definition: IfxMsc_Msc.c:691
IfxMsc_Msc_Target
IfxMsc_Msc_Target
Msc Instance Number.
Definition: IfxMsc_Msc.h:197
IfxMsc_Msc_UpstreamStatusConfig::upstreamTimeoutValue
IfxMsc_UpstreamTimeoutValue upstreamTimeoutValue
Specifies the Upstream Timeout Value.
Definition: IfxMsc_Msc.h:379
IfxMsc_Sdi_In
SDI pin mapping structure.
Definition: IfxMsc_PinMap.h:64
IfxMsc_Msc_DownstreamControlConfig::passiveTimeFrameCount
IfxMsc_PassiveTimeFrameCount passiveTimeFrameCount
Specifies the Number of Passive Time Frames.
Definition: IfxMsc_Msc.h:295
IfxMsc_Msc_Abra::clockSelectAbra
IfxMsc_ClockSelect clockSelectAbra
Specifies the clock select for ABRA.
Definition: IfxMsc_Msc.h:272
IfxMsc_Msc_DownstreamControlConfig::srhActivePhaseSelection
IfxMsc_ActivePhaseSelection srhActivePhaseSelection
Specifies the Enable SRL active phase selection bit.
Definition: IfxMsc_Msc.h:292
IfxMsc_Msc_Io::fclp
IfxMsc_Msc_fclp fclp
Definition: IfxMsc_Msc.h:345
IfxMsc_Msc_InterruptConfig::timeFrameInterrupt
IfxMsc_TimeFrameInterrupt timeFrameInterrupt
Specifies the Time Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:330
IfxMsc_Msc_OutputControlConfig::sopPolarity
IfxMsc_SoLinePolarity sopPolarity
Specifies the SLP Polarity.
Definition: IfxMsc_Msc.h:364
IfxMsc_ExternalSignalInjection
IfxMsc_ExternalSignalInjection
Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal Definition in Ifx_M...
Definition: IfxMsc.h:520
IfxMsc_Msc_Io::en1
IfxMsc_Msc_en en1
Definition: IfxMsc_Msc.h:350
IfxMsc_Msc_setCommandTarget
IFX_EXTERN void IfxMsc_Msc_setCommandTarget(IfxMsc_Msc *msc, IfxMsc_Target enX)
set the command for target
Definition: IfxMsc_Msc.c:703
IfxMsc_Msc_DownstreamControlConfig::externalSignalInjectionPin0
IfxMsc_ExternalSignalInjection externalSignalInjectionPin0
Specifies the Injection Enable Pin 0.
Definition: IfxMsc_Msc.h:296
IfxMsc_Msc_UpstreamStatusConfig::serviceRequestDelay
IfxMsc_ServiceRequestDelay serviceRequestDelay
Specifies the Service Request Delay.
Definition: IfxMsc_Msc.h:377
IfxMsc_Msc
MSC base address data Structure.
Definition: IfxMsc_Msc.h:388
IfxMsc_Msc_fclp::pin
IfxMsc_Fclp_Out * pin
Definition: IfxMsc_Msc.h:225
IfxMsc_Msc_Target_low
MSC Target Low.
Definition: IfxMsc_Msc.h:199
IfxMsc_Msc_en::pin
IfxMsc_En_Out * pin
Definition: IfxMsc_Msc.h:213
IfxMsc_ReceiveDataInterrupt
IfxMsc_ReceiveDataInterrupt
Interrupt Control Register - Receive Data Interrupt Enable Definition in Ifx_MSC.ICR.B.RDIE.
Definition: IfxMsc.h:676
IfxMsc_Msc_DownstreamControlExtensionConfig::downstreamExtensionDataSourcesLow
uint32 downstreamExtensionDataSourcesLow
Specifies the Downstream Select Data Source Low Extension.
Definition: IfxMsc_Msc.h:313
IfxMsc_Msc_DownstreamControlConfig::dataFramePassivePhaseLength
IfxMsc_DataFramePassivePhaseLength dataFramePassivePhaseLength
Specifies the Passive Phase Length at Data Frames.
Definition: IfxMsc_Msc.h:294
IfxMsc_Msc_Abra::highPhaseOfShiftClock
IfxMsc_ShiftClockPhaseDuration highPhaseOfShiftClock
Specifies High phase of shift clock.
Definition: IfxMsc_Msc.h:269
IfxMsc_Msc_Io::en3
IfxMsc_Msc_en en3
Definition: IfxMsc_Msc.h:352
IfxMsc_UpstreamTimeoutPrescaler
IfxMsc_UpstreamTimeoutPrescaler
Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler Definition in Ifx_MSC.USCE.B.USTOPRE.
Definition: IfxMsc.h:896
IfxMsc_Msc_InterruptConfig::receiveDataInterrupt
IfxMsc_ReceiveDataInterrupt receiveDataInterrupt
Specifies the Receive Interrupt Mode.
Definition: IfxMsc_Msc.h:332
IfxMsc_Msc_OutputControlConfig::fclClockControl
IfxMsc_FclClockControlEnabled fclClockControl
Specifies the CLKCTRL Polarity.
Definition: IfxMsc_Msc.h:367
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxMsc_ActivePhaseSelection
IfxMsc_ActivePhaseSelection
Enable SRL/SRH Active Phase Selection Bit Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL.
Definition: IfxMsc.h:87
IfxMsc_NDividerDownstream
IfxMsc_NDividerDownstream
Downstream Timing Extension Register - N Divider Downstream Definition in Ifx_MSC.DSTE.B.NDD.
Definition: IfxMsc.h:600
IfxMsc_Msc_DownstreamControlExtensionConfig::downstreamExtensionDataSourcesHigh
uint32 downstreamExtensionDataSourcesHigh
Specifies the Downstream Select Data Source High Extension.
Definition: IfxMsc_Msc.h:314
IfxMsc_Msc_inj0::mode
IfxPort_InputMode mode
Definition: IfxMsc_Msc.h:232
IfxMsc_Msc_sendDataHigh
IFX_EXTERN void IfxMsc_Msc_sendDataHigh(IfxMsc_Msc *msc, uint16 data)
send high downstream data
Definition: IfxMsc_Msc.c:679
IfxMsc_Msc_InterruptConfig::underflowInterrupt
IfxMsc_UnderflowInterrupt underflowInterrupt
Specifies the ABRA Underflow Interrupt Mode.
Definition: IfxMsc_Msc.h:338
IfxMsc_TimeFrameInterrupt
IfxMsc_TimeFrameInterrupt
Interrupt Control Register - Time Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.TFIE.
Definition: IfxMsc.h:801
IfxMsc_UpstreamTimeoutInterrupt
IfxMsc_UpstreamTimeoutInterrupt
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:875
IfxMsc_DataFrameInterrupt
IfxMsc_DataFrameInterrupt
Interrupt Control Register - Data Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.EDIE.
Definition: IfxMsc.h:340
IfxMsc_Msc_DownstreamControlConfig::srlActivePhaseSelection
IfxMsc_ActivePhaseSelection srlActivePhaseSelection
Specifies the Enable SRL active phase selection bit.
Definition: IfxMsc_Msc.h:291
IfxMsc_Extension
IfxMsc_Extension
Downstream Control Enhanced Register - Extension Enable Definition in Ifx_MSC.DSCE.B.NDBLE.
Definition: IfxMsc.h:440
IfxMsc_AsynchronousBlock
IfxMsc_AsynchronousBlock
Asynchronous Block Configuration Register - Asynchronous Block Bypass Definition in Ifx_MSC...
Definition: IfxMsc.h:96
IfxMsc_Msc_Config::abraConfig
IfxMsc_Msc_Abra abraConfig
Specifies the ABRA configuration.
Definition: IfxMsc_Msc.h:404
IfxMsc_Msc_Io::pinDriver
IfxPort_PadDriver pinDriver
Definition: IfxMsc_Msc.h:356
IfxMsc_Msc_fcln::pin
IfxMsc_Fcln_Out * pin
Definition: IfxMsc_Msc.h:219
IfxMsc_Msc_UpstreamStatusConfig::upstreamTimeoutPrescaler
IfxMsc_UpstreamTimeoutPrescaler upstreamTimeoutPrescaler
Specifies the Upstream Timeout Prescaler.
Definition: IfxMsc_Msc.h:378
IfxMsc_TransmissionMode
IfxMsc_TransmissionMode
Downstream Channel Transmission Mode Definition in Ifx_MSC.DSC.B.TM.
Definition: IfxMsc.h:821
IfxMsc_UpstreamChannelReceivingRate
IfxMsc_UpstreamChannelReceivingRate
Upstream Receiving Rate Definition in Ifx_MSC.USR.B.URR.
Definition: IfxMsc.h:860
IfxMsc_Msc_sendCommand
IFX_EXTERN void IfxMsc_Msc_sendCommand(IfxMsc_Msc *msc, uint32 command)
send downstream command
Definition: IfxMsc_Msc.c:639
IfxMsc_Msc_sdi::pin
IfxMsc_Sdi_In * pin
Definition: IfxMsc_Msc.h:243
IfxMsc_Msc_initModule
IFX_EXTERN void IfxMsc_Msc_initModule(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC module
Definition: IfxMsc_Msc.c:78
IfxMsc_Msc_getDataFrameInterruptStatus
IFX_INLINE boolean IfxMsc_Msc_getDataFrameInterruptStatus(IfxMsc_Msc *msc)
Definition: IfxMsc_Msc.h:599
IFXMSC_NUM_ENABLE_SELECT_LINES
#define IFXMSC_NUM_ENABLE_SELECT_LINES
Definition: IfxMsc_cfg.h:69
IfxMsc_Msc_deInitModule
IFX_EXTERN void IfxMsc_Msc_deInitModule(IfxMsc_Msc *msc)
de-initialize MSC module
Definition: IfxMsc_Msc.c:54
IfxMsc_Msc_setDataTarget
IFX_EXTERN void IfxMsc_Msc_setDataTarget(IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
set the target data to be transmitted during low and high phase
Definition: IfxMsc_Msc.c:711
IfxMsc_Msc_Config::clockConfig
IfxMsc_Msc_Clock clockConfig
Specifies the Clock configuration.
Definition: IfxMsc_Msc.h:398
IfxMsc_Msc_DownstreamControlConfig::externalSignalInjectionPin1
IfxMsc_ExternalSignalInjection externalSignalInjectionPin1
Specifies the Injection Enable Pin 1.
Definition: IfxMsc_Msc.h:298
IfxMsc_ControlFrameExtensionPassivePhaseLength
IfxMsc_ControlFrameExtensionPassivePhaseLength
Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension Definition in...
Definition: IfxMsc.h:194
IfxMsc_Msc_getTarget
IFX_EXTERN IfxMsc_Target IfxMsc_Msc_getTarget(IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
get the target during high and low phase
Definition: IfxMsc_Msc.c:60
IfxMsc_Msc_InterruptConfig
Interrupt Configuration Structure.
Definition: IfxMsc_Msc.h:323
IfxMsc_CommandDataCommandRepetitionMode
IfxMsc_CommandDataCommandRepetitionMode
Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode Definition in Ifx...
Definition: IfxMsc.h:125
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxMsc_Msc_son::pin
IfxMsc_Son_Out * pin
Definition: IfxMsc_Msc.h:249
IfxMsc_Msc_initializeAbra
IFX_EXTERN void IfxMsc_Msc_initializeAbra(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the ABRA block
Definition: IfxMsc_Msc.c:541
IfxMsc_Msc_InterruptConfig::timeFrameInterruptNode
IfxMsc_TimeFrameInterruptNode timeFrameInterruptNode
Specifies the Time Frame Interrupt Node.
Definition: IfxMsc_Msc.h:329
IfxMsc_Msc_DownstreamControlConfig::srlDataFrameLength
IfxMsc_DataFrameLength srlDataFrameLength
Specifies the Number of SRL bits shifted at data frames.
Definition: IfxMsc_Msc.h:289
IfxMsc_Msc_DownstreamControlExtensionConfig
Downstream Control Extension Configuration Structure.
Definition: IfxMsc_Msc.h:308
IfxMsc_Msc_InterruptConfig::overflowInterruptNode
IfxMsc_OverflowInterruptNode overflowInterruptNode
Specifies the ABRA Overflow Interrupt Node.
Definition: IfxMsc_Msc.h:335
IfxMsc_Msc_InterruptConfig::upstreamTimeoutInterrupt
IfxMsc_UpstreamTimeoutInterrupt upstreamTimeoutInterrupt
Specifies the Upstream Timeout Interrupt Mode.
Definition: IfxMsc_Msc.h:334
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxMsc_Msc_initializeDataExtension
IFX_EXTERN void IfxMsc_Msc_initializeDataExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC data extension block for 64bit operation
Definition: IfxMsc_Msc.c:571
IfxMsc_MsbBitDataExtension
IfxMsc_MsbBitDataExtension
Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/...
Definition: IfxMsc.h:576
IfxMsc_OverflowInterruptNode
IfxMsc_OverflowInterruptNode
Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:632
IfxMsc_Msc_DownstreamControlConfig::injectionPositionPin1
IfxMsc_ExternalBitInjectionPosition injectionPositionPin1
Specifies the Injection Position Pin 1.
Definition: IfxMsc_Msc.h:299
IfxMsc_Msc_InterruptConfig::underflowInterruptNode
IfxMsc_UnderflowInterruptNode underflowInterruptNode
Specifies the ABRA Underflow Interrupt Node.
Definition: IfxMsc_Msc.h:337
IfxMsc_Msc_DownstreamControlConfig::commandDataCommandReceptionMode
IfxMsc_CommandDataCommandRepetitionMode commandDataCommandReceptionMode
Specifies the Command-Data-Command in Data Repetition Mode.
Definition: IfxMsc_Msc.h:300
IfxMsc_DividerMode
IfxMsc_DividerMode
Divider mode.
Definition: IfxMsc.h:422
IfxMsc_Msc_getActiveDataFrameStatus
IFX_INLINE boolean IfxMsc_Msc_getActiveDataFrameStatus(IfxMsc_Msc *msc)
Definition: IfxMsc_Msc.h:593
IfxMsc_Msc_InterruptConfig::commandFrameInterruptNode
IfxMsc_CommandFrameInterruptNode commandFrameInterruptNode
Specifies the Command Frame Interrupt Node.
Definition: IfxMsc_Msc.h:327
IfxMsc_SoLinePolarity
IfxMsc_SoLinePolarity
Output Control Register - SOP Line Polarity Definition in Ifx_MSC.OCR.B.SLP.
Definition: IfxMsc.h:763
IfxMsc_Msc_DownstreamControlExtensionConfig::emergencyStopExtensionEnableBits
uint32 emergencyStopExtensionEnableBits
Emergency Stop Extension.
Definition: IfxMsc_Msc.h:315
IfxMsc_Msc_Abra::abraDownstreamBlockBaudrate
uint32 abraDownstreamBlockBaudrate
Specifies ABRA downstream block baud.
Definition: IfxMsc_Msc.h:267
IfxMsc_Msc_en
Definition: IfxMsc_Msc.h:211
IfxMsc_Msc_Config::upstreamConfig
IfxMsc_Msc_UpstreamStatusConfig upstreamConfig
Specifies the Upstream configuration.
Definition: IfxMsc_Msc.h:399
IfxMsc_Msc_InterruptConfig::overflowInterrupt
IfxMsc_OverflowInterrupt overflowInterrupt
Specifies the ABRA Overflow Interrupt Mode.
Definition: IfxMsc_Msc.h:336
IfxMsc_Son_Out
SON pin mapping structure.
Definition: IfxMsc_PinMap.h:105
IfxMsc_Msc_fclp
Definition: IfxMsc_Msc.h:223
IfxMsc_ServiceRequestDelay
IfxMsc_ServiceRequestDelay
Service Request Delay Definition in Ifx_MSC.USR.B.SRDC.
Definition: IfxMsc.h:722
IfxMsc_Msc_fcln
Definition: IfxMsc_Msc.h:217
IfxMsc_ReceiveDataInterruptNode
IfxMsc_ReceiveDataInterruptNode
Interrupt Control Register - Receive Data Interrupt Pointer Definition in Ifx_MSC.ICR.B.RDIP.
Definition: IfxMsc.h:687
IfxMsc_Msc_Io::fcln
IfxMsc_Msc_fcln fcln
Definition: IfxMsc_Msc.h:346
IfxMsc_Parity
IfxMsc_Parity
Parity Mode Definition in Ifx_MSC.USR.B.PCT.
Definition: IfxMsc.h:644
IfxMsc_Msc_OutputControlConfig::cslpPolarity
IfxMsc_ChipSelectActiveState cslpPolarity
Specifies the CSLP Polarity.
Definition: IfxMsc_Msc.h:365
IfxMsc_Msc_sdi
Definition: IfxMsc_Msc.h:241
IfxMsc_clearDataFrameInterruptFlag
void IfxMsc_clearDataFrameInterruptFlag(Ifx_MSC *msc)
clear data frame interrupt flag
Definition: IfxMsc.c:54
IfxMsc_Msc_OutputControlConfig::fclpPolarity
IfxMsc_FclLinePolarity fclpPolarity
Specifies the FCLP Polarity.
Definition: IfxMsc_Msc.h:363
IfxMsc_Msc_Abra::abraBlockBypass
IfxMsc_AsynchronousBlock abraBlockBypass
Specifies ABRA block bypass.
Definition: IfxMsc_Msc.h:271
IfxMsc_NDividerAbra
IfxMsc_NDividerAbra
Asynchronous Block Configuration Register - N Divider ABRA Definition in Ifx_MSC.ABC.B.NDA.
Definition: IfxMsc.h:585
IfxMsc_Msc_sendData
IFX_EXTERN void IfxMsc_Msc_sendData(IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
send complete downstream data, both high and low
Definition: IfxMsc_Msc.c:648
IfxMsc_Msc_Io::sdi
IfxMsc_Msc_sdi sdi
Definition: IfxMsc_Msc.h:353
IfxMsc_PassiveTimeFrameCount
IfxMsc_PassiveTimeFrameCount
Downstream Status Register - Number Of Passive Time Frames Definition in Ifx_MSC.DSS.B.NPTF.
Definition: IfxMsc.h:653
IfxMsc_ClockSelect
IfxMsc_ClockSelect
Asynchronous Block Configuration Register - Clock Select Definition in Ifx_MSC.ABC.B.CLKSEL.
Definition: IfxMsc.h:114
IfxMsc_Msc_InterruptConfig::dataFrameInterrupt
IfxMsc_DataFrameInterrupt dataFrameInterrupt
Specifies the Data Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:326
IfxMsc_Msc_son
Definition: IfxMsc_Msc.h:247
IfxMsc_Msc_sop
Definition: IfxMsc_Msc.h:253
IfxMsc_Msc_Io::en2
IfxMsc_Msc_en en2
Definition: IfxMsc_Msc.h:351
IfxMsc_SdiLinePolarity
IfxMsc_SdiLinePolarity
Output Control Register - SDI Line Polarity Definition in Ifx_MSC.OCR.B.ILP.
Definition: IfxMsc.h:698
IfxMsc_Fcln_Out
FCLN pin mapping structure.
Definition: IfxMsc_PinMap.h:89
IfxMsc_Msc_sendDataExtension
IFX_EXTERN void IfxMsc_Msc_sendDataExtension(IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
Send downstream data extension (64bit)
Definition: IfxMsc_Msc.c:666
IfxMsc_Msc::msc
Ifx_MSC * msc
Specifies the pointer to the MSC registers.
Definition: IfxMsc_Msc.h:390
IfxMsc.h
MSC basic functionality.
IfxMsc_Msc_InterruptConfig::upstreamTimeoutInterruptNode
IfxMsc_UpstreamTimeoutInterruptNode upstreamTimeoutInterruptNode
Specifies the Upstream Timeout Interrupt Node.
Definition: IfxMsc_Msc.h:333
IfxMsc_TimeFrameInterruptNode
IfxMsc_TimeFrameInterruptNode
Interrupt Control Register - Time Frame Interrupt Pointer Definition in Ifx_MSC.ICR.B.TFIP.
Definition: IfxMsc.h:810
IfxMsc_Msc_InterruptConfig::dataFrameInterruptNode
IfxMsc_DataFrameInterruptNode dataFrameInterruptNode
Specifies the Data Frame Interrupt Node.
Definition: IfxMsc_Msc.h:325
IfxMsc_En_Out
EN pin mapping structure.
Definition: IfxMsc_PinMap.h:72
IfxMsc_Msc_clearDataFrameInterrupt
IFX_INLINE void IfxMsc_Msc_clearDataFrameInterrupt(IfxMsc_Msc *msc)
Definition: IfxMsc_Msc.h:587
IfxMsc_Msc_Clock::dividerMode
IfxMsc_DividerMode dividerMode
Specifies divided clock properties.
Definition: IfxMsc_Msc.h:280
IfxMsc_Msc_DownstreamControlConfig::downstreamDataSourcesHigh
uint32 downstreamDataSourcesHigh
Specifies the Downstream Data Source selections High.
Definition: IfxMsc_Msc.h:302
IfxMsc_CommandFrameLength
IfxMsc_CommandFrameLength
Number of Bits shifted at command frames Definition in Ifx_MSC.DSC.B.NBC.
Definition: IfxMsc.h:154
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxMsc_Msc_Config::downstreamExtensionConfig
IfxMsc_Msc_DownstreamControlExtensionConfig downstreamExtensionConfig
Specifies the Downstream Extension configuration.
Definition: IfxMsc_Msc.h:403
IfxMsc_OverflowInterrupt
IfxMsc_OverflowInterrupt
Asynchronous Block Configuration Register - Overflow Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:623
IfxMsc_Msc_DownstreamControlExtensionConfig::nDividerDownstream
IfxMsc_NDividerDownstream nDividerDownstream
Specifies the division ratio for downstream generator clock.
Definition: IfxMsc_Msc.h:318
IfxMsc_Msc_Abra::nDividerAbra
IfxMsc_NDividerAbra nDividerAbra
Specifies the N divider.
Definition: IfxMsc_Msc.h:270
IfxMsc_Msc_DownstreamControlConfig::commandFrameLength
IfxMsc_CommandFrameLength commandFrameLength
Specifies the Number of bits shifted at command frames.
Definition: IfxMsc_Msc.h:293
IfxMsc_Msc_Config::downstreamConfig
IfxMsc_Msc_DownstreamControlConfig downstreamConfig
Specifies the Downstream configuration.
Definition: IfxMsc_Msc.h:402
IfxMsc_Msc_en::mode
IfxPort_OutputMode mode
Definition: IfxMsc_Msc.h:214
IfxMsc_Fclp_Out
FCLP pin mapping structure.
Definition: IfxMsc_PinMap.h:81
IfxMsc_CommandFrameInterruptNode
IfxMsc_CommandFrameInterruptNode
Interrupt Control Register - Command Frame Interrupt Node Pointer Definition in Ifx_MSC.ICR.B.ECIP.
Definition: IfxMsc.h:143
IfxMsc_Msc_InterruptConfig::commandFrameInterrupt
IfxMsc_CommandFrameInterrupt commandFrameInterrupt
Specifies the Command Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:328
IfxMsc_Msc_DownstreamControlExtensionConfig::srlBitsShiftedAtDataFramesExtension
IfxMsc_MsbBitDataExtension srlBitsShiftedAtDataFramesExtension
Specifies the Number of SRLE bits shifted at Data Frames.
Definition: IfxMsc_Msc.h:311
IfxMsc_Msc_receiveData
IFX_EXTERN uint32 IfxMsc_Msc_receiveData(IfxMsc_Msc *msc, uint8 upstreamIdx)
receive upstream data
Definition: IfxMsc_Msc.c:618
IfxMsc_Msc_DownstreamControlConfig::injectionPositionPin0
IfxMsc_ExternalBitInjectionPosition injectionPositionPin0
Specifies the Injection Position Pin 0.
Definition: IfxMsc_Msc.h:297
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxMsc_Msc_UpstreamStatusConfig::upstreamChannelFrameType
IfxMsc_UpstreamChannelFrameType upstreamChannelFrameType
Specifies the Upstream Channel Frame Type.
Definition: IfxMsc_Msc.h:374
IfxMsc_Inj_In
INJ pin mapping structure.
Definition: IfxMsc_PinMap.h:56
IfxMsc_Msc_DownstreamControlConfig
Downstream Control Configuration Structure.
Definition: IfxMsc_Msc.h:286
IfxMsc_UnderflowInterrupt
IfxMsc_UnderflowInterrupt
Asynchronous Block Configuration Register - Underflow Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:830
IfxMsc_UpstreamTimeoutValue
IfxMsc_UpstreamTimeoutValue
Upstream Control Enhanced Register 1 - Upstream Timeout Value Definition in Ifx_MSC.USCE.B.USTOVAL.
Definition: IfxMsc.h:919
IfxMsc_getActiveDataFrameStatus
boolean IfxMsc_getActiveDataFrameStatus(Ifx_MSC *msc)
get the status of the active data frame
Definition: IfxMsc.c:134
IfxMsc_Msc_Config::interruptConfig
IfxMsc_Msc_InterruptConfig interruptConfig
Specifies the Interrupt configuration.
Definition: IfxMsc_Msc.h:400
IfxMsc_Msc_DownstreamControlConfig::emergencyStopEnableBits
uint32 emergencyStopEnableBits
Emergency Stop.
Definition: IfxMsc_Msc.h:303
IfxMsc_FclLinePolarity
IfxMsc_FclLinePolarity
Output Control Register - FCLP Line Polarity Definition in Ifx_MSC.OCR.B.CLP.
Definition: IfxMsc.h:538
IfxMsc_Msc_InterruptConfig::receiveDataInterruptNode
IfxMsc_ReceiveDataInterruptNode receiveDataInterruptNode
Specifies the Receive Interrupt Node.
Definition: IfxMsc_Msc.h:331
IfxMsc_Msc_Io::inj0
IfxMsc_Msc_inj0 inj0
Definition: IfxMsc_Msc.h:354
IfxMsc_Msc_inj0
Definition: IfxMsc_Msc.h:229
IfxMsc_Msc_inj1
Definition: IfxMsc_Msc.h:235
IfxMsc_Msc_initModuleConfig
IFX_EXTERN void IfxMsc_Msc_initModuleConfig(IfxMsc_Msc_Config *config, Ifx_MSC *msc)
initialize the MSC module configuration
Definition: IfxMsc_Msc.c:407
IfxMsc_Msc_DownstreamControlConfig::downstreamDataSourcesLow
uint32 downstreamDataSourcesLow
Specifies the Downstream Data Source selections Low.
Definition: IfxMsc_Msc.h:301
IfxMsc_Msc_UpstreamStatusConfig::upstreamChannelReceivingRate
IfxMsc_UpstreamChannelReceivingRate upstreamChannelReceivingRate
Specifies the Upstream Channel Receiving Rate.
Definition: IfxMsc_Msc.h:375
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxMsc_Msc_Abra::lowPhaseOfShiftClock
IfxMsc_ShiftClockPhaseDuration lowPhaseOfShiftClock
Specifies Low phase of shift clock.
Definition: IfxMsc_Msc.h:268
IfxMsc_ExternalBitInjectionPosition
IfxMsc_ExternalBitInjectionPosition
Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal Definition in Ifx...
Definition: IfxMsc.h:449
IfxMsc_Msc_OutputControlConfig
Output Control Configuration Structure.
Definition: IfxMsc_Msc.h:361
IfxMsc_Msc_Clock::baudrate
uint32 baudrate
Specifies the baud rate.
Definition: IfxMsc_Msc.h:279
IfxMsc_UnderflowInterruptNode
IfxMsc_UnderflowInterruptNode
Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:839
IfxMsc_Msc_DownstreamControlConfig::transmissionMode
IfxMsc_TransmissionMode transmissionMode
Specifies the transmission Mode.
Definition: IfxMsc_Msc.h:288
IfxMsc_Sop_Out
SOP pin mapping structure.
Definition: IfxMsc_PinMap.h:97
IfxMsc_Msc_UpstreamStatusConfig
Upstream Control Configuration Structure.
Definition: IfxMsc_Msc.h:372
IfxMsc_UpstreamTimeoutInterruptNode
IfxMsc_UpstreamTimeoutInterruptNode
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:884
IfxMsc_UpstreamChannelFrameType
IfxMsc_UpstreamChannelFrameType
Channel Frame Type Definition in Ifx_MSC.USR.B.UFT.
Definition: IfxMsc.h:851
IfxMsc_DataFrameInterruptNode
IfxMsc_DataFrameInterruptNode
Interrupt Control Register - Data Frame Interrupt Node Pointer Definition in Ifx_MSC.ICR.B.EDIP.
Definition: IfxMsc.h:350
IfxMsc_Msc_Abra
ABRA block Configuration Structure.
Definition: IfxMsc_Msc.h:265
IfxMsc_Msc_Clock::step
uint16 step
Specifies the step value.
Definition: IfxMsc_Msc.h:281
IfxMsc_ShiftClockPhaseDuration
IfxMsc_ShiftClockPhaseDuration
Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock Definit...
Definition: IfxMsc.h:731
IfxMsc_Msc_sop::pin
IfxMsc_Sop_Out * pin
Definition: IfxMsc_Msc.h:255
IfxMsc_Msc_OutputControlConfig::sdiLinePolarity
IfxMsc_SdiLinePolarity sdiLinePolarity
Specifies the ILP Polarity.
Definition: IfxMsc_Msc.h:366
IfxMsc_Msc_Io
MSC Pin Configuration Structure.
Definition: IfxMsc_Msc.h:343
IfxMsc_Msc_Io::en0
IfxMsc_Msc_en en0
Definition: IfxMsc_Msc.h:349
IfxMsc_Msc_inj0::pin
IfxMsc_Inj_In * pin
Definition: IfxMsc_Msc.h:231
IfxMsc_Msc_Io::inj1
IfxMsc_Msc_inj1 inj1
Definition: IfxMsc_Msc.h:355
IfxMsc_DataFramePassivePhaseLength
IfxMsc_DataFramePassivePhaseLength
Passive Phase Length at Data Frames Definition in Ifx_MSC.DSC.B.PPD.
Definition: IfxMsc.h:385
IfxMsc_DataFrameLength
IfxMsc_DataFrameLength
Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL.
Definition: IfxMsc.h:361
IfxMsc_Msc_Target_high
MSC Target High.
Definition: IfxMsc_Msc.h:200
IfxMsc_Target
IfxMsc_Target
Msc Targets - use as chip enable selection for ENH, ENL and ENC.
Definition: IfxMsc.h:790
IfxMsc_Msc_Io::son
IfxMsc_Msc_son son
Definition: IfxMsc_Msc.h:348
IfxMsc_Msc_Config
MSC Module Configuration Structure.
Definition: IfxMsc_Msc.h:395
IfxMsc_Msc_Clock
Clock configuration data Structure.
Definition: IfxMsc_Msc.h:277
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxMsc_Msc_DownstreamControlExtensionConfig::dataFrameExtensionPassivePhaseLength
IfxMsc_DataFrameExtensionPassivePhaseLength dataFrameExtensionPassivePhaseLength
Specifies the Passive Phase Length at Data Frames Extension.
Definition: IfxMsc_Msc.h:316
IfxMsc_DataFrameExtensionPassivePhaseLength
IfxMsc_DataFrameExtensionPassivePhaseLength
Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension Definition in If...
Definition: IfxMsc.h:329
IfxMsc_Msc_DownstreamControlExtensionConfig::controlFrameExtensionPassivePhaseLength
IfxMsc_ControlFrameExtensionPassivePhaseLength controlFrameExtensionPassivePhaseLength
Specifies the Passive Phase Length at Control Frames Extension.
Definition: IfxMsc_Msc.h:317
IfxMsc_Msc_DownstreamControlConfig::srhDataFrameLength
IfxMsc_DataFrameLength srhDataFrameLength
Specifies the Number of SRH bits shifted at data frames.
Definition: IfxMsc_Msc.h:290
IfxMsc_Msc_DownstreamControlExtensionConfig::extension
IfxMsc_Extension extension
Specifies the Extension Enable.
Definition: IfxMsc_Msc.h:310
IfxMsc_FclClockControlEnabled
IfxMsc_FclClockControlEnabled
Output Control Register - Clock Control Definition in Ifx_MSC.OCR.B.CLKCTRL.
Definition: IfxMsc.h:529
IfxMsc_Msc_Config::outputControlConfig
IfxMsc_Msc_OutputControlConfig outputControlConfig
Specifies the Output Control configuration.
Definition: IfxMsc_Msc.h:401
IfxMsc_Msc_Config::io
IfxMsc_Msc_Io io
Specifies the IO Pin configuration.
Definition: IfxMsc_Msc.h:406
IfxMsc_getDataFrameInterruptFlag
boolean IfxMsc_getDataFrameInterruptFlag(Ifx_MSC *msc)
get the status of the data frame interrupt flag
Definition: IfxMsc.c:157
IfxMsc_CommandFrameInterrupt
IfxMsc_CommandFrameInterrupt
Interrupt Control Register - Command Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.ECIE.
Definition: IfxMsc.h:134
IfxMsc_Msc_DownstreamControlExtensionConfig::srhBitsShiftedAtDataFramesExtension
IfxMsc_MsbBitDataExtension srhBitsShiftedAtDataFramesExtension
Specifies the Number of SRHE bits shifted at Data Frames.
Definition: IfxMsc_Msc.h:312
IfxMsc_Msc_UpstreamStatusConfig::parity
IfxMsc_Parity parity
Specifies the Parity Mode.
Definition: IfxMsc_Msc.h:376
IfxMsc_ChipSelectActiveState
IfxMsc_ChipSelectActiveState
Output Control Register - Chip Selection Line Polarity Definition in Ifx_MSC.OCR.B.CSLP.
Definition: IfxMsc.h:105
IfxMsc_Msc_Io::sop
IfxMsc_Msc_sop sop
Definition: IfxMsc_Msc.h:347


iLLD_TC26B: IfxMsc_PinMap.c Source File

  • _PinMap
IfxMsc_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxMsc_PinMap.c
3 * \brief MSC I/O map
4 * \ingroup IfxLld_Msc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxMsc_PinMap.h"
44
45 IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt4};
46 IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt4};
47 IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt5};
48 IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT = {&MODULE_MSC0, 0, {&MODULE_P11,11}, IfxPort_OutputIdx_alt5};
49 IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT = {&MODULE_MSC0, 0, {&MODULE_P14,10}, IfxPort_OutputIdx_alt3};
50 IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT = {&MODULE_MSC0, 0, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt5};
51 IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT = {&MODULE_MSC0, 1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt4};
52 IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT = {&MODULE_MSC0, 1, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt5};
53 IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT = {&MODULE_MSC0, 1, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt4};
54 IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT = {&MODULE_MSC0, 1, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt3};
55 IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT = {&MODULE_MSC0, 1, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt5};
56 IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt6};
57 IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt5};
58 IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt6};
59 IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT = {&MODULE_MSC0, 2, {&MODULE_P11,11}, IfxPort_OutputIdx_alt2};
60 IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT = {&MODULE_MSC0, 2, {&MODULE_P14,10}, IfxPort_OutputIdx_alt2};
61 IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT = {&MODULE_MSC0, 2, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt4};
62 IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT = {&MODULE_MSC0, 3, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt6};
63 IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT = {&MODULE_MSC0, 3, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt2};
64 IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT = {&MODULE_MSC0, 3, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt2};
65 IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT = {&MODULE_MSC0, 3, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt2};
66 IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT = {&MODULE_MSC0, 3, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt4};
67 IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt5};
68 IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt5};
69 IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT = {&MODULE_MSC1, 1, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt5};
70 IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT = {&MODULE_MSC1, 2, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt4};
71 IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT = {&MODULE_MSC1, 2, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt3};
72 IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT = {&MODULE_MSC1, 3, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt4};
73 IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT = {&MODULE_MSC0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt6};
74 IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT = {&MODULE_MSC0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt5};
75 IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT = {&MODULE_MSC1, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt6};
76 IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT = {&MODULE_MSC1, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt5};
77 IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT = {&MODULE_MSC0, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt5};
78 IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT = {&MODULE_MSC0, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt5};
79 IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt4};
80 IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT = {&MODULE_MSC1, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt5};
81 IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN = {&MODULE_MSC0, {&MODULE_P00, 0}, Ifx_RxSel_a};
82 IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN = {&MODULE_MSC0, {&MODULE_P10, 5}, Ifx_RxSel_b};
83 IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN = {&MODULE_MSC1, {&MODULE_P23, 3}, Ifx_RxSel_a};
84 IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN = {&MODULE_MSC1, {&MODULE_P33,13}, Ifx_RxSel_b};
85 IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN = {&MODULE_MSC0, {&MODULE_P11,10}, Ifx_RxSel_a};
86 IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN = {&MODULE_MSC0, {&MODULE_P10, 2}, Ifx_RxSel_b};
87 IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN = {&MODULE_MSC0, {&MODULE_P14, 3}, Ifx_RxSel_c};
88 IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN = {&MODULE_MSC0, {&MODULE_P11, 3}, Ifx_RxSel_d};
89 IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN = {&MODULE_MSC1, {&MODULE_P23, 1}, Ifx_RxSel_a};
90 IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN = {&MODULE_MSC1, {&MODULE_P02, 3}, Ifx_RxSel_b};
91 IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN = {&MODULE_MSC1, {&MODULE_P32, 4}, Ifx_RxSel_c};
92 IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt7};
93 IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt5};
94 IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT = {&MODULE_MSC1, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt6};
95 IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT = {&MODULE_MSC1, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt5};
96 IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT = {&MODULE_MSC0, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt5};
97 IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT = {&MODULE_MSC0, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt5};
98 IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT = {&MODULE_MSC1, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt5};
99
100
101 const IfxMsc_En_Out *IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS] = {
102 {
103 {
104 &IfxMsc0_EN0_P10_2_OUT,
105 &IfxMsc0_EN0_P10_3_OUT,
106 &IfxMsc0_EN0_P10_4_OUT,
107 &IfxMsc0_EN0_P11_11_OUT,
108 &IfxMsc0_EN0_P14_10_OUT,
109 &IfxMsc0_EN0_P15_5_OUT
110 },
111 {
112 &IfxMsc0_EN1_P10_1_OUT,
113 &IfxMsc0_EN1_P11_2_OUT,
114 &IfxMsc0_EN1_P13_0_OUT,
115 &IfxMsc0_EN1_P14_9_OUT,
116 &IfxMsc0_EN1_P15_3_OUT,
117 NULL_PTR
118 },
119 {
120 &IfxMsc0_END2_P10_2_OUT,
121 &IfxMsc0_END2_P10_3_OUT,
122 &IfxMsc0_END2_P10_4_OUT,
123 &IfxMsc0_END2_P11_11_OUT,
124 &IfxMsc0_END2_P14_10_OUT,
125 &IfxMsc0_END2_P15_5_OUT
126 },
127 {
128 &IfxMsc0_END3_P10_1_OUT,
129 &IfxMsc0_END3_P11_2_OUT,
130 &IfxMsc0_END3_P13_0_OUT,
131 &IfxMsc0_END3_P14_9_OUT,
132 &IfxMsc0_END3_P15_3_OUT,
133 NULL_PTR
134 }
135 },
136 {
137 {
138 &IfxMsc1_EN0_P23_4_OUT,
139 &IfxMsc1_EN0_P32_4_OUT,
140 NULL_PTR,
141 NULL_PTR,
142 NULL_PTR,
143 NULL_PTR
144 },
145 {
146 &IfxMsc1_EN1_P23_5_OUT,
147 NULL_PTR,
148 NULL_PTR,
149 NULL_PTR,
150 NULL_PTR,
151 NULL_PTR
152 },
153 {
154 &IfxMsc1_END2_P23_4_OUT,
155 &IfxMsc1_END2_P32_4_OUT,
156 NULL_PTR,
157 NULL_PTR,
158 NULL_PTR,
159 NULL_PTR
160 },
161 {
162 &IfxMsc1_END3_P23_5_OUT,
163 NULL_PTR,
164 NULL_PTR,
165 NULL_PTR,
166 NULL_PTR,
167 NULL_PTR
168 }
169 }
170 };
171
172 const IfxMsc_Fcln_Out *IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS] = {
173 {
174 &IfxMsc0_FCLN_P13_0_OUT,
175 &IfxMsc0_FCLND_P13_0_OUT
176 },
177 {
178 &IfxMsc1_FCLN_P22_0_OUT,
179 &IfxMsc1_FCLND_P22_0_OUT
180 }
181 };
182
183 const IfxMsc_Fclp_Out *IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS] = {
184 {
185 &IfxMsc0_FCLP_P11_6_OUT,
186 &IfxMsc0_FCLP_P13_1_OUT,
187 &IfxMsc0_FCLP_P13_2_OUT
188 },
189 {
190 &IfxMsc1_FCLP_P22_1_OUT,
191 NULL_PTR,
192 NULL_PTR
193 }
194 };
195
196 const IfxMsc_Inj_In *IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS] = {
197 {
198 &IfxMsc0_INJ0_P00_0_IN,
199 &IfxMsc0_INJ1_P10_5_IN
200 },
201 {
202 &IfxMsc1_INJ0_P23_3_IN,
203 &IfxMsc1_INJ1_P33_13_IN
204 }
205 };
206
207 const IfxMsc_Sdi_In *IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS] = {
208 {
209 &IfxMsc0_SDI0_P11_10_IN,
210 &IfxMsc0_SDI1_P10_2_IN,
211 &IfxMsc0_SDI2_P14_3_IN,
212 &IfxMsc0_SDI3_P11_3_IN
213 },
214 {
215 &IfxMsc1_SDI0_P23_1_IN,
216 &IfxMsc1_SDI1_P02_3_IN,
217 &IfxMsc1_SDI2_P32_4_IN,
218 NULL_PTR
219 }
220 };
221
222 const IfxMsc_Son_Out *IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS] = {
223 {
224 &IfxMsc0_SON_P13_2_OUT,
225 &IfxMsc0_SOND_P13_2_OUT
226 },
227 {
228 &IfxMsc1_SON_P22_2_OUT,
229 &IfxMsc1_SOND_P22_2_OUT
230 }
231 };
232
233 const IfxMsc_Sop_Out *IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS] = {
234 {
235 &IfxMsc0_SOP_P11_9_OUT,
236 &IfxMsc0_SOP_P13_3_OUT
237 },
238 {
239 &IfxMsc1_SOP_P22_3_OUT,
240 NULL_PTR
241 }
242 };
IfxMsc1_INJ0_P23_3_IN
IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN
Definition: IfxMsc_PinMap.c:83
IfxMsc0_EN0_P10_3_OUT
IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT
Definition: IfxMsc_PinMap.c:46
IfxMsc_Sdi_In
SDI pin mapping structure.
Definition: IfxMsc_PinMap.h:64
IfxMsc0_EN0_P10_2_OUT
IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT
Definition: IfxMsc_PinMap.c:45
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IFXMSC_PINMAP_SDI_IN_NUM_ITEMS
#define IFXMSC_PINMAP_SDI_IN_NUM_ITEMS
Definition: IfxMsc_PinMap.h:174
IfxMsc1_END3_P23_5_OUT
IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT
Definition: IfxMsc_PinMap.c:72
IfxMsc0_END3_P13_0_OUT
IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT
Definition: IfxMsc_PinMap.c:64
IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:171
IfxMsc1_SDI0_P23_1_IN
IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN
Definition: IfxMsc_PinMap.c:89
IfxMsc1_SDI2_P32_4_IN
IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN
Definition: IfxMsc_PinMap.c:91
IfxMsc0_FCLP_P13_1_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT
Definition: IfxMsc_PinMap.c:78
IfxMsc0_INJ1_P10_5_IN
IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN
Definition: IfxMsc_PinMap.c:82
IfxMsc0_EN0_P10_4_OUT
IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT
Definition: IfxMsc_PinMap.c:47
IfxMsc_Fcln_Out_pinTable
const IfxMsc_Fcln_Out * IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:172
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:121
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxMsc0_INJ0_P00_0_IN
IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN
Definition: IfxMsc_PinMap.c:81
IfxMsc0_SDI2_P14_3_IN
IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN
Definition: IfxMsc_PinMap.c:87
IfxMsc1_END2_P23_4_OUT
IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT
Definition: IfxMsc_PinMap.c:70
IfxMsc_En_Out_pinTable
const IfxMsc_En_Out * IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:101
IfxMsc1_FCLN_P22_0_OUT
IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT
Definition: IfxMsc_PinMap.c:76
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxMsc0_SDI3_P11_3_IN
IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN
Definition: IfxMsc_PinMap.c:88
IfxMsc1_SOP_P22_3_OUT
IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT
Definition: IfxMsc_PinMap.c:98
IfxMsc1_FCLP_P22_1_OUT
IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT
Definition: IfxMsc_PinMap.c:80
IfxMsc0_EN1_P10_1_OUT
IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT
Definition: IfxMsc_PinMap.c:51
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:125
IfxMsc0_SOND_P13_2_OUT
IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT
Definition: IfxMsc_PinMap.c:92
IfxMsc0_END2_P10_4_OUT
IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT
Definition: IfxMsc_PinMap.c:58
IfxMsc_Fclp_Out_pinTable
const IfxMsc_Fclp_Out * IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:183
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:122
IfxMsc_Sop_Out_pinTable
const IfxMsc_Sop_Out * IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:233
IfxMsc0_FCLP_P13_2_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT
Definition: IfxMsc_PinMap.c:79
IfxMsc0_FCLN_P13_0_OUT
IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT
Definition: IfxMsc_PinMap.c:74
IfxMsc_Son_Out_pinTable
const IfxMsc_Son_Out * IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:222
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxMsc_Son_Out
SON pin mapping structure.
Definition: IfxMsc_PinMap.h:105
IfxMsc1_END2_P32_4_OUT
IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT
Definition: IfxMsc_PinMap.c:71
IfxMsc1_EN0_P23_4_OUT
IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT
Definition: IfxMsc_PinMap.c:67
IfxMsc0_EN1_P13_0_OUT
IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT
Definition: IfxMsc_PinMap.c:53
IfxMsc_Fcln_Out
FCLN pin mapping structure.
Definition: IfxMsc_PinMap.h:89
IfxMsc0_END3_P15_3_OUT
IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT
Definition: IfxMsc_PinMap.c:66
IfxMsc0_EN0_P11_11_OUT
IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT
Definition: IfxMsc_PinMap.c:48
IfxMsc1_FCLND_P22_0_OUT
IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT
Definition: IfxMsc_PinMap.c:75
IFXMSC_PINMAP_INJ_IN_NUM_ITEMS
#define IFXMSC_PINMAP_INJ_IN_NUM_ITEMS
Definition: IfxMsc_PinMap.h:173
IfxMsc_En_Out
EN pin mapping structure.
Definition: IfxMsc_PinMap.h:72
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:123
IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:176
IfxMsc0_END3_P11_2_OUT
IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT
Definition: IfxMsc_PinMap.c:63
IfxMsc0_SOP_P11_9_OUT
IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT
Definition: IfxMsc_PinMap.c:96
IfxMsc0_SDI1_P10_2_IN
IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN
Definition: IfxMsc_PinMap.c:86
IfxMsc_Fclp_Out
FCLP pin mapping structure.
Definition: IfxMsc_PinMap.h:81
IfxMsc0_FCLND_P13_0_OUT
IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT
Definition: IfxMsc_PinMap.c:73
IfxMsc1_EN1_P23_5_OUT
IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT
Definition: IfxMsc_PinMap.c:69
IfxMsc0_END2_P14_10_OUT
IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT
Definition: IfxMsc_PinMap.c:60
IfxMsc0_EN0_P15_5_OUT
IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT
Definition: IfxMsc_PinMap.c:50
IFXMSC_PINMAP_NUM_TARGETS
#define IFXMSC_PINMAP_NUM_TARGETS
Definition: IfxMsc_PinMap.h:169
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:126
IfxMsc0_SON_P13_2_OUT
IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT
Definition: IfxMsc_PinMap.c:93
IfxMsc0_FCLP_P11_6_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT
Definition: IfxMsc_PinMap.c:77
IfxMsc0_END2_P15_5_OUT
IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT
Definition: IfxMsc_PinMap.c:61
IfxMsc0_END3_P14_9_OUT
IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT
Definition: IfxMsc_PinMap.c:65
IfxMsc_Inj_In
INJ pin mapping structure.
Definition: IfxMsc_PinMap.h:56
IfxMsc1_INJ1_P33_13_IN
IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN
Definition: IfxMsc_PinMap.c:84
IfxMsc0_EN1_P14_9_OUT
IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT
Definition: IfxMsc_PinMap.c:54
IfxMsc0_SDI0_P11_10_IN
IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN
Definition: IfxMsc_PinMap.c:85
IfxMsc0_EN1_P15_3_OUT
IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT
Definition: IfxMsc_PinMap.c:55
IFXMSC_PINMAP_SON_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_SON_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:175
IfxMsc1_SON_P22_2_OUT
IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT
Definition: IfxMsc_PinMap.c:95
IfxMsc1_EN0_P32_4_OUT
IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT
Definition: IfxMsc_PinMap.c:68
IfxMsc_Sop_Out
SOP pin mapping structure.
Definition: IfxMsc_PinMap.h:97
IfxMsc0_END3_P10_1_OUT
IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT
Definition: IfxMsc_PinMap.c:62
IfxMsc0_END2_P10_2_OUT
IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT
Definition: IfxMsc_PinMap.c:56
IfxMsc0_END2_P10_3_OUT
IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT
Definition: IfxMsc_PinMap.c:57
IfxMsc1_SDI1_P02_3_IN
IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN
Definition: IfxMsc_PinMap.c:90
IfxMsc_Sdi_In_pinTable
const IfxMsc_Sdi_In * IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:207
IfxMsc1_SOND_P22_2_OUT
IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT
Definition: IfxMsc_PinMap.c:94
IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:172
IfxMsc_PinMap.h
MSC I/O map.
IfxMsc0_EN0_P14_10_OUT
IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT
Definition: IfxMsc_PinMap.c:49
IfxMsc_Inj_In_pinTable
const IfxMsc_Inj_In * IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:196
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:124
IFXMSC_PINMAP_EN_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_EN_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:170
IfxMsc0_EN1_P11_2_OUT
IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT
Definition: IfxMsc_PinMap.c:52
IFXMSC_PINMAP_NUM_MODULES
#define IFXMSC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxMsc_PinMap.h:168
IfxMsc0_SOP_P13_3_OUT
IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT
Definition: IfxMsc_PinMap.c:97
IfxMsc0_END2_P11_11_OUT
IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT
Definition: IfxMsc_PinMap.c:59


iLLD_TC26B: IfxMsc_PinMap.h Source File

  • _PinMap
IfxMsc_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxMsc_PinMap.h
3 * \brief MSC I/O map
4 * \ingroup IfxLld_Msc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Msc_pinmap MSC Pin Mapping
42 * \ingroup IfxLld_Msc
43 */
44
45 #ifndef IFXMSC_PINMAP_H
46 #define IFXMSC_PINMAP_H
47
48 #include <IfxMsc_reg.h>
49 #include <_Impl/IfxMsc_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Msc_pinmap
53 * \{ */
54
55 /** \brief INJ pin mapping structure */
56 typedef const struct
57 {
58 Ifx_MSC* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel select; /**< \brief Input multiplexer value */
61 } IfxMsc_Inj_In;
62
63 /** \brief SDI pin mapping structure */
64 typedef const struct
65 {
66 Ifx_MSC* module; /**< \brief Base address */
67 IfxPort_Pin pin; /**< \brief Port pin */
68 Ifx_RxSel select; /**< \brief Input multiplexer value */
69 } IfxMsc_Sdi_In;
70
71 /** \brief EN pin mapping structure */
72 typedef const struct
73 {
74 Ifx_MSC* module; /**< \brief Base address */
75 uint8 target; /**< \brief Target ID */
76 IfxPort_Pin pin; /**< \brief Port pin */
77 IfxPort_OutputIdx select; /**< \brief Port control code */
78 } IfxMsc_En_Out;
79
80 /** \brief FCLP pin mapping structure */
81 typedef const struct
82 {
83 Ifx_MSC* module; /**< \brief Base address */
84 IfxPort_Pin pin; /**< \brief Port pin */
85 IfxPort_OutputIdx select; /**< \brief Port control code */
86 } IfxMsc_Fclp_Out;
87
88 /** \brief FCLN pin mapping structure */
89 typedef const struct
90 {
91 Ifx_MSC* module; /**< \brief Base address */
92 IfxPort_Pin pin; /**< \brief Port pin */
93 IfxPort_OutputIdx select; /**< \brief Port control code */
94 } IfxMsc_Fcln_Out;
95
96 /** \brief SOP pin mapping structure */
97 typedef const struct
98 {
99 Ifx_MSC* module; /**< \brief Base address */
100 IfxPort_Pin pin; /**< \brief Port pin */
101 IfxPort_OutputIdx select; /**< \brief Port control code */
102 } IfxMsc_Sop_Out;
103
104 /** \brief SON pin mapping structure */
105 typedef const struct
106 {
107 Ifx_MSC* module; /**< \brief Base address */
108 IfxPort_Pin pin; /**< \brief Port pin */
109 IfxPort_OutputIdx select; /**< \brief Port control code */
110 } IfxMsc_Son_Out;
111
112 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT; /**< \brief MSC0_EN0: MSC0 output */
113 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT; /**< \brief MSC0_EN0: MSC0 output */
114 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT; /**< \brief MSC0_EN0: MSC0 output */
115 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT; /**< \brief MSC0_EN0: MSC0 output */
116 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT; /**< \brief MSC0_EN0: MSC0 output */
117 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT; /**< \brief MSC0_EN0: MSC0 output */
118 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT; /**< \brief MSC0_EN1: MSC0 output */
119 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT; /**< \brief MSC0_EN1: MSC0 output */
120 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT; /**< \brief MSC0_EN1: MSC0 output */
121 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT; /**< \brief MSC0_EN1: MSC0 output */
122 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT; /**< \brief MSC0_EN1: MSC0 output */
123 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT; /**< \brief MSC0_END2: MSC0 output */
124 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT; /**< \brief MSC0_END2: MSC0 output */
125 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT; /**< \brief MSC0_END2: MSC0 output */
126 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT; /**< \brief MSC0_END2: MSC0 output */
127 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT; /**< \brief MSC0_END2: MSC0 output */
128 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT; /**< \brief MSC0_END2: MSC0 output */
129 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT; /**< \brief MSC0_END3: MSC0 output */
130 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT; /**< \brief MSC0_END3: MSC0 output */
131 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT; /**< \brief MSC0_END3: MSC0 output */
132 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT; /**< \brief MSC0_END3: MSC0 output */
133 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT; /**< \brief MSC0_END3: MSC0 output */
134 IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT; /**< \brief MSC1_EN0: MSC1 output */
135 IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT; /**< \brief MSC1_EN0: MSC1 output */
136 IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT; /**< \brief MSC1_EN1: MSC1 output */
137 IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT; /**< \brief MSC1_END2: MSC1 output */
138 IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT; /**< \brief MSC1_END2: MSC1 output */
139 IFX_EXTERN IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT; /**< \brief MSC1_END3: MSC1 output */
140 IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT; /**< \brief MSC0_FCLND: MSC0 output (LVDS) */
141 IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT; /**< \brief MSC0_FCLN: MSC0 output (LVDS) */
142 IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT; /**< \brief MSC1_FCLND: MSC1 output (LVDS) */
143 IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT; /**< \brief MSC1_FCLN: MSC1 output (LVDS) */
144 IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT; /**< \brief MSC0_FCLP: MSC0 output */
145 IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT; /**< \brief MSC0_FCLP: MSC0 output (LVDS) */
146 IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT; /**< \brief MSC0_FCLP: MSC0 output */
147 IFX_EXTERN IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT; /**< \brief MSC1_FCLP: MSC1 output (LVDS) */
148 IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN; /**< \brief MSC0_INJ0: MSC0 input */
149 IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN; /**< \brief MSC0_INJ1: MSC0 input */
150 IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN; /**< \brief MSC1_INJ0: MSC1 input */
151 IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN; /**< \brief MSC1_INJ1: MSC1 input */
152 IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN; /**< \brief MSC0_SDI0: MSC0 input */
153 IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN; /**< \brief MSC0_SDI1: MSC0 input */
154 IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN; /**< \brief MSC0_SDI2: MSC0 input */
155 IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN; /**< \brief MSC0_SDI3: MSC0 input */
156 IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN; /**< \brief MSC1_SDI0: MSC1 input */
157 IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN; /**< \brief MSC1_SDI1: MSC1 input */
158 IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN; /**< \brief MSC1_SDI2: MSC1 input */
159 IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT; /**< \brief MSC0_SOND: MSC0 output (LVDS) */
160 IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT; /**< \brief MSC0_SON: MSC0 output (LVDS) */
161 IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT; /**< \brief MSC1_SOND: MSC1 output (LVDS) */
162 IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT; /**< \brief MSC1_SON: MSC1 output (LVDS) */
163 IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT; /**< \brief MSC0_SOP: MSC0 output */
164 IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT; /**< \brief MSC0_SOP: MSC0 output (LVDS) */
165 IFX_EXTERN IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT; /**< \brief MSC1_SOP: MSC1 output (LVDS) */
166
167 /** \brief Table dimensions */
168 #define IFXMSC_PINMAP_NUM_MODULES 2
169 #define IFXMSC_PINMAP_NUM_TARGETS 4
170 #define IFXMSC_PINMAP_EN_OUT_NUM_ITEMS 6
171 #define IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS 2
172 #define IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS 3
173 #define IFXMSC_PINMAP_INJ_IN_NUM_ITEMS 2
174 #define IFXMSC_PINMAP_SDI_IN_NUM_ITEMS 4
175 #define IFXMSC_PINMAP_SON_OUT_NUM_ITEMS 2
176 #define IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS 2
177
178
179 /** \brief IfxMsc_En_Out table */
180 IFX_EXTERN const IfxMsc_En_Out *IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS];
181
182 /** \brief IfxMsc_Fcln_Out table */
183 IFX_EXTERN const IfxMsc_Fcln_Out *IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS];
184
185 /** \brief IfxMsc_Fclp_Out table */
186 IFX_EXTERN const IfxMsc_Fclp_Out *IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS];
187
188 /** \brief IfxMsc_Inj_In table */
189 IFX_EXTERN const IfxMsc_Inj_In *IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS];
190
191 /** \brief IfxMsc_Sdi_In table */
192 IFX_EXTERN const IfxMsc_Sdi_In *IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS];
193
194 /** \brief IfxMsc_Son_Out table */
195 IFX_EXTERN const IfxMsc_Son_Out *IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS];
196
197 /** \brief IfxMsc_Sop_Out table */
198 IFX_EXTERN const IfxMsc_Sop_Out *IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS];
199
200 /** \} */
201
202 #endif /* IFXMSC_PINMAP_H */
IfxMsc_Sdi_In
SDI pin mapping structure.
Definition: IfxMsc_PinMap.h:64
IfxMsc0_SDI0_P11_10_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN
MSC0_SDI0: MSC0 input.
Definition: IfxMsc_PinMap.h:152
IFXMSC_PINMAP_SDI_IN_NUM_ITEMS
#define IFXMSC_PINMAP_SDI_IN_NUM_ITEMS
Definition: IfxMsc_PinMap.h:174
IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:171
IfxMsc0_END2_P10_2_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT
MSC0_END2: MSC0 output.
Definition: IfxMsc_PinMap.h:123
IfxMsc1_INJ1_P33_13_IN
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN
MSC1_INJ1: MSC1 input.
Definition: IfxMsc_PinMap.h:151
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxMsc1_EN1_P23_5_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT
MSC1_EN1: MSC1 output.
Definition: IfxMsc_PinMap.h:136
IfxMsc0_EN1_P13_0_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT
MSC0_EN1: MSC0 output.
Definition: IfxMsc_PinMap.h:120
IfxMsc1_INJ0_P23_3_IN
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN
MSC1_INJ0: MSC1 input.
Definition: IfxMsc_PinMap.h:150
IfxMsc0_SDI2_P14_3_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN
MSC0_SDI2: MSC0 input.
Definition: IfxMsc_PinMap.h:154
IfxMsc0_EN0_P11_11_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT
MSC0_EN0: MSC0 output.
Definition: IfxMsc_PinMap.h:115
IfxMsc_En_Out_pinTable
IFX_EXTERN const IfxMsc_En_Out * IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]
IfxMsc_En_Out table.
Definition: IfxMsc_PinMap.h:180
IfxMsc0_INJ1_P10_5_IN
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN
MSC0_INJ1: MSC0 input.
Definition: IfxMsc_PinMap.h:149
IfxMsc_Inj_In::module
Ifx_MSC * module
Base address.
Definition: IfxMsc_PinMap.h:58
IfxMsc1_EN0_P23_4_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT
MSC1_EN0: MSC1 output.
Definition: IfxMsc_PinMap.h:134
IfxMsc0_FCLP_P13_2_OUT
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT
MSC0_FCLP: MSC0 output.
Definition: IfxMsc_PinMap.h:146
IfxMsc0_FCLP_P11_6_OUT
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT
MSC0_FCLP: MSC0 output.
Definition: IfxMsc_PinMap.h:144
IfxMsc0_EN0_P14_10_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT
MSC0_EN0: MSC0 output.
Definition: IfxMsc_PinMap.h:116
IfxMsc0_SOP_P11_9_OUT
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT
MSC0_SOP: MSC0 output.
Definition: IfxMsc_PinMap.h:163
IfxMsc0_SON_P13_2_OUT
IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT
MSC0_SON: MSC0 output (LVDS)
Definition: IfxMsc_PinMap.h:160
IfxMsc0_FCLP_P13_1_OUT
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT
MSC0_FCLP: MSC0 output (LVDS)
Definition: IfxMsc_PinMap.h:145
IfxMsc0_EN0_P10_2_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT
MSC0_EN0: MSC0 output.
Definition: IfxMsc_PinMap.h:112
IfxMsc_Sdi_In_pinTable
IFX_EXTERN const IfxMsc_Sdi_In * IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
IfxMsc_Sdi_In table.
Definition: IfxMsc_PinMap.h:192
IfxMsc0_SOND_P13_2_OUT
IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT
MSC0_SOND: MSC0 output (LVDS)
Definition: IfxMsc_PinMap.h:159
IfxMsc1_END3_P23_5_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT
MSC1_END3: MSC1 output.
Definition: IfxMsc_PinMap.h:139
IfxMsc_Inj_In_pinTable
IFX_EXTERN const IfxMsc_Inj_In * IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
IfxMsc_Inj_In table.
Definition: IfxMsc_PinMap.h:189
IfxMsc_Fcln_Out_pinTable
IFX_EXTERN const IfxMsc_Fcln_Out * IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
IfxMsc_Fcln_Out table.
Definition: IfxMsc_PinMap.h:183
IfxMsc1_SDI1_P02_3_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN
MSC1_SDI1: MSC1 input.
Definition: IfxMsc_PinMap.h:157
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxMsc0_END2_P15_5_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT
MSC0_END2: MSC0 output.
Definition: IfxMsc_PinMap.h:128
IfxMsc_En_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxMsc_PinMap.h:77
IfxMsc1_END2_P23_4_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT
MSC1_END2: MSC1 output.
Definition: IfxMsc_PinMap.h:137
IfxMsc_Son_Out_pinTable
IFX_EXTERN const IfxMsc_Son_Out * IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
IfxMsc_Son_Out table.
Definition: IfxMsc_PinMap.h:195
IfxMsc0_SOP_P13_3_OUT
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT
MSC0_SOP: MSC0 output (LVDS)
Definition: IfxMsc_PinMap.h:164
IfxMsc0_INJ0_P00_0_IN
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN
MSC0_INJ0: MSC0 input.
Definition: IfxMsc_PinMap.h:148
IfxMsc_Sop_Out_pinTable
IFX_EXTERN const IfxMsc_Sop_Out * IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]
IfxMsc_Sop_Out table.
Definition: IfxMsc_PinMap.h:198
IfxMsc_Son_Out
SON pin mapping structure.
Definition: IfxMsc_PinMap.h:105
IfxMsc0_END3_P11_2_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT
MSC0_END3: MSC0 output.
Definition: IfxMsc_PinMap.h:130
IfxMsc1_SON_P22_2_OUT
IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT
MSC1_SON: MSC1 output (LVDS)
Definition: IfxMsc_PinMap.h:162
IfxMsc0_FCLN_P13_0_OUT
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT
MSC0_FCLN: MSC0 output (LVDS)
Definition: IfxMsc_PinMap.h:141
IfxMsc0_EN0_P15_5_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT
MSC0_EN0: MSC0 output.
Definition: IfxMsc_PinMap.h:117
IfxMsc1_SDI0_P23_1_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN
MSC1_SDI0: MSC1 input.
Definition: IfxMsc_PinMap.h:156
IfxMsc_Fcln_Out
FCLN pin mapping structure.
Definition: IfxMsc_PinMap.h:89
IfxMsc0_END3_P10_1_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT
MSC0_END3: MSC0 output.
Definition: IfxMsc_PinMap.h:129
IfxMsc0_END2_P10_4_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT
MSC0_END2: MSC0 output.
Definition: IfxMsc_PinMap.h:125
IfxMsc1_SOP_P22_3_OUT
IFX_EXTERN IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT
MSC1_SOP: MSC1 output (LVDS)
Definition: IfxMsc_PinMap.h:165
IFXMSC_PINMAP_INJ_IN_NUM_ITEMS
#define IFXMSC_PINMAP_INJ_IN_NUM_ITEMS
Definition: IfxMsc_PinMap.h:173
IfxMsc_En_Out
EN pin mapping structure.
Definition: IfxMsc_PinMap.h:72
IfxMsc0_EN1_P14_9_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT
MSC0_EN1: MSC0 output.
Definition: IfxMsc_PinMap.h:121
IfxMsc0_EN1_P15_3_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT
MSC0_EN1: MSC0 output.
Definition: IfxMsc_PinMap.h:122
IfxMsc0_END3_P13_0_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT
MSC0_END3: MSC0 output.
Definition: IfxMsc_PinMap.h:131
IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:176
IfxMsc_En_Out::target
uint8 target
Target ID.
Definition: IfxMsc_PinMap.h:75
IfxMsc0_END3_P15_3_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT
MSC0_END3: MSC0 output.
Definition: IfxMsc_PinMap.h:133
IfxMsc0_FCLND_P13_0_OUT
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT
MSC0_FCLND: MSC0 output (LVDS)
Definition: IfxMsc_PinMap.h:140
IfxMsc_Fclp_Out
FCLP pin mapping structure.
Definition: IfxMsc_PinMap.h:81
IFXMSC_PINMAP_NUM_TARGETS
#define IFXMSC_PINMAP_NUM_TARGETS
Definition: IfxMsc_PinMap.h:169
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxMsc1_SDI2_P32_4_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN
MSC1_SDI2: MSC1 input.
Definition: IfxMsc_PinMap.h:158
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxMsc_Inj_In
INJ pin mapping structure.
Definition: IfxMsc_PinMap.h:56
IfxMsc0_EN1_P11_2_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT
MSC0_EN1: MSC0 output.
Definition: IfxMsc_PinMap.h:119
IfxMsc1_END2_P32_4_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT
MSC1_END2: MSC1 output.
Definition: IfxMsc_PinMap.h:138
IfxMsc0_SDI1_P10_2_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN
MSC0_SDI1: MSC0 input.
Definition: IfxMsc_PinMap.h:153
IfxMsc1_EN0_P32_4_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT
MSC1_EN0: MSC1 output.
Definition: IfxMsc_PinMap.h:135
IfxMsc0_EN0_P10_3_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT
MSC0_EN0: MSC0 output.
Definition: IfxMsc_PinMap.h:113
IFXMSC_PINMAP_SON_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_SON_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:175
IfxMsc_Sop_Out
SOP pin mapping structure.
Definition: IfxMsc_PinMap.h:97
IfxMsc_Inj_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxMsc_PinMap.h:60
IfxMsc_Inj_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxMsc_PinMap.h:59
IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:172
IfxMsc0_EN1_P10_1_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT
MSC0_EN1: MSC0 output.
Definition: IfxMsc_PinMap.h:118
IfxMsc0_END2_P11_11_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT
MSC0_END2: MSC0 output.
Definition: IfxMsc_PinMap.h:126
IfxMsc_Fclp_Out_pinTable
IFX_EXTERN const IfxMsc_Fclp_Out * IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
IfxMsc_Fclp_Out table.
Definition: IfxMsc_PinMap.h:186
IfxMsc1_FCLN_P22_0_OUT
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT
MSC1_FCLN: MSC1 output (LVDS)
Definition: IfxMsc_PinMap.h:143
IFXMSC_PINMAP_EN_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_EN_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:170
IfxMsc_cfg.h
MSC on-chip implementation data.
IfxMsc0_END2_P10_3_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT
MSC0_END2: MSC0 output.
Definition: IfxMsc_PinMap.h:124
IfxMsc1_SOND_P22_2_OUT
IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT
MSC1_SOND: MSC1 output (LVDS)
Definition: IfxMsc_PinMap.h:161
IFXMSC_PINMAP_NUM_MODULES
#define IFXMSC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxMsc_PinMap.h:168
IfxMsc0_END2_P14_10_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT
MSC0_END2: MSC0 output.
Definition: IfxMsc_PinMap.h:127
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxMsc1_FCLP_P22_1_OUT
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT
MSC1_FCLP: MSC1 output (LVDS)
Definition: IfxMsc_PinMap.h:147
IfxMsc0_EN0_P10_4_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT
MSC0_EN0: MSC0 output.
Definition: IfxMsc_PinMap.h:114
IfxMsc1_FCLND_P22_0_OUT
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT
MSC1_FCLND: MSC1 output (LVDS)
Definition: IfxMsc_PinMap.h:142
IfxMsc0_END3_P14_9_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT
MSC0_END3: MSC0 output.
Definition: IfxMsc_PinMap.h:132
IfxMsc0_SDI3_P11_3_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN
MSC0_SDI3: MSC0 input.
Definition: IfxMsc_PinMap.h:155
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxMsc_cfg.c Source File

  • _Impl
IfxMsc_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxMsc_cfg.c
3 * \brief MSC on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxMsc_cfg.h"
49
50 /******************************************************************************/
51 /*-----------------------Exported Variables/Constants-------------------------*/
52 /******************************************************************************/
53
54 IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES] = {
55 {&MODULE_MSC0, IfxMsc_Index_0},
56 {&MODULE_MSC1, IfxMsc_Index_1}
57 };
IfxMsc_Index_0
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:82
IfxMsc_Index_1
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:83
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFXMSC_NUM_MODULES
#define IFXMSC_NUM_MODULES
Definition: IfxMsc_cfg.h:67
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxMsc_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES]
Definition: IfxMsc_cfg.c:54
IfxMsc_cfg.h
MSC on-chip implementation data.


iLLD_TC26B: IfxMsc_cfg.h Source File

  • _Impl
IfxMsc_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxMsc_cfg.h
3 * \brief MSC on-chip implementation data
4 * \ingroup IfxLld_Msc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Msc MSC
44 * \ingroup IfxLld
45 * \defgroup IfxLld_Msc_Impl Implementation
46 * \ingroup IfxLld_Msc
47 * \defgroup IfxLld_Msc_Std Standard Driver
48 * \ingroup IfxLld_Msc
49 * \defgroup IfxLld_Msc_Impl_Enumerations Enumerations
50 * \ingroup IfxLld_Msc_Impl
51 */
52
53 #ifndef IFXMSC_CFG_H
54 #define IFXMSC_CFG_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "Cpu/Std/Ifx_Types.h"
61 #include "IfxMsc_reg.h"
62
63 /******************************************************************************/
64 /*-----------------------------------Macros-----------------------------------*/
65 /******************************************************************************/
66
67 #define IFXMSC_NUM_MODULES 2
68
69 #define IFXMSC_NUM_ENABLE_SELECT_LINES (4)
70
71 /******************************************************************************/
72 /*--------------------------------Enumerations--------------------------------*/
73 /******************************************************************************/
74
75 /** \addtogroup IfxLld_Msc_Impl_Enumerations
76 * \{ */
77 /** \brief List of the available MSC resources
78 */
79 typedef enum
80 {
81 IfxMsc_Index_none = -1, /**< \brief Not Selected */
82 IfxMsc_Index_0 = 0, /**< \brief "MSC index "+str(x) */
83 IfxMsc_Index_1 /**< \brief "MSC index "+str(x) */
84 } IfxMsc_Index;
85
86 /** \} */
87
88 /******************************************************************************/
89 /*-------------------Global Exported Variables/Constants----------------------*/
90 /******************************************************************************/
91 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES];
92
93 #endif /* IFXMSC_CFG_H */
IfxMsc_Index
IfxMsc_Index
List of the available MSC resources.
Definition: IfxMsc_cfg.h:79
IfxMsc_Index_none
Not Selected.
Definition: IfxMsc_cfg.h:81
IfxMsc_Index_0
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:82
IfxMsc_Index_1
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:83
IfxMsc_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES]
Definition: IfxMsc_cfg.h:91
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFXMSC_NUM_MODULES
#define IFXMSC_NUM_MODULES
Definition: IfxMsc_cfg.h:67
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140


iLLD_TC26B: IfxMtu.c Source File

  • Mtu
  • Std
IfxMtu.c
Go to the documentation of this file.
1 /**
2 * \file IfxMtu.c
3 * \brief MTU basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxMtu.h"
48
49 /** \addtogroup IfxLld_Mtu_Std_Utility
50 * \{ */
51
52 /******************************************************************************/
53 /*-----------------------Private Function Prototypes--------------------------*/
54 /******************************************************************************/
55
56 /** \brief API to wait for requested tower depth.
57 * \param towerDepth tower depth of MBIST Ram
58 * \param numInstructions number of instructions
59 * \param mbistSel Memory Selection
60 * \return None
61 */
62 IFX_STATIC void IfxMtu_waitForMbistDone(uint32 towerDepth, uint8 numInstructions, IfxMtu_MbistSel mbistSel);
63
64 /** \} */
65
66 /******************************************************************************/
67 /*-------------------------Function Implementations---------------------------*/
68 /******************************************************************************/
69
70 void IfxMtu_clearErrorTracking(IfxMtu_MbistSel mbistSel)
71 {
72 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
73 mc->ECCD.U |= (1 << IFX_MC_ECCD_TRC_OFF);
74 }
75
76
77 void IfxMtu_clearSram(IfxMtu_MbistSel mbistSel)
78 {
79 uint8 isEndInitEnabled = 0;
80 uint16 password = 0;
81
82 password = IfxScuWdt_getSafetyWatchdogPassword();
83
84 /* Check if the Endinit is cleared by application. If not, then handle it internally inside teh function.*/
85 if (IfxScuWdt_getSafetyWatchdogEndInit() == 1U)
86 {
87 /* Clear EndInit */
88 IfxScuWdt_clearSafetyEndinit(password);
89 isEndInitEnabled = 1;
90 }
91
92 IfxMtu_clearSramStart(mbistSel);
93
94 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
95 IfxScuWdt_setSafetyEndinit(password);
96
97 /* wait for the end of the fill operation */
98 IfxMtu_waitForMbistDone(IfxMtu_sramTable[mbistSel].mbistDelay, 1, mbistSel);
99 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (((Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel))->MSTATUS.B.DONE != 0));
100
101 while (!IfxMtu_isMbistDone(mbistSel))
102 {
103 __nop();
104 }
105
106 /* Clear EndInit */
107 IfxScuWdt_clearSafetyEndinit(password);
108
109 IfxMtu_clearSramContinue(mbistSel);
110
111 if (isEndInitEnabled == 1)
112 {
113 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
114 IfxScuWdt_setSafetyEndinit(password);
115 }
116 }
117
118
119 void IfxMtu_clearSramContinue(IfxMtu_MbistSel mbistSel)
120 {
121 /* Before clearing the ECC error flags we've to issue a dummy SRAM access to get a valid memory output */
122 IfxMtu_readSramAddress(mbistSel, 0x0000);
123 /* Note: a SMU alarm will be flagged HERE if the wrong ECC has been written! */
124 IfxMtu_disableMbistShell(mbistSel);
125
126 /* for auto-init memories: wait for the end of the clear operation */
127 while (IfxMtu_isAutoInitRunning(mbistSel))
128 {}
129 }
130
131
132 void IfxMtu_clearSramStart(IfxMtu_MbistSel mbistSel)
133 {
134 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
135
136 IfxMtu_enableMbistShell(mbistSel);
137
138 /* for auto-init memories: wait for the end of the clear operation */
139 while (IfxMtu_isAutoInitRunning(mbistSel))
140 {}
141
142 /* write valid ECC code for all-zero data into RDBFL registers */
143 {
144 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mbistSel < IFXMTU_NUM_MBIST_TABLE_ITEMS);
145 const IfxMtu_SramItem *item = (IfxMtu_SramItem *)&IfxMtu_sramTable[mbistSel];
146
147 uint8 numBlocks = item->numBlocks;
148 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, numBlocks > 0);
149
150 uint16 dataSize = item->dataSize;
151 uint8 eccSize = item->eccSize;
152 uint32 eccInvPos0 = dataSize + item->eccInvPos0;
153 uint32 eccInvPos1 = dataSize + item->eccInvPos1;
154
155 uint32 memSize = dataSize + eccSize;
156
157 uint32 bitPos = 0;
158 uint32 wordIx = 0;
159 uint16 data = 0;
160 /* de-serialize data stream into 16bit packets */
161 uint32 mem;
162
163 for (mem = 0; mem < numBlocks; ++mem)
164 {
165 uint32 i;
166
167 for (i = 0; i < memSize; ++i)
168 {
169 if ((i == eccInvPos0) || (i == eccInvPos1))
170 {
171 data |= (1 << bitPos);
172 }
173
174 ++bitPos;
175
176 if (bitPos >= 16)
177 {
178 mc->RDBFL[wordIx++].U = data;
179 bitPos = 0;
180 data = 0;
181 }
182 }
183 }
184
185 /* final word? */
186 if (bitPos != 0)
187 {
188 mc->RDBFL[wordIx].U = data;
189 }
190 }
191
192 /* start fill operation */
193 uint16 mcontrolMask = 0x4000; /* set USERED flag */
194 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DINIT_OFF) | (1 << IFX_MC_MCONTROL_START_OFF); /* START = DINIT = 1 */
195 mc->MCONTROL.U = mcontrolMask | (0 << IFX_MC_MCONTROL_DINIT_OFF) | (1 << IFX_MC_MCONTROL_DINIT_OFF); /* START = 0 */
196 }
197
198
199 void IfxMtu_enableErrorTracking(IfxMtu_MbistSel mbistSel, boolean enable)
200 {
201 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
202
203 if (enable == FALSE)
204 {
205 mc->ECCS.U &= ~(1 << IFX_MC_ECCS_TRE_OFF);
206 }
207 else
208 {
209 mc->ECCS.U |= (1 << IFX_MC_ECCS_TRE_OFF);
210 }
211 }
212
213
214 uint32 IfxMtu_getSystemAddress(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR trackedSramAddress)
215 {
216 uint32 sramAddress = trackedSramAddress.B.ADDR;
217 uint32 mbi = trackedSramAddress.B.MBI;
218 uint32 systemAddress = 0;
219
220 switch (mbistSel)
221 {
222 case IfxMtu_MbistSel_cpu0Pspr:
223 systemAddress = 0x70100000 | ((sramAddress << 3) | ((mbi & 1) << 2));
224 break;
225
226 case IfxMtu_MbistSel_cpu0Dspr:
227 systemAddress = 0x70000000 | ((sramAddress << 4) | ((mbi & 3) << 2));
228 break;
229
230 case IfxMtu_MbistSel_cpu1Pspr:
231 systemAddress = 0x60100000 | ((sramAddress << 4) | ((mbi & 1) << 3));
232 break;
233
234 case IfxMtu_MbistSel_cpu1Dspr:
235 systemAddress = 0x60000000 | ((sramAddress << 4) | ((mbi & 3) << 2));
236 break;
237
238 case IfxMtu_MbistSel_dma:
239 systemAddress = 0xf0012000 | ((sramAddress << 5) | ((mbi & 3) << 3));
240 break;
241
242 default:
243 systemAddress = 0; /* unsupported address descrambling */
244 }
245
246 return systemAddress;
247 }
248
249
250 uint8 IfxMtu_getTrackedSramAddresses(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR *trackedSramAddresses)
251 {
252 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
253 uint8 validFlags = (mc->ECCD.U >> IFX_MC_ECCD_VAL_OFF) & IFX_MC_ECCD_VAL_MSK;
254 uint8 numTrackedAddresses = 0;
255 int i;
256
257 #if IFX_MC_ECCD_VAL_LEN > IFXMTU_MAX_TRACKED_ADDRESSES
258 # error "Unexpected size of VAL mask"
259 #endif
260
261 for (i = 0; i < IFXMTU_MAX_TRACKED_ADDRESSES; ++i)
262 {
263 if (validFlags & (1 << i))
264 {
265 trackedSramAddresses[numTrackedAddresses].U = mc->ETRR[i].U;
266 ++numTrackedAddresses;
267 }
268 }
269
270 return numTrackedAddresses;
271 }
272
273
274 void IfxMtu_readSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
275 {
276 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
277
278 /* configure MBIST for single read opeation */
279 uint16 mcontrolMask = 0x4000; /* set USERED flag */
280 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF);
281 mc->CONFIG0.U = (1 << IFX_MC_CONFIG0_NUMACCS_OFF) | (1 << IFX_MC_CONFIG0_ACCSTYPE_OFF); /* 1 read access */
282 mc->CONFIG1.U = 0; /* ensure that linear scrambling is used */
283
284 /* Set the address to be read (RAEN = 0) */
285 mc->RANGE.U = sramAddress;
286
287 /* Start operation */
288 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF) | (1 << IFX_MC_MCONTROL_START_OFF);
289 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF);
290
291 /* wait for the end of the fill operation */
292 IfxMtu_waitForMbistDone(256, 1, mbistSel);
293
294 while (!IfxMtu_isMbistDone(mbistSel))
295 {
296 __nop();
297 }
298 }
299
300
301 uint8 IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
302 {
303 /* Select MBIST Memory Controller:
304 * Ifx_MC is a type describing structure of MBIST Memory Controller
305 * registers defined in IfxMc_regdef.h file - MC object */
306 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
307 uint16 password = 0;
308 uint8 retVal = 0U;
309 uint8 isEndInitEnabled = 0;
310 password = IfxScuWdt_getSafetyWatchdogPassword();
311
312 /* Check if the Endinit is cleared by application. If not, then handle it internally inside teh function.*/
313 if (IfxScuWdt_getSafetyWatchdogEndInit() == 1U)
314 {
315 /* Clear EndInit */
316 IfxScuWdt_clearSafetyEndinit(password);
317 isEndInitEnabled = 1;
318 }
319
320 /* Enable MBIST Memory Controller */
321 IfxMtu_enableMbistShell(mbistSel);
322
323 /* for auto-init memories: wait for the end of the clear operation */
324 while (IfxMtu_isAutoInitRunning(mbistSel))
325 {}
326
327 /* Configure Non-destructive Inversion test */
328 mc->CONFIG0.U = 0x4005; //NUMACCS=4, ACCSTYPE=5
329 mc->CONFIG1.U = 0x5000; //AG_MOD=5
330 /* Set the range register */
331 mc->RANGE.U = (rangeSel << 15) | (rangeAddrUp << 7) | (rangeAddrLow << 0);
332 /* Run the tests */
333 /* As per AP32917 and Errata MTU_TC.007 DIR is set to 0 */
334 mc->MCONTROL.U = 0x4001;
335 mc->MCONTROL.B.START = 0;
336 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
337 IfxScuWdt_setSafetyEndinit(password);
338
339 /* wait for the end of the fill operation */
340 IfxMtu_waitForMbistDone(IfxMtu_sramTable[mbistSel].mbistDelay, 4, mbistSel);
341 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mc->MSTATUS.B.DONE != 0);
342
343 while (!IfxMtu_isMbistDone(mbistSel))
344 {
345 __nop();
346 }
347
348 /* Clear EndInit Again */
349 IfxScuWdt_clearSafetyEndinit(password);
350
351 /* Check the Fail Status */
352 if (IfxMtu_checkErrorFlags(mbistSel))
353 {
354 /* Read the Error tracking register and return saying test failed */
355 *errorAddr = mc->ETRR[0].U;
356 retVal = 1U;
357 }
358
359 /* Disable Memory Controller */
360 IfxMtu_disableMbistShell(mbistSel);
361
362 /* for auto-init memories: wait for the end of the clear operation */
363 while (IfxMtu_isAutoInitRunning(mbistSel))
364 {}
365
366 /* Restore the endinit state */
367 if (isEndInitEnabled == 1)
368 {
369 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
370 IfxScuWdt_setSafetyEndinit(password);
371 }
372
373 return retVal;
374 }
375
376
377 void IfxMtu_writeSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
378 {
379 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
380 uint8 isEndInitEnabled = 0;
381 uint16 password = 0;
382 password = IfxScuWdt_getSafetyWatchdogPassword();
383
384 /* Check if the Endinit is cleared by application. If not, then handle it internally inside teh function.*/
385 if (IfxScuWdt_getSafetyWatchdogEndInit() == 1U)
386 {
387 /* Clear EndInit */
388 IfxScuWdt_clearSafetyEndinit(password);
389 isEndInitEnabled = 1;
390 }
391
392 /* configure MBIST for single write opeation */
393 uint16 mcontrolMask = 0x4000; /* set USERED flag */
394 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF);
395 mc->CONFIG0.U = (1 << IFX_MC_CONFIG0_NUMACCS_OFF) | (0 << IFX_MC_CONFIG0_ACCSTYPE_OFF); /* 1 write access */
396 mc->CONFIG1.U = 0; /* ensure that linear scrambling is used */
397
398 /* Set the address to be written (RAEN = 0) */
399 mc->RANGE.U = sramAddress;
400
401 /* Start operation */
402 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF) | (1 << IFX_MC_MCONTROL_START_OFF);
403 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF);
404
405 if (isEndInitEnabled == 1)
406 {
407 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
408 IfxScuWdt_setSafetyEndinit(password);
409 }
410
411 /* Wait for the end of the operation */
412 IfxMtu_waitForMbistDone(IfxMtu_sramTable[mbistSel].mbistDelay, 1, mbistSel);
413 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mc->MSTATUS.B.DONE != 0);
414
415 while (!IfxMtu_isMbistDone(mbistSel))
416 {
417 __nop();
418 }
419 }
420
421
422 IFX_STATIC void IfxMtu_waitForMbistDone(uint32 towerDepth, uint8 numInstructions, IfxMtu_MbistSel mbistSel)
423 {
424 uint32 waitFact = (SCU_CCUCON0.B.SPBDIV / SCU_CCUCON0.B.SRIDIV) * numInstructions;
425 volatile uint32 waitTime;
426
427 switch (mbistSel)
428 {
429 case IfxMtu_MbistSel_gtmFifo:
430 case IfxMtu_MbistSel_gtmMcs0:
431 case IfxMtu_MbistSel_gtmMcs1:
432 case IfxMtu_MbistSel_gtmDpll1a:
433 case IfxMtu_MbistSel_gtmDpll1b:
434 case IfxMtu_MbistSel_gtmDpll2:
435 waitFact = waitFact * SCU_CCUCON1.B.GTMDIV;
436 break;
437 case IfxMtu_MbistSel_ethermac:
438 waitFact = waitFact * SCU_CCUCON1.B.GTMDIV;
439 break;
440
441 case IfxMtu_MbistSel_mcan:
442 case IfxMtu_MbistSel_psi5:
443 waitFact = waitFact * SCU_CCUCON0.B.BAUD1DIV;
444
445 break;
446
447 case IfxMtu_MbistSel_erayObf:
448 case IfxMtu_MbistSel_erayIbfTbf:
449 waitFact = (IfxScuCcu_getSriFrequency() / IfxScuCcu_getPll2ErayFrequency()) * numInstructions;
450 break;
451
452 case IfxMtu_MbistSel_erayMbf:
453 waitFact = (IfxScuCcu_getSriFrequency() / IfxScuCcu_getPll2ErayFrequency()) * numInstructions * 4;
454 break;
455
456 case IfxMtu_MbistSel_emem0:
457 case IfxMtu_MbistSel_emem1:
458 case IfxMtu_MbistSel_emem2:
459 case IfxMtu_MbistSel_emem3:
460 case IfxMtu_MbistSel_emem4:
461 case IfxMtu_MbistSel_emem5:
462 case IfxMtu_MbistSel_emem6:
463 case IfxMtu_MbistSel_emem7:
464 case IfxMtu_MbistSel_ememXtm0:
465 case IfxMtu_MbistSel_ememXtm1:
466 case IfxMtu_MbistSel_fft0:
467 case IfxMtu_MbistSel_fft1:
468 case IfxMtu_MbistSel_cifJpeg1_4:
469 case IfxMtu_MbistSel_cifJpeg3:
470 case IfxMtu_MbistSel_cifCif:
471 waitFact = waitFact * SCU_CCUCON2.B.BBBDIV;
472 break;
473 default:
474 break;
475 }
476
477 if (numInstructions == 4)
478 {
479 waitTime = (towerDepth * waitFact) + 30;
480 }
481 else
482 {
483 waitTime = ((towerDepth / 4) * waitFact) + 30;
484 }
485
486 waitTime = waitTime / 3;
487
488 while (waitTime--)
489 {
490 __nop();
491 }
492 }
IfxMtu.h
MTU basic functionality.
IfxMtu_sramTable
const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS]
Definition: IfxMtu_cfg.c:53
IfxMtu_MbistSel_emem7
Definition: IfxMtu_cfg.h:115
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxMtu_MbistSel_mcan
Definition: IfxMtu_cfg.h:102
IfxMtu_MbistSel_cifJpeg1_4
Definition: IfxMtu_cfg.h:116
IfxMtu_MbistSel_cpu0Pspr
Definition: IfxMtu_cfg.h:91
IfxMtu_MbistSel_erayObf
Definition: IfxMtu_cfg.h:103
IfxMtu_MbistSel_fft0
Definition: IfxMtu_cfg.h:123
IfxMtu_clearSram
void IfxMtu_clearSram(IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit ...
Definition: IfxMtu.c:77
IfxMtu_MbistSel_erayMbf
Definition: IfxMtu_cfg.h:105
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxMtu_runNonDestructiveInversionTest
uint8 IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can b...
Definition: IfxMtu.c:301
IfxMtu_SramItem::eccInvPos0
uint8 eccInvPos0
First ECC bit which needs to be inverted.
Definition: IfxMtu_cfg.h:138
waitTime
void waitTime(Ifx_TickTime timeout)
Wait time function.
Definition: Bsp.c:64
IfxMtu_MbistSel
IfxMtu_MbistSel
MBIST Selection.
Definition: IfxMtu_cfg.h:83
IfxMtu_waitForMbistDone
IFX_STATIC void IfxMtu_waitForMbistDone(uint32 towerDepth, uint8 numInstructions, IfxMtu_MbistSel mbistSel)
API to wait for requested tower depth.
Definition: IfxMtu.c:422
IfxMtu_MbistSel_emem1
Definition: IfxMtu_cfg.h:109
IFXMTU_NUM_MBIST_TABLE_ITEMS
#define IFXMTU_NUM_MBIST_TABLE_ITEMS
Number of MBIST Table items.
Definition: IfxMtu_cfg.h:71
IfxMtu_SramItem::eccInvPos1
uint8 eccInvPos1
Second ECC bit which needs to be inverted.
Definition: IfxMtu_cfg.h:139
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxMtu_getSystemAddress
uint32 IfxMtu_getSystemAddress(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR trackedSramAddress)
Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (...
Definition: IfxMtu.c:214
IfxMtu_MbistSel_gtmFifo
Definition: IfxMtu_cfg.h:95
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:195
IfxMtu_clearSramContinue
void IfxMtu_clearSramContinue(IfxMtu_MbistSel mbistSel)
This Function should be called after MBIST Clear SRAM operation is completed. Note: The function shou...
Definition: IfxMtu.c:119
IfxMtu_MbistSel_cpu1Pspr
Definition: IfxMtu_cfg.h:88
IfxMtu_checkErrorFlags
IFX_INLINE boolean IfxMtu_checkErrorFlags(IfxMtu_MbistSel mbistSel)
Returns True if any Error Flags are set.
Definition: IfxMtu.h:563
IfxMtu_MbistSel_emem4
Definition: IfxMtu_cfg.h:112
IFXMTU_MC_ADDRESS_BASE
#define IFXMTU_MC_ADDRESS_BASE
Base address of first MBIST Control Block.
Definition: IfxMtu_cfg.h:67
IfxMtu_clearSramStart
void IfxMtu_clearSramStart(IfxMtu_MbistSel mbistSel)
This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn&#39;t wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared.
Definition: IfxMtu.c:132
IfxMtu_MbistSel_ememXtm1
Definition: IfxMtu_cfg.h:122
IfxMtu_MbistSel_emem0
Definition: IfxMtu_cfg.h:108
IfxMtu_MbistSel_cifCif
Definition: IfxMtu_cfg.h:118
IfxMtu_SramItem::dataSize
uint16 dataSize
Data Size of each memory block.
Definition: IfxMtu_cfg.h:136
IfxMtu_MbistSel_cifJpeg3
Definition: IfxMtu_cfg.h:117
IFXMTU_MAX_TRACKED_ADDRESSES
#define IFXMTU_MAX_TRACKED_ADDRESSES
Maximum number of tracked SRAM addresses (ETTR)
Definition: IfxMtu_cfg.h:75
IfxMtu_SramItem::numBlocks
uint8 numBlocks
number of SRAM blocks
Definition: IfxMtu_cfg.h:135
IfxMtu_MbistSel_ememXtm0
Definition: IfxMtu_cfg.h:121
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxMtu_MbistSel_gtmDpll2
Definition: IfxMtu_cfg.h:100
IfxMtu_MbistSel_psi5
Definition: IfxMtu_cfg.h:101
IfxMtu_readSramAddress
void IfxMtu_readSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
Definition: IfxMtu.c:274
IfxMtu_getTrackedSramAddresses
uint8 IfxMtu_getTrackedSramAddresses(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR *trackedSramAddresses)
Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registe...
Definition: IfxMtu.c:250
IfxMtu_MbistSel_emem6
Definition: IfxMtu_cfg.h:114
IfxMtu_MbistSel_gtmDpll1b
Definition: IfxMtu_cfg.h:99
IfxMtu_MbistSel_emem2
Definition: IfxMtu_cfg.h:110
IfxMtu_enableMbistShell
IFX_INLINE void IfxMtu_enableMbistShell(IfxMtu_MbistSel mbistSel)
Enables the MBIST Shell of the given SRAM.
Definition: IfxMtu.h:496
IfxMtu_MbistSel_gtmDpll1a
Definition: IfxMtu_cfg.h:98
IfxMtu_MbistSel_ethermac
Definition: IfxMtu_cfg.h:93
IfxMtu_MbistSel_cpu1Dspr
Definition: IfxMtu_cfg.h:86
IfxScuCcu_getPll2ErayFrequency
IFX_INLINE float32 IfxScuCcu_getPll2ErayFrequency(void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2ERAY frequency b...
Definition: IfxScuCcu.h:1094
IfxMtu_MbistSel_emem3
Definition: IfxMtu_cfg.h:111
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:424
IfxMtu_MbistSel_gtmMcs0
Definition: IfxMtu_cfg.h:96
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:253
IfxMtu_MbistSel_erayIbfTbf
Definition: IfxMtu_cfg.h:104
IfxMtu_MbistSel_gtmMcs1
Definition: IfxMtu_cfg.h:97
IfxMtu_writeSramAddress
void IfxMtu_writeSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
Definition: IfxMtu.c:377
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxMtu_MbistSel_cpu0Dspr
Definition: IfxMtu_cfg.h:90
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxMtu_isMbistDone
IFX_INLINE boolean IfxMtu_isMbistDone(IfxMtu_MbistSel mbistSel)
This Function returns the status of MBIST clear Sram operation. Caution: It is recommended not to cal...
Definition: IfxMtu.h:547
IfxMtu_MbistSel_fft1
Definition: IfxMtu_cfg.h:124
IfxMtu_enableErrorTracking
void IfxMtu_enableErrorTracking(IfxMtu_MbistSel mbistSel, boolean enable)
Enables the tracking of SRAM errors.
Definition: IfxMtu.c:199
IfxMtu_clearErrorTracking
void IfxMtu_clearErrorTracking(IfxMtu_MbistSel mbistSel)
Clears the error tracking registers (ETRR), valid and overflow bits. CAUTION: This function should be...
Definition: IfxMtu.c:70
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxMtu_disableMbistShell
IFX_INLINE void IfxMtu_disableMbistShell(IfxMtu_MbistSel mbistSel)
Disables the MBIST Shell of the given SRAM.
Definition: IfxMtu.h:488
IfxMtu_MbistSel_emem5
Definition: IfxMtu_cfg.h:113
IfxMtu_isAutoInitRunning
IFX_INLINE boolean IfxMtu_isAutoInitRunning(IfxMtu_MbistSel mbistSel)
Returns TRUE if Auto-Initialisation is running for the given SRAM.
Definition: IfxMtu.h:525
IfxScuCcu_getSriFrequency
float32 IfxScuCcu_getSriFrequency(void)
API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in C...
Definition: IfxScuCcu.c:614
IfxScuWdt_getSafetyWatchdogEndInit
IFX_INLINE boolean IfxScuWdt_getSafetyWatchdogEndInit(void)
SCUWDT API to fetch current endinit of Safety/System Watchdog module.
Definition: IfxScuWdt.h:500
IfxMtu_SramItem::eccSize
uint8 eccSize
ECC Size of each memory block.
Definition: IfxMtu_cfg.h:137
IfxMtu_SramItem
Describes physical parameters of a SRAM memory.
Definition: IfxMtu_cfg.h:133
IfxMtu_MbistSel_dma
Definition: IfxMtu_cfg.h:120


iLLD_TC26B: IfxMtu.h Source File

  • Mtu
  • Std
IfxMtu.h
Go to the documentation of this file.
1 /**
2 * \file IfxMtu.h
3 * \brief MTU basic functionality
4 * \ingroup IfxLld_Mtu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Mtu_Usage How to use the Mtu driver?
43 * \ingroup IfxLld_Mtu
44 *
45 * The Memory Test Unit (MTU) controls and monitors the test, initialization and data integrity checking functions of the various internal memories in the device
46 *
47 * The Mtu driver provides set of routines for various Mbist operations
48 *
49 * In the following sections it will be described, how to integrate the Mtu driver into the application framework.
50 *
51 * \section IfxLld_Mtu_SramInit Sram Initialisation
52 * \subsection IfxLld_Mtu_Include Include Files
53 *
54 * Include following header file into your C code:
55 * \code
56 * #include <Mtu/IfxMtu.h>
57 * \endcode
58 *
59 *
60 * \subsection IfxLld_Mtu_ClearSram_SyncPolling Clear Sram (Synchronous polling mode)
61 *
62 * The Sram initialisation in synchronous polling mode (i.e wait till the complete operation is done) can be used as:
63 *
64 * \code
65 * clearSram(IfxMtu_MbistSel_cpu0Dspr);
66 * \endcode
67 *
68 * \subsection IfxLld_Mtu_ClearSram_ASyncPolling Clear Sram (Asynchronous polling mode)
69 *
70 * The Sram initialisation can be triggered by calling IfxMtu_clearSramStart() function, then can be queried for completion in a task using IfxMtu_isMbistDone. Once it's completed, then IfxMtu_clearSramContinue() has to be
71 * called.
72 * Note: The Safety Endinit watchdog has to be cleared before and set after for the IfxMtu_clearSramStart() and IfxMtu_clearSramContinue() functions.
73 *
74 * Following code triggers Sram initilisation.
75 * \code
76 *
77 * uint16 password = 0;
78 *
79 * password = IfxScuWdt_getSafetyWatchdogPassword();
80 *
81 * // Clear EndInit
82 * IfxScuWdt_clearSafetyEndinit(password);
83 *
84 * IfxMtu_clearSramStart(IfxMtu_MbistSel_cpu0Dspr);
85 *
86 * // Set EndInit Watchdog
87 * IfxScuWdt_setSafetyEndinit(password);
88 * \endcode
89 *
90 * Sram initialisation status can be queried in a task and once done complete the operation using:
91 * \code
92 * if (IfxMtu_isMbistDone(IfxMtu_MbistSel_cpu0Dspr))
93 * {
94 * // Sram Clear operation done
95 *
96 * // Clear EndInit
97 * IfxScuWdt_clearSafetyEndinit(password);
98 *
99 * IfxMtu_clearSramContinue(IfxMtu_MbistSel_cpu0Dspr);
100 *
101 * // Set EndInit Watchdog
102 * IfxScuWdt_setSafetyEndinit(password);
103 * }
104 * else
105 * {
106 * // Sram operation is still in progress
107 * }
108 * \endcode
109 *
110 *
111 * \section IfxLld_Mtu_SramError Sram Error tracking
112 * Example usage of Sram Error tracking
113 * \code
114 * IfxScuWdt_clearSafetyEndinit(password);
115 *
116 * IfxMtu_MbistSel mbistSel = IfxMtu_MbistSel_cpu1Dspr;
117 * Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
118 *
119 * IfxMtu_enableMbistShell(mbistSel);
120 *
121 * // for auto-init memories: wait for the end of the clear operation
122 * while (IfxMtu_isAutoInitRunning(mbistSel))
123 * {}
124 * IfxMtu_enableErrorTracking(mbistSel, TRUE);
125 * uint32 numEtrr = 5;
126 * // print tracked error address
127 * {
128 * Ifx_MC_ETRR trackedSramAddresses[IFXMTU_MAX_TRACKED_ADDRESSES];
129 * uint8 numTrackedAddresses = IfxMtu_getTrackedSramAddresses(mbistSel, trackedSramAddresses);
130 * for(uint32 i=0; i<numEtrr; ++i) {
131 * printf("%d: Error Address:0x%04x, Error System Address:0x%04x \n",
132 * i,
133 * trackedSramAddresses[i].B.ADDR,
134 * IfxMtu_getSystemAddress(mbistSel, trackedSramAddresses[i]));
135 * }
136 * }
137 * }
138 *
139 * IfxMtu_disableMbistShell(mbistSel);
140 * IfxScuWdt_setSafetyEndinit(password);
141 * \endcode
142 *
143 * \section IfxLld_Mtu_MemoryTest Memory Tests
144 * \subsection IfxLld_Mtu_MemoryTest_NDI Non Destructive Inversion Test
145 *
146 * Usage Example:
147 * \code
148 * // Enable MTU clock
149 * {
150 * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
151 * IfxScuWdt_clearCpuEndinit(password);
152 * IfxMtu_enableModule();
153 * IfxScuWdt_setCpuEndinit(password);
154 * }
155 *
156 *
157 * {
158 * uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
159 * uint16 errAddr = 0;
160 * IfxScuWdt_clearSafetyEndinit(password);
161 *
162 * // run Non distructive inversion test for cpu0 DSPR memory (Range selection disabled)
163 * IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel_cpu0Dspr, 0, 0xFF, 0, &errAddr);
164 * // Clear Error Flags which are set in case you want to run further tests
165 * IfxMtu_clearErrorTracking(IfxMtu_MbistSel_cpu0Dspr);
166 *
167 * IfxScuWdt_setSafetyEndinit(password);
168 * }
169 * \endcode
170 *
171 *
172 * \defgroup IfxLld_Mtu_Std_Utility Utility Functions
173 * \ingroup IfxLld_Mtu_Std
174 * \defgroup IfxLld_Mtu_Std_Operative MBIST Operations
175 * \ingroup IfxLld_Mtu_Std
176 * \defgroup IfxLld_Mtu_Std_ErrorTracking MBIST Error Tracking
177 * \ingroup IfxLld_Mtu_Std
178 */
179
180 #ifndef IFXMTU_H
181 #define IFXMTU_H 1
182
183 /******************************************************************************/
184 /*----------------------------------Includes----------------------------------*/
185 /******************************************************************************/
186
187 #include "_Impl/IfxMtu_cfg.h"
188 #include "IfxMc_bf.h"
189 #include "IfxMtu_reg.h"
190 #include "IfxMc_reg.h"
191 #include "IfxScu_reg.h"
192 #include "_Utilities/Ifx_Assert.h"
193 #include "Scu/Std/IfxScuWdt.h"
194 #include "Scu/Std/IfxScuCcu.h"
195
196 /******************************************************************************/
197 /*-----------------------------------Macros-----------------------------------*/
198 /******************************************************************************/
199
200 /** \brief Mask for the ERROR flags
201 */
202 #define IFXMTU_ERROR_FLAGS_MASK \
203 (((unsigned int)IFX_MC_ECCD_EOV_MSK << IFX_MC_ECCD_EOV_OFF) | \
204 ((unsigned int)IFX_MC_ECCD_CERR_MSK << IFX_MC_ECCD_CERR_OFF) | \
205 ((unsigned int)IFX_MC_ECCD_UERR_MSK << IFX_MC_ECCD_UERR_OFF) | \
206 ((unsigned int)IFX_MC_ECCD_AERR_MSK << IFX_MC_ECCD_AERR_OFF))
207
208 /** \addtogroup IfxLld_Mtu_Std_Utility
209 * \{ */
210
211 /******************************************************************************/
212 /*-------------------------Inline Function Prototypes-------------------------*/
213 /******************************************************************************/
214
215 /** \brief Disables the MBIST Shell of the given SRAM
216 * \param mbistSel Memory Selection
217 * \return None
218 *
219 * Usage Example
220 * \code
221 *
222 * IfxMtu_disableMbistShell(IfxMtu_MbistSel_cpu0Dtag);
223 *
224 * // Note: Wait for Auto-initilisation to be completed for auto-init memories like cpu-Dtag, cpu-Ptag, Cpu-Dcache, Cpu-Pcache
225 * while (IfxMtu_isAutoInitRunning(IfxMtu_MbistSel_cpu0Dtag))
226 * {}
227 * \endcode
228 *
229 */
230 IFX_INLINE void IfxMtu_disableMbistShell(IfxMtu_MbistSel mbistSel);
231
232 /** \brief Enables the MBIST Shell of the given SRAM.
233 * \param mbistSel Memory Selection
234 * \return None
235 *
236 * Usage Example
237 * \code
238 * // Enable MTU clock
239 * {
240 * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
241 * IfxScuWdt_clearCpuEndinit(password);
242 * IfxMtu_enableModule();
243 * IfxScuWdt_setCpuEndinit(password);
244 * }
245 *
246 * {
247 * IfxMtu_enableMbistShell(IfxMtu_MbistSel_cpu0Dtag);
248 *
249 * // Note: Wait for Auto-initilisation to be completed for auto-init memories like cpu-Dtag, cpu-Ptag, Cpu-Dcache, Cpu-Pcache,
250 * while (IfxMtu_isAutoInitRunning(IfxMtu_MbistSel_cpu0Dtag))
251 * {}
252 * }
253 * \endcode
254 *
255 */
256 IFX_INLINE void IfxMtu_enableMbistShell(IfxMtu_MbistSel mbistSel);
257
258 /** \brief Enables the MTU module
259 * \return None
260 */
261 IFX_INLINE void IfxMtu_enableModule(void);
262
263 /** \brief Returns TRUE if Auto-Initialisation is running for the given SRAM.
264 *
265 * Should be polled after MBIST enableMbistShell to ensure that an auto-init operation is finished before starting a new operation.
266 * \param mbistSel Memory Selection
267 * \return TRUE if auto-initialisation running.
268 */
269 IFX_INLINE boolean IfxMtu_isAutoInitRunning(IfxMtu_MbistSel mbistSel);
270
271 /** \brief Returns the status of whether the module is enabled or not
272 * \return
273 */
274 IFX_INLINE boolean IfxMtu_isModuleEnabled(void);
275
276 /** \} */
277
278 /** \addtogroup IfxLld_Mtu_Std_Operative
279 * \{ */
280
281 /******************************************************************************/
282 /*-------------------------Inline Function Prototypes-------------------------*/
283 /******************************************************************************/
284
285 /** \brief This Function returns the status of MBIST clear Sram operation.
286 * Caution: It is recommended not to call this function continously in a loop. Use IfxMtu_ClearSram() function for Synchronous polling mode.
287 * \param mbistSel Memory Selection
288 * \return status of Mbist Clear Sram operation (TRUE - Operation completed, FALSE - Operation still in progress)
289 *
290 * A coding example can be found in \ref IfxLld_Mtu_Usage
291 *
292 */
293 IFX_INLINE boolean IfxMtu_isMbistDone(IfxMtu_MbistSel mbistSel);
294
295 /******************************************************************************/
296 /*-------------------------Global Function Prototypes-------------------------*/
297 /******************************************************************************/
298
299 /** \brief Function to Clear the MBIST SRAM (Synchronous mode).
300 * Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end.
301 * \param mbistSel Memory Selection
302 * \return None
303 *
304 * A coding example can be found in \ref IfxLld_Mtu_Usage
305 *
306 */
307 IFX_EXTERN void IfxMtu_clearSram(IfxMtu_MbistSel mbistSel);
308
309 /** \brief This Function should be called after MBIST Clear SRAM operation is completed.
310 * Note: The function should be called with safety endinit bit cleared.
311 * \param mbistSel Memory Selection
312 * \return None
313 *
314 * A coding example can be found in \ref IfxLld_Mtu_Usage
315 *
316 */
317 IFX_EXTERN void IfxMtu_clearSramContinue(IfxMtu_MbistSel mbistSel);
318
319 /** \brief This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn't wait till the end of operation.
320 * The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation.
321 * If Synchronous usage is need, use IfxMtu_clearSram() function.
322 * Note: The function should be called with safety endinit bit cleared.
323 * \param mbistSel Memory Selection
324 * \return None
325 *
326 * A coding example can be found in \ref IfxLld_Mtu_Usage
327 *
328 */
329 IFX_EXTERN void IfxMtu_clearSramStart(IfxMtu_MbistSel mbistSel);
330
331 /**
332 * \param mbistSel Memory Selection
333 * \param sramAddress SRAM address which should be read
334 * \return None
335 *
336 * A coding example can be found in \ref IfxLld_Mtu_Usage
337 *
338 */
339 IFX_EXTERN void IfxMtu_readSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress);
340
341 /** \brief This function runs the Non-Destructive Inversion test algorithm.
342 * Non-Destructive Inversion test can be considered as a simple linear test that is able to find all Stuck-At faults (the cell remains stuck at a value for any operation) without destroying any user data. The test accesses every Word in the address range defined by the RANGE register, four times.
343 * Test Steps:
344 * 1. Read data Word including check bits
345 * 2. write back all bits inverted
346 * 3. Read data Word including check bits
347 * 4. Write back all bits inverted
348 * At the end of this procedure the user data remains unchanged and and every bit has been set to 0 and 1. Any single Stuck-At error will be visible as a correctable error.
349 * Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end.
350 * The Error flags need to be cleared to enable further tracking after the test
351 * \param mbistSel Memory Selection
352 * \param rangeSel enable/disable range Selection (0 - disable, 1- enable)
353 * \param rangeAddrUp when range mode is enabled, it specifies the upper logical block address limit in 64 word increments.
354 * \param rangeAddrLow when range mode is enabled, it specifies the lower logical block address limit.
355 * \param errorAddr If the test fails, it contains the error address (bit0 - bit12) and memory block index (Bit13 - Bit15)
356 * \return Test Status (0-PASS, 1- FAIL)
357 */
358 IFX_EXTERN uint8 IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr);
359
360 /**
361 * \param mbistSel Memory Selection
362 * \param sramAddress SRAM address which should be written
363 * \return None
364 */
365 IFX_EXTERN void IfxMtu_writeSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress);
366
367 /** \} */
368
369 /** \addtogroup IfxLld_Mtu_Std_ErrorTracking
370 * \{ */
371
372 /******************************************************************************/
373 /*-------------------------Inline Function Prototypes-------------------------*/
374 /******************************************************************************/
375
376 /** \brief Returns the status of the error tracking
377 * \param mbistSel Memory Selection
378 * \return TRUE if error tracking enabled.
379 */
380 IFX_INLINE boolean IfxMtu_isErrorTrackingEnabled(IfxMtu_MbistSel mbistSel);
381
382 /** \brief Returns the error tracking overflow status.
383 * CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005).
384 * \param mbistSel Memory Selection
385 * \return TRUE if more errors were detected since last clear than error tracking registers are available, or if more than one memory block was in error at the same time.
386 */
387 IFX_INLINE boolean IfxMtu_isErrorTrackingOverflow(IfxMtu_MbistSel mbistSel);
388
389 /** \brief Returns True if any Error Flags are set
390 * \param mbistSel Memory slection
391 * \return True if any error Flag is set
392 */
393 IFX_INLINE boolean IfxMtu_checkErrorFlags(IfxMtu_MbistSel mbistSel);
394
395 /******************************************************************************/
396 /*-------------------------Global Function Prototypes-------------------------*/
397 /******************************************************************************/
398
399 /** \brief Clears the error tracking registers (ETRR), valid and overflow bits.
400 * CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005).
401 * \param mbistSel Memory Selection
402 * \return None
403 *
404 * A coding example can be found in \ref IfxLld_Mtu_Usage
405 *
406 */
407 IFX_EXTERN void IfxMtu_clearErrorTracking(IfxMtu_MbistSel mbistSel);
408
409 /** \brief Enables the tracking of SRAM errors.
410 * \param mbistSel Memory Selection
411 * \param enable TRUE to enable error tracking, FALSE to disable error tracking.
412 * \return None
413 *
414 * A coding example can be found in \ref IfxLld_Mtu_Usage
415 *
416 */
417 IFX_EXTERN void IfxMtu_enableErrorTracking(IfxMtu_MbistSel mbistSel, boolean enable);
418
419 /** \brief Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (SRAM address and block)
420 *
421 * Please note that not all memories of the system are supported by this function.
422 * Additional memories will be considered on request.
423 * \param mbistSel Memory Selection
424 * \param trackedSramAddress tracked SRAM address which consists of an ADDR and MBI field (SRAM address and block)
425 * \return descrambled system address if supported by this function, otherwise 0
426 *
427 * Example usage: see \ref IfxMtu_getTrackedSramAddresses
428 *
429 */
430 IFX_EXTERN uint32 IfxMtu_getSystemAddress(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR trackedSramAddress);
431
432 /** \brief Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registers.
433 * CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005).
434 * \param mbistSel Memory Selection
435 * \param trackedSramAddresses will contain the tracked error addresses in trackedSramAdresses[x].B.ADDR and affected blocks in sramAddresses[x].B.MBI
436 *
437 * The array size shall be IFXMTU_MAX_TRACKED_ADDRESSES
438 * \return number of tracked errors (0..IFXMTU_MAX_TRACKED_ADDRESSES)
439 *
440 * Example usage to print out tracked errors of a given memory:
441 *
442 * We assume that the MTU clock has already been enabled, and that the MBIST instance has been selected; e.g. for LMU:
443 * \code
444 * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
445 * IfxScuWdt_clearCpuEndinit(password);
446 *
447 * IfxMtu_enableModule();
448 *
449 * IfxMtu_MbistSel mbistSel = IfxMtu_MbistSel_lmu;
450 *
451 * IfxMtu_enableMbistShell(mbistSel);
452 *
453 * // for auto-init memories: wait for the end of the clear operation
454 * while (IfxMtu_isAutoInitRunning(mbistSel))
455 * {}
456 * \endcode
457 *
458 * Now the tracking information can be retrieved with:
459 *
460 * \code
461 * {
462 * Ifx_MC_ETRR trackedSramAddresses[IFXMTU_MAX_TRACKED_ADDRESSES];
463 * uint8 numTrackedAddresses = IfxMtu_getTrackedSramAddresses(mbistSel, trackedSramAddresses);
464 *
465 * clib_ver_printf("Tracked addresses: %d (Overflow: %d)\n",
466 * numTrackedAddresses,
467 * IfxMtu_isErrorTrackingOverflow(mbistSel) ? 1 : 0);
468 *
469 * for(int i=0; i<numTrackedAddresses; ++i) {
470 * clib_ver_printf("%d: A:0x%04x MBI:%d -> SystemAddress: 0x%08x\n",
471 * i,
472 * trackedSramAddresses[i].B.ADDR,
473 * trackedSramAddresses[i].B.MBI,
474 * IfxMtu_getSystemAddress(mbistSel, trackedSramAddresses[i]));
475 * }
476 * }
477 * \endcode
478 *
479 */
480 IFX_EXTERN uint8 IfxMtu_getTrackedSramAddresses(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR *trackedSramAddresses);
481
482 /** \} */
483
484 /******************************************************************************/
485 /*---------------------Inline Function Implementations------------------------*/
486 /******************************************************************************/
487
488 IFX_INLINE void IfxMtu_disableMbistShell(IfxMtu_MbistSel mbistSel)
489 {
490 volatile uint32 *mtuMemtest = (volatile uint32 *)((uint32)&MTU_MEMTEST0 + 4 * (mbistSel >> 5));
491 uint32 mask = 1 << (mbistSel & 0x1f);
492 *mtuMemtest &= ~mask;
493 }
494
495
496 IFX_INLINE void IfxMtu_enableMbistShell(IfxMtu_MbistSel mbistSel)
497 {
498 volatile uint32 *mtuMemtest = (volatile uint32 *)((uint32)&MTU_MEMTEST0 + 4 * (mbistSel >> 5));
499 uint32 mask = 1 << (mbistSel & 0x1f);
500 *mtuMemtest |= mask;
501 }
502
503
504 IFX_INLINE void IfxMtu_enableModule(void)
505 {
506 uint8 isEndInitEnabled = 0;
507
508 if (IfxScuWdt_getCpuWatchdogEndInit() == 1U)
509 {
510 /* Clear EndInit */
511 IfxScuWdt_clearCpuEndinit(IfxScuWdt_getCpuWatchdogPassword());
512 isEndInitEnabled = 1;
513 }
514
515 /* MTU clock enable */
516 MTU_CLC.U = 0x0U;
517
518 if (isEndInitEnabled == 1U)
519 {
520 IfxScuWdt_setCpuEndinit(IfxScuWdt_getCpuWatchdogPassword());
521 }
522 }
523
524
525 IFX_INLINE boolean IfxMtu_isAutoInitRunning(IfxMtu_MbistSel mbistSel)
526 {
527 volatile uint32 *mtuMemstat = (volatile uint32 *)((uint32)&MTU_MEMSTAT0 + 4 * (mbistSel >> 5));
528 uint32 mask = 1 << (mbistSel & 0x1f);
529 return (*mtuMemstat & mask) != 0;
530 }
531
532
533 IFX_INLINE boolean IfxMtu_isErrorTrackingEnabled(IfxMtu_MbistSel mbistSel)
534 {
535 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
536 return mc->ECCS.B.TRE ? TRUE : FALSE;
537 }
538
539
540 IFX_INLINE boolean IfxMtu_isErrorTrackingOverflow(IfxMtu_MbistSel mbistSel)
541 {
542 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
543 return mc->ECCD.B.EOV ? TRUE : FALSE;
544 }
545
546
547 IFX_INLINE boolean IfxMtu_isMbistDone(IfxMtu_MbistSel mbistSel)
548 {
549 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
550 uint16 status;
551
552 status = mc->MSTATUS.U;
553 return (boolean)(status & 0x01);
554 }
555
556
557 IFX_INLINE boolean IfxMtu_isModuleEnabled(void)
558 {
559 return MTU_CLC.B.DISS == 0;
560 }
561
562
563 IFX_INLINE boolean IfxMtu_checkErrorFlags(IfxMtu_MbistSel mbistSel)
564 {
565 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
566 return (boolean)((mc->ECCD.U & IFXMTU_ERROR_FLAGS_MASK) > 0);
567 }
568
569
570 #endif /* IFXMTU_H */
IfxMtu_clearSram
IFX_EXTERN void IfxMtu_clearSram(IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit ...
Definition: IfxMtu.c:77
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxMtu_runNonDestructiveInversionTest
IFX_EXTERN uint8 IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can b...
Definition: IfxMtu.c:301
Ifx_Assert.h
Assert functions.
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxMtu_MbistSel
IfxMtu_MbistSel
MBIST Selection.
Definition: IfxMtu_cfg.h:83
IfxMtu_isErrorTrackingOverflow
IFX_INLINE boolean IfxMtu_isErrorTrackingOverflow(IfxMtu_MbistSel mbistSel)
Returns the error tracking overflow status. CAUTION: This function should be called after enabling Mb...
Definition: IfxMtu.h:540
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxScuWdt.h
SCU basic functionality.
IfxMtu_enableModule
IFX_INLINE void IfxMtu_enableModule(void)
Enables the MTU module.
Definition: IfxMtu.h:504
IfxMtu_getSystemAddress
IFX_EXTERN uint32 IfxMtu_getSystemAddress(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR trackedSramAddress)
Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (...
Definition: IfxMtu.c:214
IfxMtu_clearSramContinue
IFX_EXTERN void IfxMtu_clearSramContinue(IfxMtu_MbistSel mbistSel)
This Function should be called after MBIST Clear SRAM operation is completed. Note: The function shou...
Definition: IfxMtu.c:119
IfxMtu_checkErrorFlags
IFX_INLINE boolean IfxMtu_checkErrorFlags(IfxMtu_MbistSel mbistSel)
Returns True if any Error Flags are set.
Definition: IfxMtu.h:563
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IFXMTU_MC_ADDRESS_BASE
#define IFXMTU_MC_ADDRESS_BASE
Base address of first MBIST Control Block.
Definition: IfxMtu_cfg.h:67
IfxMtu_clearSramStart
IFX_EXTERN void IfxMtu_clearSramStart(IfxMtu_MbistSel mbistSel)
This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn&#39;t wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared.
Definition: IfxMtu.c:132
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxScuWdt_getCpuWatchdogEndInit
boolean IfxScuWdt_getCpuWatchdogEndInit(void)
SCUWDT API to fetch current endinit of CPU Watchdog module.
Definition: IfxScuWdt.c:247
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxMtu_isModuleEnabled
IFX_INLINE boolean IfxMtu_isModuleEnabled(void)
Returns the status of whether the module is enabled or not.
Definition: IfxMtu.h:557
IfxMtu_readSramAddress
IFX_EXTERN void IfxMtu_readSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
Definition: IfxMtu.c:274
IfxMtu_getTrackedSramAddresses
IFX_EXTERN uint8 IfxMtu_getTrackedSramAddresses(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR *trackedSramAddresses)
Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registe...
Definition: IfxMtu.c:250
IfxMtu_enableMbistShell
IFX_INLINE void IfxMtu_enableMbistShell(IfxMtu_MbistSel mbistSel)
Enables the MBIST Shell of the given SRAM.
Definition: IfxMtu.h:496
IfxMtu_isErrorTrackingEnabled
IFX_INLINE boolean IfxMtu_isErrorTrackingEnabled(IfxMtu_MbistSel mbistSel)
Returns the status of the error tracking.
Definition: IfxMtu.h:533
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuCcu.h
SCU basic functionality.
IfxMtu_writeSramAddress
IFX_EXTERN void IfxMtu_writeSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
Definition: IfxMtu.c:377
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxMtu_cfg.h
Mtu on-chip implementation data.
IfxMtu_isMbistDone
IFX_INLINE boolean IfxMtu_isMbistDone(IfxMtu_MbistSel mbistSel)
This Function returns the status of MBIST clear Sram operation. Caution: It is recommended not to cal...
Definition: IfxMtu.h:547
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxMtu_enableErrorTracking
IFX_EXTERN void IfxMtu_enableErrorTracking(IfxMtu_MbistSel mbistSel, boolean enable)
Enables the tracking of SRAM errors.
Definition: IfxMtu.c:199
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxMtu_clearErrorTracking
IFX_EXTERN void IfxMtu_clearErrorTracking(IfxMtu_MbistSel mbistSel)
Clears the error tracking registers (ETRR), valid and overflow bits. CAUTION: This function should be...
Definition: IfxMtu.c:70
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxMtu_disableMbistShell
IFX_INLINE void IfxMtu_disableMbistShell(IfxMtu_MbistSel mbistSel)
Disables the MBIST Shell of the given SRAM.
Definition: IfxMtu.h:488
IfxMtu_isAutoInitRunning
IFX_INLINE boolean IfxMtu_isAutoInitRunning(IfxMtu_MbistSel mbistSel)
Returns TRUE if Auto-Initialisation is running for the given SRAM.
Definition: IfxMtu.h:525
IFXMTU_ERROR_FLAGS_MASK
#define IFXMTU_ERROR_FLAGS_MASK
Mask for the ERROR flags.
Definition: IfxMtu.h:202


iLLD_TC26B: IfxMtu_cfg.c Source File

  • _Impl
IfxMtu_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxMtu_cfg.c
3 * \brief Mtu on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxMtu_cfg.h"
47 #include "Mtu/Std/IfxMtu.h"
48
49 /******************************************************************************/
50 /*-----------------------Exported Variables/Constants-------------------------*/
51 /******************************************************************************/
52
53 const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS] = {
54 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
55 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
56 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
57 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
58 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
59 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
60 {2 * 4, 16, 6, 0, 1, 8192 }, /**< \brief IfxMtu_MbistSel_cpu1Dspr */
61 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
62 {2 * 1, 20, 6, 0, 1, 128 }, /**< \brief IfxMtu_MbistSel_cpu1Dtag */
63 {1 * 2, 64, 8, 0, 1, 3072 }, /**< \brief IfxMtu_MbistSel_cpu1Pspr */
64 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
65 {2 * 1, 20, 5, 0, 1, 256 }, /**< \brief IfxMtu_MbistSel_cpu1Ptag */
66 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
67 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
68 {2 * 4, 16, 6, 0, 1, 8192 }, /**< \brief IfxMtu_MbistSel_cpu0Dspr */
69 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
70 {1 * 2, 32, 8, 0, 1, 3072 }, /**< \brief IfxMtu_MbistSel_cpu0Pspr */
71 {2 * 1, 20, 5, 0, 1, 256 }, /**< \brief IfxMtu_MbistSel_cpu0Ptag */
72 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
73 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
74 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
75 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
76 {1 * 2, 35, 7, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_ethermac */
77 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
78 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
79 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
80 {1 * 1, 64, 8, 0, 1, 4096 }, /**< \brief IfxMtu_MbistSel_mod4 */
81 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
82 {1 * 1, 29, 7, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_gtmFifo */
83 {1 * 3, 32, 8, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_gtmMcs0 */
84 {1 * 3, 32, 8, 0, 1, 512 }, /**< \brief IfxMtu_MbistSel_gtmMcs1 */
85 {1 * 1, 24, 7, 0, 1, 128 }, /**< \brief IfxMtu_MbistSel_gtmDpll1a */
86 {1 * 1, 24, 7, 0, 1, 384 }, /**< \brief IfxMtu_MbistSel_gtmDpll1b */
87 {1 * 1, 24, 7, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_gtmDpll2 */
88 {1 * 1, 32, 8, 0, 1, 192 }, /**< \brief IfxMtu_MbistSel_psi5 */
89 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
90 {1 * 1, 32, 8, 0, 1, 2496 }, /**< \brief IfxMtu_MbistSel_mcan */
91 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
92 {1 * 2, 32, 8, 0, 1, 64 }, /**< \brief IfxMtu_MbistSel_erayObf */
93 {1 * 4, 32, 8, 0, 1, 128 }, /**< \brief IfxMtu_MbistSel_erayIbfTbf */
94 {1 * 1, 32, 8, 0, 1, 4096 }, /**< \brief IfxMtu_MbistSel_erayMbf */
95 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
96 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
97 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
98 {2 * 1, 8, 6, 0, 1, 40960}, /**< \brief IfxMtu_MbistSel_stdbyRam1 */
99 {1 * 4, 32, 8, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_mcds */
100 {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem0 */
101 {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem1 */
102 {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem2 */
103 {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem3 */
104 {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem4 */
105 {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem5 */
106 {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem6 */
107 {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem7 */
108 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
109 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
110 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
111 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
112 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
113 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
114 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
115 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
116 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
117 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
118 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
119 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
120 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
121 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
122 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
123 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
124 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
125 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
126 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
127 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
128 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
129 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
130 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
131 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
132 {1 * 4, 8, 6, 0, 1, 5120 }, /**< \brief IfxMtu_MbistSel_cifJpeg1_4 */
133 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
134 {1 * 2, 8, 6, 0, 1, 384 }, /**< \brief IfxMtu_MbistSel_cifJpeg3 */
135 {1 * 1, 36, 8, 0, 1, 512 }, /**< \brief IfxMtu_MbistSel_cifCif */
136 {1 * 1, 8, 6, 0, 1, 20480}, /**< \brief IfxMtu_MbistSel_stdbyRam2 */
137 {1 * 4, 64, 8, 0, 1, 256 }, /**< \brief IfxMtu_MbistSel_dma */
138 {1 * 2, 128, 9, 0, 1, 256 }, /**< \brief IfxMtu_MbistSel_ememXtm0 */
139 {1 * 2, 128, 9, 0, 1, 256 }, /**< \brief IfxMtu_MbistSel_ememXtm1 */
140 {1 * 4, 64, 8, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_fft0 */
141 {1 * 1, 16, 6, 0, 1, 512 }, /**< \brief IfxMtu_MbistSel_fft1 */
142 };
IfxMtu.h
MTU basic functionality.
IfxMtu_sramTable
const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS]
Definition: IfxMtu_cfg.c:53
IFXMTU_NUM_MBIST_TABLE_ITEMS
#define IFXMTU_NUM_MBIST_TABLE_ITEMS
Number of MBIST Table items.
Definition: IfxMtu_cfg.h:71
IfxMtu_cfg.h
Mtu on-chip implementation data.
IfxMtu_SramItem
Describes physical parameters of a SRAM memory.
Definition: IfxMtu_cfg.h:133


iLLD_TC26B: IfxMtu_cfg.h Source File

  • _Impl
IfxMtu_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxMtu_cfg.h
3 * \brief Mtu on-chip implementation data
4 * \ingroup IfxLld_Mtu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Mtu MTU
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Mtu_Impl Implementation
44 * \ingroup IfxLld_Mtu
45 * \defgroup IfxLld_Mtu_Std Standard Driver
46 * \ingroup IfxLld_Mtu
47 */
48
49 #ifndef IFXMTU_CFG_H
50 #define IFXMTU_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "Cpu/Std/IfxCpu.h"
57 #include "Cpu/Std/IfxCpu_Intrinsics.h"
58 #include "IfxMtu_reg.h"
59 #include "IfxMc_reg.h"
60
61 /******************************************************************************/
62 /*-----------------------------------Macros-----------------------------------*/
63 /******************************************************************************/
64
65 /** \brief Base address of first MBIST Control Block
66 */
67 #define IFXMTU_MC_ADDRESS_BASE (0xF0061000u)
68
69 /** \brief Number of MBIST Table items
70 */
71 #define IFXMTU_NUM_MBIST_TABLE_ITEMS (88)
72
73 /** \brief Maximum number of tracked SRAM addresses (ETTR)
74 */
75 #define IFXMTU_MAX_TRACKED_ADDRESSES (5)
76
77 /******************************************************************************/
78 /*-------------------------------Enumerations---------------------------------*/
79 /******************************************************************************/
80
81 /** \brief MBIST Selection
82 */
83 typedef enum
84 {
85 IfxMtu_MbistSel_none = -1,
86 IfxMtu_MbistSel_cpu1Dspr = 6,
87 IfxMtu_MbistSel_cpu1Dtag = 8,
88 IfxMtu_MbistSel_cpu1Pspr = 9,
89 IfxMtu_MbistSel_cpu1Ptag = 11,
90 IfxMtu_MbistSel_cpu0Dspr = 14,
91 IfxMtu_MbistSel_cpu0Pspr = 16,
92 IfxMtu_MbistSel_cpu0Ptag = 17,
93 IfxMtu_MbistSel_ethermac = 22,
94 IfxMtu_MbistSel_mod4 = 26,
95 IfxMtu_MbistSel_gtmFifo = 28,
96 IfxMtu_MbistSel_gtmMcs0 = 29,
97 IfxMtu_MbistSel_gtmMcs1 = 30,
98 IfxMtu_MbistSel_gtmDpll1a = 31,
99 IfxMtu_MbistSel_gtmDpll1b = 32,
100 IfxMtu_MbistSel_gtmDpll2 = 33,
101 IfxMtu_MbistSel_psi5 = 34,
102 IfxMtu_MbistSel_mcan = 36,
103 IfxMtu_MbistSel_erayObf = 38,
104 IfxMtu_MbistSel_erayIbfTbf = 39,
105 IfxMtu_MbistSel_erayMbf = 40,
106 IfxMtu_MbistSel_stdbyRam1 = 44,
107 IfxMtu_MbistSel_mcds = 45,
108 IfxMtu_MbistSel_emem0 = 46,
109 IfxMtu_MbistSel_emem1 = 47,
110 IfxMtu_MbistSel_emem2 = 48,
111 IfxMtu_MbistSel_emem3 = 49,
112 IfxMtu_MbistSel_emem4 = 50,
113 IfxMtu_MbistSel_emem5 = 51,
114 IfxMtu_MbistSel_emem6 = 52,
115 IfxMtu_MbistSel_emem7 = 53,
116 IfxMtu_MbistSel_cifJpeg1_4 = 78,
117 IfxMtu_MbistSel_cifJpeg3 = 80,
118 IfxMtu_MbistSel_cifCif = 81,
119 IfxMtu_MbistSel_stdbyRam2 = 82,
120 IfxMtu_MbistSel_dma = 83,
121 IfxMtu_MbistSel_ememXtm0 = 84,
122 IfxMtu_MbistSel_ememXtm1 = 85,
123 IfxMtu_MbistSel_fft0 = 86,
124 IfxMtu_MbistSel_fft1 = 87
125 } IfxMtu_MbistSel;
126
127 /******************************************************************************/
128 /*-----------------------------Data Structures--------------------------------*/
129 /******************************************************************************/
130
131 /** \brief Describes physical parameters of a SRAM memory
132 */
133 typedef struct
134 {
135 uint8 numBlocks; /**< \brief number of SRAM blocks */
136 uint16 dataSize; /**< \brief Data Size of each memory block */
137 uint8 eccSize; /**< \brief ECC Size of each memory block */
138 uint8 eccInvPos0; /**< \brief First ECC bit which needs to be inverted */
139 uint8 eccInvPos1; /**< \brief Second ECC bit which needs to be inverted */
140 uint32 mbistDelay; /**< \brief Mbist Delay */
141 } IfxMtu_SramItem;
142
143 /******************************************************************************/
144 /*-------------------Global Exported Variables/Constants----------------------*/
145 /******************************************************************************/
146
147 IFX_EXTERN const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS];
148
149 #endif /* IFXMTU_CFG_H */
IfxMtu_MbistSel_emem7
Definition: IfxMtu_cfg.h:115
IfxMtu_sramTable
IFX_EXTERN const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS]
Definition: IfxMtu_cfg.h:147
IfxMtu_MbistSel_mcan
Definition: IfxMtu_cfg.h:102
IfxMtu_MbistSel_cifJpeg1_4
Definition: IfxMtu_cfg.h:116
IfxMtu_MbistSel_cpu0Pspr
Definition: IfxMtu_cfg.h:91
IfxMtu_MbistSel_mod4
Definition: IfxMtu_cfg.h:94
IfxMtu_MbistSel_erayObf
Definition: IfxMtu_cfg.h:103
IfxMtu_MbistSel_stdbyRam1
Definition: IfxMtu_cfg.h:106
IfxMtu_MbistSel_fft0
Definition: IfxMtu_cfg.h:123
IfxMtu_MbistSel_erayMbf
Definition: IfxMtu_cfg.h:105
IfxMtu_SramItem::mbistDelay
uint32 mbistDelay
Mbist Delay.
Definition: IfxMtu_cfg.h:140
IfxMtu_MbistSel_none
Definition: IfxMtu_cfg.h:85
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxMtu_SramItem::eccInvPos0
uint8 eccInvPos0
First ECC bit which needs to be inverted.
Definition: IfxMtu_cfg.h:138
IfxMtu_MbistSel
IfxMtu_MbistSel
MBIST Selection.
Definition: IfxMtu_cfg.h:83
IfxCpu_Intrinsics.h
IfxMtu_MbistSel_emem1
Definition: IfxMtu_cfg.h:109
IFXMTU_NUM_MBIST_TABLE_ITEMS
#define IFXMTU_NUM_MBIST_TABLE_ITEMS
Number of MBIST Table items.
Definition: IfxMtu_cfg.h:71
IfxMtu_MbistSel_cpu1Ptag
Definition: IfxMtu_cfg.h:89
IfxMtu_SramItem::eccInvPos1
uint8 eccInvPos1
Second ECC bit which needs to be inverted.
Definition: IfxMtu_cfg.h:139
IfxMtu_MbistSel_cpu0Ptag
Definition: IfxMtu_cfg.h:92
IfxMtu_MbistSel_gtmFifo
Definition: IfxMtu_cfg.h:95
IfxMtu_MbistSel_stdbyRam2
Definition: IfxMtu_cfg.h:119
IfxMtu_MbistSel_cpu1Pspr
Definition: IfxMtu_cfg.h:88
IfxMtu_MbistSel_emem4
Definition: IfxMtu_cfg.h:112
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxMtu_MbistSel_ememXtm1
Definition: IfxMtu_cfg.h:122
IfxMtu_MbistSel_emem0
Definition: IfxMtu_cfg.h:108
IfxMtu_MbistSel_cifCif
Definition: IfxMtu_cfg.h:118
IfxMtu_SramItem::dataSize
uint16 dataSize
Data Size of each memory block.
Definition: IfxMtu_cfg.h:136
IfxMtu_MbistSel_cifJpeg3
Definition: IfxMtu_cfg.h:117
IfxMtu_SramItem::numBlocks
uint8 numBlocks
number of SRAM blocks
Definition: IfxMtu_cfg.h:135
IfxMtu_MbistSel_ememXtm0
Definition: IfxMtu_cfg.h:121
IfxMtu_MbistSel_cpu1Dtag
Definition: IfxMtu_cfg.h:87
IfxMtu_MbistSel_gtmDpll2
Definition: IfxMtu_cfg.h:100
IfxMtu_MbistSel_psi5
Definition: IfxMtu_cfg.h:101
IfxMtu_MbistSel_emem6
Definition: IfxMtu_cfg.h:114
IfxMtu_MbistSel_gtmDpll1b
Definition: IfxMtu_cfg.h:99
IfxMtu_MbistSel_emem2
Definition: IfxMtu_cfg.h:110
IfxMtu_MbistSel_gtmDpll1a
Definition: IfxMtu_cfg.h:98
IfxMtu_MbistSel_ethermac
Definition: IfxMtu_cfg.h:93
IfxCpu.h
CPU basic functionality.
IfxMtu_MbistSel_cpu1Dspr
Definition: IfxMtu_cfg.h:86
IfxMtu_MbistSel_emem3
Definition: IfxMtu_cfg.h:111
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxMtu_MbistSel_gtmMcs0
Definition: IfxMtu_cfg.h:96
IfxMtu_MbistSel_erayIbfTbf
Definition: IfxMtu_cfg.h:104
IfxMtu_MbistSel_gtmMcs1
Definition: IfxMtu_cfg.h:97
IfxMtu_MbistSel_cpu0Dspr
Definition: IfxMtu_cfg.h:90
IfxMtu_MbistSel_mcds
Definition: IfxMtu_cfg.h:107
IfxMtu_MbistSel_fft1
Definition: IfxMtu_cfg.h:124
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxMtu_MbistSel_emem5
Definition: IfxMtu_cfg.h:113
IfxMtu_SramItem::eccSize
uint8 eccSize
ECC Size of each memory block.
Definition: IfxMtu_cfg.h:137
IfxMtu_SramItem
Describes physical parameters of a SRAM memory.
Definition: IfxMtu_cfg.h:133
IfxMtu_MbistSel_dma
Definition: IfxMtu_cfg.h:120


iLLD_TC26B: IfxMultican.c Source File

  • Multican
  • Std
IfxMultican.c
Go to the documentation of this file.
1 /**
2 * \file IfxMultican.c
3 * \brief MULTICAN basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxMultican.h"
47
48 /******************************************************************************/
49 /*-----------------------Private Function Prototypes--------------------------*/
50 /******************************************************************************/
51
52 /** \brief Do actual long frame reading from the message object
53 * \param mcan Specifies the CAN module
54 * \param msgObjId Specifies the message object index. Range = [0, \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
55 * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful.
56 * \param data Pointer to data (in words)
57 * \return None
58 */
59 IFX_STATIC void IfxMultican_MsgObj_doReadLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data);
60
61 /** \brief Do actual message reading from the message object
62 * \param hwObj Pointer to CAN message object registers
63 * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful.
64 * \return None
65 */
66 IFX_STATIC void IfxMultican_MsgObj_doReadMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg);
67
68 /******************************************************************************/
69 /*-------------------------Function Implementations---------------------------*/
70 /******************************************************************************/
71
72 boolean IfxMultican_MsgObj_cancelSend(Ifx_CAN_MO *hwObj)
73 {
74 boolean result = FALSE;
75 Ifx_CAN_MO_CTR ctr;
76 Ifx_CAN_MO_STAT stat;
77
78 stat.U = hwObj->STAT.U;
79
80 if ((stat.B.TXRQ != 0) && (stat.B.NEWDAT != 0))
81 {
82 ctr.U = 0;
83 ctr.B.RESRTSEL = 1; /* take out from transmission */
84 hwObj->CTR.U = ctr.U;
85 result = TRUE;
86 }
87
88 return result;
89 }
90
91
92 void IfxMultican_MsgObj_clearStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
93 {
94 Ifx_CAN_MO_CTR ctr;
95 ctr.U = 0;
96 ctr.U = 1U << flag;
97
98 hwObj->CTR.U = ctr.U;
99 }
100
101
102 void IfxMultican_MsgObj_deinit(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
103 {
104 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(mcan, msgObjId);
105 /* Remove the message object from any node */
106 /* Append message object to the end of the list */
107 IfxMultican_setListCommand(mcan, 0x2, 0, msgObjId);
108
109 hwObj->CTR.U = 0x0000FFFFUL; /* to be written first */
110
111 hwObj->FCR.U = 0x00000000UL;
112 hwObj->FGPR.U = 0x00000000UL;
113 hwObj->IPR.U = 0x00000000UL;
114 hwObj->AMR.U = 0x3FFFFFFFUL;
115 hwObj->DATAL.U = 0x00000000UL;
116 hwObj->DATAH.U = 0x00000000UL;
117 hwObj->AR.U = 0x00000000UL;
118 }
119
120
121 IFX_STATIC void IfxMultican_MsgObj_doReadLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
122 {
123 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(mcan, msgObjId);
124
125 IfxMultican_MsgObjId botMsgObjId = hwObj->FGPR.B.BOT;
126 Ifx_CAN_MO *hwBotObj = IfxMultican_MsgObj_getPointer(mcan, botMsgObjId);
127
128 IfxMultican_MsgObjId topMsgObjId = hwObj->FGPR.B.TOP;
129 Ifx_CAN_MO *hwTopObj = IfxMultican_MsgObj_getPointer(mcan, topMsgObjId);
130
131 /* for standard message object and FIFO message objects*/
132 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
133
134 /* copy the length code from hardware */
135 IfxMultican_DataLengthCode lengthCode = IfxMultican_MsgObj_getDataLengthCode(hwObj);
136
137 /* read the data from the data registers */
138 if (lengthCode > IfxMultican_DataLengthCode_0) /* no.of bytes 0 to 8 */
139 {
140 *data++ = hwObj->DATAL.U;
141 *data++ = hwObj->DATAH.U;
142 }
143
144 /* read from bottom message object extended data registers */
145 if (lengthCode > IfxMultican_DataLengthCode_8)
146 {
147 *data++ = hwBotObj->EDATA0.U;
148 }
149
150 if (lengthCode > IfxMultican_DataLengthCode_12)
151 {
152 *data++ = hwBotObj->EDATA1.U;
153 }
154
155 if (lengthCode > IfxMultican_DataLengthCode_16)
156 {
157 *data++ = hwBotObj->EDATA2.U;
158 }
159
160 if (lengthCode > IfxMultican_DataLengthCode_20)
161 {
162 *data++ = hwBotObj->EDATA3.U;
163 }
164
165 if (lengthCode > IfxMultican_DataLengthCode_24)
166 {
167 *data++ = hwBotObj->EDATA4.U;
168 *data++ = hwBotObj->EDATA5.U;
169 }
170
171 if (lengthCode > IfxMultican_DataLengthCode_32)
172 {
173 *data++ = hwBotObj->EDATA6.U;
174 /* read from top message object extended data registers */
175 *data++ = hwTopObj->EDATA0.U;
176 *data++ = hwTopObj->EDATA1.U;
177 *data++ = hwTopObj->EDATA2.U;
178 }
179
180 if (lengthCode > IfxMultican_DataLengthCode_48)
181 {
182 *data++ = hwTopObj->EDATA3.U;
183 *data++ = hwTopObj->EDATA4.U;
184 *data++ = hwTopObj->EDATA5.U;
185 *data = hwTopObj->EDATA6.U;
186 }
187
188 msg->fastBitRate = hwObj->FCR.B.BRS;
189
190 msg->lengthCode = lengthCode;
191
192 /* copy the ID from the hardware */
193 msg->id = IfxMultican_MsgObj_getMessageId(hwObj);
194 }
195
196
197 IFX_STATIC void IfxMultican_MsgObj_doReadMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
198 {
199 /* for standard message object and FIFO message objects*/
200 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
201
202 /* read the data from the data registers */
203 msg->data[0] = hwObj->DATAL.U;
204 msg->data[1] = hwObj->DATAH.U;
205
206 /* copy the length code from hardware */
207 msg->lengthCode = IfxMultican_MsgObj_getDataLengthCode(hwObj);
208
209 /* copy the ID from the hardware */
210 msg->id = IfxMultican_MsgObj_getMessageId(hwObj);
211 }
212
213
214 IfxMultican_MsgObjId IfxMultican_MsgObj_getPendingId(Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup)
215 {
216 uint32 index = mcan->MSID[msgObjGroup].U;
217 IfxMultican_MsgObjId msgObjId = -1;
218
219 if (index != 0x20U)
220 {
221 mcan->MSPND[msgObjGroup].U = ~(1UL << index);
222 msgObjId = index + (msgObjGroup << 5);
223 }
224
225 return msgObjId;
226 }
227
228
229 IfxMultican_MsgObjStat IfxMultican_MsgObj_getStatus(Ifx_CAN_MO *hwObj)
230 {
231 IfxMultican_MsgObjStat status;
232
233 status.U = hwObj->STAT.U;
234
235 return status;
236 }
237
238
239 boolean IfxMultican_MsgObj_getStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
240 {
241 uint32 shift = (1U << flag);
242
243 return (hwObj->STAT.U & shift) ? TRUE : FALSE;
244 }
245
246
247 IfxMultican_Status IfxMultican_MsgObj_readLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
248 {
249 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(mcan, msgObjId);
250 IfxMultican_Status status = IfxMultican_Status_ok;
251
252 boolean longFrame = (hwObj->FCR.B.FDF != 0) ? TRUE : FALSE;
253
254 if (longFrame)
255 {
256 /* if new data available in the message object */
257 if (hwObj->STAT.B.NEWDAT != 0)
258 {
259 Ifx_CAN_MO_STAT stat;
260 IfxMultican_MsgObj_doReadLongFrame(mcan, msgObjId, msg, data);
261 stat = hwObj->STAT; /* Cache the status after reading to reduce message lost propability */
262
263 if (stat.B.RXUPD != 0)
264 { /* Data might be inconsistent (update while reading), declare as message lost, data will be read next time the API is called */
265 status = IfxMultican_Status_messageLost;
266 }
267 else if (stat.B.NEWDAT != 0)
268 { /* Data might be inconsistent (update while reading), force massage lost flag, read new incoming data */
269 Ifx_CAN_MO_STAT stat2;
270 status = IfxMultican_Status_messageLost;
271 /* perform read from the hardware */
272 IfxMultican_MsgObj_doReadLongFrame(mcan, msgObjId, msg, data);
273
274 stat2 = hwObj->STAT; /* Cache the status after reading */
275
276 if ((stat2.B.NEWDAT == 0) && (stat2.B.RXUPD == 0))
277 {
278 status |= IfxMultican_Status_newData;
279 }
280 else
281 { /* Return message lost at 2nd read attempt, data will be read next time the API is called*/
282 }
283 }
284 else
285 {
286 status = IfxMultican_Status_newData;
287 }
288
289 if (stat.B.MSGLST != 0)
290 { /* At least on message has been lost */
291 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageLost);
292 status |= IfxMultican_Status_messageLost;
293 }
294 }
295 else
296 {
297 status = IfxMultican_Status_receiveEmpty;
298 }
299 }
300 else
301 {
302 /* use normal read message API */
303 }
304
305 return status;
306 }
307
308
309 IfxMultican_Status IfxMultican_MsgObj_readMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
310 {
311 IfxMultican_Status status = IfxMultican_Status_ok;
312
313 /* if new data available in the message object */
314 if (hwObj->STAT.B.NEWDAT != 0)
315 {
316 Ifx_CAN_MO_STAT stat;
317 IfxMultican_MsgObj_doReadMessage(hwObj, msg);
318 stat = hwObj->STAT; /* Cache the status after reading to reduce message lost propability */
319
320 if (stat.B.RXUPD != 0)
321 { /* Data might be inconsistent (update while reading), declare as message lost, data will be read next time the API is called */
322 status = IfxMultican_Status_messageLost;
323 }
324 else if (stat.B.NEWDAT != 0)
325 { /* Data might be inconsistent (update while reading), force massage lost flag, read new incoming data */
326 Ifx_CAN_MO_STAT stat2;
327 status = IfxMultican_Status_messageLost;
328 /* perform read from the hardware */
329 IfxMultican_MsgObj_doReadMessage(hwObj, msg);
330
331 stat2 = hwObj->STAT; /* Cache the status after reading */
332
333 if ((stat2.B.NEWDAT == 0) && (stat2.B.RXUPD == 0))
334 {
335 status |= IfxMultican_Status_newData;
336 }
337 else
338 { /* Return message lost at 2nd read attempt, data will be read next time the API is called*/
339 }
340 }
341 else
342 {
343 status = IfxMultican_Status_newData;
344 }
345
346 if (stat.B.MSGLST != 0)
347 { /* At least on message has been lost */
348 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageLost);
349 status |= IfxMultican_Status_messageLost;
350 }
351 }
352 else
353 {
354 status = IfxMultican_Status_receiveEmpty;
355 }
356
357 return status;
358 }
359
360
361 IfxMultican_Status IfxMultican_MsgObj_sendLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
362 {
363 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(mcan, msgObjId);
364 IfxMultican_Status status = IfxMultican_Status_ok;
365
366 /* get the base address of top and bottom message objects */
367 IfxMultican_MsgObjId botMsgObjId = hwObj->FGPR.B.BOT;
368 Ifx_CAN_MO *hwBotObj = IfxMultican_MsgObj_getPointer(mcan, botMsgObjId);
369
370 IfxMultican_MsgObjId topMsgObjId = hwObj->FGPR.B.TOP;
371 Ifx_CAN_MO *hwTopObj = IfxMultican_MsgObj_getPointer(mcan, topMsgObjId);
372
373 boolean longFrame = (hwObj->FCR.B.FDF != 0) ? TRUE : FALSE;
374
375 /* in either of the below cases, the two conditions FDEN = 0, EDl = 1 and BRS = 0/1 will not reach */
376 /* long frame CAN FD */
377 /* FDEN = 1, EDL = 1 and BRS = 0/1 */
378 if (longFrame)
379 {
380 if (hwObj->STAT.B.TXRQ)
381 { /* previous message was not transferred, e.g. due to busy bus, BUS-OFF or others */
382 status = IfxMultican_Status_notSentBusy;
383 }
384 else
385 {
386 /* MSGVAL: Set message as not valid */
387 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
388
389 if (msg->lengthCode > IfxMultican_DataLengthCode_0) /* no.of bytes 0 to 8 */
390 {
391 hwObj->DATAL.U = *data++;
392 hwObj->DATAH.U = *data++;
393 }
394
395 /* load bottom message object extended data registers */
396 if (msg->lengthCode > IfxMultican_DataLengthCode_8)
397 {
398 hwBotObj->EDATA0.U = *data++;
399 }
400
401 if (msg->lengthCode > IfxMultican_DataLengthCode_12)
402 {
403 hwBotObj->EDATA1.U = *data++;
404 }
405
406 if (msg->lengthCode > IfxMultican_DataLengthCode_16)
407 {
408 hwBotObj->EDATA2.U = *data++;
409 }
410
411 if (msg->lengthCode > IfxMultican_DataLengthCode_20)
412 {
413 hwBotObj->EDATA3.U = *data++;
414 }
415
416 if (msg->lengthCode > IfxMultican_DataLengthCode_24)
417 {
418 hwBotObj->EDATA4.U = *data++;
419 hwBotObj->EDATA5.U = *data++;
420 }
421
422 if (msg->lengthCode > IfxMultican_DataLengthCode_32)
423 {
424 hwBotObj->EDATA6.U = *data++;
425 /* load bottom message object extended data registers */
426 hwTopObj->EDATA0.U = *data++;
427 hwTopObj->EDATA1.U = *data++;
428 hwTopObj->EDATA2.U = *data++;
429 }
430
431 if (msg->lengthCode > IfxMultican_DataLengthCode_48)
432 {
433 hwTopObj->EDATA3.U = *data++;
434 hwTopObj->EDATA4.U = *data++;
435 hwTopObj->EDATA5.U = *data++;
436 hwTopObj->EDATA6.U = *data;
437 }
438
439 /* for long message */
440 {
441 /* set ID */
442 boolean extendedFrame = IfxMultican_MsgObj_isExtendedFrame(hwObj);
443 IfxMultican_MsgObj_setMessageId(hwObj, msg->id, extendedFrame);
444
445 /* set data length code */
446 IfxMultican_MsgObj_setDataLengthCode(hwObj, msg->lengthCode);
447
448 /* set bit rate switch (fast bit rate enable/disable) */
449 IfxMultican_MsgObj_setBitRateSwitch(hwObj, msg->fastBitRate);
450 }
451
452 /* --- flags configuration --- */
453 {
454 /* set new data flag */
455 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
456
457 /* set message as valid */
458 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
459
460 /* set RTSEL */
461 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveTransmitSelected);
462
463 /* set TXRQ */
464 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitRequest);
465 }
466 }
467 }
468
469 /* standard frame */
470 /* FDEN = 0/1, EDL = 0 and BRS = 0 (BRS = 1 also has no effect here) */
471 else
472 {
473 /* use normal send message API */
474 status = IfxMultican_Status_notInitialised;
475 }
476
477 return status;
478 }
479
480
481 IfxMultican_Status IfxMultican_MsgObj_sendMessage(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
482 {
483 IfxMultican_Status status = IfxMultican_Status_ok;
484
485 if (hwObj->STAT.B.TXRQ)
486 { /* previous message was not transferred, e.g. due to busy bus, BUS-OFF or others */
487 status = IfxMultican_Status_notSentBusy;
488 }
489 else
490 {
491 /* MSGVAL: Set message as not valid */
492 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
493
494 /* for standard and FIFO message object */
495 hwObj->DATAL.U = msg->data[0]; /* Set the new data */
496 hwObj->DATAH.U = msg->data[1]; /* Set the new data */
497
498 /* for standard and FIFO message object */
499 {
500 /* set ID */
501 boolean extendedFrame = IfxMultican_MsgObj_isExtendedFrame(hwObj);
502 IfxMultican_MsgObj_setMessageId(hwObj, msg->id, extendedFrame);
503
504 /* standard frame */
505 /* in case of FD standard frame, FDEN = 0/1, EDL = 0 and BRS = 0 (BRS = 1 also has no effect here) */
506 /* set data length code */
507 IfxMultican_MsgObj_setDataLengthCode(hwObj, msg->lengthCode);
508 }
509
510 /* --- flags configuration --- */
511
512 /* for standard and FIFO message object */
513 {
514 /* set new data flag */
515 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
516
517 /* set message as valid, in case of FIFO mSGVAL has to be set before setting it to each slave object */
518 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
519
520 /* set TXRQ, should not be set for FIFO base object */
521 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitRequest);
522 }
523 }
524
525 return status;
526 }
527
528
529 IfxMultican_Status IfxMultican_MsgObj_writeTxfifo(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
530 {
531 IfxMultican_Status status = IfxMultican_Status_ok;
532
533 if (hwObj->STAT.B.TXRQ)
534 {
535 /* previous message was not transferred, e.g. due to busy bus, BUS-OFF or others */
536 status = IfxMultican_Status_notSentBusy;
537 }
538 else
539 {
540 /* Clear TXEN0 to update the data FIFO message object */
541 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitEnable0);
542
543 /* for standard and FIFO message object */
544 hwObj->DATAL.U = msg->data[0]; /* Set the new data */
545 hwObj->DATAH.U = msg->data[1]; /* Set the new data */
546
547 /* set TXEN0, to enable transmission of the updated object */
548 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitEnable0);
549
550 /* for standard and FIFO message object */
551 {
552 /* set ID */
553 boolean extendedFrame = IfxMultican_MsgObj_isExtendedFrame(hwObj);
554 IfxMultican_MsgObj_setMessageId(hwObj, msg->id, extendedFrame);
555
556 /* standard frame */
557 /* in case of FD standard frame, FDEN = 0/1, EDL = 0 and BRS = 0 (BRS = 1 also has no effect here) */
558 /* set data length code */
559 IfxMultican_MsgObj_setDataLengthCode(hwObj, msg->lengthCode);
560 }
561
562 /* --- flags configuration --- */
563
564 /* for standard and FIFO message object */
565 {
566 /* set new data flag */
567 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
568
569 /* set message as valid, in case of FIFO mSGVAL has to be set before setting it to each slave object */
570 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
571
572 /* set TXRQ, should not be set for FIFO base object */
573 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitRequest);
574 }
575 }
576
577 return status;
578 }
579
580
581 void IfxMultican_MsgObj_setFilter(Ifx_CAN_MO *hwObj, boolean extend, uint32 id, uint32 accMask)
582 {
583 Ifx_CAN_MO_CTR ctr;
584
585 ctr.U = 0;
586 ctr.B.RESMSGVAL = 1; /* MSGVAL: Set message as not valid */
587 hwObj->CTR.U = ctr.U;
588
589 hwObj->AMR.B.AM = accMask << ((extend != 0) ? 0 : 18);
590 hwObj->AR.B.IDE = (id << ((extend != 0) ? 0 : 18)) | (extend << 29);
591
592 ctr.U = 0;
593 ctr.B.SETMSGVAL = 1; /* MSGVAL: Set message as valid */
594 hwObj->CTR.U = ctr.U;
595 }
596
597
598 void IfxMultican_MsgObj_setStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
599 {
600 Ifx_CAN_MO_CTR ctr;
601 ctr.U = 0;
602
603 ctr.U = 1U << (flag + 16);
604
605 hwObj->CTR.U = ctr.U;
606 }
607
608
609 void IfxMultican_Node_deinit(Ifx_CAN_N *hwNode)
610 {
611 hwNode->CR.U = 0x00000001;
612 hwNode->SR.U = 0x00000000;
613 hwNode->IPR.U = 0x00000000;
614 hwNode->PCR.U = 0x00000000;
615 hwNode->BTEVR.U = 0x00000000;
616 hwNode->ECNT.U = 0x00600000;
617 hwNode->FCR.U = 0x00000000;
618 }
619
620
621 boolean IfxMultican_Node_initRxPin(Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
622 {
623 IfxPort_setPinModeInput(rxd->pin.port, rxd->pin.pinIndex, mode);
624 IfxPort_setPinPadDriver(rxd->pin.port, rxd->pin.pinIndex, padDriver);
625 hwNode->PCR.B.RXSEL = rxd->select;
626
627 return TRUE;
628 }
629
630
631 boolean IfxMultican_Node_initTxPin(Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
632 {
633 IfxPort_setPinModeOutput(txd->pin.port, txd->pin.pinIndex, mode, txd->select);
634 IfxPort_setPinPadDriver(txd->pin.port, txd->pin.pinIndex, padDriver);
635
636 return TRUE;
637 }
638
639
640 IfxMultican_Status IfxMultican_Node_recoverBusOff(Ifx_CAN_N *hwNode)
641 {
642 IfxMultican_Status status = IfxMultican_Status_busOff;
643
644 boolean busOffState = hwNode->SR.B.BOFF;
645 boolean errorWarningStatus = hwNode->SR.B.EWRN;
646
647 /* if the node is in bus off state, initiaite the recovery process */
648 if ((busOffState != 0) && (hwNode->ECNT.B.TEC > 254))
649 {
650 status = IfxMultican_Status_busOff;
651
652 /* reset error counters */
653 hwNode->ECNT.B.TEC = 0x01;
654 hwNode->ECNT.B.REC = 0x01;
655
656 /* clear error warning status */
657 hwNode->SR.B.EWRN = 0;
658
659 /* clear ALERT status */
660 hwNode->SR.B.ALERT = 0;
661
662 /* disable node INIT = 1 */
663 IfxMultican_Node_deactivate(hwNode);
664 }
665
666 /* during recovery process, if REC counter reaches 0x60 */
667 else if ((busOffState != 0) && (errorWarningStatus != 0))
668 {
669 status = IfxMultican_Status_notInitialised;
670 }
671
672 /* if the recovery process is been finished or not in Bus off mode */
673 else if ((busOffState == 0) && (errorWarningStatus == 0))
674 {
675 /* enable node INIT = 0 */
676 IfxMultican_Node_activate(hwNode);
677
678 status = IfxMultican_Status_ok;
679 }
680
681 return status;
682 }
683
684
685 void IfxMultican_Node_setBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
686 {
687 sint32 maxBRP = IFX_CAN_N_BTR_BRP_MSK + 1;
688 sint32 minBRP = 1;
689 sint32 maxTSEG1 = IFX_CAN_N_BTR_TSEG1_MSK + 1;
690 sint32 minTSEG1 = 3;
691 sint32 maxTSEG2 = IFX_CAN_N_BTR_TSEG2_MSK + 1;
692 sint32 minTSEG2 = 2;
693 sint32 maxTBAUD = maxTSEG1 + maxTSEG2 + 1;
694 sint32 minTBAUD = 8;
695
696 sint32 tempBRP, tempSJW, tempTSEG1, tempTBAUD;
697 sint32 bestBRP = 0, bestSJW = 1, bestTBAUD = 8, bestTSEG1 = 3, bestTSEG2 = 2;
698 float32 bestError = 10000.0;
699
700 /*
701 * Bit timing & sampling
702 * Tq = (BRP+1)/Fcan if DIV8 = 0
703 * Tq = 8*(BRP+1)/Fcan if DIV8 = 1
704 * TSync = 1.Tq
705 * TSeg1 = (TSEG1+1)*Tq >= 3Tq
706 * TSeg2 = (TSEG2+1)*Tq >= 2Tq
707 * Bit Time = TSync + TSeg1 + TSeg2 >= 8Tq
708 *
709 * Resynchronization:
710 *
711 * Tsjw = (SJW + 1)*Tq
712 * TSeg1 >= Tsjw + Tprop
713 * TSeg2 >= Tsjw
714 */
715
716 /* search for best baudrate */
717 bestError = baudrate * 0.05; /* 5% tolerance in baudrate as max error */
718
719 for (tempBRP = 1; tempBRP <= maxBRP; tempBRP++)
720 {
721 float32 Fquanta = moduleFreq / tempBRP;
722 tempTBAUD = Fquanta / baudrate;
723
724 if (tempTBAUD == 0)
725 {
726 break; /* to avoid division by 0 */
727 }
728
729 float32 tempBaudrate = Fquanta / tempTBAUD;
730 float32 error = __absf(tempBaudrate - baudrate);
731
732 if (tempTBAUD < minTBAUD)
733 {
734 break; /* below the minimum allowed limits, break is required otherwise TSEG1 and TSEG2 may result in negitive values */
735 }
736
737 if ((tempTBAUD <= maxTBAUD) && (bestError >= error))
738 {
739 bestBRP = tempBRP;
740 bestTBAUD = tempTBAUD;
741 bestError = error;
742
743 if ((tempTBAUD <= 20) && (error < 0.1))
744 {
745 break; /* optimal condition */
746 }
747 }
748 }
749
750 if ((bestBRP == 0) && (tempBRP == (maxBRP + 1)))
751 {
752 bestBRP = maxBRP;
753 bestTBAUD = tempTBAUD;
754 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
755 }
756
757 if ((bestBRP == 0) && (tempTBAUD < minTBAUD))
758 {
759 bestBRP = minBRP;
760 bestTBAUD = tempTBAUD;
761 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
762 }
763
764 /* search for best sample point */
765 bestError = samplePoint * 0.15; /* 15% tolerance in sample point as max error */
766
767 bestTSEG1 = maxTSEG1;
768
769 for (tempTSEG1 = maxTSEG1; tempTSEG1 >= minTSEG1; tempTSEG1--)
770 {
771 sint32 tempSamplePoint = ((tempTSEG1 + 1) * 10000) / bestTBAUD;
772 sint32 error = __abs(tempSamplePoint - samplePoint);
773
774 if (bestError > (float)error)
775 {
776 bestTSEG1 = tempTSEG1;
777 bestError = (float)error;
778 }
779
780 if (tempSamplePoint < samplePoint)
781 {
782 if (tempTSEG1 == maxTSEG1)
783 {
784 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
785 }
786 else
787 {
788 /*least possible error */
789 }
790
791 break; /* least possible error has already occured */
792 }
793 }
794
795 if ((tempTSEG1 == (minTSEG1 - 1)) && (bestTSEG1 == maxTSEG1))
796 {
797 bestTSEG1 = minTSEG1;
798 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
799 }
800
801 bestTSEG2 = bestTBAUD - bestTSEG1 - 1;
802
803 if (bestTSEG2 > maxTSEG2)
804 {
805 bestTSEG2 = maxTSEG2;
806 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
807 }
808
809 if (bestTSEG2 < minTSEG2)
810 {
811 bestTSEG2 = minTSEG2;
812 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
813 }
814
815 /* search for best SJW */
816 bestError = 10000;
817
818 for (tempSJW = 1; tempSJW <= bestTSEG2; tempSJW++)
819 {
820 sint32 tempSynchJumpWidth = (tempSJW * 10000) / bestTBAUD;
821 sint32 error = __abs(tempSynchJumpWidth - synchJumpWidth);
822
823 if (bestError > error)
824 {
825 bestSJW = tempSJW;
826 bestError = (float)error;
827 }
828 }
829
830 {
831 Ifx_CAN_N_BTR nbtr;
832 nbtr.U = 0;
833 nbtr.B.BRP = bestBRP - 1;
834 nbtr.B.SJW = bestSJW - 1;
835 nbtr.B.TSEG1 = bestTSEG1 - 1;
836 nbtr.B.TSEG2 = bestTSEG2 - 1;
837 nbtr.B.DIV8 = 0;
838 //nbtr.B.FTX = 0; /* TTCAN only */
839
840 hwNode->BTR.U = nbtr.U;
841 }
842 }
843
844
845 void IfxMultican_Node_setFastBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
846 {
847 sint32 maxBRP = IFX_CAN_N_FBTR_FBRP_MSK + 1;
848 sint32 minBRP = 1;
849 sint32 maxTSEG1 = IFX_CAN_N_FBTR_FTSEG1_MSK + 1;
850 sint32 minTSEG1 = 3;
851 sint32 maxTSEG2 = IFX_CAN_N_FBTR_FTSEG2_MSK + 1;
852 sint32 minTSEG2 = 2;
853 sint32 maxTBAUD = maxTSEG1 + maxTSEG2 + 1;
854 sint32 minTBAUD = 8;
855
856 sint32 tempBRP, tempSJW, tempTSEG1, tempTBAUD;
857 sint32 bestBRP = 0, bestSJW = 1, bestTBAUD = 8, bestTSEG1 = 3, bestTSEG2 = 2;
858 float32 bestError = 10000.0;
859 /*
860 * Bit timing & sampling
861 * Tq = (BRP+1)/Fcan if DIV8 = 0
862 * Tq = 8*(BRP+1)/Fcan if DIV8 = 1
863 * TSync = 1.Tq
864 * TSeg1 = (TSEG1+1)*Tq >= 3Tq
865 * TSeg2 = (TSEG2+1)*Tq >= 2Tq
866 * Bit Time = TSync + TSeg1 + TSeg2 >= 8Tq
867 *
868 * Resynchronization:
869 *
870 * Tsjw = (SJW + 1)*Tq
871 * TSeg1 >= Tsjw + Tprop
872 * TSeg2 >= Tsjw
873 */
874
875 /* search for best baudrate */
876 bestError = baudrate * 0.05; /* 5% tolerance in baudrate as max error */
877
878 for (tempBRP = 1; tempBRP <= maxBRP; tempBRP++)
879 {
880 float32 Fquanta = moduleFreq / tempBRP;
881 tempTBAUD = Fquanta / baudrate;
882
883 if (tempTBAUD == 0)
884 {
885 break; /* to avoid division by 0 */
886 }
887
888 float32 tempBaudrate = Fquanta / tempTBAUD;
889 float32 error = __absf(tempBaudrate - baudrate);
890
891 if (tempTBAUD < minTBAUD)
892 {
893 break; /* below the minimum allowed limits, break is required otherwise TSEG1 and TSEG2 may result in negitive values */
894 }
895
896 if ((tempTBAUD <= maxTBAUD) && (bestError >= error))
897 {
898 bestBRP = tempBRP;
899 bestTBAUD = tempTBAUD;
900 bestError = (float)error;
901
902 if ((tempTBAUD <= 20) && (error < 0.1))
903 {
904 break; /* optimal condition */
905 }
906 }
907 }
908
909 if ((bestBRP == 0) && (tempBRP == (maxBRP + 1)))
910 {
911 bestBRP = maxBRP;
912 bestTBAUD = tempTBAUD;
913 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
914 }
915
916 if ((bestBRP == 0) && (tempTBAUD < minTBAUD))
917 {
918 bestBRP = minBRP;
919 bestTBAUD = tempTBAUD;
920 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
921 }
922
923 /* search for best sample point */
924 bestError = samplePoint * 0.15; /* 15% tolerance in sample point as max error */
925
926 bestTSEG1 = maxTSEG1;
927
928 for (tempTSEG1 = maxTSEG1; tempTSEG1 >= minTSEG1; tempTSEG1--)
929 {
930 sint32 tempSamplePoint = ((tempTSEG1 + 1) * 10000) / bestTBAUD;
931 sint32 error = __abs(tempSamplePoint - samplePoint);
932
933 if (bestError > error)
934 {
935 bestTSEG1 = tempTSEG1;
936 bestError = (float)error;
937 }
938
939 if (tempSamplePoint < samplePoint)
940 {
941 if (tempTSEG1 == maxTSEG1)
942 {
943 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
944 }
945 else
946 {
947 /*least possible error */
948 }
949
950 break; /* least possible error has already occured */
951 }
952 }
953
954 if ((tempTSEG1 == (minTSEG1 - 1)) && (bestTSEG1 == maxTSEG1))
955 {
956 bestTSEG1 = minTSEG1;
957 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
958 }
959
960 bestTSEG2 = bestTBAUD - bestTSEG1 - 1;
961
962 if (bestTSEG2 > maxTSEG2)
963 {
964 bestTSEG2 = maxTSEG2;
965 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
966 }
967
968 if (bestTSEG2 < minTSEG2)
969 {
970 bestTSEG2 = minTSEG2;
971 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
972 }
973
974 /* search for best SJW */
975 bestError = 10000;
976
977 for (tempSJW = 1; tempSJW <= bestTSEG2; tempSJW++)
978 {
979 sint32 tempSynchJumpWidth = (tempSJW * 10000) / bestTBAUD;
980 sint32 error = __abs(tempSynchJumpWidth - synchJumpWidth);
981
982 if (bestError > error)
983 {
984 bestSJW = tempSJW;
985 bestError = (float)error;
986 }
987 }
988
989 {
990 Ifx_CAN_N_FBTR nfbtr;
991 nfbtr.U = 0;
992 nfbtr.B.FBRP = bestBRP - 1;
993 nfbtr.B.FSJW = bestSJW - 1;
994 nfbtr.B.FTSEG1 = bestTSEG1 - 1;
995 nfbtr.B.FTSEG2 = bestTSEG2 - 1;
996
997 hwNode->FBTR.U = nfbtr.U;
998 }
999 }
1000
1001
1002 void IfxMultican_Node_setNominalBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
1003 {
1004 sint32 maxBRP = IFX_CAN_N_BTEVR_BRP_MSK + 1;
1005 sint32 minBRP = 1;
1006 sint32 maxTSEG1 = IFX_CAN_N_BTEVR_TSEG1_MSK + 1;
1007 sint32 minTSEG1 = 3;
1008 sint32 maxTSEG2 = IFX_CAN_N_BTEVR_TSEG2_MSK + 1;
1009 sint32 minTSEG2 = 2;
1010 sint32 maxTBAUD = maxTSEG1 + maxTSEG2 + 1;
1011 sint32 minTBAUD = 8;
1012
1013 sint32 tempBRP, tempSJW, tempTSEG1, tempTBAUD;
1014 sint32 bestBRP = 0, bestSJW = 1, bestTBAUD = 8, bestTSEG1 = 3, bestTSEG2 = 2;
1015 float32 bestError = 10000.0;
1016 /*
1017 * Bit timing & sampling
1018 * Tq = (BRP+1)/Fcan if DIV8 = 0
1019 * Tq = 8*(BRP+1)/Fcan if DIV8 = 1
1020 * TSync = 1.Tq
1021 * TSeg1 = (TSEG1+1)*Tq >= 3Tq
1022 * TSeg2 = (TSEG2+1)*Tq >= 2Tq
1023 * Bit Time = TSync + TSeg1 + TSeg2 >= 8Tq
1024 *
1025 * Resynchronization:
1026 *
1027 * Tsjw = (SJW + 1)*Tq
1028 * TSeg1 >= Tsjw + Tprop
1029 * TSeg2 >= Tsjw
1030 */
1031
1032 /* search for best baudrate */
1033 bestError = baudrate * 0.05; /* 5% tolerance in baudrate as max error */
1034
1035 for (tempBRP = 1; tempBRP <= maxBRP; tempBRP++)
1036 {
1037 float32 Fquanta = moduleFreq / tempBRP;
1038 tempTBAUD = Fquanta / baudrate;
1039
1040 if (tempTBAUD == 0)
1041 {
1042 break; /* to avoid division by 0 */
1043 }
1044
1045 float32 tempBaudrate = Fquanta / tempTBAUD;
1046 float32 error = __absf(tempBaudrate - baudrate);
1047
1048 if (tempTBAUD < minTBAUD)
1049 {
1050 break; /* below the minimum allowed limits, break is required otherwise TSEG1 and TSEG2 may result in negitive values */
1051 }
1052
1053 if ((tempTBAUD <= maxTBAUD) && (bestError >= error))
1054 {
1055 bestBRP = tempBRP;
1056 bestTBAUD = tempTBAUD;
1057 bestError = (float)error;
1058
1059 if ((tempTBAUD <= 20) && (error < 0.1))
1060 {
1061 break; /* optimal condition */
1062 }
1063 }
1064 }
1065
1066 if ((bestBRP == 0) && (tempBRP == (maxBRP + 1)))
1067 {
1068 bestBRP = maxBRP;
1069 bestTBAUD = tempTBAUD;
1070 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
1071 }
1072
1073 if ((bestBRP == 0) && (tempTBAUD < minTBAUD))
1074 {
1075 bestBRP = minBRP;
1076 bestTBAUD = tempTBAUD;
1077 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
1078 }
1079
1080 /* search for best sample point */
1081 bestError = samplePoint * 0.15; /* 15% tolerance in sample point as max error */
1082
1083 bestTSEG1 = maxTSEG1;
1084
1085 for (tempTSEG1 = maxTSEG1; tempTSEG1 >= minTSEG1; tempTSEG1--)
1086 {
1087 sint32 tempSamplePoint = ((tempTSEG1 + 1) * 10000) / bestTBAUD;
1088 sint32 error = __abs(tempSamplePoint - samplePoint);
1089
1090 if (bestError > error)
1091 {
1092 bestTSEG1 = tempTSEG1;
1093 bestError = (float)error;
1094 }
1095
1096 if (tempSamplePoint < samplePoint)
1097 {
1098 if (tempTSEG1 == maxTSEG1)
1099 {
1100 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
1101 }
1102 else
1103 {
1104 /*least possible error */
1105 }
1106
1107 break; /* least possible error has already occured */
1108 }
1109 }
1110
1111 if ((tempTSEG1 == (minTSEG1 - 1)) && (bestTSEG1 == maxTSEG1))
1112 {
1113 bestTSEG1 = minTSEG1;
1114 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
1115 }
1116
1117 bestTSEG2 = bestTBAUD - bestTSEG1 - 1;
1118
1119 if (bestTSEG2 > maxTSEG2)
1120 {
1121 bestTSEG2 = maxTSEG2;
1122 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
1123 }
1124
1125 if (bestTSEG2 < minTSEG2)
1126 {
1127 bestTSEG2 = minTSEG2;
1128 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
1129 }
1130
1131 /* search for best SJW */
1132 bestError = 10000;
1133
1134 for (tempSJW = 1; tempSJW <= bestTSEG2; tempSJW++)
1135 {
1136 sint32 tempSynchJumpWidth = (tempSJW * 10000) / bestTBAUD;
1137 sint32 error = __abs(tempSynchJumpWidth - synchJumpWidth);
1138
1139 if (bestError > error)
1140 {
1141 bestSJW = tempSJW;
1142 bestError = (float)error;
1143 }
1144 }
1145
1146 {
1147 Ifx_CAN_N_BTEVR nbtevr;
1148 nbtevr.U = 0;
1149 nbtevr.B.BRP = bestBRP - 1;
1150 nbtevr.B.SJW = bestSJW - 1;
1151 nbtevr.B.TSEG1 = bestTSEG1 - 1;
1152 nbtevr.B.TSEG2 = bestTSEG2 - 1;
1153 nbtevr.B.DIV8 = 0;
1154 //nbtr.B.FTX = 0; /* TTCAN only */
1155
1156 hwNode->BTEVR.U = nbtevr.U;
1157 }
1158 }
1159
1160
1161 void IfxMultican_calcTimingFromBTR(float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth)
1162 {
1163 Ifx_CAN_N_BTR nbtr = {.U = btr};
1164 uint32 tempBRP = 1U + nbtr.B.BRP;
1165 uint32 tempSJW = 1U + nbtr.B.SJW;
1166 uint32 tempTSEG1 = 1U + nbtr.B.TSEG1;
1167 uint32 tempTSEG2 = 1U + nbtr.B.TSEG2;
1168 uint32 tempDIV8 = (nbtr.B.DIV8 != 0) ? 8U : 1U;
1169
1170 uint32 tempTSEG = 1 + tempTSEG1 + tempTSEG2;
1171
1172 *baudrate = (uint32)(moduleFreq / (float32)(tempDIV8 * tempBRP * tempTSEG));
1173 *samplePoint = (uint16)(((float32)tempTSEG1) * 10000 / ((float32)(tempTSEG)));
1174 *synchJumpWidth = (uint16)(((float32)tempSJW) * 10000 / ((float32)(tempTSEG)));
1175 }
1176
1177
1178 void IfxMultican_deinit(Ifx_CAN *mcan)
1179 {
1180 // should use kernel reset functionality!
1181 uint16 i;
1182
1183 /* Ifx_CAN.CLC is reset last */
1184 for (i = 0; i < IFXMULTICAN_NUM_MESSAGE_OBJECTS; i++)
1185 {
1186 IfxMultican_MsgObj_deinit(mcan, i);
1187 }
1188
1189 for (i = 0; i < IFXMULTICAN_NUM_NODES; i++)
1190 {
1191 Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(mcan, IfxMultican_NodeId_0 + i);
1192
1193 IfxMultican_Node_deinit(hwNode);
1194 }
1195
1196 for (i = 0; i < IFXMULTICAN_NUM_SRC; i++)
1197 {
1198 MODULE_SRC.CAN.CAN[0].INT[i].U = 0x00000000;
1199 }
1200
1201 for (i = 0; i < 8; i++)
1202 {
1203 mcan->MSPND[i].U = 0x00000000;
1204 }
1205
1206 mcan->MSIMASK.U = 0x00000000;
1207 mcan->MCR.U = 0x00000000;
1208 {
1209 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1210 IfxScuWdt_clearCpuEndinit(passwd);
1211 mcan->FDR.U = 0x00000000;
1212 IfxScuWdt_setCpuEndinit(passwd);
1213 IfxScuWdt_clearCpuEndinit(passwd);
1214 mcan->CLC.U = 0x00000001;
1215 IfxScuWdt_setCpuEndinit(passwd);
1216 }
1217 }
1218
1219
1220 volatile Ifx_SRC_SRCR *IfxMultican_getSrcPointer(Ifx_CAN *mcan, IfxMultican_SrcId srcId)
1221 {
1222 return &(MODULE_SRC.CAN.CAN[0].INT[srcId]);
1223 }
1224
1225
1226 void IfxMultican_resetModule(Ifx_CAN *can)
1227 {
1228 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1229
1230 IfxScuWdt_clearCpuEndinit(passwd);
1231 can->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
1232 can->KRST1.B.RST = 1;
1233 IfxScuWdt_setCpuEndinit(passwd);
1234
1235 while (0 == can->KRST0.B.RSTSTAT) /* Wait until reset is executed */
1236
1237 {}
1238
1239 IfxScuWdt_clearCpuEndinit(passwd);
1240 can->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
1241 IfxScuWdt_setCpuEndinit(passwd);
1242 }
1243
1244
1245 void IfxMultican_setListCommand(Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1)
1246 {
1247 Ifx_CAN_PANCTR panctr;
1248
1249 panctr.B.PANAR1 = arg1;
1250 panctr.B.PANAR2 = arg2;
1251 panctr.B.PANCMD = cmd;
1252
1253 /** - write to CAN_PANCTR */
1254 mcan->PANCTR.U = panctr.U;
1255
1256 IfxMultican_waitListReady(mcan);
1257 }
1258
1259
1260 IfxMultican_Index IfxMultican_getIndex(Ifx_CAN *multican)
1261 {
1262 uint32 index;
1263 IfxMultican_Index result;
1264
1265 result = IfxMultican_Index_none;
1266
1267 for (index = 0; index < IFXMULTICAN_NUM_MODULES; index++)
1268 {
1269 if (IfxMultican_cfg_indexMap[index].module == multican)
1270 {
1271 result = (IfxMultican_Index)IfxMultican_cfg_indexMap[index].index;
1272 break;
1273 }
1274 }
1275
1276 return result;
1277 }
1278
1279
1280 Ifx_CAN *IfxMultican_getAddress(IfxMultican_Index multican)
1281 {
1282 Ifx_CAN *module;
1283
1284 if (multican < IFXMULTICAN_NUM_MODULES)
1285 {
1286 module = (Ifx_CAN *)IfxMultican_cfg_indexMap[multican].module;
1287 }
1288 else
1289 {
1290 module = NULL_PTR;
1291 }
1292
1293 return module;
1294 }
IfxMultican_MsgObjStatusFlag_transmitEnable0
Transmit enable 0 status flag.
Definition: IfxMultican.h:185
IfxMultican_Status_ok
Definition: IfxMultican.h:211
IfxMultican_Status_newData
Definition: IfxMultican.h:220
IfxMultican_Rxd_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxMultican_PinMap.h:61
IfxMultican_Status_busOff
Definition: IfxMultican.h:216
IfxMultican_Node_getPointer
IFX_INLINE Ifx_CAN_N * IfxMultican_Node_getPointer(Ifx_CAN *mcan, IfxMultican_NodeId node)
Returns the base address to a given CAN node number.
Definition: IfxMultican.h:1419
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxMultican_MsgObj_getMessageId
IFX_INLINE uint32 IfxMultican_MsgObj_getMessageId(Ifx_CAN_MO *hwObj)
Gets message identifier of message object.
Definition: IfxMultican.h:1192
IfxMultican_Node_recoverBusOff
IfxMultican_Status IfxMultican_Node_recoverBusOff(Ifx_CAN_N *hwNode)
Recovers the CAN node from bus off.
Definition: IfxMultican.c:640
IfxMultican_MsgObj_getStatus
IfxMultican_MsgObjStat IfxMultican_MsgObj_getStatus(Ifx_CAN_MO *hwObj)
Get the message object status.
Definition: IfxMultican.c:229
IfxMultican_Message
CAN message definition.
Definition: IfxMultican.h:241
IfxMultican_Rxd_In
RXD pin mapping structure.
Definition: IfxMultican_PinMap.h:56
IfxMultican_Txd_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxMultican_PinMap.h:70
IfxMultican_MsgObj_setDataLengthCode
IFX_INLINE void IfxMultican_MsgObj_setDataLengthCode(Ifx_CAN_MO *hwObj, IfxMultican_DataLengthCode code)
Sets data length code of a message object.
Definition: IfxMultican.h:1269
IfxMultican_MsgObj_setStatusFlag
void IfxMultican_MsgObj_setStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Sets the selected status flag of a message object.
Definition: IfxMultican.c:598
IfxMultican_MsgObj_cancelSend
boolean IfxMultican_MsgObj_cancelSend(Ifx_CAN_MO *hwObj)
Cancel pending TX request by invalidating the request, only when frame transmission has not been star...
Definition: IfxMultican.c:72
IfxMultican_calcTimingFromBTR
void IfxMultican_calcTimingFromBTR(float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth)
Returns the CAN node timing.
Definition: IfxMultican.c:1161
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxMultican_Message::data
uint32 data[2]
CAN message data.
Definition: IfxMultican.h:245
IfxMultican_MsgObjStatusFlag_messageLost
Message lost status flag.
Definition: IfxMultican.h:180
IfxMultican_Node_activate
IFX_INLINE void IfxMultican_Node_activate(Ifx_CAN_N *hwNode)
Activate the CAN Node. Participate in the CAN bus activities.
Definition: IfxMultican.h:1395
IFXMULTICAN_NUM_NODES
#define IFXMULTICAN_NUM_NODES
Number of CAN nodes.
Definition: IfxMultican_cfg.h:69
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxMultican_MsgObjStat::U
unsigned int U
Definition: IfxMultican.h:254
IfxMultican_Node_deinit
void IfxMultican_Node_deinit(Ifx_CAN_N *hwNode)
Reset the CAN node.
Definition: IfxMultican.c:609
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxMultican_Node_setFastBitTiming
void IfxMultican_Node_setFastBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures FBTR register.
Definition: IfxMultican.c:845
IfxMultican_NodeId_0
Ifx_CAN Node 0.
Definition: IfxMultican_cfg.h:100
IfxMultican_MsgObj_setBitRateSwitch
IFX_INLINE void IfxMultican_MsgObj_setBitRateSwitch(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable bit rate switch of a message object.
Definition: IfxMultican.h:1245
IfxMultican_DataLengthCode_12
12 data bytes
Definition: IfxMultican.h:109
IfxMultican_MsgObj_writeTxfifo
IfxMultican_Status IfxMultican_MsgObj_writeTxfifo(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message.
Definition: IfxMultican.c:529
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxMultican_MsgObj_readMessage
IfxMultican_Status IfxMultican_MsgObj_readMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
Read a received CAN message.
Definition: IfxMultican.c:309
IfxMultican_SrcId
IfxMultican_SrcId
Service request ID
Definition: IfxMultican_cfg.h:108
IfxMultican_Message::fastBitRate
boolean fastBitRate
CAN FD fast bit rate enable/disable.
Definition: IfxMultican.h:246
IfxMultican_DataLengthCode_32
32 data bytes
Definition: IfxMultican.h:113
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxMultican_Node_deactivate
IFX_INLINE void IfxMultican_Node_deactivate(Ifx_CAN_N *hwNode)
Deactivate the CAN Node. Take out from participation in the CAN bus activities.
Definition: IfxMultican.h:1401
IfxMultican_MsgObj_sendLongFrame
IfxMultican_Status IfxMultican_MsgObj_sendLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Send a CAN Long frame message.
Definition: IfxMultican.c:361
IfxMultican_Node_initRxPin
boolean IfxMultican_Node_initRxPin(Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin.
Definition: IfxMultican.c:621
IfxMultican_DataLengthCode_48
48 data bytes
Definition: IfxMultican.h:114
IfxMultican_Status_receiveEmpty
Definition: IfxMultican.h:218
IfxMultican_Status_messageLost
Definition: IfxMultican.h:219
IfxMultican_MsgObj_doReadMessage
IFX_STATIC void IfxMultican_MsgObj_doReadMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
Do actual message reading from the message object.
Definition: IfxMultican.c:197
IfxMultican_MsgObj_getPendingId
IfxMultican_MsgObjId IfxMultican_MsgObj_getPendingId(Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group.
Definition: IfxMultican.c:214
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxMultican_Node_initTxPin
boolean IfxMultican_Node_initTxPin(Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin.
Definition: IfxMultican.c:631
IfxMultican_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap[IFXMULTICAN_NUM_MODULES]
Definition: IfxMultican_cfg.c:52
__absf
#define __absf
Definition: IfxCpu_IntrinsicsDcc.h:1629
IfxMultican_MsgObjStatusFlag
IfxMultican_MsgObjStatusFlag
CAN Message Object status flag Definition in Ifx_CAN.MOSTATx (x: 0 to max number of msg objs) ...
Definition: IfxMultican.h:174
IfxMultican_MsgObj_clearStatusFlag
void IfxMultican_MsgObj_clearStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Clears the selected status flag of a message object.
Definition: IfxMultican.c:92
IfxMultican_resetModule
void IfxMultican_resetModule(Ifx_CAN *can)
resets Multican kernel
Definition: IfxMultican.c:1226
IfxMultican_DataLengthCode_20
20 data bytes
Definition: IfxMultican.h:111
IfxMultican_MsgObj_readLongFrame
IfxMultican_Status IfxMultican_MsgObj_readLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Read a received CAN long frame.
Definition: IfxMultican.c:247
IfxMultican_Message::id
uint32 id
CAN message ID.
Definition: IfxMultican.h:243
IfxMultican_Message::lengthCode
IfxMultican_DataLengthCode lengthCode
CAN message data length code.
Definition: IfxMultican.h:244
IfxMultican_MsgObj_setMessageId
IFX_INLINE void IfxMultican_MsgObj_setMessageId(Ifx_CAN_MO *hwObj, uint32 messageId, boolean extendedFrame)
Sets message identifier of message object.
Definition: IfxMultican.h:1311
IfxMultican_Rxd_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxMultican_PinMap.h:60
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxMultican_Index
IfxMultican_Index
List of the available multican resource.
Definition: IfxMultican_cfg.h:89
IfxMultican_MsgObj_getDataLengthCode
IFX_INLINE IfxMultican_DataLengthCode IfxMultican_MsgObj_getDataLengthCode(Ifx_CAN_MO *hwObj)
Gets data length code of a message object.
Definition: IfxMultican.h:1186
IfxMultican.h
MULTICAN basic functionality.
IfxMultican_MsgObjStatusFlag_newData
New data status flag.
Definition: IfxMultican.h:179
IfxMultican_MsgObjId
sint32 IfxMultican_MsgObjId
Message object ID, 0 .. IFXMULTICAN_NUM_MESSAGE_OBJECTS.
Definition: IfxMultican.h:77
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxMultican_MsgObjStatusFlag_messageValid
Message valid status flag.
Definition: IfxMultican.h:181
IfxMultican_Index_none
Not Selected.
Definition: IfxMultican_cfg.h:91
IfxMultican_Txd_Out
TXD pin mapping structure.
Definition: IfxMultican_PinMap.h:65
IfxMultican_DataLengthCode_0
0 data bytes
Definition: IfxMultican.h:100
IfxMultican_MsgObjGroup
IfxMultican_MsgObjGroup
CAN message object group Each group consists of 32 consecutive message objects.
Definition: IfxMultican.h:147
IfxMultican_waitListReady
IFX_INLINE void IfxMultican_waitListReady(Ifx_CAN *mcan)
Wait until the list panel is ready.
Definition: IfxMultican.h:1646
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxMultican_MsgObjStat
Message object status bit-fields.
Definition: IfxMultican.h:251
IFXMULTICAN_NUM_MESSAGE_OBJECTS
#define IFXMULTICAN_NUM_MESSAGE_OBJECTS
Number of CAN message objects.
Definition: IfxMultican_cfg.h:65
IfxMultican_deinit
void IfxMultican_deinit(Ifx_CAN *mcan)
Reset the CAN module Reset and disable the CAN module, inclusive message object and node registers...
Definition: IfxMultican.c:1178
IfxMultican_Status_notInitialised
Definition: IfxMultican.h:212
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxMultican_MsgObjStatusFlag_receiveTransmitSelected
Receive transmit selected status flag.
Definition: IfxMultican.h:182
IfxMultican_MsgObjStatusFlag_transmitRequest
Transmit request status flag.
Definition: IfxMultican.h:184
IfxMultican_getIndex
IfxMultican_Index IfxMultican_getIndex(Ifx_CAN *multican)
API to get the resource index of the CAN specified.
Definition: IfxMultican.c:1260
__abs
sint32 __abs(sint32) __attribute__((intrinsic_pseudo(1
IfxMultican_setListCommand
void IfxMultican_setListCommand(Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1)
Execute a command from the command panel.
Definition: IfxMultican.c:1245
IfxMultican_DataLengthCode_8
8 data bytes
Definition: IfxMultican.h:108
IfxMultican_Status_notSentBusy
Definition: IfxMultican.h:217
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
sint32
long sint32
Definition: Platform_Types.h:134
IfxMultican_MsgObj_doReadLongFrame
IFX_STATIC void IfxMultican_MsgObj_doReadLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Do actual long frame reading from the message object.
Definition: IfxMultican.c:121
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxMultican_MsgObj_setFilter
void IfxMultican_MsgObj_setFilter(Ifx_CAN_MO *hwObj, boolean extend, uint32 id, uint32 accMask)
Set message object filter.
Definition: IfxMultican.c:581
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxMultican_DataLengthCode
IfxMultican_DataLengthCode
CAN frame data length code Definition in Ifx_CAN.MOFCRx.DLC.
Definition: IfxMultican.h:98
IfxMultican_getAddress
Ifx_CAN * IfxMultican_getAddress(IfxMultican_Index multican)
Definition: IfxMultican.c:1280
IfxMultican_getSrcPointer
volatile Ifx_SRC_SRCR * IfxMultican_getSrcPointer(Ifx_CAN *mcan, IfxMultican_SrcId srcId)
Get the interrupt source register.
Definition: IfxMultican.c:1220
IfxMultican_MsgObj_getPointer
IFX_INLINE Ifx_CAN_MO * IfxMultican_MsgObj_getPointer(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Get base address of a message object register.
Definition: IfxMultican.h:1206
IfxMultican_MsgObj_deinit
void IfxMultican_MsgObj_deinit(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Reset the message object Append the message object to the end of idle list and reset message object r...
Definition: IfxMultican.c:102
IfxMultican_Status
IfxMultican_Status
CAN API status definition.
Definition: IfxMultican.h:209
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IFXMULTICAN_NUM_SRC
#define IFXMULTICAN_NUM_SRC
Number of service requests.
Definition: IfxMultican_cfg.h:73
IFXMULTICAN_NUM_MODULES
#define IFXMULTICAN_NUM_MODULES
Definition: IfxMultican_cfg.h:75
IfxMultican_DataLengthCode_16
16 data bytes
Definition: IfxMultican.h:110
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxMultican_MsgObj_sendMessage
IfxMultican_Status IfxMultican_MsgObj_sendMessage(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message.
Definition: IfxMultican.c:481
IfxMultican_Node_setNominalBitTiming
void IfxMultican_Node_setNominalBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTEVR register.
Definition: IfxMultican.c:1002
IfxMultican_DataLengthCode_24
24 data bytes
Definition: IfxMultican.h:112
IfxMultican_MsgObj_isExtendedFrame
IFX_INLINE boolean IfxMultican_MsgObj_isExtendedFrame(Ifx_CAN_MO *hwObj)
Get the message object status.
Definition: IfxMultican.h:1212
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxMultican_Node_setBitTiming
void IfxMultican_Node_setBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTR register.
Definition: IfxMultican.c:685
IfxMultican_MsgObj_getStatusFlag
boolean IfxMultican_MsgObj_getStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Gets the status of the selected status flag of a message object.
Definition: IfxMultican.c:239


iLLD_TC26B: IfxMultican.h Source File

  • Multican
  • Std
IfxMultican.h
Go to the documentation of this file.
1 /**
2 * \file IfxMultican.h
3 * \brief MULTICAN basic functionality
4 * \ingroup IfxLld_Multican
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Multican_Std_Enum Enumerations
42 * \ingroup IfxLld_Multican_Std
43 * \defgroup IfxLld_Multican_Std_General General functions
44 * \ingroup IfxLld_Multican_Std
45 * \defgroup IfxLld_Multican_Std_Node CAN Nodes
46 * \ingroup IfxLld_Multican_Std
47 * \defgroup IfxLld_Multican_Std_Message Message
48 * \ingroup IfxLld_Multican_Std
49 * \defgroup IfxLld_Multican_Std_Message_Objects Message Objects
50 * \ingroup IfxLld_Multican_Std
51 * \defgroup IfxLld_Multican_Std_Interrupts Interrupts
52 * \ingroup IfxLld_Multican_Std
53 */
54
55 #ifndef IFXMULTICAN_H
56 #define IFXMULTICAN_H 1
57
58 /******************************************************************************/
59 /*----------------------------------Includes----------------------------------*/
60 /******************************************************************************/
61
62 #include "_Impl/IfxMultican_cfg.h"
63 #include "Src/Std/IfxSrc.h"
64 #include "_PinMap/IfxMultican_PinMap.h"
65 #include "Cpu/Std/IfxCpu_Intrinsics.h"
66 #include "IfxCan_bf.h"
67 #include "Scu/Std/IfxScuWdt.h"
68 #include "_Utilities/Ifx_Assert.h"
69 #include "_Utilities/Ifx_Assert.h"
70
71 /******************************************************************************/
72 /*------------------------------Type Definitions------------------------------*/
73 /******************************************************************************/
74
75 /** \brief Message object ID, 0 .. \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS
76 */
77 typedef sint32 IfxMultican_MsgObjId;
78
79 /******************************************************************************/
80 /*--------------------------------Enumerations--------------------------------*/
81 /******************************************************************************/
82
83 /** \addtogroup IfxLld_Multican_Std_Enum
84 * \{ */
85 /** \brief CAN input clock selection
86 */
87 typedef enum
88 {
89 IfxMultican_ClockSelect_noClock = 0, /**< \brief No clock supplied */
90 IfxMultican_ClockSelect_fclc = 1, /**< \brief fMULTICAN */
91 IfxMultican_ClockSelect_fosc0 = 2, /**< \brief Oscillator Clock */
92 IfxMultican_ClockSelect_fErayPll = 4 /**< \brief E-Ray clock */
93 } IfxMultican_ClockSelect;
94
95 /** \brief CAN frame data length code
96 * Definition in Ifx_CAN.MOFCRx.DLC
97 */
98 typedef enum
99 {
100 IfxMultican_DataLengthCode_0 = 0, /**< \brief 0 data bytes */
101 IfxMultican_DataLengthCode_1, /**< \brief 1 data bytes */
102 IfxMultican_DataLengthCode_2, /**< \brief 2 data bytes */
103 IfxMultican_DataLengthCode_3, /**< \brief 3 data bytes */
104 IfxMultican_DataLengthCode_4, /**< \brief 4 data bytes */
105 IfxMultican_DataLengthCode_5, /**< \brief 5 data bytes */
106 IfxMultican_DataLengthCode_6, /**< \brief 6 data bytes */
107 IfxMultican_DataLengthCode_7, /**< \brief 7 data bytes */
108 IfxMultican_DataLengthCode_8, /**< \brief 8 data bytes */
109 IfxMultican_DataLengthCode_12 = 9, /**< \brief 12 data bytes */
110 IfxMultican_DataLengthCode_16 = 10, /**< \brief 16 data bytes */
111 IfxMultican_DataLengthCode_20 = 11, /**< \brief 20 data bytes */
112 IfxMultican_DataLengthCode_24 = 12, /**< \brief 24 data bytes */
113 IfxMultican_DataLengthCode_32 = 13, /**< \brief 32 data bytes */
114 IfxMultican_DataLengthCode_48 = 14, /**< \brief 48 data bytes */
115 IfxMultican_DataLengthCode_64 = 15 /**< \brief 64 data bytes */
116 } IfxMultican_DataLengthCode;
117
118 /** \brief CAN frame type
119 */
120 typedef enum
121 {
122 IfxMultican_Frame_receive, /**< \brief Data frame is received */
123 IfxMultican_Frame_transmit, /**< \brief Data frame is generated */
124 IfxMultican_Frame_remoteRequest, /**< \brief Remote request frame is generated */
125 IfxMultican_Frame_remoteAnswer /**< \brief Answer frame is generated on reception of the corresponding remote request */
126 } IfxMultican_Frame;
127
128 /** \brief Determines the operation mode of the frame counter\n
129 * Definition in Ifx_CAN.NFCRx.B.CFMOD, (x= node Id)
130 */
131 typedef enum
132 {
133 IfxMultican_FrameCounterMode_frameCountMode = 0, /**< \brief The frame counter is incremented
134 * upon the reception and transmission of frames */
135 IfxMultican_FrameCounterMode_timeStampMode = 1, /**< \brief The frame counter is used to count
136 * bit times. */
137 IfxMultican_FrameCounterMode_bitTimingMode = 2, /**< \brief The frame counter is used for
138 * analysis of the bit timing. */
139 IfxMultican_FrameCounterMode_errorCountMode = 3 /**< \brief The frame counter is used for
140 * counting when an error frame is received or an error is
141 * detected by the node. */
142 } IfxMultican_FrameCounterMode;
143
144 /** \brief CAN message object group\n
145 * Each group consists of 32 consecutive message objects
146 */
147 typedef enum
148 {
149 IfxMultican_MsgObjGroup_0 = 0,
150 IfxMultican_MsgObjGroup_1,
151 IfxMultican_MsgObjGroup_2,
152 IfxMultican_MsgObjGroup_3,
153 IfxMultican_MsgObjGroup_4,
154 IfxMultican_MsgObjGroup_5,
155 IfxMultican_MsgObjGroup_6,
156 IfxMultican_MsgObjGroup_7
157 } IfxMultican_MsgObjGroup;
158
159 /** \brief CAN Message Object Mode
160 */
161 typedef enum
162 {
163 IfxMultican_MsgObjMode_standard = 0, /**< \brief Standard Message Object */
164 IfxMultican_MsgObjMode_receiveFifoBase = 1, /**< \brief Receive FIFO Base Object */
165 IfxMultican_MsgObjMode_transmitFifoBase = 2, /**< \brief Transmit FIFO Base Object */
166 IfxMultican_MsgObjMode_transmitFifoSlave = 3, /**< \brief Transmit FIFO Slave Object */
167 IfxMultican_MsgObjMode_gatewaySource = 4, /**< \brief Gateway Source Object */
168 IfxMultican_MsgObjMode_canFD64 = 5 /**< \brief CANFD 64 bytes Message Mode */
169 } IfxMultican_MsgObjMode;
170
171 /** \brief CAN Message Object status flag
172 * Definition in Ifx_CAN.MOSTATx (x: 0 to max number of msg objs)
173 */
174 typedef enum
175 {
176 IfxMultican_MsgObjStatusFlag_receivePending = IFX_CAN_MO_STAT_RXPND_OFF, /**< \brief Receive pending status flag */
177 IfxMultican_MsgObjStatusFlag_transmitPending = IFX_CAN_MO_STAT_TXPND_OFF, /**< \brief Transmit pending status flag */
178 IfxMultican_MsgObjStatusFlag_receiveUpdating = IFX_CAN_MO_STAT_RXUPD_OFF, /**< \brief Receive updating status flag */
179 IfxMultican_MsgObjStatusFlag_newData = IFX_CAN_MO_STAT_NEWDAT_OFF, /**< \brief New data status flag */
180 IfxMultican_MsgObjStatusFlag_messageLost = IFX_CAN_MO_STAT_MSGLST_OFF, /**< \brief Message lost status flag */
181 IfxMultican_MsgObjStatusFlag_messageValid = IFX_CAN_MO_STAT_MSGVAL_OFF, /**< \brief Message valid status flag */
182 IfxMultican_MsgObjStatusFlag_receiveTransmitSelected = IFX_CAN_MO_STAT_RTSEL_OFF, /**< \brief Receive transmit selected status flag */
183 IfxMultican_MsgObjStatusFlag_receiveEnable = IFX_CAN_MO_STAT_RXEN_OFF, /**< \brief Receive enable status flag */
184 IfxMultican_MsgObjStatusFlag_transmitRequest = IFX_CAN_MO_STAT_TXRQ_OFF, /**< \brief Transmit request status flag */
185 IfxMultican_MsgObjStatusFlag_transmitEnable0 = IFX_CAN_MO_STAT_TXEN0_OFF, /**< \brief Transmit enable 0 status flag */
186 IfxMultican_MsgObjStatusFlag_transmitEnable1 = IFX_CAN_MO_STAT_TXEN1_OFF, /**< \brief Transmit enable 1 status flag */
187 IfxMultican_MsgObjStatusFlag_messageDirection = IFX_CAN_MO_STAT_DIR_OFF /**< \brief Message direction status flag */
188 } IfxMultican_MsgObjStatusFlag;
189
190 /** \brief CAN priorities
191 */
192 typedef enum
193 {
194 IfxMultican_Priority_ListOrder = 1, /**< \brief List order */
195 IfxMultican_Priority_CAN_ID = 2 /**< \brief CAN ID */
196 } IfxMultican_Priority;
197
198 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
199 * Definition in Ifx_CAN.CLC.B.EDIS
200 */
201 typedef enum
202 {
203 IfxMultican_SleepMode_enable = 0, /**< \brief enables sleep mode */
204 IfxMultican_SleepMode_disable = 1 /**< \brief disables sleep mode */
205 } IfxMultican_SleepMode;
206
207 /** \brief CAN API status definition
208 */
209 typedef enum
210 {
211 IfxMultican_Status_ok = 0x00000000,
212 IfxMultican_Status_notInitialised = 0x00000001,
213 IfxMultican_Status_wrongParam = 0x00000002,
214 IfxMultican_Status_wrongPin = 0x00000004,
215 IfxMultican_Status_busHeavy = 0x00000008,
216 IfxMultican_Status_busOff = 0x00000010,
217 IfxMultican_Status_notSentBusy = 0x00000020,
218 IfxMultican_Status_receiveEmpty = 0x00000040,
219 IfxMultican_Status_messageLost = 0x00000080,
220 IfxMultican_Status_newData = 0x00000100,
221 IfxMultican_Status_newDataButOneLost = IfxMultican_Status_messageLost | IfxMultican_Status_newData
222 } IfxMultican_Status;
223
224 /** \brief OCDS Suspend Control (OCDS.SUS)
225 */
226 typedef enum
227 {
228 IfxMultican_SuspendMode_none = 0, /**< \brief No suspend */
229 IfxMultican_SuspendMode_hard = 1, /**< \brief Hard Suspend */
230 IfxMultican_SuspendMode_soft = 2 /**< \brief Soft Suspend */
231 } IfxMultican_SuspendMode;
232
233 /** \} */
234
235 /******************************************************************************/
236 /*-----------------------------Data Structures--------------------------------*/
237 /******************************************************************************/
238
239 /** \brief CAN message definition
240 */
241 typedef struct
242 {
243 uint32 id; /**< \brief CAN message ID */
244 IfxMultican_DataLengthCode lengthCode; /**< \brief CAN message data length code */
245 uint32 data[2]; /**< \brief CAN message data */
246 boolean fastBitRate; /**< \brief CAN FD fast bit rate enable/disable */
247 } IfxMultican_Message;
248
249 /** \brief Message object status bit-fields
250 */
251 typedef union
252 {
253 Ifx_CAN_MO_STAT_Bits B;
254 unsigned int U;
255 } IfxMultican_MsgObjStat;
256
257 /** \addtogroup IfxLld_Multican_Std_General
258 * \{ */
259
260 /******************************************************************************/
261 /*-------------------------Inline Function Prototypes-------------------------*/
262 /******************************************************************************/
263
264 /** \brief clears the message pending interrupt notification of a given list
265 * \param mcan mcan Specifies the CAN module
266 * \return None
267 */
268 IFX_INLINE void IfxMultican_clearMessagePendingSeletor(Ifx_CAN *mcan);
269
270 /** \brief clears the message pending interrupt notification of a given list
271 * \param mcan mcan Specifies the CAN module
272 * \param list List number
273 * \return None
274 */
275 IFX_INLINE void IfxMultican_clearPendingMessageNotification(Ifx_CAN *mcan, uint16 list);
276
277 /** \brief Disables the module (sets the disable request)
278 * \param mcan mcan Specifies the CAN module
279 * \return None
280 */
281 IFX_INLINE void IfxMultican_disableModule(Ifx_CAN *mcan);
282
283 /** \brief Disregards the sleep mode of the module
284 * \param mcan mcan Specifies the CAN module
285 * \return None
286 */
287 IFX_INLINE void IfxMultican_disableSleepMode(Ifx_CAN *mcan);
288
289 /** \brief Enables the module (clears the disable request)
290 * \param mcan mcan Specifies the CAN module
291 * \return None
292 */
293 IFX_INLINE void IfxMultican_enableModule(Ifx_CAN *mcan);
294
295 /** \brief Enables the sleep mode of the module
296 * \param mcan mcan Specifies the CAN module
297 * \return None
298 */
299 IFX_INLINE void IfxMultican_enableSleepMode(Ifx_CAN *mcan);
300
301 /** \brief Returns the selected fractional divider mode
302 * \param mcan mcan Specifies the CAN module
303 * \return Divider mode
304 */
305 IFX_INLINE uint16 IfxMultican_getFractionalDividerMode(Ifx_CAN *mcan);
306
307 /** \brief Returns the reload or addition value for the result.
308 * \param mcan mcan Specifies the CAN module
309 * \return Step Value
310 */
311 IFX_INLINE uint16 IfxMultican_getFractionalDividerStepValue(Ifx_CAN *mcan);
312
313 /** \brief Returns the selected input clock source
314 * \param mcan mcan Specifies the CAN module
315 * \return Clock selection
316 */
317 IFX_INLINE IfxMultican_ClockSelect IfxMultican_getInputClock(Ifx_CAN *mcan);
318
319 /** \brief Returns the status of module enabled or disabled
320 * \param mcan mcan Specifies the CAN module
321 * \return Status (TRUE / FALSE)
322 */
323 IFX_INLINE boolean IfxMultican_isModuleEnabled(Ifx_CAN *mcan);
324
325 /** \brief sets the fractional divider mode
326 * \param mcan mcan Specifies the CAN module
327 * \param mode Divider mode
328 * \return None
329 */
330 IFX_INLINE void IfxMultican_setFractionalDividerMode(Ifx_CAN *mcan, uint16 mode);
331
332 /** \brief sets reload or addition value for the result.
333 * \param mcan mcan Specifies the CAN module
334 * \param stepValue Step Value
335 * \return None
336 */
337 IFX_INLINE void IfxMultican_setFractionalDividerStepValue(Ifx_CAN *mcan, uint16 stepValue);
338
339 /** \brief Sets the input clock source
340 * \param mcan mcan Specifies the CAN module
341 * \param clockSelect Clock selection
342 * \return None
343 */
344 IFX_INLINE void IfxMultican_setInputClock(Ifx_CAN *mcan, IfxMultican_ClockSelect clockSelect);
345
346 /** \brief clears the message pending interrupt notification of a given list
347 * \param mcan mcan Specifies the CAN module
348 * \param mask Message Index mask
349 * \return None
350 */
351 IFX_INLINE void IfxMultican_setMessageIndexMask(Ifx_CAN *mcan, uint32 mask);
352
353 /** \brief Sets the sensitivity of the module to sleep signal
354 * \param can pointer to CAN registers
355 * \param mode mode selection (enable / disable)
356 * \return None
357 */
358 IFX_INLINE void IfxMultican_setSleepMode(Ifx_CAN *can, IfxMultican_SleepMode mode);
359
360 /** \brief Wait until the list panel is ready
361 * \param mcan mcan Specifies the CAN module
362 * \return None
363 */
364 IFX_INLINE void IfxMultican_waitListReady(Ifx_CAN *mcan);
365
366 /** \brief Returns the module's suspend state.
367 * TRUE :if module is suspended.
368 * FALSE:if module is not yet suspended.
369 * \param mcan Pointer to MULTICAN module registers
370 * \return Suspend status (TRUE / FALSE)
371 */
372 IFX_INLINE boolean IfxMultican_isModuleSuspended(Ifx_CAN *mcan);
373
374 /** \brief Set the Module to Hard/Soft suspend mode.
375 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
376 * \param mcan Pointer to MULTICAN module registers
377 * \param mode Module suspend mode
378 * \return None
379 */
380 IFX_INLINE void IfxMultican_setSuspendMode(Ifx_CAN *mcan, IfxMultican_SuspendMode mode);
381
382 /******************************************************************************/
383 /*-------------------------Global Function Prototypes-------------------------*/
384 /******************************************************************************/
385
386 /** \brief Calculates the best posible values and configures FBTR register
387 * \param hwNode Pointer to CAN Node registers
388 * \param moduleFreq Specifies the CAN module frequency
389 * \param baudrate Specifies the node baud rate. Unit: baud
390 * \param samplePoint Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
391 * \param synchJumpWidth synchJumpWidth Specifies the re-synchronization jump width.\n
392 * Range = [0, 10000] resp. [0%, 100%] of the total bit time.
393 * \return None
394 */
395 IFX_EXTERN void IfxMultican_Node_setFastBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth);
396
397 /** \brief Calculates the best posible values and configures BTEVR register
398 * \param hwNode Pointer to CAN Node registers
399 * \param moduleFreq Specifies the CAN module frequency
400 * \param baudrate Specifies the node baud rate. Unit: baud
401 * \param samplePoint Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
402 * \param synchJumpWidth synchJumpWidth Specifies the re-synchronization jump width.\n
403 * Range = [0, 10000] resp. [0%, 100%] of the total bit time.
404 * \return None
405 */
406 IFX_EXTERN void IfxMultican_Node_setNominalBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth);
407
408 /** \brief Reset the CAN module\n
409 * Reset and disable the CAN module, inclusive message object and node registers.
410 * \param mcan Specifies the CAN module
411 * \return None
412 */
413 IFX_EXTERN void IfxMultican_deinit(Ifx_CAN *mcan);
414
415 /** \brief resets Multican kernel
416 * \param can pointer to CAN registers
417 * \return None
418 */
419 IFX_EXTERN void IfxMultican_resetModule(Ifx_CAN *can);
420
421 /** \brief Execute a command from the command panel
422 * \param mcan Specifies the CAN module
423 * \param cmd Specifies the command
424 * \param arg2 Specifies the second argument
425 * \param arg1 Specifies the first argument
426 * \return None
427 */
428 IFX_EXTERN void IfxMultican_setListCommand(Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1);
429
430 /** \brief API to get the resource index of the CAN specified.
431 * \return multican resource index
432 */
433 IFX_EXTERN IfxMultican_Index IfxMultican_getIndex(Ifx_CAN *multican);
434
435 /**
436 * \param multican Module index of the MULTICAN
437 * \return MULTICAN module register address
438 */
439 IFX_EXTERN Ifx_CAN *IfxMultican_getAddress(IfxMultican_Index multican);
440
441 /** \} */
442
443 /** \addtogroup IfxLld_Multican_Std_Node
444 * \{ */
445
446 /******************************************************************************/
447 /*-------------------------Inline Function Prototypes-------------------------*/
448 /******************************************************************************/
449
450 /** \brief Activate the CAN Node. Participate in the CAN bus activities
451 * \param hwNode Pointer to CAN Node registers
452 * \return None
453 */
454 IFX_INLINE void IfxMultican_Node_activate(Ifx_CAN_N *hwNode);
455
456 /** \brief Deactivate the CAN Node. Take out from participation in the CAN bus activities
457 * \param hwNode Pointer to CAN Node registers
458 * \return None
459 */
460 IFX_INLINE void IfxMultican_Node_deactivate(Ifx_CAN_N *hwNode);
461
462 /** \brief Disables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node.
463 * \param hwNode Pointer to CAN Node registers
464 * \return None
465 */
466 IFX_INLINE void IfxMultican_Node_disableConfigurationChange(Ifx_CAN_N *hwNode);
467
468 /** \brief Enables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node.
469 * \param hwNode Pointer to CAN Node registers
470 * \return None
471 */
472 IFX_INLINE void IfxMultican_Node_enableConfigurationChange(Ifx_CAN_N *hwNode);
473
474 /** \brief Returns the base address to a given CAN node number
475 * \param mcan Specifies the CAN module
476 * \param node Specifies the CAN node
477 * \return base pointer to CAN node
478 */
479 IFX_INLINE Ifx_CAN_N *IfxMultican_Node_getPointer(Ifx_CAN *mcan, IfxMultican_NodeId node);
480
481 /** \brief Resets the control register of CAN Node x.
482 * \param hwNode Pointer to CAN Node registers
483 * \return None
484 */
485 IFX_INLINE void IfxMultican_Node_resetControlRegister(Ifx_CAN_N *hwNode);
486
487 /** \brief Resets the error counters of CAN Node x.
488 * \param hwNode Pointer to CAN Node registers
489 * \return None
490 */
491 IFX_INLINE void IfxMultican_Node_resetErrorCounters(Ifx_CAN_N *hwNode);
492
493 /** \brief Resets the interrupt pointers of CAN Node x.
494 * \param hwNode Pointer to CAN Node registers
495 * \return None
496 */
497 IFX_INLINE void IfxMultican_Node_resetInterruptPointers(Ifx_CAN_N *hwNode);
498
499 /** \brief Enables / Disables the alert interrupt of CAN node x.
500 * \param hwNode Pointer to CAN Node registers
501 * \param enabled Enable / disable choice
502 * \return None
503 */
504 IFX_INLINE void IfxMultican_Node_setAlertInterrupt(Ifx_CAN_N *hwNode, boolean enabled);
505
506 /** \brief Selects the interrupt output line INT_Om
507 * (m = 0-15) for an alert interrupt of CAN Node x.
508 * \param hwNode Pointer to CAN Node registers
509 * \param srcId Service request ID
510 * \return None
511 */
512 IFX_INLINE void IfxMultican_Node_setAlertInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId);
513
514 /** \brief Enables / Disables the analyzer mode of CAN node x.
515 * \param hwNode Pointer to CAN Node registers
516 * \param mode Enable / disable choice
517 * \return None
518 */
519 IFX_INLINE void IfxMultican_Node_setAnalyzerMode(Ifx_CAN_N *hwNode, boolean mode);
520
521 /** \brief Determines the threshold value (warning level, default 96) to be reached\n
522 * in order to set the corresponding error warning bit EWRN.
523 * \param hwNode Pointer to CAN Node registers
524 * \param level Error warning level
525 * \return None
526 */
527 IFX_INLINE void IfxMultican_Node_setErrorWarningLevel(Ifx_CAN_N *hwNode, uint8 level);
528
529 /** \brief Enables / Disables the flexible data rate of CAN node x.
530 * \param hwNode Pointer to CAN Node registers
531 * \param enabled Enable / disable choice
532 * \return None
533 */
534 IFX_INLINE void IfxMultican_Node_setFastNode(Ifx_CAN_N *hwNode, boolean enabled);
535
536 /** \brief Enables / Disables the CAN frame counter overflow interrupt of CAN node x.
537 * \param hwNode Pointer to CAN Node registers
538 * \param enabled Enable / disable choice
539 * \return None
540 */
541 IFX_INLINE void IfxMultican_Node_setFrameCounterInterrupt(Ifx_CAN_N *hwNode, boolean enabled);
542
543 /** \brief Selects the interrupt output line INT_Om
544 * (m = 0-15) for a frame counter overflow interrupt of CAN Node x.
545 * \param hwNode Pointer to CAN Node registers
546 * \param srcId Service request ID
547 * \return None
548 */
549 IFX_INLINE void IfxMultican_Node_setFrameCounterInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId);
550
551 /** \brief Sets the operation mode of the frame counter of the CAN Node x
552 * \param hwNode Pointer to CAN Node registers
553 * \param mode Determines the operation mode of the frame counter
554 * \return None
555 */
556 IFX_INLINE void IfxMultican_Node_setFrameCounterMode(Ifx_CAN_N *hwNode, IfxMultican_FrameCounterMode mode);
557
558 /** \brief Enables / Disables the last error code interrupt of CAN node x. \n
559 * This interrupt is generated with each hardware update of bit field NSRx.LEC with LEC > 0 (CAN protocol error).
560 * \param hwNode Pointer to CAN Node registers
561 * \param enabled Enable / disable choice
562 * \return None
563 */
564 IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterrupt(Ifx_CAN_N *hwNode, boolean enabled);
565
566 /** \brief Selects the interrupt output line INT_Om
567 * (m = 0-15) for an LEC interrupt of CAN Node x.
568 * \param hwNode Pointer to CAN Node registers
569 * \param srcId Service request ID
570 * \return None
571 */
572 IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId);
573
574 /** \brief Enables / Disables the loopback mode of CAN node x.
575 * \param hwNode Pointer to CAN Node registers
576 * \param mode Enable / disable choice
577 * \return None
578 */
579 IFX_INLINE void IfxMultican_Node_setLoopBackMode(Ifx_CAN_N *hwNode, boolean mode);
580
581 /** \brief Sets the value of the receive error counter of CAN node x.
582 * \param hwNode Pointer to CAN Node registers
583 * \param value Receive error counter value
584 * \return None
585 */
586 IFX_INLINE void IfxMultican_Node_setReceiveErrorCounter(Ifx_CAN_N *hwNode, uint8 value);
587
588 /** \brief Selects the interrupt output line INT_Om
589 * (m = 0-15) for a timer event interrupt of CAN Node x.
590 * \param hwNode Pointer to CAN Node registers
591 * \param srcId Service request ID
592 * \return None
593 */
594 IFX_INLINE void IfxMultican_Node_setTimerEventInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId);
595
596 /** \brief Enables / Disables the transceiver delay compensation of CAN node x.
597 * \param hwNode Pointer to CAN Node registers
598 * \param enabled Enable / disable choice
599 * \return None
600 */
601 IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensation(Ifx_CAN_N *hwNode, boolean enabled);
602
603 /** \brief Sets transceiver delay ompensation offset of CAN node x.
604 * \param hwNode Pointer to CAN Node registers
605 * \param value transceiver delay ompensation offset that is added to the measured transceiver delay. Range = [0, 15]
606 * \return None
607 */
608 IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensationOffset(Ifx_CAN_N *hwNode, uint16 value);
609
610 /** \brief Enables / Disables the transfer interrupt of CAN node x. \n
611 * This interrupt is generated after the successful reception or transmission of a CAN frame in node x
612 * \param hwNode Pointer to CAN Node registers
613 * \param enabled Enable / disable choice
614 * \return None
615 */
616 IFX_INLINE void IfxMultican_Node_setTransferInterrupt(Ifx_CAN_N *hwNode, boolean enabled);
617
618 /** \brief Selects the interrupt output line INT_Om
619 * (m = 0-15) for a transfer OK interrupt of CAN Node x.
620 * \param hwNode Pointer to CAN Node registers
621 * \param srcId Service request ID
622 * \return None
623 */
624 IFX_INLINE void IfxMultican_Node_setTransferInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId);
625
626 /** \brief Sets the value of the transmit error counter of CAN node x.
627 * \param hwNode Pointer to CAN Node registers
628 * \param value Transmit error counter value
629 * \return None
630 */
631 IFX_INLINE void IfxMultican_Node_setTransmitErrorCounter(Ifx_CAN_N *hwNode, uint8 value);
632
633 /** \brief Return the DLC code corresponding to the data length in byte
634 * \param dataLength Data length in bytes
635 * \return Data length code
636 */
637 IFX_INLINE IfxMultican_DataLengthCode IfxMultican_Node_getCodeFromDataLength(uint32 dataLength);
638
639 /** \brief Get the datalength in bytes from DLC
640 * \param code Data length code
641 * \return Datalength in bytes
642 */
643 IFX_INLINE uint32 IfxMultican_Node_getDataLengthFromCode(IfxMultican_DataLengthCode code);
644
645 /******************************************************************************/
646 /*-------------------------Global Function Prototypes-------------------------*/
647 /******************************************************************************/
648
649 /** \brief Reset the CAN node
650 * \param hwNode Pointer to CAN Node registers
651 * \return None
652 */
653 IFX_EXTERN void IfxMultican_Node_deinit(Ifx_CAN_N *hwNode);
654
655 /** \brief Select and initialise the CAN node receive pin
656 * \param hwNode Pointer to CAN Node registers
657 * \param rxd Rx pin
658 * \param mode Input mode
659 * \return TRUE: Returns TRUE if the operation was successful\n
660 * FALSE: Returns FALSE if the operation was errorneous
661 */
662 IFX_EXTERN boolean IfxMultican_Node_initRxPin(Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver);
663
664 /** \brief Select and initialise the CAN node transmit pin
665 * \param hwNode Pointer to CAN Node registers
666 * \param txd Tx pin
667 * \param mode Output mode
668 * \return TRUE: Returns TRUE if the operation was successful\n
669 * FALSE: Returns FALSE if the operation was errorneous
670 */
671 IFX_EXTERN boolean IfxMultican_Node_initTxPin(Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver);
672
673 /** \brief Recovers the CAN node from bus off
674 * \param hwNode Pointer to CAN Node registers
675 * \return Status
676 */
677 IFX_EXTERN IfxMultican_Status IfxMultican_Node_recoverBusOff(Ifx_CAN_N *hwNode);
678
679 /** \brief Calculates the best posible values and configures BTR register
680 * \param hwNode Pointer to CAN Node registers
681 * \param moduleFreq Specifies the CAN module frequency
682 * \param baudrate Specifies the node baud rate. Unit: baud
683 * \param samplePoint Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
684 * \param synchJumpWidth synchJumpWidth Specifies the re-synchronization jump width.\n
685 * Range = [0, 10000] resp. [0%, 100%] of the total bit time.
686 * \return None
687 */
688 IFX_EXTERN void IfxMultican_Node_setBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth);
689
690 /** \brief Returns the CAN node timing
691 * \param moduleFreq Specifies the CAN module frequency
692 * \param btr BTR
693 * \param baudrate Baudrate
694 * \param samplePoint Sample point
695 * \param synchJumpWidth Sync Jump Width
696 * \return None
697 */
698 IFX_EXTERN void IfxMultican_calcTimingFromBTR(float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth);
699
700 /** \} */
701
702 /** \addtogroup IfxLld_Multican_Std_Message
703 * \{ */
704
705 /******************************************************************************/
706 /*-------------------------Inline Function Prototypes-------------------------*/
707 /******************************************************************************/
708
709 /** \brief Initializes a CAN message
710 * \param msg The message which should be initialized
711 * \param id The message ID
712 * \param dataLow The lower part of the 64bit data value
713 * \param dataHigh The upper part of the 64bit data value
714 * \param lengthCode number of bytes (data length code) which should be transmitted (0..8)
715 * \return None
716 */
717 IFX_INLINE void IfxMultican_Message_init(IfxMultican_Message *msg, uint32 id, uint32 dataLow, uint32 dataHigh, IfxMultican_DataLengthCode lengthCode);
718
719 /** \brief Initializes a CAN message long frame
720 * \param msg The message which should be initialized
721 * \param id The message ID
722 * \param lengthCode number of bytes (data length code) which should be transmitted (0..8)
723 * \param fastBitRate Fast bit rate (FCR.BRS) enable/ disable choice
724 * \return None
725 */
726 IFX_INLINE void IfxMultican_Message_longFrameInit(IfxMultican_Message *msg, uint32 id, IfxMultican_DataLengthCode lengthCode, boolean fastBitRate);
727
728 /** \} */
729
730 /** \addtogroup IfxLld_Multican_Std_Message_Objects
731 * \{ */
732
733 /******************************************************************************/
734 /*-------------------------Inline Function Prototypes-------------------------*/
735 /******************************************************************************/
736
737 /** \brief Sets priority class of message object
738 * \param hwObj Pointer to CAN message object registers
739 * \return None
740 */
741 IFX_INLINE void IfxMultican_MsgObj_clearDataRegisters(Ifx_CAN_MO *hwObj);
742
743 /** \brief Clears the FIFO/GateWay pointers of a message object
744 * \param hwObj Pointer to CAN message object registers
745 * \return None
746 */
747 IFX_INLINE void IfxMultican_MsgObj_clearFifoGatewayPointers(Ifx_CAN_MO *hwObj);
748
749 /** \brief Clear the RX pending flag of a message object
750 * \param hwObj Pointer to CAN message object registers
751 * \return None
752 */
753 IFX_INLINE void IfxMultican_MsgObj_clearRxPending(Ifx_CAN_MO *hwObj);
754
755 /** \brief Clear the TX pending flag of a message object
756 * \param hwObj Pointer to CAN message object registers
757 * \return None
758 */
759 IFX_INLINE void IfxMultican_MsgObj_clearTxPending(Ifx_CAN_MO *hwObj);
760
761 /** \brief Gets bottom object pointer of the base message object
762 * \param hwObj Pointer to CAN message object registers
763 * \return Bottom message object number
764 */
765 IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getBottomObjectPointer(Ifx_CAN_MO *hwObj);
766
767 /** \brief Gets data length code of a message object
768 * \param hwObj Pointer to CAN message object registers
769 * \return CAN frame data length code
770 */
771 IFX_INLINE IfxMultican_DataLengthCode IfxMultican_MsgObj_getDataLengthCode(Ifx_CAN_MO *hwObj);
772
773 /** \brief Gets message identifier of message object
774 * \param hwObj Pointer to CAN message object registers
775 * \return messageId
776 */
777 IFX_INLINE uint32 IfxMultican_MsgObj_getMessageId(Ifx_CAN_MO *hwObj);
778
779 /** \brief Returns next object pointer (PNEXT) of the current message object
780 * \param hwObj Pointer to CAN message object registers
781 * \return Next message object number
782 */
783 IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getNextObjectPointer(Ifx_CAN_MO *hwObj);
784
785 /** \brief Get base address of a message object register
786 * \param mcan Specifies the CAN module
787 * \param msgObjId Specifies the message object index. Range = [0, \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
788 * \return Pointer to Message Object registers
789 */
790 IFX_INLINE Ifx_CAN_MO *IfxMultican_MsgObj_getPointer(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId);
791
792 /** \brief Get the message object status
793 * \param hwObj Pointer to CAN message object registers
794 * \return Extended frame: True
795 * Standard frame: False
796 */
797 IFX_INLINE boolean IfxMultican_MsgObj_isExtendedFrame(Ifx_CAN_MO *hwObj);
798
799 /** \brief Returns the RX pending flag of a message object.
800 * \param hwObj Pointer to CAN message object registers
801 * \return TRUE of the RX pending flag of a message object is set
802 */
803 IFX_INLINE boolean IfxMultican_MsgObj_isRxPending(Ifx_CAN_MO *hwObj);
804
805 /** \brief Returns the TX Request flag of a message object.
806 * \param hwObj Pointer to CAN message object registers
807 * \return TRUE of the TX Request flag of a message object is set
808 */
809 IFX_INLINE boolean IfxMultican_MsgObj_isTransmitRequested(Ifx_CAN_MO *hwObj);
810
811 /** \brief Returns the TX pending flag of a message object.
812 * \param hwObj Pointer to CAN message object registers
813 * \return TRUE of the TX pending flag of a message object is set
814 */
815 IFX_INLINE boolean IfxMultican_MsgObj_isTxPending(Ifx_CAN_MO *hwObj);
816
817 /** \brief Sets acceptance mask for the message identifier
818 * \param hwObj Pointer to CAN message object registers
819 * \param mask Acceptance Mask for the message identifier
820 * \param extendedFrame Extended frame enabled / disabled
821 * \return None
822 */
823 IFX_INLINE void IfxMultican_MsgObj_setAcceptanceMask(Ifx_CAN_MO *hwObj, uint32 mask, boolean extendedFrame);
824
825 /** \brief Enable / Disable bit rate switch of a message object
826 * \param hwObj Pointer to CAN message object registers
827 * \param enabled Enable / disable choice
828 * \return None
829 */
830 IFX_INLINE void IfxMultican_MsgObj_setBitRateSwitch(Ifx_CAN_MO *hwObj, boolean enabled);
831
832 /** \brief Sets bottom object pointer of the base message object
833 * \param hwObj Pointer to CAN message object registers
834 * \param objNumber Bottom message object number
835 * \return None
836 */
837 IFX_INLINE void IfxMultican_MsgObj_setBottomObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber);
838
839 /** \brief Sets bottom current pointer of the base message object
840 * \param hwObj Pointer to CAN message object registers
841 * \param objNumber Current message object number
842 * \return None
843 */
844 IFX_INLINE void IfxMultican_MsgObj_setCurrentObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber);
845
846 /** \brief Enable / Disable data copy of a gateway source message object
847 * \param hwObj Pointer to CAN message object registers
848 * \param enabled Enable / disable choice
849 * \return None
850 */
851 IFX_INLINE void IfxMultican_MsgObj_setDataCopy(Ifx_CAN_MO *hwObj, boolean enabled);
852
853 /** \brief Sets data length code of a message object
854 * \param hwObj Pointer to CAN message object registers
855 * \param code CAN frame data length code
856 * \return None
857 */
858 IFX_INLINE void IfxMultican_MsgObj_setDataLengthCode(Ifx_CAN_MO *hwObj, IfxMultican_DataLengthCode code);
859
860 /** \brief Enable / Disable data length code copy of a gateway source message object
861 * \param hwObj Pointer to CAN message object registers
862 * \param enabled Enable / disable choice
863 * \return None
864 */
865 IFX_INLINE void IfxMultican_MsgObj_setDataLengthCodeCopy(Ifx_CAN_MO *hwObj, boolean enabled);
866
867 /** \brief Enable / Disable extended data length of a message object
868 * \param hwObj Pointer to CAN message object registers
869 * \param enabled Enable / disable choice
870 * \return None
871 */
872 IFX_INLINE void IfxMultican_MsgObj_setExtendedDataLength(Ifx_CAN_MO *hwObj, boolean enabled);
873
874 /** \brief Enable / Disable gateway data frame send of a gateway source message object
875 * which in turn sets the TXRQ of the gateway deatination object
876 * \param hwObj Pointer to CAN message object registers
877 * \param enabled Enable / disable choice
878 * \return None
879 */
880 IFX_INLINE void IfxMultican_MsgObj_setGatewayDataFrameSend(Ifx_CAN_MO *hwObj, boolean enabled);
881
882 /** \brief Enable / Disable identifier copy of a gateway source message object
883 * \param hwObj Pointer to CAN message object registers
884 * \param enabled Enable / disable choice
885 * \return None
886 */
887 IFX_INLINE void IfxMultican_MsgObj_setIdentifierCopy(Ifx_CAN_MO *hwObj, boolean enabled);
888
889 /** \brief Sets identifier extension of message object
890 * \param hwObj Pointer to CAN message object registers
891 * \param extension Acceptance Mask for the message IDE bit
892 * \return None
893 */
894 IFX_INLINE void IfxMultican_MsgObj_setIdentifierExtension(Ifx_CAN_MO *hwObj, boolean extension);
895
896 /** \brief Sets acceptance mask for the message IDE bit
897 * \param hwObj Pointer to CAN message object registers
898 * \param matchingId Acceptance Mask for the message IDE bit
899 * \return None
900 */
901 IFX_INLINE void IfxMultican_MsgObj_setMatchingId(Ifx_CAN_MO *hwObj, boolean matchingId);
902
903 /** \brief Sets message identifier of message object
904 * \param hwObj Pointer to CAN message object registers
905 * \param messageId CAN Identifier of message object
906 * \param extendedFrame Extended frame enabled / disabled
907 * \return None
908 */
909 IFX_INLINE void IfxMultican_MsgObj_setMessageId(Ifx_CAN_MO *hwObj, uint32 messageId, boolean extendedFrame);
910
911 /** \brief Sets the message mode of a message object
912 * \param hwObj Pointer to CAN message object registers
913 * \param mode CAN Message Object Mode
914 * \return None
915 */
916 IFX_INLINE void IfxMultican_MsgObj_setMessageMode(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjMode mode);
917
918 /** \brief Sets message pending number that selects the bit position of the bit in the Message Pending Register\n
919 * that is set upon a message object n receive/transmit interrupt
920 * \param hwObj Pointer to CAN message object registers
921 * \param messageNumber Message pending number
922 * \return None
923 */
924 IFX_INLINE void IfxMultican_MsgObj_setMessagePendingNumber(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjId messageNumber);
925
926 /** \brief Enable / Disable overflow interrupt of a message object
927 * \param hwObj Pointer to CAN message object registers
928 * \param enabled Enable / disable choice
929 * \return None
930 */
931 IFX_INLINE void IfxMultican_MsgObj_setOverflowInterrupt(Ifx_CAN_MO *hwObj, boolean enabled);
932
933 /** \brief Sets priority class of message object
934 * \param hwObj Pointer to CAN message object registers
935 * \param priority One of the priority classes 0, 1, 2, 3 to message object n
936 * \return None
937 */
938 IFX_INLINE void IfxMultican_MsgObj_setPriorityClass(Ifx_CAN_MO *hwObj, IfxMultican_Priority priority);
939
940 /** \brief Enable / Disable receive interrupt of a message object
941 * \param hwObj Pointer to CAN message object registers
942 * \param enabled Enable / disable choice
943 * \return None
944 */
945 IFX_INLINE void IfxMultican_MsgObj_setReceiveInterrupt(Ifx_CAN_MO *hwObj, boolean enabled);
946
947 /** \brief Sets receive interrupt node pointer of message object
948 * \param hwObj Pointer to CAN message object registers
949 * \param srcId Service request ID
950 * \return None
951 */
952 IFX_INLINE void IfxMultican_MsgObj_setReceiveInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId);
953
954 /** \brief Enable / Disable transmit object remote monitoring of a message object
955 * \param hwObj Pointer to CAN message object registers
956 * \param enabled Enable / disable choice
957 * \return None
958 */
959 IFX_INLINE void IfxMultican_MsgObj_setRemoteMonitoring(Ifx_CAN_MO *hwObj, boolean enabled);
960
961 /** \brief Sets bottom object select pointer of the base message object
962 * \param hwObj Pointer to CAN message object registers
963 * \param objNumber Select message object number
964 * \return None
965 */
966 IFX_INLINE void IfxMultican_MsgObj_setSelectObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber);
967
968 /** \brief Enable / Disable single data transfer of a message object
969 * \param hwObj Pointer to CAN message object registers
970 * \param enabled Enable / disable choice
971 * \return None
972 */
973 IFX_INLINE void IfxMultican_MsgObj_setSingleDataTransfer(Ifx_CAN_MO *hwObj, boolean enabled);
974
975 /** \brief Enable / Disable single transmit trial of a message object
976 * \param hwObj Pointer to CAN message object registers
977 * \param enabled Enable / disable choice
978 * \return None
979 */
980 IFX_INLINE void IfxMultican_MsgObj_setSingleTransmitTrial(Ifx_CAN_MO *hwObj, boolean enabled);
981
982 /** \brief Sets top object pointer of the base message object
983 * \param hwObj Pointer to CAN message object registers
984 * \param objNumber Top message object number
985 * \return None
986 */
987 IFX_INLINE void IfxMultican_MsgObj_setTopObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber);
988
989 /** \brief Enable / Disable transmit interrupt of a message object
990 * \param hwObj Pointer to CAN message object registers
991 * \param enabled Enable / disable choice
992 * \return None
993 */
994 IFX_INLINE void IfxMultican_MsgObj_setTransmitInterrupt(Ifx_CAN_MO *hwObj, boolean enabled);
995
996 /** \brief Sets transmit interrupt node pointer of message object
997 * \param hwObj Pointer to CAN message object registers
998 * \param srcId Service request ID
999 * \return None
1000 */
1001 IFX_INLINE void IfxMultican_MsgObj_setTransmitInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId);
1002
1003 /******************************************************************************/
1004 /*-------------------------Global Function Prototypes-------------------------*/
1005 /******************************************************************************/
1006
1007 /** \brief Cancel pending TX request by invalidating the request, only when frame transmission has not been started.
1008 * \param hwObj Pointer to CAN message object registers
1009 * \return TRUE if cancellation was successfully executed
1010 */
1011 IFX_EXTERN boolean IfxMultican_MsgObj_cancelSend(Ifx_CAN_MO *hwObj);
1012
1013 /** \brief Clears the selected status flag of a message object
1014 * \param hwObj Pointer to CAN message object registers
1015 * \param flag Message Object status flag
1016 * \return None
1017 */
1018 IFX_EXTERN void IfxMultican_MsgObj_clearStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag);
1019
1020 /** \brief Reset the message object\n
1021 * Append the message object to the end of idle list and reset message object registers
1022 * \param mcan Specifies the CAN module
1023 * \param msgObjId Specifies the message object index. Range = [0, \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
1024 * \return None
1025 */
1026 IFX_EXTERN void IfxMultican_MsgObj_deinit(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId);
1027
1028 /** \brief Get message object ID which has TX/RX pending flag from a message object group
1029 * \param mcan Specifies the CAN module
1030 * \param msgObjGroup Message object group
1031 * \return Message object index
1032 */
1033 IFX_EXTERN IfxMultican_MsgObjId IfxMultican_MsgObj_getPendingId(Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup);
1034
1035 /** \brief Get the message object status
1036 * \param hwObj Pointer to CAN message object registers
1037 * \return \ref IfxMultican_MsgObjStat bitfield
1038 */
1039 IFX_EXTERN IfxMultican_MsgObjStat IfxMultican_MsgObj_getStatus(Ifx_CAN_MO *hwObj);
1040
1041 /** \brief Gets the status of the selected status flag of a message object
1042 * \param hwObj Pointer to CAN message object registers
1043 * \param flag Message Object status flag
1044 * \return Status (TRUE / FALSE)
1045 */
1046 IFX_EXTERN boolean IfxMultican_MsgObj_getStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag);
1047
1048 /** \brief Read a received CAN long frame
1049 * \param mcan Specifies the CAN module
1050 * \param msgObjId Specifies the message object index. Range = [0, \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
1051 * \param msg The message which should be initialized
1052 * \param data Pointer to data (in words)
1053 * \return IfxMultican_Status_newData: if the operation was successful\n
1054 * IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully\n
1055 * IfxMultican_Status_messageLost: if the message lost and new data is not yet ready\n
1056 * IfxMultican_Status_receiveEmpty: if no message is been received
1057 */
1058 IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_readLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data);
1059
1060 /** \brief Read a received CAN message
1061 * \param hwObj Pointer to CAN message object registers
1062 * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful.
1063 * \return IfxMultican_Status_newData: if the operation was successful\n
1064 * IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully\n
1065 * IfxMultican_Status_messageLost: if the message lost and new data is not yet ready\n
1066 * IfxMultican_Status_receiveEmpty: if no message is been received
1067 */
1068 IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_readMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg);
1069
1070 /** \brief Send a CAN Long frame message
1071 * \param mcan Specifies the CAN module
1072 * \param msgObjId Specifies the message object index. Range = [0, \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
1073 * \param msg The message which should be initialized
1074 * \param data Pointer to data (in words)
1075 * \return IfxMultican_Status_ok: if the operation was successful
1076 * IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy
1077 */
1078 IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_sendLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data);
1079
1080 /** \brief Send a CAN message
1081 * \param hwObj Pointer to CAN message object registers
1082 * \param msg Specifies the message to be send
1083 * \return IfxMultican_Status_ok: if the operation was successful
1084 * IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy
1085 */
1086 IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_sendMessage(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg);
1087
1088 /** \brief Send a CAN message
1089 * \param hwObj Pointer to CAN message object registers
1090 * \param msg Specifies the message to be send
1091 * \return IfxMultican_Status_ok: if the operation was successful
1092 * IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy
1093 */
1094 IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_writeTxfifo(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg);
1095
1096 /** \brief Set message object filter
1097 * \param hwObj Pointer to CAN message object registers
1098 * \param extend TRUE/FALSE : extended ID
1099 * \param id ID
1100 * \param accMask acceptance mask
1101 * \return None
1102 */
1103 IFX_EXTERN void IfxMultican_MsgObj_setFilter(Ifx_CAN_MO *hwObj, boolean extend, uint32 id, uint32 accMask);
1104
1105 /** \brief Sets the selected status flag of a message object
1106 * \param hwObj Pointer to CAN message object registers
1107 * \param flag Message Object status flag
1108 * \return None
1109 */
1110 IFX_EXTERN void IfxMultican_MsgObj_setStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag);
1111
1112 /** \} */
1113
1114 /** \addtogroup IfxLld_Multican_Std_Interrupts
1115 * \{ */
1116
1117 /******************************************************************************/
1118 /*-------------------------Global Function Prototypes-------------------------*/
1119 /******************************************************************************/
1120
1121 /** \brief Get the interrupt source register
1122 * \param mcan Specifies the CAN module
1123 * \param srcId Specifies the service request ID
1124 * \return Address of the interrupt source register\n
1125 */
1126 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxMultican_getSrcPointer(Ifx_CAN *mcan, IfxMultican_SrcId srcId);
1127
1128 /** \} */
1129
1130 /******************************************************************************/
1131 /*---------------------Inline Function Implementations------------------------*/
1132 /******************************************************************************/
1133
1134 IFX_INLINE void IfxMultican_Message_init(IfxMultican_Message *msg, uint32 id, uint32 dataLow, uint32 dataHigh, IfxMultican_DataLengthCode lengthCode)
1135 {
1136 msg->id = id;
1137 msg->data[0] = dataLow;
1138 msg->data[1] = dataHigh;
1139 msg->lengthCode = lengthCode;
1140
1141 msg->fastBitRate = FALSE;
1142 }
1143
1144
1145 IFX_INLINE void IfxMultican_Message_longFrameInit(IfxMultican_Message *msg, uint32 id, IfxMultican_DataLengthCode lengthCode, boolean fastBitRate)
1146 {
1147 msg->id = id;
1148 msg->data[0] = 0; /* not being used */
1149 msg->data[1] = 0; /* not being used */
1150 msg->lengthCode = lengthCode;
1151 msg->fastBitRate = fastBitRate;
1152 }
1153
1154
1155 IFX_INLINE void IfxMultican_MsgObj_clearDataRegisters(Ifx_CAN_MO *hwObj)
1156 {
1157 hwObj->DATAL.U = 0;
1158 hwObj->DATAH.U = 0;
1159 }
1160
1161
1162 IFX_INLINE void IfxMultican_MsgObj_clearFifoGatewayPointers(Ifx_CAN_MO *hwObj)
1163 {
1164 hwObj->FGPR.U = 0x0000000U;
1165 }
1166
1167
1168 IFX_INLINE void IfxMultican_MsgObj_clearRxPending(Ifx_CAN_MO *hwObj)
1169 {
1170 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receivePending);
1171 }
1172
1173
1174 IFX_INLINE void IfxMultican_MsgObj_clearTxPending(Ifx_CAN_MO *hwObj)
1175 {
1176 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitPending);
1177 }
1178
1179
1180 IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getBottomObjectPointer(Ifx_CAN_MO *hwObj)
1181 {
1182 return (IfxMultican_MsgObjId)(hwObj->FGPR.B.BOT);
1183 }
1184
1185
1186 IFX_INLINE IfxMultican_DataLengthCode IfxMultican_MsgObj_getDataLengthCode(Ifx_CAN_MO *hwObj)
1187 {
1188 return (IfxMultican_DataLengthCode)(hwObj->FCR.B.DLC);
1189 }
1190
1191
1192 IFX_INLINE uint32 IfxMultican_MsgObj_getMessageId(Ifx_CAN_MO *hwObj)
1193 {
1194 Ifx_CAN_MO_AR ar;
1195 ar.U = hwObj->AR.U;
1196 return ar.B.ID >> ((ar.B.IDE != 0) ? 0 : 18);
1197 }
1198
1199
1200 IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getNextObjectPointer(Ifx_CAN_MO *hwObj)
1201 {
1202 return (IfxMultican_MsgObjId)(hwObj->STAT.B.PNEXT);
1203 }
1204
1205
1206 IFX_INLINE Ifx_CAN_MO *IfxMultican_MsgObj_getPointer(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
1207 {
1208 return &(mcan->MO[msgObjId]);
1209 }
1210
1211
1212 IFX_INLINE boolean IfxMultican_MsgObj_isExtendedFrame(Ifx_CAN_MO *hwObj)
1213 {
1214 return hwObj->AR.B.IDE != 0;
1215 }
1216
1217
1218 IFX_INLINE boolean IfxMultican_MsgObj_isRxPending(Ifx_CAN_MO *hwObj)
1219 {
1220 IfxMultican_MsgObjStat msgStatus = IfxMultican_MsgObj_getStatus(hwObj);
1221 return msgStatus.B.RXPND ? TRUE : FALSE;
1222 }
1223
1224
1225 IFX_INLINE boolean IfxMultican_MsgObj_isTransmitRequested(Ifx_CAN_MO *hwObj)
1226 {
1227 IfxMultican_MsgObjStat msgStatus = IfxMultican_MsgObj_getStatus(hwObj);
1228 return msgStatus.B.TXRQ ? TRUE : FALSE;
1229 }
1230
1231
1232 IFX_INLINE boolean IfxMultican_MsgObj_isTxPending(Ifx_CAN_MO *hwObj)
1233 {
1234 IfxMultican_MsgObjStat msgStatus = IfxMultican_MsgObj_getStatus(hwObj);
1235 return msgStatus.B.TXPND ? TRUE : FALSE;
1236 }
1237
1238
1239 IFX_INLINE void IfxMultican_MsgObj_setAcceptanceMask(Ifx_CAN_MO *hwObj, uint32 mask, boolean extendedFrame)
1240 {
1241 hwObj->AMR.B.AM = mask << ((extendedFrame != 0) ? 0 : 18);
1242 }
1243
1244
1245 IFX_INLINE void IfxMultican_MsgObj_setBitRateSwitch(Ifx_CAN_MO *hwObj, boolean enabled)
1246 {
1247 hwObj->FCR.B.BRS = enabled ? 1 : 0;
1248 }
1249
1250
1251 IFX_INLINE void IfxMultican_MsgObj_setBottomObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
1252 {
1253 hwObj->FGPR.B.BOT = objNumber;
1254 }
1255
1256
1257 IFX_INLINE void IfxMultican_MsgObj_setCurrentObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
1258 {
1259 hwObj->FGPR.B.CUR = objNumber;
1260 }
1261
1262
1263 IFX_INLINE void IfxMultican_MsgObj_setDataCopy(Ifx_CAN_MO *hwObj, boolean enabled)
1264 {
1265 hwObj->FCR.B.DATC = enabled ? 1 : 0;
1266 }
1267
1268
1269 IFX_INLINE void IfxMultican_MsgObj_setDataLengthCode(Ifx_CAN_MO *hwObj, IfxMultican_DataLengthCode code)
1270 {
1271 hwObj->FCR.B.DLC = code;
1272 }
1273
1274
1275 IFX_INLINE void IfxMultican_MsgObj_setDataLengthCodeCopy(Ifx_CAN_MO *hwObj, boolean enabled)
1276 {
1277 hwObj->FCR.B.DLCC = enabled ? 1 : 0;
1278 }
1279
1280
1281 IFX_INLINE void IfxMultican_MsgObj_setExtendedDataLength(Ifx_CAN_MO *hwObj, boolean enabled)
1282 {
1283 hwObj->FCR.B.FDF = enabled ? 1 : 0;
1284 }
1285
1286
1287 IFX_INLINE void IfxMultican_MsgObj_setGatewayDataFrameSend(Ifx_CAN_MO *hwObj, boolean enabled)
1288 {
1289 hwObj->FCR.B.GDFS = enabled ? 1 : 0;
1290 }
1291
1292
1293 IFX_INLINE void IfxMultican_MsgObj_setIdentifierCopy(Ifx_CAN_MO *hwObj, boolean enabled)
1294 {
1295 hwObj->FCR.B.IDC = enabled ? 1 : 0;
1296 }
1297
1298
1299 IFX_INLINE void IfxMultican_MsgObj_setIdentifierExtension(Ifx_CAN_MO *hwObj, boolean extension)
1300 {
1301 hwObj->AR.B.IDE = extension;
1302 }
1303
1304
1305 IFX_INLINE void IfxMultican_MsgObj_setMatchingId(Ifx_CAN_MO *hwObj, boolean matchingId)
1306 {
1307 hwObj->AMR.B.MIDE = matchingId;
1308 }
1309
1310
1311 IFX_INLINE void IfxMultican_MsgObj_setMessageId(Ifx_CAN_MO *hwObj, uint32 messageId, boolean extendedFrame)
1312 {
1313 hwObj->AR.B.ID = messageId << ((extendedFrame != 0) ? 0 : 18);
1314 }
1315
1316
1317 IFX_INLINE void IfxMultican_MsgObj_setMessageMode(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjMode mode)
1318 {
1319 hwObj->FCR.B.MMC = mode;
1320 }
1321
1322
1323 IFX_INLINE void IfxMultican_MsgObj_setMessagePendingNumber(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjId messageNumber)
1324 {
1325 hwObj->IPR.B.MPN = messageNumber;
1326 }
1327
1328
1329 IFX_INLINE void IfxMultican_MsgObj_setOverflowInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
1330 {
1331 hwObj->FCR.B.OVIE = enabled ? 1 : 0;
1332 }
1333
1334
1335 IFX_INLINE void IfxMultican_MsgObj_setPriorityClass(Ifx_CAN_MO *hwObj, IfxMultican_Priority priority)
1336 {
1337 hwObj->AR.B.PRI = priority;
1338 }
1339
1340
1341 IFX_INLINE void IfxMultican_MsgObj_setReceiveInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
1342 {
1343 hwObj->FCR.B.RXIE = enabled ? 1 : 0;
1344 }
1345
1346
1347 IFX_INLINE void IfxMultican_MsgObj_setReceiveInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
1348 {
1349 hwObj->IPR.B.RXINP = srcId;
1350 }
1351
1352
1353 IFX_INLINE void IfxMultican_MsgObj_setRemoteMonitoring(Ifx_CAN_MO *hwObj, boolean enabled)
1354 {
1355 hwObj->FCR.B.RMM = enabled ? 1 : 0;
1356 }
1357
1358
1359 IFX_INLINE void IfxMultican_MsgObj_setSelectObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
1360 {
1361 hwObj->FGPR.B.SEL = objNumber;
1362 }
1363
1364
1365 IFX_INLINE void IfxMultican_MsgObj_setSingleDataTransfer(Ifx_CAN_MO *hwObj, boolean enabled)
1366 {
1367 hwObj->FCR.B.SDT = enabled ? 1 : 0;
1368 }
1369
1370
1371 IFX_INLINE void IfxMultican_MsgObj_setSingleTransmitTrial(Ifx_CAN_MO *hwObj, boolean enabled)
1372 {
1373 hwObj->FCR.B.STT = enabled ? 1 : 0;
1374 }
1375
1376
1377 IFX_INLINE void IfxMultican_MsgObj_setTopObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
1378 {
1379 hwObj->FGPR.B.TOP = objNumber;
1380 }
1381
1382
1383 IFX_INLINE void IfxMultican_MsgObj_setTransmitInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
1384 {
1385 hwObj->FCR.B.TXIE = enabled ? 1 : 0;
1386 }
1387
1388
1389 IFX_INLINE void IfxMultican_MsgObj_setTransmitInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
1390 {
1391 hwObj->IPR.B.TXINP = srcId;
1392 }
1393
1394
1395 IFX_INLINE void IfxMultican_Node_activate(Ifx_CAN_N *hwNode)
1396 {
1397 hwNode->CR.B.INIT = 0;
1398 }
1399
1400
1401 IFX_INLINE void IfxMultican_Node_deactivate(Ifx_CAN_N *hwNode)
1402 {
1403 hwNode->CR.B.INIT = 1;
1404 }
1405
1406
1407 IFX_INLINE void IfxMultican_Node_disableConfigurationChange(Ifx_CAN_N *hwNode)
1408 {
1409 hwNode->CR.B.CCE = 0U;
1410 }
1411
1412
1413 IFX_INLINE void IfxMultican_Node_enableConfigurationChange(Ifx_CAN_N *hwNode)
1414 {
1415 hwNode->CR.B.CCE = 1U;
1416 }
1417
1418
1419 IFX_INLINE Ifx_CAN_N *IfxMultican_Node_getPointer(Ifx_CAN *mcan, IfxMultican_NodeId node)
1420 {
1421 return &(mcan->N[node]);
1422 }
1423
1424
1425 IFX_INLINE void IfxMultican_Node_resetControlRegister(Ifx_CAN_N *hwNode)
1426 {
1427 hwNode->CR.U = 0x00000041U;
1428 }
1429
1430
1431 IFX_INLINE void IfxMultican_Node_resetErrorCounters(Ifx_CAN_N *hwNode)
1432 {
1433 hwNode->ECNT.U = 0x00600000U;
1434 }
1435
1436
1437 IFX_INLINE void IfxMultican_Node_resetInterruptPointers(Ifx_CAN_N *hwNode)
1438 {
1439 hwNode->IPR.U = 0x00000000U;
1440 }
1441
1442
1443 IFX_INLINE void IfxMultican_Node_setAlertInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
1444 {
1445 hwNode->CR.B.ALIE = enabled ? 1 : 0;
1446 }
1447
1448
1449 IFX_INLINE void IfxMultican_Node_setAlertInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
1450 {
1451 hwNode->IPR.B.ALINP = srcId;
1452 }
1453
1454
1455 IFX_INLINE void IfxMultican_Node_setAnalyzerMode(Ifx_CAN_N *hwNode, boolean mode)
1456 {
1457 hwNode->CR.B.CALM = mode != FALSE;
1458 }
1459
1460
1461 IFX_INLINE void IfxMultican_Node_setErrorWarningLevel(Ifx_CAN_N *hwNode, uint8 level)
1462 {
1463 hwNode->ECNT.B.EWRNLVL = level;
1464 }
1465
1466
1467 IFX_INLINE void IfxMultican_Node_setFastNode(Ifx_CAN_N *hwNode, boolean enabled)
1468 {
1469 hwNode->CR.B.INIT = 1;
1470 hwNode->CR.B.FDEN = enabled ? 1 : 0;
1471 hwNode->CR.B.INIT = 0;
1472 }
1473
1474
1475 IFX_INLINE void IfxMultican_Node_setFrameCounterInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
1476 {
1477 hwNode->FCR.B.CFCIE = enabled ? 1 : 0;
1478 }
1479
1480
1481 IFX_INLINE void IfxMultican_Node_setFrameCounterInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
1482 {
1483 hwNode->IPR.B.CFCINP = srcId;
1484 }
1485
1486
1487 IFX_INLINE void IfxMultican_Node_setFrameCounterMode(Ifx_CAN_N *hwNode, IfxMultican_FrameCounterMode mode)
1488 {
1489 hwNode->FCR.B.CFMOD = mode;
1490 }
1491
1492
1493 IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
1494 {
1495 hwNode->CR.B.LECIE = enabled ? 1 : 0;
1496 }
1497
1498
1499 IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
1500 {
1501 hwNode->IPR.B.LECINP = srcId;
1502 }
1503
1504
1505 IFX_INLINE void IfxMultican_Node_setLoopBackMode(Ifx_CAN_N *hwNode, boolean mode)
1506 {
1507 hwNode->PCR.B.LBM = mode != FALSE;
1508 }
1509
1510
1511 IFX_INLINE void IfxMultican_Node_setReceiveErrorCounter(Ifx_CAN_N *hwNode, uint8 value)
1512 {
1513 hwNode->ECNT.B.REC = value;
1514 }
1515
1516
1517 IFX_INLINE void IfxMultican_Node_setTimerEventInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
1518 {
1519 hwNode->IPR.B.TEINP = srcId;
1520 }
1521
1522
1523 IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensation(Ifx_CAN_N *hwNode, boolean enabled)
1524 {
1525 hwNode->TDCR.B.TDC = enabled ? 1 : 0;
1526 }
1527
1528
1529 IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensationOffset(Ifx_CAN_N *hwNode, uint16 value)
1530 {
1531 hwNode->TDCR.B.TDCO = value;
1532 }
1533
1534
1535 IFX_INLINE void IfxMultican_Node_setTransferInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
1536 {
1537 hwNode->CR.B.TRIE = enabled ? 1 : 0;
1538 }
1539
1540
1541 IFX_INLINE void IfxMultican_Node_setTransferInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
1542 {
1543 hwNode->IPR.B.TRINP = srcId;
1544 }
1545
1546
1547 IFX_INLINE void IfxMultican_Node_setTransmitErrorCounter(Ifx_CAN_N *hwNode, uint8 value)
1548 {
1549 hwNode->ECNT.B.TEC = value;
1550 }
1551
1552
1553 IFX_INLINE void IfxMultican_clearMessagePendingSeletor(Ifx_CAN *mcan)
1554 {
1555 mcan->MCR.B.MPSEL = 0x0U;
1556 }
1557
1558
1559 IFX_INLINE void IfxMultican_clearPendingMessageNotification(Ifx_CAN *mcan, uint16 list)
1560 {
1561 mcan->MSPND[list].U = 0x0;
1562 }
1563
1564
1565 IFX_INLINE void IfxMultican_disableModule(Ifx_CAN *mcan)
1566 {
1567 mcan->CLC.B.DISR = 1U;
1568 }
1569
1570
1571 IFX_INLINE void IfxMultican_disableSleepMode(Ifx_CAN *mcan)
1572 {
1573 mcan->CLC.B.EDIS = 1U;
1574 }
1575
1576
1577 IFX_INLINE void IfxMultican_enableModule(Ifx_CAN *mcan)
1578 {
1579 mcan->CLC.B.DISR = 0U;
1580 }
1581
1582
1583 IFX_INLINE void IfxMultican_enableSleepMode(Ifx_CAN *mcan)
1584 {
1585 mcan->CLC.B.EDIS = 0U;
1586 }
1587
1588
1589 IFX_INLINE uint16 IfxMultican_getFractionalDividerMode(Ifx_CAN *mcan)
1590 {
1591 return mcan->FDR.B.DM;
1592 }
1593
1594
1595 IFX_INLINE uint16 IfxMultican_getFractionalDividerStepValue(Ifx_CAN *mcan)
1596 {
1597 return mcan->FDR.B.STEP;
1598 }
1599
1600
1601 IFX_INLINE IfxMultican_ClockSelect IfxMultican_getInputClock(Ifx_CAN *mcan)
1602 {
1603 return (IfxMultican_ClockSelect)mcan->MCR.B.CLKSEL;
1604 }
1605
1606
1607 IFX_INLINE boolean IfxMultican_isModuleEnabled(Ifx_CAN *mcan)
1608 {
1609 return mcan->CLC.B.DISS == 0;
1610 }
1611
1612
1613 IFX_INLINE void IfxMultican_setFractionalDividerMode(Ifx_CAN *mcan, uint16 mode)
1614 {
1615 mcan->FDR.B.DM = mode;
1616 }
1617
1618
1619 IFX_INLINE void IfxMultican_setFractionalDividerStepValue(Ifx_CAN *mcan, uint16 stepValue)
1620 {
1621 mcan->FDR.B.STEP = stepValue;
1622 }
1623
1624
1625 IFX_INLINE void IfxMultican_setInputClock(Ifx_CAN *mcan, IfxMultican_ClockSelect clockSelect)
1626 {
1627 mcan->MCR.B.CLKSEL = clockSelect;
1628 }
1629
1630
1631 IFX_INLINE void IfxMultican_setMessageIndexMask(Ifx_CAN *mcan, uint32 mask)
1632 {
1633 mcan->MSIMASK.U = mask;
1634 }
1635
1636
1637 IFX_INLINE void IfxMultican_setSleepMode(Ifx_CAN *can, IfxMultican_SleepMode mode)
1638 {
1639 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1640 IfxScuWdt_clearCpuEndinit(passwd);
1641 can->CLC.B.EDIS = mode;
1642 IfxScuWdt_setCpuEndinit(passwd);
1643 }
1644
1645
1646 IFX_INLINE void IfxMultican_waitListReady(Ifx_CAN *mcan)
1647 {
1648 while (mcan->PANCTR.B.BUSY != 0)
1649 {}
1650 }
1651
1652
1653 IFX_INLINE boolean IfxMultican_isModuleSuspended(Ifx_CAN *mcan)
1654 {
1655 Ifx_CAN_OCS ocs;
1656
1657 // read the status
1658 ocs.U = mcan->OCS.U;
1659
1660 // return the status
1661 return ocs.B.SUSSTA;
1662 }
1663
1664
1665 IFX_INLINE void IfxMultican_setSuspendMode(Ifx_CAN *mcan, IfxMultican_SuspendMode mode)
1666 {
1667 Ifx_CAN_OCS ocs;
1668
1669 // remove protection and configure the suspend mode.
1670 ocs.B.SUS_P = 1;
1671 ocs.B.SUS = mode;
1672 mcan->OCS.U = ocs.U;
1673 }
1674
1675
1676 IFX_INLINE IfxMultican_DataLengthCode IfxMultican_Node_getCodeFromDataLength(uint32 dataLength)
1677 {
1678 uint32 code;
1679
1680 if (dataLength <= 8)
1681 {
1682 code = dataLength;
1683 }
1684 else if (dataLength <= 24)
1685 {
1686 code = (dataLength >> 2) + 6;
1687 }
1688 else
1689 {
1690 code = (dataLength >> 4) + 11;
1691 }
1692
1693 return (IfxMultican_DataLengthCode)code;
1694 }
1695
1696
1697 IFX_INLINE uint32 IfxMultican_Node_getDataLengthFromCode(IfxMultican_DataLengthCode code)
1698 {
1699 uint32 numBytes;
1700
1701 if (code <= IfxMultican_DataLengthCode_8)
1702 {
1703 numBytes = (uint32)code;
1704 }
1705 else if (code <= IfxMultican_DataLengthCode_24)
1706 {
1707 numBytes = ((uint32)code - 6) << 2;
1708 }
1709 else
1710 {
1711 numBytes = ((uint32)code - 11) << 4;
1712 }
1713
1714 return numBytes;
1715 }
1716
1717
1718 #endif /* IFXMULTICAN_H */
IfxMultican_setFractionalDividerMode
IFX_INLINE void IfxMultican_setFractionalDividerMode(Ifx_CAN *mcan, uint16 mode)
sets the fractional divider mode
Definition: IfxMultican.h:1613
IfxMultican_MsgObjStatusFlag_transmitEnable0
Transmit enable 0 status flag.
Definition: IfxMultican.h:185
IfxMultican_Status_ok
Definition: IfxMultican.h:211
IfxMultican_MsgObj_setOverflowInterrupt
IFX_INLINE void IfxMultican_MsgObj_setOverflowInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable overflow interrupt of a message object.
Definition: IfxMultican.h:1329
IfxMultican_Status_newData
Definition: IfxMultican.h:220
IfxMultican_MsgObjGroup_4
Definition: IfxMultican.h:153
IfxMultican_Status_busOff
Definition: IfxMultican.h:216
IfxMultican_Node_setTransceiverDelayCompensation
IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensation(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the transceiver delay compensation of CAN node x.
Definition: IfxMultican.h:1523
IfxMultican_Node_getPointer
IFX_INLINE Ifx_CAN_N * IfxMultican_Node_getPointer(Ifx_CAN *mcan, IfxMultican_NodeId node)
Returns the base address to a given CAN node number.
Definition: IfxMultican.h:1419
IfxMultican_MsgObj_getMessageId
IFX_INLINE uint32 IfxMultican_MsgObj_getMessageId(Ifx_CAN_MO *hwObj)
Gets message identifier of message object.
Definition: IfxMultican.h:1192
IfxMultican_Node_setLoopBackMode
IFX_INLINE void IfxMultican_Node_setLoopBackMode(Ifx_CAN_N *hwNode, boolean mode)
Enables / Disables the loopback mode of CAN node x.
Definition: IfxMultican.h:1505
IfxMultican_DataLengthCode_1
1 data bytes
Definition: IfxMultican.h:101
IfxMultican_MsgObj_clearRxPending
IFX_INLINE void IfxMultican_MsgObj_clearRxPending(Ifx_CAN_MO *hwObj)
Clear the RX pending flag of a message object.
Definition: IfxMultican.h:1168
IfxMultican_Node_recoverBusOff
IFX_EXTERN IfxMultican_Status IfxMultican_Node_recoverBusOff(Ifx_CAN_N *hwNode)
Recovers the CAN node from bus off.
Definition: IfxMultican.c:640
IfxMultican_MsgObj_setIdentifierExtension
IFX_INLINE void IfxMultican_MsgObj_setIdentifierExtension(Ifx_CAN_MO *hwObj, boolean extension)
Sets identifier extension of message object.
Definition: IfxMultican.h:1299
IfxMultican_MsgObj_getStatus
IFX_EXTERN IfxMultican_MsgObjStat IfxMultican_MsgObj_getStatus(Ifx_CAN_MO *hwObj)
Get the message object status.
Definition: IfxMultican.c:229
IfxMultican_MsgObjStatusFlag_receiveUpdating
Receive updating status flag.
Definition: IfxMultican.h:178
IfxMultican_Message
CAN message definition.
Definition: IfxMultican.h:241
IfxMultican_MsgObj_setExtendedDataLength
IFX_INLINE void IfxMultican_MsgObj_setExtendedDataLength(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable extended data length of a message object.
Definition: IfxMultican.h:1281
IfxMultican_Rxd_In
RXD pin mapping structure.
Definition: IfxMultican_PinMap.h:56
IfxMultican_MsgObj_setSingleDataTransfer
IFX_INLINE void IfxMultican_MsgObj_setSingleDataTransfer(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable single data transfer of a message object.
Definition: IfxMultican.h:1365
IfxMultican_Node_getCodeFromDataLength
IFX_INLINE IfxMultican_DataLengthCode IfxMultican_Node_getCodeFromDataLength(uint32 dataLength)
Return the DLC code corresponding to the data length in byte.
Definition: IfxMultican.h:1676
IfxMultican_MsgObj_setDataLengthCode
IFX_INLINE void IfxMultican_MsgObj_setDataLengthCode(Ifx_CAN_MO *hwObj, IfxMultican_DataLengthCode code)
Sets data length code of a message object.
Definition: IfxMultican.h:1269
IfxMultican_MsgObj_setStatusFlag
IFX_EXTERN void IfxMultican_MsgObj_setStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Sets the selected status flag of a message object.
Definition: IfxMultican.c:598
IfxMultican_setInputClock
IFX_INLINE void IfxMultican_setInputClock(Ifx_CAN *mcan, IfxMultican_ClockSelect clockSelect)
Sets the input clock source.
Definition: IfxMultican.h:1625
IfxMultican_MsgObj_setIdentifierCopy
IFX_INLINE void IfxMultican_MsgObj_setIdentifierCopy(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable identifier copy of a gateway source message object.
Definition: IfxMultican.h:1293
IfxMultican_disableModule
IFX_INLINE void IfxMultican_disableModule(Ifx_CAN *mcan)
Disables the module (sets the disable request)
Definition: IfxMultican.h:1565
IfxMultican_Frame_transmit
Data frame is generated.
Definition: IfxMultican.h:123
IfxMultican_MsgObj_setGatewayDataFrameSend
IFX_INLINE void IfxMultican_MsgObj_setGatewayDataFrameSend(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable gateway data frame send of a gateway source message object which in turn sets the TX...
Definition: IfxMultican.h:1287
IfxMultican_MsgObj_cancelSend
IFX_EXTERN boolean IfxMultican_MsgObj_cancelSend(Ifx_CAN_MO *hwObj)
Cancel pending TX request by invalidating the request, only when frame transmission has not been star...
Definition: IfxMultican.c:72
IfxMultican_MsgObj_setCurrentObjectPointer
IFX_INLINE void IfxMultican_MsgObj_setCurrentObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom current pointer of the base message object.
Definition: IfxMultican.h:1257
IfxMultican_calcTimingFromBTR
IFX_EXTERN void IfxMultican_calcTimingFromBTR(float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth)
Returns the CAN node timing.
Definition: IfxMultican.c:1161
IfxMultican_FrameCounterMode_frameCountMode
The frame counter is incremented upon the reception and transmission of frames.
Definition: IfxMultican.h:133
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxMultican_MsgObj_setTransmitInterrupt
IFX_INLINE void IfxMultican_MsgObj_setTransmitInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable transmit interrupt of a message object.
Definition: IfxMultican.h:1383
IfxMultican_MsgObj_isTransmitRequested
IFX_INLINE boolean IfxMultican_MsgObj_isTransmitRequested(Ifx_CAN_MO *hwObj)
Returns the TX Request flag of a message object.
Definition: IfxMultican.h:1225
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxMultican_MsgObjMode_canFD64
CANFD 64 bytes Message Mode.
Definition: IfxMultican.h:168
IfxMultican_Node_setLastErrorCodeInterruptPointer
IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for an LEC interrupt of CAN Node x...
Definition: IfxMultican.h:1499
float32
float float32
Definition: Platform_Types.h:170
IfxMultican_Message::data
uint32 data[2]
CAN message data.
Definition: IfxMultican.h:245
IfxMultican_MsgObjStatusFlag_messageLost
Message lost status flag.
Definition: IfxMultican.h:180
Ifx_Assert.h
Assert functions.
IfxMultican_Node_activate
IFX_INLINE void IfxMultican_Node_activate(Ifx_CAN_N *hwNode)
Activate the CAN Node. Participate in the CAN bus activities.
Definition: IfxMultican.h:1395
IfxMultican_MsgObjStat::U
unsigned int U
Definition: IfxMultican.h:254
IfxMultican_Node_deinit
IFX_EXTERN void IfxMultican_Node_deinit(Ifx_CAN_N *hwNode)
Reset the CAN node.
Definition: IfxMultican.c:609
IfxMultican_Frame_receive
Data frame is received.
Definition: IfxMultican.h:122
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxMultican_Node_setFastBitTiming
IFX_EXTERN void IfxMultican_Node_setFastBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures FBTR register.
Definition: IfxMultican.c:845
IfxMultican_MsgObj_setMessagePendingNumber
IFX_INLINE void IfxMultican_MsgObj_setMessagePendingNumber(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjId messageNumber)
Sets message pending number that selects the bit position of the bit in the Message Pending Register ...
Definition: IfxMultican.h:1323
IfxMultican_MsgObj_setBitRateSwitch
IFX_INLINE void IfxMultican_MsgObj_setBitRateSwitch(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable bit rate switch of a message object.
Definition: IfxMultican.h:1245
IfxSrc.h
SRC basic functionality.
IfxMultican_Priority_ListOrder
List order.
Definition: IfxMultican.h:194
IfxMultican_SuspendMode_none
No suspend.
Definition: IfxMultican.h:228
IfxMultican_DataLengthCode_6
6 data bytes
Definition: IfxMultican.h:106
IfxMultican_DataLengthCode_12
12 data bytes
Definition: IfxMultican.h:109
IfxMultican_MsgObj_writeTxfifo
IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_writeTxfifo(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message.
Definition: IfxMultican.c:529
IfxCpu_Intrinsics.h
IfxMultican_MsgObjGroup_2
Definition: IfxMultican.h:151
IfxMultican_Node_setAnalyzerMode
IFX_INLINE void IfxMultican_Node_setAnalyzerMode(Ifx_CAN_N *hwNode, boolean mode)
Enables / Disables the analyzer mode of CAN node x.
Definition: IfxMultican.h:1455
IfxMultican_ClockSelect_fErayPll
E-Ray clock.
Definition: IfxMultican.h:92
IfxMultican_MsgObj_setBottomObjectPointer
IFX_INLINE void IfxMultican_MsgObj_setBottomObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom object pointer of the base message object.
Definition: IfxMultican.h:1251
IfxMultican_MsgObj_readMessage
IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_readMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
Read a received CAN message.
Definition: IfxMultican.c:309
IfxMultican_SrcId
IfxMultican_SrcId
Service request ID
Definition: IfxMultican_cfg.h:108
IfxMultican_Message::fastBitRate
boolean fastBitRate
CAN FD fast bit rate enable/disable.
Definition: IfxMultican.h:246
IfxMultican_DataLengthCode_32
32 data bytes
Definition: IfxMultican.h:113
IfxMultican_Node_setErrorWarningLevel
IFX_INLINE void IfxMultican_Node_setErrorWarningLevel(Ifx_CAN_N *hwNode, uint8 level)
Determines the threshold value (warning level, default 96) to be reached in order to set the correspo...
Definition: IfxMultican.h:1461
IfxMultican_MsgObjStatusFlag_transmitEnable1
Transmit enable 1 status flag.
Definition: IfxMultican.h:186
IfxMultican_NodeId
IfxMultican_NodeId
CAN Nodes definition
Definition: IfxMultican_cfg.h:97
IfxMultican_FrameCounterMode_errorCountMode
The frame counter is used for counting when an error frame is received or an error is detected by the...
Definition: IfxMultican.h:139
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxMultican_Node_disableConfigurationChange
IFX_INLINE void IfxMultican_Node_disableConfigurationChange(Ifx_CAN_N *hwNode)
Disables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node.
Definition: IfxMultican.h:1407
IfxMultican_Node_deactivate
IFX_INLINE void IfxMultican_Node_deactivate(Ifx_CAN_N *hwNode)
Deactivate the CAN Node. Take out from participation in the CAN bus activities.
Definition: IfxMultican.h:1401
IfxMultican_MsgObj_sendLongFrame
IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_sendLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Send a CAN Long frame message.
Definition: IfxMultican.c:361
IfxMultican_MsgObj_clearTxPending
IFX_INLINE void IfxMultican_MsgObj_clearTxPending(Ifx_CAN_MO *hwObj)
Clear the TX pending flag of a message object.
Definition: IfxMultican.h:1174
IfxMultican_MsgObj_setReceiveInterrupt
IFX_INLINE void IfxMultican_MsgObj_setReceiveInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable receive interrupt of a message object.
Definition: IfxMultican.h:1341
IfxMultican_Node_initRxPin
IFX_EXTERN boolean IfxMultican_Node_initRxPin(Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin.
Definition: IfxMultican.c:621
IfxMultican_Node_setFrameCounterMode
IFX_INLINE void IfxMultican_Node_setFrameCounterMode(Ifx_CAN_N *hwNode, IfxMultican_FrameCounterMode mode)
Sets the operation mode of the frame counter of the CAN Node x.
Definition: IfxMultican.h:1487
IfxMultican_Node_resetErrorCounters
IFX_INLINE void IfxMultican_Node_resetErrorCounters(Ifx_CAN_N *hwNode)
Resets the error counters of CAN Node x.
Definition: IfxMultican.h:1431
IfxScuWdt.h
SCU basic functionality.
IfxMultican_DataLengthCode_48
48 data bytes
Definition: IfxMultican.h:114
IfxMultican_setSuspendMode
IFX_INLINE void IfxMultican_setSuspendMode(Ifx_CAN *mcan, IfxMultican_SuspendMode mode)
Set the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Su...
Definition: IfxMultican.h:1665
IfxMultican_Status_receiveEmpty
Definition: IfxMultican.h:218
IfxMultican_Status_messageLost
Definition: IfxMultican.h:219
IfxMultican_MsgObj_setRemoteMonitoring
IFX_INLINE void IfxMultican_MsgObj_setRemoteMonitoring(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable transmit object remote monitoring of a message object.
Definition: IfxMultican.h:1353
IfxMultican_Priority
IfxMultican_Priority
CAN priorities.
Definition: IfxMultican.h:192
IfxMultican_MsgObj_getPendingId
IFX_EXTERN IfxMultican_MsgObjId IfxMultican_MsgObj_getPendingId(Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group.
Definition: IfxMultican.c:214
IfxMultican_MsgObj_isTxPending
IFX_INLINE boolean IfxMultican_MsgObj_isTxPending(Ifx_CAN_MO *hwObj)
Returns the TX pending flag of a message object.
Definition: IfxMultican.h:1232
IfxMultican_FrameCounterMode_timeStampMode
The frame counter is used to count bit times.
Definition: IfxMultican.h:135
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxMultican_MsgObjGroup_0
Definition: IfxMultican.h:149
IfxMultican_MsgObj_setMatchingId
IFX_INLINE void IfxMultican_MsgObj_setMatchingId(Ifx_CAN_MO *hwObj, boolean matchingId)
Sets acceptance mask for the message IDE bit.
Definition: IfxMultican.h:1305
IfxMultican_DataLengthCode_2
2 data bytes
Definition: IfxMultican.h:102
IfxMultican_Node_initTxPin
IFX_EXTERN boolean IfxMultican_Node_initTxPin(Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin.
Definition: IfxMultican.c:631
IfxMultican_SleepMode_enable
enables sleep mode
Definition: IfxMultican.h:203
IfxMultican_DataLengthCode_7
7 data bytes
Definition: IfxMultican.h:107
IfxMultican_isModuleSuspended
IFX_INLINE boolean IfxMultican_isModuleSuspended(Ifx_CAN *mcan)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxMultican.h:1653
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxMultican_MsgObjStatusFlag
IfxMultican_MsgObjStatusFlag
CAN Message Object status flag Definition in Ifx_CAN.MOSTATx (x: 0 to max number of msg objs) ...
Definition: IfxMultican.h:174
IfxMultican_MsgObj_clearStatusFlag
IFX_EXTERN void IfxMultican_MsgObj_clearStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Clears the selected status flag of a message object.
Definition: IfxMultican.c:92
IfxMultican_resetModule
IFX_EXTERN void IfxMultican_resetModule(Ifx_CAN *can)
resets Multican kernel
Definition: IfxMultican.c:1226
IfxMultican_Node_enableConfigurationChange
IFX_INLINE void IfxMultican_Node_enableConfigurationChange(Ifx_CAN_N *hwNode)
Enables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node.
Definition: IfxMultican.h:1413
IfxMultican_MsgObjMode_gatewaySource
Gateway Source Object.
Definition: IfxMultican.h:167
IfxMultican_SuspendMode
IfxMultican_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxMultican.h:226
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxMultican_DataLengthCode_20
20 data bytes
Definition: IfxMultican.h:111
IfxMultican_Node_setTransferInterrupt
IFX_INLINE void IfxMultican_Node_setTransferInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the transfer interrupt of CAN node x. This interrupt is generated after the succe...
Definition: IfxMultican.h:1535
IfxMultican_ClockSelect
IfxMultican_ClockSelect
CAN input clock selection.
Definition: IfxMultican.h:87
IfxMultican_MsgObj_readLongFrame
IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_readLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Read a received CAN long frame.
Definition: IfxMultican.c:247
IfxMultican_Message::id
uint32 id
CAN message ID.
Definition: IfxMultican.h:243
IfxMultican_Message::lengthCode
IfxMultican_DataLengthCode lengthCode
CAN message data length code.
Definition: IfxMultican.h:244
IfxMultican_MsgObjMode_transmitFifoBase
Transmit FIFO Base Object.
Definition: IfxMultican.h:165
IfxMultican_ClockSelect_noClock
No clock supplied.
Definition: IfxMultican.h:89
IfxMultican_Node_setFastNode
IFX_INLINE void IfxMultican_Node_setFastNode(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the flexible data rate of CAN node x.
Definition: IfxMultican.h:1467
IfxMultican_DataLengthCode_64
64 data bytes
Definition: IfxMultican.h:115
IfxMultican_MsgObjStatusFlag_messageDirection
Message direction status flag.
Definition: IfxMultican.h:187
IfxMultican_Frame_remoteAnswer
Answer frame is generated on reception of the corresponding remote request.
Definition: IfxMultican.h:125
IfxMultican_Frame_remoteRequest
Remote request frame is generated.
Definition: IfxMultican.h:124
IfxMultican_MsgObj_setMessageId
IFX_INLINE void IfxMultican_MsgObj_setMessageId(Ifx_CAN_MO *hwObj, uint32 messageId, boolean extendedFrame)
Sets message identifier of message object.
Definition: IfxMultican.h:1311
IfxMultican_cfg.h
MULTICAN on-chip implementation data.
IfxMultican_Index
IfxMultican_Index
List of the available multican resource.
Definition: IfxMultican_cfg.h:89
IfxMultican_MsgObjGroup_1
Definition: IfxMultican.h:150
IfxMultican_MsgObj_getDataLengthCode
IFX_INLINE IfxMultican_DataLengthCode IfxMultican_MsgObj_getDataLengthCode(Ifx_CAN_MO *hwObj)
Gets data length code of a message object.
Definition: IfxMultican.h:1186
IfxMultican_Node_getDataLengthFromCode
IFX_INLINE uint32 IfxMultican_Node_getDataLengthFromCode(IfxMultican_DataLengthCode code)
Get the datalength in bytes from DLC.
Definition: IfxMultican.h:1697
IfxMultican_isModuleEnabled
IFX_INLINE boolean IfxMultican_isModuleEnabled(Ifx_CAN *mcan)
Returns the status of module enabled or disabled.
Definition: IfxMultican.h:1607
IfxMultican_MsgObjStatusFlag_newData
New data status flag.
Definition: IfxMultican.h:179
IfxMultican_MsgObjMode_transmitFifoSlave
Transmit FIFO Slave Object.
Definition: IfxMultican.h:166
IfxMultican_MsgObjId
sint32 IfxMultican_MsgObjId
Message object ID, 0 .. IFXMULTICAN_NUM_MESSAGE_OBJECTS.
Definition: IfxMultican.h:77
IfxMultican_MsgObj_setTransmitInterruptNodePointer
IFX_INLINE void IfxMultican_MsgObj_setTransmitInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
Sets transmit interrupt node pointer of message object.
Definition: IfxMultican.h:1389
IfxMultican_MsgObj_isRxPending
IFX_INLINE boolean IfxMultican_MsgObj_isRxPending(Ifx_CAN_MO *hwObj)
Returns the RX pending flag of a message object.
Definition: IfxMultican.h:1218
IfxMultican_enableModule
IFX_INLINE void IfxMultican_enableModule(Ifx_CAN *mcan)
Enables the module (clears the disable request)
Definition: IfxMultican.h:1577
IfxMultican_Node_setAlertInterruptPointer
IFX_INLINE void IfxMultican_Node_setAlertInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for an alert interrupt of CAN Node x...
Definition: IfxMultican.h:1449
IfxMultican_getFractionalDividerStepValue
IFX_INLINE uint16 IfxMultican_getFractionalDividerStepValue(Ifx_CAN *mcan)
Returns the reload or addition value for the result.
Definition: IfxMultican.h:1595
IfxMultican_Status_busHeavy
Definition: IfxMultican.h:215
IfxMultican_setSleepMode
IFX_INLINE void IfxMultican_setSleepMode(Ifx_CAN *can, IfxMultican_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxMultican.h:1637
IfxMultican_MsgObj_clearFifoGatewayPointers
IFX_INLINE void IfxMultican_MsgObj_clearFifoGatewayPointers(Ifx_CAN_MO *hwObj)
Clears the FIFO/GateWay pointers of a message object.
Definition: IfxMultican.h:1162
IfxMultican_MsgObjStatusFlag_messageValid
Message valid status flag.
Definition: IfxMultican.h:181
IfxMultican_SuspendMode_hard
Hard Suspend.
Definition: IfxMultican.h:229
IfxMultican_Txd_Out
TXD pin mapping structure.
Definition: IfxMultican_PinMap.h:65
IfxMultican_ClockSelect_fclc
fMULTICAN
Definition: IfxMultican.h:90
IfxMultican_MsgObj_setAcceptanceMask
IFX_INLINE void IfxMultican_MsgObj_setAcceptanceMask(Ifx_CAN_MO *hwObj, uint32 mask, boolean extendedFrame)
Sets acceptance mask for the message identifier.
Definition: IfxMultican.h:1239
IfxMultican_MsgObjGroup_7
Definition: IfxMultican.h:156
IfxMultican_MsgObj_setReceiveInterruptNodePointer
IFX_INLINE void IfxMultican_MsgObj_setReceiveInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
Sets receive interrupt node pointer of message object.
Definition: IfxMultican.h:1347
IfxMultican_DataLengthCode_0
0 data bytes
Definition: IfxMultican.h:100
IfxMultican_enableSleepMode
IFX_INLINE void IfxMultican_enableSleepMode(Ifx_CAN *mcan)
Enables the sleep mode of the module.
Definition: IfxMultican.h:1583
IfxMultican_getInputClock
IFX_INLINE IfxMultican_ClockSelect IfxMultican_getInputClock(Ifx_CAN *mcan)
Returns the selected input clock source.
Definition: IfxMultican.h:1601
IfxMultican_SleepMode
IfxMultican_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_CAN.CLC.B.EDIS.
Definition: IfxMultican.h:201
IfxMultican_FrameCounterMode
IfxMultican_FrameCounterMode
Determines the operation mode of the frame counter Definition in Ifx_CAN.NFCRx.B.CFMOD, (x= node Id)
Definition: IfxMultican.h:131
IfxMultican_MsgObjGroup
IfxMultican_MsgObjGroup
CAN message object group Each group consists of 32 consecutive message objects.
Definition: IfxMultican.h:147
IfxMultican_Message_longFrameInit
IFX_INLINE void IfxMultican_Message_longFrameInit(IfxMultican_Message *msg, uint32 id, IfxMultican_DataLengthCode lengthCode, boolean fastBitRate)
Initializes a CAN message long frame.
Definition: IfxMultican.h:1145
IfxMultican_MsgObjStatusFlag_transmitPending
Transmit pending status flag.
Definition: IfxMultican.h:177
IfxMultican_waitListReady
IFX_INLINE void IfxMultican_waitListReady(Ifx_CAN *mcan)
Wait until the list panel is ready.
Definition: IfxMultican.h:1646
IfxMultican_FrameCounterMode_bitTimingMode
The frame counter is used for analysis of the bit timing.
Definition: IfxMultican.h:137
IfxMultican_Node_setTransceiverDelayCompensationOffset
IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensationOffset(Ifx_CAN_N *hwNode, uint16 value)
Sets transceiver delay ompensation offset of CAN node x.
Definition: IfxMultican.h:1529
IfxMultican_MsgObjStat::B
Ifx_CAN_MO_STAT_Bits B
Definition: IfxMultican.h:253
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxMultican_MsgObjStat
Message object status bit-fields.
Definition: IfxMultican.h:251
IfxMultican_Message_init
IFX_INLINE void IfxMultican_Message_init(IfxMultican_Message *msg, uint32 id, uint32 dataLow, uint32 dataHigh, IfxMultican_DataLengthCode lengthCode)
Initializes a CAN message.
Definition: IfxMultican.h:1134
IfxMultican_MsgObjGroup_5
Definition: IfxMultican.h:154
IfxMultican_PinMap.h
MULTICAN I/O map.
IfxMultican_MsgObjStatusFlag_receiveEnable
Receive enable status flag.
Definition: IfxMultican.h:183
IfxMultican_deinit
IFX_EXTERN void IfxMultican_deinit(Ifx_CAN *mcan)
Reset the CAN module Reset and disable the CAN module, inclusive message object and node registers...
Definition: IfxMultican.c:1178
IfxMultican_Priority_CAN_ID
CAN ID.
Definition: IfxMultican.h:195
IfxMultican_clearPendingMessageNotification
IFX_INLINE void IfxMultican_clearPendingMessageNotification(Ifx_CAN *mcan, uint16 list)
clears the message pending interrupt notification of a given list
Definition: IfxMultican.h:1559
IfxMultican_Status_notInitialised
Definition: IfxMultican.h:212
IfxMultican_MsgObjGroup_3
Definition: IfxMultican.h:152
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxMultican_MsgObjStatusFlag_receiveTransmitSelected
Receive transmit selected status flag.
Definition: IfxMultican.h:182
IfxMultican_setMessageIndexMask
IFX_INLINE void IfxMultican_setMessageIndexMask(Ifx_CAN *mcan, uint32 mask)
clears the message pending interrupt notification of a given list
Definition: IfxMultican.h:1631
IfxMultican_Status_newDataButOneLost
Definition: IfxMultican.h:221
IfxMultican_MsgObjStatusFlag_transmitRequest
Transmit request status flag.
Definition: IfxMultican.h:184
IfxMultican_DataLengthCode_5
5 data bytes
Definition: IfxMultican.h:105
IfxMultican_Node_setFrameCounterInterrupt
IFX_INLINE void IfxMultican_Node_setFrameCounterInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the CAN frame counter overflow interrupt of CAN node x.
Definition: IfxMultican.h:1475
IfxMultican_SuspendMode_soft
Soft Suspend.
Definition: IfxMultican.h:230
IfxMultican_Node_resetControlRegister
IFX_INLINE void IfxMultican_Node_resetControlRegister(Ifx_CAN_N *hwNode)
Resets the control register of CAN Node x.
Definition: IfxMultican.h:1425
IfxMultican_MsgObj_setSingleTransmitTrial
IFX_INLINE void IfxMultican_MsgObj_setSingleTransmitTrial(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable single transmit trial of a message object.
Definition: IfxMultican.h:1371
IfxMultican_getIndex
IFX_EXTERN IfxMultican_Index IfxMultican_getIndex(Ifx_CAN *multican)
API to get the resource index of the CAN specified.
Definition: IfxMultican.c:1260
IfxMultican_MsgObjGroup_6
Definition: IfxMultican.h:155
IfxMultican_setListCommand
IFX_EXTERN void IfxMultican_setListCommand(Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1)
Execute a command from the command panel.
Definition: IfxMultican.c:1245
IfxMultican_getFractionalDividerMode
IFX_INLINE uint16 IfxMultican_getFractionalDividerMode(Ifx_CAN *mcan)
Returns the selected fractional divider mode.
Definition: IfxMultican.h:1589
IfxMultican_DataLengthCode_8
8 data bytes
Definition: IfxMultican.h:108
IfxMultican_Status_notSentBusy
Definition: IfxMultican.h:217
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxMultican_ClockSelect_fosc0
Oscillator Clock.
Definition: IfxMultican.h:91
sint32
long sint32
Definition: Platform_Types.h:134
IfxMultican_setFractionalDividerStepValue
IFX_INLINE void IfxMultican_setFractionalDividerStepValue(Ifx_CAN *mcan, uint16 stepValue)
sets reload or addition value for the result.
Definition: IfxMultican.h:1619
IfxMultican_MsgObjMode
IfxMultican_MsgObjMode
CAN Message Object Mode.
Definition: IfxMultican.h:161
IfxMultican_MsgObj_setFilter
IFX_EXTERN void IfxMultican_MsgObj_setFilter(Ifx_CAN_MO *hwObj, boolean extend, uint32 id, uint32 accMask)
Set message object filter.
Definition: IfxMultican.c:581
IfxMultican_DataLengthCode
IfxMultican_DataLengthCode
CAN frame data length code Definition in Ifx_CAN.MOFCRx.DLC.
Definition: IfxMultican.h:98
IfxMultican_Node_setTransferInterruptPointer
IFX_INLINE void IfxMultican_Node_setTransferInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a transfer OK interrupt of CAN Node x...
Definition: IfxMultican.h:1541
IfxMultican_getAddress
IFX_EXTERN Ifx_CAN * IfxMultican_getAddress(IfxMultican_Index multican)
Definition: IfxMultican.c:1280
IfxMultican_getSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxMultican_getSrcPointer(Ifx_CAN *mcan, IfxMultican_SrcId srcId)
Get the interrupt source register.
Definition: IfxMultican.c:1220
IfxMultican_MsgObjMode_standard
Standard Message Object.
Definition: IfxMultican.h:163
IfxMultican_MsgObj_getPointer
IFX_INLINE Ifx_CAN_MO * IfxMultican_MsgObj_getPointer(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Get base address of a message object register.
Definition: IfxMultican.h:1206
IfxMultican_MsgObj_deinit
IFX_EXTERN void IfxMultican_MsgObj_deinit(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Reset the message object Append the message object to the end of idle list and reset message object r...
Definition: IfxMultican.c:102
IfxMultican_Status
IfxMultican_Status
CAN API status definition.
Definition: IfxMultican.h:209
IfxMultican_MsgObj_setPriorityClass
IFX_INLINE void IfxMultican_MsgObj_setPriorityClass(Ifx_CAN_MO *hwObj, IfxMultican_Priority priority)
Sets priority class of message object.
Definition: IfxMultican.h:1335
IfxMultican_Status_wrongParam
Definition: IfxMultican.h:213
IfxMultican_clearMessagePendingSeletor
IFX_INLINE void IfxMultican_clearMessagePendingSeletor(Ifx_CAN *mcan)
clears the message pending interrupt notification of a given list
Definition: IfxMultican.h:1553
IfxMultican_Node_setReceiveErrorCounter
IFX_INLINE void IfxMultican_Node_setReceiveErrorCounter(Ifx_CAN_N *hwNode, uint8 value)
Sets the value of the receive error counter of CAN node x.
Definition: IfxMultican.h:1511
IfxMultican_MsgObj_getBottomObjectPointer
IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getBottomObjectPointer(Ifx_CAN_MO *hwObj)
Gets bottom object pointer of the base message object.
Definition: IfxMultican.h:1180
IfxMultican_MsgObj_clearDataRegisters
IFX_INLINE void IfxMultican_MsgObj_clearDataRegisters(Ifx_CAN_MO *hwObj)
Sets priority class of message object.
Definition: IfxMultican.h:1155
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxMultican_MsgObjMode_receiveFifoBase
Receive FIFO Base Object.
Definition: IfxMultican.h:164
IfxMultican_Status_wrongPin
Definition: IfxMultican.h:214
IfxMultican_Node_setTransmitErrorCounter
IFX_INLINE void IfxMultican_Node_setTransmitErrorCounter(Ifx_CAN_N *hwNode, uint8 value)
Sets the value of the transmit error counter of CAN node x.
Definition: IfxMultican.h:1547
IfxMultican_DataLengthCode_16
16 data bytes
Definition: IfxMultican.h:110
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxMultican_disableSleepMode
IFX_INLINE void IfxMultican_disableSleepMode(Ifx_CAN *mcan)
Disregards the sleep mode of the module.
Definition: IfxMultican.h:1571
IfxMultican_Frame
IfxMultican_Frame
CAN frame type.
Definition: IfxMultican.h:120
IfxMultican_Node_setTimerEventInterruptPointer
IFX_INLINE void IfxMultican_Node_setTimerEventInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a timer event interrupt of CAN Node x...
Definition: IfxMultican.h:1517
IfxMultican_DataLengthCode_3
3 data bytes
Definition: IfxMultican.h:103
IfxMultican_MsgObj_sendMessage
IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_sendMessage(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message.
Definition: IfxMultican.c:481
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxMultican_Node_setNominalBitTiming
IFX_EXTERN void IfxMultican_Node_setNominalBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTEVR register.
Definition: IfxMultican.c:1002
IfxMultican_Node_resetInterruptPointers
IFX_INLINE void IfxMultican_Node_resetInterruptPointers(Ifx_CAN_N *hwNode)
Resets the interrupt pointers of CAN Node x.
Definition: IfxMultican.h:1437
IfxMultican_DataLengthCode_4
4 data bytes
Definition: IfxMultican.h:104
IfxMultican_MsgObj_setDataLengthCodeCopy
IFX_INLINE void IfxMultican_MsgObj_setDataLengthCodeCopy(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable data length code copy of a gateway source message object.
Definition: IfxMultican.h:1275
IfxMultican_MsgObj_setDataCopy
IFX_INLINE void IfxMultican_MsgObj_setDataCopy(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable data copy of a gateway source message object.
Definition: IfxMultican.h:1263
IfxMultican_MsgObj_setSelectObjectPointer
IFX_INLINE void IfxMultican_MsgObj_setSelectObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom object select pointer of the base message object.
Definition: IfxMultican.h:1359
IfxMultican_DataLengthCode_24
24 data bytes
Definition: IfxMultican.h:112
IfxMultican_MsgObj_isExtendedFrame
IFX_INLINE boolean IfxMultican_MsgObj_isExtendedFrame(Ifx_CAN_MO *hwObj)
Get the message object status.
Definition: IfxMultican.h:1212
IfxMultican_MsgObjStatusFlag_receivePending
Receive pending status flag.
Definition: IfxMultican.h:176
IfxMultican_Node_setBitTiming
IFX_EXTERN void IfxMultican_Node_setBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTR register.
Definition: IfxMultican.c:685
IfxMultican_MsgObj_getStatusFlag
IFX_EXTERN boolean IfxMultican_MsgObj_getStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Gets the status of the selected status flag of a message object.
Definition: IfxMultican.c:239
IfxMultican_Node_setLastErrorCodeInterrupt
IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the last error code interrupt of CAN node x. This interrupt is generated with eac...
Definition: IfxMultican.h:1493
IfxMultican_Node_setAlertInterrupt
IFX_INLINE void IfxMultican_Node_setAlertInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the alert interrupt of CAN node x.
Definition: IfxMultican.h:1443
IfxMultican_MsgObj_getNextObjectPointer
IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getNextObjectPointer(Ifx_CAN_MO *hwObj)
Returns next object pointer (PNEXT) of the current message object.
Definition: IfxMultican.h:1200
IfxMultican_MsgObj_setTopObjectPointer
IFX_INLINE void IfxMultican_MsgObj_setTopObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets top object pointer of the base message object.
Definition: IfxMultican.h:1377
IfxMultican_MsgObj_setMessageMode
IFX_INLINE void IfxMultican_MsgObj_setMessageMode(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjMode mode)
Sets the message mode of a message object.
Definition: IfxMultican.h:1317
IfxMultican_SleepMode_disable
disables sleep mode
Definition: IfxMultican.h:204
IfxMultican_Node_setFrameCounterInterruptPointer
IFX_INLINE void IfxMultican_Node_setFrameCounterInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a frame counter overflow interrupt of CAN Nod...
Definition: IfxMultican.h:1481


iLLD_TC26B: IfxMultican_Can.c Source File

  • Multican
  • Can
IfxMultican_Can.c
Go to the documentation of this file.
1 /**
2 * \file IfxMultican_Can.c
3 * \brief MULTICAN CAN details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxMultican_Can.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 void IfxMultican_Can_MsgObj_getConfig(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Can_MsgObjConfig *config)
53 {
54 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
55
56 Ifx_CAN_MO_AR ar;
57 Ifx_CAN_MO_AMR amr;
58 Ifx_CAN_MO_FCR fcr;
59
60 ar.U = hwObj->AR.U;
61 amr.U = hwObj->AMR.U;
62 fcr.U = hwObj->FCR.U;
63
64 config->frame = (hwObj->STAT.B.DIR != 0) ? IfxMultican_Frame_transmit : IfxMultican_Frame_receive;
65
66 config->control.singleDataTransfer = fcr.B.SDT;
67 config->control.messageLen = (IfxMultican_DataLengthCode)fcr.B.DLC;
68 config->control.extendedFrame = ar.B.IDE;
69 config->control.matchingId = amr.B.MIDE;
70
71 config->messageId = ar.B.ID >> ((config->control.extendedFrame != 0) ? 0 : 18);
72 config->priority = (IfxMultican_Priority)ar.B.PRI;
73 config->acceptanceMask = amr.B.AM >> ((config->control.extendedFrame != 0) ? 0 : 18);
74 config->control.singleTransmitTrial = fcr.B.STT;
75 }
76
77
78 IfxMultican_Status IfxMultican_Can_MsgObj_init(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Can_MsgObjConfig *config)
79 {
80 msgObj->node = config->node;
81 msgObj->msgObjId = config->msgObjId;
82 msgObj->msgObjCount = config->msgObjCount;
83 msgObj->fifoPointer = 0;
84
85 Ifx_CAN *mcanSFR = msgObj->node->mcan;
86
87 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(mcanSFR, msgObj->msgObjId);
88
89 IfxMultican_Status status = IfxMultican_Status_ok;
90
91 boolean longFrame = (config->control.messageLen > IfxMultican_DataLengthCode_8) ? TRUE : FALSE;
92
93 /* check for the receive frame */
94 boolean receiveFrame = (config->frame == IfxMultican_Frame_receive) ||
95 (config->frame == IfxMultican_Frame_remoteAnswer) ||
96 (config->frame == IfxMultican_Frame_remoteRequest);
97
98 /* check for the transmit frame */
99 boolean transmitFrame = ((config->frame == IfxMultican_Frame_transmit) ||
100 (config->frame == IfxMultican_Frame_remoteAnswer) ||
101 (config->frame == IfxMultican_Frame_remoteRequest)) &&
102 (config->gatewayTransfers != 1);
103
104 /* check for gateway source object */
105 boolean gatewaySourceObj = (config->gatewayTransfers != 0) ? TRUE : FALSE;
106
107 /* check for the receive FIFO and trabsmit FIFO */
108 boolean receiveFifo = FALSE, transmitFifo = FALSE;
109
110 if (config->gatewayTransfers != 1)
111 {
112 receiveFifo = (config->msgObjCount > 1) && (receiveFrame);
113 transmitFifo = (config->msgObjCount > 1) && (transmitFrame);
114 }
115
116 /* check for the gateway FIFO */
117 boolean gatewayFifo = (config->msgObjCount > 1) && (gatewaySourceObj);
118
119 /* will be used for Fifo slave objects */
120 IfxMultican_MsgObjId objId, firstSlaveObjId, lastSlaveObjId, gatewayDstObjId = 0;
121
122 /* select the first slave object */
123 if (!config->firstSlaveObjId)
124 { // if not selected
125 firstSlaveObjId = config->msgObjId + 1;
126 }
127 else
128 {
129 firstSlaveObjId = config->firstSlaveObjId;
130 }
131
132 /* select the last slave object */
133 lastSlaveObjId = firstSlaveObjId + (config->msgObjCount - 1);
134
135 uint32 i;
136
137 /* for standard and FIFO (Tx & Rx) base objects */
138 {
139 /* MSGVAL: Set message as not valid */
140 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
141
142 /* reset RXPND */
143 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receivePending);
144
145 /* reset TXPND */
146 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitPending);
147
148 /* reset RXUPD */
149 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveUpdating);
150
151 /* reset NEWDAT */
152 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
153
154 /* reset MSGLST */
155 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageLost);
156
157 /* reset RTSEL */
158 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveTransmitSelected);
159
160 /* reset RXPND */
161 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitRequest);
162
163 /* Configuration of the CAN Message Object List Structure */
164 /* Allocate MO for the node associated list */
165 {
166 /* for standard, gateway and FIFO (Tx & Rx) base objects */
167 /* Append message object to the end of the list */
168 IfxMultican_setListCommand(mcanSFR, 0x2, msgObj->node->nodeId + 1, msgObj->msgObjId);
169
170 /* long frame CAN FD */
171 if (longFrame)
172 {
173 /* Allocate MO with extended Data fields slected by FGPR.B.TOP and FGPR.B.BOT, for the unallocated list (0) */
174 /* Append message object to the end of the list(0) */
175 IfxMultican_setListCommand(mcanSFR, 0x2, 0, config->control.topMsgObjId);
176 IfxMultican_setListCommand(mcanSFR, 0x2, 0, config->control.bottomMsgObjId);
177 }
178
179 /* for all standard FIFO (Tx and Rx) and gateway FIFO slave objects */
180 if (config->msgObjCount > 1)
181 {
182 for (i = 0; i < config->msgObjCount; i++)
183 {
184 objId = firstSlaveObjId + i;
185
186 IfxMultican_setListCommand(mcanSFR, 0x2, msgObj->node->nodeId + 1, objId);
187 }
188 }
189 }
190
191 if ((config->frame == IfxMultican_Frame_receive) || (config->frame == IfxMultican_Frame_remoteAnswer))
192 {
193 /* set RXEN, in case of recieve frame or remote answer*/
194 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveEnable);
195 }
196
197 /* in case of transmit frame */
198 if ((transmitFrame) && (config->gatewayTransfers != 1))
199 {
200 /* set TXEN0 */
201 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitEnable0);
202
203 /* set TXEN1 */
204 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitEnable1);
205
206 /* reset RTSEL */
207 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveTransmitSelected);
208
209 /* MSGVAL: Set message as valid */
210 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
211 }
212
213 if (((config->frame == IfxMultican_Frame_transmit) || (config->frame == IfxMultican_Frame_remoteAnswer)) && (config->gatewayTransfers != 1))
214 {
215 /* set DIR, in case of transmit frame or remote answer*/
216 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageDirection);
217 }
218 else
219 {
220 /* clear DIR, in case of receive frame or gateway transfers*/
221 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageDirection);
222 }
223 }
224 {
225 /* for standard message object */
226 if (config->msgObjCount == 1)
227 {
228 /* gateway transfers */
229 if (gatewaySourceObj)
230 {
231 /* select Gateway Source mode for FCR.MMC */
232 IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_gatewaySource);
233
234 /* select the gateway destination object as the next object if not selected */
235 if (!config->gatewayConfig.gatewayDstObjId)
236 {
237 gatewayDstObjId = msgObj->msgObjId + 1;
238 }
239 else
240 {
241 gatewayDstObjId = config->gatewayConfig.gatewayDstObjId;
242 }
243 }
244 /* long frame CAN FD */
245 /* FDEN = 1, EDL = 1 and BRS = 0/1 */
246 else if (config->node->fastNode && longFrame)
247 {
248 /* select CAN FD object mode for FCR.MMC */
249 IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_canFD64);
250 }
251 /* standard frame */
252 /* FDEN = 0/1, EDL = 0 and BRS = 0 (BRS = 1 also has no effect here) */
253 else
254 {
255 /* select standard object for FCR.MMC */
256 IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_standard);
257 }
258 }
259 /* for receive FIFO base object */
260 else if (receiveFifo)
261 {
262 /* select receive FIFO base object for FCR.MMC */
263 IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_receiveFifoBase);
264 }
265 /* for transmit FIFO base object */
266 else if (transmitFifo)
267 {
268 /* select transmit FIFO base object for FCR.MMC */
269 IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_transmitFifoBase);
270 }
271 /* for gateway FIFO source object */
272 else if (gatewayFifo)
273 {
274 /* select transmit Gateway Source for FCR.MMC */
275 IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_gatewaySource);
276 }
277 else
278 {}
279
280 /* for standard and FIFO (Tx & Rx) base objects */
281 /* enable receive interrupt FCR.RXIE if choosen in case of receive frame */
282 boolean receiveInterruptEnabled = (config->rxInterrupt.enabled) && (receiveFrame);
283 IfxMultican_MsgObj_setReceiveInterrupt(hwObj, receiveInterruptEnabled);
284
285 /* enable transmit interrupt FCR.TXIE if choosen in case of transmit frame */
286 boolean transmitInterruptEnabled = (config->txInterrupt.enabled) && (transmitFrame);
287 IfxMultican_MsgObj_setTransmitInterrupt(hwObj, transmitInterruptEnabled);
288
289 /* set FCR.RMM in case of remote answer */
290 boolean remoteMonitoringEnabled = (config->frame == IfxMultican_Frame_remoteAnswer);
291 IfxMultican_MsgObj_setRemoteMonitoring(hwObj, remoteMonitoringEnabled);
292
293 /* long frame CAN FD */
294 /* FDEN = 1, EDL = 1 and BRS = 0/1 */
295 /* in case of recieve Msg Obj, it recieves long and long+fast frames */
296 if (config->node->fastNode && longFrame)
297 {
298 /* enable extended data length */
299 IfxMultican_MsgObj_setExtendedDataLength(hwObj, TRUE);
300
301 /* set data length code FCR.DLC */
302 IfxMultican_MsgObj_setDataLengthCode(hwObj, config->control.messageLen);
303
304 /* set bit rate switch (fast bit rate enable/disable) */
305 IfxMultican_MsgObj_setBitRateSwitch(hwObj, config->control.fastBitRate);
306 }
307 /* standard frame */
308 /* FDEN = 0/1, EDL = 0 and BRS = 0 (BRS = 1 also has no effect here) */
309 /* in case of recieve Msg Obj, it recieves only standard frames */
310 else
311 {
312 /* set data length code FCR.DLC */
313 IfxMultican_MsgObj_setDataLengthCode(hwObj, config->control.messageLen);
314 }
315
316 /* only for standard message object */
317 if ((config->msgObjCount == 1) && (!gatewaySourceObj))
318 {
319 /* set single transmit trial FCR.STT if choosen */
320 IfxMultican_MsgObj_setSingleTransmitTrial(hwObj, config->control.singleTransmitTrial);
321
322 /* set single data transfer FCR.SDT if choosen */
323 IfxMultican_MsgObj_setSingleDataTransfer(hwObj, config->control.singleDataTransfer);
324 }
325 /* for FIFO (Tx or Rx) base object and gateway objects*/
326 else
327 {
328 /* clear single transmit trial FCR.STT */
329 IfxMultican_MsgObj_setSingleTransmitTrial(hwObj, FALSE);
330
331 /* clear single data transfer FCR.SDT */
332 IfxMultican_MsgObj_setSingleDataTransfer(hwObj, FALSE);
333 }
334 }
335
336 {
337 /* for standard message object */
338 if (config->msgObjCount == 1)
339 {
340 /* long frame CAN FD */
341 if (longFrame)
342 {
343 /* set bottom pointer FGPR.BOT */
344 IfxMultican_MsgObj_setBottomObjectPointer(hwObj, config->control.bottomMsgObjId);
345
346 /* set top pointer FGPR.TOP */
347 IfxMultican_MsgObj_setTopObjectPointer(hwObj, config->control.topMsgObjId);
348 }
349 /* standard gateway transfers */
350 else if (gatewaySourceObj)
351 {
352 /* set (current pointer) FGPR.CUR, to gateway destination object */
353 IfxMultican_MsgObj_setCurrentObjectPointer(hwObj, gatewayDstObjId);
354 }
355 /* standard frame */
356 else
357 {
358 /* clear all pointers */
359 IfxMultican_MsgObj_clearFifoGatewayPointers(hwObj);
360 }
361 }
362
363 /* for FIFO (Tx or Rx) base object and gateway FIFO object */
364 else
365 {
366 /* set bottom pointer FGPR.BOT, to the next message object (first FIFO slave object) */
367 IfxMultican_MsgObj_setBottomObjectPointer(hwObj, firstSlaveObjId);
368
369 /* store the first slave object Id as the fifoPointer in msgObj structure for FIFO transfers */
370 msgObj->fifoPointer = firstSlaveObjId;
371
372 /* set top pointer FGPR.TOP, to the last FIFO slave object */
373 IfxMultican_MsgObj_setTopObjectPointer(hwObj, lastSlaveObjId);
374
375 /* set start of FIFO (current pointer) FGPR.CUR, to first FIFO slave object (bottom pointer) */
376 IfxMultican_MsgObj_setCurrentObjectPointer(hwObj, firstSlaveObjId);
377
378 if (receiveFifo || transmitFifo)
379 {
380 /* set select object pointer FGPR.SEL to one object before last FIFO slave object */
381 IfxMultican_MsgObj_setSelectObjectPointer(hwObj, lastSlaveObjId - 1);
382 }
383 }
384 }
385
386 {
387 /* for standard, gateway and FIFO (Tx & Rx) base objects */
388 /* set the given acceptance mask */
389 IfxMultican_MsgObj_setAcceptanceMask(hwObj, config->acceptanceMask, config->control.extendedFrame);
390
391 /* enable matching ID if choosen */
392 IfxMultican_MsgObj_setMatchingId(hwObj, config->control.matchingId);
393 }
394
395 {
396 /* for standard, gateway and FIFO (Tx & Rx) base objects */
397 /* set message ID */
398 IfxMultican_MsgObj_setMessageId(hwObj, config->messageId, config->control.extendedFrame);
399
400 /* set identifier extension if extended frame is choosen */
401 IfxMultican_MsgObj_setIdentifierExtension(hwObj, config->control.extendedFrame);
402
403 /* set filtering priority */
404 IfxMultican_MsgObj_setPriorityClass(hwObj, config->priority);
405 }
406
407 /* for standard, gateway and FIFO (Tx & Rx) base objects */
408 /* clear both data registers DATAL and DATAH */
409 IfxMultican_MsgObj_clearDataRegisters(hwObj);
410
411 {
412 /* for standard, gateway and FIFO (Tx & Rx) base objects */
413 /* select IPR.RXINP */
414 IfxMultican_MsgObj_setReceiveInterruptNodePointer(hwObj, config->rxInterrupt.srcId);
415
416 /* select IPR.TXINP */
417 IfxMultican_MsgObj_setTransmitInterruptNodePointer(hwObj, config->txInterrupt.srcId);
418
419 /* set IPR.MNP */
420 IfxMultican_MsgObj_setMessagePendingNumber(hwObj, msgObj->msgObjId);
421 }
422
423 /* for each receive FIFO slave object */
424 if (receiveFifo)
425 {
426 for (i = 0; i < config->msgObjCount; i++)
427 {
428 objId = firstSlaveObjId + i; /* increment the message object ID */
429
430 Ifx_CAN_MO *hwSlaveObj = IfxMultican_MsgObj_getPointer(mcanSFR, objId);
431
432 /* clear all RXEN flag */
433 IfxMultican_MsgObj_clearStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_receiveEnable);
434
435 /* set data length code */
436 IfxMultican_MsgObj_setDataLengthCode(hwSlaveObj, config->control.messageLen);
437
438 /* clear DATAL and DATAH registers */
439 IfxMultican_MsgObj_clearDataRegisters(hwSlaveObj);
440 }
441 }
442
443 /* for each transmit FIFO slave object */
444 if (transmitFifo)
445 {
446 /* configure each transmit FIFO slave object as an independent transmit object */
447 for (i = 0; i < config->msgObjCount; i++)
448 {
449 objId = firstSlaveObjId + i; /* increment the message object ID */
450
451 Ifx_CAN_MO *hwSlaveObj = IfxMultican_MsgObj_getPointer(mcanSFR, objId);
452
453 /* set message mode as transmit FIFO slave mode */
454 IfxMultican_MsgObj_setMessageMode(hwSlaveObj, IfxMultican_MsgObjMode_transmitFifoSlave);
455
456 /* point current pointer(FGPR.CUR) back to the base FIFO object */
457 IfxMultican_MsgObj_setCurrentObjectPointer(hwSlaveObj, msgObj->msgObjId);
458
459 /* set data length code */
460 IfxMultican_MsgObj_setDataLengthCode(hwSlaveObj, config->control.messageLen);
461
462 /* clear DATAL and DATAH registers */
463 IfxMultican_MsgObj_clearDataRegisters(hwSlaveObj);
464
465 /* set the given acceptance mask */
466 IfxMultican_MsgObj_setAcceptanceMask(hwSlaveObj, config->acceptanceMask, config->control.extendedFrame);
467
468 /* enable matching ID if choosen */
469 IfxMultican_MsgObj_setMatchingId(hwSlaveObj, config->control.matchingId);
470
471 /* set message ID */
472 IfxMultican_MsgObj_setMessageId(hwSlaveObj, config->messageId, config->control.extendedFrame);
473
474 /* set identifier extension if extended frame is choosen */
475 IfxMultican_MsgObj_setIdentifierExtension(hwSlaveObj, config->control.extendedFrame);
476
477 /* set filtering priority */
478 IfxMultican_MsgObj_setPriorityClass(hwSlaveObj, config->priority);
479
480 /* set TXEN0 */
481 IfxMultican_MsgObj_setStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_transmitEnable0);
482
483 /* MSGVAL: Set message as valid */
484 IfxMultican_MsgObj_setStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_messageValid);
485
486 /* clear all TXEN1 flags expect for the slave object in the FGPR.CUR of the base FIFO object */
487 if (objId == firstSlaveObjId)
488 {
489 IfxMultican_MsgObj_setStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_transmitEnable1);
490 }
491 else
492 {
493 IfxMultican_MsgObj_clearStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_transmitEnable1);
494 }
495
496 /* set DIR, in case of transmit frame or remote answer*/
497 if ((config->frame == IfxMultican_Frame_transmit) || (config->frame == IfxMultican_Frame_remoteAnswer))
498 {
499 IfxMultican_MsgObj_setStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_messageDirection);
500 }
501 }
502 }
503
504 /* for standard and receive FIFO base objects */
505 if (config->frame == IfxMultican_Frame_receive)
506 {
507 /* set RTSEL */
508 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveTransmitSelected);
509
510 /* MSGVAL: Set message as valid */
511 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
512 }
513
514 /* for each receive FIFO slave object */
515 if (config->msgObjCount > 1)
516 {
517 IfxMultican_MsgObjId nextFifoObj;
518
519 for (i = 0; i < config->msgObjCount; i++)
520 {
521 objId = firstSlaveObjId + i;
522
523 Ifx_CAN_MO *hwSlaveObj = IfxMultican_MsgObj_getPointer(mcanSFR, objId);
524
525 /* for receive FIFO and gateway FIFO */
526 if (!transmitFifo)
527 {
528 /* MSGVAL: Set message as valid */
529 IfxMultican_MsgObj_setStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_messageValid);
530 }
531
532 /* for transmit FIFO and receive FIFO */
533 if (!gatewayFifo)
534 {
535 /* store the next FIFO object number in the bottom pointer (FGPR.BOT) of the current FIFO object (for ease of use in transfers)*/
536 /* if it is the last FIFO object */
537 if (i == (config->msgObjCount - 1))
538 { /* wrap around the FIFO by making the next pointer of last object as the first FIFO object */
539 nextFifoObj = firstSlaveObjId;
540 }
541 else
542 {
543 nextFifoObj = objId + 1;
544 }
545
546 IfxMultican_MsgObj_setBottomObjectPointer(hwSlaveObj, nextFifoObj);
547 }
548 }
549 }
550
551 if (gatewaySourceObj)
552 {
553 /* set FCR.DLCC if chosen*/
554 IfxMultican_MsgObj_setDataLengthCodeCopy(hwObj, config->gatewayConfig.copyDataLengthCode);
555
556 /* set FCR.DATC if chosen*/
557 IfxMultican_MsgObj_setDataCopy(hwObj, config->gatewayConfig.copyData);
558
559 /* set FCR.IDC if chosen*/
560 IfxMultican_MsgObj_setIdentifierCopy(hwObj, config->gatewayConfig.copyId);
561
562 /* set FCR.GDFS if chosen*/
563 IfxMultican_MsgObj_setGatewayDataFrameSend(hwObj, config->gatewayConfig.enableTransmit);
564 }
565
566 return status;
567 }
568
569
570 void IfxMultican_Can_MsgObj_initConfig(IfxMultican_Can_MsgObjConfig *config, IfxMultican_Can_Node *node)
571 {
572 // @$GENTABLE(MsgObjConfig,defaultConfig);
573
574 config->node = node;
575 config->msgObjId = 0;
576 config->msgObjCount = 1;
577
578 config->control.messageLen = IfxMultican_DataLengthCode_8;
579
580 config->control.topMsgObjId = 252;
581 config->control.bottomMsgObjId = 253;
582 config->control.fastBitRate = FALSE; /* fast bit rate enable/disable */
583
584 config->control.extendedFrame = FALSE;
585 config->control.matchingId = FALSE;
586 config->control.singleDataTransfer = FALSE;
587 config->control.singleTransmitTrial = FALSE;
588 config->acceptanceMask = 0x7FFFFFFFUL;
589 config->messageId = 0;
590
591 config->frame = IfxMultican_Frame_receive;
592 config->priority = IfxMultican_Priority_CAN_ID;
593 config->rxInterrupt.enabled = FALSE;
594 config->rxInterrupt.srcId = IfxMultican_SrcId_0;
595 config->txInterrupt.enabled = FALSE;
596 config->txInterrupt.srcId = IfxMultican_SrcId_0;
597
598 config->firstSlaveObjId = 0;
599
600 config->gatewayTransfers = FALSE;
601 config->gatewayConfig.copyDataLengthCode = TRUE;
602 config->gatewayConfig.copyData = TRUE;
603 config->gatewayConfig.copyId = TRUE;
604 config->gatewayConfig.enableTransmit = TRUE;
605 config->gatewayConfig.gatewayDstObjId = 0;
606 }
607
608
609 boolean IfxMultican_Can_MsgObj_isRxPending(IfxMultican_Can_MsgObj *msgObj)
610 {
611 if (msgObj->msgObjCount > 1)
612 {
613 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->fifoPointer);
614 return IfxMultican_MsgObj_isRxPending(hwObj);
615 }
616 else
617 {
618 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
619 return IfxMultican_MsgObj_isRxPending(hwObj);
620 }
621 }
622
623
624 boolean IfxMultican_Can_MsgObj_isTransmitRequested(IfxMultican_Can_MsgObj *msgObj)
625 {
626 if (msgObj->msgObjCount > 1)
627 {
628 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->fifoPointer);
629
630 return IfxMultican_MsgObj_isTransmitRequested(hwObj);
631 }
632 else
633 {
634 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
635
636 return IfxMultican_MsgObj_isTransmitRequested(hwObj);
637 }
638 }
639
640
641 boolean IfxMultican_Can_MsgObj_isTxPending(IfxMultican_Can_MsgObj *msgObj)
642 {
643 if (msgObj->msgObjCount > 1)
644 {
645 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->fifoPointer);
646
647 return IfxMultican_MsgObj_isTxPending(hwObj);
648 }
649 else
650 {
651 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
652
653 return IfxMultican_MsgObj_isTxPending(hwObj);
654 }
655 }
656
657
658 IfxMultican_Status IfxMultican_Can_MsgObj_readMessage(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg)
659 {
660 IfxMultican_Status status = IfxMultican_Status_ok;
661 IfxMultican_MsgObjId objId;
662
663 if (msgObj->msgObjCount > 1)
664 {
665 /* for FIFO message Objects */
666 objId = msgObj->fifoPointer;
667 }
668 else
669 {
670 /* for standard message Objects */
671 objId = msgObj->msgObjId;
672 }
673
674 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, objId);
675
676 /* clear pending flag */
677 IfxMultican_MsgObj_clearRxPending(hwObj);
678
679 /* read the message object */
680 status = IfxMultican_MsgObj_readMessage(hwObj, msg);
681
682 /* if successfull: */
683 if (status & IfxMultican_Status_newData)
684 {
685 if (msgObj->msgObjCount > 1)
686 {
687 /* set next message object(MOSTAT.PNEXT) of the current object as the next txFIFO slave object */
688 msgObj->fifoPointer = IfxMultican_MsgObj_getBottomObjectPointer(hwObj);
689 }
690 else
691 {}
692 }
693
694 return status;
695 }
696
697
698 IfxMultican_Status IfxMultican_Can_MsgObj_sendMessage(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Message *msg)
699 {
700 IfxMultican_Status status = IfxMultican_Status_ok;
701 IfxMultican_MsgObjId objId;
702
703 if (msgObj->msgObjCount > 1)
704 {
705 /* for FIFO message Objects */
706 objId = msgObj->fifoPointer;
707
708 Ifx_CAN_MO *hwBaseObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
709
710 /* set message as valid, in case of FIFO MSGVAL of base object has to be set before setting it to each slave object */
711 IfxMultican_MsgObj_setStatusFlag(hwBaseObj, IfxMultican_MsgObjStatusFlag_messageValid);
712 }
713 else
714 {
715 /* for standard message Objects */
716 objId = msgObj->msgObjId;
717 }
718
719 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, objId);
720
721 if (msgObj->msgObjCount > 1)
722 {
723 /* send the message */
724 status = IfxMultican_MsgObj_writeTxfifo(hwObj, msg);
725 }
726 else
727 {
728 /* send the message */
729 status = IfxMultican_MsgObj_sendMessage(hwObj, msg);
730 }
731
732 /* if successfull: */
733 if (status == IfxMultican_Status_ok)
734 {
735 if (msgObj->msgObjCount > 1)
736 {
737 /* set next message object(MOSTAT.PNEXT) of the current object as the next txFIFO slave object */
738 msgObj->fifoPointer = IfxMultican_MsgObj_getBottomObjectPointer(hwObj);
739 }
740 else
741 {}
742 }
743
744 return status;
745 }
746
747
748 void IfxMultican_Can_Node_getConfig(IfxMultican_Can_Node *node, IfxMultican_Can_NodeConfig *config)
749 {
750 Ifx_CAN_N *hwNode = node->node;
751
752 IfxMultican_Can mcan;
753
754 mcan.mcan = node->mcan;
755
756 float32 fcan = IfxMultican_Can_getModuleFrequency(&mcan);
757
758 IfxMultican_calcTimingFromBTR(fcan, hwNode->BTR.U, &config->baudrate, &config->samplePoint, &config->synchJumpWidth);
759
760 config->loopBackMode = (hwNode->PCR.B.LBM != 0) ? TRUE : FALSE;
761 config->analyzerMode = (hwNode->CR.B.CALM != 0) ? TRUE : FALSE;
762 }
763
764
765 IfxMultican_Status IfxMultican_Can_Node_init(IfxMultican_Can_Node *node, const IfxMultican_Can_NodeConfig *config)
766 {
767 Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(config->module, config->nodeId);
768 IfxMultican_Status status = IfxMultican_Status_ok;
769
770 node->mcan = config->module;
771 node->node = hwNode;
772 node->nodeId = config->nodeId;
773 node->fastNode = FALSE;
774
775 { /* Configure node control */
776 IfxMultican_Node_resetControlRegister(hwNode); // default value 0x00000041
777 IfxMultican_Node_setTransferInterrupt(hwNode, config->transferInterrupt.enabled);
778 IfxMultican_Node_setLastErrorCodeInterrupt(hwNode, config->lastErrorCodeInterrupt.enabled);
779 IfxMultican_Node_setAlertInterrupt(hwNode, config->alertInterrupt.enabled);
780 IfxMultican_Node_setAnalyzerMode(hwNode, config->analyzerMode);
781 IfxMultican_Node_activate(hwNode);
782 }
783
784 { /* Configure the interrupt source to service request node */
785 IfxMultican_Node_resetInterruptPointers(hwNode); // default value 0x00000041
786 IfxMultican_Node_setTransferInterruptPointer(hwNode, config->transferInterrupt.srcId);
787 IfxMultican_Node_setLastErrorCodeInterruptPointer(hwNode, config->lastErrorCodeInterrupt.srcId);
788 IfxMultican_Node_setAlertInterruptPointer(hwNode, config->alertInterrupt.srcId);
789 IfxMultican_Node_setFrameCounterInterruptPointer(hwNode, config->frameCounterInterrupt.srcId);
790 IfxMultican_Node_setTimerEventInterruptPointer(hwNode, config->timerInterrupt.srcId);
791 }
792
793 { /* NECNT write enabled only of NCR.CCE set */
794 IfxMultican_Node_resetErrorCounters(hwNode);
795 IfxMultican_Node_setReceiveErrorCounter(hwNode, 0);
796 IfxMultican_Node_setTransmitErrorCounter(hwNode, 0);
797 IfxMultican_Node_setErrorWarningLevel(hwNode, config->errorWarningLevel);
798 }
799
800 { /* NPCR write enabled only of NCR.CCE set */
801 IfxMultican_Node_setLoopBackMode(hwNode, config->loopBackMode);
802
803 if (config->txPin != NULL_PTR)
804 {
805 status |= (IfxMultican_Node_initTxPin(hwNode, config->txPin, config->txPinMode, config->pinDriver) ? IfxMultican_Status_ok : IfxMultican_Status_wrongPin);
806 }
807
808 if (config->rxPin != NULL_PTR)
809 {
810 status |= (IfxMultican_Node_initRxPin(hwNode, config->rxPin, config->rxPinMode, config->pinDriver) ? IfxMultican_Status_ok : IfxMultican_Status_wrongPin);
811 }
812 }
813
814 {
815 IfxMultican_Can mcan;
816 mcan.mcan = node->mcan;
817
818 float32 fcan = IfxMultican_Can_getModuleFrequency(&mcan);
819
820 if (!config->flexibleDataRate)
821 {
822 IfxMultican_Node_setBitTiming(hwNode, fcan, config->baudrate, config->samplePoint, config->synchJumpWidth);
823 }
824 else
825 {
826 IfxMultican_Node_setFastNode(hwNode, TRUE);
827 node->fastNode = TRUE;
828
829 IfxMultican_Node_setNominalBitTiming(hwNode, fcan, config->fdConfig.nominalBaudrate, config->fdConfig.nominalSamplePoint, config->fdConfig.nominalSynchJumpWidth);
830 IfxMultican_Node_setFastBitTiming(hwNode, fcan, config->fdConfig.fastBaudrate, config->fdConfig.fastSamplePoint, config->fdConfig.fastSynchJumpWidth);
831
832 if (config->fdConfig.loopDelayOffset)
833 {
834 IfxMultican_Node_setTransceiverDelayCompensationOffset(hwNode, config->fdConfig.loopDelayOffset);
835 IfxMultican_Node_setTransceiverDelayCompensation(hwNode, TRUE);
836 }
837 }
838 }
839
840 { /* Configuration of the Frame Counter */
841 IfxMultican_Node_setFrameCounterMode(hwNode, IfxMultican_FrameCounterMode_timeStampMode);
842 IfxMultican_Node_setFrameCounterInterrupt(hwNode, config->frameCounterInterrupt.enabled);
843 }
844
845 IfxMultican_Node_disableConfigurationChange(hwNode);
846 /* Configuration of the TTCAN Functionality: Not implemented */
847
848 return status;
849 }
850
851
852 void IfxMultican_Can_Node_initConfig(IfxMultican_Can_NodeConfig *config, IfxMultican_Can *mcan)
853 {
854 config->module = mcan->mcan;
855
856 config->nodeId = IfxMultican_NodeId_0;
857
858 config->loopBackMode = FALSE;
859 config->analyzerMode = FALSE;
860
861 config->baudrate = 500000;
862 config->samplePoint = 8000;
863 config->synchJumpWidth = 2000;
864
865 config->flexibleDataRate = FALSE;
866
867 config->fdConfig.nominalBaudrate = 500000;
868 config->fdConfig.nominalSynchJumpWidth = 2000;
869 config->fdConfig.nominalSamplePoint = 8000;
870 config->fdConfig.fastBaudrate = 1000000;
871 config->fdConfig.fastSynchJumpWidth = 2000;
872 config->fdConfig.fastSamplePoint = 8000;
873 config->fdConfig.loopDelayOffset = 0;
874
875 config->rxPin = NULL_PTR;
876 config->rxPinMode = IfxPort_InputMode_pullUp;
877 config->txPin = NULL_PTR;
878 config->txPinMode = IfxPort_OutputMode_pushPull;
879 config->pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed2; //previously hardcoded as this value for Tx pins.Now pad driver option is being given in IfxMultican_Node_initRxPin() and IfxMultican_Node_initTxPin()
880
881 config->transferInterrupt.enabled = FALSE;
882 config->transferInterrupt.srcId = IfxMultican_SrcId_0;
883
884 config->lastErrorCodeInterrupt.enabled = FALSE;
885 config->lastErrorCodeInterrupt.srcId = IfxMultican_SrcId_0;
886
887 config->alertInterrupt.enabled = FALSE;
888 config->alertInterrupt.srcId = IfxMultican_SrcId_0;
889
890 config->frameCounterInterrupt.enabled = FALSE;
891 config->frameCounterInterrupt.srcId = IfxMultican_SrcId_0;
892
893 config->timerInterrupt.enabled = FALSE;
894 config->timerInterrupt.srcId = IfxMultican_SrcId_0;
895
896 config->errorWarningLevel = 96;
897 }
898
899
900 void IfxMultican_Can_Node_sendToBusOff(IfxMultican_Can_Node *node)
901 {
902 uint32 i, counter;
903
904 for (counter = 1; counter < 256; counter = counter * 2)
905 {
906 node->node->ECNT.B.TEC = counter;
907 }
908
909 for (i = 0; i < 10; ++i)
910 {
911 node->node->ECNT.B.TEC = ++counter;
912 }
913 }
914
915
916 void IfxMultican_Can_getConfig(IfxMultican_Can *mcan, IfxMultican_Can_Config *config)
917 {
918 config->clockSelect = IfxMultican_getInputClock(mcan->mcan);
919
920 if (config->clockSelect == IfxMultican_ClockSelect_fclc)
921 {
922 float32 fcan = IfxScuCcu_getCanFrequency();
923
924 uint16 dividerMode = IfxMultican_getFractionalDividerMode(mcan->mcan);
925 uint16 stepValue = IfxMultican_getFractionalDividerStepValue(mcan->mcan);
926
927 if (dividerMode == 1)
928 {
929 config->moduleFreq = fcan / (1024 - stepValue);
930 }
931 else if (dividerMode == 2)
932 {
933 config->moduleFreq = (fcan * stepValue) / 1024;
934 }
935 else
936 {
937 config->moduleFreq = 0;
938 }
939 }
940 else if (config->clockSelect == IfxMultican_ClockSelect_fosc0)
941 {
942 config->moduleFreq = IfxScuCcu_getOsc0Frequency();
943 }
944 else if (config->clockSelect == IfxMultican_ClockSelect_fErayPll)
945 {
946 config->moduleFreq = IfxScuCcu_getPllErayFrequency();
947 }
948 else
949 {
950 config->moduleFreq = 0.0;
951 }
952 }
953
954
955 float32 IfxMultican_Can_getModuleFrequency(IfxMultican_Can *mcan)
956 {
957 IfxMultican_Can_Config config;
958
959 IfxMultican_Can_getConfig(mcan, &config);
960
961 return config.moduleFreq;
962 }
963
964
965 IfxMultican_Status IfxMultican_Can_initModule(IfxMultican_Can *mcan, const IfxMultican_Can_Config *config)
966 {
967 Ifx_CAN *mcanSFR = config->module;
968
969 mcan->mcan = mcanSFR;
970
971 uint16 stepValue, dividerMode, i;
972
973 /* currently supports only fclc */
974 if (config->clockSelect == IfxMultican_ClockSelect_fclc)
975 {
976 {
977 uint16 stepN, stepF;
978 boolean normalDiv;
979 float32 freqN, freqF;
980
981 float32 fsys = IfxScuCcu_getSpbFrequency();
982
983 /* Normal divider mode */
984 stepN = (uint16)__minf(__maxf(0, 1024.0 - (fsys / config->moduleFreq)), 1023);
985 freqN = fsys / (1024 - stepN);
986
987 /* Fractional divider mode */
988 stepF = (uint16)__minf(((config->moduleFreq * 1024) / fsys), 1023);
989 freqF = (fsys * stepF) / 1024;
990
991 normalDiv = (__absf(config->moduleFreq - freqN) <= __absf(config->moduleFreq - freqF));
992
993 stepValue = (normalDiv != 0) ? stepN : stepF;
994 dividerMode = (normalDiv != 0) ? 1 : 2;
995 }
996
997 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
998 IfxScuWdt_clearCpuEndinit(passwd);
999
1000 /* Enable module, disregard Sleep Mode request */
1001 IfxMultican_enableModule(mcanSFR);
1002 IfxMultican_disableSleepMode(mcanSFR);
1003
1004 /* Wait until module is enabled */
1005 while (IfxMultican_isModuleEnabled(mcanSFR) == FALSE)
1006 {}
1007
1008 /* Select the clock input, two writes to the CLKSEL are always necessary */
1009 IfxMultican_setInputClock(mcanSFR, IfxMultican_ClockSelect_noClock);
1010 IfxMultican_setInputClock(mcanSFR, IfxMultican_ClockSelect_fclc); /* Selects Fclc = Fspb */
1011
1012 IfxMultican_setFractionalDividerStepValue(mcanSFR, stepValue);
1013 IfxMultican_setFractionalDividerMode(mcanSFR, dividerMode);
1014 IfxScuWdt_setCpuEndinit(passwd);
1015 }
1016 else
1017 {}
1018
1019 IfxMultican_waitListReady(mcan->mcan);
1020
1021 /* deinitialise all pending bits */
1022 for (i = 0; i < 8; i++)
1023 {
1024 IfxMultican_clearPendingMessageNotification(mcanSFR, i);
1025 }
1026
1027 /* The position is simply given by the message pending number MPN */
1028 IfxMultican_clearMessagePendingSeletor(mcanSFR);
1029
1030 /* All MO contribute to the calculation of the Message index */
1031 IfxMultican_setMessageIndexMask(mcanSFR, 0xFFFFFFFF);
1032
1033 /* Configure interrupt node pointers */
1034 IfxMultican_SrcId srcId;
1035
1036 for (srcId = IfxMultican_SrcId_0; srcId < IFXMULTICAN_NUM_SRC; srcId++)
1037 {
1038 volatile Ifx_SRC_SRCR *srcPointer = IfxMultican_getSrcPointer(mcanSFR, srcId);
1039 IfxSrc_init(srcPointer, config->nodePointer[srcId].typeOfService, config->nodePointer[srcId].priority);
1040
1041 if (config->nodePointer[srcId].priority)
1042 {
1043 IfxSrc_enable(srcPointer);
1044 }
1045 else
1046 {
1047 IfxSrc_disable(srcPointer);
1048 }
1049 }
1050
1051 return IfxMultican_Status_ok;
1052 }
1053
1054
1055 void IfxMultican_Can_initModuleConfig(IfxMultican_Can_Config *config, Ifx_CAN *mcan)
1056 {
1057 IfxMultican_SrcId srcId;
1058 /** - take over module pointer */
1059 config->module = mcan;
1060
1061 /** - Selected input clock is from CLC */
1062 config->clockSelect = IfxMultican_ClockSelect_fclc;
1063
1064 /** - Module frequency is fSPB */
1065 config->moduleFreq = IfxScuCcu_getSpbFrequency();
1066
1067 for (srcId = IfxMultican_SrcId_0; srcId < IFXMULTICAN_NUM_SRC; srcId++)
1068 {
1069 config->nodePointer[srcId].priority = 0;
1070 config->nodePointer[srcId].typeOfService = IfxSrc_Tos_cpu0;
1071 }
1072 }
IfxMultican_Can_Config::moduleFreq
float32 moduleFreq
Required module frequency in Hertz.
Definition: IfxMultican_Can.h:861
IfxMultican_setFractionalDividerMode
IFX_INLINE void IfxMultican_setFractionalDividerMode(Ifx_CAN *mcan, uint16 mode)
sets the fractional divider mode
Definition: IfxMultican.h:1613
IfxMultican_MsgObjStatusFlag_transmitEnable0
Transmit enable 0 status flag.
Definition: IfxMultican.h:185
IfxMultican_Status_ok
Definition: IfxMultican.h:211
IfxMultican_Can_FdConfig::loopDelayOffset
uint16 loopDelayOffset
Specifies the transceiver delay ompensation offset that is added to the measured transceiver delay...
Definition: IfxMultican_Can.h:790
IfxMultican_Can_initModuleConfig
void IfxMultican_Can_initModuleConfig(IfxMultican_Can_Config *config, Ifx_CAN *mcan)
Return the default MULTICAN configuration.
Definition: IfxMultican_Can.c:1055
IfxMultican_Can_MsgObj::msgObjCount
uint16 msgObjCount
Number of message object sto be initialised (1 for standard Msg Obj and no. of objects including base...
Definition: IfxMultican_Can.h:871
IfxMultican_Can_NodeConfig::fdConfig
IfxMultican_Can_FdConfig fdConfig
Specifies CAN FD configuration.
Definition: IfxMultican_Can.h:906
IfxMultican_Can_NodeConfig::frameCounterInterrupt
IfxMultican_Can_InterruptSource frameCounterInterrupt
Frame counter interrupt.
Definition: IfxMultican_Can.h:915
IfxMultican_Status_newData
Definition: IfxMultican.h:220
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:572
IfxMultican_Can_MsgObjConfig::gatewayConfig
IfxMultican_Can_GatewayConfig gatewayConfig
Structure for gateway configuration.
Definition: IfxMultican_Can.h:890
IfxMultican_Node_setTransceiverDelayCompensation
IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensation(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the transceiver delay compensation of CAN node x.
Definition: IfxMultican.h:1523
IfxMultican_Can_MsgObj_getConfig
void IfxMultican_Can_MsgObj_getConfig(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Can_MsgObjConfig *config)
Get the actual message object configuration.
Definition: IfxMultican_Can.c:52
IfxMultican_Can_MsgObjConfig::txInterrupt
IfxMultican_Can_InterruptSource txInterrupt
Tx Interrupt configuration.
Definition: IfxMultican_Can.h:888
IfxMultican_Node_getPointer
IFX_INLINE Ifx_CAN_N * IfxMultican_Node_getPointer(Ifx_CAN *mcan, IfxMultican_NodeId node)
Returns the base address to a given CAN node number.
Definition: IfxMultican.h:1419
IfxMultican_Can_MsgObjConfig::frame
IfxMultican_Frame frame
Specifies the frame type.
Definition: IfxMultican_Can.h:883
IfxMultican_Can_MsgObj_isTxPending
boolean IfxMultican_Can_MsgObj_isTxPending(IfxMultican_Can_MsgObj *msgObj)
Returns the TX pending flag of a message object.
Definition: IfxMultican_Can.c:641
IfxMultican_Node_setLoopBackMode
IFX_INLINE void IfxMultican_Node_setLoopBackMode(Ifx_CAN_N *hwNode, boolean mode)
Enables / Disables the loopback mode of CAN node x.
Definition: IfxMultican.h:1505
IfxMultican_MsgObj_clearRxPending
IFX_INLINE void IfxMultican_MsgObj_clearRxPending(Ifx_CAN_MO *hwObj)
Clear the RX pending flag of a message object.
Definition: IfxMultican.h:1168
IfxMultican_Can_FdConfig::nominalSynchJumpWidth
uint16 nominalSynchJumpWidth
Specifies the FD nominal resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total nominal bit time.
Definition: IfxMultican_Can.h:785
IfxMultican_Can_MsgObjConfig::acceptanceMask
uint32 acceptanceMask
Specifies the acceptance mask.
Definition: IfxMultican_Can.h:884
IfxMultican_MsgObj_setIdentifierExtension
IFX_INLINE void IfxMultican_MsgObj_setIdentifierExtension(Ifx_CAN_MO *hwObj, boolean extension)
Sets identifier extension of message object.
Definition: IfxMultican.h:1299
IfxMultican_MsgObjStatusFlag_receiveUpdating
Receive updating status flag.
Definition: IfxMultican.h:178
IfxMultican_Message
CAN message definition.
Definition: IfxMultican.h:241
IfxMultican_MsgObj_setExtendedDataLength
IFX_INLINE void IfxMultican_MsgObj_setExtendedDataLength(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable extended data length of a message object.
Definition: IfxMultican.h:1281
IfxMultican_Can_Node::fastNode
boolean fastNode
CAN FD fast node enable/disable.
Definition: IfxMultican_Can.h:841
IfxMultican_Can_FdConfig::nominalSamplePoint
uint16 nominalSamplePoint
Specifies the FD nominal sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time...
Definition: IfxMultican_Can.h:786
IfxScuCcu_getPllErayFrequency
float32 IfxScuCcu_getPllErayFrequency(void)
API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON...
Definition: IfxScuCcu.c:457
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:133
IfxMultican_Can_NodeConfig::rxPinMode
IfxPort_InputMode rxPinMode
Specifies the receive pin as input mode.
Definition: IfxMultican_Can.h:908
IfxMultican_MsgObj_setSingleDataTransfer
IFX_INLINE void IfxMultican_MsgObj_setSingleDataTransfer(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable single data transfer of a message object.
Definition: IfxMultican.h:1365
IfxMultican_Can_FdConfig::nominalBaudrate
uint32 nominalBaudrate
Specifies the FD nominal baudrate (Nominal Bit Rate)
Definition: IfxMultican_Can.h:784
IfxMultican_MsgObj_setDataLengthCode
IFX_INLINE void IfxMultican_MsgObj_setDataLengthCode(Ifx_CAN_MO *hwObj, IfxMultican_DataLengthCode code)
Sets data length code of a message object.
Definition: IfxMultican.h:1269
IfxMultican_MsgObj_setStatusFlag
void IfxMultican_MsgObj_setStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Sets the selected status flag of a message object.
Definition: IfxMultican.c:598
IfxMultican_Can_Node::mcan
Ifx_CAN * mcan
Specifies the pointer to the MULTICAN module registers.
Definition: IfxMultican_Can.h:838
IfxMultican_setInputClock
IFX_INLINE void IfxMultican_setInputClock(Ifx_CAN *mcan, IfxMultican_ClockSelect clockSelect)
Sets the input clock source.
Definition: IfxMultican.h:1625
IfxMultican_MsgObj_setIdentifierCopy
IFX_INLINE void IfxMultican_MsgObj_setIdentifierCopy(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable identifier copy of a gateway source message object.
Definition: IfxMultican.h:1293
IfxMultican_Can_MsgObj_readMessage
IfxMultican_Status IfxMultican_Can_MsgObj_readMessage(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg)
Read a received CAN message.
Definition: IfxMultican_Can.c:658
IfxMultican_Frame_transmit
Data frame is generated.
Definition: IfxMultican.h:123
IfxMultican_MsgObj_setGatewayDataFrameSend
IFX_INLINE void IfxMultican_MsgObj_setGatewayDataFrameSend(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable gateway data frame send of a gateway source message object which in turn sets the TX...
Definition: IfxMultican.h:1287
IfxMultican_Can_NodeConfig::module
Ifx_CAN * module
pointer to MULTICAN module
Definition: IfxMultican_Can.h:898
IfxMultican_Can_MsgObj_init
IfxMultican_Status IfxMultican_Can_MsgObj_init(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Can_MsgObjConfig *config)
Initialize the message object.
Definition: IfxMultican_Can.c:78
IfxMultican_MsgObj_setCurrentObjectPointer
IFX_INLINE void IfxMultican_MsgObj_setCurrentObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom current pointer of the base message object.
Definition: IfxMultican.h:1257
IfxMultican_Can_MsgObjConfig::control
IfxMultican_Can_MsgObjControl control
Message object control.
Definition: IfxMultican_Can.h:882
IfxMultican_calcTimingFromBTR
void IfxMultican_calcTimingFromBTR(float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth)
Returns the CAN node timing.
Definition: IfxMultican.c:1161
IfxMultican_Can_InterruptSource::enabled
boolean enabled
If true, enables the interrupt generation.
Definition: IfxMultican_Can.h:816
IfxSrc_disable
IFX_INLINE void IfxSrc_disable(volatile Ifx_SRC_SRCR *src)
Disables a specific interrupt service request.
Definition: IfxSrc.h:259
IfxMultican_Can_Config::nodePointer
IfxMultican_Can_InterruptConfig nodePointer[IFXMULTICAN_NUM_SRC]
Node pointer configuration.
Definition: IfxMultican_Can.h:862
IfxMultican_MsgObj_setTransmitInterrupt
IFX_INLINE void IfxMultican_MsgObj_setTransmitInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable transmit interrupt of a message object.
Definition: IfxMultican.h:1383
IfxMultican_MsgObj_isTransmitRequested
IFX_INLINE boolean IfxMultican_MsgObj_isTransmitRequested(Ifx_CAN_MO *hwObj)
Returns the TX Request flag of a message object.
Definition: IfxMultican.h:1225
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxMultican_Can_NodeConfig::transferInterrupt
IfxMultican_Can_InterruptSource transferInterrupt
Transfer interrupt.
Definition: IfxMultican_Can.h:912
IfxMultican_MsgObjMode_canFD64
CANFD 64 bytes Message Mode.
Definition: IfxMultican.h:168
IfxMultican_Node_setLastErrorCodeInterruptPointer
IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for an LEC interrupt of CAN Node x...
Definition: IfxMultican.h:1499
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
IfxMultican_SrcId_0
Service request ID 0.
Definition: IfxMultican_cfg.h:110
IfxMultican_Can_InterruptConfig::priority
uint16 priority
interrupt priority
Definition: IfxMultican_Can.h:808
IfxMultican_MsgObjStatusFlag_messageLost
Message lost status flag.
Definition: IfxMultican.h:180
IfxMultican_Node_activate
IFX_INLINE void IfxMultican_Node_activate(Ifx_CAN_N *hwNode)
Activate the CAN Node. Participate in the CAN bus activities.
Definition: IfxMultican.h:1395
IfxMultican_Can_NodeConfig
CAN Node configuration.
Definition: IfxMultican_Can.h:896
IfxMultican_Frame_receive
Data frame is received.
Definition: IfxMultican.h:122
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxMultican_Can_GatewayConfig::copyData
uint32 copyData
Specifies the choice for copying data (data low and data high)
Definition: IfxMultican_Can.h:798
IfxMultican_Node_setFastBitTiming
void IfxMultican_Node_setFastBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures FBTR register.
Definition: IfxMultican.c:845
IfxMultican_MsgObj_setMessagePendingNumber
IFX_INLINE void IfxMultican_MsgObj_setMessagePendingNumber(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjId messageNumber)
Sets message pending number that selects the bit position of the bit in the Message Pending Register ...
Definition: IfxMultican.h:1323
IfxMultican_NodeId_0
Ifx_CAN Node 0.
Definition: IfxMultican_cfg.h:100
IfxMultican_MsgObj_setBitRateSwitch
IFX_INLINE void IfxMultican_MsgObj_setBitRateSwitch(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable bit rate switch of a message object.
Definition: IfxMultican.h:1245
IfxMultican_Can_Node::node
Ifx_CAN_N * node
Specifies the pointer to the MULTICAN node registers.
Definition: IfxMultican_Can.h:839
IfxMultican_Can_MsgObj_initConfig
void IfxMultican_Can_MsgObj_initConfig(IfxMultican_Can_MsgObjConfig *config, IfxMultican_Can_Node *node)
Initialise message config with default values and the given parameters.
Definition: IfxMultican_Can.c:570
IfxMultican_Can_NodeConfig::flexibleDataRate
boolean flexibleDataRate
CANFD enable/disable.
Definition: IfxMultican_Can.h:905
IfxMultican_MsgObj_writeTxfifo
IfxMultican_Status IfxMultican_MsgObj_writeTxfifo(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message.
Definition: IfxMultican.c:529
IfxMultican_Can_MsgObjControl::matchingId
uint32 matchingId
Specifies the acceptance mask. 0: standard & extended frame (11 & 29 bit); 1: only frames with machin...
Definition: IfxMultican_Can.h:828
IfxMultican_Can_MsgObjConfig::priority
IfxMultican_Priority priority
Specifies the message object priority.
Definition: IfxMultican_Can.h:886
IfxMultican_Node_setAnalyzerMode
IFX_INLINE void IfxMultican_Node_setAnalyzerMode(Ifx_CAN_N *hwNode, boolean mode)
Enables / Disables the analyzer mode of CAN node x.
Definition: IfxMultican.h:1455
IfxMultican_ClockSelect_fErayPll
E-Ray clock.
Definition: IfxMultican.h:92
IfxMultican_Can_MsgObj_isTransmitRequested
boolean IfxMultican_Can_MsgObj_isTransmitRequested(IfxMultican_Can_MsgObj *msgObj)
Returns the TX Request flag of a message object.
Definition: IfxMultican_Can.c:624
IfxMultican_Can_NodeConfig::txPin
IfxMultican_Txd_Out * txPin
Specifies the transmit pin.
Definition: IfxMultican_Can.h:909
IfxMultican_MsgObj_setBottomObjectPointer
IFX_INLINE void IfxMultican_MsgObj_setBottomObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom object pointer of the base message object.
Definition: IfxMultican.h:1251
IfxMultican_Can_NodeConfig::synchJumpWidth
uint16 synchJumpWidth
Specifies the resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total bit time...
Definition: IfxMultican_Can.h:904
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxMultican_MsgObj_readMessage
IfxMultican_Status IfxMultican_MsgObj_readMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
Read a received CAN message.
Definition: IfxMultican.c:309
IfxMultican_SrcId
IfxMultican_SrcId
Service request ID
Definition: IfxMultican_cfg.h:108
IfxMultican_Can_FdConfig::fastBaudrate
uint32 fastBaudrate
Specifies the FD fast baudrate (Data Bit rate)
Definition: IfxMultican_Can.h:787
IfxMultican_Node_setErrorWarningLevel
IFX_INLINE void IfxMultican_Node_setErrorWarningLevel(Ifx_CAN_N *hwNode, uint8 level)
Determines the threshold value (warning level, default 96) to be reached in order to set the correspo...
Definition: IfxMultican.h:1461
IfxMultican_MsgObjStatusFlag_transmitEnable1
Transmit enable 1 status flag.
Definition: IfxMultican.h:186
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxMultican_Node_disableConfigurationChange
IFX_INLINE void IfxMultican_Node_disableConfigurationChange(Ifx_CAN_N *hwNode)
Disables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node.
Definition: IfxMultican.h:1407
IfxMultican_Can_GatewayConfig::copyDataLengthCode
uint32 copyDataLengthCode
Specifies the choice for copying data length code.
Definition: IfxMultican_Can.h:797
IfxScuCcu_getOsc0Frequency
float32 IfxScuCcu_getOsc0Frequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.c:429
IfxMultican_MsgObj_setReceiveInterrupt
IFX_INLINE void IfxMultican_MsgObj_setReceiveInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable receive interrupt of a message object.
Definition: IfxMultican.h:1341
IfxMultican_Node_initRxPin
boolean IfxMultican_Node_initRxPin(Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin.
Definition: IfxMultican.c:621
IfxMultican_Can_Node_initConfig
void IfxMultican_Can_Node_initConfig(IfxMultican_Can_NodeConfig *config, IfxMultican_Can *mcan)
Get default CAN node configuration.
Definition: IfxMultican_Can.c:852
IfxMultican_Node_setFrameCounterMode
IFX_INLINE void IfxMultican_Node_setFrameCounterMode(Ifx_CAN_N *hwNode, IfxMultican_FrameCounterMode mode)
Sets the operation mode of the frame counter of the CAN Node x.
Definition: IfxMultican.h:1487
IfxMultican_Node_resetErrorCounters
IFX_INLINE void IfxMultican_Node_resetErrorCounters(Ifx_CAN_N *hwNode)
Resets the error counters of CAN Node x.
Definition: IfxMultican.h:1431
IfxMultican_Can_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxMultican_Can.h:809
__maxf
#define __maxf
Definition: IfxCpu_IntrinsicsDcc.h:1637
IfxMultican_MsgObj_setRemoteMonitoring
IFX_INLINE void IfxMultican_MsgObj_setRemoteMonitoring(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable transmit object remote monitoring of a message object.
Definition: IfxMultican.h:1353
IfxMultican_Priority
IfxMultican_Priority
CAN priorities.
Definition: IfxMultican.h:192
IfxMultican_MsgObj_isTxPending
IFX_INLINE boolean IfxMultican_MsgObj_isTxPending(Ifx_CAN_MO *hwObj)
Returns the TX pending flag of a message object.
Definition: IfxMultican.h:1232
IfxMultican_FrameCounterMode_timeStampMode
The frame counter is used to count bit times.
Definition: IfxMultican.h:135
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxMultican_MsgObj_setMatchingId
IFX_INLINE void IfxMultican_MsgObj_setMatchingId(Ifx_CAN_MO *hwObj, boolean matchingId)
Sets acceptance mask for the message IDE bit.
Definition: IfxMultican.h:1305
IfxMultican_Node_initTxPin
boolean IfxMultican_Node_initTxPin(Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin.
Definition: IfxMultican.c:631
__absf
#define __absf
Definition: IfxCpu_IntrinsicsDcc.h:1629
IfxMultican_MsgObj_clearStatusFlag
void IfxMultican_MsgObj_clearStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Clears the selected status flag of a message object.
Definition: IfxMultican.c:92
IfxMultican_Can_GatewayConfig::enableTransmit
uint32 enableTransmit
Specifies the enable choice of TXRQ in the destination gateway object (GDFS of source gateway object)...
Definition: IfxMultican_Can.h:800
IfxMultican_MsgObjMode_gatewaySource
Gateway Source Object.
Definition: IfxMultican.h:167
IfxMultican_Can_Config
CAN module configuration.
Definition: IfxMultican_Can.h:857
IfxMultican_Can_Node_getConfig
void IfxMultican_Can_Node_getConfig(IfxMultican_Can_Node *node, IfxMultican_Can_NodeConfig *config)
Get the actual message object configuration.
Definition: IfxMultican_Can.c:748
IfxMultican_Node_setTransferInterrupt
IFX_INLINE void IfxMultican_Node_setTransferInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the transfer interrupt of CAN node x. This interrupt is generated after the succe...
Definition: IfxMultican.h:1535
IfxMultican_Can.h
MULTICAN CAN details.
IfxMultican_Can_NodeConfig::timerInterrupt
IfxMultican_Can_InterruptSource timerInterrupt
Timer Interrupt.
Definition: IfxMultican_Can.h:916
IfxMultican_Can_MsgObj_sendMessage
IfxMultican_Status IfxMultican_Can_MsgObj_sendMessage(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Message *msg)
Send a CAN message.
Definition: IfxMultican_Can.c:698
IfxMultican_MsgObjMode_transmitFifoBase
Transmit FIFO Base Object.
Definition: IfxMultican.h:165
IfxMultican_ClockSelect_noClock
No clock supplied.
Definition: IfxMultican.h:89
IfxMultican_Node_setFastNode
IFX_INLINE void IfxMultican_Node_setFastNode(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the flexible data rate of CAN node x.
Definition: IfxMultican.h:1467
IfxScuCcu_getCanFrequency
IFX_INLINE float32 IfxScuCcu_getCanFrequency(void)
API to get CAN divider frequency. This API returns the fCAN frequency based on the divider value in C...
Definition: IfxScuCcu.h:1125
IfxMultican_MsgObjStatusFlag_messageDirection
Message direction status flag.
Definition: IfxMultican.h:187
IfxMultican_Can_getModuleFrequency
float32 IfxMultican_Can_getModuleFrequency(IfxMultican_Can *mcan)
Get the module frequency.
Definition: IfxMultican_Can.c:955
IfxMultican_Can_MsgObjControl::messageLen
IfxMultican_DataLengthCode messageLen
Specifies the length of the transmited data (number of bytes). This value is ignored for receive obje...
Definition: IfxMultican_Can.h:826
IfxMultican_Frame_remoteAnswer
Answer frame is generated on reception of the corresponding remote request.
Definition: IfxMultican.h:125
IfxMultican_Frame_remoteRequest
Remote request frame is generated.
Definition: IfxMultican.h:124
IfxMultican_MsgObj_setMessageId
IFX_INLINE void IfxMultican_MsgObj_setMessageId(Ifx_CAN_MO *hwObj, uint32 messageId, boolean extendedFrame)
Sets message identifier of message object.
Definition: IfxMultican.h:1311
IfxMultican_Can_Node_sendToBusOff
void IfxMultican_Can_Node_sendToBusOff(IfxMultican_Can_Node *node)
Sends the CAN node into bus off.
Definition: IfxMultican_Can.c:900
IfxMultican_Can_NodeConfig::loopBackMode
boolean loopBackMode
Specifies the loop back mode. If TRUE then the CAN Node works in loop back mode.
Definition: IfxMultican_Can.h:901
IfxMultican_Can_MsgObjControl::fastBitRate
uint32 fastBitRate
Specifies the bit rate switch. 0: nominal bit rate ; 1: fast bit rate.
Definition: IfxMultican_Can.h:831
IfxMultican_Can_NodeConfig::baudrate
uint32 baudrate
Specifies the baudrate.
Definition: IfxMultican_Can.h:902
IfxMultican_isModuleEnabled
IFX_INLINE boolean IfxMultican_isModuleEnabled(Ifx_CAN *mcan)
Returns the status of module enabled or disabled.
Definition: IfxMultican.h:1607
IfxMultican_MsgObjStatusFlag_newData
New data status flag.
Definition: IfxMultican.h:179
IfxMultican_Can_NodeConfig::txPinMode
IfxPort_OutputMode txPinMode
Specifies the transmit pin output mode.
Definition: IfxMultican_Can.h:910
IfxMultican_MsgObjMode_transmitFifoSlave
Transmit FIFO Slave Object.
Definition: IfxMultican.h:166
IfxMultican_Can_NodeConfig::pinDriver
IfxPort_PadDriver pinDriver
Definition: IfxMultican_Can.h:917
IfxMultican_MsgObjId
sint32 IfxMultican_MsgObjId
Message object ID, 0 .. IFXMULTICAN_NUM_MESSAGE_OBJECTS.
Definition: IfxMultican.h:77
IfxMultican_MsgObj_setTransmitInterruptNodePointer
IFX_INLINE void IfxMultican_MsgObj_setTransmitInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
Sets transmit interrupt node pointer of message object.
Definition: IfxMultican.h:1389
IfxMultican_Can_MsgObjControl::topMsgObjId
IfxMultican_MsgObjId topMsgObjId
Specifies the ID of the message object with data byte 8 to 35. (CAN FD)
Definition: IfxMultican_Can.h:829
IfxMultican_MsgObj_isRxPending
IFX_INLINE boolean IfxMultican_MsgObj_isRxPending(Ifx_CAN_MO *hwObj)
Returns the RX pending flag of a message object.
Definition: IfxMultican.h:1218
IfxMultican_enableModule
IFX_INLINE void IfxMultican_enableModule(Ifx_CAN *mcan)
Enables the module (clears the disable request)
Definition: IfxMultican.h:1577
IfxMultican_Node_setAlertInterruptPointer
IFX_INLINE void IfxMultican_Node_setAlertInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for an alert interrupt of CAN Node x...
Definition: IfxMultican.h:1449
IfxMultican_getFractionalDividerStepValue
IFX_INLINE uint16 IfxMultican_getFractionalDividerStepValue(Ifx_CAN *mcan)
Returns the reload or addition value for the result.
Definition: IfxMultican.h:1595
IfxMultican_Can_MsgObjConfig::firstSlaveObjId
IfxMultican_MsgObjId firstSlaveObjId
Message object number of first slave object (bottom pointer)
Definition: IfxMultican_Can.h:891
IfxMultican_MsgObj_clearFifoGatewayPointers
IFX_INLINE void IfxMultican_MsgObj_clearFifoGatewayPointers(Ifx_CAN_MO *hwObj)
Clears the FIFO/GateWay pointers of a message object.
Definition: IfxMultican.h:1162
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxMultican_MsgObjStatusFlag_messageValid
Message valid status flag.
Definition: IfxMultican.h:181
IfxMultican_Can_NodeConfig::analyzerMode
boolean analyzerMode
Specifies the analizer mode. If TRUE then the CAN Node works in analizer mode.
Definition: IfxMultican_Can.h:900
IfxMultican_ClockSelect_fclc
fMULTICAN
Definition: IfxMultican.h:90
IfxMultican_MsgObj_setAcceptanceMask
IFX_INLINE void IfxMultican_MsgObj_setAcceptanceMask(Ifx_CAN_MO *hwObj, uint32 mask, boolean extendedFrame)
Sets acceptance mask for the message identifier.
Definition: IfxMultican.h:1239
IfxMultican_Can_MsgObj::node
IfxMultican_Can_Node * node
Specifies the pointer to the node handle.
Definition: IfxMultican_Can.h:869
IfxMultican_MsgObj_setReceiveInterruptNodePointer
IFX_INLINE void IfxMultican_MsgObj_setReceiveInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
Sets receive interrupt node pointer of message object.
Definition: IfxMultican.h:1347
__minf
#define __minf
Definition: IfxCpu_IntrinsicsDcc.h:1633
IfxMultican_getInputClock
IFX_INLINE IfxMultican_ClockSelect IfxMultican_getInputClock(Ifx_CAN *mcan)
Returns the selected input clock source.
Definition: IfxMultican.h:1601
IfxMultican_MsgObjStatusFlag_transmitPending
Transmit pending status flag.
Definition: IfxMultican.h:177
IfxMultican_waitListReady
IFX_INLINE void IfxMultican_waitListReady(Ifx_CAN *mcan)
Wait until the list panel is ready.
Definition: IfxMultican.h:1646
IfxMultican_Node_setTransceiverDelayCompensationOffset
IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensationOffset(Ifx_CAN_N *hwNode, uint16 value)
Sets transceiver delay ompensation offset of CAN node x.
Definition: IfxMultican.h:1529
IfxMultican_Can_MsgObjControl::singleTransmitTrial
uint32 singleTransmitTrial
Specifies the single transmit trial option. If 1, single transmit trial is selected.
Definition: IfxMultican_Can.h:825
IfxMultican_Can_Node_init
IfxMultican_Status IfxMultican_Can_Node_init(IfxMultican_Can_Node *node, const IfxMultican_Can_NodeConfig *config)
Initialize the CAN node.
Definition: IfxMultican_Can.c:765
IfxMultican_Can_MsgObjConfig::messageId
uint32 messageId
Specifies the message ID.
Definition: IfxMultican_Can.h:885
IfxMultican_MsgObjStatusFlag_receiveEnable
Receive enable status flag.
Definition: IfxMultican.h:183
IfxMultican_Can_MsgObjControl::singleDataTransfer
uint32 singleDataTransfer
Specifies the single data transfer option. If 1, single data transfer is selected.
Definition: IfxMultican_Can.h:824
IfxMultican_Can_initModule
IfxMultican_Status IfxMultican_Can_initModule(IfxMultican_Can *mcan, const IfxMultican_Can_Config *config)
Initialize the CAN module The following configuration is used: .
Definition: IfxMultican_Can.c:965
IfxMultican_Priority_CAN_ID
CAN ID.
Definition: IfxMultican.h:195
IfxMultican_clearPendingMessageNotification
IFX_INLINE void IfxMultican_clearPendingMessageNotification(Ifx_CAN *mcan, uint16 list)
clears the message pending interrupt notification of a given list
Definition: IfxMultican.h:1559
IfxMultican_Can_GatewayConfig::copyId
uint32 copyId
Specifies the choice for copying id of the message.
Definition: IfxMultican_Can.h:799
IfxMultican_Can_MsgObj
CAN message object handle data structure.
Definition: IfxMultican_Can.h:867
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxMultican_MsgObjStatusFlag_receiveTransmitSelected
Receive transmit selected status flag.
Definition: IfxMultican.h:182
IfxMultican_setMessageIndexMask
IFX_INLINE void IfxMultican_setMessageIndexMask(Ifx_CAN *mcan, uint32 mask)
clears the message pending interrupt notification of a given list
Definition: IfxMultican.h:1631
IfxMultican_MsgObjStatusFlag_transmitRequest
Transmit request status flag.
Definition: IfxMultican.h:184
IfxMultican_Node_setFrameCounterInterrupt
IFX_INLINE void IfxMultican_Node_setFrameCounterInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the CAN frame counter overflow interrupt of CAN node x.
Definition: IfxMultican.h:1475
IfxMultican_Can_InterruptSource::srcId
IfxMultican_SrcId srcId
interrupt node pointer used
Definition: IfxMultican_Can.h:817
IfxMultican_Node_resetControlRegister
IFX_INLINE void IfxMultican_Node_resetControlRegister(Ifx_CAN_N *hwNode)
Resets the control register of CAN Node x.
Definition: IfxMultican.h:1425
IfxMultican_MsgObj_setSingleTransmitTrial
IFX_INLINE void IfxMultican_MsgObj_setSingleTransmitTrial(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable single transmit trial of a message object.
Definition: IfxMultican.h:1371
IfxMultican_setListCommand
void IfxMultican_setListCommand(Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1)
Execute a command from the command panel.
Definition: IfxMultican.c:1245
IfxMultican_getFractionalDividerMode
IFX_INLINE uint16 IfxMultican_getFractionalDividerMode(Ifx_CAN *mcan)
Returns the selected fractional divider mode.
Definition: IfxMultican.h:1589
IfxMultican_DataLengthCode_8
8 data bytes
Definition: IfxMultican.h:108
IfxMultican_ClockSelect_fosc0
Oscillator Clock.
Definition: IfxMultican.h:91
IfxMultican_Can_NodeConfig::rxPin
IfxMultican_Rxd_In * rxPin
Specifies the receive pin.
Definition: IfxMultican_Can.h:907
IfxMultican_setFractionalDividerStepValue
IFX_INLINE void IfxMultican_setFractionalDividerStepValue(Ifx_CAN *mcan, uint16 stepValue)
sets reload or addition value for the result.
Definition: IfxMultican.h:1619
IfxMultican_Can_FdConfig::fastSynchJumpWidth
uint16 fastSynchJumpWidth
Specifies the FD fast resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total ...
Definition: IfxMultican_Can.h:788
IfxMultican_Can_NodeConfig::alertInterrupt
IfxMultican_Can_InterruptSource alertInterrupt
Alert interrupt.
Definition: IfxMultican_Can.h:914
IfxMultican_DataLengthCode
IfxMultican_DataLengthCode
CAN frame data length code Definition in Ifx_CAN.MOFCRx.DLC.
Definition: IfxMultican.h:98
IfxMultican_Node_setTransferInterruptPointer
IFX_INLINE void IfxMultican_Node_setTransferInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a transfer OK interrupt of CAN Node x...
Definition: IfxMultican.h:1541
IfxMultican_getSrcPointer
volatile Ifx_SRC_SRCR * IfxMultican_getSrcPointer(Ifx_CAN *mcan, IfxMultican_SrcId srcId)
Get the interrupt source register.
Definition: IfxMultican.c:1220
IfxMultican_MsgObjMode_standard
Standard Message Object.
Definition: IfxMultican.h:163
IfxMultican_MsgObj_getPointer
IFX_INLINE Ifx_CAN_MO * IfxMultican_MsgObj_getPointer(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Get base address of a message object register.
Definition: IfxMultican.h:1206
IfxMultican_Status
IfxMultican_Status
CAN API status definition.
Definition: IfxMultican.h:209
IfxMultican_MsgObj_setPriorityClass
IFX_INLINE void IfxMultican_MsgObj_setPriorityClass(Ifx_CAN_MO *hwObj, IfxMultican_Priority priority)
Sets priority class of message object.
Definition: IfxMultican.h:1335
IfxMultican_Can_FdConfig::fastSamplePoint
uint16 fastSamplePoint
Specifies the FD fast sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time...
Definition: IfxMultican_Can.h:789
IfxMultican_Can_Node
CAN node handle data structure.
Definition: IfxMultican_Can.h:836
IfxMultican_Can_NodeConfig::errorWarningLevel
uint8 errorWarningLevel
Specifies the error warinig level.
Definition: IfxMultican_Can.h:911
IfxMultican_clearMessagePendingSeletor
IFX_INLINE void IfxMultican_clearMessagePendingSeletor(Ifx_CAN *mcan)
clears the message pending interrupt notification of a given list
Definition: IfxMultican.h:1553
IfxMultican_Can_MsgObjConfig::gatewayTransfers
uint32 gatewayTransfers
Specifies the gateway source object (gateway transfres enable / disable choice)
Definition: IfxMultican_Can.h:889
IfxMultican_Can_getConfig
void IfxMultican_Can_getConfig(IfxMultican_Can *mcan, IfxMultican_Can_Config *config)
Return the actual CAN module configuration.
Definition: IfxMultican_Can.c:916
IfxMultican_Can
CAN handle data structure.
Definition: IfxMultican_Can.h:850
IfxMultican_Node_setReceiveErrorCounter
IFX_INLINE void IfxMultican_Node_setReceiveErrorCounter(Ifx_CAN_N *hwNode, uint8 value)
Sets the value of the receive error counter of CAN node x.
Definition: IfxMultican.h:1511
IfxMultican_MsgObj_getBottomObjectPointer
IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getBottomObjectPointer(Ifx_CAN_MO *hwObj)
Gets bottom object pointer of the base message object.
Definition: IfxMultican.h:1180
IfxMultican_MsgObj_clearDataRegisters
IFX_INLINE void IfxMultican_MsgObj_clearDataRegisters(Ifx_CAN_MO *hwObj)
Sets priority class of message object.
Definition: IfxMultican.h:1155
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IFXMULTICAN_NUM_SRC
#define IFXMULTICAN_NUM_SRC
Number of service requests.
Definition: IfxMultican_cfg.h:73
IfxMultican_Can_MsgObj::fifoPointer
IfxMultican_MsgObjId fifoPointer
Pointer for FIFO based transfers.
Definition: IfxMultican_Can.h:872
IfxMultican_MsgObjMode_receiveFifoBase
Receive FIFO Base Object.
Definition: IfxMultican.h:164
IfxMultican_Can_Config::clockSelect
IfxMultican_ClockSelect clockSelect
Selected module input clock.
Definition: IfxMultican_Can.h:860
IfxMultican_Status_wrongPin
Definition: IfxMultican.h:214
IfxMultican_Node_setTransmitErrorCounter
IFX_INLINE void IfxMultican_Node_setTransmitErrorCounter(Ifx_CAN_N *hwNode, uint8 value)
Sets the value of the transmit error counter of CAN node x.
Definition: IfxMultican.h:1547
IfxMultican_Can_NodeConfig::lastErrorCodeInterrupt
IfxMultican_Can_InterruptSource lastErrorCodeInterrupt
Last error code interrupt.
Definition: IfxMultican_Can.h:913
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxMultican_Can_GatewayConfig::gatewayDstObjId
IfxMultican_MsgObjId gatewayDstObjId
Message object number of first slave object (bottom pointer)
Definition: IfxMultican_Can.h:801
IfxMultican_Can_MsgObjControl::extendedFrame
uint32 extendedFrame
Specifies the standard / extended frame mode. 0: standard frame 11 bit ID; 1: extended frame 29 bit I...
Definition: IfxMultican_Can.h:827
IfxMultican_Can_MsgObj_isRxPending
boolean IfxMultican_Can_MsgObj_isRxPending(IfxMultican_Can_MsgObj *msgObj)
Returns the RX pending flag of a message object.
Definition: IfxMultican_Can.c:609
IfxMultican_disableSleepMode
IFX_INLINE void IfxMultican_disableSleepMode(Ifx_CAN *mcan)
Disregards the sleep mode of the module.
Definition: IfxMultican.h:1571
IfxMultican_Node_setTimerEventInterruptPointer
IFX_INLINE void IfxMultican_Node_setTimerEventInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a timer event interrupt of CAN Node x...
Definition: IfxMultican.h:1517
IfxPort_PadDriver_cmosAutomotiveSpeed2
Speed grade 2.
Definition: IfxPort.h:145
IfxMultican_MsgObj_sendMessage
IfxMultican_Status IfxMultican_MsgObj_sendMessage(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message.
Definition: IfxMultican.c:481
IfxMultican_Node_setNominalBitTiming
void IfxMultican_Node_setNominalBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTEVR register.
Definition: IfxMultican.c:1002
IfxMultican_Node_resetInterruptPointers
IFX_INLINE void IfxMultican_Node_resetInterruptPointers(Ifx_CAN_N *hwNode)
Resets the interrupt pointers of CAN Node x.
Definition: IfxMultican.h:1437
IfxPort_InputMode_pullUp
Definition: IfxPort.h:85
IfxMultican_Can_MsgObjControl::bottomMsgObjId
IfxMultican_MsgObjId bottomMsgObjId
Specifies the ID of the message object with data byte 36 to 63. (CAN FD)
Definition: IfxMultican_Can.h:830
IfxMultican_MsgObj_setDataLengthCodeCopy
IFX_INLINE void IfxMultican_MsgObj_setDataLengthCodeCopy(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable data length code copy of a gateway source message object.
Definition: IfxMultican.h:1275
IfxMultican_MsgObj_setDataCopy
IFX_INLINE void IfxMultican_MsgObj_setDataCopy(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable data copy of a gateway source message object.
Definition: IfxMultican.h:1263
IfxMultican_MsgObj_setSelectObjectPointer
IFX_INLINE void IfxMultican_MsgObj_setSelectObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom object select pointer of the base message object.
Definition: IfxMultican.h:1359
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxMultican_Can_MsgObjConfig
CAN message object configuration.
Definition: IfxMultican_Can.h:877
IfxMultican_MsgObjStatusFlag_receivePending
Receive pending status flag.
Definition: IfxMultican.h:176
IfxMultican_Can_NodeConfig::samplePoint
uint16 samplePoint
Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
Definition: IfxMultican_Can.h:903
IfxMultican_Can_MsgObj::msgObjId
IfxMultican_MsgObjId msgObjId
Specifies the message object ID.
Definition: IfxMultican_Can.h:870
IfxMultican_Node_setBitTiming
void IfxMultican_Node_setBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTR register.
Definition: IfxMultican.c:685
IfxMultican_Node_setLastErrorCodeInterrupt
IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the last error code interrupt of CAN node x. This interrupt is generated with eac...
Definition: IfxMultican.h:1493
IfxMultican_Node_setAlertInterrupt
IFX_INLINE void IfxMultican_Node_setAlertInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the alert interrupt of CAN node x.
Definition: IfxMultican.h:1443
IfxMultican_Can_MsgObjConfig::rxInterrupt
IfxMultican_Can_InterruptSource rxInterrupt
Rx Interrupt configuration.
Definition: IfxMultican_Can.h:887
IfxMultican_MsgObj_setTopObjectPointer
IFX_INLINE void IfxMultican_MsgObj_setTopObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets top object pointer of the base message object.
Definition: IfxMultican.h:1377
IfxMultican_MsgObj_setMessageMode
IFX_INLINE void IfxMultican_MsgObj_setMessageMode(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjMode mode)
Sets the message mode of a message object.
Definition: IfxMultican.h:1317
IfxMultican_Node_setFrameCounterInterruptPointer
IFX_INLINE void IfxMultican_Node_setFrameCounterInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a frame counter overflow interrupt of CAN Nod...
Definition: IfxMultican.h:1481
IfxMultican_Can_Node::nodeId
IfxMultican_NodeId nodeId
Specifies the node Id.
Definition: IfxMultican_Can.h:840


iLLD_TC26B: IfxMultican_Can.h Source File

  • Multican
  • Can
IfxMultican_Can.h
Go to the documentation of this file.
1 /**
2 * \file IfxMultican_Can.h
3 * \brief MULTICAN CAN details
4 * \ingroup IfxLld_Multican
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Multican_Can_Usage How to use the CAN Interface driver?
42 * \ingroup IfxLld_Multican
43 *
44 * The CAN interface driver provides a default configuration for various modes.
45 *
46 * In the following sections it will be described, how to integrate the driver into the application framework.
47 *
48 * \section IfxLld_Multican_Can_Preparation Preparation
49 * \subsection IfxLld_Multican_Can_Include Include Files
50 *
51 * Include following header file into your C code:
52 * \code
53 * #include <Multican/Can/IfxMultican_Can.h>
54 * \endcode
55 *
56 * \subsection IfxLld_Multican_Can_Variables Variables
57 *
58 * Declare the CAN handles as global variables in your C code:
59 * \code
60 * // CAN handle
61 * IfxMultican_Can can;
62 *
63 * // Nodes handles
64 * IfxMultican_Can_Node canSrcNode;
65 * IfxMultican_Can_Node canDstNode;
66 *
67 * // Message Object handles
68 * IfxMultican_Can_MsgObj canSrcMsgObj;
69 * IfxMultican_Can_MsgObj canDstMsgObj;
70 *
71 * const unsigned id = 0x100;
72 * \endcode
73 *
74 * \subsection IfxLld_Multican_Can_Init Module Initialisation
75 *
76 * The module initialisation can be done as followed:
77 * only module clock is supported for clock selection as of now
78 * \code
79 * // create configuration
80 * IfxMultican_Can_Config canConfig;
81 * IfxMultican_Can_initModuleConfig(&canConfig, &MODULE_CAN);
82 *
83 * // initialize module
84 * // IfxMultican_Can can; // defined globally
85 * IfxMultican_Can_initModule(&can, &canConfig);
86 * \endcode
87 *
88 * Note: Application should explicitly configure the system DMA, if system DMA is selected as the service provider for the interrupt.
89 *
90 * \subsection IfxLld_Multican_Can_InitNode Node Initialisation
91 *
92 * The Can nodes initialisation can be done as followed:
93 *
94 * \code
95 * // create CAN node config
96 * IfxMultican_Can_NodeConfig canNodeConfig;
97 * IfxMultican_Can_Node_initConfig(&canNodeConfig, &can);
98 *
99 * canNodeConfig.baudrate = 1000000; // 1 MBaud
100 *
101 * // Source Node
102 * // IfxMultican_Can_Node canSrcNode; // defined globally
103 * {
104 * canNodeConfig.nodeId = IfxMultican_NodeId_0;
105 * canNodeConfig.rxPin = &IIfxMultican_RXD0B_P20_7_IN;
106 * canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
107 * canNodeConfig.txPin = &IfxMultican_TXD0_P20_8_OUT;
108 * canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
109 *
110 * // initialise the node
111 * IfxMultican_Can_Node_init(&canSrcNode, &canNodeConfig);
112 * }
113 *
114 * // Destination Node
115 * // IfxMultican_Can_Node canDstNode; // defined globally
116 * {
117 * canNodeConfig.nodeId = IfxMultican_NodeId_1;
118 * canNodeConfig.rxPin = &IfxMultican_RXD1B_P14_1_IN;
119 * canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
120 * canNodeConfig.txPin = &IfxMultican_TXD1_P14_0_OUT;
121 * canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
122 *
123 * // initialise the node
124 * IfxMultican_Can_Node_init(&canDstNode, &canNodeConfig);
125 * }
126 * \endcode
127 *
128 * \subsection IfxLld_Multican_Can_InitMessageObject Message Object Initialisation
129 *
130 * The Can message objects initialisation can be done as followed:
131 *
132 * \code
133 * // IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
134 * {
135 * // create message object config
136 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
137 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
138 *
139 * // assigned message object:
140 * canMsgObjConfig.msgObjId = 0;
141 *
142 * canMsgObjConfig.messageId = id; // 'id' is defined globally
143 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
144 * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
145 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
146 * canMsgObjConfig.control.extendedFrame = FALSE;
147 * canMsgObjConfig.control.matchingId = TRUE;
148 *
149 * // initialize message object
150 * IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
151 * }
152 *
153 * // IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
154 * {
155 * // create message object config
156 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
157 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
158 *
159 * // assigned message object:
160 * canMsgObjConfig.msgObjId = 1;
161 *
162 * canMsgObjConfig.messageId = id;
163 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
164 * canMsgObjConfig.frame = IfxMultican_Frame_receive;
165 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
166 * canMsgObjConfig.control.extendedFrame = FALSE;
167 * canMsgObjConfig.control.matchingId = TRUE;
168 *
169 * // initialize message object
170 * IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
171 * }
172 * \endcode
173 *
174 * The MULTICAN is ready for use now!
175 *
176 *
177 * \section IfxLld_Multican_Can_StandardDataTransfers Single Data Transfers
178 *
179 * The CAN driver provides simple to use transfer functions
180 *
181 * Data can be sent by the following way:
182 * \code
183 * const unsigned dataLow = 0xC0CAC01A;
184 * const unsigned dataHigh = 0xBA5EBA11;
185 *
186 * // Initialise the message strcture
187 * IfxMultican_Message txMsg;
188 * IfxMultican_Message_init(&txMsg, id, dataLow, dataHigh, IfxMultican_DataLengthCode_8);
189 *
190 * // Transmit Data
191 * while( IfxMultican_Can_MsgObj_sendMessage(&canSrcMsgObj, &txMsg) == IfxMultican_Status_notSentBusy );
192 * \endcode
193 *
194 * Data can be received by the following way:
195 * \code
196 * // Receiving Data
197 *
198 * // Initialise the message structure with dummy values, will be replaced by the received values
199 * IfxMultican_Message rxMsg;
200 * IfxMultican_Message_init(&rxMsg, 0xdead, 0xdeadbeef, 0xdeadbeef, IfxMultican_DataLengthCode_8); // start with invalid values
201 *
202 * // wait until Multican received a new message
203 * while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
204 *
205 * // read message
206 * IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readMessage(&canDstMsgObj, &rxMsg);
207 *
208 * // if no new data is been received report an error
209 * if( !( readStatus & IfxMultican_Status_newData ) ) {
210 * clib_ver_printf("ERROR: IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
211 * }
212 * // if a new data is been received but one lost, report the status
213 * if( readStatus == IfxMultican_Status_newDataButOneLost ) {
214 * clib_ver_printf(" IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
215 * }
216 *
217 * // data now available at rxMsg.data[0] and rxMsg.data[1]
218 * \endcode
219 *
220 *
221 * \section IfxLld_Multican_Can_FIFOBasedTransfers FIFO based Transfers
222 *
223 * A transmit and receive FIFO can be enabled during the node configuration by specifing the number of allocated message objects with the canMsgObjConfig.msgObjCount item.
224 * and specifying the message object number of first slave object with the canMsgObjConfig.firstSlaveObjId item.
225 *
226 * Message objects will be allocated to the FIFO in ascending order.
227 *
228 * Here a configuration example:
229 * \code
230 * //add the following defines to your code globally
231 * #define FIFO_SIZE 16
232 * #define FIFO_SIZE 8
233 *
234 *
235 * // IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
236 * {
237 * // create message object config
238 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
239 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
240 *
241 * // FIFO MsgObj allocation:
242 * canMsgObjConfig.msgObjId = 0; // will allocate MsgObj 0
243 * canMsgObjConfig.msgObjCount = FIFO_SIZE/2;
244 * canMsgObjConfig.firstSlaveObjId = 1;
245 *
246 * canMsgObjConfig.messageId = id; // 'id' defined gloabally
247 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
248 * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
249 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
250 * canMsgObjConfig.control.extendedFrame = FALSE;
251 * canMsgObjConfig.control.matchingId = TRUE;
252 *
253 * // initialize message object
254 * IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
255 * }
256 *
257 * // IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
258 * {
259 * // create message object config
260 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
261 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
262 *
263 * // FIFO MsgObj allocation:
264 * canMsgObjConfig.msgObjId = FIFO_SIZE + 1; // avoid clashing with transmit FIFO message objects
265 * canMsgObjConfig.msgObjCount = FIFO_SIZE;
266 *
267 * canMsgObjConfig.firstSlaveObjId = FIFO_SIZE + 2;
268 *
269 * canMsgObjConfig.messageId = id; // 'id' defined gloabally
270 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
271 * canMsgObjConfig.frame = IfxMultican_Frame_receive;
272 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
273 * canMsgObjConfig.control.extendedFrame = FALSE;
274 * canMsgObjConfig.control.matchingId = TRUE;
275 *
276 * // initialize message object
277 * IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
278 * }
279 * \endcode
280 *
281 * Data can now be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).
282 *
283 * here is a transmit example
284 * \code
285 * IfxMultican_Message txMsg;
286 * for (i = 0; i < FIFO_SIZE; ++i)
287 * {
288 * // Transmit Data from the source message object //
289 *
290 * IfxMultican_Message_init(&txMsg, id, dataLow + i, dataHigh + i, IfxMultican_DataLengthCode_8);
291 *
292 * while( IfxMultican_Can_MsgObj_sendMessage(&canSrcMsgObj, &txMsg) == IfxMultican_Status_notSentBusy );
293 * }
294 * \endcode
295 *
296 * data can be read by the following way
297 * \code
298 * IfxMultican_Message rxMsg;
299 * for (i = 0; i < FIFO_SIZE; ++i)
300 * {
301 * // Receiving Data, read the data from the destination receive Fifo //
302 * // wait until MCAN received the frame
303 * // wait until Multican received a new message
304 * while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
305 *
306 *
307 * IfxMultican_Message_init(&rxMsg, 0xdead, 0xdeadbeef, 0xdeadbeef, IfxMultican_DataLengthCode_8); // start with invalid values
308 *
309 * IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readMessage(&canDstMsgObj, &rxMsg);
310 * }
311 * \endcode
312 *
313 *
314 * \section IfxLld_Multican_Can_FDDataTransfers CAN FD Data Transfers
315 *
316 * The CAN driver provides simple to use FD transfer functions
317 * After initialising the module, choose the node initialisation as the following
318 * Node configuration:
319 * \code
320 * // create CAN node config
321 * IfxMultican_Can_NodeConfig canNodeConfig;
322 * IfxMultican_Can_Node_initConfig(&canNodeConfig, &can);
323 *
324 * canNodeConfig.baudrate = 1000000; // 1 MBaud
325 *
326 * // Source Node
327 * // IfxMultican_Can_Node canSrcNode; // defined globally
328 * {
329 * canNodeConfig.nodeId = IfxMultican_NodeId_0;
330 * canNodeConfig.rxPin = &IfxMultican_RXD0B_P20_7_IN;
331 * canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
332 * canNodeConfig.txPin = &IfxMultican_TXD0_P20_8_OUT;
333 * canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
334 *
335 * // choose CAN FD transfer enable or disable //
336 * canNodeConfig.flexibleDataRate = TRUE;
337 *
338 * // if CAN FD enabled choose the FD configuration //
339 * canNodeConfig.fdConfig.nominalBaudrate = 500000;
340 * canNodeConfig.fdConfig.nominalSynchJumpWidth = 8000;
341 * canNodeConfig.fdConfig.nominalSamplePoint = 2000;
342 * canNodeConfig.fdConfig.fastBaudrate = 1000000;
343 * canNodeConfig.fdConfig.fastSynchJumpWidth = 8000;
344 * canNodeConfig.fdConfig.fastSamplePoint = 2000;
345 * canNodeConfig.fdConfig.loopDelayOffset = 0;
346 *
347 * // initialise the node
348 * IfxMultican_Can_Node_init(&canSrcNode, &canNodeConfig);
349 * }
350 *
351 * // Destination Node
352 * // IfxMultican_Can_Node canDstNode; // defined globally
353 * {
354 * canNodeConfig.nodeId = IfxMultican_NodeId_1;
355 * canNodeConfig.rxPin = IfxMultican_RXD1B_P14_1_IN;
356 * canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
357 * canNodeConfig.txPin = IfxMultican_TXD1_P14_0_OUT;
358 * canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
359 *
360 * // choose CAN FD transfer enable or disable //
361 * config->flexibleDataRate = TRUE;
362 *
363 * // if CAN FD enabled choose the FD configuration //
364 * canNodeConfig.fdConfig.nominalBaudrate = 500000;
365 * canNodeConfig.fdConfig.nominalSynchJumpWidth = 8000;
366 * canNodeConfig.fdConfig.nominalSamplePoint = 2000;
367 * canNodeConfig.fdConfig.fastBaudrate = 1000000;
368 * canNodeConfig.fdConfig.fastSynchJumpWidth = 8000;
369 * canNodeConfig.fdConfig.fastSamplePoint = 2000;
370 * canNodeConfig.fdConfig.loopDelayOffset = 0;
371 *
372 * // initialise the node
373 * IfxMultican_Can_Node_init(&canDstNode, &canNodeConfig);
374 * }
375 * \endcode
376 *
377 * The CAN FD message objects initialisation can be done as followed:
378 *
379 * \code
380 * // IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
381 * {
382 * // create message object config
383 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
384 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
385 *
386 * // assigned message object:
387 * canMsgObjConfig.msgObjId = 0;
388 *
389 * canMsgObjConfig.messageId = id; // 'id' defined gloabally
390 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
391 * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
392 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_64;
393 * canMsgObjConfig.control.extendedFrame = FALSE;
394 * canMsgObjConfig.control.matchingId = TRUE;
395 *
396 * canMsgObjConfig.control.topMsgObjId = 250;
397 * canMsgObjConfig.control.bottomMsgObjId = 251;
398 * canMsgObjConfig.control.fastBitRate = FALSE; // fast bit rate enable/disable
399 *
400 * // initialize message object
401 * IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
402 * }
403 *
404 * // IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
405 * {
406 * // create message object config
407 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
408 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
409 *
410 * // assigned message object:
411 * canMsgObjConfig.msgObjId = 1;
412 *
413 * canMsgObjConfig.messageId = id;
414 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
415 * canMsgObjConfig.frame = IfxMultican_Frame_receive;
416 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_64;
417 * canMsgObjConfig.control.extendedFrame = FALSE;
418 * canMsgObjConfig.control.matchingId = TRUE;
419 *
420 * canMsgObjConfig.control.topMsgObjId = 252;
421 * canMsgObjConfig.control.bottomMsgObjId = 253;
422 * canMsgObjConfig.control.fastBitRate = FALSE; // fast bit rate enable/disable
423 *
424 * // initialize message object
425 * IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
426 * }
427 * \endcode
428 *
429 *
430 * In case of standard messages, data can be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).
431 *
432 * In case of long frames of length more than 8 bytes
433 * the data can be sent in the following way
434 *
435 * \code
436 * // load txData buffer with the data that needs to be send
437 * // txData is assumed to be declared globally
438 * int i;
439 * for (i = 0; i < 16; ++i)
440 * {
441 * // uint32 txData[16]; // defined globally
442 * txData[i] = (0x11110000 + i);
443 * }
444 *
445 * // Initialise the message strcture
446 * IfxMultican_Message txMsg;
447 * IfxMultican_Message_longFrameInit(&txMsg, id, IfxMultican_DataLengthCode_64, FALSE);
448 *
449 * // Transmit Data
450 * while( IfxMultican_Can_MsgObj_sendlongFrame(&canSrcMsgObj, &txMsg, txData) == IfxMultican_Status_notSentBusy );
451 * \endcode
452 *
453 * You can recieve the data by the following way
454 *
455 * \code
456 * // Receiving Data
457 *
458 * // Initialise the message strcture with dummy values, will be replaced by the received values
459 * IfxMultican_Message rxMsg;
460 * IfxMultican_Message_longFrameInit(&rxMsg, 0xdead, IfxMultican_DataLengthCode_64, FALSE); // start with invalid values
461 *
462 * // wait until Multican received a new message
463 * while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
464 *
465 *
466 * // read the message
467 * //uint32 rxData[16]; //defined globally
468 * IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readLongFrame(&canDstMsgObj, &rxMsg, rxData);
469 *
470 * // if no new data is been received report an error
471 * if( !( readStatus & IfxMultican_Status_newData ) ) {
472 * clib_ver_printf("ERROR: IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
473 * }
474 * // if a new data is been received but one lost, report the status
475 * if( readStatus == IfxMultican_Status_newDataButOneLost ) {
476 * clib_ver_printf(" IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
477 * }
478 *
479 * // clear pending flag
480 * IfxMultican_Can_MsgObj_clearRxPending(&canDstMsgObj);
481 *
482 * // data will be available at rxData
483 * \endcode
484 *
485 *
486 * \section IfxLld_Multican_Can_GatewayTransfers Gateway Transfers
487 * After initialising th emodule and nodes, the gateway message objects can be initialised in the following way
488 *
489 * A Gateway transfers can be enabled during the message object configuration by specifing with the canMsgObjConfig.gatewayTransfersEnable item.
490 *
491 * Here a configuration example:
492 * \code
493 * // source message object
494 * // IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
495 * {
496 * // create message object config
497 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
498 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
499 *
500 * canMsgObjConfig.msgObjId = 0;
501 * canMsgObjConfig.messageId = id; // 'id' defined globally
502 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
503 * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
504 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
505 * canMsgObjConfig.control.extendedFrame = FALSE;
506 * canMsgObjConfig.control.matchingId = TRUE;
507 * canMsgObjConfig.gatewayTransfers = FALSE;
508 *
509 * // initialize message object
510 * IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
511 * }
512 *
513 * // gateway source message object //
514 * // data will be received into this object from SrcObj, and then copied into gateway destination object //
515 * IfxMultican_Can_MsgObj canGatewaySrcMsgObj;
516 * {
517 * // create message object config
518 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
519 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
520 *
521 * canMsgObjConfig.msgObjId = 1;
522 * canMsgObjConfig.messageId = id;
523 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
524 * canMsgObjConfig.frame = IfxMultican_Frame_receive;
525 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
526 * canMsgObjConfig.control.extendedFrame = FALSE;
527 * canMsgObjConfig.control.matchingId = TRUE;
528 * canMsgObjConfig.gatewayTransfers = TRUE;
529 * canMsgObjConfig.gatewayConfig.copyDataLengthCode = TRUE;
530 * canMsgObjConfig.gatewayConfig.copyData = TRUE;
531 * canMsgObjConfig.gatewayConfig.copyId = FALSE;
532 * canMsgObjConfig.gatewayConfig.enableTransmit = TRUE; // if this is not choosen, then no need to initialise canDstMsgObj to read the final data
533 * canMsgObjConfig.gatewayConfig.gatewayDstObjId = 3; // specify the destination object number
534 *
535 * // initialize message object
536 * IfxMultican_Can_MsgObj_init(&canGatewaySrcMsgObj, &canMsgObjConfig);
537 * }
538 *
539 * // gateway destination object //
540 * // data, id , datlength code will be copied from GatewaySrcObj into this object through gateway transfers //
541 * // and then sent onto the bus for sending the message to destination message object //
542 * IfxMultican_Can_MsgObj canGatewayDstMsgObj;
543 * {
544 * // create message object config
545 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
546 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
547 *
548 * canMsgObjConfig.msgObjId = 3;
549 * canMsgObjConfig.messageId = 0x200;
550 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
551 * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
552 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
553 * canMsgObjConfig.control.extendedFrame = FALSE;
554 * canMsgObjConfig.control.matchingId = TRUE;
555 * canMsgObjConfig.gatewayTransfers = FALSE;
556 *
557 * // initialize message object
558 * IfxMultican_Can_MsgObj_init(&canGatewayDstMsgObj, &canMsgObjConfig);
559 * }
560 *
561 * // destination message object, not needed if enableTransmit is not chosen in gateway source object, or you don't want to read the data//
562 * // data will be received from GatewayDstObj into this obj //
563 * // IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
564 * {
565 * // create message object config
566 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
567 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
568 *
569 * canMsgObjConfig.msgObjId = 10;
570 * canMsgObjConfig.messageId = 0x200;
571 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
572 * canMsgObjConfig.frame = IfxMultican_Frame_receive;
573 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
574 * canMsgObjConfig.control.extendedFrame = FALSE;
575 * canMsgObjConfig.control.matchingId = FALSE;
576 * canMsgObjConfig.gatewayTransfers = FALSE;
577 *
578 * // initialize message object
579 * IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
580 * }
581 * \endcode
582 *
583 * Data can now be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).
584 *
585 * The data flow is as followed,
586 *
587 * Data will be sent from the source object (canSrcMsgObj), it will be received by the gateway source object (canGatewaySrcMsgObj).
588 * and then gets copied into the gateway destination object (canGatewayDstMsgObj) without CPU intervention,
589 *
590 * If GDFS is selected in gateway source object (canGatewaySrcMsgObj)then,
591 * the data will be transmitted from gateway destination object(canGatewayDstMsgObj) to the destination object (canDstMsgObj)
592 *
593 * \section IfxLld_Multican_Can_Gateway_Fifo_Transfers Gateway FIFO based Transfers
594 * After initialising the module and nodes,
595 *
596 * A gateway FIFO transfers can be enabled during the node configuration by specifing the number of allocated message objects with the canMsgObjConfig.msgObjCount item.
597 * and enbling the gateway transfers with the canMsgObjConfig.gatewayTransfersEnable item. and also by selecting the start object of the FIFO with the
598 * canMsgObjConfig.firstSlaveObjId item.
599 *
600 * Message objects will be allocated to the gateway FIFO in ascending order.
601 * Here a configuration example:
602 * \code
603 * // source message object, you can even make it as a Tx FIFO
604 * // IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
605 * {
606 * // create message object config
607 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
608 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
609 *
610 * canMsgObjConfig.msgObjId = 0;
611 * canMsgObjConfig.messageId = id;
612 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
613 * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
614 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
615 * canMsgObjConfig.control.extendedFrame = FALSE;
616 * canMsgObjConfig.control.matchingId = TRUE;
617 * canMsgObjConfig.gatewayTransfers = FALSE;
618 *
619 * // initialize message object
620 * IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
621 * }
622 *
623 * // gateway source Fifo //
624 * // data will be received into this object from SrcObj, and then copied into gateway Fifo objects //
625 * IfxMultican_Can_MsgObj canGatewaySrcMsgObj;
626 * {
627 * // create message object config
628 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
629 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
630 *
631 * canMsgObjConfig.msgObjId = 1;
632 * canMsgObjConfig.messageId = id;
633 * canMsgObjConfig.msgObjCount = 4; // FIFO
634 * canMsgObjConfig.firstSlaveObjId = 2; // will allocate MsgObj 2..5 for the gateway FIFO
635 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
636 * canMsgObjConfig.frame = IfxMultican_Frame_receive;
637 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
638 * canMsgObjConfig.control.extendedFrame = FALSE;
639 * canMsgObjConfig.control.matchingId = TRUE;
640 * canMsgObjConfig.gatewayTransfers = TRUE; // gateway FIFO
641 * canMsgObjConfig.gatewayConfig.copyDataLengthCode = TRUE;
642 * canMsgObjConfig.gatewayConfig.copyData = TRUE;
643 * canMsgObjConfig.gatewayConfig.copyId = FALSE;
644 * canMsgObjConfig.gatewayConfig.enableTransmit = TRUE;
645 *
646 *
647 *
648 * // initialize message object
649 * IfxMultican_Can_MsgObj_init(&canGatewaySrcMsgObj, &canMsgObjConfig);
650 * }
651 *
652 * int i = 0;
653 * for (i = 0; i < 4 ; ++i)
654 * {
655 * // gateway destination objects //
656 * // data, id , datlength code will be copied from GatewaySrcObj into this object through gateway transfers //
657 * // and then sent onto the bus for sending the message to destination receive Fifo message objects //
658 * IfxMultican_Can_MsgObj canGatewayDstMsgObj;
659 * {
660 * // create message object config
661 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
662 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
663 *
664 * canMsgObjConfig.msgObjId = 2 + i;
665 * canMsgObjConfig.messageId = 0x200;
666 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
667 * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
668 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
669 * canMsgObjConfig.control.extendedFrame = FALSE;
670 * canMsgObjConfig.control.matchingId = FALSE;
671 * canMsgObjConfig.gatewayTransfers = FALSE;
672 *
673 * // initialize message object
674 * IfxMultican_Can_MsgObj_init(&canGatewayDstMsgObj, &canMsgObjConfig);
675 * }
676 * }
677 * // destination receive Fifo,
678 * // data will be received from GatewayDstObj into this Fifo //
679 * // IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
680 * {
681 * // create message object config
682 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
683 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
684 *
685 * canMsgObjConfig.msgObjId = 10;
686 * canMsgObjConfig.messageId = 0x200;
687 * canMsgObjConfig.msgObjCount = 4; // receive FIFO
688 * canMsgObjConfig.firstSlaveObjId = 11; // will allocate MsgObj 11..14 for the receive FIFO
689 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
690 * canMsgObjConfig.frame = IfxMultican_Frame_receive;
691 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
692 * canMsgObjConfig.control.extendedFrame = FALSE;
693 * canMsgObjConfig.control.matchingId = FALSE;
694 * canMsgObjConfig.gatewayTransfers = FALSE;
695 * canMsgObjConfig.firstSlaveObjId = 11;
696 *
697 *
698 * // initialize message object
699 * IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
700 * }
701 * \endcode
702 *
703 * Data can now be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).
704 * here is a transmit example
705 * \code
706 * for (i = 0; i < 4; ++i)
707 * {
708 * // Transmit Data from the source message object //
709 * IfxMultican_Message txMsg;
710 * IfxMultican_Message_init(&txMsg, id, dataLow + i, dataHigh + i, IfxMultican_DataLengthCode_8);
711 *
712 * while( IfxMultican_Can_MsgObj_sendMessage(&canSrcMsgObj, &txMsg) == IfxMultican_Status_notSentBusy );
713 * }
714 * \endcode
715 *
716 * The data flow is as followed,
717 *
718 * data will be sent from the source object (canSrcMsgObj) or source TX FIFO, it will be received by the gateway source FIFO (canGatewaySrcMsgObj).
719 * and then gets copied into the gateway destination objects (canGatewayDstMsgObj) without CPU intervention,
720 *
721 * If GDFS is selected in gateway source object (FIFO) (canGatewaySrcMsgObj)then,
722 * the data will be transmitted from gateway destination objects (canGatewayDstMsgObj) to the destination objects or receive FIFO (canDstMsgObj)
723 *
724 * data can be read by the following way
725 * \code
726 * for (i = 0; i < 4; ++i)
727 * {
728 * // Receiving Data, read the data from the destination receive Fifo //
729 * // wait until MCAN received the frame
730 * // wait until Multican received a new message
731 * while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
732 *
733 * IfxMultican_Message rxMsg;
734 * IfxMultican_Message_init(&rxMsg, 0xdead, 0xdeadbeef, 0xdeadbeef, IfxMultican_DataLengthCode_8); // start with invalid values
735 *
736 * IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readMessage(&canDstMsgObj, &rxMsg);
737 *
738 * // if no new data is been received report an error
739 * if( !( readStatus & IfxMultican_Status_newData ) ) {
740 * clib_ver_printf("ERROR: IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
741 * }
742 * // if a new data is been received but one lost, report the status
743 * if( readStatus == IfxMultican_Status_newDataButOneLost ) {
744 * clib_ver_printf(" IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
745 * }
746 * }
747 * \endcode
748 *
749 * \defgroup IfxLld_Multican_Can CAN
750 * \ingroup IfxLld_Multican
751 * \defgroup IfxLld_Multican_Can_Data_Structures Data structures
752 * \ingroup IfxLld_Multican_Can
753 * \defgroup IfxLld_Multican_Can_General General functions
754 * \ingroup IfxLld_Multican_Can
755 * \defgroup IfxLld_Multican_Can_Node CAN Nodes
756 * \ingroup IfxLld_Multican_Can
757 * \defgroup IfxLld_Multican_Can_Message_Objects Message Objects
758 * \ingroup IfxLld_Multican_Can
759 * \defgroup IfxLld_Multican_Can_Interrupts Interrupts
760 * \ingroup IfxLld_Multican_Can
761 */
762
763 #ifndef IFXMULTICAN_CAN_H
764 #define IFXMULTICAN_CAN_H 1
765
766 /******************************************************************************/
767 /*----------------------------------Includes----------------------------------*/
768 /******************************************************************************/
769
770 #include "Multican/Std/IfxMultican.h"
771 #include "Scu/Std/IfxScuCcu.h"
772 #include "IfxScu_regdef.h"
773
774 /******************************************************************************/
775 /*-----------------------------Data Structures--------------------------------*/
776 /******************************************************************************/
777
778 /** \addtogroup IfxLld_Multican_Can_Data_Structures
779 * \{ */
780 /** \brief Structure for CAN FD configuration
781 */
782 typedef struct
783 {
784 uint32 nominalBaudrate; /**< \brief Specifies the FD nominal baudrate (Nominal Bit Rate) */
785 uint16 nominalSynchJumpWidth; /**< \brief Specifies the FD nominal resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total nominal bit time */
786 uint16 nominalSamplePoint; /**< \brief Specifies the FD nominal sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time */
787 uint32 fastBaudrate; /**< \brief Specifies the FD fast baudrate (Data Bit rate) */
788 uint16 fastSynchJumpWidth; /**< \brief Specifies the FD fast resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total fast bit time */
789 uint16 fastSamplePoint; /**< \brief Specifies the FD fast sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time */
790 uint16 loopDelayOffset; /**< \brief Specifies the transceiver delay ompensation offset that is added to the measured transceiver delay. Range = [0, 15] */
791 } IfxMultican_Can_FdConfig;
792
793 /** \brief Structure for gateway configuration
794 */
795 typedef struct
796 {
797 uint32 copyDataLengthCode : 1; /**< \brief Specifies the choice for copying data length code */
798 uint32 copyData : 1; /**< \brief Specifies the choice for copying data (data low and data high) */
799 uint32 copyId : 1; /**< \brief Specifies the choice for copying id of the message */
800 uint32 enableTransmit : 1; /**< \brief Specifies the enable choice of TXRQ in the destination gateway object (GDFS of source gateway object) */
801 IfxMultican_MsgObjId gatewayDstObjId; /**< \brief Message object number of first slave object (bottom pointer) */
802 } IfxMultican_Can_GatewayConfig;
803
804 /** \brief Structure for interrupt configuration
805 */
806 typedef struct
807 {
808 uint16 priority; /**< \brief interrupt priority */
809 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
810 } IfxMultican_Can_InterruptConfig;
811
812 /** \brief Structure for interrupt source
813 */
814 typedef struct
815 {
816 boolean enabled; /**< \brief If true, enables the interrupt generation */
817 IfxMultican_SrcId srcId; /**< \brief interrupt node pointer used */
818 } IfxMultican_Can_InterruptSource;
819
820 /** \brief Message object control
821 */
822 typedef struct
823 {
824 uint32 singleDataTransfer : 1; /**< \brief Specifies the single data transfer option. If 1, single data transfer is selected */
825 uint32 singleTransmitTrial : 1; /**< \brief Specifies the single transmit trial option. If 1, single transmit trial is selected */
826 IfxMultican_DataLengthCode messageLen; /**< \brief Specifies the length of the transmited data (number of bytes). This value is ignored for receive object */
827 uint32 extendedFrame : 1; /**< \brief Specifies the standard / extended frame mode. 0: standard frame 11 bit ID; 1: extended frame 29 bit ID */
828 uint32 matchingId : 1; /**< \brief Specifies the acceptance mask. 0: standard & extended frame (11 & 29 bit); 1: only frames with maching IDE */
829 IfxMultican_MsgObjId topMsgObjId; /**< \brief Specifies the ID of the message object with data byte 8 to 35. (CAN FD) */
830 IfxMultican_MsgObjId bottomMsgObjId; /**< \brief Specifies the ID of the message object with data byte 36 to 63. (CAN FD) */
831 uint32 fastBitRate : 1; /**< \brief Specifies the bit rate switch. 0: nominal bit rate ; 1: fast bit rate */
832 } IfxMultican_Can_MsgObjControl;
833
834 /** \brief CAN node handle data structure
835 */
836 typedef struct
837 {
838 Ifx_CAN *mcan; /**< \brief Specifies the pointer to the MULTICAN module registers */
839 Ifx_CAN_N *node; /**< \brief Specifies the pointer to the MULTICAN node registers */
840 IfxMultican_NodeId nodeId; /**< \brief Specifies the node Id */
841 boolean fastNode; /**< \brief CAN FD fast node enable/disable */
842 } IfxMultican_Can_Node;
843
844 /** \} */
845
846 /** \addtogroup IfxLld_Multican_Can_Data_Structures
847 * \{ */
848 /** \brief CAN handle data structure
849 */
850 typedef struct
851 {
852 Ifx_CAN *mcan; /**< \brief Specifies the pointer to the MULTICAN module registers */
853 } IfxMultican_Can;
854
855 /** \brief CAN module configuration
856 */
857 typedef struct
858 {
859 Ifx_CAN *module; /**< \brief pointer to MULTICAN module */
860 IfxMultican_ClockSelect clockSelect; /**< \brief Selected module input clock */
861 float32 moduleFreq; /**< \brief Required module frequency in Hertz */
862 IfxMultican_Can_InterruptConfig nodePointer[IFXMULTICAN_NUM_SRC]; /**< \brief Node pointer configuration */
863 } IfxMultican_Can_Config;
864
865 /** \brief CAN message object handle data structure
866 */
867 typedef struct
868 {
869 IfxMultican_Can_Node *node; /**< \brief Specifies the pointer to the node handle */
870 IfxMultican_MsgObjId msgObjId; /**< \brief Specifies the message object ID */
871 uint16 msgObjCount; /**< \brief Number of message object sto be initialised (1 for standard Msg Obj and no. of objects including base object for FIFO transfers) */
872 IfxMultican_MsgObjId fifoPointer; /**< \brief Pointer for FIFO based transfers */
873 } IfxMultican_Can_MsgObj;
874
875 /** \brief CAN message object configuration
876 */
877 typedef struct
878 {
879 IfxMultican_Can_Node *node; /**< \brief Specifies the pointer to the node handle */
880 IfxMultican_MsgObjId msgObjId; /**< \brief Specifies the message object ID */
881 uint16 msgObjCount; /**< \brief Number of message object sto be initialised (1 for standard Msg Obj and no. of objects including base object for FIFO transfers) */
882 IfxMultican_Can_MsgObjControl control; /**< \brief Message object control */
883 IfxMultican_Frame frame; /**< \brief Specifies the frame type */
884 uint32 acceptanceMask; /**< \brief Specifies the acceptance mask */
885 uint32 messageId; /**< \brief Specifies the message ID */
886 IfxMultican_Priority priority; /**< \brief Specifies the message object priority */
887 IfxMultican_Can_InterruptSource rxInterrupt; /**< \brief Rx Interrupt configuration */
888 IfxMultican_Can_InterruptSource txInterrupt; /**< \brief Tx Interrupt configuration */
889 uint32 gatewayTransfers : 1; /**< \brief Specifies the gateway source object (gateway transfres enable / disable choice) */
890 IfxMultican_Can_GatewayConfig gatewayConfig; /**< \brief Structure for gateway configuration */
891 IfxMultican_MsgObjId firstSlaveObjId; /**< \brief Message object number of first slave object (bottom pointer) */
892 } IfxMultican_Can_MsgObjConfig;
893
894 /** \brief CAN Node configuration
895 */
896 typedef struct
897 {
898 Ifx_CAN *module; /**< \brief pointer to MULTICAN module */
899 IfxMultican_NodeId nodeId; /**< \brief Specifies the node Id */
900 boolean analyzerMode; /**< \brief Specifies the analizer mode. If TRUE then the CAN Node works in analizer mode */
901 boolean loopBackMode; /**< \brief Specifies the loop back mode. If TRUE then the CAN Node works in loop back mode */
902 uint32 baudrate; /**< \brief Specifies the baudrate */
903 uint16 samplePoint; /**< \brief Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time */
904 uint16 synchJumpWidth; /**< \brief Specifies the resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total bit time */
905 boolean flexibleDataRate; /**< \brief CANFD enable/disable */
906 IfxMultican_Can_FdConfig fdConfig; /**< \brief Specifies CAN FD configuration */
907 IfxMultican_Rxd_In *rxPin; /**< \brief Specifies the receive pin */
908 IfxPort_InputMode rxPinMode; /**< \brief Specifies the receive pin as input mode */
909 IfxMultican_Txd_Out *txPin; /**< \brief Specifies the transmit pin */
910 IfxPort_OutputMode txPinMode; /**< \brief Specifies the transmit pin output mode */
911 uint8 errorWarningLevel; /**< \brief Specifies the error warinig level */
912 IfxMultican_Can_InterruptSource transferInterrupt; /**< \brief Transfer interrupt */
913 IfxMultican_Can_InterruptSource lastErrorCodeInterrupt; /**< \brief Last error code interrupt */
914 IfxMultican_Can_InterruptSource alertInterrupt; /**< \brief Alert interrupt */
915 IfxMultican_Can_InterruptSource frameCounterInterrupt; /**< \brief Frame counter interrupt */
916 IfxMultican_Can_InterruptSource timerInterrupt; /**< \brief Timer Interrupt */
917 IfxPort_PadDriver pinDriver;
918 } IfxMultican_Can_NodeConfig;
919
920 /** \} */
921
922 /** \addtogroup IfxLld_Multican_Can_General
923 * \{ */
924
925 /******************************************************************************/
926 /*-------------------------Inline Function Prototypes-------------------------*/
927 /******************************************************************************/
928
929 /** \brief Reset the CAN module.\n
930 * Reset and disable the CAN module, inclusive message object and node registers.
931 * \param mcan pointer to the CAN handle
932 * \return None
933 */
934 IFX_INLINE void IfxMultican_Can_deinit(IfxMultican_Can *mcan);
935
936 /******************************************************************************/
937 /*-------------------------Global Function Prototypes-------------------------*/
938 /******************************************************************************/
939
940 /** \brief Return the actual CAN module configuration
941 * \param mcan pointer to the CAN handle
942 * \param config Pointer to the configuration structure, will be filled by this function
943 * \return None
944 */
945 IFX_EXTERN void IfxMultican_Can_getConfig(IfxMultican_Can *mcan, IfxMultican_Can_Config *config);
946
947 /** \brief Get the module frequency
948 * \param mcan pointer to the CAN handle
949 * \return Frequency Value
950 */
951 IFX_EXTERN float32 IfxMultican_Can_getModuleFrequency(IfxMultican_Can *mcan);
952
953 /** \brief Initialize the CAN module\n
954 * The following configuration is used:\n
955 * - The CAN module is stopped during sleep mode\n
956 * - The normal divider mode is selected\n
957 * - The CAN module clock is the system clock
958 * \param mcan pointer to the CAN handle
959 * \param config Specifies pointer to the CAN module configuration
960 * \return Status,: Returns IfxMultican_Status_ok if the operation was successful\n
961 * Returns IfxMultican_Status_notInitialised if the operation was errorneous
962 *
963 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
964 *
965 */
966 IFX_EXTERN IfxMultican_Status IfxMultican_Can_initModule(IfxMultican_Can *mcan, const IfxMultican_Can_Config *config);
967
968 /** \brief Return the default MULTICAN configuration
969 * \param config Default configuration filled by this function
970 * \param mcan base address of the MULTICAN register space
971 * \return None
972 *
973 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
974 *
975 */
976 IFX_EXTERN void IfxMultican_Can_initModuleConfig(IfxMultican_Can_Config *config, Ifx_CAN *mcan);
977
978 /** \} */
979
980 /** \addtogroup IfxLld_Multican_Can_Node
981 * \{ */
982
983 /******************************************************************************/
984 /*-------------------------Inline Function Prototypes-------------------------*/
985 /******************************************************************************/
986
987 /** \brief Activate the CAN Node. Participate in the CAN bus activities
988 * \param node Specifies the CAN node handle to be configured
989 * \return None
990 */
991 IFX_INLINE void IfxMultican_Can_Node_activate(IfxMultican_Can_Node *node);
992
993 /** \brief Deactivate the CAN Node. Take out from participation in the CAN bus activities
994 * \param node Specifies the CAN node handle to be configured
995 * \return None
996 */
997 IFX_INLINE void IfxMultican_Can_Node_deactivate(IfxMultican_Can_Node *node);
998
999 /** \brief Reset the CAN node
1000 * \param node Specifies the CAN node handle to be configured
1001 * \return None
1002 */
1003 IFX_INLINE void IfxMultican_Can_Node_deinit(IfxMultican_Can_Node *node);
1004
1005 /** \brief Recovers the CAN node from bus off
1006 * \param node Specifies the CAN node handle to be configured
1007 * \return Status
1008 *
1009 * IfxMultican_Status status = IfxMultican_Status_busOff;
1010 *
1011 * while (status != IfxMultican_Status_ok)
1012 * {
1013 * status = IfxMultican_Can_Node_recoverBusOff(&canNode);
1014 * }
1015 *
1016 */
1017 IFX_INLINE IfxMultican_Status IfxMultican_Can_Node_recoverBusOff(IfxMultican_Can_Node *node);
1018
1019 /******************************************************************************/
1020 /*-------------------------Global Function Prototypes-------------------------*/
1021 /******************************************************************************/
1022
1023 /** \brief Get the actual message object configuration
1024 * \param node Specifies the CAN node handle to be configured
1025 * \param config Specifies the CAN node configuration
1026 * \return None
1027 */
1028 IFX_EXTERN void IfxMultican_Can_Node_getConfig(IfxMultican_Can_Node *node, IfxMultican_Can_NodeConfig *config);
1029
1030 /** \brief Initialize the CAN node
1031 * \param node Specifies the CAN node handle to be configured
1032 * \param config Specifies the CAN node configuration
1033 * \return Status
1034 *
1035 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1036 *
1037 */
1038 IFX_EXTERN IfxMultican_Status IfxMultican_Can_Node_init(IfxMultican_Can_Node *node, const IfxMultican_Can_NodeConfig *config);
1039
1040 /** \brief Get default CAN node configuration
1041 * \param config Specifies the CAN node configuration
1042 * \param mcan pointer to the CAN handle
1043 * \return None
1044 *
1045 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1046 *
1047 */
1048 IFX_EXTERN void IfxMultican_Can_Node_initConfig(IfxMultican_Can_NodeConfig *config, IfxMultican_Can *mcan);
1049
1050 /** \brief Sends the CAN node into bus off
1051 * \param node Specifies the CAN node handle to be configured
1052 * \return None
1053 *
1054 * IfxMultican_Can_Node_sendToBusOff(&canNode);
1055 *
1056 */
1057 IFX_EXTERN void IfxMultican_Can_Node_sendToBusOff(IfxMultican_Can_Node *node);
1058
1059 /** \} */
1060
1061 /** \addtogroup IfxLld_Multican_Can_Message_Objects
1062 * \{ */
1063
1064 /******************************************************************************/
1065 /*-------------------------Inline Function Prototypes-------------------------*/
1066 /******************************************************************************/
1067
1068 /** \brief Cancel pending TX request by invalidating the request\n
1069 * Only when frame transmission has not been started
1070 * \param msgObj pointer to the CAN message object handle
1071 * \return TRUE if cancellation was successfully executed
1072 */
1073 IFX_INLINE boolean IfxMultican_Can_MsgObj_cancelSend(IfxMultican_Can_MsgObj *msgObj);
1074
1075 /** \brief Clear the RX pending flag of a message object
1076 * \param msgObj pointer to the CAN message object handle
1077 * \return None
1078 *
1079 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1080 *
1081 */
1082 IFX_INLINE void IfxMultican_Can_MsgObj_clearRxPending(IfxMultican_Can_MsgObj *msgObj);
1083
1084 /** \brief Clear the TX pending flag of a message object
1085 * \param msgObj pointer to the CAN message object handle
1086 * \return None
1087 *
1088 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1089 *
1090 */
1091 IFX_INLINE void IfxMultican_Can_MsgObj_clearTxPending(IfxMultican_Can_MsgObj *msgObj);
1092
1093 /** \brief Reset the message object\n
1094 * Append the message object to the end of idle list and reset message object registers
1095 * \param msgObj pointer to the CAN message object handle
1096 * \return None
1097 */
1098 IFX_INLINE void IfxMultican_Can_MsgObj_deinit(IfxMultican_Can_MsgObj *msgObj);
1099
1100 /** \brief Get message object ID which has TX/RX pending flag from a message object group
1101 * \param msgObj pointer to the CAN message object handle
1102 * \param msgObjGroup Message object group
1103 * \return Message Object Id
1104 */
1105 IFX_INLINE IfxMultican_MsgObjId IfxMultican_Can_MsgObj_getPendingId(IfxMultican_Can_MsgObj *msgObj, IfxMultican_MsgObjGroup msgObjGroup);
1106
1107 /** \brief Get the message object status
1108 * \param msgObj pointer to the CAN message object handle
1109 * \return \ref IfxMultican_MsgObjStat bitfield
1110 *
1111 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1112 *
1113 */
1114 IFX_INLINE IfxMultican_MsgObjStat IfxMultican_Can_MsgObj_getStatus(IfxMultican_Can_MsgObj *msgObj);
1115
1116 /** \brief Read a received CAN message
1117 * \param msgObj pointer to the CAN message object handle
1118 * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful
1119 * \param data Pointer to data (in words)
1120 * \return IfxMultican_Status_newData: if the operation was successful\n
1121 * IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully\n
1122 * IfxMultican_Status_messageLost: if the message lost and new data is not yet ready\n
1123 * IfxMultican_Status_receiveEmpty: if no message is been received
1124 *
1125 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1126 *
1127 */
1128 IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_readLongFrame(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data);
1129
1130 /** \brief Read a received CAN message
1131 * \param msgObj pointer to the CAN message object handle
1132 * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful
1133 * \param data Pointer to data (in words)
1134 * \return IfxMultican_Status_ok: if the operation was successful
1135 * IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy
1136 *
1137 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1138 *
1139 */
1140 IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_sendLongFrame(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data);
1141
1142 /******************************************************************************/
1143 /*-------------------------Global Function Prototypes-------------------------*/
1144 /******************************************************************************/
1145
1146 /** \brief Get the actual message object configuration
1147 * \param msgObj pointer to the CAN message object handle
1148 * \param config Pointer to the RAM buffer. Filled by this function
1149 * \return None
1150 */
1151 IFX_EXTERN void IfxMultican_Can_MsgObj_getConfig(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Can_MsgObjConfig *config);
1152
1153 /** \brief Initialize the message object
1154 * \param msgObj pointer to the CAN message object handle
1155 * \param config pointer to the CAN message object configuration
1156 * \return Status
1157 *
1158 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1159 *
1160 */
1161 IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_init(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Can_MsgObjConfig *config);
1162
1163 /** \brief Initialise message config with default values and the given parameters
1164 * \param config pointer to the CAN message object configuration
1165 * \param node pointer to the CAN node handle to which the message object should be assigned
1166 * \return None
1167 *
1168 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1169 *
1170 */
1171 IFX_EXTERN void IfxMultican_Can_MsgObj_initConfig(IfxMultican_Can_MsgObjConfig *config, IfxMultican_Can_Node *node);
1172
1173 /** \brief Returns the RX pending flag of a message object.
1174 * \param msgObj pointer to the CAN message object handle
1175 * \return TRUE of the RX pending flag of a message object is set
1176 */
1177 IFX_EXTERN boolean IfxMultican_Can_MsgObj_isRxPending(IfxMultican_Can_MsgObj *msgObj);
1178
1179 /** \brief Returns the TX Request flag of a message object.
1180 * \param msgObj pointer to the CAN message object handle
1181 * \return TRUE of the TX Request flag of a message object is set
1182 */
1183 IFX_EXTERN boolean IfxMultican_Can_MsgObj_isTransmitRequested(IfxMultican_Can_MsgObj *msgObj);
1184
1185 /** \brief Returns the TX pending flag of a message object.
1186 * \param msgObj pointer to the CAN message object handle
1187 * \return TRUE of the TX pending flag of a message object is set
1188 */
1189 IFX_EXTERN boolean IfxMultican_Can_MsgObj_isTxPending(IfxMultican_Can_MsgObj *msgObj);
1190
1191 /** \brief Read a received CAN message
1192 * \param msgObj pointer to the CAN message object handle
1193 * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful
1194 * \return IfxMultican_Status_newData: if the operation was successful\n
1195 * IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully\n
1196 * IfxMultican_Status_messageLost: if the message lost and new data is not yet ready\n
1197 * IfxMultican_Status_receiveEmpty: if no message is been received
1198 *
1199 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1200 *
1201 */
1202 IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_readMessage(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg);
1203
1204 /** \brief Send a CAN message
1205 * \param msgObj pointer to the CAN message object handle
1206 * \param msg Specifies the msg to be send
1207 * \return IfxMultican_Status_ok: if the operation was successful\n
1208 * IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy
1209 *
1210 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1211 *
1212 */
1213 IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_sendMessage(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Message *msg);
1214
1215 /** \} */
1216
1217 /******************************************************************************/
1218 /*---------------------Inline Function Implementations------------------------*/
1219 /******************************************************************************/
1220
1221 IFX_INLINE boolean IfxMultican_Can_MsgObj_cancelSend(IfxMultican_Can_MsgObj *msgObj)
1222 {
1223 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
1224
1225 return IfxMultican_MsgObj_cancelSend(hwObj);
1226 }
1227
1228
1229 IFX_INLINE void IfxMultican_Can_MsgObj_clearRxPending(IfxMultican_Can_MsgObj *msgObj)
1230 {
1231 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
1232
1233 IfxMultican_MsgObj_clearRxPending(hwObj);
1234 }
1235
1236
1237 IFX_INLINE void IfxMultican_Can_MsgObj_clearTxPending(IfxMultican_Can_MsgObj *msgObj)
1238 {
1239 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
1240
1241 IfxMultican_MsgObj_clearTxPending(hwObj);
1242 }
1243
1244
1245 IFX_INLINE void IfxMultican_Can_MsgObj_deinit(IfxMultican_Can_MsgObj *msgObj)
1246 {
1247 IfxMultican_MsgObj_deinit(msgObj->node->mcan, msgObj->msgObjId);
1248 }
1249
1250
1251 IFX_INLINE IfxMultican_MsgObjId IfxMultican_Can_MsgObj_getPendingId(IfxMultican_Can_MsgObj *msgObj, IfxMultican_MsgObjGroup msgObjGroup)
1252 {
1253 return IfxMultican_MsgObj_getPendingId(msgObj->node->mcan, msgObjGroup);
1254 }
1255
1256
1257 IFX_INLINE IfxMultican_MsgObjStat IfxMultican_Can_MsgObj_getStatus(IfxMultican_Can_MsgObj *msgObj)
1258 {
1259 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
1260
1261 return IfxMultican_MsgObj_getStatus(hwObj);
1262 }
1263
1264
1265 IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_readLongFrame(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
1266 {
1267 return IfxMultican_MsgObj_readLongFrame(msgObj->node->mcan, msgObj->msgObjId, msg, data);
1268 }
1269
1270
1271 IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_sendLongFrame(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
1272 {
1273 return IfxMultican_MsgObj_sendLongFrame(msgObj->node->mcan, msgObj->msgObjId, msg, data);
1274 }
1275
1276
1277 IFX_INLINE void IfxMultican_Can_Node_activate(IfxMultican_Can_Node *node)
1278 {
1279 Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(node->mcan, node->nodeId);
1280
1281 IfxMultican_Node_activate(hwNode);
1282 }
1283
1284
1285 IFX_INLINE void IfxMultican_Can_Node_deactivate(IfxMultican_Can_Node *node)
1286 {
1287 Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(node->mcan, node->nodeId);
1288 IfxMultican_Node_deactivate(hwNode);
1289 }
1290
1291
1292 IFX_INLINE void IfxMultican_Can_Node_deinit(IfxMultican_Can_Node *node)
1293 {
1294 Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(node->mcan, node->nodeId);
1295
1296 IfxMultican_Node_deinit(hwNode);
1297 }
1298
1299
1300 IFX_INLINE IfxMultican_Status IfxMultican_Can_Node_recoverBusOff(IfxMultican_Can_Node *node)
1301 {
1302 Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(node->mcan, node->nodeId);
1303
1304 return IfxMultican_Node_recoverBusOff(hwNode);
1305 }
1306
1307
1308 IFX_INLINE void IfxMultican_Can_deinit(IfxMultican_Can *mcan)
1309 {
1310 IfxMultican_deinit(mcan->mcan);
1311 }
1312
1313
1314 #endif /* IFXMULTICAN_CAN_H */
IfxMultican_Can_Config::moduleFreq
float32 moduleFreq
Required module frequency in Hertz.
Definition: IfxMultican_Can.h:861
IfxMultican_Can_FdConfig::loopDelayOffset
uint16 loopDelayOffset
Specifies the transceiver delay ompensation offset that is added to the measured transceiver delay...
Definition: IfxMultican_Can.h:790
IfxMultican_Can_initModuleConfig
IFX_EXTERN void IfxMultican_Can_initModuleConfig(IfxMultican_Can_Config *config, Ifx_CAN *mcan)
Return the default MULTICAN configuration.
Definition: IfxMultican_Can.c:1055
IfxMultican_Can_MsgObj::msgObjCount
uint16 msgObjCount
Number of message object sto be initialised (1 for standard Msg Obj and no. of objects including base...
Definition: IfxMultican_Can.h:871
IfxMultican_Can_NodeConfig::fdConfig
IfxMultican_Can_FdConfig fdConfig
Specifies CAN FD configuration.
Definition: IfxMultican_Can.h:906
IfxMultican_Can_NodeConfig::frameCounterInterrupt
IfxMultican_Can_InterruptSource frameCounterInterrupt
Frame counter interrupt.
Definition: IfxMultican_Can.h:915
IfxMultican_Can_MsgObjConfig::gatewayConfig
IfxMultican_Can_GatewayConfig gatewayConfig
Structure for gateway configuration.
Definition: IfxMultican_Can.h:890
IfxMultican_Can_MsgObj_getConfig
IFX_EXTERN void IfxMultican_Can_MsgObj_getConfig(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Can_MsgObjConfig *config)
Get the actual message object configuration.
Definition: IfxMultican_Can.c:52
IfxMultican_Can_MsgObjConfig::txInterrupt
IfxMultican_Can_InterruptSource txInterrupt
Tx Interrupt configuration.
Definition: IfxMultican_Can.h:888
IfxMultican_Node_getPointer
IFX_INLINE Ifx_CAN_N * IfxMultican_Node_getPointer(Ifx_CAN *mcan, IfxMultican_NodeId node)
Returns the base address to a given CAN node number.
Definition: IfxMultican.h:1419
IfxMultican_Can_MsgObjConfig::frame
IfxMultican_Frame frame
Specifies the frame type.
Definition: IfxMultican_Can.h:883
IfxMultican_Can_MsgObj_isTxPending
IFX_EXTERN boolean IfxMultican_Can_MsgObj_isTxPending(IfxMultican_Can_MsgObj *msgObj)
Returns the TX pending flag of a message object.
Definition: IfxMultican_Can.c:641
IfxMultican_MsgObj_clearRxPending
IFX_INLINE void IfxMultican_MsgObj_clearRxPending(Ifx_CAN_MO *hwObj)
Clear the RX pending flag of a message object.
Definition: IfxMultican.h:1168
IfxMultican_Can_FdConfig::nominalSynchJumpWidth
uint16 nominalSynchJumpWidth
Specifies the FD nominal resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total nominal bit time.
Definition: IfxMultican_Can.h:785
IfxMultican_Node_recoverBusOff
IfxMultican_Status IfxMultican_Node_recoverBusOff(Ifx_CAN_N *hwNode)
Recovers the CAN node from bus off.
Definition: IfxMultican.c:640
IfxMultican_Can_MsgObjConfig::acceptanceMask
uint32 acceptanceMask
Specifies the acceptance mask.
Definition: IfxMultican_Can.h:884
IfxMultican_MsgObj_getStatus
IfxMultican_MsgObjStat IfxMultican_MsgObj_getStatus(Ifx_CAN_MO *hwObj)
Get the message object status.
Definition: IfxMultican.c:229
IfxMultican_Message
CAN message definition.
Definition: IfxMultican.h:241
IfxMultican_Can_Node::fastNode
boolean fastNode
CAN FD fast node enable/disable.
Definition: IfxMultican_Can.h:841
IfxMultican_Can_FdConfig::nominalSamplePoint
uint16 nominalSamplePoint
Specifies the FD nominal sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time...
Definition: IfxMultican_Can.h:786
IfxMultican_Rxd_In
RXD pin mapping structure.
Definition: IfxMultican_PinMap.h:56
IfxMultican_Can_NodeConfig::rxPinMode
IfxPort_InputMode rxPinMode
Specifies the receive pin as input mode.
Definition: IfxMultican_Can.h:908
IfxMultican_Can_FdConfig::nominalBaudrate
uint32 nominalBaudrate
Specifies the FD nominal baudrate (Nominal Bit Rate)
Definition: IfxMultican_Can.h:784
IfxMultican_Can_Node::mcan
Ifx_CAN * mcan
Specifies the pointer to the MULTICAN module registers.
Definition: IfxMultican_Can.h:838
IfxMultican_Can_MsgObj_readMessage
IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_readMessage(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg)
Read a received CAN message.
Definition: IfxMultican_Can.c:658
IfxMultican_Can_MsgObj_deinit
IFX_INLINE void IfxMultican_Can_MsgObj_deinit(IfxMultican_Can_MsgObj *msgObj)
Reset the message object Append the message object to the end of idle list and reset message object r...
Definition: IfxMultican_Can.h:1245
IfxMultican_Can_Config::module
Ifx_CAN * module
pointer to MULTICAN module
Definition: IfxMultican_Can.h:859
IfxMultican_Can_deinit
IFX_INLINE void IfxMultican_Can_deinit(IfxMultican_Can *mcan)
Reset the CAN module. Reset and disable the CAN module, inclusive message object and node registers...
Definition: IfxMultican_Can.h:1308
IfxMultican_Can_MsgObj_init
IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_init(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Can_MsgObjConfig *config)
Initialize the message object.
Definition: IfxMultican_Can.c:78
IfxMultican_MsgObj_cancelSend
boolean IfxMultican_MsgObj_cancelSend(Ifx_CAN_MO *hwObj)
Cancel pending TX request by invalidating the request, only when frame transmission has not been star...
Definition: IfxMultican.c:72
IfxMultican_Can_MsgObjConfig::control
IfxMultican_Can_MsgObjControl control
Message object control.
Definition: IfxMultican_Can.h:882
IfxMultican_Can_InterruptSource::enabled
boolean enabled
If true, enables the interrupt generation.
Definition: IfxMultican_Can.h:816
IfxMultican_Can_MsgObj_getPendingId
IFX_INLINE IfxMultican_MsgObjId IfxMultican_Can_MsgObj_getPendingId(IfxMultican_Can_MsgObj *msgObj, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group.
Definition: IfxMultican_Can.h:1251
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxMultican_Can_NodeConfig::transferInterrupt
IfxMultican_Can_InterruptSource transferInterrupt
Transfer interrupt.
Definition: IfxMultican_Can.h:912
float32
float float32
Definition: Platform_Types.h:170
IfxMultican_Can_InterruptConfig::priority
uint16 priority
interrupt priority
Definition: IfxMultican_Can.h:808
IfxMultican_Can_InterruptConfig
Structure for interrupt configuration.
Definition: IfxMultican_Can.h:806
IfxMultican_Node_activate
IFX_INLINE void IfxMultican_Node_activate(Ifx_CAN_N *hwNode)
Activate the CAN Node. Participate in the CAN bus activities.
Definition: IfxMultican.h:1395
IfxMultican_Can_NodeConfig
CAN Node configuration.
Definition: IfxMultican_Can.h:896
IfxMultican_Node_deinit
void IfxMultican_Node_deinit(Ifx_CAN_N *hwNode)
Reset the CAN node.
Definition: IfxMultican.c:609
IfxMultican_Can_GatewayConfig::copyData
uint32 copyData
Specifies the choice for copying data (data low and data high)
Definition: IfxMultican_Can.h:798
IfxMultican_Can_Node::node
Ifx_CAN_N * node
Specifies the pointer to the MULTICAN node registers.
Definition: IfxMultican_Can.h:839
IfxMultican_Can_MsgObj_initConfig
IFX_EXTERN void IfxMultican_Can_MsgObj_initConfig(IfxMultican_Can_MsgObjConfig *config, IfxMultican_Can_Node *node)
Initialise message config with default values and the given parameters.
Definition: IfxMultican_Can.c:570
IfxMultican_Can_NodeConfig::flexibleDataRate
boolean flexibleDataRate
CANFD enable/disable.
Definition: IfxMultican_Can.h:905
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxMultican_Can_MsgObjControl::matchingId
uint32 matchingId
Specifies the acceptance mask. 0: standard & extended frame (11 & 29 bit); 1: only frames with machin...
Definition: IfxMultican_Can.h:828
IfxMultican_Can_MsgObjConfig::priority
IfxMultican_Priority priority
Specifies the message object priority.
Definition: IfxMultican_Can.h:886
IfxMultican_Can_MsgObj_isTransmitRequested
IFX_EXTERN boolean IfxMultican_Can_MsgObj_isTransmitRequested(IfxMultican_Can_MsgObj *msgObj)
Returns the TX Request flag of a message object.
Definition: IfxMultican_Can.c:624
IfxMultican_Can_NodeConfig::txPin
IfxMultican_Txd_Out * txPin
Specifies the transmit pin.
Definition: IfxMultican_Can.h:909
IfxMultican_Can_NodeConfig::synchJumpWidth
uint16 synchJumpWidth
Specifies the resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total bit time...
Definition: IfxMultican_Can.h:904
IfxMultican_SrcId
IfxMultican_SrcId
Service request ID
Definition: IfxMultican_cfg.h:108
IfxMultican_Can_FdConfig::fastBaudrate
uint32 fastBaudrate
Specifies the FD fast baudrate (Data Bit rate)
Definition: IfxMultican_Can.h:787
IfxMultican_NodeId
IfxMultican_NodeId
CAN Nodes definition
Definition: IfxMultican_cfg.h:97
IfxMultican_Can_GatewayConfig::copyDataLengthCode
uint32 copyDataLengthCode
Specifies the choice for copying data length code.
Definition: IfxMultican_Can.h:797
IfxMultican_Node_deactivate
IFX_INLINE void IfxMultican_Node_deactivate(Ifx_CAN_N *hwNode)
Deactivate the CAN Node. Take out from participation in the CAN bus activities.
Definition: IfxMultican.h:1401
IfxMultican_MsgObj_sendLongFrame
IfxMultican_Status IfxMultican_MsgObj_sendLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Send a CAN Long frame message.
Definition: IfxMultican.c:361
IfxMultican_MsgObj_clearTxPending
IFX_INLINE void IfxMultican_MsgObj_clearTxPending(Ifx_CAN_MO *hwObj)
Clear the TX pending flag of a message object.
Definition: IfxMultican.h:1174
IfxMultican_Can_MsgObj_sendLongFrame
IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_sendLongFrame(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
Read a received CAN message.
Definition: IfxMultican_Can.h:1271
IfxMultican_Can_Node_initConfig
IFX_EXTERN void IfxMultican_Can_Node_initConfig(IfxMultican_Can_NodeConfig *config, IfxMultican_Can *mcan)
Get default CAN node configuration.
Definition: IfxMultican_Can.c:852
IfxMultican_Can_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxMultican_Can.h:809
IfxMultican_Priority
IfxMultican_Priority
CAN priorities.
Definition: IfxMultican.h:192
IfxMultican_MsgObj_getPendingId
IfxMultican_MsgObjId IfxMultican_MsgObj_getPendingId(Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group.
Definition: IfxMultican.c:214
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxMultican_Can_GatewayConfig::enableTransmit
uint32 enableTransmit
Specifies the enable choice of TXRQ in the destination gateway object (GDFS of source gateway object)...
Definition: IfxMultican_Can.h:800
IfxMultican_Can_Config
CAN module configuration.
Definition: IfxMultican_Can.h:857
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxMultican_Can_Node_getConfig
IFX_EXTERN void IfxMultican_Can_Node_getConfig(IfxMultican_Can_Node *node, IfxMultican_Can_NodeConfig *config)
Get the actual message object configuration.
Definition: IfxMultican_Can.c:748
IfxMultican_Can_NodeConfig::timerInterrupt
IfxMultican_Can_InterruptSource timerInterrupt
Timer Interrupt.
Definition: IfxMultican_Can.h:916
IfxMultican_Can_MsgObj_sendMessage
IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_sendMessage(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Message *msg)
Send a CAN message.
Definition: IfxMultican_Can.c:698
IfxMultican_ClockSelect
IfxMultican_ClockSelect
CAN input clock selection.
Definition: IfxMultican.h:87
IfxMultican_MsgObj_readLongFrame
IfxMultican_Status IfxMultican_MsgObj_readLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Read a received CAN long frame.
Definition: IfxMultican.c:247
IfxMultican_Can_getModuleFrequency
IFX_EXTERN float32 IfxMultican_Can_getModuleFrequency(IfxMultican_Can *mcan)
Get the module frequency.
Definition: IfxMultican_Can.c:955
IfxMultican_Can_MsgObjControl::messageLen
IfxMultican_DataLengthCode messageLen
Specifies the length of the transmited data (number of bytes). This value is ignored for receive obje...
Definition: IfxMultican_Can.h:826
IfxMultican_Can_Node_deactivate
IFX_INLINE void IfxMultican_Can_Node_deactivate(IfxMultican_Can_Node *node)
Deactivate the CAN Node. Take out from participation in the CAN bus activities.
Definition: IfxMultican_Can.h:1285
IfxMultican_Can_Node_sendToBusOff
IFX_EXTERN void IfxMultican_Can_Node_sendToBusOff(IfxMultican_Can_Node *node)
Sends the CAN node into bus off.
Definition: IfxMultican_Can.c:900
IfxMultican_Can_NodeConfig::loopBackMode
boolean loopBackMode
Specifies the loop back mode. If TRUE then the CAN Node works in loop back mode.
Definition: IfxMultican_Can.h:901
IfxMultican_Can_MsgObjControl::fastBitRate
uint32 fastBitRate
Specifies the bit rate switch. 0: nominal bit rate ; 1: fast bit rate.
Definition: IfxMultican_Can.h:831
IfxMultican_Can_NodeConfig::baudrate
uint32 baudrate
Specifies the baudrate.
Definition: IfxMultican_Can.h:902
IfxMultican.h
MULTICAN basic functionality.
IfxMultican_Can_NodeConfig::txPinMode
IfxPort_OutputMode txPinMode
Specifies the transmit pin output mode.
Definition: IfxMultican_Can.h:910
IfxMultican_Can_NodeConfig::pinDriver
IfxPort_PadDriver pinDriver
Definition: IfxMultican_Can.h:917
IfxMultican_Can_MsgObj_clearTxPending
IFX_INLINE void IfxMultican_Can_MsgObj_clearTxPending(IfxMultican_Can_MsgObj *msgObj)
Clear the TX pending flag of a message object.
Definition: IfxMultican_Can.h:1237
IfxMultican_MsgObjId
sint32 IfxMultican_MsgObjId
Message object ID, 0 .. IFXMULTICAN_NUM_MESSAGE_OBJECTS.
Definition: IfxMultican.h:77
IfxMultican_Can_MsgObjControl::topMsgObjId
IfxMultican_MsgObjId topMsgObjId
Specifies the ID of the message object with data byte 8 to 35. (CAN FD)
Definition: IfxMultican_Can.h:829
IfxMultican_Can_MsgObjConfig::firstSlaveObjId
IfxMultican_MsgObjId firstSlaveObjId
Message object number of first slave object (bottom pointer)
Definition: IfxMultican_Can.h:891
IfxMultican_Can_InterruptSource
Structure for interrupt source.
Definition: IfxMultican_Can.h:814
IfxMultican_Can_FdConfig
Structure for CAN FD configuration.
Definition: IfxMultican_Can.h:782
IfxMultican_Can_MsgObj_readLongFrame
IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_readLongFrame(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
Read a received CAN message.
Definition: IfxMultican_Can.h:1265
IfxMultican_Can_NodeConfig::analyzerMode
boolean analyzerMode
Specifies the analizer mode. If TRUE then the CAN Node works in analizer mode.
Definition: IfxMultican_Can.h:900
IfxMultican_Txd_Out
TXD pin mapping structure.
Definition: IfxMultican_PinMap.h:65
IfxMultican_Can_MsgObj::node
IfxMultican_Can_Node * node
Specifies the pointer to the node handle.
Definition: IfxMultican_Can.h:869
IfxMultican_Can_Node_deinit
IFX_INLINE void IfxMultican_Can_Node_deinit(IfxMultican_Can_Node *node)
Reset the CAN node.
Definition: IfxMultican_Can.h:1292
IfxMultican_Can_GatewayConfig
Structure for gateway configuration.
Definition: IfxMultican_Can.h:795
IfxMultican_Can_MsgObj_getStatus
IFX_INLINE IfxMultican_MsgObjStat IfxMultican_Can_MsgObj_getStatus(IfxMultican_Can_MsgObj *msgObj)
Get the message object status.
Definition: IfxMultican_Can.h:1257
IfxMultican_MsgObjGroup
IfxMultican_MsgObjGroup
CAN message object group Each group consists of 32 consecutive message objects.
Definition: IfxMultican.h:147
IfxMultican_Can_MsgObjControl::singleTransmitTrial
uint32 singleTransmitTrial
Specifies the single transmit trial option. If 1, single transmit trial is selected.
Definition: IfxMultican_Can.h:825
IfxMultican_Can_MsgObj_clearRxPending
IFX_INLINE void IfxMultican_Can_MsgObj_clearRxPending(IfxMultican_Can_MsgObj *msgObj)
Clear the RX pending flag of a message object.
Definition: IfxMultican_Can.h:1229
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxMultican_MsgObjStat
Message object status bit-fields.
Definition: IfxMultican.h:251
IfxMultican_Can_Node_init
IFX_EXTERN IfxMultican_Status IfxMultican_Can_Node_init(IfxMultican_Can_Node *node, const IfxMultican_Can_NodeConfig *config)
Initialize the CAN node.
Definition: IfxMultican_Can.c:765
IfxMultican_Can_MsgObjConfig::messageId
uint32 messageId
Specifies the message ID.
Definition: IfxMultican_Can.h:885
IfxMultican_Can_MsgObjControl::singleDataTransfer
uint32 singleDataTransfer
Specifies the single data transfer option. If 1, single data transfer is selected.
Definition: IfxMultican_Can.h:824
IfxMultican_Can_initModule
IFX_EXTERN IfxMultican_Status IfxMultican_Can_initModule(IfxMultican_Can *mcan, const IfxMultican_Can_Config *config)
Initialize the CAN module The following configuration is used: .
Definition: IfxMultican_Can.c:965
IfxMultican_deinit
void IfxMultican_deinit(Ifx_CAN *mcan)
Reset the CAN module Reset and disable the CAN module, inclusive message object and node registers...
Definition: IfxMultican.c:1178
IfxMultican_Can_GatewayConfig::copyId
uint32 copyId
Specifies the choice for copying id of the message.
Definition: IfxMultican_Can.h:799
IfxMultican_Can_MsgObj
CAN message object handle data structure.
Definition: IfxMultican_Can.h:867
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxMultican_Can_InterruptSource::srcId
IfxMultican_SrcId srcId
interrupt node pointer used
Definition: IfxMultican_Can.h:817
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxMultican_Can_NodeConfig::rxPin
IfxMultican_Rxd_In * rxPin
Specifies the receive pin.
Definition: IfxMultican_Can.h:907
IfxMultican_Can_FdConfig::fastSynchJumpWidth
uint16 fastSynchJumpWidth
Specifies the FD fast resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total ...
Definition: IfxMultican_Can.h:788
IfxMultican_Can_NodeConfig::alertInterrupt
IfxMultican_Can_InterruptSource alertInterrupt
Alert interrupt.
Definition: IfxMultican_Can.h:914
IfxMultican_DataLengthCode
IfxMultican_DataLengthCode
CAN frame data length code Definition in Ifx_CAN.MOFCRx.DLC.
Definition: IfxMultican.h:98
IfxMultican_Can_MsgObj_cancelSend
IFX_INLINE boolean IfxMultican_Can_MsgObj_cancelSend(IfxMultican_Can_MsgObj *msgObj)
Cancel pending TX request by invalidating the request Only when frame transmission has not been start...
Definition: IfxMultican_Can.h:1221
IfxMultican_MsgObj_getPointer
IFX_INLINE Ifx_CAN_MO * IfxMultican_MsgObj_getPointer(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Get base address of a message object register.
Definition: IfxMultican.h:1206
IfxMultican_MsgObj_deinit
void IfxMultican_MsgObj_deinit(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Reset the message object Append the message object to the end of idle list and reset message object r...
Definition: IfxMultican.c:102
IfxMultican_Status
IfxMultican_Status
CAN API status definition.
Definition: IfxMultican.h:209
IfxMultican_Can_FdConfig::fastSamplePoint
uint16 fastSamplePoint
Specifies the FD fast sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time...
Definition: IfxMultican_Can.h:789
IfxMultican_Can_Node
CAN node handle data structure.
Definition: IfxMultican_Can.h:836
IfxMultican_Can_NodeConfig::errorWarningLevel
uint8 errorWarningLevel
Specifies the error warinig level.
Definition: IfxMultican_Can.h:911
IfxMultican_Can_MsgObjConfig::gatewayTransfers
uint32 gatewayTransfers
Specifies the gateway source object (gateway transfres enable / disable choice)
Definition: IfxMultican_Can.h:889
IfxMultican_Can_getConfig
IFX_EXTERN void IfxMultican_Can_getConfig(IfxMultican_Can *mcan, IfxMultican_Can_Config *config)
Return the actual CAN module configuration.
Definition: IfxMultican_Can.c:916
IfxMultican_Can
CAN handle data structure.
Definition: IfxMultican_Can.h:850
IFXMULTICAN_NUM_SRC
#define IFXMULTICAN_NUM_SRC
Number of service requests.
Definition: IfxMultican_cfg.h:73
IfxMultican_Can_MsgObj::fifoPointer
IfxMultican_MsgObjId fifoPointer
Pointer for FIFO based transfers.
Definition: IfxMultican_Can.h:872
IfxMultican_Can_Config::clockSelect
IfxMultican_ClockSelect clockSelect
Selected module input clock.
Definition: IfxMultican_Can.h:860
IfxMultican_Can_Node_activate
IFX_INLINE void IfxMultican_Can_Node_activate(IfxMultican_Can_Node *node)
Activate the CAN Node. Participate in the CAN bus activities.
Definition: IfxMultican_Can.h:1277
IfxMultican_Can_NodeConfig::lastErrorCodeInterrupt
IfxMultican_Can_InterruptSource lastErrorCodeInterrupt
Last error code interrupt.
Definition: IfxMultican_Can.h:913
IfxMultican_Can_GatewayConfig::gatewayDstObjId
IfxMultican_MsgObjId gatewayDstObjId
Message object number of first slave object (bottom pointer)
Definition: IfxMultican_Can.h:801
IfxMultican_Can_MsgObjControl::extendedFrame
uint32 extendedFrame
Specifies the standard / extended frame mode. 0: standard frame 11 bit ID; 1: extended frame 29 bit I...
Definition: IfxMultican_Can.h:827
IfxMultican_Can_MsgObj_isRxPending
IFX_EXTERN boolean IfxMultican_Can_MsgObj_isRxPending(IfxMultican_Can_MsgObj *msgObj)
Returns the RX pending flag of a message object.
Definition: IfxMultican_Can.c:609
IfxMultican_Can_MsgObjControl
Message object control.
Definition: IfxMultican_Can.h:822
IfxMultican_Frame
IfxMultican_Frame
CAN frame type.
Definition: IfxMultican.h:120
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxMultican_Can_MsgObjControl::bottomMsgObjId
IfxMultican_MsgObjId bottomMsgObjId
Specifies the ID of the message object with data byte 36 to 63. (CAN FD)
Definition: IfxMultican_Can.h:830
IfxMultican_Can_MsgObjConfig
CAN message object configuration.
Definition: IfxMultican_Can.h:877
IfxMultican_Can_NodeConfig::samplePoint
uint16 samplePoint
Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
Definition: IfxMultican_Can.h:903
IfxMultican_Can_MsgObj::msgObjId
IfxMultican_MsgObjId msgObjId
Specifies the message object ID.
Definition: IfxMultican_Can.h:870
IfxMultican_Can_MsgObjConfig::rxInterrupt
IfxMultican_Can_InterruptSource rxInterrupt
Rx Interrupt configuration.
Definition: IfxMultican_Can.h:887
IfxMultican_Can_Node_recoverBusOff
IFX_INLINE IfxMultican_Status IfxMultican_Can_Node_recoverBusOff(IfxMultican_Can_Node *node)
Recovers the CAN node from bus off.
Definition: IfxMultican_Can.h:1300
IfxMultican_Can_Node::nodeId
IfxMultican_NodeId nodeId
Specifies the node Id.
Definition: IfxMultican_Can.h:840


iLLD_TC26B: IfxMultican_PinMap.c Source File

  • _PinMap
IfxMultican_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxMultican_PinMap.c
3 * \brief MULTICAN I/O map
4 * \ingroup IfxLld_Multican
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxMultican_PinMap.h"
44
45 IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 1}, Ifx_RxSel_a};
46 IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P20, 7}, Ifx_RxSel_b};
47 IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 4}, Ifx_RxSel_d};
48 IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P33, 7}, Ifx_RxSel_e};
49 IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P15, 3}, Ifx_RxSel_a};
50 IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P14, 1}, Ifx_RxSel_b};
51 IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P00, 1}, Ifx_RxSel_d};
52 IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P15, 1}, Ifx_RxSel_a};
53 IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P02, 3}, Ifx_RxSel_b};
54 IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P14, 8}, Ifx_RxSel_d};
55 IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P10, 2}, Ifx_RxSel_e};
56 IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P00, 3}, Ifx_RxSel_a};
57 IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P32, 2}, Ifx_RxSel_b};
58 IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 0}, Ifx_RxSel_c};
59 IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P11,10}, Ifx_RxSel_d};
60 IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 9}, Ifx_RxSel_e};
61 IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt5};
62 IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt2};
63 IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt5};
64 IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt5};
65 IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt5};
66 IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt5};
67 IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt5};
68 IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt5};
69 IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt6};
70 IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P14,10}, IfxPort_OutputIdx_alt5};
71 IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt5};
72 IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt5};
73 IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P11,12}, IfxPort_OutputIdx_alt5};
74 IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20,10}, IfxPort_OutputIdx_alt5};
75 IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt5};
76 IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt5};
77
78
79 const IfxMultican_Rxd_In *IfxMultican_Rxd_In_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS] = {
80 {
81 {
82 &IfxMultican_RXD0A_P02_1_IN,
83 &IfxMultican_RXD0B_P20_7_IN,
84 NULL_PTR,
85 &IfxMultican_RXD0D_P02_4_IN,
86 &IfxMultican_RXD0E_P33_7_IN
87 },
88 {
89 &IfxMultican_RXD1A_P15_3_IN,
90 &IfxMultican_RXD1B_P14_1_IN,
91 NULL_PTR,
92 &IfxMultican_RXD1D_P00_1_IN,
93 NULL_PTR
94 },
95 {
96 &IfxMultican_RXD2A_P15_1_IN,
97 &IfxMultican_RXD2B_P02_3_IN,
98 NULL_PTR,
99 &IfxMultican_RXD2D_P14_8_IN,
100 &IfxMultican_RXD2E_P10_2_IN
101 },
102 {
103 &IfxMultican_RXD3A_P00_3_IN,
104 &IfxMultican_RXD3B_P32_2_IN,
105 &IfxMultican_RXD3C_P20_0_IN,
106 &IfxMultican_RXD3D_P11_10_IN,
107 &IfxMultican_RXD3E_P20_9_IN
108 }
109 }
110 };
111
112 const IfxMultican_Txd_Out *IfxMultican_Txd_Out_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS] = {
113 {
114 {
115 &IfxMultican_TXD0_P02_0_OUT,
116 &IfxMultican_TXD0_P02_5_OUT,
117 &IfxMultican_TXD0_P20_8_OUT,
118 &IfxMultican_TXD0_P33_8_OUT,
119 NULL_PTR
120 },
121 {
122 &IfxMultican_TXD1_P00_0_OUT,
123 &IfxMultican_TXD1_P14_0_OUT,
124 &IfxMultican_TXD1_P15_2_OUT,
125 NULL_PTR,
126 NULL_PTR
127 },
128 {
129 &IfxMultican_TXD2_P02_2_OUT,
130 &IfxMultican_TXD2_P10_3_OUT,
131 &IfxMultican_TXD2_P14_10_OUT,
132 &IfxMultican_TXD2_P15_0_OUT,
133 NULL_PTR
134 },
135 {
136 &IfxMultican_TXD3_P00_2_OUT,
137 &IfxMultican_TXD3_P11_12_OUT,
138 &IfxMultican_TXD3_P20_3_OUT,
139 &IfxMultican_TXD3_P20_10_OUT,
140 &IfxMultican_TXD3_P32_3_OUT
141 }
142 }
143 };
IfxMultican_NodeId_3
Ifx_CAN Node 3.
Definition: IfxMultican_cfg.h:103
Ifx_RxSel_e
Definition: Ifx_Types.h:133
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxMultican_TXD1_P14_0_OUT
IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT
Definition: IfxMultican_PinMap.c:66
IfxMultican_Rxd_In
RXD pin mapping structure.
Definition: IfxMultican_PinMap.h:56
IfxMultican_TXD0_P33_8_OUT
IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT
Definition: IfxMultican_PinMap.c:64
IfxMultican_TXD0_P02_5_OUT
IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT
Definition: IfxMultican_PinMap.c:62
IfxMultican_Rxd_In_pinTable
const IfxMultican_Rxd_In * IfxMultican_Rxd_In_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS]
Definition: IfxMultican_PinMap.c:79
IfxMultican_NodeId_1
Ifx_CAN Node 1.
Definition: IfxMultican_cfg.h:101
IfxMultican_TXD2_P15_0_OUT
IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT
Definition: IfxMultican_PinMap.c:71
IfxMultican_RXD1D_P00_1_IN
IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN
Definition: IfxMultican_PinMap.c:51
IfxMultican_TXD1_P00_0_OUT
IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT
Definition: IfxMultican_PinMap.c:65
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:121
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxMultican_TXD3_P20_10_OUT
IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT
Definition: IfxMultican_PinMap.c:74
IfxMultican_TXD3_P00_2_OUT
IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT
Definition: IfxMultican_PinMap.c:72
IfxMultican_NodeId_0
Ifx_CAN Node 0.
Definition: IfxMultican_cfg.h:100
IfxMultican_RXD3D_P11_10_IN
IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN
Definition: IfxMultican_PinMap.c:59
IfxMultican_RXD3A_P00_3_IN
IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN
Definition: IfxMultican_PinMap.c:56
IfxMultican_RXD1B_P14_1_IN
IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN
Definition: IfxMultican_PinMap.c:50
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxMultican_TXD0_P20_8_OUT
IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT
Definition: IfxMultican_PinMap.c:63
IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS
#define IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxMultican_PinMap.h:109
IfxMultican_RXD2E_P10_2_IN
IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN
Definition: IfxMultican_PinMap.c:55
IfxMultican_RXD3B_P32_2_IN
IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN
Definition: IfxMultican_PinMap.c:57
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:125
IfxMultican_RXD3E_P20_9_IN
IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN
Definition: IfxMultican_PinMap.c:60
IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxMultican_PinMap.h:110
IfxMultican_NodeId_2
Ifx_CAN Node 2.
Definition: IfxMultican_cfg.h:102
IfxMultican_RXD0E_P33_7_IN
IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN
Definition: IfxMultican_PinMap.c:48
IfxMultican_TXD2_P02_2_OUT
IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT
Definition: IfxMultican_PinMap.c:68
IfxMultican_RXD0B_P20_7_IN
IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN
Definition: IfxMultican_PinMap.c:46
IFXMULTICAN_PINMAP_NUM_MODULES
#define IFXMULTICAN_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxMultican_PinMap.h:107
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxMultican_RXD2A_P15_1_IN
IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN
Definition: IfxMultican_PinMap.c:52
IfxMultican_Txd_Out_pinTable
const IfxMultican_Txd_Out * IfxMultican_Txd_Out_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS]
Definition: IfxMultican_PinMap.c:112
IfxMultican_RXD2D_P14_8_IN
IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN
Definition: IfxMultican_PinMap.c:54
IfxMultican_TXD2_P10_3_OUT
IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT
Definition: IfxMultican_PinMap.c:69
IfxMultican_Txd_Out
TXD pin mapping structure.
Definition: IfxMultican_PinMap.h:65
IfxMultican_TXD2_P14_10_OUT
IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT
Definition: IfxMultican_PinMap.c:70
IfxMultican_TXD3_P11_12_OUT
IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT
Definition: IfxMultican_PinMap.c:73
IfxMultican_RXD0A_P02_1_IN
IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN
Definition: IfxMultican_PinMap.c:45
IfxMultican_TXD0_P02_0_OUT
IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT
Definition: IfxMultican_PinMap.c:61
IfxMultican_TXD3_P20_3_OUT
IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT
Definition: IfxMultican_PinMap.c:75
IfxMultican_PinMap.h
MULTICAN I/O map.
IfxMultican_RXD3C_P20_0_IN
IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN
Definition: IfxMultican_PinMap.c:58
IfxMultican_RXD1A_P15_3_IN
IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN
Definition: IfxMultican_PinMap.c:49
IfxMultican_RXD0D_P02_4_IN
IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN
Definition: IfxMultican_PinMap.c:47
IfxMultican_TXD1_P15_2_OUT
IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT
Definition: IfxMultican_PinMap.c:67
IfxMultican_RXD2B_P02_3_IN
IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN
Definition: IfxMultican_PinMap.c:53
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:124
IfxMultican_TXD3_P32_3_OUT
IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT
Definition: IfxMultican_PinMap.c:76
IFXMULTICAN_PINMAP_NUM_NODES
#define IFXMULTICAN_PINMAP_NUM_NODES
Definition: IfxMultican_PinMap.h:108


iLLD_TC26B: IfxMultican_PinMap.h Source File

  • _PinMap
IfxMultican_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxMultican_PinMap.h
3 * \brief MULTICAN I/O map
4 * \ingroup IfxLld_Multican
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Multican_pinmap MULTICAN Pin Mapping
42 * \ingroup IfxLld_Multican
43 */
44
45 #ifndef IFXMULTICAN_PINMAP_H
46 #define IFXMULTICAN_PINMAP_H
47
48 #include <IfxCan_reg.h>
49 #include <_Impl/IfxMultican_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Multican_pinmap
53 * \{ */
54
55 /** \brief RXD pin mapping structure */
56 typedef const struct
57 {
58 Ifx_CAN* module; /**< \brief Base address */
59 IfxMultican_NodeId nodeId; /**< \brief Node ID */
60 IfxPort_Pin pin; /**< \brief Port pin */
61 Ifx_RxSel select; /**< \brief Input multiplexer value */
62 } IfxMultican_Rxd_In;
63
64 /** \brief TXD pin mapping structure */
65 typedef const struct
66 {
67 Ifx_CAN* module; /**< \brief Base address */
68 IfxMultican_NodeId nodeId; /**< \brief Node ID */
69 IfxPort_Pin pin; /**< \brief Port pin */
70 IfxPort_OutputIdx select; /**< \brief Port control code */
71 } IfxMultican_Txd_Out;
72
73 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN; /**< \brief CAN0_RXDA: CAN node 0 input */
74 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN; /**< \brief CAN0_RXDB: CAN node 0 input */
75 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN; /**< \brief CAN0_RXDD: CAN node 0 input */
76 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN; /**< \brief CAN0_RXDE: CAN node 0 input */
77 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN; /**< \brief CAN1_RXDA: CAN node 1 input */
78 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN; /**< \brief CAN1_RXDB: CAN node 1 input Used for single pin DAP (SPD) function. */
79 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN; /**< \brief CAN1_RXDD: CAN node 1 input */
80 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN; /**< \brief CAN2_RXDA: CAN node 2 input */
81 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN; /**< \brief CAN2_RXDB: CAN node 2 input */
82 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN; /**< \brief CAN2_RXDD: CAN node 2 input */
83 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN; /**< \brief CAN2_RXDE: CAN node 2 input */
84 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN; /**< \brief CAN3_RXDA: CAN node 3 input */
85 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN; /**< \brief CAN3_RXDB: CAN node 3 input */
86 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN; /**< \brief CAN3_RXDC: CAN node 3 input */
87 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN; /**< \brief CAN3_RXDD: CAN node 3 input */
88 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN; /**< \brief CAN3_RXDE: CAN node 3 input */
89 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT; /**< \brief CAN0_TXD: CAN node 0 output */
90 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT; /**< \brief CAN0_TXD: CAN node 0 output */
91 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT; /**< \brief CAN0_TXD: CAN node 0 output */
92 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT; /**< \brief CAN0_TXD: CAN node 0 output */
93 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT; /**< \brief CAN1_TXD: CAN node 1 output */
94 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT; /**< \brief CAN1_TXD: CAN node 1 output Used for single pin DAP (SPD) function. */
95 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT; /**< \brief CAN1_TXD: CAN node 1 output */
96 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT; /**< \brief CAN2_TXD: CAN node 2 output */
97 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT; /**< \brief CAN2_TXD: CAN node 2 output */
98 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT; /**< \brief CAN2_TXD: CAN node 2 output */
99 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT; /**< \brief CAN2_TXD: CAN node 2 output */
100 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT; /**< \brief CAN3_TXD: CAN node 3 output */
101 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT; /**< \brief CAN3_TXD: CAN node 3 output */
102 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT; /**< \brief CAN3_TXD: CAN node 3 output */
103 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT; /**< \brief CAN3_TXD: CAN node 3 output */
104 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT; /**< \brief CAN3_TXD: CAN node 3 output */
105
106 /** \brief Table dimensions */
107 #define IFXMULTICAN_PINMAP_NUM_MODULES 1
108 #define IFXMULTICAN_PINMAP_NUM_NODES 4
109 #define IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS 5
110 #define IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS 5
111
112
113 /** \brief IfxMultican_Rxd_In table */
114 IFX_EXTERN const IfxMultican_Rxd_In *IfxMultican_Rxd_In_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS];
115
116 /** \brief IfxMultican_Txd_Out table */
117 IFX_EXTERN const IfxMultican_Txd_Out *IfxMultican_Txd_Out_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS];
118
119 /** \} */
120
121 #endif /* IFXMULTICAN_PINMAP_H */
IfxMultican_TXD2_P15_0_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT
CAN2_TXD: CAN node 2 output.
Definition: IfxMultican_PinMap.h:99
IfxMultican_Rxd_In_pinTable
IFX_EXTERN const IfxMultican_Rxd_In * IfxMultican_Rxd_In_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS]
IfxMultican_Rxd_In table.
Definition: IfxMultican_PinMap.h:114
IfxMultican_Rxd_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxMultican_PinMap.h:61
IfxMultican_TXD3_P32_3_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT
CAN3_TXD: CAN node 3 output.
Definition: IfxMultican_PinMap.h:104
IfxMultican_RXD2E_P10_2_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN
CAN2_RXDE: CAN node 2 input.
Definition: IfxMultican_PinMap.h:83
IfxMultican_Rxd_In
RXD pin mapping structure.
Definition: IfxMultican_PinMap.h:56
IfxMultican_TXD3_P20_10_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT
CAN3_TXD: CAN node 3 output.
Definition: IfxMultican_PinMap.h:102
IfxMultican_Txd_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxMultican_PinMap.h:70
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxMultican_RXD3A_P00_3_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN
CAN3_RXDA: CAN node 3 input.
Definition: IfxMultican_PinMap.h:84
IfxMultican_RXD0B_P20_7_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN
CAN0_RXDB: CAN node 0 input.
Definition: IfxMultican_PinMap.h:74
IfxMultican_TXD2_P10_3_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT
CAN2_TXD: CAN node 2 output.
Definition: IfxMultican_PinMap.h:97
IfxMultican_TXD0_P33_8_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT
CAN0_TXD: CAN node 0 output.
Definition: IfxMultican_PinMap.h:92
IfxMultican_TXD1_P00_0_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT
CAN1_TXD: CAN node 1 output.
Definition: IfxMultican_PinMap.h:93
IfxMultican_RXD3C_P20_0_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN
CAN3_RXDC: CAN node 3 input.
Definition: IfxMultican_PinMap.h:86
IfxMultican_TXD1_P14_0_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT
CAN1_TXD: CAN node 1 output Used for single pin DAP (SPD) function.
Definition: IfxMultican_PinMap.h:94
IfxMultican_TXD3_P20_3_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT
CAN3_TXD: CAN node 3 output.
Definition: IfxMultican_PinMap.h:103
IfxMultican_RXD3D_P11_10_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN
CAN3_RXDD: CAN node 3 input.
Definition: IfxMultican_PinMap.h:87
IfxMultican_RXD0A_P02_1_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN
CAN0_RXDA: CAN node 0 input.
Definition: IfxMultican_PinMap.h:73
IfxMultican_RXD3B_P32_2_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN
CAN3_RXDB: CAN node 3 input.
Definition: IfxMultican_PinMap.h:85
IfxMultican_NodeId
IfxMultican_NodeId
CAN Nodes definition
Definition: IfxMultican_cfg.h:97
IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS
#define IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxMultican_PinMap.h:109
IfxMultican_RXD1A_P15_3_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN
CAN1_RXDA: CAN node 1 input.
Definition: IfxMultican_PinMap.h:77
IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxMultican_PinMap.h:110
IfxMultican_Rxd_In::nodeId
IfxMultican_NodeId nodeId
Node ID.
Definition: IfxMultican_PinMap.h:59
IfxMultican_RXD0E_P33_7_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN
CAN0_RXDE: CAN node 0 input.
Definition: IfxMultican_PinMap.h:76
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxMultican_TXD0_P02_0_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT
CAN0_TXD: CAN node 0 output.
Definition: IfxMultican_PinMap.h:89
IfxMultican_TXD0_P02_5_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT
CAN0_TXD: CAN node 0 output.
Definition: IfxMultican_PinMap.h:90
IFXMULTICAN_PINMAP_NUM_MODULES
#define IFXMULTICAN_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxMultican_PinMap.h:107
IfxMultican_Rxd_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxMultican_PinMap.h:60
IfxMultican_cfg.h
MULTICAN on-chip implementation data.
IfxMultican_RXD2B_P02_3_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN
CAN2_RXDB: CAN node 2 input.
Definition: IfxMultican_PinMap.h:81
IfxMultican_RXD2D_P14_8_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN
CAN2_RXDD: CAN node 2 input.
Definition: IfxMultican_PinMap.h:82
IfxMultican_RXD1B_P14_1_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN
CAN1_RXDB: CAN node 1 input Used for single pin DAP (SPD) function.
Definition: IfxMultican_PinMap.h:78
IfxMultican_Txd_Out
TXD pin mapping structure.
Definition: IfxMultican_PinMap.h:65
IfxMultican_RXD0D_P02_4_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN
CAN0_RXDD: CAN node 0 input.
Definition: IfxMultican_PinMap.h:75
IfxMultican_RXD2A_P15_1_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN
CAN2_RXDA: CAN node 2 input.
Definition: IfxMultican_PinMap.h:80
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxMultican_TXD1_P15_2_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT
CAN1_TXD: CAN node 1 output.
Definition: IfxMultican_PinMap.h:95
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxMultican_Txd_Out_pinTable
IFX_EXTERN const IfxMultican_Txd_Out * IfxMultican_Txd_Out_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS]
IfxMultican_Txd_Out table.
Definition: IfxMultican_PinMap.h:117
IfxMultican_RXD1D_P00_1_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN
CAN1_RXDD: CAN node 1 input.
Definition: IfxMultican_PinMap.h:79
IfxMultican_TXD3_P00_2_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT
CAN3_TXD: CAN node 3 output.
Definition: IfxMultican_PinMap.h:100
IfxMultican_RXD3E_P20_9_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN
CAN3_RXDE: CAN node 3 input.
Definition: IfxMultican_PinMap.h:88
IfxMultican_TXD3_P11_12_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT
CAN3_TXD: CAN node 3 output.
Definition: IfxMultican_PinMap.h:101
IfxMultican_TXD2_P14_10_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT
CAN2_TXD: CAN node 2 output.
Definition: IfxMultican_PinMap.h:98
IfxMultican_TXD0_P20_8_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT
CAN0_TXD: CAN node 0 output.
Definition: IfxMultican_PinMap.h:91
IfxMultican_TXD2_P02_2_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT
CAN2_TXD: CAN node 2 output.
Definition: IfxMultican_PinMap.h:96
IFXMULTICAN_PINMAP_NUM_NODES
#define IFXMULTICAN_PINMAP_NUM_NODES
Definition: IfxMultican_PinMap.h:108
IfxPort.h
PORT basic functionality.
IfxMultican_Rxd_In::module
Ifx_CAN * module
Base address.
Definition: IfxMultican_PinMap.h:58


iLLD_TC26B: IfxMultican_cfg.c Source File

  • _Impl
IfxMultican_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxMultican_cfg.c
3 * \brief MULTICAN on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxMultican_cfg.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
51
52 IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap[IFXMULTICAN_NUM_MODULES] = {
53 {&MODULE_CAN, (uint32)IfxMultican_Index_0}
54 };
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxMultican_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap[IFXMULTICAN_NUM_MODULES]
Definition: IfxMultican_cfg.c:52
IfxMultican_cfg.h
MULTICAN on-chip implementation data.
IfxMultican_Index_0
MULTICAN index 0.
Definition: IfxMultican_cfg.h:92
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IFXMULTICAN_NUM_MODULES
#define IFXMULTICAN_NUM_MODULES
Definition: IfxMultican_cfg.h:75


iLLD_TC26B: IfxMultican_cfg.h Source File

  • _Impl
IfxMultican_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxMultican_cfg.h
3 * \brief MULTICAN on-chip implementation data
4 * \ingroup IfxLld_Multican
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Multican MULTICAN
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Multican_Impl Implementation
44 * \ingroup IfxLld_Multican
45 * \defgroup IfxLld_Multican_Std Standard Driver
46 * \ingroup IfxLld_Multican
47 */
48
49 #ifndef IFXMULTICAN_CFG_H
50 #define IFXMULTICAN_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "Cpu/Std/Ifx_Types.h"
57 #include "IfxCan_reg.h"
58
59 /******************************************************************************/
60 /*-----------------------------------Macros-----------------------------------*/
61 /******************************************************************************/
62
63 /** \brief Number of CAN message objects
64 */
65 #define IFXMULTICAN_NUM_MESSAGE_OBJECTS (256)
66
67 /** \brief Number of CAN nodes
68 */
69 #define IFXMULTICAN_NUM_NODES (5)
70
71 /** \brief Number of service requests
72 */
73 #define IFXMULTICAN_NUM_SRC (16)
74
75 #define IFXMULTICAN_NUM_MODULES (1)
76
77 /** \brief Number of CANR service requests
78 */
79 #define IFXMULTICAN_R_NUM_SRC (8)
80
81
82
83 /******************************************************************************/
84 /*-------------------------------Enumerations---------------------------------*/
85 /******************************************************************************/
86
87 /** \brief List of the available multican resource.
88 */
89 typedef enum
90 {
91 IfxMultican_Index_none = -1, /**< \brief Not Selected */
92 IfxMultican_Index_0 = 0, /**< \brief MULTICAN index 0 */
93 } IfxMultican_Index;
94
95 /** \brief CAN Nodes definition
96 */
97 typedef enum
98 {
99 IfxMultican_NodeId_none = -1, /**< \brief None of the Ifx_CAN Nodes */
100 IfxMultican_NodeId_0 = 0, /**< \brief Ifx_CAN Node 0 */
101 IfxMultican_NodeId_1, /**< \brief Ifx_CAN Node 1 */
102 IfxMultican_NodeId_2, /**< \brief Ifx_CAN Node 2 */
103 IfxMultican_NodeId_3 /**< \brief Ifx_CAN Node 3 */
104 } IfxMultican_NodeId;
105
106 /** \brief Service request ID
107 */
108 typedef enum
109 {
110 IfxMultican_SrcId_0 = 0, /**< \brief Service request ID 0 */
111 IfxMultican_SrcId_1, /**< \brief Service request ID 1 */
112 IfxMultican_SrcId_2, /**< \brief Service request ID 2 */
113 IfxMultican_SrcId_3, /**< \brief Service request ID 3 */
114 IfxMultican_SrcId_4, /**< \brief Service request ID 4 */
115 IfxMultican_SrcId_5, /**< \brief Service request ID 5 */
116 IfxMultican_SrcId_6, /**< \brief Service request ID 6 */
117 IfxMultican_SrcId_7, /**< \brief Service request ID 7 */
118 IfxMultican_SrcId_8, /**< \brief Service request ID 8 */
119 IfxMultican_SrcId_9, /**< \brief Service request ID 9 */
120 IfxMultican_SrcId_10, /**< \brief Service request ID 10 */
121 IfxMultican_SrcId_11, /**< \brief Service request ID 11 */
122 IfxMultican_SrcId_12, /**< \brief Service request ID 12 */
123 IfxMultican_SrcId_13, /**< \brief Service request ID 13 */
124 IfxMultican_SrcId_14, /**< \brief Service request ID 14 */
125 IfxMultican_SrcId_15 /**< \brief Service request ID 15 */
126 } IfxMultican_SrcId;
127
128
129 /******************************************************************************/
130 /*-------------------Global Exported Variables/Constants----------------------*/
131 /******************************************************************************/
132
133 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap[IFXMULTICAN_NUM_MODULES];
134
135
136 #endif /* IFXMULTICAN_CFG_H */
IfxMultican_NodeId_3
Ifx_CAN Node 3.
Definition: IfxMultican_cfg.h:103
IfxMultican_NodeId_1
Ifx_CAN Node 1.
Definition: IfxMultican_cfg.h:101
IfxMultican_SrcId_3
Service request ID 3.
Definition: IfxMultican_cfg.h:113
IfxMultican_SrcId_11
Service request ID 11.
Definition: IfxMultican_cfg.h:121
IfxMultican_SrcId_0
Service request ID 0.
Definition: IfxMultican_cfg.h:110
IfxMultican_SrcId_13
Service request ID 13.
Definition: IfxMultican_cfg.h:123
IfxMultican_SrcId_4
Service request ID 4.
Definition: IfxMultican_cfg.h:114
IfxMultican_NodeId_0
Ifx_CAN Node 0.
Definition: IfxMultican_cfg.h:100
IfxMultican_SrcId_8
Service request ID 8.
Definition: IfxMultican_cfg.h:118
IfxMultican_SrcId_15
Service request ID 15.
Definition: IfxMultican_cfg.h:125
IfxMultican_SrcId_5
Service request ID 5.
Definition: IfxMultican_cfg.h:115
IfxMultican_SrcId
IfxMultican_SrcId
Service request ID
Definition: IfxMultican_cfg.h:108
IfxMultican_NodeId
IfxMultican_NodeId
CAN Nodes definition
Definition: IfxMultican_cfg.h:97
IfxMultican_SrcId_14
Service request ID 14.
Definition: IfxMultican_cfg.h:124
IfxMultican_SrcId_6
Service request ID 6.
Definition: IfxMultican_cfg.h:116
IfxMultican_SrcId_7
Service request ID 7.
Definition: IfxMultican_cfg.h:117
IfxMultican_SrcId_10
Service request ID 10.
Definition: IfxMultican_cfg.h:120
IfxMultican_SrcId_2
Service request ID 2.
Definition: IfxMultican_cfg.h:112
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxMultican_NodeId_2
Ifx_CAN Node 2.
Definition: IfxMultican_cfg.h:102
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxMultican_NodeId_none
None of the Ifx_CAN Nodes.
Definition: IfxMultican_cfg.h:99
IfxMultican_SrcId_12
Service request ID 12.
Definition: IfxMultican_cfg.h:122
IfxMultican_Index
IfxMultican_Index
List of the available multican resource.
Definition: IfxMultican_cfg.h:89
IfxMultican_SrcId_1
Service request ID 1.
Definition: IfxMultican_cfg.h:111
IfxMultican_Index_none
Not Selected.
Definition: IfxMultican_cfg.h:91
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxMultican_Index_0
MULTICAN index 0.
Definition: IfxMultican_cfg.h:92
IfxMultican_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap[IFXMULTICAN_NUM_MODULES]
Definition: IfxMultican_cfg.h:133
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IFXMULTICAN_NUM_MODULES
#define IFXMULTICAN_NUM_MODULES
Definition: IfxMultican_cfg.h:75
IfxMultican_SrcId_9
Service request ID 9.
Definition: IfxMultican_cfg.h:119


iLLD_TC26B: IfxPort.c Source File

  • Port
  • Std
IfxPort.c
Go to the documentation of this file.
1 /**
2 * \file IfxPort.c
3 * \brief PORT basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxPort.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 boolean IfxPort_disableEmergencyStop(Ifx_P *port, uint8 pinIndex)
53 {
54 sint32 portIndex;
55 boolean result = FALSE;
56
57 for (portIndex = 0; portIndex < IFXPORT_NUM_MODULES; portIndex++)
58 {
59 if (port == IfxPort_cfg_esrMasks[portIndex].port)
60 {
61 if ((1U << pinIndex) & IfxPort_cfg_esrMasks[portIndex].masks)
62 {
63 IfxPort_resetESR(port, pinIndex);
64 result = TRUE;
65 }
66
67 break;
68 }
69 }
70
71 return result;
72 }
73
74
75 boolean IfxPort_enableEmergencyStop(Ifx_P *port, uint8 pinIndex)
76 {
77 sint32 portIndex;
78 boolean result = FALSE;
79
80 for (portIndex = 0; portIndex < IFXPORT_NUM_MODULES; portIndex++)
81 {
82 if (port == IfxPort_cfg_esrMasks[portIndex].port)
83 {
84 if ((1U << pinIndex) & IfxPort_cfg_esrMasks[portIndex].masks)
85 {
86 IfxPort_setESR(port, pinIndex);
87 result = TRUE;
88 }
89 }
90 }
91
92 return result;
93 }
94
95
96 Ifx_P *IfxPort_getAddress(IfxPort_Index port)
97 {
98 Ifx_P *module = NULL_PTR;
99 uint8 i = 0;
100
101 while ((i < IFXPORT_NUM_MODULES) && (module == NULL_PTR))
102 {
103 if (IfxPort_cfg_indexMap[i].index == port)
104 {
105 module = IfxPort_cfg_indexMap[i].module;
106 }
107
108 i++;
109 }
110
111 return module;
112 }
113
114
115 IfxPort_Index IfxPort_getIndex(Ifx_P *port)
116 {
117 uint32 index;
118 IfxPort_Index result;
119
120 result = IfxPort_Index_none;
121
122 for (index = 0; index < IFXPORT_NUM_MODULES; index++)
123 {
124 if (IfxPort_cfg_indexMap[index].module == port)
125 {
126 result = (IfxPort_Index)IfxPort_cfg_indexMap[index].index;
127 break;
128 }
129 }
130
131 return result;
132 }
133
134
135 void IfxPort_resetESR(Ifx_P *port, uint8 pinIndex)
136 {
137 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
138
139 IfxScuWdt_clearCpuEndinit(passwd);
140 __ldmst(&port->ESR.U, 1U << pinIndex, 0);
141 IfxScuWdt_setCpuEndinit(passwd);
142 }
143
144
145 void IfxPort_setESR(Ifx_P *port, uint8 pinIndex)
146 {
147 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
148
149 IfxScuWdt_clearCpuEndinit(passwd);
150 __ldmst(&port->ESR.U, 1U << pinIndex, 1U << pinIndex);
151 IfxScuWdt_setCpuEndinit(passwd);
152 }
153
154
155 void IfxPort_setGroupModeInput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
156 {
157 uint32 i;
158 uint32 iocrVal[4];
159 uint32 iocrMask[4];
160
161 /* initialise */
162 for (i = 0; i < 4; i++)
163 {
164 iocrVal[i] = 0;
165 iocrMask[i] = 0;
166 }
167
168 /* calculate IOCRx values and masks */
169 uint32 imask = (uint32)mask << pinIndex;
170
171 for (i = pinIndex; i < 16; i++)
172 {
173 if ((imask & (1U << i)) != 0)
174 {
175 uint32 index = i / 4;
176 uint32 shift = (i & 0x3U) * 8;
177 iocrMask[index] |= (0x1FU << 3) << shift;
178 iocrVal[index] |= (mode) << shift;
179 }
180 }
181
182 /* write IOCRx */
183 for (i = 0; i < 4; i++)
184 {
185 if (iocrMask[i] != 0)
186 {
187 __ldmst(&((&(port->IOCR0.U))[i]), iocrMask[i], iocrVal[i]);
188 }
189 }
190 }
191
192
193 void IfxPort_setGroupModeOutput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
194 {
195 uint32 i;
196 uint32 iocrVal[4];
197 uint32 iocrMask[4];
198
199 IFX_UNUSED_PARAMETER(index == IfxPort_OutputIdx_general);
200
201 /* initialise */
202 for (i = 0; i < 4; i++)
203 {
204 iocrVal[i] = 0;
205 iocrMask[i] = 0;
206 }
207
208 /* calculate IOCRx values and masks */
209 uint32 imask = (uint32)mask << pinIndex;
210
211 for (i = pinIndex; i < 16; i++)
212 {
213 if ((imask & (1U << i)) != 0)
214 {
215 uint32 index = i / 4;
216 uint32 shift = (i & 0x3U) * 8;
217 iocrMask[index] |= (0x1FU << 3) << shift;
218 iocrVal[index] |= (mode | index) << shift;
219 }
220 }
221
222 /* write IOCRx */
223 for (i = 0; i < 4; i++)
224 {
225 if (iocrMask[i] != 0)
226 {
227 __ldmst(&((&(port->IOCR0.U))[i]), iocrMask[i], iocrVal[i]);
228 }
229 }
230 }
231
232
233 void IfxPort_setGroupPadDriver(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
234 {
235 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
236
237 IfxScuWdt_clearCpuEndinit(passwd);
238 {
239 uint32 i;
240 uint32 pdrVal[2];
241 uint32 pdrMask[2];
242
243 /* initialise */
244 for (i = 0; i < 2; i++)
245 {
246 pdrVal[i] = 0;
247 pdrMask[i] = 0;
248 }
249
250 /* calculate PDRx values and masks */
251 uint32 imask = (uint32)mask << pinIndex;
252
253 for (i = pinIndex; i < 16; i++)
254 {
255 if ((imask & (1U << i)) != 0)
256 {
257 uint32 index = i / 8;
258 uint32 shift = (i & 0x7U) * 4;
259 pdrMask[index] |= (0xFUL << shift);
260 pdrVal[index] |= (padDriver << shift);
261 }
262 }
263
264 /* write PDRx */
265 for (i = 0; i < 2; i++)
266 {
267 if (pdrMask[i] != 0)
268 {
269 __ldmst(&((&(port->PDR0.U))[i]), pdrMask[i], pdrVal[i]);
270 }
271 }
272 }
273 IfxScuWdt_setCpuEndinit(passwd);
274 }
275
276
277 void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
278 {
279 volatile Ifx_P_IOCR0 *iocr = &(port->IOCR0);
280 uint8 iocrIndex = (pinIndex / 4);
281 uint8 shift = (pinIndex & 0x3U) * 8;
282
283 if (port == &MODULE_P40)
284 {
285 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
286 IfxScuWdt_clearCpuEndinit(passwd);
287 port->PDISC.U &= ~(1 << pinIndex);
288 IfxScuWdt_setCpuEndinit(passwd);
289 }
290
291 __ldmst(&iocr[iocrIndex].U, (0xFFUL << shift), (mode << shift));
292 }
293
294
295 void IfxPort_setPinModeLvdsHigh(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode, IfxPort_ControlledBy enablePortControlled)
296 {
297 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
298
299 IfxScuWdt_clearCpuEndinit(passwd);
300
301 if (mode < IfxPort_Mode_outputPushPullGeneral)
302 {
303 if (pinIndex < 2)
304 {}
305 else
306 {
307 port->LPCR1.B_P21.RDIS_CTRL = enablePortControlled;
308 port->LPCR1.B_P21.RX_DIS = 0;
309 }
310 }
311 else
312 {
313 port->LPCR2.B.TDIS_CTRL = enablePortControlled;
314 port->LPCR2.B.TX_DIS = 0;
315 port->LPCR2.B.TX_PD = 0;
316 }
317
318 IfxScuWdt_setCpuEndinit(passwd);
319 }
320
321
322 void IfxPort_setPinModeLvdsMedium(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver lvdsPadDriver, IfxPort_PadSupply padSupply)
323 {
324 uint32 pdrOffset = (pinIndex / 8);
325 uint32 shift = ((pinIndex / 2) * 8);
326 uint32 lpcrOffset = (pinIndex / 2);
327 volatile Ifx_P_PDR0 *pdr = &(port->PDR0);
328 volatile Ifx_P_LPCR0 *lpcr = &(port->LPCR0);
329 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
330
331 IfxScuWdt_clearCpuEndinit(passwd);
332 {
333 pdr[pdrOffset].U = (lvdsPadDriver << shift); /* configuring LVDS mode */
334 lpcr[lpcrOffset].B.PS1 = padSupply;
335 }
336 IfxScuWdt_setCpuEndinit(passwd);
337 }
338
339
340 void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
341 {
342 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
343
344 IfxScuWdt_clearCpuEndinit(passwd);
345 {
346 volatile uint32 *pdr = (volatile uint32 *)&(port->PDR0.U);
347 uint8 pdrIndex = (pinIndex / 8);
348 uint8 shift = (pinIndex & 0x7U) * 4;
349 __ldmst(&(pdr[pdrIndex]), (0xFUL << shift), (padDriver << shift));
350 }
351 IfxScuWdt_setCpuEndinit(passwd);
352 }
IfxPort_Index
IfxPort_Index
List of the available Port resources.
Definition: IfxPort_cfg.h:76
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxPort_setPinMode
void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality wh...
Definition: IfxPort.c:277
IfxPort_Mode_outputPushPullGeneral
Push-pull, General-purpose output.
Definition: IfxPort.h:97
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IFXPORT_NUM_MODULES
#define IFXPORT_NUM_MODULES
Port count.
Definition: IfxPort_cfg.h:66
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxPort_setGroupModeInput
void IfxPort_setGroupModeInput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
Set pin modes to input at the pin location specified by &#39;1&#39; by the mask.
Definition: IfxPort.c:155
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxPort_ControlledBy
IfxPort_ControlledBy
The LVDS RX_DIS control function can be selected from the Port (default) or HSCT module.declared in MODULE_PORTx.LPCRx.
Definition: IfxPort.h:72
IfxPort_setGroupModeOutput
void IfxPort_setGroupModeOutput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Set pin modes to output at the pin location specified by &#39;1&#39; by the mask starting at pinIndex...
Definition: IfxPort.c:193
IfxPort_resetESR
void IfxPort_resetESR(Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality.
Definition: IfxPort.c:135
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxPort_OutputIdx_general
Definition: IfxPort.h:119
IfxModule_IndexMap::module
volatile void * module
Module address.
Definition: Ifx_Types.h:142
IfxPort_setPinModeLvdsMedium
void IfxPort_setPinModeLvdsMedium(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver lvdsPadDriver, IfxPort_PadSupply padSupply)
set LVDSM mode
Definition: IfxPort.c:322
IfxPort_getIndex
IfxPort_Index IfxPort_getIndex(Ifx_P *port)
Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c)
Definition: IfxPort.c:115
IfxPort_enableEmergencyStop
boolean IfxPort_enableEmergencyStop(Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality.
Definition: IfxPort.c:75
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
__ldmst
#define __ldmst
Definition: IfxCpu_IntrinsicsDcc.h:2065
IfxPort_setPinModeLvdsHigh
void IfxPort_setPinModeLvdsHigh(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode, IfxPort_ControlledBy enablePortControlled)
set LVDSH mode (configured for Port21)
Definition: IfxPort.c:295
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPort_disableEmergencyStop
boolean IfxPort_disableEmergencyStop(Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality.
Definition: IfxPort.c:52
IfxPort_PadSupply
IfxPort_PadSupply
MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair...
Definition: IfxPort.h:160
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
sint32
long sint32
Definition: Platform_Types.h:134
IfxPort_getAddress
Ifx_P * IfxPort_getAddress(IfxPort_Index port)
Returns the module address of the selected Port module.
Definition: IfxPort.c:96
IfxPort_cfg_esrMasks
IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.c:53
IfxPort_Mode
IfxPort_Mode
Ifx_P input / output mode definition.
Definition: IfxPort.h:92
IfxPort_setGroupPadDriver
void IfxPort_setGroupPadDriver(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
Set pad driver strength at the pin location specified by &#39;1&#39; by the mask.
Definition: IfxPort.c:233
IfxPort_Index_none
none
Definition: IfxPort_cfg.h:91
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxPort_setESR
void IfxPort_setESR(Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality.
Definition: IfxPort.c:145
TRUE
#define TRUE
Definition: Platform_Types.h:90
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxPort.h
PORT basic functionality.
IfxPort_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.c:70


iLLD_TC26B: IfxPort.h Source File

  • Port
  • Std
IfxPort.h
Go to the documentation of this file.
1 /**
2 * \file IfxPort.h
3 * \brief PORT basic functionality
4 * \ingroup IfxLld_Port
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 *
43 * \defgroup IfxLld_Port_Std_Enum Enumerations
44 * \ingroup IfxLld_Port_Std
45 * \defgroup IfxLld_Port_Std_DataStructures Data structures
46 * \ingroup IfxLld_Port_Std
47 * \defgroup IfxLld_Port_Std_SinglePin Single Pin Functions
48 * \ingroup IfxLld_Port_Std
49 * \defgroup IfxLld_Port_Std_PortGroup Group Access Functions
50 * \ingroup IfxLld_Port_Std
51 */
52
53 #ifndef IFXPORT_H
54 #define IFXPORT_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "_Impl/IfxPort_cfg.h"
61 #include "Scu/Std/IfxScuWdt.h"
62
63 /******************************************************************************/
64 /*--------------------------------Enumerations--------------------------------*/
65 /******************************************************************************/
66
67 /** \addtogroup IfxLld_Port_Std_Enum
68 * \{ */
69 /** \brief The LVDS RX_DIS control function can be selected from the Port (default) or
70 * HSCT module.declared in MODULE_PORTx.LPCRx
71 */
72 typedef enum
73 {
74 IfxPort_ControlledBy_port = 0, /**< \brief port controlled by PORT Module */
75 IfxPort_ControlledBy_hsct = 1 /**< \brief Port controlled by HSCT Module */
76 } IfxPort_ControlledBy;
77
78 /** \brief Ifx_P output modification modes definition.
79 */
80 typedef enum
81 {
82 IfxPort_InputMode_undefined = -1,
83 IfxPort_InputMode_noPullDevice = 0 << 3,
84 IfxPort_InputMode_pullDown = 1U << 3,
85 IfxPort_InputMode_pullUp = 2U << 3 /**< \brief */
86 } IfxPort_InputMode;
87
88 /** \brief Ifx_P input / output mode definition.
89 *
90 * \see Ifx_P.IOCR, IfxPort_setPinMode()
91 */
92 typedef enum
93 {
94 IfxPort_Mode_inputNoPullDevice = 0, /**< \brief Input, No pull device connected. */
95 IfxPort_Mode_inputPullDown = 8U, /**< \brief Input, pull-down device connected. */
96 IfxPort_Mode_inputPullUp = 0x10U, /**< \brief Input, pull-up device connected. */
97 IfxPort_Mode_outputPushPullGeneral = 0x80U, /**< \brief Push-pull, General-purpose output */
98 IfxPort_Mode_outputPushPullAlt1 = 0x88U, /**< \brief Push-pull, Alternate output function 1. */
99 IfxPort_Mode_outputPushPullAlt2 = 0x90U, /**< \brief Push-pull, Alternate output function 2. */
100 IfxPort_Mode_outputPushPullAlt3 = 0x98U, /**< \brief Push-pull, Alternate output function 3. */
101 IfxPort_Mode_outputPushPullAlt4 = 0xA0U, /**< \brief Push-pull, Alternate output function 4. */
102 IfxPort_Mode_outputPushPullAlt5 = 0xA8U, /**< \brief Push-pull, Alternate output function 5. */
103 IfxPort_Mode_outputPushPullAlt6 = 0xB0U, /**< \brief Push-pull, Alternate output function 6. */
104 IfxPort_Mode_outputPushPullAlt7 = 0xB8U, /**< \brief Push-pull, Alternate output function 7. */
105 IfxPort_Mode_outputOpenDrainGeneral = 0xC0U, /**< \brief Open-drain, General-purpose output. */
106 IfxPort_Mode_outputOpenDrainAlt1 = 0xC8U, /**< \brief Open-drain, Alternate output function 1. */
107 IfxPort_Mode_outputOpenDrainAlt2 = 0xD0U, /**< \brief Open-drain, Alternate output function 2. */
108 IfxPort_Mode_outputOpenDrainAlt3 = 0xD8U, /**< \brief Open-drain, Alternate output function 3. */
109 IfxPort_Mode_outputOpenDrainAlt4 = 0xE0U, /**< \brief Open-drain, Alternate output function 4. */
110 IfxPort_Mode_outputOpenDrainAlt5 = 0xE8U, /**< \brief Open-drain, Alternate output function 5. */
111 IfxPort_Mode_outputOpenDrainAlt6 = 0xF0U, /**< \brief Open-drain, Alternate output function 6. */
112 IfxPort_Mode_outputOpenDrainAlt7 = 0xF8U /**< \brief Open-drain, Alternate output function 7. */
113 } IfxPort_Mode;
114
115 /** \brief Pin output alternate index
116 */
117 typedef enum
118 {
119 IfxPort_OutputIdx_general = 0x10U << 3,
120 IfxPort_OutputIdx_alt1 = 0x11U << 3,
121 IfxPort_OutputIdx_alt2 = 0x12U << 3,
122 IfxPort_OutputIdx_alt3 = 0x13U << 3,
123 IfxPort_OutputIdx_alt4 = 0x14U << 3,
124 IfxPort_OutputIdx_alt5 = 0x15U << 3,
125 IfxPort_OutputIdx_alt6 = 0x16U << 3,
126 IfxPort_OutputIdx_alt7 = 0x17U << 3
127 } IfxPort_OutputIdx;
128
129 /** \brief Pin output mode definition
130 */
131 typedef enum
132 {
133 IfxPort_OutputMode_pushPull = 0x10U << 3,
134 IfxPort_OutputMode_openDrain = 0x18U << 3,
135 IfxPort_OutputMode_none = 0
136 } IfxPort_OutputMode;
137
138 /** \brief Pad driver mode definition (strength and slew rate).
139 *
140 * \see Ifx_P.PDR, IfxPort_setPinPadDriver()
141 */
142 typedef enum
143 {
144 IfxPort_PadDriver_cmosAutomotiveSpeed1 = 0, /**< \brief Speed grade 1. */
145 IfxPort_PadDriver_cmosAutomotiveSpeed2 = 1, /**< \brief Speed grade 2. */
146 IfxPort_PadDriver_cmosAutomotiveSpeed3 = 2, /**< \brief Speed grade 3. */
147 IfxPort_PadDriver_cmosAutomotiveSpeed4 = 3, /**< \brief Speed grade 4. */
148 IfxPort_PadDriver_lvdsSpeed1 = 4, /**< \brief Lvds Speed grade 1 */
149 IfxPort_PadDriver_lvdsSpeed2 = 5, /**< \brief Lvds Speed grade 2 */
150 IfxPort_PadDriver_lvdsSpeed3 = 6, /**< \brief Lvds Speed grade 3 */
151 IfxPort_PadDriver_lvdsSpeed4 = 7, /**< \brief Lvds Speed grade 4 */
152 IfxPort_PadDriver_ttlSpeed1 = 8, /**< \brief Speed grade 1. */
153 IfxPort_PadDriver_ttlSpeed2 = 9, /**< \brief Speed grade 2. */
154 IfxPort_PadDriver_ttlSpeed3 = 10, /**< \brief Speed grade 3. */
155 IfxPort_PadDriver_ttlSpeed4 = 11 /**< \brief Speed grade 4. */
156 } IfxPort_PadDriver;
157
158 /** \brief MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair
159 */
160 typedef enum
161 {
162 IfxPort_PadSupply_5v = 0, /**< \brief select, 5V supply */
163 IfxPort_PadSupply_3v = 1 /**< \brief select, 3V supply */
164 } IfxPort_PadSupply;
165
166 /** \brief Ifx_P output modification modes definition.
167 *
168 * \see Ifx_P.OMR, IfxPort_setPinState()
169 */
170 typedef enum
171 {
172 IfxPort_State_notChanged = (0 << 16) | (0 << 0), /**< \brief Ifx_P pin is left unchanged. */
173 IfxPort_State_high = (0 << 16) | (1U << 0), /**< \brief Ifx_P pin is set to high. */
174 IfxPort_State_low = (1U << 16) | (0 << 0), /**< \brief Ifx_P pin is set to low. */
175 IfxPort_State_toggled = (1U << 16) | (1U << 0) /**< \brief Ifx_P pin is toggled. */
176 } IfxPort_State;
177
178 /** \} */
179
180 /******************************************************************************/
181 /*-----------------------------Data Structures--------------------------------*/
182 /******************************************************************************/
183
184 /** \addtogroup IfxLld_Port_Std_DataStructures
185 * \{ */
186 /** \brief Defines a pin
187 */
188 typedef struct
189 {
190 Ifx_P *port;
191 uint8 pinIndex;
192 } IfxPort_Pin;
193
194 /** \brief To configure pins
195 */
196 typedef struct
197 {
198 Ifx_P *port;
199 uint8 pinIndex;
200 IfxPort_OutputIdx mode;
201 IfxPort_PadDriver padDriver;
202 } IfxPort_Pin_Config;
203
204 /** \} */
205
206 /** \addtogroup IfxLld_Port_Std_SinglePin
207 * \{ */
208
209 /******************************************************************************/
210 /*-------------------------Inline Function Prototypes-------------------------*/
211 /******************************************************************************/
212
213 /** \brief Return the port state.
214 * \param port Pointer to the port which should be accessed.
215 * \param pinIndex Specifies the pin for which the state should be returned.
216 * \return Returns TRUE the pin is high; FALSE the pin is low
217 *
218 * Coding example:
219 * \code
220 * if( IfxPort_getPinState(&MODULE_P33, 0) ) {
221 * // ...
222 * }
223 * \endcode
224 *
225 */
226 IFX_INLINE boolean IfxPort_getPinState(Ifx_P *port, uint8 pinIndex);
227
228 /** \brief Set the port output.
229 * \param port Pointer to the port which should be accessed.
230 * \param pinIndex Specifies the pin to be set.
231 * \return None
232 *
233 * Coding example:
234 * \code
235 * IfxPort_setPinHigh(&MODULE_P33, 0);
236 * \endcode
237 *
238 * \see IfxPort_setPinState(), IfxPort_setPinLow(), IfxPort_togglePin()
239 *
240 */
241 IFX_INLINE void IfxPort_setPinHigh(Ifx_P *port, uint8 pinIndex);
242
243 /** \brief Reset the port output.
244 * \param port Pointer to the port which should be accessed.
245 * \param pinIndex Specifies the pin to be reset.
246 * \return None
247 *
248 * Coding example:
249 * \code
250 * IfxPort_setPinLow(&MODULE_P33, 0);
251 * \endcode
252 *
253 * \see IfxPort_setPinState(), IfxPort_setPinHigh(), IfxPort_togglePin()
254 *
255 */
256 IFX_INLINE void IfxPort_setPinLow(Ifx_P *port, uint8 pinIndex);
257
258 /** \brief Configure the port input / output mode.
259 * \param port Pointer to the port which should be accessed.
260 * \param pinIndex Specifies the pin to be configured.
261 * \param mode Specifies the port pin mode.
262 * \return None
263 *
264 * Coding example:
265 * \code
266 * IfxPort_setPinModeInput(&MODULE_P33, 0, IfxPort_InputMode_pullUp);
267 * \endcode
268 *
269 */
270 IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode);
271
272 /** \brief Configure the port input / output mode.
273 * \param port Pointer to the port which should be accessed.
274 * \param pinIndex Specifies the pin to be configured.
275 * \param mode Specifies the port pin mode.
276 * \param index Specifies the alternate (or general purpose) output channel.
277 * \return None
278 *
279 * Coding example:
280 * \code
281 * IfxPort_setPinModeOutput(&MODULE_P33, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
282 * \endcode
283 *
284 */
285 IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index);
286
287 /** \brief Set / Resets / Toggle the port output.
288 * \param port Pointer to the port which should be accessed.
289 * \param pinIndex Specifies the pin to modify.
290 * \param action Specifies the action: set, reset, toggle.
291 * \return None
292 *
293 * Coding example:
294 * \code
295 * IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
296 * IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
297 * IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
298 * \endcode
299 *
300 */
301 IFX_INLINE void IfxPort_setPinState(Ifx_P *port, uint8 pinIndex, IfxPort_State action);
302
303 /** \brief Toggle the port output.
304 * \param port Pointer to the port which should be accessed.
305 * \param pinIndex Specifies the pin to be toggled.
306 * \return None
307 *
308 * Coding example:
309 * \code
310 * IfxPort_togglePin(&MODULE_P33, 0);
311 * \endcode
312 *
313 * \see IfxPort_setPinState(), IfxPort_setPinLow(), IfxPort_setPinHigh()
314 *
315 */
316 IFX_INLINE void IfxPort_togglePin(Ifx_P *port, uint8 pinIndex);
317
318 /******************************************************************************/
319 /*-------------------------Global Function Prototypes-------------------------*/
320 /******************************************************************************/
321
322 /** \brief Disable the emergency stop function.
323 * This function disables the emergency stop function. A check is done on port functionality.
324 * \param port Pointer to the port which should be accessed.
325 * \param pinIndex Specifies the pin for which the emergency stop function should be disabled.
326 * \return Returns TRUE if the emergency stop function has been disabled; FALSE if the emergency stop function could not be disabled
327 *
328 * Coding example:
329 * /code
330 * if( !IfxPort_disableEmergencyStop(&MODULE_P33, 0) )
331 * {
332 * // failed to disable emergency stop for P33.0
333 * }
334 * /endcode
335 *
336 * \see IfxPort_disableEmergencyStop(), IfxPort_resetESR()
337 *
338 */
339 IFX_EXTERN boolean IfxPort_disableEmergencyStop(Ifx_P *port, uint8 pinIndex);
340
341 /** \brief Enable the emergency stop function.
342 * This function enables the emergency stop function. A check is done on port functionality.
343 * \param port Pointer to the port which should be accessed.
344 * \param pinIndex Specifies the pin for which the emergency stop function should be enabled.
345 * \return Returns TRUE if the emergency stop function has been enabled; FALSE if the emergency stop function could not be enabled
346 *
347 * Coding example:
348 * \code
349 * if( !IfxPort_enableEmergencyStop(&MODULE_P33, 0) ) {
350 * // failed to enable emergency stop for P33.0
351 * }
352 * \endcode
353 *
354 * \see IfxPort_disableEmergencyStop(), IfxPort_setESR()
355 *
356 */
357 IFX_EXTERN boolean IfxPort_enableEmergencyStop(Ifx_P *port, uint8 pinIndex);
358
359 /** \brief Configure the port input / output mode.
360 * Also Configures the P40/P41 Port for digital functionality
361 * which bydefault support analog functionality.
362 * \param port Pointer to the port which should be accessed.
363 * \param pinIndex Specifies the pin to be configured.
364 * \param mode Specifies the port pin mode.
365 * \return None
366 *
367 * Coding example:
368 * \code
369 * IfxPort_setPinMode(&MODULE_P33, 0, IfxPort_Mode_outputPushPullGeneral);
370 * \endcode
371 *
372 */
373 IFX_EXTERN void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode);
374
375 /** \brief Configure the pad driver mode.
376 * \param port Pointer to the port which should be accessed.
377 * \param pinIndex Specifies the pin for which the mode will be set.
378 * \param padDriver Specifies the driver mode.
379 * \return None
380 *
381 * Coding example:
382 * \code
383 * // enable strong 3.3V driver
384 * IfxPort_setPinPadDriver(&MODULE_P33, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);
385 * \endcode
386 *
387 */
388 IFX_EXTERN void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver);
389
390 /** \} */
391
392 /** \addtogroup IfxLld_Port_Std_PortGroup
393 * \{ */
394
395 /******************************************************************************/
396 /*-------------------------Inline Function Prototypes-------------------------*/
397 /******************************************************************************/
398
399 /** \brief Return the port group state
400 * \param port Pointer to the port which should be accessed.
401 * \param pinIndex start at the given pin
402 * \param mask selects the pins which should be read (starting from pinIndex)
403 * \return Returns the selected pin values
404 *
405 * Coding example:
406 * \code
407 * // read the current value of P33[7:0]
408 * uint16 value = IfxPort_getGroupState(&MODULE_P33, 0, 0xff);
409 * \endcode
410 *
411 */
412 IFX_INLINE uint32 IfxPort_getGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask);
413
414 /** \brief Set the port group state.
415 * \param port Pointer to the port which should be accessed.
416 * \param pinIndex start at the given pin
417 * \param mask selects the pins which should be modified (starting from pinIndex)
418 * \param data specifies the value which should be set
419 * \return None
420 *
421 * Coding example:
422 * \code
423 * // configure P33.[7:0] as GPIO outputs
424 * IfxPort_setGroupModeOutput(&MODULE_P33, 0, 0xff, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
425 *
426 * // set initial value
427 * IfxPort_setGroupState(&MODULE_P33, 0, 0xff, 0x42);
428 * \endcode
429 *
430 */
431 IFX_INLINE void IfxPort_setGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask, uint16 data);
432
433 /******************************************************************************/
434 /*-------------------------Global Function Prototypes-------------------------*/
435 /******************************************************************************/
436
437 /** \brief Returns the module address of the selected Port module
438 * \param port Pointer to PORT module registers
439 * \return PORT module register address
440 */
441 IFX_EXTERN Ifx_P *IfxPort_getAddress(IfxPort_Index port);
442
443 /** \brief Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c)
444 * \param port Pointer to the port for which the index number in IfxModule_IndexMap should be retrieved.
445 * \return port index of IfxModule_IndexMap. return -1 in case of unknown port index.
446 */
447 IFX_EXTERN IfxPort_Index IfxPort_getIndex(Ifx_P *port);
448
449 /** \brief Set pin modes to input at the pin location specified by '1' by the mask
450 * \param port Pointer to the port which should be accessed.
451 * \param pinIndex start at the given pin
452 * \param mask selects the pins which should be modified (starting from pinIndex)
453 * \param mode Specifies the port pin mode.
454 * \return None
455 *
456 * Coding example:
457 * \code
458 * // configure P33.[7:0] as GPIO inputs with Pull-Down enabled
459 * IfxPort_setGroupModeInput(&MODULE_P33, 0, 0xff, IfxPort_InputMode_pullDown);
460 * \endcode
461 *
462 */
463 IFX_EXTERN void IfxPort_setGroupModeInput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode);
464
465 /** \brief Set pin modes to output at the pin location specified by '1' by the mask starting at pinIndex
466 * \param port Pointer to the port which should be accessed.
467 * \param pinIndex start at the given pin
468 * \param mask selects the pins which should be modified (starting from pinIndex)
469 * \param mode Specifies the port pin mode.
470 * \param index Specifies the alternate (or general purpose) output channel.
471 * \return None
472 *
473 * Coding example:
474 * \code
475 * // configure P33.[7:0] as GPIO outputs
476 * IfxPort_setGroupModeOutput(&MODULE_P33, 0, 0xff, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
477 * \endcode
478 *
479 */
480 IFX_EXTERN void IfxPort_setGroupModeOutput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index);
481
482 /** \brief Set pad driver strength at the pin location specified by '1' by the mask
483 * \param port Pointer to the port which should be accessed.
484 * \param pinIndex start at the given pin
485 * \param mask selects the pins which should be modified (starting from pinIndex)
486 * \param padDriver Specifies the pad driver strength.
487 * \return None
488 *
489 * Coding example:
490 * \code
491 * // configure P33.[7:0] to use CMOS pad driver with speed 1
492 * IfxPort_setGroupPadDriver(&MODULE_P33, 0, 0xff, IfxPort_PadDriver_cmosAutomotiveSpeed1);
493 * \endcode
494 *
495 */
496 IFX_EXTERN void IfxPort_setGroupPadDriver(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver);
497
498 /** \brief set LVDSH mode (configured for Port21)
499 * \param port Pointer to the port which should be accessed.
500 * \param pinIndex specifies pin to be modified
501 * \param mode specifes the mode of pin
502 * \param enablePortControlled specifies whether it is controlled by port or HSCT
503 * \return None
504 */
505 IFX_EXTERN void IfxPort_setPinModeLvdsHigh(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode, IfxPort_ControlledBy enablePortControlled);
506
507 /** \brief set LVDSM mode
508 * \param port Pointer to the port which should be accessed.
509 * \param pinIndex specifies pin to be modified
510 * \param lvdsPadDriver select speed grade of LVDS Pad
511 * \param padSupply select the PAD supply (5/3.3V)
512 * \return None
513 */
514 IFX_EXTERN void IfxPort_setPinModeLvdsMedium(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver lvdsPadDriver, IfxPort_PadSupply padSupply);
515
516 /** \} */
517
518 /******************************************************************************/
519 /*-------------------------Global Function Prototypes-------------------------*/
520 /******************************************************************************/
521
522 /** \brief Disable the emergency stop function.
523 * This function disables the emergency stop function. No check is done on port functionality.
524 * \param port Pointer to the port which should be accessed.
525 * \param pinIndex Specifies the pin for which the emergency stop function should be disabled.
526 * \return None
527 *
528 * \see IfxPort_disableEmergencyStop()
529 *
530 */
531 IFX_EXTERN void IfxPort_resetESR(Ifx_P *port, uint8 pinIndex);
532
533 /** \brief Enable the emergency stop function.
534 * This function enables the emergency stop function. No check is done on port functionality.
535 * \param port Pointer to the port which should be accessed.
536 * \param pinIndex Specifies the pin for which the emergency stop function should be enabled.
537 * \return None
538 *
539 * \see IfxPort_enableEmergencyStop()
540 *
541 */
542 IFX_EXTERN void IfxPort_setESR(Ifx_P *port, uint8 pinIndex);
543
544 /******************************************************************************/
545 /*---------------------Inline Function Implementations------------------------*/
546 /******************************************************************************/
547
548 IFX_INLINE uint32 IfxPort_getGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask)
549 {
550 return (uint32)((port->IN.U) >> (pinIndex)) & mask;
551 }
552
553
554 IFX_INLINE boolean IfxPort_getPinState(Ifx_P *port, uint8 pinIndex)
555 {
556 return (__getbit(&port->IN.U, pinIndex) != 0) ? TRUE : FALSE;
557 }
558
559
560 IFX_INLINE void IfxPort_setGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask, uint16 data)
561 {
562 port->OUT.U = (port->OUT.U & ~((uint32)(mask)) << pinIndex) | (data << pinIndex);
563 }
564
565
566 IFX_INLINE void IfxPort_setPinHigh(Ifx_P *port, uint8 pinIndex)
567 {
568 IfxPort_setPinState(port, pinIndex, IfxPort_State_high);
569 }
570
571
572 IFX_INLINE void IfxPort_setPinLow(Ifx_P *port, uint8 pinIndex)
573 {
574 IfxPort_setPinState(port, pinIndex, IfxPort_State_low);
575 }
576
577
578 IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
579 {
580 IfxPort_setPinMode(port, pinIndex, (IfxPort_Mode)mode);
581 }
582
583
584 IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
585 {
586 IfxPort_setPinMode(port, pinIndex, (IfxPort_Mode)(index | mode));
587 }
588
589
590 IFX_INLINE void IfxPort_setPinState(Ifx_P *port, uint8 pinIndex, IfxPort_State action)
591 {
592 port->OMR.U = action << pinIndex;
593 }
594
595
596 IFX_INLINE void IfxPort_togglePin(Ifx_P *port, uint8 pinIndex)
597 {
598 IfxPort_setPinState(port, pinIndex, IfxPort_State_toggled);
599 }
600
601
602 #endif /* IFXPORT_H */
IfxPort_PadSupply_5v
select, 5V supply
Definition: IfxPort.h:162
IfxPort_State_toggled
Ifx_P pin is toggled.
Definition: IfxPort.h:175
IfxPort_Mode_outputOpenDrainAlt5
Open-drain, Alternate output function 5.
Definition: IfxPort.h:110
IfxPort_Mode_outputOpenDrainAlt4
Open-drain, Alternate output function 4.
Definition: IfxPort.h:109
IfxPort_PadDriver_lvdsSpeed2
Lvds Speed grade 2.
Definition: IfxPort.h:149
IfxPort_Mode_outputPushPullAlt1
Push-pull, Alternate output function 1.
Definition: IfxPort.h:98
IfxPort_PadDriver_ttlSpeed4
Speed grade 4.
Definition: IfxPort.h:155
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:133
IfxPort_Index
IfxPort_Index
List of the available Port resources.
Definition: IfxPort_cfg.h:76
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxPort_PadDriver_ttlSpeed1
Speed grade 1.
Definition: IfxPort.h:152
IfxPort_State_high
Ifx_P pin is set to high.
Definition: IfxPort.h:173
IfxPort_Mode_inputNoPullDevice
Input, No pull device connected.
Definition: IfxPort.h:94
IfxPort_setPinMode
IFX_EXTERN void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality wh...
Definition: IfxPort.c:277
IfxPort_Mode_outputPushPullGeneral
Push-pull, General-purpose output.
Definition: IfxPort.h:97
IfxPort_Mode_outputOpenDrainAlt7
Open-drain, Alternate output function 7.
Definition: IfxPort.h:112
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:121
IfxPort_Mode_outputOpenDrainAlt6
Open-drain, Alternate output function 6.
Definition: IfxPort.h:111
IfxPort_setPinPadDriver
IFX_EXTERN void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxPort_ControlledBy_hsct
Port controlled by HSCT Module.
Definition: IfxPort.h:75
IfxPort_setGroupModeInput
IFX_EXTERN void IfxPort_setGroupModeInput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
Set pin modes to input at the pin location specified by &#39;1&#39; by the mask.
Definition: IfxPort.c:155
IfxPort_Mode_inputPullDown
Input, pull-down device connected.
Definition: IfxPort.h:95
IfxPort_Pin_Config::padDriver
IfxPort_PadDriver padDriver
Definition: IfxPort.h:201
IfxPort_setGroupState
IFX_INLINE void IfxPort_setGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask, uint16 data)
Set the port group state.
Definition: IfxPort.h:560
IfxPort_InputMode_undefined
Definition: IfxPort.h:82
IfxPort_State
IfxPort_State
Ifx_P output modification modes definition.
Definition: IfxPort.h:170
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
IfxPort_Pin_Config::mode
IfxPort_OutputIdx mode
Definition: IfxPort.h:200
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxPort_Mode_outputPushPullAlt4
Push-pull, Alternate output function 4.
Definition: IfxPort.h:101
IfxPort_ControlledBy
IfxPort_ControlledBy
The LVDS RX_DIS control function can be selected from the Port (default) or HSCT module.declared in MODULE_PORTx.LPCRx.
Definition: IfxPort.h:72
IfxPort_PadDriver_cmosAutomotiveSpeed4
Speed grade 4.
Definition: IfxPort.h:147
IfxScuWdt.h
SCU basic functionality.
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:125
IfxPort_setGroupModeOutput
IFX_EXTERN void IfxPort_setGroupModeOutput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Set pin modes to output at the pin location specified by &#39;1&#39; by the mask starting at pinIndex...
Definition: IfxPort.c:193
IfxPort_Mode_outputOpenDrainAlt2
Open-drain, Alternate output function 2.
Definition: IfxPort.h:107
IfxPort_setESR
IFX_EXTERN void IfxPort_setESR(Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality.
Definition: IfxPort.c:145
IfxPort_OutputIdx_general
Definition: IfxPort.h:119
IfxPort_Mode_outputPushPullAlt7
Push-pull, Alternate output function 7.
Definition: IfxPort.h:104
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:122
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:144
IfxPort_PadDriver_cmosAutomotiveSpeed3
Speed grade 3.
Definition: IfxPort.h:146
IfxPort_Mode_outputPushPullAlt2
Push-pull, Alternate output function 2.
Definition: IfxPort.h:99
IfxPort_getGroupState
IFX_INLINE uint32 IfxPort_getGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask)
Return the port group state.
Definition: IfxPort.h:548
IfxPort_Mode_outputOpenDrainGeneral
Open-drain, General-purpose output.
Definition: IfxPort.h:105
__getbit
#define __getbit
Definition: IfxCpu_IntrinsicsDcc.h:1749
IfxPort_Pin_Config
To configure pins.
Definition: IfxPort.h:196
IfxPort_Mode_outputPushPullAlt6
Push-pull, Alternate output function 6.
Definition: IfxPort.h:103
IfxPort_setPinModeLvdsMedium
IFX_EXTERN void IfxPort_setPinModeLvdsMedium(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver lvdsPadDriver, IfxPort_PadSupply padSupply)
set LVDSM mode
Definition: IfxPort.c:322
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:83
IfxPort_setPinState
IFX_INLINE void IfxPort_setPinState(Ifx_P *port, uint8 pinIndex, IfxPort_State action)
Set / Resets / Toggle the port output.
Definition: IfxPort.h:590
IfxPort_OutputIdx_alt1
Definition: IfxPort.h:120
IfxPort_PadDriver_ttlSpeed2
Speed grade 2.
Definition: IfxPort.h:153
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxPort_PadSupply_3v
select, 3V supply
Definition: IfxPort.h:163
IfxPort_getIndex
IFX_EXTERN IfxPort_Index IfxPort_getIndex(Ifx_P *port)
Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c)
Definition: IfxPort.c:115
IfxPort_togglePin
IFX_INLINE void IfxPort_togglePin(Ifx_P *port, uint8 pinIndex)
Toggle the port output.
Definition: IfxPort.h:596
IfxPort_enableEmergencyStop
IFX_EXTERN boolean IfxPort_enableEmergencyStop(Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality.
Definition: IfxPort.c:75
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:123
IfxPort_Mode_outputPushPullAlt3
Push-pull, Alternate output function 3.
Definition: IfxPort.h:100
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxPort_setPinLow
IFX_INLINE void IfxPort_setPinLow(Ifx_P *port, uint8 pinIndex)
Reset the port output.
Definition: IfxPort.h:572
IfxPort_State_low
Ifx_P pin is set to low.
Definition: IfxPort.h:174
IfxPort_ControlledBy_port
port controlled by PORT Module
Definition: IfxPort.h:74
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:126
IfxPort_Mode_inputPullUp
Input, pull-up device connected.
Definition: IfxPort.h:96
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxPort_InputMode_pullDown
Definition: IfxPort.h:84
IfxPort_setPinModeLvdsHigh
IFX_EXTERN void IfxPort_setPinModeLvdsHigh(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode, IfxPort_ControlledBy enablePortControlled)
set LVDSH mode (configured for Port21)
Definition: IfxPort.c:295
IfxPort_cfg.h
PORT on-chip implementation data.
IfxPort_State_notChanged
Ifx_P pin is left unchanged.
Definition: IfxPort.h:172
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPort_disableEmergencyStop
IFX_EXTERN boolean IfxPort_disableEmergencyStop(Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality.
Definition: IfxPort.c:52
IfxPort_PadDriver_ttlSpeed3
Speed grade 3.
Definition: IfxPort.h:154
IfxPort_PadDriver_lvdsSpeed3
Lvds Speed grade 3.
Definition: IfxPort.h:150
IfxPort_PadSupply
IfxPort_PadSupply
MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair...
Definition: IfxPort.h:160
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxPort_getPinState
IFX_INLINE boolean IfxPort_getPinState(Ifx_P *port, uint8 pinIndex)
Return the port state.
Definition: IfxPort.h:554
IfxPort_getAddress
IFX_EXTERN Ifx_P * IfxPort_getAddress(IfxPort_Index port)
Returns the module address of the selected Port module.
Definition: IfxPort.c:96
IfxPort_PadDriver_lvdsSpeed4
Lvds Speed grade 4.
Definition: IfxPort.h:151
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxPort_setPinHigh
IFX_INLINE void IfxPort_setPinHigh(Ifx_P *port, uint8 pinIndex)
Set the port output.
Definition: IfxPort.h:566
IfxPort_PadDriver_lvdsSpeed1
Lvds Speed grade 1.
Definition: IfxPort.h:148
IfxPort_Mode_outputOpenDrainAlt3
Open-drain, Alternate output function 3.
Definition: IfxPort.h:108
IfxPort_Mode
IfxPort_Mode
Ifx_P input / output mode definition.
Definition: IfxPort.h:92
IfxPort_setGroupPadDriver
IFX_EXTERN void IfxPort_setGroupPadDriver(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
Set pad driver strength at the pin location specified by &#39;1&#39; by the mask.
Definition: IfxPort.c:233
IfxPort_resetESR
IFX_EXTERN void IfxPort_resetESR(Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality.
Definition: IfxPort.c:135
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:124
IfxPort_OutputMode_none
Definition: IfxPort.h:135
IfxPort_Mode_outputPushPullAlt5
Push-pull, Alternate output function 5.
Definition: IfxPort.h:102
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxPort_OutputMode_openDrain
Definition: IfxPort.h:134
IfxPort_PadDriver_cmosAutomotiveSpeed2
Speed grade 2.
Definition: IfxPort.h:145
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxPort_InputMode_pullUp
Definition: IfxPort.h:85
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxPort_Mode_outputOpenDrainAlt1
Open-drain, Alternate output function 1.
Definition: IfxPort.h:106


iLLD_TC26B: IfxPort_Io.c Source File

  • Port
  • Io
IfxPort_Io.c
Go to the documentation of this file.
1 /**
2 * \file IfxPort_Io.c
3 * \brief PORT IO details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxPort_Io.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 void IfxPort_Io_initModule(const IfxPort_Io_Config *config)
53 {
54 IfxPort_Io_ConfigPin *pinTable = (IfxPort_Io_ConfigPin *)&config->pinTable[0];
55
56 uint32 i;
57
58 for (i = 0; i < config->size; i++, ++pinTable)
59 {
60 IfxPort_Pin *pin = (IfxPort_Pin *)pinTable->pin;
61 IfxPort_setPinMode(pin->port, pin->pinIndex, pinTable->mode);
62 IfxPort_setPinPadDriver(pin->port, pin->pinIndex, pinTable->padDriver);
63 }
64 }
IfxPort_Io.h
PORT IO details.
IfxPort_setPinMode
void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality wh...
Definition: IfxPort.c:277
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxPort_Io_ConfigPin::pin
IFX_CONST IfxPort_Pin * pin
Definition: IfxPort_Io.h:178
IfxPort_Io_Config::size
uint32 size
Definition: IfxPort_Io.h:189
IfxPort_Io_ConfigPin::mode
IfxPort_Mode mode
Definition: IfxPort_Io.h:179
IfxPort_Io_Config::pinTable
IfxPort_Io_ConfigPin * pinTable
Definition: IfxPort_Io.h:190
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxPort_Io_initModule
void IfxPort_Io_initModule(const IfxPort_Io_Config *config)
Definition: IfxPort_Io.c:52
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxPort_Io_ConfigPin::padDriver
IfxPort_PadDriver padDriver
Definition: IfxPort_Io.h:180
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxPort_Io_ConfigPin
Definition: IfxPort_Io.h:176
IfxPort_Io_Config
Definition: IfxPort_Io.h:187


iLLD_TC26B: IfxPort_Io.h Source File

  • Port
  • Io
IfxPort_Io.h
Go to the documentation of this file.
1 /**
2 * \file IfxPort_Io.h
3 * \brief PORT IO details
4 * \ingroup IfxLld_Port
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Port_Io_Usage How to use the PORT I/O driver?
42 * \ingroup IfxLld_Port
43 *
44 * The PORT I/O driver provides several functions to easily configure and read pins.
45 * The configuration includes input/output, mode, pad driver strength and state. For referencing the pins and their ports a IfxPort_PinMap is available as well.
46 *
47 * In the following sections it will be described, how to integrate the driver into the application framework.
48 *
49 * \section IfxLld_Port_Io_Preparation Preparation
50 * \subsection IfxLld_Port_Io_Include Include Files
51 *
52 * Include following header file into your C code:
53 * \code
54 * #include <Port/Io/IfxPort_Io.h>
55 * \endcode
56 *
57 * \subsection IfxLld_Port_Io_Variables Conifguration Table
58 *
59 * Specify the used pins, their modes and (for outputs) the pad driver strength:
60 * <br> Note: For inputs the pad driver strength is only a dummy.
61 * \code
62 * const IfxPort_Io_ConfigPin configPin[] = {
63 * {&IfxPort_P00_0, IfxPort_Mode_inputPullDown, IfxPort_PadDriver_cmosAutomotiveSpeed1}, // P00.0
64 * {&IfxPort_P33_0, IfxPort_Mode_outputPushPullGeneral, IfxPort_PadDriver_cmosAutomotiveSpeed1}, // P33.0
65 * };
66 * \endcode
67 *
68 * Note: the IfxPort_* pins are defined in IfxPort_PinMap
69 *
70 * \subsection IfxLld_Port_Io_Init Port Initialisation
71 *
72 * Assemble the final configuration structure:
73 *
74 * \code
75 * const IfxPort_Io_Config conf = {
76 * sizeof(configPin)/sizeof(IfxPort_Io_ConfigPin),
77 * (IfxPort_Io_ConfigPin *)configPin
78 * };
79 * \endcode
80 *
81 * Call the initialisation function:
82 *
83 * \code
84 * IfxPort_Io_initModule(&conf);
85 * \endcode
86 *
87 * Now the pins are configured as specified.
88 *
89 * \section IfxLld_Port_Io_MiscFunctions Misc. Functions of the Standard Layer
90 *
91 * \subsection IfxLld_Port_Io_Mode Pin Mode Configuration
92 *
93 * Generally, you can use one function for both inputs and outputs to set the desired mode.
94 *
95 * \code
96 * // configure P33.0 as general output
97 * IfxPort_setPinMode(&MODULE_P33, 0, IfxPort_Mode_outputPushPullGeneral);
98 * \endcode
99 *
100 * For inputs use the IfxPort_setPinModeInput function:
101 *
102 * \code
103 * // configure P33.0 as input with pullUp
104 * IfxPort_setPinModeInput(&MODULE_P33, 0, IfxPort_InputMode_pullUp);
105 * \endcode
106 *
107 * For outputs use the IfxPort_setModeOutput function:
108 *
109 * \code
110 * // configure P33.0 as output in general pushPull mode
111 * IfxPort_setPinModeOutput(&MODULE_P33, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
112 * \endcode
113 *
114 * If the pin is an output, the pad driver should be configured as well:
115 *
116 * \code
117 * IfxPort_setPinPadDriver(&MODULE_P33, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);
118 * \endcode
119 *
120 * \subsection IfxLld_Port_Io_Input Reading Input State
121 * Read the state of a single pin:
122 * \code
123 * uint8 state = IfxPort_getPinState(&MODULE_P33, 0); // read P33.0
124 * \endcode
125 *
126 * \subsection IfxLld_Port_Io_Output Setting Output State
127 *
128 * Generally, you can use one function to set an output pin high or low or to toggle it.
129 *
130 * \code
131 * IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled); // toggle P33.0
132 * \endcode
133 *
134 * An output pin can be set high as following:
135 * \code
136 * IfxPort_setPinHigh(&MODULE_P33, 0); // P33.0 = 1
137 * \endcode
138 *
139 * An output pin can be set low as following:
140 * \code
141 * IfxPort_setPinLow(&MODULE_P33, 0); // P33.0 = 0
142 * \endcode
143 *
144 * \subsection IfxLld_Port_Io_Emergency Configure Emergency Function
145 *
146 * Enable emergency stop for P33.0:
147 * \code
148 * IfxPort_enableEmergencyStop(&MODULE_P33, 0);
149 * \endcode
150 *
151 * The driver also provides a function to disable this feature.
152 *
153 * \defgroup IfxLld_Port_Io Interface Driver
154 * \ingroup IfxLld_Port
155 * \defgroup IfxLld_Port_Io_DataStructures Data Structures
156 * \ingroup IfxLld_Port_Io
157 * \defgroup IfxLld_Port_Io_ModuleFunctions Module Functions
158 * \ingroup IfxLld_Port_Io
159 */
160
161 #ifndef IFXPORT_IO_H
162 #define IFXPORT_IO_H 1
163
164 /******************************************************************************/
165 /*----------------------------------Includes----------------------------------*/
166 /******************************************************************************/
167
168 #include "Port/Std/IfxPort.h"
169
170 /******************************************************************************/
171 /*-----------------------------Data Structures--------------------------------*/
172 /******************************************************************************/
173
174 /** \addtogroup IfxLld_Port_Io_DataStructures
175 * \{ */
176 typedef struct
177 {
178 IFX_CONST IfxPort_Pin *pin;
179 IfxPort_Mode mode;
180 IfxPort_PadDriver padDriver;
181 } IfxPort_Io_ConfigPin;
182
183 /** \} */
184
185 /** \addtogroup IfxLld_Port_Io_DataStructures
186 * \{ */
187 typedef struct
188 {
189 uint32 size;
190 IfxPort_Io_ConfigPin *pinTable;
191 } IfxPort_Io_Config;
192
193 /** \} */
194
195 /** \addtogroup IfxLld_Port_Io_ModuleFunctions
196 * \{ */
197
198 /******************************************************************************/
199 /*-------------------------Global Function Prototypes-------------------------*/
200 /******************************************************************************/
201
202 /**
203 * \return None
204 */
205 IFX_EXTERN void IfxPort_Io_initModule(const IfxPort_Io_Config *config);
206
207 /** \} */
208
209 #endif /* IFXPORT_IO_H */
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPort_Io_ConfigPin::pin
IFX_CONST IfxPort_Pin * pin
Definition: IfxPort_Io.h:178
IfxPort_Io_Config::size
uint32 size
Definition: IfxPort_Io.h:189
IfxPort_Io_ConfigPin::mode
IfxPort_Mode mode
Definition: IfxPort_Io.h:179
IfxPort_Io_Config::pinTable
IfxPort_Io_ConfigPin * pinTable
Definition: IfxPort_Io.h:190
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPort_Io_initModule
IFX_EXTERN void IfxPort_Io_initModule(const IfxPort_Io_Config *config)
Definition: IfxPort_Io.c:52
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxPort_Io_ConfigPin::padDriver
IfxPort_PadDriver padDriver
Definition: IfxPort_Io.h:180
IfxPort_Io_ConfigPin
Definition: IfxPort_Io.h:176
IfxPort_Mode
IfxPort_Mode
Ifx_P input / output mode definition.
Definition: IfxPort.h:92
IfxPort_Io_Config
Definition: IfxPort_Io.h:187
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxPort_PinMap.c Source File

  • _PinMap
IfxPort_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxPort_PinMap.c
3 * \brief PORT I/O map
4 * \ingroup IfxLld_Port
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxPort_PinMap.h"
44
45 IfxPort_Pin IfxPort_P00_0 = {&MODULE_P00, 0};
46 IfxPort_Pin IfxPort_P00_1 = {&MODULE_P00, 1};
47 IfxPort_Pin IfxPort_P00_10 = {&MODULE_P00,10};
48 IfxPort_Pin IfxPort_P00_11 = {&MODULE_P00,11};
49 IfxPort_Pin IfxPort_P00_12 = {&MODULE_P00,12};
50 IfxPort_Pin IfxPort_P00_2 = {&MODULE_P00, 2};
51 IfxPort_Pin IfxPort_P00_3 = {&MODULE_P00, 3};
52 IfxPort_Pin IfxPort_P00_4 = {&MODULE_P00, 4};
53 IfxPort_Pin IfxPort_P00_5 = {&MODULE_P00, 5};
54 IfxPort_Pin IfxPort_P00_6 = {&MODULE_P00, 6};
55 IfxPort_Pin IfxPort_P00_7 = {&MODULE_P00, 7};
56 IfxPort_Pin IfxPort_P00_8 = {&MODULE_P00, 8};
57 IfxPort_Pin IfxPort_P00_9 = {&MODULE_P00, 9};
58 IfxPort_Pin IfxPort_P02_0 = {&MODULE_P02, 0};
59 IfxPort_Pin IfxPort_P02_1 = {&MODULE_P02, 1};
60 IfxPort_Pin IfxPort_P02_2 = {&MODULE_P02, 2};
61 IfxPort_Pin IfxPort_P02_3 = {&MODULE_P02, 3};
62 IfxPort_Pin IfxPort_P02_4 = {&MODULE_P02, 4};
63 IfxPort_Pin IfxPort_P02_5 = {&MODULE_P02, 5};
64 IfxPort_Pin IfxPort_P02_6 = {&MODULE_P02, 6};
65 IfxPort_Pin IfxPort_P02_7 = {&MODULE_P02, 7};
66 IfxPort_Pin IfxPort_P02_8 = {&MODULE_P02, 8};
67 IfxPort_Pin IfxPort_P10_0 = {&MODULE_P10, 0};
68 IfxPort_Pin IfxPort_P10_1 = {&MODULE_P10, 1};
69 IfxPort_Pin IfxPort_P10_2 = {&MODULE_P10, 2};
70 IfxPort_Pin IfxPort_P10_3 = {&MODULE_P10, 3};
71 IfxPort_Pin IfxPort_P10_4 = {&MODULE_P10, 4};
72 IfxPort_Pin IfxPort_P10_5 = {&MODULE_P10, 5};
73 IfxPort_Pin IfxPort_P10_6 = {&MODULE_P10, 6};
74 IfxPort_Pin IfxPort_P10_7 = {&MODULE_P10, 7};
75 IfxPort_Pin IfxPort_P10_8 = {&MODULE_P10, 8};
76 IfxPort_Pin IfxPort_P11_10 = {&MODULE_P11,10};
77 IfxPort_Pin IfxPort_P11_11 = {&MODULE_P11,11};
78 IfxPort_Pin IfxPort_P11_12 = {&MODULE_P11,12};
79 IfxPort_Pin IfxPort_P11_2 = {&MODULE_P11, 2};
80 IfxPort_Pin IfxPort_P11_3 = {&MODULE_P11, 3};
81 IfxPort_Pin IfxPort_P11_6 = {&MODULE_P11, 6};
82 IfxPort_Pin IfxPort_P11_9 = {&MODULE_P11, 9};
83 IfxPort_Pin IfxPort_P13_0 = {&MODULE_P13, 0};
84 IfxPort_Pin IfxPort_P13_1 = {&MODULE_P13, 1};
85 IfxPort_Pin IfxPort_P13_2 = {&MODULE_P13, 2};
86 IfxPort_Pin IfxPort_P13_3 = {&MODULE_P13, 3};
87 IfxPort_Pin IfxPort_P14_0 = {&MODULE_P14, 0};
88 IfxPort_Pin IfxPort_P14_1 = {&MODULE_P14, 1};
89 IfxPort_Pin IfxPort_P14_10 = {&MODULE_P14,10};
90 IfxPort_Pin IfxPort_P14_2 = {&MODULE_P14, 2};
91 IfxPort_Pin IfxPort_P14_3 = {&MODULE_P14, 3};
92 IfxPort_Pin IfxPort_P14_4 = {&MODULE_P14, 4};
93 IfxPort_Pin IfxPort_P14_5 = {&MODULE_P14, 5};
94 IfxPort_Pin IfxPort_P14_6 = {&MODULE_P14, 6};
95 IfxPort_Pin IfxPort_P14_7 = {&MODULE_P14, 7};
96 IfxPort_Pin IfxPort_P14_8 = {&MODULE_P14, 8};
97 IfxPort_Pin IfxPort_P14_9 = {&MODULE_P14, 9};
98 IfxPort_Pin IfxPort_P15_0 = {&MODULE_P15, 0};
99 IfxPort_Pin IfxPort_P15_1 = {&MODULE_P15, 1};
100 IfxPort_Pin IfxPort_P15_2 = {&MODULE_P15, 2};
101 IfxPort_Pin IfxPort_P15_3 = {&MODULE_P15, 3};
102 IfxPort_Pin IfxPort_P15_4 = {&MODULE_P15, 4};
103 IfxPort_Pin IfxPort_P15_5 = {&MODULE_P15, 5};
104 IfxPort_Pin IfxPort_P15_6 = {&MODULE_P15, 6};
105 IfxPort_Pin IfxPort_P15_7 = {&MODULE_P15, 7};
106 IfxPort_Pin IfxPort_P15_8 = {&MODULE_P15, 8};
107 IfxPort_Pin IfxPort_P20_0 = {&MODULE_P20, 0};
108 IfxPort_Pin IfxPort_P20_1 = {&MODULE_P20, 1};
109 IfxPort_Pin IfxPort_P20_10 = {&MODULE_P20,10};
110 IfxPort_Pin IfxPort_P20_11 = {&MODULE_P20,11};
111 IfxPort_Pin IfxPort_P20_12 = {&MODULE_P20,12};
112 IfxPort_Pin IfxPort_P20_13 = {&MODULE_P20,13};
113 IfxPort_Pin IfxPort_P20_14 = {&MODULE_P20,14};
114 IfxPort_Pin IfxPort_P20_3 = {&MODULE_P20, 3};
115 IfxPort_Pin IfxPort_P20_6 = {&MODULE_P20, 6};
116 IfxPort_Pin IfxPort_P20_7 = {&MODULE_P20, 7};
117 IfxPort_Pin IfxPort_P20_8 = {&MODULE_P20, 8};
118 IfxPort_Pin IfxPort_P20_9 = {&MODULE_P20, 9};
119 IfxPort_Pin IfxPort_P21_0 = {&MODULE_P21, 0};
120 IfxPort_Pin IfxPort_P21_1 = {&MODULE_P21, 1};
121 IfxPort_Pin IfxPort_P21_2 = {&MODULE_P21, 2};
122 IfxPort_Pin IfxPort_P21_3 = {&MODULE_P21, 3};
123 IfxPort_Pin IfxPort_P21_4 = {&MODULE_P21, 4};
124 IfxPort_Pin IfxPort_P21_5 = {&MODULE_P21, 5};
125 IfxPort_Pin IfxPort_P21_6 = {&MODULE_P21, 6};
126 IfxPort_Pin IfxPort_P21_7 = {&MODULE_P21, 7};
127 IfxPort_Pin IfxPort_P22_0 = {&MODULE_P22, 0};
128 IfxPort_Pin IfxPort_P22_1 = {&MODULE_P22, 1};
129 IfxPort_Pin IfxPort_P22_2 = {&MODULE_P22, 2};
130 IfxPort_Pin IfxPort_P22_3 = {&MODULE_P22, 3};
131 IfxPort_Pin IfxPort_P23_0 = {&MODULE_P23, 0};
132 IfxPort_Pin IfxPort_P23_1 = {&MODULE_P23, 1};
133 IfxPort_Pin IfxPort_P23_2 = {&MODULE_P23, 2};
134 IfxPort_Pin IfxPort_P23_3 = {&MODULE_P23, 3};
135 IfxPort_Pin IfxPort_P23_4 = {&MODULE_P23, 4};
136 IfxPort_Pin IfxPort_P23_5 = {&MODULE_P23, 5};
137 IfxPort_Pin IfxPort_P32_0 = {&MODULE_P32, 0};
138 IfxPort_Pin IfxPort_P32_2 = {&MODULE_P32, 2};
139 IfxPort_Pin IfxPort_P32_3 = {&MODULE_P32, 3};
140 IfxPort_Pin IfxPort_P32_4 = {&MODULE_P32, 4};
141 IfxPort_Pin IfxPort_P33_0 = {&MODULE_P33, 0};
142 IfxPort_Pin IfxPort_P33_1 = {&MODULE_P33, 1};
143 IfxPort_Pin IfxPort_P33_10 = {&MODULE_P33,10};
144 IfxPort_Pin IfxPort_P33_11 = {&MODULE_P33,11};
145 IfxPort_Pin IfxPort_P33_12 = {&MODULE_P33,12};
146 IfxPort_Pin IfxPort_P33_13 = {&MODULE_P33,13};
147 IfxPort_Pin IfxPort_P33_2 = {&MODULE_P33, 2};
148 IfxPort_Pin IfxPort_P33_3 = {&MODULE_P33, 3};
149 IfxPort_Pin IfxPort_P33_4 = {&MODULE_P33, 4};
150 IfxPort_Pin IfxPort_P33_5 = {&MODULE_P33, 5};
151 IfxPort_Pin IfxPort_P33_6 = {&MODULE_P33, 6};
152 IfxPort_Pin IfxPort_P33_7 = {&MODULE_P33, 7};
153 IfxPort_Pin IfxPort_P33_8 = {&MODULE_P33, 8};
154 IfxPort_Pin IfxPort_P33_9 = {&MODULE_P33, 9};
155 IfxPort_Pin IfxPort_P40_0 = {&MODULE_P40, 0};
156 IfxPort_Pin IfxPort_P40_1 = {&MODULE_P40, 1};
157 IfxPort_Pin IfxPort_P40_2 = {&MODULE_P40, 2};
158 IfxPort_Pin IfxPort_P40_3 = {&MODULE_P40, 3};
159 IfxPort_Pin IfxPort_P40_6 = {&MODULE_P40, 6};
160 IfxPort_Pin IfxPort_P40_7 = {&MODULE_P40, 7};
161 IfxPort_Pin IfxPort_P40_8 = {&MODULE_P40, 8};
162 IfxPort_Pin IfxPort_P40_9 = {&MODULE_P40, 9};
163
164
165 const IfxPort_Pin *IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS] = {
166 {
167 &IfxPort_P00_0,
168 &IfxPort_P00_1,
169 &IfxPort_P00_2,
170 &IfxPort_P00_3,
171 &IfxPort_P00_4,
172 &IfxPort_P00_5,
173 &IfxPort_P00_6,
174 &IfxPort_P00_7,
175 &IfxPort_P00_8,
176 &IfxPort_P00_9,
177 &IfxPort_P00_10,
178 &IfxPort_P00_11,
179 &IfxPort_P00_12,
180 NULL_PTR,
181 NULL_PTR
182 },
183 {
184 NULL_PTR,
185 NULL_PTR,
186 NULL_PTR,
187 NULL_PTR,
188 NULL_PTR,
189 NULL_PTR,
190 NULL_PTR,
191 NULL_PTR,
192 NULL_PTR,
193 NULL_PTR,
194 NULL_PTR,
195 NULL_PTR,
196 NULL_PTR,
197 NULL_PTR,
198 NULL_PTR
199 },
200 {
201 &IfxPort_P02_0,
202 &IfxPort_P02_1,
203 &IfxPort_P02_2,
204 &IfxPort_P02_3,
205 &IfxPort_P02_4,
206 &IfxPort_P02_5,
207 &IfxPort_P02_6,
208 &IfxPort_P02_7,
209 &IfxPort_P02_8,
210 NULL_PTR,
211 NULL_PTR,
212 NULL_PTR,
213 NULL_PTR,
214 NULL_PTR,
215 NULL_PTR
216 },
217 {
218 NULL_PTR,
219 NULL_PTR,
220 NULL_PTR,
221 NULL_PTR,
222 NULL_PTR,
223 NULL_PTR,
224 NULL_PTR,
225 NULL_PTR,
226 NULL_PTR,
227 NULL_PTR,
228 NULL_PTR,
229 NULL_PTR,
230 NULL_PTR,
231 NULL_PTR,
232 NULL_PTR
233 },
234 {
235 NULL_PTR,
236 NULL_PTR,
237 NULL_PTR,
238 NULL_PTR,
239 NULL_PTR,
240 NULL_PTR,
241 NULL_PTR,
242 NULL_PTR,
243 NULL_PTR,
244 NULL_PTR,
245 NULL_PTR,
246 NULL_PTR,
247 NULL_PTR,
248 NULL_PTR,
249 NULL_PTR
250 },
251 {
252 NULL_PTR,
253 NULL_PTR,
254 NULL_PTR,
255 NULL_PTR,
256 NULL_PTR,
257 NULL_PTR,
258 NULL_PTR,
259 NULL_PTR,
260 NULL_PTR,
261 NULL_PTR,
262 NULL_PTR,
263 NULL_PTR,
264 NULL_PTR,
265 NULL_PTR,
266 NULL_PTR
267 },
268 {
269 NULL_PTR,
270 NULL_PTR,
271 NULL_PTR,
272 NULL_PTR,
273 NULL_PTR,
274 NULL_PTR,
275 NULL_PTR,
276 NULL_PTR,
277 NULL_PTR,
278 NULL_PTR,
279 NULL_PTR,
280 NULL_PTR,
281 NULL_PTR,
282 NULL_PTR,
283 NULL_PTR
284 },
285 {
286 NULL_PTR,
287 NULL_PTR,
288 NULL_PTR,
289 NULL_PTR,
290 NULL_PTR,
291 NULL_PTR,
292 NULL_PTR,
293 NULL_PTR,
294 NULL_PTR,
295 NULL_PTR,
296 NULL_PTR,
297 NULL_PTR,
298 NULL_PTR,
299 NULL_PTR,
300 NULL_PTR
301 },
302 {
303 NULL_PTR,
304 NULL_PTR,
305 NULL_PTR,
306 NULL_PTR,
307 NULL_PTR,
308 NULL_PTR,
309 NULL_PTR,
310 NULL_PTR,
311 NULL_PTR,
312 NULL_PTR,
313 NULL_PTR,
314 NULL_PTR,
315 NULL_PTR,
316 NULL_PTR,
317 NULL_PTR
318 },
319 {
320 NULL_PTR,
321 NULL_PTR,
322 NULL_PTR,
323 NULL_PTR,
324 NULL_PTR,
325 NULL_PTR,
326 NULL_PTR,
327 NULL_PTR,
328 NULL_PTR,
329 NULL_PTR,
330 NULL_PTR,
331 NULL_PTR,
332 NULL_PTR,
333 NULL_PTR,
334 NULL_PTR
335 },
336 {
337 &IfxPort_P10_0,
338 &IfxPort_P10_1,
339 &IfxPort_P10_2,
340 &IfxPort_P10_3,
341 &IfxPort_P10_4,
342 &IfxPort_P10_5,
343 &IfxPort_P10_6,
344 &IfxPort_P10_7,
345 &IfxPort_P10_8,
346 NULL_PTR,
347 NULL_PTR,
348 NULL_PTR,
349 NULL_PTR,
350 NULL_PTR,
351 NULL_PTR
352 },
353 {
354 NULL_PTR,
355 NULL_PTR,
356 &IfxPort_P11_2,
357 &IfxPort_P11_3,
358 NULL_PTR,
359 NULL_PTR,
360 &IfxPort_P11_6,
361 NULL_PTR,
362 NULL_PTR,
363 &IfxPort_P11_9,
364 &IfxPort_P11_10,
365 &IfxPort_P11_11,
366 &IfxPort_P11_12,
367 NULL_PTR,
368 NULL_PTR
369 },
370 {
371 NULL_PTR,
372 NULL_PTR,
373 NULL_PTR,
374 NULL_PTR,
375 NULL_PTR,
376 NULL_PTR,
377 NULL_PTR,
378 NULL_PTR,
379 NULL_PTR,
380 NULL_PTR,
381 NULL_PTR,
382 NULL_PTR,
383 NULL_PTR,
384 NULL_PTR,
385 NULL_PTR
386 },
387 {
388 &IfxPort_P13_0,
389 &IfxPort_P13_1,
390 &IfxPort_P13_2,
391 &IfxPort_P13_3,
392 NULL_PTR,
393 NULL_PTR,
394 NULL_PTR,
395 NULL_PTR,
396 NULL_PTR,
397 NULL_PTR,
398 NULL_PTR,
399 NULL_PTR,
400 NULL_PTR,
401 NULL_PTR,
402 NULL_PTR
403 },
404 {
405 &IfxPort_P14_0,
406 &IfxPort_P14_1,
407 &IfxPort_P14_2,
408 &IfxPort_P14_3,
409 &IfxPort_P14_4,
410 &IfxPort_P14_5,
411 &IfxPort_P14_6,
412 &IfxPort_P14_7,
413 &IfxPort_P14_8,
414 &IfxPort_P14_9,
415 &IfxPort_P14_10,
416 NULL_PTR,
417 NULL_PTR,
418 NULL_PTR,
419 NULL_PTR
420 },
421 {
422 &IfxPort_P15_0,
423 &IfxPort_P15_1,
424 &IfxPort_P15_2,
425 &IfxPort_P15_3,
426 &IfxPort_P15_4,
427 &IfxPort_P15_5,
428 &IfxPort_P15_6,
429 &IfxPort_P15_7,
430 &IfxPort_P15_8,
431 NULL_PTR,
432 NULL_PTR,
433 NULL_PTR,
434 NULL_PTR,
435 NULL_PTR,
436 NULL_PTR
437 },
438 {
439 NULL_PTR,
440 NULL_PTR,
441 NULL_PTR,
442 NULL_PTR,
443 NULL_PTR,
444 NULL_PTR,
445 NULL_PTR,
446 NULL_PTR,
447 NULL_PTR,
448 NULL_PTR,
449 NULL_PTR,
450 NULL_PTR,
451 NULL_PTR,
452 NULL_PTR,
453 NULL_PTR
454 },
455 {
456 NULL_PTR,
457 NULL_PTR,
458 NULL_PTR,
459 NULL_PTR,
460 NULL_PTR,
461 NULL_PTR,
462 NULL_PTR,
463 NULL_PTR,
464 NULL_PTR,
465 NULL_PTR,
466 NULL_PTR,
467 NULL_PTR,
468 NULL_PTR,
469 NULL_PTR,
470 NULL_PTR
471 },
472 {
473 NULL_PTR,
474 NULL_PTR,
475 NULL_PTR,
476 NULL_PTR,
477 NULL_PTR,
478 NULL_PTR,
479 NULL_PTR,
480 NULL_PTR,
481 NULL_PTR,
482 NULL_PTR,
483 NULL_PTR,
484 NULL_PTR,
485 NULL_PTR,
486 NULL_PTR,
487 NULL_PTR
488 },
489 {
490 NULL_PTR,
491 NULL_PTR,
492 NULL_PTR,
493 NULL_PTR,
494 NULL_PTR,
495 NULL_PTR,
496 NULL_PTR,
497 NULL_PTR,
498 NULL_PTR,
499 NULL_PTR,
500 NULL_PTR,
501 NULL_PTR,
502 NULL_PTR,
503 NULL_PTR,
504 NULL_PTR
505 },
506 {
507 &IfxPort_P20_0,
508 &IfxPort_P20_1,
509 NULL_PTR,
510 &IfxPort_P20_3,
511 NULL_PTR,
512 NULL_PTR,
513 &IfxPort_P20_6,
514 &IfxPort_P20_7,
515 &IfxPort_P20_8,
516 &IfxPort_P20_9,
517 &IfxPort_P20_10,
518 &IfxPort_P20_11,
519 &IfxPort_P20_12,
520 &IfxPort_P20_13,
521 &IfxPort_P20_14
522 },
523 {
524 &IfxPort_P21_0,
525 &IfxPort_P21_1,
526 &IfxPort_P21_2,
527 &IfxPort_P21_3,
528 &IfxPort_P21_4,
529 &IfxPort_P21_5,
530 &IfxPort_P21_6,
531 &IfxPort_P21_7,
532 NULL_PTR,
533 NULL_PTR,
534 NULL_PTR,
535 NULL_PTR,
536 NULL_PTR,
537 NULL_PTR,
538 NULL_PTR
539 },
540 {
541 &IfxPort_P22_0,
542 &IfxPort_P22_1,
543 &IfxPort_P22_2,
544 &IfxPort_P22_3,
545 NULL_PTR,
546 NULL_PTR,
547 NULL_PTR,
548 NULL_PTR,
549 NULL_PTR,
550 NULL_PTR,
551 NULL_PTR,
552 NULL_PTR,
553 NULL_PTR,
554 NULL_PTR,
555 NULL_PTR
556 },
557 {
558 &IfxPort_P23_0,
559 &IfxPort_P23_1,
560 &IfxPort_P23_2,
561 &IfxPort_P23_3,
562 &IfxPort_P23_4,
563 &IfxPort_P23_5,
564 NULL_PTR,
565 NULL_PTR,
566 NULL_PTR,
567 NULL_PTR,
568 NULL_PTR,
569 NULL_PTR,
570 NULL_PTR,
571 NULL_PTR,
572 NULL_PTR
573 },
574 {
575 NULL_PTR,
576 NULL_PTR,
577 NULL_PTR,
578 NULL_PTR,
579 NULL_PTR,
580 NULL_PTR,
581 NULL_PTR,
582 NULL_PTR,
583 NULL_PTR,
584 NULL_PTR,
585 NULL_PTR,
586 NULL_PTR,
587 NULL_PTR,
588 NULL_PTR,
589 NULL_PTR
590 },
591 {
592 NULL_PTR,
593 NULL_PTR,
594 NULL_PTR,
595 NULL_PTR,
596 NULL_PTR,
597 NULL_PTR,
598 NULL_PTR,
599 NULL_PTR,
600 NULL_PTR,
601 NULL_PTR,
602 NULL_PTR,
603 NULL_PTR,
604 NULL_PTR,
605 NULL_PTR,
606 NULL_PTR
607 },
608 {
609 NULL_PTR,
610 NULL_PTR,
611 NULL_PTR,
612 NULL_PTR,
613 NULL_PTR,
614 NULL_PTR,
615 NULL_PTR,
616 NULL_PTR,
617 NULL_PTR,
618 NULL_PTR,
619 NULL_PTR,
620 NULL_PTR,
621 NULL_PTR,
622 NULL_PTR,
623 NULL_PTR
624 },
625 {
626 NULL_PTR,
627 NULL_PTR,
628 NULL_PTR,
629 NULL_PTR,
630 NULL_PTR,
631 NULL_PTR,
632 NULL_PTR,
633 NULL_PTR,
634 NULL_PTR,
635 NULL_PTR,
636 NULL_PTR,
637 NULL_PTR,
638 NULL_PTR,
639 NULL_PTR,
640 NULL_PTR
641 },
642 {
643 NULL_PTR,
644 NULL_PTR,
645 NULL_PTR,
646 NULL_PTR,
647 NULL_PTR,
648 NULL_PTR,
649 NULL_PTR,
650 NULL_PTR,
651 NULL_PTR,
652 NULL_PTR,
653 NULL_PTR,
654 NULL_PTR,
655 NULL_PTR,
656 NULL_PTR,
657 NULL_PTR
658 },
659 {
660 NULL_PTR,
661 NULL_PTR,
662 NULL_PTR,
663 NULL_PTR,
664 NULL_PTR,
665 NULL_PTR,
666 NULL_PTR,
667 NULL_PTR,
668 NULL_PTR,
669 NULL_PTR,
670 NULL_PTR,
671 NULL_PTR,
672 NULL_PTR,
673 NULL_PTR,
674 NULL_PTR
675 },
676 {
677 NULL_PTR,
678 NULL_PTR,
679 NULL_PTR,
680 NULL_PTR,
681 NULL_PTR,
682 NULL_PTR,
683 NULL_PTR,
684 NULL_PTR,
685 NULL_PTR,
686 NULL_PTR,
687 NULL_PTR,
688 NULL_PTR,
689 NULL_PTR,
690 NULL_PTR,
691 NULL_PTR
692 },
693 {
694 NULL_PTR,
695 NULL_PTR,
696 NULL_PTR,
697 NULL_PTR,
698 NULL_PTR,
699 NULL_PTR,
700 NULL_PTR,
701 NULL_PTR,
702 NULL_PTR,
703 NULL_PTR,
704 NULL_PTR,
705 NULL_PTR,
706 NULL_PTR,
707 NULL_PTR,
708 NULL_PTR
709 },
710 {
711 &IfxPort_P32_0,
712 NULL_PTR,
713 &IfxPort_P32_2,
714 &IfxPort_P32_3,
715 &IfxPort_P32_4,
716 NULL_PTR,
717 NULL_PTR,
718 NULL_PTR,
719 NULL_PTR,
720 NULL_PTR,
721 NULL_PTR,
722 NULL_PTR,
723 NULL_PTR,
724 NULL_PTR,
725 NULL_PTR
726 },
727 {
728 &IfxPort_P33_0,
729 &IfxPort_P33_1,
730 &IfxPort_P33_2,
731 &IfxPort_P33_3,
732 &IfxPort_P33_4,
733 &IfxPort_P33_5,
734 &IfxPort_P33_6,
735 &IfxPort_P33_7,
736 &IfxPort_P33_8,
737 &IfxPort_P33_9,
738 &IfxPort_P33_10,
739 &IfxPort_P33_11,
740 &IfxPort_P33_12,
741 &IfxPort_P33_13,
742 NULL_PTR
743 },
744 {
745 NULL_PTR,
746 NULL_PTR,
747 NULL_PTR,
748 NULL_PTR,
749 NULL_PTR,
750 NULL_PTR,
751 NULL_PTR,
752 NULL_PTR,
753 NULL_PTR,
754 NULL_PTR,
755 NULL_PTR,
756 NULL_PTR,
757 NULL_PTR,
758 NULL_PTR,
759 NULL_PTR
760 },
761 {
762 NULL_PTR,
763 NULL_PTR,
764 NULL_PTR,
765 NULL_PTR,
766 NULL_PTR,
767 NULL_PTR,
768 NULL_PTR,
769 NULL_PTR,
770 NULL_PTR,
771 NULL_PTR,
772 NULL_PTR,
773 NULL_PTR,
774 NULL_PTR,
775 NULL_PTR,
776 NULL_PTR
777 },
778 {
779 NULL_PTR,
780 NULL_PTR,
781 NULL_PTR,
782 NULL_PTR,
783 NULL_PTR,
784 NULL_PTR,
785 NULL_PTR,
786 NULL_PTR,
787 NULL_PTR,
788 NULL_PTR,
789 NULL_PTR,
790 NULL_PTR,
791 NULL_PTR,
792 NULL_PTR,
793 NULL_PTR
794 },
795 {
796 NULL_PTR,
797 NULL_PTR,
798 NULL_PTR,
799 NULL_PTR,
800 NULL_PTR,
801 NULL_PTR,
802 NULL_PTR,
803 NULL_PTR,
804 NULL_PTR,
805 NULL_PTR,
806 NULL_PTR,
807 NULL_PTR,
808 NULL_PTR,
809 NULL_PTR,
810 NULL_PTR
811 },
812 {
813 NULL_PTR,
814 NULL_PTR,
815 NULL_PTR,
816 NULL_PTR,
817 NULL_PTR,
818 NULL_PTR,
819 NULL_PTR,
820 NULL_PTR,
821 NULL_PTR,
822 NULL_PTR,
823 NULL_PTR,
824 NULL_PTR,
825 NULL_PTR,
826 NULL_PTR,
827 NULL_PTR
828 },
829 {
830 NULL_PTR,
831 NULL_PTR,
832 NULL_PTR,
833 NULL_PTR,
834 NULL_PTR,
835 NULL_PTR,
836 NULL_PTR,
837 NULL_PTR,
838 NULL_PTR,
839 NULL_PTR,
840 NULL_PTR,
841 NULL_PTR,
842 NULL_PTR,
843 NULL_PTR,
844 NULL_PTR
845 },
846 {
847 &IfxPort_P40_0,
848 &IfxPort_P40_1,
849 &IfxPort_P40_2,
850 &IfxPort_P40_3,
851 NULL_PTR,
852 NULL_PTR,
853 &IfxPort_P40_6,
854 &IfxPort_P40_7,
855 &IfxPort_P40_8,
856 &IfxPort_P40_9,
857 NULL_PTR,
858 NULL_PTR,
859 NULL_PTR,
860 NULL_PTR,
861 NULL_PTR
862 }
863 };
IfxPort_P15_3
IfxPort_Pin IfxPort_P15_3
Definition: IfxPort_PinMap.c:101
IfxPort_P14_5
IfxPort_Pin IfxPort_P14_5
Definition: IfxPort_PinMap.c:93
IfxPort_P13_3
IfxPort_Pin IfxPort_P13_3
Definition: IfxPort_PinMap.c:86
IfxPort_P14_4
IfxPort_Pin IfxPort_P14_4
Definition: IfxPort_PinMap.c:92
IfxPort_P21_3
IfxPort_Pin IfxPort_P21_3
Definition: IfxPort_PinMap.c:122
IfxPort_P13_1
IfxPort_Pin IfxPort_P13_1
Definition: IfxPort_PinMap.c:84
IfxPort_P23_5
IfxPort_Pin IfxPort_P23_5
Definition: IfxPort_PinMap.c:136
IfxPort_P00_3
IfxPort_Pin IfxPort_P00_3
Definition: IfxPort_PinMap.c:51
IfxPort_P15_5
IfxPort_Pin IfxPort_P15_5
Definition: IfxPort_PinMap.c:103
IfxPort_P33_12
IfxPort_Pin IfxPort_P33_12
Definition: IfxPort_PinMap.c:145
IfxPort_P00_7
IfxPort_Pin IfxPort_P00_7
Definition: IfxPort_PinMap.c:55
IfxPort_P40_9
IfxPort_Pin IfxPort_P40_9
Definition: IfxPort_PinMap.c:162
IfxPort_P33_6
IfxPort_Pin IfxPort_P33_6
Definition: IfxPort_PinMap.c:151
IfxPort_P23_4
IfxPort_Pin IfxPort_P23_4
Definition: IfxPort_PinMap.c:135
IfxPort_P00_2
IfxPort_Pin IfxPort_P00_2
Definition: IfxPort_PinMap.c:50
IfxPort_P32_2
IfxPort_Pin IfxPort_P32_2
Definition: IfxPort_PinMap.c:138
IfxPort_P14_7
IfxPort_Pin IfxPort_P14_7
Definition: IfxPort_PinMap.c:95
IfxPort_P20_14
IfxPort_Pin IfxPort_P20_14
Definition: IfxPort_PinMap.c:113
IfxPort_P22_2
IfxPort_Pin IfxPort_P22_2
Definition: IfxPort_PinMap.c:129
IfxPort_P02_0
IfxPort_Pin IfxPort_P02_0
Definition: IfxPort_PinMap.c:58
IfxPort_P10_0
IfxPort_Pin IfxPort_P10_0
Definition: IfxPort_PinMap.c:67
IfxPort_P33_1
IfxPort_Pin IfxPort_P33_1
Definition: IfxPort_PinMap.c:142
IfxPort_P02_3
IfxPort_Pin IfxPort_P02_3
Definition: IfxPort_PinMap.c:61
IfxPort_P10_5
IfxPort_Pin IfxPort_P10_5
Definition: IfxPort_PinMap.c:72
IfxPort_P21_0
IfxPort_Pin IfxPort_P21_0
Definition: IfxPort_PinMap.c:119
IfxPort_P23_1
IfxPort_Pin IfxPort_P23_1
Definition: IfxPort_PinMap.c:132
IfxPort_P33_3
IfxPort_Pin IfxPort_P33_3
Definition: IfxPort_PinMap.c:148
IfxPort_P10_6
IfxPort_Pin IfxPort_P10_6
Definition: IfxPort_PinMap.c:73
IfxPort_P20_13
IfxPort_Pin IfxPort_P20_13
Definition: IfxPort_PinMap.c:112
IfxPort_P21_6
IfxPort_Pin IfxPort_P21_6
Definition: IfxPort_PinMap.c:125
IfxPort_P00_8
IfxPort_Pin IfxPort_P00_8
Definition: IfxPort_PinMap.c:56
IfxPort_P14_10
IfxPort_Pin IfxPort_P14_10
Definition: IfxPort_PinMap.c:89
IfxPort_P23_3
IfxPort_Pin IfxPort_P23_3
Definition: IfxPort_PinMap.c:134
IfxPort_P00_6
IfxPort_Pin IfxPort_P00_6
Definition: IfxPort_PinMap.c:54
IfxPort_P33_5
IfxPort_Pin IfxPort_P33_5
Definition: IfxPort_PinMap.c:150
IfxPort_P02_2
IfxPort_Pin IfxPort_P02_2
Definition: IfxPort_PinMap.c:60
IfxPort_P11_6
IfxPort_Pin IfxPort_P11_6
Definition: IfxPort_PinMap.c:81
IfxPort_P00_9
IfxPort_Pin IfxPort_P00_9
Definition: IfxPort_PinMap.c:57
IfxPort_P20_1
IfxPort_Pin IfxPort_P20_1
Definition: IfxPort_PinMap.c:108
IfxPort_P23_2
IfxPort_Pin IfxPort_P23_2
Definition: IfxPort_PinMap.c:133
IfxPort_P11_2
IfxPort_Pin IfxPort_P11_2
Definition: IfxPort_PinMap.c:79
IfxPort_P00_0
IfxPort_Pin IfxPort_P00_0
Definition: IfxPort_PinMap.c:45
IfxPort_P40_8
IfxPort_Pin IfxPort_P40_8
Definition: IfxPort_PinMap.c:161
IfxPort_P00_12
IfxPort_Pin IfxPort_P00_12
Definition: IfxPort_PinMap.c:49
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxPort_P14_3
IfxPort_Pin IfxPort_P14_3
Definition: IfxPort_PinMap.c:91
IfxPort_P23_0
IfxPort_Pin IfxPort_P23_0
Definition: IfxPort_PinMap.c:131
IfxPort_P21_5
IfxPort_Pin IfxPort_P21_5
Definition: IfxPort_PinMap.c:124
IfxPort_P32_3
IfxPort_Pin IfxPort_P32_3
Definition: IfxPort_PinMap.c:139
IfxPort_P20_12
IfxPort_Pin IfxPort_P20_12
Definition: IfxPort_PinMap.c:111
IfxPort_P14_2
IfxPort_Pin IfxPort_P14_2
Definition: IfxPort_PinMap.c:90
IfxPort_P33_10
IfxPort_Pin IfxPort_P33_10
Definition: IfxPort_PinMap.c:143
IfxPort_P33_9
IfxPort_Pin IfxPort_P33_9
Definition: IfxPort_PinMap.c:154
IfxPort_PinMap.h
PORT I/O map.
IfxPort_P02_7
IfxPort_Pin IfxPort_P02_7
Definition: IfxPort_PinMap.c:65
IfxPort_P11_9
IfxPort_Pin IfxPort_P11_9
Definition: IfxPort_PinMap.c:82
IfxPort_P40_0
IfxPort_Pin IfxPort_P40_0
Definition: IfxPort_PinMap.c:155
IfxPort_P11_3
IfxPort_Pin IfxPort_P11_3
Definition: IfxPort_PinMap.c:80
IfxPort_P00_10
IfxPort_Pin IfxPort_P00_10
Definition: IfxPort_PinMap.c:47
IfxPort_P15_1
IfxPort_Pin IfxPort_P15_1
Definition: IfxPort_PinMap.c:99
IfxPort_P10_3
IfxPort_Pin IfxPort_P10_3
Definition: IfxPort_PinMap.c:70
IfxPort_P33_13
IfxPort_Pin IfxPort_P33_13
Definition: IfxPort_PinMap.c:146
IfxPort_P40_2
IfxPort_Pin IfxPort_P40_2
Definition: IfxPort_PinMap.c:157
IfxPort_P14_9
IfxPort_Pin IfxPort_P14_9
Definition: IfxPort_PinMap.c:97
IfxPort_P10_2
IfxPort_Pin IfxPort_P10_2
Definition: IfxPort_PinMap.c:69
IfxPort_P00_5
IfxPort_Pin IfxPort_P00_5
Definition: IfxPort_PinMap.c:53
IfxPort_P02_5
IfxPort_Pin IfxPort_P02_5
Definition: IfxPort_PinMap.c:63
IfxPort_P21_4
IfxPort_Pin IfxPort_P21_4
Definition: IfxPort_PinMap.c:123
IFXPORT_PINMAP_PIN_NUM_ITEMS
#define IFXPORT_PINMAP_PIN_NUM_ITEMS
Definition: IfxPort_PinMap.h:175
IfxPort_P00_4
IfxPort_Pin IfxPort_P00_4
Definition: IfxPort_PinMap.c:52
IfxPort_P10_7
IfxPort_Pin IfxPort_P10_7
Definition: IfxPort_PinMap.c:74
IfxPort_P32_0
IfxPort_Pin IfxPort_P32_0
Definition: IfxPort_PinMap.c:137
IfxPort_P11_11
IfxPort_Pin IfxPort_P11_11
Definition: IfxPort_PinMap.c:77
IfxPort_P02_4
IfxPort_Pin IfxPort_P02_4
Definition: IfxPort_PinMap.c:62
IfxPort_P15_0
IfxPort_Pin IfxPort_P15_0
Definition: IfxPort_PinMap.c:98
IfxPort_P22_1
IfxPort_Pin IfxPort_P22_1
Definition: IfxPort_PinMap.c:128
IfxPort_P32_4
IfxPort_Pin IfxPort_P32_4
Definition: IfxPort_PinMap.c:140
IfxPort_P33_8
IfxPort_Pin IfxPort_P33_8
Definition: IfxPort_PinMap.c:153
IfxPort_P10_8
IfxPort_Pin IfxPort_P10_8
Definition: IfxPort_PinMap.c:75
IfxPort_P15_4
IfxPort_Pin IfxPort_P15_4
Definition: IfxPort_PinMap.c:102
IfxPort_P14_8
IfxPort_Pin IfxPort_P14_8
Definition: IfxPort_PinMap.c:96
IfxPort_P10_1
IfxPort_Pin IfxPort_P10_1
Definition: IfxPort_PinMap.c:68
IfxPort_P33_2
IfxPort_Pin IfxPort_P33_2
Definition: IfxPort_PinMap.c:147
IfxPort_P20_8
IfxPort_Pin IfxPort_P20_8
Definition: IfxPort_PinMap.c:117
IfxPort_P20_3
IfxPort_Pin IfxPort_P20_3
Definition: IfxPort_PinMap.c:114
IfxPort_Pin_pinTable
const IfxPort_Pin * IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]
Definition: IfxPort_PinMap.c:165
IfxPort_P14_1
IfxPort_Pin IfxPort_P14_1
Definition: IfxPort_PinMap.c:88
IfxPort_P15_6
IfxPort_Pin IfxPort_P15_6
Definition: IfxPort_PinMap.c:104
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxPort_P20_7
IfxPort_Pin IfxPort_P20_7
Definition: IfxPort_PinMap.c:116
IfxPort_P11_10
IfxPort_Pin IfxPort_P11_10
Definition: IfxPort_PinMap.c:76
IfxPort_P02_6
IfxPort_Pin IfxPort_P02_6
Definition: IfxPort_PinMap.c:64
IfxPort_P21_2
IfxPort_Pin IfxPort_P21_2
Definition: IfxPort_PinMap.c:121
IfxPort_P40_6
IfxPort_Pin IfxPort_P40_6
Definition: IfxPort_PinMap.c:159
IfxPort_P13_0
IfxPort_Pin IfxPort_P13_0
Definition: IfxPort_PinMap.c:83
IfxPort_P15_7
IfxPort_Pin IfxPort_P15_7
Definition: IfxPort_PinMap.c:105
IfxPort_P40_1
IfxPort_Pin IfxPort_P40_1
Definition: IfxPort_PinMap.c:156
IfxPort_P20_11
IfxPort_Pin IfxPort_P20_11
Definition: IfxPort_PinMap.c:110
IfxPort_P02_8
IfxPort_Pin IfxPort_P02_8
Definition: IfxPort_PinMap.c:66
IfxPort_P40_7
IfxPort_Pin IfxPort_P40_7
Definition: IfxPort_PinMap.c:160
IfxPort_P40_3
IfxPort_Pin IfxPort_P40_3
Definition: IfxPort_PinMap.c:158
IfxPort_P15_8
IfxPort_Pin IfxPort_P15_8
Definition: IfxPort_PinMap.c:106
IfxPort_P00_1
IfxPort_Pin IfxPort_P00_1
Definition: IfxPort_PinMap.c:46
IfxPort_P33_4
IfxPort_Pin IfxPort_P33_4
Definition: IfxPort_PinMap.c:149
IfxPort_P02_1
IfxPort_Pin IfxPort_P02_1
Definition: IfxPort_PinMap.c:59
IfxPort_P14_0
IfxPort_Pin IfxPort_P14_0
Definition: IfxPort_PinMap.c:87
IfxPort_P33_11
IfxPort_Pin IfxPort_P33_11
Definition: IfxPort_PinMap.c:144
IfxPort_P22_3
IfxPort_Pin IfxPort_P22_3
Definition: IfxPort_PinMap.c:130
IfxPort_P21_1
IfxPort_Pin IfxPort_P21_1
Definition: IfxPort_PinMap.c:120
IfxPort_P20_6
IfxPort_Pin IfxPort_P20_6
Definition: IfxPort_PinMap.c:115
IfxPort_P21_7
IfxPort_Pin IfxPort_P21_7
Definition: IfxPort_PinMap.c:126
IfxPort_P20_0
IfxPort_Pin IfxPort_P20_0
Definition: IfxPort_PinMap.c:107
IfxPort_P13_2
IfxPort_Pin IfxPort_P13_2
Definition: IfxPort_PinMap.c:85
IfxPort_P20_10
IfxPort_Pin IfxPort_P20_10
Definition: IfxPort_PinMap.c:109
IfxPort_P33_0
IfxPort_Pin IfxPort_P33_0
Definition: IfxPort_PinMap.c:141
IfxPort_P22_0
IfxPort_Pin IfxPort_P22_0
Definition: IfxPort_PinMap.c:127
IfxPort_P11_12
IfxPort_Pin IfxPort_P11_12
Definition: IfxPort_PinMap.c:78
IfxPort_P15_2
IfxPort_Pin IfxPort_P15_2
Definition: IfxPort_PinMap.c:100
IFXPORT_PINMAP_NUM_MODULES
#define IFXPORT_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPort_PinMap.h:174
IfxPort_P10_4
IfxPort_Pin IfxPort_P10_4
Definition: IfxPort_PinMap.c:71
IfxPort_P20_9
IfxPort_Pin IfxPort_P20_9
Definition: IfxPort_PinMap.c:118
IfxPort_P00_11
IfxPort_Pin IfxPort_P00_11
Definition: IfxPort_PinMap.c:48
IfxPort_P33_7
IfxPort_Pin IfxPort_P33_7
Definition: IfxPort_PinMap.c:152
IfxPort_P14_6
IfxPort_Pin IfxPort_P14_6
Definition: IfxPort_PinMap.c:94


iLLD_TC26B: IfxPort_PinMap.h Source File

  • _PinMap
IfxPort_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxPort_PinMap.h
3 * \brief PORT I/O map
4 * \ingroup IfxLld_Port
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Port_pinmap PORT Pin Mapping
42 * \ingroup IfxLld_Port
43 */
44
45 #ifndef IFXPORT_PINMAP_H
46 #define IFXPORT_PINMAP_H
47
48 #include <Port/Std/IfxPort.h>
49
50 /** \addtogroup IfxLld_Port_pinmap
51 * \{ */
52
53
54 IFX_EXTERN IfxPort_Pin IfxPort_P00_0; /**< \brief IfxPort_P00_0 */
55 IFX_EXTERN IfxPort_Pin IfxPort_P00_1; /**< \brief IfxPort_P00_1 */
56 IFX_EXTERN IfxPort_Pin IfxPort_P00_10; /**< \brief IfxPort_P00_10 */
57 IFX_EXTERN IfxPort_Pin IfxPort_P00_11; /**< \brief IfxPort_P00_11 */
58 IFX_EXTERN IfxPort_Pin IfxPort_P00_12; /**< \brief IfxPort_P00_12 */
59 IFX_EXTERN IfxPort_Pin IfxPort_P00_2; /**< \brief IfxPort_P00_2 */
60 IFX_EXTERN IfxPort_Pin IfxPort_P00_3; /**< \brief IfxPort_P00_3 */
61 IFX_EXTERN IfxPort_Pin IfxPort_P00_4; /**< \brief IfxPort_P00_4 */
62 IFX_EXTERN IfxPort_Pin IfxPort_P00_5; /**< \brief IfxPort_P00_5 */
63 IFX_EXTERN IfxPort_Pin IfxPort_P00_6; /**< \brief IfxPort_P00_6 */
64 IFX_EXTERN IfxPort_Pin IfxPort_P00_7; /**< \brief IfxPort_P00_7 */
65 IFX_EXTERN IfxPort_Pin IfxPort_P00_8; /**< \brief IfxPort_P00_8 */
66 IFX_EXTERN IfxPort_Pin IfxPort_P00_9; /**< \brief IfxPort_P00_9 */
67 IFX_EXTERN IfxPort_Pin IfxPort_P02_0; /**< \brief IfxPort_P02_0 */
68 IFX_EXTERN IfxPort_Pin IfxPort_P02_1; /**< \brief IfxPort_P02_1 */
69 IFX_EXTERN IfxPort_Pin IfxPort_P02_2; /**< \brief IfxPort_P02_2 */
70 IFX_EXTERN IfxPort_Pin IfxPort_P02_3; /**< \brief IfxPort_P02_3 */
71 IFX_EXTERN IfxPort_Pin IfxPort_P02_4; /**< \brief IfxPort_P02_4 */
72 IFX_EXTERN IfxPort_Pin IfxPort_P02_5; /**< \brief IfxPort_P02_5 */
73 IFX_EXTERN IfxPort_Pin IfxPort_P02_6; /**< \brief IfxPort_P02_6 */
74 IFX_EXTERN IfxPort_Pin IfxPort_P02_7; /**< \brief IfxPort_P02_7 */
75 IFX_EXTERN IfxPort_Pin IfxPort_P02_8; /**< \brief IfxPort_P02_8 */
76 IFX_EXTERN IfxPort_Pin IfxPort_P10_0; /**< \brief IfxPort_P10_0 */
77 IFX_EXTERN IfxPort_Pin IfxPort_P10_1; /**< \brief IfxPort_P10_1 */
78 IFX_EXTERN IfxPort_Pin IfxPort_P10_2; /**< \brief IfxPort_P10_2 */
79 IFX_EXTERN IfxPort_Pin IfxPort_P10_3; /**< \brief IfxPort_P10_3 */
80 IFX_EXTERN IfxPort_Pin IfxPort_P10_4; /**< \brief IfxPort_P10_4 */
81 IFX_EXTERN IfxPort_Pin IfxPort_P10_5; /**< \brief IfxPort_P10_5 */
82 IFX_EXTERN IfxPort_Pin IfxPort_P10_6; /**< \brief IfxPort_P10_6 */
83 IFX_EXTERN IfxPort_Pin IfxPort_P10_7; /**< \brief IfxPort_P10_7 */
84 IFX_EXTERN IfxPort_Pin IfxPort_P10_8; /**< \brief IfxPort_P10_8 */
85 IFX_EXTERN IfxPort_Pin IfxPort_P11_10; /**< \brief IfxPort_P11_10 */
86 IFX_EXTERN IfxPort_Pin IfxPort_P11_11; /**< \brief IfxPort_P11_11 */
87 IFX_EXTERN IfxPort_Pin IfxPort_P11_12; /**< \brief IfxPort_P11_12 */
88 IFX_EXTERN IfxPort_Pin IfxPort_P11_2; /**< \brief IfxPort_P11_2 */
89 IFX_EXTERN IfxPort_Pin IfxPort_P11_3; /**< \brief IfxPort_P11_3 */
90 IFX_EXTERN IfxPort_Pin IfxPort_P11_6; /**< \brief IfxPort_P11_6 */
91 IFX_EXTERN IfxPort_Pin IfxPort_P11_9; /**< \brief IfxPort_P11_9 */
92 IFX_EXTERN IfxPort_Pin IfxPort_P13_0; /**< \brief IfxPort_P13_0 */
93 IFX_EXTERN IfxPort_Pin IfxPort_P13_1; /**< \brief IfxPort_P13_1 */
94 IFX_EXTERN IfxPort_Pin IfxPort_P13_2; /**< \brief IfxPort_P13_2 */
95 IFX_EXTERN IfxPort_Pin IfxPort_P13_3; /**< \brief IfxPort_P13_3 */
96 IFX_EXTERN IfxPort_Pin IfxPort_P14_0; /**< \brief IfxPort_P14_0 */
97 IFX_EXTERN IfxPort_Pin IfxPort_P14_1; /**< \brief IfxPort_P14_1 */
98 IFX_EXTERN IfxPort_Pin IfxPort_P14_10; /**< \brief IfxPort_P14_10 */
99 IFX_EXTERN IfxPort_Pin IfxPort_P14_2; /**< \brief IfxPort_P14_2 */
100 IFX_EXTERN IfxPort_Pin IfxPort_P14_3; /**< \brief IfxPort_P14_3 */
101 IFX_EXTERN IfxPort_Pin IfxPort_P14_4; /**< \brief IfxPort_P14_4 */
102 IFX_EXTERN IfxPort_Pin IfxPort_P14_5; /**< \brief IfxPort_P14_5 */
103 IFX_EXTERN IfxPort_Pin IfxPort_P14_6; /**< \brief IfxPort_P14_6 */
104 IFX_EXTERN IfxPort_Pin IfxPort_P14_7; /**< \brief IfxPort_P14_7 */
105 IFX_EXTERN IfxPort_Pin IfxPort_P14_8; /**< \brief IfxPort_P14_8 */
106 IFX_EXTERN IfxPort_Pin IfxPort_P14_9; /**< \brief IfxPort_P14_9 */
107 IFX_EXTERN IfxPort_Pin IfxPort_P15_0; /**< \brief IfxPort_P15_0 */
108 IFX_EXTERN IfxPort_Pin IfxPort_P15_1; /**< \brief IfxPort_P15_1 */
109 IFX_EXTERN IfxPort_Pin IfxPort_P15_2; /**< \brief IfxPort_P15_2 */
110 IFX_EXTERN IfxPort_Pin IfxPort_P15_3; /**< \brief IfxPort_P15_3 */
111 IFX_EXTERN IfxPort_Pin IfxPort_P15_4; /**< \brief IfxPort_P15_4 */
112 IFX_EXTERN IfxPort_Pin IfxPort_P15_5; /**< \brief IfxPort_P15_5 */
113 IFX_EXTERN IfxPort_Pin IfxPort_P15_6; /**< \brief IfxPort_P15_6 */
114 IFX_EXTERN IfxPort_Pin IfxPort_P15_7; /**< \brief IfxPort_P15_7 */
115 IFX_EXTERN IfxPort_Pin IfxPort_P15_8; /**< \brief IfxPort_P15_8 */
116 IFX_EXTERN IfxPort_Pin IfxPort_P20_0; /**< \brief IfxPort_P20_0 */
117 IFX_EXTERN IfxPort_Pin IfxPort_P20_1; /**< \brief IfxPort_P20_1 */
118 IFX_EXTERN IfxPort_Pin IfxPort_P20_10; /**< \brief IfxPort_P20_10 */
119 IFX_EXTERN IfxPort_Pin IfxPort_P20_11; /**< \brief IfxPort_P20_11 */
120 IFX_EXTERN IfxPort_Pin IfxPort_P20_12; /**< \brief IfxPort_P20_12 */
121 IFX_EXTERN IfxPort_Pin IfxPort_P20_13; /**< \brief IfxPort_P20_13 */
122 IFX_EXTERN IfxPort_Pin IfxPort_P20_14; /**< \brief IfxPort_P20_14 */
123 IFX_EXTERN IfxPort_Pin IfxPort_P20_3; /**< \brief IfxPort_P20_3 */
124 IFX_EXTERN IfxPort_Pin IfxPort_P20_6; /**< \brief IfxPort_P20_6 */
125 IFX_EXTERN IfxPort_Pin IfxPort_P20_7; /**< \brief IfxPort_P20_7 */
126 IFX_EXTERN IfxPort_Pin IfxPort_P20_8; /**< \brief IfxPort_P20_8 */
127 IFX_EXTERN IfxPort_Pin IfxPort_P20_9; /**< \brief IfxPort_P20_9 */
128 IFX_EXTERN IfxPort_Pin IfxPort_P21_0; /**< \brief IfxPort_P21_0 */
129 IFX_EXTERN IfxPort_Pin IfxPort_P21_1; /**< \brief IfxPort_P21_1 */
130 IFX_EXTERN IfxPort_Pin IfxPort_P21_2; /**< \brief IfxPort_P21_2 */
131 IFX_EXTERN IfxPort_Pin IfxPort_P21_3; /**< \brief IfxPort_P21_3 */
132 IFX_EXTERN IfxPort_Pin IfxPort_P21_4; /**< \brief IfxPort_P21_4 */
133 IFX_EXTERN IfxPort_Pin IfxPort_P21_5; /**< \brief IfxPort_P21_5 */
134 IFX_EXTERN IfxPort_Pin IfxPort_P21_6; /**< \brief IfxPort_P21_6 */
135 IFX_EXTERN IfxPort_Pin IfxPort_P21_7; /**< \brief IfxPort_P21_7 */
136 IFX_EXTERN IfxPort_Pin IfxPort_P22_0; /**< \brief IfxPort_P22_0 */
137 IFX_EXTERN IfxPort_Pin IfxPort_P22_1; /**< \brief IfxPort_P22_1 */
138 IFX_EXTERN IfxPort_Pin IfxPort_P22_2; /**< \brief IfxPort_P22_2 */
139 IFX_EXTERN IfxPort_Pin IfxPort_P22_3; /**< \brief IfxPort_P22_3 */
140 IFX_EXTERN IfxPort_Pin IfxPort_P23_0; /**< \brief IfxPort_P23_0 */
141 IFX_EXTERN IfxPort_Pin IfxPort_P23_1; /**< \brief IfxPort_P23_1 */
142 IFX_EXTERN IfxPort_Pin IfxPort_P23_2; /**< \brief IfxPort_P23_2 */
143 IFX_EXTERN IfxPort_Pin IfxPort_P23_3; /**< \brief IfxPort_P23_3 */
144 IFX_EXTERN IfxPort_Pin IfxPort_P23_4; /**< \brief IfxPort_P23_4 */
145 IFX_EXTERN IfxPort_Pin IfxPort_P23_5; /**< \brief IfxPort_P23_5 */
146 IFX_EXTERN IfxPort_Pin IfxPort_P32_0; /**< \brief IfxPort_P32_0 */
147 IFX_EXTERN IfxPort_Pin IfxPort_P32_2; /**< \brief IfxPort_P32_2 */
148 IFX_EXTERN IfxPort_Pin IfxPort_P32_3; /**< \brief IfxPort_P32_3 */
149 IFX_EXTERN IfxPort_Pin IfxPort_P32_4; /**< \brief IfxPort_P32_4 */
150 IFX_EXTERN IfxPort_Pin IfxPort_P33_0; /**< \brief IfxPort_P33_0 */
151 IFX_EXTERN IfxPort_Pin IfxPort_P33_1; /**< \brief IfxPort_P33_1 */
152 IFX_EXTERN IfxPort_Pin IfxPort_P33_10; /**< \brief IfxPort_P33_10 */
153 IFX_EXTERN IfxPort_Pin IfxPort_P33_11; /**< \brief IfxPort_P33_11 */
154 IFX_EXTERN IfxPort_Pin IfxPort_P33_12; /**< \brief IfxPort_P33_12 */
155 IFX_EXTERN IfxPort_Pin IfxPort_P33_13; /**< \brief IfxPort_P33_13 */
156 IFX_EXTERN IfxPort_Pin IfxPort_P33_2; /**< \brief IfxPort_P33_2 */
157 IFX_EXTERN IfxPort_Pin IfxPort_P33_3; /**< \brief IfxPort_P33_3 */
158 IFX_EXTERN IfxPort_Pin IfxPort_P33_4; /**< \brief IfxPort_P33_4 */
159 IFX_EXTERN IfxPort_Pin IfxPort_P33_5; /**< \brief IfxPort_P33_5 */
160 IFX_EXTERN IfxPort_Pin IfxPort_P33_6; /**< \brief IfxPort_P33_6 */
161 IFX_EXTERN IfxPort_Pin IfxPort_P33_7; /**< \brief IfxPort_P33_7 */
162 IFX_EXTERN IfxPort_Pin IfxPort_P33_8; /**< \brief IfxPort_P33_8 */
163 IFX_EXTERN IfxPort_Pin IfxPort_P33_9; /**< \brief IfxPort_P33_9 */
164 IFX_EXTERN IfxPort_Pin IfxPort_P40_0; /**< \brief IfxPort_P40_0 */
165 IFX_EXTERN IfxPort_Pin IfxPort_P40_1; /**< \brief IfxPort_P40_1 */
166 IFX_EXTERN IfxPort_Pin IfxPort_P40_2; /**< \brief IfxPort_P40_2 */
167 IFX_EXTERN IfxPort_Pin IfxPort_P40_3; /**< \brief IfxPort_P40_3 */
168 IFX_EXTERN IfxPort_Pin IfxPort_P40_6; /**< \brief IfxPort_P40_6 */
169 IFX_EXTERN IfxPort_Pin IfxPort_P40_7; /**< \brief IfxPort_P40_7 */
170 IFX_EXTERN IfxPort_Pin IfxPort_P40_8; /**< \brief IfxPort_P40_8 */
171 IFX_EXTERN IfxPort_Pin IfxPort_P40_9; /**< \brief IfxPort_P40_9 */
172
173 /** \brief Table dimensions */
174 #define IFXPORT_PINMAP_NUM_MODULES 41
175 #define IFXPORT_PINMAP_PIN_NUM_ITEMS 15
176
177
178 /** \brief IfxPort_Pin table */
179 IFX_EXTERN const IfxPort_Pin *IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS];
180
181 /** \} */
182
183 #endif /* IFXPORT_PINMAP_H */
IfxPort_P33_6
IFX_EXTERN IfxPort_Pin IfxPort_P33_6
IfxPort_P33_6.
Definition: IfxPort_PinMap.h:160
IfxPort_P00_8
IFX_EXTERN IfxPort_Pin IfxPort_P00_8
IfxPort_P00_8.
Definition: IfxPort_PinMap.h:65
IfxPort_P14_1
IFX_EXTERN IfxPort_Pin IfxPort_P14_1
IfxPort_P14_1.
Definition: IfxPort_PinMap.h:97
IfxPort_P10_1
IFX_EXTERN IfxPort_Pin IfxPort_P10_1
IfxPort_P10_1.
Definition: IfxPort_PinMap.h:77
IfxPort_P14_0
IFX_EXTERN IfxPort_Pin IfxPort_P14_0
IfxPort_P14_0.
Definition: IfxPort_PinMap.h:96
IfxPort_P14_4
IFX_EXTERN IfxPort_Pin IfxPort_P14_4
IfxPort_P14_4.
Definition: IfxPort_PinMap.h:101
IfxPort_P10_4
IFX_EXTERN IfxPort_Pin IfxPort_P10_4
IfxPort_P10_4.
Definition: IfxPort_PinMap.h:80
IfxPort_P22_1
IFX_EXTERN IfxPort_Pin IfxPort_P22_1
IfxPort_P22_1.
Definition: IfxPort_PinMap.h:137
IfxPort_P00_5
IFX_EXTERN IfxPort_Pin IfxPort_P00_5
IfxPort_P00_5.
Definition: IfxPort_PinMap.h:62
IfxPort_P10_6
IFX_EXTERN IfxPort_Pin IfxPort_P10_6
IfxPort_P10_6.
Definition: IfxPort_PinMap.h:82
IfxPort_P02_4
IFX_EXTERN IfxPort_Pin IfxPort_P02_4
IfxPort_P02_4.
Definition: IfxPort_PinMap.h:71
IfxPort_P40_6
IFX_EXTERN IfxPort_Pin IfxPort_P40_6
IfxPort_P40_6.
Definition: IfxPort_PinMap.h:168
IfxPort_P33_5
IFX_EXTERN IfxPort_Pin IfxPort_P33_5
IfxPort_P33_5.
Definition: IfxPort_PinMap.h:159
IfxPort_P15_2
IFX_EXTERN IfxPort_Pin IfxPort_P15_2
IfxPort_P15_2.
Definition: IfxPort_PinMap.h:109
IfxPort_P20_12
IFX_EXTERN IfxPort_Pin IfxPort_P20_12
IfxPort_P20_12.
Definition: IfxPort_PinMap.h:120
IfxPort_P33_11
IFX_EXTERN IfxPort_Pin IfxPort_P33_11
IfxPort_P33_11.
Definition: IfxPort_PinMap.h:153
IfxPort_P11_3
IFX_EXTERN IfxPort_Pin IfxPort_P11_3
IfxPort_P11_3.
Definition: IfxPort_PinMap.h:89
IfxPort_P14_2
IFX_EXTERN IfxPort_Pin IfxPort_P14_2
IfxPort_P14_2.
Definition: IfxPort_PinMap.h:99
IfxPort_P14_3
IFX_EXTERN IfxPort_Pin IfxPort_P14_3
IfxPort_P14_3.
Definition: IfxPort_PinMap.h:100
IfxPort_P13_0
IFX_EXTERN IfxPort_Pin IfxPort_P13_0
IfxPort_P13_0.
Definition: IfxPort_PinMap.h:92
IfxPort_P02_3
IFX_EXTERN IfxPort_Pin IfxPort_P02_3
IfxPort_P02_3.
Definition: IfxPort_PinMap.h:70
IfxPort_P20_13
IFX_EXTERN IfxPort_Pin IfxPort_P20_13
IfxPort_P20_13.
Definition: IfxPort_PinMap.h:121
IfxPort_P11_9
IFX_EXTERN IfxPort_Pin IfxPort_P11_9
IfxPort_P11_9.
Definition: IfxPort_PinMap.h:91
IfxPort_P21_2
IFX_EXTERN IfxPort_Pin IfxPort_P21_2
IfxPort_P21_2.
Definition: IfxPort_PinMap.h:130
IfxPort_P11_11
IFX_EXTERN IfxPort_Pin IfxPort_P11_11
IfxPort_P11_11.
Definition: IfxPort_PinMap.h:86
IfxPort_P02_6
IFX_EXTERN IfxPort_Pin IfxPort_P02_6
IfxPort_P02_6.
Definition: IfxPort_PinMap.h:73
IfxPort_P00_2
IFX_EXTERN IfxPort_Pin IfxPort_P00_2
IfxPort_P00_2.
Definition: IfxPort_PinMap.h:59
IfxPort_P33_13
IFX_EXTERN IfxPort_Pin IfxPort_P33_13
IfxPort_P33_13.
Definition: IfxPort_PinMap.h:155
IfxPort_P21_3
IFX_EXTERN IfxPort_Pin IfxPort_P21_3
IfxPort_P21_3.
Definition: IfxPort_PinMap.h:131
IfxPort_P00_7
IFX_EXTERN IfxPort_Pin IfxPort_P00_7
IfxPort_P00_7.
Definition: IfxPort_PinMap.h:64
IfxPort_P20_3
IFX_EXTERN IfxPort_Pin IfxPort_P20_3
IfxPort_P20_3.
Definition: IfxPort_PinMap.h:123
IfxPort_Pin_pinTable
IFX_EXTERN const IfxPort_Pin * IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]
IfxPort_Pin table.
Definition: IfxPort_PinMap.h:179
IfxPort_P02_7
IFX_EXTERN IfxPort_Pin IfxPort_P02_7
IfxPort_P02_7.
Definition: IfxPort_PinMap.h:74
IfxPort_P32_3
IFX_EXTERN IfxPort_Pin IfxPort_P32_3
IfxPort_P32_3.
Definition: IfxPort_PinMap.h:148
IfxPort_P11_10
IFX_EXTERN IfxPort_Pin IfxPort_P11_10
IfxPort_P11_10.
Definition: IfxPort_PinMap.h:85
IfxPort_P33_3
IFX_EXTERN IfxPort_Pin IfxPort_P33_3
IfxPort_P33_3.
Definition: IfxPort_PinMap.h:157
IfxPort_P20_6
IFX_EXTERN IfxPort_Pin IfxPort_P20_6
IfxPort_P20_6.
Definition: IfxPort_PinMap.h:124
IfxPort_P23_1
IFX_EXTERN IfxPort_Pin IfxPort_P23_1
IfxPort_P23_1.
Definition: IfxPort_PinMap.h:141
IfxPort_P22_0
IFX_EXTERN IfxPort_Pin IfxPort_P22_0
IfxPort_P22_0.
Definition: IfxPort_PinMap.h:136
IfxPort_P23_4
IFX_EXTERN IfxPort_Pin IfxPort_P23_4
IfxPort_P23_4.
Definition: IfxPort_PinMap.h:144
IfxPort_P22_3
IFX_EXTERN IfxPort_Pin IfxPort_P22_3
IfxPort_P22_3.
Definition: IfxPort_PinMap.h:139
IfxPort_P11_12
IFX_EXTERN IfxPort_Pin IfxPort_P11_12
IfxPort_P11_12.
Definition: IfxPort_PinMap.h:87
IfxPort_P33_1
IFX_EXTERN IfxPort_Pin IfxPort_P33_1
IfxPort_P33_1.
Definition: IfxPort_PinMap.h:151
IfxPort_P33_2
IFX_EXTERN IfxPort_Pin IfxPort_P33_2
IfxPort_P33_2.
Definition: IfxPort_PinMap.h:156
IfxPort_P15_5
IFX_EXTERN IfxPort_Pin IfxPort_P15_5
IfxPort_P15_5.
Definition: IfxPort_PinMap.h:112
IfxPort_P15_8
IFX_EXTERN IfxPort_Pin IfxPort_P15_8
IfxPort_P15_8.
Definition: IfxPort_PinMap.h:115
IfxPort_P33_7
IFX_EXTERN IfxPort_Pin IfxPort_P33_7
IfxPort_P33_7.
Definition: IfxPort_PinMap.h:161
IfxPort_P20_8
IFX_EXTERN IfxPort_Pin IfxPort_P20_8
IfxPort_P20_8.
Definition: IfxPort_PinMap.h:126
IfxPort_P23_0
IFX_EXTERN IfxPort_Pin IfxPort_P23_0
IfxPort_P23_0.
Definition: IfxPort_PinMap.h:140
IfxPort_P20_7
IFX_EXTERN IfxPort_Pin IfxPort_P20_7
IfxPort_P20_7.
Definition: IfxPort_PinMap.h:125
IfxPort_P22_2
IFX_EXTERN IfxPort_Pin IfxPort_P22_2
IfxPort_P22_2.
Definition: IfxPort_PinMap.h:138
IfxPort_P33_8
IFX_EXTERN IfxPort_Pin IfxPort_P33_8
IfxPort_P33_8.
Definition: IfxPort_PinMap.h:162
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPort_P33_12
IFX_EXTERN IfxPort_Pin IfxPort_P33_12
IfxPort_P33_12.
Definition: IfxPort_PinMap.h:154
IfxPort_P02_5
IFX_EXTERN IfxPort_Pin IfxPort_P02_5
IfxPort_P02_5.
Definition: IfxPort_PinMap.h:72
IfxPort_P00_0
IFX_EXTERN IfxPort_Pin IfxPort_P00_0
IfxPort_P00_0.
Definition: IfxPort_PinMap.h:54
IfxPort_P14_8
IFX_EXTERN IfxPort_Pin IfxPort_P14_8
IfxPort_P14_8.
Definition: IfxPort_PinMap.h:105
IfxPort_P11_2
IFX_EXTERN IfxPort_Pin IfxPort_P11_2
IfxPort_P11_2.
Definition: IfxPort_PinMap.h:88
IfxPort_P32_4
IFX_EXTERN IfxPort_Pin IfxPort_P32_4
IfxPort_P32_4.
Definition: IfxPort_PinMap.h:149
IfxPort_P11_6
IFX_EXTERN IfxPort_Pin IfxPort_P11_6
IfxPort_P11_6.
Definition: IfxPort_PinMap.h:90
IfxPort_P02_8
IFX_EXTERN IfxPort_Pin IfxPort_P02_8
IfxPort_P02_8.
Definition: IfxPort_PinMap.h:75
IfxPort_P00_11
IFX_EXTERN IfxPort_Pin IfxPort_P00_11
IfxPort_P00_11.
Definition: IfxPort_PinMap.h:57
IfxPort_P13_3
IFX_EXTERN IfxPort_Pin IfxPort_P13_3
IfxPort_P13_3.
Definition: IfxPort_PinMap.h:95
IfxPort_P23_5
IFX_EXTERN IfxPort_Pin IfxPort_P23_5
IfxPort_P23_5.
Definition: IfxPort_PinMap.h:145
IfxPort_P10_3
IFX_EXTERN IfxPort_Pin IfxPort_P10_3
IfxPort_P10_3.
Definition: IfxPort_PinMap.h:79
IFXPORT_PINMAP_PIN_NUM_ITEMS
#define IFXPORT_PINMAP_PIN_NUM_ITEMS
Definition: IfxPort_PinMap.h:175
IfxPort_P40_0
IFX_EXTERN IfxPort_Pin IfxPort_P40_0
IfxPort_P40_0.
Definition: IfxPort_PinMap.h:164
IfxPort_P00_10
IFX_EXTERN IfxPort_Pin IfxPort_P00_10
IfxPort_P00_10.
Definition: IfxPort_PinMap.h:56
IfxPort_P10_5
IFX_EXTERN IfxPort_Pin IfxPort_P10_5
IfxPort_P10_5.
Definition: IfxPort_PinMap.h:81
IfxPort_P10_7
IFX_EXTERN IfxPort_Pin IfxPort_P10_7
IfxPort_P10_7.
Definition: IfxPort_PinMap.h:83
IfxPort_P21_5
IFX_EXTERN IfxPort_Pin IfxPort_P21_5
IfxPort_P21_5.
Definition: IfxPort_PinMap.h:133
IfxPort_P15_1
IFX_EXTERN IfxPort_Pin IfxPort_P15_1
IfxPort_P15_1.
Definition: IfxPort_PinMap.h:108
IfxPort_P20_11
IFX_EXTERN IfxPort_Pin IfxPort_P20_11
IfxPort_P20_11.
Definition: IfxPort_PinMap.h:119
IfxPort_P33_10
IFX_EXTERN IfxPort_Pin IfxPort_P33_10
IfxPort_P33_10.
Definition: IfxPort_PinMap.h:152
IfxPort_P40_8
IFX_EXTERN IfxPort_Pin IfxPort_P40_8
IfxPort_P40_8.
Definition: IfxPort_PinMap.h:170
IfxPort_P21_6
IFX_EXTERN IfxPort_Pin IfxPort_P21_6
IfxPort_P21_6.
Definition: IfxPort_PinMap.h:134
IfxPort_P02_0
IFX_EXTERN IfxPort_Pin IfxPort_P02_0
IfxPort_P02_0.
Definition: IfxPort_PinMap.h:67
IfxPort_P14_7
IFX_EXTERN IfxPort_Pin IfxPort_P14_7
IfxPort_P14_7.
Definition: IfxPort_PinMap.h:104
IfxPort_P00_1
IFX_EXTERN IfxPort_Pin IfxPort_P00_1
IfxPort_P00_1.
Definition: IfxPort_PinMap.h:55
IfxPort_P20_10
IFX_EXTERN IfxPort_Pin IfxPort_P20_10
IfxPort_P20_10.
Definition: IfxPort_PinMap.h:118
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxPort_P23_3
IFX_EXTERN IfxPort_Pin IfxPort_P23_3
IfxPort_P23_3.
Definition: IfxPort_PinMap.h:143
IfxPort_P02_2
IFX_EXTERN IfxPort_Pin IfxPort_P02_2
IfxPort_P02_2.
Definition: IfxPort_PinMap.h:69
IfxPort_P20_14
IFX_EXTERN IfxPort_Pin IfxPort_P20_14
IfxPort_P20_14.
Definition: IfxPort_PinMap.h:122
IfxPort_P33_0
IFX_EXTERN IfxPort_Pin IfxPort_P33_0
IfxPort_P33_0.
Definition: IfxPort_PinMap.h:150
IfxPort_P02_1
IFX_EXTERN IfxPort_Pin IfxPort_P02_1
IfxPort_P02_1.
Definition: IfxPort_PinMap.h:68
IfxPort_P20_9
IFX_EXTERN IfxPort_Pin IfxPort_P20_9
IfxPort_P20_9.
Definition: IfxPort_PinMap.h:127
IfxPort_P13_1
IFX_EXTERN IfxPort_Pin IfxPort_P13_1
IfxPort_P13_1.
Definition: IfxPort_PinMap.h:93
IfxPort_P10_8
IFX_EXTERN IfxPort_Pin IfxPort_P10_8
IfxPort_P10_8.
Definition: IfxPort_PinMap.h:84
IfxPort_P33_9
IFX_EXTERN IfxPort_Pin IfxPort_P33_9
IfxPort_P33_9.
Definition: IfxPort_PinMap.h:163
IfxPort_P40_7
IFX_EXTERN IfxPort_Pin IfxPort_P40_7
IfxPort_P40_7.
Definition: IfxPort_PinMap.h:169
IfxPort_P14_6
IFX_EXTERN IfxPort_Pin IfxPort_P14_6
IfxPort_P14_6.
Definition: IfxPort_PinMap.h:103
IfxPort_P14_5
IFX_EXTERN IfxPort_Pin IfxPort_P14_5
IfxPort_P14_5.
Definition: IfxPort_PinMap.h:102
IfxPort_P15_0
IFX_EXTERN IfxPort_Pin IfxPort_P15_0
IfxPort_P15_0.
Definition: IfxPort_PinMap.h:107
IfxPort_P15_4
IFX_EXTERN IfxPort_Pin IfxPort_P15_4
IfxPort_P15_4.
Definition: IfxPort_PinMap.h:111
IfxPort_P40_2
IFX_EXTERN IfxPort_Pin IfxPort_P40_2
IfxPort_P40_2.
Definition: IfxPort_PinMap.h:166
IfxPort_P33_4
IFX_EXTERN IfxPort_Pin IfxPort_P33_4
IfxPort_P33_4.
Definition: IfxPort_PinMap.h:158
IfxPort_P13_2
IFX_EXTERN IfxPort_Pin IfxPort_P13_2
IfxPort_P13_2.
Definition: IfxPort_PinMap.h:94
IfxPort_P40_3
IFX_EXTERN IfxPort_Pin IfxPort_P40_3
IfxPort_P40_3.
Definition: IfxPort_PinMap.h:167
IfxPort_P00_9
IFX_EXTERN IfxPort_Pin IfxPort_P00_9
IfxPort_P00_9.
Definition: IfxPort_PinMap.h:66
IfxPort_P00_3
IFX_EXTERN IfxPort_Pin IfxPort_P00_3
IfxPort_P00_3.
Definition: IfxPort_PinMap.h:60
IfxPort_P14_9
IFX_EXTERN IfxPort_Pin IfxPort_P14_9
IfxPort_P14_9.
Definition: IfxPort_PinMap.h:106
IfxPort_P14_10
IFX_EXTERN IfxPort_Pin IfxPort_P14_10
IfxPort_P14_10.
Definition: IfxPort_PinMap.h:98
IfxPort_P00_4
IFX_EXTERN IfxPort_Pin IfxPort_P00_4
IfxPort_P00_4.
Definition: IfxPort_PinMap.h:61
IfxPort_P00_12
IFX_EXTERN IfxPort_Pin IfxPort_P00_12
IfxPort_P00_12.
Definition: IfxPort_PinMap.h:58
IfxPort_P20_1
IFX_EXTERN IfxPort_Pin IfxPort_P20_1
IfxPort_P20_1.
Definition: IfxPort_PinMap.h:117
IfxPort_P10_0
IFX_EXTERN IfxPort_Pin IfxPort_P10_0
IfxPort_P10_0.
Definition: IfxPort_PinMap.h:76
IfxPort_P21_1
IFX_EXTERN IfxPort_Pin IfxPort_P21_1
IfxPort_P21_1.
Definition: IfxPort_PinMap.h:129
IfxPort_P15_6
IFX_EXTERN IfxPort_Pin IfxPort_P15_6
IfxPort_P15_6.
Definition: IfxPort_PinMap.h:113
IfxPort_P40_9
IFX_EXTERN IfxPort_Pin IfxPort_P40_9
IfxPort_P40_9.
Definition: IfxPort_PinMap.h:171
IfxPort_P23_2
IFX_EXTERN IfxPort_Pin IfxPort_P23_2
IfxPort_P23_2.
Definition: IfxPort_PinMap.h:142
IfxPort_P21_7
IFX_EXTERN IfxPort_Pin IfxPort_P21_7
IfxPort_P21_7.
Definition: IfxPort_PinMap.h:135
IfxPort_P15_3
IFX_EXTERN IfxPort_Pin IfxPort_P15_3
IfxPort_P15_3.
Definition: IfxPort_PinMap.h:110
IfxPort_P40_1
IFX_EXTERN IfxPort_Pin IfxPort_P40_1
IfxPort_P40_1.
Definition: IfxPort_PinMap.h:165
IfxPort_P20_0
IFX_EXTERN IfxPort_Pin IfxPort_P20_0
IfxPort_P20_0.
Definition: IfxPort_PinMap.h:116
IfxPort_P00_6
IFX_EXTERN IfxPort_Pin IfxPort_P00_6
IfxPort_P00_6.
Definition: IfxPort_PinMap.h:63
IfxPort_P21_0
IFX_EXTERN IfxPort_Pin IfxPort_P21_0
IfxPort_P21_0.
Definition: IfxPort_PinMap.h:128
IfxPort_P21_4
IFX_EXTERN IfxPort_Pin IfxPort_P21_4
IfxPort_P21_4.
Definition: IfxPort_PinMap.h:132
IfxPort_P10_2
IFX_EXTERN IfxPort_Pin IfxPort_P10_2
IfxPort_P10_2.
Definition: IfxPort_PinMap.h:78
IfxPort_P32_2
IFX_EXTERN IfxPort_Pin IfxPort_P32_2
IfxPort_P32_2.
Definition: IfxPort_PinMap.h:147
IfxPort_P15_7
IFX_EXTERN IfxPort_Pin IfxPort_P15_7
IfxPort_P15_7.
Definition: IfxPort_PinMap.h:114
IfxPort_P32_0
IFX_EXTERN IfxPort_Pin IfxPort_P32_0
IfxPort_P32_0.
Definition: IfxPort_PinMap.h:146
IFXPORT_PINMAP_NUM_MODULES
#define IFXPORT_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPort_PinMap.h:174
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxPort_cfg.c Source File

  • _Impl
IfxPort_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxPort_cfg.c
3 * \brief PORT on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxPort_cfg.h"
48
49 /******************************************************************************/
50 /*-----------------------Exported Variables/Constants-------------------------*/
51 /******************************************************************************/
52
53 IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES] = {
54 {&MODULE_P00, 0x0000FFFFUL}, // Port 00
55 {&MODULE_P02, 0x0000FFFFUL}, // Port 02
56 {&MODULE_P10, 0x0000FFFFUL}, // Port 10
57 {&MODULE_P11, 0x0000FFFFUL}, // Port 11
58 {&MODULE_P13, 0x0000FFFFUL}, // Port 13
59 {&MODULE_P14, 0x0000FFFFUL}, // Port 14
60 {&MODULE_P15, 0x0000FFFFUL}, // Port 15
61 {&MODULE_P20, 0x0000FFFFUL}, // Port 20
62 {&MODULE_P21, 0x0000FFFFUL}, // Port 21
63 {&MODULE_P22, 0x0000FFFFUL}, // Port 22
64 {&MODULE_P23, 0x0000FFFFUL}, // Port 23
65 {&MODULE_P32, 0x0000FFFFUL}, // Port 32
66 {&MODULE_P33, 0x0000FFFFUL}, // Port 33
67 //{&MODULE_P40, 0x0000FFFFUL} // Port 40
68 };
69
70 IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES] = {
71 {&MODULE_P00, IfxPort_Index_00}, // Port 00
72 {&MODULE_P02, IfxPort_Index_02}, // Port 02
73 {&MODULE_P10, IfxPort_Index_10}, // Port 10
74 {&MODULE_P11, IfxPort_Index_11}, // Port 11
75 {&MODULE_P13, IfxPort_Index_13}, // Port 13
76 {&MODULE_P14, IfxPort_Index_14}, // Port 14
77 {&MODULE_P15, IfxPort_Index_15}, // Port 15
78 {&MODULE_P20, IfxPort_Index_20}, // Port 20
79 {&MODULE_P21, IfxPort_Index_21}, // Port 21
80 {&MODULE_P22, IfxPort_Index_22}, // Port 22
81 {&MODULE_P23, IfxPort_Index_23}, // Port 23
82 {&MODULE_P32, IfxPort_Index_32}, // Port 32
83 {&MODULE_P33, IfxPort_Index_33} // Port 33
84 //{&MODULE_P40, 40} // Port 40
85 };
IfxPort_Esr_Masks
used by IfxPort_Esr_Masks table
Definition: IfxPort_cfg.h:100
IfxPort_Index_13
PORT 13.
Definition: IfxPort_cfg.h:82
IfxPort_Index_10
PORT 10.
Definition: IfxPort_cfg.h:80
IFXPORT_NUM_MODULES
#define IFXPORT_NUM_MODULES
Port count.
Definition: IfxPort_cfg.h:66
IfxPort_Index_00
PORT 00.
Definition: IfxPort_cfg.h:78
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxPort_Index_23
PORT 23.
Definition: IfxPort_cfg.h:88
IfxPort_Index_33
PORT 33.
Definition: IfxPort_cfg.h:90
IfxPort_Index_21
PORT 21.
Definition: IfxPort_cfg.h:86
IfxPort_Index_15
PORT 15.
Definition: IfxPort_cfg.h:84
IfxPort_Index_14
PORT 14.
Definition: IfxPort_cfg.h:83
IfxPort_Index_20
PORT 20.
Definition: IfxPort_cfg.h:85
IfxPort_Index_32
PORT 32.
Definition: IfxPort_cfg.h:89
IfxPort_Index_22
PORT 22.
Definition: IfxPort_cfg.h:87
IfxPort_cfg.h
PORT on-chip implementation data.
IfxPort_Index_02
PORT 02.
Definition: IfxPort_cfg.h:79
IfxPort_cfg_esrMasks
IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.c:53
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxPort_Index_11
PORT 11.
Definition: IfxPort_cfg.h:81
IfxPort_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.c:70


iLLD_TC26B: IfxPort_cfg.h Source File

  • _Impl
IfxPort_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxPort_cfg.h
3 * \brief PORT on-chip implementation data
4 * \ingroup IfxLld_Port
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Port PORTS
43 * \ingroup IfxLld
44 * \defgroup IfxLld_Port_Impl Implementation
45 * \ingroup IfxLld_Port
46 * \defgroup IfxLld_Port_Std Standard Driver
47 * \ingroup IfxLld_Port
48 */
49
50 #ifndef IFXPORT_CFG_H
51 #define IFXPORT_CFG_H 1
52
53 /******************************************************************************/
54 /*----------------------------------Includes----------------------------------*/
55 /******************************************************************************/
56
57 #include "Cpu/Std/IfxCpu_Intrinsics.h"
58 #include "IfxPort_reg.h"
59
60 /******************************************************************************/
61 /*-----------------------------------Macros-----------------------------------*/
62 /******************************************************************************/
63
64 /** \brief Port count \ingroup IfxLld_port_cfg
65 */
66 #define IFXPORT_NUM_MODULES (13)
67
68 #define IFXPORT_OUTOUTFEATURE_NONE (0xFFFFFFFF)
69
70 /******************************************************************************/
71 /*-------------------------------Enumerations---------------------------------*/
72 /******************************************************************************/
73
74 /** \brief List of the available Port resources
75 */
76 typedef enum
77 {
78 IfxPort_Index_00 = 0, /**< \brief PORT 00 */
79 IfxPort_Index_02 = 2, /**< \brief PORT 02 */
80 IfxPort_Index_10 = 10, /**< \brief PORT 10 */
81 IfxPort_Index_11 = 11, /**< \brief PORT 11 */
82 IfxPort_Index_13 = 13, /**< \brief PORT 13 */
83 IfxPort_Index_14 = 14, /**< \brief PORT 14 */
84 IfxPort_Index_15 = 15, /**< \brief PORT 15 */
85 IfxPort_Index_20 = 20, /**< \brief PORT 20 */
86 IfxPort_Index_21 = 21, /**< \brief PORT 21 */
87 IfxPort_Index_22 = 22, /**< \brief PORT 22 */
88 IfxPort_Index_23 = 23, /**< \brief PORT 23 */
89 IfxPort_Index_32 = 32, /**< \brief PORT 32 */
90 IfxPort_Index_33 = 33, /**< \brief PORT 33 */
91 IfxPort_Index_none = -1 /**< \brief none */
92 } IfxPort_Index;
93
94 /******************************************************************************/
95 /*-----------------------------Data Structures--------------------------------*/
96 /******************************************************************************/
97
98 /** \brief used by IfxPort_Esr_Masks table
99 */
100 typedef struct
101 {
102 Ifx_P *port;
103 uint16 masks;
104 } IfxPort_Esr_Masks;
105
106 /******************************************************************************/
107 /*-------------------Global Exported Variables/Constants----------------------*/
108 /******************************************************************************/
109
110 IFX_EXTERN IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES];
111
112 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES];
113
114 #endif /* IFXPORT_CFG_H */
IfxPort_Esr_Masks
used by IfxPort_Esr_Masks table
Definition: IfxPort_cfg.h:100
IfxPort_Index
IfxPort_Index
List of the available Port resources.
Definition: IfxPort_cfg.h:76
IfxPort_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.h:112
IfxPort_Index_13
PORT 13.
Definition: IfxPort_cfg.h:82
IfxPort_Index_10
PORT 10.
Definition: IfxPort_cfg.h:80
IFXPORT_NUM_MODULES
#define IFXPORT_NUM_MODULES
Port count.
Definition: IfxPort_cfg.h:66
IfxPort_Esr_Masks::port
Ifx_P * port
Definition: IfxPort_cfg.h:102
IfxCpu_Intrinsics.h
IfxPort_Index_00
PORT 00.
Definition: IfxPort_cfg.h:78
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPort_Index_23
PORT 23.
Definition: IfxPort_cfg.h:88
IfxPort_Index_33
PORT 33.
Definition: IfxPort_cfg.h:90
IfxPort_Index_21
PORT 21.
Definition: IfxPort_cfg.h:86
IfxPort_Index_15
PORT 15.
Definition: IfxPort_cfg.h:84
IfxPort_Index_14
PORT 14.
Definition: IfxPort_cfg.h:83
IfxPort_Index_20
PORT 20.
Definition: IfxPort_cfg.h:85
IfxPort_Index_32
PORT 32.
Definition: IfxPort_cfg.h:89
IfxPort_Index_22
PORT 22.
Definition: IfxPort_cfg.h:87
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPort_Index_02
PORT 02.
Definition: IfxPort_cfg.h:79
IfxPort_cfg_esrMasks
IFX_EXTERN IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.h:110
IfxPort_Index_none
none
Definition: IfxPort_cfg.h:91
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxPort_Index_11
PORT 11.
Definition: IfxPort_cfg.h:81
IfxPort_Esr_Masks::masks
uint16 masks
Definition: IfxPort_cfg.h:103


iLLD_TC26B: IfxPsi5.c Source File

  • Psi5
  • Std
IfxPsi5.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5.c
3 * \brief PSI5 basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxPsi5.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxPsi5_disableModule(Ifx_PSI5 *psi5)
55 {
56 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
57 IfxScuWdt_clearCpuEndinit(passwd);
58 psi5->CLC.B.DISR = 1;
59 IfxScuWdt_setCpuEndinit(passwd);
60 }
61
62
63 void IfxPsi5_resetModule(Ifx_PSI5 *psi5)
64 {
65 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
66 IfxScuWdt_clearCpuEndinit(passwd);
67
68 psi5->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
69 psi5->KRST1.B.RST = 1;
70 IfxScuWdt_setCpuEndinit(passwd);
71
72 while (0 == psi5->KRST0.B.RSTSTAT) /* Wait until reset is executed */
73 {}
74
75 IfxScuWdt_clearCpuEndinit(passwd);
76 psi5->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
77 IfxScuWdt_setCpuEndinit(passwd);
78 }
79
80
81 void IfxPsi5_enableModule(Ifx_PSI5 *psi5)
82 {
83 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
84 IfxScuWdt_clearCpuEndinit(passwd);
85 psi5->CLC.B.DISR = 0;
86 IfxScuWdt_setCpuEndinit(passwd);
87
88 if (psi5->CLC.U)
89 {}
90 }
IfxPsi5_enableModule
void IfxPsi5_enableModule(Ifx_PSI5 *psi5)
Definition: IfxPsi5.c:81
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxPsi5.h
PSI5 basic functionality.
IfxPsi5_resetModule
void IfxPsi5_resetModule(Ifx_PSI5 *psi5)
resets PSI5 kernel
Definition: IfxPsi5.c:63
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPsi5_disableModule
void IfxPsi5_disableModule(Ifx_PSI5 *psi5)
Disable PSI5 kernel.
Definition: IfxPsi5.c:54
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418


iLLD_TC26B: IfxPsi5.h Source File

  • Psi5
  • Std
IfxPsi5.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5.h
3 * \brief PSI5 basic functionality
4 * \ingroup IfxLld_Psi5
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Psi5_Std_Enumerations Enumerations
44 * \ingroup IfxLld_Psi5_Std
45 * \defgroup IfxLld_Psi5_Std_Channel Channel Status Functions
46 * \ingroup IfxLld_Psi5_Std
47 * \defgroup IfxLld_Psi5_Std_IO IO Pin Configuration Functions
48 * \ingroup IfxLld_Psi5_Std
49 * \defgroup IfxLld_Psi5_Std_Interrupt Interrupt configuration function
50 * \ingroup IfxLld_Psi5_Std
51 * \defgroup IfxLld_Psi5_Std_Operative Operative functions
52 * \ingroup IfxLld_Psi5_Std
53 */
54
55 #ifndef IFXPSI5_H
56 #define IFXPSI5_H 1
57
58 /******************************************************************************/
59 /*----------------------------------Includes----------------------------------*/
60 /******************************************************************************/
61
62 #include "_Impl/IfxPsi5_cfg.h"
63 #include "_PinMap/IfxPsi5_PinMap.h"
64 #include "IfxPsi5_reg.h"
65 #include "Scu/Std/IfxScuWdt.h"
66 #include "Cpu/Std/IfxCpu_Intrinsics.h"
67 #include "Src/Std/IfxSrc.h"
68
69 /******************************************************************************/
70 /*--------------------------------Enumerations--------------------------------*/
71 /******************************************************************************/
72
73 /** \addtogroup IfxLld_Psi5_Std_Enumerations
74 * \{ */
75 /** \brief MODULE_PSI5.IOCRx.ALTI(x = 0,1,2),Alternate input selection
76 */
77 typedef enum
78 {
79 IfxPsi5_AlternateInput_0 = 0, /**< \brief Alternate Input 0 */
80 IfxPsi5_AlternateInput_1, /**< \brief Alternate Input 1 */
81 IfxPsi5_AlternateInput_2, /**< \brief Alternate Input 2 */
82 IfxPsi5_AlternateInput_3 /**< \brief Alternate Input 3 */
83 } IfxPsi5_AlternateInput;
84
85 /** \brief MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection
86 */
87 typedef enum
88 {
89 IfxPsi5_BaudRate_125 = 0, /**< \brief Slow 125 kHz clock */
90 IfxPsi5_BaudRate_189 = 1 /**< \brief Fast 189 kHz clock */
91 } IfxPsi5_BaudRate;
92
93 /** \brief MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection
94 */
95 typedef enum
96 {
97 IfxPsi5_CRCorParity_parity = 0, /**< \brief parity selection */
98 IfxPsi5_CRCorParity_crc = 1 /**< \brief CRC selection */
99 } IfxPsi5_CRCorParity;
100
101 /** \brief Clock type
102 */
103 typedef enum
104 {
105 IfxPsi5_ClockType_fracDiv = 0, /**< \brief Fractional Divide clock */
106 IfxPsi5_ClockType_slowClock_125 = 1, /**< \brief Slow 125 kHz clock */
107 IfxPsi5_ClockType_fastClock_189 = 2, /**< \brief Fast 189 kHz clock */
108 IfxPsi5_ClockType_timeStamp = 3 /**< \brief Timestamp clock */
109 } IfxPsi5_ClockType;
110
111 /** \brief MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth
112 */
113 typedef enum
114 {
115 IfxPsi5_DigitalInputFilterDepth_0 = 0, /**< \brief Digital input filter depth is 0 */
116 IfxPsi5_DigitalInputFilterDepth_1, /**< \brief Digital input filter depth is 1 */
117 IfxPsi5_DigitalInputFilterDepth_2, /**< \brief Digital input filter depth is 2 */
118 IfxPsi5_DigitalInputFilterDepth_3, /**< \brief Digital input filter depth is 3 */
119 IfxPsi5_DigitalInputFilterDepth_4, /**< \brief Digital input filter depth is 4 */
120 IfxPsi5_DigitalInputFilterDepth_5, /**< \brief Digital input filter depth is 5 */
121 IfxPsi5_DigitalInputFilterDepth_6, /**< \brief Digital input filter depth is 6 */
122 IfxPsi5_DigitalInputFilterDepth_7, /**< \brief Digital input filter depth is 7 */
123 IfxPsi5_DigitalInputFilterDepth_8, /**< \brief Digital input filter depth is 8 */
124 IfxPsi5_DigitalInputFilterDepth_9, /**< \brief Digital input filter depth is 9 */
125 IfxPsi5_DigitalInputFilterDepth_10, /**< \brief Digital input filter depth is 10 */
126 IfxPsi5_DigitalInputFilterDepth_11, /**< \brief Digital input filter depth is 11 */
127 IfxPsi5_DigitalInputFilterDepth_12, /**< \brief Digital input filter depth is 12 */
128 IfxPsi5_DigitalInputFilterDepth_13, /**< \brief Digital input filter depth is 13 */
129 IfxPsi5_DigitalInputFilterDepth_14, /**< \brief Digital input filter depth is 14 */
130 IfxPsi5_DigitalInputFilterDepth_15 /**< \brief Digital input filter depth is 15 */
131 } IfxPsi5_DigitalInputFilterDepth;
132
133 /** \brief MODULE_PSI5.FDR.DM,Divider mode
134 */
135 typedef enum
136 {
137 IfxPsi5_DividerMode_spb = 0, /**< \brief divider mode is off */
138 IfxPsi5_DividerMode_normal = 1, /**< \brief divider mode is normal */
139 IfxPsi5_DividerMode_fractional = 2, /**< \brief divider mode is fractional */
140 IfxPsi5_DividerMode_off = 3 /**< \brief divider mode is off */
141 } IfxPsi5_DividerMode;
142
143 /** \brief MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control
144 */
145 typedef enum
146 {
147 IfxPsi5_FrameExpectation_notExpected = 0, /**< \brief No frame is expected */
148 IfxPsi5_FrameExpectation_expected = 1 /**< \brief Frame is expected */
149 } IfxPsi5_FrameExpectation;
150
151 /** \brief MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence
152 */
153 typedef enum
154 {
155 IfxPsi5_MessagingBits_absent = 0, /**< \brief No messaging bits */
156 IfxPsi5_MessagingBits_present = 1 /**< \brief 2 messaging bits */
157 } IfxPsi5_MessagingBits;
158
159 /** \brief MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers
160 */
161 typedef enum
162 {
163 IfxPsi5_ReceiveDataRegisterTimestamp_pulse = 0, /**< \brief Pulse based timestamp SPTSC to be stored in RDRHC */
164 IfxPsi5_ReceiveDataRegisterTimestamp_frame = 1 /**< \brief Start of frame based timestamp SPTSC to be stored in RDRHC */
165 } IfxPsi5_ReceiveDataRegisterTimestamp;
166
167 /** \brief MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id
168 */
169 typedef enum
170 {
171 IfxPsi5_Slot_0 = 0, /**< \brief slot 0 */
172 IfxPsi5_Slot_1, /**< \brief slot 1 */
173 IfxPsi5_Slot_2, /**< \brief slot 2 */
174 IfxPsi5_Slot_3, /**< \brief slot 3 */
175 IfxPsi5_Slot_4, /**< \brief slot 4 */
176 IfxPsi5_Slot_5 /**< \brief slot 5 */
177 } IfxPsi5_Slot;
178
179 /** \brief OCDS Suspend Control (OCDS.SUS)
180 */
181 typedef enum
182 {
183 IfxPsi5_SuspendMode_none = 0, /**< \brief No suspend */
184 IfxPsi5_SuspendMode_hard = 1, /**< \brief Hard Suspend */
185 IfxPsi5_SuspendMode_soft = 2 /**< \brief Soft Suspend */
186 } IfxPsi5_SuspendMode;
187
188 /** \brief MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base
189 */
190 typedef enum
191 {
192 IfxPsi5_TimeBase_internal = 0, /**< \brief Internal time stamp clock */
193 IfxPsi5_TimeBase_external = 1 /**< \brief External GTM inputs */
194 } IfxPsi5_TimeBase;
195
196 /** \brief MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type
197 */
198 typedef enum
199 {
200 IfxPsi5_TimestampRegister_a = 0, /**< \brief Timestamp register A */
201 IfxPsi5_TimestampRegister_b = 1, /**< \brief Timestamp register B */
202 IfxPsi5_TimestampRegister_c = 2 /**< \brief Timestamp register C */
203 } IfxPsi5_TimestampRegister;
204
205 /** \brief MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id
206 */
207 typedef enum
208 {
209 IfxPsi5_Trigger_0 = 0, /**< \brief trigger 0 */
210 IfxPsi5_Trigger_1, /**< \brief trigger 1 */
211 IfxPsi5_Trigger_2, /**< \brief trigger 2 */
212 IfxPsi5_Trigger_3, /**< \brief trigger 3 */
213 IfxPsi5_Trigger_4, /**< \brief trigger 4 */
214 IfxPsi5_Trigger_5 /**< \brief trigger 5 */
215 } IfxPsi5_Trigger;
216
217 /** \brief Trigger type
218 */
219 typedef enum
220 {
221 IfxPsi5_TriggerType_periodic = 0, /**< \brief Periodic trigger */
222 IfxPsi5_TriggerType_external = 1, /**< \brief External trigger */
223 IfxPsi5_TriggerType_bypass = 2 /**< \brief Bypassed trigger */
224 } IfxPsi5_TriggerType;
225
226 /** \brief MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode
227 */
228 typedef enum
229 {
230 IfxPsi5_Verbose_off = 0, /**< \brief Verbose mode is turned off */
231 IfxPsi5_Verbose_on = 1 /**< \brief Verbose mode is turned on */
232 } IfxPsi5_Verbose;
233
234 /** \} */
235
236 /** \brief Options for choosing different Fractional Divider Registers
237 */
238 typedef enum
239 {
240 IfxPsi5_FractionalDividerRegister_normal = 0, /**< \brief The Fractional Divider Register controls the input clock f_fracdiv. */
241 IfxPsi5_FractionalDividerRegister_lowbitrate = 1, /**< \brief The Fractional Divider Register for lower Bit Rate contains the pre-divider that defines the time resolution of the
242 * f_125.It divides f_fracdiv by a factor and provides f_125 to all channels. */
243 IfxPsi5_FractionalDividerRegister_highbitrate = 2, /**< \brief The Fractional Divider Register for Higher Bit Rate contains the pre-divider that defines the time resolution of f_189.
244 * It divides f_fracdiv by a factor and provides f_189 to all channels. */
245 IfxPsi5_FractionalDividerRegister_timestamp = 3 /**< \brief The PSI5 Module Time Stamp Predivider Register contains the pre-divider that defines the time resolution of the
246 * Time Stamp Registers TSRA/B/C and the Sync Pulse Time Base Counter SBC. It divides fPSI5 by a factor. It contains as well the bits for reset control of the time stamp counters. */
247 } IfxPsi5_FractionalDividerRegister;
248
249 typedef enum
250 {
251 IfxPsi5_InterruptServiceRequest_0 = 0,
252 IfxPsi5_InterruptServiceRequest_1 = 1,
253 IfxPsi5_InterruptServiceRequest_2 = 2,
254 IfxPsi5_InterruptServiceRequest_3 = 3,
255 IfxPsi5_InterruptServiceRequest_4 = 4,
256 IfxPsi5_InterruptServiceRequest_5 = 5,
257 IfxPsi5_InterruptServiceRequest_6 = 6,
258 IfxPsi5_InterruptServiceRequest_7 = 7
259 } IfxPsi5_InterruptServiceRequest;
260
261 typedef enum
262 {
263 IfxPsi5_InterruptStatusRegister_a = 0,
264 IfxPsi5_InterruptStatusRegister_b = 1
265 } IfxPsi5_InterruptStatusRegister;
266
267 /** \brief Optiond for different Receive Control Registers(RCRA,RCRB,RCRC)
268 */
269 typedef enum
270 {
271 IfxPsi5_ReceiverControlRegister_a = 0, /**< \brief Receiver Control Register A configures the payload length of the up to 6 frames in the up to 6 slots. */
272 IfxPsi5_ReceiverControlRegister_b = 1, /**< \brief Receiver Control Register B configures up to 6 frame types in the up to 6 slots */
273 IfxPsi5_ReceiverControlRegister_c = 2 /**< \brief Receiver Control Register C configures bit rate and time stamp sources */
274 } IfxPsi5_ReceiverControlRegister;
275
276 /** \addtogroup IfxLld_Psi5_Std_Channel
277 * \{ */
278
279 /******************************************************************************/
280 /*-------------------------Inline Function Prototypes-------------------------*/
281 /******************************************************************************/
282
283 /** \brief access function to get the CRCI status register contents for a channel
284 * \param psi5 pointer to the PSI5 register space
285 * \param channel channel Id
286 * \return Crci status register contents
287 */
288 IFX_INLINE uint32 IfxPsi5_getStatusCrci(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
289
290 /** \brief access function to get the MEI status register contents for a channel
291 * \param psi5 pointer to the PSI5 register space
292 * \param channel channel Id
293 * \return Mei status register contents
294 */
295 IFX_INLINE uint32 IfxPsi5_getStatusMei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
296
297 /** \brief access function to get the NBI status register contents for a channel
298 * \param psi5 pointer to the PSI5 register space
299 * \param channel channel Id
300 * \return Nbi status register contents
301 */
302 IFX_INLINE uint32 IfxPsi5_getStatusNbi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
303
304 /** \brief access function to get the NFI status register contents for a channel
305 * \param psi5 pointer to the PSI5 register space
306 * \param channel channel Id
307 * \return Nfi status register contents
308 */
309 IFX_INLINE uint32 IfxPsi5_getStatusNfi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
310
311 /** \brief access function to get the RDI status register contents for a channel
312 * \param psi5 pointer to the PSI5 register space
313 * \param channel channel Id
314 * \return Rdi status register contents
315 */
316 IFX_INLINE uint32 IfxPsi5_getStatusRdi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
317
318 /** \brief access function to get the RMI status register contents for a channel
319 * \param psi5 pointer to the PSI5 register space
320 * \param channel channel Id
321 * \return Rmi status register contents
322 */
323 IFX_INLINE uint32 IfxPsi5_getStatusRmi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
324
325 /** \brief access function to get the RSI status register contents for a channel
326 * \param psi5 pointer to the PSI5 register space
327 * \param channel channel Id
328 * \return Rsi status register contents
329 */
330 IFX_INLINE uint32 IfxPsi5_getStatusRsi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
331
332 /** \brief access function to get the TEI status register contents for a channel
333 * \param psi5 pointer to the PSI5 register space
334 * \param channel channel Id
335 * \return Tei status register contents
336 */
337 IFX_INLINE uint32 IfxPsi5_getStatusTei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
338
339 /******************************************************************************/
340 /*-------------------------Global Function Prototypes-------------------------*/
341 /******************************************************************************/
342
343 /** \brief resets PSI5 kernel
344 * \param psi5 pointer to PSI5 registers
345 * \return None
346 */
347 IFX_EXTERN void IfxPsi5_resetModule(Ifx_PSI5 *psi5);
348
349 /** \} */
350
351 /** \addtogroup IfxLld_Psi5_Std_IO
352 * \{ */
353
354 /******************************************************************************/
355 /*-------------------------Inline Function Prototypes-------------------------*/
356 /******************************************************************************/
357
358 /** \brief Initializes a RX input
359 * \param rx the RX Pin which should be configured
360 * \param inputMode pin input mode which should be configured
361 * \param padDriver Pad Driver Configuration
362 * \return None
363 */
364 IFX_INLINE void IfxPsi5_initRxPin(const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
365
366 /** \brief Initializes a TX output
367 * \param tx the TX Pin which should be configured
368 * \param outputMode the pin output mode which should be configured
369 * \param padDriver the pad driver mode which should be configured
370 * \return None
371 */
372 IFX_INLINE void IfxPsi5_initTxPin(const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
373
374 /** \brief Sets the alternate RX input
375 * \param psi5Ch pointer to the PSI5 channel register space
376 * \param alternateInput Alternate RX input selection
377 * \return None
378 */
379 IFX_INLINE void IfxPsi5_setRxInput(Ifx_PSI5_CH *psi5Ch, IfxPsi5_AlternateInput alternateInput);
380
381 /** \} */
382
383 /** \addtogroup IfxLld_Psi5_Std_Operative
384 * \{ */
385
386 /******************************************************************************/
387 /*-------------------------Inline Function Prototypes-------------------------*/
388 /******************************************************************************/
389
390 /** \brief Returns the module's suspend state.
391 * TRUE :if module is suspended.
392 * FALSE:if module is not yet suspended.
393 * \param psi5 Pointer to PSI5 module registers
394 * \return Suspend status (TRUE / FALSE)
395 */
396 IFX_INLINE boolean IfxPsi5_isModuleSuspended(Ifx_PSI5 *psi5);
397
398 /** \brief Configure the Module to Hard/Soft suspend mode.
399 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
400 * \param psi5 Pointer to PSI5 module registers
401 * \param mode Module suspend mode
402 * \return None
403 */
404 IFX_INLINE void IfxPsi5_setSuspendMode(Ifx_PSI5 *psi5, IfxPsi5_SuspendMode mode);
405
406 /******************************************************************************/
407 /*-------------------------Global Function Prototypes-------------------------*/
408 /******************************************************************************/
409
410 /** \brief Disable PSI5 kernel
411 * \param psi5 pointer to the base of PSI5 registers
412 * \return None
413 */
414 IFX_EXTERN void IfxPsi5_disableModule(Ifx_PSI5 *psi5);
415
416 /** \} */
417
418 /******************************************************************************/
419 /*-------------------------Inline Function Prototypes-------------------------*/
420 /******************************************************************************/
421
422 /** \brief Gives the pointer to the SRC register for respective PSI5 interrupt source
423 * \param psi5 Pointer to PSI5 SFR base register
424 * \param intRequest Interrupt Source
425 * \return Address of the required SRC register
426 */
427 IFX_INLINE volatile Ifx_SRC_SRCR *IfxPsi5_getSrcPointer(Ifx_PSI5 *psi5, IfxPsi5_InterruptServiceRequest intRequest);
428
429 /** \brief Enabling all channels and error flags
430 * \param psi5 Pointer to PSI5 SFR base register
431 * \return None
432 */
433 IFX_INLINE void IfxPsi5_enableAllChannels(Ifx_PSI5 *psi5);
434
435 /**
436 * \param psi5 Pointer to PSI5 SFR base register
437 * \param fcd Select the appropriate divider register(see IfxPsi5_FractionalDividerRegister enum) for required functionality.
438 * \param value Contains value including divider values for different divider registers(FDR,FDRL,FDRH,FDRT)
439 * \return None
440 */
441 IFX_INLINE void IfxPsi5_setFractionalDivider(Ifx_PSI5 *psi5, IfxPsi5_FractionalDividerRegister fcd, uint32 value);
442
443 /******************************************************************************/
444 /*-------------------------Global Function Prototypes-------------------------*/
445 /******************************************************************************/
446
447 /**
448 * \return None
449 */
450 IFX_EXTERN void IfxPsi5_enableModule(Ifx_PSI5 *psi5);
451
452 /******************************************************************************/
453 /*---------------------Inline Function Implementations------------------------*/
454 /******************************************************************************/
455
456 IFX_INLINE uint32 IfxPsi5_getStatusCrci(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
457 {
458 return psi5->CRCIOV[channel].U;
459 }
460
461
462 IFX_INLINE uint32 IfxPsi5_getStatusMei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
463 {
464 return psi5->MEIOV[channel].U;
465 }
466
467
468 IFX_INLINE uint32 IfxPsi5_getStatusNbi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
469 {
470 return psi5->NBIOV[channel].U;
471 }
472
473
474 IFX_INLINE uint32 IfxPsi5_getStatusNfi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
475 {
476 return psi5->NFIOV[channel].U;
477 }
478
479
480 IFX_INLINE uint32 IfxPsi5_getStatusRdi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
481 {
482 return psi5->RDIOV[channel].U;
483 }
484
485
486 IFX_INLINE uint32 IfxPsi5_getStatusRmi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
487 {
488 return psi5->RMIOV[channel].U;
489 }
490
491
492 IFX_INLINE uint32 IfxPsi5_getStatusRsi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
493 {
494 return psi5->RSIOV[channel].U;
495 }
496
497
498 IFX_INLINE uint32 IfxPsi5_getStatusTei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
499 {
500 return psi5->TEIOV[channel].U;
501 }
502
503
504 IFX_INLINE void IfxPsi5_initRxPin(const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
505 {
506 if (rx->pin.port != NULL_PTR)
507 {
508 IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, inputMode);
509 IfxPort_setPinPadDriver(rx->pin.port, rx->pin.pinIndex, padDriver);
510 Ifx_PSI5 *psi5 = rx->module;
511 Ifx_PSI5_CH *psi5Ch = &psi5->CH[rx->channelId];
512 IfxPsi5_setRxInput(psi5Ch, (IfxPsi5_AlternateInput)rx->select);
513 }
514 }
515
516
517 IFX_INLINE void IfxPsi5_initTxPin(const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
518 {
519 if (tx->pin.port != NULL_PTR)
520 {
521 IfxPort_setPinModeOutput(tx->pin.port, tx->pin.pinIndex, outputMode, tx->select);
522 IfxPort_setPinPadDriver(tx->pin.port, tx->pin.pinIndex, padDriver);
523 }
524 }
525
526
527 IFX_INLINE void IfxPsi5_setRxInput(Ifx_PSI5_CH *psi5Ch, IfxPsi5_AlternateInput alternateInput)
528 {
529 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
530 IfxScuWdt_clearCpuEndinit(passwd);
531 psi5Ch->IOCR.B.ALTI = alternateInput;
532 IfxScuWdt_setCpuEndinit(passwd);
533 }
534
535
536 IFX_INLINE boolean IfxPsi5_isModuleSuspended(Ifx_PSI5 *psi5)
537 {
538 Ifx_PSI5_OCS ocs;
539
540 // read the status
541 ocs.U = psi5->OCS.U;
542
543 // return the status
544 return ocs.B.SUSSTA;
545 }
546
547
548 IFX_INLINE void IfxPsi5_setSuspendMode(Ifx_PSI5 *psi5, IfxPsi5_SuspendMode mode)
549 {
550 Ifx_PSI5_OCS ocs;
551
552 // remove protection and configure the suspend mode.
553 ocs.B.SUS_P = 1;
554 ocs.B.SUS = mode;
555 psi5->OCS.U = ocs.U;
556 }
557
558
559 IFX_INLINE volatile Ifx_SRC_SRCR *IfxPsi5_getSrcPointer(Ifx_PSI5 *psi5, IfxPsi5_InterruptServiceRequest intRequest)
560 {
561 IFX_UNUSED_PARAMETER(psi5);
562 return &MODULE_SRC.PSI5.PSI5[0].SR[intRequest];
563 }
564
565
566 IFX_INLINE void IfxPsi5_enableAllChannels(Ifx_PSI5 *psi5)
567 {
568 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
569 IfxScuWdt_clearCpuEndinit(passwd);
570 psi5->GCR.U = psi5->GCR.U | 0x000F001FU;
571 IfxScuWdt_setCpuEndinit(passwd);
572 }
573
574
575 IFX_INLINE void IfxPsi5_setFractionalDivider(Ifx_PSI5 *psi5, IfxPsi5_FractionalDividerRegister fcd, uint32 value)
576 {
577 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
578 IfxScuWdt_clearCpuEndinit(passwd);
579
580 switch (fcd)
581 {
582 case IfxPsi5_FractionalDividerRegister_normal:
583 psi5->FDR.I = value;
584 break;
585 case IfxPsi5_FractionalDividerRegister_lowbitrate:
586 psi5->FDRL.I = value;
587 break;
588 case IfxPsi5_FractionalDividerRegister_highbitrate:
589 psi5->FDRH.I = value;
590 break;
591 case IfxPsi5_FractionalDividerRegister_timestamp:
592 psi5->FDRT.I = value;
593 break;
594 default:
595 break;
596 }
597
598 IfxScuWdt_setCpuEndinit(passwd);
599 }
600
601
602 #endif /* IFXPSI5_H */
IfxPsi5_getStatusNbi
IFX_INLINE uint32 IfxPsi5_getStatusNbi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NBI status register contents for a channel
Definition: IfxPsi5.h:468
IfxPsi5_DigitalInputFilterDepth_5
Digital input filter depth is 5.
Definition: IfxPsi5.h:120
IfxPsi5_Trigger_5
trigger 5
Definition: IfxPsi5.h:214
IfxPsi5_TimestampRegister_c
Timestamp register C.
Definition: IfxPsi5.h:202
IfxPsi5_FractionalDividerRegister_normal
The Fractional Divider Register controls the input clock f_fracdiv.
Definition: IfxPsi5.h:240
IfxPsi5_DividerMode_normal
divider mode is normal
Definition: IfxPsi5.h:138
IfxPsi5_Trigger_0
trigger 0
Definition: IfxPsi5.h:209
IfxPsi5_ReceiverControlRegister_a
Receiver Control Register A configures the payload length of the up to 6 frames in the up to 6 slots...
Definition: IfxPsi5.h:271
IfxPsi5_Trigger_2
trigger 2
Definition: IfxPsi5.h:211
IfxPsi5_InterruptServiceRequest_7
Definition: IfxPsi5.h:258
IfxPsi5_PinMap.h
PSI5 I/O map.
IfxPsi5_getStatusRdi
IFX_INLINE uint32 IfxPsi5_getStatusRdi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RDI status register contents for a channel
Definition: IfxPsi5.h:480
IfxPsi5_Slot_1
slot 1
Definition: IfxPsi5.h:172
IfxPsi5_BaudRate_189
Fast 189 kHz clock.
Definition: IfxPsi5.h:90
IfxPsi5_AlternateInput_0
Alternate Input 0.
Definition: IfxPsi5.h:79
IfxPsi5_Trigger_1
trigger 1
Definition: IfxPsi5.h:210
IfxPsi5_InterruptStatusRegister
IfxPsi5_InterruptStatusRegister
Definition: IfxPsi5.h:261
IfxPsi5_AlternateInput_3
Alternate Input 3.
Definition: IfxPsi5.h:82
IfxPsi5_SuspendMode_soft
Soft Suspend.
Definition: IfxPsi5.h:185
IfxPsi5_CRCorParity_crc
CRC selection.
Definition: IfxPsi5.h:98
IfxPsi5_FractionalDividerRegister_highbitrate
The Fractional Divider Register for Higher Bit Rate contains the pre-divider that defines the time re...
Definition: IfxPsi5.h:243
IfxPsi5_Slot_2
slot 2
Definition: IfxPsi5.h:173
IfxPsi5_Rx_In::channelId
IfxPsi5_ChannelId channelId
Channel ID.
Definition: IfxPsi5_PinMap.h:59
IfxPsi5_FrameExpectation_expected
Frame is expected.
Definition: IfxPsi5.h:148
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxPsi5_Rx_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxPsi5_PinMap.h:61
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPsi5_BaudRate_125
Slow 125 kHz clock.
Definition: IfxPsi5.h:89
IfxPsi5_TimeBase
IfxPsi5_TimeBase
MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base.
Definition: IfxPsi5.h:190
IfxPsi5_getStatusNfi
IFX_INLINE uint32 IfxPsi5_getStatusNfi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NFI status register contents for a channel
Definition: IfxPsi5.h:474
IfxPsi5_TimestampRegister
IfxPsi5_TimestampRegister
MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type...
Definition: IfxPsi5.h:198
IfxPsi5_DigitalInputFilterDepth_10
Digital input filter depth is 10.
Definition: IfxPsi5.h:125
IfxPsi5_AlternateInput_2
Alternate Input 2.
Definition: IfxPsi5.h:81
IfxPsi5_DividerMode
IfxPsi5_DividerMode
MODULE_PSI5.FDR.DM,Divider mode.
Definition: IfxPsi5.h:135
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxPsi5_MessagingBits_absent
No messaging bits.
Definition: IfxPsi5.h:155
IfxPsi5_CRCorParity_parity
parity selection
Definition: IfxPsi5.h:97
IfxPsi5_SuspendMode_none
No suspend.
Definition: IfxPsi5.h:183
IfxPsi5_DigitalInputFilterDepth_1
Digital input filter depth is 1.
Definition: IfxPsi5.h:116
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxPsi5_Rx_In
RX pin mapping structure.
Definition: IfxPsi5_PinMap.h:56
IfxPsi5_isModuleSuspended
IFX_INLINE boolean IfxPsi5_isModuleSuspended(Ifx_PSI5 *psi5)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxPsi5.h:536
IfxSrc.h
SRC basic functionality.
IfxPsi5_ReceiveDataRegisterTimestamp
IfxPsi5_ReceiveDataRegisterTimestamp
MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers.
Definition: IfxPsi5.h:161
IfxPsi5_getStatusCrci
IFX_INLINE uint32 IfxPsi5_getStatusCrci(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the CRCI status register contents for a channel
Definition: IfxPsi5.h:456
IfxPsi5_FractionalDividerRegister_lowbitrate
The Fractional Divider Register for lower Bit Rate contains the pre-divider that defines the time res...
Definition: IfxPsi5.h:241
IfxPsi5_InterruptServiceRequest_2
Definition: IfxPsi5.h:253
IfxCpu_Intrinsics.h
IfxPsi5_Slot_4
slot 4
Definition: IfxPsi5.h:175
IfxPsi5_setSuspendMode
IFX_INLINE void IfxPsi5_setSuspendMode(Ifx_PSI5 *psi5, IfxPsi5_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxPsi5.h:548
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxPsi5_Rx_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxPsi5_PinMap.h:60
IfxPsi5_TimestampRegister_b
Timestamp register B.
Definition: IfxPsi5.h:201
IfxPsi5_DigitalInputFilterDepth_12
Digital input filter depth is 12.
Definition: IfxPsi5.h:127
IfxPsi5_InterruptServiceRequest_1
Definition: IfxPsi5.h:252
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
IfxPsi5_Trigger_3
trigger 3
Definition: IfxPsi5.h:212
IfxPsi5_getStatusRmi
IFX_INLINE uint32 IfxPsi5_getStatusRmi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RMI status register contents for a channel
Definition: IfxPsi5.h:486
IfxPsi5_MessagingBits_present
2 messaging bits
Definition: IfxPsi5.h:156
IfxScuWdt.h
SCU basic functionality.
IfxPsi5_AlternateInput
IfxPsi5_AlternateInput
MODULE_PSI5.IOCRx.ALTI(x = 0,1,2),Alternate input selection.
Definition: IfxPsi5.h:77
IfxPsi5_Trigger_4
trigger 4
Definition: IfxPsi5.h:213
IfxPsi5_enableAllChannels
IFX_INLINE void IfxPsi5_enableAllChannels(Ifx_PSI5 *psi5)
Enabling all channels and error flags.
Definition: IfxPsi5.h:566
IfxPsi5_DigitalInputFilterDepth
IfxPsi5_DigitalInputFilterDepth
MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth.
Definition: IfxPsi5.h:113
IfxPsi5_SuspendMode
IfxPsi5_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxPsi5.h:181
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxPsi5_DigitalInputFilterDepth_4
Digital input filter depth is 4.
Definition: IfxPsi5.h:119
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPsi5_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxPsi5_getSrcPointer(Ifx_PSI5 *psi5, IfxPsi5_InterruptServiceRequest intRequest)
Gives the pointer to the SRC register for respective PSI5 interrupt source.
Definition: IfxPsi5.h:559
IfxPsi5_TimestampRegister_a
Timestamp register A.
Definition: IfxPsi5.h:200
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxPsi5_DividerMode_off
divider mode is off
Definition: IfxPsi5.h:140
IfxPsi5_DividerMode_spb
divider mode is off
Definition: IfxPsi5.h:137
IfxPsi5_TriggerType_external
External trigger.
Definition: IfxPsi5.h:222
IfxPsi5_DigitalInputFilterDepth_2
Digital input filter depth is 2.
Definition: IfxPsi5.h:117
IfxPsi5_initTxPin
IFX_INLINE void IfxPsi5_initTxPin(const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxPsi5.h:517
IfxPsi5_SuspendMode_hard
Hard Suspend.
Definition: IfxPsi5.h:184
IfxPsi5_AlternateInput_1
Alternate Input 1.
Definition: IfxPsi5.h:80
IfxPsi5_InterruptStatusRegister_a
Definition: IfxPsi5.h:263
IfxPsi5_InterruptServiceRequest_3
Definition: IfxPsi5.h:254
IfxPsi5_ChannelId
IfxPsi5_ChannelId
Channel Id.
Definition: IfxPsi5_cfg.h:90
IfxPsi5_ReceiveDataRegisterTimestamp_frame
Start of frame based timestamp SPTSC to be stored in RDRHC.
Definition: IfxPsi5.h:164
IfxPsi5_FrameExpectation_notExpected
No frame is expected.
Definition: IfxPsi5.h:147
IfxPsi5_Trigger
IfxPsi5_Trigger
MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id.
Definition: IfxPsi5.h:207
IfxPsi5_CRCorParity
IfxPsi5_CRCorParity
MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection.
Definition: IfxPsi5.h:95
IfxPsi5_Slot_0
slot 0
Definition: IfxPsi5.h:171
IfxPsi5_enableModule
IFX_EXTERN void IfxPsi5_enableModule(Ifx_PSI5 *psi5)
Definition: IfxPsi5.c:81
IfxPsi5_DigitalInputFilterDepth_0
Digital input filter depth is 0.
Definition: IfxPsi5.h:115
IfxPsi5_Verbose
IfxPsi5_Verbose
MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode.
Definition: IfxPsi5.h:228
IfxPsi5_TimeBase_internal
Internal time stamp clock.
Definition: IfxPsi5.h:192
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxPsi5_ReceiverControlRegister
IfxPsi5_ReceiverControlRegister
Optiond for different Receive Control Registers(RCRA,RCRB,RCRC)
Definition: IfxPsi5.h:269
IfxPsi5_DigitalInputFilterDepth_9
Digital input filter depth is 9.
Definition: IfxPsi5.h:124
IfxPsi5_ReceiverControlRegister_c
Receiver Control Register C configures bit rate and time stamp sources.
Definition: IfxPsi5.h:273
IfxPsi5_DigitalInputFilterDepth_6
Digital input filter depth is 6.
Definition: IfxPsi5.h:121
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxPsi5_DigitalInputFilterDepth_8
Digital input filter depth is 8.
Definition: IfxPsi5.h:123
IfxPsi5_ClockType_fastClock_189
Fast 189 kHz clock.
Definition: IfxPsi5.h:107
IfxPsi5_TriggerType_periodic
Periodic trigger.
Definition: IfxPsi5.h:221
IfxPsi5_cfg.h
PSI5 on-chip implementation data.
IfxPsi5_ReceiverControlRegister_b
Receiver Control Register B configures up to 6 frame types in the up to 6 slots.
Definition: IfxPsi5.h:272
IfxPsi5_InterruptServiceRequest_0
Definition: IfxPsi5.h:251
IfxPsi5_InterruptServiceRequest_4
Definition: IfxPsi5.h:255
IfxPsi5_DigitalInputFilterDepth_14
Digital input filter depth is 14.
Definition: IfxPsi5.h:129
IfxPsi5_resetModule
IFX_EXTERN void IfxPsi5_resetModule(Ifx_PSI5 *psi5)
resets PSI5 kernel
Definition: IfxPsi5.c:63
IfxPsi5_FrameExpectation
IfxPsi5_FrameExpectation
MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control.
Definition: IfxPsi5.h:145
IfxPsi5_setRxInput
IFX_INLINE void IfxPsi5_setRxInput(Ifx_PSI5_CH *psi5Ch, IfxPsi5_AlternateInput alternateInput)
Sets the alternate RX input.
Definition: IfxPsi5.h:527
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPsi5_initRxPin
IFX_INLINE void IfxPsi5_initRxPin(const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxPsi5.h:504
IfxPsi5_DigitalInputFilterDepth_3
Digital input filter depth is 3.
Definition: IfxPsi5.h:118
IfxPsi5_setFractionalDivider
IFX_INLINE void IfxPsi5_setFractionalDivider(Ifx_PSI5 *psi5, IfxPsi5_FractionalDividerRegister fcd, uint32 value)
Definition: IfxPsi5.h:575
IfxPsi5_InterruptServiceRequest_6
Definition: IfxPsi5.h:257
IfxPsi5_MessagingBits
IfxPsi5_MessagingBits
MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence.
Definition: IfxPsi5.h:153
IfxPsi5_TimeBase_external
External GTM inputs.
Definition: IfxPsi5.h:193
IfxPsi5_FractionalDividerRegister
IfxPsi5_FractionalDividerRegister
Options for choosing different Fractional Divider Registers.
Definition: IfxPsi5.h:238
IfxPsi5_Slot_3
slot 3
Definition: IfxPsi5.h:174
IfxPsi5_disableModule
IFX_EXTERN void IfxPsi5_disableModule(Ifx_PSI5 *psi5)
Disable PSI5 kernel.
Definition: IfxPsi5.c:54
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxPsi5_DividerMode_fractional
divider mode is fractional
Definition: IfxPsi5.h:139
IfxPsi5_ClockType
IfxPsi5_ClockType
Clock type.
Definition: IfxPsi5.h:103
IfxPsi5_ClockType_timeStamp
Timestamp clock.
Definition: IfxPsi5.h:108
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxPsi5_DigitalInputFilterDepth_15
Digital input filter depth is 15.
Definition: IfxPsi5.h:130
IfxPsi5_InterruptServiceRequest_5
Definition: IfxPsi5.h:256
IfxPsi5_DigitalInputFilterDepth_7
Digital input filter depth is 7.
Definition: IfxPsi5.h:122
IfxPsi5_FractionalDividerRegister_timestamp
The PSI5 Module Time Stamp Predivider Register contains the pre-divider that defines the time resolut...
Definition: IfxPsi5.h:245
IfxPsi5_TriggerType
IfxPsi5_TriggerType
Trigger type.
Definition: IfxPsi5.h:219
IfxPsi5_BaudRate
IfxPsi5_BaudRate
MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection.
Definition: IfxPsi5.h:87
IfxPsi5_Slot_5
slot 5
Definition: IfxPsi5.h:176
IfxPsi5_DigitalInputFilterDepth_13
Digital input filter depth is 13.
Definition: IfxPsi5.h:128
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxPsi5_InterruptServiceRequest
IfxPsi5_InterruptServiceRequest
Definition: IfxPsi5.h:249
IfxPsi5_DigitalInputFilterDepth_11
Digital input filter depth is 11.
Definition: IfxPsi5.h:126
IfxPsi5_ReceiveDataRegisterTimestamp_pulse
Pulse based timestamp SPTSC to be stored in RDRHC.
Definition: IfxPsi5.h:163
IfxPsi5_getStatusTei
IFX_INLINE uint32 IfxPsi5_getStatusTei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the TEI status register contents for a channel
Definition: IfxPsi5.h:498
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxPsi5_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5_PinMap.h:65
IfxPsi5_Verbose_off
Verbose mode is turned off.
Definition: IfxPsi5.h:230
IfxPsi5_getStatusRsi
IFX_INLINE uint32 IfxPsi5_getStatusRsi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RSI status register contents for a channel
Definition: IfxPsi5.h:492
IfxPsi5_InterruptStatusRegister_b
Definition: IfxPsi5.h:264
IfxPsi5_Rx_In::module
Ifx_PSI5 * module
Base address.
Definition: IfxPsi5_PinMap.h:58
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxPsi5_getStatusMei
IFX_INLINE uint32 IfxPsi5_getStatusMei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the MEI status register contents for a channel
Definition: IfxPsi5.h:462
IfxPsi5_ClockType_fracDiv
Fractional Divide clock.
Definition: IfxPsi5.h:105
IfxPsi5_Slot
IfxPsi5_Slot
MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id.
Definition: IfxPsi5.h:169
IfxPsi5_ClockType_slowClock_125
Slow 125 kHz clock.
Definition: IfxPsi5.h:106
IfxPsi5_Tx_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxPsi5_PinMap.h:70
IfxPsi5_TriggerType_bypass
Bypassed trigger.
Definition: IfxPsi5.h:223
IfxPsi5_Verbose_on
Verbose mode is turned on.
Definition: IfxPsi5.h:231


iLLD_TC26B: IfxPsi5_PinMap.c Source File

  • _PinMap
IfxPsi5_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_PinMap.c
3 * \brief PSI5 I/O map
4 * \ingroup IfxLld_Psi5
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxPsi5_PinMap.h"
44
45 IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_a};
46 IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 3}, Ifx_RxSel_b};
47 IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 1}, Ifx_RxSel_c};
48 IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 3}, Ifx_RxSel_a};
49 IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 5}, Ifx_RxSel_b};
50 IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 3}, Ifx_RxSel_c};
51 IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 5}, Ifx_RxSel_a};
52 IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 7}, Ifx_RxSel_b};
53 IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 5}, Ifx_RxSel_c};
54 IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt4};
55 IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt4};
56 IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt4};
57 IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt4};
58 IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt4};
59 IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt4};
60 IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt4};
61 IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt4};
62 IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt4};
63
64
65 const IfxPsi5_Rx_In *IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS] = {
66 {
67 {
68 &IfxPsi5_RX0A_P00_1_IN,
69 &IfxPsi5_RX0B_P02_3_IN,
70 &IfxPsi5_RX0C_P33_1_IN
71 },
72 {
73 &IfxPsi5_RX1A_P00_3_IN,
74 &IfxPsi5_RX1B_P02_5_IN,
75 &IfxPsi5_RX1C_P33_3_IN
76 },
77 {
78 &IfxPsi5_RX2A_P00_5_IN,
79 &IfxPsi5_RX2B_P02_7_IN,
80 &IfxPsi5_RX2C_P33_5_IN
81 }
82 }
83 };
84
85 const IfxPsi5_Tx_Out *IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS] = {
86 {
87 {
88 &IfxPsi5_TX0_P00_2_OUT,
89 &IfxPsi5_TX0_P02_2_OUT,
90 &IfxPsi5_TX0_P33_2_OUT
91 },
92 {
93 &IfxPsi5_TX1_P00_4_OUT,
94 &IfxPsi5_TX1_P02_6_OUT,
95 &IfxPsi5_TX1_P33_4_OUT
96 },
97 {
98 &IfxPsi5_TX2_P00_6_OUT,
99 &IfxPsi5_TX2_P02_8_OUT,
100 &IfxPsi5_TX2_P33_6_OUT
101 }
102 }
103 };
IfxPsi5_Rx_In_pinTable
const IfxPsi5_Rx_In * IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
Definition: IfxPsi5_PinMap.c:65
IfxPsi5_PinMap.h
PSI5 I/O map.
IfxPsi5_ChannelId_0
Specifies PSI5 channel 0.
Definition: IfxPsi5_cfg.h:93
IfxPsi5_RX1C_P33_3_IN
IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN
Definition: IfxPsi5_PinMap.c:50
IfxPsi5_TX0_P02_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT
Definition: IfxPsi5_PinMap.c:55
IFXPSI5_PINMAP_NUM_CHANNELS
#define IFXPSI5_PINMAP_NUM_CHANNELS
Definition: IfxPsi5_PinMap.h:94
IfxPsi5_TX0_P33_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT
Definition: IfxPsi5_PinMap.c:56
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxPsi5_Rx_In
RX pin mapping structure.
Definition: IfxPsi5_PinMap.h:56
IfxPsi5_RX1A_P00_3_IN
IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN
Definition: IfxPsi5_PinMap.c:48
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxPsi5_RX0B_P02_3_IN
IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN
Definition: IfxPsi5_PinMap.c:46
IfxPsi5_TX1_P33_4_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT
Definition: IfxPsi5_PinMap.c:59
IfxPsi5_ChannelId_2
Specifies PSI5 channel 2.
Definition: IfxPsi5_cfg.h:95
IfxPsi5_TX2_P02_8_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT
Definition: IfxPsi5_PinMap.c:61
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS
#define IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxPsi5_PinMap.h:96
IfxPsi5_TX1_P00_4_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT
Definition: IfxPsi5_PinMap.c:57
IfxPsi5_RX0A_P00_1_IN
IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN
Definition: IfxPsi5_PinMap.c:45
IfxPsi5_TX2_P00_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT
Definition: IfxPsi5_PinMap.c:60
IfxPsi5_RX0C_P33_1_IN
IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN
Definition: IfxPsi5_PinMap.c:47
IfxPsi5_TX0_P00_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT
Definition: IfxPsi5_PinMap.c:54
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:123
IfxPsi5_RX2B_P02_7_IN
IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN
Definition: IfxPsi5_PinMap.c:52
IFXPSI5_PINMAP_RX_IN_NUM_ITEMS
#define IFXPSI5_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxPsi5_PinMap.h:95
IFXPSI5_PINMAP_NUM_MODULES
#define IFXPSI5_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPsi5_PinMap.h:93
IfxPsi5_RX2A_P00_5_IN
IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN
Definition: IfxPsi5_PinMap.c:51
IfxPsi5_ChannelId_1
Specifies PSI5 channel 1.
Definition: IfxPsi5_cfg.h:94
IfxPsi5_RX1B_P02_5_IN
IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN
Definition: IfxPsi5_PinMap.c:49
IfxPsi5_TX1_P02_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT
Definition: IfxPsi5_PinMap.c:58
IfxPsi5_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5_PinMap.h:65
IfxPsi5_RX2C_P33_5_IN
IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN
Definition: IfxPsi5_PinMap.c:53
IfxPsi5_TX2_P33_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT
Definition: IfxPsi5_PinMap.c:62
IfxPsi5_Tx_Out_pinTable
const IfxPsi5_Tx_Out * IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]
Definition: IfxPsi5_PinMap.c:85


iLLD_TC26B: IfxPsi5_PinMap.h Source File

  • _PinMap
IfxPsi5_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_PinMap.h
3 * \brief PSI5 I/O map
4 * \ingroup IfxLld_Psi5
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Psi5_pinmap PSI5 Pin Mapping
42 * \ingroup IfxLld_Psi5
43 */
44
45 #ifndef IFXPSI5_PINMAP_H
46 #define IFXPSI5_PINMAP_H
47
48 #include <IfxPsi5_reg.h>
49 #include <_Impl/IfxPsi5_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Psi5_pinmap
53 * \{ */
54
55 /** \brief RX pin mapping structure */
56 typedef const struct
57 {
58 Ifx_PSI5* module; /**< \brief Base address */
59 IfxPsi5_ChannelId channelId; /**< \brief Channel ID */
60 IfxPort_Pin pin; /**< \brief Port pin */
61 Ifx_RxSel select; /**< \brief Input multiplexer value */
62 } IfxPsi5_Rx_In;
63
64 /** \brief TX pin mapping structure */
65 typedef const struct
66 {
67 Ifx_PSI5* module; /**< \brief Base address */
68 IfxPsi5_ChannelId channelId; /**< \brief Channel ID */
69 IfxPort_Pin pin; /**< \brief Port pin */
70 IfxPort_OutputIdx select; /**< \brief Port control code */
71 } IfxPsi5_Tx_Out;
72
73 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN; /**< \brief PSI5_RX0A: PSI5 input */
74 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN; /**< \brief PSI5_RX0B: PSI5 input */
75 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN; /**< \brief PSI5_RX0C: PSI5 input */
76 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN; /**< \brief PSI5_RX1A: PSI5 input */
77 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN; /**< \brief PSI5_RX1B: PSI5 input */
78 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN; /**< \brief PSI5_RX1C: PSI5 input */
79 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN; /**< \brief PSI5_RX2A: PSI5 input */
80 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN; /**< \brief PSI5_RX2B: PSI5 input */
81 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN; /**< \brief PSI5_RX2C: PSI5 input */
82 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT; /**< \brief PSI5_TX0: PSI5 output */
83 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT; /**< \brief PSI5_TX0: PSI5 output */
84 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT; /**< \brief PSI5_TX0: PSI5 output */
85 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT; /**< \brief PSI5_TX1: PSI5 output */
86 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT; /**< \brief PSI5_TX1: PSI5 output */
87 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT; /**< \brief PSI5_TX1: PSI5 output */
88 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT; /**< \brief PSI5_TX2: PSI5 output */
89 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT; /**< \brief PSI5_TX2: PSI5 output */
90 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT; /**< \brief PSI5_TX2: PSI5 output */
91
92 /** \brief Table dimensions */
93 #define IFXPSI5_PINMAP_NUM_MODULES 1
94 #define IFXPSI5_PINMAP_NUM_CHANNELS 3
95 #define IFXPSI5_PINMAP_RX_IN_NUM_ITEMS 3
96 #define IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS 3
97
98
99 /** \brief IfxPsi5_Rx_In table */
100 IFX_EXTERN const IfxPsi5_Rx_In *IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS];
101
102 /** \brief IfxPsi5_Tx_Out table */
103 IFX_EXTERN const IfxPsi5_Tx_Out *IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS];
104
105 /** \} */
106
107 #endif /* IFXPSI5_PINMAP_H */
IfxPsi5_Rx_In_pinTable
IFX_EXTERN const IfxPsi5_Rx_In * IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5_Rx_In table.
Definition: IfxPsi5_PinMap.h:100
IfxPsi5_RX2B_P02_7_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN
PSI5_RX2B: PSI5 input.
Definition: IfxPsi5_PinMap.h:80
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IFXPSI5_PINMAP_NUM_CHANNELS
#define IFXPSI5_PINMAP_NUM_CHANNELS
Definition: IfxPsi5_PinMap.h:94
IfxPsi5_Rx_In::channelId
IfxPsi5_ChannelId channelId
Channel ID.
Definition: IfxPsi5_PinMap.h:59
IfxPsi5_Rx_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxPsi5_PinMap.h:61
IfxPsi5_RX2A_P00_5_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN
PSI5_RX2A: PSI5 input.
Definition: IfxPsi5_PinMap.h:79
IfxPsi5_RX1A_P00_3_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN
PSI5_RX1A: PSI5 input.
Definition: IfxPsi5_PinMap.h:76
IfxPsi5_Rx_In
RX pin mapping structure.
Definition: IfxPsi5_PinMap.h:56
IfxPsi5_Rx_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxPsi5_PinMap.h:60
IfxPsi5_RX1C_P33_3_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN
PSI5_RX1C: PSI5 input.
Definition: IfxPsi5_PinMap.h:78
IfxPsi5_TX0_P02_2_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT
PSI5_TX0: PSI5 output.
Definition: IfxPsi5_PinMap.h:83
IfxPsi5_TX2_P02_8_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT
PSI5_TX2: PSI5 output.
Definition: IfxPsi5_PinMap.h:89
IfxPsi5_TX1_P33_4_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT
PSI5_TX1: PSI5 output.
Definition: IfxPsi5_PinMap.h:87
IfxPsi5_RX2C_P33_5_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN
PSI5_RX2C: PSI5 input.
Definition: IfxPsi5_PinMap.h:81
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPsi5_TX1_P00_4_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT
PSI5_TX1: PSI5 output.
Definition: IfxPsi5_PinMap.h:85
IfxPsi5_RX0B_P02_3_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN
PSI5_RX0B: PSI5 input.
Definition: IfxPsi5_PinMap.h:74
IfxPsi5_TX0_P00_2_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT
PSI5_TX0: PSI5 output.
Definition: IfxPsi5_PinMap.h:82
IfxPsi5_ChannelId
IfxPsi5_ChannelId
Channel Id.
Definition: IfxPsi5_cfg.h:90
IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS
#define IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxPsi5_PinMap.h:96
IfxPsi5_TX1_P02_6_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT
PSI5_TX1: PSI5 output.
Definition: IfxPsi5_PinMap.h:86
IfxPsi5_TX2_P33_6_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT
PSI5_TX2: PSI5 output.
Definition: IfxPsi5_PinMap.h:90
IfxPsi5_TX2_P00_6_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT
PSI5_TX2: PSI5 output.
Definition: IfxPsi5_PinMap.h:88
IfxPsi5_cfg.h
PSI5 on-chip implementation data.
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxPsi5_RX1B_P02_5_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN
PSI5_RX1B: PSI5 input.
Definition: IfxPsi5_PinMap.h:77
IfxPsi5_TX0_P33_2_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT
PSI5_TX0: PSI5 output.
Definition: IfxPsi5_PinMap.h:84
IfxPsi5_RX0A_P00_1_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN
PSI5_RX0A: PSI5 input.
Definition: IfxPsi5_PinMap.h:73
IfxPsi5_RX0C_P33_1_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN
PSI5_RX0C: PSI5 input.
Definition: IfxPsi5_PinMap.h:75
IFXPSI5_PINMAP_RX_IN_NUM_ITEMS
#define IFXPSI5_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxPsi5_PinMap.h:95
IFXPSI5_PINMAP_NUM_MODULES
#define IFXPSI5_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPsi5_PinMap.h:93
IfxPsi5_Tx_Out_pinTable
IFX_EXTERN const IfxPsi5_Tx_Out * IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5_Tx_Out table.
Definition: IfxPsi5_PinMap.h:103
IfxPsi5_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5_PinMap.h:65
IfxPsi5_Rx_In::module
Ifx_PSI5 * module
Base address.
Definition: IfxPsi5_PinMap.h:58
IfxPsi5_Tx_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxPsi5_PinMap.h:70
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxPsi5_Psi5.c Source File

  • Psi5
  • Psi5
IfxPsi5_Psi5.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_Psi5.c
3 * \brief PSI5 PSI5 details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxPsi5_Psi5.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxPsi5_Psi5_deInitModule(IfxPsi5_Psi5 *psi5)
55 {
56 Ifx_PSI5 *psi5SFR = psi5->psi5;
57
58 IfxPsi5_Psi5_resetModule(psi5SFR);
59 }
60
61
62 void IfxPsi5_Psi5_enableModule(Ifx_PSI5 *psi5)
63 {
64 psi5->CLC.U = 0x00000000;
65 }
66
67
68 uint32 IfxPsi5_Psi5_getFracDivClock(Ifx_PSI5 *psi5)
69 {
70 uint32 result;
71 uint32 fPsi5 = IfxScuCcu_getSpbFrequency();
72
73 switch (psi5->FDR.B.DM)
74 {
75 case IfxPsi5_DividerMode_spb:
76 result = fPsi5;
77 break;
78 case IfxPsi5_DividerMode_normal:
79 result = fPsi5 / (IFXPSI5_STEP_RANGE - psi5->FDR.B.STEP);
80 break;
81 case IfxPsi5_DividerMode_fractional:
82 result = (fPsi5 * IFXPSI5_STEP_RANGE) / psi5->FDR.B.STEP;
83 break;
84 case IfxPsi5_DividerMode_off:
85 result = 0;
86 break;
87 default:
88 result = 0;
89 }
90
91 return result;
92 }
93
94
95 boolean IfxPsi5_Psi5_initChannel(IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
96 {
97 uint32 wdtIdx;
98 boolean status = TRUE;
99
100 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
101
102 IfxScuWdt_clearCpuEndinit(passwd);
103
104 Ifx_PSI5 *psi5 = config->module->psi5;
105 Ifx_PSI5_CH *psi5Ch = &psi5->CH[config->channelId];
106 channel->channel = psi5Ch;
107 channel->module = (IfxPsi5_Psi5 *)config->module;
108 channel->channelId = config->channelId;
109
110 Ifx_PSI5_CH_PGC tempPGC;
111 tempPGC.B.PLEN = config->pulseGeneration.pulseLength;
112 tempPGC.B.DEL = config->pulseGeneration.delayLength;
113 tempPGC.B.TBS = config->pulseGeneration.timeBaseSelect;
114 tempPGC.B.ETB = config->pulseGeneration.externalTimeBaseSelect;
115 tempPGC.B.ETS = config->pulseGeneration.externalTriggerSelect;
116 tempPGC.B.BOT = config->pulseGeneration.blankoutTime;
117
118 switch (config->pulseGeneration.periodicOrExternalOrBypass)
119 {
120 case IfxPsi5_TriggerType_periodic:
121 tempPGC.B.PTE = TRUE;
122 tempPGC.B.ETE = FALSE;
123 tempPGC.B.BYP = FALSE;
124 break;
125
126 case IfxPsi5_TriggerType_external:
127 tempPGC.B.PTE = FALSE;
128 tempPGC.B.ETE = TRUE;
129 tempPGC.B.BYP = FALSE;
130 break;
131
132 case IfxPsi5_TriggerType_bypass:
133 tempPGC.B.PTE = FALSE;
134 tempPGC.B.ETE = FALSE;
135 tempPGC.B.BYP = TRUE;
136 break;
137 }
138
139 psi5Ch->PGC.U = tempPGC.U;
140
141 Ifx_PSI5_CH_CTV tempCTV;
142 tempCTV.B.CTV = config->channelTrigger.channelTriggerValue;
143 tempCTV.B.CTC = config->channelTrigger.channelTriggerCounter;
144 psi5Ch->CTV.U = tempCTV.U;
145
146 for (wdtIdx = 0; wdtIdx < IFXPSI5_NUM_WDTS; wdtIdx++)
147 {
148 psi5Ch->WDT[wdtIdx].U = config->watchdogTimerLimit[wdtIdx];
149 }
150
151 Ifx_PSI5_CH_RCRA tempRCRA;
152 tempRCRA.B.PDL0 = config->receiveControl.payloadLength[0];
153 tempRCRA.B.PDL1 = config->receiveControl.payloadLength[1];
154 tempRCRA.B.PDL2 = config->receiveControl.payloadLength[2];
155 tempRCRA.B.PDL3 = config->receiveControl.payloadLength[3];
156 tempRCRA.B.PDL4 = config->receiveControl.payloadLength[4];
157 tempRCRA.B.PDL5 = config->receiveControl.payloadLength[5];
158 tempRCRA.B.ASYN = config->receiveControl.asynchronousModeSelected;
159 tempRCRA.B.AVBS = config->receiveControl.verboseForAsynchronousMode;
160 psi5Ch->RCRA.U = tempRCRA.U;
161
162 Ifx_PSI5_CH_RCRB tempRCRB;
163 tempRCRB.B.MSG0 = config->receiveControl.messagingBitsPresence[0];
164 tempRCRB.B.MSG1 = config->receiveControl.messagingBitsPresence[1];
165 tempRCRB.B.MSG2 = config->receiveControl.messagingBitsPresence[2];
166 tempRCRB.B.MSG3 = config->receiveControl.messagingBitsPresence[3];
167 tempRCRB.B.MSG4 = config->receiveControl.messagingBitsPresence[4];
168 tempRCRB.B.MSG5 = config->receiveControl.messagingBitsPresence[5];
169 tempRCRB.B.CRC0 = config->receiveControl.crcOrParity[0];
170 tempRCRB.B.CRC1 = config->receiveControl.crcOrParity[1];
171 tempRCRB.B.CRC2 = config->receiveControl.crcOrParity[2];
172 tempRCRB.B.CRC3 = config->receiveControl.crcOrParity[3];
173 tempRCRB.B.CRC4 = config->receiveControl.crcOrParity[4];
174 tempRCRB.B.CRC5 = config->receiveControl.crcOrParity[5];
175 tempRCRB.B.FEC0 = config->receiveControl.frameExpectation[0];
176 tempRCRB.B.FEC1 = config->receiveControl.frameExpectation[1];
177 tempRCRB.B.FEC2 = config->receiveControl.frameExpectation[2];
178 tempRCRB.B.FEC3 = config->receiveControl.frameExpectation[3];
179 tempRCRB.B.FEC4 = config->receiveControl.frameExpectation[4];
180 tempRCRB.B.FEC5 = config->receiveControl.frameExpectation[5];
181 tempRCRB.B.VBS0 = config->receiveControl.verbose[0];
182 tempRCRB.B.VBS1 = config->receiveControl.verbose[1];
183 tempRCRB.B.VBS2 = config->receiveControl.verbose[2];
184 tempRCRB.B.VBS3 = config->receiveControl.verbose[3];
185 tempRCRB.B.VBS4 = config->receiveControl.verbose[4];
186 tempRCRB.B.VBS5 = config->receiveControl.verbose[5];
187 psi5Ch->RCRB.U = tempRCRB.U;
188
189 Ifx_PSI5_CH_RCRC tempRCRC;
190 tempRCRC.B.BRS = config->receiveControl.baudrateSelect;
191 tempRCRC.B.TSP = config->receiveControl.pulseTimestampSelect;
192 tempRCRC.B.TSF = config->receiveControl.frameTimestampSelect;
193 tempRCRC.B.TSR = config->receiveControl.receiveDataRegisterTimestamp;
194 psi5Ch->RCRC.U = tempRCRC.U;
195
196 Ifx_PSI5_RFC tempRFC;
197 tempRFC.B.FWL = config->receiveControl.fifoWarningLevel;
198 psi5->RFC[config->channelId].U = tempRFC.U;
199
200 Ifx_PSI5_CH_SCR tempSCR;
201 tempSCR.B.PLL = config->sendControl.payloadLength;
202 tempSCR.B.EPS = config->sendControl.enhancedProtocolSelected;
203 tempSCR.B.BSC = config->sendControl.bitStuffingEnabled;
204 tempSCR.B.SSL = config->sendControl.ssrPayloadLength;
205 tempSCR.B.SOL = config->sendControl.sorPayloadLength;
206 tempSCR.B.CRC = config->sendControl.crcGenerationEnabled;
207 tempSCR.B.STA = config->sendControl.startSequenceGenerationEnabled;
208 tempSCR.B.INH = config->sendControl.inhibitingAutomaticTransferEnabled;
209 psi5Ch->SCR.U = tempSCR.U;
210
211 Ifx_PSI5_CH_IOCR tempIOCR;
212 tempIOCR.B.DEPTH = config->inputOutputControl.digitalInputFilterDepth;
213 tempIOCR.B.OIE = config->inputOutputControl.outputInverterEnabled;
214 tempIOCR.B.IIE = config->inputOutputControl.inputInverterEnabled;
215 psi5Ch->IOCR.U = tempIOCR.U;
216
217 psi5->GCR.U |=
218 ((IFXPSI5_ENABLE_CHANNELTRIGGER << config->channelId) | (IFXPSI5_ENABLE_CHANNEL << config->channelId));
219
220 IfxScuWdt_setCpuEndinit(passwd);
221
222 const IfxPsi5_Psi5_PinsConfig *pins = config->pinsConfig;
223
224 if (pins != NULL_PTR)
225 {
226 const IfxPsi5_Rx_In *rx = pins->in;
227
228 if (rx != NULL_PTR)
229 {
230 IfxPsi5_initRxPin(rx, pins->inMode, pins->pinDriver);
231 }
232
233 const IfxPsi5_Tx_Out *tx = pins->out;
234
235 if (tx != NULL_PTR)
236 {
237 IfxPsi5_initTxPin(tx, pins->outMode, pins->pinDriver);
238 }
239 }
240
241 return status;
242 }
243
244
245 void IfxPsi5_Psi5_initChannelConfig(IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
246 {
247 IfxPsi5_Psi5_ChannelConfig IfxPsi5_Psi5_defaultChannelConfig = {
248 .channelId = IfxPsi5_ChannelId_0,
249 .module = NULL_PTR,
250 .pulseGeneration = {
251 .pulseLength = 5,
252 .delayLength = 1,
253 .timeBaseSelect = IfxPsi5_TimeBase_internal,
254 .externalTimeBaseSelect = IfxPsi5_Trigger_0,
255 .periodicOrExternalOrBypass = IfxPsi5_TriggerType_periodic,
256 .externalTriggerSelect = IfxPsi5_Trigger_0,
257 .blankoutTime = 5
258 },
259 .channelTrigger = {
260 .channelTriggerValue = 0x150,
261 .channelTriggerCounter = 0x130
262 },
263 .watchdogTimerLimit[0] = 0x0,
264 .watchdogTimerLimit[1] = 0x0,
265 .watchdogTimerLimit[2] = 0x0,
266 .watchdogTimerLimit[3] = 0x0,
267 .watchdogTimerLimit[4] = 0x0,
268 .watchdogTimerLimit[5] = 0x0,
269 .watchdogTimerLimit[6] = 0x0,
270 .receiveControl = {
271 .payloadLength[0] = 8,
272 .payloadLength[1] = 8,
273 .payloadLength[2] = 8,
274 .payloadLength[3] = 8,
275 .payloadLength[4] = 8,
276 .payloadLength[5] = 8,
277 .asynchronousModeSelected = FALSE,
278 .verboseForAsynchronousMode = IfxPsi5_Verbose_off,
279 .messagingBitsPresence[0] = IfxPsi5_MessagingBits_absent,
280 .messagingBitsPresence[1] = IfxPsi5_MessagingBits_absent,
281 .messagingBitsPresence[2] = IfxPsi5_MessagingBits_absent,
282 .messagingBitsPresence[3] = IfxPsi5_MessagingBits_absent,
283 .messagingBitsPresence[4] = IfxPsi5_MessagingBits_absent,
284 .messagingBitsPresence[5] = IfxPsi5_MessagingBits_absent,
285 .crcOrParity[0] = IfxPsi5_CRCorParity_parity,
286 .crcOrParity[1] = IfxPsi5_CRCorParity_parity,
287 .crcOrParity[2] = IfxPsi5_CRCorParity_parity,
288 .crcOrParity[3] = IfxPsi5_CRCorParity_parity,
289 .crcOrParity[4] = IfxPsi5_CRCorParity_parity,
290 .crcOrParity[5] = IfxPsi5_CRCorParity_parity,
291 .frameExpectation[0] = IfxPsi5_FrameExpectation_notExpected,
292 .frameExpectation[1] = IfxPsi5_FrameExpectation_notExpected,
293 .frameExpectation[2] = IfxPsi5_FrameExpectation_notExpected,
294 .frameExpectation[3] = IfxPsi5_FrameExpectation_notExpected,
295 .frameExpectation[4] = IfxPsi5_FrameExpectation_notExpected,
296 .frameExpectation[5] = IfxPsi5_FrameExpectation_notExpected,
297 .verbose[0] = IfxPsi5_Verbose_off,
298 .verbose[1] = IfxPsi5_Verbose_off,
299 .verbose[2] = IfxPsi5_Verbose_off,
300 .verbose[3] = IfxPsi5_Verbose_off,
301 .verbose[4] = IfxPsi5_Verbose_off,
302 .verbose[5] = IfxPsi5_Verbose_off,
303 .baudrateSelect = IfxPsi5_BaudRate_125,
304 .pulseTimestampSelect = IfxPsi5_TimestampRegister_a,
305 .frameTimestampSelect = IfxPsi5_TimestampRegister_a,
306 .receiveDataRegisterTimestamp = IfxPsi5_ReceiveDataRegisterTimestamp_pulse,
307 .fifoWarningLevel = 16
308 },
309 .sendControl = {
310 .payloadLength = 32,
311 .enhancedProtocolSelected = FALSE,
312 .bitStuffingEnabled = FALSE,
313 .ssrPayloadLength = 32,
314 .sorPayloadLength = 32,
315 .crcGenerationEnabled = FALSE,
316 .startSequenceGenerationEnabled = FALSE,
317 .inhibitingAutomaticTransferEnabled = FALSE
318 },
319 .inputOutputControl = {
320 .digitalInputFilterDepth = IfxPsi5_DigitalInputFilterDepth_0,
321 .outputInverterEnabled = FALSE,
322 .inputInverterEnabled = FALSE
323 }
324 };
325 *config = IfxPsi5_Psi5_defaultChannelConfig;
326 config->module = psi5;
327 }
328
329
330 boolean IfxPsi5_Psi5_initModule(IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
331 {
332 boolean status = TRUE;
333 Ifx_PSI5 *psi5SFR = config->psi5;
334
335 psi5->psi5 = psi5SFR;
336
337 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
338 IfxScuWdt_clearCpuEndinit(passwd);
339 IfxPsi5_Psi5_enableModule(psi5SFR);
340
341 if (IfxPsi5_Psi5_initializeClock(psi5SFR, &config->fracDiv) == 0)
342 {
343 status = FALSE;
344
345 return status;
346 }
347 else
348 {}
349
350 if (IfxPsi5_Psi5_initializeClock(psi5SFR, &config->slowClock) == 0)
351 {
352 status = FALSE;
353
354 return status;
355 }
356 else
357 {}
358
359 if (IfxPsi5_Psi5_initializeClock(psi5SFR, &config->fastClock) == 0)
360 {
361 status = FALSE;
362
363 return status;
364 }
365 else
366 {}
367
368 if (IfxPsi5_Psi5_initializeClock(psi5SFR, &config->timestampClock) == 0)
369 {
370 status = FALSE;
371
372 return status;
373 }
374 else
375 {}
376
377 IfxScuWdt_setCpuEndinit(passwd);
378
379 return status;
380 }
381
382
383 void IfxPsi5_Psi5_initModuleConfig(IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
384 {
385 uint32 spbFrequency = IfxScuCcu_getSpbFrequency();
386
387 config->psi5 = psi5;
388 config->fracDiv.frequency = spbFrequency;
389 config->fracDiv.mode = IfxPsi5_DividerMode_normal;
390 config->fracDiv.type = IfxPsi5_ClockType_fracDiv;
391 config->slowClock.frequency = IFXPSI5_DEFAULT_SLOWCLOCK_FREQ;
392 config->slowClock.mode = IfxPsi5_DividerMode_fractional;
393 config->slowClock.type = IfxPsi5_ClockType_slowClock_125;
394 config->fastClock.frequency = IFXPSI5_DEFAULT_FASTCLOCK_FREQ;
395 config->fastClock.mode = IfxPsi5_DividerMode_fractional;
396 config->fastClock.type = IfxPsi5_ClockType_fastClock_189;
397 config->timestampClock.frequency = IFXPSI5_DEFAULT_TIMESTAMP_FREQ;
398 config->timestampClock.mode = IfxPsi5_DividerMode_normal;
399 config->timestampClock.type = IfxPsi5_ClockType_timeStamp;
400 config->timestampCounterA.externalTimeBaseSelect = IfxPsi5_Trigger_0;
401 config->timestampCounterA.timeBaseSelect = IfxPsi5_TimeBase_internal;
402 config->timestampCounterB.externalTimeBaseSelect = IfxPsi5_Trigger_0;
403 config->timestampCounterB.timeBaseSelect = IfxPsi5_TimeBase_internal;
404 config->timestampCounterC.externalTimeBaseSelect = IfxPsi5_Trigger_0;
405 config->timestampCounterC.timeBaseSelect = IfxPsi5_TimeBase_internal;
406 }
407
408
409 uint32 IfxPsi5_Psi5_initializeClock(Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
410 {
411 uint64 step = 0;
412 uint32 result = 0;
413 IfxPsi5_DividerMode divMode = clock->mode;
414 IfxPsi5_ClockType clockType = clock->type;
415 uint32 clockFrequency = clock->frequency;
416 uint32 fInput;
417 Ifx_PSI5_FDR tempFDR, tempFDRL, tempFDRH, tempFDRT;
418
419 if (clockType == IfxPsi5_ClockType_fracDiv)
420 {
421 fInput = IfxScuCcu_getSpbFrequency();
422 }
423 else
424 {
425 fInput = IfxPsi5_Psi5_getFracDivClock(psi5);
426
427 if (fInput == 0)
428 {
429 result = 0;
430
431 return result;
432 }
433 else
434 {}
435 }
436
437 switch (divMode)
438 {
439 case IfxPsi5_DividerMode_normal:
440 step = IFXPSI5_STEP_RANGE - (fInput / clockFrequency);
441
442 if (step > (IFXPSI5_STEP_RANGE - 1))
443 {
444 step = IFXPSI5_STEP_RANGE - 1;
445 }
446 else
447 {
448 /* do nothing */
449 }
450
451 result = (uint32)(fInput / (IFXPSI5_STEP_RANGE - step));
452 break;
453
454 case IfxPsi5_DividerMode_fractional:
455 step = (uint64)((uint64)clockFrequency * IFXPSI5_STEP_RANGE) / fInput;
456
457 if (step > (IFXPSI5_STEP_RANGE - 1))
458 {
459 step = IFXPSI5_STEP_RANGE - 1;
460 }
461 else
462 {
463 /* do nothing */
464 }
465
466 result = (uint32)((uint64)((uint64)fInput * step)) / IFXPSI5_STEP_RANGE;
467 break;
468
469 case IfxPsi5_DividerMode_off:
470 default:
471 step = 0;
472 result = 0;
473 break;
474 }
475
476 if (result != 0)
477 {
478 switch (clockType)
479 {
480 case IfxPsi5_ClockType_fracDiv:
481 tempFDR.U = 0;
482 tempFDR.B.DM = divMode;
483 tempFDR.B.STEP = (uint32)step;
484 psi5->FDR.U = tempFDR.U;
485 break;
486
487 case IfxPsi5_ClockType_slowClock_125:
488 tempFDRL.U = 0;
489 tempFDRL.B.DM = divMode;
490 tempFDRL.B.STEP = (uint32)step;
491 psi5->FDRL.U = tempFDRL.U;
492 break;
493
494 case IfxPsi5_ClockType_fastClock_189:
495 tempFDRH.U = 0;
496 tempFDRH.B.DM = divMode;
497 tempFDRH.B.STEP = (uint32)step;
498 psi5->FDRH.U = tempFDRH.U;
499 break;
500
501 case IfxPsi5_ClockType_timeStamp:
502 tempFDRT.U = 0;
503 tempFDRT.B.DM = divMode;
504 tempFDRT.B.STEP = (uint32)step;
505 psi5->FDRT.U = tempFDRT.U;
506 break;
507 }
508 }
509
510 return result;
511 }
512
513
514 boolean IfxPsi5_Psi5_readChannelFrame(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
515 {
516 if (channel->module->psi5->INTSTATA[channel->channelId].B.RDI == TRUE)
517 {
518 frame->rdm.lowWord = channel->channel->RDRL.U;
519 frame->rdm.highWord = channel->channel->RDRH.U;
520
521 channel->module->psi5->INTCLRA[channel->channelId].U |= (IFX_PSI5_INTCLRA_RDI_MSK << IFX_PSI5_INTCLRA_RDI_OFF) | (IFX_PSI5_INTCLRA_RSI_MSK << IFX_PSI5_INTCLRA_RSI_OFF);
522
523 return TRUE;
524 }
525 else
526 {
527 return FALSE;
528 }
529 }
530
531
532 boolean IfxPsi5_Psi5_readChannelSerialMessage(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
533 {
534 message->rds.value = channel->channel->SDS[slot].U;
535
536 return TRUE;
537 }
538
539
540 void IfxPsi5_Psi5_resetModule(Ifx_PSI5 *psi5)
541 {
542 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
543
544 IfxScuWdt_clearSafetyEndinit(passwd);
545 psi5->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
546 psi5->KRST0.B.RST = 1;
547
548 while (psi5->KRST0.B.RSTSTAT == 0)
549 {
550 /* Wait until reset is executed */
551 }
552
553 psi5->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
554 IfxScuWdt_setSafetyEndinit(passwd);
555 }
556
557
558 boolean IfxPsi5_Psi5_sendChannelData(IfxPsi5_Psi5_Channel *channel, uint64 data)
559 {
560 uint32 dataLowWord = (uint32)(data & 0xFFFFFFFF);
561 uint32 dataHighWord = (uint32)((data >> 32) & 0xFFFFFFFF);
562 channel->channel->SDRL.U = dataLowWord;
563 channel->channel->SDRH.U = dataHighWord;
564
565 if (channel->module->psi5->INTSTATA[channel->channelId].B.TPOI)
566 {
567 return FALSE;
568 }
569 else
570 {
571 return TRUE;
572 }
573 }
IFXPSI5_ENABLE_CHANNELTRIGGER
#define IFXPSI5_ENABLE_CHANNELTRIGGER
Definition: IfxPsi5_cfg.h:70
IfxPsi5_Psi5_initModule
boolean IfxPsi5_Psi5_initModule(IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
Initialise the PSI5 with the supplied configureation.
Definition: IfxPsi5_Psi5.c:330
IfxPsi5_Psi5_Clock::type
IfxPsi5_ClockType type
Specifies the type of clock (fracDiv / slow 125kHz / fast 189 kHz / timestamp)
Definition: IfxPsi5_Psi5.h:182
IfxPsi5_Psi5_ReceiveControl::baudrateSelect
IfxPsi5_BaudRate baudrateSelect
Specifies the baudrate selection.
Definition: IfxPsi5_Psi5.h:261
IfxPsi5_Psi5_PulseGeneration::delayLength
uint32 delayLength
Specifies the additional length of the pulse width for coding a &#39;1&#39;.
Definition: IfxPsi5_Psi5.h:226
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:572
IfxPsi5_DividerMode_normal
divider mode is normal
Definition: IfxPsi5.h:138
IfxPsi5_Psi5_ReceiveControl::pulseTimestampSelect
IfxPsi5_TimestampRegister pulseTimestampSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5_Psi5.h:262
IfxPsi5_Trigger_0
trigger 0
Definition: IfxPsi5.h:209
IfxPsi5_Psi5_Rdm::highWord
uint32 highWord
Upper 32 bits of the Psi5 frame.
Definition: IfxPsi5_Psi5.h:239
IfxPsi5_Psi5_InputOutputControl::digitalInputFilterDepth
IfxPsi5_DigitalInputFilterDepth digitalInputFilterDepth
Specifies the the number of port input samples considered for floating average.
Definition: IfxPsi5_Psi5.h:207
IfxPsi5_Psi5_ChannelConfig::pulseGeneration
IfxPsi5_Psi5_PulseGeneration pulseGeneration
Specifies the configuration for sync pulse generation.
Definition: IfxPsi5_Psi5.h:320
IfxPsi5_Psi5_resetModule
void IfxPsi5_Psi5_resetModule(Ifx_PSI5 *psi5)
Reset PSI5 kernel.
Definition: IfxPsi5_Psi5.c:540
IfxPsi5_Psi5_deInitModule
void IfxPsi5_Psi5_deInitModule(IfxPsi5_Psi5 *psi5)
Resets the PSI5 module.
Definition: IfxPsi5_Psi5.c:54
IfxPsi5_Psi5_Config::timestampCounterC
IfxPsi5_Psi5_TimeStampConfig timestampCounterC
Specifies the time stamp counter C properties.
Definition: IfxPsi5_Psi5.h:339
IfxPsi5_Psi5_sendChannelData
boolean IfxPsi5_Psi5_sendChannelData(IfxPsi5_Psi5_Channel *channel, uint64 data)
Transmit the data through the channel.
Definition: IfxPsi5_Psi5.c:558
IfxPsi5_Psi5_TransmitControl::ssrPayloadLength
uint32 ssrPayloadLength
Specifies the payload length of SSR.
Definition: IfxPsi5_Psi5.h:285
IfxPsi5_ChannelId_0
Specifies PSI5 channel 0.
Definition: IfxPsi5_cfg.h:93
IfxPsi5_Psi5_ChannelConfig
Channel configuration structure.
Definition: IfxPsi5_Psi5.h:315
IfxPsi5_Psi5_ReceiveControl::messagingBitsPresence
IfxPsi5_MessagingBits messagingBitsPresence[IFXPSI5_NUM_SLOTS]
Specifies the presence or absence of messaging bits in the slots 0 to 5.
Definition: IfxPsi5_Psi5.h:257
IfxPsi5_Psi5_Config::fracDiv
IfxPsi5_Psi5_Clock fracDiv
Specifies fractionally divided clock properties.
Definition: IfxPsi5_Psi5.h:333
IfxPsi5_Psi5_Config::timestampCounterB
IfxPsi5_Psi5_TimeStampConfig timestampCounterB
Specifies the time stamp counter B properties.
Definition: IfxPsi5_Psi5.h:338
IfxPsi5_Psi5_Config::fastClock
IfxPsi5_Psi5_Clock fastClock
Specifies the faster f189 clock properties.
Definition: IfxPsi5_Psi5.h:335
IfxPsi5_Psi5_PinsConfig::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxPsi5_Psi5.h:299
IFXPSI5_DEFAULT_FASTCLOCK_FREQ
#define IFXPSI5_DEFAULT_FASTCLOCK_FREQ
Definition: IfxPsi5_cfg.h:76
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPsi5_BaudRate_125
Slow 125 kHz clock.
Definition: IfxPsi5.h:89
IfxPsi5_Psi5_ReceiveControl::asynchronousModeSelected
boolean asynchronousModeSelected
Specifies the asynchronous mode of operation.
Definition: IfxPsi5_Psi5.h:253
IfxPsi5_Psi5_PinsConfig::in
IFX_CONST IfxPsi5_Rx_In * in
The RX Pin which should be configured.
Definition: IfxPsi5_Psi5.h:295
IFXPSI5_STEP_RANGE
#define IFXPSI5_STEP_RANGE
Definition: IfxPsi5_cfg.h:64
IFXPSI5_NUM_WDTS
#define IFXPSI5_NUM_WDTS
Definition: IfxPsi5_cfg.h:66
IfxPsi5_Psi5_TransmitControl::crcGenerationEnabled
boolean crcGenerationEnabled
Specifies whether the crc generation is turned on or not.
Definition: IfxPsi5_Psi5.h:281
IfxPsi5_Psi5_TransmitControl::bitStuffingEnabled
boolean bitStuffingEnabled
Specifies whether the bit stuffing is turned on or not.
Definition: IfxPsi5_Psi5.h:280
IfxPsi5_Psi5_ChannelConfig::watchdogTimerLimit
uint32 watchdogTimerLimit[IFXPSI5_NUM_WDTS]
Specifies the watchdog timer limit for each of the slots 0 to 6.
Definition: IfxPsi5_Psi5.h:318
IfxPsi5_DividerMode
IfxPsi5_DividerMode
MODULE_PSI5.FDR.DM,Divider mode.
Definition: IfxPsi5.h:135
IfxPsi5_Psi5_ReceiveControl::fifoWarningLevel
uint32 fifoWarningLevel
Specifies the fifo warning level.
Definition: IfxPsi5_Psi5.h:254
IfxPsi5_MessagingBits_absent
No messaging bits.
Definition: IfxPsi5.h:155
IfxPsi5_CRCorParity_parity
parity selection
Definition: IfxPsi5.h:97
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxPsi5_Rx_In
RX pin mapping structure.
Definition: IfxPsi5_PinMap.h:56
IfxPsi5_Psi5_ReceiveControl::verboseForAsynchronousMode
IfxPsi5_Verbose verboseForAsynchronousMode
Specifies the verbose mode selection in asynchronous mode of operation.
Definition: IfxPsi5_Psi5.h:256
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxPsi5_Psi5_Frame::rdm
IfxPsi5_Psi5_Rdm rdm
Psi5 frame in double word format.
Definition: IfxPsi5_Psi5.h:346
IfxPsi5_Psi5_readChannelFrame
boolean IfxPsi5_Psi5_readChannelFrame(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
Gets the received psi5 frame for the channel.
Definition: IfxPsi5_Psi5.c:514
IfxPsi5_Psi5_InputOutputControl::outputInverterEnabled
boolean outputInverterEnabled
Specifies the pulse polarity of the output.
Definition: IfxPsi5_Psi5.h:205
IfxPsi5_Psi5_initChannel
boolean IfxPsi5_Psi5_initChannel(IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxPsi5_Psi5.c:95
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxPsi5_Psi5_Channel
Channel handle data structure.
Definition: IfxPsi5_Psi5.h:306
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxPsi5_Psi5_SerialMessage
Psi5 serial message data structure.
Definition: IfxPsi5_Psi5.h:352
IfxPsi5_Psi5_initModuleConfig
void IfxPsi5_Psi5_initModuleConfig(IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
Initialise buffer with default PSI5 configuration.
Definition: IfxPsi5_Psi5.c:383
IfxPsi5_Psi5_initChannelConfig
void IfxPsi5_Psi5_initChannelConfig(IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
Get the current channel configuration (e.g. sample settings)
Definition: IfxPsi5_Psi5.c:245
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:195
IfxPsi5_Psi5.h
PSI5 PSI5 details.
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxPsi5_Psi5_readChannelSerialMessage
boolean IfxPsi5_Psi5_readChannelSerialMessage(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
Get the received serial message for the channel.
Definition: IfxPsi5_Psi5.c:532
IfxPsi5_Psi5_Config::timestampClock
IfxPsi5_Psi5_Clock timestampClock
Specifies the time stamp clock properties.
Definition: IfxPsi5_Psi5.h:336
IfxPsi5_Psi5_PulseGeneration::timeBaseSelect
IfxPsi5_TimeBase timeBaseSelect
Specifies the clock source for CTV as internal or external.
Definition: IfxPsi5_Psi5.h:227
IfxPsi5_Psi5_ChannelConfig::receiveControl
IfxPsi5_Psi5_ReceiveControl receiveControl
Specifies the configuration for reception.
Definition: IfxPsi5_Psi5.h:322
IfxPsi5_Psi5_InputOutputControl::inputInverterEnabled
boolean inputInverterEnabled
Specifies the pulse polarity of the input.
Definition: IfxPsi5_Psi5.h:206
IfxPsi5_Psi5::psi5
Ifx_PSI5 * psi5
Specifies the pointer to the PSI5 module registers.
Definition: IfxPsi5_Psi5.h:165
IfxPsi5_TimestampRegister_a
Timestamp register A.
Definition: IfxPsi5.h:200
IfxPsi5_DividerMode_off
divider mode is off
Definition: IfxPsi5.h:140
IfxPsi5_Psi5_PinsConfig
Pin Configuration structure.
Definition: IfxPsi5_Psi5.h:293
IfxPsi5_Psi5_PinsConfig::inMode
IfxPort_InputMode inMode
The pin input mode which should be configured.
Definition: IfxPsi5_Psi5.h:296
IfxPsi5_Psi5_ChannelConfig::channelTrigger
IfxPsi5_Psi5_ChannelTrigger channelTrigger
Specifies the configuration for channel trigger.
Definition: IfxPsi5_Psi5.h:321
IfxPsi5_DividerMode_spb
divider mode is off
Definition: IfxPsi5.h:137
IfxPsi5_TriggerType_external
External trigger.
Definition: IfxPsi5.h:222
IfxPsi5_Psi5_getFracDivClock
uint32 IfxPsi5_Psi5_getFracDivClock(Ifx_PSI5 *psi5)
Returns the configured fracDiv psi5 clock frequency in Hz.
Definition: IfxPsi5_Psi5.c:68
IfxPsi5_initTxPin
IFX_INLINE void IfxPsi5_initTxPin(const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxPsi5.h:517
IfxPsi5_Psi5_ReceiveControl::receiveDataRegisterTimestamp
IfxPsi5_ReceiveDataRegisterTimestamp receiveDataRegisterTimestamp
Specifies the pulse or start of frame based timestamp to be stored in receive data register RDRH...
Definition: IfxPsi5_Psi5.h:264
IfxPsi5_Psi5
PSI5 handle data structure.
Definition: IfxPsi5_Psi5.h:163
IfxPsi5_Psi5_PulseGeneration::periodicOrExternalOrBypass
IfxPsi5_TriggerType periodicOrExternalOrBypass
Specifies whether periodic trigger or external trigger or bypass is selected.
Definition: IfxPsi5_Psi5.h:229
IfxPsi5_Psi5_ReceiveControl::verbose
IfxPsi5_Verbose verbose[IFXPSI5_NUM_SLOTS]
Specifies the verbose is enabled or disabled for the slots 0 to 5.
Definition: IfxPsi5_Psi5.h:260
IfxPsi5_Psi5_PulseGeneration::blankoutTime
uint32 blankoutTime
Specifies the duration of blank out period.
Definition: IfxPsi5_Psi5.h:231
IfxPsi5_Psi5_TransmitControl::sorPayloadLength
uint32 sorPayloadLength
Specifies the payload length of SOR.
Definition: IfxPsi5_Psi5.h:286
IfxPsi5_Psi5_PinsConfig::out
IFX_CONST IfxPsi5_Tx_Out * out
The TX Pin which should be configured.
Definition: IfxPsi5_Psi5.h:297
IfxPsi5_FrameExpectation_notExpected
No frame is expected.
Definition: IfxPsi5.h:147
IfxPsi5_Psi5_TransmitControl::enhancedProtocolSelected
boolean enhancedProtocolSelected
Specifies whether the enhanced protocol is selected or not.
Definition: IfxPsi5_Psi5.h:279
IfxPsi5_Psi5_ChannelTrigger::channelTriggerCounter
uint32 channelTriggerCounter
Specifies the channel trigger counter.
Definition: IfxPsi5_Psi5.h:173
IfxPsi5_DigitalInputFilterDepth_0
Digital input filter depth is 0.
Definition: IfxPsi5.h:115
IfxPsi5_Psi5_Config::slowClock
IfxPsi5_Psi5_Clock slowClock
Specifies the slower f125 clock properties.
Definition: IfxPsi5_Psi5.h:334
IfxPsi5_TimeBase_internal
Internal time stamp clock.
Definition: IfxPsi5.h:192
IfxPsi5_Psi5_TransmitControl::payloadLength
uint32 payloadLength
Specifies the payload length to be sent.
Definition: IfxPsi5_Psi5.h:284
IfxPsi5_Psi5_Clock
Clock configuration data structure.
Definition: IfxPsi5_Psi5.h:178
IfxPsi5_Psi5_Clock::frequency
uint32 frequency
Specifies the frequency for the clock.
Definition: IfxPsi5_Psi5.h:180
IFXPSI5_ENABLE_CHANNEL
#define IFXPSI5_ENABLE_CHANNEL
Definition: IfxPsi5_cfg.h:72
IfxPsi5_Psi5_ReceiveControl::frameExpectation
IfxPsi5_FrameExpectation frameExpectation[IFXPSI5_NUM_SLOTS]
Specifies whether the frame is expected or not in the slots 0 to 5.
Definition: IfxPsi5_Psi5.h:259
IfxPsi5_Psi5_Frame
Psi5 frame data union.
Definition: IfxPsi5_Psi5.h:344
IfxPsi5_ClockType_fastClock_189
Fast 189 kHz clock.
Definition: IfxPsi5.h:107
IfxPsi5_TriggerType_periodic
Periodic trigger.
Definition: IfxPsi5.h:221
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPsi5_initRxPin
IFX_INLINE void IfxPsi5_initRxPin(const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxPsi5.h:504
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:424
IfxPsi5_Psi5_TransmitControl::inhibitingAutomaticTransferEnabled
boolean inhibitingAutomaticTransferEnabled
Specifies whether automatic transfer from the shift registers SSRL/H to SORL/H is inhibited or not...
Definition: IfxPsi5_Psi5.h:283
IfxPsi5_Psi5_Rdm::lowWord
uint32 lowWord
Lower 32 bits of the Psi5 frame.
Definition: IfxPsi5_Psi5.h:238
IfxPsi5_Psi5_Channel::channel
Ifx_PSI5_CH * channel
Pointer to the channel registers.
Definition: IfxPsi5_Psi5.h:309
IfxPsi5_Psi5_ChannelConfig::channelId
IfxPsi5_ChannelId channelId
Specifies the channel index.
Definition: IfxPsi5_Psi5.h:319
IfxPsi5_Psi5_ChannelTrigger::channelTriggerValue
uint32 channelTriggerValue
Specifies the channel trigger value CTV.
Definition: IfxPsi5_Psi5.h:172
IfxPsi5_DividerMode_fractional
divider mode is fractional
Definition: IfxPsi5.h:139
IfxPsi5_ClockType
IfxPsi5_ClockType
Clock type.
Definition: IfxPsi5.h:103
IfxPsi5_ClockType_timeStamp
Timestamp clock.
Definition: IfxPsi5.h:108
IfxPsi5_Psi5_Config
PSI5 module configuration structure.
Definition: IfxPsi5_Psi5.h:330
IfxPsi5_Psi5_ReceiveControl::crcOrParity
IfxPsi5_CRCorParity crcOrParity[IFXPSI5_NUM_SLOTS]
Specifies the crc or parity selection for the slots 0 to 5.
Definition: IfxPsi5_Psi5.h:258
IfxPsi5_Psi5_ChannelConfig::inputOutputControl
IfxPsi5_Psi5_InputOutputControl inputOutputControl
Specifies the configuration for input output control.
Definition: IfxPsi5_Psi5.h:324
IfxPsi5_Psi5_SerialMessage::rds
IfxPsi5_Psi5_Rds rds
Psi5 serial message as unsigned 32 bit value.
Definition: IfxPsi5_Psi5.h:354
IfxPsi5_Psi5_PulseGeneration::pulseLength
uint32 pulseLength
Specifies the standard pulse width without data coding for standard pulse width or for coding a &#39;0&#39;...
Definition: IfxPsi5_Psi5.h:225
IfxPsi5_Psi5_Rds::value
uint32 value
32 bit value of the Psi5 serial message
Definition: IfxPsi5_Psi5.h:246
IfxPsi5_Psi5_ChannelConfig::pinsConfig
IFX_CONST IfxPsi5_Psi5_PinsConfig * pinsConfig
Pin Configuration structure.
Definition: IfxPsi5_Psi5.h:325
IfxPsi5_Psi5_ReceiveControl::frameTimestampSelect
IfxPsi5_TimestampRegister frameTimestampSelect
Specifies the timestamp register selection for start of frames.
Definition: IfxPsi5_Psi5.h:263
IfxPsi5_Psi5_Config::timestampCounterA
IfxPsi5_Psi5_TimeStampConfig timestampCounterA
Specifies the time stamp counter A properties.
Definition: IfxPsi5_Psi5.h:337
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxPsi5_Psi5_ChannelConfig::sendControl
IfxPsi5_Psi5_TransmitControl sendControl
Specifies the configuration for transmission.
Definition: IfxPsi5_Psi5.h:323
IfxPsi5_Psi5_enableModule
void IfxPsi5_Psi5_enableModule(Ifx_PSI5 *psi5)
Enable PSI5 kernel.
Definition: IfxPsi5_Psi5.c:62
IfxPsi5_Psi5_Clock::mode
IfxPsi5_DividerMode mode
Specifies the mode of division for the clock.
Definition: IfxPsi5_Psi5.h:181
IfxPsi5_Psi5_PinsConfig::outMode
IfxPort_OutputMode outMode
The pin output mode which should be configured.
Definition: IfxPsi5_Psi5.h:298
IfxPsi5_Psi5_ReceiveControl::payloadLength
uint32 payloadLength[IFXPSI5_NUM_SLOTS]
Specifies the payload length for the slots 0 to 5.
Definition: IfxPsi5_Psi5.h:255
IfxPsi5_Psi5_PulseGeneration::externalTimeBaseSelect
IfxPsi5_Trigger externalTimeBaseSelect
Specifies the clock source for CTV in the case of external.
Definition: IfxPsi5_Psi5.h:228
IfxPsi5_ReceiveDataRegisterTimestamp_pulse
Pulse based timestamp SPTSC to be stored in RDRHC.
Definition: IfxPsi5.h:163
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxPsi5_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5_PinMap.h:65
IfxPsi5_Verbose_off
Verbose mode is turned off.
Definition: IfxPsi5.h:230
IFXPSI5_DEFAULT_SLOWCLOCK_FREQ
#define IFXPSI5_DEFAULT_SLOWCLOCK_FREQ
Definition: IfxPsi5_cfg.h:74
IFXPSI5_DEFAULT_TIMESTAMP_FREQ
#define IFXPSI5_DEFAULT_TIMESTAMP_FREQ
Definition: IfxPsi5_cfg.h:78
IfxPsi5_ClockType_fracDiv
Fractional Divide clock.
Definition: IfxPsi5.h:105
IfxPsi5_Slot
IfxPsi5_Slot
MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id.
Definition: IfxPsi5.h:169
IfxPsi5_Psi5_initializeClock
uint32 IfxPsi5_Psi5_initializeClock(Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
Configure the fracDiv clock.
Definition: IfxPsi5_Psi5.c:409
IfxPsi5_ClockType_slowClock_125
Slow 125 kHz clock.
Definition: IfxPsi5.h:106
IfxPsi5_Psi5_Channel::module
IfxPsi5_Psi5 * module
The PSI5 handle structure.
Definition: IfxPsi5_Psi5.h:308
IfxPsi5_Psi5_ChannelConfig::module
IFX_CONST IfxPsi5_Psi5 * module
Specifies pointer to the IfxPsi5_Psi5 module handle.
Definition: IfxPsi5_Psi5.h:317
IfxPsi5_TriggerType_bypass
Bypassed trigger.
Definition: IfxPsi5.h:223
IfxPsi5_Psi5_TransmitControl::startSequenceGenerationEnabled
boolean startSequenceGenerationEnabled
Specifies whether the start sequence generation is turned on or not.
Definition: IfxPsi5_Psi5.h:282
IfxPsi5_Psi5_PulseGeneration::externalTriggerSelect
IfxPsi5_Trigger externalTriggerSelect
Specifies the trigger source in case of external triggerring.
Definition: IfxPsi5_Psi5.h:230


iLLD_TC26B: IfxPsi5_Psi5.h Source File

  • Psi5
  • Psi5
IfxPsi5_Psi5.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_Psi5.h
3 * \brief PSI5 PSI5 details
4 * \ingroup IfxLld_Psi5
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Psi5_Psi5_Usage How to use the PSI5 PSI5 Interface driver?
44 * \ingroup IfxLld_Psi5
45 *
46 * PSI5 communicates with the external world via one input/output line for each channel.
47 *
48 * In the following sections it will be described, how to integrate the driver into the application framework.
49 *
50 * \section IfxLld_Psi5_Psi5_Preparation Preparation
51 * \subsection IfxLld_Psi5_Psi5_Include Include Files
52 *
53 * Include following header file into your C code:
54 * \code
55 * #include <Psi5/Psi5/IfxPsi5_Psi5.h>
56 * \endcode
57 *
58 * \subsection IfxLld_Psi5_Psi5_Variables Variables
59 * //used globally
60 * \code
61 * IfxPsi5_Psi5_Channel psi5Channel[IFXPSI5_PINMAP_NUM_CHANNELS];
62 * \endcode
63 *
64 * \subsection IfxLld_Psi5_Psi5_Module Module Initialisation
65 * \code
66 * // create module config
67 * IfxPsi5_Psi5_Config psi5Config;
68 * IfxPsi5_Psi5_initModuleConfig(&psi5Config, &MODULE_PSI5);
69 *
70 * // initialize module
71 * IfxPsi5_Psi5 psi5;
72 * IfxPsi5_Psi5_initModule(&psi5, &psi5Config);
73 * \endcode
74 *
75 * \subsection IfxLld_Psi5_Psi5_Channel Channel Initialisation
76 * \code
77 * // create channel config
78 * IfxPsi5_Psi5_ChannelConfig psi5ChannelConfig;
79 * IfxPsi5_Psi5_initChannelConfig(&psi5ChannelConfig, &psi5);
80 *
81 * psi5ChannelConfig.watchdogTimerLimit[0] = 0x32; // initial delay before slot 0 starts
82 * psi5ChannelConfig.watchdogTimerLimit[1] = 0x90;
83 * psi5ChannelConfig.watchdogTimerLimit[2] = 0x10;
84 * psi5ChannelConfig.watchdogTimerLimit[3] = 0x10;
85 * psi5ChannelConfig.watchdogTimerLimit[4] = 0x10;
86 * psi5ChannelConfig.watchdogTimerLimit[5] = 0x10;
87 * psi5ChannelConfig.watchdogTimerLimit[6] = 0x10;
88 *
89 * for(int slot=0; slot<6; ++slot) {
90 * psi5ChannelConfig.receiveControl.payloadLength[slot] = 8;
91 * if( slot == 0 )
92 * psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_expected;
93 * else
94 * psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_notExpected;
95 * }
96 *
97 * // initialize channels
98 * for(int chn=0; chn<IFXPSI5_PINMAP_NUM_CHANNELS; ++chn) {
99 * psi5ChannelConfig.channelId = (IfxPsi5_ChannelId)chn;
100 *
101 * // TODO: currently no IOCRx.ALTI config field
102 * unsigned alti = 0;
103 *
104 * IfxPsi5_Psi5_PinsConfig pinsConfig;
105 * for(int module=0;module<IFXPSI5_PINMAP_NUM_MODULES;module++)
106 * {
107 * pinsConfig.in = IfxPsi5_Rx_In_pinTable[module][chn][alti];
108 * pinsConfig.inMode = IfxPort_InputMode_pullUp;
109 * pinsConfig.out = IfxPsi5_Tx_Out_pinTable[module][chn][alti];
110 * }
111 * pinsConfig.outMode = IfxPort_OutputMode_pushPull;
112 * pinsConfig.pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
113 *
114 * psi5ChannelConfig.pinsConfig = &pinsConfig;
115 *
116 * IfxPsi5_Psi5_initChannel(&psi5Channel[chn], &psi5ChannelConfig);
117 * }
118 * \endcode
119 *
120 * \subsection IfxLld_Psi5_Psi5_readChannelFrame read channel frame
121 * \code
122 * for(int i=0; i<5; ++i) {
123 * for(int chn=0; chn<IFXPSI5_PINMAP_NUM_CHANNELS; ++chn) {
124 * IfxPsi5_Psi5_Frame frame;
125 *
126 * while( !IfxPsi5_Psi5_readChannelFrame(&psi5Channel[chn], &frame) );
127 *
128 * }
129 * }
130 * \endcode
131 *
132 * \defgroup IfxLld_Psi5_Psi5 PSI5
133 * \ingroup IfxLld_Psi5
134 * \defgroup IfxLld_Psi5_Psi5_Structures Data Structures
135 * \ingroup IfxLld_Psi5_Psi5
136 * \defgroup IfxLld_Psi5_Psi5_Module Module Initialisation functions
137 * \ingroup IfxLld_Psi5_Psi5
138 * \defgroup IfxLld_Psi5_Psi5_Channel Channel functions
139 * \ingroup IfxLld_Psi5_Psi5
140 * \defgroup IfxLld_Psi5_Psi5_Clock Clock Intialisation functions
141 * \ingroup IfxLld_Psi5_Psi5
142 */
143
144 #ifndef IFXPSI5_PSI5_H
145 #define IFXPSI5_PSI5_H 1
146
147 /******************************************************************************/
148 /*----------------------------------Includes----------------------------------*/
149 /******************************************************************************/
150
151 #include "Psi5/Std/IfxPsi5.h"
152 #include "Scu/Std/IfxScuCcu.h"
153 #include "IfxPsi5_bf.h"
154
155 /******************************************************************************/
156 /*-----------------------------Data Structures--------------------------------*/
157 /******************************************************************************/
158
159 /** \addtogroup IfxLld_Psi5_Psi5_Structures
160 * \{ */
161 /** \brief PSI5 handle data structure
162 */
163 typedef struct
164 {
165 Ifx_PSI5 *psi5; /**< \brief Specifies the pointer to the PSI5 module registers */
166 } IfxPsi5_Psi5;
167
168 /** \brief channel trigger configuration structure
169 */
170 typedef struct
171 {
172 uint32 channelTriggerValue; /**< \brief Specifies the channel trigger value CTV */
173 uint32 channelTriggerCounter; /**< \brief Specifies the channel trigger counter */
174 } IfxPsi5_Psi5_ChannelTrigger;
175
176 /** \brief Clock configuration data structure
177 */
178 typedef struct
179 {
180 uint32 frequency; /**< \brief Specifies the frequency for the clock */
181 IfxPsi5_DividerMode mode; /**< \brief Specifies the mode of division for the clock */
182 IfxPsi5_ClockType type; /**< \brief Specifies the type of clock (fracDiv / slow 125kHz / fast 189 kHz / timestamp) */
183 } IfxPsi5_Psi5_Clock;
184
185 /** \brief Psi5 frame data structure with individual members
186 */
187 typedef struct
188 {
189 uint8 crcError : 1; /**< \brief Crc error flag */
190 uint8 crc : 3; /**< \brief Received crc */
191 uint32 readData : 28; /**< \brief Received data */
192 uint32 timestamp : 24; /**< \brief Timestamp */
193 uint8 slotCounter : 3; /**< \brief Slot counter */
194 uint8 timeslotError : 1; /**< \brief Time slot error flag */
195 uint8 numberOfBitsError : 1; /**< \brief Number of bits error flag */
196 uint8 messagingBitsError : 1; /**< \brief Messaging bits error flag */
197 uint8 noFrameReceivedError : 1; /**< \brief No frame received flag */
198 uint8 receiveMemoryOverflowError : 1; /**< \brief Receive buffer overflow error flag */
199 } IfxPsi5_Psi5_FrameData;
200
201 /** \brief Input output configuration structure
202 */
203 typedef struct
204 {
205 boolean outputInverterEnabled; /**< \brief Specifies the pulse polarity of the output */
206 boolean inputInverterEnabled; /**< \brief Specifies the pulse polarity of the input */
207 IfxPsi5_DigitalInputFilterDepth digitalInputFilterDepth; /**< \brief Specifies the the number of port input samples considered for floating average */
208 } IfxPsi5_Psi5_InputOutputControl;
209
210 /** \brief Psi5 serial message with individual members
211 */
212 typedef struct
213 {
214 uint16 serialData : 16; /**< \brief Serial message data */
215 uint8 messageId : 8; /**< \brief Serial message Id */
216 uint8 crc : 6; /**< \brief Serial message crc */
217 uint8 serialMessageCRCFailedError : 1; /**< \brief Serial message crc error flag */
218 uint8 configuration : 1; /**< \brief Serial message configuration */
219 } IfxPsi5_Psi5_Message;
220
221 /** \brief Sync pulse generation configuration structure
222 */
223 typedef struct
224 {
225 uint32 pulseLength; /**< \brief Specifies the standard pulse width without data coding for standard pulse width or for coding a '0' */
226 uint32 delayLength; /**< \brief Specifies the additional length of the pulse width for coding a '1' */
227 IfxPsi5_TimeBase timeBaseSelect; /**< \brief Specifies the clock source for CTV as internal or external */
228 IfxPsi5_Trigger externalTimeBaseSelect; /**< \brief Specifies the clock source for CTV in the case of external */
229 IfxPsi5_TriggerType periodicOrExternalOrBypass; /**< \brief Specifies whether periodic trigger or external trigger or bypass is selected */
230 IfxPsi5_Trigger externalTriggerSelect; /**< \brief Specifies the trigger source in case of external triggerring */
231 uint32 blankoutTime; /**< \brief Specifies the duration of blank out period */
232 } IfxPsi5_Psi5_PulseGeneration;
233
234 /** \brief Psi5 frame in double word format
235 */
236 typedef struct
237 {
238 uint32 lowWord; /**< \brief Lower 32 bits of the Psi5 frame */
239 uint32 highWord; /**< \brief Upper 32 bits of the Psi5 frame */
240 } IfxPsi5_Psi5_Rdm;
241
242 /** \brief Psi5 serial message as unsigned 32 bit value
243 */
244 typedef struct
245 {
246 uint32 value; /**< \brief 32 bit value of the Psi5 serial message */
247 } IfxPsi5_Psi5_Rds;
248
249 /** \brief Receive control configuration structure
250 */
251 typedef struct
252 {
253 boolean asynchronousModeSelected; /**< \brief Specifies the asynchronous mode of operation */
254 uint32 fifoWarningLevel; /**< \brief Specifies the fifo warning level */
255 uint32 payloadLength[IFXPSI5_NUM_SLOTS]; /**< \brief Specifies the payload length for the slots 0 to 5 */
256 IfxPsi5_Verbose verboseForAsynchronousMode; /**< \brief Specifies the verbose mode selection in asynchronous mode of operation */
257 IfxPsi5_MessagingBits messagingBitsPresence[IFXPSI5_NUM_SLOTS]; /**< \brief Specifies the presence or absence of messaging bits in the slots 0 to 5 */
258 IfxPsi5_CRCorParity crcOrParity[IFXPSI5_NUM_SLOTS]; /**< \brief Specifies the crc or parity selection for the slots 0 to 5 */
259 IfxPsi5_FrameExpectation frameExpectation[IFXPSI5_NUM_SLOTS]; /**< \brief Specifies whether the frame is expected or not in the slots 0 to 5 */
260 IfxPsi5_Verbose verbose[IFXPSI5_NUM_SLOTS]; /**< \brief Specifies the verbose is enabled or disabled for the slots 0 to 5 */
261 IfxPsi5_BaudRate baudrateSelect; /**< \brief Specifies the baudrate selection */
262 IfxPsi5_TimestampRegister pulseTimestampSelect; /**< \brief Specifies the timestamp register selection for pulses */
263 IfxPsi5_TimestampRegister frameTimestampSelect; /**< \brief Specifies the timestamp register selection for start of frames */
264 IfxPsi5_ReceiveDataRegisterTimestamp receiveDataRegisterTimestamp; /**< \brief Specifies the pulse or start of frame based timestamp to be stored in receive data register RDRH */
265 } IfxPsi5_Psi5_ReceiveControl;
266
267 /** \brief Timestamp configuration data structure
268 */
269 typedef struct
270 {
271 IfxPsi5_Trigger externalTimeBaseSelect; /**< \brief Specifies the clock base for counter CTS in the case of external */
272 IfxPsi5_TimeBase timeBaseSelect; /**< \brief Specifies the clock source for CTS as internal or external */
273 } IfxPsi5_Psi5_TimeStampConfig;
274
275 /** \brief Transmit control configuration structure
276 */
277 typedef struct
278 {
279 boolean enhancedProtocolSelected; /**< \brief Specifies whether the enhanced protocol is selected or not */
280 boolean bitStuffingEnabled; /**< \brief Specifies whether the bit stuffing is turned on or not */
281 boolean crcGenerationEnabled; /**< \brief Specifies whether the crc generation is turned on or not */
282 boolean startSequenceGenerationEnabled; /**< \brief Specifies whether the start sequence generation is turned on or not */
283 boolean inhibitingAutomaticTransferEnabled; /**< \brief Specifies whether automatic transfer from the shift registers SSRL/H to SORL/H is inhibited or not */
284 uint32 payloadLength; /**< \brief Specifies the payload length to be sent */
285 uint32 ssrPayloadLength; /**< \brief Specifies the payload length of SSR */
286 uint32 sorPayloadLength; /**< \brief Specifies the payload length of SOR */
287 } IfxPsi5_Psi5_TransmitControl;
288
289 /** \} */
290
291 /** \brief Pin Configuration structure
292 */
293 typedef struct
294 {
295 IFX_CONST IfxPsi5_Rx_In *in; /**< \brief The RX Pin which should be configured */
296 IfxPort_InputMode inMode; /**< \brief The pin input mode which should be configured */
297 IFX_CONST IfxPsi5_Tx_Out *out; /**< \brief The TX Pin which should be configured */
298 IfxPort_OutputMode outMode; /**< \brief The pin output mode which should be configured */
299 IfxPort_PadDriver pinDriver; /**< \brief The pad driver mode which should be configured */
300 } IfxPsi5_Psi5_PinsConfig;
301
302 /** \addtogroup IfxLld_Psi5_Psi5_Structures
303 * \{ */
304 /** \brief Channel handle data structure
305 */
306 typedef struct
307 {
308 IfxPsi5_Psi5 *module; /**< \brief The PSI5 handle structure */
309 Ifx_PSI5_CH *channel; /**< \brief Pointer to the channel registers */
310 IfxPsi5_ChannelId channelId; /**< \brief Specifies the channel index */
311 } IfxPsi5_Psi5_Channel;
312
313 /** \brief Channel configuration structure
314 */
315 typedef struct
316 {
317 IFX_CONST IfxPsi5_Psi5 *module; /**< \brief Specifies pointer to the IfxPsi5_Psi5 module handle */
318 uint32 watchdogTimerLimit[IFXPSI5_NUM_WDTS]; /**< \brief Specifies the watchdog timer limit for each of the slots 0 to 6 */
319 IfxPsi5_ChannelId channelId; /**< \brief Specifies the channel index */
320 IfxPsi5_Psi5_PulseGeneration pulseGeneration; /**< \brief Specifies the configuration for sync pulse generation */
321 IfxPsi5_Psi5_ChannelTrigger channelTrigger; /**< \brief Specifies the configuration for channel trigger */
322 IfxPsi5_Psi5_ReceiveControl receiveControl; /**< \brief Specifies the configuration for reception */
323 IfxPsi5_Psi5_TransmitControl sendControl; /**< \brief Specifies the configuration for transmission */
324 IfxPsi5_Psi5_InputOutputControl inputOutputControl; /**< \brief Specifies the configuration for input output control */
325 IFX_CONST IfxPsi5_Psi5_PinsConfig *pinsConfig; /**< \brief Pin Configuration structure */
326 } IfxPsi5_Psi5_ChannelConfig;
327
328 /** \brief PSI5 module configuration structure
329 */
330 typedef struct
331 {
332 Ifx_PSI5 *psi5; /**< \brief Specifies the pointer to the PSI5 module registers */
333 IfxPsi5_Psi5_Clock fracDiv; /**< \brief Specifies fractionally divided clock properties */
334 IfxPsi5_Psi5_Clock slowClock; /**< \brief Specifies the slower f125 clock properties */
335 IfxPsi5_Psi5_Clock fastClock; /**< \brief Specifies the faster f189 clock properties */
336 IfxPsi5_Psi5_Clock timestampClock; /**< \brief Specifies the time stamp clock properties */
337 IfxPsi5_Psi5_TimeStampConfig timestampCounterA; /**< \brief Specifies the time stamp counter A properties */
338 IfxPsi5_Psi5_TimeStampConfig timestampCounterB; /**< \brief Specifies the time stamp counter B properties */
339 IfxPsi5_Psi5_TimeStampConfig timestampCounterC; /**< \brief Specifies the time stamp counter C properties */
340 } IfxPsi5_Psi5_Config;
341
342 /** \brief Psi5 frame data union
343 */
344 typedef union
345 {
346 IfxPsi5_Psi5_Rdm rdm; /**< \brief Psi5 frame in double word format */
347 IfxPsi5_Psi5_FrameData frame; /**< \brief Psi5 frame data structure with individual members */
348 } IfxPsi5_Psi5_Frame;
349
350 /** \brief Psi5 serial message data structure
351 */
352 typedef union
353 {
354 IfxPsi5_Psi5_Rds rds; /**< \brief Psi5 serial message as unsigned 32 bit value */
355 IfxPsi5_Psi5_Message message; /**< \brief Psi5 serial message with individual members */
356 } IfxPsi5_Psi5_SerialMessage;
357
358 /** \brief startup related options TBD
359 */
360 typedef struct
361 {
362 uint8 a : 1; /**< \brief TBD */
363 uint32 b : 31; /**< \brief TBD */
364 } IfxPsi5_Psi5_StartupOptions;
365
366 /** \} */
367
368 /** \addtogroup IfxLld_Psi5_Psi5_Module
369 * \{ */
370
371 /******************************************************************************/
372 /*-------------------------Global Function Prototypes-------------------------*/
373 /******************************************************************************/
374
375 /** \brief Resets the PSI5 module
376 * \param psi5 pointer to the PSI5 module
377 * \return None
378 */
379 IFX_EXTERN void IfxPsi5_Psi5_deInitModule(IfxPsi5_Psi5 *psi5);
380
381 /** \brief Enable PSI5 kernel
382 * \param psi5 pointer to the base of PSI5 registers
383 * \return None
384 */
385 IFX_EXTERN void IfxPsi5_Psi5_enableModule(Ifx_PSI5 *psi5);
386
387 /** \brief Initialise the PSI5 with the supplied configureation
388 * \param psi5 pointer to the PSI5 module
389 * \param config pointer to the PSI5 configuration
390 * \return return TRUE on success & FALSE if configuration not valid
391 *
392 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
393 *
394 */
395 IFX_EXTERN boolean IfxPsi5_Psi5_initModule(IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config);
396
397 /** \brief Initialise buffer with default PSI5 configuration
398 * \param config pointer to the PSI5 module configuration
399 * \param psi5 base address of the PSI5 register space
400 * \return None
401 *
402 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
403 *
404 */
405 IFX_EXTERN void IfxPsi5_Psi5_initModuleConfig(IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5);
406
407 /** \brief Reset PSI5 kernel
408 * \param psi5 pointer to the base of PSI5 registers
409 * \return None
410 */
411 IFX_EXTERN void IfxPsi5_Psi5_resetModule(Ifx_PSI5 *psi5);
412
413 /** \} */
414
415 /** \addtogroup IfxLld_Psi5_Psi5_Channel
416 * \{ */
417
418 /******************************************************************************/
419 /*-------------------------Inline Function Prototypes-------------------------*/
420 /******************************************************************************/
421
422 /** \brief start the channel with the selected options
423 * \param channel pointer to the PSI5 channel
424 * \param options startup related options
425 * \return TRUE if successful; FALSE otherwise
426 *
427 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
428 *
429 */
430 IFX_INLINE boolean IfxPsi5_Psi5_startupChannel(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_StartupOptions *options);
431
432 /******************************************************************************/
433 /*-------------------------Global Function Prototypes-------------------------*/
434 /******************************************************************************/
435
436 /** \brief Initialize the channel with the supplied configuration
437 * \param channel pointer to the PSI5 channel
438 * \param config pointer to the PSI5 channel configuration
439 * \return TRUE on success & FALSE if configuration not valid
440 *
441 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
442 *
443 */
444 IFX_EXTERN boolean IfxPsi5_Psi5_initChannel(IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config);
445
446 /** \brief Get the current channel configuration (e.g. sample settings)
447 * \param config pointer to the PSI5 channel configuration
448 * \param psi5 pointer to the PSI5 module
449 * \return None
450 *
451 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
452 *
453 */
454 IFX_EXTERN void IfxPsi5_Psi5_initChannelConfig(IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5);
455
456 /** \brief Gets the received psi5 frame for the channel
457 * \param channel pointer to the PSI5 channel
458 * \param frame pointer to the PSI5 frame buffer
459 * \return TRUE if successful; FALSE if no frame available
460 *
461 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
462 *
463 */
464 IFX_EXTERN boolean IfxPsi5_Psi5_readChannelFrame(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame);
465
466 /** \brief Get the received serial message for the channel
467 * \param channel pointer to the PSI5 channel
468 * \param slot Slot Id
469 * \param message pointer to the PSI5 serial message buffer
470 * \return TRUE if successful; FALSE if no serial message available
471 */
472 IFX_EXTERN boolean IfxPsi5_Psi5_readChannelSerialMessage(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message);
473
474 /** \brief Transmit the data through the channel
475 * \param channel pointer to the PSI5 channel
476 * \param data data to be sent
477 * \return TRUE if successful; FALSE otherwise
478 *
479 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
480 *
481 */
482 IFX_EXTERN boolean IfxPsi5_Psi5_sendChannelData(IfxPsi5_Psi5_Channel *channel, uint64 data);
483
484 /** \} */
485
486 /** \addtogroup IfxLld_Psi5_Psi5_Clock
487 * \{ */
488
489 /******************************************************************************/
490 /*-------------------------Global Function Prototypes-------------------------*/
491 /******************************************************************************/
492
493 /** \brief Returns the configured fracDiv psi5 clock frequency in Hz.
494 * \param psi5 Pointer to the base of PSI5 registers
495 * \return Returns the configured fracDiv psi5 clock frequency in Hz.
496 */
497 IFX_EXTERN uint32 IfxPsi5_Psi5_getFracDivClock(Ifx_PSI5 *psi5);
498
499 /** \brief Configure the fracDiv clock.
500 * \param psi5 Pointer to the base of PSI5 registers
501 * \param clock Specifies the required clock frequency in Hz.
502 * \return Returns the configured clock frequency in Hz.
503 */
504 IFX_EXTERN uint32 IfxPsi5_Psi5_initializeClock(Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock);
505
506 /** \} */
507
508 /******************************************************************************/
509 /*---------------------Inline Function Implementations------------------------*/
510 /******************************************************************************/
511
512 IFX_INLINE boolean IfxPsi5_Psi5_startupChannel(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_StartupOptions *options)
513 {
514 IFX_UNUSED_PARAMETER(channel);
515 IFX_UNUSED_PARAMETER(options);
516 return TRUE;
517 }
518
519
520 #endif /* IFXPSI5_PSI5_H */
IfxPsi5_Psi5_initModule
IFX_EXTERN boolean IfxPsi5_Psi5_initModule(IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
Initialise the PSI5 with the supplied configureation.
Definition: IfxPsi5_Psi5.c:330
IfxPsi5_Psi5_Clock::type
IfxPsi5_ClockType type
Specifies the type of clock (fracDiv / slow 125kHz / fast 189 kHz / timestamp)
Definition: IfxPsi5_Psi5.h:182
IfxPsi5_Psi5_FrameData::messagingBitsError
uint8 messagingBitsError
Messaging bits error flag.
Definition: IfxPsi5_Psi5.h:196
IfxPsi5_Psi5_ReceiveControl::baudrateSelect
IfxPsi5_BaudRate baudrateSelect
Specifies the baudrate selection.
Definition: IfxPsi5_Psi5.h:261
IfxPsi5_Psi5_PulseGeneration::delayLength
uint32 delayLength
Specifies the additional length of the pulse width for coding a &#39;1&#39;.
Definition: IfxPsi5_Psi5.h:226
IfxPsi5_Psi5_ReceiveControl::pulseTimestampSelect
IfxPsi5_TimestampRegister pulseTimestampSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5_Psi5.h:262
IfxPsi5_Psi5_Rdm::highWord
uint32 highWord
Upper 32 bits of the Psi5 frame.
Definition: IfxPsi5_Psi5.h:239
IfxPsi5_Psi5_InputOutputControl::digitalInputFilterDepth
IfxPsi5_DigitalInputFilterDepth digitalInputFilterDepth
Specifies the the number of port input samples considered for floating average.
Definition: IfxPsi5_Psi5.h:207
IfxPsi5_Psi5_ChannelConfig::pulseGeneration
IfxPsi5_Psi5_PulseGeneration pulseGeneration
Specifies the configuration for sync pulse generation.
Definition: IfxPsi5_Psi5.h:320
IfxPsi5_Psi5_resetModule
IFX_EXTERN void IfxPsi5_Psi5_resetModule(Ifx_PSI5 *psi5)
Reset PSI5 kernel.
Definition: IfxPsi5_Psi5.c:540
IfxPsi5_Psi5_deInitModule
IFX_EXTERN void IfxPsi5_Psi5_deInitModule(IfxPsi5_Psi5 *psi5)
Resets the PSI5 module.
Definition: IfxPsi5_Psi5.c:54
IfxPsi5_Psi5_Config::timestampCounterC
IfxPsi5_Psi5_TimeStampConfig timestampCounterC
Specifies the time stamp counter C properties.
Definition: IfxPsi5_Psi5.h:339
IfxPsi5_Psi5_sendChannelData
IFX_EXTERN boolean IfxPsi5_Psi5_sendChannelData(IfxPsi5_Psi5_Channel *channel, uint64 data)
Transmit the data through the channel.
Definition: IfxPsi5_Psi5.c:558
IfxPsi5_Psi5_TransmitControl::ssrPayloadLength
uint32 ssrPayloadLength
Specifies the payload length of SSR.
Definition: IfxPsi5_Psi5.h:285
IfxPsi5_Psi5_ChannelConfig
Channel configuration structure.
Definition: IfxPsi5_Psi5.h:315
IfxPsi5_Psi5_Config::fracDiv
IfxPsi5_Psi5_Clock fracDiv
Specifies fractionally divided clock properties.
Definition: IfxPsi5_Psi5.h:333
IfxPsi5_Psi5_Message::serialMessageCRCFailedError
uint8 serialMessageCRCFailedError
Serial message crc error flag.
Definition: IfxPsi5_Psi5.h:217
IfxPsi5_Psi5_InputOutputControl
Input output configuration structure.
Definition: IfxPsi5_Psi5.h:203
IfxPsi5_Psi5_Config::timestampCounterB
IfxPsi5_Psi5_TimeStampConfig timestampCounterB
Specifies the time stamp counter B properties.
Definition: IfxPsi5_Psi5.h:338
IfxPsi5_Psi5_Config::fastClock
IfxPsi5_Psi5_Clock fastClock
Specifies the faster f189 clock properties.
Definition: IfxPsi5_Psi5.h:335
IfxPsi5_Psi5_PinsConfig::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxPsi5_Psi5.h:299
IfxPsi5_Psi5_Message
Psi5 serial message with individual members.
Definition: IfxPsi5_Psi5.h:212
IfxPsi5_Psi5_FrameData::numberOfBitsError
uint8 numberOfBitsError
Number of bits error flag.
Definition: IfxPsi5_Psi5.h:195
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxPsi5_Psi5_FrameData::timestamp
uint32 timestamp
Timestamp.
Definition: IfxPsi5_Psi5.h:192
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPsi5_Psi5_ReceiveControl::asynchronousModeSelected
boolean asynchronousModeSelected
Specifies the asynchronous mode of operation.
Definition: IfxPsi5_Psi5.h:253
IfxPsi5_Psi5_PinsConfig::in
IFX_CONST IfxPsi5_Rx_In * in
The RX Pin which should be configured.
Definition: IfxPsi5_Psi5.h:295
IfxPsi5_TimeBase
IfxPsi5_TimeBase
MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base.
Definition: IfxPsi5.h:190
IFXPSI5_NUM_WDTS
#define IFXPSI5_NUM_WDTS
Definition: IfxPsi5_cfg.h:66
IfxPsi5_TimestampRegister
IfxPsi5_TimestampRegister
MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type...
Definition: IfxPsi5.h:198
IfxPsi5_Psi5_TransmitControl::crcGenerationEnabled
boolean crcGenerationEnabled
Specifies whether the crc generation is turned on or not.
Definition: IfxPsi5_Psi5.h:281
IfxPsi5_Psi5_TransmitControl::bitStuffingEnabled
boolean bitStuffingEnabled
Specifies whether the bit stuffing is turned on or not.
Definition: IfxPsi5_Psi5.h:280
IfxPsi5_DividerMode
IfxPsi5_DividerMode
MODULE_PSI5.FDR.DM,Divider mode.
Definition: IfxPsi5.h:135
IfxPsi5_Psi5_ReceiveControl::fifoWarningLevel
uint32 fifoWarningLevel
Specifies the fifo warning level.
Definition: IfxPsi5_Psi5.h:254
IfxPsi5_Rx_In
RX pin mapping structure.
Definition: IfxPsi5_PinMap.h:56
IfxPsi5_ReceiveDataRegisterTimestamp
IfxPsi5_ReceiveDataRegisterTimestamp
MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers.
Definition: IfxPsi5.h:161
IfxPsi5_Psi5_ReceiveControl::verboseForAsynchronousMode
IfxPsi5_Verbose verboseForAsynchronousMode
Specifies the verbose mode selection in asynchronous mode of operation.
Definition: IfxPsi5_Psi5.h:256
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxPsi5_Psi5_Frame::rdm
IfxPsi5_Psi5_Rdm rdm
Psi5 frame in double word format.
Definition: IfxPsi5_Psi5.h:346
IfxPsi5_Psi5_readChannelFrame
IFX_EXTERN boolean IfxPsi5_Psi5_readChannelFrame(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
Gets the received psi5 frame for the channel.
Definition: IfxPsi5_Psi5.c:514
IfxPsi5_Psi5_InputOutputControl::outputInverterEnabled
boolean outputInverterEnabled
Specifies the pulse polarity of the output.
Definition: IfxPsi5_Psi5.h:205
IfxPsi5_Psi5_initChannel
IFX_EXTERN boolean IfxPsi5_Psi5_initChannel(IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxPsi5_Psi5.c:95
IfxPsi5_Psi5_Channel
Channel handle data structure.
Definition: IfxPsi5_Psi5.h:306
IfxPsi5_Psi5_Message::serialData
uint16 serialData
Serial message data.
Definition: IfxPsi5_Psi5.h:214
IfxPsi5_Psi5_SerialMessage
Psi5 serial message data structure.
Definition: IfxPsi5_Psi5.h:352
IfxPsi5_Psi5_ReceiveControl
Receive control configuration structure.
Definition: IfxPsi5_Psi5.h:251
IfxPsi5_Psi5_initModuleConfig
IFX_EXTERN void IfxPsi5_Psi5_initModuleConfig(IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
Initialise buffer with default PSI5 configuration.
Definition: IfxPsi5_Psi5.c:383
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxPsi5_DigitalInputFilterDepth
IfxPsi5_DigitalInputFilterDepth
MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth.
Definition: IfxPsi5.h:113
IfxPsi5_Psi5_initChannelConfig
IFX_EXTERN void IfxPsi5_Psi5_initChannelConfig(IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
Get the current channel configuration (e.g. sample settings)
Definition: IfxPsi5_Psi5.c:245
IfxPsi5_Psi5_FrameData::timeslotError
uint8 timeslotError
Time slot error flag.
Definition: IfxPsi5_Psi5.h:194
IfxPsi5_Psi5_readChannelSerialMessage
IFX_EXTERN boolean IfxPsi5_Psi5_readChannelSerialMessage(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
Get the received serial message for the channel.
Definition: IfxPsi5_Psi5.c:532
IfxPsi5_Psi5_Config::timestampClock
IfxPsi5_Psi5_Clock timestampClock
Specifies the time stamp clock properties.
Definition: IfxPsi5_Psi5.h:336
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPsi5_Psi5_PulseGeneration::timeBaseSelect
IfxPsi5_TimeBase timeBaseSelect
Specifies the clock source for CTV as internal or external.
Definition: IfxPsi5_Psi5.h:227
IfxPsi5_Psi5_ChannelConfig::receiveControl
IfxPsi5_Psi5_ReceiveControl receiveControl
Specifies the configuration for reception.
Definition: IfxPsi5_Psi5.h:322
IfxPsi5_Psi5_InputOutputControl::inputInverterEnabled
boolean inputInverterEnabled
Specifies the pulse polarity of the input.
Definition: IfxPsi5_Psi5.h:206
IfxPsi5_Psi5::psi5
Ifx_PSI5 * psi5
Specifies the pointer to the PSI5 module registers.
Definition: IfxPsi5_Psi5.h:165
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxPsi5_Psi5_PinsConfig
Pin Configuration structure.
Definition: IfxPsi5_Psi5.h:293
IfxPsi5_Psi5_PinsConfig::inMode
IfxPort_InputMode inMode
The pin input mode which should be configured.
Definition: IfxPsi5_Psi5.h:296
IfxPsi5_Psi5_ChannelConfig::channelTrigger
IfxPsi5_Psi5_ChannelTrigger channelTrigger
Specifies the configuration for channel trigger.
Definition: IfxPsi5_Psi5.h:321
IfxPsi5_Psi5_FrameData::readData
uint32 readData
Received data.
Definition: IfxPsi5_Psi5.h:191
IfxPsi5_Psi5_getFracDivClock
IFX_EXTERN uint32 IfxPsi5_Psi5_getFracDivClock(Ifx_PSI5 *psi5)
Returns the configured fracDiv psi5 clock frequency in Hz.
Definition: IfxPsi5_Psi5.c:68
IfxPsi5_Psi5_FrameData::crcError
uint8 crcError
Crc error flag.
Definition: IfxPsi5_Psi5.h:189
IfxPsi5_Psi5_ReceiveControl::receiveDataRegisterTimestamp
IfxPsi5_ReceiveDataRegisterTimestamp receiveDataRegisterTimestamp
Specifies the pulse or start of frame based timestamp to be stored in receive data register RDRH...
Definition: IfxPsi5_Psi5.h:264
IfxPsi5_Psi5
PSI5 handle data structure.
Definition: IfxPsi5_Psi5.h:163
IfxPsi5_Psi5_PulseGeneration::periodicOrExternalOrBypass
IfxPsi5_TriggerType periodicOrExternalOrBypass
Specifies whether periodic trigger or external trigger or bypass is selected.
Definition: IfxPsi5_Psi5.h:229
IfxPsi5_Psi5_PulseGeneration::blankoutTime
uint32 blankoutTime
Specifies the duration of blank out period.
Definition: IfxPsi5_Psi5.h:231
IfxPsi5_Psi5_TransmitControl::sorPayloadLength
uint32 sorPayloadLength
Specifies the payload length of SOR.
Definition: IfxPsi5_Psi5.h:286
IfxPsi5_ChannelId
IfxPsi5_ChannelId
Channel Id.
Definition: IfxPsi5_cfg.h:90
IfxPsi5_Psi5_PinsConfig::out
IFX_CONST IfxPsi5_Tx_Out * out
The TX Pin which should be configured.
Definition: IfxPsi5_Psi5.h:297
IfxPsi5_Trigger
IfxPsi5_Trigger
MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id.
Definition: IfxPsi5.h:207
IfxPsi5_CRCorParity
IfxPsi5_CRCorParity
MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection.
Definition: IfxPsi5.h:95
IfxPsi5_Psi5_TransmitControl::enhancedProtocolSelected
boolean enhancedProtocolSelected
Specifies whether the enhanced protocol is selected or not.
Definition: IfxPsi5_Psi5.h:279
IfxPsi5.h
PSI5 basic functionality.
IfxPsi5_Psi5_ChannelTrigger::channelTriggerCounter
uint32 channelTriggerCounter
Specifies the channel trigger counter.
Definition: IfxPsi5_Psi5.h:173
IfxPsi5_Psi5_Message::configuration
uint8 configuration
Serial message configuration.
Definition: IfxPsi5_Psi5.h:218
IfxPsi5_Psi5_startupChannel
IFX_INLINE boolean IfxPsi5_Psi5_startupChannel(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_StartupOptions *options)
start the channel with the selected options
Definition: IfxPsi5_Psi5.h:512
IfxPsi5_Psi5_Config::slowClock
IfxPsi5_Psi5_Clock slowClock
Specifies the slower f125 clock properties.
Definition: IfxPsi5_Psi5.h:334
IfxPsi5_Verbose
IfxPsi5_Verbose
MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode.
Definition: IfxPsi5.h:228
IfxPsi5_Psi5_StartupOptions
startup related options TBD
Definition: IfxPsi5_Psi5.h:360
IfxPsi5_Psi5_TransmitControl::payloadLength
uint32 payloadLength
Specifies the payload length to be sent.
Definition: IfxPsi5_Psi5.h:284
IfxPsi5_Psi5_FrameData::slotCounter
uint8 slotCounter
Slot counter.
Definition: IfxPsi5_Psi5.h:193
IfxPsi5_Psi5_Clock
Clock configuration data structure.
Definition: IfxPsi5_Psi5.h:178
IfxPsi5_Psi5_Clock::frequency
uint32 frequency
Specifies the frequency for the clock.
Definition: IfxPsi5_Psi5.h:180
IfxPsi5_Psi5_PulseGeneration
Sync pulse generation configuration structure.
Definition: IfxPsi5_Psi5.h:223
IfxPsi5_Psi5_ChannelTrigger
channel trigger configuration structure
Definition: IfxPsi5_Psi5.h:170
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxPsi5_Psi5_FrameData::crc
uint8 crc
Received crc.
Definition: IfxPsi5_Psi5.h:190
IFXPSI5_NUM_SLOTS
#define IFXPSI5_NUM_SLOTS
Definition: IfxPsi5_cfg.h:68
IfxPsi5_Psi5_FrameData::noFrameReceivedError
uint8 noFrameReceivedError
No frame received flag.
Definition: IfxPsi5_Psi5.h:197
IfxPsi5_Psi5_Frame
Psi5 frame data union.
Definition: IfxPsi5_Psi5.h:344
IfxPsi5_Psi5_TimeStampConfig
Timestamp configuration data structure.
Definition: IfxPsi5_Psi5.h:269
IfxPsi5_Psi5_TransmitControl
Transmit control configuration structure.
Definition: IfxPsi5_Psi5.h:277
IfxPsi5_FrameExpectation
IfxPsi5_FrameExpectation
MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control.
Definition: IfxPsi5.h:145
IfxPsi5_Psi5_FrameData::receiveMemoryOverflowError
uint8 receiveMemoryOverflowError
Receive buffer overflow error flag.
Definition: IfxPsi5_Psi5.h:198
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPsi5_Psi5_TransmitControl::inhibitingAutomaticTransferEnabled
boolean inhibitingAutomaticTransferEnabled
Specifies whether automatic transfer from the shift registers SSRL/H to SORL/H is inhibited or not...
Definition: IfxPsi5_Psi5.h:283
IfxPsi5_Psi5_Rdm::lowWord
uint32 lowWord
Lower 32 bits of the Psi5 frame.
Definition: IfxPsi5_Psi5.h:238
IfxPsi5_Psi5_Channel::channel
Ifx_PSI5_CH * channel
Pointer to the channel registers.
Definition: IfxPsi5_Psi5.h:309
IfxPsi5_MessagingBits
IfxPsi5_MessagingBits
MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence.
Definition: IfxPsi5.h:153
IfxPsi5_Psi5_Rdm
Psi5 frame in double word format.
Definition: IfxPsi5_Psi5.h:236
IfxPsi5_Psi5_Rds
Psi5 serial message as unsigned 32 bit value.
Definition: IfxPsi5_Psi5.h:244
IfxPsi5_Psi5_Channel::channelId
IfxPsi5_ChannelId channelId
Specifies the channel index.
Definition: IfxPsi5_Psi5.h:310
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxPsi5_Psi5_ChannelTrigger::channelTriggerValue
uint32 channelTriggerValue
Specifies the channel trigger value CTV.
Definition: IfxPsi5_Psi5.h:172
IfxPsi5_ClockType
IfxPsi5_ClockType
Clock type.
Definition: IfxPsi5.h:103
IfxPsi5_Psi5_Config
PSI5 module configuration structure.
Definition: IfxPsi5_Psi5.h:330
IfxPsi5_Psi5_ChannelConfig::inputOutputControl
IfxPsi5_Psi5_InputOutputControl inputOutputControl
Specifies the configuration for input output control.
Definition: IfxPsi5_Psi5.h:324
IfxPsi5_Psi5_SerialMessage::rds
IfxPsi5_Psi5_Rds rds
Psi5 serial message as unsigned 32 bit value.
Definition: IfxPsi5_Psi5.h:354
IfxPsi5_Psi5_PulseGeneration::pulseLength
uint32 pulseLength
Specifies the standard pulse width without data coding for standard pulse width or for coding a &#39;0&#39;...
Definition: IfxPsi5_Psi5.h:225
IfxPsi5_Psi5_Rds::value
uint32 value
32 bit value of the Psi5 serial message
Definition: IfxPsi5_Psi5.h:246
IfxPsi5_Psi5_SerialMessage::message
IfxPsi5_Psi5_Message message
Psi5 serial message with individual members.
Definition: IfxPsi5_Psi5.h:355
IfxPsi5_Psi5_ChannelConfig::pinsConfig
IFX_CONST IfxPsi5_Psi5_PinsConfig * pinsConfig
Pin Configuration structure.
Definition: IfxPsi5_Psi5.h:325
IfxPsi5_TriggerType
IfxPsi5_TriggerType
Trigger type.
Definition: IfxPsi5.h:219
IfxPsi5_BaudRate
IfxPsi5_BaudRate
MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection.
Definition: IfxPsi5.h:87
IfxPsi5_Psi5_ReceiveControl::frameTimestampSelect
IfxPsi5_TimestampRegister frameTimestampSelect
Specifies the timestamp register selection for start of frames.
Definition: IfxPsi5_Psi5.h:263
IfxPsi5_Psi5_Config::timestampCounterA
IfxPsi5_Psi5_TimeStampConfig timestampCounterA
Specifies the time stamp counter A properties.
Definition: IfxPsi5_Psi5.h:337
IfxPsi5_Psi5_ChannelConfig::sendControl
IfxPsi5_Psi5_TransmitControl sendControl
Specifies the configuration for transmission.
Definition: IfxPsi5_Psi5.h:323
IfxPsi5_Psi5_enableModule
IFX_EXTERN void IfxPsi5_Psi5_enableModule(Ifx_PSI5 *psi5)
Enable PSI5 kernel.
Definition: IfxPsi5_Psi5.c:62
IfxPsi5_Psi5_Message::messageId
uint8 messageId
Serial message Id.
Definition: IfxPsi5_Psi5.h:215
IfxPsi5_Psi5_Clock::mode
IfxPsi5_DividerMode mode
Specifies the mode of division for the clock.
Definition: IfxPsi5_Psi5.h:181
IfxPsi5_Psi5_PinsConfig::outMode
IfxPort_OutputMode outMode
The pin output mode which should be configured.
Definition: IfxPsi5_Psi5.h:298
IfxPsi5_Psi5_StartupOptions::a
uint8 a
TBD.
Definition: IfxPsi5_Psi5.h:362
IfxPsi5_Psi5_PulseGeneration::externalTimeBaseSelect
IfxPsi5_Trigger externalTimeBaseSelect
Specifies the clock source for CTV in the case of external.
Definition: IfxPsi5_Psi5.h:228
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxPsi5_Psi5_StartupOptions::b
uint32 b
TBD.
Definition: IfxPsi5_Psi5.h:363
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxPsi5_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5_PinMap.h:65
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxPsi5_Slot
IfxPsi5_Slot
MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id.
Definition: IfxPsi5.h:169
IfxPsi5_Psi5_initializeClock
IFX_EXTERN uint32 IfxPsi5_Psi5_initializeClock(Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
Configure the fracDiv clock.
Definition: IfxPsi5_Psi5.c:409
IfxPsi5_Psi5_Channel::module
IfxPsi5_Psi5 * module
The PSI5 handle structure.
Definition: IfxPsi5_Psi5.h:308
IfxPsi5_Psi5_Frame::frame
IfxPsi5_Psi5_FrameData frame
Psi5 frame data structure with individual members.
Definition: IfxPsi5_Psi5.h:347
IfxPsi5_Psi5_ChannelConfig::module
IFX_CONST IfxPsi5_Psi5 * module
Specifies pointer to the IfxPsi5_Psi5 module handle.
Definition: IfxPsi5_Psi5.h:317
IfxPsi5_Psi5_TransmitControl::startSequenceGenerationEnabled
boolean startSequenceGenerationEnabled
Specifies whether the start sequence generation is turned on or not.
Definition: IfxPsi5_Psi5.h:282
IfxPsi5_Psi5_FrameData
Psi5 frame data structure with individual members.
Definition: IfxPsi5_Psi5.h:187
IfxPsi5_Psi5_PulseGeneration::externalTriggerSelect
IfxPsi5_Trigger externalTriggerSelect
Specifies the trigger source in case of external triggerring.
Definition: IfxPsi5_Psi5.h:230


iLLD_TC26B: IfxPsi5_cfg.c Source File

  • _Impl
IfxPsi5_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_cfg.c
3 * \brief PSI5 on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxPsi5_cfg.h"
IfxPsi5_cfg.h
PSI5 on-chip implementation data.


iLLD_TC26B: IfxPsi5_cfg.h Source File

  • _Impl
IfxPsi5_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_cfg.h
3 * \brief PSI5 on-chip implementation data
4 * \ingroup IfxLld_Psi5
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Psi5 PSI5
44 * \ingroup IfxLld
45 * \defgroup IfxLld_Psi5_Impl Implementation
46 * \ingroup IfxLld_Psi5
47 * \defgroup IfxLld_Psi5_Std Standard Driver
48 * \ingroup IfxLld_Psi5
49 * \defgroup IfxLld_Psi5_Impl_Enumerations Enumerations
50 * \ingroup IfxLld_Psi5_Impl
51 */
52
53 #ifndef IFXPSI5_CFG_H
54 #define IFXPSI5_CFG_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 /******************************************************************************/
61 /*-----------------------------------Macros-----------------------------------*/
62 /******************************************************************************/
63
64 #define IFXPSI5_STEP_RANGE 1024
65
66 #define IFXPSI5_NUM_WDTS 7
67
68 #define IFXPSI5_NUM_SLOTS 6
69
70 #define IFXPSI5_ENABLE_CHANNELTRIGGER (1 << 8)
71
72 #define IFXPSI5_ENABLE_CHANNEL (1 << 16)
73
74 #define IFXPSI5_DEFAULT_SLOWCLOCK_FREQ 4000000
75
76 #define IFXPSI5_DEFAULT_FASTCLOCK_FREQ 6000000
77
78 #define IFXPSI5_DEFAULT_TIMESTAMP_FREQ 1000000
79
80 #define IFXPSI5_NUM_CHANNELS 3
81
82 #define IFXPSI5_NUM_MODULES (1)
83
84 /******************************************************************************/
85 /*-------------------------------Enumerations---------------------------------*/
86 /******************************************************************************/
87
88 /** \brief Channel Id
89 */
90 typedef enum
91 {
92 IfxPsi5_ChannelId_none = -1, /**< \brief None of the Ifx_PSI5 Channels */
93 IfxPsi5_ChannelId_0 = 0, /**< \brief Specifies PSI5 channel 0 */
94 IfxPsi5_ChannelId_1 = 1, /**< \brief Specifies PSI5 channel 1 */
95 IfxPsi5_ChannelId_2 = 2 /**< \brief Specifies PSI5 channel 2 */
96 } IfxPsi5_ChannelId;
97
98 #endif /* IFXPSI5_CFG_H */
IfxPsi5_ChannelId_0
Specifies PSI5 channel 0.
Definition: IfxPsi5_cfg.h:93
IfxPsi5_ChannelId_2
Specifies PSI5 channel 2.
Definition: IfxPsi5_cfg.h:95
IfxPsi5_ChannelId
IfxPsi5_ChannelId
Channel Id.
Definition: IfxPsi5_cfg.h:90
IfxPsi5_ChannelId_none
None of the Ifx_PSI5 Channels.
Definition: IfxPsi5_cfg.h:92
IfxPsi5_ChannelId_1
Specifies PSI5 channel 1.
Definition: IfxPsi5_cfg.h:94


iLLD_TC26B: IfxPsi5s.c Source File

  • Psi5s
  • Std
IfxPsi5s.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s.c
3 * \brief PSI5S basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxPsi5s.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 void IfxPsi5s_disableAscReceiver(Ifx_PSI5S *psi5s)
55 {
56 psi5s->WHBCON.B.CLRREN = 1;
57 }
58
59
60 void IfxPsi5s_disableModule(Ifx_PSI5S *psi5s)
61 {
62 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
63 IfxScuWdt_clearCpuEndinit(passwd);
64 psi5s->CLC.B.DISR = 1;
65 IfxScuWdt_setCpuEndinit(passwd);
66 }
67
68
69 void IfxPsi5s_enableAscReceiver(Ifx_PSI5S *psi5s)
70 {
71 psi5s->WHBCON.B.SETREN = 1;
72 }
73
74
75 void IfxPsi5s_enableDisableChannelTriggerCounters(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
76 {
77 uint32 enableChannels = ((((psi5s->GCR.U >> IFX_PSI5S_GCR_ETC0_OFF) & ~mask) | channels) << IFX_PSI5S_GCR_ETC0_OFF);
78
79 psi5s->GCR.U = (psi5s->GCR.U & ~(IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK)) | enableChannels;
80 }
81
82
83 void IfxPsi5s_enableDisableChannels(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
84 {
85 uint32 enableChannels = ((((psi5s->GCR.U >> IFX_PSI5S_GCR_CEN0_OFF) & ~mask) | channels) << IFX_PSI5S_GCR_CEN0_OFF);
86
87 psi5s->GCR.U = (psi5s->GCR.U & ~(IFXPSI5S_GCR_CHANNELS_ENABLE_MASK)) | enableChannels;
88 }
89
90
91 boolean IfxPsi5s_getReadFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
92 {
93 return psi5s->INTSTAT[channelId].B.RDI;
94 }
95
96
97 boolean IfxPsi5s_getSuccessfullyReceivedFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
98 {
99 return psi5s->INTSTAT[channelId].B.RSI;
100 }
101
102
103 void IfxPsi5s_resetModule(Ifx_PSI5S *psi5s)
104 {
105 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
106
107 IfxScuWdt_clearCpuEndinit(passwd);
108 psi5s->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
109 psi5s->KRST1.B.RST = 1;
110 IfxScuWdt_setCpuEndinit(passwd);
111
112 while (0 == psi5s->KRST0.B.RSTSTAT) /* Wait until reset is executed */
113
114 {}
115
116 IfxScuWdt_clearCpuEndinit(passwd);
117 psi5s->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
118 IfxScuWdt_setCpuEndinit(passwd);
119 }
120
121
122 void IfxPsi5s_startAscTransactions(Ifx_PSI5S *psi5s)
123 {
124 psi5s->CON.B.R = 1;
125 }
126
127
128 void IfxPsi5s_stopAscTransactions(Ifx_PSI5S *psi5s)
129 {
130 psi5s->CON.B.R = 0;
131 }
IfxPsi5s_ChannelId
IfxPsi5s_ChannelId
PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID.
Definition: IfxPsi5s.h:116
IfxPsi5s.h
PSI5S basic functionality.
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPsi5s_disableModule
void IfxPsi5s_disableModule(Ifx_PSI5S *psi5s)
Disable PSI5S kernel.
Definition: IfxPsi5s.c:60
IfxPsi5s_enableAscReceiver
void IfxPsi5s_enableAscReceiver(Ifx_PSI5S *psi5s)
Enable ASC receiver.
Definition: IfxPsi5s.c:69
IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK
#define IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK
Definition: IfxPsi5s_cfg.h:84
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IFXPSI5S_GCR_CHANNELS_ENABLE_MASK
#define IFXPSI5S_GCR_CHANNELS_ENABLE_MASK
//0x00FF0000
Definition: IfxPsi5s_cfg.h:82
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxPsi5s_getSuccessfullyReceivedFrameStatus
boolean IfxPsi5s_getSuccessfullyReceivedFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Indicates the successful reception of a frame.
Definition: IfxPsi5s.c:97
IfxPsi5s_startAscTransactions
void IfxPsi5s_startAscTransactions(Ifx_PSI5S *psi5s)
Start ASC transactions.
Definition: IfxPsi5s.c:122
IfxPsi5s_getReadFrameStatus
boolean IfxPsi5s_getReadFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s.c:91
IfxPsi5s_disableAscReceiver
void IfxPsi5s_disableAscReceiver(Ifx_PSI5S *psi5s)
Asc receiver is disabled.
Definition: IfxPsi5s.c:54
IfxPsi5s_stopAscTransactions
void IfxPsi5s_stopAscTransactions(Ifx_PSI5S *psi5s)
Definition: IfxPsi5s.c:128
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPsi5s_resetModule
void IfxPsi5s_resetModule(Ifx_PSI5S *psi5s)
resets PSI5S kernel
Definition: IfxPsi5s.c:103
IfxPsi5s_enableDisableChannelTriggerCounters
void IfxPsi5s_enableDisableChannelTriggerCounters(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter.
Definition: IfxPsi5s.c:75
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxPsi5s_enableDisableChannels
void IfxPsi5s_enableDisableChannels(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter.
Definition: IfxPsi5s.c:83


iLLD_TC26B: IfxPsi5s.h Source File

  • Psi5s
  • Std
IfxPsi5s.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s.h
3 * \brief PSI5S basic functionality
4 * \ingroup IfxLld_Psi5s
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Psi5s_Std_Enumerations Enumerations
44 * \ingroup IfxLld_Psi5s_Std
45 * \defgroup IfxLld_Psi5s_Std_Channel Channel Operative Functions
46 * \ingroup IfxLld_Psi5s_Std
47 * \defgroup IfxLld_Psi5s_Std_IO IO Pin Configuration Functions
48 * \ingroup IfxLld_Psi5s_Std
49 * \defgroup IfxLld_Psi5s_Std_Interrupt Interrupt configuration functions
50 * \ingroup IfxLld_Psi5s_Std
51 * \defgroup IfxLld_Psi5s_Std_Module Module Functions
52 * \ingroup IfxLld_Psi5s_Std
53 */
54
55 #ifndef IFXPSI5S_H
56 #define IFXPSI5S_H 1
57
58 /******************************************************************************/
59 /*----------------------------------Includes----------------------------------*/
60 /******************************************************************************/
61
62 #include "_Impl/IfxPsi5s_cfg.h"
63 #include "_PinMap/IfxPsi5s_PinMap.h"
64 #include "Cpu/Std/IfxCpu_Intrinsics.h"
65 #include "IfxPsi5s_bf.h"
66 #include "IfxPsi5s_reg.h"
67 #include "Src/Std/IfxSrc.h"
68 #include "Scu/Std/IfxScuCcu.h"
69
70 /******************************************************************************/
71 /*--------------------------------Enumerations--------------------------------*/
72 /******************************************************************************/
73
74 /** \addtogroup IfxLld_Psi5s_Std_Enumerations
75 * \{ */
76 /** \brief MODULE_PSI5S.IOCR.ALTI:Alternate input
77 */
78 typedef enum
79 {
80 IfxPsi5s_AlternateInput_0 = 0, /**< \brief Alternate Input 0 */
81 IfxPsi5s_AlternateInput_1, /**< \brief Alternate Input 1 */
82 IfxPsi5s_AlternateInput_2, /**< \brief Alternate Input 2 */
83 IfxPsi5s_AlternateInput_3 /**< \brief Alternate Input 3 */
84 } IfxPsi5s_AlternateInput;
85
86 /** \brief MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select
87 */
88 typedef enum
89 {
90 IfxPsi5s_AscBaudratePrescalar_divideBy2 = 0, /**< \brief Divide by 2 is selected for baudrate timer prescalar */
91 IfxPsi5s_AscBaudratePrescalar_divideBy3 = 1 /**< \brief Divide by 3 is selected for baudrate timer prescalar */
92 } IfxPsi5s_AscBaudratePrescalar;
93
94 /** \brief MODULE_PSI5S.CON.M:ASC mode of operation
95 */
96 typedef enum
97 {
98 IfxPsi5s_AscMode_sync = 0, /**< \brief Synchronous mode */
99 IfxPsi5s_AscMode_async_8bitData = 1, /**< \brief Asynchronous mode with 8 bit data */
100 IfxPsi5s_AscMode_async_7bitDataWithParity = 3, /**< \brief Asynchronous mode with 7 bit data with parity */
101 IfxPsi5s_AscMode_async_9bitData = 4, /**< \brief Asynchronous mode with 9 bit data */
102 IfxPsi5s_AscMode_async_8bitDataWithWakeup = 5, /**< \brief Asynchronous mode with 8 bit data with wakeup */
103 IfxPsi5s_AscMode_async_8bitDataWithParity = 7 /**< \brief Asynchronous mode with 8 bit data with parity */
104 } IfxPsi5s_AscMode;
105
106 /** \brief MODULE_PSI5S.CON.STP: Number of stop bits
107 */
108 typedef enum
109 {
110 IfxPsi5s_AscStopBits_1 = 0, /**< \brief 1 stop bit */
111 IfxPsi5s_AscStopBits_2 /**< \brief 2 stop bit */
112 } IfxPsi5s_AscStopBits;
113
114 /** \brief PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID.
115 */
116 typedef enum
117 {
118 IfxPsi5s_ChannelId_0 = 0, /**< \brief Ifx_PSI5S Channel 0 */
119 IfxPsi5s_ChannelId_1, /**< \brief Ifx_PSI5S Channel 1 */
120 IfxPsi5s_ChannelId_2, /**< \brief Ifx_PSI5S Channel 2 */
121 IfxPsi5s_ChannelId_3, /**< \brief Ifx_PSI5S Channel 3 */
122 IfxPsi5s_ChannelId_4, /**< \brief Ifx_PSI5S Channel 4 */
123 IfxPsi5s_ChannelId_5, /**< \brief Ifx_PSI5S Channel 5 */
124 IfxPsi5s_ChannelId_6, /**< \brief Ifx_PSI5S Channel 6 */
125 IfxPsi5s_ChannelId_7, /**< \brief Ifx_PSI5S Channel 7 */
126 IfxPsi5s_ChannelId_none = -1 /**< \brief None of the Ifx_PSI5S Channels */
127 } IfxPsi5s_ChannelId;
128
129 /** \brief Clock Selection
130 */
131 typedef enum
132 {
133 IfxPsi5s_ClockType_fracDiv = 0, /**< \brief Fractional Divide clock */
134 IfxPsi5s_ClockType_timeStamp = 1, /**< \brief Timestamp clock */
135 IfxPsi5s_ClockType_ascFracDiv = 2, /**< \brief Asc Fractional divider clock */
136 IfxPsi5s_ClockType_ascOutput = 3 /**< \brief Asc output clock */
137 } IfxPsi5s_ClockType;
138
139 /** \brief MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity
140 */
141 typedef enum
142 {
143 IfxPsi5s_CrcOrParity_parity = 0, /**< \brief parity selection */
144 IfxPsi5s_CrcOrParity_crc = 1 /**< \brief CRC selection */
145 } IfxPsi5s_CrcOrParity;
146
147 /** \brief MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode
148 */
149 typedef enum
150 {
151 IfxPsi5s_DividerMode_spb = 0, /**< \brief divider mode is off */
152 IfxPsi5s_DividerMode_normal = 1, /**< \brief divider mode is normal */
153 IfxPsi5s_DividerMode_fractional = 2, /**< \brief divider mode is fractional */
154 IfxPsi5s_DividerMode_off = 3 /**< \brief divider mode is off */
155 } IfxPsi5s_DividerMode;
156
157 /** \brief MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types
158 */
159 typedef enum
160 {
161 IfxPsi5s_EnhancedProtocol_toothGapMethod = 0, /**< \brief toothGapMethod Enhanced protocol type */
162 IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 = 1, /**< \brief pulseWidth_frameFormat_1to3 Enhanced protocol type */
163 IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 = 3 /**< \brief pulseWidth_frameFormat_4 Enhanced protocol type */
164 } IfxPsi5s_EnhancedProtocol;
165
166 /** \brief MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation
167 */
168 typedef enum
169 {
170 IfxPsi5s_FrameId_frameHeader = 0, /**< \brief Frame ID is updated from packet frame header (Sync mode) */
171 IfxPsi5s_FrameId_rollingNumber = 1 /**< \brief Frame ID is a rolling number 0 .. 5 copied from FCNT */
172 } IfxPsi5s_FrameId;
173
174 /** \brief MODULE_PSI5S.GCR.IDT:Idle time bit count
175 */
176 typedef enum
177 {
178 IfxPsi5s_IdleTime_1 = 0, /**< \brief 1 bit Idle time */
179 IfxPsi5s_IdleTime_2, /**< \brief 2 bit Idle time */
180 IfxPsi5s_IdleTime_3, /**< \brief 3 bit Idle time */
181 IfxPsi5s_IdleTime_4, /**< \brief 4 bit Idle time */
182 IfxPsi5s_IdleTime_5, /**< \brief 5 bit Idle time */
183 IfxPsi5s_IdleTime_6, /**< \brief 6 bit Idle time */
184 IfxPsi5s_IdleTime_7, /**< \brief 7 bit Idle time */
185 IfxPsi5s_IdleTime_8, /**< \brief 8 bit Idle time */
186 IfxPsi5s_IdleTime_9, /**< \brief 9 bit Idle time */
187 IfxPsi5s_IdleTime_10, /**< \brief 10 bit Idle time */
188 IfxPsi5s_IdleTime_11, /**< \brief 11 bit Idle time */
189 IfxPsi5s_IdleTime_12, /**< \brief 12 bit Idle time */
190 IfxPsi5s_IdleTime_13, /**< \brief 13 bit Idle time */
191 IfxPsi5s_IdleTime_14, /**< \brief 14 bit Idle time */
192 IfxPsi5s_IdleTime_15, /**< \brief 15 bit Idle time */
193 IfxPsi5s_IdleTime_16 /**< \brief 16 bit Idle time */
194 } IfxPsi5s_IdleTime;
195
196 /** \brief Enable/Disable Loop back Mode
197 */
198 typedef enum
199 {
200 IfxPsi5s_LoopBackMode_disable = 0, /**< \brief loop-back mode disabled */
201 IfxPsi5s_LoopBackMode_enable = 1 /**< \brief loop-back mode enabled */
202 } IfxPsi5s_LoopBackMode;
203
204 /** \brief Messaging bits presence
205 */
206 typedef enum
207 {
208 IfxPsi5s_MessagingBits_absent = 0, /**< \brief No messaging bits */
209 IfxPsi5s_MessagingBits_present = 1 /**< \brief 2 messaging bits */
210 } IfxPsi5s_MessagingBits;
211
212 /** \brief MODULE_PSI5S.NFC.NFx:Expected Psi5s frames
213 */
214 typedef enum
215 {
216 IfxPsi5s_NumberExpectedFrames_1 = 1, /**< \brief 1 psi5s frame expected */
217 IfxPsi5s_NumberExpectedFrames_2, /**< \brief 2 psi5s frame expected */
218 IfxPsi5s_NumberExpectedFrames_3, /**< \brief 3 psi5s frame expected */
219 IfxPsi5s_NumberExpectedFrames_4, /**< \brief 4 psi5s frame expected */
220 IfxPsi5s_NumberExpectedFrames_5, /**< \brief 5 psi5s frame expected */
221 IfxPsi5s_NumberExpectedFrames_6 /**< \brief 6 psi5s frame expected */
222 } IfxPsi5s_NumberExpectedFrames;
223
224 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
225 * Definition in Ifx_PSI5S.CLC.B.EDIS
226 */
227 typedef enum
228 {
229 IfxPsi5s_SleepMode_enable = 0, /**< \brief enables sleep mode */
230 IfxPsi5s_SleepMode_disable = 1 /**< \brief disables sleep mode */
231 } IfxPsi5s_SleepMode;
232
233 /** \brief OCDS Suspend Control (OCDS.SUS)
234 */
235 typedef enum
236 {
237 IfxPsi5s_SuspendMode_none = 0, /**< \brief No suspend */
238 IfxPsi5s_SuspendMode_hard = 1, /**< \brief Hard Suspend */
239 IfxPsi5s_SuspendMode_soft = 2 /**< \brief Soft Suspend */
240 } IfxPsi5s_SuspendMode;
241
242 /** \brief MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base
243 */
244 typedef enum
245 {
246 IfxPsi5s_TimeBase_internal = 0, /**< \brief Internal time stamp clock */
247 IfxPsi5s_TimeBase_external = 1 /**< \brief External GTM inputs */
248 } IfxPsi5s_TimeBase;
249
250 /** \brief MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register
251 */
252 typedef enum
253 {
254 IfxPsi5s_TimestampRegister_a = 0, /**< \brief Timestamp register A */
255 IfxPsi5s_TimestampRegister_b = 1 /**< \brief Timestamp register B */
256 } IfxPsi5s_TimestampRegister;
257
258 /** \brief MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger
259 */
260 typedef enum
261 {
262 IfxPsi5s_TimestampTrigger_syncPulse = 0, /**< \brief Timestamp trigger on sync pulse */
263 IfxPsi5s_TimestampTrigger_frame = 1 /**< \brief Timestamp trigger on any frame */
264 } IfxPsi5s_TimestampTrigger;
265
266 /** \brief MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id
267 */
268 typedef enum
269 {
270 IfxPsi5s_Trigger_0 = 0, /**< \brief Trigger 0 */
271 IfxPsi5s_Trigger_1, /**< \brief Trigger 1 */
272 IfxPsi5s_Trigger_2, /**< \brief Trigger 2 */
273 IfxPsi5s_Trigger_3, /**< \brief Trigger 3 */
274 IfxPsi5s_Trigger_4, /**< \brief Trigger 4 */
275 IfxPsi5s_Trigger_5, /**< \brief Trigger 5 */
276 IfxPsi5s_Trigger_6, /**< \brief Trigger 6 */
277 IfxPsi5s_Trigger_7 /**< \brief Trigger 7 */
278 } IfxPsi5s_Trigger;
279
280 /** \brief Trigger type defined in
281 */
282 typedef enum
283 {
284 IfxPsi5s_TriggerType_periodic = 0, /**< \brief Periodic trigger */
285 IfxPsi5s_TriggerType_external = 1 /**< \brief External trigger */
286 } IfxPsi5s_TriggerType;
287
288 /** \brief MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count
289 */
290 typedef enum
291 {
292 IfxPsi5s_UartFrameCount_3 = 0, /**< \brief 3 UART frames */
293 IfxPsi5s_UartFrameCount_4, /**< \brief 4 UART frames */
294 IfxPsi5s_UartFrameCount_5, /**< \brief 5 UART frames */
295 IfxPsi5s_UartFrameCount_6 /**< \brief 6 UART frames */
296 } IfxPsi5s_UartFrameCount;
297
298 /** \brief MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode
299 */
300 typedef enum
301 {
302 IfxPsi5s_WatchdogTimerMode_frame = 0, /**< \brief Watch Dog Timer is restarted on reception of each recoverable frame (async mode) */
303 IfxPsi5s_WatchdogTimerMode_syncPulse = 1 /**< \brief Watch Dog Timer is restarted on Sync Pulse and stopped at reception of the last frame configured in NFC.NFx.(sync mode) */
304 } IfxPsi5s_WatchdogTimerMode;
305
306 /** \} */
307
308 /** \addtogroup IfxLld_Psi5s_Std_Channel
309 * \{ */
310
311 /******************************************************************************/
312 /*-------------------------Global Function Prototypes-------------------------*/
313 /******************************************************************************/
314
315 /** \brief Asc receiver is disabled
316 * \param psi5s Pointer to PSI5S module registers
317 * \return None
318 */
319 IFX_EXTERN void IfxPsi5s_disableAscReceiver(Ifx_PSI5S *psi5s);
320
321 /** \brief Enable ASC receiver
322 * \param psi5s pointer to the PSI5S register space
323 * \return None
324 */
325 IFX_EXTERN void IfxPsi5s_enableAscReceiver(Ifx_PSI5S *psi5s);
326
327 /** \brief Enable/disable any combination of channel trigger counters selected by mask parameter
328 * \param psi5s pointer to the PSI5S register space
329 * \param channels specifies the channel trigger counters which should be enabled/disabled
330 * \param mask specifies the channel trigger counters which should be modified
331 * \return None
332 */
333 IFX_EXTERN void IfxPsi5s_enableDisableChannelTriggerCounters(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask);
334
335 /** \brief Enable/disable any combination of channels selected by mask parameter
336 * \param psi5s pointer to the PSI5S register space
337 * \param channels specifies the channels which should be enabled/disabled
338 * \param mask specifies the channels which should be modified
339 * \return None
340 */
341 IFX_EXTERN void IfxPsi5s_enableDisableChannels(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask);
342
343 /** \brief Start ASC transactions
344 * \param psi5s pointer to the PSI5S register space
345 * \return None
346 */
347 IFX_EXTERN void IfxPsi5s_startAscTransactions(Ifx_PSI5S *psi5s);
348
349 /**
350 * \param psi5s Pointer to PSI5S module registers
351 * \return None
352 */
353 IFX_EXTERN void IfxPsi5s_stopAscTransactions(Ifx_PSI5S *psi5s);
354
355 /** \} */
356
357 /** \addtogroup IfxLld_Psi5s_Std_IO
358 * \{ */
359
360 /******************************************************************************/
361 /*-------------------------Inline Function Prototypes-------------------------*/
362 /******************************************************************************/
363
364 /** \brief Initializes a CLK output
365 * \param clk the CLK Pin which should be configured
366 * \param outputMode the pin output mode which should be configured
367 * \param padDriver the pad driver mode which should be configured
368 * \return None
369 */
370 IFX_INLINE void IfxPsi5s_initClkPin(const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
371
372 /** \brief Initializes a RX input
373 * \param rx the RX Pin which should be configured
374 * \param inputMode the pin input mode which should be configured
375 * \param padDriver the pad driver mode which should be configured
376 * \return None
377 */
378 IFX_INLINE void IfxPsi5s_initRxPin(const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
379
380 /** \brief Initializes a TX output
381 * \param tx the TX Pin which should be configured
382 * \param outputMode the pin output mode which should be configured
383 * \param padDriver the pad driver mode which should be configured
384 * \return None
385 */
386 IFX_INLINE void IfxPsi5s_initTxPin(const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
387
388 /** \brief Selects the alternate input for Rx signal
389 * \param psi5s pointer to PSI5S registers
390 * \param alti alternate input selection of Rx signal
391 * \return None
392 */
393 IFX_INLINE void IfxPsi5s_setRxInput(Ifx_PSI5S *psi5s, IfxPsi5s_AlternateInput alti);
394
395 /** \} */
396
397 /** \addtogroup IfxLld_Psi5s_Std_Module
398 * \{ */
399
400 /******************************************************************************/
401 /*-------------------------Inline Function Prototypes-------------------------*/
402 /******************************************************************************/
403
404 /** \brief Returns the module's suspend state.
405 * TRUE :if module is suspended.
406 * FALSE:if module is not yet suspended.
407 * \param psi5s Pointer to PSI5S module registers
408 * \return Suspend status (TRUE / FALSE)
409 */
410 IFX_INLINE boolean IfxPsi5s_isModuleSuspended(Ifx_PSI5S *psi5s);
411
412 /** \brief enable / disable sleep mode
413 * \param psi5s Pointer to PSI5S register
414 * \param mode sleep mode (enable/disable)
415 * \return None
416 */
417 IFX_INLINE void IfxPsi5s_setSleepMode(Ifx_PSI5S *psi5s, IfxPsi5s_SleepMode mode);
418
419 /** \brief Configure the Module to Hard/Soft suspend mode.
420 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
421 * \param psi5s Pointer to PSI5S module registers
422 * \param mode Module suspend mode
423 * \return None
424 */
425 IFX_INLINE void IfxPsi5s_setSuspendMode(Ifx_PSI5S *psi5s, IfxPsi5s_SuspendMode mode);
426
427 /******************************************************************************/
428 /*-------------------------Global Function Prototypes-------------------------*/
429 /******************************************************************************/
430
431 /** \brief Disable PSI5S kernel
432 * \param psi5s pointer to the base of PSI5S register space
433 * \return None
434 */
435 IFX_EXTERN void IfxPsi5s_disableModule(Ifx_PSI5S *psi5s);
436
437 /** \brief Get the received psi5s frame for the channel
438 * \param psi5s Pointer to PSI5S Module
439 * \param channelId channel ID
440 * \return Frame Status
441 */
442 IFX_EXTERN boolean IfxPsi5s_getReadFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId);
443
444 /** \brief Indicates the successful reception of a frame.
445 * \param psi5s Pointer to PSI5S module registers
446 * \param channelId Channel Number
447 */
448 IFX_EXTERN boolean IfxPsi5s_getSuccessfullyReceivedFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId);
449
450 /** \brief resets PSI5S kernel
451 * \param psi5s pointer to PSI5S registers
452 * \return None
453 */
454 IFX_EXTERN void IfxPsi5s_resetModule(Ifx_PSI5S *psi5s);
455
456 /** \} */
457
458 /******************************************************************************/
459 /*---------------------Inline Function Implementations------------------------*/
460 /******************************************************************************/
461
462 IFX_INLINE void IfxPsi5s_initClkPin(const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
463 {
464 if (clk->pin.port != NULL_PTR)
465 {
466 IfxPort_setPinModeOutput(clk->pin.port, clk->pin.pinIndex, outputMode, clk->select);
467 IfxPort_setPinPadDriver(clk->pin.port, clk->pin.pinIndex, padDriver);
468 }
469 }
470
471
472 IFX_INLINE void IfxPsi5s_initRxPin(const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
473 {
474 if (rx->pin.port != NULL_PTR)
475 {
476 IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, inputMode);
477 IfxPort_setPinPadDriver(rx->pin.port, rx->pin.pinIndex, padDriver);
478 IfxPsi5s_setRxInput(rx->module, (IfxPsi5s_AlternateInput)rx->select);
479 }
480 }
481
482
483 IFX_INLINE void IfxPsi5s_initTxPin(const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
484 {
485 if (tx->pin.port != NULL_PTR)
486 {
487 IfxPort_setPinModeOutput(tx->pin.port, tx->pin.pinIndex, outputMode, tx->select);
488 IfxPort_setPinPadDriver(tx->pin.port, tx->pin.pinIndex, padDriver);
489 }
490 }
491
492
493 IFX_INLINE boolean IfxPsi5s_isModuleSuspended(Ifx_PSI5S *psi5s)
494 {
495 Ifx_PSI5S_OCS ocs;
496
497 // read the status
498 ocs.U = psi5s->OCS.U;
499
500 // return the status
501 return ocs.B.SUSSTA;
502 }
503
504
505 IFX_INLINE void IfxPsi5s_setRxInput(Ifx_PSI5S *psi5s, IfxPsi5s_AlternateInput alti)
506 {
507 psi5s->IOCR.B.ALTI = alti;
508 }
509
510
511 IFX_INLINE void IfxPsi5s_setSleepMode(Ifx_PSI5S *psi5s, IfxPsi5s_SleepMode mode)
512 {
513 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
514 IfxScuWdt_clearCpuEndinit(passwd);
515 psi5s->CLC.B.EDIS = mode;
516 IfxScuWdt_setCpuEndinit(passwd);
517 }
518
519
520 IFX_INLINE void IfxPsi5s_setSuspendMode(Ifx_PSI5S *psi5s, IfxPsi5s_SuspendMode mode)
521 {
522 Ifx_PSI5S_OCS ocs;
523
524 // remove protection and configure the suspend mode.
525 ocs.B.SUS_P = 1;
526 ocs.B.SUS = mode;
527 psi5s->OCS.U = ocs.U;
528 }
529
530
531 #endif /* IFXPSI5S_H */
IfxPsi5s_IdleTime_9
9 bit Idle time
Definition: IfxPsi5s.h:186
IfxPsi5s_IdleTime_1
1 bit Idle time
Definition: IfxPsi5s.h:178
IfxPsi5s_ClockType_fracDiv
Fractional Divide clock.
Definition: IfxPsi5s.h:133
IfxPsi5s_WatchdogTimerMode
IfxPsi5s_WatchdogTimerMode
MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode.
Definition: IfxPsi5s.h:300
IfxPsi5s_UartFrameCount_4
4 UART frames
Definition: IfxPsi5s.h:293
IfxPsi5s_ChannelId
IfxPsi5s_ChannelId
PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID.
Definition: IfxPsi5s.h:116
IfxPsi5s_FrameId_frameHeader
Frame ID is updated from packet frame header (Sync mode)
Definition: IfxPsi5s.h:170
IfxPsi5s_ChannelId_3
Ifx_PSI5S Channel 3.
Definition: IfxPsi5s.h:121
IfxPsi5s_AscBaudratePrescalar_divideBy3
Divide by 3 is selected for baudrate timer prescalar.
Definition: IfxPsi5s.h:91
IfxPsi5s_UartFrameCount_6
6 UART frames
Definition: IfxPsi5s.h:295
IfxPsi5s_Trigger_6
Trigger 6.
Definition: IfxPsi5s.h:276
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4
pulseWidth_frameFormat_4 Enhanced protocol type
Definition: IfxPsi5s.h:163
IfxPsi5s_CrcOrParity_crc
CRC selection.
Definition: IfxPsi5s.h:144
IfxPsi5s_AscBaudratePrescalar
IfxPsi5s_AscBaudratePrescalar
MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select.
Definition: IfxPsi5s.h:88
IfxPsi5s_Rx_In
RX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:56
IfxPsi5s_cfg.h
PSI5S on-chip implementation data.
IfxPsi5s_EnhancedProtocol
IfxPsi5s_EnhancedProtocol
MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types.
Definition: IfxPsi5s.h:159
IfxPsi5s_setSuspendMode
IFX_INLINE void IfxPsi5s_setSuspendMode(Ifx_PSI5S *psi5s, IfxPsi5s_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxPsi5s.h:520
IfxPsi5s_ChannelId_4
Ifx_PSI5S Channel 4.
Definition: IfxPsi5s.h:122
IfxPsi5s_Rx_In::module
Ifx_PSI5S * module
Base address.
Definition: IfxPsi5s_PinMap.h:58
IfxPsi5s_AscMode_async_8bitData
Asynchronous mode with 8 bit data.
Definition: IfxPsi5s.h:99
IfxPsi5s_TimestampTrigger
IfxPsi5s_TimestampTrigger
MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger.
Definition: IfxPsi5s.h:260
IfxPsi5s_TimestampRegister_b
Timestamp register B.
Definition: IfxPsi5s.h:255
IfxPsi5s_TimestampRegister
IfxPsi5s_TimestampRegister
MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register.
Definition: IfxPsi5s.h:252
IfxPsi5s_AscMode_async_9bitData
Asynchronous mode with 9 bit data.
Definition: IfxPsi5s.h:101
IfxPsi5s_DividerMode
IfxPsi5s_DividerMode
MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode.
Definition: IfxPsi5s.h:149
IfxPsi5s_MessagingBits_absent
No messaging bits.
Definition: IfxPsi5s.h:208
IfxPsi5s_NumberExpectedFrames_4
4 psi5s frame expected
Definition: IfxPsi5s.h:219
IfxPsi5s_IdleTime_11
11 bit Idle time
Definition: IfxPsi5s.h:188
IfxPsi5s_AscStopBits_1
1 stop bit
Definition: IfxPsi5s.h:110
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPsi5s_disableModule
IFX_EXTERN void IfxPsi5s_disableModule(Ifx_PSI5S *psi5s)
Disable PSI5S kernel.
Definition: IfxPsi5s.c:60
IfxPsi5s_NumberExpectedFrames_5
5 psi5s frame expected
Definition: IfxPsi5s.h:220
IfxPsi5s_DividerMode_normal
divider mode is normal
Definition: IfxPsi5s.h:152
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3
pulseWidth_frameFormat_1to3 Enhanced protocol type
Definition: IfxPsi5s.h:162
IfxPsi5s_setSleepMode
IFX_INLINE void IfxPsi5s_setSleepMode(Ifx_PSI5S *psi5s, IfxPsi5s_SleepMode mode)
enable / disable sleep mode
Definition: IfxPsi5s.h:511
IfxPsi5s_IdleTime
IfxPsi5s_IdleTime
MODULE_PSI5S.GCR.IDT:Idle time bit count.
Definition: IfxPsi5s.h:176
IfxPsi5s_enableAscReceiver
IFX_EXTERN void IfxPsi5s_enableAscReceiver(Ifx_PSI5S *psi5s)
Enable ASC receiver.
Definition: IfxPsi5s.c:69
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxPsi5s_initTxPin
IFX_INLINE void IfxPsi5s_initTxPin(const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxPsi5s.h:483
IfxPsi5s_ChannelId_none
None of the Ifx_PSI5S Channels.
Definition: IfxPsi5s.h:126
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxPsi5s_ClockType_ascFracDiv
Asc Fractional divider clock.
Definition: IfxPsi5s.h:135
IfxPsi5s_NumberExpectedFrames
IfxPsi5s_NumberExpectedFrames
MODULE_PSI5S.NFC.NFx:Expected Psi5s frames.
Definition: IfxPsi5s.h:214
IfxPsi5s_EnhancedProtocol_toothGapMethod
toothGapMethod Enhanced protocol type
Definition: IfxPsi5s.h:161
IfxPsi5s_AscMode_sync
Synchronous mode.
Definition: IfxPsi5s.h:98
IfxSrc.h
SRC basic functionality.
IfxPsi5s_TimestampRegister_a
Timestamp register A.
Definition: IfxPsi5s.h:254
IfxPsi5s_Rx_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxPsi5s_PinMap.h:60
IfxCpu_Intrinsics.h
IfxPsi5s_AlternateInput_2
Alternate Input 2.
Definition: IfxPsi5s.h:82
IfxPsi5s_AscMode_async_7bitDataWithParity
Asynchronous mode with 7 bit data with parity.
Definition: IfxPsi5s.h:100
IfxPsi5s_ClockType_timeStamp
Timestamp clock.
Definition: IfxPsi5s.h:134
IfxPsi5s_PinMap.h
PSI5S I/O map.
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxPsi5s_Clk_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxPsi5s_PinMap.h:75
IfxPsi5s_IdleTime_7
7 bit Idle time
Definition: IfxPsi5s.h:184
IfxPsi5s_Trigger_3
Trigger 3.
Definition: IfxPsi5s.h:273
IfxPsi5s_NumberExpectedFrames_6
6 psi5s frame expected
Definition: IfxPsi5s.h:221
IfxPsi5s_AlternateInput_0
Alternate Input 0.
Definition: IfxPsi5s.h:80
IfxPsi5s_CrcOrParity_parity
parity selection
Definition: IfxPsi5s.h:143
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
IfxPsi5s_IdleTime_8
8 bit Idle time
Definition: IfxPsi5s.h:185
IfxPsi5s_NumberExpectedFrames_2
2 psi5s frame expected
Definition: IfxPsi5s.h:217
IfxPsi5s_ChannelId_7
Ifx_PSI5S Channel 7.
Definition: IfxPsi5s.h:125
IfxPsi5s_AlternateInput_3
Alternate Input 3.
Definition: IfxPsi5s.h:83
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxPsi5s_LoopBackMode_enable
loop-back mode enabled
Definition: IfxPsi5s.h:201
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPsi5s_MessagingBits
IfxPsi5s_MessagingBits
Messaging bits presence.
Definition: IfxPsi5s.h:206
IfxPsi5s_IdleTime_3
3 bit Idle time
Definition: IfxPsi5s.h:180
IfxPsi5s_TimeBase_external
External GTM inputs.
Definition: IfxPsi5s.h:247
IfxPsi5s_LoopBackMode
IfxPsi5s_LoopBackMode
Enable/Disable Loop back Mode.
Definition: IfxPsi5s.h:198
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxPsi5s_TriggerType
IfxPsi5s_TriggerType
Trigger type defined in.
Definition: IfxPsi5s.h:282
IfxPsi5s_FrameId
IfxPsi5s_FrameId
MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation.
Definition: IfxPsi5s.h:168
IfxPsi5s_SuspendMode
IfxPsi5s_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxPsi5s.h:235
IfxPsi5s_getSuccessfullyReceivedFrameStatus
IFX_EXTERN boolean IfxPsi5s_getSuccessfullyReceivedFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Indicates the successful reception of a frame.
Definition: IfxPsi5s.c:97
IfxPsi5s_Trigger
IfxPsi5s_Trigger
MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id.
Definition: IfxPsi5s.h:268
IfxPsi5s_WatchdogTimerMode_syncPulse
Watch Dog Timer is restarted on Sync Pulse and stopped at reception of the last frame configured in N...
Definition: IfxPsi5s.h:303
IfxPsi5s_LoopBackMode_disable
loop-back mode disabled
Definition: IfxPsi5s.h:200
IfxPsi5s_DividerMode_off
divider mode is off
Definition: IfxPsi5s.h:154
IfxPsi5s_startAscTransactions
IFX_EXTERN void IfxPsi5s_startAscTransactions(Ifx_PSI5S *psi5s)
Start ASC transactions.
Definition: IfxPsi5s.c:122
IfxPsi5s_DividerMode_spb
divider mode is off
Definition: IfxPsi5s.h:151
IfxPsi5s_IdleTime_16
16 bit Idle time
Definition: IfxPsi5s.h:193
IfxPsi5s_IdleTime_14
14 bit Idle time
Definition: IfxPsi5s.h:191
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxPsi5s_ChannelId_6
Ifx_PSI5S Channel 6.
Definition: IfxPsi5s.h:124
IfxPsi5s_AscMode
IfxPsi5s_AscMode
MODULE_PSI5S.CON.M:ASC mode of operation.
Definition: IfxPsi5s.h:96
IfxPsi5s_IdleTime_10
10 bit Idle time
Definition: IfxPsi5s.h:187
IfxPsi5s_AscMode_async_8bitDataWithParity
Asynchronous mode with 8 bit data with parity.
Definition: IfxPsi5s.h:103
IfxPsi5s_getReadFrameStatus
IFX_EXTERN boolean IfxPsi5s_getReadFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s.c:91
IfxPsi5s_disableAscReceiver
IFX_EXTERN void IfxPsi5s_disableAscReceiver(Ifx_PSI5S *psi5s)
Asc receiver is disabled.
Definition: IfxPsi5s.c:54
IfxPsi5s_TimestampTrigger_syncPulse
Timestamp trigger on sync pulse.
Definition: IfxPsi5s.h:262
IfxPsi5s_SuspendMode_soft
Soft Suspend.
Definition: IfxPsi5s.h:239
IfxPsi5s_TriggerType_periodic
Periodic trigger.
Definition: IfxPsi5s.h:284
IfxPsi5s_ChannelId_2
Ifx_PSI5S Channel 2.
Definition: IfxPsi5s.h:120
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxPsi5s_AlternateInput
IfxPsi5s_AlternateInput
MODULE_PSI5S.IOCR.ALTI:Alternate input.
Definition: IfxPsi5s.h:78
IfxPsi5s_TimeBase_internal
Internal time stamp clock.
Definition: IfxPsi5s.h:246
IfxPsi5s_ChannelId_5
Ifx_PSI5S Channel 5.
Definition: IfxPsi5s.h:123
IfxPsi5s_SleepMode_enable
enables sleep mode
Definition: IfxPsi5s.h:229
IfxPsi5s_ChannelId_1
Ifx_PSI5S Channel 1.
Definition: IfxPsi5s.h:119
IfxPsi5s_IdleTime_4
4 bit Idle time
Definition: IfxPsi5s.h:181
IfxPsi5s_stopAscTransactions
IFX_EXTERN void IfxPsi5s_stopAscTransactions(Ifx_PSI5S *psi5s)
Definition: IfxPsi5s.c:128
IfxPsi5s_IdleTime_5
5 bit Idle time
Definition: IfxPsi5s.h:182
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPsi5s_WatchdogTimerMode_frame
Watch Dog Timer is restarted on reception of each recoverable frame (async mode)
Definition: IfxPsi5s.h:302
IfxPsi5s_Trigger_7
Trigger 7.
Definition: IfxPsi5s.h:277
IfxPsi5s_AscStopBits_2
2 stop bit
Definition: IfxPsi5s.h:111
IfxPsi5s_TriggerType_external
External trigger.
Definition: IfxPsi5s.h:285
IfxPsi5s_SleepMode
IfxPsi5s_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_PSI5S.CLC.B.EDIS.
Definition: IfxPsi5s.h:227
IfxPsi5s_ClockType
IfxPsi5s_ClockType
Clock Selection.
Definition: IfxPsi5s.h:131
IfxPsi5s_AscMode_async_8bitDataWithWakeup
Asynchronous mode with 8 bit data with wakeup.
Definition: IfxPsi5s.h:102
IfxPsi5s_NumberExpectedFrames_3
3 psi5s frame expected
Definition: IfxPsi5s.h:218
IfxPsi5s_isModuleSuspended
IFX_INLINE boolean IfxPsi5s_isModuleSuspended(Ifx_PSI5S *psi5s)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxPsi5s.h:493
IfxPsi5s_Trigger_0
Trigger 0.
Definition: IfxPsi5s.h:270
IfxPsi5s_initClkPin
IFX_INLINE void IfxPsi5s_initClkPin(const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a CLK output.
Definition: IfxPsi5s.h:462
IfxPsi5s_UartFrameCount_3
3 UART frames
Definition: IfxPsi5s.h:292
IfxScuCcu.h
SCU basic functionality.
IfxPsi5s_TimestampTrigger_frame
Timestamp trigger on any frame.
Definition: IfxPsi5s.h:263
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxPsi5s_IdleTime_13
13 bit Idle time
Definition: IfxPsi5s.h:190
IfxPsi5s_setRxInput
IFX_INLINE void IfxPsi5s_setRxInput(Ifx_PSI5S *psi5s, IfxPsi5s_AlternateInput alti)
Selects the alternate input for Rx signal.
Definition: IfxPsi5s.h:505
IfxPsi5s_MessagingBits_present
2 messaging bits
Definition: IfxPsi5s.h:209
IfxPsi5s_AscBaudratePrescalar_divideBy2
Divide by 2 is selected for baudrate timer prescalar.
Definition: IfxPsi5s.h:90
IfxPsi5s_resetModule
IFX_EXTERN void IfxPsi5s_resetModule(Ifx_PSI5S *psi5s)
resets PSI5S kernel
Definition: IfxPsi5s.c:103
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxPsi5s_Clk_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxPsi5s_PinMap.h:76
IfxPsi5s_CrcOrParity
IfxPsi5s_CrcOrParity
MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity.
Definition: IfxPsi5s.h:141
IfxPsi5s_UartFrameCount
IfxPsi5s_UartFrameCount
MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count.
Definition: IfxPsi5s.h:290
IfxPsi5s_initRxPin
IFX_INLINE void IfxPsi5s_initRxPin(const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxPsi5s.h:472
IfxPsi5s_NumberExpectedFrames_1
1 psi5s frame expected
Definition: IfxPsi5s.h:216
IfxPsi5s_ClockType_ascOutput
Asc output clock.
Definition: IfxPsi5s.h:136
IfxPsi5s_AlternateInput_1
Alternate Input 1.
Definition: IfxPsi5s.h:81
IfxPsi5s_IdleTime_6
6 bit Idle time
Definition: IfxPsi5s.h:183
IfxPsi5s_UartFrameCount_5
5 UART frames
Definition: IfxPsi5s.h:294
IfxPsi5s_enableDisableChannelTriggerCounters
IFX_EXTERN void IfxPsi5s_enableDisableChannelTriggerCounters(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter.
Definition: IfxPsi5s.c:75
IfxPsi5s_IdleTime_15
15 bit Idle time
Definition: IfxPsi5s.h:192
IfxPsi5s_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:64
IfxPsi5s_IdleTime_2
2 bit Idle time
Definition: IfxPsi5s.h:179
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxPsi5s_AscStopBits
IfxPsi5s_AscStopBits
MODULE_PSI5S.CON.STP: Number of stop bits.
Definition: IfxPsi5s.h:108
IfxPsi5s_ChannelId_0
Ifx_PSI5S Channel 0.
Definition: IfxPsi5s.h:118
IfxPsi5s_SuspendMode_hard
Hard Suspend.
Definition: IfxPsi5s.h:238
IfxPsi5s_Trigger_1
Trigger 1.
Definition: IfxPsi5s.h:271
IfxPsi5s_IdleTime_12
12 bit Idle time
Definition: IfxPsi5s.h:189
IfxPsi5s_SuspendMode_none
No suspend.
Definition: IfxPsi5s.h:237
IfxPsi5s_enableDisableChannels
IFX_EXTERN void IfxPsi5s_enableDisableChannels(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter.
Definition: IfxPsi5s.c:83
IfxPsi5s_SleepMode_disable
disables sleep mode
Definition: IfxPsi5s.h:230
IfxPsi5s_DividerMode_fractional
divider mode is fractional
Definition: IfxPsi5s.h:153
IfxPsi5s_Clk_Out
CLK pin mapping structure.
Definition: IfxPsi5s_PinMap.h:72
IfxPsi5s_Trigger_4
Trigger 4.
Definition: IfxPsi5s.h:274
IfxPsi5s_TimeBase
IfxPsi5s_TimeBase
MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base.
Definition: IfxPsi5s.h:244
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxPsi5s_FrameId_rollingNumber
Frame ID is a rolling number 0 .. 5 copied from FCNT.
Definition: IfxPsi5s.h:171
IfxPsi5s_Trigger_5
Trigger 5.
Definition: IfxPsi5s.h:275
IfxPsi5s_Trigger_2
Trigger 2.
Definition: IfxPsi5s.h:272


iLLD_TC26B: IfxPsi5s_PinMap.c Source File

  • _PinMap
IfxPsi5s_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s_PinMap.c
3 * \brief PSI5S I/O map
4 * \ingroup IfxLld_Psi5s
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxPsi5s_PinMap.h"
44
45 IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT = {&MODULE_PSI5S, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt4};
46 IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT = {&MODULE_PSI5S, {&MODULE_P33,10}, IfxPort_OutputIdx_alt5};
47 IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN = {&MODULE_PSI5S, {&MODULE_P00, 3}, Ifx_RxSel_a};
48 IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN = {&MODULE_PSI5S, {&MODULE_P02, 5}, Ifx_RxSel_b};
49 IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN = {&MODULE_PSI5S, {&MODULE_P33, 5}, Ifx_RxSel_c};
50 IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT = {&MODULE_PSI5S, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt2};
51 IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT = {&MODULE_PSI5S, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt2};
52 IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT = {&MODULE_PSI5S, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt7};
53
54
55 const IfxPsi5s_Clk_Out *IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS] = {
56 {
57 &IfxPsi5s_CLK_P02_4_OUT,
58 &IfxPsi5s_CLK_P33_10_OUT
59 }
60 };
61
62 const IfxPsi5s_Rx_In *IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS] = {
63 {
64 &IfxPsi5s_RXA_P00_3_IN,
65 &IfxPsi5s_RXB_P02_5_IN,
66 &IfxPsi5s_RXC_P33_5_IN
67 }
68 };
69
70 const IfxPsi5s_Tx_Out *IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS] = {
71 {
72 &IfxPsi5s_TX_P00_4_OUT,
73 &IfxPsi5s_TX_P02_6_OUT,
74 &IfxPsi5s_TX_P33_6_OUT
75 }
76 };
IfxPsi5s_Tx_Out_pinTable
const IfxPsi5s_Tx_Out * IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]
Definition: IfxPsi5s_PinMap.c:70
IFXPSI5S_PINMAP_NUM_MODULES
#define IFXPSI5S_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPsi5s_PinMap.h:89
IfxPsi5s_Rx_In
RX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:56
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:121
IfxPsi5s_RXC_P33_5_IN
IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN
Definition: IfxPsi5s_PinMap.c:49
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS
#define IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:90
IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS
#define IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:92
IfxPsi5s_PinMap.h
PSI5S I/O map.
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxPsi5s_CLK_P33_10_OUT
IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT
Definition: IfxPsi5s_PinMap.c:46
IfxPsi5s_RXA_P00_3_IN
IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN
Definition: IfxPsi5s_PinMap.c:47
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:123
IfxPsi5s_RXB_P02_5_IN
IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN
Definition: IfxPsi5s_PinMap.c:48
IfxPsi5s_Clk_Out_pinTable
const IfxPsi5s_Clk_Out * IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
Definition: IfxPsi5s_PinMap.c:55
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:126
IfxPsi5s_Rx_In_pinTable
const IfxPsi5s_Rx_In * IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
Definition: IfxPsi5s_PinMap.c:62
IfxPsi5s_CLK_P02_4_OUT
IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT
Definition: IfxPsi5s_PinMap.c:45
IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS
#define IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:91
IfxPsi5s_TX_P33_6_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT
Definition: IfxPsi5s_PinMap.c:52
IfxPsi5s_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:64
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:124
IfxPsi5s_Clk_Out
CLK pin mapping structure.
Definition: IfxPsi5s_PinMap.h:72
IfxPsi5s_TX_P02_6_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT
Definition: IfxPsi5s_PinMap.c:51
IfxPsi5s_TX_P00_4_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT
Definition: IfxPsi5s_PinMap.c:50


iLLD_TC26B: IfxPsi5s_PinMap.h Source File

  • _PinMap
IfxPsi5s_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s_PinMap.h
3 * \brief PSI5S I/O map
4 * \ingroup IfxLld_Psi5s
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Psi5s_pinmap PSI5S Pin Mapping
42 * \ingroup IfxLld_Psi5s
43 */
44
45 #ifndef IFXPSI5S_PINMAP_H
46 #define IFXPSI5S_PINMAP_H
47
48 #include <IfxPsi5s_reg.h>
49 #include <_Impl/IfxPsi5s_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Psi5s_pinmap
53 * \{ */
54
55 /** \brief RX pin mapping structure */
56 typedef const struct
57 {
58 Ifx_PSI5S* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel select; /**< \brief Input multiplexer value */
61 } IfxPsi5s_Rx_In;
62
63 /** \brief TX pin mapping structure */
64 typedef const struct
65 {
66 Ifx_PSI5S* module; /**< \brief Base address */
67 IfxPort_Pin pin; /**< \brief Port pin */
68 IfxPort_OutputIdx select; /**< \brief Port control code */
69 } IfxPsi5s_Tx_Out;
70
71 /** \brief CLK pin mapping structure */
72 typedef const struct
73 {
74 Ifx_PSI5S* module; /**< \brief Base address */
75 IfxPort_Pin pin; /**< \brief Port pin */
76 IfxPort_OutputIdx select; /**< \brief Port control code */
77 } IfxPsi5s_Clk_Out;
78
79 IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT; /**< \brief PSI5S_CLK: PSI5-S output */
80 IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT; /**< \brief PSI5S_CLK: PSI5-S output */
81 IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN; /**< \brief PSI5S_RXA: PSI5-S input */
82 IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN; /**< \brief PSI5S_RXB: PSI5-S input */
83 IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN; /**< \brief PSI5S_RXC: PSI5-S input */
84 IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT; /**< \brief PSI5S_TX: PSI5-S output */
85 IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT; /**< \brief PSI5S_TX: PSI5-S output */
86 IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT; /**< \brief PSI5S_TX: PSI5-S output */
87
88 /** \brief Table dimensions */
89 #define IFXPSI5S_PINMAP_NUM_MODULES 1
90 #define IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS 2
91 #define IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS 3
92 #define IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS 3
93
94
95 /** \brief IfxPsi5s_Clk_Out table */
96 IFX_EXTERN const IfxPsi5s_Clk_Out *IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS];
97
98 /** \brief IfxPsi5s_Rx_In table */
99 IFX_EXTERN const IfxPsi5s_Rx_In *IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS];
100
101 /** \brief IfxPsi5s_Tx_Out table */
102 IFX_EXTERN const IfxPsi5s_Tx_Out *IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS];
103
104 /** \} */
105
106 #endif /* IFXPSI5S_PINMAP_H */
IfxPsi5s_CLK_P33_10_OUT
IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT
PSI5S_CLK: PSI5-S output.
Definition: IfxPsi5s_PinMap.h:80
IFXPSI5S_PINMAP_NUM_MODULES
#define IFXPSI5S_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPsi5s_PinMap.h:89
IfxPsi5s_TX_P00_4_OUT
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT
PSI5S_TX: PSI5-S output.
Definition: IfxPsi5s_PinMap.h:84
IfxPsi5s_Rx_In
RX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:56
IfxPsi5s_cfg.h
PSI5S on-chip implementation data.
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxPsi5s_Rx_In::module
Ifx_PSI5S * module
Base address.
Definition: IfxPsi5s_PinMap.h:58
IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS
#define IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:90
IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS
#define IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:92
IfxPsi5s_Rx_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxPsi5s_PinMap.h:60
IfxPsi5s_CLK_P02_4_OUT
IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT
PSI5S_CLK: PSI5-S output.
Definition: IfxPsi5s_PinMap.h:79
IfxPsi5s_Rx_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxPsi5s_PinMap.h:59
IfxPsi5s_RXB_P02_5_IN
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN
PSI5S_RXB: PSI5-S input.
Definition: IfxPsi5s_PinMap.h:82
IfxPsi5s_TX_P33_6_OUT
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT
PSI5S_TX: PSI5-S output.
Definition: IfxPsi5s_PinMap.h:86
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPsi5s_Rx_In_pinTable
IFX_EXTERN const IfxPsi5s_Rx_In * IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5s_Rx_In table.
Definition: IfxPsi5s_PinMap.h:99
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxPsi5s_Tx_Out_pinTable
IFX_EXTERN const IfxPsi5s_Tx_Out * IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5s_Tx_Out table.
Definition: IfxPsi5s_PinMap.h:102
IfxPsi5s_Tx_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxPsi5s_PinMap.h:68
IfxPsi5s_RXC_P33_5_IN
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN
PSI5S_RXC: PSI5-S input.
Definition: IfxPsi5s_PinMap.h:83
IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS
#define IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:91
IfxPsi5s_RXA_P00_3_IN
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN
PSI5S_RXA: PSI5-S input.
Definition: IfxPsi5s_PinMap.h:81
IfxPsi5s_Clk_Out_pinTable
IFX_EXTERN const IfxPsi5s_Clk_Out * IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
IfxPsi5s_Clk_Out table.
Definition: IfxPsi5s_PinMap.h:96
IfxPsi5s_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:64
IfxPsi5s_TX_P02_6_OUT
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT
PSI5S_TX: PSI5-S output.
Definition: IfxPsi5s_PinMap.h:85
IfxPsi5s_Clk_Out
CLK pin mapping structure.
Definition: IfxPsi5s_PinMap.h:72
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxPsi5s_Psi5s.c Source File

  • Psi5s
  • Psi5s
IfxPsi5s_Psi5s.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s_Psi5s.c
3 * \brief PSI5S PSI5S details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
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39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxPsi5s_Psi5s.h"
49
50 /** \addtogroup IfxLld_Psi5s_Psi5s_Utility
51 * \{ */
52
53 /******************************************************************************/
54 /*-----------------------Private Function Prototypes--------------------------*/
55 /******************************************************************************/
56
57 /** \brief get the fracDiv clock frequency
58 * \param psi5s Pointer to the base of PSI5S register space
59 * \return Returns the configured fracDiv psi5s clock frequency in Hz.
60 */
61 IFX_STATIC uint32 IfxPsi5s_Psi5s_getFracDivClock(Ifx_PSI5S *psi5s);
62
63 /** \brief Configure the fracDiv clock.
64 * \param psi5s Pointer to the base of PSI5S register space
65 * \param clock Specifies the required clock frequency in Hz.
66 * \return Returns the configured clock frequency in Hz.
67 */
68 IFX_STATIC uint32 IfxPsi5s_Psi5s_initializeClock(Ifx_PSI5S *psi5s, const IfxPsi5s_Psi5s_Clock *clock);
69
70 /** \brief Configure the baudrate at the ASC interface.
71 * \param psi5s Pointer to the base of PSI5S register space
72 * \param baudrate Frequency Specifies the required baudrate frequency in Hz.
73 * \param ascConfig pointer to the configuration structure for ASC
74 * \return Returns the configured baudrate frequency in Hz.
75 */
76 IFX_STATIC uint32 IfxPsi5s_Psi5s_setBaudrate(Ifx_PSI5S *psi5s, uint32 baudrate, IfxPsi5s_Psi5s_AscConfig *ascConfig);
77
78 /** \} */
79
80 /******************************************************************************/
81 /*-------------------------Function Implementations---------------------------*/
82 /******************************************************************************/
83
84 void IfxPsi5s_Psi5s_deInitModule(IfxPsi5s_Psi5s *psi5s)
85 {
86 Ifx_PSI5S *psi5sSFR = psi5s->psi5s;
87 IfxPsi5s_Psi5s_resetModule(psi5sSFR);
88 }
89
90
91 void IfxPsi5s_Psi5s_enableModule(Ifx_PSI5S *psi5s)
92 {
93 psi5s->CLC.U = 0x00000000;
94 }
95
96
97 IFX_STATIC uint32 IfxPsi5s_Psi5s_getFracDivClock(Ifx_PSI5S *psi5s)
98 {
99 uint32 result;
100 uint32 fPsi5s = IfxScuCcu_getSpbFrequency();
101
102 switch (psi5s->FDR.B.DM)
103 {
104 case IfxPsi5s_DividerMode_spb:
105 result = fPsi5s;
106 break;
107 case IfxPsi5s_DividerMode_normal:
108 result = fPsi5s / (IFXPSI5S_STEP_RANGE - psi5s->FDR.B.STEP);
109 break;
110 case IfxPsi5s_DividerMode_fractional:
111 result = (fPsi5s * IFXPSI5S_STEP_RANGE) / psi5s->FDR.B.STEP;
112 break;
113 case IfxPsi5s_DividerMode_off:
114 result = 0;
115 break;
116 default:
117 result = 0;
118 }
119
120 return result;
121 }
122
123
124 boolean IfxPsi5s_Psi5s_initChannel(IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
125 {
126 boolean status = TRUE;
127
128 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
129 IfxScuWdt_clearCpuEndinit(passwd);
130
131 Ifx_PSI5S *psi5s = config->module->psi5s;
132 channel->module = (IfxPsi5s_Psi5s *)config->module;
133 channel->channelId = config->channelId;
134
135 Ifx_PSI5S_PGC tempPGC;
136 tempPGC.U = psi5s->PGC[config->channelId].U;
137 tempPGC.B.TXCMD = config->pulseGeneration.codeforZero;
138 tempPGC.B.ATXCMD = config->pulseGeneration.codeforOne;
139 tempPGC.B.TBS = config->pulseGeneration.timeBaseSelect;
140 tempPGC.B.ETB = config->pulseGeneration.externalTimeBaseSelect;
141 tempPGC.B.ETS = config->pulseGeneration.externalTriggerSelect;
142
143 switch (config->pulseGeneration.periodicOrExternal)
144 {
145 case IfxPsi5s_TriggerType_periodic:
146 tempPGC.B.PTE = TRUE;
147 tempPGC.B.ETE = FALSE;
148 break;
149
150 case IfxPsi5s_TriggerType_external:
151 tempPGC.B.PTE = FALSE;
152 tempPGC.B.ETE = TRUE;
153 break;
154 }
155
156 psi5s->PGC[config->channelId].U = tempPGC.U;
157
158 Ifx_PSI5S_CTV tempCTV;
159 tempCTV.U = psi5s->CTV[config->channelId].U;
160 tempCTV.B.CTV = config->channelTrigger.channelTriggerValue;
161 tempCTV.B.CTC = config->channelTrigger.channelTriggerCounter;
162 psi5s->CTV[config->channelId].U = tempCTV.U;
163
164 psi5s->WDT[config->channelId].U = config->watchdogTimerLimit;
165
166 Ifx_PSI5S_RCRA tempRCRA;
167 tempRCRA.U = psi5s->RCRA[config->channelId].U;
168 tempRCRA.B.CRC0 = config->receiveControl.crcOrParity[0];
169 tempRCRA.B.CRC1 = config->receiveControl.crcOrParity[1];
170 tempRCRA.B.CRC2 = config->receiveControl.crcOrParity[2];
171 tempRCRA.B.CRC3 = config->receiveControl.crcOrParity[3];
172 tempRCRA.B.CRC4 = config->receiveControl.crcOrParity[4];
173 tempRCRA.B.CRC5 = config->receiveControl.crcOrParity[5];
174 tempRCRA.B.TSEN = config->receiveControl.timestampEnabled;
175 tempRCRA.B.TSP = config->receiveControl.timestampSelect;
176 tempRCRA.B.TSTS = config->receiveControl.timestampTriggerSelect;
177 tempRCRA.B.FIDS = config->receiveControl.frameIdSelect;
178 tempRCRA.B.WDMS = config->receiveControl.watchdogTimerModeSelect;
179 tempRCRA.B.UFC0 = config->receiveControl.uartFrameCount[0];
180 tempRCRA.B.UFC1 = config->receiveControl.uartFrameCount[1];
181 tempRCRA.B.UFC2 = config->receiveControl.uartFrameCount[2];
182 tempRCRA.B.UFC3 = config->receiveControl.uartFrameCount[3];
183 tempRCRA.B.UFC4 = config->receiveControl.uartFrameCount[4];
184 tempRCRA.B.UFC5 = config->receiveControl.uartFrameCount[5];
185 psi5s->RCRA[config->channelId].U = tempRCRA.U;
186
187 Ifx_PSI5S_RCRB tempRCRB;
188 tempRCRB.U = psi5s->RCRB[config->channelId].U;
189 tempRCRB.B.PDL0 = config->receiveControl.payloadLength[0];
190 tempRCRB.B.PDL1 = config->receiveControl.payloadLength[1];
191 tempRCRB.B.PDL2 = config->receiveControl.payloadLength[2];
192 tempRCRB.B.PDL3 = config->receiveControl.payloadLength[3];
193 tempRCRB.B.PDL4 = config->receiveControl.payloadLength[4];
194 tempRCRB.B.PDL5 = config->receiveControl.payloadLength[5];
195 psi5s->RCRB[config->channelId].U = tempRCRB.U;
196
197 psi5s->NFC.U = (config->receiveControl.numberOfFramesExpected << (config->channelId * 3));
198
199 Ifx_PSI5S_SCR tempSCR;
200 tempSCR.U = psi5s->SCR[config->channelId].U;
201 tempSCR.B.PLL = config->sendControl.payloadLength;
202 tempSCR.B.EPS = config->sendControl.enhancedProtocolSelection;
203 tempSCR.B.BSC = config->sendControl.bitStuffControl;
204 tempSCR.B.CRC = config->sendControl.crcGenerationControl;
205 tempSCR.B.STA = config->sendControl.startSequenceGenerationControl;
206 psi5s->SCR[config->channelId].U = tempSCR.U;
207
208 IfxScuWdt_setCpuEndinit(passwd);
209
210 return status;
211 }
212
213
214 void IfxPsi5s_Psi5s_initChannelConfig(IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
215 {
216 IfxPsi5s_Psi5s_ChannelConfig IfxPsi5s_Psi5s_defaultChannelConfig = {
217 .channelId = IfxPsi5s_ChannelId_0,
218 .module = NULL_PTR,
219 .pulseGeneration = {
220 .codeforZero = 0,
221 .codeforOne = 1,
222 .timeBaseSelect = IfxPsi5s_TimeBase_internal,
223 .externalTimeBaseSelect = IfxPsi5s_Trigger_0,
224 .periodicOrExternal = IfxPsi5s_TriggerType_periodic,
225 .externalTriggerSelect = IfxPsi5s_Trigger_0,
226 },
227 .channelTrigger = {
228 .channelTriggerValue = 0x20,
229 .channelTriggerCounter = 0x0
230 },
231 .watchdogTimerLimit = 0x0,
232 .receiveControl = {
233 .crcOrParity[0] = IfxPsi5s_CrcOrParity_parity,
234 .crcOrParity[1] = IfxPsi5s_CrcOrParity_parity,
235 .crcOrParity[2] = IfxPsi5s_CrcOrParity_parity,
236 .crcOrParity[3] = IfxPsi5s_CrcOrParity_parity,
237 .crcOrParity[4] = IfxPsi5s_CrcOrParity_parity,
238 .crcOrParity[5] = IfxPsi5s_CrcOrParity_parity,
239 .timestampEnabled = FALSE,
240 .timestampSelect = IfxPsi5s_TimestampRegister_a,
241 .timestampTriggerSelect = IfxPsi5s_TimestampTrigger_syncPulse,
242 .frameIdSelect = IfxPsi5s_FrameId_frameHeader,
243 .watchdogTimerModeSelect = IfxPsi5s_WatchdogTimerMode_frame,
244 .uartFrameCount[0] = IfxPsi5s_UartFrameCount_3,
245 .uartFrameCount[1] = IfxPsi5s_UartFrameCount_3,
246 .uartFrameCount[2] = IfxPsi5s_UartFrameCount_3,
247 .uartFrameCount[3] = IfxPsi5s_UartFrameCount_3,
248 .uartFrameCount[4] = IfxPsi5s_UartFrameCount_3,
249 .uartFrameCount[5] = IfxPsi5s_UartFrameCount_3,
250 .payloadLength[0] = 0,
251 .payloadLength[1] = 0,
252 .payloadLength[2] = 0,
253 .payloadLength[3] = 0,
254 .payloadLength[4] = 0,
255 .payloadLength[5] = 0,
256 .numberOfFramesExpected = IfxPsi5s_NumberExpectedFrames_1,
257 },
258 .sendControl = {
259 .payloadLength = 6,
260 .enhancedProtocolSelection = IfxPsi5s_EnhancedProtocol_toothGapMethod,
261 .bitStuffControl = FALSE,
262 .crcGenerationControl = FALSE,
263 .startSequenceGenerationControl = FALSE
264 }
265 };
266 *config = IfxPsi5s_Psi5s_defaultChannelConfig;
267 config->module = psi5s;
268 }
269
270
271 boolean IfxPsi5s_Psi5s_initModule(IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
272 {
273 boolean status = TRUE;
274
275 Ifx_PSI5S *psi5sSFR = config->module;
276 psi5s->psi5s = psi5sSFR;
277
278 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
279 IfxScuWdt_clearCpuEndinit(passwd);
280 IfxPsi5s_Psi5s_enableModule(psi5sSFR);
281
282 if (IfxPsi5s_Psi5s_initializeClock(psi5sSFR, &config->fracDiv) == 0)
283 {
284 status = FALSE;
285 return status;
286 }
287 else
288 {}
289
290 if (IfxPsi5s_Psi5s_initializeClock(psi5sSFR, &config->timestampClock) == 0)
291 {
292 status = FALSE;
293 return status;
294 }
295 else
296 {}
297
298 Ifx_PSI5S_CON tempCON;
299 tempCON.U = psi5sSFR->CON.U;
300 tempCON.B.M = config->ascConfig.receiveMode;
301 tempCON.B.STP = config->ascConfig.stopBits;
302 tempCON.B.PEN = config->ascConfig.parityCheckEnabled;
303 tempCON.B.FEN = config->ascConfig.framingCheckEnabled;
304 tempCON.B.OEN = config->ascConfig.overrunCheckEnabled;
305 tempCON.B.FDE = config->ascConfig.fractionalDividerEnabled;
306 tempCON.B.ODD = config->ascConfig.receiverOddParityEnabled;
307 tempCON.B.BRS = config->ascConfig.baudrateSelection;
308 tempCON.B.LB = config->ascConfig.loopbackEnabled;
309 tempCON.B.MTX = config->ascConfig.transmitMode;
310 tempCON.B.ODDTX = config->ascConfig.transmitterOddParityEnabled;
311 psi5sSFR->CON.U = tempCON.U;
312
313 if (IfxPsi5s_Psi5s_setBaudrate(psi5sSFR, config->ascConfig.baudrateFrequency, (IfxPsi5s_Psi5s_AscConfig *)&(config->ascConfig))
314 == 0)
315 {
316 status = FALSE;
317 return status;
318 }
319 else
320 {}
321
322 if (IfxPsi5s_Psi5s_initializeClock(psi5sSFR, &config->ascConfig.clockOutput) == 0)
323 {
324 status = FALSE;
325 return status;
326 }
327 else
328 {}
329
330 Ifx_PSI5S_TSCNTA tempTSCNTA;
331 tempTSCNTA.U = psi5sSFR->TSCNTA.U;
332 tempTSCNTA.B.ETB = config->timestampCounterA.externalTimeBaseSelect;
333 tempTSCNTA.B.TBS = config->timestampCounterA.timeBaseSelect;
334 psi5sSFR->TSCNTA.U = tempTSCNTA.U;
335
336 Ifx_PSI5S_TSCNTB tempTSCNTB;
337 tempTSCNTB.U = psi5sSFR->TSCNTB.U;
338 tempTSCNTB.B.ETB = config->timestampCounterB.externalTimeBaseSelect;
339 tempTSCNTB.B.TBS = config->timestampCounterB.timeBaseSelect;
340 psi5sSFR->TSCNTB.U = tempTSCNTB.U;
341
342 Ifx_PSI5S_GCR tempGCR;
343 tempGCR.U = psi5sSFR->GCR.U;
344 tempGCR.B.CRCI = config->globalControlConfig.crcErrorConsideredForRSI;
345 tempGCR.B.XCRCI = config->globalControlConfig.xcrcErrorConsideredForRSI;
346 tempGCR.B.TEI = config->globalControlConfig.transmitErrorConsideredForRSI;
347 tempGCR.B.PE = config->globalControlConfig.parityErrorConsideredForRSI;
348 tempGCR.B.FE = config->globalControlConfig.framingErrorConsideredForRSI;
349 tempGCR.B.OE = config->globalControlConfig.overrunErrorConsideredForRSI;
350 tempGCR.B.RBI = config->globalControlConfig.receiveBufferErrorConsideredForRSI;
351 tempGCR.B.HDI = config->globalControlConfig.headerErrorConsideredForRSI;
352 tempGCR.B.IDT = config->globalControlConfig.idleTime;
353 tempGCR.B.ASC = config->globalControlConfig.ascOnlyMode;
354 psi5sSFR->GCR.U = tempGCR.U;
355
356 IfxScuWdt_setCpuEndinit(passwd);
357
358 // Pin mapping //
359 const IfxPsi5s_Psi5s_Pins *pins = config->pins;
360
361 if (pins != NULL_PTR)
362 {
363 const IfxPsi5s_Rx_In *rx = pins->rx;
364
365 if (rx != NULL_PTR)
366 {
367 IfxPsi5s_initRxPin(rx, pins->rxMode, pins->pinDriver);
368 }
369
370 const IfxPsi5s_Tx_Out *tx = pins->tx;
371
372 if (tx != NULL_PTR)
373 {
374 IfxPsi5s_initTxPin(tx, pins->txMode, pins->pinDriver);
375 }
376
377 const IfxPsi5s_Clk_Out *clk = pins->clk;
378
379 if (clk != NULL_PTR)
380 {
381 IfxPsi5s_initClkPin(clk, pins->clkMode, pins->pinDriver);
382 }
383 }
384
385 return status;
386 }
387
388
389 void IfxPsi5s_Psi5s_initModuleConfig(IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
390 {
391 uint32 spbFrequency = IfxScuCcu_getSpbFrequency();
392 config->module = psi5s;
393 config->fracDiv.frequency = spbFrequency;
394 config->fracDiv.mode = IfxPsi5s_DividerMode_normal;
395 config->fracDiv.type = IfxPsi5s_ClockType_fracDiv;
396 config->timestampClock.frequency = spbFrequency;
397 config->timestampClock.mode = IfxPsi5s_DividerMode_normal;
398 config->timestampClock.type = IfxPsi5s_ClockType_timeStamp;
399 config->timestampCounterA.externalTimeBaseSelect = IfxPsi5s_Trigger_0;
400 config->timestampCounterA.timeBaseSelect = IfxPsi5s_TimeBase_internal;
401 config->timestampCounterB.externalTimeBaseSelect = IfxPsi5s_Trigger_0;
402 config->timestampCounterB.timeBaseSelect = IfxPsi5s_TimeBase_internal;
403 config->ascConfig.baudrateFrequency = IFXPSI5S_BAUDRATE_1562500;
404 config->ascConfig.clockOutput.frequency = spbFrequency;
405 config->ascConfig.clockOutput.mode = IfxPsi5s_DividerMode_normal;
406 config->ascConfig.clockOutput.type = IfxPsi5s_ClockType_ascOutput;
407 config->ascConfig.receiveMode = IfxPsi5s_AscMode_sync;
408 config->ascConfig.stopBits = IfxPsi5s_AscStopBits_1;
409 config->ascConfig.parityCheckEnabled = FALSE;
410 config->ascConfig.framingCheckEnabled = FALSE;
411 config->ascConfig.overrunCheckEnabled = FALSE;
412 config->ascConfig.fractionalDividerEnabled = FALSE;
413 config->ascConfig.receiverOddParityEnabled = FALSE;
414 config->ascConfig.baudrateSelection = IfxPsi5s_AscBaudratePrescalar_divideBy2;
415 config->ascConfig.loopbackEnabled = IfxPsi5s_LoopBackMode_disable;
416 config->ascConfig.transmitMode = IfxPsi5s_AscMode_sync;
417 config->ascConfig.transmitterOddParityEnabled = FALSE;
418 config->globalControlConfig.crcErrorConsideredForRSI = TRUE;
419 config->globalControlConfig.xcrcErrorConsideredForRSI = TRUE;
420 config->globalControlConfig.transmitErrorConsideredForRSI = TRUE;
421 config->globalControlConfig.parityErrorConsideredForRSI = TRUE;
422 config->globalControlConfig.framingErrorConsideredForRSI = TRUE;
423 config->globalControlConfig.overrunErrorConsideredForRSI = FALSE;
424 config->globalControlConfig.receiveBufferErrorConsideredForRSI = FALSE;
425 config->globalControlConfig.headerErrorConsideredForRSI = FALSE;
426 config->globalControlConfig.idleTime = IfxPsi5s_IdleTime_1;
427 config->globalControlConfig.ascOnlyMode = FALSE;
428 config->pins = NULL_PTR;
429 }
430
431
432 IFX_STATIC uint32 IfxPsi5s_Psi5s_initializeClock(Ifx_PSI5S *psi5s, const IfxPsi5s_Psi5s_Clock *clock)
433 {
434 uint64 step = 0;
435 uint32 stepRange = IFXPSI5S_STEP_RANGE;
436 uint32 result = 0;
437 IfxPsi5s_DividerMode divMode = clock->mode;
438 IfxPsi5s_ClockType clockType = clock->type;
439 uint32 clockFrequency = clock->frequency;
440 uint32 fInput;
441 Ifx_PSI5S_FDR tempFDR;
442 Ifx_PSI5S_FDRT tempFDRT;
443 Ifx_PSI5S_FDO tempFDO;
444
445 if (clockType == IfxPsi5s_ClockType_fracDiv)
446 {
447 fInput = IfxScuCcu_getSpbFrequency();
448 }
449 else if (clockType == IfxPsi5s_ClockType_ascOutput)
450 {
451 fInput = IfxScuCcu_getSpbFrequency(); // assumption here is that fBaud2 is equal to fSPB
452 stepRange = 2 * IFXPSI5S_STEP_RANGE;
453 }
454 else
455 {
456 fInput = IfxPsi5s_Psi5s_getFracDivClock(psi5s);
457
458 if (fInput == 0)
459 {
460 result = 0;
461 return result;
462 }
463 else
464 {}
465 }
466
467 switch (divMode)
468 {
469 case IfxPsi5s_DividerMode_normal:
470 step = stepRange - (fInput / clockFrequency);
471
472 if (step > (stepRange - 1))
473 {
474 step = stepRange - 1;
475 }
476 else
477 {
478 /* do nothing */
479 }
480
481 result = (uint32)(fInput / (stepRange - step));
482 break;
483
484 case IfxPsi5s_DividerMode_fractional:
485 step = (uint64)((uint64)clockFrequency * stepRange) / fInput;
486
487 if (step > (stepRange - 1))
488 {
489 step = stepRange - 1;
490 }
491 else
492 {
493 /* do nothing */
494 }
495
496 result = (uint32)((uint64)((uint64)fInput * step)) / stepRange;
497 break;
498
499 case IfxPsi5s_DividerMode_off:
500 default:
501 step = 0;
502 result = 0;
503 break;
504 }
505
506 if (result != 0)
507 {
508 switch (clockType)
509 {
510 case IfxPsi5s_ClockType_fracDiv:
511 tempFDR.U = 0;
512 tempFDR.B.DM = divMode;
513 tempFDR.B.STEP = (uint32)step;
514 psi5s->FDR.U = tempFDR.U;
515 break;
516
517 case IfxPsi5s_ClockType_timeStamp:
518 tempFDRT.U = 0;
519 tempFDRT.B.DM = divMode;
520 tempFDRT.B.STEP = (uint32)step;
521 psi5s->FDRT.U = tempFDRT.U;
522 break;
523
524 case IfxPsi5s_ClockType_ascOutput:
525 tempFDO.U = 0;
526 tempFDO.B.DM = divMode;
527 tempFDO.B.STEP = (uint32)step;
528 psi5s->FDO.U = tempFDO.U;
529 break;
530 default:
531 break;
532 }
533 }
534
535 return result;
536 }
537
538
539 void IfxPsi5s_Psi5s_readFrame(IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
540 {
541 frame->data.rdr = channel->module->psi5s->RDR.U;
542 frame->status.rds = channel->module->psi5s->RDS.U;
543 frame->timestamp.tsm = channel->module->psi5s->TSM.U;
544
545 channel->module->psi5s->INTCLR[channel->channelId].U |= (IFX_PSI5S_INTCLR_RDI_MSK << IFX_PSI5S_INTCLR_RDI_OFF) | (IFX_PSI5S_INTCLR_RSI_MSK << IFX_PSI5S_INTCLR_RSI_OFF);
546 }
547
548
549 void IfxPsi5s_Psi5s_resetModule(Ifx_PSI5S *psi5s)
550 {
551 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
552 IfxScuWdt_clearSafetyEndinit(passwd);
553 psi5s->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
554 psi5s->KRST0.B.RST = 1;
555
556 while (psi5s->KRST0.B.RSTSTAT == 0)
557 {
558 /* Wait until reset is executed */
559 }
560
561 psi5s->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
562 IfxScuWdt_setSafetyEndinit(passwd);
563 }
564
565
566 boolean IfxPsi5s_Psi5s_sendChannelData(IfxPsi5s_Psi5s_Channel *channel, uint32 data)
567 {
568 channel->module->psi5s->SDR[channel->channelId].U = data & 0x00FFFFFF;
569
570 if (channel->module->psi5s->INTSTAT[channel->channelId].B.TPOI)
571 {
572 return FALSE;
573 }
574 else
575 {
576 return TRUE;
577 }
578 }
579
580
581 IFX_STATIC uint32 IfxPsi5s_Psi5s_setBaudrate(Ifx_PSI5S *psi5s, uint32 baudrate, IfxPsi5s_Psi5s_AscConfig *ascConfig)
582 {
583 uint32 bgValue = 0;
584 uint32 fdValue = 0;
585 uint32 result = 0;
586 uint32 fInput;
587
588 if (ascConfig->receiveMode == IfxPsi5s_AscMode_sync)
589 {
590 if (ascConfig->transmitMode != IfxPsi5s_AscMode_sync)
591 {
592 // sync modes must be set for both receive and transmit
593 }
594
595 fInput = IfxScuCcu_getBaud2Frequency();
596 bgValue = (uint32)(fInput / ((ascConfig->baudrateSelection + 2) * 4 * (uint64)baudrate) - 1);
597
598 if (bgValue > (IFXPSI5S_BG_RANGE - 1))
599 {
600 bgValue = IFXPSI5S_BG_RANGE - 1;
601 }
602 else
603 {
604 /* do nothing */
605 }
606
607 result = fInput / ((ascConfig->baudrateSelection + 2) * 4 * (bgValue + 1));
608 }
609 else if (ascConfig->fractionalDividerEnabled == FALSE)
610 {
611 fInput = IfxScuCcu_getBaud2Frequency();
612 bgValue = (uint32)(fInput / ((ascConfig->baudrateSelection + 2) * 16 * (uint64)baudrate) - 1);
613
614 if (bgValue > (IFXPSI5S_BG_RANGE - 1))
615 {
616 bgValue = IFXPSI5S_BG_RANGE - 1;
617 }
618 else
619 {
620 /* do nothing */
621 }
622
623 result = fInput / ((ascConfig->baudrateSelection + 2) * 16 * (bgValue + 1));
624 }
625 else
626 {
627 fInput = IfxScuCcu_getBaud2Frequency();
628 fdValue = (((uint64)baudrate * IFXPSI5S_FDV_RANGE * 16)) / (float)fInput;
629
630 if (fdValue > (IFXPSI5S_FDV_RANGE - 1))
631 {
632 fdValue = IFXPSI5S_FDV_RANGE - 1;
633 bgValue = ((float)fdValue / IFXPSI5S_FDV_RANGE) * (fInput / (16 * baudrate)) - 1;
634
635 if (bgValue > (IFXPSI5S_BG_RANGE - 1))
636 {
637 bgValue = IFXPSI5S_BG_RANGE - 1;
638 }
639 else
640 {
641 /* do nothing */
642 }
643 }
644 else
645 {
646 bgValue = 0;
647 }
648
649 result = ((float)fdValue / IFXPSI5S_FDV_RANGE) * (fInput / (16 * (bgValue + 1)));
650 }
651
652 psi5s->FDV.U = fdValue;
653 psi5s->BG.U = bgValue;
654
655 return result;
656 }
IfxPsi5s_IdleTime_1
1 bit Idle time
Definition: IfxPsi5s.h:178
IfxPsi5s_ClockType_fracDiv
Fractional Divide clock.
Definition: IfxPsi5s.h:133
IfxPsi5s_Psi5s_initChannelConfig
void IfxPsi5s_Psi5s_initChannelConfig(IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
Initialise buffer with default channel configuration.
Definition: IfxPsi5s_Psi5s.c:214
IfxPsi5s_Psi5s_ReceiveControl::numberOfFramesExpected
IfxPsi5s_NumberExpectedFrames numberOfFramesExpected
Specifies the number of psi5s frames expected.
Definition: IfxPsi5s_Psi5s.h:315
IFXPSI5S_BAUDRATE_1562500
#define IFXPSI5S_BAUDRATE_1562500
Definition: IfxPsi5s_cfg.h:78
IfxPsi5s_Psi5s_GlobalControlConfig::receiveBufferErrorConsideredForRSI
boolean receiveBufferErrorConsideredForRSI
Specifies whether RBI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:273
IfxPsi5s_Psi5s_resetModule
void IfxPsi5s_Psi5s_resetModule(Ifx_PSI5S *psi5s)
Reset PSI5S kernel.
Definition: IfxPsi5s_Psi5s.c:549
IfxPsi5s_Psi5s_Pins::clk
IFX_CONST IfxPsi5s_Clk_Out * clk
PSI5S Clk Pin.
Definition: IfxPsi5s_Psi5s.h:286
IfxPsi5s_Psi5s_TransmitControl::payloadLength
uint32 payloadLength
Specifies the payload length to be sent.
Definition: IfxPsi5s_Psi5s.h:357
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:572
IfxPsi5s_Psi5s.h
PSI5S PSI5S details.
IfxPsi5s_FrameId_frameHeader
Frame ID is updated from packet frame header (Sync mode)
Definition: IfxPsi5s.h:170
IfxPsi5s_Psi5s_TransmitControl::enhancedProtocolSelection
IfxPsi5s_EnhancedProtocol enhancedProtocolSelection
Specifies whether the enhanced protocol is selected or not.
Definition: IfxPsi5s_Psi5s.h:358
IfxPsi5s_Psi5s_AscConfig
PSI5S module configuration structure.
Definition: IfxPsi5s_Psi5s.h:237
IfxPsi5s_Psi5s_ChannelConfig::channelTrigger
IfxPsi5s_Psi5s_ChannelTrigger channelTrigger
Specifies the configuration for channel trigger.
Definition: IfxPsi5s_Psi5s.h:381
IfxPsi5s_Psi5s_initChannel
boolean IfxPsi5s_Psi5s_initChannel(IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxPsi5s_Psi5s.c:124
IfxPsi5s_Psi5s_ReceiveControl::crcOrParity
IfxPsi5s_CrcOrParity crcOrParity[IFXPSI5S_NUM_SLOTS]
Specifies the crc or parity selection for the slots 0 to 5.
Definition: IfxPsi5s_Psi5s.h:309
IfxPsi5s_Rx_In
RX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:56
IfxPsi5s_Psi5s_ReceiveControl::timestampSelect
IfxPsi5s_TimestampRegister timestampSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5s_Psi5s.h:310
IfxPsi5s_Psi5s_AscConfig::receiverOddParityEnabled
boolean receiverOddParityEnabled
Specifies whether receiver parity check should be for even or odd.
Definition: IfxPsi5s_Psi5s.h:243
IfxPsi5s_Psi5s_Clock::frequency
uint32 frequency
Specifies the frequency for the clock.
Definition: IfxPsi5s_Psi5s.h:181
IfxPsi5s_Psi5s_PulseGeneration::codeforZero
uint32 codeforZero
Specifies the code used to represent &#39;0&#39; - referred as TXCMD.
Definition: IfxPsi5s_Psi5s.h:295
IfxPsi5s_Psi5s_Config::timestampClock
IfxPsi5s_Psi5s_Clock timestampClock
Specifies the time stamp clock properties.
Definition: IfxPsi5s_Psi5s.h:392
IfxPsi5s_Psi5s_ChannelTrigger::channelTriggerValue
uint32 channelTriggerValue
Specifies the channel trigger value CTV.
Definition: IfxPsi5s_Psi5s.h:258
IfxPsi5s_Psi5s_PulseGeneration::timeBaseSelect
IfxPsi5s_TimeBase timeBaseSelect
Specifies the clock source for CTV as internal or external.
Definition: IfxPsi5s_Psi5s.h:297
IfxPsi5s_Psi5s_setBaudrate
IFX_STATIC uint32 IfxPsi5s_Psi5s_setBaudrate(Ifx_PSI5S *psi5s, uint32 baudrate, IfxPsi5s_Psi5s_AscConfig *ascConfig)
Configure the baudrate at the ASC interface.
Definition: IfxPsi5s_Psi5s.c:581
IfxPsi5s_DividerMode
IfxPsi5s_DividerMode
MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode.
Definition: IfxPsi5s.h:149
IfxPsi5s_Psi5s_Pins::tx
IFX_CONST IfxPsi5s_Tx_Out * tx
PSI5S Tx pin.
Definition: IfxPsi5s_Psi5s.h:284
IfxPsi5s_Psi5s_PulseGeneration::externalTriggerSelect
IfxPsi5s_Trigger externalTriggerSelect
Specifies the trigger source in case of external triggerring.
Definition: IfxPsi5s_Psi5s.h:300
IfxPsi5s_AscStopBits_1
1 stop bit
Definition: IfxPsi5s.h:110
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPsi5s_Psi5s_GlobalControlConfig::ascOnlyMode
boolean ascOnlyMode
Specifies if the module is in ASC only mode.
Definition: IfxPsi5s_Psi5s.h:266
IfxPsi5s_DividerMode_normal
divider mode is normal
Definition: IfxPsi5s.h:152
IfxPsi5s_Psi5s_Config
PSI5S module configuration structure.
Definition: IfxPsi5s_Psi5s.h:388
IfxPsi5s_Psi5s_GlobalControlConfig::idleTime
uint32 idleTime
Specifies the number of stop bits in addition to last UART frame that is required for start of frame ...
Definition: IfxPsi5s_Psi5s.h:275
IfxPsi5s_initTxPin
IFX_INLINE void IfxPsi5s_initTxPin(const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxPsi5s.h:483
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxPsi5s_EnhancedProtocol_toothGapMethod
toothGapMethod Enhanced protocol type
Definition: IfxPsi5s.h:161
IfxPsi5s_AscMode_sync
Synchronous mode.
Definition: IfxPsi5s.h:98
IfxPsi5s_TimestampRegister_a
Timestamp register A.
Definition: IfxPsi5s.h:254
IfxPsi5s_Psi5s_GlobalControlConfig::framingErrorConsideredForRSI
boolean framingErrorConsideredForRSI
Specifies whether FE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:271
IfxPsi5s_Psi5s_PulseGeneration::periodicOrExternal
IfxPsi5s_TriggerType periodicOrExternal
Specifies whether periodic trigger or external trigger or bypass is selected.
Definition: IfxPsi5s_Psi5s.h:299
IfxPsi5s_Psi5s
PSI5S handle data structure.
Definition: IfxPsi5s_Psi5s.h:230
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxPsi5s_ClockType_timeStamp
Timestamp clock.
Definition: IfxPsi5s.h:134
IfxPsi5s_Psi5s_ReceiveControl::timestampTriggerSelect
IfxPsi5s_TimestampTrigger timestampTriggerSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5s_Psi5s.h:311
IfxPsi5s_Psi5s_Pins::rx
IFX_CONST IfxPsi5s_Rx_In * rx
PSI5S Rx pin.
Definition: IfxPsi5s_Psi5s.h:282
IfxPsi5s_Psi5s_AscConfig::transmitMode
IfxPsi5s_AscMode transmitMode
Specifies the mode of operation for ASC transmitter.
Definition: IfxPsi5s_Psi5s.h:250
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxPsi5s_Psi5s_Frame::status
IfxPsi5s_Psi5s_ReceiveStatus status
Receiver status.
Definition: IfxPsi5s_Psi5s.h:405
IfxPsi5s_CrcOrParity_parity
parity selection
Definition: IfxPsi5s.h:143
IfxPsi5s_Psi5s_ChannelConfig::receiveControl
IfxPsi5s_Psi5s_ReceiveControl receiveControl
Specifies the configuration for reception.
Definition: IfxPsi5s_Psi5s.h:382
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxPsi5s_Psi5s_Frame::timestamp
IfxPsi5s_Psi5s_ReceiveTimestamp timestamp
Receiver timestamp.
Definition: IfxPsi5s_Psi5s.h:406
IfxPsi5s_Psi5s_TransmitControl::bitStuffControl
boolean bitStuffControl
Specifies whether the bit stuffing is turned on or not.
Definition: IfxPsi5s_Psi5s.h:354
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:195
IfxPsi5s_Psi5s_ChannelTrigger::channelTriggerCounter
uint32 channelTriggerCounter
Specifies the channel trigger counter.
Definition: IfxPsi5s_Psi5s.h:259
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxPsi5s_Psi5s_initModule
boolean IfxPsi5s_Psi5s_initModule(IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
Initialise the PSI5S with the supplied configureation.
Definition: IfxPsi5s_Psi5s.c:271
IfxPsi5s_Psi5s_Channel
Channel handle data structure.
Definition: IfxPsi5s_Psi5s.h:367
IfxScuCcu_getBaud2Frequency
float32 IfxScuCcu_getBaud2Frequency(void)
API to get BAUD2 divider frequency. This API returns the Baud2 frequency based on the divider value i...
Definition: IfxScuCcu.c:230
IfxPsi5s_Psi5s_Config::ascConfig
IfxPsi5s_Psi5s_AscConfig ascConfig
Specifies the configuration for ASC.
Definition: IfxPsi5s_Psi5s.h:395
IfxPsi5s_Psi5s_ChannelConfig
Channel configuration structure.
Definition: IfxPsi5s_Psi5s.h:375
IfxPsi5s_Psi5s_initModuleConfig
void IfxPsi5s_Psi5s_initModuleConfig(IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
Initialise buffer with default PSI5S configuration.
Definition: IfxPsi5s_Psi5s.c:389
IfxPsi5s_Psi5s::psi5s
Ifx_PSI5S * psi5s
Specifies the pointer to the PSI5S module registers.
Definition: IfxPsi5s_Psi5s.h:232
IfxPsi5s_Psi5s_PulseGeneration::externalTimeBaseSelect
IfxPsi5s_Trigger externalTimeBaseSelect
Specifies the clock source for CTV in the case of external.
Definition: IfxPsi5s_Psi5s.h:298
IfxPsi5s_Psi5s_ReceiveStatus::rds
uint32 rds
received status data.
Definition: IfxPsi5s_Psi5s.h:330
IfxPsi5s_Psi5s_ReceiveControl::watchdogTimerModeSelect
IfxPsi5s_WatchdogTimerMode watchdogTimerModeSelect
Specifies the watchdog timer restart is wrt frame or sync pulse reception.
Definition: IfxPsi5s_Psi5s.h:313
IfxPsi5s_Psi5s_AscConfig::stopBits
IfxPsi5s_AscStopBits stopBits
Specifies the number of stop bits.
Definition: IfxPsi5s_Psi5s.h:247
IFXPSI5S_BG_RANGE
#define IFXPSI5S_BG_RANGE
Definition: IfxPsi5s_cfg.h:74
IfxPsi5s_Psi5s_Clock::mode
IfxPsi5s_DividerMode mode
Specifies the mode of division for the clock.
Definition: IfxPsi5s_Psi5s.h:182
IfxPsi5s_Psi5s_AscConfig::framingCheckEnabled
boolean framingCheckEnabled
Specifies whether framing check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:240
IfxPsi5s_Psi5s_AscConfig::receiveMode
IfxPsi5s_AscMode receiveMode
Specifies the mode of operation for ASC receiver.
Definition: IfxPsi5s_Psi5s.h:248
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxPsi5s_LoopBackMode_disable
loop-back mode disabled
Definition: IfxPsi5s.h:200
IfxPsi5s_DividerMode_off
divider mode is off
Definition: IfxPsi5s.h:154
IfxPsi5s_Psi5s_PulseGeneration::codeforOne
uint32 codeforOne
Specifies the code used to represent &#39;1&#39; - referred as ATXCMD.
Definition: IfxPsi5s_Psi5s.h:296
IfxPsi5s_Psi5s_GlobalControlConfig::crcErrorConsideredForRSI
boolean crcErrorConsideredForRSI
Specifies whether CRCI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:267
IfxPsi5s_Psi5s_getFracDivClock
IFX_STATIC uint32 IfxPsi5s_Psi5s_getFracDivClock(Ifx_PSI5S *psi5s)
get the fracDiv clock frequency
Definition: IfxPsi5s_Psi5s.c:97
IfxPsi5s_Psi5s_AscConfig::transmitterOddParityEnabled
boolean transmitterOddParityEnabled
Specifies whether transmit parity generation should be even or odd.
Definition: IfxPsi5s_Psi5s.h:245
IfxPsi5s_Psi5s_Config::globalControlConfig
IfxPsi5s_Psi5s_GlobalControlConfig globalControlConfig
Specifies the global control configuration.
Definition: IfxPsi5s_Psi5s.h:396
IfxPsi5s_DividerMode_spb
divider mode is off
Definition: IfxPsi5s.h:151
IfxPsi5s_Psi5s_GlobalControlConfig::parityErrorConsideredForRSI
boolean parityErrorConsideredForRSI
Specifies whether PE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:270
IfxPsi5s_Psi5s_Config::timestampCounterB
IfxPsi5s_Psi5s_TimeStampConfig timestampCounterB
Specifies the time stamp counter B properties.
Definition: IfxPsi5s_Psi5s.h:394
IfxPsi5s_Psi5s_ChannelConfig::module
IFX_CONST IfxPsi5s_Psi5s * module
Specifies pointer to the IfxPsi5s_Psi5s module handle.
Definition: IfxPsi5s_Psi5s.h:377
IfxPsi5s_Psi5s_AscConfig::fractionalDividerEnabled
boolean fractionalDividerEnabled
Specifies whether fractional divider is enabled or not.
Definition: IfxPsi5s_Psi5s.h:242
IfxPsi5s_Psi5s_initializeClock
IFX_STATIC uint32 IfxPsi5s_Psi5s_initializeClock(Ifx_PSI5S *psi5s, const IfxPsi5s_Psi5s_Clock *clock)
Configure the fracDiv clock.
Definition: IfxPsi5s_Psi5s.c:432
IfxPsi5s_Psi5s_Frame::data
IfxPsi5s_Psi5s_ReceiveData data
Received data.
Definition: IfxPsi5s_Psi5s.h:404
IfxPsi5s_Psi5s_AscConfig::parityCheckEnabled
boolean parityCheckEnabled
Specifies whether parity check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:239
IfxPsi5s_Psi5s_Channel::channelId
IfxPsi5s_ChannelId channelId
Specifies the channel index.
Definition: IfxPsi5s_Psi5s.h:370
IfxPsi5s_Psi5s_Config::fracDiv
IfxPsi5s_Psi5s_Clock fracDiv
Specifies fractionally divided clock properties.
Definition: IfxPsi5s_Psi5s.h:391
IfxPsi5s_TimestampTrigger_syncPulse
Timestamp trigger on sync pulse.
Definition: IfxPsi5s.h:262
IfxPsi5s_Psi5s_Pins::txMode
IfxPort_OutputMode txMode
Tx as output.
Definition: IfxPsi5s_Psi5s.h:285
IfxPsi5s_TriggerType_periodic
Periodic trigger.
Definition: IfxPsi5s.h:284
IfxPsi5s_Psi5s_AscConfig::baudrateSelection
IfxPsi5s_AscBaudratePrescalar baudrateSelection
Specifies whether divide-by-2 or divide-by-3 is selected for baudrate prescalar.
Definition: IfxPsi5s_Psi5s.h:249
IfxPsi5s_TimeBase_internal
Internal time stamp clock.
Definition: IfxPsi5s.h:246
IfxPsi5s_Psi5s_ChannelConfig::pulseGeneration
IfxPsi5s_Psi5s_PulseGeneration pulseGeneration
Specifies the configuration for sync pulse generation.
Definition: IfxPsi5s_Psi5s.h:380
IfxPsi5s_Psi5s_ReceiveData::rdr
uint32 rdr
received data with frame count
Definition: IfxPsi5s_Psi5s.h:322
IfxPsi5s_Psi5s_ReceiveControl::payloadLength
uint32 payloadLength[IFXPSI5S_NUM_SLOTS]
Specifies the payload length to be received for each slot.
Definition: IfxPsi5s_Psi5s.h:308
IfxPsi5s_Psi5s_enableModule
void IfxPsi5s_Psi5s_enableModule(Ifx_PSI5S *psi5s)
Enable PSI5S kernel.
Definition: IfxPsi5s_Psi5s.c:91
IfxPsi5s_Psi5s_Config::pins
IFX_CONST IfxPsi5s_Psi5s_Pins * pins
structure for PSI5S pin configuration
Definition: IfxPsi5s_Psi5s.h:397
IFXPSI5S_FDV_RANGE
#define IFXPSI5S_FDV_RANGE
Definition: IfxPsi5s_cfg.h:76
IfxPsi5s_Psi5s_Pins::rxMode
IfxPort_InputMode rxMode
Rx pin as input.
Definition: IfxPsi5s_Psi5s.h:283
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxPsi5s_WatchdogTimerMode_frame
Watch Dog Timer is restarted on reception of each recoverable frame (async mode)
Definition: IfxPsi5s.h:302
IfxPsi5s_TriggerType_external
External trigger.
Definition: IfxPsi5s.h:285
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:424
IfxPsi5s_Psi5s_AscConfig::loopbackEnabled
boolean loopbackEnabled
Specifies whether loopback is enabled or not.
Definition: IfxPsi5s_Psi5s.h:244
IfxPsi5s_ClockType
IfxPsi5s_ClockType
Clock Selection.
Definition: IfxPsi5s.h:131
IfxPsi5s_Psi5s_GlobalControlConfig::xcrcErrorConsideredForRSI
boolean xcrcErrorConsideredForRSI
Specifies whether XCRCI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:268
IfxPsi5s_Trigger_0
Trigger 0.
Definition: IfxPsi5s.h:270
IfxPsi5s_Psi5s_Pins::clkMode
IfxPort_OutputMode clkMode
Clk as output.
Definition: IfxPsi5s_Psi5s.h:287
IfxPsi5s_Psi5s_ReceiveControl::frameIdSelect
IfxPsi5s_FrameId frameIdSelect
Specifies if frame ID is updated from frame header or is a rolling number 0..5 copied from FCNT...
Definition: IfxPsi5s_Psi5s.h:312
IfxPsi5s_initClkPin
IFX_INLINE void IfxPsi5s_initClkPin(const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a CLK output.
Definition: IfxPsi5s.h:462
IfxPsi5s_UartFrameCount_3
3 UART frames
Definition: IfxPsi5s.h:292
IfxPsi5s_Psi5s_readFrame
void IfxPsi5s_Psi5s_readFrame(IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s_Psi5s.c:539
IFXPSI5S_STEP_RANGE
#define IFXPSI5S_STEP_RANGE
Definition: IfxPsi5s_cfg.h:64
IfxPsi5s_Psi5s_AscConfig::overrunCheckEnabled
boolean overrunCheckEnabled
Specifies whether overrun check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:241
IfxPsi5s_AscBaudratePrescalar_divideBy2
Divide by 2 is selected for baudrate timer prescalar.
Definition: IfxPsi5s.h:90
IfxPsi5s_Psi5s_ReceiveControl::uartFrameCount
IfxPsi5s_UartFrameCount uartFrameCount[IFXPSI5S_NUM_SLOTS]
Specifies the expected number of UART frames per packet frame for each slot.
Definition: IfxPsi5s_Psi5s.h:314
IfxPsi5s_Psi5s_Clock::type
IfxPsi5s_ClockType type
Specifies the type of clock (fracDiv / timestamp)
Definition: IfxPsi5s_Psi5s.h:183
IfxPsi5s_initRxPin
IFX_INLINE void IfxPsi5s_initRxPin(const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxPsi5s.h:472
IfxPsi5s_Psi5s_GlobalControlConfig::headerErrorConsideredForRSI
boolean headerErrorConsideredForRSI
Specifies whether HDI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:274
IfxPsi5s_NumberExpectedFrames_1
1 psi5s frame expected
Definition: IfxPsi5s.h:216
IfxPsi5s_ClockType_ascOutput
Asc output clock.
Definition: IfxPsi5s.h:136
IfxPsi5s_Psi5s_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxPsi5s_Psi5s.h:288
IfxPsi5s_Psi5s_Config::module
Ifx_PSI5S * module
Specifies the pointer to the PSI5S module registers.
Definition: IfxPsi5s_Psi5s.h:390
IfxPsi5s_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:64
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxPsi5s_ChannelId_0
Ifx_PSI5S Channel 0.
Definition: IfxPsi5s.h:118
IfxPsi5s_Psi5s_GlobalControlConfig::transmitErrorConsideredForRSI
boolean transmitErrorConsideredForRSI
Specifies whether TEI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:269
IfxPsi5s_Psi5s_Channel::module
IfxPsi5s_Psi5s * module
The PSI5S handle structure.
Definition: IfxPsi5s_Psi5s.h:369
IfxPsi5s_Psi5s_Clock
Clock configuration data structure.
Definition: IfxPsi5s_Psi5s.h:179
IfxPsi5s_Psi5s_AscConfig::clockOutput
IfxPsi5s_Psi5s_Clock clockOutput
Specifies the output clock properties.
Definition: IfxPsi5s_Psi5s.h:251
IfxPsi5s_Psi5s_deInitModule
void IfxPsi5s_Psi5s_deInitModule(IfxPsi5s_Psi5s *psi5s)
De-initialise the PSI5S module.
Definition: IfxPsi5s_Psi5s.c:84
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxPsi5s_Psi5s_AscConfig::baudrateFrequency
uint32 baudrateFrequency
Specifies the baudrate frequency.
Definition: IfxPsi5s_Psi5s.h:246
IfxPsi5s_DividerMode_fractional
divider mode is fractional
Definition: IfxPsi5s.h:153
IfxPsi5s_Clk_Out
CLK pin mapping structure.
Definition: IfxPsi5s_PinMap.h:72
IfxPsi5s_Psi5s_ChannelConfig::watchdogTimerLimit
uint32 watchdogTimerLimit
Specifies the watchdog timer limit for each of the slots 0 to 6.
Definition: IfxPsi5s_Psi5s.h:378
IfxPsi5s_Psi5s_Config::timestampCounterA
IfxPsi5s_Psi5s_TimeStampConfig timestampCounterA
Specifies the time stamp counter A properties.
Definition: IfxPsi5s_Psi5s.h:393
IfxPsi5s_Psi5s_TransmitControl::crcGenerationControl
boolean crcGenerationControl
Specifies whether the crc generation is turned on or not.
Definition: IfxPsi5s_Psi5s.h:355
IfxPsi5s_Psi5s_Pins
Structure for PSI5S pin configuration.
Definition: IfxPsi5s_Psi5s.h:280
IfxPsi5s_Psi5s_sendChannelData
boolean IfxPsi5s_Psi5s_sendChannelData(IfxPsi5s_Psi5s_Channel *channel, uint32 data)
Transmit the data through the channel.
Definition: IfxPsi5s_Psi5s.c:566
IfxPsi5s_Psi5s_ReceiveTimestamp::tsm
uint32 tsm
received timestamp along with frame count
Definition: IfxPsi5s_Psi5s.h:338
IfxPsi5s_Psi5s_ReceiveControl::timestampEnabled
boolean timestampEnabled
Specifies whether the timestamp is enabled or not.
Definition: IfxPsi5s_Psi5s.h:307
IfxPsi5s_Psi5s_TransmitControl::startSequenceGenerationControl
boolean startSequenceGenerationControl
Specifies whether the start sequence generation is turned on or not.
Definition: IfxPsi5s_Psi5s.h:356
IfxPsi5s_Psi5s_ChannelConfig::sendControl
IfxPsi5s_Psi5s_TransmitControl sendControl
Specifies the configuration for transmission.
Definition: IfxPsi5s_Psi5s.h:383
IfxPsi5s_Psi5s_Frame
Psi5s frame data structure.
Definition: IfxPsi5s_Psi5s.h:402
IfxPsi5s_Psi5s_GlobalControlConfig::overrunErrorConsideredForRSI
boolean overrunErrorConsideredForRSI
Specifies whether OE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:272


iLLD_TC26B: IfxPsi5s_Psi5s.h Source File

  • Psi5s
  • Psi5s
IfxPsi5s_Psi5s.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s_Psi5s.h
3 * \brief PSI5S PSI5S details
4 * \ingroup IfxLld_Psi5s
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Psi5s_Psi5s_Usage How to use the PSI5S PSI5S Interface driver?
44 * \ingroup IfxLld_Psi5s
45 *
46 * PSI5S defines a current loop based serial communication link typically used to connect airbag sensors or other peripheral devices.Data transmission and configuration of the sensor can be done by modulation of the Sync Pulses.
47 *
48 * In the following sections it will be described, how to integrate the driver into the application framework.
49 *
50 * \section IfxLld_Psi5s_Psi5s_Preparation Preparation
51 * \subsection IfxLld_Psi5s_Psi5s_Include Include Files
52 *
53 * Include following header file into your C code:
54 * \code
55 *
56 * #include <Psi5s/Psi5s/IfxPsi5s_Psi5s.h>
57 *
58 * \endcode
59 *
60 * \subsection IfxLld_Psi5s_Psi5s_Variables Variables
61 *
62 * \code
63 *
64 * // PSI5S handle
65 * IfxPsi5s_Psi5s psi5s;
66 *
67 * \endcode
68 *
69 * \subsection IfxLld_Psi5s_Psi5s_initModule Module Initialisation
70 * \code
71 *
72 * // create module config
73 * IfxPsi5s_Psi5s_Config psi5sModuleConfig;
74 * IfxPsi5s_Psi5s_initModuleConfig(&psi5sModuleConfig, &MODULE_PSI5S);
75 * IfxPsi5s_Psi5s_initModule(&psi5s, &psi5sModuleConfig);
76 *
77 * \endcode
78 *
79 * \subsection IfxLld_Psi5s_Psi5s_initChannel Channel Initialisation
80 * \code
81 *
82 * // create channel config
83 * IfxPsi5s_Psi5s_ChannelConfig psi5sChannelConfig;
84 * IfxPsi5s_Psi5s_initChannelConfig(&psi5sChannelConfig, &psi5s);
85 * // change channel (default is channel 0, change to channel 4)
86 * psi5sChannelConfig.channelId = IfxPsi5s_ChannelId_4;
87 *
88 * // change payloadlength (default is 0, i.e., no frame expecte; change to 8)
89 * for(int slot=0; slot<6; ++slot)
90 * {
91 * psi5sChannelConfig.receiveControl.payloadLength[slot] = 8;
92 * }
93 * // change channel (default is channel 0, change to channel 4)
94 * psi5sChannelConfig.channelId = IfxPsi5s_ChannelId_4;
95 *
96 * // initialize the channel
97 * IfxPsi5s_Psi5s_Channel psi5sChannel;
98 * IfxPsi5s_Psi5s_initChannel(&psi5sChannel, &psi5sChannelConfig);
99 *
100 * \endcode
101 *
102 * Now, PSI5S is ready. Then, call the below APIs to do operation.
103 *
104 * \subsection IfxLld_Psi5s_Psi5s_sendChannelData Send Channel Data
105 * \code
106 * uint32 channels = (1 << IfxPsi5s_ChannelId_4); // enable channel 4
107 * uint32 mask = (1 << IfxPsi5s_ChannelId_4); // modify the selection for channel 4
108 *
109 * // enable the channel trigger counter
110 * IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(&psi5s, channels, mask);
111 *
112 * // enable the channel
113 * IfxPsi5s_Psi5s_enableDisableChannels(&psi5s, channels, mask);
114 *
115 * // start ASC interface
116 * IfxPsi5s_Psi5s_startAscTransactions(&psi5s);
117 *
118 * uint32 data = 0x5;
119 * // send data
120 * if(IfxPsi5s_Psi5s_sendChannelData(&psi5sChannel, data))
121 * {
122 * // wait till data transfer is completed
123 * while(psi5s.psi5s->INTSTAT[IfxPsi5s_ChannelId_4].B.TPI == 0);
124 * }
125 *
126 * \endcode
127 *
128 * \subsection IfxLld_Psi5s_Psi5s_readFrame Read Channel Frame
129 * \code
130 * // enable ASC receiver
131 * IfxPsi5s_Psi5s_enableAscReceiver(&psi5s);
132 *
133 * // start ASC interface
134 * IfxPsi5s_Psi5s_startAscTransactions(&psi5s);
135 *
136 * // add the code below to initiate the sensor to transmit frames
137 * // end of code to initiate the sensor to transmit frames
138 *
139 * IfxPsi5s_Psi5s_Frame frame;
140 *
141 * while(!IfxPsi5s_Psi5s_getReadFrameStatus(psi5,IfxPsi5s_ChannelId_4));
142 *
143 * IfxPsi5s_Psi5s_readFrame(&psi5sChannel, &frame))
144 *
145 * \endcode
146 *
147 * \defgroup IfxLld_Psi5s_Psi5s PSI5S
148 * \ingroup IfxLld_Psi5s
149 * \defgroup IfxLld_Psi5s_Psi5s_Structures Data Structures
150 * \ingroup IfxLld_Psi5s_Psi5s
151 * \defgroup IfxLld_Psi5s_Psi5s_Module Module Initialise Functions
152 * \ingroup IfxLld_Psi5s_Psi5s
153 * \defgroup IfxLld_Psi5s_Psi5s_Channel Channel Functions
154 * \ingroup IfxLld_Psi5s_Psi5s
155 * \defgroup IfxLld_Psi5s_Psi5s_Utility Utility Functions
156 * \ingroup IfxLld_Psi5s_Psi5s
157 * \defgroup IfxLld_Psi5s_Psi5s_Interrupt Interrupt configuration Function
158 * \ingroup IfxLld_Psi5s_Psi5s
159 */
160
161 #ifndef IFXPSI5S_PSI5S_H
162 #define IFXPSI5S_PSI5S_H 1
163
164 /******************************************************************************/
165 /*----------------------------------Includes----------------------------------*/
166 /******************************************************************************/
167
168 #include "Psi5s/Std/IfxPsi5s.h"
169 #include "Scu/Std/IfxScuWdt.h"
170
171 /******************************************************************************/
172 /*-----------------------------Data Structures--------------------------------*/
173 /******************************************************************************/
174
175 /** \addtogroup IfxLld_Psi5s_Psi5s_Structures
176 * \{ */
177 /** \brief Clock configuration data structure
178 */
179 typedef struct
180 {
181 uint32 frequency; /**< \brief Specifies the frequency for the clock */
182 IfxPsi5s_DividerMode mode; /**< \brief Specifies the mode of division for the clock */
183 IfxPsi5s_ClockType type; /**< \brief Specifies the type of clock (fracDiv / timestamp) */
184 } IfxPsi5s_Psi5s_Clock;
185
186 /** \brief Received individual bits
187 */
188 typedef struct
189 {
190 uint8 xcrc : 6; /**< \brief Received XCRC */
191 uint8 xcrcError : 1; /**< \brief XCRC error flag */
192 uint8 crc : 3; /**< \brief Received CRC */
193 uint8 crcError : 1; /**< \brief CRC error flag */
194 uint8 errorFlag0 : 1; /**< \brief Error signalling flag 0 */
195 uint8 errorFlag1 : 1; /**< \brief Error signalling flag 1 */
196 uint8 headerErrorFlag : 1; /**< \brief Header error signalling flag */
197 uint8 ascParityErrorFlag : 1; /**< \brief ASC parity error flag */
198 uint8 ascFramingErrorFlag : 1; /**< \brief ASC framing error flag */
199 uint8 ascOverrunErrorFlag : 1; /**< \brief ASC overrun error flag */
200 uint8 watchdogTimeoutErrorFlag : 1; /**< \brief Watchdog timeout error flag */
201 uint8 receiveBufferOverflowFlag : 1; /**< \brief Receive buffer overflow flag */
202 uint8 frameId : 3; /**< \brief Frame ID */
203 uint8 channelId : 3; /**< \brief Channel ID */
204 uint8 actualUartFrameCount : 3; /**< \brief UART frames actually received */
205 uint8 packetFrameCount : 4; /**< \brief Packet frame count */
206 } IfxPsi5s_Psi5s_ReceivedBits;
207
208 /** \brief Receive data structure with different segments of data
209 */
210 typedef struct
211 {
212 uint32 readData : 28; /**< \brief Received data */
213 uint8 packetFrameCount; /**< \brief Packet frame count */
214 } IfxPsi5s_Psi5s_ReceivedData;
215
216 /** \brief Received timestamp contents structure
217 */
218 typedef struct
219 {
220 uint8 packetFrameCount : 4; /**< \brief Packet frame count */
221 uint32 timestamp : 24; /**< \brief Received data */
222 } IfxPsi5s_Psi5s_Timestamp;
223
224 /** \} */
225
226 /** \addtogroup IfxLld_Psi5s_Psi5s_Structures
227 * \{ */
228 /** \brief PSI5S handle data structure
229 */
230 typedef struct
231 {
232 Ifx_PSI5S *psi5s; /**< \brief Specifies the pointer to the PSI5S module registers */
233 } IfxPsi5s_Psi5s;
234
235 /** \brief PSI5S module configuration structure
236 */
237 typedef struct
238 {
239 boolean parityCheckEnabled; /**< \brief Specifies whether parity check is enabled or not */
240 boolean framingCheckEnabled; /**< \brief Specifies whether framing check is enabled or not */
241 boolean overrunCheckEnabled; /**< \brief Specifies whether overrun check is enabled or not */
242 boolean fractionalDividerEnabled; /**< \brief Specifies whether fractional divider is enabled or not */
243 boolean receiverOddParityEnabled; /**< \brief Specifies whether receiver parity check should be for even or odd */
244 boolean loopbackEnabled; /**< \brief Specifies whether loopback is enabled or not */
245 boolean transmitterOddParityEnabled; /**< \brief Specifies whether transmit parity generation should be even or odd */
246 uint32 baudrateFrequency; /**< \brief Specifies the baudrate frequency */
247 IfxPsi5s_AscStopBits stopBits; /**< \brief Specifies the number of stop bits */
248 IfxPsi5s_AscMode receiveMode; /**< \brief Specifies the mode of operation for ASC receiver */
249 IfxPsi5s_AscBaudratePrescalar baudrateSelection; /**< \brief Specifies whether divide-by-2 or divide-by-3 is selected for baudrate prescalar */
250 IfxPsi5s_AscMode transmitMode; /**< \brief Specifies the mode of operation for ASC transmitter */
251 IfxPsi5s_Psi5s_Clock clockOutput; /**< \brief Specifies the output clock properties */
252 } IfxPsi5s_Psi5s_AscConfig;
253
254 /** \brief channel trigger configuration structure
255 */
256 typedef struct
257 {
258 uint32 channelTriggerValue; /**< \brief Specifies the channel trigger value CTV */
259 uint32 channelTriggerCounter; /**< \brief Specifies the channel trigger counter */
260 } IfxPsi5s_Psi5s_ChannelTrigger;
261
262 /** \brief PSI5S global control configuration structure
263 */
264 typedef struct
265 {
266 boolean ascOnlyMode; /**< \brief Specifies if the module is in ASC only mode */
267 boolean crcErrorConsideredForRSI; /**< \brief Specifies whether CRCI is considered for RSI assertion */
268 boolean xcrcErrorConsideredForRSI; /**< \brief Specifies whether XCRCI is considered for RSI assertion */
269 boolean transmitErrorConsideredForRSI; /**< \brief Specifies whether TEI is considered for RSI assertion */
270 boolean parityErrorConsideredForRSI; /**< \brief Specifies whether PE is considered for RSI assertion */
271 boolean framingErrorConsideredForRSI; /**< \brief Specifies whether FE is considered for RSI assertion */
272 boolean overrunErrorConsideredForRSI; /**< \brief Specifies whether OE is considered for RSI assertion */
273 boolean receiveBufferErrorConsideredForRSI; /**< \brief Specifies whether RBI is considered for RSI assertion */
274 boolean headerErrorConsideredForRSI; /**< \brief Specifies whether HDI is considered for RSI assertion */
275 uint32 idleTime; /**< \brief Specifies the number of stop bits in addition to last UART frame that is required for start of frame detection */
276 } IfxPsi5s_Psi5s_GlobalControlConfig;
277
278 /** \brief Structure for PSI5S pin configuration
279 */
280 typedef struct
281 {
282 IFX_CONST IfxPsi5s_Rx_In *rx; /**< \brief PSI5S Rx pin */
283 IfxPort_InputMode rxMode; /**< \brief Rx pin as input */
284 IFX_CONST IfxPsi5s_Tx_Out *tx; /**< \brief PSI5S Tx pin */
285 IfxPort_OutputMode txMode; /**< \brief Tx as output */
286 IFX_CONST IfxPsi5s_Clk_Out *clk; /**< \brief PSI5S Clk Pin */
287 IfxPort_OutputMode clkMode; /**< \brief Clk as output */
288 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
289 } IfxPsi5s_Psi5s_Pins;
290
291 /** \brief Sync pulse generation configuration structure
292 */
293 typedef struct
294 {
295 uint32 codeforZero; /**< \brief Specifies the code used to represent '0' - referred as TXCMD */
296 uint32 codeforOne; /**< \brief Specifies the code used to represent '1' - referred as ATXCMD */
297 IfxPsi5s_TimeBase timeBaseSelect; /**< \brief Specifies the clock source for CTV as internal or external */
298 IfxPsi5s_Trigger externalTimeBaseSelect; /**< \brief Specifies the clock source for CTV in the case of external */
299 IfxPsi5s_TriggerType periodicOrExternal; /**< \brief Specifies whether periodic trigger or external trigger or bypass is selected */
300 IfxPsi5s_Trigger externalTriggerSelect; /**< \brief Specifies the trigger source in case of external triggerring */
301 } IfxPsi5s_Psi5s_PulseGeneration;
302
303 /** \brief Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers
304 */
305 typedef struct
306 {
307 boolean timestampEnabled; /**< \brief Specifies whether the timestamp is enabled or not */
308 uint32 payloadLength[IFXPSI5S_NUM_SLOTS]; /**< \brief Specifies the payload length to be received for each slot */
309 IfxPsi5s_CrcOrParity crcOrParity[IFXPSI5S_NUM_SLOTS]; /**< \brief Specifies the crc or parity selection for the slots 0 to 5 */
310 IfxPsi5s_TimestampRegister timestampSelect; /**< \brief Specifies the timestamp register selection for pulses */
311 IfxPsi5s_TimestampTrigger timestampTriggerSelect; /**< \brief Specifies the timestamp register selection for pulses */
312 IfxPsi5s_FrameId frameIdSelect; /**< \brief Specifies if frame ID is updated from frame header or is a rolling number 0..5 copied from FCNT */
313 IfxPsi5s_WatchdogTimerMode watchdogTimerModeSelect; /**< \brief Specifies the watchdog timer restart is wrt frame or sync pulse reception */
314 IfxPsi5s_UartFrameCount uartFrameCount[IFXPSI5S_NUM_SLOTS]; /**< \brief Specifies the expected number of UART frames per packet frame for each slot */
315 IfxPsi5s_NumberExpectedFrames numberOfFramesExpected; /**< \brief Specifies the number of psi5s frames expected */
316 } IfxPsi5s_Psi5s_ReceiveControl;
317
318 /** \brief "Received data" data structure
319 */
320 typedef union
321 {
322 uint32 rdr; /**< \brief received data with frame count */
323 IfxPsi5s_Psi5s_ReceivedData receivedData; /**< \brief Receive data structure with different segments of data */
324 } IfxPsi5s_Psi5s_ReceiveData;
325
326 /** \brief Receiver status data structure
327 */
328 typedef union
329 {
330 uint32 rds; /**< \brief received status data. */
331 IfxPsi5s_Psi5s_ReceivedBits receivedBits; /**< \brief Received individual bits */
332 } IfxPsi5s_Psi5s_ReceiveStatus;
333
334 /** \brief Receiver timestamp data structure
335 */
336 typedef union
337 {
338 uint32 tsm; /**< \brief received timestamp along with frame count */
339 IfxPsi5s_Psi5s_Timestamp timeStamp; /**< \brief Received timestamp contents structure */
340 } IfxPsi5s_Psi5s_ReceiveTimestamp;
341
342 /** \brief Timestamp configuration data structure
343 */
344 typedef struct
345 {
346 IfxPsi5s_Trigger externalTimeBaseSelect; /**< \brief Specifies the clock base for counter CTS in the case of external */
347 IfxPsi5s_TimeBase timeBaseSelect; /**< \brief Specifies the clock source for CTS as internal or external */
348 } IfxPsi5s_Psi5s_TimeStampConfig;
349
350 /** \brief Transmit control configuration structure
351 */
352 typedef struct
353 {
354 boolean bitStuffControl; /**< \brief Specifies whether the bit stuffing is turned on or not */
355 boolean crcGenerationControl; /**< \brief Specifies whether the crc generation is turned on or not */
356 boolean startSequenceGenerationControl; /**< \brief Specifies whether the start sequence generation is turned on or not */
357 uint32 payloadLength; /**< \brief Specifies the payload length to be sent */
358 IfxPsi5s_EnhancedProtocol enhancedProtocolSelection; /**< \brief Specifies whether the enhanced protocol is selected or not */
359 } IfxPsi5s_Psi5s_TransmitControl;
360
361 /** \} */
362
363 /** \addtogroup IfxLld_Psi5s_Psi5s_Structures
364 * \{ */
365 /** \brief Channel handle data structure
366 */
367 typedef struct
368 {
369 IfxPsi5s_Psi5s *module; /**< \brief The PSI5S handle structure */
370 IfxPsi5s_ChannelId channelId; /**< \brief Specifies the channel index */
371 } IfxPsi5s_Psi5s_Channel;
372
373 /** \brief Channel configuration structure
374 */
375 typedef struct
376 {
377 IFX_CONST IfxPsi5s_Psi5s *module; /**< \brief Specifies pointer to the IfxPsi5s_Psi5s module handle */
378 uint32 watchdogTimerLimit; /**< \brief Specifies the watchdog timer limit for each of the slots 0 to 6 */
379 IfxPsi5s_ChannelId channelId; /**< \brief Specifies the channel index */
380 IfxPsi5s_Psi5s_PulseGeneration pulseGeneration; /**< \brief Specifies the configuration for sync pulse generation */
381 IfxPsi5s_Psi5s_ChannelTrigger channelTrigger; /**< \brief Specifies the configuration for channel trigger */
382 IfxPsi5s_Psi5s_ReceiveControl receiveControl; /**< \brief Specifies the configuration for reception */
383 IfxPsi5s_Psi5s_TransmitControl sendControl; /**< \brief Specifies the configuration for transmission */
384 } IfxPsi5s_Psi5s_ChannelConfig;
385
386 /** \brief PSI5S module configuration structure
387 */
388 typedef struct
389 {
390 Ifx_PSI5S *module; /**< \brief Specifies the pointer to the PSI5S module registers */
391 IfxPsi5s_Psi5s_Clock fracDiv; /**< \brief Specifies fractionally divided clock properties */
392 IfxPsi5s_Psi5s_Clock timestampClock; /**< \brief Specifies the time stamp clock properties */
393 IfxPsi5s_Psi5s_TimeStampConfig timestampCounterA; /**< \brief Specifies the time stamp counter A properties */
394 IfxPsi5s_Psi5s_TimeStampConfig timestampCounterB; /**< \brief Specifies the time stamp counter B properties */
395 IfxPsi5s_Psi5s_AscConfig ascConfig; /**< \brief Specifies the configuration for ASC */
396 IfxPsi5s_Psi5s_GlobalControlConfig globalControlConfig; /**< \brief Specifies the global control configuration */
397 IFX_CONST IfxPsi5s_Psi5s_Pins *pins; /**< \brief structure for PSI5S pin configuration */
398 } IfxPsi5s_Psi5s_Config;
399
400 /** \brief Psi5s frame data structure
401 */
402 typedef struct
403 {
404 IfxPsi5s_Psi5s_ReceiveData data; /**< \brief Received data */
405 IfxPsi5s_Psi5s_ReceiveStatus status; /**< \brief Receiver status */
406 IfxPsi5s_Psi5s_ReceiveTimestamp timestamp; /**< \brief Receiver timestamp */
407 } IfxPsi5s_Psi5s_Frame;
408
409 /** \} */
410
411 /** \addtogroup IfxLld_Psi5s_Psi5s_Module
412 * \{ */
413
414 /******************************************************************************/
415 /*-------------------------Global Function Prototypes-------------------------*/
416 /******************************************************************************/
417
418 /** \brief De-initialise the PSI5S module
419 * \param psi5s pointer to the PSI5S module
420 * \return None
421 */
422 IFX_EXTERN void IfxPsi5s_Psi5s_deInitModule(IfxPsi5s_Psi5s *psi5s);
423
424 /** \brief Initialise the PSI5S with the supplied configureation
425 * \param psi5s pointer to the PSI5S module
426 * \param config pointer to the PSI5S configuration
427 * \return TRUE if valid otherwise FALSE
428 *
429 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
430 *
431 */
432 IFX_EXTERN boolean IfxPsi5s_Psi5s_initModule(IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config);
433
434 /** \brief Initialise buffer with default PSI5S configuration
435 * \param config pointer to the PSI5S module configuration buffer
436 * \param psi5s pointer to the PSI5S register space
437 * \return None
438 *
439 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
440 *
441 */
442 IFX_EXTERN void IfxPsi5s_Psi5s_initModuleConfig(IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s);
443
444 /** \} */
445
446 /** \addtogroup IfxLld_Psi5s_Psi5s_Channel
447 * \{ */
448
449 /******************************************************************************/
450 /*-------------------------Inline Function Prototypes-------------------------*/
451 /******************************************************************************/
452
453 /** \brief Enable ASC interface receiver
454 * \param psi5s pointer to the PSI5S module
455 * \return None
456 *
457 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
458 *
459 */
460 IFX_INLINE void IfxPsi5s_Psi5s_enableAscReceiver(IfxPsi5s_Psi5s *psi5s);
461
462 /** \brief Access function to enable/disable any combination of channel trigger counters selected by mask parameter
463 * \param psi5s pointer to the PSI5S module
464 * \param channels specifies the channel trigger counters which should be enabled/disabled
465 * \param mask specifies the channel trigger counters which should be modified
466 * \return None
467 *
468 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
469 *
470 */
471 IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask);
472
473 /** \brief Access function to enable/disable any combination of channels selected by mask parameter
474 * \param psi5s pointer to the PSI5S module
475 * \param channels specifies the channels which should be enabled/disabled
476 * \param mask specifies the channels which should be modified
477 * \return None
478 *
479 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
480 *
481 */
482 IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannels(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask);
483
484 /** \brief Start ASC transactions
485 * \param psi5s pointer to the PSI5S module
486 * \return None
487 *
488 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
489 *
490 */
491 IFX_INLINE void IfxPsi5s_Psi5s_startAscTransactions(IfxPsi5s_Psi5s *psi5s);
492
493 /******************************************************************************/
494 /*-------------------------Global Function Prototypes-------------------------*/
495 /******************************************************************************/
496
497 /** \brief Initialize the channel with the supplied configuration
498 * \param channel pointer to the PSI5S channel
499 * \param config pointer to the PSI5S channel configuration
500 * \return TRUE on success & FALSE if configuration not valid (e.g. missing resource)
501 *
502 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
503 *
504 */
505 IFX_EXTERN boolean IfxPsi5s_Psi5s_initChannel(IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config);
506
507 /** \brief Initialise buffer with default channel configuration
508 * \param config pointer to the PSI5S channel configuration
509 * \param psi5s pointer to the PSI5S module
510 * \return None
511 *
512 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
513 *
514 */
515 IFX_EXTERN void IfxPsi5s_Psi5s_initChannelConfig(IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s);
516
517 /** \brief Get the received psi5s frame for the channel
518 * \param channel pointer to the PSI5S module
519 * \param frame pointer to the PSI5S frame buffer
520 * \return None
521 *
522 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
523 *
524 */
525 IFX_EXTERN void IfxPsi5s_Psi5s_readFrame(IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame);
526
527 /** \brief Transmit the data through the channel
528 * \param channel pointer to the PSI5S channel
529 * \param data data to be sent
530 * \return TRUE if Sends data otherwise FALSE
531 *
532 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
533 *
534 */
535 IFX_EXTERN boolean IfxPsi5s_Psi5s_sendChannelData(IfxPsi5s_Psi5s_Channel *channel, uint32 data);
536
537 /** \} */
538
539 /** \addtogroup IfxLld_Psi5s_Psi5s_Utility
540 * \{ */
541
542 /******************************************************************************/
543 /*-------------------------Global Function Prototypes-------------------------*/
544 /******************************************************************************/
545
546 /** \brief Enable PSI5S kernel
547 * \param psi5s pointer to the base of PSI5S register space
548 * \return None
549 */
550 IFX_EXTERN void IfxPsi5s_Psi5s_enableModule(Ifx_PSI5S *psi5s);
551
552 /** \brief Reset PSI5S kernel
553 * \param psi5s pointer to the base of PSI5S registers
554 * \return None
555 */
556 IFX_EXTERN void IfxPsi5s_Psi5s_resetModule(Ifx_PSI5S *psi5s);
557
558 /** \} */
559
560 /******************************************************************************/
561 /*-------------------------Inline Function Prototypes-------------------------*/
562 /******************************************************************************/
563
564 /** \brief Get the received psi5s frame for the channel
565 * \param psi5s pointer to the PSI5S module
566 * \param channelId specifies channelID
567 * \return return the status of Frame
568 */
569 IFX_INLINE boolean IfxPsi5s_Psi5s_getReadFrameStatus(IfxPsi5s_Psi5s *psi5s, IfxPsi5s_ChannelId channelId);
570
571 /******************************************************************************/
572 /*---------------------Inline Function Implementations------------------------*/
573 /******************************************************************************/
574
575 IFX_INLINE void IfxPsi5s_Psi5s_enableAscReceiver(IfxPsi5s_Psi5s *psi5s)
576 {
577 IfxPsi5s_enableAscReceiver(psi5s->psi5s);
578 }
579
580
581 IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
582 {
583 IfxPsi5s_enableDisableChannelTriggerCounters(psi5s->psi5s, channels, mask);
584 }
585
586
587 IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannels(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
588 {
589 IfxPsi5s_enableDisableChannels(psi5s->psi5s, channels, mask);
590 }
591
592
593 IFX_INLINE void IfxPsi5s_Psi5s_startAscTransactions(IfxPsi5s_Psi5s *psi5s)
594 {
595 IfxPsi5s_startAscTransactions(psi5s->psi5s);
596 }
597
598
599 IFX_INLINE boolean IfxPsi5s_Psi5s_getReadFrameStatus(IfxPsi5s_Psi5s *psi5s, IfxPsi5s_ChannelId channelId)
600 {
601 boolean flag = 0;
602 flag = IfxPsi5s_getReadFrameStatus(psi5s->psi5s, channelId);
603 return flag;
604 }
605
606
607 #endif /* IFXPSI5S_PSI5S_H */
IfxPsi5s_WatchdogTimerMode
IfxPsi5s_WatchdogTimerMode
MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode.
Definition: IfxPsi5s.h:300
IfxPsi5s_Psi5s_initChannelConfig
IFX_EXTERN void IfxPsi5s_Psi5s_initChannelConfig(IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
Initialise buffer with default channel configuration.
Definition: IfxPsi5s_Psi5s.c:214
IfxPsi5s_Psi5s_ReceiveControl::numberOfFramesExpected
IfxPsi5s_NumberExpectedFrames numberOfFramesExpected
Specifies the number of psi5s frames expected.
Definition: IfxPsi5s_Psi5s.h:315
IfxPsi5s_Psi5s_ReceivedBits::packetFrameCount
uint8 packetFrameCount
Packet frame count.
Definition: IfxPsi5s_Psi5s.h:205
IfxPsi5s_Psi5s_ReceiveTimestamp::timeStamp
IfxPsi5s_Psi5s_Timestamp timeStamp
Received timestamp contents structure.
Definition: IfxPsi5s_Psi5s.h:339
IfxPsi5s_Psi5s_GlobalControlConfig::receiveBufferErrorConsideredForRSI
boolean receiveBufferErrorConsideredForRSI
Specifies whether RBI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:273
IfxPsi5s_Psi5s_resetModule
IFX_EXTERN void IfxPsi5s_Psi5s_resetModule(Ifx_PSI5S *psi5s)
Reset PSI5S kernel.
Definition: IfxPsi5s_Psi5s.c:549
IfxPsi5s_Psi5s_Pins::clk
IFX_CONST IfxPsi5s_Clk_Out * clk
PSI5S Clk Pin.
Definition: IfxPsi5s_Psi5s.h:286
IfxPsi5s_Psi5s_TransmitControl::payloadLength
uint32 payloadLength
Specifies the payload length to be sent.
Definition: IfxPsi5s_Psi5s.h:357
IfxPsi5s_Psi5s_ReceivedData::readData
uint32 readData
Received data.
Definition: IfxPsi5s_Psi5s.h:212
IfxPsi5s_ChannelId
IfxPsi5s_ChannelId
PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID.
Definition: IfxPsi5s.h:116
IfxPsi5s_Psi5s_TransmitControl::enhancedProtocolSelection
IfxPsi5s_EnhancedProtocol enhancedProtocolSelection
Specifies whether the enhanced protocol is selected or not.
Definition: IfxPsi5s_Psi5s.h:358
IfxPsi5s_Psi5s_AscConfig
PSI5S module configuration structure.
Definition: IfxPsi5s_Psi5s.h:237
IfxPsi5s_Psi5s_ChannelConfig::channelTrigger
IfxPsi5s_Psi5s_ChannelTrigger channelTrigger
Specifies the configuration for channel trigger.
Definition: IfxPsi5s_Psi5s.h:381
IfxPsi5s_Psi5s_initChannel
IFX_EXTERN boolean IfxPsi5s_Psi5s_initChannel(IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxPsi5s_Psi5s.c:124
IfxPsi5s_Psi5s_ReceivedBits::xcrc
uint8 xcrc
Received XCRC.
Definition: IfxPsi5s_Psi5s.h:190
IfxPsi5s_Psi5s_ReceivedBits::channelId
uint8 channelId
Channel ID.
Definition: IfxPsi5s_Psi5s.h:203
IfxPsi5s_AscBaudratePrescalar
IfxPsi5s_AscBaudratePrescalar
MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select.
Definition: IfxPsi5s.h:88
IfxPsi5s_Psi5s_ReceivedBits::actualUartFrameCount
uint8 actualUartFrameCount
UART frames actually received.
Definition: IfxPsi5s_Psi5s.h:204
IfxPsi5s_Rx_In
RX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:56
IfxPsi5s_EnhancedProtocol
IfxPsi5s_EnhancedProtocol
MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types.
Definition: IfxPsi5s.h:159
IfxPsi5s_Psi5s_ReceiveControl::timestampSelect
IfxPsi5s_TimestampRegister timestampSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5s_Psi5s.h:310
IfxPsi5s_Psi5s_AscConfig::receiverOddParityEnabled
boolean receiverOddParityEnabled
Specifies whether receiver parity check should be for even or odd.
Definition: IfxPsi5s_Psi5s.h:243
IfxPsi5s_Psi5s_Clock::frequency
uint32 frequency
Specifies the frequency for the clock.
Definition: IfxPsi5s_Psi5s.h:181
IfxPsi5s_Psi5s_ReceiveStatus
Receiver status data structure.
Definition: IfxPsi5s_Psi5s.h:328
IfxPsi5s_Psi5s_PulseGeneration::codeforZero
uint32 codeforZero
Specifies the code used to represent &#39;0&#39; - referred as TXCMD.
Definition: IfxPsi5s_Psi5s.h:295
IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters
IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channel trigger counters selected by mask parame...
Definition: IfxPsi5s_Psi5s.h:581
IfxPsi5s_Psi5s_Config::timestampClock
IfxPsi5s_Psi5s_Clock timestampClock
Specifies the time stamp clock properties.
Definition: IfxPsi5s_Psi5s.h:392
IfxPsi5s_TimestampTrigger
IfxPsi5s_TimestampTrigger
MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger.
Definition: IfxPsi5s.h:260
IfxPsi5s_Psi5s_ChannelTrigger::channelTriggerValue
uint32 channelTriggerValue
Specifies the channel trigger value CTV.
Definition: IfxPsi5s_Psi5s.h:258
IfxPsi5s_Psi5s_PulseGeneration::timeBaseSelect
IfxPsi5s_TimeBase timeBaseSelect
Specifies the clock source for CTV as internal or external.
Definition: IfxPsi5s_Psi5s.h:297
IfxPsi5s_TimestampRegister
IfxPsi5s_TimestampRegister
MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register.
Definition: IfxPsi5s.h:252
IfxPsi5s_DividerMode
IfxPsi5s_DividerMode
MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode.
Definition: IfxPsi5s.h:149
IfxPsi5s_Psi5s_Pins::tx
IFX_CONST IfxPsi5s_Tx_Out * tx
PSI5S Tx pin.
Definition: IfxPsi5s_Psi5s.h:284
IfxPsi5s.h
PSI5S basic functionality.
IfxPsi5s_Psi5s_ReceivedBits::receiveBufferOverflowFlag
uint8 receiveBufferOverflowFlag
Receive buffer overflow flag.
Definition: IfxPsi5s_Psi5s.h:201
IfxPsi5s_Psi5s_PulseGeneration::externalTriggerSelect
IfxPsi5s_Trigger externalTriggerSelect
Specifies the trigger source in case of external triggerring.
Definition: IfxPsi5s_Psi5s.h:300
IfxPsi5s_Psi5s_ReceivedBits::ascFramingErrorFlag
uint8 ascFramingErrorFlag
ASC framing error flag.
Definition: IfxPsi5s_Psi5s.h:198
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxPsi5s_Psi5s_GlobalControlConfig::ascOnlyMode
boolean ascOnlyMode
Specifies if the module is in ASC only mode.
Definition: IfxPsi5s_Psi5s.h:266
IfxPsi5s_Psi5s_Config
PSI5S module configuration structure.
Definition: IfxPsi5s_Psi5s.h:388
IfxPsi5s_Psi5s_GlobalControlConfig::idleTime
uint32 idleTime
Specifies the number of stop bits in addition to last UART frame that is required for start of frame ...
Definition: IfxPsi5s_Psi5s.h:275
IfxPsi5s_enableAscReceiver
void IfxPsi5s_enableAscReceiver(Ifx_PSI5S *psi5s)
Enable ASC receiver.
Definition: IfxPsi5s.c:69
IfxPsi5s_Psi5s_enableDisableChannels
IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannels(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channels selected by mask parameter.
Definition: IfxPsi5s_Psi5s.h:587
IfxPsi5s_Psi5s_ReceivedBits::ascParityErrorFlag
uint8 ascParityErrorFlag
ASC parity error flag.
Definition: IfxPsi5s_Psi5s.h:197
IfxPsi5s_NumberExpectedFrames
IfxPsi5s_NumberExpectedFrames
MODULE_PSI5S.NFC.NFx:Expected Psi5s frames.
Definition: IfxPsi5s.h:214
IfxPsi5s_Psi5s_GlobalControlConfig::framingErrorConsideredForRSI
boolean framingErrorConsideredForRSI
Specifies whether FE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:271
IfxPsi5s_Psi5s_PulseGeneration::periodicOrExternal
IfxPsi5s_TriggerType periodicOrExternal
Specifies whether periodic trigger or external trigger or bypass is selected.
Definition: IfxPsi5s_Psi5s.h:299
IfxPsi5s_Psi5s
PSI5S handle data structure.
Definition: IfxPsi5s_Psi5s.h:230
IfxPsi5s_Psi5s_ReceivedData
Receive data structure with different segments of data.
Definition: IfxPsi5s_Psi5s.h:210
IfxPsi5s_Psi5s_ReceiveControl::timestampTriggerSelect
IfxPsi5s_TimestampTrigger timestampTriggerSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5s_Psi5s.h:311
IfxPsi5s_Psi5s_Pins::rx
IFX_CONST IfxPsi5s_Rx_In * rx
PSI5S Rx pin.
Definition: IfxPsi5s_Psi5s.h:282
IfxPsi5s_Psi5s_AscConfig::transmitMode
IfxPsi5s_AscMode transmitMode
Specifies the mode of operation for ASC transmitter.
Definition: IfxPsi5s_Psi5s.h:250
IfxPsi5s_Psi5s_Frame::status
IfxPsi5s_Psi5s_ReceiveStatus status
Receiver status.
Definition: IfxPsi5s_Psi5s.h:405
IfxPsi5s_Psi5s_ReceiveData
"Received data" data structure
Definition: IfxPsi5s_Psi5s.h:320
IfxPsi5s_Psi5s_ChannelConfig::receiveControl
IfxPsi5s_Psi5s_ReceiveControl receiveControl
Specifies the configuration for reception.
Definition: IfxPsi5s_Psi5s.h:382
IfxPsi5s_Psi5s_PulseGeneration
Sync pulse generation configuration structure.
Definition: IfxPsi5s_Psi5s.h:293
IfxScuWdt.h
SCU basic functionality.
IfxPsi5s_Psi5s_Frame::timestamp
IfxPsi5s_Psi5s_ReceiveTimestamp timestamp
Receiver timestamp.
Definition: IfxPsi5s_Psi5s.h:406
IfxPsi5s_Psi5s_TransmitControl::bitStuffControl
boolean bitStuffControl
Specifies whether the bit stuffing is turned on or not.
Definition: IfxPsi5s_Psi5s.h:354
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxPsi5s_Psi5s_ReceivedBits::errorFlag0
uint8 errorFlag0
Error signalling flag 0.
Definition: IfxPsi5s_Psi5s.h:194
IfxPsi5s_Psi5s_ChannelTrigger::channelTriggerCounter
uint32 channelTriggerCounter
Specifies the channel trigger counter.
Definition: IfxPsi5s_Psi5s.h:259
IfxPsi5s_Psi5s_enableAscReceiver
IFX_INLINE void IfxPsi5s_Psi5s_enableAscReceiver(IfxPsi5s_Psi5s *psi5s)
Enable ASC interface receiver.
Definition: IfxPsi5s_Psi5s.h:575
IfxPsi5s_Psi5s_initModule
IFX_EXTERN boolean IfxPsi5s_Psi5s_initModule(IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
Initialise the PSI5S with the supplied configureation.
Definition: IfxPsi5s_Psi5s.c:271
IfxPsi5s_Psi5s_Channel
Channel handle data structure.
Definition: IfxPsi5s_Psi5s.h:367
IfxPsi5s_Psi5s_Config::ascConfig
IfxPsi5s_Psi5s_AscConfig ascConfig
Specifies the configuration for ASC.
Definition: IfxPsi5s_Psi5s.h:395
IfxPsi5s_Psi5s_ChannelConfig
Channel configuration structure.
Definition: IfxPsi5s_Psi5s.h:375
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxPsi5s_Psi5s_initModuleConfig
IFX_EXTERN void IfxPsi5s_Psi5s_initModuleConfig(IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
Initialise buffer with default PSI5S configuration.
Definition: IfxPsi5s_Psi5s.c:389
IfxPsi5s_Psi5s::psi5s
Ifx_PSI5S * psi5s
Specifies the pointer to the PSI5S module registers.
Definition: IfxPsi5s_Psi5s.h:232
IfxPsi5s_Psi5s_ReceivedBits::xcrcError
uint8 xcrcError
XCRC error flag.
Definition: IfxPsi5s_Psi5s.h:191
IfxPsi5s_Psi5s_PulseGeneration::externalTimeBaseSelect
IfxPsi5s_Trigger externalTimeBaseSelect
Specifies the clock source for CTV in the case of external.
Definition: IfxPsi5s_Psi5s.h:298
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxPsi5s_Psi5s_ReceiveStatus::rds
uint32 rds
received status data.
Definition: IfxPsi5s_Psi5s.h:330
IfxPsi5s_TriggerType
IfxPsi5s_TriggerType
Trigger type defined in.
Definition: IfxPsi5s.h:282
IfxPsi5s_FrameId
IfxPsi5s_FrameId
MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation.
Definition: IfxPsi5s.h:168
IfxPsi5s_Psi5s_ReceivedBits::frameId
uint8 frameId
Frame ID.
Definition: IfxPsi5s_Psi5s.h:202
IfxPsi5s_Psi5s_ReceiveControl::watchdogTimerModeSelect
IfxPsi5s_WatchdogTimerMode watchdogTimerModeSelect
Specifies the watchdog timer restart is wrt frame or sync pulse reception.
Definition: IfxPsi5s_Psi5s.h:313
IfxPsi5s_Psi5s_ReceivedBits::errorFlag1
uint8 errorFlag1
Error signalling flag 1.
Definition: IfxPsi5s_Psi5s.h:195
IfxPsi5s_Psi5s_getReadFrameStatus
IFX_INLINE boolean IfxPsi5s_Psi5s_getReadFrameStatus(IfxPsi5s_Psi5s *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s_Psi5s.h:599
IfxPsi5s_Psi5s_AscConfig::stopBits
IfxPsi5s_AscStopBits stopBits
Specifies the number of stop bits.
Definition: IfxPsi5s_Psi5s.h:247
IfxPsi5s_Psi5s_Clock::mode
IfxPsi5s_DividerMode mode
Specifies the mode of division for the clock.
Definition: IfxPsi5s_Psi5s.h:182
IfxPsi5s_Psi5s_AscConfig::framingCheckEnabled
boolean framingCheckEnabled
Specifies whether framing check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:240
IfxPsi5s_Trigger
IfxPsi5s_Trigger
MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id.
Definition: IfxPsi5s.h:268
IfxPsi5s_Psi5s_AscConfig::receiveMode
IfxPsi5s_AscMode receiveMode
Specifies the mode of operation for ASC receiver.
Definition: IfxPsi5s_Psi5s.h:248
IfxPsi5s_Psi5s_PulseGeneration::codeforOne
uint32 codeforOne
Specifies the code used to represent &#39;1&#39; - referred as ATXCMD.
Definition: IfxPsi5s_Psi5s.h:296
IfxPsi5s_startAscTransactions
void IfxPsi5s_startAscTransactions(Ifx_PSI5S *psi5s)
Start ASC transactions.
Definition: IfxPsi5s.c:122
IfxPsi5s_Psi5s_GlobalControlConfig::crcErrorConsideredForRSI
boolean crcErrorConsideredForRSI
Specifies whether CRCI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:267
IfxPsi5s_Psi5s_Timestamp
Received timestamp contents structure.
Definition: IfxPsi5s_Psi5s.h:218
IfxPsi5s_Psi5s_AscConfig::transmitterOddParityEnabled
boolean transmitterOddParityEnabled
Specifies whether transmit parity generation should be even or odd.
Definition: IfxPsi5s_Psi5s.h:245
IfxPsi5s_Psi5s_GlobalControlConfig
PSI5S global control configuration structure.
Definition: IfxPsi5s_Psi5s.h:264
IfxPsi5s_Psi5s_Config::globalControlConfig
IfxPsi5s_Psi5s_GlobalControlConfig globalControlConfig
Specifies the global control configuration.
Definition: IfxPsi5s_Psi5s.h:396
IfxPsi5s_Psi5s_GlobalControlConfig::parityErrorConsideredForRSI
boolean parityErrorConsideredForRSI
Specifies whether PE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:270
IfxPsi5s_Psi5s_TimeStampConfig
Timestamp configuration data structure.
Definition: IfxPsi5s_Psi5s.h:344
IfxPsi5s_Psi5s_Config::timestampCounterB
IfxPsi5s_Psi5s_TimeStampConfig timestampCounterB
Specifies the time stamp counter B properties.
Definition: IfxPsi5s_Psi5s.h:394
IfxPsi5s_Psi5s_ChannelConfig::module
IFX_CONST IfxPsi5s_Psi5s * module
Specifies pointer to the IfxPsi5s_Psi5s module handle.
Definition: IfxPsi5s_Psi5s.h:377
IfxPsi5s_Psi5s_ReceiveTimestamp
Receiver timestamp data structure.
Definition: IfxPsi5s_Psi5s.h:336
IfxPsi5s_Psi5s_AscConfig::fractionalDividerEnabled
boolean fractionalDividerEnabled
Specifies whether fractional divider is enabled or not.
Definition: IfxPsi5s_Psi5s.h:242
IfxPsi5s_Psi5s_Frame::data
IfxPsi5s_Psi5s_ReceiveData data
Received data.
Definition: IfxPsi5s_Psi5s.h:404
IfxPsi5s_Psi5s_AscConfig::parityCheckEnabled
boolean parityCheckEnabled
Specifies whether parity check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:239
IfxPsi5s_Psi5s_Channel::channelId
IfxPsi5s_ChannelId channelId
Specifies the channel index.
Definition: IfxPsi5s_Psi5s.h:370
IfxPsi5s_Psi5s_Config::fracDiv
IfxPsi5s_Psi5s_Clock fracDiv
Specifies fractionally divided clock properties.
Definition: IfxPsi5s_Psi5s.h:391
IFXPSI5S_NUM_SLOTS
#define IFXPSI5S_NUM_SLOTS
Definition: IfxPsi5s_cfg.h:68
IfxPsi5s_AscMode
IfxPsi5s_AscMode
MODULE_PSI5S.CON.M:ASC mode of operation.
Definition: IfxPsi5s.h:96
IfxPsi5s_getReadFrameStatus
boolean IfxPsi5s_getReadFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s.c:91
IfxPsi5s_Psi5s_ReceivedBits::ascOverrunErrorFlag
uint8 ascOverrunErrorFlag
ASC overrun error flag.
Definition: IfxPsi5s_Psi5s.h:199
IfxPsi5s_Psi5s_Pins::txMode
IfxPort_OutputMode txMode
Tx as output.
Definition: IfxPsi5s_Psi5s.h:285
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxPsi5s_Psi5s_AscConfig::baudrateSelection
IfxPsi5s_AscBaudratePrescalar baudrateSelection
Specifies whether divide-by-2 or divide-by-3 is selected for baudrate prescalar.
Definition: IfxPsi5s_Psi5s.h:249
IfxPsi5s_Psi5s_ChannelConfig::pulseGeneration
IfxPsi5s_Psi5s_PulseGeneration pulseGeneration
Specifies the configuration for sync pulse generation.
Definition: IfxPsi5s_Psi5s.h:380
IfxPsi5s_Psi5s_ReceiveData::rdr
uint32 rdr
received data with frame count
Definition: IfxPsi5s_Psi5s.h:322
IfxPsi5s_Psi5s_startAscTransactions
IFX_INLINE void IfxPsi5s_Psi5s_startAscTransactions(IfxPsi5s_Psi5s *psi5s)
Start ASC transactions.
Definition: IfxPsi5s_Psi5s.h:593
IfxPsi5s_Psi5s_enableModule
IFX_EXTERN void IfxPsi5s_Psi5s_enableModule(Ifx_PSI5S *psi5s)
Enable PSI5S kernel.
Definition: IfxPsi5s_Psi5s.c:91
IfxPsi5s_Psi5s_Timestamp::timestamp
uint32 timestamp
Received data.
Definition: IfxPsi5s_Psi5s.h:221
IfxPsi5s_Psi5s_Config::pins
IFX_CONST IfxPsi5s_Psi5s_Pins * pins
structure for PSI5S pin configuration
Definition: IfxPsi5s_Psi5s.h:397
IfxPsi5s_Psi5s_Pins::rxMode
IfxPort_InputMode rxMode
Rx pin as input.
Definition: IfxPsi5s_Psi5s.h:283
IfxPsi5s_Psi5s_ReceivedBits
Received individual bits.
Definition: IfxPsi5s_Psi5s.h:188
IfxPsi5s_Psi5s_AscConfig::loopbackEnabled
boolean loopbackEnabled
Specifies whether loopback is enabled or not.
Definition: IfxPsi5s_Psi5s.h:244
IfxPsi5s_ClockType
IfxPsi5s_ClockType
Clock Selection.
Definition: IfxPsi5s.h:131
IfxPsi5s_Psi5s_GlobalControlConfig::xcrcErrorConsideredForRSI
boolean xcrcErrorConsideredForRSI
Specifies whether XCRCI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:268
IfxPsi5s_Psi5s_Pins::clkMode
IfxPort_OutputMode clkMode
Clk as output.
Definition: IfxPsi5s_Psi5s.h:287
IfxPsi5s_Psi5s_ReceiveControl::frameIdSelect
IfxPsi5s_FrameId frameIdSelect
Specifies if frame ID is updated from frame header or is a rolling number 0..5 copied from FCNT...
Definition: IfxPsi5s_Psi5s.h:312
IfxPsi5s_Psi5s_ReceiveData::receivedData
IfxPsi5s_Psi5s_ReceivedData receivedData
Receive data structure with different segments of data.
Definition: IfxPsi5s_Psi5s.h:323
IfxPsi5s_Psi5s_ChannelTrigger
channel trigger configuration structure
Definition: IfxPsi5s_Psi5s.h:256
IfxPsi5s_Psi5s_TransmitControl
Transmit control configuration structure.
Definition: IfxPsi5s_Psi5s.h:352
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxPsi5s_Psi5s_readFrame
IFX_EXTERN void IfxPsi5s_Psi5s_readFrame(IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s_Psi5s.c:539
IfxPsi5s_Psi5s_AscConfig::overrunCheckEnabled
boolean overrunCheckEnabled
Specifies whether overrun check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:241
IfxPsi5s_CrcOrParity
IfxPsi5s_CrcOrParity
MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity.
Definition: IfxPsi5s.h:141
IfxPsi5s_UartFrameCount
IfxPsi5s_UartFrameCount
MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count.
Definition: IfxPsi5s.h:290
IfxPsi5s_Psi5s_Clock::type
IfxPsi5s_ClockType type
Specifies the type of clock (fracDiv / timestamp)
Definition: IfxPsi5s_Psi5s.h:183
IfxPsi5s_Psi5s_GlobalControlConfig::headerErrorConsideredForRSI
boolean headerErrorConsideredForRSI
Specifies whether HDI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:274
IfxPsi5s_Psi5s_ReceivedBits::crc
uint8 crc
Received CRC.
Definition: IfxPsi5s_Psi5s.h:192
IfxPsi5s_Psi5s_ReceiveControl
Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers...
Definition: IfxPsi5s_Psi5s.h:305
IfxPsi5s_Psi5s_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxPsi5s_Psi5s.h:288
IfxPsi5s_enableDisableChannelTriggerCounters
void IfxPsi5s_enableDisableChannelTriggerCounters(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter.
Definition: IfxPsi5s.c:75
IfxPsi5s_Psi5s_Config::module
Ifx_PSI5S * module
Specifies the pointer to the PSI5S module registers.
Definition: IfxPsi5s_Psi5s.h:390
IfxPsi5s_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:64
IfxPsi5s_AscStopBits
IfxPsi5s_AscStopBits
MODULE_PSI5S.CON.STP: Number of stop bits.
Definition: IfxPsi5s.h:108
IfxPsi5s_Psi5s_GlobalControlConfig::transmitErrorConsideredForRSI
boolean transmitErrorConsideredForRSI
Specifies whether TEI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:269
IfxPsi5s_Psi5s_Channel::module
IfxPsi5s_Psi5s * module
The PSI5S handle structure.
Definition: IfxPsi5s_Psi5s.h:369
IfxPsi5s_Psi5s_Clock
Clock configuration data structure.
Definition: IfxPsi5s_Psi5s.h:179
IfxPsi5s_Psi5s_AscConfig::clockOutput
IfxPsi5s_Psi5s_Clock clockOutput
Specifies the output clock properties.
Definition: IfxPsi5s_Psi5s.h:251
IfxPsi5s_Psi5s_ReceivedBits::headerErrorFlag
uint8 headerErrorFlag
Header error signalling flag.
Definition: IfxPsi5s_Psi5s.h:196
IfxPsi5s_Psi5s_deInitModule
IFX_EXTERN void IfxPsi5s_Psi5s_deInitModule(IfxPsi5s_Psi5s *psi5s)
De-initialise the PSI5S module.
Definition: IfxPsi5s_Psi5s.c:84
IfxPsi5s_enableDisableChannels
void IfxPsi5s_enableDisableChannels(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter.
Definition: IfxPsi5s.c:83
IfxPsi5s_Psi5s_ReceivedBits::crcError
uint8 crcError
CRC error flag.
Definition: IfxPsi5s_Psi5s.h:193
IfxPsi5s_Psi5s_ReceivedBits::watchdogTimeoutErrorFlag
uint8 watchdogTimeoutErrorFlag
Watchdog timeout error flag.
Definition: IfxPsi5s_Psi5s.h:200
IfxPsi5s_Psi5s_AscConfig::baudrateFrequency
uint32 baudrateFrequency
Specifies the baudrate frequency.
Definition: IfxPsi5s_Psi5s.h:246
IfxPsi5s_Clk_Out
CLK pin mapping structure.
Definition: IfxPsi5s_PinMap.h:72
IfxPsi5s_Psi5s_ChannelConfig::watchdogTimerLimit
uint32 watchdogTimerLimit
Specifies the watchdog timer limit for each of the slots 0 to 6.
Definition: IfxPsi5s_Psi5s.h:378
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxPsi5s_Psi5s_Config::timestampCounterA
IfxPsi5s_Psi5s_TimeStampConfig timestampCounterA
Specifies the time stamp counter A properties.
Definition: IfxPsi5s_Psi5s.h:393
IfxPsi5s_TimeBase
IfxPsi5s_TimeBase
MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base.
Definition: IfxPsi5s.h:244
IfxPsi5s_Psi5s_TransmitControl::crcGenerationControl
boolean crcGenerationControl
Specifies whether the crc generation is turned on or not.
Definition: IfxPsi5s_Psi5s.h:355
IfxPsi5s_Psi5s_ReceiveStatus::receivedBits
IfxPsi5s_Psi5s_ReceivedBits receivedBits
Received individual bits.
Definition: IfxPsi5s_Psi5s.h:331
IfxPsi5s_Psi5s_Pins
Structure for PSI5S pin configuration.
Definition: IfxPsi5s_Psi5s.h:280
IfxPsi5s_Psi5s_sendChannelData
IFX_EXTERN boolean IfxPsi5s_Psi5s_sendChannelData(IfxPsi5s_Psi5s_Channel *channel, uint32 data)
Transmit the data through the channel.
Definition: IfxPsi5s_Psi5s.c:566
IfxPsi5s_Psi5s_ReceiveTimestamp::tsm
uint32 tsm
received timestamp along with frame count
Definition: IfxPsi5s_Psi5s.h:338
IfxPsi5s_Psi5s_ReceiveControl::timestampEnabled
boolean timestampEnabled
Specifies whether the timestamp is enabled or not.
Definition: IfxPsi5s_Psi5s.h:307
IfxPsi5s_Psi5s_TransmitControl::startSequenceGenerationControl
boolean startSequenceGenerationControl
Specifies whether the start sequence generation is turned on or not.
Definition: IfxPsi5s_Psi5s.h:356
IfxPsi5s_Psi5s_ChannelConfig::sendControl
IfxPsi5s_Psi5s_TransmitControl sendControl
Specifies the configuration for transmission.
Definition: IfxPsi5s_Psi5s.h:383
IfxPsi5s_Psi5s_Frame
Psi5s frame data structure.
Definition: IfxPsi5s_Psi5s.h:402
IfxPsi5s_Psi5s_GlobalControlConfig::overrunErrorConsideredForRSI
boolean overrunErrorConsideredForRSI
Specifies whether OE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:272


iLLD_TC26B: IfxPsi5s_cfg.h Source File

  • _Impl
IfxPsi5s_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s_cfg.h
3 * \brief PSI5S on-chip implementation data
4 * \ingroup IfxLld_Psi5s
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Psi5s PSI5S
44 * \ingroup IfxLld
45 * \defgroup IfxLld_Psi5s_Impl Implementation
46 * \ingroup IfxLld_Psi5s
47 * \defgroup IfxLld_Psi5s_Std Standard Driver
48 * \ingroup IfxLld_Psi5s
49 */
50
51 #ifndef IFXPSI5S_CFG_H
52 #define IFXPSI5S_CFG_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 /******************************************************************************/
59 /*-----------------------------------Macros-----------------------------------*/
60 /******************************************************************************/
61
62 #define IFXPSI5S_NUM_CHANNELS 8
63
64 #define IFXPSI5S_STEP_RANGE 1024
65
66 #define IFXPSI5S_NUM_WDTS 7
67
68 #define IFXPSI5S_NUM_SLOTS 6
69
70 #define IFXPSI5S_ENABLE_CHANNELTRIGGER (1 << 8)
71
72 #define IFXPSI5S_ENABLE_CHANNEL (1 << 16)
73
74 #define IFXPSI5S_BG_RANGE 8192
75
76 #define IFXPSI5S_FDV_RANGE 2048
77
78 #define IFXPSI5S_BAUDRATE_1562500 1562500
79
80 /** \brief //0x00FF0000
81 */
82 #define IFXPSI5S_GCR_CHANNELS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 16
83
84 #define IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 8
85
86 #define IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ 4000000
87
88 #define IFXPSI5S_DEFAULT_FASTCLOCK_FREQ 6000000
89
90 #define IFXPSI5S_DEFAULT_TIMESTAMP_FREQ 1000000
91
92 #define IFXPSI5S_NUM_MODULES (1)
93
94 #endif /* IFXPSI5S_CFG_H */


iLLD_TC26B: IfxQspi.c Source File

  • Qspi
  • Std
IfxQspi.c
Go to the documentation of this file.
1 /**
2 * \file IfxQspi.c
3 * \brief QSPI basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxQspi.h"
49
50 /******************************************************************************/
51 /*-------------------------Function Implementations---------------------------*/
52 /******************************************************************************/
53
54 float IfxQspi_calcRealBaudrate(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
55 {
56 int cs = channelId % 8;
57 float fQspi = IfxScuCcu_getMaxFrequency();
58 Ifx_QSPI_ECON econ[8];
59 econ[cs].U = qspi->ECON[cs].U;
60 fQspi = fQspi / (qspi->GLOBALCON.B.TQ + 1);
61 fQspi = fQspi / (econ[cs].B.Q + 1);
62 fQspi = fQspi / ((econ[cs].B.A + 1) + econ[cs].B.B + econ[cs].B.C);
63 return fQspi;
64 }
65
66
67 uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
68 {
69 IFX_UNUSED_PARAMETER(baudrate);
70
71 Ifx_QSPI_BACON bacon;
72 IfxQspi_DelayConst delayConst[3];
73 bacon.U = 0;
74
75 IfxQspi_calculateDelayConstants(qspi, channelId, chMode, delayConst);
76
77 bacon.B.LAST = 0; /* 1-bits Last Word in a Frame, will be set via recalcBasicConfiguration before transfer */
78
79 bacon.B.IPRE = delayConst[0].pre; /* 3-bits Prescaler for the Idle Delay */
80 bacon.B.IDLE = delayConst[0].delay; /* 3-bits Idle Delay Length */
81 bacon.B.LPRE = delayConst[1].pre; /* 3-bits Prescaler for the Leading Delay */
82 bacon.B.LEAD = delayConst[1].delay; /* 3-bits Leading Delay Length */
83 bacon.B.TPRE = delayConst[2].pre; /* 3-bits Prescaler for the Trailing Delay */
84 bacon.B.TRAIL = delayConst[2].delay; /* 2-bits Trailing Delay Length */
85 bacon.B.PARTYP = (chMode->parityMode == Ifx_ParityMode_even) ? 0 : 1;
86 bacon.B.UINT = 0; /* 1-bits User Interrupt at the PT1 Event in the Subsequent Frames */
87 bacon.B.MSB = (chMode->dataHeading == SpiIf_DataHeading_lsbFirst) ? 0 : 1;
88 bacon.B.BYTE = 0; /* only support bitwise selection in B.DL */
89 bacon.B.DL = chMode->dataWidth - 1;
90 bacon.B.CS = channelId;
91
92 return bacon.U;
93 }
94
95
96 uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
97 {
98 IFX_UNUSED_PARAMETER(cs);
99
100 Ifx_QSPI_ECON econ;
101 econ.U = 0;
102
103 const int maxB = 3;
104 float32 tQspi = 1.0 / IfxQspi_getTimeQuantaFrequency(qspi);
105 float32 fBaud = (chConfig->baudrate);
106 int abcMin = (2);
107 int abcMax = (4 + 0 + 4);
108 int q, bestQ = 1, abc, bestAbc = abcMax, halfBaud = 0;
109 sint8 diffB = 0;
110 float32 error, bestError;
111 float32 tTmp, tBaudTmp;
112 boolean done = FALSE;
113
114 if (fBaud == 0.0)
115 {
116 IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, FALSE); /* chosen baud rate is 0 */
117 fBaud = 1.0;
118 }
119
120 float32 tBaud = 1.0 / fBaud;
121
122 bestError = 1e6;
123
124 for (abc = abcMax; abc >= abcMin; abc--)
125 {
126 tTmp = tQspi * abc;
127 q = (int)((tBaud / tTmp) + 0.5);
128
129 if (q > 64)
130 {
131 q = 64;
132 }
133
134 else if ((q * abc) < 4)
135 {
136 q = 2;
137 }
138
139 else if (q < 1)
140 {
141 q = 1;
142 }
143
144 tBaudTmp = tTmp * q;
145 error = __absf(tBaudTmp - tBaud);
146
147 if (__leqf(error, bestError)) /* we have a equal/better error case */
148 {
149 /* process this case only if lesser error / or if ABC is even */
150 if (__neqf(error, bestError) || (((uint32)bestAbc & (uint32)0x1) == 0))
151 {
152 bestError = error;
153 bestAbc = abc;
154 bestQ = q;
155 }
156
157 /* break out if ABC is even and error = 0 */
158 if (((uint32)bestAbc & (uint32)0x1) == 0)
159 {
160 done = (__neqf(error, 0.0)) ? FALSE : TRUE;
161
162 if (done != FALSE)
163 {
164 break;
165 }
166 }
167 }
168 }
169
170 /* Exchange Q and ABC, if ABC is odd and Q is even.
171 * This is because: A+1+B+C is ideally even for
172 * achieving 50% duty cycle of the clock.
173 */
174 if ((bestQ <= abcMax)
175 && (((uint32)bestAbc & (uint32)0x1) != 0)
176 && (((uint32)bestQ & (uint32)0x1) == 0))
177 {
178 q = bestQ;
179 bestQ = bestAbc;
180 bestAbc = q;
181 }
182
183 /* NOTE: In assigning values to A,B,C:
184 * the "sampling point" (which is A+B) has to be as far as possible
185 * from the "shifting point" (end of A+B+C).
186 * The duty cycle is calculated as the ratio of A : B+C
187 * Therefore, to keep 50% duty cycle: A = B+C
188 * Thus, we cannot influence the value of A, once A+B+C is found out
189 * (A+1 is always (A+B+C)/2).
190 * However, in between B and C - we should try to maximize B (and minimize C).
191 * The goal will be to do this - keep max value of B always and keep only any remaining value for C .
192 */
193 halfBaud = bestAbc / 2;
194 diffB = halfBaud - maxB;
195
196 econ.B.Q = bestQ - 1;
197 econ.B.A = halfBaud + (bestAbc % 2) - 1; /* A + 1 = Half of Baud count */
198 econ.B.C = (diffB > 0) ? diffB : 0;
199 econ.B.B = (diffB > 0) ? maxB : halfBaud;
200
201 econ.B.CPH = (chConfig->mode.shiftClock == SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge) ? 1 : 0;
202 econ.B.CPOL = (chConfig->mode.clockPolarity == SpiIf_ClockPolarity_idleLow) ? 0 : 1;
203 econ.B.PAREN = chConfig->mode.parityCheck;
204
205 return econ.U;
206 }
207
208
209 uint32 IfxQspi_calculatePrescaler(Ifx_QSPI *qspi, float baudrate)
210 {
211 float error, bestError;
212 float halfBaud = baudrate / 2;
213 float fQspiIn = IfxQspi_getModuleFrequency(qspi);
214 bestError = 10e6;
215 uint32 i, bestPre = 0;
216
217 for (i = 0; i < 8; i++)
218 {
219 float tempHalfBaud = fQspiIn / (1U << (4 * i));
220 error = __absf(tempHalfBaud - halfBaud);
221
222 if (__leqf(error, bestError))
223 {
224 bestError = error;
225 bestPre = i;
226 }
227 }
228
229 return bestPre;
230 }
231
232
233 uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate)
234 {
235 #define ABCQMIN (4)
236 #define ABCQMAX (8 * 63)
237
238 IFX_UNUSED_PARAMETER(qspi);
239
240 uint32 abcq = ABCQMIN, tq, bestTq;
241 float realTQ, deltaMax, bestDelta, achievedMax;
242 float fQspi = IfxScuCcu_getMaxFrequency();
243
244 if (__leqf(maxBaudrate, 0.0))
245 {
246 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE); /* Max baud rate is 0!! */
247 }
248
249 realTQ = fQspi / (4.0 * maxBaudrate);
250 bestTq = __max((uint32)__roundf(realTQ), 1);
251 bestDelta = __absf(maxBaudrate - (fQspi / bestTq));
252
253 for (abcq = ABCQMIN; abcq <= ABCQMAX; abcq++)
254 {
255 realTQ = fQspi / (maxBaudrate * abcq);
256 tq = (uint32)(realTQ + 0.5);
257 achievedMax = fQspi / (tq * abcq);
258 deltaMax = __absf(maxBaudrate - achievedMax);
259
260 if (__leqf(deltaMax, bestDelta) && (tq >= 1))
261 {
262 bestDelta = deltaMax;
263 bestTq = tq;
264 }
265
266 if ((bestDelta == 0) || (tq < 1))
267 {
268 break; //exit the for loop
269 }
270 }
271
272 return __max(bestTq - 1, 0);
273 }
274
275
276 Ifx_QSPI *IfxQspi_getAddress(IfxQspi_Index qspi)
277 {
278 Ifx_QSPI *module;
279
280 if (qspi < IFXQSPI_NUM_MODULES)
281 {
282 module = (Ifx_QSPI *)IfxQspi_cfg_indexMap[qspi].module;
283 }
284 else
285 {
286 module = NULL_PTR;
287 }
288
289 return module;
290 }
291
292
293 IfxQspi_Index IfxQspi_getIndex(Ifx_QSPI *qspi)
294 {
295 uint32 index;
296 IfxQspi_Index result;
297
298 result = IfxQspi_Index_none;
299
300 for (index = 0; index < IFXQSPI_NUM_MODULES; index++)
301 {
302 if (IfxQspi_cfg_indexMap[index].module == qspi)
303 {
304 result = (IfxQspi_Index)IfxQspi_cfg_indexMap[index].index;
305 break;
306 }
307 }
308
309 return result;
310 }
311
312
313 void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
314 {
315 volatile Ifx_QSPI_RXEXIT *rxFifo = &qspi->RXEXIT;
316
317 while (count > 0)
318 {
319 *(data++) = (uint16)rxFifo->U;
320 count--;
321 }
322 }
323
324
325 void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
326 {
327 volatile Ifx_QSPI_RXEXIT *rxFifo = &qspi->RXEXIT;
328
329 while (count > 0)
330 {
331 *(data++) = rxFifo->U;
332 count--;
333 }
334 }
335
336
337 void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
338 {
339 volatile Ifx_QSPI_RXEXIT *rxFifo = &qspi->RXEXIT;
340
341 while (count > 0)
342 {
343 *(data++) = (uint8)rxFifo->U;
344 count--;
345 }
346 }
347
348
349 uint32 IfxQspi_recalcBasicConfiguration(uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
350 {
351 Ifx_QSPI_BACON bacon;
352 bacon.U = oldBACON;
353
354 if (shortData == FALSE)
355 {
356 bacon.B.DL = numOfData;
357 bacon.B.BYTE = 1;
358 }
359
360 bacon.B.LAST = lastData;
361 return bacon.U;
362 }
363
364
365 void IfxQspi_resetModule(Ifx_QSPI *qspi)
366 {
367 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
368 IfxScuWdt_clearCpuEndinit(passwd);
369 qspi->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
370 qspi->KRST1.B.RST = 1;
371 IfxScuWdt_setCpuEndinit(passwd);
372
373 while (0 == qspi->KRST0.B.RSTSTAT) /* Wait until reset is executed */
374
375 {}
376
377 IfxScuWdt_clearCpuEndinit(passwd);
378 qspi->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
379 IfxScuWdt_setCpuEndinit(passwd);
380 }
381
382
383 void IfxQspi_setSlaveSelectOutputControl(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
384 {
385 uint16 mask = 1 << channelId;
386
387 Ifx_QSPI_SSOC ssoc;
388 ssoc.U = qspi->SSOC.U;
389
390 if (outputEnable)
391 {
392 ssoc.B.OEN |= mask;
393 }
394 else
395 {
396 ssoc.B.OEN &= ~mask;
397 }
398
399 if (activeLevel)
400 {
401 ssoc.B.AOL |= mask;
402 }
403 else
404 {
405 ssoc.B.AOL &= ~mask;
406 }
407
408 qspi->SSOC.U = ssoc.U;
409 }
410
411
412 void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
413 {
414 int cs = channelId % 8;
415 volatile Ifx_QSPI_DATAENTRY *dataEntry = &qspi->DATAENTRY[cs];
416
417 while (count > 0)
418 {
419 dataEntry->U = *(data++);
420 count--;
421 }
422 }
423
424
425 void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
426 {
427 int cs = channelId % 8;
428 volatile Ifx_QSPI_DATAENTRY *dataEntry = &qspi->DATAENTRY[cs];
429
430 while (count > 0)
431 {
432 dataEntry->U = *(data++);
433 count--;
434 }
435 }
436
437
438 void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
439 {
440 int cs = channelId % 8;
441 volatile Ifx_QSPI_DATAENTRY *dataEntry = &qspi->DATAENTRY[cs];
442
443 while (count > 0)
444 {
445 dataEntry->U = *(data++);
446 count--;
447 }
448 }
449
450
451 void IfxQspi_calculateDelayConstants(const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
452 {
453 uint32 divFactor;
454 const SpiIf_SlsoTiming_HalfTsclk *dlyFactorPtr;
455 float32 scaleTemp;
456 uint8 preTemp;
457 uint8 preFinal = 0U;
458 uint8 delayTemp;
459 uint8 delayFinal = 0U;
460 boolean matchFound;
461 uint8 index;
462 uint8 cs = channelId % 8;
463
464 /* obtain the peripheral frequency / sclk frequency multiplication factor */
465 divFactor = (qspi->GLOBALCON.B.TQ + 1) * (qspi->ECON[cs].B.Q + 1) * (qspi->ECON[cs].B.A + 1 + qspi->ECON[cs].B.B + qspi->ECON[cs].B.C);
466
467 /* The user defined delay factor is here - point to it */
468 dlyFactorPtr = &(chMode->csInactiveDelay);
469
470 for (index = 0; index < 3; index++)
471 {
472 /* multiply the div_factor and delay_factor and divide by 2 - this is product of (4^pre)*(delay_mult) */
473 scaleTemp = (dlyFactorPtr[index] * divFactor) / (float32)2.0;
474
475 /* loop through the possible pre values to find pre and delay */
476 matchFound = FALSE;
477
478 for (preTemp = 0; preTemp < 8; preTemp++)
479 {
480 delayTemp = (uint8)((scaleTemp / (1 << (2 * preTemp))) + 0.5); /* divide the scale_temp by ( 4 ^ pre_temp) to find delay_temp */
481
482 if (delayTemp <= 8) /* if delay_temp is <= 8; we can get a good value pair */
483 {
484 if ((float32)(delayTemp << (2 * preTemp)) >= scaleTemp) /* greater delays are tolerated. less is not */
485 {
486 delayFinal = __max(delayTemp - 1, 0); /* subtract 1 to set to register */
487 preFinal = preTemp;
488 matchFound = TRUE;
489 break;
490 }
491 else if (delayTemp < (uint8)8) /* delay is less than 8 - add 1 and finalize parameters */
492 {
493 delayTemp += 1;
494 delayFinal = __max(delayTemp - 1, 0); /* subtract 1 to set to register */
495 preFinal = preTemp;
496 matchFound = TRUE;
497 break;
498 }
499 else
500 {
501 /* do nothing - proceed to next pre_temp value */
502 }
503 }
504 }
505
506 if (matchFound == FALSE)
507 {
508 /* max limit reached. set max values for pre and delay and exit */
509 delayFinal = 7;
510 preFinal = 7;
511 }
512
513 /* write back to delay const structure before looping to next factor */
514 delayConst[index].delay = delayFinal;
515 delayConst[index].pre = preFinal;
516 }
517 }
IfxQspi_calculateDelayConstants
void IfxQspi_calculateDelayConstants(const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
Calculates the Delay constants (pre and delay) from the user specified CS delays. ...
Definition: IfxQspi.c:451
SpiIf_ChMode::dataHeading
uint32 dataHeading
SpiIf_DataHeading
Definition: SpiIf.h:193
IfxQspi_calcRealBaudrate
float IfxQspi_calcRealBaudrate(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel.
Definition: IfxQspi.c:54
__neqf
#define __neqf
Definition: IfxCpu_IntrinsicsDcc.h:1665
IfxQspi_read8
void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO.
Definition: IfxQspi.c:337
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxQspi_read16
void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO.
Definition: IfxQspi.c:313
SpiIf_ChConfig_::baudrate
float32 baudrate
Specifies the SPI baudrate.
Definition: SpiIf.h:228
SpiIf_ChConfig_
Definition: SpiIf.h:225
SpiIf_ChMode::dataWidth
uint32 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: SpiIf.h:194
IfxQspi_Index
IfxQspi_Index
List of the available QSPI resources.
Definition: IfxQspi_cfg.h:79
IfxQspi_getIndex
IfxQspi_Index IfxQspi_getIndex(Ifx_QSPI *qspi)
Specifies the function to get Index.
Definition: IfxQspi.c:293
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxQspi_write16
void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO.
Definition: IfxQspi.c:412
Ifx_ParityMode_even
Definition: Ifx_Types.h:121
IfxQspi_resetModule
void IfxQspi_resetModule(Ifx_QSPI *qspi)
resets QSPI kernel
Definition: IfxQspi.c:365
SpiIf_ChMode::parityCheck
uint32 parityCheck
0 = disabled, 1 = enabled
Definition: SpiIf.h:198
float32
float float32
Definition: Platform_Types.h:170
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxQspi_getAddress
Ifx_QSPI * IfxQspi_getAddress(IfxQspi_Index qspi)
Definition: IfxQspi.c:276
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxScuCcu_getMaxFrequency
float32 IfxScuCcu_getMaxFrequency(void)
API to get FMAX divider frequency. This API returns the fMax frequency based on the divider value in ...
Definition: IfxScuCcu.c:363
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxQspi_calculateExtendedConfigurationValue
uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values.
Definition: IfxQspi.c:96
FALSE
#define FALSE
Definition: Platform_Types.h:93
SpiIf_ChMode::csInactiveDelay
SpiIf_SlsoTiming_HalfTsclk csInactiveDelay
CS Inactive Delay in Tsclk/2 units.
Definition: SpiIf.h:201
__leqf
#define __leqf
Definition: IfxCpu_IntrinsicsDcc.h:1669
IFX_VERBOSE_LEVEL_WARNING
#define IFX_VERBOSE_LEVEL_WARNING
Assertion level warning.
Definition: Ifx_Assert.h:59
IfxQspi_calculateBasicConfigurationValue
uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values.
Definition: IfxQspi.c:67
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxQspi_getTimeQuantaFrequency
IFX_INLINE float IfxQspi_getTimeQuantaFrequency(Ifx_QSPI *qspi)
Gets Time Quanta frequency.
Definition: IfxQspi.h:1011
__absf
#define __absf
Definition: IfxCpu_IntrinsicsDcc.h:1629
IfxQspi_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES]
Definition: IfxQspi_cfg.c:54
SpiIf_ChMode::clockPolarity
uint32 clockPolarity
SpiIf_ClockPolarity
Definition: SpiIf.h:191
IfxQspi_ChannelId
IfxQspi_ChannelId
QSPI channel Number (BACON.CS)
Definition: IfxQspi.h:94
__max
sint32 __max(sint32, sint32) __attribute__((intrinsic_pseudo(3
SpiIf_SlsoTiming_HalfTsclk
uint32 SpiIf_SlsoTiming_HalfTsclk
Definition: SpiIf.h:138
IfxQspi_Index_none
Not Selected.
Definition: IfxQspi_cfg.h:81
SpiIf_ChMode::shiftClock
uint32 shiftClock
SpiIf_ShiftClock
Definition: SpiIf.h:192
IfxQspi_write32
void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO.
Definition: IfxQspi.c:425
IfxQspi_setSlaveSelectOutputControl
void IfxQspi_setSlaveSelectOutputControl(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
Configures a Slave Select Output.
Definition: IfxQspi.c:383
SpiIf_ChMode
Definition: SpiIf.h:186
IfxQspi_DelayConst::pre
uint8 pre
specifies the prescalar value
Definition: IfxQspi.h:310
SpiIf_ChMode::parityMode
uint32 parityMode
Ifx_ParityMode
Definition: SpiIf.h:199
SpiIf_ClockPolarity_idleLow
Definition: SpiIf.h:103
IfxQspi_read32
void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO.
Definition: IfxQspi.c:325
SpiIf_DataHeading_lsbFirst
Definition: SpiIf.h:89
IFXQSPI_NUM_MODULES
#define IFXQSPI_NUM_MODULES
Definition: IfxQspi_cfg.h:69
ABCQMAX
#define ABCQMAX
IfxQspi_calculateTimeQuantumLength
uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length.
Definition: IfxQspi.c:233
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxQspi_getModuleFrequency
IFX_INLINE float IfxQspi_getModuleFrequency(Ifx_QSPI *qspi)
Specifies function to get module frequency.
Definition: IfxQspi.h:978
__roundf
#define __roundf
Definition: IfxCpu_IntrinsicsDcc.h:1625
ABCQMIN
#define ABCQMIN
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge
Definition: SpiIf.h:96
IfxQspi_DelayConst
Structure holding the "pre" and "delay" values. To be populated into BACON register after delay calcu...
Definition: IfxQspi.h:308
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxQspi_calculatePrescaler
uint32 IfxQspi_calculatePrescaler(Ifx_QSPI *qspi, float baudrate)
Function to calculate prescaler.
Definition: IfxQspi.c:209
SpiIf_ChConfig_::mode
SpiIf_ChMode mode
Definition: SpiIf.h:229
IfxQspi_DelayConst::delay
uint8 delay
delay multiplier
Definition: IfxQspi.h:311
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxQspi_write8
void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO.
Definition: IfxQspi.c:438
IfxQspi.h
QSPI basic functionality.
IfxQspi_recalcBasicConfiguration
uint32 IfxQspi_recalcBasicConfiguration(uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
Re-calculated BACON from the oldBACON.
Definition: IfxQspi.c:349
TRUE
#define TRUE
Definition: Platform_Types.h:90
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
uint8
unsigned char uint8
Definition: Platform_Types.h:108
sint8
signed char sint8
Definition: Platform_Types.h:125


iLLD_TC26B: IfxQspi.h Source File

  • Qspi
  • Std
IfxQspi.h
Go to the documentation of this file.
1 /**
2 * \file IfxQspi.h
3 * \brief QSPI basic functionality
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Qspi_Std_Enum Enumerations
44 * \ingroup IfxLld_Qspi_Std
45 * \defgroup IfxLld_Qspi_Std_Operative Operative Functions
46 * \ingroup IfxLld_Qspi_Std
47 * \defgroup IfxLld_Qspi_Std_Support Support Functions
48 * \ingroup IfxLld_Qspi_Std
49 * \defgroup IfxLld_Qspi_Std_Interrupt Interrupt Functions
50 * \ingroup IfxLld_Qspi_Std
51 * \defgroup IfxLld_Qspi_Std_IO IO Pin Configuration Functions
52 * \ingroup IfxLld_Qspi_Std
53 */
54
55 #ifndef IFXQSPI_H
56 #define IFXQSPI_H 1
57
58 /******************************************************************************/
59 /*----------------------------------Includes----------------------------------*/
60 /******************************************************************************/
61
62 #include "_Impl/IfxQspi_cfg.h"
63 #include "Cpu/Std/IfxCpu_Intrinsics.h"
64 #include "If/SpiIf.h"
65 #include "Scu/Std/IfxScuCcu.h"
66 #include "Src/Std/IfxSrc.h"
67 #include "_PinMap/IfxQspi_PinMap.h"
68
69 /******************************************************************************/
70 /*-----------------------------------Macros-----------------------------------*/
71 /******************************************************************************/
72
73 /** \brief Get Fifo size required for Long / Long continous mode interms 32-bit
74 * LONG MODE FIFO size (data size in bytes) = (size for Bacon) + (Datasize converted to 32-bit)
75 */
76 #define IFXQSPI_BACONSIZE(Datasize) (((((Datasize) % 16) == 0) ? ((uint8)((Datasize) / 16)) : ((uint8)((Datasize) / 16) + 1)))
77
78 #define IFXQSPI_FIFO32BITSIZE(Datasize) ((((Datasize) % 4) == 0) ? ((uint8)((Datasize) / 4)) : ((uint8)((Datasize) / 4) + 1))
79
80 #define IFXQSPI_GETLONGMODEFIFOSIZE(Datasize) (IFXQSPI_BACONSIZE(Datasize) + IFXQSPI_FIFO32BITSIZE(Datasize))
81
82 /** \brief Errors enable mask for ERRORENS
83 */
84 #define IFXQSPI_ERRORENABLEMASK ((uint32)0x1FF)
85
86 /******************************************************************************/
87 /*--------------------------------Enumerations--------------------------------*/
88 /******************************************************************************/
89
90 /** \addtogroup IfxLld_Qspi_Std_Enum
91 * \{ */
92 /** \brief QSPI channel Number (BACON.CS)
93 */
94 typedef enum
95 {
96 IfxQspi_ChannelId_0, /**< \brief Channel #0 */
97 IfxQspi_ChannelId_1, /**< \brief Channel #1 */
98 IfxQspi_ChannelId_2, /**< \brief Channel #2 */
99 IfxQspi_ChannelId_3, /**< \brief Channel #3 */
100 IfxQspi_ChannelId_4, /**< \brief Channel #4 */
101 IfxQspi_ChannelId_5, /**< \brief Channel #5 */
102 IfxQspi_ChannelId_6, /**< \brief Channel #6 */
103 IfxQspi_ChannelId_7, /**< \brief Channel #7 */
104 IfxQspi_ChannelId_8, /**< \brief Channel #8 */
105 IfxQspi_ChannelId_9, /**< \brief Channel #9 */
106 IfxQspi_ChannelId_10, /**< \brief Channel #10 */
107 IfxQspi_ChannelId_11, /**< \brief Channel #11 */
108 IfxQspi_ChannelId_12, /**< \brief Channel #12 */
109 IfxQspi_ChannelId_13, /**< \brief Channel #13 */
110 IfxQspi_ChannelId_14 /**< \brief Channel #14 */
111 } IfxQspi_ChannelId;
112
113 /** \brief Data length unit of a frame (BACON.BYTE)
114 */
115 typedef enum
116 {
117 IfxQspi_DataLengthUnit_bit = 0, /**< \brief Data Length in Bits */
118 IfxQspi_DataLengthUnit_byte = 1 /**< \brief Data length in Bytes */
119 } IfxQspi_DataLengthUnit;
120
121 /** \brief QSPI Error Flags (STATUS.ERRORFLAGS)
122 */
123 typedef enum
124 {
125 IfxQspi_Error_none = 0, /**< \brief No Error */
126 IfxQspi_Error_parity = 1, /**< \brief Parity Error */
127 IfxQspi_Error_configuration = 2, /**< \brief Configuration Error */
128 IfxQspi_Error_baudrate = 4, /**< \brief BaudRate Error */
129 IfxQspi_Error_txfifoOverflow = 8, /**< \brief TX FIFO Overflow Error */
130 IfxQspi_Error_txfifoUnderflow = 16, /**< \brief TX FIFO Underflow Error */
131 IfxQspi_Error_rxfifoOverflow = 32, /**< \brief RX FIFO Overflow Error */
132 IfxQspi_Error_rxfifoUnderflow = 64, /**< \brief RX FIFO Underflow Error */
133 IfxQspi_Error_expectTimeout = 128, /**< \brief EXPECT Timeout Error */
134 IfxQspi_Error_slsiMisplacedInactivation = 256 /**< \brief SLSI misplaced inactivation (slave mode) */
135 } IfxQspi_Error;
136
137 /** \brief Frame Expect phase time out value
138 */
139 typedef enum
140 {
141 IfxQspi_ExpectTimeout_64 = 0, /**< \brief Expect phse time out 64 */
142 IfxQspi_ExpectTimeout_128 = 1, /**< \brief Expect phse time out 128 */
143 IfxQspi_ExpectTimeout_256 = 2, /**< \brief Expect phse time out 256 */
144 IfxQspi_ExpectTimeout_512 = 3, /**< \brief Expect phse time out 512 */
145 IfxQspi_ExpectTimeout_1024 = 4, /**< \brief Expect phse time out 1024 */
146 IfxQspi_ExpectTimeout_2048 = 5, /**< \brief Expect phse time out 2048 */
147 IfxQspi_ExpectTimeout_4096 = 6, /**< \brief Expect phse time out 4096 */
148 IfxQspi_ExpectTimeout_8192 = 7, /**< \brief Expect phse time out 8192 */
149 IfxQspi_ExpectTimeout_16384 = 8, /**< \brief Expect phse time out 16384 */
150 IfxQspi_ExpectTimeout_32768 = 9, /**< \brief Expect phse time out 32768 */
151 IfxQspi_ExpectTimeout_65536 = 10, /**< \brief Expect phse time out 65536 */
152 IfxQspi_ExpectTimeout_131072 = 11, /**< \brief Expect phse time out 131072 */
153 IfxQspi_ExpectTimeout_262144 = 12, /**< \brief Expect phse time out 262144 */
154 IfxQspi_ExpectTimeout_524288 = 13, /**< \brief Expect phse time out 524288 */
155 IfxQspi_ExpectTimeout_1048576 = 14, /**< \brief Expect phse time out 1048576 */
156 IfxQspi_ExpectTimeout_2097152 = 15 /**< \brief Expect phse time out 2097152 */
157 } IfxQspi_ExpectTimeout;
158
159 /** \brief QSPI controller mode (GLOBALCON.MODE)
160 */
161 typedef enum
162 {
163 IfxQspi_Mode_master = 0, /**< \brief QSPI in "master" mode */
164 IfxQspi_Mode_pwmOverQspi = 1, /**< \brief QSPI in "PWM over QSPI" mode */
165 IfxQspi_Mode_slave = 2 /**< \brief QSPI in "slave" mode */
166 } IfxQspi_Mode;
167
168 /** \brief Request between pause and Run transition
169 */
170 typedef enum
171 {
172 IfxQspi_PauseRunTransition_pause = 0, /**< \brief Request value for pause */
173 IfxQspi_PauseRunTransition_run = 1 /**< \brief Request value for Run */
174 } IfxQspi_PauseRunTransition;
175
176 /** \brief QSPI frame phase (STATUS.PHASE)
177 */
178 typedef enum
179 {
180 IfxQspi_Phase_wait = 0, /**< \brief Frame wait phase */
181 IfxQspi_Phase_idleA = 1, /**< \brief Frame idleA phase */
182 IfxQspi_Phase_idleB = 2, /**< \brief frame idleB phase */
183 IfxQspi_Phase_lead = 3, /**< \brief Frame lead phase */
184 IfxQspi_Phase_data = 4, /**< \brief Frame data phase */
185 IfxQspi_Phase_trail = 5, /**< \brief Frame trail phase */
186 IfxQspi_Phase_expect = 6, /**< \brief Frame expect phase */
187 IfxQspi_Phase_leadStrobe = 7, /**< \brief Frame leadstrobe phase */
188 IfxQspi_Phase_trailStrobe = 8 /**< \brief Frame trailstrobe phase */
189 } IfxQspi_Phase;
190
191 /** \brief Phase Transition Event
192 */
193 typedef enum
194 {
195 IfxQspi_PhaseTransitionEvent_endOfWait = 0, /**< \brief BUSY (end of WAIT phase) */
196 IfxQspi_PhaseTransitionEvent_serialClockPolarityChange = 1, /**< \brief SCLKPC (serial clock polarity change) */
197 IfxQspi_PhaseTransitionEvent_startOfFrame = 2, /**< \brief SOF (Start Of Frame ) */
198 IfxQspi_PhaseTransitionEvent_transmitBufferEmptied = 3, /**< \brief TBE (Transmit Buffer Emptied) */
199 IfxQspi_PhaseTransitionEvent_receiveBufferFilled = 4, /**< \brief RBF (Receive Buffer Filled) */
200 IfxQspi_PhaseTransitionEvent_endOfFrame = 5, /**< \brief EOF (End of Frame) */
201 IfxQspi_PhaseTransitionEvent_dataNotAvailable = 6, /**< \brief DNA (Data not Available = Start of Expect) */
202 IfxQspi_PhaseTransitionEvent_endOfExpect = 7 /**< \brief CONT (End of EXPECT phase) */
203 } IfxQspi_PhaseTransitionEvent;
204
205 /** \brief Reset Request (GLOBALCON.RESETS)
206 */
207 typedef enum
208 {
209 IfxQspi_Reset_none = 0, /**< \brief No Reset */
210 IfxQspi_Reset_stateMachineAndFifo = 7, /**< \brief State Machine, TXFIFO and RXFIFO reset, registers not reseted */
211 IfxQspi_Reset_kernel = 15 /**< \brief Kernel / Module Reset */
212 } IfxQspi_Reset;
213
214 /** \brief Receive Fifo Interrupt Threshold
215 */
216 typedef enum
217 {
218 IfxQspi_RxFifoInt_0, /**< \brief RxFifo Interrupt Threshold #0 */
219 IfxQspi_RxFifoInt_1, /**< \brief RxFifo Interrupt Threshold #1 */
220 IfxQspi_RxFifoInt_2, /**< \brief RxFifo Interrupt Threshold #2 */
221 IfxQspi_RxFifoInt_3 /**< \brief RxFifo Interrupt Threshold #3 */
222 } IfxQspi_RxFifoInt;
223
224 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
225 * Definition in Ifx_QSPI.CLC.B.EDIS
226 */
227 typedef enum
228 {
229 IfxQspi_SleepMode_enable = 0, /**< \brief Sleep Mode enabled */
230 IfxQspi_SleepMode_disable = 1 /**< \brief Sleep Mode disabled */
231 } IfxQspi_SleepMode;
232
233 /** \brief STROBE delay for SLSO in delayed mode (GLOBALCON.STROBE)
234 */
235 typedef enum
236 {
237 IfxQspi_StrobeDelay_1, /**< \brief SLSO delay 1 cycle(s) */
238 IfxQspi_StrobeDelay_2, /**< \brief SLSO delay 2 cycle(s) */
239 IfxQspi_StrobeDelay_3, /**< \brief SLSO delay 3 cycle(s) */
240 IfxQspi_StrobeDelay_4, /**< \brief SLSO delay 4 cycle(s) */
241 IfxQspi_StrobeDelay_5, /**< \brief SLSO delay 5 cycle(s) */
242 IfxQspi_StrobeDelay_6, /**< \brief SLSO delay 6 cycle(s) */
243 IfxQspi_StrobeDelay_7, /**< \brief SLSO delay 7 cycle(s) */
244 IfxQspi_StrobeDelay_8, /**< \brief SLSO delay 8 cycle(s) */
245 IfxQspi_StrobeDelay_9, /**< \brief SLSO delay 9 cycle(s) */
246 IfxQspi_StrobeDelay_10, /**< \brief SLSO delay 10 cycle(s) */
247 IfxQspi_StrobeDelay_11, /**< \brief SLSO delay 11 cycle(s) */
248 IfxQspi_StrobeDelay_12, /**< \brief SLSO delay 12 cycle(s) */
249 IfxQspi_StrobeDelay_13, /**< \brief SLSO delay 13 cycle(s) */
250 IfxQspi_StrobeDelay_14, /**< \brief SLSO delay 14 cycle(s) */
251 IfxQspi_StrobeDelay_15, /**< \brief SLSO delay 15 cycle(s) */
252 IfxQspi_StrobeDelay_16, /**< \brief SLSO delay 16 cycle(s) */
253 IfxQspi_StrobeDelay_17, /**< \brief SLSO delay 17 cycle(s) */
254 IfxQspi_StrobeDelay_18, /**< \brief SLSO delay 18 cycle(s) */
255 IfxQspi_StrobeDelay_19, /**< \brief SLSO delay 19 cycle(s) */
256 IfxQspi_StrobeDelay_20, /**< \brief SLSO delay 20 cycle(s) */
257 IfxQspi_StrobeDelay_21, /**< \brief SLSO delay 21 cycle(s) */
258 IfxQspi_StrobeDelay_22, /**< \brief SLSO delay 22 cycle(s) */
259 IfxQspi_StrobeDelay_23, /**< \brief SLSO delay 23 cycle(s) */
260 IfxQspi_StrobeDelay_24, /**< \brief SLSO delay 24 cycle(s) */
261 IfxQspi_StrobeDelay_25, /**< \brief SLSO delay 25 cycle(s) */
262 IfxQspi_StrobeDelay_26, /**< \brief SLSO delay 26 cycle(s) */
263 IfxQspi_StrobeDelay_27, /**< \brief SLSO delay 27 cycle(s) */
264 IfxQspi_StrobeDelay_28, /**< \brief SLSO delay 28 cycle(s) */
265 IfxQspi_StrobeDelay_29, /**< \brief SLSO delay 29 cycle(s) */
266 IfxQspi_StrobeDelay_30, /**< \brief SLSO delay 30 cycle(s) */
267 IfxQspi_StrobeDelay_31, /**< \brief SLSO delay 31 cycle(s) */
268 IfxQspi_StrobeDelay_32 /**< \brief SLSO delay 32 cycle(s) */
269 } IfxQspi_StrobeDelay;
270
271 /** \brief Transmit Fifo Interrupt Threshold
272 */
273 typedef enum
274 {
275 IfxQspi_TxFifoInt_1, /**< \brief TxFifo Interrupt Threshold #1 */
276 IfxQspi_TxFifoInt_2, /**< \brief TxFifo Interrupt Threshold #2 */
277 IfxQspi_TxFifoInt_3, /**< \brief TxFifo Interrupt Threshold #3 */
278 IfxQspi_TxFifoInt_4 /**< \brief TxFifo Interrupt Threshold #4 */
279 } IfxQspi_TxFifoInt;
280
281 /** \} */
282
283 /** \brief Transmit FIFO mode.
284 */
285 typedef enum
286 {
287 IfxQspi_FifoMode_combinedMove = 0, /**< \brief Combined Move Mode */
288 IfxQspi_FifoMode_singleMove = 1, /**< \brief Single Move Mode */
289 IfxQspi_FifoMode_batchMove = 2 /**< \brief Batch Move Mode */
290 } IfxQspi_FifoMode;
291
292 /** \brief OCDS Suspend Control (OCDS.SUS)
293 */
294 typedef enum
295 {
296 IfxQspi_SuspendMode_none = 0, /**< \brief No suspend */
297 IfxQspi_SuspendMode_hard = 1, /**< \brief Hard Suspend */
298 IfxQspi_SuspendMode_soft = 2 /**< \brief Soft Suspend */
299 } IfxQspi_SuspendMode;
300
301 /******************************************************************************/
302 /*-----------------------------Data Structures--------------------------------*/
303 /******************************************************************************/
304
305 /** \brief Structure holding the "pre" and "delay" values.
306 * To be populated into BACON register after delay calculation.
307 */
308 typedef struct
309 {
310 uint8 pre; /**< \brief specifies the prescalar value */
311 uint8 delay; /**< \brief delay multiplier */
312 } IfxQspi_DelayConst;
313
314 /** \addtogroup IfxLld_Qspi_Std_Operative
315 * \{ */
316
317 /******************************************************************************/
318 /*-------------------------Inline Function Prototypes-------------------------*/
319 /******************************************************************************/
320
321 /** \brief Clear ALL service requests
322 * \param qspi Pointer to QSPI module registers
323 * \return None
324 */
325 IFX_INLINE void IfxQspi_clearAllEventFlags(Ifx_QSPI *qspi);
326
327 /** \brief Clear RX service requests
328 * \param qspi Pointer to QSPI module registers
329 * \return None
330 */
331 IFX_INLINE void IfxQspi_clearRxReq(Ifx_QSPI *qspi);
332
333 /** \brief Clear TX service requests
334 * \param qspi Pointer to QSPI module registers
335 * \return None
336 */
337 IFX_INLINE void IfxQspi_clearTxReq(Ifx_QSPI *qspi);
338
339 /** \brief Configure PT1 event (also USR event depending if USREN=1 )
340 * \param qspi Pointer to QSPI module registers
341 * \param pt1Config Phase Transition1 Event Config
342 * \return None
343 */
344 IFX_INLINE void IfxQspi_configPT1Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt1Config);
345
346 /** \brief Configure PT2 event
347 * \param qspi Pointer to QSPI module registers
348 * \param pt2Config Phase Transition2 Event Config
349 * \return None
350 */
351 IFX_INLINE void IfxQspi_configPT2Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt2Config);
352
353 /** \brief Enable/Disable Loopback mode.
354 * \param qspi Pointer to QSPI module registers
355 * \param enable Enable / Disable loopback
356 * \return None
357 */
358 IFX_INLINE void IfxQspi_enableLoopbackMode(Ifx_QSPI *qspi, boolean enable);
359
360 /** \brief enable Phase Transition1 Event
361 * \param qspi Pointer to QSPI module registers
362 * \param enable Enable (1) / Disable (0)
363 * \return None
364 */
365 IFX_INLINE void IfxQspi_enablePT1Event(Ifx_QSPI *qspi, boolean enable);
366
367 /** \brief enable Phase Transition2 Event
368 * \param qspi Pointer to QSPI module registers
369 * \param enable Enable (1) / Disable (0)
370 * \return None
371 */
372 IFX_INLINE void IfxQspi_enablePT2Event(Ifx_QSPI *qspi, boolean enable);
373
374 /** \brief enable User Event (Event selected by PT1)
375 * \param qspi Pointer to QSPI module registers
376 * \param enable Enable (1) / Disable (0)
377 * \return None
378 */
379 IFX_INLINE void IfxQspi_enableUsrEvent(Ifx_QSPI *qspi, boolean enable);
380
381 /**
382 * \param qspi Pointer to QSPI module registers
383 * \return Error Flags
384 */
385 IFX_INLINE uint16 IfxQspi_getErrorFlags(Ifx_QSPI *qspi);
386
387 /** \brief Request for Module in Pause state
388 * no interrupts
389 * no communication
390 * \param qspi Pointer to QSPI module registers
391 * \return None
392 */
393 IFX_INLINE void IfxQspi_pause(Ifx_QSPI *qspi);
394
395 /** \brief Read the oldest data from RXFIFO
396 * \param qspi Pointer to QSPI module registers
397 */
398 IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi);
399
400 /** \brief Request reset (State Machine & FIFO / Register / Module)
401 * \param qspi Pointer to QSPI module registers
402 * \param reset reset type (GLOBALCON.RESETS)
403 * \return None
404 */
405 IFX_INLINE void IfxQspi_requestReset(Ifx_QSPI *qspi, IfxQspi_Reset reset);
406
407 /** \brief Request for QSPI in Run state
408 * \param qspi Pointer to QSPI module registers
409 * \return None
410 */
411 IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi);
412
413 /** \brief Set the threshold of RXFIFO for service request generation
414 * \param qspi Pointer to QSPI module registers
415 * \param rxFifoInt RxFIFO Interrupt threshold to set
416 * \return None
417 */
418 IFX_INLINE void IfxQspi_setReceiveFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_RxFifoInt rxFifoInt);
419
420 /** \brief Write Data into DATAENTRY register
421 * \param qspi Pointer to QSPI module registers
422 * \param data Data to be entered into TxFIFO
423 * \return None
424 */
425 IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data);
426
427 /** \brief Returns the module's suspend state.
428 * TRUE :if module is suspended.
429 * FALSE:if module is not yet suspended.
430 * \param qspi Pointer to QSPI module registers
431 * \return Suspend status (TRUE / FALSE)
432 */
433 IFX_INLINE boolean IfxQspi_isModuleSuspended(Ifx_QSPI *qspi);
434
435 /** \brief Configure the Module to Hard/Soft suspend mode.
436 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
437 * \param qspi Pointer to QSPI module registers
438 * \param mode Module suspend mode
439 * \return None
440 */
441 IFX_INLINE void IfxQspi_setSuspendMode(Ifx_QSPI *qspi, IfxQspi_SuspendMode mode);
442
443 /******************************************************************************/
444 /*-------------------------Global Function Prototypes-------------------------*/
445 /******************************************************************************/
446
447 /** \brief Reads 16bit data from the Rx FIFO
448 * \param qspi Pointer to QSPI module registers
449 * \param data Received data will be copied into this array
450 * \param count Number of items to be received
451 * \return None
452 */
453 IFX_EXTERN void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count);
454
455 /** \brief Reads 32bit data from the Rx FIFO
456 * \param qspi Pointer to QSPI module registers
457 * \param data Received data will be copied into this array
458 * \param count Number of items to be received
459 * \return None
460 */
461 IFX_EXTERN void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count);
462
463 /** \brief Reads 8bit data from the Rx FIFO
464 * \param qspi Pointer to QSPI module registers
465 * \param data Received data will be copied into this array
466 * \param count Number of items to be received
467 * \return None
468 */
469 IFX_EXTERN void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count);
470
471 /** \brief resets QSPI kernel
472 * \param qspi pointer to QSPI registers
473 * \return None
474 */
475 IFX_EXTERN void IfxQspi_resetModule(Ifx_QSPI *qspi);
476
477 /** \brief Writes 16bit data into the Tx FIFO
478 * \param qspi Pointer to QSPI module registers
479 * \param channelId Channel number to which econ val belongs
480 * \param data Array of data to be sent
481 * \param count Number of items to be sent
482 * \return None
483 */
484 IFX_EXTERN void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count);
485
486 /** \brief Writes 32bit data into the Tx FIFO
487 * \param qspi Pointer to QSPI module registers
488 * \param channelId Channel number to which econ val belongs
489 * \param data Array of data to be sent
490 * \param count Number of items to be sent
491 * \return None
492 */
493 IFX_EXTERN void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count);
494
495 /** \brief Writes 8bit data into the Tx FIFO
496 * \param qspi Pointer to QSPI module registers
497 * \param channelId Channel number to which econ val belongs
498 * \param data Array of data to be sent
499 * \param count Number of items to be sent
500 * \return None
501 */
502 IFX_EXTERN void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count);
503
504 /** \} */
505
506 /** \addtogroup IfxLld_Qspi_Std_Support
507 * \{ */
508
509 /******************************************************************************/
510 /*-------------------------Inline Function Prototypes-------------------------*/
511 /******************************************************************************/
512
513 /** \brief Gets the current mode of QSPI
514 * \param qspi Pointer to QSPI module registers
515 * \return The current mode
516 */
517 IFX_INLINE IfxQspi_Mode IfxQspi_getMode(Ifx_QSPI *qspi);
518
519 /** \brief Specifies function to get module frequency
520 * \param qspi Pointer to QSPI module registers
521 * \return Module frequency in Float value
522 */
523 IFX_INLINE float IfxQspi_getModuleFrequency(Ifx_QSPI *qspi);
524
525 /** \brief Gets actual transmission phase
526 * \param qspi Pointer to QSPI module registers
527 * \return Actual transmission phase
528 */
529 IFX_INLINE IfxQspi_Phase IfxQspi_getPhase(Ifx_QSPI *qspi);
530
531 /** \brief Gets the filling level of RXFIFO
532 * \param qspi Pointer to QSPI module registers
533 * \return RxFIFO level
534 */
535 IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel(Ifx_QSPI *qspi);
536
537 /** \brief Gets Time Quanta frequency
538 * \param qspi Pointer to QSPI module registers
539 * \return TQ frequency in float
540 */
541 IFX_INLINE float IfxQspi_getTimeQuantaFrequency(Ifx_QSPI *qspi);
542
543 /** \brief Gets the filling level of TXFIFO
544 * \param qspi Pointer to QSPI module registers
545 * \return TxFIFO level
546 */
547 IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel(Ifx_QSPI *qspi);
548
549 /** \brief Specifies the Module enable or disable status
550 * \param qspi Pointer to QSPI module registers
551 * \return TRUE if module is enabled otherwise FALSE
552 */
553 IFX_INLINE boolean IfxQspi_isModuleEnabled(Ifx_QSPI *qspi);
554
555 /** \brief Sets the disable module request
556 * \param qspi Pointer to QSPI module registers
557 * \return None
558 */
559 IFX_INLINE void IfxQspi_setDisableModuleRequest(Ifx_QSPI *qspi);
560
561 /** \brief Sets the enable module request
562 * \param qspi Pointer to QSPI module registers
563 * \return None
564 */
565 IFX_INLINE void IfxQspi_setEnableModuleRequest(Ifx_QSPI *qspi);
566
567 /** \brief Sets the disable module request
568 * \param qspi Pointer to QSPI module registers
569 * \param mode Sleep mode selection
570 * \return None
571 */
572 IFX_INLINE void IfxQspi_setSleepMode(Ifx_QSPI *qspi, IfxQspi_SleepMode mode);
573
574 /** \brief Set the threshold of TXFIFO for service request generation
575 * \param qspi Pointer to QSPI module registers
576 * \param txFifoInt TxFifo Interrupt threshold to set
577 * \return None
578 */
579 IFX_INLINE void IfxQspi_setTransmitFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_TxFifoInt txFifoInt);
580
581 /** \brief Write configuration into BACON register
582 * \param qspi Pointer to QSPI module registers
583 * \param baconVal baconVal Value to be entered in BACON register
584 * \return None
585 */
586 IFX_INLINE void IfxQspi_writeBasicConfiguration(Ifx_QSPI *qspi, uint32 baconVal);
587
588 /** \brief Write configuration into BACON register with .LAST flag set to 0
589 * \param qspi Pointer to QSPI module registers
590 * \param baconVal baconVal Value to be entered in BACON register
591 * \return None
592 */
593 IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream(Ifx_QSPI *qspi, uint32 baconVal);
594
595 /** \brief Write configuration into BACON register with .LAST flag set to 1
596 * \param qspi Pointer to QSPI module registers
597 * \param baconVal baconVal Value to be entered in BACON register
598 * \return None
599 */
600 IFX_INLINE void IfxQspi_writeBasicConfigurationEndStream(Ifx_QSPI *qspi, uint32 baconVal);
601
602 /** \brief Writes channel timing configuration into ECON register
603 * \param qspi Pointer to QSPI module registers
604 * \param channelId Channel number to which econ val belongs
605 * \param econVal Extended configuration value
606 * \return None
607 */
608 IFX_INLINE void IfxQspi_writeExtendedConfiguration(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal);
609
610 /** \brief Writes Data and Configuration into MIXEDENTRY register
611 * \param qspi Pointer to QSPI module registers
612 * \param mixEntryVal Data and configuration in mixed
613 * \return None
614 */
615 IFX_INLINE void IfxQspi_writeMixedDataTransmitFifo(Ifx_QSPI *qspi, uint32 mixEntryVal);
616
617 /******************************************************************************/
618 /*-------------------------Global Function Prototypes-------------------------*/
619 /******************************************************************************/
620
621 /** \brief Function to calculate baudrate of specified channel
622 * \param qspi Pointer to QSPI module registers
623 * \param channelId QSPI channel number
624 * \return Actual baudrate in float
625 */
626 IFX_EXTERN float IfxQspi_calcRealBaudrate(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId);
627
628 /** \brief Function to calculate BACON register values
629 * \param qspi Pointer to QSPI module registers
630 * \param channelId QSPI Channel Number
631 * \param chMode Frame configuration
632 * \param baudrate The desired baudrate
633 * \return Calculated BACON value
634 */
635 IFX_EXTERN uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate);
636
637 /** \brief Function to calculate ECON register values
638 * \param qspi Pointer to QSPI module registers
639 * \param cs QSPI channel Number : 8->0,9->1,.......
640 * \param chConfig SPI Channel Configuration
641 * \return Calculated ECON[CS] value
642 */
643 IFX_EXTERN uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig);
644
645 /** \brief Function to calculate prescaler
646 * \param qspi Pointer to QSPI module registers
647 * \param baudrate Maximum baudrate in Float
648 * \return Prescaler in integer
649 */
650 IFX_EXTERN uint32 IfxQspi_calculatePrescaler(Ifx_QSPI *qspi, float baudrate);
651
652 /** \brief Specifies the function to calculate Time quantum length
653 * \param qspi Pointer to QSPI module registers
654 * \param maxBaudrate Maximum baudrate in Float
655 * \return Time quantum length in integer
656 */
657 IFX_EXTERN uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate);
658
659 /** \brief
660 * \param qspi Pointer to QSPI module registers
661 * \return QSPI module register address
662 */
663 IFX_EXTERN Ifx_QSPI *IfxQspi_getAddress(IfxQspi_Index qspi);
664
665 /** \brief Specifies the function to get Index
666 * \param qspi Pointer to QSPI module registers
667 * \return Index in Integer
668 */
669 IFX_EXTERN IfxQspi_Index IfxQspi_getIndex(Ifx_QSPI *qspi);
670
671 /** \brief Re-calculated BACON from the oldBACON
672 * \param oldBACON Old BACON value
673 * \param numOfData numOfData in LONG or CONTINUOUS mode
674 * \param shortData Specifies SHORT mode (TRUE) or other modes (FALSE)
675 * \param lastData Specifies last data in LONG or CONTINUOUS
676 * \return Re-calculated BACON
677 */
678 IFX_EXTERN uint32 IfxQspi_recalcBasicConfiguration(uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData);
679
680 /** \brief Configures a Slave Select Output
681 * \param qspi Pointer to QSPI module registers
682 * \param channelId Channel number to which econ val belongs
683 * \param outputEnable chip select output will be enabled during transaction
684 * \param activeLevel TRUE: active-high, FALSE: active-low
685 * \return None
686 */
687 IFX_EXTERN void IfxQspi_setSlaveSelectOutputControl(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel);
688
689 /** \brief Calculates the Delay constants (pre and delay) from the user specified CS delays.
690 * \param qspi pointer to QSPI SFR
691 * \param channelId Channel ID no.
692 * \param chMode Pointer to Channel Mode
693 * \param delayConst Pointer to the Delay Consant Array
694 * \return None
695 */
696 IFX_EXTERN void IfxQspi_calculateDelayConstants(const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst);
697
698 /** \} */
699
700 /** \addtogroup IfxLld_Qspi_Std_Interrupt
701 * \{ */
702
703 /******************************************************************************/
704 /*-------------------------Inline Function Prototypes-------------------------*/
705 /******************************************************************************/
706
707 /** \brief Gets the Error request value
708 * \param qspi Pointer to QSPI module registers
709 * \return Error request value
710 */
711 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getErrorSrc(Ifx_QSPI *qspi);
712
713 /** \brief Gets the RXFIFO service request
714 * \param qspi Pointer to QSPI module registers
715 * \return Receive service request value
716 */
717 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getReceiveSrc(Ifx_QSPI *qspi);
718
719 /** \brief Gets the TXFIFO service request
720 * \param qspi Pointer to QSPI module registers
721 * \return Transmission service request value
722 */
723 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getTransmitSrc(Ifx_QSPI *qspi);
724
725 /** \} */
726
727 /** \addtogroup IfxLld_Qspi_Std_IO
728 * \{ */
729
730 /******************************************************************************/
731 /*-------------------------Inline Function Prototypes-------------------------*/
732 /******************************************************************************/
733
734 /** \brief Initializes a MRST input
735 * \param mrstIn the MRST Pin which should be configured
736 * \param mrstInMode the pin input mode which should be configured
737 * \return None
738 */
739 IFX_INLINE void IfxQspi_initMrstInPin(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode);
740
741 /** \brief Initializes a MRST output
742 * \param mrstOut the MRST Pin which should be configured
743 * \param mrstOutMode the pin output mode which should be configured
744 * \param padDriver the pad driver mode which should be configured
745 * \return None
746 */
747 IFX_INLINE void IfxQspi_initMrstOutPin(const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver);
748
749 /** \brief Initializes a MTSR input
750 * \param mtsrIn the MTSR Pin which should be configured
751 * \param mtsrInMode the pin input mode which should be configured
752 * \return None
753 */
754 IFX_INLINE void IfxQspi_initMtsrInPin(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode);
755
756 /** \brief Initializes a MTSR output
757 * \param mtsrOut the MTSR Pin which should be configured
758 * \param mtsrOutMode the pin output mode which should be configured
759 * \param padDriver the pad driver mode which should be configured
760 * \return None
761 */
762 IFX_INLINE void IfxQspi_initMtsrOutPin(const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver);
763
764 /** \brief Initializes a SCLK input
765 * \param sclkIn the SCLK Pin which should be configured
766 * \param sclkInMode the pin input mode which should be configured
767 * \return None
768 */
769 IFX_INLINE void IfxQspi_initSclkInPin(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode);
770
771 /** \brief Initializes a SCLK output
772 * \param sclkOut the SCLK Pin which should be configured
773 * \param sclkOutMode the pin output mode which should be configured
774 * \param padDriver the pad driver mode which should be configured
775 * \return None
776 */
777 IFX_INLINE void IfxQspi_initSclkOutPin(const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver);
778
779 /** \brief Initializes a SLSI input
780 * \param slsi the SLSI Pin which should be configured
781 * \param slsiMode the pin input mode which should be configured
782 * \return None
783 */
784 IFX_INLINE void IfxQspi_initSlsi(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode);
785
786 /** \brief Initializes a SLSO output
787 * \param slso the SLSO Pin which should be configured
788 * \param slsoMode the pin output mode which should be configured
789 * \param padDriver the pad driver mode which should be configured
790 * \param outIndex Pin Pad driver index
791 * \return None
792 */
793 IFX_INLINE void IfxQspi_initSlso(const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex);
794
795 /** \} */
796
797 /******************************************************************************/
798 /*-------------------------Inline Function Prototypes-------------------------*/
799 /******************************************************************************/
800
801 /** \brief Get the Receive FIFO mode
802 * \param qspi Pointer to QSPI module registers
803 * \return Receive FIFO mode
804 */
805 IFX_INLINE IfxQspi_FifoMode IfxQspi_getRxFifoMode(Ifx_QSPI *qspi);
806
807 /** \brief Get the Transfer FIFO mode
808 * \param qspi Pointer to QSPI module registers
809 * \return Transfer FIFO mode
810 */
811 IFX_INLINE IfxQspi_FifoMode IfxQspi_getTxFifoMode(Ifx_QSPI *qspi);
812
813 /** \brief Permutate bytes to / from Big Endian
814 * \param qspi Pointer to QSPI module registers
815 * \param channelId Channel number to which econ val belongs
816 * \param bigEndian specifies to Permutate bytes to / from Big Endian
817 * \return None
818 */
819 IFX_INLINE void IfxQspi_permutateBigEndian(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bigEndian);
820
821 /** \brief Set the value of bit segment1 (A).
822 * \param qspi Pointer to QSPI module registers
823 * \param channelId Channel number to which econ val belongs
824 * \param bitSegment1 Length expressed in time quantums of ECONz.Q.
825 * \return None
826 */
827 IFX_INLINE void IfxQspi_setBitsegment1(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment1);
828
829 /** \brief Set the value of bit segment2 (B).
830 * \param qspi Pointer to QSPI module registers
831 * \param channelId Channel number to which econ val belongs
832 * \param bitSegment2 Length expressed in time quantums of ECONz.Q.
833 * \return None
834 */
835 IFX_INLINE void IfxQspi_setBitsegment2(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment2);
836
837 /** \brief Set the value of bit segment3 (C).
838 * \param qspi Pointer to QSPI module registers
839 * \param channelId Channel number to which econ val belongs
840 * \param bitSegment3 Length expressed in time quantums of ECONz.Q.
841 * \return None
842 */
843 IFX_INLINE void IfxQspi_setBitsegment3(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment3);
844
845 /**
846 * \param qspi Pointer to QSPI module registers
847 * \param mode select the transfer fifo mode
848 * \return None
849 */
850 IFX_INLINE void IfxQspi_setRxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode);
851
852 /** \brief Set the value of Time Quantum.
853 * \param qspi Pointer to QSPI module registers
854 * \param channelId Channel number to which econ val belongs
855 * \param timeQuantum specifies the value of Time Quantum.
856 * \return None
857 */
858 IFX_INLINE void IfxQspi_setTimeQuantum(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 timeQuantum);
859
860 /** \brief Set the transfer FIFO mode
861 * \param qspi Pointer to QSPI module registers
862 * \param mode select the transfer fifo mode
863 * \return None
864 */
865 IFX_INLINE void IfxQspi_setTxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode);
866
867 /** \brief Provides functionality for both setting of MRSTIN pin direction as input and configuring pad driver
868 * \param mrstIn the MRST Pin which should be configured
869 * \param mrstInMode the pin input mode which should be configured
870 * \param padDriver Pad Driver
871 * \return None
872 */
873 IFX_INLINE void IfxQspi_initMrstInPinWithPadLevel(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode, IfxPort_PadDriver padDriver);
874
875 /** \brief Provides functionality for both setting of MTSRIN pin direction as input and configuring pad driver
876 * \param mtsrIn the MTSR Pin which should be configured
877 * \param mtsrInMode the pin input mode which should be configured
878 * \param padDriver Pad Driver
879 * \return None
880 */
881 IFX_INLINE void IfxQspi_initMtsrInPinWithPadLevel(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode, IfxPort_PadDriver padDriver);
882
883 /** \brief Provides functionality for both setting of SCLKIN pin direction as input and configuring pad driver
884 * \param sclkIn the SCLK Pin which should be configured
885 * \param sclkInMode the pin input mode which should be configured
886 * \param padDriver Pad Driver
887 * \return None
888 */
889 IFX_INLINE void IfxQspi_initSclkInPinWithPadLevel(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode, IfxPort_PadDriver padDriver);
890
891 /** \brief Provides functionality for both setting of SLSI pin direction as input and configuring pad driver
892 * \param slsi the SLSI Pin which should be configured
893 * \param slsiMode the pin input mode which should be configured
894 * \param padDriver Pad Driver
895 * \return None
896 */
897 IFX_INLINE void IfxQspi_initSlsiWithPadLevel(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode, IfxPort_PadDriver padDriver);
898
899 /******************************************************************************/
900 /*---------------------Inline Function Implementations------------------------*/
901 /******************************************************************************/
902
903 IFX_INLINE void IfxQspi_clearAllEventFlags(Ifx_QSPI *qspi)
904 {
905 qspi->FLAGSCLEAR.U = 0xFFFFU;
906 }
907
908
909 IFX_INLINE void IfxQspi_clearRxReq(Ifx_QSPI *qspi)
910 {
911 qspi->FLAGSCLEAR.B.RXC = 1U;
912 }
913
914
915 IFX_INLINE void IfxQspi_clearTxReq(Ifx_QSPI *qspi)
916 {
917 qspi->FLAGSCLEAR.B.TXC = 1U;
918 }
919
920
921 IFX_INLINE void IfxQspi_configPT1Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt1Config)
922 {
923 qspi->GLOBALCON1.B.PT1 = pt1Config;
924 }
925
926
927 IFX_INLINE void IfxQspi_configPT2Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt2Config)
928 {
929 qspi->GLOBALCON1.B.PT2 = pt2Config;
930 }
931
932
933 IFX_INLINE void IfxQspi_enableLoopbackMode(Ifx_QSPI *qspi, boolean enable)
934 {
935 IFX_UNUSED_PARAMETER(enable);
936
937 qspi->GLOBALCON.B.LB = 1;
938 }
939
940
941 IFX_INLINE void IfxQspi_enablePT1Event(Ifx_QSPI *qspi, boolean enable)
942 {
943 qspi->GLOBALCON1.B.PT1EN = enable;
944 }
945
946
947 IFX_INLINE void IfxQspi_enablePT2Event(Ifx_QSPI *qspi, boolean enable)
948 {
949 qspi->GLOBALCON1.B.PT2EN = enable;
950 }
951
952
953 IFX_INLINE void IfxQspi_enableUsrEvent(Ifx_QSPI *qspi, boolean enable)
954 {
955 qspi->GLOBALCON1.B.USREN = enable;
956 }
957
958
959 IFX_INLINE uint16 IfxQspi_getErrorFlags(Ifx_QSPI *qspi)
960 {
961 return qspi->STATUS.B.ERRORFLAGS;
962 }
963
964
965 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getErrorSrc(Ifx_QSPI *qspi)
966 {
967 uint32 index = IfxQspi_getIndex(qspi);
968 return &MODULE_SRC.QSPI.QSPI[index].ERR;
969 }
970
971
972 IFX_INLINE IfxQspi_Mode IfxQspi_getMode(Ifx_QSPI *qspi)
973 {
974 return (IfxQspi_Mode)qspi->GLOBALCON.B.MS;
975 }
976
977
978 IFX_INLINE float IfxQspi_getModuleFrequency(Ifx_QSPI *qspi)
979 {
980 IFX_UNUSED_PARAMETER(qspi->CLC.U != 0);
981
982 return IfxScuCcu_getMaxFrequency();
983 }
984
985
986 IFX_INLINE IfxQspi_Phase IfxQspi_getPhase(Ifx_QSPI *qspi)
987 {
988 return (IfxQspi_Phase)qspi->STATUS.B.PHASE;
989 }
990
991
992 IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel(Ifx_QSPI *qspi)
993 {
994 return qspi->STATUS.B.RXFIFOLEVEL;
995 }
996
997
998 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getReceiveSrc(Ifx_QSPI *qspi)
999 {
1000 uint32 index = IfxQspi_getIndex(qspi);
1001 return &MODULE_SRC.QSPI.QSPI[index].RX;
1002 }
1003
1004
1005 IFX_INLINE IfxQspi_FifoMode IfxQspi_getRxFifoMode(Ifx_QSPI *qspi)
1006 {
1007 return (IfxQspi_FifoMode)qspi->GLOBALCON1.B.RXFM;
1008 }
1009
1010
1011 IFX_INLINE float IfxQspi_getTimeQuantaFrequency(Ifx_QSPI *qspi)
1012 {
1013 return IfxQspi_getModuleFrequency(qspi) / (qspi->GLOBALCON.B.TQ + 1);
1014 }
1015
1016
1017 IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel(Ifx_QSPI *qspi)
1018 {
1019 return qspi->STATUS.B.TXFIFOLEVEL;
1020 }
1021
1022
1023 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getTransmitSrc(Ifx_QSPI *qspi)
1024 {
1025 uint32 index = IfxQspi_getIndex(qspi);
1026 return &MODULE_SRC.QSPI.QSPI[index].TX;
1027 }
1028
1029
1030 IFX_INLINE IfxQspi_FifoMode IfxQspi_getTxFifoMode(Ifx_QSPI *qspi)
1031 {
1032 return (IfxQspi_FifoMode)qspi->GLOBALCON1.B.TXFM;
1033 }
1034
1035
1036 IFX_INLINE void IfxQspi_initMrstInPin(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode)
1037 {
1038 IfxPort_setPinModeInput(mrstIn->pin.port, mrstIn->pin.pinIndex, mrstInMode);
1039 mrstIn->module->PISEL.B.MRIS = mrstIn->select;
1040 }
1041
1042
1043 IFX_INLINE void IfxQspi_initMrstOutPin(const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver)
1044 {
1045 IfxPort_setPinModeOutput(mrstOut->pin.port, mrstOut->pin.pinIndex, mrstOutMode, mrstOut->select);
1046 IfxPort_setPinPadDriver(mrstOut->pin.port, mrstOut->pin.pinIndex, padDriver);
1047 }
1048
1049
1050 IFX_INLINE void IfxQspi_initMtsrInPin(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode)
1051 {
1052 IfxPort_setPinModeInput(mtsrIn->pin.port, mtsrIn->pin.pinIndex, mtsrInMode);
1053 mtsrIn->module->PISEL.B.SRIS = mtsrIn->select;
1054 }
1055
1056
1057 IFX_INLINE void IfxQspi_initMtsrOutPin(const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver)
1058 {
1059 IfxPort_setPinModeOutput(mtsrOut->pin.port, mtsrOut->pin.pinIndex, mtsrOutMode, mtsrOut->select);
1060 IfxPort_setPinPadDriver(mtsrOut->pin.port, mtsrOut->pin.pinIndex, padDriver);
1061 }
1062
1063
1064 IFX_INLINE void IfxQspi_initSclkInPin(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode)
1065 {
1066 IfxPort_setPinModeInput(sclkIn->pin.port, sclkIn->pin.pinIndex, sclkInMode);
1067 sclkIn->module->PISEL.B.SCIS = sclkIn->select;
1068 }
1069
1070
1071 IFX_INLINE void IfxQspi_initSclkOutPin(const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver)
1072 {
1073 IfxPort_setPinModeOutput(sclkOut->pin.port, sclkOut->pin.pinIndex, sclkOutMode, sclkOut->select);
1074 IfxPort_setPinPadDriver(sclkOut->pin.port, sclkOut->pin.pinIndex, padDriver);
1075 }
1076
1077
1078 IFX_INLINE void IfxQspi_initSlsi(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode)
1079 {
1080 IfxPort_setPinModeInput(slsi->pin.port, slsi->pin.pinIndex, slsiMode);
1081 /* PISEL */
1082 slsi->module->PISEL.B.SLSIS = slsi->select + 1;
1083 }
1084
1085
1086 IFX_INLINE void IfxQspi_initSlso(const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex)
1087 {
1088 IfxPort_setPinModeOutput(slso->pin.port, slso->pin.pinIndex, slsoMode, outIndex);
1089 IfxPort_setPinPadDriver(slso->pin.port, slso->pin.pinIndex, padDriver);
1090 }
1091
1092
1093 IFX_INLINE boolean IfxQspi_isModuleEnabled(Ifx_QSPI *qspi)
1094 {
1095 return (qspi->CLC.B.DISS == 0) ? TRUE : FALSE;
1096 }
1097
1098
1099 IFX_INLINE void IfxQspi_pause(Ifx_QSPI *qspi)
1100 {
1101 qspi->GLOBALCON.B.EN = 0;
1102
1103 while (IfxQspi_getPhase(qspi) != IfxQspi_Phase_wait)
1104 {}
1105 }
1106
1107
1108 IFX_INLINE void IfxQspi_permutateBigEndian(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bigEndian)
1109 {
1110 int cs = channelId % 8;
1111 qspi->ECON[cs].B.BE = bigEndian;
1112 }
1113
1114
1115 IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
1116 {
1117 return qspi->RXEXIT.U;
1118 }
1119
1120
1121 IFX_INLINE void IfxQspi_requestReset(Ifx_QSPI *qspi, IfxQspi_Reset reset)
1122 {
1123 qspi->GLOBALCON.B.RESETS = reset;
1124 }
1125
1126
1127 IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi)
1128 {
1129 qspi->GLOBALCON.B.EN = 1;
1130 }
1131
1132
1133 IFX_INLINE void IfxQspi_setBitsegment1(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment1)
1134 {
1135 int cs = channelId % 8;
1136 qspi->ECON[cs].B.A = bitSegment1;
1137 }
1138
1139
1140 IFX_INLINE void IfxQspi_setBitsegment2(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment2)
1141 {
1142 int cs = channelId % 8;
1143 qspi->ECON[cs].B.B = bitSegment2;
1144 }
1145
1146
1147 IFX_INLINE void IfxQspi_setBitsegment3(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment3)
1148 {
1149 int cs = channelId % 8;
1150 qspi->ECON[cs].B.C = bitSegment3;
1151 }
1152
1153
1154 IFX_INLINE void IfxQspi_setDisableModuleRequest(Ifx_QSPI *qspi)
1155 {
1156 qspi->CLC.B.DISR = 1;
1157 }
1158
1159
1160 IFX_INLINE void IfxQspi_setEnableModuleRequest(Ifx_QSPI *qspi)
1161 {
1162 qspi->CLC.B.DISR = 0;
1163 }
1164
1165
1166 IFX_INLINE void IfxQspi_setReceiveFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_RxFifoInt rxFifoInt)
1167 {
1168 qspi->GLOBALCON1.B.RXFIFOINT = rxFifoInt;
1169 }
1170
1171
1172 IFX_INLINE void IfxQspi_setRxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
1173 {
1174 qspi->GLOBALCON1.B.RXFM = mode;
1175 }
1176
1177
1178 IFX_INLINE void IfxQspi_setSleepMode(Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
1179 {
1180 qspi->CLC.B.EDIS = mode;
1181 }
1182
1183
1184 IFX_INLINE void IfxQspi_setTimeQuantum(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 timeQuantum)
1185 {
1186 int cs = channelId % 8;
1187 qspi->ECON[cs].B.Q = timeQuantum;
1188 }
1189
1190
1191 IFX_INLINE void IfxQspi_setTransmitFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_TxFifoInt txFifoInt)
1192 {
1193 qspi->GLOBALCON1.B.TXFIFOINT = txFifoInt;
1194 }
1195
1196
1197 IFX_INLINE void IfxQspi_setTxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
1198 {
1199 qspi->GLOBALCON1.B.TXFM = mode;
1200 }
1201
1202
1203 IFX_INLINE void IfxQspi_writeBasicConfiguration(Ifx_QSPI *qspi, uint32 baconVal)
1204 {
1205 qspi->BACONENTRY.U = baconVal;
1206 }
1207
1208
1209 IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream(Ifx_QSPI *qspi, uint32 baconVal)
1210 {
1211 Ifx_QSPI_BACON bacon;
1212 bacon.U = baconVal;
1213 bacon.B.LAST = 0;
1214
1215 qspi->BACONENTRY.U = bacon.U;
1216 }
1217
1218
1219 IFX_INLINE void IfxQspi_writeBasicConfigurationEndStream(Ifx_QSPI *qspi, uint32 baconVal)
1220 {
1221 Ifx_QSPI_BACON bacon;
1222 bacon.U = baconVal;
1223 bacon.B.LAST = 1;
1224
1225 qspi->BACONENTRY.U = bacon.U;
1226 }
1227
1228
1229 IFX_INLINE void IfxQspi_writeExtendedConfiguration(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal)
1230 {
1231 int cs = channelId % 8;
1232 qspi->ECON[cs].U = econVal;
1233 }
1234
1235
1236 IFX_INLINE void IfxQspi_writeMixedDataTransmitFifo(Ifx_QSPI *qspi, uint32 mixEntryVal)
1237 {
1238 qspi->MIXENTRY.U = mixEntryVal;
1239 }
1240
1241
1242 IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
1243 {
1244 qspi->DATAENTRY[0].U = data;
1245 }
1246
1247
1248 IFX_INLINE boolean IfxQspi_isModuleSuspended(Ifx_QSPI *qspi)
1249 {
1250 Ifx_QSPI_OCS ocs;
1251
1252 // read the status
1253 ocs.U = qspi->OCS.U;
1254
1255 // return the status
1256 return ocs.B.SUSSTA;
1257 }
1258
1259
1260 IFX_INLINE void IfxQspi_setSuspendMode(Ifx_QSPI *qspi, IfxQspi_SuspendMode mode)
1261 {
1262 Ifx_QSPI_OCS ocs;
1263
1264 // remove protection and configure the suspend mode.
1265 ocs.B.SUS_P = 1;
1266 ocs.B.SUS = mode;
1267 qspi->OCS.U = ocs.U;
1268 }
1269
1270
1271 IFX_INLINE void IfxQspi_initMrstInPinWithPadLevel(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode, IfxPort_PadDriver padDriver)
1272 {
1273 IfxPort_setPinModeInput(mrstIn->pin.port, mrstIn->pin.pinIndex, mrstInMode);
1274 IfxPort_setPinPadDriver(mrstIn->pin.port, mrstIn->pin.pinIndex, padDriver);
1275 mrstIn->module->PISEL.B.MRIS = mrstIn->select;
1276 }
1277
1278
1279 IFX_INLINE void IfxQspi_initMtsrInPinWithPadLevel(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode, IfxPort_PadDriver padDriver)
1280 {
1281 IfxPort_setPinModeInput(mtsrIn->pin.port, mtsrIn->pin.pinIndex, mtsrInMode);
1282 IfxPort_setPinPadDriver(mtsrIn->pin.port, mtsrIn->pin.pinIndex, padDriver);
1283 mtsrIn->module->PISEL.B.SRIS = mtsrIn->select;
1284 }
1285
1286
1287 IFX_INLINE void IfxQspi_initSclkInPinWithPadLevel(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode, IfxPort_PadDriver padDriver)
1288 {
1289 IfxPort_setPinModeInput(sclkIn->pin.port, sclkIn->pin.pinIndex, sclkInMode);
1290 IfxPort_setPinPadDriver(sclkIn->pin.port, sclkIn->pin.pinIndex, padDriver);
1291 sclkIn->module->PISEL.B.SCIS = sclkIn->select;
1292 }
1293
1294
1295 IFX_INLINE void IfxQspi_initSlsiWithPadLevel(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode, IfxPort_PadDriver padDriver)
1296 {
1297 IfxPort_setPinModeInput(slsi->pin.port, slsi->pin.pinIndex, slsiMode);
1298 /* PISEL */
1299 IfxPort_setPinPadDriver(slsi->pin.port, slsi->pin.pinIndex, padDriver);
1300 slsi->module->PISEL.B.SLSIS = slsi->select + 1;
1301 }
1302
1303
1304 #endif /* IFXQSPI_H */
IfxQspi_FifoMode_batchMove
Batch Move Mode.
Definition: IfxQspi.h:289
IfxQspi_Mrst_Out
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:96
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:80
IfxQspi_calculateDelayConstants
IFX_EXTERN void IfxQspi_calculateDelayConstants(const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
Calculates the Delay constants (pre and delay) from the user specified CS delays. ...
Definition: IfxQspi.c:451
IfxQspi_Error_txfifoOverflow
TX FIFO Overflow Error.
Definition: IfxQspi.h:129
IfxQspi_initMtsrInPinWithPadLevel
IFX_INLINE void IfxQspi_initMtsrInPinWithPadLevel(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MTSRIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1279
IfxQspi_Phase_lead
Frame lead phase.
Definition: IfxQspi.h:183
IfxQspi_PhaseTransitionEvent_endOfWait
BUSY (end of WAIT phase)
Definition: IfxQspi.h:195
IfxQspi_Error_rxfifoUnderflow
RX FIFO Underflow Error.
Definition: IfxQspi.h:132
IfxQspi_FifoMode_singleMove
Single Move Mode.
Definition: IfxQspi.h:288
IfxQspi_calcRealBaudrate
IFX_EXTERN float IfxQspi_calcRealBaudrate(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel.
Definition: IfxQspi.c:54
IfxQspi_StrobeDelay_9
SLSO delay 9 cycle(s)
Definition: IfxQspi.h:245
IfxQspi_read8
IFX_EXTERN void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO.
Definition: IfxQspi.c:337
IfxQspi_Error
IfxQspi_Error
QSPI Error Flags (STATUS.ERRORFLAGS)
Definition: IfxQspi.h:123
IfxQspi_Error_baudrate
BaudRate Error.
Definition: IfxQspi.h:128
IfxQspi_read16
IFX_EXTERN void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO.
Definition: IfxQspi.c:313
IfxQspi_DataLengthUnit
IfxQspi_DataLengthUnit
Data length unit of a frame (BACON.BYTE)
Definition: IfxQspi.h:115
IfxQspi_ExpectTimeout_2097152
Expect phse time out 2097152.
Definition: IfxQspi.h:156
IfxQspi_ExpectTimeout_512
Expect phse time out 512.
Definition: IfxQspi.h:144
SpiIf_ChConfig_
Definition: SpiIf.h:225
IfxQspi_PhaseTransitionEvent
IfxQspi_PhaseTransitionEvent
Phase Transition Event.
Definition: IfxQspi.h:193
IfxQspi_StrobeDelay_7
SLSO delay 7 cycle(s)
Definition: IfxQspi.h:243
IfxQspi_enablePT1Event
IFX_INLINE void IfxQspi_enablePT1Event(Ifx_QSPI *qspi, boolean enable)
enable Phase Transition1 Event
Definition: IfxQspi.h:941
IfxQspi_Error_parity
Parity Error.
Definition: IfxQspi.h:126
IfxQspi_getErrorFlags
IFX_INLINE uint16 IfxQspi_getErrorFlags(Ifx_QSPI *qspi)
Definition: IfxQspi.h:959
IfxQspi_clearTxReq
IFX_INLINE void IfxQspi_clearTxReq(Ifx_QSPI *qspi)
Clear TX service requests.
Definition: IfxQspi.h:915
IfxQspi_ChannelId_7
Channel #7.
Definition: IfxQspi.h:103
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxQspi_DataLengthUnit_bit
Data Length in Bits.
Definition: IfxQspi.h:117
IfxQspi_TxFifoInt_1
TxFifo Interrupt Threshold #1.
Definition: IfxQspi.h:275
IfxQspi_Sclk_In
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:72
IfxQspi_ExpectTimeout_2048
Expect phse time out 2048.
Definition: IfxQspi.h:146
IfxQspi_ExpectTimeout_64
Expect phse time out 64.
Definition: IfxQspi.h:141
IfxQspi_setDisableModuleRequest
IFX_INLINE void IfxQspi_setDisableModuleRequest(Ifx_QSPI *qspi)
Sets the disable module request.
Definition: IfxQspi.h:1154
IfxQspi_getMode
IFX_INLINE IfxQspi_Mode IfxQspi_getMode(Ifx_QSPI *qspi)
Gets the current mode of QSPI.
Definition: IfxQspi.h:972
IfxQspi_Index
IfxQspi_Index
List of the available QSPI resources.
Definition: IfxQspi_cfg.h:79
IfxQspi_ExpectTimeout_8192
Expect phse time out 8192.
Definition: IfxQspi.h:148
IfxQspi_getIndex
IFX_EXTERN IfxQspi_Index IfxQspi_getIndex(Ifx_QSPI *qspi)
Specifies the function to get Index.
Definition: IfxQspi.c:293
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxQspi_write16
IFX_EXTERN void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO.
Definition: IfxQspi.c:412
IfxQspi_Error_rxfifoOverflow
RX FIFO Overflow Error.
Definition: IfxQspi.h:131
IfxQspi_Sclk_Out
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:112
IfxQspi_resetModule
IFX_EXTERN void IfxQspi_resetModule(Ifx_QSPI *qspi)
resets QSPI kernel
Definition: IfxQspi.c:365
IfxQspi_writeMixedDataTransmitFifo
IFX_INLINE void IfxQspi_writeMixedDataTransmitFifo(Ifx_QSPI *qspi, uint32 mixEntryVal)
Writes Data and Configuration into MIXEDENTRY register.
Definition: IfxQspi.h:1236
IfxQspi_clearRxReq
IFX_INLINE void IfxQspi_clearRxReq(Ifx_QSPI *qspi)
Clear RX service requests.
Definition: IfxQspi.h:909
IfxQspi_StrobeDelay_1
SLSO delay 1 cycle(s)
Definition: IfxQspi.h:237
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxQspi_getAddress
IFX_EXTERN Ifx_QSPI * IfxQspi_getAddress(IfxQspi_Index qspi)
Definition: IfxQspi.c:276
IfxQspi_setBitsegment1
IFX_INLINE void IfxQspi_setBitsegment1(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment1)
Set the value of bit segment1 (A).
Definition: IfxQspi.h:1133
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxQspi_FifoMode
IfxQspi_FifoMode
Transmit FIFO mode.
Definition: IfxQspi.h:285
IfxQspi_writeBasicConfigurationBeginStream
IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 0.
Definition: IfxQspi.h:1209
IfxScuCcu_getMaxFrequency
float32 IfxScuCcu_getMaxFrequency(void)
API to get FMAX divider frequency. This API returns the fMax frequency based on the divider value in ...
Definition: IfxScuCcu.c:363
IfxQspi_initMtsrInPin
IFX_INLINE void IfxQspi_initMtsrInPin(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode)
Initializes a MTSR input.
Definition: IfxQspi.h:1050
IfxSrc.h
SRC basic functionality.
IfxQspi_PauseRunTransition_run
Request value for Run.
Definition: IfxQspi.h:173
IfxQspi_StrobeDelay_14
SLSO delay 14 cycle(s)
Definition: IfxQspi.h:250
IfxQspi_FifoMode_combinedMove
Combined Move Mode.
Definition: IfxQspi.h:287
IfxCpu_Intrinsics.h
IfxQspi_ExpectTimeout_131072
Expect phse time out 131072.
Definition: IfxQspi.h:152
IfxQspi_PhaseTransitionEvent_endOfFrame
EOF (End of Frame)
Definition: IfxQspi.h:200
IfxQspi_ChannelId_10
Channel #10.
Definition: IfxQspi.h:106
IfxQspi_Phase_data
Frame data phase.
Definition: IfxQspi.h:184
IfxQspi_StrobeDelay_5
SLSO delay 5 cycle(s)
Definition: IfxQspi.h:241
IfxQspi_ChannelId_1
Channel #1.
Definition: IfxQspi.h:97
IfxQspi_getRxFifoMode
IFX_INLINE IfxQspi_FifoMode IfxQspi_getRxFifoMode(Ifx_QSPI *qspi)
Get the Receive FIFO mode.
Definition: IfxQspi.h:1005
IfxQspi_SleepMode
IfxQspi_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_QSPI.CLC.B.EDIS.
Definition: IfxQspi.h:227
IfxQspi_run
IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi)
Request for QSPI in Run state.
Definition: IfxQspi.h:1127
IfxQspi_setSleepMode
IFX_INLINE void IfxQspi_setSleepMode(Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
Sets the disable module request.
Definition: IfxQspi.h:1178
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
IfxQspi_calculateExtendedConfigurationValue
IFX_EXTERN uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values.
Definition: IfxQspi.c:96
SpiIf.h
SPI interface types.
IfxQspi_Phase_trailStrobe
Frame trailstrobe phase.
Definition: IfxQspi.h:188
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxQspi_TxFifoInt_2
TxFifo Interrupt Threshold #2.
Definition: IfxQspi.h:276
IfxQspi_writeExtendedConfiguration
IFX_INLINE void IfxQspi_writeExtendedConfiguration(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal)
Writes channel timing configuration into ECON register.
Definition: IfxQspi.h:1229
IfxQspi_Mrst_In::module
Ifx_QSPI * module
Base address.
Definition: IfxQspi_PinMap.h:58
IfxQspi_StrobeDelay_21
SLSO delay 21 cycle(s)
Definition: IfxQspi.h:257
IfxQspi_Phase_wait
Frame wait phase.
Definition: IfxQspi.h:180
IfxQspi_StrobeDelay_6
SLSO delay 6 cycle(s)
Definition: IfxQspi.h:242
IfxQspi_setEnableModuleRequest
IFX_INLINE void IfxQspi_setEnableModuleRequest(Ifx_QSPI *qspi)
Sets the enable module request.
Definition: IfxQspi.h:1160
IfxQspi_Mrst_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxQspi_PinMap.h:60
IfxQspi_enablePT2Event
IFX_INLINE void IfxQspi_enablePT2Event(Ifx_QSPI *qspi, boolean enable)
enable Phase Transition2 Event
Definition: IfxQspi.h:947
IfxQspi_Slso_Out
SLSO pin mapping structure.
Definition: IfxQspi_PinMap.h:120
IfxQspi_calculateBasicConfigurationValue
IFX_EXTERN uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values.
Definition: IfxQspi.c:67
IfxQspi_readReceiveFifo
IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
Read the oldest data from RXFIFO.
Definition: IfxQspi.h:1115
IfxQspi_SuspendMode_hard
Hard Suspend.
Definition: IfxQspi.h:297
IfxQspi_Phase_idleA
Frame idleA phase.
Definition: IfxQspi.h:181
IfxQspi_ExpectTimeout_128
Expect phse time out 128.
Definition: IfxQspi.h:142
IfxQspi_RxFifoInt_1
RxFifo Interrupt Threshold #1.
Definition: IfxQspi.h:219
IfxQspi_SuspendMode_none
No suspend.
Definition: IfxQspi.h:296
IfxQspi_SuspendMode
IfxQspi_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxQspi.h:294
IfxQspi_StrobeDelay_25
SLSO delay 25 cycle(s)
Definition: IfxQspi.h:261
IfxQspi_getTimeQuantaFrequency
IFX_INLINE float IfxQspi_getTimeQuantaFrequency(Ifx_QSPI *qspi)
Gets Time Quanta frequency.
Definition: IfxQspi.h:1011
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxQspi_ChannelId
IfxQspi_ChannelId
QSPI channel Number (BACON.CS)
Definition: IfxQspi.h:94
IfxQspi_ExpectTimeout_1024
Expect phse time out 1024.
Definition: IfxQspi.h:145
IfxQspi_PauseRunTransition_pause
Request value for pause.
Definition: IfxQspi.h:172
IfxQspi_ChannelId_12
Channel #12.
Definition: IfxQspi.h:108
IfxQspi_Mtsr_Out
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:104
IfxQspi_ChannelId_11
Channel #11.
Definition: IfxQspi.h:107
IfxQspi_setReceiveFifoInterrruptThreshold
IFX_INLINE void IfxQspi_setReceiveFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_RxFifoInt rxFifoInt)
Set the threshold of RXFIFO for service request generation.
Definition: IfxQspi.h:1166
IfxQspi_SuspendMode_soft
Soft Suspend.
Definition: IfxQspi.h:298
IfxQspi_getTransmitSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getTransmitSrc(Ifx_QSPI *qspi)
Gets the TXFIFO service request.
Definition: IfxQspi.h:1023
IfxQspi_Mtsr_In
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:64
IfxQspi_Mrst_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxQspi_PinMap.h:100
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxQspi_StrobeDelay_31
SLSO delay 31 cycle(s)
Definition: IfxQspi.h:267
IfxQspi_RxFifoInt_0
RxFifo Interrupt Threshold #0.
Definition: IfxQspi.h:218
IfxQspi_PauseRunTransition
IfxQspi_PauseRunTransition
Request between pause and Run transition.
Definition: IfxQspi.h:170
IfxQspi_RxFifoInt
IfxQspi_RxFifoInt
Receive Fifo Interrupt Threshold.
Definition: IfxQspi.h:216
IfxQspi_Phase_leadStrobe
Frame leadstrobe phase.
Definition: IfxQspi.h:187
IfxQspi_Mrst_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxQspi_PinMap.h:59
IfxQspi_TxFifoInt
IfxQspi_TxFifoInt
Transmit Fifo Interrupt Threshold.
Definition: IfxQspi.h:273
IfxQspi_ExpectTimeout_16384
Expect phse time out 16384.
Definition: IfxQspi.h:149
IfxQspi_permutateBigEndian
IFX_INLINE void IfxQspi_permutateBigEndian(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bigEndian)
Permutate bytes to / from Big Endian.
Definition: IfxQspi.h:1108
IfxQspi_Phase_trail
Frame trail phase.
Definition: IfxQspi.h:185
IfxQspi_StrobeDelay_15
SLSO delay 15 cycle(s)
Definition: IfxQspi.h:251
IfxQspi_initSclkInPin
IFX_INLINE void IfxQspi_initSclkInPin(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode)
Initializes a SCLK input.
Definition: IfxQspi.h:1064
IfxQspi_Phase_expect
Frame expect phase.
Definition: IfxQspi.h:186
IfxQspi_getReceiveFifoLevel
IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of RXFIFO.
Definition: IfxQspi.h:992
IfxQspi_PhaseTransitionEvent_endOfExpect
CONT (End of EXPECT phase)
Definition: IfxQspi.h:202
IfxQspi_ChannelId_9
Channel #9.
Definition: IfxQspi.h:105
IfxQspi_initMtsrOutPin
IFX_INLINE void IfxQspi_initMtsrOutPin(const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver)
Initializes a MTSR output.
Definition: IfxQspi.h:1057
IfxQspi_write32
IFX_EXTERN void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO.
Definition: IfxQspi.c:425
IfxQspi_Error_txfifoUnderflow
TX FIFO Underflow Error.
Definition: IfxQspi.h:130
IfxQspi_StrobeDelay_17
SLSO delay 17 cycle(s)
Definition: IfxQspi.h:253
IfxQspi_getPhase
IFX_INLINE IfxQspi_Phase IfxQspi_getPhase(Ifx_QSPI *qspi)
Gets actual transmission phase.
Definition: IfxQspi.h:986
IfxQspi_StrobeDelay_13
SLSO delay 13 cycle(s)
Definition: IfxQspi.h:249
IfxQspi_initSclkOutPin
IFX_INLINE void IfxQspi_initSclkOutPin(const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output.
Definition: IfxQspi.h:1071
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxQspi_setSlaveSelectOutputControl
IFX_EXTERN void IfxQspi_setSlaveSelectOutputControl(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
Configures a Slave Select Output.
Definition: IfxQspi.c:383
IfxQspi_getReceiveSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getReceiveSrc(Ifx_QSPI *qspi)
Gets the RXFIFO service request.
Definition: IfxQspi.h:998
IfxQspi_initSlsi
IFX_INLINE void IfxQspi_initSlsi(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode)
Initializes a SLSI input.
Definition: IfxQspi.h:1078
IfxQspi_StrobeDelay_32
SLSO delay 32 cycle(s)
Definition: IfxQspi.h:268
IfxQspi_Mode_slave
QSPI in "slave" mode.
Definition: IfxQspi.h:165
IfxQspi_Mrst_In
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:56
SpiIf_ChMode
Definition: SpiIf.h:186
IfxQspi_getTxFifoMode
IFX_INLINE IfxQspi_FifoMode IfxQspi_getTxFifoMode(Ifx_QSPI *qspi)
Get the Transfer FIFO mode.
Definition: IfxQspi.h:1030
IfxQspi_ExpectTimeout_524288
Expect phse time out 524288.
Definition: IfxQspi.h:154
IfxQspi_DelayConst::pre
uint8 pre
specifies the prescalar value
Definition: IfxQspi.h:310
IfxQspi_SleepMode_disable
Sleep Mode disabled.
Definition: IfxQspi.h:230
IfxQspi_Phase
IfxQspi_Phase
QSPI frame phase (STATUS.PHASE)
Definition: IfxQspi.h:178
IfxQspi_PhaseTransitionEvent_dataNotAvailable
DNA (Data not Available = Start of Expect)
Definition: IfxQspi.h:201
IfxQspi_ChannelId_3
Channel #3.
Definition: IfxQspi.h:99
IfxQspi_ChannelId_4
Channel #4.
Definition: IfxQspi.h:100
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxQspi_PhaseTransitionEvent_transmitBufferEmptied
TBE (Transmit Buffer Emptied)
Definition: IfxQspi.h:198
IfxQspi_isModuleSuspended
IFX_INLINE boolean IfxQspi_isModuleSuspended(Ifx_QSPI *qspi)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxQspi.h:1248
IfxQspi_setTimeQuantum
IFX_INLINE void IfxQspi_setTimeQuantum(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 timeQuantum)
Set the value of Time Quantum.
Definition: IfxQspi.h:1184
IfxQspi_getErrorSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getErrorSrc(Ifx_QSPI *qspi)
Gets the Error request value.
Definition: IfxQspi.h:965
IfxQspi_ChannelId_14
Channel #14.
Definition: IfxQspi.h:110
IfxQspi_ChannelId_8
Channel #8.
Definition: IfxQspi.h:104
IfxQspi_ChannelId_2
Channel #2.
Definition: IfxQspi.h:98
IfxQspi_pause
IFX_INLINE void IfxQspi_pause(Ifx_QSPI *qspi)
Request for Module in Pause state no interrupts no communication.
Definition: IfxQspi.h:1099
IfxQspi_StrobeDelay_22
SLSO delay 22 cycle(s)
Definition: IfxQspi.h:258
IfxQspi_Reset_none
No Reset.
Definition: IfxQspi.h:209
IfxQspi_read32
IFX_EXTERN void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO.
Definition: IfxQspi.c:325
IfxQspi_setTxFifoMode
IFX_INLINE void IfxQspi_setTxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
Set the transfer FIFO mode.
Definition: IfxQspi.h:1197
IfxQspi_StrobeDelay_28
SLSO delay 28 cycle(s)
Definition: IfxQspi.h:264
IfxQspi_PhaseTransitionEvent_serialClockPolarityChange
SCLKPC (serial clock polarity change)
Definition: IfxQspi.h:196
IfxQspi_StrobeDelay_20
SLSO delay 20 cycle(s)
Definition: IfxQspi.h:256
IfxQspi_enableLoopbackMode
IFX_INLINE void IfxQspi_enableLoopbackMode(Ifx_QSPI *qspi, boolean enable)
Enable/Disable Loopback mode.
Definition: IfxQspi.h:933
IfxQspi_calculateTimeQuantumLength
IFX_EXTERN uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length.
Definition: IfxQspi.c:233
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxQspi_StrobeDelay_11
SLSO delay 11 cycle(s)
Definition: IfxQspi.h:247
IfxQspi_StrobeDelay_2
SLSO delay 2 cycle(s)
Definition: IfxQspi.h:238
IfxQspi_getModuleFrequency
IFX_INLINE float IfxQspi_getModuleFrequency(Ifx_QSPI *qspi)
Specifies function to get module frequency.
Definition: IfxQspi.h:978
IfxQspi_ChannelId_6
Channel #6.
Definition: IfxQspi.h:102
IfxQspi_Mode_pwmOverQspi
QSPI in "PWM over QSPI" mode.
Definition: IfxQspi.h:164
IfxQspi_ExpectTimeout_65536
Expect phse time out 65536.
Definition: IfxQspi.h:151
IfxQspi_PinMap.h
QSPI I/O map.
IfxQspi_setBitsegment2
IFX_INLINE void IfxQspi_setBitsegment2(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment2)
Set the value of bit segment2 (B).
Definition: IfxQspi.h:1140
IfxQspi_TxFifoInt_3
TxFifo Interrupt Threshold #3.
Definition: IfxQspi.h:277
IfxQspi_TxFifoInt_4
TxFifo Interrupt Threshold #4.
Definition: IfxQspi.h:278
IfxQspi_requestReset
IFX_INLINE void IfxQspi_requestReset(Ifx_QSPI *qspi, IfxQspi_Reset reset)
Request reset (State Machine & FIFO / Register / Module)
Definition: IfxQspi.h:1121
IfxQspi_StrobeDelay_3
SLSO delay 3 cycle(s)
Definition: IfxQspi.h:239
IfxQspi_configPT1Event
IFX_INLINE void IfxQspi_configPT1Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt1Config)
Configure PT1 event (also USR event depending if USREN=1 )
Definition: IfxQspi.h:921
IfxQspi_DelayConst
Structure holding the "pre" and "delay" values. To be populated into BACON register after delay calcu...
Definition: IfxQspi.h:308
IfxQspi_setRxFifoMode
IFX_INLINE void IfxQspi_setRxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
Definition: IfxQspi.h:1172
IfxScuCcu.h
SCU basic functionality.
IfxQspi_initMrstInPin
IFX_INLINE void IfxQspi_initMrstInPin(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode)
Initializes a MRST input.
Definition: IfxQspi.h:1036
IfxQspi_ChannelId_5
Channel #5.
Definition: IfxQspi.h:101
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxQspi_initMrstInPinWithPadLevel
IFX_INLINE void IfxQspi_initMrstInPinWithPadLevel(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MRSTIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1271
IfxQspi_clearAllEventFlags
IFX_INLINE void IfxQspi_clearAllEventFlags(Ifx_QSPI *qspi)
Clear ALL service requests.
Definition: IfxQspi.h:903
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:477
IfxQspi_writeTransmitFifo
IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register.
Definition: IfxQspi.h:1242
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxQspi_Mode_master
QSPI in "master" mode.
Definition: IfxQspi.h:163
IfxQspi_StrobeDelay_8
SLSO delay 8 cycle(s)
Definition: IfxQspi.h:244
IfxQspi_initSclkInPinWithPadLevel
IFX_INLINE void IfxQspi_initSclkInPinWithPadLevel(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SCLKIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1287
IfxQspi_StrobeDelay_24
SLSO delay 24 cycle(s)
Definition: IfxQspi.h:260
IfxQspi_writeBasicConfigurationEndStream
IFX_INLINE void IfxQspi_writeBasicConfigurationEndStream(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 1.
Definition: IfxQspi.h:1219
IfxQspi_StrobeDelay_23
SLSO delay 23 cycle(s)
Definition: IfxQspi.h:259
IfxQspi_Error_expectTimeout
EXPECT Timeout Error.
Definition: IfxQspi.h:133
IfxQspi_ExpectTimeout_256
Expect phse time out 256.
Definition: IfxQspi.h:143
IfxQspi_calculatePrescaler
IFX_EXTERN uint32 IfxQspi_calculatePrescaler(Ifx_QSPI *qspi, float baudrate)
Function to calculate prescaler.
Definition: IfxQspi.c:209
IfxQspi_initMrstOutPin
IFX_INLINE void IfxQspi_initMrstOutPin(const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver)
Initializes a MRST output.
Definition: IfxQspi.h:1043
IfxQspi_DelayConst::delay
uint8 delay
delay multiplier
Definition: IfxQspi.h:311
IfxQspi_ExpectTimeout_4096
Expect phse time out 4096.
Definition: IfxQspi.h:147
IfxQspi_Error_configuration
Configuration Error.
Definition: IfxQspi.h:127
IfxQspi_cfg.h
QSPI on-chip implementation data.
IfxQspi_RxFifoInt_2
RxFifo Interrupt Threshold #2.
Definition: IfxQspi.h:220
IfxQspi_StrobeDelay_30
SLSO delay 30 cycle(s)
Definition: IfxQspi.h:266
IfxQspi_ExpectTimeout_1048576
Expect phse time out 1048576.
Definition: IfxQspi.h:155
IfxQspi_initSlso
IFX_INLINE void IfxQspi_initSlso(const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex)
Initializes a SLSO output.
Definition: IfxQspi.h:1086
IfxQspi_Reset
IfxQspi_Reset
Reset Request (GLOBALCON.RESETS)
Definition: IfxQspi.h:207
IfxQspi_PhaseTransitionEvent_receiveBufferFilled
RBF (Receive Buffer Filled)
Definition: IfxQspi.h:199
IfxQspi_write8
IFX_EXTERN void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO.
Definition: IfxQspi.c:438
IfxQspi_writeBasicConfiguration
IFX_INLINE void IfxQspi_writeBasicConfiguration(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register.
Definition: IfxQspi.h:1203
IfxQspi_Phase_idleB
frame idleB phase
Definition: IfxQspi.h:182
IfxQspi_setBitsegment3
IFX_INLINE void IfxQspi_setBitsegment3(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment3)
Set the value of bit segment3 (C).
Definition: IfxQspi.h:1147
IfxQspi_StrobeDelay_19
SLSO delay 19 cycle(s)
Definition: IfxQspi.h:255
IfxQspi_getTransmitFifoLevel
IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of TXFIFO.
Definition: IfxQspi.h:1017
IfxQspi_Error_none
No Error.
Definition: IfxQspi.h:125
IfxQspi_StrobeDelay_26
SLSO delay 26 cycle(s)
Definition: IfxQspi.h:262
IfxQspi_recalcBasicConfiguration
IFX_EXTERN uint32 IfxQspi_recalcBasicConfiguration(uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
Re-calculated BACON from the oldBACON.
Definition: IfxQspi.c:349
IfxQspi_Error_slsiMisplacedInactivation
SLSI misplaced inactivation (slave mode)
Definition: IfxQspi.h:134
IfxQspi_configPT2Event
IFX_INLINE void IfxQspi_configPT2Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt2Config)
Configure PT2 event.
Definition: IfxQspi.h:927
IfxQspi_Reset_stateMachineAndFifo
State Machine, TXFIFO and RXFIFO reset, registers not reseted.
Definition: IfxQspi.h:210
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxQspi_Mode
IfxQspi_Mode
QSPI controller mode (GLOBALCON.MODE)
Definition: IfxQspi.h:161
IfxQspi_isModuleEnabled
IFX_INLINE boolean IfxQspi_isModuleEnabled(Ifx_QSPI *qspi)
Specifies the Module enable or disable status.
Definition: IfxQspi.h:1093
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxQspi_setTransmitFifoInterrruptThreshold
IFX_INLINE void IfxQspi_setTransmitFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_TxFifoInt txFifoInt)
Set the threshold of TXFIFO for service request generation.
Definition: IfxQspi.h:1191
IfxQspi_SleepMode_enable
Sleep Mode enabled.
Definition: IfxQspi.h:229
IfxQspi_ExpectTimeout_262144
Expect phse time out 262144.
Definition: IfxQspi.h:153
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxQspi_StrobeDelay_16
SLSO delay 16 cycle(s)
Definition: IfxQspi.h:252
IfxQspi_StrobeDelay_10
SLSO delay 10 cycle(s)
Definition: IfxQspi.h:246
IfxQspi_StrobeDelay_12
SLSO delay 12 cycle(s)
Definition: IfxQspi.h:248
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxQspi_ChannelId_13
Channel #13.
Definition: IfxQspi.h:109
IfxQspi_Reset_kernel
Kernel / Module Reset.
Definition: IfxQspi.h:211
IfxQspi_StrobeDelay_29
SLSO delay 29 cycle(s)
Definition: IfxQspi.h:265
IfxQspi_DataLengthUnit_byte
Data length in Bytes.
Definition: IfxQspi.h:118
IfxQspi_setSuspendMode
IFX_INLINE void IfxQspi_setSuspendMode(Ifx_QSPI *qspi, IfxQspi_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxQspi.h:1260
IfxQspi_StrobeDelay_4
SLSO delay 4 cycle(s)
Definition: IfxQspi.h:240
IfxQspi_PhaseTransitionEvent_startOfFrame
SOF (Start Of Frame )
Definition: IfxQspi.h:197
IfxQspi_StrobeDelay
IfxQspi_StrobeDelay
STROBE delay for SLSO in delayed mode (GLOBALCON.STROBE)
Definition: IfxQspi.h:235
IfxQspi_StrobeDelay_27
SLSO delay 27 cycle(s)
Definition: IfxQspi.h:263
IfxQspi_enableUsrEvent
IFX_INLINE void IfxQspi_enableUsrEvent(Ifx_QSPI *qspi, boolean enable)
enable User Event (Event selected by PT1)
Definition: IfxQspi.h:953
IfxQspi_RxFifoInt_3
RxFifo Interrupt Threshold #3.
Definition: IfxQspi.h:221
IfxQspi_ExpectTimeout_32768
Expect phse time out 32768.
Definition: IfxQspi.h:150
IfxQspi_initSlsiWithPadLevel
IFX_INLINE void IfxQspi_initSlsiWithPadLevel(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SLSI pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1295
IfxQspi_ExpectTimeout
IfxQspi_ExpectTimeout
Frame Expect phase time out value.
Definition: IfxQspi.h:139
IfxQspi_StrobeDelay_18
SLSO delay 18 cycle(s)
Definition: IfxQspi.h:254
IfxQspi_ChannelId_0
Channel #0.
Definition: IfxQspi.h:96


iLLD_TC26B: IfxQspi_PinMap.c Source File

  • _PinMap
IfxQspi_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_PinMap.c
3 * \brief QSPI I/O map
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxQspi_PinMap.h"
44
45 IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a};
46 IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_b};
47 IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN = {&MODULE_QSPI3, {&MODULE_P33, 9}, Ifx_RxSel_a};
48 IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN = {&MODULE_QSPI3, {&MODULE_P33,10}, Ifx_RxSel_b};
49 IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN = {&MODULE_QSPI0, {&MODULE_P20,12}, Ifx_RxSel_a};
50 IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN = {&MODULE_QSPI1, {&MODULE_P10, 1}, Ifx_RxSel_a};
51 IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN = {&MODULE_QSPI1, {&MODULE_P11, 3}, Ifx_RxSel_b};
52 IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN = {&MODULE_QSPI2, {&MODULE_P15, 4}, Ifx_RxSel_a};
53 IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN = {&MODULE_QSPI2, {&MODULE_P15, 7}, Ifx_RxSel_b};
54 IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN = {&MODULE_QSPI2, {&MODULE_P21, 2}, Ifx_RxSel_c};
55 IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN = {&MODULE_QSPI2, {&MODULE_P21, 3}, Ifx_RxSel_c};
56 IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_e};
57 IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN = {&MODULE_QSPI3, {&MODULE_P02, 5}, Ifx_RxSel_a};
58 IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN = {&MODULE_QSPI3, {&MODULE_P10, 7}, Ifx_RxSel_b};
59 IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN = {&MODULE_QSPI3, {&MODULE_P33,13}, Ifx_RxSel_d};
60 IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN = {&MODULE_QSPI3, {&MODULE_P22, 1}, Ifx_RxSel_e};
61 IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN = {&MODULE_QSPI3, {&MODULE_P21, 2}, Ifx_RxSel_f};
62 IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN = {&MODULE_QSPI3, {&MODULE_P21, 3}, Ifx_RxSel_f};
63 IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt3};
64 IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt3};
65 IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT = {&MODULE_QSPI1, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt6};
66 IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT = {&MODULE_QSPI1, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt3};
67 IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT = {&MODULE_QSPI2, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt3};
68 IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT = {&MODULE_QSPI2, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt3};
69 IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT = {&MODULE_QSPI3, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt3};
70 IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT = {&MODULE_QSPI3, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt3};
71 IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT = {&MODULE_QSPI3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt3};
72 IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT = {&MODULE_QSPI3, {&MODULE_P33,13}, IfxPort_OutputIdx_alt3};
73 IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN = {&MODULE_QSPI0, {&MODULE_P20,14}, Ifx_RxSel_a};
74 IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN = {&MODULE_QSPI1, {&MODULE_P10, 3}, Ifx_RxSel_a};
75 IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN = {&MODULE_QSPI1, {&MODULE_P11, 9}, Ifx_RxSel_b};
76 IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN = {&MODULE_QSPI1, {&MODULE_P10, 4}, Ifx_RxSel_c};
77 IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN = {&MODULE_QSPI2, {&MODULE_P15, 5}, Ifx_RxSel_a};
78 IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN = {&MODULE_QSPI2, {&MODULE_P15, 6}, Ifx_RxSel_b};
79 IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN = {&MODULE_QSPI3, {&MODULE_P02, 6}, Ifx_RxSel_a};
80 IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN = {&MODULE_QSPI3, {&MODULE_P10, 6}, Ifx_RxSel_b};
81 IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN = {&MODULE_QSPI3, {&MODULE_P33,12}, Ifx_RxSel_d};
82 IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN = {&MODULE_QSPI3, {&MODULE_P22, 0}, Ifx_RxSel_e};
83 IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt4};
84 IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT = {&MODULE_QSPI0, {&MODULE_P20,14}, IfxPort_OutputIdx_alt3};
85 IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt2};
86 IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT = {&MODULE_QSPI1, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt3};
87 IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT = {&MODULE_QSPI1, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt4};
88 IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT = {&MODULE_QSPI1, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt3};
89 IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT = {&MODULE_QSPI2, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt3};
90 IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT = {&MODULE_QSPI2, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt3};
91 IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT = {&MODULE_QSPI2, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt3};
92 IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt3};
93 IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT = {&MODULE_QSPI3, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt4};
94 IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT = {&MODULE_QSPI3, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt4};
95 IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT = {&MODULE_QSPI3, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt3};
96 IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT = {&MODULE_QSPI3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt3};
97 IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT = {&MODULE_QSPI3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt3};
98 IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT = {&MODULE_QSPI3, {&MODULE_P33,12}, IfxPort_OutputIdx_alt3};
99 IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN = {&MODULE_QSPI0, {&MODULE_P20,11}, Ifx_RxSel_a};
100 IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN = {&MODULE_QSPI1, {&MODULE_P10, 2}, Ifx_RxSel_a};
101 IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN = {&MODULE_QSPI1, {&MODULE_P11, 6}, Ifx_RxSel_b};
102 IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_a};
103 IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN = {&MODULE_QSPI2, {&MODULE_P15, 8}, Ifx_RxSel_b};
104 IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN = {&MODULE_QSPI3, {&MODULE_P02, 7}, Ifx_RxSel_a};
105 IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN = {&MODULE_QSPI3, {&MODULE_P10, 8}, Ifx_RxSel_b};
106 IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN = {&MODULE_QSPI3, {&MODULE_P33,11}, Ifx_RxSel_d};
107 IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN = {&MODULE_QSPI3, {&MODULE_P22, 3}, Ifx_RxSel_e};
108 IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT = {&MODULE_QSPI0, {&MODULE_P20,11}, IfxPort_OutputIdx_alt3};
109 IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT = {&MODULE_QSPI0, {&MODULE_P20,13}, IfxPort_OutputIdx_alt5};
110 IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT = {&MODULE_QSPI1, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt3};
111 IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT = {&MODULE_QSPI1, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt3};
112 IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT = {&MODULE_QSPI2, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt3};
113 IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT = {&MODULE_QSPI2, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt3};
114 IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT = {&MODULE_QSPI2, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt3};
115 IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt5};
116 IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT = {&MODULE_QSPI2, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt3};
117 IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT = {&MODULE_QSPI3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt4};
118 IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT = {&MODULE_QSPI3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt4};
119 IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT = {&MODULE_QSPI3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt3};
120 IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT = {&MODULE_QSPI3, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt3};
121 IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT = {&MODULE_QSPI3, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt3};
122 IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT = {&MODULE_QSPI3, {&MODULE_P33,11}, IfxPort_OutputIdx_alt3};
123 IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN = {&MODULE_QSPI0, {&MODULE_P20,13}, Ifx_RxSel_a};
124 IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN = {&MODULE_QSPI0, {&MODULE_P20, 9}, Ifx_RxSel_b};
125 IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN = {&MODULE_QSPI1, {&MODULE_P11,10}, Ifx_RxSel_a};
126 IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a};
127 IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN = {&MODULE_QSPI2, {&MODULE_P15, 1}, Ifx_RxSel_b};
128 IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN = {&MODULE_QSPI3, {&MODULE_P02, 4}, Ifx_RxSel_a};
129 IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN = {&MODULE_QSPI3, {&MODULE_P33,10}, Ifx_RxSel_c};
130 IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN = {&MODULE_QSPI3, {&MODULE_P22, 2}, Ifx_RxSel_d};
131 IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT = {&MODULE_QSPI0, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt3};
132 IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT = {&MODULE_QSPI0, 13, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt3};
133 IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT = {&MODULE_QSPI0, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt3};
134 IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT = {&MODULE_QSPI0, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt3};
135 IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT = {&MODULE_QSPI0, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt3};
136 IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT = {&MODULE_QSPI0, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt3};
137 IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT = {&MODULE_QSPI0, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt3};
138 IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT = {&MODULE_QSPI0, 6, {&MODULE_P20,10}, IfxPort_OutputIdx_alt3};
139 IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT = {&MODULE_QSPI0, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt2};
140 IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT = {&MODULE_QSPI0, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt3};
141 IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT = {&MODULE_QSPI0, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt3};
142 IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT = {&MODULE_QSPI1, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt4};
143 IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT = {&MODULE_QSPI1, 10, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt3};
144 IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT = {&MODULE_QSPI1, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt4};
145 IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT = {&MODULE_QSPI1, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt4};
146 IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT = {&MODULE_QSPI1, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt4};
147 IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT = {&MODULE_QSPI1, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt4};
148 IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT = {&MODULE_QSPI1, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt4};
149 IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT = {&MODULE_QSPI1, 6, {&MODULE_P33,10}, IfxPort_OutputIdx_alt2};
150 IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT = {&MODULE_QSPI1, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt3};
151 IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT = {&MODULE_QSPI1, 8, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt3};
152 IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT = {&MODULE_QSPI1, 9, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt4};
153 IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT = {&MODULE_QSPI2, 0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt3};
154 IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT = {&MODULE_QSPI2, 1, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt3};
155 IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT = {&MODULE_QSPI2, 2, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt3};
156 IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT = {&MODULE_QSPI2, 3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt3};
157 IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT = {&MODULE_QSPI2, 4, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt3};
158 IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT = {&MODULE_QSPI2, 5, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt3};
159 IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT = {&MODULE_QSPI2, 6, {&MODULE_P33,13}, IfxPort_OutputIdx_alt4};
160 IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT = {&MODULE_QSPI2, 7, {&MODULE_P20,10}, IfxPort_OutputIdx_alt4};
161 IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT = {&MODULE_QSPI2, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt4};
162 IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT = {&MODULE_QSPI2, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt4};
163 IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT = {&MODULE_QSPI3, 0, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt3};
164 IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT = {&MODULE_QSPI3, 11, {&MODULE_P33,10}, IfxPort_OutputIdx_alt3};
165 IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT = {&MODULE_QSPI3, 12, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt3};
166 IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT = {&MODULE_QSPI3, 13, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt3};
167 IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT = {&MODULE_QSPI3, 1, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt3};
168 IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT = {&MODULE_QSPI3, 1, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt3};
169 IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT = {&MODULE_QSPI3, 2, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt3};
170 IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT = {&MODULE_QSPI3, 2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt3};
171 IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT = {&MODULE_QSPI3, 3, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt3};
172 IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT = {&MODULE_QSPI3, 4, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt3};
173 IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT = {&MODULE_QSPI3, 4, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt3};
174 IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT = {&MODULE_QSPI3, 5, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt2};
175 IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT = {&MODULE_QSPI3, 5, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt3};
176 IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT = {&MODULE_QSPI3, 6, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt2};
177 IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT = {&MODULE_QSPI3, 7, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt2};
178 IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT = {&MODULE_QSPI3, 7, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt3};
179 IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT = {&MODULE_QSPI3, 8, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt3};
180
181
182 const IfxQspi_Hsicin_In *IfxQspi_Hsicin_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS] = {
183 {
184 NULL_PTR,
185 NULL_PTR
186 },
187 {
188 NULL_PTR,
189 NULL_PTR
190 },
191 {
192 &IfxQspi2_HSICINA_P15_2_IN,
193 &IfxQspi2_HSICINB_P15_3_IN
194 },
195 {
196 &IfxQspi3_HSICINA_P33_9_IN,
197 &IfxQspi3_HSICINB_P33_10_IN
198 }
199 };
200
201 const IfxQspi_Mrst_In *IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS] = {
202 {
203 &IfxQspi0_MRSTA_P20_12_IN,
204 NULL_PTR,
205 NULL_PTR,
206 NULL_PTR,
207 NULL_PTR,
208 NULL_PTR
209 },
210 {
211 &IfxQspi1_MRSTA_P10_1_IN,
212 &IfxQspi1_MRSTB_P11_3_IN,
213 NULL_PTR,
214 NULL_PTR,
215 NULL_PTR,
216 NULL_PTR
217 },
218 {
219 &IfxQspi2_MRSTA_P15_4_IN,
220 &IfxQspi2_MRSTB_P15_7_IN,
221 &IfxQspi2_MRSTCN_P21_2_IN,
222 NULL_PTR,
223 &IfxQspi2_MRSTE_P15_2_IN,
224 NULL_PTR
225 },
226 {
227 &IfxQspi3_MRSTA_P02_5_IN,
228 &IfxQspi3_MRSTB_P10_7_IN,
229 NULL_PTR,
230 &IfxQspi3_MRSTD_P33_13_IN,
231 &IfxQspi3_MRSTE_P22_1_IN,
232 &IfxQspi3_MRSTFN_P21_2_IN
233 }
234 };
235
236 const IfxQspi_Mrst_Out *IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS] = {
237 {
238 &IfxQspi0_MRST_P20_12_OUT,
239 NULL_PTR,
240 NULL_PTR,
241 NULL_PTR
242 },
243 {
244 &IfxQspi1_MRST_P10_1_OUT,
245 &IfxQspi1_MRST_P10_6_OUT,
246 &IfxQspi1_MRST_P11_3_OUT,
247 NULL_PTR
248 },
249 {
250 &IfxQspi2_MRST_P15_4_OUT,
251 &IfxQspi2_MRST_P15_7_OUT,
252 NULL_PTR,
253 NULL_PTR
254 },
255 {
256 &IfxQspi3_MRST_P02_5_OUT,
257 &IfxQspi3_MRST_P10_7_OUT,
258 &IfxQspi3_MRST_P22_1_OUT,
259 &IfxQspi3_MRST_P33_13_OUT
260 }
261 };
262
263 const IfxQspi_Mtsr_In *IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS] = {
264 {
265 &IfxQspi0_MTSRA_P20_14_IN,
266 NULL_PTR,
267 NULL_PTR,
268 NULL_PTR,
269 NULL_PTR
270 },
271 {
272 &IfxQspi1_MTSRA_P10_3_IN,
273 &IfxQspi1_MTSRB_P11_9_IN,
274 &IfxQspi1_MTSRC_P10_4_IN,
275 NULL_PTR,
276 NULL_PTR
277 },
278 {
279 &IfxQspi2_MTSRA_P15_5_IN,
280 &IfxQspi2_MTSRB_P15_6_IN,
281 NULL_PTR,
282 NULL_PTR,
283 NULL_PTR
284 },
285 {
286 &IfxQspi3_MTSRA_P02_6_IN,
287 &IfxQspi3_MTSRB_P10_6_IN,
288 NULL_PTR,
289 &IfxQspi3_MTSRD_P33_12_IN,
290 &IfxQspi3_MTSRE_P22_0_IN
291 }
292 };
293
294 const IfxQspi_Mtsr_Out *IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS] = {
295 {
296 &IfxQspi0_MTSR_P20_12_OUT,
297 &IfxQspi0_MTSR_P20_14_OUT,
298 NULL_PTR,
299 NULL_PTR,
300 NULL_PTR,
301 NULL_PTR
302 },
303 {
304 &IfxQspi1_MTSR_P10_1_OUT,
305 &IfxQspi1_MTSR_P10_3_OUT,
306 &IfxQspi1_MTSR_P10_4_OUT,
307 &IfxQspi1_MTSR_P11_9_OUT,
308 NULL_PTR,
309 NULL_PTR
310 },
311 {
312 &IfxQspi2_MTSRN_P13_2_OUT,
313 &IfxQspi2_MTSRP_P13_3_OUT,
314 &IfxQspi2_MTSR_P15_5_OUT,
315 &IfxQspi2_MTSR_P15_6_OUT,
316 NULL_PTR,
317 NULL_PTR
318 },
319 {
320 &IfxQspi3_MTSR_P02_6_OUT,
321 &IfxQspi3_MTSR_P10_6_OUT,
322 &IfxQspi3_MTSR_P22_0_OUT,
323 &IfxQspi3_MTSRN_P22_2_OUT,
324 &IfxQspi3_MTSRP_P22_3_OUT,
325 &IfxQspi3_MTSR_P33_12_OUT
326 }
327 };
328
329 const IfxQspi_Sclk_In *IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS] = {
330 {
331 &IfxQspi0_SCLKA_P20_11_IN,
332 NULL_PTR,
333 NULL_PTR,
334 NULL_PTR,
335 NULL_PTR
336 },
337 {
338 &IfxQspi1_SCLKA_P10_2_IN,
339 &IfxQspi1_SCLKB_P11_6_IN,
340 NULL_PTR,
341 NULL_PTR,
342 NULL_PTR
343 },
344 {
345 &IfxQspi2_SCLKA_P15_3_IN,
346 &IfxQspi2_SCLKB_P15_8_IN,
347 NULL_PTR,
348 NULL_PTR,
349 NULL_PTR
350 },
351 {
352 &IfxQspi3_SCLKA_P02_7_IN,
353 &IfxQspi3_SCLKB_P10_8_IN,
354 NULL_PTR,
355 &IfxQspi3_SCLKD_P33_11_IN,
356 &IfxQspi3_SCLKE_P22_3_IN
357 }
358 };
359
360 const IfxQspi_Sclk_Out *IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS] = {
361 {
362 &IfxQspi0_SCLK_P20_11_OUT,
363 &IfxQspi0_SCLK_P20_13_OUT,
364 NULL_PTR,
365 NULL_PTR,
366 NULL_PTR,
367 NULL_PTR
368 },
369 {
370 &IfxQspi1_SCLK_P10_2_OUT,
371 &IfxQspi1_SCLK_P11_6_OUT,
372 NULL_PTR,
373 NULL_PTR,
374 NULL_PTR,
375 NULL_PTR
376 },
377 {
378 &IfxQspi2_SCLKN_P13_0_OUT,
379 &IfxQspi2_SCLKP_P13_1_OUT,
380 &IfxQspi2_SCLK_P15_3_OUT,
381 &IfxQspi2_SCLK_P15_6_OUT,
382 &IfxQspi2_SCLK_P15_8_OUT,
383 NULL_PTR
384 },
385 {
386 &IfxQspi3_SCLK_P02_7_OUT,
387 &IfxQspi3_SCLK_P10_8_OUT,
388 &IfxQspi3_SCLKN_P22_0_OUT,
389 &IfxQspi3_SCLKP_P22_1_OUT,
390 &IfxQspi3_SCLK_P22_3_OUT,
391 &IfxQspi3_SCLK_P33_11_OUT
392 }
393 };
394
395 const IfxQspi_Slsi_In *IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS] = {
396 {
397 &IfxQspi0_SLSIA_P20_13_IN,
398 &IfxQspi0_SLSIB_P20_9_IN,
399 NULL_PTR,
400 NULL_PTR
401 },
402 {
403 &IfxQspi1_SLSIA_P11_10_IN,
404 NULL_PTR,
405 NULL_PTR,
406 NULL_PTR
407 },
408 {
409 &IfxQspi2_SLSIA_P15_2_IN,
410 &IfxQspi2_SLSIB_P15_1_IN,
411 NULL_PTR,
412 NULL_PTR
413 },
414 {
415 &IfxQspi3_SLSIA_P02_4_IN,
416 NULL_PTR,
417 &IfxQspi3_SLSIC_P33_10_IN,
418 &IfxQspi3_SLSID_P22_2_IN
419 }
420 };
421
422 const IfxQspi_Slso_Out *IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS] = {
423 {
424 {
425 &IfxQspi0_SLSO0_P20_8_OUT,
426 NULL_PTR
427 },
428 {
429 &IfxQspi0_SLSO1_P20_9_OUT,
430 NULL_PTR
431 },
432 {
433 &IfxQspi0_SLSO2_P20_13_OUT,
434 NULL_PTR
435 },
436 {
437 &IfxQspi0_SLSO3_P11_10_OUT,
438 NULL_PTR
439 },
440 {
441 &IfxQspi0_SLSO4_P11_11_OUT,
442 NULL_PTR
443 },
444 {
445 &IfxQspi0_SLSO5_P11_2_OUT,
446 NULL_PTR
447 },
448 {
449 &IfxQspi0_SLSO6_P20_10_OUT,
450 NULL_PTR
451 },
452 {
453 &IfxQspi0_SLSO7_P33_5_OUT,
454 NULL_PTR
455 },
456 {
457 &IfxQspi0_SLSO8_P20_6_OUT,
458 NULL_PTR
459 },
460 {
461 &IfxQspi0_SLSO9_P20_3_OUT,
462 NULL_PTR
463 },
464 {
465 NULL_PTR,
466 NULL_PTR
467 },
468 {
469 NULL_PTR,
470 NULL_PTR
471 },
472 {
473 NULL_PTR,
474 NULL_PTR
475 },
476 {
477 &IfxQspi0_SLSO13_P15_0_OUT,
478 NULL_PTR
479 }
480 },
481 {
482 {
483 &IfxQspi1_SLSO0_P20_8_OUT,
484 NULL_PTR
485 },
486 {
487 &IfxQspi1_SLSO1_P20_9_OUT,
488 NULL_PTR
489 },
490 {
491 &IfxQspi1_SLSO2_P20_13_OUT,
492 NULL_PTR
493 },
494 {
495 &IfxQspi1_SLSO3_P11_10_OUT,
496 NULL_PTR
497 },
498 {
499 &IfxQspi1_SLSO4_P11_11_OUT,
500 NULL_PTR
501 },
502 {
503 &IfxQspi1_SLSO5_P11_2_OUT,
504 NULL_PTR
505 },
506 {
507 &IfxQspi1_SLSO6_P33_10_OUT,
508 NULL_PTR
509 },
510 {
511 &IfxQspi1_SLSO7_P33_5_OUT,
512 NULL_PTR
513 },
514 {
515 &IfxQspi1_SLSO8_P10_4_OUT,
516 NULL_PTR
517 },
518 {
519 &IfxQspi1_SLSO9_P10_5_OUT,
520 NULL_PTR
521 },
522 {
523 &IfxQspi1_SLSO10_P10_0_OUT,
524 NULL_PTR
525 },
526 {
527 NULL_PTR,
528 NULL_PTR
529 },
530 {
531 NULL_PTR,
532 NULL_PTR
533 },
534 {
535 NULL_PTR,
536 NULL_PTR
537 }
538 },
539 {
540 {
541 &IfxQspi2_SLSO0_P15_2_OUT,
542 NULL_PTR
543 },
544 {
545 &IfxQspi2_SLSO1_P14_2_OUT,
546 NULL_PTR
547 },
548 {
549 &IfxQspi2_SLSO2_P14_6_OUT,
550 NULL_PTR
551 },
552 {
553 &IfxQspi2_SLSO3_P14_3_OUT,
554 NULL_PTR
555 },
556 {
557 &IfxQspi2_SLSO4_P14_7_OUT,
558 NULL_PTR
559 },
560 {
561 &IfxQspi2_SLSO5_P15_1_OUT,
562 NULL_PTR
563 },
564 {
565 &IfxQspi2_SLSO6_P33_13_OUT,
566 NULL_PTR
567 },
568 {
569 &IfxQspi2_SLSO7_P20_10_OUT,
570 NULL_PTR
571 },
572 {
573 &IfxQspi2_SLSO8_P20_6_OUT,
574 NULL_PTR
575 },
576 {
577 &IfxQspi2_SLSO9_P20_3_OUT,
578 NULL_PTR
579 },
580 {
581 NULL_PTR,
582 NULL_PTR
583 },
584 {
585 NULL_PTR,
586 NULL_PTR
587 },
588 {
589 NULL_PTR,
590 NULL_PTR
591 },
592 {
593 NULL_PTR,
594 NULL_PTR
595 }
596 },
597 {
598 {
599 &IfxQspi3_SLSO0_P02_4_OUT,
600 NULL_PTR
601 },
602 {
603 &IfxQspi3_SLSO1_P02_0_OUT,
604 &IfxQspi3_SLSO1_P33_9_OUT
605 },
606 {
607 &IfxQspi3_SLSO2_P02_1_OUT,
608 &IfxQspi3_SLSO2_P33_8_OUT
609 },
610 {
611 &IfxQspi3_SLSO3_P02_2_OUT,
612 NULL_PTR
613 },
614 {
615 &IfxQspi3_SLSO4_P02_3_OUT,
616 &IfxQspi3_SLSO4_P23_5_OUT
617 },
618 {
619 &IfxQspi3_SLSO5_P02_8_OUT,
620 &IfxQspi3_SLSO5_P23_4_OUT
621 },
622 {
623 &IfxQspi3_SLSO6_P00_8_OUT,
624 NULL_PTR
625 },
626 {
627 &IfxQspi3_SLSO7_P00_9_OUT,
628 &IfxQspi3_SLSO7_P33_7_OUT
629 },
630 {
631 &IfxQspi3_SLSO8_P10_5_OUT,
632 NULL_PTR
633 },
634 {
635 NULL_PTR,
636 NULL_PTR
637 },
638 {
639 NULL_PTR,
640 NULL_PTR
641 },
642 {
643 &IfxQspi3_SLSO11_P33_10_OUT,
644 NULL_PTR
645 },
646 {
647 &IfxQspi3_SLSO12_P22_2_OUT,
648 NULL_PTR
649 },
650 {
651 &IfxQspi3_SLSO13_P23_1_OUT,
652 NULL_PTR
653 }
654 }
655 };
IfxQspi1_MTSR_P10_4_OUT
IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT
Definition: IfxQspi_PinMap.c:87
IfxQspi2_SLSO1_P14_2_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT
Definition: IfxQspi_PinMap.c:154
IfxQspi_Mrst_Out
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:96
IfxQspi3_SLSO2_P33_8_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT
Definition: IfxQspi_PinMap.c:170
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:80
IfxQspi3_MRSTB_P10_7_IN
IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN
Definition: IfxQspi_PinMap.c:58
IfxQspi3_SLSO4_P02_3_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT
Definition: IfxQspi_PinMap.c:172
IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:267
IfxQspi2_MRSTCN_P21_2_IN
IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN
Definition: IfxQspi_PinMap.c:54
IfxQspi0_SLSO4_P11_11_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT
Definition: IfxQspi_PinMap.c:136
IfxQspi2_SCLKB_P15_8_IN
IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN
Definition: IfxQspi_PinMap.c:103
IfxQspi3_SLSO4_P23_5_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT
Definition: IfxQspi_PinMap.c:173
IfxQspi0_SLSO1_P20_9_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT
Definition: IfxQspi_PinMap.c:133
IfxQspi3_SLSO8_P10_5_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT
Definition: IfxQspi_PinMap.c:179
Ifx_RxSel_e
Definition: Ifx_Types.h:133
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxQspi2_MRSTE_P15_2_IN
IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN
Definition: IfxQspi_PinMap.c:56
IfxQspi3_SCLKN_P22_0_OUT
IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT
Definition: IfxQspi_PinMap.c:117
IfxQspi3_SLSO11_P33_10_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT
Definition: IfxQspi_PinMap.c:164
IfxQspi3_SLSO0_P02_4_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT
Definition: IfxQspi_PinMap.c:163
IfxQspi3_SLSIA_P02_4_IN
IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN
Definition: IfxQspi_PinMap.c:128
IfxQspi2_MRST_P15_7_OUT
IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT
Definition: IfxQspi_PinMap.c:68
IfxQspi1_SLSO5_P11_2_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT
Definition: IfxQspi_PinMap.c:148
IfxQspi0_SLSO3_P11_10_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT
Definition: IfxQspi_PinMap.c:135
IfxQspi3_SCLKE_P22_3_IN
IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN
Definition: IfxQspi_PinMap.c:107
IfxQspi2_HSICINA_P15_2_IN
IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN
Definition: IfxQspi_PinMap.c:45
IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:272
IfxQspi_Sclk_In
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:72
IfxQspi2_SLSO6_P33_13_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT
Definition: IfxQspi_PinMap.c:159
IfxQspi2_MTSR_P15_6_OUT
IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT
Definition: IfxQspi_PinMap.c:92
IfxQspi2_MRSTB_P15_7_IN
IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN
Definition: IfxQspi_PinMap.c:53
IfxQspi0_SLSO0_P20_8_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT
Definition: IfxQspi_PinMap.c:131
IfxQspi2_SLSIA_P15_2_IN
IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN
Definition: IfxQspi_PinMap.c:126
IfxQspi1_MRST_P10_6_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT
Definition: IfxQspi_PinMap.c:65
IfxQspi3_MRST_P02_5_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT
Definition: IfxQspi_PinMap.c:69
IfxQspi0_SLSO8_P20_6_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT
Definition: IfxQspi_PinMap.c:140
IfxQspi1_SLSO7_P33_5_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT
Definition: IfxQspi_PinMap.c:150
IfxQspi3_SLSO7_P33_7_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT
Definition: IfxQspi_PinMap.c:178
IfxQspi1_SCLKB_P11_6_IN
IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN
Definition: IfxQspi_PinMap.c:101
IfxQspi_Sclk_Out
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:112
IfxQspi3_MTSR_P22_0_OUT
IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT
Definition: IfxQspi_PinMap.c:97
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:121
IfxQspi2_HSICINB_P15_3_IN
IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN
Definition: IfxQspi_PinMap.c:46
IfxQspi2_SCLK_P15_8_OUT
IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT
Definition: IfxQspi_PinMap.c:116
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxQspi3_MRSTE_P22_1_IN
IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN
Definition: IfxQspi_PinMap.c:60
IfxQspi1_SLSO2_P20_13_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT
Definition: IfxQspi_PinMap.c:145
IfxQspi3_SCLK_P02_7_OUT
IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT
Definition: IfxQspi_PinMap.c:119
IfxQspi3_SCLK_P22_3_OUT
IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT
Definition: IfxQspi_PinMap.c:121
IfxQspi3_MRSTD_P33_13_IN
IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN
Definition: IfxQspi_PinMap.c:59
IfxQspi3_MTSRE_P22_0_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN
Definition: IfxQspi_PinMap.c:82
IfxQspi2_SCLK_P15_6_OUT
IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT
Definition: IfxQspi_PinMap.c:115
IfxQspi2_MTSR_P15_5_OUT
IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT
Definition: IfxQspi_PinMap.c:91
IfxQspi0_MTSR_P20_14_OUT
IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT
Definition: IfxQspi_PinMap.c:84
IfxQspi3_SLSO1_P02_0_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT
Definition: IfxQspi_PinMap.c:167
IfxQspi2_SLSO4_P14_7_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT
Definition: IfxQspi_PinMap.c:157
IfxQspi3_SCLKD_P33_11_IN
IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN
Definition: IfxQspi_PinMap.c:106
IfxQspi3_SLSIC_P33_10_IN
IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN
Definition: IfxQspi_PinMap.c:129
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxQspi2_SCLK_P15_3_OUT
IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT
Definition: IfxQspi_PinMap.c:114
IfxQspi2_SLSO9_P20_3_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT
Definition: IfxQspi_PinMap.c:162
IfxQspi1_MRST_P11_3_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT
Definition: IfxQspi_PinMap.c:66
IfxQspi2_SLSO7_P20_10_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT
Definition: IfxQspi_PinMap.c:160
IfxQspi3_MRST_P10_7_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT
Definition: IfxQspi_PinMap.c:70
IfxQspi3_SLSO5_P02_8_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT
Definition: IfxQspi_PinMap.c:174
IfxQspi_Slso_Out
SLSO pin mapping structure.
Definition: IfxQspi_PinMap.h:120
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:125
IfxQspi3_MTSRB_P10_6_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN
Definition: IfxQspi_PinMap.c:80
IfxQspi2_SCLKA_P15_3_IN
IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN
Definition: IfxQspi_PinMap.c:102
IfxQspi3_MRSTA_P02_5_IN
IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN
Definition: IfxQspi_PinMap.c:57
IfxQspi2_MTSRA_P15_5_IN
IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN
Definition: IfxQspi_PinMap.c:77
IfxQspi0_SLSO6_P20_10_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT
Definition: IfxQspi_PinMap.c:138
IFXQSPI_PINMAP_NUM_MODULES
#define IFXQSPI_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxQspi_PinMap.h:265
IfxQspi_Mtsr_Out
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:104
IfxQspi_Mtsr_In
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:64
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:122
IfxQspi3_MRSTFP_P21_3_IN
IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN
Definition: IfxQspi_PinMap.c:62
IfxQspi2_MRSTA_P15_4_IN
IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN
Definition: IfxQspi_PinMap.c:52
IfxQspi3_MTSRP_P22_3_OUT
IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT
Definition: IfxQspi_PinMap.c:94
IfxQspi2_SLSO3_P14_3_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT
Definition: IfxQspi_PinMap.c:156
IfxQspi3_MTSR_P33_12_OUT
IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT
Definition: IfxQspi_PinMap.c:98
IfxQspi3_MRST_P33_13_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT
Definition: IfxQspi_PinMap.c:72
IfxQspi1_MTSR_P11_9_OUT
IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT
Definition: IfxQspi_PinMap.c:88
IfxQspi0_SLSIB_P20_9_IN
IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN
Definition: IfxQspi_PinMap.c:124
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxQspi1_SCLK_P11_6_OUT
IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT
Definition: IfxQspi_PinMap.c:111
IfxQspi1_MTSRB_P11_9_IN
IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN
Definition: IfxQspi_PinMap.c:75
IfxQspi1_MTSR_P10_1_OUT
IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT
Definition: IfxQspi_PinMap.c:85
IfxQspi2_SLSO8_P20_6_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT
Definition: IfxQspi_PinMap.c:161
IfxQspi0_SCLK_P20_11_OUT
IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT
Definition: IfxQspi_PinMap.c:108
IfxQspi2_SCLKN_P13_0_OUT
IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT
Definition: IfxQspi_PinMap.c:112
IfxQspi3_SCLK_P10_8_OUT
IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT
Definition: IfxQspi_PinMap.c:120
IfxQspi3_MTSR_P02_6_OUT
IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT
Definition: IfxQspi_PinMap.c:95
IfxQspi1_SCLKA_P10_2_IN
IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN
Definition: IfxQspi_PinMap.c:100
IfxQspi1_SLSO10_P10_0_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT
Definition: IfxQspi_PinMap.c:143
IfxQspi1_MRST_P10_1_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT
Definition: IfxQspi_PinMap.c:64
IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:269
IfxQspi_Slsi_In_pinTable
const IfxQspi_Slsi_In * IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:395
IfxQspi3_MTSRD_P33_12_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN
Definition: IfxQspi_PinMap.c:81
IfxQspi3_HSICINA_P33_9_IN
IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN
Definition: IfxQspi_PinMap.c:47
IfxQspi3_MRST_P22_1_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT
Definition: IfxQspi_PinMap.c:71
IfxQspi3_SLSO12_P22_2_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT
Definition: IfxQspi_PinMap.c:165
IfxQspi0_SLSO13_P15_0_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT
Definition: IfxQspi_PinMap.c:132
IfxQspi_Mrst_In
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:56
IfxQspi2_MTSRB_P15_6_IN
IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN
Definition: IfxQspi_PinMap.c:78
IfxQspi_Mtsr_In_pinTable
const IfxQspi_Mtsr_In * IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:263
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:123
IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:273
IfxQspi2_SLSO5_P15_1_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT
Definition: IfxQspi_PinMap.c:158
IfxQspi1_SLSO9_P10_5_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT
Definition: IfxQspi_PinMap.c:152
IfxQspi3_MRSTFN_P21_2_IN
IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN
Definition: IfxQspi_PinMap.c:61
IfxQspi2_MTSRP_P13_3_OUT
IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT
Definition: IfxQspi_PinMap.c:90
IfxQspi1_SCLK_P10_2_OUT
IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT
Definition: IfxQspi_PinMap.c:110
IfxQspi3_SCLKB_P10_8_IN
IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN
Definition: IfxQspi_PinMap.c:105
IfxQspi1_SLSO1_P20_9_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT
Definition: IfxQspi_PinMap.c:144
IfxQspi1_MRSTB_P11_3_IN
IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN
Definition: IfxQspi_PinMap.c:51
IfxQspi0_MRST_P20_12_OUT
IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT
Definition: IfxQspi_PinMap.c:63
IfxQspi1_MTSRC_P10_4_IN
IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN
Definition: IfxQspi_PinMap.c:76
IfxQspi1_MRSTA_P10_1_IN
IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN
Definition: IfxQspi_PinMap.c:50
IfxQspi1_SLSO6_P33_10_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT
Definition: IfxQspi_PinMap.c:149
IfxQspi3_SLSO2_P02_1_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT
Definition: IfxQspi_PinMap.c:169
IfxQspi2_MRSTCP_P21_3_IN
IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN
Definition: IfxQspi_PinMap.c:55
IfxQspi3_SLSO6_P00_8_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT
Definition: IfxQspi_PinMap.c:176
Ifx_RxSel_f
Definition: Ifx_Types.h:134
IfxQspi0_SLSO2_P20_13_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT
Definition: IfxQspi_PinMap.c:134
IfxQspi0_SLSIA_P20_13_IN
IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN
Definition: IfxQspi_PinMap.c:123
IfxQspi_Mrst_Out_pinTable
const IfxQspi_Mrst_Out * IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:236
IfxQspi2_SLSO0_P15_2_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT
Definition: IfxQspi_PinMap.c:153
IfxQspi_PinMap.h
QSPI I/O map.
IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:268
IfxQspi0_SCLK_P20_13_OUT
IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT
Definition: IfxQspi_PinMap.c:109
IfxQspi1_SLSO0_P20_8_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT
Definition: IfxQspi_PinMap.c:142
IfxQspi3_MTSRN_P22_2_OUT
IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT
Definition: IfxQspi_PinMap.c:93
IfxQspi1_MTSR_P10_3_OUT
IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT
Definition: IfxQspi_PinMap.c:86
IfxQspi3_SLSO3_P02_2_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT
Definition: IfxQspi_PinMap.c:171
IfxQspi0_SLSO5_P11_2_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT
Definition: IfxQspi_PinMap.c:137
IfxQspi0_MRSTA_P20_12_IN
IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN
Definition: IfxQspi_PinMap.c:49
IfxQspi_Hsicin_In
HSICIN pin mapping structure.
Definition: IfxQspi_PinMap.h:88
IfxQspi3_SLSID_P22_2_IN
IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN
Definition: IfxQspi_PinMap.c:130
IfxQspi1_MTSRA_P10_3_IN
IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN
Definition: IfxQspi_PinMap.c:74
IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:270
IfxQspi0_MTSR_P20_12_OUT
IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT
Definition: IfxQspi_PinMap.c:83
IfxQspi_Sclk_In_pinTable
const IfxQspi_Sclk_In * IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:329
IfxQspi0_SCLKA_P20_11_IN
IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN
Definition: IfxQspi_PinMap.c:99
IfxQspi3_SCLK_P33_11_OUT
IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT
Definition: IfxQspi_PinMap.c:122
IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:274
IfxQspi1_SLSO4_P11_11_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT
Definition: IfxQspi_PinMap.c:147
IfxQspi_Hsicin_In_pinTable
const IfxQspi_Hsicin_In * IfxQspi_Hsicin_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:182
IfxQspi2_SCLKP_P13_1_OUT
IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT
Definition: IfxQspi_PinMap.c:113
IfxQspi_Mrst_In_pinTable
const IfxQspi_Mrst_In * IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:201
IfxQspi0_MTSRA_P20_14_IN
IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN
Definition: IfxQspi_PinMap.c:73
IfxQspi1_SLSO3_P11_10_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT
Definition: IfxQspi_PinMap.c:146
IfxQspi3_SLSO5_P23_4_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT
Definition: IfxQspi_PinMap.c:175
IfxQspi3_HSICINB_P33_10_IN
IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN
Definition: IfxQspi_PinMap.c:48
IfxQspi2_SLSO2_P14_6_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT
Definition: IfxQspi_PinMap.c:155
IfxQspi3_SLSO7_P00_9_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT
Definition: IfxQspi_PinMap.c:177
IfxQspi3_SCLKA_P02_7_IN
IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN
Definition: IfxQspi_PinMap.c:104
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:124
IfxQspi_Slso_Out_pinTable
const IfxQspi_Slso_Out * IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:422
IfxQspi_Sclk_Out_pinTable
const IfxQspi_Sclk_Out * IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:360
IfxQspi0_SLSO9_P20_3_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT
Definition: IfxQspi_PinMap.c:141
IfxQspi3_SLSO1_P33_9_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT
Definition: IfxQspi_PinMap.c:168
IfxQspi2_SLSIB_P15_1_IN
IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN
Definition: IfxQspi_PinMap.c:127
IfxQspi0_SLSO7_P33_5_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT
Definition: IfxQspi_PinMap.c:139
IfxQspi_Mtsr_Out_pinTable
const IfxQspi_Mtsr_Out * IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:294
IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:271
IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:275
IfxQspi1_SLSO8_P10_4_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT
Definition: IfxQspi_PinMap.c:151
IfxQspi3_SLSO13_P23_1_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT
Definition: IfxQspi_PinMap.c:166
IfxQspi3_MTSRA_P02_6_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN
Definition: IfxQspi_PinMap.c:79
IfxQspi2_MRST_P15_4_OUT
IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT
Definition: IfxQspi_PinMap.c:67
IfxQspi3_MTSR_P10_6_OUT
IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT
Definition: IfxQspi_PinMap.c:96
IfxQspi2_MTSRN_P13_2_OUT
IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT
Definition: IfxQspi_PinMap.c:89
IfxQspi3_SCLKP_P22_1_OUT
IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT
Definition: IfxQspi_PinMap.c:118
IfxQspi1_SLSIA_P11_10_IN
IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN
Definition: IfxQspi_PinMap.c:125
IFXQSPI_PINMAP_NUM_SLAVESELECTS
#define IFXQSPI_PINMAP_NUM_SLAVESELECTS
Definition: IfxQspi_PinMap.h:266


iLLD_TC26B: IfxQspi_PinMap.h Source File

  • _PinMap
IfxQspi_PinMap.h
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1 /**
2 * \file IfxQspi_PinMap.h
3 * \brief QSPI I/O map
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Qspi_pinmap QSPI Pin Mapping
42 * \ingroup IfxLld_Qspi
43 */
44
45 #ifndef IFXQSPI_PINMAP_H
46 #define IFXQSPI_PINMAP_H
47
48 #include <IfxQspi_reg.h>
49 #include <_Impl/IfxQspi_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Qspi_pinmap
53 * \{ */
54
55 /** \brief MRST pin mapping structure */
56 typedef const struct
57 {
58 Ifx_QSPI* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel select; /**< \brief Input multiplexer value */
61 } IfxQspi_Mrst_In;
62
63 /** \brief MTSR pin mapping structure */
64 typedef const struct
65 {
66 Ifx_QSPI* module; /**< \brief Base address */
67 IfxPort_Pin pin; /**< \brief Port pin */
68 Ifx_RxSel select; /**< \brief Input multiplexer value */
69 } IfxQspi_Mtsr_In;
70
71 /** \brief SCLK pin mapping structure */
72 typedef const struct
73 {
74 Ifx_QSPI* module; /**< \brief Base address */
75 IfxPort_Pin pin; /**< \brief Port pin */
76 Ifx_RxSel select; /**< \brief Input multiplexer value */
77 } IfxQspi_Sclk_In;
78
79 /** \brief SLSI pin mapping structure */
80 typedef const struct
81 {
82 Ifx_QSPI* module; /**< \brief Base address */
83 IfxPort_Pin pin; /**< \brief Port pin */
84 Ifx_RxSel select; /**< \brief Input multiplexer value */
85 } IfxQspi_Slsi_In;
86
87 /** \brief HSICIN pin mapping structure */
88 typedef const struct
89 {
90 Ifx_QSPI* module; /**< \brief Base address */
91 IfxPort_Pin pin; /**< \brief Port pin */
92 Ifx_RxSel select; /**< \brief Input multiplexer value */
93 } IfxQspi_Hsicin_In;
94
95 /** \brief MRST pin mapping structure */
96 typedef const struct
97 {
98 Ifx_QSPI* module; /**< \brief Base address */
99 IfxPort_Pin pin; /**< \brief Port pin */
100 IfxPort_OutputIdx select; /**< \brief Port control code */
101 } IfxQspi_Mrst_Out;
102
103 /** \brief MTSR pin mapping structure */
104 typedef const struct
105 {
106 Ifx_QSPI* module; /**< \brief Base address */
107 IfxPort_Pin pin; /**< \brief Port pin */
108 IfxPort_OutputIdx select; /**< \brief Port control code */
109 } IfxQspi_Mtsr_Out;
110
111 /** \brief SCLK pin mapping structure */
112 typedef const struct
113 {
114 Ifx_QSPI* module; /**< \brief Base address */
115 IfxPort_Pin pin; /**< \brief Port pin */
116 IfxPort_OutputIdx select; /**< \brief Port control code */
117 } IfxQspi_Sclk_Out;
118
119 /** \brief SLSO pin mapping structure */
120 typedef const struct
121 {
122 Ifx_QSPI* module; /**< \brief Base address */
123 sint32 slsoNr; /**< \brief Slave Select */
124 IfxPort_Pin pin; /**< \brief Port pin */
125 IfxPort_OutputIdx select; /**< \brief Port control code */
126 } IfxQspi_Slso_Out;
127
128 IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN; /**< \brief QSPI2_HSICINA: QSPI2 input */
129 IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN; /**< \brief QSPI2_HSICINB: QSPI2 input */
130 IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN; /**< \brief QSPI3_HSICINA: QSPI3 input */
131 IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN; /**< \brief QSPI3_HSICINB: QSPI3 input */
132 IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN; /**< \brief QSPI0_MRSTA: QSPI0 input */
133 IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN; /**< \brief QSPI1_MRSTA: QSPI1 input */
134 IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN; /**< \brief QSPI1_MRSTB: QSPI1 input */
135 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN; /**< \brief QSPI2_MRSTA: QSPI2 input */
136 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN; /**< \brief QSPI2_MRSTB: QSPI2 input */
137 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN; /**< \brief QSPI2_MRSTCN: QSPI2 input (LVDS) */
138 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN; /**< \brief QSPI2_MRSTCP: QSPI2 input (LVDS) */
139 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN; /**< \brief QSPI2_MRSTE: QSPI2 input */
140 IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN; /**< \brief QSPI3_MRSTA: QSPI3 input */
141 IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN; /**< \brief QSPI3_MRSTB: QSPI3 input */
142 IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN; /**< \brief QSPI3_MRSTD: QSPI3 input */
143 IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN; /**< \brief QSPI3_MRSTE: QSPI3 input */
144 IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN; /**< \brief QSPI3_MRSTFN: QSPI3 input (LVDS) */
145 IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN; /**< \brief QSPI3_MRSTFP: QSPI3 input (LVDS) */
146 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT; /**< \brief QSPI0_MRST: QSPI0 output */
147 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT; /**< \brief QSPI1_MRST: QSPI1 output */
148 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT; /**< \brief QSPI1_MRST: QSPI1 output */
149 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT; /**< \brief QSPI1_MRST: QSPI1 output */
150 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT; /**< \brief QSPI2_MRST: QSPI2 output */
151 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT; /**< \brief QSPI2_MRST: QSPI2 output */
152 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT; /**< \brief QSPI3_MRST: QSPI3 output */
153 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT; /**< \brief QSPI3_MRST: QSPI3 output */
154 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT; /**< \brief QSPI3_MRST: QSPI3 output */
155 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT; /**< \brief QSPI3_MRST: QSPI3 output */
156 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN; /**< \brief QSPI0_MTSRA: QSPI0 input */
157 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN; /**< \brief QSPI1_MTSRA: QSPI1 input */
158 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN; /**< \brief QSPI1_MTSRB: QSPI1 input */
159 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN; /**< \brief QSPI1_MTSRC: QSPI1 input */
160 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN; /**< \brief QSPI2_MTSRA: QSPI2 input */
161 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN; /**< \brief QSPI2_MTSRB: QSPI2 input */
162 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN; /**< \brief QSPI3_MTSRA: QSPI3 input */
163 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN; /**< \brief QSPI3_MTSRB: QSPI3 input */
164 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN; /**< \brief QSPI3_MTSRD: QSPI3 input */
165 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN; /**< \brief QSPI3_MTSRE: QSPI3 input */
166 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT; /**< \brief QSPI0_MTSR: QSPI0 output */
167 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT; /**< \brief QSPI0_MTSR: QSPI0 output */
168 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT; /**< \brief QSPI1_MTSR: QSPI1 output */
169 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT; /**< \brief QSPI1_MTSR: QSPI1 output */
170 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT; /**< \brief QSPI1_MTSR: QSPI1 output */
171 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT; /**< \brief QSPI1_MTSR: QSPI1 output */
172 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT; /**< \brief QSPI2_MTSRN: QSPI2 output (LVDS) */
173 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT; /**< \brief QSPI2_MTSRP: QSPI2 output (LVDS) */
174 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT; /**< \brief QSPI2_MTSR: QSPI2 output */
175 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT; /**< \brief QSPI2_MTSR: QSPI2 output */
176 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT; /**< \brief QSPI3_MTSRN: QSPI3 output (LVDS) */
177 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT; /**< \brief QSPI3_MTSRP: QSPI3 output (LVDS) */
178 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT; /**< \brief QSPI3_MTSR: QSPI3 output */
179 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT; /**< \brief QSPI3_MTSR: QSPI3 output */
180 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT; /**< \brief QSPI3_MTSR: QSPI3 output (LVDS) */
181 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT; /**< \brief QSPI3_MTSR: QSPI3 output */
182 IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN; /**< \brief QSPI0_SCLKA: QSPI0 input */
183 IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN; /**< \brief QSPI1_SCLKA: QSPI1 input */
184 IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN; /**< \brief QSPI1_SCLKB: QSPI1 input */
185 IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN; /**< \brief QSPI2_SCLKA: QSPI2 input */
186 IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN; /**< \brief QSPI2_SCLKB: QSPI2 input */
187 IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN; /**< \brief QSPI3_SCLKA: QSPI3 input */
188 IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN; /**< \brief QSPI3_SCLKB: QSPI3 input */
189 IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN; /**< \brief QSPI3_SCLKD: QSPI3 input */
190 IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN; /**< \brief QSPI3_SCLKE: QSPI3 input */
191 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT; /**< \brief QSPI0_SCLK: QSPI0 output */
192 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT; /**< \brief QSPI0_SCLK: QSPI0 output */
193 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT; /**< \brief QSPI1_SCLK: QSPI1 output */
194 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT; /**< \brief QSPI1_SCLK: QSPI1 output */
195 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT; /**< \brief QSPI2_SCLKN: QSPI2 output (LVDS) */
196 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT; /**< \brief QSPI2_SCLKP: QSPI2 output (LVDS) */
197 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT; /**< \brief QSPI2_SCLK: QSPI2 output */
198 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT; /**< \brief QSPI2_SCLK: QSPI2 output */
199 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT; /**< \brief QSPI2_SCLK: QSPI2 output */
200 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT; /**< \brief QSPI3_SCLKN: QSPI3 output */
201 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT; /**< \brief QSPI3_SCLKP: QSPI3 output (LVDS) */
202 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT; /**< \brief QSPI3_SCLK: QSPI3 output */
203 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT; /**< \brief QSPI3_SCLK: QSPI3 output */
204 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT; /**< \brief QSPI3_SCLK: QSPI3 output */
205 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT; /**< \brief QSPI3_SCLK: QSPI3 output */
206 IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN; /**< \brief QSPI0_SLSIA: QSPI0 input */
207 IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN; /**< \brief QSPI0_SLSIB: QSPI0 input */
208 IFX_EXTERN IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN; /**< \brief QSPI1_SLSIA: QSPI1 input */
209 IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN; /**< \brief QSPI2_SLSIA: QSPI2 input */
210 IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN; /**< \brief QSPI2_SLSIB: QSPI2 input */
211 IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN; /**< \brief QSPI3_SLSIA: QSPI3 input */
212 IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN; /**< \brief QSPI3_SLSIC: QSPI3 input */
213 IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN; /**< \brief QSPI3_SLSID: QSPI3 input */
214 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT; /**< \brief QSPI0_SLSO0: QSPI0 output */
215 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT; /**< \brief QSPI0_SLSO13: QSPI0 output */
216 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT; /**< \brief QSPI0_SLSO1: QSPI0 output */
217 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT; /**< \brief QSPI0_SLSO2: QSPI0 output */
218 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT; /**< \brief QSPI0_SLSO3: QSPI0 output */
219 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT; /**< \brief QSPI0_SLSO4: QSPI0 output */
220 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT; /**< \brief QSPI0_SLSO5: QSPI0 output */
221 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT; /**< \brief QSPI0_SLSO6: QSPI0 output */
222 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT; /**< \brief QSPI0_SLSO7: QSPI0 output */
223 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT; /**< \brief QSPI0_SLSO8: QSPI0 output */
224 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT; /**< \brief QSPI0_SLSO9: QSPI0 output */
225 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT; /**< \brief QSPI1_SLSO0: QSPI1 output */
226 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT; /**< \brief QSPI1_SLSO10: QSPI1 output */
227 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT; /**< \brief QSPI1_SLSO1: QSPI1 output */
228 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT; /**< \brief QSPI1_SLSO2: QSPI1 output */
229 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT; /**< \brief QSPI1_SLSO3: QSPI1 output */
230 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT; /**< \brief QSPI1_SLSO4: QSPI1 output */
231 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT; /**< \brief QSPI1_SLSO5: QSPI1 output */
232 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT; /**< \brief QSPI1_SLSO6: QSPI1 output */
233 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT; /**< \brief QSPI1_SLSO7: QSPI1 output */
234 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT; /**< \brief QSPI1_SLSO8: QSPI1 output */
235 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT; /**< \brief QSPI1_SLSO9: QSPI1 output */
236 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT; /**< \brief QSPI2_SLSO0: QSPI2 output */
237 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT; /**< \brief QSPI2_SLSO1: QSPI2 output */
238 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT; /**< \brief QSPI2_SLSO2: QSPI2 output */
239 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT; /**< \brief QSPI2_SLSO3: QSPI2 output */
240 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT; /**< \brief QSPI2_SLSO4: QSPI2 output */
241 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT; /**< \brief QSPI2_SLSO5: QSPI2 output */
242 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT; /**< \brief QSPI2_SLSO6: QSPI2 output */
243 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT; /**< \brief QSPI2_SLSO7: QSPI2 output */
244 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT; /**< \brief QSPI2_SLSO8: QSPI2 output */
245 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT; /**< \brief QSPI2_SLSO9: QSPI2 output */
246 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT; /**< \brief QSPI3_SLSO0: QSPI3 output */
247 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT; /**< \brief QSPI3_SLSO11: QSPI3 output */
248 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT; /**< \brief QSPI3_SLSO12: QSPI3 output */
249 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT; /**< \brief QSPI3_SLSO13: QSPI3 output */
250 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT; /**< \brief QSPI3_SLSO1: QSPI3 output */
251 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT; /**< \brief QSPI3_SLSO1: QSPI3 output */
252 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT; /**< \brief QSPI3_SLSO2: QSPI3 output */
253 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT; /**< \brief QSPI3_SLSO2: QSPI3 output */
254 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT; /**< \brief QSPI3_SLSO3: QSPI3 output */
255 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT; /**< \brief QSPI3_SLSO4: QSPI3 output */
256 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT; /**< \brief QSPI3_SLSO4: QSPI3 output */
257 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT; /**< \brief QSPI3_SLSO5: QSPI3 output */
258 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT; /**< \brief QSPI3_SLSO5: QSPI3 output */
259 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT; /**< \brief QSPI3_SLSO6: QSPI3 output */
260 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT; /**< \brief QSPI3_SLSO7: QSPI3 output */
261 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT; /**< \brief QSPI3_SLSO7: QSPI3 output */
262 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT; /**< \brief QSPI3_SLSO8: QSPI3 output */
263
264 /** \brief Table dimensions */
265 #define IFXQSPI_PINMAP_NUM_MODULES 4
266 #define IFXQSPI_PINMAP_NUM_SLAVESELECTS 14
267 #define IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS 2
268 #define IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS 6
269 #define IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS 4
270 #define IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS 5
271 #define IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS 6
272 #define IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS 5
273 #define IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS 6
274 #define IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS 4
275 #define IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS 2
276
277
278 /** \brief IfxQspi_Hsicin_In table */
279 IFX_EXTERN const IfxQspi_Hsicin_In *IfxQspi_Hsicin_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS];
280
281 /** \brief IfxQspi_Mrst_In table */
282 IFX_EXTERN const IfxQspi_Mrst_In *IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS];
283
284 /** \brief IfxQspi_Mrst_Out table */
285 IFX_EXTERN const IfxQspi_Mrst_Out *IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS];
286
287 /** \brief IfxQspi_Mtsr_In table */
288 IFX_EXTERN const IfxQspi_Mtsr_In *IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS];
289
290 /** \brief IfxQspi_Mtsr_Out table */
291 IFX_EXTERN const IfxQspi_Mtsr_Out *IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS];
292
293 /** \brief IfxQspi_Sclk_In table */
294 IFX_EXTERN const IfxQspi_Sclk_In *IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS];
295
296 /** \brief IfxQspi_Sclk_Out table */
297 IFX_EXTERN const IfxQspi_Sclk_Out *IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS];
298
299 /** \brief IfxQspi_Slsi_In table */
300 IFX_EXTERN const IfxQspi_Slsi_In *IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS];
301
302 /** \brief IfxQspi_Slso_Out table */
303 IFX_EXTERN const IfxQspi_Slso_Out *IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS];
304
305 /** \} */
306
307 #endif /* IFXQSPI_PINMAP_H */
IfxQspi1_MRSTA_P10_1_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN
QSPI1_MRSTA: QSPI1 input.
Definition: IfxQspi_PinMap.h:133
IfxQspi_Mrst_Out
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:96
IfxQspi2_SCLKP_P13_1_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT
QSPI2_SCLKP: QSPI2 output (LVDS)
Definition: IfxQspi_PinMap.h:196
IfxQspi2_SLSO6_P33_13_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT
QSPI2_SLSO6: QSPI2 output.
Definition: IfxQspi_PinMap.h:242
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:80
IfxQspi3_MTSRN_P22_2_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT
QSPI3_MTSRN: QSPI3 output (LVDS)
Definition: IfxQspi_PinMap.h:176
IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:267
IfxQspi1_SLSO4_P11_11_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT
QSPI1_SLSO4: QSPI1 output.
Definition: IfxQspi_PinMap.h:230
IfxQspi1_MTSR_P10_3_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT
QSPI1_MTSR: QSPI1 output.
Definition: IfxQspi_PinMap.h:169
IfxQspi3_SLSO1_P02_0_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT
QSPI3_SLSO1: QSPI3 output.
Definition: IfxQspi_PinMap.h:250
IfxQspi2_MRSTA_P15_4_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN
QSPI2_MRSTA: QSPI2 input.
Definition: IfxQspi_PinMap.h:135
IfxQspi1_MRST_P10_1_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT
QSPI1_MRST: QSPI1 output.
Definition: IfxQspi_PinMap.h:147
IfxQspi0_SLSO0_P20_8_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT
QSPI0_SLSO0: QSPI0 output.
Definition: IfxQspi_PinMap.h:214
IfxQspi3_SLSO3_P02_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT
QSPI3_SLSO3: QSPI3 output.
Definition: IfxQspi_PinMap.h:254
IfxQspi0_MRSTA_P20_12_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN
QSPI0_MRSTA: QSPI0 input.
Definition: IfxQspi_PinMap.h:132
IfxQspi3_MTSR_P02_6_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT
QSPI3_MTSR: QSPI3 output.
Definition: IfxQspi_PinMap.h:178
IfxQspi3_SLSIA_P02_4_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN
QSPI3_SLSIA: QSPI3 input.
Definition: IfxQspi_PinMap.h:211
IfxQspi0_SCLK_P20_11_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT
QSPI0_SCLK: QSPI0 output.
Definition: IfxQspi_PinMap.h:191
IfxQspi1_SLSO1_P20_9_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT
QSPI1_SLSO1: QSPI1 output.
Definition: IfxQspi_PinMap.h:227
IfxQspi0_MTSRA_P20_14_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN
QSPI0_MTSRA: QSPI0 input.
Definition: IfxQspi_PinMap.h:156
IfxQspi2_SLSO2_P14_6_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT
QSPI2_SLSO2: QSPI2 output.
Definition: IfxQspi_PinMap.h:238
IfxQspi_Mrst_In_pinTable
IFX_EXTERN const IfxQspi_Mrst_In * IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]
IfxQspi_Mrst_In table.
Definition: IfxQspi_PinMap.h:282
IfxQspi0_SLSO8_P20_6_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT
QSPI0_SLSO8: QSPI0 output.
Definition: IfxQspi_PinMap.h:223
IfxQspi3_SLSO8_P10_5_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT
QSPI3_SLSO8: QSPI3 output.
Definition: IfxQspi_PinMap.h:262
IfxQspi1_MTSRC_P10_4_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN
QSPI1_MTSRC: QSPI1 input.
Definition: IfxQspi_PinMap.h:159
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxQspi_Mrst_Out_pinTable
IFX_EXTERN const IfxQspi_Mrst_Out * IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
IfxQspi_Mrst_Out table.
Definition: IfxQspi_PinMap.h:285
IfxQspi3_HSICINB_P33_10_IN
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN
QSPI3_HSICINB: QSPI3 input.
Definition: IfxQspi_PinMap.h:131
IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:272
IfxQspi3_MRSTD_P33_13_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN
QSPI3_MRSTD: QSPI3 input.
Definition: IfxQspi_PinMap.h:142
IfxQspi_Sclk_In
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:72
IfxQspi3_MRSTFN_P21_2_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN
QSPI3_MRSTFN: QSPI3 input (LVDS)
Definition: IfxQspi_PinMap.h:144
IfxQspi2_MTSRB_P15_6_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN
QSPI2_MTSRB: QSPI2 input.
Definition: IfxQspi_PinMap.h:161
IfxQspi3_MRST_P33_13_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT
QSPI3_MRST: QSPI3 output.
Definition: IfxQspi_PinMap.h:155
IfxQspi2_HSICINB_P15_3_IN
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN
QSPI2_HSICINB: QSPI2 input.
Definition: IfxQspi_PinMap.h:129
IfxQspi1_SCLK_P11_6_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT
QSPI1_SCLK: QSPI1 output.
Definition: IfxQspi_PinMap.h:194
IfxQspi0_SLSO4_P11_11_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT
QSPI0_SLSO4: QSPI0 output.
Definition: IfxQspi_PinMap.h:219
IfxQspi3_MTSRA_P02_6_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN
QSPI3_MTSRA: QSPI3 input.
Definition: IfxQspi_PinMap.h:162
IfxQspi3_MTSR_P33_12_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT
QSPI3_MTSR: QSPI3 output.
Definition: IfxQspi_PinMap.h:181
IfxQspi1_MTSR_P11_9_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT
QSPI1_MTSR: QSPI1 output.
Definition: IfxQspi_PinMap.h:171
IfxQspi_Sclk_Out
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:112
IfxQspi3_HSICINA_P33_9_IN
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN
QSPI3_HSICINA: QSPI3 input.
Definition: IfxQspi_PinMap.h:130
IfxQspi1_SLSO9_P10_5_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT
QSPI1_SLSO9: QSPI1 output.
Definition: IfxQspi_PinMap.h:235
IfxQspi2_SCLKB_P15_8_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN
QSPI2_SCLKB: QSPI2 input.
Definition: IfxQspi_PinMap.h:186
IfxQspi3_SCLK_P22_3_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT
QSPI3_SCLK: QSPI3 output.
Definition: IfxQspi_PinMap.h:204
IfxQspi1_SLSO7_P33_5_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT
QSPI1_SLSO7: QSPI1 output.
Definition: IfxQspi_PinMap.h:233
IfxQspi2_HSICINA_P15_2_IN
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN
QSPI2_HSICINA: QSPI2 input.
Definition: IfxQspi_PinMap.h:128
IfxQspi3_SCLKB_P10_8_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN
QSPI3_SCLKB: QSPI3 input.
Definition: IfxQspi_PinMap.h:188
IfxQspi2_MRSTB_P15_7_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN
QSPI2_MRSTB: QSPI2 input.
Definition: IfxQspi_PinMap.h:136
IfxQspi_Mtsr_Out_pinTable
IFX_EXTERN const IfxQspi_Mtsr_Out * IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]
IfxQspi_Mtsr_Out table.
Definition: IfxQspi_PinMap.h:291
IfxQspi3_SLSO1_P33_9_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT
QSPI3_SLSO1: QSPI3 output.
Definition: IfxQspi_PinMap.h:251
IfxQspi3_SLSO2_P33_8_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT
QSPI3_SLSO2: QSPI3 output.
Definition: IfxQspi_PinMap.h:253
IfxQspi3_MRSTB_P10_7_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN
QSPI3_MRSTB: QSPI3 input.
Definition: IfxQspi_PinMap.h:141
IfxQspi0_SLSO2_P20_13_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT
QSPI0_SLSO2: QSPI0 output.
Definition: IfxQspi_PinMap.h:217
IfxQspi1_SLSO6_P33_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT
QSPI1_SLSO6: QSPI1 output.
Definition: IfxQspi_PinMap.h:232
IfxQspi_Slso_Out_pinTable
IFX_EXTERN const IfxQspi_Slso_Out * IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxQspi_Slso_Out table.
Definition: IfxQspi_PinMap.h:303
IfxQspi_Hsicin_In_pinTable
IFX_EXTERN const IfxQspi_Hsicin_In * IfxQspi_Hsicin_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS]
IfxQspi_Hsicin_In table.
Definition: IfxQspi_PinMap.h:279
IfxQspi3_MRSTA_P02_5_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN
QSPI3_MRSTA: QSPI3 input.
Definition: IfxQspi_PinMap.h:140
IfxQspi3_MTSRB_P10_6_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN
QSPI3_MTSRB: QSPI3 input.
Definition: IfxQspi_PinMap.h:163
IfxQspi2_SLSIA_P15_2_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN
QSPI2_SLSIA: QSPI2 input.
Definition: IfxQspi_PinMap.h:209
IfxQspi2_MRSTCP_P21_3_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN
QSPI2_MRSTCP: QSPI2 input (LVDS)
Definition: IfxQspi_PinMap.h:138
IfxQspi_Mrst_In::module
Ifx_QSPI * module
Base address.
Definition: IfxQspi_PinMap.h:58
IfxQspi3_SCLKD_P33_11_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN
QSPI3_SCLKD: QSPI3 input.
Definition: IfxQspi_PinMap.h:189
IfxQspi1_MRSTB_P11_3_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN
QSPI1_MRSTB: QSPI1 input.
Definition: IfxQspi_PinMap.h:134
IfxQspi2_SCLK_P15_8_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT
QSPI2_SCLK: QSPI2 output.
Definition: IfxQspi_PinMap.h:199
IfxQspi3_SLSO7_P33_7_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT
QSPI3_SLSO7: QSPI3 output.
Definition: IfxQspi_PinMap.h:261
IfxQspi_Mrst_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxQspi_PinMap.h:60
IfxQspi_Slso_Out
SLSO pin mapping structure.
Definition: IfxQspi_PinMap.h:120
IfxQspi2_SLSO8_P20_6_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT
QSPI2_SLSO8: QSPI2 output.
Definition: IfxQspi_PinMap.h:244
IfxQspi0_SCLK_P20_13_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT
QSPI0_SCLK: QSPI0 output.
Definition: IfxQspi_PinMap.h:192
IfxQspi1_SLSO5_P11_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT
QSPI1_SLSO5: QSPI1 output.
Definition: IfxQspi_PinMap.h:231
IfxQspi0_SLSIB_P20_9_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN
QSPI0_SLSIB: QSPI0 input.
Definition: IfxQspi_PinMap.h:207
IfxQspi3_SLSO6_P00_8_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT
QSPI3_SLSO6: QSPI3 output.
Definition: IfxQspi_PinMap.h:259
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFXQSPI_PINMAP_NUM_MODULES
#define IFXQSPI_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxQspi_PinMap.h:265
IfxQspi_Mtsr_Out
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:104
IfxQspi3_MRSTE_P22_1_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN
QSPI3_MRSTE: QSPI3 input.
Definition: IfxQspi_PinMap.h:143
IfxQspi0_SLSO9_P20_3_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT
QSPI0_SLSO9: QSPI0 output.
Definition: IfxQspi_PinMap.h:224
IfxQspi_Mtsr_In
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:64
IfxQspi2_MTSRN_P13_2_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT
QSPI2_MTSRN: QSPI2 output (LVDS)
Definition: IfxQspi_PinMap.h:172
IfxQspi_Mrst_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxQspi_PinMap.h:100
IfxQspi0_MTSR_P20_14_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT
QSPI0_MTSR: QSPI0 output.
Definition: IfxQspi_PinMap.h:167
IfxQspi3_SLSO5_P02_8_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT
QSPI3_SLSO5: QSPI3 output.
Definition: IfxQspi_PinMap.h:257
IfxQspi3_SLSO4_P23_5_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT
QSPI3_SLSO4: QSPI3 output.
Definition: IfxQspi_PinMap.h:256
IfxQspi1_SCLKB_P11_6_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN
QSPI1_SCLKB: QSPI1 input.
Definition: IfxQspi_PinMap.h:184
IfxQspi3_MTSR_P10_6_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT
QSPI3_MTSR: QSPI3 output.
Definition: IfxQspi_PinMap.h:179
IfxQspi1_SLSO3_P11_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT
QSPI1_SLSO3: QSPI1 output.
Definition: IfxQspi_PinMap.h:229
IfxQspi2_SCLK_P15_6_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT
QSPI2_SCLK: QSPI2 output.
Definition: IfxQspi_PinMap.h:198
IfxQspi_Mrst_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxQspi_PinMap.h:59
IfxQspi0_SLSO13_P15_0_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT
QSPI0_SLSO13: QSPI0 output.
Definition: IfxQspi_PinMap.h:215
IfxQspi0_SLSO7_P33_5_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT
QSPI0_SLSO7: QSPI0 output.
Definition: IfxQspi_PinMap.h:222
IfxQspi0_SLSO6_P20_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT
QSPI0_SLSO6: QSPI0 output.
Definition: IfxQspi_PinMap.h:221
IfxQspi1_MTSR_P10_1_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT
QSPI1_MTSR: QSPI1 output.
Definition: IfxQspi_PinMap.h:168
IfxQspi2_SCLK_P15_3_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT
QSPI2_SCLK: QSPI2 output.
Definition: IfxQspi_PinMap.h:197
IfxQspi3_SCLKP_P22_1_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT
QSPI3_SCLKP: QSPI3 output (LVDS)
Definition: IfxQspi_PinMap.h:201
IfxQspi0_SLSO1_P20_9_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT
QSPI0_SLSO1: QSPI0 output.
Definition: IfxQspi_PinMap.h:216
IfxQspi3_MRST_P02_5_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT
QSPI3_MRST: QSPI3 output.
Definition: IfxQspi_PinMap.h:152
IfxQspi3_MRST_P22_1_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT
QSPI3_MRST: QSPI3 output.
Definition: IfxQspi_PinMap.h:154
IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:269
IfxQspi_Mtsr_In_pinTable
IFX_EXTERN const IfxQspi_Mtsr_In * IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]
IfxQspi_Mtsr_In table.
Definition: IfxQspi_PinMap.h:288
IfxQspi3_SLSO5_P23_4_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT
QSPI3_SLSO5: QSPI3 output.
Definition: IfxQspi_PinMap.h:258
IfxQspi1_MTSRB_P11_9_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN
QSPI1_MTSRB: QSPI1 input.
Definition: IfxQspi_PinMap.h:158
IfxQspi2_MTSR_P15_6_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT
QSPI2_MTSR: QSPI2 output.
Definition: IfxQspi_PinMap.h:175
IfxQspi_Mrst_In
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:56
IfxQspi3_SLSO7_P00_9_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT
QSPI3_SLSO7: QSPI3 output.
Definition: IfxQspi_PinMap.h:260
IfxQspi3_SLSID_P22_2_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN
QSPI3_SLSID: QSPI3 input.
Definition: IfxQspi_PinMap.h:213
IfxQspi0_SCLKA_P20_11_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN
QSPI0_SCLKA: QSPI0 input.
Definition: IfxQspi_PinMap.h:182
IfxQspi3_SLSO12_P22_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT
QSPI3_SLSO12: QSPI3 output.
Definition: IfxQspi_PinMap.h:248
IfxQspi0_SLSO5_P11_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT
QSPI0_SLSO5: QSPI0 output.
Definition: IfxQspi_PinMap.h:220
IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:273
IfxQspi2_SLSO4_P14_7_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT
QSPI2_SLSO4: QSPI2 output.
Definition: IfxQspi_PinMap.h:240
IfxQspi1_MTSR_P10_4_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT
QSPI1_MTSR: QSPI1 output.
Definition: IfxQspi_PinMap.h:170
IfxQspi0_SLSO3_P11_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT
QSPI0_SLSO3: QSPI0 output.
Definition: IfxQspi_PinMap.h:218
IfxQspi1_SLSO8_P10_4_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT
QSPI1_SLSO8: QSPI1 output.
Definition: IfxQspi_PinMap.h:234
IfxQspi1_SLSO0_P20_8_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT
QSPI1_SLSO0: QSPI1 output.
Definition: IfxQspi_PinMap.h:225
IfxQspi1_SCLK_P10_2_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT
QSPI1_SCLK: QSPI1 output.
Definition: IfxQspi_PinMap.h:193
IfxQspi3_SCLK_P02_7_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT
QSPI3_SCLK: QSPI3 output.
Definition: IfxQspi_PinMap.h:202
IfxQspi3_SLSO0_P02_4_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT
QSPI3_SLSO0: QSPI3 output.
Definition: IfxQspi_PinMap.h:246
IfxQspi2_MTSRP_P13_3_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT
QSPI2_MTSRP: QSPI2 output (LVDS)
Definition: IfxQspi_PinMap.h:173
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxQspi2_MTSRA_P15_5_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN
QSPI2_MTSRA: QSPI2 input.
Definition: IfxQspi_PinMap.h:160
IfxQspi_Sclk_Out_pinTable
IFX_EXTERN const IfxQspi_Sclk_Out * IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxQspi_Sclk_Out table.
Definition: IfxQspi_PinMap.h:297
IfxQspi2_SLSO7_P20_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT
QSPI2_SLSO7: QSPI2 output.
Definition: IfxQspi_PinMap.h:243
IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:268
IfxQspi3_MTSRP_P22_3_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT
QSPI3_MTSRP: QSPI3 output (LVDS)
Definition: IfxQspi_PinMap.h:177
IfxQspi1_SLSO2_P20_13_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT
QSPI1_SLSO2: QSPI1 output.
Definition: IfxQspi_PinMap.h:228
IfxQspi2_SCLKN_P13_0_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT
QSPI2_SCLKN: QSPI2 output (LVDS)
Definition: IfxQspi_PinMap.h:195
sint32
long sint32
Definition: Platform_Types.h:134
IfxQspi2_MTSR_P15_5_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT
QSPI2_MTSR: QSPI2 output.
Definition: IfxQspi_PinMap.h:174
IfxQspi_Hsicin_In
HSICIN pin mapping structure.
Definition: IfxQspi_PinMap.h:88
IfxQspi3_MTSRE_P22_0_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN
QSPI3_MTSRE: QSPI3 input.
Definition: IfxQspi_PinMap.h:165
IfxQspi0_MTSR_P20_12_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT
QSPI0_MTSR: QSPI0 output.
Definition: IfxQspi_PinMap.h:166
IfxQspi_Sclk_In_pinTable
IFX_EXTERN const IfxQspi_Sclk_In * IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]
IfxQspi_Sclk_In table.
Definition: IfxQspi_PinMap.h:294
IfxQspi3_SLSIC_P33_10_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN
QSPI3_SLSIC: QSPI3 input.
Definition: IfxQspi_PinMap.h:212
IfxQspi3_SCLK_P33_11_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT
QSPI3_SCLK: QSPI3 output.
Definition: IfxQspi_PinMap.h:205
IfxQspi2_SLSO1_P14_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT
QSPI2_SLSO1: QSPI2 output.
Definition: IfxQspi_PinMap.h:237
IfxQspi3_MRSTFP_P21_3_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN
QSPI3_MRSTFP: QSPI3 input (LVDS)
Definition: IfxQspi_PinMap.h:145
IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:270
IfxQspi2_SLSO9_P20_3_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT
QSPI2_SLSO9: QSPI2 output.
Definition: IfxQspi_PinMap.h:245
IfxQspi1_SCLKA_P10_2_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN
QSPI1_SCLKA: QSPI1 input.
Definition: IfxQspi_PinMap.h:183
IfxQspi2_MRSTCN_P21_2_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN
QSPI2_MRSTCN: QSPI2 input (LVDS)
Definition: IfxQspi_PinMap.h:137
IfxQspi0_MRST_P20_12_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT
QSPI0_MRST: QSPI0 output.
Definition: IfxQspi_PinMap.h:146
IfxQspi3_SLSO4_P02_3_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT
QSPI3_SLSO4: QSPI3 output.
Definition: IfxQspi_PinMap.h:255
IfxQspi_cfg.h
QSPI on-chip implementation data.
IfxQspi2_SLSO0_P15_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT
QSPI2_SLSO0: QSPI2 output.
Definition: IfxQspi_PinMap.h:236
IfxQspi3_SLSO2_P02_1_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT
QSPI3_SLSO2: QSPI3 output.
Definition: IfxQspi_PinMap.h:252
IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:274
IfxQspi2_SLSIB_P15_1_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN
QSPI2_SLSIB: QSPI2 input.
Definition: IfxQspi_PinMap.h:210
IfxQspi3_SCLK_P10_8_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT
QSPI3_SCLK: QSPI3 output.
Definition: IfxQspi_PinMap.h:203
IfxQspi3_MTSR_P22_0_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT
QSPI3_MTSR: QSPI3 output (LVDS)
Definition: IfxQspi_PinMap.h:180
IfxQspi3_MTSRD_P33_12_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN
QSPI3_MTSRD: QSPI3 input.
Definition: IfxQspi_PinMap.h:164
IfxQspi1_SLSO10_P10_0_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT
QSPI1_SLSO10: QSPI1 output.
Definition: IfxQspi_PinMap.h:226
IfxQspi1_MRST_P10_6_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT
QSPI1_MRST: QSPI1 output.
Definition: IfxQspi_PinMap.h:148
IfxQspi1_MRST_P11_3_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT
QSPI1_MRST: QSPI1 output.
Definition: IfxQspi_PinMap.h:149
IfxQspi2_MRSTE_P15_2_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN
QSPI2_MRSTE: QSPI2 input.
Definition: IfxQspi_PinMap.h:139
IfxQspi3_SLSO11_P33_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT
QSPI3_SLSO11: QSPI3 output.
Definition: IfxQspi_PinMap.h:247
IfxQspi1_MTSRA_P10_3_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN
QSPI1_MTSRA: QSPI1 input.
Definition: IfxQspi_PinMap.h:157
IfxQspi1_SLSIA_P11_10_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN
QSPI1_SLSIA: QSPI1 input.
Definition: IfxQspi_PinMap.h:208
IfxQspi2_SLSO5_P15_1_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT
QSPI2_SLSO5: QSPI2 output.
Definition: IfxQspi_PinMap.h:241
IfxQspi2_SLSO3_P14_3_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT
QSPI2_SLSO3: QSPI2 output.
Definition: IfxQspi_PinMap.h:239
IfxQspi2_MRST_P15_7_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT
QSPI2_MRST: QSPI2 output.
Definition: IfxQspi_PinMap.h:151
IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:271
IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:275
IfxQspi0_SLSIA_P20_13_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN
QSPI0_SLSIA: QSPI0 input.
Definition: IfxQspi_PinMap.h:206
IfxQspi_Slso_Out::slsoNr
sint32 slsoNr
Slave Select.
Definition: IfxQspi_PinMap.h:123
IfxQspi3_SCLKN_P22_0_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT
QSPI3_SCLKN: QSPI3 output.
Definition: IfxQspi_PinMap.h:200
IfxQspi2_MRST_P15_4_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT
QSPI2_MRST: QSPI2 output.
Definition: IfxQspi_PinMap.h:150
IfxQspi_Slsi_In_pinTable
IFX_EXTERN const IfxQspi_Slsi_In * IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
IfxQspi_Slsi_In table.
Definition: IfxQspi_PinMap.h:300
IfxQspi3_SCLKA_P02_7_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN
QSPI3_SCLKA: QSPI3 input.
Definition: IfxQspi_PinMap.h:187
IfxQspi3_MRST_P10_7_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT
QSPI3_MRST: QSPI3 output.
Definition: IfxQspi_PinMap.h:153
IfxQspi3_SLSO13_P23_1_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT
QSPI3_SLSO13: QSPI3 output.
Definition: IfxQspi_PinMap.h:249
IfxQspi2_SCLKA_P15_3_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN
QSPI2_SCLKA: QSPI2 input.
Definition: IfxQspi_PinMap.h:185
IfxPort.h
PORT basic functionality.
IFXQSPI_PINMAP_NUM_SLAVESELECTS
#define IFXQSPI_PINMAP_NUM_SLAVESELECTS
Definition: IfxQspi_PinMap.h:266
IfxQspi3_SCLKE_P22_3_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN
QSPI3_SCLKE: QSPI3 input.
Definition: IfxQspi_PinMap.h:190


iLLD_TC26B: IfxQspi_SpiMaster.c Source File

  • Qspi
  • SpiMaster
IfxQspi_SpiMaster.c
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_SpiMaster.c
3 * \brief QSPI SPIMASTER details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxQspi_SpiMaster.h"
49
50 /** \addtogroup IfxLld_Qspi_SpiMaster_Channel
51 * \{ */
52
53 /******************************************************************************/
54 /*-----------------------Private Function Prototypes--------------------------*/
55 /******************************************************************************/
56
57 /** \brief Gets current active channel
58 * \param handle Module handle
59 * \return current active channel
60 */
61 IFX_STATIC IfxQspi_SpiMaster_Channel *IfxQspi_SpiMaster_activeChannel(IfxQspi_SpiMaster *handle);
62
63 /** \} */
64
65 /** \addtogroup IfxLld_Qspi_SpiMaster_Support
66 * \{ */
67
68 /******************************************************************************/
69 /*-----------------------Private Function Prototypes--------------------------*/
70 /******************************************************************************/
71
72 /** \brief Active the SLSO pin.
73 * \param chHandle Module Channel handle
74 * \return None
75 */
76 IFX_STATIC void IfxQspi_SpiMaster_activateSlso(IfxQspi_SpiMaster_Channel *chHandle);
77
78 /** \brief Deactive the SLSO pin.
79 * \param chHandle Module Channel handle
80 * \return None
81 */
82 IFX_STATIC void IfxQspi_SpiMaster_deactivateSlso(IfxQspi_SpiMaster_Channel *chHandle);
83
84 /** \brief Locks the transfer and gets the current status of it.
85 * \param handle Module handle
86 * \return SpiIf_Status_ok if sending is done otherwise SpiIf_Status_busy.
87 */
88 IFX_STATIC SpiIf_Status IfxQspi_SpiMaster_lock(IfxQspi_SpiMaster *handle);
89
90 /** \brief Reads data from the Rx FIFO
91 * \param chHandle Module Channel handle
92 * \return None
93 */
94 IFX_STATIC void IfxQspi_SpiMaster_read(IfxQspi_SpiMaster_Channel *chHandle);
95
96 /** \brief Unlocks the transfers
97 * \param handle Module handle
98 * \return None
99 */
100 IFX_STATIC void IfxQspi_SpiMaster_unlock(IfxQspi_SpiMaster *handle);
101
102 /** \brief Writes data into the Tx FIFO
103 * \param chHandle Module Channel handle
104 * \return None
105 */
106 IFX_STATIC void IfxQspi_SpiMaster_write(IfxQspi_SpiMaster_Channel *chHandle);
107
108 /** \brief Writes Long/xxl data into the Tx FIFO
109 * \param chHandle Module Channel handle
110 * \return None
111 */
112 IFX_STATIC void IfxQspi_SpiMaster_writeLong(IfxQspi_SpiMaster_Channel *chHandle);
113
114 /** \} */
115
116 /******************************************************************************/
117 /*-------------------------Function Implementations---------------------------*/
118 /******************************************************************************/
119
120 IFX_STATIC void IfxQspi_SpiMaster_activateSlso(IfxQspi_SpiMaster_Channel *chHandle)
121 {
122 IfxPort_State action = (chHandle->slsoActiveState == Ifx_ActiveState_low) ? IfxPort_State_low : IfxPort_State_high;
123 IfxPort_setPinState(chHandle->slso.port, chHandle->slso.pinIndex, action);
124 }
125
126
127 IFX_STATIC IfxQspi_SpiMaster_Channel *IfxQspi_SpiMaster_activeChannel(IfxQspi_SpiMaster *handle)
128 {
129 return (IfxQspi_SpiMaster_Channel *)handle->base.activeChannel;
130 }
131
132
133 IFX_STATIC void IfxQspi_SpiMaster_deactivateSlso(IfxQspi_SpiMaster_Channel *chHandle)
134 {
135 IfxPort_State action = (chHandle->slsoActiveState == Ifx_ActiveState_low) ? IfxPort_State_high : IfxPort_State_low;
136 IfxPort_setPinState(chHandle->slso.port, chHandle->slso.pinIndex, action);
137 }
138
139
140 SpiIf_Status IfxQspi_SpiMaster_exchange(IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
141 {
142 IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver;
143 SpiIf_Status status = IfxQspi_SpiMaster_lock(handle);
144
145 if (status == SpiIf_Status_ok)
146 {
147 /* initiate transfer when resource is free */
148 handle->base.activeChannel = &chHandle->base;
149 chHandle->base.flags.onTransfer = 1;
150 chHandle->base.tx.data = (void *)src;
151 chHandle->base.tx.remaining = count;
152 chHandle->firstWrite = TRUE;
153 chHandle->base.rx.data = dest;
154 chHandle->base.rx.remaining = count;
155
156 if (chHandle->activateSlso != NULL_PTR)
157 {
158 chHandle->activateSlso(chHandle);
159 }
160
161 if ((chHandle->mode == IfxQspi_SpiMaster_Mode_long) ||
162 (chHandle->mode == IfxQspi_SpiMaster_Mode_longContinuous))
163 {
164 IfxQspi_SpiMaster_writeLong((IfxQspi_SpiMaster_Channel *)chHandle);
165 }
166 else if (chHandle->mode == IfxQspi_SpiMaster_Mode_xxl)
167 {
168 handle->qspi->XXLCON.B.XDL = count - 1;
169 IfxQspi_SpiMaster_writeLong((IfxQspi_SpiMaster_Channel *)chHandle);
170 }
171 else
172 {
173 /* chHandle->mode == IfxQspi_SpiMaster_Mode_ShortCont*/
174 chHandle->base.txHandler(handle->base.activeChannel);
175 }
176 }
177
178 return status;
179 }
180
181
182 SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig(IfxQspi_SpiMaster_Channel *chHandle)
183 {
184 {
185 SpiIf_ChConfig chConfig;
186 IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver->driver;
187 Ifx_QSPI *qspiSFR = handle->qspi;
188 Ifx_QSPI_ECON econ;
189 econ.U = qspiSFR->ECON[chHandle->channelId % 8].U;
190
191 chConfig.baudrate = IfxQspi_calcRealBaudrate(qspiSFR, (IfxQspi_ChannelId)(chHandle->channelId % 8));
192 chConfig.driver = chHandle->base.driver;
193 chConfig.errorChecks.baudrate = 0;
194 chConfig.errorChecks.phase = 0;
195 chConfig.errorChecks.receive = 0;
196 chConfig.errorChecks.reserved = 0;
197 chConfig.errorChecks.transmit = 0;
198 chConfig.mode.autoCS = (chHandle->activateSlso == NULL_PTR) && (chHandle->deactivateSlso == NULL_PTR);
199 chConfig.mode.clockPolarity = econ.B.CPOL == 0 ? SpiIf_ClockPolarity_idleLow : SpiIf_ClockPolarity_idleHigh;
200 chConfig.mode.csActiveLevel = chHandle->slsoActiveState;
201 chConfig.mode.csInactiveDelay = chHandle->bacon.B.IDLE;
202 chConfig.mode.csLeadDelay = chHandle->bacon.B.LEAD;
203 chConfig.mode.csTrailDelay = chHandle->bacon.B.TRAIL;
204 chConfig.mode.dataHeading = chHandle->bacon.B.MSB == 0 ? SpiIf_DataHeading_lsbFirst : SpiIf_DataHeading_msbFirst;
205 chConfig.mode.dataWidth = chHandle->bacon.B.DL + 1;
206 chConfig.mode.enabled = 0;
207 chConfig.mode.loopback = qspiSFR->GLOBALCON.B.LB;
208 chConfig.mode.parityCheck = econ.B.PAREN;
209 chConfig.mode.parityMode = chHandle->bacon.B.PARTYP == 0 ? Ifx_ParityMode_even : Ifx_ParityMode_odd;
210 chConfig.mode.shiftClock = econ.B.CPH == 1 ? SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge : SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge;
211
212 return chConfig;
213 }
214 }
215
216
217 SpiIf_Status IfxQspi_SpiMaster_getStatus(IfxQspi_SpiMaster_Channel *chHandle)
218 {
219 SpiIf_Status status = SpiIf_Status_ok;
220
221 if ((chHandle->base.flags.onTransfer != 0) || (chHandle->base.driver->sending != 0))
222 {
223 status = SpiIf_Status_busy;
224 }
225
226 return status;
227 }
228
229
230 SpiIf_Status IfxQspi_SpiMaster_initChannel(IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
231 {
232 IfxQspi_SpiMaster *handle = chConfig->base.driver->driver;
233 Ifx_QSPI *qspiSFR = handle->qspi;
234
235 chHandle->base.driver = chConfig->base.driver;
236 chHandle->base.flags.onTransfer = FALSE;
237 chHandle->channelBasedCs = chConfig->channelBasedCs;
238 chHandle->mode = chConfig->mode;
239
240 chHandle->dummyTxValue = chConfig->dummyTxValue;
241 chHandle->dummyRxValue = chConfig->dummyRxValue;
242
243 //Loop back configuration.
244 uint32 loopback = chConfig->base.mode.loopback;
245 qspiSFR->GLOBALCON.B.LB = loopback;
246
247 /* chip-select output pin */
248 const IfxQspi_SpiMaster_Output *slso = &(chConfig->sls.output);
249
250 if ((loopback == 1) && (slso->pin == NULL_PTR)) /* if loopback is enabled && no pin is specified */
251 {
252 chHandle->channelId = (IfxQspi_ChannelId)0; /* select 0 as default, if not specified */
253 }
254 else /* not loop back - pin must be configured */
255 {
256 chHandle->channelId = (IfxQspi_ChannelId)chConfig->sls.output.pin->slsoNr;
257 }
258
259 uint8 cs = chHandle->channelId % 8;
260
261 {
262 /* assert warning if desired baud rate is more than max baud rate */
263 IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, handle->maximumBaudrate > chConfig->base.baudrate);
264
265 qspiSFR->ECON[cs].U = IfxQspi_calculateExtendedConfigurationValue(qspiSFR, cs, &chConfig->base);
266 chHandle->bacon.U = IfxQspi_calculateBasicConfigurationValue(qspiSFR, chHandle->channelId, &chConfig->base.mode, chConfig->base.baudrate);
267
268 { /* QSPI chip-select line */
269 uint32 mask = 1U << chHandle->channelId;
270 uint32 oen = mask << 16;
271 uint32 aol = (((chConfig->base.mode.csActiveLevel == Ifx_ActiveState_low) ? 0 : 1) << chHandle->channelId);
272 __ldmst(&qspiSFR->SSOC.U, (mask | (mask << 16)), (aol | oen));
273 }
274 }
275 chHandle->base.baudrate = IfxQspi_calcRealBaudrate(qspiSFR, (IfxQspi_ChannelId)(chHandle->bacon.B.CS & 0x7U));
276
277 /* Select the chip select activate and de-activate functions */
278 if (slso->pin == NULL_PTR)
279 {
280 chHandle->activateSlso = NULL_PTR;
281 chHandle->deactivateSlso = NULL_PTR;
282 }
283 else
284 {
285 chHandle->slso = slso->pin->pin;
286 chHandle->slsoActiveState = (Ifx_ActiveState)chConfig->base.mode.csActiveLevel;
287
288 if (!chConfig->base.mode.autoCS)
289 {
290 chHandle->activateSlso = &IfxQspi_SpiMaster_activateSlso;
291 chHandle->deactivateSlso = &IfxQspi_SpiMaster_deactivateSlso;
292
293 /** - Override the SLSO manually as general-purpose output */
294 chHandle->deactivateSlso(chHandle);
295 IfxQspi_initSlso(slso->pin, chConfig->sls.output.mode, chConfig->sls.output.driver, IfxPort_OutputIdx_general);
296 }
297 else
298 {
299 chHandle->activateSlso = NULL_PTR;
300 chHandle->deactivateSlso = NULL_PTR;
301 IfxQspi_initSlso(slso->pin, chConfig->sls.output.mode, chConfig->sls.output.driver, slso->pin->select);
302 }
303 }
304
305 chHandle->dataWidth = chConfig->base.mode.dataWidth;
306 chHandle->base.txHandler = (TxRxHandler) & IfxQspi_SpiMaster_write;
307 chHandle->base.rxHandler = (TxRxHandler) & IfxQspi_SpiMaster_read;
308
309 if (handle->dma.useDma)
310 {
311 Ifx_DMA *dmaSFR = &MODULE_DMA;
312 IfxDma_setChannelDestinationAddress(dmaSFR, handle->dma.txDmaChannelId, (uint32 *)&qspiSFR->DATAENTRY[cs].U);
313 }
314
315 return SpiIf_Status_ok;
316 }
317
318
319 void IfxQspi_SpiMaster_initChannelConfig(IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
320 {
321 SpiIf_initChannelConfig(&chConfig->base, &handle->base);
322 chConfig->sls.output.pin = NULL_PTR;
323 chConfig->sls.output.mode = IfxPort_OutputMode_pushPull;
324 chConfig->sls.output.driver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
325 chConfig->sls.input.pin = NULL_PTR;
326 chConfig->sls.input.mode = IfxPort_InputMode_noPullDevice;
327 chConfig->channelBasedCs = IfxQspi_SpiMaster_ChannelBasedCs_disabled;
328 chConfig->mode = IfxQspi_SpiMaster_Mode_shortContinuous;
329 chConfig->dummyTxValue = (uint32)~0;
330 chConfig->dummyRxValue = (uint32)0;
331 }
332
333
334 void IfxQspi_SpiMaster_initModule(IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
335 {
336 Ifx_QSPI *qspiSFR = config->qspi;
337
338 Ifx_DMA *dmaSFR = &MODULE_DMA;
339
340 /* handle.base must be at offset 0 to be compatible with the standard interface SscIf */
341 {
342 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
343 IfxScuWdt_clearCpuEndinit(password);
344 IfxQspi_setEnableModuleRequest(qspiSFR);
345 IfxQspi_setSleepMode(qspiSFR, (config->allowSleepMode != FALSE) ? IfxQspi_SleepMode_enable : IfxQspi_SleepMode_disable);
346 IfxScuWdt_setCpuEndinit(password);
347 }
348
349 { /* Configure GLOBAL, Note: at the moment default values for GLOBAL */
350 Ifx_QSPI_GLOBALCON globalcon;
351 globalcon.U = 0;
352 globalcon.B.TQ = IfxQspi_calculateTimeQuantumLength(qspiSFR, config->base.maximumBaudrate);
353 globalcon.B.EXPECT = IfxQspi_ExpectTimeout_2097152; /* 2^(EXPECT+6) : timeout for expect phase in Tqspi */
354 //globalcon.B.LB = 0 ; /* 0 : disable loop-back w*/
355 //globalcon.B.DEL0 = 0; /* 0 : disable delayed mode for SLSO 0 */
356 //globalcon.B.STROBE = 0; /* (STROBE+1) : strobe delay for SLSO 0 in Tq */
357 //globalcon.B.SRF = 0; /* 0 : disable stop-on-RXFIFO full feature */
358 //globalcon.B.STIP = 0; /* 0 : MRST = 0 when QSPI is deselected in slave mode */
359 //globalcon.B.EN = 0; /* 0 : PAUSE requested, 1 : RUN requested */
360 globalcon.B.MS = IfxQspi_Mode_master; /* select master mode */
361 globalcon.B.AREN = (config->pauseOnBaudrateSpikeErrors != FALSE) ? 1U : 0U;
362 globalcon.B.RESETS = 0x7U;
363 qspiSFR->GLOBALCON.U = globalcon.U;
364 }
365
366 /* Read maximum baud rate into the handle */
367 handle->maximumBaudrate = config->base.maximumBaudrate;
368
369 { /* Configure interrupt requests */
370 Ifx_QSPI_GLOBALCON1 globalcon1;
371 globalcon1.U = 0;
372 globalcon1.B.ERRORENS = (config->base.erPriority > 0) ? IFXQSPI_ERRORENABLEMASK : 0;
373 globalcon1.B.TXEN = (config->base.txPriority > 0) || (config->dma.useDma);
374 globalcon1.B.RXEN = (config->base.rxPriority > 0) || (config->dma.useDma);
375 globalcon1.B.TXFIFOINT = config->txFifoThreshold;
376 globalcon1.B.RXFIFOINT = config->rxFifoThreshold;
377 globalcon1.B.TXFM = config->txFifoMode;
378 globalcon1.B.RXFM = config->rxFifoMode;
379
380 qspiSFR->GLOBALCON1.U = globalcon1.U;
381 }
382
383 /* Configure I/O pins for master mode */
384 const IfxQspi_SpiMaster_Pins *pins = config->pins;
385
386 if (pins != NULL_PTR)
387 {
388 const IfxQspi_Sclk_Out *sclkOut = pins->sclk;
389
390 if (sclkOut != NULL_PTR)
391 {
392 IfxQspi_initSclkOutPin(sclkOut, pins->sclkMode, pins->pinDriver);
393 }
394
395 const IfxQspi_Mtsr_Out *mtsrOut = pins->mtsr;
396
397 if (mtsrOut != NULL_PTR)
398 {
399 IfxQspi_initMtsrOutPin(mtsrOut, pins->mtsrMode, pins->pinDriver);
400 }
401
402 const IfxQspi_Mrst_In *mrstIn = pins->mrst;
403
404 if (mrstIn != NULL_PTR)
405 {
406 IfxQspi_initMrstInPinWithPadLevel(mrstIn, pins->mrstMode, pins->pinDriver);
407 }
408 }
409
410 handle->qspi = qspiSFR;
411 handle->base.driver = handle;
412 handle->base.sending = 0U;
413 handle->base.activeChannel = NULL_PTR;
414
415 handle->base.functions.exchange = (SpiIf_Exchange) & IfxQspi_SpiMaster_exchange;
416 handle->base.functions.getStatus = (SpiIf_GetStatus) & IfxQspi_SpiMaster_getStatus;
417
418 if (config->dma.useDma)
419 {
420 handle->base.functions.onTx = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrDmaTransmit;
421 handle->base.functions.onRx = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrDmaReceive;
422 }
423 else
424 {
425 handle->base.functions.onTx = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrTransmit;
426 handle->base.functions.onRx = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrReceive;
427 }
428
429 handle->base.functions.onError = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrError;
430
431 if (config->dma.useDma)
432 {
433 handle->dma.useDma = TRUE;
434 IfxDma_Dma dma;
435 IfxDma_Dma_createModuleHandle(&dma, dmaSFR);
436
437 IfxDma_Dma_ChannelConfig dmaCfg;
438 IfxDma_Dma_initChannelConfig(&dmaCfg, &dma);
439
440 {
441 handle->dma.txDmaChannelId = config->dma.txDmaChannelId;
442 dmaCfg.channelId = handle->dma.txDmaChannelId;
443 dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered from FFT service request
444 dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
445
446 // source address and transfer count will be configured during runtime
447 dmaCfg.sourceAddress = 0;
448 dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
449 dmaCfg.sourceCircularBufferEnabled = FALSE;
450 dmaCfg.transferCount = 0;
451 dmaCfg.moveSize = IfxDma_ChannelMoveSize_8bit;
452
453 // destination address is fixed; use circular mode to stay at this address for each move
454 dmaCfg.destinationAddress = (uint32)&qspiSFR->DATAENTRY[0].U;
455 dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
456 dmaCfg.destinationCircularBufferEnabled = TRUE;
457
458 dmaCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
459 dmaCfg.operationMode = IfxDma_ChannelOperationMode_single;
460 dmaCfg.blockMode = IfxDma_ChannelMove_1;
461
462 // initialize interrupt for tx
463 dmaCfg.channelInterruptTypeOfService = config->base.isrProvider;
464 dmaCfg.channelInterruptPriority = config->base.txPriority;
465
466 IfxDma_Dma_initChannel(&handle->dma.txDmaChannel, &dmaCfg);
467 }
468
469 {
470 handle->dma.rxDmaChannelId = config->dma.rxDmaChannelId;
471 dmaCfg.channelId = handle->dma.rxDmaChannelId;
472 dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered from qspi service request
473 dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
474
475 // source address is fixed; use circular mode to stay at this address for each move
476 dmaCfg.sourceAddress = (uint32)&qspiSFR->RXEXIT.U;
477 dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
478 dmaCfg.sourceCircularBufferEnabled = TRUE;
479
480 // destination address and transfer count will be configured during runtime
481 dmaCfg.destinationAddress = 0;
482 dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
483 dmaCfg.destinationCircularBufferEnabled = FALSE;
484 dmaCfg.transferCount = 0;
485
486 dmaCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
487 dmaCfg.operationMode = IfxDma_ChannelOperationMode_single;
488 dmaCfg.moveSize = IfxDma_ChannelMoveSize_8bit;
489 dmaCfg.blockMode = IfxDma_ChannelMove_1;
490
491 // initialize interrupt for rx
492 dmaCfg.channelInterruptTypeOfService = config->base.isrProvider;
493 dmaCfg.channelInterruptPriority = config->base.rxPriority;
494
495 IfxDma_Dma_initChannel(&handle->dma.rxDmaChannel, &dmaCfg);
496 }
497 }
498 else /* Don't use DMA */
499 {
500 handle->dma.useDma = FALSE;
501 }
502
503 /* Qspi interrupt configuration */
504 {
505 IfxQspi_clearAllEventFlags(qspiSFR);
506
507 if (handle->dma.useDma)
508 {
509 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
510 IfxSrc_init(src, IfxSrc_Tos_dma, (Ifx_Priority)config->dma.txDmaChannelId);
511 IfxSrc_enable(src);
512
513 src = IfxQspi_getReceiveSrc(qspiSFR);
514 IfxSrc_init(src, IfxSrc_Tos_dma, (Ifx_Priority)config->dma.rxDmaChannelId);
515 IfxSrc_enable(src);
516 }
517 else
518 {
519 if (config->base.txPriority != 0)
520 {
521 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
522 IfxSrc_init(src, config->base.isrProvider, config->base.txPriority);
523 IfxSrc_enable(src);
524 }
525
526 if (config->base.rxPriority != 0)
527 {
528 volatile Ifx_SRC_SRCR *src = IfxQspi_getReceiveSrc(qspiSFR);
529 IfxSrc_init(src, config->base.isrProvider, config->base.rxPriority);
530 IfxSrc_enable(src);
531 }
532
533 if (config->base.erPriority != 0)
534 {
535 volatile Ifx_SRC_SRCR *src = IfxQspi_getErrorSrc(qspiSFR);
536 IfxSrc_init(src, config->base.isrProvider, config->base.erPriority);
537 IfxSrc_enable(src);
538 }
539 }
540 }
541
542 IfxQspi_run(qspiSFR);
543 }
544
545
546 void IfxQspi_SpiMaster_initModuleConfig(IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
547 {
548 SpiIf_initConfig(&config->base);
549 config->qspi = qspi;
550 config->allowSleepMode = FALSE;
551 config->pauseOnBaudrateSpikeErrors = FALSE,
552 config->pauseRunTransition = IfxQspi_PauseRunTransition_pause;
553 config->txFifoThreshold = IfxQspi_TxFifoInt_1;
554 config->rxFifoThreshold = IfxQspi_RxFifoInt_0;
555 config->txFifoMode = IfxQspi_FifoMode_combinedMove;
556 config->rxFifoMode = IfxQspi_FifoMode_combinedMove;
557 config->pins = NULL_PTR;
558 config->dma.rxDmaChannelId = IfxDma_ChannelId_none;
559 config->dma.txDmaChannelId = IfxDma_ChannelId_none;
560 config->dma.useDma = FALSE;
561 config->base.maximumBaudrate = 50000000;
562 }
563
564
565 void IfxQspi_SpiMaster_isrDmaReceive(IfxQspi_SpiMaster *qspiHandle)
566 {
567 Ifx_DMA *dmaSFR = &MODULE_DMA;
568 IfxDma_ChannelId rxDmaChannelId = qspiHandle->dma.rxDmaChannelId;
569 IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(qspiHandle);
570
571 if (IfxDma_getAndClearChannelInterrupt(dmaSFR, rxDmaChannelId))
572 {
573 if (chHandle->deactivateSlso != NULL_PTR)
574 {
575 chHandle->deactivateSlso(chHandle);
576 }
577
578 chHandle->base.flags.onTransfer = 0;
579 IfxQspi_SpiMaster_unlock((IfxQspi_SpiMaster *)chHandle->base.driver);
580 }
581
582 IfxDma_getAndClearChannelPatternDetectionInterrupt(dmaSFR, rxDmaChannelId);
583 }
584
585
586 void IfxQspi_SpiMaster_isrDmaTransmit(IfxQspi_SpiMaster *qspiHandle)
587 {
588 IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(qspiHandle);
589 Ifx_DMA *dmaSFR = &MODULE_DMA;
590 IfxDma_ChannelId txDmaChannelId = qspiHandle->dma.txDmaChannelId;
591 Ifx_QSPI *qspiSFR = qspiHandle->qspi;
592 SpiIf_Job *job = &chHandle->base.tx;
593
594 if (IfxDma_getAndClearChannelPatternDetectionInterrupt(dmaSFR, txDmaChannelId))
595 {
596 // DMA_TC.031 workaround ..
597 IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId);
598 }
599 else if ((chHandle->mode == IfxQspi_SpiMaster_Mode_long) ||
600 (chHandle->mode == IfxQspi_SpiMaster_Mode_longContinuous))
601 {
602 IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId);
603 IfxDma_disableChannelTransaction(dmaSFR, txDmaChannelId);
604 }
605 else if (chHandle->mode == IfxQspi_SpiMaster_Mode_xxl)
606 {
607 IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId);
608 IfxDma_disableChannelTransaction(dmaSFR, txDmaChannelId);
609 }
610 else if (IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId) && (job->remaining > 1))
611 {
612 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
613 IfxDma_disableChannelTransaction(dmaSFR, txDmaChannelId);
614
615 if (job->data == NULL_PTR)
616 {
617 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
618 IfxQspi_writeTransmitFifo(qspiSFR, chHandle->dummyTxValue);
619 }
620 else
621 {
622 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
623
624 if (chHandle->dataWidth <= 8)
625 {
626 IfxQspi_writeTransmitFifo(qspiSFR, ((uint8 *)job->data)[job->remaining - 1]);
627 }
628 else if (chHandle->dataWidth <= 16)
629 {
630 IfxQspi_writeTransmitFifo(qspiSFR, ((uint16 *)job->data)[job->remaining - 1]);
631 }
632 else
633 {
634 IfxQspi_writeTransmitFifo(qspiSFR, ((uint32 *)job->data)[job->remaining - 1]);
635 }
636 }
637 }
638 }
639
640
641 void IfxQspi_SpiMaster_isrError(IfxQspi_SpiMaster *handle)
642 {
643 Ifx_QSPI *qspiSFR = handle->qspi;
644 uint16 errorFlags = IfxQspi_getErrorFlags(qspiSFR);
645 IfxQspi_clearAllEventFlags(qspiSFR);
646 IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(handle);
647 Ifx_DMA *dmaSFR = &MODULE_DMA;
648
649 /* store all the flags in the variable */
650
651 if ((errorFlags & IfxQspi_Error_parity))
652 {
653 chHandle->errorFlags.parityError = 1;
654 }
655
656 if ((errorFlags & IfxQspi_Error_configuration))
657 {
658 chHandle->errorFlags.configurationError = 1;
659 }
660
661 if ((errorFlags & IfxQspi_Error_baudrate))
662 {
663 chHandle->errorFlags.baudrateError = 1;
664 }
665
666 if ((errorFlags & IfxQspi_Error_expectTimeout))
667 {
668 chHandle->errorFlags.expectTimeoutError = 1;
669 }
670
671 if ((errorFlags & IfxQspi_Error_txfifoOverflow))
672 {
673 chHandle->errorFlags.txFifoOverflowError = 1;
674 }
675
676 if ((errorFlags & IfxQspi_Error_txfifoUnderflow))
677 {
678 chHandle->errorFlags.txFifoUnderflowError = 1;
679 }
680
681 if ((errorFlags & IfxQspi_Error_rxfifoOverflow))
682 {
683 chHandle->errorFlags.rxFifoOverflowError = 1;
684 }
685
686 if ((errorFlags & IfxQspi_Error_rxfifoUnderflow))
687 {
688 chHandle->errorFlags.rxFifoUnderflowError = 1;
689 }
690
691 if (errorFlags)
692 {
693 if (chHandle->deactivateSlso != NULL_PTR)
694 {
695 chHandle->deactivateSlso(chHandle);
696 }
697
698 chHandle->base.flags.onTransfer = 0;
699 IfxQspi_SpiMaster_unlock((IfxQspi_SpiMaster *)chHandle->base.driver);
700 }
701
702 if (handle->dma.useDma)
703 {
704 IfxDma_getAndClearChannelInterrupt(dmaSFR, handle->dma.rxDmaChannelId);
705 IfxDma_getAndClearChannelInterrupt(dmaSFR, handle->dma.txDmaChannelId);
706 }
707 }
708
709
710 IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrPhaseTransition(IfxQspi_SpiMaster *handle)
711 {
712 Ifx_QSPI *qspiSFR = handle->qspi;
713 IfxQspi_PhaseTransitionEvent ptEvent = IfxQspi_PhaseTransitionEvent_endOfWait; /* default to 0 */
714
715 if (qspiSFR->STATUS.B.PT1F)
716 {
717 qspiSFR->FLAGSCLEAR.B.PT1C = 1;
718 ptEvent = (IfxQspi_PhaseTransitionEvent)(qspiSFR->GLOBALCON1.B.PT1);
719 }
720 else if (qspiSFR->STATUS.B.PT2F)
721 {
722 qspiSFR->FLAGSCLEAR.B.PT2C = 1;
723 ptEvent = (IfxQspi_PhaseTransitionEvent)(qspiSFR->GLOBALCON1.B.PT2);
724 }
725
726 return ptEvent;
727 }
728
729
730 void IfxQspi_SpiMaster_isrReceive(IfxQspi_SpiMaster *handle)
731 {
732 IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(handle);
733 chHandle->base.rxHandler(&chHandle->base);
734 handle->base.rxCount++;
735 }
736
737
738 void IfxQspi_SpiMaster_isrTransmit(IfxQspi_SpiMaster *handle)
739 {
740 IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(handle);
741 chHandle->base.txHandler(&chHandle->base);
742 handle->base.txCount++;
743 }
744
745
746 IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrUserDefined(IfxQspi_SpiMaster *handle)
747 {
748 Ifx_QSPI *qspiSFR = handle->qspi;
749 IfxQspi_PhaseTransitionEvent ptEvent = IfxQspi_PhaseTransitionEvent_endOfWait; /* default to 0 */
750
751 if (qspiSFR->STATUS.B.USRF)
752 {
753 qspiSFR->FLAGSCLEAR.B.USRC = 1;
754 ptEvent = (IfxQspi_PhaseTransitionEvent)qspiSFR->GLOBALCON1.B.PT1; //
755 }
756
757 return ptEvent;
758 }
759
760
761 IFX_STATIC SpiIf_Status IfxQspi_SpiMaster_lock(IfxQspi_SpiMaster *handle)
762 {
763 sint32 sending = __swap((void *)&handle->base.sending, 1UL);
764 return (sending == 0) ? SpiIf_Status_ok : SpiIf_Status_busy;
765 }
766
767
768 void IfxQspi_SpiMaster_packLongModeBuffer(IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
769 {
770 boolean isFirst = 0;
771 uint8 *src = (uint8 *)data;
772 uint32 i, baconDL;
773
774 baconDL = 16;
775
776 if (chHandle->mode == IfxQspi_SpiMaster_Mode_longContinuous)
777 {
778 chHandle->bacon.B.BYTE = 1;
779 chHandle->bacon.B.LAST = 0;
780 }
781 else if (chHandle->mode == IfxQspi_SpiMaster_Mode_long)
782 {
783 chHandle->bacon.B.BYTE = 1;
784 chHandle->bacon.B.LAST = 1;
785 }
786 else
787 {
788 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IFX_ASSERT_FEATURE_NOT_IMPLEMENTED);
789 }
790
791 while (dataLength > 0)
792 {
793 if (dataLength <= 16)
794 {
795 baconDL = dataLength;
796 chHandle->bacon.B.LAST = 1;
797 }
798
799 dataLength -= (Ifx_SizeT)baconDL;
800
801 /* FILL BACON */
802 if (isFirst == 0)
803 {
804 isFirst = 1;
805 }
806 else
807 {
808 chHandle->bacon.B.DL = baconDL - 1;
809 *longFifoBuffer = chHandle->bacon.U;
810 longFifoBuffer++;
811 }
812
813 for (i = 0; i < baconDL / 4; i++)
814 {
815 *longFifoBuffer = *((uint32 *)src);
816 longFifoBuffer++;
817 src += 4;
818 }
819
820 /* Copy Last bytes */
821 switch (baconDL % 4)
822 {
823 case 1:
824 *longFifoBuffer = *src;
825 break;
826 case 2:
827 *longFifoBuffer = *src | (*(src + 1) << 8);
828 break;
829 case 3:
830 *longFifoBuffer = *src | (*(src + 1) << 8) | (*(src + 2) << 16);
831 break;
832 }
833 }
834 }
835
836
837 IFX_STATIC void IfxQspi_SpiMaster_read(IfxQspi_SpiMaster_Channel *chHandle)
838 {
839 IfxQspi_SpiMaster *handle = chHandle->base.driver->driver;
840 Ifx_QSPI *qspiSFR = handle->qspi;
841 SpiIf_Job *job = &chHandle->base.rx;
842
843 Ifx_SizeT count = (Ifx_SizeT)IfxQspi_getReceiveFifoLevel(qspiSFR);
844 count = __min(job->remaining, count);
845
846 if (job->data == NULL_PTR)
847 {
848 // no data should be buffered: do dummy reads
849 int i;
850
851 for (i = 0; i < count; ++i)
852 {
853 IfxQspi_readReceiveFifo(qspiSFR);
854 }
855 }
856 else
857 {
858 if (chHandle->dataWidth <= 8)
859 {
860 IfxQspi_read8(qspiSFR, job->data, count);
861 job->data = &(((uint8 *)job->data)[count]);
862 }
863 else if (chHandle->dataWidth <= 16)
864 {
865 IfxQspi_read16(qspiSFR, job->data, count);
866 job->data = &(((uint16 *)job->data)[count]);
867 }
868 else
869 {
870 IfxQspi_read32(qspiSFR, job->data, count);
871 job->data = &(((uint32 *)job->data)[count]);
872 }
873 }
874
875 job->remaining = job->remaining - count;
876
877 if (job->remaining == 0)
878 {
879 if (chHandle->deactivateSlso != NULL_PTR)
880 {
881 chHandle->deactivateSlso(chHandle);
882 }
883
884 chHandle->base.flags.onTransfer = 0;
885 IfxQspi_SpiMaster_unlock((IfxQspi_SpiMaster *)chHandle->base.driver);
886 }
887 }
888
889
890 SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate(IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate)
891 {
892 IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver->driver;
893 Ifx_QSPI *qspiSFR = handle->qspi;
894 SpiIf_ChConfig chConfig;
895 chConfig = IfxQspi_SpiMaster_getChannelConfig(chHandle);
896 chConfig.baudrate = baudrate;
897 IfxQspi_ChannelId cs = (IfxQspi_ChannelId)(chHandle->channelId % 8);
898 qspiSFR->ECON[cs].U = IfxQspi_calculateExtendedConfigurationValue(qspiSFR, (uint8)cs, &chConfig);
899 chHandle->bacon.U = IfxQspi_calculateBasicConfigurationValue(qspiSFR, chHandle->channelId, &chConfig.mode, chConfig.baudrate);
900 chHandle->base.baudrate = IfxQspi_calcRealBaudrate(qspiSFR, cs);
901 return SpiIf_Status_ok;
902 }
903
904
905 IFX_STATIC void IfxQspi_SpiMaster_unlock(IfxQspi_SpiMaster *handle)
906 {
907 handle->base.sending = 0UL;
908 }
909
910
911 IFX_STATIC void IfxQspi_SpiMaster_write(IfxQspi_SpiMaster_Channel *chHandle)
912 {
913 SpiIf_Job *job = &chHandle->base.tx;
914 IfxQspi_SpiMaster *handle = chHandle->base.driver->driver;
915
916 if (handle->dma.useDma)
917 {
918 Ifx_DMA *dmaSFR = &MODULE_DMA;
919
920 Ifx_QSPI *qspiSFR = handle->qspi;
921 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
922
923 IfxDma_ChannelId txDmaChannelId = handle->dma.txDmaChannelId;
924 IfxDma_ChannelId rxDmaChannelId = handle->dma.rxDmaChannelId;
925
926 boolean interruptState = IfxCpu_disableInterrupts();
927
928 if (job->remaining > 1)
929 {
930 IfxDma_setChannelTransferCount(dmaSFR, txDmaChannelId, job->remaining - 1);
931
932 if (chHandle->dataWidth <= 8)
933 {
934 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_8bit);
935 }
936 else if (chHandle->dataWidth <= 16)
937 {
938 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_16bit);
939 }
940 else
941 {
942 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_32bit);
943 }
944
945 if (job->data == NULL_PTR)
946 {
947 IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &(chHandle->dummyTxValue)));
948 IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
949 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
950 /* need to enable circular buffering to avoid increment higher than 4 bytes */
951 /* we must do this direct why we don't have function for this */
952 dmaSFR->CH[txDmaChannelId].ADICR.B.SCBE = TRUE;
953 }
954 else
955 {
956 IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), job->data));
957 IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
958 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
959 /* maybe circular buffering was enabled by other call, we disable the circular buffering */
960 /* we must do this direct why we don't have function for this */
961 dmaSFR->CH[txDmaChannelId].ADICR.B.SCBE = FALSE;
962 }
963
964 IfxDma_setChannelDestinationAddress(dmaSFR, txDmaChannelId, (void *)&qspiSFR->DATAENTRY[0].U);
965 IfxDma_setChannelDestinationIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
966 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
967
968 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
969 }
970
971 /* Receive config */
972 IfxDma_setChannelTransferCount(dmaSFR, rxDmaChannelId, job->remaining);
973
974 if (chHandle->dataWidth <= 8)
975 {
976 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_8bit);
977 }
978 else if (chHandle->dataWidth <= 16)
979 {
980 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_16bit);
981 }
982 else
983 {
984 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_32bit);
985 }
986
987 if (chHandle->base.rx.data == NULL_PTR)
988 {
989 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &(chHandle->dummyRxValue)));
990 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
991 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
992 /* need to enable circular buffering to avoid increment higher than 4 bytes */
993 /* we must do this direct why we don't have function for this */
994 dmaSFR->CH[rxDmaChannelId].ADICR.B.DCBE = TRUE;
995 }
996 else
997 {
998 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), chHandle->base.rx.data));
999 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
1000 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
1001 /* maybe circular buffering was enabled by other call, we disable the circular buffering */
1002 /* we must do this direct why we don't have function for this */
1003 dmaSFR->CH[rxDmaChannelId].ADICR.B.DCBE = FALSE;
1004 }
1005
1006 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
1007 IfxQspi_clearAllEventFlags(qspiSFR);
1008 src = IfxQspi_getTransmitSrc(qspiSFR);
1009 IfxSrc_clearRequest(src);
1010 src = IfxQspi_getReceiveSrc(qspiSFR);
1011 IfxSrc_clearRequest(src);
1012 src = IfxQspi_getErrorSrc(qspiSFR);
1013 IfxSrc_clearRequest(src);
1014 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
1015 IfxDma_enableChannelTransaction(dmaSFR, rxDmaChannelId);
1016
1017 if (job->remaining > 1)
1018 {
1019 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
1020 IfxDma_enableChannelTransaction(dmaSFR, txDmaChannelId);
1021
1022 if (chHandle->channelBasedCs == IfxQspi_SpiMaster_ChannelBasedCs_disabled)
1023 {
1024 IfxQspi_writeBasicConfigurationBeginStream(qspiSFR, chHandle->bacon.U);
1025 }
1026 else
1027 {
1028 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1029 }
1030 }
1031 else
1032 {
1033 if (job->data == NULL_PTR)
1034 {
1035 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1036 IfxQspi_writeTransmitFifo(qspiSFR, chHandle->dummyTxValue);
1037 }
1038 else
1039 {
1040 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1041
1042 if (chHandle->dataWidth <= 8)
1043 {
1044 IfxQspi_writeTransmitFifo(qspiSFR, ((uint8 *)job->data)[job->remaining - 1]);
1045 }
1046 else if (chHandle->dataWidth <= 16)
1047 {
1048 IfxQspi_writeTransmitFifo(qspiSFR, ((uint16 *)job->data)[job->remaining - 1]);
1049 }
1050 else
1051 {
1052 IfxQspi_writeTransmitFifo(qspiSFR, ((uint32 *)job->data)[job->remaining - 1]);
1053 }
1054 }
1055 }
1056
1057 IfxCpu_restoreInterrupts(interruptState);
1058 }
1059
1060 else
1061 {
1062 if (job->remaining > 0)
1063 {
1064 IfxQspi_SpiMaster *handle = chHandle->base.driver->driver;
1065 Ifx_QSPI *qspiSFR = handle->qspi;
1066 IfxQspi_ChannelId cs = (IfxQspi_ChannelId)(chHandle->bacon.B.CS);
1067
1068 Ifx_SizeT count = (Ifx_SizeT)(IFXQSPI_HWFIFO_DEPTH - IfxQspi_getTransmitFifoLevel(qspiSFR));
1069
1070 if (chHandle->firstWrite == TRUE)
1071 {
1072 // -1, since BACON allocates one FIFO entry
1073 count--;
1074 }
1075
1076 if (job->remaining == count)
1077 {
1078 // Need to write BACON next time
1079 count--;
1080 }
1081
1082 count = __min(job->remaining, count);
1083
1084 if (count > 0)
1085 {
1086 job->remaining = job->remaining - count;
1087
1088 // we have to push another BACON into FIFO before the last data word
1089 boolean lastWrite = (job->remaining == 0) ? TRUE : FALSE;
1090 boolean interruptState;
1091
1092 /*Disable interrupts only if conditions a, b and c are satisfied.
1093 * a.)first write is true(i.e call from exchange only and not from transmit ISR) and
1094 * b.)on multi-byte write(no need to disable for single byte write) and
1095 * c.)this is not last write(Condition needed for 2 byte write from exchange in firstwrite)
1096 *
1097 * 1.Call from ISR no need to disable.
1098 * 2.Call from exchange and write_count(here write_count=count) is 1 or 2, no need to disable,
1099 * because when ISR call happens job->remaining=0.
1100 * 3.Call from exchange and write_count=3,(count=2, job->remaining=1), disable interrupt.
1101 * 4.Multi-byte write call from exchange disable interrupt.*/
1102 if ((chHandle->firstWrite == TRUE) && (count > 1) && (job->remaining != 0))
1103 {
1104 interruptState = IfxCpu_disableInterrupts();
1105 }
1106 else
1107 {
1108 interruptState = IfxCpu_areInterruptsEnabled();
1109 }
1110
1111 // push BACON into FIFO before first data word
1112 if (chHandle->firstWrite == TRUE)
1113 {
1114 chHandle->firstWrite = FALSE;
1115
1116 if (chHandle->channelBasedCs == IfxQspi_SpiMaster_ChannelBasedCs_disabled)
1117 {
1118 IfxQspi_writeBasicConfigurationBeginStream(qspiSFR, chHandle->bacon.U);
1119 }
1120 else
1121 {
1122 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1123 }
1124 }
1125
1126 if (job->data == NULL_PTR)
1127 {
1128 // no data should be sent (only received): send all-1
1129 int i;
1130 uint32 writeVal = chHandle->dummyTxValue;
1131
1132 if (lastWrite)
1133 {
1134 for (i = 0; i < count - 1; ++i)
1135 {
1136 IfxQspi_writeTransmitFifo(qspiSFR, writeVal);
1137 }
1138
1139 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1140 IfxQspi_writeTransmitFifo(qspiSFR, writeVal);
1141 }
1142 else
1143 {
1144 for (i = 0; i < count; ++i)
1145 {
1146 IfxQspi_writeTransmitFifo(qspiSFR, writeVal);
1147 }
1148 }
1149 }
1150 else
1151 {
1152 if (chHandle->dataWidth <= 8)
1153 {
1154 if (lastWrite)
1155 {
1156 if (count > 1)
1157 {
1158 IfxQspi_write8(qspiSFR, cs, job->data, count - 1);
1159 }
1160
1161 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1162 IfxQspi_writeTransmitFifo(qspiSFR, ((uint8 *)job->data)[count - 1]);
1163 }
1164 else
1165 {
1166 IfxQspi_write8(qspiSFR, cs, job->data, count);
1167 }
1168
1169 job->data = &(((uint8 *)job->data)[count]);
1170 }
1171 else if (chHandle->dataWidth <= 16)
1172 {
1173 if (lastWrite)
1174 {
1175 if (count > 1)
1176 {
1177 IfxQspi_write16(qspiSFR, cs, job->data, count - 1);
1178 }
1179
1180 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1181 IfxQspi_writeTransmitFifo(qspiSFR, ((uint16 *)job->data)[count - 1]);
1182 }
1183 else
1184 {
1185 IfxQspi_write16(qspiSFR, cs, job->data, count);
1186 job->data = &(((uint16 *)job->data)[count]);
1187 }
1188 }
1189 else
1190 {
1191 if (lastWrite)
1192 {
1193 if (count > 1)
1194 {
1195 IfxQspi_write32(qspiSFR, cs, job->data, count - 1);
1196 }
1197
1198 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1199 IfxQspi_writeTransmitFifo(qspiSFR, ((uint32 *)job->data)[count - 1]);
1200 }
1201 else
1202 {
1203 IfxQspi_write32(qspiSFR, cs, job->data, count);
1204 job->data = &(((uint32 *)job->data)[count]);
1205 }
1206 }
1207 }
1208
1209 IfxCpu_restoreInterrupts(interruptState);
1210 }
1211 }
1212 }
1213 }
1214
1215
1216 IFX_STATIC void IfxQspi_SpiMaster_writeLong(IfxQspi_SpiMaster_Channel *chHandle)
1217 {
1218 SpiIf_Job *job = &chHandle->base.tx;
1219 IfxQspi_SpiMaster *handle = chHandle->base.driver->driver;
1220 uint8 fifosize = IFXQSPI_FIFO32BITSIZE(job->remaining);
1221
1222 if (chHandle->mode != IfxQspi_SpiMaster_Mode_xxl)
1223 {
1224 fifosize = fifosize + IFXQSPI_BACONSIZE(job->remaining) - 1; // combining this line and above doesn't work
1225 }
1226
1227 if (handle->dma.useDma)
1228 {
1229 Ifx_DMA *dmaSFR = &MODULE_DMA;
1230
1231 Ifx_QSPI *qspiSFR = handle->qspi;
1232 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
1233
1234 IfxDma_ChannelId txDmaChannelId = handle->dma.txDmaChannelId;
1235 IfxDma_ChannelId rxDmaChannelId = handle->dma.rxDmaChannelId;
1236
1237 boolean interruptState = IfxCpu_disableInterrupts();
1238
1239 {
1240 IfxDma_setChannelTransferCount(dmaSFR, txDmaChannelId, fifosize);
1241
1242 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_32bit);
1243
1244 {
1245 IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), job->data));
1246 IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
1247 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
1248 /* maybe circular buffering was enabled by other call, we disable the circular buffering */
1249 /* we must do this direct why we don't have function for this */
1250 dmaSFR->CH[txDmaChannelId].ADICR.B.SCBE = FALSE;
1251
1252 if (chHandle->mode != IfxQspi_SpiMaster_Mode_xxl)
1253 {
1254 IfxDma_setChannelDestinationAddress(dmaSFR, txDmaChannelId, (uint32 *)&qspiSFR->MIXENTRY.U);
1255 IfxDma_setChannelDestinationIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
1256 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
1257 }
1258 }
1259
1260 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
1261 }
1262
1263 /* Receive config */
1264 IfxDma_setChannelTransferCount(dmaSFR, rxDmaChannelId, IFXQSPI_FIFO32BITSIZE(job->remaining));
1265 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_32bit);
1266
1267 if (chHandle->base.rx.data == NULL_PTR)
1268 {
1269 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &(chHandle->dummyRxValue)));
1270 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
1271 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
1272 /* need to enable circular buffering to avoid increment higher than 4 bytes */
1273 /* we must do this direct why we don't have function for this */
1274 dmaSFR->CH[rxDmaChannelId].ADICR.B.DCBE = TRUE;
1275 }
1276 else
1277 {
1278 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), chHandle->base.rx.data));
1279 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
1280 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
1281 /* maybe circular buffering was enabled by other call, we disable the circular buffering */
1282 /* we must do this direct why we don't have function for this */
1283 dmaSFR->CH[rxDmaChannelId].ADICR.B.DCBE = FALSE;
1284 }
1285
1286 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
1287 IfxQspi_clearAllEventFlags(qspiSFR);
1288 src = IfxQspi_getTransmitSrc(qspiSFR);
1289 IfxSrc_clearRequest(src);
1290 src = IfxQspi_getReceiveSrc(qspiSFR);
1291 IfxSrc_clearRequest(src);
1292 src = IfxQspi_getErrorSrc(qspiSFR);
1293 IfxSrc_clearRequest(src);
1294 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
1295 IfxDma_enableChannelTransaction(dmaSFR, rxDmaChannelId);
1296
1297 if (chHandle->mode == IfxQspi_SpiMaster_Mode_longContinuous)
1298 {
1299 (job->remaining >= 16) ? (chHandle->bacon.B.DL = 16 - 1) : (chHandle->bacon.B.DL = job->remaining - 1);
1300 (job->remaining >= 16) ? (chHandle->bacon.B.LAST = 0) : (chHandle->bacon.B.LAST = 1);
1301 chHandle->bacon.B.BYTE = 1;
1302 }
1303 else if (chHandle->mode == IfxQspi_SpiMaster_Mode_long)
1304 {
1305 (job->remaining >= 16) ? (chHandle->bacon.B.DL = 16 - 1) : (chHandle->bacon.B.DL = job->remaining - 1);
1306 chHandle->bacon.B.LAST = 1;
1307 chHandle->bacon.B.BYTE = 1;
1308 }
1309 else
1310 {
1311 chHandle->bacon.B.LAST = 1;
1312 chHandle->bacon.B.BYTE = 1;
1313 chHandle->bacon.B.DL = 0;
1314 }
1315
1316 {
1317 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
1318 IfxDma_enableChannelTransaction(dmaSFR, txDmaChannelId);
1319 }
1320
1321 if (chHandle->mode != IfxQspi_SpiMaster_Mode_xxl)
1322 {
1323 qspiSFR->MIXENTRY.U = chHandle->bacon.U;
1324 }
1325 else
1326 {
1327 qspiSFR->BACONENTRY.U = chHandle->bacon.U;
1328 }
1329
1330 IfxCpu_restoreInterrupts(interruptState);
1331 }
1332 else
1333 {
1334 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IFX_ASSERT_FEATURE_NOT_IMPLEMENTED);
1335 }
1336 }
IfxQspi_SpiMaster_Channel_s::bacon
Ifx_QSPI_BACON bacon
basic configuration register
Definition: IfxQspi_SpiMaster.h:659
IfxQspi_SpiMaster_Pins::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiMaster.h:625
IfxQspi_SpiMaster_ChannelBasedCs_disabled
Slso will be low for complete frame.
Definition: IfxQspi_SpiMaster.h:531
IfxQspi_SpiMaster_Mode_shortContinuous
Short Continous Mode.
Definition: IfxQspi_SpiMaster.h:539
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxQspi_Error_txfifoOverflow
TX FIFO Overflow Error.
Definition: IfxQspi.h:129
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
IfxQspi_SpiMaster
Module handle data structure.
Definition: IfxQspi_SpiMaster.h:634
IfxQspi_SpiMaster_Output::mode
IfxPort_OutputMode mode
The SLSO pin output mode.
Definition: IfxQspi_SpiMaster.h:565
IfxQspi_PhaseTransitionEvent_endOfWait
BUSY (end of WAIT phase)
Definition: IfxQspi.h:195
SpiIf_ChMode::dataHeading
uint32 dataHeading
SpiIf_DataHeading
Definition: SpiIf.h:193
IfxDma_Dma_ChannelConfig::moveSize
IfxDma_ChannelMoveSize moveSize
Read/write data size.
Definition: IfxDma_Dma.h:493
SpiIf_funcs::getStatus
SpiIf_GetStatus getStatus
Definition: SpiIf.h:144
IfxQspi_Error_rxfifoUnderflow
RX FIFO Underflow Error.
Definition: IfxQspi.h:132
IfxQspi_SpiMaster_Pins::mrstMode
IfxPort_InputMode mrstMode
The MRST pin input mode.
Definition: IfxQspi_SpiMaster.h:624
IfxQspi_calcRealBaudrate
float IfxQspi_calcRealBaudrate(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel.
Definition: IfxQspi.c:54
IfxQspi_SpiMaster_Output
SLSO pin configuration structure.
Definition: IfxQspi_SpiMaster.h:562
IfxDma_Dma_ChannelConfig::sourceAddressCircularRange
IfxDma_ChannelIncrementCircular sourceAddressCircularRange
Determines which part of the source address remains unchanged and therby not updated after each move...
Definition: IfxDma_Dma.h:500
IfxDma_Dma_ChannelConfig::channelId
IfxDma_ChannelId channelId
Specifies the channel being used.
Definition: IfxDma_Dma.h:483
SpiIf_funcs::onRx
SpiIf_OnEvent onRx
Definition: SpiIf.h:146
IfxQspi_SpiMaster_Channel_s::slsoActiveState
Ifx_ActiveState slsoActiveState
Specifies the current state of SLSO.
Definition: IfxQspi_SpiMaster.h:666
IfxQspi_read8
void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO.
Definition: IfxQspi.c:337
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxQspi_SpiMaster_Channel_s::deactivateSlso
IfxQspi_SpiMaster_AutoSlso deactivateSlso
Specifies function for Auto SLSO deactivation.
Definition: IfxQspi_SpiMaster.h:662
IfxQspi_Error_baudrate
BaudRate Error.
Definition: IfxQspi.h:128
IfxQspi_read16
void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO.
Definition: IfxQspi.c:313
IfxQspi_SpiMaster_Channel_s::channelId
IfxQspi_ChannelId channelId
QSPI channel Number.
Definition: IfxQspi_SpiMaster.h:665
SpiIf_ChConfig_::baudrate
float32 baudrate
Specifies the SPI baudrate.
Definition: SpiIf.h:228
IfxQspi_ExpectTimeout_2097152
Expect phse time out 2097152.
Definition: IfxQspi.h:156
IFXQSPI_HWFIFO_DEPTH
#define IFXQSPI_HWFIFO_DEPTH
Definition: IfxQspi_cfg.h:67
SpiIf_ChConfig_
Definition: SpiIf.h:225
SpiIf_ChMode::csLeadDelay
SpiIf_SlsoTiming_HalfTsclk csLeadDelay
CS Lead Delay in Tsclk/2 units.
Definition: SpiIf.h:202
IfxQspi_SpiMaster_Config::pauseRunTransition
IfxQspi_PauseRunTransition pauseRunTransition
Specifies module run or pause mode.
Definition: IfxQspi_SpiMaster.h:682
IfxQspi_PhaseTransitionEvent
IfxQspi_PhaseTransitionEvent
Phase Transition Event.
Definition: IfxQspi.h:193
SpiIf_Ch_::tx
SpiIf_Job tx
Definition: SpiIf.h:217
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:133
IfxQspi_Error_parity
Parity Error.
Definition: IfxQspi.h:126
IfxQspi_SpiMaster_Pins::mtsrMode
IfxPort_OutputMode mtsrMode
The MTSR pin output mode.
Definition: IfxQspi_SpiMaster.h:622
IfxQspi_SpiMaster_isrError
void IfxQspi_SpiMaster_isrError(IfxQspi_SpiMaster *handle)
Error Interrupt handler.
Definition: IfxQspi_SpiMaster.c:641
IfxQspi_SpiMaster_activeChannel
IFX_STATIC IfxQspi_SpiMaster_Channel * IfxQspi_SpiMaster_activeChannel(IfxQspi_SpiMaster *handle)
Gets current active channel.
Definition: IfxQspi_SpiMaster.c:127
IfxQspi_getErrorFlags
IFX_INLINE uint16 IfxQspi_getErrorFlags(Ifx_QSPI *qspi)
Definition: IfxQspi.h:959
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
SpiIf_ChMode::loopback
uint32 loopback
0 = normal mode, 1 = loopback mode
Definition: SpiIf.h:190
IfxDma_setChannelSourceAddress
IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address.
Definition: IfxDma.h:1642
IfxQspi_SpiMaster_Dma::rxDmaChannel
IfxDma_Dma_Channel rxDmaChannel
receive DMA channel handle
Definition: IfxQspi_SpiMaster.h:577
IfxQspi_TxFifoInt_1
TxFifo Interrupt Threshold #1.
Definition: IfxQspi.h:275
SpiIf_ChMode::dataWidth
uint32 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: SpiIf.h:194
IfxQspi_SpiMaster_Channel_s::slso
IfxPort_Pin slso
Defines SLSO pin.
Definition: IfxQspi_SpiMaster.h:660
IfxDma_Dma_initChannelConfig
void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration
Definition: IfxDma_Dma.c:176
IfxQspi_SpiMaster_Config::txFifoMode
IfxQspi_FifoMode txFifoMode
Specifies the transmit FIFO mode.
Definition: IfxQspi_SpiMaster.h:687
SpiIf_::driver
pvoid driver
Spi specific driver.
Definition: SpiIf.h:152
IfxDma_ChannelMoveSize_16bit
1 DMA move is 16 bit wide
Definition: IfxDma.h:175
IfxQspi_SpiMaster_writeLong
IFX_STATIC void IfxQspi_SpiMaster_writeLong(IfxQspi_SpiMaster_Channel *chHandle)
Writes Long/xxl data into the Tx FIFO.
Definition: IfxQspi_SpiMaster.c:1216
IfxDma_ChannelMoveSize_8bit
1 DMA move is 8 bit wide
Definition: IfxDma.h:174
IfxPort_State_high
Ifx_P pin is set to high.
Definition: IfxPort.h:173
IfxQspi_SpiMaster_isrDmaReceive
void IfxQspi_SpiMaster_isrDmaReceive(IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:565
IfxDma_Dma_ChannelConfig::sourceAddress
uint32 sourceAddress
Source address for the DMA channel.
Definition: IfxDma_Dma.h:484
TxRxHandler
void(* TxRxHandler)(SpiIf_Ch *handle)
Definition: SpiIf.h:209
IfxQspi_SpiMaster_Config::pins
IFX_CONST IfxQspi_SpiMaster_Pins * pins
structure for QSPI Master pins
Definition: IfxQspi_SpiMaster.h:685
IfxQspi_SpiMaster_Mode_xxl
XXL Mode.
Definition: IfxQspi_SpiMaster.h:541
SpiIf_::activeChannel
SpiIf_Ch * activeChannel
Channel actually transmitting / receiving.
Definition: SpiIf.h:154
IfxQspi_SpiMaster_isrPhaseTransition
IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrPhaseTransition(IfxQspi_SpiMaster *handle)
Phase Transition interrupt handler.
Definition: IfxQspi_SpiMaster.c:710
IfxQspi_SpiMaster_Input::mode
IfxPort_InputMode mode
The SLSI pin input mode.
Definition: IfxQspi_SpiMaster.h:557
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxQspi_write16
void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO.
Definition: IfxQspi.c:412
Spi_ErrorChecks::reserved
uint32 reserved
Definition: SpiIf.h:182
IfxQspi_Error_rxfifoOverflow
RX FIFO Overflow Error.
Definition: IfxQspi.h:131
IfxQspi_Sclk_Out
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:112
IfxQspi_SpiMaster_Config::dma
IfxQspi_SpiMaster_DmaConfig dma
Dma configuration.
Definition: IfxQspi_SpiMaster.h:686
Ifx_ParityMode_even
Definition: Ifx_Types.h:121
IfxDma_Dma_ChannelConfig::blockMode
IfxDma_ChannelMove blockMode
Number of moves in a transfer.
Definition: IfxDma_Dma.h:490
SpiIf_ChMode::parityCheck
uint32 parityCheck
0 = disabled, 1 = enabled
Definition: SpiIf.h:198
IfxQspi_SpiMaster_setChannelBaudrate
SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate(IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate)
Set the channel baudrate.
Definition: IfxQspi_SpiMaster.c:890
float32
float float32
Definition: Platform_Types.h:170
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxDma_setChannelDestinationIncrementStep
IFX_INLINE void IfxDma_setChannelDestinationIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel destination pointer.
Definition: IfxDma.h:1589
IfxQspi_SpiMaster_Config::rxFifoMode
IfxQspi_FifoMode rxFifoMode
Specifies the Receive FIFO mode.
Definition: IfxQspi_SpiMaster.h:688
IfxDma_Dma_ChannelConfig::sourceCircularBufferEnabled
boolean sourceCircularBufferEnabled
Enables/Disables the source circular buffering.
Definition: IfxDma_Dma.h:505
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxQspi_writeBasicConfigurationBeginStream
IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 0.
Definition: IfxQspi.h:1209
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxDma_enableChannelTransaction
IFX_INLINE void IfxDma_enableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable a DMA channel hardware transaction request.
Definition: IfxDma.h:1337
IfxQspi_SpiMaster_Output::driver
IfxPort_PadDriver driver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiMaster.h:566
IfxQspi_SpiMaster_Config::allowSleepMode
boolean allowSleepMode
Specifies module sleep mode.
Definition: IfxQspi_SpiMaster.h:680
IfxQspi_SpiMaster_exchange
SpiIf_Status IfxQspi_SpiMaster_exchange(IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data.
Definition: IfxQspi_SpiMaster.c:140
IfxDma_Dma_ChannelConfig::destinationCircularBufferEnabled
boolean destinationCircularBufferEnabled
Enables/Disables the destination circular buffering.
Definition: IfxDma_Dma.h:506
IfxQspi_FifoMode_combinedMove
Combined Move Mode.
Definition: IfxQspi.h:287
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
SpiIf_ClockPolarity_idleHigh
Definition: SpiIf.h:104
IfxDma_Dma_ChannelConfig::hardwareRequestEnabled
boolean hardwareRequestEnabled
Enabling channel transaction via hardware request.
Definition: IfxDma_Dma.h:497
IfxQspi_SpiMaster_ErrorFlags::rxFifoOverflowError
uint16 rxFifoOverflowError
[5:5] RxFifo Overflow Error
Definition: IfxQspi_SpiMaster.h:602
Spi_ErrorChecks::baudrate
uint32 baudrate
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:178
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:933
IfxDma_setChannelSourceIncrementStep
IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel source pointer.
Definition: IfxDma.h:1648
IfxPort_State
IfxPort_State
Ifx_P output modification modes definition.
Definition: IfxPort.h:170
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
SpiIf_Ch_::baudrate
sint32 baudrate
Real baudrate.
Definition: SpiIf.h:216
IFX_ASSERT_FEATURE_NOT_IMPLEMENTED
#define IFX_ASSERT_FEATURE_NOT_IMPLEMENTED
Constant to be used to indicate not implemented feature.
Definition: Ifx_Assert.h:64
IfxQspi_SpiMaster_Config::pauseOnBaudrateSpikeErrors
boolean pauseOnBaudrateSpikeErrors
Specifies module pause on baudrate or spike errors.
Definition: IfxQspi_SpiMaster.h:681
IfxQspi_SpiMaster_Config
Module configuration structure.
Definition: IfxQspi_SpiMaster.h:676
IfxQspi_run
IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi)
Request for QSPI in Run state.
Definition: IfxQspi.h:1127
IfxQspi_SpiMaster_isrTransmit
void IfxQspi_SpiMaster_isrTransmit(IfxQspi_SpiMaster *handle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:738
IfxQspi_setSleepMode
IFX_INLINE void IfxQspi_setSleepMode(Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
Sets the disable module request.
Definition: IfxQspi.h:1178
IfxQspi_calculateExtendedConfigurationValue
uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values.
Definition: IfxQspi.c:96
IfxDma_Dma_ChannelConfig::channelInterruptPriority
Ifx_Priority channelInterruptPriority
Priority of the channel interrupt trigger.
Definition: IfxDma_Dma.h:514
FALSE
#define FALSE
Definition: Platform_Types.h:93
SpiIf_ChMode::csInactiveDelay
SpiIf_SlsoTiming_HalfTsclk csInactiveDelay
CS Inactive Delay in Tsclk/2 units.
Definition: SpiIf.h:201
IfxDma_getAndClearChannelInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to...
Definition: IfxDma.h:1375
IfxQspi_SpiMaster_ErrorFlags::txFifoOverflowError
uint16 txFifoOverflowError
[3:3] TxFifo Overflow Error
Definition: IfxQspi_SpiMaster.h:600
IFX_VERBOSE_LEVEL_WARNING
#define IFX_VERBOSE_LEVEL_WARNING
Assertion level warning.
Definition: Ifx_Assert.h:59
IfxQspi_setEnableModuleRequest
IFX_INLINE void IfxQspi_setEnableModuleRequest(Ifx_QSPI *qspi)
Sets the enable module request.
Definition: IfxQspi.h:1160
IfxQspi_calculateBasicConfigurationValue
uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values.
Definition: IfxQspi.c:67
IfxQspi_readReceiveFifo
IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
Read the oldest data from RXFIFO.
Definition: IfxQspi.h:1115
IfxQspi_SpiMaster_initChannelConfig
void IfxQspi_SpiMaster_initChannelConfig(IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
Fills the config structure with default values.
Definition: IfxQspi_SpiMaster.c:319
IfxQspi_SpiMaster_Dma::txDmaChannelId
IfxDma_ChannelId txDmaChannelId
DMA channel no for the Spi transmit.
Definition: IfxQspi_SpiMaster.h:580
SpiIf_DataHeading_msbFirst
Definition: SpiIf.h:90
IfxQspi_SpiMaster_Input::pin
IFX_CONST IfxQspi_Slsi_In * pin
Pointer to SLSI in pin.
Definition: IfxQspi_SpiMaster.h:556
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxQspi_SpiMaster.h
QSPI SPIMASTER details.
IfxPort_OutputIdx_general
Definition: IfxPort.h:119
IfxQspi_SpiMaster_Channel_s::firstWrite
boolean firstWrite
Specifies whether the data id first write or not.
Definition: IfxQspi_SpiMaster.h:668
IfxQspi_SpiMaster_Config::txFifoThreshold
IfxQspi_TxFifoInt txFifoThreshold
Specifies the TXFIFO interrupt threshold.
Definition: IfxQspi_SpiMaster.h:683
SpiIf_Status_ok
Definition: SpiIf.h:68
SpiIf_ChMode::clockPolarity
uint32 clockPolarity
SpiIf_ClockPolarity
Definition: SpiIf.h:191
IfxQspi_ChannelId
IfxQspi_ChannelId
QSPI channel Number (BACON.CS)
Definition: IfxQspi.h:94
SpiIf_Config::maximumBaudrate
float32 maximumBaudrate
Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock...
Definition: SpiIf.h:173
IfxQspi_PauseRunTransition_pause
Request value for pause.
Definition: IfxQspi.h:172
IfxQspi_Mtsr_Out
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:104
IfxQspi_getTransmitSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getTransmitSrc(Ifx_QSPI *qspi)
Gets the TXFIFO service request.
Definition: IfxQspi.h:1023
IfxQspi_Slso_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxQspi_PinMap.h:125
IfxQspi_RxFifoInt_0
RxFifo Interrupt Threshold #0.
Definition: IfxQspi.h:218
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:656
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:144
IfxDma_ChannelMove_1
1 DMA move per DMA transfer
Definition: IfxDma.h:159
SpiIf_funcs::onTx
SpiIf_OnEvent onTx
Definition: SpiIf.h:145
IfxQspi_SpiMaster_Pins::mtsr
IFX_CONST IfxQspi_Mtsr_Out * mtsr
Pointer to MTSR out pin.
Definition: IfxQspi_SpiMaster.h:621
IfxDma_ChannelMoveSize_32bit
1 DMA move is 32 bit wide
Definition: IfxDma.h:176
IfxQspi_Slso_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxQspi_PinMap.h:124
IfxDma_Dma_ChannelConfig::transferCount
uint16 transferCount
Number of transfers in a transaction.
Definition: IfxDma_Dma.h:489
SpiIf_funcs::exchange
SpiIf_Exchange exchange
Definition: SpiIf.h:143
__swap
#define __swap
Definition: IfxCpu_IntrinsicsDcc.h:2085
IfxQspi_SpiMaster_Pins::sclkMode
IfxPort_OutputMode sclkMode
The SCLK pin output mode.
Definition: IfxQspi_SpiMaster.h:620
IfxQspi_SpiMaster::qspi
Ifx_QSPI * qspi
Pointer to QSPI module registers.
Definition: IfxQspi_SpiMaster.h:637
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:70
SpiIf_::functions
SpiIf_funcs functions
Definition: SpiIf.h:157
IfxQspi_getReceiveFifoLevel
IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of RXFIFO.
Definition: IfxQspi.h:992
IfxDma_ChannelIncrementStep_1
increment by 1 width
Definition: IfxDma.h:135
IfxQspi_SpiMaster::maximumBaudrate
float32 maximumBaudrate
Maximum Baud Rate for the SPI Module.
Definition: IfxQspi_SpiMaster.h:639
SpiIf_ChMode::shiftClock
uint32 shiftClock
SpiIf_ShiftClock
Definition: SpiIf.h:192
IfxQspi_SpiMaster_ErrorFlags::txFifoUnderflowError
uint16 txFifoUnderflowError
[4:4] TxFifo underflow Error
Definition: IfxQspi_SpiMaster.h:601
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:83
SpiIf_initChannelConfig
void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver)
Definition: SpiIf.c:57
IfxQspi_initMtsrOutPin
IFX_INLINE void IfxQspi_initMtsrOutPin(const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver)
Initializes a MTSR output.
Definition: IfxQspi.h:1057
IFXCPU_GLB_ADDR_DSPR
#define IFXCPU_GLB_ADDR_DSPR(cpu, address)
Convert local DSPR address to global DSPR address which can be accessed from the SRI bus...
Definition: IfxCpu.h:90
IfxQspi_write32
void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO.
Definition: IfxQspi.c:425
IfxQspi_Error_txfifoUnderflow
TX FIFO Underflow Error.
Definition: IfxQspi.h:130
IfxPort_setPinState
IFX_INLINE void IfxPort_setPinState(Ifx_P *port, uint8 pinIndex, IfxPort_State action)
Set / Resets / Toggle the port output.
Definition: IfxPort.h:590
IfxQspi_initSclkOutPin
IFX_INLINE void IfxQspi_initSclkOutPin(const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output.
Definition: IfxQspi.h:1071
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxQspi_SpiMaster_ErrorFlags::configurationError
uint16 configurationError
[1:1] Configuration Error
Definition: IfxQspi_SpiMaster.h:598
SpiIf_::txCount
uint32 txCount
Definition: SpiIf.h:155
IfxDma_ChannelRequestMode_oneTransferPerRequest
a request initiates a single transfer
Definition: IfxDma.h:220
IfxQspi_getReceiveSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getReceiveSrc(Ifx_QSPI *qspi)
Gets the RXFIFO service request.
Definition: IfxQspi.h:998
IfxQspi_SpiMaster_Output::pin
IFX_CONST IfxQspi_Slso_Out * pin
Pointer to SLSO out pin.
Definition: IfxQspi_SpiMaster.h:564
IfxDma_ChannelIncrementCircular_4
circular buffer size is 4 byte
Definition: IfxDma.h:105
IfxDma_Dma_createModuleHandle
void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it&#39;s en...
Definition: IfxDma_Dma.c:121
SpiIf_Status_busy
Definition: SpiIf.h:69
IfxQspi_SpiMaster_Channel_s::dummyTxValue
uint32 dummyTxValue
Dummy TX value, which will be sent for "recieve only" mode.
Definition: IfxQspi_SpiMaster.h:663
SpiIf_Flags::onTransfer
uint32 onTransfer
Channel status: On transfer.
Definition: SpiIf.h:117
IfxQspi_SpiMaster_Channel_s::errorFlags
IfxQspi_SpiMaster_ErrorFlags errorFlags
Spi Master Error Flags.
Definition: IfxQspi_SpiMaster.h:671
IfxQspi_SpiMaster_Dma::useDma
boolean useDma
use Dma for Data transfer/s
Definition: IfxQspi_SpiMaster.h:581
IfxDma_Dma
DMA base address data structure (Module handle)
Definition: IfxDma_Dma.h:460
IfxQspi_Mrst_In
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:56
SpiIf_ChMode::enabled
uint32 enabled
1 = channel enabled, 0 = channel disabled
Definition: SpiIf.h:188
SpiIf_Ch_::flags
SpiIf_Flags flags
Definition: SpiIf.h:214
IfxQspi_SleepMode_disable
Sleep Mode disabled.
Definition: IfxQspi.h:230
IfxQspi_SpiMaster_Mode_long
Long Mode.
Definition: IfxQspi_SpiMaster.h:538
IfxDma_disableChannelTransaction
IFX_INLINE void IfxDma_disableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable a DMA channel hardware transaction request.
Definition: IfxDma.h:1293
IfxQspi_SpiMaster_read
IFX_STATIC void IfxQspi_SpiMaster_read(IfxQspi_SpiMaster_Channel *chHandle)
Reads data from the Rx FIFO.
Definition: IfxQspi_SpiMaster.c:837
SpiIf_Exchange
SpiIf_Status(* SpiIf_Exchange)(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
Definition: SpiIf.h:135
IFXQSPI_ERRORENABLEMASK
#define IFXQSPI_ERRORENABLEMASK
Errors enable mask for ERRORENS.
Definition: IfxQspi.h:84
IfxDma_ChannelOperationMode_single
channel disabled after transaction
Definition: IfxDma.h:187
IfxQspi_SpiMaster_Config::base
SpiIf_Config base
SPI interface configuration structure.
Definition: IfxQspi_SpiMaster.h:678
SpiIf_ChMode::parityMode
uint32 parityMode
Ifx_ParityMode
Definition: SpiIf.h:199
Spi_ErrorChecks::transmit
uint32 transmit
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:181
IfxDma_getAndClearChannelPatternDetectionInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the pattern detection interrupt flag.
Definition: IfxDma.h:1390
IfxQspi_SpiMaster_Channel_s::channelBasedCs
IfxQspi_SpiMaster_ChannelBasedCs channelBasedCs
define the slso behaviour
Definition: IfxQspi_SpiMaster.h:669
SpiIf_initConfig
void SpiIf_initConfig(SpiIf_Config *config)
Definition: SpiIf.c:44
IfxQspi_SpiMaster_Channel_s::dataWidth
uint8 dataWidth
Number of bits which will be written into the FIFO.
Definition: IfxQspi_SpiMaster.h:667
IfxQspi_getErrorSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getErrorSrc(Ifx_QSPI *qspi)
Gets the Error request value.
Definition: IfxQspi.h:965
IfxQspi_SpiMaster::base
SpiIf base
Module SPI interface handle.
Definition: IfxQspi_SpiMaster.h:636
SpiIf_Config::erPriority
Ifx_Priority erPriority
Specifies the priority of the error interrupt.
Definition: SpiIf.h:165
SpiIf_ClockPolarity_idleLow
Definition: SpiIf.h:103
IfxDma_setChannelTransferCount
IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction.
Definition: IfxDma.h:1665
SpiIf_Ch_::rx
SpiIf_Job rx
Definition: SpiIf.h:218
__ldmst
#define __ldmst
Definition: IfxCpu_IntrinsicsDcc.h:2065
SpiIf_::rxCount
uint32 rxCount
Definition: SpiIf.h:156
IfxQspi_read32
void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO.
Definition: IfxQspi.c:325
IfxPort_State_low
Ifx_P pin is set to low.
Definition: IfxPort.h:174
SpiIf_GetStatus
SpiIf_Status(* SpiIf_GetStatus)(SpiIf_Ch *handle)
Definition: SpiIf.h:136
IfxQspi_SpiMaster_Channel_s::mode
IfxQspi_SpiMaster_Mode mode
Qspi Operating Mode.
Definition: IfxQspi_SpiMaster.h:670
SpiIf_DataHeading_lsbFirst
Definition: SpiIf.h:89
IfxDma_Dma_ChannelConfig::operationMode
IfxDma_ChannelOperationMode operationMode
keep enable/disable the hardware channel request after a transaction
Definition: IfxDma_Dma.h:492
SpiIf_Job::remaining
Ifx_SizeT remaining
Definition: SpiIf.h:124
IfxDma_ChannelIncrementDirection_positive
pointer is incremented
Definition: IfxDma.h:127
SpiIf_::sending
uint32 sending
Definition: SpiIf.h:153
IfxQspi_SpiMaster_Mode_longContinuous
Long Continous Mode.
Definition: IfxQspi_SpiMaster.h:540
IfxSrc_clearRequest
IFX_INLINE void IfxSrc_clearRequest(volatile Ifx_SRC_SRCR *src)
Resets a specific interrupt service by software.
Definition: IfxSrc.h:247
IfxQspi_SpiMaster_Pins::mrst
IFX_CONST IfxQspi_Mrst_In * mrst
Pointer to MRST in pin.
Definition: IfxQspi_SpiMaster.h:623
IfxQspi_calculateTimeQuantumLength
uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length.
Definition: IfxQspi.c:233
IfxQspi_SpiMaster_packLongModeBuffer
void IfxQspi_SpiMaster_packLongModeBuffer(IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
pack data to Long mode buffer
Definition: IfxQspi_SpiMaster.c:768
uint16
unsigned short uint16
Definition: Platform_Types.h:112
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
IfxDma_Dma_ChannelConfig
Configuration data structure of the channel.
Definition: IfxDma_Dma.h:480
IfxQspi_SpiMaster_isrUserDefined
IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrUserDefined(IfxQspi_SpiMaster *handle)
User defined interrupt handler.
Definition: IfxQspi_SpiMaster.c:746
IfxQspi_SpiMaster_InputOutput::input
IfxQspi_SpiMaster_Input input
SLSI pin configuration structure.
Definition: IfxQspi_SpiMaster.h:611
SpiIf_Ch_::txHandler
TxRxHandler txHandler
Definition: SpiIf.h:221
IfxQspi_SpiMaster_isrDmaTransmit
void IfxQspi_SpiMaster_isrDmaTransmit(IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:586
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge
Definition: SpiIf.h:96
IfxDma_clearChannelInterrupt
IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag.
Definition: IfxDma.h:1262
IfxDma_Dma_initChannel
void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel
Definition: IfxDma_Dma.c:141
IfxQspi_SpiMaster_Dma::txDmaChannel
IfxDma_Dma_Channel txDmaChannel
transmit DMA channel handle
Definition: IfxQspi_SpiMaster.h:578
IfxQspi_SpiMaster_isrReceive
void IfxQspi_SpiMaster_isrReceive(IfxQspi_SpiMaster *handle)
Receive Interrupt handler.
Definition: IfxQspi_SpiMaster.c:730
SpiIf_Config::isrProvider
IfxSrc_Tos isrProvider
Specifies the handler of the interrupts.
Definition: SpiIf.h:166
SpiIf_Job
Definition: SpiIf.h:121
SpiIf_ChMode::autoCS
uint32 autoCS
1 = chip select is controlled by the hardware module or, 0 = by software.
Definition: SpiIf.h:189
IfxQspi_SpiMaster_Channel_s::activateSlso
IfxQspi_SpiMaster_AutoSlso activateSlso
Specifies function for Auto SLSO activation.
Definition: IfxQspi_SpiMaster.h:661
SpiIf_Ch_::driver
SpiIf * driver
Pointer to the SPI interface driver.
Definition: SpiIf.h:213
SpiIf_Config::rxPriority
Ifx_Priority rxPriority
Specifies the priority of the receive interrupt.
Definition: SpiIf.h:163
IfxQspi_SpiMaster_Config::rxFifoThreshold
IfxQspi_RxFifoInt rxFifoThreshold
Specifies the RXFIFO interrupt threshold.
Definition: IfxQspi_SpiMaster.h:684
Spi_ErrorChecks::phase
uint32 phase
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:179
IfxQspi_SpiMaster_unlock
IFX_STATIC void IfxQspi_SpiMaster_unlock(IfxQspi_SpiMaster *handle)
Unlocks the transfers.
Definition: IfxQspi_SpiMaster.c:905
IFXQSPI_FIFO32BITSIZE
#define IFXQSPI_FIFO32BITSIZE(Datasize)
Definition: IfxQspi.h:78
IfxQspi_SpiMaster_ChannelConfig::base
SpiIf_ChConfig base
SPI interface channel configuration structure.
Definition: IfxQspi_SpiMaster.h:646
IfxDma_setChannelDestinationAddress
IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address.
Definition: IfxDma.h:1583
sint32
long sint32
Definition: Platform_Types.h:134
IfxQspi_initMrstInPinWithPadLevel
IFX_INLINE void IfxQspi_initMrstInPinWithPadLevel(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MRSTIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1271
IfxQspi_clearAllEventFlags
IFX_INLINE void IfxQspi_clearAllEventFlags(Ifx_QSPI *qspi)
Clear ALL service requests.
Definition: IfxQspi.h:903
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxQspi_SpiMaster_write
IFX_STATIC void IfxQspi_SpiMaster_write(IfxQspi_SpiMaster_Channel *chHandle)
Writes data into the Tx FIFO.
Definition: IfxQspi_SpiMaster.c:911
IfxQspi_SpiMaster_initModule
void IfxQspi_SpiMaster_initModule(IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
Initialises the module.
Definition: IfxQspi_SpiMaster.c:334
IfxQspi_SpiMaster_initModuleConfig
void IfxQspi_SpiMaster_initModuleConfig(IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values.
Definition: IfxQspi_SpiMaster.c:546
IfxQspi_writeTransmitFifo
IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register.
Definition: IfxQspi.h:1242
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxDma_setChannelMoveSize
IFX_INLINE void IfxDma_setChannelMoveSize(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
Configure a DMA channel move.
Definition: IfxDma.h:1612
IfxQspi_Mode_master
QSPI in "master" mode.
Definition: IfxQspi.h:163
IfxDma_ChannelId_none
None of the Ifx_DMA Channels.
Definition: IfxDma_cfg.h:104
IfxQspi_writeBasicConfigurationEndStream
IFX_INLINE void IfxQspi_writeBasicConfigurationEndStream(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 1.
Definition: IfxQspi.h:1219
IfxQspi_SpiMaster_Channel_s::dummyRxValue
uint32 dummyRxValue
Dummy Rx value, for "transmit only" modes.
Definition: IfxQspi_SpiMaster.h:664
SpiIf_Ch_::rxHandler
TxRxHandler rxHandler
Definition: SpiIf.h:222
IfxCpu_areInterruptsEnabled
IFX_INLINE boolean IfxCpu_areInterruptsEnabled(void)
API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API p...
Definition: IfxCpu.h:648
IfxDma_Dma_ChannelConfig::destinationAddress
uint32 destinationAddress
Destination address for the DMA channel.
Definition: IfxDma_Dma.h:485
IfxQspi_Error_expectTimeout
EXPECT Timeout Error.
Definition: IfxQspi.h:133
IfxQspi_SpiMaster_Pins::sclk
IFX_CONST IfxQspi_Sclk_Out * sclk
Pointer to SLCK out pin.
Definition: IfxQspi_SpiMaster.h:619
SpiIf_ChMode::csTrailDelay
SpiIf_SlsoTiming_HalfTsclk csTrailDelay
CS Trail Delay in Tsclk/2 units.
Definition: SpiIf.h:203
IfxQspi_SpiMaster_deactivateSlso
IFX_STATIC void IfxQspi_SpiMaster_deactivateSlso(IfxQspi_SpiMaster_Channel *chHandle)
Deactive the SLSO pin.
Definition: IfxQspi_SpiMaster.c:133
SpiIf_ChConfig_::mode
SpiIf_ChMode mode
Definition: SpiIf.h:229
IfxCpu_getCoreId
IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu&#39;s may not be continguous and...
Definition: IfxCpu.h:770
SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge
Definition: SpiIf.h:97
IfxQspi_SpiMaster_ErrorFlags::baudrateError
uint16 baudrateError
[2:2] baudrate Error
Definition: IfxQspi_SpiMaster.h:599
IfxDma_Dma_ChannelConfig::requestMode
IfxDma_ChannelRequestMode requestMode
A service request initiates a single transfer, or the complete transaction.
Definition: IfxDma_Dma.h:491
IfxDma_Dma_ChannelConfig::destinationAddressCircularRange
IfxDma_ChannelIncrementCircular destinationAddressCircularRange
Determines which part of the destination address remains unchanged and therby not updated after each ...
Definition: IfxDma_Dma.h:503
IfxQspi_Error_configuration
Configuration Error.
Definition: IfxQspi.h:127
IfxQspi_SpiMaster_ChannelConfig::sls
IfxQspi_SpiMaster_InputOutput sls
Union of Slave Select pins.
Definition: IfxQspi_SpiMaster.h:649
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxQspi_initSlso
IFX_INLINE void IfxQspi_initSlso(const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex)
Initializes a SLSO output.
Definition: IfxQspi.h:1086
IfxQspi_write8
void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO.
Definition: IfxQspi.c:438
IfxQspi_SpiMaster_Channel_s::base
SpiIf_Ch base
SPI interface channel handle structure.
Definition: IfxQspi_SpiMaster.h:658
IfxQspi_SpiMaster_activateSlso
IFX_STATIC void IfxQspi_SpiMaster_activateSlso(IfxQspi_SpiMaster_Channel *chHandle)
Active the SLSO pin.
Definition: IfxQspi_SpiMaster.c:120
IfxQspi_SpiMaster_getStatus
SpiIf_Status IfxQspi_SpiMaster_getStatus(IfxQspi_SpiMaster_Channel *chHandle)
Gets the transmission status.
Definition: IfxQspi_SpiMaster.c:217
SpiIf_Status
SpiIf_Status
SPI Interface Status.
Definition: SpiIf.h:66
IfxDma_Dma_ChannelConfig::channelInterruptEnabled
boolean channelInterruptEnabled
The channel transfer interrupt should be triggered. See also channelInterruptControl.
Definition: IfxDma_Dma.h:510
IfxQspi_SpiMaster_ErrorFlags::rxFifoUnderflowError
uint16 rxFifoUnderflowError
[6:6] RxFifo underflow Error
Definition: IfxQspi_SpiMaster.h:603
IfxQspi_getTransmitFifoLevel
IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of TXFIFO.
Definition: IfxQspi.h:1017
IfxQspi_SpiMaster_initChannel
SpiIf_Status IfxQspi_SpiMaster_initChannel(IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
Initializes the channel.
Definition: IfxQspi_SpiMaster.c:230
Ifx_ParityMode_odd
Definition: Ifx_Types.h:122
IfxQspi_SpiMaster_Pins
Master pin IO configuration structure.
Definition: IfxQspi_SpiMaster.h:617
SpiIf_funcs::onError
SpiIf_OnEvent onError
Definition: SpiIf.h:147
TRUE
#define TRUE
Definition: Platform_Types.h:90
SpiIf_ChMode::csActiveLevel
uint32 csActiveLevel
Ifx_ActiveState
Definition: SpiIf.h:196
IfxQspi_SpiMaster_getChannelConfig
SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig(IfxQspi_SpiMaster_Channel *chHandle)
Gets the channel configuration.
Definition: IfxQspi_SpiMaster.c:182
SpiIf_Config::txPriority
Ifx_Priority txPriority
Specifies the priority of the transmit interrupt.
Definition: SpiIf.h:164
IfxQspi_SleepMode_enable
Sleep Mode enabled.
Definition: IfxQspi.h:229
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxQspi_SpiMaster_ChannelConfig
Module Channel configuration structure.
Definition: IfxQspi_SpiMaster.h:644
IfxQspi_Slso_Out::slsoNr
sint32 slsoNr
Slave Select.
Definition: IfxQspi_PinMap.h:123
IfxQspi_SpiMaster_ErrorFlags::expectTimeoutError
uint16 expectTimeoutError
[7:7] Expect Timeout Error
Definition: IfxQspi_SpiMaster.h:604
IfxQspi_SpiMaster_lock
IFX_STATIC SpiIf_Status IfxQspi_SpiMaster_lock(IfxQspi_SpiMaster *handle)
Locks the transfer and gets the current status of it.
Definition: IfxQspi_SpiMaster.c:761
IfxQspi_SpiMaster_ErrorFlags::parityError
uint16 parityError
[0:0] Parity Error
Definition: IfxQspi_SpiMaster.h:597
IfxQspi_SpiMaster_Dma::rxDmaChannelId
IfxDma_ChannelId rxDmaChannelId
DMA channel no for the Spi recieve.
Definition: IfxQspi_SpiMaster.h:579
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxDma_Dma_ChannelConfig::channelInterruptTypeOfService
IfxSrc_Tos channelInterruptTypeOfService
Interrupt service provider.
Definition: IfxDma_Dma.h:515
IFXQSPI_BACONSIZE
#define IFXQSPI_BACONSIZE(Datasize)
Get Fifo size required for Long / Long continous mode interms 32-bit LONG MODE FIFO size (data size i...
Definition: IfxQspi.h:76
IfxQspi_SpiMaster::dma
IfxQspi_SpiMaster_Dma dma
dma handle
Definition: IfxQspi_SpiMaster.h:638
SpiIf_ChConfig_::errorChecks
Spi_ErrorChecks errorChecks
Definition: SpiIf.h:230
IfxQspi_SpiMaster_InputOutput::output
IfxQspi_SpiMaster_Output output
SLSO pin configuration structure.
Definition: IfxQspi_SpiMaster.h:612
SpiIf_Job::data
void * data
Definition: SpiIf.h:123
SpiIf_OnEvent
void(* SpiIf_OnEvent)(SpiIf *handle)
Definition: SpiIf.h:137
IfxDma_ChannelIncrementCircular_none
no circular buffer operation
Definition: IfxDma.h:103
Spi_ErrorChecks::receive
uint32 receive
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:180
IfxQspi_SpiMaster_Channel_s
Module Channel handle structure.
Definition: IfxQspi_SpiMaster.h:656


iLLD_TC26B: IfxQspi_SpiMaster.h Source File

  • Qspi
  • SpiMaster
IfxQspi_SpiMaster.h
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_SpiMaster.h
3 * \brief QSPI SPIMASTER details
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Qspi_SpiMaster_Usage How to use the SPI Master Interface driver?
44 * \ingroup IfxLld_Qspi
45 *
46 * The SPI Master interface driver provides a default QSPI configuration for a bidirectional serial communication of data words.
47 *
48 * Data transactions are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the QSPI peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.
49 * Optionally Dma can be used for data transfers. Only the interrupt configuration and Module initialisation are different when dma is used.
50 *
51 * In the following sections it will be described, how to integrate the driver into the application framework.
52 *
53 * \section IfxLld_Qspi_SpiMaster_Preparation Preparation
54 * \subsection IfxLld_Qspi_SpiMaster_Include Include Files
55 *
56 * Include following header file into your C code:
57 * \code
58 * #include <Qspi/SpiMaster/IfxQspi_SpiMaster.h>
59 * \endcode
60 *
61 * \subsection IfxLld_Qspi_SpiMaster_Variables Variables
62 *
63 * Declare QSPI module and channel handles:
64 *
65 * \code
66 * IfxQspi_SpiMaster spi;
67 * IfxQspi_SpiMaster_Channel spiChannel;
68 * \endcode
69 *
70 * In addition, declare global transmit and receive buffers for the data transfers:
71 * \code
72 * #define SPI_BUFFER_SIZE 8
73 * uint8 spiTxBuffer[SPI_BUFFER_SIZE];
74 * uint8 spiRxBuffer[SPI_BUFFER_SIZE];
75 * \endcode
76 *
77 * \subsection IfxLld_Qspi_SpiMaster_Interrupt Interrupt Handler Installation (without dma use)
78 *
79 * See also \ref IfxLld_Cpu_Irq_Usage
80 *
81 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
82 * \code
83 * // priorities are normally defined in Ifx_IntPrioDef.h
84 * #define IFX_INTPRIO_QSPI0_TX 1
85 * #define IFX_INTPRIO_QSPI0_RX 2
86 * #define IFX_INTPRIO_QSPI0_ER 5
87 * \endcode
88 *
89 * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
90 * \code
91 * IFX_INTERRUPT(qspi0TxISR, 0, IFX_INTPRIO_QSPI0_TX)
92 * {
93 * IfxQspi_SpiMaster_isrTransmit(&spi);
94 * }
95 *
96 * IFX_INTERRUPT(qspi0RxISR, 0, IFX_INTPRIO_QSPI0_RX)
97 * {
98 * IfxQspi_SpiMaster_isrReceive(&spi);
99 * }
100 *
101 * IFX_INTERRUPT(qspi0ErISR, 0, IFX_INTPRIO_QSPI0_ER)
102 * {
103 * IfxQspi_SpiMaster_isrError(&spi);
104 *
105 * // Process errors. Eg: parity Error is checked below
106 * IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(&spi);
107 * if( chHandle->errorFlags.parityError == 1)
108 * {
109 * // Parity Error
110 * }
111 * }
112 * \endcode
113 *
114 * Finally install the interrupt handlers in your initialisation function:
115 * \code
116 * // install interrupt handlers
117 * IfxCpu_Irq_installInterruptHandler(&qspi0TxISR, IFX_INTPRIO_QSPI0_TX);
118 * IfxCpu_Irq_installInterruptHandler(&qspi0RxISR, IFX_INTPRIO_QSPI0_RX);
119 * IfxCpu_Irq_installInterruptHandler(&qspi0ErISR, IFX_INTPRIO_QSPI0_ER);
120 * IfxCpu_enableInterrupts();
121 * \endcode
122 *
123 * \subsection IfxLld_Qspi_SpiMaster_Interrupt_dma Interrupt Handler Installation (with dma use)
124 *
125 * See also \ref IfxLld_Cpu_Irq_Usage
126 *
127 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
128 * \code
129 * // qspi priorities
130 * #define IFX_INTPRIO_QSPI0_TX 1 // DMA channel 1
131 * #define IFX_INTPRIO_QSPI0_RX 2 // DMA channel 2
132 * #define IFX_INTPRIO_QSPI0_ER 0x30
133 *
134 * // dma priorities
135 * #define IFX_INTPRIO_DMA_CH1 10
136 * #define IFX_INTPRIO_DMA_CH2 11
137 * \endcode
138 *
139 * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
140 * \code
141 * IFX_INTERRUPT(qspi0DmaTxISR, 0, IFX_INTPRIO_DMA_CH1 )
142 * {
143 * IfxQspi_SpiMaster_isrDmaTransmit(&spi);
144 * }
145 *
146 * IFX_INTERRUPT(qspi0DmaRxISR, 0, IFX_INTPRIO_DMA_CH2)
147 * {
148 * IfxQspi_SpiMaster_isrDmaReceive(&spi);
149 * }
150 *
151 * IFX_INTERRUPT(qspi0ErISR, 0, IFX_INTPRIO_QSPI0_ER)
152 * {
153 * IfxQspi_SpiMaster_isrError(&spi);
154 *
155 * // Process errors. Eg: parity Error is checked below
156 * IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(&spi);
157 * if( chHandle->errorFlags.parityError == 1)
158 * {
159 * // Parity Error
160 * }
161 * }
162 * \endcode
163 *
164 * Finally install the interrupt handlers in your initialisation function:
165 * \code
166 * // install interrupt handlers
167 * IfxCpu_Irq_installInterruptHandler(&qspi0DmaTxISR, IFX_INTPRIO_DMA_CH1);
168 * IfxCpu_Irq_installInterruptHandler(&qspi0DmaRxISR, IFX_INTPRIO_DMA_CH2);
169 * IfxCpu_Irq_installInterruptHandler(&qspi0ErISR, IFX_INTPRIO_QSPI0_ER);
170 * IfxCpu_enableInterrupts();
171 * \endcode
172 *
173 *
174 * \subsection IfxLld_Qspi_SpiMaster_Init Module Initialisation (without dma use)
175 *
176 * The module initialisation can be done in the same function.
177 *
178 * Here an example for master mode:
179 * \code
180 * // create module config
181 * IfxQspi_SpiMaster_Config spiMasterConfig;
182 * IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
183 *
184 * // set the desired mode and maximum baudrate
185 * spiMasterConfig.base.mode = SpiIf_Mode_master;
186 * spiMasterConfig.base.maximumBaudrate = 10000000;
187 *
188 * // ISR priorities and interrupt target
189 * spiMasterConfig.base.txPriority = IFX_INTPRIO_QSPI0_TX;
190 * spiMasterConfig.base.rxPriority = IFX_INTPRIO_QSPI0_RX;
191 * spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
192 * spiMasterConfig.base.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
193 *
194 * // pin configuration
195 * const IfxQspi_SpiMaster_Pins pins = {
196 * &IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
197 * &IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
198 * &IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
199 * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
200 * };
201 * spiMasterConfig.pins = &pins;
202 *
203 * // initialize module
204 * //IfxQspi_SpiMaster spi; // defined globally
205 * IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);
206 * \endcode
207 *
208 * \subsection IfxLld_Qspi_SpiMaster_Init_dma Module Initialisation (with dma use)
209 *
210 * The module initialisation can be done in the same function.
211 *
212 * Here an example for master mode:
213 * \code
214 * // create module config
215 * IfxQspi_SpiMaster_Config spiMasterConfig;
216 * IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
217 *
218 * // set the desired mode and maximum baudrate
219 * spiMasterConfig.base.mode = SpiIf_Mode_master;
220 * spiMasterConfig.base.maximumBaudrate = 10000000;
221 *
222 * // ISR priorities and interrupt target (with Dma usage)
223 * spiMasterConfig.base.txPriority = IFX_INTPRIO_DMA_CH1;
224 * spiMasterConfig.base.rxPriority = IFX_INTPRIO_DMA_CH2;
225 * spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
226 *
227 * // dma configuration.
228 * spiMasterConfig.dma.txDmaChannelId = IfxDma_ChannelId_1;
229 * spiMasterConfig.dma.rxDmaChannelId = IfxDma_ChannelId_2;
230 * spiMasterConfig.dma.useDma = 1;
231 *
232 * // pin configuration
233 * const IfxQspi_SpiMaster_Pins pins = {
234 * &IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
235 * &IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
236 * &IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
237 * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
238 * };
239 * spiMasterConfig.pins = &Pins;
240 *
241 *
242 * // initialize module
243 * //IfxQspi_SpiMaster spi; // defined globally
244 * IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);
245 * \endcode
246 *
247 *
248 * \subsection IfxLld_Qspi_SpiMaster_ChannelInit SPI Channel Initialisation
249 *
250 * After the module has been initialized, one or more SPI channels can be configured.
251 * Each channel has a dedicated select line.
252 *
253 * Here an example for a SPI channel in master mode:
254 * \code
255 * // create channel config
256 * IfxQspi_SpiMaster_ChannelConfig spiMasterChannelConfig;
257 * IfxQspi_SpiMaster_initChannelConfig(&spiMasterChannelConfig, &spi);
258 *
259 * // set the baudrate for this channel
260 * spiMasterChannelConfig.base.baudrate = 5000000;
261 *
262 * // select pin configuration
263 * const IfxQspi_SpiMaster_Output slsOutput = {
264 * &IfxQspi0_SLSO7_P33_5_OUT,
265 * IfxPort_OutputMode_pushPull,
266 * IfxPort_PadDriver_cmosAutomotiveSpeed1
267 * };
268 * spiMasterChannelConfig.sls.output = (IfxQspi_SpiMaster_Output)slsOutput;
269 *
270 * // initialize channel
271 * //IfxQspi_SpiMaster_Channel spiChannel; // defined globally
272 * IfxQspi_SpiMaster_initChannel(&spiChannel, &spiMasterChannelConfig);
273 * \endcode
274 *
275 * The QSPI is ready for use now!
276 *
277 *
278 * \section IfxLld_Qspi_SpiMaster_DataTransfers Data Transfers
279 *
280 * In following examples we assume, that following buffers are declared globally:
281 * \code
282 * // declared somewhere globally
283 * #define SPI_BUFFER_SIZE 8
284 * uint8 spiTxBuffer[SPI_BUFFER_SIZE] = { 1, 2, 3, 4, 5, 6, 7, 8 };
285 * uint8 spiRxBuffer[SPI_BUFFER_SIZE] = { 0, 0, 0, 0, 0, 0, 0, 0 };
286 * \endcode
287 *
288 * Sending and Receiving a data stream:
289 * \code
290 * int i=0;
291 * // wait until transfer of previous data stream is finished
292 * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
293 *
294 * // send/receive new stream
295 * IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);
296 * \endcode
297 *
298 * Send only, discard received data:
299 * \code
300 *
301 * // wait until transfer of previous data stream is finished
302 * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
303 *
304 * // send new stream
305 * IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], NULL_PTR, SPI_BUFFER_SIZE);
306 * \endcode
307 *
308 * Receive only, send all-1
309 * \code
310 * // wait until transfer of previous data stream is finished
311 * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
312 *
313 * // receive new stream
314 * IfxQspi_SpiMaster_exchange(&spiChannel, NULL_PTR, &spiRxBuffer[i], SPI_BUFFER_SIZE);
315 * \endcode
316 *
317 * \section IfxLld_Qspi_SpiMaster_PhaseTransition Phase transition and User Interrupt usage
318 *
319 * Phase transition and user defined interrupts are not configured internal to Driver.
320 *
321 * Example usage of Phase transition interrupt is given below
322 * \code
323 * IfxCpu_Irq_installInterruptHandler(&qspi0PtISR, IFX_INTPRIO_QSPI0_PT);
324 * IfxQspi_pause(&MODULE_QSPI0);
325 * IfxQspi_configPT1Event(&MODULE_QSPI0, IfxQspi_PhaseTransitionEvent_startOfFrame); // Configured for PT1 SOF event
326 * IfxQspi_enablePT1Event(&MODULE_QSPI0,TRUE);
327 * IfxQspi_run(&MODULE_QSPI0);
328 * \endcode
329 *
330 * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
331 * \code
332 * IFX_INTERRUPT(qspi0PtISR, 0, IFX_INTPRIO_QSPI0_PT )
333 * {
334 * IfxQspi_PhaseTransitionEvent event;
335 * event = IfxQspi_SpiMaster_isrPhaseTransition(&spiMaster);
336 * // process event
337 * switch (event)
338 * {
339 * case IfxQspi_PhaseTransitionEvent_startOfFrame:
340 * // SOF event
341 * break;
342 * // add other events if needed.
343 * }
344 * }
345 * \endcode
346 *
347 * \section IfxLld_Qspi_SpiMaster_XXLMode How to use XXL Mode with Dma
348 *
349 * The Qspi XXL mode is similar to Short mode with the exception to configure mode to xxl before calling IfxQspi_SpiMaster_initChannel() function. The remaining usage is similar to Short / ShortContinuous Mode (default one) with Dma
350 *
351 * \code
352 * spiMasterChannelConfig.mode = IfxQspi_SpiMaster_Mode_xxl;
353 * \endcode
354 *
355 *
356 * \section IfxLld_Qspi_SpiMaster_LongMode How to use Long / Long Continuous Mode with Dma
357 *
358 * The qspi Long mode is similar to short mode Except for below additional changes.
359 * 1. Transmit buffer need to be defined (this is in addition to source/TX data buffer. This buffer is used to store the DATA + CONFIG for dma usage).
360 * 2. Configure the Spi Channel configuration mode (new one) to long or longContinuous mode
361 * 3. Preparing Transmit buffer content for long/long Continuous mode
362 *
363 * Example Code is provided below.
364 *
365 * \subsection IfxLld_Qspi_SpiMaster_Include Include Files
366 *
367 * Include following header file into your C code:
368 * \code
369 * #include <Qspi/SpiMaster/IfxQspi_SpiMaster.h>
370 * \endcode
371 *
372 * \subsection IfxLld_Qspi_SpiMaster_Variables Variables
373 *
374 * Declare QSPI module and channel handles:
375 *
376 * \code
377 * IfxQspi_SpiMaster spi;
378 * IfxQspi_SpiMaster_Channel spiChannel;
379 * \endcode
380 *
381 * In addition, declare global transmit and receive buffers for the data transfers:
382 * \code
383 * #define SPI_BUFFER_SIZE 50
384 * #define BACON_SIZE IFXQSPI_BACONSIZE(SPI_BUFFER_SIZE)
385 * #define FIFO_SIZE IFXQSPI_FIFO32BITSIZE(SPI_BUFFER_SIZE)
386 * // This should be 32 bit ; use addition of macros as shown
387 * __attribute__ ((aligned(64))) uint32 spi0TxLongBuffer[BACON_SIZE + FIFO_SIZE];
388 *
389 * uint8 spiTxBuffer[SPI_BUFFER_SIZE];
390 * uint8 spiRxBuffer[SPI_BUFFER_SIZE];
391 * \endcode
392 *
393 * \subsection IfxLld_Qspi_SpiMaster_Init_dma Module Initialisation (with dma use)
394 *
395 * The module initialisation can be done in the same function.
396 *
397 * Here an example for master mode:
398 * \code
399 * // create module config
400 * IfxQspi_SpiMaster_Config spiMasterConfig;
401 * IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
402 *
403 * // set the desired mode and maximum baudrate
404 * spiMasterConfig.base.mode = SpiIf_Mode_master;
405 * spiMasterConfig.base.maximumBaudrate = 10000000;
406 *
407 * // ISR priorities and interrupt target (with Dma usage)
408 * spiMasterConfig.base.txPriority = IFX_INTPRIO_DMA_CH1;
409 * spiMasterConfig.base.rxPriority = IFX_INTPRIO_DMA_CH2;
410 * spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
411 *
412 * // dma configuration.
413 * spiMasterConfig.dma.txDmaChannelId = IfxDma_ChannelId_1;
414 * spiMasterConfig.dma.rxDmaChannelId = IfxDma_ChannelId_2;
415 * spiMasterConfig.dma.useDma = 1;
416 *
417 * // pin configuration
418 * const IfxQspi_SpiMaster_Pins pins = {
419 * &IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
420 * &IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
421 * &IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
422 * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
423 * };
424 * spiMasterConfig.pins = &Pins;
425 *
426 *
427 * // initialize module
428 * //IfxQspi_SpiMaster spi; // defined globally
429 * IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);
430 * \endcode
431 *
432 *
433 * \subsection IfxLld_Qspi_SpiMaster_ChannelInit SPI Channel Initialisation
434 *
435 * After the module has been initialized, one or more SPI channels can be configured.
436 * Each channel has a dedicated select line.
437 *
438 * Here an example for a SPI channel in master mode:
439 * \code
440 * // create channel config
441 * IfxQspi_SpiMaster_ChannelConfig spiMasterChannelConfig;
442 * IfxQspi_SpiMaster_initChannelConfig(&spiMasterChannelConfig, &spi);
443 *
444 * // set the baudrate for this channel
445 * spiMasterChannelConfig.base.baudrate = 5000000;
446 *
447 * // select pin configuration
448 * const IfxQspi_SpiMaster_Output slsOutput = {
449 * &IfxQspi0_SLSO7_P33_5_OUT,
450 * IfxPort_OutputMode_pushPull,
451 * IfxPort_PadDriver_cmosAutomotiveSpeed1
452 * };
453 * spiMasterChannelConfig.sls.output = (IfxQspi_SpiMaster_Output)slsOutput;
454 *
455 * spiMasterChannelConfig.mode = IfxQspi_SpiMaster_Mode_longContinuous; // Select Long Continuous Mode
456 *
457 * // initialize channel
458 * //IfxQspi_SpiMaster_Channel spiChannel; // defined globally
459 * IfxQspi_SpiMaster_initChannel(&spiChannel, &spiMasterChannelConfig);
460 * \endcode
461 *
462 * Sending and Receiving a Long data stream:
463 * \code
464 * int i=0;
465 * // Pack data and Configuration to Transmit buffer (Only for Long / Long Continuous Mode(s))
466 * IfxQspi_SpiMaster_packLongModeBuffer(&spiMasterChannel, spi0TxBuffer, spi0TxLongBuffer, SPI_BUFFER_SIZE);
467 *
468 * // wait until transfer of previous data stream is finished
469 * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
470 *
471 * // send/receive new stream
472 * IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);
473 * \endcode
474 *
475 * ** NOTE for loopback mode **
476 * In case you want to configure and test a SPI channel in loopback, you have to
477 * select:
478 * spiMasterChannelConfig.base.mode.loopback = 1
479 *
480 * If an output pin is configured in loopback mode, the SPI channel number will be extracted from the pin map configuration.
481 *
482 * If an output pin is not configured in loopback, the default SPI channel selected
483 * will be 0.
484 *
485 * \defgroup IfxLld_Qspi_SpiMaster SPI Master Driver
486 * \ingroup IfxLld_Qspi
487 * \defgroup IfxLld_Qspi_SpiMaster_DataStructures Data Structures
488 * \ingroup IfxLld_Qspi_SpiMaster
489 * \defgroup IfxLld_Qspi_SpiMaster_Module Module Functions
490 * \ingroup IfxLld_Qspi_SpiMaster
491 * \defgroup IfxLld_Qspi_SpiMaster_Channel Channel Functions
492 * \ingroup IfxLld_Qspi_SpiMaster
493 * \defgroup IfxLld_Qspi_SpiMaster_Support Support Functions
494 * \ingroup IfxLld_Qspi_SpiMaster
495 * \defgroup IfxLld_Qspi_SpiMaster_Com Communication
496 * \ingroup IfxLld_Qspi_SpiMaster
497 * \defgroup IfxLld_Qspi_SpiMaster_InterruptFunctions Interrupt Functions
498 * \ingroup IfxLld_Qspi_SpiMaster
499 * \defgroup IfxLld_Qspi_SpiMaster_DirectFifo Direct FIFO Access
500 * \ingroup IfxLld_Qspi_SpiMaster
501 */
502
503 #ifndef IFXQSPI_SPIMASTER_H
504 #define IFXQSPI_SPIMASTER_H 1
505
506 /******************************************************************************/
507 /*----------------------------------Includes----------------------------------*/
508 /******************************************************************************/
509
510 #include "Cpu/Irq/IfxCpu_Irq.h"
511 #include "Dma/Dma/IfxDma_Dma.h"
512 #include "Qspi/Std/IfxQspi.h"
513 #include "Scu/Std/IfxScuWdt.h"
514
515 /******************************************************************************/
516 /*------------------------------Type Definitions------------------------------*/
517 /******************************************************************************/
518
519 typedef struct IfxQspi_SpiMaster_Channel_s IfxQspi_SpiMaster_Channel;
520
521 typedef void (*IfxQspi_SpiMaster_AutoSlso)(IfxQspi_SpiMaster_Channel *chHandle);
522
523 /******************************************************************************/
524 /*--------------------------------Enumerations--------------------------------*/
525 /******************************************************************************/
526
527 /** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
528 * \{ */
529 typedef enum
530 {
531 IfxQspi_SpiMaster_ChannelBasedCs_disabled = 0, /**< \brief Slso will be low for complete frame */
532 IfxQspi_SpiMaster_ChannelBasedCs_enabled = 1 /**< \brief Slso will toggle with every byte */
533 } IfxQspi_SpiMaster_ChannelBasedCs;
534
535 typedef enum
536 {
537 IfxQspi_SpiMaster_Mode_short = 0, /**< \brief Short Mode */
538 IfxQspi_SpiMaster_Mode_long = 1, /**< \brief Long Mode */
539 IfxQspi_SpiMaster_Mode_shortContinuous = 2, /**< \brief Short Continous Mode */
540 IfxQspi_SpiMaster_Mode_longContinuous = 3, /**< \brief Long Continous Mode */
541 IfxQspi_SpiMaster_Mode_xxl = 4 /**< \brief XXL Mode */
542 } IfxQspi_SpiMaster_Mode;
543
544 /** \} */
545
546 /******************************************************************************/
547 /*-----------------------------Data Structures--------------------------------*/
548 /******************************************************************************/
549
550 /** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
551 * \{ */
552 /** \brief SLSI pin configuration structure
553 */
554 typedef struct
555 {
556 IFX_CONST IfxQspi_Slsi_In *pin; /**< \brief Pointer to SLSI in pin */
557 IfxPort_InputMode mode; /**< \brief The SLSI pin input mode */
558 } IfxQspi_SpiMaster_Input;
559
560 /** \brief SLSO pin configuration structure
561 */
562 typedef struct
563 {
564 IFX_CONST IfxQspi_Slso_Out *pin; /**< \brief Pointer to SLSO out pin */
565 IfxPort_OutputMode mode; /**< \brief The SLSO pin output mode */
566 IfxPort_PadDriver driver; /**< \brief The pad driver mode which should be configured */
567 } IfxQspi_SpiMaster_Output;
568
569 /** \} */
570
571 /** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
572 * \{ */
573 /** \brief Dma handle
574 */
575 typedef struct
576 {
577 IfxDma_Dma_Channel rxDmaChannel; /**< \brief receive DMA channel handle */
578 IfxDma_Dma_Channel txDmaChannel; /**< \brief transmit DMA channel handle */
579 IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi recieve */
580 IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
581 boolean useDma; /**< \brief use Dma for Data transfer/s */
582 } IfxQspi_SpiMaster_Dma;
583
584 /** \brief Dma configuration
585 */
586 typedef struct
587 {
588 IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi recieve */
589 IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
590 boolean useDma; /**< \brief use Dma for Data transfer/s */
591 } IfxQspi_SpiMaster_DmaConfig;
592
593 /** \brief Qspi Master Mode Error Flags
594 */
595 typedef struct
596 {
597 uint16 parityError : 1; /**< \brief [0:0] Parity Error */
598 uint16 configurationError : 1; /**< \brief [1:1] Configuration Error */
599 uint16 baudrateError : 1; /**< \brief [2:2] baudrate Error */
600 uint16 txFifoOverflowError : 1; /**< \brief [3:3] TxFifo Overflow Error */
601 uint16 txFifoUnderflowError : 1; /**< \brief [4:4] TxFifo underflow Error */
602 uint16 rxFifoOverflowError : 1; /**< \brief [5:5] RxFifo Overflow Error */
603 uint16 rxFifoUnderflowError : 1; /**< \brief [6:6] RxFifo underflow Error */
604 uint16 expectTimeoutError : 1; /**< \brief [7:7] Expect Timeout Error */
605 } IfxQspi_SpiMaster_ErrorFlags;
606
607 /** \brief Union of Slave Select pins
608 */
609 typedef union
610 {
611 IfxQspi_SpiMaster_Input input; /**< \brief SLSI pin configuration structure */
612 IfxQspi_SpiMaster_Output output; /**< \brief SLSO pin configuration structure */
613 } IfxQspi_SpiMaster_InputOutput;
614
615 /** \brief Master pin IO configuration structure
616 */
617 typedef struct
618 {
619 IFX_CONST IfxQspi_Sclk_Out *sclk; /**< \brief Pointer to SLCK out pin */
620 IfxPort_OutputMode sclkMode; /**< \brief The SCLK pin output mode */
621 IFX_CONST IfxQspi_Mtsr_Out *mtsr; /**< \brief Pointer to MTSR out pin */
622 IfxPort_OutputMode mtsrMode; /**< \brief The MTSR pin output mode */
623 IFX_CONST IfxQspi_Mrst_In *mrst; /**< \brief Pointer to MRST in pin */
624 IfxPort_InputMode mrstMode; /**< \brief The MRST pin input mode */
625 IfxPort_PadDriver pinDriver; /**< \brief The pad driver mode which should be configured */
626 } IfxQspi_SpiMaster_Pins;
627
628 /** \} */
629
630 /** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
631 * \{ */
632 /** \brief Module handle data structure
633 */
634 typedef struct
635 {
636 SpiIf base; /**< \brief Module SPI interface handle */
637 Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
638 IfxQspi_SpiMaster_Dma dma; /**< \brief dma handle */
639 float32 maximumBaudrate; /**< \brief Maximum Baud Rate for the SPI Module. */
640 } IfxQspi_SpiMaster;
641
642 /** \brief Module Channel configuration structure
643 */
644 typedef struct
645 {
646 SpiIf_ChConfig base; /**< \brief SPI interface channel configuration structure */
647 uint32 dummyTxValue; /**< \brief Dummy TX value to be sent for "recieve only" modes */
648 uint32 dummyRxValue; /**< \brief Dummy RX value for transmit only modes */
649 IfxQspi_SpiMaster_InputOutput sls; /**< \brief Union of Slave Select pins */
650 IfxQspi_SpiMaster_ChannelBasedCs channelBasedCs; /**< \brief define the slso behaviour */
651 IfxQspi_SpiMaster_Mode mode; /**< \brief Qspi Operating Mode */
652 } IfxQspi_SpiMaster_ChannelConfig;
653
654 /** \brief Module Channel handle structure
655 */
656 struct IfxQspi_SpiMaster_Channel_s
657 {
658 SpiIf_Ch base; /**< \brief SPI interface channel handle structure */
659 Ifx_QSPI_BACON bacon; /**< \brief basic configuration register */
660 IfxPort_Pin slso; /**< \brief Defines SLSO pin */
661 IfxQspi_SpiMaster_AutoSlso activateSlso; /**< \brief Specifies function for Auto SLSO activation */
662 IfxQspi_SpiMaster_AutoSlso deactivateSlso; /**< \brief Specifies function for Auto SLSO deactivation */
663 uint32 dummyTxValue; /**< \brief Dummy TX value, which will be sent for "recieve only" mode. */
664 uint32 dummyRxValue; /**< \brief Dummy Rx value, for "transmit only" modes */
665 IfxQspi_ChannelId channelId; /**< \brief QSPI channel Number */
666 Ifx_ActiveState slsoActiveState; /**< \brief Specifies the current state of SLSO */
667 uint8 dataWidth; /**< \brief Number of bits which will be written into the FIFO */
668 boolean firstWrite; /**< \brief Specifies whether the data id first write or not. */
669 IfxQspi_SpiMaster_ChannelBasedCs channelBasedCs; /**< \brief define the slso behaviour */
670 IfxQspi_SpiMaster_Mode mode; /**< \brief Qspi Operating Mode */
671 IfxQspi_SpiMaster_ErrorFlags errorFlags; /**< \brief Spi Master Error Flags */
672 };
673
674 /** \brief Module configuration structure
675 */
676 typedef struct
677 {
678 SpiIf_Config base; /**< \brief SPI interface configuration structure */
679 Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
680 boolean allowSleepMode; /**< \brief Specifies module sleep mode */
681 boolean pauseOnBaudrateSpikeErrors; /**< \brief Specifies module pause on baudrate or spike errors */
682 IfxQspi_PauseRunTransition pauseRunTransition; /**< \brief Specifies module run or pause mode */
683 IfxQspi_TxFifoInt txFifoThreshold; /**< \brief Specifies the TXFIFO interrupt threshold */
684 IfxQspi_RxFifoInt rxFifoThreshold; /**< \brief Specifies the RXFIFO interrupt threshold */
685 IFX_CONST IfxQspi_SpiMaster_Pins *pins; /**< \brief structure for QSPI Master pins */
686 IfxQspi_SpiMaster_DmaConfig dma; /**< \brief Dma configuration */
687 IfxQspi_FifoMode txFifoMode; /**< \brief Specifies the transmit FIFO mode */
688 IfxQspi_FifoMode rxFifoMode; /**< \brief Specifies the Receive FIFO mode */
689 } IfxQspi_SpiMaster_Config;
690
691 /** \} */
692
693 /** \addtogroup IfxLld_Qspi_SpiMaster_Module
694 * \{ */
695
696 /******************************************************************************/
697 /*-------------------------Global Function Prototypes-------------------------*/
698 /******************************************************************************/
699
700 /** \brief Initialises the module
701 * \param handle Module handle
702 * \param config Predefined configuration structure of the module
703 * \return None
704 *
705 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
706 *
707 */
708 IFX_EXTERN void IfxQspi_SpiMaster_initModule(IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config);
709
710 /** \brief Fills the config structure with default values
711 * \param config Configuration structure which should be initialized.
712 * \param qspi pointer to QSPI registers
713 * \return None
714 *
715 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
716 *
717 */
718 IFX_EXTERN void IfxQspi_SpiMaster_initModuleConfig(IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi);
719
720 /** \} */
721
722 /** \addtogroup IfxLld_Qspi_SpiMaster_Channel
723 * \{ */
724
725 /******************************************************************************/
726 /*-------------------------Global Function Prototypes-------------------------*/
727 /******************************************************************************/
728
729 /** \brief Initializes the channel
730 * \param chHandle Module Channel handle
731 * \param chConfig Channel configuration structure
732 * \return Status of Channel (busy or ok or failure)
733 *
734 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
735 *
736 */
737 IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_initChannel(IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig);
738
739 /** \brief Fills the config structure with default values
740 * \param chConfig Configuration structure which should be initialized.
741 * \param handle Module handle
742 * \return None
743 *
744 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
745 *
746 */
747 IFX_EXTERN void IfxQspi_SpiMaster_initChannelConfig(IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle);
748
749 /** \} */
750
751 /** \addtogroup IfxLld_Qspi_SpiMaster_Com
752 * \{ */
753
754 /******************************************************************************/
755 /*-------------------------Global Function Prototypes-------------------------*/
756 /******************************************************************************/
757
758 /** \brief Exchanges data between source and data
759 * \param chHandle Module Channel handle
760 * \param src Source of data. Can be set to NULL_PTR if nothing to transmit (receive only) - in this case, all-1 will be sent.
761 * \param dest Destination to which to be sent.Can be set to NULL_PTR if nothing to receive(transmit only).
762 * \param count Number of data in pending
763 * \return Status of exchange of data
764 *
765 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
766 *
767 */
768 IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_exchange(IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count);
769
770 /** \brief Gets the transmission status
771 * \param chHandle Module Channel handle
772 * \return Transmission status
773 *
774 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
775 *
776 */
777 IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_getStatus(IfxQspi_SpiMaster_Channel *chHandle);
778
779 /** \} */
780
781 /** \addtogroup IfxLld_Qspi_SpiMaster_InterruptFunctions
782 * \{ */
783
784 /******************************************************************************/
785 /*-------------------------Global Function Prototypes-------------------------*/
786 /******************************************************************************/
787
788 /** \brief Transmit interrupt handler
789 * \param qspiHandle Module handle
790 * \return None
791 */
792 IFX_EXTERN void IfxQspi_SpiMaster_isrDmaReceive(IfxQspi_SpiMaster *qspiHandle);
793
794 /** \brief Transmit interrupt handler
795 * \param qspiHandle Module handle
796 * \return None
797 */
798 IFX_EXTERN void IfxQspi_SpiMaster_isrDmaTransmit(IfxQspi_SpiMaster *qspiHandle);
799
800 /** \brief Error Interrupt handler
801 * \param handle Module handle
802 * \return None
803 */
804 IFX_EXTERN void IfxQspi_SpiMaster_isrError(IfxQspi_SpiMaster *handle);
805
806 /** \brief Phase Transition interrupt handler
807 * \param handle Module handle
808 * \return Phase Transition Event
809 */
810 IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrPhaseTransition(IfxQspi_SpiMaster *handle);
811
812 /** \brief Receive Interrupt handler
813 * \param handle Module handle
814 * \return None
815 */
816 IFX_EXTERN void IfxQspi_SpiMaster_isrReceive(IfxQspi_SpiMaster *handle);
817
818 /** \brief Transmit interrupt handler
819 * \param handle Module handle
820 * \return None
821 */
822 IFX_EXTERN void IfxQspi_SpiMaster_isrTransmit(IfxQspi_SpiMaster *handle);
823
824 /** \brief User defined interrupt handler
825 * \param handle Module handle
826 * \return User Event
827 */
828 IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrUserDefined(IfxQspi_SpiMaster *handle);
829
830 /** \} */
831
832 /** \addtogroup IfxLld_Qspi_SpiMaster_DirectFifo
833 * \{ */
834
835 /******************************************************************************/
836 /*-------------------------Inline Function Prototypes-------------------------*/
837 /******************************************************************************/
838
839 /** \brief Reads data or status in RxFIFO
840 * \param handle Module handle
841 * \return Data or Status in RxFIFO
842 */
843 IFX_INLINE uint32 IfxQspi_SpiMaster_readReceiveFifo(IfxQspi_SpiMaster *handle);
844
845 /** \brief Writes Basic configuration value to Tx FIFO
846 * \param handle Module handle
847 * \param baconVal Basic configuration value to be entered in TxFIFO
848 * \return None
849 */
850 IFX_INLINE void IfxQspi_SpiMaster_writeBasicConfiguration(IfxQspi_SpiMaster *handle, uint32 baconVal);
851
852 /** \brief Writes extended configuration of the channel
853 * \param chHandle Module Channel handle
854 * \param econVal Channel Timing configuration value
855 * \return None
856 */
857 IFX_INLINE void IfxQspi_SpiMaster_writeExtendedConfiguration(IfxQspi_SpiMaster_Channel *chHandle, uint32 econVal);
858
859 /** \brief Writes data and configuration mixed value to Tx FIFO
860 * \param handle Module handle
861 * \param mixEntryVal Mixed of Data and configuration
862 * \return None
863 */
864 IFX_INLINE void IfxQspi_SpiMaster_writeMixedDataConfiguration(IfxQspi_SpiMaster *handle, uint32 mixEntryVal);
865
866 /** \brief Writes the data to TxFIFO
867 * \param chHandle Module Channel handle
868 * \param data Data to be entered in Tx FIFO
869 * \return None
870 */
871 IFX_INLINE void IfxQspi_SpiMaster_writeTransmitFifo(IfxQspi_SpiMaster_Channel *chHandle, uint32 data);
872
873 /******************************************************************************/
874 /*-------------------------Global Function Prototypes-------------------------*/
875 /******************************************************************************/
876
877 /** \brief pack data to Long mode buffer
878 * \param chHandle Module Channel handle
879 * \param data source Data buffer to be packed
880 * \param longFifoBuffer destination buffer for data and configuration
881 * \param dataLength size of data in source buffer (in bytes)
882 * \return None
883 */
884 IFX_EXTERN void IfxQspi_SpiMaster_packLongModeBuffer(IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength);
885
886 /** \} */
887
888 /******************************************************************************/
889 /*-------------------------Global Function Prototypes-------------------------*/
890 /******************************************************************************/
891
892 /** \brief Gets the channel configuration
893 * \param chHandle Module Channel handle
894 * \return Channel configuration
895 */
896 IFX_EXTERN SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig(IfxQspi_SpiMaster_Channel *chHandle);
897
898 /** \brief Set the channel baudrate
899 * \param chHandle Module Channel handle
900 * \param baudrate Baudrate to be configured (in Baud)
901 * \return Status of Channel (busy or ok or failure)
902 */
903 IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate(IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate);
904
905 /******************************************************************************/
906 /*---------------------Inline Function Implementations------------------------*/
907 /******************************************************************************/
908
909 IFX_INLINE uint32 IfxQspi_SpiMaster_readReceiveFifo(IfxQspi_SpiMaster *handle)
910 {
911 Ifx_QSPI *qspiSFR = handle->qspi;
912 uint32 data = IfxQspi_readReceiveFifo(qspiSFR);
913 return data;
914 }
915
916
917 IFX_INLINE void IfxQspi_SpiMaster_writeBasicConfiguration(IfxQspi_SpiMaster *handle, uint32 baconVal)
918 {
919 Ifx_QSPI *qspiSFR = handle->qspi;
920 IfxQspi_writeBasicConfiguration(qspiSFR, baconVal);
921 }
922
923
924 IFX_INLINE void IfxQspi_SpiMaster_writeExtendedConfiguration(IfxQspi_SpiMaster_Channel *chHandle, uint32 econVal)
925 {
926 IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver;
927 IfxQspi_writeExtendedConfiguration(handle->qspi, chHandle->channelId, econVal);
928 }
929
930
931 IFX_INLINE void IfxQspi_SpiMaster_writeMixedDataConfiguration(IfxQspi_SpiMaster *handle, uint32 mixEntryVal)
932 {
933 Ifx_QSPI *qspiSFR = handle->qspi;
934 IfxQspi_writeMixedDataTransmitFifo(qspiSFR, mixEntryVal);
935 }
936
937
938 IFX_INLINE void IfxQspi_SpiMaster_writeTransmitFifo(IfxQspi_SpiMaster_Channel *chHandle, uint32 data)
939 {
940 IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver;
941 IfxQspi_writeTransmitFifo(handle->qspi, data);
942 }
943
944
945 #endif /* IFXQSPI_SPIMASTER_H */
IfxQspi_SpiMaster_Channel_s::bacon
Ifx_QSPI_BACON bacon
basic configuration register
Definition: IfxQspi_SpiMaster.h:659
IfxQspi_SpiMaster_Pins::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiMaster.h:625
IfxQspi_SpiMaster_ChannelBasedCs_disabled
Slso will be low for complete frame.
Definition: IfxQspi_SpiMaster.h:531
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:80
IfxQspi_SpiMaster_Mode_shortContinuous
Short Continous Mode.
Definition: IfxQspi_SpiMaster.h:539
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxQspi_SpiMaster
Module handle data structure.
Definition: IfxQspi_SpiMaster.h:634
IfxQspi_SpiMaster_Output::mode
IfxPort_OutputMode mode
The SLSO pin output mode.
Definition: IfxQspi_SpiMaster.h:565
IfxQspi_SpiMaster_Pins::mrstMode
IfxPort_InputMode mrstMode
The MRST pin input mode.
Definition: IfxQspi_SpiMaster.h:624
IfxQspi_SpiMaster_Output
SLSO pin configuration structure.
Definition: IfxQspi_SpiMaster.h:562
IfxQspi_SpiMaster_Channel_s::slsoActiveState
Ifx_ActiveState slsoActiveState
Specifies the current state of SLSO.
Definition: IfxQspi_SpiMaster.h:666
IfxQspi_SpiMaster_writeBasicConfiguration
IFX_INLINE void IfxQspi_SpiMaster_writeBasicConfiguration(IfxQspi_SpiMaster *handle, uint32 baconVal)
Writes Basic configuration value to Tx FIFO.
Definition: IfxQspi_SpiMaster.h:917
IfxQspi_SpiMaster_Channel_s::deactivateSlso
IfxQspi_SpiMaster_AutoSlso deactivateSlso
Specifies function for Auto SLSO deactivation.
Definition: IfxQspi_SpiMaster.h:662
IfxQspi_SpiMaster_Channel_s::channelId
IfxQspi_ChannelId channelId
QSPI channel Number.
Definition: IfxQspi_SpiMaster.h:665
SpiIf_ChConfig_
Definition: SpiIf.h:225
IfxQspi_SpiMaster_Config::pauseRunTransition
IfxQspi_PauseRunTransition pauseRunTransition
Specifies module run or pause mode.
Definition: IfxQspi_SpiMaster.h:682
IfxQspi_PhaseTransitionEvent
IfxQspi_PhaseTransitionEvent
Phase Transition Event.
Definition: IfxQspi.h:193
IfxQspi_SpiMaster_Pins::mtsrMode
IfxPort_OutputMode mtsrMode
The MTSR pin output mode.
Definition: IfxQspi_SpiMaster.h:622
IfxQspi_SpiMaster_isrError
IFX_EXTERN void IfxQspi_SpiMaster_isrError(IfxQspi_SpiMaster *handle)
Error Interrupt handler.
Definition: IfxQspi_SpiMaster.c:641
IfxQspi_SpiMaster_setChannelBaudrate
IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate(IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate)
Set the channel baudrate.
Definition: IfxQspi_SpiMaster.c:890
IfxQspi_SpiMaster_Dma::rxDmaChannel
IfxDma_Dma_Channel rxDmaChannel
receive DMA channel handle
Definition: IfxQspi_SpiMaster.h:577
IfxQspi_SpiMaster_Channel_s::slso
IfxPort_Pin slso
Defines SLSO pin.
Definition: IfxQspi_SpiMaster.h:660
IfxQspi_SpiMaster_Config::txFifoMode
IfxQspi_FifoMode txFifoMode
Specifies the transmit FIFO mode.
Definition: IfxQspi_SpiMaster.h:687
IfxQspi_SpiMaster_Dma
Dma handle.
Definition: IfxQspi_SpiMaster.h:575
SpiIf_Config
Definition: SpiIf.h:160
IfxQspi_SpiMaster_isrDmaReceive
IFX_EXTERN void IfxQspi_SpiMaster_isrDmaReceive(IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:565
IfxDma_Dma.h
DMA DMA details.
IfxQspi_SpiMaster_Config::pins
IFX_CONST IfxQspi_SpiMaster_Pins * pins
structure for QSPI Master pins
Definition: IfxQspi_SpiMaster.h:685
IfxQspi_SpiMaster_Mode_xxl
XXL Mode.
Definition: IfxQspi_SpiMaster.h:541
IfxQspi_SpiMaster_writeTransmitFifo
IFX_INLINE void IfxQspi_SpiMaster_writeTransmitFifo(IfxQspi_SpiMaster_Channel *chHandle, uint32 data)
Writes the data to TxFIFO.
Definition: IfxQspi_SpiMaster.h:938
IfxQspi_SpiMaster_isrPhaseTransition
IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrPhaseTransition(IfxQspi_SpiMaster *handle)
Phase Transition interrupt handler.
Definition: IfxQspi_SpiMaster.c:710
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxQspi_SpiMaster_Input::mode
IfxPort_InputMode mode
The SLSI pin input mode.
Definition: IfxQspi_SpiMaster.h:557
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxQspi_Sclk_Out
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:112
IfxQspi_SpiMaster_Config::dma
IfxQspi_SpiMaster_DmaConfig dma
Dma configuration.
Definition: IfxQspi_SpiMaster.h:686
IfxQspi_writeMixedDataTransmitFifo
IFX_INLINE void IfxQspi_writeMixedDataTransmitFifo(Ifx_QSPI *qspi, uint32 mixEntryVal)
Writes Data and Configuration into MIXEDENTRY register.
Definition: IfxQspi.h:1236
float32
float float32
Definition: Platform_Types.h:170
IfxQspi_SpiMaster_Config::rxFifoMode
IfxQspi_FifoMode rxFifoMode
Specifies the Receive FIFO mode.
Definition: IfxQspi_SpiMaster.h:688
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxQspi_FifoMode
IfxQspi_FifoMode
Transmit FIFO mode.
Definition: IfxQspi.h:285
IfxQspi_SpiMaster_Output::driver
IfxPort_PadDriver driver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiMaster.h:566
IfxQspi_SpiMaster_Config::allowSleepMode
boolean allowSleepMode
Specifies module sleep mode.
Definition: IfxQspi_SpiMaster.h:680
IfxQspi_SpiMaster_exchange
IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_exchange(IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data.
Definition: IfxQspi_SpiMaster.c:140
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxQspi_SpiMaster_getChannelConfig
IFX_EXTERN SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig(IfxQspi_SpiMaster_Channel *chHandle)
Gets the channel configuration.
Definition: IfxQspi_SpiMaster.c:182
IfxQspi_SpiMaster_ErrorFlags::rxFifoOverflowError
uint16 rxFifoOverflowError
[5:5] RxFifo Overflow Error
Definition: IfxQspi_SpiMaster.h:602
SpiIf_
Definition: SpiIf.h:150
IfxQspi_SpiMaster_Mode
IfxQspi_SpiMaster_Mode
Definition: IfxQspi_SpiMaster.h:535
IfxQspi_SpiMaster_Config::pauseOnBaudrateSpikeErrors
boolean pauseOnBaudrateSpikeErrors
Specifies module pause on baudrate or spike errors.
Definition: IfxQspi_SpiMaster.h:681
IfxQspi_SpiMaster_Config
Module configuration structure.
Definition: IfxQspi_SpiMaster.h:676
IfxQspi_SpiMaster_isrTransmit
IFX_EXTERN void IfxQspi_SpiMaster_isrTransmit(IfxQspi_SpiMaster *handle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:738
IfxQspi_writeExtendedConfiguration
IFX_INLINE void IfxQspi_writeExtendedConfiguration(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal)
Writes channel timing configuration into ECON register.
Definition: IfxQspi.h:1229
IfxQspi_SpiMaster_ErrorFlags::txFifoOverflowError
uint16 txFifoOverflowError
[3:3] TxFifo Overflow Error
Definition: IfxQspi_SpiMaster.h:600
IfxScuWdt.h
SCU basic functionality.
IfxQspi_SpiMaster_writeMixedDataConfiguration
IFX_INLINE void IfxQspi_SpiMaster_writeMixedDataConfiguration(IfxQspi_SpiMaster *handle, uint32 mixEntryVal)
Writes data and configuration mixed value to Tx FIFO.
Definition: IfxQspi_SpiMaster.h:931
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxQspi_Slso_Out
SLSO pin mapping structure.
Definition: IfxQspi_PinMap.h:120
IfxQspi_readReceiveFifo
IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
Read the oldest data from RXFIFO.
Definition: IfxQspi.h:1115
IfxQspi_SpiMaster_initChannelConfig
IFX_EXTERN void IfxQspi_SpiMaster_initChannelConfig(IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
Fills the config structure with default values.
Definition: IfxQspi_SpiMaster.c:319
IfxQspi_SpiMaster_Dma::txDmaChannelId
IfxDma_ChannelId txDmaChannelId
DMA channel no for the Spi transmit.
Definition: IfxQspi_SpiMaster.h:580
IfxQspi_SpiMaster_Input::pin
IFX_CONST IfxQspi_Slsi_In * pin
Pointer to SLSI in pin.
Definition: IfxQspi_SpiMaster.h:556
IfxQspi_SpiMaster_Channel_s::firstWrite
boolean firstWrite
Specifies whether the data id first write or not.
Definition: IfxQspi_SpiMaster.h:668
IfxQspi_SpiMaster_Config::txFifoThreshold
IfxQspi_TxFifoInt txFifoThreshold
Specifies the TXFIFO interrupt threshold.
Definition: IfxQspi_SpiMaster.h:683
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxQspi_ChannelId
IfxQspi_ChannelId
QSPI channel Number (BACON.CS)
Definition: IfxQspi.h:94
IfxQspi_Mtsr_Out
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:104
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxQspi_PauseRunTransition
IfxQspi_PauseRunTransition
Request between pause and Run transition.
Definition: IfxQspi.h:170
IfxQspi_RxFifoInt
IfxQspi_RxFifoInt
Receive Fifo Interrupt Threshold.
Definition: IfxQspi.h:216
IfxQspi_SpiMaster_Pins::mtsr
IFX_CONST IfxQspi_Mtsr_Out * mtsr
Pointer to MTSR out pin.
Definition: IfxQspi_SpiMaster.h:621
IfxQspi_TxFifoInt
IfxQspi_TxFifoInt
Transmit Fifo Interrupt Threshold.
Definition: IfxQspi.h:273
IfxQspi_SpiMaster_Pins::sclkMode
IfxPort_OutputMode sclkMode
The SCLK pin output mode.
Definition: IfxQspi_SpiMaster.h:620
IfxQspi_SpiMaster::qspi
Ifx_QSPI * qspi
Pointer to QSPI module registers.
Definition: IfxQspi_SpiMaster.h:637
IfxQspi_SpiMaster::maximumBaudrate
float32 maximumBaudrate
Maximum Baud Rate for the SPI Module.
Definition: IfxQspi_SpiMaster.h:639
IfxQspi_SpiMaster_ErrorFlags::txFifoUnderflowError
uint16 txFifoUnderflowError
[4:4] TxFifo underflow Error
Definition: IfxQspi_SpiMaster.h:601
IfxQspi_SpiMaster_ErrorFlags::configurationError
uint16 configurationError
[1:1] Configuration Error
Definition: IfxQspi_SpiMaster.h:598
IfxQspi_SpiMaster_Output::pin
IFX_CONST IfxQspi_Slso_Out * pin
Pointer to SLSO out pin.
Definition: IfxQspi_SpiMaster.h:564
IfxQspi_SpiMaster_ChannelConfig::dummyTxValue
uint32 dummyTxValue
Dummy TX value to be sent for "recieve only" modes.
Definition: IfxQspi_SpiMaster.h:647
IfxQspi_SpiMaster_Channel_s::errorFlags
IfxQspi_SpiMaster_ErrorFlags errorFlags
Spi Master Error Flags.
Definition: IfxQspi_SpiMaster.h:671
IfxQspi_SpiMaster_Dma::useDma
boolean useDma
use Dma for Data transfer/s
Definition: IfxQspi_SpiMaster.h:581
IfxQspi_Mrst_In
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:56
IfxQspi_SpiMaster_Mode_long
Long Mode.
Definition: IfxQspi_SpiMaster.h:538
IfxQspi_SpiMaster_InputOutput
Union of Slave Select pins.
Definition: IfxQspi_SpiMaster.h:609
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxQspi_SpiMaster_Config::base
SpiIf_Config base
SPI interface configuration structure.
Definition: IfxQspi_SpiMaster.h:678
IfxQspi_SpiMaster_ChannelConfig::channelBasedCs
IfxQspi_SpiMaster_ChannelBasedCs channelBasedCs
define the slso behaviour
Definition: IfxQspi_SpiMaster.h:650
IfxQspi_SpiMaster_Input
SLSI pin configuration structure.
Definition: IfxQspi_SpiMaster.h:554
IfxQspi_SpiMaster_Channel_s::dataWidth
uint8 dataWidth
Number of bits which will be written into the FIFO.
Definition: IfxQspi_SpiMaster.h:667
IfxQspi_SpiMaster::base
SpiIf base
Module SPI interface handle.
Definition: IfxQspi_SpiMaster.h:636
IfxQspi_SpiMaster_DmaConfig
Dma configuration.
Definition: IfxQspi_SpiMaster.h:586
IfxQspi_SpiMaster_ChannelConfig::mode
IfxQspi_SpiMaster_Mode mode
Qspi Operating Mode.
Definition: IfxQspi_SpiMaster.h:651
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxQspi_SpiMaster_Mode_longContinuous
Long Continous Mode.
Definition: IfxQspi_SpiMaster.h:540
IfxQspi_SpiMaster_Pins::mrst
IFX_CONST IfxQspi_Mrst_In * mrst
Pointer to MRST in pin.
Definition: IfxQspi_SpiMaster.h:623
IfxQspi_SpiMaster_packLongModeBuffer
IFX_EXTERN void IfxQspi_SpiMaster_packLongModeBuffer(IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
pack data to Long mode buffer
Definition: IfxQspi_SpiMaster.c:768
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxQspi_SpiMaster_isrUserDefined
IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrUserDefined(IfxQspi_SpiMaster *handle)
User defined interrupt handler.
Definition: IfxQspi_SpiMaster.c:746
IfxQspi_SpiMaster_InputOutput::input
IfxQspi_SpiMaster_Input input
SLSI pin configuration structure.
Definition: IfxQspi_SpiMaster.h:611
IfxQspi_SpiMaster_isrDmaTransmit
IFX_EXTERN void IfxQspi_SpiMaster_isrDmaTransmit(IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:586
IfxQspi_SpiMaster_Dma::txDmaChannel
IfxDma_Dma_Channel txDmaChannel
transmit DMA channel handle
Definition: IfxQspi_SpiMaster.h:578
IfxQspi_SpiMaster_isrReceive
IFX_EXTERN void IfxQspi_SpiMaster_isrReceive(IfxQspi_SpiMaster *handle)
Receive Interrupt handler.
Definition: IfxQspi_SpiMaster.c:730
IfxQspi_SpiMaster_Channel_s::activateSlso
IfxQspi_SpiMaster_AutoSlso activateSlso
Specifies function for Auto SLSO activation.
Definition: IfxQspi_SpiMaster.h:661
IfxQspi_SpiMaster_ErrorFlags
Qspi Master Mode Error Flags.
Definition: IfxQspi_SpiMaster.h:595
SpiIf_Ch_::driver
SpiIf * driver
Pointer to the SPI interface driver.
Definition: SpiIf.h:213
IfxQspi_SpiMaster_Config::rxFifoThreshold
IfxQspi_RxFifoInt rxFifoThreshold
Specifies the RXFIFO interrupt threshold.
Definition: IfxQspi_SpiMaster.h:684
IfxQspi_SpiMaster_ChannelConfig::base
SpiIf_ChConfig base
SPI interface channel configuration structure.
Definition: IfxQspi_SpiMaster.h:646
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxQspi_SpiMaster_initModule
IFX_EXTERN void IfxQspi_SpiMaster_initModule(IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
Initialises the module.
Definition: IfxQspi_SpiMaster.c:334
IfxQspi_SpiMaster_initModuleConfig
IFX_EXTERN void IfxQspi_SpiMaster_initModuleConfig(IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values.
Definition: IfxQspi_SpiMaster.c:546
IfxQspi_writeTransmitFifo
IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register.
Definition: IfxQspi.h:1242
IfxQspi_SpiMaster_writeExtendedConfiguration
IFX_INLINE void IfxQspi_SpiMaster_writeExtendedConfiguration(IfxQspi_SpiMaster_Channel *chHandle, uint32 econVal)
Writes extended configuration of the channel.
Definition: IfxQspi_SpiMaster.h:924
IfxQspi_SpiMaster_ChannelConfig::dummyRxValue
uint32 dummyRxValue
Dummy RX value for transmit only modes.
Definition: IfxQspi_SpiMaster.h:648
IfxQspi_SpiMaster_AutoSlso
void(* IfxQspi_SpiMaster_AutoSlso)(IfxQspi_SpiMaster_Channel *chHandle)
Definition: IfxQspi_SpiMaster.h:521
IfxQspi_SpiMaster_Pins::sclk
IFX_CONST IfxQspi_Sclk_Out * sclk
Pointer to SLCK out pin.
Definition: IfxQspi_SpiMaster.h:619
IfxQspi_SpiMaster_Mode_short
Short Mode.
Definition: IfxQspi_SpiMaster.h:537
IfxCpu_Irq.h
This file contains the APIs for Interrupt related functions.
IfxQspi_SpiMaster_ErrorFlags::baudrateError
uint16 baudrateError
[2:2] baudrate Error
Definition: IfxQspi_SpiMaster.h:599
IfxQspi_SpiMaster_ChannelBasedCs_enabled
Slso will toggle with every byte.
Definition: IfxQspi_SpiMaster.h:532
IfxQspi_SpiMaster_ChannelConfig::sls
IfxQspi_SpiMaster_InputOutput sls
Union of Slave Select pins.
Definition: IfxQspi_SpiMaster.h:649
IfxQspi_writeBasicConfiguration
IFX_INLINE void IfxQspi_writeBasicConfiguration(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register.
Definition: IfxQspi.h:1203
IfxQspi.h
QSPI basic functionality.
IfxQspi_SpiMaster_Channel_s::base
SpiIf_Ch base
SPI interface channel handle structure.
Definition: IfxQspi_SpiMaster.h:658
IfxQspi_SpiMaster_getStatus
IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_getStatus(IfxQspi_SpiMaster_Channel *chHandle)
Gets the transmission status.
Definition: IfxQspi_SpiMaster.c:217
SpiIf_Status
SpiIf_Status
SPI Interface Status.
Definition: SpiIf.h:66
IfxQspi_SpiMaster_ErrorFlags::rxFifoUnderflowError
uint16 rxFifoUnderflowError
[6:6] RxFifo underflow Error
Definition: IfxQspi_SpiMaster.h:603
IfxQspi_SpiMaster_initChannel
IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_initChannel(IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
Initializes the channel.
Definition: IfxQspi_SpiMaster.c:230
IfxQspi_SpiMaster_ChannelBasedCs
IfxQspi_SpiMaster_ChannelBasedCs
Definition: IfxQspi_SpiMaster.h:529
IfxQspi_SpiMaster_Pins
Master pin IO configuration structure.
Definition: IfxQspi_SpiMaster.h:617
IfxDma_Dma_Channel
Channel handle.
Definition: IfxDma_Dma.h:471
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxQspi_SpiMaster_ChannelConfig
Module Channel configuration structure.
Definition: IfxQspi_SpiMaster.h:644
IfxQspi_SpiMaster_ErrorFlags::expectTimeoutError
uint16 expectTimeoutError
[7:7] Expect Timeout Error
Definition: IfxQspi_SpiMaster.h:604
IfxQspi_SpiMaster_ErrorFlags::parityError
uint16 parityError
[0:0] Parity Error
Definition: IfxQspi_SpiMaster.h:597
IfxQspi_SpiMaster_readReceiveFifo
IFX_INLINE uint32 IfxQspi_SpiMaster_readReceiveFifo(IfxQspi_SpiMaster *handle)
Reads data or status in RxFIFO.
Definition: IfxQspi_SpiMaster.h:909
IfxQspi_SpiMaster_Dma::rxDmaChannelId
IfxDma_ChannelId rxDmaChannelId
DMA channel no for the Spi recieve.
Definition: IfxQspi_SpiMaster.h:579
IfxQspi_SpiMaster::dma
IfxQspi_SpiMaster_Dma dma
dma handle
Definition: IfxQspi_SpiMaster.h:638
IfxQspi_SpiMaster_InputOutput::output
IfxQspi_SpiMaster_Output output
SLSO pin configuration structure.
Definition: IfxQspi_SpiMaster.h:612
SpiIf_Ch_
Definition: SpiIf.h:211
IfxQspi_SpiMaster_Channel_s
Module Channel handle structure.
Definition: IfxQspi_SpiMaster.h:656


iLLD_TC26B: IfxQspi_SpiSlave.c Source File

  • Qspi
  • SpiSlave
IfxQspi_SpiSlave.c
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_SpiSlave.c
3 * \brief QSPI SPISLAVE details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxQspi_SpiSlave.h"
49
50 /** \addtogroup IfxLld_Qspi_SpiSlave_Support
51 * \{ */
52
53 /******************************************************************************/
54 /*-----------------------Private Function Prototypes--------------------------*/
55 /******************************************************************************/
56
57 /** \brief Reads data from the Rx FIFO
58 * \param handle Module handle
59 * \return None
60 */
61 IFX_STATIC void IfxQspi_SpiSlave_read(IfxQspi_SpiSlave *handle);
62
63 /** \brief Writes data into the Tx FIFO
64 * \param handle Module handle
65 * \return None
66 */
67 IFX_STATIC void IfxQspi_SpiSlave_write(IfxQspi_SpiSlave *handle);
68
69 /** \} */
70
71 /** \addtogroup IfxLld_Qspi_SpiSlave_DataStructures
72 * \{ */
73
74 /******************************************************************************/
75 /*------------------------Private Variables/Constants-------------------------*/
76 /******************************************************************************/
77
78 /** \brief dummy variable where recived data is placed
79 */
80 IFX_STATIC uint32 IfxQspi_SpiSlave_dummyRxValue = 0;
81
82 /** \brief dummy value to be transmitted
83 */
84 IFX_STATIC IFX_CONST uint32 IfxQspi_SpiSlave_dummyTxValue = ~0;
85
86 /** \} */
87
88 /******************************************************************************/
89 /*-------------------------Function Implementations---------------------------*/
90 /******************************************************************************/
91
92 SpiIf_Status IfxQspi_SpiSlave_exchange(IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
93 {
94 SpiIf_Status status = SpiIf_Status_busy;
95
96 /* initiate transfer when resource is free */
97 if (handle->onTransfer == FALSE)
98 {
99 status = SpiIf_Status_ok;
100
101 handle->onTransfer = TRUE;
102 handle->txJob.data = (void *)src;
103 handle->txJob.remaining = count;
104 handle->rxJob.data = dest;
105 handle->rxJob.remaining = count;
106 IfxQspi_SpiSlave_write(handle);
107 }
108
109 return status;
110 }
111
112
113 SpiIf_Status IfxQspi_SpiSlave_getStatus(IfxQspi_SpiSlave *handle)
114 {
115 SpiIf_Status status = SpiIf_Status_ok;
116
117 if (handle->onTransfer != 0)
118 {
119 status = SpiIf_Status_busy;
120 }
121
122 return status;
123 }
124
125
126 void IfxQspi_SpiSlave_initModule(IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
127 {
128 Ifx_QSPI *qspiSFR = config->qspi;
129 Ifx_DMA *dmaSFR = &MODULE_DMA;
130
131 /* handle.base must be at offset 0 to be compatible with the standard interface SscIf */
132 {
133 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
134 IfxScuWdt_clearCpuEndinit(password);
135 IfxQspi_setEnableModuleRequest(qspiSFR);
136 IfxQspi_setSleepMode(qspiSFR, (config->allowSleepMode != FALSE) ? IfxQspi_SleepMode_enable : IfxQspi_SleepMode_disable);
137 IfxScuWdt_setCpuEndinit(password);
138 }
139
140 { /* Configure GLOBAL, Note: at the moment default values for GLOBAL */
141 Ifx_QSPI_GLOBALCON globalcon;
142 globalcon.U = 0;
143 globalcon.B.TQ = IfxQspi_calculateTimeQuantumLength(qspiSFR, config->base.maximumBaudrate);
144 globalcon.B.EXPECT = IfxQspi_ExpectTimeout_2097152; /* 2^(EXPECT+6) : timeout for expect phase in Tqspi */
145 //globalcon.B.LB = 0; /* 0 : disable loop-back w*/
146 //globalcon.B.DEL0 = 0; /* 0 : disable delayed mode for SLSO 0 */
147 //globalcon.B.STROBE = 0; /* (STROBE+1) : strobe delay for SLSO 0 in Tq */
148 //globalcon.B.SRF = 0; /* 0 : disable stop-on-RXFIFO full feature */
149 //globalcon.B.STIP = 0; /* 0 : MRST = 0 when QSPI is deselected in slave mode */
150 //globalcon.B.EN = 0; /* 0 : PAUSE requested, 1 : RUN requested */
151 globalcon.B.MS = IfxQspi_Mode_master; /* select master mode during configuration - we will switch to slave mode at the end of this function */
152 globalcon.B.AREN = (config->pauseOnBaudrateSpikeErrors != FALSE) ? 1U : 0U;
153 globalcon.B.RESETS = 1; /* Reset SM and FIFOs */
154 qspiSFR->GLOBALCON.U = globalcon.U;
155 }
156
157 { /* Configure interrupt requests */
158 Ifx_QSPI_GLOBALCON1 globalcon1;
159 globalcon1.U = 0;
160 globalcon1.B.ERRORENS = (config->base.erPriority > 0) ? IFXQSPI_ERRORENABLEMASK : 0;
161 globalcon1.B.TXEN = (config->base.txPriority > 0) || (config->dma.useDma);
162 globalcon1.B.RXEN = (config->base.rxPriority > 0) || (config->dma.useDma);
163 globalcon1.B.TXFIFOINT = config->txFifoThreshold;
164 globalcon1.B.RXFIFOINT = config->rxFifoThreshold;
165 globalcon1.B.TXFM = config->txFifoMode;
166 globalcon1.B.RXFM = config->rxFifoMode;
167
168 qspiSFR->GLOBALCON1.U = globalcon1.U;
169 }
170
171 handle->qspi = qspiSFR;
172 handle->base.driver = handle;
173 handle->base.sending = 0U;
174 handle->base.activeChannel = NULL_PTR;
175
176 /* Protocol Configuration */
177 {
178 IfxQspi_SpiSlave_Protocol *protocol = (IfxQspi_SpiSlave_Protocol *)&config->protocol;
179
180 SpiIf_ChConfig chConfig;
181 SpiIf_initChannelConfig(&chConfig, NULL_PTR);
182 chConfig.mode.clockPolarity = protocol->clockPolarity;
183 chConfig.mode.shiftClock = protocol->shiftClock;
184 chConfig.mode.dataHeading = protocol->dataHeading;
185 chConfig.mode.dataWidth = protocol->dataWidth;
186 chConfig.mode.parityMode = protocol->parityMode;
187
188 {
189 Ifx_QSPI_BACON bacon;
190 uint8 cs = 0; // not relevant for slave
191
192 qspiSFR->ECON[cs].U = IfxQspi_calculateExtendedConfigurationValue(qspiSFR, cs, &chConfig);
193 bacon.U = IfxQspi_calculateBasicConfigurationValue(qspiSFR, IfxQspi_ChannelId_0, &chConfig.mode, config->base.maximumBaudrate);
194 IfxQspi_writeBasicConfigurationBeginStream(qspiSFR, bacon.U);
195 }
196 handle->dataWidth = protocol->dataWidth;
197 }
198
199 handle->rxJob.data = NULL_PTR;
200 handle->rxJob.remaining = 0;
201 handle->txJob.data = NULL_PTR;
202 handle->txJob.remaining = 0;
203 handle->onTransfer = FALSE;
204
205 /* Configure I/O pins for slave mode */
206 const IfxQspi_SpiSlave_Pins *pins = config->pins;
207
208 if (pins != NULL_PTR)
209 {
210 const IfxQspi_Sclk_In *sclkIn = pins->sclk;
211
212 if (sclkIn != NULL_PTR)
213 {
214 IfxQspi_initSclkInPinWithPadLevel(sclkIn, pins->sclkMode, pins->pinDriver);
215 }
216
217 const IfxQspi_Mtsr_In *mtsrIn = pins->mtsr;
218
219 if (mtsrIn != NULL_PTR)
220 {
221 IfxQspi_initMtsrInPinWithPadLevel(mtsrIn, pins->mtsrMode, pins->pinDriver);
222 }
223
224 const IfxQspi_Mrst_Out *mrstOut = pins->mrst;
225
226 if (mrstOut != NULL_PTR)
227 {
228 IfxQspi_initMrstOutPin(mrstOut, pins->mrstMode, pins->pinDriver);
229 }
230
231 const IfxQspi_Slsi_In *slsiIn = pins->slsi;
232
233 if (slsiIn != NULL_PTR)
234 {
235 IfxQspi_initSlsiWithPadLevel(slsiIn, pins->slsiMode, pins->pinDriver);
236 }
237 }
238
239 if (config->dma.useDma)
240 {
241 IfxDma_Dma dma;
242 IfxDma_Dma_createModuleHandle(&dma, dmaSFR);
243
244 IfxDma_Dma_ChannelConfig dmaCfg;
245 IfxDma_Dma_initChannelConfig(&dmaCfg, &dma);
246 handle->dma.useDma = TRUE;
247 {
248 handle->dma.txDmaChannelId = config->dma.txDmaChannelId;
249 dmaCfg.channelId = handle->dma.txDmaChannelId;
250 dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered from qspi service request
251 dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
252
253 // source address and transfer count will be configured during runtime
254 dmaCfg.sourceAddress = 0;
255 dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
256 dmaCfg.sourceCircularBufferEnabled = FALSE;
257 dmaCfg.transferCount = 0;
258 dmaCfg.moveSize = IfxDma_ChannelMoveSize_8bit;
259
260 // destination address is fixed; use circular mode to stay at this address for each move
261 dmaCfg.destinationAddress = (uint32)&qspiSFR->DATAENTRY[0].U;
262 dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
263 dmaCfg.destinationCircularBufferEnabled = TRUE;
264
265 dmaCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
266 dmaCfg.operationMode = IfxDma_ChannelOperationMode_single;
267 dmaCfg.blockMode = IfxDma_ChannelMove_1;
268
269 IfxDma_Dma_initChannel(&handle->dma.txDmaChannel, &dmaCfg);
270 }
271
272 {
273 handle->dma.rxDmaChannelId = config->dma.rxDmaChannelId;
274 dmaCfg.channelId = handle->dma.rxDmaChannelId;
275 dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered from qspi service request
276 dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
277
278 // source address is fixed; use circular mode to stay at this address for each move
279 dmaCfg.sourceAddress = (uint32)&qspiSFR->RXEXIT.U;
280 dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
281 dmaCfg.sourceCircularBufferEnabled = TRUE;
282
283 // destination address and transfer count will be configured during runtime
284 dmaCfg.destinationAddress = 0;
285 dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
286 dmaCfg.destinationCircularBufferEnabled = FALSE;
287 dmaCfg.transferCount = 0;
288
289 dmaCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
290 dmaCfg.operationMode = IfxDma_ChannelOperationMode_single;
291 dmaCfg.moveSize = IfxDma_ChannelMoveSize_8bit;
292 dmaCfg.blockMode = IfxDma_ChannelMove_1;
293
294 IfxDma_Dma_initChannel(&handle->dma.rxDmaChannel, &dmaCfg);
295 }
296 /* Dma channel interrupt configuration */
297 {
298 volatile Ifx_SRC_SRCR *src = IfxDma_getSrcPointer(dmaSFR, (IfxDma_ChannelId)config->dma.txDmaChannelId);
299 IfxSrc_init(src, config->base.isrProvider, config->base.txPriority);
300 IfxSrc_enable(src);
301
302 src = IfxDma_getSrcPointer(dmaSFR, (IfxDma_ChannelId)config->dma.rxDmaChannelId);
303 IfxSrc_init(src, config->base.isrProvider, config->base.rxPriority);
304 IfxSrc_enable(src);
305 }
306 }
307
308 /* interrupt configuration */
309 {
310 IfxQspi_clearAllEventFlags(qspiSFR);
311
312 if (handle->dma.useDma)
313 {
314 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
315 IfxSrc_init(src, IfxSrc_Tos_dma, (Ifx_Priority)config->dma.txDmaChannelId);
316 IfxSrc_enable(src);
317
318 src = IfxQspi_getReceiveSrc(qspiSFR);
319 IfxSrc_init(src, IfxSrc_Tos_dma, (Ifx_Priority)config->dma.rxDmaChannelId);
320 IfxSrc_enable(src);
321 }
322 else
323 {
324 if (config->base.txPriority != 0)
325 {
326 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
327 IfxSrc_init(src, config->base.isrProvider, config->base.txPriority);
328 IfxSrc_enable(src);
329 }
330
331 if (config->base.rxPriority != 0)
332 {
333 volatile Ifx_SRC_SRCR *src = IfxQspi_getReceiveSrc(qspiSFR);
334 IfxSrc_init(src, config->base.isrProvider, config->base.rxPriority);
335 IfxSrc_enable(src);
336 }
337
338 if (config->base.erPriority != 0)
339 {
340 volatile Ifx_SRC_SRCR *src = IfxQspi_getErrorSrc(qspiSFR);
341 IfxSrc_init(src, config->base.isrProvider, config->base.erPriority);
342 IfxSrc_enable(src);
343 }
344 }
345 }
346 /* finally switch to slave mode */
347 qspiSFR->GLOBALCON.B.MS = IfxQspi_Mode_slave;
348 IfxQspi_run(qspiSFR);
349 }
350
351
352 void IfxQspi_SpiSlave_initModuleConfig(IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
353 {
354 const IfxQspi_SpiSlave_Protocol defaultProtocol = {
355 .clockPolarity = SpiIf_ClockPolarity_idleLow,
356 .shiftClock = SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge,
357 .dataHeading = SpiIf_DataHeading_msbFirst,
358 .dataWidth = 8,
359 .parityMode = Ifx_ParityMode_even
360 };
361
362 SpiIf_initConfig(&config->base);
363
364 config->qspi = qspi;
365 config->allowSleepMode = FALSE;
366 config->pauseOnBaudrateSpikeErrors = FALSE,
367 config->pauseRunTransition = IfxQspi_PauseRunTransition_pause;
368 config->txFifoThreshold = IfxQspi_TxFifoInt_1;
369 config->rxFifoThreshold = IfxQspi_RxFifoInt_0;
370 config->txFifoMode = IfxQspi_FifoMode_combinedMove;
371 config->rxFifoMode = IfxQspi_FifoMode_combinedMove;
372 config->pins = NULL_PTR;
373 config->protocol = defaultProtocol;
374
375 config->dma.rxDmaChannelId = IfxDma_ChannelId_none;
376 config->dma.txDmaChannelId = IfxDma_ChannelId_none;
377 config->dma.useDma = FALSE;
378 }
379
380
381 void IfxQspi_SpiSlave_isrDmaReceive(IfxQspi_SpiSlave *qspiHandle)
382 {
383 Ifx_DMA *dmaSFR = &MODULE_DMA;
384 IfxDma_ChannelId rxDmaChannelId = qspiHandle->dma.rxDmaChannelId;
385
386 if (IfxDma_getAndClearChannelInterrupt(dmaSFR, rxDmaChannelId))
387 {
388 qspiHandle->onTransfer = FALSE;
389 }
390
391 IfxDma_getAndClearChannelPatternDetectionInterrupt(dmaSFR, rxDmaChannelId);
392 }
393
394
395 void IfxQspi_SpiSlave_isrDmaTransmit(IfxQspi_SpiSlave *qspiHandle)
396 {
397 Ifx_DMA *dmaSFR = &MODULE_DMA;
398 IfxDma_ChannelId txDmaChannelId = qspiHandle->dma.txDmaChannelId;
399 // TODO
400 IfxDma_getAndClearChannelPatternDetectionInterrupt(dmaSFR, txDmaChannelId);
401 IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId);
402 }
403
404
405 void IfxQspi_SpiSlave_isrError(IfxQspi_SpiSlave *handle)
406 {
407 Ifx_QSPI *qspiSFR = handle->qspi;
408 uint16 errorFlags = IfxQspi_getErrorFlags(qspiSFR);
409 IfxQspi_clearAllEventFlags(qspiSFR);
410 Ifx_DMA *dmaSFR = &MODULE_DMA;
411
412 /* store all the flags in the variable */
413
414 if ((errorFlags & IfxQspi_Error_parity))
415 {
416 handle->errorFlags.parityError = 1;
417 }
418
419 if ((errorFlags & IfxQspi_Error_configuration))
420 {
421 handle->errorFlags.configurationError = 1;
422 }
423
424 if ((errorFlags & IfxQspi_Error_baudrate))
425 {
426 handle->errorFlags.baudrateError = 1;
427 }
428
429 if ((errorFlags & IfxQspi_Error_expectTimeout))
430 {
431 handle->errorFlags.expectTimeoutError = 1;
432 }
433
434 if ((errorFlags & IfxQspi_Error_txfifoOverflow))
435 {
436 handle->errorFlags.txFifoOverflowError = 1;
437 }
438
439 if ((errorFlags & IfxQspi_Error_txfifoUnderflow))
440 {
441 handle->errorFlags.txFifoUnderflowError = 1;
442 }
443
444 if ((errorFlags & IfxQspi_Error_rxfifoOverflow))
445 {
446 handle->errorFlags.rxFifoOverflowError = 1;
447 }
448
449 if ((errorFlags & IfxQspi_Error_rxfifoUnderflow))
450 {
451 handle->errorFlags.rxFifoUnderflowError = 1;
452 }
453
454 if ((errorFlags & IfxQspi_Error_slsiMisplacedInactivation))
455 {
456 handle->errorFlags.slsiMisplacedInactivation = 1;
457 }
458
459 if (errorFlags)
460 {
461 handle->onTransfer = FALSE;
462 }
463
464 if (handle->dma.useDma)
465 {
466 IfxDma_getAndClearChannelInterrupt(dmaSFR, handle->dma.rxDmaChannelId);
467 IfxDma_getAndClearChannelInterrupt(dmaSFR, handle->dma.txDmaChannelId);
468 }
469 }
470
471
472 void IfxQspi_SpiSlave_isrReceive(IfxQspi_SpiSlave *handle)
473 {
474 IfxQspi_SpiSlave_read(handle);
475 }
476
477
478 void IfxQspi_SpiSlave_isrTransmit(IfxQspi_SpiSlave *handle)
479 {
480 IfxQspi_SpiSlave_write(handle);
481 }
482
483
484 IFX_STATIC void IfxQspi_SpiSlave_read(IfxQspi_SpiSlave *handle)
485 {
486 Ifx_QSPI *qspiSFR = handle->qspi;
487 SpiIf_Job *job = &handle->rxJob;
488 Ifx_SizeT count = (Ifx_SizeT)IfxQspi_getReceiveFifoLevel(qspiSFR);
489 count = __min(job->remaining, count);
490
491 if (job->data == NULL_PTR)
492 {
493 // no data should be buffered: do dummy reads
494 int i;
495
496 for (i = 0; i < count; ++i)
497 {
498 IfxQspi_readReceiveFifo(qspiSFR);
499 }
500 }
501 else
502 {
503 if (handle->dataWidth <= 8)
504 {
505 IfxQspi_read8(qspiSFR, job->data, count);
506 job->data = &(((uint8 *)job->data)[count]);
507 }
508 else if (handle->dataWidth <= 16)
509 {
510 IfxQspi_read16(qspiSFR, job->data, count);
511 job->data = &(((uint16 *)job->data)[count]);
512 }
513 else
514 {
515 IfxQspi_read32(qspiSFR, job->data, count);
516 job->data = &(((uint32 *)job->data)[count]);
517 }
518 }
519
520 job->remaining = job->remaining - count;
521
522 if (job->remaining == 0)
523 {
524 handle->onTransfer = FALSE;
525 }
526 }
527
528
529 IFX_STATIC void IfxQspi_SpiSlave_write(IfxQspi_SpiSlave *handle)
530 {
531 SpiIf_Job *job = &handle->txJob;
532
533 if (handle->dma.useDma)
534 {
535 Ifx_DMA *dmaSFR = &MODULE_DMA;
536 SpiIf_Job *jobrx = &handle->rxJob;
537
538 Ifx_QSPI *qspiSFR = handle->qspi;
539 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
540
541 IfxDma_ChannelId txDmaChannelId = handle->dma.txDmaChannelId;
542 IfxDma_ChannelId rxDmaChannelId = handle->dma.rxDmaChannelId;
543
544 boolean interruptState = IfxCpu_disableInterrupts();
545 IfxDma_setChannelTransferCount(dmaSFR, txDmaChannelId, job->remaining);
546
547 if (handle->dataWidth <= 8)
548 {
549 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_8bit);
550 }
551 else if (handle->dataWidth <= 16)
552 {
553 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_16bit);
554 }
555 else
556 {
557 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_32bit);
558 }
559
560 if (job->data == NULL_PTR)
561 {
562 IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &IfxQspi_SpiSlave_dummyTxValue));
563 IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
564 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
565 }
566 else
567 {
568 IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), job->data));
569 IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
570 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
571 }
572
573 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
574
575 /* Receive config */
576 IfxDma_setChannelTransferCount(dmaSFR, rxDmaChannelId, job->remaining);
577
578 if (handle->dataWidth <= 8)
579 {
580 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_8bit);
581 }
582 else if (handle->dataWidth <= 16)
583 {
584 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_16bit);
585 }
586 else
587 {
588 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_32bit);
589 }
590
591 if (jobrx->data == NULL_PTR)
592 {
593 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &IfxQspi_SpiSlave_dummyRxValue));
594 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
595 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
596 }
597 else
598 {
599 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), jobrx->data));
600 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
601 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
602 }
603
604 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
605 IfxQspi_clearAllEventFlags(qspiSFR);
606 src = IfxQspi_getTransmitSrc(qspiSFR);
607 IfxSrc_clearRequest(src);
608 src = IfxQspi_getReceiveSrc(qspiSFR);
609 IfxSrc_clearRequest(src);
610 src = IfxQspi_getErrorSrc(qspiSFR);
611 IfxSrc_clearRequest(src);
612
613 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
614 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
615 IfxDma_setChannelInterruptServiceRequest(dmaSFR, txDmaChannelId);
616 IfxDma_setChannelInterruptServiceRequest(dmaSFR, rxDmaChannelId);
617 IfxDma_enableChannelTransaction(dmaSFR, rxDmaChannelId);
618 IfxDma_enableChannelTransaction(dmaSFR, txDmaChannelId);
619 IfxDma_startChannelTransaction(dmaSFR, txDmaChannelId);
620
621 IfxCpu_restoreInterrupts(interruptState);
622 }
623 else
624 {
625 IfxQspi_ChannelId cs = IfxQspi_ChannelId_0;
626
627 if (job->remaining > 0)
628 {
629 Ifx_QSPI *qspiSFR = handle->qspi;
630 boolean interruptState = IfxCpu_disableInterrupts();
631 Ifx_SizeT count = (Ifx_SizeT)(IFXQSPI_HWFIFO_DEPTH - 1 - IfxQspi_getTransmitFifoLevel(qspiSFR)); // -1, since BACON allocates one FIFO entry
632 count = __min(job->remaining, count);
633
634 if (count > 0)
635 {
636 job->remaining = job->remaining - count;
637
638 if (job->data == NULL_PTR)
639 {
640 // no data should be sent (only received): send all
641 int i;
642
643 for (i = 0; i < count; ++i)
644 {
645 IfxQspi_writeTransmitFifo(qspiSFR, ~0);
646 }
647 }
648 else
649 {
650 if (handle->dataWidth <= 8)
651 {
652 IfxQspi_write8(qspiSFR, cs, job->data, count);
653 job->data = &(((uint8 *)job->data)[count]);
654 }
655 else if (handle->dataWidth <= 16)
656 {
657 IfxQspi_write16(qspiSFR, cs, job->data, count);
658 job->data = &(((uint16 *)job->data)[count]);
659 }
660 else
661 {
662 IfxQspi_write32(qspiSFR, cs, job->data, count);
663 job->data = &(((uint32 *)job->data)[count]);
664 }
665 }
666 }
667
668 IfxCpu_restoreInterrupts(interruptState);
669 }
670 }
671 }
IfxQspi_SpiSlave_Pins::mrstMode
IfxPort_OutputMode mrstMode
The MRST pin output mode.
Definition: IfxQspi_SpiSlave.h:361
IfxQspi_Mrst_Out
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:96
IfxQspi_SpiSlave_Protocol::dataHeading
SpiIf_DataHeading dataHeading
Specifies MSB or LSB first.
Definition: IfxQspi_SpiSlave.h:373
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:80
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxQspi_Error_txfifoOverflow
TX FIFO Overflow Error.
Definition: IfxQspi.h:129
IfxQspi_SpiSlave_Config::base
SpiIf_Config base
SPI interface configuration structure.
Definition: IfxQspi_SpiSlave.h:400
IfxQspi_SpiSlave_ErrorFlags::rxFifoOverflowError
uint16 rxFifoOverflowError
[5:5] RxFifo Overflow Error
Definition: IfxQspi_SpiSlave.h:346
IfxQspi_initMtsrInPinWithPadLevel
IFX_INLINE void IfxQspi_initMtsrInPinWithPadLevel(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MTSRIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1279
IfxQspi_SpiSlave_Config::rxFifoThreshold
IfxQspi_RxFifoInt rxFifoThreshold
Specifies the RXFIFO interrupt threshold.
Definition: IfxQspi_SpiSlave.h:406
IfxQspi_SpiSlave_Config::pauseOnBaudrateSpikeErrors
boolean pauseOnBaudrateSpikeErrors
Specifies module pause on baudrate or spike errors.
Definition: IfxQspi_SpiSlave.h:403
IfxDma_Dma_ChannelConfig::moveSize
IfxDma_ChannelMoveSize moveSize
Read/write data size.
Definition: IfxDma_Dma.h:493
IfxQspi_Error_rxfifoUnderflow
RX FIFO Underflow Error.
Definition: IfxQspi.h:132
IfxDma_Dma_ChannelConfig::sourceAddressCircularRange
IfxDma_ChannelIncrementCircular sourceAddressCircularRange
Determines which part of the source address remains unchanged and therby not updated after each move...
Definition: IfxDma_Dma.h:500
IfxDma_Dma_ChannelConfig::channelId
IfxDma_ChannelId channelId
Specifies the channel being used.
Definition: IfxDma_Dma.h:483
IfxQspi_read8
void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO.
Definition: IfxQspi.c:337
IfxQspi_SpiSlave_Config::pauseRunTransition
IfxQspi_PauseRunTransition pauseRunTransition
Specifies module run or pause mode.
Definition: IfxQspi_SpiSlave.h:404
IfxQspi_Error_baudrate
BaudRate Error.
Definition: IfxQspi.h:128
IfxQspi_SpiSlave_Pins::sclkMode
IfxPort_InputMode sclkMode
The SCLK pin input mode.
Definition: IfxQspi_SpiSlave.h:357
IfxQspi_read16
void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO.
Definition: IfxQspi.c:313
IfxQspi_ExpectTimeout_2097152
Expect phse time out 2097152.
Definition: IfxQspi.h:156
IFXQSPI_HWFIFO_DEPTH
#define IFXQSPI_HWFIFO_DEPTH
Definition: IfxQspi_cfg.h:67
SpiIf_ChConfig_
Definition: SpiIf.h:225
IfxQspi_Error_parity
Parity Error.
Definition: IfxQspi.h:126
IfxQspi_getErrorFlags
IFX_INLINE uint16 IfxQspi_getErrorFlags(Ifx_QSPI *qspi)
Definition: IfxQspi.h:959
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxDma_setChannelSourceAddress
IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address.
Definition: IfxDma.h:1642
IfxQspi_SpiSlave_Pins::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiSlave.h:364
IfxQspi_TxFifoInt_1
TxFifo Interrupt Threshold #1.
Definition: IfxQspi.h:275
IfxDma_Dma_initChannelConfig
void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration
Definition: IfxDma_Dma.c:176
IfxQspi_Sclk_In
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:72
SpiIf_::driver
pvoid driver
Spi specific driver.
Definition: SpiIf.h:152
IfxDma_ChannelMoveSize_16bit
1 DMA move is 16 bit wide
Definition: IfxDma.h:175
IfxQspi_SpiSlave_getStatus
SpiIf_Status IfxQspi_SpiSlave_getStatus(IfxQspi_SpiSlave *handle)
Gets the transmission status.
Definition: IfxQspi_SpiSlave.c:113
IfxQspi_SpiSlave_initModule
void IfxQspi_SpiSlave_initModule(IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
Initialises the module.
Definition: IfxQspi_SpiSlave.c:126
IfxDma_ChannelMoveSize_8bit
1 DMA move is 8 bit wide
Definition: IfxDma.h:174
IfxDma_Dma_ChannelConfig::sourceAddress
uint32 sourceAddress
Source address for the DMA channel.
Definition: IfxDma_Dma.h:484
SpiIf_::activeChannel
SpiIf_Ch * activeChannel
Channel actually transmitting / receiving.
Definition: SpiIf.h:154
IfxQspi_SpiSlave_Config::qspi
Ifx_QSPI * qspi
Pointer to QSPI module registers.
Definition: IfxQspi_SpiSlave.h:401
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxQspi_write16
void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO.
Definition: IfxQspi.c:412
IfxQspi_Error_rxfifoOverflow
RX FIFO Overflow Error.
Definition: IfxQspi.h:131
Ifx_ParityMode_even
Definition: Ifx_Types.h:121
IfxDma_Dma_ChannelConfig::blockMode
IfxDma_ChannelMove blockMode
Number of moves in a transfer.
Definition: IfxDma_Dma.h:490
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxDma_setChannelDestinationIncrementStep
IFX_INLINE void IfxDma_setChannelDestinationIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel destination pointer.
Definition: IfxDma.h:1589
IfxDma_Dma_ChannelConfig::sourceCircularBufferEnabled
boolean sourceCircularBufferEnabled
Enables/Disables the source circular buffering.
Definition: IfxDma_Dma.h:505
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxQspi_writeBasicConfigurationBeginStream
IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 0.
Definition: IfxQspi.h:1209
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxDma_enableChannelTransaction
IFX_INLINE void IfxDma_enableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable a DMA channel hardware transaction request.
Definition: IfxDma.h:1337
IfxDma_startChannelTransaction
IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Request a DMA channel transaction.
Definition: IfxDma.h:1680
IfxDma_Dma_ChannelConfig::destinationCircularBufferEnabled
boolean destinationCircularBufferEnabled
Enables/Disables the destination circular buffering.
Definition: IfxDma_Dma.h:506
IfxQspi_SpiSlave_Pins::slsiMode
IfxPort_InputMode slsiMode
The SLSI pin input mode.
Definition: IfxQspi_SpiSlave.h:363
IfxQspi_FifoMode_combinedMove
Combined Move Mode.
Definition: IfxQspi.h:287
IfxQspi_SpiSlave_exchange
SpiIf_Status IfxQspi_SpiSlave_exchange(IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data.
Definition: IfxQspi_SpiSlave.c:92
IfxDma_Dma_ChannelConfig::hardwareRequestEnabled
boolean hardwareRequestEnabled
Enabling channel transaction via hardware request.
Definition: IfxDma_Dma.h:497
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:933
IfxDma_setChannelSourceIncrementStep
IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel source pointer.
Definition: IfxDma.h:1648
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxQspi_SpiSlave_ErrorFlags::txFifoOverflowError
uint16 txFifoOverflowError
[3:3] TxFifo Overflow Error
Definition: IfxQspi_SpiSlave.h:344
IfxQspi_run
IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi)
Request for QSPI in Run state.
Definition: IfxQspi.h:1127
IfxQspi_setSleepMode
IFX_INLINE void IfxQspi_setSleepMode(Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
Sets the disable module request.
Definition: IfxQspi.h:1178
IfxQspi_calculateExtendedConfigurationValue
uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values.
Definition: IfxQspi.c:96
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxQspi_SpiSlave_isrDmaReceive
void IfxQspi_SpiSlave_isrDmaReceive(IfxQspi_SpiSlave *qspiHandle)
Dma receive interrupt handler.
Definition: IfxQspi_SpiSlave.c:381
IfxDma_getAndClearChannelInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to...
Definition: IfxDma.h:1375
IfxQspi_SpiSlave_Dma::rxDmaChannelId
IfxDma_ChannelId rxDmaChannelId
DMA channel no for the Spi recieve.
Definition: IfxQspi_SpiSlave.h:323
IfxQspi_SpiSlave_isrError
void IfxQspi_SpiSlave_isrError(IfxQspi_SpiSlave *handle)
Error Interrupt handler.
Definition: IfxQspi_SpiSlave.c:405
IfxQspi_setEnableModuleRequest
IFX_INLINE void IfxQspi_setEnableModuleRequest(Ifx_QSPI *qspi)
Sets the enable module request.
Definition: IfxQspi.h:1160
IfxQspi_SpiSlave_Pins
Slave pin IO configuration structure.
Definition: IfxQspi_SpiSlave.h:354
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxQspi_calculateBasicConfigurationValue
uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values.
Definition: IfxQspi.c:67
IfxQspi_readReceiveFifo
IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
Read the oldest data from RXFIFO.
Definition: IfxQspi.h:1115
SpiIf_DataHeading_msbFirst
Definition: SpiIf.h:90
IfxDma_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel.
Definition: IfxDma.h:1527
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxQspi_SpiSlave_Dma::txDmaChannel
IfxDma_Dma_Channel txDmaChannel
transmit DMA channel handle
Definition: IfxQspi_SpiSlave.h:322
IfxQspi_SpiSlave
Module handle data structure.
Definition: IfxQspi_SpiSlave.h:384
IfxQspi_SpiSlave_Config::dma
IfxQspi_SpiSlave_DmaConfig dma
Dma configuration.
Definition: IfxQspi_SpiSlave.h:409
IfxQspi_SpiSlave_isrTransmit
void IfxQspi_SpiSlave_isrTransmit(IfxQspi_SpiSlave *handle)
Transmit interrupt handler.
Definition: IfxQspi_SpiSlave.c:478
SpiIf_Status_ok
Definition: SpiIf.h:68
IfxQspi_SpiSlave_dummyRxValue
IFX_STATIC uint32 IfxQspi_SpiSlave_dummyRxValue
dummy variable where recived data is placed
Definition: IfxQspi_SpiSlave.c:80
IfxQspi_ChannelId
IfxQspi_ChannelId
QSPI channel Number (BACON.CS)
Definition: IfxQspi.h:94
SpiIf_Config::maximumBaudrate
float32 maximumBaudrate
Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock...
Definition: SpiIf.h:173
IfxQspi_PauseRunTransition_pause
Request value for pause.
Definition: IfxQspi.h:172
IfxQspi_getTransmitSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getTransmitSrc(Ifx_QSPI *qspi)
Gets the TXFIFO service request.
Definition: IfxQspi.h:1023
IfxQspi_SpiSlave_Pins::sclk
IFX_CONST IfxQspi_Sclk_In * sclk
Pointer to SLCK in pin.
Definition: IfxQspi_SpiSlave.h:356
IfxQspi_Mtsr_In
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:64
IfxQspi_RxFifoInt_0
RxFifo Interrupt Threshold #0.
Definition: IfxQspi.h:218
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:656
IfxDma_ChannelMove_1
1 DMA move per DMA transfer
Definition: IfxDma.h:159
IfxDma_ChannelMoveSize_32bit
1 DMA move is 32 bit wide
Definition: IfxDma.h:176
IfxDma_Dma_ChannelConfig::transferCount
uint16 transferCount
Number of transfers in a transaction.
Definition: IfxDma_Dma.h:489
IfxQspi_SpiSlave_Config::rxFifoMode
IfxQspi_FifoMode rxFifoMode
Specifies the receive FIFO mode.
Definition: IfxQspi_SpiSlave.h:411
IfxQspi_SpiSlave_Dma::rxDmaChannel
IfxDma_Dma_Channel rxDmaChannel
receive DMA channel handle
Definition: IfxQspi_SpiSlave.h:321
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxQspi_SpiSlave_Config::protocol
IfxQspi_SpiSlave_Protocol protocol
Definition: IfxQspi_SpiSlave.h:408
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:70
IfxQspi_getReceiveFifoLevel
IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of RXFIFO.
Definition: IfxQspi.h:992
IfxDma_ChannelIncrementStep_1
increment by 1 width
Definition: IfxDma.h:135
SpiIf_initChannelConfig
void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver)
Definition: SpiIf.c:57
IFXCPU_GLB_ADDR_DSPR
#define IFXCPU_GLB_ADDR_DSPR(cpu, address)
Convert local DSPR address to global DSPR address which can be accessed from the SRI bus...
Definition: IfxCpu.h:90
IfxQspi_write32
void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO.
Definition: IfxQspi.c:425
IfxQspi_Error_txfifoUnderflow
TX FIFO Underflow Error.
Definition: IfxQspi.h:130
IfxQspi_SpiSlave_Config::pins
IFX_CONST IfxQspi_SpiSlave_Pins * pins
structure for QSPI Slave pins
Definition: IfxQspi_SpiSlave.h:407
IfxQspi_SpiSlave_Protocol::dataWidth
uint8 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: IfxQspi_SpiSlave.h:374
IfxQspi_SpiSlave.h
QSPI SPISLAVE details.
IfxDma_ChannelRequestMode_oneTransferPerRequest
a request initiates a single transfer
Definition: IfxDma.h:220
IfxQspi_getReceiveSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getReceiveSrc(Ifx_QSPI *qspi)
Gets the RXFIFO service request.
Definition: IfxQspi.h:998
IfxDma_ChannelIncrementCircular_4
circular buffer size is 4 byte
Definition: IfxDma.h:105
IfxDma_Dma_createModuleHandle
void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it&#39;s en...
Definition: IfxDma_Dma.c:121
SpiIf_Status_busy
Definition: SpiIf.h:69
IfxQspi_SpiSlave::rxJob
SpiIf_Job rxJob
Rx Stream which has been received.
Definition: IfxQspi_SpiSlave.h:389
IfxDma_Dma
DMA base address data structure (Module handle)
Definition: IfxDma_Dma.h:460
IfxQspi_Mode_slave
QSPI in "slave" mode.
Definition: IfxQspi.h:165
IfxQspi_SpiSlave_read
IFX_STATIC void IfxQspi_SpiSlave_read(IfxQspi_SpiSlave *handle)
Reads data from the Rx FIFO.
Definition: IfxQspi_SpiSlave.c:484
IfxQspi_SpiSlave_write
IFX_STATIC void IfxQspi_SpiSlave_write(IfxQspi_SpiSlave *handle)
Writes data into the Tx FIFO.
Definition: IfxQspi_SpiSlave.c:529
IfxQspi_SleepMode_disable
Sleep Mode disabled.
Definition: IfxQspi.h:230
IfxQspi_SpiSlave_Config
Module configuration structure.
Definition: IfxQspi_SpiSlave.h:398
IfxQspi_SpiSlave::onTransfer
boolean onTransfer
set to TRUE during ongoing transfer
Definition: IfxQspi_SpiSlave.h:391
IFXQSPI_ERRORENABLEMASK
#define IFXQSPI_ERRORENABLEMASK
Errors enable mask for ERRORENS.
Definition: IfxQspi.h:84
IfxQspi_SpiSlave_dummyTxValue
IFX_STATIC IFX_CONST uint32 IfxQspi_SpiSlave_dummyTxValue
dummy value to be transmitted
Definition: IfxQspi_SpiSlave.c:84
IfxDma_ChannelOperationMode_single
channel disabled after transaction
Definition: IfxDma.h:187
IfxDma_getAndClearChannelPatternDetectionInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the pattern detection interrupt flag.
Definition: IfxDma.h:1390
SpiIf_initConfig
void SpiIf_initConfig(SpiIf_Config *config)
Definition: SpiIf.c:44
IfxQspi_SpiSlave_Pins::mrst
IFX_CONST IfxQspi_Mrst_Out * mrst
Pointer to MRST out pin.
Definition: IfxQspi_SpiSlave.h:360
IfxQspi_getErrorSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getErrorSrc(Ifx_QSPI *qspi)
Gets the Error request value.
Definition: IfxQspi.h:965
SpiIf_Config::erPriority
Ifx_Priority erPriority
Specifies the priority of the error interrupt.
Definition: SpiIf.h:165
SpiIf_ClockPolarity_idleLow
Definition: SpiIf.h:103
IfxDma_setChannelTransferCount
IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction.
Definition: IfxDma.h:1665
IfxQspi_read32
void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO.
Definition: IfxQspi.c:325
IfxQspi_SpiSlave_Protocol::parityMode
Ifx_ParityMode parityMode
Specifies the parity mode.
Definition: IfxQspi_SpiSlave.h:375
IfxQspi_SpiSlave_DmaConfig::useDma
boolean useDma
use Dma for Data transfers
Definition: IfxQspi_SpiSlave.h:334
IfxQspi_SpiSlave_ErrorFlags::slsiMisplacedInactivation
uint16 slsiMisplacedInactivation
[8:8] SLSI misplaced inactivation (slave mode)
Definition: IfxQspi_SpiSlave.h:349
IfxDma_Dma_ChannelConfig::operationMode
IfxDma_ChannelOperationMode operationMode
keep enable/disable the hardware channel request after a transaction
Definition: IfxDma_Dma.h:492
SpiIf_Job::remaining
Ifx_SizeT remaining
Definition: SpiIf.h:124
IfxDma_ChannelIncrementDirection_positive
pointer is incremented
Definition: IfxDma.h:127
SpiIf_::sending
uint32 sending
Definition: SpiIf.h:153
IfxSrc_clearRequest
IFX_INLINE void IfxSrc_clearRequest(volatile Ifx_SRC_SRCR *src)
Resets a specific interrupt service by software.
Definition: IfxSrc.h:247
IfxQspi_calculateTimeQuantumLength
uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length.
Definition: IfxQspi.c:233
uint16
unsigned short uint16
Definition: Platform_Types.h:112
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
IfxQspi_SpiSlave_Pins::slsi
IFX_CONST IfxQspi_Slsi_In * slsi
Pointer to SLSI in pin.
Definition: IfxQspi_SpiSlave.h:362
IfxDma_Dma_ChannelConfig
Configuration data structure of the channel.
Definition: IfxDma_Dma.h:480
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge
Definition: SpiIf.h:96
IfxDma_clearChannelInterrupt
IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag.
Definition: IfxDma.h:1262
IfxDma_Dma_initChannel
void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel
Definition: IfxDma_Dma.c:141
IfxQspi_SpiSlave::txJob
SpiIf_Job txJob
Tx Stream which should be sent.
Definition: IfxQspi_SpiSlave.h:390
SpiIf_Config::isrProvider
IfxSrc_Tos isrProvider
Specifies the handler of the interrupts.
Definition: SpiIf.h:166
SpiIf_Job
Definition: SpiIf.h:121
SpiIf_Config::rxPriority
Ifx_Priority rxPriority
Specifies the priority of the receive interrupt.
Definition: SpiIf.h:163
IfxQspi_SpiSlave_ErrorFlags::txFifoUnderflowError
uint16 txFifoUnderflowError
[4:4] TxFifo underflow Error
Definition: IfxQspi_SpiSlave.h:345
IfxQspi_SpiSlave_Protocol::shiftClock
SpiIf_ShiftClock shiftClock
Specifies the clock phase.
Definition: IfxQspi_SpiSlave.h:372
IfxQspi_SpiSlave_ErrorFlags::expectTimeoutError
uint16 expectTimeoutError
[7:7] Expect Timeout Error
Definition: IfxQspi_SpiSlave.h:348
IfxQspi_SpiSlave::base
SpiIf base
Module SPI interface handle.
Definition: IfxQspi_SpiSlave.h:386
IfxDma_setChannelDestinationAddress
IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address.
Definition: IfxDma.h:1583
IfxQspi_clearAllEventFlags
IFX_INLINE void IfxQspi_clearAllEventFlags(Ifx_QSPI *qspi)
Clear ALL service requests.
Definition: IfxQspi.h:903
IfxQspi_SpiSlave::errorFlags
IfxQspi_SpiSlave_ErrorFlags errorFlags
Spi Slave Error Flags.
Definition: IfxQspi_SpiSlave.h:393
IfxQspi_SpiSlave_Config::txFifoMode
IfxQspi_FifoMode txFifoMode
Specifies the transfer FIFO mode.
Definition: IfxQspi_SpiSlave.h:410
IfxQspi_writeTransmitFifo
IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register.
Definition: IfxQspi.h:1242
IfxQspi_SpiSlave_ErrorFlags::configurationError
uint16 configurationError
[1:1] Configuration Error
Definition: IfxQspi_SpiSlave.h:342
IfxDma_setChannelMoveSize
IFX_INLINE void IfxDma_setChannelMoveSize(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
Configure a DMA channel move.
Definition: IfxDma.h:1612
IfxQspi_Mode_master
QSPI in "master" mode.
Definition: IfxQspi.h:163
IfxQspi_SpiSlave_ErrorFlags::parityError
uint16 parityError
[0:0] Parity Error
Definition: IfxQspi_SpiSlave.h:341
IfxDma_ChannelId_none
None of the Ifx_DMA Channels.
Definition: IfxDma_cfg.h:104
IfxQspi_initSclkInPinWithPadLevel
IFX_INLINE void IfxQspi_initSclkInPinWithPadLevel(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SCLKIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1287
IfxDma_Dma_ChannelConfig::destinationAddress
uint32 destinationAddress
Destination address for the DMA channel.
Definition: IfxDma_Dma.h:485
IfxQspi_Error_expectTimeout
EXPECT Timeout Error.
Definition: IfxQspi.h:133
IfxQspi_SpiSlave_isrReceive
void IfxQspi_SpiSlave_isrReceive(IfxQspi_SpiSlave *handle)
Receive Interrupt handler.
Definition: IfxQspi_SpiSlave.c:472
IfxQspi_SpiSlave_ErrorFlags::baudrateError
uint16 baudrateError
[2:2] baudrate Error
Definition: IfxQspi_SpiSlave.h:343
IfxCpu_getCoreId
IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu&#39;s may not be continguous and...
Definition: IfxCpu.h:770
IfxQspi_initMrstOutPin
IFX_INLINE void IfxQspi_initMrstOutPin(const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver)
Initializes a MRST output.
Definition: IfxQspi.h:1043
IfxDma_Dma_ChannelConfig::requestMode
IfxDma_ChannelRequestMode requestMode
A service request initiates a single transfer, or the complete transaction.
Definition: IfxDma_Dma.h:491
IfxDma_Dma_ChannelConfig::destinationAddressCircularRange
IfxDma_ChannelIncrementCircular destinationAddressCircularRange
Determines which part of the destination address remains unchanged and therby not updated after each ...
Definition: IfxDma_Dma.h:503
IfxQspi_Error_configuration
Configuration Error.
Definition: IfxQspi.h:127
IfxQspi_SpiSlave_Config::txFifoThreshold
IfxQspi_TxFifoInt txFifoThreshold
Specifies the TXFIFO interrupt threshold.
Definition: IfxQspi_SpiSlave.h:405
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxQspi_write8
void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO.
Definition: IfxQspi.c:438
IfxDma_setChannelInterruptServiceRequest
IFX_INLINE void IfxDma_setChannelInterruptServiceRequest(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Setting of channel interrupt service request by software.
Definition: IfxDma.h:1606
IfxQspi_SpiSlave_Dma::txDmaChannelId
IfxDma_ChannelId txDmaChannelId
DMA channel no for the Spi transmit.
Definition: IfxQspi_SpiSlave.h:324
IfxQspi_SpiSlave::dma
IfxQspi_SpiSlave_Dma dma
Dma handle.
Definition: IfxQspi_SpiSlave.h:392
SpiIf_Status
SpiIf_Status
SPI Interface Status.
Definition: SpiIf.h:66
IfxDma_Dma_ChannelConfig::channelInterruptEnabled
boolean channelInterruptEnabled
The channel transfer interrupt should be triggered. See also channelInterruptControl.
Definition: IfxDma_Dma.h:510
IfxQspi_getTransmitFifoLevel
IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of TXFIFO.
Definition: IfxQspi.h:1017
IfxQspi_Error_slsiMisplacedInactivation
SLSI misplaced inactivation (slave mode)
Definition: IfxQspi.h:134
IfxQspi_SpiSlave_Protocol
Configures the SPI Protocol.
Definition: IfxQspi_SpiSlave.h:369
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxQspi_SpiSlave_Pins::mtsr
IFX_CONST IfxQspi_Mtsr_In * mtsr
Pointer to MTSR in pin.
Definition: IfxQspi_SpiSlave.h:358
IfxQspi_SpiSlave_Protocol::clockPolarity
SpiIf_ClockPolarity clockPolarity
Specifies the clock polarity.
Definition: IfxQspi_SpiSlave.h:371
SpiIf_Config::txPriority
Ifx_Priority txPriority
Specifies the priority of the transmit interrupt.
Definition: SpiIf.h:164
IfxQspi_SleepMode_enable
Sleep Mode enabled.
Definition: IfxQspi.h:229
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxQspi_SpiSlave_isrDmaTransmit
void IfxQspi_SpiSlave_isrDmaTransmit(IfxQspi_SpiSlave *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiSlave.c:395
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxQspi_SpiSlave_Config::allowSleepMode
boolean allowSleepMode
Specifies module sleep mode.
Definition: IfxQspi_SpiSlave.h:402
IfxQspi_SpiSlave_initModuleConfig
void IfxQspi_SpiSlave_initModuleConfig(IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values.
Definition: IfxQspi_SpiSlave.c:352
IfxQspi_initSlsiWithPadLevel
IFX_INLINE void IfxQspi_initSlsiWithPadLevel(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SLSI pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1295
IfxQspi_SpiSlave_Pins::mtsrMode
IfxPort_InputMode mtsrMode
The MTSR pin input mode.
Definition: IfxQspi_SpiSlave.h:359
SpiIf_Job::data
void * data
Definition: SpiIf.h:123
IfxDma_ChannelIncrementCircular_none
no circular buffer operation
Definition: IfxDma.h:103
IfxQspi_ChannelId_0
Channel #0.
Definition: IfxQspi.h:96
IfxQspi_SpiSlave_ErrorFlags::rxFifoUnderflowError
uint16 rxFifoUnderflowError
[6:6] RxFifo underflow Error
Definition: IfxQspi_SpiSlave.h:347


iLLD_TC26B: IfxQspi_SpiSlave.h Source File

  • Qspi
  • SpiSlave
IfxQspi_SpiSlave.h
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_SpiSlave.h
3 * \brief QSPI SPISLAVE details
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Qspi_SpiSlave_Usage How to use the SPI Slave Interface driver?
44 * \ingroup IfxLld_Qspi
45 *
46 * The SPI Slave interface driver provides a default QSPI configuration for a bidirectional serial communication of data words.
47 *
48 * Data transactions are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the QSPI peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.
49 * Optionally Dma can be used for data transfers. Only the interrupt configuration and Module initialisation are different when dma is used.
50 *
51 * In the following sections it will be described, how to integrate the driver into the application framework.
52 *
53 * \section IfxLld_Qspi_SpiSlave_Preparation Preparation
54 * \subsection IfxLld_Qspi_SpiSlave_Include Include Files
55 *
56 * Include following header file into your C code:
57 * \code
58 * #include <Qspi/SpiSlave/IfxQspi_SpiSlave.h>
59 * \endcode
60 *
61 * \subsection IfxLld_Qspi_SpiSlave_Variables Variables
62 *
63 * Declare QSPI module handle:
64 *
65 * \code
66 * IfxQspi_SpiSlave spi;
67 * \endcode
68 *
69 * In addition, declare global transmit and receive buffers for the data transfers:
70 * \code
71 * #define SPI_BUFFER_SIZE 8
72 * uint8 spiTxBuffer[SPI_BUFFER_SIZE];
73 * uint8 spiRxBuffer[SPI_BUFFER_SIZE];
74 * \endcode
75 *
76 * \subsection IfxLld_Qspi_SpiSlave_Interrupt Interrupt Handler Installation (without dma use)
77 *
78 * See also \ref IfxLld_Cpu_Irq_Usage
79 *
80 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
81 * \code
82 * // priorities are normally defined in Ifx_IntPrioDef.h
83 * #define IFX_INTPRIO_QSPI2_TX 1
84 * #define IFX_INTPRIO_QSPI2_RX 2
85 * #define IFX_INTPRIO_QSPI2_ER 5
86 * \endcode
87 *
88 * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
89 * \code
90 * IFX_INTERRUPT(qspi2TxISR, 0, IFX_INTPRIO_QSPI2_TX)
91 * {
92 * IfxQspi_SpiSlave_isrTransmit(&spi);
93 * }
94 *
95 * IFX_INTERRUPT(qspi2RxISR, 0, IFX_INTPRIO_QSPI2_RX)
96 * {
97 * IfxQspi_SpiSlave_isrReceive(&spi);
98 * }
99 *
100 * IFX_INTERRUPT(qspi2ErISR, 0, IFX_INTPRIO_QSPI2_ER)
101 * {
102 * IfxQspi_SpiSlave_isrError(&spi);
103 * // Process errors. Eg: parity Error is checked below
104 * if( spi.errorFlags.parityError == 1)
105 * {
106 * // Parity Error
107 * }
108 * }
109 * \endcode
110 *
111 * Finally install the interrupt handlers in your initialisation function:
112 * \code
113 * // install interrupt handlers
114 * IfxCpu_Irq_installInterruptHandler(&qspi2TxISR, IFX_INTPRIO_QSPI2_TX);
115 * IfxCpu_Irq_installInterruptHandler(&qspi2RxISR, IFX_INTPRIO_QSPI2_RX);
116 * IfxCpu_Irq_installInterruptHandler(&qspi2ErISR, IFX_INTPRIO_QSPI2_ER);
117 * IfxCpu_enableInterrupts();
118 * \endcode
119 *
120 * \subsection IfxLld_Qspi_SpiSlave_Interrupt_dma Interrupt Handler Installation (with dma use)
121 *
122 * See also \ref IfxLld_Cpu_Irq_Usage
123 *
124 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
125 * \code
126 * // priorities are normally defined in Ifx_IntPrioDef.h
127 * // qspi priorities
128 * #define IFX_INTPRIO_QSPI2_TX 3 // DMA channel 3
129 * #define IFX_INTPRIO_QSPI2_RX 4 // DMA channel 4
130 * #define IFX_INTPRIO_QSPI2_ER 0x31
131 * // dma priorities
132 * #define IFX_INTPRIO_DMA_CH3 12
133 * #define IFX_INTPRIO_DMA_CH4 13
134 * \endcode
135 *
136 * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
137 * \code
138 * IFX_INTERRUPT(qspi2DmaTxISR, 0, IFX_INTPRIO_DMA_CH3)
139 * {
140 * IfxQspi_SpiSlave_isrDmaTransmit(&spi);
141 *
142 * }
143 *
144 * IFX_INTERRUPT(qspi2DmaRxISR, 0, IFX_INTPRIO_DMA_CH4)
145 * {
146 * IfxQspi_SpiSlave_isrDmaReceive(&spi);
147 * }
148 *
149 * IFX_INTERRUPT(qspi2ErISR, 0, IFX_INTPRIO_QSPI2_ER)
150 * {
151 * IfxQspi_SpiSlave_isrError(&spi);
152 * // Process errors. Eg: parity Error is checked below
153 * if( spi.errorFlags.parityError == 1)
154 * {
155 * // Parity Error
156 * }
157 *
158 * }
159 * \endcode
160 *
161 * Finally install the interrupt handlers in your initialisation function:
162 * \code
163 * // install interrupt handlers
164 * IfxCpu_Irq_installInterruptHandler(&qspi2DmaTxISR, IFX_INTPRIO_DMA_CH3);
165 * IfxCpu_Irq_installInterruptHandler(&qspi2DmaRxISR, IFX_INTPRIO_DMA_CH4);
166 * IfxCpu_Irq_installInterruptHandler(&qspi2ErISR, IFX_INTPRIO_QSPI2_ER);
167 * IfxCpu_enableInterrupts();
168 * \endcode
169 *
170 * \subsection IfxLld_Qspi_SpiSlave_Init Module Initialisation (without dma use)
171 *
172 * The module initialisation can be done in the same function.
173 *
174 * Here an example for slave mode:
175 * \code
176 * // create module config
177 * IfxQspi_SpiSlave_Config spiSlaveConfig;
178 * IfxQspi_SpiSlave_initModuleConfig(&spiSlaveConfig, &MODULE_QSPI2);
179 *
180 * // set the maximum baudrate
181 * spiSlaveConfig.base.maximumBaudrate = 10000000;
182 *
183 * // ISR priorities and interrupt target
184 * spiSlaveConfig.base.txPriority = IFX_INTPRIO_QSPI2_TX;
185 * spiSlaveConfig.base.rxPriority = IFX_INTPRIO_QSPI2_RX;
186 * spiSlaveConfig.base.erPriority = IFX_INTPRIO_QSPI2_ER;
187 * spiSlaveConfig.base.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
188 *
189 * // pin configuration
190 * const IfxQspi_SpiSlave_Pins slavePins = {
191 * &IfxQspi2_SCLKA_P15_3_IN, IfxPort_InputMode_pullDown, // SCLK Pin
192 * &IfxQspi2_MTSRA_P15_5_IN, IfxPort_InputMode_pullDown, // MTSR Pin
193 * &IfxQspi2_MRST_P15_7_OUT, IfxPort_OutputMode_pushPull, // MRST Pin
194 * &IfxQspi2_SLSIA_P15_2_IN, IfxPort_InputMode_pullDown, // SLSI Pin
195 * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
196 * };
197 * spiSlaveConfig.pins = &slavePins;
198 *
199 * // initialize module
200 * //IfxQspi_Spi spi; // defined globally
201 * IfxQspi_SpiSlave_initModule(&spi, &spiSlaveConfig);
202 * \endcode
203 *
204 * \subsection IfxLld_Qspi_SpiSlave_Init_dma Module Initialisation (with dma use)
205 *
206 * The module initialisation can be done in the same function.
207 *
208 * Here an example for slave mode:
209 * \code
210 * // create module config
211 * IfxQspi_SpiSlave_Config spiSlaveConfig;
212 * IfxQspi_SpiSlave_initModuleConfig(&spiSlaveConfig, &MODULE_QSPI2);
213 *
214 * // set the maximum baudrate
215 * spiSlaveConfig.base.maximumBaudrate = 10000000;
216 *
217 * // ISR priorities and interrupt target (with dma usage)
218 * spiSlaveConfig.base.txPriority = IFX_INTPRIO_DMA_CH3;
219 * spiSlaveConfig.base.rxPriority = IFX_INTPRIO_DMA_CH4;
220 * spiSlaveConfig.base.erPriority = IFX_INTPRIO_QSPI2_ER;
221 *
222 * spiSlaveConfig.dma.txDmaChannelId = IfxDma_ChannelId_3;
223 * spiSlaveConfig.dma.rxDmaChannelId = IfxDma_ChannelId_4;
224 * spiSlaveConfig.dma.useDma = 1;
225 *
226 * // pin configuration
227 * const IfxQspi_SpiSlave_Pins slavePins = {
228 * &IfxQspi2_SCLKA_P15_3_IN, IfxPort_InputMode_pullDown, // SCLK Pin
229 * &IfxQspi2_MTSRA_P15_5_IN, IfxPort_InputMode_pullDown, // MTSR Pin
230 * &IfxQspi2_MRST_P15_7_OUT, IfxPort_OutputMode_pushPull, // MRST Pin
231 * &IfxQspi2_SLSIA_P15_2_IN, IfxPort_InputMode_pullDown, // SLSI Pin
232 * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
233 * };
234 * spiSlaveConfig.pins = &slavePins;
235 *
236 * // initialize module
237 * //IfxQspi_Spi spi; // defined globally
238 * IfxQspi_SpiSlave_initModule(&spi, &spiSlaveConfig);
239 * \endcode
240 *
241 * The QSPI is ready for use now!
242 *
243 *
244 * \section IfxLld_Qspi_SpiSlave_DataTransfers Data Transfers
245 *
246 * In following examples we assume, that following buffers are declared globally:
247 * \code
248 * // declared somewhere globally
249 * #define SPI_BUFFER_SIZE 8
250 * uint8 spiTxBuffer[SPI_BUFFER_SIZE] = { 1, 2, 3, 4, 5, 6, 7, 8 };
251 * uint8 spiRxBuffer[SPI_BUFFER_SIZE] = { 0, 0, 0, 0, 0, 0, 0, 0 };
252 * \endcode
253 *
254 * Sending and Receiving a data stream:
255 * \code
256 * int i = 0;
257 * // wait until transfer of previous data stream is finished
258 * while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
259 *
260 * // send/receive new stream
261 * IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);
262 * \endcode
263 *
264 * Send only, discard received data:
265 * \code
266 *
267 * // wait until transfer of previous data stream is finished
268 * while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
269 *
270 * // send new stream
271 * IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], NULL_PTR, SPI_BUFFER_SIZE);
272 * \endcode
273 *
274 * Receive only, send all-1
275 * \code
276 * // wait until transfer of previous data stream is finished
277 * while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
278 *
279 * // receive new stream
280 * IfxQspi_SpiSlave_exchange(&spi, NULL_PTR, &spiRxBuffer[i], SPI_BUFFER_SIZE);
281 * \endcode
282 *
283 * \defgroup IfxLld_Qspi_SpiSlave SPI Slave Driver
284 * \ingroup IfxLld_Qspi
285 * \defgroup IfxLld_Qspi_SpiSlave_DataStructures Data Structures
286 * \ingroup IfxLld_Qspi_SpiSlave
287 * \defgroup IfxLld_Qspi_SpiSlave_Module Module Functions
288 * \ingroup IfxLld_Qspi_SpiSlave
289 * \defgroup IfxLld_Qspi_SpiSlave_Support Support Functions
290 * \ingroup IfxLld_Qspi_SpiSlave
291 * \defgroup IfxLld_Qspi_SpiSlave_Com Communication
292 * \ingroup IfxLld_Qspi_SpiSlave
293 * \defgroup IfxLld_Qspi_SpiSlave_InterruptFunctions Interrupt Functions
294 * \ingroup IfxLld_Qspi_SpiSlave
295 * \defgroup IfxLld_Qspi_SpiSlave_DirectFifo Direct FIFO Access
296 * \ingroup IfxLld_Qspi_SpiSlave
297 */
298
299 #ifndef IFXQSPI_SPISLAVE_H
300 #define IFXQSPI_SPISLAVE_H 1
301
302 /******************************************************************************/
303 /*----------------------------------Includes----------------------------------*/
304 /******************************************************************************/
305
306 #include "Cpu/Irq/IfxCpu_Irq.h"
307 #include "Dma/Dma/IfxDma_Dma.h"
308 #include "Qspi/Std/IfxQspi.h"
309 #include "Scu/Std/IfxScuWdt.h"
310
311 /******************************************************************************/
312 /*-----------------------------Data Structures--------------------------------*/
313 /******************************************************************************/
314
315 /** \addtogroup IfxLld_Qspi_SpiSlave_DataStructures
316 * \{ */
317 /** \brief Dma handle
318 */
319 typedef struct
320 {
321 IfxDma_Dma_Channel rxDmaChannel; /**< \brief receive DMA channel handle */
322 IfxDma_Dma_Channel txDmaChannel; /**< \brief transmit DMA channel handle */
323 IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi recieve */
324 IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
325 boolean useDma; /**< \brief use Dma for Data transfers */
326 } IfxQspi_SpiSlave_Dma;
327
328 /** \brief Dma configuration
329 */
330 typedef struct
331 {
332 IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi receive */
333 IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
334 boolean useDma; /**< \brief use Dma for Data transfers */
335 } IfxQspi_SpiSlave_DmaConfig;
336
337 /** \brief Qspi Slave Mode Error Flags
338 */
339 typedef struct
340 {
341 uint16 parityError : 1; /**< \brief [0:0] Parity Error */
342 uint16 configurationError : 1; /**< \brief [1:1] Configuration Error */
343 uint16 baudrateError : 1; /**< \brief [2:2] baudrate Error */
344 uint16 txFifoOverflowError : 1; /**< \brief [3:3] TxFifo Overflow Error */
345 uint16 txFifoUnderflowError : 1; /**< \brief [4:4] TxFifo underflow Error */
346 uint16 rxFifoOverflowError : 1; /**< \brief [5:5] RxFifo Overflow Error */
347 uint16 rxFifoUnderflowError : 1; /**< \brief [6:6] RxFifo underflow Error */
348 uint16 expectTimeoutError : 1; /**< \brief [7:7] Expect Timeout Error */
349 uint16 slsiMisplacedInactivation : 1; /**< \brief [8:8] SLSI misplaced inactivation (slave mode) */
350 } IfxQspi_SpiSlave_ErrorFlags;
351
352 /** \brief Slave pin IO configuration structure
353 */
354 typedef struct
355 {
356 IFX_CONST IfxQspi_Sclk_In *sclk; /**< \brief Pointer to SLCK in pin */
357 IfxPort_InputMode sclkMode; /**< \brief The SCLK pin input mode */
358 IFX_CONST IfxQspi_Mtsr_In *mtsr; /**< \brief Pointer to MTSR in pin */
359 IfxPort_InputMode mtsrMode; /**< \brief The MTSR pin input mode */
360 IFX_CONST IfxQspi_Mrst_Out *mrst; /**< \brief Pointer to MRST out pin */
361 IfxPort_OutputMode mrstMode; /**< \brief The MRST pin output mode */
362 IFX_CONST IfxQspi_Slsi_In *slsi; /**< \brief Pointer to SLSI in pin */
363 IfxPort_InputMode slsiMode; /**< \brief The SLSI pin input mode */
364 IfxPort_PadDriver pinDriver; /**< \brief The pad driver mode which should be configured */
365 } IfxQspi_SpiSlave_Pins;
366
367 /** \brief Configures the SPI Protocol
368 */
369 typedef struct
370 {
371 SpiIf_ClockPolarity clockPolarity; /**< \brief Specifies the clock polarity */
372 SpiIf_ShiftClock shiftClock; /**< \brief Specifies the clock phase */
373 SpiIf_DataHeading dataHeading; /**< \brief Specifies MSB or LSB first */
374 uint8 dataWidth; /**< \brief range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ... */
375 Ifx_ParityMode parityMode; /**< \brief Specifies the parity mode */
376 } IfxQspi_SpiSlave_Protocol;
377
378 /** \} */
379
380 /** \addtogroup IfxLld_Qspi_SpiSlave_DataStructures
381 * \{ */
382 /** \brief Module handle data structure
383 */
384 typedef struct
385 {
386 SpiIf base; /**< \brief Module SPI interface handle */
387 Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
388 uint8 dataWidth; /**< \brief Number of bits which will be written into the FIFO */
389 SpiIf_Job rxJob; /**< \brief Rx Stream which has been received */
390 SpiIf_Job txJob; /**< \brief Tx Stream which should be sent */
391 boolean onTransfer; /**< \brief set to TRUE during ongoing transfer */
392 IfxQspi_SpiSlave_Dma dma; /**< \brief Dma handle */
393 IfxQspi_SpiSlave_ErrorFlags errorFlags; /**< \brief Spi Slave Error Flags */
394 } IfxQspi_SpiSlave;
395
396 /** \brief Module configuration structure
397 */
398 typedef struct
399 {
400 SpiIf_Config base; /**< \brief SPI interface configuration structure */
401 Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
402 boolean allowSleepMode; /**< \brief Specifies module sleep mode */
403 boolean pauseOnBaudrateSpikeErrors; /**< \brief Specifies module pause on baudrate or spike errors */
404 IfxQspi_PauseRunTransition pauseRunTransition; /**< \brief Specifies module run or pause mode */
405 IfxQspi_TxFifoInt txFifoThreshold; /**< \brief Specifies the TXFIFO interrupt threshold */
406 IfxQspi_RxFifoInt rxFifoThreshold; /**< \brief Specifies the RXFIFO interrupt threshold */
407 IFX_CONST IfxQspi_SpiSlave_Pins *pins; /**< \brief structure for QSPI Slave pins */
408 IfxQspi_SpiSlave_Protocol protocol;
409 IfxQspi_SpiSlave_DmaConfig dma; /**< \brief Dma configuration */
410 IfxQspi_FifoMode txFifoMode; /**< \brief Specifies the transfer FIFO mode. */
411 IfxQspi_FifoMode rxFifoMode; /**< \brief Specifies the receive FIFO mode */
412 } IfxQspi_SpiSlave_Config;
413
414 /** \} */
415
416 /** \addtogroup IfxLld_Qspi_SpiSlave_Module
417 * \{ */
418
419 /******************************************************************************/
420 /*-------------------------Global Function Prototypes-------------------------*/
421 /******************************************************************************/
422
423 /** \brief Initialises the module
424 * \param handle Module handle
425 * \param config Predefined configuration structure of the module
426 * \return None
427 *
428 * Usage example: see \ref IfxLld_Qspi_SpiSlave_Usage
429 *
430 */
431 IFX_EXTERN void IfxQspi_SpiSlave_initModule(IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config);
432
433 /** \brief Fills the config structure with default values
434 * \param config Configuration structure which should be initialized.
435 * \param qspi pointer to QSPI registers
436 * \return None
437 *
438 * Usage example: see \ref IfxLld_Qspi_SpiSlave_Usage
439 *
440 */
441 IFX_EXTERN void IfxQspi_SpiSlave_initModuleConfig(IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi);
442
443 /** \} */
444
445 /** \addtogroup IfxLld_Qspi_SpiSlave_Com
446 * \{ */
447
448 /******************************************************************************/
449 /*-------------------------Global Function Prototypes-------------------------*/
450 /******************************************************************************/
451
452 /** \brief Exchanges data between source and data
453 * \param handle Module handle
454 * \param src Source of data. Can be set to NULL_PTR if nothing to receive (transmit only)
455 * \param dest Destination to which to be sent. Can be set to NULL_PTR if nothing to transmit (receive only) - in this case, all-1 will be sent.
456 * \param count Number of data in pending
457 * \return Status of exchange of data
458 *
459 * Usage example: see \ref IfxLld_Qspi_SpiSlave_Usage
460 *
461 */
462 IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_exchange(IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count);
463
464 /** \brief Gets the transmission status
465 * \param handle Module handle
466 * \return Transmission status
467 *
468 * Usage example: see \ref IfxLld_Qspi_SpiSlave_Usage
469 *
470 */
471 IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_getStatus(IfxQspi_SpiSlave *handle);
472
473 /** \} */
474
475 /** \addtogroup IfxLld_Qspi_SpiSlave_InterruptFunctions
476 * \{ */
477
478 /******************************************************************************/
479 /*-------------------------Global Function Prototypes-------------------------*/
480 /******************************************************************************/
481
482 /** \brief Dma receive interrupt handler
483 * \param qspiHandle Module handle
484 * \return None
485 */
486 IFX_EXTERN void IfxQspi_SpiSlave_isrDmaReceive(IfxQspi_SpiSlave *qspiHandle);
487
488 /** \brief Transmit interrupt handler
489 * \param qspiHandle Module handle
490 * \return None
491 */
492 IFX_EXTERN void IfxQspi_SpiSlave_isrDmaTransmit(IfxQspi_SpiSlave *qspiHandle);
493
494 /** \brief Error Interrupt handler
495 * \param handle Module handle
496 * \return None
497 */
498 IFX_EXTERN void IfxQspi_SpiSlave_isrError(IfxQspi_SpiSlave *handle);
499
500 /** \brief Receive Interrupt handler
501 * \param handle Module handle
502 * \return None
503 */
504 IFX_EXTERN void IfxQspi_SpiSlave_isrReceive(IfxQspi_SpiSlave *handle);
505
506 /** \brief Transmit interrupt handler
507 * \param handle Module handle
508 * \return None
509 */
510 IFX_EXTERN void IfxQspi_SpiSlave_isrTransmit(IfxQspi_SpiSlave *handle);
511
512 /** \} */
513
514 /** \addtogroup IfxLld_Qspi_SpiSlave_DirectFifo
515 * \{ */
516
517 /******************************************************************************/
518 /*-------------------------Inline Function Prototypes-------------------------*/
519 /******************************************************************************/
520
521 /** \brief Reads data or status in RxFIFO
522 * \param handle QSpi Slave handle
523 * \return Data or Status in RxFIFO
524 */
525 IFX_INLINE uint32 IfxQspi_SpiSlave_readReceiveFifo(IfxQspi_SpiSlave *handle);
526
527 /** \brief Writes the data to TxFIFO
528 * \param handle QSpi slave handle
529 * \param data Data to be entered in Tx FIFO
530 * \return None
531 */
532 IFX_INLINE void IfxQspi_SpiSlave_writeTransmitFifo(IfxQspi_SpiSlave *handle, uint32 data);
533
534 /** \} */
535
536 /******************************************************************************/
537 /*---------------------Inline Function Implementations------------------------*/
538 /******************************************************************************/
539
540 IFX_INLINE uint32 IfxQspi_SpiSlave_readReceiveFifo(IfxQspi_SpiSlave *handle)
541 {
542 Ifx_QSPI *qspiSFR = handle->qspi;
543 uint32 data = IfxQspi_readReceiveFifo(qspiSFR);
544 return data;
545 }
546
547
548 IFX_INLINE void IfxQspi_SpiSlave_writeTransmitFifo(IfxQspi_SpiSlave *handle, uint32 data)
549 {
550 IfxQspi_writeTransmitFifo(handle->qspi, data);
551 }
552
553
554 #endif /* IFXQSPI_SPISLAVE_H */
IfxQspi_SpiSlave_Pins::mrstMode
IfxPort_OutputMode mrstMode
The MRST pin output mode.
Definition: IfxQspi_SpiSlave.h:361
IfxQspi_Mrst_Out
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:96
IfxQspi_SpiSlave_Protocol::dataHeading
SpiIf_DataHeading dataHeading
Specifies MSB or LSB first.
Definition: IfxQspi_SpiSlave.h:373
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:80
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:102
IfxQspi_SpiSlave_Config::base
SpiIf_Config base
SPI interface configuration structure.
Definition: IfxQspi_SpiSlave.h:400
IfxQspi_SpiSlave_ErrorFlags::rxFifoOverflowError
uint16 rxFifoOverflowError
[5:5] RxFifo Overflow Error
Definition: IfxQspi_SpiSlave.h:346
IfxQspi_SpiSlave_Config::rxFifoThreshold
IfxQspi_RxFifoInt rxFifoThreshold
Specifies the RXFIFO interrupt threshold.
Definition: IfxQspi_SpiSlave.h:406
IfxQspi_SpiSlave_Config::pauseOnBaudrateSpikeErrors
boolean pauseOnBaudrateSpikeErrors
Specifies module pause on baudrate or spike errors.
Definition: IfxQspi_SpiSlave.h:403
SpiIf_DataHeading
SpiIf_DataHeading
Heading.
Definition: SpiIf.h:87
IfxQspi_SpiSlave_Config::pauseRunTransition
IfxQspi_PauseRunTransition pauseRunTransition
Specifies module run or pause mode.
Definition: IfxQspi_SpiSlave.h:404
IfxQspi_SpiSlave_Pins::sclkMode
IfxPort_InputMode sclkMode
The SCLK pin input mode.
Definition: IfxQspi_SpiSlave.h:357
IfxQspi_SpiSlave_Pins::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiSlave.h:364
IfxQspi_SpiSlave_Dma
Dma handle.
Definition: IfxQspi_SpiSlave.h:319
IfxQspi_Sclk_In
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:72
SpiIf_Config
Definition: SpiIf.h:160
IfxQspi_SpiSlave_getStatus
IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_getStatus(IfxQspi_SpiSlave *handle)
Gets the transmission status.
Definition: IfxQspi_SpiSlave.c:113
IfxQspi_SpiSlave_initModule
IFX_EXTERN void IfxQspi_SpiSlave_initModule(IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
Initialises the module.
Definition: IfxQspi_SpiSlave.c:126
IfxDma_Dma.h
DMA DMA details.
IfxQspi_SpiSlave::qspi
Ifx_QSPI * qspi
Pointer to QSPI module registers.
Definition: IfxQspi_SpiSlave.h:387
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxQspi_FifoMode
IfxQspi_FifoMode
Transmit FIFO mode.
Definition: IfxQspi.h:285
IfxQspi_SpiSlave_Pins::slsiMode
IfxPort_InputMode slsiMode
The SLSI pin input mode.
Definition: IfxQspi_SpiSlave.h:363
IfxQspi_SpiSlave_exchange
IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_exchange(IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data.
Definition: IfxQspi_SpiSlave.c:92
SpiIf_
Definition: SpiIf.h:150
IfxQspi_SpiSlave_ErrorFlags::txFifoOverflowError
uint16 txFifoOverflowError
[3:3] TxFifo Overflow Error
Definition: IfxQspi_SpiSlave.h:344
IfxQspi_SpiSlave_isrDmaReceive
IFX_EXTERN void IfxQspi_SpiSlave_isrDmaReceive(IfxQspi_SpiSlave *qspiHandle)
Dma receive interrupt handler.
Definition: IfxQspi_SpiSlave.c:381
SpiIf_ShiftClock
SpiIf_ShiftClock
Clock phase.
Definition: SpiIf.h:94
IfxQspi_SpiSlave_Dma::rxDmaChannelId
IfxDma_ChannelId rxDmaChannelId
DMA channel no for the Spi recieve.
Definition: IfxQspi_SpiSlave.h:323
IfxScuWdt.h
SCU basic functionality.
IfxQspi_SpiSlave_isrError
IFX_EXTERN void IfxQspi_SpiSlave_isrError(IfxQspi_SpiSlave *handle)
Error Interrupt handler.
Definition: IfxQspi_SpiSlave.c:405
IfxQspi_SpiSlave_Pins
Slave pin IO configuration structure.
Definition: IfxQspi_SpiSlave.h:354
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxQspi_readReceiveFifo
IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
Read the oldest data from RXFIFO.
Definition: IfxQspi.h:1115
IfxQspi_SpiSlave_Dma::txDmaChannel
IfxDma_Dma_Channel txDmaChannel
transmit DMA channel handle
Definition: IfxQspi_SpiSlave.h:322
IfxQspi_SpiSlave
Module handle data structure.
Definition: IfxQspi_SpiSlave.h:384
IfxQspi_SpiSlave_Config::dma
IfxQspi_SpiSlave_DmaConfig dma
Dma configuration.
Definition: IfxQspi_SpiSlave.h:409
IfxQspi_SpiSlave_isrTransmit
IFX_EXTERN void IfxQspi_SpiSlave_isrTransmit(IfxQspi_SpiSlave *handle)
Transmit interrupt handler.
Definition: IfxQspi_SpiSlave.c:478
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxQspi_SpiSlave_Pins::sclk
IFX_CONST IfxQspi_Sclk_In * sclk
Pointer to SLCK in pin.
Definition: IfxQspi_SpiSlave.h:356
IfxQspi_Mtsr_In
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:64
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxQspi_PauseRunTransition
IfxQspi_PauseRunTransition
Request between pause and Run transition.
Definition: IfxQspi.h:170
IfxQspi_RxFifoInt
IfxQspi_RxFifoInt
Receive Fifo Interrupt Threshold.
Definition: IfxQspi.h:216
IfxQspi_TxFifoInt
IfxQspi_TxFifoInt
Transmit Fifo Interrupt Threshold.
Definition: IfxQspi.h:273
IfxQspi_SpiSlave_Config::rxFifoMode
IfxQspi_FifoMode rxFifoMode
Specifies the receive FIFO mode.
Definition: IfxQspi_SpiSlave.h:411
IfxQspi_SpiSlave_Dma::rxDmaChannel
IfxDma_Dma_Channel rxDmaChannel
receive DMA channel handle
Definition: IfxQspi_SpiSlave.h:321
IfxQspi_SpiSlave_Config::protocol
IfxQspi_SpiSlave_Protocol protocol
Definition: IfxQspi_SpiSlave.h:408
SpiIf_ClockPolarity
SpiIf_ClockPolarity
Clock polarity.
Definition: SpiIf.h:101
IfxQspi_SpiSlave_Config::pins
IFX_CONST IfxQspi_SpiSlave_Pins * pins
structure for QSPI Slave pins
Definition: IfxQspi_SpiSlave.h:407
IfxQspi_SpiSlave_Protocol::dataWidth
uint8 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: IfxQspi_SpiSlave.h:374
IfxQspi_SpiSlave::rxJob
SpiIf_Job rxJob
Rx Stream which has been received.
Definition: IfxQspi_SpiSlave.h:389
IfxQspi_SpiSlave_Config
Module configuration structure.
Definition: IfxQspi_SpiSlave.h:398
IfxQspi_SpiSlave::onTransfer
boolean onTransfer
set to TRUE during ongoing transfer
Definition: IfxQspi_SpiSlave.h:391
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxQspi_SpiSlave_Pins::mrst
IFX_CONST IfxQspi_Mrst_Out * mrst
Pointer to MRST out pin.
Definition: IfxQspi_SpiSlave.h:360
IfxQspi_SpiSlave_DmaConfig
Dma configuration.
Definition: IfxQspi_SpiSlave.h:330
IfxQspi_SpiSlave_writeTransmitFifo
IFX_INLINE void IfxQspi_SpiSlave_writeTransmitFifo(IfxQspi_SpiSlave *handle, uint32 data)
Writes the data to TxFIFO.
Definition: IfxQspi_SpiSlave.h:548
IfxQspi_SpiSlave_Protocol::parityMode
Ifx_ParityMode parityMode
Specifies the parity mode.
Definition: IfxQspi_SpiSlave.h:375
IfxQspi_SpiSlave_Dma::useDma
boolean useDma
use Dma for Data transfers
Definition: IfxQspi_SpiSlave.h:325
IfxQspi_SpiSlave_ErrorFlags::slsiMisplacedInactivation
uint16 slsiMisplacedInactivation
[8:8] SLSI misplaced inactivation (slave mode)
Definition: IfxQspi_SpiSlave.h:349
IfxQspi_SpiSlave_ErrorFlags
Qspi Slave Mode Error Flags.
Definition: IfxQspi_SpiSlave.h:339
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxQspi_SpiSlave_Pins::slsi
IFX_CONST IfxQspi_Slsi_In * slsi
Pointer to SLSI in pin.
Definition: IfxQspi_SpiSlave.h:362
IfxQspi_SpiSlave_readReceiveFifo
IFX_INLINE uint32 IfxQspi_SpiSlave_readReceiveFifo(IfxQspi_SpiSlave *handle)
Reads data or status in RxFIFO.
Definition: IfxQspi_SpiSlave.h:540
IfxQspi_SpiSlave::txJob
SpiIf_Job txJob
Tx Stream which should be sent.
Definition: IfxQspi_SpiSlave.h:390
SpiIf_Job
Definition: SpiIf.h:121
IfxQspi_SpiSlave_ErrorFlags::txFifoUnderflowError
uint16 txFifoUnderflowError
[4:4] TxFifo underflow Error
Definition: IfxQspi_SpiSlave.h:345
IfxQspi_SpiSlave_Protocol::shiftClock
SpiIf_ShiftClock shiftClock
Specifies the clock phase.
Definition: IfxQspi_SpiSlave.h:372
IfxQspi_SpiSlave_ErrorFlags::expectTimeoutError
uint16 expectTimeoutError
[7:7] Expect Timeout Error
Definition: IfxQspi_SpiSlave.h:348
IfxQspi_SpiSlave::base
SpiIf base
Module SPI interface handle.
Definition: IfxQspi_SpiSlave.h:386
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxQspi_SpiSlave::errorFlags
IfxQspi_SpiSlave_ErrorFlags errorFlags
Spi Slave Error Flags.
Definition: IfxQspi_SpiSlave.h:393
IfxQspi_SpiSlave_Config::txFifoMode
IfxQspi_FifoMode txFifoMode
Specifies the transfer FIFO mode.
Definition: IfxQspi_SpiSlave.h:410
IfxQspi_writeTransmitFifo
IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register.
Definition: IfxQspi.h:1242
IfxQspi_SpiSlave_ErrorFlags::configurationError
uint16 configurationError
[1:1] Configuration Error
Definition: IfxQspi_SpiSlave.h:342
IfxQspi_SpiSlave_ErrorFlags::parityError
uint16 parityError
[0:0] Parity Error
Definition: IfxQspi_SpiSlave.h:341
IfxQspi_SpiSlave_isrReceive
IFX_EXTERN void IfxQspi_SpiSlave_isrReceive(IfxQspi_SpiSlave *handle)
Receive Interrupt handler.
Definition: IfxQspi_SpiSlave.c:472
IfxQspi_SpiSlave_ErrorFlags::baudrateError
uint16 baudrateError
[2:2] baudrate Error
Definition: IfxQspi_SpiSlave.h:343
IfxCpu_Irq.h
This file contains the APIs for Interrupt related functions.
IfxQspi_SpiSlave_Config::txFifoThreshold
IfxQspi_TxFifoInt txFifoThreshold
Specifies the TXFIFO interrupt threshold.
Definition: IfxQspi_SpiSlave.h:405
IfxQspi.h
QSPI basic functionality.
IfxQspi_SpiSlave_Dma::txDmaChannelId
IfxDma_ChannelId txDmaChannelId
DMA channel no for the Spi transmit.
Definition: IfxQspi_SpiSlave.h:324
IfxQspi_SpiSlave::dma
IfxQspi_SpiSlave_Dma dma
Dma handle.
Definition: IfxQspi_SpiSlave.h:392
SpiIf_Status
SpiIf_Status
SPI Interface Status.
Definition: SpiIf.h:66
IfxQspi_SpiSlave_Protocol
Configures the SPI Protocol.
Definition: IfxQspi_SpiSlave.h:369
IfxQspi_SpiSlave_Pins::mtsr
IFX_CONST IfxQspi_Mtsr_In * mtsr
Pointer to MTSR in pin.
Definition: IfxQspi_SpiSlave.h:358
IfxDma_Dma_Channel
Channel handle.
Definition: IfxDma_Dma.h:471
IfxQspi_SpiSlave_Protocol::clockPolarity
SpiIf_ClockPolarity clockPolarity
Specifies the clock polarity.
Definition: IfxQspi_SpiSlave.h:371
uint8
unsigned char uint8
Definition: Platform_Types.h:108
Ifx_ParityMode
Ifx_ParityMode
Definition: Ifx_Types.h:119
IfxQspi_SpiSlave_isrDmaTransmit
IFX_EXTERN void IfxQspi_SpiSlave_isrDmaTransmit(IfxQspi_SpiSlave *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiSlave.c:395
IfxQspi_SpiSlave_Config::allowSleepMode
boolean allowSleepMode
Specifies module sleep mode.
Definition: IfxQspi_SpiSlave.h:402
IfxQspi_SpiSlave_initModuleConfig
IFX_EXTERN void IfxQspi_SpiSlave_initModuleConfig(IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values.
Definition: IfxQspi_SpiSlave.c:352
IfxQspi_SpiSlave_Pins::mtsrMode
IfxPort_InputMode mtsrMode
The MTSR pin input mode.
Definition: IfxQspi_SpiSlave.h:359
IfxQspi_SpiSlave_ErrorFlags::rxFifoUnderflowError
uint16 rxFifoUnderflowError
[6:6] RxFifo underflow Error
Definition: IfxQspi_SpiSlave.h:347


iLLD_TC26B: IfxQspi_cfg.c Source File

  • _Impl
IfxQspi_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_cfg.c
3 * \brief QSPI on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 */
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "IfxQspi_cfg.h"
49
50 /******************************************************************************/
51 /*-----------------------Exported Variables/Constants-------------------------*/
52 /******************************************************************************/
53
54 IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES] = {
55 {&MODULE_QSPI0, IfxQspi_Index_0},
56 {&MODULE_QSPI1, IfxQspi_Index_1},
57 {&MODULE_QSPI2, IfxQspi_Index_2},
58 {&MODULE_QSPI3, IfxQspi_Index_3}
59 };
IfxQspi_Index_2
QSPI index 2.
Definition: IfxQspi_cfg.h:84
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxQspi_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES]
Definition: IfxQspi_cfg.c:54
IfxQspi_Index_1
QSPI index 1.
Definition: IfxQspi_cfg.h:83
IfxQspi_Index_3
QSPI index 3.
Definition: IfxQspi_cfg.h:85
IFXQSPI_NUM_MODULES
#define IFXQSPI_NUM_MODULES
Definition: IfxQspi_cfg.h:69
IfxQspi_Index_0
QSPI index 0.
Definition: IfxQspi_cfg.h:82
IfxQspi_cfg.h
QSPI on-chip implementation data.
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140


iLLD_TC26B: IfxQspi_cfg.h Source File

  • _Impl
IfxQspi_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_cfg.h
3 * \brief QSPI on-chip implementation data
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 * \defgroup IfxLld_Qspi QSPI
44 * \ingroup IfxLld
45 * \defgroup IfxLld_Qspi_Impl Implementation
46 * \ingroup IfxLld_Qspi
47 * \defgroup IfxLld_Qspi_Std Standard Driver
48 * \ingroup IfxLld_Qspi
49 * \defgroup IfxLld_Qspi_Impl_Enumerations Enumerations
50 * \ingroup IfxLld_Qspi_Impl
51 */
52
53 #ifndef IFXQSPI_CFG_H
54 #define IFXQSPI_CFG_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "Cpu/Std/Ifx_Types.h"
61 #include "IfxQspi_reg.h"
62
63 /******************************************************************************/
64 /*-----------------------------------Macros-----------------------------------*/
65 /******************************************************************************/
66
67 #define IFXQSPI_HWFIFO_DEPTH (4)
68
69 #define IFXQSPI_NUM_MODULES (4)
70
71 #define IFXQSPI_NUM_CHANNELS (16)
72
73 /******************************************************************************/
74 /*-------------------------------Enumerations---------------------------------*/
75 /******************************************************************************/
76
77 /** \brief List of the available QSPI resources
78 */
79 typedef enum
80 {
81 IfxQspi_Index_none = -1, /**< \brief Not Selected */
82 IfxQspi_Index_0 = 0, /**< \brief QSPI index 0 */
83 IfxQspi_Index_1, /**< \brief QSPI index 1 */
84 IfxQspi_Index_2, /**< \brief QSPI index 2 */
85 IfxQspi_Index_3 /**< \brief QSPI index 3 */
86 } IfxQspi_Index;
87
88 /******************************************************************************/
89 /*-------------------Global Exported Variables/Constants----------------------*/
90 /******************************************************************************/
91 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES];
92
93 #endif /* IFXQSPI_CFG_H */
IfxQspi_Index_2
QSPI index 2.
Definition: IfxQspi_cfg.h:84
IfxQspi_Index
IfxQspi_Index
List of the available QSPI resources.
Definition: IfxQspi_cfg.h:79
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxQspi_Index_none
Not Selected.
Definition: IfxQspi_cfg.h:81
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxQspi_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES]
Definition: IfxQspi_cfg.h:91
IfxQspi_Index_1
QSPI index 1.
Definition: IfxQspi_cfg.h:83
IfxQspi_Index_3
QSPI index 3.
Definition: IfxQspi_cfg.h:85
IFXQSPI_NUM_MODULES
#define IFXQSPI_NUM_MODULES
Definition: IfxQspi_cfg.h:69
IfxQspi_Index_0
QSPI index 0.
Definition: IfxQspi_cfg.h:82
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140


iLLD_TC26B: IfxScu_PinMap.c Source File

  • _PinMap
IfxScu_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxScu_PinMap.c
3 * \brief SCU I/O map
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxScu_PinMap.h"
44
45 IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT = {&MODULE_SCU, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt6};
46 IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT = {&MODULE_SCU, {&MODULE_P33,13}, IfxPort_OutputIdx_alt6};
47 IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN = {&MODULE_SCU, {&MODULE_P33, 8}, Ifx_RxSel_a};
48 IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN = {&MODULE_SCU, {&MODULE_P21, 2}, Ifx_RxSel_b};
49 IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN = {&MODULE_SCU, {&MODULE_P14, 1}, Ifx_RxSel_a};
50 IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN = {&MODULE_SCU, {&MODULE_P15, 1}, Ifx_RxSel_b};
51 IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT = {&MODULE_SCU, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt6};
52 IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT = {&MODULE_SCU, {&MODULE_P11,12}, IfxPort_OutputIdx_alt6};
53 IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT = {&MODULE_SCU, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt6};
54 IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN = {&MODULE_SCU, {&MODULE_P14, 6}};
55 IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN = {&MODULE_SCU, {&MODULE_P14, 5}};
56 IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN = {&MODULE_SCU, {&MODULE_P14, 2}};
57 IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN = {&MODULE_SCU, {&MODULE_P14, 3}};
58 IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN = {&MODULE_SCU, {&MODULE_P10, 5}};
59 IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN = {&MODULE_SCU, {&MODULE_P10, 6}};
60 IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN = {&MODULE_SCU, {&MODULE_P14, 4}};
61 IfxScu_Req_In IfxScu_REQ0_P15_4_IN = {&MODULE_SCU, 0, {&MODULE_P15, 4}, Ifx_RxSel_a};
62 IfxScu_Req_In IfxScu_REQ10_P14_3_IN = {&MODULE_SCU, 1, {&MODULE_P14, 3}, Ifx_RxSel_a};
63 IfxScu_Req_In IfxScu_REQ11_P20_9_IN = {&MODULE_SCU, 7, {&MODULE_P20, 9}, Ifx_RxSel_a};
64 IfxScu_Req_In IfxScu_REQ12_P11_10_IN = {&MODULE_SCU, 6, {&MODULE_P11,10}, Ifx_RxSel_d};
65 IfxScu_Req_In IfxScu_REQ13_P15_5_IN = {&MODULE_SCU, 4, {&MODULE_P15, 5}, Ifx_RxSel_d};
66 IfxScu_Req_In IfxScu_REQ14_P02_1_IN = {&MODULE_SCU, 2, {&MODULE_P02, 1}, Ifx_RxSel_b};
67 IfxScu_Req_In IfxScu_REQ15_P14_1_IN = {&MODULE_SCU, 3, {&MODULE_P14, 1}, Ifx_RxSel_b};
68 IfxScu_Req_In IfxScu_REQ16_P15_1_IN = {&MODULE_SCU, 7, {&MODULE_P15, 1}, Ifx_RxSel_c};
69 IfxScu_Req_In IfxScu_REQ1_P15_8_IN = {&MODULE_SCU, 5, {&MODULE_P15, 8}, Ifx_RxSel_a};
70 IfxScu_Req_In IfxScu_REQ2_P10_2_IN = {&MODULE_SCU, 2, {&MODULE_P10, 2}, Ifx_RxSel_a};
71 IfxScu_Req_In IfxScu_REQ3_P10_3_IN = {&MODULE_SCU, 3, {&MODULE_P10, 3}, Ifx_RxSel_a};
72 IfxScu_Req_In IfxScu_REQ4_P10_7_IN = {&MODULE_SCU, 0, {&MODULE_P10, 7}, Ifx_RxSel_c};
73 IfxScu_Req_In IfxScu_REQ5_P10_8_IN = {&MODULE_SCU, 1, {&MODULE_P10, 8}, Ifx_RxSel_c};
74 IfxScu_Req_In IfxScu_REQ6_P02_0_IN = {&MODULE_SCU, 3, {&MODULE_P02, 0}, Ifx_RxSel_c};
75 IfxScu_Req_In IfxScu_REQ7_P00_4_IN = {&MODULE_SCU, 2, {&MODULE_P00, 4}, Ifx_RxSel_c};
76 IfxScu_Req_In IfxScu_REQ8_P33_7_IN = {&MODULE_SCU, 4, {&MODULE_P33, 7}, Ifx_RxSel_a};
77 IfxScu_Req_In IfxScu_REQ9_P20_0_IN = {&MODULE_SCU, 6, {&MODULE_P20, 0}, Ifx_RxSel_a};
78 IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT = {&MODULE_SCU, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt6};
79 IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT = {&MODULE_SCU, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt6};
80 IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT = {&MODULE_SCU, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt6};
81
82
83 const IfxScu_Dcdcsync_Out *IfxScu_Dcdcsync_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS] = {
84 {
85 &IfxScu_DCDCSYNC_P32_2_OUT,
86 &IfxScu_DCDCSYNC_P33_13_OUT
87 }
88 };
89
90 const IfxScu_Emgstop_In *IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS] = {
91 {
92 &IfxScu_EMGSTOPA_P33_8_IN,
93 &IfxScu_EMGSTOPB_P21_2_IN
94 }
95 };
96
97 const IfxScu_Evrwup_In *IfxScu_Evrwup_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS] = {
98 {
99 &IfxScu_EVRWUPA_P14_1_IN,
100 &IfxScu_EVRWUPB_P15_1_IN
101 }
102 };
103
104 const IfxScu_Extclk_Out *IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS] = {
105 {
106 &IfxScu_EXTCLK1_P11_12_OUT,
107 &IfxScu_EXTCLK0_P23_1_OUT,
108 &IfxScu_EXTCLK1_P32_4_OUT
109 }
110 };
111
112 const IfxScu_Hwcfg_In *IfxScu_Hwcfg_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS] = {
113 {
114 &IfxScu_HWCFG4_P10_5_IN,
115 &IfxScu_HWCFG5_P10_6_IN,
116 &IfxScu_HWCFG2EVR13_P14_2_IN,
117 &IfxScu_HWCFG3_BMI_P14_3_IN,
118 &IfxScu_HWCFG6_P14_4_IN,
119 &IfxScu_HWCFG1EVR33_P14_5_IN,
120 &IfxScu_HWCFG0DCLDO_P14_6_IN
121 }
122 };
123
124 const IfxScu_Req_In *IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS] = {
125 {
126 {
127 &IfxScu_REQ0_P15_4_IN,
128 NULL_PTR,
129 &IfxScu_REQ4_P10_7_IN,
130 NULL_PTR
131 },
132 {
133 &IfxScu_REQ10_P14_3_IN,
134 NULL_PTR,
135 &IfxScu_REQ5_P10_8_IN,
136 NULL_PTR
137 },
138 {
139 &IfxScu_REQ2_P10_2_IN,
140 &IfxScu_REQ14_P02_1_IN,
141 &IfxScu_REQ7_P00_4_IN,
142 NULL_PTR
143 },
144 {
145 &IfxScu_REQ3_P10_3_IN,
146 &IfxScu_REQ15_P14_1_IN,
147 &IfxScu_REQ6_P02_0_IN,
148 NULL_PTR
149 },
150 {
151 &IfxScu_REQ8_P33_7_IN,
152 NULL_PTR,
153 NULL_PTR,
154 &IfxScu_REQ13_P15_5_IN
155 },
156 {
157 &IfxScu_REQ1_P15_8_IN,
158 NULL_PTR,
159 NULL_PTR,
160 NULL_PTR
161 },
162 {
163 &IfxScu_REQ9_P20_0_IN,
164 NULL_PTR,
165 NULL_PTR,
166 &IfxScu_REQ12_P11_10_IN
167 },
168 {
169 &IfxScu_REQ11_P20_9_IN,
170 NULL_PTR,
171 &IfxScu_REQ16_P15_1_IN,
172 NULL_PTR
173 }
174 }
175 };
176
177 const IfxScu_Wdtlck_Out *IfxScu_Wdtlck_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS] = {
178 {
179 &IfxScu_WDT1LCK_P20_7_OUT,
180 &IfxScu_WDT0LCK_P20_8_OUT,
181 &IfxScu_WDTSLCK_P20_9_OUT
182 }
183 };
IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS
#define IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:153
IfxScu_Extclk_Out
External Clock pin mapping structure.
Definition: IfxScu_PinMap.h:104
IFXSCU_PINMAP_NUM_MODULES
#define IFXSCU_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxScu_PinMap.h:149
IfxScu_EXTCLK1_P32_4_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT
Definition: IfxScu_PinMap.c:53
IfxScu_WDT0LCK_P20_8_OUT
IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT
Definition: IfxScu_PinMap.c:78
IfxScu_REQ8_P33_7_IN
IfxScu_Req_In IfxScu_REQ8_P33_7_IN
Definition: IfxScu_PinMap.c:76
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxScu_DCDCSYNC_P33_13_OUT
IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT
Definition: IfxScu_PinMap.c:46
IfxScu_Emgstop_In
Emergency Stop pin mapping structure.
Definition: IfxScu_PinMap.h:88
IfxScu_REQ7_P00_4_IN
IfxScu_Req_In IfxScu_REQ7_P00_4_IN
Definition: IfxScu_PinMap.c:75
IfxScu_WDTSLCK_P20_9_OUT
IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT
Definition: IfxScu_PinMap.c:80
IfxScu_REQ9_P20_0_IN
IfxScu_Req_In IfxScu_REQ9_P20_0_IN
Definition: IfxScu_PinMap.c:77
IfxScu_HWCFG0DCLDO_P14_6_IN
IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN
Definition: IfxScu_PinMap.c:54
IfxScu_PinMap.h
SCU I/O map.
IfxScu_HWCFG6_P14_4_IN
IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN
Definition: IfxScu_PinMap.c:60
IfxScu_REQ6_P02_0_IN
IfxScu_Req_In IfxScu_REQ6_P02_0_IN
Definition: IfxScu_PinMap.c:74
IfxScu_HWCFG4_P10_5_IN
IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN
Definition: IfxScu_PinMap.c:58
IfxScu_HWCFG5_P10_6_IN
IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN
Definition: IfxScu_PinMap.c:59
IfxScu_REQ4_P10_7_IN
IfxScu_Req_In IfxScu_REQ4_P10_7_IN
Definition: IfxScu_PinMap.c:72
IfxScu_DCDCSYNC_P32_2_OUT
IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT
Definition: IfxScu_PinMap.c:45
IfxScu_EVRWUPB_P15_1_IN
IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN
Definition: IfxScu_PinMap.c:50
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxScu_EMGSTOPA_P33_8_IN
IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN
Definition: IfxScu_PinMap.c:47
IfxScu_Dcdcsync_Out
DCDC Sync pin mapping structure.
Definition: IfxScu_PinMap.h:80
IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS
#define IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS
Definition: IfxScu_PinMap.h:154
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS
#define IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:155
IfxScu_HWCFG2EVR13_P14_2_IN
IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN
Definition: IfxScu_PinMap.c:56
IfxScu_REQ15_P14_1_IN
IfxScu_Req_In IfxScu_REQ15_P14_1_IN
Definition: IfxScu_PinMap.c:67
IfxScu_REQ11_P20_9_IN
IfxScu_Req_In IfxScu_REQ11_P20_9_IN
Definition: IfxScu_PinMap.c:63
IfxScu_REQ3_P10_3_IN
IfxScu_Req_In IfxScu_REQ3_P10_3_IN
Definition: IfxScu_PinMap.c:71
IfxScu_Req_In_pinTable
const IfxScu_Req_In * IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]
Definition: IfxScu_PinMap.c:124
IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS
#define IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS
Definition: IfxScu_PinMap.h:157
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:125
IfxScu_Dcdcsync_Out_pinTable
const IfxScu_Dcdcsync_Out * IfxScu_Dcdcsync_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
Definition: IfxScu_PinMap.c:83
IfxScu_REQ2_P10_2_IN
IfxScu_Req_In IfxScu_REQ2_P10_2_IN
Definition: IfxScu_PinMap.c:70
IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS
#define IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS
Definition: IfxScu_PinMap.h:151
IfxScu_Evrwup_In_pinTable
const IfxScu_Evrwup_In * IfxScu_Evrwup_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS]
Definition: IfxScu_PinMap.c:97
IfxScu_EXTCLK1_P11_12_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT
Definition: IfxScu_PinMap.c:52
IfxScu_REQ14_P02_1_IN
IfxScu_Req_In IfxScu_REQ14_P02_1_IN
Definition: IfxScu_PinMap.c:66
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxScu_REQ16_P15_1_IN
IfxScu_Req_In IfxScu_REQ16_P15_1_IN
Definition: IfxScu_PinMap.c:68
IfxScu_REQ1_P15_8_IN
IfxScu_Req_In IfxScu_REQ1_P15_8_IN
Definition: IfxScu_PinMap.c:69
IfxScu_Wdtlck_Out_pinTable
const IfxScu_Wdtlck_Out * IfxScu_Wdtlck_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS]
Definition: IfxScu_PinMap.c:177
IfxScu_HWCFG1EVR33_P14_5_IN
IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN
Definition: IfxScu_PinMap.c:55
IfxScu_EVRWUPA_P14_1_IN
IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN
Definition: IfxScu_PinMap.c:49
IfxScu_REQ12_P11_10_IN
IfxScu_Req_In IfxScu_REQ12_P11_10_IN
Definition: IfxScu_PinMap.c:64
IfxScu_REQ5_P10_8_IN
IfxScu_Req_In IfxScu_REQ5_P10_8_IN
Definition: IfxScu_PinMap.c:73
IfxScu_Extclk_Out_pinTable
const IfxScu_Extclk_Out * IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
Definition: IfxScu_PinMap.c:104
IfxScu_HWCFG3_BMI_P14_3_IN
IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN
Definition: IfxScu_PinMap.c:57
IfxScu_WDT1LCK_P20_7_OUT
IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT
Definition: IfxScu_PinMap.c:79
IFXSCU_PINMAP_NUM_REQUESTS
#define IFXSCU_PINMAP_NUM_REQUESTS
Definition: IfxScu_PinMap.h:150
IfxScu_Wdtlck_Out
Watchdog Timer Lock pin mapping structure.
Definition: IfxScu_PinMap.h:96
IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS
#define IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:152
IfxScu_EMGSTOPB_P21_2_IN
IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN
Definition: IfxScu_PinMap.c:48
IfxScu_Hwcfg_In
Hardware Configuration pin mapping structure.
Definition: IfxScu_PinMap.h:64
IfxScu_Req_In
External Request pin mapping structure.
Definition: IfxScu_PinMap.h:71
IfxScu_Hwcfg_In_pinTable
const IfxScu_Hwcfg_In * IfxScu_Hwcfg_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS]
Definition: IfxScu_PinMap.c:112
IfxScu_REQ10_P14_3_IN
IfxScu_Req_In IfxScu_REQ10_P14_3_IN
Definition: IfxScu_PinMap.c:62
IfxScu_REQ0_P15_4_IN
IfxScu_Req_In IfxScu_REQ0_P15_4_IN
Definition: IfxScu_PinMap.c:61
IfxScu_REQ13_P15_5_IN
IfxScu_Req_In IfxScu_REQ13_P15_5_IN
Definition: IfxScu_PinMap.c:65
IfxScu_Evrwup_In
EVR Wakeup pin mapping structure.
Definition: IfxScu_PinMap.h:56
IfxScu_EXTCLK0_P23_1_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT
Definition: IfxScu_PinMap.c:51
IfxScu_Emgstop_In_pinTable
const IfxScu_Emgstop_In * IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
Definition: IfxScu_PinMap.c:90
IFXSCU_PINMAP_REQ_IN_NUM_ITEMS
#define IFXSCU_PINMAP_REQ_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:156


iLLD_TC26B: IfxScu_PinMap.h Source File

  • _PinMap
IfxScu_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxScu_PinMap.h
3 * \brief SCU I/O map
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Scu_pinmap SCU Pin Mapping
42 * \ingroup IfxLld_Scu
43 */
44
45 #ifndef IFXSCU_PINMAP_H
46 #define IFXSCU_PINMAP_H
47
48 #include <IfxScu_reg.h>
49 #include <_Impl/IfxScu_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Scu_pinmap
53 * \{ */
54
55 /** \brief EVR Wakeup pin mapping structure */
56 typedef const struct
57 {
58 Ifx_SCU* module; /**< \brief Base address */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 Ifx_RxSel select; /**< \brief Input multiplexer value */
61 } IfxScu_Evrwup_In;
62
63 /** \brief Hardware Configuration pin mapping structure */
64 typedef const struct
65 {
66 Ifx_SCU* module; /**< \brief Base address */
67 IfxPort_Pin pin; /**< \brief Port pin */
68 } IfxScu_Hwcfg_In;
69
70 /** \brief External Request pin mapping structure */
71 typedef const struct
72 {
73 Ifx_SCU* module; /**< \brief Base address */
74 uint8 channelId; /**< \brief ERU Channel ID */
75 IfxPort_Pin pin; /**< \brief Port pin */
76 Ifx_RxSel select; /**< \brief Input multiplexer value */
77 } IfxScu_Req_In;
78
79 /** \brief DCDC Sync pin mapping structure */
80 typedef const struct
81 {
82 Ifx_SCU* module; /**< \brief Base address */
83 IfxPort_Pin pin; /**< \brief Port pin */
84 IfxPort_OutputIdx select; /**< \brief Port control code */
85 } IfxScu_Dcdcsync_Out;
86
87 /** \brief Emergency Stop pin mapping structure */
88 typedef const struct
89 {
90 Ifx_SCU* module; /**< \brief Base address */
91 IfxPort_Pin pin; /**< \brief Port pin */
92 Ifx_RxSel select; /**< \brief Input multiplexer value */
93 } IfxScu_Emgstop_In;
94
95 /** \brief Watchdog Timer Lock pin mapping structure */
96 typedef const struct
97 {
98 Ifx_SCU* module; /**< \brief Base address */
99 IfxPort_Pin pin; /**< \brief Port pin */
100 IfxPort_OutputIdx select; /**< \brief Port control code */
101 } IfxScu_Wdtlck_Out;
102
103 /** \brief External Clock pin mapping structure */
104 typedef const struct
105 {
106 Ifx_SCU* module; /**< \brief Base address */
107 IfxPort_Pin pin; /**< \brief Port pin */
108 IfxPort_OutputIdx select; /**< \brief Port control code */
109 } IfxScu_Extclk_Out;
110
111 IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT; /**< \brief SCU_DCDCSYNC: SCU output */
112 IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT; /**< \brief SCU_DCDCSYNC: SCU output */
113 IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN; /**< \brief SCU_EMGSTOPA: SCU input */
114 IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN; /**< \brief SCU_EMGSTOPB: SCU input */
115 IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN; /**< \brief SCU_EVRWUPA: SCU input */
116 IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN; /**< \brief SCU_EVRWUPB: SCU input */
117 IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT; /**< \brief SCU_EXTCLK0: SCU output */
118 IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT; /**< \brief SCU_EXTCLK1: SCU output */
119 IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT; /**< \brief SCU_EXTCLK1: SCU output */
120 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN; /**< \brief SCU_HWCFG0DCLDO: SCU input If EVR13 active, latched at cold power on reset to decide between LDO and SMPS mode. */
121 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN; /**< \brief SCU_HWCFG1EVR33: SCU input Latched at cold power on reset to decide EVR33 activation. */
122 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN; /**< \brief SCU_HWCFG2EVR13: SCU input Latched at cold power on reset to decide EVR13 activation. */
123 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN; /**< \brief SCU_HWCFG3_BMI: SCU input */
124 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN; /**< \brief SCU_HWCFG4: SCU input */
125 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN; /**< \brief SCU_HWCFG5: SCU input */
126 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN; /**< \brief SCU_HWCFG6: SCU input Latched at cold power on reset to decide default pad reset state (PU or High-Z). */
127 IFX_EXTERN IfxScu_Req_In IfxScu_REQ0_P15_4_IN; /**< \brief SCU_REQ0: SCU input */
128 IFX_EXTERN IfxScu_Req_In IfxScu_REQ10_P14_3_IN; /**< \brief SCU_REQ10: SCU input */
129 IFX_EXTERN IfxScu_Req_In IfxScu_REQ11_P20_9_IN; /**< \brief SCU_REQ11: SCU input */
130 IFX_EXTERN IfxScu_Req_In IfxScu_REQ12_P11_10_IN; /**< \brief SCU_REQ12: SCU input */
131 IFX_EXTERN IfxScu_Req_In IfxScu_REQ13_P15_5_IN; /**< \brief SCU_REQ13: SCU input */
132 IFX_EXTERN IfxScu_Req_In IfxScu_REQ14_P02_1_IN; /**< \brief SCU_REQ14: SCU input */
133 IFX_EXTERN IfxScu_Req_In IfxScu_REQ15_P14_1_IN; /**< \brief SCU_REQ15: SCU input */
134 IFX_EXTERN IfxScu_Req_In IfxScu_REQ16_P15_1_IN; /**< \brief SCU_REQ16: SCU input */
135 IFX_EXTERN IfxScu_Req_In IfxScu_REQ1_P15_8_IN; /**< \brief SCU_REQ1: SCU input */
136 IFX_EXTERN IfxScu_Req_In IfxScu_REQ2_P10_2_IN; /**< \brief SCU_REQ2: SCU input */
137 IFX_EXTERN IfxScu_Req_In IfxScu_REQ3_P10_3_IN; /**< \brief SCU_REQ3: SCU input */
138 IFX_EXTERN IfxScu_Req_In IfxScu_REQ4_P10_7_IN; /**< \brief SCU_REQ4: SCU input */
139 IFX_EXTERN IfxScu_Req_In IfxScu_REQ5_P10_8_IN; /**< \brief SCU_REQ5: SCU input */
140 IFX_EXTERN IfxScu_Req_In IfxScu_REQ6_P02_0_IN; /**< \brief SCU_REQ6: SCU input */
141 IFX_EXTERN IfxScu_Req_In IfxScu_REQ7_P00_4_IN; /**< \brief SCU_REQ7: SCU input */
142 IFX_EXTERN IfxScu_Req_In IfxScu_REQ8_P33_7_IN; /**< \brief SCU_REQ8: SCU input */
143 IFX_EXTERN IfxScu_Req_In IfxScu_REQ9_P20_0_IN; /**< \brief SCU_REQ9: SCU input */
144 IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT; /**< \brief SCU_WDT0LCK: SCU output */
145 IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT; /**< \brief SCU_WDT1LCK: SCU output */
146 IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT; /**< \brief SCU_WDTSLCK: SCU output */
147
148 /** \brief Table dimensions */
149 #define IFXSCU_PINMAP_NUM_MODULES 1
150 #define IFXSCU_PINMAP_NUM_REQUESTS 8
151 #define IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS 2
152 #define IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS 2
153 #define IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS 2
154 #define IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS 3
155 #define IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS 7
156 #define IFXSCU_PINMAP_REQ_IN_NUM_ITEMS 4
157 #define IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS 3
158
159
160 /** \brief IfxScu_Dcdcsync_Out table */
161 IFX_EXTERN const IfxScu_Dcdcsync_Out *IfxScu_Dcdcsync_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS];
162
163 /** \brief IfxScu_Emgstop_In table */
164 IFX_EXTERN const IfxScu_Emgstop_In *IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS];
165
166 /** \brief IfxScu_Evrwup_In table */
167 IFX_EXTERN const IfxScu_Evrwup_In *IfxScu_Evrwup_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS];
168
169 /** \brief IfxScu_Extclk_Out table */
170 IFX_EXTERN const IfxScu_Extclk_Out *IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS];
171
172 /** \brief IfxScu_Hwcfg_In table */
173 IFX_EXTERN const IfxScu_Hwcfg_In *IfxScu_Hwcfg_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS];
174
175 /** \brief IfxScu_Req_In table */
176 IFX_EXTERN const IfxScu_Req_In *IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS];
177
178 /** \brief IfxScu_Wdtlck_Out table */
179 IFX_EXTERN const IfxScu_Wdtlck_Out *IfxScu_Wdtlck_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS];
180
181 /** \} */
182
183 #endif /* IFXSCU_PINMAP_H */
IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS
#define IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:153
IfxScu_Extclk_Out
External Clock pin mapping structure.
Definition: IfxScu_PinMap.h:104
IFXSCU_PINMAP_NUM_MODULES
#define IFXSCU_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxScu_PinMap.h:149
IfxScu_HWCFG5_P10_6_IN
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN
SCU_HWCFG5: SCU input.
Definition: IfxScu_PinMap.h:125
IfxScu_EVRWUPA_P14_1_IN
IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN
SCU_EVRWUPA: SCU input.
Definition: IfxScu_PinMap.h:115
IfxScu_HWCFG4_P10_5_IN
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN
SCU_HWCFG4: SCU input.
Definition: IfxScu_PinMap.h:124
IfxScu_Emgstop_In
Emergency Stop pin mapping structure.
Definition: IfxScu_PinMap.h:88
IfxScu_REQ1_P15_8_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ1_P15_8_IN
SCU_REQ1: SCU input.
Definition: IfxScu_PinMap.h:135
IfxScu_Req_In::channelId
uint8 channelId
ERU Channel ID.
Definition: IfxScu_PinMap.h:74
IfxScu_REQ2_P10_2_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ2_P10_2_IN
SCU_REQ2: SCU input.
Definition: IfxScu_PinMap.h:136
IfxScu_EXTCLK0_P23_1_OUT
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT
SCU_EXTCLK0: SCU output.
Definition: IfxScu_PinMap.h:117
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxScu_REQ7_P00_4_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ7_P00_4_IN
SCU_REQ7: SCU input.
Definition: IfxScu_PinMap.h:141
IfxScu_REQ11_P20_9_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ11_P20_9_IN
SCU_REQ11: SCU input.
Definition: IfxScu_PinMap.h:129
IfxScu_HWCFG2EVR13_P14_2_IN
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN
SCU_HWCFG2EVR13: SCU input Latched at cold power on reset to decide EVR13 activation.
Definition: IfxScu_PinMap.h:122
IfxScu_REQ0_P15_4_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ0_P15_4_IN
SCU_REQ0: SCU input.
Definition: IfxScu_PinMap.h:127
IfxScu_Evrwup_In_pinTable
IFX_EXTERN const IfxScu_Evrwup_In * IfxScu_Evrwup_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS]
IfxScu_Evrwup_In table.
Definition: IfxScu_PinMap.h:167
IfxScu_Req_In_pinTable
IFX_EXTERN const IfxScu_Req_In * IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]
IfxScu_Req_In table.
Definition: IfxScu_PinMap.h:176
IfxScu_Evrwup_In::module
Ifx_SCU * module
Base address.
Definition: IfxScu_PinMap.h:58
IfxScu_Wdtlck_Out_pinTable
IFX_EXTERN const IfxScu_Wdtlck_Out * IfxScu_Wdtlck_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS]
IfxScu_Wdtlck_Out table.
Definition: IfxScu_PinMap.h:179
IfxScu_Dcdcsync_Out
DCDC Sync pin mapping structure.
Definition: IfxScu_PinMap.h:80
IfxScu_WDTSLCK_P20_9_OUT
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT
SCU_WDTSLCK: SCU output.
Definition: IfxScu_PinMap.h:146
IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS
#define IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS
Definition: IfxScu_PinMap.h:154
IfxScu_EMGSTOPA_P33_8_IN
IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN
SCU_EMGSTOPA: SCU input.
Definition: IfxScu_PinMap.h:113
IfxScu_EVRWUPB_P15_1_IN
IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN
SCU_EVRWUPB: SCU input.
Definition: IfxScu_PinMap.h:116
IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS
#define IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:155
IfxScu_HWCFG1EVR33_P14_5_IN
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN
SCU_HWCFG1EVR33: SCU input Latched at cold power on reset to decide EVR33 activation.
Definition: IfxScu_PinMap.h:121
IfxScu_REQ5_P10_8_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ5_P10_8_IN
SCU_REQ5: SCU input.
Definition: IfxScu_PinMap.h:139
IfxScu_REQ15_P14_1_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ15_P14_1_IN
SCU_REQ15: SCU input.
Definition: IfxScu_PinMap.h:133
IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS
#define IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS
Definition: IfxScu_PinMap.h:157
IfxScu_Dcdcsync_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxScu_PinMap.h:84
IfxScu_REQ9_P20_0_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ9_P20_0_IN
SCU_REQ9: SCU input.
Definition: IfxScu_PinMap.h:143
IfxScu_WDT1LCK_P20_7_OUT
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT
SCU_WDT1LCK: SCU output.
Definition: IfxScu_PinMap.h:145
IfxScu_HWCFG3_BMI_P14_3_IN
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN
SCU_HWCFG3_BMI: SCU input.
Definition: IfxScu_PinMap.h:123
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS
#define IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS
Definition: IfxScu_PinMap.h:151
IfxScu_REQ13_P15_5_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ13_P15_5_IN
SCU_REQ13: SCU input.
Definition: IfxScu_PinMap.h:131
IfxScu_HWCFG0DCLDO_P14_6_IN
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN
SCU_HWCFG0DCLDO: SCU input If EVR13 active, latched at cold power on reset to decide between LDO and ...
Definition: IfxScu_PinMap.h:120
IfxScu_EMGSTOPB_P21_2_IN
IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN
SCU_EMGSTOPB: SCU input.
Definition: IfxScu_PinMap.h:114
IfxScu_cfg.h
SCU on-chip implementation data.
IfxScu_EXTCLK1_P11_12_OUT
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT
SCU_EXTCLK1: SCU output.
Definition: IfxScu_PinMap.h:118
IfxScu_REQ3_P10_3_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ3_P10_3_IN
SCU_REQ3: SCU input.
Definition: IfxScu_PinMap.h:137
IfxScu_REQ4_P10_7_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ4_P10_7_IN
SCU_REQ4: SCU input.
Definition: IfxScu_PinMap.h:138
IfxScu_WDT0LCK_P20_8_OUT
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT
SCU_WDT0LCK: SCU output.
Definition: IfxScu_PinMap.h:144
IfxScu_REQ12_P11_10_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ12_P11_10_IN
SCU_REQ12: SCU input.
Definition: IfxScu_PinMap.h:130
IfxScu_Extclk_Out_pinTable
IFX_EXTERN const IfxScu_Extclk_Out * IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
IfxScu_Extclk_Out table.
Definition: IfxScu_PinMap.h:170
IfxScu_REQ14_P02_1_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ14_P02_1_IN
SCU_REQ14: SCU input.
Definition: IfxScu_PinMap.h:132
IfxScu_REQ10_P14_3_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ10_P14_3_IN
SCU_REQ10: SCU input.
Definition: IfxScu_PinMap.h:128
IfxScu_EXTCLK1_P32_4_OUT
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT
SCU_EXTCLK1: SCU output.
Definition: IfxScu_PinMap.h:119
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxScu_Hwcfg_In_pinTable
IFX_EXTERN const IfxScu_Hwcfg_In * IfxScu_Hwcfg_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS]
IfxScu_Hwcfg_In table.
Definition: IfxScu_PinMap.h:173
IFXSCU_PINMAP_NUM_REQUESTS
#define IFXSCU_PINMAP_NUM_REQUESTS
Definition: IfxScu_PinMap.h:150
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxScu_Wdtlck_Out
Watchdog Timer Lock pin mapping structure.
Definition: IfxScu_PinMap.h:96
IfxScu_Evrwup_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxScu_PinMap.h:59
IfxScu_DCDCSYNC_P32_2_OUT
IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT
SCU_DCDCSYNC: SCU output.
Definition: IfxScu_PinMap.h:111
IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS
#define IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:152
IfxScu_Dcdcsync_Out_pinTable
IFX_EXTERN const IfxScu_Dcdcsync_Out * IfxScu_Dcdcsync_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
IfxScu_Dcdcsync_Out table.
Definition: IfxScu_PinMap.h:161
IfxScu_Hwcfg_In
Hardware Configuration pin mapping structure.
Definition: IfxScu_PinMap.h:64
IfxScu_Req_In
External Request pin mapping structure.
Definition: IfxScu_PinMap.h:71
IfxScu_DCDCSYNC_P33_13_OUT
IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT
SCU_DCDCSYNC: SCU output.
Definition: IfxScu_PinMap.h:112
IfxScu_HWCFG6_P14_4_IN
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN
SCU_HWCFG6: SCU input Latched at cold power on reset to decide default pad reset state (PU or High-Z)...
Definition: IfxScu_PinMap.h:126
IfxScu_Evrwup_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxScu_PinMap.h:60
IfxScu_REQ16_P15_1_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ16_P15_1_IN
SCU_REQ16: SCU input.
Definition: IfxScu_PinMap.h:134
IfxScu_REQ8_P33_7_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ8_P33_7_IN
SCU_REQ8: SCU input.
Definition: IfxScu_PinMap.h:142
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxScu_Evrwup_In
EVR Wakeup pin mapping structure.
Definition: IfxScu_PinMap.h:56
IfxScu_REQ6_P02_0_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ6_P02_0_IN
SCU_REQ6: SCU input.
Definition: IfxScu_PinMap.h:140
IfxScu_Emgstop_In_pinTable
IFX_EXTERN const IfxScu_Emgstop_In * IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
IfxScu_Emgstop_In table.
Definition: IfxScu_PinMap.h:164
IFXSCU_PINMAP_REQ_IN_NUM_ITEMS
#define IFXSCU_PINMAP_REQ_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:156
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxScu_cfg.c Source File

  • _Impl
IfxScu_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxScu_cfg.c
3 * \brief SCU on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxScu_cfg.h"
IfxScu_cfg.h
SCU on-chip implementation data.


iLLD_TC26B: IfxScu_cfg.h Source File

  • _Impl
IfxScu_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxScu_cfg.h
3 * \brief SCU on-chip implementation data
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Scu SCU
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Scu_Impl Implementation
44 * \ingroup IfxLld_Scu
45 * \defgroup IfxLld_Scu_Std Standard Driver
46 * \ingroup IfxLld_Scu
47 */
48
49 #ifndef IFXSCU_CFG_H
50 #define IFXSCU_CFG_H
51 /******************************************************************************/
52 #include "Ifx_Cfg.h"
53 #include "IfxScu_bf.h"
54 #include "IfxFlash_bf.h"
55
56 /******************************************************************************/
57 /* Macro */
58 /******************************************************************************/
59 #ifndef IFX_CFG_SCU_XTAL_FREQUENCY
60 # define IFX_CFG_SCU_XTAL_FREQUENCY 20000000 /**< \brief Default External oscillator frequency */
61 # warning "IFX_CFG_SCU_XTAL_FREQUENCY not specified in your IfxCfg.h file."
62 # warning "Please doublecheck the external XTAL frequency with the default setting of 20 MHz!"
63 #endif
64
65 #ifndef IFX_CFG_SCU_PLL_FREQUENCY
66 # define IFX_CFG_SCU_PLL_FREQUENCY 200000000 /**< \brief Default PLL frequency */
67 #endif
68
69 #define IFXSCU_VCO_BASE_FREQUENCY (100000000.0)
70 #define IFXSCU_EVR_OSC_FREQUENCY (100000000.0)
71
72 /*The following frequency is the PLL free running frequency */
73
74
75 #define IFXSCU_PLL_FREERUNNING_FREQUENCY (100000000.0)
76
77 /******************************************************************************/
78 /** \brief Macros to configure Pll steps,
79 * Macros to configure the Pll steps for different profiles of Crystal frequency and
80 * target frequencies. This configuration is important for the current jump controll
81 * during clock throttling.
82 * \ref IfxScuCcu_PllStepsConfig
83 */
84
85 /******************** Pll step for 16MHz crystal Configurations ********************************/
86 #ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ
87 /** \brief Macro for Pll step for profile with 16MHz Crystal and 80MHz target */
88 #define IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ \
89 { /*Step 0 Config: 80MHz*/ \
90 (8 - 1), /*uint8 k2Step;*/ \
91 0.000100, /*float32 waitTime;*/ \
92 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
93 },
94 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ */
95
96 #ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ
97 /** \brief Macro for Pll step for profile with 16MHz Crystal and 133MHz target */
98 #define IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ \
99 { /*Step 0 Config: 114MHz*/ \
100 (7 - 1), /*uint8 k2Step;*/ \
101 0.000100, /*float32 waitTime;*/ \
102 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
103 }, \
104 { /*Step 1 Config: 133MHz*/ \
105 (6 - 1), /*uint8 k2Step;*/ \
106 0.000100, /*float32 waitTime;*/ \
107 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
108 },
109 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ */
110
111 #ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ
112 /** \brief Macro for Pll step for profile with 16MHz Crystal and 160MHz target */
113 #define IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ \
114 { /*Step 1 Config: 128MHz*/ \
115 (5 - 1), /*uint8 k2Step;*/ \
116 0.000100, /*float32 waitTime;*/ \
117 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
118 }, \
119 { /*Step 2 Config: 160MHz*/ \
120 (4 - 1), /*uint8 k2Step;*/ \
121 0.000100, /*float32 waitTime;*/ \
122 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
123 }
124 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ */
125
126 #ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ
127 /** \brief Macro for Pll step for profile with 16MHz Crystal and 200MHz target */
128 #define IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ \
129 { /*Step 0 Config: 120MHz*/ \
130 (6 - 1), /*uint8 k2Step;*/ \
131 0.000100, /*float32 waitTime;*/ \
132 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
133 }, \
134 { /*Step 1 Config: 150MHz*/ \
135 (5 - 1), /*uint8 k2Step;*/ \
136 0.000100, /*float32 waitTime;*/ \
137 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
138 }, \
139 { /*Step 2 Config: 200MHz*/ \
140 (4 - 1), /*uint8 k2Step;*/ \
141 0.000100, /*float32 waitTime;*/ \
142 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
143 }
144 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ */
145
146 #ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ
147 /** \brief Macro for Pll step for profile with 16MHz Crystal and 240MHz target */
148 #define IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ \
149 { /*Step 0 Config: 144MHz*/ \
150 (5 - 1), /*uint8 k2Step;*/ \
151 0.000100, /*float32 waitTime;*/ \
152 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
153 }, \
154 { /*Step 1 Config: 180MHz*/ \
155 (4 - 1), /*uint8 k2Step;*/ \
156 0.000100, /*float32 waitTime;*/ \
157 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
158 }, \
159 { /*Step 2 Config: 240MHz*/ \
160 (3 - 1), /*uint8 k2Step;*/ \
161 0.000100, /*float32 waitTime;*/ \
162 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
163 }
164 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ */
165
166 /******************** Pll step 20MHz crystal Configurations ********************************/
167 #ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ
168 /** \brief Macro for Pll step for profile with 20MHz Crystal and 80MHz target */
169 #define IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ \
170 { /*Step 0 Config: 80MHz*/ \
171 (8 - 1), /*uint8 k2Step;*/ \
172 0.000100, /*float32 waitTime;*/ \
173 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
174 },
175 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ */
176
177 #ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ
178 /** \brief Macro for Pll step for profile with 20MHz Crystal and 133MHz target */
179 #define IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ \
180 { /*Step 0 Config: 114MHz*/ \
181 (7 - 1), /*uint8 k2Step;*/ \
182 0.000100, /*float32 waitTime;*/ \
183 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
184 }, \
185 { /*Step 1 Config: 133MHz*/ \
186 (6 - 1), /*uint8 k2Step;*/ \
187 0.000100, /*float32 waitTime;*/ \
188 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
189 },
190 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ */
191
192 #ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ
193 /** \brief Macro for Pll step for profile with 20MHz Crystal and 160MHz target */
194 #define IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ \
195 { /*Step 1 Config: 128MHz*/ \
196 (5 - 1), /*uint8 k2Step;*/ \
197 0.000100, /*float32 waitTime;*/ \
198 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
199 }, \
200 { /*Step 2 Config: 160MHz*/ \
201 (4 - 1), /*uint8 k2Step;*/ \
202 0.000100, /*float32 waitTime;*/ \
203 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
204 }
205 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ */
206
207 #ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ
208 /** \brief Macro for Pll step for profile with 20MHz Crystal and 200MHz target */
209 #define IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ \
210 { /*Step 0 Config: 120MHz*/ \
211 (5 - 1), /*uint8 k2Step;*/ \
212 0.000100, /*float32 waitTime;*/ \
213 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
214 }, \
215 { /*Step 1 Config: 150MHz*/ \
216 (4 - 1), /*uint8 k2Step;*/ \
217 0.000100, /*float32 waitTime;*/ \
218 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
219 }, \
220 { /*Step 2 Config: 200MHz*/ \
221 (3 - 1), /*uint8 k2Step;*/ \
222 0.000100, /*float32 waitTime;*/ \
223 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
224 }
225 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ */
226
227 #ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ
228 /** \brief Macro for Pll step for profile with 20MHz Crystal and 240MHz target */
229 #define IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ \
230 { /*Step 0 Config: 144MHz*/ \
231 (5 - 1), /*uint8 k2Step;*/ \
232 0.000100, /*float32 waitTime;*/ \
233 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
234 }, \
235 { /*Step 1 Config: 180MHz*/ \
236 (4 - 1), /*uint8 k2Step;*/ \
237 0.000100, /*float32 waitTime;*/ \
238 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
239 }, \
240 { /*Step 2 Config: 240MHz*/ \
241 (3 - 1), /*uint8 k2Step;*/ \
242 0.000100, /*float32 waitTime;*/ \
243 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
244 }
245 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ */
246
247 #ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ
248 /** \brief Macro for Pll step for profile with 20MHz Crystal and 300MHz target */
249 #define IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ \
250 { /*Step 0 Config: 150MHz*/ \
251 (4 - 1), /*uint8 k2Step;*/ \
252 0.000100, /*float32 waitTime;*/ \
253 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
254 }, \
255 { /*Step 1 Config: 200MHz*/ \
256 (3 - 1), /*uint8 k2Step;*/ \
257 0.000100, /*float32 waitTime;*/ \
258 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
259 }, \
260 { /*Step 2 Config: 300MHz*/ \
261 (2 - 1), /*uint8 k2Step;*/ \
262 0.000100, /*float32 waitTime;*/ \
263 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
264 }
265 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ */
266
267 /******************** Pll step for 40MHz crystal Configurations ********************************/
268 #ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ
269 /** \brief Macro for Pll step for profile with 40MHz Crystal and 80MHz target */
270 #define IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ \
271 { /*Step 0 Config: 80MHz*/ \
272 (8 - 1), /*uint8 k2Step;*/ \
273 0.000100, /*float32 waitTime;*/ \
274 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
275 },
276 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ */
277
278 #ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ
279 /** \brief Macro for Pll step for profile with 40MHz Crystal and 133MHz target */
280 #define IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ \
281 { /*Step 0 Config: 114MHz*/ \
282 (7 - 1), /*uint8 k2Step;*/ \
283 0.000100, /*float32 waitTime;*/ \
284 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
285 }, \
286 { /*Step 1 Config: 133MHz*/ \
287 (6 - 1), /*uint8 k2Step;*/ \
288 0.000100, /*float32 waitTime;*/ \
289 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
290 },
291 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ */
292
293 #ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ
294 /** \brief Macro for Pll step for profile with 40MHz Crystal and 160MHz target */
295 #define IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ \
296 { /*Step 1 Config: 128MHz*/ \
297 (5 - 1), /*uint8 k2Step;*/ \
298 0.000100, /*float32 waitTime;*/ \
299 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
300 }, \
301 { /*Step 2 Config: 160MHz*/ \
302 (4 - 1), /*uint8 k2Step;*/ \
303 0.000100, /*float32 waitTime;*/ \
304 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
305 }
306 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ */
307
308 #ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ
309 /** \brief Macro for Pll step for profile with 40MHz Crystal and 200MHz target */
310 #define IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ \
311 { /*Step 0 Config: 120MHz*/ \
312 (5 - 1), /*uint8 k2Step;*/ \
313 0.000100, /*float32 waitTime;*/ \
314 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
315 }, \
316 { /*Step 1 Config: 150MHz*/ \
317 (4 - 1), /*uint8 k2Step;*/ \
318 0.000100, /*float32 waitTime;*/ \
319 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
320 }, \
321 { /*Step 2 Config: 200MHz*/ \
322 (3 - 1), /*uint8 k2Step;*/ \
323 0.000100, /*float32 waitTime;*/ \
324 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
325 }
326 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ */
327
328 #ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ
329 /** \brief Macro for Pll step for profile with 40MHz Crystal and 240MHz target */
330 #define IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ \
331 { /*Step 0 Config: 144MHz*/ \
332 (5 - 1), /*uint8 k2Step;*/ \
333 0.000100, /*float32 waitTime;*/ \
334 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
335 }, \
336 { /*Step 1 Config: 180MHz*/ \
337 (4 - 1), /*uint8 k2Step;*/ \
338 0.000100, /*float32 waitTime;*/ \
339 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
340 }, \
341 { /*Step 2 Config: 240MHz*/ \
342 (3 - 1), /*uint8 k2Step;*/ \
343 0.000100, /*float32 waitTime;*/ \
344 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
345 }
346 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ */
347
348 #ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ
349 /** \brief Macro for Pll step for profile with 40MHz Crystal and 300MHz target */
350 #define IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ \
351 { /*Step 0 Config: 150MHz*/ \
352 (4 - 1), /*uint8 k2Step;*/ \
353 0.000100, /*float32 waitTime;*/ \
354 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
355 }, \
356 { /*Step 1 Config: 200MHz*/ \
357 (3 - 1), /*uint8 k2Step;*/ \
358 0.000100, /*float32 waitTime;*/ \
359 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
360 }, \
361 { /*Step 2 Config: 300MHz*/ \
362 (2 - 1), /*uint8 k2Step;*/ \
363 0.000100, /*float32 waitTime;*/ \
364 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
365 }
366 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ */
367
368 /******************** Pll step for 8MHz crystal Configurations ********************************/
369 #ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ
370 /** \brief Macro for Pll step for profile with 8MHz Crystal and 80MHz target */
371 #define IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ \
372 { /*Step 0 Config: 80MHz*/ \
373 (5 - 1), /*uint8 k2Step;*/ \
374 0.000100, /*float32 waitTime;*/ \
375 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
376 },
377 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ */
378
379 #ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ
380 /** \brief Macro for Pll step for profile with 8MHz Crystal and 160MHz target */
381 #define IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ \
382 { /*Step 0 Config: 100MHz*/ \
383 (4 - 1), /*uint8 k2Step;*/ \
384 0.000100, /*float32 waitTime;*/ \
385 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
386 }, \
387 { /*Step 1 Config: 160MHz*/ \
388 (3 - 1), /*uint8 k2Step;*/ \
389 0.000100, /*float32 waitTime;*/ \
390 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
391 },
392 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ */
393
394 #ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ
395 /** \brief Macro for Pll step for profile with 8MHz Crystal and 200MHz target */
396 #define IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ \
397 { /*Step 0 Config: 120MHz*/ \
398 (5 - 1), /*uint8 k2Step;*/ \
399 0.000100, /*float32 waitTime;*/ \
400 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
401 }, \
402 { /*Step 0 Config: 150MHz*/ \
403 (4 - 1), /*uint8 k2Step;*/ \
404 0.000100, /*float32 waitTime;*/ \
405 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
406 }, \
407 { /*Step 1 Config: 200MHz*/ \
408 (3 - 1), /*uint8 k2Step;*/ \
409 0.000100, /*float32 waitTime;*/ \
410 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
411 },
412 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ */
413
414 /** \brief Macros to configure Initial Pll step.
415 * Macros to configure the Pll initial step, where the configuration of PDIV, NDIV and K2DIV are
416 * done for the internal Oscillator frequency.
417 * \ref IfxScuCcu_InitialStepConfig
418 */
419
420 /****************** Initial Pll step for 16MHz crystal Configurations ******************************/
421
422 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ
423 /** \brief Macro for Initial Pll step, for profile with 16MHz Crystal and 80MHz target */
424 #define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ \
425 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
426 {(1 - 1), (40 - 1), (7 - 1), 0.000200F}
427 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ */
428
429 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ
430 /** \brief Macro for Initial Pll step, for profile with 16MHz Crystal and 133MHz target */
431 #define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ \
432 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
433 {(1 - 1), (50 - 1), (8 - 1), 0.000200F}
434 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ */
435
436 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ
437 /** \brief Macro for Initial Pll step, for profile with 16MHz Crystal and 160MHz target */
438 #define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ \
439 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
440 {(1 - 1), (40 - 1), (6 - 1), 0.000200F}
441 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ */
442
443 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ
444 /** \brief Macro for Initial Pll step, for profile with 16MHz Crystal and 200MHz target */
445 #define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ \
446 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
447 {(1 - 1), (50 - 1), (8 - 1), 0.000200F}
448 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ */
449
450 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ
451 /** \brief Macro for Initial Pll step, for profile with 16MHz Crystal and 240MHz target */
452 #define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ \
453 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
454 {(1 - 1), (45 - 1), (7 - 1), 0.000200F}
455 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ */
456
457 /****************** Initial Pll step for 20MHz crystal Configurations ******************************/
458
459 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ
460 /** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 80MHz target */
461 #define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ \
462 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
463 {(2 - 1), (64 - 1), (7 - 1), 0.000200F}
464 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ */
465
466 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ
467 /** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 133MHz target */
468 #define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ \
469 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
470 {(2 - 1), (80 - 1), (8 - 1), 0.000200F}
471 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ */
472
473 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ
474 /** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 160MHz target */
475 #define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ \
476 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
477 {(2 - 1), (64 - 1), (6 - 1), 0.000200F}
478 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ */
479
480 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ
481 /** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 200MHz target */
482 #define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ \
483 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
484 {(2 - 1), (60 - 1), (6 - 1), 0.000200F}
485 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ */
486
487 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ
488 /** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 240MHz target */
489 #define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ \
490 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
491 {(2 - 1), (72 - 1), (7 - 1), 0.000200F}
492 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ */
493
494 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ
495 /** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 300MHz target */
496 #define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ \
497 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
498 {(2 - 1), (60 - 1), (6 - 1), 0.000200F}
499 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ */
500
501 /****************** Initial Pll step for 40MHz crystal Configurations ******************************/
502
503 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ
504 /** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 80MHz target */
505 #define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ \
506 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
507 {(4 - 1), (64 - 1), (7 - 1), 0.000200F}
508 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ */
509
510 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ
511 /** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 133MHz target */
512 #define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ \
513 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
514 {(4 - 1), (80 - 1), (8 - 1), 0.000200F}
515 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ */
516
517 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ
518 /** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 160MHz target */
519 #define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ \
520 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
521 {(4 - 1), (64 - 1), (6 - 1), 0.000200F}
522 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ */
523
524 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ
525 /** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 200MHz target */
526 #define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ \
527 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
528 {(4 - 1), (60 - 1), (6 - 1), 0.000200F}
529 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ */
530
531 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ
532 /** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 240MHz target */
533 #define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ \
534 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
535 {(4 - 1), (72 - 1), (7 - 1), 0.000200F}
536 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ */
537
538 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ
539 /** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 300MHz target */
540 #define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ \
541 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
542 {(4 - 1), (60 - 1), (6 - 1), 0.000200F}
543 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ */
544
545 /****************** Initial Pll step for 8MHz crystal Configurations ******************************/
546
547 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ
548 /** \brief Macro for Initial Pll step, for profile with 8MHz Crystal and 80MHz target */
549 #define IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ \
550 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime } ??*/\
551 {(1 - 1), (50 - 1), (5 - 1), 0.000200F}
552 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ */
553
554 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ
555 /** \brief Macro for Initial Pll step, for profile with 8MHz Crystal and 160MHz target */
556 #define IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ \
557 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
558 {(1 - 1), (60 - 1), (5 - 1), 0.000200F}
559 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ */
560
561 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ
562 /** \brief Macro for Initial Pll step, for profile with 8MHz Crystal and 200MHz target */
563 #define IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ \
564 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
565 {(1 - 1), (75 - 1), (6 - 1), 0.000200F}
566 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ */
567
568 /** \brief Macros to configure CCUCON registers.
569 * Macros to configure the Pll initial step, where the configuration of PDIV, NDIV and K2DIV are
570 * done for the internal Oscillator frequency.
571 * \ref IfxScuCcu_InitialStepConfig
572 */
573
574 /** \brief Macros to configure CCUCON registers */
575
576 #ifndef IFXSCU_CFG_MAXDIV_80MHZ
577 /** \brief Macro to configure MAXDIV at 80MHz target frequency */
578 #define IFXSCU_CFG_MAXDIV_80MHZ (1)
579 #endif /*#ifndef IFXSCU_CFG_MAXDIV_80MHZ */
580
581 #ifndef IFXSCU_CFG_MAXDIV_133MHZ
582 /** \brief Macro to configure MAXDIV at 133MHz target frequency */
583 #define IFXSCU_CFG_MAXDIV_133MHZ (1)
584 #endif /*#ifndef IFXSCU_CFG_MAXDIV_133MHZ */
585
586 #ifndef IFXSCU_CFG_MAXDIV_160MHZ
587 /** \brief Macro to configure MAXDIV at 160MHz target frequency */
588 #define IFXSCU_CFG_MAXDIV_160MHZ (1)
589 #endif /*#ifndef IFXSCU_CFG_MAXDIV_160MHZ */
590
591 #ifndef IFXSCU_CFG_MAXDIV_200MHZ
592 /** \brief Macro to configure MAXDIV at 200MHz target frequency */
593 #define IFXSCU_CFG_MAXDIV_200MHZ (1)
594 #endif /*#ifndef IFXSCU_CFG_MAXDIV_200MHZ */
595
596 #ifndef IFXSCU_CFG_MAXDIV_240MHZ
597 /** \brief Macro to configure MAXDIV at 240MHz target frequency */
598 #define IFXSCU_CFG_MAXDIV_240MHZ (1)
599 #endif /*#ifndef IFXSCU_CFG_MAXDIV_240MHZ */
600
601 #ifndef IFXSCU_CFG_MAXDIV_300MHZ
602 /** \brief Macro to configure MAXDIV at 300MHz target frequency */
603 #define IFXSCU_CFG_MAXDIV_300MHZ (1)
604 #endif /*#ifndef IFXSCU_CFG_MAXDIV_300MHZ */
605
606 #ifndef IFXSCU_CFG_SRIDIV_80MHZ
607 /** \brief Macro to configure SRIDIV at 80MHz target frequency */
608 #define IFXSCU_CFG_SRIDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
609 #endif /*#ifndef IFXSCU_CFG_SRIDIV_80MHZ */
610
611 #ifndef IFXSCU_CFG_SRIDIV_133MHZ
612 /** \brief Macro to configure SRIDIV at 133MHz target frequency */
613 #define IFXSCU_CFG_SRIDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
614 #endif /*#ifndef IFXSCU_CFG_SRIDIV_133MHZ */
615
616 #ifndef IFXSCU_CFG_SRIDIV_160MHZ
617 /** \brief Macro to configure SRIDIV at 160MHz target frequency */
618 #define IFXSCU_CFG_SRIDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
619 #endif /*#ifndef IFXSCU_CFG_SRIDIV_160MHZ */
620
621 #ifndef IFXSCU_CFG_SRIDIV_200MHZ
622 /** \brief Macro to configure SRIDIV at 200MHz target frequency */
623 #define IFXSCU_CFG_SRIDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
624 #endif /*#ifndef IFXSCU_CFG_SRIDIV_200MHZ */
625
626 #ifndef IFXSCU_CFG_SRIDIV_240MHZ
627 /** \brief Macro to configure SRIDIV at 240MHz target frequency */
628 #define IFXSCU_CFG_SRIDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
629 #endif /*#ifndef IFXSCU_CFG_SRIDIV_240MHZ */
630
631 #ifndef IFXSCU_CFG_SRIDIV_300MHZ
632 /** \brief Macro to configure SRIDIV at 300MHz target frequency */
633 #define IFXSCU_CFG_SRIDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
634 #endif /*#ifndef IFXSCU_CFG_SRIDIV_300MHZ */
635
636 #ifndef IFXSCU_CFG_BAUD1DIV_80MHZ
637 /** \brief Macro to configure BAUD1DIV at 80MHz target frequency */
638 #define IFXSCU_CFG_BAUD1DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
639 #endif /*#ifndef IFXSCU_CFG_BAUD1DIV_80MHZ */
640
641 #ifndef IFXSCU_CFG_BAUD1DIV_133MHZ
642 /** \brief Macro to configure BAUD1DIV at 133MHz target frequency */
643 #define IFXSCU_CFG_BAUD1DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
644 #endif /*#ifndef IFXSCU_CFG_BAUD1DIV_133MHZ */
645
646 #ifndef IFXSCU_CFG_BAUD1DIV_160MHZ
647 /** \brief Macro to configure BAUD1DIV at 160MHz target frequency */
648 #define IFXSCU_CFG_BAUD1DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
649 #endif /*#ifndef IFXSCU_CFG_BAUD1DIV_160MHZ */
650
651 #ifndef IFXSCU_CFG_BAUD1DIV_200MHZ
652 /** \brief Macro to configure BAUD1DIV at 200MHz target frequency */
653 #define IFXSCU_CFG_BAUD1DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
654 #endif /*#ifndef IFXSCU_CFG_BAUD1DIV_200MHZ */
655
656 #ifndef IFXSCU_CFG_BAUD1DIV_240MHZ
657 /** \brief Macro to configure BAUD1DIV at 240MHz target frequency */
658 #define IFXSCU_CFG_BAUD1DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
659 #endif /*#ifndef IFXSCU_CFG_BAUD1DIV_240MHZ */
660
661 #ifndef IFXSCU_CFG_BAUD1DIV_300MHZ
662 /** \brief Macro to configure BAUD1DIV at 300MHz target frequency */
663 #define IFXSCU_CFG_BAUD1DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
664 #endif /*#ifndef IFXSCU_CFG_BAUD1DIV_300MHZ */
665
666 #ifndef IFXSCU_CFG_BAUD2DIV_80MHZ
667 /** \brief Macro to configure BAUD2DIV at 80MHz target frequency */
668 #define IFXSCU_CFG_BAUD2DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
669 #endif /*#ifndef IFXSCU_CFG_BAUD2DIV_80MHZ */
670
671 #ifndef IFXSCU_CFG_BAUD2DIV_133MHZ
672 /** \brief Macro to configure BAUD2DIV at 133MHz target frequency */
673 #define IFXSCU_CFG_BAUD2DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
674 #endif /*#ifndef IFXSCU_CFG_BAUD2DIV_133MHZ */
675
676 #ifndef IFXSCU_CFG_BAUD2DIV_160MHZ
677 /** \brief Macro to configure BAUD2DIV at 160MHz target frequency */
678 #define IFXSCU_CFG_BAUD2DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
679 #endif /*#ifndef IFXSCU_CFG_BAUD2DIV_160MHZ */
680
681 #ifndef IFXSCU_CFG_BAUD2DIV_200MHZ
682 /** \brief Macro to configure BAUD2DIV at 200MHz target frequency */
683 #define IFXSCU_CFG_BAUD2DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
684 #endif /*#ifndef IFXSCU_CFG_BAUD2DIV_200MHZ */
685
686 #ifndef IFXSCU_CFG_BAUD2DIV_240MHZ
687 /** \brief Macro to configure BAUD2DIV at 240MHz target frequency */
688 #define IFXSCU_CFG_BAUD2DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
689 #endif /*#ifndef IFXSCU_CFG_BAUD2DIV_240MHZ */
690
691 #ifndef IFXSCU_CFG_BAUD2DIV_300MHZ
692 /** \brief Macro to configure BAUD2DIV at 300MHz target frequency */
693 #define IFXSCU_CFG_BAUD2DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
694 #endif /*#ifndef IFXSCU_CFG_BAUD2DIV_300MHZ */
695
696 #ifndef IFXSCU_CFG_SPBDIV_80MHZ
697 /** \brief Macro to configure SPBDIV at 80MHz target frequency */
698 #define IFXSCU_CFG_SPBDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ * 2) /*Max: 100MHz */
699 #endif /*#ifndef IFXSCU_CFG_SPBDIV_80MHZ */
700
701 #ifndef IFXSCU_CFG_SPBDIV_133MHZ
702 /** \brief Macro to configure SPBDIV at 133MHz target frequency */
703 #define IFXSCU_CFG_SPBDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
704 #endif /*#ifndef IFXSCU_CFG_SPBDIV_133MHZ */
705
706 #ifndef IFXSCU_CFG_SPBDIV_160MHZ
707 /** \brief Macro to configure SPBDIV at 160MHz target frequency */
708 #define IFXSCU_CFG_SPBDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
709 #endif /*#ifndef IFXSCU_CFG_SPBDIV_160MHZ */
710
711 #ifndef IFXSCU_CFG_SPBDIV_200MHZ
712 /** \brief Macro to configure SPBDIV at 200MHz target frequency */
713 #define IFXSCU_CFG_SPBDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
714 #endif /*#ifndef IFXSCU_CFG_SPBDIV_200MHZ */
715
716 #ifndef IFXSCU_CFG_SPBDIV_240MHZ
717 /** \brief Macro to configure SPBDIV at 240MHz target frequency */
718 #define IFXSCU_CFG_SPBDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
719 #endif /*#ifndef IFXSCU_CFG_SPBDIV_240MHZ */
720
721 #ifndef IFXSCU_CFG_SPBDIV_300MHZ
722 /** \brief Macro to configure SPBDIV at 300MHz target frequency */
723 #define IFXSCU_CFG_SPBDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
724 #endif /*#ifndef IFXSCU_CFG_SPBDIV_300MHZ */
725
726 #ifndef IFXSCU_CFG_FSI2DIV_80MHZ
727 /** \brief Macro to configure FSI2DIV at 80MHz target frequency */
728 #define IFXSCU_CFG_FSI2DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
729 #endif /*#ifndef IFXSCU_CFG_FSI2DIV_80MHZ */
730
731 #ifndef IFXSCU_CFG_FSI2DIV_133MHZ
732 /** \brief Macro to configure FSI2DIV at 133MHz target frequency */
733 #define IFXSCU_CFG_FSI2DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
734 #endif /*#ifndef IFXSCU_CFG_FSI2DIV_133MHZ */
735
736 #ifndef IFXSCU_CFG_FSI2DIV_160MHZ
737 /** \brief Macro to configure FSI2DIV at 160MHz target frequency */
738 #define IFXSCU_CFG_FSI2DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
739 #endif /*#ifndef IFXSCU_CFG_FSI2DIV_160MHZ */
740
741 #ifndef IFXSCU_CFG_FSI2DIV_200MHZ
742 /** \brief Macro to configure FSI2DIV at 200MHz target frequency */
743 #define IFXSCU_CFG_FSI2DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
744 #endif /*#ifndef IFXSCU_CFG_FSI2DIV_200MHZ */
745
746 #ifndef IFXSCU_CFG_FSI2DIV_240MHZ
747 /** \brief Macro to configure FSI2DIV at 240MHz target frequency */
748 #define IFXSCU_CFG_FSI2DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
749 #endif /*#ifndef IFXSCU_CFG_FSI2DIV_240MHZ */
750
751 #ifndef IFXSCU_CFG_FSI2DIV_300MHZ
752 /** \brief Macro to configure FSI2DIV at 300MHz target frequency */
753 #define IFXSCU_CFG_FSI2DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
754 #endif /*#ifndef IFXSCU_CFG_FSI2DIV_300MHZ */
755
756 #ifndef IFXSCU_CFG_FSIDIV_80MHZ
757 /** \brief Macro to configure FSIDIV at 80MHz target frequency */
758 #define IFXSCU_CFG_FSIDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
759 #endif /*#ifndef IFXSCU_CFG_FSIDIV_80MHZ */
760
761 #ifndef IFXSCU_CFG_FSIDIV_133MHZ
762 /** \brief Macro to configure FSIDIV at 133MHz target frequency */
763 #define IFXSCU_CFG_FSIDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
764 #endif /*#ifndef IFXSCU_CFG_FSIDIV_133MHZ */
765
766 #ifndef IFXSCU_CFG_FSIDIV_160MHZ
767 /** \brief Macro to configure FSIDIV at 160MHz target frequency */
768 #define IFXSCU_CFG_FSIDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
769 #endif /*#ifndef IFXSCU_CFG_FSIDIV_160MHZ */
770
771 #ifndef IFXSCU_CFG_FSIDIV_200MHZ
772 /** \brief Macro to configure FSIDIV at 200MHz target frequency */
773 #define IFXSCU_CFG_FSIDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
774 #endif /*#ifndef IFXSCU_CFG_FSIDIV_200MHZ */
775
776 #ifndef IFXSCU_CFG_FSIDIV_240MHZ
777 /** \brief Macro to configure FSIDIV at 240MHz target frequency */
778 #define IFXSCU_CFG_FSIDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
779 #endif /*#ifndef IFXSCU_CFG_FSIDIV_240MHZ */
780
781 #ifndef IFXSCU_CFG_FSIDIV_300MHZ
782 /** \brief Macro to configure FSIDIV at 300MHz target frequency */
783 #define IFXSCU_CFG_FSIDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
784 #endif /*#ifndef IFXSCU_CFG_FSIDIV_300MHZ */
785
786 #ifndef IFXSCU_CFG_CANDIV_80MHZ
787 /** \brief Macro to configure CANDIV at 80MHz target frequency */
788 #define IFXSCU_CFG_CANDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
789 #endif /*#ifndef IFXSCU_CFG_CANDIV_80MHZ */
790
791 #ifndef IFXSCU_CFG_CANDIV_133MHZ
792 /** \brief Macro to configure CANDIV at 133MHz target frequency */
793 #define IFXSCU_CFG_CANDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
794 #endif /*#ifndef IFXSCU_CFG_CANDIV_133MHZ */
795
796 #ifndef IFXSCU_CFG_CANDIV_160MHZ
797 /** \brief Macro to configure CANDIV at 160MHz target frequency */
798 #define IFXSCU_CFG_CANDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
799 #endif /*#ifndef IFXSCU_CFG_CANDIV_160MHZ */
800
801 #ifndef IFXSCU_CFG_CANDIV_200MHZ
802 /** \brief Macro to configure CANDIV at 200MHz target frequency */
803 #define IFXSCU_CFG_CANDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
804 #endif /*#ifndef IFXSCU_CFG_CANDIV_200MHZ */
805
806 #ifndef IFXSCU_CFG_CANDIV_240MHZ
807 /** \brief Macro to configure CANDIV at 240MHz target frequency */
808 #define IFXSCU_CFG_CANDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
809 #endif /*#ifndef IFXSCU_CFG_CANDIV_240MHZ */
810
811 #ifndef IFXSCU_CFG_CANDIV_300MHZ
812 /** \brief Macro to configure CANDIV at 200MHz target frequency */
813 #define IFXSCU_CFG_CANDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
814 #endif /*#ifndef IFXSCU_CFG_CANDIV_300MHZ */
815
816 #ifndef IFXSCU_CFG_ERAYDIV_80MHZ
817 /** \brief Macro to configure ERAYDIV at 80MHz target frequency */
818 #define IFXSCU_CFG_ERAYDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 80MHz */
819 #endif /*#ifndef IFXSCU_CFG_ERAYDIV_80MHZ */
820
821 #ifndef IFXSCU_CFG_ERAYDIV_133MHZ
822 /** \brief Macro to configure ERAYDIV at 133MHz target frequency */
823 #define IFXSCU_CFG_ERAYDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 80MHz */
824 #endif /*#ifndef IFXSCU_CFG_ERAYDIV_133MHZ */
825
826 #ifndef IFXSCU_CFG_ERAYDIV_160MHZ
827 /** \brief Macro to configure ERAYDIV at 160MHz target frequency */
828 #define IFXSCU_CFG_ERAYDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 80MHz */
829 #endif /*#ifndef IFXSCU_CFG_ERAYDIV_160MHZ */
830
831 #ifndef IFXSCU_CFG_ERAYDIV_200MHZ
832 /** \brief Macro to configure ERAYDIV at 200MHz target frequency */
833 #define IFXSCU_CFG_ERAYDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 3) /*Max: 80MHz */
834 #endif /*#ifndef IFXSCU_CFG_ERAYDIV_200MHZ */
835
836 #ifndef IFXSCU_CFG_ERAYDIV_240MHZ
837 /** \brief Macro to configure ERAYDIV at 200MHz target frequency */
838 #define IFXSCU_CFG_ERAYDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 80MHz */
839 #endif /*#ifndef IFXSCU_CFG_ERAYDIV_240MHZ */
840
841 #ifndef IFXSCU_CFG_ERAYDIV_300MHZ
842 /** \brief Macro to configure ERAYDIV at 300MHz target frequency */
843 #define IFXSCU_CFG_ERAYDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 4) /*Max: 80MHz */
844 #endif /*#ifndef IFXSCU_CFG_ERAYDIV_300MHZ */
845
846 #ifndef IFXSCU_CFG_STMDIV_80MHZ
847 /** \brief Macro to configure STMDIV at 80MHz target frequency */
848 #define IFXSCU_CFG_STMDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
849 #endif /*#ifndef IFXSCU_CFG_STMDIV_80MHZ */
850
851 #ifndef IFXSCU_CFG_STMDIV_133MHZ
852 /** \brief Macro to configure STMDIV at 133MHz target frequency */
853 #define IFXSCU_CFG_STMDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
854 #endif /*#ifndef IFXSCU_CFG_STMDIV_133MHZ */
855
856 #ifndef IFXSCU_CFG_STMDIV_160MHZ
857 /** \brief Macro to configure STMDIV at 160MHz target frequency */
858 #define IFXSCU_CFG_STMDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
859 #endif /*#ifndef IFXSCU_CFG_STMDIV_160MHZ */
860
861 #ifndef IFXSCU_CFG_STMDIV_200MHZ
862 /** \brief Macro to configure STMDIV at 200MHz target frequency */
863 #define IFXSCU_CFG_STMDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
864 #endif /*#ifndef IFXSCU_CFG_STMDIV_200MHZ */
865
866 #ifndef IFXSCU_CFG_STMDIV_240MHZ
867 /** \brief Macro to configure STMDIV at 240MHz target frequency */
868 #define IFXSCU_CFG_STMDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
869 #endif /*#ifndef IFXSCU_CFG_STMDIV_240MHZ */
870
871 #ifndef IFXSCU_CFG_STMDIV_300MHZ
872 /** \brief Macro to configure STMDIV at 300MHz target frequency */
873 #define IFXSCU_CFG_STMDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
874 #endif /*#ifndef IFXSCU_CFG_STMDIV_300MHZ */
875
876 #ifndef IFXSCU_CFG_GTMDIV_80MHZ
877 /** \brief Macro to configure GTMDIV at 80MHz target frequency */
878 #define IFXSCU_CFG_GTMDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
879 #endif /*#ifndef IFXSCU_CFG_GTMDIV_80MHZ */
880
881 #ifndef IFXSCU_CFG_GTMDIV_133MHZ
882 /** \brief Macro to configure GTMDIV at 133MHz target frequency */
883 #define IFXSCU_CFG_GTMDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
884 #endif /*#ifndef IFXSCU_CFG_GTMDIV_133MHZ */
885
886 #ifndef IFXSCU_CFG_GTMDIV_160MHZ
887 /** \brief Macro to configure GTMDIV at 160MHz target frequency */
888 #define IFXSCU_CFG_GTMDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
889 #endif /*#ifndef IFXSCU_CFG_GTMDIV_160MHZ */
890
891 #ifndef IFXSCU_CFG_GTMDIV_200MHZ
892 /** \brief Macro to configure GTMDIV at 200MHz target frequency */
893 #define IFXSCU_CFG_GTMDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
894 #endif /*#ifndef IFXSCU_CFG_GTMDIV_200MHZ */
895
896 #ifndef IFXSCU_CFG_GTMDIV_240MHZ
897 /** \brief Macro to configure GTMDIV at 240MHz target frequency */
898 #define IFXSCU_CFG_GTMDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
899 #endif /*#ifndef IFXSCU_CFG_GTMDIV_240MHZ */
900
901 #ifndef IFXSCU_CFG_GTMDIV_300MHZ
902 /** \brief Macro to configure GTMDIV at 300MHz target frequency */
903 #define IFXSCU_CFG_GTMDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
904 #endif /*#ifndef IFXSCU_CFG_GTMDIV_300MHZ */
905
906 #ifndef IFXSCU_CFG_ETHDIV_80MHZ
907 /** \brief Macro to configure ETHDIV at 80MHz target frequency */
908 #define IFXSCU_CFG_ETHDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ * 2)
909 #endif /*#ifndef IFXSCU_CFG_ETHDIV_80MHZ */
910
911 #ifndef IFXSCU_CFG_ETHDIV_133MHZ
912 /** \brief Macro to configure ETHDIV at 133MHz target frequency */
913 #define IFXSCU_CFG_ETHDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 3)
914 #endif /*#ifndef IFXSCU_CFG_ETHDIV_133MHZ */
915
916 #ifndef IFXSCU_CFG_ETHDIV_160MHZ
917 /** \brief Macro to configure ETHDIV at 160MHz target frequency */
918 #define IFXSCU_CFG_ETHDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 4)
919 #endif /*#ifndef IFXSCU_CFG_ETHDIV_160MHZ */
920
921 #ifndef IFXSCU_CFG_ETHDIV_200MHZ
922 /** \brief Macro to configure ETHDIV at 200MHz target frequency */
923 #define IFXSCU_CFG_ETHDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 4)
924 #endif /*#ifndef IFXSCU_CFG_ETHDIV_200MHZ */
925
926 #ifndef IFXSCU_CFG_ETHDIV_240MHZ
927 /** \brief Macro to configure ETHDIV at 240MHz target frequency */
928 #define IFXSCU_CFG_ETHDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 5)
929 #endif /*#ifndef IFXSCU_CFG_ETHDIV_240MHZ */
930
931 #ifndef IFXSCU_CFG_ETHDIV_300MHZ
932 /** \brief Macro to configure ETHDIV at 300MHz target frequency */
933 #define IFXSCU_CFG_ETHDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 6)
934 #endif /*#ifndef IFXSCU_CFG_ETHDIV_300MHZ */
935
936 #ifndef IFXSCU_CFG_ASCLINFDIV_80MHZ
937 /** \brief Macro to configure ASCLINFDIV at 80MHz target frequency */
938 #define IFXSCU_CFG_ASCLINFDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
939 #endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_80MHZ */
940
941 #ifndef IFXSCU_CFG_ASCLINFDIV_133MHZ
942 /** \brief Macro to configure ASCLINFDIV at 133MHz target frequency */
943 #define IFXSCU_CFG_ASCLINFDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
944 #endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_133MHZ */
945
946 #ifndef IFXSCU_CFG_ASCLINFDIV_160MHZ
947 /** \brief Macro to configure ASCLINFDIV at 160MHz target frequency */
948 #define IFXSCU_CFG_ASCLINFDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
949 #endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_160MHZ */
950
951 #ifndef IFXSCU_CFG_ASCLINFDIV_200MHZ
952 /** \brief Macro to configure ASCLINFDIV at 200MHz target frequency */
953 #define IFXSCU_CFG_ASCLINFDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
954 #endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_200MHZ */
955
956 #ifndef IFXSCU_CFG_ASCLINFDIV_240MHZ
957 /** \brief Macro to configure ASCLINFDIV at 240MHz target frequency */
958 #define IFXSCU_CFG_ASCLINFDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
959 #endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_240MHZ */
960
961 #ifndef IFXSCU_CFG_ASCLINFDIV_300MHZ
962 /** \brief Macro to configure ASCLINFDIV at 300MHz target frequency */
963 #define IFXSCU_CFG_ASCLINFDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
964 #endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_300MHZ */
965
966 #ifndef IFXSCU_CFG_ASCLINSDIV_80MHZ
967 /** \brief Macro to configure ASCLINSDIV at 80MHz target frequency */
968 #define IFXSCU_CFG_ASCLINSDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
969 #endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_80MHZ */
970
971 #ifndef IFXSCU_CFG_ASCLINSDIV_133MHZ
972 /** \brief Macro to configure ASCLINSDIV at 133MHz target frequency */
973 #define IFXSCU_CFG_ASCLINSDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
974 #endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_133MHZ */
975
976 #ifndef IFXSCU_CFG_ASCLINSDIV_160MHZ
977 /** \brief Macro to configure ASCLINSDIV at 160MHz target frequency */
978 #define IFXSCU_CFG_ASCLINSDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
979 #endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_160MHZ */
980
981 #ifndef IFXSCU_CFG_ASCLINSDIV_200MHZ
982 /** \brief Macro to configure ASCLINSDIV at 200MHz target frequency */
983 #define IFXSCU_CFG_ASCLINSDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
984 #endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_200MHZ */
985
986 #ifndef IFXSCU_CFG_ASCLINSDIV_240MHZ
987 /** \brief Macro to configure ASCLINSDIV at 240MHz target frequency */
988 #define IFXSCU_CFG_ASCLINSDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
989 #endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_240MHZ */
990
991 #ifndef IFXSCU_CFG_ASCLINSDIV_300MHZ
992 /** \brief Macro to configure ASCLINSDIV at 300MHz target frequency */
993 #define IFXSCU_CFG_ASCLINSDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
994 #endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_200MHZ */
995
996 #ifndef IFXSCU_CFG_BBBDIV_80MHZ
997 /** \brief Macro to configure BBBDIV at 80MHz target frequency */
998 #define IFXSCU_CFG_BBBDIV_80MHZ (IFXSCU_CFG_SRIDIV_80MHZ * 2)
999 #endif /*#ifndef IFXSCU_CFG_BBBDIV_80MHZ */
1000
1001 #ifndef IFXSCU_CFG_BBBDIV_133MHZ
1002 /** \brief Macro to configure BBBDIV at 133MHz target frequency */
1003 #define IFXSCU_CFG_BBBDIV_133MHZ (IFXSCU_CFG_SRIDIV_133MHZ * 2)
1004 #endif /*#ifndef IFXSCU_CFG_BBBDIV_133MHZ */
1005
1006 #ifndef IFXSCU_CFG_BBBDIV_160MHZ
1007 /** \brief Macro to configure BBBDIV at 160MHz target frequency */
1008 #define IFXSCU_CFG_BBBDIV_160MHZ (IFXSCU_CFG_SRIDIV_160MHZ * 2)
1009 #endif /*#ifndef IFXSCU_CFG_BBBDIV_160MHZ */
1010
1011 #ifndef IFXSCU_CFG_BBBDIV_200MHZ
1012 /** \brief Macro to configure BBBDIV at 200MHz target frequency */
1013 #define IFXSCU_CFG_BBBDIV_200MHZ (IFXSCU_CFG_SRIDIV_200MHZ * 2)
1014 #endif /*#ifndef IFXSCU_CFG_BBBDIV_200MHZ */
1015
1016 #ifndef IFXSCU_CFG_BBBDIV_240MHZ
1017 /** \brief Macro to configure BBBDIV at 240MHz target frequency */
1018 #define IFXSCU_CFG_BBBDIV_240MHZ (IFXSCU_CFG_SRIDIV_240MHZ * 2)
1019 #endif /*#ifndef IFXSCU_CFG_BBBDIV_240MHZ */
1020
1021 #ifndef IFXSCU_CFG_BBBDIV_300MHZ
1022 /** \brief Macro to configure BBBDIV at 300MHz target frequency */
1023 #define IFXSCU_CFG_BBBDIV_300MHZ (IFXSCU_CFG_SRIDIV_300MHZ * 2)
1024 #endif /*#ifndef IFXSCU_CFG_BBBDIV_300MHZ */
1025
1026 #ifndef IFXSCU_CFG_CPU0DIV_80MHZ
1027 /** \brief Macro to configure CPU0DIV at 80MHz target frequency */
1028 #define IFXSCU_CFG_CPU0DIV_80MHZ (0) /*Same as SRIDIV */
1029 #endif /*#ifndef IFXSCU_CFG_CPU0DIV_80MHZ */
1030
1031 #ifndef IFXSCU_CFG_CPU0DIV_133MHZ
1032 /** \brief Macro to configure CPU0DIV at 133MHz target frequency */
1033 #define IFXSCU_CFG_CPU0DIV_133MHZ (0) /*Same as SRIDIV */
1034 #endif /*#ifndef IFXSCU_CFG_CPU0DIV_133MHZ */
1035
1036 #ifndef IFXSCU_CFG_CPU0DIV_160MHZ
1037 /** \brief Macro to configure CPU0DIV at 160MHz target frequency */
1038 #define IFXSCU_CFG_CPU0DIV_160MHZ (0) /*Same as SRIDIV */
1039 #endif /*#ifndef IFXSCU_CFG_CPU0DIV_160MHZ */
1040
1041 #ifndef IFXSCU_CFG_CPU0DIV_200MHZ
1042 /** \brief Macro to configure CPU0DIV at 200MHz target frequency */
1043 #define IFXSCU_CFG_CPU0DIV_200MHZ (0) /*Same as SRIDIV */
1044 #endif /*#ifndef IFXSCU_CFG_CPU0DIV_200MHZ */
1045
1046 #ifndef IFXSCU_CFG_CPU0DIV_240MHZ
1047 /** \brief Macro to configure CPU0DIV at 240MHz target frequency */
1048 #define IFXSCU_CFG_CPU0DIV_240MHZ (0) /*Same as SRIDIV */
1049 #endif /*#ifndef IFXSCU_CFG_CPU0DIV_240MHZ */
1050
1051 #ifndef IFXSCU_CFG_CPU0DIV_300MHZ
1052 /** \brief Macro to configure CPU0DIV at 300MHz target frequency */
1053 #define IFXSCU_CFG_CPU0DIV_300MHZ (0) /*Same as SRIDIV */
1054 #endif /*#ifndef IFXSCU_CFG_CPU0DIV_300MHZ */
1055
1056 #ifndef IFXSCU_CFG_CPU1DIV_80MHZ
1057 /** \brief Macro to configure CPU1DIV at 80MHz target frequency */
1058 #define IFXSCU_CFG_CPU1DIV_80MHZ (0) /*Same as SRIDIV */
1059 #endif /*#ifndef IFXSCU_CFG_CPU1DIV_80MHZ */
1060
1061 #ifndef IFXSCU_CFG_CPU1DIV_133MHZ
1062 /** \brief Macro to configure CPU1DIV at 133MHz target frequency */
1063 #define IFXSCU_CFG_CPU1DIV_133MHZ (0) /*Same as SRIDIV */
1064 #endif /*#ifndef IFXSCU_CFG_CPU1DIV_133MHZ */
1065
1066 #ifndef IFXSCU_CFG_CPU1DIV_160MHZ
1067 /** \brief Macro to configure CPU1DIV at 160MHz target frequency */
1068 #define IFXSCU_CFG_CPU1DIV_160MHZ (0) /*Same as SRIDIV */
1069 #endif /*#ifndef IFXSCU_CFG_CPU1DIV_160MHZ */
1070
1071 #ifndef IFXSCU_CFG_CPU1DIV_200MHZ
1072 /** \brief Macro to configure CPU1DIV at 200MHz target frequency */
1073 #define IFXSCU_CFG_CPU1DIV_200MHZ (0) /*Same as SRIDIV */
1074 #endif /*#ifndef IFXSCU_CFG_CPU1DIV_200MHZ */
1075
1076 #ifndef IFXSCU_CFG_CPU1DIV_240MHZ
1077 /** \brief Macro to configure CPU1DIV at 240MHz target frequency */
1078 #define IFXSCU_CFG_CPU1DIV_240MHZ (0) /*Same as SRIDIV */
1079 #endif /*#ifndef IFXSCU_CFG_CPU1DIV_240MHZ */
1080
1081 #ifndef IFXSCU_CFG_CPU1DIV_300MHZ
1082 /** \brief Macro to configure CPU1DIV at 300MHz target frequency */
1083 #define IFXSCU_CFG_CPU1DIV_300MHZ (0) /*Same as SRIDIV */
1084 #endif /*#ifndef IFXSCU_CFG_CPU1DIV_300MHZ */
1085
1086 /** \brief Macros to configure FLASH.FCON register for flash waitstate configuration.
1087 * \ref IfxScuCcu_InitialStepConfig
1088 */
1089
1090 #ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ
1091 /** \brief Macro to configure FCON.WSPFLASH at 80MHz target frequency */
1092 #define IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ (3 - 1)
1093 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ */
1094
1095 #ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ
1096 /** \brief Macro to configure FCON.WSPFLASH at 133MHz target frequency */
1097 #define IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ (4 - 1)
1098 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ */
1099
1100 #ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ
1101 /** \brief Macro to configure FCON.WSPFLASH at 160MHz target frequency */
1102 #define IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ (5 - 1)
1103 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ */
1104
1105 #ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ
1106 /** \brief Macro to configure FCON.WSPFLASH at 200MHz target frequency */
1107 #define IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ (6 - 1)
1108 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ */
1109
1110 #ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ
1111 /** \brief Macro to configure FCON.WSPFLASH at 240MHz target frequency */
1112 #define IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ (8 - 1)
1113 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ */
1114
1115 #ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ
1116 /** \brief Macro to configure FCON.WSPFLASH at 300MHz target frequency */
1117 #define IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ (9 - 1)
1118 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ */
1119
1120 #ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ
1121 /** \brief Macro to configure FCON.WSECP_ at 80MHz target frequency */
1122 #define IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ (1 - 1)
1123 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ */
1124
1125 #ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ
1126 /** \brief Macro to configure FCON.WSECPF at 133MHz target frequency */
1127 #define IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ (2 - 1)
1128 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ */
1129
1130 #ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ
1131 /** \brief Macro to configure FCON.WSECPF at 160MHz target frequency */
1132 #define IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ (2 - 1)
1133 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ */
1134
1135 #ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ
1136 /** \brief Macro to configure FCON.WSECPF at 200MHz target frequency */
1137 #define IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ (2 - 1)
1138 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ */
1139
1140 #ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ
1141 /** \brief Macro to configure FCON.WSECPF_ at 240MHz target frequency */
1142 #define IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ (3 - 1)
1143 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ */
1144
1145 #ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ
1146 /** \brief Macro to configure FCON.WSECPF at 300MHz target frequency */
1147 #define IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ (3 - 1)
1148 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ */
1149
1150 #ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ
1151 /** \brief Macro to configure FCON.WSDFLASH at 80MHz target frequency */
1152 #define IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ (16 - 1)
1153 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ */
1154
1155 #ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ
1156 /** \brief Macro to configure FCON.WSDFLASH_ at 133MHz target frequency, where fSRI= 133/2= 66.5MHZ */
1157 #define IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ (14 - 1)
1158 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ */
1159
1160 #ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ
1161 /** \brief Macro to configure FCON.WSDFLASH at 160MHz target frequency, where fSRI= 160/2= 80MHZ */
1162 #define IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ (16 - 1)
1163 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ */
1164
1165 #ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ
1166 /** \brief Macro to configure FCON.WSDFLASH at 200MHz target frequency, where fSRI= 200/2= 100MHZ */
1167 #define IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ (20 - 1)
1168 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ */
1169
1170 #ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ
1171 /** \brief Macro to configure FCON.WSDFLASH at 240MHz target frequency, where fSRI= 240/3= 80MHZ */
1172 #define IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ (16 - 1)
1173 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ */
1174
1175 #ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ
1176 /** \brief Macro to configure FCON.WSDFLASH at 300MHz target frequency, where fSRI= 300/3= 100MHZ */
1177 #define IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ (20 - 1)
1178 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ */
1179
1180 #ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ
1181 /** \brief Macro to configure FCON.WSECDF at 80MHz target frequency */
1182 #define IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ (2 - 1)
1183 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ */
1184
1185 #ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ
1186 /** \brief Macro to configure FCON.WSECDF at 133MHz target frequency, where fSRI= 133/2= 66.5MHZ */
1187 #define IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ (2 - 1)
1188 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ */
1189
1190 #ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ
1191 /** \brief Macro to configure FCON.WSECDF at 160MHz target frequency, where fSRI= 160/2= 80MHZ */
1192 #define IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ (2 - 1)
1193 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ */
1194
1195 #ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ
1196 /** \brief Macro to configure FCON.WSECDF at 200MHz target frequency, where fSRI= 200/2= 100MHZ */
1197 #define IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ (2 - 1)
1198 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ */
1199
1200 #ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ
1201 /** \brief Macro to configure FCON.WSECDF at 240MHz target frequency, where fSRI= 240/3= 80MHZ */
1202 #define IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ (2 - 1)
1203 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ */
1204
1205 #ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ
1206 /** \brief Macro to configure FCON.WSECDF at 300MHz target frequency, where fSRI= 300/3= 100MHZ */
1207 #define IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ (2 - 1)
1208 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ */
1209
1210 /** \brief Macros to configure FLASH.FCON registers */
1211 #define IFXSCU_CFG_FLASH_WAITSTATE_MSK \
1212 ( \
1213 (IFX_FLASH_FCON_WSPFLASH_MSK << IFX_FLASH_FCON_WSPFLASH_OFF) | \
1214 (IFX_FLASH_FCON_WSECPF_MSK << IFX_FLASH_FCON_WSECPF_OFF) | \
1215 (IFX_FLASH_FCON_WSDFLASH_MSK << IFX_FLASH_FCON_WSDFLASH_OFF) | \
1216 (IFX_FLASH_FCON_WSECDF_MSK << IFX_FLASH_FCON_WSECDF_OFF))
1217
1218 #define IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_(pllFreq) \
1219 ( \
1220 (IFXSCU_CFG_FLASH_FCON_WSPFLASH_##pllFreq << IFX_FLASH_FCON_WSPFLASH_OFF) | \
1221 (IFXSCU_CFG_FLASH_FCON_WSECPF_##pllFreq << IFX_FLASH_FCON_WSECPF_OFF) | \
1222 (IFXSCU_CFG_FLASH_FCON_WSDFLASH_##pllFreq << IFX_FLASH_FCON_WSDFLASH_OFF) | \
1223 (IFXSCU_CFG_FLASH_FCON_WSECDF_##pllFreq << IFX_FLASH_FCON_WSECDF_OFF))
1224
1225 #define IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC(pllFreq) IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_(pllFreq)
1226
1227 #define IFXSCU_CFG_FLASH_WAITSTATE_VAL IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC(IFXSCU_CFG_PLL_FREQ)
1228
1229 /** \brief Macros to configure CCUCON0 Clock distribution */
1230 #define IFXSCU_CFG_CCUCON0_MASK \
1231 ( \
1232 (IFX_SCU_CCUCON0_BAUD1DIV_MSK << IFX_SCU_CCUCON0_BAUD1DIV_OFF) | \
1233 (IFX_SCU_CCUCON0_BAUD2DIV_MSK << IFX_SCU_CCUCON0_BAUD2DIV_OFF) | \
1234 (IFX_SCU_CCUCON0_SRIDIV_MSK << IFX_SCU_CCUCON0_SRIDIV_OFF) | \
1235 (IFX_SCU_CCUCON0_SPBDIV_MSK << IFX_SCU_CCUCON0_SPBDIV_OFF) | \
1236 (IFX_SCU_CCUCON0_FSI2DIV_MSK << IFX_SCU_CCUCON0_FSI2DIV_OFF) | \
1237 (IFX_SCU_CCUCON0_FSIDIV_MSK << IFX_SCU_CCUCON0_FSIDIV_OFF))
1238
1239 #define IFXSCU_CFG_CCUCON0_BASIC_(pllFreq) \
1240 (uint32)( \
1241 (IFXSCU_CFG_BAUD1DIV_##pllFreq << IFX_SCU_CCUCON0_BAUD1DIV_OFF) | \
1242 (IFXSCU_CFG_BAUD2DIV_##pllFreq << IFX_SCU_CCUCON0_BAUD2DIV_OFF) | \
1243 (IFXSCU_CFG_SRIDIV_##pllFreq << IFX_SCU_CCUCON0_SRIDIV_OFF) | \
1244 (IFXSCU_CFG_SPBDIV_##pllFreq << IFX_SCU_CCUCON0_SPBDIV_OFF) | \
1245 (IFXSCU_CFG_FSI2DIV_##pllFreq << IFX_SCU_CCUCON0_FSI2DIV_OFF) | \
1246 (IFXSCU_CFG_FSIDIV_##pllFreq << IFX_SCU_CCUCON0_FSIDIV_OFF))
1247
1248 #define IFXSCU_CFG_CCUCON0_BASIC(pllFreq) IFXSCU_CFG_CCUCON0_BASIC_(pllFreq)
1249
1250 #define IFXSCU_CFG_CCUCON0 IFXSCU_CFG_CCUCON0_BASIC(IFXSCU_CFG_PLL_FREQ)
1251
1252 /** \brief Macros to configure CCUCON1 Clock distribution */
1253 #define IFXSCU_CFG_CCUCON1_MASK \
1254 ( \
1255 (IFX_SCU_CCUCON1_CANDIV_MSK << IFX_SCU_CCUCON1_CANDIV_OFF) | \
1256 (IFX_SCU_CCUCON1_ERAYDIV_MSK << IFX_SCU_CCUCON1_ERAYDIV_OFF) | \
1257 (IFX_SCU_CCUCON1_STMDIV_MSK << IFX_SCU_CCUCON1_STMDIV_OFF) | \
1258 (IFX_SCU_CCUCON1_GTMDIV_MSK << IFX_SCU_CCUCON1_GTMDIV_OFF) | \
1259 (IFX_SCU_CCUCON1_ETHDIV_MSK << IFX_SCU_CCUCON1_ETHDIV_OFF) | \
1260 (IFX_SCU_CCUCON1_ASCLINFDIV_MSK << IFX_SCU_CCUCON1_ASCLINFDIV_OFF) | \
1261 (IFX_SCU_CCUCON1_ASCLINSDIV_MSK << IFX_SCU_CCUCON1_ASCLINSDIV_OFF))
1262
1263 #define IFXSCU_CFG_CCUCON1_BASIC_(pllFreq) \
1264 (uint32)( \
1265 (IFXSCU_CFG_CANDIV_##pllFreq << IFX_SCU_CCUCON1_CANDIV_OFF) | \
1266 (IFXSCU_CFG_ERAYDIV_80MHZ << IFX_SCU_CCUCON1_ERAYDIV_OFF) | \
1267 (IFXSCU_CFG_STMDIV_##pllFreq << IFX_SCU_CCUCON1_STMDIV_OFF) | \
1268 (IFXSCU_CFG_GTMDIV_##pllFreq << IFX_SCU_CCUCON1_GTMDIV_OFF) | \
1269 (IFXSCU_CFG_ETHDIV_##pllFreq << IFX_SCU_CCUCON1_ETHDIV_OFF) | \
1270 (IFXSCU_CFG_ASCLINFDIV_##pllFreq << IFX_SCU_CCUCON1_ASCLINFDIV_OFF) | \
1271 (IFXSCU_CFG_ASCLINSDIV_##pllFreq << IFX_SCU_CCUCON1_ASCLINSDIV_OFF))
1272
1273 #define IFXSCU_CFG_CCUCON1_BASIC(pllFreq) IFXSCU_CFG_CCUCON1_BASIC_(pllFreq)
1274
1275 #define IFXSCU_CFG_CCUCON1 IFXSCU_CFG_CCUCON1_BASIC(IFXSCU_CFG_PLL_FREQ)
1276
1277 /** \brief Macros to configure CCUCON2 Clock distribution */
1278 #define IFXSCU_CFG_CCUCON2_MASK \
1279 ( \
1280 (IFX_SCU_CCUCON2_BBBDIV_MSK << IFX_SCU_CCUCON2_BBBDIV_OFF))
1281
1282 #define IFXSCU_CFG_CCUCON2_BASIC_(pllFreq) \
1283 (uint32)( \
1284 (IFXSCU_CFG_BBBDIV_##pllFreq << IFX_SCU_CCUCON2_BBBDIV_OFF))
1285
1286 #define IFXSCU_CFG_CCUCON2_BASIC(pllFreq) IFXSCU_CFG_CCUCON2_BASIC_(pllFreq)
1287
1288 #define IFXSCU_CFG_CCUCON2 IFXSCU_CFG_CCUCON2_BASIC(IFXSCU_CFG_PLL_FREQ)
1289
1290 /** \brief Macros to configure CCUCON5 Clock distribution */
1291 #define IFXSCU_CFG_CCUCON5_MASK \
1292 ( \
1293 (IFX_SCU_CCUCON5_MAXDIV_MSK << IFX_SCU_CCUCON5_MAXDIV_OFF))
1294
1295 #define IFXSCU_CFG_CCUCON5_BASIC_(pllFreq) \
1296 (uint32)( \
1297 (IFXSCU_CFG_MAXDIV_##pllFreq << IFX_SCU_CCUCON5_MAXDIV_OFF))
1298
1299 #define IFXSCU_CFG_CCUCON5_BASIC(pllFreq) IFXSCU_CFG_CCUCON5_BASIC_(pllFreq)
1300
1301 #define IFXSCU_CFG_CCUCON5 IFXSCU_CFG_CCUCON5_BASIC(IFXSCU_CFG_PLL_FREQ)
1302
1303 /** \brief Macros to configure CCUCON6 Clock distribution */
1304 #define IFXSCU_CFG_CCUCON6_MASK \
1305 ( \
1306 (IFX_SCU_CCUCON6_CPU0DIV_MSK << IFX_SCU_CCUCON6_CPU0DIV_OFF))
1307
1308 #define IFXSCU_CFG_CCUCON6_BASIC_(pllFreq) \
1309 (uint32)( \
1310 (IFXSCU_CFG_CPU0DIV_##pllFreq << IFX_SCU_CCUCON6_CPU0DIV_OFF))
1311
1312 #define IFXSCU_CFG_CCUCON6_BASIC(pllFreq) IFXSCU_CFG_CCUCON6_BASIC_(pllFreq)
1313
1314 #define IFXSCU_CFG_CCUCON6 IFXSCU_CFG_CCUCON6_BASIC(IFXSCU_CFG_PLL_FREQ)
1315
1316 /** \brief Macros to configure CCUCON7 Clock distribution */
1317 #define IFXSCU_CFG_CCUCON7_MASK \
1318 ( \
1319 (IFX_SCU_CCUCON7_CPU1DIV_MSK << IFX_SCU_CCUCON7_CPU1DIV_OFF))
1320
1321 #define IFXSCU_CFG_CCUCON7_BASIC_(pllFreq) \
1322 (uint32)( \
1323 (IFXSCU_CFG_CPU1DIV_##pllFreq << IFX_SCU_CCUCON7_CPU1DIV_OFF))
1324
1325 #define IFXSCU_CFG_CCUCON7_BASIC(pllFreq) IFXSCU_CFG_CCUCON7_BASIC_(pllFreq)
1326
1327 #define IFXSCU_CFG_CCUCON7 IFXSCU_CFG_CCUCON7_BASIC(IFXSCU_CFG_PLL_FREQ)
1328
1329 #define IFXSCU_CFG_CLK_DISTRIBUTION \
1330 { \
1331 /* { uint32 value, uint32 mask }*/ \
1332 {IFXSCU_CFG_CCUCON0, IFXSCU_CFG_CCUCON0_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon0;*/ \
1333 {IFXSCU_CFG_CCUCON1, IFXSCU_CFG_CCUCON1_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon1;*/ \
1334 {IFXSCU_CFG_CCUCON2, IFXSCU_CFG_CCUCON2_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon2;*/ \
1335 {IFXSCU_CFG_CCUCON5, IFXSCU_CFG_CCUCON5_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon5;*/ \
1336 {IFXSCU_CFG_CCUCON6, IFXSCU_CFG_CCUCON6_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon6;*/ \
1337 {IFXSCU_CFG_CCUCON7, IFXSCU_CFG_CCUCON7_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon7;*/ \
1338 }
1339
1340 /*Utility macros for the configuration structure */
1341 /*macro for pll steps configuration */
1342 #define IFXSCU_CFG_PLL_STEPS_BASIC_(xtalFreq, pllFreq) IFXSCU_CFG_PLL_STEPS_##xtalFreq##_##pllFreq
1343 #define IFXSCU_CFG_PLL_STEPS_BASIC(xtalFreq, pllFreq) IFXSCU_CFG_PLL_STEPS_BASIC_(xtalFreq, pllFreq)
1344 #define IFXSCU_CFG_PLL_STEPS IFXSCU_CFG_PLL_STEPS_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)
1345
1346 /*macro for pll initial step configuration */
1347 #define IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_(xtalFreq, pllFreq) IFXSCU_CFG_PLL_INITIAL_STEP_##xtalFreq##_##pllFreq
1348 #define IFXSCU_CFG_PLL_INITIAL_STEP_BASIC(xtalFreq, pllFreq) IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_(xtalFreq, pllFreq)
1349 #define IFXSCU_CFG_PLL_INITIAL_STEP IFXSCU_CFG_PLL_INITIAL_STEP_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)
1350
1351 #define IFXSCU_CFG_FLASH_WAITSTATE \
1352 /* { uint32 value, uint32 mask }*/\
1353 {IFXSCU_CFG_FLASH_WAITSTATE_VAL, IFXSCU_CFG_FLASH_WAITSTATE_MSK}
1354
1355 #if (IFX_CFG_SCU_XTAL_FREQUENCY == (20000000))
1356 #define IFXSCU_CFG_XTAL_FREQ 20MHZ
1357 #elif (IFX_CFG_SCU_XTAL_FREQUENCY == (40000000))
1358 #define IFXSCU_CFG_XTAL_FREQ 40MHZ
1359 #elif (IFX_CFG_SCU_XTAL_FREQUENCY == (16000000))
1360 #define IFXSCU_CFG_XTAL_FREQ 16MHZ
1361 #elif (IFX_CFG_SCU_XTAL_FREQUENCY == (8000000))
1362 #define IFXSCU_CFG_XTAL_FREQ 8MHZ
1363 #else
1364 #error "Wrong XTAL frequency configuration! check IFX_CFG_SCU_XTAL_FREQUENCY configuration in Ifx_Cfg.h."
1365 #error "Aurix Triboard supported crystal frequencies are 8MHz, 16MHz, 20MHz and 40MHz"
1366 #endif
1367
1368 #if (IFX_CFG_SCU_PLL_FREQUENCY == (80000000))
1369 #define IFXSCU_CFG_PLL_FREQ 80MHZ
1370 #elif (IFX_CFG_SCU_PLL_FREQUENCY == (133000000)) && (IFX_CFG_SCU_XTAL_FREQUENCY != (8000000))
1371 #define IFXSCU_CFG_PLL_FREQ 133MHZ
1372 #elif (IFX_CFG_SCU_PLL_FREQUENCY == (160000000))
1373 #define IFXSCU_CFG_PLL_FREQ 160MHZ
1374 #elif (IFX_CFG_SCU_PLL_FREQUENCY == (200000000))
1375 #define IFXSCU_CFG_PLL_FREQ 200MHZ
1376 #else
1377 #error "Wrong PLL frequency configuration!, check IFX_CFG_SCU_PLL_FREQUENCY configuration in Ifx_Cfg.h."
1378 #error "Supported PLL frequencies are 80MHz, 133MHz (8MHz XTAL doesn't support), 160Mhz, and 200MHz."
1379 #endif
1380
1381 /******************************************************************************/
1382 /* Enum */
1383 /******************************************************************************/
1384 /** Clock selection */
1385 typedef enum
1386 {
1387 IfxScu_CCUCON0_CLKSEL_fBack = 0,
1388 IfxScu_CCUCON0_CLKSEL_fPll = 1
1389 } IfxScu_CCUCON0_CLKSEL;
1390
1391 /** Input selection for PLL and PLL ERAY */
1392 typedef enum
1393 {
1394 IfxScu_CCUCON1_INSEL_fOsc1 = 0,
1395 IfxScu_CCUCON1_INSEL_fOsc0 = 1
1396 } IfxScu_CCUCON1_INSEL;
1397
1398 /** Input frequency request control */
1399 typedef enum
1400 {
1401 IfxScu_WDTCON1_IR_divBy16384 = 0,
1402 IfxScu_WDTCON1_IR_divBy256 = 1,
1403 IfxScu_WDTCON1_IR_divBy64 = 2
1404 } IfxScu_WDTCON1_IR;
1405
1406 typedef enum
1407 {
1408 IfxScu_PMCSR_REQSLP_Run = 0U, /* 00 Request CPU Run Mode */
1409 IfxScu_PMCSR_REQSLP_Idle = 1U, /* 01 Request CPU Idle Mode */
1410 IfxScu_PMCSR_REQSLP_Sleep = 2U, /* 10 Request CPU System Sleep Mode */
1411 IfxScu_PMCSR_REQSLP_Stby = 3U /* 11 Request System Standby Mode */
1412 } IfxScu_PMCSR_REQSLP;
1413
1414 /******************************************************************************/
1415
1416 #endif /* IFXSCU_CFG_H */
IfxScu_CCUCON1_INSEL
IfxScu_CCUCON1_INSEL
Definition: IfxScu_cfg.h:1392
IfxScu_PMCSR_REQSLP_Idle
Definition: IfxScu_cfg.h:1409
IfxScu_CCUCON0_CLKSEL_fPll
Definition: IfxScu_cfg.h:1388
IfxScu_WDTCON1_IR_divBy256
Definition: IfxScu_cfg.h:1402
IfxScu_WDTCON1_IR
IfxScu_WDTCON1_IR
Definition: IfxScu_cfg.h:1399
IfxScu_CCUCON1_INSEL_fOsc0
Definition: IfxScu_cfg.h:1395
IfxScu_PMCSR_REQSLP
IfxScu_PMCSR_REQSLP
Definition: IfxScu_cfg.h:1406
IfxScu_PMCSR_REQSLP_Run
Definition: IfxScu_cfg.h:1408
IfxScu_CCUCON0_CLKSEL
IfxScu_CCUCON0_CLKSEL
Definition: IfxScu_cfg.h:1385
IfxScu_PMCSR_REQSLP_Stby
Definition: IfxScu_cfg.h:1411
IfxScu_CCUCON0_CLKSEL_fBack
Definition: IfxScu_cfg.h:1387
IfxScu_PMCSR_REQSLP_Sleep
Definition: IfxScu_cfg.h:1410
IfxScu_WDTCON1_IR_divBy64
Definition: IfxScu_cfg.h:1403
IfxScu_CCUCON1_INSEL_fOsc1
Definition: IfxScu_cfg.h:1394
IfxScu_WDTCON1_IR_divBy16384
Definition: IfxScu_cfg.h:1401


iLLD_TC26B: IfxScuCcu.c Source File

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IfxScuCcu.c
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1 /**
2 * \file IfxScuCcu.c
3 * \brief SCU basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxScuCcu.h"
48
49 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu
50 * \{ */
51
52 /******************************************************************************/
53 /*-----------------------Private Function Prototypes--------------------------*/
54 /******************************************************************************/
55
56 /** \brief Check if oscillator is stable.
57 * \return Status of oscillator stability
58 * \retval TRUE: Oscillator is unstable
59 * \retval FALSE: Oscillator is stable
60 */
61 IFX_STATIC boolean IfxScuCcu_isOscillatorStable(void);
62
63 /** \brief API to wait for requested duration.
64 * Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled
65 * \return None
66 */
67 IFX_STATIC void IfxScuCcu_wait(float32 timeSec);
68
69 /** \} */
70
71 /******************************************************************************/
72 /*------------------------Private Variables/Constants-------------------------*/
73 /******************************************************************************/
74
75 /** \brief Default configuration for the PLL initial steps
76 * This is a structure array and the values are defined at the Scu implementation as a macro
77 */
78 IFX_STATIC IFX_CONST IfxScuCcu_PllStepsConfig IfxScuCcu_aDefaultPllConfigSteps[] = {
79 IFXSCU_CFG_PLL_STEPS
80 };
81
82 /** \brief Crystal Frequency
83 */
84 IFX_STATIC uint32 IfxScuCcu_xtalFrequency = IFX_CFG_SCU_XTAL_FREQUENCY;
85
86 /******************************************************************************/
87 /*-----------------------Exported Variables/Constants-------------------------*/
88 /******************************************************************************/
89
90 IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig = {
91 {
92 sizeof(IfxScuCcu_aDefaultPllConfigSteps) / sizeof(IfxScuCcu_PllStepsConfig),
93 (IfxScuCcu_PllStepsConfig *)IfxScuCcu_aDefaultPllConfigSteps,
94 IFXSCU_CFG_PLL_INITIAL_STEP,
95 },
96 IFXSCU_CFG_CLK_DISTRIBUTION,
97 IFXSCU_CFG_FLASH_WAITSTATE,
98 IFX_CFG_SCU_XTAL_FREQUENCY,
99 };
100
101 IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig = {
102 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/
103 {(1 - 1), (24 - 1), (6 - 1), 0}
104 };
105
106 /******************************************************************************/
107 /*-------------------------Function Implementations---------------------------*/
108 /******************************************************************************/
109
110 boolean IfxScuCcu_calculateSysPllDividers(IfxScuCcu_Config *cfg, uint32 fPll)
111 {
112 boolean retVal = 0;
113 uint8 deviationAllowed = 2;
114 uint32 fOsc = cfg->xtalFrequency;
115
116 // Dynamic PLL calculation Alg
117 /*
118 *
119 * fPLL = (N /( P * K2)) * fOSC
120 * */
121 {
122 const uint32 fPllMax = 200000000;
123 const uint32 fRefMax = 24000000;
124 const uint32 fRefMin = 8000000;
125 const uint32 fVcoMin = 400000000;
126 const uint32 fVcoMax = 800000000;
127 const uint8 pMin = 1;
128 const uint8 pMax = 16; // '4 bits
129 const uint8 k2Min = 1;
130 const uint8 k2Max = 128; // '7bits
131 const uint8 nMin = 1;
132 const uint8 nMax = 128; // '7bits
133
134 uint32 p;
135 uint32 n;
136 uint32 k2;
137 uint32 k2Steps;
138 uint32 bestK2 = 0, bestN = 0, bestP = 0;
139
140 uint64 fRef, fVco;
141 uint64 fPllLeastError;
142
143 fPllLeastError = fPllMax;
144
145 //' K2+1 div should be even for 50% duty cycle
146 k2Steps = 2;
147
148 if (fPll > 240000000)
149 {
150 k2Steps = 1;
151 }
152
153 for (p = pMax; p >= pMin; p--)
154 {
155 fRef = (fOsc / p);
156
157 if ((fRef >= fRefMin) && (fRef <= fRefMax))
158 {
159 for (k2 = k2Min; k2 <= k2Max; k2 += k2Steps)
160 {
161 fVco = ((uint64)fPll) * k2;
162
163 if ((fVco >= fVcoMin) && (fVco <= fVcoMax))
164 {
165 for (n = nMin; n <= nMax; n++)
166 {
167 uint64 fPllError;
168 fPllError = ((((n) / (p * k2)) * fOsc) - fPll);
169
170 if (fPllError == 0)
171 {
172 fPllLeastError = fPllError;
173 bestK2 = k2;
174 bestN = n;
175 bestP = p;
176
177 goto EXITCALC_LOOP;
178 }
179
180 if (fPllLeastError > fPllError)
181 {
182 fPllLeastError = fPllError;
183 bestK2 = k2;
184 bestN = n;
185 bestP = p;
186 }
187 }
188 }
189 }
190 }
191 }
192
193 EXITCALC_LOOP:
194
195 if ((fPllLeastError) < ((fPll * deviationAllowed) / 100)) // percent ALLOWED_DEVIATION error allowed
196 {
197 cfg->sysPll.pllInitialStep.nDivider = (uint8)(bestN - 1);
198 cfg->sysPll.pllInitialStep.pDivider = (uint8)(bestP - 1);
199 cfg->sysPll.pllInitialStep.k2Initial = (uint8)(bestK2 - 1);
200 cfg->sysPll.pllInitialStep.waitTime = 0; // wait time = 0
201 cfg->sysPll.numOfPllDividerSteps = 0; // no step clock incr
202 }
203 else
204 {
205 retVal = 1;
206 }
207 }
208 return retVal;
209 }
210
211
212 float32 IfxScuCcu_getBaud1Frequency(void)
213 {
214 float32 frequency;
215 Ifx_SCU_CCUCON0 ccucon0 = SCU_CCUCON0;
216
217 if (ccucon0.B.BAUD1DIV == 0)
218 {
219 frequency = 0;
220 }
221 else
222 {
223 frequency = IfxScuCcu_getMaxFrequency() / ccucon0.B.BAUD1DIV;
224 }
225
226 return frequency;
227 }
228
229
230 float32 IfxScuCcu_getBaud2Frequency(void)
231 {
232 float32 frequency;
233 Ifx_SCU_CCUCON0 ccucon0 = SCU_CCUCON0;
234
235 if (ccucon0.B.BAUD2DIV == 0)
236 {
237 frequency = 0;
238 }
239 else
240 {
241 frequency = IfxScuCcu_getMaxFrequency() / ccucon0.B.BAUD2DIV;
242 }
243
244 return frequency;
245 }
246
247
248 float32 IfxScuCcu_getBbbFrequency(void)
249 {
250 float32 bbbFrequency;
251 float32 sourceFrequency;
252
253 sourceFrequency = IfxScuCcu_getSourceFrequency();
254
255 switch (SCU_CCUCON0.B.LPDIV)
256 {
257 case 0: /*Not in low power mode */
258
259 if (SCU_CCUCON2.B.BBBDIV == 0)
260 {
261 bbbFrequency = 0.0;
262 }
263 else
264 {
265 bbbFrequency = sourceFrequency / SCU_CCUCON2.B.BBBDIV;
266 }
267
268 break;
269 case 1:
270 bbbFrequency = sourceFrequency / 30;
271 break;
272 case 2:
273 bbbFrequency = sourceFrequency / 60;
274 break;
275 case 3:
276 bbbFrequency = sourceFrequency / 120;
277 break;
278 case 4:
279 bbbFrequency = sourceFrequency / 240;
280 break;
281 default:
282 bbbFrequency = 0.0;
283 break;
284 }
285
286 return bbbFrequency;
287 }
288
289
290 float32 IfxScuCcu_getCpuFrequency(const IfxCpu_ResourceCpu cpu)
291 {
292 float32 frequency = IfxScuCcu_getSriFrequency();
293 uint32 cpuDiv = 0;
294
295 switch (cpu)
296 {
297 case IfxCpu_ResourceCpu_0:
298 cpuDiv = SCU_CCUCON6.U;
299 break;
300 case IfxCpu_ResourceCpu_1:
301 cpuDiv = SCU_CCUCON7.U;
302 break;
303 default:
304 frequency = 0.0;
305 break;
306 }
307
308 if (cpuDiv != 0)
309 {
310 frequency = frequency * (cpuDiv / 64.0f);
311 }
312
313 return frequency;
314 }
315
316
317 float32 IfxScuCcu_getFsi2Frequency(void)
318 {
319 float32 frequency;
320 Ifx_SCU_CCUCON0 ccucon0 = SCU_CCUCON0;
321
322 if (ccucon0.B.FSI2DIV == 0)
323 {
324 frequency = 0;
325 }
326 else
327 {
328 frequency = IfxScuCcu_getSriFrequency();
329
330 if ((ccucon0.B.SRIDIV == 1) || (ccucon0.B.SRIDIV == 2))
331 {
332 frequency = frequency / ccucon0.B.FSI2DIV;
333 }
334 }
335
336 return frequency;
337 }
338
339
340 float32 IfxScuCcu_getFsiFrequency(void)
341 {
342 float32 frequency;
343 Ifx_SCU_CCUCON0 ccucon0 = SCU_CCUCON0;
344
345 if (ccucon0.B.FSIDIV == 0)
346 {
347 frequency = 0;
348 }
349 else
350 {
351 frequency = IfxScuCcu_getSriFrequency();
352
353 if ((ccucon0.B.SRIDIV == 1) || (ccucon0.B.SRIDIV == 2))
354 {
355 frequency = frequency / ccucon0.B.FSIDIV;
356 }
357 }
358
359 return frequency;
360 }
361
362
363 float32 IfxScuCcu_getMaxFrequency(void)
364 {
365 float32 maxFrequency;
366 float32 sourceFrequency;
367 sourceFrequency = IfxScuCcu_getSourceFrequency();
368
369 switch (SCU_CCUCON0.B.LPDIV)
370 {
371 case 0: /*Not in low power mode */
372
373 if (SCU_CCUCON5.B.MAXDIV == 0)
374 {
375 maxFrequency = sourceFrequency;
376 }
377 else
378 {
379 maxFrequency = sourceFrequency / SCU_CCUCON5.B.MAXDIV;
380 }
381
382 break;
383 case 1:
384 maxFrequency = sourceFrequency / 15;
385 break;
386 case 2:
387 maxFrequency = sourceFrequency / 30;
388 break;
389 case 3:
390 maxFrequency = sourceFrequency / 60;
391 break;
392 case 4:
393 maxFrequency = sourceFrequency / 120;
394 break;
395 default:
396 maxFrequency = 0.0;
397 break;
398 }
399
400 return maxFrequency;
401 }
402
403
404 float32 IfxScuCcu_getModuleFrequency(void)
405 {
406 float32 spbFreq;
407 float32 moduleFreq;
408 Ifx_SCU_FDR scuFdr;
409 scuFdr = SCU_FDR;
410 spbFreq = IfxScuCcu_getSpbFrequency();
411
412 if (scuFdr.B.DM == 1)
413 {
414 moduleFreq = spbFreq / (1024 - scuFdr.B.STEP);
415 }
416 else if (scuFdr.B.DM == 2)
417 {
418 moduleFreq = (spbFreq * scuFdr.B.STEP) / 1024;
419 }
420 else
421 {
422 moduleFreq = 0;
423 }
424
425 return moduleFreq;
426 }
427
428
429 float32 IfxScuCcu_getOsc0Frequency(void)
430 {
431 return (float32)IfxScuCcu_xtalFrequency;
432 }
433
434
435 float32 IfxScuCcu_getOscFrequency(void)
436 {
437 float32 freq;
438
439 if (SCU_CCUCON1.B.INSEL == IfxScu_CCUCON1_INSEL_fOsc1)
440 {
441 freq = IFXSCU_EVR_OSC_FREQUENCY;
442 }
443 else if (SCU_CCUCON1.B.INSEL == IfxScu_CCUCON1_INSEL_fOsc0)
444 {
445 freq = (float32)IfxScuCcu_xtalFrequency;
446 }
447 else
448 {
449 /* Reserved values, this */
450 freq = 0.0;
451 }
452
453 return freq;
454 }
455
456
457 float32 IfxScuCcu_getPllErayFrequency(void)
458 {
459 Ifx_SCU *scu = &MODULE_SCU;
460 float32 oscFreq;
461 float32 freq;
462
463 oscFreq = IfxScuCcu_getOscFrequency();
464
465 if (scu->PLLERAYSTAT.B.VCOBYST == 1)
466 {
467 /* Prescaler mode */
468 freq = oscFreq / (scu->PLLERAYCON1.B.K1DIV + 1);
469 }
470 else if (scu->PLLERAYSTAT.B.FINDIS == 1)
471 {
472 /* Free running mode */
473 freq = IFXSCU_VCO_BASE_FREQUENCY / (scu->PLLERAYCON1.B.K2DIV + 1);
474 }
475 else
476 {
477 /* Normal mode */
478 freq = (oscFreq * (scu->PLLERAYCON0.B.NDIV + 1)) / (scu->PLLERAYCON1.B.K2DIV + 1);
479 }
480
481 return freq;
482 }
483
484
485 float32 IfxScuCcu_getPllErayVcoFrequency(void)
486 {
487 float32 vcoFreq;
488
489 if (SCU_PLLERAYSTAT.B.FINDIS == 1)
490 {
491 /* Free running mode */
492 vcoFreq = IFXSCU_VCO_BASE_FREQUENCY;
493 }
494 else
495 {
496 /* Normal mode */
497 vcoFreq = (IfxScuCcu_getOscFrequency() * (SCU_PLLERAYCON0.B.NDIV + 1)) / (SCU_PLLERAYCON0.B.PDIV + 1);
498 }
499
500 return vcoFreq;
501 }
502
503
504 float32 IfxScuCcu_getPllFrequency(void)
505 {
506 Ifx_SCU *scu = &MODULE_SCU;
507 float32 oscFreq;
508 float32 freq;
509
510 oscFreq = IfxScuCcu_getOscFrequency();
511
512 if (scu->PLLSTAT.B.VCOBYST == 1)
513 {
514 /* Prescaler mode */
515 freq = oscFreq / (scu->PLLCON1.B.K1DIV + 1);
516 }
517 else if (scu->PLLSTAT.B.FINDIS == 1)
518 {
519 /* Free running mode */
520 freq = IFXSCU_VCO_BASE_FREQUENCY / (scu->PLLCON1.B.K2DIV + 1);
521 }
522 else
523 {
524 /* Normal mode */
525 freq = (oscFreq * (scu->PLLCON0.B.NDIV + 1)) / ((scu->PLLCON1.B.K2DIV + 1) * (scu->PLLCON0.B.PDIV + 1));
526 }
527
528 return freq;
529 }
530
531
532 float32 IfxScuCcu_getPllVcoFrequency(void)
533 {
534 float32 vcoFreq;
535
536 if (SCU_PLLSTAT.B.FINDIS == 1)
537 {
538 /* Free running mode */
539 vcoFreq = IFXSCU_VCO_BASE_FREQUENCY;
540 }
541 else
542 {
543 /* Normal mode */
544 vcoFreq = (IfxScuCcu_getOscFrequency() * (SCU_PLLCON0.B.NDIV + 1)) / (SCU_PLLCON0.B.PDIV + 1);
545 }
546
547 return vcoFreq;
548 }
549
550
551 float32 IfxScuCcu_getSourceFrequency(void)
552 {
553 float32 sourcefreq;
554
555 switch (SCU_CCUCON0.B.CLKSEL)
556 {
557 case IfxScu_CCUCON0_CLKSEL_fBack:
558 sourcefreq = IfxScuCcu_getEvrFrequency();
559 break;
560 case IfxScu_CCUCON0_CLKSEL_fPll:
561 sourcefreq = IfxScuCcu_getPllFrequency();
562 break;
563 default:
564 sourcefreq = 0;
565 break;
566 }
567
568 return sourcefreq;
569 }
570
571
572 float32 IfxScuCcu_getSpbFrequency(void)
573 {
574 float32 spbFrequency;
575 float32 sourceFrequency;
576
577 sourceFrequency = IfxScuCcu_getSourceFrequency();
578
579 switch (SCU_CCUCON0.B.LPDIV)
580 {
581 case 0: /*Not in low power mode */
582
583 if (SCU_CCUCON0.B.SPBDIV == 0)
584 {
585 spbFrequency = 0.0;
586 }
587 else
588 {
589 spbFrequency = sourceFrequency / SCU_CCUCON0.B.SPBDIV;
590 }
591
592 break;
593 case 1:
594 spbFrequency = sourceFrequency / 30;
595 break;
596 case 2:
597 spbFrequency = sourceFrequency / 60;
598 break;
599 case 3:
600 spbFrequency = sourceFrequency / 120;
601 break;
602 case 4:
603 spbFrequency = sourceFrequency / 240;
604 break;
605 default:
606 spbFrequency = 0.0;
607 break;
608 }
609
610 return spbFrequency;
611 }
612
613
614 float32 IfxScuCcu_getSriFrequency(void)
615 {
616 float32 sriFrequency;
617 float32 sourceFrequency;
618
619 sourceFrequency = IfxScuCcu_getSourceFrequency();
620
621 switch (SCU_CCUCON0.B.LPDIV)
622 {
623 case 0: /*Not in low power mode */
624
625 if (SCU_CCUCON0.B.SRIDIV == 0)
626 {
627 sriFrequency = 0.0;
628 }
629 else
630 {
631 sriFrequency = sourceFrequency / SCU_CCUCON0.B.SRIDIV;
632 }
633
634 break;
635 case 1:
636 sriFrequency = sourceFrequency / 30;
637 break;
638 case 2:
639 sriFrequency = sourceFrequency / 60;
640 break;
641 case 3:
642 sriFrequency = sourceFrequency / 120;
643 break;
644 case 4:
645 sriFrequency = sourceFrequency / 240;
646 break;
647 default:
648 sriFrequency = 0.0;
649 break;
650 }
651
652 return sriFrequency;
653 }
654
655
656 boolean IfxScuCcu_init(const IfxScuCcu_Config *cfg)
657 {
658 uint8 smuTrapEnable;
659 uint16 endinit_pw, endinitSfty_pw;
660 boolean status = 0;
661 /* Store the crystal frequency */
662 IfxScuCcu_xtalFrequency = cfg->xtalFrequency;
663
664 endinit_pw = IfxScuWdt_getCpuWatchdogPassword();
665 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
666
667 {
668 /* Disable TRAP for SMU (oscillator watchdog and unlock detection) */
669 IfxScuWdt_clearCpuEndinit(endinit_pw);
670 smuTrapEnable = SCU_TRAPDIS.B.SMUT;
671 SCU_TRAPDIS.B.SMUT = 1U;
672 IfxScuWdt_setCpuEndinit(endinit_pw);
673 }
674
675 {
676 /* Select fback (fosc-evr) as CCU input clock */
677 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
678
679 while (SCU_CCUCON0.B.LCK != 0U)
680 {
681 /*Wait till ccucon0 lock is set */
682 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
683 }
684
685 SCU_CCUCON0.B.CLKSEL = 0; /*Select the EVR as fOSC for the clock distribution */
686 SCU_CCUCON0.B.UP = 1; /*Update the ccucon0 register */
687
688 /* Disconnet PLL (SETFINDIS=1): oscillator clock is disconnected from PLL */
689 SCU_PLLCON0.B.SETFINDIS = 1;
690 /* Now PLL is in free running mode */
691
692 /* Select Clock Source as PLL input clock */
693 while (SCU_CCUCON0.B.LCK != 0U)
694 {
695 /*Wait till ccucon0 lock is set */
696 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
697 }
698
699 SCU_CCUCON1.B.INSEL = 1; /*Select oscillator OSC0 as clock to PLL */
700 SCU_CCUCON1.B.UP = 1; /*Update the ccucon0 register */
701
702 status |= IfxScuCcu_isOscillatorStable();
703
704 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
705 }
706
707 if (status == 0)
708 {
709 /*Start the PLL configuration sequence */
710 uint8 pllStepsCount;
711
712 /*Setting up P N and K2 values equate pll to evr osc freq */
713 {
714 {
715 /*Set the K2 divider value for the step corresponding to step count */
716 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
717
718 while (SCU_PLLSTAT.B.K2RDY == 0U)
719 {
720 /*Wait until K2 divider is ready */
721 /*No "timeout" required because Safety Endinit will give a trap */
722 }
723
724 SCU_PLLCON1.B.K2DIV = cfg->sysPll.pllInitialStep.k2Initial;
725
726 {
727 /*change P and N divider values */
728 SCU_PLLCON0.B.PDIV = cfg->sysPll.pllInitialStep.pDivider;
729 SCU_PLLCON0.B.NDIV = cfg->sysPll.pllInitialStep.nDivider;
730
731 /* Disable oscillator disconnect feature
732 * in case of PLL unlock, PLL stays connected to fref */
733 SCU_PLLCON0.B.OSCDISCDIS = 1;
734 // workaround for Errata: PLL TC 005
735 SCU_PLLCON0.B.PLLPWD = 0; // set PLL to power down
736 /* Connect PLL to fREF as oscillator clock is connected to PLL */
737 SCU_PLLCON0.B.CLRFINDIS = 1;
738 SCU_PLLCON0.B.PLLPWD = 1; // set PLL to normal
739
740 /* Restart PLL lock detection (RESLD = 1) */
741 SCU_PLLCON0.B.RESLD = 1;
742
743 IfxScuCcu_wait(0.000050F); /*Wait for 50us */
744
745 while (SCU_PLLSTAT.B.VCOLOCK == 0U)
746 {
747 /* Wait for PLL lock */
748 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
749 }
750
751 SCU_PLLCON0.B.VCOBYP = 0; /*VCO bypass disabled */
752
753 while (SCU_CCUCON0.B.LCK != 0U)
754 {
755 /*Wait till ccucon registers can be written with new value */
756 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
757 }
758
759 SCU_CCUCON0.B.CLKSEL = 0x01;
760
761 /*Configure the clock distribution */
762 while (SCU_CCUCON0.B.LCK != 0U)
763 {
764 /*Wait till ccucon registers can be written with new value */
765 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
766 }
767
768 /*Wait until the initial clock configurations take in to effect for the PLL*/
769 IfxScuCcu_wait(cfg->sysPll.pllInitialStep.waitTime); /*Wait for configured initial time */
770
771 { /*Write CCUCON0 configuration */
772 Ifx_SCU_CCUCON0 ccucon0;
773 ccucon0.U = SCU_CCUCON0.U & ~cfg->clockDistribution.ccucon0.mask;
774 /*update with configured value */
775 ccucon0.U |= (cfg->clockDistribution.ccucon0.mask & cfg->clockDistribution.ccucon0.value);
776 ccucon0.B.CLKSEL = 0x01; /* Select fpll as CCU input clock, even if this was not selected by configuration */
777 ccucon0.B.UP = 1;
778 SCU_CCUCON0 = ccucon0; /*Set update bit explicitly to make above configurations effective */
779 }
780
781 while (SCU_CCUCON1.B.LCK != 0U)
782 {
783 /*Wait till ccucon registers can be written with new value */
784 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
785 }
786
787 {
788 /*Write CCUCON1 configuration */
789 Ifx_SCU_CCUCON1 ccucon1;
790 ccucon1.U = SCU_CCUCON1.U & ~cfg->clockDistribution.ccucon1.mask;
791 /*update with configured value */
792 ccucon1.U |= (cfg->clockDistribution.ccucon1.mask & cfg->clockDistribution.ccucon1.value);
793 ccucon1.B.INSEL = 1;
794 ccucon1.B.UP = 1;
795 SCU_CCUCON1 = ccucon1;
796 }
797
798 while (SCU_CCUCON2.B.LCK != 0U)
799 {
800 /*Wait till ccucon registers can be written with new value */
801 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
802 }
803
804 {
805 /*Write CCUCON2 configuration */
806 Ifx_SCU_CCUCON2 ccucon2;
807 ccucon2.U = SCU_CCUCON2.U & ~cfg->clockDistribution.ccucon2.mask;
808 /*update with configured value */
809 ccucon2.U |= (cfg->clockDistribution.ccucon2.mask & cfg->clockDistribution.ccucon2.value);
810 ccucon2.B.UP = 1;
811 SCU_CCUCON2 = ccucon2;
812 }
813
814 while (SCU_CCUCON5.B.LCK != 0U)
815 { /*Wait till ccucon registers can be written with new value */
816 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
817 }
818
819 { /*Write CCUCON5 configuration */
820 Ifx_SCU_CCUCON5 ccucon5;
821 ccucon5.U = SCU_CCUCON5.U & ~cfg->clockDistribution.ccucon5.mask;
822 /*update with configured value */
823 ccucon5.U |= (cfg->clockDistribution.ccucon5.mask & cfg->clockDistribution.ccucon5.value);
824 ccucon5.B.UP = 1;
825 SCU_CCUCON5 = ccucon5;
826 }
827
828 { /*Write CCUCON6 configuration */
829 Ifx_SCU_CCUCON6 ccucon6;
830 ccucon6.U = SCU_CCUCON6.U & ~cfg->clockDistribution.ccucon6.mask;
831 /*update with configured value */
832 ccucon6.U |= (cfg->clockDistribution.ccucon6.mask & cfg->clockDistribution.ccucon6.value);
833 SCU_CCUCON6 = ccucon6;
834 }
835
836 {
837 /*Write CCUCON7 configuration */
838 Ifx_SCU_CCUCON7 ccucon7;
839 ccucon7.U = SCU_CCUCON7.U & ~cfg->clockDistribution.ccucon7.mask;
840 /*update with configured value */
841 ccucon7.U |= (cfg->clockDistribution.ccucon7.mask & cfg->clockDistribution.ccucon7.value);
842 SCU_CCUCON7 = ccucon7;
843 }
844 }
845
846 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
847 }
848 }
849
850 { /*Write Flash waitstate configuration */
851 Ifx_FLASH_FCON fcon;
852 fcon.U = FLASH0_FCON.U & ~cfg->flashFconWaitStateConfig.mask;
853
854 /*update with configured value */
855 fcon.U &= ~cfg->flashFconWaitStateConfig.mask;
856 fcon.U |= (cfg->flashFconWaitStateConfig.mask & cfg->flashFconWaitStateConfig.value);
857 {
858 IfxScuWdt_clearCpuEndinit(endinit_pw);
859 FLASH0_FCON = fcon;
860 IfxScuWdt_setCpuEndinit(endinit_pw);
861 }
862 }
863
864 /*Start Pll ramp up sequence */
865 for (pllStepsCount = 0; pllStepsCount < cfg->sysPll.numOfPllDividerSteps; pllStepsCount++)
866 { /*iterate through number of pll steps */
867 {
868 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
869
870 /*Configure K2 divider */
871 while (SCU_PLLSTAT.B.K2RDY == 0U)
872 {
873 /*Wait until K2 divider is ready */
874 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
875 }
876
877 /*Now set the K2 divider value for the step corresponding to step count */
878 SCU_PLLCON1.B.K2DIV = cfg->sysPll.pllDividerStep[pllStepsCount].k2Step;
879 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
880 }
881
882 /*call the hook function if configured */
883 if (cfg->sysPll.pllDividerStep[pllStepsCount].hookFunction != (IfxScuCcu_PllStepsFunctionHook)0)
884 {
885 cfg->sysPll.pllDividerStep[pllStepsCount].hookFunction();
886 }
887
888 /*Wait for waitCounter corresponding to the pll step */
889 IfxScuCcu_wait(cfg->sysPll.pllDividerStep[pllStepsCount].waitTime);
890 }
891 }
892
893 { /* Enable oscillator disconnect feature */
894 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
895 SCU_PLLCON0.B.OSCDISCDIS = 0U;
896 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
897 }
898 {
899 /* Enable VCO unlock Trap if it was disabled before */
900 IfxScuWdt_clearCpuEndinit(endinit_pw);
901 SCU_TRAPCLR.B.SMUT = 1U;
902 SCU_TRAPDIS.B.SMUT = smuTrapEnable;
903 IfxScuWdt_setCpuEndinit(endinit_pw);
904 }
905 return status;
906 }
907
908
909 void IfxScuCcu_initConfig(IfxScuCcu_Config *cfg)
910 {
911 *cfg = IfxScuCcu_defaultClockConfig;
912 }
913
914
915 boolean IfxScuCcu_initErayPll(const IfxScuCcu_ErayPllConfig *cfg)
916 {
917 uint8 smuTrapEnable;
918 uint16 endinit_pw, endinitSfty_pw;
919 boolean status = 0;
920
921 endinit_pw = IfxScuWdt_getCpuWatchdogPassword();
922 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
923
924 { /* Disable TRAP for SMU (oscillator watchdog and unlock detection) */
925 IfxScuWdt_clearCpuEndinit(endinit_pw);
926 smuTrapEnable = SCU_TRAPDIS.B.SMUT;
927 SCU_TRAPDIS.B.SMUT = 1U;
928 IfxScuWdt_setCpuEndinit(endinit_pw);
929 }
930 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
931
932 // ensure that PLL enabled
933 if (!SCU_PLLERAYCON0.B.PLLPWD || SCU_PLLERAYCON0.B.VCOPWD || SCU_PLLERAYSTAT.B.PWDSTAT)
934 { // PLLPWD=0 or VCOPWD=1 or PWDSTAT=1?
935 // enable PLL and leave power saving mode
936 SCU_PLLERAYCON0.B.PLLPWD = 1;
937 SCU_PLLERAYCON0.B.VCOPWD = 0;
938
939 while (SCU_PLLERAYSTAT.B.PWDSTAT) // poll PWDSTAT
940 {}
941
942 /*Wait for waitCounter corresponding to the pll step */
943 IfxScuCcu_wait(cfg->pllInitialStep.waitTime);
944 }
945
946 /* Enter Prescalar mode */
947 /* Update K and N dividers */
948 if (!SCU_PLLERAYSTAT.B.VCOBYST) // checking PLLERAYBYPST flag
949 { // select "secure" K1 value - please check @silicon if K1=4 is ok
950 while (!SCU_PLLERAYSTAT.B.K1RDY) // poll K1RDY before changing K
951 {}
952
953 SCU_PLLERAYCON1.B.K1DIV = 3;
954
955 // activate VCO bypass (bit 0: VCOBYP=1)
956 SCU_PLLERAYCON0.B.VCOBYP = 1;
957 }
958
959 while (!SCU_PLLERAYSTAT.B.K2RDY) // poll K1RDY before changing K
960 {}
961
962 SCU_PLLERAYCON1.B.K2DIV = cfg->pllInitialStep.k2Initial;
963 SCU_PLLERAYCON0.B.PDIV = cfg->pllInitialStep.pDivider;
964 SCU_PLLERAYCON0.B.NDIV = cfg->pllInitialStep.nDivider;
965 /*
966 * RESLD = 1 ==> Restart VCO lock detection
967 * CLRFINDIS = 1 ==> Connect OSC to PLL
968 * PLLPWD = 1 ==> PLL Power Saving Mode : Normal behaviour
969 * NDIV = NDIV
970 */
971
972 SCU_PLLERAYCON0.B.RESLD = 1U;
973 SCU_PLLERAYCON0.B.CLRFINDIS = 1U;
974
975 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
976
977 // Wait until VCO LOCK bit is set
978 uint32 time_out_ctr = 50000; // higher time out value as for clib_pll, since system is clocked much faster while polling the lock flag
979
980 while (--time_out_ctr && !SCU_PLLERAYSTAT.B.VCOLOCK)
981 {}
982
983 // check for timeout, exit immediately (don't disable VCO bypass) of not locked
984 if (!time_out_ctr)
985 {
986 status = TRUE;
987 }
988
989 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
990 /*Bypass VCO*/
991 SCU_PLLERAYCON0.B.VCOBYP = 0U;
992
993 // wait until bypass has been deactivated
994 while (SCU_PLLERAYSTAT.B.VCOBYST) // poll VCOBYST
995 {}
996
997 if (!SCU_PLLERAYSTAT.B.VCOLOCK)
998 {
999 status = TRUE;
1000 }
1001
1002 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
1003
1004 { /* Enable VCO unlock Trap if it was disabled before */
1005 IfxScuWdt_clearCpuEndinit(endinit_pw);
1006 SCU_TRAPCLR.B.SMUT = 1U;
1007 SCU_TRAPDIS.B.SMUT = smuTrapEnable;
1008 IfxScuWdt_setCpuEndinit(endinit_pw);
1009 }
1010 return status;
1011 }
1012
1013
1014 void IfxScuCcu_initErayPllConfig(IfxScuCcu_ErayPllConfig *cfg)
1015 {
1016 *cfg = IfxScuCcu_defaultErayPllConfig;
1017 }
1018
1019
1020 IFX_STATIC boolean IfxScuCcu_isOscillatorStable(void)
1021 {
1022 sint32 TimeoutCtr = IFXSCUCCU_OSC_STABLECHK_TIME;
1023 boolean status = 0;
1024
1025 uint16 endinitPw = IfxScuWdt_getCpuWatchdogPassword();
1026
1027 /* Mode External Crystal / Ceramic Resonator Mode and External Input Clock.
1028 * The oscillator Power-Saving Mode is not entered
1029 */
1030 SCU_OSCCON.B.MODE = 0U;
1031
1032 /* OSCVAL defines the divider value that generates the reference clock
1033 * that is supervised by the oscillator watchdog.
1034 * fOSC / (OSCVAL + 1) ~ 2.5Mhz => OSCVAL = (fOSC / 2.5Mhz) - 1 */
1035
1036 SCU_OSCCON.B.OSCVAL = ((uint32)IfxScuCcu_xtalFrequency / 2500000) - 1;
1037
1038 /* The Oscillator Watchdog of the PLL is cleared and restarted */
1039 SCU_OSCCON.B.OSCRES = 1U;
1040
1041 /* wait until PLLLV and PLLHV flags are set */
1042 while ((SCU_OSCCON.B.PLLLV == 0) || (SCU_OSCCON.B.PLLHV == 0))
1043 {
1044 TimeoutCtr--;
1045
1046 if (TimeoutCtr == 0)
1047 {
1048 status = 1;
1049 break;
1050 }
1051 }
1052
1053 {
1054 /* clear and then set SMU trap (oscillator watchdog and unlock detection) */
1055 IfxScuWdt_clearCpuEndinit(endinitPw);
1056 SCU_TRAPCLR.B.SMUT = 1U; /* TODO Can this be removed? */
1057 SCU_TRAPDIS.B.SMUT = 1U; /* TODO Can this be removed? */
1058 IfxScuWdt_setCpuEndinit(endinitPw);
1059 }
1060
1061 return status;
1062 }
1063
1064
1065 float32 IfxScuCcu_setCpuFrequency(IfxCpu_ResourceCpu cpu, float32 cpuFreq)
1066 {
1067 uint16 endinitSfty_pw;
1068 float32 sriFreq;
1069 uint32 cpuDiv;
1070
1071 sriFreq = IfxScuCcu_getSriFrequency();
1072
1073 if (cpuFreq >= sriFreq)
1074 {
1075 cpuDiv = 0;
1076 }
1077 else
1078 {
1079 cpuDiv = (uint32)((cpuFreq * 64) / sriFreq);
1080 }
1081
1082 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
1083
1084 {
1085 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
1086
1087 switch (cpu)
1088 {
1089 case IfxCpu_ResourceCpu_0:
1090 SCU_CCUCON6.U = cpuDiv;
1091 break;
1092 case IfxCpu_ResourceCpu_1:
1093 SCU_CCUCON7.U = cpuDiv;
1094 break;
1095
1096 default:
1097 break;
1098 }
1099
1100 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
1101 }
1102
1103 if (cpuDiv != 0)
1104 {
1105 sriFreq = sriFreq * (cpuDiv / 64.0f);
1106 }
1107
1108 return sriFreq;
1109 }
1110
1111
1112 float32 IfxScuCcu_setGtmFrequency(float32 gtmFreq)
1113 {
1114 uint16 l_SEndInitPW;
1115 Ifx_SCU_CCUCON1 ccucon1 = SCU_CCUCON1;
1116
1117 float32 inputFreq = IfxScuCcu_getSourceFrequency();
1118 uint32 gtmDiv = (uint32)__roundf(inputFreq / gtmFreq);
1119 gtmDiv = __maxu(gtmDiv, 1);
1120
1121 /*gtmDiv = gtmDiv & 0x2U;*//* only even dividers */
1122 if ((gtmDiv >= 7) && (gtmDiv < 14) && ((gtmDiv & 1) == 1))
1123 {
1124 gtmDiv = gtmDiv - 1;
1125 }
1126
1127 if (gtmDiv == 14)
1128 {
1129 gtmDiv = 12;
1130 }
1131
1132 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
1133 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
1134
1135 while (SCU_CCUCON1.B.LCK != 0U)
1136 {}
1137
1138 ccucon1.B.GTMDIV = gtmDiv;
1139 ccucon1.B.UP = 1U;
1140 SCU_CCUCON1.U = ccucon1.U;
1141
1142 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
1143
1144 return IfxScuCcu_getGtmFrequency();
1145 }
1146
1147
1148 float32 IfxScuCcu_setPll2ErayFrequency(float32 pll2ErayFreq)
1149 {
1150 uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
1151 uint32 pll2Div = (uint32)((IfxScuCcu_getPllErayVcoFrequency() / pll2ErayFreq) - 1);
1152 {
1153 IfxScuWdt_clearSafetyEndinit(password);
1154 SCU_PLLERAYCON1.B.K3DIV = pll2Div;
1155 IfxScuWdt_setSafetyEndinit(password);
1156 }
1157 return IfxScuCcu_getPll2ErayFrequency();
1158 }
1159
1160
1161 float32 IfxScuCcu_setPll2Frequency(float32 pll2Freq)
1162 {
1163 uint16 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
1164 uint32 pll2Div = (uint32)((IfxScuCcu_getPllVcoFrequency() / pll2Freq) - 1);
1165 {
1166 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
1167 SCU_PLLCON1.B.K3DIV = pll2Div;
1168 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
1169 }
1170 return IfxScuCcu_getPll2Frequency();
1171 }
1172
1173
1174 float32 IfxScuCcu_setSpbFrequency(float32 spbFreq)
1175 {
1176 /* TODO: check whether it is necessary to disable trap and/or the safety */
1177 uint16 l_EndInitPW;
1178 uint16 l_SEndInitPW;
1179 Ifx_SCU_CCUCON0 ccucon0;
1180 float32 inputFreq = IfxScuCcu_getSourceFrequency();
1181 uint32 spbDiv = (uint32)(inputFreq / spbFreq);
1182 spbDiv = __maxu(spbDiv, 2);
1183
1184 if ((spbDiv >= 7) && (spbDiv < 14) && ((spbDiv & 1) == 1))
1185 {
1186 spbDiv = spbDiv - 1;
1187 }
1188
1189 if (spbDiv == 14)
1190 {
1191 spbDiv = 12;
1192 }
1193
1194 l_EndInitPW = IfxScuWdt_getCpuWatchdogPassword();
1195 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
1196
1197 IfxScuWdt_clearCpuEndinit(l_EndInitPW);
1198 SCU_TRAPDIS.U = SCU_TRAPDIS.U | 0x3E0U;
1199 IfxScuWdt_setCpuEndinit(l_EndInitPW);
1200
1201 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
1202
1203 while (SCU_CCUCON0.B.LCK != 0U)
1204 {}
1205
1206 ccucon0.U = SCU_CCUCON0.U;
1207 ccucon0.B.SPBDIV = spbDiv;
1208 ccucon0.B.UP = 1;
1209 SCU_CCUCON0.U = ccucon0.U;
1210 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
1211
1212 IfxScuWdt_clearCpuEndinit(l_EndInitPW);
1213 SCU_TRAPDIS.U = SCU_TRAPDIS.U & (uint32)~0x3E0UL;
1214 IfxScuWdt_setCpuEndinit(l_EndInitPW);
1215
1216 while (SCU_CCUCON0.B.LCK != 0U)
1217 {}
1218
1219 return IfxScuCcu_getSpbFrequency();
1220 }
1221
1222
1223 float32 IfxScuCcu_setSriFrequency(float32 sriFreq)
1224 {
1225 float32 freq = 0;
1226 float32 source = IfxScuCcu_getSourceFrequency();
1227 Ifx_SCU_CCUCON0 ccucon0;
1228 uint16 l_SEndInitPW;
1229 uint32 sriDiv = (uint32)__roundf(source / sriFreq);
1230 sriDiv = __maxu(sriDiv, 1);
1231
1232 if ((sriDiv >= 7) && (sriDiv < 14) && ((sriDiv & 1) == 1))
1233 {
1234 sriDiv = sriDiv - 1;
1235 }
1236
1237 if (sriDiv == 14)
1238 {
1239 sriDiv = 12;
1240 }
1241
1242 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
1243 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
1244
1245 while (SCU_CCUCON0.B.LCK != 0U)
1246 {}
1247
1248 ccucon0.U = SCU_CCUCON0.U;
1249 ccucon0.B.SRIDIV = sriDiv;
1250 ccucon0.B.UP = 1;
1251 SCU_CCUCON0.U = ccucon0.U;
1252
1253 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
1254
1255 while (SCU_CCUCON0.B.LCK != 0U)
1256 {}
1257
1258 freq = IfxScuCcu_getSriFrequency();
1259 return freq;
1260 }
1261
1262
1263 void IfxScuCcu_switchToBackupClock(const IfxScuCcu_Config *cfg)
1264 {
1265 uint16 endinit_pw, endinitSfty_pw;
1266 int pllStepsCount;
1267 uint8 smuTrapEnable;
1268
1269 if (SCU_CCUCON0.B.CLKSEL == 0) /* Already source is backup clock */
1270 {
1271 return;
1272 }
1273
1274 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
1275 endinit_pw = IfxScuWdt_getCpuWatchdogPassword();
1276
1277 /*Start Pll ramp down sequence */
1278 for (pllStepsCount = cfg->sysPll.numOfPllDividerSteps; pllStepsCount > 0; pllStepsCount--)
1279 { /*iterate through number of pll steps */
1280 {
1281 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
1282
1283 /*Configure K2 divider */
1284 while (SCU_PLLSTAT.B.K2RDY == 0U)
1285 {
1286 /*Wait until K2 divider is ready */
1287 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
1288 }
1289
1290 /*Now set the K2 divider value for the step corresponding to step count */
1291 SCU_PLLCON1.B.K2DIV = cfg->sysPll.pllDividerStep[pllStepsCount - 1].k2Step;
1292
1293 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
1294
1295 /*Wait for waitCounter corresponding to the pll step */
1296 IfxScuCcu_wait(cfg->sysPll.pllDividerStep[pllStepsCount - 1].waitTime);
1297 }
1298 }
1299
1300 {
1301 /* Disable TRAP for SMU (oscillator watchdog and unlock detection) */
1302 IfxScuWdt_clearCpuEndinit(endinit_pw);
1303
1304 smuTrapEnable = SCU_TRAPDIS.B.SMUT;
1305 SCU_TRAPDIS.B.SMUT = 1U;
1306
1307 IfxScuWdt_setCpuEndinit(endinit_pw);
1308 }
1309
1310 {
1311 /* Select fback (fosc-evr) as CCU input clock */
1312 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
1313
1314 while (SCU_CCUCON0.B.LCK != 0U)
1315 {
1316 /*Wait till ccucon0 lock is set */
1317 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
1318 }
1319
1320 SCU_CCUCON0.B.CLKSEL = 0; /*Select the EVR as fOSC for the clock distribution */
1321 SCU_CCUCON0.B.UP = 1; /*Update the ccucon0 register */
1322
1323 while (SCU_CCUCON0.B.LCK != 0U)
1324 {
1325 /*Wait till ccucon0 lock is set */
1326 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
1327 }
1328
1329 /* Disconnet PLL (SETFINDIS=1): oscillator clock is disconnected from PLL */
1330 SCU_PLLCON0.B.SETFINDIS = 1;
1331
1332 /* Enable oscillator disconnect feature */
1333 SCU_PLLCON0.B.OSCDISCDIS = 0U;
1334 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
1335 }
1336 {
1337 /* Enable VCO unlock Trap if it was disabled before */
1338 IfxScuWdt_clearCpuEndinit(endinit_pw);
1339 SCU_TRAPCLR.B.SMUT = 1U;
1340
1341 SCU_TRAPDIS.B.SMUT = smuTrapEnable;
1342 IfxScuWdt_setCpuEndinit(endinit_pw);
1343 }
1344 }
1345
1346
1347 IFX_STATIC void IfxScuCcu_wait(float32 timeSec)
1348 {
1349 uint32 stmCount = (uint32)(IfxScuCcu_getStmFrequency() * timeSec);
1350 uint32 stmCountBegin = STM0_TIM0.U;
1351
1352 while ((uint32)(STM0_TIM0.U - stmCountBegin) < stmCount)
1353 {
1354 /* There is no need to check overflow of the STM timer.
1355 * When counter after overflow subtracted with counter before overflow,
1356 * the subtraction result will be as expected, as long as both are unsigned 32 bits
1357 * eg: stmCountBegin= 0xFFFFFFFE (before overflow)
1358 * stmCountNow = 0x00000002 (before overflow)
1359 * diff= stmCountNow - stmCountBegin = 4 as expected.*/
1360 }
1361 }
IfxScuCcu_PllStepsConfig::k2Step
uint8 k2Step
K2 divider value for this step.
Definition: IfxScuCcu.h:742
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:572
IfxScuCcu_ClockDistributionConfig::ccucon1
IfxScuCcu_CcuconRegConfig ccucon1
CCUCON1 Register configuration.
Definition: IfxScuCcu.h:756
IfxScuCcu_ClockDistributionConfig::ccucon0
IfxScuCcu_CcuconRegConfig ccucon0
CCUCON0 Register configuration.
Definition: IfxScuCcu.h:755
IfxScuCcu_getPllVcoFrequency
float32 IfxScuCcu_getPllVcoFrequency(void)
API to get actual PLL Voltage Controlled Oscillator frequency. This API returns the based on the divi...
Definition: IfxScuCcu.c:532
IfxScu_CCUCON0_CLKSEL_fPll
Definition: IfxScu_cfg.h:1388
IfxScuCcu_getPllErayFrequency
float32 IfxScuCcu_getPllErayFrequency(void)
API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON...
Definition: IfxScuCcu.c:457
IfxScuCcu_Config::sysPll
IfxScuCcu_SysPllConfig sysPll
System PLL configuration.
Definition: IfxScuCcu.h:789
IfxScuCcu_InitialStepConfig::k2Initial
uint8 k2Initial
K2 divider value for basic (initial) step.
Definition: IfxScuCcu.h:734
IfxScuCcu_PllStepsConfig::hookFunction
IfxScuCcu_PllStepsFunctionHook hookFunction
Hook function called at the end of this step.
Definition: IfxScuCcu.h:744
IfxScuCcu_Config::xtalFrequency
uint32 xtalFrequency
Xtal Frequency.
Definition: IfxScuCcu.h:792
IfxScuCcu_init
boolean IfxScuCcu_init(const IfxScuCcu_Config *cfg)
API to initialize the SCU Clock Control Unit. This API initialize the PLL with ramp steps...
Definition: IfxScuCcu.c:656
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IFXSCU_CFG_PLL_STEPS
#define IFXSCU_CFG_PLL_STEPS
Definition: IfxScu_cfg.h:1344
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxScuCcu_getMaxFrequency
float32 IfxScuCcu_getMaxFrequency(void)
API to get FMAX divider frequency. This API returns the fMax frequency based on the divider value in ...
Definition: IfxScuCcu.c:363
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxScuCcu_getOscFrequency
float32 IfxScuCcu_getOscFrequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.c:435
IfxScuCcu_defaultClockConfig
IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig
Definition: IfxScuCcu.c:90
IfxScuCcu_getStmFrequency
IFX_INLINE float32 IfxScuCcu_getStmFrequency(void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register ...
Definition: IfxScuCcu.h:1119
IFXSCUCCU_OSC_STABLECHK_TIME
#define IFXSCUCCU_OSC_STABLECHK_TIME
Oscillator stability check timeout count.
Definition: IfxScuCcu.h:136
IFXSCU_EVR_OSC_FREQUENCY
#define IFXSCU_EVR_OSC_FREQUENCY
Definition: IfxScu_cfg.h:70
IfxScuCcu_getPllFrequency
float32 IfxScuCcu_getPllFrequency(void)
API to get actual PLL output frequency. This API returns the based on the divider values in CCUCON...
Definition: IfxScuCcu.c:504
IfxScu_CCUCON1_INSEL_fOsc0
Definition: IfxScu_cfg.h:1395
IfxScuCcu_getOsc0Frequency
float32 IfxScuCcu_getOsc0Frequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.c:429
IfxScuCcu_setCpuFrequency
float32 IfxScuCcu_setCpuFrequency(IfxCpu_ResourceCpu cpu, float32 cpuFreq)
API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers...
Definition: IfxScuCcu.c:1065
IFXSCU_CFG_FLASH_WAITSTATE
#define IFXSCU_CFG_FLASH_WAITSTATE
Definition: IfxScu_cfg.h:1351
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxScuCcu_SysPllConfig::pllDividerStep
IfxScuCcu_PllStepsConfig * pllDividerStep
Pointer to the array of Pll divider step configuration.
Definition: IfxScuCcu.h:777
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:195
IfxScuCcu_SysPllConfig::pllInitialStep
IfxScuCcu_InitialStepConfig pllInitialStep
Configuration of first step which is same as internal osc frequency.
Definition: IfxScuCcu.h:778
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:153
IfxScuCcu_getEvrFrequency
IFX_INLINE float32 IfxScuCcu_getEvrFrequency(void)
API to get EVR Oscillator frequency. This API returns the constant which is specific to the ScuCcu of...
Definition: IfxScuCcu.h:1082
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxScuCcu_setPll2ErayFrequency
float32 IfxScuCcu_setPll2ErayFrequency(float32 pll2ErayFreq)
API to configure PLL2ERAY (K3 Divider for ADC clock) for desired frequency. This API configure K3 div...
Definition: IfxScuCcu.c:1148
IfxScuCcu_Config::flashFconWaitStateConfig
IfxScuCcu_FlashWaitstateConfig flashFconWaitStateConfig
Configuration of flash waitstate.
Definition: IfxScuCcu.h:791
IfxScuCcu_getBaud2Frequency
float32 IfxScuCcu_getBaud2Frequency(void)
API to get BAUD2 divider frequency. This API returns the Baud2 frequency based on the divider value i...
Definition: IfxScuCcu.c:230
IfxScuCcu_getPllErayVcoFrequency
float32 IfxScuCcu_getPllErayVcoFrequency(void)
API to get actual ERAY PLL Voltage Controlled Oscillator frequency. This API returns the based on the...
Definition: IfxScuCcu.c:485
IfxScuCcu_getBaud1Frequency
float32 IfxScuCcu_getBaud1Frequency(void)
API to get BAUD1 divider frequency. This API returns the based on the divider value in CCUCON registe...
Definition: IfxScuCcu.c:212
IfxScuCcu_initConfig
void IfxScuCcu_initConfig(IfxScuCcu_Config *cfg)
Initializes the clock configuration with default values.
Definition: IfxScuCcu.c:909
IfxScuCcu_setPll2Frequency
float32 IfxScuCcu_setPll2Frequency(float32 pll2Freq)
API to configure PLL2 (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider...
Definition: IfxScuCcu.c:1161
IfxScuCcu_getCpuFrequency
float32 IfxScuCcu_getCpuFrequency(const IfxCpu_ResourceCpu cpu)
This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequenc...
Definition: IfxScuCcu.c:290
IFXSCU_VCO_BASE_FREQUENCY
#define IFXSCU_VCO_BASE_FREQUENCY
Definition: IfxScu_cfg.h:69
IfxScuCcu_getFsi2Frequency
float32 IfxScuCcu_getFsi2Frequency(void)
API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider va...
Definition: IfxScuCcu.c:317
IFXSCU_CFG_CLK_DISTRIBUTION
#define IFXSCU_CFG_CLK_DISTRIBUTION
Definition: IfxScu_cfg.h:1329
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxScuCcu_isOscillatorStable
IFX_STATIC boolean IfxScuCcu_isOscillatorStable(void)
Check if oscillator is stable.
Definition: IfxScuCcu.c:1020
IfxScuCcu_PllStepsFunctionHook
void(* IfxScuCcu_PllStepsFunctionHook)(void)
Function pointer type for the hooks.
Definition: IfxScuCcu.h:145
IfxScuCcu_getModuleFrequency
float32 IfxScuCcu_getModuleFrequency(void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with ...
Definition: IfxScuCcu.c:404
IfxScuCcu_Config
Configuration structure SCU module.
Definition: IfxScuCcu.h:787
IfxScuCcu_CcuconRegConfig::value
uint32 value
CCUCON Register value to be updated.
Definition: IfxScuCcu.h:723
IfxScu_CCUCON0_CLKSEL_fBack
Definition: IfxScu_cfg.h:1387
IfxScuCcu_ErayPllConfig
Configuration structure for E-ray PLL.
Definition: IfxScuCcu.h:797
IFXSCU_CFG_PLL_INITIAL_STEP
#define IFXSCU_CFG_PLL_INITIAL_STEP
Definition: IfxScu_cfg.h:1349
IfxScuCcu_setSpbFrequency
float32 IfxScuCcu_setSpbFrequency(float32 spbFreq)
API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers...
Definition: IfxScuCcu.c:1174
IfxScuCcu_ClockDistributionConfig::ccucon6
IfxScuCcu_CcuconRegConfig ccucon6
CCUCON6 Register configuration.
Definition: IfxScuCcu.h:759
IfxScuCcu_initErayPll
boolean IfxScuCcu_initErayPll(const IfxScuCcu_ErayPllConfig *cfg)
API to initialize the SCU Eray Pll This API initialize the Eray PLL for the configuration provided by...
Definition: IfxScuCcu.c:915
IfxScuCcu_wait
IFX_STATIC void IfxScuCcu_wait(float32 timeSec)
API to wait for requested duration. Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled.
Definition: IfxScuCcu.c:1347
IfxScuCcu_ClockDistributionConfig::ccucon7
IfxScuCcu_CcuconRegConfig ccucon7
CCUCON7 Register configuration.
Definition: IfxScuCcu.h:760
IfxScuCcu_CcuconRegConfig::mask
uint32 mask
CCUCON Mask to select the bit fields to be updated.
Definition: IfxScuCcu.h:724
IfxScuCcu_Config::clockDistribution
IfxScuCcu_ClockDistributionConfig clockDistribution
Configuration of of bus clocks and other module clock distribution.
Definition: IfxScuCcu.h:790
IfxScuCcu_getPll2ErayFrequency
IFX_INLINE float32 IfxScuCcu_getPll2ErayFrequency(void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2ERAY frequency b...
Definition: IfxScuCcu.h:1094
uint16
unsigned short uint16
Definition: Platform_Types.h:112
__roundf
#define __roundf
Definition: IfxCpu_IntrinsicsDcc.h:1625
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:424
IfxScuCcu_getPll2Frequency
IFX_INLINE float32 IfxScuCcu_getPll2Frequency(void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2 frequency based...
Definition: IfxScuCcu.h:1104
IfxScuCcu_SysPllConfig::numOfPllDividerSteps
uint8 numOfPllDividerSteps
Number of PLL divider steps during clock throttling.
Definition: IfxScuCcu.h:776
IfxScuCcu_getFsiFrequency
float32 IfxScuCcu_getFsiFrequency(void)
API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCO...
Definition: IfxScuCcu.c:340
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:253
IfxScuCcu_defaultErayPllConfig
IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig
Definition: IfxScuCcu.c:101
IfxScuCcu_getSourceFrequency
float32 IfxScuCcu_getSourceFrequency(void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with ...
Definition: IfxScuCcu.c:551
IfxScuCcu_ClockDistributionConfig::ccucon2
IfxScuCcu_CcuconRegConfig ccucon2
CCUCON2 Register configuration.
Definition: IfxScuCcu.h:757
IfxScu_CCUCON1_INSEL_fOsc1
Definition: IfxScu_cfg.h:1394
IfxCpu_ResourceCpu_0
CPU 0.
Definition: IfxCpu_cfg.h:155
__maxu
uint32 __maxu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IfxScuCcu_setGtmFrequency
float32 IfxScuCcu_setGtmFrequency(float32 gtmFreq)
API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers...
Definition: IfxScuCcu.c:1112
IfxScuCcu_InitialStepConfig::waitTime
float32 waitTime
Wait time for for basic (initial) step.
Definition: IfxScuCcu.h:735
IfxScuCcu.h
SCU basic functionality.
sint32
long sint32
Definition: Platform_Types.h:134
IfxScuCcu_setSriFrequency
float32 IfxScuCcu_setSriFrequency(float32 sriFreq)
API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers...
Definition: IfxScuCcu.c:1223
IfxScuCcu_getGtmFrequency
IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void)
API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register an...
Definition: IfxScuCcu.h:1088
IfxScuCcu_getBbbFrequency
float32 IfxScuCcu_getBbbFrequency(void)
API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider valu...
Definition: IfxScuCcu.c:248
IfxScuCcu_ClockDistributionConfig::ccucon5
IfxScuCcu_CcuconRegConfig ccucon5
CCUCON5 Register configuration.
Definition: IfxScuCcu.h:758
IFX_CFG_SCU_XTAL_FREQUENCY
#define IFX_CFG_SCU_XTAL_FREQUENCY
Default External oscillator frequency.
Definition: IfxScu_cfg.h:60
IfxScuCcu_InitialStepConfig::pDivider
uint8 pDivider
P divider value for basic (initial) step.
Definition: IfxScuCcu.h:732
IfxScuCcu_PllStepsConfig
Configuration structure type for the Pll Steps for current jump control.
Definition: IfxScuCcu.h:740
IfxScuCcu_xtalFrequency
IFX_STATIC uint32 IfxScuCcu_xtalFrequency
Crystal Frequency.
Definition: IfxScuCcu.c:84
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxScuCcu_InitialStepConfig::nDivider
uint8 nDivider
N divider value for basic (initial) step.
Definition: IfxScuCcu.h:733
IfxScuCcu_switchToBackupClock
void IfxScuCcu_switchToBackupClock(const IfxScuCcu_Config *cfg)
API to switch to Backup clock from the current PLL frequency.
Definition: IfxScuCcu.c:1263
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxScuCcu_initErayPllConfig
void IfxScuCcu_initErayPllConfig(IfxScuCcu_ErayPllConfig *cfg)
Initializes the clock configuration with default values.
Definition: IfxScuCcu.c:1014
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxScuCcu_getSriFrequency
float32 IfxScuCcu_getSriFrequency(void)
API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in C...
Definition: IfxScuCcu.c:614
IfxScuCcu_calculateSysPllDividers
boolean IfxScuCcu_calculateSysPllDividers(IfxScuCcu_Config *cfg, uint32 fPll)
The api calculates the system PLL divider values P, N, K based on given xtal frequency and PLL freque...
Definition: IfxScuCcu.c:110
IfxScuCcu_aDefaultPllConfigSteps
IFX_STATIC IFX_CONST IfxScuCcu_PllStepsConfig IfxScuCcu_aDefaultPllConfigSteps[]
Default configuration for the PLL initial steps This is a structure array and the values are defined ...
Definition: IfxScuCcu.c:78
IfxCpu_ResourceCpu_1
CPU 1.
Definition: IfxCpu_cfg.h:156


iLLD_TC26B: IfxScuCcu.h Source File

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IfxScuCcu.h
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1 /**
2 * \file IfxScuCcu.h
3 * \brief SCU basic functionality
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Scu SCU
43 * \addtogroup IfxLld_Scu
44 * \{
45 * \defgroup IfxLld_ScuCcu How to use the Scu Clock driver?
46 * \addtogroup IfxLld_ScuCcu
47 * \{
48 *
49 * The Scu Clock control unit driver provides a default configuration for pll and Clock initialisation and set of peripheral clock configuration functions.
50 *
51 * In the following sections it will be described, how to integrate the driver into the application framework.
52 *
53 * \section IfxLld_ScuCcu_Std_Preparation Preparation
54 * \subsection IfxLld_ScuCcu_Std_Include Include Files
55 *
56 * Include following header file into your C code:
57 * \code
58 * #include <Scu/Std/IfxScuCcu.h>
59 * \endcode
60 *
61 * \subsection IfxLld_ScuCcu_Std_Variables Variables
62 *
63 * Declare the Clock Configuration variables in your C code:
64 *
65 * \code
66 * // used globally
67 *
68 * // configuration for the PLL steps
69 * static IfxScuCcu_PllStepsConfig IfxScuCcu_testPllConfigSteps[] = {
70 * IFXSCU_CFG_PLL_STEPS
71 * };
72 *
73 *
74 * // Default configuration for the Clock Configuration
75 * IfxScuCcu_Config IfxScuCcu_testClockConfig = {
76 * {
77 * sizeof(IfxScuCcu_testPllConfigSteps) / sizeof(IfxScuCcu_PllStepsConfig),
78 * (IfxScuCcu_PllStepsConfig *)IfxScuCcu_testPllConfigSteps,
79 * IFXSCU_CFG_PLL_INITIAL_STEP,
80 * },
81 * IFXSCU_CFG_CLK_DISTRIBUTION,
82 * IFXSCU_CFG_FLASH_WAITSTATE,
83 * IFX_CFG_SCU_XTAL_FREQUENCY
84 * };
85 *
86 * \endcode
87 *
88 * \subsection IfxLld_ScuCcu_Std_Init Module Initialisation
89 *
90 * The module initialisation can be done in the same function. Here an example:
91 * \code
92 *
93 * // standard PLL & clock initialisation
94 * IfxScuCcu_init(&IfxScuCcu_testClockConfig);
95 *
96 * \endcode
97 *
98 * The PLL and clocks are now initialised based on the IFXSCU_CFG_XTAL_FREQ and IFXSCU_CFG_PLL_FREQ values configured in Ifx_Cfg.h.
99 *
100 * \}
101 * \}
102 *
103 * \defgroup IfxLld_Scu_Std_Ccu Ccu Basic Functionality
104 * \ingroup IfxLld_Scu_Std
105 * \defgroup IfxLld_Scu_Std_Ccu_Ccu Clock Control Functions
106 * \ingroup IfxLld_Scu_Std_Ccu
107 * \defgroup IfxLld_Scu_Std_Ccu_Ccu_Operative Clock Control Operative Functions
108 * \ingroup IfxLld_Scu_Std_Ccu
109 * \defgroup IfxLld_Scu_Std_Ccu_Ccu_Configuration Clock Control Configuration Functions
110 * \ingroup IfxLld_Scu_Std_Ccu
111 * \defgroup IfxLld_Scu_Std_Ccu_Enum Enumerations
112 * \ingroup IfxLld_Scu_Std_Ccu
113 */
114
115 #ifndef IFXSCUCCU_H
116 #define IFXSCUCCU_H 1
117
118 /******************************************************************************/
119 /*----------------------------------Includes----------------------------------*/
120 /******************************************************************************/
121
122 #include "_Impl/IfxScu_cfg.h"
123 #include "Scu/Std/IfxScuWdt.h"
124 #include "Cpu/Std/IfxCpu.h"
125 #include "IfxStm_reg.h"
126 #include "IfxScu_reg.h"
127 #include "IfxFlash_reg.h"
128 #include "_PinMap/IfxScu_PinMap.h"
129
130 /******************************************************************************/
131 /*-----------------------------------Macros-----------------------------------*/
132 /******************************************************************************/
133
134 /** \brief Oscillator stability check timeout count
135 */
136 #define IFXSCUCCU_OSC_STABLECHK_TIME (640)
137
138 /******************************************************************************/
139 /*------------------------------Type Definitions------------------------------*/
140 /******************************************************************************/
141
142 /** \brief Function pointer type for the hooks
143 * \return None
144 */
145 typedef void (*IfxScuCcu_PllStepsFunctionHook)(void);
146
147 /******************************************************************************/
148 /*--------------------------------Enumerations--------------------------------*/
149 /******************************************************************************/
150
151 /** \addtogroup IfxLld_Scu_Std_Ccu_Enum
152 * \{ */
153 /** \brief MODULE_SCU.PLLCON1.B.K1DIV, specifies the K1-Divider
154 */
155 typedef enum
156 {
157 IfxScuCcu_K1divider_1 = 0, /**< \brief K1-Divider 1 */
158 IfxScuCcu_K1divider_2, /**< \brief K1-Divider 2 */
159 IfxScuCcu_K1divider_3, /**< \brief K1-Divider 3 */
160 IfxScuCcu_K1divider_4, /**< \brief K1-Divider 4 */
161 IfxScuCcu_K1divider_5, /**< \brief K1-Divider 5 */
162 IfxScuCcu_K1divider_6, /**< \brief K1-Divider 6 */
163 IfxScuCcu_K1divider_7, /**< \brief K1-Divider 7 */
164 IfxScuCcu_K1divider_8, /**< \brief K1-Divider 8 */
165 IfxScuCcu_K1divider_9, /**< \brief K1-Divider 9 */
166 IfxScuCcu_K1divider_10, /**< \brief K1-Divider 10 */
167 IfxScuCcu_K1divider_11, /**< \brief K1-Divider 11 */
168 IfxScuCcu_K1divider_12, /**< \brief K1-Divider 12 */
169 IfxScuCcu_K1divider_13, /**< \brief K1-Divider 13 */
170 IfxScuCcu_K1divider_14, /**< \brief K1-Divider 14 */
171 IfxScuCcu_K1divider_15, /**< \brief K1-Divider 15 */
172 IfxScuCcu_K1divider_16, /**< \brief K1-Divider 16 */
173 IfxScuCcu_K1divider_17, /**< \brief K1-Divider 17 */
174 IfxScuCcu_K1divider_18, /**< \brief K1-Divider 18 */
175 IfxScuCcu_K1divider_19, /**< \brief K1-Divider 19 */
176 IfxScuCcu_K1divider_20, /**< \brief K1-Divider 20 */
177 IfxScuCcu_K1divider_21, /**< \brief K1-Divider 21 */
178 IfxScuCcu_K1divider_22, /**< \brief K1-Divider 22 */
179 IfxScuCcu_K1divider_23, /**< \brief K1-Divider 23 */
180 IfxScuCcu_K1divider_24, /**< \brief K1-Divider 24 */
181 IfxScuCcu_K1divider_25, /**< \brief K1-Divider 25 */
182 IfxScuCcu_K1divider_26, /**< \brief K1-Divider 26 */
183 IfxScuCcu_K1divider_27, /**< \brief K1-Divider 27 */
184 IfxScuCcu_K1divider_28, /**< \brief K1-Divider 28 */
185 IfxScuCcu_K1divider_29, /**< \brief K1-Divider 29 */
186 IfxScuCcu_K1divider_30, /**< \brief K1-Divider 30 */
187 IfxScuCcu_K1divider_31, /**< \brief K1-Divider 31 */
188 IfxScuCcu_K1divider_32, /**< \brief K1-Divider 32 */
189 IfxScuCcu_K1divider_33, /**< \brief K1-Divider 33 */
190 IfxScuCcu_K1divider_34, /**< \brief K1-Divider 34 */
191 IfxScuCcu_K1divider_35, /**< \brief K1-Divider 35 */
192 IfxScuCcu_K1divider_36, /**< \brief K1-Divider 36 */
193 IfxScuCcu_K1divider_37, /**< \brief K1-Divider 37 */
194 IfxScuCcu_K1divider_38, /**< \brief K1-Divider 38 */
195 IfxScuCcu_K1divider_39, /**< \brief K1-Divider 39 */
196 IfxScuCcu_K1divider_40, /**< \brief K1-Divider 40 */
197 IfxScuCcu_K1divider_41, /**< \brief K1-Divider 41 */
198 IfxScuCcu_K1divider_42, /**< \brief K1-Divider 42 */
199 IfxScuCcu_K1divider_43, /**< \brief K1-Divider 43 */
200 IfxScuCcu_K1divider_44, /**< \brief K1-Divider 44 */
201 IfxScuCcu_K1divider_45, /**< \brief K1-Divider 45 */
202 IfxScuCcu_K1divider_46, /**< \brief K1-Divider 46 */
203 IfxScuCcu_K1divider_47, /**< \brief K1-Divider 47 */
204 IfxScuCcu_K1divider_48, /**< \brief K1-Divider 48 */
205 IfxScuCcu_K1divider_49, /**< \brief K1-Divider 49 */
206 IfxScuCcu_K1divider_50, /**< \brief K1-Divider 50 */
207 IfxScuCcu_K1divider_51, /**< \brief K1-Divider 51 */
208 IfxScuCcu_K1divider_52, /**< \brief K1-Divider 52 */
209 IfxScuCcu_K1divider_53, /**< \brief K1-Divider 53 */
210 IfxScuCcu_K1divider_54, /**< \brief K1-Divider 54 */
211 IfxScuCcu_K1divider_55, /**< \brief K1-Divider 55 */
212 IfxScuCcu_K1divider_56, /**< \brief K1-Divider 56 */
213 IfxScuCcu_K1divider_57, /**< \brief K1-Divider 57 */
214 IfxScuCcu_K1divider_58, /**< \brief K1-Divider 58 */
215 IfxScuCcu_K1divider_59, /**< \brief K1-Divider 59 */
216 IfxScuCcu_K1divider_60, /**< \brief K1-Divider 60 */
217 IfxScuCcu_K1divider_61, /**< \brief K1-Divider 61 */
218 IfxScuCcu_K1divider_62, /**< \brief K1-Divider 62 */
219 IfxScuCcu_K1divider_63, /**< \brief K1-Divider 63 */
220 IfxScuCcu_K1divider_64, /**< \brief K1-Divider 64 */
221 IfxScuCcu_K1divider_65, /**< \brief K1-Divider 65 */
222 IfxScuCcu_K1divider_66, /**< \brief K1-Divider 66 */
223 IfxScuCcu_K1divider_67, /**< \brief K1-Divider 67 */
224 IfxScuCcu_K1divider_68, /**< \brief K1-Divider 68 */
225 IfxScuCcu_K1divider_69, /**< \brief K1-Divider 69 */
226 IfxScuCcu_K1divider_70, /**< \brief K1-Divider 70 */
227 IfxScuCcu_K1divider_71, /**< \brief K1-Divider 71 */
228 IfxScuCcu_K1divider_72, /**< \brief K1-Divider 72 */
229 IfxScuCcu_K1divider_73, /**< \brief K1-Divider 73 */
230 IfxScuCcu_K1divider_74, /**< \brief K1-Divider 74 */
231 IfxScuCcu_K1divider_75, /**< \brief K1-Divider 75 */
232 IfxScuCcu_K1divider_76, /**< \brief K1-Divider 76 */
233 IfxScuCcu_K1divider_77, /**< \brief K1-Divider 77 */
234 IfxScuCcu_K1divider_78, /**< \brief K1-Divider 78 */
235 IfxScuCcu_K1divider_79, /**< \brief K1-Divider 79 */
236 IfxScuCcu_K1divider_80, /**< \brief K1-Divider 80 */
237 IfxScuCcu_K1divider_81, /**< \brief K1-Divider 81 */
238 IfxScuCcu_K1divider_82, /**< \brief K1-Divider 82 */
239 IfxScuCcu_K1divider_83, /**< \brief K1-Divider 83 */
240 IfxScuCcu_K1divider_84, /**< \brief K1-Divider 84 */
241 IfxScuCcu_K1divider_85, /**< \brief K1-Divider 85 */
242 IfxScuCcu_K1divider_86, /**< \brief K1-Divider 86 */
243 IfxScuCcu_K1divider_87, /**< \brief K1-Divider 87 */
244 IfxScuCcu_K1divider_88, /**< \brief K1-Divider 88 */
245 IfxScuCcu_K1divider_89, /**< \brief K1-Divider 89 */
246 IfxScuCcu_K1divider_90, /**< \brief K1-Divider 90 */
247 IfxScuCcu_K1divider_91, /**< \brief K1-Divider 91 */
248 IfxScuCcu_K1divider_92, /**< \brief K1-Divider 92 */
249 IfxScuCcu_K1divider_93, /**< \brief K1-Divider 93 */
250 IfxScuCcu_K1divider_94, /**< \brief K1-Divider 94 */
251 IfxScuCcu_K1divider_95, /**< \brief K1-Divider 95 */
252 IfxScuCcu_K1divider_96, /**< \brief K1-Divider 96 */
253 IfxScuCcu_K1divider_97, /**< \brief K1-Divider 97 */
254 IfxScuCcu_K1divider_98, /**< \brief K1-Divider 98 */
255 IfxScuCcu_K1divider_99, /**< \brief K1-Divider 99 */
256 IfxScuCcu_K1divider_100, /**< \brief K1-Divider 100 */
257 IfxScuCcu_K1divider_101, /**< \brief K1-Divider 101 */
258 IfxScuCcu_K1divider_102, /**< \brief K1-Divider 102 */
259 IfxScuCcu_K1divider_103, /**< \brief K1-Divider 103 */
260 IfxScuCcu_K1divider_104, /**< \brief K1-Divider 104 */
261 IfxScuCcu_K1divider_105, /**< \brief K1-Divider 105 */
262 IfxScuCcu_K1divider_106, /**< \brief K1-Divider 106 */
263 IfxScuCcu_K1divider_107, /**< \brief K1-Divider 107 */
264 IfxScuCcu_K1divider_108, /**< \brief K1-Divider 108 */
265 IfxScuCcu_K1divider_109, /**< \brief K1-Divider 109 */
266 IfxScuCcu_K1divider_110, /**< \brief K1-Divider 110 */
267 IfxScuCcu_K1divider_111, /**< \brief K1-Divider 111 */
268 IfxScuCcu_K1divider_112, /**< \brief K1-Divider 112 */
269 IfxScuCcu_K1divider_113, /**< \brief K1-Divider 113 */
270 IfxScuCcu_K1divider_114, /**< \brief K1-Divider 114 */
271 IfxScuCcu_K1divider_115, /**< \brief K1-Divider 115 */
272 IfxScuCcu_K1divider_116, /**< \brief K1-Divider 116 */
273 IfxScuCcu_K1divider_117, /**< \brief K1-Divider 117 */
274 IfxScuCcu_K1divider_118, /**< \brief K1-Divider 118 */
275 IfxScuCcu_K1divider_119, /**< \brief K1-Divider 119 */
276 IfxScuCcu_K1divider_120, /**< \brief K1-Divider 120 */
277 IfxScuCcu_K1divider_121, /**< \brief K1-Divider 121 */
278 IfxScuCcu_K1divider_122, /**< \brief K1-Divider 122 */
279 IfxScuCcu_K1divider_123, /**< \brief K1-Divider 123 */
280 IfxScuCcu_K1divider_124, /**< \brief K1-Divider 124 */
281 IfxScuCcu_K1divider_125, /**< \brief K1-Divider 125 */
282 IfxScuCcu_K1divider_126, /**< \brief K1-Divider 126 */
283 IfxScuCcu_K1divider_127, /**< \brief K1-Divider 127 */
284 IfxScuCcu_K1divider_128 /**< \brief K1-Divider 128 */
285 } IfxScuCcu_K1divider;
286
287 /** \brief MODULE_SCU.PLLCON1.B.K2DIV, specifies the K2-Divider
288 */
289 typedef enum
290 {
291 IfxScuCcu_K2divider_1 = 0, /**< \brief K2-Divider 1 */
292 IfxScuCcu_K2divider_2, /**< \brief K2-Divider 2 */
293 IfxScuCcu_K2divider_3, /**< \brief K2-Divider 3 */
294 IfxScuCcu_K2divider_4, /**< \brief K2-Divider 4 */
295 IfxScuCcu_K2divider_5, /**< \brief K2-Divider 5 */
296 IfxScuCcu_K2divider_6, /**< \brief K2-Divider 6 */
297 IfxScuCcu_K2divider_7, /**< \brief K2-Divider 7 */
298 IfxScuCcu_K2divider_8, /**< \brief K2-Divider 8 */
299 IfxScuCcu_K2divider_9, /**< \brief K2-Divider 9 */
300 IfxScuCcu_K2divider_10, /**< \brief K2-Divider 10 */
301 IfxScuCcu_K2divider_11, /**< \brief K2-Divider 11 */
302 IfxScuCcu_K2divider_12, /**< \brief K2-Divider 12 */
303 IfxScuCcu_K2divider_13, /**< \brief K2-Divider 13 */
304 IfxScuCcu_K2divider_14, /**< \brief K2-Divider 14 */
305 IfxScuCcu_K2divider_15, /**< \brief K2-Divider 15 */
306 IfxScuCcu_K2divider_16, /**< \brief K2-Divider 16 */
307 IfxScuCcu_K2divider_17, /**< \brief K2-Divider 17 */
308 IfxScuCcu_K2divider_18, /**< \brief K2-Divider 18 */
309 IfxScuCcu_K2divider_19, /**< \brief K2-Divider 19 */
310 IfxScuCcu_K2divider_20, /**< \brief K2-Divider 20 */
311 IfxScuCcu_K2divider_21, /**< \brief K2-Divider 21 */
312 IfxScuCcu_K2divider_22, /**< \brief K2-Divider 22 */
313 IfxScuCcu_K2divider_23, /**< \brief K2-Divider 23 */
314 IfxScuCcu_K2divider_24, /**< \brief K2-Divider 24 */
315 IfxScuCcu_K2divider_25, /**< \brief K2-Divider 25 */
316 IfxScuCcu_K2divider_26, /**< \brief K2-Divider 26 */
317 IfxScuCcu_K2divider_27, /**< \brief K2-Divider 27 */
318 IfxScuCcu_K2divider_28, /**< \brief K2-Divider 28 */
319 IfxScuCcu_K2divider_29, /**< \brief K2-Divider 29 */
320 IfxScuCcu_K2divider_30, /**< \brief K2-Divider 30 */
321 IfxScuCcu_K2divider_31, /**< \brief K2-Divider 31 */
322 IfxScuCcu_K2divider_32, /**< \brief K2-Divider 32 */
323 IfxScuCcu_K2divider_33, /**< \brief K2-Divider 33 */
324 IfxScuCcu_K2divider_34, /**< \brief K2-Divider 34 */
325 IfxScuCcu_K2divider_35, /**< \brief K2-Divider 35 */
326 IfxScuCcu_K2divider_36, /**< \brief K2-Divider 36 */
327 IfxScuCcu_K2divider_37, /**< \brief K2-Divider 37 */
328 IfxScuCcu_K2divider_38, /**< \brief K2-Divider 38 */
329 IfxScuCcu_K2divider_39, /**< \brief K2-Divider 39 */
330 IfxScuCcu_K2divider_40, /**< \brief K2-Divider 40 */
331 IfxScuCcu_K2divider_41, /**< \brief K2-Divider 41 */
332 IfxScuCcu_K2divider_42, /**< \brief K2-Divider 42 */
333 IfxScuCcu_K2divider_43, /**< \brief K2-Divider 43 */
334 IfxScuCcu_K2divider_44, /**< \brief K2-Divider 44 */
335 IfxScuCcu_K2divider_45, /**< \brief K2-Divider 45 */
336 IfxScuCcu_K2divider_46, /**< \brief K2-Divider 46 */
337 IfxScuCcu_K2divider_47, /**< \brief K2-Divider 47 */
338 IfxScuCcu_K2divider_48, /**< \brief K2-Divider 48 */
339 IfxScuCcu_K2divider_49, /**< \brief K2-Divider 49 */
340 IfxScuCcu_K2divider_50, /**< \brief K2-Divider 50 */
341 IfxScuCcu_K2divider_51, /**< \brief K2-Divider 51 */
342 IfxScuCcu_K2divider_52, /**< \brief K2-Divider 52 */
343 IfxScuCcu_K2divider_53, /**< \brief K2-Divider 53 */
344 IfxScuCcu_K2divider_54, /**< \brief K2-Divider 54 */
345 IfxScuCcu_K2divider_55, /**< \brief K2-Divider 55 */
346 IfxScuCcu_K2divider_56, /**< \brief K2-Divider 56 */
347 IfxScuCcu_K2divider_57, /**< \brief K2-Divider 57 */
348 IfxScuCcu_K2divider_58, /**< \brief K2-Divider 58 */
349 IfxScuCcu_K2divider_59, /**< \brief K2-Divider 59 */
350 IfxScuCcu_K2divider_60, /**< \brief K2-Divider 60 */
351 IfxScuCcu_K2divider_61, /**< \brief K2-Divider 61 */
352 IfxScuCcu_K2divider_62, /**< \brief K2-Divider 62 */
353 IfxScuCcu_K2divider_63, /**< \brief K2-Divider 63 */
354 IfxScuCcu_K2divider_64, /**< \brief K2-Divider 64 */
355 IfxScuCcu_K2divider_65, /**< \brief K2-Divider 65 */
356 IfxScuCcu_K2divider_66, /**< \brief K2-Divider 66 */
357 IfxScuCcu_K2divider_67, /**< \brief K2-Divider 67 */
358 IfxScuCcu_K2divider_68, /**< \brief K2-Divider 68 */
359 IfxScuCcu_K2divider_69, /**< \brief K2-Divider 69 */
360 IfxScuCcu_K2divider_70, /**< \brief K2-Divider 70 */
361 IfxScuCcu_K2divider_71, /**< \brief K2-Divider 71 */
362 IfxScuCcu_K2divider_72, /**< \brief K2-Divider 72 */
363 IfxScuCcu_K2divider_73, /**< \brief K2-Divider 73 */
364 IfxScuCcu_K2divider_74, /**< \brief K2-Divider 74 */
365 IfxScuCcu_K2divider_75, /**< \brief K2-Divider 75 */
366 IfxScuCcu_K2divider_76, /**< \brief K2-Divider 76 */
367 IfxScuCcu_K2divider_77, /**< \brief K2-Divider 77 */
368 IfxScuCcu_K2divider_78, /**< \brief K2-Divider 78 */
369 IfxScuCcu_K2divider_79, /**< \brief K2-Divider 79 */
370 IfxScuCcu_K2divider_80, /**< \brief K2-Divider 80 */
371 IfxScuCcu_K2divider_81, /**< \brief K2-Divider 81 */
372 IfxScuCcu_K2divider_82, /**< \brief K2-Divider 82 */
373 IfxScuCcu_K2divider_83, /**< \brief K2-Divider 83 */
374 IfxScuCcu_K2divider_84, /**< \brief K2-Divider 84 */
375 IfxScuCcu_K2divider_85, /**< \brief K2-Divider 85 */
376 IfxScuCcu_K2divider_86, /**< \brief K2-Divider 86 */
377 IfxScuCcu_K2divider_87, /**< \brief K2-Divider 87 */
378 IfxScuCcu_K2divider_88, /**< \brief K2-Divider 88 */
379 IfxScuCcu_K2divider_89, /**< \brief K2-Divider 89 */
380 IfxScuCcu_K2divider_90, /**< \brief K2-Divider 90 */
381 IfxScuCcu_K2divider_91, /**< \brief K2-Divider 91 */
382 IfxScuCcu_K2divider_92, /**< \brief K2-Divider 92 */
383 IfxScuCcu_K2divider_93, /**< \brief K2-Divider 93 */
384 IfxScuCcu_K2divider_94, /**< \brief K2-Divider 94 */
385 IfxScuCcu_K2divider_95, /**< \brief K2-Divider 95 */
386 IfxScuCcu_K2divider_96, /**< \brief K2-Divider 96 */
387 IfxScuCcu_K2divider_97, /**< \brief K2-Divider 97 */
388 IfxScuCcu_K2divider_98, /**< \brief K2-Divider 98 */
389 IfxScuCcu_K2divider_99, /**< \brief K2-Divider 99 */
390 IfxScuCcu_K2divider_100, /**< \brief K2-Divider 100 */
391 IfxScuCcu_K2divider_101, /**< \brief K2-Divider 101 */
392 IfxScuCcu_K2divider_102, /**< \brief K2-Divider 102 */
393 IfxScuCcu_K2divider_103, /**< \brief K2-Divider 103 */
394 IfxScuCcu_K2divider_104, /**< \brief K2-Divider 104 */
395 IfxScuCcu_K2divider_105, /**< \brief K2-Divider 105 */
396 IfxScuCcu_K2divider_106, /**< \brief K2-Divider 106 */
397 IfxScuCcu_K2divider_107, /**< \brief K2-Divider 107 */
398 IfxScuCcu_K2divider_108, /**< \brief K2-Divider 108 */
399 IfxScuCcu_K2divider_109, /**< \brief K2-Divider 109 */
400 IfxScuCcu_K2divider_110, /**< \brief K2-Divider 110 */
401 IfxScuCcu_K2divider_111, /**< \brief K2-Divider 111 */
402 IfxScuCcu_K2divider_112, /**< \brief K2-Divider 112 */
403 IfxScuCcu_K2divider_113, /**< \brief K2-Divider 113 */
404 IfxScuCcu_K2divider_114, /**< \brief K2-Divider 114 */
405 IfxScuCcu_K2divider_115, /**< \brief K2-Divider 115 */
406 IfxScuCcu_K2divider_116, /**< \brief K2-Divider 116 */
407 IfxScuCcu_K2divider_117, /**< \brief K2-Divider 117 */
408 IfxScuCcu_K2divider_118, /**< \brief K2-Divider 118 */
409 IfxScuCcu_K2divider_119, /**< \brief K2-Divider 119 */
410 IfxScuCcu_K2divider_120, /**< \brief K2-Divider 120 */
411 IfxScuCcu_K2divider_121, /**< \brief K2-Divider 121 */
412 IfxScuCcu_K2divider_122, /**< \brief K2-Divider 122 */
413 IfxScuCcu_K2divider_123, /**< \brief K2-Divider 123 */
414 IfxScuCcu_K2divider_124, /**< \brief K2-Divider 124 */
415 IfxScuCcu_K2divider_125, /**< \brief K2-Divider 125 */
416 IfxScuCcu_K2divider_126, /**< \brief K2-Divider 126 */
417 IfxScuCcu_K2divider_127, /**< \brief K2-Divider 127 */
418 IfxScuCcu_K2divider_128 /**< \brief K2-Divider 128 */
419 } IfxScuCcu_K2divider;
420
421 /** \brief MODULE_SCU.PLLCON1.B.K3DIV, specifies the K3-Divider
422 */
423 typedef enum
424 {
425 IfxScuCcu_K3divider_1 = 0, /**< \brief K3-Divider 1 */
426 IfxScuCcu_K3divider_2, /**< \brief K3-Divider 2 */
427 IfxScuCcu_K3divider_3, /**< \brief K3-Divider 3 */
428 IfxScuCcu_K3divider_4, /**< \brief K3-Divider 4 */
429 IfxScuCcu_K3divider_5, /**< \brief K3-Divider 5 */
430 IfxScuCcu_K3divider_6, /**< \brief K3-Divider 6 */
431 IfxScuCcu_K3divider_7, /**< \brief K3-Divider 7 */
432 IfxScuCcu_K3divider_8, /**< \brief K3-Divider 8 */
433 IfxScuCcu_K3divider_9, /**< \brief K3-Divider 9 */
434 IfxScuCcu_K3divider_10, /**< \brief K3-Divider 10 */
435 IfxScuCcu_K3divider_11, /**< \brief K3-Divider 11 */
436 IfxScuCcu_K3divider_12, /**< \brief K3-Divider 12 */
437 IfxScuCcu_K3divider_13, /**< \brief K3-Divider 13 */
438 IfxScuCcu_K3divider_14, /**< \brief K3-Divider 14 */
439 IfxScuCcu_K3divider_15, /**< \brief K3-Divider 15 */
440 IfxScuCcu_K3divider_16, /**< \brief K3-Divider 16 */
441 IfxScuCcu_K3divider_17, /**< \brief K3-Divider 17 */
442 IfxScuCcu_K3divider_18, /**< \brief K3-Divider 18 */
443 IfxScuCcu_K3divider_19, /**< \brief K3-Divider 19 */
444 IfxScuCcu_K3divider_20, /**< \brief K3-Divider 20 */
445 IfxScuCcu_K3divider_21, /**< \brief K3-Divider 21 */
446 IfxScuCcu_K3divider_22, /**< \brief K3-Divider 22 */
447 IfxScuCcu_K3divider_23, /**< \brief K3-Divider 23 */
448 IfxScuCcu_K3divider_24, /**< \brief K3-Divider 24 */
449 IfxScuCcu_K3divider_25, /**< \brief K3-Divider 25 */
450 IfxScuCcu_K3divider_26, /**< \brief K3-Divider 26 */
451 IfxScuCcu_K3divider_27, /**< \brief K3-Divider 27 */
452 IfxScuCcu_K3divider_28, /**< \brief K3-Divider 28 */
453 IfxScuCcu_K3divider_29, /**< \brief K3-Divider 29 */
454 IfxScuCcu_K3divider_30, /**< \brief K3-Divider 30 */
455 IfxScuCcu_K3divider_31, /**< \brief K3-Divider 31 */
456 IfxScuCcu_K3divider_32, /**< \brief K3-Divider 32 */
457 IfxScuCcu_K3divider_33, /**< \brief K3-Divider 33 */
458 IfxScuCcu_K3divider_34, /**< \brief K3-Divider 34 */
459 IfxScuCcu_K3divider_35, /**< \brief K3-Divider 35 */
460 IfxScuCcu_K3divider_36, /**< \brief K3-Divider 36 */
461 IfxScuCcu_K3divider_37, /**< \brief K3-Divider 37 */
462 IfxScuCcu_K3divider_38, /**< \brief K3-Divider 38 */
463 IfxScuCcu_K3divider_39, /**< \brief K3-Divider 39 */
464 IfxScuCcu_K3divider_40, /**< \brief K3-Divider 40 */
465 IfxScuCcu_K3divider_41, /**< \brief K3-Divider 41 */
466 IfxScuCcu_K3divider_42, /**< \brief K3-Divider 42 */
467 IfxScuCcu_K3divider_43, /**< \brief K3-Divider 43 */
468 IfxScuCcu_K3divider_44, /**< \brief K3-Divider 44 */
469 IfxScuCcu_K3divider_45, /**< \brief K3-Divider 45 */
470 IfxScuCcu_K3divider_46, /**< \brief K3-Divider 46 */
471 IfxScuCcu_K3divider_47, /**< \brief K3-Divider 47 */
472 IfxScuCcu_K3divider_48, /**< \brief K3-Divider 48 */
473 IfxScuCcu_K3divider_49, /**< \brief K3-Divider 49 */
474 IfxScuCcu_K3divider_50, /**< \brief K3-Divider 50 */
475 IfxScuCcu_K3divider_51, /**< \brief K3-Divider 51 */
476 IfxScuCcu_K3divider_52, /**< \brief K3-Divider 52 */
477 IfxScuCcu_K3divider_53, /**< \brief K3-Divider 53 */
478 IfxScuCcu_K3divider_54, /**< \brief K3-Divider 54 */
479 IfxScuCcu_K3divider_55, /**< \brief K3-Divider 55 */
480 IfxScuCcu_K3divider_56, /**< \brief K3-Divider 56 */
481 IfxScuCcu_K3divider_57, /**< \brief K3-Divider 57 */
482 IfxScuCcu_K3divider_58, /**< \brief K3-Divider 58 */
483 IfxScuCcu_K3divider_59, /**< \brief K3-Divider 59 */
484 IfxScuCcu_K3divider_60, /**< \brief K3-Divider 60 */
485 IfxScuCcu_K3divider_61, /**< \brief K3-Divider 61 */
486 IfxScuCcu_K3divider_62, /**< \brief K3-Divider 62 */
487 IfxScuCcu_K3divider_63, /**< \brief K3-Divider 63 */
488 IfxScuCcu_K3divider_64, /**< \brief K3-Divider 64 */
489 IfxScuCcu_K3divider_65, /**< \brief K3-Divider 65 */
490 IfxScuCcu_K3divider_66, /**< \brief K3-Divider 66 */
491 IfxScuCcu_K3divider_67, /**< \brief K3-Divider 67 */
492 IfxScuCcu_K3divider_68, /**< \brief K3-Divider 68 */
493 IfxScuCcu_K3divider_69, /**< \brief K3-Divider 69 */
494 IfxScuCcu_K3divider_70, /**< \brief K3-Divider 70 */
495 IfxScuCcu_K3divider_71, /**< \brief K3-Divider 71 */
496 IfxScuCcu_K3divider_72, /**< \brief K3-Divider 72 */
497 IfxScuCcu_K3divider_73, /**< \brief K3-Divider 73 */
498 IfxScuCcu_K3divider_74, /**< \brief K3-Divider 74 */
499 IfxScuCcu_K3divider_75, /**< \brief K3-Divider 75 */
500 IfxScuCcu_K3divider_76, /**< \brief K3-Divider 76 */
501 IfxScuCcu_K3divider_77, /**< \brief K3-Divider 77 */
502 IfxScuCcu_K3divider_78, /**< \brief K3-Divider 78 */
503 IfxScuCcu_K3divider_79, /**< \brief K3-Divider 79 */
504 IfxScuCcu_K3divider_80, /**< \brief K3-Divider 80 */
505 IfxScuCcu_K3divider_81, /**< \brief K3-Divider 81 */
506 IfxScuCcu_K3divider_82, /**< \brief K3-Divider 82 */
507 IfxScuCcu_K3divider_83, /**< \brief K3-Divider 83 */
508 IfxScuCcu_K3divider_84, /**< \brief K3-Divider 84 */
509 IfxScuCcu_K3divider_85, /**< \brief K3-Divider 85 */
510 IfxScuCcu_K3divider_86, /**< \brief K3-Divider 86 */
511 IfxScuCcu_K3divider_87, /**< \brief K3-Divider 87 */
512 IfxScuCcu_K3divider_88, /**< \brief K3-Divider 88 */
513 IfxScuCcu_K3divider_89, /**< \brief K3-Divider 89 */
514 IfxScuCcu_K3divider_90, /**< \brief K3-Divider 90 */
515 IfxScuCcu_K3divider_91, /**< \brief K3-Divider 91 */
516 IfxScuCcu_K3divider_92, /**< \brief K3-Divider 92 */
517 IfxScuCcu_K3divider_93, /**< \brief K3-Divider 93 */
518 IfxScuCcu_K3divider_94, /**< \brief K3-Divider 94 */
519 IfxScuCcu_K3divider_95, /**< \brief K3-Divider 95 */
520 IfxScuCcu_K3divider_96, /**< \brief K3-Divider 96 */
521 IfxScuCcu_K3divider_97, /**< \brief K3-Divider 97 */
522 IfxScuCcu_K3divider_98, /**< \brief K3-Divider 98 */
523 IfxScuCcu_K3divider_99, /**< \brief K3-Divider 99 */
524 IfxScuCcu_K3divider_100, /**< \brief K3-Divider 100 */
525 IfxScuCcu_K3divider_101, /**< \brief K3-Divider 101 */
526 IfxScuCcu_K3divider_102, /**< \brief K3-Divider 102 */
527 IfxScuCcu_K3divider_103, /**< \brief K3-Divider 103 */
528 IfxScuCcu_K3divider_104, /**< \brief K3-Divider 104 */
529 IfxScuCcu_K3divider_105, /**< \brief K3-Divider 105 */
530 IfxScuCcu_K3divider_106, /**< \brief K3-Divider 106 */
531 IfxScuCcu_K3divider_107, /**< \brief K3-Divider 107 */
532 IfxScuCcu_K3divider_108, /**< \brief K3-Divider 108 */
533 IfxScuCcu_K3divider_109, /**< \brief K3-Divider 109 */
534 IfxScuCcu_K3divider_110, /**< \brief K3-Divider 110 */
535 IfxScuCcu_K3divider_111, /**< \brief K3-Divider 111 */
536 IfxScuCcu_K3divider_112, /**< \brief K3-Divider 112 */
537 IfxScuCcu_K3divider_113, /**< \brief K3-Divider 113 */
538 IfxScuCcu_K3divider_114, /**< \brief K3-Divider 114 */
539 IfxScuCcu_K3divider_115, /**< \brief K3-Divider 115 */
540 IfxScuCcu_K3divider_116, /**< \brief K3-Divider 116 */
541 IfxScuCcu_K3divider_117, /**< \brief K3-Divider 117 */
542 IfxScuCcu_K3divider_118, /**< \brief K3-Divider 118 */
543 IfxScuCcu_K3divider_119, /**< \brief K3-Divider 119 */
544 IfxScuCcu_K3divider_120, /**< \brief K3-Divider 120 */
545 IfxScuCcu_K3divider_121, /**< \brief K3-Divider 121 */
546 IfxScuCcu_K3divider_122, /**< \brief K3-Divider 122 */
547 IfxScuCcu_K3divider_123, /**< \brief K3-Divider 123 */
548 IfxScuCcu_K3divider_124, /**< \brief K3-Divider 124 */
549 IfxScuCcu_K3divider_125, /**< \brief K3-Divider 125 */
550 IfxScuCcu_K3divider_126, /**< \brief K3-Divider 126 */
551 IfxScuCcu_K3divider_127, /**< \brief K3-Divider 127 */
552 IfxScuCcu_K3divider_128 /**< \brief K3-Divider 128 */
553 } IfxScuCcu_K3divider;
554
555 /** \brief MODULE_SCU.PLLCON0.B.NDIV, specifies the N-Divider
556 */
557 typedef enum
558 {
559 IfxScuCcu_Ndivider_1 = 0, /**< \brief N-divider 1 */
560 IfxScuCcu_Ndivider_2, /**< \brief N-divider 2 */
561 IfxScuCcu_Ndivider_3, /**< \brief N-divider 3 */
562 IfxScuCcu_Ndivider_4, /**< \brief N-divider 4 */
563 IfxScuCcu_Ndivider_5, /**< \brief N-divider 5 */
564 IfxScuCcu_Ndivider_6, /**< \brief N-divider 6 */
565 IfxScuCcu_Ndivider_7, /**< \brief N-divider 7 */
566 IfxScuCcu_Ndivider_8, /**< \brief N-divider 8 */
567 IfxScuCcu_Ndivider_9, /**< \brief N-divider 9 */
568 IfxScuCcu_Ndivider_10, /**< \brief N-divider 10 */
569 IfxScuCcu_Ndivider_11, /**< \brief N-divider 11 */
570 IfxScuCcu_Ndivider_12, /**< \brief N-divider 12 */
571 IfxScuCcu_Ndivider_13, /**< \brief N-divider 13 */
572 IfxScuCcu_Ndivider_14, /**< \brief N-divider 14 */
573 IfxScuCcu_Ndivider_15, /**< \brief N-divider 15 */
574 IfxScuCcu_Ndivider_16, /**< \brief N-divider 16 */
575 IfxScuCcu_Ndivider_17, /**< \brief N-divider 17 */
576 IfxScuCcu_Ndivider_18, /**< \brief N-divider 18 */
577 IfxScuCcu_Ndivider_19, /**< \brief N-divider 19 */
578 IfxScuCcu_Ndivider_20, /**< \brief N-divider 20 */
579 IfxScuCcu_Ndivider_21, /**< \brief N-divider 21 */
580 IfxScuCcu_Ndivider_22, /**< \brief N-divider 22 */
581 IfxScuCcu_Ndivider_23, /**< \brief N-divider 23 */
582 IfxScuCcu_Ndivider_24, /**< \brief N-divider 24 */
583 IfxScuCcu_Ndivider_25, /**< \brief N-divider 25 */
584 IfxScuCcu_Ndivider_26, /**< \brief N-divider 26 */
585 IfxScuCcu_Ndivider_27, /**< \brief N-divider 27 */
586 IfxScuCcu_Ndivider_28, /**< \brief N-divider 28 */
587 IfxScuCcu_Ndivider_29, /**< \brief N-divider 29 */
588 IfxScuCcu_Ndivider_30, /**< \brief N-divider 30 */
589 IfxScuCcu_Ndivider_31, /**< \brief N-divider 31 */
590 IfxScuCcu_Ndivider_32, /**< \brief N-divider 32 */
591 IfxScuCcu_Ndivider_33, /**< \brief N-divider 33 */
592 IfxScuCcu_Ndivider_34, /**< \brief N-divider 34 */
593 IfxScuCcu_Ndivider_35, /**< \brief N-divider 35 */
594 IfxScuCcu_Ndivider_36, /**< \brief N-divider 36 */
595 IfxScuCcu_Ndivider_37, /**< \brief N-divider 37 */
596 IfxScuCcu_Ndivider_38, /**< \brief N-divider 38 */
597 IfxScuCcu_Ndivider_39, /**< \brief N-divider 39 */
598 IfxScuCcu_Ndivider_40, /**< \brief N-divider 40 */
599 IfxScuCcu_Ndivider_41, /**< \brief N-divider 41 */
600 IfxScuCcu_Ndivider_42, /**< \brief N-divider 42 */
601 IfxScuCcu_Ndivider_43, /**< \brief N-divider 43 */
602 IfxScuCcu_Ndivider_44, /**< \brief N-divider 44 */
603 IfxScuCcu_Ndivider_45, /**< \brief N-divider 45 */
604 IfxScuCcu_Ndivider_46, /**< \brief N-divider 46 */
605 IfxScuCcu_Ndivider_47, /**< \brief N-divider 47 */
606 IfxScuCcu_Ndivider_48, /**< \brief N-divider 48 */
607 IfxScuCcu_Ndivider_49, /**< \brief N-divider 49 */
608 IfxScuCcu_Ndivider_50, /**< \brief N-divider 50 */
609 IfxScuCcu_Ndivider_51, /**< \brief N-divider 51 */
610 IfxScuCcu_Ndivider_52, /**< \brief N-divider 52 */
611 IfxScuCcu_Ndivider_53, /**< \brief N-divider 53 */
612 IfxScuCcu_Ndivider_54, /**< \brief N-divider 54 */
613 IfxScuCcu_Ndivider_55, /**< \brief N-divider 55 */
614 IfxScuCcu_Ndivider_56, /**< \brief N-divider 56 */
615 IfxScuCcu_Ndivider_57, /**< \brief N-divider 57 */
616 IfxScuCcu_Ndivider_58, /**< \brief N-divider 58 */
617 IfxScuCcu_Ndivider_59, /**< \brief N-divider 59 */
618 IfxScuCcu_Ndivider_60, /**< \brief N-divider 60 */
619 IfxScuCcu_Ndivider_61, /**< \brief N-divider 61 */
620 IfxScuCcu_Ndivider_62, /**< \brief N-divider 62 */
621 IfxScuCcu_Ndivider_63, /**< \brief N-divider 63 */
622 IfxScuCcu_Ndivider_64, /**< \brief N-divider 64 */
623 IfxScuCcu_Ndivider_65, /**< \brief N-divider 65 */
624 IfxScuCcu_Ndivider_66, /**< \brief N-divider 66 */
625 IfxScuCcu_Ndivider_67, /**< \brief N-divider 67 */
626 IfxScuCcu_Ndivider_68, /**< \brief N-divider 68 */
627 IfxScuCcu_Ndivider_69, /**< \brief N-divider 69 */
628 IfxScuCcu_Ndivider_70, /**< \brief N-divider 70 */
629 IfxScuCcu_Ndivider_71, /**< \brief N-divider 71 */
630 IfxScuCcu_Ndivider_72, /**< \brief N-divider 72 */
631 IfxScuCcu_Ndivider_73, /**< \brief N-divider 73 */
632 IfxScuCcu_Ndivider_74, /**< \brief N-divider 74 */
633 IfxScuCcu_Ndivider_75, /**< \brief N-divider 75 */
634 IfxScuCcu_Ndivider_76, /**< \brief N-divider 76 */
635 IfxScuCcu_Ndivider_77, /**< \brief N-divider 77 */
636 IfxScuCcu_Ndivider_78, /**< \brief N-divider 78 */
637 IfxScuCcu_Ndivider_79, /**< \brief N-divider 79 */
638 IfxScuCcu_Ndivider_80, /**< \brief N-divider 80 */
639 IfxScuCcu_Ndivider_81, /**< \brief N-divider 81 */
640 IfxScuCcu_Ndivider_82, /**< \brief N-divider 82 */
641 IfxScuCcu_Ndivider_83, /**< \brief N-divider 83 */
642 IfxScuCcu_Ndivider_84, /**< \brief N-divider 84 */
643 IfxScuCcu_Ndivider_85, /**< \brief N-divider 85 */
644 IfxScuCcu_Ndivider_86, /**< \brief N-divider 86 */
645 IfxScuCcu_Ndivider_87, /**< \brief N-divider 87 */
646 IfxScuCcu_Ndivider_88, /**< \brief N-divider 88 */
647 IfxScuCcu_Ndivider_89, /**< \brief N-divider 89 */
648 IfxScuCcu_Ndivider_90, /**< \brief N-divider 90 */
649 IfxScuCcu_Ndivider_91, /**< \brief N-divider 91 */
650 IfxScuCcu_Ndivider_92, /**< \brief N-divider 92 */
651 IfxScuCcu_Ndivider_93, /**< \brief N-divider 93 */
652 IfxScuCcu_Ndivider_94, /**< \brief N-divider 94 */
653 IfxScuCcu_Ndivider_95, /**< \brief N-divider 95 */
654 IfxScuCcu_Ndivider_96, /**< \brief N-divider 96 */
655 IfxScuCcu_Ndivider_97, /**< \brief N-divider 97 */
656 IfxScuCcu_Ndivider_98, /**< \brief N-divider 98 */
657 IfxScuCcu_Ndivider_99, /**< \brief N-divider 99 */
658 IfxScuCcu_Ndivider_100, /**< \brief N-divider 100 */
659 IfxScuCcu_Ndivider_101, /**< \brief N-divider 101 */
660 IfxScuCcu_Ndivider_102, /**< \brief N-divider 102 */
661 IfxScuCcu_Ndivider_103, /**< \brief N-divider 103 */
662 IfxScuCcu_Ndivider_104, /**< \brief N-divider 104 */
663 IfxScuCcu_Ndivider_105, /**< \brief N-divider 105 */
664 IfxScuCcu_Ndivider_106, /**< \brief N-divider 106 */
665 IfxScuCcu_Ndivider_107, /**< \brief N-divider 107 */
666 IfxScuCcu_Ndivider_108, /**< \brief N-divider 108 */
667 IfxScuCcu_Ndivider_109, /**< \brief N-divider 109 */
668 IfxScuCcu_Ndivider_110, /**< \brief N-divider 110 */
669 IfxScuCcu_Ndivider_111, /**< \brief N-divider 111 */
670 IfxScuCcu_Ndivider_112, /**< \brief N-divider 112 */
671 IfxScuCcu_Ndivider_113, /**< \brief N-divider 113 */
672 IfxScuCcu_Ndivider_114, /**< \brief N-divider 114 */
673 IfxScuCcu_Ndivider_115, /**< \brief N-divider 115 */
674 IfxScuCcu_Ndivider_116, /**< \brief N-divider 116 */
675 IfxScuCcu_Ndivider_117, /**< \brief N-divider 117 */
676 IfxScuCcu_Ndivider_118, /**< \brief N-divider 118 */
677 IfxScuCcu_Ndivider_119, /**< \brief N-divider 119 */
678 IfxScuCcu_Ndivider_120, /**< \brief N-divider 120 */
679 IfxScuCcu_Ndivider_121, /**< \brief N-divider 121 */
680 IfxScuCcu_Ndivider_122, /**< \brief N-divider 122 */
681 IfxScuCcu_Ndivider_123, /**< \brief N-divider 123 */
682 IfxScuCcu_Ndivider_124, /**< \brief N-divider 124 */
683 IfxScuCcu_Ndivider_125, /**< \brief N-divider 125 */
684 IfxScuCcu_Ndivider_126, /**< \brief N-divider 126 */
685 IfxScuCcu_Ndivider_127, /**< \brief N-divider 127 */
686 IfxScuCcu_Ndivider_128 /**< \brief N-divider 128 */
687 } IfxScuCcu_Ndivider;
688
689 /** \brief MODULE_SCU.PLLCON0.B.PDIV, specifies the P-Divider
690 */
691 typedef enum
692 {
693 IfxScuCcu_Pdivider_1 = 0, /**< \brief P-divider 1 */
694 IfxScuCcu_Pdivider_2, /**< \brief P-divider 2 */
695 IfxScuCcu_Pdivider_3, /**< \brief P-divider 3 */
696 IfxScuCcu_Pdivider_4, /**< \brief P-divider 4 */
697 IfxScuCcu_Pdivider_5, /**< \brief P-divider 5 */
698 IfxScuCcu_Pdivider_6, /**< \brief P-divider 6 */
699 IfxScuCcu_Pdivider_7, /**< \brief P-divider 7 */
700 IfxScuCcu_Pdivider_8, /**< \brief P-divider 8 */
701 IfxScuCcu_Pdivider_9, /**< \brief P-divider 9 */
702 IfxScuCcu_Pdivider_10, /**< \brief P-divider 10 */
703 IfxScuCcu_Pdivider_11, /**< \brief P-divider 11 */
704 IfxScuCcu_Pdivider_12, /**< \brief P-divider 12 */
705 IfxScuCcu_Pdivider_13, /**< \brief P-divider 13 */
706 IfxScuCcu_Pdivider_14, /**< \brief P-divider 14 */
707 IfxScuCcu_Pdivider_15, /**< \brief P-divider 15 */
708 IfxScuCcu_Pdivider_16 /**< \brief P-divider 16 */
709 } IfxScuCcu_Pdivider;
710
711 /** \} */
712
713 /******************************************************************************/
714 /*-----------------------------Data Structures--------------------------------*/
715 /******************************************************************************/
716
717 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu
718 * \{ */
719 /** \brief Configuration structure type for CCUCON registers.
720 */
721 typedef struct
722 {
723 uint32 value; /**< \brief CCUCON Register value to be updated. */
724 uint32 mask; /**< \brief CCUCON Mask to select the bit fields to be updated. */
725 } IfxScuCcu_CcuconRegConfig;
726
727 /** \brief Configuration structure type for the Pll initial step.
728 * This structure must be used to configure the P, N and K2 dividers for initial step.
729 */
730 typedef struct
731 {
732 uint8 pDivider; /**< \brief P divider value for basic (initial) step */
733 uint8 nDivider; /**< \brief N divider value for basic (initial) step */
734 uint8 k2Initial; /**< \brief K2 divider value for basic (initial) step */
735 float32 waitTime; /**< \brief Wait time for for basic (initial) step */
736 } IfxScuCcu_InitialStepConfig;
737
738 /** \brief Configuration structure type for the Pll Steps for current jump control.
739 */
740 typedef struct
741 {
742 uint8 k2Step; /**< \brief K2 divider value for this step. */
743 float32 waitTime; /**< \brief Wait time for for this step. */
744 IfxScuCcu_PllStepsFunctionHook hookFunction; /**< \brief Hook function called at the end of this step. */
745 } IfxScuCcu_PllStepsConfig;
746
747 /** \} */
748
749 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu
750 * \{ */
751 /** \brief Configuration structure type for all the CCUCON registers to configure clock distribution.
752 */
753 typedef struct
754 {
755 IfxScuCcu_CcuconRegConfig ccucon0; /**< \brief CCUCON0 Register configuration */
756 IfxScuCcu_CcuconRegConfig ccucon1; /**< \brief CCUCON1 Register configuration */
757 IfxScuCcu_CcuconRegConfig ccucon2; /**< \brief CCUCON2 Register configuration */
758 IfxScuCcu_CcuconRegConfig ccucon5; /**< \brief CCUCON5 Register configuration */
759 IfxScuCcu_CcuconRegConfig ccucon6; /**< \brief CCUCON6 Register configuration */
760 IfxScuCcu_CcuconRegConfig ccucon7; /**< \brief CCUCON7 Register configuration */
761 } IfxScuCcu_ClockDistributionConfig;
762
763 /** \brief Configuration structure type for the Flash waitstate configuration.
764 */
765 typedef struct
766 {
767 uint32 value; /**< \brief FLASH.FCON Register value to be updated. */
768 uint32 mask; /**< \brief FLASH.FCON Mask to select the bit fields to be updated. */
769 } IfxScuCcu_FlashWaitstateConfig;
770
771 /** \brief Configuration structure type for the System Pll step.
772 * This structure must be used to configure the P, N and K1 dividers .
773 */
774 typedef struct
775 {
776 uint8 numOfPllDividerSteps; /**< \brief Number of PLL divider steps during clock throttling. */
777 IfxScuCcu_PllStepsConfig *pllDividerStep; /**< \brief Pointer to the array of Pll divider step configuration. */
778 IfxScuCcu_InitialStepConfig pllInitialStep; /**< \brief Configuration of first step which is same as internal osc frequency. */
779 } IfxScuCcu_SysPllConfig;
780
781 /** \} */
782
783 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu
784 * \{ */
785 /** \brief Configuration structure SCU module
786 */
787 typedef struct
788 {
789 IfxScuCcu_SysPllConfig sysPll; /**< \brief System PLL configuration */
790 IfxScuCcu_ClockDistributionConfig clockDistribution; /**< \brief Configuration of of bus clocks and other module clock distribution. */
791 IfxScuCcu_FlashWaitstateConfig flashFconWaitStateConfig; /**< \brief Configuration of flash waitstate */
792 uint32 xtalFrequency; /**< \brief Xtal Frequency */
793 } IfxScuCcu_Config;
794
795 /** \brief Configuration structure for E-ray PLL
796 */
797 typedef struct
798 {
799 IfxScuCcu_InitialStepConfig pllInitialStep; /**< \brief Configuration of first step which is same as internal osc frequency. */
800 } IfxScuCcu_ErayPllConfig;
801
802 /** \} */
803
804 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu_Operative
805 * \{ */
806
807 /******************************************************************************/
808 /*-------------------------Inline Function Prototypes-------------------------*/
809 /******************************************************************************/
810
811 /** \brief API to get EVR Oscillator frequency.
812 * This API returns the constant which is specific to the ScuCcu of the controller.
813 * \return EVR Oscillator frequency (fBACK or fEVR) in Hz.
814 */
815 IFX_INLINE float32 IfxScuCcu_getEvrFrequency(void);
816
817 /** \brief API to get actual PLL2 (K3 Divider for ADC clock) frequency
818 * This API returns the PLL2ERAY frequency based on the K3 divider value in PLLERAYCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock.
819 * \return PLL2ERAY (K3 Divider for ADC clock) frequency in Hz
820 */
821 IFX_INLINE float32 IfxScuCcu_getPll2ErayFrequency(void);
822
823 /** \brief API to get actual PLL2 (K3 Divider for ADC clock) frequency
824 * This API returns the PLL2 frequency based on the K3 divider value in PLLCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock.
825 * \return PLL2 (K3 Divider for ADC clock) frequency in Hz
826 */
827 IFX_INLINE float32 IfxScuCcu_getPll2Frequency(void);
828
829 /** \brief Returns the clock source selection
830 * \return Clock source selection
831 */
832 IFX_INLINE IfxScu_CCUCON0_CLKSEL IfxScuCcu_getSourceSelection(void);
833
834 /** \brief API to get STM divider frequency.
835 * This API returns the based on the divider value in CCUCON register and fSOURCE.
836 * \return STM frequency (fSTM) in Hz
837 */
838 IFX_INLINE float32 IfxScuCcu_getStmFrequency(void);
839
840 /** \brief API to get CAN divider frequency.
841 * This API returns the fCAN frequency based on the divider value in CCUCON register and fSOURCE.
842 * \return STM frequency (fSTM) in Hz
843 */
844 IFX_INLINE float32 IfxScuCcu_getCanFrequency(void);
845
846 /******************************************************************************/
847 /*-------------------------Global Function Prototypes-------------------------*/
848 /******************************************************************************/
849
850 /** \brief API to get BAUD1 divider frequency.
851 * This API returns the based on the divider value in CCUCON register and the input oscillator.
852 * \return Baud1 frequency in Hz
853 */
854 IFX_EXTERN float32 IfxScuCcu_getBaud1Frequency(void);
855
856 /** \brief API to get BAUD2 divider frequency.
857 * This API returns the Baud2 frequency based on the divider value in CCUCON register and the fMAX.
858 * \return Baud2 frequency in Hz
859 */
860 IFX_EXTERN float32 IfxScuCcu_getBaud2Frequency(void);
861
862 /** \brief API to get BBB divider frequency.
863 * This API returns the BBBDivider frequency based on the divider value in CCUCON register and the input oscillator.
864 * \return BBB frequency (fBBB) in Hz
865 */
866 IFX_EXTERN float32 IfxScuCcu_getBbbFrequency(void);
867
868 /** \brief This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequency
869 * \param cpu CPU number for which effective fCPU is sought
870 * \return Cpu[x] frequency in Hz, where x is cpu number passed as parameter
871 */
872 IFX_EXTERN float32 IfxScuCcu_getCpuFrequency(const IfxCpu_ResourceCpu cpu);
873
874 /** \brief API to get FSI2 divider frequency in Hz.
875 * This API returns the fFSI2 frequency based on the divider value in CCUCON register and the input oscillator.
876 * \return FSI2 frequency (fFSI2) in Hz.
877 */
878 IFX_EXTERN float32 IfxScuCcu_getFsi2Frequency(void);
879
880 /** \brief API to get FSI divider frequency in Hz.
881 * This API returns the fFSI based on the divider value in CCUCON register and the input oscillator.
882 * \return FSI frequency (fFSI) in Hz.
883 */
884 IFX_EXTERN float32 IfxScuCcu_getFsiFrequency(void);
885
886 /** \brief API to get FMAX divider frequency.
887 * This API returns the fMax frequency based on the divider value in CCUCON register and the input oscillator.
888 * \return Max frequency (fMAX) in Hz.
889 */
890 IFX_EXTERN float32 IfxScuCcu_getMaxFrequency(void);
891
892 /** \brief get source frequency fSOURCE.
893 * This API returns the source frequency based on the configurations with CCUCON register configuration.
894 * \return Module frequency in Hz
895 */
896 IFX_EXTERN float32 IfxScuCcu_getModuleFrequency(void);
897
898 /** \brief API to get Oscillator 0 frequency.
899 * This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator.
900 * \return Osc0 frequency (fOSC0) in Hz.
901 */
902 IFX_EXTERN float32 IfxScuCcu_getOsc0Frequency(void);
903
904 /** \brief API to get Oscillator 0 frequency.
905 * This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator.
906 * \return Osc frequency (fOSC) in Hz.
907 */
908 IFX_EXTERN float32 IfxScuCcu_getOscFrequency(void);
909
910 /** \brief API to get actual PLL (Eray) frequency.
911 * This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator.
912 * \return frequency of Pll Eray (fPLLERAY) in Hz
913 */
914 IFX_EXTERN float32 IfxScuCcu_getPllErayFrequency(void);
915
916 /** \brief API to get actual ERAY PLL Voltage Controlled Oscillator frequency.
917 * This API returns the based on the divider values in PLLERAYCON registers and the input oscillator.
918 * \return Pll (Eray) VCO frequency
919 */
920 IFX_EXTERN float32 IfxScuCcu_getPllErayVcoFrequency(void);
921
922 /** \brief API to get actual PLL output frequency.
923 * This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator.
924 * \return Pll (fPLL) frequency in Hz
925 */
926 IFX_EXTERN float32 IfxScuCcu_getPllFrequency(void);
927
928 /** \brief API to get actual PLL Voltage Controlled Oscillator frequency.
929 * This API returns the based on the divider values in PLLCON registers and the input oscillator.
930 * \return Pll VCO frequency
931 */
932 IFX_EXTERN float32 IfxScuCcu_getPllVcoFrequency(void);
933
934 /** \brief get source frequency fSOURCE.
935 * This API returns the source frequency based on the configurations with CCUCON register configuration.
936 * \return Effective fSOURCE in Hz
937 */
938 IFX_EXTERN float32 IfxScuCcu_getSourceFrequency(void);
939
940 /** \brief API to get SPB divider frequency.
941 * This API returns the based on fSOURCE and also on Low power divider mode and/or SPBDIV divider value in CCUCON registers.
942 * \return SPB frequency (fSPB) in Hz
943 */
944 IFX_EXTERN float32 IfxScuCcu_getSpbFrequency(void);
945
946 /** \brief API to get SRI divider frequency.
947 * This API returns the Sri frequency based on the divider values in CCUCON registers and fSOURCE.
948 * \return Sri frequency (fSRI) in Hz
949 */
950 IFX_EXTERN float32 IfxScuCcu_getSriFrequency(void);
951
952 /** \brief API to set CPU frequency (with CPU divider)
953 * This API configure CPU divider values in CCUCON registers. The actual frequency is always depends on the feasibility with the divider value
954 * \param cpu CPU number for which fCPU to be configured
955 * \param cpuFreq Desired CPU frequency in Hz
956 * \return Actual CPU[x] frequency in Hz, where x is the cpu number passed as parameter
957 */
958 IFX_EXTERN float32 IfxScuCcu_setCpuFrequency(IfxCpu_ResourceCpu cpu, float32 cpuFreq);
959
960 /** \brief API to configure PLL2ERAY (K3 Divider for ADC clock) for desired frequency.
961 * This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value
962 * \param pll2ErayFreq PLL2ERAY (K3 Divider for ADC clock) frequency in Hz
963 * \return Actual PLL2 (K3 Divider for ADC clock) frequency in Hz
964 */
965 IFX_EXTERN float32 IfxScuCcu_setPll2ErayFrequency(float32 pll2ErayFreq);
966
967 /** \brief API to configure PLL2 (K3 Divider for ADC clock) for desired frequency.
968 * This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value
969 * \param pll2Freq PLL2 (K3 Divider for ADC clock) frequency in Hz
970 * \return Actual PLL2 (K3 Divider for ADC clock) frequency in Hz
971 */
972 IFX_EXTERN float32 IfxScuCcu_setPll2Frequency(float32 pll2Freq);
973
974 /** \brief API to set SPB frequency (with SPB divider)
975 * This API configure SPB divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
976 * \param spbFreq Desired SPB frequency in Hz
977 * \return Actual SPB frequency in Hz
978 */
979 IFX_EXTERN float32 IfxScuCcu_setSpbFrequency(float32 spbFreq);
980
981 /** \brief API to set SRI frequency (with SRI divider)
982 * This API configure Sri divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
983 * \param sriFreq Sri frequency (fSRI) in Hz
984 * \return Actual Sri frequency (fSRI) in Hz
985 */
986 IFX_EXTERN float32 IfxScuCcu_setSriFrequency(float32 sriFreq);
987
988 /** \} */
989
990 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu_Configuration
991 * \{ */
992
993 /******************************************************************************/
994 /*-------------------------Global Function Prototypes-------------------------*/
995 /******************************************************************************/
996
997 /** \brief The api calculates the system PLL divider values P, N, K based on given xtal frequency and PLL frequency.
998 * \param cfg Pointer to the configuration structure of the ScuCcu
999 * \param fPll Desired PLL frequency.
1000 * \return 0- Success, 1 - Failure
1001 */
1002 IFX_EXTERN boolean IfxScuCcu_calculateSysPllDividers(IfxScuCcu_Config *cfg, uint32 fPll);
1003
1004 /** \brief API to initialize the SCU Clock Control Unit.
1005 * This API initialize the PLL with ramp steps, BUS dividers for the configuration provided by the configuration structure.
1006 * \param cfg Pointer to the configuration structure of the ScuCcu
1007 * \return Error status of the ScuCcu initialization process.
1008 * \retval TRUE: If an error occurred during initialization.
1009 * \retval FALSE: If initialization was successful.
1010 */
1011 IFX_EXTERN boolean IfxScuCcu_init(const IfxScuCcu_Config *cfg);
1012
1013 /** \brief Initializes the clock configuration with default values
1014 * \param cfg Pointer to the configuration structure of the ScuCcu
1015 * \return None
1016 */
1017 IFX_EXTERN void IfxScuCcu_initConfig(IfxScuCcu_Config *cfg);
1018
1019 /** \brief API to initialize the SCU Eray Pll
1020 * This API initialize the Eray PLL for the configuration provided by the configuration structure.
1021 * \param cfg Pointer to the configuration structure of the Eray Pll
1022 * \return Error status of the ScuCcu Eray Pll initialization process.
1023 * \retval TRUE: If an error occurred during initialization.
1024 * \retval FALSE: If initialization was successful.
1025 */
1026 IFX_EXTERN boolean IfxScuCcu_initErayPll(const IfxScuCcu_ErayPllConfig *cfg);
1027
1028 /** \brief Initializes the clock configuration with default values
1029 * \param cfg Pointer to the configuration structure of the ScuCcuEray Pll
1030 * \return None
1031 */
1032 IFX_EXTERN void IfxScuCcu_initErayPllConfig(IfxScuCcu_ErayPllConfig *cfg);
1033
1034 /** \brief API to switch to Backup clock from the current PLL frequency.
1035 * \param cfg Pointer to the configuration structure of the ScuCcu
1036 * \return None
1037 */
1038 IFX_EXTERN void IfxScuCcu_switchToBackupClock(const IfxScuCcu_Config *cfg);
1039
1040 /** \} */
1041
1042 /******************************************************************************/
1043 /*-------------------------Inline Function Prototypes-------------------------*/
1044 /******************************************************************************/
1045
1046 /** \brief API to get GTMdivider frequency
1047 * This API returns the based on the divider value in CCUCON register and fSOURCE.
1048 * return GTM frequency (fGTM) in Hz
1049 * \return Gtm Frequency
1050 */
1051 IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void);
1052
1053 /******************************************************************************/
1054 /*-------------------------Global Function Prototypes-------------------------*/
1055 /******************************************************************************/
1056
1057 /** \brief API to set GTM frequency (with GTM divider)
1058 * This API configure GTM divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
1059 * \param gtmFreq Desired GTM frequency in Hz
1060 * \return Actual GTM frequency in HZ
1061 */
1062 IFX_EXTERN float32 IfxScuCcu_setGtmFrequency(float32 gtmFreq);
1063
1064 /******************************************************************************/
1065 /*-------------------Global Exported Variables/Constants----------------------*/
1066 /******************************************************************************/
1067
1068 /** \brief Configuration structure for SCU CCU driver.
1069 * The values of this structure are defined as # defined macros in the implementation of Scu
1070 */
1071 IFX_EXTERN IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig;
1072
1073 /** \brief Configuration structure for SCU CCU driver.
1074 * The values of this structure are defined as # defined macros in the implementation of Scu
1075 */
1076 IFX_EXTERN IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig;
1077
1078 /******************************************************************************/
1079 /*---------------------Inline Function Implementations------------------------*/
1080 /******************************************************************************/
1081
1082 IFX_INLINE float32 IfxScuCcu_getEvrFrequency(void)
1083 {
1084 return IFXSCU_EVR_OSC_FREQUENCY;
1085 }
1086
1087
1088 IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void)
1089 {
1090 return IfxScuCcu_getSourceFrequency() / SCU_CCUCON1.B.GTMDIV;
1091 }
1092
1093
1094 IFX_INLINE float32 IfxScuCcu_getPll2ErayFrequency(void)
1095 {
1096 float32 pll2ErayFrequency;
1097
1098 pll2ErayFrequency = IfxScuCcu_getPllErayVcoFrequency() / (SCU_PLLERAYCON1.B.K3DIV + 1);
1099
1100 return pll2ErayFrequency;
1101 }
1102
1103
1104 IFX_INLINE float32 IfxScuCcu_getPll2Frequency(void)
1105 {
1106 float32 pll2Frequency;
1107 pll2Frequency = IfxScuCcu_getPllVcoFrequency() / (SCU_PLLCON1.B.K3DIV + 1);
1108
1109 return pll2Frequency;
1110 }
1111
1112
1113 IFX_INLINE IfxScu_CCUCON0_CLKSEL IfxScuCcu_getSourceSelection(void)
1114 {
1115 return (IfxScu_CCUCON0_CLKSEL)SCU_CCUCON0.B.CLKSEL;
1116 }
1117
1118
1119 IFX_INLINE float32 IfxScuCcu_getStmFrequency(void)
1120 {
1121 return IfxScuCcu_getSourceFrequency() / SCU_CCUCON1.B.STMDIV;
1122 }
1123
1124
1125 IFX_INLINE float32 IfxScuCcu_getCanFrequency(void)
1126 {
1127 float32 canFrequency;
1128 float32 sourceFrequency;
1129
1130 sourceFrequency = IfxScuCcu_getSourceFrequency();
1131
1132 if (SCU_CCUCON1.B.CANDIV == 0)
1133 {
1134 canFrequency = 0.0;
1135 }
1136 else
1137 {
1138 canFrequency = sourceFrequency / SCU_CCUCON1.B.CANDIV;
1139 }
1140
1141 return canFrequency;
1142 }
1143
1144
1145 #endif /* IFXSCUCCU_H */
IfxScuCcu_K3divider_122
K3-Divider 122.
Definition: IfxScuCcu.h:546
IfxScuCcu_K3divider_44
K3-Divider 44.
Definition: IfxScuCcu.h:468
IfxScuCcu_K1divider_45
K1-Divider 45.
Definition: IfxScuCcu.h:201
IfxScuCcu_K1divider_111
K1-Divider 111.
Definition: IfxScuCcu.h:267
IfxScuCcu_K3divider_5
K3-Divider 5.
Definition: IfxScuCcu.h:429
IfxScuCcu_Ndivider_5
N-divider 5.
Definition: IfxScuCcu.h:563
IfxScuCcu_K3divider_58
K3-Divider 58.
Definition: IfxScuCcu.h:482
IfxScuCcu_K3divider_84
K3-Divider 84.
Definition: IfxScuCcu.h:508
IfxScuCcu_K1divider_24
K1-Divider 24.
Definition: IfxScuCcu.h:180
IfxScuCcu_PllStepsConfig::k2Step
uint8 k2Step
K2 divider value for this step.
Definition: IfxScuCcu.h:742
IfxScuCcu_Ndivider_33
N-divider 33.
Definition: IfxScuCcu.h:591
IfxScuCcu_K2divider_126
K2-Divider 126.
Definition: IfxScuCcu.h:416
IfxScuCcu_Ndivider_23
N-divider 23.
Definition: IfxScuCcu.h:581
IfxScuCcu_K2divider_86
K2-Divider 86.
Definition: IfxScuCcu.h:376
IfxScuCcu_Ndivider_77
N-divider 77.
Definition: IfxScuCcu.h:635
IfxScuCcu_K3divider_63
K3-Divider 63.
Definition: IfxScuCcu.h:487
IfxScuCcu_K2divider_110
K2-Divider 110.
Definition: IfxScuCcu.h:400
IfxScuCcu_K1divider_6
K1-Divider 6.
Definition: IfxScuCcu.h:162
IfxScuCcu_K2divider_17
K2-Divider 17.
Definition: IfxScuCcu.h:307
IfxScuCcu_K3divider_98
K3-Divider 98.
Definition: IfxScuCcu.h:522
IfxScuCcu_K1divider_5
K1-Divider 5.
Definition: IfxScuCcu.h:161
IfxScuCcu_K2divider_57
K2-Divider 57.
Definition: IfxScuCcu.h:347
IfxScuCcu_getSpbFrequency
IFX_EXTERN float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:572
IfxScuCcu_ClockDistributionConfig::ccucon1
IfxScuCcu_CcuconRegConfig ccucon1
CCUCON1 Register configuration.
Definition: IfxScuCcu.h:756
IfxScuCcu_K2divider_107
K2-Divider 107.
Definition: IfxScuCcu.h:397
IfxScuCcu_Ndivider_11
N-divider 11.
Definition: IfxScuCcu.h:569
IfxScuCcu_ClockDistributionConfig::ccucon0
IfxScuCcu_CcuconRegConfig ccucon0
CCUCON0 Register configuration.
Definition: IfxScuCcu.h:755
IfxScuCcu_K1divider_32
K1-Divider 32.
Definition: IfxScuCcu.h:188
IfxScuCcu_K3divider_53
K3-Divider 53.
Definition: IfxScuCcu.h:477
IfxScuCcu_K3divider_47
K3-Divider 47.
Definition: IfxScuCcu.h:471
IfxScuCcu_K1divider_46
K1-Divider 46.
Definition: IfxScuCcu.h:202
IfxScuCcu_K2divider_19
K2-Divider 19.
Definition: IfxScuCcu.h:309
IfxScuCcu_K3divider_117
K3-Divider 117.
Definition: IfxScuCcu.h:541
IfxScuCcu_K1divider_16
K1-Divider 16.
Definition: IfxScuCcu.h:172
IfxScuCcu_K3divider_15
K3-Divider 15.
Definition: IfxScuCcu.h:439
IfxScuCcu_K1divider_80
K1-Divider 80.
Definition: IfxScuCcu.h:236
IfxScuCcu_Ndivider_31
N-divider 31.
Definition: IfxScuCcu.h:589
IfxScuCcu_Ndivider_56
N-divider 56.
Definition: IfxScuCcu.h:614
IfxScuCcu_K1divider_9
K1-Divider 9.
Definition: IfxScuCcu.h:165
IfxScuCcu_K3divider_11
K3-Divider 11.
Definition: IfxScuCcu.h:435
IfxScuCcu_K1divider_55
K1-Divider 55.
Definition: IfxScuCcu.h:211
IfxScuCcu_defaultClockConfig
IFX_EXTERN IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig
Configuration structure for SCU CCU driver. The values of this structure are defined as # defined mac...
Definition: IfxScuCcu.h:1071
IfxScuCcu_K1divider_39
K1-Divider 39.
Definition: IfxScuCcu.h:195
IfxScuCcu_K2divider_98
K2-Divider 98.
Definition: IfxScuCcu.h:388
IfxScuCcu_K1divider_91
K1-Divider 91.
Definition: IfxScuCcu.h:247
IfxScuCcu_Ndivider_102
N-divider 102.
Definition: IfxScuCcu.h:660
IfxScuCcu_K3divider_109
K3-Divider 109.
Definition: IfxScuCcu.h:533
IfxScuCcu_K3divider_6
K3-Divider 6.
Definition: IfxScuCcu.h:430
IfxScuCcu_K3divider_104
K3-Divider 104.
Definition: IfxScuCcu.h:528
IfxScuCcu_K3divider_13
K3-Divider 13.
Definition: IfxScuCcu.h:437
IfxScuCcu_Ndivider_108
N-divider 108.
Definition: IfxScuCcu.h:666
IfxScuCcu_Pdivider_12
P-divider 12.
Definition: IfxScuCcu.h:704
IfxScuCcu_K1divider_90
K1-Divider 90.
Definition: IfxScuCcu.h:246
IfxScuCcu_Ndivider_27
N-divider 27.
Definition: IfxScuCcu.h:585
IfxScuCcu_K3divider_116
K3-Divider 116.
Definition: IfxScuCcu.h:540
IfxScuCcu_K1divider_98
K1-Divider 98.
Definition: IfxScuCcu.h:254
IfxScuCcu_K3divider_113
K3-Divider 113.
Definition: IfxScuCcu.h:537
IfxScuCcu_K2divider_69
K2-Divider 69.
Definition: IfxScuCcu.h:359
IfxScuCcu_K2divider_123
K2-Divider 123.
Definition: IfxScuCcu.h:413
IfxScuCcu_K3divider_27
K3-Divider 27.
Definition: IfxScuCcu.h:451
IfxScuCcu_getPllVcoFrequency
IFX_EXTERN float32 IfxScuCcu_getPllVcoFrequency(void)
API to get actual PLL Voltage Controlled Oscillator frequency. This API returns the based on the divi...
Definition: IfxScuCcu.c:532
IfxScuCcu_Ndivider_41
N-divider 41.
Definition: IfxScuCcu.h:599
IfxScuCcu_K1divider_26
K1-Divider 26.
Definition: IfxScuCcu.h:182
IfxScuCcu_K1divider_57
K1-Divider 57.
Definition: IfxScuCcu.h:213
IfxScuCcu_getPllErayFrequency
IFX_EXTERN float32 IfxScuCcu_getPllErayFrequency(void)
API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON...
Definition: IfxScuCcu.c:457
IfxScuCcu_Config::sysPll
IfxScuCcu_SysPllConfig sysPll
System PLL configuration.
Definition: IfxScuCcu.h:789
IfxScuCcu_K2divider_55
K2-Divider 55.
Definition: IfxScuCcu.h:345
IfxScuCcu_K2divider_103
K2-Divider 103.
Definition: IfxScuCcu.h:393
IfxScuCcu_Ndivider_113
N-divider 113.
Definition: IfxScuCcu.h:671
IfxScuCcu_K2divider_77
K2-Divider 77.
Definition: IfxScuCcu.h:367
IfxScuCcu_K1divider_22
K1-Divider 22.
Definition: IfxScuCcu.h:178
IfxScuCcu_K2divider_59
K2-Divider 59.
Definition: IfxScuCcu.h:349
IfxScuCcu_Ndivider_28
N-divider 28.
Definition: IfxScuCcu.h:586
IfxScuCcu_K1divider_25
K1-Divider 25.
Definition: IfxScuCcu.h:181
IfxScuCcu_K3divider_105
K3-Divider 105.
Definition: IfxScuCcu.h:529
IfxScu_PinMap.h
SCU I/O map.
IfxScuCcu_K3divider_90
K3-Divider 90.
Definition: IfxScuCcu.h:514
IfxScuCcu_K3divider_68
K3-Divider 68.
Definition: IfxScuCcu.h:492
IfxScuCcu_K1divider_121
K1-Divider 121.
Definition: IfxScuCcu.h:277
IfxScuCcu_K2divider_100
K2-Divider 100.
Definition: IfxScuCcu.h:390
IfxScuCcu_K3divider_7
K3-Divider 7.
Definition: IfxScuCcu.h:431
IfxScuCcu_K3divider_32
K3-Divider 32.
Definition: IfxScuCcu.h:456
IfxScuCcu_K1divider_101
K1-Divider 101.
Definition: IfxScuCcu.h:257
IfxScuCcu_K2divider_116
K2-Divider 116.
Definition: IfxScuCcu.h:406
IfxScuCcu_InitialStepConfig::k2Initial
uint8 k2Initial
K2 divider value for basic (initial) step.
Definition: IfxScuCcu.h:734
IfxScuCcu_K3divider_67
K3-Divider 67.
Definition: IfxScuCcu.h:491
IfxScuCcu_K2divider_91
K2-Divider 91.
Definition: IfxScuCcu.h:381
IfxScuCcu_K1divider_35
K1-Divider 35.
Definition: IfxScuCcu.h:191
IfxScuCcu_ClockDistributionConfig
Configuration structure type for all the CCUCON registers to configure clock distribution.
Definition: IfxScuCcu.h:753
IfxScuCcu_PllStepsConfig::hookFunction
IfxScuCcu_PllStepsFunctionHook hookFunction
Hook function called at the end of this step.
Definition: IfxScuCcu.h:744
IfxScuCcu_K3divider_72
K3-Divider 72.
Definition: IfxScuCcu.h:496
IfxScuCcu_K1divider_20
K1-Divider 20.
Definition: IfxScuCcu.h:176
IfxScuCcu_K3divider_41
K3-Divider 41.
Definition: IfxScuCcu.h:465
IfxScuCcu_K1divider_40
K1-Divider 40.
Definition: IfxScuCcu.h:196
IfxScuCcu_K1divider_87
K1-Divider 87.
Definition: IfxScuCcu.h:243
IfxScuCcu_K2divider_46
K2-Divider 46.
Definition: IfxScuCcu.h:336
IfxScuCcu_K1divider_50
K1-Divider 50.
Definition: IfxScuCcu.h:206
IfxScuCcu_K2divider_61
K2-Divider 61.
Definition: IfxScuCcu.h:351
IfxScuCcu_K2divider_48
K2-Divider 48.
Definition: IfxScuCcu.h:338
IfxScuCcu_Ndivider_6
N-divider 6.
Definition: IfxScuCcu.h:564
IfxScuCcu_K2divider_39
K2-Divider 39.
Definition: IfxScuCcu.h:329
IfxScuCcu_Ndivider_29
N-divider 29.
Definition: IfxScuCcu.h:587
IfxScuCcu_getSourceSelection
IFX_INLINE IfxScu_CCUCON0_CLKSEL IfxScuCcu_getSourceSelection(void)
Returns the clock source selection.
Definition: IfxScuCcu.h:1113
IfxScuCcu_Ndivider_93
N-divider 93.
Definition: IfxScuCcu.h:651
IfxScuCcu_Config::xtalFrequency
uint32 xtalFrequency
Xtal Frequency.
Definition: IfxScuCcu.h:792
IfxScuCcu_Ndivider_107
N-divider 107.
Definition: IfxScuCcu.h:665
IfxScuCcu_K1divider_79
K1-Divider 79.
Definition: IfxScuCcu.h:235
IfxScuCcu_K3divider_52
K3-Divider 52.
Definition: IfxScuCcu.h:476
IfxScuCcu_K2divider_4
K2-Divider 4.
Definition: IfxScuCcu.h:294
IfxScuCcu_Ndivider_10
N-divider 10.
Definition: IfxScuCcu.h:568
IfxScuCcu_Ndivider_15
N-divider 15.
Definition: IfxScuCcu.h:573
IfxScuCcu_Ndivider_119
N-divider 119.
Definition: IfxScuCcu.h:677
IfxScuCcu_init
IFX_EXTERN boolean IfxScuCcu_init(const IfxScuCcu_Config *cfg)
API to initialize the SCU Clock Control Unit. This API initialize the PLL with ramp steps...
Definition: IfxScuCcu.c:656
IfxScuCcu_K3divider_61
K3-Divider 61.
Definition: IfxScuCcu.h:485
IfxScuCcu_K2divider_22
K2-Divider 22.
Definition: IfxScuCcu.h:312
IfxScuCcu_K2divider_2
K2-Divider 2.
Definition: IfxScuCcu.h:292
IfxScuCcu_K1divider_96
K1-Divider 96.
Definition: IfxScuCcu.h:252
IfxScuCcu_K2divider_72
K2-Divider 72.
Definition: IfxScuCcu.h:362
IfxScuCcu_Ndivider_117
N-divider 117.
Definition: IfxScuCcu.h:675
IfxScuCcu_K3divider_65
K3-Divider 65.
Definition: IfxScuCcu.h:489
IfxScuCcu_K3divider_42
K3-Divider 42.
Definition: IfxScuCcu.h:466
IfxScuCcu_K1divider_18
K1-Divider 18.
Definition: IfxScuCcu.h:174
IfxScuCcu_K3divider_39
K3-Divider 39.
Definition: IfxScuCcu.h:463
IfxScuCcu_K3divider_119
K3-Divider 119.
Definition: IfxScuCcu.h:543
IfxScuCcu_Ndivider_86
N-divider 86.
Definition: IfxScuCcu.h:644
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxScuCcu_K2divider_45
K2-Divider 45.
Definition: IfxScuCcu.h:335
IfxScuCcu_K2divider_104
K2-Divider 104.
Definition: IfxScuCcu.h:394
IfxScuCcu_K2divider_112
K2-Divider 112.
Definition: IfxScuCcu.h:402
IfxScuCcu_Ndivider_21
N-divider 21.
Definition: IfxScuCcu.h:579
IfxScuCcu_K1divider_114
K1-Divider 114.
Definition: IfxScuCcu.h:270
IfxScuCcu_Ndivider_109
N-divider 109.
Definition: IfxScuCcu.h:667
IfxScuCcu_Ndivider_120
N-divider 120.
Definition: IfxScuCcu.h:678
IfxScuCcu_K3divider_78
K3-Divider 78.
Definition: IfxScuCcu.h:502
IfxScuCcu_K1divider_116
K1-Divider 116.
Definition: IfxScuCcu.h:272
IfxScuCcu_K2divider_42
K2-Divider 42.
Definition: IfxScuCcu.h:332
float32
float float32
Definition: Platform_Types.h:170
IfxScuCcu_K2divider_109
K2-Divider 109.
Definition: IfxScuCcu.h:399
IfxScuCcu_Ndivider_58
N-divider 58.
Definition: IfxScuCcu.h:616
IfxScuCcu_K3divider_1
K3-Divider 1.
Definition: IfxScuCcu.h:425
IfxScuCcu_Ndivider_65
N-divider 65.
Definition: IfxScuCcu.h:623
IfxScuCcu_K1divider_125
K1-Divider 125.
Definition: IfxScuCcu.h:281
IfxScuCcu_K2divider_70
K2-Divider 70.
Definition: IfxScuCcu.h:360
IfxScuCcu_K2divider_14
K2-Divider 14.
Definition: IfxScuCcu.h:304
IfxScuCcu_Ndivider_39
N-divider 39.
Definition: IfxScuCcu.h:597
IfxScuCcu_K2divider_26
K2-Divider 26.
Definition: IfxScuCcu.h:316
IfxScuCcu_K1divider_58
K1-Divider 58.
Definition: IfxScuCcu.h:214
IfxScuCcu_K3divider_103
K3-Divider 103.
Definition: IfxScuCcu.h:527
IfxScuCcu_SysPllConfig
Configuration structure type for the System Pll step. This structure must be used to configure the P...
Definition: IfxScuCcu.h:774
IfxScuCcu_K1divider_89
K1-Divider 89.
Definition: IfxScuCcu.h:245
IfxScuCcu_K1divider_123
K1-Divider 123.
Definition: IfxScuCcu.h:279
IfxScuCcu_K2divider_36
K2-Divider 36.
Definition: IfxScuCcu.h:326
IfxScuCcu_K3divider_29
K3-Divider 29.
Definition: IfxScuCcu.h:453
IfxScuCcu_getMaxFrequency
IFX_EXTERN float32 IfxScuCcu_getMaxFrequency(void)
API to get FMAX divider frequency. This API returns the fMax frequency based on the divider value in ...
Definition: IfxScuCcu.c:363
IfxScuCcu_K3divider_118
K3-Divider 118.
Definition: IfxScuCcu.h:542
IfxScuCcu_K1divider_13
K1-Divider 13.
Definition: IfxScuCcu.h:169
IfxScuCcu_K3divider_23
K3-Divider 23.
Definition: IfxScuCcu.h:447
IfxScuCcu_K2divider_49
K2-Divider 49.
Definition: IfxScuCcu.h:339
IfxScuCcu_K1divider_110
K1-Divider 110.
Definition: IfxScuCcu.h:266
IfxScuCcu_K1divider_34
K1-Divider 34.
Definition: IfxScuCcu.h:190
IfxScuCcu_K2divider_18
K2-Divider 18.
Definition: IfxScuCcu.h:308
IfxScuCcu_K3divider_8
K3-Divider 8.
Definition: IfxScuCcu.h:432
IfxScuCcu_K2divider_12
K2-Divider 12.
Definition: IfxScuCcu.h:302
IfxScuCcu_Ndivider_116
N-divider 116.
Definition: IfxScuCcu.h:674
IfxScuCcu_K2divider_9
K2-Divider 9.
Definition: IfxScuCcu.h:299
IfxScuCcu_K3divider_125
K3-Divider 125.
Definition: IfxScuCcu.h:549
IfxScuCcu_K3divider_110
K3-Divider 110.
Definition: IfxScuCcu.h:534
IfxScuCcu_K3divider_30
K3-Divider 30.
Definition: IfxScuCcu.h:454
IfxScuCcu_K1divider_81
K1-Divider 81.
Definition: IfxScuCcu.h:237
IfxScuCcu_K3divider_102
K3-Divider 102.
Definition: IfxScuCcu.h:526
IfxScuCcu_Ndivider_18
N-divider 18.
Definition: IfxScuCcu.h:576
IfxScuCcu_Ndivider_123
N-divider 123.
Definition: IfxScuCcu.h:681
IfxScuCcu_Ndivider_47
N-divider 47.
Definition: IfxScuCcu.h:605
IfxScuCcu_getOscFrequency
IFX_EXTERN float32 IfxScuCcu_getOscFrequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.c:435
IfxScuCcu_Ndivider_45
N-divider 45.
Definition: IfxScuCcu.h:603
IfxScuCcu_Ndivider_44
N-divider 44.
Definition: IfxScuCcu.h:602
IfxScuCcu_K1divider_42
K1-Divider 42.
Definition: IfxScuCcu.h:198
IfxScuCcu_K1divider_72
K1-Divider 72.
Definition: IfxScuCcu.h:228
IfxScuCcu_getStmFrequency
IFX_INLINE float32 IfxScuCcu_getStmFrequency(void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register ...
Definition: IfxScuCcu.h:1119
IfxScuCcu_K2divider_84
K2-Divider 84.
Definition: IfxScuCcu.h:374
IfxScuCcu_K2divider_79
K2-Divider 79.
Definition: IfxScuCcu.h:369
IfxScuCcu_K1divider_67
K1-Divider 67.
Definition: IfxScuCcu.h:223
IfxScuCcu_Ndivider_104
N-divider 104.
Definition: IfxScuCcu.h:662
IfxScuCcu_Ndivider_50
N-divider 50.
Definition: IfxScuCcu.h:608
IfxScuCcu_Ndivider_52
N-divider 52.
Definition: IfxScuCcu.h:610
IFXSCU_EVR_OSC_FREQUENCY
#define IFXSCU_EVR_OSC_FREQUENCY
Definition: IfxScu_cfg.h:70
IfxScuCcu_Pdivider_9
P-divider 9.
Definition: IfxScuCcu.h:701
IfxScuCcu_K1divider_128
K1-Divider 128.
Definition: IfxScuCcu.h:284
IfxScuCcu_K1divider_107
K1-Divider 107.
Definition: IfxScuCcu.h:263
IfxScuCcu_K1divider_113
K1-Divider 113.
Definition: IfxScuCcu.h:269
IfxScuCcu_K3divider_69
K3-Divider 69.
Definition: IfxScuCcu.h:493
IfxScuCcu_K1divider_82
K1-Divider 82.
Definition: IfxScuCcu.h:238
IfxScuCcu_K2divider
IfxScuCcu_K2divider
MODULE_SCU.PLLCON1.B.K2DIV, specifies the K2-Divider.
Definition: IfxScuCcu.h:289
IfxScuCcu_Ndivider_101
N-divider 101.
Definition: IfxScuCcu.h:659
IfxScuCcu_getPllFrequency
IFX_EXTERN float32 IfxScuCcu_getPllFrequency(void)
API to get actual PLL output frequency. This API returns the based on the divider values in CCUCON...
Definition: IfxScuCcu.c:504
IfxScuCcu_K1divider_106
K1-Divider 106.
Definition: IfxScuCcu.h:262
IfxScuCcu_K2divider_58
K2-Divider 58.
Definition: IfxScuCcu.h:348
IfxScuCcu_K2divider_1
K2-Divider 1.
Definition: IfxScuCcu.h:291
IfxScuCcu_getOsc0Frequency
IFX_EXTERN float32 IfxScuCcu_getOsc0Frequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.c:429
IfxScuCcu_setCpuFrequency
IFX_EXTERN float32 IfxScuCcu_setCpuFrequency(IfxCpu_ResourceCpu cpu, float32 cpuFreq)
API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers...
Definition: IfxScuCcu.c:1065
IfxScuCcu_K1divider_38
K1-Divider 38.
Definition: IfxScuCcu.h:194
IfxScuCcu_Ndivider_26
N-divider 26.
Definition: IfxScuCcu.h:584
IfxScuCcu_setGtmFrequency
IFX_EXTERN float32 IfxScuCcu_setGtmFrequency(float32 gtmFreq)
API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers...
Definition: IfxScuCcu.c:1112
IfxScuCcu_K1divider_104
K1-Divider 104.
Definition: IfxScuCcu.h:260
IfxScuCcu_K3divider_12
K3-Divider 12.
Definition: IfxScuCcu.h:436
IfxScuCcu_K3divider_95
K3-Divider 95.
Definition: IfxScuCcu.h:519
IfxScuCcu_K3divider
IfxScuCcu_K3divider
MODULE_SCU.PLLCON1.B.K3DIV, specifies the K3-Divider.
Definition: IfxScuCcu.h:423
IfxScuCcu_K2divider_92
K2-Divider 92.
Definition: IfxScuCcu.h:382
IfxScuCcu_K3divider_51
K3-Divider 51.
Definition: IfxScuCcu.h:475
IfxScuCcu_K1divider_105
K1-Divider 105.
Definition: IfxScuCcu.h:261
IfxScuCcu_K1divider_41
K1-Divider 41.
Definition: IfxScuCcu.h:197
IfxScuWdt.h
SCU basic functionality.
IfxScuCcu_Ndivider_88
N-divider 88.
Definition: IfxScuCcu.h:646
IfxScuCcu_K2divider_38
K2-Divider 38.
Definition: IfxScuCcu.h:328
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxScuCcu_K3divider_25
K3-Divider 25.
Definition: IfxScuCcu.h:449
IfxScuCcu_SysPllConfig::pllDividerStep
IfxScuCcu_PllStepsConfig * pllDividerStep
Pointer to the array of Pll divider step configuration.
Definition: IfxScuCcu.h:777
IfxScuCcu_K3divider_80
K3-Divider 80.
Definition: IfxScuCcu.h:504
IfxScuCcu_Ndivider_96
N-divider 96.
Definition: IfxScuCcu.h:654
IfxScuCcu_K2divider_67
K2-Divider 67.
Definition: IfxScuCcu.h:357
IfxScuCcu_SysPllConfig::pllInitialStep
IfxScuCcu_InitialStepConfig pllInitialStep
Configuration of first step which is same as internal osc frequency.
Definition: IfxScuCcu.h:778
IfxScuCcu_K2divider_88
K2-Divider 88.
Definition: IfxScuCcu.h:378
IfxScuCcu_Ndivider_124
N-divider 124.
Definition: IfxScuCcu.h:682
IfxScuCcu_Ndivider_128
N-divider 128.
Definition: IfxScuCcu.h:686
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:153
IfxScuCcu_K1divider_74
K1-Divider 74.
Definition: IfxScuCcu.h:230
IfxScuCcu_K1divider_100
K1-Divider 100.
Definition: IfxScuCcu.h:256
IfxScuCcu_K2divider_47
K2-Divider 47.
Definition: IfxScuCcu.h:337
IfxScuCcu_K3divider_24
K3-Divider 24.
Definition: IfxScuCcu.h:448
IfxScuCcu_K1divider_75
K1-Divider 75.
Definition: IfxScuCcu.h:231
IfxScuCcu_K1divider_23
K1-Divider 23.
Definition: IfxScuCcu.h:179
IfxScuCcu_K3divider_85
K3-Divider 85.
Definition: IfxScuCcu.h:509
IfxScuCcu_K2divider_83
K2-Divider 83.
Definition: IfxScuCcu.h:373
IfxScuCcu_getEvrFrequency
IFX_INLINE float32 IfxScuCcu_getEvrFrequency(void)
API to get EVR Oscillator frequency. This API returns the constant which is specific to the ScuCcu of...
Definition: IfxScuCcu.h:1082
IfxScuCcu_K3divider_60
K3-Divider 60.
Definition: IfxScuCcu.h:484
IfxScuCcu_setPll2ErayFrequency
IFX_EXTERN float32 IfxScuCcu_setPll2ErayFrequency(float32 pll2ErayFreq)
API to configure PLL2ERAY (K3 Divider for ADC clock) for desired frequency. This API configure K3 div...
Definition: IfxScuCcu.c:1148
IfxScuCcu_K1divider_71
K1-Divider 71.
Definition: IfxScuCcu.h:227
IfxScuCcu_K2divider_122
K2-Divider 122.
Definition: IfxScuCcu.h:412
IfxScuCcu_K1divider_63
K1-Divider 63.
Definition: IfxScuCcu.h:219
IfxScuCcu_Ndivider_90
N-divider 90.
Definition: IfxScuCcu.h:648
IfxScuCcu_K2divider_97
K2-Divider 97.
Definition: IfxScuCcu.h:387
IfxScuCcu_Ndivider_76
N-divider 76.
Definition: IfxScuCcu.h:634
IfxScuCcu_K3divider_73
K3-Divider 73.
Definition: IfxScuCcu.h:497
IfxScuCcu_K3divider_108
K3-Divider 108.
Definition: IfxScuCcu.h:532
IfxScuCcu_K3divider_76
K3-Divider 76.
Definition: IfxScuCcu.h:500
IfxScuCcu_CcuconRegConfig
Configuration structure type for CCUCON registers.
Definition: IfxScuCcu.h:721
IfxScuCcu_K2divider_80
K2-Divider 80.
Definition: IfxScuCcu.h:370
IfxScuCcu_K3divider_75
K3-Divider 75.
Definition: IfxScuCcu.h:499
IfxScuCcu_Config::flashFconWaitStateConfig
IfxScuCcu_FlashWaitstateConfig flashFconWaitStateConfig
Configuration of flash waitstate.
Definition: IfxScuCcu.h:791
IfxScuCcu_getBaud2Frequency
IFX_EXTERN float32 IfxScuCcu_getBaud2Frequency(void)
API to get BAUD2 divider frequency. This API returns the Baud2 frequency based on the divider value i...
Definition: IfxScuCcu.c:230
IfxScuCcu_Ndivider_60
N-divider 60.
Definition: IfxScuCcu.h:618
IfxScuCcu_Ndivider_59
N-divider 59.
Definition: IfxScuCcu.h:617
IfxScuCcu_K3divider_9
K3-Divider 9.
Definition: IfxScuCcu.h:433
IfxScuCcu_getPllErayVcoFrequency
IFX_EXTERN float32 IfxScuCcu_getPllErayVcoFrequency(void)
API to get actual ERAY PLL Voltage Controlled Oscillator frequency. This API returns the based on the...
Definition: IfxScuCcu.c:485
IfxScuCcu_K3divider_34
K3-Divider 34.
Definition: IfxScuCcu.h:458
IfxScuCcu_K1divider_3
K1-Divider 3.
Definition: IfxScuCcu.h:159
IfxScuCcu_getBaud1Frequency
IFX_EXTERN float32 IfxScuCcu_getBaud1Frequency(void)
API to get BAUD1 divider frequency. This API returns the based on the divider value in CCUCON registe...
Definition: IfxScuCcu.c:212
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxScuCcu_K2divider_27
K2-Divider 27.
Definition: IfxScuCcu.h:317
IfxScuCcu_Ndivider_54
N-divider 54.
Definition: IfxScuCcu.h:612
IfxScuCcu_K2divider_102
K2-Divider 102.
Definition: IfxScuCcu.h:392
IfxScuCcu_initConfig
IFX_EXTERN void IfxScuCcu_initConfig(IfxScuCcu_Config *cfg)
Initializes the clock configuration with default values.
Definition: IfxScuCcu.c:909
IfxScuCcu_K3divider_101
K3-Divider 101.
Definition: IfxScuCcu.h:525
IfxScuCcu_K2divider_66
K2-Divider 66.
Definition: IfxScuCcu.h:356
IfxScuCcu_Ndivider_69
N-divider 69.
Definition: IfxScuCcu.h:627
IfxScuCcu_K2divider_119
K2-Divider 119.
Definition: IfxScuCcu.h:409
IfxScuCcu_K1divider_103
K1-Divider 103.
Definition: IfxScuCcu.h:259
IfxScuCcu_Pdivider_8
P-divider 8.
Definition: IfxScuCcu.h:700
IfxScuCcu_Ndivider_126
N-divider 126.
Definition: IfxScuCcu.h:684
IfxScuCcu_K1divider_1
K1-Divider 1.
Definition: IfxScuCcu.h:157
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxScuCcu_setPll2Frequency
IFX_EXTERN float32 IfxScuCcu_setPll2Frequency(float32 pll2Freq)
API to configure PLL2 (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider...
Definition: IfxScuCcu.c:1161
IfxScuCcu_K1divider_70
K1-Divider 70.
Definition: IfxScuCcu.h:226
IfxScuCcu_K2divider_30
K2-Divider 30.
Definition: IfxScuCcu.h:320
IfxScuCcu_Ndivider_64
N-divider 64.
Definition: IfxScuCcu.h:622
IfxScuCcu_K3divider_121
K3-Divider 121.
Definition: IfxScuCcu.h:545
IfxScuCcu_K2divider_33
K2-Divider 33.
Definition: IfxScuCcu.h:323
IfxScuCcu_K3divider_22
K3-Divider 22.
Definition: IfxScuCcu.h:446
IfxScuCcu_K1divider_78
K1-Divider 78.
Definition: IfxScuCcu.h:234
IfxScuCcu_Ndivider_42
N-divider 42.
Definition: IfxScuCcu.h:600
IfxScuCcu_K2divider_43
K2-Divider 43.
Definition: IfxScuCcu.h:333
IfxScuCcu_Ndivider_57
N-divider 57.
Definition: IfxScuCcu.h:615
IfxScuCcu_Pdivider_14
P-divider 14.
Definition: IfxScuCcu.h:706
IfxScuCcu_K2divider_74
K2-Divider 74.
Definition: IfxScuCcu.h:364
IfxScuCcu_K1divider_21
K1-Divider 21.
Definition: IfxScuCcu.h:177
IfxScuCcu_K2divider_108
K2-Divider 108.
Definition: IfxScuCcu.h:398
IfxScuCcu_Ndivider_49
N-divider 49.
Definition: IfxScuCcu.h:607
IfxScuCcu_K1divider_54
K1-Divider 54.
Definition: IfxScuCcu.h:210
IfxScuCcu_K3divider_87
K3-Divider 87.
Definition: IfxScuCcu.h:511
IfxScuCcu_K3divider_114
K3-Divider 114.
Definition: IfxScuCcu.h:538
IfxScuCcu_K2divider_16
K2-Divider 16.
Definition: IfxScuCcu.h:306
IfxScuCcu_K1divider_112
K1-Divider 112.
Definition: IfxScuCcu.h:268
IfxScuCcu_K3divider_46
K3-Divider 46.
Definition: IfxScuCcu.h:470
IfxScuCcu_Ndivider_30
N-divider 30.
Definition: IfxScuCcu.h:588
IfxScuCcu_getCanFrequency
IFX_INLINE float32 IfxScuCcu_getCanFrequency(void)
API to get CAN divider frequency. This API returns the fCAN frequency based on the divider value in C...
Definition: IfxScuCcu.h:1125
IfxScuCcu_getCpuFrequency
IFX_EXTERN float32 IfxScuCcu_getCpuFrequency(const IfxCpu_ResourceCpu cpu)
This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequenc...
Definition: IfxScuCcu.c:290
IfxScuCcu_K2divider_31
K2-Divider 31.
Definition: IfxScuCcu.h:321
IfxScuCcu_Ndivider_97
N-divider 97.
Definition: IfxScuCcu.h:655
IfxScuCcu_Ndivider_43
N-divider 43.
Definition: IfxScuCcu.h:601
IfxScuCcu_K1divider_31
K1-Divider 31.
Definition: IfxScuCcu.h:187
IfxScuCcu_K1divider_17
K1-Divider 17.
Definition: IfxScuCcu.h:173
IfxScu_cfg.h
SCU on-chip implementation data.
IfxScuCcu_InitialStepConfig
Configuration structure type for the Pll initial step. This structure must be used to configure the P...
Definition: IfxScuCcu.h:730
IfxScuCcu_K3divider_55
K3-Divider 55.
Definition: IfxScuCcu.h:479
IfxScuCcu_K2divider_13
K2-Divider 13.
Definition: IfxScuCcu.h:303
IfxScuCcu_K2divider_34
K2-Divider 34.
Definition: IfxScuCcu.h:324
IfxScuCcu_K3divider_31
K3-Divider 31.
Definition: IfxScuCcu.h:455
IfxScuCcu_getFsi2Frequency
IFX_EXTERN float32 IfxScuCcu_getFsi2Frequency(void)
API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider va...
Definition: IfxScuCcu.c:317
IfxScuCcu_K1divider_47
K1-Divider 47.
Definition: IfxScuCcu.h:203
IfxScuCcu_K3divider_49
K3-Divider 49.
Definition: IfxScuCcu.h:473
IfxScuCcu_K1divider_52
K1-Divider 52.
Definition: IfxScuCcu.h:208
IfxScuCcu_Ndivider_46
N-divider 46.
Definition: IfxScuCcu.h:604
IfxScuCcu_K2divider_35
K2-Divider 35.
Definition: IfxScuCcu.h:325
IfxScuCcu_K1divider_65
K1-Divider 65.
Definition: IfxScuCcu.h:221
IfxScuCcu_Ndivider_115
N-divider 115.
Definition: IfxScuCcu.h:673
IfxScuCcu_K2divider_78
K2-Divider 78.
Definition: IfxScuCcu.h:368
IfxScuCcu_K2divider_113
K2-Divider 113.
Definition: IfxScuCcu.h:403
IfxScuCcu_K2divider_51
K2-Divider 51.
Definition: IfxScuCcu.h:341
IfxScuCcu_K1divider_2
K1-Divider 2.
Definition: IfxScuCcu.h:158
IfxScuCcu_K2divider_111
K2-Divider 111.
Definition: IfxScuCcu.h:401
IfxScuCcu_K2divider_25
K2-Divider 25.
Definition: IfxScuCcu.h:315
IfxScuCcu_Ndivider_84
N-divider 84.
Definition: IfxScuCcu.h:642
IfxScuCcu_K3divider_17
K3-Divider 17.
Definition: IfxScuCcu.h:441
IfxScuCcu_K2divider_40
K2-Divider 40.
Definition: IfxScuCcu.h:330
IfxScuCcu_K3divider_77
K3-Divider 77.
Definition: IfxScuCcu.h:501
IfxScuCcu_K2divider_37
K2-Divider 37.
Definition: IfxScuCcu.h:327
IfxScuCcu_K3divider_91
K3-Divider 91.
Definition: IfxScuCcu.h:515
IfxScuCcu_Ndivider_70
N-divider 70.
Definition: IfxScuCcu.h:628
IfxScuCcu_Ndivider_36
N-divider 36.
Definition: IfxScuCcu.h:594
IfxScuCcu_K3divider_100
K3-Divider 100.
Definition: IfxScuCcu.h:524
IfxScuCcu_PllStepsFunctionHook
void(* IfxScuCcu_PllStepsFunctionHook)(void)
Function pointer type for the hooks.
Definition: IfxScuCcu.h:145
IfxScuCcu_Ndivider_121
N-divider 121.
Definition: IfxScuCcu.h:679
IfxScuCcu_K2divider_54
K2-Divider 54.
Definition: IfxScuCcu.h:344
IfxScuCcu_K2divider_60
K2-Divider 60.
Definition: IfxScuCcu.h:350
IfxScuCcu_Ndivider_91
N-divider 91.
Definition: IfxScuCcu.h:649
IfxScuCcu_Ndivider_13
N-divider 13.
Definition: IfxScuCcu.h:571
IfxScuCcu_K1divider_11
K1-Divider 11.
Definition: IfxScuCcu.h:167
IfxScuCcu_K3divider_120
K3-Divider 120.
Definition: IfxScuCcu.h:544
IfxScuCcu_K2divider_7
K2-Divider 7.
Definition: IfxScuCcu.h:297
IfxScuCcu_K2divider_71
K2-Divider 71.
Definition: IfxScuCcu.h:361
IfxScuCcu_K1divider_109
K1-Divider 109.
Definition: IfxScuCcu.h:265
IfxScuCcu_K1divider_53
K1-Divider 53.
Definition: IfxScuCcu.h:209
IfxScu_CCUCON0_CLKSEL
IfxScu_CCUCON0_CLKSEL
Definition: IfxScu_cfg.h:1385
IfxScuCcu_K3divider_127
K3-Divider 127.
Definition: IfxScuCcu.h:551
IfxScuCcu_Ndivider_61
N-divider 61.
Definition: IfxScuCcu.h:619
IfxScuCcu_K1divider_8
K1-Divider 8.
Definition: IfxScuCcu.h:164
IfxScuCcu_K3divider_106
K3-Divider 106.
Definition: IfxScuCcu.h:530
IfxScuCcu_K2divider_82
K2-Divider 82.
Definition: IfxScuCcu.h:372
IfxScuCcu_getModuleFrequency
IFX_EXTERN float32 IfxScuCcu_getModuleFrequency(void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with ...
Definition: IfxScuCcu.c:404
IfxScuCcu_K3divider_66
K3-Divider 66.
Definition: IfxScuCcu.h:490
IfxScuCcu_K1divider_108
K1-Divider 108.
Definition: IfxScuCcu.h:264
IfxScuCcu_K1divider_19
K1-Divider 19.
Definition: IfxScuCcu.h:175
IfxScuCcu_K2divider_53
K2-Divider 53.
Definition: IfxScuCcu.h:343
IfxScuCcu_Config
Configuration structure SCU module.
Definition: IfxScuCcu.h:787
IfxScuCcu_K2divider_115
K2-Divider 115.
Definition: IfxScuCcu.h:405
IfxScuCcu_K1divider_115
K1-Divider 115.
Definition: IfxScuCcu.h:271
IfxScuCcu_K1divider_127
K1-Divider 127.
Definition: IfxScuCcu.h:283
IfxScuCcu_K1divider_69
K1-Divider 69.
Definition: IfxScuCcu.h:225
IfxScuCcu_K1divider_93
K1-Divider 93.
Definition: IfxScuCcu.h:249
IfxScuCcu_K2divider_5
K2-Divider 5.
Definition: IfxScuCcu.h:295
IfxScuCcu_K1divider_118
K1-Divider 118.
Definition: IfxScuCcu.h:274
IfxScuCcu_K1divider_99
K1-Divider 99.
Definition: IfxScuCcu.h:255
IfxScuCcu_K3divider_99
K3-Divider 99.
Definition: IfxScuCcu.h:523
IfxScuCcu_K3divider_38
K3-Divider 38.
Definition: IfxScuCcu.h:462
IfxScuCcu_K1divider_117
K1-Divider 117.
Definition: IfxScuCcu.h:273
IfxScuCcu_CcuconRegConfig::value
uint32 value
CCUCON Register value to be updated.
Definition: IfxScuCcu.h:723
IfxScuCcu_K1divider_51
K1-Divider 51.
Definition: IfxScuCcu.h:207
IfxScuCcu_K2divider_105
K2-Divider 105.
Definition: IfxScuCcu.h:395
IfxScuCcu_K2divider_64
K2-Divider 64.
Definition: IfxScuCcu.h:354
IfxScuCcu_K3divider_96
K3-Divider 96.
Definition: IfxScuCcu.h:520
IfxScuCcu_Pdivider_10
P-divider 10.
Definition: IfxScuCcu.h:702
IfxScuCcu_K2divider_117
K2-Divider 117.
Definition: IfxScuCcu.h:407
IfxScuCcu_K1divider_124
K1-Divider 124.
Definition: IfxScuCcu.h:280
IfxScuCcu_K2divider_65
K2-Divider 65.
Definition: IfxScuCcu.h:355
IfxScuCcu_K1divider_88
K1-Divider 88.
Definition: IfxScuCcu.h:244
IfxScuCcu_ErayPllConfig
Configuration structure for E-ray PLL.
Definition: IfxScuCcu.h:797
IfxScuCcu_Ndivider_63
N-divider 63.
Definition: IfxScuCcu.h:621
IfxScuCcu_Ndivider_1
N-divider 1.
Definition: IfxScuCcu.h:559
IfxScuCcu_Ndivider_72
N-divider 72.
Definition: IfxScuCcu.h:630
IfxScuCcu_FlashWaitstateConfig
Configuration structure type for the Flash waitstate configuration.
Definition: IfxScuCcu.h:765
IfxScuCcu_K1divider_56
K1-Divider 56.
Definition: IfxScuCcu.h:212
IfxScuCcu_K3divider_107
K3-Divider 107.
Definition: IfxScuCcu.h:531
IfxScuCcu_K3divider_35
K3-Divider 35.
Definition: IfxScuCcu.h:459
IfxScuCcu_Ndivider_19
N-divider 19.
Definition: IfxScuCcu.h:577
IfxScuCcu_setSpbFrequency
IFX_EXTERN float32 IfxScuCcu_setSpbFrequency(float32 spbFreq)
API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers...
Definition: IfxScuCcu.c:1174
IfxScuCcu_K2divider_56
K2-Divider 56.
Definition: IfxScuCcu.h:346
IfxScuCcu_K1divider
IfxScuCcu_K1divider
MODULE_SCU.PLLCON1.B.K1DIV, specifies the K1-Divider.
Definition: IfxScuCcu.h:155
IfxScuCcu_K2divider_6
K2-Divider 6.
Definition: IfxScuCcu.h:296
IfxScuCcu_K1divider_94
K1-Divider 94.
Definition: IfxScuCcu.h:250
IfxScuCcu_ClockDistributionConfig::ccucon6
IfxScuCcu_CcuconRegConfig ccucon6
CCUCON6 Register configuration.
Definition: IfxScuCcu.h:759
IfxScuCcu_initErayPll
IFX_EXTERN boolean IfxScuCcu_initErayPll(const IfxScuCcu_ErayPllConfig *cfg)
API to initialize the SCU Eray Pll This API initialize the Eray PLL for the configuration provided by...
Definition: IfxScuCcu.c:915
IfxScuCcu_K1divider_119
K1-Divider 119.
Definition: IfxScuCcu.h:275
IfxScuCcu_Ndivider_53
N-divider 53.
Definition: IfxScuCcu.h:611
IfxScuCcu_K2divider_63
K2-Divider 63.
Definition: IfxScuCcu.h:353
IfxScuCcu_Ndivider_68
N-divider 68.
Definition: IfxScuCcu.h:626
IfxScuCcu_ClockDistributionConfig::ccucon7
IfxScuCcu_CcuconRegConfig ccucon7
CCUCON7 Register configuration.
Definition: IfxScuCcu.h:760
IfxScuCcu_K2divider_75
K2-Divider 75.
Definition: IfxScuCcu.h:365
IfxScuCcu_K1divider_83
K1-Divider 83.
Definition: IfxScuCcu.h:239
IfxScuCcu_Ndivider_105
N-divider 105.
Definition: IfxScuCcu.h:663
IfxScuCcu_K1divider_48
K1-Divider 48.
Definition: IfxScuCcu.h:204
IfxScuCcu_K3divider_81
K3-Divider 81.
Definition: IfxScuCcu.h:505
IfxScuCcu_K2divider_21
K2-Divider 21.
Definition: IfxScuCcu.h:311
IfxScuCcu_CcuconRegConfig::mask
uint32 mask
CCUCON Mask to select the bit fields to be updated.
Definition: IfxScuCcu.h:724
IfxScuCcu_Config::clockDistribution
IfxScuCcu_ClockDistributionConfig clockDistribution
Configuration of of bus clocks and other module clock distribution.
Definition: IfxScuCcu.h:790
IfxScuCcu_K3divider_16
K3-Divider 16.
Definition: IfxScuCcu.h:440
IfxScuCcu_K1divider_59
K1-Divider 59.
Definition: IfxScuCcu.h:215
IfxScuCcu_Pdivider_16
P-divider 16.
Definition: IfxScuCcu.h:708
IfxScuCcu_K1divider_97
K1-Divider 97.
Definition: IfxScuCcu.h:253
IfxScuCcu_K2divider_95
K2-Divider 95.
Definition: IfxScuCcu.h:385
IfxScuCcu_Ndivider_2
N-divider 2.
Definition: IfxScuCcu.h:560
IfxScuCcu_K3divider_4
K3-Divider 4.
Definition: IfxScuCcu.h:428
IfxScuCcu_K1divider_126
K1-Divider 126.
Definition: IfxScuCcu.h:282
IfxScuCcu_Pdivider_4
P-divider 4.
Definition: IfxScuCcu.h:696
IfxScuCcu_Ndivider_32
N-divider 32.
Definition: IfxScuCcu.h:590
IfxScuCcu_Ndivider_83
N-divider 83.
Definition: IfxScuCcu.h:641
IfxScuCcu_Ndivider_100
N-divider 100.
Definition: IfxScuCcu.h:658
IfxScuCcu_Ndivider_12
N-divider 12.
Definition: IfxScuCcu.h:570
IfxScuCcu_K2divider_15
K2-Divider 15.
Definition: IfxScuCcu.h:305
IfxScuCcu_K3divider_128
K3-Divider 128.
Definition: IfxScuCcu.h:552
IfxScuCcu_K1divider_33
K1-Divider 33.
Definition: IfxScuCcu.h:189
IfxScuCcu_K1divider_66
K1-Divider 66.
Definition: IfxScuCcu.h:222
IfxCpu.h
CPU basic functionality.
IfxScuCcu_K3divider_56
K3-Divider 56.
Definition: IfxScuCcu.h:480
IfxScuCcu_Ndivider_74
N-divider 74.
Definition: IfxScuCcu.h:632
IfxScuCcu_K2divider_8
K2-Divider 8.
Definition: IfxScuCcu.h:298
IfxScuCcu_Ndivider_82
N-divider 82.
Definition: IfxScuCcu.h:640
IfxScuCcu_K2divider_90
K2-Divider 90.
Definition: IfxScuCcu.h:380
IfxScuCcu_K2divider_50
K2-Divider 50.
Definition: IfxScuCcu.h:340
IfxScuCcu_K2divider_81
K2-Divider 81.
Definition: IfxScuCcu.h:371
IfxScuCcu_Ndivider_62
N-divider 62.
Definition: IfxScuCcu.h:620
IfxScuCcu_K1divider_122
K1-Divider 122.
Definition: IfxScuCcu.h:278
IfxScuCcu_getPll2ErayFrequency
IFX_INLINE float32 IfxScuCcu_getPll2ErayFrequency(void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2ERAY frequency b...
Definition: IfxScuCcu.h:1094
IfxScuCcu_Ndivider_87
N-divider 87.
Definition: IfxScuCcu.h:645
IfxScuCcu_K2divider_11
K2-Divider 11.
Definition: IfxScuCcu.h:301
IfxScuCcu_K1divider_64
K1-Divider 64.
Definition: IfxScuCcu.h:220
IfxScuCcu_K3divider_97
K3-Divider 97.
Definition: IfxScuCcu.h:521
IfxScuCcu_Ndivider_94
N-divider 94.
Definition: IfxScuCcu.h:652
IfxScuCcu_K2divider_101
K2-Divider 101.
Definition: IfxScuCcu.h:391
IfxScuCcu_K2divider_28
K2-Divider 28.
Definition: IfxScuCcu.h:318
IfxScuCcu_Ndivider_38
N-divider 38.
Definition: IfxScuCcu.h:596
IfxScuCcu_K3divider_124
K3-Divider 124.
Definition: IfxScuCcu.h:548
IfxScuCcu_getPll2Frequency
IFX_INLINE float32 IfxScuCcu_getPll2Frequency(void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2 frequency based...
Definition: IfxScuCcu.h:1104
IfxScuCcu_SysPllConfig::numOfPllDividerSteps
uint8 numOfPllDividerSteps
Number of PLL divider steps during clock throttling.
Definition: IfxScuCcu.h:776
IfxScuCcu_K3divider_26
K3-Divider 26.
Definition: IfxScuCcu.h:450
IfxScuCcu_getFsiFrequency
IFX_EXTERN float32 IfxScuCcu_getFsiFrequency(void)
API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCO...
Definition: IfxScuCcu.c:340
IfxScuCcu_K2divider_99
K2-Divider 99.
Definition: IfxScuCcu.h:389
IfxScuCcu_Ndivider_112
N-divider 112.
Definition: IfxScuCcu.h:670
IfxScuCcu_K3divider_48
K3-Divider 48.
Definition: IfxScuCcu.h:472
IfxScuCcu_K1divider_4
K1-Divider 4.
Definition: IfxScuCcu.h:160
IfxScuCcu_K3divider_89
K3-Divider 89.
Definition: IfxScuCcu.h:513
IfxScuCcu_K3divider_50
K3-Divider 50.
Definition: IfxScuCcu.h:474
IfxScuCcu_Pdivider_13
P-divider 13.
Definition: IfxScuCcu.h:705
IfxScuCcu_Ndivider_81
N-divider 81.
Definition: IfxScuCcu.h:639
IfxScuCcu_Ndivider_16
N-divider 16.
Definition: IfxScuCcu.h:574
IfxScuCcu_K2divider_23
K2-Divider 23.
Definition: IfxScuCcu.h:313
IfxScuCcu_K1divider_44
K1-Divider 44.
Definition: IfxScuCcu.h:200
IfxScuCcu_Ndivider_4
N-divider 4.
Definition: IfxScuCcu.h:562
IfxScuCcu_K3divider_92
K3-Divider 92.
Definition: IfxScuCcu.h:516
IfxScuCcu_K1divider_14
K1-Divider 14.
Definition: IfxScuCcu.h:170
IfxScuCcu_K3divider_21
K3-Divider 21.
Definition: IfxScuCcu.h:445
IfxScuCcu_getSourceFrequency
IFX_EXTERN float32 IfxScuCcu_getSourceFrequency(void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with ...
Definition: IfxScuCcu.c:551
IfxScuCcu_K1divider_77
K1-Divider 77.
Definition: IfxScuCcu.h:233
IfxScuCcu_Ndivider_125
N-divider 125.
Definition: IfxScuCcu.h:683
IfxScuCcu_ClockDistributionConfig::ccucon2
IfxScuCcu_CcuconRegConfig ccucon2
CCUCON2 Register configuration.
Definition: IfxScuCcu.h:757
IfxScuCcu_K3divider_123
K3-Divider 123.
Definition: IfxScuCcu.h:547
IfxScuCcu_K2divider_20
K2-Divider 20.
Definition: IfxScuCcu.h:310
IfxScuCcu_K1divider_85
K1-Divider 85.
Definition: IfxScuCcu.h:241
IfxScuCcu_InitialStepConfig::waitTime
float32 waitTime
Wait time for for basic (initial) step.
Definition: IfxScuCcu.h:735
IfxScuCcu_K1divider_60
K1-Divider 60.
Definition: IfxScuCcu.h:216
IfxScuCcu_K3divider_64
K3-Divider 64.
Definition: IfxScuCcu.h:488
IfxScuCcu_K3divider_40
K3-Divider 40.
Definition: IfxScuCcu.h:464
IfxScuCcu_K3divider_83
K3-Divider 83.
Definition: IfxScuCcu.h:507
IfxScuCcu_Ndivider_7
N-divider 7.
Definition: IfxScuCcu.h:565
IfxScuCcu_K3divider_62
K3-Divider 62.
Definition: IfxScuCcu.h:486
IfxScuCcu_K3divider_3
K3-Divider 3.
Definition: IfxScuCcu.h:427
IfxScuCcu_K1divider_7
K1-Divider 7.
Definition: IfxScuCcu.h:163
IfxScuCcu_K1divider_36
K1-Divider 36.
Definition: IfxScuCcu.h:192
IfxScuCcu_K3divider_36
K3-Divider 36.
Definition: IfxScuCcu.h:460
IfxScuCcu_Ndivider_85
N-divider 85.
Definition: IfxScuCcu.h:643
IfxScuCcu_K3divider_45
K3-Divider 45.
Definition: IfxScuCcu.h:469
IfxScuCcu_K3divider_115
K3-Divider 115.
Definition: IfxScuCcu.h:539
IfxScuCcu_Ndivider_114
N-divider 114.
Definition: IfxScuCcu.h:672
IfxScuCcu_K2divider_121
K2-Divider 121.
Definition: IfxScuCcu.h:411
IfxScuCcu_K1divider_86
K1-Divider 86.
Definition: IfxScuCcu.h:242
IfxScuCcu_setSriFrequency
IFX_EXTERN float32 IfxScuCcu_setSriFrequency(float32 sriFreq)
API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers...
Definition: IfxScuCcu.c:1223
IfxScuCcu_K2divider_24
K2-Divider 24.
Definition: IfxScuCcu.h:314
IfxScuCcu_K3divider_10
K3-Divider 10.
Definition: IfxScuCcu.h:434
IfxScuCcu_K2divider_85
K2-Divider 85.
Definition: IfxScuCcu.h:375
IfxScuCcu_Ndivider_78
N-divider 78.
Definition: IfxScuCcu.h:636
IfxScuCcu_Ndivider_75
N-divider 75.
Definition: IfxScuCcu.h:633
IfxScuCcu_defaultErayPllConfig
IFX_EXTERN IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig
Configuration structure for SCU CCU driver. The values of this structure are defined as # defined mac...
Definition: IfxScuCcu.h:1076
IfxScuCcu_Ndivider_48
N-divider 48.
Definition: IfxScuCcu.h:606
IfxScuCcu_K2divider_89
K2-Divider 89.
Definition: IfxScuCcu.h:379
IfxScuCcu_K1divider_120
K1-Divider 120.
Definition: IfxScuCcu.h:276
IfxScuCcu_K3divider_20
K3-Divider 20.
Definition: IfxScuCcu.h:444
IfxScuCcu_K3divider_74
K3-Divider 74.
Definition: IfxScuCcu.h:498
IfxScuCcu_getGtmFrequency
IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void)
API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register an...
Definition: IfxScuCcu.h:1088
IfxScuCcu_K3divider_59
K3-Divider 59.
Definition: IfxScuCcu.h:483
IfxScuCcu_Ndivider_40
N-divider 40.
Definition: IfxScuCcu.h:598
IfxScuCcu_Ndivider_37
N-divider 37.
Definition: IfxScuCcu.h:595
IfxScuCcu_K1divider_27
K1-Divider 27.
Definition: IfxScuCcu.h:183
IfxScuCcu_Pdivider_11
P-divider 11.
Definition: IfxScuCcu.h:703
IfxScuCcu_K2divider_106
K2-Divider 106.
Definition: IfxScuCcu.h:396
IfxScuCcu_K2divider_32
K2-Divider 32.
Definition: IfxScuCcu.h:322
IfxScuCcu_K3divider_33
K3-Divider 33.
Definition: IfxScuCcu.h:457
IfxScuCcu_Ndivider_55
N-divider 55.
Definition: IfxScuCcu.h:613
IfxScuCcu_Ndivider_24
N-divider 24.
Definition: IfxScuCcu.h:582
IfxScuCcu_getBbbFrequency
IFX_EXTERN float32 IfxScuCcu_getBbbFrequency(void)
API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider valu...
Definition: IfxScuCcu.c:248
IfxScuCcu_K3divider_93
K3-Divider 93.
Definition: IfxScuCcu.h:517
IfxScuCcu_Ndivider_9
N-divider 9.
Definition: IfxScuCcu.h:567
IfxScuCcu_K2divider_96
K2-Divider 96.
Definition: IfxScuCcu.h:386
IfxScuCcu_Ndivider_89
N-divider 89.
Definition: IfxScuCcu.h:647
IfxScuCcu_K1divider_61
K1-Divider 61.
Definition: IfxScuCcu.h:217
IfxScuCcu_K1divider_15
K1-Divider 15.
Definition: IfxScuCcu.h:171
IfxScuCcu_Ndivider_14
N-divider 14.
Definition: IfxScuCcu.h:572
IfxScuCcu_Pdivider_15
P-divider 15.
Definition: IfxScuCcu.h:707
IfxScuCcu_ClockDistributionConfig::ccucon5
IfxScuCcu_CcuconRegConfig ccucon5
CCUCON5 Register configuration.
Definition: IfxScuCcu.h:758
IfxScuCcu_K2divider_93
K2-Divider 93.
Definition: IfxScuCcu.h:383
IfxScuCcu_K2divider_125
K2-Divider 125.
Definition: IfxScuCcu.h:415
IfxScuCcu_Ndivider_66
N-divider 66.
Definition: IfxScuCcu.h:624
IfxScuCcu_K3divider_14
K3-Divider 14.
Definition: IfxScuCcu.h:438
IfxScuCcu_Ndivider_106
N-divider 106.
Definition: IfxScuCcu.h:664
IfxScuCcu_K2divider_114
K2-Divider 114.
Definition: IfxScuCcu.h:404
IfxScuCcu_Ndivider_73
N-divider 73.
Definition: IfxScuCcu.h:631
IfxScuCcu_InitialStepConfig::pDivider
uint8 pDivider
P divider value for basic (initial) step.
Definition: IfxScuCcu.h:732
IfxScuCcu_PllStepsConfig
Configuration structure type for the Pll Steps for current jump control.
Definition: IfxScuCcu.h:740
IfxScuCcu_K3divider_2
K3-Divider 2.
Definition: IfxScuCcu.h:426
IfxScuCcu_Ndivider_98
N-divider 98.
Definition: IfxScuCcu.h:656
IfxScuCcu_Ndivider_122
N-divider 122.
Definition: IfxScuCcu.h:680
IfxScuCcu_K1divider_68
K1-Divider 68.
Definition: IfxScuCcu.h:224
IfxScuCcu_Ndivider_71
N-divider 71.
Definition: IfxScuCcu.h:629
IfxScuCcu_Ndivider_22
N-divider 22.
Definition: IfxScuCcu.h:580
IfxScuCcu_Ndivider_8
N-divider 8.
Definition: IfxScuCcu.h:566
IfxScuCcu_K1divider_37
K1-Divider 37.
Definition: IfxScuCcu.h:193
IfxScuCcu_K1divider_12
K1-Divider 12.
Definition: IfxScuCcu.h:168
IfxScuCcu_Ndivider_34
N-divider 34.
Definition: IfxScuCcu.h:592
IfxScuCcu_K3divider_71
K3-Divider 71.
Definition: IfxScuCcu.h:495
IfxScuCcu_Ndivider_51
N-divider 51.
Definition: IfxScuCcu.h:609
IfxScuCcu_K2divider_124
K2-Divider 124.
Definition: IfxScuCcu.h:414
IfxScuCcu_K2divider_10
K2-Divider 10.
Definition: IfxScuCcu.h:300
IfxScuCcu_K1divider_62
K1-Divider 62.
Definition: IfxScuCcu.h:218
IfxScuCcu_K1divider_49
K1-Divider 49.
Definition: IfxScuCcu.h:205
IfxScuCcu_Ndivider_92
N-divider 92.
Definition: IfxScuCcu.h:650
IfxScuCcu_K3divider_28
K3-Divider 28.
Definition: IfxScuCcu.h:452
IfxScuCcu_InitialStepConfig::nDivider
uint8 nDivider
N divider value for basic (initial) step.
Definition: IfxScuCcu.h:733
IfxScuCcu_Ndivider_67
N-divider 67.
Definition: IfxScuCcu.h:625
IfxScuCcu_K1divider_84
K1-Divider 84.
Definition: IfxScuCcu.h:240
IfxScuCcu_Ndivider_127
N-divider 127.
Definition: IfxScuCcu.h:685
IfxScuCcu_K3divider_43
K3-Divider 43.
Definition: IfxScuCcu.h:467
IfxScuCcu_K3divider_88
K3-Divider 88.
Definition: IfxScuCcu.h:512
IfxScuCcu_Ndivider_110
N-divider 110.
Definition: IfxScuCcu.h:668
IfxScuCcu_K3divider_82
K3-Divider 82.
Definition: IfxScuCcu.h:506
IfxScuCcu_Ndivider_118
N-divider 118.
Definition: IfxScuCcu.h:676
IfxScuCcu_K1divider_73
K1-Divider 73.
Definition: IfxScuCcu.h:229
IfxScuCcu_K3divider_86
K3-Divider 86.
Definition: IfxScuCcu.h:510
IfxScuCcu_K1divider_30
K1-Divider 30.
Definition: IfxScuCcu.h:186
IfxScuCcu_K1divider_28
K1-Divider 28.
Definition: IfxScuCcu.h:184
IfxScuCcu_K3divider_112
K3-Divider 112.
Definition: IfxScuCcu.h:536
IfxScuCcu_K2divider_94
K2-Divider 94.
Definition: IfxScuCcu.h:384
IfxScuCcu_Pdivider
IfxScuCcu_Pdivider
MODULE_SCU.PLLCON0.B.PDIV, specifies the P-Divider.
Definition: IfxScuCcu.h:691
IfxScuCcu_K3divider_79
K3-Divider 79.
Definition: IfxScuCcu.h:503
IfxScuCcu_Pdivider_5
P-divider 5.
Definition: IfxScuCcu.h:697
IfxScuCcu_K2divider_118
K2-Divider 118.
Definition: IfxScuCcu.h:408
IfxScuCcu_K2divider_127
K2-Divider 127.
Definition: IfxScuCcu.h:417
IfxScuCcu_K3divider_57
K3-Divider 57.
Definition: IfxScuCcu.h:481
IfxScuCcu_K2divider_76
K2-Divider 76.
Definition: IfxScuCcu.h:366
IfxScuCcu_switchToBackupClock
IFX_EXTERN void IfxScuCcu_switchToBackupClock(const IfxScuCcu_Config *cfg)
API to switch to Backup clock from the current PLL frequency.
Definition: IfxScuCcu.c:1263
IfxScuCcu_K3divider_19
K3-Divider 19.
Definition: IfxScuCcu.h:443
IfxScuCcu_K2divider_87
K2-Divider 87.
Definition: IfxScuCcu.h:377
IfxScuCcu_Ndivider_17
N-divider 17.
Definition: IfxScuCcu.h:575
IfxScuCcu_K2divider_52
K2-Divider 52.
Definition: IfxScuCcu.h:342
IfxScuCcu_K2divider_3
K2-Divider 3.
Definition: IfxScuCcu.h:293
IfxScuCcu_K1divider_29
K1-Divider 29.
Definition: IfxScuCcu.h:185
IfxScuCcu_Ndivider_95
N-divider 95.
Definition: IfxScuCcu.h:653
IfxScuCcu_K3divider_54
K3-Divider 54.
Definition: IfxScuCcu.h:478
IfxScuCcu_K3divider_111
K3-Divider 111.
Definition: IfxScuCcu.h:535
IfxScuCcu_Ndivider_35
N-divider 35.
Definition: IfxScuCcu.h:593
IfxScuCcu_initErayPllConfig
IFX_EXTERN void IfxScuCcu_initErayPllConfig(IfxScuCcu_ErayPllConfig *cfg)
Initializes the clock configuration with default values.
Definition: IfxScuCcu.c:1014
IfxScuCcu_K2divider_73
K2-Divider 73.
Definition: IfxScuCcu.h:363
IfxScuCcu_Ndivider_80
N-divider 80.
Definition: IfxScuCcu.h:638
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxScuCcu_K2divider_41
K2-Divider 41.
Definition: IfxScuCcu.h:331
IfxScuCcu_Ndivider_79
N-divider 79.
Definition: IfxScuCcu.h:637
IfxScuCcu_Pdivider_1
P-divider 1.
Definition: IfxScuCcu.h:693
IfxScuCcu_calculateSysPllDividers
IFX_EXTERN boolean IfxScuCcu_calculateSysPllDividers(IfxScuCcu_Config *cfg, uint32 fPll)
The api calculates the system PLL divider values P, N, K based on given xtal frequency and PLL freque...
Definition: IfxScuCcu.c:110
IfxScuCcu_getSriFrequency
IFX_EXTERN float32 IfxScuCcu_getSriFrequency(void)
API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in C...
Definition: IfxScuCcu.c:614
IfxScuCcu_K2divider_29
K2-Divider 29.
Definition: IfxScuCcu.h:319
IfxScuCcu_Ndivider
IfxScuCcu_Ndivider
MODULE_SCU.PLLCON0.B.NDIV, specifies the N-Divider.
Definition: IfxScuCcu.h:557
IfxScuCcu_K2divider_44
K2-Divider 44.
Definition: IfxScuCcu.h:334
IfxScuCcu_Ndivider_111
N-divider 111.
Definition: IfxScuCcu.h:669
IfxScuCcu_K1divider_92
K1-Divider 92.
Definition: IfxScuCcu.h:248
IfxScuCcu_Pdivider_2
P-divider 2.
Definition: IfxScuCcu.h:694
IfxScuCcu_Ndivider_99
N-divider 99.
Definition: IfxScuCcu.h:657
IfxScuCcu_K2divider_128
K2-Divider 128.
Definition: IfxScuCcu.h:418
IfxScuCcu_K2divider_68
K2-Divider 68.
Definition: IfxScuCcu.h:358
IfxScuCcu_K1divider_102
K1-Divider 102.
Definition: IfxScuCcu.h:258
IfxScuCcu_K3divider_94
K3-Divider 94.
Definition: IfxScuCcu.h:518
IfxScuCcu_K3divider_18
K3-Divider 18.
Definition: IfxScuCcu.h:442
IfxScuCcu_K2divider_120
K2-Divider 120.
Definition: IfxScuCcu.h:410
IfxScuCcu_K1divider_95
K1-Divider 95.
Definition: IfxScuCcu.h:251
IfxScuCcu_Pdivider_3
P-divider 3.
Definition: IfxScuCcu.h:695
IfxScuCcu_K3divider_126
K3-Divider 126.
Definition: IfxScuCcu.h:550
IfxScuCcu_Ndivider_3
N-divider 3.
Definition: IfxScuCcu.h:561
IfxScuCcu_K1divider_43
K1-Divider 43.
Definition: IfxScuCcu.h:199
IfxScuCcu_K3divider_37
K3-Divider 37.
Definition: IfxScuCcu.h:461
IfxScuCcu_K1divider_10
K1-Divider 10.
Definition: IfxScuCcu.h:166
IfxScuCcu_K1divider_76
K1-Divider 76.
Definition: IfxScuCcu.h:232
IfxScuCcu_Ndivider_25
N-divider 25.
Definition: IfxScuCcu.h:583
IfxScuCcu_K2divider_62
K2-Divider 62.
Definition: IfxScuCcu.h:352
IfxScuCcu_Ndivider_103
N-divider 103.
Definition: IfxScuCcu.h:661
IfxScuCcu_Pdivider_7
P-divider 7.
Definition: IfxScuCcu.h:699
IfxScuCcu_Pdivider_6
P-divider 6.
Definition: IfxScuCcu.h:698
IfxScuCcu_Ndivider_20
N-divider 20.
Definition: IfxScuCcu.h:578
IfxScuCcu_K3divider_70
K3-Divider 70.
Definition: IfxScuCcu.h:494


iLLD_TC26B: IfxScuEru.c Source File

  • Scu
  • Std
IfxScuEru.c
Go to the documentation of this file.
1 /**
2 * \file IfxScuEru.c
3 * \brief SCU basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxScuEru.h"
48
49 /******************************************************************************/
50 /*----------------------------------Macros------------------------------------*/
51 /******************************************************************************/
52
53 #define IFXSCUERU_CHANNEL_NUMBER_ODD 1
54
55 #define IFXSCUERU_TO_REGISTER_BASE 1
56
57 /******************************************************************************/
58 /*-------------------------Function Implementations---------------------------*/
59 /******************************************************************************/
60
61 void IfxScuEru_clearAllEventFlags(void)
62 {
63 uint32 mask = (0xFF << 16);
64 MODULE_SCU.FMR.U = mask;
65 }
66
67
68 void IfxScuEru_clearEventFlag(IfxScuEru_InputChannel inputChannel)
69 {
70 uint32 mask = 1 << (inputChannel + 16);
71 SCU_FMR.U = mask;
72 }
73
74
75 void IfxScuEru_clearInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
76 {
77 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
78 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
79 uint32 mask = 0xFFFF;
80
81 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
82 {
83 MODULE_SCU.EICR[index].U = (MODULE_SCU.EICR[index].U & mask);
84 }
85 else // for channels 0, 2, 4 and 6
86 {
87 mask = (mask << 16);
88 MODULE_SCU.EICR[index].U = (MODULE_SCU.EICR[index].U & mask);
89 }
90 }
91
92
93 void IfxScuEru_clearOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
94 {
95 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
96 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
97 uint32 mask = 0xFFFF;
98
99 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
100 {
101 MODULE_SCU.IGCR[index].U = (MODULE_SCU.IGCR[index].U & mask);
102 }
103 else // for channels 0, 2, 4 and 6
104 {
105 mask = (mask << 16);
106 MODULE_SCU.IGCR[index].U = (MODULE_SCU.IGCR[index].U & mask);
107 }
108 }
109
110
111 void IfxScuEru_connectTrigger(IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
112 {
113 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
114 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
115
116 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
117 {
118 MODULE_SCU.EICR[index].B.INP1 = triggerSelect;
119 }
120 else // for channels 0, 2, 4 and 6
121 {
122 MODULE_SCU.EICR[index].B.INP0 = triggerSelect;
123 }
124 }
125
126
127 void IfxScuEru_disableAutoClear(IfxScuEru_InputChannel inputChannel)
128 {
129 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
130 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
131
132 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
133 {
134 MODULE_SCU.EICR[index].B.LDEN1 = FALSE;
135 }
136 else // for channels 0, 2, 4 and 6
137 {
138 MODULE_SCU.EICR[index].B.LDEN0 = FALSE;
139 }
140 }
141
142
143 void IfxScuEru_disableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
144 {
145 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
146 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
147
148 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
149 {
150 MODULE_SCU.EICR[index].B.FEN1 = FALSE;
151 }
152 else // for channels 0, 2, 4 and 6
153 {
154 MODULE_SCU.EICR[index].B.FEN0 = FALSE;
155 }
156 }
157
158
159 void IfxScuEru_disablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
160 {
161 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
162 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
163
164 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
165 {
166 MODULE_SCU.IGCR[index].B.GEEN1 = FALSE;
167 }
168 else // for channels 0, 2, 4 and 6
169 {
170 MODULE_SCU.IGCR[index].B.GEEN0 = FALSE;
171 }
172 }
173
174
175 void IfxScuEru_disableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
176 {
177 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
178 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
179
180 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
181 {
182 MODULE_SCU.EICR[index].B.REN1 = FALSE;
183 }
184 else // for channels 0, 2, 4 and 6
185 {
186 MODULE_SCU.EICR[index].B.REN0 = FALSE;
187 }
188 }
189
190
191 void IfxScuEru_disableTriggerPulse(IfxScuEru_InputChannel inputChannel)
192 {
193 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
194 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
195
196 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
197 {
198 MODULE_SCU.EICR[index].B.EIEN1 = FALSE;
199 }
200 else // for channels 0, 2, 4 and 6
201 {
202 MODULE_SCU.EICR[index].B.EIEN0 = FALSE;
203 }
204 }
205
206
207 void IfxScuEru_enableAutoClear(IfxScuEru_InputChannel inputChannel)
208 {
209 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
210 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
211
212 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
213 {
214 MODULE_SCU.EICR[index].B.LDEN1 = TRUE;
215 }
216 else // for channels 0, 2, 4 and 6
217 {
218 MODULE_SCU.EICR[index].B.LDEN0 = TRUE;
219 }
220 }
221
222
223 void IfxScuEru_enableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
224 {
225 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
226 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
227
228 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
229 {
230 MODULE_SCU.EICR[index].B.FEN1 = TRUE;
231 }
232 else // for channels 0, 2, 4 and 6
233 {
234 MODULE_SCU.EICR[index].B.FEN0 = TRUE;
235 }
236 }
237
238
239 void IfxScuEru_enablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
240 {
241 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
242 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
243
244 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
245 {
246 MODULE_SCU.IGCR[index].B.GEEN1 = TRUE;
247 }
248 else // for channels 0, 2, 4 and 6
249 {
250 MODULE_SCU.IGCR[index].B.GEEN0 = TRUE;
251 }
252 }
253
254
255 void IfxScuEru_enableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
256 {
257 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
258 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
259
260 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
261 {
262 MODULE_SCU.EICR[index].B.REN1 = TRUE;
263 }
264 else // for channels 0, 2, 4 and 6
265 {
266 MODULE_SCU.EICR[index].B.REN0 = TRUE;
267 }
268 }
269
270
271 void IfxScuEru_enableTriggerPulse(IfxScuEru_InputChannel inputChannel)
272 {
273 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
274 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
275
276 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
277 {
278 MODULE_SCU.EICR[index].B.EIEN1 = TRUE;
279 }
280 else // for channels 0, 2, 4 and 6
281 {
282 MODULE_SCU.EICR[index].B.EIEN0 = TRUE;
283 }
284 }
285
286
287 uint32 IfxScuEru_getAllEventFlagsStatus(void)
288 {
289 return MODULE_SCU.EIFR.U;
290 }
291
292
293 boolean IfxScuEru_getEventFlagStatus(IfxScuEru_InputChannel inputChannel)
294 {
295 uint32 mask = (1U << inputChannel);
296 return (MODULE_SCU.EIFR.U & mask) ? TRUE : FALSE;
297 }
298
299
300 uint32 IfxScuEru_getInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
301 {
302 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
303 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
304 uint32 status, mask = 0xFFFF;
305
306 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
307 {
308 mask = (mask << 16);
309 status = (MODULE_SCU.EICR[index].U & mask);
310 }
311 else // for channels 0, 2, 4 and 6
312 {
313 status = (MODULE_SCU.EICR[index].U & mask);
314 }
315
316 return status;
317 }
318
319
320 uint32 IfxScuEru_getOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
321 {
322 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
323 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
324 uint32 status, mask = 0xFFFF;
325
326 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
327 {
328 mask = (mask << 16);
329 status = (MODULE_SCU.IGCR[index].U & mask);
330 }
331 else // for channels 0, 2, 4 and 6
332 {
333 status = (MODULE_SCU.IGCR[index].U & mask);
334 }
335
336 return status;
337 }
338
339
340 boolean IfxScuEru_getPatternDetectionResult(IfxScuEru_OutputChannel outputChannel)
341 {
342 uint32 mask = (1U << outputChannel);
343 return (MODULE_SCU.PDRR.U & mask) ? TRUE : FALSE;
344 }
345
346
347 uint32 IfxScuEru_getWholePatternDetectionResult(void)
348 {
349 return MODULE_SCU.PDRR.U;
350 }
351
352
353 void IfxScuEru_selectExternalInput(IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
354 {
355 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
356 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
357
358 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
359 {
360 MODULE_SCU.EICR[index].B.EXIS1 = inputSignal;
361 }
362 else // for channels 0, 2, 4 and 6
363 {
364 MODULE_SCU.EICR[index].B.EXIS0 = inputSignal;
365 }
366 }
367
368
369 void IfxScuEru_setEventFlag(IfxScuEru_InputChannel inputChannel)
370 {
371 uint32 mask = 1 << inputChannel;
372 SCU_FMR.U = mask;
373 }
374
375
376 void IfxScuEru_setFlagPatternDetection(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
377 {
378 uint32 shift, mask;
379
380 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
381 {
382 shift = (inputChannel + 16); // offset at location IPEN10
383 mask = (1 << shift);
384 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
385 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
386 MODULE_SCU.IGCR[index].U = (MODULE_SCU.IGCR[index].U & ~mask) | ((uint32)state << shift);
387 }
388 else // for channels 0, 2, 4 and 6
389 {
390 shift = inputChannel;
391 mask = (1 << shift);
392 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
393 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
394 MODULE_SCU.IGCR[index].U = (MODULE_SCU.IGCR[index].U & ~mask) | ((uint32)state << shift);
395 }
396 }
397
398
399 void IfxScuEru_setInterruptGatingPattern(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
400 {
401 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
402 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
403
404 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
405 {
406 MODULE_SCU.IGCR[index].B.IGP1 = gatingPattern;
407 }
408 else // for channels 0, 2, 4 and 6
409 {
410 MODULE_SCU.IGCR[index].B.IGP0 = gatingPattern;
411 }
412 }
IfxScuEru_disableTriggerPulse
void IfxScuEru_disableTriggerPulse(IfxScuEru_InputChannel inputChannel)
Disables the generation of a trigger event for input channel x when the selected edge is detected...
Definition: IfxScuEru.c:191
IfxScuEru_enableTriggerPulse
void IfxScuEru_enableTriggerPulse(IfxScuEru_InputChannel inputChannel)
Enables the generation of a trigger event for input channel x when the selected edge is detected...
Definition: IfxScuEru.c:271
IfxScuEru_ExternalInputSelection
IfxScuEru_ExternalInputSelection
Input line selection for input channel Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0...
Definition: IfxScuEru.h:79
IfxScuEru_disableFallingEdgeDetection
void IfxScuEru_disableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Disables the falling edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:143
IfxScuEru_getWholePatternDetectionResult
uint32 IfxScuEru_getWholePatternDetectionResult(void)
Returns the whole pattern detection result of all the selcted output channels.
Definition: IfxScuEru.c:347
IfxScuEru_clearOutputChannelConfiguration
void IfxScuEru_clearOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y.
Definition: IfxScuEru.c:93
IfxScuEru_enablePatternDetectionTrigger
void IfxScuEru_enablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
Enables the generation of a trigger event for output channel y when the result of the pattern detecti...
Definition: IfxScuEru.c:239
IfxScuEru_clearInputChannelConfiguration
void IfxScuEru_clearInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
Clears all the configuration for the given input channel x.
Definition: IfxScuEru.c:75
IfxScuEru_setEventFlag
void IfxScuEru_setEventFlag(IfxScuEru_InputChannel inputChannel)
Sets the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:369
IfxScuEru_InputNodePointer
IfxScuEru_InputNodePointer
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)). Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1)
Definition: IfxScuEru.h:104
IfxScuEru_disablePatternDetectionTrigger
void IfxScuEru_disablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
Disables the generation of a trigger event for output channel y when the result of the pattern detect...
Definition: IfxScuEru.c:159
IfxScuEru_getOutputChannelConfiguration
uint32 IfxScuEru_getOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y.
Definition: IfxScuEru.c:320
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxScuEru_clearAllEventFlags
void IfxScuEru_clearAllEventFlags(void)
Clears the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:61
IfxScuEru_setInterruptGatingPattern
void IfxScuEru_setInterruptGatingPattern(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the ou...
Definition: IfxScuEru.c:399
IfxScuEru.h
SCU basic functionality.
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxScuEru_connectTrigger
void IfxScuEru_connectTrigger(IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1).
Definition: IfxScuEru.c:111
IfxScuEru_OutputChannel
IfxScuEru_OutputChannel
Output channel for combination of events, definition of their effects and distribution to the system ...
Definition: IfxScuEru.h:129
IfxScuEru_InterruptGatingPattern
IfxScuEru_InterruptGatingPattern
Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy Definition in I...
Definition: IfxScuEru.h:119
IfxScuEru_getEventFlagStatus
boolean IfxScuEru_getEventFlagStatus(IfxScuEru_InputChannel inputChannel)
Returns the status of the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:293
IfxScuEru_setFlagPatternDetection
void IfxScuEru_setFlagPatternDetection(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
Enables the flag INTFx to take part in the pattern detection for output gating.
Definition: IfxScuEru.c:376
IfxScuEru_disableRisingEdgeDetection
void IfxScuEru_disableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Disables the rising edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:175
IfxScuEru_getPatternDetectionResult
boolean IfxScuEru_getPatternDetectionResult(IfxScuEru_OutputChannel outputChannel)
Returns the status of the pattern detection result of output channel y (PDRy)
Definition: IfxScuEru.c:340
IFXSCUERU_TO_REGISTER_BASE
#define IFXSCUERU_TO_REGISTER_BASE
Definition: IfxScuEru.c:55
IfxScuEru_getInputChannelConfiguration
uint32 IfxScuEru_getInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
Returns all the configuration for the given input channel x.
Definition: IfxScuEru.c:300
IfxScuEru_InputChannel
IfxScuEru_InputChannel
Input channel for input selection and conditioning of trigger or gating functions.
Definition: IfxScuEru.h:89
IfxScuEru_disableAutoClear
void IfxScuEru_disableAutoClear(IfxScuEru_InputChannel inputChannel)
Disables the automatic clearing of INTFx when the edge of input channel which has not been selected...
Definition: IfxScuEru.c:127
IFXSCUERU_CHANNEL_NUMBER_ODD
#define IFXSCUERU_CHANNEL_NUMBER_ODD
Definition: IfxScuEru.c:53
IfxScuEru_selectExternalInput
void IfxScuEru_selectExternalInput(IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
Determines which input line is selcted for input channel x.
Definition: IfxScuEru.c:353
IfxScuEru_enableFallingEdgeDetection
void IfxScuEru_enableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Enables the falling edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:223
IfxScuEru_clearEventFlag
void IfxScuEru_clearEventFlag(IfxScuEru_InputChannel inputChannel)
Clears the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:68
IfxScuEru_enableRisingEdgeDetection
void IfxScuEru_enableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Enables the rising edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:255
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxScuEru_enableAutoClear
void IfxScuEru_enableAutoClear(IfxScuEru_InputChannel inputChannel)
Enables the automatic clearing of INTFx when the edge of input channel which has not been selected...
Definition: IfxScuEru.c:207
IfxScuEru_getAllEventFlagsStatus
uint32 IfxScuEru_getAllEventFlagsStatus(void)
Returns the status of the flags of all input channels.
Definition: IfxScuEru.c:287


iLLD_TC26B: IfxScuEru.h Source File

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IfxScuEru.h
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1 /**
2 * \file IfxScuEru.h
3 * \brief SCU basic functionality
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup IfxLld_Scu_Std_Eru Eru Basic Functionality
43 * \ingroup IfxLld_Scu_Std
44 * \defgroup IfxLld_Scu_Std_Eru_Enum ERU: Enumerations
45 * \ingroup IfxLld_Scu_Std_Eru
46 * \defgroup IfxLld_Scu_Std_Eru_External_Request_Selection ERU: External Request Selection
47 * \ingroup IfxLld_Scu_Std_Eru
48 * \defgroup IfxLld_Scu_Std_Eru_Event_Trigger_Logic ERU: Event Trigger Logic
49 * \ingroup IfxLld_Scu_Std_Eru
50 * \defgroup IfxLld_Scu_Std_Eru_Connecting_Matrix ERU: Connecting Matrix
51 * \ingroup IfxLld_Scu_Std_Eru
52 * \defgroup IfxLld_Scu_Std_Eru_Output_Gating_Unit ERU: Output Gating Unit
53 * \ingroup IfxLld_Scu_Std_Eru
54 * \defgroup IfxLld_Scu_Std_Eru_Data_Structures ERU: Data Structures
55 * \ingroup IfxLld_Scu_Std_Eru
56 */
57
58 #ifndef IFXSCUERU_H
59 #define IFXSCUERU_H 1
60
61 /******************************************************************************/
62 /*----------------------------------Includes----------------------------------*/
63 /******************************************************************************/
64
65 #include "_Impl/IfxScu_cfg.h"
66 #include "IfxScu_reg.h"
67 #include "Cpu/Std/IfxCpu.h"
68 #include "_PinMap/IfxScu_PinMap.h"
69
70 /******************************************************************************/
71 /*--------------------------------Enumerations--------------------------------*/
72 /******************************************************************************/
73
74 /** \addtogroup IfxLld_Scu_Std_Eru_Enum
75 * \{ */
76 /** \brief Input line selection for input channel\n
77 * Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0,1,2,3 and j = 0,1)
78 */
79 typedef enum
80 {
81 IfxScuEru_ExternalInputSelection_0 = 0, /**< \brief External input 0 is selected */
82 IfxScuEru_ExternalInputSelection_1, /**< \brief External input 1 is selected */
83 IfxScuEru_ExternalInputSelection_2, /**< \brief External input 2 is selected */
84 IfxScuEru_ExternalInputSelection_3 /**< \brief External input 3 is selected */
85 } IfxScuEru_ExternalInputSelection;
86
87 /** \brief Input channel for input selection and conditioning of trigger or gating functions
88 */
89 typedef enum
90 {
91 IfxScuEru_InputChannel_0 = 0, /**< \brief External Input channel 0 */
92 IfxScuEru_InputChannel_1, /**< \brief External Input channel 1 */
93 IfxScuEru_InputChannel_2, /**< \brief External Input channel 2 */
94 IfxScuEru_InputChannel_3, /**< \brief External Input channel 3 */
95 IfxScuEru_InputChannel_4, /**< \brief External Input channel 4 */
96 IfxScuEru_InputChannel_5, /**< \brief External Input channel 5 */
97 IfxScuEru_InputChannel_6, /**< \brief External Input channel 6 */
98 IfxScuEru_InputChannel_7 /**< \brief External Input channel 7 */
99 } IfxScuEru_InputChannel;
100
101 /** \brief Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)).\n
102 * Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1)
103 */
104 typedef enum
105 {
106 IfxScuEru_InputNodePointer_0 = 0, /**< \brief Event from input ETLx triggers output OGU0 (signal TRx0) */
107 IfxScuEru_InputNodePointer_1, /**< \brief Event from input ETLx triggers output OGU1 (signal TRx1) */
108 IfxScuEru_InputNodePointer_2, /**< \brief Event from input ETLx triggers output OGU2 (signal TRx2) */
109 IfxScuEru_InputNodePointer_3, /**< \brief Event from input ETLx triggers output OGU3 (signal TRx3) */
110 IfxScuEru_InputNodePointer_4, /**< \brief Event from input ETLx triggers output OGU4 (signal TRx4) */
111 IfxScuEru_InputNodePointer_5, /**< \brief Event from input ETLx triggers output OGU5 (signal TRx5) */
112 IfxScuEru_InputNodePointer_6, /**< \brief Event from input ETLx triggers output OGU6 (signal TRx6) */
113 IfxScuEru_InputNodePointer_7 /**< \brief Event from input ETLx triggers output OGU7 (signal TRx7) */
114 } IfxScuEru_InputNodePointer;
115
116 /** \brief Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy\n
117 * Definition in Ifx_SCU.IGCR[i].B.IGP(j) (i = 0,1,2,3 and j = 0,1)
118 */
119 typedef enum
120 {
121 IfxScuEru_InterruptGatingPattern_none = 0, /**< \brief IOUTy is inactive, (the pattern is not considered) */
122 IfxScuEru_InterruptGatingPattern_alwaysActive = 1, /**< \brief IOUTy is activated in response to a trigger event, (the pattern is not considered) */
123 IfxScuEru_InterruptGatingPattern_patternMatch = 2, /**< \brief IOUTy is activated if a trigger event occures while the pattern is present, (the pattern is considered) */
124 IfxScuEru_InterruptGatingPattern_patternMiss = 3 /**< \brief IOUTy is activated if a trigger event occures while the pattern is not present, (the pattern is not considered) */
125 } IfxScuEru_InterruptGatingPattern;
126
127 /** \brief Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
128 */
129 typedef enum
130 {
131 IfxScuEru_OutputChannel_0 = 0, /**< \brief Output channel 0 */
132 IfxScuEru_OutputChannel_1, /**< \brief Output channel 1 */
133 IfxScuEru_OutputChannel_2, /**< \brief Output channel 2 */
134 IfxScuEru_OutputChannel_3, /**< \brief Output channel 3 */
135 IfxScuEru_OutputChannel_4, /**< \brief Output channel 4 */
136 IfxScuEru_OutputChannel_5, /**< \brief Output channel 5 */
137 IfxScuEru_OutputChannel_6, /**< \brief Output channel 6 */
138 IfxScuEru_OutputChannel_7 /**< \brief Output channel 7 */
139 } IfxScuEru_OutputChannel;
140
141 /** \} */
142
143 /** \addtogroup IfxLld_Scu_Std_Eru_External_Request_Selection
144 * \{ */
145
146 /******************************************************************************/
147 /*-------------------------Inline Function Prototypes-------------------------*/
148 /******************************************************************************/
149
150 /** \brief Initialises the External request Pin
151 * \param req External request pin
152 * \param inputMode Port Input mode
153 * \return None
154 */
155 IFX_INLINE void IfxScuEru_initReqPin(IfxScu_Req_In *req, IfxPort_InputMode inputMode);
156
157 /******************************************************************************/
158 /*-------------------------Global Function Prototypes-------------------------*/
159 /******************************************************************************/
160
161 /** \brief Determines which input line is selcted for input channel x
162 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
163 * \param inputSignal Input line selection for input channel
164 * \return None
165 */
166 IFX_EXTERN void IfxScuEru_selectExternalInput(IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal);
167
168 /** \} */
169
170 /** \addtogroup IfxLld_Scu_Std_Eru_Event_Trigger_Logic
171 * \{ */
172
173 /******************************************************************************/
174 /*-------------------------Global Function Prototypes-------------------------*/
175 /******************************************************************************/
176
177 /** \brief Clears the external event flag of input channel x (INTFx)
178 * \return None
179 */
180 IFX_EXTERN void IfxScuEru_clearAllEventFlags(void);
181
182 /** \brief Clears the external event flag of input channel x (INTFx)
183 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
184 * \return None
185 */
186 IFX_EXTERN void IfxScuEru_clearEventFlag(IfxScuEru_InputChannel inputChannel);
187
188 /** \brief Clears all the configuration for the given input channel x
189 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
190 * \return None
191 */
192 IFX_EXTERN void IfxScuEru_clearInputChannelConfiguration(IfxScuEru_InputChannel inputChannel);
193
194 /** \brief Disables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected
195 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
196 * \return None
197 */
198 IFX_EXTERN void IfxScuEru_disableAutoClear(IfxScuEru_InputChannel inputChannel);
199
200 /** \brief Disables the falling edge of input channel to set the bit INTF x
201 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
202 * \return None
203 */
204 IFX_EXTERN void IfxScuEru_disableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel);
205
206 /** \brief Disables the rising edge of input channel to set the bit INTF x
207 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
208 * \return None
209 */
210 IFX_EXTERN void IfxScuEru_disableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel);
211
212 /** \brief Enables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected
213 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
214 * \return None
215 */
216 IFX_EXTERN void IfxScuEru_enableAutoClear(IfxScuEru_InputChannel inputChannel);
217
218 /** \brief Enables the falling edge of input channel to set the bit INTF x
219 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
220 * \return None
221 */
222 IFX_EXTERN void IfxScuEru_enableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel);
223
224 /** \brief Enables the rising edge of input channel to set the bit INTF x
225 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
226 * \return None
227 */
228 IFX_EXTERN void IfxScuEru_enableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel);
229
230 /** \brief Returns the status of the flags of all input channels
231 * \return All flags Status
232 */
233 IFX_EXTERN uint32 IfxScuEru_getAllEventFlagsStatus(void);
234
235 /** \brief Returns the status of the external event flag of input channel x (INTFx)
236 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
237 * \return Status (TRUE / FALSE)
238 */
239 IFX_EXTERN boolean IfxScuEru_getEventFlagStatus(IfxScuEru_InputChannel inputChannel);
240
241 /** \brief Returns all the configuration for the given input channel x
242 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
243 * \return Input channel configuration
244 */
245 IFX_EXTERN uint32 IfxScuEru_getInputChannelConfiguration(IfxScuEru_InputChannel inputChannel);
246
247 /** \brief Sets the external event flag of input channel x (INTFx)
248 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
249 * \return None
250 */
251 IFX_EXTERN void IfxScuEru_setEventFlag(IfxScuEru_InputChannel inputChannel);
252
253 /** \} */
254
255 /** \addtogroup IfxLld_Scu_Std_Eru_Connecting_Matrix
256 * \{ */
257
258 /******************************************************************************/
259 /*-------------------------Global Function Prototypes-------------------------*/
260 /******************************************************************************/
261
262 /** \brief Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1).
263 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
264 * \param triggerSelect Trigger event selection
265 * \return None
266 */
267 IFX_EXTERN void IfxScuEru_connectTrigger(IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect);
268
269 /** \brief Disables the generation of a trigger event for input channel x when the selected edge is detected
270 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
271 * \return None
272 */
273 IFX_EXTERN void IfxScuEru_disableTriggerPulse(IfxScuEru_InputChannel inputChannel);
274
275 /** \brief Enables the generation of a trigger event for input channel x when the selected edge is detected
276 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
277 * \return None
278 */
279 IFX_EXTERN void IfxScuEru_enableTriggerPulse(IfxScuEru_InputChannel inputChannel);
280
281 /** \brief Enables the flag INTFx to take part in the pattern detection for output gating
282 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
283 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
284 * \param state FALSE: the bit INTFx does not take part in the pattern detection IPENjy = 0\n
285 * TRUE : the bit INTFx is taken into consideration for the pattern detection IPENjy = 1
286 * \return None
287 */
288 IFX_EXTERN void IfxScuEru_setFlagPatternDetection(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state);
289
290 /** \} */
291
292 /** \addtogroup IfxLld_Scu_Std_Eru_Output_Gating_Unit
293 * \{ */
294
295 /******************************************************************************/
296 /*-------------------------Global Function Prototypes-------------------------*/
297 /******************************************************************************/
298
299 /** \brief Clears all the configuration for the given input channel y
300 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
301 * \return None
302 */
303 IFX_EXTERN void IfxScuEru_clearOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel);
304
305 /** \brief Disables the generation of a trigger event for output channel y when the result of the pattern detection changes
306 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
307 * \return None
308 */
309 IFX_EXTERN void IfxScuEru_disablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel);
310
311 /** \brief Enables the generation of a trigger event for output channel y when the result of the pattern detection changes
312 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
313 * \return None
314 */
315 IFX_EXTERN void IfxScuEru_enablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel);
316
317 /** \brief Clears all the configuration for the given input channel y
318 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
319 * \return Output channel configuration
320 */
321 IFX_EXTERN uint32 IfxScuEru_getOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel);
322
323 /** \brief Returns the status of the pattern detection result of output channel y (PDRy)
324 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
325 * \return Status (TRUE / FALSE)
326 */
327 IFX_EXTERN boolean IfxScuEru_getPatternDetectionResult(IfxScuEru_OutputChannel outputChannel);
328
329 /** \brief Returns the whole pattern detection result of all the selcted output channels
330 * \return Detected pattern
331 */
332 IFX_EXTERN uint32 IfxScuEru_getWholePatternDetectionResult(void);
333
334 /** \brief Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the output lines GOUT and IOUT
335 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
336 * \param gatingPattern Interrupt gating pattern to determine how the pattern detection influences the ouput lines GOUT and IOUT
337 * \return None
338 */
339 IFX_EXTERN void IfxScuEru_setInterruptGatingPattern(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern);
340
341 /** \} */
342
343 /******************************************************************************/
344 /*---------------------Inline Function Implementations------------------------*/
345 /******************************************************************************/
346
347 IFX_INLINE void IfxScuEru_initReqPin(IfxScu_Req_In *req, IfxPort_InputMode inputMode)
348 {
349 IfxPort_setPinModeInput(req->pin.port, req->pin.pinIndex, inputMode);
350 IfxScuEru_selectExternalInput((IfxScuEru_InputChannel)req->channelId, (IfxScuEru_ExternalInputSelection)req->select);
351 }
352
353
354 #endif /* IFXSCUERU_H */
IfxScuEru_OutputChannel_2
Output channel 2.
Definition: IfxScuEru.h:133
IfxScuEru_disableTriggerPulse
IFX_EXTERN void IfxScuEru_disableTriggerPulse(IfxScuEru_InputChannel inputChannel)
Disables the generation of a trigger event for input channel x when the selected edge is detected...
Definition: IfxScuEru.c:191
IfxScuEru_enableTriggerPulse
IFX_EXTERN void IfxScuEru_enableTriggerPulse(IfxScuEru_InputChannel inputChannel)
Enables the generation of a trigger event for input channel x when the selected edge is detected...
Definition: IfxScuEru.c:271
IfxScuEru_ExternalInputSelection
IfxScuEru_ExternalInputSelection
Input line selection for input channel Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0...
Definition: IfxScuEru.h:79
IfxScuEru_InputChannel_0
External Input channel 0.
Definition: IfxScuEru.h:91
IfxScuEru_disableFallingEdgeDetection
IFX_EXTERN void IfxScuEru_disableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Disables the falling edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:143
IfxScuEru_getWholePatternDetectionResult
IFX_EXTERN uint32 IfxScuEru_getWholePatternDetectionResult(void)
Returns the whole pattern detection result of all the selcted output channels.
Definition: IfxScuEru.c:347
IfxScu_Req_In::channelId
uint8 channelId
ERU Channel ID.
Definition: IfxScu_PinMap.h:74
IfxScu_PinMap.h
SCU I/O map.
IfxScuEru_OutputChannel_5
Output channel 5.
Definition: IfxScuEru.h:136
IfxScuEru_clearOutputChannelConfiguration
IFX_EXTERN void IfxScuEru_clearOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y.
Definition: IfxScuEru.c:93
IfxScuEru_enablePatternDetectionTrigger
IFX_EXTERN void IfxScuEru_enablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
Enables the generation of a trigger event for output channel y when the result of the pattern detecti...
Definition: IfxScuEru.c:239
IfxScuEru_clearInputChannelConfiguration
IFX_EXTERN void IfxScuEru_clearInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
Clears all the configuration for the given input channel x.
Definition: IfxScuEru.c:75
IfxScuEru_InputNodePointer_0
Event from input ETLx triggers output OGU0 (signal TRx0)
Definition: IfxScuEru.h:106
IfxScuEru_InputChannel_4
External Input channel 4.
Definition: IfxScuEru.h:95
IfxScuEru_setEventFlag
IFX_EXTERN void IfxScuEru_setEventFlag(IfxScuEru_InputChannel inputChannel)
Sets the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:369
IfxScuEru_InputChannel_5
External Input channel 5.
Definition: IfxScuEru.h:96
IfxScuEru_InputNodePointer
IfxScuEru_InputNodePointer
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)). Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1)
Definition: IfxScuEru.h:104
IfxScuEru_disablePatternDetectionTrigger
IFX_EXTERN void IfxScuEru_disablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
Disables the generation of a trigger event for output channel y when the result of the pattern detect...
Definition: IfxScuEru.c:159
IfxScuEru_InterruptGatingPattern_patternMatch
IOUTy is activated if a trigger event occures while the pattern is present, (the pattern is considere...
Definition: IfxScuEru.h:123
IfxScuEru_getOutputChannelConfiguration
IFX_EXTERN uint32 IfxScuEru_getOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y.
Definition: IfxScuEru.c:320
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxScuEru_clearAllEventFlags
IFX_EXTERN void IfxScuEru_clearAllEventFlags(void)
Clears the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:61
IfxScuEru_InputNodePointer_7
Event from input ETLx triggers output OGU7 (signal TRx7)
Definition: IfxScuEru.h:113
IfxScuEru_ExternalInputSelection_1
External input 1 is selected.
Definition: IfxScuEru.h:82
IfxScuEru_setInterruptGatingPattern
IFX_EXTERN void IfxScuEru_setInterruptGatingPattern(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the ou...
Definition: IfxScuEru.c:399
IfxScuEru_OutputChannel_6
Output channel 6.
Definition: IfxScuEru.h:137
IfxScuEru_InterruptGatingPattern_alwaysActive
IOUTy is activated in response to a trigger event, (the pattern is not considered) ...
Definition: IfxScuEru.h:122
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
IfxScuEru_ExternalInputSelection_0
External input 0 is selected.
Definition: IfxScuEru.h:81
IfxScuEru_OutputChannel_0
Output channel 0.
Definition: IfxScuEru.h:131
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxScuEru_InputNodePointer_6
Event from input ETLx triggers output OGU6 (signal TRx6)
Definition: IfxScuEru.h:112
IfxScuEru_InputNodePointer_5
Event from input ETLx triggers output OGU5 (signal TRx5)
Definition: IfxScuEru.h:111
IfxScuEru_InputChannel_3
External Input channel 3.
Definition: IfxScuEru.h:94
IfxScu_cfg.h
SCU on-chip implementation data.
IfxScuEru_connectTrigger
IFX_EXTERN void IfxScuEru_connectTrigger(IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1).
Definition: IfxScuEru.c:111
IfxScuEru_InputChannel_6
External Input channel 6.
Definition: IfxScuEru.h:97
IfxScuEru_ExternalInputSelection_3
External input 3 is selected.
Definition: IfxScuEru.h:84
IfxScuEru_OutputChannel
IfxScuEru_OutputChannel
Output channel for combination of events, definition of their effects and distribution to the system ...
Definition: IfxScuEru.h:129
IfxScuEru_InterruptGatingPattern
IfxScuEru_InterruptGatingPattern
Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy Definition in I...
Definition: IfxScuEru.h:119
IfxScuEru_InterruptGatingPattern_none
IOUTy is inactive, (the pattern is not considered)
Definition: IfxScuEru.h:121
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxScuEru_getEventFlagStatus
IFX_EXTERN boolean IfxScuEru_getEventFlagStatus(IfxScuEru_InputChannel inputChannel)
Returns the status of the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:293
IfxScuEru_setFlagPatternDetection
IFX_EXTERN void IfxScuEru_setFlagPatternDetection(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
Enables the flag INTFx to take part in the pattern detection for output gating.
Definition: IfxScuEru.c:376
IfxScuEru_OutputChannel_1
Output channel 1.
Definition: IfxScuEru.h:132
IfxScuEru_disableRisingEdgeDetection
IFX_EXTERN void IfxScuEru_disableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Disables the rising edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:175
IfxScuEru_getPatternDetectionResult
IFX_EXTERN boolean IfxScuEru_getPatternDetectionResult(IfxScuEru_OutputChannel outputChannel)
Returns the status of the pattern detection result of output channel y (PDRy)
Definition: IfxScuEru.c:340
IfxCpu.h
CPU basic functionality.
IfxScuEru_InputChannel_1
External Input channel 1.
Definition: IfxScuEru.h:92
IfxScuEru_ExternalInputSelection_2
External input 2 is selected.
Definition: IfxScuEru.h:83
IfxScuEru_InputChannel_7
External Input channel 7.
Definition: IfxScuEru.h:98
IfxScuEru_InputNodePointer_2
Event from input ETLx triggers output OGU2 (signal TRx2)
Definition: IfxScuEru.h:108
IfxScuEru_getInputChannelConfiguration
IFX_EXTERN uint32 IfxScuEru_getInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
Returns all the configuration for the given input channel x.
Definition: IfxScuEru.c:300
IfxScu_Req_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxScu_PinMap.h:75
IfxScuEru_InputChannel
IfxScuEru_InputChannel
Input channel for input selection and conditioning of trigger or gating functions.
Definition: IfxScuEru.h:89
IfxScuEru_OutputChannel_3
Output channel 3.
Definition: IfxScuEru.h:134
IfxScuEru_initReqPin
IFX_INLINE void IfxScuEru_initReqPin(IfxScu_Req_In *req, IfxPort_InputMode inputMode)
Initialises the External request Pin.
Definition: IfxScuEru.h:347
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxScuEru_disableAutoClear
IFX_EXTERN void IfxScuEru_disableAutoClear(IfxScuEru_InputChannel inputChannel)
Disables the automatic clearing of INTFx when the edge of input channel which has not been selected...
Definition: IfxScuEru.c:127
IfxScu_Req_In
External Request pin mapping structure.
Definition: IfxScu_PinMap.h:71
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxScuEru_selectExternalInput
IFX_EXTERN void IfxScuEru_selectExternalInput(IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
Determines which input line is selcted for input channel x.
Definition: IfxScuEru.c:353
IfxScuEru_OutputChannel_7
Output channel 7.
Definition: IfxScuEru.h:138
IfxScuEru_enableFallingEdgeDetection
IFX_EXTERN void IfxScuEru_enableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Enables the falling edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:223
IfxScuEru_clearEventFlag
IFX_EXTERN void IfxScuEru_clearEventFlag(IfxScuEru_InputChannel inputChannel)
Clears the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:68
IfxScu_Req_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxScu_PinMap.h:76
IfxScuEru_enableRisingEdgeDetection
IFX_EXTERN void IfxScuEru_enableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Enables the rising edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:255
IfxScuEru_InputNodePointer_1
Event from input ETLx triggers output OGU1 (signal TRx1)
Definition: IfxScuEru.h:107
IfxScuEru_OutputChannel_4
Output channel 4.
Definition: IfxScuEru.h:135
IfxScuEru_InterruptGatingPattern_patternMiss
IOUTy is activated if a trigger event occures while the pattern is not present, (the pattern is not c...
Definition: IfxScuEru.h:124
IfxScuEru_enableAutoClear
IFX_EXTERN void IfxScuEru_enableAutoClear(IfxScuEru_InputChannel inputChannel)
Enables the automatic clearing of INTFx when the edge of input channel which has not been selected...
Definition: IfxScuEru.c:207
IfxScuEru_getAllEventFlagsStatus
IFX_EXTERN uint32 IfxScuEru_getAllEventFlagsStatus(void)
Returns the status of the flags of all input channels.
Definition: IfxScuEru.c:287
IfxScuEru_InputNodePointer_4
Event from input ETLx triggers output OGU4 (signal TRx4)
Definition: IfxScuEru.h:110
IfxScuEru_InputChannel_2
External Input channel 2.
Definition: IfxScuEru.h:93
IfxScuEru_InputNodePointer_3
Event from input ETLx triggers output OGU3 (signal TRx3)
Definition: IfxScuEru.h:109


iLLD_TC26B: IfxScuWdt.asm.h Source File

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IfxScuWdt.asm.h
Go to the documentation of this file.
1 /**
2 * \file IfxScuWdt.asm.h
3 * \brief SCU basic functionality
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Scu_Std_Wdt_Operative Wdt Operative Functionality
42 * \ingroup IfxLld_Scu_Std_Wdt
43 */
44 #ifndef IFXSCUWDT_ASM_H
45 #define IFXSCUWDT_ASM_H 1
46
47 #include "Cpu/Std/Ifx_Types.h"
48 #include "IfxScu_reg.h"
49
50 /** \addtogroup IfxLld_Scu_Std_Wdt_Operative
51 * \{ */
52 #define IFXSCUWDT_CALCULATELFSR(pwd) ((((((pwd) >> 13) ^ ((pwd) >> 12) ^ ((pwd) >> 11) ^ ((pwd) >> 1 )) & 1)) | (((pwd)<<1) & 0x3FFF))
53 /**
54 * \brief SCUWDT Inline API utility to Calculte new 14-bit LFSR.
55 *
56 * This API will Calculte new 14-bit LFSR (Linear Feedback Shift Register) with characteristic polynomial
57 * x14+x13+x12+x2+1.
58 *
59 * \param password Password for which LFSR value to be calculated.
60 * \return New LFSR.
61 */
62 IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 password);
63 /** \} */
64
65 /**
66 * \brief SCUWDT Inline API utility to Calculte new 14-bit LFSR.
67 */
68 #if defined(__HIGHTEC__)
69 IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 pwd)
70 {
71 /* *INDENT-OFF* */
72 uint32 temp = pwd;
73 uint16 res;
74
75 __asm("xor.t %0,%1,13,%1,12 \n\
76 xor.t %0,%0,0,%1,11 \n\
77 sh.xor.t %1,%0,0,%1,1 \n\
78 extr.u %0,%1,0,14 \n" : "=&d" (res) : "d" (temp));
79 return res;
80 /* *INDENT-ON* */
81 }
82 #endif
83 #if defined(__TASKING__)
84 IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 pwd)
85 {
86 /* *INDENT-OFF* */
87 uint32 temp = pwd;
88 uint16 res;
89
90 __asm("xor.t %0,%1,13,%1,12 \n\
91 xor.t %0,%0,0,%1,11 \n\
92 sh.xor.t %1,%0,0,%1,1 \n\
93 mov d4,#0 \n\
94 mov d5,#14 \n\
95 extr.u %0,%1,e4 \n" : "=&d" (res) : "d" (temp));
96 return res;
97 /* *INDENT-ON* */
98 }
99 #endif
100 #if defined(__DCC__)
101 /* *INDENT-OFF* */
102 asm uint16 IfxScuWdt_calculateLfsr_asm(uint16 password)
103 {
104 %reg password
105 !"%d2"
106 xor.t %d2, password, 13, password, 12
107 xor.t %d2, %d2, 0, password, 11
108 sh.xor.t password,%d2,0,password,1
109 extr.u %d2,password,0,14
110 }
111 /* *INDENT-ON* */
112 IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 pwd)
113 {
114 return IfxScuWdt_calculateLfsr_asm(pwd);
115 }
116 #endif
117 #if defined(__ghs__)
118 IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 pwd)
119 {
120 /* *INDENT-OFF* */
121 uint32 temp = pwd;
122 uint16 res;
123
124 __asm("xor.t %0,%1,13,%1,12 \n\
125 xor.t %0,%0,0,%1,11 \n\
126 sh.xor.t %1,%0,0,%1,1 \n\
127 extr.u %0,%1,0,14 \n" : "=&d" (res) : "d" (temp));
128 return res;
129 /* *INDENT-ON* */
130 }
131 #endif
132 #endif
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxScuWdt_calculateLfsr
IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 password)
SCUWDT Inline API utility to Calculte new 14-bit LFSR.
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
uint16
unsigned short uint16
Definition: Platform_Types.h:112
extr
sint32 extr
Definition: IfxCpu_IntrinsicsDcc.h:398


iLLD_TC26B: IfxScuWdt.c Source File

  • Scu
  • Std
IfxScuWdt.c
Go to the documentation of this file.
1 /**
2 * \file IfxScuWdt.c
3 * \brief SCU basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 *
41 */
42
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46
47 #include "IfxScuWdt.h"
48 #include "Cpu/Std/IfxCpu.h"
49
50 /******************************************************************************/
51 /*----------------------------------Macros------------------------------------*/
52 /******************************************************************************/
53
54 /** \brief Reset password of watchdog module.
55 */
56 #define IFXSCUWDT_RESET_PASSWORD (0x3CU)
57
58 /******************************************************************************/
59 /*-------------------------Function Implementations---------------------------*/
60 /******************************************************************************/
61
62 void IfxScuWdt_changeCpuWatchdogPassword(uint16 password, uint16 newPassword)
63 {
64 Ifx_SCU_WDTCPU *watchdog = &MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()];
65
66 /* Read Config_0 register */
67 Ifx_SCU_WDTCPU_CON0 wdt_con0;
68 wdt_con0.U = watchdog->CON0.U;
69
70 if (wdt_con0.B.LCK)
71 {
72 /* see Table 1 (Password Access Bit Pattern Requirements) */
73 wdt_con0.B.ENDINIT = 1;
74 wdt_con0.B.LCK = 0;
75 wdt_con0.B.PW = password;
76
77 /* Password ready. Store it to WDT_CON0 to unprotect the register */
78 watchdog->CON0.U = wdt_con0.U;
79 }
80
81 /* Set new Password, ENDINT and LCK bit in Config_0 register */
82 wdt_con0.B.ENDINIT = 1;
83 wdt_con0.B.LCK = 1;
84 wdt_con0.B.PW = newPassword;
85 watchdog->CON0.U = wdt_con0.U;
86
87 /* read back ENDINIT and wait until it has been set */
88 while (watchdog->CON0.B.ENDINIT == 0)
89 {}
90 }
91
92
93 void IfxScuWdt_changeCpuWatchdogReload(uint16 password, uint16 reload)
94 {
95 /* Select CPU Watchdog based on Core Id */
96 uint32 coreId = IfxCpu_getCoreIndex();
97 Ifx_SCU_WDTCPU *wdt = &MODULE_SCU.WDTCPU[coreId];
98
99 /* Read Config_0 register */
100 Ifx_SCU_WDTCPU_CON0 wdt_con0;
101 wdt_con0.U = wdt->CON0.U;
102
103 if (wdt_con0.B.LCK)
104 {
105 /* see Table 1 (Password Access Bit Pattern Requirements) */
106 wdt_con0.B.ENDINIT = 1;
107 wdt_con0.B.LCK = 0;
108 wdt_con0.B.PW = password;
109
110 /* Password ready. Store it to WDT_CON0 to unprotect the register */
111 wdt->CON0.U = wdt_con0.U;
112 }
113
114 /* Set new Reload value, set ENDINT and LCK bit in Config_0 register */
115 wdt_con0.B.ENDINIT = 1;
116 wdt_con0.B.LCK = 1;
117 wdt_con0.B.REL = reload;
118 wdt->CON0.U = wdt_con0.U;
119
120 /* read back ENDINIT and wait until it has been set */
121 while (wdt->CON0.B.ENDINIT == 0)
122 {}
123 }
124
125
126 void IfxScuWdt_changeSafetyWatchdogPassword(uint16 password, uint16 newPassword)
127 {
128 Ifx_SCU_WDTS *watchdog = &MODULE_SCU.WDTS;
129
130 /* Read Config_0 register */
131 Ifx_SCU_WDTS_CON0 wdt_con0;
132 wdt_con0.U = watchdog->CON0.U;
133
134 if (wdt_con0.B.LCK)
135 {
136 /* see Table 1 (Password Access Bit Pattern Requirements) */
137 wdt_con0.B.ENDINIT = 1;
138 wdt_con0.B.LCK = 0;
139 wdt_con0.B.PW = password;
140
141 /* Password ready. Store it to WDT_CON0 to unprotect the register */
142 watchdog->CON0.U = wdt_con0.U;
143 }
144
145 /* Set new Password, ENDINT and LCK bit in Config_0 register */
146 wdt_con0.B.ENDINIT = 1;
147 wdt_con0.B.LCK = 1;
148 wdt_con0.B.PW = newPassword;
149 watchdog->CON0.U = wdt_con0.U;
150
151 /* read back ENDINIT and wait until it has been set */
152 while (watchdog->CON0.B.ENDINIT == 0)
153 {}
154 }
155
156
157 void IfxScuWdt_changeSafetyWatchdogReload(uint16 password, uint16 reload)
158 {
159 /* Initialize pointer to Safety Watchdog */
160 Ifx_SCU_WDTS *wdt = &MODULE_SCU.WDTS;
161
162 /* Read Config_0 register */
163 Ifx_SCU_WDTS_CON0 wdt_con0;
164 wdt_con0.U = wdt->CON0.U;
165
166 if (wdt_con0.B.LCK)
167 {
168 /* see Table 1 (Password Access Bit Pattern Requirements) */
169 wdt_con0.B.ENDINIT = 1;
170 wdt_con0.B.LCK = 0;
171 wdt_con0.B.PW = password;
172
173 /* Password ready. Store it to WDT_CON0 to unprotect the register */
174 wdt->CON0.U = wdt_con0.U;
175 }
176
177 /* Set new Reload value, set ENDINT and LCK bit in Config_0 register */
178 wdt_con0.B.ENDINIT = 1;
179 wdt_con0.B.LCK = 1;
180 wdt_con0.B.REL = reload;
181 wdt->CON0.U = wdt_con0.U;
182
183 /* read back ENDINIT and wait until it has been set */
184 while (wdt->CON0.B.ENDINIT == 0)
185 {}
186 }
187
188
189 void IfxScuWdt_clearCpuEndinit(uint16 password)
190 {
191 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()], password);
192 }
193
194
195 void IfxScuWdt_clearSafetyEndinit(uint16 password)
196 {
197 IfxScuWdt_clearSafetyEndinitInline(password);
198 }
199
200
201 void IfxScuWdt_disableCpuWatchdog(uint16 password)
202 {
203 /* Select CPU Watchdog based on Core Id */
204 uint32 coreId = (uint32)IfxCpu_getCoreIndex();
205 Ifx_SCU_WDTCPU *wdt = &MODULE_SCU.WDTCPU[coreId];
206
207 IfxScuWdt_clearCpuEndinitInline(wdt, password);
208 wdt->CON1.B.DR = 1; //Set DR bit in Config_1 register
209 IfxScuWdt_setCpuEndinitInline(wdt, password);
210 }
211
212
213 void IfxScuWdt_disableSafetyWatchdog(uint16 password)
214 {
215 IfxScuWdt_clearSafetyEndinitInline(password);
216 SCU_WDTS_CON1.B.DR = 1; //Set DR bit in Config_1 register
217 IfxScuWdt_setSafetyEndinitInline(password);
218 }
219
220
221 void IfxScuWdt_enableCpuWatchdog(uint16 password)
222 {
223 /* Select CPU Watchdog based on Core Id */
224 uint32 coreId = (uint32)IfxCpu_getCoreIndex();
225 Ifx_SCU_WDTCPU *wdt = &MODULE_SCU.WDTCPU[coreId];
226
227 IfxScuWdt_clearCpuEndinitInline(wdt, password);
228 wdt->CON1.B.DR = 0; //Clear DR bit in Config_1 register
229 IfxScuWdt_setCpuEndinitInline(wdt, password);
230 }
231
232
233 void IfxScuWdt_enableSafetyWatchdog(uint16 password)
234 {
235 IfxScuWdt_clearSafetyEndinitInline(password);
236 SCU_WDTS_CON1.B.DR = 0; //Clear DR bit in Config_1 register
237 IfxScuWdt_setSafetyEndinitInline(password);
238 }
239
240
241 uint16 IfxScuWdt_getCpuWatchdogPassword(void)
242 {
243 return IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()]);
244 }
245
246
247 boolean IfxScuWdt_getCpuWatchdogEndInit(void)
248 {
249 return (boolean)IfxScuWdt_getCpuWatchdogEndInitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()]);
250 }
251
252
253 uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
254 {
255 return IfxScuWdt_getSafetyWatchdogPasswordInline();
256 }
257
258
259 void IfxScuWdt_initConfig(IfxScuWdt_Config *config)
260 {
261 config->password = IFXSCUWDT_RESET_PASSWORD;
262 config->reload = 0xFFFC;
263 config->inputFrequency = IfxScu_WDTCON1_IR_divBy16384;
264 config->disableWatchdog = FALSE;
265 config->enableSmuRestriction = FALSE;
266 config->enableAutomaticPasswordChange = FALSE;
267 config->enableTimerCheck = FALSE;
268 config->enableTimerCheckTolerance = FALSE;
269 config->clrInternalResetFlag = FALSE;
270 }
271
272
273 void IfxScuWdt_initCpuWatchdog(Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
274 {
275 Ifx_SCU_WDTCPU_CON0 wdt_con0;
276 Ifx_SCU_WDTCPU_CON1 wdt_con1;
277
278 /* Read Config_0 register and clear wdt_con1 variable */
279 wdt_con0.U = wdt->CON0.U;
280 wdt_con1.U = 0;
281
282 if (wdt_con0.B.LCK)
283 {
284 /* see Table 1 (Password Access Bit Pattern Requirements) */
285 wdt_con0.B.ENDINIT = 1;
286 wdt_con0.B.LCK = 0;
287 wdt_con0.B.PW ^= 0x003F;
288
289 /* Password ready. Store it to WDT_CON0 to unprotect the register */
290 wdt->CON0.U = wdt_con0.U;
291 }
292
293 /* Initialize CON0 register, with modify access, with user defined parameters
294 * Clear ENDINT bit to unprotect CON1 register for initialization
295 * see Table 3 (Modify Access Bit Pattern Requirements) */
296 wdt_con0.B.ENDINIT = 0;
297 wdt_con0.B.LCK = 1;
298 wdt_con0.B.PW = config->password; //user defined password
299 wdt_con0.B.REL = config->reload; //user defined reload value
300
301 /* Modify access ready - write WDT_CON0 register */
302 wdt->CON0.U = wdt_con0.U;
303
304 /* read back ENDINIT and wait until it has been cleared */
305 while (wdt->CON0.B.ENDINIT == 1)
306 {}
307
308 /* Initialize CON1 register */
309 switch (config->inputFrequency)
310 {
311 case IfxScu_WDTCON1_IR_divBy16384:
312 wdt_con1.B.IR0 = 0;
313 wdt_con1.B.IR1 = 0;
314 break;
315 case IfxScu_WDTCON1_IR_divBy256:
316 wdt_con1.B.IR0 = 1;
317 wdt_con1.B.IR1 = 0;
318 break;
319 case IfxScu_WDTCON1_IR_divBy64:
320 wdt_con1.B.IR0 = 0;
321 wdt_con1.B.IR1 = 1;
322 break;
323 }
324
325 wdt_con1.B.DR = config->disableWatchdog ? 1 : 0;
326 wdt_con1.B.UR = config->enableSmuRestriction ? 1 : 0;
327 wdt_con1.B.PAR = config->enableAutomaticPasswordChange ? 1 : 0;
328 wdt_con1.B.TCR = config->enableTimerCheck ? 1 : 0;
329 wdt_con1.B.TCTR = config->enableTimerCheckTolerance ? 1 : 0;
330
331 /* Finally write CON1 with user defined configuration */
332 wdt->CON1.U = wdt_con1.U;
333
334 /* Initialization finished - set CPU ENDINIT protection */
335 IfxScuWdt_setCpuEndinit(config->password);
336 }
337
338
339 void IfxScuWdt_initSafetyWatchdog(Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
340 {
341 Ifx_SCU_WDTS_CON0 wdt_con0;
342 Ifx_SCU_WDTS_CON1 wdt_con1;
343
344 /* Read Config_0 register and clear wdt_con1 variable */
345 wdt_con0.U = wdt->CON0.U;
346 wdt_con1.U = 0;
347
348 if (wdt_con0.B.LCK)
349 {
350 /* see Table 1 (Password Access Bit Pattern Requirements) */
351 wdt_con0.B.ENDINIT = 1;
352 wdt_con0.B.LCK = 0;
353 wdt_con0.B.PW ^= 0x003F;
354
355 /* Password ready. Store it to WDT_CON0 to unprotect the register */
356 wdt->CON0.U = wdt_con0.U;
357 }
358
359 /* Initialize CON0 register, with modify access, with user defined parameters
360 * Clear ENDINT bit to unprotect CON1 register for initialization
361 * see Table 3 (Modify Access Bit Pattern Requirements) */
362 wdt_con0.B.ENDINIT = 0;
363 wdt_con0.B.LCK = 1;
364 wdt_con0.B.PW = config->password; //user defined password
365 wdt_con0.B.REL = config->reload; //user defined reload value
366
367 /* Modify access ready - write WDT_CON0 register */
368 wdt->CON0.U = wdt_con0.U;
369
370 /* read back ENDINIT and wait until it has been cleared */
371 while (wdt->CON0.B.ENDINIT == 1)
372 {}
373
374 /* Initialize CON1 register */
375 switch (config->inputFrequency)
376 {
377 case IfxScu_WDTCON1_IR_divBy16384:
378 wdt_con1.B.IR0 = 0;
379 wdt_con1.B.IR1 = 0;
380 break;
381 case IfxScu_WDTCON1_IR_divBy256:
382 wdt_con1.B.IR0 = 1;
383 wdt_con1.B.IR1 = 0;
384 break;
385 case IfxScu_WDTCON1_IR_divBy64:
386 wdt_con1.B.IR0 = 0;
387 wdt_con1.B.IR1 = 1;
388 break;
389 }
390
391 wdt_con1.B.DR = config->disableWatchdog ? 1 : 0;
392 wdt_con1.B.UR = config->enableSmuRestriction ? 1 : 0;
393 wdt_con1.B.PAR = config->enableAutomaticPasswordChange ? 1 : 0;
394 wdt_con1.B.TCR = config->enableTimerCheck ? 1 : 0;
395 wdt_con1.B.TCTR = config->enableTimerCheckTolerance ? 1 : 0;
396 wdt_con1.B.CLRIRF = config->clrInternalResetFlag ? 0 : 1;
397
398 /* Finally write CON1 with user defined configuration */
399 wdt->CON1.U = wdt_con1.U;
400
401 /* Initialization finished - set Safety ENDINIT protection */
402 IfxScuWdt_setSafetyEndinit(config->password);
403 }
404
405
406 void IfxScuWdt_serviceCpuWatchdog(uint16 password)
407 {
408 IfxScuWdt_setCpuEndinit(password);
409 }
410
411
412 void IfxScuWdt_serviceSafetyWatchdog(uint16 password)
413 {
414 IfxScuWdt_setSafetyEndinit(password);
415 }
416
417
418 void IfxScuWdt_setCpuEndinit(uint16 password)
419 {
420 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()], password);
421 }
422
423
424 void IfxScuWdt_setSafetyEndinit(uint16 password)
425 {
426 IfxScuWdt_setSafetyEndinitInline(password);
427 }
428
429
430 boolean IfxScuWdt_enableWatchdogWithDebugger(void)
431 {
432 boolean status = 0, oenEnabled = 0, watchdogEnabled = 0;
433 uint32 ostateValue;
434
435 volatile uint32 *oecPtr = (volatile uint32 *)0xF0000478;
436 volatile uint32 *ostatePtr = (volatile uint32 *)0xF0000480;
437 volatile uint32 *ocntrlPtr = (volatile uint32 *)0xF000047C;
438
439 /* read OSTATE.OEN */
440 ostateValue = *ostatePtr;
441 oenEnabled = (ostateValue & 0x00000001);
442
443 if (!oenEnabled)
444 {
445 /* enable the debug interface (OSTATE.OEN )if it is not already enabled */
446 /* pattern for enabling OSTATE.OEN */
447 *oecPtr = 0xA1;
448 *oecPtr = 0x5E;
449 *oecPtr = 0xA1;
450 *oecPtr = 0x5E;
451
452 /* read OSTATE.OEN again*/
453 ostateValue = *ostatePtr;
454 oenEnabled = (ostateValue & 0x00000001);
455 }
456
457 if (oenEnabled)
458 {
459 /* set watchdog suspend bit in OSTATE reg, by writing OCNTRL.WDTSUS and OCNTRL.WDTSUS_P together */
460 *ocntrlPtr = 0x00003000;
461 }
462 else
463 {
464 status = 1;
465 }
466
467 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, oenEnabled == 1);
468
469 /* read OSTATE.WDTSUS */
470 ostateValue = *ostatePtr;
471 watchdogEnabled = (ostateValue & 0x00000080);
472
473 if (!watchdogEnabled)
474 {
475 status = 1;
476 }
477
478 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, watchdogEnabled == 1);
479
480 return status;
481 }
IfxScuWdt_setSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:544
IfxScuWdt_getSafetyWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
SCUWDT Inline API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.h:506
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:457
IfxScuWdt_Config::clrInternalResetFlag
boolean clrInternalResetFlag
Clear Internal Reset Flag.
Definition: IfxScuWdt.h:96
IfxScuWdt_enableWatchdogWithDebugger
boolean IfxScuWdt_enableWatchdogWithDebugger(void)
Enables the watchdog functionality with debugger connected, debug interface will also be enabled...
Definition: IfxScuWdt.c:430
IfxScuWdt_clearCpuEndinitInline
IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:434
IfxScuWdt_getCpuWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.h:480
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxScuWdt_initCpuWatchdog
void IfxScuWdt_initCpuWatchdog(Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module...
Definition: IfxScuWdt.c:273
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxScuWdt_disableSafetyWatchdog
void IfxScuWdt_disableSafetyWatchdog(uint16 password)
SCUWDT API to disable Safety Watchdog functionality.
Definition: IfxScuWdt.c:213
IfxScu_WDTCON1_IR_divBy256
Definition: IfxScu_cfg.h:1402
IfxScuWdt_enableSafetyWatchdog
void IfxScuWdt_enableSafetyWatchdog(uint16 password)
SCUWDT API to enable Safety Watchdog functionality.
Definition: IfxScuWdt.c:233
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxScuWdt.h
SCU basic functionality.
IfxScuWdt_serviceCpuWatchdog
void IfxScuWdt_serviceCpuWatchdog(uint16 password)
SCUWDT API to service CPU Watchdog functionality.
Definition: IfxScuWdt.c:406
IfxScuWdt_serviceSafetyWatchdog
void IfxScuWdt_serviceSafetyWatchdog(uint16 password)
SCUWDT API to service Safety Watchdog functionality.
Definition: IfxScuWdt.c:412
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:195
IfxScuWdt_initSafetyWatchdog
void IfxScuWdt_initSafetyWatchdog(Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module...
Definition: IfxScuWdt.c:339
IfxScuWdt_enableCpuWatchdog
void IfxScuWdt_enableCpuWatchdog(uint16 password)
SCUWDT API to enable CPU Watchdog functionality.
Definition: IfxScuWdt.c:221
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IFXSCUWDT_RESET_PASSWORD
#define IFXSCUWDT_RESET_PASSWORD
Reset password of watchdog module.
Definition: IfxScuWdt.c:56
IfxScuWdt_Config::inputFrequency
IfxScu_WDTCON1_IR inputFrequency
input frequency of the WDT
Definition: IfxScuWdt.h:90
IfxScuWdt_getCpuWatchdogEndInit
boolean IfxScuWdt_getCpuWatchdogEndInit(void)
SCUWDT API to fetch current endinit of CPU Watchdog module.
Definition: IfxScuWdt.c:247
IfxScuWdt_Config
Configuration structure for Scu Watchdog. IfxScuWdt_Config is a type describing configuration structu...
Definition: IfxScuWdt.h:86
IfxScuWdt_Config::password
uint16 password
password for access to WDTxCON0 reg
Definition: IfxScuWdt.h:88
IfxScuWdt_Config::enableSmuRestriction
boolean enableSmuRestriction
Unlock Restriction Request Control Bit.
Definition: IfxScuWdt.h:92
IfxScuWdt_Config::enableTimerCheckTolerance
boolean enableTimerCheckTolerance
Timer Check Tolerance Request.
Definition: IfxScuWdt.h:95
IfxScuWdt_changeCpuWatchdogReload
void IfxScuWdt_changeCpuWatchdogReload(uint16 password, uint16 reload)
SCUWDT API to change CPU Watchdog timer reload value.
Definition: IfxScuWdt.c:93
IfxScuWdt_disableCpuWatchdog
void IfxScuWdt_disableCpuWatchdog(uint16 password)
SCUWDT API to disable CPU Watchdog functionality.
Definition: IfxScuWdt.c:201
IfxScuWdt_getCpuWatchdogEndInitInline
IFX_INLINE boolean IfxScuWdt_getCpuWatchdogEndInitInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT API to fetch current endinit of CPU Watchdog module.
Definition: IfxScuWdt.h:494
IfxScuWdt_Config::enableAutomaticPasswordChange
boolean enableAutomaticPasswordChange
Password Auto-sequence Request Bit.
Definition: IfxScuWdt.h:93
IfxScu_WDTCON1_IR_divBy64
Definition: IfxScu_cfg.h:1403
IfxCpu.h
CPU basic functionality.
IfxScuWdt_setCpuEndinitInline
IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:521
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_initConfig
void IfxScuWdt_initConfig(IfxScuWdt_Config *config)
SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt con...
Definition: IfxScuWdt.c:259
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:424
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:253
IfxScuWdt_changeCpuWatchdogPassword
void IfxScuWdt_changeCpuWatchdogPassword(uint16 password, uint16 newPassword)
SCUWDT API to change CPU Watchdog password.
Definition: IfxScuWdt.c:62
IfxScuWdt_Config::enableTimerCheck
boolean enableTimerCheck
Counter Check Request Bit.
Definition: IfxScuWdt.h:94
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxScuWdt_Config::reload
uint16 reload
WDT reload value.
Definition: IfxScuWdt.h:89
IfxCpu_getCoreIndex
IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed...
Definition: IfxCpu.h:778
IfxScu_WDTCON1_IR_divBy16384
Definition: IfxScu_cfg.h:1401
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxScuWdt_Config::disableWatchdog
boolean disableWatchdog
Disable Request Control Bit.
Definition: IfxScuWdt.h:91
IfxScuWdt_changeSafetyWatchdogPassword
void IfxScuWdt_changeSafetyWatchdogPassword(uint16 password, uint16 newPassword)
SCUWDT API to change Safety Watchdog password.
Definition: IfxScuWdt.c:126
IfxScuWdt_changeSafetyWatchdogReload
void IfxScuWdt_changeSafetyWatchdogReload(uint16 password, uint16 reload)
SCUWDT API to change Safety Watchdog timer reload value.
Definition: IfxScuWdt.c:157


iLLD_TC26B: IfxScuWdt.h Source File

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IfxScuWdt.h
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1 /**
2 * \file IfxScuWdt.h
3 * \brief SCU basic functionality
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * This file contains the APIs for SCU Watchdog and Endinit related functions.
43 *
44 * \defgroup IfxLld_Scu_Std_Wdt Wdt Basic Functionality
45 * \ingroup IfxLld_Scu_Std
46 * \defgroup IfxLld_Scu_Std_Wdt_Wdt_Configuration Watchdog Configuration functions
47 * \ingroup IfxLld_Scu_Std_Wdt
48 * \defgroup IfxLld_Scu_Std_Wdt_Wdt_Endinit Watchdog Endinit functions
49 * \ingroup IfxLld_Scu_Std_Wdt
50 * \defgroup IfxLld_Scu_Std_Wdt_Wdt_Operative Watchdog Operative functions
51 * \ingroup IfxLld_Scu_Std_Wdt
52 * \defgroup IfxLld_Scu_Std_Wdt_Wdt_Endinit_Usage How to use Endinit APIs?
53 * \ingroup IfxLld_Scu_Std_Wdt
54 */
55
56 #ifndef IFXSCUWDT_H
57 #define IFXSCUWDT_H 1
58
59 /******************************************************************************/
60 /*----------------------------------Includes----------------------------------*/
61 /******************************************************************************/
62
63 #include "_Impl/IfxScu_cfg.h"
64 #include "Cpu/Std/Ifx_Types.h"
65 #include "IfxScu_reg.h"
66 #include "IfxScu_bf.h"
67 #include "IfxScuWdt.asm.h"
68 #include "Cpu/Std/IfxCpu_Intrinsics.h"
69
70 /******************************************************************************/
71 /*-----------------------------------Macros-----------------------------------*/
72 /******************************************************************************/
73
74 /** \brief Endinit operation Timeout counter
75 */
76 #define IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT (0x100)
77
78 /******************************************************************************/
79 /*-----------------------------Data Structures--------------------------------*/
80 /******************************************************************************/
81
82 /** \brief Configuration structure for Scu Watchdog.
83 * IfxScuWdt_Config is a type describing configuration structure of CPU and
84 * Safety WDT registers defined in IfxScuWdt.h file.
85 */
86 typedef struct
87 {
88 uint16 password; /**< \brief password for access to WDTxCON0 reg */
89 uint16 reload; /**< \brief WDT reload value */
90 IfxScu_WDTCON1_IR inputFrequency; /**< \brief input frequency of the WDT */
91 boolean disableWatchdog; /**< \brief Disable Request Control Bit */
92 boolean enableSmuRestriction; /**< \brief Unlock Restriction Request Control Bit */
93 boolean enableAutomaticPasswordChange; /**< \brief Password Auto-sequence Request Bit */
94 boolean enableTimerCheck; /**< \brief Counter Check Request Bit */
95 boolean enableTimerCheckTolerance; /**< \brief Timer Check Tolerance Request */
96 boolean clrInternalResetFlag; /**< \brief Clear Internal Reset Flag */
97 } IfxScuWdt_Config;
98
99 /** \addtogroup IfxLld_Scu_Std_Wdt_Wdt_Configuration
100 * \{ */
101
102 /******************************************************************************/
103 /*-------------------------Global Function Prototypes-------------------------*/
104 /******************************************************************************/
105
106 /** \brief SCUWDT API to initialize WDT configuration structure - Constructor
107 * This API initialize the ScuWdt configuration structure to default values, these default
108 * values are for software specific, not necessarily hardware reset values.
109 * User must use this API call before IfxScuWdt_Init API call
110 * \param config ScuWdt configuration structure to be initialized
111 * \return None
112 */
113 IFX_EXTERN void IfxScuWdt_initConfig(IfxScuWdt_Config *config);
114
115 /** \brief SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module.
116 *
117 * This API initialize the ScuWdt software driver and corresponding CPU WDT hardware module.
118 * User can configure project specific Watchdog password, Watchdog timer period and other settings
119 * with this interface.
120 * API corresponds to one instance of the hardware module.
121 * User must use this API call for each instance of the WDT hardware module used.
122 * \param wdt reference to register map of CPU WDT hardware instance
123 * \param config ScuWdt configuration structure
124 * \return None
125 */
126 IFX_EXTERN void IfxScuWdt_initCpuWatchdog(Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config);
127
128 /** \brief SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module.
129 *
130 * This API initialize the ScuWdt software driver and corresponding safety WDT hardware module.
131 * User can configure project specific Watchdog password, Watchdog timer period and other settings
132 * with this interface.
133 * API corresponds to one instance of the hardware module.
134 * User must use this API call for each instance of the WDT hardware module used.
135 * \param wdt reference to register map of Safety WDT hardware instance
136 * \param config ScuWdt configuration structure
137 * \return None
138 */
139 IFX_EXTERN void IfxScuWdt_initSafetyWatchdog(Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config);
140
141 /** \} */
142
143 /** \addtogroup IfxLld_Scu_Std_Wdt_Wdt_Endinit
144 * \{ */
145
146 /******************************************************************************/
147 /*-------------------------Inline Function Prototypes-------------------------*/
148 /******************************************************************************/
149
150 /** \brief SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
151 *
152 * This Inline API will disable ENDINIT functionality provided by CPU WDT Hardware module.
153 * This API is only meant to be used with startup routines where function call is not possible.
154 * User need to use this API call before modifying any ENDINIT protected register. User must
155 * always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set
156 * ENDINIT shall not be interrupted by another interrupt/call.
157 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
158 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
159 * \param password Existing (Application specific) password for the Watchdog module.
160 * \return None
161 */
162 IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password);
163
164 /** \brief SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
165 *
166 * This API will disable ENDINIT functionality provided by Safety WDT Hardware module.
167 * This API is only meant to be used with startup routines where function call is not possible.
168 * User need to use this API call before modifying any ENDINIT protected register. User must
169 * always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set
170 * ENDINIT shall not be interrupted by another interrupt/call.
171 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
172 * \param password Existing (Application specific) password for the Watchdog module.
173 * \return None
174 */
175 IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password);
176
177 /** \brief SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
178 *
179 * This API will enable ENDINIT functionality provided by CPU WDT Hardware module.
180 * This API is only meant to be used with startup routines where function call is not possible.
181 * User need to use this API call after modifying any ENDINIT protected register.
182 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
183 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
184 * \param password Existing (Application specific) password for the Watchdog module.
185 * \return None
186 */
187 IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password);
188
189 /** \brief SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
190 *
191 * This API will enable ENDINIT functionality provided by Safety WDT Hardware module.
192 * This API is only meant to be used with startup routines where function call is not possible.
193 * User need to use this API call after modifying any ENDINIT protected register.
194 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
195 * \param password Existing (Application specific) password for the Watchdog module.
196 * \return None
197 */
198 IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password);
199
200 /******************************************************************************/
201 /*-------------------------Global Function Prototypes-------------------------*/
202 /******************************************************************************/
203
204 /** \brief SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
205 *
206 * This API will disable ENDINIT functionality provided by CPU WDT Hardware module.
207 * User need to use this API call before modifying any ENDINIT protected register. User must
208 * always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set
209 * ENDINIT shall not be interrupted by another interrupt/call.
210 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword)
211 * \param password Existing (Application specific) password for the Watchdog module.
212 * \return None
213 */
214 IFX_EXTERN void IfxScuWdt_clearCpuEndinit(uint16 password);
215
216 /** \brief SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
217 *
218 * This API will disable ENDINIT functionality provided by Safety WDT Hardware module.
219 * User need to use this API call before modifying any ENDINIT protected register. User must
220 * always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set
221 * ENDINIT shall not be interrupted by another interrupt/call.
222 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
223 * \param password Existing (Application specific) password for the Watchdog module.
224 * \return None
225 */
226 IFX_EXTERN void IfxScuWdt_clearSafetyEndinit(uint16 password);
227
228 /** \brief SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
229 *
230 * This API will enable ENDINIT functionality provided by CPU WDT Hardware module.
231 * User need to use this API call after modifying any ENDINIT protected register.
232 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword)
233 * \param password Existing (Application specific) password for the Watchdog module.
234 * \return None
235 */
236 IFX_EXTERN void IfxScuWdt_setCpuEndinit(uint16 password);
237
238 /** \brief SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
239 *
240 * This API will enable ENDINIT functionality provided by Safety WDT Hardware module.
241 * User need to use this API call after modifying any ENDINIT protected register.
242 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
243 * \param password Existing (Application specific) password for the Watchdog module.
244 * \return None
245 */
246 IFX_EXTERN void IfxScuWdt_setSafetyEndinit(uint16 password);
247
248 /** \} */
249
250 /** \addtogroup IfxLld_Scu_Std_Wdt_Wdt_Operative
251 * \{ */
252
253 /******************************************************************************/
254 /*-------------------------Inline Function Prototypes-------------------------*/
255 /******************************************************************************/
256
257 /** \brief SCUWDT Inline API to fetch current password of CPU Watchdog module.
258 *
259 * This API will fetch current Watchdog password for CPU WDT Hardware module. password is needed to be passed
260 * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
261 * or store the password globally in a global variable at the application memory.
262 * This API is only meant to be used with startup routines where function call is not possible.
263 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
264 * \return password Existing (Application specific) password for the Watchdog module.
265 */
266 IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog);
267
268 /** \brief SCUWDT API to fetch current endinit of CPU Watchdog module.
269 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
270 * \return Endinit status for the CPU Watchdog module.
271 */
272 IFX_INLINE boolean IfxScuWdt_getCpuWatchdogEndInitInline(Ifx_SCU_WDTCPU *watchdog);
273
274 /** \brief SCUWDT API to fetch current endinit of Safety/System Watchdog module.
275 * \return Endinit status for the Safety Watchdog module.
276 */
277 IFX_INLINE boolean IfxScuWdt_getSafetyWatchdogEndInit(void);
278
279 /** \brief SCUWDT Inline API to fetch current password of Safety Watchdog module.
280 *
281 * This API will fetch current Watchdog password for Safety WDT Hardware module. password is needed to be passed
282 * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
283 * or store the password globally in a global variable at the application memory.
284 * This API is only meant to be used with startup routines where function call is not possible.
285 * \return password Existing (Application specific) password for the Watchdog module.
286 */
287 IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void);
288
289 /******************************************************************************/
290 /*-------------------------Global Function Prototypes-------------------------*/
291 /******************************************************************************/
292
293 /** \brief SCUWDT API to change CPU Watchdog password.
294 *
295 * This API will change password to new one for the corresponding to CPU WDT Hardware module.
296 * User need to have the old password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
297 * \param password Existing (Application specific) password for the Watchdog module.
298 * \param newPassword Application specific new password to be changed for the Watchdog module.
299 * \return None
300 */
301 IFX_EXTERN void IfxScuWdt_changeCpuWatchdogPassword(uint16 password, uint16 newPassword);
302
303 /** \brief SCUWDT API to change CPU Watchdog timer reload value.
304 *
305 * This API will change Watchdog timer reload value to new one for CPU WDT Hardware module.
306 * The Watchdog timers will be reloaded with this value after every serice of Watchdog.
307 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
308 * \param password Existing (Application specific) password for the Watchdog module.
309 * \param reload Reload value for the timer.
310 * \return None
311 */
312 IFX_EXTERN void IfxScuWdt_changeCpuWatchdogReload(uint16 password, uint16 reload);
313
314 /** \brief SCUWDT API to change Safety Watchdog password.
315 *
316 * This API will change password to new one for the corresponding to Safety WDT Hardware module.
317 * User need to have the old password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
318 * \param password Existing (Application specific) password for the Watchdog module.
319 * \param newPassword Application specific new password to be changed for the Watchdog module.
320 * \return None
321 */
322 IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogPassword(uint16 password, uint16 newPassword);
323
324 /** \brief SCUWDT API to change Safety Watchdog timer reload value.
325 *
326 * This API will change Watchdog timer reload value to new one for Safety WDT Hardware module.
327 * The Watchdog timers will be reloaded with this value after every serice of Watchdog.
328 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
329 * \param password Existing (Application specific) password for the Watchdog module.
330 * \param reload Reload value for the timer.
331 * \return None
332 */
333 IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogReload(uint16 password, uint16 reload);
334
335 /** \brief SCUWDT API to disable CPU Watchdog functionality.
336 *
337 * This API will disable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers will stop counting
338 * after this API call.
339 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
340 * \param password Existing (Application specific) password for the Watchdog module.
341 * \return None
342 */
343 IFX_EXTERN void IfxScuWdt_disableCpuWatchdog(uint16 password);
344
345 /** \brief SCUWDT API to disable Safety Watchdog functionality.
346 *
347 * This API will disable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers will stop counting
348 * after this API call.
349 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
350 * \param password Existing (Application specific) password for the Watchdog module.
351 * \return None
352 */
353 IFX_EXTERN void IfxScuWdt_disableSafetyWatchdog(uint16 password);
354
355 /** \brief SCUWDT API to enable CPU Watchdog functionality.
356 *
357 * This API will enable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers need to be serviced
358 * periodically after this API call.
359 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
360 * \param password Existing (Application specific) password for the Watchdog module.
361 * \return None
362 */
363 IFX_EXTERN void IfxScuWdt_enableCpuWatchdog(uint16 password);
364
365 /** \brief SCUWDT API to enable Safety Watchdog functionality.
366 *
367 * This API will enable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers need to be serviced
368 * periodically after this API call.
369 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
370 * \param password Existing (Application specific) password for the Watchdog module.
371 * \return None
372 */
373 IFX_EXTERN void IfxScuWdt_enableSafetyWatchdog(uint16 password);
374
375 /** \brief SCUWDT API to fetch current password of CPU Watchdog module.
376 *
377 * This API will fetch current Watchdog password for CPU WDT Hardware module. password is needed to be passed
378 * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
379 * or store the password globally in a global variable at the application memory.
380 * \return password Existing (Application specific) password for the Watchdog module.
381 */
382 IFX_EXTERN uint16 IfxScuWdt_getCpuWatchdogPassword(void);
383
384 /** \brief SCUWDT API to fetch current endinit of CPU Watchdog module.
385 * \return Endinit status for the CPU Watchdog module.
386 */
387 IFX_EXTERN boolean IfxScuWdt_getCpuWatchdogEndInit(void);
388
389 /** \brief SCUWDT API to fetch current password of Safety Watchdog module.
390 *
391 * This API will fetch current Watchdog password for Safety WDT Hardware module. password is needed to be passed
392 * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
393 * or store the password globally in a global variable at the application memory.
394 * \return password Existing (Application specific) password for the Watchdog module.
395 */
396 IFX_EXTERN uint16 IfxScuWdt_getSafetyWatchdogPassword(void);
397
398 /** \brief SCUWDT API to service CPU Watchdog functionality.
399 *
400 * This API will service Watchdog functionality corresponding to CPU WDT Hardware module.
401 * User need to use this API call periodically. This API results in reloading of the Watchdog Timer.
402 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
403 * \param password Existing (Application specific) password for the Watchdog module.
404 * \return None
405 */
406 IFX_EXTERN void IfxScuWdt_serviceCpuWatchdog(uint16 password);
407
408 /** \brief SCUWDT API to service Safety Watchdog functionality.
409 *
410 * This API will service Watchdog functionality corresponding to Safety WDT Hardware module.
411 * User need to use this API call periodically. This API results in reloading of the Watchdog Timer.
412 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
413 * \param password Existing (Application specific) password for the Watchdog module.
414 * \return None
415 */
416 IFX_EXTERN void IfxScuWdt_serviceSafetyWatchdog(uint16 password);
417
418 /** \} */
419
420 /******************************************************************************/
421 /*-------------------------Global Function Prototypes-------------------------*/
422 /******************************************************************************/
423
424 /** \brief Enables the watchdog functionality with debugger connected,\n
425 * debug interface will also be enabled, if not enabled already.
426 * \return Status, Success = 0, Failure = 1.
427 */
428 IFX_EXTERN boolean IfxScuWdt_enableWatchdogWithDebugger(void);
429
430 /******************************************************************************/
431 /*---------------------Inline Function Implementations------------------------*/
432 /******************************************************************************/
433
434 IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
435 {
436 if (watchdog->CON0.B.LCK)
437 {
438 /* see Table 1 (Password Access Bit Pattern Requirements) */
439 watchdog->CON0.U = (1 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
440 (0 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
441 (password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
442 (watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
443 }
444
445 /* Clear ENDINT and set LCK bit in Config_0 register */
446 watchdog->CON0.U = (0 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
447 (1 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
448 (password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
449 (watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
450
451 /* read back ENDINIT and wait until it has been cleared */
452 while (watchdog->CON0.B.ENDINIT == 1)
453 {}
454 }
455
456
457 IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
458 {
459 if (SCU_WDTS_CON0.B.LCK)
460 {
461 /* see Table 1 (Password Access Bit Pattern Requirements) */
462 SCU_WDTS_CON0.U = (1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
463 (0 << IFX_SCU_WDTS_CON0_LCK_OFF) |
464 (password << IFX_SCU_WDTS_CON0_PW_OFF) |
465 (SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
466 }
467
468 /* Clear ENDINT and set LCK bit in Config_0 register */
469 SCU_WDTS_CON0.U = (0 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
470 (1 << IFX_SCU_WDTS_CON0_LCK_OFF) |
471 (password << IFX_SCU_WDTS_CON0_PW_OFF) |
472 (SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
473
474 /* read back ENDINIT and wait until it has been cleared */
475 while (SCU_WDTS_CON0.B.ENDINIT == 1)
476 {}
477 }
478
479
480 IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
481 {
482 uint16 password;
483
484 /* Read Password from CON0 register
485 * !!! NOTE: !!! when read bottom six bit of password are inverted so we have
486 * to toggle them before returning password */
487 password = watchdog->CON0.B.PW;
488 password ^= 0x003F;
489
490 return password;
491 }
492
493
494 IFX_INLINE boolean IfxScuWdt_getCpuWatchdogEndInitInline(Ifx_SCU_WDTCPU *watchdog)
495 {
496 return (boolean)watchdog->CON0.B.ENDINIT;
497 }
498
499
500 IFX_INLINE boolean IfxScuWdt_getSafetyWatchdogEndInit(void)
501 {
502 return (boolean)MODULE_SCU.WDTS.CON0.B.ENDINIT;
503 }
504
505
506 IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
507 {
508 uint16 password;
509 Ifx_SCU_WDTS *watchdog = &MODULE_SCU.WDTS;
510
511 /* Read Password from Safety WDT CON0 register
512 * !!! NOTE: !!! when read bottom six bit of password are inverted so we have
513 * to toggle them before returning password */
514 password = watchdog->CON0.B.PW;
515 password ^= 0x003F;
516
517 return password;
518 }
519
520
521 IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
522 {
523 if (watchdog->CON0.B.LCK)
524 {
525 /* see Table 1 (Pass.word Access Bit Pattern Requirements) */
526 watchdog->CON0.U = (1 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
527 (0 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
528 (password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
529 (watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
530 }
531
532 /* Set ENDINT and set LCK bit in Config_0 register */
533 watchdog->CON0.U = (1 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
534 (1 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
535 (password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
536 (watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
537
538 /* read back ENDINIT and wait until it has been set */
539 while (watchdog->CON0.B.ENDINIT == 0)
540 {}
541 }
542
543
544 IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
545 {
546 if (SCU_WDTS_CON0.B.LCK)
547 {
548 /* see Table 1 (Password Access Bit Pattern Requirements) */
549 SCU_WDTS_CON0.U = (1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
550 (0 << IFX_SCU_WDTS_CON0_LCK_OFF) |
551 (password << IFX_SCU_WDTS_CON0_PW_OFF) |
552 (SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
553 }
554
555 /* Set ENDINT and set LCK bit in Config_0 register */
556 SCU_WDTS_CON0.U = (1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
557 (1 << IFX_SCU_WDTS_CON0_LCK_OFF) |
558 (password << IFX_SCU_WDTS_CON0_PW_OFF) |
559 (SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
560
561 /* read back ENDINIT and wait until it has been cleared */
562 while (SCU_WDTS_CON0.B.ENDINIT == 0)
563 {}
564 }
565
566
567 #endif /* IFXSCUWDT_H */
IfxScuWdt_setSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:544
IfxScuWdt_getSafetyWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
SCUWDT Inline API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.h:506
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:457
IfxScuWdt_Config::clrInternalResetFlag
boolean clrInternalResetFlag
Clear Internal Reset Flag.
Definition: IfxScuWdt.h:96
IfxScuWdt.asm.h
SCU basic functionality.
IfxScuWdt_clearCpuEndinitInline
IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:434
IfxScuWdt_getCpuWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.h:480
IfxScuWdt_initCpuWatchdog
IFX_EXTERN void IfxScuWdt_initCpuWatchdog(Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module...
Definition: IfxScuWdt.c:273
IfxScuWdt_clearCpuEndinit
IFX_EXTERN void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxScuWdt_disableSafetyWatchdog
IFX_EXTERN void IfxScuWdt_disableSafetyWatchdog(uint16 password)
SCUWDT API to disable Safety Watchdog functionality.
Definition: IfxScuWdt.c:213
IfxCpu_Intrinsics.h
IfxScu_WDTCON1_IR
IfxScu_WDTCON1_IR
Definition: IfxScu_cfg.h:1399
IfxScuWdt_enableSafetyWatchdog
IFX_EXTERN void IfxScuWdt_enableSafetyWatchdog(uint16 password)
SCUWDT API to enable Safety Watchdog functionality.
Definition: IfxScuWdt.c:233
IfxScuWdt_serviceCpuWatchdog
IFX_EXTERN void IfxScuWdt_serviceCpuWatchdog(uint16 password)
SCUWDT API to service CPU Watchdog functionality.
Definition: IfxScuWdt.c:406
IfxScuWdt_serviceSafetyWatchdog
IFX_EXTERN void IfxScuWdt_serviceSafetyWatchdog(uint16 password)
SCUWDT API to service Safety Watchdog functionality.
Definition: IfxScuWdt.c:412
IfxScuWdt_clearSafetyEndinit
IFX_EXTERN void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:195
IfxScuWdt_initSafetyWatchdog
IFX_EXTERN void IfxScuWdt_initSafetyWatchdog(Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module...
Definition: IfxScuWdt.c:339
IfxScuWdt_enableCpuWatchdog
IFX_EXTERN void IfxScuWdt_enableCpuWatchdog(uint16 password)
SCUWDT API to enable CPU Watchdog functionality.
Definition: IfxScuWdt.c:221
IfxScuWdt_getCpuWatchdogPassword
IFX_EXTERN uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxScuWdt_Config::inputFrequency
IfxScu_WDTCON1_IR inputFrequency
input frequency of the WDT
Definition: IfxScuWdt.h:90
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxScuWdt_getCpuWatchdogEndInit
IFX_EXTERN boolean IfxScuWdt_getCpuWatchdogEndInit(void)
SCUWDT API to fetch current endinit of CPU Watchdog module.
Definition: IfxScuWdt.c:247
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxScuWdt_Config
Configuration structure for Scu Watchdog. IfxScuWdt_Config is a type describing configuration structu...
Definition: IfxScuWdt.h:86
IfxScu_cfg.h
SCU on-chip implementation data.
IfxScuWdt_Config::password
uint16 password
password for access to WDTxCON0 reg
Definition: IfxScuWdt.h:88
IfxScuWdt_Config::enableSmuRestriction
boolean enableSmuRestriction
Unlock Restriction Request Control Bit.
Definition: IfxScuWdt.h:92
IfxScuWdt_Config::enableTimerCheckTolerance
boolean enableTimerCheckTolerance
Timer Check Tolerance Request.
Definition: IfxScuWdt.h:95
IfxScuWdt_changeCpuWatchdogReload
IFX_EXTERN void IfxScuWdt_changeCpuWatchdogReload(uint16 password, uint16 reload)
SCUWDT API to change CPU Watchdog timer reload value.
Definition: IfxScuWdt.c:93
IfxScuWdt_disableCpuWatchdog
IFX_EXTERN void IfxScuWdt_disableCpuWatchdog(uint16 password)
SCUWDT API to disable CPU Watchdog functionality.
Definition: IfxScuWdt.c:201
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxScuWdt_getCpuWatchdogEndInitInline
IFX_INLINE boolean IfxScuWdt_getCpuWatchdogEndInitInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT API to fetch current endinit of CPU Watchdog module.
Definition: IfxScuWdt.h:494
IfxScuWdt_Config::enableAutomaticPasswordChange
boolean enableAutomaticPasswordChange
Password Auto-sequence Request Bit.
Definition: IfxScuWdt.h:93
IfxScuWdt_setCpuEndinitInline
IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:521
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_initConfig
IFX_EXTERN void IfxScuWdt_initConfig(IfxScuWdt_Config *config)
SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt con...
Definition: IfxScuWdt.c:259
IfxScuWdt_setSafetyEndinit
IFX_EXTERN void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:424
IfxScuWdt_getSafetyWatchdogPassword
IFX_EXTERN uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:253
IfxScuWdt_changeCpuWatchdogPassword
IFX_EXTERN void IfxScuWdt_changeCpuWatchdogPassword(uint16 password, uint16 newPassword)
SCUWDT API to change CPU Watchdog password.
Definition: IfxScuWdt.c:62
IfxScuWdt_Config::enableTimerCheck
boolean enableTimerCheck
Counter Check Request Bit.
Definition: IfxScuWdt.h:94
IfxScuWdt_Config::reload
uint16 reload
WDT reload value.
Definition: IfxScuWdt.h:89
IfxScuWdt_setCpuEndinit
IFX_EXTERN void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxScuWdt_enableWatchdogWithDebugger
IFX_EXTERN boolean IfxScuWdt_enableWatchdogWithDebugger(void)
Enables the watchdog functionality with debugger connected, debug interface will also be enabled...
Definition: IfxScuWdt.c:430
IfxScuWdt_Config::disableWatchdog
boolean disableWatchdog
Disable Request Control Bit.
Definition: IfxScuWdt.h:91
IfxScuWdt_changeSafetyWatchdogPassword
IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogPassword(uint16 password, uint16 newPassword)
SCUWDT API to change Safety Watchdog password.
Definition: IfxScuWdt.c:126
IfxScuWdt_changeSafetyWatchdogReload
IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogReload(uint16 password, uint16 reload)
SCUWDT API to change Safety Watchdog timer reload value.
Definition: IfxScuWdt.c:157
IfxScuWdt_getSafetyWatchdogEndInit
IFX_INLINE boolean IfxScuWdt_getSafetyWatchdogEndInit(void)
SCUWDT API to fetch current endinit of Safety/System Watchdog module.
Definition: IfxScuWdt.h:500


iLLD_TC26B: IfxSent.c Source File

  • Sent
  • Std
IfxSent.c
Go to the documentation of this file.
1 /**
2 * \file IfxSent.c
3 * \brief SENT basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 *
43 */
44
45 /******************************************************************************/
46 /*----------------------------------Includes----------------------------------*/
47 /******************************************************************************/
48
49 #include "IfxSent.h"
50
51 /******************************************************************************/
52 /*-------------------------Function Implementations---------------------------*/
53 /******************************************************************************/
54
55 float32 IfxSent_getChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId)
56 {
57 float32 fFracDiv = IfxSent_getModuleClock(sent);
58 float32 fPdiv = fFracDiv / (float32)(sent->CH[channelId].CPDR.B.PDIV + 1);
59
60 uint32 div = sent->CH[channelId].CFDR.B.DIV;
61
62 if (div > 0)
63 {
64 float32 fTick = (fPdiv * 56) / div;
65 return 1 / fTick;
66 }
67 else
68 {
69 return 0.0;
70 }
71 }
72
73
74 float32 IfxSent_getModuleClock(Ifx_SENT *sent)
75 {
76 float32 fsys = IfxScuCcu_getSpbFrequency();
77
78 uint32 rmc = sent->CLC.B.RMC;
79
80 if (rmc < 1)
81 {
82 rmc = 1;
83 }
84
85 float32 fclc = fsys / rmc;
86
87 Ifx_SENT_FDR fdr;
88 fdr.U = sent->FDR.U;
89
90 float32 kernelFreq = 0.0;
91
92 if (fdr.B.DM == 1)
93 {
94 kernelFreq = fclc / (1024 - fdr.B.STEP);
95 }
96 else if (fdr.B.DM == 2)
97 {
98 kernelFreq = (fclc * fdr.B.STEP) / 1024;
99 }
100
101 return kernelFreq;
102 }
103
104
105 void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
106 {
107 float32 fFracDiv = IfxSent_getModuleClock(sent);
108
109 /* const uint32 divMin = 560; */
110 const uint32 divMax = 3276;
111
112 uint32 pDiv;
113 uint32 fDiv;
114
115 float32 tResult;
116 tResult = fFracDiv * 56 * tUnit;
117 pDiv = tResult / divMax;
118 fDiv = tResult / pDiv;
119
120 if (fDiv > divMax)
121 {
122 pDiv = pDiv + 1;
123 fDiv = tResult / pDiv;
124 }
125
126 if ((pDiv > 1024) || (pDiv < 1))
127 {
128 pDiv = 1025;
129 fDiv = tResult / 1024;
130 }
131
132 IfxSent_setChannelPreDivider(sent, channelId, (uint16)pDiv - 1);
133 IfxSent_setChannelFractionalDivider(sent, channelId, (uint16)fDiv);
134 }
135
136
137 void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
138 {
139 Ifx_SENT_FDR tempFDR;
140 tempFDR.U = 0;
141 tempFDR.B.STEP = stepValue;
142 tempFDR.B.DM = dividerMode;
143 sent->FDR.U = tempFDR.U;
144 }
145
146
147 void IfxSent_resetModule(Ifx_SENT *sent)
148 {
149 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
150
151 IfxScuWdt_clearCpuEndinit(passwd);
152 sent->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
153 sent->KRST0.B.RST = 1;
154 IfxScuWdt_setCpuEndinit(passwd);
155
156 while (0 == sent->KRST0.B.RSTSTAT) /* Wait until reset is executed */
157
158 {}
159
160 IfxScuWdt_clearCpuEndinit(passwd);
161 sent->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
162 IfxScuWdt_setCpuEndinit(passwd);
163 }
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:572
IfxSent_resetModule
void IfxSent_resetModule(Ifx_SENT *sent)
Resets the SENT module.
Definition: IfxSent.c:147
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxSent_getChannelUnitTime
float32 IfxSent_getChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns the current unit time (f_tick) of the given channel.
Definition: IfxSent.c:55
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxSent_setChannelFractionalDivider
IFX_INLINE void IfxSent_setChannelFractionalDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider)
Sets the channel fractional baudrate divider.
Definition: IfxSent.h:672
IfxSent_setChannelPreDivider
IFX_INLINE void IfxSent_setChannelPreDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider)
Sets the channel baudrate pre-divider.
Definition: IfxSent.h:678
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxSent.h
SENT basic functionality.
IfxSent_ClockDividerMode
IfxSent_ClockDividerMode
SENT.FDR.DM , Specifies clock divider mode.
Definition: IfxSent.h:107
IfxSent_initializeChannelUnitTime
void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channe...
Definition: IfxSent.c:105
IfxSent_initializeModuleClock
void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel.
Definition: IfxSent.c:137
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:85
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxSent_getModuleClock
float32 IfxSent_getModuleClock(Ifx_SENT *sent)
Returns the current module frequency in Hertz.
Definition: IfxSent.c:74


iLLD_TC26B: IfxSent.h Source File

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IfxSent.h
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1 /**
2 * \file IfxSent.h
3 * \brief SENT basic functionality
4 * \ingroup IfxLld_Sent
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 *
44 * \defgroup IfxLld_Sent_Std_Enumerations Enumerations
45 * \ingroup IfxLld_Sent_Std
46 * \defgroup IfxLld_Sent_Std_Configuration Configuration Functions
47 * \ingroup IfxLld_Sent_Std
48 * \defgroup IfxLld_Sent_Std_Interrupts Interrupts
49 * \ingroup IfxLld_Sent_Std
50 * \defgroup IfxLld_Sent_Std_Operative Operative Functions
51 * \ingroup IfxLld_Sent_Std
52 * \defgroup IfxLld_Sent_Std_Baudrate Baudrate Configuration
53 * \ingroup IfxLld_Sent_Std
54 * \defgroup IfxLld_Sent_Std_IO IO Pin Configuration Functions
55 * \ingroup IfxLld_Sent_Std
56 */
57
58 #ifndef IFXSENT_H
59 #define IFXSENT_H 1
60
61 /******************************************************************************/
62 /*----------------------------------Includes----------------------------------*/
63 /******************************************************************************/
64
65 #include "_Impl/IfxSent_cfg.h"
66 #include "Src/Std/IfxSrc.h"
67 #include "Scu/Std/IfxScuCcu.h"
68 #include "_PinMap/IfxSent_PinMap.h"
69 #include "Cpu/Std/IfxCpu_Intrinsics.h"
70 #include "IfxSent_bf.h"
71 #include "IfxSent_reg.h"
72
73 /******************************************************************************/
74 /*-----------------------------------Macros-----------------------------------*/
75 /******************************************************************************/
76
77 #define IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS (0x000037f4)
78
79 /******************************************************************************/
80 /*--------------------------------Enumerations--------------------------------*/
81 /******************************************************************************/
82
83 /** \addtogroup IfxLld_Sent_Std_Enumerations
84 * \{ */
85 /** \brief SENT.CH[channelId].IOCR.ALTI , Specifies alternate input for channel
86 */
87 typedef enum
88 {
89 IfxSent_AlternateInput_0 = 0, /**< \brief Specifies alternate input 0 */
90 IfxSent_AlternateInput_1, /**< \brief Specifies alternate input 1 */
91 IfxSent_AlternateInput_2, /**< \brief Specifies alternate input 2 */
92 IfxSent_AlternateInput_3 /**< \brief Specifies alternate input 3 */
93 } IfxSent_AlternateInput;
94
95 /** \brief SENT.CH[channelId].RSR.CST, Specifies the current channel status
96 */
97 typedef enum
98 {
99 IfxSent_ChannelStatus_stop = 0, /**< \brief Specifies the channel is stopped */
100 IfxSent_ChannelStatus_initialize = 1, /**< \brief Specifies the channel is initialized */
101 IfxSent_ChannelStatus_running = 2, /**< \brief Specifies the channel is running */
102 IfxSent_ChannelStatus_synchronize = 3 /**< \brief Specifies the channel is synchronized */
103 } IfxSent_ChannelStatus;
104
105 /** \brief SENT.FDR.DM , Specifies clock divider mode
106 */
107 typedef enum
108 {
109 IfxSent_ClockDividerMode_off = 0, /**< \brief Specifies clock divider mode off */
110 IfxSent_ClockDividerMode_normal = 1, /**< \brief Specifies clock normal divider mode */
111 IfxSent_ClockDividerMode_fractional = 2 /**< \brief Specifies clock fractional divider mode */
112 } IfxSent_ClockDividerMode;
113
114 /** \brief SENT.CH[channelId].SDS.CON , Specifies received configuration bit value
115 */
116 typedef enum
117 {
118 IfxSent_ConfigBit_0 = 0, /**< \brief Specifies received configuration bit value 0 */
119 IfxSent_ConfigBit_1 /**< \brief Specifies received configuration bit value 1 */
120 } IfxSent_ConfigBit;
121
122 /** \brief SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples
123 */
124 typedef enum
125 {
126 IfxSent_DigitalGlitchesLength_off = 0, /**< \brief Specifies port input samples off */
127 IfxSent_DigitalGlitchesLength_1 = 1, /**< \brief Specifies 1 port input samples */
128 IfxSent_DigitalGlitchesLength_2, /**< \brief Specifies 2 port input samples */
129 IfxSent_DigitalGlitchesLength_3, /**< \brief Specifies 3 port input samples */
130 IfxSent_DigitalGlitchesLength_4, /**< \brief Specifies 4 port input samples */
131 IfxSent_DigitalGlitchesLength_5, /**< \brief Specifies 5 port input samples */
132 IfxSent_DigitalGlitchesLength_6, /**< \brief Specifies 6 port input samples */
133 IfxSent_DigitalGlitchesLength_7, /**< \brief Specifies 7 port input samples */
134 IfxSent_DigitalGlitchesLength_8, /**< \brief Specifies 8 port input samples */
135 IfxSent_DigitalGlitchesLength_9, /**< \brief Specifies 9 port input samples */
136 IfxSent_DigitalGlitchesLength_10, /**< \brief Specifies 10 port input samples */
137 IfxSent_DigitalGlitchesLength_11, /**< \brief Specifies 11 port input samples */
138 IfxSent_DigitalGlitchesLength_12, /**< \brief Specifies 12 port input samples */
139 IfxSent_DigitalGlitchesLength_13, /**< \brief Specifies 13 port input samples */
140 IfxSent_DigitalGlitchesLength_14, /**< \brief Specifies 14 port input samples */
141 IfxSent_DigitalGlitchesLength_15 /**< \brief Specifies 15 port input samples */
142 } IfxSent_DigitalGlitchesLength;
143
144 /** \brief SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure
145 */
146 typedef enum
147 {
148 IfxSent_ExtendedSerialFrameMode_standard = 0, /**< \brief Specifies the standard serial frame structure */
149 IfxSent_ExtendedSerialFrameMode_extended = 1 /**< \brief Specifies the extended serial frame structure */
150 } IfxSent_ExtendedSerialFrameMode;
151
152 /** \brief SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line
153 */
154 typedef enum
155 {
156 IfxSent_ExternalTrigger_0 = 0, /**< \brief Specifies the external trigger line 0 */
157 IfxSent_ExternalTrigger_1, /**< \brief Specifies the external trigger line 1 */
158 IfxSent_ExternalTrigger_2, /**< \brief Specifies the external trigger line 2 */
159 IfxSent_ExternalTrigger_3, /**< \brief Specifies the external trigger line 3 */
160 IfxSent_ExternalTrigger_4, /**< \brief Specifies the external trigger line 4 */
161 IfxSent_ExternalTrigger_5, /**< \brief Specifies the external trigger line 5 */
162 IfxSent_ExternalTrigger_6, /**< \brief Specifies the external trigger line 6 */
163 IfxSent_ExternalTrigger_7, /**< \brief Specifies the external trigger line 7 */
164 IfxSent_ExternalTrigger_8, /**< \brief Specifies the external trigger line 8 */
165 IfxSent_ExternalTrigger_9 /**< \brief Specifies the external trigger line 9 */
166 } IfxSent_ExternalTrigger;
167
168 /** \brief SENT.CH[channelId].RCR.CFC, Specifies received frame check mode
169 */
170 typedef enum
171 {
172 IfxSent_FrameCheckMode_pastSyncPulse = 0, /**< \brief Specifies frame check mode against past sync pulse */
173 IfxSent_FrameCheckMode_futureSuncPulse = 1 /**< \brief Specifies frame check mode against future sync pulse */
174 } IfxSent_FrameCheckMode;
175
176 /** \brief SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for respective interrupt
177 */
178 typedef enum
179 {
180 IfxSent_InterruptNodePointer_0 = 0, /**< \brief Specifies interrupt requested node 0 */
181 IfxSent_InterruptNodePointer_1, /**< \brief Specifies interrupt requested node 1 */
182 IfxSent_InterruptNodePointer_2, /**< \brief Specifies interrupt requested node 2 */
183 IfxSent_InterruptNodePointer_3, /**< \brief Specifies interrupt requested node 3 */
184 IfxSent_InterruptNodePointer_trigo0 = 4, /**< \brief Specifies interrupt requested node TRIGO 0 */
185 IfxSent_InterruptNodePointer_trigo1, /**< \brief Specifies interrupt requested node TRIGO 1 */
186 IfxSent_InterruptNodePointer_trigo2, /**< \brief Specifies interrupt requested node TRIGO 2 */
187 IfxSent_InterruptNodePointer_trigo3, /**< \brief Specifies interrupt requested node TRIGO 3 */
188 IfxSent_InterruptNodePointer_trigo4, /**< \brief Specifies interrupt requested node TRIGO 4 */
189 IfxSent_InterruptNodePointer_trigo5 /**< \brief Specifies interrupt requested node TRIGO 5 */
190 } IfxSent_InterruptNodePointer;
191
192 /** \brief SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer
193 */
194 typedef enum
195 {
196 IfxSent_Nibble_0 = 0, /**< \brief Specifies receive data target nibble pointer to nibble 0 */
197 IfxSent_Nibble_1, /**< \brief Specifies receive data target nibble pointer to nibble 1 */
198 IfxSent_Nibble_2, /**< \brief Specifies receive data target nibble pointer to nibble 2 */
199 IfxSent_Nibble_3, /**< \brief Specifies receive data target nibble pointer to nibble 3 */
200 IfxSent_Nibble_4, /**< \brief Specifies receive data target nibble pointer to nibble 4 */
201 IfxSent_Nibble_5, /**< \brief Specifies receive data target nibble pointer to nibble 5 */
202 IfxSent_Nibble_6, /**< \brief Specifies receive data target nibble pointer to nibble 6 */
203 IfxSent_Nibble_7 /**< \brief Specifies receive data target nibble pointer to nibble 7 */
204 } IfxSent_Nibble;
205
206 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
207 * Definition in Ifx_SENT.CLC.B.EDIS
208 */
209 typedef enum
210 {
211 IfxSent_SleepMode_enable = 0, /**< \brief enables sleep mode */
212 IfxSent_SleepMode_disable = 1 /**< \brief disables sleep mode */
213 } IfxSent_SleepMode;
214
215 /** \brief Specifies the SENT SPC operational mode
216 */
217 typedef enum
218 {
219 IfxSent_SpcMode_sync = 0, /**< \brief Specifies synchronous SPC mode */
220 IfxSent_SpcMode_range = 1, /**< \brief Specifies range selection SPC mode */
221 IfxSent_SpcMode_bidirectional = 2 /**< \brief Specifies bidirectional transmit SPC mode */
222 } IfxSent_SpcMode;
223
224 /** \brief OCDS Suspend Control (OCDS.SUS)
225 */
226 typedef enum
227 {
228 IfxSent_SuspendMode_none = 0, /**< \brief No suspend */
229 IfxSent_SuspendMode_hard = 1, /**< \brief Hard Suspend */
230 IfxSent_SuspendMode_soft = 2 /**< \brief Soft Suspend */
231 } IfxSent_SuspendMode;
232
233 /** \brief SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time
234 */
235 typedef enum
236 {
237 IfxSent_TimeBase_measuredFrequency = 0, /**< \brief Specifies selection of pulse based on measured frequency */
238 IfxSent_TimeBase_nominalFrequency = 1 /**< \brief Specifies selection of pulse based on nomianl frequency */
239 } IfxSent_TimeBase;
240
241 /** \brief SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation
242 */
243 typedef enum
244 {
245 IfxSent_TriggerSource_off = 0, /**< \brief Specifies no pulse generation */
246 IfxSent_TriggerSource_immediate = 1, /**< \brief Specifies immediate pulse generation */
247 IfxSent_TriggerSource_fallingEdge = 2, /**< \brief Specifies pulse generation at fallingEdge */
248 IfxSent_TriggerSource_externalTrigger = 3 /**< \brief Specifies pulse generation after each external trigger */
249 } IfxSent_TriggerSource;
250
251 /** \} */
252
253 /** \brief Sent Interrupt Source
254 */
255 typedef enum
256 {
257 IfxSent_InterruptSource_rsi = 0, /**< \brief Enable Interrupt Request RSI */
258 IfxSent_InterruptSource_rdi = 1, /**< \brief Enable Interrupt Request RDI */
259 IfxSent_InterruptSource_rbi = 2, /**< \brief Enable Interrupt Request RBI */
260 IfxSent_InterruptSource_tdi = 3, /**< \brief Enable Interrupt Request TDI */
261 IfxSent_InterruptSource_tbi = 4, /**< \brief Enable Interrupt Request TBI */
262 IfxSent_InterruptSource_fri = 5, /**< \brief Enable Interrupt Request FRI */
263 IfxSent_InterruptSource_fdi = 6, /**< \brief Enable Interrupt Request FDI */
264 IfxSent_InterruptSource_nni = 7, /**< \brief Enable Interrupt Request NNI */
265 IfxSent_InterruptSource_nvi = 8, /**< \brief Enable Interrupt Request NVI */
266 IfxSent_InterruptSource_crci = 9, /**< \brief Enable Interrupt Request crci */
267 IfxSent_InterruptSource_wsi = 10, /**< \brief Enable Interrupt Request wsi */
268 IfxSent_InterruptSource_sdi = 11, /**< \brief Enable Interrupt Request sdi */
269 IfxSent_InterruptSource_scri = 12, /**< \brief Enable Interrupt Request scri */
270 IfxSent_InterruptSource_wdi = 13 /**< \brief Enable Interrupt Request wdi */
271 } IfxSent_InterruptSource;
272
273 /** \addtogroup IfxLld_Sent_Std_Configuration
274 * \{ */
275
276 /******************************************************************************/
277 /*-------------------------Inline Function Prototypes-------------------------*/
278 /******************************************************************************/
279
280 /** \brief Sets the operation mode of SENT kernel
281 * \param sent base address of the SENT register space
282 * \param channelId SENT channel number
283 * \param alternateInput alternate input/output pin for SENT operation
284 * \return None
285 */
286 IFX_INLINE void IfxSent_setAltiInput(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_AlternateInput alternateInput);
287
288 /** \brief Set the module time stamp pre-divider
289 * \param sent base address of the SENT register space
290 * \param timeStampPreDivider time stamp pre-divider value
291 * \return None
292 */
293 IFX_INLINE void IfxSent_setTimeStampPredivider(Ifx_SENT *sent, uint32 timeStampPreDivider);
294
295 /** \} */
296
297 /** \addtogroup IfxLld_Sent_Std_Interrupts
298 * \{ */
299
300 /******************************************************************************/
301 /*-------------------------Inline Function Prototypes-------------------------*/
302 /******************************************************************************/
303
304 /** \brief Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware.
305 *
306 * This function should be used in an ISR to retrieve the events which triggered the interrupt.
307 * \param sent base address of the SENT register space
308 * \param channelId SENT channel number
309 * \return Interrupt flags which have been cleared.
310 */
311 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getAndClearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId);
312
313 /** \brief Gets the current channel status
314 * \param sent base address of the SENT register space
315 * \param channelId SENT channel number
316 * \return current channel interrupt status
317 */
318 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getChannelInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId);
319
320 /** \brief gets the source for channel interrupt handler
321 * \param channelId SENT channel number
322 * \return interrupt source
323 */
324 IFX_INLINE volatile Ifx_SRC_SRCR *IfxSent_getChannelSrc(IfxSent_ChannelId channelId);
325
326 /** \} */
327
328 /** \addtogroup IfxLld_Sent_Std_Operative
329 * \{ */
330
331 /******************************************************************************/
332 /*-------------------------Inline Function Prototypes-------------------------*/
333 /******************************************************************************/
334
335 /** \brief Disable the channel with the channel number
336 * \param sent base address of the SENT register space
337 * \param channelId SENT channel number
338 * \return None
339 */
340 IFX_INLINE void IfxSent_disableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId);
341
342 /** \brief Disable the SENT module
343 * \param sent base address of the SENT register space
344 * \return None
345 */
346 IFX_INLINE void IfxSent_disableModule(Ifx_SENT *sent);
347
348 /** \brief Enable the channel with the channel number
349 * \param sent base address of the SENT register space
350 * \param channelId SENT channel number
351 * \return None
352 */
353 IFX_INLINE void IfxSent_enableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId);
354
355 /** \brief Enable the SENT module
356 * \param sent base address of the SENT register space
357 * \return None
358 */
359 IFX_INLINE void IfxSent_enableModule(Ifx_SENT *sent);
360
361 /** \brief Returns the module's suspend state.
362 * TRUE :if module is suspended.
363 * FALSE:if module is not yet suspended.
364 * \param sent Pointer to SENT module registers
365 * \return Suspend status (TRUE / FALSE)
366 */
367 IFX_INLINE boolean IfxSent_isModuleSuspended(Ifx_SENT *sent);
368
369 /** \brief Sets the sensitivity of the module to sleep signal
370 * \param sent pointer to SENT registers
371 * \param mode mode selection (enable / disable)
372 * \return None
373 */
374 IFX_INLINE void IfxSent_setSleepMode(Ifx_SENT *sent, IfxSent_SleepMode mode);
375
376 /** \brief Configure the Module to Hard/Soft suspend mode.
377 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
378 * \param sent Pointer to SENT module registers
379 * \param mode Module suspend mode
380 * \return None
381 */
382 IFX_INLINE void IfxSent_setSuspendMode(Ifx_SENT *sent, IfxSent_SuspendMode mode);
383
384 /******************************************************************************/
385 /*-------------------------Global Function Prototypes-------------------------*/
386 /******************************************************************************/
387
388 /** \brief Resets the SENT module
389 * \param sent base address of the SENT register space
390 * \return None
391 */
392 IFX_EXTERN void IfxSent_resetModule(Ifx_SENT *sent);
393
394 /** \} */
395
396 /** \addtogroup IfxLld_Sent_Std_Baudrate
397 * \{ */
398
399 /******************************************************************************/
400 /*-------------------------Inline Function Prototypes-------------------------*/
401 /******************************************************************************/
402
403 /** \brief Sets the channel fractional baudrate divider
404 * \param sent base address of the SENT register space
405 * \param channelId SENT channel number
406 * \param divider channel baudrate fractional divider
407 * \return None
408 */
409 IFX_INLINE void IfxSent_setChannelFractionalDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider);
410
411 /** \brief Sets the channel baudrate pre-divider
412 * \param sent base address of the SENT register space
413 * \param channelId SENT channel number
414 * \param preDivider channel baudrate pre-divider
415 * \return None
416 */
417 IFX_INLINE void IfxSent_setChannelPreDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider);
418
419 /******************************************************************************/
420 /*-------------------------Global Function Prototypes-------------------------*/
421 /******************************************************************************/
422
423 /** \brief Returns the current module frequency in Hertz.
424 * \param sent base address of the SENT register space
425 * \return The current module frequency in Hertz
426 */
427 IFX_EXTERN float32 IfxSent_getModuleClock(Ifx_SENT *sent);
428
429 /** \brief Initializes the desired unit time (f_tick) for the external SENT device connected to the given channel
430 * \param sent base address of the SENT register space
431 * \param channelId SENT channel number
432 * \param tUnit desired unit time (f_tick), e.g. 3E-6 for 3 uS
433 * \return None
434 */
435 IFX_EXTERN void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit);
436
437 /** \brief Initialize and get the clock for SENT kernel
438 * \param sent base address of the SENT register space
439 * \param dividerMode Divider mode for clock output
440 * \param stepValue clock frequency for for module fractional divider
441 * \return None
442 */
443 IFX_EXTERN void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue);
444
445 /** \} */
446
447 /** \addtogroup IfxLld_Sent_Std_IO
448 * \{ */
449
450 /******************************************************************************/
451 /*-------------------------Inline Function Prototypes-------------------------*/
452 /******************************************************************************/
453
454 /** \brief Initializes a SENT input
455 * \param sentIn the SENT Pin which should be configured
456 * \param inputMode the pin input mode which should be configured
457 * \param padDriver the pad driver mode which should be configured
458 * \return None
459 */
460 IFX_INLINE void IfxSent_initSentPin(const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
461
462 /** \brief Initializes a SPC output
463 * \param spcOut the SPC Pin which should be configured
464 * \param spcOutMode Port Output Mode
465 * \param padDriver the pad driver mode which should be configured
466 * \return None
467 */
468 IFX_INLINE void IfxSent_initSpcPin(const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver);
469
470 /** \} */
471
472 /******************************************************************************/
473 /*-------------------------Inline Function Prototypes-------------------------*/
474 /******************************************************************************/
475
476 /** \brief Set the watch dog timer limit value for sent channel.
477 * \param sent base address of the SENT register space
478 * \param channelId SENT channel number
479 * \param watchDogTimerLimit Specifies the watch dog timer limit value.
480 * \return None
481 */
482 IFX_INLINE void IfxSent_setWatchDogTimerLimit(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 watchDogTimerLimit);
483
484 /** \brief Return TRUE if SENT module is enabled
485 * \param sent base address of the SENT register space
486 * \return The status of whether clock for sent is enabled or disabled
487 */
488 IFX_INLINE boolean IfxSent_isModuleEnabled(Ifx_SENT *sent);
489
490 /** \brief Return the Interrupt Status of the SENT channel
491 * \param sent base address of the SENT register space
492 * \param channelId SENT channel number
493 * \param source enable the interrupt source of any interrupt of SENT Channel
494 * \return The Interrupt Status of SENT channel
495 */
496 IFX_INLINE boolean IfxSent_getInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source);
497
498 /**
499 * \param sent base address of the SENT register space
500 * \param channelId SENT channel number
501 * \param source enable the interrupt source of any interrupt of SENT Channel
502 * \return None
503 */
504 IFX_INLINE void IfxSent_clearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source);
505
506 /**
507 * \param sent base address of the SENT register space
508 * \param channelId SENT channel number
509 * \return The Data content of a recieved Data Frame
510 */
511 IFX_INLINE uint32 IfxSent_readReceivedData(Ifx_SENT *sent, IfxSent_ChannelId channelId);
512
513 /** \brief Reads and returns value in RSR (Received Status Register).
514 * \param sent base address of the SENT register space
515 * \param channelId SENT channel number
516 * \return Returns 32 bit RSR
517 */
518 IFX_INLINE uint32 IfxSent_readReceivedStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId);
519
520 /** \brief Returns 4 bit CRC value in Receive Status Register
521 * \param sent base address of the SENT register space
522 * \param channelId SENT channel number
523 * \return 4 bit CRC
524 */
525 IFX_INLINE uint8 IfxSent_readReceivedCrc(Ifx_SENT *sent, IfxSent_ChannelId channelId);
526
527 /** \brief Returns 2 bit CST value in Receive Status Register
528 * \param sent base address of the SENT register space
529 * \param channelId SENT channel number
530 * \return 2 bit CST
531 */
532 IFX_INLINE uint8 IfxSent_readReceivedChannelStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId);
533
534 /** \brief Returns 4 bit SCN value in Receive Status Register
535 * \param sent base address of the SENT register space
536 * \param channelId SENT channel number
537 * \return 4 bit SCN
538 */
539 IFX_INLINE uint8 IfxSent_readReceivedStatusAndCommunicationNibble(Ifx_SENT *sent, IfxSent_ChannelId channelId);
540
541 /** \brief Returns 32 bit Received Time Stamp Value
542 * \param sent base address of the SENT register space
543 * \param channelId SENT channel number
544 * \return 32 bit Time Stamp
545 */
546 IFX_INLINE uint32 IfxSent_readReceivedTimeStamp(Ifx_SENT *sent, IfxSent_ChannelId channelId);
547
548 /** \brief Returns 6 bit PLEN value in SCR Register
549 * \param sent base address of the SENT register space
550 * \param channelId SENT channel number
551 * \return 6 bit PLEN
552 */
553 IFX_INLINE uint8 IfxSent_readSpcPulseLength(Ifx_SENT *sent, IfxSent_ChannelId channelId);
554
555 /** \brief Returns 6 bit Delay length value in SCR Register
556 * \param sent base address of the SENT register space
557 * \param channelId SENT channel number
558 * \return 6 bit DEL
559 */
560 IFX_INLINE uint8 IfxSent_readSpcDelayLength(Ifx_SENT *sent, IfxSent_ChannelId channelId);
561
562 /******************************************************************************/
563 /*-------------------------Global Function Prototypes-------------------------*/
564 /******************************************************************************/
565
566 /** \brief Returns the current unit time (f_tick) of the given channel
567 * \param sent base address of the SENT register space
568 * \param channelId SENT channel number
569 * \return The current unit time in seconds
570 */
571 IFX_EXTERN float32 IfxSent_getChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId);
572
573 /******************************************************************************/
574 /*---------------------Inline Function Implementations------------------------*/
575 /******************************************************************************/
576
577 IFX_INLINE void IfxSent_disableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
578 {
579 sent->CH[channelId].RCR.B.CEN = 0;
580 }
581
582
583 IFX_INLINE void IfxSent_disableModule(Ifx_SENT *sent)
584 {
585 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
586 IfxScuWdt_clearCpuEndinit(passwd);
587 sent->CLC.B.DISR = 1;
588 IfxScuWdt_setCpuEndinit(passwd);
589 }
590
591
592 IFX_INLINE void IfxSent_enableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
593 {
594 sent->CH[channelId].RCR.B.CEN = 1;
595 }
596
597
598 IFX_INLINE void IfxSent_enableModule(Ifx_SENT *sent)
599 {
600 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
601 IfxScuWdt_clearCpuEndinit(passwd);
602 sent->CLC.B.DISR = 0;
603 IfxScuWdt_setCpuEndinit(passwd);
604
605 if (sent->CLC.U)
606 {}
607 }
608
609
610 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getAndClearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
611 {
612 Ifx_SENT_CH_INTSTAT interruptFlags;
613 interruptFlags.U = sent->CH[channelId].INTSTAT.U;
614 sent->CH[channelId].INTCLR.U = interruptFlags.U;
615 return interruptFlags;
616 }
617
618
619 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getChannelInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
620 {
621 Ifx_SENT_CH_INTSTAT interruptFlags;
622 interruptFlags.U = sent->CH[channelId].INTSTAT.U;
623 return interruptFlags;
624 }
625
626
627 IFX_INLINE volatile Ifx_SRC_SRCR *IfxSent_getChannelSrc(IfxSent_ChannelId channelId)
628 {
629 return &MODULE_SRC.SENT.SENT[0].SR[channelId];
630 }
631
632
633 IFX_INLINE void IfxSent_initSentPin(const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
634 {
635 if (sentIn->pin.port != NULL_PTR)
636 {
637 IfxPort_setPinModeInput(sentIn->pin.port, sentIn->pin.pinIndex, inputMode);
638 IfxPort_setPinPadDriver(sentIn->pin.port, sentIn->pin.pinIndex, padDriver);
639 IfxSent_setAltiInput(sentIn->module, sentIn->channelId, (IfxSent_AlternateInput)sentIn->select);
640 }
641 }
642
643
644 IFX_INLINE void IfxSent_initSpcPin(const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver)
645 {
646 if (spcOut->pin.port != NULL_PTR)
647 {
648 IfxPort_setPinModeOutput(spcOut->pin.port, spcOut->pin.pinIndex, spcOutMode, spcOut->select);
649 IfxPort_setPinPadDriver(spcOut->pin.port, spcOut->pin.pinIndex, padDriver);
650 }
651 }
652
653
654 IFX_INLINE boolean IfxSent_isModuleSuspended(Ifx_SENT *sent)
655 {
656 Ifx_SENT_OCS ocs;
657
658 // read the status
659 ocs.U = sent->OCS.U;
660
661 // return the status
662 return ocs.B.SUSSTA;
663 }
664
665
666 IFX_INLINE void IfxSent_setAltiInput(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_AlternateInput alternateInput)
667 {
668 sent->CH[channelId].IOCR.B.ALTI = alternateInput;
669 }
670
671
672 IFX_INLINE void IfxSent_setChannelFractionalDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider)
673 {
674 sent->CH[channelId].CFDR.B.DIV = divider;
675 }
676
677
678 IFX_INLINE void IfxSent_setChannelPreDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider)
679 {
680 sent->CH[channelId].CPDR.B.PDIV = preDivider;
681 }
682
683
684 IFX_INLINE void IfxSent_setSleepMode(Ifx_SENT *sent, IfxSent_SleepMode mode)
685 {
686 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
687 IfxScuWdt_clearCpuEndinit(passwd);
688 sent->CLC.B.EDIS = mode;
689 IfxScuWdt_setCpuEndinit(passwd);
690 }
691
692
693 IFX_INLINE void IfxSent_setSuspendMode(Ifx_SENT *sent, IfxSent_SuspendMode mode)
694 {
695 Ifx_SENT_OCS ocs;
696
697 // remove protection and configure the suspend mode.
698 ocs.B.SUS_P = 1;
699 ocs.B.SUS = mode;
700 sent->OCS.U = ocs.U;
701 }
702
703
704 IFX_INLINE void IfxSent_setTimeStampPredivider(Ifx_SENT *sent, uint32 timeStampPreDivider)
705 {
706 sent->TPD.B.TDIV = timeStampPreDivider;
707 }
708
709
710 IFX_INLINE void IfxSent_setWatchDogTimerLimit(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 watchDogTimerLimit)
711 {
712 sent->CH[channelId].WDT.B.WDLx = watchDogTimerLimit;
713 }
714
715
716 IFX_INLINE boolean IfxSent_isModuleEnabled(Ifx_SENT *sent)
717 {
718 return sent->CLC.B.DISS == 0;
719 }
720
721
722 IFX_INLINE boolean IfxSent_getInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
723 {
724 return (sent->CH[channelId].INTSTAT.U >> source) == 1;
725 }
726
727
728 IFX_INLINE void IfxSent_clearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
729 {
730 sent->CH[channelId].INTCLR.U = (1 << source);
731 }
732
733
734 IFX_INLINE uint32 IfxSent_readReceivedData(Ifx_SENT *sent, IfxSent_ChannelId channelId)
735 {
736 return sent->RDR[channelId].U;
737 }
738
739
740 IFX_INLINE uint32 IfxSent_readReceivedStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
741 {
742 return sent->CH[channelId].RSR.U;
743 }
744
745
746 IFX_INLINE uint8 IfxSent_readReceivedCrc(Ifx_SENT *sent, IfxSent_ChannelId channelId)
747 {
748 return sent->CH[channelId].RSR.B.CRC;
749 }
750
751
752 IFX_INLINE uint8 IfxSent_readReceivedChannelStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
753 {
754 return sent->CH[channelId].RSR.B.CST;
755 }
756
757
758 IFX_INLINE uint8 IfxSent_readReceivedStatusAndCommunicationNibble(Ifx_SENT *sent, IfxSent_ChannelId channelId)
759 {
760 return sent->CH[channelId].RSR.B.SCN;
761 }
762
763
764 IFX_INLINE uint32 IfxSent_readReceivedTimeStamp(Ifx_SENT *sent, IfxSent_ChannelId channelId)
765 {
766 return sent->RTS[channelId].U;
767 }
768
769
770 IFX_INLINE uint8 IfxSent_readSpcPulseLength(Ifx_SENT *sent, IfxSent_ChannelId channelId)
771 {
772 return sent->CH[channelId].SCR.B.PLEN;
773 }
774
775
776 IFX_INLINE uint8 IfxSent_readSpcDelayLength(Ifx_SENT *sent, IfxSent_ChannelId channelId)
777 {
778 return sent->CH[channelId].SCR.B.DEL;
779 }
780
781
782 #endif /* IFXSENT_H */
IfxSent_FrameCheckMode
IfxSent_FrameCheckMode
SENT.CH[channelId].RCR.CFC, Specifies received frame check mode.
Definition: IfxSent.h:170
IfxSent_InterruptNodePointer_2
Specifies interrupt requested node 2.
Definition: IfxSent.h:182
IfxSent_FrameCheckMode_pastSyncPulse
Specifies frame check mode against past sync pulse.
Definition: IfxSent.h:172
IfxSent_ExternalTrigger_5
Specifies the external trigger line 5.
Definition: IfxSent.h:161
IfxSent_DigitalGlitchesLength_10
Specifies 10 port input samples.
Definition: IfxSent.h:136
IfxSent_getChannelSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxSent_getChannelSrc(IfxSent_ChannelId channelId)
gets the source for channel interrupt handler
Definition: IfxSent.h:627
IfxSent_disableModule
IFX_INLINE void IfxSent_disableModule(Ifx_SENT *sent)
Disable the SENT module.
Definition: IfxSent.h:583
IfxSent_InterruptSource_fdi
Enable Interrupt Request FDI.
Definition: IfxSent.h:263
IfxSent_SuspendMode_soft
Soft Suspend.
Definition: IfxSent.h:230
IfxSent_getChannelUnitTime
IFX_EXTERN float32 IfxSent_getChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns the current unit time (f_tick) of the given channel.
Definition: IfxSent.c:55
IfxSent_ExternalTrigger_8
Specifies the external trigger line 8.
Definition: IfxSent.h:164
IfxSent_TriggerSource_off
Specifies no pulse generation.
Definition: IfxSent.h:245
IfxSent_InterruptSource_nvi
Enable Interrupt Request NVI.
Definition: IfxSent.h:265
IfxSent_Spc_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxSent_PinMap.h:70
IfxSent_AlternateInput
IfxSent_AlternateInput
SENT.CH[channelId].IOCR.ALTI , Specifies alternate input for channel.
Definition: IfxSent.h:87
IfxSent_ExternalTrigger_3
Specifies the external trigger line 3.
Definition: IfxSent.h:159
IfxSent_resetModule
IFX_EXTERN void IfxSent_resetModule(Ifx_SENT *sent)
Resets the SENT module.
Definition: IfxSent.c:147
IfxSent_TriggerSource_immediate
Specifies immediate pulse generation.
Definition: IfxSent.h:246
IfxSent_Sent_In::channelId
IfxSent_ChannelId channelId
Channel ID.
Definition: IfxSent_PinMap.h:59
IfxSent_TriggerSource_externalTrigger
Specifies pulse generation after each external trigger.
Definition: IfxSent.h:248
IfxSent_setSuspendMode
IFX_INLINE void IfxSent_setSuspendMode(Ifx_SENT *sent, IfxSent_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxSent.h:693
IfxSent_InterruptNodePointer
IfxSent_InterruptNodePointer
SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for ...
Definition: IfxSent.h:178
IfxSent_SleepMode
IfxSent_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_SENT.CLC.B.EDIS.
Definition: IfxSent.h:209
IfxSent_DigitalGlitchesLength_12
Specifies 12 port input samples.
Definition: IfxSent.h:138
IfxSent_ChannelStatus
IfxSent_ChannelStatus
SENT.CH[channelId].RSR.CST, Specifies the current channel status.
Definition: IfxSent.h:97
IfxSent_Nibble_2
Specifies receive data target nibble pointer to nibble 2.
Definition: IfxSent.h:198
IfxSent_SpcMode_sync
Specifies synchronous SPC mode.
Definition: IfxSent.h:219
IfxSent_InterruptSource_rdi
Enable Interrupt Request RDI.
Definition: IfxSent.h:258
IfxSent_InterruptNodePointer_0
Specifies interrupt requested node 0.
Definition: IfxSent.h:180
IfxSent_InterruptSource_sdi
Enable Interrupt Request sdi.
Definition: IfxSent.h:268
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxSent_readSpcDelayLength
IFX_INLINE uint8 IfxSent_readSpcDelayLength(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 6 bit Delay length value in SCR Register.
Definition: IfxSent.h:776
IfxSent_DigitalGlitchesLength_4
Specifies 4 port input samples.
Definition: IfxSent.h:130
float32
float float32
Definition: Platform_Types.h:170
IfxSent_enableChannel
IFX_INLINE void IfxSent_enableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Enable the channel with the channel number.
Definition: IfxSent.h:592
IfxSent_InterruptSource_nni
Enable Interrupt Request NNI.
Definition: IfxSent.h:264
IfxSent_Nibble_4
Specifies receive data target nibble pointer to nibble 4.
Definition: IfxSent.h:200
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxSent_getChannelInterruptStatus
IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getChannelInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Gets the current channel status.
Definition: IfxSent.h:619
IfxSent_Nibble_0
Specifies receive data target nibble pointer to nibble 0.
Definition: IfxSent.h:196
IfxSrc.h
SRC basic functionality.
IfxCpu_Intrinsics.h
IfxSent_InterruptNodePointer_trigo1
Specifies interrupt requested node TRIGO 1.
Definition: IfxSent.h:185
IfxSent_ExternalTrigger_2
Specifies the external trigger line 2.
Definition: IfxSent.h:158
IfxSent_ExternalTrigger_0
Specifies the external trigger line 0.
Definition: IfxSent.h:156
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxSent_Sent_In
SENT pin mapping structure.
Definition: IfxSent_PinMap.h:56
IfxSent_readSpcPulseLength
IFX_INLINE uint8 IfxSent_readSpcPulseLength(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 6 bit PLEN value in SCR Register.
Definition: IfxSent.h:770
IfxSent_ExtendedSerialFrameMode_extended
Specifies the extended serial frame structure.
Definition: IfxSent.h:149
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:578
IfxSent_InterruptSource_tbi
Enable Interrupt Request TBI.
Definition: IfxSent.h:261
IfxSent_Spc_Out
SPC pin mapping structure.
Definition: IfxSent_PinMap.h:65
IfxSent_ExternalTrigger_9
Specifies the external trigger line 9.
Definition: IfxSent.h:165
IfxSent_InterruptNodePointer_trigo5
Specifies interrupt requested node TRIGO 5.
Definition: IfxSent.h:189
IfxSent_initSpcPin
IFX_INLINE void IfxSent_initSpcPin(const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver)
Initializes a SPC output.
Definition: IfxSent.h:644
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxSent_DigitalGlitchesLength_14
Specifies 14 port input samples.
Definition: IfxSent.h:140
IfxSent_cfg.h
SENT on-chip implementation data.
IfxSent_Nibble_1
Specifies receive data target nibble pointer to nibble 1.
Definition: IfxSent.h:197
IfxSent_ConfigBit_0
Specifies received configuration bit value 0.
Definition: IfxSent.h:118
IfxSent_ChannelStatus_stop
Specifies the channel is stopped.
Definition: IfxSent.h:99
IfxSent_Sent_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxSent_PinMap.h:61
IfxSent_ExternalTrigger_1
Specifies the external trigger line 1.
Definition: IfxSent.h:157
IfxSent_readReceivedCrc
IFX_INLINE uint8 IfxSent_readReceivedCrc(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 4 bit CRC value in Receive Status Register.
Definition: IfxSent.h:746
IfxSent_DigitalGlitchesLength_7
Specifies 7 port input samples.
Definition: IfxSent.h:133
IfxSent_DigitalGlitchesLength_1
Specifies 1 port input samples.
Definition: IfxSent.h:127
IfxSent_DigitalGlitchesLength_15
Specifies 15 port input samples.
Definition: IfxSent.h:141
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxSent_setWatchDogTimerLimit
IFX_INLINE void IfxSent_setWatchDogTimerLimit(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 watchDogTimerLimit)
Set the watch dog timer limit value for sent channel.
Definition: IfxSent.h:710
IfxSent_ExternalTrigger_7
Specifies the external trigger line 7.
Definition: IfxSent.h:163
IfxSent_InterruptNodePointer_trigo4
Specifies interrupt requested node TRIGO 4.
Definition: IfxSent.h:188
IfxSent_DigitalGlitchesLength_13
Specifies 13 port input samples.
Definition: IfxSent.h:139
IfxSent_ClockDividerMode_fractional
Specifies clock fractional divider mode.
Definition: IfxSent.h:111
IfxSent_InterruptSource_scri
Enable Interrupt Request scri.
Definition: IfxSent.h:269
IfxSent_InterruptSource_wsi
Enable Interrupt Request wsi.
Definition: IfxSent.h:267
IfxSent_InterruptSource_fri
Enable Interrupt Request FRI.
Definition: IfxSent.h:262
IfxSent_setChannelFractionalDivider
IFX_INLINE void IfxSent_setChannelFractionalDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider)
Sets the channel fractional baudrate divider.
Definition: IfxSent.h:672
IfxSent_InterruptNodePointer_trigo2
Specifies interrupt requested node TRIGO 2.
Definition: IfxSent.h:186
IfxSent_DigitalGlitchesLength_2
Specifies 2 port input samples.
Definition: IfxSent.h:128
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxSent_clearInterruptStatus
IFX_INLINE void IfxSent_clearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
Definition: IfxSent.h:728
IfxSent_readReceivedData
IFX_INLINE uint32 IfxSent_readReceivedData(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Definition: IfxSent.h:734
IfxSent_disableChannel
IFX_INLINE void IfxSent_disableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Disable the channel with the channel number.
Definition: IfxSent.h:577
IfxSent_InterruptNodePointer_1
Specifies interrupt requested node 1.
Definition: IfxSent.h:181
IfxSent_setSleepMode
IFX_INLINE void IfxSent_setSleepMode(Ifx_SENT *sent, IfxSent_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxSent.h:684
IfxSent_ExternalTrigger
IfxSent_ExternalTrigger
SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line.
Definition: IfxSent.h:154
IfxSent_InterruptNodePointer_trigo0
Specifies interrupt requested node TRIGO 0.
Definition: IfxSent.h:184
IfxSent_SuspendMode
IfxSent_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxSent.h:226
IfxSent_TimeBase_nominalFrequency
Specifies selection of pulse based on nomianl frequency.
Definition: IfxSent.h:238
IfxSent_Nibble
IfxSent_Nibble
SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer.
Definition: IfxSent.h:194
IfxSent_Nibble_5
Specifies receive data target nibble pointer to nibble 5.
Definition: IfxSent.h:201
IfxSent_ExtendedSerialFrameMode
IfxSent_ExtendedSerialFrameMode
SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure.
Definition: IfxSent.h:146
IfxSent_ClockDividerMode_normal
Specifies clock normal divider mode.
Definition: IfxSent.h:110
IfxSent_SuspendMode_none
No suspend.
Definition: IfxSent.h:228
IfxSent_setAltiInput
IFX_INLINE void IfxSent_setAltiInput(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_AlternateInput alternateInput)
Sets the operation mode of SENT kernel.
Definition: IfxSent.h:666
IfxSent_TriggerSource_fallingEdge
Specifies pulse generation at fallingEdge.
Definition: IfxSent.h:247
IfxSent_SpcMode
IfxSent_SpcMode
Specifies the SENT SPC operational mode.
Definition: IfxSent.h:217
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxSent_readReceivedTimeStamp
IFX_INLINE uint32 IfxSent_readReceivedTimeStamp(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 32 bit Received Time Stamp Value.
Definition: IfxSent.h:764
IfxSent_Sent_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxSent_PinMap.h:60
IfxSent_TimeBase_measuredFrequency
Specifies selection of pulse based on measured frequency.
Definition: IfxSent.h:237
IfxSent_ConfigBit
IfxSent_ConfigBit
SENT.CH[channelId].SDS.CON , Specifies received configuration bit value.
Definition: IfxSent.h:116
IfxSent_isModuleSuspended
IFX_INLINE boolean IfxSent_isModuleSuspended(Ifx_SENT *sent)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxSent.h:654
IfxSent_ChannelStatus_initialize
Specifies the channel is initialized.
Definition: IfxSent.h:100
IfxSent_InterruptSource_rsi
Enable Interrupt Request RSI.
Definition: IfxSent.h:257
IfxSent_AlternateInput_1
Specifies alternate input 1.
Definition: IfxSent.h:90
IfxSent_SpcMode_bidirectional
Specifies bidirectional transmit SPC mode.
Definition: IfxSent.h:221
IfxSent_AlternateInput_3
Specifies alternate input 3.
Definition: IfxSent.h:92
IfxSent_DigitalGlitchesLength
IfxSent_DigitalGlitchesLength
SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples.
Definition: IfxSent.h:124
IfxSent_setChannelPreDivider
IFX_INLINE void IfxSent_setChannelPreDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider)
Sets the channel baudrate pre-divider.
Definition: IfxSent.h:678
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxSent_AlternateInput_0
Specifies alternate input 0.
Definition: IfxSent.h:89
IfxSent_ChannelStatus_synchronize
Specifies the channel is synchronized.
Definition: IfxSent.h:102
IfxSent_getInterruptStatus
IFX_INLINE boolean IfxSent_getInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
Return the Interrupt Status of the SENT channel.
Definition: IfxSent.h:722
IfxSent_readReceivedStatusAndCommunicationNibble
IFX_INLINE uint8 IfxSent_readReceivedStatusAndCommunicationNibble(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 4 bit SCN value in Receive Status Register.
Definition: IfxSent.h:758
IfxSent_SleepMode_disable
disables sleep mode
Definition: IfxSent.h:212
IfxSent_ClockDividerMode
IfxSent_ClockDividerMode
SENT.FDR.DM , Specifies clock divider mode.
Definition: IfxSent.h:107
IfxSent_TriggerSource
IfxSent_TriggerSource
SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation.
Definition: IfxSent.h:243
IfxSent_SpcMode_range
Specifies range selection SPC mode.
Definition: IfxSent.h:220
IfxSent_ClockDividerMode_off
Specifies clock divider mode off.
Definition: IfxSent.h:109
IfxSent_DigitalGlitchesLength_off
Specifies port input samples off.
Definition: IfxSent.h:126
IfxSent_InterruptNodePointer_trigo3
Specifies interrupt requested node TRIGO 3.
Definition: IfxSent.h:187
IfxSent_Nibble_7
Specifies receive data target nibble pointer to nibble 7.
Definition: IfxSent.h:203
IfxSent_ExternalTrigger_6
Specifies the external trigger line 6.
Definition: IfxSent.h:162
IfxSent_ExtendedSerialFrameMode_standard
Specifies the standard serial frame structure.
Definition: IfxSent.h:148
IfxSent_DigitalGlitchesLength_6
Specifies 6 port input samples.
Definition: IfxSent.h:132
IfxSent_DigitalGlitchesLength_5
Specifies 5 port input samples.
Definition: IfxSent.h:131
IfxSent_ChannelStatus_running
Specifies the channel is running.
Definition: IfxSent.h:101
IfxSent_ExternalTrigger_4
Specifies the external trigger line 4.
Definition: IfxSent.h:160
IfxSent_Sent_In::module
Ifx_SENT * module
Base address.
Definition: IfxSent_PinMap.h:58
IfxSent_InterruptSource_tdi
Enable Interrupt Request TDI.
Definition: IfxSent.h:260
IfxScuCcu.h
SCU basic functionality.
IfxSent_DigitalGlitchesLength_8
Specifies 8 port input samples.
Definition: IfxSent.h:134
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxSent_FrameCheckMode_futureSuncPulse
Specifies frame check mode against future sync pulse.
Definition: IfxSent.h:173
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxSent_setTimeStampPredivider
IFX_INLINE void IfxSent_setTimeStampPredivider(Ifx_SENT *sent, uint32 timeStampPreDivider)
Set the module time stamp pre-divider.
Definition: IfxSent.h:704
IfxSent_InterruptSource_rbi
Enable Interrupt Request RBI.
Definition: IfxSent.h:259
IfxSent_DigitalGlitchesLength_9
Specifies 9 port input samples.
Definition: IfxSent.h:135
IfxSent_initializeChannelUnitTime
IFX_EXTERN void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channe...
Definition: IfxSent.c:105
IfxSent_initializeModuleClock
IFX_EXTERN void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel.
Definition: IfxSent.c:137
IfxSent_getAndClearInterruptStatus
IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getAndClearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in ha...
Definition: IfxSent.h:610
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:85
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxSent_InterruptSource_crci
Enable Interrupt Request crci.
Definition: IfxSent.h:266
IfxSent_readReceivedStatus
IFX_INLINE uint32 IfxSent_readReceivedStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Reads and returns value in RSR (Received Status Register).
Definition: IfxSent.h:740
IfxSent_TimeBase
IfxSent_TimeBase
SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time.
Definition: IfxSent.h:235
IfxSent_AlternateInput_2
Specifies alternate input 2.
Definition: IfxSent.h:91
IfxSent_SleepMode_enable
enables sleep mode
Definition: IfxSent.h:211
IfxSent_initSentPin
IFX_INLINE void IfxSent_initSentPin(const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a SENT input.
Definition: IfxSent.h:633
IfxSent_DigitalGlitchesLength_11
Specifies 11 port input samples.
Definition: IfxSent.h:137
IfxSent_Nibble_6
Specifies receive data target nibble pointer to nibble 6.
Definition: IfxSent.h:202
IfxSent_getModuleClock
IFX_EXTERN float32 IfxSent_getModuleClock(Ifx_SENT *sent)
Returns the current module frequency in Hertz.
Definition: IfxSent.c:74
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxSent_InterruptSource
IfxSent_InterruptSource
Sent Interrupt Source.
Definition: IfxSent.h:255
IfxSent_isModuleEnabled
IFX_INLINE boolean IfxSent_isModuleEnabled(Ifx_SENT *sent)
Return TRUE if SENT module is enabled.
Definition: IfxSent.h:716
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxSent_readReceivedChannelStatus
IFX_INLINE uint8 IfxSent_readReceivedChannelStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 2 bit CST value in Receive Status Register.
Definition: IfxSent.h:752
IfxSent_SuspendMode_hard
Hard Suspend.
Definition: IfxSent.h:229
IfxSent_InterruptSource_wdi
Enable Interrupt Request wdi.
Definition: IfxSent.h:270
IfxSent_PinMap.h
SENT I/O map.
IfxSent_InterruptNodePointer_3
Specifies interrupt requested node 3.
Definition: IfxSent.h:183
IfxSent_ConfigBit_1
Specifies received configuration bit value 1.
Definition: IfxSent.h:119
IfxSent_enableModule
IFX_INLINE void IfxSent_enableModule(Ifx_SENT *sent)
Enable the SENT module.
Definition: IfxSent.h:598
IfxSent_DigitalGlitchesLength_3
Specifies 3 port input samples.
Definition: IfxSent.h:129
IfxSent_Nibble_3
Specifies receive data target nibble pointer to nibble 3.
Definition: IfxSent.h:199


iLLD_TC26B: IfxSent_PinMap.c Source File

  • _PinMap
IfxSent_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxSent_PinMap.c
3 * \brief SENT I/O map
4 * \ingroup IfxLld_Sent
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxSent_PinMap.h"
44
45 IfxSent_Sent_In IfxSent_SENT0A_AN24_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {NULL_PTR,24}, Ifx_RxSel_a};
46 IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P40, 0}, Ifx_RxSel_a};
47 IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_b};
48 IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P02, 8}, Ifx_RxSel_c};
49 IfxSent_Sent_In IfxSent_SENT1A_AN25_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {NULL_PTR,25}, Ifx_RxSel_a};
50 IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P40, 1}, Ifx_RxSel_a};
51 IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P00, 2}, Ifx_RxSel_b};
52 IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, Ifx_RxSel_c};
53 IfxSent_Sent_In IfxSent_SENT2A_AN26_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {NULL_PTR,26}, Ifx_RxSel_a};
54 IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P40, 2}, Ifx_RxSel_a};
55 IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, Ifx_RxSel_b};
56 IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P02, 6}, Ifx_RxSel_c};
57 IfxSent_Sent_In IfxSent_SENT2D_AN36_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {NULL_PTR,36}, Ifx_RxSel_d};
58 IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P40, 6}, Ifx_RxSel_d};
59 IfxSent_Sent_In IfxSent_SENT3A_AN27_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {NULL_PTR,27}, Ifx_RxSel_a};
60 IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P40, 3}, Ifx_RxSel_a};
61 IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, Ifx_RxSel_b};
62 IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P02, 5}, Ifx_RxSel_c};
63 IfxSent_Sent_In IfxSent_SENT3D_AN37_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {NULL_PTR,37}, Ifx_RxSel_d};
64 IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P40, 7}, Ifx_RxSel_d};
65 IfxSent_Sent_In IfxSent_SENT4A_AN38_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {NULL_PTR,38}, Ifx_RxSel_a};
66 IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P40, 8}, Ifx_RxSel_a};
67 IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, Ifx_RxSel_b};
68 IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P33, 6}, Ifx_RxSel_c};
69 IfxSent_Sent_In IfxSent_SENT5A_AN39_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {NULL_PTR,39}, Ifx_RxSel_a};
70 IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P40, 9}, Ifx_RxSel_a};
71 IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, Ifx_RxSel_b};
72 IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P33, 5}, Ifx_RxSel_c};
73 IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt6};
74 IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt6};
75 IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt6};
76 IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt6};
77 IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt6};
78 IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt6};
79
80
81 const IfxSent_Sent_In *IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS] = {
82 {
83 {
84 &IfxSent_SENT0A_P40_0_IN,
85 &IfxSent_SENT0B_P00_1_IN,
86 &IfxSent_SENT0C_P02_8_IN,
87 NULL_PTR
88 },
89 {
90 &IfxSent_SENT1A_P40_1_IN,
91 &IfxSent_SENT1B_P00_2_IN,
92 &IfxSent_SENT1C_P02_7_IN,
93 NULL_PTR
94 },
95 {
96 &IfxSent_SENT2A_P40_2_IN,
97 &IfxSent_SENT2B_P00_3_IN,
98 &IfxSent_SENT2C_P02_6_IN,
99 &IfxSent_SENT2D_P40_6_IN
100 },
101 {
102 &IfxSent_SENT3A_P40_3_IN,
103 &IfxSent_SENT3B_P00_4_IN,
104 &IfxSent_SENT3C_P02_5_IN,
105 &IfxSent_SENT3D_P40_7_IN
106 },
107 {
108 &IfxSent_SENT4A_P40_8_IN,
109 &IfxSent_SENT4B_P00_5_IN,
110 &IfxSent_SENT4C_P33_6_IN,
111 NULL_PTR
112 },
113 {
114 &IfxSent_SENT5A_P40_9_IN,
115 &IfxSent_SENT5B_P00_6_IN,
116 &IfxSent_SENT5C_P33_5_IN,
117 NULL_PTR
118 }
119 }
120 };
121
122 const IfxSent_Spc_Out *IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS] = {
123 {
124 {
125 &IfxSent_SPC0_P00_1_OUT
126 },
127 {
128 &IfxSent_SPC1_P02_7_OUT
129 },
130 {
131 &IfxSent_SPC2_P00_3_OUT
132 },
133 {
134 &IfxSent_SPC3_P00_4_OUT
135 },
136 {
137 &IfxSent_SPC4_P00_5_OUT
138 },
139 {
140 &IfxSent_SPC5_P00_6_OUT
141 }
142 }
143 };
IfxSent_SPC5_P00_6_OUT
IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT
Definition: IfxSent_PinMap.c:78
IfxSent_SENT0B_P00_1_IN
IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN
Definition: IfxSent_PinMap.c:47
IfxSent_ChannelId_0
Specifies the channel Id 0.
Definition: IfxSent_cfg.h:87
IFXSENT_PINMAP_NUM_MODULES
#define IFXSENT_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxSent_PinMap.h:109
Ifx_RxSel_d
Definition: Ifx_Types.h:132
IfxSent_SENT4A_AN38_IN
IfxSent_Sent_In IfxSent_SENT4A_AN38_IN
Definition: IfxSent_PinMap.c:65
IfxSent_SENT5A_P40_9_IN
IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN
Definition: IfxSent_PinMap.c:70
IfxSent_SENT2C_P02_6_IN
IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN
Definition: IfxSent_PinMap.c:56
IfxSent_ChannelId_4
Specifies the channel Id 4.
Definition: IfxSent_cfg.h:91
IfxSent_Spc_Out_pinTable
const IfxSent_Spc_Out * IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]
Definition: IfxSent_PinMap.c:122
IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS
#define IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS
Definition: IfxSent_PinMap.h:112
Ifx_RxSel_a
Definition: Ifx_Types.h:129
IfxSent_ChannelId_5
Specifies the channel Id 5.
Definition: IfxSent_cfg.h:92
IfxSent_SENT1A_AN25_IN
IfxSent_Sent_In IfxSent_SENT1A_AN25_IN
Definition: IfxSent_PinMap.c:49
IfxSent_SENT3D_P40_7_IN
IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN
Definition: IfxSent_PinMap.c:64
IfxSent_ChannelId_2
Specifies the channel Id 2.
Definition: IfxSent_cfg.h:89
IfxSent_SENT0A_P40_0_IN
IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN
Definition: IfxSent_PinMap.c:46
IfxSent_Sent_In_pinTable
const IfxSent_Sent_In * IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]
Definition: IfxSent_PinMap.c:81
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxSent_Sent_In
SENT pin mapping structure.
Definition: IfxSent_PinMap.h:56
Ifx_RxSel_b
Definition: Ifx_Types.h:130
IfxSent_Spc_Out
SPC pin mapping structure.
Definition: IfxSent_PinMap.h:65
IfxSent_SENT0C_P02_8_IN
IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN
Definition: IfxSent_PinMap.c:48
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:125
IfxSent_SENT1A_P40_1_IN
IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN
Definition: IfxSent_PinMap.c:50
IfxSent_SPC1_P02_7_OUT
IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT
Definition: IfxSent_PinMap.c:74
IfxSent_SENT4B_P00_5_IN
IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN
Definition: IfxSent_PinMap.c:67
IfxSent_SENT5A_AN39_IN
IfxSent_Sent_In IfxSent_SENT5A_AN39_IN
Definition: IfxSent_PinMap.c:69
IfxSent_SENT1B_P00_2_IN
IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN
Definition: IfxSent_PinMap.c:51
Ifx_RxSel_c
Definition: Ifx_Types.h:131
IfxSent_SENT5C_P33_5_IN
IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN
Definition: IfxSent_PinMap.c:72
IfxSent_SENT3D_AN37_IN
IfxSent_Sent_In IfxSent_SENT3D_AN37_IN
Definition: IfxSent_PinMap.c:63
IfxSent_SPC4_P00_5_OUT
IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT
Definition: IfxSent_PinMap.c:77
IfxSent_SENT3C_P02_5_IN
IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN
Definition: IfxSent_PinMap.c:62
IfxSent_ChannelId_1
Specifies the channel Id 1.
Definition: IfxSent_cfg.h:88
IfxSent_SENT2D_AN36_IN
IfxSent_Sent_In IfxSent_SENT2D_AN36_IN
Definition: IfxSent_PinMap.c:57
IfxSent_SENT2A_P40_2_IN
IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN
Definition: IfxSent_PinMap.c:54
IfxSent_SENT0A_AN24_IN
IfxSent_Sent_In IfxSent_SENT0A_AN24_IN
Definition: IfxSent_PinMap.c:45
IfxSent_SENT3A_P40_3_IN
IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN
Definition: IfxSent_PinMap.c:60
IfxSent_SENT4C_P33_6_IN
IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN
Definition: IfxSent_PinMap.c:68
IfxSent_SENT1C_P02_7_IN
IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN
Definition: IfxSent_PinMap.c:52
IFXSENT_PINMAP_NUM_CHANNELS
#define IFXSENT_PINMAP_NUM_CHANNELS
Definition: IfxSent_PinMap.h:110
IfxSent_SENT2A_AN26_IN
IfxSent_Sent_In IfxSent_SENT2A_AN26_IN
Definition: IfxSent_PinMap.c:53
IfxSent_SENT5B_P00_6_IN
IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN
Definition: IfxSent_PinMap.c:71
IfxSent_SPC0_P00_1_OUT
IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT
Definition: IfxSent_PinMap.c:73
IfxSent_SENT2B_P00_3_IN
IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN
Definition: IfxSent_PinMap.c:55
IFXSENT_PINMAP_SENT_IN_NUM_ITEMS
#define IFXSENT_PINMAP_SENT_IN_NUM_ITEMS
Definition: IfxSent_PinMap.h:111
IfxSent_SENT4A_P40_8_IN
IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN
Definition: IfxSent_PinMap.c:66
IfxSent_SPC2_P00_3_OUT
IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT
Definition: IfxSent_PinMap.c:75
IfxSent_SENT3B_P00_4_IN
IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN
Definition: IfxSent_PinMap.c:61
IfxSent_ChannelId_3
Specifies the channel Id 3.
Definition: IfxSent_cfg.h:90
IfxSent_SENT3A_AN27_IN
IfxSent_Sent_In IfxSent_SENT3A_AN27_IN
Definition: IfxSent_PinMap.c:59
IfxSent_SPC3_P00_4_OUT
IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT
Definition: IfxSent_PinMap.c:76
IfxSent_SENT2D_P40_6_IN
IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN
Definition: IfxSent_PinMap.c:58
IfxSent_PinMap.h
SENT I/O map.


iLLD_TC26B: IfxSent_PinMap.h Source File

  • _PinMap
IfxSent_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxSent_PinMap.h
3 * \brief SENT I/O map
4 * \ingroup IfxLld_Sent
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Sent_pinmap SENT Pin Mapping
42 * \ingroup IfxLld_Sent
43 */
44
45 #ifndef IFXSENT_PINMAP_H
46 #define IFXSENT_PINMAP_H
47
48 #include <IfxSent_reg.h>
49 #include <_Impl/IfxSent_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Sent_pinmap
53 * \{ */
54
55 /** \brief SENT pin mapping structure */
56 typedef const struct
57 {
58 Ifx_SENT* module; /**< \brief Base address */
59 IfxSent_ChannelId channelId; /**< \brief Channel ID */
60 IfxPort_Pin pin; /**< \brief Port pin */
61 Ifx_RxSel select; /**< \brief Input multiplexer value */
62 } IfxSent_Sent_In;
63
64 /** \brief SPC pin mapping structure */
65 typedef const struct
66 {
67 Ifx_SENT* module; /**< \brief Base address */
68 IfxSent_ChannelId channelId; /**< \brief Channel ID */
69 IfxPort_Pin pin; /**< \brief Port pin */
70 IfxPort_OutputIdx select; /**< \brief Port control code */
71 } IfxSent_Spc_Out;
72
73 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_AN24_IN; /**< \brief SENT_SENT0A: SENT input channel 0 pin A */
74 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN; /**< \brief SENT_SENT0A: SENT input */
75 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN; /**< \brief SENT_SENT0B: SENT input */
76 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN; /**< \brief SENT_SENT0C: SENT input */
77 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_AN25_IN; /**< \brief SENT_SENT1A: SENT input channel 1 pin A */
78 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN; /**< \brief SENT_SENT1A: SENT input */
79 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN; /**< \brief SENT_SENT1B: SENT input */
80 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN; /**< \brief SENT_SENT1C: SENT input */
81 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_AN26_IN; /**< \brief SENT_SENT2A: SENT input channel 2 pin A */
82 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN; /**< \brief SENT_SENT2A: SENT input */
83 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN; /**< \brief SENT_SENT2B: SENT input */
84 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN; /**< \brief SENT_SENT2C: SENT input */
85 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_AN36_IN; /**< \brief SENT_SENT2D: SENT input channel 2 pin D */
86 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN; /**< \brief SENT_SENT2D: SENT input */
87 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_AN27_IN; /**< \brief SENT_SENT3A: SENT input channel 3 pin A */
88 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN; /**< \brief SENT_SENT3A: SENT input */
89 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN; /**< \brief SENT_SENT3B: SENT input */
90 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN; /**< \brief SENT_SENT3C: SENT input */
91 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_AN37_IN; /**< \brief SENT_SENT3D: SENT input channel 3 pin D */
92 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN; /**< \brief SENT_SENT3D: SENT input */
93 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_AN38_IN; /**< \brief SENT_SENT4A: SENT input channel 4 pin A */
94 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN; /**< \brief SENT_SENT4A: SENT input */
95 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN; /**< \brief SENT_SENT4B: SENT input */
96 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN; /**< \brief SENT_SENT4C: SENT input */
97 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_AN39_IN; /**< \brief SENT_SENT5A: SENT input channel 5 pin A */
98 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN; /**< \brief SENT_SENT5A: SENT input */
99 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN; /**< \brief SENT_SENT5B: SENT input */
100 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN; /**< \brief SENT_SENT5C: SENT input */
101 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT; /**< \brief SENT_SPC0: SENT output */
102 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT; /**< \brief SENT_SPC1: SENT output */
103 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT; /**< \brief SENT_SPC2: SENT output */
104 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT; /**< \brief SENT_SPC3: SENT output */
105 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT; /**< \brief SENT_SPC4: SENT output */
106 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT; /**< \brief SENT_SPC5: SENT output */
107
108 /** \brief Table dimensions */
109 #define IFXSENT_PINMAP_NUM_MODULES 1
110 #define IFXSENT_PINMAP_NUM_CHANNELS 6
111 #define IFXSENT_PINMAP_SENT_IN_NUM_ITEMS 4
112 #define IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS 1
113
114
115 /** \brief IfxSent_Sent_In table */
116 IFX_EXTERN const IfxSent_Sent_In *IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS];
117
118 /** \brief IfxSent_Spc_Out table */
119 IFX_EXTERN const IfxSent_Spc_Out *IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS];
120
121 /** \} */
122
123 #endif /* IFXSENT_PINMAP_H */
IfxSent_SENT0C_P02_8_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN
SENT_SENT0C: SENT input.
Definition: IfxSent_PinMap.h:76
IfxSent_SENT2C_P02_6_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN
SENT_SENT2C: SENT input.
Definition: IfxSent_PinMap.h:84
IFXSENT_PINMAP_NUM_MODULES
#define IFXSENT_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxSent_PinMap.h:109
IfxSent_SENT1A_P40_1_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN
SENT_SENT1A: SENT input.
Definition: IfxSent_PinMap.h:78
IfxSent_SENT3A_AN27_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_AN27_IN
SENT_SENT3A: SENT input channel 3 pin A.
Definition: IfxSent_PinMap.h:87
IfxSent_Spc_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxSent_PinMap.h:70
IfxSent_SPC3_P00_4_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT
SENT_SPC3: SENT output.
Definition: IfxSent_PinMap.h:104
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxSent_SENT1A_AN25_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_AN25_IN
SENT_SENT1A: SENT input channel 1 pin A.
Definition: IfxSent_PinMap.h:77
IfxSent_Sent_In::channelId
IfxSent_ChannelId channelId
Channel ID.
Definition: IfxSent_PinMap.h:59
IfxSent_SENT2A_P40_2_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN
SENT_SENT2A: SENT input.
Definition: IfxSent_PinMap.h:82
IfxSent_Spc_Out_pinTable
IFX_EXTERN const IfxSent_Spc_Out * IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]
IfxSent_Spc_Out table.
Definition: IfxSent_PinMap.h:119
IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS
#define IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS
Definition: IfxSent_PinMap.h:112
IfxSent_SENT5C_P33_5_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN
SENT_SENT5C: SENT input.
Definition: IfxSent_PinMap.h:100
IfxSent_Sent_In
SENT pin mapping structure.
Definition: IfxSent_PinMap.h:56
IfxSent_SENT3C_P02_5_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN
SENT_SENT3C: SENT input.
Definition: IfxSent_PinMap.h:90
IfxSent_Spc_Out
SPC pin mapping structure.
Definition: IfxSent_PinMap.h:65
IfxSent_SENT4C_P33_6_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN
SENT_SENT4C: SENT input.
Definition: IfxSent_PinMap.h:96
IfxSent_SENT4A_AN38_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_AN38_IN
SENT_SENT4A: SENT input channel 4 pin A.
Definition: IfxSent_PinMap.h:93
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxSent_cfg.h
SENT on-chip implementation data.
IfxSent_SPC0_P00_1_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT
SENT_SPC0: SENT output.
Definition: IfxSent_PinMap.h:101
IfxSent_SENT3B_P00_4_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN
SENT_SENT3B: SENT input.
Definition: IfxSent_PinMap.h:89
IfxSent_SENT2D_AN36_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_AN36_IN
SENT_SENT2D: SENT input channel 2 pin D.
Definition: IfxSent_PinMap.h:85
IfxSent_Sent_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxSent_PinMap.h:61
IfxSent_SENT2B_P00_3_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN
SENT_SENT2B: SENT input.
Definition: IfxSent_PinMap.h:83
IfxSent_SENT5B_P00_6_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN
SENT_SENT5B: SENT input.
Definition: IfxSent_PinMap.h:99
IfxSent_SPC4_P00_5_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT
SENT_SPC4: SENT output.
Definition: IfxSent_PinMap.h:105
IfxSent_SENT2A_AN26_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_AN26_IN
SENT_SENT2A: SENT input channel 2 pin A.
Definition: IfxSent_PinMap.h:81
IfxSent_Sent_In_pinTable
IFX_EXTERN const IfxSent_Sent_In * IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]
IfxSent_Sent_In table.
Definition: IfxSent_PinMap.h:116
IfxSent_SPC1_P02_7_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT
SENT_SPC1: SENT output.
Definition: IfxSent_PinMap.h:102
IfxSent_SENT5A_AN39_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_AN39_IN
SENT_SENT5A: SENT input channel 5 pin A.
Definition: IfxSent_PinMap.h:97
IfxSent_Sent_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxSent_PinMap.h:60
IfxSent_SENT1C_P02_7_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN
SENT_SENT1C: SENT input.
Definition: IfxSent_PinMap.h:80
IfxSent_SENT1B_P00_2_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN
SENT_SENT1B: SENT input.
Definition: IfxSent_PinMap.h:79
IFXSENT_PINMAP_NUM_CHANNELS
#define IFXSENT_PINMAP_NUM_CHANNELS
Definition: IfxSent_PinMap.h:110
IfxSent_SENT0B_P00_1_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN
SENT_SENT0B: SENT input.
Definition: IfxSent_PinMap.h:75
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxSent_SENT3A_P40_3_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN
SENT_SENT3A: SENT input.
Definition: IfxSent_PinMap.h:88
IfxSent_SENT3D_AN37_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_AN37_IN
SENT_SENT3D: SENT input channel 3 pin D.
Definition: IfxSent_PinMap.h:91
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:127
IfxSent_SPC2_P00_3_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT
SENT_SPC2: SENT output.
Definition: IfxSent_PinMap.h:103
IfxSent_SENT4A_P40_8_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN
SENT_SENT4A: SENT input.
Definition: IfxSent_PinMap.h:94
IfxSent_SENT0A_P40_0_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN
SENT_SENT0A: SENT input.
Definition: IfxSent_PinMap.h:74
IfxSent_SENT2D_P40_6_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN
SENT_SENT2D: SENT input.
Definition: IfxSent_PinMap.h:86
IfxSent_SENT3D_P40_7_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN
SENT_SENT3D: SENT input.
Definition: IfxSent_PinMap.h:92
IFXSENT_PINMAP_SENT_IN_NUM_ITEMS
#define IFXSENT_PINMAP_SENT_IN_NUM_ITEMS
Definition: IfxSent_PinMap.h:111
IfxSent_Sent_In::module
Ifx_SENT * module
Base address.
Definition: IfxSent_PinMap.h:58
IfxSent_SENT5A_P40_9_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN
SENT_SENT5A: SENT input.
Definition: IfxSent_PinMap.h:98
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:85
IfxSent_SPC5_P00_6_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT
SENT_SPC5: SENT output.
Definition: IfxSent_PinMap.h:106
IfxSent_SENT4B_P00_5_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN
SENT_SENT4B: SENT input.
Definition: IfxSent_PinMap.h:95
IfxSent_SENT0A_AN24_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_AN24_IN
SENT_SENT0A: SENT input channel 0 pin A.
Definition: IfxSent_PinMap.h:73
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxSent_Sent.c Source File

  • Sent
  • Sent
IfxSent_Sent.c
Go to the documentation of this file.
1 /**
2 * \file IfxSent_Sent.c
3 * \brief SENT SENT details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 *
43 */
44
45 /******************************************************************************/
46 /*----------------------------------Includes----------------------------------*/
47 /******************************************************************************/
48
49 #include "IfxSent_Sent.h"
50
51 /******************************************************************************/
52 /*-------------------------Function Implementations---------------------------*/
53 /******************************************************************************/
54
55 void IfxSent_Sent_deInitModule(IfxSent_Sent *driver)
56 {
57 Ifx_SENT *sentSFR = driver->sent;
58 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
59 IfxScuWdt_clearCpuEndinit(passwd);
60 IfxSent_resetModule(sentSFR);
61 IfxScuWdt_setCpuEndinit(passwd);
62 }
63
64
65 boolean IfxSent_Sent_initChannel(IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
66 {
67 boolean result = TRUE;
68
69 channel->driver = config->driver;
70 Ifx_SENT *sentSFR = config->driver->sent;
71 Ifx_SENT_CH *sentCh = &sentSFR->CH[config->channelId];
72 channel->channel = sentCh;
73 channel->channelId = config->channelId;
74
75 IfxSent_disableChannel(sentSFR, config->channelId);
76 IfxSent_initializeChannelUnitTime(sentSFR, config->channelId, config->tUnit);
77
78 Ifx_SENT_CH_WDT tempWDT;
79 tempWDT.U = 0;
80 tempWDT.B.WDLx = config->watchDogTimerLimit;
81 sentCh->WDT.U = tempWDT.U;
82
83 Ifx_SENT_CH_RCR tempRCR;
84 tempRCR.U = 0;
85 tempRCR.B.IEP = config->receiveControl.endPulseIgnored;
86 tempRCR.B.ACE = config->receiveControl.alternateCrcSelected;
87 tempRCR.B.SNI = config->receiveControl.statusNibbleEnabled;
88 tempRCR.B.SDP = config->receiveControl.serialDataProcessingEnabled;
89 tempRCR.B.SCDIS = config->receiveControl.serialDataDisabledCrcDisabled;
90 tempRCR.B.CDIS = config->receiveControl.crcModeDisabled;
91 tempRCR.B.CFC = config->receiveControl.frameCheckMode;
92 tempRCR.B.FRL = config->receiveControl.frameLength;
93 tempRCR.B.CRZ = config->receiveControl.crcMethodDisabled;
94 tempRCR.B.ESF = config->receiveControl.extendedSerialFrameMode;
95 tempRCR.B.IDE = config->receiveControl.driftErrorsDisabled;
96 tempRCR.B.SUSEN = config->receiveControl.suspendTriggered;
97 sentCh->RCR.U = tempRCR.U;
98
99 IfxSent_enableChannel(sentSFR, config->channelId);
100
101 Ifx_SENT_CH_VIEW tempVIEW;
102 tempVIEW.U = 0;
103 tempVIEW.B.RDNP0 = config->nibbleControl.nibblePointer0;
104 tempVIEW.B.RDNP1 = config->nibbleControl.nibblePointer1;
105 tempVIEW.B.RDNP2 = config->nibbleControl.nibblePointer2;
106 tempVIEW.B.RDNP3 = config->nibbleControl.nibblePointer3;
107 tempVIEW.B.RDNP4 = config->nibbleControl.nibblePointer4;
108 tempVIEW.B.RDNP5 = config->nibbleControl.nibblePointer5;
109 tempVIEW.B.RDNP6 = config->nibbleControl.nibblePointer6;
110 tempVIEW.B.RDNP7 = config->nibbleControl.nibblePointer7;
111 sentCh->VIEW.U = tempVIEW.U;
112
113 Ifx_SENT_CH_IOCR tempIOCR;
114 tempIOCR.U = 0;
115 tempIOCR.B.DEPTH = config->inputOutputControl.digitalGlitchFilterDepth;
116 tempIOCR.B.OIE = config->inputOutputControl.outputPulsePolarityHigh;
117 tempIOCR.B.IIE = config->inputOutputControl.inputPulsePolarityHigh;
118 tempIOCR.B.CEC = config->inputOutputControl.edgeCounterCleared;
119 tempIOCR.B.CREG = config->inputOutputControl.glitchRisingCleared;
120 tempIOCR.B.CFEG = config->inputOutputControl.glitchFallingCleared;
121 tempIOCR.B.ETS = config->inputOutputControl.externalTrigger;
122 tempIOCR.B.CTR = config->inputOutputControl.triggerMonitorCleared;
123 sentCh->IOCR.U = tempIOCR.U;
124
125 Ifx_SENT_CH_INP tempINP;
126 tempINP.U = 0;
127 tempINP.B.RSI = config->interuptNodeControl.receiveSuccessInterruptNode;
128 tempINP.B.RDI = config->interuptNodeControl.receiveDataInterruptNode;
129 tempINP.B.RBI = config->interuptNodeControl.receiveBufferOverflowInterruptNode;
130 tempINP.B.TDI = config->interuptNodeControl.transferDataInterruptNode;
131 tempINP.B.TBI = config->interuptNodeControl.transferBufferUnderflowInterruptNode;
132 tempINP.B.ERRI = config->interuptNodeControl.errorInterruptNode;
133 tempINP.B.SDI = config->interuptNodeControl.serialDataReceiveInterruptNode;
134 tempINP.B.WDI = config->interuptNodeControl.watchdogErrorInterruptNode;
135 sentCh->INP.U = tempINP.U;
136
137 sentCh->INTEN.U = config->enabledInterrupts.ALL;
138
139 if (config->receiveControl.frameLength > 8)
140 {
141 /* Clear RSI and enable only RDI interrupt */
142 sentCh->INTEN.B.RSI = 0;
143 sentCh->INTEN.B.RDI = 1;
144 }
145
146 if (config->spcModeOn == TRUE)
147 {
148 uint16 timeOut = IFXSENT_CFG_TIMEOUT_VALUE;
149 uint8 error = 0;
150
151 /* check if Transaction is in progress, before proceeding !!! */
152 while ((sentCh->SCR.B.TRQ == 1) && (timeOut > 0))
153 {
154 /* Wait for Transaction to be completed */
155 timeOut--;
156 }
157
158 if (timeOut == 0U)
159 {
160 error = 1U;
161 }
162
163 if (error == 0U)
164 {
165 Ifx_SENT_CH_SCR tempSCR;
166 tempSCR.U = 0;
167 tempSCR.B.PLEN = config->transmitControl.pulseLength;
168 tempSCR.B.TRIG = config->transmitControl.triggerSource;
169 tempSCR.B.DEL = config->transmitControl.pulseDelayLength;
170 tempSCR.B.BASE = config->transmitControl.timeBase;
171 sentCh->SCR.U = tempSCR.U;
172
173 if (config->transmitControl.spcMode == IfxSent_SpcMode_bidirectional)
174 {
175 /* Enable Buffer Underflow interrupt also */
176 sentCh->INTEN.B.TBI = 1U;
177 }
178 }
179 }
180
181 const IfxSent_Sent_Pins *pinsConfig = (const IfxSent_Sent_Pins *)config->pins;
182
183 if (pinsConfig != NULL_PTR)
184 {
185 const IfxSent_Sent_In *sentIn = pinsConfig->in;
186
187 if (sentIn != NULL_PTR)
188 {
189 IfxSent_initSentPin(sentIn, pinsConfig->inMode, pinsConfig->pinDriver);
190 }
191
192 const IfxSent_Spc_Out *spcOut = pinsConfig->out;
193
194 if (spcOut != NULL_PTR)
195 {
196 IfxSent_initSpcPin(spcOut, pinsConfig->outMode, pinsConfig->pinDriver);
197 }
198 }
199
200 {
201 IfxSrc_Tos tos = config->interrupt.isrProvider;
202
203 if ((config->interrupt.priority != 0) || (tos == IfxSrc_Tos_dma))
204 {
205 volatile Ifx_SRC_SRCR *src = IfxSent_getChannelSrc(config->channelId);
206 IfxSrc_init(src, tos, config->interrupt.priority);
207 IfxSrc_enable(src);
208 }
209 }
210
211 return result;
212 }
213
214
215 void IfxSent_Sent_initChannelConfig(IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
216 {
217 const IfxSent_Sent_ChannelConfig defaultChannelConfig = {
218 .driver = NULL_PTR,
219 .channelId = IfxSent_ChannelId_none,
220 .tUnit = 3E-6, /* 3 uS */
221
222 .watchDogTimerLimit = 0,
223
224 .receiveControl = {
225 .endPulseIgnored = FALSE,
226 .alternateCrcSelected = FALSE,
227 .statusNibbleEnabled = FALSE,
228 .serialDataProcessingEnabled = FALSE,
229 .serialDataDisabledCrcDisabled = FALSE,
230 .crcModeDisabled = FALSE,
231 .frameCheckMode = IfxSent_FrameCheckMode_pastSyncPulse,
232 .frameLength = 6,
233 .crcMethodDisabled = FALSE,
234 .extendedSerialFrameMode = IfxSent_ExtendedSerialFrameMode_standard,
235 .driftErrorsDisabled = FALSE,
236 .suspendTriggered = FALSE,
237 },
238
239 .nibbleControl = {
240 .nibblePointer0 = IfxSent_Nibble_0,
241 .nibblePointer1 = IfxSent_Nibble_1,
242 .nibblePointer2 = IfxSent_Nibble_2,
243 .nibblePointer3 = IfxSent_Nibble_3,
244 .nibblePointer4 = IfxSent_Nibble_4,
245 .nibblePointer5 = IfxSent_Nibble_5,
246 .nibblePointer6 = IfxSent_Nibble_6,
247 .nibblePointer7 = IfxSent_Nibble_7,
248 },
249
250 .inputOutputControl = {
251 .digitalGlitchFilterDepth = IfxSent_DigitalGlitchesLength_2,
252 .outputPulsePolarityHigh = FALSE,
253 .inputPulsePolarityHigh = FALSE,
254 .edgeCounterCleared = TRUE,
255 .glitchRisingCleared = TRUE,
256 .glitchFallingCleared = TRUE,
257 .externalTrigger = IfxSent_ExternalTrigger_0,
258 .triggerMonitorCleared = FALSE,
259 },
260
261 .enabledInterrupts.ALL = IFXSENT_CFG_CHANNEL_INTEN,
262
263 .interuptNodeControl = {
264 .receiveDataInterruptNode = IfxSent_InterruptNodePointer_0,
265 .receiveSuccessInterruptNode = IfxSent_InterruptNodePointer_0,
266 .receiveBufferOverflowInterruptNode = IfxSent_InterruptNodePointer_0,
267 .transferDataInterruptNode = IfxSent_InterruptNodePointer_0,
268 .transferBufferUnderflowInterruptNode = IfxSent_InterruptNodePointer_0,
269 .errorInterruptNode = IfxSent_InterruptNodePointer_0,
270 .serialDataReceiveInterruptNode = IfxSent_InterruptNodePointer_0,
271 .watchdogErrorInterruptNode = IfxSent_InterruptNodePointer_0,
272 },
273
274 .pins = NULL_PTR,
275
276 /* SPC mode enable/disable */
277 .spcModeOn = FALSE,
278 };
279 *config = defaultChannelConfig;
280 config->driver = driver;
281 }
282
283
284 boolean IfxSent_Sent_initModule(IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
285 {
286 boolean result = TRUE;
287 Ifx_SENT *sentSFR = config->module;
288 driver->sent = sentSFR;
289
290 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
291
292 if (IfxSent_isModuleEnabled(sentSFR) == FALSE)
293 {
294 IfxSent_enableModule(sentSFR);
295 }
296
297 IfxScuWdt_clearCpuEndinit(passwd);
298 sentSFR->CLC.B.EDIS = (config->sleepModeEnabled != FALSE) ? 0 : 1;
299 sentSFR->CLC.B.RMC = 1; /* no divider required, pass clock 1:1*/
300
301 IfxSent_initializeModuleClock(sentSFR, IfxSent_ClockDividerMode_normal, 1023); /* Fractional divider not required, pass 1:1*/
302 IfxSent_setTimeStampPredivider(sentSFR, config->timeStampPreDivider);
303
304 IfxScuWdt_setCpuEndinit(passwd);
305
306 return result;
307 }
308
309
310 void IfxSent_Sent_initModuleConfig(IfxSent_Sent_Config *config, Ifx_SENT *sent)
311 {
312 /* Default module initialization */
313 const IfxSent_Sent_Config defaultModuleConfig = {
314 .module = NULL_PTR,
315 .sleepModeEnabled = TRUE,
316 .timeStampPreDivider = 0,
317 };
318 *config = defaultModuleConfig;
319 config->module = sent;
320 }
321
322
323 boolean IfxSent_Sent_readChannelSerialDataFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
324 {
325 boolean result = TRUE;
326
327 Ifx_SENT *sentSFR = channel->driver->sent;
328 IfxSent_ChannelId ChanIdx = channel->channelId;
329 frame->data = sentSFR->RDR[ChanIdx].U;
330 frame->timeStamp = sentSFR->RTS[ChanIdx].U;
331 frame->statusNibble = channel->channel->RSR.B.SCN;
332
333 return result;
334 }
335
336
337 boolean IfxSent_Sent_readChannelSerialMessageFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
338 {
339 boolean result = TRUE;
340
341 Ifx_SENT_CH *sentCh = channel->channel;
342 Ifx_SENT_CH_SDS sds;
343
344 sds.U = sentCh->SDS.U;
345
346 message->serialData = sds.B.SD;
347 message->messageId = sds.B.MID;
348 message->configBit = (IfxSent_ConfigBit)sds.B.CON;
349 message->crc = sds.B.SCRC;
350
351 return result;
352 }
IfxSent_Sent_InterruptNodeControl::serialDataReceiveInterruptNode
IfxSent_InterruptNodePointer serialDataReceiveInterruptNode
Specifies the interrupt node for sdi request.
Definition: IfxSent_Sent.h:465
IfxSent_Sent_Frame::timeStamp
uint32 timeStamp
Contains the timestamp of last received frame.
Definition: IfxSent_Sent.h:569
IfxSent_Sent_readChannelSerialMessageFrame
boolean IfxSent_Sent_readChannelSerialMessageFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
reads the Serial data recieved and collected over several SENT frames
Definition: IfxSent_Sent.c:337
IfxSent_Sent_InterruptNodeControl::transferBufferUnderflowInterruptNode
IfxSent_InterruptNodePointer transferBufferUnderflowInterruptNode
Specifies the interrupt node for tbi request.
Definition: IfxSent_Sent.h:463
IfxSent_FrameCheckMode_pastSyncPulse
Specifies frame check mode against past sync pulse.
Definition: IfxSent.h:172
IfxSent_getChannelSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxSent_getChannelSrc(IfxSent_ChannelId channelId)
gets the source for channel interrupt handler
Definition: IfxSent.h:627
IfxSent_Sent_EnabledInterrupts::ALL
uint32 ALL
Specifies to write and read to/from all flags as once via the ALL member.
Definition: IfxSent_Sent.h:429
IfxSent_Sent_TransmitControl::spcMode
IfxSent_SpcMode spcMode
Specifies the SENT SPC operational mode.
Definition: IfxSent_Sent.h:520
IfxSent_Sent_SerialMessageFrame
Specifies received message frame.
Definition: IfxSent_Sent.h:575
IfxSent_Sent_ReceiveControl::suspendTriggered
boolean suspendTriggered
Specifies the suspend trigger disables the channel or not.
Definition: IfxSent_Sent.h:506
IfxSent_Sent_SerialMessageFrame::messageId
uint8 messageId
Contains the received message ID value.
Definition: IfxSent_Sent.h:578
IfxSent_Sent_Frame
Specifies the frame configuration structure for a channel.
Definition: IfxSent_Sent.h:566
IfxSent_resetModule
void IfxSent_resetModule(Ifx_SENT *sent)
Resets the SENT module.
Definition: IfxSent.c:147
IfxSent_Sent_NibbleControl::nibblePointer2
IfxSent_Nibble nibblePointer2
Specifies the received nibble2 control.
Definition: IfxSent_Sent.h:475
IfxSent_Sent_ReceiveControl::serialDataDisabledCrcDisabled
boolean serialDataDisabledCrcDisabled
Specifies the CRC disable for serial data disabled mode.
Definition: IfxSent_Sent.h:502
IfxSent_Sent_NibbleControl::nibblePointer5
IfxSent_Nibble nibblePointer5
Specifies the received nibble5 control.
Definition: IfxSent_Sent.h:478
IfxSent_Nibble_2
Specifies receive data target nibble pointer to nibble 2.
Definition: IfxSent.h:198
IfxSent_Sent_InputOutputControl::triggerMonitorCleared
boolean triggerMonitorCleared
Specifies the trigger monitor reset.
Definition: IfxSent_Sent.h:442
IfxSent_Sent_InputOutputControl::digitalGlitchFilterDepth
IfxSent_DigitalGlitchesLength digitalGlitchFilterDepth
Specifies the Digital Glitch Filter depth for input signal delay.
Definition: IfxSent_Sent.h:443
IfxSent_InterruptNodePointer_0
Specifies interrupt requested node 0.
Definition: IfxSent.h:180
IfxSent_Sent_ChannelConfig::spcModeOn
boolean spcModeOn
Specifies the SENT SPC mode enable/disable.
Definition: IfxSent_Sent.h:551
IfxSent_Sent_InterruptNodeControl::watchdogErrorInterruptNode
IfxSent_InterruptNodePointer watchdogErrorInterruptNode
Specifies the interrupt node for wdi request.
Definition: IfxSent_Sent.h:466
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxSent_Sent_InterruptNodeControl::transferDataInterruptNode
IfxSent_InterruptNodePointer transferDataInterruptNode
Specifies the interrupt node for tdi request.
Definition: IfxSent_Sent.h:462
IfxSent_enableChannel
IFX_INLINE void IfxSent_enableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Enable the channel with the channel number.
Definition: IfxSent.h:592
IfxSent_Nibble_4
Specifies receive data target nibble pointer to nibble 4.
Definition: IfxSent.h:200
IfxSent_Sent_InterruptNodeControl::receiveBufferOverflowInterruptNode
IfxSent_InterruptNodePointer receiveBufferOverflowInterruptNode
Specifies the interrupt node for rbi request.
Definition: IfxSent_Sent.h:461
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxSent_Sent_Pins::inMode
IfxPort_InputMode inMode
Specifies input pin mode.
Definition: IfxSent_Sent.h:488
IFXSENT_CFG_CHANNEL_INTEN
#define IFXSENT_CFG_CHANNEL_INTEN
Specifies all interrupt events.
Definition: IfxSent_cfg.h:65
IfxSent_Nibble_0
Specifies receive data target nibble pointer to nibble 0.
Definition: IfxSent.h:196
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxSent_ExternalTrigger_0
Specifies the external trigger line 0.
Definition: IfxSent.h:156
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxSent_Sent_In
SENT pin mapping structure.
Definition: IfxSent_PinMap.h:56
IfxSent_Sent_Channel::driver
IfxSent_Sent * driver
Specifies the pointer to SENT module handler.
Definition: IfxSent_Sent.h:531
IfxSent_Sent_NibbleControl::nibblePointer3
IfxSent_Nibble nibblePointer3
Specifies the received nibble3 control.
Definition: IfxSent_Sent.h:476
IfxSent_Spc_Out
SPC pin mapping structure.
Definition: IfxSent_PinMap.h:65
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxSent_Sent_TransmitControl::triggerSource
IfxSent_TriggerSource triggerSource
Specifies the trigger source and mode.
Definition: IfxSent_Sent.h:518
IfxSent_Sent_InputOutputControl::outputPulsePolarityHigh
boolean outputPulsePolarityHigh
Specifies the polarity of input of each channel.
Definition: IfxSent_Sent.h:438
IfxSent_initSpcPin
IFX_INLINE void IfxSent_initSpcPin(const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver)
Initializes a SPC output.
Definition: IfxSent.h:644
IfxSent_Sent_deInitModule
void IfxSent_Sent_deInitModule(IfxSent_Sent *driver)
Reset the SENT module.
Definition: IfxSent_Sent.c:55
IfxSent_Sent_Interrupt::priority
uint16 priority
Specifies the interrupt priority. Always 1 since all interrupts are handled at a time.
Definition: IfxSent_Sent.h:451
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxSent_Sent_ChannelConfig
Specifies the SENT Channel configuration structure.
Definition: IfxSent_Sent.h:538
IfxSent_Sent_Config
Specifies the SENT module configuration structure.
Definition: IfxSent_Sent.h:557
IfxSent_Sent_initModuleConfig
void IfxSent_Sent_initModuleConfig(IfxSent_Sent_Config *config, Ifx_SENT *sent)
Initialise buffer with default SENT configuration.
Definition: IfxSent_Sent.c:310
IfxSent_Sent::sent
Ifx_SENT * sent
Specifies pointer to SENT registers.
Definition: IfxSent_Sent.h:422
IfxSent_Sent_Config::module
Ifx_SENT * module
Specifies pointer to SENT registers.
Definition: IfxSent_Sent.h:559
IfxSent_Nibble_1
Specifies receive data target nibble pointer to nibble 1.
Definition: IfxSent.h:197
IfxSent_Sent_NibbleControl::nibblePointer6
IfxSent_Nibble nibblePointer6
Specifies the received nibble6 control.
Definition: IfxSent_Sent.h:479
IfxSent_Sent_ReceiveControl::serialDataProcessingEnabled
boolean serialDataProcessingEnabled
Specifies the serial data processing mode.
Definition: IfxSent_Sent.h:501
IfxSent_Sent_Frame::data
uint32 data
Contains the data from last received frame.
Definition: IfxSent_Sent.h:568
IfxSent_Sent_Pins::in
IFX_CONST IfxSent_Sent_In * in
Specifies input pin configuration.
Definition: IfxSent_Sent.h:487
IfxSent_Sent
Specifies SENT handle structure.
Definition: IfxSent_Sent.h:420
IfxSent_Sent_NibbleControl::nibblePointer0
IfxSent_Nibble nibblePointer0
Specifies the received nibble0 control.
Definition: IfxSent_Sent.h:473
IfxSent_Sent_ReceiveControl::alternateCrcSelected
boolean alternateCrcSelected
Specifies the CRC is calculated for both fast and serial messages.
Definition: IfxSent_Sent.h:500
IfxSent_Sent_ReceiveControl::frameCheckMode
IfxSent_FrameCheckMode frameCheckMode
Specifies the frame check mode for valid frame.
Definition: IfxSent_Sent.h:508
IfxSent_Sent_ChannelConfig::interuptNodeControl
IfxSent_Sent_InterruptNodeControl interuptNodeControl
Specifies the interrupt control properties structure.
Definition: IfxSent_Sent.h:546
IfxSent_Sent_Pins::outMode
IfxPort_OutputMode outMode
Specifies output pin mode.
Definition: IfxSent_Sent.h:490
IfxSent_Sent_Pins::out
IFX_CONST IfxSent_Spc_Out * out
Specifies output pin configuration.
Definition: IfxSent_Sent.h:489
IfxSent_Sent.h
SENT SENT details.
IfxSent_Sent_ReceiveControl::frameLength
uint8 frameLength
Specifies frame length in nibbles.
Definition: IfxSent_Sent.h:507
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:70
IfxSent_Sent_ReceiveControl::endPulseIgnored
boolean endPulseIgnored
Specifies the pause pulse during synchronization.
Definition: IfxSent_Sent.h:505
IfxSent_Sent_initChannelConfig
void IfxSent_Sent_initChannelConfig(IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
Initialise channel buffer with default SENT channel configuration.
Definition: IfxSent_Sent.c:215
IfxSent_Sent_InputOutputControl::glitchRisingCleared
boolean glitchRisingCleared
Specifies the glitch rising edge clear.
Definition: IfxSent_Sent.h:441
IfxSent_Sent_ReceiveControl::driftErrorsDisabled
boolean driftErrorsDisabled
Specifies the drift errors enabled or disabled.
Definition: IfxSent_Sent.h:504
IfxSent_Sent_ChannelConfig::enabledInterrupts
IfxSent_Sent_EnabledInterrupts enabledInterrupts
Definition: IfxSent_Sent.h:552
IfxSent_DigitalGlitchesLength_2
Specifies 2 port input samples.
Definition: IfxSent.h:128
IfxSent_Sent_InterruptNodeControl::receiveDataInterruptNode
IfxSent_InterruptNodePointer receiveDataInterruptNode
Specifies the interrupt node for rdi request.
Definition: IfxSent_Sent.h:460
IfxSent_Sent_TransmitControl::pulseDelayLength
uint8 pulseDelayLength
Specifies the pulse delay length.
Definition: IfxSent_Sent.h:517
IfxSent_disableChannel
IFX_INLINE void IfxSent_disableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Disable the channel with the channel number.
Definition: IfxSent.h:577
IfxSent_Sent_ChannelConfig::inputOutputControl
IfxSent_Sent_InputOutputControl inputOutputControl
Specifies the input output controllable properties.
Definition: IfxSent_Sent.h:543
IfxSent_Sent_ChannelConfig::receiveControl
IfxSent_Sent_ReceiveControl receiveControl
Specifies the receive control properties.
Definition: IfxSent_Sent.h:544
IfxSent_Nibble_5
Specifies receive data target nibble pointer to nibble 5.
Definition: IfxSent.h:201
IfxSent_Sent_Config::timeStampPreDivider
uint32 timeStampPreDivider
Specifies the pre-divider to get clock in time stamp.
Definition: IfxSent_Sent.h:561
IfxSent_Sent_ChannelConfig::watchDogTimerLimit
uint16 watchDogTimerLimit
Speciifes the enabled interrupts for each Channel.
Definition: IfxSent_Sent.h:541
IfxSent_Sent_ChannelConfig::transmitControl
IfxSent_Sent_TransmitControl transmitControl
Specifies the transmit control properties.
Definition: IfxSent_Sent.h:545
IfxSent_ClockDividerMode_normal
Specifies clock normal divider mode.
Definition: IfxSent.h:110
IfxSent_ChannelId_none
None Sent channels.
Definition: IfxSent_cfg.h:93
IfxSent_Sent_SerialMessageFrame::configBit
IfxSent_ConfigBit configBit
Contains the received configuration bit value.
Definition: IfxSent_Sent.h:580
IfxSent_Sent_ChannelConfig::pins
IFX_CONST IfxSent_Sent_Pins * pins
Specifies the pins configuration for SENT channel.
Definition: IfxSent_Sent.h:547
IfxSent_Sent_readChannelSerialDataFrame
boolean IfxSent_Sent_readChannelSerialDataFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
Reads the nibbles recieved in the Data register.
Definition: IfxSent_Sent.c:323
IfxSent_Sent_ReceiveControl::crcMethodDisabled
boolean crcMethodDisabled
Specifies the CRC with zero nibbles disabled or enabled.
Definition: IfxSent_Sent.h:499
IfxSent_Sent_InputOutputControl::edgeCounterCleared
boolean edgeCounterCleared
Specifies the edge counter reset.
Definition: IfxSent_Sent.h:439
IfxSent_ConfigBit
IfxSent_ConfigBit
SENT.CH[channelId].SDS.CON , Specifies received configuration bit value.
Definition: IfxSent.h:116
IfxSent_Sent_TransmitControl::timeBase
IfxSent_TimeBase timeBase
Specifies the pulse time base.
Definition: IfxSent_Sent.h:519
IfxSent_Sent_InterruptNodeControl::errorInterruptNode
IfxSent_InterruptNodePointer errorInterruptNode
Specifies the interrupt node for erri request.
Definition: IfxSent_Sent.h:464
IfxSent_Sent_ReceiveControl::crcModeDisabled
boolean crcModeDisabled
Specifies the CRC mode disabled mode.
Definition: IfxSent_Sent.h:498
IfxSent_SpcMode_bidirectional
Specifies bidirectional transmit SPC mode.
Definition: IfxSent.h:221
IfxSent_Sent_SerialMessageFrame::crc
uint8 crc
Contains the received CRC value.
Definition: IfxSent_Sent.h:577
IfxSent_Sent_Channel
Specifies the SENT Channel handle structure.
Definition: IfxSent_Sent.h:529
IfxSent_Sent_ChannelConfig::channelId
IfxSent_ChannelId channelId
Specifies the SENT channel number.
Definition: IfxSent_Sent.h:542
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxSent_Sent_Channel::channel
Ifx_SENT_CH * channel
Specifies the pointer SENT channel registers.
Definition: IfxSent_Sent.h:532
IfxSent_Sent_Config::sleepModeEnabled
boolean sleepModeEnabled
Specifies SENT enable/disable.
Definition: IfxSent_Sent.h:560
IFXSENT_CFG_TIMEOUT_VALUE
#define IFXSENT_CFG_TIMEOUT_VALUE
Specifies timeout value in transmission.
Definition: IfxSent_cfg.h:73
IfxSent_Sent_InputOutputControl::externalTrigger
IfxSent_ExternalTrigger externalTrigger
Specifies the external trigger line source.
Definition: IfxSent_Sent.h:444
IfxSent_Nibble_7
Specifies receive data target nibble pointer to nibble 7.
Definition: IfxSent.h:203
IfxSent_ExtendedSerialFrameMode_standard
Specifies the standard serial frame structure.
Definition: IfxSent.h:148
IfxSent_Sent_NibbleControl::nibblePointer1
IfxSent_Nibble nibblePointer1
Specifies the received nibble1 control.
Definition: IfxSent_Sent.h:474
IfxSent_Sent_ChannelConfig::tUnit
float32 tUnit
desired unit time (f_tick), e.g. 3E-6 for 3 uS
Definition: IfxSent_Sent.h:548
IfxSent_Sent_TransmitControl::pulseLength
uint8 pulseLength
Specifies the pulse length in ticktimes.
Definition: IfxSent_Sent.h:516
IfxSent_Sent_InterruptNodeControl::receiveSuccessInterruptNode
IfxSent_InterruptNodePointer receiveSuccessInterruptNode
Specifies the interrupt node for rsi request.
Definition: IfxSent_Sent.h:459
IfxSent_Sent_Pins::pinDriver
IfxPort_PadDriver pinDriver
Pad driver mode definition.
Definition: IfxSent_Sent.h:491
IfxSent_setTimeStampPredivider
IFX_INLINE void IfxSent_setTimeStampPredivider(Ifx_SENT *sent, uint32 timeStampPreDivider)
Set the module time stamp pre-divider.
Definition: IfxSent.h:704
IfxSent_initializeChannelUnitTime
void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channe...
Definition: IfxSent.c:105
IfxSent_Sent_SerialMessageFrame::serialData
uint16 serialData
Contains the received serial data value.
Definition: IfxSent_Sent.h:579
IfxSent_initializeModuleClock
void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel.
Definition: IfxSent.c:137
IfxSent_Sent_NibbleControl::nibblePointer7
IfxSent_Nibble nibblePointer7
Specifies the received nibble7 control.
Definition: IfxSent_Sent.h:480
IfxSent_Sent_ChannelConfig::nibbleControl
IfxSent_Sent_NibbleControl nibbleControl
Specifies the received nibbles control properties.
Definition: IfxSent_Sent.h:549
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:85
IfxSent_Sent_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Specifies the interrupt service provider. CPU or DMA.
Definition: IfxSent_Sent.h:452
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxSent_Sent_ChannelConfig::interrupt
IfxSent_Sent_Interrupt interrupt
Specifies the interrupt control properties structure.
Definition: IfxSent_Sent.h:550
IfxSent_Sent_Pins
Specifies the pins configuration for SENT channel.
Definition: IfxSent_Sent.h:485
IfxSent_Sent_InputOutputControl::glitchFallingCleared
boolean glitchFallingCleared
Specifies the glitch falling edge clear.
Definition: IfxSent_Sent.h:440
IfxSent_Sent_ReceiveControl::statusNibbleEnabled
boolean statusNibbleEnabled
Specifies the status nibble to include in CRC.
Definition: IfxSent_Sent.h:503
IfxSent_Sent_initChannel
boolean IfxSent_Sent_initChannel(IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxSent_Sent.c:65
IfxSent_initSentPin
IFX_INLINE void IfxSent_initSentPin(const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a SENT input.
Definition: IfxSent.h:633
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxSent_Sent_NibbleControl::nibblePointer4
IfxSent_Nibble nibblePointer4
Specifies the received nibble4 control.
Definition: IfxSent_Sent.h:477
IfxSent_Sent_Frame::statusNibble
uint8 statusNibble
Contains the status and communication Nibble of last received frame.
Definition: IfxSent_Sent.h:570
IfxSent_Nibble_6
Specifies receive data target nibble pointer to nibble 6.
Definition: IfxSent.h:202
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxSent_Sent_InputOutputControl::inputPulsePolarityHigh
boolean inputPulsePolarityHigh
Specifies the polarity of input of each channel.
Definition: IfxSent_Sent.h:437
IfxSent_Sent_initModule
boolean IfxSent_Sent_initModule(IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
Initialise the SENT with the supplied configureation.
Definition: IfxSent_Sent.c:284
IfxSent_isModuleEnabled
IFX_INLINE boolean IfxSent_isModuleEnabled(Ifx_SENT *sent)
Return TRUE if SENT module is enabled.
Definition: IfxSent.h:716
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxSent_Sent_ReceiveControl::extendedSerialFrameMode
IfxSent_ExtendedSerialFrameMode extendedSerialFrameMode
Specifies the extended serial frame mode.
Definition: IfxSent_Sent.h:509
IfxSent_enableModule
IFX_INLINE void IfxSent_enableModule(Ifx_SENT *sent)
Enable the SENT module.
Definition: IfxSent.h:598
IfxSent_Nibble_3
Specifies receive data target nibble pointer to nibble 3.
Definition: IfxSent.h:199


iLLD_TC26B: IfxSent_Sent.h Source File

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IfxSent_Sent.h
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1 /**
2 * \file IfxSent_Sent.h
3 * \brief SENT SENT details
4 * \ingroup IfxLld_Sent
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 *
44 * \defgroup IfxLld_Sent_Sent_Usage How to use the SENT Interface driver?
45 * \ingroup IfxLld_Sent
46 *
47 * This SENT interface driver provides functions to communicate with external sensors.
48 *
49 * \section IfxLld_Sent_Sent_Preparation Preparation
50 * \subsection IfxLld_Sent_Sent_Include Include Files
51 *
52 * Include following header file into your C code:
53 * \code
54 * #include <Sent/Sent/IfxSent_Sent.h>
55 *
56 * \endcode
57 *
58 * \subsection IfxLld_Sent_Sent_Variables Variables
59 *
60 * Declare SENT module and channel handles as global variables in your C code.
61 * If multiple SENT channels should be serviced, it makes sense to declare the SENT channel handle as an array:
62 * \code
63 * #define TESTED_SENT_CHANNELS 3
64 *
65 * static IfxSent_Sent sent;
66 * static IfxSent_Sent_Channel sentChannel[TESTED_SENT_CHANNELS];
67 * \endcode
68 *
69 * \subsection IfxLld_Sent_Sent_Interrupt Interrupt Handler Installation
70 *
71 * See also \ref IfxLld_Cpu_Irq_Usage
72 *
73 * Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
74 * \code
75 * #define IFX_INTPRIO_SENT_CHANNEL 1
76 * \endcode
77 *
78 * Add the interrupt service routine to your C code. It has to call the SENT interrupt handler by passing the SENT channel handle:
79 * \code
80 * void SentInterruptHandler(IfxSent_Sent_Channel *channel);
81 *
82 * IFX_INTERRUPT(sentChannelISR, 0, IFX_INTPRIO_SENT_CHANNEL)
83 * {
84 * int i;
85 *
86 * for(i=0; i<TESTED_SENT_CHANNELS; ++i)
87 * {
88 * SentInterruptHandler(&sentChannel[i]);
89 * }
90 * }
91 * \endcode
92 *
93 * Note: the SentInterruptHandler function is not part of the interface driver, but has to be
94 * implemented in the application. A template can be found below under \ref IfxLld_Sent_Sent_ISR
95 *
96 * Finally install the interrupt handlers in your initialisation function:
97 * \code
98 * // install interrupt handler
99 * IfxCpu_Irq_installInterruptHandler(&sentChannelISR, IFX_INTPRIO_SENT_CHANNEL);
100 * IfxCpu_enableInterrupts();
101 * \endcode
102 *
103 *
104 * \subsection IfxLld_Sent_Sent_Init Module Initialisation
105 *
106 * The module initialisation can be done in the same function.
107 * Here an example for SENT and SPC mode:
108 *
109 * \code
110 * // create module config
111 * IfxSent_Sent_Config sentConfig;
112 * IfxSent_Sent_initModuleConfig(&sentConfig, &MODULE_SENT);
113 *
114 * // initialize module
115 * //IfxSent_Sent sent; // defined globally
116 * IfxSent_Sent_initModule(&sent, &sentConfig);
117 * \endcode
118 *
119 * \subsection IfxLld_Sent_Sent_InitChannel Channel Initialisation
120 * After the module has been initialized, one or more SENT channels can be configured.
121 *
122 * Here an example for three SENT channels in SENT and SPC mode:
123 * \code
124 * // create channel config
125 * IfxSent_Sent_ChannelConfig sentChannelConfig;
126 * IfxSent_Sent_initChannelConfig(&sentChannelConfig, &sent);
127 *
128 * // define tUnit of the external sensor
129 * sentChannelConfig.tUnit = 3.0E-6;
130 *
131 * // ISR priorities and interrupt target
132 * sentChannelConfig.interrupt.priority = IFX_INTPRIO_SENT_CHANNEL;
133 * sentChannelConfig.interrupt.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
134 *
135 * int i;
136 * for(i=0; i<TESTED_SENT_CHANNELS; ++i)
137 * {
138 * // pin configuration
139 * const IfxSent_Sent_Pins sentPins[TESTED_SENT_CHANNELS] =
140 * {
141 * { // Channel 0
142 * &IfxSent_SENT0C_P02_8_IN, IfxPort_InputMode_noPullDevice, // SENT input
143 * &IfxSent_SPC0_P00_1_OUT, IfxPort_OutputMode_openDrain, // SENT output
144 * IfxPort_PadDriver_cmosAutomotiveSpeed1
145 * },
146 *
147 * { // Channel 1
148 * &IfxSent_SENT1C_P02_7_IN, IfxPort_InputMode_noPullDevice, // SENT input
149 * &IfxSent_SPC1_P02_7_OUT, IfxPort_OutputMode_openDrain, // SENT output
150 * IfxPort_PadDriver_cmosAutomotiveSpeed1
151 * },
152 *
153 * { // Channel 2
154 * &IfxSent_SENT2C_P02_6_IN, IfxPort_InputMode_noPullDevice, // SENT input
155 * &IfxSent_SPC2_P00_3_OUT, IfxPort_OutputMode_openDrain, // SENT output
156 * IfxPort_PadDriver_cmosAutomotiveSpeed1
157 * },
158 * };
159 *
160 * sentChannelConfig.pins = &sentPins[i];
161 *
162 * // set channel
163 * sentChannelConfig.channelId = (IfxSent_ChannelId)i;
164 *
165 * // initialize channel
166 * IfxSent_Sent_initChannel(&sentChannel[i], &sentChannelConfig);
167 * }
168 * \endcode
169 *
170 * \subsection IfxLld_Sent_Sent_ISR Interrupt Service Handler
171 * The ISR has to be implemented in the application. Following template can be used
172 * to react on the events:
173 *
174 * \code
175 * void SentInterruptHandler(IfxSent_Sent_Channel *channel)
176 * {
177 * Ifx_SENT_CH_INTSTAT interruptStatus = IfxSent_Sent_getAndClearInterruptStatus(channel);
178 *
179 * if( interruptStatus.U )
180 * {
181 * // check for error conditions
182 * if (interruptStatus.U & IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS)
183 * {
184 * // * Receive Buffer Overflow
185 * // * This bit is set after a frame has been received while the old one was
186 * // * not read from RDRx. I.e. the kernel wants to set any of the two
187 * // * interrupts RSI and RDI and finds any of these two interrupts already
188 * // * set. The old data is overwritten by the new data.
189 * // *
190 * if (interruptStatus.B.RBI)
191 * {
192 * // insert your error handling code here
193 * __debug();
194 * }
195 *
196 * // * Transmit Buffer Underflow
197 * // * This bit is set after data has been completely transferred (PLEN
198 * // * exceeded) and no new data was written to SCRx.
199 * // *
200 * if (interruptStatus.B.TBI)
201 * {
202 * // insert your error handling code here
203 * __debug();
204 * }
205 *
206 * // * Frequency Range Error
207 * // * This bit is set after a Synchronization / Calibration pulse was
208 * // * received that deviates more than +- 25% from the nominal value.
209 * // * The referring data is ignored.
210 * // *
211 * if (interruptStatus.B.FRI)
212 * {
213 * // insert your error handling code here
214 * __debug();
215 * }
216 *
217 * // * Frequency Drift Error
218 * // * This bit is set after a subsequent Synchronization / Calibration
219 * // * pulse was received that deviates more than 1.5625% (1/64) from its
220 * // * predecessor.
221 * // *
222 * if (interruptStatus.B.FDI)
223 * {
224 * // insert your error handling code here
225 * __debug();
226 * }
227 *
228 * // * Wrong Number of Nibbles
229 * // * This bit is set after a more nibbles have been received than expected
230 * // * or a Synchronization / Calibration Pulse is received too early thus
231 * // * too few nibbles have been received
232 * // *
233 * if (interruptStatus.B.NNI)
234 * {
235 * // insert your error handling code here
236 * __debug();
237 * }
238 *
239 * // * Nibbles Value out of Range
240 * // * This bit is set after a too long or too short nibble pulse has been
241 * // * received. I.e. value < 0 or value > 15.
242 * // *
243 * if (interruptStatus.B.NVI)
244 * {
245 * // insert your error handling code here
246 * __debug();
247 * }
248 *
249 * // * CRC Error
250 * // * This bit is set if the CRC check fails.
251 * // *
252 * if (interruptStatus.B.CRCI)
253 * {
254 * // insert your error handling code here
255 * __debug();
256 * }
257 *
258 * // * Wrong Status and Communication Nibble Error
259 * // * In standard Serial Frame Mode (RCR.ESF is cleared), this bit is set
260 * // * if the Status and Communication nibble shows a start bit in a frame
261 * // * other than frame number n x 16.
262 * // * In Extended Serial Frame Mode this bit is without function.
263 * // *
264 * if (interruptStatus.B.WSI)
265 * {
266 * // insert your error handling code here
267 * __debug();
268 * }
269 *
270 * // * Serial Data CRC Error
271 * // * This bit is set if the CRC of the serial message fails.
272 * // * In Extended Serial Message Format, this includes a check of the Serial
273 * // * Communication Nibble for correct 0 values of bit 3 in frames 7, 13 and 18.
274 * // *
275 * if (interruptStatus.B.SCRI)
276 * {
277 * // insert your error handling code here
278 * __debug();
279 * }
280 *
281 * // * Watch Dog Error
282 * // * This bit is set if the Watch Dog Timer of the channel expires.
283 * // *
284 * if (interruptStatus.B.WDI)
285 * {
286 * // insert your error handling code here
287 * __debug();
288 * }
289 * }
290 *
291 * // transaction events
292 *
293 * // * Receive Data
294 * // * RDI is activated when a received frame is moved to a Receive Data
295 * // * Register RDR. Both RDI and RSI will be issued together in normal use
296 * // * cases where the frame size is not bigger than 8 nibbles and CRC is
297 * // * correct or not checked (if RCRx.CDIS is cleared).
298 * // *
299 * if (interruptStatus.B.RDI)
300 * {
301 * // * Ignore RDI bit, useful only when Frame Length is greater than
302 * // * 8 nibbles since it can indicate that end of frame
303 * // *
304 * }
305 *
306 * // * Receive Success
307 * // * This bit is set at the successfully received end of a frame.
308 * // * Depending on bit RCRx.CDIS this indicates a successful check of the CRC.
309 * // *
310 * if (interruptStatus.B.RSI)
311 * {
312 * // here you could handle the incoming frame:
313 * IfxSent_Sent_Frame frame;
314 * IfxSent_Sent_readChannelSerialDataFrame(channel, &frame);
315 *
316 * // do something with the incoming data
317 * }
318 *
319 * // * Transfer Data
320 * // * This bit is set after the trigger condition was detected. Data to be
321 * // * transferred has been moved internally. Thus a new value can be written
322 * // * to SCRx. This can be used for back to back transfers.
323 * // *
324 * if (interruptStatus.B.TDI)
325 * {
326 * }
327 *
328 * // * Serial Data Received
329 * // * This bit is set after all serial data bits have been received via the
330 * // * Status and Communication nibble. Depending on bit RCRx.SCDIS this
331 * // * indicates a successful check of the CRC.
332 * // *
333 * if (interruptStatus.B.SDI)
334 * {
335 * // here you could handle the incoming message:
336 *
337 * // decode incoming message
338 * IfxSent_Sent_SerialMessageFrame message;
339 * IfxSent_Sent_readChannelSerialMessageFrame(channel, &message);
340 *
341 * // do something with the incoming message
342 * }
343 * }
344 * }
345 * \endcode
346 *
347 * \subsection IfxLld_Sent_Sent_Frame Frame Decoding
348 * Following code snippet shows, how incoming data of a TLE4998S device can be decoded:
349 *
350 * \code
351 * static void parseSensorData(IfxSent_Sent_Frame *frame)
352 * {
353 * uint32 data = frame->data;
354 * uint8 statusNibble = frame->statusNibble;
355 *
356 * // select B range [mT]
357 * const uint8 rangeValTable[4] = { 200, 100, 50, 0 };
358 * uint8 rangeVal = rangeValTable[statusNibble & 3];
359 *
360 * uint16 hallVal = (short)((((data & 0xFFFF) * rangeVal) / 0x7FFF) - rangeVal);
361 * uint16 temperature = ((short)((data >> 16) & 0x00FF) - 55);
362 *
363 * // do something with the values here...
364 * }
365 * \endcode
366 *
367 * \defgroup IfxLld_Sent_Sent Interface Driver
368 * \ingroup IfxLld_Sent
369 * \defgroup IfxLld_Sent_Sent_Structures Data Structures
370 * \ingroup IfxLld_Sent_Sent
371 * \defgroup IfxLld_Sent_Sent_Module Module Functions
372 * \ingroup IfxLld_Sent_Sent
373 * \defgroup IfxLld_Sent_Sent_Channel Channel Functions
374 * \ingroup IfxLld_Sent_Sent
375 */
376
377 #ifndef IFXSENT_SENT_H
378 #define IFXSENT_SENT_H 1
379
380 /******************************************************************************/
381 /*----------------------------------Includes----------------------------------*/
382 /******************************************************************************/
383
384 #include "Scu/Std/IfxScuWdt.h"
385 #include "Sent/Std/IfxSent.h"
386 #include "Cpu/Irq/IfxCpu_Irq.h"
387
388 /******************************************************************************/
389 /*-----------------------------Data Structures--------------------------------*/
390 /******************************************************************************/
391
392 /** \addtogroup IfxLld_Sent_Sent_Structures
393 * \{ */
394 /** \brief Specifies the Interrupt type enables structure
395 */
396 typedef struct
397 {
398 uint8 receiveDataInterrupt; /**< \brief Specifies receive data interrupt enable */
399 uint8 receiveSuccessInterrupt; /**< \brief Specifies receive success interrupt enable */
400 uint8 receiveBufferOverflowInterrupt; /**< \brief Specifies receive buffer overflow interrupt enable */
401 uint8 transferDataInterrupt; /**< \brief Specifies transfer data interrupt enable */
402 uint8 transferBufferUnderflowInterrupt; /**< \brief Specifies transfer buffer underflow interrupt enable */
403 uint8 serialDataReceiveInterrupt; /**< \brief Specifies serial data interrupt enable */
404 uint8 watchdogErrorInterrupt; /**< \brief Specifies watchdog error interrupt enable */
405 uint8 serialDataCrcErrorInterrupt; /**< \brief Specifies serial data CRC error interrupt enable */
406 uint8 wrongStatusNibbleErrorInterrupt; /**< \brief Specifies wrong status nibble error interrupt enable */
407 uint8 crcErrorInterrupt; /**< \brief Specifies CRC error interrupt enable */
408 uint8 nibblesValueOutOfRangeErrorInterrupt; /**< \brief Specifies nibble value out of range error interrupt enable */
409 uint8 nibblesWrongErrorInterrupt; /**< \brief Specifies nibbles wrong error interrupt enable */
410 uint8 frequencyDriftErrorInterrupt; /**< \brief Specifies frequency drift error interrupt enable */
411 uint8 frequencyRangeErrorInterrupt; /**< \brief Specifies frequency not in the range error interrupt enable */
412 } IfxSent_Sent_Enable;
413
414 /** \} */
415
416 /** \addtogroup IfxLld_Sent_Sent_Structures
417 * \{ */
418 /** \brief Specifies SENT handle structure
419 */
420 typedef struct
421 {
422 Ifx_SENT *sent; /**< \brief Specifies pointer to SENT registers */
423 } IfxSent_Sent;
424
425 /** \brief Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once via the ALL member.
426 */
427 typedef union
428 {
429 uint32 ALL; /**< \brief Specifies to write and read to/from all flags as once via the ALL member. */
430 IfxSent_Sent_Enable enable; /**< \brief Structure contains the interrupt flags */
431 } IfxSent_Sent_EnabledInterrupts;
432
433 /** \brief Specifies the input output control properties
434 */
435 typedef struct
436 {
437 boolean inputPulsePolarityHigh; /**< \brief Specifies the polarity of input of each channel */
438 boolean outputPulsePolarityHigh; /**< \brief Specifies the polarity of input of each channel */
439 boolean edgeCounterCleared; /**< \brief Specifies the edge counter reset */
440 boolean glitchFallingCleared; /**< \brief Specifies the glitch falling edge clear */
441 boolean glitchRisingCleared; /**< \brief Specifies the glitch rising edge clear */
442 boolean triggerMonitorCleared; /**< \brief Specifies the trigger monitor reset */
443 IfxSent_DigitalGlitchesLength digitalGlitchFilterDepth; /**< \brief Specifies the Digital Glitch Filter depth for input signal delay */
444 IfxSent_ExternalTrigger externalTrigger; /**< \brief Specifies the external trigger line source */
445 } IfxSent_Sent_InputOutputControl;
446
447 /** \brief Specifies the interrupt control properties
448 */
449 typedef struct
450 {
451 uint16 priority; /**< \brief Specifies the interrupt priority. Always 1 since all interrupts are handled at a time */
452 IfxSrc_Tos isrProvider; /**< \brief Specifies the interrupt service provider. CPU or DMA. */
453 } IfxSent_Sent_Interrupt;
454
455 /** \brief Specifies the interrupt control properties structure
456 */
457 typedef struct
458 {
459 IfxSent_InterruptNodePointer receiveSuccessInterruptNode; /**< \brief Specifies the interrupt node for rsi request */
460 IfxSent_InterruptNodePointer receiveDataInterruptNode; /**< \brief Specifies the interrupt node for rdi request */
461 IfxSent_InterruptNodePointer receiveBufferOverflowInterruptNode; /**< \brief Specifies the interrupt node for rbi request */
462 IfxSent_InterruptNodePointer transferDataInterruptNode; /**< \brief Specifies the interrupt node for tdi request */
463 IfxSent_InterruptNodePointer transferBufferUnderflowInterruptNode; /**< \brief Specifies the interrupt node for tbi request */
464 IfxSent_InterruptNodePointer errorInterruptNode; /**< \brief Specifies the interrupt node for erri request */
465 IfxSent_InterruptNodePointer serialDataReceiveInterruptNode; /**< \brief Specifies the interrupt node for sdi request */
466 IfxSent_InterruptNodePointer watchdogErrorInterruptNode; /**< \brief Specifies the interrupt node for wdi request */
467 } IfxSent_Sent_InterruptNodeControl;
468
469 /** \brief Specifies the received nibbles control properties
470 */
471 typedef struct
472 {
473 IfxSent_Nibble nibblePointer0; /**< \brief Specifies the received nibble0 control */
474 IfxSent_Nibble nibblePointer1; /**< \brief Specifies the received nibble1 control */
475 IfxSent_Nibble nibblePointer2; /**< \brief Specifies the received nibble2 control */
476 IfxSent_Nibble nibblePointer3; /**< \brief Specifies the received nibble3 control */
477 IfxSent_Nibble nibblePointer4; /**< \brief Specifies the received nibble4 control */
478 IfxSent_Nibble nibblePointer5; /**< \brief Specifies the received nibble5 control */
479 IfxSent_Nibble nibblePointer6; /**< \brief Specifies the received nibble6 control */
480 IfxSent_Nibble nibblePointer7; /**< \brief Specifies the received nibble7 control */
481 } IfxSent_Sent_NibbleControl;
482
483 /** \brief Specifies the pins configuration for SENT channel
484 */
485 typedef struct
486 {
487 IFX_CONST IfxSent_Sent_In *in; /**< \brief Specifies input pin configuration */
488 IfxPort_InputMode inMode; /**< \brief Specifies input pin mode */
489 IFX_CONST IfxSent_Spc_Out *out; /**< \brief Specifies output pin configuration */
490 IfxPort_OutputMode outMode; /**< \brief Specifies output pin mode */
491 IfxPort_PadDriver pinDriver; /**< \brief Pad driver mode definition */
492 } IfxSent_Sent_Pins;
493
494 /** \brief Specifies the receive control properties
495 */
496 typedef struct
497 {
498 boolean crcModeDisabled; /**< \brief Specifies the CRC mode disabled mode */
499 boolean crcMethodDisabled; /**< \brief Specifies the CRC with zero nibbles disabled or enabled */
500 boolean alternateCrcSelected; /**< \brief Specifies the CRC is calculated for both fast and serial messages */
501 boolean serialDataProcessingEnabled; /**< \brief Specifies the serial data processing mode */
502 boolean serialDataDisabledCrcDisabled; /**< \brief Specifies the CRC disable for serial data disabled mode */
503 boolean statusNibbleEnabled; /**< \brief Specifies the status nibble to include in CRC */
504 boolean driftErrorsDisabled; /**< \brief Specifies the drift errors enabled or disabled */
505 boolean endPulseIgnored; /**< \brief Specifies the pause pulse during synchronization */
506 boolean suspendTriggered; /**< \brief Specifies the suspend trigger disables the channel or not */
507 uint8 frameLength; /**< \brief Specifies frame length in nibbles */
508 IfxSent_FrameCheckMode frameCheckMode; /**< \brief Specifies the frame check mode for valid frame */
509 IfxSent_ExtendedSerialFrameMode extendedSerialFrameMode; /**< \brief Specifies the extended serial frame mode */
510 } IfxSent_Sent_ReceiveControl;
511
512 /** \brief Specifies the SPC channel properties structure
513 */
514 typedef struct
515 {
516 uint8 pulseLength; /**< \brief Specifies the pulse length in ticktimes */
517 uint8 pulseDelayLength; /**< \brief Specifies the pulse delay length */
518 IfxSent_TriggerSource triggerSource; /**< \brief Specifies the trigger source and mode */
519 IfxSent_TimeBase timeBase; /**< \brief Specifies the pulse time base */
520 IfxSent_SpcMode spcMode; /**< \brief Specifies the SENT SPC operational mode */
521 } IfxSent_Sent_TransmitControl;
522
523 /** \} */
524
525 /** \addtogroup IfxLld_Sent_Sent_Structures
526 * \{ */
527 /** \brief Specifies the SENT Channel handle structure
528 */
529 typedef struct
530 {
531 IfxSent_Sent *driver; /**< \brief Specifies the pointer to SENT module handler */
532 Ifx_SENT_CH *channel; /**< \brief Specifies the pointer SENT channel registers */
533 IfxSent_ChannelId channelId; /**< \brief Specifies the SENT channel number */
534 } IfxSent_Sent_Channel;
535
536 /** \brief Specifies the SENT Channel configuration structure
537 */
538 typedef struct
539 {
540 IfxSent_Sent *driver; /**< \brief Specifies the pointer to SENT module handler */
541 uint16 watchDogTimerLimit; /**< \brief Speciifes the enabled interrupts for each Channel */
542 IfxSent_ChannelId channelId; /**< \brief Specifies the SENT channel number */
543 IfxSent_Sent_InputOutputControl inputOutputControl; /**< \brief Specifies the input output controllable properties */
544 IfxSent_Sent_ReceiveControl receiveControl; /**< \brief Specifies the receive control properties */
545 IfxSent_Sent_TransmitControl transmitControl; /**< \brief Specifies the transmit control properties */
546 IfxSent_Sent_InterruptNodeControl interuptNodeControl; /**< \brief Specifies the interrupt control properties structure */
547 IFX_CONST IfxSent_Sent_Pins *pins; /**< \brief Specifies the pins configuration for SENT channel */
548 float32 tUnit; /**< \brief desired unit time (f_tick), e.g. 3E-6 for 3 uS */
549 IfxSent_Sent_NibbleControl nibbleControl; /**< \brief Specifies the received nibbles control properties */
550 IfxSent_Sent_Interrupt interrupt; /**< \brief Specifies the interrupt control properties structure */
551 boolean spcModeOn; /**< \brief Specifies the SENT SPC mode enable/disable */
552 IfxSent_Sent_EnabledInterrupts enabledInterrupts;
553 } IfxSent_Sent_ChannelConfig;
554
555 /** \brief Specifies the SENT module configuration structure
556 */
557 typedef struct
558 {
559 Ifx_SENT *module; /**< \brief Specifies pointer to SENT registers */
560 boolean sleepModeEnabled; /**< \brief Specifies SENT enable/disable */
561 uint32 timeStampPreDivider; /**< \brief Specifies the pre-divider to get clock in time stamp */
562 } IfxSent_Sent_Config;
563
564 /** \brief Specifies the frame configuration structure for a channel
565 */
566 typedef struct
567 {
568 uint32 data; /**< \brief Contains the data from last received frame */
569 uint32 timeStamp; /**< \brief Contains the timestamp of last received frame */
570 uint8 statusNibble; /**< \brief Contains the status and communication Nibble of last received frame */
571 } IfxSent_Sent_Frame;
572
573 /** \brief Specifies received message frame
574 */
575 typedef struct
576 {
577 uint8 crc; /**< \brief Contains the received CRC value */
578 uint8 messageId; /**< \brief Contains the received message ID value */
579 uint16 serialData; /**< \brief Contains the received serial data value */
580 IfxSent_ConfigBit configBit; /**< \brief Contains the received configuration bit value */
581 } IfxSent_Sent_SerialMessageFrame;
582
583 /** \} */
584
585 /** \addtogroup IfxLld_Sent_Sent_Module
586 * \{ */
587
588 /******************************************************************************/
589 /*-------------------------Global Function Prototypes-------------------------*/
590 /******************************************************************************/
591
592 /** \brief Reset the SENT module
593 * \param driver pointer to the SENT module handler
594 * \return None
595 */
596 IFX_EXTERN void IfxSent_Sent_deInitModule(IfxSent_Sent *driver);
597
598 /** \brief Initialise the SENT with the supplied configureation
599 * \param driver pointer to the SENT module handler
600 * \param config pointer to the SENT module configuration
601 * \return TRUE if valid configuration otherwise FALSE
602 *
603 * Usage example: see \ref IfxLld_Sent_Sent_Usage
604 *
605 */
606 IFX_EXTERN boolean IfxSent_Sent_initModule(IfxSent_Sent *driver, const IfxSent_Sent_Config *config);
607
608 /** \brief Initialise buffer with default SENT configuration
609 * \param config pointer to the SENT module configuration
610 * \param sent base address of the SENT register space
611 * \return None
612 *
613 * Usage example: see \ref IfxLld_Sent_Sent_Usage
614 *
615 */
616 IFX_EXTERN void IfxSent_Sent_initModuleConfig(IfxSent_Sent_Config *config, Ifx_SENT *sent);
617
618 /** \} */
619
620 /** \addtogroup IfxLld_Sent_Sent_Channel
621 * \{ */
622
623 /******************************************************************************/
624 /*-------------------------Inline Function Prototypes-------------------------*/
625 /******************************************************************************/
626
627 /** \brief Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware.
628 *
629 * This function should be used in an ISR to retrieve the events which triggered the interrupt.
630 * \param channel Specifies the SENT Channel handle structure
631 * \return Interrupt flags which have been cleared.
632 *
633 * Usage example: see \ref IfxLld_Sent_Sent_Usage
634 *
635 */
636 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_Sent_getAndClearInterruptStatus(IfxSent_Sent_Channel *channel);
637
638 /******************************************************************************/
639 /*-------------------------Global Function Prototypes-------------------------*/
640 /******************************************************************************/
641
642 /** \brief Initialize the channel with the supplied configuration
643 * \param channel pointer to the SENT channel
644 * \param config pointer to the SENT channel configuration
645 * \return TRUE if valid configuration otherwise FALSE
646 *
647 * Usage example: see \ref IfxLld_Sent_Sent_Usage
648 *
649 */
650 IFX_EXTERN boolean IfxSent_Sent_initChannel(IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config);
651
652 /** \brief Initialise channel buffer with default SENT channel configuration
653 * \param config pointer to the SENT channel configuration
654 * \param driver pointer to the SENT module handler
655 * \return None
656 *
657 * Usage example: see \ref IfxLld_Sent_Sent_Usage
658 *
659 */
660 IFX_EXTERN void IfxSent_Sent_initChannelConfig(IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver);
661
662 /** \brief Reads the nibbles recieved in the Data register
663 * \param channel SENT Channel whose data has to be read
664 * \param frame Data read from the SENT Channel
665 * \return TRUE if data received otherwise false
666 *
667 * Usage example: see \ref IfxLld_Sent_Sent_Usage
668 *
669 */
670 IFX_EXTERN boolean IfxSent_Sent_readChannelSerialDataFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame);
671
672 /** \brief reads the Serial data recieved and collected over several SENT frames
673 * \param channel reads the Serial data recieved and collected over several SENT frames
674 * \param message Data pointer pointing to the serial data read from the SENT Channel
675 * \return TRUE if serial message received otherwise false
676 *
677 * Usage example: see \ref IfxLld_Sent_Sent_Usage
678 *
679 */
680 IFX_EXTERN boolean IfxSent_Sent_readChannelSerialMessageFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message);
681
682 /** \} */
683
684 /******************************************************************************/
685 /*---------------------Inline Function Implementations------------------------*/
686 /******************************************************************************/
687
688 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_Sent_getAndClearInterruptStatus(IfxSent_Sent_Channel *channel)
689 {
690 return IfxSent_getAndClearInterruptStatus(channel->driver->sent, channel->channelId);
691 }
692
693
694 #endif /* IFXSENT_SENT_H */
IfxSent_Sent_InterruptNodeControl::serialDataReceiveInterruptNode
IfxSent_InterruptNodePointer serialDataReceiveInterruptNode
Specifies the interrupt node for sdi request.
Definition: IfxSent_Sent.h:465
IfxSent_Sent_Frame::timeStamp
uint32 timeStamp
Contains the timestamp of last received frame.
Definition: IfxSent_Sent.h:569
IfxSent_FrameCheckMode
IfxSent_FrameCheckMode
SENT.CH[channelId].RCR.CFC, Specifies received frame check mode.
Definition: IfxSent.h:170
IfxSent_Sent_readChannelSerialMessageFrame
IFX_EXTERN boolean IfxSent_Sent_readChannelSerialMessageFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
reads the Serial data recieved and collected over several SENT frames
Definition: IfxSent_Sent.c:337
IfxSent_Sent_Enable
Specifies the Interrupt type enables structure.
Definition: IfxSent_Sent.h:396
IfxSent_Sent_InterruptNodeControl::transferBufferUnderflowInterruptNode
IfxSent_InterruptNodePointer transferBufferUnderflowInterruptNode
Specifies the interrupt node for tbi request.
Definition: IfxSent_Sent.h:463
IfxSent_Sent_EnabledInterrupts::ALL
uint32 ALL
Specifies to write and read to/from all flags as once via the ALL member.
Definition: IfxSent_Sent.h:429
IfxSent_Sent_TransmitControl::spcMode
IfxSent_SpcMode spcMode
Specifies the SENT SPC operational mode.
Definition: IfxSent_Sent.h:520
IfxSent_Sent_Enable::nibblesWrongErrorInterrupt
uint8 nibblesWrongErrorInterrupt
Specifies nibbles wrong error interrupt enable.
Definition: IfxSent_Sent.h:409
IfxSent_Sent_Enable::crcErrorInterrupt
uint8 crcErrorInterrupt
Specifies CRC error interrupt enable.
Definition: IfxSent_Sent.h:407
IfxSent_Sent_SerialMessageFrame
Specifies received message frame.
Definition: IfxSent_Sent.h:575
IfxSent_Sent_ReceiveControl::suspendTriggered
boolean suspendTriggered
Specifies the suspend trigger disables the channel or not.
Definition: IfxSent_Sent.h:506
IfxSent_Sent_SerialMessageFrame::messageId
uint8 messageId
Contains the received message ID value.
Definition: IfxSent_Sent.h:578
IfxSent_Sent_Frame
Specifies the frame configuration structure for a channel.
Definition: IfxSent_Sent.h:566
IfxSent_Sent_NibbleControl::nibblePointer2
IfxSent_Nibble nibblePointer2
Specifies the received nibble2 control.
Definition: IfxSent_Sent.h:475
IfxSent_Sent_ReceiveControl::serialDataDisabledCrcDisabled
boolean serialDataDisabledCrcDisabled
Specifies the CRC disable for serial data disabled mode.
Definition: IfxSent_Sent.h:502
IfxSent_Sent_NibbleControl::nibblePointer5
IfxSent_Nibble nibblePointer5
Specifies the received nibble5 control.
Definition: IfxSent_Sent.h:478
IfxSent_Sent_TransmitControl
Specifies the SPC channel properties structure.
Definition: IfxSent_Sent.h:514
IfxSent_InterruptNodePointer
IfxSent_InterruptNodePointer
SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for ...
Definition: IfxSent.h:178
IfxSent_Sent_Enable::receiveBufferOverflowInterrupt
uint8 receiveBufferOverflowInterrupt
Specifies receive buffer overflow interrupt enable.
Definition: IfxSent_Sent.h:400
IfxSent_Sent_InputOutputControl::triggerMonitorCleared
boolean triggerMonitorCleared
Specifies the trigger monitor reset.
Definition: IfxSent_Sent.h:442
IfxSent_Sent_InputOutputControl::digitalGlitchFilterDepth
IfxSent_DigitalGlitchesLength digitalGlitchFilterDepth
Specifies the Digital Glitch Filter depth for input signal delay.
Definition: IfxSent_Sent.h:443
IfxSent_Sent_ChannelConfig::spcModeOn
boolean spcModeOn
Specifies the SENT SPC mode enable/disable.
Definition: IfxSent_Sent.h:551
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxSent_Sent_InterruptNodeControl::watchdogErrorInterruptNode
IfxSent_InterruptNodePointer watchdogErrorInterruptNode
Specifies the interrupt node for wdi request.
Definition: IfxSent_Sent.h:466
float32
float float32
Definition: Platform_Types.h:170
IfxSent_Sent_EnabledInterrupts::enable
IfxSent_Sent_Enable enable
Structure contains the interrupt flags.
Definition: IfxSent_Sent.h:430
IfxSent_Sent_InterruptNodeControl::transferDataInterruptNode
IfxSent_InterruptNodePointer transferDataInterruptNode
Specifies the interrupt node for tdi request.
Definition: IfxSent_Sent.h:462
IfxSent_Sent_InterruptNodeControl
Specifies the interrupt control properties structure.
Definition: IfxSent_Sent.h:457
IfxSent_Sent_InterruptNodeControl::receiveBufferOverflowInterruptNode
IfxSent_InterruptNodePointer receiveBufferOverflowInterruptNode
Specifies the interrupt node for rbi request.
Definition: IfxSent_Sent.h:461
IfxSent_Sent_Interrupt
Specifies the interrupt control properties.
Definition: IfxSent_Sent.h:449
IfxSent_Sent_Pins::inMode
IfxPort_InputMode inMode
Specifies input pin mode.
Definition: IfxSent_Sent.h:488
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxSent_Sent_In
SENT pin mapping structure.
Definition: IfxSent_PinMap.h:56
IfxSent_Sent_Channel::driver
IfxSent_Sent * driver
Specifies the pointer to SENT module handler.
Definition: IfxSent_Sent.h:531
IfxSent_Sent_Enable::wrongStatusNibbleErrorInterrupt
uint8 wrongStatusNibbleErrorInterrupt
Specifies wrong status nibble error interrupt enable.
Definition: IfxSent_Sent.h:406
IfxSent_Sent_Enable::watchdogErrorInterrupt
uint8 watchdogErrorInterrupt
Specifies watchdog error interrupt enable.
Definition: IfxSent_Sent.h:404
IfxSent_Sent_NibbleControl::nibblePointer3
IfxSent_Nibble nibblePointer3
Specifies the received nibble3 control.
Definition: IfxSent_Sent.h:476
IfxSent_Spc_Out
SPC pin mapping structure.
Definition: IfxSent_PinMap.h:65
IfxSent_Sent_TransmitControl::triggerSource
IfxSent_TriggerSource triggerSource
Specifies the trigger source and mode.
Definition: IfxSent_Sent.h:518
IfxSent_Sent_InputOutputControl::outputPulsePolarityHigh
boolean outputPulsePolarityHigh
Specifies the polarity of input of each channel.
Definition: IfxSent_Sent.h:438
IfxSent_Sent_Enable::transferBufferUnderflowInterrupt
uint8 transferBufferUnderflowInterrupt
Specifies transfer buffer underflow interrupt enable.
Definition: IfxSent_Sent.h:402
IfxScuWdt.h
SCU basic functionality.
IfxSent_Sent_deInitModule
IFX_EXTERN void IfxSent_Sent_deInitModule(IfxSent_Sent *driver)
Reset the SENT module.
Definition: IfxSent_Sent.c:55
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxSent_Sent_Interrupt::priority
uint16 priority
Specifies the interrupt priority. Always 1 since all interrupts are handled at a time.
Definition: IfxSent_Sent.h:451
IfxSent_Sent_ChannelConfig
Specifies the SENT Channel configuration structure.
Definition: IfxSent_Sent.h:538
IfxSent_Sent_Config
Specifies the SENT module configuration structure.
Definition: IfxSent_Sent.h:557
IfxSent_Sent_initModuleConfig
IFX_EXTERN void IfxSent_Sent_initModuleConfig(IfxSent_Sent_Config *config, Ifx_SENT *sent)
Initialise buffer with default SENT configuration.
Definition: IfxSent_Sent.c:310
IfxSent_Sent_Enable::frequencyDriftErrorInterrupt
uint8 frequencyDriftErrorInterrupt
Specifies frequency drift error interrupt enable.
Definition: IfxSent_Sent.h:410
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxSent_Sent::sent
Ifx_SENT * sent
Specifies pointer to SENT registers.
Definition: IfxSent_Sent.h:422
IfxSent_Sent_Config::module
Ifx_SENT * module
Specifies pointer to SENT registers.
Definition: IfxSent_Sent.h:559
IfxSent_Sent_NibbleControl::nibblePointer6
IfxSent_Nibble nibblePointer6
Specifies the received nibble6 control.
Definition: IfxSent_Sent.h:479
IfxSent_Sent_ReceiveControl::serialDataProcessingEnabled
boolean serialDataProcessingEnabled
Specifies the serial data processing mode.
Definition: IfxSent_Sent.h:501
IfxSent_Sent_Frame::data
uint32 data
Contains the data from last received frame.
Definition: IfxSent_Sent.h:568
IfxSent_Sent_Pins::in
IFX_CONST IfxSent_Sent_In * in
Specifies input pin configuration.
Definition: IfxSent_Sent.h:487
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxSent_Sent
Specifies SENT handle structure.
Definition: IfxSent_Sent.h:420
IfxSent_Sent_NibbleControl::nibblePointer0
IfxSent_Nibble nibblePointer0
Specifies the received nibble0 control.
Definition: IfxSent_Sent.h:473
IfxSent_Sent_ReceiveControl::alternateCrcSelected
boolean alternateCrcSelected
Specifies the CRC is calculated for both fast and serial messages.
Definition: IfxSent_Sent.h:500
IfxSent_Sent_ReceiveControl::frameCheckMode
IfxSent_FrameCheckMode frameCheckMode
Specifies the frame check mode for valid frame.
Definition: IfxSent_Sent.h:508
IfxSent_Sent_ChannelConfig::interuptNodeControl
IfxSent_Sent_InterruptNodeControl interuptNodeControl
Specifies the interrupt control properties structure.
Definition: IfxSent_Sent.h:546
IfxSent_Sent_Pins::outMode
IfxPort_OutputMode outMode
Specifies output pin mode.
Definition: IfxSent_Sent.h:490
IfxSent_Sent_Pins::out
IFX_CONST IfxSent_Spc_Out * out
Specifies output pin configuration.
Definition: IfxSent_Sent.h:489
IfxSent_Sent_ReceiveControl::frameLength
uint8 frameLength
Specifies frame length in nibbles.
Definition: IfxSent_Sent.h:507
IfxSent_Sent_Enable::receiveDataInterrupt
uint8 receiveDataInterrupt
Specifies receive data interrupt enable.
Definition: IfxSent_Sent.h:398
IfxSent_Sent_ReceiveControl::endPulseIgnored
boolean endPulseIgnored
Specifies the pause pulse during synchronization.
Definition: IfxSent_Sent.h:505
IfxSent_Sent_initChannelConfig
IFX_EXTERN void IfxSent_Sent_initChannelConfig(IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
Initialise channel buffer with default SENT channel configuration.
Definition: IfxSent_Sent.c:215
IfxSent_Sent_InputOutputControl::glitchRisingCleared
boolean glitchRisingCleared
Specifies the glitch rising edge clear.
Definition: IfxSent_Sent.h:441
IfxSent_Sent_ReceiveControl::driftErrorsDisabled
boolean driftErrorsDisabled
Specifies the drift errors enabled or disabled.
Definition: IfxSent_Sent.h:504
IfxSent_Sent_ChannelConfig::enabledInterrupts
IfxSent_Sent_EnabledInterrupts enabledInterrupts
Definition: IfxSent_Sent.h:552
IfxSent_Sent_InterruptNodeControl::receiveDataInterruptNode
IfxSent_InterruptNodePointer receiveDataInterruptNode
Specifies the interrupt node for rdi request.
Definition: IfxSent_Sent.h:460
IfxSent_Sent_TransmitControl::pulseDelayLength
uint8 pulseDelayLength
Specifies the pulse delay length.
Definition: IfxSent_Sent.h:517
IfxSent_ExternalTrigger
IfxSent_ExternalTrigger
SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line.
Definition: IfxSent.h:154
IfxSent_Sent_ChannelConfig::inputOutputControl
IfxSent_Sent_InputOutputControl inputOutputControl
Specifies the input output controllable properties.
Definition: IfxSent_Sent.h:543
IfxSent_Sent_ChannelConfig::receiveControl
IfxSent_Sent_ReceiveControl receiveControl
Specifies the receive control properties.
Definition: IfxSent_Sent.h:544
IfxSent_Nibble
IfxSent_Nibble
SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer.
Definition: IfxSent.h:194
IfxSent_Sent_Config::timeStampPreDivider
uint32 timeStampPreDivider
Specifies the pre-divider to get clock in time stamp.
Definition: IfxSent_Sent.h:561
IfxSent_ExtendedSerialFrameMode
IfxSent_ExtendedSerialFrameMode
SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure.
Definition: IfxSent.h:146
IfxSent_Sent_ChannelConfig::watchDogTimerLimit
uint16 watchDogTimerLimit
Speciifes the enabled interrupts for each Channel.
Definition: IfxSent_Sent.h:541
IfxSent_Sent_ChannelConfig::transmitControl
IfxSent_Sent_TransmitControl transmitControl
Specifies the transmit control properties.
Definition: IfxSent_Sent.h:545
IfxSent_Sent_SerialMessageFrame::configBit
IfxSent_ConfigBit configBit
Contains the received configuration bit value.
Definition: IfxSent_Sent.h:580
IfxSent_Sent_ChannelConfig::pins
IFX_CONST IfxSent_Sent_Pins * pins
Specifies the pins configuration for SENT channel.
Definition: IfxSent_Sent.h:547
IfxSent_Sent_readChannelSerialDataFrame
IFX_EXTERN boolean IfxSent_Sent_readChannelSerialDataFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
Reads the nibbles recieved in the Data register.
Definition: IfxSent_Sent.c:323
IfxSent_SpcMode
IfxSent_SpcMode
Specifies the SENT SPC operational mode.
Definition: IfxSent.h:217
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxSent_Sent_ReceiveControl::crcMethodDisabled
boolean crcMethodDisabled
Specifies the CRC with zero nibbles disabled or enabled.
Definition: IfxSent_Sent.h:499
IfxSent_Sent_InputOutputControl::edgeCounterCleared
boolean edgeCounterCleared
Specifies the edge counter reset.
Definition: IfxSent_Sent.h:439
IfxSent_Sent_EnabledInterrupts
Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once v...
Definition: IfxSent_Sent.h:427
IfxSent_ConfigBit
IfxSent_ConfigBit
SENT.CH[channelId].SDS.CON , Specifies received configuration bit value.
Definition: IfxSent.h:116
IfxSent_Sent_TransmitControl::timeBase
IfxSent_TimeBase timeBase
Specifies the pulse time base.
Definition: IfxSent_Sent.h:519
IfxSent_Sent_Enable::frequencyRangeErrorInterrupt
uint8 frequencyRangeErrorInterrupt
Specifies frequency not in the range error interrupt enable.
Definition: IfxSent_Sent.h:411
IfxSent_Sent_Enable::serialDataCrcErrorInterrupt
uint8 serialDataCrcErrorInterrupt
Specifies serial data CRC error interrupt enable.
Definition: IfxSent_Sent.h:405
IfxSent_Sent_InterruptNodeControl::errorInterruptNode
IfxSent_InterruptNodePointer errorInterruptNode
Specifies the interrupt node for erri request.
Definition: IfxSent_Sent.h:464
IfxSent_Sent_ReceiveControl::crcModeDisabled
boolean crcModeDisabled
Specifies the CRC mode disabled mode.
Definition: IfxSent_Sent.h:498
IfxSent_DigitalGlitchesLength
IfxSent_DigitalGlitchesLength
SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples.
Definition: IfxSent.h:124
IfxSent_Sent_SerialMessageFrame::crc
uint8 crc
Contains the received CRC value.
Definition: IfxSent_Sent.h:577
IfxSent_Sent_Channel
Specifies the SENT Channel handle structure.
Definition: IfxSent_Sent.h:529
IfxSent_Sent_Channel::channelId
IfxSent_ChannelId channelId
Specifies the SENT channel number.
Definition: IfxSent_Sent.h:533
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxSent.h
SENT basic functionality.
IfxSent_Sent_Channel::channel
Ifx_SENT_CH * channel
Specifies the pointer SENT channel registers.
Definition: IfxSent_Sent.h:532
IfxSent_Sent_ReceiveControl
Specifies the receive control properties.
Definition: IfxSent_Sent.h:496
IfxSent_Sent_Enable::serialDataReceiveInterrupt
uint8 serialDataReceiveInterrupt
Specifies serial data interrupt enable.
Definition: IfxSent_Sent.h:403
IfxSent_TriggerSource
IfxSent_TriggerSource
SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation.
Definition: IfxSent.h:243
IfxSent_Sent_Config::sleepModeEnabled
boolean sleepModeEnabled
Specifies SENT enable/disable.
Definition: IfxSent_Sent.h:560
IfxSent_Sent_InputOutputControl::externalTrigger
IfxSent_ExternalTrigger externalTrigger
Specifies the external trigger line source.
Definition: IfxSent_Sent.h:444
IfxSent_Sent_NibbleControl::nibblePointer1
IfxSent_Nibble nibblePointer1
Specifies the received nibble1 control.
Definition: IfxSent_Sent.h:474
IfxSent_Sent_Enable::receiveSuccessInterrupt
uint8 receiveSuccessInterrupt
Specifies receive success interrupt enable.
Definition: IfxSent_Sent.h:399
IfxSent_Sent_ChannelConfig::tUnit
float32 tUnit
desired unit time (f_tick), e.g. 3E-6 for 3 uS
Definition: IfxSent_Sent.h:548
IfxSent_Sent_TransmitControl::pulseLength
uint8 pulseLength
Specifies the pulse length in ticktimes.
Definition: IfxSent_Sent.h:516
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:80
IfxSent_Sent_InterruptNodeControl::receiveSuccessInterruptNode
IfxSent_InterruptNodePointer receiveSuccessInterruptNode
Specifies the interrupt node for rsi request.
Definition: IfxSent_Sent.h:459
IfxSent_Sent_getAndClearInterruptStatus
IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_Sent_getAndClearInterruptStatus(IfxSent_Sent_Channel *channel)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in ha...
Definition: IfxSent_Sent.h:688
IfxSent_Sent_InputOutputControl
Specifies the input output control properties.
Definition: IfxSent_Sent.h:435
IfxSent_Sent_Pins::pinDriver
IfxPort_PadDriver pinDriver
Pad driver mode definition.
Definition: IfxSent_Sent.h:491
IfxSent_Sent_SerialMessageFrame::serialData
uint16 serialData
Contains the received serial data value.
Definition: IfxSent_Sent.h:579
IfxSent_getAndClearInterruptStatus
IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getAndClearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in ha...
Definition: IfxSent.h:610
IfxSent_Sent_NibbleControl::nibblePointer7
IfxSent_Nibble nibblePointer7
Specifies the received nibble7 control.
Definition: IfxSent_Sent.h:480
IfxCpu_Irq.h
This file contains the APIs for Interrupt related functions.
IfxSent_Sent_ChannelConfig::nibbleControl
IfxSent_Sent_NibbleControl nibbleControl
Specifies the received nibbles control properties.
Definition: IfxSent_Sent.h:549
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:85
IfxSent_Sent_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Specifies the interrupt service provider. CPU or DMA.
Definition: IfxSent_Sent.h:452
IfxSent_Sent_ChannelConfig::interrupt
IfxSent_Sent_Interrupt interrupt
Specifies the interrupt control properties structure.
Definition: IfxSent_Sent.h:550
IfxSent_Sent_Pins
Specifies the pins configuration for SENT channel.
Definition: IfxSent_Sent.h:485
IfxSent_Sent_NibbleControl
Specifies the received nibbles control properties.
Definition: IfxSent_Sent.h:471
IfxSent_Sent_InputOutputControl::glitchFallingCleared
boolean glitchFallingCleared
Specifies the glitch falling edge clear.
Definition: IfxSent_Sent.h:440
IfxSent_TimeBase
IfxSent_TimeBase
SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time.
Definition: IfxSent.h:235
IfxSent_Sent_Enable::transferDataInterrupt
uint8 transferDataInterrupt
Specifies transfer data interrupt enable.
Definition: IfxSent_Sent.h:401
IfxSent_Sent_ReceiveControl::statusNibbleEnabled
boolean statusNibbleEnabled
Specifies the status nibble to include in CRC.
Definition: IfxSent_Sent.h:503
IfxSent_Sent_initChannel
IFX_EXTERN boolean IfxSent_Sent_initChannel(IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxSent_Sent.c:65
IfxSent_Sent_Enable::nibblesValueOutOfRangeErrorInterrupt
uint8 nibblesValueOutOfRangeErrorInterrupt
Specifies nibble value out of range error interrupt enable.
Definition: IfxSent_Sent.h:408
IfxSent_Sent_NibbleControl::nibblePointer4
IfxSent_Nibble nibblePointer4
Specifies the received nibble4 control.
Definition: IfxSent_Sent.h:477
IfxSent_Sent_Frame::statusNibble
uint8 statusNibble
Contains the status and communication Nibble of last received frame.
Definition: IfxSent_Sent.h:570
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxSent_Sent_InputOutputControl::inputPulsePolarityHigh
boolean inputPulsePolarityHigh
Specifies the polarity of input of each channel.
Definition: IfxSent_Sent.h:437
IfxSent_Sent_initModule
IFX_EXTERN boolean IfxSent_Sent_initModule(IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
Initialise the SENT with the supplied configureation.
Definition: IfxSent_Sent.c:284
IfxSent_Sent_ReceiveControl::extendedSerialFrameMode
IfxSent_ExtendedSerialFrameMode extendedSerialFrameMode
Specifies the extended serial frame mode.
Definition: IfxSent_Sent.h:509


iLLD_TC26B: IfxSent_cfg.c Source File

  • _Impl
IfxSent_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxSent_cfg.c
3 * \brief SENT on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 *
43 */
44
45 /******************************************************************************/
46 /*----------------------------------Includes----------------------------------*/
47 /******************************************************************************/
48
49 #include "IfxSent_cfg.h"
IfxSent_cfg.h
SENT on-chip implementation data.


iLLD_TC26B: IfxSent_cfg.h Source File

  • _Impl
IfxSent_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxSent_cfg.h
3 * \brief SENT on-chip implementation data
4 * \ingroup IfxLld_Sent
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 * Use of this file is subject to the terms of use agreed between (i) you or
14 * the company in which ordinary course of business you are acting and (ii)
15 * Infineon Technologies AG or its licensees. If and as long as no such terms
16 * of use are agreed, use of this file is subject to following:
17 *
18 * Boost Software License - Version 1.0 - August 17th, 2003
19 *
20 * Permission is hereby granted, free of charge, to any person or organization
21 * obtaining a copy of the software and accompanying documentation covered by
22 * this license (the "Software") to use, reproduce, display, distribute,
23 * execute, and transmit the Software, and to prepare derivative works of the
24 * Software, and to permit third-parties to whom the Software is furnished to
25 * do so, all subject to the following:
26 *
27 * The copyright notices in the Software and this entire statement, including
28 * the above license grant, this restriction and the following disclaimer, must
29 * be included in all copies of the Software, in whole or in part, and all
30 * derivative works of the Software, unless such copies or derivative works are
31 * solely in the form of machine-executable object code generated by a source
32 * language processor.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
37 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
38 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
39 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40 * DEALINGS IN THE SOFTWARE.
41 *
42 *
43 *
44 * \defgroup IfxLld_Sent SENT
45 * \ingroup IfxLld
46 * \defgroup IfxLld_Sent_Impl Implementation
47 * \ingroup IfxLld_Sent
48 * \defgroup IfxLld_Sent_Std Standard Driver
49 * \ingroup IfxLld_Sent
50 */
51
52 #ifndef IFXSENT_CFG_H
53 #define IFXSENT_CFG_H 1
54
55 /******************************************************************************/
56 /*----------------------------------Includes----------------------------------*/
57 /******************************************************************************/
58
59 /******************************************************************************/
60 /*-----------------------------------Macros-----------------------------------*/
61 /******************************************************************************/
62
63 /** \brief Specifies all interrupt events
64 */
65 #define IFXSENT_CFG_CHANNEL_INTEN (0x1FEDU)
66
67 /** \brief Specifies the step range for calculating module clock
68 */
69 #define IFXSENT_CFG_STEP_RANGE (1024)
70
71 /** \brief Specifies timeout value in transmission
72 */
73 #define IFXSENT_CFG_TIMEOUT_VALUE ((uint16)0xFFFFU)
74
75 #define IFXSENT_NUM_CHANNELS (6)
76
77 #define IFXSENT_NUM_MODULES (1)
78
79 /******************************************************************************/
80 /*-------------------------------Enumerations---------------------------------*/
81 /******************************************************************************/
82
83 /** \brief Specifies the channel Id
84 */
85 typedef enum
86 {
87 IfxSent_ChannelId_0 = 0, /**< \brief Specifies the channel Id 0 */
88 IfxSent_ChannelId_1 = 1, /**< \brief Specifies the channel Id 1 */
89 IfxSent_ChannelId_2 = 2, /**< \brief Specifies the channel Id 2 */
90 IfxSent_ChannelId_3 = 3, /**< \brief Specifies the channel Id 3 */
91 IfxSent_ChannelId_4 = 4, /**< \brief Specifies the channel Id 4 */
92 IfxSent_ChannelId_5 = 5, /**< \brief Specifies the channel Id 5 */
93 IfxSent_ChannelId_none = -1 /**< \brief None Sent channels */
94 } IfxSent_ChannelId;
95
96 #endif /* IFXSENT_CFG_H */
IfxSent_ChannelId_0
Specifies the channel Id 0.
Definition: IfxSent_cfg.h:87
IfxSent_ChannelId_4
Specifies the channel Id 4.
Definition: IfxSent_cfg.h:91
IfxSent_ChannelId_5
Specifies the channel Id 5.
Definition: IfxSent_cfg.h:92
IfxSent_ChannelId_2
Specifies the channel Id 2.
Definition: IfxSent_cfg.h:89
IfxSent_ChannelId_1
Specifies the channel Id 1.
Definition: IfxSent_cfg.h:88
IfxSent_ChannelId_none
None Sent channels.
Definition: IfxSent_cfg.h:93
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:85
IfxSent_ChannelId_3
Specifies the channel Id 3.
Definition: IfxSent_cfg.h:90


iLLD_TC26B: IfxSmu.c Source File

  • Smu
  • Std
IfxSmu.c
Go to the documentation of this file.
1 /**
2 * \file IfxSmu.c
3 * \brief SMU basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxSmu.h"
47 #include "Port/Std/IfxPort.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 boolean IfxSmu_initFsp(Ifx_SMU *smu, IfxSmu_configFsp *config)
54 {
55 /* FIXME IfxSmu_Fsp is not required, only need Ifx_SMU */
56 boolean result = TRUE;
57
58 float32 fBack = 100e6;
59 uint16 endinitSfty_pw;
60 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
61
62 IfxSmu_unlock(smu);
63
64 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
65 smu->AGC.B.EFRST = config->enableFaultToRunStateTransition ? 1 : 0;
66 smu->FSP.B.PES = config->emergencyStopEnabled ? 1 : 0;
67 smu->FSP.B.MODE = config->mode == IfxSmu_Fsp_Mode_bistable ? 0 : 2;
68 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
69
70 {
71 uint32 tFspHigh;
72 boolean ok = FALSE;
73
74 float32 tSmuFs;
75 uint32 i;
76
77 for (i = 0; i < 8; i++)
78 {
79 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
80 smu->FSP.B.PRE1 = i; /* Write PRE1 to get TFSP_LOW value */
81 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
82
83 tSmuFs = (1 << (smu->FSP.B.PRE1 + 1)) / fBack;
84
85 /*
86 * tFSP_FS = tSMU_FS *(SMU_FSP.TFSP_HIGH[] & SMU_FSP.TFSP_LOW[] + 1)
87 *
88 * tFSP_FS = tSMU_FS *(SMU_FSP.TFSP + 1)
89 * (SMU_FSP.TFSP + 1) = tFSP_FS / tSMU_FS
90 *
91 *
92 */
93
94 tFspHigh = ((uint32)(config->faultStateTime / tSmuFs) - 1) >> IFX_SMU_FSP_TFSP_LOW_LEN;
95
96 /* FIXME check why condition is always true */
97
98 if (
99 (config->faultStateTime <= tSmuFs * (((tFspHigh << IFX_SMU_FSP_TFSP_LOW_LEN) | (smu->FSP.B.TFSP_LOW)) + 1)) /* Check minimal fault time */
100 && (tFspHigh <= IFX_SMU_FSP_TFSP_HIGH_MSK) /* Check for overflow */
101 )
102 {
103 ok = TRUE;
104 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
105 smu->FSP.B.TFSP_HIGH = tFspHigh;
106 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
107 break;
108 }
109 }
110
111 result &= ok;
112 }
113
114 if (config->mode == IfxSmu_Fsp_Mode_timeSwitching)
115 {
116 uint32 dividers[4] = {512, 1024, 2048, 4096};
117 uint32 i;
118 float32 fSmuFfs;
119 boolean ok = FALSE;
120
121 for (i = 0; i < 4; i++)
122 {
123 fSmuFfs = fBack / dividers[i];
124
125 if ((config->faultFreeStateFrequencyMin < fSmuFfs) && (fSmuFfs < config->faultFreeStateFrequencyMax))
126 {
127 ok = TRUE;
128 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
129 smu->FSP.B.PRE2 = i;
130 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
131 break;
132 }
133 }
134
135 result &= ok;
136 }
137
138 {
139 IfxSmu_Fsp_Out *out = IfxSmu_Fsp_Out_pinTable[0][0];
140 IfxPort_setPinModeOutput(out->pin.port, out->pin.pinIndex, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
141 IfxPort_setPinPadDriver(out->pin.port, out->pin.pinIndex, IfxPort_PadDriver_cmosAutomotiveSpeed1);
142 }
143
144 {
145 /* Configure the FSP port to output */
146 Ifx_SMU_PCTL regPctrl;
147 regPctrl.U = smu->PCTL.U;
148
149 regPctrl.B.HWDIR = 1; /* Set to output */
150 regPctrl.B.HWEN = 1; /* Port is driven by FSP */
151 regPctrl.B.PCS = 1; /* PAD is controlled by the SMU */
152
153 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
154 smu->PCTL.U = regPctrl.U;
155 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
156 }
157
158 IfxSmu_lock(smu);
159
160 return result;
161 }
162
163
164 boolean IfxSmu_cmd(Ifx_SMU *smu, uint8 cmd, uint8 arg)
165 {
166 Ifx_SMU_CMD reg;
167 Ifx_SMU_STS status;
168 uint16 endinitSfty_pw;
169 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
170
171 reg.U = 0;
172 reg.B.CMD = cmd;
173 reg.B.ARG = arg;
174
175 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
176 smu->CMD.U = reg.U;
177 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
178
179 status.U = smu->STS.U;
180 return (status.B.CMD == cmd) && (status.B.ARG == arg) && (status.B.RES == 0);
181 }
182
183
184 float32 IfxSmu_getFspFaultFreeFrequency(Ifx_SMU *smu)
185 {
186 float32 fBack = 100e6;
187 uint32 dividers[4] = {512, 1024, 2048, 4096};
188
189 return fBack / dividers[smu->FSP.B.PRE2];
190 }
191
192
193 float32 IfxSmu_getFspFaultStateTime(Ifx_SMU *smu)
194 {
195 float32 fBack = 100e6;
196 float32 tSmuFs;
197
198 tSmuFs = (1 << (smu->FSP.B.PRE1 + 1)) / fBack;
199
200 return tSmuFs * (((smu->FSP.B.TFSP_HIGH << IFX_SMU_FSP_TFSP_LOW_LEN) | (smu->FSP.B.TFSP_LOW)) + 1);
201 }
202
203
204 boolean IfxSmu_unlock(Ifx_SMU *smu)
205 {
206 boolean result;
207
208 if (smu->KEYS.B.PERLCK != 0xFF)
209 {
210 uint16 endinitSfty_pw;
211 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
212 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
213 smu->KEYS.B.CFGLCK = 0xBC;
214 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
215 result = TRUE;
216 }
217 else
218 {
219 result = FALSE;
220 }
221
222 return result;
223 }
224
225
226 void IfxSmu_lock(Ifx_SMU *smu)
227 {
228 uint16 endinitSfty_pw;
229 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
230 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
231 smu->KEYS.B.CFGLCK = 0x00;
232 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
233 }
234
235
236 void IfxSmu_lockForever(Ifx_SMU *smu)
237 {
238 uint16 endinitSfty_pw;
239 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
240 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
241 smu->KEYS.B.PERLCK = 0xFF;
242 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
243 }
244
245
246 void IfxSmu_setAlarmConfig(Ifx_SMU *smu, IfxSmu_Alarm alarm, IfxSmu_AlarmConfig config)
247 {
248 uint16 endinitSfty_pw;
249 IfxSmu_AlarmGroup group = (IfxSmu_AlarmGroup)((alarm >> 8) & 0xFF);
250 uint32 index = alarm & 0xFF;
251 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
252 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
253
254 smu->AGCF[group][0].U &= ~(1 << index);
255 smu->AGCF[group][1].U &= ~(1 << index);
256 smu->AGCF[group][2].U &= ~(1 << index);
257
258 smu->AGCF[group][0].U |= ((config >> 0) & 1) << index;
259 smu->AGCF[group][1].U |= ((config >> 1) & 1) << index;
260 smu->AGCF[group][2].U |= ((config >> 2) & 1) << index;
261 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
262 }
263
264
265 void IfxSmu_enableAlarmFsp(Ifx_SMU *smu, IfxSmu_Alarm alarm, boolean enabled)
266 {
267 uint16 endinitSfty_pw;
268 IfxSmu_AlarmGroup group = (IfxSmu_AlarmGroup)((alarm >> 8) & 0xFF);
269 uint32 index = alarm & 0xFF;
270 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
271
272 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
273 smu->AGFSP[group].U &= (~1) << index;
274
275 smu->AGFSP[group].U |= (enabled ? 1 : 0) << index;
276 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
277 }
278
279
280 boolean IfxSmu_isAlarmSet(Ifx_SMU *smu, IfxSmu_Alarm alarm)
281 {
282 IfxSmu_AlarmGroup group = (IfxSmu_AlarmGroup)((alarm >> 8) & 0xFF);
283 uint32 index = alarm & 0xFF;
284
285 return ((smu->AG[group].U >> index) & 1) != 0;
286 }
287
288
289 IfxSmu_Alarm IfxSmu_getAlarm(Ifx_SMU *smu)
290 {
291 IfxSmu_AlarmGroup group;
292 uint32 index;
293
294 for (group = IfxSmu_AlarmGroup_0; group <= IfxSmu_AlarmGroup_6; group++)
295 {
296 index = __clz(smu->AG[group].U);
297
298 if (index != 32)
299 {
300 return (IfxSmu_Alarm)((group << 8) | (31 - index));
301 }
302 }
303
304 return IfxSmu_Alarm_noAlarm;
305 }
306
307
308 void IfxSmu_clearAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm)
309 {
310 uint16 endinitSfty_pw;
311 IfxSmu_AlarmGroup group = (IfxSmu_AlarmGroup)((alarm >> 8) & 0xFF);
312 uint32 index = alarm & 0xFF;
313 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
314
315 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
316 smu->AG[group].U = 1 << index;
317 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
318 }
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
IfxSmu_getFspFaultStateTime
float32 IfxSmu_getFspFaultStateTime(Ifx_SMU *smu)
Return the minimal fault state time.
Definition: IfxSmu.c:193
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:133
IfxSmu_cmd
boolean IfxSmu_cmd(Ifx_SMU *smu, uint8 cmd, uint8 arg)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.6 SMU Control Interface Ref: TC27xC...
Definition: IfxSmu.c:164
IfxSmu_lock
void IfxSmu_lock(Ifx_SMU *smu)
Lock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection...
Definition: IfxSmu.c:226
IfxSmu_unlock
boolean IfxSmu_unlock(Ifx_SMU *smu)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection...
Definition: IfxSmu.c:204
IfxSmu_setAlarmConfig
void IfxSmu_setAlarmConfig(Ifx_SMU *smu, IfxSmu_Alarm alarm, IfxSmu_AlarmConfig config)
Set the SMU alarm configuration.
Definition: IfxSmu.c:246
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxSmu_Fsp_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxSmu_PinMap.h:58
IfxSmu_Fsp_Mode_timeSwitching
Time switching protocol.
Definition: IfxSmu.h:100
float32
float float32
Definition: Platform_Types.h:170
IfxSmu_AlarmGroup_0
Alarm group 0.
Definition: IfxSmu_cfg.h:79
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxSmu_lockForever
void IfxSmu_lockForever(Ifx_SMU *smu)
Lock the SMU configuration up to the next application reset Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection.
Definition: IfxSmu.c:236
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxSmu_Alarm
IfxSmu_Alarm
SMU Alarm list
Definition: IfxSmu_cfg.h:102
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:195
IfxSmu_isAlarmSet
boolean IfxSmu_isAlarmSet(Ifx_SMU *smu, IfxSmu_Alarm alarm)
Return the alarm status.
Definition: IfxSmu.c:280
IfxPort_OutputIdx_general
Definition: IfxPort.h:119
IfxSmu.h
SMU basic functionality.
IfxSmu_configFsp::mode
IfxSmu_Fsp_Mode mode
FSP mode.
Definition: IfxSmu.h:115
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:144
IfxSmu_initFsp
boolean IfxSmu_initFsp(Ifx_SMU *smu, IfxSmu_configFsp *config)
Initialize the FSP.
Definition: IfxSmu.c:53
IfxSmu_configFsp::faultStateTime
float32 faultStateTime
Minimal fault state time in sec.
Definition: IfxSmu.h:116
IfxSmu_Fsp_Out_pinTable
const IfxSmu_Fsp_Out * IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]
Definition: IfxSmu_PinMap.c:48
IfxSmu_getFspFaultFreeFrequency
float32 IfxSmu_getFspFaultFreeFrequency(Ifx_SMU *smu)
Return FSP frequency (Time switching only)
Definition: IfxSmu.c:184
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxSmu_configFsp::emergencyStopEnabled
boolean emergencyStopEnabled
If TRUE, the emergency stop port is triggered on FSP fault state.
Definition: IfxSmu.h:119
IfxSmu_configFsp
FSP Configuration Structure.
Definition: IfxSmu.h:113
IfxSmu_configFsp::enableFaultToRunStateTransition
boolean enableFaultToRunStateTransition
Enable Fault to Run State Transition.
Definition: IfxSmu.h:120
IfxSmu_clearAlarm
void IfxSmu_clearAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm)
Clear the alarm flag.
Definition: IfxSmu.c:308
IfxSmu_AlarmConfig
IfxSmu_AlarmConfig
SMU Alarm Configuration Ifx_SMU.AGCF[][].
Definition: IfxSmu.h:73
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:424
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:253
IfxSmu_AlarmGroup
IfxSmu_AlarmGroup
Alarm group
Definition: IfxSmu_cfg.h:77
IfxSmu_Alarm_noAlarm
Special flag to inform about no alarm (Software only)
Definition: IfxSmu_cfg.h:238
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxSmu_Fsp_Out
Fault Signal Protocol Pin.
Definition: IfxSmu_PinMap.h:55
IfxSmu_enableAlarmFsp
void IfxSmu_enableAlarmFsp(Ifx_SMU *smu, IfxSmu_Alarm alarm, boolean enabled)
Set the alarm FSP configuration.
Definition: IfxSmu.c:265
IfxSmu_getAlarm
IfxSmu_Alarm IfxSmu_getAlarm(Ifx_SMU *smu)
Get the alarm flag.
Definition: IfxSmu.c:289
IfxSmu_Fsp_Mode_bistable
Bi-stable fault signalling protocol.
Definition: IfxSmu.h:99
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxSmu_AlarmGroup_6
Alarm group 6.
Definition: IfxSmu_cfg.h:85
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxSmu_configFsp::faultFreeStateFrequencyMin
float32 faultFreeStateFrequencyMin
Min fault free state frequency in Hz, only valid if mode=IfxSmu_Fsp_Mode_timeSwitching.
Definition: IfxSmu.h:117
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxSmu.h Source File

  • Smu
  • Std
IfxSmu.h
Go to the documentation of this file.
1 /**
2 * \file IfxSmu.h
3 * \brief SMU basic functionality
4 * \ingroup IfxLld_Smu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Smu_Std_func_fsp FSP Functions
42 * \ingroup IfxLld_Smu_Std
43 * \defgroup IfxLld_Smu_Std_func SMU Functions
44 * \ingroup IfxLld_Smu_Std
45 * \defgroup IfxLld_Smu_Std_datastructures Data Structures
46 * \ingroup IfxLld_Smu_Std
47 */
48
49 #ifndef IFXSMU_H
50 #define IFXSMU_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "_Impl/IfxSmu_cfg.h"
57 #include "Cpu/Std/Ifx_Types.h"
58 #include "_PinMap/IfxSmu_PinMap.h"
59 #include "IfxSmu_reg.h"
60 #include "IfxSmu_regdef.h"
61 #include "IfxSmu_bf.h"
62 #include "_Utilities/Ifx_Assert.h"
63
64 /******************************************************************************/
65 /*--------------------------------Enumerations--------------------------------*/
66 /******************************************************************************/
67
68 /** \addtogroup IfxLld_Smu_Std_datastructures
69 * \{ */
70 /** \brief SMU Alarm Configuration
71 * Ifx_SMU.AGCF[][]
72 */
73 typedef enum
74 {
75 IfxSmu_AlarmConfig_noAction = 0, /**< \brief No Action. Reset value. Alarm disabled. */
76 IfxSmu_AlarmConfig_interruptSet0 = 2, /**< \brief Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuration Set 0 */
77 IfxSmu_AlarmConfig_interruptSet1 = 3, /**< \brief Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuration Set 1 */
78 IfxSmu_AlarmConfig_interruptSet2 = 4, /**< \brief Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuration Set 2 */
79 IfxSmu_AlarmConfig_nmi = 5, /**< \brief Sends an NMI request to the SCU */
80 IfxSmu_AlarmConfig_scuReset = 6, /**< \brief Sends a reset request to SCU */
81 IfxSmu_AlarmConfig_cpuIdle = 7 /**< \brief Triggers a CPU idle request */
82 } IfxSmu_AlarmConfig;
83
84 /** \brief SMU Commands
85 */
86 typedef enum
87 {
88 IfxSmu_Cmd_start = 0, /**< \brief Forces the SSM to go to the RUN state from the START state. */
89 IfxSmu_Cmd_activateFsp = 1, /**< \brief Activates the Fault Signaling Protocol. */
90 IfxSmu_Cmd_releaseFsp = 2, /**< \brief Turns the FSP into the fault free state. */
91 IfxSmu_Cmd_activatePes = 3, /**< \brief Triggers the activation of the Port Emergency Stop (PES). */
92 IfxSmu_Cmd_stopRecoveryTimer = 4, /**< \brief Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the product. */
93 IfxSmu_Cmd_enableClearAlarmStatus = 5, /**< \brief Alarm Status Clear Enable Command */
94 IfxSmu_Cmd_triggerAlarm = 6 /**< \brief Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "Alarm Mapping" */
95 } IfxSmu_Cmd;
96
97 typedef enum
98 {
99 IfxSmu_Fsp_Mode_bistable, /**< \brief Bi-stable fault signalling protocol */
100 IfxSmu_Fsp_Mode_timeSwitching /**< \brief Time switching protocol */
101 } IfxSmu_Fsp_Mode;
102
103 /** \} */
104
105 /******************************************************************************/
106 /*-----------------------------Data Structures--------------------------------*/
107 /******************************************************************************/
108
109 /** \addtogroup IfxLld_Smu_Std_datastructures
110 * \{ */
111 /** \brief FSP Configuration Structure
112 */
113 typedef struct
114 {
115 IfxSmu_Fsp_Mode mode; /**< \brief FSP mode */
116 float32 faultStateTime; /**< \brief Minimal fault state time in sec */
117 float32 faultFreeStateFrequencyMin; /**< \brief Min fault free state frequency in Hz, only valid if mode=IfxSmu_Fsp_Mode_timeSwitching */
118 float32 faultFreeStateFrequencyMax; /**< \brief Max fault free state frequency in Hz, only valid if mode=IfxSmu_Fsp_Mode_timeSwitching */
119 boolean emergencyStopEnabled; /**< \brief If TRUE, the emergency stop port is triggered on FSP fault state */
120 boolean enableFaultToRunStateTransition; /**< \brief Enable Fault to Run State Transition */
121 } IfxSmu_configFsp;
122
123 /** \} */
124
125 /** \addtogroup IfxLld_Smu_Std_func_fsp
126 * \{ */
127
128 /******************************************************************************/
129 /*-------------------------Inline Function Prototypes-------------------------*/
130 /******************************************************************************/
131
132 /** \brief Turns the FSP into the fault free state.
133 * \param smu Pointer to SMU module registers
134 */
135 IFX_INLINE boolean IfxSmu_releaseFsp(Ifx_SMU *smu);
136
137 /** \brief Initialize the FSP configuartion to default
138 * \param config FSP Configuration Structure
139 * \return None
140 */
141 IFX_INLINE void IfxSmu_initFspConfig(IfxSmu_configFsp *config);
142
143 /** \brief Activates the Fault Signaling Protocol.
144 * \param smu Pointer to SMU module registers
145 */
146 IFX_INLINE boolean IfxSmu_activateFsp(Ifx_SMU *smu);
147
148 /******************************************************************************/
149 /*-------------------------Global Function Prototypes-------------------------*/
150 /******************************************************************************/
151
152 /** \brief Initialize the FSP
153 *
154 * Fault state time >= tFSP_FS = tSMU_FS *(SMU_FSP.TFSP_HIGH[] & SMU_FSP.TFSP_LOW[] + 1)
155 * with tSMU_FS = <SMU_FSP.PRE1>. SMU_FSP.TFSP_HIGH[] / fBACK
156 * and SMU_FSP.PRE1 should enable tFSP_FS >= 500ms (Ref: TC27xC UM v2.2: SMU_FSP.TFSP_HIGH)
157 * Fault free state period (Time switching only) = tSMU_FFS = fBACK / <SMU_FSP.PRE2>
158 *
159 * Note: TSMU_FS * SMU_FSP.TFSP_LOW > 250us
160 * \param smu Pointer to SMU module registers
161 * \param config FSP Configuration Structure
162 */
163 IFX_EXTERN boolean IfxSmu_initFsp(Ifx_SMU *smu, IfxSmu_configFsp *config);
164
165 /** \brief Return FSP frequency (Time switching only)
166 * \param smu Pointer to SMU module registers
167 */
168 IFX_EXTERN float32 IfxSmu_getFspFaultFreeFrequency(Ifx_SMU *smu);
169
170 /** \brief Return the minimal fault state time
171 * \param smu Pointer to SMU module registers
172 */
173 IFX_EXTERN float32 IfxSmu_getFspFaultStateTime(Ifx_SMU *smu);
174
175 /** \brief Set the alarm FSP configuration
176 * \param smu Pointer to SMU Module Registers
177 * \param alarm Alarm to be configured
178 * \param enabled If TRUE, the alarm event triggers the FSP, else no action
179 * \return None
180 */
181 IFX_EXTERN void IfxSmu_enableAlarmFsp(Ifx_SMU *smu, IfxSmu_Alarm alarm, boolean enabled);
182
183 /** \} */
184
185 /** \addtogroup IfxLld_Smu_Std_func
186 * \{ */
187
188 /******************************************************************************/
189 /*-------------------------Inline Function Prototypes-------------------------*/
190 /******************************************************************************/
191
192 /** \brief Triggers the activation of the Port Emergency Stop (PES).
193 * \param smu Pointer to SMU module registers
194 */
195 IFX_INLINE boolean IfxSmu_activatePes(Ifx_SMU *smu);
196
197 /** \brief Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the product.
198 * \param smu Pointer to SMU module registers
199 * \param timer Recovery Timer
200 */
201 IFX_INLINE boolean IfxSmu_stopRecoveryTimer(Ifx_SMU *smu, IfxSmu_RecoveryTimer timer);
202
203 /** \brief Alarm Status Clear Enable Command.
204 * \param smu Pointer to SMU module registers
205 */
206 IFX_INLINE boolean IfxSmu_enableClearAlarmStatus(Ifx_SMU *smu);
207
208 /** \brief Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "Alarm Mapping"
209 * \param smu Pointer to SMU module registers
210 * \param alarm Alarm list
211 */
212 IFX_INLINE boolean IfxSmu_triggerAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm);
213
214 /** \brief Forces the SSM to go to the RUN state from the START state.
215 * \param smu Pointer to SMU module registers
216 */
217 IFX_INLINE boolean IfxSmu_start(Ifx_SMU *smu);
218
219 /******************************************************************************/
220 /*-------------------------Global Function Prototypes-------------------------*/
221 /******************************************************************************/
222
223 /** \brief Unlock the SMU configuration (temporary)
224 * Ref: TC27xC UM v2.2: 9.4.6 SMU Control Interface
225 * Ref: TC27xC UM v2.2: 9.5.2 SMU Configuration Registers
226 * \param smu Pointer to SMU module registers
227 * \param cmd SMU Command
228 * \param arg Argument to be used with the command
229 */
230 IFX_EXTERN boolean IfxSmu_cmd(Ifx_SMU *smu, uint8 cmd, uint8 arg);
231
232 /** \brief Unlock the SMU configuration (temporary)
233 * Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection
234 * \param smu Pointer to SMU module registers
235 */
236 IFX_EXTERN boolean IfxSmu_unlock(Ifx_SMU *smu);
237
238 /** \brief Lock the SMU configuration (temporary)
239 * Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection
240 * \param smu Pointer to SMU module registers
241 * \return None
242 */
243 IFX_EXTERN void IfxSmu_lock(Ifx_SMU *smu);
244
245 /** \brief Lock the SMU configuration up to the next application reset
246 * Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection
247 * \param smu Pointer to SMU module registers
248 * \return None
249 */
250 IFX_EXTERN void IfxSmu_lockForever(Ifx_SMU *smu);
251
252 /** \brief Set the SMU alarm configuration
253 * \param smu Pointer to SMU module registers
254 * \param alarm Alarm to be configured
255 * \param config Alarm configuration
256 * \return None
257 */
258 IFX_EXTERN void IfxSmu_setAlarmConfig(Ifx_SMU *smu, IfxSmu_Alarm alarm, IfxSmu_AlarmConfig config);
259
260 /** \brief Return the alarm status
261 * \param smu Pointer to SMU Module Registers
262 * \param alarm Alarm for which to return the status
263 * \return TRUE means the alarm is set and FALSE means the alarm is not set.
264 */
265 IFX_EXTERN boolean IfxSmu_isAlarmSet(Ifx_SMU *smu, IfxSmu_Alarm alarm);
266
267 /** \brief Get the alarm flag
268 * \param smu Pointer to SMU Module Registers
269 * \return Return the next set alarm, if no alarm is set , return IfxSmu_Alarm_noAlarm
270 */
271 IFX_EXTERN IfxSmu_Alarm IfxSmu_getAlarm(Ifx_SMU *smu);
272
273 /** \brief Clear the alarm flag
274 * \param smu Pointer to SMU Module Registers
275 * \param alarm Alarm for which the flag should be cleared
276 * \return None
277 */
278 IFX_EXTERN void IfxSmu_clearAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm);
279
280 /** \} */
281
282 /******************************************************************************/
283 /*---------------------Inline Function Implementations------------------------*/
284 /******************************************************************************/
285
286 IFX_INLINE boolean IfxSmu_activatePes(Ifx_SMU *smu)
287 {
288 return IfxSmu_cmd(smu, IfxSmu_Cmd_activatePes, 0);
289 }
290
291
292 IFX_INLINE boolean IfxSmu_stopRecoveryTimer(Ifx_SMU *smu, IfxSmu_RecoveryTimer timer)
293 {
294 return IfxSmu_cmd(smu, IfxSmu_Cmd_stopRecoveryTimer, timer);
295 }
296
297
298 IFX_INLINE boolean IfxSmu_enableClearAlarmStatus(Ifx_SMU *smu)
299 {
300 return IfxSmu_cmd(smu, IfxSmu_Cmd_enableClearAlarmStatus, 0);
301 }
302
303
304 IFX_INLINE boolean IfxSmu_triggerAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm)
305 {
306 uint8 index = alarm & 0xFF;
307 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (alarm >> 8) == IfxSmu_AlarmGroup_5);
308 return IfxSmu_cmd(smu, IfxSmu_Cmd_triggerAlarm, index);
309 }
310
311
312 IFX_INLINE boolean IfxSmu_start(Ifx_SMU *smu)
313 {
314 return IfxSmu_cmd(smu, IfxSmu_Cmd_start, 0);
315 }
316
317
318 IFX_INLINE boolean IfxSmu_releaseFsp(Ifx_SMU *smu)
319 {
320 return IfxSmu_cmd(smu, IfxSmu_Cmd_releaseFsp, 0);
321 }
322
323
324 IFX_INLINE void IfxSmu_initFspConfig(IfxSmu_configFsp *config)
325 {
326 config->emergencyStopEnabled = FALSE;
327 config->enableFaultToRunStateTransition = FALSE;
328 config->faultFreeStateFrequencyMin = 0;
329 config->faultFreeStateFrequencyMax = 0;
330 config->faultStateTime = 1e-3;
331 config->mode = IfxSmu_Fsp_Mode_bistable;
332 }
333
334
335 IFX_INLINE boolean IfxSmu_activateFsp(Ifx_SMU *smu)
336 {
337 return IfxSmu_cmd(smu, IfxSmu_Cmd_activateFsp, 0);
338 }
339
340
341 #endif /* IFXSMU_H */
IfxSmu_initFspConfig
IFX_INLINE void IfxSmu_initFspConfig(IfxSmu_configFsp *config)
Initialize the FSP configuartion to default.
Definition: IfxSmu.h:324
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxSmu_Cmd_stopRecoveryTimer
Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the pr...
Definition: IfxSmu.h:92
IfxSmu_getFspFaultStateTime
IFX_EXTERN float32 IfxSmu_getFspFaultStateTime(Ifx_SMU *smu)
Return the minimal fault state time.
Definition: IfxSmu.c:193
IfxSmu_cfg.h
SMU on-chip implementation data.
IfxSmu_cmd
IFX_EXTERN boolean IfxSmu_cmd(Ifx_SMU *smu, uint8 cmd, uint8 arg)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.6 SMU Control Interface Ref: TC27xC...
Definition: IfxSmu.c:164
IfxSmu_start
IFX_INLINE boolean IfxSmu_start(Ifx_SMU *smu)
Forces the SSM to go to the RUN state from the START state.
Definition: IfxSmu.h:312
IfxSmu_lock
IFX_EXTERN void IfxSmu_lock(Ifx_SMU *smu)
Lock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection...
Definition: IfxSmu.c:226
IfxSmu_unlock
IFX_EXTERN boolean IfxSmu_unlock(Ifx_SMU *smu)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection...
Definition: IfxSmu.c:204
IfxSmu_AlarmConfig_interruptSet0
Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuratio...
Definition: IfxSmu.h:76
IfxSmu_setAlarmConfig
IFX_EXTERN void IfxSmu_setAlarmConfig(Ifx_SMU *smu, IfxSmu_Alarm alarm, IfxSmu_AlarmConfig config)
Set the SMU alarm configuration.
Definition: IfxSmu.c:246
IfxSmu_Fsp_Mode_timeSwitching
Time switching protocol.
Definition: IfxSmu.h:100
float32
float float32
Definition: Platform_Types.h:170
Ifx_Assert.h
Assert functions.
IfxSmu_AlarmConfig_scuReset
Sends a reset request to SCU.
Definition: IfxSmu.h:80
IfxSmu_lockForever
IFX_EXTERN void IfxSmu_lockForever(Ifx_SMU *smu)
Lock the SMU configuration up to the next application reset Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection.
Definition: IfxSmu.c:236
IfxSmu_RecoveryTimer
IfxSmu_RecoveryTimer
Recovery Timer
Definition: IfxSmu_cfg.h:90
IfxSmu_stopRecoveryTimer
IFX_INLINE boolean IfxSmu_stopRecoveryTimer(Ifx_SMU *smu, IfxSmu_RecoveryTimer timer)
Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the pr...
Definition: IfxSmu.h:292
IfxSmu_Fsp_Mode
IfxSmu_Fsp_Mode
Definition: IfxSmu.h:97
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxSmu_AlarmGroup_5
Alarm group 5.
Definition: IfxSmu_cfg.h:84
IfxSmu_Alarm
IfxSmu_Alarm
SMU Alarm list
Definition: IfxSmu_cfg.h:102
IfxSmu_Cmd_start
Forces the SSM to go to the RUN state from the START state.
Definition: IfxSmu.h:88
IfxSmu_isAlarmSet
IFX_EXTERN boolean IfxSmu_isAlarmSet(Ifx_SMU *smu, IfxSmu_Alarm alarm)
Return the alarm status.
Definition: IfxSmu.c:280
IfxSmu_Cmd_releaseFsp
Turns the FSP into the fault free state.
Definition: IfxSmu.h:90
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxSmu_releaseFsp
IFX_INLINE boolean IfxSmu_releaseFsp(Ifx_SMU *smu)
Turns the FSP into the fault free state.
Definition: IfxSmu.h:318
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxSmu_configFsp::mode
IfxSmu_Fsp_Mode mode
FSP mode.
Definition: IfxSmu.h:115
IfxSmu_Cmd_enableClearAlarmStatus
Alarm Status Clear Enable Command.
Definition: IfxSmu.h:93
IfxSmu_initFsp
IFX_EXTERN boolean IfxSmu_initFsp(Ifx_SMU *smu, IfxSmu_configFsp *config)
Initialize the FSP.
Definition: IfxSmu.c:53
IfxSmu_configFsp::faultStateTime
float32 faultStateTime
Minimal fault state time in sec.
Definition: IfxSmu.h:116
IfxSmu_AlarmConfig_interruptSet2
Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuratio...
Definition: IfxSmu.h:78
IfxSmu_activatePes
IFX_INLINE boolean IfxSmu_activatePes(Ifx_SMU *smu)
Triggers the activation of the Port Emergency Stop (PES).
Definition: IfxSmu.h:286
IfxSmu_enableClearAlarmStatus
IFX_INLINE boolean IfxSmu_enableClearAlarmStatus(Ifx_SMU *smu)
Alarm Status Clear Enable Command.
Definition: IfxSmu.h:298
IfxSmu_getFspFaultFreeFrequency
IFX_EXTERN float32 IfxSmu_getFspFaultFreeFrequency(Ifx_SMU *smu)
Return FSP frequency (Time switching only)
Definition: IfxSmu.c:184
IfxSmu_configFsp::emergencyStopEnabled
boolean emergencyStopEnabled
If TRUE, the emergency stop port is triggered on FSP fault state.
Definition: IfxSmu.h:119
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxSmu_Cmd_activatePes
Triggers the activation of the Port Emergency Stop (PES).
Definition: IfxSmu.h:91
IfxSmu_configFsp::faultFreeStateFrequencyMax
float32 faultFreeStateFrequencyMax
Max fault free state frequency in Hz, only valid if mode=IfxSmu_Fsp_Mode_timeSwitching.
Definition: IfxSmu.h:118
IfxSmu_configFsp
FSP Configuration Structure.
Definition: IfxSmu.h:113
IfxSmu_configFsp::enableFaultToRunStateTransition
boolean enableFaultToRunStateTransition
Enable Fault to Run State Transition.
Definition: IfxSmu.h:120
IfxSmu_clearAlarm
IFX_EXTERN void IfxSmu_clearAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm)
Clear the alarm flag.
Definition: IfxSmu.c:308
IfxSmu_AlarmConfig
IfxSmu_AlarmConfig
SMU Alarm Configuration Ifx_SMU.AGCF[][].
Definition: IfxSmu.h:73
IfxSmu_Cmd_triggerAlarm
Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "A...
Definition: IfxSmu.h:94
IfxSmu_AlarmConfig_cpuIdle
Triggers a CPU idle request.
Definition: IfxSmu.h:81
IfxSmu_AlarmConfig_interruptSet1
Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuratio...
Definition: IfxSmu.h:77
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxSmu_AlarmConfig_noAction
No Action. Reset value. Alarm disabled.
Definition: IfxSmu.h:75
IfxSmu_Cmd
IfxSmu_Cmd
SMU Commands.
Definition: IfxSmu.h:86
IfxSmu_Cmd_activateFsp
Activates the Fault Signaling Protocol.
Definition: IfxSmu.h:89
IfxSmu_enableAlarmFsp
IFX_EXTERN void IfxSmu_enableAlarmFsp(Ifx_SMU *smu, IfxSmu_Alarm alarm, boolean enabled)
Set the alarm FSP configuration.
Definition: IfxSmu.c:265
IfxSmu_getAlarm
IFX_EXTERN IfxSmu_Alarm IfxSmu_getAlarm(Ifx_SMU *smu)
Get the alarm flag.
Definition: IfxSmu.c:289
IfxSmu_Fsp_Mode_bistable
Bi-stable fault signalling protocol.
Definition: IfxSmu.h:99
IfxSmu_triggerAlarm
IFX_INLINE boolean IfxSmu_triggerAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm)
Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "A...
Definition: IfxSmu.h:304
IfxSmu_PinMap.h
SMU I/O map.
IfxSmu_AlarmConfig_nmi
Sends an NMI request to the SCU.
Definition: IfxSmu.h:79
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxSmu_configFsp::faultFreeStateFrequencyMin
float32 faultFreeStateFrequencyMin
Min fault free state frequency in Hz, only valid if mode=IfxSmu_Fsp_Mode_timeSwitching.
Definition: IfxSmu.h:117
IfxSmu_activateFsp
IFX_INLINE boolean IfxSmu_activateFsp(Ifx_SMU *smu)
Activates the Fault Signaling Protocol.
Definition: IfxSmu.h:335


iLLD_TC26B: IfxSmu_PinMap.c Source File

  • _PinMap
IfxSmu_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxSmu_PinMap.c
3 * \brief SMU I/O map
4 * \ingroup IfxLld_Smu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxSmu_PinMap.h"
44
45 IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT = {&MODULE_SMU, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};
46
47
48 const IfxSmu_Fsp_Out *IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS] = {
49 {
50 &IfxSmu_FSP_P33_8_OUT
51 }
52 };
IfxSmu_FSP_P33_8_OUT
IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT
Definition: IfxSmu_PinMap.c:45
IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS
#define IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS
Definition: IfxSmu_PinMap.h:66
IfxSmu_Fsp_Out_pinTable
const IfxSmu_Fsp_Out * IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]
Definition: IfxSmu_PinMap.c:48
IfxPort_OutputIdx_alt1
Definition: IfxPort.h:120
IfxSmu_Fsp_Out
Fault Signal Protocol Pin.
Definition: IfxSmu_PinMap.h:55
IfxSmu_PinMap.h
SMU I/O map.
IFXSMU_PINMAP_NUM_MODULES
#define IFXSMU_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxSmu_PinMap.h:65


iLLD_TC26B: IfxSmu_PinMap.h Source File

  • _PinMap
IfxSmu_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxSmu_PinMap.h
3 * \brief SMU I/O map
4 * \ingroup IfxLld_Smu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Smu_pinmap SMU Pin Mapping
42 * \ingroup IfxLld_Smu
43 */
44
45 #ifndef IFXSMU_PINMAP_H
46 #define IFXSMU_PINMAP_H
47
48 #include <IfxSmu_reg.h>
49 #include <Port/Std/IfxPort.h>
50
51 /** \addtogroup IfxLld_Smu_pinmap
52 * \{ */
53
54 /** \brief Fault Signal Protocol Pin */
55 typedef const struct
56 {
57 Ifx_SMU* module; /**< \brief Base address */
58 IfxPort_Pin pin; /**< \brief Port pin */
59 IfxPort_OutputIdx select; /**< \brief Port control code */
60 } IfxSmu_Fsp_Out;
61
62 IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT; /**< \brief SMU_FSP: SMU */
63
64 /** \brief Table dimensions */
65 #define IFXSMU_PINMAP_NUM_MODULES 1
66 #define IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS 1
67
68
69 /** \brief IfxSmu_Fsp_Out table */
70 IFX_EXTERN const IfxSmu_Fsp_Out *IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS];
71
72 /** \} */
73
74 #endif /* IFXSMU_PINMAP_H */
IfxSmu_Fsp_Out::module
Ifx_SMU * module
Base address.
Definition: IfxSmu_PinMap.h:57
IfxSmu_Fsp_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxSmu_PinMap.h:59
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxSmu_FSP_P33_8_OUT
IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT
SMU_FSP: SMU.
Definition: IfxSmu_PinMap.h:62
IfxSmu_Fsp_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxSmu_PinMap.h:58
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS
#define IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS
Definition: IfxSmu_PinMap.h:66
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IfxSmu_Fsp_Out_pinTable
IFX_EXTERN const IfxSmu_Fsp_Out * IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]
IfxSmu_Fsp_Out table.
Definition: IfxSmu_PinMap.h:70
IfxSmu_Fsp_Out
Fault Signal Protocol Pin.
Definition: IfxSmu_PinMap.h:55
IFXSMU_PINMAP_NUM_MODULES
#define IFXSMU_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxSmu_PinMap.h:65
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxSmu_cfg.c Source File

  • _Impl
IfxSmu_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxSmu_cfg.c
3 * \brief SMU on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxSmu_cfg.h"
IfxSmu_cfg.h
SMU on-chip implementation data.


iLLD_TC26B: IfxSmu_cfg.h Source File

  • _Impl
IfxSmu_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxSmu_cfg.h
3 * \brief SMU on-chip implementation data
4 * \ingroup IfxLld_Smu
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Smu SMU
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Smu_Impl Implementation
44 * \ingroup IfxLld_Smu
45 * \defgroup IfxLld_Smu_Std Standard Driver
46 * \ingroup IfxLld_Smu
47 * \defgroup IfxLld_Smu_Impl_Enum_AlarmGroup Alarm Group Enumeration
48 * \ingroup IfxLld_Smu_Impl
49 * \defgroup IfxLld_Smu_Impl_Enum_ListAlarms List of Alarms Enumeration
50 * \ingroup IfxLld_Smu_Impl
51 */
52
53 #ifndef IFXSMU_CFG_H
54 #define IFXSMU_CFG_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60
61 /******************************************************************************/
62 /*-----------------------------------Macros-----------------------------------*/
63 /******************************************************************************/
64
65 #define IFXSMU_NUM_MODULES (1)
66
67
68
69 /******************************************************************************/
70 /*--------------------------------Enumerations--------------------------------*/
71 /******************************************************************************/
72
73 /** \addtogroup IfxLld_Smu_Impl_Enum_AlarmGroup
74 * \{ */
75 /** \brief Alarm group
76 */
77 typedef enum
78 {
79 IfxSmu_AlarmGroup_0 = 0, /**< \brief Alarm group 0 */
80 IfxSmu_AlarmGroup_1, /**< \brief Alarm group 1 */
81 IfxSmu_AlarmGroup_2, /**< \brief Alarm group 2 */
82 IfxSmu_AlarmGroup_3, /**< \brief Alarm group 3 */
83 IfxSmu_AlarmGroup_4, /**< \brief Alarm group 4 */
84 IfxSmu_AlarmGroup_5, /**< \brief Alarm group 5 */
85 IfxSmu_AlarmGroup_6 /**< \brief Alarm group 6 */
86 } IfxSmu_AlarmGroup;
87
88 /** \brief Recovery Timer
89 */
90 typedef enum
91 {
92 IfxSmu_RecoveryTimer_0 = 0, /**< \brief Recovery Timer 0 */
93 IfxSmu_RecoveryTimer_1 /**< \brief Recovery Timer 1 */
94 } IfxSmu_RecoveryTimer;
95
96 /** \} */
97
98 /** \addtogroup IfxLld_Smu_Impl_Enum_ListAlarms
99 * \{ */
100 /** \brief SMU Alarm list
101 */
102 typedef enum
103 {
104 IfxSmu_Alarm_Cpu0LockstepComparatorError = (IfxSmu_AlarmGroup_0 << 8) | 0, /**< \brief CPU0 Lockstep Comparator Error */
105 IfxSmu_Alarm_Cpu0BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_0 << 8) | 1, /**< \brief CPU0 Bus-level MPU violation / Access Protection violation */
106 IfxSmu_Alarm_Cpu0PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 3, /**< \brief CPU0 PCACHE TAG uncorrectable error */
107 IfxSmu_Alarm_Cpu0PcacheTagAddressError = (IfxSmu_AlarmGroup_0 << 8) | 4, /**< \brief CPU0 PCACHE TAG address error */
108 IfxSmu_Alarm_Cpu0PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 5, /**< \brief CPU0 PCACHE TAG Address Buffer overflow */
109 IfxSmu_Alarm_Cpu0UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_0 << 8) | 6, /**< \brief CPU0 Unified PCACHE/PSPR single-bit correction */
110 IfxSmu_Alarm_Cpu0UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 7, /**< \brief CPU0 Unified PCACHE/PSPR uncorrectable error */
111 IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_0 << 8) | 8, /**< \brief CPU0 Unified PCACHE/PSPR Address error */
112 IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 9, /**< \brief CPU0 Unified PCACHE/PSPR Address Buffer overflow */
113 IfxSmu_Alarm_Cpu0UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_0 << 8) | 10, /**< \brief CPU0 Unified DCACHE/DSPR single-bit correction */
114 IfxSmu_Alarm_Cpu0UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 11, /**< \brief CPU0 Unified DCACHE/DSPR uncorrectable error */
115 IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_0 << 8) | 12, /**< \brief CPU0 Unified DCACHE/DSPR address error */
116 IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 13, /**< \brief CPU0 Unified DCACHE/DSPR Address Buffer overflow */
117 IfxSmu_Alarm_Cpu0CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_0 << 8) | 19, /**< \brief CPU0 CPU Data SRI Interface (Load/Store) EDC Error */
118 IfxSmu_Alarm_Cpu1LockstepComparatorError = (IfxSmu_AlarmGroup_1 << 8) |0, /**< \brief CPU1 Lockstep Comparator Error */
119 IfxSmu_Alarm_Cpu1BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_1 << 8) |1, /**< \brief CPU1 Bus-level MPU violation / Access Protection violation */
120 IfxSmu_Alarm_Cpu1PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |3, /**< \brief CPU1 PCACHE TAG uncorrectable error */
121 IfxSmu_Alarm_Cpu1PcacheTagAddressError = (IfxSmu_AlarmGroup_1 << 8) |4, /**< \brief CPU1 PCACHE TAG address error */
122 IfxSmu_Alarm_Cpu1PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |5, /**< \brief CPU1 PCACHE TAG Address Buffer overflow */
123 IfxSmu_Alarm_Cpu1UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_1 << 8) |6, /**< \brief CPU1 Unified PCACHE/PSPR single-bit correction */
124 IfxSmu_Alarm_Cpu1UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |7, /**< \brief CPU1 Unified PCACHE/PSPR uncorrectable error */
125 IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_1 << 8) |8, /**< \brief CPU1 Unified PCACHE/PSPR Address error */
126 IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |9, /**< \brief CPU1 Unified PCACHE/PSPR Address Buffer overflow */
127 IfxSmu_Alarm_Cpu1UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_1 << 8) |10, /**< \brief CPU1 Unified DCACHE/DSPR single-bit correction */
128 IfxSmu_Alarm_Cpu1UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |11, /**< \brief CPU1 Unified DCACHE/DSPR uncorrectable error */
129 IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_1 << 8) |12, /**< \brief CPU1 Unified DCACHE/DSPR address error */
130 IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |13, /**< \brief CPU1 Unified DCACHE/DSPR Address Buffer overflow */
131 IfxSmu_Alarm_Cpu1DcacheTagSramCorrection = (IfxSmu_AlarmGroup_1 << 8) |14, /**< \brief CPU1 DCACHE TAG SRAM correction */
132 IfxSmu_Alarm_Cpu1DcacheTagSramUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |15, /**< \brief CPU1 DCACHE TAG SRAM uncorrectable error */
133 IfxSmu_Alarm_Cpu1DcacheTagSramAddressError = (IfxSmu_AlarmGroup_1 << 8) |16, /**< \brief CPU1 DCACHE TAG SRAM address error */
134 IfxSmu_Alarm_Cpu1DcacheTagSramAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |17, /**< \brief CPU1 DCACHE TAG SRAM address buffer overflow */
135 IfxSmu_Alarm_Cpu1CpuInstructionFetchSRIInterfaceEdcError = (IfxSmu_AlarmGroup_1 << 8) |18, /**< \brief CPU1 CPU Instruction Fetch SRI Interface EDC Error */
136 IfxSmu_Alarm_Cpu1CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_1 << 8) |19, /**< \brief CPU1 CPU Data SRI Interface (Load/Store) EDC Error */
137 IfxSmu_Alarm_PmuSingleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 2, /**< \brief PMU single bit correction */
138 IfxSmu_Alarm_PmuDoubleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 3, /**< \brief PMU double bit correction */
139 IfxSmu_Alarm_PmuNonCorrectableMultipleBit = (IfxSmu_AlarmGroup_2 << 8) | 4, /**< \brief PMU non correctable multiple bit */
140 IfxSmu_Alarm_PmuAddressingError = (IfxSmu_AlarmGroup_2 << 8) | 5, /**< \brief PMU Addressing error */
141 IfxSmu_Alarm_PmuAddressBufferFull = (IfxSmu_AlarmGroup_2 << 8) | 6, /**< \brief PMU address buffer full */
142 IfxSmu_Alarm_PmuPflashEccError = (IfxSmu_AlarmGroup_2 << 8) | 7, /**< \brief PMU PFLASH ECC error */
143 IfxSmu_Alarm_PmuEdcComparatorError = (IfxSmu_AlarmGroup_2 << 8) | 8, /**< \brief PMU EDC comparator error */
144 IfxSmu_Alarm_LmuEccError = (IfxSmu_AlarmGroup_2 << 8) | 15, /**< \brief LMU ECC Error */
145 IfxSmu_Alarm_LmuRegisterAccessProtectionErrorBusLevelMpuError = (IfxSmu_AlarmGroup_2 << 8) | 16, /**< \brief LMU Register Access Protection error / Bus-level MPU error */
146 IfxSmu_Alarm_LmuSramSingleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 17, /**< \brief LMU SRAM single-bit correction */
147 IfxSmu_Alarm_LmuSramUncorrectableError = (IfxSmu_AlarmGroup_2 << 8) | 18, /**< \brief LMU SRAM uncorrectable error */
148 IfxSmu_Alarm_LmuSramAddressError = (IfxSmu_AlarmGroup_2 << 8) | 19, /**< \brief LMU SRAM Address error */
149 IfxSmu_Alarm_LmuSramAddressBufferOverflow = (IfxSmu_AlarmGroup_2 << 8) | 20, /**< \brief LMU SRAM Address buffer overflow */
150 IfxSmu_Alarm_SriEdcAddressPhaseError = (IfxSmu_AlarmGroup_2 << 8) | 21, /**< \brief SRI EDC Address phase error */
151 IfxSmu_Alarm_SriEdcWritePhaseError = (IfxSmu_AlarmGroup_2 << 8) | 22, /**< \brief SRI EDC Write phase error */
152 IfxSmu_Alarm_SriEdcReadPhaseError = (IfxSmu_AlarmGroup_2 << 8) | 23, /**< \brief SRI EDC Read phase error */
153 IfxSmu_Alarm_IrEdcError = (IfxSmu_AlarmGroup_2 << 8) | 25, /**< \brief IR EDC error */
154 IfxSmu_Alarm_IomPinMismatchIndication = (IfxSmu_AlarmGroup_2 << 8) | 26, /**< \brief IOM Pin Mismatch Indication */
155 IfxSmu_Alarm_SmuTimer0TimeOut = (IfxSmu_AlarmGroup_2 << 8) | 29, /**< \brief SMU Timer 0 time-out */
156 IfxSmu_Alarm_SmuTimer1TimeOut = (IfxSmu_AlarmGroup_2 << 8) | 30, /**< \brief SMU Timer 1 time-out */
157 IfxSmu_Alarm_SmuErrorPinFaultStateActivation = (IfxSmu_AlarmGroup_2 << 8) | 31, /**< \brief SMU ErrorPin Fault State Activation */
158 IfxSmu_Alarm_ScuCguInputClockOutOfRange = (IfxSmu_AlarmGroup_3 << 8) | 0, /**< \brief SCU/CGU input clock out of range */
159 IfxSmu_Alarm_ScuCguSystemPllVcoLossOfLockEvent = (IfxSmu_AlarmGroup_3 << 8) | 1, /**< \brief SCU/CGU System PLL VCO Loss-of-Lock Event */
160 IfxSmu_Alarm_ScuCguPll_ErayVcoLossOfLockEvent = (IfxSmu_AlarmGroup_3 << 8) | 2, /**< \brief SCU/CGU PLL_ERAY VCO Loss-of-Lock Event */
161 IfxSmu_Alarm_ScuCguStmClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 3, /**< \brief SCU/CGU STM clock out of range frequency */
162 IfxSmu_Alarm_ScuCguPll_ErayOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 4, /**< \brief SCU/CGU PLL_ERAY out of range frequency */
163 IfxSmu_Alarm_ScuCguSystemPLLOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 5, /**< \brief SCU/CGU System PLL out of range frequency */
164 IfxSmu_Alarm_ScuCguSriClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 6, /**< \brief SCU/CGU SRI clock out of range frequency */
165 IfxSmu_Alarm_ScuCguSpbClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 7, /**< \brief SCU/CGU SPB clock out of range frequency */
166 IfxSmu_Alarm_ScuCguGtmClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 8, /**< \brief SCU/CGU GTM clock out of range frequency */
167 IfxSmu_Alarm_ScuCguAdcClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 9, /**< \brief SCU/CGU ADC clock out of range frequency */
168 IfxSmu_Alarm_ScuEvrEvr1Dot3VUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 11, /**< \brief SCU/EVR EVR 1.3V under voltage */
169 IfxSmu_Alarm_ScuEvrEvr1Dot3VOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 12, /**< \brief SCU/EVR EVR 1.3V over voltage */
170 IfxSmu_Alarm_ScuEvrEvr3Dot3VUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 13, /**< \brief SCU/EVR EVR 3.3V under voltage */
171 IfxSmu_Alarm_ScuEvrEvr3Dot3VOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 14, /**< \brief SCU/EVR EVR 3.3V over voltage */
172 IfxSmu_Alarm_ScuEvrExternalSupplyUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 15, /**< \brief SCU/EVR External Supply under voltage */
173 IfxSmu_Alarm_ScuEVRExternalSupplyOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 16, /**< \brief SCU/EVR External Supply over voltage */
174 IfxSmu_Alarm_ScuWdtsWatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 17, /**< \brief SCU/WDTS watchdog time-out */
175 IfxSmu_Alarm_ScuWdtCpu0WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 18, /**< \brief SCU/WDTCPU0 watchdog time-out */
176 IfxSmu_Alarm_ScuWdtCpu1WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 19, /**< \brief SCU/WDTCPU1 watchdog time-out */
177 IfxSmu_Alarm_ScuWdtCpu2WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 20, /**< \brief SCU/WDTCPU2 watchdog time-out */
178 IfxSmu_Alarm_ScuWdtWatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 21, /**< \brief SCU/WDT watchdog time-out */
179 IfxSmu_Alarm_SpbAccessEnableError = (IfxSmu_AlarmGroup_3 << 8) | 22, /**< \brief SPB Access Enable Error */
180 IfxSmu_Alarm_ScuDtsTemperatureUnderflow = (IfxSmu_AlarmGroup_3 << 8) | 25, /**< \brief SCU/DTS Temperature underflow */
181 IfxSmu_Alarm_ScuDtsTemperatureOverflow = (IfxSmu_AlarmGroup_3 << 8) | 26, /**< \brief SCU/DTS Temperature overflow */
182 IfxSmu_Alarm_ScuExternalEmergencyStopSignal = (IfxSmu_AlarmGroup_3 << 8) | 29, /**< \brief SCU External Emergency Stop Signal */
183 IfxSmu_Alarm_SriBusError = (IfxSmu_AlarmGroup_3 << 8) | 30, /**< \brief SRI Bus error */
184 IfxSmu_Alarm_SpbBusError = (IfxSmu_AlarmGroup_3 << 8) | 31, /**< \brief SPB Bus error */
185 IfxSmu_Alarm_GtmSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 0, /**< \brief GTM SRAM single-bit correction */
186 IfxSmu_Alarm_GtmSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 1, /**< \brief GTM SRAM uncorrectable error */
187 IfxSmu_Alarm_GtmSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 2, /**< \brief GTM SRAM address error */
188 IfxSmu_Alarm_GtmSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 3, /**< \brief GTM SRAM Address Buffer overflow */
189 IfxSmu_Alarm_CanSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 4, /**< \brief CAN SRAM single-bit correction */
190 IfxSmu_Alarm_CanSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 5, /**< \brief CAN SRAM uncorrectable error */
191 IfxSmu_Alarm_CanSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 6, /**< \brief CAN SRAM address error */
192 IfxSmu_Alarm_CanSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 7, /**< \brief CAN SRAM Address Buffer overflow */
193 IfxSmu_Alarm_FlexraySramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 8, /**< \brief FLEXRAY SRAM single-bit correction */
194 IfxSmu_Alarm_FlexraySramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 9, /**< \brief FLEXRAY SRAM uncorrectable error */
195 IfxSmu_Alarm_FlexraySramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 10, /**< \brief FLEXRAY SRAM address error */
196 IfxSmu_Alarm_FlexraySramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 11, /**< \brief FLEXRAY SRAM Address Buffer overflow */
197 IfxSmu_Alarm_EmemSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 12, /**< \brief EMEM SRAM single-bit correction */
198 IfxSmu_Alarm_EmemSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 13, /**< \brief EMEM SRAM uncorrectable error */
199 IfxSmu_Alarm_EmemSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 15, /**< \brief EMEM SRAM Address Buffer overflow */
200 IfxSmu_Alarm_SramsSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 16, /**< \brief SRAMs SRAM single-bit correction */
201 IfxSmu_Alarm_SramsSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 17, /**< \brief SRAMs SRAM uncorrectable error */
202 IfxSmu_Alarm_SramsSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 18, /**< \brief SRAMs SRAM address error */
203 IfxSmu_Alarm_SramsSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 19, /**< \brief SRAMs SRAM Address Buffer overflow */
204 IfxSmu_Alarm_SoftwareAlarm0 = (IfxSmu_AlarmGroup_5 << 8) | 0, /**< \brief Software Alarm 0 */
205 IfxSmu_Alarm_SoftwareAlarm1 = (IfxSmu_AlarmGroup_5 << 8) | 1, /**< \brief Software Alarm 1 */
206 IfxSmu_Alarm_SoftwareAlarm2 = (IfxSmu_AlarmGroup_5 << 8) | 2, /**< \brief Software Alarm 2 */
207 IfxSmu_Alarm_SoftwareAlarm3 = (IfxSmu_AlarmGroup_5 << 8) | 3, /**< \brief Software Alarm 3 */
208 IfxSmu_Alarm_SoftwareAlarm4 = (IfxSmu_AlarmGroup_5 << 8) | 4, /**< \brief Software Alarm 4 */
209 IfxSmu_Alarm_SoftwareAlarm5 = (IfxSmu_AlarmGroup_5 << 8) | 5, /**< \brief Software Alarm 5 */
210 IfxSmu_Alarm_SoftwareAlarm6 = (IfxSmu_AlarmGroup_5 << 8) | 6, /**< \brief Software Alarm 6 */
211 IfxSmu_Alarm_SoftwareAlarm7 = (IfxSmu_AlarmGroup_5 << 8) | 7, /**< \brief Software Alarm 7 */
212 IfxSmu_Alarm_SoftwareAlarm8 = (IfxSmu_AlarmGroup_5 << 8) | 8, /**< \brief Software Alarm 8 */
213 IfxSmu_Alarm_SoftwareAlarm9 = (IfxSmu_AlarmGroup_5 << 8) | 9, /**< \brief Software Alarm 9 */
214 IfxSmu_Alarm_SoftwareAlarm10 = (IfxSmu_AlarmGroup_5 << 8) | 10, /**< \brief Software Alarm 10 */
215 IfxSmu_Alarm_SoftwareAlarm11 = (IfxSmu_AlarmGroup_5 << 8) | 11, /**< \brief Software Alarm 11 */
216 IfxSmu_Alarm_SoftwareAlarm12 = (IfxSmu_AlarmGroup_5 << 8) | 12, /**< \brief Software Alarm 12 */
217 IfxSmu_Alarm_SoftwareAlarm13 = (IfxSmu_AlarmGroup_5 << 8) | 13, /**< \brief Software Alarm 13 */
218 IfxSmu_Alarm_SoftwareAlarm14 = (IfxSmu_AlarmGroup_5 << 8) | 14, /**< \brief Software Alarm 14 */
219 IfxSmu_Alarm_SoftwareAlarm15 = (IfxSmu_AlarmGroup_5 << 8) | 15, /**< \brief Software Alarm 15 */
220 IfxSmu_Alarm_Cpu2BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_6 << 8) | 1, /**< \brief CPU2 Bus-level MPU violation / Access Protection violation */
221 IfxSmu_Alarm_Cpu2PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 3, /**< \brief CPU2 PCACHE TAG uncorrectable error */
222 IfxSmu_Alarm_Cpu2PcacheTagAddressError = (IfxSmu_AlarmGroup_6 << 8) | 4, /**< \brief CPU2 PCACHE TAG address error */
223 IfxSmu_Alarm_Cpu2PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 5, /**< \brief CPU2 PCACHE TAG Address Buffer overflow */
224 IfxSmu_Alarm_Cpu2UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 6, /**< \brief CPU2 Unified PCACHE/PSPR single-bit correction */
225 IfxSmu_Alarm_Cpu2UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 7, /**< \brief CPU2 Unified PCACHE/PSPR uncorrectable error */
226 IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_6 << 8) | 8, /**< \brief CPU2 Unified PCACHE/PSPR Address error */
227 IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 9, /**< \brief CPU2 Unified PCACHE/PSPR Address Buffer overflow */
228 IfxSmu_Alarm_Cpu2UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 10, /**< \brief CPU2 Unified DCACHE/DSPR single-bit correction */
229 IfxSmu_Alarm_Cpu2UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 11, /**< \brief CPU2 Unified DCACHE/DSPR uncorrectable error */
230 IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_6 << 8) | 12, /**< \brief CPU2 Unified DCACHE/DSPR address error */
231 IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 13, /**< \brief CPU2 Unified DCACHE/DSPR Address Buffer overflow */
232 IfxSmu_Alarm_Cpu2DcacheTagSramSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 14, /**< \brief CPU2 DCACHE TAG SRAM single-bit correction */
233 IfxSmu_Alarm_Cpu2DcacheTagSramUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 15, /**< \brief CPU2 DCACHE TAG SRAM uncorrectable error */
234 IfxSmu_Alarm_Cpu2DcacheTagSramAddressError = (IfxSmu_AlarmGroup_6 << 8) | 16, /**< \brief CPU2 DCACHE TAG SRAM Address error */
235 IfxSmu_Alarm_Cpu2DcacheTagSramAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 17, /**< \brief CPU2 DCACHE TAG SRAM Address buffer overflow */
236 IfxSmu_Alarm_Cpu2CpuInstructionFetchSRIInterfaceEdcError = (IfxSmu_AlarmGroup_6 << 8) | 18, /**< \brief CPU2 CPU Instruction Fetch SRI Interface EDC Error */
237 IfxSmu_Alarm_Cpu2CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_6 << 8) | 19, /**< \brief CPU2 CPU Data SRI Interface (Load/Store) EDC Error */
238 IfxSmu_Alarm_noAlarm /**< \brief Special flag to inform about no alarm (Software only) */
239 } IfxSmu_Alarm;
240
241 /** \} */
242
243
244 #endif /* IFXSMU_CFG_H */
IfxSmu_Alarm_SoftwareAlarm5
Software Alarm 5.
Definition: IfxSmu_cfg.h:209
IfxSmu_Alarm_ScuExternalEmergencyStopSignal
SCU External Emergency Stop Signal.
Definition: IfxSmu_cfg.h:182
IfxSmu_Alarm_FlexraySramAddressError
FLEXRAY SRAM address error.
Definition: IfxSmu_cfg.h:195
IfxSmu_Alarm_ScuEvrEvr3Dot3VOverVoltage
SCU/EVR EVR 3.3V over voltage.
Definition: IfxSmu_cfg.h:171
IfxSmu_Alarm_CanSramSingleBitCorrection
CAN SRAM single-bit correction.
Definition: IfxSmu_cfg.h:189
IfxSmu_Alarm_EmemSramAddressBufferOverflow
EMEM SRAM Address Buffer overflow.
Definition: IfxSmu_cfg.h:199
IfxSmu_Alarm_ScuCguStmClockOutOfRangeFrequency
SCU/CGU STM clock out of range frequency.
Definition: IfxSmu_cfg.h:161
IfxSmu_Alarm_SpbAccessEnableError
SPB Access Enable Error.
Definition: IfxSmu_cfg.h:179
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprSingleBitCorrection
CPU2 Unified DCACHE/DSPR single-bit correction.
Definition: IfxSmu_cfg.h:228
IfxSmu_Alarm_SpbBusError
SPB Bus error.
Definition: IfxSmu_cfg.h:184
IfxSmu_Alarm_Cpu0LockstepComparatorError
CPU0 Lockstep Comparator Error.
Definition: IfxSmu_cfg.h:104
IfxSmu_Alarm_Cpu2BusLevelMpuViolationAccessProtection
CPU2 Bus-level MPU violation / Access Protection violation.
Definition: IfxSmu_cfg.h:220
IfxSmu_Alarm_SoftwareAlarm7
Software Alarm 7.
Definition: IfxSmu_cfg.h:211
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprUncorrectableError
CPU2 Unified DCACHE/DSPR uncorrectable error.
Definition: IfxSmu_cfg.h:229
IfxSmu_Alarm_FlexraySramUncorrectableError
FLEXRAY SRAM uncorrectable error.
Definition: IfxSmu_cfg.h:194
IfxSmu_Alarm_SoftwareAlarm8
Software Alarm 8.
Definition: IfxSmu_cfg.h:212
IfxSmu_Alarm_Cpu0PcacheTagUncorrectableError
CPU0 PCACHE TAG uncorrectable error.
Definition: IfxSmu_cfg.h:106
IfxSmu_Alarm_ScuWdtCpu1WatchdogTimeOut
SCU/WDTCPU1 watchdog time-out.
Definition: IfxSmu_cfg.h:176
IfxSmu_Alarm_GtmSramSingleBitCorrection
GTM SRAM single-bit correction.
Definition: IfxSmu_cfg.h:185
IfxSmu_Alarm_SoftwareAlarm3
Software Alarm 3.
Definition: IfxSmu_cfg.h:207
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprUncorrectableError
CPU1 Unified DCACHE/DSPR uncorrectable error.
Definition: IfxSmu_cfg.h:128
IfxSmu_Alarm_GtmSramAddressBufferOverflow
GTM SRAM Address Buffer overflow.
Definition: IfxSmu_cfg.h:188
IfxSmu_Alarm_SriEdcWritePhaseError
SRI EDC Write phase error.
Definition: IfxSmu_cfg.h:151
IfxSmu_Alarm_PmuSingleBitCorrection
PMU single bit correction.
Definition: IfxSmu_cfg.h:137
IfxSmu_Alarm_Cpu2PcacheTagAddressBufferOverflow
CPU2 PCACHE TAG Address Buffer overflow.
Definition: IfxSmu_cfg.h:223
IfxSmu_Alarm_SoftwareAlarm4
Software Alarm 4.
Definition: IfxSmu_cfg.h:208
IfxSmu_Alarm_SramsSramUncorrectableError
SRAMs SRAM uncorrectable error.
Definition: IfxSmu_cfg.h:201
IfxSmu_Alarm_Cpu0BusLevelMpuViolationAccessProtection
CPU0 Bus-level MPU violation / Access Protection violation.
Definition: IfxSmu_cfg.h:105
IfxSmu_Alarm_SoftwareAlarm0
Software Alarm 0.
Definition: IfxSmu_cfg.h:204
IfxSmu_Alarm_PmuDoubleBitCorrection
PMU double bit correction.
Definition: IfxSmu_cfg.h:138
IfxSmu_Alarm_CanSramAddressError
CAN SRAM address error.
Definition: IfxSmu_cfg.h:191
IfxSmu_Alarm_Cpu0UnifiedPcachePsprUncorrectableError
CPU0 Unified PCACHE/PSPR uncorrectable error.
Definition: IfxSmu_cfg.h:110
IfxSmu_Alarm_PmuNonCorrectableMultipleBit
PMU non correctable multiple bit.
Definition: IfxSmu_cfg.h:139
IfxSmu_Alarm_ScuCguSriClockOutOfRangeFrequency
SCU/CGU SRI clock out of range frequency.
Definition: IfxSmu_cfg.h:164
IfxSmu_Alarm_IrEdcError
IR EDC error.
Definition: IfxSmu_cfg.h:153
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressBufferOverflow
CPU2 Unified DCACHE/DSPR Address Buffer overflow.
Definition: IfxSmu_cfg.h:231
IfxSmu_AlarmGroup_0
Alarm group 0.
Definition: IfxSmu_cfg.h:79
IfxSmu_Alarm_Cpu2CpuInstructionFetchSRIInterfaceEdcError
CPU2 CPU Instruction Fetch SRI Interface EDC Error.
Definition: IfxSmu_cfg.h:236
IfxSmu_Alarm_Cpu1BusLevelMpuViolationAccessProtection
CPU1 Bus-level MPU violation / Access Protection violation.
Definition: IfxSmu_cfg.h:119
IfxSmu_Alarm_PmuPflashEccError
PMU PFLASH ECC error.
Definition: IfxSmu_cfg.h:142
IfxSmu_Alarm_ScuCguInputClockOutOfRange
SCU/CGU input clock out of range.
Definition: IfxSmu_cfg.h:158
IfxSmu_Alarm_SmuTimer1TimeOut
SMU Timer 1 time-out.
Definition: IfxSmu_cfg.h:156
IfxSmu_Alarm_SoftwareAlarm11
Software Alarm 11.
Definition: IfxSmu_cfg.h:215
IfxSmu_RecoveryTimer_0
Recovery Timer 0.
Definition: IfxSmu_cfg.h:92
IfxSmu_Alarm_Cpu2DcacheTagSramAddressBufferOverflow
CPU2 DCACHE TAG SRAM Address buffer overflow.
Definition: IfxSmu_cfg.h:235
IfxSmu_Alarm_LmuEccError
LMU ECC Error.
Definition: IfxSmu_cfg.h:144
IfxSmu_Alarm_LmuSramAddressError
LMU SRAM Address error.
Definition: IfxSmu_cfg.h:148
IfxSmu_Alarm_Cpu0UnifiedPcachePsprSingleBitCorrection
CPU0 Unified PCACHE/PSPR single-bit correction.
Definition: IfxSmu_cfg.h:109
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressBufferOverflow
CPU1 Unified DCACHE/DSPR Address Buffer overflow.
Definition: IfxSmu_cfg.h:130
IfxSmu_Alarm_Cpu2DcacheTagSramSingleBitCorrection
CPU2 DCACHE TAG SRAM single-bit correction.
Definition: IfxSmu_cfg.h:232
IfxSmu_RecoveryTimer
IfxSmu_RecoveryTimer
Recovery Timer
Definition: IfxSmu_cfg.h:90
IfxSmu_Alarm_IomPinMismatchIndication
IOM Pin Mismatch Indication.
Definition: IfxSmu_cfg.h:154
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressBufferOverflow
CPU0 Unified DCACHE/DSPR Address Buffer overflow.
Definition: IfxSmu_cfg.h:116
IfxSmu_Alarm_SoftwareAlarm6
Software Alarm 6.
Definition: IfxSmu_cfg.h:210
IfxSmu_Alarm_Cpu0CpuDataSriInterfaceEdcError
CPU0 CPU Data SRI Interface (Load/Store) EDC Error.
Definition: IfxSmu_cfg.h:117
IfxSmu_AlarmGroup_3
Alarm group 3.
Definition: IfxSmu_cfg.h:82
IfxSmu_AlarmGroup_4
Alarm group 4.
Definition: IfxSmu_cfg.h:83
IfxSmu_Alarm_Cpu2DcacheTagSramUncorrectableError
CPU2 DCACHE TAG SRAM uncorrectable error.
Definition: IfxSmu_cfg.h:233
IfxSmu_Alarm_GtmSramAddressError
GTM SRAM address error.
Definition: IfxSmu_cfg.h:187
IfxSmu_Alarm_Cpu1CpuDataSriInterfaceEdcError
CPU1 CPU Data SRI Interface (Load/Store) EDC Error.
Definition: IfxSmu_cfg.h:136
IfxSmu_Alarm_CanSramAddressBufferOverflow
CAN SRAM Address Buffer overflow.
Definition: IfxSmu_cfg.h:192
IfxSmu_Alarm_Cpu1LockstepComparatorError
CPU1 Lockstep Comparator Error.
Definition: IfxSmu_cfg.h:118
IfxSmu_Alarm_CanSramUncorrectableError
CAN SRAM uncorrectable error.
Definition: IfxSmu_cfg.h:190
IfxSmu_AlarmGroup_5
Alarm group 5.
Definition: IfxSmu_cfg.h:84
IfxSmu_Alarm_SoftwareAlarm13
Software Alarm 13.
Definition: IfxSmu_cfg.h:217
IfxSmu_Alarm
IfxSmu_Alarm
SMU Alarm list
Definition: IfxSmu_cfg.h:102
IfxSmu_Alarm_ScuDtsTemperatureUnderflow
SCU/DTS Temperature underflow.
Definition: IfxSmu_cfg.h:180
IfxSmu_Alarm_Cpu2PcacheTagAddressError
CPU2 PCACHE TAG address error.
Definition: IfxSmu_cfg.h:222
IfxSmu_Alarm_SoftwareAlarm1
Software Alarm 1.
Definition: IfxSmu_cfg.h:205
IfxSmu_Alarm_ScuCguAdcClockOutOfRangeFrequency
SCU/CGU ADC clock out of range frequency.
Definition: IfxSmu_cfg.h:167
IfxSmu_Alarm_ScuWdtsWatchdogTimeOut
SCU/WDTS watchdog time-out.
Definition: IfxSmu_cfg.h:174
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressError
CPU0 Unified DCACHE/DSPR address error.
Definition: IfxSmu_cfg.h:115
IfxSmu_Alarm_SoftwareAlarm12
Software Alarm 12.
Definition: IfxSmu_cfg.h:216
IfxSmu_Alarm_LmuSramSingleBitCorrection
LMU SRAM single-bit correction.
Definition: IfxSmu_cfg.h:146
IfxSmu_Alarm_GtmSramUncorrectableError
GTM SRAM uncorrectable error.
Definition: IfxSmu_cfg.h:186
IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressError
CPU1 Unified PCACHE/PSPR Address error.
Definition: IfxSmu_cfg.h:125
IfxSmu_Alarm_Cpu1DcacheTagSramAddressError
CPU1 DCACHE TAG SRAM address error.
Definition: IfxSmu_cfg.h:133
IfxSmu_Alarm_ScuDtsTemperatureOverflow
SCU/DTS Temperature overflow.
Definition: IfxSmu_cfg.h:181
IfxSmu_Alarm_Cpu1DcacheTagSramAddressBufferOverflow
CPU1 DCACHE TAG SRAM address buffer overflow.
Definition: IfxSmu_cfg.h:134
IfxSmu_Alarm_LmuSramAddressBufferOverflow
LMU SRAM Address buffer overflow.
Definition: IfxSmu_cfg.h:149
IfxSmu_Alarm_Cpu1CpuInstructionFetchSRIInterfaceEdcError
CPU1 CPU Instruction Fetch SRI Interface EDC Error.
Definition: IfxSmu_cfg.h:135
IfxSmu_Alarm_SramsSramSingleBitCorrection
SRAMs SRAM single-bit correction.
Definition: IfxSmu_cfg.h:200
IfxSmu_Alarm_Cpu0PcacheTagAddressBufferOverflow
CPU0 PCACHE TAG Address Buffer overflow.
Definition: IfxSmu_cfg.h:108
IfxSmu_Alarm_LmuSramUncorrectableError
LMU SRAM uncorrectable error.
Definition: IfxSmu_cfg.h:147
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprUncorrectableError
CPU0 Unified DCACHE/DSPR uncorrectable error.
Definition: IfxSmu_cfg.h:114
IfxSmu_Alarm_Cpu2UnifiedPcachePsprUncorrectableError
CPU2 Unified PCACHE/PSPR uncorrectable error.
Definition: IfxSmu_cfg.h:225
IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressBufferOverflow
CPU2 Unified PCACHE/PSPR Address Buffer overflow.
Definition: IfxSmu_cfg.h:227
IfxSmu_Alarm_PmuAddressBufferFull
PMU address buffer full.
Definition: IfxSmu_cfg.h:141
IfxSmu_Alarm_SriEdcReadPhaseError
SRI EDC Read phase error.
Definition: IfxSmu_cfg.h:152
IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressBufferOverflow
CPU1 Unified PCACHE/PSPR Address Buffer overflow.
Definition: IfxSmu_cfg.h:126
IfxSmu_Alarm_FlexraySramSingleBitCorrection
FLEXRAY SRAM single-bit correction.
Definition: IfxSmu_cfg.h:193
IfxSmu_Alarm_PmuAddressingError
PMU Addressing error.
Definition: IfxSmu_cfg.h:140
IfxSmu_Alarm_Cpu1UnifiedPcachePsprSingleBitCorrection
CPU1 Unified PCACHE/PSPR single-bit correction.
Definition: IfxSmu_cfg.h:123
IfxSmu_Alarm_Cpu0PcacheTagAddressError
CPU0 PCACHE TAG address error.
Definition: IfxSmu_cfg.h:107
IfxSmu_AlarmGroup_2
Alarm group 2.
Definition: IfxSmu_cfg.h:81
IfxSmu_Alarm_Cpu2DcacheTagSramAddressError
CPU2 DCACHE TAG SRAM Address error.
Definition: IfxSmu_cfg.h:234
IfxSmu_Alarm_ScuCguSystemPllVcoLossOfLockEvent
SCU/CGU System PLL VCO Loss-of-Lock Event.
Definition: IfxSmu_cfg.h:159
IfxSmu_Alarm_Cpu1PcacheTagUncorrectableError
CPU1 PCACHE TAG uncorrectable error.
Definition: IfxSmu_cfg.h:120
IfxSmu_Alarm_FlexraySramAddressBufferOverflow
FLEXRAY SRAM Address Buffer overflow.
Definition: IfxSmu_cfg.h:196
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressError
CPU1 Unified DCACHE/DSPR address error.
Definition: IfxSmu_cfg.h:129
IfxSmu_Alarm_ScuEvrExternalSupplyUnderVoltage
SCU/EVR External Supply under voltage.
Definition: IfxSmu_cfg.h:172
IfxSmu_Alarm_ScuWdtWatchdogTimeOut
SCU/WDT watchdog time-out.
Definition: IfxSmu_cfg.h:178
IfxSmu_Alarm_Cpu1PcacheTagAddressError
CPU1 PCACHE TAG address error.
Definition: IfxSmu_cfg.h:121
IfxSmu_Alarm_ScuCguPll_ErayVcoLossOfLockEvent
SCU/CGU PLL_ERAY VCO Loss-of-Lock Event.
Definition: IfxSmu_cfg.h:160
IfxSmu_Alarm_SriBusError
SRI Bus error.
Definition: IfxSmu_cfg.h:183
IfxSmu_Alarm_ScuCguPll_ErayOutOfRangeFrequency
SCU/CGU PLL_ERAY out of range frequency.
Definition: IfxSmu_cfg.h:162
IfxSmu_RecoveryTimer_1
Recovery Timer 1.
Definition: IfxSmu_cfg.h:93
IfxSmu_Alarm_SriEdcAddressPhaseError
SRI EDC Address phase error.
Definition: IfxSmu_cfg.h:150
IfxSmu_Alarm_Cpu2CpuDataSriInterfaceEdcError
CPU2 CPU Data SRI Interface (Load/Store) EDC Error.
Definition: IfxSmu_cfg.h:237
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressError
CPU2 Unified DCACHE/DSPR address error.
Definition: IfxSmu_cfg.h:230
IfxSmu_Alarm_ScuCguSystemPLLOutOfRangeFrequency
SCU/CGU System PLL out of range frequency.
Definition: IfxSmu_cfg.h:163
IfxSmu_Alarm_Cpu1PcacheTagAddressBufferOverflow
CPU1 PCACHE TAG Address Buffer overflow.
Definition: IfxSmu_cfg.h:122
IfxSmu_Alarm_EmemSramSingleBitCorrection
EMEM SRAM single-bit correction.
Definition: IfxSmu_cfg.h:197
IfxSmu_Alarm_EmemSramUncorrectableError
EMEM SRAM uncorrectable error.
Definition: IfxSmu_cfg.h:198
IfxSmu_Alarm_SramsSramAddressError
SRAMs SRAM address error.
Definition: IfxSmu_cfg.h:202
IfxSmu_Alarm_SramsSramAddressBufferOverflow
SRAMs SRAM Address Buffer overflow.
Definition: IfxSmu_cfg.h:203
IfxSmu_AlarmGroup
IfxSmu_AlarmGroup
Alarm group
Definition: IfxSmu_cfg.h:77
IfxSmu_Alarm_ScuEvrEvr1Dot3VOverVoltage
SCU/EVR EVR 1.3V over voltage.
Definition: IfxSmu_cfg.h:169
IfxSmu_Alarm_SoftwareAlarm2
Software Alarm 2.
Definition: IfxSmu_cfg.h:206
IfxSmu_Alarm_ScuEVRExternalSupplyOverVoltage
SCU/EVR External Supply over voltage.
Definition: IfxSmu_cfg.h:173
IfxSmu_Alarm_ScuCguSpbClockOutOfRangeFrequency
SCU/CGU SPB clock out of range frequency.
Definition: IfxSmu_cfg.h:165
IfxSmu_Alarm_SoftwareAlarm10
Software Alarm 10.
Definition: IfxSmu_cfg.h:214
IfxSmu_Alarm_noAlarm
Special flag to inform about no alarm (Software only)
Definition: IfxSmu_cfg.h:238
IfxSmu_Alarm_Cpu2PcacheTagUncorrectableError
CPU2 PCACHE TAG uncorrectable error.
Definition: IfxSmu_cfg.h:221
IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressError
CPU0 Unified PCACHE/PSPR Address error.
Definition: IfxSmu_cfg.h:111
IfxSmu_Alarm_SmuTimer0TimeOut
SMU Timer 0 time-out.
Definition: IfxSmu_cfg.h:155
IfxSmu_Alarm_ScuEvrEvr3Dot3VUnderVoltage
SCU/EVR EVR 3.3V under voltage.
Definition: IfxSmu_cfg.h:170
IfxSmu_Alarm_ScuWdtCpu2WatchdogTimeOut
SCU/WDTCPU2 watchdog time-out.
Definition: IfxSmu_cfg.h:177
IfxSmu_Alarm_ScuWdtCpu0WatchdogTimeOut
SCU/WDTCPU0 watchdog time-out.
Definition: IfxSmu_cfg.h:175
IfxSmu_Alarm_Cpu1DcacheTagSramCorrection
CPU1 DCACHE TAG SRAM correction.
Definition: IfxSmu_cfg.h:131
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprSingleBitCorrection
CPU1 Unified DCACHE/DSPR single-bit correction.
Definition: IfxSmu_cfg.h:127
IfxSmu_Alarm_Cpu2UnifiedPcachePsprSingleBitCorrection
CPU2 Unified PCACHE/PSPR single-bit correction.
Definition: IfxSmu_cfg.h:224
IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressBufferOverflow
CPU0 Unified PCACHE/PSPR Address Buffer overflow.
Definition: IfxSmu_cfg.h:112
IfxSmu_Alarm_SoftwareAlarm9
Software Alarm 9.
Definition: IfxSmu_cfg.h:213
IfxSmu_Alarm_ScuCguGtmClockOutOfRangeFrequency
SCU/CGU GTM clock out of range frequency.
Definition: IfxSmu_cfg.h:166
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprSingleBitCorrection
CPU0 Unified DCACHE/DSPR single-bit correction.
Definition: IfxSmu_cfg.h:113
IfxSmu_Alarm_LmuRegisterAccessProtectionErrorBusLevelMpuError
LMU Register Access Protection error / Bus-level MPU error.
Definition: IfxSmu_cfg.h:145
IfxSmu_Alarm_SoftwareAlarm14
Software Alarm 14.
Definition: IfxSmu_cfg.h:218
IfxSmu_Alarm_Cpu1DcacheTagSramUncorrectableError
CPU1 DCACHE TAG SRAM uncorrectable error.
Definition: IfxSmu_cfg.h:132
IfxSmu_Alarm_ScuEvrEvr1Dot3VUnderVoltage
SCU/EVR EVR 1.3V under voltage.
Definition: IfxSmu_cfg.h:168
IfxSmu_AlarmGroup_1
Alarm group 1.
Definition: IfxSmu_cfg.h:80
IfxSmu_Alarm_SmuErrorPinFaultStateActivation
SMU ErrorPin Fault State Activation.
Definition: IfxSmu_cfg.h:157
IfxSmu_AlarmGroup_6
Alarm group 6.
Definition: IfxSmu_cfg.h:85
IfxSmu_Alarm_Cpu1UnifiedPcachePsprUncorrectableError
CPU1 Unified PCACHE/PSPR uncorrectable error.
Definition: IfxSmu_cfg.h:124
IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressError
CPU2 Unified PCACHE/PSPR Address error.
Definition: IfxSmu_cfg.h:226
IfxSmu_Alarm_SoftwareAlarm15
Software Alarm 15.
Definition: IfxSmu_cfg.h:219
IfxSmu_Alarm_PmuEdcComparatorError
PMU EDC comparator error.
Definition: IfxSmu_cfg.h:143


iLLD_TC26B: IfxSrc.c Source File

  • Src
  • Std
IfxSrc.c
Go to the documentation of this file.
1 /**
2 * \file IfxSrc.c
3 * \brief SRC basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxSrc.h"
IfxSrc.h
SRC basic functionality.


iLLD_TC26B: IfxSrc.h Source File

  • Src
  • Std
IfxSrc.h
Go to the documentation of this file.
1 /**
2 * \file IfxSrc.h
3 * \brief SRC basic functionality
4 * \ingroup IfxLld_Src
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Src SRC
42 * \addtogroup IfxLld_Src
43 * \{
44 * \defgroup IfxLld_Src_Usage How to use Service Request Mechanism?
45 * \addtogroup IfxLld_Src_Usage
46 * \{
47 *
48 * For Aurix controller peripherals that can generate service requests is connected to one
49 * or more Service Request Nodes (SRNs) in the central Interrupt Router(IR) module. Refer to Controller User Manual for more details\n
50 *
51 * IfxSrc driver provides the APIs to configure and control service requests. Refer \ref IfxLld_Src_Usage for
52 * details of these APIs.
53 *
54 *
55 * \section Ifx_Src_UsageInit Initialize the Service Request Node
56 *
57 * Service request node is initialized to configure the following,\n
58 * 1) Route the interrupt trigger to service provider, which are:\n
59 * __a. One of the available CPUs or\n
60 * __b. DMA controller\n
61 *
62 * 2) Priority of CPU Interrupt or DMA Trigger.
63 *
64 * For Interrupt or DMA to be correctly triggered, following steps are to be done in the user code:
65 *
66 * \subsection Ifx_Src_UsageInitStep1 Step1: Configure the Node
67 *
68 * User must configure the service request node in the application / driver files.
69 *
70 * \subsection Ifx_Src_UsageInitStep2 Step2: Enable the Trigger
71 *
72 * Enable the service request node to connect the trigger event from the hardware to service provider.
73 *
74 * Example:
75 * Following example show the configuration for STM0 Service request 0 trigger configured to trigger
76 * CPU1 with the priority specified by IFX_INTPRIO_STM0 (from the example at IfxCpu_Irq)
77 *
78 * \code
79 * //file: myApplication.c
80 *
81 * #include "Ifx_IntPrioDef.h" // to get the priority numbers
82 *
83 * void myDriverInitFunction(void)
84 * {
85 * // driver init code
86 *
87 * // Step1: Call the function to route the trigger from for SRC_STM0_SR0 to CPU1
88 * // and priority specified at Ifx_IntPrioDef.h globally
89 * IfxSrc_init(&MODULE_SRC.STM.STM[0].SR0, IfxSrc_Tos_cpu1, IFX_INTPRIO_STM0);
90 *
91 * // Step2: Enable the service request node
92 * IfxSrc_init(&MODULE_SRC.STM.STM[0].SR0);
93 * }
94 * \endcode
95 *
96 * \}
97 * \}
98 *
99 * \defgroup IfxLld_Src_Std_Service_Request Service Request Functions
100 * \ingroup IfxLld_Src_Std
101 * \defgroup IfxLld_Src_Std_Module Module Functions
102 * \ingroup IfxLld_Src_Std
103 */
104
105 #ifndef IFXSRC_H
106 #define IFXSRC_H 1
107
108 /******************************************************************************/
109 /*----------------------------------Includes----------------------------------*/
110 /******************************************************************************/
111
112 #include "_Impl/IfxSrc_cfg.h"
113 #include "Cpu/Std/IfxCpu_Intrinsics.h"
114 #include "IfxSrc_reg.h"
115 /** \addtogroup IfxLld_Src_Std_Service_Request
116 * \{ */
117
118 /******************************************************************************/
119 /*-------------------------Inline Function Prototypes-------------------------*/
120 /******************************************************************************/
121
122 /** \brief Resets the overrun flag of the Service Request.
123 * \param src pointer to the Service Request Control register which the overrun flag should be cleared.
124 * \return None
125 *
126 * Usage example: see \ref IfxSrc_init
127 *
128 */
129 IFX_INLINE void IfxSrc_clearOverrun(volatile Ifx_SRC_SRCR *src);
130
131 /** \brief Resets a specific interrupt service by software.
132 * \param src pointer to the Service Request Control register which the request should be cleared.
133 * \return None
134 *
135 * Usage example: see \ref IfxSrc_init
136 *
137 */
138 IFX_INLINE void IfxSrc_clearRequest(volatile Ifx_SRC_SRCR *src);
139
140 /** \brief Gets the current overrun status.
141 * \param src pointer to the Service Request Control register for which the overrun status should be returned.
142 * \return current service request control overrun status.
143 *
144 * Usage example: see \ref IfxSrc_init
145 *
146 */
147 IFX_INLINE boolean IfxSrc_isOverrun(volatile Ifx_SRC_SRCR *src);
148
149 /** \brief Gets the current request status.
150 * \param src pointer to the Service Request Control register for which the request status should be returned.
151 * \return current service request control request status.
152 *
153 * Usage example: see \ref IfxSrc_init
154 *
155 */
156 IFX_INLINE boolean IfxSrc_isRequested(volatile Ifx_SRC_SRCR *src);
157
158 /** \brief Requests a specific interrupt service by software
159 * \param src pointer to the Service Request Control register which the interrupt has to be requested.
160 * \return None
161 *
162 * Usage example: see \ref IfxSrc_init
163 *
164 */
165 IFX_INLINE void IfxSrc_setRequest(volatile Ifx_SRC_SRCR *src);
166
167 /** \} */
168
169 /** \addtogroup IfxLld_Src_Std_Module
170 * \{ */
171
172 /******************************************************************************/
173 /*-------------------------Inline Function Prototypes-------------------------*/
174 /******************************************************************************/
175
176 /** \brief DeInitializes the service request control register.
177 * \param src pointer to the Service Request Control register which should be deinitialised.
178 * \return None
179 *
180 * Usage example: see \ref IfxSrc_init
181 *
182 */
183 IFX_INLINE void IfxSrc_deinit(volatile Ifx_SRC_SRCR *src);
184
185 /** \brief Disables a specific interrupt service request.
186 * \param src pointer to the Service Request Control register for which the interrupt has to be disabled.
187 * \return None
188 *
189 * Usage example: see \ref IfxSrc_init
190 *
191 */
192 IFX_INLINE void IfxSrc_disable(volatile Ifx_SRC_SRCR *src);
193
194 /** \brief Enables a specific interrupt service request.
195 * \param src pointer to the Service Request Control register for which the interrupt has to be enabled.
196 * \return None
197 *
198 * Usage example: see \ref IfxSrc_init
199 *
200 */
201 IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src);
202
203 /** \brief Initializes the service request control register.
204 * \param src pointer to the Service Request Control register which should be initialised.
205 * \param typOfService type of interrupt service provider.
206 * \param priority Interrupt priority.
207 * \return None
208 *
209 * Get the peripheral service control register which request need to be serviced and assign this service to any of service providers.
210 * \code
211 * //define the interrupt priority
212 * #define IFXASCLIN0_TX_INTPRIO 2
213 * //get the service request
214 * volatile Ifx_SRC_SRCR *src = IfxAsclin_getSrcPointerRx( &MODULE_ASCLIN0 );
215 * //initlaise the service request
216 * IfxSrc_init( src, IfxSrc_Tos_cpu0, IFXASCLIN0_TX_INTPRIO );
217 * // enable the service
218 * IfxSrc_enable( src );
219 * //check for service request flags and clear if they occur
220 * if ( IfxSrc_isRequested( src ) == TRUE )
221 * {
222 * IfxSrc_clearRequest( src );
223 * }
224 * if ( IfxSrc_isOverrun( src ) == TRUE )
225 * {
226 * IfxSrc_clearOverrun( src );
227 * }
228 * // Atlast deinitialise the service control
229 * IfxSrc_deinit( src );
230 * \endcode
231 *
232 */
233 IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority);
234
235 /** \} */
236
237 /******************************************************************************/
238 /*---------------------Inline Function Implementations------------------------*/
239 /******************************************************************************/
240
241 IFX_INLINE void IfxSrc_clearOverrun(volatile Ifx_SRC_SRCR *src)
242 {
243 src->B.IOVCLR = 1;
244 }
245
246
247 IFX_INLINE void IfxSrc_clearRequest(volatile Ifx_SRC_SRCR *src)
248 {
249 src->B.CLRR = 1;
250 }
251
252
253 IFX_INLINE void IfxSrc_deinit(volatile Ifx_SRC_SRCR *src)
254 {
255 src->U = 0;
256 }
257
258
259 IFX_INLINE void IfxSrc_disable(volatile Ifx_SRC_SRCR *src)
260 {
261 src->B.SRE = 0;
262 }
263
264
265 IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
266 {
267 src->B.SRE = 1;
268 }
269
270
271 IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
272 {
273 src->B.SRPN = priority;
274 src->B.TOS = typOfService;
275 IfxSrc_clearRequest(src);
276 }
277
278
279 IFX_INLINE boolean IfxSrc_isOverrun(volatile Ifx_SRC_SRCR *src)
280 {
281 return src->B.IOV ? TRUE : FALSE;
282 }
283
284
285 IFX_INLINE boolean IfxSrc_isRequested(volatile Ifx_SRC_SRCR *src)
286 {
287 return src->B.SRR ? TRUE : FALSE;
288 }
289
290
291 IFX_INLINE void IfxSrc_setRequest(volatile Ifx_SRC_SRCR *src)
292 {
293 src->B.SETR = 1;
294 }
295
296
297 #endif /* IFXSRC_H */
IfxSrc_clearOverrun
IFX_INLINE void IfxSrc_clearOverrun(volatile Ifx_SRC_SRCR *src)
Resets the overrun flag of the Service Request.
Definition: IfxSrc.h:241
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxSrc_disable
IFX_INLINE void IfxSrc_disable(volatile Ifx_SRC_SRCR *src)
Disables a specific interrupt service request.
Definition: IfxSrc.h:259
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxCpu_Intrinsics.h
FALSE
#define FALSE
Definition: Platform_Types.h:93
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxSrc_deinit
IFX_INLINE void IfxSrc_deinit(volatile Ifx_SRC_SRCR *src)
DeInitializes the service request control register.
Definition: IfxSrc.h:253
IfxSrc_cfg.h
SRC on-chip implementation data.
IfxSrc_isRequested
IFX_INLINE boolean IfxSrc_isRequested(volatile Ifx_SRC_SRCR *src)
Gets the current request status.
Definition: IfxSrc.h:285
IfxSrc_isOverrun
IFX_INLINE boolean IfxSrc_isOverrun(volatile Ifx_SRC_SRCR *src)
Gets the current overrun status.
Definition: IfxSrc.h:279
IfxSrc_clearRequest
IFX_INLINE void IfxSrc_clearRequest(volatile Ifx_SRC_SRCR *src)
Resets a specific interrupt service by software.
Definition: IfxSrc.h:247
IfxSrc_setRequest
IFX_INLINE void IfxSrc_setRequest(volatile Ifx_SRC_SRCR *src)
Requests a specific interrupt service by software.
Definition: IfxSrc.h:291
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271


iLLD_TC26B: IfxSrc_cfg.c Source File

  • _Impl
IfxSrc_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxSrc_cfg.c
3 * \brief SRC on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxSrc_cfg.h"
IfxSrc_cfg.h
SRC on-chip implementation data.


iLLD_TC26B: IfxSrc_cfg.h Source File

  • _Impl
IfxSrc_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxSrc_cfg.h
3 * \brief SRC on-chip implementation data
4 * \ingroup IfxLld_Src
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Src SRC
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Src_Impl Implementation
44 * \ingroup IfxLld_Src
45 * \defgroup IfxLld_Src_Std Standard Driver
46 * \ingroup IfxLld_Src
47 * \defgroup IfxLld_Src_Impl_Enumerations Enumerations
48 * \ingroup IfxLld_Src_Impl
49 */
50
51 #ifndef IFXSRC_CFG_H
52 #define IFXSRC_CFG_H 1
53
54 /******************************************************************************/
55 /*----------------------------------Includes----------------------------------*/
56 /******************************************************************************/
57
58 /******************************************************************************/
59 /*--------------------------------Enumerations--------------------------------*/
60 /******************************************************************************/
61
62 /** \addtogroup IfxLld_Src_Impl_Enumerations
63 * \{ */
64 /** \brief Identifier of interrupt service provider, which handles the interrupt service request.
65 */
66 typedef enum
67 {
68 IfxSrc_Tos_cpu0 = 0, /**< \brief CPU0 interrupt service provider, which handles the interrupt service request. */
69 IfxSrc_Tos_cpu1 = 1, /**< \brief CPU1 interrupt service provider, which handles the interrupt service request. */
70 IfxSrc_Tos_dma = 3 /**< \brief DMA interrupt service provider, which handles the interrupt service request. */
71 } IfxSrc_Tos;
72
73 /** \} */
74
75 #endif /* IFXSRC_CFG_H */
IfxSrc_Tos_cpu1
CPU1 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:69
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:70
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68


iLLD_TC26B: IfxStdIf.h Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf.h
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf.h
3 * \brief Standard interface types
4 * \ingroup IfxLld
5 *
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-27 20:08:23 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup library_srvsw_stdif Standard interface
43 * \ingroup library_srvsw
44 *
45 *
46 *
47 * \par Terms
48 *
49 * Term | Description
50 * ------------------------- | -------
51 * Standard Interface | Interface defined in this document
52 * Interface Driver | Specific device driver as defined by the iLLD
53 * Standard Interface Driver | Specific interface driver which implements the Standard Interface
54 * API used at runtime | API that are used after initialization
55 * Module | Hardware functional block / IP
56 *
57 * \par Overview
58 * The Standard Interface provides generic runtime API written in C for common use case application. It abstracts the underlaying Interface Driver,
59 * i.e. the runtime API is completely device independent. It provides generic API for common use case application.
60 *
61 * Example of Standard Interface:
62 * - Serial communication interface
63 * - PWM interface
64 * - Position sensor interface
65 * - Timer interface
66 * - EEPROM interface
67 *
68 * The target is to be able to exchange the microcontroller or external connected devices on which the application is based with a minimal impact
69 * on the application code, to reduce the application software development and maintenance effort. This is archived by the Standard Interface,
70 * for which, changing the hardware only requires the update of the device configuration settings and the device initialization code. The API used
71 * at runtime, which represents the majority and the complexitity of the related code keep unchanged.
72 *
73 * Motivation: because the current software developed for the automotive applications mainly don’t use C++, the Standard Interface provides a common
74 * definition for the device driver and an alternative layer for different hardware instead of using C++ interface wrapper class.
75 *
76 *
77 * The below figure shows the layers used and an example of APIs used by the application.
78 * \image html "StandardInterfaceLayers.png" "Standard interface layers"
79 * \image html "StandardInterfaceDataPipeExample.png" "Standard interface example: Serial interface as data pipe"
80 * \image html "StandardInterfaceTimerExample.png" "Standard interface example: Timer"
81 *
82 * The Standard Interface is implemented by Standard Interface wrapper by providing the function pointer to the custom functions. This gives
83 * the possibility to the programmer to use it or not. When used, it increases the code portability but slightly decreases the performance in
84 * term of run time execution and code size. When not used, the performance is not affected.
85 *
86 *
87 * \par Definition
88 * The standard interface requires the definition of at least two components: the standard interface component and the standard interface wrapper
89 * component. The standard interface component defines for each standard interface a standard interface object and a set of standard APIs used at
90 * runtime by the application. The standard interface wrapper component initializes the standard interface component by linking it to the interface
91 * driver.
92 *
93 * \attention: The application shall explicitly use the API provided by the standard interface component at runtime to access driver’s parameters
94 * (setter/ getter) or action (methods). Trying to access members of the standard interface component directly though the object may not guaranty
95 * future code compatibility. The same applies to the interface driver (reminder).
96 *
97 *
98 * \par Convention
99 *
100 * The Standard interface defines the following files:
101 * Path/File | Description
102 * ----------------------------------------------- | -----------------
103 * 1_SrvSw/StdIf/IfxStdIf.h | Global standard interface definitions
104 * 1_SrvSw/StdIf/IfxStdIf_<standard interface>.h | Specific standard interface definitions
105 * TCxxx/<Module>/Ifx<Module>_<interface>.h/c | Specific standard interface wrapper initialization API are reconized by the name Ifx<Module>_<interface>_StdIf<std interface>Init()
106 * TCxxx/<Module>/Ifx<Module>_<interface>.h/c | Specific standard interface wrapper function API are named according to the interface driver naming rules
107 *
108 */
109
110 #ifndef IFXSTDIF_H_
111 #define IFXSTDIF_H_ 1
112
113 #include "Cpu/Std/Ifx_Types.h"
114
115 typedef void *IfxStdIf_InterfaceDriver; /**< \brief Pointer to the specific interface driver */
116
117 #endif /* IFXSTDIF_H_ */
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:115
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.


iLLD_TC26B: IfxStdIf_DPipe.c Source File

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  • CpuGeneric
  • StdIf
IfxStdIf_DPipe.c
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_DPipe.c
3 * \brief Standard interface: Data Pipe
4 * \ingroup IfxStdIf
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-27 20:08:23 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxStdIf_DPipe.h"
44 #include "_Utilities/Ifx_Assert.h"
45
46 #include <string.h>
47 #include <stdio.h>
48 #include <stdarg.h>
49
50 void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format, ...)
51 {
52 if (!stdIf->txDisabled)
53 {
54 char message[STDIF_DPIPE_MAX_PRINT_SIZE + 1];
55 Ifx_SizeT count;
56 va_list args;
57 va_start(args, format);
58 vsprintf((char *)message, format, args);
59 va_end(args);
60 count = (Ifx_SizeT)strlen(message);
61 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, count < STDIF_DPIPE_MAX_PRINT_SIZE);
62 //return
63 IfxStdIf_DPipe_write(stdIf, (void *)message, &count, TIME_INFINITE);
64 }
65 else
66 {
67 //return TRUE;
68 }
69 }
IfxStdIf_DPipe_::txDisabled
boolean txDisabled
If disabled is set to TRUE, the output is disabled, else enabled.
Definition: IfxStdIf_DPipe.h:233
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
STDIF_DPIPE_MAX_PRINT_SIZE
#define STDIF_DPIPE_MAX_PRINT_SIZE
Size of the buffer allocated on the stack for the print function.
Definition: IfxStdIf_DPipe.h:74
Ifx_Assert.h
Assert functions.
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxStdIf_DPipe_print
void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:50
IfxStdIf_DPipe_write
IFX_INLINE boolean IfxStdIf_DPipe_write(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:259
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
TIME_INFINITE
#define TIME_INFINITE
Definition: Ifx_Types.h:77
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53


iLLD_TC26B: IfxStdIf_DPipe.h Source File

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  • CpuGeneric
  • StdIf
IfxStdIf_DPipe.h
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_DPipe.h
3 * \brief Standard interface: Data Pipe
4 * \ingroup IfxStdIf
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-27 20:08:24 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup library_srvsw_stdif_dpipe Standard interface: Data Pipe
43 * \ingroup library_srvsw_stdif
44 *
45 * The standard interafce data pipe (DPipe) abstract the hardware used for data transfer. It provide, after proper initialization an hardware independant way to write
46 * and read data to/from as communciation channel.
47 *
48 * \par Porting StandardIo to DPipe
49 * replace all
50 * - StandardIo type with IfxStdIf_DPipe
51 * - StandardIo_print with IfxStdIf_DPipe_print
52 * delete StandardIo.c and StandardIo.h
53 * Include "StdIf/IfxStdIf_DPipe.h" instead of "SysSe/Bsp/StandardIo.h"
54 *
55 * The following files are already ported: Ifx_Console, Ifx_Shell
56 *
57 */
58 #ifndef STDIF_DPIPE_H_
59 #define STDIF_DPIPE_H_ 1
60
61 #include "IfxStdIf.h"
62 //----------------------------------------------------------------------------------------
63 #ifndef ENDL
64 # define ENDL "\r\n"
65 #endif
66
67 /** \brief Forward declaration */
68 typedef struct IfxStdIf_DPipe_ IfxStdIf_DPipe;
69
70 typedef volatile boolean *IfxStdIf_DPipe_WriteEvent;
71 typedef volatile boolean *IfxStdIf_DPipe_ReadEvent;
72
73 /** \brief Size of the buffer allocated on the stack for the print function */
74 #define STDIF_DPIPE_MAX_PRINT_SIZE (255)
75
76 /** \brief Write binary data into the \ref IfxStdIf_DPipe.
77 *
78 * Initially the parameter 'count' specifies count of data to write.
79 * After execution the data pointed by 'count' specifies the data actually written
80 *
81 * \param stdif Pointer to the interface driver object
82 * \param data Pointer to the start of data
83 * \param count Pointer to the count of data (in bytes).
84 * \param timeout in system timer ticks
85 *
86 * \retval TRUE Returns TRUE if all items could be written
87 * \retval FALSE Returns FALSE if not all the items could be written
88 */
89 typedef boolean (*IfxStdIf_DPipe_Write)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout);
90
91 /** \brief Read data from the \ref IfxStdIf_DPipe object
92 *
93 * Initially the parameter 'count' specifies count of data to read.
94 * After execution the data pointed by 'count' specifies the data actually read.
95 *
96 * \param stdif Pointer to the interface driver object
97 * \param data Pointer to the start of data
98 * \param count Pointer to the count of data (in bytes).
99 * \param timeout in system timer ticks
100 *
101 * \retval TRUE Returns TRUE if all items could be read
102 * \retval FALSE Returns FALSE if not all the items could be read
103 */
104 typedef boolean (*IfxStdIf_DPipe_Read)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout);
105
106 /** \brief Returns the number of bytes in the rx buffer
107 *
108 * \param stdif Pointer to the interface driver object
109 *
110 * \return Returns the number of bytes in the rx buffer
111 */
112 typedef sint32 (*IfxStdIf_DPipe_GetReadCount)(IfxStdIf_InterfaceDriver stdIf);
113
114 /** \brief Returns read event object
115 *
116 * \param stdif Pointer to the interface driver object
117 *
118 * \return Returns read event object
119 */
120 typedef IfxStdIf_DPipe_ReadEvent (*IfxStdIf_DPipe_GetReadEvent)(IfxStdIf_InterfaceDriver stdIf);
121
122 /** \brief Returns number of bytes send
123 *
124 * \param stdif Pointer to the interface driver object
125 *
126 * \return Returns number of bytes send
127 */
128 typedef uint32 (*IfxStdIf_DPipe_GetSendCount)(IfxStdIf_InterfaceDriver stdIf);
129
130 /** \brief Returns the time stamp of the last transmit data
131 *
132 * \param stdif Pointer to the interface driver object
133 *
134 * \return Returns the time stamp of the last transmit data
135 */
136 typedef Ifx_TickTime (*IfxStdIf_DPipe_GetTxTimeStamp)(IfxStdIf_InterfaceDriver stdIf);
137
138 /** \brief Returns the number of free bytes (free space) in the tx buffer
139 *
140 * \param stdif Pointer to the interface driver object
141 *
142 * \return Returns the number of free bytes in the tx buffer
143 */
144 typedef sint32 (*IfxStdIf_DPipe_GetWriteCount)(IfxStdIf_InterfaceDriver stdIf);
145
146 /** \brief Returns write event object
147 *
148 * \param stdif Pointer to the interface driver object
149 *
150 * \return Returns write event object
151 */
152 typedef IfxStdIf_DPipe_WriteEvent (*IfxStdIf_DPipe_GetWriteEvent)(IfxStdIf_InterfaceDriver stdIf);
153
154 /** \brief Indicates if the required number of bytes are available for read in the buffer
155 *
156 * \param stdif Pointer to the interface driver object
157 * \param count Pointer to the count of data (in bytes).
158 * \param timeout in system timer ticks
159 *
160 * \return Returns TRUE if at least count bytes are available for read in the rx buffer,
161 * if not the Event is armed to be set when the buffer count is bigger or equal to the requested count
162 */
163 typedef boolean (*IfxStdIf_DPipe_CanReadCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout);
164
165 /** \brief Indicates if there is enough free space to write the data in the buffer
166 *
167 * \param stdif Pointer to the interface driver object
168 * \param count Pointer to the count of data (in bytes).
169 * \param timeout in system timer ticks
170 *
171 * \return Returns TRUE if at least count bytes can be written to the tx buffer,
172 * if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count
173 */
174 typedef boolean (*IfxStdIf_DPipe_CanWriteCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout);
175
176 /** \brief Flush the transmit buffer by transmitting all data
177 *
178 * \param stdif Pointer to the interface driver object
179 * \param timeout timeout for the flush operation
180 *
181 * \return Returns TRUE if the FIFO is empty
182 */
183 typedef boolean (*IfxStdIf_DPipe_FlushTx)(IfxStdIf_InterfaceDriver stdIf, Ifx_TickTime timeout);
184
185 /** \brief Clears the RX buffer by removing all data
186 *
187 * \param stdif Pointer to the interface driver object
188 * \return void
189 */
190 typedef void (*IfxStdIf_DPipe_ClearRx)(IfxStdIf_InterfaceDriver stdIf);
191
192 /** \brief Clears the TX buffer by removing all data
193 *
194 * \param stdif Pointer to the interface driver object
195 * \return void
196 */
197 typedef void (*IfxStdIf_DPipe_ClearTx)(IfxStdIf_InterfaceDriver stdIf);
198
199 /** \brief handler called on reveive event
200 *
201 * \param stdif Pointer to the interface driver object
202 *
203 * \return none
204 */
205 typedef void (*IfxStdIf_DPipe_OnReceive)(IfxStdIf_InterfaceDriver stdIf);
206 /** \brief handler called on transmit event
207 *
208 * \param stdif Pointer to the interface driver object
209 *
210 * \return none
211 */
212 typedef void (*IfxStdIf_DPipe_OnTransmit)(IfxStdIf_InterfaceDriver stdIf);
213 /** \brief handler called on error event
214 *
215 * \param stdif Pointer to the interface driver object
216 *
217 * \return none
218 */
219 typedef void (*IfxStdIf_DPipe_OnError)(IfxStdIf_InterfaceDriver stdIf);
220 /** \brief Reset the sendCount counter
221 *
222 * \param stdif Pointer to the interface driver object
223 *
224 * \return none
225 */
226 typedef void (*IfxStdIf_DPipe_ResetSendCount)(IfxStdIf_InterfaceDriver stdIf);
227
228 /** \brief Standard interface object
229 */
230 struct IfxStdIf_DPipe_
231 {
232 IfxStdIf_InterfaceDriver driver; /**< \brief Pointer to the specific driver object */
233 boolean txDisabled; /**< \brief If disabled is set to TRUE, the output is disabled, else enabled */
234
235 /* Standard interface APIs */
236 IfxStdIf_DPipe_Write write; /**< \brief \see IfxStdIf_DPipe_Write */
237 IfxStdIf_DPipe_Read read; /**< \brief \see IfxStdIf_DPipe_Read */
238 IfxStdIf_DPipe_GetReadCount getReadCount; /**< \brief \see IfxStdIf_DPipe_GetReadCount */
239 IfxStdIf_DPipe_GetReadEvent getReadEvent; /**< \brief \see IfxStdIf_DPipe_GetReadEvent */
240 IfxStdIf_DPipe_GetWriteCount getWriteCount; /**< \brief \see IfxStdIf_DPipe_GetWriteCount */
241 IfxStdIf_DPipe_GetWriteEvent getWriteEvent; /**< \brief \see IfxStdIf_DPipe_GetWriteEvent */
242 IfxStdIf_DPipe_CanReadCount canReadCount; /**< \brief \see IfxStdIf_DPipe_CanReadCount */
243 IfxStdIf_DPipe_CanWriteCount canWriteCount; /**< \brief \see IfxStdIf_DPipe_CanWriteCount */
244 IfxStdIf_DPipe_FlushTx flushTx; /**< \brief \see IfxStdIf_DPipe_FlushTx */
245 IfxStdIf_DPipe_ClearTx clearTx; /**< \brief \see IfxStdIf_DPipe_ClearTx */
246 IfxStdIf_DPipe_ClearRx clearRx; /**< \brief \see IfxStdIf_DPipe_ClearRx */
247 IfxStdIf_DPipe_OnReceive onReceive; /**< \brief \see IfxStdIf_DPipe_OnReceive */
248 IfxStdIf_DPipe_OnTransmit onTransmit; /**< \brief \see IfxStdIf_DPipe_OnTransmit */
249 IfxStdIf_DPipe_OnError onError; /**< \brief \see IfxStdIf_DPipe_OnError */
250
251 IfxStdIf_DPipe_GetSendCount getSendCount; /**< \brief \see IfxStdIf_DPipe_GetSendCount */
252 IfxStdIf_DPipe_GetTxTimeStamp getTxTimeStamp; /**< \brief \see IfxStdIf_DPipe_GetTxTimeStamp */
253 IfxStdIf_DPipe_ResetSendCount resetSendCount; /**< \brief \see IfxStdIf_DPipe_ResetSendCount */
254 };
255 /** \addtogroup library_srvsw_stdif_dpipe
256 * \{ */
257 /** \copydoc IfxStdIf_DPipe_Write
258 */
259 IFX_INLINE boolean IfxStdIf_DPipe_write(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
260 {
261 return stdIf->write(stdIf->driver, data, count, timeout);
262 }
263
264
265 /** \copydoc IfxStdIf_DPipe_Read
266 */
267 IFX_INLINE boolean IfxStdIf_DPipe_read(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
268 {
269 return stdIf->read(stdIf->driver, data, count, timeout);
270 }
271
272
273 /** \copydoc IfxStdIf_DPipe_GetReadCount
274 */
275 IFX_INLINE sint32 IfxStdIf_DPipe_getReadCount(IfxStdIf_DPipe *stdIf)
276 {
277 return stdIf->getReadCount(stdIf->driver);
278 }
279
280
281 /** \copydoc IfxStdIf_DPipe_GetWriteCount
282 */
283 IFX_INLINE sint32 IfxStdIf_DPipe_getWriteCount(IfxStdIf_DPipe *stdIf)
284 {
285 return stdIf->getWriteCount(stdIf->driver);
286 }
287
288
289 /** \copydoc IfxStdIf_DPipe_CanReadCount
290 */
291 IFX_INLINE boolean IfxStdIf_DPipe_canReadCount(IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
292 {
293 return stdIf->canReadCount(stdIf->driver, count, timeout);
294 }
295
296
297 /** \copydoc IfxStdIf_DPipe_CanWriteCount
298 */
299 IFX_INLINE boolean IfxStdIf_DPipe_canWriteCount(IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
300 {
301 return stdIf->canWriteCount(stdIf->driver, count, timeout);
302 }
303
304
305 /** \copydoc IfxStdIf_DPipe_GetReadEvent
306 */
307 IFX_INLINE IfxStdIf_DPipe_ReadEvent IfxStdIf_DPipe_getReadEvent(IfxStdIf_DPipe *stdIf)
308 {
309 return stdIf->getReadEvent(stdIf->driver);
310 }
311
312
313 /** \copydoc IfxStdIf_DPipe_GetWriteEvent
314 */
315 IFX_INLINE IfxStdIf_DPipe_WriteEvent IfxStdIf_DPipe_getWriteEvent(IfxStdIf_DPipe *stdIf)
316 {
317 return stdIf->getWriteEvent(stdIf->driver);
318 }
319
320
321 /** \copydoc IfxStdIf_DPipe_FlushTx
322 */
323 IFX_INLINE boolean IfxStdIf_DPipe_flushTx(IfxStdIf_DPipe *stdIf, Ifx_TickTime timeout)
324 {
325 return stdIf->flushTx(stdIf->driver, timeout);
326 }
327
328
329 /** \copydoc IfxStdIf_DPipe_ClearTx
330 */
331 IFX_INLINE void IfxStdIf_DPipe_clearTx(IfxStdIf_DPipe *stdIf)
332 {
333 stdIf->clearTx(stdIf->driver);
334 }
335
336
337 /** \copydoc IfxStdIf_DPipe_ClearRx
338 */
339 IFX_INLINE void IfxStdIf_DPipe_clearRx(IfxStdIf_DPipe *stdIf)
340 {
341 stdIf->clearRx(stdIf->driver);
342 }
343
344
345 /** \copydoc IfxStdIf_DPipe_OnReceive
346 */
347 IFX_INLINE void IfxStdIf_DPipe_onReceive(IfxStdIf_DPipe *stdIf)
348 {
349 stdIf->onReceive(stdIf->driver);
350 }
351
352
353 /** \copydoc IfxStdIf_DPipe_OnTransmit
354 */
355 IFX_INLINE void IfxStdIf_DPipe_onTransmit(IfxStdIf_DPipe *stdIf)
356 {
357 stdIf->onTransmit(stdIf->driver);
358 }
359
360
361 /** \copydoc IfxStdIf_DPipe_OnError
362 */
363 IFX_INLINE void IfxStdIf_DPipe_onError(IfxStdIf_DPipe *stdIf)
364 {
365 stdIf->onError(stdIf->driver);
366 }
367
368
369 /** \copydoc IfxStdIf_DPipe_GetSendCount
370 */
371 IFX_INLINE uint32 IfxStdIf_DPipe_getSendCount(IfxStdIf_DPipe *stdIf)
372 {
373 return stdIf->getSendCount(stdIf->driver);
374 }
375
376
377 /** \copydoc IfxStdIf_DPipe_GetTxTimeStamp
378 */
379 IFX_INLINE Ifx_TickTime IfxStdIf_DPipe_getTxTimeStamp(IfxStdIf_DPipe *stdIf)
380 {
381 return stdIf->getTxTimeStamp(stdIf->driver);
382 }
383
384
385 /** \copydoc IfxStdIf_DPipe_ResetSendCount
386 */
387 IFX_INLINE void IfxStdIf_DPipe_resetSendCount(IfxStdIf_DPipe *stdIf)
388 {
389 stdIf->resetSendCount(stdIf->driver);
390 }
391
392
393 IFX_EXTERN void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format, ...);
394
395 /** \} */
396 //----------------------------------------------------------------------------------------
397
398 #endif /* STDIF_DPIPE_H_ */
IfxStdIf_DPipe_::resetSendCount
IfxStdIf_DPipe_ResetSendCount resetSendCount
Definition: IfxStdIf_DPipe.h:253
IfxStdIf_DPipe_::canWriteCount
IfxStdIf_DPipe_CanWriteCount canWriteCount
Definition: IfxStdIf_DPipe.h:243
IfxStdIf_DPipe_canWriteCount
IFX_INLINE boolean IfxStdIf_DPipe_canWriteCount(IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: IfxStdIf_DPipe.h:299
IfxStdIf_DPipe_ResetSendCount
void(* IfxStdIf_DPipe_ResetSendCount)(IfxStdIf_InterfaceDriver stdIf)
Reset the sendCount counter.
Definition: IfxStdIf_DPipe.h:226
IfxStdIf_DPipe_onTransmit
IFX_INLINE void IfxStdIf_DPipe_onTransmit(IfxStdIf_DPipe *stdIf)
handler called on transmit event
Definition: IfxStdIf_DPipe.h:355
IfxStdIf_DPipe_clearTx
IFX_INLINE void IfxStdIf_DPipe_clearTx(IfxStdIf_DPipe *stdIf)
Clears the TX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:331
IfxStdIf_DPipe_::txDisabled
boolean txDisabled
If disabled is set to TRUE, the output is disabled, else enabled.
Definition: IfxStdIf_DPipe.h:233
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
IfxStdIf_DPipe_::getTxTimeStamp
IfxStdIf_DPipe_GetTxTimeStamp getTxTimeStamp
Definition: IfxStdIf_DPipe.h:252
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:115
IfxStdIf_DPipe_::onTransmit
IfxStdIf_DPipe_OnTransmit onTransmit
Definition: IfxStdIf_DPipe.h:248
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
IfxStdIf_DPipe_getReadEvent
IFX_INLINE IfxStdIf_DPipe_ReadEvent IfxStdIf_DPipe_getReadEvent(IfxStdIf_DPipe *stdIf)
Returns read event object.
Definition: IfxStdIf_DPipe.h:307
IfxStdIf_DPipe_::getWriteEvent
IfxStdIf_DPipe_GetWriteEvent getWriteEvent
Definition: IfxStdIf_DPipe.h:241
IfxStdIf_DPipe_getWriteCount
IFX_INLINE sint32 IfxStdIf_DPipe_getWriteCount(IfxStdIf_DPipe *stdIf)
Returns the number of free bytes (free space) in the tx buffer.
Definition: IfxStdIf_DPipe.h:283
IfxStdIf_DPipe_resetSendCount
IFX_INLINE void IfxStdIf_DPipe_resetSendCount(IfxStdIf_DPipe *stdIf)
Reset the sendCount counter.
Definition: IfxStdIf_DPipe.h:387
IfxStdIf_DPipe_::getWriteCount
IfxStdIf_DPipe_GetWriteCount getWriteCount
Definition: IfxStdIf_DPipe.h:240
IfxStdIf_DPipe_GetSendCount
uint32(* IfxStdIf_DPipe_GetSendCount)(IfxStdIf_InterfaceDriver stdIf)
Returns number of bytes send.
Definition: IfxStdIf_DPipe.h:128
IfxStdIf_DPipe_OnTransmit
void(* IfxStdIf_DPipe_OnTransmit)(IfxStdIf_InterfaceDriver stdIf)
handler called on transmit event
Definition: IfxStdIf_DPipe.h:212
IfxStdIf.h
Standard interface types.
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStdIf_DPipe_::onError
IfxStdIf_DPipe_OnError onError
Definition: IfxStdIf_DPipe.h:249
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
IfxStdIf_DPipe_::read
IfxStdIf_DPipe_Read read
Definition: IfxStdIf_DPipe.h:237
IfxStdIf_DPipe_::getSendCount
IfxStdIf_DPipe_GetSendCount getSendCount
Definition: IfxStdIf_DPipe.h:251
IfxStdIf_DPipe_::canReadCount
IfxStdIf_DPipe_CanReadCount canReadCount
Definition: IfxStdIf_DPipe.h:242
IfxStdIf_DPipe_print
IFX_EXTERN void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:50
IfxStdIf_DPipe_CanWriteCount
boolean(* IfxStdIf_DPipe_CanWriteCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: IfxStdIf_DPipe.h:174
IfxStdIf_DPipe_::write
IfxStdIf_DPipe_Write write
Definition: IfxStdIf_DPipe.h:236
IfxStdIf_DPipe_getReadCount
IFX_INLINE sint32 IfxStdIf_DPipe_getReadCount(IfxStdIf_DPipe *stdIf)
Returns the number of bytes in the rx buffer.
Definition: IfxStdIf_DPipe.h:275
IfxStdIf_DPipe_GetWriteEvent
IfxStdIf_DPipe_WriteEvent(* IfxStdIf_DPipe_GetWriteEvent)(IfxStdIf_InterfaceDriver stdIf)
Returns write event object.
Definition: IfxStdIf_DPipe.h:152
IfxStdIf_DPipe_GetReadEvent
IfxStdIf_DPipe_ReadEvent(* IfxStdIf_DPipe_GetReadEvent)(IfxStdIf_InterfaceDriver stdIf)
Returns read event object.
Definition: IfxStdIf_DPipe.h:120
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStdIf_DPipe_::flushTx
IfxStdIf_DPipe_FlushTx flushTx
Definition: IfxStdIf_DPipe.h:244
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxStdIf_DPipe_getWriteEvent
IFX_INLINE IfxStdIf_DPipe_WriteEvent IfxStdIf_DPipe_getWriteEvent(IfxStdIf_DPipe *stdIf)
Returns write event object.
Definition: IfxStdIf_DPipe.h:315
IfxStdIf_DPipe_::onReceive
IfxStdIf_DPipe_OnReceive onReceive
Definition: IfxStdIf_DPipe.h:247
IfxStdIf_DPipe_Write
boolean(* IfxStdIf_DPipe_Write)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:89
IfxStdIf_DPipe_OnReceive
void(* IfxStdIf_DPipe_OnReceive)(IfxStdIf_InterfaceDriver stdIf)
handler called on reveive event
Definition: IfxStdIf_DPipe.h:205
IfxStdIf_DPipe_::driver
IfxStdIf_InterfaceDriver driver
Pointer to the specific driver object.
Definition: IfxStdIf_DPipe.h:232
IfxStdIf_DPipe_CanReadCount
boolean(* IfxStdIf_DPipe_CanReadCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer.
Definition: IfxStdIf_DPipe.h:163
IfxStdIf_DPipe_write
IFX_INLINE boolean IfxStdIf_DPipe_write(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:259
IfxStdIf_DPipe_::getReadEvent
IfxStdIf_DPipe_GetReadEvent getReadEvent
Definition: IfxStdIf_DPipe.h:239
IfxStdIf_DPipe_clearRx
IFX_INLINE void IfxStdIf_DPipe_clearRx(IfxStdIf_DPipe *stdIf)
Clears the RX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:339
IfxStdIf_DPipe_GetWriteCount
sint32(* IfxStdIf_DPipe_GetWriteCount)(IfxStdIf_InterfaceDriver stdIf)
Returns the number of free bytes (free space) in the tx buffer.
Definition: IfxStdIf_DPipe.h:144
IfxStdIf_DPipe_onReceive
IFX_INLINE void IfxStdIf_DPipe_onReceive(IfxStdIf_DPipe *stdIf)
handler called on reveive event
Definition: IfxStdIf_DPipe.h:347
boolean
unsigned char boolean
Definition: Platform_Types.h:104
IfxStdIf_DPipe_::getReadCount
IfxStdIf_DPipe_GetReadCount getReadCount
Definition: IfxStdIf_DPipe.h:238
IfxStdIf_DPipe_flushTx
IFX_INLINE boolean IfxStdIf_DPipe_flushTx(IfxStdIf_DPipe *stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data.
Definition: IfxStdIf_DPipe.h:323
IfxStdIf_DPipe_FlushTx
boolean(* IfxStdIf_DPipe_FlushTx)(IfxStdIf_InterfaceDriver stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data.
Definition: IfxStdIf_DPipe.h:183
IfxStdIf_DPipe_::clearRx
IfxStdIf_DPipe_ClearRx clearRx
Definition: IfxStdIf_DPipe.h:246
IfxStdIf_DPipe_Read
boolean(* IfxStdIf_DPipe_Read)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object.
Definition: IfxStdIf_DPipe.h:104
sint32
long sint32
Definition: Platform_Types.h:134
IfxStdIf_DPipe_WriteEvent
volatile boolean * IfxStdIf_DPipe_WriteEvent
Definition: IfxStdIf_DPipe.h:70
IfxStdIf_DPipe_GetReadCount
sint32(* IfxStdIf_DPipe_GetReadCount)(IfxStdIf_InterfaceDriver stdIf)
Returns the number of bytes in the rx buffer.
Definition: IfxStdIf_DPipe.h:112
IfxStdIf_DPipe_GetTxTimeStamp
Ifx_TickTime(* IfxStdIf_DPipe_GetTxTimeStamp)(IfxStdIf_InterfaceDriver stdIf)
Returns the time stamp of the last transmit data.
Definition: IfxStdIf_DPipe.h:136
IfxStdIf_DPipe_getTxTimeStamp
IFX_INLINE Ifx_TickTime IfxStdIf_DPipe_getTxTimeStamp(IfxStdIf_DPipe *stdIf)
Returns the time stamp of the last transmit data.
Definition: IfxStdIf_DPipe.h:379
IfxStdIf_DPipe_getSendCount
IFX_INLINE uint32 IfxStdIf_DPipe_getSendCount(IfxStdIf_DPipe *stdIf)
Returns number of bytes send.
Definition: IfxStdIf_DPipe.h:371
IfxStdIf_DPipe_ClearTx
void(* IfxStdIf_DPipe_ClearTx)(IfxStdIf_InterfaceDriver stdIf)
Clears the TX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:197
IfxStdIf_DPipe_OnError
void(* IfxStdIf_DPipe_OnError)(IfxStdIf_InterfaceDriver stdIf)
handler called on error event
Definition: IfxStdIf_DPipe.h:219
IfxStdIf_DPipe_read
IFX_INLINE boolean IfxStdIf_DPipe_read(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object.
Definition: IfxStdIf_DPipe.h:267
IfxStdIf_DPipe_canReadCount
IFX_INLINE boolean IfxStdIf_DPipe_canReadCount(IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer.
Definition: IfxStdIf_DPipe.h:291
IfxStdIf_DPipe_onError
IFX_INLINE void IfxStdIf_DPipe_onError(IfxStdIf_DPipe *stdIf)
handler called on error event
Definition: IfxStdIf_DPipe.h:363
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:53
IfxStdIf_DPipe_::clearTx
IfxStdIf_DPipe_ClearTx clearTx
Definition: IfxStdIf_DPipe.h:245
IfxStdIf_DPipe_ReadEvent
volatile boolean * IfxStdIf_DPipe_ReadEvent
Definition: IfxStdIf_DPipe.h:71
IfxStdIf_DPipe_ClearRx
void(* IfxStdIf_DPipe_ClearRx)(IfxStdIf_InterfaceDriver stdIf)
Clears the RX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:190


iLLD_TC26B: IfxStdIf_Pos.c Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_Pos.c
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_Pos.c
3 * \brief Standard interface: Position interface
4 * \ingroup IfxStdIf
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxStdIf_Pos.h"
44
45 void IfxStdIf_Pos_initConfig (IfxStdIf_Pos_Config * config)
46 {
47 config->offset = 0;
48 config->reversed = FALSE;
49 config->resolution = 0;
50 config->periodPerRotation = 1;
51 config->resolutionFactor = IfxStdIf_Pos_ResolutionFactor_oneFold;
52 config->updatePeriod = 0.001;
53 config->speedModeThreshold = 0;
54 config->minSpeed = 0; // 0 rpm
55 config->maxSpeed = 20000.0 / 60.0 * (2 * IFX_PI); // 20000 rpm
56 config->speedFilterEnabled = FALSE;
57 config->speedFilerCutOffFrequency = 0;
58
59 }
60
61 void IfxStdIf_Pos_printStatus(IfxStdIf_Pos *driver, IfxStdIf_DPipe *io)
62 {
63 IfxStdIf_Pos_Status status;
64 status = IfxStdIf_Pos_getFault(driver);
65
66 IfxStdIf_DPipe_print(io, "DSADC RDC status:" ENDL);
67 if (status.status != 0)
68 {
69 if (status.B.commError)
70 {
71 IfxStdIf_DPipe_print(io, "- Communication error" ENDL);
72 }
73 if (status.B.notSynchronised)
74 {
75 IfxStdIf_DPipe_print(io, "- Synchronization error" ENDL);
76 }
77 if (status.B.signalDegradation)
78 {
79 IfxStdIf_DPipe_print(io, "- Signal degradation error" ENDL);
80 }
81 if (status.B.signalLoss)
82 {
83 IfxStdIf_DPipe_print(io, "- Signal loss error" ENDL);
84 }
85 if (status.B.trackingLoss)
86 {
87 IfxStdIf_DPipe_print(io, "- Tracking error" ENDL);
88 }
89 }
90 else
91 {
92 IfxStdIf_DPipe_print(io, "- Ready" ENDL);
93 }
94 }
IfxStdIf_Pos_Config::speedModeThreshold
float32 speedModeThreshold
Speed threshold used for the speed calculation mode. For encoder, above the threshold the pulse count...
Definition: IfxStdIf_Pos.h:319
IfxStdIf_Pos_Config::resolution
sint32 resolution
Sensor resolution. For encoder with 1024 pulse per revolution, the value should be 1024...
Definition: IfxStdIf_Pos.h:315
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
IfxStdIf_Pos_initConfig
void IfxStdIf_Pos_initConfig(IfxStdIf_Pos_Config *config)
Definition: IfxStdIf_Pos.c:45
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:64
IfxStdIf_Pos_Config::minSpeed
float32 minSpeed
Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Definition: IfxStdIf_Pos.h:320
IfxStdIf_Pos_Config::resolutionFactor
IfxStdIf_Pos_ResolutionFactor resolutionFactor
Resolution multiplier for encoder interface, valid is 2, 4.
Definition: IfxStdIf_Pos.h:317
IfxStdIf_Pos_getFault
IFX_INLINE IfxStdIf_Pos_Status IfxStdIf_Pos_getFault(IfxStdIf_Pos *stdIf)
Return the sensor status. MCMETILLD-521
Definition: IfxStdIf_Pos.h:350
IfxStdIf_Pos_Status::status
uint32 status
Global status access.
Definition: IfxStdIf_Pos.h:102
IfxStdIf_DPipe_print
void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:50
IfxStdIf_Pos_Config::maxSpeed
float32 maxSpeed
Absolute maximal allowed speed. Above speed is recognized as error.
Definition: IfxStdIf_Pos.h:321
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStdIf_Pos_Status::B
struct IfxStdIf_Pos_Status::@0 B
Bitfielf status access.
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:217
IfxStdIf_Pos_Config::reversed
boolean reversed
If true, the sensor direction is reversed.
Definition: IfxStdIf_Pos.h:314
IfxStdIf_Pos.h
Standard interface: Position interface.
IfxStdIf_Pos_printStatus
void IfxStdIf_Pos_printStatus(IfxStdIf_Pos *driver, IfxStdIf_DPipe *io)
Print the device status.
Definition: IfxStdIf_Pos.c:61
IfxStdIf_Pos_Config::updatePeriod
float32 updatePeriod
period in seconds, at which the application calls IfxStdIf_Pos_update()
Definition: IfxStdIf_Pos.h:318
IfxStdIf_Pos_Config
Position interface configuration.
Definition: IfxStdIf_Pos.h:311
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:283
IfxStdIf_Pos_Config::offset
sint32 offset
Position sensor offset.
Definition: IfxStdIf_Pos.h:313
IfxStdIf_Pos_Config::speedFilerCutOffFrequency
float32 speedFilerCutOffFrequency
Speed low pass filter cut off frequency.
Definition: IfxStdIf_Pos.h:323
IfxStdIf_Pos_ResolutionFactor_oneFold
Default, no multipluication factor.
Definition: IfxStdIf_Pos.h:75
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:100
IfxStdIf_Pos_Config::speedFilterEnabled
boolean speedFilterEnabled
Enable / disable the speed low pass filter.
Definition: IfxStdIf_Pos.h:322
IfxStdIf_Pos_Config::periodPerRotation
uint16 periodPerRotation
Number of period per rotation. Is usually 1 for encoder.
Definition: IfxStdIf_Pos.h:316


iLLD_TC26B: IfxStdIf_Pos.h Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_Pos.h
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_Pos.h
3 * \brief Standard interface: Position interface
4 * \ingroup IfxStdIf
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup library_srvsw_stdif_posif Standard interface: Position interface
43 * \ingroup library_srvsw_stdif
44 *
45 * The standard interface position interface (IfxStdIf_Pos) abstract the hardware used for position interface feature like encoder, hall, resolver, ... It provide, after proper initialization an hardware
46 * Independent way to interact with the position sensor like getting position, speed, direction, ...
47 *
48 * The figure below shows the standard position interface.
49 *
50 * \image html "stdif_PosIf.png" "Standard position interface"
51 *
52 * This interface defines the following features:
53 * -
54 *
55 *
56 */
57
58 #ifndef IFXSTDIF_POSIF_H
59 #define IFXSTDIF_POSIF_H 1
60
61 #include "Cpu/Std/Ifx_Types.h"
62 #include "IfxStdIf.h"
63 #include "IfxStdIf_DPipe.h"
64
65 /** \brief Output event enable / disable */
66 typedef enum
67 {
68 IfxStdIf_Pos_MotionType_rotating, /**< \brief Rotating sensor */
69 IfxStdIf_Pos_MotionType_linear /**< \brief Linear sensor */
70 } IfxStdIf_Pos_MotionType;
71
72 /** \brief Output event enable / disable */
73 typedef enum
74 {
75 IfxStdIf_Pos_ResolutionFactor_oneFold = 1, /**< \brief Default, no multipluication factor */
76 IfxStdIf_Pos_ResolutionFactor_twoFold = 2, /**< \brief 2-fold resolution. Valid for encoder */
77 IfxStdIf_Pos_ResolutionFactor_fourFold = 4 /**< \brief 4-fold resolution. Valid for encoder */
78 } IfxStdIf_Pos_ResolutionFactor;
79
80 /** \brief Position sensor Types */
81 typedef enum
82 {
83 IfxStdIf_Pos_SensorType_encoder,
84 IfxStdIf_Pos_SensorType_hall,
85 IfxStdIf_Pos_SensorType_resolver,
86 IfxStdIf_Pos_SensorType_angletrk,
87 IfxStdIf_Pos_SensorType_igmr,
88 IfxStdIf_Pos_SensorType_virtual
89 } IfxStdIf_Pos_SensorType;
90
91 /** \brief Position sensor direction definition */
92 typedef enum
93 {
94 IfxStdIf_Pos_Dir_forward, /**< \brief Forward direction. For rotating position sensor, forward is clockwise rotation */
95 IfxStdIf_Pos_Dir_backward, /**< \brief Backward direction. For rotating position sensor, fackward is counter-clockwise rotation */
96 IfxStdIf_Pos_Dir_unknown /**< \brief Unknown direction */
97 } IfxStdIf_Pos_Dir;
98
99 /** \brief Position sensor status definition */
100 typedef union
101 {
102 uint32 status; /**< \brief Global status access */
103 struct
104 {
105 uint32 notSynchronised : 1; /**< \brief Sensor is not synchronized */
106 uint32 signalLoss : 1; /**< \brief Loss of signal error */
107 uint32 signalDegradation : 1; /**< \brief Signal degradation warning */
108 uint32 trackingLoss : 1; /**< \brief Tracking loss error */
109 uint32 commError : 1; /**< \brief Communication error*/
110 } B; /**< \brief Bitfielf status access */
111 } IfxStdIf_Pos_Status;
112
113 typedef sint32 IfxStdIf_Pos_RawAngle;
114
115 /** \brief Forward declaration */
116 typedef struct IfxStdIf_Pos_ IfxStdIf_Pos;
117
118 /** \brief Return the position, inclusive turns
119 *
120 * Return the sensor position in rad for rotating sensor inclusive turns, or in m for linear sensors.
121 * For linear sensor the effect is the same as IfxStdIf_Pos_GetPosition.
122 *
123 * \param stdIf Pointer to the interface driver object
124 * \return Return the position inclusive turns in rad
125 */
126 typedef float32 (*IfxStdIf_Pos_GetAbsolutePosition)(IfxStdIf_InterfaceDriver stdIf);
127
128 /** \brief Handles the zero interrupt
129 * \param stdIf Pointer to the interface driver object
130 * \return none
131 */
132 typedef void (*IfxStdIf_Pos_OnZeroIrq)(IfxStdIf_InterfaceDriver stdIf);
133
134 /** \brief Return the raw position sensor offset
135 *
136 * \param stdIf Pointer to the interface driver object
137 * \return Return the raw position sensor offset sensor in ticks
138 */
139 typedef sint32 (*IfxStdIf_Pos_GetOffset)(IfxStdIf_InterfaceDriver stdIf);
140
141 /** \brief Return the position
142 *
143 * Return the sensor position in rad for rotating sensor or in m for linear sensors.
144 * For rotating sensor, the position is always between 0 and 2*IFX_PI.
145 *
146 * \param stdIf Pointer to the interface driver object
147 * \return Return the position in rad or m
148 */
149 typedef float32 (*IfxStdIf_Pos_GetPosition)(IfxStdIf_InterfaceDriver stdIf);
150
151 /** \brief Return the direction
152 *
153 * Return the sensor direction.
154 *
155 * \param stdIf Pointer to the interface driver object
156 * \return Return the direction
157 */
158 typedef IfxStdIf_Pos_Dir (*IfxStdIf_Pos_GetDirection)(IfxStdIf_InterfaceDriver stdIf);
159
160 /** \brief Return the sensor status
161 *
162 * \param stdIf Pointer to the interface driver object
163 * \return Return the sensor status
164 */
165 typedef IfxStdIf_Pos_Status (*IfxStdIf_Pos_GetFault)(IfxStdIf_InterfaceDriver stdIf);
166
167 /** \brief Return the period per rotation setting
168 *
169 * \param stdIf Pointer to the interface driver object
170 * \return Return the period per rotation setting
171 */
172 typedef uint16 (*IfxStdIf_Pos_GetPeriodPerRotation)(IfxStdIf_InterfaceDriver stdIf);
173
174 /** \brief Return the raw position in ticks
175 *
176 * Return the sensor raw position in ticks.
177 *
178 * \param stdIf Pointer to the interface driver object
179 * \return Return the raw position in ticks
180 */
181 typedef sint32 (*IfxStdIf_Pos_GetRawPosition)(IfxStdIf_InterfaceDriver stdIf);
182
183 /** \brief Get the update period
184 * \param stdIf Pointer to the interface driver object
185 * \return Return the update period in s
186 */
187 typedef float32 (*IfxStdIf_Pos_GetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf);
188
189 /** \brief Get the resolution
190 * \param stdIf Pointer to the interface driver object
191 * \return Return the resolution
192 */
193 typedef sint32 (*IfxStdIf_Pos_GetResolution)(IfxStdIf_InterfaceDriver stdIf);
194
195 /** \brief Get the sensor type
196 * \param stdIf Pointer to the interface driver object
197 * \return Return the sensor type
198 */
199 typedef IfxStdIf_Pos_SensorType (*IfxStdIf_Pos_GetSensorType)(IfxStdIf_InterfaceDriver stdIf);
200
201 /** \brief Return the speed
202 * \param stdIf Pointer to the interface driver object
203 * \return Return the speed in rad/s or m/s
204 */
205 typedef float32 (*IfxStdIf_Pos_GetSpeed)(IfxStdIf_InterfaceDriver stdIf);
206
207 /** \brief Return position in turn
208 * \param stdIf Pointer to the interface driver object
209 * \return Return position in turn
210 */
211 typedef sint32 (*IfxStdIf_Pos_GetTurn)(IfxStdIf_InterfaceDriver stdIf);
212
213 /** \brief Handles the A sensor event
214 * Event A is a sensor defined event. it is optional.
215 * \param stdIf Pointer to the interface driver object
216 * \return none
217 */
218 typedef void (*IfxStdIf_Pos_OnEventA)(IfxStdIf_InterfaceDriver stdIf);
219
220 /** \brief Refresh the status
221 *
222 * Update the stdIf state like speed, position, status, taking into account the updatePeriod
223 *
224 * \param stdIf Pointer to the interface driver object
225 * \return None
226 */
227 typedef void (*IfxStdIf_Pos_Update)(IfxStdIf_InterfaceDriver stdIf);
228
229 /** \brief Reset the driver
230 *
231 * Clear faults, reset speed and position to 0
232 *
233 * \param stdIf Pointer to the interface driver object
234 * \return None
235 */
236 typedef void (*IfxStdIf_Pos_Reset)(IfxStdIf_InterfaceDriver stdIf);
237
238 /** \brief Reset the driver fault
239 *
240 * Clear faults
241 *
242 * \param stdIf Pointer to the interface driver object
243 * \return None
244 */
245 typedef void (*IfxStdIf_Pos_ResetFaults)(IfxStdIf_InterfaceDriver stdIf);
246
247 /** \brief Set the sensor offset
248 * \param stdIf Pointer to the interface driver object
249 * \param offset Offset in sensor ticks
250 * \return None
251 */
252 typedef void (*IfxStdIf_Pos_SetOffset)(IfxStdIf_InterfaceDriver stdIf, sint32 offset);
253
254 /** \brief Set the sensor position (virtual sensor)
255 * \param stdIf Pointer to the interface driver object
256 * \param position Position sensor rad
257 * \return None
258 */
259 typedef void (*IfxStdIf_Pos_SetPosition)(IfxStdIf_InterfaceDriver stdIf, float32 position);
260 /** \brief Set the sensor position (virtual sensor)
261 * \param stdIf Pointer to the interface driver object
262 * \param position Position sensor ticks
263 * \return None
264 */
265 typedef void (*IfxStdIf_Pos_SetRawPosition)(IfxStdIf_InterfaceDriver stdIf, sint32 position);
266
267 /** \brief Set the sensor speed (virtual sensor)
268 * \param stdIf Pointer to the interface driver object
269 * \param speed speed in rad/s
270 * \return None
271 */
272 typedef void (*IfxStdIf_Pos_SetSpeed)(IfxStdIf_InterfaceDriver stdIf, float32 speed);
273
274 /** \brief Set the update period
275 * \param stdIf Pointer to the interface driver object
276 * \param updatePeriod Refresh period in s
277 * \return None
278 */
279 typedef void (*IfxStdIf_Pos_SetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod);
280
281 /** \brief Standard interface object
282 */
283 struct IfxStdIf_Pos_
284 {
285 IfxStdIf_InterfaceDriver driver; /**< \brief Interface driver object */
286 IfxStdIf_Pos_OnZeroIrq onZeroIrq; /**< \brief \see IfxStdIf_Pos_OnZeroIrq */
287 IfxStdIf_Pos_GetAbsolutePosition getAbsolutePosition; /**< \brief Return the absolute position */
288 IfxStdIf_Pos_GetOffset getOffset; /**< \brief \see IfxStdIf_Pos_GetOffset */
289 IfxStdIf_Pos_GetPosition getPosition; /**< \brief \see IfxStdIf_Pos_GetPosition */
290 IfxStdIf_Pos_GetDirection getDirection; /**< \brief \see IfxStdIf_Pos_GetDirection */
291 IfxStdIf_Pos_GetFault getFault; /**< \brief \see IfxStdIf_Pos_GetFault */
292 IfxStdIf_Pos_GetRawPosition getRawPosition; /**< \brief \see IfxStdIf_Pos_GetRawPosition */
293 IfxStdIf_Pos_GetPeriodPerRotation getPeriodPerRotation; /**< \brief \see IfxStdIf_Pos_GetPeriodPerRotation */
294 IfxStdIf_Pos_GetRefreshPeriod getRefreshPeriod; /**< \brief \see IfxStdIf_Pos_GetRefreshPeriod */
295 IfxStdIf_Pos_GetResolution getResolution; /**< \brief \see IfxStdIf_Pos_GetResolution */
296 IfxStdIf_Pos_GetSensorType getSensorType; /**< \brief \see IfxStdIf_Pos_GetSensorType */
297 IfxStdIf_Pos_GetTurn getTurn; /**< \brief \see IfxStdIf_Pos_GetTurn */
298 IfxStdIf_Pos_OnEventA onEventA; /**< \brief \see IfxStdIf_Pos_OnEventA */
299 IfxStdIf_Pos_Reset reset; /**< \brief \see IfxStdIf_Pos_Reset */
300 IfxStdIf_Pos_ResetFaults resetFaults; /**< \brief \see IfxStdIf_Pos_ResetFaults */
301 IfxStdIf_Pos_GetSpeed getSpeed; /**< \brief \see IfxStdIf_Pos_GetSpeed */
302 IfxStdIf_Pos_Update update; /**< \brief \see IfxStdIf_Pos_Update */
303 IfxStdIf_Pos_SetOffset setOffset; /**< \brief \see IfxStdIf_Pos_SetOffset */
304 IfxStdIf_Pos_SetPosition setPosition; /**< \brief \see IfxStdIf_Pos_SetPosition */
305 IfxStdIf_Pos_SetRawPosition setRawPosition; /**< \brief \see IfxStdIf_Pos_SetRawPosition */
306 IfxStdIf_Pos_SetSpeed setSpeed; /**< \brief \see IfxStdIf_Pos_SetSpeed */
307 IfxStdIf_Pos_SetRefreshPeriod setRefreshPeriod; /**< \brief \see IfxStdIf_Pos_SetRefreshPeriod */
308 };
309
310 /** \brief Position interface configuration */
311 typedef struct
312 {
313 sint32 offset; /**< \brief Position sensor offset */
314 boolean reversed; /**< \brief If true, the sensor direction is reversed */
315 sint32 resolution; /**< \brief Sensor resolution. For encoder with 1024 pulse per revolution, the value should be 1024 */
316 uint16 periodPerRotation; /**< \brief Number of period per rotation. Is usually 1 for encoder */
317 IfxStdIf_Pos_ResolutionFactor resolutionFactor; /**< \brief Resolution multiplier for encoder interface, valid is 2, 4. */
318 float32 updatePeriod; /**< \brief period in seconds, at which the application calls IfxStdIf_Pos_update() */
319 float32 speedModeThreshold; /**< \brief Speed threshold used for the speed calculation mode. For encoder, above the threshold the pulse count mode is used, below the threshold, the time delta is used */
320 float32 minSpeed; /**< \brief Absolute minimal allowed speed. below speed is recognized as 0rad/s */
321 float32 maxSpeed; /**< \brief Absolute maximal allowed speed. Above speed is recognized as error */
322 boolean speedFilterEnabled; /**< \brief Enable / disable the speed low pass filter */
323 float32 speedFilerCutOffFrequency; /**< \brief Speed low pass filter cut off frequency */
324 } IfxStdIf_Pos_Config;
325
326 /** \addtogroup library_srvsw_stdif_posif
327 * \{
328 */
329
330 /** \copydoc IfxStdIf_Pos_OnZeroIrq
331 */
332 IFX_INLINE void IfxStdIf_Pos_onZeroIrq(IfxStdIf_Pos *stdIf)
333 {
334 stdIf->onZeroIrq(stdIf->driver);
335 }
336
337
338 /** \copydoc IfxStdIf_Pos_GetAbsolutePosition
339 * \param stdIf Standard interface pointer
340 */
341 IFX_INLINE float32 IfxStdIf_Pos_getAbsolutePosition(IfxStdIf_Pos *stdIf)
342 {
343 return stdIf->getAbsolutePosition(stdIf->driver);
344 }
345
346
347 /** \copydoc IfxStdIf_Pos_GetFault MCMETILLD-521
348 * \param stdIf Standard interface pointer
349 */
350 IFX_INLINE IfxStdIf_Pos_Status IfxStdIf_Pos_getFault(IfxStdIf_Pos *stdIf)
351 {
352 return stdIf->getFault(stdIf->driver);
353 }
354
355
356 /** \copydoc IfxStdIf_Pos_GetOffset
357 * \param stdIf Standard interface pointer
358 */
359 IFX_INLINE sint32 IfxStdIf_Pos_getOffset(IfxStdIf_Pos *stdIf)
360 {
361 return stdIf->getOffset(stdIf->driver);
362 }
363
364
365 /** \copydoc IfxStdIf_Pos_GetPosition
366 * \param stdIf Standard interface pointer
367 */
368 IFX_INLINE float32 IfxStdIf_Pos_getPosition(IfxStdIf_Pos *stdIf)
369 {
370 return stdIf->getPosition(stdIf->driver);
371 }
372
373
374 /** \copydoc IfxStdIf_Pos_GetDirection
375 * \param stdIf Standard interface pointer
376 */
377 IFX_INLINE IfxStdIf_Pos_Dir IfxStdIf_Pos_getDirection(IfxStdIf_Pos *stdIf)
378 {
379 return stdIf->getDirection(stdIf->driver);
380 }
381
382
383 /** \copydoc IfxStdIf_Pos_GetPeriodPerRotation
384 * \param stdIf Standard interface pointer
385 */
386 IFX_INLINE uint16 IfxStdIf_Pos_getPeriodPerRotation(IfxStdIf_Pos *stdIf)
387 {
388 return stdIf->getPeriodPerRotation(stdIf->driver);
389 }
390
391
392 /** \copydoc IfxStdIf_Pos_GetRawPosition
393 * \param stdIf Standard interface pointer
394 */
395 IFX_INLINE sint32 IfxStdIf_Pos_getRawPosition(IfxStdIf_Pos *stdIf)
396 {
397 return stdIf->getRawPosition(stdIf->driver);
398 }
399
400
401 /** \copydoc IfxStdIf_Pos_GetRefreshPeriod
402 * \param stdIf Standard interface pointer
403 */
404 IFX_INLINE float32 IfxStdIf_Pos_getRefreshPeriod(IfxStdIf_Pos *stdIf)
405 {
406 return stdIf->getRefreshPeriod(stdIf->driver);
407 }
408
409
410 /** \copydoc IfxStdIf_Pos_GetResolution
411 * \param stdIf Standard interface pointer
412 */
413 IFX_INLINE sint32 IfxStdIf_Pos_getResolution(IfxStdIf_Pos *stdIf)
414 {
415 return stdIf->getResolution(stdIf->driver);
416 }
417
418
419 /** \copydoc IfxStdIf_Pos_GetTurn
420 * \param stdIf Standard interface pointer
421 */
422 IFX_INLINE sint32 IfxStdIf_Pos_getTurn(IfxStdIf_Pos *stdIf)
423 {
424 return stdIf->getTurn(stdIf->driver);
425 }
426
427
428 /** \copydoc IfxStdIf_Pos_GetSensorType
429 * \param stdIf Standard interface pointer
430 */
431 IFX_INLINE IfxStdIf_Pos_SensorType IfxStdIf_Pos_getSensorType(IfxStdIf_Pos *stdIf)
432 {
433 return stdIf->getSensorType(stdIf->driver);
434 }
435
436
437 /** \copydoc IfxStdIf_Pos_GetSpeed
438 * \param stdIf Standard interface pointer
439 */
440 IFX_INLINE float32 IfxStdIf_Pos_getSpeed(IfxStdIf_Pos *stdIf)
441 {
442 return stdIf->getSpeed(stdIf->driver);
443 }
444
445
446 /** Check whether the sensor is faulty
447 * \param stdIf Standard interface pointer
448 */
449 IFX_INLINE boolean IfxStdIf_Pos_isFault(IfxStdIf_Pos *stdIf)
450 {
451 return IfxStdIf_Pos_getFault(stdIf).status != 0;
452 }
453
454
455 /** \copydoc IfxStdIf_Pos_OnEventA
456 * \param stdIf Standard interface pointer
457 */
458 IFX_INLINE void IfxStdIf_Pos_onEventA(IfxStdIf_Pos *stdIf)
459 {
460 stdIf->onEventA(stdIf->driver);
461 }
462
463
464 /** \copydoc IfxStdIf_Pos_Update
465 * \param stdIf Standard interface pointer
466 */
467 IFX_INLINE void IfxStdIf_Pos_update(IfxStdIf_Pos *stdIf)
468 {
469 stdIf->update(stdIf->driver);
470 }
471
472
473 /** \copydoc IfxStdIf_Pos_Reset
474 * \param stdIf Standard interface pointer
475 */
476 IFX_INLINE void IfxStdIf_Pos_reset(IfxStdIf_Pos *stdIf)
477 {
478 stdIf->reset(stdIf->driver);
479 }
480
481
482 /** \copydoc IfxStdIf_Pos_ResetFaults
483 * \param stdIf Standard interface pointer
484 */
485 IFX_INLINE void IfxStdIf_Pos_resetFaults(IfxStdIf_Pos *stdIf)
486 {
487 stdIf->resetFaults(stdIf->driver);
488 }
489
490
491 /** \copydoc IfxStdIf_Pos_SetOffset
492 * \param stdIf Standard interface pointer
493 */
494 IFX_INLINE void IfxStdIf_Pos_setOffset(IfxStdIf_Pos *stdIf, sint32 offset)
495 {
496 stdIf->setOffset(stdIf->driver, offset);
497 }
498
499
500 /** \copydoc IfxStdIf_Pos_SetPosition
501 * \param stdIf Standard interface pointer
502 */
503 IFX_INLINE void IfxStdIf_Pos_setPosition(IfxStdIf_Pos *stdIf, float32 position)
504 {
505 stdIf->setPosition(stdIf->driver, position);
506 }
507
508
509 /** \copydoc IfxStdIf_Pos_SetRawPosition
510 * \param stdIf Standard interface pointer
511 */
512 IFX_INLINE void IfxStdIf_Pos_setRawPosition(IfxStdIf_Pos *stdIf, sint32 position)
513 {
514 stdIf->setRawPosition(stdIf->driver, position);
515 }
516
517
518 /** \copydoc IfxStdIf_Pos_SetSpeed
519 * \param stdIf Standard interface pointer
520 */
521 IFX_INLINE void IfxStdIf_Pos_setSpeed(IfxStdIf_Pos *stdIf, float32 speed)
522 {
523 stdIf->setSpeed(stdIf->driver, speed);
524 }
525
526
527 /** \copydoc IfxStdIf_Pos_SetRefreshPeriod
528 * \param stdIf Standard interface pointer
529 */
530 IFX_INLINE void IfxStdIf_Pos_setRefreshPeriod(IfxStdIf_Pos *stdIf, float32 updatePeriod)
531 {
532 stdIf->setRefreshPeriod(stdIf->driver, updatePeriod);
533 }
534
535
536 /** \} */
537
538 /** \brief Converts from rad/s to rpm
539 *
540 * \param speed Specifies the speed in rad/s.
541 *
542 * \return returns the converted speed in rpm.
543 * \see IfxStdIf_Pos_rpmToRads()
544 */
545 IFX_INLINE float32 IfxStdIf_Pos_radsToRpm(float32 speed)
546 {
547 return (60.0 / (2.0 * IFX_PI)) * speed;
548 }
549
550
551 /** \brief Converts from rpm to rad/s
552 *
553 * \param speed Specifies the speed in rpm.
554 *
555 * \return returns the converted speed in rad/s.
556 * \see IfxStdIf_Pos_radsToRpm()
557 */
558 IFX_INLINE float32 IfxStdIf_Pos_rpmToRads(float32 speed)
559 {
560 return speed * ((2.0 * IFX_PI) / 60.0);
561 }
562
563
564 /** Initialize the configuration structure to default
565 *
566 * \param config Position interface configuration. This parameter is initialized by the function
567 *
568 */
569 IFX_EXTERN void IfxStdIf_Pos_initConfig(IfxStdIf_Pos_Config *config);
570
571 /** \brief Print the device status
572 *
573 * \param driver driver handle
574 * \param io Interface to which the status is output
575 * \return none
576 */
577 IFX_EXTERN void IfxStdIf_Pos_printStatus(IfxStdIf_Pos *driver, IfxStdIf_DPipe *io);
578
579
580 #endif /* IFXSTDIF_POSIF_H */
IfxStdIf_Pos_Config::speedModeThreshold
float32 speedModeThreshold
Speed threshold used for the speed calculation mode. For encoder, above the threshold the pulse count...
Definition: IfxStdIf_Pos.h:319
IfxStdIf_Pos_getPosition
IFX_INLINE float32 IfxStdIf_Pos_getPosition(IfxStdIf_Pos *stdIf)
Return the position.
Definition: IfxStdIf_Pos.h:368
IfxStdIf_Pos_Config::resolution
sint32 resolution
Sensor resolution. For encoder with 1024 pulse per revolution, the value should be 1024...
Definition: IfxStdIf_Pos.h:315
IfxStdIf_Pos_resetFaults
IFX_INLINE void IfxStdIf_Pos_resetFaults(IfxStdIf_Pos *stdIf)
Reset the driver fault.
Definition: IfxStdIf_Pos.h:485
IfxStdIf_Pos_GetRefreshPeriod
float32(* IfxStdIf_Pos_GetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf)
Get the update period.
Definition: IfxStdIf_Pos.h:187
IfxStdIf_Pos_::setRefreshPeriod
IfxStdIf_Pos_SetRefreshPeriod setRefreshPeriod
Definition: IfxStdIf_Pos.h:307
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:115
IfxStdIf_Pos_setSpeed
IFX_INLINE void IfxStdIf_Pos_setSpeed(IfxStdIf_Pos *stdIf, float32 speed)
Set the sensor speed (virtual sensor)
Definition: IfxStdIf_Pos.h:521
IfxStdIf_Pos_getPeriodPerRotation
IFX_INLINE uint16 IfxStdIf_Pos_getPeriodPerRotation(IfxStdIf_Pos *stdIf)
Return the period per rotation setting.
Definition: IfxStdIf_Pos.h:386
IfxStdIf_Pos_GetOffset
sint32(* IfxStdIf_Pos_GetOffset)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position sensor offset.
Definition: IfxStdIf_Pos.h:139
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:230
IfxStdIf_Pos_SetRawPosition
void(* IfxStdIf_Pos_SetRawPosition)(IfxStdIf_InterfaceDriver stdIf, sint32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:265
IfxStdIf_Pos_SensorType_angletrk
Definition: IfxStdIf_Pos.h:86
IfxStdIf_Pos_SensorType_hall
Definition: IfxStdIf_Pos.h:84
IfxStdIf_Pos_::setOffset
IfxStdIf_Pos_SetOffset setOffset
Definition: IfxStdIf_Pos.h:303
IfxStdIf_Pos_::setPosition
IfxStdIf_Pos_SetPosition setPosition
Definition: IfxStdIf_Pos.h:304
IfxStdIf_Pos_GetSpeed
float32(* IfxStdIf_Pos_GetSpeed)(IfxStdIf_InterfaceDriver stdIf)
Return the speed.
Definition: IfxStdIf_Pos.h:205
IfxStdIf_Pos_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Pos.h:285
IfxStdIf_Pos_Dir_unknown
Unknown direction.
Definition: IfxStdIf_Pos.h:96
IfxStdIf_Pos_setRawPosition
IFX_INLINE void IfxStdIf_Pos_setRawPosition(IfxStdIf_Pos *stdIf, sint32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:512
IfxStdIf.h
Standard interface types.
IfxStdIf_Pos_update
IFX_INLINE void IfxStdIf_Pos_update(IfxStdIf_Pos *stdIf)
Refresh the status.
Definition: IfxStdIf_Pos.h:467
IfxStdIf_Pos_getSpeed
IFX_INLINE float32 IfxStdIf_Pos_getSpeed(IfxStdIf_Pos *stdIf)
Return the speed.
Definition: IfxStdIf_Pos.h:440
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStdIf_Pos_Config::minSpeed
float32 minSpeed
Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Definition: IfxStdIf_Pos.h:320
IfxStdIf_Pos_reset
IFX_INLINE void IfxStdIf_Pos_reset(IfxStdIf_Pos *stdIf)
Reset the driver.
Definition: IfxStdIf_Pos.h:476
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Pos_::getRawPosition
IfxStdIf_Pos_GetRawPosition getRawPosition
Definition: IfxStdIf_Pos.h:292
IfxStdIf_Pos_Config::resolutionFactor
IfxStdIf_Pos_ResolutionFactor resolutionFactor
Resolution multiplier for encoder interface, valid is 2, 4.
Definition: IfxStdIf_Pos.h:317
IfxStdIf_Pos_::getPeriodPerRotation
IfxStdIf_Pos_GetPeriodPerRotation getPeriodPerRotation
Definition: IfxStdIf_Pos.h:293
IfxStdIf_Pos_getFault
IFX_INLINE IfxStdIf_Pos_Status IfxStdIf_Pos_getFault(IfxStdIf_Pos *stdIf)
Return the sensor status. MCMETILLD-521
Definition: IfxStdIf_Pos.h:350
IfxStdIf_Pos_Status::status
uint32 status
Global status access.
Definition: IfxStdIf_Pos.h:102
IfxStdIf_Pos_RawAngle
sint32 IfxStdIf_Pos_RawAngle
Definition: IfxStdIf_Pos.h:113
IfxStdIf_Pos_::getSensorType
IfxStdIf_Pos_GetSensorType getSensorType
Definition: IfxStdIf_Pos.h:296
IfxStdIf_Pos_getOffset
IFX_INLINE sint32 IfxStdIf_Pos_getOffset(IfxStdIf_Pos *stdIf)
Return the raw position sensor offset.
Definition: IfxStdIf_Pos.h:359
IfxStdIf_Pos_::getDirection
IfxStdIf_Pos_GetDirection getDirection
Definition: IfxStdIf_Pos.h:290
IfxStdIf_Pos_OnZeroIrq
void(* IfxStdIf_Pos_OnZeroIrq)(IfxStdIf_InterfaceDriver stdIf)
Handles the zero interrupt.
Definition: IfxStdIf_Pos.h:132
IfxStdIf_Pos_ResolutionFactor_twoFold
2-fold resolution. Valid for encoder
Definition: IfxStdIf_Pos.h:76
IfxStdIf_Pos_setRefreshPeriod
IFX_INLINE void IfxStdIf_Pos_setRefreshPeriod(IfxStdIf_Pos *stdIf, float32 updatePeriod)
Set the update period.
Definition: IfxStdIf_Pos.h:530
IfxStdIf_Pos_Config::maxSpeed
float32 maxSpeed
Absolute maximal allowed speed. Above speed is recognized as error.
Definition: IfxStdIf_Pos.h:321
IfxStdIf_Pos_::setRawPosition
IfxStdIf_Pos_SetRawPosition setRawPosition
Definition: IfxStdIf_Pos.h:305
IfxStdIf_Pos_::getRefreshPeriod
IfxStdIf_Pos_GetRefreshPeriod getRefreshPeriod
Definition: IfxStdIf_Pos.h:294
IfxStdIf_Pos_::getPosition
IfxStdIf_Pos_GetPosition getPosition
Definition: IfxStdIf_Pos.h:289
IfxStdIf_Pos_onEventA
IFX_INLINE void IfxStdIf_Pos_onEventA(IfxStdIf_Pos *stdIf)
Handles the A sensor event Event A is a sensor defined event. it is optional.
Definition: IfxStdIf_Pos.h:458
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:217
IfxStdIf_Pos_SensorType_igmr
Definition: IfxStdIf_Pos.h:87
IfxStdIf_Pos_::getFault
IfxStdIf_Pos_GetFault getFault
Definition: IfxStdIf_Pos.h:291
IfxStdIf_Pos_Config::reversed
boolean reversed
If true, the sensor direction is reversed.
Definition: IfxStdIf_Pos.h:314
IfxStdIf_Pos_GetSensorType
IfxStdIf_Pos_SensorType(* IfxStdIf_Pos_GetSensorType)(IfxStdIf_InterfaceDriver stdIf)
Get the sensor type.
Definition: IfxStdIf_Pos.h:199
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStdIf_Pos_SetPosition
void(* IfxStdIf_Pos_SetPosition)(IfxStdIf_InterfaceDriver stdIf, float32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:259
IfxStdIf_Pos_GetRawPosition
sint32(* IfxStdIf_Pos_GetRawPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position in ticks.
Definition: IfxStdIf_Pos.h:181
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxStdIf_Pos_GetDirection
IfxStdIf_Pos_Dir(* IfxStdIf_Pos_GetDirection)(IfxStdIf_InterfaceDriver stdIf)
Return the direction.
Definition: IfxStdIf_Pos.h:158
IfxStdIf_Pos_Config::updatePeriod
float32 updatePeriod
period in seconds, at which the application calls IfxStdIf_Pos_update()
Definition: IfxStdIf_Pos.h:318
IfxStdIf_Pos_initConfig
IFX_EXTERN void IfxStdIf_Pos_initConfig(IfxStdIf_Pos_Config *config)
Definition: IfxStdIf_Pos.c:45
IfxStdIf_Pos_SensorType_encoder
Definition: IfxStdIf_Pos.h:83
IfxStdIf_Pos_SetRefreshPeriod
void(* IfxStdIf_Pos_SetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod)
Set the update period.
Definition: IfxStdIf_Pos.h:279
IfxStdIf_Pos_MotionType_linear
Linear sensor.
Definition: IfxStdIf_Pos.h:69
IfxStdIf_Pos_MotionType_rotating
Rotating sensor.
Definition: IfxStdIf_Pos.h:68
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:92
IfxStdIf_Pos_OnEventA
void(* IfxStdIf_Pos_OnEventA)(IfxStdIf_InterfaceDriver stdIf)
Handles the A sensor event Event A is a sensor defined event. it is optional.
Definition: IfxStdIf_Pos.h:218
IfxStdIf_Pos_getResolution
IFX_INLINE sint32 IfxStdIf_Pos_getResolution(IfxStdIf_Pos *stdIf)
Get the resolution.
Definition: IfxStdIf_Pos.h:413
IfxStdIf_Pos_GetPeriodPerRotation
uint16(* IfxStdIf_Pos_GetPeriodPerRotation)(IfxStdIf_InterfaceDriver stdIf)
Return the period per rotation setting.
Definition: IfxStdIf_Pos.h:172
IfxStdIf_Pos_Dir_backward
Backward direction. For rotating position sensor, fackward is counter-clockwise rotation.
Definition: IfxStdIf_Pos.h:95
IfxStdIf_Pos_::getResolution
IfxStdIf_Pos_GetResolution getResolution
Definition: IfxStdIf_Pos.h:295
IfxStdIf_Pos_getRefreshPeriod
IFX_INLINE float32 IfxStdIf_Pos_getRefreshPeriod(IfxStdIf_Pos *stdIf)
Get the update period.
Definition: IfxStdIf_Pos.h:404
IfxStdIf_Pos_Config
Position interface configuration.
Definition: IfxStdIf_Pos.h:311
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:283
IfxStdIf_Pos_Dir_forward
Forward direction. For rotating position sensor, forward is clockwise rotation.
Definition: IfxStdIf_Pos.h:94
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:81
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxStdIf_Pos_SensorType_virtual
Definition: IfxStdIf_Pos.h:88
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
IfxStdIf_Pos_GetFault
IfxStdIf_Pos_Status(* IfxStdIf_Pos_GetFault)(IfxStdIf_InterfaceDriver stdIf)
Return the sensor status.
Definition: IfxStdIf_Pos.h:165
IfxStdIf_Pos_SetSpeed
void(* IfxStdIf_Pos_SetSpeed)(IfxStdIf_InterfaceDriver stdIf, float32 speed)
Set the sensor speed (virtual sensor)
Definition: IfxStdIf_Pos.h:272
IfxStdIf_Pos_::getSpeed
IfxStdIf_Pos_GetSpeed getSpeed
Definition: IfxStdIf_Pos.h:301
IfxStdIf_Pos_SetOffset
void(* IfxStdIf_Pos_SetOffset)(IfxStdIf_InterfaceDriver stdIf, sint32 offset)
Set the sensor offset.
Definition: IfxStdIf_Pos.h:252
IfxStdIf_Pos_rpmToRads
IFX_INLINE float32 IfxStdIf_Pos_rpmToRads(float32 speed)
Converts from rpm to rad/s.
Definition: IfxStdIf_Pos.h:558
IfxStdIf_Pos_Reset
void(* IfxStdIf_Pos_Reset)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver.
Definition: IfxStdIf_Pos.h:236
IfxStdIf_Pos_Config::offset
sint32 offset
Position sensor offset.
Definition: IfxStdIf_Pos.h:313
IfxStdIf_Pos_printStatus
IFX_EXTERN void IfxStdIf_Pos_printStatus(IfxStdIf_Pos *driver, IfxStdIf_DPipe *io)
Print the device status.
Definition: IfxStdIf_Pos.c:61
IfxStdIf_Pos_getTurn
IFX_INLINE sint32 IfxStdIf_Pos_getTurn(IfxStdIf_Pos *stdIf)
Return position in turn.
Definition: IfxStdIf_Pos.h:422
IfxStdIf_Pos_::getOffset
IfxStdIf_Pos_GetOffset getOffset
Definition: IfxStdIf_Pos.h:288
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxStdIf_Pos_::getAbsolutePosition
IfxStdIf_Pos_GetAbsolutePosition getAbsolutePosition
Return the absolute position.
Definition: IfxStdIf_Pos.h:287
IfxStdIf_Pos_ResolutionFactor
IfxStdIf_Pos_ResolutionFactor
Output event enable / disable.
Definition: IfxStdIf_Pos.h:73
IfxStdIf_Pos_::update
IfxStdIf_Pos_Update update
Definition: IfxStdIf_Pos.h:302
IfxStdIf_Pos_GetTurn
sint32(* IfxStdIf_Pos_GetTurn)(IfxStdIf_InterfaceDriver stdIf)
Return position in turn.
Definition: IfxStdIf_Pos.h:211
sint32
long sint32
Definition: Platform_Types.h:134
IfxStdIf_Pos_GetAbsolutePosition
float32(* IfxStdIf_Pos_GetAbsolutePosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position, inclusive turns.
Definition: IfxStdIf_Pos.h:126
IfxStdIf_Pos_radsToRpm
IFX_INLINE float32 IfxStdIf_Pos_radsToRpm(float32 speed)
Converts from rad/s to rpm.
Definition: IfxStdIf_Pos.h:545
IfxStdIf_Pos_isFault
IFX_INLINE boolean IfxStdIf_Pos_isFault(IfxStdIf_Pos *stdIf)
Definition: IfxStdIf_Pos.h:449
IfxStdIf_Pos_getSensorType
IFX_INLINE IfxStdIf_Pos_SensorType IfxStdIf_Pos_getSensorType(IfxStdIf_Pos *stdIf)
Get the sensor type.
Definition: IfxStdIf_Pos.h:431
IfxStdIf_Pos_::resetFaults
IfxStdIf_Pos_ResetFaults resetFaults
Definition: IfxStdIf_Pos.h:300
IfxStdIf_Pos_Update
void(* IfxStdIf_Pos_Update)(IfxStdIf_InterfaceDriver stdIf)
Refresh the status.
Definition: IfxStdIf_Pos.h:227
IfxStdIf_Pos_setOffset
IFX_INLINE void IfxStdIf_Pos_setOffset(IfxStdIf_Pos *stdIf, sint32 offset)
Set the sensor offset.
Definition: IfxStdIf_Pos.h:494
IfxStdIf_Pos_Config::speedFilerCutOffFrequency
float32 speedFilerCutOffFrequency
Speed low pass filter cut off frequency.
Definition: IfxStdIf_Pos.h:323
IfxStdIf_Pos_::onZeroIrq
IfxStdIf_Pos_OnZeroIrq onZeroIrq
Definition: IfxStdIf_Pos.h:286
IfxStdIf_Pos_ResolutionFactor_oneFold
Default, no multipluication factor.
Definition: IfxStdIf_Pos.h:75
IfxStdIf_Pos_::onEventA
IfxStdIf_Pos_OnEventA onEventA
Definition: IfxStdIf_Pos.h:298
IfxStdIf_Pos_SensorType_resolver
Definition: IfxStdIf_Pos.h:85
IfxStdIf_Pos_ResolutionFactor_fourFold
4-fold resolution. Valid for encoder
Definition: IfxStdIf_Pos.h:77
IfxStdIf_Pos_getDirection
IFX_INLINE IfxStdIf_Pos_Dir IfxStdIf_Pos_getDirection(IfxStdIf_Pos *stdIf)
Return the direction.
Definition: IfxStdIf_Pos.h:377
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:100
IfxStdIf_Pos_::getTurn
IfxStdIf_Pos_GetTurn getTurn
Definition: IfxStdIf_Pos.h:297
IfxStdIf_Pos_getAbsolutePosition
IFX_INLINE float32 IfxStdIf_Pos_getAbsolutePosition(IfxStdIf_Pos *stdIf)
Return the position, inclusive turns.
Definition: IfxStdIf_Pos.h:341
IfxStdIf_Pos_::reset
IfxStdIf_Pos_Reset reset
Definition: IfxStdIf_Pos.h:299
IfxStdIf_Pos_onZeroIrq
IFX_INLINE void IfxStdIf_Pos_onZeroIrq(IfxStdIf_Pos *stdIf)
Handles the zero interrupt.
Definition: IfxStdIf_Pos.h:332
IfxStdIf_Pos_getRawPosition
IFX_INLINE sint32 IfxStdIf_Pos_getRawPosition(IfxStdIf_Pos *stdIf)
Return the raw position in ticks.
Definition: IfxStdIf_Pos.h:395
IfxStdIf_Pos_MotionType
IfxStdIf_Pos_MotionType
Output event enable / disable.
Definition: IfxStdIf_Pos.h:66
IfxStdIf_Pos_GetPosition
float32(* IfxStdIf_Pos_GetPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position.
Definition: IfxStdIf_Pos.h:149
IfxStdIf_Pos_GetResolution
sint32(* IfxStdIf_Pos_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Get the resolution.
Definition: IfxStdIf_Pos.h:193
IfxStdIf_Pos_ResetFaults
void(* IfxStdIf_Pos_ResetFaults)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver fault.
Definition: IfxStdIf_Pos.h:245
IfxStdIf_Pos_::setSpeed
IfxStdIf_Pos_SetSpeed setSpeed
Definition: IfxStdIf_Pos.h:306
IfxStdIf_Pos_Config::speedFilterEnabled
boolean speedFilterEnabled
Enable / disable the speed low pass filter.
Definition: IfxStdIf_Pos.h:322
IfxStdIf_Pos_Config::periodPerRotation
uint16 periodPerRotation
Number of period per rotation. Is usually 1 for encoder.
Definition: IfxStdIf_Pos.h:316
IfxStdIf_Pos_setPosition
IFX_INLINE void IfxStdIf_Pos_setPosition(IfxStdIf_Pos *stdIf, float32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:503


iLLD_TC26B: IfxStdIf_PwmHl.c Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_PwmHl.c
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_PwmHl.c
3 * \brief Standard interface: Multi-channels, dual-complementary PWM interface
4 * \ingroup IfxStdIf
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-27 20:08:24 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxStdIf_PwmHl.h"
44
45 void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
46 {
47 config->deadtime = 0;
48 config->minPulse = 0;
49 config->channelCount = 0;
50 config->emergencyEnabled = FALSE;
51 config->outputMode = IfxPort_OutputMode_pushPull;
52 config->outputDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
53 config->ccxActiveState = Ifx_ActiveState_high;
54 config->coutxActiveState = Ifx_ActiveState_high;
55 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:116
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:133
IfxStdIf_PwmHl_initConfig
void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
Definition: IfxStdIf_PwmHl.c:45
IfxStdIf_PwmHl_Config::deadtime
float32 deadtime
Dead time between the top and bottom channels in seconds.
Definition: IfxStdIf_PwmHl.h:202
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:144
IfxStdIf_PwmHl_Config::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:208
IfxStdIf_PwmHl_Config::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxStdIf_PwmHl.h:211
IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration.
Definition: IfxStdIf_PwmHl.h:200
IfxStdIf_PwmHl_Config::minPulse
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds.
Definition: IfxStdIf_PwmHl.h:203
IfxStdIf_PwmHl_Config::outputMode
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:207
IfxStdIf_PwmHl.h
Standard interface: Multi-channels, dual-complementary PWM interface.
IfxStdIf_PwmHl_Config::emergencyEnabled
boolean emergencyEnabled
Specifies if the emergency stop should be enabled or not.
Definition: IfxStdIf_PwmHl.h:205
IfxStdIf_PwmHl_Config::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxStdIf_PwmHl.h:204
IfxStdIf_PwmHl_Config::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxStdIf_PwmHl.h:212


iLLD_TC26B: IfxStdIf_PwmHl.h Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_PwmHl.h
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_PwmHl.h
3 * \brief Standard interface: Multi-channels, dual-complementary PWM interface
4 * \ingroup IfxStdIf
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup library_srvsw_stdif_pwmhl Standard interface: Multi-channels, dual-complementary PWM interface
43 * \ingroup library_srvsw_stdif
44 *
45 * The standard interface pwm high/low (PwmHl) abstract the hardware used for pwm feature. It provide, after proper initialization an hardware
46 * independant way to interact with the PWM functionallity like setting duty cycles, dead time,timer functionalities, ...
47 *
48 * The figure below shows the standard Multi-channels, dual-complementary PWM interface.
49 *
50 * \image html "PwmHl-overview.png" "Standard Multi-channels, dual-complementary PWM interface"
51 *
52 * This PWM interface provides multiple dual-complementary PWM channels.
53 * Each dual-complementary PWM channel is made of two PWM channels, a top channel CCx and a bottom channel COUTx.
54 * The interface implements the \ref library_srvsw_stdif_timer.
55 *
56 * This interface defines the following features:
57 * - Configurable duty cycle from 0% to 100%
58 * - Adjustable dead-time between top and bottom channels
59 * - Center aligned, left aligned, right aligned PWM
60 * - Optional minimal pulse cancellation
61 * - Optional emergency stop
62 * - Configurable signal active state for top and bottom PWM
63 * - Configurable output ports
64 * - Inherit the features from library_srvsw_stdif_timer
65 *
66 * Example of signal generation in center aligned mode:
67 *
68 * \image html "PwmHl-centerAligned.png" "Standard Multi-channels, dual-complementary PWM interface - Center aligned mode"
69 */
70
71 #ifndef IFXSTDIF_PWMHL_H
72 #define IFXSTDIF_PWMHL_H 1
73
74 #include "IfxStdIf.h"
75 #include "IfxStdIf_Timer.h"
76
77 /** \brief Forward declaration */
78 typedef struct IfxStdIf_PwmHl_ IfxStdIf_PwmHl;
79
80 /** \brief Set the dead time in s
81 * \param stdIf Pointer to the interface driver object
82 * \param deadtime deadtime in second
83 * \retval TRUE In case of success
84 * \retval FALSE In case of failure
85 */
86 typedef boolean (*IfxStdIf_PwmHl_SetDeadtime)(IfxStdIf_InterfaceDriver stdIf, float32 deadtime);
87
88 /** \brief Return the dead time in s
89 *
90 * It returns the last dead time values set by IfxStdIf_PwmHl_SetDeadtime() or during initialisation
91 * \param stdIf Pointer to the interface driver object
92 * \return Returns the deadtime in second
93 */
94 typedef float32 (*IfxStdIf_PwmHl_GetDeadtime)(IfxStdIf_InterfaceDriver stdIf);
95 /** \brief Return the dead time ticks in s
96 *
97 * It returns the last dead time tick values set by IfxStdIf_PwmHl_SetDeadtime() or during initialisation
98 * \param stdIf Pointer to the interface driver object
99 * \return Returns the deadtime in second
100 */
101
102 typedef float32 (*IfxStdIf_PwmHl_GetDeadtimeTick)(IfxStdIf_InterfaceDriver stdIf);
103 /** \brief Set the minimum pulse time in s
104 * \param stdIf Pointer to the interface driver object
105 * \param minPulse minimal pulse in second
106 * \retval TRUE In case of success
107 * \retval FALSE In case of failure
108 */
109 typedef boolean (*IfxStdIf_PwmHl_SetMinPulse)(IfxStdIf_InterfaceDriver stdIf, float32 minPulse);
110
111 /** \brief Return the minimum pulse time in s
112 *
113 * It returns the last minimum pulse time values set by IfxStdIf_PwmHl_SetMinPulse() or during initialisation
114 * \param stdIf Pointer to the interface driver object
115 * \return Returns the minimum pulse time in second
116 */
117 typedef float32 (*IfxStdIf_PwmHl_GetMinPulse)(IfxStdIf_InterfaceDriver stdIf);
118
119 /** \brief Return the PWM mode
120 *
121 * It returns the last pwm mode set by IfxStdIf_PwmHl_SetMode() or during initialisation
122 * \param stdIf Pointer to the interface driver object
123 * \return Returns the pwm mode
124 */
125 typedef Ifx_Pwm_Mode (*IfxStdIf_PwmHl_GetMode)(IfxStdIf_InterfaceDriver stdIf);
126
127 /** \brief Set the pwm mode
128 * \param stdIf Pointer to the interface driver object
129 * \param mode PWM mode
130 * \retval TRUE In case of success
131 * \retval FALSE In case of failure (feature not supported)
132 */
133 typedef boolean (*IfxStdIf_PwmHl_SetMode)(IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode);
134
135 /** \brief Set the pwm ON time
136 * \param stdIf Pointer to the interface driver object
137 * \param tOn Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
138 * \return none
139 */
140 typedef void (*IfxStdIf_PwmHl_SetOnTime)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn);
141
142 /** \brief Set the pwm ON time and shift value
143 * \param stdIf Pointer to the interface driver object
144 * \param tOn Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
145 * \param shift Pointer to an array of shift values in ticks. The array size must be equal to the number of PWM channels
146 * \return none
147 */
148 typedef void (*IfxStdIf_PwmHl_SetOnTimeAndShift)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
149
150 /** \brief Set the pwm pulse of all switched independently
151 * \param stdIf Pointer to the interface driver object
152 * \param tOn Pointer to an array of ON times in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
153 * \param offset Pointer to an array of offset values in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
154 * \return none
155 */
156 typedef void (*IfxStdIf_PwmHl_SetPulse)(IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset);
157
158 /** \brief Set channels which are generating PWM or in "stuck-at" state.
159 *
160 * \param stdIf Pointer to the interface driver object
161 * \param activeCh Pointer to boolean array containing values for PWM channels.
162 * If FALSE, the channel will be in stuck-at state, else the channel will generate PWM.
163 *
164 * \param stuckSt Pointer to boolean array containing values for active channels.
165 * If FALSE, the stuck-at state is passive level, else the stuck-at state is active level.
166 *
167 * \note The values for the parameters are arranged as follows:
168 * index = 0 --> phase 0 top
169 * index = 1 --> phase 0 bottom
170 * index = 2 --> phase 1 top
171 * index = 3 --> phase 1 bottom
172 * index = 4 --> phase 2 top
173 * index = 5 --> phase 2 bottom
174 */
175 typedef void (*IfxStdIf_PwmHl_SetupChannels)(IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt);
176
177 /** \brief Standard interface object
178 */
179 struct IfxStdIf_PwmHl_
180 {
181 IfxStdIf_InterfaceDriver driver; /**< \brief Interface driver object */
182
183 /* PWM related APIs*/
184 IfxStdIf_PwmHl_SetDeadtime setDeadtime; /**< \brief IfxStdIf_PwmHl_SetDeadtime */
185 IfxStdIf_PwmHl_GetDeadtime getDeadtime; /**< \brief IfxStdIf_PwmHl_GetDeadtime */
186 IfxStdIf_PwmHl_GetDeadtimeTick getDeadtimeTick; /**< \breif IfxStdIf_PwmHl_GetDeadtimetick */
187 IfxStdIf_PwmHl_SetMinPulse setMinPulse; /**< \brief IfxStdIf_PwmHl_SetMinPulse */
188 IfxStdIf_PwmHl_GetMinPulse getMinPulse; /**< \brief IfxStdIf_PwmHl_GetMinPulse */
189 IfxStdIf_PwmHl_GetMode getMode; /**< \brief IfxStdIf_PwmHl_GetMode */
190 IfxStdIf_PwmHl_SetMode setMode; /**< \brief IfxStdIf_PwmHl_SetMode */
191 IfxStdIf_PwmHl_SetOnTime setOnTime; /**< \brief IfxStdIf_PwmHl_SetOnTime */
192 IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift; /**< \brief IfxStdIf_PwmHl_SetOnTime */
193 IfxStdIf_PwmHl_SetPulse setPulse; /**< \brief IfxStdIf_PwmHl_Pulse */
194 IfxStdIf_PwmHl_SetupChannels setupChannels; /**< \brief IfxStdIf_PwmHl_SetupChannels */
195
196 IfxStdIf_Timer timer; /**< \brief Timer related standard interface */
197 };
198
199 /** \brief Multi-channels PWM object configuration */
200 typedef struct
201 {
202 float32 deadtime; /**< \brief Dead time between the top and bottom channels in seconds */
203 float32 minPulse; /**< \brief Min pulse allowed as active state for the top and bottom PWM in seconds */
204 uint8 channelCount; /**< \brief Number of PWM channels, one channel is made of a top and bottom channel */
205 boolean emergencyEnabled; /**< \brief Specifies if the emergency stop should be enabled or not */
206
207 IfxPort_OutputMode outputMode; /**< \brief Output mode of ccx and coutx pins */
208 IfxPort_PadDriver outputDriver; /**< \brief Output pad driver of ccx and coutx pins */
209 Ifx_ActiveState ccxOutputEnabled;
210 Ifx_ActiveState coutxOutputEnabled;
211 Ifx_ActiveState ccxActiveState; /**< \brief Top PWM active state */
212 Ifx_ActiveState coutxActiveState; /**< \brief Bottom PWM active state */
213 } IfxStdIf_PwmHl_Config;
214
215 /** \addtogroup library_srvsw_stdif_pwmhl
216 * \{
217 */
218
219 /** \copydoc IfxStdIf_PwmHl_SetDeadtime
220 * \param stdIf Standard interface pointer
221 */
222 IFX_INLINE boolean IfxStdIf_PwmHl_setDeadtime(IfxStdIf_PwmHl *stdIf, float32 deadtime)
223 {
224 return stdIf->setDeadtime(stdIf->driver, deadtime);
225 }
226
227 /** \addtogroup library_srvsw_stdif_pwmhl
228 * \{
229 */
230
231 /** \copydoc IfxStdIf_PwmHl_SetDeadtime
232 * \param stdIf Standard interface pointer
233 */
234 IFX_INLINE float32 IfxStdIf_PwmHl_getDeadtimetick(IfxStdIf_PwmHl *stdIf)
235 {
236 return stdIf->getDeadtimeTick(stdIf->driver);
237 }
238
239 /** \copydoc IfxStdIf_PwmHl_GetDeadtime
240 * \param stdIf Standard interface pointer
241 */
242 IFX_INLINE float32 IfxStdIf_PwmHl_getDeadtime(IfxStdIf_PwmHl *stdIf)
243 {
244 return stdIf->getDeadtime(stdIf->driver);
245 }
246
247
248 /** \copydoc IfxStdIf_PwmHl_SetMinPulse
249 * \param stdIf Standard interface pointer
250 */
251 IFX_INLINE boolean IfxStdIf_PwmHl_setMinPulse(IfxStdIf_PwmHl *stdIf, float32 minPulse)
252 {
253 return stdIf->setMinPulse(stdIf->driver, minPulse);
254 }
255
256
257 /** \copydoc IfxStdIf_PwmHl_GetMinPulse
258 * \param stdIf Standard interface pointer
259 */
260 IFX_INLINE float32 IfxStdIf_PwmHl_getMinPulse(IfxStdIf_PwmHl *stdIf)
261 {
262 return stdIf->getMinPulse(stdIf->driver);
263 }
264
265
266 /** \copydoc IfxStdIf_PwmHl_GetMode
267 * \param stdIf Standard interface pointer
268 */
269 IFX_INLINE Ifx_Pwm_Mode IfxStdIf_PwmHl_getMode(IfxStdIf_PwmHl *stdIf)
270 {
271 return stdIf->getMode(stdIf->driver);
272 }
273
274
275 /** \copydoc IfxStdIf_PwmHl_SetMode
276 * \param stdIf Standard interface pointer
277 */
278 IFX_INLINE boolean IfxStdIf_PwmHl_setMode(IfxStdIf_PwmHl *stdIf, Ifx_Pwm_Mode mode)
279 {
280 return stdIf->setMode(stdIf->driver, mode);
281 }
282
283
284 /** \copydoc IfxStdIf_PwmHl_SetOnTime
285 * \param stdIf Standard interface pointer
286 */
287 IFX_INLINE void IfxStdIf_PwmHl_setOnTime(IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn)
288 {
289 stdIf->setOnTime(stdIf->driver, tOn);
290 }
291
292
293 /** \copydoc IfxStdIf_PwmHl_SetOnTimeAndShift
294 * \param stdIf Standard interface pointer
295 */
296 IFX_INLINE void IfxStdIf_PwmHl_setOnTimeAndShift(IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
297 {
298 stdIf->setOnTimeAndShift(stdIf->driver, tOn, shift);
299 }
300
301
302 /** \copydoc IfxStdIf_PwmHl_SetPulse
303 * \param stdIf Standard interface pointer
304 */
305 IFX_INLINE void IfxStdIf_PwmHl_setPulse(IfxStdIf_PwmHl *stdIf, float32 *tOn, float32 *offset)
306 {
307 stdIf->setPulse(stdIf->driver, tOn, offset);
308 }
309
310
311 /** \copydoc IfxStdIf_PwmHl_SetupChannels
312 */
313 IFX_INLINE void IfxStdIf_PwmHl_setupChannels(IfxStdIf_PwmHl *stdIf, boolean *activeCh, boolean *stuckSt)
314 {
315 IFX_UNUSED_PARAMETER(stdIf);
316 IFX_UNUSED_PARAMETER(activeCh);
317 IFX_UNUSED_PARAMETER(stuckSt);
318 }
319
320 /** \brief Return the timer standard interface used by the IfxStdIf_PwmHl standard interface
321 * \param stdIf Standard interface pointer
322 * \return Returns the pointer to the IfxStdIf_Timer object
323 */
324 IFX_INLINE IfxStdIf_Timer *IfxStdIf_PwmHl_getTimer(IfxStdIf_PwmHl *stdIf)
325 {
326 return &stdIf->timer;
327 }
328
329
330 /** \} */
331
332 /** Initialize the configuration structure to default
333 *
334 * \param config Timer configuration. This parameter is initialised by the function
335 *
336 */
337 IFX_EXTERN void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config);
338
339 #endif /* IFXSTDIF_PWMHL_H */
IfxStdIf_PwmHl_::timer
IfxStdIf_Timer timer
Timer related standard interface.
Definition: IfxStdIf_PwmHl.h:196
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:175
IfxStdIf_PwmHl_GetDeadtimeTick
float32(* IfxStdIf_PwmHl_GetDeadtimeTick)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time ticks in s.
Definition: IfxStdIf_PwmHl.h:102
IfxStdIf_PwmHl_::setupChannels
IfxStdIf_PwmHl_SetupChannels setupChannels
IfxStdIf_PwmHl_SetupChannels.
Definition: IfxStdIf_PwmHl.h:194
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:115
IfxStdIf_PwmHl_::getMinPulse
IfxStdIf_PwmHl_GetMinPulse getMinPulse
IfxStdIf_PwmHl_GetMinPulse.
Definition: IfxStdIf_PwmHl.h:188
IfxStdIf_PwmHl_::getDeadtime
IfxStdIf_PwmHl_GetDeadtime getDeadtime
IfxStdIf_PwmHl_GetDeadtime.
Definition: IfxStdIf_PwmHl.h:185
IfxStdIf_PwmHl_SetupChannels
void(* IfxStdIf_PwmHl_SetupChannels)(IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxStdIf_PwmHl.h:175
IfxStdIf.h
Standard interface types.
IfxStdIf_PwmHl_GetMode
Ifx_Pwm_Mode(* IfxStdIf_PwmHl_GetMode)(IfxStdIf_InterfaceDriver stdIf)
Return the PWM mode.
Definition: IfxStdIf_PwmHl.h:125
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxStdIf_PwmHl_initConfig
IFX_EXTERN void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
Definition: IfxStdIf_PwmHl.c:45
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxStdIf_PwmHl_setMinPulse
IFX_INLINE boolean IfxStdIf_PwmHl_setMinPulse(IfxStdIf_PwmHl *stdIf, float32 minPulse)
Set the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:251
IfxStdIf_PwmHl_::setPulse
IfxStdIf_PwmHl_SetPulse setPulse
IfxStdIf_PwmHl_Pulse.
Definition: IfxStdIf_PwmHl.h:193
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
IfxStdIf_PwmHl_setupChannels
IFX_INLINE void IfxStdIf_PwmHl_setupChannels(IfxStdIf_PwmHl *stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxStdIf_PwmHl.h:313
IfxStdIf_PwmHl_Config::deadtime
float32 deadtime
Dead time between the top and bottom channels in seconds.
Definition: IfxStdIf_PwmHl.h:202
IfxStdIf_PwmHl_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_PwmHl.h:181
IfxStdIf_PwmHl_setOnTime
IFX_INLINE void IfxStdIf_PwmHl_setOnTime(IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time.
Definition: IfxStdIf_PwmHl.h:287
IfxStdIf_PwmHl_setPulse
IFX_INLINE void IfxStdIf_PwmHl_setPulse(IfxStdIf_PwmHl *stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently.
Definition: IfxStdIf_PwmHl.h:305
IfxStdIf_PwmHl_SetPulse
void(* IfxStdIf_PwmHl_SetPulse)(IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently.
Definition: IfxStdIf_PwmHl.h:156
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStdIf_PwmHl_GetMinPulse
float32(* IfxStdIf_PwmHl_GetMinPulse)(IfxStdIf_InterfaceDriver stdIf)
Return the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:117
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxStdIf_PwmHl_Config::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:208
IfxStdIf_PwmHl_Config::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxStdIf_PwmHl.h:211
IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration.
Definition: IfxStdIf_PwmHl.h:200
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:179
IfxStdIf_PwmHl_setMode
IFX_INLINE boolean IfxStdIf_PwmHl_setMode(IfxStdIf_PwmHl *stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode.
Definition: IfxStdIf_PwmHl.h:278
IfxStdIf_PwmHl_::setOnTime
IfxStdIf_PwmHl_SetOnTime setOnTime
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:191
IfxStdIf_PwmHl_getTimer
IFX_INLINE IfxStdIf_Timer * IfxStdIf_PwmHl_getTimer(IfxStdIf_PwmHl *stdIf)
Return the timer standard interface used by the IfxStdIf_PwmHl standard interface.
Definition: IfxStdIf_PwmHl.h:324
IfxStdIf_PwmHl_SetMinPulse
boolean(* IfxStdIf_PwmHl_SetMinPulse)(IfxStdIf_InterfaceDriver stdIf, float32 minPulse)
Set the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:109
IfxStdIf_PwmHl_Config::minPulse
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds.
Definition: IfxStdIf_PwmHl.h:203
IfxStdIf_PwmHl_setDeadtime
IFX_INLINE boolean IfxStdIf_PwmHl_setDeadtime(IfxStdIf_PwmHl *stdIf, float32 deadtime)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:222
IfxStdIf_Timer.h
Standard interface: Timer.
IfxStdIf_PwmHl_::setMode
IfxStdIf_PwmHl_SetMode setMode
IfxStdIf_PwmHl_SetMode.
Definition: IfxStdIf_PwmHl.h:190
IfxStdIf_PwmHl_Config::outputMode
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:207
IfxStdIf_PwmHl_Config::ccxOutputEnabled
Ifx_ActiveState ccxOutputEnabled
Definition: IfxStdIf_PwmHl.h:209
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
boolean
unsigned char boolean
Definition: Platform_Types.h:104
IfxStdIf_PwmHl_SetDeadtime
boolean(* IfxStdIf_PwmHl_SetDeadtime)(IfxStdIf_InterfaceDriver stdIf, float32 deadtime)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:86
IfxStdIf_PwmHl_getMode
IFX_INLINE Ifx_Pwm_Mode IfxStdIf_PwmHl_getMode(IfxStdIf_PwmHl *stdIf)
Return the PWM mode.
Definition: IfxStdIf_PwmHl.h:269
IfxStdIf_PwmHl_Config::emergencyEnabled
boolean emergencyEnabled
Specifies if the emergency stop should be enabled or not.
Definition: IfxStdIf_PwmHl.h:205
IfxStdIf_PwmHl_::getDeadtimeTick
IfxStdIf_PwmHl_GetDeadtimeTick getDeadtimeTick
Definition: IfxStdIf_PwmHl.h:186
IfxStdIf_PwmHl_Config::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxStdIf_PwmHl.h:204
IfxStdIf_PwmHl_getDeadtime
IFX_INLINE float32 IfxStdIf_PwmHl_getDeadtime(IfxStdIf_PwmHl *stdIf)
Return the dead time in s.
Definition: IfxStdIf_PwmHl.h:242
IfxStdIf_PwmHl_::setMinPulse
IfxStdIf_PwmHl_SetMinPulse setMinPulse
IfxStdIf_PwmHl_SetMinPulse.
Definition: IfxStdIf_PwmHl.h:187
IfxStdIf_PwmHl_::setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:192
IfxStdIf_PwmHl_SetOnTime
void(* IfxStdIf_PwmHl_SetOnTime)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time.
Definition: IfxStdIf_PwmHl.h:140
IfxStdIf_PwmHl_::getMode
IfxStdIf_PwmHl_GetMode getMode
IfxStdIf_PwmHl_GetMode.
Definition: IfxStdIf_PwmHl.h:189
IfxStdIf_PwmHl_SetOnTimeAndShift
void(* IfxStdIf_PwmHl_SetOnTimeAndShift)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value.
Definition: IfxStdIf_PwmHl.h:148
IfxStdIf_PwmHl_GetDeadtime
float32(* IfxStdIf_PwmHl_GetDeadtime)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time in s.
Definition: IfxStdIf_PwmHl.h:94
IfxStdIf_PwmHl_::setDeadtime
IfxStdIf_PwmHl_SetDeadtime setDeadtime
IfxStdIf_PwmHl_SetDeadtime.
Definition: IfxStdIf_PwmHl.h:184
IfxStdIf_PwmHl_Config::coutxOutputEnabled
Ifx_ActiveState coutxOutputEnabled
Definition: IfxStdIf_PwmHl.h:210
IfxStdIf_PwmHl_Config::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxStdIf_PwmHl.h:212
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxStdIf_PwmHl_setOnTimeAndShift
IFX_INLINE void IfxStdIf_PwmHl_setOnTimeAndShift(IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value.
Definition: IfxStdIf_PwmHl.h:296
IfxStdIf_PwmHl_SetMode
boolean(* IfxStdIf_PwmHl_SetMode)(IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode.
Definition: IfxStdIf_PwmHl.h:133
IfxStdIf_PwmHl_getDeadtimetick
IFX_INLINE float32 IfxStdIf_PwmHl_getDeadtimetick(IfxStdIf_PwmHl *stdIf)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:234
IfxStdIf_PwmHl_getMinPulse
IFX_INLINE float32 IfxStdIf_PwmHl_getMinPulse(IfxStdIf_PwmHl *stdIf)
Return the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:260


iLLD_TC26B: IfxStdIf_Timer.c Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_Timer.c
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_Timer.c
3 * \brief Standard interface: Timer
4 * \ingroup IfxStdIf
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxStdIf_Timer.h"
44
45 void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
46 {
47 config->frequency = 1000;
48 config->isrPriority = 0;
49 config->isrProvider = IfxSrc_Tos_cpu0;
50 config->minResolution = 0;
51 config->trigger.outputMode = IfxPort_OutputMode_pushPull;
52 config->trigger.outputDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
53 config->trigger.risingEdgeAtPeriod = FALSE;
54 config->trigger.outputEnabled = FALSE;
55 config->trigger.enabled = FALSE;
56 config->trigger.triggerPoint = 0;
57 config->trigger.isrPriority = 0;
58 config->trigger.isrProvider = IfxSrc_Tos_cpu0;
59 config->countDir = IfxStdIf_Timer_CountDir_up;
60 config->startOffset = 0.0;
61 }
62
63
64 static float32 IfxStdIf_Timer_nopGetFrequency(IfxStdIf_InterfaceDriver stdIf)
65 {
66 IFX_UNUSED_PARAMETER(stdIf);
67 return 0.0;
68 }
69 static Ifx_TimerValue IfxStdIf_Timer_nopGetPeriod(IfxStdIf_InterfaceDriver stdIf)
70 {
71 IFX_UNUSED_PARAMETER(stdIf);
72 return 0;
73 }
74 static float32 IfxStdIf_Timer_nopGetResolution(IfxStdIf_InterfaceDriver stdIf)
75 {
76 IFX_UNUSED_PARAMETER(stdIf);
77 return 0.0;
78 }
79 static Ifx_TimerValue IfxStdIf_Timer_nopGetTrigger(IfxStdIf_InterfaceDriver stdIf)
80 {
81 IFX_UNUSED_PARAMETER(stdIf);
82 return 0;
83 }
84 static boolean IfxStdIf_Timer_nopSetFrequency(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
85 {
86 IFX_UNUSED_PARAMETER(stdIf);
87 IFX_UNUSED_PARAMETER(frequency);
88 return FALSE;
89 }
90 static void IfxStdIf_Timer_nopUpdateInputFrequency(IfxStdIf_InterfaceDriver stdIf)
91 {
92 IFX_UNUSED_PARAMETER(stdIf);
93 }
94 static void IfxStdIf_Timer_nopApplyUpdate(IfxStdIf_InterfaceDriver stdIf)
95 {
96 IFX_UNUSED_PARAMETER(stdIf);
97 }
98 static void IfxStdIf_Timer_nopDisableUpdate(IfxStdIf_InterfaceDriver stdIf)
99 {
100 IFX_UNUSED_PARAMETER(stdIf);
101 }
102 static float32 IfxStdIf_Timer_nopGetInputFrequency(IfxStdIf_InterfaceDriver stdIf)
103 {
104 IFX_UNUSED_PARAMETER(stdIf);
105 return 0.0;
106 }
107 static void IfxStdIf_Timer_nopRun(IfxStdIf_InterfaceDriver stdIf)
108 {
109 IFX_UNUSED_PARAMETER(stdIf);
110 }
111 static boolean IfxStdIf_Timer_nopSetPeriod(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
112 {
113 IFX_UNUSED_PARAMETER(stdIf);
114 IFX_UNUSED_PARAMETER(period);
115 return FALSE;
116 }
117 static void IfxStdIf_Timer_nopSetSingleMode(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
118 {
119 IFX_UNUSED_PARAMETER(stdIf);
120 IFX_UNUSED_PARAMETER(enabled);
121 }
122 static void IfxStdIf_Timer_nopSetTrigger(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
123 {
124 IFX_UNUSED_PARAMETER(stdIf);
125 IFX_UNUSED_PARAMETER(triggerPoint);
126 }
127 static void IfxStdIf_Timer_nopStop(IfxStdIf_InterfaceDriver stdIf)
128 {
129 IFX_UNUSED_PARAMETER(stdIf);
130 }
131 static boolean IfxStdIf_Timer_nopAckTimerIrq(IfxStdIf_InterfaceDriver stdIf)
132 {
133 IFX_UNUSED_PARAMETER(stdIf);
134 return FALSE;
135 }
136 static boolean IfxStdIf_Timer_nopAckTriggerIrq(IfxStdIf_InterfaceDriver stdIf)
137 {
138 IFX_UNUSED_PARAMETER(stdIf);
139 return FALSE;
140 }
141
142
143 void IfxStdIf_Timer_initStdIf(IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)
144 {
145 stdIf->driver = driver;
146 stdIf->getFrequency =&IfxStdIf_Timer_nopGetFrequency ;
147 stdIf->getPeriod =&IfxStdIf_Timer_nopGetPeriod ;
148 stdIf->getResolution =&IfxStdIf_Timer_nopGetResolution ;
149 stdIf->getTrigger =&IfxStdIf_Timer_nopGetTrigger ;
150 stdIf->setFrequency =&IfxStdIf_Timer_nopSetFrequency ;
151 stdIf->updateInputFrequency =&IfxStdIf_Timer_nopUpdateInputFrequency;
152 stdIf->applyUpdate =&IfxStdIf_Timer_nopApplyUpdate ;
153 stdIf->disableUpdate =&IfxStdIf_Timer_nopDisableUpdate ;
154 stdIf->getInputFrequency =&IfxStdIf_Timer_nopGetInputFrequency ;
155 stdIf->run =&IfxStdIf_Timer_nopRun ;
156 stdIf->setPeriod =&IfxStdIf_Timer_nopSetPeriod ;
157 stdIf->setSingleMode =&IfxStdIf_Timer_nopSetSingleMode ;
158 stdIf->setTrigger =&IfxStdIf_Timer_nopSetTrigger ;
159 stdIf->stop =&IfxStdIf_Timer_nopStop ;
160 stdIf->ackTimerIrq =&IfxStdIf_Timer_nopAckTimerIrq ;
161 stdIf->ackTriggerIrq =&IfxStdIf_Timer_nopAckTriggerIrq ;
162 }
IfxStdIf_Timer_::getTrigger
IfxStdIf_Timer_GetTrigger getTrigger
Definition: IfxStdIf_Timer.h:243
IfxStdIf_Timer_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxStdIf_Timer.h:276
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:115
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:133
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:253
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:251
IfxStdIf_Timer_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Timer.h:239
IfxStdIf_Timer_TrigConfig::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver.
Definition: IfxStdIf_Timer.h:266
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:240
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:272
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStdIf_Timer_Config::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:275
IfxStdIf_Timer_::disableUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
Definition: IfxStdIf_Timer.h:247
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:144
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:279
IfxStdIf_Timer_TrigConfig::risingEdgeAtPeriod
boolean risingEdgeAtPeriod
Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset...
Definition: IfxStdIf_Timer.h:267
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxStdIf_Timer_initConfig
void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:45
IfxStdIf_Timer.h
Standard interface: Timer.
IfxStdIf_Timer_initStdIf
void IfxStdIf_Timer_initStdIf(IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)
Definition: IfxStdIf_Timer.c:143
IfxStdIf_Timer_CountDir_up
Timer is counting up.
Definition: IfxStdIf_Timer.h:87
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:248
IfxStdIf_Timer_TrigConfig::triggerPoint
Ifx_TimerValue triggerPoint
Trigger point in timer ticks.
Definition: IfxStdIf_Timer.h:262
IfxStdIf_Timer_::setTrigger
IfxStdIf_Timer_SetTrigger setTrigger
Definition: IfxStdIf_Timer.h:252
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:244
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:249
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:245
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:250
IfxStdIf_Timer_::ackTriggerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
Definition: IfxStdIf_Timer.h:255
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:274
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:242
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:278
IfxStdIf_Timer_Config::startOffset
float32 startOffset
FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
Definition: IfxStdIf_Timer.h:280
IfxStdIf_Timer_::applyUpdate
IfxStdIf_Timer_ApplyUpdate applyUpdate
Definition: IfxStdIf_Timer.h:246
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:261
IfxStdIf_Timer_TrigConfig::outputEnabled
boolean outputEnabled
If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
Definition: IfxStdIf_Timer.h:268
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:277
IfxStdIf_Timer_TrigConfig::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxStdIf_Timer.h:265
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:254
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:241


iLLD_TC26B: IfxStdIf_Timer.h Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_Timer.h
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_Timer.h
3 * \brief Standard interface: Timer
4 * \ingroup IfxStdIf
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 *
42 * \defgroup library_srvsw_stdif_timer Standard interface: Timer
43 * \ingroup library_srvsw_stdif
44 *
45 * The standard interface timer (Timer) abstract the hardware used for timer feature. It provide, after proper initialization an hardware
46 * independant way to interact with the timer functionallity like setting period, trigger points, ...
47 *
48 * The figure below shows the standard timer interface.
49 *
50 * \image html "Timer.png" "Standard timer interface"
51 *
52 * This interface defines the following features:
53 * - Timer with configurable frequency
54 * - Configurable counting direction
55 * - Optional interrupt on timer event with configurable service request provider and priority
56 * - Optional trigger signal with:
57 * - Optional interrupt on trigger event with configurable service request provider and priority
58 * - Configurable trigger point
59 * - Configurable trigger edge
60 * - trigger signal can be internal only or forwarded to a port pin
61 */
62
63 #ifndef IFXSTDIF_TIMER_H
64 #define IFXSTDIF_TIMER_H 1
65
66 #include "Cpu/Std/Ifx_Types.h"
67 #include "Src/Std/IfxSrc.h"
68 #include "Port/Std/IfxPort.h"
69 #include "IfxStdIf.h"
70 /** \brief Output event enable / disable */
71 typedef enum
72 {
73 IfxStdIf_Timer_Output_disabled, /**< \brief Timer output is set to the inactive, no change in the output */
74 IfxStdIf_Timer_Output_enabled /**< \brief In case the trigger is enabled,
75 * the output is set to active between time 0 to the trigger point,
76 * and is set to inactive between the trigger point and the period.
77 * In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_up, the output is toggled when the timer is reset
78 * In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_down, the output is toggled when the timer is reloaded
79 * In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_upAndDown, the output is toggled when the timer reach 0
80 * In case the trigger is enabled the trigger is active before the trigger point and inactive after the trigger point.
81 */
82 } IfxStdIf_Timer_OutputEvent;
83
84 /** \brief Timer increment direction */
85 typedef enum
86 {
87 IfxStdIf_Timer_CountDir_up, /**< \brief Timer is counting up */
88 IfxStdIf_Timer_CountDir_upAndDown, /**< \brief Timer is counting up and down */
89 IfxStdIf_Timer_CountDir_down /**< \brief Timer is counting down */
90 } IfxStdIf_Timer_CountDir;
91
92 /** \brief Forward declaration */
93 typedef struct IfxStdIf_Timer_ IfxStdIf_Timer;
94
95 /** \brief Return the timer frequency in Hz
96 * \param stdIf Pointer to the interface driver object
97 * \return Return the timer frequency in Hz
98 */
99 typedef float32 (*IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf);
100
101 /** \brief Return the timer period in ticks
102 * \param stdIf Pointer to the interface driver object
103 * \return Return the timer period in ticks
104 */
105 typedef Ifx_TimerValue (*IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf);
106
107 /** \brief Return the timer resolution in seconds
108 * \param stdIf Pointer to the interface driver object
109 * \return Return the timer resolution in seconds
110 */
111 typedef float32 (*IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf);
112
113 /** \brief Return the timer trigger point
114 * \param stdIf Pointer to the interface driver object
115 * \return Return the timer timer point
116 */
117 typedef Ifx_TimerValue (*IfxStdIf_Timer_GetTrigger)(IfxStdIf_InterfaceDriver stdIf);
118
119 /** \brief Set the timer frequency in Hz
120 * \param stdIf Pointer to the interface driver object
121 * \param frequency Requested timer frequency in Hz
122 * \retval TRUE The requested frequency could be set
123 * \retval FALSE The requested frequency is out of range
124 */
125 typedef boolean (*IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency);
126
127 /** \brief Indicates the stdIf that the imput frequency has changed and that it should be taken in account
128 * \param stdIf Pointer to the interface driver object
129 * \return None
130 */
131 typedef void (*IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf);
132
133 /** \brief Apply requested updates.
134 *
135 * Such requested update are calls to:
136 * - IfxStdIf_Timer_setSingleMode()
137 * - IfxStdIf_Timer_setTrigger()
138 * - IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency()
139 * as well as PWM generation related calls such as:
140 * - IfxStdIf_PwmHl_setDeadtime()
141 * - IfxStdIf_PwmHl_setMode()
142 * - IfxStdIf_PwmHl_setOnTime()
143 * - IfxStdIf_PwmHl_setupChannels()
144 *
145 * It is important to note, that only one call to Timer_applyUpdate() is allowed within
146 * one timer period!!!
147 * In order to ensure correct update synchronisation, disableUpdate() should have been called previously.
148 *
149 * \param stdIf Pointer to the interface driver object
150 * \return None
151 */
152 typedef void (*IfxStdIf_Timer_ApplyUpdate)(IfxStdIf_InterfaceDriver stdIf);
153
154 /** \brief Disable updates
155 *
156 * The following API action will not be taken in account before applyUpdate is called:
157 * - IfxStdIf_Timer_setSingleMode()
158 * - IfxStdIf_Timer_setTrigger()
159 * - IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency()
160 * as well as PWM generation related calls such as:
161 * - IfxStdIf_PwmHl_setDeadtime()
162 * - IfxStdIf_PwmHl_setMode()
163 * - IfxStdIf_PwmHl_setOnTime()
164 * - IfxStdIf_PwmHl_setupChannels()
165 *
166 * \param stdIf Pointer to the interface driver object
167 * \return None
168 */
169 typedef void (*IfxStdIf_Timer_DisableUpdate)(IfxStdIf_InterfaceDriver stdIf);
170
171 /** \brief Return the timer input frequency in Hz
172 * \param stdIf Pointer to the interface driver object
173 * \return Return the timer input frequency in Hz
174 */
175 typedef float32 (*IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf);
176
177 /** \brief Immediately start the timer.
178 *
179 * Please note that other mechanism may avoid the timer to tick, such as when the
180 * global (input) clock to the timer block is inactive.
181 * \param stdIf Pointer to the interface driver object
182 * \return none
183 */
184 typedef void (*IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf);
185
186 /** \brief Set the timer period.
187 *
188 * Timer_applyUpdate() shall be invoked in order this to take effect.
189 * \param stdIf Pointer to the interface driver object
190 * \param period Period value in ticks
191 * \retval TRUE The requested period could be set
192 * \retval FALSE The requested period is out of range
193 */
194 typedef boolean (*IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period);
195
196 /** \brief Stop timer at the end of the period
197 *
198 * Timer_applyUpdate() shall be invoked in order this to take effect.
199 * \param stdIf Pointer to the interface driver object
200 * \param enabled If TRUE, enable the single mode, else disable the single mode (continuous mode)
201 * \return none
202 */
203 typedef void (*IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled);
204
205 /** \brief Set trigger point.
206 *
207 * \see Timer_OutputEvent for the definition of the output level.
208 * Active state is defined by Timer_Config::outputActiveState.
209 *
210 * Timer_applyUpdate() shall be invoked in order this to take effect.
211 * \param stdIf Pointer to the interface driver object
212 * \param triggerPoint Trigger point in ticks from the period start.
213 * \return none
214 */
215 typedef void (*IfxStdIf_Timer_SetTrigger)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint);
216
217 /** \brief Immediately stops the timer
218 * \param stdIf Pointer to the interface driver object
219 * \return none
220 */
221 typedef void (*IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf);
222
223 /** \brief Return the timer interrupt flag and reset it
224 * \param stdIf Pointer to the interface driver object
225 * \return Return the timer interrupt flag
226 */
227 typedef boolean (*IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf);
228
229 /** \brief Return the trigger interrupt flag and reset it
230 * \param stdIf Pointer to the interface driver object
231 * \return Return the trigger interrupt flag
232 */
233 typedef boolean (*IfxStdIf_Timer_AckTriggerIrq)(IfxStdIf_InterfaceDriver stdIf);
234
235 /** \brief Standard interface object
236 */
237 struct IfxStdIf_Timer_
238 {
239 IfxStdIf_InterfaceDriver driver; /**< \brief Interface driver object */
240 IfxStdIf_Timer_GetFrequency getFrequency; /**< \brief \see IfxStdIf_Timer_GetFrequency */
241 IfxStdIf_Timer_GetPeriod getPeriod; /**< \brief \see IfxStdIf_Timer_GetPeriod */
242 IfxStdIf_Timer_GetResolution getResolution; /**< \brief \see IfxStdIf_Timer_GetResolution */
243 IfxStdIf_Timer_GetTrigger getTrigger; /**< \brief \see IfxStdIf_Timer_GetTrigger */
244 IfxStdIf_Timer_SetFrequency setFrequency; /**< \brief \see IfxStdIf_Timer_SetFrequency */
245 IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency; /**< \brief \see IfxStdIf_Timer_UpdateInputFrequency */
246 IfxStdIf_Timer_ApplyUpdate applyUpdate; /**< \brief \see IfxStdIf_Timer_ApplyUpdate */
247 IfxStdIf_Timer_DisableUpdate disableUpdate; /**< \brief \see IfxStdIf_Timer_DisableUpdate */
248 IfxStdIf_Timer_GetInputFrequency getInputFrequency; /**< \brief \see IfxStdIf_Timer_GetInputFrequency */
249 IfxStdIf_Timer_Run run; /**< \brief \see IfxStdIf_Timer_Run */
250 IfxStdIf_Timer_SetPeriod setPeriod; /**< \brief \see IfxStdIf_Timer_SetPeriod */
251 IfxStdIf_Timer_SetSingleMode setSingleMode; /**< \brief \see IfxStdIf_Timer_SetSingleMode */
252 IfxStdIf_Timer_SetTrigger setTrigger; /**< \brief \see IfxStdIf_Timer_SetTrigger */
253 IfxStdIf_Timer_Stop stop; /**< \brief \see IfxStdIf_Timer_Stop */
254 IfxStdIf_Timer_AckTimerIrq ackTimerIrq; /**< \brief \see IfxStdIf_Timer_AckTimerIrq */
255 IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq; /**< \brief \see IfxStdIf_Timer_AckTriggerIrq */
256 };
257
258 /** \brief Trigger configuration */
259 typedef struct
260 {
261 boolean enabled; /**< \brief If true, the trigger functionality is Initialised, else ignored */
262 Ifx_TimerValue triggerPoint; /**< \brief Trigger point in timer ticks */
263 Ifx_Priority isrPriority; /**< \brief Interrupt isrPriority of the trigger interrupt, if 0 the interrupt is disable */
264 IfxSrc_Tos isrProvider; /**< \brief Interrupt service provider for the trigger interrupt */
265 IfxPort_OutputMode outputMode; /**< \brief Output mode */
266 IfxPort_PadDriver outputDriver; /**< \brief Output pad driver */
267 boolean risingEdgeAtPeriod; /**< \brief Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset. When the timer is stopped, the output is set to high */
268 boolean outputEnabled; /**< \brief If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized. */
269 } IfxStdIf_Timer_TrigConfig;
270
271 /** \brief Timer configuration */
272 typedef struct
273 {
274 float32 frequency; /**< \brief PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer. */
275 Ifx_Priority isrPriority; /**< \brief Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable */
276 IfxSrc_Tos isrProvider; /**< \brief Interrupt service provider for the timer interrupt */
277 float32 minResolution; /**< \brief Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration does not enable this setting a warning is given */
278 IfxStdIf_Timer_TrigConfig trigger; /**< \brief Trigger configuration */
279 IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
280 float32 startOffset; /**< \brief FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period */
281 } IfxStdIf_Timer_Config;
282
283 /** \addtogroup library_srvsw_stdif_timer
284 * \{
285 */
286 /** \copydoc IfxStdIf_Timer_GetFrequency
287 * \param stdIf Standard interface pointer
288 */
289 IFX_INLINE float32 IfxStdIf_Timer_getFrequency(IfxStdIf_Timer *stdIf)
290 {
291 return stdIf->getFrequency(stdIf->driver);
292 }
293
294
295 /** \copydoc IfxStdIf_Timer_GetPeriod
296 * \param stdIf Standard interface pointer
297 */
298 IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getPeriod(IfxStdIf_Timer *stdIf)
299 {
300 return stdIf->getPeriod(stdIf->driver);
301 }
302
303
304 /** \copydoc IfxStdIf_Timer_GetTrigger
305 * \param stdIf Standard interface pointer
306 */
307 IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getTrigger(IfxStdIf_Timer *stdIf)
308 {
309 return stdIf->getTrigger(stdIf->driver);
310 }
311
312
313 /** \copydoc IfxStdIf_Timer_GetResolution
314 * \param stdIf Standard interface pointer
315 */
316 IFX_INLINE float32 IfxStdIf_Timer_getResolution(IfxStdIf_Timer *stdIf)
317 {
318 return stdIf->getResolution(stdIf->driver);
319 }
320
321
322 /** \copydoc IfxStdIf_Timer_SetFrequency
323 * \param stdIf Standard interface pointer
324 */
325 IFX_INLINE boolean IfxStdIf_Timer_setFrequency(IfxStdIf_Timer *stdIf, float32 frequency)
326 {
327 return stdIf->setFrequency(stdIf->driver, frequency);
328 }
329
330
331 /** \copydoc IfxStdIf_Timer_UpdateInputFrequency
332 * \param stdIf Standard interface pointer
333 */
334 IFX_INLINE void IfxStdIf_Timer_updateInputFrequency(IfxStdIf_Timer *stdIf)
335 {
336 stdIf->updateInputFrequency(stdIf->driver);
337 }
338
339
340 /** \copydoc IfxStdIf_Timer_ApplyUpdate
341 * \param stdIf Standard interface pointer
342 */
343 IFX_INLINE void IfxStdIf_Timer_applyUpdate(IfxStdIf_Timer *stdIf)
344 {
345 stdIf->applyUpdate(stdIf->driver);
346 }
347
348
349 /** \copydoc IfxStdIf_Timer_DisableUpdate
350 * \param stdIf Standard interface pointer
351 */
352 IFX_INLINE void IfxStdIf_Timer_disableUpdate(IfxStdIf_Timer *stdIf)
353 {
354 stdIf->disableUpdate(stdIf->driver);
355 }
356
357
358 /** \copydoc IfxStdIf_Timer_GetInputFrequency
359 * \param stdIf Standard interface pointer
360 */
361 IFX_INLINE float32 IfxStdIf_Timer_getInputFrequency(IfxStdIf_Timer *stdIf)
362 {
363 return stdIf->getInputFrequency(stdIf->driver);
364 }
365
366
367 /** \copydoc IfxStdIf_Timer_Run
368 * \param stdIf Standard interface pointer
369 */
370 IFX_INLINE void IfxStdIf_Timer_run(IfxStdIf_Timer *stdIf)
371 {
372 stdIf->run(stdIf->driver);
373 }
374
375
376 /** \copydoc IfxStdIf_Timer_SetPeriod
377 * \param stdIf Standard interface pointer
378 */
379 IFX_INLINE boolean IfxStdIf_Timer_setPeriod(IfxStdIf_Timer *stdIf, Ifx_TimerValue period)
380 {
381 return stdIf->setPeriod(stdIf->driver, period);
382 }
383
384
385 /** \copydoc IfxStdIf_Timer_SetSingleMode
386 * \param stdIf Standard interface pointer
387 */
388 IFX_INLINE void IfxStdIf_Timer_setSingleMode(IfxStdIf_Timer *stdIf, boolean enabled)
389 {
390 stdIf->setSingleMode(stdIf->driver, enabled);
391 }
392
393
394 /** \copydoc IfxStdIf_Timer_SetTrigger
395 * \param stdIf Standard interface pointer
396 */
397 IFX_INLINE void IfxStdIf_Timer_setTrigger(IfxStdIf_Timer *stdIf, Ifx_TimerValue triggerPoint)
398 {
399 stdIf->setTrigger(stdIf->driver, triggerPoint);
400 }
401
402
403 /** \copydoc IfxStdIf_Timer_Stop
404 * \param stdIf Standard interface pointer
405 */
406 IFX_INLINE void IfxStdIf_Timer_stop(IfxStdIf_Timer *stdIf)
407 {
408 stdIf->stop(stdIf->driver);
409 }
410
411
412 /** \copydoc IfxStdIf_Timer_AckTimerIrq
413 * \param stdIf Standard interface pointer
414 */
415 IFX_INLINE boolean IfxStdIf_Timer_ackTimerIrq(IfxStdIf_Timer *stdIf)
416 {
417 return stdIf->ackTimerIrq(stdIf->driver);
418 }
419
420
421 /** \copydoc IfxStdIf_Timer_AckTriggerIrq
422 * \param stdIf Standard interface pointer
423 */
424 IFX_INLINE boolean IfxStdIf_Timer_ackTriggerIrq(IfxStdIf_Timer *stdIf)
425 {
426 return stdIf->ackTriggerIrq(stdIf->driver);
427 }
428
429
430 /** \brief Convert timer ticks to seconds
431 * \param clockFreq Timer clock frequency
432 * \param ticks time value in ticks to be converted
433 * \return Return the converted time in s
434 */
435 IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
436 {
437 return ticks / clockFreq;
438 }
439
440
441 /** \brief Convert seconds to timer ticks
442 * \param clockFreq Timer clock frequency
443 * \param seconds time value in seconds to be converted
444 * \return Return the converted time in timer ticks
445 */
446 IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
447 {
448 return seconds * clockFreq;
449 }
450
451
452 /** \brief Return the timer period in second
453 * \param stdIf Pointer to the interface driver object
454 */
455 IFX_INLINE float32 IfxStdIf_Timer_getPeriodSecond(IfxStdIf_Timer *stdIf)
456 {
457 return IfxStdIf_Timer_tickToS(IfxStdIf_Timer_getInputFrequency(stdIf), stdIf->getPeriod(stdIf->driver));
458 }
459
460
461 /** \} */
462
463 /** Initialize the configuration structure to default
464 *
465 * \param config Timer configuration. This parameter is initialised by the function
466 *
467 */
468 IFX_EXTERN void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config);
469
470 /** Initialize the stdIf so that all call back function default to no operation
471 *
472 * \param stdIf Pointer to the interface driver object
473 * \param driver Interface driver object
474 *
475 */
476 IFX_EXTERN void IfxStdIf_Timer_initStdIf(IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver);
477
478 #endif /* IFXSTDIF_TIMER_H */
IfxStdIf_Timer_::getTrigger
IfxStdIf_Timer_GetTrigger getTrigger
Definition: IfxStdIf_Timer.h:243
IfxStdIf_Timer_setTrigger
IFX_INLINE void IfxStdIf_Timer_setTrigger(IfxStdIf_Timer *stdIf, Ifx_TimerValue triggerPoint)
Set trigger point.
Definition: IfxStdIf_Timer.h:397
IfxStdIf_Timer_GetTrigger
Ifx_TimerValue(* IfxStdIf_Timer_GetTrigger)(IfxStdIf_InterfaceDriver stdIf)
Return the timer trigger point.
Definition: IfxStdIf_Timer.h:117
IfxStdIf_Timer_TrigConfig::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the trigger interrupt.
Definition: IfxStdIf_Timer.h:264
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:115
IfxStdIf_Timer_getPeriod
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getPeriod(IfxStdIf_Timer *stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:298
IfxStdIf_Timer_GetFrequency
float32(* IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:99
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxStdIf_Timer_stop
IFX_INLINE void IfxStdIf_Timer_stop(IfxStdIf_Timer *stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:406
IfxStdIf_Timer_AckTriggerIrq
boolean(* IfxStdIf_Timer_AckTriggerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the trigger interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:233
IfxStdIf_Timer_UpdateInputFrequency
void(* IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:131
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:253
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:251
IfxStdIf_Timer_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Timer.h:239
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
IfxStdIf_Timer_Output_disabled
Timer output is set to the inactive, no change in the output.
Definition: IfxStdIf_Timer.h:73
IfxStdIf_Timer_TrigConfig::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver.
Definition: IfxStdIf_Timer.h:266
IfxStdIf.h
Standard interface types.
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxStdIf_Timer_SetFrequency
boolean(* IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:125
IfxStdIf_Timer_updateInputFrequency
IFX_INLINE void IfxStdIf_Timer_updateInputFrequency(IfxStdIf_Timer *stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:334
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Timer_initStdIf
IFX_EXTERN void IfxStdIf_Timer_initStdIf(IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)
Definition: IfxStdIf_Timer.c:143
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxStdIf_Timer_run
IFX_INLINE void IfxStdIf_Timer_run(IfxStdIf_Timer *stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:370
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:240
IfxSrc.h
SRC basic functionality.
IfxStdIf_Timer_GetResolution
float32(* IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:111
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:272
IfxStdIf_Timer_getInputFrequency
IFX_INLINE float32 IfxStdIf_Timer_getInputFrequency(IfxStdIf_Timer *stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:361
IfxStdIf_Timer_OutputEvent
IfxStdIf_Timer_OutputEvent
Output event enable / disable.
Definition: IfxStdIf_Timer.h:71
IfxStdIf_Timer_initConfig
IFX_EXTERN void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:45
IfxStdIf_Timer_TrigConfig::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the trigger interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:263
IfxStdIf_Timer_CountDir_upAndDown
Timer is counting up and down.
Definition: IfxStdIf_Timer.h:88
IfxStdIf_Timer_setSingleMode
IFX_INLINE void IfxStdIf_Timer_setSingleMode(IfxStdIf_Timer *stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:388
IfxStdIf_Timer_ackTriggerIrq
IFX_INLINE boolean IfxStdIf_Timer_ackTriggerIrq(IfxStdIf_Timer *stdIf)
Return the trigger interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:424
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStdIf_Timer_TrigConfig
Trigger configuration.
Definition: IfxStdIf_Timer.h:259
IfxStdIf_Timer_::disableUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
Definition: IfxStdIf_Timer.h:247
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxStdIf_Timer_Output_enabled
In case the trigger is enabled, the output is set to active between time 0 to the trigger point...
Definition: IfxStdIf_Timer.h:74
IfxStdIf_Timer_applyUpdate
IFX_INLINE void IfxStdIf_Timer_applyUpdate(IfxStdIf_Timer *stdIf)
Apply requested updates.
Definition: IfxStdIf_Timer.h:343
IfxStdIf_Timer_GetInputFrequency
float32(* IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:175
IfxStdIf_Timer_SetTrigger
void(* IfxStdIf_Timer_SetTrigger)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
Set trigger point.
Definition: IfxStdIf_Timer.h:215
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:279
IfxStdIf_Timer_TrigConfig::risingEdgeAtPeriod
boolean risingEdgeAtPeriod
Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset...
Definition: IfxStdIf_Timer.h:267
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxStdIf_Timer_CountDir_up
Timer is counting up.
Definition: IfxStdIf_Timer.h:87
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:248
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxStdIf_Timer_CountDir
IfxStdIf_Timer_CountDir
Timer increment direction.
Definition: IfxStdIf_Timer.h:85
IfxStdIf_Timer_CountDir_down
Timer is counting down.
Definition: IfxStdIf_Timer.h:89
IfxStdIf_Timer_setPeriod
IFX_INLINE boolean IfxStdIf_Timer_setPeriod(IfxStdIf_Timer *stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:379
boolean
unsigned char boolean
Definition: Platform_Types.h:104
IfxStdIf_Timer_TrigConfig::triggerPoint
Ifx_TimerValue triggerPoint
Trigger point in timer ticks.
Definition: IfxStdIf_Timer.h:262
IfxStdIf_Timer_getTrigger
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getTrigger(IfxStdIf_Timer *stdIf)
Return the timer trigger point.
Definition: IfxStdIf_Timer.h:307
IfxStdIf_Timer_::setTrigger
IfxStdIf_Timer_SetTrigger setTrigger
Definition: IfxStdIf_Timer.h:252
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:244
IfxStdIf_Timer_getResolution
IFX_INLINE float32 IfxStdIf_Timer_getResolution(IfxStdIf_Timer *stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:316
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:249
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:245
IfxStdIf_Timer_ackTimerIrq
IFX_INLINE boolean IfxStdIf_Timer_ackTimerIrq(IfxStdIf_Timer *stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:415
IfxStdIf_Timer_GetPeriod
Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:105
IfxStdIf_Timer_DisableUpdate
void(* IfxStdIf_Timer_DisableUpdate)(IfxStdIf_InterfaceDriver stdIf)
Disable updates.
Definition: IfxStdIf_Timer.h:169
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:250
IfxStdIf_Timer_disableUpdate
IFX_INLINE void IfxStdIf_Timer_disableUpdate(IfxStdIf_Timer *stdIf)
Disable updates.
Definition: IfxStdIf_Timer.h:352
IfxStdIf_Timer_::ackTriggerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
Definition: IfxStdIf_Timer.h:255
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:274
IfxStdIf_Timer_ApplyUpdate
void(* IfxStdIf_Timer_ApplyUpdate)(IfxStdIf_InterfaceDriver stdIf)
Apply requested updates.
Definition: IfxStdIf_Timer.h:152
IfxStdIf_Timer_getFrequency
IFX_INLINE float32 IfxStdIf_Timer_getFrequency(IfxStdIf_Timer *stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:289
IfxStdIf_Timer_Run
void(* IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:184
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:242
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:278
IfxStdIf_Timer_getPeriodSecond
IFX_INLINE float32 IfxStdIf_Timer_getPeriodSecond(IfxStdIf_Timer *stdIf)
Return the timer period in second.
Definition: IfxStdIf_Timer.h:455
IfxStdIf_Timer_Config::startOffset
float32 startOffset
FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
Definition: IfxStdIf_Timer.h:280
IfxStdIf_Timer_Stop
void(* IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:221
IfxStdIf_Timer_::applyUpdate
IfxStdIf_Timer_ApplyUpdate applyUpdate
Definition: IfxStdIf_Timer.h:246
IfxStdIf_Timer_AckTimerIrq
boolean(* IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:227
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:261
IfxStdIf_Timer_TrigConfig::outputEnabled
boolean outputEnabled
If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
Definition: IfxStdIf_Timer.h:268
IfxStdIf_Timer_SetPeriod
boolean(* IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:194
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:277
IfxStdIf_Timer_setFrequency
IFX_INLINE boolean IfxStdIf_Timer_setFrequency(IfxStdIf_Timer *stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:325
IfxStdIf_Timer_TrigConfig::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxStdIf_Timer.h:265
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:254
IfxStdIf_Timer_SetSingleMode
void(* IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:203
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:241
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxStm.c Source File

  • Stm
  • Std
IfxStm.c
Go to the documentation of this file.
1 /**
2 * \file IfxStm.c
3 * \brief STM basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxStm.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 void IfxStm_clearCompareFlag(Ifx_STM *stm, IfxStm_Comparator comparator)
53 {
54 if (comparator == IfxStm_Comparator_0)
55 {
56 stm->ISCR.B.CMP0IRR = 1U;
57 }
58 else if (comparator == IfxStm_Comparator_1)
59 {
60 stm->ISCR.B.CMP1IRR = 1U;
61 }
62 }
63
64
65 void IfxStm_disableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
66 {
67 if (comparator == IfxStm_Comparator_0)
68 {
69 stm->ICR.B.CMP0EN = 0U;
70 }
71 else // if (comparator == IfxStm_Comparator_1)
72 {
73 stm->ICR.B.CMP1EN = 0U;
74 }
75 }
76
77
78 void IfxStm_disableModule(Ifx_STM *stm)
79 {
80 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
81
82 IfxScuWdt_clearCpuEndinit(passwd);
83 stm->CLC.B.DISR = 1;
84 IfxScuWdt_setCpuEndinit(passwd);
85 }
86
87
88 void IfxStm_enableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
89 {
90 if (comparator == IfxStm_Comparator_0)
91 {
92 stm->ICR.B.CMP0EN = 1U;
93 }
94 else if (comparator == IfxStm_Comparator_1)
95 {
96 stm->ICR.B.CMP1EN = 1U;
97 }
98 }
99
100
101 void IfxStm_enableOcdsSuspend(Ifx_STM *stm)
102 {
103 Ifx_STM_OCS ocs = stm->OCS;
104
105 /* Only if OCDS is enabled write into the OCS register */
106 if (MODULE_CBS.OSTATE.B.OEN == 1U)
107 {
108 ocs.B.SUS_P = 1;
109 ocs.B.SUS = 2;
110 stm->OCS = ocs;
111 stm->OCS.B.SUS_P = 0;
112 }
113 }
114
115
116 Ifx_STM *IfxStm_getAddress(IfxStm_Index stm)
117 {
118 Ifx_STM *module;
119
120 if (stm < IFXSTM_NUM_MODULES)
121 {
122 module = (Ifx_STM *)IfxStm_cfg_indexMap[stm].module;
123 }
124 else
125 {
126 module = NULL_PTR;
127 }
128
129 return module;
130 }
131
132
133 IfxStm_Index IfxStm_getIndex(Ifx_STM *stm)
134 {
135 uint32 index;
136 IfxStm_Index result;
137
138 result = IfxStm_Index_none;
139
140 for (index = 0; index < IFXSTM_NUM_MODULES; index++)
141 {
142 if (IfxStm_cfg_indexMap[index].module == stm)
143 {
144 result = (IfxStm_Index)IfxStm_cfg_indexMap[index].index;
145 break;
146 }
147 }
148
149 return result;
150 }
151
152
153 volatile Ifx_SRC_SRCR *IfxStm_getSrcPointer(Ifx_STM *stm, IfxStm_Comparator comparator)
154 {
155 IfxStm_Index index;
156 index = IfxStm_getIndex(stm);
157 return comparator == IfxStm_Comparator_0 ? &MODULE_SRC.STM.STM[index].SR0 : &MODULE_SRC.STM.STM[index].SR1;
158 }
159
160
161 boolean IfxStm_initCompare(Ifx_STM *stm, const IfxStm_CompareConfig *config)
162 {
163 sint32 index;
164 boolean result;
165 Ifx_STM_CMCON comcon = stm->CMCON;
166 Ifx_STM_ICR icr = stm->ICR;
167
168 if (config->comparator == 0)
169 {
170 comcon.B.MSIZE0 = config->compareSize;
171 comcon.B.MSTART0 = config->compareOffset;
172 icr.B.CMP0OS = config->comparatorInterrupt;
173 result = TRUE;
174 }
175 else if (config->comparator == 1)
176 {
177 comcon.B.MSIZE1 = config->compareSize;
178 comcon.B.MSTART1 = config->compareOffset;
179 icr.B.CMP1OS = config->comparatorInterrupt;
180 result = TRUE;
181 }
182 else
183 {
184 /*Invalid value */
185 result = FALSE;
186 }
187
188 stm->ICR.U = icr.U;
189 stm->CMCON.U = comcon.U;
190
191 /* configure interrupt */
192 index = IfxStm_getIndex(stm);
193
194 if (config->triggerPriority > 0)
195 {
196 volatile Ifx_SRC_SRCR *srcr;
197
198 if (config->comparatorInterrupt == IfxStm_ComparatorInterrupt_ir0)
199 {
200 srcr = &(MODULE_SRC.STM.STM[index].SR0);
201 }
202 else
203 {
204 srcr = &(MODULE_SRC.STM.STM[index].SR1);
205 }
206
207 IfxSrc_init(srcr, config->typeOfService, config->triggerPriority);
208 IfxSrc_enable(srcr);
209 }
210
211 /*Configure the comparator ticks to current value to avoid any wrong triggering*/
212 stm->CMP[config->comparator].U = IfxStm_getOffsetTimer(stm, (uint8)config->compareOffset);
213
214 /* clear the interrupt flag of the selected comparator before enabling the interrupt */
215 /* this is to avaoid the unneccesary interrupt for the compare match of reset values of the registers */
216 IfxStm_clearCompareFlag(stm, config->comparator);
217 /* enable the interrupt for the selected comparator */
218 IfxStm_enableComparatorInterrupt(stm, config->comparator);
219
220 /*Configure the comparator ticks */
221 stm->CMP[config->comparator].U = IfxStm_getOffsetTimer(stm, (uint8)config->compareOffset) + config->ticks;
222
223 return result;
224 }
225
226
227 void IfxStm_initCompareConfig(IfxStm_CompareConfig *config)
228 {
229 config->comparator = IfxStm_Comparator_0;
230 config->compareOffset = IfxStm_ComparatorOffset_0;
231 config->compareSize = IfxStm_ComparatorSize_32Bits;
232 config->comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0; /*User must select the interrupt output */
233 config->ticks = 0xFFFFFFFF;
234 config->triggerPriority = 0;
235 config->typeOfService = IfxSrc_Tos_cpu0;
236 }
237
238
239 boolean IfxStm_isCompareFlagSet(Ifx_STM *stm, IfxStm_Comparator comparator)
240 {
241 if (comparator == IfxStm_Comparator_0)
242 {
243 return stm->ICR.B.CMP0IR;
244 }
245 else // if (comparator == IfxStm_Comparator_1)
246 {
247 return stm->ICR.B.CMP1IR;
248 }
249 }
250
251
252 void IfxStm_resetModule(Ifx_STM *stm)
253 {
254 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
255
256 IfxScuWdt_clearCpuEndinit(passwd);
257 stm->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
258 stm->KRST1.B.RST = 1;
259 IfxScuWdt_setCpuEndinit(passwd);
260
261 while (0 == stm->KRST0.B.RSTSTAT) /* Wait until reset is executed */
262
263 {}
264
265 IfxScuWdt_clearCpuEndinit(passwd);
266 stm->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
267
268 IfxScuWdt_setCpuEndinit(passwd);
269 }
270
271
272 void IfxStm_setCompareControl(Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
273 {
274 Ifx_STM_CMCON comcon = stm->CMCON;
275 Ifx_STM_ICR icr = stm->ICR;
276
277 if (comparator == 0)
278 {
279 comcon.B.MSIZE0 = size;
280 comcon.B.MSTART0 = offset;
281 icr.B.CMP0OS = interrupt;
282 }
283 else // if (comparator == 1)
284 {
285 comcon.B.MSIZE1 = size;
286 comcon.B.MSTART1 = offset;
287 icr.B.CMP1OS = interrupt;
288 }
289
290 stm->ICR.U = icr.U;
291 stm->CMCON.U = comcon.U;
292 }
IfxStm_ComparatorSize
IfxStm_ComparatorSize
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0...
Definition: IfxStm.h:211
IfxStm.h
STM basic functionality.
IfxStm_Comparator_1
Comparator Id 1.
Definition: IfxStm.h:160
IfxStm_CompareConfig::compareOffset
IfxStm_ComparatorOffset compareOffset
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2).
Definition: IfxStm.h:279
IfxStm_isCompareFlagSet
boolean IfxStm_isCompareFlagSet(Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set.
Definition: IfxStm.c:239
IfxStm_enableOcdsSuspend
void IfxStm_enableOcdsSuspend(Ifx_STM *stm)
enable suspend by debugger. Note: The API will write into the OCS register only if OCDS is enabled ...
Definition: IfxStm.c:101
IfxStm_Index
IfxStm_Index
List of the available STM resources.
Definition: IfxStm_cfg.h:84
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStm_Comparator
IfxStm_Comparator
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2)
Definition: IfxStm.h:157
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
IfxStm_getAddress
Ifx_STM * IfxStm_getAddress(IfxStm_Index stm)
Returns the module index of the selected STM module.
Definition: IfxStm.c:116
IfxStm_getOffsetTimer
IFX_INLINE uint32 IfxStm_getOffsetTimer(Ifx_STM *stm, uint8 offset)
Returns the timer value shifted right by offset.
Definition: IfxStm.h:646
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxStm_initCompareConfig
void IfxStm_initCompareConfig(IfxStm_CompareConfig *config)
Initialise compare configuration with default values.
Definition: IfxStm.c:227
IfxStm_CompareConfig::triggerPriority
Ifx_Priority triggerPriority
Interrupt priority. Range = 0 .. 255. 0 = interrupt is disabled.
Definition: IfxStm.h:282
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IFXSTM_NUM_MODULES
#define IFXSTM_NUM_MODULES
STM count.
Definition: IfxStm_cfg.h:70
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStm_ComparatorInterrupt_ir0
Select STMIR0.
Definition: IfxStm.h:167
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxStm_CompareConfig::ticks
uint32 ticks
count for next comparison from current timer count.
Definition: IfxStm.h:281
IfxStm_disableModule
void IfxStm_disableModule(Ifx_STM *stm)
Disables the Stm module.
Definition: IfxStm.c:78
IfxStm_ComparatorSize_32Bits
Size of compare value to compare with timer: 32 bits.
Definition: IfxStm.h:244
IfxStm_CompareConfig::comparatorInterrupt
IfxStm_ComparatorInterrupt comparatorInterrupt
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1).
Definition: IfxStm.h:278
IfxStm_CompareConfig
Comparator Configuration Structure.
Definition: IfxStm.h:275
IfxStm_initCompare
boolean IfxStm_initCompare(Ifx_STM *stm, const IfxStm_CompareConfig *config)
Initialise stm compare register.
Definition: IfxStm.c:161
IfxStm_getIndex
IfxStm_Index IfxStm_getIndex(Ifx_STM *stm)
API to get the resource index of the STM specified.
Definition: IfxStm.c:133
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxStm_setCompareControl
void IfxStm_setCompareControl(Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior.
Definition: IfxStm.c:272
IfxStm_ComparatorOffset_0
Comparator start bit position 0 with 64 bit timer.
Definition: IfxStm.h:175
IfxStm_Comparator_0
Comparator Id 0.
Definition: IfxStm.h:159
IfxStm_getSrcPointer
volatile Ifx_SRC_SRCR * IfxStm_getSrcPointer(Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator.
Definition: IfxStm.c:153
IfxStm_clearCompareFlag
void IfxStm_clearCompareFlag(Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag.
Definition: IfxStm.c:52
IfxStm_ComparatorOffset
IfxStm_ComparatorOffset
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2)
Definition: IfxStm.h:173
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxStm_CompareConfig::typeOfService
IfxSrc_Tos typeOfService
Type of service.
Definition: IfxStm.h:283
IfxStm_enableComparatorInterrupt
void IfxStm_enableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt .
Definition: IfxStm.c:88
sint32
long sint32
Definition: Platform_Types.h:134
IfxStm_resetModule
void IfxStm_resetModule(Ifx_STM *stm)
Definition: IfxStm.c:252
IfxStm_ComparatorInterrupt
IfxStm_ComparatorInterrupt
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1)
Definition: IfxStm.h:165
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxStm_Index_none
Not Selected.
Definition: IfxStm_cfg.h:86
IfxStm_CompareConfig::compareSize
IfxStm_ComparatorSize compareSize
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0...
Definition: IfxStm.h:280
TRUE
#define TRUE
Definition: Platform_Types.h:90
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxStm_disableComparatorInterrupt
void IfxStm_disableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt.
Definition: IfxStm.c:65
IfxStm_CompareConfig::comparator
IfxStm_Comparator comparator
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2).
Definition: IfxStm.h:277
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxStm_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES]
Definition: IfxStm_cfg.c:52


iLLD_TC26B: IfxStm.h Source File

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IfxStm.h
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1 /**
2 * \file IfxStm.h
3 * \brief STM basic functionality
4 * \ingroup IfxLld_Stm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Stm_Usage How to use the Stm driver?
42 * \ingroup IfxLld_Stm
43 *
44 * The Stm Standard driver provides APIs to initialize, configure and control the Stm.
45 *
46 * In the following sections it will be described, how to integrate the driver into the application framework.
47 *
48 * \section IfxLld_Stm_Preparation Preparation
49 * \subsection IfxLld_Stm_Include Include Files
50 *
51 * Include following header file into your C code:
52 * \code
53 * #include <Stm/Std/IfxStm.h>
54 * \endcode
55 *
56 * \subsection IfxLld_Stm_Variables Variables
57 *
58 * Declare STM variables :
59 * \code
60 * Ifx_STM *stmSfr;
61 * IfxStm_CompareConfig stmConfig;
62 * \endcode
63 *
64 * \subsection IfxLld_Stm_Interrupt Interrupt Handler Installation
65 *
66 * See also \ref IfxLld_Cpu_Irq_Usage
67 *
68 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
69 * \code
70 * // priorities are normally defined in Ifx_IntPrioDef.h
71 * #define IFX_INTPRIO_STM0_SR0 10
72 * \endcode
73 *
74 * Add the interrupt service routines to your C code. They have to call the Stm interrupt handlers:
75 * please take care in choosing number of ticks, the below example code will raise an interrupt
76 * evry time the specified number of ticks have been elapsed.
77 * \code
78 * IFX_INTERRUPT(stm0Sr0ISR, 0, IFX_INTPRIO_STM0_SR0)
79 * {
80 * IfxStm_clearCompareFlag(stmSfr, stmConfig.comparator);
81 * IfxStm_increaseCompare(stmSfr, stmConfig.comparator, stmConfig.ticks);
82 * }
83 * \endcode
84 *
85 * Finally install the interrupt handlers in your initialisation function:
86 * \code
87 * // install interrupt handlers
88 * IfxCpu_Irq_installInterruptHandler(&stm0Sr0ISR, IFX_INTPRIO_STM0_SR0);
89 * IfxCpu_enableInterrupts();
90 * \endcode
91 *
92 * \subsection IfxLld_Stm_Init Module Initialisation
93 *
94 * The STM module can be configured to generate an interrupt at every compare match of the selected comaparator with the desired compare value, the interrupt can further be routed to other comparator.
95 *
96 * The module initialisation can be done as followed.
97 *
98 * \code
99 * stmSfr = &MODULE_STM0;
100 *
101 * IfxStm_initCompareConfig(&stmConfig);
102 *
103 * // configure to generate interrupt every 10 us
104 * sint32 ticks = IfxStm_getTicksFromMicroseconds(10);
105 *
106 * stmConfig.ticks = ticks;
107 *
108 * stmConfig.triggerPriority = IFX_INTPRIO_STM0_SR0;
109 * stmConfig.typeOfService = IfxSrc_Tos_cpu0;
110 *
111 * IfxStm_initCompare(stmSfr, &stmConfig);
112 *
113 * \endcode
114 *
115 * Now the Stm shall generate interrupts regularly based on the configured time !
116 *
117 * \defgroup IfxLld_Stm_Std_Enumerations Enumerations
118 * \ingroup IfxLld_Stm_Std
119 * \defgroup IfxLld_Stm_Std_Structures Data Structures
120 * \ingroup IfxLld_Stm_Std
121 * \defgroup IfxLld_Stm_Std_Module Module Functions
122 * \ingroup IfxLld_Stm_Std
123 * \defgroup IfxLld_Stm_Std_Timer Timer Functions
124 * \ingroup IfxLld_Stm_Std
125 * \defgroup IfxLld_Stm_Std_Comparator Comparator Functions
126 * \ingroup IfxLld_Stm_Std
127 */
128
129 #ifndef IFXSTM_H
130 #define IFXSTM_H 1
131
132 /******************************************************************************/
133 /*----------------------------------Includes----------------------------------*/
134 /******************************************************************************/
135
136 #include "_Impl/IfxStm_cfg.h"
137 #include "Scu/Std/IfxScuCcu.h"
138 #include "Src/Std/IfxSrc.h"
139 #include "IfxCbs_reg.h"
140
141 /******************************************************************************/
142 /*-----------------------------------Macros-----------------------------------*/
143 /******************************************************************************/
144
145 #ifndef IFXSTM_DEFAULT_TIMER
146 #define IFXSTM_DEFAULT_TIMER (&MODULE_STM0)
147 #endif
148
149 /******************************************************************************/
150 /*--------------------------------Enumerations--------------------------------*/
151 /******************************************************************************/
152
153 /** \addtogroup IfxLld_Stm_Std_Enumerations
154 * \{ */
155 /** \brief Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2)
156 */
157 typedef enum
158 {
159 IfxStm_Comparator_0 = 0, /**< \brief Comparator Id 0 */
160 IfxStm_Comparator_1 /**< \brief Comparator Id 1 */
161 } IfxStm_Comparator;
162
163 /** \brief Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1)
164 */
165 typedef enum
166 {
167 IfxStm_ComparatorInterrupt_ir0 = 0, /**< \brief Select STMIR0 */
168 IfxStm_ComparatorInterrupt_ir1 = 1 /**< \brief Select STMIR1 */
169 } IfxStm_ComparatorInterrupt;
170
171 /** \brief Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2)
172 */
173 typedef enum
174 {
175 IfxStm_ComparatorOffset_0 = 0, /**< \brief Comparator start bit position 0 with 64 bit timer */
176 IfxStm_ComparatorOffset_1, /**< \brief Comparator start bit position 1 with 64 bit timer */
177 IfxStm_ComparatorOffset_2, /**< \brief Comparator start bit position 2 with 64 bit timer */
178 IfxStm_ComparatorOffset_3, /**< \brief Comparator start bit position 3 with 64 bit timer */
179 IfxStm_ComparatorOffset_4, /**< \brief Comparator start bit position 4 with 64 bit timer */
180 IfxStm_ComparatorOffset_5, /**< \brief Comparator start bit position 5 with 64 bit timer */
181 IfxStm_ComparatorOffset_6, /**< \brief Comparator start bit position 6 with 64 bit timer */
182 IfxStm_ComparatorOffset_7, /**< \brief Comparator start bit position 7 with 64 bit timer */
183 IfxStm_ComparatorOffset_8, /**< \brief Comparator start bit position 8 with 64 bit timer */
184 IfxStm_ComparatorOffset_9, /**< \brief Comparator start bit position 9 with 64 bit timer */
185 IfxStm_ComparatorOffset_10, /**< \brief Comparator start bit position 10 with 64 bit timer */
186 IfxStm_ComparatorOffset_11, /**< \brief Comparator start bit position 11 with 64 bit timer */
187 IfxStm_ComparatorOffset_12, /**< \brief Comparator start bit position 12 with 64 bit timer */
188 IfxStm_ComparatorOffset_13, /**< \brief Comparator start bit position 13 with 64 bit timer */
189 IfxStm_ComparatorOffset_14, /**< \brief Comparator start bit position 14 with 64 bit timer */
190 IfxStm_ComparatorOffset_15, /**< \brief Comparator start bit position 15 with 64 bit timer */
191 IfxStm_ComparatorOffset_16, /**< \brief Comparator start bit position 16 with 64 bit timer */
192 IfxStm_ComparatorOffset_17, /**< \brief Comparator start bit position 17 with 64 bit timer */
193 IfxStm_ComparatorOffset_18, /**< \brief Comparator start bit position 18 with 64 bit timer */
194 IfxStm_ComparatorOffset_19, /**< \brief Comparator start bit position 19 with 64 bit timer */
195 IfxStm_ComparatorOffset_20, /**< \brief Comparator start bit position 20 with 64 bit timer */
196 IfxStm_ComparatorOffset_21, /**< \brief Comparator start bit position 21 with 64 bit timer */
197 IfxStm_ComparatorOffset_22, /**< \brief Comparator start bit position 22 with 64 bit timer */
198 IfxStm_ComparatorOffset_23, /**< \brief Comparator start bit position 23 with 64 bit timer */
199 IfxStm_ComparatorOffset_24, /**< \brief Comparator start bit position 24 with 64 bit timer */
200 IfxStm_ComparatorOffset_25, /**< \brief Comparator start bit position 25 with 64 bit timer */
201 IfxStm_ComparatorOffset_26, /**< \brief Comparator start bit position 26 with 64 bit timer */
202 IfxStm_ComparatorOffset_27, /**< \brief Comparator start bit position 27 with 64 bit timer */
203 IfxStm_ComparatorOffset_28, /**< \brief Comparator start bit position 28 with 64 bit timer */
204 IfxStm_ComparatorOffset_29, /**< \brief Comparator start bit position 29 with 64 bit timer */
205 IfxStm_ComparatorOffset_30, /**< \brief Comparator start bit position 30 with 64 bit timer */
206 IfxStm_ComparatorOffset_31 /**< \brief Comparator start bit position 31 with 64 bit timer */
207 } IfxStm_ComparatorOffset;
208
209 /** \brief Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2)
210 */
211 typedef enum
212 {
213 IfxStm_ComparatorSize_1Bit = 0, /**< \brief Size of compare value to compare with timer: 1 bit */
214 IfxStm_ComparatorSize_2Bits = 1, /**< \brief Size of compare value to compare with timer: 2 bits */
215 IfxStm_ComparatorSize_3Bits = 2, /**< \brief Size of compare value to compare with timer: 3 bits */
216 IfxStm_ComparatorSize_4Bits = 3, /**< \brief Size of compare value to compare with timer: 4 bits */
217 IfxStm_ComparatorSize_5Bits = 4, /**< \brief Size of compare value to compare with timer: 5 bits */
218 IfxStm_ComparatorSize_6Bits = 5, /**< \brief Size of compare value to compare with timer: 6 bits */
219 IfxStm_ComparatorSize_7Bits = 6, /**< \brief Size of compare value to compare with timer: 7 bits */
220 IfxStm_ComparatorSize_8Bits = 7, /**< \brief Size of compare value to compare with timer: 8 bits */
221 IfxStm_ComparatorSize_9Bits = 8, /**< \brief Size of compare value to compare with timer: 9 bits */
222 IfxStm_ComparatorSize_10Bits = 9, /**< \brief Size of compare value to compare with timer: 10 bits */
223 IfxStm_ComparatorSize_11Bits = 10, /**< \brief Size of compare value to compare with timer: 11 bits */
224 IfxStm_ComparatorSize_12Bits = 11, /**< \brief Size of compare value to compare with timer: 12 bits */
225 IfxStm_ComparatorSize_13Bits = 12, /**< \brief Size of compare value to compare with timer: 13 bits */
226 IfxStm_ComparatorSize_14Bits = 13, /**< \brief Size of compare value to compare with timer: 14 bits */
227 IfxStm_ComparatorSize_15Bits = 14, /**< \brief Size of compare value to compare with timer: 15 bits */
228 IfxStm_ComparatorSize_16Bits = 15, /**< \brief Size of compare value to compare with timer: 16 bits */
229 IfxStm_ComparatorSize_17Bits = 16, /**< \brief Size of compare value to compare with timer: 17 bits */
230 IfxStm_ComparatorSize_18Bits = 17, /**< \brief Size of compare value to compare with timer: 18 bits */
231 IfxStm_ComparatorSize_19Bits = 18, /**< \brief Size of compare value to compare with timer: 19 bits */
232 IfxStm_ComparatorSize_20Bits = 19, /**< \brief Size of compare value to compare with timer: 20 bits */
233 IfxStm_ComparatorSize_21Bits = 20, /**< \brief Size of compare value to compare with timer: 21 bits */
234 IfxStm_ComparatorSize_22Bits = 21, /**< \brief Size of compare value to compare with timer: 22 bits */
235 IfxStm_ComparatorSize_23Bits = 22, /**< \brief Size of compare value to compare with timer: 23 bits */
236 IfxStm_ComparatorSize_24Bits = 23, /**< \brief Size of compare value to compare with timer: 24 bits */
237 IfxStm_ComparatorSize_25Bits = 24, /**< \brief Size of compare value to compare with timer: 25 bits */
238 IfxStm_ComparatorSize_26Bits = 25, /**< \brief Size of compare value to compare with timer: 26 bits */
239 IfxStm_ComparatorSize_27Bits = 26, /**< \brief Size of compare value to compare with timer: 27 bits */
240 IfxStm_ComparatorSize_28Bits = 27, /**< \brief Size of compare value to compare with timer: 28 bits */
241 IfxStm_ComparatorSize_29Bits = 28, /**< \brief Size of compare value to compare with timer: 29 bits */
242 IfxStm_ComparatorSize_30Bits = 29, /**< \brief Size of compare value to compare with timer: 30 bits */
243 IfxStm_ComparatorSize_31Bits = 30, /**< \brief Size of compare value to compare with timer: 31 bits */
244 IfxStm_ComparatorSize_32Bits = 31 /**< \brief Size of compare value to compare with timer: 32 bits */
245 } IfxStm_ComparatorSize;
246
247 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
248 * Definition in Ifx_STM.CLC.B.EDIS
249 */
250 typedef enum
251 {
252 IfxStm_SleepMode_enable = 0, /**< \brief enables sleep mode */
253 IfxStm_SleepMode_disable = 1 /**< \brief disables sleep mode */
254 } IfxStm_SleepMode;
255
256 /** \brief OCDS Suspend Control (OCDS.SUS)
257 */
258 typedef enum
259 {
260 IfxStm_SuspendMode_none = 0, /**< \brief No suspend */
261 IfxStm_SuspendMode_hard = 1, /**< \brief Hard Suspend */
262 IfxStm_SuspendMode_soft = 2 /**< \brief Soft Suspend */
263 } IfxStm_SuspendMode;
264
265 /** \} */
266
267 /******************************************************************************/
268 /*-----------------------------Data Structures--------------------------------*/
269 /******************************************************************************/
270
271 /** \addtogroup IfxLld_Stm_Std_Structures
272 * \{ */
273 /** \brief Comparator Configuration Structure
274 */
275 typedef struct
276 {
277 IfxStm_Comparator comparator; /**< \brief Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2). */
278 IfxStm_ComparatorInterrupt comparatorInterrupt; /**< \brief Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1). */
279 IfxStm_ComparatorOffset compareOffset; /**< \brief Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2). */
280 IfxStm_ComparatorSize compareSize; /**< \brief Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2). */
281 uint32 ticks; /**< \brief count for next comparison from current timer count. */
282 Ifx_Priority triggerPriority; /**< \brief Interrupt priority. Range = 0 .. 255. 0 = interrupt is disabled. */
283 IfxSrc_Tos typeOfService; /**< \brief Type of service. */
284 } IfxStm_CompareConfig;
285
286 /** \} */
287
288 /** \addtogroup IfxLld_Stm_Std_Module
289 * \{ */
290
291 /******************************************************************************/
292 /*-------------------------Inline Function Prototypes-------------------------*/
293 /******************************************************************************/
294
295 /** \brief Returns system timer value.
296 * \param stm pointer to System timer module registers.
297 * \return system timer value.
298 */
299 IFX_INLINE uint64 IfxStm_get(Ifx_STM *stm);
300
301 /** \brief Returns the system timer frequency.
302 * \param stm pointer to System timer module registers.
303 * \return the system timer frequency in Hz.
304 */
305 IFX_INLINE float32 IfxStm_getFrequency(Ifx_STM *stm);
306
307 /** \brief Returns the module's suspend state.
308 * TRUE :if module is suspended.
309 * FALSE:if module is not yet suspended.
310 * \param stm Pointer to STM module registers
311 * \return Suspend status (TRUE / FALSE)
312 */
313 IFX_INLINE boolean IfxStm_isModuleSuspended(Ifx_STM *stm);
314
315 /** \brief Configure the Module to Hard/Soft suspend mode.
316 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
317 * \param stm Pointer to STM module registers
318 * \param mode Module suspend mode
319 * \return None
320 */
321 IFX_INLINE void IfxStm_setSuspendMode(Ifx_STM *stm, IfxStm_SuspendMode mode);
322
323 /******************************************************************************/
324 /*-------------------------Global Function Prototypes-------------------------*/
325 /******************************************************************************/
326
327 /** \brief Disables the Stm module
328 * \param stm pointer to STM registers
329 * \return None
330 */
331 IFX_EXTERN void IfxStm_disableModule(Ifx_STM *stm);
332
333 /** \brief enable suspend by debugger.
334 * Note: The API will write into the OCS register only if OCDS is enabled
335 * \param stm pointer to System timer module registers.
336 * \return None
337 */
338 IFX_EXTERN void IfxStm_enableOcdsSuspend(Ifx_STM *stm);
339
340 /** \brief Returns the module index of the selected STM module
341 * \param stm Pointer to STM module registers
342 * \return STM module register address
343 */
344 IFX_EXTERN Ifx_STM *IfxStm_getAddress(IfxStm_Index stm);
345
346 /** \brief API to get the resource index of the STM specified.
347 * \param stm pointer to System timer module registers.
348 * \return system timer module index.
349 */
350 IFX_EXTERN IfxStm_Index IfxStm_getIndex(Ifx_STM *stm);
351
352 /** \} */
353
354 /** \addtogroup IfxLld_Stm_Std_Timer
355 * \{ */
356
357 /******************************************************************************/
358 /*-------------------------Inline Function Prototypes-------------------------*/
359 /******************************************************************************/
360
361 /** \brief Returns the lower system timer value.
362 * \param stm pointer to System timer module registers.
363 * \return the lower system timer value.
364 */
365 IFX_INLINE uint32 IfxStm_getLower(Ifx_STM *stm);
366
367 /** \brief Gets the TIM3 couter value.
368 * \param stm pointer to System timer module registers.
369 * \return TIM3 counter value.
370 */
371 IFX_INLINE uint32 IfxStm_getOffset12Timer(Ifx_STM *stm);
372
373 /** \brief Gets the TIM4 couter value.
374 * \param stm pointer to System timer module registers.
375 * \return TIM4 counter value.
376 */
377 IFX_INLINE uint32 IfxStm_getOffset16Timer(Ifx_STM *stm);
378
379 /** \brief Gets the TIM5 couter value.
380 * \param stm pointer to System timer module registers.
381 * \return TIM5 counter value.
382 */
383 IFX_INLINE uint32 IfxStm_getOffset20Timer(Ifx_STM *stm);
384
385 /** \brief Gets the TIM6 couter value.
386 * \param stm pointer to System timer module registers.
387 * \return TIM6 counter value.
388 */
389 IFX_INLINE uint32 IfxStm_getOffset32Timer(Ifx_STM *stm);
390
391 /** \brief Gets the TIM1 couter value.
392 * \param stm pointer to System timer module registers.
393 * \return TIM1 counter value.
394 */
395 IFX_INLINE uint32 IfxStm_getOffset4Timer(Ifx_STM *stm);
396
397 /** \brief Gets the TIM2 couter value.
398 * \param stm pointer to System timer module registers.
399 * \return TIM2 counter value.
400 */
401 IFX_INLINE uint32 IfxStm_getOffset8Timer(Ifx_STM *stm);
402
403 /** \brief Returns the timer value shifted right by offset.
404 * \param stm pointer to System timer module registers.
405 * \param offset offset value.
406 * \return the lower system timer value shifted by offset.
407 */
408 IFX_INLINE uint32 IfxStm_getOffsetTimer(Ifx_STM *stm, uint8 offset);
409
410 /** \brief Wait for requested time.
411 * The macro waits in while loop for the specified time in system timer ticks.
412 * \param stm pointer to System timer module registers.
413 * \param ticks ticks Wait time in system timer ticks.
414 * \return None
415 */
416 IFX_INLINE void IfxStm_waitTicks(Ifx_STM *stm, uint32 ticks);
417
418 /** \} */
419
420 /** \addtogroup IfxLld_Stm_Std_Comparator
421 * \{ */
422
423 /******************************************************************************/
424 /*-------------------------Inline Function Prototypes-------------------------*/
425 /******************************************************************************/
426
427 /** \brief Returns the updated compare register value.
428 * \param stm pointer to System timer module registers.
429 * \param comparator comparator selection comparator.
430 * \return The compare value
431 */
432 IFX_INLINE uint32 IfxStm_getCompare(Ifx_STM *stm, IfxStm_Comparator comparator);
433
434 /** \brief Returns the number of ticks for the selected micro seconds based on the STM frequency.
435 * \param stm pointer to System timer module registers.
436 * \param microSeconds Number of micro seconds that need to be converted to ticks
437 * \return ticks
438 */
439 IFX_INLINE sint32 IfxStm_getTicksFromMicroseconds(Ifx_STM *stm, uint32 microSeconds);
440
441 /** \brief Returns the number of ticks for the selected milli seconds based on the STM frequency.
442 * \param stm pointer to System timer module registers.
443 * \param milliSeconds Number of micro seconds that need to be converted to ticks
444 * \return ticks
445 */
446 IFX_INLINE sint32 IfxStm_getTicksFromMilliseconds(Ifx_STM *stm, uint32 milliSeconds);
447
448 /** \brief Update the compare register value increased with given ticks.
449 * \param stm pointer to System timer module registers.
450 * \param comparator comparator selection comparator.
451 * \param ticks count for next comparison from current timer count.
452 * \return None
453 */
454 IFX_INLINE void IfxStm_increaseCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks);
455
456 /** \brief Update the compare register value.
457 * \param stm pointer to System timer module registers.
458 * \param comparator comparator selection comparator.
459 * \param ticks count for next comparison.
460 * \return None
461 */
462 IFX_INLINE void IfxStm_updateCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks);
463
464 /******************************************************************************/
465 /*-------------------------Global Function Prototypes-------------------------*/
466 /******************************************************************************/
467
468 /** \brief Clear the compare interrupt flag.
469 * \param stm pointer to System timer module registers.
470 * \param comparator comparator selection comparator.
471 * \return None
472 */
473 IFX_EXTERN void IfxStm_clearCompareFlag(Ifx_STM *stm, IfxStm_Comparator comparator);
474
475 /** \brief Disables the compare interrupt
476 * \param stm pointer to System timer module registers.
477 * \param comparator comparator selection comparator.
478 * \return None
479 */
480 IFX_EXTERN void IfxStm_disableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator);
481
482 /** \brief Enables the compare interrupt .
483 * \param stm pointer to System timer module registers.
484 * \param comparator comparator selection comparator.
485 * \return None
486 */
487 IFX_EXTERN void IfxStm_enableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator);
488
489 /** \brief get the interrupt source pointer for the comparator.
490 * \param stm pointer to the STM registers
491 * \param comparator comparator selection comparator
492 * \return pointer to the interrupt source
493 */
494 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxStm_getSrcPointer(Ifx_STM *stm, IfxStm_Comparator comparator);
495
496 /** \brief Initialise stm compare register.
497 * \param stm pointer to System timer module registers.
498 * \param config pointer to configuration structure.
499 * \return TRUE if Comparator successful otherwise FLASE.
500 */
501 IFX_EXTERN boolean IfxStm_initCompare(Ifx_STM *stm, const IfxStm_CompareConfig *config);
502
503 /** \brief Initialise compare configuration with default values.
504 * \param config pointer to configuration structure.
505 * \return None
506 */
507 IFX_EXTERN void IfxStm_initCompareConfig(IfxStm_CompareConfig *config);
508
509 /** \brief Indicates if the compare interrupt flag is set.
510 * \param stm pointer to System timer module registers.
511 * \param comparator comparator selection comparator.
512 * \return TRUE if the comparator flag is set
513 */
514 IFX_EXTERN boolean IfxStm_isCompareFlagSet(Ifx_STM *stm, IfxStm_Comparator comparator);
515
516 /** \brief Set the compare behavior
517 * \param stm pointer to System timer module registers
518 * \param comparator comparator selection comparator
519 * \param offset Comparator start bit position
520 * \param size Size of compare value to compare with timer
521 * \param interrupt Comparator Interrupt request source defined
522 * \return None
523 */
524 IFX_EXTERN void IfxStm_setCompareControl(Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt);
525
526 /** \} */
527
528 /******************************************************************************/
529 /*-------------------------Inline Function Prototypes-------------------------*/
530 /******************************************************************************/
531
532 /**
533 * \param stm pointer STM registers
534 * \param mode mode selection (enable/ disable)
535 * \return None
536 */
537 IFX_INLINE void IfxStm_setSleepMode(Ifx_STM *stm, IfxStm_SleepMode mode);
538
539 /** \brief Returns the STM counter value
540 * \return Returns the STM counter value
541 */
542 IFX_INLINE sint64 IfxStm_now(void);
543
544 /** \brief Get the deadline value
545 * \param timeout timeout value
546 * \return Return the deadline
547 */
548 IFX_INLINE sint64 IfxStm_getDeadLine(sint64 timeout);
549
550 /** \brief Checked if deadline has occured
551 * \param deadLine Deadline value
552 * \return Return if deadline occured or not
553 */
554 IFX_INLINE boolean IfxStm_isDeadLine(sint64 deadLine);
555
556 /** \brief Waits for a specific time
557 * \param timeout timeout value
558 * \return None
559 */
560 IFX_INLINE void IfxStm_wait(sint64 timeout);
561
562 /******************************************************************************/
563 /*-------------------------Global Function Prototypes-------------------------*/
564 /******************************************************************************/
565
566 /**
567 * \param stm pointer to STM registers
568 * \return None
569 */
570 IFX_EXTERN void IfxStm_resetModule(Ifx_STM *stm);
571
572 /******************************************************************************/
573 /*---------------------Inline Function Implementations------------------------*/
574 /******************************************************************************/
575
576 IFX_INLINE uint64 IfxStm_get(Ifx_STM *stm)
577 {
578 uint64 result;
579
580 result = stm->TIM0.U;
581 result |= ((uint64)stm->CAP.U) << 32;
582
583 return result;
584 }
585
586
587 IFX_INLINE uint32 IfxStm_getCompare(Ifx_STM *stm, IfxStm_Comparator comparator)
588 {
589 return stm->CMP[comparator].B.CMPVAL;
590 }
591
592
593 IFX_INLINE float32 IfxStm_getFrequency(Ifx_STM *stm)
594 {
595 IFX_UNUSED_PARAMETER(stm);
596 float32 result;
597
598 result = IfxScuCcu_getStmFrequency();
599
600 return result;
601 }
602
603
604 IFX_INLINE uint32 IfxStm_getLower(Ifx_STM *stm)
605 {
606 return stm->TIM0.U;
607 }
608
609
610 IFX_INLINE uint32 IfxStm_getOffset12Timer(Ifx_STM *stm)
611 {
612 return stm->TIM3.U;
613 }
614
615
616 IFX_INLINE uint32 IfxStm_getOffset16Timer(Ifx_STM *stm)
617 {
618 return stm->TIM4.U;
619 }
620
621
622 IFX_INLINE uint32 IfxStm_getOffset20Timer(Ifx_STM *stm)
623 {
624 return stm->TIM5.U;
625 }
626
627
628 IFX_INLINE uint32 IfxStm_getOffset32Timer(Ifx_STM *stm)
629 {
630 return stm->TIM6.U;
631 }
632
633
634 IFX_INLINE uint32 IfxStm_getOffset4Timer(Ifx_STM *stm)
635 {
636 return stm->TIM1.U;
637 }
638
639
640 IFX_INLINE uint32 IfxStm_getOffset8Timer(Ifx_STM *stm)
641 {
642 return stm->TIM2.U;
643 }
644
645
646 IFX_INLINE uint32 IfxStm_getOffsetTimer(Ifx_STM *stm, uint8 offset)
647 {
648 uint64 now;
649
650 now = IfxStm_get(stm);
651
652 return (uint32)(now >> offset);
653 }
654
655
656 IFX_INLINE sint32 IfxStm_getTicksFromMicroseconds(Ifx_STM *stm, uint32 microSeconds)
657 {
658 sint32 freq = (sint32)IfxStm_getFrequency(stm);
659 return (freq / (1000000)) * microSeconds;
660 }
661
662
663 IFX_INLINE sint32 IfxStm_getTicksFromMilliseconds(Ifx_STM *stm, uint32 milliSeconds)
664 {
665 sint32 freq = (sint32)IfxStm_getFrequency(stm);
666 return (freq / (1000)) * milliSeconds;
667 }
668
669
670 IFX_INLINE void IfxStm_increaseCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
671 {
672 stm->CMP[comparator].B.CMPVAL = stm->CMP[comparator].B.CMPVAL + ticks;
673 }
674
675
676 IFX_INLINE boolean IfxStm_isModuleSuspended(Ifx_STM *stm)
677 {
678 Ifx_STM_OCS ocs;
679
680 // read the status
681 ocs.U = stm->OCS.U;
682
683 // return the status
684 return ocs.B.SUSSTA;
685 }
686
687
688 IFX_INLINE void IfxStm_setSleepMode(Ifx_STM *stm, IfxStm_SleepMode mode)
689 {
690 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
691 IfxScuWdt_clearCpuEndinit(passwd);
692 stm->CLC.B.EDIS = mode;
693 IfxScuWdt_setCpuEndinit(passwd);
694 }
695
696
697 IFX_INLINE void IfxStm_setSuspendMode(Ifx_STM *stm, IfxStm_SuspendMode mode)
698 {
699 Ifx_STM_OCS ocs;
700
701 /* Only if OCDS is enabled write into the OCS register */
702 if (MODULE_CBS.OSTATE.B.OEN == 1U)
703 {
704 // remove protection and configure the suspend mode.
705 ocs.B.SUS_P = 1;
706 ocs.B.SUS = mode;
707 stm->OCS.U = ocs.U;
708 stm->OCS.B.SUS_P = 0;
709 }
710 }
711
712
713 IFX_INLINE void IfxStm_updateCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
714 {
715 stm->CMP[comparator].B.CMPVAL = ticks;
716 }
717
718
719 IFX_INLINE void IfxStm_waitTicks(Ifx_STM *stm, uint32 ticks)
720 {
721 uint32 beginTime;
722
723 beginTime = IfxStm_getLower(stm);
724
725 /*below code will work because of unsigned 32 bit calculation even at timer wrapping condition
726 * As an example if beginTime = 0xFFFFFFFE and current time = 2 (after overflow), unsigned calculation
727 * 2 - 0xFFFFFFFE will be 4*/
728 while ((IfxStm_getLower(stm) - beginTime) < ticks)
729 {}
730 }
731
732
733 IFX_INLINE sint64 IfxStm_now(void)
734 {
735 sint64 stmNow;
736 boolean interruptState;
737
738 interruptState = IfxCpu_disableInterrupts();
739 stmNow = (Ifx_TickTime)IfxStm_get(IFXSTM_DEFAULT_TIMER) & TIME_INFINITE;
740 IfxCpu_restoreInterrupts(interruptState);
741
742 return stmNow;
743 }
744
745
746 IFX_INLINE sint64 IfxStm_getDeadLine(sint64 timeout)
747 {
748 sint64 deadLine;
749
750 if (timeout == TIME_INFINITE)
751 {
752 deadLine = TIME_INFINITE;
753 }
754 else
755 {
756 deadLine = IfxStm_now() + timeout;
757 }
758
759 return deadLine;
760 }
761
762
763 IFX_INLINE boolean IfxStm_isDeadLine(sint64 deadLine)
764 {
765 boolean result;
766
767 if (deadLine == TIME_INFINITE)
768 {
769 result = FALSE;
770 }
771 else
772 {
773 result = IfxStm_now() >= deadLine;
774 }
775
776 return result;
777 }
778
779
780 IFX_INLINE void IfxStm_wait(sint64 timeout)
781 {
782 sint64 deadLine = IfxStm_getDeadLine(timeout);
783
784 while (IfxStm_isDeadLine(deadLine) == FALSE)
785 {}
786 }
787
788
789 #endif /* IFXSTM_H */
IfxStm_ComparatorSize_25Bits
Size of compare value to compare with timer: 25 bits.
Definition: IfxStm.h:237
IfxStm_SleepMode_disable
disables sleep mode
Definition: IfxStm.h:253
IfxStm_SuspendMode_soft
Soft Suspend.
Definition: IfxStm.h:262
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:76
IfxStm_ComparatorOffset_2
Comparator start bit position 2 with 64 bit timer.
Definition: IfxStm.h:177
IfxStm_ComparatorOffset_17
Comparator start bit position 17 with 64 bit timer.
Definition: IfxStm.h:192
IfxStm_ComparatorSize_5Bits
Size of compare value to compare with timer: 5 bits.
Definition: IfxStm.h:217
IfxStm_getLower
IFX_INLINE uint32 IfxStm_getLower(Ifx_STM *stm)
Returns the lower system timer value.
Definition: IfxStm.h:604
IfxStm_ComparatorSize
IfxStm_ComparatorSize
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0...
Definition: IfxStm.h:211
IfxStm_ComparatorSize_23Bits
Size of compare value to compare with timer: 23 bits.
Definition: IfxStm.h:235
IfxStm_getTicksFromMilliseconds
IFX_INLINE sint32 IfxStm_getTicksFromMilliseconds(Ifx_STM *stm, uint32 milliSeconds)
Returns the number of ticks for the selected milli seconds based on the STM frequency.
Definition: IfxStm.h:663
IfxStm_Comparator_1
Comparator Id 1.
Definition: IfxStm.h:160
IfxStm_CompareConfig::compareOffset
IfxStm_ComparatorOffset compareOffset
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2).
Definition: IfxStm.h:279
IfxStm_ComparatorSize_11Bits
Size of compare value to compare with timer: 11 bits.
Definition: IfxStm.h:223
IfxStm_isCompareFlagSet
IFX_EXTERN boolean IfxStm_isCompareFlagSet(Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set.
Definition: IfxStm.c:239
IfxStm_ComparatorOffset_3
Comparator start bit position 3 with 64 bit timer.
Definition: IfxStm.h:178
IfxStm_ComparatorOffset_24
Comparator start bit position 24 with 64 bit timer.
Definition: IfxStm.h:199
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxStm_cfg.h
STM on-chip implementation data.
IfxStm_waitTicks
IFX_INLINE void IfxStm_waitTicks(Ifx_STM *stm, uint32 ticks)
Wait for requested time. The macro waits in while loop for the specified time in system timer ticks...
Definition: IfxStm.h:719
IfxStm_ComparatorSize_12Bits
Size of compare value to compare with timer: 12 bits.
Definition: IfxStm.h:224
IfxStm_enableOcdsSuspend
IFX_EXTERN void IfxStm_enableOcdsSuspend(Ifx_STM *stm)
enable suspend by debugger. Note: The API will write into the OCS register only if OCDS is enabled ...
Definition: IfxStm.c:101
now
IFX_INLINE Ifx_TickTime now(void)
Return system timer value (critical section).
Definition: Bsp.h:218
IfxStm_ComparatorOffset_31
Comparator start bit position 31 with 64 bit timer.
Definition: IfxStm.h:206
IfxStm_getOffset32Timer
IFX_INLINE uint32 IfxStm_getOffset32Timer(Ifx_STM *stm)
Gets the TIM6 couter value.
Definition: IfxStm.h:628
IfxStm_ComparatorOffset_20
Comparator start bit position 20 with 64 bit timer.
Definition: IfxStm.h:195
IfxStm_ComparatorSize_2Bits
Size of compare value to compare with timer: 2 bits.
Definition: IfxStm.h:214
IfxStm_ComparatorOffset_15
Comparator start bit position 15 with 64 bit timer.
Definition: IfxStm.h:190
IfxStm_SuspendMode
IfxStm_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxStm.h:258
IfxStm_getDeadLine
IFX_INLINE sint64 IfxStm_getDeadLine(sint64 timeout)
Get the deadline value.
Definition: IfxStm.h:746
IfxStm_Index
IfxStm_Index
List of the available STM resources.
Definition: IfxStm_cfg.h:84
IfxStm_wait
IFX_INLINE void IfxStm_wait(sint64 timeout)
Waits for a specific time.
Definition: IfxStm.h:780
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStm_ComparatorInterrupt_ir1
Select STMIR1.
Definition: IfxStm.h:168
IfxStm_Comparator
IfxStm_Comparator
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2)
Definition: IfxStm.h:157
float32
float float32
Definition: Platform_Types.h:170
IfxStm_getAddress
IFX_EXTERN Ifx_STM * IfxStm_getAddress(IfxStm_Index stm)
Returns the module index of the selected STM module.
Definition: IfxStm.c:116
IfxStm_getOffsetTimer
IFX_INLINE uint32 IfxStm_getOffsetTimer(Ifx_STM *stm, uint8 offset)
Returns the timer value shifted right by offset.
Definition: IfxStm.h:646
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxStm_ComparatorOffset_19
Comparator start bit position 19 with 64 bit timer.
Definition: IfxStm.h:194
IfxStm_initCompareConfig
IFX_EXTERN void IfxStm_initCompareConfig(IfxStm_CompareConfig *config)
Initialise compare configuration with default values.
Definition: IfxStm.c:227
IfxSrc.h
SRC basic functionality.
IfxStm_ComparatorSize_8Bits
Size of compare value to compare with timer: 8 bits.
Definition: IfxStm.h:220
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxStm_CompareConfig::triggerPriority
Ifx_Priority triggerPriority
Interrupt priority. Range = 0 .. 255. 0 = interrupt is disabled.
Definition: IfxStm.h:282
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxStm_ComparatorOffset_14
Comparator start bit position 14 with 64 bit timer.
Definition: IfxStm.h:189
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:933
IfxStm_ComparatorSize_24Bits
Size of compare value to compare with timer: 24 bits.
Definition: IfxStm.h:236
IfxStm_SuspendMode_hard
Hard Suspend.
Definition: IfxStm.h:261
IfxScuCcu_getStmFrequency
IFX_INLINE float32 IfxScuCcu_getStmFrequency(void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register ...
Definition: IfxScuCcu.h:1119
IfxStm_ComparatorOffset_22
Comparator start bit position 22 with 64 bit timer.
Definition: IfxStm.h:197
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStm_ComparatorOffset_16
Comparator start bit position 16 with 64 bit timer.
Definition: IfxStm.h:191
IfxStm_ComparatorOffset_6
Comparator start bit position 6 with 64 bit timer.
Definition: IfxStm.h:181
IfxStm_ComparatorOffset_11
Comparator start bit position 11 with 64 bit timer.
Definition: IfxStm.h:186
IfxStm_ComparatorSize_4Bits
Size of compare value to compare with timer: 4 bits.
Definition: IfxStm.h:216
IfxStm_ComparatorInterrupt_ir0
Select STMIR0.
Definition: IfxStm.h:167
IfxStm_ComparatorOffset_10
Comparator start bit position 10 with 64 bit timer.
Definition: IfxStm.h:185
IfxStm_getCompare
IFX_INLINE uint32 IfxStm_getCompare(Ifx_STM *stm, IfxStm_Comparator comparator)
Returns the updated compare register value.
Definition: IfxStm.h:587
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxStm_ComparatorSize_19Bits
Size of compare value to compare with timer: 19 bits.
Definition: IfxStm.h:231
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStm_now
IFX_INLINE sint64 IfxStm_now(void)
Returns the STM counter value.
Definition: IfxStm.h:733
IfxStm_ComparatorOffset_9
Comparator start bit position 9 with 64 bit timer.
Definition: IfxStm.h:184
IfxStm_CompareConfig::ticks
uint32 ticks
count for next comparison from current timer count.
Definition: IfxStm.h:281
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxStm_ComparatorOffset_29
Comparator start bit position 29 with 64 bit timer.
Definition: IfxStm.h:204
IfxStm_disableModule
IFX_EXTERN void IfxStm_disableModule(Ifx_STM *stm)
Disables the Stm module.
Definition: IfxStm.c:78
IfxStm_ComparatorSize_32Bits
Size of compare value to compare with timer: 32 bits.
Definition: IfxStm.h:244
IfxStm_CompareConfig::comparatorInterrupt
IfxStm_ComparatorInterrupt comparatorInterrupt
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1).
Definition: IfxStm.h:278
IfxStm_CompareConfig
Comparator Configuration Structure.
Definition: IfxStm.h:275
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:656
IfxStm_isDeadLine
IFX_INLINE boolean IfxStm_isDeadLine(sint64 deadLine)
Checked if deadline has occured.
Definition: IfxStm.h:763
IfxStm_updateCompare
IFX_INLINE void IfxStm_updateCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value.
Definition: IfxStm.h:713
IfxStm_ComparatorSize_15Bits
Size of compare value to compare with timer: 15 bits.
Definition: IfxStm.h:227
IfxStm_ComparatorSize_29Bits
Size of compare value to compare with timer: 29 bits.
Definition: IfxStm.h:241
IfxStm_ComparatorSize_27Bits
Size of compare value to compare with timer: 27 bits.
Definition: IfxStm.h:239
IfxStm_ComparatorSize_28Bits
Size of compare value to compare with timer: 28 bits.
Definition: IfxStm.h:240
IfxStm_initCompare
IFX_EXTERN boolean IfxStm_initCompare(Ifx_STM *stm, const IfxStm_CompareConfig *config)
Initialise stm compare register.
Definition: IfxStm.c:161
IfxStm_getIndex
IFX_EXTERN IfxStm_Index IfxStm_getIndex(Ifx_STM *stm)
API to get the resource index of the STM specified.
Definition: IfxStm.c:133
IfxStm_ComparatorSize_1Bit
Size of compare value to compare with timer: 1 bit.
Definition: IfxStm.h:213
IfxStm_ComparatorSize_3Bits
Size of compare value to compare with timer: 3 bits.
Definition: IfxStm.h:215
IfxStm_ComparatorSize_17Bits
Size of compare value to compare with timer: 17 bits.
Definition: IfxStm.h:229
IfxStm_ComparatorOffset_25
Comparator start bit position 25 with 64 bit timer.
Definition: IfxStm.h:200
IfxStm_ComparatorOffset_27
Comparator start bit position 27 with 64 bit timer.
Definition: IfxStm.h:202
IfxStm_SleepMode_enable
enables sleep mode
Definition: IfxStm.h:252
IfxStm_ComparatorSize_26Bits
Size of compare value to compare with timer: 26 bits.
Definition: IfxStm.h:238
IFXSTM_DEFAULT_TIMER
#define IFXSTM_DEFAULT_TIMER
Definition: IfxStm.h:146
IfxStm_SuspendMode_none
No suspend.
Definition: IfxStm.h:260
IfxStm_ComparatorSize_7Bits
Size of compare value to compare with timer: 7 bits.
Definition: IfxStm.h:219
IfxStm_getOffset8Timer
IFX_INLINE uint32 IfxStm_getOffset8Timer(Ifx_STM *stm)
Gets the TIM2 couter value.
Definition: IfxStm.h:640
IfxStm_ComparatorOffset_1
Comparator start bit position 1 with 64 bit timer.
Definition: IfxStm.h:176
IfxStm_setCompareControl
IFX_EXTERN void IfxStm_setCompareControl(Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior.
Definition: IfxStm.c:272
sint64
long long sint64
Definition: Platform_Types.h:141
IfxStm_ComparatorSize_22Bits
Size of compare value to compare with timer: 22 bits.
Definition: IfxStm.h:234
IfxStm_ComparatorOffset_0
Comparator start bit position 0 with 64 bit timer.
Definition: IfxStm.h:175
IfxStm_Comparator_0
Comparator Id 0.
Definition: IfxStm.h:159
IfxStm_getOffset20Timer
IFX_INLINE uint32 IfxStm_getOffset20Timer(Ifx_STM *stm)
Gets the TIM5 couter value.
Definition: IfxStm.h:622
IfxStm_getSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxStm_getSrcPointer(Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator.
Definition: IfxStm.c:153
IfxStm_ComparatorOffset_26
Comparator start bit position 26 with 64 bit timer.
Definition: IfxStm.h:201
IfxStm_ComparatorSize_21Bits
Size of compare value to compare with timer: 21 bits.
Definition: IfxStm.h:233
IfxStm_isModuleSuspended
IFX_INLINE boolean IfxStm_isModuleSuspended(Ifx_STM *stm)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxStm.h:676
IfxStm_ComparatorOffset_8
Comparator start bit position 8 with 64 bit timer.
Definition: IfxStm.h:183
IfxStm_resetModule
IFX_EXTERN void IfxStm_resetModule(Ifx_STM *stm)
Definition: IfxStm.c:252
IfxStm_clearCompareFlag
IFX_EXTERN void IfxStm_clearCompareFlag(Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag.
Definition: IfxStm.c:52
IfxStm_ComparatorOffset_7
Comparator start bit position 7 with 64 bit timer.
Definition: IfxStm.h:182
IfxStm_ComparatorOffset
IfxStm_ComparatorOffset
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2)
Definition: IfxStm.h:173
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxStm_CompareConfig::typeOfService
IfxSrc_Tos typeOfService
Type of service.
Definition: IfxStm.h:283
IfxStm_ComparatorSize_18Bits
Size of compare value to compare with timer: 18 bits.
Definition: IfxStm.h:230
IfxStm_enableComparatorInterrupt
IFX_EXTERN void IfxStm_enableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt .
Definition: IfxStm.c:88
IfxStm_ComparatorOffset_23
Comparator start bit position 23 with 64 bit timer.
Definition: IfxStm.h:198
IfxStm_getFrequency
IFX_INLINE float32 IfxStm_getFrequency(Ifx_STM *stm)
Returns the system timer frequency.
Definition: IfxStm.h:593
IfxStm_ComparatorOffset_30
Comparator start bit position 30 with 64 bit timer.
Definition: IfxStm.h:205
TIME_INFINITE
#define TIME_INFINITE
Definition: Ifx_Types.h:77
IfxStm_ComparatorOffset_18
Comparator start bit position 18 with 64 bit timer.
Definition: IfxStm.h:193
IfxStm_ComparatorOffset_5
Comparator start bit position 5 with 64 bit timer.
Definition: IfxStm.h:180
IfxScuCcu.h
SCU basic functionality.
sint32
long sint32
Definition: Platform_Types.h:134
IfxStm_increaseCompare
IFX_INLINE void IfxStm_increaseCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value increased with given ticks.
Definition: IfxStm.h:670
IfxStm_getOffset4Timer
IFX_INLINE uint32 IfxStm_getOffset4Timer(Ifx_STM *stm)
Gets the TIM1 couter value.
Definition: IfxStm.h:634
IfxStm_ComparatorSize_13Bits
Size of compare value to compare with timer: 13 bits.
Definition: IfxStm.h:225
IfxStm_SleepMode
IfxStm_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_STM.CLC.B.EDIS.
Definition: IfxStm.h:250
IfxStm_ComparatorInterrupt
IfxStm_ComparatorInterrupt
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1)
Definition: IfxStm.h:165
IfxStm_ComparatorOffset_28
Comparator start bit position 28 with 64 bit timer.
Definition: IfxStm.h:203
IfxStm_ComparatorSize_9Bits
Size of compare value to compare with timer: 9 bits.
Definition: IfxStm.h:221
IfxStm_ComparatorSize_16Bits
Size of compare value to compare with timer: 16 bits.
Definition: IfxStm.h:228
IfxStm_ComparatorOffset_4
Comparator start bit position 4 with 64 bit timer.
Definition: IfxStm.h:179
IfxStm_ComparatorSize_10Bits
Size of compare value to compare with timer: 10 bits.
Definition: IfxStm.h:222
IfxStm_getTicksFromMicroseconds
IFX_INLINE sint32 IfxStm_getTicksFromMicroseconds(Ifx_STM *stm, uint32 microSeconds)
Returns the number of ticks for the selected micro seconds based on the STM frequency.
Definition: IfxStm.h:656
IfxStm_ComparatorOffset_12
Comparator start bit position 12 with 64 bit timer.
Definition: IfxStm.h:187
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxStm_getOffset12Timer
IFX_INLINE uint32 IfxStm_getOffset12Timer(Ifx_STM *stm)
Gets the TIM3 couter value.
Definition: IfxStm.h:610
IfxStm_ComparatorOffset_21
Comparator start bit position 21 with 64 bit timer.
Definition: IfxStm.h:196
IfxStm_ComparatorSize_30Bits
Size of compare value to compare with timer: 30 bits.
Definition: IfxStm.h:242
IfxStm_CompareConfig::compareSize
IfxStm_ComparatorSize compareSize
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0...
Definition: IfxStm.h:280
IfxStm_ComparatorSize_31Bits
Size of compare value to compare with timer: 31 bits.
Definition: IfxStm.h:243
IfxStm_ComparatorSize_6Bits
Size of compare value to compare with timer: 6 bits.
Definition: IfxStm.h:218
IfxStm_ComparatorSize_20Bits
Size of compare value to compare with timer: 20 bits.
Definition: IfxStm.h:232
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:222
IfxStm_ComparatorOffset_13
Comparator start bit position 13 with 64 bit timer.
Definition: IfxStm.h:188
IfxStm_setSuspendMode
IFX_INLINE void IfxStm_setSuspendMode(Ifx_STM *stm, IfxStm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxStm.h:697
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxStm_disableComparatorInterrupt
IFX_EXTERN void IfxStm_disableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt.
Definition: IfxStm.c:65
IfxStm_CompareConfig::comparator
IfxStm_Comparator comparator
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2).
Definition: IfxStm.h:277
IfxStm_get
IFX_INLINE uint64 IfxStm_get(Ifx_STM *stm)
Returns system timer value.
Definition: IfxStm.h:576
IfxStm_ComparatorSize_14Bits
Size of compare value to compare with timer: 14 bits.
Definition: IfxStm.h:226
IfxStm_setSleepMode
IFX_INLINE void IfxStm_setSleepMode(Ifx_STM *stm, IfxStm_SleepMode mode)
Definition: IfxStm.h:688
IfxStm_getOffset16Timer
IFX_INLINE uint32 IfxStm_getOffset16Timer(Ifx_STM *stm)
Gets the TIM4 couter value.
Definition: IfxStm.h:616


iLLD_TC26B: IfxStm_Timer.c Source File

  • Stm
  • Timer
IfxStm_Timer.c
Go to the documentation of this file.
1 /**
2 * \file IfxStm_Timer.c
3 * \brief STM TIMER details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxStm_Timer.h"
47 #include "_Utilities/Ifx_Assert.h"
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 boolean IfxStm_Timer_acknowledgeTimerIrq(IfxStm_Timer *driver)
54 {
55 boolean event;
56 event = IfxStm_isCompareFlagSet(driver->stm, driver->comparator);
57
58 if (event)
59 {
60 IfxStm_clearCompareFlag(driver->stm, driver->comparator);
61
62 if (!driver->base.singleShot)
63 {
64 driver->comparatorValue += driver->base.period;
65 IfxStm_updateCompare(driver->stm, driver->comparator, driver->comparatorValue);
66 }
67 else
68 {
69 IfxStm_disableComparatorInterrupt(driver->stm, driver->comparator);
70 }
71 }
72 else
73 {}
74
75 return event;
76 }
77
78
79 float32 IfxStm_Timer_getFrequency(IfxStm_Timer *driver)
80 {
81 return 1.0 / IfxStdIf_Timer_tickToS(driver->base.clockFreq, driver->base.period);
82 }
83
84
85 float32 IfxStm_Timer_getInputFrequency(IfxStm_Timer *driver)
86 {
87 return driver->base.clockFreq;
88 }
89
90
91 Ifx_TimerValue IfxStm_Timer_getPeriod(IfxStm_Timer *driver)
92 {
93 return driver->base.period;
94 }
95
96
97 float32 IfxStm_Timer_getResolution(IfxStm_Timer *driver)
98 {
99 return 1.0 / driver->base.clockFreq;
100 }
101
102
103 void IfxStm_Timer_run(IfxStm_Timer *driver)
104 {
105 boolean interruptState;
106 uint64 timer;
107
108 interruptState = IfxCpu_disableInterrupts();
109 timer = IfxStm_get(driver->stm);
110 IfxCpu_restoreInterrupts(interruptState);
111
112 driver->comparatorValue = (Ifx_TimerValue)(timer >> driver->comparatorShift) + driver->base.period;
113
114 IfxStm_updateCompare(driver->stm, driver->comparator, driver->comparatorValue);
115 IfxStm_enableComparatorInterrupt(driver->stm, driver->comparator);
116 }
117
118
119 boolean IfxStm_Timer_setFrequency(IfxStm_Timer *driver, float32 frequency)
120 {
121 Ifx_TimerValue period = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / frequency);
122
123 return IfxStm_Timer_setPeriod(driver, period);
124 }
125
126
127 boolean IfxStm_Timer_setPeriod(IfxStm_Timer *driver, Ifx_TimerValue period)
128 {
129 driver->base.period = period;
130
131 return TRUE;
132 }
133
134
135 void IfxStm_Timer_setSingleMode(IfxStm_Timer *driver, boolean enabled)
136 {
137 driver->base.singleShot = enabled;
138 }
139
140
141 boolean IfxStm_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
142 {
143 IfxStdIf_Timer_initStdIf(stdif, driver);
144 /* Set the API link */
145 stdif->getFrequency = (IfxStdIf_Timer_GetFrequency) & IfxStm_Timer_getFrequency;
146 stdif->getPeriod = (IfxStdIf_Timer_GetPeriod) & IfxStm_Timer_getPeriod;
147 stdif->getResolution = (IfxStdIf_Timer_GetResolution) & IfxStm_Timer_getResolution;
148 //stdif->getTrigger
149 stdif->setFrequency = (IfxStdIf_Timer_SetFrequency) & IfxStm_Timer_setFrequency;
150 stdif->updateInputFrequency = (IfxStdIf_Timer_UpdateInputFrequency) & IfxStm_Timer_updateInputFrequency;
151 //stdif->applyUpdate
152 //stdif->disableUpdate
153 stdif->getInputFrequency = (IfxStdIf_Timer_GetInputFrequency) & IfxStm_Timer_getInputFrequency;
154 stdif->run = (IfxStdIf_Timer_Run) & IfxStm_Timer_run;
155 stdif->setPeriod = (IfxStdIf_Timer_SetPeriod) & IfxStm_Timer_setPeriod;
156 stdif->setSingleMode = (IfxStdIf_Timer_SetSingleMode) & IfxStm_Timer_setSingleMode;
157 //stdif->setTrigger
158 stdif->stop = (IfxStdIf_Timer_Stop) & IfxStm_Timer_stop;
159 stdif->ackTimerIrq = (IfxStdIf_Timer_AckTimerIrq) & IfxStm_Timer_acknowledgeTimerIrq;
160 //stdif->ackTriggerIrq
161
162 return TRUE;
163 }
164
165
166 void IfxStm_Timer_stop(IfxStm_Timer *driver)
167 {
168 IfxStm_disableComparatorInterrupt(driver->stm, driver->comparator);
169 }
170
171
172 void IfxStm_Timer_updateInputFrequency(IfxStm_Timer *driver)
173 {
174 float32 freqency;
175 freqency = IfxStm_getFrequency(driver->stm);
176 driver->base.clockFreq = freqency / (1 << driver->comparatorShift);
177 }
178
179
180 boolean IfxStm_Timer_init(IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
181 {
182 boolean result = TRUE;
183 IfxStm_Timer_Base *base = &driver->base;
184
185 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.countDir == IfxStdIf_Timer_CountDir_up); /* only this mode is supported */
186
187 driver->stm = config->stm;
188 driver->comparator = config->comparator;
189
190 base->triggerEnabled = config->base.trigger.enabled;
191 base->singleShot = FALSE;
192
193 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.trigger.enabled == FALSE); /* Trigger feature not supported */
194 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.startOffset == 0); /* Trigger feature not supported */
195
196 /* Initialize the timer part */
197 // STM timer is already running after reset (free running timer)
198
199 // Calculate shift
200 driver->comparatorShift = 32 - __clz((uint32)(config->base.minResolution * IfxStm_getFrequency(driver->stm)));
201
202 if (driver->comparatorShift > 0)
203 {
204 driver->comparatorShift--;
205 }
206
207 IfxStm_Timer_updateInputFrequency(driver);
208
209 if ((config->base.minResolution > 0) && ((1.0 / base->clockFreq) > config->base.minResolution))
210 {
211 result = FALSE;
212 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
213 }
214 else
215 {}
216
217 IfxStm_Timer_setFrequency(driver, config->base.frequency);
218
219 IfxStm_setCompareControl(driver->stm, driver->comparator,
220 (IfxStm_ComparatorOffset)driver->comparatorShift,
221 IfxStm_ComparatorSize_32Bits,
222 driver->comparator == IfxStm_Comparator_0 ? IfxStm_ComparatorInterrupt_ir0 : IfxStm_ComparatorInterrupt_ir1);
223
224 /* Interrupt configuration */
225 if (config->base.isrPriority > 0)
226 {
227 /* clear the interrupt flag of the selected comparator */
228 IfxStm_clearCompareFlag(driver->stm, driver->comparator);
229
230 volatile Ifx_SRC_SRCR *src;
231 src = IfxStm_getSrcPointer(driver->stm, config->comparator);
232 IfxSrc_init(src, config->base.isrProvider, config->base.isrPriority);
233 IfxSrc_enable(src);
234 }
235
236 return result;
237 }
238
239
240 void IfxStm_Timer_initConfig(IfxStm_Timer_Config *config, Ifx_STM *stm)
241 {
242 IfxStdIf_Timer_initConfig(&config->base);
243 config->stm = stm;
244 config->comparator = IfxStm_Comparator_0;
245 }
IfxStm_Timer_getFrequency
float32 IfxStm_Timer_getFrequency(IfxStm_Timer *driver)
Returns the frequency see IfxStdIf_Timer_GetFrequency.
Definition: IfxStm_Timer.c:79
IfxStm_Timer_getPeriod
Ifx_TimerValue IfxStm_Timer_getPeriod(IfxStm_Timer *driver)
Returns the period of the timer see IfxStdIf_Timer_GetPeriod.
Definition: IfxStm_Timer.c:91
IfxStm_Timer_stdIfTimerInit
boolean IfxStm_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
Initializes the standard interface timer.
Definition: IfxStm_Timer.c:141
IfxStm_Timer_Base::singleShot
boolean singleShot
If TRUE, the timer will stop after 1st event.
Definition: IfxStm_Timer.h:132
IfxStm_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxStm_Timer.h:154
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
IfxStdIf_Timer_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxStdIf_Timer.h:276
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:58
IfxStdIf_Timer_GetFrequency
float32(* IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:99
IfxStm_isCompareFlagSet
boolean IfxStm_isCompareFlagSet(Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set.
Definition: IfxStm.c:239
IfxStm_Timer_setPeriod
boolean IfxStm_Timer_setPeriod(IfxStm_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer see IfxStdIf_Timer_SetPeriod.
Definition: IfxStm_Timer.c:127
IfxStm_Timer_Base
Structure for the timer base.
Definition: IfxStm_Timer.h:126
IfxStdIf_Timer_UpdateInputFrequency
void(* IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:131
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:253
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:251
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:435
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStm_ComparatorInterrupt_ir1
Select STMIR1.
Definition: IfxStm.h:168
IfxStm_Timer_Config
configuration structure for Timer
Definition: IfxStm_Timer.h:152
IfxStdIf_Timer_SetFrequency
boolean(* IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:125
IfxStm_Timer_setSingleMode
void IfxStm_Timer_setSingleMode(IfxStm_Timer *driver, boolean enabled)
Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode.
Definition: IfxStm_Timer.c:135
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:446
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxStm_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxStm_Timer.h:128
Ifx_Assert.h
Assert functions.
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:240
IfxStdIf_Timer_GetResolution
float32(* IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:111
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:933
IfxStm_Timer_setFrequency
boolean IfxStm_Timer_setFrequency(IfxStm_Timer *driver, float32 frequency)
Sets the Frequency see IfxStdIf_Timer_SetFrequency.
Definition: IfxStm_Timer.c:119
IfxStm_Timer::comparator
IfxStm_Comparator comparator
Comparator used for the timer functionality.
Definition: IfxStm_Timer.h:145
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxStm_ComparatorInterrupt_ir0
Select STMIR0.
Definition: IfxStm.h:167
IfxStdIf_Timer_Config::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:275
IfxStm_Timer::base
IfxStm_Timer_Base base
Timer interface.
Definition: IfxStm_Timer.h:143
IfxStm_ComparatorSize_32Bits
Size of compare value to compare with timer: 32 bits.
Definition: IfxStm.h:244
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:656
IfxStm_updateCompare
IFX_INLINE void IfxStm_updateCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value.
Definition: IfxStm.h:713
IfxStm_Timer::stm
Ifx_STM * stm
STM module used for the timer functionality.
Definition: IfxStm_Timer.h:144
IfxStdIf_Timer_GetInputFrequency
float32(* IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:175
IfxStm_Timer_acknowledgeTimerIrq
boolean IfxStm_Timer_acknowledgeTimerIrq(IfxStm_Timer *driver)
Returns the timer event see IfxStdIf_Timer_AckTimerIrq.
Definition: IfxStm_Timer.c:53
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:279
IfxStm_Timer.h
STM TIMER details.
IfxStdIf_Timer_initConfig
void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:45
IfxStdIf_Timer_initStdIf
void IfxStdIf_Timer_initStdIf(IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)
Definition: IfxStdIf_Timer.c:143
IfxStdIf_Timer_CountDir_up
Timer is counting up.
Definition: IfxStdIf_Timer.h:87
IfxStm_Timer_updateInputFrequency
void IfxStm_Timer_updateInputFrequency(IfxStm_Timer *driver)
Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency.
Definition: IfxStm_Timer.c:172
IfxStm_setCompareControl
void IfxStm_setCompareControl(Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior.
Definition: IfxStm.c:272
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:248
IfxStm_Timer
Timer interface.
Definition: IfxStm_Timer.h:141
IfxStm_Timer_run
void IfxStm_Timer_run(IfxStm_Timer *driver)
Runs the timer see IfxStdIf_Timer_Run.
Definition: IfxStm_Timer.c:103
IfxStm_Timer_init
boolean IfxStm_Timer_init(IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
Initialises the timer object.
Definition: IfxStm_Timer.c:180
IfxStm_Comparator_0
Comparator Id 0.
Definition: IfxStm.h:159
IfxStm_getSrcPointer
volatile Ifx_SRC_SRCR * IfxStm_getSrcPointer(Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator.
Definition: IfxStm.c:153
IfxStm_clearCompareFlag
void IfxStm_clearCompareFlag(Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag.
Definition: IfxStm.c:52
IfxStm_ComparatorOffset
IfxStm_ComparatorOffset
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2)
Definition: IfxStm.h:173
IfxStm_enableComparatorInterrupt
void IfxStm_enableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt .
Definition: IfxStm.c:88
IfxStm_getFrequency
IFX_INLINE float32 IfxStm_getFrequency(Ifx_STM *stm)
Returns the system timer frequency.
Definition: IfxStm.h:593
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:244
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:249
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:245
IfxStdIf_Timer_GetPeriod
Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:105
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:69
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:250
IfxStm_Timer_getResolution
float32 IfxStm_Timer_getResolution(IfxStm_Timer *driver)
Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution.
Definition: IfxStm_Timer.c:97
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:274
IfxStm_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxStm_Timer.h:130
IfxStm_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialized.
Definition: IfxStm_Timer.h:129
IfxStm_Timer_initConfig
void IfxStm_Timer_initConfig(IfxStm_Timer_Config *config, Ifx_STM *stm)
Initializes the configuration structure to default.
Definition: IfxStm_Timer.c:240
IfxStdIf_Timer_Run
void(* IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:184
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:242
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:278
IfxStdIf_Timer_Config::startOffset
float32 startOffset
FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
Definition: IfxStdIf_Timer.h:280
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxStdIf_Timer_Stop
void(* IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:221
IfxStdIf_Timer_AckTimerIrq
boolean(* IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:227
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxStm_Timer_stop
void IfxStm_Timer_stop(IfxStm_Timer *driver)
Stops the timer see IfxStdIf_Timer_Stop.
Definition: IfxStm_Timer.c:166
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:261
IfxStm_disableComparatorInterrupt
void IfxStm_disableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt.
Definition: IfxStm.c:65
IfxStdIf_Timer_SetPeriod
boolean(* IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:194
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:277
IfxStm_get
IFX_INLINE uint64 IfxStm_get(Ifx_STM *stm)
Returns system timer value.
Definition: IfxStm.h:576
IfxStm_Timer::comparatorShift
uint8 comparatorShift
Comparator shift.
Definition: IfxStm_Timer.h:147
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxStm_Timer_getInputFrequency
float32 IfxStm_Timer_getInputFrequency(IfxStm_Timer *driver)
Returns the input frequency see IfxStdIf_Timer_GetInputFrequency.
Definition: IfxStm_Timer.c:85
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:254
IfxStdIf_Timer_SetSingleMode
void(* IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:203
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:241
IfxStm_Timer::comparatorValue
uint32 comparatorValue
Value of the comparator for the next event.
Definition: IfxStm_Timer.h:146


iLLD_TC26B: IfxStm_Timer.h Source File

  • Stm
  • Timer
IfxStm_Timer.h
Go to the documentation of this file.
1 /**
2 * \file IfxStm_Timer.h
3 * \brief STM TIMER details
4 * \ingroup IfxLld_Stm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * The timer driver enabled the generation of periodical interrupt based on the STM module.
42 *
43 * The driver is initialized with \ref IfxStm_Timer_init(). After initialization, the
44 * timer is started with \ref IfxStm_Timer_run() and stopped with \ref IfxStm_Timer_stop().
45 * Single shot can be set with \ref IfxStm_Timer_setSingleMode(), in case the timer is
46 * already running it will stop after the next event, else the timer event will occur only once.
47 *
48 * The timer interrupt must call the \ref IfxStm_Timer_acknowledgeTimerIrq() function which
49 * clears the interrupt flag and set the next compare value.
50 *
51 * Changing the period with \ref IfxStm_Timer_setPeriod() or \ref IfxStm_Timer_setFrequency() will
52 * take effect only after the next timer event.
53 *
54 *
55 * This driver implements a subset of the functionalities defined by \ref library_srvsw_stdif_timer.
56 * If does supports the timer with interrupt but not the trigger signal.
57 *
58 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_timer "standard interface APIs".
59 *
60 * \section Specific Specific implementation
61 * For a detailed configuration of the microcontroller, see \ref IfxStm_Timer_init().
62 *
63 * \section Example Usage example
64 * Initialization and interrupt:
65 * \code
66 * #define ISR_PRIORITY_TIMER_1MS (2)
67 * #define ISR_PROVIDER_TIMER_1MS IfxSrc_Tos_cpu0
68 * #define INTERRUPT_TIMER_1MS ISR_ASSIGN(ISR_PRIORITY_TIMER_1MS, ISR_PROVIDER_TIMER_1MS)
69 *
70 * IfxStm_Timer myTimer;
71 *
72 * boolean AppInit_1ms(void)
73 * {
74 * boolean result = TRUE;
75 * IfxStm_Timer_Config timerConfig;
76 * IfxStm_Timer_initConfig(&timerConfig, &MODULE_STM0);
77 * timerConfig.base.frequency = 1000;
78 * timerConfig.base.isrPriority = ISR_PRIORITY(INTERRUPT_TIMER_1MS);
79 * timerConfig.base.isrProvider = ISR_PROVIDER(INTERRUPT_TIMER_1MS);
80 * timerConfig.base.minResolution = (1.0 / timerConfig.base.frequency) / 1000;
81 * timerConfig.comparator = IfxStm_Comparator_0;
82 * result = IfxStm_Timer_init(&myTimer, &timerConfig);
83 *
84 * return result;
85 * }
86 *
87 * IFX_INTERRUPT(ISR_TIMER_1ms, 0, ISR_PRIORITY_TIMER_1MS)
88 * {
89 * __enable();
90 * IfxStm_Timer_acknowledgeTimerIrq(&myTimer);
91 * }
92 * \endcode
93 *
94 * During run-time, the timer can be started / stopped as follow:
95 * \code
96 * IfxStm_Timer_run(&myTimer);
97 * IfxStm_Timer_stop(&myTimer);
98 * \endcode
99 *
100 * \defgroup IfxLld_Stm_Timer STM Timer Interface
101 * \ingroup IfxLld_Stm
102 * \defgroup IfxLld_Stm_Timer_STMTimerDataStructures STM Timer Data Structures
103 * \ingroup IfxLld_Stm_Timer
104 * \defgroup IfxLld_Stm_Timer_globalfunction global function
105 * \ingroup IfxLld_Stm_Timer
106 */
107
108 #ifndef IFXSTM_TIMER_H
109 #define IFXSTM_TIMER_H 1
110
111 /******************************************************************************/
112 /*----------------------------------Includes----------------------------------*/
113 /******************************************************************************/
114
115 #include "Stm/Std/IfxStm.h"
116 #include "StdIf/IfxStdIf_Timer.h"
117
118 /******************************************************************************/
119 /*-----------------------------Data Structures--------------------------------*/
120 /******************************************************************************/
121
122 /** \addtogroup IfxLld_Stm_Timer_STMTimerDataStructures
123 * \{ */
124 /** \brief Structure for the timer base
125 */
126 typedef struct
127 {
128 Ifx_TimerValue period; /**< \brief Timer period in ticks (cached value) */
129 boolean triggerEnabled; /**< \brief If TRUE, the trigger functionality is Initialized */
130 float32 clockFreq; /**< \brief Timer input clock frequency (cached value) */
131 IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
132 boolean singleShot; /**< \brief If TRUE, the timer will stop after 1st event */
133 } IfxStm_Timer_Base;
134
135 /** \} */
136
137 /** \addtogroup IfxLld_Stm_Timer_STMTimerDataStructures
138 * \{ */
139 /** \brief Timer interface
140 */
141 typedef struct
142 {
143 IfxStm_Timer_Base base; /**< \brief Timer interface */
144 Ifx_STM *stm; /**< \brief STM module used for the timer functionality */
145 IfxStm_Comparator comparator; /**< \brief Comparator used for the timer functionality */
146 uint32 comparatorValue; /**< \brief Value of the comparator for the next event */
147 uint8 comparatorShift; /**< \brief Comparator shift */
148 } IfxStm_Timer;
149
150 /** \brief configuration structure for Timer
151 */
152 typedef struct
153 {
154 IfxStdIf_Timer_Config base; /**< \brief Standard interface timer configuration */
155 Ifx_STM *stm; /**< \brief STM module used for the timer functionality */
156 IfxStm_Comparator comparator; /**< \brief Comparator used for the timer functionality */
157 } IfxStm_Timer_Config;
158
159 /** \} */
160
161 /** \addtogroup IfxLld_Stm_Timer_globalfunction
162 * \{ */
163
164 /******************************************************************************/
165 /*-------------------------Global Function Prototypes-------------------------*/
166 /******************************************************************************/
167
168 /** \brief Returns the timer event
169 * see IfxStdIf_Timer_AckTimerIrq
170 * \param driver STM Timer interface Handle
171 * \return Timer interrupt event
172 */
173 IFX_EXTERN boolean IfxStm_Timer_acknowledgeTimerIrq(IfxStm_Timer *driver);
174
175 /** \brief Returns the frequency
176 * see IfxStdIf_Timer_GetFrequency
177 * \param driver STM Timer interface Handle
178 * \return Frequency
179 */
180 IFX_EXTERN float32 IfxStm_Timer_getFrequency(IfxStm_Timer *driver);
181
182 /** \brief Returns the input frequency
183 * see IfxStdIf_Timer_GetInputFrequency
184 * \param driver STM Timer interface Handle
185 * \return Frequency
186 */
187 IFX_EXTERN float32 IfxStm_Timer_getInputFrequency(IfxStm_Timer *driver);
188
189 /** \brief Returns the period of the timer
190 * see IfxStdIf_Timer_GetPeriod
191 * \param driver STM Timer interface Handle
192 * \return Period
193 */
194 IFX_EXTERN Ifx_TimerValue IfxStm_Timer_getPeriod(IfxStm_Timer *driver);
195
196 /** \brief Return the resolution of the Timer counters
197 * see IfxStdIf_Timer_GetResolution
198 * \param driver STM Timer interface handle
199 * \return Resolution
200 */
201 IFX_EXTERN float32 IfxStm_Timer_getResolution(IfxStm_Timer *driver);
202
203 /** \brief Runs the timer
204 * see IfxStdIf_Timer_Run
205 * \param driver STM Timer interface Handle
206 * \return None
207 */
208 IFX_EXTERN void IfxStm_Timer_run(IfxStm_Timer *driver);
209
210 /** \brief Sets the Frequency
211 * see IfxStdIf_Timer_SetFrequency
212 * \param driver STM Timer interface Handle
213 * \param frequency frequency
214 * \return TRUE on success else FALSE
215 */
216 IFX_EXTERN boolean IfxStm_Timer_setFrequency(IfxStm_Timer *driver, float32 frequency);
217
218 /** \brief Sets the period for the timer
219 * see IfxStdIf_Timer_SetPeriod
220 * \param driver STM Timer interface handle
221 * \param period Period value
222 * \return TRUE on success else FALSE
223 */
224 IFX_EXTERN boolean IfxStm_Timer_setPeriod(IfxStm_Timer *driver, Ifx_TimerValue period);
225
226 /** \brief Sets the single shot mode of the timer
227 * see IfxStdIf_Timer_SetSingleMode
228 * \param driver STM Timer interface Handle
229 * \param enabled If TRUE, sets the single shot mode
230 * \return None
231 */
232 IFX_EXTERN void IfxStm_Timer_setSingleMode(IfxStm_Timer *driver, boolean enabled);
233
234 /** \brief Initializes the standard interface timer
235 * \param stdif Standard interface object, will be initialized by the function
236 * \param driver driver Interface driver to be used by the standard interface. must be initialised separately
237 * \return TRUE on success else FALSE
238 */
239 IFX_EXTERN boolean IfxStm_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxStm_Timer *driver);
240
241 /** \brief Stops the timer
242 * see IfxStdIf_Timer_Stop
243 * \param driver STM Timer interface Handle
244 * \return None
245 */
246 IFX_EXTERN void IfxStm_Timer_stop(IfxStm_Timer *driver);
247
248 /** \brief Updates the input frequency
249 * see IfxStdIf_Timer_UpdateInputFrequency
250 * \param driver STM Timer interface Handle
251 * \return None
252 */
253 IFX_EXTERN void IfxStm_Timer_updateInputFrequency(IfxStm_Timer *driver);
254
255 /** \brief Initialises the timer object
256 * \param driver STM Timer interface Handle
257 * \param config Configuration structure for STM Timer
258 * \return TRUE on success else FALSE
259 */
260 IFX_EXTERN boolean IfxStm_Timer_init(IfxStm_Timer *driver, const IfxStm_Timer_Config *config);
261
262 /** \brief Initializes the configuration structure to default
263 * \param config Configuration structure for STM Timer
264 * \param stm Pointer to STM module
265 * \return None
266 */
267 IFX_EXTERN void IfxStm_Timer_initConfig(IfxStm_Timer_Config *config, Ifx_STM *stm);
268
269 /** \} */
270
271 #endif /* IFXSTM_TIMER_H */
IfxStm_Timer_getFrequency
IFX_EXTERN float32 IfxStm_Timer_getFrequency(IfxStm_Timer *driver)
Returns the frequency see IfxStdIf_Timer_GetFrequency.
Definition: IfxStm_Timer.c:79
IfxStm_Timer_getPeriod
IFX_EXTERN Ifx_TimerValue IfxStm_Timer_getPeriod(IfxStm_Timer *driver)
Returns the period of the timer see IfxStdIf_Timer_GetPeriod.
Definition: IfxStm_Timer.c:91
IfxStm_Timer_stdIfTimerInit
IFX_EXTERN boolean IfxStm_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
Initializes the standard interface timer.
Definition: IfxStm_Timer.c:141
IfxStm_Timer_Base::singleShot
boolean singleShot
If TRUE, the timer will stop after 1st event.
Definition: IfxStm_Timer.h:132
IfxStm_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxStm_Timer.h:154
IfxStm.h
STM basic functionality.
IfxStm_Timer_setPeriod
IFX_EXTERN boolean IfxStm_Timer_setPeriod(IfxStm_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer see IfxStdIf_Timer_SetPeriod.
Definition: IfxStm_Timer.c:127
IfxStm_Timer_Base
Structure for the timer base.
Definition: IfxStm_Timer.h:126
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxStm_Timer_Config
configuration structure for Timer
Definition: IfxStm_Timer.h:152
IfxStm_Comparator
IfxStm_Comparator
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2)
Definition: IfxStm.h:157
IfxStm_Timer_setSingleMode
IFX_EXTERN void IfxStm_Timer_setSingleMode(IfxStm_Timer *driver, boolean enabled)
Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode.
Definition: IfxStm_Timer.c:135
float32
float float32
Definition: Platform_Types.h:170
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:237
IfxStm_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxStm_Timer.h:128
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:272
IfxStm_Timer_setFrequency
IFX_EXTERN boolean IfxStm_Timer_setFrequency(IfxStm_Timer *driver, float32 frequency)
Sets the Frequency see IfxStdIf_Timer_SetFrequency.
Definition: IfxStm_Timer.c:119
IfxStm_Timer::comparator
IfxStm_Comparator comparator
Comparator used for the timer functionality.
Definition: IfxStm_Timer.h:145
IfxStm_Timer_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStm_Timer.h:131
IfxStm_Timer::base
IfxStm_Timer_Base base
Timer interface.
Definition: IfxStm_Timer.h:143
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStm_Timer::stm
Ifx_STM * stm
STM module used for the timer functionality.
Definition: IfxStm_Timer.h:144
IfxStm_Timer_acknowledgeTimerIrq
IFX_EXTERN boolean IfxStm_Timer_acknowledgeTimerIrq(IfxStm_Timer *driver)
Returns the timer event see IfxStdIf_Timer_AckTimerIrq.
Definition: IfxStm_Timer.c:53
IfxStdIf_Timer.h
Standard interface: Timer.
IfxStm_Timer_updateInputFrequency
IFX_EXTERN void IfxStm_Timer_updateInputFrequency(IfxStm_Timer *driver)
Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency.
Definition: IfxStm_Timer.c:172
IfxStm_Timer
Timer interface.
Definition: IfxStm_Timer.h:141
IfxStdIf_Timer_CountDir
IfxStdIf_Timer_CountDir
Timer increment direction.
Definition: IfxStdIf_Timer.h:85
IfxStm_Timer_run
IFX_EXTERN void IfxStm_Timer_run(IfxStm_Timer *driver)
Runs the timer see IfxStdIf_Timer_Run.
Definition: IfxStm_Timer.c:103
IfxStm_Timer_init
IFX_EXTERN boolean IfxStm_Timer_init(IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
Initialises the timer object.
Definition: IfxStm_Timer.c:180
IfxStm_Timer_getResolution
IFX_EXTERN float32 IfxStm_Timer_getResolution(IfxStm_Timer *driver)
Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution.
Definition: IfxStm_Timer.c:97
IfxStm_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxStm_Timer.h:130
IfxStm_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialized.
Definition: IfxStm_Timer.h:129
IfxStm_Timer_initConfig
IFX_EXTERN void IfxStm_Timer_initConfig(IfxStm_Timer_Config *config, Ifx_STM *stm)
Initializes the configuration structure to default.
Definition: IfxStm_Timer.c:240
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
IfxStm_Timer_stop
IFX_EXTERN void IfxStm_Timer_stop(IfxStm_Timer *driver)
Stops the timer see IfxStdIf_Timer_Stop.
Definition: IfxStm_Timer.c:166
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxStm_Timer::comparatorShift
uint8 comparatorShift
Comparator shift.
Definition: IfxStm_Timer.h:147
IfxStm_Timer_getInputFrequency
IFX_EXTERN float32 IfxStm_Timer_getInputFrequency(IfxStm_Timer *driver)
Returns the input frequency see IfxStdIf_Timer_GetInputFrequency.
Definition: IfxStm_Timer.c:85
IfxStm_Timer::comparatorValue
uint32 comparatorValue
Value of the comparator for the next event.
Definition: IfxStm_Timer.h:146


iLLD_TC26B: IfxStm_cfg.c Source File

  • _Impl
IfxStm_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxStm_cfg.c
3 * \brief STM on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxStm_cfg.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
51
52 IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES] = {
53 {&MODULE_STM0, IfxStm_Index_0},
54 {&MODULE_STM1, IfxStm_Index_1}
55 };
IfxStm_cfg.h
STM on-chip implementation data.
IFXSTM_NUM_MODULES
#define IFXSTM_NUM_MODULES
STM count.
Definition: IfxStm_cfg.h:70
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxStm_Index_1
STM index 1.
Definition: IfxStm_cfg.h:88
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxStm_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES]
Definition: IfxStm_cfg.c:52
IfxStm_Index_0
STM index 0.
Definition: IfxStm_cfg.h:87


iLLD_TC26B: IfxStm_cfg.h Source File

  • _Impl
IfxStm_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxStm_cfg.h
3 * \brief STM on-chip implementation data
4 * \ingroup IfxLld_Stm
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Stm STM
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Stm_Impl Implementation
44 * \ingroup IfxLld_Stm
45 * \defgroup IfxLld_Stm_Std Standard Driver
46 * \ingroup IfxLld_Stm
47 * \defgroup IfxLld_Stm_Impl_Enumerations Enumerations
48 * \ingroup IfxLld_Stm_Impl
49 * \defgroup IfxLld_Stm_Impl_Variables Global Variables
50 * \ingroup IfxLld_Stm_Impl
51 */
52
53 #ifndef IFXSTM_CFG_H
54 #define IFXSTM_CFG_H 1
55
56 /******************************************************************************/
57 /*----------------------------------Includes----------------------------------*/
58 /******************************************************************************/
59
60 #include "Cpu/Std/IfxCpu_Intrinsics.h"
61 #include "IfxStm_reg.h"
62 #include "Cpu/Std/Ifx_Types.h"
63
64 /******************************************************************************/
65 /*-----------------------------------Macros-----------------------------------*/
66 /******************************************************************************/
67
68 /** \brief STM count
69 */
70 #define IFXSTM_NUM_MODULES 2
71
72 /** \brief No Of Comparators per Stm
73 */
74 #define IFXSTM_NUM_COMPARATORS (2)
75
76 /******************************************************************************/
77 /*--------------------------------Enumerations--------------------------------*/
78 /******************************************************************************/
79
80 /** \addtogroup IfxLld_Stm_Impl_Enumerations
81 * \{ */
82 /** \brief List of the available STM resources
83 */
84 typedef enum
85 {
86 IfxStm_Index_none = -1, /**< \brief Not Selected */
87 IfxStm_Index_0 = 0, /**< \brief STM index 0 */
88 IfxStm_Index_1 /**< \brief STM index 1 */
89 } IfxStm_Index;
90
91 /** \} */
92
93 /** \addtogroup IfxLld_Stm_Impl_Variables
94 * \{ */
95
96 /******************************************************************************/
97 /*-------------------Global Exported Variables/Constants----------------------*/
98 /******************************************************************************/
99
100 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES];
101
102 /** \} */
103
104 #endif /* IFXSTM_CFG_H */
IfxStm_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES]
Definition: IfxStm_cfg.h:100
IfxStm_Index
IfxStm_Index
List of the available STM resources.
Definition: IfxStm_cfg.h:84
IfxCpu_Intrinsics.h
IFXSTM_NUM_MODULES
#define IFXSTM_NUM_MODULES
STM count.
Definition: IfxStm_cfg.h:70
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxStm_Index_1
STM index 1.
Definition: IfxStm_cfg.h:88
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxStm_Index_none
Not Selected.
Definition: IfxStm_cfg.h:86
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:140
IfxStm_Index_0
STM index 0.
Definition: IfxStm_cfg.h:87


iLLD_TC26B: IfxVadc.c Source File

  • Vadc
  • Std
IfxVadc.c
Go to the documentation of this file.
1 /**
2 * \file IfxVadc.c
3 * \brief VADC basic functionality
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxVadc.h"
47
48 /******************************************************************************/
49 /*-------------------------Function Implementations---------------------------*/
50 /******************************************************************************/
51
52 void IfxVadc_configExternalMultiplexerMode(Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle)
53 {
54 Ifx_VADC_G_EMUXCTR emuxctr;
55
56 emuxctr.B.EMXWC = 1;
57 emuxctr.B.EMUXMODE = mode;
58 emuxctr.B.EMXCSS = channelSelectionStyle;
59 emuxctr.B.EMUXCH = channels;
60 emuxctr.B.EMUXSET = startChannel;
61 emuxctr.B.EMXCOD = code;
62 emuxctr.B.EMXST = sampleTimeControl;
63 IfxVadc_enableAccess(vadc, IfxVadc_Protection_externalMultiplexer);
64 vadcG->EMUXCTR.U = emuxctr.U;
65 emuxctr.B.EMXWC = 0;
66 vadcG->EMUXCTR.U = emuxctr.U;
67 IfxVadc_disableAccess(vadc, IfxVadc_Protection_externalMultiplexer);
68 }
69
70
71 void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
72 {
73 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
74 IfxScuWdt_clearSafetyEndinit(passwd);
75
76 if (protectionSet < IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER)
77 {
78 vadc->ACCPROT0.U |= (0x00000001 << protectionSet);
79 }
80 else
81 {
82 vadc->ACCPROT1.U |= (0x00000001 << (protectionSet & 0x1F));
83 }
84
85 IfxScuWdt_setSafetyEndinit(passwd);
86 }
87
88
89 void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable)
90 {
91 if (group < IFXVADC_NUM_ADC_CAL_GROUPS)
92 {
93 IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
94
95 uint32 mask = 1 << (IFX_VADC_GLOBCFG_DPCAL0_OFF + group);
96
97 if (disable == TRUE)
98 {
99 vadc->GLOBCFG.U |= mask;
100 }
101 else
102 {
103 vadc->GLOBCFG.U &= ~mask;
104 }
105
106 IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
107 }
108 }
109
110
111 void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
112 {
113 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
114 IfxScuWdt_clearSafetyEndinit(passwd);
115
116 if (protectionSet < IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER)
117 {
118 vadc->ACCPROT0.U &= ~(0x00000001 << protectionSet);
119 }
120 else
121 {
122 vadc->ACCPROT1.U &= ~(0x00000001 << (protectionSet & 0x1F));
123 }
124
125 IfxScuWdt_setSafetyEndinit(passwd);
126 }
127
128
129 void IfxVadc_enableGroupSync(Ifx_VADC *vadc, uint32 ccu6Num)
130 {
131 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
132 IfxScuWdt_clearCpuEndinit(passwd);
133
134 // VADC Config: enable ADC group sync
135 {
136 Ifx_VADC_GLOBCFG vadcGlobCfg;
137 vadcGlobCfg.U = vadc->GLOBCFG.U;
138 vadcGlobCfg.B.DIVWC = 1;
139 vadcGlobCfg.B.DCMSB = 1;
140
141 IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
142 vadc->GLOBCFG.U = vadcGlobCfg.U;
143 IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
144 }
145
146 if (ccu6Num == 0)
147 {
148 // CCU60 Config
149 CCU60_CLC.U = 0;
150
151 if (CCU60_CLC.U)
152 {}
153
154 CCU60_T13PR.U = 4; // results in 4+1 clock periods (100MHz) = 20MHz
155 CCU60_CC63SR.U = 4; // configures duty cycle of 40ns low and 10ns high
156 CCU60_MODCTR.B.ECT13O = 1; // bit ECT130 = 1 serves to route CC63ST signals out to COUT63
157 CCU60_TCTR4.U = (1 << IFX_CCU6_TCTR4_T13STR_OFF) | (1 << IFX_CCU6_TCTR4_T13RS_OFF); // set bit T13STR & T13RS -> enable shadow transfer & start timer T13
158 CCU60_MOSEL.B.TRIG1SEL = 0; // CCU60_COUT63 routed to output signal CCU6061 TRIG1
159 }
160 else if (ccu6Num == 1)
161 {
162 // CCU60 + CCU61 Config
163 CCU60_CLC.U = 0;
164 CCU61_CLC.U = 0;
165
166 if (CCU61_CLC.U)
167 {}
168
169 CCU61_T13PR.U = 4; // results in 4+1 clock periods (100MHz) = 20MHz
170 CCU61_CC63SR.U = 4; // configures duty cycle of 40ns low and 10ns high
171 CCU61_MODCTR.B.ECT13O = 1; // bit ECT130 = 1 serves to route CC63ST signals out to COUT63
172 CCU61_TCTR4.U = (1 << IFX_CCU6_TCTR4_T13STR_OFF) | (1 << IFX_CCU6_TCTR4_T13RS_OFF); // set bit T13STR & T13RS -> enable shadow transfer & start timer T13
173 CCU60_MOSEL.B.TRIG1SEL = 1; // CCU61_COUT63 routed to output signal CCU6061 TRIG1
174 }
175
176 IfxScuWdt_setCpuEndinit(passwd);
177 }
178
179
180 float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc)
181 {
182 return IfxScuCcu_getSpbFrequency() / (1U + vadc->GLOBCFG.B.DIVA);
183 }
184
185
186 float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc)
187 {
188 return IfxScuCcu_getSpbFrequency() / (1U + vadc->GLOBCFG.B.DIVD);
189 }
190
191
192 float32 IfxVadc_getAdcModuleFrequency(void)
193 {
194 return IfxScuCcu_getSpbFrequency();
195 }
196
197
198 IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc)
199 {
200 IfxVadc_Status status = IfxVadc_Status_noError;
201 uint8 i;
202
203 for (i = 0; i < IFXVADC_NUM_ADC_GROUPS; i++)
204 {
205 if (vadc->BRSPND[i].U)
206 {
207 return IfxVadc_Status_channelsStillPending;
208 }
209 else
210 {
211 continue;
212 }
213 }
214
215 return status;
216 }
217
218
219 float32 IfxVadc_getChannelConversionTime(Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode)
220 {
221 float32 conversionTime = 0.0;
222 Ifx_VADC_G *vadcG = &vadc->G[group];
223 uint32 stcs;
224 IfxVadc_ChannelResolution resolution;
225 uint32 n;
226
227 uint32 inputClassNum;
228
229 if (inputClass <= IfxVadc_InputClasses_group1)
230 {
231 inputClassNum = inputClass;
232 stcs = vadcG->ICLASS[inputClassNum].B.STCS;
233 resolution = (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CMS;
234 }
235 else
236 {
237 inputClassNum = inputClass - IfxVadc_InputClasses_global0;
238 stcs = vadc->GLOBICLASS[inputClassNum].B.STCS;
239 resolution = (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CMS;
240 }
241
242 if (stcs > 16)
243 {
244 stcs = (stcs - 15) * 16; // Reference for the logic: Table 28-4 of TC29xB User Manual v1.3
245 }
246
247 switch (resolution)
248 {
249 case IfxVadc_ChannelResolution_12bit: n = 12;
250 break;
251 case IfxVadc_ChannelResolution_10bit: n = 10;
252 break;
253 case IfxVadc_ChannelResolution_8bit: n = 8;
254 break;
255 case IfxVadc_ChannelResolution_10bitFast: n = 10;
256 break;
257 default: n = 0;
258 break;
259 }
260
261 if (conversionMode == IfxVadc_ConversionType_Compatible)
262 {
263 if (resolution != IfxVadc_ChannelResolution_10bitFast)
264 {
265 /* Standard conversion */
266 uint32 pc = IfxVadc_isPostCalibration(vadc, group) ? 2 : 0;
267 conversionTime = (float32)(2 + stcs + n + pc) / analogFrequency + 2.0 / moduleFrequency;
268 }
269 else
270 {
271 /* Fast compare mode */
272 conversionTime = (float32)(2 + stcs + 2) / analogFrequency + 2.0 / moduleFrequency;
273 }
274 }
275 else
276 {
277 // do nothing
278 }
279
280 return conversionTime;
281 }
282
283
284 IfxVadc_Status IfxVadc_getQueueStatus(Ifx_VADC_G *group)
285 {
286 IfxVadc_Status status = IfxVadc_Status_noError;
287
288 /* just fill level is checked */
289 if (0x7 == group->QSR0.B.FILL)
290 {
291 status = IfxVadc_Status_queueFull;
292 }
293 else
294 {
295 status = IfxVadc_Status_noError;
296 }
297
298 return status;
299 }
300
301
302 Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
303 {
304 sint32 sourceResultRegister = -1;
305 Ifx_VADC_RES tmpResult;
306
307 switch (sourceType)
308 {
309 case IfxVadc_RequestSource_queue:
310 sourceResultRegister = group->QCTRL0.B.SRCRESREG;
311 break;
312
313 case IfxVadc_RequestSource_scan:
314 sourceResultRegister = group->ASCTRL.B.SRCRESREG;
315 break;
316
317 case IfxVadc_RequestSource_background:
318 sourceResultRegister = vadc->BRSCTRL.B.SRCRESREG;
319 break;
320 }
321
322 if (sourceResultRegister > 0)
323 {
324 tmpResult.U = group->RES[sourceResultRegister].U;
325
326 return tmpResult;
327 }
328 else
329 {
330 if ((sourceType == IfxVadc_RequestSource_background) && (group->CHCTR[channel].B.RESTBS == 1))
331 {
332 tmpResult.B.VF = vadc->GLOBRES.B.VF;
333 tmpResult.B.FCR = vadc->GLOBRES.B.FCR;
334 tmpResult.B.CRS = vadc->GLOBRES.B.CRS;
335 tmpResult.B.EMUX = vadc->GLOBRES.B.EMUX;
336 tmpResult.B.CHNR = vadc->GLOBRES.B.CHNR;
337 tmpResult.B.DRC = vadc->GLOBRES.B.GNR; //The bitfields are the same but interpretation is different. TODO- define a generic result register type.
338 tmpResult.B.RESULT = vadc->GLOBRES.B.RESULT;
339
340 return tmpResult;
341 }
342 else
343 {
344 tmpResult.U = group->RES[group->CHCTR[channel].B.RESREG].U;
345
346 return tmpResult;
347 }
348 }
349 }
350
351
352 IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group)
353 {
354 IfxVadc_Status status = IfxVadc_Status_noError;
355
356 if (group->ASPND.U)
357 {
358 return IfxVadc_Status_channelsStillPending;
359 }
360 else
361 {
362 return status;
363 }
364 }
365
366
367 volatile Ifx_SRC_SRCR *IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index)
368 {
369 Ifx_SRC_SRCR *base;
370
371 if (IfxVadc_SrcNr_shared0 <= index)
372 {
373 index -= 4;
374
375 if ((group & 0x1) != 0)
376 {
377 group = IfxVadc_GroupId_global1; /* Shared interrupt common 1 is used */
378 }
379 else
380 {
381 group = IfxVadc_GroupId_global0; /* Shared interrupt common 0 is used */
382 }
383 }
384 else
385 {
386 /* do nothing */
387 }
388
389 base = (Ifx_SRC_SRCR *)IfxVadc_cfg_srcAddresses[(group * 4) + index];
390
391 return &(base[0]);
392 }
393
394
395 void IfxVadc_initialiseAdcArbiterClock(Ifx_VADC *vadc, uint32 arbiterClockDivider)
396 {
397 Ifx_VADC_GLOBCFG tempGLOBCFG;
398 tempGLOBCFG.U = vadc->GLOBCFG.U;
399 tempGLOBCFG.B.DIVD = arbiterClockDivider;
400 tempGLOBCFG.B.DIVWC = 1;
401 IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
402 vadc->GLOBCFG.U = tempGLOBCFG.U;
403 IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
404 }
405
406
407 void IfxVadc_initialiseAdcConverterClock(Ifx_VADC *vadc, uint32 converterClockDivider)
408 {
409 Ifx_VADC_GLOBCFG tempGLOBCFG;
410 tempGLOBCFG.U = vadc->GLOBCFG.U;
411 tempGLOBCFG.B.DIVA = converterClockDivider;
412 tempGLOBCFG.B.DIVWC = 1;
413 IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
414 vadc->GLOBCFG.U = tempGLOBCFG.U;
415 IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
416 }
417
418
419 uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD)
420 {
421 uint32 divD;
422 uint32 result;
423 uint32 fadc = IfxScuCcu_getSpbFrequency();
424
425 divD = (fadc / fAdcD - 1);
426
427 divD = __minu(divD, 0x3u);
428
429 result = fadc / (divD + 1);
430 IfxVadc_initialiseAdcArbiterClock(vadc, divD);
431 return result;
432 }
433
434
435 uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI)
436 {
437 uint32 divA;
438 uint32 result;
439 uint32 fadc = IfxScuCcu_getSpbFrequency();
440
441 /* DivA = min(max(0, Fadc / FAdcI - 1), 0x3F); */
442 divA = (fadc << 2) / fAdcI;
443
444 divA = (divA + 2) >> 2; /* Round to nearest integer */
445 divA = __minu(divA - 1, 0x1Fu);
446 result = fadc / (divA + 1);
447
448 if (result > IFXVADC_ANALOG_FREQUENCY_MAX)
449 {
450 divA = __minu(divA + 1, 0x1Fu);
451
452 result = fadc / (divA + 1);
453 }
454 else
455 {
456 /* do nothing */
457 }
458
459 if (!((result >= IFXVADC_ANALOG_FREQUENCY_MIN) && (result <= IFXVADC_ANALOG_FREQUENCY_MAX)))
460 {
461 result = 0; /* Min / Max FAdcI frequency */
462 }
463 else
464 {
465 IfxVadc_initialiseAdcConverterClock(vadc, divA);
466 }
467
468 return result;
469 }
470
471
472 boolean IfxVadc_isPostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group)
473 {
474 boolean pcEnabled;
475
476 switch (group)
477 {
478 case IfxVadc_GroupId_0: pcEnabled = vadc->GLOBCFG.B.DPCAL0 == 0;
479 break;
480 case IfxVadc_GroupId_1: pcEnabled = vadc->GLOBCFG.B.DPCAL1 == 0;
481 break;
482 case IfxVadc_GroupId_2: pcEnabled = vadc->GLOBCFG.B.DPCAL2 == 0;
483 break;
484 case IfxVadc_GroupId_3: pcEnabled = vadc->GLOBCFG.B.DPCAL3 == 0;
485 break;
486 default: pcEnabled = FALSE;
487 break;
488 }
489
490 return pcEnabled;
491 }
492
493
494 void IfxVadc_resetKernel(Ifx_VADC *vadc)
495 {
496 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
497
498 IfxScuWdt_clearCpuEndinit(passwd);
499 IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
500 vadc->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
501 vadc->KRST0.B.RST = 1;
502 IfxScuWdt_setCpuEndinit(passwd);
503
504 while (vadc->KRST0.B.RSTSTAT == 0) /* Wait until reset is executed */
505
506 {}
507
508 IfxScuWdt_clearCpuEndinit(passwd);
509 vadc->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
510 IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
511 IfxScuWdt_setCpuEndinit(passwd);
512 }
513
514
515 void IfxVadc_selectPowerSupplyVoltage(Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage)
516 {
517 Ifx_VADC_GLOBCFG tempGLOBCFG;
518 tempGLOBCFG.U = vadc->GLOBCFG.U;
519 tempGLOBCFG.B.LOSUP = supplyVoltage;
520 tempGLOBCFG.B.DIVWC = 1;
521 IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
522 vadc->GLOBCFG.U = tempGLOBCFG.U;
523 IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
524 }
525
526
527 void IfxVadc_setArbiterPriority(Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot)
528 {
529 if (slotEnable != FALSE)
530 {
531 vadcG->ARBPR.U |= slotEnable << (IFX_VADC_G_ARBPR_ASEN0_OFF + slot); /* enable Slot */
532 vadcG->ARBPR.U &= ~(IFX_VADC_G_ARBPR_PRIO0_MSK << (slot * 4u)); /* clear Priority */
533 vadcG->ARBPR.U |= (prio << (slot * 4u)); /* Set Priority */
534
535 if (mode != IfxVadc_RequestSlotStartMode_waitForStart)
536 {
537 vadcG->ARBPR.U |= 0x1u << (IFX_VADC_G_ARBPR_CSM0_OFF + (slot * 4u)); /* Set cancel inject mode */
538 }
539 else
540 {
541 vadcG->ARBPR.U &= ~(0x1u << (IFX_VADC_G_ARBPR_CSM0_OFF + (slot * 4u))); /* Set Wait for Start mode */
542 }
543 }
544 else
545 {
546 vadcG->ARBPR.U &= ~(IFX_VADC_G_ARBPR_ASEN0_MSK << (IFX_VADC_G_ARBPR_ASEN0_OFF + slot)); /* disable Slot */
547 }
548 }
549
550
551 void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask)
552 {
553 /* select channels which should take part in the scan sequence */
554 /* the mask allows to specify the channels which should be enabled/disabled */
555 group->ASSEL.U = (group->ASSEL.U & ~mask) | (channels & mask);
556 }
557
558
559 void IfxVadc_startupCalibration(Ifx_VADC *vadc)
560 {
561 boolean calibrationRunning;
562 uint8 adcCalGroupNum;
563
564 /* Start calibration */
565 IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
566 /* Set SUCAL bit */
567 IfxVadc_initiateStartupCalibration(vadc);
568 IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
569
570 /* Wait for hardware self-test and calibration to complete */
571 /* Wait until Calibration is done */
572 do
573 {
574 calibrationRunning = FALSE;
575
576 for (adcCalGroupNum = 0; adcCalGroupNum < IFXVADC_NUM_ADC_CAL_GROUPS; adcCalGroupNum++)
577 {
578 if (IfxVadc_getAdcCalibrationActiveState(vadc, adcCalGroupNum) != 0) /* Check ADC Calibration Flag CAL */
579 {
580 calibrationRunning = TRUE;
581 }
582 else
583 {
584 /* do nothing */
585 }
586 }
587 } while (calibrationRunning == TRUE); /* wait until calibration of all calibrated kernels are done */
588 }
IfxVadc_ChannelResolution_8bit
8-bit conversion
Definition: IfxVadc.h:174
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:572
IfxVadc_disableAccess
void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Disable write access to the VADC config/control registers.
Definition: IfxVadc.c:71
IfxVadc_ChannelId
IfxVadc_ChannelId
VADC Channels.
Definition: IfxVadc.h:139
IfxVadc_ChannelSelectionStyle
IfxVadc_ChannelSelectionStyle
External Multiplexer Channel Selection Style as defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCSS.
Definition: IfxVadc.h:203
IfxVadc_getResultBasedOnRequestSource
Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset...
Definition: IfxVadc.c:302
IfxVadc_EmuxCodingScheme
IfxVadc_EmuxCodingScheme
Specifies the External Coding scheme(binary/gray) defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD.
Definition: IfxVadc.h:220
IfxVadc_initiateStartupCalibration
IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc)
initiates the calibration pulse phase.
Definition: IfxVadc.h:2149
IfxVadc_GroupId_1
VADC group 1.
Definition: IfxVadc_cfg.h:119
IfxVadc_ConversionType
IfxVadc_ConversionType
type of conversion
Definition: IfxVadc.h:212
IfxVadc_getAdcDigitalFrequency
float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc)
Returns the configured Fadcd VADC digital clock frequency in Hz.
Definition: IfxVadc.c:186
IfxVadc_getQueueStatus
IfxVadc_Status IfxVadc_getQueueStatus(Ifx_VADC_G *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full...
Definition: IfxVadc.c:284
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxVadc_GroupId_3
VADC group 3.
Definition: IfxVadc_cfg.h:121
IfxVadc_RequestSource_background
background scan request
Definition: IfxVadc.h:432
float32
float float32
Definition: Platform_Types.h:170
IfxVadc_Status_queueFull
Queue is full.
Definition: IfxVadc.h:468
IfxVadc_RequestSource_queue
8 stage Queue request
Definition: IfxVadc.h:430
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IfxVadc_cfg_srcAddresses
IFX_CONST uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS *4)+(IFXVADC_NUM_ADC_COMMON_GROUPS *4)]
Definition: IfxVadc_cfg.c:52
IfxVadc_InputClasses_global0
Use global class 0.
Definition: IfxVadc.h:317
IfxVadc_GroupId_0
VADC group 0.
Definition: IfxVadc_cfg.h:118
IfxVadc_SrcNr_shared0
Select shared service request line 0.
Definition: IfxVadc.h:452
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxVadc_ChannelResolution
IfxVadc_ChannelResolution
ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
Definition: IfxVadc.h:170
IfxVadc_disablePostCalibration
void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable)
Disables the post calibration.
Definition: IfxVadc.c:89
IfxVadc_GroupId_global0
VADC group global0.
Definition: IfxVadc_cfg.h:122
IfxVadc_RequestSource
IfxVadc_RequestSource
Request sources.
Definition: IfxVadc.h:428
IfxVadc_ChannelResolution_10bit
10-bit conversion
Definition: IfxVadc.h:173
IfxVadc_GroupId_global1
VADC group global1.
Definition: IfxVadc_cfg.h:123
FALSE
#define FALSE
Definition: Platform_Types.h:93
IFXVADC_ANALOG_FREQUENCY_MIN
#define IFXVADC_ANALOG_FREQUENCY_MIN
Minimum allowed analog frequency.
Definition: IfxVadc_cfg.h:76
IfxVadc_setScan
void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask)
Configures an (auto-)scan.
Definition: IfxVadc.c:551
IfxVadc_enableGroupSync
void IfxVadc_enableGroupSync(Ifx_VADC *vadc, uint32 ccu6Num)
Enables the CCU6 based ADC group synchronisation as workaround for Erratum ADC_TC.068.
Definition: IfxVadc.c:129
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:195
IfxVadc_EmuxSampleTimeControl
IfxVadc_EmuxSampleTimeControl
External Multiplexer sample time control defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST.
Definition: IfxVadc.h:237
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxVadc_setArbiterPriority
void IfxVadc_setArbiterPriority(Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot)
Sets the Arbiter slot configurations.
Definition: IfxVadc.c:527
IfxVadc_Protection_globalConfig
Access control for GLOBCFG.
Definition: IfxVadc.h:374
IfxVadc_InputClasses
IfxVadc_InputClasses
inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16) ...
Definition: IfxVadc.h:313
IfxVadc_RequestSlotPriority
IfxVadc_RequestSlotPriority
Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
Definition: IfxVadc.h:410
IfxVadc_ExternalMultiplexerMode
IfxVadc_ExternalMultiplexerMode
Specifies External Multiplexer Mode define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE.
Definition: IfxVadc.h:261
IfxVadc_getSrcAddress
volatile Ifx_SRC_SRCR * IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index)
Gives the SRC source address.
Definition: IfxVadc.c:367
IFXVADC_NUM_ADC_CAL_GROUPS
#define IFXVADC_NUM_ADC_CAL_GROUPS
Number of calibrated ADC Groups.
Definition: IfxVadc_cfg.h:68
IfxVadc_LowSupplyVoltageSelect
IfxVadc_LowSupplyVoltageSelect
Low Power Supply Voltage Select.
Definition: IfxVadc.h:333
IfxVadc_getBackgroundScanStatus
IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc)
Gives the background scan status for a group.
Definition: IfxVadc.c:198
IfxVadc_Protection
IfxVadc_Protection
Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U.
Definition: IfxVadc.h:341
IfxVadc_initialiseAdcArbiterClock
void IfxVadc_initialiseAdcArbiterClock(Ifx_VADC *vadc, uint32 arbiterClockDivider)
Initialises ADC arbiter clock.
Definition: IfxVadc.c:395
IfxVadc_initializeFAdcI
uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI)
Configure the ADC analog clock.
Definition: IfxVadc.c:435
IfxVadc_EmuxSelectValue
IfxVadc_EmuxSelectValue
specifies the External Channel Start select value defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET
Definition: IfxVadc.h:246
IfxVadc_Status_noError
No error during api execution.
Definition: IfxVadc.h:464
IfxVadc_RequestSource_scan
scan request
Definition: IfxVadc.h:431
IfxVadc_Status_channelsStillPending
Conversion for some of the channels are still pending.
Definition: IfxVadc.h:470
IfxVadc_startupCalibration
void IfxVadc_startupCalibration(Ifx_VADC *vadc)
Starts ADC calibration and wait for the end of the calibration process.
Definition: IfxVadc.c:559
IfxVadc_getScanStatus
IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group)
Gives the scan status for a group.
Definition: IfxVadc.c:352
u
uint32 min u
Definition: IfxCpu_IntrinsicsDcc.h:143
IfxVadc_ConversionType_Compatible
Compatible Timing Mode.
Definition: IfxVadc.h:214
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:424
IfxVadc_isPostCalibration
boolean IfxVadc_isPostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group)
Return the post calibration status.
Definition: IfxVadc.c:472
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:253
IfxVadc_ChannelResolution_10bitFast
10-bit cfast compare mode
Definition: IfxVadc.h:175
IfxVadc_Protection_externalMultiplexer
Access control for EMUXSEL, GxEMUXCTR.
Definition: IfxVadc.h:358
sint32
long sint32
Definition: Platform_Types.h:134
IfxVadc_InputClasses_group1
Use group class 1.
Definition: IfxVadc.h:316
IfxVadc_getAdcCalibrationActiveState
IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum)
gets ADC Calibration Flag CAL status.
Definition: IfxVadc.h:1844
IfxVadc_getAdcAnalogFrequency
float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc)
Returns the configured Fadci VADC analog clock frequency in Hz.
Definition: IfxVadc.c:180
IfxVadc_ChannelResolution_12bit
12-bit conversion
Definition: IfxVadc.h:172
IfxVadc_configExternalMultiplexerMode
void IfxVadc_configExternalMultiplexerMode(Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle)
Definition: IfxVadc.c:52
IfxVadc_GroupId
IfxVadc_GroupId
VADC Groups
Definition: IfxVadc_cfg.h:116
IfxVadc_RequestSlotStartMode
IfxVadc_RequestSlotStartMode
Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
Definition: IfxVadc.h:420
IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER
#define IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER
Maximum number of configurable bitfields in ACCPROT0 register.
Definition: IfxVadc_cfg.h:92
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxVadc_getAdcModuleFrequency
float32 IfxVadc_getAdcModuleFrequency(void)
Module Frequency in Hz.
Definition: IfxVadc.c:192
IfxVadc_Status
IfxVadc_Status
API return values defined in MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U MODULE_VADC.BRSPNDx
Definition: IfxVadc.h:462
IfxVadc_RequestSlotStartMode_waitForStart
Wait for start.
Definition: IfxVadc.h:422
IFXVADC_NUM_ADC_GROUPS
#define IFXVADC_NUM_ADC_GROUPS
Number of ADC Groups.
Definition: IfxVadc_cfg.h:64
IfxVadc_getChannelConversionTime
float32 IfxVadc_getChannelConversionTime(Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode)
get channel conversion timing
Definition: IfxVadc.c:219
IfxVadc_resetKernel
void IfxVadc_resetKernel(Ifx_VADC *vadc)
Resets the kernel.
Definition: IfxVadc.c:494
TRUE
#define TRUE
Definition: Platform_Types.h:90
disable
void disable
Definition: IfxCpu_IntrinsicsDcc.h:465
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxVadc_initialiseAdcConverterClock
void IfxVadc_initialiseAdcConverterClock(Ifx_VADC *vadc, uint32 converterClockDivider)
Initialises the ADC Converter clock.
Definition: IfxVadc.c:407
IFXVADC_ANALOG_FREQUENCY_MAX
#define IFXVADC_ANALOG_FREQUENCY_MAX
Maximum allowed analog frequency.
Definition: IfxVadc_cfg.h:72
IfxVadc_SrcNr
IfxVadc_SrcNr
Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
Definition: IfxVadc.h:446
IfxVadc.h
VADC basic functionality.
IfxVadc_enableAccess
void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Enable write access to the VADC config/control registers.
Definition: IfxVadc.c:111
IfxVadc_GroupId_2
VADC group 2.
Definition: IfxVadc_cfg.h:120
IfxVadc_initializeFAdcD
uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD)
Configure the FadcD vadc digital clock.
Definition: IfxVadc.c:419
IfxVadc_selectPowerSupplyVoltage
void IfxVadc_selectPowerSupplyVoltage(Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage)
Select Low Power Supply Voltage.
Definition: IfxVadc.c:515


iLLD_TC26B: IfxVadc.h Source File

  • Vadc
  • Std
IfxVadc.h
Go to the documentation of this file.
1 /**
2 * \file IfxVadc.h
3 * \brief VADC basic functionality
4 * \ingroup IfxLld_Vadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Vadc_Std_Enum Enumerations
42 * \ingroup IfxLld_Vadc_Std
43 * \defgroup IfxLld_Vadc_Std_Background_Autoscan Background Autoscan Functions
44 * \ingroup IfxLld_Vadc_Std
45 * \defgroup IfxLld_Vadc_Std_ChannelScan Channel Scan Functions
46 * \ingroup IfxLld_Vadc_Std
47 * \defgroup IfxLld_Vadc_Std_QueueRequest Queue Request Functions
48 * \ingroup IfxLld_Vadc_Std
49 * \defgroup IfxLld_Vadc_Std_IO IO Pin Configuration Functions
50 * \ingroup IfxLld_Vadc_Std
51 * \defgroup IfxLld_Vadc_Std_Frequency Frequency Calculation
52 * \ingroup IfxLld_Vadc_Std
53 * \defgroup IfxLld_Vadc_Std_Group Group Functions
54 * \ingroup IfxLld_Vadc_Std
55 * \defgroup IfxLld_Vadc_Std_Module Module Functions
56 * \ingroup IfxLld_Vadc_Std
57 * \defgroup IfxLld_Vadc_Std_Channel Channel Functions
58 * \ingroup IfxLld_Vadc_Std
59 * \defgroup IfxLld_Vadc_Std_Emux Emux Functions
60 * \ingroup IfxLld_Vadc_Std
61 */
62
63 #ifndef IFXVADC_H
64 #define IFXVADC_H 1
65
66 /******************************************************************************/
67 /*----------------------------------Includes----------------------------------*/
68 /******************************************************************************/
69
70 #include "_Impl/IfxVadc_cfg.h"
71 #include "_PinMap/IfxVadc_PinMap.h"
72 #include "IfxVadc_bf.h"
73 #include "Cpu/Std/IfxCpu_Intrinsics.h"
74 #include "Scu/Std/IfxScuCcu.h"
75 #include "Scu/Std/IfxScuWdt.h"
76 #include "IfxCcu6_reg.h"
77 #include "IfxCcu6_bf.h"
78
79 /******************************************************************************/
80 /*--------------------------------Enumerations--------------------------------*/
81 /******************************************************************************/
82
83 /** \addtogroup IfxLld_Vadc_Std_Enum
84 * \{ */
85 /** \brief Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC
86 */
87 typedef enum
88 {
89 IfxVadc_AnalogConverterMode_off = 0, /**< \brief Analog Converter off */
90 IfxVadc_AnalogConverterMode_slowStandby = 1, /**< \brief Slow Standby Mode */
91 IfxVadc_AnalogConverterMode_fastStandby = 2, /**< \brief Fast Standby Mode */
92 IfxVadc_AnalogConverterMode_normalOperation = 3 /**< \brief Normal operation mode */
93 } IfxVadc_AnalogConverterMode;
94
95 /** \brief Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)
96 */
97 typedef enum
98 {
99 IfxVadc_ArbitrationRounds_4_slots = 0, /**< \brief An arbitration round contains 4 arbitration slots. */
100 IfxVadc_ArbitrationRounds_8_slots = 1, /**< \brief An arbitration round contains 8 arbitration slots. */
101 IfxVadc_ArbitrationRounds_16_slots = 2, /**< \brief An arbitration round contains 16 arbitration slots. */
102 IfxVadc_ArbitrationRounds_20_slots = 3 /**< \brief An arbitration round contains 20 arbitration slots. */
103 } IfxVadc_ArbitrationRounds;
104
105 /** \brief Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
106 */
107 typedef enum
108 {
109 IfxVadc_BoundaryExtension_standard = 0, /**< \brief Boundary Standard mode. BNDSELU/BNDSELL as Boundaries */
110 IfxVadc_BoundaryExtension_fastCompareResult1 = 1, /**< \brief Fast compare mode use as upper boundary Channel result 1 */
111 IfxVadc_BoundaryExtension_fastCompareResult2 = 2, /**< \brief Fast compare mode use as upper boundary Channel result 2 */
112 IfxVadc_BoundaryExtension_fastCompareResult3 = 3, /**< \brief Fast compare mode use as upper boundary Channel result 3 */
113 IfxVadc_BoundaryExtension_fastCompareResult4 = 4, /**< \brief Fast compare mode use as upper boundary Channel result 4 */
114 IfxVadc_BoundaryExtension_fastCompareResult5 = 5, /**< \brief Fast compare mode use as upper boundary Channel result 5 */
115 IfxVadc_BoundaryExtension_fastCompareResult6 = 6, /**< \brief Fast compare mode use as upper boundary Channel result 6 */
116 IfxVadc_BoundaryExtension_fastCompareResult7 = 7, /**< \brief Fast compare mode use as upper boundary Channel result 7 */
117 IfxVadc_BoundaryExtension_fastCompareResult8 = 8, /**< \brief Fast compare mode use as upper boundary Channel result 8 */
118 IfxVadc_BoundaryExtension_fastCompareResult9 = 9, /**< \brief Fast compare mode use as upper boundary Channel result 9 */
119 IfxVadc_BoundaryExtension_fastCompareResult10 = 10, /**< \brief Fast compare mode use as upper boundary Channel result 10 */
120 IfxVadc_BoundaryExtension_fastCompareResult11 = 11, /**< \brief Fast compare mode use as upper boundary Channel result 11 */
121 IfxVadc_BoundaryExtension_fastCompareResult12 = 12, /**< \brief Fast compare mode use as upper boundary Channel result 12 */
122 IfxVadc_BoundaryExtension_fastCompareResult13 = 13, /**< \brief Fast compare mode use as upper boundary Channel result 13 */
123 IfxVadc_BoundaryExtension_fastCompareResult14 = 14, /**< \brief Fast compare mode use as upper boundary Channel result 14 */
124 IfxVadc_BoundaryExtension_fastCompareResult15 = 15 /**< \brief Fast compare mode use as upper boundary Channel result 15 */
125 } IfxVadc_BoundaryExtension;
126
127 /** \brief BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
128 */
129 typedef enum
130 {
131 IfxVadc_BoundarySelection_group0 = 0, /**< \brief Use group class 0 */
132 IfxVadc_BoundarySelection_group1 = 1, /**< \brief Use group class 1 */
133 IfxVadc_BoundarySelection_global0 = 2, /**< \brief Use global class 0 */
134 IfxVadc_BoundarySelection_global1 = 3 /**< \brief Use global class 1 */
135 } IfxVadc_BoundarySelection;
136
137 /** \brief VADC Channels
138 */
139 typedef enum
140 {
141 IfxVadc_ChannelId_none = -1, /**< \brief None of VADC channels */
142 IfxVadc_ChannelId_0 = 0, /**< \brief Channel 0 */
143 IfxVadc_ChannelId_1 = 1, /**< \brief Channel 1 */
144 IfxVadc_ChannelId_2 = 2, /**< \brief Channel 2 */
145 IfxVadc_ChannelId_3 = 3, /**< \brief Channel 3 */
146 IfxVadc_ChannelId_4 = 4, /**< \brief Channel 4 */
147 IfxVadc_ChannelId_5 = 5, /**< \brief Channel 5 */
148 IfxVadc_ChannelId_6 = 6, /**< \brief Channel 6 */
149 IfxVadc_ChannelId_7 = 7, /**< \brief Channel 7 */
150 IfxVadc_ChannelId_8 = 8, /**< \brief Channel 8 */
151 IfxVadc_ChannelId_9 = 9, /**< \brief Channel 9 */
152 IfxVadc_ChannelId_10 = 10, /**< \brief Channel 10 */
153 IfxVadc_ChannelId_11 = 11, /**< \brief Channel 11 */
154 IfxVadc_ChannelId_12 = 12, /**< \brief Channel 12 */
155 IfxVadc_ChannelId_13 = 13, /**< \brief Channel 13 */
156 IfxVadc_ChannelId_14 = 14, /**< \brief Channel 14 */
157 IfxVadc_ChannelId_15 = 15 /**< \brief Channel 15 */
158 } IfxVadc_ChannelId;
159
160 /** \brief ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
161 */
162 typedef enum
163 {
164 IfxVadc_ChannelReference_standard = 0, /**< \brief use Varef as reference */
165 IfxVadc_ChannelReference_channel0 = 1 /**< \brief use CH0 as reference */
166 } IfxVadc_ChannelReference;
167
168 /** \brief ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
169 */
170 typedef enum
171 {
172 IfxVadc_ChannelResolution_12bit = 0, /**< \brief 12-bit conversion */
173 IfxVadc_ChannelResolution_10bit = 1, /**< \brief 10-bit conversion */
174 IfxVadc_ChannelResolution_8bit = 2, /**< \brief 8-bit conversion */
175 IfxVadc_ChannelResolution_10bitFast = 5 /**< \brief 10-bit cfast compare mode */
176 } IfxVadc_ChannelResolution;
177
178 /** \brief Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
179 */
180 typedef enum
181 {
182 IfxVadc_ChannelResult_0 = 0, /**< \brief Use Channel result 0 */
183 IfxVadc_ChannelResult_1, /**< \brief Use Channel result 1 */
184 IfxVadc_ChannelResult_2, /**< \brief Use Channel result 2 */
185 IfxVadc_ChannelResult_3, /**< \brief Use Channel result 3 */
186 IfxVadc_ChannelResult_4, /**< \brief Use Channel result 4 */
187 IfxVadc_ChannelResult_5, /**< \brief Use Channel result 5 */
188 IfxVadc_ChannelResult_6, /**< \brief Use Channel result 6 */
189 IfxVadc_ChannelResult_7, /**< \brief Use Channel result 7 */
190 IfxVadc_ChannelResult_8, /**< \brief Use Channel result 8 */
191 IfxVadc_ChannelResult_9, /**< \brief Use Channel result 9 */
192 IfxVadc_ChannelResult_10, /**< \brief Use Channel result 10 */
193 IfxVadc_ChannelResult_11, /**< \brief Use Channel result 11 */
194 IfxVadc_ChannelResult_12, /**< \brief Use Channel result 12 */
195 IfxVadc_ChannelResult_13, /**< \brief Use Channel result 13 */
196 IfxVadc_ChannelResult_14, /**< \brief Use Channel result 14 */
197 IfxVadc_ChannelResult_15 /**< \brief Use Channel result 15 */
198 } IfxVadc_ChannelResult;
199
200 /** \brief External Multiplexer Channel Selection Style as defined in
201 * Ifx_VADC.G[x].EMUXCTR.B.EMXCSS
202 */
203 typedef enum
204 {
205 IfxVadc_ChannelSelectionStyle_channelNumber = 0, /**< \brief selects an arbitrary channel */
206 IfxVadc_ChannelSelectionStyle_binary = 1 /**< \brief Each bit of bitfield EMUXCH selects the
207 * associated channel for EMUX control */
208 } IfxVadc_ChannelSelectionStyle;
209
210 /** \brief type of conversion
211 */
212 typedef enum
213 {
214 IfxVadc_ConversionType_Compatible = 0 /**< \brief Compatible Timing Mode */
215 } IfxVadc_ConversionType;
216
217 /** \brief Specifies the External Coding scheme(binary/gray)
218 * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD
219 */
220 typedef enum
221 {
222 IfxVadc_EmuxCodingScheme_binary = 0, /**< \brief Output the Channel Number in Binary code */
223 IfxVadc_EmuxCodingScheme_gray = 1 /**< \brief Output the channel number in gray code */
224 } IfxVadc_EmuxCodingScheme;
225
226 /** \brief Specifies the Emux interface
227 */
228 typedef enum
229 {
230 IfxVadc_EmuxInterface_0 = 0, /**< \brief Emux Interface 0 */
231 IfxVadc_EmuxInterface_1 = 1 /**< \brief Emux Interface 1 */
232 } IfxVadc_EmuxInterface;
233
234 /** \brief External Multiplexer sample time control
235 * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST
236 */
237 typedef enum
238 {
239 IfxVadc_EmuxSampleTimeControl_settingChanges = 0, /**< \brief Use STCE Whenever Setting Changes */
240 IfxVadc_EmuxSampleTimeControl_always = 1 /**< \brief Use STCE for each conversion of an external channel */
241 } IfxVadc_EmuxSampleTimeControl;
242
243 /** \brief specifies the External Channel Start select value
244 * defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET
245 */
246 typedef enum
247 {
248 IfxVadc_EmuxSelectValue_0 = 0, /**< \brief Start Selection Value 0 */
249 IfxVadc_EmuxSelectValue_1, /**< \brief Start Selection Value 1 */
250 IfxVadc_EmuxSelectValue_2, /**< \brief Start Selection Value 2 */
251 IfxVadc_EmuxSelectValue_3, /**< \brief Start Selection Value 3 */
252 IfxVadc_EmuxSelectValue_4, /**< \brief Start Selection Value 4 */
253 IfxVadc_EmuxSelectValue_5, /**< \brief Start Selection Value 5 */
254 IfxVadc_EmuxSelectValue_6, /**< \brief Start Selection Value 6 */
255 IfxVadc_EmuxSelectValue_7 /**< \brief Start Selection Value 7 */
256 } IfxVadc_EmuxSelectValue;
257
258 /** \brief Specifies External Multiplexer Mode
259 * define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE
260 */
261 typedef enum
262 {
263 IfxVadc_ExternalMultiplexerMode_softwareControl = 0, /**< \brief Disable The Emux Control */
264 IfxVadc_ExternalMultiplexerMode_steady = 1, /**< \brief select steady mode */
265 IfxVadc_ExternalMultiplexerMode_singleStep = 2, /**< \brief Select single step mode */
266 IfxVadc_ExternalMultiplexerMode_sequence = 3 /**< \brief Select Sequence Mode */
267 } IfxVadc_ExternalMultiplexerMode;
268
269 /** \brief FIFO mode enable
270 */
271 typedef enum
272 {
273 IfxVadc_FifoMode_seperateResultRegister = 0, /**< \brief seperate Result Register */
274 IfxVadc_FifoMode_fifoStructure = 1, /**< \brief fifoStructure */
275 IfxVadc_FifoMode_maximumMode = 2, /**< \brief copy new result if bigger */
276 IfxVadc_FifoMode_minimumMode = 3 /**< \brief copy new result if it is smaller */
277 } IfxVadc_FifoMode;
278
279 /** \brief gating mode defined in MODULE_VADC.BRSMR.ENGT
280 */
281 typedef enum
282 {
283 IfxVadc_GatingMode_disabled = 0, /**< \brief Gating is disabled, no conversion request are issued */
284 IfxVadc_GatingMode_always = 1, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set */
285 IfxVadc_GatingMode_gatingHigh = 2, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is high */
286 IfxVadc_GatingMode_gatingLow = 3 /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is low */
287 } IfxVadc_GatingMode;
288
289 /** \brief External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
290 */
291 typedef enum
292 {
293 IfxVadc_GatingSource_0 = 0, /**< \brief Input signal REQGTx_0 */
294 IfxVadc_GatingSource_1, /**< \brief Input signal REQGTx_1 */
295 IfxVadc_GatingSource_2, /**< \brief Input signal REQGTx_2 */
296 IfxVadc_GatingSource_3, /**< \brief Input signal REQGTx_3 */
297 IfxVadc_GatingSource_4, /**< \brief Input signal REQGTx_4 */
298 IfxVadc_GatingSource_5, /**< \brief Input signal REQGTx_5 */
299 IfxVadc_GatingSource_6, /**< \brief Input signal REQGTx_6 */
300 IfxVadc_GatingSource_7, /**< \brief Input signal REQGTx_7 */
301 IfxVadc_GatingSource_8, /**< \brief Input signal REQGTx_8 */
302 IfxVadc_GatingSource_9, /**< \brief Input signal REQGTx_9 */
303 IfxVadc_GatingSource_10, /**< \brief Input signal REQGTx_10 */
304 IfxVadc_GatingSource_11, /**< \brief Input signal REQGTx_11 */
305 IfxVadc_GatingSource_12, /**< \brief Input signal REQGTx_12 */
306 IfxVadc_GatingSource_13, /**< \brief Input signal REQGTx_13 */
307 IfxVadc_GatingSource_14, /**< \brief Input signal REQGTx_14 */
308 IfxVadc_GatingSource_15 /**< \brief Input signal REQGTx_15 */
309 } IfxVadc_GatingSource;
310
311 /** \brief inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16)
312 */
313 typedef enum
314 {
315 IfxVadc_InputClasses_group0 = 0, /**< \brief Use group class 0 */
316 IfxVadc_InputClasses_group1 = 1, /**< \brief Use group class 1 */
317 IfxVadc_InputClasses_global0 = 2, /**< \brief Use global class 0 */
318 IfxVadc_InputClasses_global1 = 3 /**< \brief Use global class 1 */
319 } IfxVadc_InputClasses;
320
321 /** \brief ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
322 */
323 typedef enum
324 {
325 IfxVadc_LimitCheck_noCheck = 0, /**< \brief Normal compare mode Event Never Fast Compare mode Event Never */
326 IfxVadc_LimitCheck_eventIfInArea = 1, /**< \brief Normal compare mode Event If result is inside the boundary band Fast Compare mode Event If result switches to high (above comp. value) */
327 IfxVadc_LimitCheck_eventIfOutsideArea = 2, /**< \brief Normal compare mode Event If result is outside the boundary band Fast Compare mode Event If result switches to low (below comp. value) */
328 IfxVadc_LimitCheck_always = 3 /**< \brief Normal compare mode Event Always Fast Compare mode Event Always */
329 } IfxVadc_LimitCheck;
330
331 /** \brief Low Power Supply Voltage Select
332 */
333 typedef enum
334 {
335 IfxVadc_LowSupplyVoltageSelect_5V = 0, /**< \brief 5V Power Supply is Connected */
336 IfxVadc_LowSupplyVoltageSelect_3V = 1 /**< \brief 3.3V Power Supply is Connected */
337 } IfxVadc_LowSupplyVoltageSelect;
338
339 /** \brief Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U
340 */
341 typedef enum
342 {
343 IfxVadc_Protection_channelControl0 = 0, /**< \brief Access control for GxCHCTR0 */
344 IfxVadc_Protection_channelControl1 = 1, /**< \brief Access control for GxCHCTR1 */
345 IfxVadc_Protection_channelControl2 = 2, /**< \brief Access control for GxCHCTR2 */
346 IfxVadc_Protection_channelControl3 = 3, /**< \brief Access control for GxCHCTR3 */
347 IfxVadc_Protection_channelControl4 = 4, /**< \brief Access control for GxCHCTR4 */
348 IfxVadc_Protection_channelControl5 = 5, /**< \brief Access control for GxCHCTR5 */
349 IfxVadc_Protection_channelControl6 = 6, /**< \brief Access control for GxCHCTR6 */
350 IfxVadc_Protection_channelControl7 = 7, /**< \brief Access control for GxCHCTR7 */
351 IfxVadc_Protection_channelControl8 = 8, /**< \brief Access control for GxCHCTR8 */
352 IfxVadc_Protection_channelControl9 = 9, /**< \brief Access control for GxCHCTR9 */
353 IfxVadc_Protection_channelControl10 = 10, /**< \brief Access control for GxCHCTR10 */
354 IfxVadc_Protection_channelControl11 = 11, /**< \brief Access control for GxCHCTR11 */
355 IfxVadc_Protection_channelControl12 = 12, /**< \brief Access control for GxCHCTR12 */
356 IfxVadc_Protection_channelControl13 = 13, /**< \brief Access control for GxCHCTR13 */
357 IfxVadc_Protection_channelControl14 = 14, /**< \brief Access control for GxCHCTR14 */
358 IfxVadc_Protection_externalMultiplexer = 15, /**< \brief Access control for EMUXSEL, GxEMUXCTR */
359 IfxVadc_Protection_initGroup0 = 16, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
360 IfxVadc_Protection_initGroup1 = 17, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
361 IfxVadc_Protection_initGroup2 = 18, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
362 IfxVadc_Protection_initGroup3 = 19, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
363 IfxVadc_Protection_initGroup4 = 20, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
364 IfxVadc_Protection_initGroup5 = 21, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
365 IfxVadc_Protection_initGroup6 = 22, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
366 IfxVadc_Protection_initGroup7 = 23, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
367 IfxVadc_Protection_initGroup8 = 24, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
368 IfxVadc_Protection_initGroup9 = 25, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
369 IfxVadc_Protection_initGroup10 = 26, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
370 IfxVadc_Protection_initGroup11 = 27, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
371 IfxVadc_Protection_initGroup12 = 28, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
372 IfxVadc_Protection_initGroup13 = 29, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
373 IfxVadc_Protection_initGroup14 = 30, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
374 IfxVadc_Protection_globalConfig = 31, /**< \brief Access control for GLOBCFG */
375 IfxVadc_Protection_serviceGroup0 = 32, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
376 IfxVadc_Protection_serviceGroup1 = 33, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
377 IfxVadc_Protection_serviceGroup2 = 34, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
378 IfxVadc_Protection_serviceGroup3 = 35, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
379 IfxVadc_Protection_serviceGroup4 = 36, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
380 IfxVadc_Protection_serviceGroup5 = 37, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
381 IfxVadc_Protection_serviceGroup6 = 38, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
382 IfxVadc_Protection_serviceGroup7 = 39, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
383 IfxVadc_Protection_serviceGroup8 = 40, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
384 IfxVadc_Protection_serviceGroup9 = 41, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
385 IfxVadc_Protection_serviceGroup10 = 42, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
386 IfxVadc_Protection_serviceGroup11 = 43, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
387 IfxVadc_Protection_serviceGroup12 = 44, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
388 IfxVadc_Protection_serviceGroup13 = 45, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
389 IfxVadc_Protection_serviceGroup14 = 46, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
390 IfxVadc_Protection_testFunction = 47, /**< \brief Access control for GLOBTF */
391 IfxVadc_Protection_resultRegisterGroup0 = 48, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
392 IfxVadc_Protection_resultRegisterGroup1 = 49, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
393 IfxVadc_Protection_resultRegisterGroup2 = 50, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
394 IfxVadc_Protection_resultRegisterGroup3 = 51, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
395 IfxVadc_Protection_resultRegisterGroup4 = 52, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
396 IfxVadc_Protection_resultRegisterGroup5 = 53, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
397 IfxVadc_Protection_resultRegisterGroup6 = 54, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
398 IfxVadc_Protection_resultRegisterGroup7 = 55, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
399 IfxVadc_Protection_resultRegisterGroup8 = 56, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
400 IfxVadc_Protection_resultRegisterGroup9 = 57, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
401 IfxVadc_Protection_resultRegisterGroup10 = 58, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
402 IfxVadc_Protection_resultRegisterGroup11 = 59, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
403 IfxVadc_Protection_resultRegisterGroup12 = 60, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
404 IfxVadc_Protection_resultRegisterGroup13 = 61, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
405 IfxVadc_Protection_resultRegisterGroup14 = 62 /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
406 } IfxVadc_Protection;
407
408 /** \brief Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
409 */
410 typedef enum
411 {
412 IfxVadc_RequestSlotPriority_lowest = 0, /**< \brief Lowest priority */
413 IfxVadc_RequestSlotPriority_low = 1, /**< \brief Lowpriority */
414 IfxVadc_RequestSlotPriority_high = 2, /**< \brief High priority */
415 IfxVadc_RequestSlotPriority_highest = 3 /**< \brief Highest priority */
416 } IfxVadc_RequestSlotPriority;
417
418 /** \brief Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
419 */
420 typedef enum
421 {
422 IfxVadc_RequestSlotStartMode_waitForStart = 0, /**< \brief Wait for start */
423 IfxVadc_RequestSlotStartMode_cancelInjectRepeat = 1 /**< \brief Cancel-Inject-Repeat */
424 } IfxVadc_RequestSlotStartMode;
425
426 /** \brief Request sources
427 */
428 typedef enum
429 {
430 IfxVadc_RequestSource_queue = 0, /**< \brief 8 stage Queue request */
431 IfxVadc_RequestSource_scan = 1, /**< \brief scan request */
432 IfxVadc_RequestSource_background = 2 /**< \brief background scan request */
433 } IfxVadc_RequestSource;
434
435 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
436 * Definition in Ifx_VADC.CLC.B.EDIS
437 */
438 typedef enum
439 {
440 IfxVadc_SleepMode_enable = 0, /**< \brief enables sleep mode */
441 IfxVadc_SleepMode_disable = 1 /**< \brief disables sleep mode */
442 } IfxVadc_SleepMode;
443
444 /** \brief Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
445 */
446 typedef enum
447 {
448 IfxVadc_SrcNr_group0 = 0, /**< \brief service request line 0 of group */
449 IfxVadc_SrcNr_group1 = 1, /**< \brief service request line 1 of group */
450 IfxVadc_SrcNr_group2 = 2, /**< \brief service request line 2 of group */
451 IfxVadc_SrcNr_group3 = 3, /**< \brief service request line 3 of group */
452 IfxVadc_SrcNr_shared0 = 4, /**< \brief Select shared service request line 0 */
453 IfxVadc_SrcNr_shared1 = 5, /**< \brief Select shared service request line 1 */
454 IfxVadc_SrcNr_shared2 = 6, /**< \brief Select shared service request line 2 */
455 IfxVadc_SrcNr_shared3 = 7 /**< \brief Select shared service request line 3 */
456 } IfxVadc_SrcNr;
457
458 /** \brief API return values defined in
459 * MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U
460 * MODULE_VADC.BRSPND[x](x=0,1,...,11)
461 */
462 typedef enum
463 {
464 IfxVadc_Status_noError = 0, /**< \brief No error during api execution */
465 IfxVadc_Status_notInitialised = 1, /**< \brief Appropriate initialisation not done */
466 IfxVadc_Status_invalidGroup = 2, /**< \brief Invalid group number */
467 IfxVadc_Status_invalidChannel = 3, /**< \brief Invalid channel number */
468 IfxVadc_Status_queueFull = 4, /**< \brief Queue is full */
469 IfxVadc_Status_noAccess = 5, /**< \brief Access to the group/channel is disabled */
470 IfxVadc_Status_channelsStillPending = 6 /**< \brief Conversion for some of the channels are still pending */
471 } IfxVadc_Status;
472
473 /** \brief trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
474 */
475 typedef enum
476 {
477 IfxVadc_TriggerMode_noExternalTrigger = 0, /**< \brief No external trigger */
478 IfxVadc_TriggerMode_uponFallingEdge = 1, /**< \brief Trigger event upon a falling edge */
479 IfxVadc_TriggerMode_uponRisingEdge = 2, /**< \brief Trigger event upon a rising edge */
480 IfxVadc_TriggerMode_uponAnyEdge = 3 /**< \brief Trigger event upon any edge */
481 } IfxVadc_TriggerMode;
482
483 /** \brief Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
484 */
485 typedef enum
486 {
487 IfxVadc_TriggerSource_0 = 0, /**< \brief Input signal REQTRx_0 */
488 IfxVadc_TriggerSource_1, /**< \brief Input signal REQTRx_1 */
489 IfxVadc_TriggerSource_2, /**< \brief Input signal REQTRx_2 */
490 IfxVadc_TriggerSource_3, /**< \brief Input signal REQTRx_3 */
491 IfxVadc_TriggerSource_4, /**< \brief Input signal REQTRx_4 */
492 IfxVadc_TriggerSource_5, /**< \brief Input signal REQTRx_5 */
493 IfxVadc_TriggerSource_6, /**< \brief Input signal REQTRx_6 */
494 IfxVadc_TriggerSource_7, /**< \brief Input signal REQTRx_7 */
495 IfxVadc_TriggerSource_8, /**< \brief Input signal REQTRx_8 */
496 IfxVadc_TriggerSource_9, /**< \brief Input signal REQTRx_9 */
497 IfxVadc_TriggerSource_10, /**< \brief Input signal REQTRx_10 */
498 IfxVadc_TriggerSource_11, /**< \brief Input signal REQTRx_11 */
499 IfxVadc_TriggerSource_12, /**< \brief Input signal REQTRx_12 */
500 IfxVadc_TriggerSource_13, /**< \brief Input signal REQTRx_13 */
501 IfxVadc_TriggerSource_14, /**< \brief Input signal REQTRx_14 */
502 IfxVadc_TriggerSource_15 /**< \brief Input signal REQTRx_15 */
503 } IfxVadc_TriggerSource;
504
505 /** \} */
506
507 /** \addtogroup IfxLld_Vadc_Std_Background_Autoscan
508 * \{ */
509
510 /******************************************************************************/
511 /*-------------------------Inline Function Prototypes-------------------------*/
512 /******************************************************************************/
513
514 /** \brief access function to enable/disable wait for read mode for result registers
515 * \param group pointer to the VADC group
516 * \param resultIdx result register index
517 * \param waitForRead wait for read mode enabled/disabled
518 * \return None
519 */
520 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead);
521
522 /** \brief access function to enable/disable wait for read mode for global result register
523 * \param vadc pointer to the VADC
524 * \param waitForRead wait for read mode enabled/disabled
525 * \return None
526 */
527 IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead);
528
529 /** \brief Enables the background sacn external trigger.
530 * \param vadc pointer to the base of VADC registers.
531 * \return None
532 */
533 IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc);
534
535 /** \brief Gets the background scan gating mode.
536 * \param vadc pointer to the base of VADC registers.
537 * \return background scan gating mode.
538 */
539 IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc);
540
541 /** \brief Gets the gating input selection.
542 * \param vadc pointer to the base of VADC registers.
543 * \return background scan gating input selection.
544 */
545 IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc);
546
547 /** \brief Gets the requested background scan slot priority.
548 * \param vadcG pointer to VADC group registers.
549 * \return requested background scan slot priority.
550 */
551 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG);
552
553 /** \brief Gets the requested background scan slot start mode.
554 * \param vadcG pointer to VADC group registers.
555 * \return requested background scan slot start mode.
556 */
557 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG);
558
559 /** \brief Gets the background scan trigger input.
560 * \param vadc pointer to the base of VADC registers.
561 * \return Gets the background scan external trigger source.
562 */
563 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc);
564
565 /** \brief Gets the background scan external trigger mode.
566 * \param vadc pointer to the base of VADC registers.
567 * \return background scan external trigger mode.
568 */
569 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc);
570
571 /** \brief get global input class resolution
572 * \param vadc Pointer to the VADC Group
573 * \param inputClassNum global input class number
574 * \return ADC input class channel resolution.
575 */
576 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum);
577
578 /** \brief return conversion result stored in the Global result Register
579 * \param vadc pointer to the VADC module
580 * \return global result register
581 *
582 * \code
583 * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
584 * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
585 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
586 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
587 *
588 * //confiure wait for read mode for global result register
589 * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
590 *
591 * // configure background scan
592 * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
593 *
594 * // enable auto scan
595 * IfxVadc_SetAutoBackgroundScan(vadc, TRUE);
596 *
597 * // start the background scan
598 * IfxVadc_startBackgroundScan(vadc);
599 *
600 * Ifx_VADC_GLOBRES result;
601 * result = IfxVadc_getGlobalResult (vadc);
602 *
603 * \endcode
604 *
605 */
606 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc);
607
608 /** \brief get global input class sample time in sec
609 * \param vadc Pointer to the VADC Group Register space
610 * \param inputClassNum ADC input class number
611 * \param analogFrequency ADC module analog frequency in Hz.
612 * \return ADC input class channel sample time in sec.
613 */
614 IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency);
615
616 /** \brief Get conversion result for the group
617 * \param group pointer to the VADC group
618 * \param results pointer to scaled conversion results
619 * \param resultOffset offset for the first result
620 * \param numResults number of results
621 * \return None
622 *
623 * \code
624 * Ifx_VADC* vadc = &MODULE_VADC
625 * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
626 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
627 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
628 *
629 * //confiure wait for read mode for global result register
630 * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
631 * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
632 *
633 * // configure scan
634 * IfxVadc_setScan(group, channels, mask);
635 *
636 * // enable auto scan
637 * IfxVadc_setAutoScan(group, TRUE);
638 *
639 * // start the scan
640 * IfxVadc_startScan(group);
641 *
642 * // wait for conversion to finish
643 *
644 * // fetch the 2 results of conversion for group 0
645 * Ifx_VADC_RES results[10];
646 * result = IfxVadc_getGroupResult(group, results, 0, 2);
647 * \endcode
648 *
649 */
650 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults);
651
652 /** \brief Get conversion result (Function does not care about the alignment)
653 * value = raw * gain + offset.
654 * \param group pointer to the VADC group
655 * \param resultIdx result register index
656 * \return scaled Conversion result
657 *
658 * \code
659 * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
660 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
661 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
662 *
663 * //confiure wait for read mode for global result register
664 * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
665 * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
666 *
667 * // configure scan
668 * IfxVadc_setScan(group, channels, mask);
669 *
670 * // enable auto scan
671 * IfxVadc_setAutoScan(group, TRUE);
672 *
673 * // start the scan
674 * IfxVadc_startScan(group);
675 *
676 * // wait for conversion to finish
677 *
678 * // fetch the result of conversion from result register 0 for group 0
679 * Ifx_VADC_RES result;
680 * result = IfxVadc_getResult(group, IfxVadc_ChannelResult0);
681 * \endcode
682 *
683 */
684 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx);
685
686 /** \brief Returns the auto background scan status.
687 * \param vadc pointer to the base of VADC registers.
688 * \return TRUE if enabled otherwise FALSE.
689 */
690 IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc);
691
692 /** \brief Returns the background scan slot requested status.
693 * \param vadcG pointer to VADC group registers.
694 * \return background scan slot requested status.
695 */
696 IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG);
697
698 /** \brief Enables/Disables continuous background auto scan
699 * \param vadc pointer to the base of VADC registers.
700 * \param autoBackgroundScanEnable whether auto background scan enabled or not.
701 * \return None
702 */
703 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable);
704
705 /** \brief configures a background scan; can also stop autoscan if all channels are 0
706 * \param vadc pointer to the VADC module registers
707 * \param groupId group index
708 * \param channels specifies the channels which should be enabled/disabled
709 * \param mask specifies the channels which should be modified
710 * \return None
711 *
712 * Background scan can be enabled/disabled for the given channels which are selected with the mask
713 *
714 * \code
715 * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
716 * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
717 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
718 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
719 *
720 * //confiure wait for read mode for global result register
721 * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
722 *
723 * // configure background scan
724 * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
725 *
726 * // enable auto scan
727 * IfxVadc_setAutoBackgroundScan(vadc, TRUE);
728 *
729 * // start the background scan
730 * IfxVadc_startBackgroundScan(vadc);
731 * \endcode
732 *
733 */
734 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask);
735
736 /** \brief Sets the background scan slot gating configurations.
737 * \param vadc pointer to the base of VADC registers.
738 * \param gatingSource gate input for group.
739 * \param gatingMode gating mode. High level, Low Level or Gating disabled.
740 * \return None
741 */
742 IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
743
744 /** \brief Sets the background scan exteranal trigger operating configurations.
745 * \param vadc pointer to the base of VADC registers.
746 * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
747 * \param triggerSource trigger input for group.
748 * \return None
749 */
750 IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
751
752 /** \brief Starts a background scan
753 * \param vadc pointer to the VADC module
754 * \return None
755 *
756 * \see IfxVadc_setBackgroundScan
757 *
758 */
759 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc);
760
761 /** \brief Get debug conversion result
762 * \param group pointer to the VADC group
763 * \param resultIdx result register index
764 * \return Debug conversion result.
765 */
766 IFX_INLINE Ifx_VADC_RESD IfxVadc_getDebugResult(Ifx_VADC_G *group, uint32 resultIdx);
767
768 /******************************************************************************/
769 /*-------------------------Global Function Prototypes-------------------------*/
770 /******************************************************************************/
771
772 /** \brief Gives the background scan status for a group
773 * \param vadc pointer to the VADC module
774 * \return IfxVadc_Status
775 */
776 IFX_EXTERN IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc);
777
778 /** \brief Get conversion result (Function does not care about the alignment)
779 * value = raw * gain + offset.
780 * \param vadc VADC module pointer
781 * \param group pointer to the VADC group
782 * \param channel channel Id
783 * \param sourceType type of request source
784 * \return scaled Conversion result
785 *
786 * \code
787 * Ifx_VADC vadc;
788 * vadc.vadc = &MODULE_VADC;
789 * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
790 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
791 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
792 *
793 * //confiure wait for read mode for global result register
794 * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
795 * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
796 *
797 * // configure scan
798 * IfxVadc_setScan(group, channels, mask);
799 *
800 * // start the scan
801 * IfxVadc_startScan(group);
802 *
803 * // wait for conversion to finish
804 *
805 * // fetch the result of conversion for channel 2 of group 0
806 * Ifx_VADC_RESresult2;
807 * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId2, IfxVadc_RequestSource_scan);
808 * Ifx_VADC_RESresult5;
809 * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId5, IfxVadc_RequestSource_scan);
810 * \endcode
811 *
812 */
813 IFX_EXTERN Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType);
814
815 /** \} */
816
817 /** \addtogroup IfxLld_Vadc_Std_ChannelScan
818 * \{ */
819
820 /******************************************************************************/
821 /*-------------------------Inline Function Prototypes-------------------------*/
822 /******************************************************************************/
823
824 /** \brief Disables the scan slot external trigger.
825 * \param vadcG pointer to VADC group registers.
826 * \return None
827 */
828 IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
829
830 /** \brief Enables the scan slot external trigger.
831 * \param vadcG pointer to VADC group registers.
832 * \return None
833 */
834 IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
835
836 /** \brief Gets the request scan slot gating mode.
837 * \param vadcG pointer to VADC group registers.
838 * \return requested scan slot gating mode.
839 */
840 IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG);
841
842 /** \brief Gets the request scan slot gating input.
843 * \param vadcG pointer to VADC group registers.
844 * \return request scan slot gating input.
845 */
846 IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG);
847
848 /** \brief Gets the request scan slot priority.
849 * \param vadcG pointer to VADC group registers.
850 * \return request scan slot priority.
851 */
852 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG);
853
854 /** \brief Gets the request scan slot start mode.
855 * \param vadcG pointer to VADC group registers.
856 * \return request scan slot start mode.
857 */
858 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG);
859
860 /** \brief Gets the requested scan slot trigger input.
861 * \param vadcG pointer to VADC group registers.
862 * \return requested scan slot trigger input.
863 */
864 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG);
865
866 /** \brief Gets the requested scan slot trigger mode.
867 * \param vadcG pointer to VADC group registers.
868 * \return requested scan slot trigger mode.
869 */
870 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG);
871
872 /** \brief Gets the auto scan enable status.
873 * \param vadcG pointer to VADC group registers.
874 * \return TRUE if auto scan enabled otherwise FALSE.
875 */
876 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG);
877
878 /** \brief Returns the scan slot requested status.
879 * \param vadcG pointer to VADC group registers.
880 * \return TRUE if scan slot request enabled otherwise FALSE.
881 */
882 IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG);
883
884 /** \brief Enables/Disables continuous auto scan
885 * \param vadcG pointer to VADC group registers.
886 * \param autoscanEnable whether autoscan is enabled or not.
887 * \return None
888 */
889 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable);
890
891 /** \brief Sets the scan slot gating configuration.
892 * \param vadcG pointer to VADC group registers.
893 * \param gatingSource gate input for group.
894 * \param gatingMode gating mode. High level, Low Level or Gating disabled.
895 * \return None
896 */
897 IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
898
899 /** \brief Sets the scan slot trigger operating configurations.
900 * \param vadcG pointer to VADC group registers.
901 * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
902 * \param triggerSource trigger input for group.
903 * \return None
904 */
905 IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
906
907 /** \brief Starts an autoscan on the specified group
908 * \param group pointer to the VADC group
909 * \return None
910 *
911 * See \ref IfxVadc_setScan
912 *
913 */
914 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group);
915
916 /******************************************************************************/
917 /*-------------------------Global Function Prototypes-------------------------*/
918 /******************************************************************************/
919
920 /** \brief Gives the scan status for a group
921 * \param group pointer to the VADC group
922 * \return IfxVadc_Status
923 */
924 IFX_EXTERN IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group);
925
926 /** \brief Configures an (auto-)scan
927 * \param group pointer to the VADC group
928 * \param channels specifies the channels which should be enabled/disabled
929 * \param mask specifies the channels which should be modified
930 * \return None
931 *
932 * (Auto-)Scan can be enabled/disabled for the given channels which are selected with the mask
933 *
934 * \code
935 * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
936 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
937 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
938 *
939 * // configure scan
940 * IfxVadc_setScan(group, channels, mask);
941 *
942 * // enable Auto-Scan
943 * IfxVadc_setAutoScan(group, TRUE);
944 *
945 * // start the scan
946 * IfxVadc_startScan(group);
947 * \endcode
948 *
949 */
950 IFX_EXTERN void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask);
951
952 /** \} */
953
954 /** \addtogroup IfxLld_Vadc_Std_QueueRequest
955 * \{ */
956
957 /******************************************************************************/
958 /*-------------------------Inline Function Prototypes-------------------------*/
959 /******************************************************************************/
960
961 /** \brief Add an entry to the queue of a group for the specified channel with the following options set:
962 * refill incase of aborted conversion
963 * source interrupt enable/disable
964 * external trigger control of the aborted conversion
965 * \param group pointer to the VADC group
966 * \param channel specifies channel Id
967 * \param options specifies the refill, source interrupt enable/disable and external trigger control selection
968 * \return None
969 *
970 * \code
971 *
972 * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
973 * IfxVadc_ChannelId channel = 1; // for channel 1
974 * // Add channel 1 to queue of group 0 with the refill turned on
975 * IfxVadc_addToQueue(qroup, channel, (1<<IFX_VADC_G_QBUR0_RF_OFF));
976 * \endcode
977 *
978 */
979 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options);
980
981 /** \brief Clears all the queue entries including backup stage.
982 * \param vadcG pointer to VADC group registers.
983 * \param flushQueue Whether queue is cleared or not.
984 * \return None
985 */
986 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue);
987
988 /** \brief Disables the external trigger.
989 * \param vadcG pointer to VADC group registers.
990 * \return None
991 */
992 IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG);
993
994 /** \brief Enables the external trigger.
995 * \param vadcG pointer to VADC group registers.
996 * \return None
997 */
998 IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG);
999
1000 /** \brief Gets the requested queue slot gating mode.
1001 * \param vadcG pointer to VADC group registers.
1002 * \return requested queue slot gating mode.
1003 */
1004 IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG);
1005
1006 /** \brief Gets the requested queue slot gating input.
1007 * \param vadcG pointer to VADC group registers.
1008 * \return requested queue slot gating input.
1009 */
1010 IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG);
1011
1012 /** \brief Gets the request queue slot priority.
1013 * \param vadcG pointer to VADC group registers.
1014 * \return requested queue slot priority.
1015 */
1016 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG);
1017
1018 /** \brief Gets the requested queue slot start mode.
1019 * \param vadcG pointer to VADC group registers.
1020 * \return requested queue slot start mode.
1021 */
1022 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG);
1023
1024 /** \brief Gets the requested queue slot trigger input.
1025 * \param vadcG pointer to VADC group registers.
1026 * \return requested queue slot trigger input.
1027 */
1028 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG);
1029
1030 /** \brief Gets the requested queue slot trigger mode.
1031 * \param vadcG pointer to VADC group registers.
1032 * \return requested queue slot trigger mode.
1033 */
1034 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG);
1035
1036 /** \brief Returns the queue slot requested status.
1037 * \param vadcG pointer to VADC group registers.
1038 * \return TRUE if queue slot request enabled otherwise FALSE.
1039 */
1040 IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG);
1041
1042 /** \brief Sets the gating configurations.
1043 * \param vadcG pointer to VADC group registers.
1044 * \param gatingSource gate input for group.
1045 * \param gatingMode gating mode. High level, Low Level or Gating disabled.
1046 * \return None
1047 */
1048 IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
1049
1050 /** \brief Sets the trigger operating configurations.
1051 * \param vadcG pointer to VADC group registers.
1052 * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
1053 * \param triggerSource trigger input for group.
1054 * \return None
1055 */
1056 IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
1057
1058 /** \brief Starts a queue of a group by generating a trigger event through software
1059 * \param group pointer to the VADC group
1060 * \return None
1061 */
1062 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group);
1063
1064 /******************************************************************************/
1065 /*-------------------------Global Function Prototypes-------------------------*/
1066 /******************************************************************************/
1067
1068 /** \brief Gives the status of the Queue of a group by returning non zero value if the Queue is full
1069 * \param group pointer to the VADC group
1070 * \return status of the Queue
1071 *
1072 * \code
1073 * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
1074 * boolean queueFull = (IfxVadc_getQueueStatus(group)==IfxVadc_Status_queueFull)?TRUE:FALSE; // get Queue status for group 0
1075 * \endcode
1076 *
1077 */
1078 IFX_EXTERN IfxVadc_Status IfxVadc_getQueueStatus(Ifx_VADC_G *group);
1079
1080 /** \} */
1081
1082 /** \addtogroup IfxLld_Vadc_Std_IO
1083 * \{ */
1084
1085 /******************************************************************************/
1086 /*-------------------------Inline Function Prototypes-------------------------*/
1087 /******************************************************************************/
1088
1089 /** \brief Initializes a EMUX output
1090 * \param emux the Emux Pin which should be configured
1091 * \param outputMode the pin output mode which should be configured
1092 * \param padDriver the pad driver mode which should be configured
1093 * \return None
1094 */
1095 IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1096
1097 /** \brief Initializes a GxBFL output
1098 * \param gxBfl the GxBFL Pin which should be configured
1099 * \param outputMode the pin output mode which should be configured
1100 * \param padDriver the pad driver mode which should be configured
1101 * \return None
1102 */
1103 IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1104
1105 /** \} */
1106
1107 /** \addtogroup IfxLld_Vadc_Std_Frequency
1108 * \{ */
1109
1110 /******************************************************************************/
1111 /*-------------------------Inline Function Prototypes-------------------------*/
1112 /******************************************************************************/
1113
1114 /** \brief Calculate the time using analog frequency.
1115 * \param analogFrequency analog frequency in Hz.
1116 * \param sampleTime sample time in sec.
1117 * \return sample time in sec.
1118 */
1119 IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime);
1120
1121 /******************************************************************************/
1122 /*-------------------------Global Function Prototypes-------------------------*/
1123 /******************************************************************************/
1124
1125 /** \brief Returns the configured Fadci VADC analog clock frequency in Hz.
1126 * \param vadc pointer to the base of VADC registers
1127 * \return Returns the configured Fadci VADC analog clock frequency in Hz.
1128 */
1129 IFX_EXTERN float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc);
1130
1131 /** \brief Returns the configured Fadcd VADC digital clock frequency in Hz.
1132 * \param vadc pointer to the base of VADC registers
1133 * \return Returns the configured Fadcd VADC digital clock frequency in Hz.
1134 */
1135 IFX_EXTERN float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc);
1136
1137 /** \} */
1138
1139 /** \addtogroup IfxLld_Vadc_Std_Group
1140 * \{ */
1141
1142 /******************************************************************************/
1143 /*-------------------------Inline Function Prototypes-------------------------*/
1144 /******************************************************************************/
1145
1146 /** \brief Clears the all group requests.
1147 * \param vadcG pointer to VADC group registers.
1148 * \return None
1149 */
1150 IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG);
1151
1152 /** \brief Gets the ADC group arbitration round length.
1153 * \param vadcG pointer to VADC group registers.
1154 * \return ADC group arbitration round length.
1155 */
1156 IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG);
1157
1158 /** \brief Gets the channel esult service request node pointer 0.
1159 * \param vadcG pointer to VADC group registers.
1160 * \return channel result service request node pointer 0.
1161 */
1162 IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG);
1163
1164 /** \brief Gets the channel esult service request node pointer 1.
1165 * \param vadcG pointer to VADC group registers.
1166 * \return channel result service request node pointer 1.
1167 */
1168 IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG);
1169
1170 /** \brief Gets the channel service request node pointer.
1171 * \param vadcG pointer to VADC group registers.
1172 * \return channel service request node pointer.
1173 */
1174 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG);
1175
1176 /** \brief Gets the configured master index.
1177 * \param vadcG pointer to VADC group registers.
1178 * \return configured master kernel index.
1179 */
1180 IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG);
1181
1182 /** \brief Resets the ADC group.
1183 * \param vadcG pointer to VADC group registers.
1184 * \return None
1185 */
1186 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG);
1187
1188 /** \brief Sets analog converter group number.
1189 * \param vadcG pointer to VADC group registers.
1190 * \param analogConverterMode group analog converter mode.
1191 * \return None
1192 */
1193 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode);
1194
1195 /** \brief Sets the arbiter round length.
1196 * \param vadcG pointer to VADC group registers.
1197 * \param arbiterRoundLength arbiter round length.
1198 * \return None
1199 */
1200 IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength);
1201
1202 /** \brief Sets the ADC input class channel resolution.
1203 * \param vadcG pointer to VADC group registers.
1204 * \param inputClassNum input class number.
1205 * \param resolution ADC input class channel resolution.
1206 * \return None
1207 */
1208 IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1209
1210 /** \brief Sets the ADC input class sample time.
1211 * \param vadcG pointer to VADC group registers.
1212 * \param inputClassNum input class number.
1213 * \param analogFrequency ADC analog frequency in Hz.
1214 * \param sampleTime request sample time in sec for input class.
1215 * \return None
1216 */
1217 IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1218
1219 /** \brief Sets the master index.
1220 * \param vadcG pointer to VADC group registers.
1221 * \param masterIndex master index.
1222 * \return None
1223 */
1224 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex);
1225
1226 /******************************************************************************/
1227 /*-------------------------Global Function Prototypes-------------------------*/
1228 /******************************************************************************/
1229
1230 /** \brief Sets the Arbiter slot configurations.
1231 * \param vadcG pointer to VADC group registers.
1232 * \param slotEnable enable/disable of slot.
1233 * \param prio channel request priority.
1234 * \param mode Channel Slot start mode.
1235 * \param slot channel slot Request source.
1236 * \return None
1237 */
1238 IFX_EXTERN void IfxVadc_setArbiterPriority(Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot);
1239
1240 /** \} */
1241
1242 /** \addtogroup IfxLld_Vadc_Std_Module
1243 * \{ */
1244
1245 /******************************************************************************/
1246 /*-------------------------Inline Function Prototypes-------------------------*/
1247 /******************************************************************************/
1248
1249 /** \brief Disable VADC Module
1250 * \param vadc Pointer to VADC Module
1251 * \return None
1252 */
1253 IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc);
1254
1255 /** \brief Enable VADC kernel.
1256 * \param vadc pointer to the base of VADC registers.
1257 * \return None
1258 */
1259 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc);
1260
1261 /** \brief gets ADC Calibration Flag CAL status.
1262 * \param vadc pointer to VADC group registers.
1263 * \param adcCalGroupNum ADC CAL group number.
1264 * \return CAL group status.
1265 */
1266 IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum);
1267
1268 /** \brief Gets the global control configuration value.
1269 * \param vadc pointer to the base of VADC registers.
1270 * \return global control configuration value.
1271 */
1272 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc);
1273
1274 /** \brief get SUCAL bit field status
1275 * \param vadc Pointer to VADC Module
1276 * \return Indicate the start-up calibration phase
1277 */
1278 IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc);
1279
1280 /** \brief initiates the calibration pulse phase.
1281 * \param vadc pointer to the base of VADC registers
1282 * \return None
1283 */
1284 IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc);
1285
1286 /** \brief Sets the channel conversion mode.
1287 * \param vadc pointer to VADC module registers.
1288 * \param inputClassNum global input class number.
1289 * \param resolution ADC channel resolution.
1290 * \return None
1291 */
1292 IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1293
1294 /** \brief Sets the sample time of ADC global class.
1295 * \param vadc pointer to VADC module registers.
1296 * \param inputClassNum global input class number.
1297 * \param analogFrequency ADC analog frequency in Hz.
1298 * \param sampleTime the requested sample time for input class in sec.
1299 * \return None
1300 */
1301 IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1302
1303 /** \brief Sets the sensitivity of the module to sleep signal
1304 * \param vadc pointer to VADC registers
1305 * \param mode mode selection (enable/disable)
1306 * \return None
1307 */
1308 IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode);
1309
1310 /******************************************************************************/
1311 /*-------------------------Global Function Prototypes-------------------------*/
1312 /******************************************************************************/
1313
1314 /** \brief Disable write access to the VADC config/control registers.
1315 * \param vadc pointer to the base of VADC registers.
1316 * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be disabled.
1317 * \return None
1318 */
1319 IFX_EXTERN void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1320
1321 /** \brief Disables the post calibration.
1322 * \param vadc pointer to the base of VADC registers.
1323 * \param group Index of the group.
1324 * \param disable disable or not.
1325 * \return None
1326 */
1327 IFX_EXTERN void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable);
1328
1329 /** \brief Enable write access to the VADC config/control registers.
1330 * \param vadc pointer to the base of VADC registers.
1331 * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be enabled.
1332 * \return None
1333 */
1334 IFX_EXTERN void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1335
1336 /** \brief Enables the CCU6 based ADC group synchronisation as workaround for Erratum ADC_TC.068
1337 * \param vadc pointer to the base of VADC registers.
1338 * \param ccu6Num selects CCU60 or CCU61
1339 * \return None
1340 */
1341 IFX_EXTERN void IfxVadc_enableGroupSync(Ifx_VADC *vadc, uint32 ccu6Num);
1342
1343 /** \brief Module Frequency in Hz
1344 * \return Module Frequency in Hz.
1345 */
1346 IFX_EXTERN float32 IfxVadc_getAdcModuleFrequency(void);
1347
1348 /** \brief Gives the SRC source address.
1349 * \param group Index of the group
1350 * \param index SRC number
1351 * \return SRC source address
1352 */
1353 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index);
1354
1355 /** \brief Initialises ADC arbiter clock.
1356 * \param vadc pointer to the base of VADC registers
1357 * \param arbiterClockDivider ADC arbiter clock divider.
1358 * \return None
1359 */
1360 IFX_EXTERN void IfxVadc_initialiseAdcArbiterClock(Ifx_VADC *vadc, uint32 arbiterClockDivider);
1361
1362 /** \brief Initialises the ADC Converter clock.
1363 * \param vadc pointer to the base of VADC registers
1364 * \param converterClockDivider ADC converter clock divider.
1365 * \return None
1366 */
1367 IFX_EXTERN void IfxVadc_initialiseAdcConverterClock(Ifx_VADC *vadc, uint32 converterClockDivider);
1368
1369 /** \brief Configure the FadcD vadc digital clock.
1370 * \param vadc pointer to the base of VADC registers.
1371 * \param fAdcD ADC digital clock frequency in Hz.
1372 * \return calculated ADC digital clock frequency in Hz.
1373 */
1374 IFX_EXTERN uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD);
1375
1376 /** \brief Configure the ADC analog clock.
1377 * \param vadc pointer to the base of VADC registers.
1378 * \param fAdcI ADC analog clock clock frequency in Hz. Range = [5000000, 10000000].
1379 * \return ADC analog clock frequency in Hz.
1380 */
1381 IFX_EXTERN uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI);
1382
1383 /** \brief Return the post calibration status
1384 * \param vadc Pointer to VADC module
1385 * \param group specifies Group ID
1386 * \return TRUE if the post calibration is enabled for the group else false
1387 */
1388 IFX_EXTERN boolean IfxVadc_isPostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group);
1389
1390 /** \brief Resets the kernel.
1391 * \param vadc pointer to the base of VADC registers.
1392 * \return None
1393 */
1394 IFX_EXTERN void IfxVadc_resetKernel(Ifx_VADC *vadc);
1395
1396 /** \brief Select Low Power Supply Voltage
1397 * \param vadc Pointer to Module space
1398 * \param supplyVoltage Select Supply Voltage
1399 * \return None
1400 */
1401 IFX_EXTERN void IfxVadc_selectPowerSupplyVoltage(Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage);
1402
1403 /** \brief Starts ADC calibration and wait for the end of the calibration process.
1404 * \param vadc pointer to the base of VADC registers.
1405 * \return None
1406 */
1407 IFX_EXTERN void IfxVadc_startupCalibration(Ifx_VADC *vadc);
1408
1409 /** \} */
1410
1411 /** \addtogroup IfxLld_Vadc_Std_Channel
1412 * \{ */
1413
1414 /******************************************************************************/
1415 /*-------------------------Inline Function Prototypes-------------------------*/
1416 /******************************************************************************/
1417
1418 /** \brief Clears the channel request.
1419 * \param vadcG pointer to VADC group registers.
1420 * \param channelId channel id whose request to be cleared.
1421 * \return None
1422 */
1423 IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId);
1424
1425 /** \brief Enables the FIFO mode.
1426 * \param vadcG pointer to VADC group registers.
1427 * \param resultRegister channel result register.
1428 * \param fifoMode FIFO mode .
1429 * \return None
1430 */
1431 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode);
1432
1433 /**
1434 * \param vadcG pointer to VADC group registers.
1435 * \param resultRegister channel result register.
1436 * \return None
1437 */
1438 IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister);
1439
1440 /** \brief Gets the group's assigned channels.
1441 * \param vadcG pointer to VADC group registers.
1442 * \return group's assigned channels.
1443 */
1444 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG);
1445
1446 /** \brief Gets the current ADC channel control configurations.
1447 * \param vadcG pointer to VADC group registers.
1448 * \param channelIndex ADC channel number.
1449 * \return current ADC channel control configuration.
1450 */
1451 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1452
1453 /** \brief Gets the channel input class
1454 * \param vadcG pointer to VADC Group register space
1455 * \param channelIndex specifies channel ID
1456 * \return Input class
1457 */
1458 IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1459
1460 /** \brief Gets the ADC input class channel resolution.
1461 * \param vadcG pointer to VADC group registers.
1462 * \param inputClassNum ADC input class number.
1463 * \return ADC input class channel resolution.
1464 */
1465 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum);
1466
1467 /** \brief Gets the ADC input class channel sample time.
1468 * \param vadcG pointer to VADC group registers.
1469 * \param inputClassNum ADC input class number.
1470 * \param analogFrequency ADC module analog frequency in Hz.
1471 * \return ADC input class channel sample time in sec.
1472 */
1473 IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency);
1474
1475 /** \brief Sets the channels with low priority as background channel.
1476 * \param vadcG pointer to VADC group registers.
1477 * \param channelIndex group channel id.
1478 * \return None
1479 */
1480 IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1481
1482 /** \brief Sets the target for result background source.
1483 * \param vadcG pointer to VADC group registers.
1484 * \param channelIndex group channel id.
1485 * \param globalResultUsage whether storage in global result register.
1486 * \return None
1487 */
1488 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage);
1489
1490 /** \brief Selects boundary extension.
1491 * \param vadcG pointer to VADC group registers.
1492 * \param channelIndex group channel id.
1493 * \param boundaryMode boundary extension mode.
1494 * \return None
1495 */
1496 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode);
1497
1498 /** \brief Sets the channel event service request line.
1499 * \param vadcG pointer to VADC group registers.
1500 * \param channelSrcNr channel event Service Node.
1501 * \param channel channel number.
1502 * \return None
1503 */
1504 IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel);
1505
1506 /** \brief Sets the channel input class.
1507 * \param vadcG pointer to VADC group registers.
1508 * \param channelIndex group channel id.
1509 * \param inputClass group input class.
1510 * \return None
1511 */
1512 IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass);
1513
1514 /** \brief Sets the channel event mode.
1515 * \param vadcG pointer to VADC group registers.
1516 * \param channelIndex group channel id.
1517 * \param limitCheck channel event mode.
1518 * \return None
1519 */
1520 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck);
1521
1522 /** \brief Sets channel as priority channel with in the group.
1523 * \param vadcG pointer to VADC group registers.
1524 * \param channelIndex group channel id.
1525 * \return None
1526 */
1527 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1528
1529 /** \brief Sets group's lower boundary.
1530 * \param vadcG pointer to VADC group registers.
1531 * \param channelIndex group channel id.
1532 * \param lowerBoundary group lower boundary.
1533 * \return None
1534 */
1535 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary);
1536
1537 /** \brief Selects the refernce input.
1538 * \param vadcG pointer to VADC group registers.
1539 * \param channelIndex group channel id.
1540 * \param reference reference input.
1541 * \return None
1542 */
1543 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference);
1544
1545 /** \brief Sets result event node pointer 0.
1546 * \param vadcG pointer to VADC group registers.
1547 * \param resultSrcNr channel result event service node.
1548 * \param resultRegister channel result register.
1549 * \return None
1550 */
1551 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1552
1553 /** \brief Sets result event node pointer 1.
1554 * \param vadcG pointer to VADC group registers.
1555 * \param resultSrcNr channel result event service node.
1556 * \param resultRegister channel result register.
1557 * \return None
1558 */
1559 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1560
1561 /** \brief Sets result store position.
1562 * \param vadcG pointer to VADC group registers.
1563 * \param channelIndex group channel id.
1564 * \param rightAlignedStorage result store position.
1565 * \return None
1566 */
1567 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage);
1568
1569 /** \brief Sets channel synchronization request.
1570 * \param vadcG pointer to VADC group registers.
1571 * \param channelIndex group channel id.
1572 * \param synchonize whether channel synchronize or stand alone operation.
1573 * \return None
1574 */
1575 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize);
1576
1577 /** \brief Sets group's upper boundary.
1578 * \param vadcG pointer to VADC group registers.
1579 * \param channelIndex group channel id.
1580 * \param upperBoundary group upper boundary.
1581 * \return None
1582 */
1583 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary);
1584
1585 /** \brief Sets the group result register.
1586 * \param vadcG pointer to VADC group registers.
1587 * \param channelIndex group channel id.
1588 * \param resultRegister result register for group result storage.
1589 * \return None
1590 */
1591 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister);
1592
1593 /******************************************************************************/
1594 /*-------------------------Global Function Prototypes-------------------------*/
1595 /******************************************************************************/
1596
1597 /** \brief get channel conversion timing
1598 * \param vadc Pointer to VADC module
1599 * \param group specifies the Group
1600 * \param inputClass Input class used
1601 * \param analogFrequency ADC module analog frequency fadci in Hz.
1602 * \param moduleFrequency ADC module frequency fvadc in Hz.
1603 * \param conversionMode specifies the conversion mode (Standard conversion mode)
1604 * \return Channel conversion Time in sec
1605 */
1606 IFX_EXTERN float32 IfxVadc_getChannelConversionTime(Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode);
1607
1608 /** \} */
1609
1610 /** \addtogroup IfxLld_Vadc_Std_Emux
1611 * \{ */
1612
1613 /******************************************************************************/
1614 /*-------------------------Inline Function Prototypes-------------------------*/
1615 /******************************************************************************/
1616
1617 /** \brief get global input class resolution
1618 * \param vadc Pointer to VADC Module space
1619 * \param inputClassNum global input class number
1620 * \return External channel resolution for global input class
1621 */
1622 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum);
1623
1624 /** \brief Get the sample time of ADC global class for external channel.
1625 * \param vadc pointer to VADC Module space
1626 * \param inputClassNum Adc input class number
1627 * \param analogFrequency ADC module analog frequency in Hz.
1628 * \return ADC input class external channel sample time in sec.
1629 */
1630 IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency);
1631
1632 /** \brief get the external channel resolution
1633 * \param vadcG Pointer to VADC group register space
1634 * \param inputClassNum Adc input class number
1635 * \return Adc input class External channel resolution
1636 */
1637 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum);
1638
1639 /** \brief Gets the ADC input class sample time of external channel.
1640 * \param vadcG Pointer to Register Group space
1641 * \param inputClassNum ADC input class number
1642 * \param analogFrequency ADC module analog frequency in Hz.
1643 * \return ADC input class external channel sample time in sec.
1644 */
1645 IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency);
1646
1647 /** \brief set the external channel resolution of Global class
1648 * \param vadc pointer to VADC Module space
1649 * \param inputClassNum Global Input Class Number
1650 * \param resolution External Channel resolution
1651 * \return None
1652 */
1653 IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1654
1655 /** \brief Sets the sample time of ADC global class for external channel.
1656 * \param vadc Pointer to VADC Module space
1657 * \param inputClassNum Adc input class number
1658 * \param analogFrequency ADC analog Frequency in HZ
1659 * \param sampleTime the requested sample time for input class in sec
1660 * \return None
1661 */
1662 IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1663
1664 /** \brief set the external channel resolution of ADC input class
1665 * \param vadcG pointer to VADC Group Register space
1666 * \param inputClassNum input class number
1667 * \param resolution input class external channel resolution
1668 * \return None
1669 */
1670 IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1671
1672 /** \brief Sets the ADC input class sample time for external channel.
1673 * \param vadcG Pointer to VADC Group Register Space
1674 * \param inputClassNum input class number
1675 * \param analogFrequency ADC analog frequency in Hz.
1676 * \param sampleTime request sample time in sec for input class.
1677 * \return None
1678 */
1679 IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1680
1681 /** \brief Sets the Emux Interface for a particular group
1682 * \param vadc Pointer to VADC Module Space
1683 * \param emuxInterface specifies the EmuxInterface
1684 * \param group specifies the group ID
1685 * \return None
1686 */
1687 IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group);
1688
1689 /******************************************************************************/
1690 /*-------------------------Global Function Prototypes-------------------------*/
1691 /******************************************************************************/
1692
1693 /**
1694 * \param vadc pointer to Module space
1695 * \param vadcG Pointer to VADC group register space
1696 * \param mode External Multiplexer mode
1697 * \param channels Specifies channel Id
1698 * \param startChannel specifies the external channel value from which conversion to be carried out
1699 * \param code Output the channel number in binary code/gray code
1700 * \param sampleTimeControl specifies when to use a sample time for external channel
1701 * \param channelSelectionStyle External Multiplexer Channel Selection Style
1702 * \return None
1703 */
1704 IFX_EXTERN void IfxVadc_configExternalMultiplexerMode(Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle);
1705
1706 /** \} */
1707
1708 /******************************************************************************/
1709 /*-------------------------Inline Function Prototypes-------------------------*/
1710 /******************************************************************************/
1711
1712 /** \brief get channel service request node pointer
1713 * \param vadcG Pointer to VADC Group register space
1714 * \return channel service request node pointer
1715 */
1716 IFX_INLINE Ifx_VADC_G_CEVNP1 IfxVadc_getChannelServiceRequestNodePointer1(Ifx_VADC_G *vadcG);
1717
1718 /** \brief set channel event node pointer
1719 * \param vadcG Pointer to the Vadc group register space
1720 * \param channelSrcNr Service request
1721 * \param channel specifies channel
1722 * \return None
1723 */
1724 IFX_INLINE void IfxVadc_setChannelEventNodePointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel);
1725
1726 /******************************************************************************/
1727 /*---------------------Inline Function Implementations------------------------*/
1728 /******************************************************************************/
1729
1730 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options)
1731 {
1732 group->QINR0.U = channel | options;
1733 }
1734
1735
1736 IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime)
1737 {
1738 uint32 ticks;
1739
1740 ticks = (uint32)(sampleTime * analogFrequency) - 2;
1741
1742 if (ticks > 31)
1743 {
1744 ticks = (ticks / 16) + 15;
1745 }
1746
1747 ticks = __minu(ticks, 0xFFu);
1748
1749 return ticks;
1750 }
1751
1752
1753 IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG)
1754 {
1755 vadcG->REFCLR.U = 0x0000FFFFu;
1756 }
1757
1758
1759 IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId)
1760 {
1761 vadcG->CEFCLR.U = 1 << channelId;
1762 }
1763
1764
1765 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue)
1766 {
1767 vadcG->QMR0.B.FLUSH = flushQueue;
1768 }
1769
1770
1771 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
1772 {
1773 group->RCR[resultIdx].B.WFR = waitForRead;
1774 }
1775
1776
1777 IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead)
1778 {
1779 vadc->GLOBRCR.B.WFR = waitForRead;
1780 }
1781
1782
1783 IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc)
1784 {
1785 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1786 IfxScuWdt_clearCpuEndinit(passwd);
1787 vadc->CLC.B.DISR = 1;
1788 IfxScuWdt_setCpuEndinit(passwd);
1789 }
1790
1791
1792 IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
1793 {
1794 vadcG->QMR0.B.ENTR = 0; /* disable external trigger */
1795 }
1796
1797
1798 IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
1799 {
1800 vadcG->ASMR.B.ENTR = 0; /* disable external trigger */
1801 }
1802
1803
1804 IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc)
1805 {
1806 vadc->BRSMR.B.ENTR = 1; /* enable external trigger */
1807 }
1808
1809
1810 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode)
1811 {
1812 vadcG->RCR[resultRegister].B.FEN = fifoMode;
1813 }
1814
1815
1816 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc)
1817 {
1818 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1819
1820 IfxScuWdt_clearCpuEndinit(passwd);
1821 vadc->CLC.U = 0x00000000;
1822 IfxScuWdt_setCpuEndinit(passwd);
1823 }
1824
1825
1826 IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
1827 {
1828 vadcG->QMR0.B.ENTR = 1; /* enable external trigger */
1829 }
1830
1831
1832 IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
1833 {
1834 vadcG->ASMR.B.ENTR = 1; /* enable external trigger */
1835 }
1836
1837
1838 IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
1839 {
1840 vadcG->RCR[resultRegister].B.SRGEN = 1;
1841 }
1842
1843
1844 IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum)
1845 {
1846 uint8 status;
1847 status = vadc->G[adcCalGroupNum].ARBCFG.B.CAL;
1848 return status;
1849 }
1850
1851
1852 IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG)
1853 {
1854 return (IfxVadc_ArbitrationRounds)vadcG->ARBCFG.B.ARBRND;
1855 }
1856
1857
1858 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG)
1859 {
1860 Ifx_VADC_G_CHASS assignChannels;
1861 assignChannels.U = vadcG->CHASS.U;
1862 return assignChannels;
1863 }
1864
1865
1866 IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc)
1867 {
1868 return (IfxVadc_GatingMode)vadc->BRSMR.B.ENGT;
1869 }
1870
1871
1872 IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc)
1873 {
1874 return (IfxVadc_GatingSource)vadc->BRSCTRL.B.GTSEL;
1875 }
1876
1877
1878 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG)
1879 {
1880 return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO2;
1881 }
1882
1883
1884 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG)
1885 {
1886 return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM2;
1887 }
1888
1889
1890 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc)
1891 {
1892 return (IfxVadc_TriggerSource)vadc->BRSCTRL.B.XTSEL;
1893 }
1894
1895
1896 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc)
1897 {
1898 return (IfxVadc_TriggerMode)vadc->BRSCTRL.B.XTMODE;
1899 }
1900
1901
1902 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1903 {
1904 Ifx_VADC_CHCTR tempChctr;
1905 tempChctr.U = vadcG->CHCTR[channelIndex].U;
1906 return tempChctr;
1907 }
1908
1909
1910 IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1911 {
1912 return (IfxVadc_InputClasses)vadcG->CHCTR[channelIndex].B.ICLSEL;
1913 }
1914
1915
1916 IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
1917 {
1918 Ifx_VADC_G_REVNP0 resultServiceRequestNodePtr0;
1919 resultServiceRequestNodePtr0.U = vadcG->REVNP0.U;
1920 return resultServiceRequestNodePtr0;
1921 }
1922
1923
1924 IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
1925 {
1926 Ifx_VADC_G_REVNP1 resultServiceRequestNodePtr1;
1927 resultServiceRequestNodePtr1.U = vadcG->REVNP1.U;
1928 return resultServiceRequestNodePtr1;
1929 }
1930
1931
1932 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
1933 {
1934 Ifx_VADC_G_CEVNP0 serviceRequestNodePtr;
1935 serviceRequestNodePtr.U = vadcG->CEVNP0.U;
1936 return serviceRequestNodePtr;
1937 }
1938
1939
1940 IFX_INLINE Ifx_VADC_G_CEVNP1 IfxVadc_getChannelServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
1941 {
1942 Ifx_VADC_G_CEVNP1 serviceRequestNodePtr;
1943 serviceRequestNodePtr.U = vadcG->CEVNP1.U;
1944 return serviceRequestNodePtr;
1945 }
1946
1947
1948 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
1949 {
1950 return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CME;
1951 }
1952
1953
1954 IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
1955 {
1956 return (float32)(IFXVADC_SAMPLETIME_MIN + vadc->GLOBICLASS[inputClassNum].B.STCE) / analogFrequency;
1957 }
1958
1959
1960 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
1961 {
1962 return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CME;
1963 }
1964
1965
1966 IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
1967 {
1968 return (float32)(IFXVADC_SAMPLETIME_MIN + vadcG->ICLASS[inputClassNum].B.STCE) / analogFrequency;
1969 }
1970
1971
1972 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc)
1973 {
1974 Ifx_VADC_GLOBCFG globCfg;
1975 globCfg.U = vadc->GLOBCFG.U;
1976 return globCfg;
1977 }
1978
1979
1980 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
1981 {
1982 return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CMS;
1983 }
1984
1985
1986 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc)
1987 {
1988 Ifx_VADC_GLOBRES tmpGlobalResult;
1989
1990 tmpGlobalResult.U = vadc->GLOBRES.U;
1991
1992 return tmpGlobalResult;
1993 }
1994
1995
1996 IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
1997 {
1998 uint32 sampleTime = vadc->GLOBICLASS[inputClassNum].B.STCS;
1999
2000 if (sampleTime > 16)
2001 {
2002 sampleTime = (sampleTime - 15) * 16;
2003 }
2004
2005 return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
2006 }
2007
2008
2009 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
2010 {
2011 return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CMS;
2012 }
2013
2014
2015 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
2016 {
2017 uint32 idx;
2018
2019 for (idx = 0; idx < numResults; idx++)
2020 {
2021 results[idx].U = group->RES[resultOffset + idx].U;
2022 }
2023 }
2024
2025
2026 IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
2027 {
2028 uint32 sampleTime = vadcG->ICLASS[inputClassNum].B.STCS;
2029
2030 if (sampleTime > 16)
2031 {
2032 sampleTime = (sampleTime - 15) * 16;
2033 }
2034
2035 return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
2036 }
2037
2038
2039 IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG)
2040 {
2041 uint8 masterIndex = 0;
2042 masterIndex = vadcG->SYNCTR.B.STSEL;
2043 return masterIndex;
2044 }
2045
2046
2047 IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG)
2048 {
2049 return (IfxVadc_GatingMode)vadcG->QMR0.B.ENGT;
2050 }
2051
2052
2053 IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG)
2054 {
2055 return (IfxVadc_GatingSource)vadcG->QCTRL0.B.GTSEL;
2056 }
2057
2058
2059 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG)
2060 {
2061 return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO0;
2062 }
2063
2064
2065 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG)
2066 {
2067 return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM0;
2068 }
2069
2070
2071 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG)
2072 {
2073 return (IfxVadc_TriggerSource)vadcG->QCTRL0.B.XTSEL;
2074 }
2075
2076
2077 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG)
2078 {
2079 return (IfxVadc_TriggerMode)vadcG->QCTRL0.B.XTMODE;
2080 }
2081
2082
2083 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx)
2084 {
2085 Ifx_VADC_RES tmpResult;
2086
2087 tmpResult.U = group->RES[resultIdx].U;
2088
2089 return tmpResult;
2090 }
2091
2092
2093 IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG)
2094 {
2095 return (IfxVadc_GatingMode)vadcG->ASMR.B.ENGT;
2096 }
2097
2098
2099 IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG)
2100 {
2101 return (IfxVadc_GatingSource)vadcG->ASCTRL.B.GTSEL;
2102 }
2103
2104
2105 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG)
2106 {
2107 return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO1;
2108 }
2109
2110
2111 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG)
2112 {
2113 return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM1;
2114 }
2115
2116
2117 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG)
2118 {
2119 return (IfxVadc_TriggerSource)vadcG->ASCTRL.B.XTSEL;
2120 }
2121
2122
2123 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG)
2124 {
2125 return (IfxVadc_TriggerMode)vadcG->ASCTRL.B.XTMODE;
2126 }
2127
2128
2129 IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc)
2130 {
2131 return (boolean)vadc->GLOBCFG.B.SUCAL;
2132 }
2133
2134
2135 IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2136 {
2137 IfxPort_setPinModeOutput(emux->pin.port, emux->pin.pinIndex, outputMode, emux->select);
2138 IfxPort_setPinPadDriver(emux->pin.port, emux->pin.pinIndex, padDriver);
2139 }
2140
2141
2142 IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2143 {
2144 IfxPort_setPinModeOutput(gxBfl->pin.port, gxBfl->pin.pinIndex, outputMode, gxBfl->select);
2145 IfxPort_setPinPadDriver(gxBfl->pin.port, gxBfl->pin.pinIndex, padDriver);
2146 }
2147
2148
2149 IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc)
2150 {
2151 vadc->GLOBCFG.B.SUCAL = 1;
2152 }
2153
2154
2155 IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc)
2156 {
2157 return (boolean)vadc->BRSMR.B.SCAN;
2158 }
2159
2160
2161 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG)
2162 {
2163 return (boolean)vadcG->ASMR.B.SCAN;
2164 }
2165
2166
2167 IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG)
2168 {
2169 return (boolean)vadcG->ARBPR.B.ASEN2;
2170 }
2171
2172
2173 IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG)
2174 {
2175 return (boolean)vadcG->ARBPR.B.ASEN0;
2176 }
2177
2178
2179 IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG)
2180 {
2181 return (boolean)vadcG->ARBPR.B.ASEN1;
2182 }
2183
2184
2185 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG)
2186 {
2187 vadcG->ARBCFG.B.ANONC = IfxVadc_AnalogConverterMode_off; /* turn off group */
2188 }
2189
2190
2191 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
2192 {
2193 vadcG->ARBCFG.B.ANONC = analogConverterMode;
2194 }
2195
2196
2197 IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength)
2198 {
2199 vadcG->ARBCFG.B.ARBRND = arbiterRoundLength;
2200 }
2201
2202
2203 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
2204 {
2205 vadc->BRSMR.B.SCAN = autoBackgroundScanEnable;
2206 }
2207
2208
2209 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable)
2210 {
2211 vadcG->ASMR.B.SCAN = autoscanEnable;
2212 }
2213
2214
2215 IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
2216 {
2217 vadcG->CHASS.U &= ~(1 << channelIndex);
2218 }
2219
2220
2221 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
2222 {
2223 vadcG->CHCTR[channelIndex].B.RESTBS = globalResultUsage;
2224 }
2225
2226
2227 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
2228 {
2229 channels = (vadc->BRSSEL[groupId].U & ~mask) | channels;
2230 vadc->BRSSEL[groupId].U = channels;
2231 }
2232
2233
2234 IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2235 {
2236 Ifx_VADC_BRSCTRL brsctrl;
2237 brsctrl.U = vadc->BRSCTRL.U;
2238 brsctrl.B.GTWC = 1;
2239 brsctrl.B.GTSEL = gatingSource;
2240 vadc->BRSCTRL.U = brsctrl.U;
2241 vadc->BRSMR.B.ENGT = gatingMode;
2242 }
2243
2244
2245 IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2246 {
2247 Ifx_VADC_BRSCTRL brsctrl;
2248 brsctrl.U = vadc->BRSCTRL.U;
2249 brsctrl.B.XTWC = 1;
2250 brsctrl.B.XTMODE = triggerMode;
2251 brsctrl.B.XTSEL = triggerSource;
2252 vadc->BRSCTRL.U = brsctrl.U;
2253 }
2254
2255
2256 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
2257 {
2258 vadcG->CHCTR[channelIndex].B.BNDSELX = boundaryMode;
2259 }
2260
2261
2262 IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
2263 {
2264 vadcG->CEVNP0.U &= ~(IFX_VADC_G_CEVNP0_CEV0NP_MSK << (channel * 4));
2265 vadcG->CEVNP0.U |= (channelSrcNr << (channel * 4));
2266 }
2267
2268
2269 IFX_INLINE void IfxVadc_setChannelEventNodePointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
2270 {
2271 vadcG->CEVNP1.U &= ~(IFX_VADC_G_CEVNP1_CEV8NP_MSK << (channel * 4));
2272 vadcG->CEVNP1.U |= (channelSrcNr << (channel * 4));
2273 }
2274
2275
2276 IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
2277 {
2278 vadcG->CHCTR[channelIndex].B.ICLSEL = inputClass;
2279 }
2280
2281
2282 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
2283 {
2284 vadcG->CHCTR[channelIndex].B.CHEVMODE = limitCheck;
2285 }
2286
2287
2288 IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2289 {
2290 vadc->GLOBICLASS[inputClassNum].B.CME = resolution;
2291 }
2292
2293
2294 IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2295 {
2296 vadc->GLOBICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2297 }
2298
2299
2300 IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2301 {
2302 vadcG->ICLASS[inputClassNum].B.CME = resolution;
2303 }
2304
2305
2306 IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2307 {
2308 vadcG->ICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2309 }
2310
2311
2312 IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group)
2313 {
2314 if (emuxInterface == IfxVadc_EmuxInterface_0)
2315 {
2316 vadc->EMUXSEL.B.EMUXGRP0 = group;
2317 }
2318 else
2319 {
2320 vadc->EMUXSEL.B.EMUXGRP1 = group;
2321 }
2322 }
2323
2324
2325 IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2326 {
2327 vadc->GLOBICLASS[inputClassNum].B.CMS = resolution;
2328 }
2329
2330
2331 IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2332 {
2333 vadc->GLOBICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2334 }
2335
2336
2337 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
2338 {
2339 vadcG->CHASS.U |= (1 << channelIndex);
2340 }
2341
2342
2343 IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2344 {
2345 vadcG->ICLASS[inputClassNum].B.CMS = resolution;
2346 }
2347
2348
2349 IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2350 {
2351 vadcG->ICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2352 }
2353
2354
2355 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
2356 {
2357 vadcG->CHCTR[channelIndex].B.BNDSELL = lowerBoundary;
2358 }
2359
2360
2361 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex)
2362 {
2363 vadcG->SYNCTR.B.STSEL = (masterIndex % 4);
2364 vadcG->SYNCTR.U |= (0x00000008U << (masterIndex % 4));
2365 }
2366
2367
2368 IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2369 {
2370 Ifx_VADC_G_QCTRL0 qctrl0;
2371 qctrl0.U = vadcG->QCTRL0.U;
2372 qctrl0.B.GTWC = 1;
2373 qctrl0.B.GTSEL = gatingSource;
2374 vadcG->QCTRL0.U = qctrl0.U;
2375 vadcG->QMR0.B.ENGT = gatingMode;
2376 }
2377
2378
2379 IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2380 {
2381 Ifx_VADC_G_QCTRL0 qctrl0;
2382 qctrl0.U = vadcG->QCTRL0.U;
2383 qctrl0.B.XTWC = 1;
2384 qctrl0.B.XTMODE = triggerMode;
2385 qctrl0.B.XTSEL = triggerSource;
2386 vadcG->QCTRL0.U = qctrl0.U;
2387 }
2388
2389
2390 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
2391 {
2392 vadcG->CHCTR[channelIndex].B.REFSEL = reference;
2393 }
2394
2395
2396 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
2397 {
2398 vadcG->REVNP0.U &= ~(IFX_VADC_G_REVNP0_REV0NP_MSK << (resultRegister * 4));
2399 vadcG->REVNP0.U |= (resultSrcNr << (resultRegister * 4));
2400 }
2401
2402
2403 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
2404 {
2405 vadcG->REVNP1.U &= ~(IFX_VADC_G_REVNP1_REV8NP_MSK << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
2406 vadcG->REVNP1.U |= (resultSrcNr << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
2407 }
2408
2409
2410 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
2411 {
2412 vadcG->CHCTR[channelIndex].B.RESPOS = rightAlignedStorage;
2413 }
2414
2415
2416 IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2417 {
2418 Ifx_VADC_G_ASCTRL asctrl;
2419 asctrl.U = vadcG->ASCTRL.U;
2420 asctrl.B.GTWC = 1;
2421 asctrl.B.GTSEL = gatingSource;
2422 vadcG->ASCTRL.U = asctrl.U;
2423 vadcG->ASMR.B.ENGT = gatingMode;
2424 }
2425
2426
2427 IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2428 {
2429 Ifx_VADC_G_ASCTRL asctrl;
2430 asctrl.U = vadcG->ASCTRL.U;
2431 asctrl.B.XTWC = 1;
2432 asctrl.B.XTMODE = triggerMode;
2433 asctrl.B.XTSEL = triggerSource;
2434 vadcG->ASCTRL.U = asctrl.U;
2435 }
2436
2437
2438 IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode)
2439 {
2440 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2441 IfxScuWdt_clearCpuEndinit(passwd);
2442 vadc->CLC.B.EDIS = mode;
2443 IfxScuWdt_setCpuEndinit(passwd);
2444 }
2445
2446
2447 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
2448 {
2449 vadcG->CHCTR[channelIndex].B.SYNC = synchonize;
2450 }
2451
2452
2453 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
2454 {
2455 vadcG->CHCTR[channelIndex].B.BNDSELU = upperBoundary;
2456 }
2457
2458
2459 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc)
2460 {
2461 vadc->BRSMR.B.LDEV = 1; /* execute Load event to start the conversion */
2462 }
2463
2464
2465 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group)
2466 {
2467 group->QMR0.B.TREV = 1;
2468 }
2469
2470
2471 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group)
2472 {
2473 group->ASMR.B.LDEV = 1; /* set Load event. Channels stored in ASSEL will be copied into pending register and conversion will start */
2474 }
2475
2476
2477 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
2478 {
2479 vadcG->CHCTR[channelIndex].B.RESREG = resultRegister;
2480 }
2481
2482
2483 IFX_INLINE Ifx_VADC_RESD IfxVadc_getDebugResult(Ifx_VADC_G *group, uint32 resultIdx)
2484 {
2485 Ifx_VADC_RESD tmpResult;
2486
2487 tmpResult.U = group->RESD[resultIdx].U;
2488
2489 return tmpResult;
2490 }
2491
2492
2493 #endif /* IFXVADC_H */
IfxVadc_ChannelResolution_8bit
8-bit conversion
Definition: IfxVadc.h:174
IfxVadc_BoundaryExtension_fastCompareResult4
Fast compare mode use as upper boundary Channel result 4.
Definition: IfxVadc.h:113
IfxVadc_setEmuxInterfaceForGroup
IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group)
Sets the Emux Interface for a particular group.
Definition: IfxVadc.h:2312
IfxVadc_setGroupResolution
IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
Sets the ADC input class channel resolution.
Definition: IfxVadc.h:2343
IfxVadc_ChannelId_11
Channel 11.
Definition: IfxVadc.h:153
IfxVadc_Protection_initGroup4
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:363
IfxVadc_getChannelServiceRequestNodePointer1
IFX_INLINE Ifx_VADC_G_CEVNP1 IfxVadc_getChannelServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
get channel service request node pointer
Definition: IfxVadc.h:1940
IfxVadc_TriggerSource_5
Input signal REQTRx_5.
Definition: IfxVadc.h:492
IfxVadc_isRequestBackgroundScanSlotEnabled
IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG)
Returns the background scan slot requested status.
Definition: IfxVadc.h:2167
IfxVadc_ChannelId_0
Channel 0.
Definition: IfxVadc.h:142
IfxVadc_getGroupResolution
IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
Gets the ADC input class channel resolution.
Definition: IfxVadc.h:2009
IfxVadc_BoundaryExtension_fastCompareResult15
Fast compare mode use as upper boundary Channel result 15.
Definition: IfxVadc.h:124
IfxVadc_clearAllResultRequests
IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG)
Clears the all group requests.
Definition: IfxVadc.h:1753
IfxVadc_disableAccess
IFX_EXTERN void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Disable write access to the VADC config/control registers.
Definition: IfxVadc.c:71
IfxVadc_Protection_resultRegisterGroup1
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:392
IfxVadc_ChannelId
IfxVadc_ChannelId
VADC Channels.
Definition: IfxVadc.h:139
IfxVadc_FifoMode_fifoStructure
fifoStructure
Definition: IfxVadc.h:274
IfxVadc_LimitCheck_eventIfOutsideArea
Normal compare mode Event If result is outside the boundary band Fast Compare mode Event If result sw...
Definition: IfxVadc.h:327
IfxVadc_Status_noAccess
Access to the group/channel is disabled.
Definition: IfxVadc.h:469
IfxVadc_SrcNr_group2
service request line 2 of group
Definition: IfxVadc.h:450
IfxVadc_ChannelSelectionStyle
IfxVadc_ChannelSelectionStyle
External Multiplexer Channel Selection Style as defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCSS.
Definition: IfxVadc.h:203
IfxVadc_BoundaryExtension_fastCompareResult5
Fast compare mode use as upper boundary Channel result 5.
Definition: IfxVadc.h:114
IfxVadc_ChannelSelectionStyle_binary
Each bit of bitfield EMUXCH selects the associated channel for EMUX control.
Definition: IfxVadc.h:206
IfxVadc_Protection_resultRegisterGroup13
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:404
IfxVadc_GatingSource_3
Input signal REQGTx_3.
Definition: IfxVadc.h:296
IfxVadc_getResultBasedOnRequestSource
IFX_EXTERN Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset...
Definition: IfxVadc.c:302
IfxVadc_getEmuxGlobalSampleTime
IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
Get the sample time of ADC global class for external channel.
Definition: IfxVadc.h:1954
IfxVadc_TriggerSource_15
Input signal REQTRx_15.
Definition: IfxVadc.h:502
IfxVadc_EmuxCodingScheme
IfxVadc_EmuxCodingScheme
Specifies the External Coding scheme(binary/gray) defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD.
Definition: IfxVadc.h:220
IfxVadc_GatingMode_gatingHigh
Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is hig...
Definition: IfxVadc.h:285
IfxVadc_startBackgroundScan
IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc)
Starts a background scan.
Definition: IfxVadc.h:2459
IfxVadc_initiateStartupCalibration
IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc)
initiates the calibration pulse phase.
Definition: IfxVadc.h:2149
IfxVadc_GatingSource_8
Input signal REQGTx_8.
Definition: IfxVadc.h:301
IfxVadc_getChannelResultServiceRequestNodePointer0
IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
Gets the channel esult service request node pointer 0.
Definition: IfxVadc.h:1916
IfxVadc_ArbitrationRounds_16_slots
An arbitration round contains 16 arbitration slots.
Definition: IfxVadc.h:101
IfxVadc_ConversionType
IfxVadc_ConversionType
type of conversion
Definition: IfxVadc.h:212
IfxVadc_EmuxSelectValue_5
Start Selection Value 5.
Definition: IfxVadc.h:253
IfxVadc_LimitCheck_noCheck
Normal compare mode Event Never Fast Compare mode Event Never.
Definition: IfxVadc.h:325
IfxVadc_getArbiterRoundLength
IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG)
Gets the ADC group arbitration round length.
Definition: IfxVadc.h:1852
IfxVadc_GatingSource_4
Input signal REQGTx_4.
Definition: IfxVadc.h:297
IfxVadc_Protection_channelControl7
Access control for GxCHCTR7.
Definition: IfxVadc.h:350
IfxVadc_Protection_channelControl4
Access control for GxCHCTR4.
Definition: IfxVadc.h:347
IfxVadc_RequestSlotPriority_high
High priority.
Definition: IfxVadc.h:414
IfxVadc_Protection_resultRegisterGroup6
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:397
IfxVadc_ArbitrationRounds
IfxVadc_ArbitrationRounds
Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)
Definition: IfxVadc.h:97
IfxVadc_GatingSource_0
Input signal REQGTx_0.
Definition: IfxVadc.h:293
IfxVadc_disableQueueSlotExternalTrigger
IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
Disables the external trigger.
Definition: IfxVadc.h:1792
IfxVadc_ChannelResult_10
Use Channel result 10.
Definition: IfxVadc.h:192
IfxVadc_RequestSlotPriority_low
Lowpriority.
Definition: IfxVadc.h:413
IfxVadc_ChannelId_1
Channel 1.
Definition: IfxVadc.h:143
IfxVadc_getAssignedChannels
IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG)
Gets the group&#39;s assigned channels.
Definition: IfxVadc.h:1858
IfxVadc_setChannelEventNodePointer0
IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
Sets the channel event service request line.
Definition: IfxVadc.h:2262
IfxVadc_ChannelResult_9
Use Channel result 9.
Definition: IfxVadc.h:191
IfxVadc_ChannelReference
IfxVadc_ChannelReference
ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:162
IfxVadc_InputClasses_group0
Use group class 0.
Definition: IfxVadc.h:315
IfxVadc_setReferenceInput
IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
Selects the refernce input.
Definition: IfxVadc.h:2390
IfxVadc_Protection_channelControl10
Access control for GxCHCTR10.
Definition: IfxVadc.h:353
IfxVadc_setChannelEventNodePointer1
IFX_INLINE void IfxVadc_setChannelEventNodePointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
set channel event node pointer
Definition: IfxVadc.h:2269
IfxVadc_ChannelResult_1
Use Channel result 1.
Definition: IfxVadc.h:183
IfxVadc_Protection_resultRegisterGroup3
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:394
IfxVadc_Protection_initGroup8
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:367
IfxVadc_getAdcDigitalFrequency
IFX_EXTERN float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc)
Returns the configured Fadcd VADC digital clock frequency in Hz.
Definition: IfxVadc.c:186
IfxVadc_RequestSlotPriority_lowest
Lowest priority.
Definition: IfxVadc.h:412
IfxVadc_Protection_serviceGroup6
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:381
IfxVadc_getQueueStatus
IFX_EXTERN IfxVadc_Status IfxVadc_getQueueStatus(Ifx_VADC_G *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full...
Definition: IfxVadc.c:284
IfxVadc_setEmuxGlobalSampleTime
IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time of ADC global class for external channel.
Definition: IfxVadc.h:2294
IfxVadc_Protection_serviceGroup5
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:380
IfxVadc_FifoMode_seperateResultRegister
seperate Result Register
Definition: IfxVadc.h:273
IfxVadc_getQueueSlotGatingSource
IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG)
Gets the requested queue slot gating input.
Definition: IfxVadc.h:2053
IfxVadc_TriggerSource_10
Input signal REQTRx_10.
Definition: IfxVadc.h:497
IfxVadc_Protection_resultRegisterGroup2
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:393
IfxVadc_Protection_resultRegisterGroup7
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:398
IfxVadc_storeGroupResult
IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
Sets the group result register.
Definition: IfxVadc.h:2477
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxVadc_TriggerMode_uponAnyEdge
Trigger event upon any edge.
Definition: IfxVadc.h:480
IfxVadc_getEmuxGroupSampleTime
IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the ADC input class sample time of external channel.
Definition: IfxVadc.h:1966
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxVadc_SrcNr_shared2
Select shared service request line 2.
Definition: IfxVadc.h:454
IfxVadc_BoundarySelection_global0
Use global class 0.
Definition: IfxVadc.h:133
IfxVadc_Protection_initGroup1
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:360
IfxVadc_RequestSource_background
background scan request
Definition: IfxVadc.h:432
IfxVadc_getBackgroundScanSlotStartMode
IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG)
Gets the requested background scan slot start mode.
Definition: IfxVadc.h:1884
float32
float float32
Definition: Platform_Types.h:170
IfxVadc_setChannelLimitCheckMode
IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
Sets the channel event mode.
Definition: IfxVadc.h:2282
IfxVadc_Protection_initGroup6
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:365
IfxVadc_BoundarySelection_group1
Use group class 1.
Definition: IfxVadc.h:132
IfxVadc_ChannelId_13
Channel 13.
Definition: IfxVadc.h:155
IfxVadc_ChannelReference_channel0
use CH0 as reference
Definition: IfxVadc.h:165
IfxVadc_Status_queueFull
Queue is full.
Definition: IfxVadc.h:468
IfxVadc_isRequestQueueSlotEnabled
IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG)
Returns the queue slot requested status.
Definition: IfxVadc.h:2173
IfxVadc_PinMap.h
VADC I/O map.
IfxVadc_RequestSource_queue
8 stage Queue request
Definition: IfxVadc.h:430
IfxVadc_ChannelResult_11
Use Channel result 11.
Definition: IfxVadc.h:193
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IfxVadc_AnalogConverterMode_slowStandby
Slow Standby Mode.
Definition: IfxVadc.h:90
IfxVadc_InputClasses_global0
Use global class 0.
Definition: IfxVadc.h:317
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:340
IfxVadc_cfg.h
VADC on-chip implementation data.
IfxVadc_Emux_Out
VADC External Mux pin mapping structure.
Definition: IfxVadc_PinMap.h:65
IfxVadc_SrcNr_shared0
Select shared service request line 0.
Definition: IfxVadc.h:452
IfxVadc_setBoundaryMode
IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
Selects boundary extension.
Definition: IfxVadc.h:2256
IfxVadc_isRequestScanSlotEnabled
IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG)
Returns the scan slot requested status.
Definition: IfxVadc.h:2179
IfxVadc_GatingSource_12
Input signal REQGTx_12.
Definition: IfxVadc.h:305
IfxVadc_BoundaryExtension_fastCompareResult1
Fast compare mode use as upper boundary Channel result 1.
Definition: IfxVadc.h:110
IfxVadc_setQueueSlotGatingConfig
IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the gating configurations.
Definition: IfxVadc.h:2368
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:189
IfxVadc_ChannelId_6
Channel 6.
Definition: IfxVadc.h:148
IfxVadc_ChannelResolution
IfxVadc_ChannelResolution
ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
Definition: IfxVadc.h:170
IfxVadc_disablePostCalibration
IFX_EXTERN void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable)
Disables the post calibration.
Definition: IfxVadc.c:89
IfxVadc_GatingSource_9
Input signal REQGTx_9.
Definition: IfxVadc.h:302
IfxVadc_FifoMode
IfxVadc_FifoMode
FIFO mode enable.
Definition: IfxVadc.h:271
IfxVadc_TriggerMode
IfxVadc_TriggerMode
trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
Definition: IfxVadc.h:475
IfxVadc_getEmuxGlobalResolution
IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
get global input class resolution
Definition: IfxVadc.h:1948
IfxVadc_Protection_initGroup14
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:373
IfxVadc_getBackgroundScanSlotPriority
IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG)
Gets the requested background scan slot priority.
Definition: IfxVadc.h:1878
IfxVadc_TriggerSource_4
Input signal REQTRx_4.
Definition: IfxVadc.h:491
IfxVadc_EmuxSelectValue_3
Start Selection Value 3.
Definition: IfxVadc.h:251
IfxVadc_getGlobalResult
IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc)
return conversion result stored in the Global result Register
Definition: IfxVadc.h:1986
IfxVadc_BoundarySelection_global1
Use global class 1.
Definition: IfxVadc.h:134
IfxVadc_EmuxInterface_0
Emux Interface 0.
Definition: IfxVadc.h:230
IfxVadc_Protection_serviceGroup10
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:385
IfxVadc_SrcNr_shared1
Select shared service request line 1.
Definition: IfxVadc.h:453
IfxCpu_Intrinsics.h
IfxVadc_EmuxCodingScheme_binary
Output the Channel Number in Binary code.
Definition: IfxVadc.h:222
IfxVadc_Protection_resultRegisterGroup0
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:391
IfxVadc_setEmuxGroupResolution
IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
set the external channel resolution of ADC input class
Definition: IfxVadc.h:2300
IfxVadc_setMasterIndex
IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex)
Sets the master index.
Definition: IfxVadc.h:2361
IfxVadc_RequestSource
IfxVadc_RequestSource
Request sources.
Definition: IfxVadc.h:428
IfxVadc_ChannelResolution_10bit
10-bit conversion
Definition: IfxVadc.h:173
IfxVadc_BoundaryExtension_fastCompareResult13
Fast compare mode use as upper boundary Channel result 13.
Definition: IfxVadc.h:122
IfxVadc_TriggerSource_7
Input signal REQTRx_7.
Definition: IfxVadc.h:494
IfxVadc_Protection_channelControl1
Access control for GxCHCTR1.
Definition: IfxVadc.h:344
IfxVadc_ExternalMultiplexerMode_sequence
Select Sequence Mode.
Definition: IfxVadc.h:266
IfxVadc_ChannelResult
IfxVadc_ChannelResult
Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:180
IfxVadc_GatingMode
IfxVadc_GatingMode
gating mode defined in MODULE_VADC.BRSMR.ENGT
Definition: IfxVadc.h:281
IfxVadc_BoundarySelection
IfxVadc_BoundarySelection
BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:129
IfxVadc_LowSupplyVoltageSelect_3V
3.3V Power Supply is Connected
Definition: IfxVadc.h:336
IfxVadc_setArbitrationRoundLength
IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength)
Sets the arbiter round length.
Definition: IfxVadc.h:2197
IfxVadc_getScanSlotPriority
IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG)
Gets the request scan slot priority.
Definition: IfxVadc.h:2105
IfxVadc_EmuxSampleTimeControl_settingChanges
Use STCE Whenever Setting Changes.
Definition: IfxVadc.h:239
IfxVadc_LimitCheck_eventIfInArea
Normal compare mode Event If result is inside the boundary band Fast Compare mode Event If result swi...
Definition: IfxVadc.h:326
IfxVadc_ChannelSelectionStyle_channelNumber
selects an arbitrary channel
Definition: IfxVadc.h:205
IfxVadc_setGlobalResolution
IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
Sets the channel conversion mode.
Definition: IfxVadc.h:2325
IfxVadc_ChannelId_9
Channel 9.
Definition: IfxVadc.h:151
IfxVadc_Protection_initGroup9
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:368
IfxVadc_setAutoScan
IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable)
Enables/Disables continuous auto scan.
Definition: IfxVadc.h:2209
IfxVadc_getGroupResult
IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group.
Definition: IfxVadc.h:2015
IfxVadc_ChannelId_10
Channel 10.
Definition: IfxVadc.h:152
IfxVadc_ExternalMultiplexerMode_singleStep
Select single step mode.
Definition: IfxVadc.h:265
IfxVadc_setBackgroundScan
IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
configures a background scan; can also stop autoscan if all channels are 0
Definition: IfxVadc.h:2227
IfxVadc_ChannelResult_5
Use Channel result 5.
Definition: IfxVadc.h:187
IfxVadc_ArbitrationRounds_8_slots
An arbitration round contains 8 arbitration slots.
Definition: IfxVadc.h:100
IfxScuWdt.h
SCU basic functionality.
IfxVadc_setScan
IFX_EXTERN void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask)
Configures an (auto-)scan.
Definition: IfxVadc.c:551
IfxVadc_Protection_channelControl0
Access control for GxCHCTR0.
Definition: IfxVadc.h:343
IfxVadc_Protection_channelControl5
Access control for GxCHCTR5.
Definition: IfxVadc.h:348
IfxVadc_BoundaryExtension_fastCompareResult14
Fast compare mode use as upper boundary Channel result 14.
Definition: IfxVadc.h:123
IfxVadc_enableGroupSync
IFX_EXTERN void IfxVadc_enableGroupSync(Ifx_VADC *vadc, uint32 ccu6Num)
Enables the CCU6 based ADC group synchronisation as workaround for Erratum ADC_TC.068.
Definition: IfxVadc.c:129
IfxVadc_EmuxCodingScheme_gray
Output the channel number in gray code.
Definition: IfxVadc.h:223
IfxVadc_resetGroup
IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG)
Resets the ADC group.
Definition: IfxVadc.h:2185
IfxVadc_TriggerSource_6
Input signal REQTRx_6.
Definition: IfxVadc.h:493
IfxVadc_BoundaryExtension_fastCompareResult3
Fast compare mode use as upper boundary Channel result 3.
Definition: IfxVadc.h:112
IfxVadc_ChannelResult_12
Use Channel result 12.
Definition: IfxVadc.h:194
IfxVadc_setBackgroundResultTarget
IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
Sets the target for result background source.
Definition: IfxVadc.h:2221
IfxVadc_FifoMode_minimumMode
copy new result if it is smaller
Definition: IfxVadc.h:276
IfxVadc_EmuxSampleTimeControl
IfxVadc_EmuxSampleTimeControl
External Multiplexer sample time control defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST.
Definition: IfxVadc.h:237
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:241
IfxVadc_GatingSource_2
Input signal REQGTx_2.
Definition: IfxVadc.h:295
IfxVadc_setGroupSampleTime
IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time.
Definition: IfxVadc.h:2349
IfxVadc_setArbiterPriority
IFX_EXTERN void IfxVadc_setArbiterPriority(Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot)
Sets the Arbiter slot configurations.
Definition: IfxVadc.c:527
IfxVadc_Protection_channelControl12
Access control for GxCHCTR12.
Definition: IfxVadc.h:355
IfxVadc_startScan
IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group)
Starts an autoscan on the specified group.
Definition: IfxVadc.h:2471
IfxVadc_Status_invalidChannel
Invalid channel number.
Definition: IfxVadc.h:467
IfxVadc_BoundarySelection_group0
Use group class 0.
Definition: IfxVadc.h:131
IfxVadc_TriggerMode_noExternalTrigger
No external trigger.
Definition: IfxVadc.h:477
IfxVadc_Protection_channelControl6
Access control for GxCHCTR6.
Definition: IfxVadc.h:349
IfxVadc_enableScanSlotExternalTrigger
IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
Enables the scan slot external trigger.
Definition: IfxVadc.h:1832
IfxVadc_getQueueSlotStartMode
IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG)
Gets the requested queue slot start mode.
Definition: IfxVadc.h:2065
IfxVadc_setBackgroundPriorityChannel
IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Sets the channels with low priority as background channel.
Definition: IfxVadc.h:2215
IfxVadc_EmuxSelectValue_7
Start Selection Value 7.
Definition: IfxVadc.h:255
IfxVadc_GatingSource_6
Input signal REQGTx_6.
Definition: IfxVadc.h:299
IfxVadc_Emux_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxVadc_PinMap.h:68
IfxVadc_EmuxSelectValue_4
Start Selection Value 4.
Definition: IfxVadc.h:252
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxVadc_setQueueSlotTriggerOperatingConfig
IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the trigger operating configurations.
Definition: IfxVadc.h:2379
IfxVadc_ChannelResult_15
Use Channel result 15.
Definition: IfxVadc.h:197
IfxVadc_getBackgroundScanGatingMode
IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc)
Gets the background scan gating mode.
Definition: IfxVadc.h:1866
IfxVadc_Protection_channelControl14
Access control for GxCHCTR14.
Definition: IfxVadc.h:357
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxVadc_BoundaryExtension_fastCompareResult11
Fast compare mode use as upper boundary Channel result 11.
Definition: IfxVadc.h:120
IfxVadc_TriggerSource_12
Input signal REQTRx_12.
Definition: IfxVadc.h:499
IfxVadc_Protection_serviceGroup13
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:388
IfxVadc_setScanSlotGatingConfig
IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the scan slot gating configuration.
Definition: IfxVadc.h:2416
IfxVadc_ChannelId_5
Channel 5.
Definition: IfxVadc.h:147
IfxVadc_Protection_resultRegisterGroup9
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:400
IfxVadc_Protection_resultRegisterGroup11
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:402
IfxVadc_EmuxInterface
IfxVadc_EmuxInterface
Specifies the Emux interface.
Definition: IfxVadc.h:228
IfxVadc_AnalogConverterMode_normalOperation
Normal operation mode.
Definition: IfxVadc.h:92
IfxVadc_initEmuxPin
IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a EMUX output.
Definition: IfxVadc.h:2135
IfxVadc_TriggerSource_3
Input signal REQTRx_3.
Definition: IfxVadc.h:490
IfxVadc_EmuxSelectValue_0
Start Selection Value 0.
Definition: IfxVadc.h:248
IfxVadc_Protection_globalConfig
Access control for GLOBCFG.
Definition: IfxVadc.h:374
IfxVadc_Protection_serviceGroup0
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:375
IfxVadc_TriggerSource_2
Input signal REQTRx_2.
Definition: IfxVadc.h:489
IfxVadc_InputClasses
IfxVadc_InputClasses
inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16) ...
Definition: IfxVadc.h:313
IfxVadc_RequestSlotPriority
IfxVadc_RequestSlotPriority
Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
Definition: IfxVadc.h:410
IfxVadc_setBackgroundScanSlotGatingConfig
IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the background scan slot gating configurations.
Definition: IfxVadc.h:2234
IfxVadc_ExternalMultiplexerMode
IfxVadc_ExternalMultiplexerMode
Specifies External Multiplexer Mode define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE.
Definition: IfxVadc.h:261
IfxVadc_Protection_serviceGroup12
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:387
IfxVadc_Protection_channelControl11
Access control for GxCHCTR11.
Definition: IfxVadc.h:354
IfxVadc_setGroupPriorityChannel
IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Sets channel as priority channel with in the group.
Definition: IfxVadc.h:2337
IfxVadc_startQueue
IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group)
Starts a queue of a group by generating a trigger event through software.
Definition: IfxVadc.h:2465
IfxVadc_GatingSource_10
Input signal REQGTx_10.
Definition: IfxVadc.h:303
IfxVadc_TriggerSource_9
Input signal REQTRx_9.
Definition: IfxVadc.h:496
IfxVadc_getSrcAddress
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index)
Gives the SRC source address.
Definition: IfxVadc.c:367
IfxVadc_getQueueSlotTriggerInput
IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG)
Gets the requested queue slot trigger input.
Definition: IfxVadc.h:2071
IfxVadc_BoundaryExtension_fastCompareResult12
Fast compare mode use as upper boundary Channel result 12.
Definition: IfxVadc.h:121
IfxVadc_GatingSource_14
Input signal REQGTx_14.
Definition: IfxVadc.h:307
IfxVadc_Protection_serviceGroup11
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:386
IfxVadc_setAutoBackgroundScan
IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
Enables/Disables continuous background auto scan.
Definition: IfxVadc.h:2203
IfxVadc_getStartupCalibration
IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc)
get SUCAL bit field status
Definition: IfxVadc.h:2129
IfxVadc_ExternalMultiplexerMode_softwareControl
Disable The Emux Control.
Definition: IfxVadc.h:263
IfxVadc_LimitCheck_always
Normal compare mode Event Always Fast Compare mode Event Always.
Definition: IfxVadc.h:328
IfxVadc_setResultNodeEventPointer1
IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
Sets result event node pointer 1.
Definition: IfxVadc.h:2403
IfxVadc_LowSupplyVoltageSelect
IfxVadc_LowSupplyVoltageSelect
Low Power Supply Voltage Select.
Definition: IfxVadc.h:333
IfxVadc_setBackgroundScanSlotTriggerConfig
IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the background scan exteranal trigger operating configurations.
Definition: IfxVadc.h:2245
IfxVadc_EmuxSelectValue_2
Start Selection Value 2.
Definition: IfxVadc.h:250
IfxVadc_TriggerMode_uponRisingEdge
Trigger event upon a rising edge.
Definition: IfxVadc.h:479
IfxVadc_ChannelResult_3
Use Channel result 3.
Definition: IfxVadc.h:185
IfxVadc_SleepMode_enable
enables sleep mode
Definition: IfxVadc.h:440
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:191
IfxVadc_getBackgroundScanStatus
IFX_EXTERN IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc)
Gives the background scan status for a group.
Definition: IfxVadc.c:198
IfxVadc_Protection
IfxVadc_Protection
Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U.
Definition: IfxVadc.h:341
IfxVadc_Protection_resultRegisterGroup10
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:401
IfxVadc_Protection_initGroup13
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:372
IfxVadc_EmuxSelectValue_6
Start Selection Value 6.
Definition: IfxVadc.h:254
IfxVadc_initialiseAdcArbiterClock
IFX_EXTERN void IfxVadc_initialiseAdcArbiterClock(Ifx_VADC *vadc, uint32 arbiterClockDivider)
Initialises ADC arbiter clock.
Definition: IfxVadc.c:395
IfxVadc_setResultNodeEventPointer0
IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
Sets result event node pointer 0.
Definition: IfxVadc.h:2396
IfxVadc_ArbitrationRounds_4_slots
An arbitration round contains 4 arbitration slots.
Definition: IfxVadc.h:99
IfxVadc_Protection_initGroup3
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:362
IfxVadc_Protection_serviceGroup3
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:378
IfxVadc_TriggerSource_14
Input signal REQTRx_14.
Definition: IfxVadc.h:501
IfxVadc_getScanSlotGatingSource
IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG)
Gets the request scan slot gating input.
Definition: IfxVadc.h:2099
IfxVadc_ChannelResult_4
Use Channel result 4.
Definition: IfxVadc.h:186
IfxVadc_Protection_serviceGroup7
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:382
IfxVadc_Protection_serviceGroup14
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:389
IfxVadc_addToQueue
IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill...
Definition: IfxVadc.h:1730
IfxVadc_Protection_resultRegisterGroup5
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:396
IfxVadc_EmuxSampleTimeControl_always
Use STCE for each conversion of an external channel.
Definition: IfxVadc.h:240
IfxVadc_FifoMode_maximumMode
copy new result if bigger
Definition: IfxVadc.h:275
IfxVadc_ChannelId_15
Channel 15.
Definition: IfxVadc.h:157
IfxVadc_ChannelId_14
Channel 14.
Definition: IfxVadc.h:156
IfxVadc_getBackgroundScanTriggerMode
IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc)
Gets the background scan external trigger mode.
Definition: IfxVadc.h:1896
IfxVadc_Protection_initGroup10
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:369
IfxVadc_setGlobalSampleTime
IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time of ADC global class.
Definition: IfxVadc.h:2331
IfxVadc_Protection_channelControl9
Access control for GxCHCTR9.
Definition: IfxVadc.h:352
IfxVadc_initializeFAdcI
IFX_EXTERN uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI)
Configure the ADC analog clock.
Definition: IfxVadc.c:435
IfxVadc_EmuxSelectValue
IfxVadc_EmuxSelectValue
specifies the External Channel Start select value defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET
Definition: IfxVadc.h:246
IfxVadc_setEmuxGroupSampletime
IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time for external channel.
Definition: IfxVadc.h:2306
IfxVadc_Status_invalidGroup
Invalid group number.
Definition: IfxVadc.h:466
IfxVadc_getQueueSlotPriority
IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG)
Gets the request queue slot priority.
Definition: IfxVadc.h:2059
IfxVadc_InputClasses_global1
Use global class 1.
Definition: IfxVadc.h:318
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxVadc_Protection_channelControl2
Access control for GxCHCTR2.
Definition: IfxVadc.h:345
IfxVadc_getScanSlotGatingMode
IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG)
Gets the request scan slot gating mode.
Definition: IfxVadc.h:2093
IfxVadc_TriggerSource_0
Input signal REQTRx_0.
Definition: IfxVadc.h:487
IfxVadc_BoundaryExtension
IfxVadc_BoundaryExtension
Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:107
IfxVadc_Protection_testFunction
Access control for GLOBTF.
Definition: IfxVadc.h:390
IfxVadc_Status_noError
No error during api execution.
Definition: IfxVadc.h:464
IfxVadc_SrcNr_group0
service request line 0 of group
Definition: IfxVadc.h:448
IfxVadc_RequestSource_scan
scan request
Definition: IfxVadc.h:431
IfxVadc_getDebugResult
IFX_INLINE Ifx_VADC_RESD IfxVadc_getDebugResult(Ifx_VADC_G *group, uint32 resultIdx)
Get debug conversion result.
Definition: IfxVadc.h:2483
IfxVadc_isAutoBackgroundScanEnabled
IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc)
Returns the auto background scan status.
Definition: IfxVadc.h:2155
IfxVadc_BoundaryExtension_fastCompareResult9
Fast compare mode use as upper boundary Channel result 9.
Definition: IfxVadc.h:118
IfxVadc_enableModule
IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc)
Enable VADC kernel.
Definition: IfxVadc.h:1816
IfxVadc_clearChannelRequest
IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId)
Clears the channel request.
Definition: IfxVadc.h:1759
IfxVadc_calculateSampleTime
IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime)
Calculate the time using analog frequency.
Definition: IfxVadc.h:1736
IfxVadc_getGlobalResolution
IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
get global input class resolution
Definition: IfxVadc.h:1980
IfxVadc_Status_channelsStillPending
Conversion for some of the channels are still pending.
Definition: IfxVadc.h:470
IfxVadc_startupCalibration
IFX_EXTERN void IfxVadc_startupCalibration(Ifx_VADC *vadc)
Starts ADC calibration and wait for the end of the calibration process.
Definition: IfxVadc.c:559
IfxVadc_enableFifoMode
IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode)
Enables the FIFO mode.
Definition: IfxVadc.h:1810
IFXVADC_SAMPLETIME_MIN
#define IFXVADC_SAMPLETIME_MIN
Definition: IfxVadc_cfg.h:102
IfxVadc_getScanStatus
IFX_EXTERN IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group)
Gives the scan status for a group.
Definition: IfxVadc.c:352
IfxVadc_Protection_serviceGroup4
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:379
IfxVadc_GatingMode_disabled
Gating is disabled, no conversion request are issued.
Definition: IfxVadc.h:283
u
uint32 min u
Definition: IfxCpu_IntrinsicsDcc.h:143
IfxVadc_getMasterIndex
IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG)
Gets the configured master index.
Definition: IfxVadc.h:2039
IfxVadc_Protection_initGroup12
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:371
IfxVadc_ConversionType_Compatible
Compatible Timing Mode.
Definition: IfxVadc.h:214
uint16
unsigned short uint16
Definition: Platform_Types.h:112
IfxVadc_ChannelResult_7
Use Channel result 7.
Definition: IfxVadc.h:189
IfxVadc_getChannelInputClass
IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Gets the channel input class.
Definition: IfxVadc.h:1910
IfxVadc_SrcNr_group1
service request line 1 of group
Definition: IfxVadc.h:449
IfxVadc_disableModule
IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc)
Disable VADC Module.
Definition: IfxVadc.h:1783
IfxVadc_ChannelResult_8
Use Channel result 8.
Definition: IfxVadc.h:190
IfxVadc_isPostCalibration
IFX_EXTERN boolean IfxVadc_isPostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group)
Return the post calibration status.
Definition: IfxVadc.c:472
IfxVadc_GatingSource_5
Input signal REQGTx_5.
Definition: IfxVadc.h:298
IfxVadc_getBackgroundScanGatingSource
IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc)
Gets the gating input selection.
Definition: IfxVadc.h:1872
IfxVadc_setAnalogConvertControl
IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
Sets analog converter group number.
Definition: IfxVadc.h:2191
IfxVadc_TriggerSource
IfxVadc_TriggerSource
Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
Definition: IfxVadc.h:485
IfxVadc_SrcNr_shared3
Select shared service request line 3.
Definition: IfxVadc.h:455
IfxVadc_getEmuxGroupResolution
IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
get the external channel resolution
Definition: IfxVadc.h:1960
IfxVadc_getResult
IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset...
Definition: IfxVadc.h:2083
IfxVadc_getChannelResultServiceRequestNodePointer1
IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
Gets the channel esult service request node pointer 1.
Definition: IfxVadc.h:1924
IfxVadc_ChannelResult_14
Use Channel result 14.
Definition: IfxVadc.h:196
IfxVadc_GxBfl_Out
VADC Boundary Flag pin mapping structure.
Definition: IfxVadc_PinMap.h:56
IfxVadc_GatingSource_11
Input signal REQGTx_11.
Definition: IfxVadc.h:304
IfxVadc_getChannelServiceRequestNodePointer0
IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
Gets the channel service request node pointer.
Definition: IfxVadc.h:1932
IfxVadc_EmuxSelectValue_1
Start Selection Value 1.
Definition: IfxVadc.h:249
IfxVadc_setChannelInputClass
IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
Sets the channel input class.
Definition: IfxVadc.h:2276
IfxVadc_BoundaryExtension_fastCompareResult10
Fast compare mode use as upper boundary Channel result 10.
Definition: IfxVadc.h:119
IfxVadc_SleepMode
IfxVadc_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_VADC.CLC.B.EDIS.
Definition: IfxVadc.h:438
IfxVadc_setUpperBoundary
IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
Sets group&#39;s upper boundary.
Definition: IfxVadc.h:2453
IfxVadc_getScanSlotStartMode
IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG)
Gets the request scan slot start mode.
Definition: IfxVadc.h:2111
IfxVadc_BoundaryExtension_fastCompareResult2
Fast compare mode use as upper boundary Channel result 2.
Definition: IfxVadc.h:111
IfxVadc_LimitCheck
IfxVadc_LimitCheck
ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:323
IfxVadc_Protection_serviceGroup2
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:377
IfxVadc_ChannelResolution_10bitFast
10-bit cfast compare mode
Definition: IfxVadc.h:175
IfxVadc_GatingSource_7
Input signal REQGTx_7.
Definition: IfxVadc.h:300
IfxVadc_ChannelResult_13
Use Channel result 13.
Definition: IfxVadc.h:195
IfxVadc_ChannelId_3
Channel 3.
Definition: IfxVadc.h:145
IfxVadc_Protection_channelControl3
Access control for GxCHCTR3.
Definition: IfxVadc.h:346
IfxVadc_Protection_externalMultiplexer
Access control for EMUXSEL, GxEMUXCTR.
Definition: IfxVadc.h:358
IfxVadc_BoundaryExtension_fastCompareResult6
Fast compare mode use as upper boundary Channel result 6.
Definition: IfxVadc.h:115
IfxVadc_ChannelResult_2
Use Channel result 2.
Definition: IfxVadc.h:184
IfxScuCcu.h
SCU basic functionality.
IfxVadc_GatingMode_always
Conversion request is issued if at least 1 conversion pending bit is set.
Definition: IfxVadc.h:284
IfxVadc_getGlobalSampleTime
IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
get global input class sample time in sec
Definition: IfxVadc.h:1996
IfxVadc_setSleepMode
IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxVadc.h:2438
IfxVadc_getScanSlotTriggerInput
IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG)
Gets the requested scan slot trigger input.
Definition: IfxVadc.h:2117
IfxVadc_Protection_channelControl8
Access control for GxCHCTR8.
Definition: IfxVadc.h:351
IfxVadc_Protection_resultRegisterGroup14
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:405
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:190
IfxVadc_Protection_initGroup11
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:370
IfxVadc_InputClasses_group1
Use group class 1.
Definition: IfxVadc.h:316
IfxVadc_initGxBflPin
IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a GxBFL output.
Definition: IfxVadc.h:2142
IfxVadc_setResultPosition
IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
Sets result store position.
Definition: IfxVadc.h:2410
IfxVadc_TriggerMode_uponFallingEdge
Trigger event upon a falling edge.
Definition: IfxVadc.h:478
IfxVadc_getAdcCalibrationActiveState
IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum)
gets ADC Calibration Flag CAL status.
Definition: IfxVadc.h:1844
IfxVadc_GatingMode_gatingLow
Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is low...
Definition: IfxVadc.h:286
IfxVadc_enableServiceRequest
IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
Definition: IfxVadc.h:1838
IfxVadc_getAdcAnalogFrequency
IFX_EXTERN float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc)
Returns the configured Fadci VADC analog clock frequency in Hz.
Definition: IfxVadc.c:180
IfxVadc_ChannelResolution_12bit
12-bit conversion
Definition: IfxVadc.h:172
IfxVadc_configExternalMultiplexerMode
IFX_EXTERN void IfxVadc_configExternalMultiplexerMode(Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle)
Definition: IfxVadc.c:52
IfxVadc_ChannelId_4
Channel 4.
Definition: IfxVadc.h:146
IfxVadc_GroupId
IfxVadc_GroupId
VADC Groups
Definition: IfxVadc_cfg.h:116
IfxVadc_RequestSlotStartMode
IfxVadc_RequestSlotStartMode
Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
Definition: IfxVadc.h:420
IfxVadc_getGlobalConfigValue
IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc)
Gets the global control configuration value.
Definition: IfxVadc.h:1972
IfxVadc_ChannelReference_standard
use Varef as reference
Definition: IfxVadc.h:164
IfxVadc_EmuxInterface_1
Emux Interface 1.
Definition: IfxVadc.h:231
IfxVadc_getScanSlotTriggerMode
IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG)
Gets the requested scan slot trigger mode.
Definition: IfxVadc.h:2123
IfxVadc_ArbitrationRounds_20_slots
An arbitration round contains 20 arbitration slots.
Definition: IfxVadc.h:102
IfxVadc_Protection_resultRegisterGroup8
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:399
IfxVadc_Protection_initGroup5
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:364
IfxVadc_enableBackgroundScanSlotExternalTrigger
IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc)
Enables the background sacn external trigger.
Definition: IfxVadc.h:1804
IfxVadc_BoundaryExtension_standard
Boundary Standard mode. BNDSELU/BNDSELL as Boundaries.
Definition: IfxVadc.h:109
IfxVadc_Protection_resultRegisterGroup4
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:395
IfxVadc_SrcNr_group3
service request line 3 of group
Definition: IfxVadc.h:451
IfxVadc_setScanSlotTriggerConfig
IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the scan slot trigger operating configurations.
Definition: IfxVadc.h:2427
IfxVadc_LowSupplyVoltageSelect_5V
5V Power Supply is Connected
Definition: IfxVadc.h:335
IfxVadc_Protection_resultRegisterGroup12
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:403
IfxVadc_ChannelId_12
Channel 12.
Definition: IfxVadc.h:154
IfxVadc_Protection_serviceGroup8
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:383
IfxVadc_TriggerSource_1
Input signal REQTRx_1.
Definition: IfxVadc.h:488
IfxVadc_Status_notInitialised
Appropriate initialisation not done.
Definition: IfxVadc.h:465
IfxVadc_Protection_channelControl13
Access control for GxCHCTR13.
Definition: IfxVadc.h:356
IfxVadc_ChannelResult_6
Use Channel result 6.
Definition: IfxVadc.h:188
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:418
IfxVadc_ChannelResult_0
Use Channel result 0.
Definition: IfxVadc.h:182
IfxVadc_AnalogConverterMode
IfxVadc_AnalogConverterMode
Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC.
Definition: IfxVadc.h:87
IfxVadc_getQueueSlotTriggerMode
IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG)
Gets the requested queue slot trigger mode.
Definition: IfxVadc.h:2077
IfxVadc_AnalogConverterMode_fastStandby
Fast Standby Mode.
Definition: IfxVadc.h:91
IfxVadc_getChannelControlConfig
IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Gets the current ADC channel control configurations.
Definition: IfxVadc.h:1902
IfxVadc_getQueueSlotGatingMode
IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG)
Gets the requested queue slot gating mode.
Definition: IfxVadc.h:2047
IfxVadc_disableScanSlotExternalTrigger
IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
Disables the scan slot external trigger.
Definition: IfxVadc.h:1798
IfxVadc_getAdcModuleFrequency
IFX_EXTERN float32 IfxVadc_getAdcModuleFrequency(void)
Module Frequency in Hz.
Definition: IfxVadc.c:192
IfxVadc_Status
IfxVadc_Status
API return values defined in MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U MODULE_VADC.BRSPNDx
Definition: IfxVadc.h:462
IfxVadc_Protection_initGroup7
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:366
IfxVadc_setLowerBoundary
IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
Sets group&#39;s lower boundary.
Definition: IfxVadc.h:2355
IfxVadc_enableQueueSlotExternalTrigger
IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
Enables the external trigger.
Definition: IfxVadc.h:1826
IfxVadc_isAutoScanEnabled
IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG)
Gets the auto scan enable status.
Definition: IfxVadc.h:2161
IfxVadc_RequestSlotStartMode_waitForStart
Wait for start.
Definition: IfxVadc.h:422
IfxVadc_getGroupSampleTime
IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the ADC input class channel sample time.
Definition: IfxVadc.h:2026
IfxVadc_Protection_serviceGroup1
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:376
IfxVadc_getChannelConversionTime
IFX_EXTERN float32 IfxVadc_getChannelConversionTime(Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode)
get channel conversion timing
Definition: IfxVadc.c:219
IfxVadc_resetKernel
IFX_EXTERN void IfxVadc_resetKernel(Ifx_VADC *vadc)
Resets the kernel.
Definition: IfxVadc.c:494
IfxVadc_Protection_serviceGroup9
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:384
IfxVadc_GatingSource_1
Input signal REQGTx_1.
Definition: IfxVadc.h:294
IfxVadc_GatingSource_15
Input signal REQGTx_15.
Definition: IfxVadc.h:308
IfxVadc_RequestSlotStartMode_cancelInjectRepeat
Cancel-Inject-Repeat.
Definition: IfxVadc.h:423
IfxVadc_clearQueue
IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue)
Clears all the queue entries including backup stage.
Definition: IfxVadc.h:1765
IfxVadc_BoundaryExtension_fastCompareResult7
Fast compare mode use as upper boundary Channel result 7.
Definition: IfxVadc.h:116
disable
void disable
Definition: IfxCpu_IntrinsicsDcc.h:465
IfxVadc_TriggerSource_8
Input signal REQTRx_8.
Definition: IfxVadc.h:495
IfxVadc_RequestSlotPriority_highest
Highest priority.
Definition: IfxVadc.h:415
IfxVadc_ChannelId_none
None of VADC channels.
Definition: IfxVadc.h:141
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxVadc_ExternalMultiplexerMode_steady
select steady mode
Definition: IfxVadc.h:264
IfxVadc_ChannelId_8
Channel 8.
Definition: IfxVadc.h:150
IfxVadc_initialiseAdcConverterClock
IFX_EXTERN void IfxVadc_initialiseAdcConverterClock(Ifx_VADC *vadc, uint32 converterClockDivider)
Initialises the ADC Converter clock.
Definition: IfxVadc.c:407
IfxVadc_GatingSource
IfxVadc_GatingSource
External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
Definition: IfxVadc.h:291
IfxVadc_configureWaitForReadMode
IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
access function to enable/disable wait for read mode for result registers
Definition: IfxVadc.h:1771
IfxVadc_Emux_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxVadc_PinMap.h:69
IfxVadc_setSyncRequest
IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
Sets channel synchronization request.
Definition: IfxVadc.h:2447
IfxVadc_SrcNr
IfxVadc_SrcNr
Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
Definition: IfxVadc.h:446
IfxVadc_TriggerSource_11
Input signal REQTRx_11.
Definition: IfxVadc.h:498
IfxVadc_enableAccess
IFX_EXTERN void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Enable write access to the VADC config/control registers.
Definition: IfxVadc.c:111
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:584
IfxVadc_Protection_initGroup0
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:359
IfxVadc_ChannelId_7
Channel 7.
Definition: IfxVadc.h:149
IfxVadc_TriggerSource_13
Input signal REQTRx_13.
Definition: IfxVadc.h:500
IfxVadc_setEmuxGlobalResolution
IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
set the external channel resolution of Global class
Definition: IfxVadc.h:2288
IfxVadc_initializeFAdcD
IFX_EXTERN uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD)
Configure the FadcD vadc digital clock.
Definition: IfxVadc.c:419
IfxVadc_AnalogConverterMode_off
Analog Converter off.
Definition: IfxVadc.h:89
IfxVadc_ChannelId_2
Channel 2.
Definition: IfxVadc.h:144
IfxVadc_getBackgroundScanTriggerInput
IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc)
Gets the background scan trigger input.
Definition: IfxVadc.h:1890
IfxVadc_SleepMode_disable
disables sleep mode
Definition: IfxVadc.h:441
IfxVadc_GatingSource_13
Input signal REQGTx_13.
Definition: IfxVadc.h:306
IfxVadc_configureWaitForReadModeForGlobalResultRegister
IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead)
access function to enable/disable wait for read mode for global result register
Definition: IfxVadc.h:1777
IfxVadc_Protection_initGroup2
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:361
IfxVadc_selectPowerSupplyVoltage
IFX_EXTERN void IfxVadc_selectPowerSupplyVoltage(Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage)
Select Low Power Supply Voltage.
Definition: IfxVadc.c:515
IfxVadc_BoundaryExtension_fastCompareResult8
Fast compare mode use as upper boundary Channel result 8.
Definition: IfxVadc.h:117


iLLD_TC26B: IfxVadc_Adc.c Source File

  • Vadc
  • Adc
IfxVadc_Adc.c
Go to the documentation of this file.
1 /**
2 * \file IfxVadc_Adc.c
3 * \brief VADC ADC details
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxVadc_Adc.h"
47
48 /** \addtogroup IfxLld_Vadc_Adc_Group
49 * \{ */
50 /******************************************************************************/
51 /*------------------------Inline Function Prototypes--------------------------*/
52 /******************************************************************************/
53
54 /** \brief Gets the master id
55 * \param slave Index of the group
56 * \param masterIndex master kernel index
57 * \return Master Group Id
58 */
59 IFX_INLINE IfxVadc_GroupId IfxVadc_Adc_getMasterId(IfxVadc_GroupId slave, IfxVadc_Adc_SYNCTR_STSEL masterIndex);
60
61 /** \brief Gets the current master kernel index.
62 * \param slave Index of the group
63 * \param master Index of the group
64 * \return current master kernel index
65 */
66 IFX_INLINE IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_getMasterKernelIndex(IfxVadc_GroupId slave, IfxVadc_GroupId master);
67
68 /** \} */
69
70 /** \addtogroup IfxLld_Vadc_Adc_Variables
71 * \{ */
72
73 /******************************************************************************/
74 /*------------------------Private Variables/Constants-------------------------*/
75 /******************************************************************************/
76
77 IFX_STATIC IFX_CONST IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_masterIndex[IFXVADC_NUM_ADC_CAL_GROUPS][IFXVADC_NUM_ADC_CAL_GROUPS] = {
78 /* 0 1 2 3 */
79 {0, 1, 2, 3}, /* Grp 0 */
80 {1, 0, 2, 3}, /* Grp 1 */
81 {1, 2, 0, 3}, /* Grp 2 */
82 {1, 2, 3, 0} /* Grp 3 */
83 };
84
85 /** \} */
86
87 /******************************************************************************/
88 /*---------------------Inline Function Implementations------------------------*/
89 /******************************************************************************/
90
91 IFX_INLINE IfxVadc_GroupId IfxVadc_Adc_getMasterId(IfxVadc_GroupId slave, IfxVadc_Adc_SYNCTR_STSEL masterIndex)
92 {
93 uint8 i, idxOffset;
94 IfxVadc_GroupId masterId = slave;
95
96 if (masterIndex == 0)
97 {
98 masterId = slave;
99 }
100 else
101 {
102 idxOffset = (slave < 4) ? 0 : 4; /* 4 is the index in the above IfxVadc_Adc_masterIndex about which symmetry is observed */
103
104 for (i = 0; i < 4; i++)
105 {
106 if (IfxVadc_Adc_masterIndex[slave][i + idxOffset] == masterIndex)
107 {
108 return (IfxVadc_GroupId)(i + idxOffset);
109 }
110 }
111 }
112
113 return masterId;
114 }
115
116
117 IFX_INLINE IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_getMasterKernelIndex(IfxVadc_GroupId slave, IfxVadc_GroupId master)
118 {
119 return IfxVadc_Adc_masterIndex[slave][master];
120 }
121
122
123 /******************************************************************************/
124 /*-------------------------Function Implementations---------------------------*/
125 /******************************************************************************/
126
127 void IfxVadc_Adc_deInitGroup(IfxVadc_Adc_Group *group)
128 {
129 Ifx_VADC *vadc = IfxVadc_Adc_getVadcFromGroup(group);
130 Ifx_VADC_G *vadcG = IfxVadc_Adc_getGroupRegsFromGroup(group);
131 /* Get group index */
132 IfxVadc_GroupId groupIndex = group->groupId;
133
134 /* Request Access to configuration registers */
135 IfxVadc_enableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
136 IfxVadc_resetGroup(vadcG);
137 IfxVadc_disableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
138 }
139
140
141 void IfxVadc_Adc_disableModule(Ifx_VADC *vadc)
142 {
143 IfxVadc_disableModule(vadc);
144 }
145
146
147 void IfxVadc_Adc_getChannelConfig(IfxVadc_Adc_Channel *channel, IfxVadc_Adc_ChannelConfig *config)
148 {
149 Ifx_VADC_G *vadcG = IfxVadc_Adc_getGroupRegsFromGroup(channel->group);
150 IfxVadc_ChannelId channelIndex = channel->channel;
151
152 config->channelId = channel->channel;
153 config->group = channel->group;
154
155 Ifx_VADC_CHCTR tempChctr;
156 tempChctr.U = 0;
157 tempChctr = IfxVadc_getChannelControlConfig(vadcG, channelIndex);
158
159 config->inputClass = (IfxVadc_InputClasses)tempChctr.B.ICLSEL;
160 config->reference = (IfxVadc_ChannelReference)tempChctr.B.REFSEL;
161 config->resultRegister = (IfxVadc_ChannelResult)tempChctr.B.RESREG;
162 config->globalResultUsage = tempChctr.B.RESTBS;
163 config->lowerBoundary = (IfxVadc_BoundarySelection)tempChctr.B.BNDSELL;
164 config->upperBoundary = (IfxVadc_BoundarySelection)tempChctr.B.BNDSELU;
165 config->boundaryMode = (IfxVadc_BoundaryExtension)tempChctr.B.BNDSELX;
166 config->limitCheck = (IfxVadc_LimitCheck)tempChctr.B.CHEVMODE;
167 config->synchonize = tempChctr.B.SYNC;
168 config->rightAlignedStorage = tempChctr.B.RESPOS;
169
170 config->backgroundChannel = ((IfxVadc_getAssignedChannels(vadcG)).U & (1 << channelIndex)) ? FALSE : TRUE;
171 uint32 channelServiceRequestNodePtr;
172 /* Get Channel index */
173 IfxVadc_GroupId groupIndex = channel->group->groupId;
174
175 if (config->channelId < IfxVadc_ChannelId_8)
176 {
177 channelServiceRequestNodePtr = ((IfxVadc_getChannelServiceRequestNodePointer0(vadcG)).U >> (channel->channel * 4)) & 0xF;
178 }
179 else
180 {
181 channelServiceRequestNodePtr = ((IfxVadc_getChannelServiceRequestNodePointer1(vadcG)).U >> ((channel->channel - IfxVadc_ChannelId_8) * 4)) & 0xF;
182 }
183
184 volatile Ifx_SRC_SRCR *src = IfxVadc_getSrcAddress(groupIndex, (IfxVadc_SrcNr)channelServiceRequestNodePtr);
185
186 if (src->B.SRE == 1)
187 {
188 config->channelSrcNr = (IfxVadc_SrcNr)channelServiceRequestNodePtr;
189 config->channelPriority = (Ifx_Priority)src->B.SRPN;
190 config->channelServProvider = (IfxSrc_Tos)src->B.TOS;
191 }
192 else
193 {
194 config->channelSrcNr = (IfxVadc_SrcNr)0;
195 config->channelPriority = (Ifx_Priority)0;
196 config->channelServProvider = (IfxSrc_Tos)0;
197 }
198
199 uint32 resultServiceRequestNodePtr;
200
201 if (config->resultRegister < IfxVadc_ChannelResult_8)
202 {
203 resultServiceRequestNodePtr = ((IfxVadc_getChannelResultServiceRequestNodePointer0(vadcG)).U >> (channel->channel * 4)) & 0xF;
204 }
205 else
206 {
207 resultServiceRequestNodePtr = ((IfxVadc_getChannelResultServiceRequestNodePointer1(vadcG)).U >> ((channel->channel - IfxVadc_ChannelResult_8) * 4)) & 0xF;
208 }
209
210 src = IfxVadc_getSrcAddress(groupIndex, resultServiceRequestNodePtr);
211
212 if (src->B.SRE == 1)
213 {
214 config->resultSrcNr = (IfxVadc_SrcNr)resultServiceRequestNodePtr;
215 config->resultPriority = (Ifx_Priority)src->B.SRPN;
216 config->resultServProvider = (IfxSrc_Tos)src->B.TOS;
217 }
218 else
219 {
220 config->resultSrcNr = (IfxVadc_SrcNr)0;
221 config->resultPriority = (Ifx_Priority)0;
222 config->resultServProvider = (IfxSrc_Tos)0;
223 }
224 }
225
226
227 float32 IfxVadc_Adc_getChannelConversionTime(IfxVadc_Adc_Channel *channel, IfxVadc_ConversionType conversionMode)
228 {
229 return IfxVadc_getChannelConversionTime(channel->group->module.vadc, channel->group->groupId, IfxVadc_getChannelInputClass(channel->group->group, channel->channel), IfxVadc_getAdcAnalogFrequency(channel->group->module.vadc), IfxVadc_getAdcModuleFrequency(), conversionMode);
230 }
231
232
233 void IfxVadc_Adc_getGroupConfig(IfxVadc_Adc_Group *group, IfxVadc_Adc_GroupConfig *config)
234 {
235 uint8 inputClassNum;
236 Ifx_VADC_G *vadcG = group->group;
237 Ifx_VADC *vadc = group->module.vadc;
238 float32 analogFrequency = IfxVadc_getAdcAnalogFrequency(vadc);
239
240 config->groupId = group->groupId;
241 config->module = &group->module;
242
243 config->arbiter.arbiterRoundLength = IfxVadc_getArbiterRoundLength(vadcG);
244
245 for (inputClassNum = 0; inputClassNum < IFXVADC_NUM_INPUTCLASSES; inputClassNum++)
246 {
247 config->inputClass[inputClassNum].resolution = IfxVadc_getGroupResolution(vadcG, inputClassNum);
248 config->inputClass[inputClassNum].sampleTime = IfxVadc_getGroupSampleTime(vadcG, inputClassNum, analogFrequency);
249 }
250
251 if (IfxVadc_isRequestScanSlotEnabled(vadcG) == TRUE)
252 {
253 config->arbiter.requestSlotScanEnabled = TRUE;
254 config->scanRequest.requestSlotPrio = IfxVadc_getScanSlotPriority(vadcG);
255 config->scanRequest.requestSlotStartMode = IfxVadc_getScanSlotStartMode(vadcG);
256
257 config->scanRequest.triggerConfig.triggerSource = IfxVadc_getScanSlotTriggerInput(vadcG);
258 config->scanRequest.triggerConfig.triggerMode = IfxVadc_getScanSlotTriggerMode(vadcG);
259
260 if (config->scanRequest.triggerConfig.triggerSource != IfxVadc_TriggerSource_15)
261 {
262 config->scanRequest.triggerConfig.gatingMode = IfxVadc_getScanSlotGatingMode(vadcG);
263 }
264 else if (config->scanRequest.triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
265 {
266 config->scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
267 }
268
269 config->scanRequest.triggerConfig.gatingSource = IfxVadc_getScanSlotGatingSource(vadcG);
270 config->scanRequest.autoscanEnabled = IfxVadc_isAutoScanEnabled(vadcG);
271 }
272 else
273 {
274 config->scanRequest.autoscanEnabled = FALSE;
275 config->scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_disabled;
276 config->scanRequest.triggerConfig.gatingSource = IfxVadc_GatingSource_0; /* Use CCU6061 TRIG0 */
277 config->scanRequest.triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger;
278 config->scanRequest.triggerConfig.triggerSource = IfxVadc_TriggerSource_0; /* Trigger source taken from Gating Input */
279 }
280
281 if (IfxVadc_isRequestQueueSlotEnabled(vadcG) == TRUE)
282 {
283 config->arbiter.requestSlotQueueEnabled = TRUE;
284 config->queueRequest.requestSlotPrio = IfxVadc_getQueueSlotPriority(vadcG);
285 config->queueRequest.requestSlotStartMode = IfxVadc_getQueueSlotStartMode(vadcG);
286
287 config->queueRequest.triggerConfig.triggerSource = IfxVadc_getQueueSlotTriggerInput(vadcG);
288 config->queueRequest.triggerConfig.triggerMode = IfxVadc_getQueueSlotTriggerMode(vadcG);
289
290 if (config->queueRequest.triggerConfig.triggerSource != IfxVadc_TriggerSource_15)
291 {
292 config->queueRequest.triggerConfig.gatingMode = IfxVadc_getQueueSlotGatingMode(vadcG);
293 }
294 else if (config->queueRequest.triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
295 {
296 config->queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
297 }
298
299 config->queueRequest.triggerConfig.gatingSource = IfxVadc_getQueueSlotGatingSource(vadcG);
300 config->queueRequest.flushQueueAfterInit = FALSE;
301 }
302 else
303 {
304 config->queueRequest.flushQueueAfterInit = FALSE;
305 config->queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_disabled;
306 config->queueRequest.triggerConfig.gatingSource = IfxVadc_GatingSource_0; /* Use CCU6061 TRIG0 */
307 config->queueRequest.triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger;
308 config->queueRequest.triggerConfig.triggerSource = IfxVadc_TriggerSource_0; /* Trigger source taken from Gating Input */
309 }
310
311 if (IfxVadc_isRequestBackgroundScanSlotEnabled(vadcG) == TRUE)
312 {
313 config->arbiter.requestSlotBackgroundScanEnabled = TRUE;
314 config->backgroundScanRequest.requestSlotPrio = IfxVadc_getBackgroundScanSlotPriority(vadcG);
315 config->backgroundScanRequest.requestSlotStartMode = IfxVadc_getBackgroundScanSlotStartMode(vadcG);
316
317 config->backgroundScanRequest.triggerConfig.triggerSource = IfxVadc_getBackgroundScanTriggerInput(vadc);
318 config->backgroundScanRequest.triggerConfig.triggerMode = IfxVadc_getBackgroundScanTriggerMode(vadc);
319
320 if (config->backgroundScanRequest.triggerConfig.triggerSource != IfxVadc_TriggerSource_15)
321 {
322 config->backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_getBackgroundScanGatingMode(vadc);
323 }
324 else if (config->backgroundScanRequest.triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
325 {
326 config->backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
327 }
328
329 config->backgroundScanRequest.triggerConfig.gatingSource = IfxVadc_getBackgroundScanGatingSource(vadc);
330 config->backgroundScanRequest.autoBackgroundScanEnabled = IfxVadc_isAutoBackgroundScanEnabled(vadc);
331 }
332 else
333 {
334 config->backgroundScanRequest.autoBackgroundScanEnabled = FALSE;
335 config->backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_disabled;
336 config->backgroundScanRequest.triggerConfig.gatingSource = IfxVadc_GatingSource_0; /* Use CCU6061 TRIG0 */
337 config->backgroundScanRequest.triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger;
338 config->backgroundScanRequest.triggerConfig.triggerSource = IfxVadc_TriggerSource_0; /* Trigger source taken from Gating Input */
339 }
340
341 config->master = IfxVadc_Adc_getMasterId(group->groupId, IfxVadc_getMasterIndex(vadcG));
342
343 config->disablePostCalibration = ((IfxVadc_getGlobalConfigValue(vadc)).U >> (IFX_VADC_GLOBCFG_DPCAL0_OFF + group->groupId)) & 0x1;
344 }
345
346
347 IfxVadc_Status IfxVadc_Adc_initChannel(IfxVadc_Adc_Channel *channel, const IfxVadc_Adc_ChannelConfig *config)
348 {
349 IfxVadc_Status Status = IfxVadc_Status_noError;
350 Ifx_VADC *vadc = IfxVadc_Adc_getVadcFromGroup(config->group);
351 Ifx_VADC_G *vadcG = IfxVadc_Adc_getGroupRegsFromGroup(config->group);
352
353 channel->group = config->group;
354 IfxVadc_GroupId groupIndex = channel->group->groupId;
355 IfxVadc_ChannelId channelIndex = config->channelId;
356
357 /* Request Access to configuration registers */
358 IfxVadc_enableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_channelControl0 + groupIndex));
359
360 /* Configure Channel */
361 {
362 IfxVadc_setReferenceInput(vadcG, channelIndex, config->reference);
363 IfxVadc_storeGroupResult(vadcG, channelIndex, config->resultRegister);
364 IfxVadc_setLowerBoundary(vadcG, channelIndex, config->lowerBoundary);
365 IfxVadc_setUpperBoundary(vadcG, channelIndex, config->upperBoundary);
366 IfxVadc_setSyncRequest(vadcG, channelIndex, config->synchonize);
367 IfxVadc_setChannelInputClass(vadcG, channelIndex, config->inputClass);
368 IfxVadc_setChannelLimitCheckMode(vadcG, channelIndex, config->limitCheck);
369 IfxVadc_setResultPosition(vadcG, channelIndex, config->rightAlignedStorage);
370 IfxVadc_setBackgroundResultTarget(vadcG, channelIndex, config->globalResultUsage);
371 IfxVadc_setBoundaryMode(vadcG, channelIndex, config->boundaryMode);
372 }
373
374 IfxVadc_enableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
375
376 if (config->backgroundChannel == FALSE)
377 {
378 IfxVadc_setGroupPriorityChannel(vadcG, channelIndex);
379 }
380 else
381 {
382 IfxVadc_setBackgroundPriorityChannel(vadcG, channelIndex);
383 }
384
385 IfxVadc_disableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
386
387 if (config->channelId < IfxVadc_ChannelId_8)
388 {
389 IfxVadc_setChannelEventNodePointer0(vadcG, config->channelSrcNr, channel->channel);
390 }
391 else
392 {
393 IfxVadc_setChannelEventNodePointer1(vadcG, config->channelSrcNr, channel->channel);
394 }
395
396 if (config->channelPriority > 0)
397 {
398 volatile Ifx_SRC_SRCR *src = IfxVadc_getSrcAddress(groupIndex, config->channelSrcNr);
399
400 IfxVadc_clearChannelRequest(vadcG, config->channelId);
401 IfxSrc_init(src, config->channelServProvider, config->channelPriority);
402 IfxSrc_enable(src);
403 }
404 else
405 {
406 /* do nothing */
407 }
408
409 if (config->resultRegister < IfxVadc_ChannelResult_8)
410 {
411 IfxVadc_setResultNodeEventPointer0(vadcG, config->resultSrcNr, config->resultRegister);
412 }
413 else
414 {
415 IfxVadc_setResultNodeEventPointer1(vadcG, config->resultSrcNr, config->resultRegister);
416 }
417
418 if (config->resultPriority > 0)
419 {
420 volatile Ifx_SRC_SRCR *src = IfxVadc_getSrcAddress(groupIndex, config->resultSrcNr);
421
422 IfxVadc_enableServiceRequest(vadcG, config->resultRegister);
423 IfxVadc_clearAllResultRequests(vadcG);
424 IfxSrc_init(src, config->resultServProvider, config->resultPriority);
425 IfxSrc_enable(src);
426 }
427 else
428 {
429 /* do nothing */
430 }
431
432 IfxVadc_disableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_channelControl0 + groupIndex));
433 /* Software initialization */
434 channel->resultreg = config->resultRegister;
435 channel->channel = config->channelId;
436
437 return Status;
438 }
439
440
441 void IfxVadc_Adc_initChannelConfig(IfxVadc_Adc_ChannelConfig *config, const IfxVadc_Adc_Group *group)
442 {
443 static const IfxVadc_Adc_ChannelConfig IfxVadc_Adc_defaultChannelConfig = {
444 .channelId = IfxVadc_ChannelId_0,
445 .group = NULL_PTR,
446 .inputClass = IfxVadc_InputClasses_group0,
447 .reference = IfxVadc_ChannelReference_standard,
448 .resultRegister = IfxVadc_ChannelResult_0,
449 .globalResultUsage = FALSE,
450 .lowerBoundary = IfxVadc_BoundarySelection_group0,
451 .upperBoundary = IfxVadc_BoundarySelection_group0,
452 .boundaryMode = IfxVadc_BoundaryExtension_standard,
453 .limitCheck = IfxVadc_LimitCheck_noCheck,
454 .synchonize = FALSE,
455 .backgroundChannel = FALSE,
456 .rightAlignedStorage = FALSE,
457 .resultPriority = 0,
458 .resultSrcNr = IfxVadc_SrcNr_group0,
459 .resultServProvider = IfxSrc_Tos_cpu0,
460 .channelPriority = 0,
461 .channelSrcNr = IfxVadc_SrcNr_group0,
462 .channelServProvider = IfxSrc_Tos_cpu0
463 };
464 *config = IfxVadc_Adc_defaultChannelConfig;
465 config->group = group;
466 }
467
468
469 IfxVadc_Status IfxVadc_Adc_initGroup(IfxVadc_Adc_Group *group, const IfxVadc_Adc_GroupConfig *config)
470 {
471 IfxVadc_Status status = IfxVadc_Status_noError;
472 Ifx_VADC *vadc = config->module->vadc;
473 Ifx_VADC_G *vadcG = &vadc->G[config->groupId];
474
475 /* check for write access */
476 group->group = vadcG;
477 group->module = *config->module;
478 IfxVadc_GroupId groupIndex = config->groupId;
479 group->groupId = groupIndex;
480 float32 analogFrequency = IfxVadc_getAdcAnalogFrequency(vadc);
481
482 uint8 inputClassNum;
483
484 /* Request Access to configuration registers */
485 IfxVadc_enableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
486
487 if (config->arbiter.requestSlotQueueEnabled == TRUE)
488 {
489 /* Enable Arbiter slot, set Priority and start mode */
490 IfxVadc_setArbiterPriority(vadcG, config->arbiter.requestSlotQueueEnabled, config->queueRequest.requestSlotPrio, config->queueRequest.requestSlotStartMode, IfxVadc_RequestSource_queue);
491 }
492 else
493 {
494 /* Disable the slot */
495 IfxVadc_setArbiterPriority(vadcG, FALSE, IfxVadc_RequestSlotPriority_lowest, IfxVadc_RequestSlotStartMode_waitForStart, IfxVadc_RequestSource_queue);
496 }
497
498 if (config->arbiter.requestSlotScanEnabled == TRUE)
499 {
500 /* Setup Arbitration priority and turn on enabled slot */
501 /* Enable Arbiter slot, set Priority and start mode */
502 IfxVadc_setArbiterPriority(vadcG, config->arbiter.requestSlotScanEnabled, config->scanRequest.requestSlotPrio, config->scanRequest.requestSlotStartMode, IfxVadc_RequestSource_scan);
503 }
504 else
505 {
506 /* Disable the slot */
507 IfxVadc_setArbiterPriority(vadcG, FALSE, IfxVadc_RequestSlotPriority_lowest, IfxVadc_RequestSlotStartMode_waitForStart, IfxVadc_RequestSource_scan);
508 }
509
510 if (config->arbiter.requestSlotBackgroundScanEnabled == TRUE)
511 {
512 /* Setup Arbitration priority and turn on enabled slot */
513 /* Enable Arbiter slot, set Priority and start mode */
514 IfxVadc_setArbiterPriority(vadcG, config->arbiter.requestSlotBackgroundScanEnabled, config->backgroundScanRequest.requestSlotPrio, config->backgroundScanRequest.requestSlotStartMode, IfxVadc_RequestSource_background);
515 }
516 else
517 {
518 /* Disable the slot */
519 IfxVadc_setArbiterPriority(vadcG, FALSE, IfxVadc_RequestSlotPriority_lowest, IfxVadc_RequestSlotStartMode_waitForStart, IfxVadc_RequestSource_background);
520 }
521
522 /* master slave configuration */
523 if (config->master != groupIndex)
524 {
525 uint8 masterIndex = IfxVadc_Adc_getMasterKernelIndex(groupIndex, config->master);
526 IfxVadc_setMasterIndex(vadcG, masterIndex);
527 }
528 else
529 {
530 /* do nothing */
531 }
532
533 /* Setup arbiter */
534 /* turn off the group during initialization, see UM for sync mode */
535 IfxVadc_setAnalogConvertControl(vadcG, IfxVadc_AnalogConverterMode_off);
536
537 IfxVadc_setArbitrationRoundLength(vadcG, config->arbiter.arbiterRoundLength);
538
539 /* Setup queue request if enabled */
540 if (config->arbiter.requestSlotQueueEnabled == TRUE)
541 {
542 const IfxVadc_Adc_QueueConfig *queueSlot = &config->queueRequest;
543
544 /* configure external Trigger if enabled */
545 if (queueSlot->triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
546 {
547 /* enable external trigger */
548 IfxVadc_enableQueueSlotExternalTrigger(vadcG);
549 IfxVadc_setQueueSlotTriggerOperatingConfig(vadcG, queueSlot->triggerConfig.triggerMode, queueSlot->triggerConfig.triggerSource);
550
551 /* if last input is used the trigger input selection is extend by Gating inputs */
552 if (queueSlot->triggerConfig.triggerSource == IfxVadc_TriggerSource_15)
553 {
554 IfxVadc_setQueueSlotGatingConfig(vadcG, queueSlot->triggerConfig.gatingSource, IfxVadc_GatingMode_always);
555 }
556 else
557 {
558 /* do nothing, gating is configured later */
559 }
560 }
561 else
562 {
563 /* disable external trigger */
564 IfxVadc_disableQueueSlotExternalTrigger(vadcG);
565 }
566
567 /* configure Gating if enabled */
568 if ((queueSlot->triggerConfig.triggerSource != IfxVadc_TriggerSource_15))
569 {
570 IfxVadc_setQueueSlotGatingConfig(vadcG, queueSlot->triggerConfig.gatingSource, queueSlot->triggerConfig.gatingMode);
571 }
572 else
573 {
574 /* do nothing, handled by trigger settings */
575 }
576
577 IfxVadc_clearQueue(vadcG, (queueSlot->flushQueueAfterInit) ? 1 : 0);
578 }
579 else
580 {
581 /* do nothing */
582 }
583
584 /* Setup scan request if enabled */
585 if (config->arbiter.requestSlotScanEnabled == TRUE)
586 {
587 const IfxVadc_Adc_ScanConfig *scanSlot = &config->scanRequest;
588
589 /* configure external Trigger if enabled */
590 if (scanSlot->triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
591 {
592 /* enable external trigger */
593 IfxVadc_enableScanSlotExternalTrigger(vadcG);
594
595 IfxVadc_setScanSlotTriggerConfig(vadcG, scanSlot->triggerConfig.triggerMode, scanSlot->triggerConfig.triggerSource);
596
597 if (scanSlot->triggerConfig.triggerSource == IfxVadc_TriggerSource_15) /* if last input is used the trigger input selection is extend by Gating inputs */
598 {
599 IfxVadc_setScanSlotGatingConfig(vadcG, scanSlot->triggerConfig.gatingSource, IfxVadc_GatingMode_always);
600 }
601 else
602 {
603 /* do nothing, gating is configured later */
604 }
605 }
606 else
607 {
608 IfxVadc_disableScanSlotExternalTrigger(vadcG);
609 }
610
611 /* configure Gating if enabled */
612 if ((scanSlot->triggerConfig.triggerSource != IfxVadc_TriggerSource_15))
613 {
614 IfxVadc_setScanSlotGatingConfig(vadcG, scanSlot->triggerConfig.gatingSource, scanSlot->triggerConfig.gatingMode);
615 }
616 else
617 {
618 /* do nothing, handled by trigger settings */
619 }
620
621 IfxVadc_setAutoScan(vadcG, scanSlot->autoscanEnabled ? 1 : 0);
622 }
623 else
624 {
625 /* do nothing */
626 }
627
628 if (config->arbiter.requestSlotBackgroundScanEnabled == TRUE)
629 {
630 const IfxVadc_Adc_BackgroundScanConfig *backgroundScanSlot = &config->backgroundScanRequest;
631
632 /* configure external Trigger if enabled */
633 if (backgroundScanSlot->triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
634 {
635 IfxVadc_enableBackgroundScanSlotExternalTrigger(vadc);
636
637 IfxVadc_setBackgroundScanSlotTriggerConfig(vadc, backgroundScanSlot->triggerConfig.triggerMode, backgroundScanSlot->triggerConfig.triggerSource);
638
639 if (backgroundScanSlot->triggerConfig.triggerSource == IfxVadc_TriggerSource_15) /* if last input is used the trigger input selection is extend by Gating inputs */
640 {
641 IfxVadc_setBackgroundScanSlotGatingConfig(vadc, backgroundScanSlot->triggerConfig.gatingSource, IfxVadc_GatingMode_always);
642 }
643 else
644 {
645 /* do nothing, gating is configured later */
646 }
647 }
648 else
649 {
650 /* do nothing */
651 }
652
653 /* configure Gating if enabled */
654 if ((backgroundScanSlot->triggerConfig.triggerSource != IfxVadc_TriggerSource_15))
655 {
656 IfxVadc_setBackgroundScanSlotGatingConfig(vadc, backgroundScanSlot->triggerConfig.gatingSource, backgroundScanSlot->triggerConfig.gatingMode);
657 }
658 else
659 {
660 /* do nothing, handled by trigger settings */
661 }
662
663 IfxVadc_setAutoBackgroundScan(vadc, backgroundScanSlot->autoBackgroundScanEnabled ? 1 : 0);
664 }
665 else
666 {
667 /* do nothing */
668 }
669
670 /* turn on group after initialisation, only in master mode */
671 IfxVadc_AnalogConverterMode convertMode = (config->master == groupIndex) ? IfxVadc_AnalogConverterMode_normalOperation : IfxVadc_AnalogConverterMode_off;
672 IfxVadc_setAnalogConvertControl(vadcG, convertMode);
673
674 /* Post Calibration */
675 IfxVadc_disablePostCalibration(vadc, groupIndex, config->disablePostCalibration);
676
677 for (inputClassNum = 0; inputClassNum < IFXVADC_NUM_INPUTCLASSES; inputClassNum++)
678 {
679 /* configure Group input class registers */
680 IfxVadc_setGroupResolution(vadcG, inputClassNum, config->inputClass[inputClassNum].resolution);
681 /* Calculate Sample time ticks */
682 IfxVadc_setGroupSampleTime(vadcG, inputClassNum, analogFrequency, config->inputClass[inputClassNum].sampleTime);
683 }
684
685 IfxVadc_disableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
686
687 return status;
688 }
689
690
691 void IfxVadc_Adc_initGroupConfig(IfxVadc_Adc_GroupConfig *config, IfxVadc_Adc *vadc)
692 {
693 static const IfxVadc_Adc_GroupConfig IfxVadc_Adc_defaultGroupConfig = {
694 .arbiter = {
695 .arbiterRoundLength = IfxVadc_ArbitrationRounds_4_slots,
696 .requestSlotQueueEnabled = FALSE,
697 .requestSlotScanEnabled = FALSE,
698 .requestSlotBackgroundScanEnabled = FALSE,
699 },
700 .backgroundScanRequest = {
701 .autoBackgroundScanEnabled = FALSE,
702 .triggerConfig.gatingMode = IfxVadc_GatingMode_disabled,
703 .triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger,
704 .triggerConfig.gatingSource = IfxVadc_GatingSource_0,
705 .triggerConfig.triggerSource = IfxVadc_TriggerSource_0,
706 .requestSlotPrio = IfxVadc_RequestSlotPriority_low,
707 .requestSlotStartMode = IfxVadc_RequestSlotStartMode_waitForStart,
708 },
709 .scanRequest = {
710 .autoscanEnabled = FALSE,
711 .triggerConfig.gatingMode = IfxVadc_GatingMode_disabled,
712 .triggerConfig.gatingSource = IfxVadc_GatingSource_0,
713 .triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger,
714 .triggerConfig.triggerSource = IfxVadc_TriggerSource_0,
715 .requestSlotPrio = IfxVadc_RequestSlotPriority_low,
716 .requestSlotStartMode = IfxVadc_RequestSlotStartMode_waitForStart,
717 },
718 .queueRequest = {
719 .flushQueueAfterInit = TRUE,
720 .triggerConfig.gatingMode = IfxVadc_GatingMode_disabled,
721 .triggerConfig.gatingSource = IfxVadc_GatingSource_0,
722 .triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger,
723 .triggerConfig.triggerSource = IfxVadc_TriggerSource_0,
724 .requestSlotPrio = IfxVadc_RequestSlotPriority_low,
725 .requestSlotStartMode = IfxVadc_RequestSlotStartMode_waitForStart,
726 },
727
728 .inputClass[0].resolution = IfxVadc_ChannelResolution_12bit,
729 .inputClass[0].sampleTime = 1.0e-6, /* Set sample time to 1us */
730 .inputClass[1].resolution = IfxVadc_ChannelResolution_12bit,
731 .inputClass[1].sampleTime = 1.0e-6, /* Set sample time to 1us */
732 };
733
734 *config = IfxVadc_Adc_defaultGroupConfig;
735 config->groupId = IfxVadc_GroupId_0;
736 config->module = vadc;
737 config->master = config->groupId;
738 config->disablePostCalibration = FALSE;
739 }
740
741
742 IfxVadc_Status IfxVadc_Adc_initModule(IfxVadc_Adc *vadc, const IfxVadc_Adc_Config *config)
743 {
744 IfxVadc_Status status = IfxVadc_Status_noError;
745 Ifx_VADC *vadcSFR = config->vadc;
746 vadc->vadc = vadcSFR;
747 float32 analogFrequency;
748 uint8 inputClassNum, groupNum;
749
750 /* Enable VADC kernel clock */
751 IfxVadc_enableModule(vadcSFR);
752 IfxVadc_selectPowerSupplyVoltage(vadcSFR, config->supplyVoltage);
753
754 /* Set Analog Frequency */
755 if (IfxVadc_initializeFAdcI(vadcSFR, config->analogFrequency) == 0)
756 {
757 return IfxVadc_Status_notInitialised;
758 }
759 else
760 {
761 /* do nothing */
762 }
763
764 /* Set digital Frequency */
765 IfxVadc_initializeFAdcD(vadcSFR, config->digitalFrequency);
766
767 analogFrequency = IfxVadc_getAdcAnalogFrequency(vadcSFR);
768
769 /* configure Global input class registers */
770 for (inputClassNum = 0; inputClassNum < IFXVADC_NUM_GLOBAL_INPUTCLASSES; inputClassNum++)
771 {
772 /* configure ADC channel resolution ( conversion mode ) */
773 IfxVadc_setGlobalResolution(vadcSFR, inputClassNum, config->globalInputClass[inputClassNum].resolution);
774 /* configure Sample time ticks */
775 IfxVadc_setGlobalSampleTime(vadcSFR, inputClassNum, analogFrequency, config->globalInputClass[inputClassNum].sampleTime);
776 }
777
778 /* Start up calibration is requested */
779 if (config->startupCalibration == TRUE)
780 {
781 /* Ensure that all groups are enabled */
782 for (groupNum = 0; groupNum < IFXVADC_NUM_ADC_GROUPS; groupNum++)
783 {
784 IfxVadc_enableAccess(vadcSFR, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupNum));
785 IfxVadc_setAnalogConvertControl(&vadcSFR->G[groupNum], IfxVadc_AnalogConverterMode_normalOperation);
786 IfxVadc_disableAccess(vadcSFR, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupNum));
787 }
788
789 // execute calibration
790 IfxVadc_startupCalibration(vadcSFR);
791 }
792
793 return status;
794 }
795
796
797 void IfxVadc_Adc_initModuleConfig(IfxVadc_Adc_Config *config, Ifx_VADC *vadc)
798 {
799 config->vadc = vadc;
800 config->analogFrequency = IFXVADC_DEFAULT_ANALOG_FREQ;
801
802 config->digitalFrequency = IfxVadc_getAdcDigitalFrequency(vadc);
803 config->moduleFrequency = IfxScuCcu_getSpbFrequency();
804 config->globalInputClass[0].resolution = IfxVadc_ChannelResolution_12bit;
805 config->globalInputClass[0].sampleTime = 1.0e-6;
806 config->globalInputClass[1].resolution = IfxVadc_ChannelResolution_12bit;
807 config->globalInputClass[1].sampleTime = 1.0e-6;
808 config->startupCalibration = FALSE;
809 config->supplyVoltage = IfxVadc_LowSupplyVoltageSelect_5V;
810 }
811
812
813 void IfxVadc_Adc_initExternalMultiplexerModeConfig(IfxVadc_Adc_EmuxControl *emuxConfig, Ifx_VADC *vadc)
814 {
815 emuxConfig->vadc = vadc;
816 emuxConfig->channels = 0;
817 emuxConfig->groupId = IfxVadc_GroupId_0;
818 emuxConfig->emuxInterface = IfxVadc_EmuxInterface_0;
819 emuxConfig->startChannel = IfxVadc_EmuxSelectValue_0;
820 emuxConfig->code = IfxVadc_EmuxCodingScheme_binary;
821 emuxConfig->sampleTimeControl = IfxVadc_EmuxSampleTimeControl_settingChanges;
822 emuxConfig->mode = IfxVadc_ExternalMultiplexerMode_softwareControl;
823 emuxConfig->channelSelectionStyle = IfxVadc_ChannelSelectionStyle_channelNumber;
824 IfxVadc_Adc_EmuxPinConfig defaultConfig = {
825 .pins = {NULL_PTR},
826 .outputMode = IfxPort_OutputMode_pushPull,
827 .padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1,
828 };
829
830 emuxConfig->emuxOutPinConfig = defaultConfig;
831 }
832
833
834 void IfxVadc_Adc_initExternalMultiplexerMode(Ifx_VADC *vadc, const IfxVadc_Adc_EmuxControl *emuxControl)
835 {
836 uint8 count = 0;
837 Ifx_VADC_G *vadcG = &vadc->G[emuxControl->groupId];
838 IfxVadc_setEmuxInterfaceForGroup(vadc, emuxControl->emuxInterface, emuxControl->groupId);
839
840 for (count = 0; count < 3; count++)
841 {
842 if (emuxControl->emuxOutPinConfig.pins[count] != NULL_PTR)
843 {
844 IfxVadc_initEmuxPin(emuxControl->emuxOutPinConfig.pins[count], emuxControl->emuxOutPinConfig.outputMode, emuxControl->emuxOutPinConfig.padDriver);
845 }
846 }
847
848 IfxVadc_configExternalMultiplexerMode(vadc, vadcG, emuxControl->mode, emuxControl->channels, emuxControl->startChannel, emuxControl->code, emuxControl->sampleTimeControl, emuxControl->channelSelectionStyle);
849 }
IfxVadc_Adc_ChannelConfig::channelSrcNr
IfxVadc_SrcNr channelSrcNr
Service node of the channel trigger.
Definition: IfxVadc_Adc.h:486
IfxVadc_setEmuxInterfaceForGroup
IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group)
Sets the Emux Interface for a particular group.
Definition: IfxVadc.h:2312
IfxVadc_setGroupResolution
IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
Sets the ADC input class channel resolution.
Definition: IfxVadc.h:2343
IfxVadc_Adc_EmuxPinConfig::pins
IfxVadc_Emux_Out * pins[3]
Emux Pins configuration.
Definition: IfxVadc_Adc.h:457
IfxVadc_getChannelServiceRequestNodePointer1
IFX_INLINE Ifx_VADC_G_CEVNP1 IfxVadc_getChannelServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
get channel service request node pointer
Definition: IfxVadc.h:1940
IfxVadc_Adc_EmuxControl::channels
uint8 channels
specifies channel number
Definition: IfxVadc_Adc.h:524
IfxVadc_Adc_GroupConfig::module
IFX_CONST IfxVadc_Adc * module
Specifies pointer to the IfxVadc_Adc module handle.
Definition: IfxVadc_Adc.h:534
IfxVadc_isRequestBackgroundScanSlotEnabled
IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG)
Returns the background scan slot requested status.
Definition: IfxVadc.h:2167
IfxVadc_Adc_QueueConfig
Queue configuration structure.
Definition: IfxVadc_Adc.h:435
IfxVadc_ChannelId_0
Channel 0.
Definition: IfxVadc.h:142
IfxVadc_getGroupResolution
IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
Gets the ADC input class channel resolution.
Definition: IfxVadc.h:2009
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:572
IfxVadc_clearAllResultRequests
IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG)
Clears the all group requests.
Definition: IfxVadc.h:1753
IfxVadc_Adc_ChannelConfig::synchonize
boolean synchonize
Specifies synchronized conversion channel.
Definition: IfxVadc_Adc.h:478
IfxVadc_disableAccess
void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Disable write access to the VADC config/control registers.
Definition: IfxVadc.c:71
IfxVadc_ChannelId
IfxVadc_ChannelId
VADC Channels.
Definition: IfxVadc.h:139
IfxVadc_Adc_Config::moduleFrequency
float32 moduleFrequency
module Frequency in Hz.
Definition: IfxVadc_Adc.h:506
IfxVadc_TriggerSource_15
Input signal REQTRx_15.
Definition: IfxVadc.h:502
IfxVadc_Adc_ChannelConfig
Channel configuration structure.
Definition: IfxVadc_Adc.h:475
IfxVadc_Adc_Config::supplyVoltage
IfxVadc_LowSupplyVoltageSelect supplyVoltage
Select Low Power Supply Voltage.
Definition: IfxVadc_Adc.h:510
IfxVadc_getChannelResultServiceRequestNodePointer0
IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
Gets the channel esult service request node pointer 0.
Definition: IfxVadc.h:1916
IfxVadc_Adc_initGroupConfig
void IfxVadc_Adc_initGroupConfig(IfxVadc_Adc_GroupConfig *config, IfxVadc_Adc *vadc)
Initialise buffer with default VADC configuration.
Definition: IfxVadc_Adc.c:691
IfxVadc_ConversionType
IfxVadc_ConversionType
type of conversion
Definition: IfxVadc.h:212
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:133
IfxVadc_LimitCheck_noCheck
Normal compare mode Event Never Fast Compare mode Event Never.
Definition: IfxVadc.h:325
IfxVadc_getArbiterRoundLength
IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG)
Gets the ADC group arbitration round length.
Definition: IfxVadc.h:1852
IfxVadc_Adc_Channel::resultreg
IfxVadc_ChannelResult resultreg
Specifies allocated result register.
Definition: IfxVadc_Adc.h:469
IfxVadc_Adc_ChannelConfig::inputClass
IfxVadc_InputClasses inputClass
Specifies input class selection.
Definition: IfxVadc_Adc.h:488
IfxVadc_Adc_Config::globalInputClass
IfxVadc_Adc_ClassConfig globalInputClass[IFXVADC_NUM_GLOBAL_INPUTCLASSES]
Specifies the global conversion settings one and two.
Definition: IfxVadc_Adc.h:503
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxVadc_Adc_Channel::channel
IfxVadc_ChannelId channel
Specifies the channel index.
Definition: IfxVadc_Adc.h:468
IfxVadc_Adc_initModuleConfig
void IfxVadc_Adc_initModuleConfig(IfxVadc_Adc_Config *config, Ifx_VADC *vadc)
Initialise buffer with default VADC configuration.
Definition: IfxVadc_Adc.c:797
IfxVadc_GatingSource_0
Input signal REQGTx_0.
Definition: IfxVadc.h:293
IfxVadc_disableQueueSlotExternalTrigger
IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
Disables the external trigger.
Definition: IfxVadc.h:1792
IfxVadc_Adc_GatingTriggerConfig::gatingMode
IfxVadc_GatingMode gatingMode
Specifies gating mode. High level, Low Level or Gating disabled.
Definition: IfxVadc_Adc.h:388
IfxVadc_Adc_EmuxControl::code
IfxVadc_EmuxCodingScheme code
specifes binary/gray code
Definition: IfxVadc_Adc.h:521
IfxVadc_Adc_initChannelConfig
void IfxVadc_Adc_initChannelConfig(IfxVadc_Adc_ChannelConfig *config, const IfxVadc_Adc_Group *group)
Initialise buffer with default channel configuration.
Definition: IfxVadc_Adc.c:441
IfxVadc_RequestSlotPriority_low
Lowpriority.
Definition: IfxVadc.h:413
IfxVadc_getAssignedChannels
IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG)
Gets the group&#39;s assigned channels.
Definition: IfxVadc.h:1858
IfxVadc_setChannelEventNodePointer0
IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
Sets the channel event service request line.
Definition: IfxVadc.h:2262
IfxVadc_ChannelReference
IfxVadc_ChannelReference
ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:162
IfxVadc_InputClasses_group0
Use group class 0.
Definition: IfxVadc.h:315
IfxVadc_Adc_GroupConfig::queueRequest
IfxVadc_Adc_QueueConfig queueRequest
Specifies queued mode configuration.
Definition: IfxVadc_Adc.h:539
IfxVadc_setReferenceInput
IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
Selects the refernce input.
Definition: IfxVadc.h:2390
IfxVadc_Adc_initChannel
IfxVadc_Status IfxVadc_Adc_initChannel(IfxVadc_Adc_Channel *channel, const IfxVadc_Adc_ChannelConfig *config)
Initialise one channel with given configuration.
Definition: IfxVadc_Adc.c:347
IfxVadc_setChannelEventNodePointer1
IFX_INLINE void IfxVadc_setChannelEventNodePointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
set channel event node pointer
Definition: IfxVadc.h:2269
IfxVadc_Adc_ChannelConfig::channelServProvider
IfxSrc_Tos channelServProvider
Interrupt service provider for the channel trigger interrupt.
Definition: IfxVadc_Adc.h:484
IfxVadc_getAdcDigitalFrequency
float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc)
Returns the configured Fadcd VADC digital clock frequency in Hz.
Definition: IfxVadc.c:186
IfxVadc_RequestSlotPriority_lowest
Lowest priority.
Definition: IfxVadc.h:412
IfxVadc_getQueueSlotGatingSource
IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG)
Gets the requested queue slot gating input.
Definition: IfxVadc.h:2053
IfxVadc_Adc_getGroupConfig
void IfxVadc_Adc_getGroupConfig(IfxVadc_Adc_Group *group, IfxVadc_Adc_GroupConfig *config)
Get the current group configuration (e.g. vadc frequency)
Definition: IfxVadc_Adc.c:233
IfxVadc_Adc_GroupConfig::backgroundScanRequest
IfxVadc_Adc_BackgroundScanConfig backgroundScanRequest
Specifies back ground scan configuration.
Definition: IfxVadc_Adc.h:540
IfxVadc_storeGroupResult
IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
Sets the group result register.
Definition: IfxVadc.h:2477
IfxVadc_Adc_QueueConfig::flushQueueAfterInit
boolean flushQueueAfterInit
Specifies if the queue is flushed after configuration.
Definition: IfxVadc_Adc.h:437
IfxVadc_Adc_GatingTriggerConfig::triggerSource
IfxVadc_TriggerSource triggerSource
Specifies used Trigger input for group.
Definition: IfxVadc_Adc.h:387
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxVadc_Adc_ChannelConfig::resultServProvider
IfxSrc_Tos resultServProvider
Interrupt service provider for the result trigger interrupt.
Definition: IfxVadc_Adc.h:483
IfxVadc_RequestSource_background
background scan request
Definition: IfxVadc.h:432
IfxVadc_getBackgroundScanSlotStartMode
IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG)
Gets the requested background scan slot start mode.
Definition: IfxVadc.h:1884
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:265
float32
float float32
Definition: Platform_Types.h:170
IfxVadc_setChannelLimitCheckMode
IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
Sets the channel event mode.
Definition: IfxVadc.h:2282
IfxVadc_Adc_getChannelConversionTime
float32 IfxVadc_Adc_getChannelConversionTime(IfxVadc_Adc_Channel *channel, IfxVadc_ConversionType conversionMode)
get the channel Conversion Time
Definition: IfxVadc_Adc.c:227
IfxVadc_isRequestQueueSlotEnabled
IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG)
Returns the queue slot requested status.
Definition: IfxVadc.h:2173
IfxVadc_Adc_ChannelConfig::upperBoundary
IfxVadc_BoundarySelection upperBoundary
Specifies upper boundary selection.
Definition: IfxVadc_Adc.h:492
IfxVadc_Adc_EmuxControl::mode
IfxVadc_ExternalMultiplexerMode mode
Specifies the External Multiplexer mode.
Definition: IfxVadc_Adc.h:518
IfxVadc_RequestSource_queue
8 stage Queue request
Definition: IfxVadc.h:430
IfxVadc_Adc_Config
VADC module configuration structure.
Definition: IfxVadc_Adc.h:500
IfxVadc_Adc
VADC handle data structure.
Definition: IfxVadc_Adc.h:377
IfxVadc_GroupId_0
VADC group 0.
Definition: IfxVadc_cfg.h:118
IfxVadc_setBoundaryMode
IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
Selects boundary extension.
Definition: IfxVadc.h:2256
IfxVadc_isRequestScanSlotEnabled
IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG)
Returns the scan slot requested status.
Definition: IfxVadc.h:2179
IfxVadc_setQueueSlotGatingConfig
IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the gating configurations.
Definition: IfxVadc.h:2368
IfxVadc_disablePostCalibration
void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable)
Disables the post calibration.
Definition: IfxVadc.c:89
IfxVadc_getBackgroundScanSlotPriority
IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG)
Gets the requested background scan slot priority.
Definition: IfxVadc.h:1878
IfxVadc_Adc_getMasterKernelIndex
IFX_INLINE IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_getMasterKernelIndex(IfxVadc_GroupId slave, IfxVadc_GroupId master)
Gets the current master kernel index.
Definition: IfxVadc_Adc.c:117
IfxVadc_EmuxInterface_0
Emux Interface 0.
Definition: IfxVadc.h:230
IfxVadc_Adc_GatingTriggerConfig::gatingSource
IfxVadc_GatingSource gatingSource
Specifies used gate input for group.
Definition: IfxVadc_Adc.h:386
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxVadc_EmuxCodingScheme_binary
Output the Channel Number in Binary code.
Definition: IfxVadc.h:222
IfxVadc_setMasterIndex
IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex)
Sets the master index.
Definition: IfxVadc.h:2361
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxVadc_ChannelResult
IfxVadc_ChannelResult
Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:180
IfxVadc_BoundarySelection
IfxVadc_BoundarySelection
BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:129
IfxVadc_setArbitrationRoundLength
IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength)
Sets the arbiter round length.
Definition: IfxVadc.h:2197
IfxVadc_getScanSlotPriority
IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG)
Gets the request scan slot priority.
Definition: IfxVadc.h:2105
IfxVadc_EmuxSampleTimeControl_settingChanges
Use STCE Whenever Setting Changes.
Definition: IfxVadc.h:239
IfxVadc_Adc_initExternalMultiplexerMode
void IfxVadc_Adc_initExternalMultiplexerMode(Ifx_VADC *vadc, const IfxVadc_Adc_EmuxControl *emuxControl)
initalise external multiplexer.
Definition: IfxVadc_Adc.c:834
IfxVadc_Adc_ChannelConfig::limitCheck
IfxVadc_LimitCheck limitCheck
Specifies boundary band selection upper/lower.
Definition: IfxVadc_Adc.h:494
IfxVadc_ChannelSelectionStyle_channelNumber
selects an arbitrary channel
Definition: IfxVadc.h:205
IfxVadc_setGlobalResolution
IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
Sets the channel conversion mode.
Definition: IfxVadc.h:2325
FALSE
#define FALSE
Definition: Platform_Types.h:93
IfxVadc_Adc_EmuxPinConfig::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxVadc_Adc.h:459
IfxVadc_setAutoScan
IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable)
Enables/Disables continuous auto scan.
Definition: IfxVadc.h:2209
IfxVadc_Protection_channelControl0
Access control for GxCHCTR0.
Definition: IfxVadc.h:343
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxVadc_resetGroup
IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG)
Resets the ADC group.
Definition: IfxVadc.h:2185
IfxVadc_Adc_ScanConfig::triggerConfig
IfxVadc_Adc_GatingTriggerConfig triggerConfig
Specifies trigger and gating configuration.
Definition: IfxVadc_Adc.h:448
IfxVadc_setBackgroundResultTarget
IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
Sets the target for result background source.
Definition: IfxVadc.h:2221
IfxVadc_Adc_getGroupRegsFromGroup
IFX_INLINE Ifx_VADC_G * IfxVadc_Adc_getGroupRegsFromGroup(const IfxVadc_Adc_Group *group)
Gets the current group register set.
Definition: IfxVadc_Adc.h:1218
IfxVadc_Adc_GroupConfig::master
IfxVadc_GroupId master
Specifies the master group. If master is different from groupId, then the group is configured as slav...
Definition: IfxVadc_Adc.h:536
IfxVadc_setGroupSampleTime
IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time.
Definition: IfxVadc.h:2349
IfxVadc_setArbiterPriority
void IfxVadc_setArbiterPriority(Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot)
Sets the Arbiter slot configurations.
Definition: IfxVadc.c:527
IfxVadc_BoundarySelection_group0
Use group class 0.
Definition: IfxVadc.h:131
IfxVadc_TriggerMode_noExternalTrigger
No external trigger.
Definition: IfxVadc.h:477
IFXVADC_NUM_INPUTCLASSES
#define IFXVADC_NUM_INPUTCLASSES
Number of group specific Input Class.
Definition: IfxVadc_cfg.h:88
IfxVadc_Adc::vadc
Ifx_VADC * vadc
Specifies the pointer to the VADC module registers.
Definition: IfxVadc_Adc.h:379
IfxVadc_enableScanSlotExternalTrigger
IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
Enables the scan slot external trigger.
Definition: IfxVadc.h:1832
IfxVadc_getQueueSlotStartMode
IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG)
Gets the requested queue slot start mode.
Definition: IfxVadc.h:2065
IfxVadc_setBackgroundPriorityChannel
IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Sets the channels with low priority as background channel.
Definition: IfxVadc.h:2215
IfxVadc_Adc_ScanConfig::autoscanEnabled
boolean autoscanEnabled
Specifies autoscan functionality.
Definition: IfxVadc_Adc.h:447
IfxVadc_setQueueSlotTriggerOperatingConfig
IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the trigger operating configurations.
Definition: IfxVadc.h:2379
IfxVadc_getBackgroundScanGatingMode
IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc)
Gets the background scan gating mode.
Definition: IfxVadc.h:1866
IfxVadc_Adc_Config::startupCalibration
boolean startupCalibration
Can be enabled to execute a startup calibration (disabled by default). Note that this option will als...
Definition: IfxVadc_Adc.h:507
IfxVadc_Adc_ScanConfig::requestSlotStartMode
IfxVadc_RequestSlotStartMode requestSlotStartMode
start mode for request scan source.
Definition: IfxVadc_Adc.h:450
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxVadc_setScanSlotGatingConfig
IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the scan slot gating configuration.
Definition: IfxVadc.h:2416
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:144
IfxVadc_Adc_getVadcFromGroup
IFX_INLINE Ifx_VADC * IfxVadc_Adc_getVadcFromGroup(const IfxVadc_Adc_Group *group)
Gets the current group module register address.
Definition: IfxVadc_Adc.h:1268
IfxVadc_AnalogConverterMode_normalOperation
Normal operation mode.
Definition: IfxVadc.h:92
IfxVadc_initEmuxPin
IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a EMUX output.
Definition: IfxVadc.h:2135
IfxVadc_Adc_EmuxControl::channelSelectionStyle
IfxVadc_ChannelSelectionStyle channelSelectionStyle
External Multiplexer Channel Selection Style.
Definition: IfxVadc_Adc.h:527
IfxVadc_EmuxSelectValue_0
Start Selection Value 0.
Definition: IfxVadc.h:248
IfxVadc_Adc_ClassConfig::sampleTime
float32 sampleTime
Specifies the requested sample time for input class.
Definition: IfxVadc_Adc.h:420
IfxVadc_InputClasses
IfxVadc_InputClasses
inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16) ...
Definition: IfxVadc.h:313
IfxVadc_Adc_EmuxControl::startChannel
IfxVadc_EmuxSelectValue startChannel
specifies the external channel start value(EMUX[x:0]) x- specifies external channel number ...
Definition: IfxVadc_Adc.h:519
IfxVadc_setBackgroundScanSlotGatingConfig
IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the background scan slot gating configurations.
Definition: IfxVadc.h:2234
IfxVadc_Adc_EmuxControl
Emux Control Structure.
Definition: IfxVadc_Adc.h:515
IfxVadc_setGroupPriorityChannel
IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Sets channel as priority channel with in the group.
Definition: IfxVadc.h:2337
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:50
IfxVadc_Adc_ChannelConfig::globalResultUsage
boolean globalResultUsage
Specifies storage in global result register.
Definition: IfxVadc_Adc.h:477
IfxVadc_Adc_ChannelConfig::rightAlignedStorage
boolean rightAlignedStorage
Specifies result is right aligned.
Definition: IfxVadc_Adc.h:480
IfxVadc_getSrcAddress
volatile Ifx_SRC_SRCR * IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index)
Gives the SRC source address.
Definition: IfxVadc.c:367
IfxVadc_getQueueSlotTriggerInput
IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG)
Gets the requested queue slot trigger input.
Definition: IfxVadc.h:2071
IfxVadc_Adc_EmuxControl::emuxOutPinConfig
IfxVadc_Adc_EmuxPinConfig emuxOutPinConfig
configure the emux output pin
Definition: IfxVadc_Adc.h:526
IFXVADC_NUM_GLOBAL_INPUTCLASSES
#define IFXVADC_NUM_GLOBAL_INPUTCLASSES
Number of ADC group input classes.
Definition: IfxVadc_cfg.h:98
IfxVadc_Adc_ChannelConfig::resultPriority
Ifx_Priority resultPriority
Interrupt priority of the result trigger interrupt, if 0 the interrupt is disable.
Definition: IfxVadc_Adc.h:481
IFXVADC_NUM_ADC_CAL_GROUPS
#define IFXVADC_NUM_ADC_CAL_GROUPS
Number of calibrated ADC Groups.
Definition: IfxVadc_cfg.h:68
IfxVadc_Adc_ChannelConfig::boundaryMode
IfxVadc_BoundaryExtension boundaryMode
Specifies Standard mode of fast compare mode.
Definition: IfxVadc_Adc.h:493
IfxVadc_Adc_ArbiterConfig::requestSlotScanEnabled
boolean requestSlotScanEnabled
request scan if enabled.
Definition: IfxVadc_Adc.h:402
IfxVadc_setAutoBackgroundScan
IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
Enables/Disables continuous background auto scan.
Definition: IfxVadc.h:2203
IfxVadc_Adc_ChannelConfig::resultSrcNr
IfxVadc_SrcNr resultSrcNr
Service node of the result trigger.
Definition: IfxVadc_Adc.h:485
IfxVadc_ExternalMultiplexerMode_softwareControl
Disable The Emux Control.
Definition: IfxVadc.h:263
IfxVadc_setResultNodeEventPointer1
IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
Sets result event node pointer 1.
Definition: IfxVadc.h:2403
IfxVadc_Adc_Channel
Channel handle data structure.
Definition: IfxVadc_Adc.h:466
IfxVadc_Adc_Group::groupId
IfxVadc_GroupId groupId
Specifies the group index.
Definition: IfxVadc_Adc.h:430
IfxVadc_setBackgroundScanSlotTriggerConfig
IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the background scan exteranal trigger operating configurations.
Definition: IfxVadc.h:2245
IfxVadc_Protection
IfxVadc_Protection
Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U.
Definition: IfxVadc.h:341
IfxVadc_Adc_ChannelConfig::reference
IfxVadc_ChannelReference reference
Specifies Reference selection.
Definition: IfxVadc_Adc.h:489
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
IfxVadc_setResultNodeEventPointer0
IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
Sets result event node pointer 0.
Definition: IfxVadc.h:2396
IfxVadc_ArbitrationRounds_4_slots
An arbitration round contains 4 arbitration slots.
Definition: IfxVadc.h:99
IfxVadc_Adc_ScanConfig::requestSlotPrio
IfxVadc_RequestSlotPriority requestSlotPrio
priority of used scan request slot.
Definition: IfxVadc_Adc.h:449
IfxVadc_getScanSlotGatingSource
IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG)
Gets the request scan slot gating input.
Definition: IfxVadc.h:2099
IfxVadc_Adc_ChannelConfig::channelPriority
Ifx_Priority channelPriority
Interrupt priority of the channel trigger interrupt, if 0 the interrupt is disable.
Definition: IfxVadc_Adc.h:482
IfxVadc_Adc_ChannelConfig::resultRegister
IfxVadc_ChannelResult resultRegister
Specifies Result register selection.
Definition: IfxVadc_Adc.h:490
IfxVadc_getBackgroundScanTriggerMode
IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc)
Gets the background scan external trigger mode.
Definition: IfxVadc.h:1896
IfxVadc_setGlobalSampleTime
IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time of ADC global class.
Definition: IfxVadc.h:2331
IfxVadc_initializeFAdcI
uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI)
Configure the ADC analog clock.
Definition: IfxVadc.c:435
IfxVadc_getQueueSlotPriority
IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG)
Gets the request queue slot priority.
Definition: IfxVadc.h:2059
IfxVadc_Adc_GroupConfig::arbiter
IfxVadc_Adc_ArbiterConfig arbiter
Arbiter configuration structure.
Definition: IfxVadc_Adc.h:542
IfxVadc_getScanSlotGatingMode
IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG)
Gets the request scan slot gating mode.
Definition: IfxVadc.h:2093
IfxVadc_Adc.h
VADC ADC details.
IfxVadc_TriggerSource_0
Input signal REQTRx_0.
Definition: IfxVadc.h:487
IfxVadc_BoundaryExtension
IfxVadc_BoundaryExtension
Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:107
IfxVadc_Status_noError
No error during api execution.
Definition: IfxVadc.h:464
IfxVadc_Adc_EmuxControl::sampleTimeControl
IfxVadc_EmuxSampleTimeControl sampleTimeControl
specifies when to use sample time control
Definition: IfxVadc_Adc.h:522
IfxVadc_SrcNr_group0
service request line 0 of group
Definition: IfxVadc.h:448
IfxVadc_RequestSource_scan
scan request
Definition: IfxVadc.h:431
IfxVadc_isAutoBackgroundScanEnabled
IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc)
Returns the auto background scan status.
Definition: IfxVadc.h:2155
IfxVadc_enableModule
IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc)
Enable VADC kernel.
Definition: IfxVadc.h:1816
IfxVadc_clearChannelRequest
IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId)
Clears the channel request.
Definition: IfxVadc.h:1759
IfxVadc_Adc_GroupConfig
Group configuration structure.
Definition: IfxVadc_Adc.h:532
IfxVadc_startupCalibration
void IfxVadc_startupCalibration(Ifx_VADC *vadc)
Starts ADC calibration and wait for the end of the calibration process.
Definition: IfxVadc.c:559
IfxVadc_Adc_Group
Group handle data structure.
Definition: IfxVadc_Adc.h:426
IfxVadc_Adc_ChannelConfig::backgroundChannel
boolean backgroundChannel
Specifies channel is used as background channel.
Definition: IfxVadc_Adc.h:479
IfxVadc_Adc_Channel::group
IFX_CONST IfxVadc_Adc_Group * group
Specifies the group of the channel.
Definition: IfxVadc_Adc.h:470
IfxVadc_GatingMode_disabled
Gating is disabled, no conversion request are issued.
Definition: IfxVadc.h:283
IfxVadc_getMasterIndex
IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG)
Gets the configured master index.
Definition: IfxVadc.h:2039
IfxVadc_Adc_Config::analogFrequency
float32 analogFrequency
Specifies analog ADC Frequency.
Definition: IfxVadc_Adc.h:505
IfxVadc_Adc_EmuxControl::emuxInterface
IfxVadc_EmuxInterface emuxInterface
specifies the Emux interface
Definition: IfxVadc_Adc.h:525
IfxVadc_getChannelInputClass
IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Gets the channel input class.
Definition: IfxVadc.h:1910
IfxVadc_disableModule
IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc)
Disable VADC Module.
Definition: IfxVadc.h:1783
IfxVadc_Adc_SYNCTR_STSEL
uint8 IfxVadc_Adc_SYNCTR_STSEL
Definition: IfxVadc_Adc.h:367
IfxVadc_ChannelResult_8
Use Channel result 8.
Definition: IfxVadc.h:190
IfxVadc_getBackgroundScanGatingSource
IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc)
Gets the gating input selection.
Definition: IfxVadc.h:1872
IfxVadc_setAnalogConvertControl
IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
Sets analog converter group number.
Definition: IfxVadc.h:2191
IfxVadc_getChannelResultServiceRequestNodePointer1
IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
Gets the channel esult service request node pointer 1.
Definition: IfxVadc.h:1924
IfxVadc_getChannelServiceRequestNodePointer0
IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
Gets the channel service request node pointer.
Definition: IfxVadc.h:1932
IfxVadc_setChannelInputClass
IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
Sets the channel input class.
Definition: IfxVadc.h:2276
IfxVadc_Adc_ChannelConfig::channelId
IfxVadc_ChannelId channelId
Specifies the channel index.
Definition: IfxVadc_Adc.h:487
IfxVadc_setUpperBoundary
IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
Sets group&#39;s upper boundary.
Definition: IfxVadc.h:2453
IfxVadc_getScanSlotStartMode
IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG)
Gets the request scan slot start mode.
Definition: IfxVadc.h:2111
IfxVadc_Adc_initExternalMultiplexerModeConfig
void IfxVadc_Adc_initExternalMultiplexerModeConfig(IfxVadc_Adc_EmuxControl *emuxConfig, Ifx_VADC *vadc)
initialise default configuration for external multiplexer
Definition: IfxVadc_Adc.c:813
IfxVadc_LimitCheck
IfxVadc_LimitCheck
ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:323
IfxVadc_Adc_getMasterId
IFX_INLINE IfxVadc_GroupId IfxVadc_Adc_getMasterId(IfxVadc_GroupId slave, IfxVadc_Adc_SYNCTR_STSEL masterIndex)
Gets the master id.
Definition: IfxVadc_Adc.c:91
IfxVadc_Adc_Config::digitalFrequency
float32 digitalFrequency
Specifies digital ADC Frequency.
Definition: IfxVadc_Adc.h:504
IfxVadc_Adc_Group::group
Ifx_VADC_G * group
Pointer to the group registers.
Definition: IfxVadc_Adc.h:429
IfxVadc_Adc_GroupConfig::disablePostCalibration
boolean disablePostCalibration
Specifies if calibration after conversion (post calibration) should be disabled.
Definition: IfxVadc_Adc.h:541
IfxVadc_Adc_BackgroundScanConfig::autoBackgroundScanEnabled
boolean autoBackgroundScanEnabled
background autoscan functionality enable or disable.
Definition: IfxVadc_Adc.h:410
IfxVadc_GatingMode_always
Conversion request is issued if at least 1 conversion pending bit is set.
Definition: IfxVadc.h:284
IfxVadc_getScanSlotTriggerInput
IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG)
Gets the requested scan slot trigger input.
Definition: IfxVadc.h:2117
IfxVadc_Adc_ChannelConfig::lowerBoundary
IfxVadc_BoundarySelection lowerBoundary
Specifies lower boundary selection.
Definition: IfxVadc_Adc.h:491
IfxVadc_setResultPosition
IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
Sets result store position.
Definition: IfxVadc.h:2410
IfxVadc_Adc_GatingTriggerConfig::triggerMode
IfxVadc_TriggerMode triggerMode
Specifies trigger mode. Rising, falling any edge leads to an trigger event.
Definition: IfxVadc_Adc.h:389
IfxVadc_enableServiceRequest
IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
Definition: IfxVadc.h:1838
IfxVadc_getAdcAnalogFrequency
float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc)
Returns the configured Fadci VADC analog clock frequency in Hz.
Definition: IfxVadc.c:180
IfxVadc_ChannelResolution_12bit
12-bit conversion
Definition: IfxVadc.h:172
IfxVadc_configExternalMultiplexerMode
void IfxVadc_configExternalMultiplexerMode(Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle)
Definition: IfxVadc.c:52
IfxVadc_GroupId
IfxVadc_GroupId
VADC Groups
Definition: IfxVadc_cfg.h:116
IfxVadc_Adc_disableModule
void IfxVadc_Adc_disableModule(Ifx_VADC *vadc)
Disable VADC Module.
Definition: IfxVadc_Adc.c:141
IfxVadc_getGlobalConfigValue
IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc)
Gets the global control configuration value.
Definition: IfxVadc.h:1972
IfxVadc_Adc_ScanConfig
Scan mode configuration structure.
Definition: IfxVadc_Adc.h:445
IfxVadc_Adc_EmuxPinConfig
Definition: IfxVadc_Adc.h:455
IfxVadc_ChannelReference_standard
use Varef as reference
Definition: IfxVadc.h:164
IfxVadc_getScanSlotTriggerMode
IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG)
Gets the requested scan slot trigger mode.
Definition: IfxVadc.h:2123
IfxVadc_enableBackgroundScanSlotExternalTrigger
IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc)
Enables the background sacn external trigger.
Definition: IfxVadc.h:1804
IfxVadc_BoundaryExtension_standard
Boundary Standard mode. BNDSELU/BNDSELL as Boundaries.
Definition: IfxVadc.h:109
IfxVadc_Adc_ClassConfig::resolution
IfxVadc_ChannelResolution resolution
Specifies the conversion Mode 8,10,12Bit or 10bit fast compare.
Definition: IfxVadc_Adc.h:421
IfxVadc_setScanSlotTriggerConfig
IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the scan slot trigger operating configurations.
Definition: IfxVadc.h:2427
IfxVadc_LowSupplyVoltageSelect_5V
5V Power Supply is Connected
Definition: IfxVadc.h:335
IfxVadc_Status_notInitialised
Appropriate initialisation not done.
Definition: IfxVadc.h:465
IfxVadc_ChannelResult_0
Use Channel result 0.
Definition: IfxVadc.h:182
IfxVadc_AnalogConverterMode
IfxVadc_AnalogConverterMode
Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC.
Definition: IfxVadc.h:87
IfxVadc_getQueueSlotTriggerMode
IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG)
Gets the requested queue slot trigger mode.
Definition: IfxVadc.h:2077
IfxVadc_Adc_initGroup
IfxVadc_Status IfxVadc_Adc_initGroup(IfxVadc_Adc_Group *group, const IfxVadc_Adc_GroupConfig *config)
Initialise the VADC group (also autoscan and queue modes) Slave Groups must initialize first...
Definition: IfxVadc_Adc.c:469
IfxVadc_Adc_GroupConfig::inputClass
IfxVadc_Adc_ClassConfig inputClass[IFXVADC_NUM_INPUTCLASSES]
Specifies conversion settings one and two.
Definition: IfxVadc_Adc.h:537
IfxVadc_Adc_Group::module
IfxVadc_Adc module
The VADC handle structure.
Definition: IfxVadc_Adc.h:428
IfxVadc_getQueueSlotGatingMode
IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG)
Gets the requested queue slot gating mode.
Definition: IfxVadc.h:2047
IfxVadc_getChannelControlConfig
IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Gets the current ADC channel control configurations.
Definition: IfxVadc.h:1902
IfxVadc_disableScanSlotExternalTrigger
IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
Disables the scan slot external trigger.
Definition: IfxVadc.h:1798
IfxVadc_getAdcModuleFrequency
float32 IfxVadc_getAdcModuleFrequency(void)
Module Frequency in Hz.
Definition: IfxVadc.c:192
IfxVadc_Status
IfxVadc_Status
API return values defined in MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U MODULE_VADC.BRSPNDx
Definition: IfxVadc.h:462
IfxVadc_Adc_ArbiterConfig::requestSlotQueueEnabled
boolean requestSlotQueueEnabled
request queue if enabled.
Definition: IfxVadc_Adc.h:401
IFXVADC_DEFAULT_ANALOG_FREQ
#define IFXVADC_DEFAULT_ANALOG_FREQ
Default analog frequency used in initModuleConfig function.
Definition: IfxVadc_cfg.h:80
IfxVadc_setLowerBoundary
IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
Sets group&#39;s lower boundary.
Definition: IfxVadc.h:2355
IfxVadc_enableQueueSlotExternalTrigger
IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
Enables the external trigger.
Definition: IfxVadc.h:1826
IfxVadc_isAutoScanEnabled
IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG)
Gets the auto scan enable status.
Definition: IfxVadc.h:2161
IfxVadc_Adc_getChannelConfig
void IfxVadc_Adc_getChannelConfig(IfxVadc_Adc_Channel *channel, IfxVadc_Adc_ChannelConfig *config)
Get the current channel configuration (e.g. sample settings)
Definition: IfxVadc_Adc.c:147
IfxVadc_Adc_ArbiterConfig::arbiterRoundLength
IfxVadc_ArbitrationRounds arbiterRoundLength
Specifies arbiter round length.
Definition: IfxVadc_Adc.h:400
IfxVadc_RequestSlotStartMode_waitForStart
Wait for start.
Definition: IfxVadc.h:422
IfxVadc_getGroupSampleTime
IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the ADC input class channel sample time.
Definition: IfxVadc.h:2026
IFXVADC_NUM_ADC_GROUPS
#define IFXVADC_NUM_ADC_GROUPS
Number of ADC Groups.
Definition: IfxVadc_cfg.h:64
IfxVadc_getChannelConversionTime
float32 IfxVadc_getChannelConversionTime(Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode)
get channel conversion timing
Definition: IfxVadc.c:219
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxVadc_clearQueue
IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue)
Clears all the queue entries including backup stage.
Definition: IfxVadc.h:1765
IfxVadc_Adc_initModule
IfxVadc_Status IfxVadc_Adc_initModule(IfxVadc_Adc *vadc, const IfxVadc_Adc_Config *config)
Initialise the VADC to run with the expected frequency and calibration.
Definition: IfxVadc_Adc.c:742
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxVadc_Adc_deInitGroup
void IfxVadc_Adc_deInitGroup(IfxVadc_Adc_Group *group)
Reset the VADC group.
Definition: IfxVadc_Adc.c:127
IfxVadc_ChannelId_8
Channel 8.
Definition: IfxVadc.h:150
IfxVadc_setSyncRequest
IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
Sets channel synchronization request.
Definition: IfxVadc.h:2447
IfxVadc_Adc_ArbiterConfig::requestSlotBackgroundScanEnabled
boolean requestSlotBackgroundScanEnabled
request background scan if enabled.
Definition: IfxVadc_Adc.h:403
IfxVadc_Adc_masterIndex
IFX_STATIC IFX_CONST IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_masterIndex[IFXVADC_NUM_ADC_CAL_GROUPS][IFXVADC_NUM_ADC_CAL_GROUPS]
Definition: IfxVadc_Adc.c:77
IfxVadc_SrcNr
IfxVadc_SrcNr
Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
Definition: IfxVadc.h:446
IfxVadc_Adc_BackgroundScanConfig
Background scan mode configuration structure.
Definition: IfxVadc_Adc.h:408
IfxVadc_Adc_EmuxPinConfig::outputMode
IfxPort_OutputMode outputMode
the pin output mode which should be configured
Definition: IfxVadc_Adc.h:458
IfxVadc_enableAccess
void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Enable write access to the VADC config/control registers.
Definition: IfxVadc.c:111
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:271
IfxVadc_Protection_initGroup0
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:359
IfxVadc_initializeFAdcD
uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD)
Configure the FadcD vadc digital clock.
Definition: IfxVadc.c:419
IfxVadc_AnalogConverterMode_off
Analog Converter off.
Definition: IfxVadc.h:89
IfxVadc_Adc_GroupConfig::scanRequest
IfxVadc_Adc_ScanConfig scanRequest
Specifies scan mode configuration.
Definition: IfxVadc_Adc.h:538
IfxVadc_getBackgroundScanTriggerInput
IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc)
Gets the background scan trigger input.
Definition: IfxVadc.h:1890
IfxVadc_selectPowerSupplyVoltage
void IfxVadc_selectPowerSupplyVoltage(Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage)
Select Low Power Supply Voltage.
Definition: IfxVadc.c:515


iLLD_TC26B: IfxVadc_Adc.h Source File

  • Vadc
  • Adc
IfxVadc_Adc.h
Go to the documentation of this file.
1 /**
2 * \file IfxVadc_Adc.h
3 * \brief VADC ADC details
4 * \ingroup IfxLld_Vadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
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39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Vadc_Adc_Usage How to use the VADC ADC Interface driver?
42 * \ingroup IfxLld_Vadc
43 *
44 * VADC comprises of independent analog channels with Analog/Digital converters to convert analog input to discrete digital output.
45 *
46 * In the following sections it will be described, how to integrate the driver into the application framework.
47 *
48 * \section IfxLld_Vadc_Adc_Preparation Preparation
49 * \subsection IfxLld_Vadc_Adc_Include Include Files
50 *
51 * Include following header file into your C code:
52 * \code
53 *
54 * #include <Vadc/Adc/IfxVadc_Adc.h>
55 *
56 * \endcode
57 *
58 * \subsection IfxLld_Vadc_Adc_Variables Variables
59 * \code
60 *
61 * // VADC handle
62 * IfxVadc_Adc vadc;
63 * IfxVadc_Adc_Group adcGroup;
64 * \endcode
65 *
66 * \subsection IfxLld_Vadc_Adc_ModuleInitialisation Module Initialisation
67 * The module initialisation can be done in the same function:
68 * \code
69 * // create configuration
70 * IfxVadc_Adc_Config adcConfig;
71 * IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
72 *
73 * // initialize module
74 * // IfxVadc_Adc vadc; // declared globally
75 * IfxVadc_Adc_initModule(&vadc, &adcConfig);
76 * \endcode
77 *
78 *
79 * \subsection IfxLld_Vadc_Adc_GroupInitialisation Group Initialisation
80 * The group initialisation can be done in the same function:
81 * \code
82 * // create group config
83 * IfxVadc_Adc_GroupConfig adcGroupConfig;
84 * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
85 *
86 * // change group (default is GroupId_0, change to GroupId_3)
87 * adcGroupConfig.groupId = IfxVadc_GroupId_3;
88 *
89 * // IMPORTANT: usually we use the same group as master!
90 * adcGroupConfig.master = adcGroupConfig.groupId;
91 *
92 * // enable all arbiter request sources
93 * adcGroupConfig.arbiter.requestSlotQueueEnabled = TRUE; // enable Queue mode
94 * adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE; // enable Scan mode
95 * adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE; // enable Background scan
96 *
97 * // enable all gates in "always" mode (no edge detection)
98 * adcGroupConfig.queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
99 * adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
100 * adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
101 *
102 * // enable auto scan
103 * adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
104 * adcGroupConfig.backgroundScanRequest.autoBackgroundScanEnabled = TRUE;
105 *
106 * // initialize the group
107 * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
108 * \endcode
109 *
110 * \subsection IfxLld_Vadc_Adc_QueuedTransfers Queued Transfers
111 * Now, VADC is initialised. Here,Three channels are used for queued transfers
112 * \code
113 * // IMPORTANT: for deterministic results we have to disable the queue gate
114 * // while filling the queue, otherwise results could be output in the wrong order
115 * IfxVadc_GatingMode savedGate = IfxVadc_getQueueSlotGatingMode(adcGroup.group);
116 * IfxVadc_GatingSource gatingSource=IfxVadc_getQueueSlotGatingSource(adcGroup.group);
117 *
118 * IfxVadc_setQueueSlotGatingConfig(adcGroup.group, gatingSource, IfxVadc_GatingMode_disabled );
119 * // create channel config
120 * IfxVadc_Adc_ChannelConfig adcChannelConfig[3];
121 * IfxVadc_Adc_Channel adcChannel[3];
122 *
123 * for(int chnIx=0; chnIx<3; ++chnIx) {
124 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
125 *
126 * adcChannelConfig[chnIx].channelId = (IfxVadc_ChannelId)(chnIx);
127 * adcChannelConfig[chnIx].resultRegister = IfxVadc_ChannelResult_1; // use result register #1 for all channels
128 *
129 * // initialize the channel
130 * IfxVadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
131 *
132 * // Add channel to queue with refill enabled
133 * IfxVadc_Adc_addToQueue(&adcChannel[chnIx], IFXVADC_QUEUE_REFILL);
134 *
135 * // restore previous gate config
136 *
137 * IfxVadc_setQueueSlotGatingConfig(adcGroup.group, gatingSource, savedGate );
138 *
139 * // start the Queue
140 * IfxVadc_Adc_startQueue(&adcGroup); // just for the case that somebody copy&pastes the code - the queue has already been started in previous test
141 *
142 * // get 10 results for all 3 channels and store in temporary buffer
143 * // (the usage of a buffer is required, since the print statements used by the checks take more time than the conversions)
144 * Ifx_VADC_RES resultTrace[3*10];
145 * for(int i=0; i<3*10; ++i)
146 * {
147 * unsigned chnIx = i % 3;
148 *
149 * // wait for valid result
150 * Ifx_VADC_RES conversionResult;
151 * do {
152 * conversionResult = IfxVadc_Adc_getResult(&adcChannel[chnIx]);
153 * } while( !conversionResult.B.VF );
154 *
155 * // store result
156 * resultTrace[i] = conversionResult;
157 * }
158 *
159 * // stop the queue
160 * IfxVadc_Adc_clearQueue(&adcGroup);
161 *
162 * // check results in buffer
163 * // ...
164 * }
165 * \endcode
166 *
167 * \subsection IfxLld_Vadc_Adc_AutoScan Auto Scan
168 * Autoscan of 5 channels
169 * \code
170 * // create group config
171 * IfxVadc_Adc_GroupConfig adcGroupConfig;
172 * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
173 *
174 * // change group (default is GroupId_0, change to GroupId_3)
175 * adcGroupConfig.groupId = IfxVadc_GroupId_3;
176 *
177 * // IMPORTANT: usually we use the same group as master!
178 * adcGroupConfig.master = adcGroupConfig.groupId;
179 *
180 * // enable gate in "always" mode (no edge detection)
181 * adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
182 *
183 * // enable auto scan
184 * adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE;
185 * adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
186 *
187 * // initialize the group
188 * //IfxVadc_Adc_Group adcGroup; // no need to create a new one
189 * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
190 *
191 * {
192 * // create channel config
193 * IfxVadc_Adc_ChannelConfig adcChannelConfig[5];
194 * IfxVadc_Adc_Channel adcChannel[5];
195 *
196 * for(int chnIx=0; chnIx<5; ++chnIx) {
197 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
198 *
199 * adcChannelConfig[chnIx].channelId = (IfxVadc_ChannelId)(chnIx);
200 * adcChannelConfig[chnIx].resultRegister = (IfxVadc_ChannelResult)(chnIx); // use dedicated result register
201 *
202 * // initialize the channel
203 * IfxVadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
204 *
205 * // add to scan
206 * unsigned channels = (1 << adcChannelConfig[chnIx].channelId);
207 * unsigned mask = channels;
208 * IfxVadc_Adc_setScan(&adcGroup, channels, mask);
209 * }
210 *
211 * // start scan
212 * IfxVadc_Adc_startScan(&adcGroup);
213 *
214 * // check results
215 * for(int chnIx=0; chnIx<5; ++chnIx) {
216 * unsigned group = adcChannel[chnIx].group->groupId;
217 * unsigned channel = adcChannel[chnIx].channel;
218 *
219 * // wait for valid result
220 * Ifx_VADC_RES conversionResult;
221 * do {
222 * conversionResult = IfxVadc_Adc_getResult(&adcChannel[chnIx]);
223 * } while( !conversionResult.B.VF );
224 *
225 *
226 * }
227 * }
228 * \endcode
229 *
230 * \subsection IfxLld_Vadc_Adc_BackGroundScan Background Scan
231 * Background Scan of 2 channels
232 *
233 * \code
234 * // create group config
235 * IfxVadc_Adc_GroupConfig adcGroupConfig;
236 * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
237 *
238 * // change group (default is GroupId_0, change to GroupId_3)
239 * adcGroupConfig.groupId = IfxVadc_GroupId_3;
240 *
241 * // IMPORTANT: usually we use the same group as master!
242 * adcGroupConfig.master = adcGroupConfig.groupId;
243 *
244 * // enable background scan
245 * adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE;
246 * adcGroupConfig.backgroundScanRequest.autoBackgroundScanEnabled = TRUE;
247 *
248 * // enable gate in "always" mode (no edge detection)
249 * adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
250 *
251 * // create channel config
252 * IfxVadc_Adc_ChannelConfig adcChannelConfig[2];
253 * IfxVadc_Adc_Channel adcChannel[2];
254 *
255 * for(int chnIx=0; chnIx<2; ++chnIx)
256 * {
257 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
258 *
259 * adcChannelConfig[chnIx].channelId = (IfxVadc_ChannelId)(chnIx + 5);
260 * adcChannelConfig[chnIx].resultRegister = (IfxVadc_ChannelResult)(5 + chnIx); // use register #5 and 6 for results
261 * adcChannelConfig[chnIx].backgroundChannel = TRUE;
262 *
263 * // initialize the channel
264 * IfxVadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
265 *
266 * // add to background scan
267 * unsigned channels = (1 << adcChannelConfig[chnIx].channelId);
268 * unsigned mask = channels;
269 * IfxVadc_Adc_setBackgroundScan(&vadc, &adcGroup, channels, mask);
270 * }
271 *
272 * // start autoscan
273 * IfxVadc_Adc_startBackgroundScan(&vadc);
274 *
275 * // check results
276 * for(int chnIx=0; chnIx<2; ++chnIx)
277 * {
278 * unsigned group = adcChannel[chnIx].group->groupId;
279 * unsigned channel = adcChannel[chnIx].channel;
280 *
281 * // wait for valid result
282 * Ifx_VADC_RES conversionResult;
283 * do
284 * {
285 * conversionResult = IfxVadc_Adc_getResult(&adcChannel[chnIx]);
286 * } while( !conversionResult.B.VF );
287 *
288 * // check with expected value
289 * // ...
290 * }
291 * \endcode
292 *
293 * \subsection IfxLld_Vadc_Adc_EmuxConfiguration External Multiplexer Configuration
294 * External Configuration of 3 channels at channel 3
295 *
296 * \code
297 *
298 * IfxVadc_Adc_EmuxControl emuxConfig;
299 *
300 * IfxVadc_Adc_initExternalMultiplexerModeConfig(&emuxConfig,vadc);
301 *
302 * emuxConfig.groupId = IfxVadc_GroupId_1;
303 * emuxConfig.channels = (uint8)IfxVadc_ChannelId_3;
304 * emuxConfig.startChannel = IfxVadc_EmuxSelectValue_2; // it will take 0 to 2 external channel
305 *
306 * emuxConfig.sampleTimeControl = IfxVadc_EmuxSampleTimeControl_always;
307 * emuxConfig.mode = IfxVadc_ExternalMultiplexerMode_steady;
308 *
309 * IfxVadc_Adc_EmuxPinConfig pinsConfig ={
310 * .pins={ &IfxVadc_EMUX00_P02_6_OUT,
311 * &IfxVadc_EMUX01_P02_7_OUT,
312 * &IfxVadc_EMUX02_P02_8_OUT},
313 *
314 *
315 * .outputMode = IfxPort_OutputMode_pushPull,
316 * .padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1
317 * };
318 * emuxConfig.emuxOutPinConfig = pinsConfig;
319 *
320 * IfxVadc_Adc_initExternalMultiplexerMode(vadc, &emuxConfig);
321 *
322 * IfxVadc_setEmuxGroupResolution(&vadc->G[emuxConfig.groupId], 0, IfxVadc_ChannelResolution_12bit);
323 * IfxVadc_setEmuxGroupSampletime(&vadc->G[emuxConfig.groupId], 0, 50000, 1.0e-6);
324 *
325 * \endcode
326 *
327 * \defgroup IfxLld_Vadc_Adc Interface Driver
328 * \ingroup IfxLld_Vadc
329 * \defgroup IfxLld_Vadc_Adc_DataStructures Data Structures
330 * \ingroup IfxLld_Vadc_Adc
331 * \defgroup IfxLld_Vadc_Adc_Module Module Functions
332 * \ingroup IfxLld_Vadc_Adc
333 * \defgroup IfxLld_Vadc_Adc_Group Group Functions
334 * \ingroup IfxLld_Vadc_Adc
335 * \defgroup IfxLld_Vadc_Adc_Channel Channel Functions
336 * \ingroup IfxLld_Vadc_Adc
337 * \defgroup IfxLld_Vadc_Adc_Background_Autoscan Background Autoscan Functions
338 * \ingroup IfxLld_Vadc_Adc
339 * \defgroup IfxLld_Vadc_Adc_ChannelScan Channel Scan Functions
340 * \ingroup IfxLld_Vadc_Adc
341 * \defgroup IfxLld_Vadc_Adc_Queue Queue Functions
342 * \ingroup IfxLld_Vadc_Adc
343 * \defgroup IfxLld_Vadc_Adc_Clock Clock Functions
344 * \ingroup IfxLld_Vadc_Adc
345 * \defgroup IfxLld_Vadc_Adc_Interrupt Interrupt Functions
346 * \ingroup IfxLld_Vadc_Adc
347 * \defgroup IfxLld_Vadc_Adc_Variables Variables
348 * \ingroup IfxLld_Vadc_Adc
349 * \defgroup IfxLld_Vadc_Adc_Emux Emux Functions
350 * \ingroup IfxLld_Vadc_Adc
351 */
352
353 #ifndef IFXVADC_ADC_H
354 #define IFXVADC_ADC_H 1
355
356 /******************************************************************************/
357 /*----------------------------------Includes----------------------------------*/
358 /******************************************************************************/
359
360 #include "Vadc/Std/IfxVadc.h"
361 #include "_Utilities/Ifx_Assert.h"
362
363 /******************************************************************************/
364 /*------------------------------Type Definitions------------------------------*/
365 /******************************************************************************/
366
367 typedef uint8 IfxVadc_Adc_SYNCTR_STSEL;
368
369 /******************************************************************************/
370 /*-----------------------------Data Structures--------------------------------*/
371 /******************************************************************************/
372
373 /** \addtogroup IfxLld_Vadc_Adc_DataStructures
374 * \{ */
375 /** \brief VADC handle data structure
376 */
377 typedef struct
378 {
379 Ifx_VADC *vadc; /**< \brief Specifies the pointer to the VADC module registers */
380 } IfxVadc_Adc;
381
382 /** \brief Gating/Trigger configuration structure
383 */
384 typedef struct
385 {
386 IfxVadc_GatingSource gatingSource; /**< \brief Specifies used gate input for group */
387 IfxVadc_TriggerSource triggerSource; /**< \brief Specifies used Trigger input for group */
388 IfxVadc_GatingMode gatingMode; /**< \brief Specifies gating mode. High level, Low Level or Gating disabled */
389 IfxVadc_TriggerMode triggerMode; /**< \brief Specifies trigger mode. Rising, falling any edge leads to an trigger event */
390 } IfxVadc_Adc_GatingTriggerConfig;
391
392 /** \} */
393
394 /** \addtogroup IfxLld_Vadc_Adc_DataStructures
395 * \{ */
396 /** \brief Arbiter configuration structure.
397 */
398 typedef struct
399 {
400 IfxVadc_ArbitrationRounds arbiterRoundLength; /**< \brief Specifies arbiter round length. */
401 boolean requestSlotQueueEnabled; /**< \brief request queue if enabled. */
402 boolean requestSlotScanEnabled; /**< \brief request scan if enabled. */
403 boolean requestSlotBackgroundScanEnabled; /**< \brief request background scan if enabled. */
404 } IfxVadc_Adc_ArbiterConfig;
405
406 /** \brief Background scan mode configuration structure.
407 */
408 typedef struct
409 {
410 boolean autoBackgroundScanEnabled; /**< \brief background autoscan functionality enable or disable. */
411 IfxVadc_Adc_GatingTriggerConfig triggerConfig; /**< \brief trigger and gating configuration. */
412 IfxVadc_RequestSlotPriority requestSlotPrio; /**< \brief priority of used background scan request slot. */
413 IfxVadc_RequestSlotStartMode requestSlotStartMode; /**< \brief start mode for request background scan source. */
414 } IfxVadc_Adc_BackgroundScanConfig;
415
416 /** \brief Input class configuration structure
417 */
418 typedef struct
419 {
420 float32 sampleTime; /**< \brief Specifies the requested sample time for input class */
421 IfxVadc_ChannelResolution resolution; /**< \brief Specifies the conversion Mode 8,10,12Bit or 10bit fast compare */
422 } IfxVadc_Adc_ClassConfig;
423
424 /** \brief Group handle data structure
425 */
426 typedef struct
427 {
428 IfxVadc_Adc module; /**< \brief The VADC handle structure */
429 Ifx_VADC_G *group; /**< \brief Pointer to the group registers */
430 IfxVadc_GroupId groupId; /**< \brief Specifies the group index */
431 } IfxVadc_Adc_Group;
432
433 /** \brief Queue configuration structure
434 */
435 typedef struct
436 {
437 boolean flushQueueAfterInit; /**< \brief Specifies if the queue is flushed after configuration */
438 IfxVadc_Adc_GatingTriggerConfig triggerConfig; /**< \brief trigger and gating configuration. */
439 IfxVadc_RequestSlotPriority requestSlotPrio; /**< \brief priority of used queue request slot. */
440 IfxVadc_RequestSlotStartMode requestSlotStartMode; /**< \brief start mode for request queue source. */
441 } IfxVadc_Adc_QueueConfig;
442
443 /** \brief Scan mode configuration structure.
444 */
445 typedef struct
446 {
447 boolean autoscanEnabled; /**< \brief Specifies autoscan functionality. */
448 IfxVadc_Adc_GatingTriggerConfig triggerConfig; /**< \brief Specifies trigger and gating configuration */
449 IfxVadc_RequestSlotPriority requestSlotPrio; /**< \brief priority of used scan request slot. */
450 IfxVadc_RequestSlotStartMode requestSlotStartMode; /**< \brief start mode for request scan source. */
451 } IfxVadc_Adc_ScanConfig;
452
453 /** \} */
454
455 typedef struct
456 {
457 IfxVadc_Emux_Out *pins[3]; /**< \brief Emux Pins configuration */
458 IfxPort_OutputMode outputMode; /**< \brief the pin output mode which should be configured */
459 IfxPort_PadDriver padDriver; /**< \brief Pad driver */
460 } IfxVadc_Adc_EmuxPinConfig;
461
462 /** \addtogroup IfxLld_Vadc_Adc_DataStructures
463 * \{ */
464 /** \brief Channel handle data structure
465 */
466 typedef struct
467 {
468 IfxVadc_ChannelId channel; /**< \brief Specifies the channel index */
469 IfxVadc_ChannelResult resultreg; /**< \brief Specifies allocated result register */
470 IFX_CONST IfxVadc_Adc_Group *group; /**< \brief Specifies the group of the channel */
471 } IfxVadc_Adc_Channel;
472
473 /** \brief Channel configuration structure
474 */
475 typedef struct
476 {
477 boolean globalResultUsage; /**< \brief Specifies storage in global result register */
478 boolean synchonize; /**< \brief Specifies synchronized conversion channel */
479 boolean backgroundChannel; /**< \brief Specifies channel is used as background channel */
480 boolean rightAlignedStorage; /**< \brief Specifies result is right aligned */
481 Ifx_Priority resultPriority; /**< \brief Interrupt priority of the result trigger interrupt, if 0 the interrupt is disable */
482 Ifx_Priority channelPriority; /**< \brief Interrupt priority of the channel trigger interrupt, if 0 the interrupt is disable */
483 IfxSrc_Tos resultServProvider; /**< \brief Interrupt service provider for the result trigger interrupt */
484 IfxSrc_Tos channelServProvider; /**< \brief Interrupt service provider for the channel trigger interrupt */
485 IfxVadc_SrcNr resultSrcNr; /**< \brief Service node of the result trigger */
486 IfxVadc_SrcNr channelSrcNr; /**< \brief Service node of the channel trigger */
487 IfxVadc_ChannelId channelId; /**< \brief Specifies the channel index */
488 IfxVadc_InputClasses inputClass; /**< \brief Specifies input class selection */
489 IfxVadc_ChannelReference reference; /**< \brief Specifies Reference selection */
490 IfxVadc_ChannelResult resultRegister; /**< \brief Specifies Result register selection */
491 IfxVadc_BoundarySelection lowerBoundary; /**< \brief Specifies lower boundary selection */
492 IfxVadc_BoundarySelection upperBoundary; /**< \brief Specifies upper boundary selection */
493 IfxVadc_BoundaryExtension boundaryMode; /**< \brief Specifies Standard mode of fast compare mode */
494 IfxVadc_LimitCheck limitCheck; /**< \brief Specifies boundary band selection upper/lower */
495 IFX_CONST IfxVadc_Adc_Group *group; /**< \brief Specifies pointer to the IfxVadc_Adc_Group group handle */
496 } IfxVadc_Adc_ChannelConfig;
497
498 /** \brief VADC module configuration structure
499 */
500 typedef struct
501 {
502 Ifx_VADC *vadc; /**< \brief Specifies the pointer to the VADC module registers */
503 IfxVadc_Adc_ClassConfig globalInputClass[IFXVADC_NUM_GLOBAL_INPUTCLASSES]; /**< \brief Specifies the global conversion settings one and two */
504 float32 digitalFrequency; /**< \brief Specifies digital ADC Frequency */
505 float32 analogFrequency; /**< \brief Specifies analog ADC Frequency */
506 float32 moduleFrequency; /**< \brief module Frequency in Hz. */
507 boolean startupCalibration; /**< \brief Can be enabled to execute a startup calibration (disabled by default).
508 * Note that this option will also enable all converter groups.
509 * If this isn't desired, don't use this option, but execute IfxVadc_Adc_startupCalibration() after all ADC groups have been initialized. */
510 IfxVadc_LowSupplyVoltageSelect supplyVoltage; /**< \brief Select Low Power Supply Voltage */
511 } IfxVadc_Adc_Config;
512
513 /** \brief Emux Control Structure
514 */
515 typedef struct
516 {
517 Ifx_VADC *vadc; /**< \brief pointer to Module Configuration */
518 IfxVadc_ExternalMultiplexerMode mode; /**< \brief Specifies the External Multiplexer mode */
519 IfxVadc_EmuxSelectValue startChannel; /**< \brief specifies the external channel start value(EMUX[x:0])
520 * x- specifies external channel number */
521 IfxVadc_EmuxCodingScheme code; /**< \brief specifes binary/gray code */
522 IfxVadc_EmuxSampleTimeControl sampleTimeControl; /**< \brief specifies when to use sample time control */
523 IfxVadc_GroupId groupId; /**< \brief specifies groupId */
524 uint8 channels; /**< \brief specifies channel number */
525 IfxVadc_EmuxInterface emuxInterface; /**< \brief specifies the Emux interface */
526 IfxVadc_Adc_EmuxPinConfig emuxOutPinConfig; /**< \brief configure the emux output pin */
527 IfxVadc_ChannelSelectionStyle channelSelectionStyle; /**< \brief External Multiplexer Channel Selection Style */
528 } IfxVadc_Adc_EmuxControl;
529
530 /** \brief Group configuration structure
531 */
532 typedef struct
533 {
534 IFX_CONST IfxVadc_Adc *module; /**< \brief Specifies pointer to the IfxVadc_Adc module handle */
535 IfxVadc_GroupId groupId; /**< \brief Specifies the group/kernel id */
536 IfxVadc_GroupId master; /**< \brief Specifies the master group. If master is different from groupId, then the group is configured as slave. */
537 IfxVadc_Adc_ClassConfig inputClass[IFXVADC_NUM_INPUTCLASSES]; /**< \brief Specifies conversion settings one and two */
538 IfxVadc_Adc_ScanConfig scanRequest; /**< \brief Specifies scan mode configuration */
539 IfxVadc_Adc_QueueConfig queueRequest; /**< \brief Specifies queued mode configuration */
540 IfxVadc_Adc_BackgroundScanConfig backgroundScanRequest; /**< \brief Specifies back ground scan configuration */
541 boolean disablePostCalibration; /**< \brief Specifies if calibration after conversion (post calibration) should be disabled */
542 IfxVadc_Adc_ArbiterConfig arbiter; /**< \brief Arbiter configuration structure. */
543 } IfxVadc_Adc_GroupConfig;
544
545 /** \} */
546
547 /** \addtogroup IfxLld_Vadc_Adc_Module
548 * \{ */
549
550 /******************************************************************************/
551 /*-------------------------Inline Function Prototypes-------------------------*/
552 /******************************************************************************/
553
554 /** \brief Reset the VADC module
555 * \param vadc pointer to the VADC module
556 * \return None
557 *
558 * Example Usage :\ref IfxLld_Vadc_Adc_Usage
559 *
560 */
561 IFX_INLINE void IfxVadc_Adc_deInitModule(IfxVadc_Adc *vadc);
562
563 /** \brief Get the current VADC configuration (e.g. VADC frequency)
564 * \param vadc pointer to the VADC module
565 * \param config pointer to the VADC module configuration
566 * \return None
567 *
568 * Example Usage :\ref IfxLld_Vadc_Adc_Usage
569 *
570 */
571 IFX_INLINE void IfxVadc_Adc_getModuleConfig(IfxVadc_Adc *vadc, IfxVadc_Adc_Config *config);
572
573 /** \brief Get conversion result based on the Request Source. (Function does not care about the alignment)
574 * value = raw * gain + offset
575 * \param group pointer to the VADC group
576 * \param channel channel number
577 * \param sourceType type of request source
578 * \return scaled Conversion result
579 *
580 * \code
581 * // create configuration
582 * IfxVadc_Adc_Config adcConfig;
583 * IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
584 *
585 * // initialize module
586 * IfxVadc_Adc vadc;
587 * IfxVadc_Adc_initModule(&vadc, &adcConfig);
588 *
589 * // create group config
590 * IfxVadc_Adc_GroupConfig adcGroupConfig;
591 * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
592 *
593 * // change group (default is GroupId0, change to GroupId2)
594 * adcGroupConfig.groupId = IfxVadc_GroupId2;
595 * adcGroupConfig.master = adcGroupConfig.groupId;
596 *
597 * // enable gate in "always" mode (no edge detection)
598 * adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
599 *
600 * // enable auto scan
601 * adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE;
602 * adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
603 *
604 * // initialize the group
605 * IfxVadc_Adc_Group adcGroup;
606 * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
607 *
608 * // create channel config
609 * IfxVadc_Adc_ChannelConfig adcChannelConfig;
610 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig, &adcGroup);
611 *
612 * // change channel (default is ChannelId0, change to ChannelId2)
613 * adcChannelConfig.channelId = IfxVadc_ChannelId2;
614 *
615 * // initialize the channel
616 * IfxVadc_Adc_Channel adcChannel;
617 * IfxVadc_Adc_initChannel(&adcChannel, &adcChannelConfig);
618 *
619 * uint32 channels = (1 << 2); // enable channel #2
620 * uint32 mask = (1 << 7) | (1 << 2); // modify the selection for channel #7 and #2; channel #7 will be disabled
621 *
622 * // configure wait for read mode
623 * IfxVadc_Adc_configureWaitForReadMode(&adcChannel, TRUE);
624 *
625 * // configure scan
626 * IfxVadc_Adc_setScan(&adcGroup, channels, mask);
627 *
628 * // start the scan
629 * IfxVadc_Adc_startScan(&adcGroup);
630 *
631 * // wait for valid result
632 * Ifx_VADC_RES resultChannel;
633 * do {
634 * resultChannel = IfxVadc_Adc_getResultBasedOnRequestSource(&adcGroup, IfxVadc_ChannelId2, IfxVadc_RequestSource_scan);
635 * } while( !resultChannel.B.VF );
636 * \endcode
637 *
638 */
639 IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResultBasedOnRequestSource(IfxVadc_Adc_Group *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType);
640
641 /******************************************************************************/
642 /*-------------------------Global Function Prototypes-------------------------*/
643 /******************************************************************************/
644
645 /** \brief Disable VADC Module
646 * \param vadc Pointer to VADC Module
647 * \return None
648 */
649 IFX_EXTERN void IfxVadc_Adc_disableModule(Ifx_VADC *vadc);
650
651 /** \brief Initialise the VADC to run with the expected frequency and calibration
652 * \param vadc pointer to the VADC handle
653 * \param config pointer to the VADC configuration
654 * \return IfxVadc_Status
655 *
656 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
657 *
658 */
659 IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initModule(IfxVadc_Adc *vadc, const IfxVadc_Adc_Config *config);
660
661 /** \brief Initialise buffer with default VADC configuration
662 * \param config pointer to the VADC module configuration
663 * \param vadc pointer to the VADC
664 * \return None
665 *
666 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
667 *
668 */
669 IFX_EXTERN void IfxVadc_Adc_initModuleConfig(IfxVadc_Adc_Config *config, Ifx_VADC *vadc);
670
671 /** \} */
672
673 /** \addtogroup IfxLld_Vadc_Adc_Group
674 * \{ */
675
676 /******************************************************************************/
677 /*-------------------------Inline Function Prototypes-------------------------*/
678 /******************************************************************************/
679
680 /** \brief Gets the current group register set
681 * \param group Group handle data structure
682 * \return Group register set
683 *
684 * Ifx_VADC* vadc = &MODULE_VADC;
685 * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
686 *
687 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
688 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
689 *
690 * //confiure wait for read mode for global result register
691 * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
692 * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
693 *
694 * // configure scan
695 * IfxVadc_setScan(group, channels, mask);
696 *
697 * // enable auto scan
698 * IfxVadc_setAutoScan(group, TRUE);
699 *
700 * // start the scan
701 * IfxVadc_startScan(group);
702 *
703 * // wait for conversion to finish
704 *
705 * // fetch the 2 results of conversion for group 0
706 * Ifx_VADC_RES results[10];
707 * result = IfxVadc_getGroupResult(group, results, 0, 2);
708 *
709 */
710 IFX_INLINE Ifx_VADC_G *IfxVadc_Adc_getGroupRegsFromGroup(const IfxVadc_Adc_Group *group);
711
712 /** \brief Get conversion result for the group
713 * \param group pointer to the VADC group
714 * \param results pointer to scaled conversion results
715 * \param resultOffset offset for the first result
716 * \param numResults number of results
717 * \return None
718 *
719 * \code
720 * // create configuration
721 * IfxVadc_Adc_Config adcConfig;
722 * IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
723 *
724 * // initialize module
725 * IfxVadc_Adc vadc;
726 * IfxVadc_Adc_initModule(&vadc, &adcConfig);
727 *
728 * // create group config
729 * IfxVadc_Adc_GroupConfig adcGroupConfig;
730 * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
731 *
732 * // change group (default is GroupId0, change to GroupId2)
733 * adcGroupConfig.groupId = IfxVadc_GroupId2;
734 * adcGroupConfig.master = adcGroupConfig.groupId;
735 *
736 * // enable gate in "always" mode (no edge detection)
737 * adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
738 *
739 * // enable auto scan
740 * adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE;
741 * adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
742 *
743 * // initialize the group
744 * IfxVadc_Adc_Group adcGroup;
745 * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
746 *
747 * // create channel config
748 * IfxVadc_Adc_ChannelConfig adcChannelConfig2;
749 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig2, &adcGroup);
750 *
751 * // change channel (default is ChannelId0, change to ChannelId2)
752 * adcChannelConfig2.channelId = IfxVadc_ChannelId2;
753 *
754 * // initialize the channel
755 * IfxVadc_Adc_Channel adcChannel2;
756 * IfxVadc_Adc_initChannel(&adcChannel2, &adcChannelConfig2);
757 *
758 * // create channel config
759 * IfxVadc_Adc_ChannelConfig adcChannelConfig5;
760 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig5, &adcGroup);
761 *
762 * // change channel (default is ChannelId0, change to ChannelId5)
763 * adcChannelConfig5.channelId = IfxVadc_ChannelId5;
764 * // change channel result register (default is ChannelResult0, change to ChannelResult1)
765 * adcChannelConfig5.resultRegister = IfxVadc_ChannelResult1;
766 *
767 * // initialize the channel
768 * IfxVadc_Adc_Channel adcChannel5;
769 * IfxVadc_Adc_initChannel(&adcChannel5, &adcChannelConfig5);
770 *
771 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
772 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
773 *
774 * // configure wait for read mode
775 * IfxVadc_Adc_configureWaitForReadMode(&adcChannel2, TRUE);
776 * IfxVadc_Adc_configureWaitForReadMode(&adcChannel5, TRUE);
777 *
778 * // configure scan
779 * IfxVadc_Adc_setScan(&adcGroup, channels, mask);
780 *
781 * // start the scan
782 * IfxVadc_Adc_startScan(&adcGroup);
783 *
784 * // wait for conversion to finish
785 * IfxVadc_Status scanStatus;
786 * do
787 * {
788 * scanStatus = IfxVadc_Adc_getScanStatus(&adcGroup);
789 * } while(scanStatus==IfxVadc_Status_ChannelsStillPending);
790 *
791 * // fetch the 2 results of conversion for group 0
792 * Ifx_VADC_RES results[10];
793 * IfxVadc_Adc_getGroupResult(&adcGroup, results, 0, 2);
794 * \endcode
795 *
796 */
797 IFX_INLINE void IfxVadc_Adc_getGroupResult(IfxVadc_Adc_Group *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults);
798
799 /** \brief Gets the current group module register address
800 * \param group Group handle data structure
801 * \return Group module register base address
802 */
803 IFX_INLINE Ifx_VADC *IfxVadc_Adc_getVadcFromGroup(const IfxVadc_Adc_Group *group);
804
805 /******************************************************************************/
806 /*-------------------------Global Function Prototypes-------------------------*/
807 /******************************************************************************/
808
809 /** \brief Reset the VADC group
810 * \param group pointer to the VADC group
811 * \return None
812 *
813 * Example Usage :\ref IfxLld_Vadc_Adc_Usage
814 *
815 */
816 IFX_EXTERN void IfxVadc_Adc_deInitGroup(IfxVadc_Adc_Group *group);
817
818 /** \brief Get the current group configuration (e.g. vadc frequency)
819 * \param group pointer to the VADC group
820 * \param config pointer to the VADC group configuration
821 * \return None
822 *
823 * Example Usage :\ref IfxLld_Vadc_Adc_Usage
824 *
825 */
826 IFX_EXTERN void IfxVadc_Adc_getGroupConfig(IfxVadc_Adc_Group *group, IfxVadc_Adc_GroupConfig *config);
827
828 /** \brief Initialise the VADC group (also autoscan and queue modes) Slave Groups must initialize first.
829 * \param group pointer to the VADC group
830 * \param config pointer to the VADC group configuration
831 * \return IfxVadc_Status
832 *
833 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
834 *
835 */
836 IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initGroup(IfxVadc_Adc_Group *group, const IfxVadc_Adc_GroupConfig *config);
837
838 /** \brief Initialise buffer with default VADC configuration
839 * \param config pointer to the VADC group configuration
840 * \param vadc pointer to the VADC module
841 * \return None
842 *
843 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
844 *
845 */
846 IFX_EXTERN void IfxVadc_Adc_initGroupConfig(IfxVadc_Adc_GroupConfig *config, IfxVadc_Adc *vadc);
847
848 /** \} */
849
850 /** \addtogroup IfxLld_Vadc_Adc_Channel
851 * \{ */
852
853 /******************************************************************************/
854 /*-------------------------Inline Function Prototypes-------------------------*/
855 /******************************************************************************/
856
857 /** \brief pointer to the VADC channel
858 * \param channel pointer to the VADC channel
859 * \param waitForRead wait for read mode enabled/disable
860 * \return None
861 *
862 * For coding example see: \ref IfxVadc_Adc_getGroupResult
863 *
864 */
865 IFX_INLINE void IfxVadc_Adc_configureWaitForReadMode(IfxVadc_Adc_Channel *channel, boolean waitForRead);
866
867 /** \brief Get conversion result (Function does not care about the alignment)
868 * \param channel pointer to the VADC channel
869 * \return scaled Conversion result
870 *
871 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
872 *
873 */
874 IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResult(IfxVadc_Adc_Channel *channel);
875
876 /** \brief Get debug result (Function does not care about the alignment)
877 * \param channel pointer to the VADC channel.
878 * \return Debug Conversion result
879 */
880 IFX_INLINE Ifx_VADC_RESD IfxVadc_Adc_getDebugResult(IfxVadc_Adc_Channel *channel);
881
882 /******************************************************************************/
883 /*-------------------------Global Function Prototypes-------------------------*/
884 /******************************************************************************/
885
886 /** \brief Get the current channel configuration (e.g. sample settings)
887 * \param channel pointer to the VADC channel
888 * \param config pointer to the VADC channel configuration
889 * \return None
890 *
891 * Example Usage :\ref IfxLld_Vadc_Adc_Usage
892 *
893 */
894 IFX_EXTERN void IfxVadc_Adc_getChannelConfig(IfxVadc_Adc_Channel *channel, IfxVadc_Adc_ChannelConfig *config);
895
896 /** \brief get the channel Conversion Time
897 * \param channel Channel
898 * \param conversionMode specifies Compatible mode(Standard Conversion mode).
899 * \return channel conversion time in sec
900 */
901 IFX_EXTERN float32 IfxVadc_Adc_getChannelConversionTime(IfxVadc_Adc_Channel *channel, IfxVadc_ConversionType conversionMode);
902
903 /** \brief Initialise one channel with given configuration
904 * \param channel pointer to the VADC channel
905 * \param config pointer to the VADC channel configuration
906 * \return IfxVadc_Status
907 *
908 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
909 *
910 */
911 IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initChannel(IfxVadc_Adc_Channel *channel, const IfxVadc_Adc_ChannelConfig *config);
912
913 /** \brief Initialise buffer with default channel configuration
914 * \param config pointer to the VADC channel configuration
915 * \param group pointer to the VADC group
916 * \return None
917 *
918 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
919 *
920 */
921 IFX_EXTERN void IfxVadc_Adc_initChannelConfig(IfxVadc_Adc_ChannelConfig *config, const IfxVadc_Adc_Group *group);
922
923 /** \} */
924
925 /** \addtogroup IfxLld_Vadc_Adc_Background_Autoscan
926 * \{ */
927
928 /******************************************************************************/
929 /*-------------------------Inline Function Prototypes-------------------------*/
930 /******************************************************************************/
931
932 /** \brief access function to enable/disable wait for read mode for global result register
933 * \param vadc pointer to the VADC module
934 * \param waitForRead wait for read mode enabled/disabled
935 * \return None
936 *
937 * For coding example see: \ref IfxVadc_Adc_getGlobalResult
938 *
939 */
940 IFX_INLINE void IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister(IfxVadc_Adc *vadc, boolean waitForRead);
941
942 /** \brief Gives the background scan status for a group
943 * \param vadc pointer to the VADC module
944 * \return IfxVadc_Status
945 */
946 IFX_INLINE IfxVadc_Status IfxVadc_Adc_getBackgroundScanStatus(IfxVadc_Adc *vadc);
947
948 /** \brief returns result stored in global result register
949 * \param vadc pointer to the VADC module
950 * \return global result register
951 *
952 * \code
953 * // create configuration
954 * IfxVadc_Adc_Config adcConfig;
955 * IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
956 *
957 * // initialize module
958 * IfxVadc_Adc vadc;
959 * IfxVadc_Adc_initModule(&vadc, &adcConfig);
960 *
961 * // create group config
962 * IfxVadc_Adc_GroupConfig adcGroupConfig;
963 * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
964 *
965 * // change group (default is GroupId_0, change to GroupId_3)
966 * adcGroupConfig.groupId = IfxVadc_GroupId_3;
967 *
968 * // IMPORTANT: usually we use the same group as master!
969 * adcGroupConfig.master = adcGroupConfig.groupId;
970 *
971 * // enable background scan
972 * adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE;
973 * adcGroupConfig.backgroundScanRequest.autoBackgroundScanEnabled = TRUE;
974 *
975 * // enable gate in "always" mode (no edge detection)
976 * adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
977 *
978 * // initialize the group
979 * IfxVadc_Adc_Group adcGroup;
980 * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
981 *
982 * // create channel config
983 * IfxVadc_Adc_ChannelConfig adcChannelConfig2;
984 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig2, &adcGroup);
985 * adcChannelConfig2.backgroundChannel = TRUE;
986 * adcChannelConfig2.globalResultUsage = TRUE;
987 *
988 * // change channel (default is ChannelId0, change to ChannelId2)
989 * adcChannelConfig2.channelId = IfxVadc_ChannelId2;
990 *
991 * // initialize the channel
992 * IfxVadc_Adc_Channel adcChannel2;
993 * IfxVadc_Adc_initChannel(&adcChannel2, &adcChannelConfig2);
994 *
995 * // create channel config
996 * IfxVadc_Adc_ChannelConfig adcChannelConfig5;
997 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig5, &adcGroup);
998 * adcChannelConfig5.backgroundChannel = TRUE;
999 * adcChannelConfig5.globalResultUsage = TRUE;
1000 *
1001 * // change channel (default is ChannelId0, change to ChannelId5)
1002 * adcChannelConfig5.channelId = IfxVadc_ChannelId5;
1003 *
1004 *
1005 * // initialize the channel
1006 * IfxVadc_Adc_Channel adcChannel5;
1007 * IfxVadc_Adc_initChannel(&adcChannel5, &adcChannelConfig5);
1008 *
1009 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
1010 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
1011 *
1012 * //configure wait for read mode
1013 * IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister(&vadc, TRUE);
1014 *
1015 * // configure background scan
1016 * IfxVadc_Adc_setBackgroundScan(&vadc, &adcGroupConfig, channels, mask);
1017 *
1018 * // start the background scan
1019 * IfxVadc_Adc_startBackgroundScan(&vadc);
1020 *
1021 * // wait for valid result for channel 2
1022 * Ifx_VADC_GLOBRES resultChannel2;
1023 * do {
1024 * resultChannel2 = IfxVadc_Adc_getGlobalResult(&vadc);
1025 * } while( !resultChannel2.B.VF );
1026 *
1027 * // wait for valid result for channel 5
1028 * Ifx_VADC_GLOBRES resultChannel5;
1029 * do {
1030 * resultChannel5 = IfxVadc_Adc_getGlobalResult(&vadc);
1031 * } while( !resultChannel5.B.VF );
1032 * \endcode
1033 *
1034 */
1035 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_Adc_getGlobalResult(IfxVadc_Adc *vadc);
1036
1037 /** \brief configures a background scan
1038 * \param vadc pointer to the VADC module
1039 * \param group pointer to the VADC group
1040 * \param channels specifies the channels which should be enabled/disabled
1041 * \param mask specifies the channels which should be modified
1042 * \return None
1043 *
1044 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
1045 *
1046 */
1047 IFX_INLINE void IfxVadc_Adc_setBackgroundScan(IfxVadc_Adc *vadc, IfxVadc_Adc_Group *group, uint32 channels, uint32 mask);
1048
1049 /** \brief Starts a background scan
1050 * \param vadc pointer to the VADC module
1051 * \return None
1052 *
1053 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
1054 *
1055 */
1056 IFX_INLINE void IfxVadc_Adc_startBackgroundScan(IfxVadc_Adc *vadc);
1057
1058 /** \} */
1059
1060 /** \addtogroup IfxLld_Vadc_Adc_ChannelScan
1061 * \{ */
1062
1063 /******************************************************************************/
1064 /*-------------------------Inline Function Prototypes-------------------------*/
1065 /******************************************************************************/
1066
1067 /** \brief Gives the scan status for a group.
1068 * \param group pointer to the VADC group
1069 * \return IfxVadc_Status
1070 *
1071 * For coding example see: \ref IfxVadc_Adc_getResultBasedOnRequestSource
1072 *
1073 */
1074 IFX_INLINE IfxVadc_Status IfxVadc_Adc_getScanStatus(IfxVadc_Adc_Group *group);
1075
1076 /** \brief Configures an autoscan.
1077 * \param group pointer to the VADC group
1078 * \param channels specifies the channels which should be enabled/disabled
1079 * \param mask specifies the channels which should be modified
1080 * \return None
1081 *
1082 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
1083 *
1084 */
1085 IFX_INLINE void IfxVadc_Adc_setScan(IfxVadc_Adc_Group *group, uint32 channels, uint32 mask);
1086
1087 /** \brief Starts an autoscan on the specified group
1088 * \param group pointer to the VADC group
1089 * \return None
1090 *
1091 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
1092 *
1093 */
1094 IFX_INLINE void IfxVadc_Adc_startScan(IfxVadc_Adc_Group *group);
1095
1096 /** \} */
1097
1098 /** \addtogroup IfxLld_Vadc_Adc_Queue
1099 * \{ */
1100
1101 /******************************************************************************/
1102 /*-------------------------Inline Function Prototypes-------------------------*/
1103 /******************************************************************************/
1104
1105 /** \brief Add an entry to the queue of a group for the specified channel with the following options set:
1106 * refill
1107 * source interrupt enable/disable
1108 * external trigger control
1109 * \param channel pointer to the VADC channel
1110 * \param options options for channel
1111 * \return None
1112 *
1113 * For coding example see: \ref IfxVadc_Adc_getResult
1114 *
1115 */
1116 IFX_INLINE void IfxVadc_Adc_addToQueue(IfxVadc_Adc_Channel *channel, uint32 options);
1117
1118 /** \brief Flush the contents of the queue of a group
1119 * \param group pointer to the VADC group
1120 * \return None
1121 *
1122 * For coding example see: \ref IfxVadc_Adc_getResult
1123 *
1124 */
1125 IFX_INLINE void IfxVadc_Adc_clearQueue(IfxVadc_Adc_Group *group);
1126
1127 /** \brief Gives the status of the Queue of a group by returning non zero value if the Queue is full
1128 * \param group pointer to the VADC group
1129 * \return Queue status
1130 *
1131 * For coding example see: \ref IfxVadc_Adc_getResult
1132 *
1133 */
1134 IFX_INLINE IfxVadc_Status IfxVadc_Adc_getQueueStatus(IfxVadc_Adc_Group *group);
1135
1136 /** \brief Starts a queue of a group by generating a trigger event through software
1137 * \param group pointer to the VADC group
1138 * \return None
1139 *
1140 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
1141 *
1142 */
1143 IFX_INLINE void IfxVadc_Adc_startQueue(IfxVadc_Adc_Group *group);
1144
1145 /** \} */
1146
1147 /** \addtogroup IfxLld_Vadc_Adc_Emux
1148 * \{ */
1149
1150 /******************************************************************************/
1151 /*-------------------------Global Function Prototypes-------------------------*/
1152 /******************************************************************************/
1153
1154 /** \brief initialise default configuration for external multiplexer
1155 * \param emuxConfig speciifies EMUX configuration
1156 * \param vadc pointer to VADC module space
1157 * \return None
1158 */
1159 IFX_EXTERN void IfxVadc_Adc_initExternalMultiplexerModeConfig(IfxVadc_Adc_EmuxControl *emuxConfig, Ifx_VADC *vadc);
1160
1161 /** \brief initalise external multiplexer.
1162 * \param vadc Pointer to VADC Module space
1163 * \param emuxControl speciifies EMUX configuration
1164 * \return None
1165 */
1166 IFX_EXTERN void IfxVadc_Adc_initExternalMultiplexerMode(Ifx_VADC *vadc, const IfxVadc_Adc_EmuxControl *emuxControl);
1167
1168 /** \} */
1169
1170 /******************************************************************************/
1171 /*---------------------Inline Function Implementations------------------------*/
1172 /******************************************************************************/
1173
1174 IFX_INLINE void IfxVadc_Adc_addToQueue(IfxVadc_Adc_Channel *channel, uint32 options)
1175 {
1176 IfxVadc_addToQueue(channel->group->group, channel->channel, options);
1177 }
1178
1179
1180 IFX_INLINE void IfxVadc_Adc_clearQueue(IfxVadc_Adc_Group *group)
1181 {
1182 IfxVadc_clearQueue(group->group, TRUE);
1183 }
1184
1185
1186 IFX_INLINE void IfxVadc_Adc_configureWaitForReadMode(IfxVadc_Adc_Channel *channel, boolean waitForRead)
1187 {
1188 IfxVadc_configureWaitForReadMode(channel->group->group, channel->resultreg, waitForRead);
1189 }
1190
1191
1192 IFX_INLINE void IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister(IfxVadc_Adc *vadc, boolean waitForRead)
1193 {
1194 IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc->vadc, waitForRead);
1195 }
1196
1197
1198 IFX_INLINE void IfxVadc_Adc_deInitModule(IfxVadc_Adc *vadc)
1199 {
1200 Ifx_VADC *vadcSFR = vadc->vadc;
1201
1202 IfxVadc_resetKernel(vadcSFR);
1203 }
1204
1205
1206 IFX_INLINE IfxVadc_Status IfxVadc_Adc_getBackgroundScanStatus(IfxVadc_Adc *vadc)
1207 {
1208 return IfxVadc_getBackgroundScanStatus(vadc->vadc);
1209 }
1210
1211
1212 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_Adc_getGlobalResult(IfxVadc_Adc *vadc)
1213 {
1214 return IfxVadc_getGlobalResult(vadc->vadc);
1215 }
1216
1217
1218 IFX_INLINE Ifx_VADC_G *IfxVadc_Adc_getGroupRegsFromGroup(const IfxVadc_Adc_Group *group)
1219 {
1220 return group->group;
1221 }
1222
1223
1224 IFX_INLINE void IfxVadc_Adc_getGroupResult(IfxVadc_Adc_Group *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
1225 {
1226 IfxVadc_getGroupResult(group->group, results, resultOffset, numResults);
1227 }
1228
1229
1230 IFX_INLINE void IfxVadc_Adc_getModuleConfig(IfxVadc_Adc *vadc, IfxVadc_Adc_Config *config)
1231 {
1232 config->vadc = vadc->vadc;
1233 config->analogFrequency = IfxVadc_getAdcAnalogFrequency(vadc->vadc);
1234 config->digitalFrequency = IfxVadc_getAdcDigitalFrequency(vadc->vadc);
1235 config->globalInputClass[0].resolution = IfxVadc_getGlobalResolution(vadc->vadc, 0);
1236 config->globalInputClass[1].resolution = IfxVadc_getGlobalResolution(vadc->vadc, 1);
1237 config->globalInputClass[0].sampleTime = IfxVadc_getGlobalSampleTime(vadc->vadc, 0, config->analogFrequency);
1238 config->globalInputClass[1].sampleTime = IfxVadc_getGlobalSampleTime(vadc->vadc, 1, config->analogFrequency);
1239 config->moduleFrequency = IfxVadc_getAdcModuleFrequency();
1240 config->startupCalibration = IfxVadc_getStartupCalibration(vadc->vadc);
1241 }
1242
1243
1244 IFX_INLINE IfxVadc_Status IfxVadc_Adc_getQueueStatus(IfxVadc_Adc_Group *group)
1245 {
1246 return IfxVadc_getQueueStatus(group->group);
1247 }
1248
1249
1250 IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResult(IfxVadc_Adc_Channel *channel)
1251 {
1252 return IfxVadc_getResult(channel->group->group, channel->resultreg);
1253 }
1254
1255
1256 IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResultBasedOnRequestSource(IfxVadc_Adc_Group *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
1257 {
1258 return IfxVadc_getResultBasedOnRequestSource(group->module.vadc, group->group, channel, sourceType);
1259 }
1260
1261
1262 IFX_INLINE IfxVadc_Status IfxVadc_Adc_getScanStatus(IfxVadc_Adc_Group *group)
1263 {
1264 return IfxVadc_getScanStatus(group->group);
1265 }
1266
1267
1268 IFX_INLINE Ifx_VADC *IfxVadc_Adc_getVadcFromGroup(const IfxVadc_Adc_Group *group)
1269 {
1270 return group->module.vadc;
1271 }
1272
1273
1274 IFX_INLINE void IfxVadc_Adc_setBackgroundScan(IfxVadc_Adc *vadc, IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
1275 {
1276 IfxVadc_setBackgroundScan(vadc->vadc, group->groupId, channels, mask);
1277 }
1278
1279
1280 IFX_INLINE void IfxVadc_Adc_setScan(IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
1281 {
1282 IfxVadc_setScan(group->group, channels, mask);
1283 }
1284
1285
1286 IFX_INLINE void IfxVadc_Adc_startBackgroundScan(IfxVadc_Adc *vadc)
1287 {
1288 IfxVadc_startBackgroundScan(vadc->vadc);
1289 }
1290
1291
1292 IFX_INLINE void IfxVadc_Adc_startQueue(IfxVadc_Adc_Group *group)
1293 {
1294 IfxVadc_startQueue(group->group);
1295 }
1296
1297
1298 IFX_INLINE void IfxVadc_Adc_startScan(IfxVadc_Adc_Group *group)
1299 {
1300 IfxVadc_startScan(group->group);
1301 }
1302
1303
1304 IFX_INLINE Ifx_VADC_RESD IfxVadc_Adc_getDebugResult(IfxVadc_Adc_Channel *channel)
1305 {
1306 return IfxVadc_getDebugResult(channel->group->group, channel->resultreg);
1307 }
1308
1309
1310 #endif /* IFXVADC_ADC_H */
IfxVadc_Adc_setScan
IFX_INLINE void IfxVadc_Adc_setScan(IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
Configures an autoscan.
Definition: IfxVadc_Adc.h:1280
IfxVadc_Adc_ChannelConfig::channelSrcNr
IfxVadc_SrcNr channelSrcNr
Service node of the channel trigger.
Definition: IfxVadc_Adc.h:486
IfxVadc_Adc_getGlobalResult
IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_Adc_getGlobalResult(IfxVadc_Adc *vadc)
returns result stored in global result register
Definition: IfxVadc_Adc.h:1212
IfxVadc_Adc_GatingTriggerConfig
Gating/Trigger configuration structure.
Definition: IfxVadc_Adc.h:384
IfxVadc_Adc_EmuxControl::channels
uint8 channels
specifies channel number
Definition: IfxVadc_Adc.h:524
IfxVadc_Adc_GroupConfig::module
IFX_CONST IfxVadc_Adc * module
Specifies pointer to the IfxVadc_Adc module handle.
Definition: IfxVadc_Adc.h:534
IfxVadc_Adc_QueueConfig
Queue configuration structure.
Definition: IfxVadc_Adc.h:435
IfxVadc_Adc_ChannelConfig::synchonize
boolean synchonize
Specifies synchronized conversion channel.
Definition: IfxVadc_Adc.h:478
IfxVadc_ChannelId
IfxVadc_ChannelId
VADC Channels.
Definition: IfxVadc.h:139
IfxVadc_Adc_Config::moduleFrequency
float32 moduleFrequency
module Frequency in Hz.
Definition: IfxVadc_Adc.h:506
IfxVadc_ChannelSelectionStyle
IfxVadc_ChannelSelectionStyle
External Multiplexer Channel Selection Style as defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCSS.
Definition: IfxVadc.h:203
IfxVadc_getResultBasedOnRequestSource
Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset...
Definition: IfxVadc.c:302
IfxVadc_EmuxCodingScheme
IfxVadc_EmuxCodingScheme
Specifies the External Coding scheme(binary/gray) defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD.
Definition: IfxVadc.h:220
IfxVadc_Adc_ChannelConfig
Channel configuration structure.
Definition: IfxVadc_Adc.h:475
IfxVadc_startBackgroundScan
IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc)
Starts a background scan.
Definition: IfxVadc.h:2459
IfxVadc_Adc_Config::supplyVoltage
IfxVadc_LowSupplyVoltageSelect supplyVoltage
Select Low Power Supply Voltage.
Definition: IfxVadc_Adc.h:510
IfxVadc_Adc_initGroupConfig
IFX_EXTERN void IfxVadc_Adc_initGroupConfig(IfxVadc_Adc_GroupConfig *config, IfxVadc_Adc *vadc)
Initialise buffer with default VADC configuration.
Definition: IfxVadc_Adc.c:691
IfxVadc_ConversionType
IfxVadc_ConversionType
type of conversion
Definition: IfxVadc.h:212
IfxVadc_Adc_Channel::resultreg
IfxVadc_ChannelResult resultreg
Specifies allocated result register.
Definition: IfxVadc_Adc.h:469
IfxVadc_Adc_ChannelConfig::inputClass
IfxVadc_InputClasses inputClass
Specifies input class selection.
Definition: IfxVadc_Adc.h:488
IfxVadc_Adc_Config::globalInputClass
IfxVadc_Adc_ClassConfig globalInputClass[IFXVADC_NUM_GLOBAL_INPUTCLASSES]
Specifies the global conversion settings one and two.
Definition: IfxVadc_Adc.h:503
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
IfxVadc_Adc_Channel::channel
IfxVadc_ChannelId channel
Specifies the channel index.
Definition: IfxVadc_Adc.h:468
IfxVadc_Adc_initModuleConfig
IFX_EXTERN void IfxVadc_Adc_initModuleConfig(IfxVadc_Adc_Config *config, Ifx_VADC *vadc)
Initialise buffer with default VADC configuration.
Definition: IfxVadc_Adc.c:797
IfxVadc_Adc_setBackgroundScan
IFX_INLINE void IfxVadc_Adc_setBackgroundScan(IfxVadc_Adc *vadc, IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
configures a background scan
Definition: IfxVadc_Adc.h:1274
IfxVadc_ArbitrationRounds
IfxVadc_ArbitrationRounds
Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)
Definition: IfxVadc.h:97
IfxVadc_Adc_GatingTriggerConfig::gatingMode
IfxVadc_GatingMode gatingMode
Specifies gating mode. High level, Low Level or Gating disabled.
Definition: IfxVadc_Adc.h:388
IfxVadc_Adc_EmuxControl::code
IfxVadc_EmuxCodingScheme code
specifes binary/gray code
Definition: IfxVadc_Adc.h:521
IfxVadc_Adc_getModuleConfig
IFX_INLINE void IfxVadc_Adc_getModuleConfig(IfxVadc_Adc *vadc, IfxVadc_Adc_Config *config)
Get the current VADC configuration (e.g. VADC frequency)
Definition: IfxVadc_Adc.h:1230
IfxVadc_Adc_initChannelConfig
IFX_EXTERN void IfxVadc_Adc_initChannelConfig(IfxVadc_Adc_ChannelConfig *config, const IfxVadc_Adc_Group *group)
Initialise buffer with default channel configuration.
Definition: IfxVadc_Adc.c:441
IfxVadc_ChannelReference
IfxVadc_ChannelReference
ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:162
IfxVadc_Adc_GroupConfig::queueRequest
IfxVadc_Adc_QueueConfig queueRequest
Specifies queued mode configuration.
Definition: IfxVadc_Adc.h:539
IfxVadc_Adc_initChannel
IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initChannel(IfxVadc_Adc_Channel *channel, const IfxVadc_Adc_ChannelConfig *config)
Initialise one channel with given configuration.
Definition: IfxVadc_Adc.c:347
IfxVadc_Adc_ChannelConfig::channelServProvider
IfxSrc_Tos channelServProvider
Interrupt service provider for the channel trigger interrupt.
Definition: IfxVadc_Adc.h:484
IfxVadc_getAdcDigitalFrequency
float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc)
Returns the configured Fadcd VADC digital clock frequency in Hz.
Definition: IfxVadc.c:186
IfxVadc_getQueueStatus
IfxVadc_Status IfxVadc_getQueueStatus(Ifx_VADC_G *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full...
Definition: IfxVadc.c:284
IfxVadc_Adc_getGroupConfig
IFX_EXTERN void IfxVadc_Adc_getGroupConfig(IfxVadc_Adc_Group *group, IfxVadc_Adc_GroupConfig *config)
Get the current group configuration (e.g. vadc frequency)
Definition: IfxVadc_Adc.c:233
IfxVadc_Adc_GroupConfig::backgroundScanRequest
IfxVadc_Adc_BackgroundScanConfig backgroundScanRequest
Specifies back ground scan configuration.
Definition: IfxVadc_Adc.h:540
IfxVadc_Adc_QueueConfig::flushQueueAfterInit
boolean flushQueueAfterInit
Specifies if the queue is flushed after configuration.
Definition: IfxVadc_Adc.h:437
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:131
IfxVadc_Adc_GatingTriggerConfig::triggerSource
IfxVadc_TriggerSource triggerSource
Specifies used Trigger input for group.
Definition: IfxVadc_Adc.h:387
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxVadc_Adc_ChannelConfig::resultServProvider
IfxSrc_Tos resultServProvider
Interrupt service provider for the result trigger interrupt.
Definition: IfxVadc_Adc.h:483
float32
float float32
Definition: Platform_Types.h:170
IfxVadc_Adc_getChannelConversionTime
IFX_EXTERN float32 IfxVadc_Adc_getChannelConversionTime(IfxVadc_Adc_Channel *channel, IfxVadc_ConversionType conversionMode)
get the channel Conversion Time
Definition: IfxVadc_Adc.c:227
IfxVadc_Adc_ChannelConfig::upperBoundary
IfxVadc_BoundarySelection upperBoundary
Specifies upper boundary selection.
Definition: IfxVadc_Adc.h:492
Ifx_Assert.h
Assert functions.
IfxVadc_Adc_EmuxControl::mode
IfxVadc_ExternalMultiplexerMode mode
Specifies the External Multiplexer mode.
Definition: IfxVadc_Adc.h:518
IfxVadc_Adc_Config
VADC module configuration structure.
Definition: IfxVadc_Adc.h:500
IfxVadc_Adc
VADC handle data structure.
Definition: IfxVadc_Adc.h:377
IfxVadc_Emux_Out
VADC External Mux pin mapping structure.
Definition: IfxVadc_PinMap.h:65
IfxVadc_Adc_getDebugResult
IFX_INLINE Ifx_VADC_RESD IfxVadc_Adc_getDebugResult(IfxVadc_Adc_Channel *channel)
Get debug result (Function does not care about the alignment)
Definition: IfxVadc_Adc.h:1304
IfxVadc_Adc_getResult
IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResult(IfxVadc_Adc_Channel *channel)
Get conversion result (Function does not care about the alignment)
Definition: IfxVadc_Adc.h:1250
IfxVadc_ChannelResolution
IfxVadc_ChannelResolution
ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
Definition: IfxVadc.h:170
IfxVadc_TriggerMode
IfxVadc_TriggerMode
trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
Definition: IfxVadc.h:475
IfxVadc_getGlobalResult
IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc)
return conversion result stored in the Global result Register
Definition: IfxVadc.h:1986
IfxVadc_Adc_GatingTriggerConfig::gatingSource
IfxVadc_GatingSource gatingSource
Specifies used gate input for group.
Definition: IfxVadc_Adc.h:386
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
IfxVadc_Adc_getScanStatus
IFX_INLINE IfxVadc_Status IfxVadc_Adc_getScanStatus(IfxVadc_Adc_Group *group)
Gives the scan status for a group.
Definition: IfxVadc_Adc.h:1262
IfxVadc_RequestSource
IfxVadc_RequestSource
Request sources.
Definition: IfxVadc.h:428
IfxVadc_ChannelResult
IfxVadc_ChannelResult
Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:180
IfxVadc_GatingMode
IfxVadc_GatingMode
gating mode defined in MODULE_VADC.BRSMR.ENGT
Definition: IfxVadc.h:281
IfxVadc_BoundarySelection
IfxVadc_BoundarySelection
BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:129
IfxVadc_Adc_initExternalMultiplexerMode
IFX_EXTERN void IfxVadc_Adc_initExternalMultiplexerMode(Ifx_VADC *vadc, const IfxVadc_Adc_EmuxControl *emuxControl)
initalise external multiplexer.
Definition: IfxVadc_Adc.c:834
IfxVadc_Adc_ChannelConfig::limitCheck
IfxVadc_LimitCheck limitCheck
Specifies boundary band selection upper/lower.
Definition: IfxVadc_Adc.h:494
IfxVadc_Adc_EmuxPinConfig::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxVadc_Adc.h:459
IfxVadc_getGroupResult
IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group.
Definition: IfxVadc.h:2015
IfxVadc_setBackgroundScan
IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
configures a background scan; can also stop autoscan if all channels are 0
Definition: IfxVadc.h:2227
IfxVadc_setScan
void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask)
Configures an (auto-)scan.
Definition: IfxVadc.c:551
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IfxVadc_Adc_ClassConfig
Input class configuration structure.
Definition: IfxVadc_Adc.h:418
IfxVadc_Adc_BackgroundScanConfig::triggerConfig
IfxVadc_Adc_GatingTriggerConfig triggerConfig
trigger and gating configuration.
Definition: IfxVadc_Adc.h:411
IfxVadc_Adc_startBackgroundScan
IFX_INLINE void IfxVadc_Adc_startBackgroundScan(IfxVadc_Adc *vadc)
Starts a background scan.
Definition: IfxVadc_Adc.h:1286
IfxVadc_EmuxSampleTimeControl
IfxVadc_EmuxSampleTimeControl
External Multiplexer sample time control defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST.
Definition: IfxVadc.h:237
IfxVadc_Adc_getGroupRegsFromGroup
IFX_INLINE Ifx_VADC_G * IfxVadc_Adc_getGroupRegsFromGroup(const IfxVadc_Adc_Group *group)
Gets the current group register set.
Definition: IfxVadc_Adc.h:1218
IfxVadc_Adc_GroupConfig::master
IfxVadc_GroupId master
Specifies the master group. If master is different from groupId, then the group is configured as slav...
Definition: IfxVadc_Adc.h:536
IfxVadc_startScan
IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group)
Starts an autoscan on the specified group.
Definition: IfxVadc.h:2471
IFXVADC_NUM_INPUTCLASSES
#define IFXVADC_NUM_INPUTCLASSES
Number of group specific Input Class.
Definition: IfxVadc_cfg.h:88
IfxVadc_Adc::vadc
Ifx_VADC * vadc
Specifies the pointer to the VADC module registers.
Definition: IfxVadc_Adc.h:379
IfxVadc_Adc_ScanConfig::autoscanEnabled
boolean autoscanEnabled
Specifies autoscan functionality.
Definition: IfxVadc_Adc.h:447
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxVadc_Adc_Config::startupCalibration
boolean startupCalibration
Can be enabled to execute a startup calibration (disabled by default). Note that this option will als...
Definition: IfxVadc_Adc.h:507
IfxVadc_Adc_BackgroundScanConfig::requestSlotStartMode
IfxVadc_RequestSlotStartMode requestSlotStartMode
start mode for request background scan source.
Definition: IfxVadc_Adc.h:413
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
IfxVadc_EmuxInterface
IfxVadc_EmuxInterface
Specifies the Emux interface.
Definition: IfxVadc.h:228
IfxVadc_Adc_getVadcFromGroup
IFX_INLINE Ifx_VADC * IfxVadc_Adc_getVadcFromGroup(const IfxVadc_Adc_Group *group)
Gets the current group module register address.
Definition: IfxVadc_Adc.h:1268
IfxVadc_Adc_EmuxControl::channelSelectionStyle
IfxVadc_ChannelSelectionStyle channelSelectionStyle
External Multiplexer Channel Selection Style.
Definition: IfxVadc_Adc.h:527
IfxVadc_Adc_ClassConfig::sampleTime
float32 sampleTime
Specifies the requested sample time for input class.
Definition: IfxVadc_Adc.h:420
IfxVadc_InputClasses
IfxVadc_InputClasses
inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16) ...
Definition: IfxVadc.h:313
IfxVadc_Adc_EmuxControl::startChannel
IfxVadc_EmuxSelectValue startChannel
specifies the external channel start value(EMUX[x:0]) x- specifies external channel number ...
Definition: IfxVadc_Adc.h:519
IfxVadc_RequestSlotPriority
IfxVadc_RequestSlotPriority
Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
Definition: IfxVadc.h:410
IfxVadc_ExternalMultiplexerMode
IfxVadc_ExternalMultiplexerMode
Specifies External Multiplexer Mode define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE.
Definition: IfxVadc.h:261
IfxVadc_Adc_EmuxControl
Emux Control Structure.
Definition: IfxVadc_Adc.h:515
IfxVadc_Adc_addToQueue
IFX_INLINE void IfxVadc_Adc_addToQueue(IfxVadc_Adc_Channel *channel, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill...
Definition: IfxVadc_Adc.h:1174
IfxVadc_Adc_ChannelConfig::globalResultUsage
boolean globalResultUsage
Specifies storage in global result register.
Definition: IfxVadc_Adc.h:477
IfxVadc_startQueue
IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group)
Starts a queue of a group by generating a trigger event through software.
Definition: IfxVadc.h:2465
IfxVadc_Adc_ChannelConfig::rightAlignedStorage
boolean rightAlignedStorage
Specifies result is right aligned.
Definition: IfxVadc_Adc.h:480
IfxVadc_Adc_EmuxControl::emuxOutPinConfig
IfxVadc_Adc_EmuxPinConfig emuxOutPinConfig
configure the emux output pin
Definition: IfxVadc_Adc.h:526
IFXVADC_NUM_GLOBAL_INPUTCLASSES
#define IFXVADC_NUM_GLOBAL_INPUTCLASSES
Number of ADC group input classes.
Definition: IfxVadc_cfg.h:98
IfxVadc_Adc_ChannelConfig::resultPriority
Ifx_Priority resultPriority
Interrupt priority of the result trigger interrupt, if 0 the interrupt is disable.
Definition: IfxVadc_Adc.h:481
IfxVadc_Adc_ChannelConfig::boundaryMode
IfxVadc_BoundaryExtension boundaryMode
Specifies Standard mode of fast compare mode.
Definition: IfxVadc_Adc.h:493
IfxVadc_Adc_ArbiterConfig::requestSlotScanEnabled
boolean requestSlotScanEnabled
request scan if enabled.
Definition: IfxVadc_Adc.h:402
IfxVadc_Adc_deInitModule
IFX_INLINE void IfxVadc_Adc_deInitModule(IfxVadc_Adc *vadc)
Reset the VADC module.
Definition: IfxVadc_Adc.h:1198
IfxVadc_Adc_ChannelConfig::resultSrcNr
IfxVadc_SrcNr resultSrcNr
Service node of the result trigger.
Definition: IfxVadc_Adc.h:485
IfxVadc_getStartupCalibration
IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc)
get SUCAL bit field status
Definition: IfxVadc.h:2129
IfxVadc_LowSupplyVoltageSelect
IfxVadc_LowSupplyVoltageSelect
Low Power Supply Voltage Select.
Definition: IfxVadc.h:333
IfxVadc_Adc_Channel
Channel handle data structure.
Definition: IfxVadc_Adc.h:466
IfxVadc_Adc_Group::groupId
IfxVadc_GroupId groupId
Specifies the group index.
Definition: IfxVadc_Adc.h:430
IfxVadc_Adc_getBackgroundScanStatus
IFX_INLINE IfxVadc_Status IfxVadc_Adc_getBackgroundScanStatus(IfxVadc_Adc *vadc)
Gives the background scan status for a group.
Definition: IfxVadc_Adc.h:1206
IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister
IFX_INLINE void IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister(IfxVadc_Adc *vadc, boolean waitForRead)
access function to enable/disable wait for read mode for global result register
Definition: IfxVadc_Adc.h:1192
IfxVadc_Adc_getQueueStatus
IFX_INLINE IfxVadc_Status IfxVadc_Adc_getQueueStatus(IfxVadc_Adc_Group *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full...
Definition: IfxVadc_Adc.h:1244
IfxVadc_getBackgroundScanStatus
IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc)
Gives the background scan status for a group.
Definition: IfxVadc.c:198
IfxVadc_Adc_ChannelConfig::reference
IfxVadc_ChannelReference reference
Specifies Reference selection.
Definition: IfxVadc_Adc.h:489
IfxVadc_Adc_BackgroundScanConfig::requestSlotPrio
IfxVadc_RequestSlotPriority requestSlotPrio
priority of used background scan request slot.
Definition: IfxVadc_Adc.h:412
IfxVadc_Adc_ChannelConfig::channelPriority
Ifx_Priority channelPriority
Interrupt priority of the channel trigger interrupt, if 0 the interrupt is disable.
Definition: IfxVadc_Adc.h:482
IfxVadc_addToQueue
IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill...
Definition: IfxVadc.h:1730
IfxVadc_Adc_ChannelConfig::resultRegister
IfxVadc_ChannelResult resultRegister
Specifies Result register selection.
Definition: IfxVadc_Adc.h:490
IfxVadc_EmuxSelectValue
IfxVadc_EmuxSelectValue
specifies the External Channel Start select value defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET
Definition: IfxVadc.h:246
IfxVadc_Adc_startQueue
IFX_INLINE void IfxVadc_Adc_startQueue(IfxVadc_Adc_Group *group)
Starts a queue of a group by generating a trigger event through software.
Definition: IfxVadc_Adc.h:1292
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:142
IfxVadc_Adc_GroupConfig::arbiter
IfxVadc_Adc_ArbiterConfig arbiter
Arbiter configuration structure.
Definition: IfxVadc_Adc.h:542
IfxVadc_Adc_getResultBasedOnRequestSource
IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResultBasedOnRequestSource(IfxVadc_Adc_Group *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result based on the Request Source. (Function does not care about the alignment) value...
Definition: IfxVadc_Adc.h:1256
IfxVadc_BoundaryExtension
IfxVadc_BoundaryExtension
Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:107
IfxVadc_Adc_EmuxControl::sampleTimeControl
IfxVadc_EmuxSampleTimeControl sampleTimeControl
specifies when to use sample time control
Definition: IfxVadc_Adc.h:522
IfxVadc_getDebugResult
IFX_INLINE Ifx_VADC_RESD IfxVadc_getDebugResult(Ifx_VADC_G *group, uint32 resultIdx)
Get debug conversion result.
Definition: IfxVadc.h:2483
IfxVadc_getGlobalResolution
IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
get global input class resolution
Definition: IfxVadc.h:1980
IfxVadc_Adc_GroupConfig
Group configuration structure.
Definition: IfxVadc_Adc.h:532
IfxVadc_Adc_getGroupResult
IFX_INLINE void IfxVadc_Adc_getGroupResult(IfxVadc_Adc_Group *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group.
Definition: IfxVadc_Adc.h:1224
IfxVadc_getScanStatus
IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group)
Gives the scan status for a group.
Definition: IfxVadc.c:352
IfxVadc_Adc_Group
Group handle data structure.
Definition: IfxVadc_Adc.h:426
IfxVadc_Adc_ChannelConfig::backgroundChannel
boolean backgroundChannel
Specifies channel is used as background channel.
Definition: IfxVadc_Adc.h:479
IfxVadc_Adc_Channel::group
IFX_CONST IfxVadc_Adc_Group * group
Specifies the group of the channel.
Definition: IfxVadc_Adc.h:470
IfxVadc_Adc_Config::analogFrequency
float32 analogFrequency
Specifies analog ADC Frequency.
Definition: IfxVadc_Adc.h:505
IfxVadc_Adc_clearQueue
IFX_INLINE void IfxVadc_Adc_clearQueue(IfxVadc_Adc_Group *group)
Flush the contents of the queue of a group.
Definition: IfxVadc_Adc.h:1180
IfxVadc_Adc_EmuxControl::emuxInterface
IfxVadc_EmuxInterface emuxInterface
specifies the Emux interface
Definition: IfxVadc_Adc.h:525
IfxVadc_Adc_configureWaitForReadMode
IFX_INLINE void IfxVadc_Adc_configureWaitForReadMode(IfxVadc_Adc_Channel *channel, boolean waitForRead)
pointer to the VADC channel
Definition: IfxVadc_Adc.h:1186
IfxVadc_Adc_SYNCTR_STSEL
uint8 IfxVadc_Adc_SYNCTR_STSEL
Definition: IfxVadc_Adc.h:367
IfxVadc_TriggerSource
IfxVadc_TriggerSource
Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
Definition: IfxVadc.h:485
IfxVadc_getResult
IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset...
Definition: IfxVadc.h:2083
IfxVadc_Adc_ChannelConfig::channelId
IfxVadc_ChannelId channelId
Specifies the channel index.
Definition: IfxVadc_Adc.h:487
IfxVadc_Adc_initExternalMultiplexerModeConfig
IFX_EXTERN void IfxVadc_Adc_initExternalMultiplexerModeConfig(IfxVadc_Adc_EmuxControl *emuxConfig, Ifx_VADC *vadc)
initialise default configuration for external multiplexer
Definition: IfxVadc_Adc.c:813
IfxVadc_LimitCheck
IfxVadc_LimitCheck
ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:323
IfxVadc_Adc_Config::digitalFrequency
float32 digitalFrequency
Specifies digital ADC Frequency.
Definition: IfxVadc_Adc.h:504
IfxVadc_Adc_Group::group
Ifx_VADC_G * group
Pointer to the group registers.
Definition: IfxVadc_Adc.h:429
IfxVadc_Adc_GroupConfig::disablePostCalibration
boolean disablePostCalibration
Specifies if calibration after conversion (post calibration) should be disabled.
Definition: IfxVadc_Adc.h:541
IfxVadc_Adc_BackgroundScanConfig::autoBackgroundScanEnabled
boolean autoBackgroundScanEnabled
background autoscan functionality enable or disable.
Definition: IfxVadc_Adc.h:410
IfxVadc_getGlobalSampleTime
IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
get global input class sample time in sec
Definition: IfxVadc.h:1996
IfxVadc_Adc_ChannelConfig::lowerBoundary
IfxVadc_BoundarySelection lowerBoundary
Specifies lower boundary selection.
Definition: IfxVadc_Adc.h:491
IfxVadc_Adc_GatingTriggerConfig::triggerMode
IfxVadc_TriggerMode triggerMode
Specifies trigger mode. Rising, falling any edge leads to an trigger event.
Definition: IfxVadc_Adc.h:389
IfxVadc_getAdcAnalogFrequency
float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc)
Returns the configured Fadci VADC analog clock frequency in Hz.
Definition: IfxVadc.c:180
IfxVadc_GroupId
IfxVadc_GroupId
VADC Groups
Definition: IfxVadc_cfg.h:116
IfxVadc_RequestSlotStartMode
IfxVadc_RequestSlotStartMode
Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
Definition: IfxVadc.h:420
IfxVadc_Adc_disableModule
IFX_EXTERN void IfxVadc_Adc_disableModule(Ifx_VADC *vadc)
Disable VADC Module.
Definition: IfxVadc_Adc.c:141
IfxVadc_Adc_ScanConfig
Scan mode configuration structure.
Definition: IfxVadc_Adc.h:445
IfxVadc_Adc_EmuxPinConfig
Definition: IfxVadc_Adc.h:455
IfxVadc_Adc_ClassConfig::resolution
IfxVadc_ChannelResolution resolution
Specifies the conversion Mode 8,10,12Bit or 10bit fast compare.
Definition: IfxVadc_Adc.h:421
IfxVadc_Adc_initGroup
IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initGroup(IfxVadc_Adc_Group *group, const IfxVadc_Adc_GroupConfig *config)
Initialise the VADC group (also autoscan and queue modes) Slave Groups must initialize first...
Definition: IfxVadc_Adc.c:469
IfxVadc_Adc_Group::module
IfxVadc_Adc module
The VADC handle structure.
Definition: IfxVadc_Adc.h:428
IfxVadc_getAdcModuleFrequency
float32 IfxVadc_getAdcModuleFrequency(void)
Module Frequency in Hz.
Definition: IfxVadc.c:192
IfxVadc_Status
IfxVadc_Status
API return values defined in MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U MODULE_VADC.BRSPNDx
Definition: IfxVadc.h:462
IfxVadc_Adc_ArbiterConfig::requestSlotQueueEnabled
boolean requestSlotQueueEnabled
request queue if enabled.
Definition: IfxVadc_Adc.h:401
IfxVadc_Adc_ArbiterConfig
Arbiter configuration structure.
Definition: IfxVadc_Adc.h:398
IfxVadc_Adc_getChannelConfig
IFX_EXTERN void IfxVadc_Adc_getChannelConfig(IfxVadc_Adc_Channel *channel, IfxVadc_Adc_ChannelConfig *config)
Get the current channel configuration (e.g. sample settings)
Definition: IfxVadc_Adc.c:147
IfxVadc_Adc_ArbiterConfig::arbiterRoundLength
IfxVadc_ArbitrationRounds arbiterRoundLength
Specifies arbiter round length.
Definition: IfxVadc_Adc.h:400
IfxVadc_resetKernel
void IfxVadc_resetKernel(Ifx_VADC *vadc)
Resets the kernel.
Definition: IfxVadc.c:494
TRUE
#define TRUE
Definition: Platform_Types.h:90
IfxVadc_Adc_startScan
IFX_INLINE void IfxVadc_Adc_startScan(IfxVadc_Adc_Group *group)
Starts an autoscan on the specified group.
Definition: IfxVadc_Adc.h:1298
IfxVadc_clearQueue
IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue)
Clears all the queue entries including backup stage.
Definition: IfxVadc.h:1765
IfxVadc_Adc_initModule
IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initModule(IfxVadc_Adc *vadc, const IfxVadc_Adc_Config *config)
Initialise the VADC to run with the expected frequency and calibration.
Definition: IfxVadc_Adc.c:742
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxVadc_Adc_deInitGroup
IFX_EXTERN void IfxVadc_Adc_deInitGroup(IfxVadc_Adc_Group *group)
Reset the VADC group.
Definition: IfxVadc_Adc.c:127
IfxVadc_GatingSource
IfxVadc_GatingSource
External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
Definition: IfxVadc.h:291
IfxVadc_configureWaitForReadMode
IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
access function to enable/disable wait for read mode for result registers
Definition: IfxVadc.h:1771
IfxVadc_Adc_ArbiterConfig::requestSlotBackgroundScanEnabled
boolean requestSlotBackgroundScanEnabled
request background scan if enabled.
Definition: IfxVadc_Adc.h:403
IfxVadc_SrcNr
IfxVadc_SrcNr
Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
Definition: IfxVadc.h:446
IfxVadc_Adc_BackgroundScanConfig
Background scan mode configuration structure.
Definition: IfxVadc_Adc.h:408
IfxVadc.h
VADC basic functionality.
IfxVadc_Adc_EmuxPinConfig::outputMode
IfxPort_OutputMode outputMode
the pin output mode which should be configured
Definition: IfxVadc_Adc.h:458
IfxVadc_Adc_GroupConfig::scanRequest
IfxVadc_Adc_ScanConfig scanRequest
Specifies scan mode configuration.
Definition: IfxVadc_Adc.h:538
IfxVadc_configureWaitForReadModeForGlobalResultRegister
IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead)
access function to enable/disable wait for read mode for global result register
Definition: IfxVadc.h:1777


iLLD_TC26B: IfxVadc_PinMap.c Source File

  • _PinMap
IfxVadc_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxVadc_PinMap.c
3 * \brief VADC I/O map
4 * \ingroup IfxLld_Vadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 */
42
43 #include "IfxVadc_PinMap.h"
44
45 IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT = {&MODULE_VADC, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt5};
46 IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT = {&MODULE_VADC, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt5};
47 IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT = {&MODULE_VADC, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt5};
48 IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT = {&MODULE_VADC, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt5};
49 IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT = {&MODULE_VADC, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt5};
50 IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT = {&MODULE_VADC, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt5};
51 IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT = {&MODULE_VADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt5};
52 IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT = {&MODULE_VADC, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt5};
53 IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT = {&MODULE_VADC, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt5};
54 IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT = {&MODULE_VADC, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt5};
55 IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT = {&MODULE_VADC, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt5};
56 IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT = {&MODULE_VADC, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt5};
57 IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt6};
58 IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt6};
59 IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt6};
60 IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt6};
61 IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt6};
62 IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt6};
63 IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt6};
64 IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt6};
65 IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt5};
66 IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt5};
67 IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt3};
68 IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt3};
69 IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt5};
70 IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt7};
71 IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt5};
72 IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt4};
73 IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt5};
74 IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt2};
75 IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 0}, 0};
76 IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,10}, 10};
77 IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,11}, 11};
78 IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,12}, 12};
79 IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,13}, 13};
80 IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 1}, 1};
81 IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 2}, 2};
82 IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 3}, 3};
83 IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 4}, 4};
84 IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 5}, 5};
85 IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 6}, 6};
86 IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 7}, 7};
87 IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 8}, 8};
88 IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,16}, 0};
89 IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,26}, 10};
90 IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 2}, 10};
91 IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,27}, 11};
92 IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 3}, 11};
93 IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,28}, 12};
94 IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,29}, 13};
95 IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,17}, 1};
96 IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,18}, 2};
97 IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,19}, 3};
98 IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,20}, 4};
99 IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,21}, 5};
100 IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,24}, 8};
101 IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 0}, 8};
102 IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,25}, 9};
103 IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 1}, 9};
104 IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,32}, 0};
105 IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,44}, 10};
106 IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,45}, 11};
107 IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,46}, 12};
108 IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,47}, 13};
109 IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,48}, 14};
110 IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,49}, 15};
111 IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,33}, 1};
112 IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,35}, 3};
113 IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,36}, 4};
114 IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 6}, 4};
115 IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,37}, 5};
116 IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 7}, 5};
117 IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,38}, 6};
118 IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 8}, 6};
119 IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,39}, 7};
120 IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 9}, 7};
121 IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,12}, 0};
122 IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 2}, 10};
123 IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 1}, 11};
124 IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,11}, 1};
125 IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,10}, 2};
126 IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 9}, 3};
127 IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 8}, 4};
128 IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 7}, 5};
129 IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 6}, 6};
130 IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 5}, 7};
131 IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 4}, 8};
132 IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 3}, 9};
133
134
135 const IfxVadc_Emux_Out *IfxVadc_Emux_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS] = {
136 {
137 &IfxVadc_EMUX10_P00_6_OUT,
138 &IfxVadc_EMUX11_P00_7_OUT,
139 &IfxVadc_EMUX12_P00_8_OUT,
140 &IfxVadc_EMUX00_P02_6_OUT,
141 &IfxVadc_EMUX01_P02_7_OUT,
142 &IfxVadc_EMUX02_P02_8_OUT,
143 &IfxVadc_EMUX02_P33_1_OUT,
144 &IfxVadc_EMUX01_P33_2_OUT,
145 &IfxVadc_EMUX00_P33_3_OUT,
146 &IfxVadc_EMUX12_P33_4_OUT,
147 &IfxVadc_EMUX11_P33_5_OUT,
148 &IfxVadc_EMUX10_P33_6_OUT
149 }
150 };
151
152 const IfxVadc_GxBfl_Out *IfxVadc_GxBfl_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS] = {
153 {
154 {
155 &IfxVadc_G0BFL0_P33_4_OUT,
156 &IfxVadc_G0BFL1_P33_5_OUT,
157 &IfxVadc_G0BFL2_P33_6_OUT,
158 &IfxVadc_G0BFL3_P33_7_OUT,
159 NULL_PTR,
160 NULL_PTR
161 },
162 {
163 &IfxVadc_G1BFL0_P33_0_OUT,
164 &IfxVadc_G1BFL1_P33_1_OUT,
165 &IfxVadc_G1BFL2_P33_2_OUT,
166 &IfxVadc_G1BFL3_P33_3_OUT,
167 NULL_PTR,
168 NULL_PTR
169 },
170 {
171 &IfxVadc_G2BFL0_P00_4_OUT,
172 &IfxVadc_G2BFL1_P00_5_OUT,
173 &IfxVadc_G2BFL2_P00_6_OUT,
174 &IfxVadc_G2BFL3_P00_7_OUT,
175 NULL_PTR,
176 NULL_PTR
177 },
178 {
179 &IfxVadc_G3BFL0_P10_0_OUT,
180 &IfxVadc_G3BFL1_P10_1_OUT,
181 &IfxVadc_G3BFL2_P10_2_OUT,
182 &IfxVadc_G3BFL3_P10_3_OUT,
183 &IfxVadc_G3BFL0_P10_6_OUT,
184 &IfxVadc_G3BFL1_P10_7_OUT
185 }
186 }
187 };
188
189 const IfxVadc_Vadcg_In *IfxVadc_Vadcg_In_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS] = {
190 {
191 {
192 &IfxVadc_G0_0_AN0_IN,
193 &IfxVadc_G0_1_AN1_IN,
194 &IfxVadc_G0_2_AN2_IN,
195 &IfxVadc_G0_3_AN3_IN,
196 &IfxVadc_G0_4_AN4_IN,
197 &IfxVadc_G0_5_AN5_IN,
198 &IfxVadc_G0_6_AN6_IN,
199 &IfxVadc_G0_7_AN7_IN,
200 &IfxVadc_G0_8_AN8_IN,
201 NULL_PTR,
202 &IfxVadc_G0_10_AN10_IN,
203 &IfxVadc_G0_11_AN11_IN,
204 &IfxVadc_G0_12_AN12_IN,
205 &IfxVadc_G0_13_AN13_IN,
206 NULL_PTR,
207 NULL_PTR
208 },
209 {
210 &IfxVadc_G1_0_AN16_IN,
211 &IfxVadc_G1_1_AN17_IN,
212 &IfxVadc_G1_2_AN18_IN,
213 &IfxVadc_G1_3_AN19_IN,
214 &IfxVadc_G1_4_AN20_IN,
215 &IfxVadc_G1_5_AN21_IN,
216 NULL_PTR,
217 NULL_PTR,
218 &IfxVadc_G1_8_P40_0_IN,
219 &IfxVadc_G1_9_P40_1_IN,
220 &IfxVadc_G1_10_P40_2_IN,
221 &IfxVadc_G1_11_P40_3_IN,
222 &IfxVadc_G1_12_AN28_IN,
223 &IfxVadc_G1_13_AN29_IN,
224 NULL_PTR,
225 NULL_PTR
226 },
227 {
228 &IfxVadc_G2_0_AN32_IN,
229 &IfxVadc_G2_1_AN33_IN,
230 NULL_PTR,
231 &IfxVadc_G2_3_AN35_IN,
232 &IfxVadc_G2_4_P40_6_IN,
233 &IfxVadc_G2_5_P40_7_IN,
234 &IfxVadc_G2_6_P40_8_IN,
235 &IfxVadc_G2_7_P40_9_IN,
236 NULL_PTR,
237 NULL_PTR,
238 &IfxVadc_G2_10_AN44_IN,
239 &IfxVadc_G2_11_AN45_IN,
240 &IfxVadc_G2_12_AN46_IN,
241 &IfxVadc_G2_13_AN47_IN,
242 &IfxVadc_G2_14_AN48_IN,
243 &IfxVadc_G2_15_AN49_IN
244 },
245 {
246 &IfxVadc_G3_0_P00_12_IN,
247 &IfxVadc_G3_1_P00_11_IN,
248 &IfxVadc_G3_2_P00_10_IN,
249 &IfxVadc_G3_3_P00_9_IN,
250 &IfxVadc_G3_4_P00_8_IN,
251 &IfxVadc_G3_5_P00_7_IN,
252 &IfxVadc_G3_6_P00_6_IN,
253 &IfxVadc_G3_7_P00_5_IN,
254 &IfxVadc_G3_8_P00_4_IN,
255 &IfxVadc_G3_9_P00_3_IN,
256 &IfxVadc_G3_10_P00_2_IN,
257 &IfxVadc_G3_11_P00_1_IN,
258 NULL_PTR,
259 NULL_PTR,
260 NULL_PTR,
261 NULL_PTR
262 }
263 }
264 };
IfxVadc_G0_3_AN3_IN
IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN
Definition: IfxVadc_PinMap.c:82
IfxVadc_G2_5_AN37_IN
IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN
Definition: IfxVadc_PinMap.c:115
IfxVadc_Vadcg_In
VADC Analog Input.
Definition: IfxVadc_PinMap.h:73
IfxVadc_G0_1_AN1_IN
IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN
Definition: IfxVadc_PinMap.c:80
IfxVadc_G2BFL3_P00_7_OUT
IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT
Definition: IfxVadc_PinMap.c:68
IfxVadc_G3_6_P00_6_IN
IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN
Definition: IfxVadc_PinMap.c:129
IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS
#define IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS
Definition: IfxVadc_PinMap.h:174
IfxVadc_GroupId_1
VADC group 1.
Definition: IfxVadc_cfg.h:119
IfxVadc_G1_10_AN26_IN
IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN
Definition: IfxVadc_PinMap.c:89
IfxVadc_G0_7_AN7_IN
IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN
Definition: IfxVadc_PinMap.c:86
IfxVadc_G3_3_P00_9_IN
IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN
Definition: IfxVadc_PinMap.c:126
IfxVadc_G3BFL0_P10_0_OUT
IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT
Definition: IfxVadc_PinMap.c:69
IfxVadc_G3_9_P00_3_IN
IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN
Definition: IfxVadc_PinMap.c:132
IfxVadc_EMUX01_P33_2_OUT
IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT
Definition: IfxVadc_PinMap.c:48
IfxVadc_G1_1_AN17_IN
IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN
Definition: IfxVadc_PinMap.c:95
IfxVadc_G0BFL3_P33_7_OUT
IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT
Definition: IfxVadc_PinMap.c:60
IfxVadc_G1_10_P40_2_IN
IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN
Definition: IfxVadc_PinMap.c:90
IfxVadc_G0BFL1_P33_5_OUT
IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT
Definition: IfxVadc_PinMap.c:58
IfxVadc_G2_6_AN38_IN
IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN
Definition: IfxVadc_PinMap.c:117
IfxVadc_G1BFL0_P33_0_OUT
IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT
Definition: IfxVadc_PinMap.c:61
IfxVadc_G2_0_AN32_IN
IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN
Definition: IfxVadc_PinMap.c:104
IfxVadc_G2_6_P40_8_IN
IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN
Definition: IfxVadc_PinMap.c:118
IfxVadc_G2_11_AN45_IN
IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN
Definition: IfxVadc_PinMap.c:106
IfxVadc_Vadcg_In_pinTable
const IfxVadc_Vadcg_In * IfxVadc_Vadcg_In_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS]
Definition: IfxVadc_PinMap.c:189
IfxVadc_G3_11_P00_1_IN
IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN
Definition: IfxVadc_PinMap.c:123
IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS
#define IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS
Definition: IfxVadc_PinMap.h:173
IfxVadc_GroupId_3
VADC group 3.
Definition: IfxVadc_cfg.h:121
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:121
IfxVadc_EMUX12_P00_8_OUT
IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT
Definition: IfxVadc_PinMap.c:55
IfxVadc_PinMap.h
VADC I/O map.
IfxVadc_G3BFL3_P10_3_OUT
IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT
Definition: IfxVadc_PinMap.c:74
IfxVadc_G0_6_AN6_IN
IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN
Definition: IfxVadc_PinMap.c:85
IfxVadc_Emux_Out
VADC External Mux pin mapping structure.
Definition: IfxVadc_PinMap.h:65
IfxVadc_GroupId_0
VADC group 0.
Definition: IfxVadc_cfg.h:118
IfxVadc_EMUX02_P33_1_OUT
IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT
Definition: IfxVadc_PinMap.c:50
IfxVadc_G3_5_P00_7_IN
IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN
Definition: IfxVadc_PinMap.c:128
IfxVadc_G3BFL1_P10_7_OUT
IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT
Definition: IfxVadc_PinMap.c:72
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
IfxVadc_G1_9_P40_1_IN
IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN
Definition: IfxVadc_PinMap.c:103
IfxVadc_G1_2_AN18_IN
IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN
Definition: IfxVadc_PinMap.c:96
IfxVadc_GxBfl_Out_pinTable
const IfxVadc_GxBfl_Out * IfxVadc_GxBfl_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]
Definition: IfxVadc_PinMap.c:152
IfxVadc_EMUX00_P02_6_OUT
IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT
Definition: IfxVadc_PinMap.c:45
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:125
IfxVadc_EMUX11_P00_7_OUT
IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT
Definition: IfxVadc_PinMap.c:53
IfxVadc_G3BFL2_P10_2_OUT
IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT
Definition: IfxVadc_PinMap.c:73
IfxVadc_Emux_Out_pinTable
const IfxVadc_Emux_Out * IfxVadc_Emux_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
Definition: IfxVadc_PinMap.c:135
IfxVadc_G2_10_AN44_IN
IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN
Definition: IfxVadc_PinMap.c:105
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:122
IfxVadc_G2_14_AN48_IN
IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN
Definition: IfxVadc_PinMap.c:109
IfxVadc_G0_12_AN12_IN
IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN
Definition: IfxVadc_PinMap.c:78
IfxVadc_G2_4_P40_6_IN
IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN
Definition: IfxVadc_PinMap.c:114
IfxVadc_G1BFL1_P33_1_OUT
IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT
Definition: IfxVadc_PinMap.c:62
IfxVadc_EMUX12_P33_4_OUT
IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT
Definition: IfxVadc_PinMap.c:56
IfxVadc_G2_7_AN39_IN
IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN
Definition: IfxVadc_PinMap.c:119
IfxVadc_G1_8_AN24_IN
IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN
Definition: IfxVadc_PinMap.c:100
IfxVadc_G1_12_AN28_IN
IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN
Definition: IfxVadc_PinMap.c:93
IfxVadc_G2BFL0_P00_4_OUT
IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT
Definition: IfxVadc_PinMap.c:65
IfxVadc_G1_3_AN19_IN
IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN
Definition: IfxVadc_PinMap.c:97
IfxVadc_G0BFL0_P33_4_OUT
IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT
Definition: IfxVadc_PinMap.c:57
IfxVadc_G1_8_P40_0_IN
IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN
Definition: IfxVadc_PinMap.c:101
IfxVadc_G0_0_AN0_IN
IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN
Definition: IfxVadc_PinMap.c:75
IfxVadc_G1BFL2_P33_2_OUT
IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT
Definition: IfxVadc_PinMap.c:63
IfxVadc_G1_11_P40_3_IN
IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN
Definition: IfxVadc_PinMap.c:92
IfxVadc_G0_13_AN13_IN
IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN
Definition: IfxVadc_PinMap.c:79
IfxVadc_G0_4_AN4_IN
IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN
Definition: IfxVadc_PinMap.c:83
IfxVadc_G1_13_AN29_IN
IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN
Definition: IfxVadc_PinMap.c:94
IfxVadc_G0_11_AN11_IN
IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN
Definition: IfxVadc_PinMap.c:77
IfxVadc_G1_5_AN21_IN
IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN
Definition: IfxVadc_PinMap.c:99
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:123
IfxVadc_G1_9_AN25_IN
IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN
Definition: IfxVadc_PinMap.c:102
IfxVadc_EMUX10_P00_6_OUT
IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT
Definition: IfxVadc_PinMap.c:51
IfxVadc_G3_4_P00_8_IN
IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN
Definition: IfxVadc_PinMap.c:127
IfxVadc_G2BFL1_P00_5_OUT
IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT
Definition: IfxVadc_PinMap.c:66
IfxVadc_G0_8_AN8_IN
IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN
Definition: IfxVadc_PinMap.c:87
IfxVadc_G0BFL2_P33_6_OUT
IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT
Definition: IfxVadc_PinMap.c:59
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:126
IfxVadc_G3BFL1_P10_1_OUT
IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT
Definition: IfxVadc_PinMap.c:71
IFXVADC_PINMAP_NUM_MODULES
#define IFXVADC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxVadc_PinMap.h:171
IfxVadc_G3_2_P00_10_IN
IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN
Definition: IfxVadc_PinMap.c:125
IfxVadc_EMUX01_P02_7_OUT
IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT
Definition: IfxVadc_PinMap.c:47
IfxVadc_GxBfl_Out
VADC Boundary Flag pin mapping structure.
Definition: IfxVadc_PinMap.h:56
IFXVADC_PINMAP_NUM_GROUPS
#define IFXVADC_PINMAP_NUM_GROUPS
Definition: IfxVadc_PinMap.h:172
IfxVadc_G2_4_AN36_IN
IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN
Definition: IfxVadc_PinMap.c:113
IfxVadc_G3_1_P00_11_IN
IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN
Definition: IfxVadc_PinMap.c:124
IfxVadc_G2_12_AN46_IN
IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN
Definition: IfxVadc_PinMap.c:107
IfxVadc_G3_8_P00_4_IN
IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN
Definition: IfxVadc_PinMap.c:131
IfxVadc_G0_5_AN5_IN
IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN
Definition: IfxVadc_PinMap.c:84
IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS
#define IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS
Definition: IfxVadc_PinMap.h:175
IfxVadc_G0_10_AN10_IN
IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN
Definition: IfxVadc_PinMap.c:76
IfxVadc_EMUX11_P33_5_OUT
IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT
Definition: IfxVadc_PinMap.c:54
IfxVadc_G3_7_P00_5_IN
IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN
Definition: IfxVadc_PinMap.c:130
IfxVadc_EMUX10_P33_6_OUT
IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT
Definition: IfxVadc_PinMap.c:52
IfxVadc_G3_0_P00_12_IN
IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN
Definition: IfxVadc_PinMap.c:121
IfxVadc_G0_2_AN2_IN
IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN
Definition: IfxVadc_PinMap.c:81
IfxVadc_G1_11_AN27_IN
IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN
Definition: IfxVadc_PinMap.c:91
IfxVadc_G2_3_AN35_IN
IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN
Definition: IfxVadc_PinMap.c:112
IfxVadc_G1BFL3_P33_3_OUT
IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT
Definition: IfxVadc_PinMap.c:64
IfxVadc_G2_15_AN49_IN
IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN
Definition: IfxVadc_PinMap.c:110
IfxVadc_G2_5_P40_7_IN
IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN
Definition: IfxVadc_PinMap.c:116
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:124
IfxVadc_G1_0_AN16_IN
IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN
Definition: IfxVadc_PinMap.c:88
IfxVadc_G3_10_P00_2_IN
IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN
Definition: IfxVadc_PinMap.c:122
IfxVadc_G2BFL2_P00_6_OUT
IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT
Definition: IfxVadc_PinMap.c:67
IfxVadc_G2_7_P40_9_IN
IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN
Definition: IfxVadc_PinMap.c:120
IfxVadc_G1_4_AN20_IN
IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN
Definition: IfxVadc_PinMap.c:98
IfxVadc_G3BFL0_P10_6_OUT
IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT
Definition: IfxVadc_PinMap.c:70
IfxVadc_GroupId_2
VADC group 2.
Definition: IfxVadc_cfg.h:120
IfxVadc_G2_13_AN47_IN
IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN
Definition: IfxVadc_PinMap.c:108
IfxVadc_EMUX00_P33_3_OUT
IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT
Definition: IfxVadc_PinMap.c:46
IfxVadc_EMUX02_P02_8_OUT
IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT
Definition: IfxVadc_PinMap.c:49
IfxVadc_G2_1_AN33_IN
IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN
Definition: IfxVadc_PinMap.c:111


iLLD_TC26B: IfxVadc_PinMap.h Source File

  • _PinMap
IfxVadc_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxVadc_PinMap.h
3 * \brief VADC I/O map
4 * \ingroup IfxLld_Vadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Vadc_pinmap VADC Pin Mapping
42 * \ingroup IfxLld_Vadc
43 */
44
45 #ifndef IFXVADC_PINMAP_H
46 #define IFXVADC_PINMAP_H
47
48 #include <IfxVadc_reg.h>
49 #include <_Impl/IfxVadc_cfg.h>
50 #include <Port/Std/IfxPort.h>
51
52 /** \addtogroup IfxLld_Vadc_pinmap
53 * \{ */
54
55 /** \brief VADC Boundary Flag pin mapping structure */
56 typedef const struct
57 {
58 Ifx_VADC* module; /**< \brief Base address */
59 IfxVadc_GroupId groupId; /**< \brief Group ID */
60 IfxPort_Pin pin; /**< \brief Port pin */
61 IfxPort_OutputIdx select; /**< \brief Port control code */
62 } IfxVadc_GxBfl_Out;
63
64 /** \brief VADC External Mux pin mapping structure */
65 typedef const struct
66 {
67 Ifx_VADC* module; /**< \brief Base address */
68 IfxPort_Pin pin; /**< \brief Port pin */
69 IfxPort_OutputIdx select; /**< \brief Port control code */
70 } IfxVadc_Emux_Out;
71
72 /** \brief VADC Analog Input */
73 typedef const struct
74 {
75 Ifx_VADC* module; /**< \brief Base address */
76 IfxVadc_GroupId groupId; /**< \brief Group ID */
77 IfxPort_Pin pin; /**< \brief Port pin */
78 uint8 channelId; /**< \brief Channel ID */
79 } IfxVadc_Vadcg_In;
80
81 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT; /**< \brief VADC_EMUX00: VADC output */
82 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT; /**< \brief VADC_EMUX00: VADC output */
83 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT; /**< \brief VADC_EMUX01: VADC output */
84 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT; /**< \brief VADC_EMUX01: VADC output */
85 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT; /**< \brief VADC_EMUX02: VADC output */
86 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT; /**< \brief VADC_EMUX02: VADC output */
87 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT; /**< \brief VADC_EMUX10: VADC output */
88 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT; /**< \brief VADC_EMUX10: VADC output */
89 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT; /**< \brief VADC_EMUX11: VADC output */
90 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT; /**< \brief VADC_EMUX11: VADC output */
91 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT; /**< \brief VADC_EMUX12: VADC output */
92 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT; /**< \brief VADC_EMUX12: VADC output */
93 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT; /**< \brief VADC_G0BFL0: VADC output */
94 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT; /**< \brief VADC_G0BFL1: VADC output */
95 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT; /**< \brief VADC_G0BFL2: VADC output */
96 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT; /**< \brief VADC_G0BFL3: VADC output */
97 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT; /**< \brief VADC_G1BFL0: VADC output */
98 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT; /**< \brief VADC_G1BFL1: VADC output */
99 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT; /**< \brief VADC_G1BFL2: VADC output */
100 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT; /**< \brief VADC_G1BFL3: VADC output */
101 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT; /**< \brief VADC_G2BFL0: VADC output */
102 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT; /**< \brief VADC_G2BFL1: VADC output */
103 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT; /**< \brief VADC_G2BFL2: VADC output */
104 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT; /**< \brief VADC_G2BFL3: VADC output */
105 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT; /**< \brief VADC_G3BFL0: VADC output */
106 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT; /**< \brief VADC_G3BFL0: VADC output */
107 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT; /**< \brief VADC_G3BFL1: VADC output */
108 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT; /**< \brief VADC_G3BFL1: VADC output */
109 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT; /**< \brief VADC_G3BFL2: VADC output */
110 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT; /**< \brief VADC_G3BFL3: VADC output */
111 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN; /**< \brief VADC_G0_0: VADC input channel 0 of group 0 */
112 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN; /**< \brief VADC_G0_10: VADC input channel 10 of group 0 */
113 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN; /**< \brief VADC_G0_11: VADC input channel 11 of group 0 */
114 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN; /**< \brief VADC_G0_12: VADC input channel 12 of group 0 */
115 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN; /**< \brief VADC_G0_13: VADC input channel 13 of group 0 */
116 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN; /**< \brief VADC_G0_1: VADC input channel 1 of group 0 */
117 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN; /**< \brief VADC_G0_2: VADC input channel 2 of group 0 */
118 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN; /**< \brief VADC_G0_3: VADC input channel 3 of group 0 */
119 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN; /**< \brief VADC_G0_4: VADC input channel 4 of group 0 */
120 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN; /**< \brief VADC_G0_5: VADC input channel 5 of group 0 */
121 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN; /**< \brief VADC_G0_6: VADC input channel 6 of group 0 */
122 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN; /**< \brief VADC_G0_7: VADC input channel 7 of group 0 */
123 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN; /**< \brief VADC_G0_8: VADC input channel 8 of group 0 */
124 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN; /**< \brief VADC_G1_0: VADC input channel 0 of group 1 */
125 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN; /**< \brief VADC_G1_10: VADC input channel 10 of group 1 */
126 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN; /**< \brief VADC_G1_10: VADC input channel 10 of group 1 */
127 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN; /**< \brief VADC_G1_11: VADC input channel 11 of group 1 */
128 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN; /**< \brief VADC_G1_11: VADC input channel 11 of group 1 */
129 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN; /**< \brief VADC_G1_12: VADC input channel 12 of group 1 */
130 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN; /**< \brief VADC_G1_13: VADC input channel 13 of group 1 */
131 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN; /**< \brief VADC_G1_1: VADC input channel 1 of group 1 */
132 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN; /**< \brief VADC_G1_2: VADC input channel 2 of group 1 */
133 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN; /**< \brief VADC_G1_3: VADC input channel 3 of group 1 */
134 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN; /**< \brief VADC_G1_4: VADC input channel 4 of group 1 */
135 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN; /**< \brief VADC_G1_5: VADC input channel 5 of group 1 */
136 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN; /**< \brief VADC_G1_8: VADC input channel 8 of group 1 */
137 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN; /**< \brief VADC_G1_8: VADC input channel 8 of group 1 */
138 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN; /**< \brief VADC_G1_9: VADC input channel 9of group 1 */
139 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN; /**< \brief VADC_G1_9: VADC input channel 9 of group 1 */
140 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN; /**< \brief VADC_G2_0: VADC input channel 0 of group 2 */
141 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN; /**< \brief VADC_G2_10: VADC input channel 10 of group 2 */
142 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN; /**< \brief VADC_G2_11: VADC input channel 11 of group 2 */
143 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN; /**< \brief VADC_G2_12: VADC input channel 12 of group 24 */
144 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN; /**< \brief VADC_G2_13: VADC input channel 13 of group 2 */
145 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN; /**< \brief VADC_G2_14: VADC input channel 14 of group 2 */
146 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN; /**< \brief VADC_G2_15: VADC input channel 15 of group 2 */
147 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN; /**< \brief VADC_G2_1: VADC input channel 1 of group 2 */
148 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN; /**< \brief VADC_G2_3: VADC input channel 3 of group 2 (mtm) */
149 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN; /**< \brief VADC_G2_4: VADC input channel 4 of group 2 */
150 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN; /**< \brief VADC_G2_4: VADC input channel 4 of group 2 */
151 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN; /**< \brief VADC_G2_5: VADC input channel 5 of group 2 */
152 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN; /**< \brief VADC_G2_5: VADC input channel 5 of group 2 */
153 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN; /**< \brief VADC_G2_6: VADC input channel 6 of group 2 */
154 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN; /**< \brief VADC_G2_6: VADC input channel 6 of group 2 */
155 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN; /**< \brief VADC_G2_7: VADC input channel 7 of group 2 */
156 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN; /**< \brief VADC_G2_7: VADC input channel 7 of group 2 */
157 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN; /**< \brief VADC_G3_0: VADC input */
158 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN; /**< \brief VADC_G3_10: VADC input */
159 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN; /**< \brief VADC_G3_11: VADC input */
160 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN; /**< \brief VADC_G3_1: VADC input */
161 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN; /**< \brief VADC_G3_2: VADC input */
162 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN; /**< \brief VADC_G3_3: VADC input */
163 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN; /**< \brief VADC_G3_4: VADC input */
164 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN; /**< \brief VADC_G3_5: VADC input */
165 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN; /**< \brief VADC_G3_6: VADC input */
166 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN; /**< \brief VADC_G3_7: VADC input */
167 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN; /**< \brief VADC_G3_8: VADC input */
168 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN; /**< \brief VADC_G3_9: VADC input */
169
170 /** \brief Table dimensions */
171 #define IFXVADC_PINMAP_NUM_MODULES 1
172 #define IFXVADC_PINMAP_NUM_GROUPS 4
173 #define IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS 12
174 #define IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS 6
175 #define IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS 16
176
177
178 /** \brief IfxVadc_Emux_Out table */
179 IFX_EXTERN const IfxVadc_Emux_Out *IfxVadc_Emux_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS];
180
181 /** \brief IfxVadc_GxBfl_Out table */
182 IFX_EXTERN const IfxVadc_GxBfl_Out *IfxVadc_GxBfl_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS];
183
184 /** \brief IfxVadc_Vadcg_In table */
185 IFX_EXTERN const IfxVadc_Vadcg_In *IfxVadc_Vadcg_In_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS];
186
187 /** \} */
188
189 #endif /* IFXVADC_PINMAP_H */
IfxVadc_G0_2_AN2_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN
VADC_G0_2: VADC input channel 2 of group 0.
Definition: IfxVadc_PinMap.h:117
IfxVadc_G1_2_AN18_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN
VADC_G1_2: VADC input channel 2 of group 1.
Definition: IfxVadc_PinMap.h:132
IfxVadc_G1_5_AN21_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN
VADC_G1_5: VADC input channel 5 of group 1.
Definition: IfxVadc_PinMap.h:135
IfxVadc_G1_8_P40_0_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN
VADC_G1_8: VADC input channel 8 of group 1.
Definition: IfxVadc_PinMap.h:137
IfxVadc_G3BFL0_P10_6_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT
VADC_G3BFL0: VADC output.
Definition: IfxVadc_PinMap.h:106
IfxVadc_G3_10_P00_2_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN
VADC_G3_10: VADC input.
Definition: IfxVadc_PinMap.h:158
IfxVadc_Vadcg_In
VADC Analog Input.
Definition: IfxVadc_PinMap.h:73
IfxVadc_G2_6_AN38_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN
VADC_G2_6: VADC input channel 6 of group 2.
Definition: IfxVadc_PinMap.h:153
IfxVadc_G1BFL2_P33_2_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT
VADC_G1BFL2: VADC output.
Definition: IfxVadc_PinMap.h:99
IfxVadc_G0_5_AN5_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN
VADC_G0_5: VADC input channel 5 of group 0.
Definition: IfxVadc_PinMap.h:120
IfxVadc_G3BFL3_P10_3_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT
VADC_G3BFL3: VADC output.
Definition: IfxVadc_PinMap.h:110
IfxVadc_GxBfl_Out::groupId
IfxVadc_GroupId groupId
Group ID.
Definition: IfxVadc_PinMap.h:59
IfxVadc_G1BFL3_P33_3_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT
VADC_G1BFL3: VADC output.
Definition: IfxVadc_PinMap.h:100
IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS
#define IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS
Definition: IfxVadc_PinMap.h:174
IfxVadc_G2BFL0_P00_4_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT
VADC_G2BFL0: VADC output.
Definition: IfxVadc_PinMap.h:101
IfxVadc_EMUX01_P02_7_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT
VADC_EMUX01: VADC output.
Definition: IfxVadc_PinMap.h:83
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:117
IfxVadc_G3BFL1_P10_1_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT
VADC_G3BFL1: VADC output.
Definition: IfxVadc_PinMap.h:107
IfxVadc_G1_0_AN16_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN
VADC_G1_0: VADC input channel 0 of group 1.
Definition: IfxVadc_PinMap.h:124
IfxVadc_EMUX00_P02_6_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT
VADC_EMUX00: VADC output.
Definition: IfxVadc_PinMap.h:81
IfxVadc_G0_10_AN10_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN
VADC_G0_10: VADC input channel 10 of group 0.
Definition: IfxVadc_PinMap.h:112
IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS
#define IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS
Definition: IfxVadc_PinMap.h:173
IfxVadc_G0_6_AN6_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN
VADC_G0_6: VADC input channel 6 of group 0.
Definition: IfxVadc_PinMap.h:121
IfxVadc_GxBfl_Out::module
Ifx_VADC * module
Base address.
Definition: IfxVadc_PinMap.h:58
IfxVadc_cfg.h
VADC on-chip implementation data.
IfxVadc_Emux_Out
VADC External Mux pin mapping structure.
Definition: IfxVadc_PinMap.h:65
IfxVadc_G3BFL2_P10_2_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT
VADC_G3BFL2: VADC output.
Definition: IfxVadc_PinMap.h:109
IfxVadc_G0_1_AN1_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN
VADC_G0_1: VADC input channel 1 of group 0.
Definition: IfxVadc_PinMap.h:116
IfxVadc_G0_11_AN11_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN
VADC_G0_11: VADC input channel 11 of group 0.
Definition: IfxVadc_PinMap.h:113
IfxVadc_G0_0_AN0_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN
VADC_G0_0: VADC input channel 0 of group 0.
Definition: IfxVadc_PinMap.h:111
IfxVadc_G3_3_P00_9_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN
VADC_G3_3: VADC input.
Definition: IfxVadc_PinMap.h:162
IfxVadc_G1_3_AN19_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN
VADC_G1_3: VADC input channel 3 of group 1.
Definition: IfxVadc_PinMap.h:133
IfxVadc_G2_0_AN32_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN
VADC_G2_0: VADC input channel 0 of group 2.
Definition: IfxVadc_PinMap.h:140
IfxVadc_G2_5_AN37_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN
VADC_G2_5: VADC input channel 5 of group 2.
Definition: IfxVadc_PinMap.h:151
IfxVadc_EMUX10_P00_6_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT
VADC_EMUX10: VADC output.
Definition: IfxVadc_PinMap.h:87
IfxVadc_EMUX11_P00_7_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT
VADC_EMUX11: VADC output.
Definition: IfxVadc_PinMap.h:89
IfxVadc_G2_11_AN45_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN
VADC_G2_11: VADC input channel 11 of group 2.
Definition: IfxVadc_PinMap.h:142
IfxVadc_G2_15_AN49_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN
VADC_G2_15: VADC input channel 15 of group 2.
Definition: IfxVadc_PinMap.h:146
IfxVadc_EMUX00_P33_3_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT
VADC_EMUX00: VADC output.
Definition: IfxVadc_PinMap.h:82
IfxVadc_G2BFL3_P00_7_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT
VADC_G2BFL3: VADC output.
Definition: IfxVadc_PinMap.h:104
IfxVadc_EMUX02_P02_8_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT
VADC_EMUX02: VADC output.
Definition: IfxVadc_PinMap.h:85
IfxVadc_EMUX12_P00_8_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT
VADC_EMUX12: VADC output.
Definition: IfxVadc_PinMap.h:91
IfxVadc_G3BFL1_P10_7_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT
VADC_G3BFL1: VADC output.
Definition: IfxVadc_PinMap.h:108
IfxVadc_GxBfl_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxVadc_PinMap.h:60
IfxVadc_G2_3_AN35_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN
VADC_G2_3: VADC input channel 3 of group 2 (mtm)
Definition: IfxVadc_PinMap.h:148
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxVadc_G0BFL3_P33_7_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT
VADC_G0BFL3: VADC output.
Definition: IfxVadc_PinMap.h:96
IfxVadc_EMUX12_P33_4_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT
VADC_EMUX12: VADC output.
Definition: IfxVadc_PinMap.h:92
IfxVadc_G1_11_AN27_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN
VADC_G1_11: VADC input channel 11 of group 1.
Definition: IfxVadc_PinMap.h:127
IfxVadc_EMUX10_P33_6_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT
VADC_EMUX10: VADC output.
Definition: IfxVadc_PinMap.h:88
IfxVadc_EMUX02_P33_1_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT
VADC_EMUX02: VADC output.
Definition: IfxVadc_PinMap.h:86
IfxVadc_Emux_Out_pinTable
IFX_EXTERN const IfxVadc_Emux_Out * IfxVadc_Emux_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
IfxVadc_Emux_Out table.
Definition: IfxVadc_PinMap.h:179
IfxVadc_EMUX01_P33_2_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT
VADC_EMUX01: VADC output.
Definition: IfxVadc_PinMap.h:84
IfxVadc_G3_7_P00_5_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN
VADC_G3_7: VADC input.
Definition: IfxVadc_PinMap.h:166
IfxVadc_G0_12_AN12_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN
VADC_G0_12: VADC input channel 12 of group 0.
Definition: IfxVadc_PinMap.h:114
IfxVadc_G1_9_AN25_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN
VADC_G1_9: VADC input channel 9of group 1.
Definition: IfxVadc_PinMap.h:138
IfxVadc_EMUX11_P33_5_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT
VADC_EMUX11: VADC output.
Definition: IfxVadc_PinMap.h:90
IfxVadc_G1_9_P40_1_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN
VADC_G1_9: VADC input channel 9 of group 1.
Definition: IfxVadc_PinMap.h:139
IfxVadc_G1_10_AN26_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN
VADC_G1_10: VADC input channel 10 of group 1.
Definition: IfxVadc_PinMap.h:125
IfxVadc_G1_12_AN28_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN
VADC_G1_12: VADC input channel 12 of group 1.
Definition: IfxVadc_PinMap.h:129
IfxVadc_G0BFL1_P33_5_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT
VADC_G0BFL1: VADC output.
Definition: IfxVadc_PinMap.h:94
IfxVadc_G3_6_P00_6_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN
VADC_G3_6: VADC input.
Definition: IfxVadc_PinMap.h:165
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:188
IFXVADC_PINMAP_NUM_MODULES
#define IFXVADC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxVadc_PinMap.h:171
IfxVadc_G2_4_AN36_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN
VADC_G2_4: VADC input channel 4 of group 2.
Definition: IfxVadc_PinMap.h:149
IfxVadc_G0BFL0_P33_4_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT
VADC_G0BFL0: VADC output.
Definition: IfxVadc_PinMap.h:93
IfxVadc_Vadcg_In_pinTable
IFX_EXTERN const IfxVadc_Vadcg_In * IfxVadc_Vadcg_In_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS]
IfxVadc_Vadcg_In table.
Definition: IfxVadc_PinMap.h:185
IfxVadc_G0_4_AN4_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN
VADC_G0_4: VADC input channel 4 of group 0.
Definition: IfxVadc_PinMap.h:119
IfxVadc_G3_1_P00_11_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN
VADC_G3_1: VADC input.
Definition: IfxVadc_PinMap.h:160
IfxVadc_G2BFL1_P00_5_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT
VADC_G2BFL1: VADC output.
Definition: IfxVadc_PinMap.h:102
IfxVadc_G0_8_AN8_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN
VADC_G0_8: VADC input channel 8 of group 0.
Definition: IfxVadc_PinMap.h:123
IfxVadc_G1BFL0_P33_0_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT
VADC_G1BFL0: VADC output.
Definition: IfxVadc_PinMap.h:97
IfxVadc_GxBfl_Out
VADC Boundary Flag pin mapping structure.
Definition: IfxVadc_PinMap.h:56
IFXVADC_PINMAP_NUM_GROUPS
#define IFXVADC_PINMAP_NUM_GROUPS
Definition: IfxVadc_PinMap.h:172
IfxVadc_G0_13_AN13_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN
VADC_G0_13: VADC input channel 13 of group 0.
Definition: IfxVadc_PinMap.h:115
IfxVadc_G2_10_AN44_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN
VADC_G2_10: VADC input channel 10 of group 2.
Definition: IfxVadc_PinMap.h:141
IfxVadc_GxBfl_Out_pinTable
IFX_EXTERN const IfxVadc_GxBfl_Out * IfxVadc_GxBfl_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]
IfxVadc_GxBfl_Out table.
Definition: IfxVadc_PinMap.h:182
IfxVadc_G2_12_AN46_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN
VADC_G2_12: VADC input channel 12 of group 24.
Definition: IfxVadc_PinMap.h:143
IfxVadc_G2_7_P40_9_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN
VADC_G2_7: VADC input channel 7 of group 2.
Definition: IfxVadc_PinMap.h:156
IfxVadc_G1BFL1_P33_1_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT
VADC_G1BFL1: VADC output.
Definition: IfxVadc_PinMap.h:98
IfxVadc_G2_4_P40_6_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN
VADC_G2_4: VADC input channel 4 of group 2.
Definition: IfxVadc_PinMap.h:150
IfxVadc_G3_9_P00_3_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN
VADC_G3_9: VADC input.
Definition: IfxVadc_PinMap.h:168
IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS
#define IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS
Definition: IfxVadc_PinMap.h:175
IfxVadc_G3_11_P00_1_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN
VADC_G3_11: VADC input.
Definition: IfxVadc_PinMap.h:159
IfxVadc_G1_1_AN17_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN
VADC_G1_1: VADC input channel 1 of group 1.
Definition: IfxVadc_PinMap.h:131
IfxVadc_GroupId
IfxVadc_GroupId
VADC Groups
Definition: IfxVadc_cfg.h:116
IfxVadc_G2_5_P40_7_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN
VADC_G2_5: VADC input channel 5 of group 2.
Definition: IfxVadc_PinMap.h:152
IfxVadc_G2_7_AN39_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN
VADC_G2_7: VADC input channel 7 of group 2.
Definition: IfxVadc_PinMap.h:155
IfxVadc_Vadcg_In::channelId
uint8 channelId
Channel ID.
Definition: IfxVadc_PinMap.h:78
IfxVadc_G2_14_AN48_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN
VADC_G2_14: VADC input channel 14 of group 2.
Definition: IfxVadc_PinMap.h:145
IfxVadc_G3_0_P00_12_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN
VADC_G3_0: VADC input.
Definition: IfxVadc_PinMap.h:157
IfxVadc_G1_13_AN29_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN
VADC_G1_13: VADC input channel 13 of group 1.
Definition: IfxVadc_PinMap.h:130
IfxVadc_G0BFL2_P33_6_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT
VADC_G0BFL2: VADC output.
Definition: IfxVadc_PinMap.h:95
IfxVadc_G1_11_P40_3_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN
VADC_G1_11: VADC input channel 11 of group 1.
Definition: IfxVadc_PinMap.h:128
IfxVadc_G1_4_AN20_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN
VADC_G1_4: VADC input channel 4 of group 1.
Definition: IfxVadc_PinMap.h:134
IfxVadc_G0_3_AN3_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN
VADC_G0_3: VADC input channel 3 of group 0.
Definition: IfxVadc_PinMap.h:118
IfxVadc_G0_7_AN7_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN
VADC_G0_7: VADC input channel 7 of group 0.
Definition: IfxVadc_PinMap.h:122
IfxVadc_G1_10_P40_2_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN
VADC_G1_10: VADC input channel 10 of group 1.
Definition: IfxVadc_PinMap.h:126
IfxVadc_G2BFL2_P00_6_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT
VADC_G2BFL2: VADC output.
Definition: IfxVadc_PinMap.h:103
IfxVadc_G3_2_P00_10_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN
VADC_G3_2: VADC input.
Definition: IfxVadc_PinMap.h:161
IfxVadc_G1_8_AN24_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN
VADC_G1_8: VADC input channel 8 of group 1.
Definition: IfxVadc_PinMap.h:136
uint8
unsigned char uint8
Definition: Platform_Types.h:108
IfxVadc_G3_8_P00_4_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN
VADC_G3_8: VADC input.
Definition: IfxVadc_PinMap.h:167
IfxVadc_G2_13_AN47_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN
VADC_G2_13: VADC input channel 13 of group 2.
Definition: IfxVadc_PinMap.h:144
IfxVadc_GxBfl_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxVadc_PinMap.h:61
IfxVadc_G2_6_P40_8_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN
VADC_G2_6: VADC input channel 6 of group 2.
Definition: IfxVadc_PinMap.h:154
IfxVadc_G3_4_P00_8_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN
VADC_G3_4: VADC input.
Definition: IfxVadc_PinMap.h:163
IfxVadc_G2_1_AN33_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN
VADC_G2_1: VADC input channel 1 of group 2.
Definition: IfxVadc_PinMap.h:147
IfxVadc_G3_5_P00_7_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN
VADC_G3_5: VADC input.
Definition: IfxVadc_PinMap.h:164
IfxPort.h
PORT basic functionality.
IfxVadc_G3BFL0_P10_0_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT
VADC_G3BFL0: VADC output.
Definition: IfxVadc_PinMap.h:105


iLLD_TC26B: IfxVadc_cfg.c Source File

  • _Impl
IfxVadc_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxVadc_cfg.c
3 * \brief VADC on-chip implementation data
4 *
5 * \version iLLD_1_0_1_12_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "IfxVadc_cfg.h"
47
48 /******************************************************************************/
49 /*-----------------------Exported Variables/Constants-------------------------*/
50 /******************************************************************************/
51
52 IFX_CONST uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS * 4) + (IFXVADC_NUM_ADC_COMMON_GROUPS * 4)] = {
53 (uint32)&SRC_VADC_G0_SR0,
54 (uint32)&SRC_VADC_G0_SR1,
55 (uint32)&SRC_VADC_G0_SR2,
56 (uint32)&SRC_VADC_G0_SR3,
57 (uint32)&SRC_VADC_G1_SR0,
58 (uint32)&SRC_VADC_G1_SR1,
59 (uint32)&SRC_VADC_G1_SR2,
60 (uint32)&SRC_VADC_G1_SR3,
61 (uint32)&SRC_VADC_G2_SR0,
62 (uint32)&SRC_VADC_G2_SR1,
63 (uint32)&SRC_VADC_G2_SR2,
64 (uint32)&SRC_VADC_G2_SR3,
65 (uint32)&SRC_VADC_G3_SR0,
66 (uint32)&SRC_VADC_G3_SR1,
67 (uint32)&SRC_VADC_G3_SR2,
68 (uint32)&SRC_VADC_G3_SR3,
69 (uint32)&SRC_VADC_CG0_SR0,
70 (uint32)&SRC_VADC_CG0_SR1,
71 (uint32)&SRC_VADC_CG0_SR2,
72 (uint32)&SRC_VADC_CG0_SR3,
73 (uint32)&SRC_VADC_CG1_SR0,
74 (uint32)&SRC_VADC_CG1_SR1,
75 (uint32)&SRC_VADC_CG1_SR2,
76 (uint32)&SRC_VADC_CG1_SR3
77 };
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxVadc_cfg_srcAddresses
IFX_CONST uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS *4)+(IFXVADC_NUM_ADC_COMMON_GROUPS *4)]
Definition: IfxVadc_cfg.c:52
IfxVadc_cfg.h
VADC on-chip implementation data.
IFXVADC_NUM_ADC_COMMON_GROUPS
#define IFXVADC_NUM_ADC_COMMON_GROUPS
Definition: IfxVadc_cfg.h:100
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFXVADC_NUM_ADC_GROUPS
#define IFXVADC_NUM_ADC_GROUPS
Number of ADC Groups.
Definition: IfxVadc_cfg.h:64


iLLD_TC26B: IfxVadc_cfg.h Source File

  • _Impl
IfxVadc_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxVadc_cfg.h
3 * \brief VADC on-chip implementation data
4 * \ingroup IfxLld_Vadc
5 *
6 * \version iLLD_1_0_1_12_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 * Use of this file is subject to the terms of use agreed between (i) you or
13 * the company in which ordinary course of business you are acting and (ii)
14 * Infineon Technologies AG or its licensees. If and as long as no such terms
15 * of use are agreed, use of this file is subject to following:
16 *
17 * Boost Software License - Version 1.0 - August 17th, 2003
18 *
19 * Permission is hereby granted, free of charge, to any person or organization
20 * obtaining a copy of the software and accompanying documentation covered by
21 * this license (the "Software") to use, reproduce, display, distribute,
22 * execute, and transmit the Software, and to prepare derivative works of the
23 * Software, and to permit third-parties to whom the Software is furnished to
24 * do so, all subject to the following:
25 *
26 * The copyright notices in the Software and this entire statement, including
27 * the above license grant, this restriction and the following disclaimer, must
28 * be included in all copies of the Software, in whole or in part, and all
29 * derivative works of the Software, unless such copies or derivative works are
30 * solely in the form of machine-executable object code generated by a source
31 * language processor.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
36 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
37 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
38 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
39 * DEALINGS IN THE SOFTWARE.
40 *
41 * \defgroup IfxLld_Vadc VADC
42 * \ingroup IfxLld
43 * \defgroup IfxLld_Vadc_Impl Implementation
44 * \ingroup IfxLld_Vadc
45 * \defgroup IfxLld_Vadc_Std Standard Driver
46 * \ingroup IfxLld_Vadc
47 */
48
49 #ifndef IFXVADC_CFG_H
50 #define IFXVADC_CFG_H 1
51
52 /******************************************************************************/
53 /*----------------------------------Includes----------------------------------*/
54 /******************************************************************************/
55
56 #include "Src/Std/IfxSrc.h"
57
58 /******************************************************************************/
59 /*-----------------------------------Macros-----------------------------------*/
60 /******************************************************************************/
61
62 /** \brief Number of ADC Groups
63 */
64 #define IFXVADC_NUM_ADC_GROUPS (4 )
65
66 /** \brief Number of calibrated ADC Groups
67 */
68 #define IFXVADC_NUM_ADC_CAL_GROUPS (4 )
69
70 /** \brief Maximum allowed analog frequency
71 */
72 #define IFXVADC_ANALOG_FREQUENCY_MAX (20000000)
73
74 /** \brief Minimum allowed analog frequency
75 */
76 #define IFXVADC_ANALOG_FREQUENCY_MIN (500000)
77
78 /** \brief Default analog frequency used in initModuleConfig function
79 */
80 #define IFXVADC_DEFAULT_ANALOG_FREQ (20000000)
81
82 /** \brief Number of Conversion request Slots
83 */
84 #define IFXVADC_NUM_REQUESTSLOTS (3)
85
86 /** \brief Number of group specific Input Class
87 */
88 #define IFXVADC_NUM_INPUTCLASSES (2)
89
90 /** \brief Maximum number of configurable bitfields in ACCPROT0 register
91 */
92 #define IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER (32)
93
94 #define IFXVADC_QUEUE_REFILL (1 << IFX_VADC_G_QBUR0_RF_OFF)
95
96 /** \brief Number of ADC group input classes.
97 */
98 #define IFXVADC_NUM_GLOBAL_INPUTCLASSES (2)
99
100 #define IFXVADC_NUM_ADC_COMMON_GROUPS (2)
101
102 #define IFXVADC_SAMPLETIME_MIN (2)
103
104 #define IFXVADC_NUM_EMUX_INTERFACE (2)
105
106 #define IFXVADC_NUM_MODULES (1)
107
108
109
110 /******************************************************************************/
111 /*-------------------------------Enumerations---------------------------------*/
112 /******************************************************************************/
113
114 /** \brief VADC Groups
115 */
116 typedef enum
117 {
118 IfxVadc_GroupId_0, /**< \brief VADC group 0 */
119 IfxVadc_GroupId_1, /**< \brief VADC group 1 */
120 IfxVadc_GroupId_2, /**< \brief VADC group 2 */
121 IfxVadc_GroupId_3, /**< \brief VADC group 3 */
122 IfxVadc_GroupId_global0, /**< \brief VADC group global0 */
123 IfxVadc_GroupId_global1 /**< \brief VADC group global1 */
124 } IfxVadc_GroupId;
125
126
127 /******************************************************************************/
128 /*-------------------Global Exported Variables/Constants----------------------*/
129 /******************************************************************************/
130
131 IFX_EXTERN IFX_CONST uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS *4) + (IFXVADC_NUM_ADC_COMMON_GROUPS * 4) ];
132
133
134 #endif /* IFXVADC_CFG_H */
IfxVadc_GroupId_1
VADC group 1.
Definition: IfxVadc_cfg.h:119
uint32
unsigned long uint32
Definition: Platform_Types.h:116
IfxVadc_GroupId_3
VADC group 3.
Definition: IfxVadc_cfg.h:121
IfxVadc_GroupId_0
VADC group 0.
Definition: IfxVadc_cfg.h:118
IfxVadc_GroupId_global0
VADC group global0.
Definition: IfxVadc_cfg.h:122
IfxSrc.h
SRC basic functionality.
IfxVadc_GroupId_global1
VADC group global1.
Definition: IfxVadc_cfg.h:123
IFXVADC_NUM_ADC_COMMON_GROUPS
#define IFXVADC_NUM_ADC_COMMON_GROUPS
Definition: IfxVadc_cfg.h:100
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:54
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
IfxVadc_GroupId
IfxVadc_GroupId
VADC Groups
Definition: IfxVadc_cfg.h:116
IFXVADC_NUM_ADC_GROUPS
#define IFXVADC_NUM_ADC_GROUPS
Number of ADC Groups.
Definition: IfxVadc_cfg.h:64
IfxVadc_GroupId_2
VADC group 2.
Definition: IfxVadc_cfg.h:120
IfxVadc_cfg_srcAddresses
IFX_EXTERN IFX_CONST uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS *4)+(IFXVADC_NUM_ADC_COMMON_GROUPS *4)]
Definition: IfxVadc_cfg.h:131


iLLD_TC26B: Platform_Types.h Source File

  • Cpu
  • Std
Platform_Types.h
Go to the documentation of this file.
1 /**
2 * \file Platform_Types.h
3 *
4 * \version iLLD_1_0_1_12_0
5 * \copyright Copyright (c) 2020 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41 #ifndef PLATFORM_TYPES_H
42 #define PLATFORM_TYPES_H
43
44 /******************************************************************************
45 ** Includes **
46 ******************************************************************************/
47
48 /******************************************************************************
49 ** Global Macro Definitions **
50 ******************************************************************************/
51 #define PLATFORM_VENDOR_ID (17u)
52 #define PLATFORM_AR_RELEASE_MAJOR_VERSION (4u)
53 #define PLATFORM_AR_RELEASE_MINOR_VERSION (2u)
54 #define PLATFORM_AR_RELEASE_REVISION_VERSION (2u)
55 #define PLATFORM_SW_MAJOR_VERSION (1u)
56 #define PLATFORM_SW_MINOR_VERSION (0u)
57 #define PLATFORM_SW_PATCH_VERSION (0u)
58
59 /* [cover parentID={5294D975-045A-4d91-9A1A-B1765FAB4653}] */
60 /* CPU register width type definition */
61 #define CPU_TYPE_8 (8u)
62 #define CPU_TYPE_16 (16u)
63 #define CPU_TYPE_32 (32u)
64 /* Register width of CPU*/
65 #define CPU_TYPE CPU_TYPE_32 /* 32 bit */
66 /* [/cover] */
67
68
69 /* [cover parentID={FBA2FA55-430B-4dfb-82B1-C791F0878F9B}] */
70 /* Bit order type definition*/
71 #define MSB_FIRST (0u) /* Big Endian bit ordering */
72 #define LSB_FIRST (1u) /* Little Endian bit ordering */
73 /* Bit order of Register level*/
74 #define CPU_BIT_ORDER LSB_FIRST /* Little Endian */
75 /* [/cover] */
76
77
78 /* [cover parentID={0E2E6A28-264A-4d32-96EE-5F5C93286311}] */
79 /* Byte order type definition*/
80 #define HIGH_BYTE_FIRST (0u) /* Big Endian byte ordering */
81 #define LOW_BYTE_FIRST (1u) /* Little Endian byte ordering */
82 /* Byte order on Memory level*/
83 #define CPU_BYTE_ORDER LOW_BYTE_FIRST /* Little Endian */
84 /* [/cover] */
85
86
87 /* TRUE, FALSE symbol for Boolean types*/
88 /* [cover parentID={FF7F9840-8904-4b7d-83A7-988524B795DE}] */
89 #ifndef TRUE
90 #define TRUE (1u)
91 #endif
92 #ifndef FALSE
93 #define FALSE (0u)
94 #endif
95 /* [/cover] */
96 /******************************************************************************
97 ** Global Type Definitions **
98 ******************************************************************************/
99 /* AUTOSAR integer data types*/
100
101 /* unsigned char with a bit length that is the shortest one natively supported
102 by the platform.*/
103 /* [cover parentID={F7B51F71-6687-4e05-8408-7F5AAC55C638}] boolean [/cover]*/
104 typedef unsigned char boolean; /* for use with TRUE/FALSE */
105
106 /* 8bit unsigned : 0 .. 255 [0X00 .. 0XFF]*/
107 /* [cover parentID={4269E5AB-7F28-4803-8D60-7B4EC91CB087}] uint8 [/cover] */
108 typedef unsigned char uint8;
109
110 /* 16bit unsigned: 0..65535 [0x0000..0xFFFF]*/
111 /* [cover parentID={66E964CA-35D5-4013-BB61-1E824636D713}] uint16 [/cover] */
112 typedef unsigned short uint16;
113
114 /* 32bit unsigned: 0..4294967295 [0x00000000..0xFFFFFFFF]*/
115 /* [cover parentID={DA33B7A0-7CD3-45e7-9C9A-6D63FB8BA3DC}] uint32 [/cover] */
116 typedef unsigned long uint32;
117
118 /* 64bit unsigned
119 * 0..18446744073709551615 [0x0000000000000000..0xFFFFFFFFFFFFFFFF]*/
120 /* [cover parentID={3409E2A3-BF2D-44a5-9B00-A72300848166}] uint64 */
121 typedef unsigned long long uint64;
122
123 /* 8bit signed, 7 bit + 1 bit sign -128..+127 [0x80..0x7F]*/
124 /* [cover parentID={94E0756B-993D-4cae-9499-416CDFD6FEAF}] sint8[/cover]*/
125 typedef signed char sint8;
126
127 /* 16bit signed, 15 bit + 1 bit sign -32768..+32767 [0x8000..0x7FFF]*/
128 /* [cover parentID={B3482DFF-8DFF-41bd-95E0-0406E2451CB0}] sint16 [/cover]*/
129 typedef short sint16;
130
131 /* 32bit signed, 31 bit + 1 bit sign
132 -2147483648..+2147483647 [0x80000000..0x7FFFFFFF]*/
133 /* [cover parentID={B027B471-A1A2-456c-A015-35F4A34A88EF}] sint32 [/cover]*/
134 typedef long sint32;
135 /*
136 * 64bit signed, 63 bit + 1 bit sign
137 * -9223372036854775808..9223372036854775807
138 * [0x8000000000000000..0x7FFFFFFFFFFFFFFF]
139 */
140 /* [cover parentID={3CF3471C-EB1A-450c-B78F-4B96D226A1F5}] sint64 [/cover]*/
141 typedef long long sint64;
142
143 /* At least 8 bit*/
144 /* [cover parentID={F8719785-0A16-486e-AB85-0A2859402037}] uint8_least[/cover]*/
145 typedef unsigned long uint8_least;
146
147 /* At least 16 bit*/
148 /* [cover parentID={BEAD868D-0EC1-44f0-AFEE-B57401CC9E65}]uint16_least[/cover]*/
149 typedef unsigned long uint16_least;
150
151 /* least 32 bit*/
152 /* [cover parentID={9B9CC46A-0F61-4d25-8001-679CF210C135}]uint32_least[/cover]*/
153 typedef unsigned long uint32_least;
154
155 /* At least 7 bit + 1 bit sign*/
156 /* [cover parentID={5C0DE046-8407-4708-8D26-41B96731D89D}]sint8_least[/cover]*/
157 typedef signed long sint8_least;
158
159 /* At least 15 bit + 1 bit sign*/
160 /* [cover parentID={0A83DB6E-ECD8-42f0-B97C-057F9FBFEB6E}]sint16_least[/cover]*/
161 typedef signed long sint16_least;
162
163 /* At least 31 bit + 1 bit sign*/
164 /* [cover parentID={A65F0248-A0A7-4ab7-BAFA-A5428F4E8A96}]sint32_least[/cover]*/
165 typedef signed long sint32_least;
166
167 /* IEEE754-2008 single precision
168 * -3.4028235e+38..+3.4028235e+38*/
169 /* [cover parentID={BBC4F70E-DA81-4d37-BCA4-628A89B29517}] float32 [/cover]*/
170 typedef float float32; /* IEEE754-2008 single precision */
171
172 /* IEEE754-2008 double precision
173 * -1.7976931348623157e+308..+1.7976931348623157e+308*/
174 /* [cover parentID={0D62172C-9309-493a-8028-06A7299D7906}] float64 [/cover]*/
175 typedef double float64; /* IEEE754-2008 double precision */
176
177
178 /******************************************************************************
179 ** Global Constant Declarations **
180 ******************************************************************************/
181
182 /******************************************************************************
183 ** Global Variable Declarations **
184 ******************************************************************************/
185
186 /******************************************************************************
187 ** Global Function Declarations **
188 ******************************************************************************/
189
190 #endif /* PLATFORM_TYPES_H */
uint32
unsigned long uint32
Definition: Platform_Types.h:116
float32
float float32
Definition: Platform_Types.h:170
sint16_least
signed long sint16_least
Definition: Platform_Types.h:161
uint64
unsigned long long uint64
Definition: Platform_Types.h:121
sint16
short sint16
Definition: Platform_Types.h:129
sint32_least
signed long sint32_least
Definition: Platform_Types.h:165
uint8_least
unsigned long uint8_least
Definition: Platform_Types.h:145
sint64
long long sint64
Definition: Platform_Types.h:141
boolean
unsigned char boolean
Definition: Platform_Types.h:104
uint32_least
unsigned long uint32_least
Definition: Platform_Types.h:153
float64
double float64
Definition: Platform_Types.h:175
uint16
unsigned short uint16
Definition: Platform_Types.h:112
sint8_least
signed long sint8_least
Definition: Platform_Types.h:157
sint32
long sint32
Definition: Platform_Types.h:134
uint8
unsigned char uint8
Definition: Platform_Types.h:108
uint16_least
unsigned long uint16_least
Definition: Platform_Types.h:149
sint8
signed char sint8
Definition: Platform_Types.h:125


iLLD_TC26B: PwmHl.h Source File

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  • CpuGeneric
  • If
  • Ccu6If
PwmHl.h
Go to the documentation of this file.
1 /**
2 * \file PwmHl.h
3 * \brief Multi-channels, dual-complementary PWM interface
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:18 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_if_pwmhl PWM HL interface
41 * \ingroup library_srvsw_if
42 *
43 */
44
45 #ifndef PWMHL_H_
46 #define PWMHL_H_ 1
47
48 #include "Cpu/Std/Ifx_Types.h"
49
50 typedef struct PwmHl_s PwmHl;
51 typedef void (*PwmHl_Start)(PwmHl *handle);
52 typedef void (*PwmHl_Pause)(PwmHl *handle);
53 typedef void (*PwmHl_Resume)(PwmHl *handle);
54 typedef void (*PwmHl_Stop)(PwmHl *handle);
55
56 typedef struct
57 {
58 PwmHl_Start start;
59 PwmHl_Stop stop;
60 } PwmHl_Functions;
61
62 /** \brief Structure of the TPwm interface */
63 struct PwmHl_s
64 {
65 float32 t12Frequency; /**< \brief Actual timer12 frequency */
66 Ifx_TimerValue t12Period; /**< \brief Actual timer 12 period */
67 float32 t13Frequency; /**< \brief Actual timer13 frequency */
68 Ifx_TimerValue t13Period; /**< \brief Actual timer 13 period */
69 #if IFX_CFG_USE_STANDARD_INTERFACE
70 PwmHl_Functions functions; /**< \brief Actual timer period */
71 #endif
72 };
73
74 /** \brief Configuration structure of the TPwm interface */
75 typedef struct
76 {
77 float32 t12Frequency; /**< \brief Specify expected T12 PWM frequency in Hertz */
78 Ifx_TimerValue t12Period; /**< \brief Specify expected T12 PWM period in ticks. */
79 float32 t13Frequency; /**< \brief Specify expected T13 PWM frequency in Hertz */
80 Ifx_TimerValue t13Period; /**< \brief Specify expected T13 PWM period in ticks. */
81 Ifx_TimerValue phaseDelay; /**< \brief Specify the ticks before before updating each ouput hall pattern */
82 Ifx_TimerValue noiseFilter; /**< \brief Specify hall sensor noise filter */
83
84 Ifx_ActiveState activeState; /**< \brief Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of waitingTicks */
85 } PwmHl_Config;
86
87 #if IFX_CFG_USE_STANDARD_INTERFACE
88 IFX_INLINE void PwmHl_start(PwmHl *handle) {handle->functions.start(handle); }
89 IFX_INLINE void PwmHl_stop(PwmHl *handle) {handle->functions.stop(handle); }
90 #endif
91
92 #endif /* TPWM_H_ */
PwmHl_s::t13Frequency
float32 t13Frequency
Actual timer13 frequency.
Definition: PwmHl.h:67
PwmHl_Config::phaseDelay
Ifx_TimerValue phaseDelay
Specify the ticks before before updating each ouput hall pattern.
Definition: PwmHl.h:81
PwmHl_Resume
void(* PwmHl_Resume)(PwmHl *handle)
Definition: PwmHl.h:53
PwmHl_Functions::stop
PwmHl_Stop stop
Definition: PwmHl.h:59
PwmHl_s::t12Frequency
float32 t12Frequency
Actual timer12 frequency.
Definition: PwmHl.h:65
float32
float float32
Definition: Platform_Types.h:170
PwmHl_Config
Configuration structure of the TPwm interface.
Definition: PwmHl.h:75
PwmHl_Config::activeState
Ifx_ActiveState activeState
Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of w...
Definition: PwmHl.h:84
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
PwmHl_s
Structure of the TPwm interface.
Definition: PwmHl.h:63
PwmHl_Config::noiseFilter
Ifx_TimerValue noiseFilter
Specify hall sensor noise filter.
Definition: PwmHl.h:82
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
PwmHl_Stop
void(* PwmHl_Stop)(PwmHl *handle)
Definition: PwmHl.h:54
PwmHl_Functions::start
PwmHl_Start start
Definition: PwmHl.h:58
PwmHl_Start
void(* PwmHl_Start)(PwmHl *handle)
Definition: PwmHl.h:51
PwmHl_s::t12Period
Ifx_TimerValue t12Period
Actual timer 12 period.
Definition: PwmHl.h:66
PwmHl_s::t13Period
Ifx_TimerValue t13Period
Actual timer 13 period.
Definition: PwmHl.h:68
PwmHl_Functions
Definition: PwmHl.h:56
PwmHl_Pause
void(* PwmHl_Pause)(PwmHl *handle)
Definition: PwmHl.h:52
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101


iLLD_TC26B: info.dox File Reference

info.dox File Reference


iLLD_TC26B: SpiIf.c Source File

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  • CpuGeneric
  • If
SpiIf.c
Go to the documentation of this file.
1 /**
2 * \file SpiIf.c
3 * \brief SPI interface
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:21 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 */
41
42 #include "SpiIf.h"
43
44 void SpiIf_initConfig(SpiIf_Config *config)
45 {
46 config->mode = SpiIf_Mode_master;
47 config->rxPriority = 0;
48 config->txPriority = 0;
49 config->erPriority = 0;
50 config->isrProvider = IfxSrc_Tos_cpu0;
51 config->bufferSize = 0;
52 config->buffer = NULL_PTR;
53 config->maximumBaudrate = 0;
54 }
55
56
57 void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver)
58 {
59 config->driver = driver;
60 config->baudrate = 0;
61 config->mode.enabled = 1;
62 config->mode.autoCS = 1;
63 config->mode.loopback = 0;
64 config->mode.clockPolarity = SpiIf_ClockPolarity_idleLow;
65 config->mode.shiftClock = SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge;
66 config->mode.dataHeading = SpiIf_DataHeading_msbFirst;
67 config->mode.dataWidth = 8;
68 config->mode.csActiveLevel = Ifx_ActiveState_low;
69 config->mode.csLeadDelay = SpiIf_SlsoTiming_0;
70 config->mode.csTrailDelay = SpiIf_SlsoTiming_0;
71 config->mode.csInactiveDelay = SpiIf_SlsoTiming_0;
72 config->mode.parityCheck = 0;
73 config->mode.parityMode = Ifx_ParityMode_even;
74 config->errorChecks.baudrate = 0;
75 config->errorChecks.phase = 0;
76 config->errorChecks.receive = 0;
77 config->errorChecks.transmit = 0;
78 }
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:115
SpiIf_ChMode::dataHeading
uint32 dataHeading
SpiIf_DataHeading
Definition: SpiIf.h:193
SpiIf_ChConfig_::baudrate
float32 baudrate
Specifies the SPI baudrate.
Definition: SpiIf.h:228
SpiIf_ChConfig_
Definition: SpiIf.h:225
SpiIf_ChMode::csLeadDelay
SpiIf_SlsoTiming_HalfTsclk csLeadDelay
CS Lead Delay in Tsclk/2 units.
Definition: SpiIf.h:202
SpiIf_ChMode::loopback
uint32 loopback
0 = normal mode, 1 = loopback mode
Definition: SpiIf.h:190
SpiIf_ChMode::dataWidth
uint32 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: SpiIf.h:194
SpiIf_Config
Definition: SpiIf.h:160
Ifx_ParityMode_even
Definition: Ifx_Types.h:121
SpiIf_ChMode::parityCheck
uint32 parityCheck
0 = disabled, 1 = enabled
Definition: SpiIf.h:198
Spi_ErrorChecks::baudrate
uint32 baudrate
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:178
SpiIf_
Definition: SpiIf.h:150
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:70
SpiIf.h
SPI interface types.
SpiIf_ChMode::csInactiveDelay
SpiIf_SlsoTiming_HalfTsclk csInactiveDelay
CS Inactive Delay in Tsclk/2 units.
Definition: SpiIf.h:201
SpiIf_DataHeading_msbFirst
Definition: SpiIf.h:90
SpiIf_ChMode::clockPolarity
uint32 clockPolarity
SpiIf_ClockPolarity
Definition: SpiIf.h:191
SpiIf_Config::maximumBaudrate
float32 maximumBaudrate
Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock...
Definition: SpiIf.h:173
SpiIf_ChMode::shiftClock
uint32 shiftClock
SpiIf_ShiftClock
Definition: SpiIf.h:192
SpiIf_initChannelConfig
void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver)
Definition: SpiIf.c:57
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:68
SpiIf_Mode_master
Master mode.
Definition: SpiIf.h:130
SpiIf_Config::bufferSize
Ifx_SizeT bufferSize
Specifies the number of channels that can be buffered. If 0, buffering is disabled.
Definition: SpiIf.h:167
SpiIf_ChMode::enabled
uint32 enabled
1 = channel enabled, 0 = channel disabled
Definition: SpiIf.h:188
SpiIf_ChMode::parityMode
uint32 parityMode
Ifx_ParityMode
Definition: SpiIf.h:199
Spi_ErrorChecks::transmit
uint32 transmit
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:181
SpiIf_initConfig
void SpiIf_initConfig(SpiIf_Config *config)
Definition: SpiIf.c:44
SpiIf_Config::erPriority
Ifx_Priority erPriority
Specifies the priority of the error interrupt.
Definition: SpiIf.h:165
SpiIf_ClockPolarity_idleLow
Definition: SpiIf.h:103
SpiIf_SlsoTiming_0
Definition: SpiIf.h:76
SpiIf_Config::buffer
void * buffer
Specifies the buffer location.The buffer parameter must point on a free memory location where the buf...
Definition: SpiIf.h:168
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge
Definition: SpiIf.h:96
SpiIf_Config::isrProvider
IfxSrc_Tos isrProvider
Specifies the handler of the interrupts.
Definition: SpiIf.h:166
SpiIf_ChMode::autoCS
uint32 autoCS
1 = chip select is controlled by the hardware module or, 0 = by software.
Definition: SpiIf.h:189
SpiIf_ChConfig_::driver
SpiIf * driver
Pointer to an implementation of SPI interface driver, e.g. IfxQspi_SpiMaster_ChannelConfig.
Definition: SpiIf.h:227
SpiIf_Config::rxPriority
Ifx_Priority rxPriority
Specifies the priority of the receive interrupt.
Definition: SpiIf.h:163
SpiIf_Config::mode
SpiIf_Mode mode
Specifies the interface operation mode.
Definition: SpiIf.h:162
Spi_ErrorChecks::phase
uint32 phase
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:179
SpiIf_ChMode::csTrailDelay
SpiIf_SlsoTiming_HalfTsclk csTrailDelay
CS Trail Delay in Tsclk/2 units.
Definition: SpiIf.h:203
SpiIf_ChConfig_::mode
SpiIf_ChMode mode
Definition: SpiIf.h:229
SpiIf_ChMode::csActiveLevel
uint32 csActiveLevel
Ifx_ActiveState
Definition: SpiIf.h:196
SpiIf_Config::txPriority
Ifx_Priority txPriority
Specifies the priority of the transmit interrupt.
Definition: SpiIf.h:164
SpiIf_ChConfig_::errorChecks
Spi_ErrorChecks errorChecks
Definition: SpiIf.h:230
Spi_ErrorChecks::receive
uint32 receive
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:180


iLLD_TC26B: SpiIf.h Source File

  • Service
  • CpuGeneric
  • If
SpiIf.h
Go to the documentation of this file.
1 /**
2 * \file SpiIf.h
3 * \brief SPI interface types
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:22 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_if_spi SPI interface
41 * \ingroup library_srvsw_if
42 *
43 */
44
45 #ifndef SPIIF_H
46 #define SPIIF_H 1
47
48 //________________________________________________________________________________________
49 // INCLUDES
50
51 #include "Src/Std/IfxSrc.h" /* FIXME interface should not have dependencies to the HAL, an If type needs to be defined */
52
53 /** \addtogroup library_srvsw_if_spi
54 * \{ */
55
56 //________________________________________________________________________________________
57 // CONFIGURATION SWITCHES
58
59 //________________________________________________________________________________________
60 // HELPER MACROS
61
62 //________________________________________________________________________________________
63 // BASIC TYPES
64
65 /** \brief SPI Interface Status */
66 typedef enum
67 {
68 SpiIf_Status_ok,
69 SpiIf_Status_busy,
70 SpiIf_Status_unknown
71 } SpiIf_Status;
72
73 /** \brief Slave select output timing */
74 typedef enum
75 {
76 SpiIf_SlsoTiming_0 = 0, /**< zero delay clock */
77 SpiIf_SlsoTiming_1, /**< 1 half-clock delay */
78 SpiIf_SlsoTiming_2, /**< 2 half-clock delay */
79 SpiIf_SlsoTiming_3, /**< 3 half-clock delay */
80 SpiIf_SlsoTiming_4, /**< 4 half-clock delay */
81 SpiIf_SlsoTiming_5, /**< 5 half-clock delay */
82 SpiIf_SlsoTiming_6, /**< 6 half-clock delay */
83 SpiIf_SlsoTiming_7 /**< 7 half-clock delay */
84 } SpiIf_SlsoTiming;
85
86 /** \brief Heading */
87 typedef enum
88 {
89 SpiIf_DataHeading_lsbFirst = 0, /**< LSB first */
90 SpiIf_DataHeading_msbFirst /**< MSB first */
91 } SpiIf_DataHeading;
92
93 /** \brief Clock phase */
94 typedef enum
95 {
96 SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge = 0, /**< Shift Tx data on leading edge */
97 SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge /**< Shift Tx data on training edge */
98 } SpiIf_ShiftClock;
99
100 /** \brief Clock polarity */
101 typedef enum
102 {
103 SpiIf_ClockPolarity_idleLow = 0, /**< Idle clock line is low */
104 SpiIf_ClockPolarity_idleHigh /**< Idle clock line is high */
105 } SpiIf_ClockPolarity;
106
107 //________________________________________________________________________________________
108 // DATA STRUCTURES
109
110 /** \brief Alias to the channel structure */
111 typedef struct SpiIf_Ch_ SpiIf_Ch;
112 typedef struct SpiIf_ChConfig_ SpiIf_ChConfig;
113 typedef struct SpiIf_ SpiIf;
114
115 typedef volatile struct
116 {
117 uint32 onTransfer : 1; /**< \brief Channel status: On transfer */
118 uint32 byteAccess : 1; /**< \brief Channel status: 8bit / 16 bit access */
119 } SpiIf_Flags;
120
121 typedef struct
122 {
123 void *data;
124 Ifx_SizeT remaining;
125 } SpiIf_Job;
126
127 /** SPI operation modes */
128 typedef enum
129 { /* FIXME check conflicts with IfxQspi_Mode */
130 SpiIf_Mode_master, /**< \brief Master mode */
131 SpiIf_Mode_slave, /**< \brief Slave mode */
132 SpiIf_Mode_undefined /**< \brief Undefined mode */
133 } SpiIf_Mode;
134
135 typedef SpiIf_Status (*SpiIf_Exchange)(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData);
136 typedef SpiIf_Status (*SpiIf_GetStatus)(SpiIf_Ch *handle);
137 typedef void (*SpiIf_OnEvent)(SpiIf *handle);
138 typedef uint32 SpiIf_SlsoTiming_HalfTsclk; /* SPI slave select output delay - in half-clock (1/(2*baudrate)) units. */
139 /* A value of 0 would set a delay of 1/Fqspi */
140
141 typedef struct
142 {
143 SpiIf_Exchange exchange;
144 SpiIf_GetStatus getStatus;
145 SpiIf_OnEvent onTx;
146 SpiIf_OnEvent onRx;
147 SpiIf_OnEvent onError;
148 } SpiIf_funcs;
149
150 struct SpiIf_
151 {
152 pvoid driver; /**< \brief Spi specific driver */
153 uint32 sending; /**< \brief */
154 SpiIf_Ch *activeChannel; /**< \brief Channel actually transmitting / receiving */
155 uint32 txCount;
156 uint32 rxCount;
157 SpiIf_funcs functions;
158 };
159
160 typedef struct
161 {
162 SpiIf_Mode mode; /**< \brief Specifies the interface operation mode */
163 Ifx_Priority rxPriority; /**< \brief Specifies the priority of the receive interrupt */
164 Ifx_Priority txPriority; /**< \brief Specifies the priority of the transmit interrupt */
165 Ifx_Priority erPriority; /**< \brief Specifies the priority of the error interrupt */
166 IfxSrc_Tos isrProvider; /**< \brief Specifies the handler of the interrupts */
167 Ifx_SizeT bufferSize; /**< \brief Specifies the number of channels that can be buffered. If 0, buffering is disabled */
168 void *buffer; /**< \brief Specifies the buffer location.The buffer parameter must point on a free memory location where the
169 * buffer object will be initialised. The Size of this area must be at least
170 * equals to "Size + sizeof(Ifx_Fifo) + 8",
171 * with "Size=config->bufferSize * Ifx_AlignOn32(sizeof(Spi_Ch*))". Not tacking
172 * this in account may result in unpredictable behaviour. */
173 float32 maximumBaudrate; /**< \brief Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock */
174 } SpiIf_Config;
175
176 typedef struct
177 {
178 uint32 baudrate : 1; /**< \brief TRUE = checked, FALSE = ignored */
179 uint32 phase : 1; /**< \brief TRUE = checked, FALSE = ignored */
180 uint32 receive : 1; /**< \brief TRUE = checked, FALSE = ignored */
181 uint32 transmit : 1; /**< \brief TRUE = checked, FALSE = ignored */
182 uint32 reserved : 28;
183 } Spi_ErrorChecks;
184
185 /** Channel operation mode */
186 typedef struct
187 {
188 uint32 enabled : 1; /**< \brief 1 = channel enabled, 0 = channel disabled */
189 uint32 autoCS : 1; /**< \brief 1 = chip select is controlled by the hardware module or, 0 = by software. */
190 uint32 loopback : 1; /**< \brief 0 = normal mode, 1 = loopback mode */
191 uint32 clockPolarity : 1; /**< \brief \ref SpiIf_ClockPolarity*/
192 uint32 shiftClock : 1; /**< \brief \ref SpiIf_ShiftClock */
193 uint32 dataHeading : 1; /**< \brief \ref SpiIf_DataHeading */
194 uint32 dataWidth : 6; /**< \brief range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ... */
195
196 uint32 csActiveLevel : 1; /**< \brief \ref Ifx_ActiveState */
197
198 uint32 parityCheck : 1; /**< \brief 0 = disabled, 1 = enabled */
199 uint32 parityMode : 1; /**< \brief \ref Ifx_ParityMode */
200
201 SpiIf_SlsoTiming_HalfTsclk csInactiveDelay; /**< \brief CS Inactive Delay in Tsclk/2 units */
202 SpiIf_SlsoTiming_HalfTsclk csLeadDelay; /**< \brief CS Lead Delay in Tsclk/2 units */
203 SpiIf_SlsoTiming_HalfTsclk csTrailDelay; /**< \brief CS Trail Delay in Tsclk/2 units */
204
205 } SpiIf_ChMode;
206
207 /** \brief SPI channel callback prototype */
208 typedef void (*SpiIf_Cbk)(void *data);
209 typedef void (*TxRxHandler)(SpiIf_Ch *handle);
210
211 struct SpiIf_Ch_
212 {
213 SpiIf *driver; /**< \brief Pointer to the SPI interface driver */
214 SpiIf_Flags flags;
215 Spi_ErrorChecks errorChecks; /**< \brief Error checks */
216 sint32 baudrate; /**< \brief Real baudrate */
217 SpiIf_Job tx;
218 SpiIf_Job rx;
219 SpiIf_Cbk onExchangeEnd; /**< \brief Specifies the callback function on end of exchange */
220 void *callbackData; /**< \brief Specifies pointer to the user specific data on transmit end */
221 TxRxHandler txHandler;
222 TxRxHandler rxHandler;
223 };
224
225 struct SpiIf_ChConfig_
226 {
227 SpiIf *driver; /**< \brief Pointer to an implementation of SPI interface driver, e.g. \ref IfxQspi_SpiMaster_ChannelConfig */
228 float32 baudrate; /**< \brief Specifies the SPI baudrate */
229 SpiIf_ChMode mode; /**< \brief */
230 Spi_ErrorChecks errorChecks; /**< \brief */
231 };
232
233 //________________________________________________________________________________________
234 // EXPORTED VARIABLES
235
236 //________________________________________________________________________________________
237 // FUNCTION PROTOTYPES
238
239 IFX_INLINE void SpiIf_wait(SpiIf_Ch *handle);
240 IFX_EXTERN void SpiIf_initConfig(SpiIf_Config *config);
241 IFX_EXTERN void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver);
242
243 /** \name Virtual functions
244 * These functions are implemented by a driver.
245 * \{ */
246 IFX_INLINE SpiIf_Status SpiIf_exchange(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData);
247 IFX_INLINE SpiIf_Status SpiIf_getStatus(SpiIf_Ch *handle);
248 /** \} */
249
250 /** \} */
251 //________________________________________________________________________________________
252 // INLINE FUNCTION IMPLEMENTATIONS
253
254 /** Wait as long as the transmission is on-going
255 * \note This function blocks CPU for some-time */
256 IFX_INLINE void SpiIf_wait(SpiIf_Ch *handle)
257 {
258 while (handle->flags.onTransfer != FALSE)
259 {}
260 }
261
262
263 /** Perform the SPI exchange operation.
264 * \param handle Pointer to an implementation of SPI interface driver
265 * \param src Pointer to the start of data buffer for data to transmit
266 * \param dest Pointer to the start of data buffer for received data
267 * \param numOfData specifies number of byte/bit to transfer
268 * \return STATUS of SPI
269 * \note the src and dest may be the same data location.
270 */
271 IFX_INLINE SpiIf_Status SpiIf_exchange(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
272 {
273 return handle->driver->functions.exchange(handle, src, dest, numOfData);
274 }
275
276
277 /** get the SPI status
278 * * \param handle Pointer to an implementation of SPI interface driver
279 * \return STATUS of SPI
280 * */
281 IFX_INLINE SpiIf_Status SpiIf_getStatus(SpiIf_Ch *handle)
282 {
283 return handle->driver->functions.getStatus(handle);
284 }
285
286
287 //________________________________________________________________________________________
288 #endif
SpiIf_DataHeading
SpiIf_DataHeading
Heading.
Definition: SpiIf.h:87
SpiIf_ChMode::dataHeading
uint32 dataHeading
SpiIf_DataHeading
Definition: SpiIf.h:193
SpiIf_funcs::getStatus
SpiIf_GetStatus getStatus
Definition: SpiIf.h:144
SpiIf_funcs::onRx
SpiIf_OnEvent onRx
Definition: SpiIf.h:146
SpiIf_funcs
Definition: SpiIf.h:141
SpiIf_ChConfig_::baudrate
float32 baudrate
Specifies the SPI baudrate.
Definition: SpiIf.h:228
SpiIf_ChConfig_
Definition: SpiIf.h:225
SpiIf_ChMode::csLeadDelay
SpiIf_SlsoTiming_HalfTsclk csLeadDelay
CS Lead Delay in Tsclk/2 units.
Definition: SpiIf.h:202
SpiIf_Ch_::tx
SpiIf_Job tx
Definition: SpiIf.h:217
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:100
SpiIf_ChMode::loopback
uint32 loopback
0 = normal mode, 1 = loopback mode
Definition: SpiIf.h:190
Spi_ErrorChecks
Definition: SpiIf.h:176
SpiIf_ChMode::dataWidth
uint32 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: SpiIf.h:194
SpiIf_::driver
pvoid driver
Spi specific driver.
Definition: SpiIf.h:152
SpiIf_Config
Definition: SpiIf.h:160
TxRxHandler
void(* TxRxHandler)(SpiIf_Ch *handle)
Definition: SpiIf.h:209
SpiIf_SlsoTiming_7
Definition: SpiIf.h:83
SpiIf_::activeChannel
SpiIf_Ch * activeChannel
Channel actually transmitting / receiving.
Definition: SpiIf.h:154
SpiIf_SlsoTiming_5
Definition: SpiIf.h:81
uint32
unsigned long uint32
Definition: Platform_Types.h:116
Spi_ErrorChecks::reserved
uint32 reserved
Definition: SpiIf.h:182
SpiIf_Ch_::callbackData
void * callbackData
Specifies pointer to the user specific data on transmit end.
Definition: SpiIf.h:220
SpiIf_ChMode::parityCheck
uint32 parityCheck
0 = disabled, 1 = enabled
Definition: SpiIf.h:198
float32
float float32
Definition: Platform_Types.h:170
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:89
pvoid
void * pvoid
void pointer
Definition: Ifx_Types.h:54
IfxSrc.h
SRC basic functionality.
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:66
SpiIf_ClockPolarity_idleHigh
Definition: SpiIf.h:104
SpiIf_wait
IFX_INLINE void SpiIf_wait(SpiIf_Ch *handle)
Definition: SpiIf.h:256
Spi_ErrorChecks::baudrate
uint32 baudrate
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:178
SpiIf_
Definition: SpiIf.h:150
SpiIf_Ch_::baudrate
sint32 baudrate
Real baudrate.
Definition: SpiIf.h:216
SpiIf_SlsoTiming
SpiIf_SlsoTiming
Slave select output timing.
Definition: SpiIf.h:74
FALSE
#define FALSE
Definition: Platform_Types.h:93
SpiIf_ChMode::csInactiveDelay
SpiIf_SlsoTiming_HalfTsclk csInactiveDelay
CS Inactive Delay in Tsclk/2 units.
Definition: SpiIf.h:201
SpiIf_ShiftClock
SpiIf_ShiftClock
Clock phase.
Definition: SpiIf.h:94
SpiIf_Flags::byteAccess
uint32 byteAccess
Channel status: 8bit / 16 bit access.
Definition: SpiIf.h:118
SpiIf_Mode_slave
Slave mode.
Definition: SpiIf.h:131
SpiIf_Status_unknown
Definition: SpiIf.h:70
SpiIf_DataHeading_msbFirst
Definition: SpiIf.h:90
SpiIf_Status_ok
Definition: SpiIf.h:68
SpiIf_ChMode::clockPolarity
uint32 clockPolarity
SpiIf_ClockPolarity
Definition: SpiIf.h:191
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:63
SpiIf_Config::maximumBaudrate
float32 maximumBaudrate
Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock...
Definition: SpiIf.h:173
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
SpiIf_funcs::onTx
SpiIf_OnEvent onTx
Definition: SpiIf.h:145
SpiIf_funcs::exchange
SpiIf_Exchange exchange
Definition: SpiIf.h:143
SpiIf_SlsoTiming_HalfTsclk
uint32 SpiIf_SlsoTiming_HalfTsclk
Definition: SpiIf.h:138
SpiIf_::functions
SpiIf_funcs functions
Definition: SpiIf.h:157
SpiIf_ChMode::shiftClock
uint32 shiftClock
SpiIf_ShiftClock
Definition: SpiIf.h:192
SpiIf_initChannelConfig
IFX_EXTERN void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver)
Definition: SpiIf.c:57
SpiIf_ClockPolarity
SpiIf_ClockPolarity
Clock polarity.
Definition: SpiIf.h:101
SpiIf_SlsoTiming_2
Definition: SpiIf.h:78
SpiIf_::txCount
uint32 txCount
Definition: SpiIf.h:155
SpiIf_Status_busy
Definition: SpiIf.h:69
SpiIf_Flags::onTransfer
uint32 onTransfer
Channel status: On transfer.
Definition: SpiIf.h:117
SpiIf_Mode_master
Master mode.
Definition: SpiIf.h:130
SpiIf_SlsoTiming_4
Definition: SpiIf.h:80
SpiIf_Config::bufferSize
Ifx_SizeT bufferSize
Specifies the number of channels that can be buffered. If 0, buffering is disabled.
Definition: SpiIf.h:167
SpiIf_ChMode::enabled
uint32 enabled
1 = channel enabled, 0 = channel disabled
Definition: SpiIf.h:188
SpiIf_ChMode
Definition: SpiIf.h:186
SpiIf_Ch_::flags
SpiIf_Flags flags
Definition: SpiIf.h:214
SpiIf_Exchange
SpiIf_Status(* SpiIf_Exchange)(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
Definition: SpiIf.h:135
SpiIf_Ch_::onExchangeEnd
SpiIf_Cbk onExchangeEnd
Specifies the callback function on end of exchange.
Definition: SpiIf.h:219
SpiIf_ChMode::parityMode
uint32 parityMode
Ifx_ParityMode
Definition: SpiIf.h:199
Spi_ErrorChecks::transmit
uint32 transmit
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:181
SpiIf_initConfig
IFX_EXTERN void SpiIf_initConfig(SpiIf_Config *config)
Definition: SpiIf.c:44
SpiIf_Config::erPriority
Ifx_Priority erPriority
Specifies the priority of the error interrupt.
Definition: SpiIf.h:165
SpiIf_ClockPolarity_idleLow
Definition: SpiIf.h:103
SpiIf_Ch_::rx
SpiIf_Job rx
Definition: SpiIf.h:218
SpiIf_SlsoTiming_0
Definition: SpiIf.h:76
SpiIf_::rxCount
uint32 rxCount
Definition: SpiIf.h:156
SpiIf_GetStatus
SpiIf_Status(* SpiIf_GetStatus)(SpiIf_Ch *handle)
Definition: SpiIf.h:136
SpiIf_DataHeading_lsbFirst
Definition: SpiIf.h:89
SpiIf_Job::remaining
Ifx_SizeT remaining
Definition: SpiIf.h:124
SpiIf_::sending
uint32 sending
Definition: SpiIf.h:153
SpiIf_Config::buffer
void * buffer
Specifies the buffer location.The buffer parameter must point on a free memory location where the buf...
Definition: SpiIf.h:168
SpiIf_Ch_::txHandler
TxRxHandler txHandler
Definition: SpiIf.h:221
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge
Definition: SpiIf.h:96
SpiIf_Config::isrProvider
IfxSrc_Tos isrProvider
Specifies the handler of the interrupts.
Definition: SpiIf.h:166
SpiIf_Job
Definition: SpiIf.h:121
SpiIf_ChMode::autoCS
uint32 autoCS
1 = chip select is controlled by the hardware module or, 0 = by software.
Definition: SpiIf.h:189
SpiIf_Ch_::driver
SpiIf * driver
Pointer to the SPI interface driver.
Definition: SpiIf.h:213
SpiIf_Config::rxPriority
Ifx_Priority rxPriority
Specifies the priority of the receive interrupt.
Definition: SpiIf.h:163
SpiIf_Config::mode
SpiIf_Mode mode
Specifies the interface operation mode.
Definition: SpiIf.h:162
Spi_ErrorChecks::phase
uint32 phase
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:179
sint32
long sint32
Definition: Platform_Types.h:134
SpiIf_exchange
IFX_INLINE SpiIf_Status SpiIf_exchange(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
Definition: SpiIf.h:271
SpiIf_Ch_::rxHandler
TxRxHandler rxHandler
Definition: SpiIf.h:222
SpiIf_SlsoTiming_6
Definition: SpiIf.h:82
SpiIf_ChMode::csTrailDelay
SpiIf_SlsoTiming_HalfTsclk csTrailDelay
CS Trail Delay in Tsclk/2 units.
Definition: SpiIf.h:203
SpiIf_ChConfig_::mode
SpiIf_ChMode mode
Definition: SpiIf.h:229
SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge
Definition: SpiIf.h:97
SpiIf_SlsoTiming_3
Definition: SpiIf.h:79
SpiIf_Mode_undefined
Undefined mode.
Definition: SpiIf.h:132
SpiIf_Status
SpiIf_Status
SPI Interface Status.
Definition: SpiIf.h:66
SpiIf_funcs::onError
SpiIf_OnEvent onError
Definition: SpiIf.h:147
SpiIf_ChMode::csActiveLevel
uint32 csActiveLevel
Ifx_ActiveState
Definition: SpiIf.h:196
SpiIf_Mode
SpiIf_Mode
Definition: SpiIf.h:128
SpiIf_Config::txPriority
Ifx_Priority txPriority
Specifies the priority of the transmit interrupt.
Definition: SpiIf.h:164
SpiIf_getStatus
IFX_INLINE SpiIf_Status SpiIf_getStatus(SpiIf_Ch *handle)
Definition: SpiIf.h:281
SpiIf_Flags
Definition: SpiIf.h:115
SpiIf_Cbk
void(* SpiIf_Cbk)(void *data)
SPI channel callback prototype.
Definition: SpiIf.h:208
SpiIf_Ch_::errorChecks
Spi_ErrorChecks errorChecks
Error checks.
Definition: SpiIf.h:215
SpiIf_SlsoTiming_1
Definition: SpiIf.h:77
SpiIf_Job::data
void * data
Definition: SpiIf.h:123
SpiIf_OnEvent
void(* SpiIf_OnEvent)(SpiIf *handle)
Definition: SpiIf.h:137
SpiIf_Ch_
Definition: SpiIf.h:211
Spi_ErrorChecks::receive
uint32 receive
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:180


iLLD_TC26B: TPwm.h Source File

  • Service
  • CpuGeneric
  • If
  • Ccu6If
TPwm.h
Go to the documentation of this file.
1 /**
2 * \file TPwm.h
3 * \brief TPWM interface
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:18 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_if_tpwm TPWM interface
41 * \ingroup library_srvsw_if
42 *
43 */
44
45 #ifndef TPWM_H_
46 #define TPWM_H_ 1
47
48 #include "Cpu/Std/Ifx_Types.h"
49
50 typedef struct TPwm_s TPwm;
51 typedef void (*TPwm_Start)(TPwm *handle);
52 typedef void (*TPwm_Pause)(TPwm *handle);
53 typedef void (*TPwm_Resume)(TPwm *handle);
54 typedef void (*TPwm_Stop)(TPwm *handle);
55
56 typedef struct
57 {
58 TPwm_Start start;
59 TPwm_Pause pause;
60 TPwm_Resume resume;
61 TPwm_Stop stop;
62 } TPwm_Functions;
63
64 /** \brief Structure of the TPwm interface */
65 struct TPwm_s
66 {
67 float32 frequency; /**< \brief Actual frequency */
68 Ifx_TimerValue period; /**< \brief Actual timer period */
69 #if IFX_CFG_USE_STANDARD_INTERFACE
70 TPwm_Functions functions; /**< \brief Actual timer period */
71 #endif
72 };
73
74 /** \brief Configuration structure of the TPwm interface */
75 typedef struct
76 {
77 float32 frequency; /**< \brief Specify expected PWM frequency in Hertz */
78 Ifx_TimerValue waitingTime; /**< \brief Specify the expected ticks before timer starts (TWAIT) */
79 Ifx_TimerValue activeCount; /**< \brief Specify active PWM period (TCOUNT) */
80 Ifx_TimerValue period; /**< \brief Specify expected PWM period in ticks. */
81 Ifx_ActiveState activeState; /**< \brief Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of waitingTicks */
82 } TPwm_Config;
83
84 #if IFX_CFG_USE_STANDARD_INTERFACE
85 IFX_INLINE void TPwm_start(TPwm *handle) {handle->functions.start(handle); }
86 IFX_INLINE void TPwm_pause(TPwm *handle) {handle->functions.pause(handle); }
87 IFX_INLINE void TPwm_resume(TPwm *handle) {handle->functions.resume(handle); }
88 IFX_INLINE void TPwm_stop(TPwm *handle) {handle->functions.stop(handle); }
89 #endif
90
91 #endif /* TPWM_H_ */
TPwm_Pause
void(* TPwm_Pause)(TPwm *handle)
Definition: TPwm.h:52
TPwm_Config::activeState
Ifx_ActiveState activeState
Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of w...
Definition: TPwm.h:81
float32
float float32
Definition: Platform_Types.h:170
TPwm_Config
Configuration structure of the TPwm interface.
Definition: TPwm.h:75
TPwm_Functions::start
TPwm_Start start
Definition: TPwm.h:58
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:113
TPwm_Start
void(* TPwm_Start)(TPwm *handle)
Definition: TPwm.h:51
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
TPwm_Functions::stop
TPwm_Stop stop
Definition: TPwm.h:61
TPwm_Config::activeCount
Ifx_TimerValue activeCount
Specify active PWM period (TCOUNT)
Definition: TPwm.h:79
TPwm_Functions::pause
TPwm_Pause pause
Definition: TPwm.h:59
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
TPwm_Functions::resume
TPwm_Resume resume
Definition: TPwm.h:60
TPwm_s
Structure of the TPwm interface.
Definition: TPwm.h:65
TPwm_s::frequency
float32 frequency
Actual frequency.
Definition: TPwm.h:67
TPwm_s::period
Ifx_TimerValue period
Actual timer period.
Definition: TPwm.h:68
TPwm_Config::waitingTime
Ifx_TimerValue waitingTime
Specify the expected ticks before timer starts (TWAIT)
Definition: TPwm.h:78
TPwm_Functions
Definition: TPwm.h:56
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
TPwm_Resume
void(* TPwm_Resume)(TPwm *handle)
Definition: TPwm.h:53
TPwm_Stop
void(* TPwm_Stop)(TPwm *handle)
Definition: TPwm.h:54


iLLD_TC26B: Timer.h Source File

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Timer.h
Go to the documentation of this file.
1 /**
2 * \file Timer.h
3 * \brief Timer interface
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:19 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 * Use of this file is subject to the terms of use agreed between (i) you or
12 * the company in which ordinary course of business you are acting and (ii)
13 * Infineon Technologies AG or its licensees. If and as long as no such terms
14 * of use are agreed, use of this file is subject to following:
15 *
16 * Boost Software License - Version 1.0 - August 17th, 2003
17 *
18 * Permission is hereby granted, free of charge, to any person or organization
19 * obtaining a copy of the software and accompanying documentation covered by
20 * this license (the "Software") to use, reproduce, display, distribute,
21 * execute, and transmit the Software, and to prepare derivative works of the
22 * Software, and to permit third-parties to whom the Software is furnished to
23 * do so, all subject to the following:
24 *
25 * The copyright notices in the Software and this entire statement, including
26 * the above license grant, this restriction and the following disclaimer, must
27 * be included in all copies of the Software, in whole or in part, and all
28 * derivative works of the Software, unless such copies or derivative works are
29 * solely in the form of machine-executable object code generated by a source
30 * language processor.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
35 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
36 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
37 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38 * DEALINGS IN THE SOFTWARE.
39 *
40 * \defgroup library_srvsw_if_timer Timer interface
41 * \ingroup library_srvsw_if
42 *
43 */
44
45 #ifndef TIMER_H_
46 #define TIMER_H_ 1
47
48 #include "Cpu/Std/Ifx_Types.h"
49
50 typedef struct Timer_s Timer;
51 typedef void (*Timer_Start)(Timer *handle);
52 typedef void (*Timer_Stop)(Timer *handle);
53 typedef void (*Timer_SynchronousStart)(Timer *handle);
54 typedef void (*Timer_SynchronousStop)(Timer *handle);
55 typedef void (*Timer_CountOneStep)(Timer *handle);
56 typedef void (*Timer_StartSingleShotMode)(Timer *handle);
57
58 typedef struct
59 {
60 Timer_Start start;
61 Timer_Stop stop;
62 Timer_SynchronousStart synchronousStart;
63 Timer_SynchronousStop synchronousStop;
64 Timer_CountOneStep countOneStep;
65 Timer_StartSingleShotMode startSingleShotMode;
66 } Timer_Functions;
67
68 /** \brief Structure of the Timer interface */
69 struct Timer_s
70 {
71 float32 t12Frequency; /**< \brief Actual timer12 frequency */
72 Ifx_TimerValue t12Period; /**< \brief Actual timer 12 period */
73 float32 t13Frequency; /**< \brief Actual timer13 frequency */
74 Ifx_TimerValue t13Period; /**< \brief Actual timer 13 period */
75 #if IFX_CFG_USE_STANDARD_INTERFACE
76 Timer_Functions functions; /**< \brief timer functions */
77 #endif
78 };
79
80 /** \brief Configuration structure of the Timer interface */
81 typedef struct
82 {
83 float32 t12Frequency; /**< \brief Specify expected T12 PWM frequency in Hertz */
84 Ifx_TimerValue t12Period; /**< \brief Specify expected T12 PWM period in ticks. */
85 float32 t13Frequency; /**< \brief Specify expected T13 PWM frequency in Hertz */
86 Ifx_TimerValue t13Period; /**< \brief Specify expected T13 PWM period in ticks. */
87 Ifx_TimerValue waitingTime; /**< \brief Specify the expected ticks before timer starts (TWAIT) */
88 Ifx_TimerValue activeCount; /**< \brief Specify active PWM period (TCOUNT) */
89 } Timer_Config;
90
91 #if IFX_CFG_USE_STANDARD_INTERFACE
92 IFX_INLINE void Timer_start(Timer *handle) {handle->functions.start(handle); }
93 IFX_INLINE void Timer_stop(Timer *handle) {handle->functions.stop(handle); }
94 IFX_INLINE void Timer_synchronousStart(Timer *handle) {handle->functions.synchronousStart(handle); }
95 IFX_INLINE void Timer_synchronousStop(Timer *handle) {handle->functions.synchronousStop(handle); }
96 IFX_INLINE void Timer_countOneStep(Timer *handle) {handle->functions.countOneStep(handle); }
97 IFX_INLINE void Timer_startSingleShotMode(Timer *handle) {handle->functions.startSingleShotMode(handle); }
98 #endif
99
100 #endif /* TIMER_H_ */
Timer_StartSingleShotMode
void(* Timer_StartSingleShotMode)(Timer *handle)
Definition: Timer.h:56
Timer_CountOneStep
void(* Timer_CountOneStep)(Timer *handle)
Definition: Timer.h:55
Timer_Functions::startSingleShotMode
Timer_StartSingleShotMode startSingleShotMode
Definition: Timer.h:65
Timer_Functions::countOneStep
Timer_CountOneStep countOneStep
Definition: Timer.h:64
Timer_Start
void(* Timer_Start)(Timer *handle)
Definition: Timer.h:51
Timer_Config::activeCount
Ifx_TimerValue activeCount
Specify active PWM period (TCOUNT)
Definition: Timer.h:88
Timer_Functions::start
Timer_Start start
Definition: Timer.h:60
float32
float float32
Definition: Platform_Types.h:170
Timer_s::t12Frequency
float32 t12Frequency
Actual timer12 frequency.
Definition: Timer.h:71
Timer_Config
Configuration structure of the Timer interface.
Definition: Timer.h:81
Timer_Stop
void(* Timer_Stop)(Timer *handle)
Definition: Timer.h:52
Timer_Functions::stop
Timer_Stop stop
Definition: Timer.h:61
Timer_SynchronousStop
void(* Timer_SynchronousStop)(Timer *handle)
Definition: Timer.h:54
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:98
Timer_Functions::synchronousStop
Timer_SynchronousStop synchronousStop
Definition: Timer.h:63
Timer_Functions::synchronousStart
Timer_SynchronousStart synchronousStart
Definition: Timer.h:62
Timer_s
Structure of the Timer interface.
Definition: Timer.h:69
Timer_s::t12Period
Ifx_TimerValue t12Period
Actual timer 12 period.
Definition: Timer.h:72
Timer_SynchronousStart
void(* Timer_SynchronousStart)(Timer *handle)
Definition: Timer.h:53
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Timer_s::t13Frequency
float32 t13Frequency
Actual timer13 frequency.
Definition: Timer.h:73
Timer_s::t13Period
Ifx_TimerValue t13Period
Actual timer 13 period.
Definition: Timer.h:74
Timer_Functions
Definition: Timer.h:58
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:101
Timer_Config::waitingTime
Ifx_TimerValue waitingTime
Specify the expected ticks before timer starts (TWAIT)
Definition: Timer.h:87


iLLD_TC26B: Crc Directory Reference

  • Fce
  • Crc
Crc Directory Reference

Files

file | IfxFce_Crc.c [code]
FCE CRC details.
file | IfxFce_Crc.h [code]
FCE CRC details.


iLLD_TC26B: CStart Directory Reference

  • Cpu
  • CStart
CStart Directory Reference

Files

file | IfxCpu_CStart.h [code]
This file contains the Core startup sequence.
file | IfxCpu_CStart0.c [code]
This file contains the Core startup sequence for Cpu0.
file | IfxCpu_CStart1.c [code]
This file contains the Core startup sequence for Cpu1.


iLLD_TC26B: Lin Directory Reference

  • Asclin
  • Lin
Lin Directory Reference

Files

file | IfxAsclin_Lin.c [code]
ASCLIN LIN details.
file | IfxAsclin_Lin.h [code]
ASCLIN LIN details.


iLLD_TC26B: Iom Directory Reference

  • Iom
Iom Directory Reference

Directories

directory | Driver
directory | Std


iLLD_TC26B: Msc Directory Reference

  • Msc
Msc Directory Reference

Directories

directory | Msc
directory | Std


iLLD_TC26B: I2c Directory Reference

  • I2c
I2c Directory Reference

Directories

directory | I2c
directory | Std


iLLD_TC26B: Sent Directory Reference

  • Sent
  • Sent
Sent Directory Reference

Files

file | IfxSent_Sent.c [code]
SENT SENT details.
file | IfxSent_Sent.h [code]
SENT SENT details.


iLLD_TC26B: Std Directory Reference

  • Cif
  • Std
Std Directory Reference

Files

file | IfxCif.c [code]
CIF basic functionality.
file | IfxCif.h [code]
CIF basic functionality.


iLLD_TC26B: Dsadc Directory Reference

  • Dsadc
Dsadc Directory Reference

Directories

directory | Dsadc
directory | Rdc
directory | Std


iLLD_TC26B: Std Directory Reference

  • Cpu
  • Std
Std Directory Reference

Files

file | Ifx_Types.h [code]
This files defines all types used by the IFX HAL and libraries.
file | Ifx_TypesDcc.h [code]
file | Ifx_TypesGhs.h [code]
file | Ifx_TypesGnuc.h [code]
file | Ifx_TypesTasking.h [code]
file | IfxCpu.c [code]
CPU basic functionality.
file | IfxCpu.h [code]
CPU basic functionality.
file | IfxCpu_Intrinsics.h [code]
file | IfxCpu_IntrinsicsDcc.h [code]
file | IfxCpu_IntrinsicsDcc2G.h [code]
file | IfxCpu_IntrinsicsGhs.h [code]
file | IfxCpu_IntrinsicsGhs2G.h [code]
file | IfxCpu_IntrinsicsGnuc.h [code]
file | IfxCpu_IntrinsicsGnuc2G.h [code]
file | IfxCpu_IntrinsicsTasking.h [code]
file | IfxCpu_IntrinsicsTasking2G.h [code]
file | Platform_Types.h [code]


iLLD_TC26B: InternalMux Directory Reference

  • _Lib
  • InternalMux
InternalMux Directory Reference

Files

file | Ifx_InternalMux.c [code]
Mux configuration functions.
file | Ifx_InternalMux.h [code]
Mux configuration functions.


iLLD_TC26B: Std Directory Reference

  • Eth
  • Std
Std Directory Reference

Files

file | IfxEth.c [code]
ETH basic functionality.
file | IfxEth.h [code]
ETH basic functionality.


iLLD_TC26B: Io Directory Reference

  • Port
  • Io
Io Directory Reference

Files

file | IfxPort_Io.c [code]
PORT IO details.
file | IfxPort_Io.h [code]
PORT IO details.


iLLD_TC26B: dosAndDont Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • dosAndDont
dosAndDont Directory Reference

Files

file | lld_dosanddont.c [code]
file | lld_dosanddont_enumUsage.c [code]
file | lld_dosanddont_namingConvention.c [code]
file | lld_dosanddont_optimisation.c [code]


iLLD_TC26B: Asclin Directory Reference

  • Asclin
Asclin Directory Reference

Directories

directory | Asc
directory | Lin
directory | Spi
directory | Std


iLLD_TC26B: Std Directory Reference

  • Ccu6
  • Std
Std Directory Reference

Files

file | IfxCcu6.c [code]
CCU6 basic functionality.
file | IfxCcu6.h [code]
CCU6 basic functionality.


iLLD_TC26B: TPwm Directory Reference

  • Ccu6
  • TPwm
TPwm Directory Reference

Files

file | IfxCcu6_TPwm.c [code]
CCU6 TPWM details.
file | IfxCcu6_TPwm.h [code]
CCU6 TPWM details.


iLLD_TC26B: Psi5s Directory Reference

  • Psi5s
Psi5s Directory Reference

Directories

directory | Psi5s
directory | Std


iLLD_TC26B: Comm Directory Reference

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Comm Directory Reference

Files

file | Ifx_Console.c [code]
Main Ifx_Console module implementation file.
file | Ifx_Console.h [code]
Main Console module header file.
file | Ifx_Shell.c [code]
shell functions.
file | Ifx_Shell.h [code]
Shell functions.


iLLD_TC26B: Eray Directory Reference

  • Eray
Eray Directory Reference

Directories

directory | Eray
directory | Std


iLLD_TC26B: Dts Directory Reference

  • Dts
Dts Directory Reference

Directories

directory | Dts
directory | Std


iLLD_TC26B: Std Directory Reference

  • Eray
  • Std
Std Directory Reference

Files

file | IfxEray.c [code]
ERAY basic functionality.
file | IfxEray.h [code]
ERAY basic functionality.


iLLD_TC26B: doxygen Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
doxygen Directory Reference

Directories

directory common


iLLD_TC26B: Trig Directory Reference

  • Gtm
  • Trig
Trig Directory Reference

Files

file | IfxGtm_Trig.c [code]
GTM TRIG details.
file | IfxGtm_Trig.h [code]
GTM TRIG details.


iLLD_TC26B: PwmHl Directory Reference

  • Ccu6
  • PwmHl
PwmHl Directory Reference

Files

file | IfxCcu6_PwmHl.c [code]
CCU6 PWMHL details.
file | IfxCcu6_PwmHl.h [code]
CCU6 PWMHL details.


iLLD_TC26B: Vadc Directory Reference

  • Vadc
Vadc Directory Reference

Directories

directory | Adc
directory | Std


iLLD_TC26B: Adc Directory Reference

  • Vadc
  • Adc
Adc Directory Reference

Files

file | IfxVadc_Adc.c [code]
VADC ADC details.
file | IfxVadc_Adc.h [code]
VADC ADC details.


iLLD_TC26B: SysSe Directory Reference

  • Service
  • CpuGeneric
  • SysSe
SysSe Directory Reference

Directories

directory | Bsp
directory | Comm
directory | General
directory | Math
directory | Time


iLLD_TC26B: Std Directory Reference

  • Msc
  • Std
Std Directory Reference

Files

file | IfxMsc.c [code]
MSC basic functionality.
file | IfxMsc.h [code]
MSC basic functionality.


iLLD_TC26B: Irq Directory Reference

  • Cpu
  • Irq
Irq Directory Reference

Files

file | IfxCpu_Irq.c [code]
This file contains the APIs for Interrupt related functions.
file | IfxCpu_Irq.h [code]
This file contains the APIs for Interrupt related functions.


iLLD_TC26B: StdIf Directory Reference

  • Service
  • CpuGeneric
  • StdIf
StdIf Directory Reference

Files

file | IfxStdIf.h [code]
Standard interface types.
file | IfxStdIf_DPipe.c [code]
Standard interface: Data Pipe.
file | IfxStdIf_DPipe.h [code]
Standard interface: Data Pipe.
file | IfxStdIf_Pos.c [code]
Standard interface: Position interface.
file | IfxStdIf_Pos.h [code]
Standard interface: Position interface.
file | IfxStdIf_PwmHl.c [code]
Standard interface: Multi-channels, dual-complementary PWM interface.
file | IfxStdIf_PwmHl.h [code]
Standard interface: Multi-channels, dual-complementary PWM interface.
file | IfxStdIf_Timer.c [code]
Standard interface: Timer.
file | IfxStdIf_Timer.h [code]
Standard interface: Timer.


iLLD_TC26B: PwmHl Directory Reference

  • Gtm
  • Atom
  • PwmHl
PwmHl Directory Reference

Files

file | IfxGtm_Atom_PwmHl.c [code]
GTM PWMHL details.
file | IfxGtm_Atom_PwmHl.h [code]
GTM PWMHL details.


iLLD_TC26B: Gtm Directory Reference

  • Gtm
Gtm Directory Reference

Directories

directory | Atom
directory | Std
directory | Tim
directory | Tom
directory | Trig


iLLD_TC26B: Psi5s Directory Reference

  • Psi5s
  • Psi5s
Psi5s Directory Reference

Files

file | IfxPsi5s_Psi5s.c [code]
PSI5S PSI5S details.
file | IfxPsi5s_Psi5s.h [code]
PSI5S PSI5S details.


iLLD_TC26B: Msc Directory Reference

  • Msc
  • Msc
Msc Directory Reference

Files

file | IfxMsc_Msc.c [code]
MSC MSC details.
file | IfxMsc_Msc.h [code]
MSC MSC details.


iLLD_TC26B: Scu Directory Reference

  • Scu
Scu Directory Reference

Directories

directory Std


iLLD_TC26B: Sent Directory Reference

  • Sent
Sent Directory Reference

Directories

directory | Sent
directory | Std


iLLD_TC26B: Std Directory Reference

  • Fft
  • Std
Std Directory Reference

Files

file | IfxFft.c [code]
FFT basic functionality.
file | IfxFft.h [code]
FFT basic functionality.


iLLD_TC26B: Trap Directory Reference

  • Cpu
  • Trap
Trap Directory Reference

Files

file | IfxCpu_Trap.c [code]
This file contains the APIs for Trap related functions.
file | IfxCpu_Trap.h [code]


iLLD_TC26B: Cam Directory Reference

  • Cif
  • Cam
Cam Directory Reference

Files

file | IfxCif_Cam.c [code]
CIF CAM details.
file | IfxCif_Cam.h [code]
CIF CAM details.


iLLD_TC26B: Std Directory Reference

  • Gpt12
  • Std
Std Directory Reference

Files

file | IfxGpt12.c [code]
GPT12 basic functionality.
file | IfxGpt12.h [code]
GPT12 basic functionality.


iLLD_TC26B: Std Directory Reference

  • Multican
  • Std
Std Directory Reference

Files

file | IfxMultican.c [code]
MULTICAN basic functionality.
file | IfxMultican.h [code]
MULTICAN basic functionality.


iLLD_TC26B: Multican Directory Reference

  • Multican
Multican Directory Reference

Directories

directory | Can
directory | Std


iLLD_TC26B: Infra Directory Reference

  • Infra
Infra Directory Reference

Directories

directory Platform


iLLD_TC26B: Std Directory Reference

  • Psi5s
  • Std
Std Directory Reference

Files

file | IfxPsi5s.c [code]
PSI5S basic functionality.
file | IfxPsi5s.h [code]
PSI5S basic functionality.


iLLD_TC26B: Tim Directory Reference

  • Gtm
  • Tim
Tim Directory Reference

Directories

directory In


iLLD_TC26B: Std Directory Reference

  • Flash
  • Std
Std Directory Reference

Files

file | IfxFlash.c [code]
FLASH basic functionality.
file | IfxFlash.h [code]
FLASH basic functionality.


iLLD_TC26B: bollusai Directory Reference

  • bollusai
bollusai Directory Reference

Directories

directory illd_development


iLLD_TC26B: Std Directory Reference

  • Asclin
  • Std
Std Directory Reference

Files

file | IfxAsclin.c [code]
ASCLIN basic functionality.
file | IfxAsclin.h [code]
ASCLIN basic functionality.


iLLD_TC26B: Timer Directory Reference

  • Ccu6
  • Timer
Timer Directory Reference

Files

file | IfxCcu6_Timer.c [code]
CCU6 TIMER details.
file | IfxCcu6_Timer.h [code]
CCU6 TIMER details.


iLLD_TC26B: Cif Directory Reference

  • Cif
Cif Directory Reference

Directories

directory | Cam
directory | Std


iLLD_TC26B: SpiMaster Directory Reference

  • Qspi
  • SpiMaster
SpiMaster Directory Reference

Files

file | IfxQspi_SpiMaster.c [code]
QSPI SPIMASTER details.
file | IfxQspi_SpiMaster.h [code]
QSPI SPIMASTER details.


iLLD_TC26B: Eray Directory Reference

  • Eray
  • Eray
Eray Directory Reference

Files

file | IfxEray_Eray.c [code]
ERAY ERAY details.
file | IfxEray_Eray.h [code]
ERAY ERAY details.


iLLD_TC26B: _PinMap Directory Reference

  • _PinMap
_PinMap Directory Reference

Files

file | IfxAsclin_PinMap.c [code]
ASCLIN I/O map.
file | IfxAsclin_PinMap.h [code]
ASCLIN I/O map.
file | IfxCcu6_PinMap.c [code]
CCU6 I/O map.
file | IfxCcu6_PinMap.h [code]
CCU6 I/O map.
file | IfxCif_PinMap.c [code]
CIF I/O map.
file | IfxCif_PinMap.h [code]
CIF I/O map.
file | IfxDsadc_PinMap.c [code]
DSADC I/O map.
file | IfxDsadc_PinMap.h [code]
DSADC I/O map.
file | IfxEray_PinMap.c [code]
ERAY I/O map.
file | IfxEray_PinMap.h [code]
ERAY I/O map.
file | IfxEth_PinMap.c [code]
ETH I/O map.
file | IfxEth_PinMap.h [code]
ETH I/O map.
file | IfxGpt12_PinMap.c [code]
GPT12 I/O map.
file | IfxGpt12_PinMap.h [code]
GPT12 I/O map.
file | IfxGtm_PinMap.c [code]
GTM I/O map.
file | IfxGtm_PinMap.h [code]
GTM I/O map.
file | IfxI2c_PinMap.c [code]
I2C I/O map.
file | IfxI2c_PinMap.h [code]
I2C I/O map.
file | IfxMsc_PinMap.c [code]
MSC I/O map.
file | IfxMsc_PinMap.h [code]
MSC I/O map.
file | IfxMultican_PinMap.c [code]
MULTICAN I/O map.
file | IfxMultican_PinMap.h [code]
MULTICAN I/O map.
file | IfxPort_PinMap.c [code]
PORT I/O map.
file | IfxPort_PinMap.h [code]
PORT I/O map.
file | IfxPsi5_PinMap.c [code]
PSI5 I/O map.
file | IfxPsi5_PinMap.h [code]
PSI5 I/O map.
file | IfxPsi5s_PinMap.c [code]
PSI5S I/O map.
file | IfxPsi5s_PinMap.h [code]
PSI5S I/O map.
file | IfxQspi_PinMap.c [code]
QSPI I/O map.
file | IfxQspi_PinMap.h [code]
QSPI I/O map.
file | IfxScu_PinMap.c [code]
SCU I/O map.
file | IfxScu_PinMap.h [code]
SCU I/O map.
file | IfxSent_PinMap.c [code]
SENT I/O map.
file | IfxSent_PinMap.h [code]
SENT I/O map.
file | IfxSmu_PinMap.c [code]
SMU I/O map.
file | IfxSmu_PinMap.h [code]
SMU I/O map.
file | IfxVadc_PinMap.c [code]
VADC I/O map.
file | IfxVadc_PinMap.h [code]
VADC I/O map.


iLLD_TC26B: Dts Directory Reference

  • Dts
  • Dts
Dts Directory Reference

Files

file | IfxDts_Dts.c [code]
DTS DTS details.
file | IfxDts_Dts.h [code]
DTS DTS details.


iLLD_TC26B: Std Directory Reference

  • Iom
  • Std
Std Directory Reference

Files

file | IfxIom.c [code]
IOM basic functionality.
file | IfxIom.h [code]
IOM basic functionality.


iLLD_TC26B: Std Directory Reference

  • Gtm
  • Std
Std Directory Reference

Files

file | IfxGtm.c [code]
GTM basic functionality.
file | IfxGtm.h [code]
GTM basic functionality.
file | IfxGtm_Atom.c [code]
GTM basic functionality.
file | IfxGtm_Atom.h [code]
GTM basic functionality.
file | IfxGtm_Cmu.c [code]
GTM basic functionality.
file | IfxGtm_Cmu.h [code]
GTM basic functionality.
file | IfxGtm_Dpll.c [code]
GTM basic functionality.
file | IfxGtm_Dpll.h [code]
GTM basic functionality.
file | IfxGtm_Tbu.c [code]
GTM basic functionality.
file | IfxGtm_Tbu.h [code]
GTM basic functionality.
file | IfxGtm_Tim.c [code]
GTM basic functionality.
file | IfxGtm_Tim.h [code]
GTM basic functionality.
file | IfxGtm_Tom.c [code]
GTM basic functionality.
file | IfxGtm_Tom.h [code]
GTM basic functionality.


iLLD_TC26B: Std Directory Reference

  • Sent
  • Std
Std Directory Reference

Files

file | IfxSent.c [code]
SENT basic functionality.
file | IfxSent.h [code]
SENT basic functionality.


iLLD_TC26B: Std Directory Reference

  • Dma
  • Std
Std Directory Reference

Files

file | IfxDma.c [code]
DMA basic functionality.
file | IfxDma.h [code]
DMA basic functionality.


iLLD_TC26B: Hssl Directory Reference

  • Hssl
Hssl Directory Reference

Directories

directory | Hssl
directory | Std


iLLD_TC26B: Pwm Directory Reference

  • Gtm
  • Tom
  • Pwm
Pwm Directory Reference

Files

file | IfxGtm_Tom_Pwm.c [code]
GTM PWM details.
file | IfxGtm_Tom_Pwm.h [code]
GTM PWM details.


iLLD_TC26B: Eth Directory Reference

  • Eth
Eth Directory Reference

Directories

directory | Phy_Pef7071
directory | Std


iLLD_TC26B: SpiSlave Directory Reference

  • Qspi
  • SpiSlave
SpiSlave Directory Reference

Files

file | IfxQspi_SpiSlave.c [code]
QSPI SPISLAVE details.
file | IfxQspi_SpiSlave.h [code]
QSPI SPISLAVE details.


iLLD_TC26B: Tricore Directory Reference

  • Infra
  • Platform
  • Tricore
Tricore Directory Reference

Directories

directory Compilers


iLLD_TC26B: Asc Directory Reference

  • Asclin
  • Asc
Asc Directory Reference

Files

file | IfxAsclin_Asc.c [code]
ASCLIN ASC details.
file | IfxAsclin_Asc.h [code]
ASCLIN ASC details.


iLLD_TC26B: Hssl Directory Reference

  • Hssl
  • Hssl
Hssl Directory Reference

Files

file | IfxHssl_Hssl.c [code]
HSSL HSSL details.
file | IfxHssl_Hssl.h [code]
HSSL HSSL details.


iLLD_TC26B: PwmHl Directory Reference

  • Gtm
  • Tom
  • PwmHl
PwmHl Directory Reference

Files

file | IfxGtm_Tom_PwmHl.c [code]
GTM PWMHL details.
file | IfxGtm_Tom_PwmHl.h [code]
GTM PWMHL details.


iLLD_TC26B: Fft Directory Reference

  • Fft
  • Fft
Fft Directory Reference

Files

file | IfxFft_Fft.c [code]
FFT FFT details.
file | IfxFft_Fft.h [code]
FFT FFT details.


iLLD_TC26B: Src Directory Reference

  • Src
Src Directory Reference

Directories

directory Std


iLLD_TC26B: If Directory Reference

  • Service
  • CpuGeneric
  • If
If Directory Reference

Directories

directory Ccu6If

Files

file | SpiIf.c [code]
SPI interface.
file | SpiIf.h [code]
SPI interface types.


iLLD_TC26B: Spi Directory Reference

  • Asclin
  • Spi
Spi Directory Reference

Files

file | IfxAsclin_Spi.c [code]
ASCLIN SPI details.
file | IfxAsclin_Spi.h [code]
ASCLIN SPI details.


iLLD_TC26B: PwmBc Directory Reference

  • Ccu6
  • PwmBc
PwmBc Directory Reference

Files

file | IfxCcu6_PwmBc.c [code]
CCU6 PWMBC details.
file | IfxCcu6_PwmBc.h [code]
CCU6 PWMBC details.


iLLD_TC26B: Dma Directory Reference

  • Dma
Dma Directory Reference

Directories

directory | Dma
directory | Std


iLLD_TC26B: Std Directory Reference

  • Qspi
  • Std
Std Directory Reference

Files

file | IfxQspi.c [code]
QSPI basic functionality.
file | IfxQspi.h [code]
QSPI basic functionality.


iLLD_TC26B: Std Directory Reference

  • Vadc
  • Std
Std Directory Reference

Files

file | IfxVadc.c [code]
VADC basic functionality.
file | IfxVadc.h [code]
VADC basic functionality.


iLLD_TC26B: Std Directory Reference

  • Hssl
  • Std
Std Directory Reference

Files

file | IfxHssl.c [code]
HSSL basic functionality.
file | IfxHssl.h [code]
HSSL basic functionality.


iLLD_TC26B: Std Directory Reference

  • Psi5
  • Std
Std Directory Reference

Files

file | IfxPsi5.c [code]
PSI5 basic functionality.
file | IfxPsi5.h [code]
PSI5 basic functionality.


iLLD_TC26B: DataHandling Directory Reference

  • _Lib
  • DataHandling
DataHandling Directory Reference

Files

file | Ifx_CircularBuffer.asm.c [code]
Circular buffer functions (assembler implementation).
file | Ifx_CircularBuffer.c [code]
Circular buffer functions in C language.
file | Ifx_CircularBuffer.h [code]
Circular buffer functions.
file | Ifx_Fifo.c [code]
FIFO functions.
file | Ifx_Fifo.h [code]
FIFO buffer functions.


iLLD_TC26B: TimerWithTrigger Directory Reference

  • Ccu6
  • TimerWithTrigger
TimerWithTrigger Directory Reference

Files

file | IfxCcu6_TimerWithTrigger.c [code]
CCU6 TIMERWITHTRIGGER details.
file | IfxCcu6_TimerWithTrigger.h [code]
CCU6 TIMERWITHTRIGGER details.


iLLD_TC26B: Ccu6 Directory Reference

  • Ccu6
Ccu6 Directory Reference

Directories

directory | Icu
directory | PwmBc
directory | PwmHl
directory | Std
directory | Timer
directory | TimerWithTrigger
directory | TPwm


iLLD_TC26B: Math Directory Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Math Directory Reference

Files

file | Ifx_AngleTrkF32.c [code]
Angle-tracking observer for sin/cos analog position sensor.
file | Ifx_AngleTrkF32.h [code]
Angle-tracking observer for sin/cos analog position sensor.
file | Ifx_Cf32.c [code]
Floating point signal, vector, and matrix library.
file | Ifx_Cf32.h [code]
Floating point signal, vector, and matrix library.
file | Ifx_Crc.c [code]
CRC algorithm.
file | Ifx_Crc.h [code]
CRC algorithm.
file | Ifx_FftF32.c [code]
Floating-point Fast Fourier Transform.
file | Ifx_FftF32.h [code]
Floating-point Fast Fourier Transform.
file | Ifx_FftF32_BitReverseTable.c [code]
Bit-reversal lookup for Floating-point Fast Fourier Transform.
file | Ifx_FftF32_TwiddleTable.c [code]
Floating-point Fast Fourier Transform Twiddle-Factors.
file | Ifx_IntegralF32.c [code]
Discrete integral approximation.
file | Ifx_IntegralF32.h [code]
Discrete integral approximation.
file | Ifx_LowPassPt1F32.c [code]
Low pass filter PT1.
file | Ifx_LowPassPt1F32.h [code]
Low pass filter PT1.
file | Ifx_Lut.h [code]
Lookup defintion with fixed-point angle data type.
file | Ifx_LutAtan2F32.c [code]
ATAN2 lookup functions with fixed-point angle data type.
file | Ifx_LutAtan2F32.h [code]
Floating point signal, vector, and matrix library.
file | Ifx_LutAtan2F32_Table.c [code]
Table data for ATAN2 lookup functions.
file | Ifx_LutIndexedLinearF32.h [code]
Look-up functionality.
file | Ifx_LutLinearF32.c [code]
Linear look-up function.
file | Ifx_LutLinearF32.h [code]
Look-up functionality.
file | Ifx_LutLSincosF32.c [code]
Table data for linear interpolation Sin/Cos lookup functions.
file | Ifx_LutLSincosF32.h [code]
Sin/Cos linear approximated lookup functions with fixed-point angle data type.
file | Ifx_LutSincosF32.c [code]
Sin/Cos lookup functions with fixed-point angle data type.
file | Ifx_LutSincosF32.h [code]
Sin/Cos lookup functions with fixed-point angle data type.
file | Ifx_LutSincosF32_Table.c [code]
Table data for Sin/Cos lookup functions.
file | Ifx_RampF32.c [code]
Ramp function.
file | Ifx_RampF32.h [code]
Ramp function.
file | Ifx_WndF32.h [code]
Windowing function.
file | Ifx_WndF32_BlackmanHarrisTable.c [code]
Lookup table for Blackman-Harris window function.
file | Ifx_WndF32_HannTable.c [code]
Lookup table for Hann window function.


iLLD_TC26B: Rdc Directory Reference

  • Dsadc
  • Rdc
Rdc Directory Reference

Files

file | IfxDsadc_Rdc.c [code]
DSADC RDC details.
file | IfxDsadc_Rdc.h [code]
DSADC RDC details.


iLLD_TC26B: Std Directory Reference

  • Mtu
  • Std
Std Directory Reference

Files

file | IfxMtu.c [code]
MTU basic functionality.
file | IfxMtu.h [code]
MTU basic functionality.


iLLD_TC26B: Dma Directory Reference

  • Dma
  • Dma
Dma Directory Reference

Files

file | IfxDma_Dma.c [code]
DMA DMA details.
file | IfxDma_Dma.h [code]
DMA DMA details.


iLLD_TC26B: Std Directory Reference

  • Dts
  • Std
Std Directory Reference

Files

file | IfxDts.c [code]
DTS basic functionality.
file | IfxDts.h [code]
DTS basic functionality.


iLLD_TC26B: Icu Directory Reference

  • Ccu6
  • Icu
Icu Directory Reference

Files

file | IfxCcu6_Icu.c [code]
CCU6 ICU details.
file | IfxCcu6_Icu.h [code]
CCU6 ICU details.


iLLD_TC26B: Port Directory Reference

  • Port
Port Directory Reference

Directories

directory | Io
directory | Std


iLLD_TC26B: Std Directory Reference

  • I2c
  • Std
Std Directory Reference

Files

file | IfxI2c.c [code]
I2C basic functionality.
file | IfxI2c.h [code]
I2C basic functionality.


iLLD_TC26B: Std Directory Reference

  • Smu
  • Std
Std Directory Reference

Files

file | IfxSmu.c [code]
SMU basic functionality.
file | IfxSmu.h [code]
SMU basic functionality.


iLLD_TC26B: Fft Directory Reference

  • Fft
Fft Directory Reference

Directories

directory | Fft
directory | Std


iLLD_TC26B: _Utilities Directory Reference

  • Service
  • CpuGeneric
  • _Utilities
_Utilities Directory Reference

Files

file Ifx_Assert.h [code]
Assert functions.


iLLD_TC26B: illd_development Directory Reference

  • bollusai
  • illd_development
illd_development Directory Reference

Directories

directory internal


iLLD_TC26B: Timer Directory Reference

  • Gtm
  • Tom
  • Timer
Timer Directory Reference

Files

file | IfxGtm_Tom_Timer.c [code]
GTM TIMER details.
file | IfxGtm_Tom_Timer.h [code]
GTM TIMER details.


iLLD_TC26B: Stm Directory Reference

  • Stm
Stm Directory Reference

Directories

directory | Std
directory | Timer


iLLD_TC26B: Timer Directory Reference

  • Gtm
  • Atom
  • Timer
Timer Directory Reference

Files

file | IfxGtm_Atom_Timer.c [code]
GTM TIMER details.
file | IfxGtm_Atom_Timer.h [code]
GTM TIMER details.


iLLD_TC26B: Cpu Directory Reference

  • Cpu
Cpu Directory Reference

Directories

directory | CStart
directory | Irq
directory | Std
directory | Trap


iLLD_TC26B: Std Directory Reference

  • Src
  • Std
Std Directory Reference

Files

file | IfxSrc.c [code]
SRC basic functionality.
file | IfxSrc.h [code]
SRC basic functionality.


iLLD_TC26B: Ccu6If Directory Reference

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Ccu6If Directory Reference

Files

file | Icu.h [code]
ICU interface.
file | PwmHl.h [code]
Multi-channels, dual-complementary PWM interface.
file | Timer.h [code]
Timer interface.
file | TPwm.h [code]
TPWM interface.


iLLD_TC26B: CpuGeneric Directory Reference

  • Service
  • CpuGeneric
CpuGeneric Directory Reference

Directories

directory | _Utilities
directory | If
directory | StdIf
directory | SysSe


iLLD_TC26B: _Lib Directory Reference

  • _Lib
_Lib Directory Reference

Directories

directory | DataHandling
directory | InternalMux


iLLD_TC26B: Fce Directory Reference

  • Fce
Fce Directory Reference

Directories

directory | Crc
directory | Std


iLLD_TC26B: Driver Directory Reference

  • Iom
  • Driver
Driver Directory Reference

Files

file | IfxIom_Driver.c [code]
IOM DRIVER details.
file | IfxIom_Driver.h [code]
IOM DRIVER details.


iLLD_TC26B: IncrEnc Directory Reference

  • Gpt12
  • IncrEnc
IncrEnc Directory Reference

Files

file | IfxGpt12_IncrEnc.c [code]
GPT12 INCRENC details.
file | IfxGpt12_IncrEnc.h [code]
GPT12 INCRENC details.


iLLD_TC26B: Compilers Directory Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
Compilers Directory Reference

Files

file | CompilerDcc.c [code]
file | CompilerDcc.h [code]
file | CompilerGhs.c [code]
file | CompilerGhs.h [code]
file | CompilerGnuc.c [code]
file | CompilerGnuc.h [code]
file | Compilers.h [code]
file | CompilerTasking.c [code]
file | CompilerTasking.h [code]


iLLD_TC26B: General Directory Reference

  • Service
  • CpuGeneric
  • SysSe
  • General
General Directory Reference

Files

file | Ifx_GlobalResources.c [code]
file | Ifx_GlobalResources.h [code]
Handling of global resources.


iLLD_TC26B: Phy_Pef7071 Directory Reference

  • Eth
  • Phy_Pef7071
Phy_Pef7071 Directory Reference

Files

file | IfxEth_Phy_Pef7071.c [code]
ETH PHY_PEF7071 details.
file | IfxEth_Phy_Pef7071.h [code]
ETH PHY_PEF7071 details.


iLLD_TC26B: I2c Directory Reference

  • I2c
  • I2c
I2c Directory Reference

Files

file | IfxI2c_I2c.c [code]
I2C I2C details.
file | IfxI2c_I2c.h [code]
I2C I2C details.


iLLD_TC26B: Std Directory Reference

  • Fce
  • Std
Std Directory Reference

Files

file | IfxFce.c [code]
FCE basic functionality.
file | IfxFce.h [code]
FCE basic functionality.


iLLD_TC26B: internal Directory Reference

  • bollusai
  • illd_development
  • internal
internal Directory Reference

Directories

directory tools


iLLD_TC26B: tools Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
tools Directory Reference

Directories

directory doc


iLLD_TC26B: Platform Directory Reference

  • Infra
  • Platform
Platform Directory Reference

Directories

directory Tricore


iLLD_TC26B: Std Directory Reference

  • Port
  • Std
Std Directory Reference

Files

file | IfxPort.c [code]
PORT basic functionality.
file | IfxPort.h [code]
PORT basic functionality.


iLLD_TC26B: Psi5 Directory Reference

  • Psi5
Psi5 Directory Reference

Directories

directory | Psi5
directory | Std


iLLD_TC26B: Tom Directory Reference

  • Gtm
  • Tom
Tom Directory Reference

Directories

directory | Pwm
directory | PwmHl
directory | Timer


iLLD_TC26B: Can Directory Reference

  • Multican
  • Can
Can Directory Reference

Files

file | IfxMultican_Can.c [code]
MULTICAN CAN details.
file | IfxMultican_Can.h [code]
MULTICAN CAN details.


iLLD_TC26B: doc Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
doc Directory Reference

Directories

directory doxygen


iLLD_TC26B: _Impl Directory Reference

  • _Impl
_Impl Directory Reference

Files

file | IfxAsclin_cfg.c [code]
ASCLIN on-chip implementation data.
file | IfxAsclin_cfg.h [code]
ASCLIN on-chip implementation data.
file | IfxCcu6_cfg.c [code]
CCU6 on-chip implementation data.
file | IfxCcu6_cfg.h [code]
CCU6 on-chip implementation data.
file | IfxCif_cfg.c [code]
CIF on-chip implementation data.
file | IfxCif_cfg.h [code]
CIF on-chip implementation data.
file | IfxCpu_cfg.c [code]
CPU on-chip implementation data.
file | IfxCpu_cfg.h [code]
CPU on-chip implementation data.
file | IfxDma_cfg.c [code]
DMA on-chip implementation data.
file | IfxDma_cfg.h [code]
DMA on-chip implementation data.
file | IfxDsadc_cfg.h [code]
DSADC on-chip implementation data.
file | IfxDts_cfg.h [code]
DTS on-chip implementation data.
file | IfxEmem_cfg.c [code]
EMEM on-chip implementation data.
file | IfxEmem_cfg.h [code]
EMEM on-chip implementation data.
file | IfxEray_cfg.c [code]
ERAY on-chip implementation data.
file | IfxEray_cfg.h [code]
ERAY on-chip implementation data.
file | IfxEth_cfg.h [code]
ETH on-chip implementation data.
file | IfxFce_cfg.h [code]
FCE on-chip implementation data.
file | IfxFft_cfg.h [code]
FFT on-chip implementation data.
file | IfxFlash_cfg.c [code]
FLASH on-chip implementation data.
file | IfxFlash_cfg.h [code]
FLASH on-chip implementation data.
file | IfxGlobal_cfg.h [code]
Global definitions.
file | IfxGpt12_cfg.h [code]
GPT12 on-chip implementation data.
file | IfxGtm_cfg.c [code]
GTM on-chip implementation data.
file | IfxGtm_cfg.h [code]
GTM on-chip implementation data.
file | IfxHssl_cfg.c [code]
HSSL on-chip implementation data.
file | IfxHssl_cfg.h [code]
HSSL on-chip implementation data.
file | IfxI2c_cfg.c [code]
I2C on-chip implementation data.
file | IfxI2c_cfg.h [code]
I2C on-chip implementation data.
file | IfxIom_cfg.h [code]
IOM on-chip implementation data.
file | IfxMsc_cfg.c [code]
MSC on-chip implementation data.
file | IfxMsc_cfg.h [code]
MSC on-chip implementation data.
file | IfxMtu_cfg.c [code]
Mtu on-chip implementation data.
file | IfxMtu_cfg.h [code]
Mtu on-chip implementation data.
file | IfxMultican_cfg.c [code]
MULTICAN on-chip implementation data.
file | IfxMultican_cfg.h [code]
MULTICAN on-chip implementation data.
file | IfxPort_cfg.c [code]
PORT on-chip implementation data.
file | IfxPort_cfg.h [code]
PORT on-chip implementation data.
file | IfxPsi5_cfg.c [code]
PSI5 on-chip implementation data.
file | IfxPsi5_cfg.h [code]
PSI5 on-chip implementation data.
file | IfxPsi5s_cfg.h [code]
PSI5S on-chip implementation data.
file | IfxQspi_cfg.c [code]
QSPI on-chip implementation data.
file | IfxQspi_cfg.h [code]
QSPI on-chip implementation data.
file | IfxScu_cfg.c [code]
SCU on-chip implementation data.
file | IfxScu_cfg.h [code]
SCU on-chip implementation data.
file | IfxSent_cfg.c [code]
SENT on-chip implementation data.
file | IfxSent_cfg.h [code]
SENT on-chip implementation data.
file | IfxSmu_cfg.c [code]
SMU on-chip implementation data.
file | IfxSmu_cfg.h [code]
SMU on-chip implementation data.
file | IfxSrc_cfg.c [code]
SRC on-chip implementation data.
file | IfxSrc_cfg.h [code]
SRC on-chip implementation data.
file | IfxStm_cfg.c [code]
STM on-chip implementation data.
file | IfxStm_cfg.h [code]
STM on-chip implementation data.
file | IfxVadc_cfg.c [code]
VADC on-chip implementation data.
file | IfxVadc_cfg.h [code]
VADC on-chip implementation data.


iLLD_TC26B: Std Directory Reference

  • Emem
  • Std
Std Directory Reference

Files

file | IfxEmem.c [code]
EMEM basic functionality.
file | IfxEmem.h [code]
EMEM basic functionality.


iLLD_TC26B: Qspi Directory Reference

  • Qspi
Qspi Directory Reference

Directories

directory | SpiMaster
directory | SpiSlave
directory | Std


iLLD_TC26B: Service Directory Reference

  • Service
Service Directory Reference

Directories

directory CpuGeneric


iLLD_TC26B: Flash Directory Reference

  • Flash
Flash Directory Reference

Directories

directory Std


iLLD_TC26B: Std Directory Reference

  • Scu
  • Std
Std Directory Reference

Files

file | IfxScuCcu.c [code]
SCU basic functionality.
file | IfxScuCcu.h [code]
SCU basic functionality.
file | IfxScuEru.c [code]
SCU basic functionality.
file | IfxScuEru.h [code]
SCU basic functionality.
file | IfxScuWdt.asm.h [code]
SCU basic functionality.
file | IfxScuWdt.c [code]
SCU basic functionality.
file | IfxScuWdt.h [code]
SCU basic functionality.


iLLD_TC26B: Mtu Directory Reference

  • Mtu
Mtu Directory Reference

Directories

directory Std


iLLD_TC26B: codingRules Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • codingRules
codingRules Directory Reference

Files

file | lld_codingRules.c [code]
file | lld_codingRules_codeFormating.c [code]
file | lld_codingRules_commonApis.c [code]


iLLD_TC26B: Smu Directory Reference

  • Smu
Smu Directory Reference

Directories

directory Std


iLLD_TC26B: Bsp Directory Reference

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Bsp Directory Reference

Files

file | Assert.c [code]
Assert functions.
file | Assert.h [code]
Assert functions.
file | Bsp.c [code]
Board support package.
file | Bsp.h [code]
Board support package.


iLLD_TC26B: In Directory Reference

  • Gtm
  • Tim
  • In
In Directory Reference

Files

file | IfxGtm_Tim_In.c [code]
GTM IN details.
file | IfxGtm_Tim_In.h [code]
GTM IN details.


iLLD_TC26B: common Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
common Directory Reference

Directories

directory | codingRules
directory | dosAndDont

Files

file | lld_api.c [code]
file | lld_conventions.c [code]
file | lld_conventionsDoxygen.c [code]
file | lld_filesAndConfig.c [code]
file | lld_structure.c [code]
file | lld_versioning.c [code]
file | mainpage.c [code]


iLLD_TC26B: Time Directory Reference

  • Service
  • CpuGeneric
  • SysSe
  • Time
Time Directory Reference

Files

file | Ifx_DateTime.c [code]
Date and time functions.
file | Ifx_DateTime.h [code]
Date and time functions.


iLLD_TC26B: Pwm Directory Reference

  • Gtm
  • Atom
  • Pwm
Pwm Directory Reference

Files

file | IfxGtm_Atom_Pwm.c [code]
GTM PWM details.
file | IfxGtm_Atom_Pwm.h [code]
GTM PWM details.


iLLD_TC26B: Atom Directory Reference

  • Gtm
  • Atom
Atom Directory Reference

Directories

directory | Pwm
directory | PwmHl
directory | Timer


iLLD_TC26B: Emem Directory Reference

  • Emem
Emem Directory Reference

Directories

directory Std


iLLD_TC26B: Std Directory Reference

  • Stm
  • Std
Std Directory Reference

Files

file | IfxStm.c [code]
STM basic functionality.
file | IfxStm.h [code]
STM basic functionality.


iLLD_TC26B: Std Directory Reference

  • Dsadc
  • Std
Std Directory Reference

Files

file | IfxDsadc.c [code]
DSADC basic functionality.
file | IfxDsadc.h [code]
DSADC basic functionality.


iLLD_TC26B: Timer Directory Reference

  • Stm
  • Timer
Timer Directory Reference

Files

file | IfxStm_Timer.c [code]
STM TIMER details.
file | IfxStm_Timer.h [code]
STM TIMER details.


iLLD_TC26B: Psi5 Directory Reference

  • Psi5
  • Psi5
Psi5 Directory Reference

Files

file | IfxPsi5_Psi5.c [code]
PSI5 PSI5 details.
file | IfxPsi5_Psi5.h [code]
PSI5 PSI5 details.


iLLD_TC26B: Dsadc Directory Reference

  • Dsadc
  • Dsadc
Dsadc Directory Reference

Files

file | IfxDsadc_Dsadc.c [code]
DSADC DSADC details.
file | IfxDsadc_Dsadc.h [code]
DSADC DSADC details.


iLLD_TC26B: Gpt12 Directory Reference

  • Gpt12
Gpt12 Directory Reference

Directories

directory | IncrEnc
directory | Std


iLLD_TC26B: Graph Legend

Graph Legend

This page explains how to interpret the graphs that are generated by doxygen.

Consider the following example:

/*! Invisible class because of truncation */
class Invisible { };
/*! Truncated class, inheritance relation is hidden */
class Truncated : public Invisible { };
/* Class not documented with doxygen comments */
class Undocumented { };
/*! Class that is inherited using public inheritance */
class PublicBase : public Truncated { };
/*! A template class */
template<class T> class Templ { };
/*! Class that is inherited using protected inheritance */
class ProtectedBase { };
/*! Class that is inherited using private inheritance */
class PrivateBase { };
/*! Class that is used by the Inherited class */
class Used { };
/*! Super class that inherits a number of other classes */
class Inherited : public PublicBase,
protected ProtectedBase,
private PrivateBase,
public Undocumented,
public Templ<int>
{
private:
Used *m_usedClass;
};

This will result in the following graph:

The boxes in the above graph have the following meaning:

  • A filled gray box represents the struct or class for which the graph is generated.
  • A box with a black border denotes a documented struct or class.
  • A box with a gray border denotes an undocumented struct or class.
  • A box with a red border denotes a documented struct or class forwhich not all inheritance/containment relations are shown. A graph is truncated if it does not fit within the specified boundaries.

The arrows have the following meaning:

  • A dark blue arrow is used to visualize a public inheritance relation between two classes.
  • A dark green arrow is used for protected inheritance.
  • A dark red arrow is used for private inheritance.
  • A purple dashed arrow is used if a class is contained or used by another class. The arrow is labelled with the variable(s) through which the pointed class or struct is accessible.
  • A yellow dashed arrow denotes a relation between a template instance and the template class it was instantiated from. The arrow is labelled with the template parameters of the instance.


iLLD_TC26B: lld_api.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
lld_api.c
Go to the documentation of this file.
1 /** \page lld_api iLLD APIs
2
3 This section provides the generic overview of APIs required for a iLLD
4
5 \section lldinitapi iLLD Init APIs
6
7 iLLDs which need the user configuration data, shall declare the data type for configuration. These data structures are instantiated by the higher level software. Following are the requirements for the driver.
8
9 \section lldcfgapi Initialization of configuration data structure
10
11 Any driver which uses the configuration data structure shall provide an interface to initialize these data structure elements to their default values. Main used case of such implementation is, when a driver is upgraded with an additional configuration parameter, such initialization would provide correct value to the variable so that the driver works correctly when used with legacy application software which used the previous version of the driver. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals.
12
13 Data structure shall be instantiated per HW instance for which the driver is targeted
14
15 The generic prototype shall be as\n
16 <B><Driver Prefix>_initConfig(<Driver Prefix>_Config *cfg);</B>\n
17 where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.
18
19 \section driverinit Driver Initialization
20
21 The iLLD shall provide an API to initialize the driver peripheral based on the user configuration. Configuration data shall be previously initialized to default values with init config interface. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals.
22
23 The driver initialization API shall initialize the peripheral registers to make the peripheral to work as drivers functionality. This API shall also initialize the driver internal data structure to their required init values.
24
25 The generic prototype shall be as\n
26 <B><Driver Prefix>_init(<Driver Prefix>_Handle *handle, <Driver Prefix>_Config *cfg);</B>\n
27 where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.
28
29 \section driverdeinit Driver De-Initialization
30
31 iLLD may provide an API to reset the driver to default reset state and to make to consume least power. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals.
32 The generic prototype shall be as\n
33 <B><Driver Prefix>_deInit(<Driver Prefix>_Handle *handle);</B>\n
34 where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.
35
36 \section funct_api iLLD functional APIs
37
38 iLLD shall provide API for each of the needed functionality the user may use. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals. For each of the peripherals instances the parameter passed will be deferring.
39
40 The generic prototype shall be as\n
41 <B><Driver Prefix>_<functionality>(<Driver Prefix>_Handle *handle);</B>
42 where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.
43
44 \section lld_internal iLLD internal methods
45
46 For better modularisation readability reasons the driver implementations shall use the internal static functions. In such cases the function definitions shall be defined in the similar way as iLLD functional APIs
47
48
49 [\ref lld_structure "Previous page"] [\ref lld_conventions "Next page"]
50 */


iLLD_TC26B: lld_codingRules.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • codingRules
lld_codingRules.c
Go to the documentation of this file.
1 /**
2 \page lld_codingRules Coding rules
3
4 -# \subpage lld_codingRules_codeFormating
5 -# \subpage lld_codingRules_general
6 -# \subpage lld_codingRules_codeChecking
7 -# \subpage lld_dosanddont_commonApis
8
9 [\ref lld_conventions "Previous page"] [\ref lld_codingRules_codeFormating "Next page"]
10
11 \page lld_codingRules_general General rules
12
13 \section curlyBraces Always use curly braces for if, for, while, do, ...
14
15 Correct:
16 \code
17 static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
18 {
19 ...
20 if( config->shadowControl != 0)
21 {
22 channel->SHADR.U = config->shadowAddress;
23 }
24 }
25 \endcode
26
27 Wrong:
28 \code
29 static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
30 {
31 ...
32 if( config->shadowControl != 0)
33 channel->SHADR.U = config->shadowAddress;
34 }
35 \endcode
36
37
38
39
40 [\ref lld_codingRules_codeFormating "Previous page"] [\ref lld_codingRules_codeChecking "Next page"]
41
42
43
44
45 \page lld_codingRules_codeChecking Code checking
46 \section parameterCheck Parameter check
47 In case the parameter can not be checked by the compiler for valid values, it shall be checked using the assertion function.
48
49 Example:
50 \code
51 IFX_INLINE void IfxDma_setChannelTransaction(Ifx_DMA* dma,IfxDma_ChannelId channelId, uint32 transferCount)
52 {
53 IFX_ASSERT(VERBOSE_LEVEL_ERROR,transferCount < 32);
54 }
55 \endcode
56
57
58
59
60
61 [\ref lld_codingRules_general "Previous page"] [\ref lld_dosanddont_commonApis "Next page"]
62
63
64
65
66 */


iLLD_TC26B: lld_codingRules_codeFormating.c Source File

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lld_codingRules_codeFormating.c
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1 /**
2
3 \page lld_codingRules_codeFormating Code formating
4 \section autoformating Auto-formating
5 Only use the code formating as defined by following script: $VERIF_LLD/bin/indent_rec
6
7 \section ignoreautoformating Ignore auto-formating
8 In case the source code shall not be formated by the formating tool the following command can be used:
9 \code
10 // *INDENT-OFF* Note: this file was indented manually by the author.
11 ... place here code that shall not be formated by the tool
12 // *INDENT-ON*
13 \endcode
14
15 \section fileStructure File structure
16 The source code in a file should be grouped using doxygen groups.
17 Groups should be sorted in the file by alphabetical order of the group name.
18 Inside a group, code shall be sorted by alphabetical order of the API names.
19
20
21
22 [\ref lld_codingRules "Previous page"] [\ref lld_codingRules_general "Next page"]
23
24 */


iLLD_TC26B: lld_codingRules_commonApis.c Source File

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lld_codingRules_commonApis.c
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1 /**
2 \page lld_dosanddont_commonApis APIs common to many module drivers
3
4 \section lld_dosanddont_commonApis_getSrc <modue>_get<Interrupt>Src()
5 For each interrupt service request control register, an API that returns the register address shall be available. The API syntax is as follow:
6 volatile Ifx_SRC_SRCR* <driverName>_get<Interrupt>Src(<ModuleType>*module);
7
8 Example: The transmit interrupt of the QSPI driver has the following API:
9
10 volatile Ifx_SRC_SRCR* IfxQspi_getTransmitSrc(Ifx_QSPI* module);
11
12
13
14 \section lld_dosanddont_commonApis_get_index <modue>_getIndex()
15 The API Ifx<Module>_getIndex(Ifx_<MODULE>* module) shall be implemented in the file Ifx<Module>.c/h and use an array define in Ifx<Module>_cfg.c/h;
16
17 Example:
18
19 In file Ifxcpu.h
20 \code
21 IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu);
22 \endcode
23
24 In file Ifxcpu.c
25 \code
26 // brief Return cpu index
27 //
28 // \param cpu Specifies cpu module
29 //
30 // \return Return cpu index.
31 //
32 IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu)
33 {
34 IfxCpu_ResourceCpu result = IfxCpu_ResourceCpu_none, index;
35 for (index = 0; index < IFXCPU_COUNT; index++)
36 {
37 if (IfxCpu_cfg_indexMap[index].module == cpu)
38 {
39 result = IfxCpu_cfg_indexMap[index].index;
40 break;
41 }
42 }
43 return result;
44 }
45
46 \endcode
47
48 In file Ifxcpu_cfg.h
49 \code
50 // List of the available CPU resources
51 typedef enum
52 {
53 IfxCpu_ResourceCpu_0 = 0, // CPU 0
54 IfxCpu_ResourceCpu_1, // CPU 1
55 IfxCpu_ResourceCpu_2, // CPU 2
56 IfxCpu_ResourceCpu_none // None of the CPU
57 } IfxCpu_ResourceCpu;
58
59 IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu);
60 \endcode
61
62 In file Ifxcpu_cfg.c
63 \code
64 const IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_COUNT] =
65 {
66 {&MODULE_CPU0, IfxCpu_ResourceCpu_0},
67 {&MODULE_CPU1, IfxCpu_ResourceCpu_1},
68 {&MODULE_CPU2, IfxCpu_ResourceCpu_2},
69 };
70 \endcode
71
72
73
74 [\ref lld_codingRules_codeChecking "Previous page"] [\ref lld_doxygenRules "Next page"]
75
76
77
78 */


iLLD_TC26B: lld_conventions.c Source File

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lld_conventions.c
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1 /** \page lld_conventions Naming Conventions
2
3 This section provides the naming convention to be followed during development.
4
5 As general rule all the "exported" types/definitions/class/objects (i.e. Function, enum, typedef, constant, variable, ...) should start with the filename + underscore "_".
6
7 Example: in file IfxScuWdt.c/h the function shall be:
8 \li IfxScuWdt_enableEndinit()
9 \li IfxScuWdt_disableEndinit()
10
11
12 \section files iLLD Files
13
14 Ifx<HW Module name>[<HW Sub module name>][_SW Driver if special][sub SW module name].c/h
15
16 Example:
17 \li 1) With HW module only without sub-module: IfxPort.c/.h
18 \li 2) With HW module and sub-module: IfxScuWdt.c/.h
19 \li 3) With HW module sub-module and SW driver: IfxGtmTom_Pwm.c/.h
20 \li 4) With HW module sub-module and SW driver + SW sub module: IfxGtmTom_PwmHl.c/.h (only if it makes sense to split the 10:files to make it modular)
21
22 Important things to check during review/ or with static code check tools:
23 \li 1) Prefix: Ifx (in title case)
24 \li 2) <module name>[<HW Sub module name>] (in camel case)
25 \li 3) [_SW Driver if special] (an underscore to separate and title case SW driver name)
26 \li 4) .c and .h in the small case
27
28
29 \section types Data Types
30 <B>typedef <standard type> Ifx<HW Module name>[<HW Sub module name>][_SW Driver if special]_<user type name>;</B>
31
32 <Standard type> structure/union/enum definitions with its elements, and other C data types
33
34 Example:
35 \code
36 typedef struct
37 {
38 uint32 pllFreqInHz;
39 uint32 stepFreqInHz;
40 uint8 stepPerIn_uSec;
41 uint8 pDivider;
42 uint8 nDivider;
43 uint8 k2Divider;
44 } IfxScu_Pll_Config;
45 \endcode
46
47 Important things to check:
48 \li 1) Points 1 to 3 for filenames
49 \li 2) _<user type name >: an underscore to separate with the rest and Camel case letters (first letter also capital).
50
51
52 \section struct Structures
53
54 To define structure types the convention shall be followed as in type defines above.
55
56 For structure elements simple name with camel case letters with first letter small shall be used.
57
58 Refer to the example for naming convention for type defines
59
60
61 \section enum Enumerated Types
62 To define enum types the convention shall be followed as in type defines above.
63
64 For enum elements following naming convention to be followed:\n
65 <B>Ifx<HW Module name>[<HW Sub module name>][_SW Driver if special]_<Enum Name>_<Enum element></B>
66
67 <Enum element> camel case letter
68 <Enum Name> Camel case letter
69
70 Example:
71 \code
72 typedef enum {
73 IfxDma_ChannelPriority_low = 0,
74 IfxDma_ChannelPriority_medium,
75 IfxDma_ChannelPriority_high
76 } IfxDma_ChannelPriority;
77 \endcode
78
79 Important things to check:
80 \li 1) Points 1 to 3 for filenames
81 \li 2) _<Enum Element>: an underscore to separate with the rest and Camel case letters (first letter lower case).
82
83
84
85 \section defines #define Constants or Macros
86
87 <B>#define IFX<MODULE>[<HW SUB MODULE NAME>][_SW DRIVER]_<FUNCTIONALITY NAME></B>
88
89 <FUNCTIONALITY NAME>: Meaningful name to represent the functionality. With "_" to separate words
90
91 Example:
92 \code
93 #define IFXSCUCCU_PLL_FREE_RUNNING_FREQ (100000000U)
94 \endcode
95
96 Important things to check:
97 \li 1) all capital letters
98
99
100 \section function Functions
101
102 All exported functions:
103 <B>Ifx<HW Module name>[<HW Sub module name>][_SW Driver if special]_<Functionality></B>
104
105 Example:
106
107 \code
108 IfxGtmTom_Pwm_setDutyCycle(..)
109 \endcode
110
111 Important things to check:
112 \li 1) Points 1 to 3 for filenames
113 \li 2)_<Functionality>: an underscore to separate and Camel case letters with first letter small. (Convention used with object oriented programming). Functionality shall start with the main action (verb) to be fulfilled with the interface.
114
115 For example:
116 \li An interface to set pin level high, the function name is setPinHigh.
117 \li An interface to read the result of ADC conversion is readResult
118 \li An interface to send the data byte over communication peripheral sendByte
119
120 \section parameter Function's parameter & struct members
121 Function parameter are not doing an action done but does set values for confiuguration, then there is no verb in the name.
122
123 Examples:
124 \code
125 typedef struct
126 {
127 boolean hardwareRequestEnabled; // \brief Enabling the hardware channel request
128 } IfxDma_Dma_ChannelConfig;
129 \endcode
130
131 \section inline Inline Functions
132
133 All inline functions as:\n
134 <B>IFX_INLINE <function definition></B>
135
136 Shall follow the naming conventions as in Functions
137
138
139 \section standard Infineon definitions for Standard Data Types
140
141 Located in \ref Cpu/Std/Platform_Types.h
142
143
144 [\ref lld_api "Previous page"] [\ref lld_codingRules "Next page"]
145 */


iLLD_TC26B: lld_conventionsDoxygen.c Source File

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lld_conventionsDoxygen.c
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1 /**
2 \page lld_doxygenRules Doxygen rules
3
4 \section ucRootGroup Microcontroller root group
5 The microcontroller documentation root group is IfxLld. The group is defined in the file info.dox located in the microcontroller derivative root directory.
6
7 Example:
8 \code
9 * \defgroup IfxLld TC27x B-Step Microcontroller
10 \endcode
11
12 \section moduleGroup Modules group
13 Module's group names have the follwing syntax: '\\defgroup IfxLld_<Module>'.
14 The group is direct child of the \ref ucRootGroup.
15
16 v <Module> is the module short name in with the 1st letter upper case and then lower case. The group name is defined in the Ifx<Module>_regdef.h file. Example:
17 \code
18 * \defgroup IfxLld_Dma DMA
19 * \ingroup IfxLld
20 \endcode
21
22 The following groups are also defined in the Ifx<Module>_regdef.h file for each modules:
23 - IfxLld_<Module>_Bitfields : Bitfield macro definition
24 - IfxLld_<Module>_Union : module union types
25 - IfxLld_<Module>_Struct : module struct types
26
27 \section moduleStdGroup Module standard driver group
28 Module's standard driver group have the follwing syntax: '\\defgroup IfxLld_<Module>_Std'.
29 The group is direct child of the \ref moduleGroup.
30
31 Example:
32 \code
33 * \defgroup IfxLld_Asclin_Std Basic functionality
34 * \ingroup IfxLld_Asclin
35 \endcode
36
37
38 \section moduleInterfaceGroup Module interface driver group
39 Module's interface driver group have the follwing syntax: '\\defgroup IfxLld_<Module>_<Interface>'.
40 The group is direct child of the \ref moduleGroup.
41
42 <Interface> is the interface driver name.
43
44 Example:
45 \code
46 * \defgroup IfxLld_Asclin_AscIf ASC interface driver
47 * Implements the standard ASC interface
48 * \ingroup IfxLld_Asclin
49 \endcode
50
51 \section generalRules General rules
52 - As group name are global names, a group name shall start with the parent group name.
53 - Group names are 1st letter upper case, then camel case, group levels are separated by underscore
54
55 Example:
56 - |--IfxLld
57 - | |--IfxLld_Dma
58 - | | |--IfxLld_Dma_Std
59 - | | |--IfxLld_Dma_Std_ChannelTransaction
60 - | | |--IfxLld_Dma_Dma
61
62
63 \section docReturnValue Documentation of return values
64 The return value shall be documented using \\return when docuementation is provided for a single case.
65
66 The return value shall be documented using \\retval when docuementation is provided for a multiple case.
67
68 Example (single case):
69 \code
70 * \return Return the raw converted analog value.
71 \endcode
72 Output:
73 * \return Return the raw converted analog value.
74
75 Example (multiple case):
76 \code
77 * \retval TRUE in case of success
78 * \retval FALSE in case of error
79 \endcode
80 Output:
81 * \retval TRUE in case of success
82 * \retval FALSE in case of error
83
84
85 \section parameterDocumentation
86 Documentation shall provide range for parameters when not entirely defined.
87
88 Example:
89 \code
90 // \param transferCount Number of transaction, Range=[0,32]
91 IFX_INLINE void IfxDma_setChannelTransaction(Ifx_DMA* dma,IfxDma_ChannelId channelId, uint32 transferCount)
92 { ... }
93 \endcode
94
95 [\ref lld_dosanddont_if "Previous page"] [\ref lld_filesAndConfig "Next page"]
96
97 */


iLLD_TC26B: lld_dosanddont.c Source File

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lld_dosanddont.c
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1 /**
2 \page lld_dosanddont Do's and don't
3
4 -# \subpage lld_dosanddont_namingConvention
5 -# \subpage lld_dosanddont_codingRules
6 -# \subpage lld_dosanddont_documentation
7 -# \subpage lld_dosanddont_optimisation
8 -# \subpage lld_dosanddont_enumUsage
9
10
11
12 [\ref lld_versioning "Previous page"] [\ref lld_dosanddont_namingConvention "Next page"]
13
14
15 \page lld_dosanddont_codingRules Coding rules
16
17 \section typeAssumption Type assumption
18 <SPAN style="font-family:courier;font-size:small;">[link: \ref typeAssumption]</SPAN>
19
20 Bitfield values should not be assumed as Boolean.
21
22 Correct:
23 \code
24 IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA* dma,IfxDma_ChannelId channelId)
25 {
26 return dma->CH[channelId].CHCSR.B.LXO != 0;
27 }
28 \endcode
29
30 Wrong:
31 \code
32 IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA* dma,IfxDma_ChannelId channelId)
33 {
34 return dma->CH[channelId].CHCSR.B.LXO;
35 }
36 \endcode
37
38
39 \section variableNmaes Variable names
40 <SPAN style="font-family:courier;font-size:small;">[link: \ref variableNmaes]</SPAN>
41
42 Use explicit names for variable.
43 Example:
44 With
45 \code
46 Ifx_DMA* dma;
47 dma->source = 0x123;
48 \endcode
49 the code can be easier understand than with
50 \code
51 Ifx_DMA* baseAddr;
52 baseAddr->source = 0x123;
53 \endcode
54
55 \section numbers Avoid numbers, use constant instead
56 <SPAN style="font-family:courier;font-size:small;">[link: \ref numbers]</SPAN>
57
58
59 Correct:
60 \code
61 #define IFXDMA_DMA_ENABLE_SHADOW_ADDRESS (2) // Position of the shadow address enable bit
62
63 static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
64 {
65 ...
66 if( config->shadowControl & (1 << IFXDMA_DMA_ENABLE_SHADOW_ADDRESS) )
67 {
68 channel->SHADR.U = config->shadowAddress;
69 }
70 }
71 \endcode
72
73 Wrong:
74 \code
75 static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
76 {
77 ...
78 if( config->shadowControl & (1 << 2) )
79 {
80 channel->SHADR.U = config->shadowAddress;
81 }
82 }
83 \endcode
84
85 . Example(1 << 2) below
86
87
88 [\ref lld_dosanddont_namingConvention "Previous page"] [\ref lld_dosanddont_documentation "Next page"]
89
90 \page lld_dosanddont_documentation Documentation
91
92 \section theSame Avoid 'the same' in documentation
93 <SPAN style="font-family:courier;font-size:small;">[link: \ref theSame]</SPAN>
94
95 Correct:
96 \code
97 boolean channelInterrupt; // \brief Determines the setting of the channel transfer interrupt flag and interrupt service request
98 \endcode
99
100 Wrong(<SPAN style="font-family:courier"><SPAN style="color:red">for the same</SPAN></SPAN>):
101 \code
102 boolean channelInterrupt; // \brief Determines the setting of the channel transfer interrupt flag and interrupt service request for the same
103 \endcode
104
105
106
107 [\ref lld_dosanddont_codingRules "Previous page"] [\ref lld_dosanddont_optimisation "Next page"]
108
109
110 */


iLLD_TC26B: lld_dosanddont_enumUsage.c Source File

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lld_dosanddont_enumUsage.c
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1 /**
2
3 \page lld_dosanddont_enumUsage Usage of enums
4 \section convention_in_std enum convention in microcontroller /Std drivers
5 <SPAN style="font-family:courier;font-size:small;">[link: \ref convention_in_std]</SPAN>
6
7
8 \todo Discuss and agree on the enum naming convention
9
10 In case an enum represents a register bitfield value, then the following rules apply:
11 - The enum type shall have an explicit name. The name shall not include register or bitfield short names. This is to abstract the setting when passed as a parameter to a function in the same way the function APIs names does.
12 - Each enum member shall define explicitly an enum value with '='.
13 - The enum documentation shall state for which register bitfield the enum has been defined with "Definition for <ModuleType>.<REGISTER NAME>.B.<BITFIELDNAME>", this to avoid misuse of the enum.
14 - Each of the member shall have a documentation, that explain to users what is the enum for without reading the user manual.
15 - Only enum defined in the current Std or base drivers shall be used.
16
17 Correct:
18 \code
19 // File Std/IfxQspi.h
20
21 // QSPI controller mode
22 // Definition for Ifx_QSPI.GLOBALCON.B.MS
23 typedef enum
24 {
25 IfxQspi_Mode_master = 0, // QSPI in "master" mode
26 IfxQspi_Mode_pwmOverSpi = 1, // QSPI in "PWM over SPI" mode
27 IfxQspi_Mode_slave = 2 // QSPI in "slave" mode
28 } IfxQspi_Mode;
29
30 void IfxQspi_foo(IfxQSPI* module)
31 {
32 if (module->GLOBALCON.B.MS != IfxQspi_Mode_slave)
33 { //...
34 }
35 else
36 { // ...
37 }
38 }
39
40 \endcode
41
42 Wrong:
43 \code
44 // File 1_SrvSw/If/SscIf.h
45
46 // SSC operation modes
47 typedef enum
48 {
49 SscIf_Mode_master, // Master mode
50 SscIf_Mode_slave, // Slave mode
51 SscIf_Mode_undefined // Undefined mode
52 } SscIf_Mode;
53
54 // File Std/IfxQspi.h
55
56 // QSPI controller mode
57 typedef enum
58 {
59 IfxQspi_GLOBALCON_MS_master = 0, // Corresponds with GLOBALCON.B.MS == 0
60 IfxQspi_GLOBALCON_MS_pwmOverSpi, // Corresponds with GLOBALCON.B.MS == 1
61 IfxQspi_GLOBALCON_MS_slave // Corresponds with GLOBALCON.B.MS == 2
62 } IfxQspi_GLOBALCON_MS;
63
64 void IfxQspi_foo(IfxQSPI* module)
65 {
66 if (module->GLOBALCON.B.MS != SscIf_Mode_slave)
67 { //...
68 }
69 else
70 { // ...
71 }
72 }
73
74 \endcode
75
76
77 \section enum_in_std Usage of enums in microcontroller interface drivers
78 <SPAN style="font-family:courier;font-size:small;">[link: \ref enum_in_std]</SPAN>
79
80
81 The code dependencies shall be limited to the microcontroller HAL and service software interface /1_SrvSw/If, therefore only enums from this files can be used.
82
83 \code
84 // File 1_SrvSw/If/SscIf.h
85
86 // SSC operation modes
87 typedef enum
88 {
89 SscIf_Mode_master, // Master mode
90 SscIf_Mode_slave, // Slave mode
91 SscIf_Mode_undefined // Undefined mode
92 } SscIf_Mode;
93
94 // File Ssc/IfxQspi_Ssc.h
95
96 // QSPI controller mode
97 // Definition for Ifx_QSPI.GLOBALCON.B.MS
98 typedef enum
99 {
100 IfxQspi_Mode_master = 0, // QSPI in "master" mode
101 IfxQspi_Mode_pwmOverSpi = 1, // QSPI in "PWM over SPI" mode
102 IfxQspi_Mode_slave = 2 // QSPI in "slave" mode
103 } IfxQspi_Mode;
104
105
106
107 SscIf_Mode IfxQspi_Ssc_foo(void)
108 {
109 SscIf_Mode mode;
110 switch ( IfxQspi_getMode(&MODULE_QSPI0))
111 {
112 case IfxQspi_Mode_master:
113 mode = SscIf_Mode_master;
114 break;
115 case IfxQspi_Mode_slave:
116 mode = IfxQspi_Mode_slave;
117 break;
118 default:
119 mode = SscIf_Mode_undefined;
120 break;
121 }
122 }
123 \endcode
124
125 \section enumIndex Enum name with index
126 <SPAN style="font-family:courier;font-size:small;">[link: \ref enumIndex]</SPAN>
127
128 Do not use left zero padding for enum names, because the highest index number can not be assumed to be fixed.
129
130 Correct:
131 \code
132 typedef enum
133 {
134 Dma_Channel_0 = 0,
135 Dma_Channel_1 = 1,
136 Dma_Channel_2 = 2,
137 Dma_Channel_3 = 3
138 } IfxQspi_Mode;
139 \endcode
140
141 Wrong:
142 \code
143 typedef enum
144 {
145 Dma_Channel_00 = 0,
146 Dma_Channel_01 = 1,
147 Dma_Channel_02 = 2,
148 Dma_Channel_03 = 3
149 } IfxQspi_Mode;
150 \endcode
151
152 \section enumPrefix Enum members shall be prefixed with the enum type
153 <SPAN style="font-family:courier;font-size:small;">[link: \ref enumPrefix]</SPAN>
154
155
156 Correct:
157 \code
158 typedef enum
159 {
160 IfxDma_Channel_0 = 0,
161 } IfxDma_Channel;
162 \endcode
163
164 Wrong(<SPAN style="font-family:courier">IfxDma_Channel<SPAN style="color:red">Id</SPAN></SPAN>):
165 \code
166 typedef enum
167 {
168 Dma_Channel_0 = 0,
169 } IfxDma_ChannelId;
170 \endcode
171
172
173
174
175 [\ref lld_dosanddont_optimisation "Previous page"]
176
177
178
179 */


iLLD_TC26B: lld_dosanddont_namingConvention.c Source File

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lld_dosanddont_namingConvention.c
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1 /**
2
3 \page lld_dosanddont_namingConvention Naming convention
4 \section enum Enum
5 <SPAN style="font-family:courier;font-size:small;">[link: \ref enum]</SPAN>
6
7 Enumeration items must be prefixed with the enumeration type.
8
9 Correct:
10 \code
11 typedef enum
12 {
13 IfxDma_ChannelPriority_low = 0,
14 IfxDma_ChannelPriority_medium,
15 IfxDma_ChannelPriority_high
16 } IfxDma_ChannelPriority;
17 \endcode
18 Wrong (<SPAN style="font-family:courier">IfxDma_ChannelPriority<SPAN style="color:red">Select</SPAN></SPAN>):
19 \code
20 typedef enum
21 {
22 IfxDma_ChannelPriority_low = 0,
23 IfxDma_ChannelPriority_medium,
24 IfxDma_ChannelPriority_high
25 } IfxDma_ChannelPrioritySelect;
26 \endcode
27
28
29
30 \section directoryName Directory name
31 <SPAN style="font-family:courier;font-size:small;">[link: \ref directoryName]</SPAN>
32
33 Dirtectory shall have the same name as the driver name without the Ifx prefix.
34
35 Correct:
36 - Dma
37 - Dma
38 - IfxDma.c
39 - IfxDma.h
40
41 Wrong:
42 - Dma
43 - <SPAN style="color:red">Interface</SPAN>
44 - IfxDma.c
45 - IfxDma.h
46
47
48 \section parameter Function's parameter & struct members
49 <SPAN style="font-family:courier;font-size:small;">[link: \ref parameter]</SPAN>
50
51 Function parameter are not doing an action done but does set values for confiuguration, then there is no verb in the name.
52
53 Correct:
54 \code
55 typedef struct
56 {
57 boolean hardwareRequestEnabled; // \brief Enabling the hardware channel request
58 } IfxDma_Dma_ChannelConfig;
59 \endcode
60
61 Wrong(<SPAN style="font-family:courier"><SPAN style="color:red">enable</SPAN>HardwareRequest</SPAN>):
62 \code
63 typedef struct
64 {
65 boolean enableHardwareRequest; // \brief Enabling the hardware channel request
66 } IfxDma_Dma_ChannelConfig;
67 \endcode
68
69 \section staticFunctionNames Static function names shall also be prefixed
70 <SPAN style="font-family:courier;font-size:small;">[link: \ref staticFunctionNames]</SPAN>
71
72
73 Correct:
74 \code
75 static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
76 \endcode
77
78 Wrong:
79 \code
80 static void configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
81 \endcode
82
83 \section parameterhandle Do not explicitely use 'handle' in the parameter name
84 <SPAN style="font-family:courier;font-size:small;">[link: \ref parameterhandle]</SPAN>
85
86 Remove the name ‘handle’ from the parameter’s name, even we hnow that it is an handle. It does not add information but increase the source code length.
87
88 Correct:
89 \code
90 IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig* config, IfxDma_Dma* dma);
91 \endcode
92
93 Wrong(<SPAN style="font-family:courier">dma<SPAN style="color:red">Handle</SPAN></SPAN>):
94 \code
95 IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig* config, IfxDma_Dma* dmaHandle);
96 \endcode
97
98
99 [\ref lld_dosanddont "Previous page"] [\ref lld_dosanddont_codingRules "Next page"]
100
101 */


iLLD_TC26B: lld_dosanddont_optimisation.c Source File

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lld_dosanddont_optimisation.c
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1 /**
2 \page lld_dosanddont_optimisation Optimisation
3 \section moduleRegisterAccessByArray Module register access (array)
4 <SPAN style="font-family:courier;font-size:small;">[link: \ref moduleRegisterAccessByArray]</SPAN>
5
6 Code should be optimised by using array index instead of if..else.
7
8 Correct:
9 \code
10 dma->BLK[index]. ...
11 \endcode
12
13 Wrong:
14 \code
15 if( moveEngine == IfxDma_MoveEngine_1 )
16 {
17 dma->BLK1. ...
18 }
19 else
20 {
21 dma->BLK0. ...
22 }
23 \endcode
24
25 In case the array is not available in the module structure definition, please request for implementation. The reasons could be:
26 - it has been forgotten to build the array during the register header file generation
27 - the module address map does not currently supports the array access
28
29 \section moduleRegisterAccess Module register access (read modify write)
30 <SPAN style="font-family:courier;font-size:small;">[link: \ref moduleRegisterAccess]</SPAN>
31
32 Runtime optimisation should be done by utilizing a local variable when more than one bitfield of a register is to be modified.
33
34 Correct:
35 \code
36 IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA* dma,IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
37 {
38 Ifx_DMA_BLK_ME_ADICR adicr;
39 adicr.U = dma->CH[channelId].ADICR.U;
40 adicr.B.SMF = incStep;
41 adicr.B.INCS = direction;
42 adicr.B.CBLS = size;
43 dma->CH[channelId].ADICR.U = adicr.U;
44 }
45 \endcode
46
47 Wrong:
48 \code
49 IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA* dma,IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
50 {
51 dma->CH[channelId].ADICR.B.SMF = incStep;
52 dma->CH[channelId].ADICR.B.INCS = direction;
53 dma->CH[channelId].ADICR.B.CBLS = size;
54 }
55 \endcode
56
57 [\ref lld_dosanddont_documentation "Previous page"] [\ref lld_dosanddont_enumUsage "Next page"]
58
59
60
61 */


iLLD_TC26B: lld_filesAndConfig.c Source File

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lld_filesAndConfig.c
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1 /** \page lld_filesAndConfig Files and Configuration
2
3 \section folders Folder structure
4
5 Starting from <B>Src/BaseSw/</B>:
6 <li> <B>iLLD</B> contains the iLLD files for all derivatives
7 <ol>
8 <li> Inside <B>Src/BaseSw/iLLD/<DUT>/Tricore</B>:
9 <li> <B>_Build</B> contains the set of files to be included to build the specific driver. Mostly used by internal tools
10 <li> <B>_Impl</B> contains derivative specific configuration which could also be adapted by the user
11 <li> <B>_PinMap</B> contains I/O configurations in pin tables
12 <li> <B>_Lib</B> contains derivative dependent library functions
13 <li> <B><module></B> contains the actual peripheral driver
14 </ol>
15 <li> <B>Infra</B> contains the header files for all derivatives, compiler specific files and application start-up software files for Aurix2G derivatives
16 <ol>
17 <li> Inside <B>Src/BaseSw/Infra/Platform/Tricore/Compilers</B> contains the compiler specific files
18 <li> Inside <B>Src/BaseSw/Infra/Sfr/<DUT></B> contains the header files
19 <li> Inside <B>Src/BaseSw/Infra/Ssw/<DUT>/Tricore</B> contains the application start-up software files
20 </ol>
21 <li> <B>Service</B> contains derivative independent service software sources
22
23 <li> <B>VERIF_DUT</B> stands for the derivative which should be selected
24
25
26 \section ifxCfgH Ifx_Cfg.h
27
28 Please create a configuration file with the name "Ifx_Cfg.h" in your application to
29 configure the iLLD library components.
30
31 Currently it only requires to select the external oscillator frequency (XTAL)
32 and the desired system frequency.
33
34 In addition, this file allows you to specify how assertions should be print out.
35
36 Minimal Ifx_Cfg.h file:
37 \code
38 #ifndef IFX_CFG_H
39 #define IFX_CFG_H
40
41 // XTAL/PLL frequency
42 #define IFX_CFG_SCU_XTAL_FREQUENCY (20000000)
43 #define IFX_CFG_SCU_PLL_FREQUENCY (200000000)
44
45 // Assertions
46 #define IFX_ASSERT(level, expr)
47
48 #endif /* IFX_CFG_H */
49 \endcode
50
51 The configuration macros mentioned below can be overridden in Ifx_Cfg.h:
52 \li IFX_CFG_DISABLE_DEFAULT_INTRINSICS - IFX_CFG_DISABLE_DEFAULT_INTRINSICS shall be defined in Ifx_Cfg.h to disable the default intrinsics provided For Ex. NOP,CRC
53 \li IFX_CFG_USE_COMPILER_DEFAULT_LINKER - IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h to use the default compiler provided linker varaibles and startup
54 \li IFX_USE_SW_MANAGED_INT - IFX_USE_SW_MANAGED_INT shall be defined in Ifx_Cfg.h to use the software based interrupts
55 SCU related Macros:
56 \li IFX_CFG_SCU_XTAL_FREQUENCY - IFX_CFG_SCU_XTAL_FREQUENCY shall be defined to respective XTAL frequency in Ifx_Cfg.h \li IFX_CFG_SCU_PLL_FREQUENCY - IFX_CFG_SCU_PLL_FREQUENCY shall be defined to desired PLL frequency in Ifx_Cfg.h \li IFX_CFG_SCU_PLL1_FREQUENCY - IFX_CFG_SCU_PLL1_FREQUENCY shall be defined to desired PLL1 frequency in Ifx_Cfg.h \li IFX_CFG_SCU_PLL2_FREQUENCY - IFX_CFG_SCU_PLL2_FREQUENCY shall be defined to desired PLL2 frequency in Ifx_Cfg.h \li <B>Applicable for only Aurix2G devices</B>:
57 \li Application Start-up related Macros:
58 \li IFX_CFG_SSW_ENABLE_TRICOREx (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx shall be defined to 0 in Ifx_Cfg.h to disable the CPUx.
59 \li IFX_CFG_SSW_ENABLE_TRICOREx_PCACHE (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx_PCACHE shall be defined to 0 in Ifx_Cfg.h to disable the PCACHE of CPUx
60 \li IFX_CFG_SSW_ENABLE_TRICOREx_DCACHE (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx_DCACHE shall be defined to 0 in Ifx_Cfg.h to disable the DCACHE of CPUx
61
62 Example for Assertion output via printf:
63 \code
64 #ifdef __cplusplus
65 extern "C" {
66 #endif
67 // defined in main.c
68 extern const char* verboseLevelStr[6];
69
70 #define IFX_ASSERT(level, expr) (((expr) || (level > IFX_VERBOSE_LEVEL_ERROR)) ? ((void)0) : (void)printf("[ASSERT:%s] '%s' in %s:%d (function '%s')\n", verboseLevelStr[level], #expr, __FILE__, __LINE__, __func__))
71
72 #endif
73 \endcode
74
75
76 And in your main.c file (or somewhere else):
77
78 \code
79 //! this global array is used by IFX_ASSERT of iLLDs
80 const char* verboseLevelStr[6] = {
81 "OFF",
82 "FAILURE",
83 "ERROR",
84 "WARNING",
85 "INFO",
86 "DEBUG"
87 };
88 \endcode
89
90
91 \section minimalSetup Minimal Set of Driver sources
92
93 If you prefer to use (resp. compile) only a minimal set of drivers for your application, please add at least following "infrastructural resources":
94
95 \li <B>Src/BaseSw/Infra/Sfr/<DUT>/_Reg</B> directory
96 \li <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Lib</B> directory
97 \li <B>Src/BaseSw/Service</B> directory
98 \li CPU driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Cpu</B> and <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxCpu_cfg.*</B>
99 \li DMA driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Dma</B> and <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxDma_cfg.*</B>
100 \li Port driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Port</B>, <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxPort_cfg.*</B> and <B>src/ifx/\$(VERIF_DUT)/_PinMap/IfxPort_PinMap.*</B>
101 \li SCU driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Scu</B> and <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxScu_cfg.*</B>
102 \li Src driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Src</B> and <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxSrc_cfg.*</B>
103 \li Stm driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Stm</B> and <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxStm_cfg.*</B>
104
105 Whenever additional drivers should be added, you typically have to copy following files/directories:
106
107 \li <B>Src/BaseSw/iLLD/<DUT>/Tricore/<driver></B>
108 \li <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/<driver>_cfg.*</B>
109 \li <B>Src/BaseSw/iLLD/<DUT>/Tricore/_PinMap/<driver>_cfg.*</B>
110
111
112 \li For more information you can refer the BIFACES User Manual.
113
114 [\ref lld_doxygenRules "Previous page"] [\ref lld_versioning "Next page"]
115
116
117 */
118
NOP
#define NOP
Definition: IfxCpu_IntrinsicsDcc.h:2073
IFX_CFG_SCU_PLL_FREQUENCY
#define IFX_CFG_SCU_PLL_FREQUENCY
Default PLL frequency.
Definition: IfxScu_cfg.h:66
IFX_CFG_SCU_XTAL_FREQUENCY
#define IFX_CFG_SCU_XTAL_FREQUENCY
Default External oscillator frequency.
Definition: IfxScu_cfg.h:60
disable
void disable
Definition: IfxCpu_IntrinsicsDcc.h:465


iLLD_TC26B: lld_structure.c Source File

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lld_structure.c
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1 /** \page lld_structure General Structure of iLLDs
2
3 We can basically differ between two types of iLLDs:
4
5 \section unifunctional Unifunctional Peripheral Drivers
6
7 Unifunctional peripheral drivers are simple modules where the target peripheral is able to carry out one type of functionality.
8
9 Example: VADC peripheral for analog-to-digital conversion. Multican for CAN protocol communication, DMA for DMA functionality, etc.
10
11 \image html "unifunctional.png" Unifunctional Peripheral Driver
12
13 \section multifunctional Multifunctional Peripheral Drivers
14
15 These kind of peripheral drivers are complex to handle, and here the target peripheral can carry out multiple functionalities ("use cases").
16
17 Example: AscLin peripheral can be configured as a common UART, but also as a LIN or even a SPI.\n
18 GTM TOM/ATOM can be used as PWM generator, complex waveform generator and any generic timer, etc.
19
20 \image html "multifunctional.png" Multifunctional Peripheral Driver
21
22
23 \section lldcontent Content of Peripheral Drivers
24
25 iLLDs consist of following components:
26 \li Peripheral Register Memory Map (SFR header file)
27 \li a Standard Layer with (verbose) access functions to SFRs which are changed during application runtime
28 \li an Interface Layer with configuration and handling functions\n
29 Multiple Interface Layers could be available if the peripheral is used for different purposes.
30 \li Pinmaps to configure I/O multiplexers
31
32
33
34 \section configdata Configuration Data Structures
35
36 A configuration structure, which is part of an interface layer, holds the parameters to configure the driver. Depending on the iLLD and its associated peripheral there could be multiple levels of configuration data structures. As in case of VADC there could be data structure to configure the VADC module, a structure for the configuring the group and another for the channels.
37
38 The data structure shall be defined in a memory optimised way considering the structures are non-packed in the memory map. All the structure elements shall be organised in a way that they are ordered in the descending order of their physical memory size.
39
40 <B>Usage:</B> In normal cases configuration data structures are locally stored (on the stack) inside specific initialization routines. They can also be placed in the flash/ROM
41
42
43 <B>Example for a configuration struct:</B>
44 \code
45 typedef struct
46 {
47 const IfxVadc_Adc *module; /**< \brief Specifies pointer to the IfxVadc_Adc module handle */
48 IfxVadc_GroupId groupId; /**< \brief Specifies the group/kernel id */
49 IfxVadc_GroupId master; /**< \brief Specifies the master group if own group is different master slave is configured */
50 IfxVadc_Adc_ArbiterConfig arbiter; /**< \brief Specifies arbiter configuration */
51 IfxVadc_Adc_ClassConfig inputClass[IFXVADC_NUMBER_OF_INPUTCLASS]; /**< \brief Specifies conversion settings one and two */
52 IfxVadc_Adc_ScanConfig scanRequest; /**< \brief Specifies scan mode configuration */
53 IfxVadc_Adc_QueueConfig queueRequest; /**< \brief Specifies queued mode configuration */
54 IfxVadc_Adc_ScanConfig backgroundScanReq; /**< \brief Specifies back ground scan configuration */
55 boolean disablePostCalibration; /**< \brief Specifies if calibration after conversion (post calibration) should be disabled */
56 } IfxVadc_Adc_GroupConfig;
57 \endcode
58
59 \section runtimevars Runtime Variables (Handles)
60
61 Runtime variables are usually stored in so called "handles". This structure is separated from the configuration structure mentioned above (because such structures are only needed during initialization phase).
62
63 Handles are used to reference resources of a peripheral by interface functions without unnecessary calculation or parameter passing overhead. A handle struct contains at least a pointer to the base address of the peripheral which should be accessed, pointers to peripheral subcomponents where required, and/or indices (such as a channel or timer number).
64
65 Handles are to be instantiated per instance of the used peripheral. Higher SW layers store knows number of instances required for the intended application and it reserves the memory for these many data structures.
66
67 The data structure must be made to be available in the DMI RAM of the Cpu from which lld API calls are more frequently done.
68
69 <B>Example for an handle:</B>
70 \code
71 typedef struct
72 {
73 IfxVadc_Adc module; /**< \brief The VADC handle structure */
74 Ifx_VADC_G *group; /**< \brief Pointer to the group registers */
75 IfxVadc_GroupId groupId; /**< \brief Specifies the group index */
76 } IfxVadc_Adc_Group;
77 \endcode
78
79
80 [\ref introduction "Previous page"] [\ref lld_api "Next page"]
81 */


iLLD_TC26B: lld_versioning.c Source File

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lld_versioning.c
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1 /**
2 \page lld_versioning Package versioning
3
4 \section versionNumber Package version number
5 Each released package is assigned a unique identifier that consists of four numbers that represent the major and the minor version numbers separated by underscores '_'.
6
7 For example: version 1_0_0_0_0
8
9 With each new release:
10 - either the minor version is incremented
11 - or the major version number is incremented and the minor and "major update" version number reset
12
13 the increment step for the minor and major number is >= 1.
14
15 \note The package version number is independent from the clearcase file version numbers
16 \endnote
17
18 The version number is available in the IfxLldVersion.h header file, so that it can be referenced (and compared) by application software. The content:
19 \code
20 #define IFX_LLD_VERSION_GENERATION 1 /**< \brief Indicates the driver generation */
21 #define IFX_LLD_VERSION_MAJOR 0 /**< \brief Informs about changes which could lead to incompatibilities */
22 #define IFX_LLD_VERSION_MAJOR_UPDATE 0 /**< \brief Informs about a release for a new derivative without further API changes */
23 #define IFX_LLD_VERSION_MINOR 0 /**< \brief Informs about new additions to the library */
24 #define IFX_LLD_VERSION_REVISION 0 /**< \brief Informs about patches and/or documentation changes */
25 \endcode
26
27 \section changeSignificance Change significance
28 \subsection changeSignificanceMajor Change in the major version number
29 Change in the major version number indicates that the version may not be fully compatible with other major version numbers.
30 The reason for the incompatibility could be:
31 - changes in the API names, parameters...
32
33 \subsection changeSignificanceMajorUpdate Change in the "major update" version number
34 This part of the version number indicates that the library has been released for a new derivative without further API changes.
35
36 \subsection changeSignificanceMinor Change in the minor version number
37 Change in the minor version number indicates that the version is backward compatible with smaller minor version number with identical major version number.
38 The difference between minor version number are:
39 - new feature introduced
40 - bug fix
41 - update of documentation
42
43
44 [\ref lld_filesAndConfig "Previous page"] [\ref lld_dosanddont "Next page"]
45
46
47 */


iLLD_TC26B: mainpage.c Source File

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mainpage.c
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1 /** \mainpage IFX Low Level Drivers
2
3 \section introduction Introduction
4
5 The aim of the IFX Low Level Driver library (iLLD) is to provide access and configuration functions for the integrated peripherals of Infineon microcontrollers - from a simple timer register access up to 3 phases PWM driver for inverter applications. Together with SFR header files they are a fundamental part of the infrastructure for tests and applications which are developed by several teams at IFX ATV.
6
7 All drivers follow the same coding style to ensure a common "Look&Feel". The application interfaces (APIs) are defined and implemented by Hardware/Software experts, already tested pre-silicon with a virtual prototype or in RTL simulations, and then shared by all teams which are involved in programming software:
8
9 \image html "lld_usage.png" "iLLD Usage at Infineon"
10
11 This cross usage model should not only help to reduce development efforts, but also improve the quality/reliability of the drivers.
12
13 The strict iLLD coding guidelines allow layering of drivers for multi-dimensional system scenarios. There is no dependency between the peripheral drivers. Optionally they can be isolated from the library and provided as a separate package (e.g. for application notes delivered to customers).
14
15 iLLDs are currently planned for Aurix and Aurix 2G derivatives.
16
17 Each derivative has its own set of iLLD sources, which are located in GIT. Versionized packages are also distributed via MyICP.
18
19
20 \section toc Table Of Contents
21
22 \li \subpage lld_structure
23 \li \subpage lld_api
24 \li \subpage lld_conventions
25 \li \subpage lld_codingRules
26 \li \subpage lld_doxygenRules
27 \li \subpage lld_filesAndConfig
28 \li \subpage lld_versioning
29 \li \subpage lld_dosanddont
30
31 [\ref lld_structure "Next page"]
32
33 */
34
35 /**
36 * \defgroup IfxLld iLLD
37 */


iLLD_TC26B: Related Pages

Related Pages
Here is a list of all related documentation pages:
Resolver-to-digital Converter with DSADC